diff --git a/.github/ISSUE_TEMPLATE.md b/.github/ISSUE_TEMPLATE.md new file mode 100644 index 00000000000..05f39760b19 --- /dev/null +++ b/.github/ISSUE_TEMPLATE.md @@ -0,0 +1,60 @@ + + +**Description** + + + +**Steps to reproduce the issue:** +1. +2. +3. + +**Describe the results you received:** + + +**Describe the results you expected:** + + +**Additional information you deem important (e.g. issue happens only occasionally):** + + **Output of `show version`:** + + ``` + (paste your output here) + ``` + + **Attach debug file `sudo generate_dump`:** + + ``` + (paste your output here) + ``` diff --git a/.github/PULL_REQUEST_TEMPLATE.md b/.github/PULL_REQUEST_TEMPLATE.md new file mode 100644 index 00000000000..2ac7d9e4773 --- /dev/null +++ b/.github/PULL_REQUEST_TEMPLATE.md @@ -0,0 +1,26 @@ + + +**- What I did** + +**- How I did it** + +**- How to verify it** + +**- Description for the changelog** + + + +**- A picture of a cute animal (not mandatory but encouraged)** diff --git a/.gitignore b/.gitignore new file mode 100644 index 00000000000..b3ab28b86c8 --- /dev/null +++ b/.gitignore @@ -0,0 +1,152 @@ +# OS-generated files +.DS_Store + +# Build system related +.arch +.platform +.screen + +# Build artifacts +fsroot/ +fs.* +target/ +*.deb +*.changes +*.buildinfo +*.tar +*.xz +*.gz +*-dbg +*dbg.j2 +*.img + +# Subdirectories in src +src/bash/* +!src/bash/Makefile +src/ixgbe/* +!src/ixgbe/Makefile +src/isc-dhcp/* +!src/isc-dhcp/Makefile +!src/isc-dhcp/patch +src/socat/* +!src/socat/Makefile +!src/socat/*.patch +src/tacacs/* +src/tacacs/nsm/* +src/tacacs/pam/* +!src/tacacs/nsm/Makefile +!src/tacacs/nsm/*.patch +!src/tacacs/pam/Makefile +!src/tacacs/pam/*.patch +src/hiredis/* +!src/hiredis/Makefile +src/igb/* +!src/igb/Makefile +src/initramfs-tools/* +!src/initramfs-tools/Makefile +src/iproute2/* +!src/iproute2/Makefile +src/isc-dhcp/* +!src/isc-dhcp/Makefile +!src/isc-dhcp/patch/ +src/libnl3/* +!src/libnl3/Makefile +src/libteam/* +!src/libteam/Makefile +src/libyang/* +!src/libyang/Makefile +src/lldpd/* +!src/lldpd/Makefile +!src/lldpd/patch/ +src/lm-sensors/* +!src/lm-sensors/Makefile +src/mpdecimal/* +!src/mpdecimal/Makefile +src/python-click/* +!src/python-click/Makefile +src/python3/* +!src/python3/Makefile +src/radvd/* +!src/radvd/Makefile +!src/radvd/patch/ +src/redis/* +!src/redis/Makefile +src/smartmontools/* +!src/smartmontools/Makefile +src/snmpd/* +!src/snmpd/Makefile +src/sonic-device-data/src/device/ +src/sonic-device-data/src/debian/ +src/supervisor/* +!src/supervisor/Makefile +!src/supervisor/patch/ +src/swig/* +!src/swig/Makefile +src/systemd-sonic-generator/systemd-sonic-generator +src/systemd-sonic-generator/debian/* +!src/systemd-sonic-generator/debian/changelog +!src/systemd-sonic-generator/debian/compat +!src/systemd-sonic-generator/debian/control +!src/systemd-sonic-generator/debian/rules +src/telemetry/debian/* +!src/telemetry/debian/changelog +!src/telemetry/debian/compat +!src/telemetry/debian/control +!src/telemetry/debian/rules +!src/telemetry/debian/telemetry.init.d +src/thrift/* +!src/thrift/patch/ +!src/thrift/Makefile + +# Autogenerated Dockerfiles +sonic-slave/Dockerfile +sonic-slave-stretch/Dockerfile +dockers/docker-base/Dockerfile +dockers/docker-base-stretch/Dockerfile +dockers/docker-config-engine/Dockerfile +dockers/docker-config-engine-stretch/Dockerfile +dockers/docker-database/Dockerfile +dockers/docker-dhcp-relay/Dockerfile +dockers/docker-fpm-frr/Dockerfile +dockers/docker-fpm-gobgp/Dockerfile +dockers/docker-fpm-quagga/Dockerfile +dockers/docker-lldp-sv2/Dockerfile +dockers/docker-orchagent/Dockerfile +dockers/docker-platform-monitor/Dockerfile +dockers/docker-router-advertiser/Dockerfile +dockers/docker-snmp-sv2/Dockerfile +dockers/docker-teamd/Dockerfile +dockers/docker-sonic-mgmt/Dockerfile +dockers/docker-sonic-telemetry/Dockerfile +platform/*/docker-saiserver-*/Dockerfile +platform/*/docker-syncd-*/Dockerfile +platform/*/docker-syncd-*-rpc/Dockerfile +platform/vs/docker-sonic-vs/Dockerfile + +# Installer-related files and directories +installer/x86_64/platforms/ + +# Config engine +src/sonic-config-engine/**/*.pyc +src/sonic-config-engine/build +src/sonic-config-engine/sonic_config_engine.egg-info +src/sonic-daemon-base/**/*.pyc +src/sonic-daemon-base/build +src/sonic-daemon-base/sonic_daemon_base.egg-info + +# Misc. files +files/initramfs-tools/arista-convertfs +files/initramfs-tools/union-mount + +# Other vendors +*accton* +*alphanetworks* +*quanta* +*dell* +*delta* +*ingrasys* +*cel* +*s6000* +*juniper* +*arista* +*xlr-gts* diff --git a/.gitmodules b/.gitmodules new file mode 100644 index 00000000000..483b31a39a2 --- /dev/null +++ b/.gitmodules @@ -0,0 +1,74 @@ +[submodule "sonic-swss-common"] + path = src/sonic-swss-common + url = https://github.com/Azure/sonic-swss-common +[submodule "sonic-linux-kernel"] + path = src/sonic-linux-kernel + url = https://github.com/Azure/sonic-linux-kernel +[submodule "sonic-sairedis"] + path = src/sonic-sairedis + url = https://github.com/Azure/sonic-sairedis +[submodule "sonic-swss"] + path = src/sonic-swss + url = https://github.com/Azure/sonic-swss +[submodule "src/p4c-bm/p4c-bm"] + path = platform/p4/p4c-bm/p4c-bm + url = https://github.com/krambn/p4c-bm +[submodule "src/p4-hlir/p4-hlir"] + path = platform/p4/p4-hlir/p4-hlir + url = https://github.com/p4lang/p4-hlir +[submodule "quagga"] + path = src/sonic-quagga + url = https://github.com/Azure/sonic-quagga + branch = debian/0.99.24.1 +[submodule "sonic-dbsyncd"] + path = src/sonic-dbsyncd + url = https://github.com/Azure/sonic-dbsyncd +[submodule "src/sonic-py-swsssdk"] + path = src/sonic-py-swsssdk + url = https://github.com/Azure/sonic-py-swsssdk.git +[submodule "src/sonic-snmpagent"] + path = src/sonic-snmpagent + url = https://github.com/Azure/sonic-snmpagent +[submodule "src/ptf"] + path = src/ptf + url = https://github.com/p4lang/ptf.git +[submodule "src/sonic-utilities"] + path = src/sonic-utilities + url = https://github.com/Azure/sonic-utilities +[submodule "platform/broadcom/sonic-platform-modules-arista"] + path = platform/broadcom/sonic-platform-modules-arista + url = https://github.com/aristanetworks/sonic +[submodule "src/sonic-platform-common"] + path = src/sonic-platform-common + url = https://github.com/Azure/sonic-platform-common +[submodule "src/sonic-platform-daemons"] + path = src/sonic-platform-daemons + url = https://github.com/Azure/sonic-platform-daemons +[submodule "src/sonic-frr/frr"] + path = src/sonic-frr/frr + url = https://github.com/Azure/sonic-frr.git + branch = frr/7.2 +[submodule "platform/p4/p4-hlir/p4-hlir-v1.1"] + path = platform/p4/p4-hlir/p4-hlir-v1.1 + url = https://github.com/p4lang/p4-hlir.git +[submodule "platform/p4/SAI-P4-BM"] + path = platform/p4/SAI-P4-BM + url = https://github.com/Mellanox/SAI-P4-BM.git +[submodule "platform/barefoot/sonic-platform-modules-arista"] + path = platform/barefoot/sonic-platform-modules-arista + url = https://github.com/aristanetworks/sonic +[submodule "platform/mellanox/hw-management/hw-mgmt"] + path = platform/mellanox/hw-management/hw-mgmt + url = https://github.com/Mellanox/hw-mgmt/ +[submodule "src/redis-dump-load"] + path = src/redis-dump-load + url = https://github.com/p/redis-dump-load.git +[submodule "platform/mellanox/mlnx-sai/SAI-Implementation"] + path = platform/mellanox/mlnx-sai/SAI-Implementation + url = https://github.com/Mellanox/SAI-Implementation +[submodule "Switch-SDK-drivers"] + path = platform/mellanox/sdk-src/sx-kernel/Switch-SDK-drivers + url = https://github.com/Mellanox/Switch-SDK-drivers +[submodule "src/telemetry/sonic-telemetry"] + path = src/telemetry/sonic-telemetry + url = https://github.com/Azure/sonic-telemetry.git diff --git a/Makefile b/Makefile new file mode 100644 index 00000000000..13a3f247fc3 --- /dev/null +++ b/Makefile @@ -0,0 +1,23 @@ +# SONiC make file + +NOJESSIE ?= 0 + +%:: + @echo "+++ --- Making $@ --- +++" +ifeq ($(NOJESSIE), 0) + EXTRA_JESSIE_TARGETS=$(notdir $@) make -f Makefile.work jessie +endif + BLDENV=stretch make -f Makefile.work $@ + +jessie: + @echo "+++ Making $@ +++" +ifeq ($(NOJESSIE), 0) + make -f Makefile.work jessie +endif + +clean reset init configure showtag sonic-slave-build sonic-slave-bash : + @echo "+++ Making $@ +++" +ifeq ($(NOJESSIE), 0) + make -f Makefile.work $@ +endif + BLDENV=stretch make -f Makefile.work $@ diff --git a/Makefile.work b/Makefile.work new file mode 100644 index 00000000000..4e46e940b71 --- /dev/null +++ b/Makefile.work @@ -0,0 +1,254 @@ +############################################################################### +## Wrapper for starting make inside sonic-slave container +# +# Supported parameters: +# +# * PLATFORM: Specific platform we wish to build images for. +# * BUILD_NUMBER: Desired version-number to pass to the building-system. +# * ENABLE_DHCP_GRAPH_SERVICE: Enables get-graph service to fetch minigraph files +# through http. +# * SHUTDOWN_BGP_ON_START: Sets admin-down state for all bgp peerings after restart. +# * ENABLE_PFCWD_ON_START: Enable PFC Watchdog (PFCWD) on server-facing ports +# * by default for TOR switch. +# * ENABLE_SYNCD_RPC: Enables rpc-based syncd builds. +# * INSTALL_DEBUG_TOOLS: Install debug tools and debug symbol packeages. +# * USERNAME: Desired username -- default at rules/config +# * PASSWORD: Desired password -- default at rules/config +# * KEEP_SLAVE_ON: Keeps slave container up and active after building process concludes. +# * Note that rm=true is still set, so once user quits from the docker +# * session, the docker will be removed. +# * Please note that with current Stretch build structure, +# * user of KEEP_SLAVE_ON feature will have to be conscious +# * about which docker to stay inside after build is done. +# * - If user desires to stay inside Jessie docker, please issue +# * make KEEP_SLAVE_ON=yes jessie +# * - If user desires to stay inside Stretch docker, please issue +# * make NOJESSIE=1 KEEP_SLAVE_ON=yes +# * SOURCE_FOLDER: host path to be mount as /var/$(USER)/src, only effective when KEEP_SLAVE_ON=yes +# * SONIC_BUILD_JOBS: Specifying number of concurrent build job(s) to run +# * VS_PREPARE_MEM: Prepare memory in VS build (drop cache and compact). +# * Default: yes +# * Values: yes, no +# * KERNEL_PROCURE_METHOD: Specifying method of obtaining kernel Debian package: download or build +# +############################################################################### + +SHELL = /bin/bash + +USER := $(shell id -un) +PWD := $(shell pwd) + +ifeq ($(USER), root) +$(error Add your user account to docker group and use your user account to make. root or sudo are not supported!) +endif + +# Check for j2cli availability +J2_VER := $(shell j2 --version 2>&1 | grep j2cli | awk '{printf $$2}') +ifeq ($(J2_VER),) +$(error Install j2cli) +endif + +# Check for minimum Docker version on build host +# Note: Using the greater of CE (17.05.0) and EE (17.06.1) versions that support ARG before FROM +docker_min := 17.06.1 +docker_min_ver := $(shell echo "$(docker_min)" | awk -F. '{printf("%d%03d%03d\n",$$1,$$2,$$3);}' 2>/dev/null) +docker_ver := $(shell docker info 2>/dev/null | grep -i "server version" | rev | cut -d' ' -f1 | rev | awk -F. '{printf("%d%03d%03d\n",$$1,$$2,$$3);}' 2>/dev/null) +docker_is_valid := $(shell if [[ "$(docker_ver)" -lt $(docker_min_ver) ]] ; then echo "0"; else echo "1"; fi) +ifeq (0,$(docker_is_valid)) +$(error SONiC requires Docker version $(docker_min) or later) +endif + +# Remove lock file in case previous run was forcefully stopped +$(shell rm -f .screen) + +MAKEFLAGS += -B + +CONFIGURED_ARCH := $(shell [ -f .arch ] && cat .arch || echo $(PLATFORM_ARCH)) +ifeq ($(CONFIGURED_ARCH),) + override CONFIGURED_ARCH = amd64 +endif +ifeq ($(PLATFORM_ARCH),) + override PLATFORM_ARCH = $(CONFIGURED_ARCH) +endif + +ifeq ($(BLDENV), stretch) +SLAVE_DIR = sonic-slave-stretch +else +SLAVE_DIR = sonic-slave-jessie +endif +SLAVE_BASE_TAG = $(shell CONFIGURED_ARCH=$(CONFIGURED_ARCH) j2 $(SLAVE_DIR)/Dockerfile.j2 > $(SLAVE_DIR)/Dockerfile && sha1sum $(SLAVE_DIR)/Dockerfile | awk '{print substr($$1,0,11);}') +SLAVE_TAG = $(shell cat $(SLAVE_DIR)/Dockerfile.user $(SLAVE_DIR)/Dockerfile | sha1sum | awk '{print substr($$1,0,11);}') +SLAVE_BASE_IMAGE = $(SLAVE_DIR) +SLAVE_IMAGE = $(SLAVE_BASE_IMAGE)-$(USER) + +OVERLAY_MODULE_CHECK := \ + lsmod | grep -q "^overlay " &>/dev/null || \ + zgrep -q 'CONFIG_OVERLAY_FS=y' /proc/config.gz &>/dev/null || \ + grep -q 'CONFIG_OVERLAY_FS=y' /boot/config-$(shell uname -r) &>/dev/null || \ + (echo "ERROR: Module 'overlay' not loaded. Try running 'sudo modprobe overlay'."; exit 1) + +BUILD_TIMESTAMP := $(shell date +%Y%m%d\.%H%M%S) + +ifeq ($(DOCKER_BUILDER_MOUNT),) +override DOCKER_BUILDER_MOUNT := "$(PWD):/sonic" +endif + +ifeq ($(DOCKER_BUILDER_WORKDIR),) +override DOCKER_BUILDER_WORKDIR := "/sonic" +endif + +DOCKER_RUN := docker run --rm=true --privileged \ + -v $(DOCKER_BUILDER_MOUNT) \ + -w $(DOCKER_BUILDER_WORKDIR) \ + -e "http_proxy=$(http_proxy)" \ + -e "https_proxy=$(https_proxy)" \ + -i$(if $(TERM),t,) + +include rules/config + +ifeq ($(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD), y) + DOCKER_RUN += -v /var/run/docker.sock:/var/run/docker.sock +endif +ifneq (,$(filter $(CONFIGURED_ARCH), armhf arm64)) + # Multiarch docker cannot start dockerd service due to iptables cannot run over different arch kernel + SONIC_SERVICE_DOCKERD_FOR_MULTIARCH=y + SONIC_NATIVE_DOCKERD_FOR_MUTLIARCH := dockerd --experimental=true --storage-driver=vfs \ + --data-root=/var/lib/march/docker/ --exec-root=/var/run/march/docker/ \ + -H unix:///var/run/march/docker.sock -p /var/run/march/docker.pid + DOCKER_RUN += -v /var/run/march/docker.sock:/var/run/docker.sock + DOCKER_RUN += -v /var/run/march/docker.pid:/var/run/docker.pid + DOCKER_RUN += -v /var/run/march/docker:/var/run/docker + DOCKER_RUN += -v /var/lib/march/docker:/var/lib/docker + SONIC_USERFACL_DOCKERD_FOR_MUTLIARCH := setfacl -m user:$(USER):rw /var/run/march/docker.sock + + #Override Native config to prevent docker service + SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD=y + + DOCKER_MULTIARCH_CHECK := docker inspect --type image multiarch/qemu-user-static:register &> /dev/null || (echo "multiarch docker not found ..."; docker run --rm --privileged multiarch/qemu-user-static:register --reset --credential yes) + + DOCKER_SERVICE_SAFE_KILLER := (MARCH_PID=`ps -eo pid,cmd | grep "[0-9] dockerd.*march" | awk '{print $$1}'`; echo "Killing march docker $$MARCH_PID"; [ -z "$$MARCH_PID" ] || sudo kill -9 "$$MARCH_PID";) + DOCKER_SERVICE_MULTIARCH_CHECK := ($(DOCKER_SERVICE_SAFE_KILLER); sudo rm -fr /var/run/march/; (echo "Starting docker march service..."; sudo $(SONIC_NATIVE_DOCKERD_FOR_MUTLIARCH) &) &>/dev/null ; sleep 2; sudo $(SONIC_USERFACL_DOCKERD_FOR_MUTLIARCH);) + + # Docker service to load the compiled dockers-*.gz + SONIC_NATIVE_DOCKERD_FOR_DOCKERFS := rm -fr $(PWD)/dockerfs/; mkdir -p $(PWD)/dockerfs/; sudo dockerd --storage-driver=overlay2 --iptables=false \ + --data-root $(PWD)/dockerfs/var/lib/docker/ --exec-root=$(PWD)/dockerfs/var/run/docker/ \ + -H unix://$(PWD)/dockerfs/var/run/docker.sock -p $(PWD)/dockerfs/var/run/docker.pid & + SONIC_USERFACL_DOCKERD_FOR_DOCKERFS := setfacl -m user:$(USER):rw $(PWD)/dockerfs/var/run/docker.sock + DOCKER_SERVICE_DOCKERFS_CHECK := (sudo docker -H unix://$(PWD)/dockerfs/var/run/docker.sock info &> /dev/null && sudo kill -9 `sudo cat $(PWD)/dockerfs/var/run/docker.pid` && false) || (echo "Starting docker build service..."; (sudo $(SONIC_NATIVE_DOCKERD_FOR_DOCKERFS) ) &>/dev/null ; sleep 1; sudo $(SONIC_USERFACL_DOCKERD_FOR_DOCKERFS);) + +endif + +DOCKER_BASE_BUILD = docker build --no-cache \ + -t $(SLAVE_BASE_IMAGE):$(SLAVE_BASE_TAG) \ + --build-arg http_proxy=$(http_proxy) \ + --build-arg https_proxy=$(https_proxy) \ + $(SLAVE_DIR) + +DOCKER_BUILD = docker build --no-cache \ + --build-arg user=$(USER) \ + --build-arg uid=$(shell id -u) \ + --build-arg guid=$(shell id -g) \ + --build-arg hostname=$(shell echo $$HOSTNAME) \ + --build-arg slave_base_tag_ref=$(SLAVE_BASE_TAG) \ + -t $(SLAVE_IMAGE):$(SLAVE_TAG) \ + -f $(SLAVE_DIR)/Dockerfile.user \ + $(SLAVE_DIR) + +SONIC_BUILD_INSTRUCTION := make \ + -f slave.mk \ + BLDENV=$(BLDENV) \ + PLATFORM=$(PLATFORM) \ + PLATFORM_ARCH=$(PLATFORM_ARCH) \ + BUILD_NUMBER=$(BUILD_NUMBER) \ + BUILD_TIMESTAMP=$(BUILD_TIMESTAMP) \ + ENABLE_DHCP_GRAPH_SERVICE=$(ENABLE_DHCP_GRAPH_SERVICE) \ + SHUTDOWN_BGP_ON_START=$(SHUTDOWN_BGP_ON_START) \ + SONIC_ENABLE_PFCWD_ON_START=$(ENABLE_PFCWD_ON_START) \ + SONIC_ENABLE_SYNCD_RPC=$(ENABLE_SYNCD_RPC) \ + SONIC_INSTALL_DEBUG_TOOLS=$(INSTALL_DEBUG_TOOLS) \ + PASSWORD=$(PASSWORD) \ + USERNAME=$(USERNAME) \ + SONIC_BUILD_JOBS=$(SONIC_BUILD_JOBS) \ + SONIC_USE_DOCKER_BUILDKIT=$(SONIC_USE_DOCKER_BUILDKIT) \ + VS_PREPARE_MEM=$(VS_PREPARE_MEM) \ + KERNEL_PROCURE_METHOD=$(KERNEL_PROCURE_METHOD) \ + HTTP_PROXY=$(http_proxy) \ + HTTPS_PROXY=$(https_proxy) \ + SONIC_ENABLE_SYSTEM_TELEMETRY=$(ENABLE_SYSTEM_TELEMETRY) \ + EXTRA_JESSIE_TARGETS=$(EXTRA_JESSIE_TARGETS) \ + $(SONIC_OVERRIDE_BUILD_VARS) + +.PHONY: sonic-slave-build sonic-slave-bash init reset + +.DEFAULT_GOAL := all + +%:: +ifneq (,$(filter $(CONFIGURED_ARCH), armhf arm64)) + @$(DOCKER_MULTIARCH_CHECK) +ifneq ($(BLDENV), ) + @$(DOCKER_SERVICE_MULTIARCH_CHECK) + @$(DOCKER_SERVICE_DOCKERFS_CHECK) +endif +endif + @$(OVERLAY_MODULE_CHECK) + + @docker inspect --type image $(SLAVE_BASE_IMAGE):$(SLAVE_BASE_TAG) &> /dev/null || \ + { echo Image $(SLAVE_BASE_IMAGE):$(SLAVE_BASE_TAG) not found. Building... ; \ + $(DOCKER_BASE_BUILD) ; } + @docker inspect --type image $(SLAVE_IMAGE):$(SLAVE_TAG) &> /dev/null || \ + { echo Image $(SLAVE_IMAGE):$(SLAVE_TAG) not found. Building... ; \ + $(DOCKER_BUILD) ; } +ifeq "$(KEEP_SLAVE_ON)" "yes" + ifdef SOURCE_FOLDER + @$(DOCKER_RUN) -v $(SOURCE_FOLDER):/var/$(USER)/src $(SLAVE_IMAGE):$(SLAVE_TAG) bash -c "$(SONIC_BUILD_INSTRUCTION) $@; /bin/bash" + else + @$(DOCKER_RUN) $(SLAVE_IMAGE):$(SLAVE_TAG) bash -c "$(SONIC_BUILD_INSTRUCTION) $@; /bin/bash" + endif +else + @$(DOCKER_RUN) $(SLAVE_IMAGE):$(SLAVE_TAG) $(SONIC_BUILD_INSTRUCTION) $@ +endif + +sonic-slave-build : + $(DOCKER_BASE_BUILD) + $(DOCKER_BUILD) + +sonic-slave-bash : + @$(OVERLAY_MODULE_CHECK) + @docker inspect --type image $(SLAVE_BASE_IMAGE):$(SLAVE_BASE_TAG) &> /dev/null || \ + { echo Image $(SLAVE_BASE_IMAGE):$(SLAVE_BASE_TAG) not found. Building... ; \ + $(DOCKER_BASE_BUILD) ; } + @docker inspect --type image $(SLAVE_IMAGE):$(SLAVE_TAG) &> /dev/null || \ + { echo Image $(SLAVE_IMAGE):$(SLAVE_TAG) not found. Building... ; \ + $(DOCKER_BUILD) ; } + @$(DOCKER_RUN) -t $(SLAVE_IMAGE):$(SLAVE_TAG) bash + +showtag: + @echo $(SLAVE_IMAGE):$(SLAVE_TAG) + @echo $(SLAVE_BASE_IMAGE):$(SLAVE_BASE_TAG) + +init : + @git submodule update --init --recursive + @git submodule foreach --recursive '[ -f .git ] && echo "gitdir: $$(realpath --relative-to=. $$(cut -d" " -f2 .git))" > .git' + @sh inv_build/apply_patch.sh + +.ONESHELL : reset +reset : + @echo && echo -n "Warning! All local changes will be lost. Proceed? [y/N]: " + @read ans && ( + if [ $$ans == y ]; then + echo "Resetting local repository. Please wait..."; + $(DOCKER_RUN) $(SLAVE_IMAGE):$(SLAVE_TAG) sudo rm -rf fsroot; + if [[ "$(CONFIGURED_ARCH)" == "armhf" || "$(CONFIGURED_ARCH)" == "arm64" ]]; then + echo "Stopping march $(CONFIGURED_ARCH) docker" + sudo kill -9 `sudo cat /var/run/march/docker.pid` || true + sudo rm -f /var/run/march/docker.pid || true + fi + git clean -xfdf; + git reset --hard; + git submodule foreach --recursive git clean -xfdf; + git submodule foreach --recursive git reset --hard; + git submodule update --init --recursive; + echo "Reset complete!"; + else + echo "Reset aborted"; + fi ) diff --git a/README.buildsystem.md b/README.buildsystem.md new file mode 100644 index 00000000000..f2d804d7e90 --- /dev/null +++ b/README.buildsystem.md @@ -0,0 +1,280 @@ +# SONiC Buildimage Guide +## Overview +SONiC buildimage is a *GNU make* based environment for build process automation. +It consists of two main parts: + * Backend - collection of makefiles and other helpers that define generic target groups, used by recipes + * Frontend - collection of recipes, that define metadata for each build target + +## Structure +File structure of SONiC Buildimage is as follows: +``` +sonic-buildimage/ + Makefile + slave.mk + sonic-slave/ + Dockerfile + rules/ + config + functions + recipe1.mk + .. + dockers/ + docker1/ + Dockerfile.template + .. + src/ + submodule1/ + .. + package1/ + Makefile + .. + platform/ + vendor1/ + .. + target/ + debs/ + python-wheels/ +``` +### Backend +**Makefile**, **slave.mk** and **sonic-slave/Dockerfile** are the backend of buildimage. +*slave.mk* is the actual makefile. It defines a set of rules for *target groups* (more on that later). +You can find a make rule for every target that is defined in recipe there. +*Makefile* is a wrapper over sonic-slave docker image. + +Every part of build is executed in a docker container called sonic-slave, specifically crafted for this environment. +If build is started for the first time on a particular host, a new sonic-slave image will be built form *sonic-slave/Dockerfile* on the machine. +It might take some time, so be patient. +After that all subsequent make commands will be executed inside this container. +*Makefile* takes every target that is passed to make command and delegates it as an entry point to a container, +making process of running container transparent. + +### Frontend +**rules/** has a collection of recipes for platform independent targets. +Every recipe is a file that describes a metadata of a specific target, that is needed for its build. +You might find **rules/config** very useful, as it is a configuration file for a build system, which enables/disables some tweaks. +**dockers/** directory is a place where you can find Dockerfiles for generic docker images. +**src/** is a place where a source code for generic packages goes. +It has both submodules (simple case, just run dpkg-buildpackage to build), +and directories with more complcated components, that provide their own Makefiles. +**platform/** contains all vendor-specific recipes, submodules etc. +Every **platform/[VENDOR]/** directory is a derived part of buildimage frontend, that defines rules and targets for a concrete vendor. + +### Build output +**target/** is basically a build output. You can find all build artifacts there. + +## Recipes and target groups +Now let's go over a definition of recipes and target groups. +**Recipe** is a small makefile that defines a target and set of variables for building it. +If you want to add a new target to buildimage (.deb package or docker image), you have to create a recipe for this target. +**Target group** is a set of targets that are built according to the same rules. +Every recipe sets a target group to which this target belongs. + +### Recipe example +Lets take a recipe for swsscommon as an example: +```make +# libswsscommon package + +LIBSWSSCOMMON = libswsscommon_1.0.0_amd64.deb +$(LIBSWSSCOMMON)_SRC_PATH = $(SRC_PATH)/sonic-swss-common +$(LIBSWSSCOMMON)_DEPENDS += $(LIBHIREDIS_DEV) $(LIBNL3_DEV) $(LIBNL_GENL3_DEV) \ + $(LIBNL_ROUTE3_DEV) $(LIBNL_NF3_DEV) \ + $(LIBNL_CLI_DEV) +$(LIBSWSSCOMMON)_RDEPENDS += $(LIBHIREDIS) $(LIBNL3) $(LIBNL_GENL3) \ + $(LIBNL_ROUTE3) $(LIBNL_NF3) $(LIBNL_CLI) +SONIC_DPKG_DEBS += $(LIBSWSSCOMMON) + +LIBSWSSCOMMON_DEV = libswsscommon-dev_1.0.0_amd64.deb +$(eval $(call add_derived_package,$(LIBSWSSCOMMON),$(LIBSWSSCOMMON_DEV))) +``` +First we define our package swsscommon. +Then we secify **SRC_PATH** (path to sources), +**DEPENDS** (build dependencies), +and **RDEPENDS** (runtime dependencies for docker installation). +Then we add our target to SONIC_DPKG_DEBS target group. +At the end we define a dev package for swsscommon and make it derived from main one. +Using **add_derived_package** just makes a deep copy of package's metadata, so that we don't have to repeat ourselves. + +### Target groups +**SONIC_DPKG_DEBS** +Main target group for building .deb packages. +Define: +```make +SOME_NEW_DEB = some_new_deb.deb # name of your package +$(SOME_NEW_DEB)_SRC_PATH = $(SRC_PATH)/project_name # path to directory with sources +$(SOME_NEW_DEB)_DEPENDS = $(SOME_OTHER_DEB1) $(SOME_OTHER_DEB2) ... # build dependencies +$(SOME_NEW_DEB)_RDEPENDS = $(SOME_OTHER_DEB1) $(SOME_OTHER_DEB2) ... # runtime dependencies +SONIC_DPKG_DEBS += $(SOME_NEW_DEB) # add package to this target group +``` + +**SONIC_PYTHON_STDEB_DEBS** +Same as above, but instead of building package using dpkg-buildpackage it executes `python setup.py --command-packages=stdeb.command bdist_deb`. +Define: +```make +SOME_NEW_DEB = some_new_deb.deb # name of your package +$(SOME_NEW_DEB)_SRC_PATH = $(SRC_PATH)/project_name # path to directory with sources +$(SOME_NEW_DEB)_DEPENDS = $(SOME_OTHER_DEB1) $(SOME_OTHER_DEB2) ... # build dependencies +$(SOME_NEW_DEB)_RDEPENDS = $(SOME_OTHER_DEB1) $(SOME_OTHER_DEB2) ... # runtime dependencies +SONIC_PYTHON_STDEB_DEBS += $(SOME_NEW_DEB) # add package to this target group +``` + +**SONIC_MAKE_DEBS** +This is a bit more flexible case. +If you have to do some specific type of build or apply pathes prior to build, just define your own Makefile and add it to buildimage. +Define: +```make +SOME_NEW_DEB = some_new_deb.deb # name of your package +$(SOME_NEW_DEB)_SRC_PATH = $(SRC_PATH)/project_name # path to directory with sources +$(SOME_NEW_DEB)_DEPENDS = $(SOME_OTHER_DEB1) $(SOME_OTHER_DEB2) ... # build dependencies +$(SOME_NEW_DEB)_RDEPENDS = $(SOME_OTHER_DEB1) $(SOME_OTHER_DEB2) ... # runtime dependencies +SONIC_MAKE_DEBS += $(SOME_NEW_DEB) # add package to this target group +``` + +If some packages have to be built locally due to some legal issues or they are already prebuilt and available online, you might find next four target groups useful. + +**SONIC_COPY_DEBS** +Those packages will be just copied from specified location on your machine. +Define: +```make +SOME_NEW_DEB = some_new_deb.deb # name of your package +$(SOME_NEW_DEB)_PATH = path/to/some_new_deb.deb # path to file +SONIC_COPY_DEBS += $(SOME_NEW_DEB) # add package to this target group +``` + +**SONIC_COPY_FILES** +Same as above, but applicable for regular files. Use when you need some regular files for installation in docker container. +Define: +```make +SOME_NEW_FILE = some_new_file # name of your file +$(SOME_NEW_FILE)_PATH = path/to/some_new_file # path to file +SONIC_COPY_FILES += $(SOME_NEW_FILE) # add file to this target group +``` + +**SONIC_ONLINE_DEBS** +Target group for debian packages that should be fetched from an online source. +Define: +```make +SOME_NEW_DEB = some_new_deb.deb # name of your package +$(SOME_NEW_DEB)_URL = https://url/to/this/deb.deb # path to file # URL for downloading +SONIC_ONLINE_DEBS += $(SOME_NEW_DEB) # add file to this target group +``` + +**SONIC_ONLINE_FILES** +Target group for regular files that should be fetched from an online source. +Define: +```make +SOME_NEW_FILE = some_new_file # name of your file +$(SOME_NEW_FILE)_URL = https://url/to/this/file # URL for downloading +SONIC_ONLINE_FILES += $(SOME_NEW_FILE) # add file to this target group +``` + +Docker images also have their target groups. +**SONIC_SIMPLE_DOCKER_IMAGES** +As you see from a name of the group, it is intended to build a docker image from a regular Dockerfile. +Define: +```make +SOME_DOCKER = some_docker.gz # name of your docker +$(SOME_DOCKER)_PATH = path/to/your/docker # path to your Dockerfile +SONIC_SIMPLE_DOCKER_IMAGES += $(SOME_DOCKER) # add docker to this group +``` + +**SONIC_DOCKER_IMAGES** +This one is a bit more sophisticated. You can define debian packages from buildimage that will be installed to it, and corresponding Dockerfile will be dinamically generated from a template. +Define: +```make +SOME_DOCKER = some_docker.gz # name of your docker +$(SOME_DOCKER)_PATH = path/to/your/docker # path to your Dockerfile +$(SOME_DOCKER)_DEPENDS += $(SOME_DEB1) $(SOME_DEB2) # .deb packages to install into image +$(SOME_DOCKER)_PYTHON_WHEELS += $(SOME_WHL1) $(SOME_WHL2) # python wheels to install into image +$(SOME_DOCKER)_LOAD_DOCKERS += $(SOME_OTHER_DOCkER) # docker image from which this one is built +SONIC_DOCKER_IMAGES += $(SOME_DOCKER) # add docker to this group +``` + +## Tips & Tricks +Although every target is built inside a sonic-slave container, which exits at the end of build, you can enter bash of sonic-slave using this command: +``` +$ make sonic-slave-bash +``` +It is very useful for debugging when you add a new target and facing some troubles. + +sonic-slave environment is built only once, but if sonic-slave/Dockerfile was updated, you can rebuild it with this command: +``` +$ make sonic-slave-build +``` + +One can print out all available targets by executing the following command: +``` +$ make list +``` + +All target groups are used by one or another recipe, so use those recipes as a reference when adding new ones. + +## Build debug dockers and debug SONiC installer image: +Using 'INSTALL_DEBUG_TOOLS=y' builds the debug image. + +For example: +`INSTALL_DEBUG_TOOLS=y make target/sonic-broadcom.bin` + +* Builds debug docker images. +* Debug images carry a suffix of "-dbg" + * e.g. target/docker-orchagent-dbg.gz +* target/sonic-broadcom.bin is built using debug docker images + * Selective sources are archived and available under /src + * An empty /debug dir is created for use during debug session. + * All debug dockers are mounted with /src:ro and /debug:rw + * Login banner will briefly describe these features. + + +_Note: target/sonic-broadcom.bin name is the same irrespective of built using debug or non-debug dockers._ + +_Recommend: Rename image built using INSTALL_DEBUG_TOOLS=y to mark it explicit. May be `mv target/sonic-broadcom.bin target/sonic-broadcom-dbg.bin`_ + +### Debug dockers +* Built with all available debug symbols. +* Installed with many basic packages that would be required for debugging + * gdb + * gdbserver + * vim + * strace + * openssh-client + * sshpass +* Loadable into any environment that supports docker +* Outside SONiC image, you may run the docker with `--entrypoint=/bin/bash` +* Use -v to map any of your host directories +* To debug a core file in non-SONiC environment that supports docker + * `docker load -i docker--dbg.gz` + * copy your unzipped core file into ~/debug + * `docker run -it -entrypoint=/bin/bash -v ~/debug:/debug ` + * `gdb /usr/bin/ -c /debug/` + +### Debug SONiC image + +* Install this image into the switch that supports this image. + * For platform independent binary, you may use a debug image for virtual switch +* Open the archive in /src, if you would need source code for debugging +* Every debug enabled docker is mounted with /src as read-only +* The host has /debug dir and it is mapped into every debuggable docker as /debug with read-write permission. +* To debug a core + * Copy core into /debug of host and unzip it + * Feel free to create & use sub-dirs as needed. + * Entire /debug is mounted inside docker + * Get into the docker (`docker -it exec bash`) + * `gdb /usr/bin/ -c /debug/` + * Use set-directory in gdb to map appropriate source dir from under /src + * You may set gdb logs to go into /debug +* For live debugging + * Use this as a regular switch + * Get into docker, and you may + * start process under dbg + * attach gdb to running process + * Set required source dir from under /src as needed + * May use /debug to record all geb logs or any spew from debug session. + + ### To enhance debug dockers + * Add to `_DBG_IMAGE_PACKAGES`, additional debug tools that will be pre-installed during build. + * e.g. `$(DOCKER_ORCHAGENT)_DBG_IMAGE_PACKAGES += perl` + * Build will install these tools using "apt" + * Add to `_DBG_DEPENDS`, additional debug .deb packages that will be pre-installed during build. + * e.g. `$(DOCKER_ORCHAGENT)_DBG_DEPENDS += $(SWSS_DBG) $(LIBSWSSCOMMON_DBG) $(LIBSAIREDIS_DBG)` + * Add to `DBG_SRC_ARCHIVE`, the source dirs to archive + * The source files (.c, .cpp, .h & .hpp) under this dir tree are archived. + * e.g. rules/swss.mk has `DBG_SRC_ARCHIVE += swss` diff --git a/README.md b/README.md index d6525945899..129af89f05d 100644 --- a/README.md +++ b/README.md @@ -1,33 +1,210 @@ -# Build Switch Images - buildimage +*master*: +Barefoot: [![Barefoot](https://sonic-jenkins.westus2.cloudapp.azure.com/job/barefoot/job/buildimage-bf-all/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/barefoot/job/buildimage-bf-all) +Broadcom: [![Broadcom](https://sonic-jenkins.westus2.cloudapp.azure.com/job/broadcom/job/buildimage-brcm-all/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/broadcom/job/buildimage-brcm-all) +Mellanox: [![Mellanox](https://sonic-jenkins.westus2.cloudapp.azure.com/job/mellanox/job/buildimage-mlnx-all/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/mellanox/job/buildimage-mlnx-all) +Nephos: [![Nephos](https://sonic-jenkins.westus2.cloudapp.azure.com/job/nephos/job/buildimage-nephos-all/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/nephos/job/buildimage-nephos-all) +P4: [![P4](https://sonic-jenkins.westus2.cloudapp.azure.com/job/p4/job/buildimage-p4-all/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/p4/job/buildimage-p4-all) +VS: [![VS](https://sonic-jenkins.westus2.cloudapp.azure.com/job/vs/job/buildimage-vs-all/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/vs/job/buildimage-vs-all) -# Description -Build an [Open Network Install Environment (ONIE)](https://github.com/opencomputeproject/onie) compatiable network operating system (NOS) installer image for network switches, and also build docker images running inside the NOS. +*201904*: +Broadcom: [![Broadcom](https://sonic-jenkins.westus2.cloudapp.azure.com/job/broadcom/job/buildimage-brcm-201904/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/broadcom/job/buildimage-brcm-201904/) +Barefoot: [![Mellanox](https://sonic-jenkins.westus2.cloudapp.azure.com/job/barefoot/job/buildimage-bf-201904/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/barefoot/job/buildimage-bf-201904/) +Centec: [![Centec](https://sonic-jenkins.westus2.cloudapp.azure.com/job/centec/job/buildimage-centec-201904/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/centec/job/buildimage-centec-201904/) +Nephos: [![Nephos](https://sonic-jenkins.westus2.cloudapp.azure.com/job/nephos/job/buildimage-nephos-201904/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/nephos/job/buildimage-nephos-201904/) +Marvell: [![Marvell](https://sonic-jenkins.westus2.cloudapp.azure.com/job/marvell/job/buildimage-mrvl-201904/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/marvell/job/buildimage-mrvl-201904/) +Mellanox: [![Mellanox](https://sonic-jenkins.westus2.cloudapp.azure.com/job/mellanox/job/buildimage-mlnx-201904/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/mellanox/job/buildimage-mlnx-201904/) +VS: [![VS](https://sonic-jenkins.westus2.cloudapp.azure.com/job/vs/job/buildimage-vs-201904/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/vs/job/buildimage-vs-201904) -# Usage -## Build NOS installer image +*201811*: +Broadcom: [![Broadcom](https://sonic-jenkins.westus2.cloudapp.azure.com/job/broadcom/job/buildimage-brcm-201811/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/broadcom/job/buildimage-brcm-201811/) +Barefoot: [![Mellanox](https://sonic-jenkins.westus2.cloudapp.azure.com/job/barefoot/job/buildimage-bf-201811/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/barefoot/job/buildimage-bf-201811/) +Centec: [![Centec](https://sonic-jenkins.westus2.cloudapp.azure.com/job/centec/job/buildimage-centec-201811/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/centec/job/buildimage-centec-201811/) +Nephos: [![Nephos](https://sonic-jenkins.westus2.cloudapp.azure.com/job/nephos/job/buildimage-nephos-201811/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/nephos/job/buildimage-nephos-201811/) +Marvell: [![Marvell](https://sonic-jenkins.westus2.cloudapp.azure.com/job/marvell/job/buildimage-mrvl-201811/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/marvell/job/buildimage-mrvl-201811/) +Mellanox: [![Mellanox](https://sonic-jenkins.westus2.cloudapp.azure.com/job/mellanox/job/buildimage-mlnx-201811/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/mellanox/job/buildimage-mlnx-201811/) +VS: [![VS](https://sonic-jenkins.westus2.cloudapp.azure.com/job/vs/job/buildimage-vs-201811/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/vs/job/buildimage-vs-201811) - ./build_debian USERNAME PASSWORD_ENCRYPTED && ./build_image.sh - -For example, the user name is 'acsadmin' and the password is 'YourPaSsWoRd'. +*201807*: +Broadcom: [![Broadcom](https://sonic-jenkins.westus2.cloudapp.azure.com/job/broadcom/job/buildimage-brcm-201807/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/broadcom/job/buildimage-brcm-201807/) +Barefoot: [![Mellanox](https://sonic-jenkins.westus2.cloudapp.azure.com/job/barefoot/job/buildimage-bf-201807/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/barefoot/job/buildimage-bf-201807/) +Centec: [![Centec](https://sonic-jenkins.westus2.cloudapp.azure.com/job/centec/job/buildimage-centec-201807/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/centec/job/buildimage-centec-201807/) +Nephos: [![Nephos](https://sonic-jenkins.westus2.cloudapp.azure.com/job/nephos/job/buildimage-nephos-201807/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/nephos/job/buildimage-nephos-201807/) +Marvell: [![Marvell](https://sonic-jenkins.westus2.cloudapp.azure.com/job/marvell/job/buildimage-mrvl-201807/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/marvell/job/buildimage-mrvl-201807/) +Mellanox: [![Mellanox](https://sonic-jenkins.westus2.cloudapp.azure.com/job/mellanox/job/buildimage-mlnx-201807/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/mellanox/job/buildimage-mlnx-201807/) - ./build_debian.sh "acsadmin" "$(perl -e 'print crypt("YourPaSsWoRd", "salt"),"\n"')" && ./build_image.sh +*201803*: +Broadcom: [![Broadcom](https://sonic-jenkins.westus2.cloudapp.azure.com/job/broadcom/job/buildimage-brcm-201803/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/broadcom/job/buildimage-brcm-201803/) +Cavium: [![Cavium](https://sonic-jenkins.westus2.cloudapp.azure.com/job/cavium/job/buildimage-cavm-201803/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/cavium/job/buildimage-cavm-201803/) +Centec: [![Centec](https://sonic-jenkins.westus2.cloudapp.azure.com/job/centec/job/buildimage-centec-201803/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/centec/job/buildimage-centec-201803/) +Nephos: [![Nephos](https://sonic-jenkins.westus2.cloudapp.azure.com/job/nephos/job/buildimage-nephos-201803/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/nephos/job/buildimage-nephos-201803/) +Marvell: [![Marvell](https://sonic-jenkins.westus2.cloudapp.azure.com/job/marvell/job/buildimage-mrvl-201803/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/marvell/job/buildimage-mrvl-201803/) +Mellanox: [![Mellanox](https://sonic-jenkins.westus2.cloudapp.azure.com/job/mellanox/job/buildimage-mlnx-201803/badge/icon)](https://sonic-jenkins.westus2.cloudapp.azure.com/job/mellanox/job/buildimage-mlnx-201803/) -The root is disabled, but the created user could sudo. +# sonic-buildimage +## Build SONiC Switch Images -## Build docker images +# Description - ./build_docker.sh docker-sswsyncd - ./build_docker.sh docker-database - ./build_docker.sh docker-bgp - ./build_docker.sh docker-snmp - ./build_docker.sh docker-lldp +Following is the instruction on how to build an [(ONIE)](https://github.com/opencomputeproject/onie) compatible network operating system (NOS) installer image for network switches, and also how to build docker images running inside the NOS. Note that SONiC image are build per ASIC platform. Switches using the same ASIC platform share a common image. For a list of supported switches and ASIC, please refer to this [list](https://github.com/Azure/SONiC/wiki/Supported-Devices-and-Platforms) -# Contribution guide +# Hardware +Any server can be a build image server. We are using a server with 1T hard disk. The OS is Ubuntu 16.04. -All contributors must sign a contribution license agreement before contributions can be accepted. Contact kasubra@microsoft.com or daloher@microsoft.com. Later this will be automated. +## Prerequisites -### GitHub Workflow +Install pip and jinja in host build machine, execute below commands if j2/j2cli is not available: + + sudo apt-get install -y python-pip + sudo python2 -m pip install -U pip==9.0.3 + sudo pip install --force-reinstall --upgrade jinja2>=2.10 + sudo pip install j2cli + +Configure your system to allow running the 'docker' command without 'sudo': + Add current user to the docker group + `sudo gpasswd -a ${USER} docker` + Log out and log back in so that your group membership is re-evaluated + +## SAI Version +Please refer to [SONiC roadmap](https://github.com/Azure/SONiC/wiki/Sonic-Roadmap-Planning) on the SAI version for each SONiC release. + +## Clone or fetch the code repository with all git submodules +To clone the code repository recursively, assuming git version 1.9 or newer: + + git clone https://github.com/Azure/sonic-buildimage.git + +## Usage + +To build SONiC installer image and docker images, run the following commands: + + # Ensure the 'overlay' module is loaded on your development system + sudo modprobe overlay + + # Enter the source directory + cd sonic-buildimage + + # (Optional) Checkout a specific branch. By default, it uses master branch + git checkout [branch_name] + + # Execute make init once after cloning the repo, or after fetching remote repo with submodule updates + make init + + # Execute make configure once to configure ASIC + make configure PLATFORM=[ASIC_VENDOR] + + # Build SONiC image + make all + +## Usage for ARM Architecture +To build Arm32 bit for (ARMHF) plaform + ARM build has dependency in docker version 18, + if docker version is 19, downgrade to 18 as below + sudo apt-get install --allow-downgrades -y docker-ce=5:18.09.0~3-0~ubuntu-xenial + sudo apt-get install --allow-downgrades -y docker-ce-cli=5:18.09.0~3-0~ubuntu-xenial + + # Execute make configure once to configure ASIC and ARCH + + make configure PLATFORM=[ASIC_VENDOR] PLATFORM_ARCH=armhf + + make target/sonic-[ASIC_VENDER]-armhf.bin + + # example: + + make configure PLATFORM=marvell-armhf PLATFORM_ARCH=armhf + + make target/sonic-marvell-armhf.bin + + + +To build Arm64 bit for plaform + + # Execute make configure once to configure ASIC and ARCH + + make configure PLATFORM=[ASIC_VENDOR] PLATFORM_ARCH=arm64 + + # example: + + make configure PLATFORM=marvell-arm64 PLATFORM_ARCH=arm64 + + + **NOTE**: + +- Recommend reserving 50G free space to build one platform. +- If Docker's workspace folder, `/var/lib/docker`, resides on a partition without sufficient free space, you may encounter an error like the following during a Docker container build job: + + `/usr/bin/tar: /path/to/sonic-buildimage/: Cannot write: No space left on device` + + The solution is to [move the directory](https://linuxconfig.org/how-to-move-docker-s-default-var-lib-docker-to-another-directory-on-ubuntu-debian-linux) to a partition with more free space. +- Use `http_proxy=[your_proxy] https_proxy=[your_proxy] make` to enable http(s) proxy in the build process. +- Add your user account to `docker` group and use your user account to make. `root` or `sudo` are not supported. + +The SONiC installer contains all docker images needed. SONiC uses one image for all devices of a same ASIC vendor. The supported ASIC vendors are: + +- PLATFORM=broadcom +- PLATFORM=marvell +- PLATFORM=mellanox +- PLATFORM=cavium +- PLATFORM=centec +- PLATFORM=nephos +- PLATFORM=p4 +- PLATFORM=vs + +For Broadcom ASIC, we build ONIE and EOS image. EOS image is used for Arista devices, ONIE image is used for all other Broadcom ASIC based devices. + + make configure PLATFORM=broadcom + # build debian stretch required targets + BLDENV=stretch make stretch + # build ONIE image + make target/sonic-broadcom.bin + # build EOS image + make target/sonic-aboot-broadcom.swi + +You may find the rules/config file useful. It contains configuration options for the build process, like adding more verbosity or showing dependencies, username and password for base image etc. + +Every docker image is built and saved to target/ directory. +So, for instance, to build only docker-database, execute: + + make target/docker-database.gz + +Same goes for debian packages, which are under target/debs/: + + make target/debs/swss_1.0.0_amd64.deb + +Every target has a clean target, so in order to clean swss, execute: + + make target/debs/swss_1.0.0_amd64.deb-clean + +It is recommended to use clean targets to clean all packages that are built together, like dev packages for instance. In order to be more familiar with build process and make some changes to it, it is recommended to read this short [Documentation](README.buildsystem.md). + +## Build debug dockers and debug SONiC installer image: +SONiC build system supports building dockers and ONE-image with debug tools and debug symbols, to help with live & core debugging. For details refer to [(SONiC Buildimage Guide)](https://github.com/Azure/sonic-buildimage/blob/master/README.buildsystem.md). + +## Notes: +- If you are running make for the first time, a sonic-slave-${USER} docker image will be built automatically. +This may take a while, but it is a one-time action, so please be patient. + +- The root user account is disabled. However, the created user can `sudo`. + +- The target directory is `./target`, containing the NOS installer image and docker images. + - sonic-generic.bin: SONiC switch installer image (ONIE compatible) + - sonic-aboot.bin: SONiC switch installer image (Aboot compatible) + - docker-base.gz: base docker image where other docker images are built from, only used in build process (gzip tar archive) + - docker-database.gz: docker image for in-memory key-value store, used as inter-process communication (gzip tar archive) + - docker-fpm.gz: docker image for quagga with fpm module enabled (gzip tar archive) + - docker-orchagent.gz: docker image for SWitch State Service (SWSS) (gzip tar archive) + - docker-syncd-brcm.gz: docker image for the daemon to sync database and Broadcom switch ASIC (gzip tar archive) + - docker-syncd-cavm.gz: docker image for the daemon to sync database and Cavium switch ASIC (gzip tar archive) + - docker-syncd-mlnx.gz: docker image for the daemon to sync database and Mellanox switch ASIC (gzip tar archive) + - docker-syncd-nephos.gz: docker image for the daemon to sync database and Nephos switch ASIC (gzip tar archive) + - docker-sonic-p4.gz: docker image for all-in-one for p4 software switch (gzip tar archive) + - docker-sonic-vs.gz: docker image for all-in-one for software virtual switch (gzip tar archive) + - docker-sonic-mgmt.gz: docker image for [managing, configuring and monitoring SONiC](https://github.com/Azure/sonic-mgmt) (gzip tar archive) + +## Contribution Guide + +All contributors must sign a contribution license agreement before contributions can be accepted. Contact [sonic-cla-agreements@microsoft.com](mailto:sonic-cla-agreements@microsoft.com). + +## GitHub Workflow We're following basic GitHub Flow. If you have no idea what we're talking about, check out [GitHub's official guide](https://guides.github.com/introduction/flow/). Note that merge is only performed by the repository maintainer. @@ -59,3 +236,5 @@ For example: * Push your changes to your private fork and do "pull-request" to this repository * Use a pull request to do code review * Use issues to keep track of what is going on + +This project has adopted the [Microsoft Open Source Code of Conduct](https://opensource.microsoft.com/codeofconduct/). For more information see the [Code of Conduct FAQ](https://opensource.microsoft.com/codeofconduct/faq/) or contact [opencode@microsoft.com](mailto:opencode@microsoft.com) with any additional questions or comments. diff --git a/ThirdPartyLicenses.txt b/ThirdPartyLicenses.txt index 99bc267e11f..376506337e7 100644 --- a/ThirdPartyLicenses.txt +++ b/ThirdPartyLicenses.txt @@ -976,3 +976,197 @@ Microsoft is offering you a license to use the following components, to the exte * Public License instead of this License. But first, please read * . */ + +4. apt-clean, apt-gzip-indexes, apt-no-languages imported from docker v1.11.1 +/* + * Apache License + * Version 2.0, January 2004 + * https://www.apache.org/licenses/ + * + * TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + * + * 1. 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then + # Version name differs between ARCH, copying same version as in sonic-slave docker + DOCKER_VERSION=18.06.3~ce~3-0~debian +else + DOCKER_VERSION=5:18.09.8~3-0~debian-stretch +fi +LINUX_KERNEL_VERSION=4.9.0-9-2 + ## Working directory to prepare the file system FILESYSTEM_ROOT=./fsroot +PLATFORM_DIR=platform ## Hostname for the linux image -HOSTNAME=acs +HOSTNAME=sonic DEFAULT_USERINFO="Default admin user,,," ## Read ONIE image related config file @@ -55,48 +63,66 @@ DEFAULT_USERINFO="Default admin user,,," ## Prepare the file system directory if [[ -d $FILESYSTEM_ROOT ]]; then - sudo rm -r $FILESYSTEM_ROOT || die "Failed to clean chroot directory" + sudo rm -rf $FILESYSTEM_ROOT || die "Failed to clean chroot directory" fi mkdir -p $FILESYSTEM_ROOT +mkdir -p $FILESYSTEM_ROOT/$PLATFORM_DIR +mkdir -p $FILESYSTEM_ROOT/$PLATFORM_DIR/x86_64-grub +touch $FILESYSTEM_ROOT/$PLATFORM_DIR/firsttime + +## make / as a mountpoint in chroot env, needed by dockerd +pushd $FILESYSTEM_ROOT +sudo mount --bind . . +popd ## Build a basic Debian system by debootstrap echo '[INFO] Debootstrap...' -sudo debootstrap --arch amd64 jessie $FILESYSTEM_ROOT http://ftp.us.debian.org/debian +if [[ $CONFIGURED_ARCH == armhf || $CONFIGURED_ARCH == arm64 ]]; then + # qemu arm bin executable for cross-building + sudo mkdir -p $FILESYSTEM_ROOT/usr/bin + sudo cp /usr/bin/qemu*static $FILESYSTEM_ROOT/usr/bin || true + sudo http_proxy=$http_proxy debootstrap --variant=minbase --arch $CONFIGURED_ARCH stretch $FILESYSTEM_ROOT http://deb.debian.org/debian +else + sudo http_proxy=$http_proxy debootstrap --variant=minbase --arch $CONFIGURED_ARCH stretch $FILESYSTEM_ROOT http://debian-archive.trafficmanager.net/debian +fi ## Config hostname and hosts, otherwise 'sudo ...' will complain 'sudo: unable to resolve host ...' sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo '$HOSTNAME' > /etc/hostname" sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo '127.0.0.1 $HOSTNAME' >> /etc/hosts" +sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo '127.0.0.1 localhost' >> /etc/hosts" ## Config basic fstab sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c 'echo "proc /proc proc defaults 0 0" >> /etc/fstab' sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c 'echo "sysfs /sys sysfs defaults 0 0" >> /etc/fstab' +## Setup proxy +[ -n "$http_proxy" ] && sudo /bin/bash -c "echo 'Acquire::http::Proxy \"$http_proxy\";' > $FILESYSTEM_ROOT/etc/apt/apt.conf.d/01proxy" + ## Note: mounting is necessary to makedev and install linux image echo '[INFO] Mount all' ## Output all the mounted device for troubleshooting mount trap_push 'sudo umount $FILESYSTEM_ROOT/proc || true' sudo LANG=C chroot $FILESYSTEM_ROOT mount proc /proc -t proc -clean_sys() { - sudo umount $FILESYSTEM_ROOT/sys/fs/cgroup/* \ - $FILESYSTEM_ROOT/sys/fs/cgroup \ - $FILESYSTEM_ROOT/sys || true -} -trap_push 'sudo umount $FILESYSTEM_ROOT/sys || true' -sudo LANG=C chroot $FILESYSTEM_ROOT mount sysfs /sys -t sysfs ## Pointing apt to public apt mirrors and getting latest packages, needed for latest security updates -sudo cp files/sources.list $FILESYSTEM_ROOT/etc/apt/ +sudo cp files/apt/sources.list.$CONFIGURED_ARCH $FILESYSTEM_ROOT/etc/apt/sources.list +sudo cp files/apt/apt.conf.d/{81norecommends,apt-{clean,gzip-indexes,no-languages}} $FILESYSTEM_ROOT/etc/apt/apt.conf.d/ +sudo LANG=C chroot $FILESYSTEM_ROOT bash -c 'apt-mark auto `apt-mark showmanual`' ## Note: set lang to prevent locale warnings in your chroot sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y update sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y upgrade echo '[INFO] Install packages for building image' -sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install makedev psmisc +sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install makedev psmisc systemd-sysv ## Create device files echo '[INFO] MAKEDEV' -sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c 'cd /dev && MAKEDEV generic' +if [[ $CONFIGURED_ARCH == armhf || $CONFIGURED_ARCH == arm64 ]]; then + sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c 'cd /dev && MAKEDEV generic-arm' +else + sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c 'cd /dev && MAKEDEV generic' +fi ## Install initramfs-tools and linux kernel ## Note: initramfs-tools recommends depending on busybox, and we really want busybox for ## 1. commands such as touch @@ -104,72 +130,294 @@ sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c 'cd /dev && MAKEDEV generic' ## However, 'dpkg -i' plus 'apt-get install -f' will ignore the recommended dependency. So ## we install busybox explicitly sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install busybox -echo '[INFO] Install ACS linux kernel image' +echo '[INFO] Install SONiC linux kernel image' ## Note: duplicate apt-get command to ensure every line return zero -sudo dpkg --root=$FILESYSTEM_ROOT -i deps/initramfs-tools_*.deb || \ +sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/initramfs-tools-core_*.deb || \ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f -sudo dpkg --root=$FILESYSTEM_ROOT -i deps/linux-image-3.16.0-4-amd64_*.deb || \ +sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/initramfs-tools_*.deb || \ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f - -## Update initramfs for booting with squashfs+aufs +sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/linux-image-${LINUX_KERNEL_VERSION}-*_${CONFIGURED_ARCH}.deb || \ + sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f +sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install acl +[[ $CONFIGURED_ARCH == amd64 ]] && sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install dmidecode + +## Update initramfs for booting with squashfs+overlay cat files/initramfs-tools/modules | sudo tee -a $FILESYSTEM_ROOT/etc/initramfs-tools/modules > /dev/null +## Hook into initramfs: change fs type from vfat to ext4 on arista switches +sudo mkdir -p $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/ +sudo cp files/initramfs-tools/arista-convertfs $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/arista-convertfs +sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/arista-convertfs +sudo cp files/initramfs-tools/arista-hook $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/arista-hook +sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/arista-hook +sudo cp files/initramfs-tools/mke2fs $FILESYSTEM_ROOT/etc/initramfs-tools/hooks/mke2fs +sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/hooks/mke2fs +sudo cp files/initramfs-tools/setfacl $FILESYSTEM_ROOT/etc/initramfs-tools/hooks/setfacl +sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/hooks/setfacl + +# Hook into initramfs: rename the management interfaces on arista switches +sudo cp files/initramfs-tools/arista-net $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/arista-net +sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/arista-net + +# Hook into initramfs: resize root partition after migration from another NOS to SONiC on Dell switches +sudo cp files/initramfs-tools/resize-rootfs $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/resize-rootfs +sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/resize-rootfs + ## Hook into initramfs: after partition mount and loop file mount ## 1. Prepare layered file system -## 2. Bind-mount docker working directory (docker aufs cannot work over aufs rootfs) +## 2. Bind-mount docker working directory (docker overlay storage cannot work over overlay rootfs) sudo cp files/initramfs-tools/union-mount $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-bottom/union-mount sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-bottom/union-mount +sudo cp files/initramfs-tools/varlog $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-bottom/varlog +sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-bottom/varlog +# Management interface (eth0) dhcp can be optionally turned off (during a migration from another NOS to SONiC) +#sudo cp files/initramfs-tools/mgmt-intf-dhcp $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-bottom/mgmt-intf-dhcp +#sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-bottom/mgmt-intf-dhcp sudo cp files/initramfs-tools/union-fsck $FILESYSTEM_ROOT/etc/initramfs-tools/hooks/union-fsck sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/hooks/union-fsck -sudo chroot $FILESYSTEM_ROOT update-initramfs -u +pushd $FILESYSTEM_ROOT/usr/share/initramfs-tools/scripts/init-bottom && sudo patch -p1 < $OLDPWD/files/initramfs-tools/udev.patch; popd + +if [[ $CONFIGURED_ARCH == amd64 ]]; then + ## Install latest intel ixgbe driver + sudo cp $files_path/ixgbe.ko $FILESYSTEM_ROOT/lib/modules/${LINUX_KERNEL_VERSION}-amd64/kernel/drivers/net/ethernet/intel/ixgbe/ixgbe.ko +fi ## Install docker echo '[INFO] Install docker' -curl -sSL https://get.docker.com/ | sudo LANG=C chroot $FILESYSTEM_ROOT sh -## Remove garbage left by docker installation script -sudo rm $FILESYSTEM_ROOT/etc/apt/sources.list.d/docker.list -sudo chroot $FILESYSTEM_ROOT service docker stop -sudo chroot $FILESYSTEM_ROOT service dbus stop -## Add docker config drop-in to select aufs, otherwise it may other storage driver -## Note: $_ means last argument of last command +## Install apparmor utils since they're missing and apparmor is enabled in the kernel +## Otherwise Docker will fail to start +sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install apparmor +sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install apt-transport-https \ + ca-certificates \ + curl \ + gnupg2 \ + software-properties-common +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT curl -o /tmp/docker.gpg -fsSL https://download.docker.com/linux/debian/gpg +sudo LANG=C chroot $FILESYSTEM_ROOT apt-key add /tmp/docker.gpg +sudo LANG=C chroot $FILESYSTEM_ROOT rm /tmp/docker.gpg +sudo LANG=C chroot $FILESYSTEM_ROOT add-apt-repository \ + "deb [arch=$CONFIGURED_ARCH] https://download.docker.com/linux/debian stretch stable" +sudo LANG=C chroot $FILESYSTEM_ROOT apt-get update +sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install docker-ce=${DOCKER_VERSION} +sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y remove software-properties-common gnupg2 + +## Add docker config drop-in to specify dockerd command line sudo mkdir -p $FILESYSTEM_ROOT/etc/systemd/system/docker.service.d/ +## Note: $_ means last argument of last command sudo cp files/docker/docker.service.conf $_ +## Fix systemd race between docker and containerd +sudo sed -i '/After=/s/$/ containerd.service/' $FILESYSTEM_ROOT/lib/systemd/system/docker.service ## Create default user ## Note: user should be in the group with the same name, and also in sudo/docker group sudo LANG=C chroot $FILESYSTEM_ROOT useradd -G sudo,docker $USERNAME -c "$DEFAULT_USERINFO" -m -s /bin/bash ## Create password for the default user -echo $USERNAME:$PASSWORD_ENCRYPTED | sudo LANG=C chroot $FILESYSTEM_ROOT chpasswd -e +echo "$USERNAME:$PASSWORD" | sudo LANG=C chroot $FILESYSTEM_ROOT chpasswd -## Pre-install hardware drivers -sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install \ - firmware-linux-nonfree +if [[ $CONFIGURED_ARCH == amd64 ]]; then + ## Pre-install hardware drivers + sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install \ + firmware-linux-nonfree +fi ## Pre-install the fundamental packages ## Note: gdisk is needed for sgdisk in install.sh ## Note: parted is needed for partprobe in install.sh -sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install \ +## Note: ca-certificates is needed for easy_install +## Note: don't install python-apt by pip, older than Debian repo one +sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install \ + file \ + ifmetric \ + iproute2 \ + bridge-utils \ + isc-dhcp-client \ sudo \ vim \ tcpdump \ + dbus \ ntp \ + ntpstat \ openssh-server \ python \ python-setuptools \ + monit \ python-apt \ + traceroute \ + iputils-ping \ + net-tools \ + bsdmainutils \ + ca-certificates \ + i2c-tools \ + efibootmgr \ + usbutils \ + pciutils \ + iptables-persistent \ + ebtables \ + logrotate \ + curl \ + kexec-tools \ + less \ + unzip \ gdisk \ - parted \ - efibootmgr + sysfsutils \ + squashfs-tools \ + grub2-common \ + rsyslog \ + ethtool \ + screen \ + hping3 \ + python-scapy \ + tcptraceroute \ + mtr-tiny \ + locales \ + cgroup-tools \ + ipmitool \ + ndisc6 \ + makedumpfile + + +if [[ $CONFIGURED_ARCH == amd64 ]]; then +## Pre-install the fundamental packages for amd64 (x86) +sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install \ + flashrom \ + mcelog +fi + +## Set /etc/shadow permissions to -rw-------. +sudo LANG=c chroot $FILESYSTEM_ROOT chmod 600 /etc/shadow + +## Set /etc/passwd, /etc/group permissions to -rw-r--r--. +sudo LANG=c chroot $FILESYSTEM_ROOT chmod 644 /etc/passwd +sudo LANG=c chroot $FILESYSTEM_ROOT chmod 644 /etc/group + +# Needed to install kdump-tools +sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "mkdir -p /etc/initramfs-tools/conf.d" +sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo 'MODULES=most' >> /etc/initramfs-tools/conf.d/driver-policy" + +#Adds a locale to a debian system in non-interactive mode +sudo sed -i '/^#.* en_US.* /s/^#//' $FILESYSTEM_ROOT/etc/locale.gen && \ + sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT locale-gen "en_US.UTF-8" +sudo LANG=en_US.UTF-8 DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT update-locale "LANG=en_US.UTF-8" +sudo LANG=C chroot $FILESYSTEM_ROOT bash -c "find /usr/share/i18n/locales/ ! -name 'en_US' -type f -exec rm -f {} +" + +# Install certain fundamental packages from stretch-backports in order to get +# more up-to-date (but potentially less stable) versions +sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y -t stretch-backports install \ + picocom + +if [[ $CONFIGURED_ARCH == amd64 ]]; then + sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y download \ + grub-pc-bin + + sudo mv $FILESYSTEM_ROOT/grub-pc-bin*.deb $FILESYSTEM_ROOT/$PLATFORM_DIR/x86_64-grub +fi + +## Disable kexec supported reboot which was installed by default +sudo sed -i 's/LOAD_KEXEC=true/LOAD_KEXEC=false/' $FILESYSTEM_ROOT/etc/default/kexec + +## Modifty ntp default configuration: disable initial jump (add -x), and disable +## jump when time difference is greater than 1000 seconds (remove -g). +sudo sed -i "s/NTPD_OPTS='-g'/NTPD_OPTS='-x'/" $FILESYSTEM_ROOT/etc/default/ntp + +## Remove sshd host keys, and will regenerate on first sshd start +sudo rm -f $FILESYSTEM_ROOT/etc/ssh/ssh_host_*_key* +sudo cp files/sshd/host-ssh-keygen.sh $FILESYSTEM_ROOT/usr/local/bin/ +sudo cp -f files/sshd/sshd.service $FILESYSTEM_ROOT/lib/systemd/system/ssh.service +# Config sshd +# 1. Set 'UseDNS' to 'no' +# 2. Configure sshd to close all SSH connetions after 15 minutes of inactivity +sudo augtool -r $FILESYSTEM_ROOT <<'EOF' +touch /files/etc/ssh/sshd_config/EmptyLineHack +rename /files/etc/ssh/sshd_config/EmptyLineHack "" +set /files/etc/ssh/sshd_config/UseDNS no +ins #comment before /files/etc/ssh/sshd_config/UseDNS +set /files/etc/ssh/sshd_config/#comment[following-sibling::*[1][self::UseDNS]] "Disable hostname lookups" + +rm /files/etc/ssh/sshd_config/ClientAliveInterval +rm /files/etc/ssh/sshd_config/ClientAliveCountMax +touch /files/etc/ssh/sshd_config/EmptyLineHack +rename /files/etc/ssh/sshd_config/EmptyLineHack "" +set /files/etc/ssh/sshd_config/ClientAliveInterval 900 +set /files/etc/ssh/sshd_config/ClientAliveCountMax 0 +ins #comment before /files/etc/ssh/sshd_config/ClientAliveInterval +set /files/etc/ssh/sshd_config/#comment[following-sibling::*[1][self::ClientAliveInterval]] "Close inactive client sessions after 15 minutes" +save +quit +EOF +# Configure sshd to listen for v4 connections; disable listening for v6 connections +sudo sed -i 's/^ListenAddress ::/#ListenAddress ::/' $FILESYSTEM_ROOT/etc/ssh/sshd_config +sudo sed -i 's/^#ListenAddress 0.0.0.0/ListenAddress 0.0.0.0/' $FILESYSTEM_ROOT/etc/ssh/sshd_config + +## Config monit +sudo cp files/image_config/monit/monitrc $FILESYSTEM_ROOT/etc/monit/ +sudo chmod 600 $FILESYSTEM_ROOT/etc/monit/monitrc + +## Config sysctl +sudo mkdir -p $FILESYSTEM_ROOT/var/core +sudo augtool --autosave " +set /files/etc/sysctl.conf/kernel.core_pattern '|/usr/bin/coredump-compress %e %t %p' + +set /files/etc/sysctl.conf/kernel.softlockup_panic 1 +set /files/etc/sysctl.conf/kernel.panic 10 +set /files/etc/sysctl.conf/vm.panic_on_oom 2 +set /files/etc/sysctl.conf/fs.suid_dumpable 2 + +set /files/etc/sysctl.conf/net.ipv4.conf.default.forwarding 1 +set /files/etc/sysctl.conf/net.ipv4.conf.all.forwarding 1 +set /files/etc/sysctl.conf/net.ipv4.conf.eth0.forwarding 0 + +set /files/etc/sysctl.conf/net.ipv4.conf.default.arp_accept 0 +set /files/etc/sysctl.conf/net.ipv4.conf.default.arp_announce 0 +set /files/etc/sysctl.conf/net.ipv4.conf.default.arp_filter 0 +set /files/etc/sysctl.conf/net.ipv4.conf.default.arp_notify 0 +set /files/etc/sysctl.conf/net.ipv4.conf.default.arp_ignore 0 +set /files/etc/sysctl.conf/net.ipv4.conf.all.arp_accept 0 +set /files/etc/sysctl.conf/net.ipv4.conf.all.arp_announce 1 +set /files/etc/sysctl.conf/net.ipv4.conf.all.arp_filter 0 +set /files/etc/sysctl.conf/net.ipv4.conf.all.arp_notify 1 +set /files/etc/sysctl.conf/net.ipv4.conf.all.arp_ignore 2 + +set /files/etc/sysctl.conf/net.ipv4.neigh.default.base_reachable_time_ms 1800000 +set /files/etc/sysctl.conf/net.ipv6.neigh.default.base_reachable_time_ms 1800000 + +set /files/etc/sysctl.conf/net.ipv6.conf.default.forwarding 1 +set /files/etc/sysctl.conf/net.ipv6.conf.all.forwarding 1 +set /files/etc/sysctl.conf/net.ipv6.conf.eth0.forwarding 0 + +set /files/etc/sysctl.conf/net.ipv6.conf.default.accept_dad 0 +set /files/etc/sysctl.conf/net.ipv6.conf.all.accept_dad 0 +set /files/etc/sysctl.conf/net.ipv6.conf.eth0.accept_dad 0 + +set /files/etc/sysctl.conf/net.ipv6.conf.default.keep_addr_on_down 1 +set /files/etc/sysctl.conf/net.ipv6.conf.all.keep_addr_on_down 1 +set /files/etc/sysctl.conf/net.ipv6.conf.eth0.keep_addr_on_down 1 + +set /files/etc/sysctl.conf/net.ipv6.conf.eth0.accept_ra_defrtr 0 +set /files/etc/sysctl.conf/net.ipv6.conf.eth0.accept_ra 0 + +set /files/etc/sysctl.conf/net.ipv4.tcp_l3mdev_accept 1 +set /files/etc/sysctl.conf/net.ipv4.udp_l3mdev_accept 1 + +set /files/etc/sysctl.conf/net.core.rmem_max 2097152 +set /files/etc/sysctl.conf/net.core.wmem_max 2097152 +" -r $FILESYSTEM_ROOT + +if [[ $CONFIGURED_ARCH == amd64 ]]; then + # Configure mcelog to log machine checks to syslog + sudo sed -i 's/^#syslog = yes/syslog = yes/' $FILESYSTEM_ROOT/etc/mcelog/mcelog.conf +fi ## docker-py is needed by Ansible docker module -sudo LANG=C chroot $FILESYSTEM_ROOT easy_install pip -sudo LANG=C chroot $FILESYSTEM_ROOT pip install 'docker-py==1.6.0' -## Remove pip which is unnecessary in the base image -sudo LANG=C chroot $FILESYSTEM_ROOT pip uninstall -y pip +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT easy_install pip +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install 'docker-py==1.6.0' +## Note: keep pip installed for maintainance purpose + +## Get gcc and python dev pkgs +sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install gcc libpython2.7-dev +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install 'netifaces==0.10.7' -echo '[INFO] Install apt-transport-sftp package from deps directory' -sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install libssh2-1 -sudo dpkg --root=$FILESYSTEM_ROOT -i deps/apt-transport-sftp_*.deb +## Create /var/run/redis folder for docker-database to mount +sudo mkdir -p $FILESYSTEM_ROOT/var/run/redis ## Config DHCP for eth0 sudo tee -a $FILESYSTEM_ROOT/etc/network/interfaces > /dev/null < /dev/null <> /etc/motd" + sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo 'Running DEBUG image' >> /etc/motd" + sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo '**************' >> /etc/motd" + sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo '/src has the sources' >> /etc/motd" + sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo '/src is mounted in each docker' >> /etc/motd" + sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo '/debug is created for core files or temp files' >> /etc/motd" + sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo 'Create a subdir under /debug to upload your files' >> /etc/motd" + sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo '/debug is mounted in each docker' >> /etc/motd" + + sudo mkdir -p $FILESYSTEM_ROOT/src + sudo cp $DEBUG_SRC_ARCHIVE_FILE $FILESYSTEM_ROOT/src/ + sudo mkdir -p $FILESYSTEM_ROOT/debug + +fi + +## Remove gcc and python dev pkgs +sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y remove gcc libpython2.7-dev + +## Update initramfs +sudo chroot $FILESYSTEM_ROOT update-initramfs -u + ## Clean up apt -sudo LANG=C chroot $FILESYSTEM_ROOT apt-get autoremove +sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y autoremove +sudo LANG=C chroot $FILESYSTEM_ROOT apt-get autoclean sudo LANG=C chroot $FILESYSTEM_ROOT apt-get clean -sudo LANG=C chroot $FILESYSTEM_ROOT rm -rf /tmp/* +sudo LANG=C chroot $FILESYSTEM_ROOT bash -c 'rm -rf /usr/share/doc/* /usr/share/locale/* /var/lib/apt/lists/* /tmp/*' + +## Clean up proxy +[ -n "$http_proxy" ] && sudo rm -f $FILESYSTEM_ROOT/etc/apt/apt.conf.d/01proxy ## Umount all echo '[INFO] Umount all' -sudo LANG=C chroot $FILESYSTEM_ROOT fuser -km /sys || true -sudo LANG=C chroot $FILESYSTEM_ROOT umount -lf /sys +## Display all process details access /proc +sudo LANG=C chroot $FILESYSTEM_ROOT fuser -vm /proc +## Kill the processes sudo LANG=C chroot $FILESYSTEM_ROOT fuser -km /proc || true -sudo LANG=C chroot $FILESYSTEM_ROOT umount /proc +## Wait fuser fully kill the processes +sleep 15 +sudo umount $FILESYSTEM_ROOT/proc || true + +if [[ $CONFIGURED_ARCH == armhf || $CONFIGURED_ARCH == arm64 ]]; then + # Remove qemu arm bin executable used for cross-building + sudo rm -f $FILESYSTEM_ROOT/usr/bin/qemu*static || true + DOCKERFS_PATH=../dockerfs/ +fi ## Prepare empty directory to trigger mount move in initramfs-tools/mount_loop_root, implemented by patching sudo mkdir $FILESYSTEM_ROOT/host ## Compress most file system into squashfs file sudo rm -f $ONIE_INSTALLER_PAYLOAD $FILESYSTEM_SQUASHFS -sudo mksquashfs $FILESYSTEM_ROOT $FILESYSTEM_SQUASHFS -e boot -e var/lib/docker +## Output the file system total size for diag purpose +## Note: -x to skip directories on different file systems, such as /proc +sudo du -hsx $FILESYSTEM_ROOT +sudo mkdir -p $FILESYSTEM_ROOT/var/lib/docker +sudo mksquashfs $FILESYSTEM_ROOT $FILESYSTEM_SQUASHFS -e boot -e var/lib/docker -e $PLATFORM_DIR + +## Compress docker files +pushd $FILESYSTEM_ROOT && sudo tar czf $OLDPWD/$FILESYSTEM_DOCKERFS -C ${DOCKERFS_PATH}var/lib/docker .; popd -## Compress together with /boot and /var/lib/docker as an installer payload zip file -pushd $FILESYSTEM_ROOT && sudo zip $OLDPWD/$ONIE_INSTALLER_PAYLOAD -r boot/ -r var/lib/docker; popd -sudo zip -g $ONIE_INSTALLER_PAYLOAD $FILESYSTEM_SQUASHFS +## Compress together with /boot, /var/lib/docker and $PLATFORM_DIR as an installer payload zip file +pushd $FILESYSTEM_ROOT && sudo zip $OLDPWD/$ONIE_INSTALLER_PAYLOAD -r boot/ $PLATFORM_DIR/; popd +sudo zip -g $ONIE_INSTALLER_PAYLOAD $FILESYSTEM_SQUASHFS $FILESYSTEM_DOCKERFS diff --git a/build_debug_docker_j2.sh b/build_debug_docker_j2.sh new file mode 100755 index 00000000000..3655ac037bd --- /dev/null +++ b/build_debug_docker_j2.sh @@ -0,0 +1,44 @@ +#! /bin/bash + +echo " +FROM $1 + +ARG docker_container_name + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +{% if $2 is defined %} +{% if $2|length %} + +COPY \ +{% for deb in $2.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN dpkg -i \ +{% for deb in $2.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +{% endif %} +{% endif %} + +{% if $3 is defined %} +{% if $3|length %} + +RUN apt-get install -f -y \ +{% for dbg in $3.split(' ') -%} +{{ dbg }}{{' '}} +{%- endfor %} + +{% endif %} +{% endif %} + + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +" diff --git a/build_docker.sh b/build_docker.sh index 1b39ea9ce8e..ec07698d661 100755 --- a/build_docker.sh +++ b/build_docker.sh @@ -1,61 +1,108 @@ #!/bin/bash -## This script is to automate the preparation for docker images for ACS. +## This script is to automate the preparation for docker images for SONiC. ## If registry server and port provided, the images will be pushed there. -## Usage: -## sudo ./build_docker.sh DOCKER_BUILD_DIR [REGISTRY_SERVER REGISTRY_PORT] -set -x -e +set -e -## Dockerfile directory -DOCKER_BUILD_DIR=$1 -REGISTRY_SERVER=$2 -REGISTRY_PORT=$3 -REGISTRY_USERNAME=$4 -REGISTRY_PASSWD=$5 +. ./functions.sh -[ -d "$DOCKER_BUILD_DIR" ] || { - echo "Invalid DOCKER_BUILD_DIR directory" >&2 - exit 1 +usage() { + cat >&2 <&2 + usage + exit 1 + ;; + esac +done +shift "$((OPTIND - 1))" -## File name for docker image -docker_image_gz=$docker_image_name.gz +## Dockerfile directory +DOCKER_BUILD_DIR=dockers/$1 +shift 1 -[ -n "$docker_image_gz" ] || { - echo "Error: Output docker image filename is empty" +[ -f "$DOCKER_BUILD_DIR"/Dockerfile ] || { + echo "Invalid DOCKER_BUILD_DIR directory" >&2 exit 1 } -function cleanup { - rm -rf $DOCKER_BUILD_DIR/files - rm -rf $DOCKER_BUILD_DIR/deps - docker rmi -f $docker_image_name || true +[ -n "$docker_image_name" ] || { + docker_image_name=$(basename $DOCKER_BUILD_DIR) } -trap cleanup exit ## Copy dependencies ## Note: Dockerfile ADD doesn't support reference files outside the folder, so copy it locally -mkdir -p $DOCKER_BUILD_DIR/deps -cp deps/*.deb $DOCKER_BUILD_DIR/deps +if ls deps/* 1>/dev/null 2>&1; then + trap_push "rm -rf $DOCKER_BUILD_DIR/deps" + mkdir -p $DOCKER_BUILD_DIR/deps + cp -r deps/* $DOCKER_BUILD_DIR/deps +fi ## Copy the suggested Debian sources ## ref: https://wiki.debian.org/SourcesList -mkdir -p $DOCKER_BUILD_DIR/files -cp files/sources.list $DOCKER_BUILD_DIR/files -docker build -t $docker_image_name $DOCKER_BUILD_DIR - -if [ -n "$REGISTRY_SERVER" ] && [ -n "$REGISTRY_PORT" ]; then - ## Add registry information as tag, so will push as latest - ## Temporarily add -f option to prevent error message of Docker engine version < 1.10.0 - docker tag -f $docker_image_name $REGISTRY_SERVER:$REGISTRY_PORT/$docker_image_name - - ## Login the docker image registry server - ## Note: user name and password are passed from command line, use fake email address to bypass login check - docker login -u $REGISTRY_USERNAME -p "$REGISTRY_PASSWD" -e "@" $REGISTRY_SERVER:$REGISTRY_PORT - docker push $REGISTRY_SERVER:$REGISTRY_PORT/$docker_image_name +trap_push "rm -rf $DOCKER_BUILD_DIR/deps" +cp -r files $DOCKER_BUILD_DIR/files +docker_try_rmi $docker_image_name + +## Build the docker image +docker build --no-cache -t $docker_image_name $DOCKER_BUILD_DIR +## Get the ID of the built image +## Note: inspect output has quotation characters, so sed to remove it as an argument +image_id=$(docker inspect --format="{{json .Id}}" $docker_image_name | sed -e 's/^"//' -e 's/"$//') + +## Flatten the image by importing an exported container on this image +## Note: it will squash the image with only one layer and lost all metadata such as ENTRYPOINT, +## so apply only to the base image +## TODO: wait docker-squash supporting Docker 1.10+ +## ref: https://github.com/jwilder/docker-squash/issues/45 +if [ "$docker_image_name" = "docker-base" ]; then + ## Run old image in a container + tmp_container=$(docker run -d ${docker_image_name} /bin/bash) + ## Export the container's filesystem, then import as a new image + docker export $tmp_container | docker import - ${docker_image_name} + ## Remove the container + docker rm -f $tmp_container || true + ## Remove the old image + docker rmi -f $image_id || true fi -docker save $docker_image_name | gzip -c > $docker_image_gz +## Save the docker image in a gz file +mkdir -p target +docker save $docker_image_name | gzip -c > target/$docker_image_name.gz + +if [ -n "$1" ]; then + ./push_docker.sh target/$docker_image_name.gz $@ $docker_image_tag +fi diff --git a/build_image.sh b/build_image.sh index 34e5d783956..9635201ae06 100755 --- a/build_image.sh +++ b/build_image.sh @@ -1,8 +1,19 @@ #!/bin/bash ## This script is to generate an ONIE installer image based on a file system overload +## Enable debug output for script +set -x -e + ## Read ONIE image related config file -. ./onie-image.conf + +CONFIGURED_ARCH=$([ -f .arch ] && cat .arch || echo amd64) + +if [[ $CONFIGURED_ARCH == armhf || $CONFIGURED_ARCH == arm64 ]]; then + . ./onie-image-${CONFIGURED_ARCH}.conf +else + . ./onie-image.conf +fi + [ -n "$ONIE_IMAGE_PART_SIZE" ] || { echo "Error: Invalid ONIE_IMAGE_PART_SIZE in onie image config file" exit 1 @@ -12,33 +23,127 @@ exit 1 } -## Retrieval short version of Git revision hash for partition metadata -[ -z $(git status --untracked-files=no -s) ] || { - echo "Error: There is local changes not committed to git repo. Cannot get a revision hash for partition metadata." - exit 1 -} -GIT_REVISION=$(git rev-parse --short HEAD) +IMAGE_VERSION=$(. functions.sh && sonic_get_version) + +generate_onie_installer_image() +{ + # Copy platform-specific ONIE installer config files where onie-mk-demo.sh expects them + rm -rf ./installer/x86_64/platforms/ + mkdir -p ./installer/x86_64/platforms/ + for VENDOR in `ls ./device`; do + for PLATFORM in `ls ./device/$VENDOR`; do + if [ -f ./device/$VENDOR/$PLATFORM/installer.conf ]; then + cp ./device/$VENDOR/$PLATFORM/installer.conf ./installer/x86_64/platforms/$PLATFORM + fi + + done + done -sudo rm -f $OUTPUT_ONIE_IMAGE -if [ "$TARGET_MACHINE" = "generic" ]; then ## Generate an ONIE installer image ## Note: Don't leave blank between lines. It is single line command. - CONSOLE_SPEED=9600 \ - CONSOLE_DEV=0 \ - CONSOLE_FLAG=0 \ - CONSOLE_PORT=0x3f8 \ ./onie-mk-demo.sh $TARGET_PLATFORM $TARGET_MACHINE $TARGET_PLATFORM-$TARGET_MACHINE-$ONIEIMAGE_VERSION \ - installer $TARGET_MACHINE/platform.conf $OUTPUT_ONIE_IMAGE OS $GIT_REVISION $ONIE_IMAGE_PART_SIZE \ + installer platform/$TARGET_MACHINE/platform.conf $OUTPUT_ONIE_IMAGE OS $IMAGE_VERSION $ONIE_IMAGE_PART_SIZE \ $ONIE_INSTALLER_PAYLOAD +} + +if [ "$IMAGE_TYPE" = "onie" ]; then + echo "Build ONIE installer" + mkdir -p `dirname $OUTPUT_ONIE_IMAGE` + sudo rm -f $OUTPUT_ONIE_IMAGE + + generate_onie_installer_image + +## Build a raw partition dump image using the ONIE installer that can be +## used to dd' in-lieu of using the onie-nos-installer. Used while migrating +## into SONiC from other NOS. +elif [ "$IMAGE_TYPE" = "raw" ]; then + + echo "Build RAW image" + mkdir -p `dirname $OUTPUT_RAW_IMAGE` + sudo rm -f $OUTPUT_RAW_IMAGE + + generate_onie_installer_image + + echo "Creating SONiC raw partition : $OUTPUT_RAW_IMAGE of size $RAW_IMAGE_DISK_SIZE MB" + fallocate -l "$RAW_IMAGE_DISK_SIZE"M $OUTPUT_RAW_IMAGE + + ## Generate a partition dump that can be used to 'dd' in-lieu of using the onie-nos-installer + ## Run the installer + ## The 'build' install mode of the installer is used to generate this dump. + sudo chmod a+x $OUTPUT_ONIE_IMAGE + sudo ./$OUTPUT_ONIE_IMAGE + + [ -r $OUTPUT_RAW_IMAGE ] || { + echo "Error : $OUTPUT_RAW_IMAGE not generated!" + exit 1 + } + + gzip $OUTPUT_RAW_IMAGE + + [ -r $OUTPUT_RAW_IMAGE.gz ] || { + echo "Error : gzip $OUTPUT_RAW_IMAGE failed!" + exit 1 + } + + mv $OUTPUT_RAW_IMAGE.gz $OUTPUT_RAW_IMAGE + echo "The compressed raw image is in $OUTPUT_RAW_IMAGE" + +elif [ "$IMAGE_TYPE" = "kvm" ]; then + + echo "Build KVM image" + KVM_IMAGE_DISK=${OUTPUT_KVM_IMAGE%.gz} + sudo rm -f $KVM_IMAGE_DISK $KVM_IMAGE_DISK.gz + + generate_onie_installer_image + + SONIC_USERNAME=$USERNAME PASSWD=$PASSWORD sudo -E ./scripts/build_kvm_image.sh $KVM_IMAGE_DISK $onie_recovery_image $OUTPUT_ONIE_IMAGE $KVM_IMAGE_DISK_SIZE + + if [ $? -ne 0 ]; then + echo "Error : build kvm image failed" + exit 1 + fi + + [ -r $KVM_IMAGE_DISK ] || { + echo "Error : $KVM_IMAGE_DISK not generated!" + exit 1 + } + + gzip $KVM_IMAGE_DISK + + [ -r $KVM_IMAGE_DISK.gz ] || { + echo "Error : gzip $KVM_IMAGE_DISK failed!" + exit 1 + } + + echo "The compressed kvm image is in $KVM_IMAGE_DISK.gz" + ## Use 'aboot' as target machine category which includes Aboot as bootloader -elif [ "$TARGET_MACHINE" = "aboot" ]; then - ## Add Aboot boot0 file into the image - cp $ONIE_INSTALLER_PAYLOAD $OUTPUT_ONIE_IMAGE - pushd files/Aboot && sudo zip -g $OLDPWD/$OUTPUT_ONIE_IMAGE boot0; popd - echo "$GIT_REVISION" >> .imagehash - zip -g $OUTPUT_ONIE_IMAGE .imagehash +elif [ "$IMAGE_TYPE" = "aboot" ]; then + echo "Build Aboot installer" + mkdir -p `dirname $OUTPUT_ABOOT_IMAGE` + sudo rm -f $OUTPUT_ABOOT_IMAGE + sudo rm -f $ABOOT_BOOT_IMAGE + ## Add main payload + cp $ONIE_INSTALLER_PAYLOAD $OUTPUT_ABOOT_IMAGE + ## Add Aboot boot0 file + j2 -f env files/Aboot/boot0.j2 ./onie-image.conf > files/Aboot/boot0 + sed -i -e "s/%%IMAGE_VERSION%%/$IMAGE_VERSION/g" files/Aboot/boot0 + pushd files/Aboot && zip -g $OLDPWD/$OUTPUT_ABOOT_IMAGE boot0; popd + pushd files/Aboot && zip -g $OLDPWD/$ABOOT_BOOT_IMAGE boot0; popd + echo "$IMAGE_VERSION" >> .imagehash + zip -g $OUTPUT_ABOOT_IMAGE .imagehash + zip -g $ABOOT_BOOT_IMAGE .imagehash rm .imagehash + echo "SWI_VERSION=42.0.0" > version + echo "SWI_MAX_HWEPOCH=2" >> version + echo "SWI_VARIANT=US" >> version + zip -g $OUTPUT_ABOOT_IMAGE version + zip -g $ABOOT_BOOT_IMAGE version + rm version + + zip -g $OUTPUT_ABOOT_IMAGE $ABOOT_BOOT_IMAGE + rm $ABOOT_BOOT_IMAGE else - echo "Error: Non supported target platform: $TARGET_PLATFORM" + echo "Error: Non supported image type $IMAGE_TYPE" exit 1 fi diff --git a/check_install.py b/check_install.py new file mode 100755 index 00000000000..09979f61e4b --- /dev/null +++ b/check_install.py @@ -0,0 +1,58 @@ +#!/usr/bin/env python + +import pexpect +import argparse +import sys +import time + +def main(): + + parser = argparse.ArgumentParser(description='test_login cmdline parser') + parser.add_argument('-u', default="admin", help='login user name') + parser.add_argument('-P', default="YourPaSsWoRd", help='login password') + parser.add_argument('-p', type=int, default=9000, help='local port') + + args = parser.parse_args() + + KEY_UP = '\x1b[A' + KEY_DOWN = '\x1b[B' + KEY_RIGHT = '\x1b[C' + KEY_LEFT = '\x1b[D' + + login_prompt = 'sonic login:' + passwd_prompt = 'Password:' + cmd_prompt = "%s@sonic:~\$ $" % args.u + grub_selection = "The highlighted entry will be executed" + + p = pexpect.spawn("telnet 127.0.0.1 %s" % args.p, timeout=600, logfile=sys.stdout) + + # select ONIE embed + p.expect(grub_selection) + p.sendline(KEY_DOWN) + + # install sonic image + while True: + i = p.expect([login_prompt, passwd_prompt, grub_selection, cmd_prompt]) + if i == 0: + # send user name + p.sendline(args.u) + elif i == 1: + # send password + p.sendline(args.P) + elif i == 2: + # select onie install + p.sendline() + else: + break + + # check version + time.sleep(5) + p.sendline('show version') + p.expect([cmd_prompt]) + p.sendline('show ip bgp sum') + p.expect([cmd_prompt]) + p.sendline('sync') + p.expect([cmd_prompt]) + +if __name__ == '__main__': + main() diff --git a/device/accton/x86_64-accton_as4630_54pe-r0/Accton-AS4630-54PE/hx5-as4630-48x1G+4x25G+2x100G.bcm b/device/accton/x86_64-accton_as4630_54pe-r0/Accton-AS4630-54PE/hx5-as4630-48x1G+4x25G+2x100G.bcm new file mode 100755 index 00000000000..a7f89ba4c62 --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54pe-r0/Accton-AS4630-54PE/hx5-as4630-48x1G+4x25G+2x100G.bcm @@ -0,0 +1,486 @@ +stable_size=71303168 + +#polarity/lanemap is using TH2 style. +core_clock_frequency=893 +dpp_clock_ratio=2:3 + +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 + +#oversubscribe_mode=1 + +pbmp_xport_xe=0x1FFFFFFE000000000000 + +parity_enable=0 +mem_cache_enable=1 + +l2_mem_entries=32768 +#l3_mem_entries=49152 +#fpem_mem_entries=16384 +l2xmsg_mode=1 +port_flex_enable=1 + +#3x PM4x10Q (3 * 16 = 48 physical ports) +#Doesn't support oversubscribe in Q mode +#MCQ0 +port_gmii_mode_1=1 #Q mode + +#PHY4 U56 xx1, MDC/MDIO2, PHYADDR:0x00-0x07, 0x08 +port_phy_addr_1=0x40 +port_phy_addr_2=0x41 +port_phy_addr_3=0x42 +port_phy_addr_4=0x43 +port_phy_addr_5=0x44 +port_phy_addr_6=0x45 +port_phy_addr_7=0x46 +port_phy_addr_8=0x47 +phy_port_primary_and_offset_1=0x0100 +phy_port_primary_and_offset_2=0x0101 +phy_port_primary_and_offset_3=0x0102 +phy_port_primary_and_offset_4=0x0103 +phy_port_primary_and_offset_5=0x0104 +phy_port_primary_and_offset_6=0x0105 +phy_port_primary_and_offset_7=0x0106 +phy_port_primary_and_offset_8=0x0107 +dport_map_port_1=26 +dport_map_port_2=25 +dport_map_port_3=28 +dport_map_port_4=27 +dport_map_port_5=30 +dport_map_port_6=29 +dport_map_port_7=32 +dport_map_port_8=31 +portmap_1=1:1 +portmap_2=2:1 +portmap_3=3:1 +portmap_4=4:1 +portmap_5=5:1 +portmap_6=6:1 +portmap_7=7:1 +portmap_8=8:1 +phy_chain_rx_lane_map_physical{1.0}=0x3210 +phy_chain_rx_lane_map_physical{2.0}=0x3210 +phy_chain_rx_lane_map_physical{3.0}=0x3210 +phy_chain_rx_lane_map_physical{4.0}=0x3210 +phy_chain_rx_lane_map_physical{5.0}=0x3210 +phy_chain_rx_lane_map_physical{6.0}=0x3210 +phy_chain_rx_lane_map_physical{7.0}=0x3210 +phy_chain_rx_lane_map_physical{8.0}=0x3210 +phy_chain_tx_lane_map_physical{1.0}=0x3210 +phy_chain_tx_lane_map_physical{2.0}=0x3210 +phy_chain_tx_lane_map_physical{3.0}=0x3210 +phy_chain_tx_lane_map_physical{4.0}=0x3210 +phy_chain_tx_lane_map_physical{5.0}=0x3210 +phy_chain_tx_lane_map_physical{6.0}=0x3210 +phy_chain_tx_lane_map_physical{7.0}=0x3210 +phy_chain_tx_lane_map_physical{8.0}=0x3210 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x0 + + +#PHY5 U57 x1x, MDC/MDIO2, PHYADDR:0x09-0x10, 0x11 +port_phy_addr_9=0x49 +port_phy_addr_10=0x4A +port_phy_addr_11=0x4B +port_phy_addr_12=0x4C +port_phy_addr_13=0x4D +port_phy_addr_14=0x4E +port_phy_addr_15=0x4F +port_phy_addr_16=0x50 +phy_port_primary_and_offset_9=0x0900 +phy_port_primary_and_offset_10=0x0901 +phy_port_primary_and_offset_11=0x0902 +phy_port_primary_and_offset_12=0x0903 +phy_port_primary_and_offset_13=0x0904 +phy_port_primary_and_offset_14=0x0905 +phy_port_primary_and_offset_15=0x0906 +phy_port_primary_and_offset_16=0x0907 +dport_map_port_9=34 +dport_map_port_10=33 +dport_map_port_11=36 +dport_map_port_12=35 +dport_map_port_13=38 +dport_map_port_14=37 +dport_map_port_15=40 +dport_map_port_16=39 +portmap_9=9:1 +portmap_10=10:1 +portmap_11=11:1 +portmap_12=12:1 +portmap_13=13:1 +portmap_14=14:1 +portmap_15=15:1 +portmap_16=16:1 +phy_chain_rx_lane_map_physical{9.0}=0x3210 +phy_chain_rx_lane_map_physical{10.0}=0x3210 +phy_chain_rx_lane_map_physical{11.0}=0x3210 +phy_chain_rx_lane_map_physical{12.0}=0x3210 +phy_chain_rx_lane_map_physical{13.0}=0x3210 +phy_chain_rx_lane_map_physical{14.0}=0x3210 +phy_chain_rx_lane_map_physical{15.0}=0x3210 +phy_chain_rx_lane_map_physical{16.0}=0x3210 +phy_chain_tx_lane_map_physical{9.0}=0x3210 +phy_chain_tx_lane_map_physical{10.0}=0x3210 +phy_chain_tx_lane_map_physical{11.0}=0x3210 +phy_chain_tx_lane_map_physical{12.0}=0x3210 +phy_chain_tx_lane_map_physical{13.0}=0x3210 +phy_chain_tx_lane_map_physical{14.0}=0x3210 +phy_chain_tx_lane_map_physical{15.0}=0x3210 +phy_chain_tx_lane_map_physical{16.0}=0x3210 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 + +#MCQ1 +port_gmii_mode_17=1 #Q mode + +#PHY6 U58 11x, MDC/MDIO2, PHYADDR:0x12-0x19, 0x1A +port_phy_addr_17=0x52 +port_phy_addr_18=0x53 +port_phy_addr_19=0x54 +port_phy_addr_20=0x55 +port_phy_addr_21=0x56 +port_phy_addr_22=0x57 +port_phy_addr_23=0x58 +port_phy_addr_24=0x59 +phy_port_primary_and_offset_17=0x1100 +phy_port_primary_and_offset_18=0x1101 +phy_port_primary_and_offset_19=0x1102 +phy_port_primary_and_offset_20=0x1103 +phy_port_primary_and_offset_21=0x1104 +phy_port_primary_and_offset_22=0x1105 +phy_port_primary_and_offset_23=0x1106 +phy_port_primary_and_offset_24=0x1107 +dport_map_port_17=42 +dport_map_port_18=41 +dport_map_port_19=44 +dport_map_port_20=43 +dport_map_port_21=46 +dport_map_port_22=45 +dport_map_port_23=48 +dport_map_port_24=47 +portmap_17=17:1 +portmap_18=18:1 +portmap_19=19:1 +portmap_20=20:1 +portmap_21=21:1 +portmap_22=22:1 +portmap_23=23:1 +portmap_24=24:1 +phy_chain_rx_lane_map_physical{17.0}=0x3210 +phy_chain_rx_lane_map_physical{18.0}=0x3210 +phy_chain_rx_lane_map_physical{19.0}=0x3210 +phy_chain_rx_lane_map_physical{20.0}=0x3210 +phy_chain_rx_lane_map_physical{21.0}=0x3210 +phy_chain_rx_lane_map_physical{22.0}=0x3210 +phy_chain_rx_lane_map_physical{23.0}=0x3210 +phy_chain_rx_lane_map_physical{24.0}=0x3210 +phy_chain_tx_lane_map_physical{17.0}=0x3210 +phy_chain_tx_lane_map_physical{18.0}=0x3210 +phy_chain_tx_lane_map_physical{19.0}=0x3210 +phy_chain_tx_lane_map_physical{20.0}=0x3210 +phy_chain_tx_lane_map_physical{21.0}=0x3210 +phy_chain_tx_lane_map_physical{22.0}=0x3210 +phy_chain_tx_lane_map_physical{23.0}=0x3210 +phy_chain_tx_lane_map_physical{24.0}=0x3210 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 + +#PHY1 U53 xx1, MDC/MDIO0, PHYADDR:0x00-0x07, 0x08 +port_phy_addr_25=0x00 +port_phy_addr_26=0x01 +port_phy_addr_27=0x02 +port_phy_addr_28=0x03 +port_phy_addr_29=0x04 +port_phy_addr_30=0x05 +port_phy_addr_31=0x06 +port_phy_addr_32=0x07 +phy_port_primary_and_offset_25=0x1900 +phy_port_primary_and_offset_26=0x1901 +phy_port_primary_and_offset_27=0x1902 +phy_port_primary_and_offset_28=0x1903 +phy_port_primary_and_offset_29=0x1904 +phy_port_primary_and_offset_30=0x1905 +phy_port_primary_and_offset_31=0x1906 +phy_port_primary_and_offset_32=0x1907 +dport_map_port_25=2 +dport_map_port_26=1 +dport_map_port_27=4 +dport_map_port_28=3 +dport_map_port_29=6 +dport_map_port_30=5 +dport_map_port_31=8 +dport_map_port_32=7 +portmap_25=25:1 +portmap_26=26:1 +portmap_27=27:1 +portmap_28=28:1 +portmap_29=29:1 +portmap_30=30:1 +portmap_31=31:1 +portmap_32=32:1 +phy_chain_rx_lane_map_physical{25.0}=0x3210 +phy_chain_rx_lane_map_physical{26.0}=0x3210 +phy_chain_rx_lane_map_physical{27.0}=0x3210 +phy_chain_rx_lane_map_physical{28.0}=0x3210 +phy_chain_rx_lane_map_physical{29.0}=0x3210 +phy_chain_rx_lane_map_physical{30.0}=0x3210 +phy_chain_rx_lane_map_physical{31.0}=0x3210 +phy_chain_rx_lane_map_physical{32.0}=0x3210 +phy_chain_tx_lane_map_physical{25.0}=0x3210 +phy_chain_tx_lane_map_physical{26.0}=0x3210 +phy_chain_tx_lane_map_physical{27.0}=0x3210 +phy_chain_tx_lane_map_physical{28.0}=0x3210 +phy_chain_tx_lane_map_physical{29.0}=0x3210 +phy_chain_tx_lane_map_physical{30.0}=0x3210 +phy_chain_tx_lane_map_physical{31.0}=0x3210 +phy_chain_tx_lane_map_physical{32.0}=0x3210 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 + +#MCQ2 +port_gmii_mode_33=1 #Q mode + +#PHY2 U54 x1x, MDC/MDIO0, PHYADDR:0x09-0x10, 0x11 +port_phy_addr_33=0x0D +port_phy_addr_34=0x0E +port_phy_addr_35=0x0F +port_phy_addr_36=0x10 +port_phy_addr_37=0x09 +port_phy_addr_38=0x0A +port_phy_addr_39=0x0B +port_phy_addr_40=0x0C +phy_port_primary_and_offset_33=0x2504 +phy_port_primary_and_offset_34=0x2505 +phy_port_primary_and_offset_35=0x2506 +phy_port_primary_and_offset_36=0x2507 +phy_port_primary_and_offset_37=0x2500 +phy_port_primary_and_offset_38=0x2501 +phy_port_primary_and_offset_39=0x2502 +phy_port_primary_and_offset_40=0x2503 +dport_map_port_33=14 +dport_map_port_34=13 +dport_map_port_35=16 +dport_map_port_36=15 +dport_map_port_37=10 +dport_map_port_38=9 +dport_map_port_39=12 +dport_map_port_40=11 +portmap_33=33:1 +portmap_34=34:1 +portmap_35=35:1 +portmap_36=36:1 +portmap_37=37:1 +portmap_38=38:1 +portmap_39=39:1 +portmap_40=40:1 +phy_chain_rx_lane_map_physical{33.0}=0x3210 +phy_chain_rx_lane_map_physical{34.0}=0x3210 +phy_chain_rx_lane_map_physical{35.0}=0x3210 +phy_chain_rx_lane_map_physical{36.0}=0x3210 +phy_chain_rx_lane_map_physical{37.0}=0x3210 +phy_chain_rx_lane_map_physical{38.0}=0x3210 +phy_chain_rx_lane_map_physical{39.0}=0x3210 +phy_chain_rx_lane_map_physical{40.0}=0x3210 +phy_chain_tx_lane_map_physical{33.0}=0x3210 +phy_chain_tx_lane_map_physical{34.0}=0x3210 +phy_chain_tx_lane_map_physical{35.0}=0x3210 +phy_chain_tx_lane_map_physical{36.0}=0x3210 +phy_chain_tx_lane_map_physical{37.0}=0x3210 +phy_chain_tx_lane_map_physical{38.0}=0x3210 +phy_chain_tx_lane_map_physical{39.0}=0x3210 +phy_chain_tx_lane_map_physical{40.0}=0x3210 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x1 + +#PHY3 U55 11x, MDC/MDIO0, PHYADDR:0x12-0x19, 0x1A +port_phy_addr_41=0x16 +port_phy_addr_42=0x17 +port_phy_addr_43=0x18 +port_phy_addr_44=0x19 +port_phy_addr_45=0x12 +port_phy_addr_46=0x13 +port_phy_addr_47=0x14 +port_phy_addr_48=0x15 +phy_port_primary_and_offset_41=0x2D00 +phy_port_primary_and_offset_42=0x2D01 +phy_port_primary_and_offset_43=0x2D02 +phy_port_primary_and_offset_44=0x2D03 +phy_port_primary_and_offset_45=0x2D04 +phy_port_primary_and_offset_46=0x2D05 +phy_port_primary_and_offset_47=0x2D06 +phy_port_primary_and_offset_48=0x2D07 +dport_map_port_41=22 +dport_map_port_42=21 +dport_map_port_43=24 +dport_map_port_44=23 +dport_map_port_45=18 +dport_map_port_46=17 +dport_map_port_47=20 +dport_map_port_48=19 +portmap_41=41:1 +portmap_42=42:1 +portmap_43=43:1 +portmap_44=44:1 +portmap_45=45:1 +portmap_46=46:1 +portmap_47=47:1 +portmap_48=48:1 +phy_chain_rx_lane_map_physical{41.0}=0x3210 +phy_chain_rx_lane_map_physical{42.0}=0x3210 +phy_chain_rx_lane_map_physical{43.0}=0x3210 +phy_chain_rx_lane_map_physical{44.0}=0x3210 +phy_chain_rx_lane_map_physical{45.0}=0x3210 +phy_chain_rx_lane_map_physical{46.0}=0x3210 +phy_chain_rx_lane_map_physical{47.0}=0x3210 +phy_chain_rx_lane_map_physical{48.0}=0x3210 +phy_chain_tx_lane_map_physical{41.0}=0x3210 +phy_chain_tx_lane_map_physical{42.0}=0x3210 +phy_chain_tx_lane_map_physical{43.0}=0x3210 +phy_chain_tx_lane_map_physical{44.0}=0x3210 +phy_chain_tx_lane_map_physical{45.0}=0x3210 +phy_chain_tx_lane_map_physical{46.0}=0x3210 +phy_chain_tx_lane_map_physical{47.0}=0x3210 +phy_chain_tx_lane_map_physical{48.0}=0x3210 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x1 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 + +#3x PM4x25 (3 * 4 = 12 physical ports) +#FC0 +dport_map_port_49=51 +dport_map_port_50=50 +dport_map_port_51=49 +dport_map_port_52=52 +portmap_49=65:25 +portmap_50=66:25 +portmap_51=67:25 +portmap_52=68:25 +#FC1 +dport_map_port_53=57 +dport_map_port_54=58 +dport_map_port_55=59 +dport_map_port_56=60 +portmap_53=69:100:4 +#portmap_55=71:50 +#portmap_54=70:25 +#portmap_55=71:25 +#portmap_56=72:25 +#FC2 +dport_map_port_57=53 +dport_map_port_58=54 +dport_map_port_59=55 +dport_map_port_60=56 +portmap_57=73:100:4 +#portmap_59=75:50 +#portmap_58=74:25 +#portmap_59=75:25 +#portmap_60=76:25 + +#4x PM4x10 (4 * 4 = 16 physical ports) +#MC0 No connection +#MC1 No connection +#MC2 No connection +#MC3 No connection +#portmap_=49:10 +#portmap_=50:10 +#portmap_=51:10 +#portmap_=52:10 + +#portmap_=53:10 +#portmap_=54:10 +#portmap_=55:10 +#portmap_=56:10 + +#portmap_=57:10 +#portmap_=58:10 +#portmap_=59:10 +#portmap_=60:10 + +#portmap_=61:10 +#portmap_=62:10 +#portmap_=63:10 +#portmap_=64:10 diff --git a/device/accton/x86_64-accton_as4630_54pe-r0/Accton-AS4630-54PE/port_config.ini b/device/accton/x86_64-accton_as4630_54pe-r0/Accton-AS4630-54PE/port_config.ini new file mode 100755 index 00000000000..aabb372bf64 --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54pe-r0/Accton-AS4630-54PE/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias index speed +Ethernet0 26 thousandE1 1 1000 +Ethernet1 25 thousandE2 2 1000 +Ethernet2 28 thousandE3 3 1000 +Ethernet3 27 thousandE4 4 1000 +Ethernet4 30 thousandE5 5 1000 +Ethernet5 29 thousandE6 6 1000 +Ethernet6 32 thousandE7 7 1000 +Ethernet7 31 thousandE8 8 1000 +Ethernet8 38 thousandE9 9 1000 +Ethernet9 37 thousandE10 10 1000 +Ethernet10 40 thousandE11 11 1000 +Ethernet11 39 thousandE12 12 1000 +Ethernet12 34 thousandE13 13 1000 +Ethernet13 33 thousandE14 14 1000 +Ethernet14 36 thousandE15 15 1000 +Ethernet15 35 thousandE16 16 1000 +Ethernet16 46 thousandE17 17 1000 +Ethernet17 45 thousandE18 18 1000 +Ethernet18 48 thousandE19 19 1000 +Ethernet19 47 thousandE20 20 1000 +Ethernet20 42 thousandE21 21 1000 +Ethernet21 41 thousandE22 22 1000 +Ethernet22 44 thousandE23 23 1000 +Ethernet23 43 thousandE24 24 1000 +Ethernet24 2 thousandE25 25 1000 +Ethernet25 1 thousandE26 26 1000 +Ethernet26 4 thousandE27 27 1000 +Ethernet27 3 thousandE28 28 1000 +Ethernet28 6 thousandE29 29 1000 +Ethernet29 5 thousandE30 30 1000 +Ethernet30 8 thousandE31 31 1000 +Ethernet31 7 thousandE32 32 1000 +Ethernet32 10 thousandE33 33 1000 +Ethernet33 9 thousandE34 34 1000 +Ethernet34 12 thousandE35 35 1000 +Ethernet35 11 thousandE36 36 1000 +Ethernet36 14 thousandE37 37 1000 +Ethernet37 13 thousandE38 38 1000 +Ethernet38 16 thousandE39 39 1000 +Ethernet39 15 thousandE40 40 1000 +Ethernet40 18 thousandE41 41 1000 +Ethernet41 17 thousandE42 42 1000 +Ethernet42 20 thousandE43 43 1000 +Ethernet43 19 thousandE44 44 1000 +Ethernet44 22 thousandE45 45 1000 +Ethernet45 21 thousandE46 46 1000 +Ethernet46 24 thousandE47 47 1000 +Ethernet47 23 thousandE48 48 1000 +Ethernet48 67 twentyfiveGigE49 49 25000 +Ethernet49 66 twentyfiveGigE50 50 25000 +Ethernet50 65 twentyfiveGigE51 51 25000 +Ethernet51 68 twentyfiveGigE52 52 25000 +Ethernet52 73,74,75,76 hundredGigE53 53 100000 +Ethernet56 69,70,71,72 hundredGigE54 54 100000 diff --git a/device/accton/x86_64-accton_as4630_54pe-r0/Accton-AS4630-54PE/sai.profile b/device/accton/x86_64-accton_as4630_54pe-r0/Accton-AS4630-54PE/sai.profile new file mode 100755 index 00000000000..5329410fe8b --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54pe-r0/Accton-AS4630-54PE/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/hx5-as4630-48x1G+4x25G+2x100G.bcm diff --git a/device/accton/x86_64-accton_as4630_54pe-r0/default_sku b/device/accton/x86_64-accton_as4630_54pe-r0/default_sku new file mode 100755 index 00000000000..64e4213bdc7 --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54pe-r0/default_sku @@ -0,0 +1 @@ +Accton-AS4630-54PE t1 diff --git a/device/accton/x86_64-accton_as4630_54pe-r0/installer.conf b/device/accton/x86_64-accton_as4630_54pe-r0/installer.conf new file mode 100755 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54pe-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/accton/x86_64-accton_as4630_54pe-r0/led_proc_init.soc b/device/accton/x86_64-accton_as4630_54pe-r0/led_proc_init.soc new file mode 100755 index 00000000000..4fa004f5d13 --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54pe-r0/led_proc_init.soc @@ -0,0 +1,2 @@ +led start +led auto on diff --git a/device/accton/x86_64-accton_as4630_54pe-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as4630_54pe-r0/plugins/eeprom.py new file mode 100755 index 00000000000..0d7def70fdc --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54pe-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as4630_54pe-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as4630_54pe-r0/plugins/psuutil.py new file mode 100755 index 00000000000..a646981334e --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54pe-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 1: "10-0050", + 2: "11-0051", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as4630_54pe-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as4630_54pe-r0/plugins/sfputil.py new file mode 100755 index 00000000000..cb18eb0d540 --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54pe-r0/plugins/sfputil.py @@ -0,0 +1,196 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import sys + import time + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +SFP_STATUS_INSERTED = '1' +SFP_STATUS_REMOVED = '0' + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 49 + PORT_END = 54 + PORTS_IN_BLOCK = 54 + QSFP_START = 53 + + BASE_OOM_PATH = "/sys/bus/i2c/devices/{0}-0050/" + BASE_CPLD_PATH = "/sys/bus/i2c/devices/3-0060/" + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 49: [18], + 50: [19], + 51: [20], + 52: [21], + 53: [22], + 54: [23], + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = self.BASE_OOM_PATH + "eeprom" + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x][0]) + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + present_path = self.BASE_CPLD_PATH + "module_present_" + str(port_num) + self.__port_to_is_present = present_path + + try: + val_file = open(self.__port_to_is_present) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.QSFP_START or port_num > self.port_end: + return False + + try: + eeprom = None + if not self.get_presence(port_num): + return False + eeprom = open(self.port_to_eeprom_mapping[port_num], "rb") + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + # if "Power override" bit is 1 and "Power set" bit is 1 + if ((lpmode & 0x3) == 0x3): + return True + + # High Power Mode if one of the following conditions is matched: + # 1. "Power override" bit is 0 + # 2. "Power override" bit is 1 and "Power set" bit is 0 + else: + return False + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.QSFP_START or port_num > self.port_end: + return False + + try: + eeprom = None + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + # 0x3:Low Power Mode, 0x1:High Power Mode + regval = 0x3 if lpmode else 0x1 + + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b") + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def reset(self, port_num): + raise NotImplementedError + + @property + def _get_presence_bitmap(self): + + bits = [] + for x in range(self.port_start, self.port_end+1): + bits.append(str(int(self.get_presence(x)))) + + rev = "".join(bits[::-1]) + return int(rev,2) + + data = {'present':0} + def get_transceiver_change_event(self, timeout=0): + port_dict = {} + + if timeout == 0: + cd_ms = sys.maxint + else: + cd_ms = timeout + + #poll per second + while cd_ms > 0: + reg_value = self._get_presence_bitmap + changed_ports = self.data['present'] ^ reg_value + if changed_ports != 0: + break + time.sleep(1) + cd_ms = cd_ms - 1000 + + if changed_ports != 0: + for port in range (self.port_start, self.port_end+1): + # Mask off the bit corresponding to our port + mask = (1 << (port - self.port_start)) + if changed_ports & mask: + if (reg_value & mask) == 0: + port_dict[port] = SFP_STATUS_REMOVED + else: + port_dict[port] = SFP_STATUS_INSERTED + + # Update cache + self.data['present'] = reg_value + return True, port_dict + else: + return True, {} + return False, {} + diff --git a/device/accton/x86_64-accton_as4630_54pe-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as4630_54pe-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54pe-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as5712_54x-r0/Accton-AS5712-54X/port_config.ini b/device/accton/x86_64-accton_as5712_54x-r0/Accton-AS5712-54X/port_config.ini new file mode 100755 index 00000000000..ee60c526227 --- /dev/null +++ b/device/accton/x86_64-accton_as5712_54x-r0/Accton-AS5712-54X/port_config.ini @@ -0,0 +1,73 @@ +# name lanes alias index speed +Ethernet0 13 tenGigE0 1 10000 +Ethernet1 14 tenGigE1 2 10000 +Ethernet2 15 tenGigE2 3 10000 +Ethernet3 16 tenGigE3 4 10000 +Ethernet4 21 tenGigE4 5 10000 +Ethernet5 22 tenGigE5 6 10000 +Ethernet6 23 tenGigE6 7 10000 +Ethernet7 24 tenGigE7 8 10000 +Ethernet8 25 tenGigE8 9 10000 +Ethernet9 26 tenGigE9 10 10000 +Ethernet10 27 tenGigE10 11 10000 +Ethernet11 28 tenGigE11 12 10000 +Ethernet12 29 tenGigE12 13 10000 +Ethernet13 30 tenGigE13 14 10000 +Ethernet14 31 tenGigE14 15 10000 +Ethernet15 32 tenGigE15 16 10000 +Ethernet16 45 tenGigE16 17 10000 +Ethernet17 46 tenGigE17 18 10000 +Ethernet18 47 tenGigE18 19 10000 +Ethernet19 48 tenGigE19 20 10000 +Ethernet20 49 tenGigE20 21 10000 +Ethernet21 50 tenGigE21 22 10000 +Ethernet22 51 tenGigE22 23 10000 +Ethernet23 52 tenGigE23 24 10000 +Ethernet24 53 tenGigE24 25 10000 +Ethernet25 54 tenGigE25 26 10000 +Ethernet26 55 tenGigE26 27 10000 +Ethernet27 56 tenGigE27 28 10000 +Ethernet28 57 tenGigE28 29 10000 +Ethernet29 58 tenGigE29 30 10000 +Ethernet30 59 tenGigE30 31 10000 +Ethernet31 60 tenGigE31 32 10000 +Ethernet32 61 tenGigE32 33 10000 +Ethernet33 62 tenGigE33 34 10000 +Ethernet34 63 tenGigE34 35 10000 +Ethernet35 64 tenGigE35 36 10000 +Ethernet36 65 tenGigE36 37 10000 +Ethernet37 66 tenGigE37 38 10000 +Ethernet38 67 tenGigE38 39 10000 +Ethernet39 68 tenGigE39 40 10000 +Ethernet40 69 tenGigE40 41 10000 +Ethernet41 70 tenGigE41 42 10000 +Ethernet42 71 tenGigE42 43 10000 +Ethernet43 72 tenGigE43 44 10000 +Ethernet44 73 tenGigE44 45 10000 +Ethernet45 74 tenGigE45 46 10000 +Ethernet46 75 tenGigE46 47 10000 +Ethernet47 76 tenGigE47 48 10000 +Ethernet48 97 tenGigE48 49 10000 +Ethernet49 98 tenGigE49 49 10000 +Ethernet50 99 tenGigE50 49 10000 +Ethernet51 100 tenGigE51 49 10000 +Ethernet52 101 tenGigE52 50 10000 +Ethernet53 102 tenGigE53 50 10000 +Ethernet54 103 tenGigE54 50 10000 +Ethernet55 104 tenGigE55 50 10000 +Ethernet56 81 tenGigE56 51 10000 +Ethernet57 82 tenGigE57 51 10000 +Ethernet58 83 tenGigE58 51 10000 +Ethernet59 84 tenGigE59 51 10000 +Ethernet60 105 tenGigE60 52 10000 +Ethernet61 106 tenGigE61 52 10000 +Ethernet62 107 tenGigE62 52 10000 +Ethernet63 108 tenGigE63 52 10000 +Ethernet64 109 tenGigE64 53 10000 +Ethernet65 110 tenGigE65 53 10000 +Ethernet66 111 tenGigE66 53 10000 +Ethernet67 112 tenGigE67 53 10000 +Ethernet68 77 tenGigE68 54 10000 +Ethernet69 78 tenGigE69 54 10000 +Ethernet70 79 tenGigE70 54 10000 +Ethernet71 80 tenGigE71 54 10000 diff --git a/device/accton/x86_64-accton_as5712_54x-r0/Accton-AS5712-54X/sai.profile b/device/accton/x86_64-accton_as5712_54x-r0/Accton-AS5712-54X/sai.profile new file mode 100755 index 00000000000..aec436d2260 --- /dev/null +++ b/device/accton/x86_64-accton_as5712_54x-r0/Accton-AS5712-54X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-as5712-72x10G.config.bcm diff --git a/device/accton/x86_64-accton_as5712_54x-r0/Accton-AS5712-54X/td2-as5712-72x10G.config.bcm b/device/accton/x86_64-accton_as5712_54x-r0/Accton-AS5712-54X/td2-as5712-72x10G.config.bcm new file mode 100644 index 00000000000..4844616d038 --- /dev/null +++ b/device/accton/x86_64-accton_as5712_54x-r0/Accton-AS5712-54X/td2-as5712-72x10G.config.bcm @@ -0,0 +1,148 @@ +os=unix +bcm_stat_flags=0 +parity_enable=0 +parity_correction=0 + +bcm_num_cos=8 +l2_mem_entries=32768 +l3_mem_entries=16384 +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 + +mmu_lossless=0 +lls_num_l2uc=12 +module_64ports=0 + +#SFI +serdes_if_type=9 + +port_init_cl72=0 +phy_an_c73=5 # TSCMOD_CL73_CL37 + +#sdk6.5.5 only supports 156(default) or 125 +#xgxs_lcpll_xtal_refclk=1 +tslam_dma_enable=1 +table_dma_enable=1 + +#for 72 ports with 48 10G ports and 6 40G ports for breakout mode +pbmp_oversubscribe=0x1fffffffffffffffffe +pbmp_xport_xe=0x1fffffffffffffffffe + +rate_ext_mdio_divisor=96 + +#SFP+ 1-4 from WC3 +portmap_1=13:10 +portmap_2=14:10 +portmap_3=15:10 +portmap_4=16:10 + +#SFP+ 5-8 from WC5 +portmap_5=21:10 +portmap_6=22:10 +portmap_7=23:10 +portmap_8=24:10 + +#SFP+ 9-12 from WC6 +portmap_9=25:10 +portmap_10=26:10 +portmap_11=27:10 +portmap_12=28:10 + +#SFP+ 13-16 from WC7 +portmap_13=29:10 +portmap_14=30:10 +portmap_15=31:10 +portmap_16=32:10 + +#SFP+ 17-20 from WC11 +portmap_17=45:10 +portmap_18=46:10 +portmap_19=47:10 +portmap_20=48:10 + +#SFP+ 21-24 from WC12 +portmap_21=49:10 +portmap_22=50:10 +portmap_23=51:10 +portmap_24=52:10 + +#SFP+ 25-28 from WC13 +portmap_25=53:10 +portmap_26=54:10 +portmap_27=55:10 +portmap_28=56:10 + +#SFP+ 29-32 from WC14 +portmap_29=57:10 +portmap_30=58:10 +portmap_31=59:10 +portmap_32=60:10 + +#SFP+ 33-36 from WC15 +portmap_33=61:10 +portmap_34=62:10 +portmap_35=63:10 +portmap_36=64:10 + +#SFP+ 37-40 from WC16 +portmap_37=65:10 +portmap_38=66:10 +portmap_39=67:10 +portmap_40=68:10 + +#SFP+ 41-44 from WC17 +portmap_41=69:10 +portmap_42=70:10 +portmap_43=71:10 +portmap_44=72:10 + +#SFP+ 45-48 from WC18 +portmap_45=73:10 +portmap_46=74:10 +portmap_47=75:10 +portmap_48=76:10 + +# QSFP+ 49/WC24/port 49 +portmap_49=97:10 +portmap_50=98:10 +portmap_51=99:10 +portmap_52=100:10 + +# QSFP+ 51/WC25/port 50 +portmap_53=101:10 +portmap_54=102:10 +portmap_55=103:10 +portmap_56=104:10 + +# QSFP+ 53/WC20/port 51 +portmap_57=81:10 +portmap_58=82:10 +portmap_59=83:10 +portmap_60=84:10 + +# QSFP+ 50/WC26/port 52 +portmap_61=105:10 +portmap_62=106:10 +portmap_63=107:10 +portmap_64=108:10 + +# QSFP+ 52/WC27/port 53 +portmap_65=109:10 +portmap_66=110:10 +portmap_67=111:10 +portmap_68=112:10 + +# QSFP+ 54/WC19/port 54 +portmap_69=77:10 +portmap_70=78:10 +portmap_71=79:10 +portmap_72=80:10 + +# L3 ECMP +# - In Trident2, VP LAGs share the same table as ECMP group table. +# The first N entries are reserved for VP LAGs, where N is the value of the +# config property "max_vp_lags". By default this was set to 256 +l3_max_ecmp_mode=1 +max_vp_lags=0 + +stable_size=0x2000000 diff --git a/device/accton/x86_64-accton_as5712_54x-r0/default_sku b/device/accton/x86_64-accton_as5712_54x-r0/default_sku new file mode 100644 index 00000000000..a65f8088752 --- /dev/null +++ b/device/accton/x86_64-accton_as5712_54x-r0/default_sku @@ -0,0 +1 @@ +Accton-AS5712-54X t1 diff --git a/device/accton/x86_64-accton_as5712_54x-r0/installer.conf b/device/accton/x86_64-accton_as5712_54x-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/accton/x86_64-accton_as5712_54x-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/accton/x86_64-accton_as5712_54x-r0/led_proc_init.soc b/device/accton/x86_64-accton_as5712_54x-r0/led_proc_init.soc new file mode 100644 index 00000000000..85030e1db34 --- /dev/null +++ b/device/accton/x86_64-accton_as5712_54x-r0/led_proc_init.soc @@ -0,0 +1,162 @@ +# LED setting for active +# ----------------------------------------------------------------------------- +# for as5712_54x (48xg+6qxg) +# +# on green - if link up +# off - if link down +# blink - if active +# ----------------------------------------------------------------------------- +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=1 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=2 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=5 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=6 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=9 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=10 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=13 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=14 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=17 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=18 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=19 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=21 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=22 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=23 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=25 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=26 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=27 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=29 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=30 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=31 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=33 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=34 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=35 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=37 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=38 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=39 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=41 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=42 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=43 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=45 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=46 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=49 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=50 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=51 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=53 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=54 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=55 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=57 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=58 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=59 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=61 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=62 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=1 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=2 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=5 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=6 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=9 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=10 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=13 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=14 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=17 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=18 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=19 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=21 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=22 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=23 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=25 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=26 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=27 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=29 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=30 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=31 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=33 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=34 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=35 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=37 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=38 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=39 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=41 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=42 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=43 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=45 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=46 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=47 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=49 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=50 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=51 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=53 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=54 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=55 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=56 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=57 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=58 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=59 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=60 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=61 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=62 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=63 + +led 0 stop +led 0 prog \ + 06 FE 80 D2 19 71 08 E0 60 FE E9 D2 0F 75 10 81 \ + 61 FD 02 3F 60 FF 28 32 0F 87 67 4A 96 FF 06 FF \ + D2 2B 74 16 02 1F 60 FF 28 32 0F 87 67 4A 96 FF \ + 06 FF D2 13 74 28 02 0F 60 FF 28 32 0F 87 67 4A \ + 96 FF 06 FF D2 0B 74 3A 3A 48 32 07 32 08 C7 32 \ + 04 C7 97 71 57 77 69 32 00 32 01 B7 97 71 63 32 \ + 0E 77 6B 26 FD 97 27 77 6B 32 0F 87 57 00 00 00 +led 0 start + +led 1 stop +led 1 prog \ + 06 FE 80 D2 19 71 08 E0 60 FE E9 D2 0F 75 10 81 \ + 61 FD 02 20 67 89 02 24 67 89 02 10 67 89 02 28 \ + 67 89 02 2C 67 89 02 0C 67 89 02 2C 67 79 02 28 \ + 67 79 02 24 67 79 02 20 67 79 02 10 67 79 02 0C \ + 67 79 02 0B 60 FF 28 32 0F 87 67 56 96 FF 06 FF \ + D2 FF 74 46 3A 36 32 07 32 08 C7 32 04 C7 97 71 \ + 63 77 75 32 00 32 01 B7 97 71 6F 32 0E 77 77 26 \ + FD 97 27 77 77 32 0F 87 57 12 A0 F8 15 1A 01 75 \ + 85 28 67 56 57 32 0F 87 57 12 A0 F8 15 1A 01 71 \ + A1 28 67 56 80 28 67 56 80 28 67 56 80 28 67 56 \ + 57 32 0F 87 32 0F 87 32 0F 87 32 0F 87 57 00 00 +led 1 start diff --git a/device/accton/x86_64-accton_as5712_54x-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as5712_54x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..7681caafeef --- /dev/null +++ b/device/accton/x86_64-accton_as5712_54x-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as5712_54x-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as5712_54x-r0/plugins/psuutil.py new file mode 100755 index 00000000000..841070637b3 --- /dev/null +++ b/device/accton/x86_64-accton_as5712_54x-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 1: "57-0038", + 2: "58-003b", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as5712_54x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as5712_54x-r0/plugins/sfputil.py new file mode 100755 index 00000000000..2ca1b8eec77 --- /dev/null +++ b/device/accton/x86_64-accton_as5712_54x-r0/plugins/sfputil.py @@ -0,0 +1,351 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# +try: + import time + import os + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +#from xcvrd +SFP_STATUS_INSERTED = '1' +SFP_STATUS_REMOVED = '0' + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 54 + PORTS_IN_BLOCK = 54 + QSFP_PORT_START = 49 + QSFP_PORT_END = 54 + + BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{1}-0050/" + BASE_OOM_PATH = "/sys/bus/i2c/devices/{0}-0050/" + BASE_CPLD2_PATH = "/sys/bus/i2c/devices/{0}-0061/" + BASE_CPLD3_PATH = "/sys/bus/i2c/devices/{0}-0062/" + I2C_BUS_ORDER = -1 + + #The sidebands of QSFP is different. + qsfp_sb_map = [0, 2, 4, 1, 3, 5] + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 1: [1, 2], + 2: [2, 3], + 3: [3, 4], + 4: [4, 5], + 5: [5, 6], + 6: [6, 7], + 7: [7, 8], + 8: [8, 9], + 9: [9, 10], + 10: [10, 11], + 11: [11, 12], + 12: [12, 13], + 13: [13, 14], + 14: [14, 15], + 15: [15, 16], + 16: [16, 17], + 17: [17, 18], + 18: [18, 19], + 19: [19, 20], + 20: [20, 21], + 21: [21, 22], + 22: [22, 23], + 23: [23, 24], + 24: [24, 25], + 25: [25, 26], + 26: [26, 27], + 27: [27, 28], + 28: [28, 29], + 29: [29, 30], + 30: [30, 31], + 31: [31, 32], + 32: [32, 33], + 33: [33, 34], + 34: [34, 35], + 35: [35, 36], + 36: [36, 37], + 37: [37, 38], + 38: [38, 39], + 39: [39, 40], + 40: [40, 41], + 41: [41, 42], + 42: [42, 43], + 43: [43, 44], + 44: [44, 45], + 45: [45, 46], + 46: [46, 47], + 47: [47, 48], + 48: [48, 49], + 49: [49, 50],#QSFP49 + 50: [51, 52], + 51: [53, 54], + 52: [50, 51], + 53: [52, 53], + 54: [54, 55],#QSFP54 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + #Two i2c buses might get flipped order, check them both. + def update_i2c_order(self): + if self.I2C_BUS_ORDER < 0: + eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + if os.path.exists(eeprom_path): + self.I2C_BUS_ORDER = 0 + eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + if os.path.exists(eeprom_path): + self.I2C_BUS_ORDER = 1 + return self.I2C_BUS_ORDER + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + order = self.update_i2c_order() + if port_num <= 24: + present_path = self.BASE_CPLD2_PATH.format(order) + else: + present_path = self.BASE_CPLD3_PATH.format(order) + present_path = present_path + "module_present_" + str(port_num) + self.__port_to_is_present = present_path + + try: + val_file = open(self.__port_to_is_present) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def qsfp_sb_remap(self, port_num): + qsfp_start = self.qsfp_port_start + qsfp_index = port_num - qsfp_start + qsfp_index = self.qsfp_sb_map[qsfp_index] + return qsfp_start+qsfp_index + + def get_low_power_mode_cpld(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + order = self.update_i2c_order() + lp_mode_path = self.BASE_CPLD3_PATH.format(order) + lp_mode_path = lp_mode_path + "module_lp_mode_" + q = self.qsfp_sb_remap(port_num) + lp_mode_path = lp_mode_path + str(q) + + try: + val_file = open(lp_mode_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + if not self.get_presence(port_num): + return self.get_low_power_mode_cpld(port_num) + + try: + eeprom = None + + eeprom = open(self.port_to_eeprom_mapping[port_num], mode="rb", buffering=0) + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if not (lpmode & 0x1): # 'Power override' bit is 0 + return self.get_low_power_mode_cpld(port_num) + else: + if ((lpmode & 0x2) == 0x2): + return True # Low Power Mode if "Power set" bit is 1 + else: + return False # High Power Mode if "Power set" bit is 0 + except IOError as err: + print "Error: unable to open file: %s" % str(err) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], mode="r+b", buffering=0) + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as err: + print "Error: unable to open file: %s" % str(err) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def reset(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + order = self.update_i2c_order() + lp_mode_path = self.BASE_CPLD3_PATH.format(order) + mod_rst_path = lp_mode_path + "module_reset_" + q = self.qsfp_sb_remap(port_num) + mod_rst_path = mod_rst_path + str(q) + try: + reg_file = open(mod_rst_path, 'r+', buffering=0) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #toggle reset + reg_file.seek(0) + reg_file.write('0') + time.sleep(1) + reg_file.seek(0) + reg_file.write('1') + reg_file.close() + return True + + @property + def _get_presence_bitmap(self): + nodes = [] + order = self.update_i2c_order() + + present_path = self.BASE_CPLD2_PATH.format(order) + nodes.append(present_path + "module_present_all") + present_path = self.BASE_CPLD3_PATH.format(order) + nodes.append(present_path + "module_present_all") + + bitmap = "" + for node in nodes: + try: + reg_file = open(node) + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + bitmap += reg_file.readline().rstrip() + " " + reg_file.close() + + rev = bitmap.split(" ") + rev = "".join(rev[::-1]) + return int(rev,16) + + + data = {'valid':0, 'last':0, 'present':0} + def get_transceiver_change_event(self, timeout=2000): + now = time.time() + port_dict = {} + port = 0 + + if timeout < 1000: + timeout = 1000 + timeout = (timeout) / float(1000) # Convert to secs + + + if now < (self.data['last'] + timeout) and self.data['valid']: + return True, {} + + reg_value = self._get_presence_bitmap + changed_ports = self.data['present'] ^ reg_value + if changed_ports: + for port in range (self.port_start, self.port_end+1): + # Mask off the bit corresponding to our port + fp_port = self._port_to_i2c_mapping[port][0] + mask = (1 << (fp_port - 1)) + if changed_ports & mask: + + if (reg_value & mask) == 0: + port_dict[port] = SFP_STATUS_REMOVED + else: + port_dict[port] = SFP_STATUS_INSERTED + + # Update cache + self.data['present'] = reg_value + self.data['last'] = now + self.data['valid'] = 1 + + return True, port_dict + else: + return True, {} + return False, {} + + + def __init__(self): + eeprom_path = self.BASE_OOM_PATH + "eeprom" + + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x][1] + ) + + SfpUtilBase.__init__(self) + + + + diff --git a/device/accton/x86_64-accton_as5712_54x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as5712_54x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as5712_54x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as5812_54t-r0/Accton-AS5812-54T/port_config.ini b/device/accton/x86_64-accton_as5812_54t-r0/Accton-AS5812-54T/port_config.ini new file mode 100644 index 00000000000..857a8987bc1 --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54t-r0/Accton-AS5812-54T/port_config.ini @@ -0,0 +1,73 @@ +# name lanes alias index speed autoneg +Ethernet0 14 tenGigE0 1 10000 1 +Ethernet1 13 tenGigE1 2 10000 1 +Ethernet2 16 tenGigE2 3 10000 1 +Ethernet3 15 tenGigE3 4 10000 1 +Ethernet4 22 tenGigE4 5 10000 1 +Ethernet5 21 tenGigE5 6 10000 1 +Ethernet6 24 tenGigE6 7 10000 1 +Ethernet7 23 tenGigE7 8 10000 1 +Ethernet8 26 tenGigE8 9 10000 1 +Ethernet9 25 tenGigE9 10 10000 1 +Ethernet10 28 tenGigE10 11 10000 1 +Ethernet11 27 tenGigE11 12 10000 1 +Ethernet12 30 tenGigE12 13 10000 1 +Ethernet13 29 tenGigE13 14 10000 1 +Ethernet14 32 tenGigE14 15 10000 1 +Ethernet15 31 tenGigE15 16 10000 1 +Ethernet16 46 tenGigE16 17 10000 1 +Ethernet17 45 tenGigE17 18 10000 1 +Ethernet18 48 tenGigE18 19 10000 1 +Ethernet19 47 tenGigE19 20 10000 1 +Ethernet20 50 tenGigE20 21 10000 1 +Ethernet21 49 tenGigE21 22 10000 1 +Ethernet22 52 tenGigE22 23 10000 1 +Ethernet23 51 tenGigE23 24 10000 1 +Ethernet24 54 tenGigE24 25 10000 1 +Ethernet25 53 tenGigE25 26 10000 1 +Ethernet26 56 tenGigE26 27 10000 1 +Ethernet27 55 tenGigE27 28 10000 1 +Ethernet28 58 tenGigE28 29 10000 1 +Ethernet29 57 tenGigE29 30 10000 1 +Ethernet30 60 tenGigE30 31 10000 1 +Ethernet31 59 tenGigE31 32 10000 1 +Ethernet32 62 tenGigE32 33 10000 1 +Ethernet33 61 tenGigE33 34 10000 1 +Ethernet34 64 tenGigE34 35 10000 1 +Ethernet35 63 tenGigE35 36 10000 1 +Ethernet36 66 tenGigE36 37 10000 1 +Ethernet37 65 tenGigE37 38 10000 1 +Ethernet38 68 tenGigE38 39 10000 1 +Ethernet39 67 tenGigE39 40 10000 1 +Ethernet40 70 tenGigE40 41 10000 1 +Ethernet41 69 tenGigE41 42 10000 1 +Ethernet42 72 tenGigE42 43 10000 1 +Ethernet43 71 tenGigE43 44 10000 1 +Ethernet44 74 tenGigE44 45 10000 1 +Ethernet45 73 tenGigE45 46 10000 1 +Ethernet46 76 tenGigE46 47 10000 1 +Ethernet47 75 tenGigE47 48 10000 1 +Ethernet48 97 tenGigE48 49 10000 0 +Ethernet49 98 tenGigE49 49 10000 0 +Ethernet50 99 tenGigE50 49 10000 0 +Ethernet51 100 tenGigE51 49 10000 0 +Ethernet52 101 tenGigE52 50 10000 0 +Ethernet53 102 tenGigE53 50 10000 0 +Ethernet54 103 tenGigE54 50 10000 0 +Ethernet55 104 tenGigE55 50 10000 0 +Ethernet56 77 tenGigE56 51 10000 0 +Ethernet57 78 tenGigE57 51 10000 0 +Ethernet58 79 tenGigE58 51 10000 0 +Ethernet59 80 tenGigE59 51 10000 0 +Ethernet60 105 tenGigE60 52 10000 0 +Ethernet61 106 tenGigE61 52 10000 0 +Ethernet62 107 tenGigE62 52 10000 0 +Ethernet63 108 tenGigE63 52 10000 0 +Ethernet64 109 tenGigE64 53 10000 0 +Ethernet65 110 tenGigE65 53 10000 0 +Ethernet66 111 tenGigE66 53 10000 0 +Ethernet67 112 tenGigE67 53 10000 0 +Ethernet68 81 tenGigE68 54 10000 0 +Ethernet69 82 tenGigE69 54 10000 0 +Ethernet70 83 tenGigE70 54 10000 0 +Ethernet71 84 tenGigE71 54 10000 0 diff --git a/device/accton/x86_64-accton_as5812_54t-r0/Accton-AS5812-54T/sai.profile b/device/accton/x86_64-accton_as5812_54t-r0/Accton-AS5812-54T/sai.profile new file mode 100644 index 00000000000..dc4f243953b --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54t-r0/Accton-AS5812-54T/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-as5812t-72x10G.config.bcm diff --git a/device/accton/x86_64-accton_as5812_54t-r0/Accton-AS5812-54T/td2-as5812t-72x10G.config.bcm b/device/accton/x86_64-accton_as5812_54t-r0/Accton-AS5812-54T/td2-as5812t-72x10G.config.bcm new file mode 100644 index 00000000000..b5555852109 --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54t-r0/Accton-AS5812-54T/td2-as5812t-72x10G.config.bcm @@ -0,0 +1,194 @@ +bcm_num_cos=8 +bcm_stat_flags=0 +bcm_stat_interval=2000000 +bcm_tunnel_term_compatible_mode=1 + +cdma_timeout_usec=3000000 + +fpem_mem_entries=16384 + +ipv6_lpm_128b_enable=0x1 +ifp_inports_support_enable=1 + +l2xmsg_mode=1 +l2_mem_entries=32768 + +l3_alpm_enable=2 +l3_max_ecmp_mode=1 +l3_mem_entries=16384 +l3_alpm_ipv6_128b_bkt_rsvd=1 + +load_firmware=0x101 + +max_vp_lags=0 +module_64ports=1 +miim_intr_enable=0 +mem_cache_enable=0 +mdio_output_delay=15 + +os=unix +oversubscribe_mode=1 + +parity_enable=0 +port_flex_enable=1 +parity_correction=0 +phy_ext_rom_boot_xe=0 +phy_aux_voltage_enable=1 + +#for 72 ports with 48 10G ports and 6 40G ports for breakout mode +pbmp_xport_xe=0x7fffffffffffffffffe +pbmp_oversubscribe=0x7fffffffffffffffffe + +rate_ext_mdio_divisor=96 + +schan_intr_enable=0 +skip_L2_USER_ENTRY=0 +stable_size=0x2000000 +stable_size=0x5500000 ;Specify the stable cache size in bytes used for Warm boot operations + +tdma_timeout_usec=3000000 + +#port-lanes configuration +portmap_1=14:10 +portmap_2=13:10 +portmap_3=16:10 +portmap_4=15:10 +port_phy_addr_1=0x1 +port_phy_addr_2=0x0 +port_phy_addr_3=0x3 +port_phy_addr_4=0x2 + +portmap_5=22:10 +portmap_6=21:10 +portmap_7=24:10 +portmap_8=23:10 +port_phy_addr_5=0x5 +port_phy_addr_6=0x4 +port_phy_addr_7=0x7 +port_phy_addr_8=0x6 + +portmap_9=26:10 +portmap_10=25:10 +portmap_11=28:10 +portmap_12=27:10 +port_phy_addr_9=0x9 +port_phy_addr_10=0x8 +port_phy_addr_11=0xb +port_phy_addr_12=0xa + +portmap_13=30:10 +portmap_14=29:10 +portmap_15=32:10 +portmap_16=31:10 +port_phy_addr_13=0x21 +port_phy_addr_14=0x20 +port_phy_addr_15=0x23 +port_phy_addr_16=0x22 + +portmap_17=46:10 +portmap_18=45:10 +portmap_19=48:10 +portmap_20=47:10 +port_phy_addr_17=0x25 +port_phy_addr_18=0x24 +port_phy_addr_19=0x27 +port_phy_addr_20=0x26 + +portmap_21=50:10 +portmap_22=49:10 +portmap_23=52:10 +portmap_24=51:10 +port_phy_addr_21=0x29 +port_phy_addr_22=0x28 +port_phy_addr_23=0x2b +port_phy_addr_24=0x2a + +portmap_25=54:10 +portmap_26=53:10 +portmap_27=56:10 +portmap_28=55:10 +port_phy_addr_25=0x41 +port_phy_addr_26=0x40 +port_phy_addr_27=0x43 +port_phy_addr_28=0x42 + +portmap_29=58:10 +portmap_30=57:10 +portmap_31=60:10 +portmap_32=59:10 +port_phy_addr_29=0x45 +port_phy_addr_30=0x44 +port_phy_addr_31=0x47 +port_phy_addr_32=0x46 + +portmap_33=62:10 +portmap_34=61:10 +portmap_35=64:10 +portmap_36=63:10 +port_phy_addr_33=0x49 +port_phy_addr_34=0x48 +port_phy_addr_35=0x4b +port_phy_addr_36=0x4a + +portmap_37=66:10 +portmap_38=65:10 +portmap_39=68:10 +portmap_40=67:10 +port_phy_addr_37=0x61 +port_phy_addr_38=0x60 +port_phy_addr_39=0x63 +port_phy_addr_40=0x62 + +portmap_41=70:10 +portmap_42=69:10 +portmap_43=72:10 +portmap_44=71:10 +port_phy_addr_41=0x65 +port_phy_addr_42=0x64 +port_phy_addr_43=0x67 +port_phy_addr_44=0x66 + +portmap_45=74:10 +portmap_46=73:10 +portmap_47=76:10 +portmap_48=75:10 +port_phy_addr_45=0x69 +port_phy_addr_46=0x68 +port_phy_addr_47=0x6b +port_phy_addr_48=0x6a + +#port_49 +portmap_49=97:10 +portmap_50=98:10 +portmap_51=99:10 +portmap_52=100:10 + +#port_50 +portmap_53=101:10 +portmap_54=102:10 +portmap_55=103:10 +portmap_56=104:10 + +#port_51 +portmap_57=77:10 +portmap_58=78:10 +portmap_59=79:10 +portmap_60=80:10 + +#port_52 +portmap_61=105:10 +portmap_62=106:10 +portmap_63=107:10 +portmap_64=108:10 + +#port_53 +portmap_65=109:10 +portmap_66=110:10 +portmap_67=111:10 +portmap_68=112:10 + +#port_54 +portmap_69=81:10 +portmap_70=82:10 +portmap_71=83:10 +portmap_72=84:10 \ No newline at end of file diff --git a/device/accton/x86_64-accton_as5812_54t-r0/default_sku b/device/accton/x86_64-accton_as5812_54t-r0/default_sku new file mode 100644 index 00000000000..87b99bac77b --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54t-r0/default_sku @@ -0,0 +1 @@ +Accton-AS5812-54T t1 diff --git a/device/accton/x86_64-accton_as5812_54t-r0/installer.conf b/device/accton/x86_64-accton_as5812_54t-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54t-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/accton/x86_64-accton_as5812_54t-r0/led_proc_init.soc b/device/accton/x86_64-accton_as5812_54t-r0/led_proc_init.soc new file mode 100644 index 00000000000..954446d4a8b --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54t-r0/led_proc_init.soc @@ -0,0 +1,94 @@ +# LED setting for active +# ----------------------------------------------------------------------------- +# for as5812_54t (48xg+6qxg) +# +# on green - if link up +# off - if link down +# blink - if active +# ----------------------------------------------------------------------------- + +m xlmac_rx_ctrl.xe0-xe47 STRICT_PREAMBLE=0 + +link on +link off + +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=12 REMAP_PORT_1=13 REMAP_PORT_2=14 REMAP_PORT_3=15 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=8 REMAP_PORT_5=9 REMAP_PORT_6=10 REMAP_PORT_7=11 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=4 REMAP_PORT_9=5 REMAP_PORT_10=6 REMAP_PORT_11=7 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=0 REMAP_PORT_13=1 REMAP_PORT_14=2 REMAP_PORT_15=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=16 REMAP_PORT_17=17 REMAP_PORT_18=18 REMAP_PORT_19=19 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=63 REMAP_PORT_21=62 REMAP_PORT_22=61 REMAP_PORT_23=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=63 REMAP_PORT_25=62 REMAP_PORT_26=61 REMAP_PORT_27=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=63 REMAP_PORT_29=62 REMAP_PORT_30=61 REMAP_PORT_31=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=63 REMAP_PORT_33=62 REMAP_PORT_34=61 REMAP_PORT_35=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=28 REMAP_PORT_37=29 REMAP_PORT_38=30 REMAP_PORT_39=31 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=24 REMAP_PORT_41=25 REMAP_PORT_42=26 REMAP_PORT_43=27 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=20 REMAP_PORT_45=21 REMAP_PORT_46=22 REMAP_PORT_47=23 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=32 REMAP_PORT_49=33 REMAP_PORT_50=34 REMAP_PORT_51=35 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=63 REMAP_PORT_53=62 REMAP_PORT_54=61 REMAP_PORT_55=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=63 REMAP_PORT_57=62 REMAP_PORT_58=61 REMAP_PORT_59=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=62 REMAP_PORT_62=61 REMAP_PORT_63=60 + +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=63 REMAP_PORT_1=63 REMAP_PORT_2=63 REMAP_PORT_3=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=63 REMAP_PORT_5=63 REMAP_PORT_6=63 REMAP_PORT_7=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=63 REMAP_PORT_9=63 REMAP_PORT_10=63 REMAP_PORT_11=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=63 REMAP_PORT_13=63 REMAP_PORT_14=63 REMAP_PORT_15=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=19 REMAP_PORT_17=18 REMAP_PORT_18=17 REMAP_PORT_19=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=15 REMAP_PORT_21=14 REMAP_PORT_22=13 REMAP_PORT_23=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=7 REMAP_PORT_25=6 REMAP_PORT_26=5 REMAP_PORT_27=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=3 REMAP_PORT_29=2 REMAP_PORT_30=1 REMAP_PORT_31=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=23 REMAP_PORT_33=22 REMAP_PORT_34=21 REMAP_PORT_35=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=63 REMAP_PORT_37=63 REMAP_PORT_38=63 REMAP_PORT_39=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=63 REMAP_PORT_41=63 REMAP_PORT_42=63 REMAP_PORT_43=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=63 REMAP_PORT_45=63 REMAP_PORT_46=63 REMAP_PORT_47=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=11 REMAP_PORT_49=10 REMAP_PORT_50=9 REMAP_PORT_51=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=24 REMAP_PORT_53=25 REMAP_PORT_54=26 REMAP_PORT_55=27 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=28 REMAP_PORT_57=29 REMAP_PORT_58=30 REMAP_PORT_59=31 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=32 REMAP_PORT_61=33 REMAP_PORT_62=34 REMAP_PORT_63=35 +led 0 stop +led 0 prog \ +02 F9 42 80 02 F7 42 00 02 F8 42 00 02 F4 42 48 \ +02 F3 42 24 06 F5 D2 00 74 1E 02 F5 42 05 67 4B \ +86 F8 06 F3 D6 F8 74 1E 86 F0 3E F4 06 F8 88 4A \ +03 75 3C 4A 04 71 41 67 7D 67 91 57 67 7D 67 91 \ +57 67 91 67 7D 57 67 7D 67 7D 57 06 F8 88 80 4A \ +00 27 97 75 46 90 4A 00 27 4A 01 27 B7 97 71 62 \ +77 2C 06 F5 D6 F0 74 75 02 F5 4A 07 37 4E 07 02 \ +F0 42 00 4E 07 06 F5 0A 07 71 46 77 2C 16 F7 06 \ +F9 17 4D DA 07 74 8E 12 F7 52 00 86 F9 57 86 F7 \ +57 16 F7 06 F9 07 4D DA 07 74 A2 12 F7 52 00 86 \ +F9 57 86 F7 57 00 00 00 00 00 00 00 00 00 00 00 \ +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +led 0 start + +led 1 stop +led 1 prog \ +02 F9 42 80 02 F7 42 00 02 F8 42 00 02 F4 42 36 \ +02 F3 42 24 02 F6 17 4E 01 67 AD 86 F8 67 AD 86 \ +F8 67 AD 86 F8 67 AD 86 F8 06 F8 D2 18 74 19 12 \ +01 02 10 60 F8 67 7E 12 01 02 0C 60 F8 67 7E 12 \ +01 02 04 60 F8 67 7E 12 01 02 00 60 F8 67 7E 12 \ +01 02 08 60 F8 67 7E 12 01 02 14 60 F8 67 7E 02 \ +F6 07 4E 01 02 18 60 F8 67 AD 86 F8 06 F3 D6 F8 \ +74 68 86 F0 3E F4 16 E0 5A 00 71 AD 77 A2 1A 00 \ +75 AD 77 A2 02 F6 4A 01 71 9F 06 F8 88 4A 03 75 \ +95 4A 04 71 9A 67 DF 67 E3 57 67 E3 67 DF 57 67 \ +E3 57 02 F6 4A 01 71 AA 67 DF 67 DF 57 06 F8 88 \ +80 4A 00 27 97 75 A2 90 4A 00 27 4A 01 27 B7 97 \ +71 C4 77 84 06 F5 D6 F0 74 D7 02 F5 4A 07 37 4E \ +07 02 F0 42 00 4E 07 06 F5 0A 07 71 A2 77 84 22 \ +01 77 E5 22 00 16 F7 06 F9 97 4D DA 07 74 F6 12 \ +F7 52 00 86 F9 57 86 F7 57 00 00 00 00 00 00 00 + + +led 1 start + +link on +led auto on +set RCError=off + diff --git a/device/accton/x86_64-accton_as5812_54t-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as5812_54t-r0/plugins/eeprom.py new file mode 100644 index 00000000000..7681caafeef --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54t-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as5812_54t-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as5812_54t-r0/plugins/psuutil.py new file mode 100755 index 00000000000..cfcd62e5828 --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54t-r0/plugins/psuutil.py @@ -0,0 +1,65 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 1: ["11-0038", "11-0050"], + 2: ["12-003b", "12-0053"], + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + lst = self.psu_mapping[index] + for i in lst: + node = self.psu_path + i + self.psu_oper_status + try: + with open(node, 'r') as power_status: + status += int(power_status.read()) + except IOError: + return False + + return status > 0 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + lst = self.psu_mapping[index] + for i in lst: + node = self.psu_path + i + self.psu_presence + try: + with open(node, 'r') as presence_status: + status += int(presence_status.read()) + except IOError: + return False + + return status > 0 diff --git a/device/accton/x86_64-accton_as5812_54t-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as5812_54t-r0/plugins/sfputil.py new file mode 100755 index 00000000000..c9f3008dcc5 --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54t-r0/plugins/sfputil.py @@ -0,0 +1,290 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# +try: + import time + import os + import pickle + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +#from xcvrd +SFP_STATUS_INSERTED = '1' +SFP_STATUS_REMOVED = '0' + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 49 + PORT_END = 54 + PORTS_IN_BLOCK = 54 + QSFP_PORT_START = 49 + QSFP_PORT_END = 54 + + BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{1}-0050/" + BASE_OOM_PATH = "/sys/bus/i2c/devices/{0}-0050/" + BASE_CPLD_PATH = "/sys/bus/i2c/devices/{0}-0060/" + I2C_BUS_ORDER = -1 + + #The sidebands of QSFP is different. + #present is in-order. + #But lp_mode and reset are not. + qsfp_sb_map = [0, 2, 4, 1, 3, 5] + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 49: [1,4],#QSFP_start + 50: [2,6], + 51: [3,3], + 52: [4,5], + 53: [5,7], + 54: [6,2], + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = self.BASE_OOM_PATH + "eeprom" + + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x][1] + ) + SfpUtilBase.__init__(self) + + #Two i2c buses might get flipped order, check them both. + def update_i2c_order(self): + if os.path.exists("/tmp/accton_util.p"): + self.I2C_BUS_ORDER = pickle.load(open("/tmp/accton_util.p", "rb")) + else: + if self.I2C_BUS_ORDER < 0: + eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + if os.path.exists(eeprom_path): + self.I2C_BUS_ORDER = 0 + eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + if os.path.exists(eeprom_path): + self.I2C_BUS_ORDER = 1 + return self.I2C_BUS_ORDER + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + order = self.update_i2c_order() + present_path = self.BASE_CPLD_PATH.format(order) + present_path = present_path + "module_present_" + str(port_num) + self.__port_to_is_present = present_path + + try: + val_file = open(self.__port_to_is_present) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode_cpld(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + order = self.update_i2c_order() + lp_mode_path = self.BASE_CPLD_PATH.format(order) + lp_mode_path = lp_mode_path + "module_lp_mode_" + lp_mode_path = lp_mode_path + str(port_num) + + try: + val_file = open(lp_mode_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + if not self.get_presence(port_num): + return self.get_low_power_mode_cpld(port_num) + + try: + eeprom = None + eeprom = open(self.port_to_eeprom_mapping[port_num], "rb") + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if not (lpmode & 0x1): # 'Power override' bit is 0 + return self.get_low_power_mode_cpld(port_num) + else: + if ((lpmode & 0x2) == 0x2): + return True # Low Power Mode if "Power set" bit is 1 + else: + return False # High Power Mode if "Power set" bit is 0 + except IOError as err: + print "Error: unable to open file: %s" % str(err) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b") + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as err: + print "Error: unable to open file: %s" % str(err) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def reset(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + order = self.update_i2c_order() + lp_mode_path = self.BASE_CPLD_PATH.format(order) + mod_rst_path = lp_mode_path + "module_reset_" + mod_rst_path = mod_rst_path + str(port_num) + print(mod_rst_path) + + try: + reg_file = open(mod_rst_path, 'r+', buffering=0) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #toggle reset + reg_file.seek(0) + reg_file.write('1') + time.sleep(1) + reg_file.seek(0) + reg_file.write('0') + reg_file.close() + return True + + @property + def _get_presence_bitmap(self): + nodes = [] + order = self.update_i2c_order() + + present_path = self.BASE_CPLD_PATH.format(order) + nodes.append(present_path + "module_present_all") + + bitmap = "" + for node in nodes: + try: + reg_file = open(node) + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + bitmap += reg_file.readline().rstrip() + " " + reg_file.close() + + rev = bitmap.split(" ") + rev = "".join(rev[::-1]) + return int(rev,16) + + + data = {'present':0} + def get_transceiver_change_event(self, timeout=2000): + port_dict = {} + port = 0 + + if timeout == 0: + cd_ms = sys.maxint + else: + cd_ms = timeout + + #poll per second + while cd_ms > 0: + reg_value = self._get_presence_bitmap + changed_ports = self.data['present'] ^ reg_value + if changed_ports != 0: + break + time.sleep(1) + cd_ms = cd_ms - 1000 + + if changed_ports: + for port in range (self.port_start, self.port_end+1): + # Mask off the bit corresponding to our port + fp_port = self._port_to_i2c_mapping[port][0] + mask = (1 << (fp_port - 1)) + if changed_ports & mask: + + if (reg_value & mask) == 0: + port_dict[port] = SFP_STATUS_REMOVED + else: + port_dict[port] = SFP_STATUS_INSERTED + + # Update cache + self.data['present'] = reg_value + + return True, port_dict + else: + return True, {} + return False, {} + diff --git a/device/accton/x86_64-accton_as5812_54t-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as5812_54t-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54t-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as5812_54x-r0/Accton-AS5812-54X/port_config.ini b/device/accton/x86_64-accton_as5812_54x-r0/Accton-AS5812-54X/port_config.ini new file mode 100755 index 00000000000..ee60c526227 --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54x-r0/Accton-AS5812-54X/port_config.ini @@ -0,0 +1,73 @@ +# name lanes alias index speed +Ethernet0 13 tenGigE0 1 10000 +Ethernet1 14 tenGigE1 2 10000 +Ethernet2 15 tenGigE2 3 10000 +Ethernet3 16 tenGigE3 4 10000 +Ethernet4 21 tenGigE4 5 10000 +Ethernet5 22 tenGigE5 6 10000 +Ethernet6 23 tenGigE6 7 10000 +Ethernet7 24 tenGigE7 8 10000 +Ethernet8 25 tenGigE8 9 10000 +Ethernet9 26 tenGigE9 10 10000 +Ethernet10 27 tenGigE10 11 10000 +Ethernet11 28 tenGigE11 12 10000 +Ethernet12 29 tenGigE12 13 10000 +Ethernet13 30 tenGigE13 14 10000 +Ethernet14 31 tenGigE14 15 10000 +Ethernet15 32 tenGigE15 16 10000 +Ethernet16 45 tenGigE16 17 10000 +Ethernet17 46 tenGigE17 18 10000 +Ethernet18 47 tenGigE18 19 10000 +Ethernet19 48 tenGigE19 20 10000 +Ethernet20 49 tenGigE20 21 10000 +Ethernet21 50 tenGigE21 22 10000 +Ethernet22 51 tenGigE22 23 10000 +Ethernet23 52 tenGigE23 24 10000 +Ethernet24 53 tenGigE24 25 10000 +Ethernet25 54 tenGigE25 26 10000 +Ethernet26 55 tenGigE26 27 10000 +Ethernet27 56 tenGigE27 28 10000 +Ethernet28 57 tenGigE28 29 10000 +Ethernet29 58 tenGigE29 30 10000 +Ethernet30 59 tenGigE30 31 10000 +Ethernet31 60 tenGigE31 32 10000 +Ethernet32 61 tenGigE32 33 10000 +Ethernet33 62 tenGigE33 34 10000 +Ethernet34 63 tenGigE34 35 10000 +Ethernet35 64 tenGigE35 36 10000 +Ethernet36 65 tenGigE36 37 10000 +Ethernet37 66 tenGigE37 38 10000 +Ethernet38 67 tenGigE38 39 10000 +Ethernet39 68 tenGigE39 40 10000 +Ethernet40 69 tenGigE40 41 10000 +Ethernet41 70 tenGigE41 42 10000 +Ethernet42 71 tenGigE42 43 10000 +Ethernet43 72 tenGigE43 44 10000 +Ethernet44 73 tenGigE44 45 10000 +Ethernet45 74 tenGigE45 46 10000 +Ethernet46 75 tenGigE46 47 10000 +Ethernet47 76 tenGigE47 48 10000 +Ethernet48 97 tenGigE48 49 10000 +Ethernet49 98 tenGigE49 49 10000 +Ethernet50 99 tenGigE50 49 10000 +Ethernet51 100 tenGigE51 49 10000 +Ethernet52 101 tenGigE52 50 10000 +Ethernet53 102 tenGigE53 50 10000 +Ethernet54 103 tenGigE54 50 10000 +Ethernet55 104 tenGigE55 50 10000 +Ethernet56 81 tenGigE56 51 10000 +Ethernet57 82 tenGigE57 51 10000 +Ethernet58 83 tenGigE58 51 10000 +Ethernet59 84 tenGigE59 51 10000 +Ethernet60 105 tenGigE60 52 10000 +Ethernet61 106 tenGigE61 52 10000 +Ethernet62 107 tenGigE62 52 10000 +Ethernet63 108 tenGigE63 52 10000 +Ethernet64 109 tenGigE64 53 10000 +Ethernet65 110 tenGigE65 53 10000 +Ethernet66 111 tenGigE66 53 10000 +Ethernet67 112 tenGigE67 53 10000 +Ethernet68 77 tenGigE68 54 10000 +Ethernet69 78 tenGigE69 54 10000 +Ethernet70 79 tenGigE70 54 10000 +Ethernet71 80 tenGigE71 54 10000 diff --git a/device/accton/x86_64-accton_as5812_54x-r0/Accton-AS5812-54X/sai.profile b/device/accton/x86_64-accton_as5812_54x-r0/Accton-AS5812-54X/sai.profile new file mode 100755 index 00000000000..063814c1fcb --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54x-r0/Accton-AS5812-54X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-as5812-72x10G.config.bcm diff --git a/device/accton/x86_64-accton_as5812_54x-r0/Accton-AS5812-54X/td2-as5812-72x10G.config.bcm b/device/accton/x86_64-accton_as5812_54x-r0/Accton-AS5812-54X/td2-as5812-72x10G.config.bcm new file mode 100644 index 00000000000..4844616d038 --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54x-r0/Accton-AS5812-54X/td2-as5812-72x10G.config.bcm @@ -0,0 +1,148 @@ +os=unix +bcm_stat_flags=0 +parity_enable=0 +parity_correction=0 + +bcm_num_cos=8 +l2_mem_entries=32768 +l3_mem_entries=16384 +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 + +mmu_lossless=0 +lls_num_l2uc=12 +module_64ports=0 + +#SFI +serdes_if_type=9 + +port_init_cl72=0 +phy_an_c73=5 # TSCMOD_CL73_CL37 + +#sdk6.5.5 only supports 156(default) or 125 +#xgxs_lcpll_xtal_refclk=1 +tslam_dma_enable=1 +table_dma_enable=1 + +#for 72 ports with 48 10G ports and 6 40G ports for breakout mode +pbmp_oversubscribe=0x1fffffffffffffffffe +pbmp_xport_xe=0x1fffffffffffffffffe + +rate_ext_mdio_divisor=96 + +#SFP+ 1-4 from WC3 +portmap_1=13:10 +portmap_2=14:10 +portmap_3=15:10 +portmap_4=16:10 + +#SFP+ 5-8 from WC5 +portmap_5=21:10 +portmap_6=22:10 +portmap_7=23:10 +portmap_8=24:10 + +#SFP+ 9-12 from WC6 +portmap_9=25:10 +portmap_10=26:10 +portmap_11=27:10 +portmap_12=28:10 + +#SFP+ 13-16 from WC7 +portmap_13=29:10 +portmap_14=30:10 +portmap_15=31:10 +portmap_16=32:10 + +#SFP+ 17-20 from WC11 +portmap_17=45:10 +portmap_18=46:10 +portmap_19=47:10 +portmap_20=48:10 + +#SFP+ 21-24 from WC12 +portmap_21=49:10 +portmap_22=50:10 +portmap_23=51:10 +portmap_24=52:10 + +#SFP+ 25-28 from WC13 +portmap_25=53:10 +portmap_26=54:10 +portmap_27=55:10 +portmap_28=56:10 + +#SFP+ 29-32 from WC14 +portmap_29=57:10 +portmap_30=58:10 +portmap_31=59:10 +portmap_32=60:10 + +#SFP+ 33-36 from WC15 +portmap_33=61:10 +portmap_34=62:10 +portmap_35=63:10 +portmap_36=64:10 + +#SFP+ 37-40 from WC16 +portmap_37=65:10 +portmap_38=66:10 +portmap_39=67:10 +portmap_40=68:10 + +#SFP+ 41-44 from WC17 +portmap_41=69:10 +portmap_42=70:10 +portmap_43=71:10 +portmap_44=72:10 + +#SFP+ 45-48 from WC18 +portmap_45=73:10 +portmap_46=74:10 +portmap_47=75:10 +portmap_48=76:10 + +# QSFP+ 49/WC24/port 49 +portmap_49=97:10 +portmap_50=98:10 +portmap_51=99:10 +portmap_52=100:10 + +# QSFP+ 51/WC25/port 50 +portmap_53=101:10 +portmap_54=102:10 +portmap_55=103:10 +portmap_56=104:10 + +# QSFP+ 53/WC20/port 51 +portmap_57=81:10 +portmap_58=82:10 +portmap_59=83:10 +portmap_60=84:10 + +# QSFP+ 50/WC26/port 52 +portmap_61=105:10 +portmap_62=106:10 +portmap_63=107:10 +portmap_64=108:10 + +# QSFP+ 52/WC27/port 53 +portmap_65=109:10 +portmap_66=110:10 +portmap_67=111:10 +portmap_68=112:10 + +# QSFP+ 54/WC19/port 54 +portmap_69=77:10 +portmap_70=78:10 +portmap_71=79:10 +portmap_72=80:10 + +# L3 ECMP +# - In Trident2, VP LAGs share the same table as ECMP group table. +# The first N entries are reserved for VP LAGs, where N is the value of the +# config property "max_vp_lags". By default this was set to 256 +l3_max_ecmp_mode=1 +max_vp_lags=0 + +stable_size=0x2000000 diff --git a/device/accton/x86_64-accton_as5812_54x-r0/default_sku b/device/accton/x86_64-accton_as5812_54x-r0/default_sku new file mode 100644 index 00000000000..b52f9750417 --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54x-r0/default_sku @@ -0,0 +1 @@ +Accton-AS5812-54X t1 diff --git a/device/accton/x86_64-accton_as5812_54x-r0/installer.conf b/device/accton/x86_64-accton_as5812_54x-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54x-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/accton/x86_64-accton_as5812_54x-r0/led_proc_init.soc b/device/accton/x86_64-accton_as5812_54x-r0/led_proc_init.soc new file mode 100644 index 00000000000..d93e373d056 --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54x-r0/led_proc_init.soc @@ -0,0 +1,162 @@ +# LED setting for active +# ----------------------------------------------------------------------------- +# for as5812_54x (48xg+6qxg) +# +# on green - if link up +# off - if link down +# blink - if active +# ----------------------------------------------------------------------------- +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=1 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=2 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=5 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=6 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=9 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=10 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=13 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=14 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=17 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=18 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=19 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=21 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=22 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=23 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=25 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=26 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=27 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=29 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=30 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=31 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=33 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=34 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=35 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=37 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=38 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=39 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=41 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=42 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=43 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=45 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=46 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=49 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=50 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=51 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=53 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=54 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=55 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=57 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=58 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=59 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=61 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=62 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=1 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=2 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=5 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=6 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=9 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=10 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=13 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=14 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=17 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=18 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=19 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=21 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=22 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=23 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=25 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=26 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=27 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=29 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=30 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=31 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=33 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=34 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=35 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=37 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=38 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=39 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=41 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=42 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=43 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=45 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=46 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=47 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=49 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=50 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=51 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=53 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=54 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=55 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=56 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=57 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=58 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=59 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=60 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=61 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=62 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=63 + +led 0 stop +led 0 prog \ + 06 FE 80 D2 19 71 08 E0 60 FE E9 D2 0F 75 10 81 \ + 61 FD 02 3F 60 FF 28 32 0F 87 67 4A 96 FF 06 FF \ + D2 2B 74 16 02 1F 60 FF 28 32 0F 87 67 4A 96 FF \ + 06 FF D2 13 74 28 02 0F 60 FF 28 32 0F 87 67 4A \ + 96 FF 06 FF D2 0B 74 3A 3A 48 32 07 32 08 C7 32 \ + 04 C7 97 71 57 77 69 32 00 32 01 B7 97 71 63 32 \ + 0E 77 6B 26 FD 97 27 77 6B 32 0F 87 57 00 00 00 +led 0 start + +led 1 stop +led 1 prog \ + 06 FE 80 D2 19 71 08 E0 60 FE E9 D2 0F 75 10 81 \ + 61 FD 02 20 67 89 02 24 67 89 02 10 67 89 02 28 \ + 67 89 02 2C 67 89 02 0C 67 89 02 2C 67 79 02 28 \ + 67 79 02 24 67 79 02 20 67 79 02 10 67 79 02 0C \ + 67 79 02 0B 60 FF 28 32 0F 87 67 56 96 FF 06 FF \ + D2 FF 74 46 3A 36 32 07 32 08 C7 32 04 C7 97 71 \ + 63 77 75 32 00 32 01 B7 97 71 6F 32 0E 77 77 26 \ + FD 97 27 77 77 32 0F 87 57 12 A0 F8 15 1A 01 75 \ + 85 28 67 56 57 32 0F 87 57 12 A0 F8 15 1A 01 71 \ + A1 28 67 56 80 28 67 56 80 28 67 56 80 28 67 56 \ + 57 32 0F 87 32 0F 87 32 0F 87 32 0F 87 57 00 00 +led 1 start diff --git a/device/accton/x86_64-accton_as5812_54x-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as5812_54x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..7681caafeef --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54x-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as5812_54x-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as5812_54x-r0/plugins/psuutil.py new file mode 100755 index 00000000000..841070637b3 --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54x-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 1: "57-0038", + 2: "58-003b", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as5812_54x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as5812_54x-r0/plugins/sfputil.py new file mode 100755 index 00000000000..88d8e536c4b --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54x-r0/plugins/sfputil.py @@ -0,0 +1,352 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# +try: + import time + import os + import pickle + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +#from xcvrd +SFP_STATUS_INSERTED = '1' +SFP_STATUS_REMOVED = '0' + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 54 + PORTS_IN_BLOCK = 54 + QSFP_PORT_START = 49 + QSFP_PORT_END = 54 + + BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{1}-0050/" + BASE_OOM_PATH = "/sys/bus/i2c/devices/{0}-0050/" + BASE_CPLD2_PATH = "/sys/bus/i2c/devices/{0}-0061/" + BASE_CPLD3_PATH = "/sys/bus/i2c/devices/{0}-0062/" + I2C_BUS_ORDER = -1 + + #The sidebands of QSFP is different. + #present is in-order. + #But lp_mode and reset are not. + qsfp_sb_map = [0, 2, 4, 1, 3, 5] + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 1: [1, 2], + 2: [2, 3], + 3: [3, 4], + 4: [4, 5], + 5: [5, 6], + 6: [6, 7], + 7: [7, 8], + 8: [8, 9], + 9: [9, 10], + 10: [10,11], + 11: [11,12], + 12: [12,13], + 13: [13,14], + 14: [14,15], + 15: [15,16], + 16: [16,17], + 17: [17,18], + 18: [18,19], + 19: [19,20], + 20: [20,21], + 21: [21,22], + 22: [22,23], + 23: [23,24], + 24: [24,25], + 25: [25,26], + 26: [26,27], + 27: [27,28], + 28: [28,29], + 29: [29,30], + 30: [30,31], + 31: [31,32], + 32: [32,33], + 33: [33,34], + 34: [34,35], + 35: [35,36], + 36: [36,37], + 37: [37,38], + 38: [38,39], + 39: [39,40], + 40: [40,41], + 41: [41,42], + 42: [42,43], + 43: [43,44], + 44: [44,45], + 45: [45,46], + 46: [46,47], + 47: [47,48], + 48: [48,49], + 49: [49,50],#QSFP_start + 50: [51,52], + 51: [53,54], + 52: [50,51], + 53: [52,53], + 54: [54,55], + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = self.BASE_OOM_PATH + "eeprom" + + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x][1] + ) + SfpUtilBase.__init__(self) + + #Two i2c buses might get flipped order, check them both. + def update_i2c_order(self): + if os.path.exists("/tmp/accton_util.p"): + self.I2C_BUS_ORDER = pickle.load(open("/tmp/accton_util.p", "rb")) + else: + if self.I2C_BUS_ORDER < 0: + eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + if os.path.exists(eeprom_path): + self.I2C_BUS_ORDER = 0 + eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + if os.path.exists(eeprom_path): + self.I2C_BUS_ORDER = 1 + return self.I2C_BUS_ORDER + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + order = self.update_i2c_order() + if port_num <= 24: + present_path = self.BASE_CPLD2_PATH.format(order) + else: + present_path = self.BASE_CPLD3_PATH.format(order) + + present_path = present_path + "module_present_" + str(port_num) + self.__port_to_is_present = present_path + + try: + val_file = open(self.__port_to_is_present) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def qsfp_sb_remap(self, port_num): + qsfp_start = self.qsfp_port_start + qsfp_index = port_num - qsfp_start + qsfp_index = self.qsfp_sb_map[qsfp_index] + return qsfp_start+qsfp_index + + def get_low_power_mode_cpld(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + order = self.update_i2c_order() + lp_mode_path = self.BASE_CPLD3_PATH.format(order) + lp_mode_path = lp_mode_path + "module_lp_mode_" + q = self.qsfp_sb_remap(port_num) + lp_mode_path = lp_mode_path + str(q) + + try: + val_file = open(lp_mode_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + if not self.get_presence(port_num): + return self.get_low_power_mode_cpld(port_num) + + try: + eeprom = None + + eeprom = open(self.port_to_eeprom_mapping[port_num], "rb") + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if not (lpmode & 0x1): # 'Power override' bit is 0 + return self.get_low_power_mode_cpld(port_num) + else: + if ((lpmode & 0x2) == 0x2): + return True # Low Power Mode if "Power set" bit is 1 + else: + return False # High Power Mode if "Power set" bit is 0 + except IOError as err: + print "Error: unable to open file: %s" % str(err) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b") + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as err: + print "Error: unable to open file: %s" % str(err) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def reset(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + order = self.update_i2c_order() + lp_mode_path = self.BASE_CPLD3_PATH.format(order) + mod_rst_path = lp_mode_path + "module_reset_" + q = self.qsfp_sb_remap(port_num) + mod_rst_path = mod_rst_path + str(q) + + try: + reg_file = open(mod_rst_path, 'r+', buffering=0) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #toggle reset + reg_file.seek(0) + reg_file.write('0') + time.sleep(1) + reg_file.seek(0) + reg_file.write('1') + reg_file.close() + return True + + @property + def _get_presence_bitmap(self): + nodes = [] + order = self.update_i2c_order() + + present_path = self.BASE_CPLD2_PATH.format(order) + nodes.append(present_path + "module_present_all") + present_path = self.BASE_CPLD3_PATH.format(order) + nodes.append(present_path + "module_present_all") + + bitmap = "" + for node in nodes: + try: + reg_file = open(node) + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + bitmap += reg_file.readline().rstrip() + " " + reg_file.close() + + rev = bitmap.split(" ") + rev = "".join(rev[::-1]) + return int(rev,16) + + + data = {'valid':0, 'last':0, 'present':0} + def get_transceiver_change_event(self, timeout=2000): + now = time.time() + port_dict = {} + port = 0 + + if timeout < 1000: + timeout = 1000 + timeout = (timeout) / float(1000) # Convert to secs + + + if now < (self.data['last'] + timeout) and self.data['valid']: + return True, {} + + reg_value = self._get_presence_bitmap + changed_ports = self.data['present'] ^ reg_value + if changed_ports: + for port in range (self.port_start, self.port_end+1): + # Mask off the bit corresponding to our port + fp_port = self._port_to_i2c_mapping[port][0] + mask = (1 << (fp_port - 1)) + if changed_ports & mask: + + if (reg_value & mask) == 0: + port_dict[port] = SFP_STATUS_REMOVED + else: + port_dict[port] = SFP_STATUS_INSERTED + + # Update cache + self.data['present'] = reg_value + self.data['last'] = now + self.data['valid'] = 1 + + return True, port_dict + else: + return True, {} + return False, {} + diff --git a/device/accton/x86_64-accton_as5812_54x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as5812_54x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as5812_54x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as5835_54t-r0/Accton-AS5835-54T/port_config.ini b/device/accton/x86_64-accton_as5835_54t-r0/Accton-AS5835-54T/port_config.ini new file mode 100644 index 00000000000..2e128a4fde6 --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54t-r0/Accton-AS5835-54T/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias index speed +Ethernet0 2 tenGigE1 1 10000 +Ethernet1 1 tenGigE2 2 10000 +Ethernet2 4 tenGigE3 3 10000 +Ethernet3 3 tenGigE4 4 10000 +Ethernet4 6 tenGigE5 5 10000 +Ethernet5 5 tenGigE6 6 10000 +Ethernet6 8 tenGigE7 7 10000 +Ethernet7 7 tenGigE8 8 10000 +Ethernet8 10 tenGigE9 9 10000 +Ethernet9 9 tenGigE10 10 10000 +Ethernet10 12 tenGigE11 11 10000 +Ethernet11 11 tenGigE12 12 10000 +Ethernet12 14 tenGigE13 13 10000 +Ethernet13 13 tenGigE14 14 10000 +Ethernet14 16 tenGigE15 15 10000 +Ethernet15 15 tenGigE16 16 10000 +Ethernet16 18 tenGigE17 17 10000 +Ethernet17 17 tenGigE18 18 10000 +Ethernet18 20 tenGigE19 19 10000 +Ethernet19 19 tenGigE20 20 10000 +Ethernet20 22 tenGigE21 21 10000 +Ethernet21 21 tenGigE22 22 10000 +Ethernet22 24 tenGigE23 23 10000 +Ethernet23 23 tenGigE24 24 10000 +Ethernet24 54 tenGigE25 25 10000 +Ethernet25 53 tenGigE26 26 10000 +Ethernet26 56 tenGigE27 27 10000 +Ethernet27 55 tenGigE28 28 10000 +Ethernet28 58 tenGigE29 29 10000 +Ethernet29 57 tenGigE30 30 10000 +Ethernet30 60 tenGigE31 31 10000 +Ethernet31 59 tenGigE32 32 10000 +Ethernet32 62 tenGigE33 33 10000 +Ethernet33 61 tenGigE34 34 10000 +Ethernet34 64 tenGigE35 35 10000 +Ethernet35 63 tenGigE36 36 10000 +Ethernet36 66 tenGigE37 37 10000 +Ethernet37 65 tenGigE38 38 10000 +Ethernet38 68 tenGigE39 39 10000 +Ethernet39 67 tenGigE40 40 10000 +Ethernet40 70 tenGigE41 41 10000 +Ethernet41 69 tenGigE42 42 10000 +Ethernet42 72 tenGigE43 43 10000 +Ethernet43 71 tenGigE44 44 10000 +Ethernet44 74 tenGigE45 45 10000 +Ethernet45 73 tenGigE46 46 10000 +Ethernet46 76 tenGigE47 47 10000 +Ethernet47 75 tenGigE48 48 10000 +Ethernet48 29,30,31,32 hundredGigE49 49 100000 +Ethernet52 33,34,35,36 hundredGigE50 53 100000 +Ethernet56 37,38,39,40 hundredGigE51 57 100000 +Ethernet60 41,42,43,44 hundredGigE52 61 100000 +Ethernet64 45,46,47,48 hundredGigE53 65 100000 +Ethernet68 49,50,51,52 hundredGigE54 69 100000 diff --git a/device/accton/x86_64-accton_as5835_54t-r0/Accton-AS5835-54T/sai.profile b/device/accton/x86_64-accton_as5835_54t-r0/Accton-AS5835-54T/sai.profile new file mode 100644 index 00000000000..952c87a00ee --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54t-r0/Accton-AS5835-54T/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/etc/bcm/td3-as5835t-48x10G+6x100G.config.bcm diff --git a/device/accton/x86_64-accton_as5835_54t-r0/Accton-AS5835-54T/td3-as5835t-48x10G+6x100G.config.bcm b/device/accton/x86_64-accton_as5835_54t-r0/Accton-AS5835-54T/td3-as5835t-48x10G+6x100G.config.bcm new file mode 100644 index 00000000000..4b73e8c29db --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54t-r0/Accton-AS5835-54T/td3-as5835t-48x10G+6x100G.config.bcm @@ -0,0 +1,515 @@ +#polarity/lanemap is using TH2 style. +core_clock_frequency=1525 +dpp_clock_ratio=2:3 + +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 + +oversubscribe_mode=1 + +pbmp_xport_xe=0x1FFFFFFFFFFFFFFFE + +parity_enable=0 +mem_cache_enable=0 + +l2_mem_entries=32768 +#l3_mem_entries=49152 +#fpem_mem_entries=16384 +l2xmsg_mode=1 + +#FC0 +dport_map_port_1=2 +dport_map_port_2=1 +dport_map_port_3=4 +dport_map_port_4=3 +portmap_1=1:10 +portmap_2=2:10 +portmap_3=3:10 +portmap_4=4:10 +#port_phy_addr_1=0x00 +#port_phy_addr_2=0x01 +#port_phy_addr_3=0x02 +#port_phy_addr_4=0x03 +phy_chain_rx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{2.0}=0x0123 +phy_chain_rx_lane_map_physical{3.0}=0x0123 +phy_chain_rx_lane_map_physical{4.0}=0x0123 +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_tx_lane_map_physical{2.0}=0x0123 +phy_chain_tx_lane_map_physical{3.0}=0x0123 +phy_chain_tx_lane_map_physical{4.0}=0x0123 +phy_chain_rx_polarity_flip_physical{1.0}=0x1 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 + +#FC1 +dport_map_port_5=6 +dport_map_port_6=5 +dport_map_port_7=8 +dport_map_port_8=7 +portmap_5=5:10 +portmap_6=6:10 +portmap_7=7:10 +portmap_8=8:10 +#port_phy_addr_5=0x04 +#port_phy_addr_6=0x05 +#port_phy_addr_7=0x06 +#port_phy_addr_8=0x07 +phy_chain_rx_lane_map_physical{5.0}=0x0123 +phy_chain_rx_lane_map_physical{6.0}=0x0123 +phy_chain_rx_lane_map_physical{7.0}=0x0123 +phy_chain_rx_lane_map_physical{8.0}=0x0123 +phy_chain_tx_lane_map_physical{5.0}=0x0123 +phy_chain_tx_lane_map_physical{6.0}=0x0123 +phy_chain_tx_lane_map_physical{7.0}=0x0123 +phy_chain_tx_lane_map_physical{8.0}=0x0123 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x0 + +#FC2 +dport_map_port_9=10 +dport_map_port_10=9 +dport_map_port_11=12 +dport_map_port_12=11 +portmap_9=9:10 +portmap_10=10:10 +portmap_11=11:10 +portmap_12=12:10 +#port_phy_addr_9=0x20 +#port_phy_addr_10=0x21 +#port_phy_addr_11=0x22 +#port_phy_addr_12=0x23 +phy_chain_rx_lane_map_physical{9.0}=0x0123 +phy_chain_rx_lane_map_physical{10.0}=0x0123 +phy_chain_rx_lane_map_physical{11.0}=0x0123 +phy_chain_rx_lane_map_physical{12.0}=0x0123 +phy_chain_tx_lane_map_physical{9.0}=0x0123 +phy_chain_tx_lane_map_physical{10.0}=0x0123 +phy_chain_tx_lane_map_physical{11.0}=0x0123 +phy_chain_tx_lane_map_physical{12.0}=0x0123 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 + +#FC3 +dport_map_port_13=14 +dport_map_port_14=13 +dport_map_port_15=16 +dport_map_port_16=15 +portmap_13=13:10 +portmap_14=14:10 +portmap_15=15:10 +portmap_16=16:10 +#port_phy_addr_13=0x24 +#port_phy_addr_14=0x25 +#port_phy_addr_15=0x26 +#port_phy_addr_16=0x27 +phy_chain_rx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{14.0}=0x0123 +phy_chain_rx_lane_map_physical{15.0}=0x0123 +phy_chain_rx_lane_map_physical{16.0}=0x0123 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_tx_lane_map_physical{14.0}=0x0123 +phy_chain_tx_lane_map_physical{15.0}=0x0123 +phy_chain_tx_lane_map_physical{16.0}=0x0123 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 + +#FC4 +dport_map_port_17=18 +dport_map_port_18=17 +dport_map_port_19=20 +dport_map_port_20=19 +portmap_17=17:10 +portmap_18=18:10 +portmap_19=19:10 +portmap_20=20:10 +#port_phy_addr_17=0x40 +#port_phy_addr_18=0x41 +#port_phy_addr_19=0x42 +#port_phy_addr_20=0x43 +phy_chain_rx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{18.0}=0x0123 +phy_chain_rx_lane_map_physical{19.0}=0x0123 +phy_chain_rx_lane_map_physical{20.0}=0x0123 +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_tx_lane_map_physical{18.0}=0x0123 +phy_chain_tx_lane_map_physical{19.0}=0x0123 +phy_chain_tx_lane_map_physical{20.0}=0x0123 +phy_chain_rx_polarity_flip_physical{17.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x0 + +#FC5 +dport_map_port_21=22 +dport_map_port_22=21 +dport_map_port_23=24 +dport_map_port_24=23 +portmap_21=21:10 +portmap_22=22:10 +portmap_23=23:10 +portmap_24=24:10 +#port_phy_addr_21=0x44 +#port_phy_addr_22=0x45 +#port_phy_addr_23=0x46 +#port_phy_addr_24=0x47 +phy_chain_rx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{22.0}=0x0123 +phy_chain_rx_lane_map_physical{23.0}=0x0123 +phy_chain_rx_lane_map_physical{24.0}=0x0123 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_tx_lane_map_physical{22.0}=0x0123 +phy_chain_tx_lane_map_physical{23.0}=0x0123 +phy_chain_tx_lane_map_physical{24.0}=0x0123 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 + +#FC6 + +#FC7 +dport_map_port_25=50 +portmap_25=29:100:4 +phy_chain_rx_lane_map_physical{29.0}=0x1302 +phy_chain_rx_lane_map_physical{30.0}=0x1302 +phy_chain_rx_lane_map_physical{31.0}=0x1302 +phy_chain_rx_lane_map_physical{32.0}=0x1302 +phy_chain_tx_lane_map_physical{29.0}=0x2031 +phy_chain_tx_lane_map_physical{30.0}=0x2031 +phy_chain_tx_lane_map_physical{31.0}=0x2031 +phy_chain_tx_lane_map_physical{32.0}=0x2031 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x1 + +#FC8 +dport_map_port_26=51 +portmap_26=33:100:4 +phy_chain_rx_lane_map_physical{33.0}=0x0123 +phy_chain_rx_lane_map_physical{34.0}=0x0123 +phy_chain_rx_lane_map_physical{35.0}=0x0123 +phy_chain_rx_lane_map_physical{36.0}=0x0123 +phy_chain_tx_lane_map_physical{33.0}=0x0123 +phy_chain_tx_lane_map_physical{34.0}=0x0123 +phy_chain_tx_lane_map_physical{35.0}=0x0123 +phy_chain_tx_lane_map_physical{36.0}=0x0123 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 +phy_chain_tx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 + +#FC9 +dport_map_port_27=49 +dport_map_port_28=52 +dport_map_port_29=53 +dport_map_port_30=54 +portmap_27=37:100:4 +phy_chain_rx_lane_map_physical{37.0}=0x1023 +phy_chain_rx_lane_map_physical{38.0}=0x1023 +phy_chain_rx_lane_map_physical{39.0}=0x1023 +phy_chain_rx_lane_map_physical{40.0}=0x1023 +phy_chain_tx_lane_map_physical{37.0}=0x3210 +phy_chain_tx_lane_map_physical{38.0}=0x3210 +phy_chain_tx_lane_map_physical{39.0}=0x3210 +phy_chain_tx_lane_map_physical{40.0}=0x3210 +phy_chain_rx_polarity_flip_physical{37.0}=0x0 +phy_chain_rx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_tx_polarity_flip_physical{37.0}=0x0 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_tx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 + +#FC10 +dport_map_port_33=57 +portmap_33=41:100:4 +phy_chain_rx_lane_map_physical{41.0}=0x3210 +phy_chain_rx_lane_map_physical{42.0}=0x3210 +phy_chain_rx_lane_map_physical{43.0}=0x3210 +phy_chain_rx_lane_map_physical{44.0}=0x3210 +phy_chain_tx_lane_map_physical{41.0}=0x3210 +phy_chain_tx_lane_map_physical{42.0}=0x3210 +phy_chain_tx_lane_map_physical{43.0}=0x3210 +phy_chain_tx_lane_map_physical{44.0}=0x3210 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 + +#FC11 +dport_map_port_34=56 +portmap_34=45:100:4 +phy_chain_rx_lane_map_physical{45.0}=0x3210 +phy_chain_rx_lane_map_physical{46.0}=0x3210 +phy_chain_rx_lane_map_physical{47.0}=0x3210 +phy_chain_rx_lane_map_physical{48.0}=0x3210 +phy_chain_tx_lane_map_physical{45.0}=0x3210 +phy_chain_tx_lane_map_physical{46.0}=0x3210 +phy_chain_tx_lane_map_physical{47.0}=0x3210 +phy_chain_tx_lane_map_physical{48.0}=0x3210 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x0 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 + +#FC12 +dport_map_port_35=55 +dport_map_port_36=58 +dport_map_port_37=59 +dport_map_port_38=60 +portmap_35=49:100:4 +phy_chain_rx_lane_map_physical{49.0}=0x3210 +phy_chain_rx_lane_map_physical{50.0}=0x3210 +phy_chain_rx_lane_map_physical{51.0}=0x3210 +phy_chain_rx_lane_map_physical{52.0}=0x3210 +phy_chain_tx_lane_map_physical{49.0}=0x3210 +phy_chain_tx_lane_map_physical{50.0}=0x3210 +phy_chain_tx_lane_map_physical{51.0}=0x3210 +phy_chain_tx_lane_map_physical{52.0}=0x3210 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 + +#FC13 +dport_map_port_39=26 +dport_map_port_40=25 +dport_map_port_41=28 +dport_map_port_42=27 +portmap_39=53:10 +portmap_40=54:10 +portmap_41=55:10 +portmap_42=56:10 +#port_phy_addr_39=0x60 +#port_phy_addr_40=0x61 +#port_phy_addr_41=0x62 +#port_phy_addr_42=0x63 +phy_chain_rx_lane_map_physical{53.0}=0x3120 +phy_chain_rx_lane_map_physical{54.0}=0x3120 +phy_chain_rx_lane_map_physical{55.0}=0x3120 +phy_chain_rx_lane_map_physical{56.0}=0x3120 +phy_chain_tx_lane_map_physical{53.0}=0x3102 +phy_chain_tx_lane_map_physical{54.0}=0x3102 +phy_chain_tx_lane_map_physical{55.0}=0x3102 +phy_chain_tx_lane_map_physical{56.0}=0x3102 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x0 + +#FC14 +dport_map_port_43=30 +dport_map_port_44=29 +dport_map_port_45=32 +dport_map_port_46=31 +portmap_43=57:10 +portmap_44=58:10 +portmap_45=59:10 +portmap_46=60:10 +#port_phy_addr_43=0x64 +#port_phy_addr_44=0x65 +#port_phy_addr_45=0x66 +#port_phy_addr_46=0x67 +phy_chain_rx_lane_map_physical{57.0}=0x3210 +phy_chain_rx_lane_map_physical{58.0}=0x3210 +phy_chain_rx_lane_map_physical{59.0}=0x3210 +phy_chain_rx_lane_map_physical{60.0}=0x3210 +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_tx_lane_map_physical{58.0}=0x3210 +phy_chain_tx_lane_map_physical{59.0}=0x3210 +phy_chain_tx_lane_map_physical{60.0}=0x3210 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x0 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 + +#FC15 +dport_map_port_47=34 +dport_map_port_48=33 +dport_map_port_49=36 +dport_map_port_50=35 +portmap_47=61:10 +portmap_48=62:10 +portmap_49=63:10 +portmap_50=64:10 +#port_phy_addr_47=0x100 +#port_phy_addr_48=0x101 +#port_phy_addr_49=0x102 +#port_phy_addr_50=0x103 +phy_chain_rx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{62.0}=0x3210 +phy_chain_rx_lane_map_physical{63.0}=0x3210 +phy_chain_rx_lane_map_physical{64.0}=0x3210 +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_tx_lane_map_physical{62.0}=0x3210 +phy_chain_tx_lane_map_physical{63.0}=0x3210 +phy_chain_tx_lane_map_physical{64.0}=0x3210 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 + +#FC16 +dport_map_port_51=38 +dport_map_port_52=37 +dport_map_port_53=40 +dport_map_port_54=39 +portmap_51=65:10 +portmap_52=66:10 +portmap_53=67:10 +portmap_54=68:10 +#port_phy_addr_51=0x104 +#port_phy_addr_52=0x105 +#port_phy_addr_53=0x106 +#port_phy_addr_54=0x107 +phy_chain_rx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{66.0}=0x3210 +phy_chain_rx_lane_map_physical{67.0}=0x3210 +phy_chain_rx_lane_map_physical{68.0}=0x3210 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_tx_lane_map_physical{66.0}=0x3210 +phy_chain_tx_lane_map_physical{67.0}=0x3210 +phy_chain_tx_lane_map_physical{68.0}=0x3210 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 + +#FC17 +dport_map_port_55=42 +dport_map_port_56=41 +dport_map_port_57=44 +dport_map_port_58=43 +portmap_55=69:10 +portmap_56=70:10 +portmap_57=71:10 +portmap_58=72:10 +#port_phy_addr_55=0x120 +#port_phy_addr_56=0x121 +#port_phy_addr_57=0x122 +#port_phy_addr_58=0x123 +phy_chain_rx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{70.0}=0x3210 +phy_chain_rx_lane_map_physical{71.0}=0x3210 +phy_chain_rx_lane_map_physical{72.0}=0x3210 +phy_chain_tx_lane_map_physical{69.0}=0x3210 +phy_chain_tx_lane_map_physical{70.0}=0x3210 +phy_chain_tx_lane_map_physical{71.0}=0x3210 +phy_chain_tx_lane_map_physical{72.0}=0x3210 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 + +#FC18 +dport_map_port_59=46 +dport_map_port_60=45 +dport_map_port_61=48 +dport_map_port_62=47 +portmap_59=73:10 +portmap_60=74:10 +portmap_61=75:10 +portmap_62=76:10 +#port_phy_addr_59=0x124 +#port_phy_addr_60=0x125 +#port_phy_addr_61=0x126 +#port_phy_addr_62=0x127 +phy_chain_rx_lane_map_physical{73.0}=0x3210 +phy_chain_rx_lane_map_physical{74.0}=0x3210 +phy_chain_rx_lane_map_physical{75.0}=0x3210 +phy_chain_rx_lane_map_physical{76.0}=0x3210 +phy_chain_tx_lane_map_physical{73.0}=0x2031 +phy_chain_tx_lane_map_physical{74.0}=0x2031 +phy_chain_tx_lane_map_physical{75.0}=0x2031 +phy_chain_tx_lane_map_physical{76.0}=0x2031 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x1 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_tx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 + +#FC19 + +dport_map_port_64=64 +portmap_64=81:10:m +phy_chain_rx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{81.0}=0x1 + diff --git a/device/accton/x86_64-accton_as5835_54t-r0/default_sku b/device/accton/x86_64-accton_as5835_54t-r0/default_sku new file mode 100644 index 00000000000..d0bfc0f22e8 --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54t-r0/default_sku @@ -0,0 +1 @@ +Accton-AS5835-54T t1 diff --git a/device/accton/x86_64-accton_as5835_54t-r0/installer.conf b/device/accton/x86_64-accton_as5835_54t-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54t-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/accton/x86_64-accton_as5835_54t-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as5835_54t-r0/plugins/eeprom.py new file mode 100644 index 00000000000..7681caafeef --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54t-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as5835_54t-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as5835_54t-r0/plugins/psuutil.py new file mode 100644 index 00000000000..c95bc27897d --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54t-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 1: "11-0050", + 2: "12-0053", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as5835_54t-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as5835_54t-r0/plugins/sfputil.py new file mode 100644 index 00000000000..4fcbdb02257 --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54t-r0/plugins/sfputil.py @@ -0,0 +1,307 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +SFP_STATUS_INSERTED = '1' +SFP_STATUS_REMOVED = '0' + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 49 + PORT_END = 72 + PORTS_IN_BLOCK = 72 + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 49: 28, #QSFP49 + 50: 28, + 51: 28, + 52: 28, + 53: 29, #QSFP50 + 54: 29, + 55: 29, + 56: 29, + 57: 26, #QSFP51 + 58: 26, + 59: 26, + 60: 26, + 61: 30, #QSFP52 + 62: 30, + 63: 30, + 64: 30, + 65: 31, #QSFP53 + 66: 31, + 67: 31, + 68: 31, + 69: 27, #QSFP54 + 70: 27, + 71: 27, + 72: 27, + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.PORT_START + + @property + def qsfp_port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x]) + + SfpUtilBase.__init__(self) + + + # For port 49~54 are QSFP, here presumed they're all split to 4 lanes. + def get_cage_num(self, port_num): + cage_num = port_num + if (port_num >= self.PORT_START): + cage_num = (port_num - self.PORT_START)/4 + cage_num = cage_num + self.PORT_START + + return cage_num + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + cage_num = self.get_cage_num(port_num) + path = "/sys/bus/i2c/devices/3-0062/module_present_{0}" + port_ps = path.format(cage_num) + + try: + val_file = open(port_ps) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode_cpld(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + cage_num = self.get_cage_num(port_num) + path = "/sys/bus/i2c/devices/3-0062/module_lpmode_{0}" + lp_mode_path = path.format(cage_num) + + try: + val_file = open(lp_mode_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + if not self.get_presence(port_num): + return False + + try: + eeprom = None + + eeprom = open(self.port_to_eeprom_mapping[port_num], mode="rb", buffering=0) + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if not (lpmode & 0x1): # 'Power override' bit is 0 + return self.get_low_power_mode_cpld(port_num) + else: + if ((lpmode & 0x2) == 0x2): + return True # Low Power Mode if "Power set" bit is 1 + else: + return False # High Power Mode if "Power set" bit is 0 + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], mode="r+b", buffering=0) + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def reset(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + cage_num = self.get_cage_num(port_num) + path = "/sys/bus/i2c/devices/3-0062/module_reset_{0}" + port_ps = path.format(cage_num) + try: + reg_file = open(port_ps, mode="w", buffering=0) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #toggle reset + reg_file.seek(0) + reg_file.write('0') + time.sleep(1) + reg_file.seek(0) + reg_file.write('1') + reg_file.close() + + return True + + @property + def _get_presence_bitmap(self): + + bitmap = "" + try: + reg_file = open("/sys/bus/i2c/devices/3-0062/module_present_all") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + bitmap += reg_file.readline().rstrip() + " " + reg_file.close() + + rev = bitmap.split(" ") + rev.pop() # Remove the last useless character + + # Save port 49-54 into buffer + tmp = rev.pop() + + # Insert port 1-48 + for i in range (0, 6): + rev.append(hex(0)[2:]) + rev[i] = rev[i].zfill(2) + + # Expand port 49-54 + for i in range (0, 6): + val = (int(tmp,16) >> i) & 0x1 + rev.append(hex(val)[2:]) + + rev = "".join(rev[::-1]) + return int(rev,16) + + data = {'valid':0, 'present':0} + def get_transceiver_change_event(self, timeout=0): + + start_time = time.time() + port_dict = {} + port = 0 + blocking = False + + if timeout == 0: + blocking = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print "get_transceiver_change_event:Invalid timeout value", timeout + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print 'get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + + reg_value = self._get_presence_bitmap + changed_ports = self.data['present'] ^ reg_value + if changed_ports: + for port in range (self.port_start, self.port_end+1): + # Mask off the bit corresponding to our port + mask = (1 << (port - 1)) + if changed_ports & mask: + + if (reg_value & mask) == 0: + port_dict[port] = SFP_STATUS_REMOVED + else: + port_dict[port] = SFP_STATUS_INSERTED + + # Update cache + self.data['present'] = reg_value + self.data['valid'] = 1 + return True, port_dict + + if blocking: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + print "get_transceiver_change_event: Should not reach here." + return False, {} diff --git a/device/accton/x86_64-accton_as5835_54t-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as5835_54t-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54t-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as5835_54x-r0/Accton-AS5835-54X/mv2-as5835-48x10G+6x100G.config.bcm b/device/accton/x86_64-accton_as5835_54x-r0/Accton-AS5835-54X/mv2-as5835-48x10G+6x100G.config.bcm new file mode 100644 index 00000000000..e72a490b04d --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54x-r0/Accton-AS5835-54X/mv2-as5835-48x10G+6x100G.config.bcm @@ -0,0 +1,467 @@ +#polarity/lanemap is using TH2 style. +core_clock_frequency=1525 +dpp_clock_ratio=2:3 + +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 + +oversubscribe_mode=1 + +pbmp_xport_xe=0x1FFFFFFFFFFFFFFFE + +parity_enable=0 +mem_cache_enable=0 + +l2_mem_entries=32768 +#l3_mem_entries=49152 +#fpem_mem_entries=16384 +l2xmsg_mode=1 + +#FC0 +dport_map_port_1=1 +dport_map_port_2=2 +dport_map_port_3=3 +dport_map_port_4=4 +portmap_1=1:10 +portmap_2=2:10 +portmap_3=3:10 +portmap_4=4:10 +phy_chain_rx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{2.0}=0x0123 +phy_chain_rx_lane_map_physical{3.0}=0x0123 +phy_chain_rx_lane_map_physical{4.0}=0x0123 +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_tx_lane_map_physical{2.0}=0x0123 +phy_chain_tx_lane_map_physical{3.0}=0x0123 +phy_chain_tx_lane_map_physical{4.0}=0x0123 +phy_chain_rx_polarity_flip_physical{1.0}=0x1 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 + +#FC1 +dport_map_port_5=5 +dport_map_port_6=6 +dport_map_port_7=7 +dport_map_port_8=8 +portmap_5=5:10 +portmap_6=6:10 +portmap_7=7:10 +portmap_8=8:10 +phy_chain_rx_lane_map_physical{5.0}=0x0123 +phy_chain_rx_lane_map_physical{6.0}=0x0123 +phy_chain_rx_lane_map_physical{7.0}=0x0123 +phy_chain_rx_lane_map_physical{8.0}=0x0123 +phy_chain_tx_lane_map_physical{5.0}=0x0123 +phy_chain_tx_lane_map_physical{6.0}=0x0123 +phy_chain_tx_lane_map_physical{7.0}=0x0123 +phy_chain_tx_lane_map_physical{8.0}=0x0123 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 + +#FC2 +dport_map_port_9=9 +dport_map_port_10=10 +dport_map_port_11=11 +dport_map_port_12=12 +portmap_9=9:10 +portmap_10=10:10 +portmap_11=11:10 +portmap_12=12:10 +phy_chain_rx_lane_map_physical{9.0}=0x0123 +phy_chain_rx_lane_map_physical{10.0}=0x0123 +phy_chain_rx_lane_map_physical{11.0}=0x0123 +phy_chain_rx_lane_map_physical{12.0}=0x0123 +phy_chain_tx_lane_map_physical{9.0}=0x0123 +phy_chain_tx_lane_map_physical{10.0}=0x0123 +phy_chain_tx_lane_map_physical{11.0}=0x0123 +phy_chain_tx_lane_map_physical{12.0}=0x0123 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 + +#FC3 +dport_map_port_13=13 +dport_map_port_14=14 +dport_map_port_15=15 +dport_map_port_16=16 +portmap_13=13:10 +portmap_14=14:10 +portmap_15=15:10 +portmap_16=16:10 +phy_chain_rx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{14.0}=0x0123 +phy_chain_rx_lane_map_physical{15.0}=0x0123 +phy_chain_rx_lane_map_physical{16.0}=0x0123 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_tx_lane_map_physical{14.0}=0x0123 +phy_chain_tx_lane_map_physical{15.0}=0x0123 +phy_chain_tx_lane_map_physical{16.0}=0x0123 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 + +#FC4 +dport_map_port_17=17 +dport_map_port_18=18 +dport_map_port_19=19 +dport_map_port_20=20 +portmap_17=17:10 +portmap_18=18:10 +portmap_19=19:10 +portmap_20=20:10 +phy_chain_rx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{18.0}=0x0123 +phy_chain_rx_lane_map_physical{19.0}=0x0123 +phy_chain_rx_lane_map_physical{20.0}=0x0123 +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_tx_lane_map_physical{18.0}=0x0123 +phy_chain_tx_lane_map_physical{19.0}=0x0123 +phy_chain_tx_lane_map_physical{20.0}=0x0123 +phy_chain_rx_polarity_flip_physical{17.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 + +#FC5 +dport_map_port_21=21 +dport_map_port_22=22 +dport_map_port_23=23 +dport_map_port_24=24 +portmap_21=21:10 +portmap_22=22:10 +portmap_23=23:10 +portmap_24=24:10 +phy_chain_rx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{22.0}=0x0123 +phy_chain_rx_lane_map_physical{23.0}=0x0123 +phy_chain_rx_lane_map_physical{24.0}=0x0123 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_tx_lane_map_physical{22.0}=0x0123 +phy_chain_tx_lane_map_physical{23.0}=0x0123 +phy_chain_tx_lane_map_physical{24.0}=0x0123 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 + +#FC6 + +#FC7 +dport_map_port_25=50 +portmap_25=29:100:4 +phy_chain_rx_lane_map_physical{29.0}=0x1302 +phy_chain_rx_lane_map_physical{30.0}=0x1302 +phy_chain_rx_lane_map_physical{31.0}=0x1302 +phy_chain_rx_lane_map_physical{32.0}=0x1302 +phy_chain_tx_lane_map_physical{29.0}=0x2031 +phy_chain_tx_lane_map_physical{30.0}=0x2031 +phy_chain_tx_lane_map_physical{31.0}=0x2031 +phy_chain_tx_lane_map_physical{32.0}=0x2031 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x1 + +#FC8 +dport_map_port_26=51 +portmap_26=33:100:4 +phy_chain_rx_lane_map_physical{33.0}=0x1203 +phy_chain_rx_lane_map_physical{34.0}=0x1203 +phy_chain_rx_lane_map_physical{35.0}=0x1203 +phy_chain_rx_lane_map_physical{36.0}=0x1203 +phy_chain_tx_lane_map_physical{33.0}=0x3120 +phy_chain_tx_lane_map_physical{34.0}=0x3120 +phy_chain_tx_lane_map_physical{35.0}=0x3120 +phy_chain_tx_lane_map_physical{36.0}=0x3120 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 +phy_chain_tx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 + +#FC9 +dport_map_port_27=49 +dport_map_port_28=52 +dport_map_port_29=53 +dport_map_port_30=54 +portmap_27=37:100:4 +phy_chain_rx_lane_map_physical{37.0}=0x2130 +phy_chain_rx_lane_map_physical{38.0}=0x2130 +phy_chain_rx_lane_map_physical{39.0}=0x2130 +phy_chain_rx_lane_map_physical{40.0}=0x2130 +phy_chain_tx_lane_map_physical{37.0}=0x3210 +phy_chain_tx_lane_map_physical{38.0}=0x3210 +phy_chain_tx_lane_map_physical{39.0}=0x3210 +phy_chain_tx_lane_map_physical{40.0}=0x3210 +phy_chain_rx_polarity_flip_physical{37.0}=0x0 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_tx_polarity_flip_physical{37.0}=0x0 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 + +#FC10 +dport_map_port_33=57 +portmap_33=41:100:4 +phy_chain_rx_lane_map_physical{41.0}=0x1320 +phy_chain_rx_lane_map_physical{42.0}=0x1320 +phy_chain_rx_lane_map_physical{43.0}=0x1320 +phy_chain_rx_lane_map_physical{44.0}=0x1320 +phy_chain_tx_lane_map_physical{41.0}=0x3210 +phy_chain_tx_lane_map_physical{42.0}=0x3210 +phy_chain_tx_lane_map_physical{43.0}=0x3210 +phy_chain_tx_lane_map_physical{44.0}=0x3210 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 + +#FC11 +dport_map_port_34=56 +portmap_34=45:100:4 +phy_chain_rx_lane_map_physical{45.0}=0x3201 +phy_chain_rx_lane_map_physical{46.0}=0x3201 +phy_chain_rx_lane_map_physical{47.0}=0x3201 +phy_chain_rx_lane_map_physical{48.0}=0x3201 +phy_chain_tx_lane_map_physical{45.0}=0x3210 +phy_chain_tx_lane_map_physical{46.0}=0x3210 +phy_chain_tx_lane_map_physical{47.0}=0x3210 +phy_chain_tx_lane_map_physical{48.0}=0x3210 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x0 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 + +#FC12 +dport_map_port_35=55 +dport_map_port_36=58 +dport_map_port_37=59 +dport_map_port_38=60 +portmap_35=49:100:4 +phy_chain_rx_lane_map_physical{49.0}=0x0312 +phy_chain_rx_lane_map_physical{50.0}=0x0312 +phy_chain_rx_lane_map_physical{51.0}=0x0312 +phy_chain_rx_lane_map_physical{52.0}=0x0312 +phy_chain_tx_lane_map_physical{49.0}=0x3210 +phy_chain_tx_lane_map_physical{50.0}=0x3210 +phy_chain_tx_lane_map_physical{51.0}=0x3210 +phy_chain_tx_lane_map_physical{52.0}=0x3210 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x0 + +#FC13 +dport_map_port_39=25 +dport_map_port_40=26 +dport_map_port_41=27 +dport_map_port_42=28 +portmap_39=53:10 +portmap_40=54:10 +portmap_41=55:10 +portmap_42=56:10 +phy_chain_rx_lane_map_physical{53.0}=0x3120 +phy_chain_rx_lane_map_physical{54.0}=0x3120 +phy_chain_rx_lane_map_physical{55.0}=0x3120 +phy_chain_rx_lane_map_physical{56.0}=0x3120 +phy_chain_tx_lane_map_physical{53.0}=0x3102 +phy_chain_tx_lane_map_physical{54.0}=0x3102 +phy_chain_tx_lane_map_physical{55.0}=0x3102 +phy_chain_tx_lane_map_physical{56.0}=0x3102 +phy_chain_rx_polarity_flip_physical{53.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 + +#FC14 +dport_map_port_43=29 +dport_map_port_44=30 +dport_map_port_45=31 +dport_map_port_46=32 +portmap_43=57:10 +portmap_44=58:10 +portmap_45=59:10 +portmap_46=60:10 +phy_chain_rx_lane_map_physical{57.0}=0x3210 +phy_chain_rx_lane_map_physical{58.0}=0x3210 +phy_chain_rx_lane_map_physical{59.0}=0x3210 +phy_chain_rx_lane_map_physical{60.0}=0x3210 +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_tx_lane_map_physical{58.0}=0x3210 +phy_chain_tx_lane_map_physical{59.0}=0x3210 +phy_chain_tx_lane_map_physical{60.0}=0x3210 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 + +#FC15 +dport_map_port_47=33 +dport_map_port_48=34 +dport_map_port_49=35 +dport_map_port_50=36 +portmap_47=61:10 +portmap_48=62:10 +portmap_49=63:10 +portmap_50=64:10 +phy_chain_rx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{62.0}=0x3210 +phy_chain_rx_lane_map_physical{63.0}=0x3210 +phy_chain_rx_lane_map_physical{64.0}=0x3210 +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_tx_lane_map_physical{62.0}=0x3210 +phy_chain_tx_lane_map_physical{63.0}=0x3210 +phy_chain_tx_lane_map_physical{64.0}=0x3210 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 + +#FC16 +dport_map_port_51=37 +dport_map_port_52=38 +dport_map_port_53=39 +dport_map_port_54=40 +portmap_51=65:10 +portmap_52=66:10 +portmap_53=67:10 +portmap_54=68:10 +phy_chain_rx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{66.0}=0x3210 +phy_chain_rx_lane_map_physical{67.0}=0x3210 +phy_chain_rx_lane_map_physical{68.0}=0x3210 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_tx_lane_map_physical{66.0}=0x3210 +phy_chain_tx_lane_map_physical{67.0}=0x3210 +phy_chain_tx_lane_map_physical{68.0}=0x3210 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 +phy_chain_tx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x1 + +#FC17 +dport_map_port_55=41 +dport_map_port_56=42 +dport_map_port_57=43 +dport_map_port_58=44 +portmap_55=69:10 +portmap_56=70:10 +portmap_57=71:10 +portmap_58=72:10 +phy_chain_rx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{70.0}=0x3210 +phy_chain_rx_lane_map_physical{71.0}=0x3210 +phy_chain_rx_lane_map_physical{72.0}=0x3210 +phy_chain_tx_lane_map_physical{69.0}=0x3210 +phy_chain_tx_lane_map_physical{70.0}=0x3210 +phy_chain_tx_lane_map_physical{71.0}=0x3210 +phy_chain_tx_lane_map_physical{72.0}=0x3210 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 + +#FC18 +dport_map_port_59=45 +dport_map_port_60=46 +dport_map_port_61=47 +dport_map_port_62=48 +portmap_59=73:10 +portmap_60=74:10 +portmap_61=75:10 +portmap_62=76:10 +phy_chain_rx_lane_map_physical{73.0}=0x3210 +phy_chain_rx_lane_map_physical{74.0}=0x3210 +phy_chain_rx_lane_map_physical{75.0}=0x3210 +phy_chain_rx_lane_map_physical{76.0}=0x3210 +phy_chain_tx_lane_map_physical{73.0}=0x0231 +phy_chain_tx_lane_map_physical{74.0}=0x0231 +phy_chain_tx_lane_map_physical{75.0}=0x0231 +phy_chain_tx_lane_map_physical{76.0}=0x0231 +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 + +#FC19 + +dport_map_port_64=64 +portmap_64=81:10:m +phy_chain_rx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{81.0}=0x1 + diff --git a/device/accton/x86_64-accton_as5835_54x-r0/Accton-AS5835-54X/port_config.ini b/device/accton/x86_64-accton_as5835_54x-r0/Accton-AS5835-54X/port_config.ini new file mode 100644 index 00000000000..1e4405d1a69 --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54x-r0/Accton-AS5835-54X/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias index speed +Ethernet0 1 tenGigE1 1 10000 +Ethernet1 2 tenGigE2 2 10000 +Ethernet2 3 tenGigE3 3 10000 +Ethernet3 4 tenGigE4 4 10000 +Ethernet4 5 tenGigE5 5 10000 +Ethernet5 6 tenGigE6 6 10000 +Ethernet6 7 tenGigE7 7 10000 +Ethernet7 8 tenGigE8 8 10000 +Ethernet8 9 tenGigE9 9 10000 +Ethernet9 10 tenGigE10 10 10000 +Ethernet10 11 tenGigE11 11 10000 +Ethernet11 12 tenGigE12 12 10000 +Ethernet12 13 tenGigE13 13 10000 +Ethernet13 14 tenGigE14 14 10000 +Ethernet14 15 tenGigE15 15 10000 +Ethernet15 16 tenGigE16 16 10000 +Ethernet16 17 tenGigE17 17 10000 +Ethernet17 18 tenGigE18 18 10000 +Ethernet18 19 tenGigE19 19 10000 +Ethernet19 20 tenGigE20 20 10000 +Ethernet20 21 tenGigE21 21 10000 +Ethernet21 22 tenGigE22 22 10000 +Ethernet22 23 tenGigE23 23 10000 +Ethernet23 24 tenGigE24 24 10000 +Ethernet24 53 tenGigE25 25 10000 +Ethernet25 54 tenGigE26 26 10000 +Ethernet26 55 tenGigE27 27 10000 +Ethernet27 56 tenGigE28 28 10000 +Ethernet28 57 tenGigE29 29 10000 +Ethernet29 58 tenGigE30 30 10000 +Ethernet30 59 tenGigE31 31 10000 +Ethernet31 60 tenGigE32 32 10000 +Ethernet32 61 tenGigE33 33 10000 +Ethernet33 62 tenGigE34 34 10000 +Ethernet34 63 tenGigE35 35 10000 +Ethernet35 64 tenGigE36 36 10000 +Ethernet36 65 tenGigE37 37 10000 +Ethernet37 66 tenGigE38 38 10000 +Ethernet38 67 tenGigE39 39 10000 +Ethernet39 68 tenGigE40 40 10000 +Ethernet40 69 tenGigE41 41 10000 +Ethernet41 70 tenGigE42 42 10000 +Ethernet42 71 tenGigE43 43 10000 +Ethernet43 72 tenGigE44 44 10000 +Ethernet44 73 tenGigE45 45 10000 +Ethernet45 74 tenGigE46 46 10000 +Ethernet46 75 tenGigE47 47 10000 +Ethernet47 76 tenGigE48 48 10000 +Ethernet48 37,38,39,40 hundredGigE49 49 100000 +Ethernet52 29,30,31,32 hundredGigE50 53 100000 +Ethernet56 33,34,35,36 hundredGigE51 57 100000 +Ethernet60 49,50,51,52 hundredGigE52 61 100000 +Ethernet64 45,46,47,48 hundredGigE53 65 100000 +Ethernet68 41,42,43,44 hundredGigE54 69 100000 diff --git a/device/accton/x86_64-accton_as5835_54x-r0/Accton-AS5835-54X/sai.profile b/device/accton/x86_64-accton_as5835_54x-r0/Accton-AS5835-54X/sai.profile new file mode 100644 index 00000000000..8b795f81c4f --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54x-r0/Accton-AS5835-54X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/etc/bcm/mv2-as5835-48x10G+6x100G.config.bcm diff --git a/device/accton/x86_64-accton_as5835_54x-r0/default_sku b/device/accton/x86_64-accton_as5835_54x-r0/default_sku new file mode 100644 index 00000000000..c00cdbf64e5 --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54x-r0/default_sku @@ -0,0 +1 @@ +Accton-AS5835-54X t1 diff --git a/device/accton/x86_64-accton_as5835_54x-r0/installer.conf b/device/accton/x86_64-accton_as5835_54x-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54x-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/accton/x86_64-accton_as5835_54x-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as5835_54x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..7681caafeef --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54x-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as5835_54x-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as5835_54x-r0/plugins/psuutil.py new file mode 100644 index 00000000000..c95bc27897d --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54x-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 1: "11-0050", + 2: "12-0053", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as5835_54x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as5835_54x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..ba8e6181ebe --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54x-r0/plugins/sfputil.py @@ -0,0 +1,386 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +SFP_STATUS_INSERTED = '1' +SFP_STATUS_REMOVED = '0' + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 72 + PORTS_IN_BLOCK = 72 + QSFP_PORT_START = 49 + QSFP_PORT_END = 72 + + BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{1}-0050/" + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _cpld_mapping = { + 0: "3-0060", + 1: "3-0061", + 2: "3-0062", + } + _port_to_i2c_mapping = { + 1: 42, + 2: 43, + 3: 44, + 4: 45, + 5: 46, + 6: 47, + 7: 48, + 8: 49, + 9: 50, + 10: 51, + 11: 52, + 12: 53, + 13: 54, + 14: 55, + 15: 56, + 16: 57, + 17: 58, + 18: 59, + 19: 60, + 20: 61, + 21: 62, + 22: 63, + 23: 64, + 24: 65, + 25: 66, + 26: 67, + 27: 68, + 28: 69, + 29: 70, + 30: 71, + 31: 72, + 32: 73, + 33: 74, + 34: 75, + 35: 76, + 36: 77, + 37: 78, + 38: 79, + 39: 80, + 40: 81, + 41: 82, + 42: 83, + 43: 84, + 44: 85, + 45: 86, + 46: 87, + 47: 88, + 48: 89, + 49: 28, #QSFP49 + 50: 28, + 51: 28, + 52: 28, + 53: 29, #QSFP50 + 54: 29, + 55: 29, + 56: 29, + 57: 26, #QSFP51 + 58: 26, + 59: 26, + 60: 26, + 61: 30, #QSFP52 + 62: 30, + 63: 30, + 64: 30, + 65: 31, #QSFP53 + 66: 31, + 67: 31, + 68: 31, + 69: 27, #QSFP54 + 70: 27, + 71: 27, + 72: 27, + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x]) + + SfpUtilBase.__init__(self) + + + # For port 49~54 are QSFP, here presumed they're all split to 4 lanes. + def get_cage_num(self, port_num): + cage_num = port_num + if (port_num >= self.QSFP_PORT_START): + cage_num = (port_num - self.QSFP_PORT_START)/4 + cage_num = cage_num + self.QSFP_PORT_START + + return cage_num + + # For cage 1~38 are at cpld2, others are at cpld3. + def get_cpld_num(self, port_num): + return 1 if (port_num < 39) else 2 + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + cage_num = self.get_cage_num(port_num) + cpld_i = self.get_cpld_num(port_num) + + cpld_ps = self._cpld_mapping[cpld_i] + path = "/sys/bus/i2c/devices/{0}/module_present_{1}" + port_ps = path.format(cpld_ps, cage_num) + + try: + val_file = open(port_ps) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode_cpld(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + cage_num = self.get_cage_num(port_num) + cpld_i = self.get_cpld_num(port_num) + + cpld_ps = self._cpld_mapping[cpld_i] + path = "/sys/bus/i2c/devices/{0}/module_lpmode_{1}" + lp_mode_path = path.format(cpld_ps, cage_num) + + try: + val_file = open(lp_mode_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + if not self.get_presence(port_num): + return False + + try: + eeprom = None + + eeprom = open(self.port_to_eeprom_mapping[port_num], mode="rb", buffering=0) + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if not (lpmode & 0x1): # 'Power override' bit is 0 + return self.get_low_power_mode_cpld(port_num) + else: + if ((lpmode & 0x2) == 0x2): + return True # Low Power Mode if "Power set" bit is 1 + else: + return False # High Power Mode if "Power set" bit is 0 + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], mode="r+b", buffering=0) + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def reset(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + cage_num = self.get_cage_num(port_num) + cpld_i = self.get_cpld_num(port_num) + cpld_ps = self._cpld_mapping[cpld_i] + path = "/sys/bus/i2c/devices/{0}/module_reset_{1}" + port_ps = path.format(cpld_ps, cage_num) + try: + reg_file = open(port_ps, mode='w', buffering=0) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #toggle reset + reg_file.seek(0) + reg_file.write('0') + time.sleep(1) + reg_file.seek(0) + reg_file.write('1') + reg_file.close() + + return True + + @property + def _get_presence_bitmap(self): + nodes = [] + nodes.append("/sys/bus/i2c/devices/3-0061/module_present_all") + nodes.append("/sys/bus/i2c/devices/3-0062/module_present_all") + + bitmap = "" + for node in nodes: + try: + reg_file = open(node) + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + bitmap += reg_file.readline().rstrip() + " " + reg_file.close() + + rev = bitmap.split(" ") + rev.pop() # Remove the last useless character + + # Convert bitmap into continuously port order + rev[4] = hex((int(rev[4],16) | ((int(rev[5],16) & 0x3) << 6)))[2:] # Port 33-40 + rev[5] = hex((int(rev[5],16) >> 2) | ((int(rev[6],16) & 0x3) << 6))[2:] # Port 41-48 + + # Expand port 49-54 + tmp = rev.pop() + for i in range (2, 8): + val = (int(tmp,16) >> i) & 0x1 + rev.append(hex(val)[2:]) + + for i in range (0,6): + rev[i] = rev[i].zfill(2) + + rev = "".join(rev[::-1]) + return int(rev,16) + + data = {'valid':0, 'present':0} + def get_transceiver_change_event(self, timeout=0): + + start_time = time.time() + port_dict = {} + port = 0 + blocking = False + + if timeout == 0: + blocking = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print "get_transceiver_change_event:Invalid timeout value", timeout + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print 'get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + + reg_value = self._get_presence_bitmap + changed_ports = self.data['present'] ^ reg_value + if changed_ports: + for port in range (self.port_start, self.port_end+1): + # Mask off the bit corresponding to our port + mask = (1 << (port - 1)) + if changed_ports & mask: + + if (reg_value & mask) == 0: + port_dict[port] = SFP_STATUS_REMOVED + else: + port_dict[port] = SFP_STATUS_INSERTED + + # Update cache + self.data['present'] = reg_value + self.data['valid'] = 1 + return True, port_dict + + if blocking: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + print "get_transceiver_change_event: Should not reach here." + return False, {} + + diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as5835_54x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as5835_54x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as6712_32x-r0/Accton-AS6712-32X/port_config.ini b/device/accton/x86_64-accton_as6712_32x-r0/Accton-AS6712-32X/port_config.ini new file mode 100755 index 00000000000..36067bddc1d --- /dev/null +++ b/device/accton/x86_64-accton_as6712_32x-r0/Accton-AS6712-32X/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 49,50,51,52 fortyGigE1 1 40000 +Ethernet4 53,54,55,56 fortyGigE2 2 40000 +Ethernet8 57,58,59,60 fortyGigE3 3 40000 +Ethernet12 61,62,63,64 fortyGigE4 4 40000 +Ethernet16 65,66,67,68 fortyGigE5 5 40000 +Ethernet20 69,70,71,72 fortyGigE6 6 40000 +Ethernet24 73,74,75,76 fortyGigE7 7 40000 +Ethernet28 77,78,79,80 fortyGigE8 8 40000 +Ethernet32 33,34,35,36 fortyGigE9 9 40000 +Ethernet36 37,38,39,40 fortyGigE10 10 40000 +Ethernet40 41,42,43,44 fortyGigE11 11 40000 +Ethernet44 45,46,47,48 fortyGigE12 12 40000 +Ethernet48 81,82,83,84 fortyGigE13 13 40000 +Ethernet52 85,86,87,88 fortyGigE14 14 40000 +Ethernet56 89,90,91,92 fortyGigE15 15 40000 +Ethernet60 93,94,95,96 fortyGigE16 16 40000 +Ethernet64 97,98,99,100 fortyGigE17 17 40000 +Ethernet68 101,102,103,104 fortyGigE18 18 40000 +Ethernet72 105,106,107,108 fortyGigE19 19 40000 +Ethernet76 109,110,111,112 fortyGigE20 20 40000 +Ethernet80 17,18,19,20 fortyGigE21 21 40000 +Ethernet84 21,22,23,24 fortyGigE22 22 40000 +Ethernet88 25,26,27,28 fortyGigE23 23 40000 +Ethernet92 29,30,31,32 fortyGigE24 24 40000 +Ethernet96 113,114,115,116 fortyGigE25 25 40000 +Ethernet100 117,118,119,120 fortyGigE26 26 40000 +Ethernet104 121,122,123,124 fortyGigE27 27 40000 +Ethernet108 125,126,127,128 fortyGigE28 28 40000 +Ethernet112 1,2,3,4 fortyGigE29 29 40000 +Ethernet116 5,6,7,8 fortyGigE30 30 40000 +Ethernet120 9,10,11,12 fortyGigE31 31 40000 +Ethernet124 13,14,15,16 fortyGigE32 32 40000 diff --git a/device/accton/x86_64-accton_as6712_32x-r0/Accton-AS6712-32X/sai.profile b/device/accton/x86_64-accton_as6712_32x-r0/Accton-AS6712-32X/sai.profile new file mode 100644 index 00000000000..22432e548b4 --- /dev/null +++ b/device/accton/x86_64-accton_as6712_32x-r0/Accton-AS6712-32X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-as6712-32x40G.config.bcm diff --git a/device/accton/x86_64-accton_as6712_32x-r0/Accton-AS6712-32X/td2-as6712-32x40G.config.bcm b/device/accton/x86_64-accton_as6712_32x-r0/Accton-AS6712-32X/td2-as6712-32x40G.config.bcm new file mode 100644 index 00000000000..54f3c366fdc --- /dev/null +++ b/device/accton/x86_64-accton_as6712_32x-r0/Accton-AS6712-32X/td2-as6712-32x40G.config.bcm @@ -0,0 +1,132 @@ +os=unix +bcm_stat_flags=0 +parity_enable=0 +parity_correction=0 + +l2_mem_entries=163840 +l3_mem_entries=81920 +mmu_lossless=0 +lls_num_l2uc=12 +module_64ports=0 + +#SFI +serdes_if_type=9 + +port_init_cl72=0 +phy_an_c73=5 # TSCMOD_CL73_CL37 + +#sdk6.5.5 only supports 156(default) or 125 +#xgxs_lcpll_xtal_refclk=1 +tslam_dma_enable=1 +table_dma_enable=1 + +#for 32x40G ports for breakout mode +pbmp_oversubscribe=0x1fffffffe +pbmp_xport_xe=0x1fffffffe + +rate_ext_mdio_divisor=96 + +#QSFP+ 1 from WC0 +portmap_1=1:40 + +#QSFP+ 2 from WC1 +portmap_2=5:40 + +#QSFP+ 3 from WC2 +portmap_3=9:40 + +#QSFP+ 4 from WC3 +portmap_4=13:40 + +#QSFP+ 5 from WC4 +portmap_5=17:40 + +#QSFP+ 6 from WC5 +portmap_6=21:40 + +#QSFP+ 7 from WC6 +portmap_7=25:40 + +#QSFP+ 8 from WC7 +portmap_8=29:40 + +#QSFP+ 9 from WC8 +portmap_9=33:40 + +#QSFP+ 10 from WC9 +portmap_10=37:40 + +#QSFP+ 11 from WC10 +portmap_11=41:40 + +#QSFP+ 12 from WC11 +portmap_12=45:40 + +#QSFP+ 13 from WC12 +portmap_13=49:40 + +#QSFP+ 14 from WC13 +portmap_14=53:40 + +#QSFP+ 15 from WC14 +portmap_15=57:40 + +#QSFP+ 16 from WC15 +portmap_16=61:40 + +#QSFP+ 17 from WC16 +portmap_17=65:40 + +#QSFP+ 18 from WC17 +portmap_18=69:40 + +#QSFP+ 19 from WC18 +portmap_19=73:40 + +#QSFP+ 20 from WC19 +portmap_20=77:40 + +#QSFP+ 21 from WC20 +portmap_21=81:40 + +#QSFP+ 22 from WC21 +portmap_22=85:40 + +#QSFP+ 23 from WC22 +portmap_23=89:40 + +#QSFP+ 24 from WC23 +portmap_24=93:40 + +#QSFP+ 25 from WC24 +portmap_25=97:40 + +#QSFP+ 26 from WC25 +portmap_26=101:40 + +#QSFP+ 27 from WC26 +portmap_27=105:40 + +#QSFP+ 28 from WC27 +portmap_28=109:40 + +#QSFP+ 29 from WC28 +portmap_29=113:40 + +#QSFP+ 30 from WC29 +portmap_30=117:40 + +#QSFP+ 31 from WC30 +portmap_31=121:40 + +#QSFP+ 32 from WC31 +portmap_32=125:40 + +# L3 ECMP +# - In Trident2, VP LAGs share the same table as ECMP group table. +# The first N entries are reserved for VP LAGs, where N is the value of the +# config property "max_vp_lags". By default this was set to 256 +l3_max_ecmp_mode=1 +max_vp_lags=0 + +stable_size=0x2000000 diff --git a/device/accton/x86_64-accton_as6712_32x-r0/default_sku b/device/accton/x86_64-accton_as6712_32x-r0/default_sku new file mode 100644 index 00000000000..d8cdd655905 --- /dev/null +++ b/device/accton/x86_64-accton_as6712_32x-r0/default_sku @@ -0,0 +1 @@ +Accton-AS6712-32X t1 diff --git a/device/accton/x86_64-accton_as6712_32x-r0/installer.conf b/device/accton/x86_64-accton_as6712_32x-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/accton/x86_64-accton_as6712_32x-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/accton/x86_64-accton_as6712_32x-r0/led_proc_init.soc b/device/accton/x86_64-accton_as6712_32x-r0/led_proc_init.soc new file mode 100644 index 00000000000..9e29adf790d --- /dev/null +++ b/device/accton/x86_64-accton_as6712_32x-r0/led_proc_init.soc @@ -0,0 +1,104 @@ +# LED setting for active +# ----------------------------------------------------------------------------- +# for as6712_32x (32 qxg) +# ----------------------------------------------------------------------------- + +s CMIC_LEDUP0_DATA_RAM 0 +s CMIC_LEDUP1_DATA_RAM 0 + +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=1 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=2 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=5 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=6 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=7 + +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=9 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=10 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=11 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=13 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=14 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=15 + + +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=62 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=61 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=59 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=58 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=57 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=54 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=53 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=51 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=50 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=49 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=46 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=45 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=43 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=42 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=41 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=39 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=38 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=37 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=35 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=34 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=33 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=31 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=30 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=29 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=27 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=26 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=25 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=23 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=22 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=21 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=19 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=18 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=17 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=16 + + +led 0 stop +led 0 prog \ + 02 F9 42 80 02 F7 42 00 02 F8 42 00 02 F4 42 90 02 \ + F3 42 10 67 6A 67 6A 67 38 67 6A 67 6A 67 6A 67 6A \ + 67 6A 67 6A 86 F8 06 F3 D6 F8 74 14 86 F0 3E F4 67 \ + 6A 57 67 7E 57 06 F8 88 80 4A 00 27 97 75 35 90 4A \ + 00 27 4A 01 27 B7 97 71 4F 77 32 06 F5 D6 F0 74 62 \ + 02 F5 4A 07 37 4E 07 02 F0 42 00 4E 07 02 F5 4A 07 \ + 71 32 77 35 16 F7 06 F9 17 4D DA 07 74 7B 12 F7 52 \ + 00 86 F9 57 86 F7 57 16 F7 06 F9 07 4D DA 07 74 8F \ + 12 F7 52 00 86 F9 57 86 F7 57 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 +led 0 start + +led 1 stop +led 1 prog \ + 02 F9 42 80 02 F7 42 00 02 F8 42 01 02 F4 42 90 02 \ + F3 42 11 67 6A 67 6A 67 38 67 6A 67 6A 67 6A 67 6A \ + 67 6A 67 6A 86 F8 06 F3 D6 F8 74 14 86 F0 3E F4 67 \ + 6A 57 67 7E 57 06 F8 88 80 4A 00 27 97 75 35 90 4A \ + 00 27 4A 01 27 B7 97 71 4F 77 32 06 F5 D6 F0 74 62 \ + 02 F5 4A 07 37 4E 07 02 F0 42 00 4E 07 02 F5 4A 07 \ + 71 32 77 35 16 F7 06 F9 17 4D DA 07 74 7B 12 F7 52 \ + 00 86 F9 57 86 F7 57 16 F7 06 F9 07 4D DA 07 74 8F \ + 12 F7 52 00 86 F9 57 86 F7 57 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 +led 1 start diff --git a/device/accton/x86_64-accton_as6712_32x-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as6712_32x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..7681caafeef --- /dev/null +++ b/device/accton/x86_64-accton_as6712_32x-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as6712_32x-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as6712_32x-r0/plugins/psuutil.py new file mode 100644 index 00000000000..191654429e6 --- /dev/null +++ b/device/accton/x86_64-accton_as6712_32x-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 1: "35-0038", + 2: "36-003b", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as6712_32x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as6712_32x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..661ecc72243 --- /dev/null +++ b/device/accton/x86_64-accton_as6712_32x-r0/plugins/sfputil.py @@ -0,0 +1,311 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import os + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +#from xcvrd +SFP_STATUS_INSERTED = '1' +SFP_STATUS_REMOVED = '0' + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 32 + PORTS_IN_BLOCK = 32 + QSFP_PORT_START = 1 + QSFP_PORT_END = 32 + + I2C_DEV_PATH = "/sys/bus/i2c/devices/" + BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{1}-0050/" + BASE_OOM_PATH = "/sys/bus/i2c/devices/{0}-0050/" + CPLD_ADDRESS = ['-0062', '-0064'] + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 1: [1, 2], + 2: [2, 3], + 3: [3, 4], + 4: [4, 5], + 5: [5, 6], + 6: [6, 7], + 7: [7, 8], + 8: [8, 9], + 9: [9, 10], + 10: [10, 11], + 11: [11, 12], + 12: [12, 13], + 13: [13, 14], + 14: [14, 15], + 15: [15, 16], + 16: [16, 17], + 17: [17, 18], + 18: [18, 19], + 19: [19, 20], + 20: [20, 21], + 21: [21, 22], + 22: [22, 23], + 23: [23, 24], + 24: [24, 25], + 25: [25, 26], + 26: [26, 27], + 27: [27, 28], + 28: [28, 29], + 29: [29, 30], + 30: [30, 31], + 31: [31, 32], + 32: [32, 33], + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = self.BASE_OOM_PATH + "eeprom" + + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x][1] + ) + SfpUtilBase.__init__(self) + + def get_cpld_dev_path(self, port_num): + if port_num <= 16: + cpld_num = 0 + else: + cpld_num = 1 + + #cpld can be at either bus 0 or bus 1. + cpld_path = self.I2C_DEV_PATH + str(0) + self.CPLD_ADDRESS[cpld_num] + if not os.path.exists(cpld_path): + cpld_path = self.I2C_DEV_PATH + str(1) + self.CPLD_ADDRESS[cpld_num] + return cpld_path + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + + cpld_path = self.get_cpld_dev_path(port_num) + present_path = cpld_path + "/module_present_" + present_path += str(self._port_to_i2c_mapping[port_num][0]) + + self.__port_to_is_present = present_path + + try: + val_file = open(self.__port_to_is_present) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode_cpld(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + cpld_path = self.get_cpld_dev_path(port_num) + _path = cpld_path + "/module_lp_mode_" + _path += str(self._port_to_i2c_mapping[port_num][0]) + + try: + reg_file = open(_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + reg_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + if not self.get_presence(port_num): + return False + + try: + eeprom = None + + eeprom = open(self.port_to_eeprom_mapping[port_num], mode="rb", buffering=0) + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if not (lpmode & 0x1): # 'Power override' bit is 0 + return self.get_low_power_mode_cpld(port_num) + else: + if ((lpmode & 0x2) == 0x2): + return True # Low Power Mode if "Power set" bit is 1 + else: + return False # High Power Mode if "Power set" bit is 0 + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], mode="r+b", buffering=0) + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def reset(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + cpld_path = self.get_cpld_dev_path(port_num) + _path = cpld_path + "/module_reset_" + _path += str(self._port_to_i2c_mapping[port_num][0]) + + try: + reg_file = open(_path, 'w') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_file.seek(0) + reg_file.write('1') + time.sleep(1) + reg_file.seek(0) + reg_file.write('0') + reg_file.close() + + return True + + @property + def get_transceiver_status(self): + nodes = [] + + cpld_path = self.get_cpld_dev_path(self.port_start) + nodes.append(cpld_path + "/module_present_all") + cpld_path = self.get_cpld_dev_path(self.port_end) + nodes.append(cpld_path + "/module_present_all") + + bitmap = "" + for node in nodes: + try: + reg_file = open(node) + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + bitmap += reg_file.readline().rstrip() + " " + reg_file.close() + + rev = bitmap.split(" ") + rev = "".join(rev[::-1]) + return int(rev,16) + + + data = {'valid':0, 'last':0, 'present':0} + def get_transceiver_change_event(self, timeout=2000): + now = time.time() + port_dict = {} + port = 0 + + if timeout < 1000: + timeout = 1000 + timeout = (timeout) / float(1000) # Convert to secs + + + if now < (self.data['last'] + timeout) and self.data['valid']: + return True, {} + + reg_value = self.get_transceiver_status + changed_ports = self.data['present'] ^ reg_value + if changed_ports: + for port in range (self.port_start, self.port_end+1): + # Mask off the bit corresponding to our port + fp_port = self._port_to_i2c_mapping[port][0] + mask = (1 << (fp_port - 1)) + if changed_ports & mask: + + if (reg_value & mask) == 0: + port_dict[port] = SFP_STATUS_REMOVED + else: + port_dict[port] = SFP_STATUS_INSERTED + + # Update cache + self.data['present'] = reg_value + self.data['last'] = now + self.data['valid'] = 1 + + return True, port_dict + else: + return True, {} + return False, {} + + diff --git a/device/accton/x86_64-accton_as6712_32x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as6712_32x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as6712_32x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as6712_32x-r0/sensors.conf b/device/accton/x86_64-accton_as6712_32x-r0/sensors.conf new file mode 100644 index 00000000000..84ee0fd9f33 --- /dev/null +++ b/device/accton/x86_64-accton_as6712_32x-r0/sensors.conf @@ -0,0 +1,23 @@ +# libsensors configuration file for AS6712-32X +# ------------------------------------------------ + +chip "cpr_4011_4mxx-i2c-*-3c" + label in1 "PSU1_VIN" + label in2 "PSU1_VOUT" + label curr1 "PSU1_IIN" + label curr2 "PSU1_IOUT" + label power1 "PSU1_PIN" + label power2 "PSU1_POUT" + label fan1 "PSU1_FAN" + label temp1 "PSU1_TEMP" + +chip "cpr_4011_4mxx-i2c-*-3f" + label in1 "PSU2_VIN" + label in2 "PSU2_VOUT" + label curr1 "PSU2_IIN" + label curr2 "PSU2_IOUT" + label power1 "PSU2_PIN" + label power2 "PSU2_POUT" + label fan1 "PSU2_FAN" + label temp1 "PSU2_TEMP" + diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/buffers.json.j2 b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/buffers.json.j2 new file mode 100644 index 00000000000..9354b7ec5b5 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} \ No newline at end of file diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/buffers_defaults_t0.j2 b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..a47675b8dfa --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/buffers_defaults_t0.j2 @@ -0,0 +1,72 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '20971328' %} +{% set ingress_lossy_pool_size = '20971328' %} +{% set egress_lossless_pool_size = '20971328' %} +{% set egress_lossy_pool_size = '20971328' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 48) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(48, 54) %} + {%- if PORT_ALL.append("Ethernet%d" % (48 + (port_idx-48) * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "static" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"78400", + "xoff":"132160", + "size":"3584", + "static_th":"82880" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"3584", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"3584", + "dynamic_th":"-4" + } + }, +{%- endmacro %} + +{# the typo of generate_pg_profils dued to buffers_config.j2 #} +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + } +{%- endmacro %} + +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} \ No newline at end of file diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/buffers_defaults_t1.j2 b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..a47675b8dfa --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/buffers_defaults_t1.j2 @@ -0,0 +1,72 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '20971328' %} +{% set ingress_lossy_pool_size = '20971328' %} +{% set egress_lossless_pool_size = '20971328' %} +{% set egress_lossy_pool_size = '20971328' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 48) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(48, 54) %} + {%- if PORT_ALL.append("Ethernet%d" % (48 + (port_idx-48) * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "static" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"78400", + "xoff":"132160", + "size":"3584", + "static_th":"82880" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"3584", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"3584", + "dynamic_th":"-4" + } + }, +{%- endmacro %} + +{# the typo of generate_pg_profils dued to buffers_config.j2 #} +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + } +{%- endmacro %} + +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} \ No newline at end of file diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/led.bin b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/led.bin new file mode 100644 index 00000000000..bb4426fb59f Binary files /dev/null and b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/led.bin differ diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/nephos_dac.dsh b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/nephos_dac.dsh new file mode 100644 index 00000000000..42102053c3f --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/nephos_dac.dsh @@ -0,0 +1,414 @@ +init start stage unit=0 low-level +init set port-map unit=0 port=0 eth-macro=2 lane=0 max-speed=25g active=true +init set port-map unit=0 port=1 eth-macro=2 lane=1 max-speed=25g active=true +init set port-map unit=0 port=2 eth-macro=2 lane=2 max-speed=25g active=true +init set port-map unit=0 port=3 eth-macro=2 lane=3 max-speed=25g active=true +init set port-map unit=0 port=4 eth-macro=3 lane=0 max-speed=25g active=true +init set port-map unit=0 port=5 eth-macro=3 lane=1 max-speed=25g active=true +init set port-map unit=0 port=6 eth-macro=3 lane=2 max-speed=25g active=true +init set port-map unit=0 port=7 eth-macro=3 lane=3 max-speed=25g active=true +init set port-map unit=0 port=8 eth-macro=4 lane=0 max-speed=25g active=true +init set port-map unit=0 port=9 eth-macro=4 lane=1 max-speed=25g active=true +init set port-map unit=0 port=10 eth-macro=4 lane=2 max-speed=25g active=true +init set port-map unit=0 port=11 eth-macro=4 lane=3 max-speed=25g active=true +init set port-map unit=0 port=12 eth-macro=5 lane=0 max-speed=25g active=true +init set port-map unit=0 port=13 eth-macro=5 lane=1 max-speed=25g active=true +init set port-map unit=0 port=14 eth-macro=5 lane=2 max-speed=25g active=true +init set port-map unit=0 port=15 eth-macro=5 lane=3 max-speed=25g active=true +init set port-map unit=0 port=16 eth-macro=8 lane=0 max-speed=25g active=true +init set port-map unit=0 port=17 eth-macro=8 lane=1 max-speed=25g active=true +init set port-map unit=0 port=18 eth-macro=8 lane=2 max-speed=25g active=true +init set port-map unit=0 port=19 eth-macro=8 lane=3 max-speed=25g active=true +init set port-map unit=0 port=20 eth-macro=10 lane=0 max-speed=25g active=true +init set port-map unit=0 port=21 eth-macro=10 lane=1 max-speed=25g active=true +init set port-map unit=0 port=22 eth-macro=10 lane=2 max-speed=25g active=true +init set port-map unit=0 port=23 eth-macro=10 lane=3 max-speed=25g active=true +init set port-map unit=0 port=24 eth-macro=12 lane=0 max-speed=25g active=true +init set port-map unit=0 port=25 eth-macro=12 lane=1 max-speed=25g active=true +init set port-map unit=0 port=26 eth-macro=12 lane=2 max-speed=25g active=true +init set port-map unit=0 port=27 eth-macro=12 lane=3 max-speed=25g active=true +init set port-map unit=0 port=28 eth-macro=14 lane=0 max-speed=25g active=true +init set port-map unit=0 port=29 eth-macro=14 lane=1 max-speed=25g active=true +init set port-map unit=0 port=30 eth-macro=14 lane=2 max-speed=25g active=true +init set port-map unit=0 port=31 eth-macro=14 lane=3 max-speed=25g active=true +init set port-map unit=0 port=32 eth-macro=16 lane=0 max-speed=25g active=true +init set port-map unit=0 port=33 eth-macro=16 lane=1 max-speed=25g active=true +init set port-map unit=0 port=34 eth-macro=16 lane=2 max-speed=25g active=true +init set port-map unit=0 port=35 eth-macro=16 lane=3 max-speed=25g active=true +init set port-map unit=0 port=36 eth-macro=17 lane=0 max-speed=25g active=true +init set port-map unit=0 port=37 eth-macro=17 lane=1 max-speed=25g active=true +init set port-map unit=0 port=38 eth-macro=17 lane=2 max-speed=25g active=true +init set port-map unit=0 port=39 eth-macro=17 lane=3 max-speed=25g active=true +init set port-map unit=0 port=40 eth-macro=18 lane=0 max-speed=25g active=true +init set port-map unit=0 port=41 eth-macro=18 lane=1 max-speed=25g active=true +init set port-map unit=0 port=42 eth-macro=18 lane=2 max-speed=25g active=true +init set port-map unit=0 port=43 eth-macro=18 lane=3 max-speed=25g active=true +init set port-map unit=0 port=44 eth-macro=19 lane=0 max-speed=25g active=true +init set port-map unit=0 port=45 eth-macro=19 lane=1 max-speed=25g active=true +init set port-map unit=0 port=46 eth-macro=19 lane=2 max-speed=25g active=true +init set port-map unit=0 port=47 eth-macro=19 lane=3 max-speed=25g active=true +init set port-map unit=0 port=48 eth-macro=21 lane=0 max-speed=100g active=true +init set port-map unit=0 port=49 eth-macro=20 lane=0 max-speed=100g active=true +init set port-map unit=0 port=50 eth-macro=26 lane=0 max-speed=100g active=true +init set port-map unit=0 port=51 eth-macro=27 lane=0 max-speed=100g active=true +init set port-map unit=0 port=52 eth-macro=28 lane=0 max-speed=100g active=true +init set port-map unit=0 port=53 eth-macro=29 lane=0 max-speed=100g active=true +init set port-map unit=0 port=129 eth-macro=0 lane=1 max-speed=10g active=true guarantee=true cpi=true +init set port-map unit=0 port=130 eth-macro=0 lane=0 max-speed=10g active=true guarantee=true cpi=true init-done=true +init start stage unit=0 task-rsrc +init start stage unit=0 module +init start stage unit=0 task +phy set lane-swap unit=0 portlist=0 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=1 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=2 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=3 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=4 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=5 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=6 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=7 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=8 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=9 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=10 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=11 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=12 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=13 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=14 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=15 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=16 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=17 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=18 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=19 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=20 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=21 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=22 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=23 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=24 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=25 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=26 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=27 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=28 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=29 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=30 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=31 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=32 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=33 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=34 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=35 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=36 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=37 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=38 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=39 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=40 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=41 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=42 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=43 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=44 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=45 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=46 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=47 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=48 lane-cnt=4 property=tx data=0x1.3.0.2 +phy set lane-swap unit=0 portlist=49 lane-cnt=4 property=tx data=0x0.3.1.2 +phy set lane-swap unit=0 portlist=50 lane-cnt=4 property=tx data=0x1.3.0.2 +phy set lane-swap unit=0 portlist=51 lane-cnt=4 property=tx data=0x2.0.3.1 +phy set lane-swap unit=0 portlist=52 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=53 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=0 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=1 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=2 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=3 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=4 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=5 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=6 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=7 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=8 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=9 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=10 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=11 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=12 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=13 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=14 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=15 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=16 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=17 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=18 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=19 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=20 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=21 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=22 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=23 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=24 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=25 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=26 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=27 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=28 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=29 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=30 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=31 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=32 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=33 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=34 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=35 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=36 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=37 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=38 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=39 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=40 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=41 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=42 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=43 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=44 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=45 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=46 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=47 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=48 lane-cnt=4 property=rx data=0x2.1.0.3 +phy set lane-swap unit=0 portlist=49 lane-cnt=4 property=rx data=0x0.1.3.2 +phy set lane-swap unit=0 portlist=50 lane-cnt=4 property=rx data=0x3.1.0.2 +phy set lane-swap unit=0 portlist=51 lane-cnt=4 property=rx data=0x1.3.0.2 +phy set lane-swap unit=0 portlist=52 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=53 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set polarity-rev unit=0 portlist=0 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=1 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=2 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=3 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=4 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=5 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=6 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=7 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=8 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=9 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=10 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=11 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=12 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=13 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=14 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=15 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=16 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=17 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=18 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=19 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=20 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=21 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=22 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=23 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=24 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=25 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=26 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=27 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=28 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=29 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=30 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=31 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=32 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=33 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=34 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=35 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=36 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=37 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=38 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=39 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=40 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=41 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=42 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=43 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=44 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=45 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=46 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=47 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=48 lane-cnt=4 property=tx data=0x0.0.0.1 +phy set polarity-rev unit=0 portlist=49 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=50 lane-cnt=4 property=tx data=0x1.1.0.0 +phy set polarity-rev unit=0 portlist=51 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=52 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=53 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=0 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=1 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=2 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=3 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=4 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=5 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=6 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=7 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=8 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=9 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=10 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=11 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=12 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=13 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=14 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=15 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=16 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=17 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=18 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=19 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=20 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=21 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=22 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=23 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=24 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=25 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=26 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=27 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=28 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=29 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=30 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=31 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=32 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=33 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=34 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=35 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=36 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=37 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=38 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=39 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=40 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=41 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=42 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=43 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=44 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=45 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=46 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=47 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=48 lane-cnt=4 property=rx data=0x0.1.0.1 +phy set polarity-rev unit=0 portlist=49 lane-cnt=4 property=rx data=0x1.0.1.0 +phy set polarity-rev unit=0 portlist=50 lane-cnt=4 property=rx data=0x0.0.1.0 +phy set polarity-rev unit=0 portlist=51 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev unit=0 portlist=52 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=53 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=0 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=0 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=0 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=0 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=4 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=4 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=4 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=4 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=8 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=8 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=8 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=8 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=12 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=12 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=12 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=12 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=16 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=16 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=16 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=16 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=20 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=20 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=20 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=20 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=24 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=24 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=24 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=24 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=28 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=28 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=28 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=28 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=32 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=32 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=32 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=32 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=36 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=36 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=36 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=36 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=40 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=40 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=40 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=40 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=44 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=44 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=44 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=44 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=c2 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=cn1 data=0x4.4.4.4 +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=c0 data=0x1e.1e.1e.1e +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=c1 data=0x2.2.2.2 +phy set mdio portlist=0 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=1 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=2 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=3 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=4 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=5 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=6 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=7 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=8 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=9 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=10 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=11 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=12 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=13 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=14 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=15 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=16 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=17 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=18 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=19 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=20 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=21 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=22 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=23 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=24 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=25 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=26 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=27 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=28 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=29 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=30 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=31 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=32 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=33 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=34 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=35 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=36 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=37 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=38 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=39 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=40 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=41 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=42 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=43 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=44 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=45 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=46 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=47 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=48 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=49 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=50 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=51 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=52 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=53 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=129 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=130 devad=0x1E addr=0x2 data=0x0000 +port set property unit=0 portlist=0-47 speed=25g +port set property unit=0 portlist=48-53 speed=100g +port set property unit=0 portlist=129-130 speed=10g +port set property unit=0 portlist=0-47 medium-type=cr +port set property unit=0 portlist=48-53 medium-type=cr4 +port set property unit=0 portlist=129-130 medium-type=kr +port set adver unit=0 portlist=129-130 speed-10g-kr +port set property unit=0 portlist=129-130 an=enable +port set property unit=0 portlist=129-130 admin=enable +port set property unit=0 portlist=0-53 admin=disable diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/nephos_opt.dsh b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/nephos_opt.dsh new file mode 100644 index 00000000000..ca2bc649768 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/nephos_opt.dsh @@ -0,0 +1,415 @@ +init start stage unit=0 low-level +init set port-map unit=0 port=0 eth-macro=2 lane=0 max-speed=25g active=true +init set port-map unit=0 port=1 eth-macro=2 lane=1 max-speed=25g active=true +init set port-map unit=0 port=2 eth-macro=2 lane=2 max-speed=25g active=true +init set port-map unit=0 port=3 eth-macro=2 lane=3 max-speed=25g active=true +init set port-map unit=0 port=4 eth-macro=3 lane=0 max-speed=25g active=true +init set port-map unit=0 port=5 eth-macro=3 lane=1 max-speed=25g active=true +init set port-map unit=0 port=6 eth-macro=3 lane=2 max-speed=25g active=true +init set port-map unit=0 port=7 eth-macro=3 lane=3 max-speed=25g active=true +init set port-map unit=0 port=8 eth-macro=4 lane=0 max-speed=25g active=true +init set port-map unit=0 port=9 eth-macro=4 lane=1 max-speed=25g active=true +init set port-map unit=0 port=10 eth-macro=4 lane=2 max-speed=25g active=true +init set port-map unit=0 port=11 eth-macro=4 lane=3 max-speed=25g active=true +init set port-map unit=0 port=12 eth-macro=5 lane=0 max-speed=25g active=true +init set port-map unit=0 port=13 eth-macro=5 lane=1 max-speed=25g active=true +init set port-map unit=0 port=14 eth-macro=5 lane=2 max-speed=25g active=true +init set port-map unit=0 port=15 eth-macro=5 lane=3 max-speed=25g active=true +init set port-map unit=0 port=16 eth-macro=8 lane=0 max-speed=25g active=true +init set port-map unit=0 port=17 eth-macro=8 lane=1 max-speed=25g active=true +init set port-map unit=0 port=18 eth-macro=8 lane=2 max-speed=25g active=true +init set port-map unit=0 port=19 eth-macro=8 lane=3 max-speed=25g active=true +init set port-map unit=0 port=20 eth-macro=10 lane=0 max-speed=25g active=true +init set port-map unit=0 port=21 eth-macro=10 lane=1 max-speed=25g active=true +init set port-map unit=0 port=22 eth-macro=10 lane=2 max-speed=25g active=true +init set port-map unit=0 port=23 eth-macro=10 lane=3 max-speed=25g active=true +init set port-map unit=0 port=24 eth-macro=12 lane=0 max-speed=25g active=true +init set port-map unit=0 port=25 eth-macro=12 lane=1 max-speed=25g active=true +init set port-map unit=0 port=26 eth-macro=12 lane=2 max-speed=25g active=true +init set port-map unit=0 port=27 eth-macro=12 lane=3 max-speed=25g active=true +init set port-map unit=0 port=28 eth-macro=14 lane=0 max-speed=25g active=true +init set port-map unit=0 port=29 eth-macro=14 lane=1 max-speed=25g active=true +init set port-map unit=0 port=30 eth-macro=14 lane=2 max-speed=25g active=true +init set port-map unit=0 port=31 eth-macro=14 lane=3 max-speed=25g active=true +init set port-map unit=0 port=32 eth-macro=16 lane=0 max-speed=25g active=true +init set port-map unit=0 port=33 eth-macro=16 lane=1 max-speed=25g active=true +init set port-map unit=0 port=34 eth-macro=16 lane=2 max-speed=25g active=true +init set port-map unit=0 port=35 eth-macro=16 lane=3 max-speed=25g active=true +init set port-map unit=0 port=36 eth-macro=17 lane=0 max-speed=25g active=true +init set port-map unit=0 port=37 eth-macro=17 lane=1 max-speed=25g active=true +init set port-map unit=0 port=38 eth-macro=17 lane=2 max-speed=25g active=true +init set port-map unit=0 port=39 eth-macro=17 lane=3 max-speed=25g active=true +init set port-map unit=0 port=40 eth-macro=18 lane=0 max-speed=25g active=true +init set port-map unit=0 port=41 eth-macro=18 lane=1 max-speed=25g active=true +init set port-map unit=0 port=42 eth-macro=18 lane=2 max-speed=25g active=true +init set port-map unit=0 port=43 eth-macro=18 lane=3 max-speed=25g active=true +init set port-map unit=0 port=44 eth-macro=19 lane=0 max-speed=25g active=true +init set port-map unit=0 port=45 eth-macro=19 lane=1 max-speed=25g active=true +init set port-map unit=0 port=46 eth-macro=19 lane=2 max-speed=25g active=true +init set port-map unit=0 port=47 eth-macro=19 lane=3 max-speed=25g active=true +init set port-map unit=0 port=48 eth-macro=21 lane=0 max-speed=100g active=true +init set port-map unit=0 port=49 eth-macro=20 lane=0 max-speed=100g active=true +init set port-map unit=0 port=50 eth-macro=26 lane=0 max-speed=100g active=true +init set port-map unit=0 port=51 eth-macro=27 lane=0 max-speed=100g active=true +init set port-map unit=0 port=52 eth-macro=28 lane=0 max-speed=100g active=true +init set port-map unit=0 port=53 eth-macro=29 lane=0 max-speed=100g active=true +init set port-map unit=0 port=129 eth-macro=0 lane=1 max-speed=10g active=true guarantee=true cpi=true +init set port-map unit=0 port=130 eth-macro=0 lane=0 max-speed=10g active=true guarantee=true cpi=true init-done=true +init start stage unit=0 task-rsrc +init start stage unit=0 module +init start stage unit=0 task +phy set lane-swap portlist=0 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=1 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=2 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=3 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=4 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=5 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=6 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=7 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=8 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=9 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=10 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=11 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=12 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=13 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=14 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=15 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=16 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=17 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=18 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=19 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=20 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=21 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=22 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=23 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=24 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=25 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=26 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=27 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=28 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=29 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=30 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=31 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=32 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=33 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=34 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=35 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=36 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=37 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=38 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=39 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=40 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=41 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=42 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=43 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=44 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=45 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=46 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=47 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=48 lane-cnt=4 property=tx data=0x1.3.0.2 +phy set lane-swap portlist=49 lane-cnt=4 property=tx data=0x0.3.1.2 +phy set lane-swap portlist=50 lane-cnt=4 property=tx data=0x1.3.0.2 +phy set lane-swap portlist=51 lane-cnt=4 property=tx data=0x2.0.3.1 +phy set lane-swap portlist=52 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap portlist=53 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap portlist=0 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=1 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=2 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=3 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=4 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=5 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=6 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=7 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=8 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=9 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=10 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=11 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=12 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=13 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=14 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=15 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=16 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=17 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=18 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=19 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=20 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=21 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=22 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=23 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=24 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=25 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=26 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=27 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=28 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=29 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=30 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=31 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=32 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=33 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=34 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=35 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=36 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=37 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=38 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=39 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=40 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=41 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=42 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=43 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=44 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=45 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=46 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=47 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=48 lane-cnt=4 property=rx data=0x2.1.0.3 +phy set lane-swap portlist=49 lane-cnt=4 property=rx data=0x0.1.3.2 +phy set lane-swap portlist=50 lane-cnt=4 property=rx data=0x3.1.0.2 +phy set lane-swap portlist=51 lane-cnt=4 property=rx data=0x1.3.0.2 +phy set lane-swap portlist=52 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap portlist=53 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set polarity-rev portlist=0 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=1 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=2 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=3 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=4 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=5 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=6 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=7 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=8 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=9 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=10 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=11 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=12 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=13 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=14 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=15 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=16 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=17 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=18 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=19 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=20 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=21 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=22 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=23 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=24 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=25 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=26 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=27 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=28 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=29 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=30 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=31 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=32 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=33 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=34 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=35 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=36 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=37 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=38 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=39 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=40 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=41 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=42 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=43 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=44 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=45 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=46 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=47 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=48 lane-cnt=4 property=tx data=0x0.0.0.1 +phy set polarity-rev portlist=49 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=50 lane-cnt=4 property=tx data=0x1.1.0.0 +phy set polarity-rev portlist=51 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=52 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=53 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=0 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=1 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=2 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=3 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=4 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=5 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=6 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=7 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=8 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=9 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=10 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=11 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=12 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=13 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=14 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=15 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=16 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=17 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=18 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=19 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=20 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=21 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=22 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=23 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=24 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=25 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=26 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=27 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=28 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=29 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=30 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=31 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=32 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=33 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=34 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=35 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=36 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=37 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=38 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=39 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=40 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=41 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=42 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=43 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=44 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=45 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=46 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=47 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=48 lane-cnt=4 property=rx data=0x0.1.0.1 +phy set polarity-rev portlist=49 lane-cnt=4 property=rx data=0x1.0.1.0 +phy set polarity-rev portlist=50 lane-cnt=4 property=rx data=0x0.0.1.0 +phy set polarity-rev portlist=51 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=52 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=53 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set pre-emphasis portlist=0 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=0 lane-cnt=4 property=cn1 data=0x1.1.1.1 +phy set pre-emphasis portlist=0 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a +phy set pre-emphasis portlist=0 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=4 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=4 lane-cnt=4 property=cn1 data=0x1.1.1.1 +phy set pre-emphasis portlist=4 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a +phy set pre-emphasis portlist=4 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=8 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=8 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=8 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=8 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=12 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=12 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=12 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=12 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=16 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=16 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=16 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=16 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=20 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=20 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=20 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=20 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=24 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=24 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=24 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=24 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=28 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=28 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=28 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=28 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=32 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=32 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=32 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=32 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=36 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=36 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=36 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=36 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=40 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=40 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=40 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=40 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=44 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=44 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=44 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=44 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=48 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=48 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=48 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=48 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=49 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=49 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=49 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=49 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=50 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=50 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=50 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=50 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=51 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=51 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=51 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=51 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=52 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=52 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=52 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a +phy set pre-emphasis portlist=52 lane-cnt=4 property=c1 data=0x8.8.8.8 +phy set pre-emphasis portlist=53 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=53 lane-cnt=4 property=cn1 data=0x1.1.1.1 +phy set pre-emphasis portlist=53 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a +phy set pre-emphasis portlist=53 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set mdio portlist=0 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=1 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=2 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=3 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=4 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=5 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=6 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=7 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=8 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=9 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=10 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=11 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=12 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=13 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=14 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=15 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=16 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=17 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=18 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=19 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=20 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=21 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=22 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=23 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=24 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=25 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=26 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=27 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=28 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=29 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=30 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=31 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=32 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=33 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=34 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=35 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=36 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=37 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=38 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=39 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=40 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=41 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=42 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=43 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=44 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=45 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=46 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=47 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=48 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=49 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=50 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=51 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=52 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=53 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=129 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=130 devad=0x1E addr=0x2 data=0x0000 +port set property portlist=0-47 speed=25g +port set property portlist=48-53 speed=100g +port set property portlist=129-130 speed=10g +port set property portlist=0-47 medium-type=sr +port set property portlist=48-53 medium-type=sr4 +port set property portlist=129-130 medium-type=kr +port set adver portlist=129-130 speed-10g-kr +port set property portlist=129-130 an=enable +port set property unit=0 portlist=129-130 admin=enable +port set property unit=0 portlist=0-53 admin=disable + diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/pg_profile_lookup.ini b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/pg_profile_lookup.ini new file mode 100644 index 00000000000..d98b0eca6d1 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 3584 32256 59136 36736 + 25000 5m 3584 41216 68096 45696 + 40000 5m 3584 47488 74368 51968 + 50000 5m 3584 52864 79744 57344 + 100000 5m 3584 78400 132160 82880 + 10000 40m 3584 32256 59136 36736 + 25000 40m 3584 41216 68096 45696 + 40000 40m 3584 47488 74368 51968 + 50000 40m 3584 52864 79744 57344 + 100000 40m 3584 78400 132160 82880 + 10000 300m 3584 32256 65856 36736 + 25000 300m 3584 41216 84672 45696 + 40000 300m 3584 47488 101024 51968 + 50000 300m 3584 52864 113120 57344 + 100000 300m 3584 78400 198688 82880 \ No newline at end of file diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/port_config.ini b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/port_config.ini new file mode 100644 index 00000000000..9b05ff8e63f --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias index speed +Ethernet0 8 Ethernet1/1 0 25000 +Ethernet1 9 Ethernet2/1 1 25000 +Ethernet2 10 Ethernet3/1 2 25000 +Ethernet3 11 Ethernet4/1 3 25000 +Ethernet4 12 Ethernet5/1 4 25000 +Ethernet5 13 Ethernet6/1 5 25000 +Ethernet6 14 Ethernet7/1 6 25000 +Ethernet7 15 Ethernet8/1 7 25000 +Ethernet8 16 Ethernet9/1 8 25000 +Ethernet9 17 Ethernet10/1 9 25000 +Ethernet10 18 Ethernet11/1 10 25000 +Ethernet11 19 Ethernet12/1 11 25000 +Ethernet12 20 Ethernet13/1 12 25000 +Ethernet13 21 Ethernet14/1 13 25000 +Ethernet14 22 Ethernet15/1 14 25000 +Ethernet15 23 Ethernet16/1 15 25000 +Ethernet16 32 Ethernet17/1 16 25000 +Ethernet17 33 Ethernet18/1 17 25000 +Ethernet18 34 Ethernet19/1 18 25000 +Ethernet19 35 Ethernet20/1 19 25000 +Ethernet20 40 Ethernet21/1 20 25000 +Ethernet21 41 Ethernet22/1 21 25000 +Ethernet22 42 Ethernet23/1 22 25000 +Ethernet23 43 Ethernet24/1 23 25000 +Ethernet24 48 Ethernet25/1 24 25000 +Ethernet25 49 Ethernet26/1 25 25000 +Ethernet26 50 Ethernet27/1 26 25000 +Ethernet27 51 Ethernet28/1 27 25000 +Ethernet28 56 Ethernet29/1 28 25000 +Ethernet29 57 Ethernet30/1 29 25000 +Ethernet30 58 Ethernet31/1 30 25000 +Ethernet31 59 Ethernet32/1 31 25000 +Ethernet32 64 Ethernet33/1 32 25000 +Ethernet33 65 Ethernet34/1 33 25000 +Ethernet34 66 Ethernet35/1 34 25000 +Ethernet35 67 Ethernet36/1 35 25000 +Ethernet36 68 Ethernet37/1 36 25000 +Ethernet37 69 Ethernet38/1 37 25000 +Ethernet38 70 Ethernet39/1 38 25000 +Ethernet39 71 Ethernet40/1 39 25000 +Ethernet40 72 Ethernet41/1 40 25000 +Ethernet41 73 Ethernet42/1 41 25000 +Ethernet42 74 Ethernet43/1 42 25000 +Ethernet43 75 Ethernet44/1 43 25000 +Ethernet44 76 Ethernet45/1 44 25000 +Ethernet45 77 Ethernet46/1 45 25000 +Ethernet46 78 Ethernet47/1 46 25000 +Ethernet47 79 Ethernet48/1 47 25000 +Ethernet48 84,85,86,87 Ethernet49/1 48 100000 +Ethernet49 80,81,82,83 Ethernet50/1 49 100000 +Ethernet50 104,105,106,107 Ethernet51/1 50 100000 +Ethernet51 108,109,110,111 Ethernet52/1 51 100000 +Ethernet52 112,113,114,115 Ethernet53/1 52 100000 +Ethernet53 116,117,118,119 Ethernet54/1 53 100000 diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/port_config.nps b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/port_config.nps new file mode 100644 index 00000000000..ca2bc649768 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/port_config.nps @@ -0,0 +1,415 @@ +init start stage unit=0 low-level +init set port-map unit=0 port=0 eth-macro=2 lane=0 max-speed=25g active=true +init set port-map unit=0 port=1 eth-macro=2 lane=1 max-speed=25g active=true +init set port-map unit=0 port=2 eth-macro=2 lane=2 max-speed=25g active=true +init set port-map unit=0 port=3 eth-macro=2 lane=3 max-speed=25g active=true +init set port-map unit=0 port=4 eth-macro=3 lane=0 max-speed=25g active=true +init set port-map unit=0 port=5 eth-macro=3 lane=1 max-speed=25g active=true +init set port-map unit=0 port=6 eth-macro=3 lane=2 max-speed=25g active=true +init set port-map unit=0 port=7 eth-macro=3 lane=3 max-speed=25g active=true +init set port-map unit=0 port=8 eth-macro=4 lane=0 max-speed=25g active=true +init set port-map unit=0 port=9 eth-macro=4 lane=1 max-speed=25g active=true +init set port-map unit=0 port=10 eth-macro=4 lane=2 max-speed=25g active=true +init set port-map unit=0 port=11 eth-macro=4 lane=3 max-speed=25g active=true +init set port-map unit=0 port=12 eth-macro=5 lane=0 max-speed=25g active=true +init set port-map unit=0 port=13 eth-macro=5 lane=1 max-speed=25g active=true +init set port-map unit=0 port=14 eth-macro=5 lane=2 max-speed=25g active=true +init set port-map unit=0 port=15 eth-macro=5 lane=3 max-speed=25g active=true +init set port-map unit=0 port=16 eth-macro=8 lane=0 max-speed=25g active=true +init set port-map unit=0 port=17 eth-macro=8 lane=1 max-speed=25g active=true +init set port-map unit=0 port=18 eth-macro=8 lane=2 max-speed=25g active=true +init set port-map unit=0 port=19 eth-macro=8 lane=3 max-speed=25g active=true +init set port-map unit=0 port=20 eth-macro=10 lane=0 max-speed=25g active=true +init set port-map unit=0 port=21 eth-macro=10 lane=1 max-speed=25g active=true +init set port-map unit=0 port=22 eth-macro=10 lane=2 max-speed=25g active=true +init set port-map unit=0 port=23 eth-macro=10 lane=3 max-speed=25g active=true +init set port-map unit=0 port=24 eth-macro=12 lane=0 max-speed=25g active=true +init set port-map unit=0 port=25 eth-macro=12 lane=1 max-speed=25g active=true +init set port-map unit=0 port=26 eth-macro=12 lane=2 max-speed=25g active=true +init set port-map unit=0 port=27 eth-macro=12 lane=3 max-speed=25g active=true +init set port-map unit=0 port=28 eth-macro=14 lane=0 max-speed=25g active=true +init set port-map unit=0 port=29 eth-macro=14 lane=1 max-speed=25g active=true +init set port-map unit=0 port=30 eth-macro=14 lane=2 max-speed=25g active=true +init set port-map unit=0 port=31 eth-macro=14 lane=3 max-speed=25g active=true +init set port-map unit=0 port=32 eth-macro=16 lane=0 max-speed=25g active=true +init set port-map unit=0 port=33 eth-macro=16 lane=1 max-speed=25g active=true +init set port-map unit=0 port=34 eth-macro=16 lane=2 max-speed=25g active=true +init set port-map unit=0 port=35 eth-macro=16 lane=3 max-speed=25g active=true +init set port-map unit=0 port=36 eth-macro=17 lane=0 max-speed=25g active=true +init set port-map unit=0 port=37 eth-macro=17 lane=1 max-speed=25g active=true +init set port-map unit=0 port=38 eth-macro=17 lane=2 max-speed=25g active=true +init set port-map unit=0 port=39 eth-macro=17 lane=3 max-speed=25g active=true +init set port-map unit=0 port=40 eth-macro=18 lane=0 max-speed=25g active=true +init set port-map unit=0 port=41 eth-macro=18 lane=1 max-speed=25g active=true +init set port-map unit=0 port=42 eth-macro=18 lane=2 max-speed=25g active=true +init set port-map unit=0 port=43 eth-macro=18 lane=3 max-speed=25g active=true +init set port-map unit=0 port=44 eth-macro=19 lane=0 max-speed=25g active=true +init set port-map unit=0 port=45 eth-macro=19 lane=1 max-speed=25g active=true +init set port-map unit=0 port=46 eth-macro=19 lane=2 max-speed=25g active=true +init set port-map unit=0 port=47 eth-macro=19 lane=3 max-speed=25g active=true +init set port-map unit=0 port=48 eth-macro=21 lane=0 max-speed=100g active=true +init set port-map unit=0 port=49 eth-macro=20 lane=0 max-speed=100g active=true +init set port-map unit=0 port=50 eth-macro=26 lane=0 max-speed=100g active=true +init set port-map unit=0 port=51 eth-macro=27 lane=0 max-speed=100g active=true +init set port-map unit=0 port=52 eth-macro=28 lane=0 max-speed=100g active=true +init set port-map unit=0 port=53 eth-macro=29 lane=0 max-speed=100g active=true +init set port-map unit=0 port=129 eth-macro=0 lane=1 max-speed=10g active=true guarantee=true cpi=true +init set port-map unit=0 port=130 eth-macro=0 lane=0 max-speed=10g active=true guarantee=true cpi=true init-done=true +init start stage unit=0 task-rsrc +init start stage unit=0 module +init start stage unit=0 task +phy set lane-swap portlist=0 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=1 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=2 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=3 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=4 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=5 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=6 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=7 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=8 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=9 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=10 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=11 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=12 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=13 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=14 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=15 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=16 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=17 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=18 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=19 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=20 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=21 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=22 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=23 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=24 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=25 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=26 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=27 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=28 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=29 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=30 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=31 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=32 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=33 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=34 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=35 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=36 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=37 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=38 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=39 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=40 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=41 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=42 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=43 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=44 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=45 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=46 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=47 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=48 lane-cnt=4 property=tx data=0x1.3.0.2 +phy set lane-swap portlist=49 lane-cnt=4 property=tx data=0x0.3.1.2 +phy set lane-swap portlist=50 lane-cnt=4 property=tx data=0x1.3.0.2 +phy set lane-swap portlist=51 lane-cnt=4 property=tx data=0x2.0.3.1 +phy set lane-swap portlist=52 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap portlist=53 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap portlist=0 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=1 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=2 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=3 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=4 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=5 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=6 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=7 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=8 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=9 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=10 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=11 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=12 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=13 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=14 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=15 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=16 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=17 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=18 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=19 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=20 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=21 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=22 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=23 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=24 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=25 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=26 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=27 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=28 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=29 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=30 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=31 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=32 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=33 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=34 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=35 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=36 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=37 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=38 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=39 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=40 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=41 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=42 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=43 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=44 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=45 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=46 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=47 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=48 lane-cnt=4 property=rx data=0x2.1.0.3 +phy set lane-swap portlist=49 lane-cnt=4 property=rx data=0x0.1.3.2 +phy set lane-swap portlist=50 lane-cnt=4 property=rx data=0x3.1.0.2 +phy set lane-swap portlist=51 lane-cnt=4 property=rx data=0x1.3.0.2 +phy set lane-swap portlist=52 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap portlist=53 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set polarity-rev portlist=0 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=1 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=2 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=3 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=4 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=5 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=6 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=7 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=8 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=9 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=10 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=11 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=12 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=13 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=14 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=15 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=16 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=17 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=18 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=19 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=20 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=21 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=22 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=23 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=24 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=25 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=26 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=27 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=28 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=29 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=30 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=31 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=32 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=33 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=34 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=35 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=36 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=37 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=38 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=39 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=40 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=41 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=42 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=43 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=44 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=45 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=46 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=47 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=48 lane-cnt=4 property=tx data=0x0.0.0.1 +phy set polarity-rev portlist=49 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=50 lane-cnt=4 property=tx data=0x1.1.0.0 +phy set polarity-rev portlist=51 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=52 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=53 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=0 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=1 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=2 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=3 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=4 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=5 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=6 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=7 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=8 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=9 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=10 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=11 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=12 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=13 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=14 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=15 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=16 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=17 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=18 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=19 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=20 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=21 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=22 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=23 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=24 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=25 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=26 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=27 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=28 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=29 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=30 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=31 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=32 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=33 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=34 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=35 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=36 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=37 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=38 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=39 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=40 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=41 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=42 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=43 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=44 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=45 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=46 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=47 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=48 lane-cnt=4 property=rx data=0x0.1.0.1 +phy set polarity-rev portlist=49 lane-cnt=4 property=rx data=0x1.0.1.0 +phy set polarity-rev portlist=50 lane-cnt=4 property=rx data=0x0.0.1.0 +phy set polarity-rev portlist=51 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=52 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=53 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set pre-emphasis portlist=0 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=0 lane-cnt=4 property=cn1 data=0x1.1.1.1 +phy set pre-emphasis portlist=0 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a +phy set pre-emphasis portlist=0 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=4 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=4 lane-cnt=4 property=cn1 data=0x1.1.1.1 +phy set pre-emphasis portlist=4 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a +phy set pre-emphasis portlist=4 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=8 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=8 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=8 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=8 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=12 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=12 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=12 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=12 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=16 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=16 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=16 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=16 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=20 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=20 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=20 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=20 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=24 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=24 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=24 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=24 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=28 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=28 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=28 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=28 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=32 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=32 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=32 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=32 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=36 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=36 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=36 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=36 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=40 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=40 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=40 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=40 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=44 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=44 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=44 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=44 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=48 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=48 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=48 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=48 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=49 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=49 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=49 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=49 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=50 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=50 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=50 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=50 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=51 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=51 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=51 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=51 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=52 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=52 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=52 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a +phy set pre-emphasis portlist=52 lane-cnt=4 property=c1 data=0x8.8.8.8 +phy set pre-emphasis portlist=53 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=53 lane-cnt=4 property=cn1 data=0x1.1.1.1 +phy set pre-emphasis portlist=53 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a +phy set pre-emphasis portlist=53 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set mdio portlist=0 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=1 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=2 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=3 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=4 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=5 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=6 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=7 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=8 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=9 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=10 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=11 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=12 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=13 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=14 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=15 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=16 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=17 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=18 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=19 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=20 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=21 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=22 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=23 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=24 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=25 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=26 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=27 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=28 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=29 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=30 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=31 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=32 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=33 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=34 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=35 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=36 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=37 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=38 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=39 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=40 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=41 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=42 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=43 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=44 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=45 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=46 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=47 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=48 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=49 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=50 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=51 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=52 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=53 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=129 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=130 devad=0x1E addr=0x2 data=0x0000 +port set property portlist=0-47 speed=25g +port set property portlist=48-53 speed=100g +port set property portlist=129-130 speed=10g +port set property portlist=0-47 medium-type=sr +port set property portlist=48-53 medium-type=sr4 +port set property portlist=129-130 medium-type=kr +port set adver portlist=129-130 speed-10g-kr +port set property portlist=129-130 an=enable +port set property unit=0 portlist=129-130 admin=enable +port set property unit=0 portlist=0-53 admin=disable + diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/proc_init.nps b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/proc_init.nps new file mode 100644 index 00000000000..e25c78018ad --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/proc_init.nps @@ -0,0 +1,10 @@ +#unit NPS_CFG_TYPE_XXX param0 param1 value +#---- ---------------- ------ ------ ----- +0 NPS_CFG_TYPE_USE_UNIT_PORT 0 0 1 +0 NPS_CFG_TYPE_LED_CFG 0 0 5 +0 NPS_CFG_TYPE_CPI_PORT_MODE 129 0 1 +0 NPS_CFG_TYPE_CPI_PORT_MODE 130 0 1 +0 NPS_CFG_TYPE_USER_BUF_CTRL 0 0 1 +0 NPS_CFG_TYPE_HASH_L2_FDB_REGION_ENTRY_NUM 0 0 49152 +0 NPS_CFG_TYPE_HASH_L3_WITH_IPV6_PREFIX_64_REGION_ENTRY_NUM 0 0 32768 + diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/qos.json.j2 b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/qos.json.j2 new file mode 100644 index 00000000000..5c5fc6e4969 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/qos.json.j2 @@ -0,0 +1,136 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "1", + "1": "0", + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "3": "3", + "4": "4" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "1", + "1": "0", + "3": "3", + "4": "4" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"1", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + }, + "WRED_PROFILE": { + "AZURE_LOSSY" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"613984", + "red_min_threshold":"76608", + "yellow_max_threshold":"628320", + "yellow_min_threshold":"78400", + "green_max_threshold": "642656", + "green_min_threshold": "80192" + }, + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"613984", + "red_min_threshold":"76608", + "yellow_max_threshold":"628320", + "yellow_min_threshold":"78400", + "green_max_threshold": "642656", + "green_min_threshold": "80192" + } + }, + "QUEUE": { + } +} diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/sai.profile b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/sai.profile new file mode 100644 index 00000000000..5e4ff9064d5 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X-R0/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/proc_init.nps +SAI_DSH_CONFIG_FILE=/usr/share/sonic/hwsku/port_config.nps diff --git a/device/accton/x86_64-accton_as7116_54x-r0/default_sku b/device/accton/x86_64-accton_as7116_54x-r0/default_sku new file mode 100644 index 00000000000..146edca5263 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/default_sku @@ -0,0 +1 @@ +Accton-AS7116-54X-R0 t1 diff --git a/device/accton/x86_64-accton_as7116_54x-r0/fancontrol b/device/accton/x86_64-accton_as7116_54x-r0/fancontrol new file mode 100644 index 00000000000..e16d8f936f8 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/fancontrol @@ -0,0 +1,10 @@ +INTERVAL=10 +FCTEMPS=/sys/bus/i2c/devices/1-0063/fan_duty_cycle_percentage=/sys/bus/i2c/devices/20-004a/hwmon/hwmon*/temp1_input /sys/bus/i2c/devices/1-0063/fan_duty_cycle_percentage=/sys/bus/i2c/devices/19-0049/hwmon/hwmon*/temp1_input /sys/bus/i2c/devices/1-0063/fan_duty_cycle_percentage=/sys/bus/i2c/devices/17-004b/hwmon/hwmon*/temp1_input +FCFANS=/sys/bus/i2c/devices/1-0063/fan_duty_cycle_percentage=/sys/bus/i2c/devices/1-0063/fan1_input /sys/bus/i2c/devices/1-0063/fan_duty_cycle_percentage=/sys/bus/i2c/devices/1-0063/fan2_input +/sys/bus/i2c/devices/1-0063/fan_duty_cycle_percentage=/sys/bus/i2c/devices/1-0063/fan3_input /sys/bus/i2c/devices/1-0063/fan_duty_cycle_percentage=/sys/bus/i2c/devices/1-0063/fan4_input /sys/bus/i2c/devices/1-0063/fan_duty_cycle_percentage=/sys/bus/i2c/devices/1-0063/fan5_input +MINTEMP=/sys/bus/i2c/devices/1-0063/fan_duty_cycle_percentage=49 +MAXTEMP=/sys/bus/i2c/devices/1-0063/fan_duty_cycle_percentage=58 +MINSTART=/sys/bus/i2c/devices/1-0063/fan_duty_cycle_percentage=100 +MINSTOP=/sys/bus/i2c/devices/1-0063/fan_duty_cycle_percentage=40 +MINPWM=/sys/bus/i2c/devices/1-0063/fan_duty_cycle_percentage=40 +MAXPWM=/sys/bus/i2c/devices/1-0063/fan_duty_cycle_percentage=100 diff --git a/device/accton/x86_64-accton_as7116_54x-r0/installer.conf b/device/accton/x86_64-accton_as7116_54x-r0/installer.conf new file mode 100644 index 00000000000..4eeedca86a4 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pci=noaer" \ No newline at end of file diff --git a/device/accton/x86_64-accton_as7116_54x-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as7116_54x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..1e7d1046d93 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as7116_54x-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as7116_54x-r0/plugins/psuutil.py new file mode 100644 index 00000000000..08fd2648f31 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/plugins/psuutil.py @@ -0,0 +1,92 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + SYSFS_PSU_DIR = ["/sys/bus/i2c/devices/10-0050", + "/sys/bus/i2c/devices/11-0053"] + + def __init__(self): + PsuBase.__init__(self) + + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psu_power_good' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU status + if (attr_value == 1): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + attr_file ='psu_present' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU presence + if (attr_value == 1): + status = 1 + + return status + diff --git a/device/accton/x86_64-accton_as7116_54x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7116_54x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..4f0e4ef8273 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/plugins/sfputil.py @@ -0,0 +1,172 @@ +#!/usr/bin/env python + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +SFP_STATUS_INSERTED = '1' +SFP_STATUS_REMOVED = '0' + +class SfpUtil(SfpUtilBase): + """Platform specific SfpUtill class""" + + _port_start = 0 + _port_end = 53 + _qsfp_port_start = 48 + _ports_in_block = 54 + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 0 : 37, + 1 : 38, + 2 : 39, + 3 : 40, + 4 : 41, + 5 : 42, + 6 : 43, + 7 : 44, + 8 : 45, + 9 : 46, + 10 : 47, + 11 : 48, + 12 : 49, + 13 : 50, + 14 : 51, + 15 : 52, + 16 : 53, + 17 : 54, + 18 : 55, + 19 : 56, + 20 : 57, + 21 : 58, + 22 : 59, + 23 : 60, + 24 : 61, + 25 : 62, + 26 : 63, + 27 : 64, + 28 : 65, + 29 : 66, + 30 : 67, + 31 : 68, + 32 : 69, + 33 : 70, + 34 : 71, + 35 : 72, + 36 : 73, + 37 : 74, + 38 : 75, + 39 : 76, + 40 : 77, + 41 : 78, + 42 : 79, + 43 : 80, + 44 : 81, + 45 : 82, + 46 : 83, + 47 : 84, + 48 : 21, + 49 : 22, + 50 : 23, + 51 : 24, + 52 : 25, + 53 : 26, + } + + _qsfp_ports = range(_qsfp_port_start, _ports_in_block + 1) + + _present_status = dict() + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/sfp_eeprom' + for x in range(self._port_start, self._port_end + 1): + port_eeprom_path = eeprom_path.format(self._port_to_i2c_mapping[x]) + self._port_to_eeprom_mapping[x] = port_eeprom_path + self._present_status[x] = SFP_STATUS_REMOVED + + SfpUtilBase.__init__(self) + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self._qsfp_port_start or port_num > self._port_end: + print "Error: port %d is not qsfp port" % port_num + return False + + path = "/sys/bus/i2c/devices/{0}-0050/sfp_port_reset" + port_ps = path.format(self._port_to_i2c_mapping[port_num]) + + try: + reg_file = open(port_ps, 'w') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #toggle reset + reg_file.seek(0) + reg_file.write('1') + time.sleep(1) + reg_file.seek(0) + reg_file.write('0') + reg_file.close() + return True + + def set_low_power_mode(self, port_nuM, lpmode): + raise NotImplementedError + + def get_low_power_mode(self, port_num): + raise NotImplementedError + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + path = "/sys/bus/i2c/devices/{0}-0050/sfp_is_present" + port_ps = path.format(self._port_to_i2c_mapping[port_num]) + + + try: + reg_file = open(port_ps) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if reg_value == '1': + return True + + return False + + def get_transceiver_change_event(self, timeout=0): + raise NotImplementedError + + @property + def port_start(self): + return self._port_start + + @property + def port_end(self): + return self._port_end + + @property + def qsfp_ports(self): + return self._qsfp_ports + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def get_transceiver_change_event(self, timeout=0): + ret_present = dict() + for phy_port in range(self._port_start, self._port_end + 1): + last_present_status = SFP_STATUS_INSERTED if self.get_presence(phy_port) else SFP_STATUS_REMOVED + if self._present_status[phy_port] != last_present_status: + ret_present[phy_port] = last_present_status + self._present_status[phy_port] = last_present_status + + time.sleep(2) + + return True, ret_present + diff --git a/device/accton/x86_64-accton_as7116_54x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7116_54x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7116_54x-r0/sensors.conf b/device/accton/x86_64-accton_as7116_54x-r0/sensors.conf new file mode 100644 index 00000000000..9edb51a9e72 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/sensors.conf @@ -0,0 +1,13 @@ +# libsensors configuration file + +chip "as7116_54x_fan-*" + label fan1 "front fan 1" + label fan2 "front fan 2" + label fan3 "front fan 3" + label fan4 "front fan 4" + label fan5 "front fan 5" + label fan6 "rear fan 1" + label fan7 "rear fan 2" + label fan8 "rear fan 3" + label fan9 "rear fan 4" + label fan10 "rear fan 5" diff --git a/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/__init__.py b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/__init__.py new file mode 100644 index 00000000000..d82f3749319 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import * diff --git a/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/chassis.py b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/chassis.py new file mode 100644 index 00000000000..6d5ed915812 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/chassis.py @@ -0,0 +1,174 @@ +#!/usr/bin/env python + +############################################################################# +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Chassis information which are available in the platform +# +############################################################################# +try: + import sys + import re + import os + import subprocess + import json + import syslog + from sonic_platform_base.chassis_base import ChassisBase + from sonic_daemon_base.daemon_base import Logger + from sonic_platform.fan import Fan + from sonic_platform.psu import Psu + from sonic_platform.component import Component + from sonic_platform.thermal import Thermal + from sonic_platform.sfp import Sfp + from sonic_platform.eeprom import Tlv +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_FAN_TRAY = 5 +NUM_FAN = 2 +NUM_PSU = 2 +NUM_THERMAL = 4 +NUM_SFP = 54 +SFP_PORT_START = 0 +QSFP_PORT_START = 48 +SFP_PORT_END = 47 +QSFP_PORT_END=53 +HOST_REBOOT_CAUSE_PATH = "/host/reboot-cause/" +PMON_REBOOT_CAUSE_PATH = "/usr/share/sonic/platform/api_files/reboot-cause/" +REBOOT_CAUSE_FILE = "reboot-cause.txt" +PREV_REBOOT_CAUSE_FILE = "previous-reboot-cause.txt" +COMPONENT_NAME_LIST = ["BIOS"] +HOST_CHK_CMD = "docker > /dev/null 2>&1" + + +class Chassis(ChassisBase): + """Platform-specific Chassis class""" + + def __init__(self): + super(Chassis, self).__init__() + + for fantray_index in range(0, NUM_FAN_TRAY): + for fan_index in range(0, NUM_FAN): + fan = Fan(fantray_index, fan_index) + self._fan_list.append(fan) + for index in range(0, NUM_PSU): + psu = Psu(index) + self._psu_list.append(psu) + for index in range(0, NUM_THERMAL): + thermal = Thermal(index) + self._thermal_list.append(thermal) + + self.PORT_START = SFP_PORT_START + self.QSFP_PORT_START = QSFP_PORT_START + self.PORT_END = QSFP_PORT_END + for index in range(0, NUM_SFP): + if index in range(self.QSFP_PORT_START, self.QSPORT_END + 1): + sfp_module = Sfp(index, 'QSFP') + else: + sfp_module = Sfp(index, 'SFP') + self._sfp_list.append(sfp_module) + self._component_name_list = COMPONENT_NAME_LIST + self._watchdog = Watchdog() + self._eeprom = Tlv() + logger.log_info("Chassis loaded successfully") + + def __is_host(self): + return os.system(HOST_CHK_CMD) == 0 + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.get_mac() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.get_serial() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.get_eeprom() + + def get_firmware_version(self, component_name): + """ + Retrieves platform-specific hardware/firmware versions for chassis + componenets such as BIOS, CPLD, FPGA, etc. + Args: + type: A string, component name + + Returns: + A string containing platform-specific component versions + """ + self.component = Component(component_name) + if component_name not in self._component_name_list: + return None + return self.component.get_firmware_version() + + def install_component_firmware(self, component_name, image_path): + """ + Install firmware to module + Args: + type: A string, component name. + image_path: A string, path to firmware image. + + Returns: + A boolean, True if install successfully, False if not + """ + self.component = Component(component_name) + if component_name not in self._component_name_list: + return False + return self.component.upgrade_firmware(image_path) + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + description = 'None' + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + + reboot_cause_path = (HOST_REBOOT_CAUSE_PATH + REBOOT_CAUSE_FILE) if self.__is_host( + ) else PMON_REBOOT_CAUSE_PATH + REBOOT_CAUSE_FILE + prev_reboot_cause_path = (HOST_REBOOT_CAUSE_PATH + PREV_REBOOT_CAUSE_FILE) if self.__is_host( + ) else PMON_REBOOT_CAUSE_PATH + PREV_REBOOT_CAUSE_FILE + sw_reboot_cause = self.__read_txt_file( + reboot_cause_path) or "Unknown" + prev_sw_reboot_cause = self.__read_txt_file( + prev_reboot_cause_path) or "Unknown" + + if sw_reboot_cause != "Unknown": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = sw_reboot_cause + else: + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Unknown reason' + + return (reboot_cause, description) diff --git a/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/component.py b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/component.py new file mode 100644 index 00000000000..c8f109aa4db --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/component.py @@ -0,0 +1,83 @@ +#!/usr/bin/env python + +############################################################################# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +############################################################################# + +import json +import os.path +import shutil +import shlex +import subprocess + +try: + from sonic_platform_base.device_base import DeviceBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" + +class Component(DeviceBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_name): + DeviceBase.__init__(self) + self.name = component_name.upper() + + def __run_command(self, command): + # Run bash command and print output to stdout + try: + process = subprocess.Popen( + shlex.split(command), stdout=subprocess.PIPE) + while True: + output = process.stdout.readline() + if output == '' and process.poll() is not None: + break + rc = process.poll() + if rc != 0: + return False + except: + return False + return True + + def __get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self.__get_bios_version() + + return fw_version + + def upgrade_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + if not os.path.isfile(image_path): + return False + + if self.name == "BIOS": + print("Not supported") + return False + + return self.__run_command(install_command) diff --git a/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/eeprom.py b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/eeprom.py new file mode 100644 index 00000000000..714ac8153e0 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/eeprom.py @@ -0,0 +1,112 @@ +#!/usr/bin/env python + +############################################################################# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import glob + import os + import sys + import imp + import re + from array import array + from cStringIO import StringIO + from sonic_platform_base.sonic_eeprom import eeprom_dts + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CACHE_ROOT = '/var/cache/sonic/decode-syseeprom' +CACHE_FILE = 'syseeprom_cache' + + +class Tlv(eeprom_tlvinfo.TlvInfoDecoder): + + EEPROM_DECODE_HEADLINES = 6 + + def __init__(self): + self._eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom" + super(Tlv, self).__init__(self._eeprom_path, 0, '', True) + self._eeprom = self._load_eeprom() + + def __parse_output(self, decode_output): + decode_output.replace('\0', '') + lines = decode_output.split('\n') + lines = lines[self.EEPROM_DECODE_HEADLINES:] + _eeprom_info_dict = dict() + + for line in lines: + try: + match = re.search( + '(0x[0-9a-fA-F]{2})([\s]+[\S]+[\s]+)([\S]+)', line) + if match is not None: + idx = match.group(1) + value = match.group(3).rstrip('\0') + + _eeprom_info_dict[idx] = value + except: + pass + return _eeprom_info_dict + + def _load_eeprom(self): + original_stdout = sys.stdout + sys.stdout = StringIO() + err = self.read_eeprom_db() + if err: + # Failed to read EEPROM information from database. Read from cache file + pass + else: + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + return self.__parse_output(decode_output) + + status = self.check_status() + if status < 'ok': + return False + + if not os.path.exists(CACHE_ROOT): + try: + os.makedirs(CACHE_ROOT) + except: + pass + + # + # only the eeprom classes that inherit from eeprom_base + # support caching. Others will work normally + # + try: + self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE)) + except: + pass + + e = self.read_eeprom() + if e is None: + return 0 + + try: + self.update_cache(e) + except: + pass + + self.decode_eeprom(e) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + + (is_valid, valid_crc) = self.is_checksum_valid(e) + if not is_valid: + return False + + return self.__parse_output(decode_output) + + def get_eeprom(self): + return self._eeprom + + def get_serial(self): + return self._eeprom.get('0x23', "Undefined.") + + def get_mac(self): + return self._eeprom.get('0x24', "Undefined.") diff --git a/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/fan.py b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/fan.py new file mode 100644 index 00000000000..54878e3e1ba --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/fan.py @@ -0,0 +1,165 @@ +#!/usr/bin/env python + +############################################################################# +# +# Module contains an implementation of SONiC Platform Base API and +# provides the fan status which are available in the platform +# +############################################################################# + +import json +import math +import os.path + +try: + from sonic_platform_base.fan_base import FanBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +FAN_PATH = "/sys/bus/i2c/devices/1-0063/" +FANTRAY_NAME_LIST = ["FANTRAY-1", "FANTRAY-2", + "FANTRAY-3", "FANTRAY-4", "FANTRAY-5"] +FAN_NAME_LIST = ["front", "rear"] + +class Fan(FanBase): + """Platform-specific Fan class""" + + def __init__(self, fan_tray_index, fan_index=0): + self.fan_index = fan_index + self.fan_tray_index = fan_tray_index + self.fan_presence = "fan{}_present" + self.fan_direction = "fan{}_direction" + self.fan_fault = "fan{}_{}_fault" + self.fan_speed_rpm = "fan{}_{}_speed_rpm" + FanBase.__init__(self) + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return "" + + def __write_txt_file(self, file_path, value): + try: + with open(file_path, 'w') as fd: + fd.write(str(value)) + except: + return False + return True + + def __search_file_by_name(self, directory, file_name): + for dirpath, dirnames, files in os.walk(directory): + for name in files: + file_path = os.path.join(dirpath, name) + if name in file_name: + return file_path + return None + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = self.FAN_DIRECTION_EXHAUST + fan_direction_file = (FAN_PATH + + self.fan_direction.format(self.fan_tray_index+1)) + raw = self.__read_txt_file(fan_direction_file).strip('\r\n') + direction = self.FAN_DIRECTION_INTAKE if str( + raw).upper() == "1" else self.FAN_DIRECTION_EXHAUST + + return direction + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 12000 (full speed) + """ + speed = 0 + if self.get_presence(): + fan_speed_file = (FAN_PATH + + self.fan_speed_rpm.format(self.fan_tray_index+1,FAN_NAME_LIST[self.fan_index])) + speed = self.__read_txt_file(fan_speed_file).strip('\r\n') + + return int(speed) + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + target = 0 + if self.get_presence(): + fan_speed_file=(FAN_PATH + + self.fan_speed_rpm.format(self.fan_tray_index+1, FAN_NAME_LIST[self.fan_index])) + target=self.__read_txt_file(fan_speed_file).strip('\r\n') + + return target + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + return 10 + + def set_speed(self, speed): + """ + Sets the fan speed + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + Returns: + A boolean, True if speed is set successfully, False if not + + Note: + Depends on pwm or target mode is selected: + 1) pwm = speed_pc * 255 <-- Currently use this mode. + 2) target_pwm = speed_pc * 100 / 255 + 2.1) set pwm{}_enable to 3 + + """ + return False + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + return False + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + fan_name = FAN_NAME_LIST[self.fan_tray_index] + + return fan_name + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + fan_direction_file = (FAN_PATH + + self.fan_presence.format(self.fan_tray_index+1)) + present_str = self.__read_txt_file(fan_direction_file) or '1' + + return int(present_str) == 0 diff --git a/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/platform.py b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/platform.py new file mode 100644 index 00000000000..44e03cdadbb --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/platform.py @@ -0,0 +1,20 @@ +#!/usr/bin/env python + +############################################################################# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Platform(PlatformBase): + """Platform-specific Platform class""" + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() diff --git a/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/psu.py b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/psu.py new file mode 100644 index 00000000000..b1c8029dced --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/psu.py @@ -0,0 +1,102 @@ +#!/usr/bin/env python + +############################################################################# +# psuutil.py +# Platform-specific PSU status interface for SONiC +############################################################################# + +import os.path +import sonic_platform + +try: + from sonic_platform_base.psu_base import PsuBase + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +FAN_MAX_RPM = 9600 +PSU_NAME_LIST = ["PSU-0", "PSU-1"] + +class Psu(PsuBase): + """Platform-specific Psu class""" + + SYSFS_PSU_DIR = ["/sys/bus/i2c/devices/10-0050", + "/sys/bus/i2c/devices/11-0053"] + + def __init__(self): + self.index = psu_index + PsuBase.__init__(self) + + + def get_fan(self): + """ + Retrieves object representing the fan module contained in this PSU + Returns: + An object dervied from FanBase representing the fan module + contained in this PSU + """ + # Hardware not supported + return False + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + Args: + color: A string representing the color with which to set the PSU status LED + Note: Only support green and off + Returns: + bool: True if status LED state is set successfully, False if not + """ + # Hardware not supported + return False + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return PSU_NAME_LIST[self.index] + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + attr_file ='psu_present' + attr_path = self.SYSFS_PSU_DIR[self.index-1] +'/' + attr_file + status = 0 + try: + with open(attr_path, 'r') as psu_prs: + status = int(psu_prs.read()) + except IOError: + return False + + return status == 1 + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + attr_file = 'psu_power_good' + attr_path = self.SYSFS_PSU_DIR[self.index-1] +'/' + attr_file + status = 0 + try: + with open(attr_path, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/sfp.py b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/sfp.py new file mode 100644 index 00000000000..07e0649579a --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/sonic_platform/sfp.py @@ -0,0 +1,1133 @@ +#!/usr/bin/env python + +############################################################################# +# Sfp contains an implementation of SONiC Platform Base API and +# provides the sfp device status which are available in the platform +############################################################################# +try: + import os + import time + import subprocess + import sonic_device_util + import syslog + from ctypes import create_string_buffer + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8472 import sff8472Dom + from sonic_platform_base.sonic_sfp.sff8472 import sff8472InterfaceId + from sonic_platform_base.sonic_sfp.sff8472 import sffbase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom + from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper + from sonic_daemon_base.daemon_base import Logger +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +INFO_OFFSET = 0 +DOM_OFFSET = 256 + +QSFP_INFO_OFFSET = 128 +QSFP_DOM_OFFSET = 0 + +XCVR_INTFACE_BULK_OFFSET = 0 +XCVR_INTFACE_BULK_WIDTH_QSFP = 20 +XCVR_HW_REV_WIDTH_QSFP = 2 +XCVR_CABLE_LENGTH_WIDTH_QSFP = 5 +XCVR_VENDOR_NAME_OFFSET = 20 +XCVR_VENDOR_NAME_WIDTH = 16 +XCVR_VENDOR_OUI_OFFSET = 37 +XCVR_VENDOR_OUI_WIDTH = 3 +XCVR_VENDOR_PN_OFFSET = 40 +XCVR_VENDOR_PN_WIDTH = 16 +XCVR_HW_REV_OFFSET = 56 +XCVR_HW_REV_WIDTH_OSFP = 2 +XCVR_HW_REV_WIDTH_SFP = 4 +XCVR_VENDOR_SN_OFFSET = 68 +XCVR_VENDOR_SN_WIDTH = 16 +XCVR_VENDOR_DATE_OFFSET = 84 +XCVR_VENDOR_DATE_WIDTH = 8 +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 1 + +# Offset for values in SFP eeprom +SFP_TEMPE_OFFSET = 96 +SFP_TEMPE_WIDTH = 2 +SFP_VOLT_OFFSET = 98 +SFP_VOLT_WIDTH = 2 +SFP_CHANNL_MON_OFFSET = 100 +SFP_CHANNL_MON_WIDTH = 6 +SFP_MODULE_THRESHOLD_OFFSET = 0 +SFP_MODULE_THRESHOLD_WIDTH = 40 +SFP_CHANNL_THRESHOLD_OFFSET = 112 +SFP_CHANNL_THRESHOLD_WIDTH = 2 +SFP_STATUS_CONTROL_OFFSET = 110 +SFP_STATUS_CONTROL_WIDTH = 1 +SFP_TX_DISABLE_HARD_BIT = 7 +SFP_TX_DISABLE_SOFT_BIT = 6 + + +sfp_cable_length_tup = ('LengthSMFkm-UnitsOfKm', 'LengthSMF(UnitsOf100m)', + 'Length50um(UnitsOf10m)', 'Length62.5um(UnitsOfm)', + 'LengthCable(UnitsOfm)', 'LengthOM3(UnitsOf10m)') + +sfp_compliance_code_tup = ('10GEthernetComplianceCode', 'InfinibandComplianceCode', + 'ESCONComplianceCodes', 'SONETComplianceCodes', + 'EthernetComplianceCodes', 'FibreChannelLinkLength', + 'FibreChannelTechnology', 'SFP+CableTechnology', + 'FibreChannelTransmissionMedia', 'FibreChannelSpeed') + +# Offset for values in QSFP eeprom +QSFP_DOM_REV_OFFSET = 1 +QSFP_DOM_REV_WIDTH = 1 +QSFP_TEMPE_OFFSET = 22 +QSFP_TEMPE_WIDTH = 2 +QSFP_VOLT_OFFSET = 26 +QSFP_VOLT_WIDTH = 2 +QSFP_CHANNL_MON_OFFSET = 34 +QSFP_CHANNL_MON_WIDTH = 16 +QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH = 24 +QSFP_CONTROL_OFFSET = 86 +QSFP_CONTROL_WIDTH = 8 +QSFP_CHANNL_RX_LOS_STATUS_OFFSET = 3 +QSFP_CHANNL_RX_LOS_STATUS_WIDTH = 1 +QSFP_CHANNL_TX_FAULT_STATUS_OFFSET = 4 +QSFP_CHANNL_TX_FAULT_STATUS_WIDTH = 1 +QSFP_POWEROVERRIDE_OFFSET = 93 +QSFP_POWEROVERRIDE_WIDTH = 1 +QSFP_MODULE_THRESHOLD_OFFSET = 128 +QSFP_MODULE_THRESHOLD_WIDTH = 24 +QSFP_CHANNEL_THRESHOLD_OFFSET = 176 +QSFP_CHANNEL_THRESHOLD_WIDTH = 16 + +qsfp_cable_length_tup = ('Length(km)', 'Length OM3(2m)', + 'Length OM2(m)', 'Length OM1(m)', + 'Length Cable Assembly(m)') + +qsfp_compliance_code_tup = ('10/40G Ethernet Compliance Code', 'SONET Compliance codes', + 'SAS/SATA compliance codes', 'Gigabit Ethernet Compliant codes', + 'Fibre Channel link length/Transmitter Technology', + 'Fibre Channel transmission media', 'Fibre Channel Speed') + +class Sfp(SfpBase): + """Platform-specific Sfp class""" + + # Port number + PORT_START = 0 + PORT_END = 53 + + port_to_i2c_mapping = { + 0: 37, + 1: 38, + 2: 39, + 3: 40, + 4: 41, + 5: 42, + 6: 43, + 7: 44, + 8: 45, + 9: 46, + 10: 47, + 11: 48, + 12: 49, + 13: 50, + 14: 51, + 15: 52, + 16: 53, + 17: 54, + 18: 55, + 19: 56, + 20: 57, + 21: 58, + 22: 59, + 23: 60, + 24: 61, + 25: 62, + 26: 63, + 27: 64, + 28: 65, + 29: 66, + 30: 67, + 31: 68, + 32: 69, + 33: 70, + 34: 71, + 35: 72, + 36: 73, + 37: 74, + 38: 75, + 39: 76, + 40: 77, + 41: 78, + 42: 79, + 43: 80, + 44: 81, + 45: 82, + 46: 83, + 47: 84, + 48: 21, + 49: 22, + 50: 23, + 51: 24, + 52: 25, + 53: 26, + } + _sfp_port = range(48, PORT_END + 1) + RESET_PATH = "/sys/bus/i2c/devices/{}-0050/sfp_port_reset" + PRS_PATH = "/sys/bus/i2c/devices/{}-0050/sfp_is_present" + + PLATFORM_ROOT_PATH = '/usr/share/sonic/device' + PMON_HWSKU_PATH = '/usr/share/sonic/hwsku' + HOST_CHK_CMD = "docker > /dev/null 2>&1" + + PLATFORM = "x86_64-accton_as7116_54x-r0" + HWSKU = "Accton-AS7116-54X-R0" + + def __init__(self, sfp_index, sfp_type): + # Init index + self.index = sfp_index + self.port_num = self.index + 1 + self.sfp_type = sfp_type + + # Init eeprom path + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/sfp_eeprom' + self.port_to_eeprom_mapping = {} + for x in range(self.PORT_START, self.PORT_END + 1): + p_num = x - 1 if self.PORT_START == 1 else x + self.port_to_eeprom_mapping[p_num] = eeprom_path.format( + self.port_to_i2c_mapping[p_num]) + + self.info_dict_keys = ['type', 'hardwarerev', 'serialnum', 'manufacturename', 'modelname', 'Connector', 'encoding', 'ext_identifier', + 'ext_rateselect_compliance', 'cable_type', 'cable_length', 'nominal_bit_rate', 'specification_compliance', 'vendor_date', 'vendor_oui'] + + self.dom_dict_keys = ['rx_los', 'tx_fault', 'reset_status', 'power_lpmode', 'tx_disable', 'tx_disable_channel', 'temperature', 'voltage', + 'rx1power', 'rx2power', 'rx3power', 'rx4power', 'tx1bias', 'tx2bias', 'tx3bias', 'tx4bias', 'tx1power', 'tx2power', 'tx3power', 'tx4power'] + + self.threshold_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', 'rxpowerhighalarm', 'rxpowerhighwarning', + 'rxpowerlowalarm', 'rxpowerlowwarning', 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning'] + + SfpBase.__init__(self) + + def _convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return "" + + def __is_host(self): + return os.system(self.HOST_CHK_CMD) == 0 + + def __get_path_to_port_config_file(self): + platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.PLATFORM]) + hwsku_path = "/".join([platform_path, self.HWSKU] + ) if self.__is_host() else self.PMON_HWSKU_PATH + return "/".join([hwsku_path, "port_config.ini"]) + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + sysfsfile_eeprom = None + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[self.sfp_index] + try: + sysfsfile_eeprom = open( + sysfs_sfp_i2c_client_eeprom_path, mode="rb", buffering=0) + sysfsfile_eeprom.seek(offset) + raw = sysfsfile_eeprom.read(num_bytes) + for n in range(0, num_bytes): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except: + pass + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + + return eeprom_raw + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + Returns: + A dict which contains following keys/values : + """ + if self.sfp_type == "SFP": + get_sfp_transceiver_info + else: + get_qsfp_transceiver_info + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + Returns: + A dict which contains following keys/values : + """ + if self.sfp_type == "SFP": + get_sfp_transceiver_bulk_status + else: + get_qsfp_transceiver_bulk_status + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + Returns: + A dict which contains following keys/values : + """ + if self.sfp_type == "SFP": + get_sfp_transceiver_threshold_info + else: + get_qsfp_transceiver_threshold_info + + def get_sfp_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + nominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + # check present status + sfpi_obj = sff8472InterfaceId() + if not self.get_presence() or not sfpi_obj: + return {} + + offset = INFO_OFFSET + + sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_INTFACE_BULK_OFFSET), XCVR_INTFACE_BULK_WIDTH_SFP) + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk( + sfp_interface_bulk_raw, 0) + + sfp_vendor_name_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + sfp_vendor_name_data = sfpi_obj.parse_vendor_name( + sfp_vendor_name_raw, 0) + + sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn( + sfp_vendor_pn_raw, 0) + + sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_HW_REV_OFFSET), XCVR_HW_REV_WIDTH_SFP) + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev( + sfp_vendor_rev_raw, 0) + + sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn( + sfp_vendor_sn_raw, 0) + + sfp_vendor_oui_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) + if sfp_vendor_oui_raw is not None: + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui( + sfp_vendor_oui_raw, 0) + + sfp_vendor_date_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) + sfp_vendor_date_data = sfpi_obj.parse_vendor_date( + sfp_vendor_date_raw, 0) + + transceiver_info_dict = dict.fromkeys(self.info_dict_keys, 'N/A') + compliance_code_dict = dict() + + if sfp_interface_bulk_data: + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + transceiver_info_dict['type_abbrv_name'] = sfp_interface_bulk_data['data']['type_abbrv_name']['value'] + + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data[ + 'data']['Vendor Name']['value'] if sfp_vendor_name_data else 'N/A' + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] if sfp_vendor_pn_data else 'N/A' + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] if sfp_vendor_rev_data else 'N/A' + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] if sfp_vendor_sn_data else 'N/A' + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] if sfp_vendor_oui_data else 'N/A' + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data[ + 'data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] if sfp_vendor_date_data else 'N/A' + transceiver_info_dict['cable_type'] = "Unknown" + transceiver_info_dict['cable_length'] = "Unknown" + + for key in sfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str( + sfp_interface_bulk_data['data'][key]['value']) + + for key in sfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + transceiver_info_dict['specification_compliance'] = str( + compliance_code_dict) + transceiver_info_dict['nominal_bit_rate'] = str( + sfp_interface_bulk_data['data']['NominalSignallingRate(UnitsOf100Mbd)']['value']) + + return transceiver_info_dict + + def get_sfp_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. + tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. + reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. + lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. + tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. + tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 + | |to channel 3. + temperature |INT |module temperature in Celsius + voltage |INT |supply voltage in mV + txbias |INT |TX Bias Current in mA, n is the channel number, + | |for example, tx2bias stands for tx bias of channel 2. + rxpower |INT |received optical power in mW, n is the channel number, + | |for example, rx2power stands for rx power of channel 2. + txpower |INT |TX output power in mW, n is the channel number, + | |for example, tx2power stands for tx power of channel 2. + ======================================================================== + """ + # check present status + sfpd_obj = sff8472Dom() + if not self.get_presence() or not sfpd_obj: + return {} + + eeprom_ifraw = self.__read_eeprom_specific_bytes(0, DOM_OFFSET) + sfpi_obj = sff8472InterfaceId(eeprom_ifraw) + cal_type = sfpi_obj.get_calibration_type() + sfpd_obj._calibration_type = cal_type + + offset = DOM_OFFSET + transceiver_dom_info_dict = dict.fromkeys(self.dom_dict_keys, 'N/A') + dom_temperature_raw = self.__read_eeprom_specific_bytes( + (offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature( + dom_temperature_raw, 0) + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + + dom_voltage_raw = self.__read_eeprom_specific_bytes( + (offset + SFP_VOLT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_voltage_data = sfpd_obj.parse_channel_monitor_params( + dom_channel_monitor_raw, 0) + transceiver_dom_info_dict['tx1power'] = dom_voltage_data['data']['TXPower']['value'] + transceiver_dom_info_dict['rx1power'] = dom_voltage_data['data']['RXPower']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_voltage_data['data']['TXBias']['value'] + + for key in transceiver_dom_info_dict: + transceiver_dom_info_dict[key] = self._convert_string_to_num( + transceiver_dom_info_dict[key]) + + transceiver_dom_info_dict['rx_los'] = self.get_rx_los() + transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() + transceiver_dom_info_dict['reset_status'] = self.get_reset_status() + transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() + + return transceiver_dom_info_dict + + def get_sfp_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. + templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. + temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. + templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. + vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. + vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. + vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. + vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. + rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. + rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. + rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. + rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. + txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. + txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. + txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. + txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. + txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. + txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. + txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. + txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. + ======================================================================== + """ + # check present status + sfpd_obj = sff8472Dom() + + if not self.get_presence() and not sfpd_obj: + return {} + + eeprom_ifraw = self.__read_eeprom_specific_bytes(0, DOM_OFFSET) + sfpi_obj = sff8472InterfaceId(eeprom_ifraw) + cal_type = sfpi_obj.get_calibration_type() + sfpd_obj._calibration_type = cal_type + + offset = DOM_OFFSET + transceiver_dom_threshold_info_dict = dict.fromkeys( + self.threshold_dict_keys, 'N/A') + dom_module_threshold_raw = self.__read_eeprom_specific_bytes( + (offset + SFP_MODULE_THRESHOLD_OFFSET), SFP_MODULE_THRESHOLD_WIDTH) + if dom_module_threshold_raw is not None: + dom_module_threshold_data = sfpd_obj.parse_alarm_warning_threshold( + dom_module_threshold_raw, 0) + + transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] + transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] + transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] + transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] + transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VoltageHighAlarm']['value'] + transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VoltageLowAlarm']['value'] + transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data[ + 'data']['VoltageHighWarning']['value'] + transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VoltageLowWarning']['value'] + transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_module_threshold_data['data']['BiasHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_module_threshold_data['data']['BiasLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_module_threshold_data['data']['BiasHighWarning']['value'] + transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_module_threshold_data['data']['BiasLowWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_module_threshold_data['data']['TXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_module_threshold_data['data']['TXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_module_threshold_data['data']['TXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_module_threshold_data['data']['TXPowerLowWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_module_threshold_data['data']['RXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_module_threshold_data['data']['RXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_module_threshold_data['data']['RXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_module_threshold_data['data']['RXPowerLowWarning']['value'] + + for key in transceiver_dom_threshold_info_dict: + transceiver_dom_threshold_info_dict[key] = self._convert_string_to_num( + transceiver_dom_threshold_info_dict[key]) + + return transceiver_dom_threshold_info_dict + + def get_qsfp_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + nominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + # check present status + sfpi_obj = sff8436InterfaceId() + if not self.get_presence() or not sfpi_obj: + return {} + + offset = INFO_OFFSET + + sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_INTFACE_BULK_OFFSET), XCVR_INTFACE_BULK_WIDTH_QSFP) + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk( + sfp_interface_bulk_raw, 0) + + sfp_vendor_name_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + sfp_vendor_name_data = sfpi_obj.parse_vendor_name( + sfp_vendor_name_raw, 0) + + sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn( + sfp_vendor_pn_raw, 0) + + sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_HW_REV_OFFSET), XCVR_HW_REV_WIDTH_QSFP) + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev( + sfp_vendor_rev_raw, 0) + + sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn( + sfp_vendor_sn_raw, 0) + + sfp_vendor_oui_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) + if sfp_vendor_oui_raw is not None: + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui( + sfp_vendor_oui_raw, 0) + + sfp_vendor_date_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) + sfp_vendor_date_data = sfpi_obj.parse_vendor_date( + sfp_vendor_date_raw, 0) + + transceiver_info_dict = dict.fromkeys(self.info_dict_keys, 'N/A') + compliance_code_dict = dict() + + if sfp_interface_bulk_data: + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + transceiver_info_dict['type_abbrv_name'] = sfp_interface_bulk_data['data']['type_abbrv_name']['value'] + + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data[ + 'data']['Vendor Name']['value'] if sfp_vendor_name_data else 'N/A' + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] if sfp_vendor_pn_data else 'N/A' + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] if sfp_vendor_rev_data else 'N/A' + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] if sfp_vendor_sn_data else 'N/A' + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] if sfp_vendor_oui_data else 'N/A' + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data[ + 'data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] if sfp_vendor_date_data else 'N/A' + transceiver_info_dict['cable_type'] = "Unknown" + transceiver_info_dict['cable_length'] = "Unknown" + + for key in qsfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str( + sfp_interface_bulk_data['data'][key]['value']) + + for key in qsfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + transceiver_info_dict['specification_compliance'] = str( + compliance_code_dict) + transceiver_info_dict['nominal_bit_rate'] = str( + sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value']) + + return transceiver_info_dict + + def get_qsfp_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. + tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. + reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. + lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. + tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. + tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 + | |to channel 3. + temperature |INT |module temperature in Celsius + voltage |INT |supply voltage in mV + txbias |INT |TX Bias Current in mA, n is the channel number, + | |for example, tx2bias stands for tx bias of channel 2. + rxpower |INT |received optical power in mW, n is the channel number, + | |for example, rx2power stands for rx power of channel 2. + txpower |INT |TX output power in mW, n is the channel number, + | |for example, tx2power stands for tx power of channel 2. + ======================================================================== + """ + # check present status + sfpd_obj = sff8436Dom() + sfpi_obj = sff8436InterfaceId() + + if not self.get_presence() or not sfpi_obj or not sfpd_obj: + return {} + + transceiver_dom_info_dict = dict.fromkeys(self.dom_dict_keys, 'N/A') + offset = DOM_OFFSET + offset_xcvr = INFO_OFFSET + + # QSFP capability byte parse, through this byte can know whether it support tx_power or not. + # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, + # need to add more code for determining the capability and version compliance + # in SFF-8636 dom capability definitions evolving with the versions. + qsfp_dom_capability_raw = self.__read_eeprom_specific_bytes( + (offset_xcvr + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) + if qsfp_dom_capability_raw is not None: + qspf_dom_capability_data = sfpi_obj.parse_qsfp_dom_capability( + qsfp_dom_capability_raw, 0) + else: + return None + + dom_temperature_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature( + dom_temperature_raw, 0) + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + + dom_voltage_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + qsfp_dom_rev_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_DOM_REV_OFFSET), QSFP_DOM_REV_WIDTH) + if qsfp_dom_rev_raw is not None: + qsfp_dom_rev_data = sfpd_obj.parse_sfp_dom_rev(qsfp_dom_rev_raw, 0) + qsfp_dom_rev = qsfp_dom_rev_data['data']['dom_rev']['value'] + + # The tx_power monitoring is only available on QSFP which compliant with SFF-8636 + # and claimed that it support tx_power with one indicator bit. + dom_channel_monitor_data = {} + dom_channel_monitor_raw = None + qsfp_tx_power_support = qspf_dom_capability_data['data']['Tx_power_support']['value'] + if (qsfp_dom_rev[0:8] != 'SFF-8636' or (qsfp_dom_rev[0:8] == 'SFF-8636' and qsfp_tx_power_support != 'on')): + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params( + dom_channel_monitor_raw, 0) + + else: + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power( + dom_channel_monitor_raw, 0) + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TX1Power']['value'] + transceiver_dom_info_dict['tx2power'] = dom_channel_monitor_data['data']['TX2Power']['value'] + transceiver_dom_info_dict['tx3power'] = dom_channel_monitor_data['data']['TX3Power']['value'] + transceiver_dom_info_dict['tx4power'] = dom_channel_monitor_data['data']['TX4Power']['value'] + + if dom_channel_monitor_raw: + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RX1Power']['value'] + transceiver_dom_info_dict['rx2power'] = dom_channel_monitor_data['data']['RX2Power']['value'] + transceiver_dom_info_dict['rx3power'] = dom_channel_monitor_data['data']['RX3Power']['value'] + transceiver_dom_info_dict['rx4power'] = dom_channel_monitor_data['data']['RX4Power']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value'] + transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value'] + transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value'] + transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value'] + + for key in transceiver_dom_info_dict: + transceiver_dom_info_dict[key] = self._convert_string_to_num( + transceiver_dom_info_dict[key]) + + transceiver_dom_info_dict['rx_los'] = self.get_rx_los() + transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() + transceiver_dom_info_dict['reset_status'] = self.get_reset_status() + transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() + + return transceiver_dom_info_dict + + def get_qsfp_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. + templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. + temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. + templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. + vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. + vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. + vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. + vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. + rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. + rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. + rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. + rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. + txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. + txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. + txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. + txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. + txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. + txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. + txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. + txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. + ======================================================================== + """ + # check present status + sfpd_obj = sff8436Dom() + + if not self.get_presence() or not sfpd_obj: + return {} + + transceiver_dom_threshold_dict = dict.fromkeys( + self.threshold_dict_keys, 'N/A') + dom_thres_raw = self.__read_eeprom_specific_bytes( + QSFP_MODULE_THRESHOLD_OFFSET, QSFP_MODULE_THRESHOLD_WIDTH) if self.get_presence() and sfpd_obj else None + + if dom_thres_raw: + module_threshold_values = sfpd_obj.parse_module_threshold_values( + dom_thres_raw, 0) + module_threshold_data = module_threshold_values.get('data') + if module_threshold_data: + transceiver_dom_threshold_dict['temphighalarm'] = module_threshold_data['TempHighAlarm']['value'] + transceiver_dom_threshold_dict['templowalarm'] = module_threshold_data['TempLowAlarm']['value'] + transceiver_dom_threshold_dict['temphighwarning'] = module_threshold_data['TempHighWarning']['value'] + transceiver_dom_threshold_dict['templowwarning'] = module_threshold_data['TempLowWarning']['value'] + transceiver_dom_threshold_dict['vcchighalarm'] = module_threshold_data['VccHighAlarm']['value'] + transceiver_dom_threshold_dict['vcclowalarm'] = module_threshold_data['VccLowAlarm']['value'] + transceiver_dom_threshold_dict['vcchighwarning'] = module_threshold_data['VccHighWarning']['value'] + transceiver_dom_threshold_dict['vcclowwarning'] = module_threshold_data['VccLowWarning']['value'] + + dom_thres_raw = self.__read_eeprom_specific_bytes( + QSFP_CHANNEL_THRESHOLD_OFFSET, QSFP_CHANNEL_THRESHOLD_WIDTH) if self.get_presence() and sfpd_obj else None + channel_threshold_values = sfpd_obj.parse_channel_threshold_values( + dom_thres_raw, 0) + channel_threshold_data = channel_threshold_values.get('data') + if channel_threshold_data: + transceiver_dom_threshold_dict['rxpowerhighalarm'] = channel_threshold_data['RxPowerHighAlarm']['value'] + transceiver_dom_threshold_dict['rxpowerlowalarm'] = channel_threshold_data['RxPowerLowAlarm']['value'] + transceiver_dom_threshold_dict['rxpowerhighwarning'] = channel_threshold_data['RxPowerHighWarning']['value'] + transceiver_dom_threshold_dict['rxpowerlowwarning'] = channel_threshold_data['RxPowerLowWarning']['value'] + transceiver_dom_threshold_dict['txpowerhighalarm'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerlowalarm'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerhighwarning'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerlowwarning'] = "0.0dBm" + transceiver_dom_threshold_dict['txbiashighalarm'] = channel_threshold_data['TxBiasHighAlarm']['value'] + transceiver_dom_threshold_dict['txbiaslowalarm'] = channel_threshold_data['TxBiasLowAlarm']['value'] + transceiver_dom_threshold_dict['txbiashighwarning'] = channel_threshold_data['TxBiasHighWarning']['value'] + transceiver_dom_threshold_dict['txbiaslowwarning'] = channel_threshold_data['TxBiasLowWarning']['value'] + + for key in transceiver_dom_threshold_dict: + transceiver_dom_threshold_dict[key] = self._convert_string_to_num( + transceiver_dom_threshold_dict[key]) + + return transceiver_dom_threshold_dict + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + Returns: + A Boolean, True if reset enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + rx_los = False + status_control_raw = self.__read_eeprom_specific_bytes( + SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + rx_los = (sffbase().test_bit(data, 1) != 0) + + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + tx_fault = False + status_control_raw = self.__read_eeprom_specific_bytes( + SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + tx_fault = (sffbase().test_bit(data, 2) != 0) + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + """ + tx_disable = False + tx_fault = False + status_control_raw = self.__read_eeprom_specific_bytes( + SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + tx_disable_hard = (sffbase().test_bit( + data, SFP_TX_DISABLE_HARD_BIT) != 0) + tx_disable_soft = (sffbase().test_bit( + data, SFP_TX_DISABLE_SOFT_BIT) != 0) + tx_disable = tx_disable_hard | tx_disable_soft + + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + # SFP doesn't support this feature + return 0 + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + Returns: + An integer number of current temperature in Celsius + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("temperature", "N/A") + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + Returns: + An integer number of supply voltage in mV + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("voltage", "N/A") + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_bs = transceiver_dom_info_dict.get("tx1bias", "N/A") + return [tx1_bs, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + rx1_pw = transceiver_dom_info_dict.get("rx1power", "N/A") + return [rx1_pw, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_pw = transceiver_dom_info_dict.get("tx1power", "N/A") + return [tx1_pw, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + Returns: + A boolean, True if successful, False if not + """ + # SFP doesn't support this feature + return False + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[self.index] + status_control_raw = self.__read_eeprom_specific_bytes( + SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw is not None: + # Set bit 6 for Soft TX Disable Select + # 01000000 = 64 and 10111111 = 191 + tx_disable_bit = 64 if tx_disable else 191 + status_control = int(status_control_raw[0], 16) + tx_disable_ctl = (status_control | tx_disable_bit) if tx_disable else ( + status_control & tx_disable_bit) + try: + sysfsfile_eeprom = open( + sysfs_sfp_i2c_client_eeprom_path, mode="r+b", buffering=0) + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom.seek(SFP_STATUS_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except: + #print("Error: unable to open file: %s" % str(e)) + return False + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + return False + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + Returns: + A boolean, True if successful, False if not + """ + # SFP doesn't support this feature + return False + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + # SFP doesn't support this feature + return False + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + # SFP doesn't support this feature + return False + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings( + self.__get_path_to_port_config_file()) + name = sfputil_helper.logical[self.index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the SFP + Returns: + bool: True if SFP is present, False if not + """ + presence = False + + try: + with open(self.PRS_PATH.format(self.index), 'r') as sfp_presence: + presence = int(sfp_presence.read(), 16) + except IOError: + return False + logger.log_info("debug:port_ %s sfp presence is %s" % (str(self.index)), % (str(presence)) + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + transceiver_dom_info_dict = self.get_transceiver_info() + return transceiver_dom_info_dict.get("modelname", "N/A") + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + transceiver_dom_info_dict = self.get_transceiver_info() + return transceiver_dom_info_dict.get("serialnum", "N/A") diff --git a/device/accton/x86_64-accton_as7212_54x-r0/AS7212-54x/port_config.ini b/device/accton/x86_64-accton_as7212_54x-r0/AS7212-54x/port_config.ini new file mode 100755 index 00000000000..74865956f61 --- /dev/null +++ b/device/accton/x86_64-accton_as7212_54x-r0/AS7212-54x/port_config.ini @@ -0,0 +1,55 @@ +# name lanes +Ethernet0 0 +Ethernet1 1 +Ethernet2 2 +Ethernet3 3 +Ethernet4 4 +Ethernet5 5 +Ethernet6 6 +Ethernet7 7 +Ethernet8 8 +Ethernet9 9 +Ethernet10 10 +Ethernet11 11 +Ethernet12 12 +Ethernet13 13 +Ethernet14 14 +Ethernet15 15 +Ethernet16 16 +Ethernet17 17 +Ethernet18 18 +Ethernet19 19 +Ethernet20 20 +Ethernet21 21 +Ethernet22 22 +Ethernet23 23 +Ethernet24 24 +Ethernet25 25 +Ethernet26 26 +Ethernet27 27 +Ethernet28 28 +Ethernet29 29 +Ethernet30 30 +Ethernet31 31 +Ethernet32 32 +Ethernet33 33 +Ethernet34 34 +Ethernet35 35 +Ethernet36 36 +Ethernet37 37 +Ethernet38 38 +Ethernet39 39 +Ethernet40 40 +Ethernet41 41 +Ethernet42 42 +Ethernet43 43 +Ethernet44 44 +Ethernet45 45 +Ethernet46 46 +Ethernet47 47 +Ethernet48 48 +Ethernet49 49 +Ethernet50 50 +Ethernet51 51 +Ethernet52 52 +Ethernet53 53 diff --git a/device/accton/x86_64-accton_as7212_54x-r0/AS7212-54x/qos.json.j2 b/device/accton/x86_64-accton_as7212_54x-r0/AS7212-54x/qos.json.j2 new file mode 100755 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/accton/x86_64-accton_as7212_54x-r0/AS7212-54x/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/accton/x86_64-accton_as7212_54x-r0/AS7212-54x/sai.profile b/device/accton/x86_64-accton_as7212_54x-r0/AS7212-54x/sai.profile new file mode 100755 index 00000000000..178dcd00285 --- /dev/null +++ b/device/accton/x86_64-accton_as7212_54x-r0/AS7212-54x/sai.profile @@ -0,0 +1,2 @@ +mode=1 +hwId=as7212-54x diff --git a/device/accton/x86_64-accton_as7212_54x-r0/default_sku b/device/accton/x86_64-accton_as7212_54x-r0/default_sku new file mode 100644 index 00000000000..d8a1bd55cd4 --- /dev/null +++ b/device/accton/x86_64-accton_as7212_54x-r0/default_sku @@ -0,0 +1 @@ +AS7212-54x t1 diff --git a/device/accton/x86_64-accton_as7212_54x-r0/installer.conf b/device/accton/x86_64-accton_as7212_54x-r0/installer.conf new file mode 100755 index 00000000000..14404194ef5 --- /dev/null +++ b/device/accton/x86_64-accton_as7212_54x-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/accton/x86_64-accton_as7212_54x-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as7212_54x-r0/plugins/eeprom.py new file mode 100755 index 00000000000..7681caafeef --- /dev/null +++ b/device/accton/x86_64-accton_as7212_54x-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as7212_54x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7212_54x-r0/plugins/sfputil.py new file mode 100755 index 00000000000..fa706867a58 --- /dev/null +++ b/device/accton/x86_64-accton_as7212_54x-r0/plugins/sfputil.py @@ -0,0 +1,135 @@ +#!/usr/bin/env python + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class sfputil(SfpUtilBase): + """Platform specific sfputil class""" + + port_start = 0 + port_end = 31 + ports_in_block = 32 + + port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 9 : 18, + 10 : 19, + 11 : 20, + 12 : 21, + 1 : 22, + 2 : 23, + 3 : 24, + 4 : 25, + 6 : 26, + 5 : 27, + 8 : 28, + 7 : 29, + 13 : 30, + 14 : 31, + 15 : 32, + 16 : 33, + 17 : 34, + 18 : 35, + 19 : 36, + 20 : 37, + 25 : 38, + 26 : 39, + 27 : 40, + 28 : 41, + 29 : 42, + 30 : 43, + 31 : 44, + 32 : 45, + 21 : 46, + 22 : 47, + 23 : 48, + 24 : 49, + } + + _qsfp_ports = range(0, ports_in_block + 1) + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/sfp_eeprom' + for x in range(self.port_start, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x+1]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + path = "/sys/bus/i2c/devices/{0}-0050/sfp_port_reset" + port_ps = path.format(self.port_to_i2c_mapping[port_num+1]) + + try: + reg_file = open(port_ps, 'w') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #toggle reset + reg_file.seek(0) + reg_file.write('1') + time.sleep(1) + reg_file.seek(0) + reg_file.write('0') + reg_file.close() + return True + + def set_low_power_mode(self, port_nuM, lpmode): + raise NotImplementedErro + + def get_low_power_mode(self, port_num): + raise NotImplementedErro + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + path = "/sys/bus/i2c/devices/{0}-0050/sfp_is_present" + port_ps = path.format(self.port_to_i2c_mapping[port_num+1]) + + + try: + reg_file = open(port_ps) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if reg_value == '1': + return True + + return False + + @property + def port_start(self): + return self._port_start + + @property + def port_end(self): + return self._port_end + + @property + def qsfp_ports(self): + return range(0, self.ports_in_block + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/accton/x86_64-accton_as7212_54x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7212_54x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7212_54x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7312_54x-r0/Accton-AS7312-54X/port_config.ini b/device/accton/x86_64-accton_as7312_54x-r0/Accton-AS7312-54X/port_config.ini new file mode 100644 index 00000000000..93160688d74 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54x-r0/Accton-AS7312-54X/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias index speed +Ethernet0 41 twentyfiveGigE1 1 25000 +Ethernet1 42 twentyfiveGigE2 2 25000 +Ethernet2 43 twentyfiveGigE3 3 25000 +Ethernet3 44 twentyfiveGigE4 4 25000 +Ethernet4 49 twentyfiveGigE5 5 25000 +Ethernet5 50 twentyfiveGigE6 6 25000 +Ethernet6 51 twentyfiveGigE7 7 25000 +Ethernet7 52 twentyfiveGigE8 8 25000 +Ethernet8 53 twentyfiveGigE9 9 25000 +Ethernet9 54 twentyfiveGigE10 10 25000 +Ethernet10 55 twentyfiveGigE11 11 25000 +Ethernet11 56 twentyfiveGigE12 12 25000 +Ethernet12 65 twentyfiveGigE13 13 25000 +Ethernet13 66 twentyfiveGigE14 14 25000 +Ethernet14 67 twentyfiveGigE15 15 25000 +Ethernet15 68 twentyfiveGigE16 16 25000 +Ethernet16 33 twentyfiveGigE17 17 25000 +Ethernet17 34 twentyfiveGigE18 18 25000 +Ethernet18 35 twentyfiveGigE19 19 25000 +Ethernet19 36 twentyfiveGigE20 20 25000 +Ethernet20 37 twentyfiveGigE21 21 25000 +Ethernet21 38 twentyfiveGigE22 22 25000 +Ethernet22 39 twentyfiveGigE23 23 25000 +Ethernet23 40 twentyfiveGigE24 24 25000 +Ethernet24 69 twentyfiveGigE25 25 25000 +Ethernet25 70 twentyfiveGigE26 26 25000 +Ethernet26 71 twentyfiveGigE27 27 25000 +Ethernet27 72 twentyfiveGigE28 28 25000 +Ethernet28 81 twentyfiveGigE29 29 25000 +Ethernet29 82 twentyfiveGigE30 30 25000 +Ethernet30 83 twentyfiveGigE31 31 25000 +Ethernet31 84 twentyfiveGigE32 32 25000 +Ethernet32 85 twentyfiveGigE33 33 25000 +Ethernet33 86 twentyfiveGigE34 34 25000 +Ethernet34 87 twentyfiveGigE35 35 25000 +Ethernet35 88 twentyfiveGigE36 36 25000 +Ethernet36 97 twentyfiveGigE37 37 25000 +Ethernet37 98 twentyfiveGigE38 38 25000 +Ethernet38 99 twentyfiveGigE39 39 25000 +Ethernet39 100 twentyfiveGigE40 40 25000 +Ethernet40 101 twentyfiveGigE41 41 25000 +Ethernet41 102 twentyfiveGigE42 42 25000 +Ethernet42 103 twentyfiveGigE43 43 25000 +Ethernet43 104 twentyfiveGigE44 44 25000 +Ethernet44 105 twentyfiveGigE45 45 25000 +Ethernet45 106 twentyfiveGigE46 46 25000 +Ethernet46 107 twentyfiveGigE47 47 25000 +Ethernet47 108 twentyfiveGigE48 48 25000 +Ethernet48 5,6,7,8 hundredGigE49 49 100000 +Ethernet52 1,2,3,4 hundredGigE50 50 100000 +Ethernet56 109,110,111,112 hundredGigE51 51 100000 +Ethernet60 21,22,23,24 hundredGigE52 52 100000 +Ethernet64 9,10,11,12 hundredGigE53 53 100000 +Ethernet68 117,118,119,120 hundredGigE54 54 100000 diff --git a/device/accton/x86_64-accton_as7312_54x-r0/Accton-AS7312-54X/sai.profile b/device/accton/x86_64-accton_as7312_54x-r0/Accton-AS7312-54X/sai.profile new file mode 100644 index 00000000000..31aefe2c290 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54x-r0/Accton-AS7312-54X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-as7312-48x25G+6x100G.config.bcm diff --git a/device/accton/x86_64-accton_as7312_54x-r0/Accton-AS7312-54X/th-as7312-48x25G+6x100G.config.bcm b/device/accton/x86_64-accton_as7312_54x-r0/Accton-AS7312-54X/th-as7312-48x25G+6x100G.config.bcm new file mode 100644 index 00000000000..eef4d987e8e --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54x-r0/Accton-AS7312-54X/th-as7312-48x25G+6x100G.config.bcm @@ -0,0 +1,519 @@ +# accton_as7312_54x 48x25G+6x100G SDK config +os=unix +schan_intr_enable=0 + +l2_mem_entries=40960 +l2xmsg_mode=1 +l3_mem_entries=40960 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +mmu_lossless=1 + +pbmp_oversubscribe=0x0407ffc00ff00ff003fc3ffc00200222 +pbmp_xport_xe=0x0407ffd00ff00ff403fc3ffc00200222 + +## FC10 ## +dport_map_port_42=1 +dport_map_port_43=2 +dport_map_port_44=3 +dport_map_port_45=4 + +## FC12 ## +dport_map_port_50=5 +dport_map_port_51=6 +dport_map_port_52=7 +dport_map_port_53=8 + +## FC13 ## +dport_map_port_54=9 +dport_map_port_55=10 +dport_map_port_56=11 +dport_map_port_57=12 + +## FC16 ## +dport_map_port_68=13 +dport_map_port_69=14 +dport_map_port_70=15 +dport_map_port_71=16 + +## FC8 ## +dport_map_port_34=17 +dport_map_port_35=18 +dport_map_port_36=19 +dport_map_port_37=20 + +## FC9 ## +dport_map_port_38=21 +dport_map_port_39=22 +dport_map_port_40=23 +dport_map_port_41=24 + +## FC17 ## +dport_map_port_72=25 +dport_map_port_73=26 +dport_map_port_74=27 +dport_map_port_75=28 + +## FC20 ## +dport_map_port_84=29 +dport_map_port_85=30 +dport_map_port_86=31 +dport_map_port_87=32 + +## FC21 ## +dport_map_port_88=33 +dport_map_port_89=34 +dport_map_port_90=35 +dport_map_port_91=36 + +## FC24 ## +dport_map_port_102=37 +dport_map_port_103=38 +dport_map_port_104=39 +dport_map_port_105=40 + +## FC25 ## +dport_map_port_106=41 +dport_map_port_107=42 +dport_map_port_108=43 +dport_map_port_109=44 + +## FC26 ## +dport_map_port_110=45 +dport_map_port_111=46 +dport_map_port_112=47 +dport_map_port_113=48 + +## FC1 ## +dport_map_port_5=49 + +## FC0 ## +dport_map_port_1=50 + +## FC27 ## +dport_map_port_114=51 + +## FC5 ## +dport_map_port_21=52 + +## FC2 ## +dport_map_port_9=53 + +## FC29 ## +dport_map_port_122=54 + +#for KR +#dport_map_port_66=55 +#dport_map_port_100=56 + +/* Port Map */ +## FC10 ## +portmap_42=41:25 +portmap_43=42:25 +portmap_44=43:25 +portmap_45=44:25 + +## FC12 ## +portmap_50=49:25 +portmap_51=50:25 +portmap_52=51:25 +portmap_53=52:25 + + +## FC13 ## +portmap_54=53:25 +portmap_55=54:25 +portmap_56=55:25 +portmap_57=56:25 + +## FC16 ## +portmap_68=65:25 +portmap_69=66:25 +portmap_70=67:25 +portmap_71=68:25 + + +## FC8 ## +portmap_34=33:25 +portmap_35=34:25 +portmap_36=35:25 +portmap_37=36:25 + +## FC9 ## +portmap_38=37:25 +portmap_39=38:25 +portmap_40=39:25 +portmap_41=40:25 + +## FC17 ## +portmap_72=69:25 +portmap_73=70:25 +portmap_74=71:25 +portmap_75=72:25 + +## FC20 ## +portmap_84=81:25 +portmap_85=82:25 +portmap_86=83:25 +portmap_87=84:25 + + +## FC21 ## +portmap_88=85:25 +portmap_89=86:25 +portmap_90=87:25 +portmap_91=88:25 + +## FC24 ## +portmap_102=97:25 +portmap_103=98:25 +portmap_104=99:25 +portmap_105=100:25 + +## FC25 ## +portmap_106=101:25 +portmap_107=102:25 +portmap_108=103:25 +portmap_109=104:25 + +## FC26 ## +portmap_110=105:25 +portmap_111=106:25 +portmap_112=107:25 +portmap_113=108:25 + +## FC1 ## +portmap_5=5:100 + +## FC0 ## +portmap_1=1:100 + +## FC27 ## +portmap_114=109:100 + +## FC5 ## +portmap_21=21:100 + +## FC2 ## +portmap_9=9:100 + +## FC29 ## +portmap_122=117:100 + +# CPU to MAC +# TSC-E management port 1 +#portmap_66=129:10 +# TSC-E management port 2 +#portmap_100=131:10 + +xgxs_rx_lane_map_42=0x2310 +xgxs_rx_lane_map_43=0x2310 +xgxs_rx_lane_map_44=0x2310 +xgxs_rx_lane_map_45=0x2310 +xgxs_rx_lane_map_50=0x3210 +xgxs_rx_lane_map_51=0x3210 +xgxs_rx_lane_map_52=0x3210 +xgxs_rx_lane_map_53=0x3210 +xgxs_rx_lane_map_54=0x3210 +xgxs_rx_lane_map_55=0x3210 +xgxs_rx_lane_map_56=0x3210 +xgxs_rx_lane_map_57=0x3210 +xgxs_rx_lane_map_68=0x0123 +xgxs_rx_lane_map_69=0x0123 +xgxs_rx_lane_map_70=0x0123 +xgxs_rx_lane_map_71=0x0123 +xgxs_rx_lane_map_34=0x0123 +xgxs_rx_lane_map_35=0x0123 +xgxs_rx_lane_map_36=0x0123 +xgxs_rx_lane_map_37=0x0123 +xgxs_rx_lane_map_38=0x0123 +xgxs_rx_lane_map_39=0x0123 +xgxs_rx_lane_map_40=0x0123 +xgxs_rx_lane_map_41=0x0123 +xgxs_rx_lane_map_72=0x3210 +xgxs_rx_lane_map_73=0x3210 +xgxs_rx_lane_map_74=0x3210 +xgxs_rx_lane_map_75=0x3210 +xgxs_rx_lane_map_84=0x1032 +xgxs_rx_lane_map_85=0x1032 +xgxs_rx_lane_map_86=0x1032 +xgxs_rx_lane_map_87=0x1032 +xgxs_rx_lane_map_88=0x2301 +xgxs_rx_lane_map_89=0x2301 +xgxs_rx_lane_map_90=0x2301 +xgxs_rx_lane_map_91=0x2301 +xgxs_rx_lane_map_102=0x0123 +xgxs_rx_lane_map_103=0x0123 +xgxs_rx_lane_map_104=0x0123 +xgxs_rx_lane_map_105=0x0123 +xgxs_rx_lane_map_106=0x3210 +xgxs_rx_lane_map_107=0x3210 +xgxs_rx_lane_map_108=0x3210 +xgxs_rx_lane_map_109=0x3210 +xgxs_rx_lane_map_110=0x1032 +xgxs_rx_lane_map_111=0x1032 +xgxs_rx_lane_map_112=0x1032 +xgxs_rx_lane_map_113=0x1032 +xgxs_rx_lane_map_5=0x3210 +xgxs_rx_lane_map_1=0x3210 +xgxs_rx_lane_map_114=0x0123 +xgxs_rx_lane_map_21=0x0213 +xgxs_rx_lane_map_9=0x3210 +xgxs_rx_lane_map_122=0x1230 + +xgxs_tx_lane_map_42=0x0132 +xgxs_tx_lane_map_43=0x0132 +xgxs_tx_lane_map_44=0x0132 +xgxs_tx_lane_map_45=0x0132 +xgxs_tx_lane_map_50=0x3210 +xgxs_tx_lane_map_51=0x3210 +xgxs_tx_lane_map_52=0x3210 +xgxs_tx_lane_map_53=0x3210 +xgxs_tx_lane_map_54=0x3210 +xgxs_tx_lane_map_55=0x3210 +xgxs_tx_lane_map_56=0x3210 +xgxs_tx_lane_map_57=0x3210 +xgxs_tx_lane_map_68=0x0123 +xgxs_tx_lane_map_69=0x0123 +xgxs_tx_lane_map_70=0x0123 +xgxs_tx_lane_map_71=0x0123 +xgxs_tx_lane_map_34=0x0123 +xgxs_tx_lane_map_35=0x0123 +xgxs_tx_lane_map_36=0x0123 +xgxs_tx_lane_map_37=0x0123 +xgxs_tx_lane_map_38=0x0123 +xgxs_tx_lane_map_39=0x0123 +xgxs_tx_lane_map_40=0x0123 +xgxs_tx_lane_map_41=0x0123 +xgxs_tx_lane_map_72=0x0123 +xgxs_tx_lane_map_73=0x0123 +xgxs_tx_lane_map_74=0x0123 +xgxs_tx_lane_map_75=0x0123 +xgxs_tx_lane_map_84=0x0123 +xgxs_tx_lane_map_85=0x0123 +xgxs_tx_lane_map_86=0x0123 +xgxs_tx_lane_map_87=0x0123 +xgxs_tx_lane_map_88=0x2301 +xgxs_tx_lane_map_89=0x2301 +xgxs_tx_lane_map_90=0x2301 +xgxs_tx_lane_map_91=0x2301 +xgxs_tx_lane_map_102=0x0123 +xgxs_tx_lane_map_103=0x0123 +xgxs_tx_lane_map_104=0x0123 +xgxs_tx_lane_map_105=0x0123 +xgxs_tx_lane_map_106=0x3210 +xgxs_tx_lane_map_107=0x3210 +xgxs_tx_lane_map_108=0x3210 +xgxs_tx_lane_map_109=0x3210 +xgxs_tx_lane_map_110=0x1032 +xgxs_tx_lane_map_111=0x1032 +xgxs_tx_lane_map_112=0x1032 +xgxs_tx_lane_map_113=0x1032 +xgxs_tx_lane_map_5=0x3210 +xgxs_tx_lane_map_1=0x3210 +xgxs_tx_lane_map_114=0x0123 +xgxs_tx_lane_map_21=0x3210 +xgxs_tx_lane_map_9=0x3210 +xgxs_tx_lane_map_122=0x3210 + +#Polarity RX +phy_xaui_rx_polarity_flip_34=0x1 +phy_xaui_rx_polarity_flip_35=0x1 +phy_xaui_rx_polarity_flip_36=0x1 +phy_xaui_rx_polarity_flip_37=0x1 +phy_xaui_rx_polarity_flip_38=0x1 +phy_xaui_rx_polarity_flip_39=0x1 +phy_xaui_rx_polarity_flip_40=0x1 +phy_xaui_rx_polarity_flip_41=0x1 +phy_xaui_rx_polarity_flip_84=0x1 +phy_xaui_rx_polarity_flip_85=0x0 +phy_xaui_rx_polarity_flip_86=0x1 +phy_xaui_rx_polarity_flip_87=0x0 +phy_xaui_rx_polarity_flip_88=0x1 +phy_xaui_rx_polarity_flip_89=0x0 +phy_xaui_rx_polarity_flip_90=0x1 +phy_xaui_rx_polarity_flip_91=0x1 +phy_xaui_rx_polarity_flip_102=0x0 +phy_xaui_rx_polarity_flip_103=0x0 +phy_xaui_rx_polarity_flip_104=0x1 +phy_xaui_rx_polarity_flip_105=0x0 +phy_xaui_rx_polarity_flip_122=0xf +#Polarity TX +phy_xaui_tx_polarity_flip_42=0x1 +phy_xaui_tx_polarity_flip_43=0x1 +phy_xaui_tx_polarity_flip_44=0x1 +phy_xaui_tx_polarity_flip_45=0x1 +phy_xaui_tx_polarity_flip_34=0x1 +phy_xaui_tx_polarity_flip_35=0x1 +phy_xaui_tx_polarity_flip_36=0x1 +phy_xaui_tx_polarity_flip_37=0x1 +phy_xaui_tx_polarity_flip_38=0x0 +phy_xaui_tx_polarity_flip_39=0x1 +phy_xaui_tx_polarity_flip_40=0x0 +phy_xaui_tx_polarity_flip_41=0x1 +phy_xaui_tx_polarity_flip_72=0x1 +phy_xaui_tx_polarity_flip_73=0x1 +phy_xaui_tx_polarity_flip_74=0x1 +phy_xaui_tx_polarity_flip_75=0x1 +phy_xaui_tx_polarity_flip_84=0x1 +phy_xaui_tx_polarity_flip_85=0x1 +phy_xaui_tx_polarity_flip_86=0x1 +phy_xaui_tx_polarity_flip_87=0x1 +phy_xaui_tx_polarity_flip_88=0x1 +phy_xaui_tx_polarity_flip_89=0x1 +phy_xaui_tx_polarity_flip_90=0x1 +phy_xaui_tx_polarity_flip_91=0x1 +phy_xaui_tx_polarity_flip_102=0x1 +phy_xaui_tx_polarity_flip_103=0x1 +phy_xaui_tx_polarity_flip_104=0x1 +phy_xaui_tx_polarity_flip_105=0x1 +phy_xaui_tx_polarity_flip_122=0xb + +#Driver Current +serdes_driver_current_42=0x8 +serdes_driver_current_43=0x8 +serdes_driver_current_44=0x8 +serdes_driver_current_45=0x8 +serdes_driver_current_50=0x8 +serdes_driver_current_51=0x8 +serdes_driver_current_52=0x8 +serdes_driver_current_53=0x8 +serdes_driver_current_54=0x8 +serdes_driver_current_55=0x8 +serdes_driver_current_56=0x8 +serdes_driver_current_57=0x8 +serdes_driver_current_68=0x8 +serdes_driver_current_69=0x8 +serdes_driver_current_70=0x8 +serdes_driver_current_71=0x8 +serdes_driver_current_34=0x8 +serdes_driver_current_35=0x8 +serdes_driver_current_36=0x8 +serdes_driver_current_37=0x8 +serdes_driver_current_38=0x8 +serdes_driver_current_39=0x8 +serdes_driver_current_40=0x8 +serdes_driver_current_41=0x8 +serdes_driver_current_72=0x8 +serdes_driver_current_73=0x8 +serdes_driver_current_74=0x8 +serdes_driver_current_75=0x8 +serdes_driver_current_84=0x8 +serdes_driver_current_85=0x8 +serdes_driver_current_86=0x8 +serdes_driver_current_87=0x8 +serdes_driver_current_88=0x8 +serdes_driver_current_89=0x8 +serdes_driver_current_90=0x8 +serdes_driver_current_91=0x8 +serdes_driver_current_102=0x8 +serdes_driver_current_103=0x8 +serdes_driver_current_104=0x8 +serdes_driver_current_105=0x8 +serdes_driver_current_106=0x8 +serdes_driver_current_107=0x8 +serdes_driver_current_108=0x8 +serdes_driver_current_109=0x8 +serdes_driver_current_110=0x8 +serdes_driver_current_111=0x8 +serdes_driver_current_112=0x8 +serdes_driver_current_113=0x8 +serdes_driver_current_lane0_5=0x8 +serdes_driver_current_lane1_5=0x8 +serdes_driver_current_lane2_5=0x8 +serdes_driver_current_lane3_5=0x8 +serdes_driver_current_lane0_1=0x8 +serdes_driver_current_lane1_1=0x8 +serdes_driver_current_lane2_1=0x8 +serdes_driver_current_lane3_1=0x8 +serdes_driver_current_lane0_114=0x8 +serdes_driver_current_lane1_114=0x8 +serdes_driver_current_lane2_114=0x8 +serdes_driver_current_lane3_114=0x8 +serdes_driver_current_lane0_21=0x8 +serdes_driver_current_lane1_21=0x8 +serdes_driver_current_lane2_21=0x8 +serdes_driver_current_lane3_21=0x8 +serdes_driver_current_lane0_9=0x8 +serdes_driver_current_lane1_9=0x8 +serdes_driver_current_lane2_9=0x8 +serdes_driver_current_lane3_9=0x8 +serdes_driver_current_lane0_122=0x8 +serdes_driver_current_lane1_122=0x8 +serdes_driver_current_lane2_122=0x8 +serdes_driver_current_lane3_122=0x8 + +#Preemphasis +serdes_preemphasis_42=0x264006 +serdes_preemphasis_43=0x264006 +serdes_preemphasis_44=0x254106 +serdes_preemphasis_45=0x254106 +serdes_preemphasis_50=0x254106 +serdes_preemphasis_51=0x254106 +serdes_preemphasis_52=0x254106 +serdes_preemphasis_53=0x254106 +serdes_preemphasis_54=0x254106 +serdes_preemphasis_55=0x254106 +serdes_preemphasis_56=0x254106 +serdes_preemphasis_57=0x234306 +serdes_preemphasis_68=0x234306 +serdes_preemphasis_69=0x204606 +serdes_preemphasis_70=0x204606 +serdes_preemphasis_71=0x204606 +serdes_preemphasis_34=0x234306 +serdes_preemphasis_35=0x234306 +serdes_preemphasis_36=0x234306 +serdes_preemphasis_37=0x234306 +serdes_preemphasis_38=0x234306 +serdes_preemphasis_39=0x234306 +serdes_preemphasis_40=0x234306 +serdes_preemphasis_41=0x234306 +serdes_preemphasis_72=0x1e4806 +serdes_preemphasis_73=0x1e4806 +serdes_preemphasis_74=0x1e4806 +serdes_preemphasis_75=0x1e4806 +serdes_preemphasis_84=0x1e4806 +serdes_preemphasis_85=0x1a4c06 +serdes_preemphasis_86=0x1a4c06 +serdes_preemphasis_87=0x1b4b06 +serdes_preemphasis_88=0x1b4b06 +serdes_preemphasis_89=0x1e4806 +serdes_preemphasis_90=0x1e4806 +serdes_preemphasis_91=0x1e4806 +serdes_preemphasis_102=0x1e4806 +serdes_preemphasis_103=0x1e4806 +serdes_preemphasis_104=0x1e4806 +serdes_preemphasis_105=0x1e4806 +serdes_preemphasis_106=0x1e4806 +serdes_preemphasis_107=0x1e4806 +serdes_preemphasis_108=0x1e4806 +serdes_preemphasis_109=0x1e4806 +serdes_preemphasis_110=0x1e4806 +serdes_preemphasis_111=0x1d4906 +serdes_preemphasis_112=0x234306 +serdes_preemphasis_113=0x1f4706 +serdes_preemphasis_lane0_5=0x294106 +serdes_preemphasis_lane1_5=0x294106 +serdes_preemphasis_lane2_5=0x294106 +serdes_preemphasis_lane3_5=0x294106 +serdes_preemphasis_lane0_1=0x294106 +serdes_preemphasis_lane1_1=0x294106 +serdes_preemphasis_lane2_1=0x294106 +serdes_preemphasis_lane3_1=0x294106 +serdes_preemphasis_lane0_114=0x2a4006 +serdes_preemphasis_lane1_114=0x2a4006 +serdes_preemphasis_lane2_114=0x2a4006 +serdes_preemphasis_lane3_114=0x2a4006 +serdes_preemphasis_lane0_21=0x2c3c08 +serdes_preemphasis_lane1_21=0x2a4006 +serdes_preemphasis_lane2_21=0x2a4006 +serdes_preemphasis_lane3_21=0x2a4006 +serdes_preemphasis_lane0_9=0x284206 +serdes_preemphasis_lane1_9=0x284206 +serdes_preemphasis_lane2_9=0x284206 +serdes_preemphasis_lane3_9=0x284206 +serdes_preemphasis_lane0_122=0x283e06 +serdes_preemphasis_lane1_122=0x283e06 +serdes_preemphasis_lane2_122=0x283e06 +serdes_preemphasis_lane3_122=0x294601 diff --git a/device/accton/x86_64-accton_as7312_54x-r0/default_sku b/device/accton/x86_64-accton_as7312_54x-r0/default_sku new file mode 100644 index 00000000000..c3c21a98f0e --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54x-r0/default_sku @@ -0,0 +1 @@ +Accton-AS7312-54X t1 diff --git a/device/accton/x86_64-accton_as7312_54x-r0/installer.conf b/device/accton/x86_64-accton_as7312_54x-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54x-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/accton/x86_64-accton_as7312_54x-r0/led_proc_init.soc b/device/accton/x86_64-accton_as7312_54x-r0/led_proc_init.soc new file mode 100755 index 00000000000..3074649497e --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54x-r0/led_proc_init.soc @@ -0,0 +1,79 @@ +# accton_as7312_54x 48x25G+6x100G SDK port LED macro init SOC +s CMIC_LEDUP0_DATA_RAM 0 +s CMIC_LEDUP1_DATA_RAM 0 + +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=63 REMAP_PORT_1=63 REMAP_PORT_2=63 REMAP_PORT_3=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=63 REMAP_PORT_5=63 REMAP_PORT_6=63 REMAP_PORT_7=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=27 REMAP_PORT_9=26 REMAP_PORT_10=25 REMAP_PORT_11=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=63 REMAP_PORT_13=63 REMAP_PORT_14=63 REMAP_PORT_15=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=63 REMAP_PORT_17=63 REMAP_PORT_18=63 REMAP_PORT_19=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=31 REMAP_PORT_21=30 REMAP_PORT_22=29 REMAP_PORT_23=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=15 REMAP_PORT_25=14 REMAP_PORT_26=13 REMAP_PORT_27=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=19 REMAP_PORT_29=18 REMAP_PORT_30=17 REMAP_PORT_31=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=63 REMAP_PORT_33=63 REMAP_PORT_34=63 REMAP_PORT_35=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=63 REMAP_PORT_37=63 REMAP_PORT_38=63 REMAP_PORT_39=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=35 REMAP_PORT_41=34 REMAP_PORT_42=33 REMAP_PORT_43=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=63 REMAP_PORT_45=63 REMAP_PORT_46=63 REMAP_PORT_47=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=23 REMAP_PORT_49=22 REMAP_PORT_50=21 REMAP_PORT_51=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 REMAP_PORT_53=10 REMAP_PORT_54=9 REMAP_PORT_55=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 + +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=19 REMAP_PORT_1=18 REMAP_PORT_2=17 REMAP_PORT_3=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=23 REMAP_PORT_5=22 REMAP_PORT_6=21 REMAP_PORT_7=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=3 REMAP_PORT_9=2 REMAP_PORT_10=1 REMAP_PORT_11=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=63 REMAP_PORT_13=63 REMAP_PORT_14=63 REMAP_PORT_15=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=7 REMAP_PORT_17=6 REMAP_PORT_18=5 REMAP_PORT_19=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=11 REMAP_PORT_21=10 REMAP_PORT_22=9 REMAP_PORT_23=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=63 REMAP_PORT_25=63 REMAP_PORT_26=63 REMAP_PORT_27=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=63 REMAP_PORT_29=63 REMAP_PORT_30=63 REMAP_PORT_31=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=15 REMAP_PORT_33=14 REMAP_PORT_34=13 REMAP_PORT_35=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=27 REMAP_PORT_37=26 REMAP_PORT_38=25 REMAP_PORT_39=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=63 REMAP_PORT_41=63 REMAP_PORT_42=63 REMAP_PORT_43=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=63 REMAP_PORT_45=63 REMAP_PORT_46=63 REMAP_PORT_47=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=31 REMAP_PORT_49=30 REMAP_PORT_50=29 REMAP_PORT_51=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=35 REMAP_PORT_53=34 REMAP_PORT_54=33 REMAP_PORT_55=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=63 REMAP_PORT_57=63 REMAP_PORT_58=63 REMAP_PORT_59=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=63 REMAP_PORT_62=63 REMAP_PORT_63=63 + +led 0 stop +led 0 prog \ + 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 7E \ + 02 FB 42 24 06 F9 D2 00 74 1E 02 F9 42 03 67 AC \ + 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 \ + 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC \ + 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 \ + 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 \ + 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 \ + F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 \ + 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF \ + 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 \ + 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC \ + 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 \ + 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 \ + 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 98 67 \ + 84 57 80 18 71 EB 67 84 67 98 57 67 84 67 84 57 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 0 start +led auto on + +led 1 stop +led 1 prog \ + 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 7E \ + 02 FB 42 24 06 F9 D2 00 74 1E 02 F9 42 03 67 AC \ + 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 \ + 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC \ + 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 \ + 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 \ + 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 \ + F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 \ + 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF \ + 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 \ + 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC \ + 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 \ + 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 \ + 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 98 67 \ + 84 57 80 18 71 EB 67 84 67 98 57 67 84 67 84 57 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 1 start +led auto on diff --git a/device/accton/x86_64-accton_as7312_54x-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as7312_54x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..7681caafeef --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54x-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as7312_54x-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as7312_54x-r0/plugins/psuutil.py new file mode 100644 index 00000000000..d73e65bf798 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54x-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 2: "11-0053", + 1: "10-0050", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as7312_54x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7312_54x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..a1785fde553 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54x-r0/plugins/sfputil.py @@ -0,0 +1,245 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 54 + PORTS_IN_BLOCK = 54 + QSFP_PORT_START = 49 + QSFP_PORT_END = 54 + + BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{1}-0050/" + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _cpld_mapping = { + 0: "4-0060", + 1: "5-0062", + 2: "6-0064", + } + _port_to_i2c_mapping = { + 1: 18, + 2: 19, + 3: 20, + 4: 21, + 5: 22, + 6: 23, + 7: 24, + 8: 25, + 9: 26, + 10: 27, + 11: 28, + 12: 29, + 13: 30, + 14: 31, + 15: 32, + 16: 33, + 17: 34, + 18: 35, + 19: 36, + 20: 37, + 21: 38, + 22: 39, + 23: 40, + 24: 41, + 25: 42, + 26: 43, + 27: 44, + 28: 45, + 29: 46, + 30: 47, + 31: 48, + 32: 49, + 33: 50, + 34: 51, + 35: 52, + 36: 53, + 37: 54, + 38: 55, + 39: 56, + 40: 57, + 41: 58, + 42: 59, + 43: 60, + 44: 61, + 45: 62, + 46: 63, + 47: 64, + 48: 65, + 49: 66, #QSFP49 + 50: 67, + 51: 68, + 52: 69, + 53: 70, + 54: 71, #QSFP54 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x]) + + SfpUtilBase.__init__(self) + + def get_cpld_num(self, port_num): + cpld_i = 1 + if (port_num > 24 and port_num < self.qsfp_port_start): + cpld_i = 2 + + if (port_num > 52): + cpld_i = 2 + + return cpld_i + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + cpld_i = self.get_cpld_num(port_num) + + cpld_ps = self._cpld_mapping[cpld_i] + path = "/sys/bus/i2c/devices/{0}/module_present_{1}" + port_ps = path.format(cpld_ps, port_num) + + try: + val_file = open(port_ps) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False + + eeprom = open(self.port_to_eeprom_mapping[port_num], "rb") + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if ((lpmode & 0x3) == 0x3): + return True # Low Power Mode if "Power override" bit is 1 and "Power set" bit is 1 + else: + return False # High Power Mode if one of the following conditions is matched: + # 1. "Power override" bit is 0 + # 2. "Power override" bit is 1 and "Power set" bit is 0 + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b") + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def reset(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + cpld_i = self.get_cpld_num(port_num) + cpld_ps = self._cpld_mapping[cpld_i] + path = "/sys/bus/i2c/devices/{0}/module_reset_{1}" + port_ps = path.format(cpld_ps, port_num) + try: + reg_file = open(port_ps, 'w') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = '0' + + reg_file.write(reg_value) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/accton/x86_64-accton_as7312_54x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7312_54x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7312_54xs-r0/Accton-AS7312-54XS/port_config.ini b/device/accton/x86_64-accton_as7312_54xs-r0/Accton-AS7312-54XS/port_config.ini new file mode 100755 index 00000000000..93160688d74 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54xs-r0/Accton-AS7312-54XS/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias index speed +Ethernet0 41 twentyfiveGigE1 1 25000 +Ethernet1 42 twentyfiveGigE2 2 25000 +Ethernet2 43 twentyfiveGigE3 3 25000 +Ethernet3 44 twentyfiveGigE4 4 25000 +Ethernet4 49 twentyfiveGigE5 5 25000 +Ethernet5 50 twentyfiveGigE6 6 25000 +Ethernet6 51 twentyfiveGigE7 7 25000 +Ethernet7 52 twentyfiveGigE8 8 25000 +Ethernet8 53 twentyfiveGigE9 9 25000 +Ethernet9 54 twentyfiveGigE10 10 25000 +Ethernet10 55 twentyfiveGigE11 11 25000 +Ethernet11 56 twentyfiveGigE12 12 25000 +Ethernet12 65 twentyfiveGigE13 13 25000 +Ethernet13 66 twentyfiveGigE14 14 25000 +Ethernet14 67 twentyfiveGigE15 15 25000 +Ethernet15 68 twentyfiveGigE16 16 25000 +Ethernet16 33 twentyfiveGigE17 17 25000 +Ethernet17 34 twentyfiveGigE18 18 25000 +Ethernet18 35 twentyfiveGigE19 19 25000 +Ethernet19 36 twentyfiveGigE20 20 25000 +Ethernet20 37 twentyfiveGigE21 21 25000 +Ethernet21 38 twentyfiveGigE22 22 25000 +Ethernet22 39 twentyfiveGigE23 23 25000 +Ethernet23 40 twentyfiveGigE24 24 25000 +Ethernet24 69 twentyfiveGigE25 25 25000 +Ethernet25 70 twentyfiveGigE26 26 25000 +Ethernet26 71 twentyfiveGigE27 27 25000 +Ethernet27 72 twentyfiveGigE28 28 25000 +Ethernet28 81 twentyfiveGigE29 29 25000 +Ethernet29 82 twentyfiveGigE30 30 25000 +Ethernet30 83 twentyfiveGigE31 31 25000 +Ethernet31 84 twentyfiveGigE32 32 25000 +Ethernet32 85 twentyfiveGigE33 33 25000 +Ethernet33 86 twentyfiveGigE34 34 25000 +Ethernet34 87 twentyfiveGigE35 35 25000 +Ethernet35 88 twentyfiveGigE36 36 25000 +Ethernet36 97 twentyfiveGigE37 37 25000 +Ethernet37 98 twentyfiveGigE38 38 25000 +Ethernet38 99 twentyfiveGigE39 39 25000 +Ethernet39 100 twentyfiveGigE40 40 25000 +Ethernet40 101 twentyfiveGigE41 41 25000 +Ethernet41 102 twentyfiveGigE42 42 25000 +Ethernet42 103 twentyfiveGigE43 43 25000 +Ethernet43 104 twentyfiveGigE44 44 25000 +Ethernet44 105 twentyfiveGigE45 45 25000 +Ethernet45 106 twentyfiveGigE46 46 25000 +Ethernet46 107 twentyfiveGigE47 47 25000 +Ethernet47 108 twentyfiveGigE48 48 25000 +Ethernet48 5,6,7,8 hundredGigE49 49 100000 +Ethernet52 1,2,3,4 hundredGigE50 50 100000 +Ethernet56 109,110,111,112 hundredGigE51 51 100000 +Ethernet60 21,22,23,24 hundredGigE52 52 100000 +Ethernet64 9,10,11,12 hundredGigE53 53 100000 +Ethernet68 117,118,119,120 hundredGigE54 54 100000 diff --git a/device/accton/x86_64-accton_as7312_54xs-r0/Accton-AS7312-54XS/sai.profile b/device/accton/x86_64-accton_as7312_54xs-r0/Accton-AS7312-54XS/sai.profile new file mode 100644 index 00000000000..31aefe2c290 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54xs-r0/Accton-AS7312-54XS/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-as7312-48x25G+6x100G.config.bcm diff --git a/device/accton/x86_64-accton_as7312_54xs-r0/Accton-AS7312-54XS/th-as7312-48x25G+6x100G.config.bcm b/device/accton/x86_64-accton_as7312_54xs-r0/Accton-AS7312-54XS/th-as7312-48x25G+6x100G.config.bcm new file mode 100644 index 00000000000..eef4d987e8e --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54xs-r0/Accton-AS7312-54XS/th-as7312-48x25G+6x100G.config.bcm @@ -0,0 +1,519 @@ +# accton_as7312_54x 48x25G+6x100G SDK config +os=unix +schan_intr_enable=0 + +l2_mem_entries=40960 +l2xmsg_mode=1 +l3_mem_entries=40960 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +mmu_lossless=1 + +pbmp_oversubscribe=0x0407ffc00ff00ff003fc3ffc00200222 +pbmp_xport_xe=0x0407ffd00ff00ff403fc3ffc00200222 + +## FC10 ## +dport_map_port_42=1 +dport_map_port_43=2 +dport_map_port_44=3 +dport_map_port_45=4 + +## FC12 ## +dport_map_port_50=5 +dport_map_port_51=6 +dport_map_port_52=7 +dport_map_port_53=8 + +## FC13 ## +dport_map_port_54=9 +dport_map_port_55=10 +dport_map_port_56=11 +dport_map_port_57=12 + +## FC16 ## +dport_map_port_68=13 +dport_map_port_69=14 +dport_map_port_70=15 +dport_map_port_71=16 + +## FC8 ## +dport_map_port_34=17 +dport_map_port_35=18 +dport_map_port_36=19 +dport_map_port_37=20 + +## FC9 ## +dport_map_port_38=21 +dport_map_port_39=22 +dport_map_port_40=23 +dport_map_port_41=24 + +## FC17 ## +dport_map_port_72=25 +dport_map_port_73=26 +dport_map_port_74=27 +dport_map_port_75=28 + +## FC20 ## +dport_map_port_84=29 +dport_map_port_85=30 +dport_map_port_86=31 +dport_map_port_87=32 + +## FC21 ## +dport_map_port_88=33 +dport_map_port_89=34 +dport_map_port_90=35 +dport_map_port_91=36 + +## FC24 ## +dport_map_port_102=37 +dport_map_port_103=38 +dport_map_port_104=39 +dport_map_port_105=40 + +## FC25 ## +dport_map_port_106=41 +dport_map_port_107=42 +dport_map_port_108=43 +dport_map_port_109=44 + +## FC26 ## +dport_map_port_110=45 +dport_map_port_111=46 +dport_map_port_112=47 +dport_map_port_113=48 + +## FC1 ## +dport_map_port_5=49 + +## FC0 ## +dport_map_port_1=50 + +## FC27 ## +dport_map_port_114=51 + +## FC5 ## +dport_map_port_21=52 + +## FC2 ## +dport_map_port_9=53 + +## FC29 ## +dport_map_port_122=54 + +#for KR +#dport_map_port_66=55 +#dport_map_port_100=56 + +/* Port Map */ +## FC10 ## +portmap_42=41:25 +portmap_43=42:25 +portmap_44=43:25 +portmap_45=44:25 + +## FC12 ## +portmap_50=49:25 +portmap_51=50:25 +portmap_52=51:25 +portmap_53=52:25 + + +## FC13 ## +portmap_54=53:25 +portmap_55=54:25 +portmap_56=55:25 +portmap_57=56:25 + +## FC16 ## +portmap_68=65:25 +portmap_69=66:25 +portmap_70=67:25 +portmap_71=68:25 + + +## FC8 ## +portmap_34=33:25 +portmap_35=34:25 +portmap_36=35:25 +portmap_37=36:25 + +## FC9 ## +portmap_38=37:25 +portmap_39=38:25 +portmap_40=39:25 +portmap_41=40:25 + +## FC17 ## +portmap_72=69:25 +portmap_73=70:25 +portmap_74=71:25 +portmap_75=72:25 + +## FC20 ## +portmap_84=81:25 +portmap_85=82:25 +portmap_86=83:25 +portmap_87=84:25 + + +## FC21 ## +portmap_88=85:25 +portmap_89=86:25 +portmap_90=87:25 +portmap_91=88:25 + +## FC24 ## +portmap_102=97:25 +portmap_103=98:25 +portmap_104=99:25 +portmap_105=100:25 + +## FC25 ## +portmap_106=101:25 +portmap_107=102:25 +portmap_108=103:25 +portmap_109=104:25 + +## FC26 ## +portmap_110=105:25 +portmap_111=106:25 +portmap_112=107:25 +portmap_113=108:25 + +## FC1 ## +portmap_5=5:100 + +## FC0 ## +portmap_1=1:100 + +## FC27 ## +portmap_114=109:100 + +## FC5 ## +portmap_21=21:100 + +## FC2 ## +portmap_9=9:100 + +## FC29 ## +portmap_122=117:100 + +# CPU to MAC +# TSC-E management port 1 +#portmap_66=129:10 +# TSC-E management port 2 +#portmap_100=131:10 + +xgxs_rx_lane_map_42=0x2310 +xgxs_rx_lane_map_43=0x2310 +xgxs_rx_lane_map_44=0x2310 +xgxs_rx_lane_map_45=0x2310 +xgxs_rx_lane_map_50=0x3210 +xgxs_rx_lane_map_51=0x3210 +xgxs_rx_lane_map_52=0x3210 +xgxs_rx_lane_map_53=0x3210 +xgxs_rx_lane_map_54=0x3210 +xgxs_rx_lane_map_55=0x3210 +xgxs_rx_lane_map_56=0x3210 +xgxs_rx_lane_map_57=0x3210 +xgxs_rx_lane_map_68=0x0123 +xgxs_rx_lane_map_69=0x0123 +xgxs_rx_lane_map_70=0x0123 +xgxs_rx_lane_map_71=0x0123 +xgxs_rx_lane_map_34=0x0123 +xgxs_rx_lane_map_35=0x0123 +xgxs_rx_lane_map_36=0x0123 +xgxs_rx_lane_map_37=0x0123 +xgxs_rx_lane_map_38=0x0123 +xgxs_rx_lane_map_39=0x0123 +xgxs_rx_lane_map_40=0x0123 +xgxs_rx_lane_map_41=0x0123 +xgxs_rx_lane_map_72=0x3210 +xgxs_rx_lane_map_73=0x3210 +xgxs_rx_lane_map_74=0x3210 +xgxs_rx_lane_map_75=0x3210 +xgxs_rx_lane_map_84=0x1032 +xgxs_rx_lane_map_85=0x1032 +xgxs_rx_lane_map_86=0x1032 +xgxs_rx_lane_map_87=0x1032 +xgxs_rx_lane_map_88=0x2301 +xgxs_rx_lane_map_89=0x2301 +xgxs_rx_lane_map_90=0x2301 +xgxs_rx_lane_map_91=0x2301 +xgxs_rx_lane_map_102=0x0123 +xgxs_rx_lane_map_103=0x0123 +xgxs_rx_lane_map_104=0x0123 +xgxs_rx_lane_map_105=0x0123 +xgxs_rx_lane_map_106=0x3210 +xgxs_rx_lane_map_107=0x3210 +xgxs_rx_lane_map_108=0x3210 +xgxs_rx_lane_map_109=0x3210 +xgxs_rx_lane_map_110=0x1032 +xgxs_rx_lane_map_111=0x1032 +xgxs_rx_lane_map_112=0x1032 +xgxs_rx_lane_map_113=0x1032 +xgxs_rx_lane_map_5=0x3210 +xgxs_rx_lane_map_1=0x3210 +xgxs_rx_lane_map_114=0x0123 +xgxs_rx_lane_map_21=0x0213 +xgxs_rx_lane_map_9=0x3210 +xgxs_rx_lane_map_122=0x1230 + +xgxs_tx_lane_map_42=0x0132 +xgxs_tx_lane_map_43=0x0132 +xgxs_tx_lane_map_44=0x0132 +xgxs_tx_lane_map_45=0x0132 +xgxs_tx_lane_map_50=0x3210 +xgxs_tx_lane_map_51=0x3210 +xgxs_tx_lane_map_52=0x3210 +xgxs_tx_lane_map_53=0x3210 +xgxs_tx_lane_map_54=0x3210 +xgxs_tx_lane_map_55=0x3210 +xgxs_tx_lane_map_56=0x3210 +xgxs_tx_lane_map_57=0x3210 +xgxs_tx_lane_map_68=0x0123 +xgxs_tx_lane_map_69=0x0123 +xgxs_tx_lane_map_70=0x0123 +xgxs_tx_lane_map_71=0x0123 +xgxs_tx_lane_map_34=0x0123 +xgxs_tx_lane_map_35=0x0123 +xgxs_tx_lane_map_36=0x0123 +xgxs_tx_lane_map_37=0x0123 +xgxs_tx_lane_map_38=0x0123 +xgxs_tx_lane_map_39=0x0123 +xgxs_tx_lane_map_40=0x0123 +xgxs_tx_lane_map_41=0x0123 +xgxs_tx_lane_map_72=0x0123 +xgxs_tx_lane_map_73=0x0123 +xgxs_tx_lane_map_74=0x0123 +xgxs_tx_lane_map_75=0x0123 +xgxs_tx_lane_map_84=0x0123 +xgxs_tx_lane_map_85=0x0123 +xgxs_tx_lane_map_86=0x0123 +xgxs_tx_lane_map_87=0x0123 +xgxs_tx_lane_map_88=0x2301 +xgxs_tx_lane_map_89=0x2301 +xgxs_tx_lane_map_90=0x2301 +xgxs_tx_lane_map_91=0x2301 +xgxs_tx_lane_map_102=0x0123 +xgxs_tx_lane_map_103=0x0123 +xgxs_tx_lane_map_104=0x0123 +xgxs_tx_lane_map_105=0x0123 +xgxs_tx_lane_map_106=0x3210 +xgxs_tx_lane_map_107=0x3210 +xgxs_tx_lane_map_108=0x3210 +xgxs_tx_lane_map_109=0x3210 +xgxs_tx_lane_map_110=0x1032 +xgxs_tx_lane_map_111=0x1032 +xgxs_tx_lane_map_112=0x1032 +xgxs_tx_lane_map_113=0x1032 +xgxs_tx_lane_map_5=0x3210 +xgxs_tx_lane_map_1=0x3210 +xgxs_tx_lane_map_114=0x0123 +xgxs_tx_lane_map_21=0x3210 +xgxs_tx_lane_map_9=0x3210 +xgxs_tx_lane_map_122=0x3210 + +#Polarity RX +phy_xaui_rx_polarity_flip_34=0x1 +phy_xaui_rx_polarity_flip_35=0x1 +phy_xaui_rx_polarity_flip_36=0x1 +phy_xaui_rx_polarity_flip_37=0x1 +phy_xaui_rx_polarity_flip_38=0x1 +phy_xaui_rx_polarity_flip_39=0x1 +phy_xaui_rx_polarity_flip_40=0x1 +phy_xaui_rx_polarity_flip_41=0x1 +phy_xaui_rx_polarity_flip_84=0x1 +phy_xaui_rx_polarity_flip_85=0x0 +phy_xaui_rx_polarity_flip_86=0x1 +phy_xaui_rx_polarity_flip_87=0x0 +phy_xaui_rx_polarity_flip_88=0x1 +phy_xaui_rx_polarity_flip_89=0x0 +phy_xaui_rx_polarity_flip_90=0x1 +phy_xaui_rx_polarity_flip_91=0x1 +phy_xaui_rx_polarity_flip_102=0x0 +phy_xaui_rx_polarity_flip_103=0x0 +phy_xaui_rx_polarity_flip_104=0x1 +phy_xaui_rx_polarity_flip_105=0x0 +phy_xaui_rx_polarity_flip_122=0xf +#Polarity TX +phy_xaui_tx_polarity_flip_42=0x1 +phy_xaui_tx_polarity_flip_43=0x1 +phy_xaui_tx_polarity_flip_44=0x1 +phy_xaui_tx_polarity_flip_45=0x1 +phy_xaui_tx_polarity_flip_34=0x1 +phy_xaui_tx_polarity_flip_35=0x1 +phy_xaui_tx_polarity_flip_36=0x1 +phy_xaui_tx_polarity_flip_37=0x1 +phy_xaui_tx_polarity_flip_38=0x0 +phy_xaui_tx_polarity_flip_39=0x1 +phy_xaui_tx_polarity_flip_40=0x0 +phy_xaui_tx_polarity_flip_41=0x1 +phy_xaui_tx_polarity_flip_72=0x1 +phy_xaui_tx_polarity_flip_73=0x1 +phy_xaui_tx_polarity_flip_74=0x1 +phy_xaui_tx_polarity_flip_75=0x1 +phy_xaui_tx_polarity_flip_84=0x1 +phy_xaui_tx_polarity_flip_85=0x1 +phy_xaui_tx_polarity_flip_86=0x1 +phy_xaui_tx_polarity_flip_87=0x1 +phy_xaui_tx_polarity_flip_88=0x1 +phy_xaui_tx_polarity_flip_89=0x1 +phy_xaui_tx_polarity_flip_90=0x1 +phy_xaui_tx_polarity_flip_91=0x1 +phy_xaui_tx_polarity_flip_102=0x1 +phy_xaui_tx_polarity_flip_103=0x1 +phy_xaui_tx_polarity_flip_104=0x1 +phy_xaui_tx_polarity_flip_105=0x1 +phy_xaui_tx_polarity_flip_122=0xb + +#Driver Current +serdes_driver_current_42=0x8 +serdes_driver_current_43=0x8 +serdes_driver_current_44=0x8 +serdes_driver_current_45=0x8 +serdes_driver_current_50=0x8 +serdes_driver_current_51=0x8 +serdes_driver_current_52=0x8 +serdes_driver_current_53=0x8 +serdes_driver_current_54=0x8 +serdes_driver_current_55=0x8 +serdes_driver_current_56=0x8 +serdes_driver_current_57=0x8 +serdes_driver_current_68=0x8 +serdes_driver_current_69=0x8 +serdes_driver_current_70=0x8 +serdes_driver_current_71=0x8 +serdes_driver_current_34=0x8 +serdes_driver_current_35=0x8 +serdes_driver_current_36=0x8 +serdes_driver_current_37=0x8 +serdes_driver_current_38=0x8 +serdes_driver_current_39=0x8 +serdes_driver_current_40=0x8 +serdes_driver_current_41=0x8 +serdes_driver_current_72=0x8 +serdes_driver_current_73=0x8 +serdes_driver_current_74=0x8 +serdes_driver_current_75=0x8 +serdes_driver_current_84=0x8 +serdes_driver_current_85=0x8 +serdes_driver_current_86=0x8 +serdes_driver_current_87=0x8 +serdes_driver_current_88=0x8 +serdes_driver_current_89=0x8 +serdes_driver_current_90=0x8 +serdes_driver_current_91=0x8 +serdes_driver_current_102=0x8 +serdes_driver_current_103=0x8 +serdes_driver_current_104=0x8 +serdes_driver_current_105=0x8 +serdes_driver_current_106=0x8 +serdes_driver_current_107=0x8 +serdes_driver_current_108=0x8 +serdes_driver_current_109=0x8 +serdes_driver_current_110=0x8 +serdes_driver_current_111=0x8 +serdes_driver_current_112=0x8 +serdes_driver_current_113=0x8 +serdes_driver_current_lane0_5=0x8 +serdes_driver_current_lane1_5=0x8 +serdes_driver_current_lane2_5=0x8 +serdes_driver_current_lane3_5=0x8 +serdes_driver_current_lane0_1=0x8 +serdes_driver_current_lane1_1=0x8 +serdes_driver_current_lane2_1=0x8 +serdes_driver_current_lane3_1=0x8 +serdes_driver_current_lane0_114=0x8 +serdes_driver_current_lane1_114=0x8 +serdes_driver_current_lane2_114=0x8 +serdes_driver_current_lane3_114=0x8 +serdes_driver_current_lane0_21=0x8 +serdes_driver_current_lane1_21=0x8 +serdes_driver_current_lane2_21=0x8 +serdes_driver_current_lane3_21=0x8 +serdes_driver_current_lane0_9=0x8 +serdes_driver_current_lane1_9=0x8 +serdes_driver_current_lane2_9=0x8 +serdes_driver_current_lane3_9=0x8 +serdes_driver_current_lane0_122=0x8 +serdes_driver_current_lane1_122=0x8 +serdes_driver_current_lane2_122=0x8 +serdes_driver_current_lane3_122=0x8 + +#Preemphasis +serdes_preemphasis_42=0x264006 +serdes_preemphasis_43=0x264006 +serdes_preemphasis_44=0x254106 +serdes_preemphasis_45=0x254106 +serdes_preemphasis_50=0x254106 +serdes_preemphasis_51=0x254106 +serdes_preemphasis_52=0x254106 +serdes_preemphasis_53=0x254106 +serdes_preemphasis_54=0x254106 +serdes_preemphasis_55=0x254106 +serdes_preemphasis_56=0x254106 +serdes_preemphasis_57=0x234306 +serdes_preemphasis_68=0x234306 +serdes_preemphasis_69=0x204606 +serdes_preemphasis_70=0x204606 +serdes_preemphasis_71=0x204606 +serdes_preemphasis_34=0x234306 +serdes_preemphasis_35=0x234306 +serdes_preemphasis_36=0x234306 +serdes_preemphasis_37=0x234306 +serdes_preemphasis_38=0x234306 +serdes_preemphasis_39=0x234306 +serdes_preemphasis_40=0x234306 +serdes_preemphasis_41=0x234306 +serdes_preemphasis_72=0x1e4806 +serdes_preemphasis_73=0x1e4806 +serdes_preemphasis_74=0x1e4806 +serdes_preemphasis_75=0x1e4806 +serdes_preemphasis_84=0x1e4806 +serdes_preemphasis_85=0x1a4c06 +serdes_preemphasis_86=0x1a4c06 +serdes_preemphasis_87=0x1b4b06 +serdes_preemphasis_88=0x1b4b06 +serdes_preemphasis_89=0x1e4806 +serdes_preemphasis_90=0x1e4806 +serdes_preemphasis_91=0x1e4806 +serdes_preemphasis_102=0x1e4806 +serdes_preemphasis_103=0x1e4806 +serdes_preemphasis_104=0x1e4806 +serdes_preemphasis_105=0x1e4806 +serdes_preemphasis_106=0x1e4806 +serdes_preemphasis_107=0x1e4806 +serdes_preemphasis_108=0x1e4806 +serdes_preemphasis_109=0x1e4806 +serdes_preemphasis_110=0x1e4806 +serdes_preemphasis_111=0x1d4906 +serdes_preemphasis_112=0x234306 +serdes_preemphasis_113=0x1f4706 +serdes_preemphasis_lane0_5=0x294106 +serdes_preemphasis_lane1_5=0x294106 +serdes_preemphasis_lane2_5=0x294106 +serdes_preemphasis_lane3_5=0x294106 +serdes_preemphasis_lane0_1=0x294106 +serdes_preemphasis_lane1_1=0x294106 +serdes_preemphasis_lane2_1=0x294106 +serdes_preemphasis_lane3_1=0x294106 +serdes_preemphasis_lane0_114=0x2a4006 +serdes_preemphasis_lane1_114=0x2a4006 +serdes_preemphasis_lane2_114=0x2a4006 +serdes_preemphasis_lane3_114=0x2a4006 +serdes_preemphasis_lane0_21=0x2c3c08 +serdes_preemphasis_lane1_21=0x2a4006 +serdes_preemphasis_lane2_21=0x2a4006 +serdes_preemphasis_lane3_21=0x2a4006 +serdes_preemphasis_lane0_9=0x284206 +serdes_preemphasis_lane1_9=0x284206 +serdes_preemphasis_lane2_9=0x284206 +serdes_preemphasis_lane3_9=0x284206 +serdes_preemphasis_lane0_122=0x283e06 +serdes_preemphasis_lane1_122=0x283e06 +serdes_preemphasis_lane2_122=0x283e06 +serdes_preemphasis_lane3_122=0x294601 diff --git a/device/accton/x86_64-accton_as7312_54xs-r0/default_sku b/device/accton/x86_64-accton_as7312_54xs-r0/default_sku new file mode 100644 index 00000000000..9e6062dee23 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54xs-r0/default_sku @@ -0,0 +1 @@ +Accton-AS7312-54XS t1 diff --git a/device/accton/x86_64-accton_as7312_54xs-r0/installer.conf b/device/accton/x86_64-accton_as7312_54xs-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54xs-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/accton/x86_64-accton_as7312_54xs-r0/led_proc_init.soc b/device/accton/x86_64-accton_as7312_54xs-r0/led_proc_init.soc new file mode 100755 index 00000000000..3074649497e --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54xs-r0/led_proc_init.soc @@ -0,0 +1,79 @@ +# accton_as7312_54x 48x25G+6x100G SDK port LED macro init SOC +s CMIC_LEDUP0_DATA_RAM 0 +s CMIC_LEDUP1_DATA_RAM 0 + +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=63 REMAP_PORT_1=63 REMAP_PORT_2=63 REMAP_PORT_3=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=63 REMAP_PORT_5=63 REMAP_PORT_6=63 REMAP_PORT_7=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=27 REMAP_PORT_9=26 REMAP_PORT_10=25 REMAP_PORT_11=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=63 REMAP_PORT_13=63 REMAP_PORT_14=63 REMAP_PORT_15=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=63 REMAP_PORT_17=63 REMAP_PORT_18=63 REMAP_PORT_19=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=31 REMAP_PORT_21=30 REMAP_PORT_22=29 REMAP_PORT_23=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=15 REMAP_PORT_25=14 REMAP_PORT_26=13 REMAP_PORT_27=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=19 REMAP_PORT_29=18 REMAP_PORT_30=17 REMAP_PORT_31=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=63 REMAP_PORT_33=63 REMAP_PORT_34=63 REMAP_PORT_35=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=63 REMAP_PORT_37=63 REMAP_PORT_38=63 REMAP_PORT_39=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=35 REMAP_PORT_41=34 REMAP_PORT_42=33 REMAP_PORT_43=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=63 REMAP_PORT_45=63 REMAP_PORT_46=63 REMAP_PORT_47=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=23 REMAP_PORT_49=22 REMAP_PORT_50=21 REMAP_PORT_51=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 REMAP_PORT_53=10 REMAP_PORT_54=9 REMAP_PORT_55=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 + +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=19 REMAP_PORT_1=18 REMAP_PORT_2=17 REMAP_PORT_3=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=23 REMAP_PORT_5=22 REMAP_PORT_6=21 REMAP_PORT_7=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=3 REMAP_PORT_9=2 REMAP_PORT_10=1 REMAP_PORT_11=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=63 REMAP_PORT_13=63 REMAP_PORT_14=63 REMAP_PORT_15=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=7 REMAP_PORT_17=6 REMAP_PORT_18=5 REMAP_PORT_19=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=11 REMAP_PORT_21=10 REMAP_PORT_22=9 REMAP_PORT_23=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=63 REMAP_PORT_25=63 REMAP_PORT_26=63 REMAP_PORT_27=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=63 REMAP_PORT_29=63 REMAP_PORT_30=63 REMAP_PORT_31=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=15 REMAP_PORT_33=14 REMAP_PORT_34=13 REMAP_PORT_35=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=27 REMAP_PORT_37=26 REMAP_PORT_38=25 REMAP_PORT_39=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=63 REMAP_PORT_41=63 REMAP_PORT_42=63 REMAP_PORT_43=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=63 REMAP_PORT_45=63 REMAP_PORT_46=63 REMAP_PORT_47=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=31 REMAP_PORT_49=30 REMAP_PORT_50=29 REMAP_PORT_51=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=35 REMAP_PORT_53=34 REMAP_PORT_54=33 REMAP_PORT_55=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=63 REMAP_PORT_57=63 REMAP_PORT_58=63 REMAP_PORT_59=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=63 REMAP_PORT_62=63 REMAP_PORT_63=63 + +led 0 stop +led 0 prog \ + 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 7E \ + 02 FB 42 24 06 F9 D2 00 74 1E 02 F9 42 03 67 AC \ + 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 \ + 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC \ + 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 \ + 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 \ + 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 \ + F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 \ + 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF \ + 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 \ + 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC \ + 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 \ + 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 \ + 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 98 67 \ + 84 57 80 18 71 EB 67 84 67 98 57 67 84 67 84 57 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 0 start +led auto on + +led 1 stop +led 1 prog \ + 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 7E \ + 02 FB 42 24 06 F9 D2 00 74 1E 02 F9 42 03 67 AC \ + 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 \ + 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC \ + 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 \ + 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 \ + 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 \ + F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 \ + 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF \ + 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 \ + 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC \ + 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 \ + 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 \ + 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 98 67 \ + 84 57 80 18 71 EB 67 84 67 98 57 67 84 67 84 57 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 1 start +led auto on diff --git a/device/accton/x86_64-accton_as7312_54xs-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as7312_54xs-r0/plugins/eeprom.py new file mode 100644 index 00000000000..7681caafeef --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54xs-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as7312_54xs-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as7312_54xs-r0/plugins/psuutil.py new file mode 100644 index 00000000000..d73e65bf798 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54xs-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 2: "11-0053", + 1: "10-0050", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as7312_54xs-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7312_54xs-r0/plugins/sfputil.py new file mode 100644 index 00000000000..a1785fde553 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54xs-r0/plugins/sfputil.py @@ -0,0 +1,245 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 54 + PORTS_IN_BLOCK = 54 + QSFP_PORT_START = 49 + QSFP_PORT_END = 54 + + BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{1}-0050/" + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _cpld_mapping = { + 0: "4-0060", + 1: "5-0062", + 2: "6-0064", + } + _port_to_i2c_mapping = { + 1: 18, + 2: 19, + 3: 20, + 4: 21, + 5: 22, + 6: 23, + 7: 24, + 8: 25, + 9: 26, + 10: 27, + 11: 28, + 12: 29, + 13: 30, + 14: 31, + 15: 32, + 16: 33, + 17: 34, + 18: 35, + 19: 36, + 20: 37, + 21: 38, + 22: 39, + 23: 40, + 24: 41, + 25: 42, + 26: 43, + 27: 44, + 28: 45, + 29: 46, + 30: 47, + 31: 48, + 32: 49, + 33: 50, + 34: 51, + 35: 52, + 36: 53, + 37: 54, + 38: 55, + 39: 56, + 40: 57, + 41: 58, + 42: 59, + 43: 60, + 44: 61, + 45: 62, + 46: 63, + 47: 64, + 48: 65, + 49: 66, #QSFP49 + 50: 67, + 51: 68, + 52: 69, + 53: 70, + 54: 71, #QSFP54 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x]) + + SfpUtilBase.__init__(self) + + def get_cpld_num(self, port_num): + cpld_i = 1 + if (port_num > 24 and port_num < self.qsfp_port_start): + cpld_i = 2 + + if (port_num > 52): + cpld_i = 2 + + return cpld_i + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + cpld_i = self.get_cpld_num(port_num) + + cpld_ps = self._cpld_mapping[cpld_i] + path = "/sys/bus/i2c/devices/{0}/module_present_{1}" + port_ps = path.format(cpld_ps, port_num) + + try: + val_file = open(port_ps) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False + + eeprom = open(self.port_to_eeprom_mapping[port_num], "rb") + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if ((lpmode & 0x3) == 0x3): + return True # Low Power Mode if "Power override" bit is 1 and "Power set" bit is 1 + else: + return False # High Power Mode if one of the following conditions is matched: + # 1. "Power override" bit is 0 + # 2. "Power override" bit is 1 and "Power set" bit is 0 + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b") + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def reset(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + cpld_i = self.get_cpld_num(port_num) + cpld_ps = self._cpld_mapping[cpld_i] + path = "/sys/bus/i2c/devices/{0}/module_reset_{1}" + port_ps = path.format(cpld_ps, port_num) + try: + reg_file = open(port_ps, 'w') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = '0' + + reg_file.write(reg_value) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/accton/x86_64-accton_as7312_54xs-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7312_54xs-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7312_54xs-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7315_27xb-r0/Accton-AS7315-27XB/port_config.ini b/device/accton/x86_64-accton_as7315_27xb-r0/Accton-AS7315-27XB/port_config.ini new file mode 100644 index 00000000000..26d49cdde58 --- /dev/null +++ b/device/accton/x86_64-accton_as7315_27xb-r0/Accton-AS7315-27XB/port_config.ini @@ -0,0 +1,28 @@ +# name lanes alias index speed +Ethernet0 28 twentyfiveGigE1 1 25000 +Ethernet1 29 twentyfiveGigE2 2 25000 +Ethernet2 30 twentyfiveGigE3 3 25000 +Ethernet3 31 twentyfiveGigE4 4 25000 +Ethernet4 24 twentyfiveGigE5 5 10000 +Ethernet5 25 twentyfiveGigE6 6 10000 +Ethernet6 26 twentyfiveGigE7 7 10000 +Ethernet7 27 twentyfiveGigE8 8 10000 +Ethernet8 20 twentyfiveGigE9 9 10000 +Ethernet9 21 twentyfiveGigE10 10 10000 +Ethernet10 22 twentyfiveGigE11 11 10000 +Ethernet11 23 twentyfiveGigE12 12 10000 +Ethernet12 16 twentyfiveGigE13 13 10000 +Ethernet13 17 twentyfiveGigE14 14 10000 +Ethernet14 18 twentyfiveGigE15 15 10000 +Ethernet15 19 twentyfiveGigE16 16 10000 +Ethernet16 4 twentyfiveGigE17 17 10000 +Ethernet17 5 twentyfiveGigE18 18 10000 +Ethernet18 6 twentyfiveGigE19 19 10000 +Ethernet19 7 twentyfiveGigE20 20 10000 +Ethernet20 0 twentyfiveGigE21 21 10000 +Ethernet21 1 twentyfiveGigE22 22 10000 +Ethernet22 2 twentyfiveGigE23 23 10000 +Ethernet23 3 twentyfiveGigE24 24 10000 +Ethernet24 67,68,69,70 twentyfiveGigE25 25 100000 +Ethernet25 71,72,73,74 twentyfiveGigE26 26 100000 +Ethernet26 75,76,77,78 twentyfiveGigE27 27 100000 diff --git a/device/accton/x86_64-accton_as7315_27xb-r0/Accton-AS7315-27XB/qax-as7315-20x10G+4x25G+3x100G.config.bcm b/device/accton/x86_64-accton_as7315_27xb-r0/Accton-AS7315-27XB/qax-as7315-20x10G+4x25G+3x100G.config.bcm new file mode 100644 index 00000000000..eef4d987e8e --- /dev/null +++ b/device/accton/x86_64-accton_as7315_27xb-r0/Accton-AS7315-27XB/qax-as7315-20x10G+4x25G+3x100G.config.bcm @@ -0,0 +1,519 @@ +# accton_as7312_54x 48x25G+6x100G SDK config +os=unix +schan_intr_enable=0 + +l2_mem_entries=40960 +l2xmsg_mode=1 +l3_mem_entries=40960 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +mmu_lossless=1 + +pbmp_oversubscribe=0x0407ffc00ff00ff003fc3ffc00200222 +pbmp_xport_xe=0x0407ffd00ff00ff403fc3ffc00200222 + +## FC10 ## +dport_map_port_42=1 +dport_map_port_43=2 +dport_map_port_44=3 +dport_map_port_45=4 + +## FC12 ## +dport_map_port_50=5 +dport_map_port_51=6 +dport_map_port_52=7 +dport_map_port_53=8 + +## FC13 ## +dport_map_port_54=9 +dport_map_port_55=10 +dport_map_port_56=11 +dport_map_port_57=12 + +## FC16 ## +dport_map_port_68=13 +dport_map_port_69=14 +dport_map_port_70=15 +dport_map_port_71=16 + +## FC8 ## +dport_map_port_34=17 +dport_map_port_35=18 +dport_map_port_36=19 +dport_map_port_37=20 + +## FC9 ## +dport_map_port_38=21 +dport_map_port_39=22 +dport_map_port_40=23 +dport_map_port_41=24 + +## FC17 ## +dport_map_port_72=25 +dport_map_port_73=26 +dport_map_port_74=27 +dport_map_port_75=28 + +## FC20 ## +dport_map_port_84=29 +dport_map_port_85=30 +dport_map_port_86=31 +dport_map_port_87=32 + +## FC21 ## +dport_map_port_88=33 +dport_map_port_89=34 +dport_map_port_90=35 +dport_map_port_91=36 + +## FC24 ## +dport_map_port_102=37 +dport_map_port_103=38 +dport_map_port_104=39 +dport_map_port_105=40 + +## FC25 ## +dport_map_port_106=41 +dport_map_port_107=42 +dport_map_port_108=43 +dport_map_port_109=44 + +## FC26 ## +dport_map_port_110=45 +dport_map_port_111=46 +dport_map_port_112=47 +dport_map_port_113=48 + +## FC1 ## +dport_map_port_5=49 + +## FC0 ## +dport_map_port_1=50 + +## FC27 ## +dport_map_port_114=51 + +## FC5 ## +dport_map_port_21=52 + +## FC2 ## +dport_map_port_9=53 + +## FC29 ## +dport_map_port_122=54 + +#for KR +#dport_map_port_66=55 +#dport_map_port_100=56 + +/* Port Map */ +## FC10 ## +portmap_42=41:25 +portmap_43=42:25 +portmap_44=43:25 +portmap_45=44:25 + +## FC12 ## +portmap_50=49:25 +portmap_51=50:25 +portmap_52=51:25 +portmap_53=52:25 + + +## FC13 ## +portmap_54=53:25 +portmap_55=54:25 +portmap_56=55:25 +portmap_57=56:25 + +## FC16 ## +portmap_68=65:25 +portmap_69=66:25 +portmap_70=67:25 +portmap_71=68:25 + + +## FC8 ## +portmap_34=33:25 +portmap_35=34:25 +portmap_36=35:25 +portmap_37=36:25 + +## FC9 ## +portmap_38=37:25 +portmap_39=38:25 +portmap_40=39:25 +portmap_41=40:25 + +## FC17 ## +portmap_72=69:25 +portmap_73=70:25 +portmap_74=71:25 +portmap_75=72:25 + +## FC20 ## +portmap_84=81:25 +portmap_85=82:25 +portmap_86=83:25 +portmap_87=84:25 + + +## FC21 ## +portmap_88=85:25 +portmap_89=86:25 +portmap_90=87:25 +portmap_91=88:25 + +## FC24 ## +portmap_102=97:25 +portmap_103=98:25 +portmap_104=99:25 +portmap_105=100:25 + +## FC25 ## +portmap_106=101:25 +portmap_107=102:25 +portmap_108=103:25 +portmap_109=104:25 + +## FC26 ## +portmap_110=105:25 +portmap_111=106:25 +portmap_112=107:25 +portmap_113=108:25 + +## FC1 ## +portmap_5=5:100 + +## FC0 ## +portmap_1=1:100 + +## FC27 ## +portmap_114=109:100 + +## FC5 ## +portmap_21=21:100 + +## FC2 ## +portmap_9=9:100 + +## FC29 ## +portmap_122=117:100 + +# CPU to MAC +# TSC-E management port 1 +#portmap_66=129:10 +# TSC-E management port 2 +#portmap_100=131:10 + +xgxs_rx_lane_map_42=0x2310 +xgxs_rx_lane_map_43=0x2310 +xgxs_rx_lane_map_44=0x2310 +xgxs_rx_lane_map_45=0x2310 +xgxs_rx_lane_map_50=0x3210 +xgxs_rx_lane_map_51=0x3210 +xgxs_rx_lane_map_52=0x3210 +xgxs_rx_lane_map_53=0x3210 +xgxs_rx_lane_map_54=0x3210 +xgxs_rx_lane_map_55=0x3210 +xgxs_rx_lane_map_56=0x3210 +xgxs_rx_lane_map_57=0x3210 +xgxs_rx_lane_map_68=0x0123 +xgxs_rx_lane_map_69=0x0123 +xgxs_rx_lane_map_70=0x0123 +xgxs_rx_lane_map_71=0x0123 +xgxs_rx_lane_map_34=0x0123 +xgxs_rx_lane_map_35=0x0123 +xgxs_rx_lane_map_36=0x0123 +xgxs_rx_lane_map_37=0x0123 +xgxs_rx_lane_map_38=0x0123 +xgxs_rx_lane_map_39=0x0123 +xgxs_rx_lane_map_40=0x0123 +xgxs_rx_lane_map_41=0x0123 +xgxs_rx_lane_map_72=0x3210 +xgxs_rx_lane_map_73=0x3210 +xgxs_rx_lane_map_74=0x3210 +xgxs_rx_lane_map_75=0x3210 +xgxs_rx_lane_map_84=0x1032 +xgxs_rx_lane_map_85=0x1032 +xgxs_rx_lane_map_86=0x1032 +xgxs_rx_lane_map_87=0x1032 +xgxs_rx_lane_map_88=0x2301 +xgxs_rx_lane_map_89=0x2301 +xgxs_rx_lane_map_90=0x2301 +xgxs_rx_lane_map_91=0x2301 +xgxs_rx_lane_map_102=0x0123 +xgxs_rx_lane_map_103=0x0123 +xgxs_rx_lane_map_104=0x0123 +xgxs_rx_lane_map_105=0x0123 +xgxs_rx_lane_map_106=0x3210 +xgxs_rx_lane_map_107=0x3210 +xgxs_rx_lane_map_108=0x3210 +xgxs_rx_lane_map_109=0x3210 +xgxs_rx_lane_map_110=0x1032 +xgxs_rx_lane_map_111=0x1032 +xgxs_rx_lane_map_112=0x1032 +xgxs_rx_lane_map_113=0x1032 +xgxs_rx_lane_map_5=0x3210 +xgxs_rx_lane_map_1=0x3210 +xgxs_rx_lane_map_114=0x0123 +xgxs_rx_lane_map_21=0x0213 +xgxs_rx_lane_map_9=0x3210 +xgxs_rx_lane_map_122=0x1230 + +xgxs_tx_lane_map_42=0x0132 +xgxs_tx_lane_map_43=0x0132 +xgxs_tx_lane_map_44=0x0132 +xgxs_tx_lane_map_45=0x0132 +xgxs_tx_lane_map_50=0x3210 +xgxs_tx_lane_map_51=0x3210 +xgxs_tx_lane_map_52=0x3210 +xgxs_tx_lane_map_53=0x3210 +xgxs_tx_lane_map_54=0x3210 +xgxs_tx_lane_map_55=0x3210 +xgxs_tx_lane_map_56=0x3210 +xgxs_tx_lane_map_57=0x3210 +xgxs_tx_lane_map_68=0x0123 +xgxs_tx_lane_map_69=0x0123 +xgxs_tx_lane_map_70=0x0123 +xgxs_tx_lane_map_71=0x0123 +xgxs_tx_lane_map_34=0x0123 +xgxs_tx_lane_map_35=0x0123 +xgxs_tx_lane_map_36=0x0123 +xgxs_tx_lane_map_37=0x0123 +xgxs_tx_lane_map_38=0x0123 +xgxs_tx_lane_map_39=0x0123 +xgxs_tx_lane_map_40=0x0123 +xgxs_tx_lane_map_41=0x0123 +xgxs_tx_lane_map_72=0x0123 +xgxs_tx_lane_map_73=0x0123 +xgxs_tx_lane_map_74=0x0123 +xgxs_tx_lane_map_75=0x0123 +xgxs_tx_lane_map_84=0x0123 +xgxs_tx_lane_map_85=0x0123 +xgxs_tx_lane_map_86=0x0123 +xgxs_tx_lane_map_87=0x0123 +xgxs_tx_lane_map_88=0x2301 +xgxs_tx_lane_map_89=0x2301 +xgxs_tx_lane_map_90=0x2301 +xgxs_tx_lane_map_91=0x2301 +xgxs_tx_lane_map_102=0x0123 +xgxs_tx_lane_map_103=0x0123 +xgxs_tx_lane_map_104=0x0123 +xgxs_tx_lane_map_105=0x0123 +xgxs_tx_lane_map_106=0x3210 +xgxs_tx_lane_map_107=0x3210 +xgxs_tx_lane_map_108=0x3210 +xgxs_tx_lane_map_109=0x3210 +xgxs_tx_lane_map_110=0x1032 +xgxs_tx_lane_map_111=0x1032 +xgxs_tx_lane_map_112=0x1032 +xgxs_tx_lane_map_113=0x1032 +xgxs_tx_lane_map_5=0x3210 +xgxs_tx_lane_map_1=0x3210 +xgxs_tx_lane_map_114=0x0123 +xgxs_tx_lane_map_21=0x3210 +xgxs_tx_lane_map_9=0x3210 +xgxs_tx_lane_map_122=0x3210 + +#Polarity RX +phy_xaui_rx_polarity_flip_34=0x1 +phy_xaui_rx_polarity_flip_35=0x1 +phy_xaui_rx_polarity_flip_36=0x1 +phy_xaui_rx_polarity_flip_37=0x1 +phy_xaui_rx_polarity_flip_38=0x1 +phy_xaui_rx_polarity_flip_39=0x1 +phy_xaui_rx_polarity_flip_40=0x1 +phy_xaui_rx_polarity_flip_41=0x1 +phy_xaui_rx_polarity_flip_84=0x1 +phy_xaui_rx_polarity_flip_85=0x0 +phy_xaui_rx_polarity_flip_86=0x1 +phy_xaui_rx_polarity_flip_87=0x0 +phy_xaui_rx_polarity_flip_88=0x1 +phy_xaui_rx_polarity_flip_89=0x0 +phy_xaui_rx_polarity_flip_90=0x1 +phy_xaui_rx_polarity_flip_91=0x1 +phy_xaui_rx_polarity_flip_102=0x0 +phy_xaui_rx_polarity_flip_103=0x0 +phy_xaui_rx_polarity_flip_104=0x1 +phy_xaui_rx_polarity_flip_105=0x0 +phy_xaui_rx_polarity_flip_122=0xf +#Polarity TX +phy_xaui_tx_polarity_flip_42=0x1 +phy_xaui_tx_polarity_flip_43=0x1 +phy_xaui_tx_polarity_flip_44=0x1 +phy_xaui_tx_polarity_flip_45=0x1 +phy_xaui_tx_polarity_flip_34=0x1 +phy_xaui_tx_polarity_flip_35=0x1 +phy_xaui_tx_polarity_flip_36=0x1 +phy_xaui_tx_polarity_flip_37=0x1 +phy_xaui_tx_polarity_flip_38=0x0 +phy_xaui_tx_polarity_flip_39=0x1 +phy_xaui_tx_polarity_flip_40=0x0 +phy_xaui_tx_polarity_flip_41=0x1 +phy_xaui_tx_polarity_flip_72=0x1 +phy_xaui_tx_polarity_flip_73=0x1 +phy_xaui_tx_polarity_flip_74=0x1 +phy_xaui_tx_polarity_flip_75=0x1 +phy_xaui_tx_polarity_flip_84=0x1 +phy_xaui_tx_polarity_flip_85=0x1 +phy_xaui_tx_polarity_flip_86=0x1 +phy_xaui_tx_polarity_flip_87=0x1 +phy_xaui_tx_polarity_flip_88=0x1 +phy_xaui_tx_polarity_flip_89=0x1 +phy_xaui_tx_polarity_flip_90=0x1 +phy_xaui_tx_polarity_flip_91=0x1 +phy_xaui_tx_polarity_flip_102=0x1 +phy_xaui_tx_polarity_flip_103=0x1 +phy_xaui_tx_polarity_flip_104=0x1 +phy_xaui_tx_polarity_flip_105=0x1 +phy_xaui_tx_polarity_flip_122=0xb + +#Driver Current +serdes_driver_current_42=0x8 +serdes_driver_current_43=0x8 +serdes_driver_current_44=0x8 +serdes_driver_current_45=0x8 +serdes_driver_current_50=0x8 +serdes_driver_current_51=0x8 +serdes_driver_current_52=0x8 +serdes_driver_current_53=0x8 +serdes_driver_current_54=0x8 +serdes_driver_current_55=0x8 +serdes_driver_current_56=0x8 +serdes_driver_current_57=0x8 +serdes_driver_current_68=0x8 +serdes_driver_current_69=0x8 +serdes_driver_current_70=0x8 +serdes_driver_current_71=0x8 +serdes_driver_current_34=0x8 +serdes_driver_current_35=0x8 +serdes_driver_current_36=0x8 +serdes_driver_current_37=0x8 +serdes_driver_current_38=0x8 +serdes_driver_current_39=0x8 +serdes_driver_current_40=0x8 +serdes_driver_current_41=0x8 +serdes_driver_current_72=0x8 +serdes_driver_current_73=0x8 +serdes_driver_current_74=0x8 +serdes_driver_current_75=0x8 +serdes_driver_current_84=0x8 +serdes_driver_current_85=0x8 +serdes_driver_current_86=0x8 +serdes_driver_current_87=0x8 +serdes_driver_current_88=0x8 +serdes_driver_current_89=0x8 +serdes_driver_current_90=0x8 +serdes_driver_current_91=0x8 +serdes_driver_current_102=0x8 +serdes_driver_current_103=0x8 +serdes_driver_current_104=0x8 +serdes_driver_current_105=0x8 +serdes_driver_current_106=0x8 +serdes_driver_current_107=0x8 +serdes_driver_current_108=0x8 +serdes_driver_current_109=0x8 +serdes_driver_current_110=0x8 +serdes_driver_current_111=0x8 +serdes_driver_current_112=0x8 +serdes_driver_current_113=0x8 +serdes_driver_current_lane0_5=0x8 +serdes_driver_current_lane1_5=0x8 +serdes_driver_current_lane2_5=0x8 +serdes_driver_current_lane3_5=0x8 +serdes_driver_current_lane0_1=0x8 +serdes_driver_current_lane1_1=0x8 +serdes_driver_current_lane2_1=0x8 +serdes_driver_current_lane3_1=0x8 +serdes_driver_current_lane0_114=0x8 +serdes_driver_current_lane1_114=0x8 +serdes_driver_current_lane2_114=0x8 +serdes_driver_current_lane3_114=0x8 +serdes_driver_current_lane0_21=0x8 +serdes_driver_current_lane1_21=0x8 +serdes_driver_current_lane2_21=0x8 +serdes_driver_current_lane3_21=0x8 +serdes_driver_current_lane0_9=0x8 +serdes_driver_current_lane1_9=0x8 +serdes_driver_current_lane2_9=0x8 +serdes_driver_current_lane3_9=0x8 +serdes_driver_current_lane0_122=0x8 +serdes_driver_current_lane1_122=0x8 +serdes_driver_current_lane2_122=0x8 +serdes_driver_current_lane3_122=0x8 + +#Preemphasis +serdes_preemphasis_42=0x264006 +serdes_preemphasis_43=0x264006 +serdes_preemphasis_44=0x254106 +serdes_preemphasis_45=0x254106 +serdes_preemphasis_50=0x254106 +serdes_preemphasis_51=0x254106 +serdes_preemphasis_52=0x254106 +serdes_preemphasis_53=0x254106 +serdes_preemphasis_54=0x254106 +serdes_preemphasis_55=0x254106 +serdes_preemphasis_56=0x254106 +serdes_preemphasis_57=0x234306 +serdes_preemphasis_68=0x234306 +serdes_preemphasis_69=0x204606 +serdes_preemphasis_70=0x204606 +serdes_preemphasis_71=0x204606 +serdes_preemphasis_34=0x234306 +serdes_preemphasis_35=0x234306 +serdes_preemphasis_36=0x234306 +serdes_preemphasis_37=0x234306 +serdes_preemphasis_38=0x234306 +serdes_preemphasis_39=0x234306 +serdes_preemphasis_40=0x234306 +serdes_preemphasis_41=0x234306 +serdes_preemphasis_72=0x1e4806 +serdes_preemphasis_73=0x1e4806 +serdes_preemphasis_74=0x1e4806 +serdes_preemphasis_75=0x1e4806 +serdes_preemphasis_84=0x1e4806 +serdes_preemphasis_85=0x1a4c06 +serdes_preemphasis_86=0x1a4c06 +serdes_preemphasis_87=0x1b4b06 +serdes_preemphasis_88=0x1b4b06 +serdes_preemphasis_89=0x1e4806 +serdes_preemphasis_90=0x1e4806 +serdes_preemphasis_91=0x1e4806 +serdes_preemphasis_102=0x1e4806 +serdes_preemphasis_103=0x1e4806 +serdes_preemphasis_104=0x1e4806 +serdes_preemphasis_105=0x1e4806 +serdes_preemphasis_106=0x1e4806 +serdes_preemphasis_107=0x1e4806 +serdes_preemphasis_108=0x1e4806 +serdes_preemphasis_109=0x1e4806 +serdes_preemphasis_110=0x1e4806 +serdes_preemphasis_111=0x1d4906 +serdes_preemphasis_112=0x234306 +serdes_preemphasis_113=0x1f4706 +serdes_preemphasis_lane0_5=0x294106 +serdes_preemphasis_lane1_5=0x294106 +serdes_preemphasis_lane2_5=0x294106 +serdes_preemphasis_lane3_5=0x294106 +serdes_preemphasis_lane0_1=0x294106 +serdes_preemphasis_lane1_1=0x294106 +serdes_preemphasis_lane2_1=0x294106 +serdes_preemphasis_lane3_1=0x294106 +serdes_preemphasis_lane0_114=0x2a4006 +serdes_preemphasis_lane1_114=0x2a4006 +serdes_preemphasis_lane2_114=0x2a4006 +serdes_preemphasis_lane3_114=0x2a4006 +serdes_preemphasis_lane0_21=0x2c3c08 +serdes_preemphasis_lane1_21=0x2a4006 +serdes_preemphasis_lane2_21=0x2a4006 +serdes_preemphasis_lane3_21=0x2a4006 +serdes_preemphasis_lane0_9=0x284206 +serdes_preemphasis_lane1_9=0x284206 +serdes_preemphasis_lane2_9=0x284206 +serdes_preemphasis_lane3_9=0x284206 +serdes_preemphasis_lane0_122=0x283e06 +serdes_preemphasis_lane1_122=0x283e06 +serdes_preemphasis_lane2_122=0x283e06 +serdes_preemphasis_lane3_122=0x294601 diff --git a/device/accton/x86_64-accton_as7315_27xb-r0/Accton-AS7315-27XB/sai.profile b/device/accton/x86_64-accton_as7315_27xb-r0/Accton-AS7315-27XB/sai.profile new file mode 100644 index 00000000000..191b27dac2f --- /dev/null +++ b/device/accton/x86_64-accton_as7315_27xb-r0/Accton-AS7315-27XB/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/qax-as7315-20x10G+4x25G+3x100G.config.bcm diff --git a/device/accton/x86_64-accton_as7315_27xb-r0/default_sku b/device/accton/x86_64-accton_as7315_27xb-r0/default_sku new file mode 100644 index 00000000000..5c1bb0b4a47 --- /dev/null +++ b/device/accton/x86_64-accton_as7315_27xb-r0/default_sku @@ -0,0 +1 @@ +Accton-AS7315-27XB t1 diff --git a/device/accton/x86_64-accton_as7315_27xb-r0/installer.conf b/device/accton/x86_64-accton_as7315_27xb-r0/installer.conf new file mode 100644 index 00000000000..9fa12f88854 --- /dev/null +++ b/device/accton/x86_64-accton_as7315_27xb-r0/installer.conf @@ -0,0 +1,2 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tg3.short_preamble=1 tg3.bcm5718s_reset=1" diff --git a/device/accton/x86_64-accton_as7315_27xb-r0/led_proc_init.soc b/device/accton/x86_64-accton_as7315_27xb-r0/led_proc_init.soc new file mode 100755 index 00000000000..790ab9cfc93 --- /dev/null +++ b/device/accton/x86_64-accton_as7315_27xb-r0/led_proc_init.soc @@ -0,0 +1,24 @@ +# accton_as7315_27xb LED macro init SOC +######################################### +## LED program for BCM88470 Qumran-AX +######################################### +led 0 stop +led 0 prog \ + 02 FC 42 03 02 F9 42 00 02 00 67 26 67 2D 86 F9 \ + 67 2D 86 F9 67 2D 86 F9 67 2D 86 F9 06 F9 D2 24 \ + 74 0A 86 FB 3A 7E 67 59 67 41 67 69 57 67 59 67 \ + 41 67 72 1A 00 75 7B 1A 01 75 3D 77 50 67 59 77 \ + 46 12 A0 F8 15 57 80 28 32 00 32 01 B7 97 75 7F \ + 16 FB 06 FC C8 70 7F 77 7B 06 F9 C2 FC 98 98 12 \ + E0 F8 05 16 F9 CA 03 F1 57 1A 07 27 87 1A 06 27 \ + 87 57 1A 05 27 87 1A 04 27 87 57 32 0E 87 57 32 \ + 0F 87 57 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 0 start +led auto on diff --git a/device/accton/x86_64-accton_as7315_27xb-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as7315_27xb-r0/plugins/eeprom.py new file mode 100644 index 00000000000..171593068ae --- /dev/null +++ b/device/accton/x86_64-accton_as7315_27xb-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/4-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as7315_27xb-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as7315_27xb-r0/plugins/psuutil.py new file mode 100644 index 00000000000..7ec16640e5a --- /dev/null +++ b/device/accton/x86_64-accton_as7315_27xb-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 1: "13-0053", + 2: "12-0050", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as7315_27xb-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7315_27xb-r0/plugins/sfputil.py new file mode 100644 index 00000000000..1d777d25aee --- /dev/null +++ b/device/accton/x86_64-accton_as7315_27xb-r0/plugins/sfputil.py @@ -0,0 +1,254 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import string + import pprint + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +#from xcvrd +SFP_STATUS_REMOVED = '0' +SFP_STATUS_INSERTED = '1' + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 27 + PORTS_IN_BLOCK = 27 + QSFP_PORT_START = 25 + QSFP_PORT_END = 27 + + BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{1}-0050/" + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _cpld_mapping = [ "8-0063", "7-0064"] + + _port_to_i2c_mapping = { + 1: 26, + 2: 27, + 3: 28, + 4: 29, + 5: 30, + 6: 31, + 7: 32, + 8: 33, + 9: 34, + 10: 35, + 11: 36, + 12: 37, + 13: 38, + 14: 39, + 15: 40, + 16: 41, + 17: 42, + 18: 43, + 19: 44, + 20: 45, + 21: 46, + 22: 47, + 23: 48, + 24: 49, + 25: 21, #QSFP + 26: 22, + 27: 23, + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x]) + + self.get_transceiver_change_event() + SfpUtilBase.__init__(self) + + def get_cpld_num(self, port_num): + cpld_i = 0 + if (port_num >= self.qsfp_port_start): + cpld_i = 1 + + return cpld_i + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + cpld_i = self.get_cpld_num(port_num) + cpld_ps = self._cpld_mapping[cpld_i] + path = "/sys/bus/i2c/devices/{0}/present_{1}" + index = ((port_num-1)%24) +1 + port_ps = path.format(cpld_ps, index) + + try: + val_file = open(port_ps) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False + + eeprom = open(self.port_to_eeprom_mapping[port_num], "rb") + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if ((lpmode & 0x3) == 0x3): + return True # Low Power Mode if "Power override" bit is 1 and "Power set" bit is 1 + else: + return False # High Power Mode if one of the following conditions is matched: + # 1. "Power override" bit is 0 + # 2. "Power override" bit is 1 and "Power set" bit is 0 + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b") + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def reset(self, port_num): + raise NotImplementedError + + @property + def _get_present_bitmap(self): + nodes = [] + port_num = [24,3] + + path = "/sys/bus/i2c/devices/{0}/" + cpld_path = path.format(self._cpld_mapping[0]) + nodes.append((cpld_path + "module_present_all", port_num[0])) + cpld_path = path.format(self._cpld_mapping[1]) + nodes.append((cpld_path + "module_present_all", port_num[1])) + + bitmap = [] + for node in nodes: + try: + reg_file = open(node[0]) + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + cpld_bm = reg_file.readline().rstrip().zfill(node[1]/4) + bitmap.append(cpld_bm) + reg_file.close() + + rev = "".join(bitmap[::-1]) + return int(rev,16) + + data = {'valid':0, 'last':0, 'present':0} + def get_transceiver_change_event(self, timeout=2000): + now = time.time() + port_dict = {} + port = 0 + + if timeout < 1000: + timeout = 1000 + timeout = (timeout) / float(1000) # Convert to secs + + if now < (self.data['last'] + timeout) and self.data['valid']: + return True, {} + + reg_value = self._get_present_bitmap + changed_ports = self.data['present'] ^ reg_value + if changed_ports: + for port in range (self.port_start, self.port_end+1): + # Mask off the bit corresponding to our port + mask = (1 << (port - 1)) + if changed_ports & mask: + if (reg_value & mask) == 0: + port_dict[port] = SFP_STATUS_REMOVED + else: + port_dict[port] = SFP_STATUS_INSERTED + + # Update cache + self.data['present'] = reg_value + self.data['last'] = now + self.data['valid'] = 1 + pprint.pprint(port_dict) + return True, port_dict + else: + return True, {} + return False, {} + + diff --git a/device/accton/x86_64-accton_as7315_27xb-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7315_27xb-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7315_27xb-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7326_56x-r0/Accton-AS7326-56X/port_config.ini b/device/accton/x86_64-accton_as7326_56x-r0/Accton-AS7326-56X/port_config.ini new file mode 100755 index 00000000000..10c55c5aeec --- /dev/null +++ b/device/accton/x86_64-accton_as7326_56x-r0/Accton-AS7326-56X/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed +Ethernet0 3 twentyfiveGigE1 1 25000 +Ethernet1 2 twentyfiveGigE2 2 25000 +Ethernet2 4 twentyfiveGigE3 3 25000 +Ethernet3 8 twentyfiveGigE4 4 25000 +Ethernet4 7 twentyfiveGigE5 5 25000 +Ethernet5 1 twentyfiveGigE6 6 25000 +Ethernet6 5 twentyfiveGigE7 7 25000 +Ethernet7 16 twentyfiveGigE8 8 25000 +Ethernet8 6 twentyfiveGigE9 9 25000 +Ethernet9 14 twentyfiveGigE10 10 25000 +Ethernet10 13 twentyfiveGigE11 11 25000 +Ethernet11 15 twentyfiveGigE12 12 25000 +Ethernet12 23 twentyfiveGigE13 13 25000 +Ethernet13 22 twentyfiveGigE14 14 25000 +Ethernet14 24 twentyfiveGigE15 15 25000 +Ethernet15 32 twentyfiveGigE16 16 25000 +Ethernet16 31 twentyfiveGigE17 17 25000 +Ethernet17 21 twentyfiveGigE18 18 25000 +Ethernet18 29 twentyfiveGigE19 19 25000 +Ethernet19 36 twentyfiveGigE20 20 25000 +Ethernet20 30 twentyfiveGigE21 21 25000 +Ethernet21 34 twentyfiveGigE22 22 25000 +Ethernet22 33 twentyfiveGigE23 23 25000 +Ethernet23 35 twentyfiveGigE24 24 25000 +Ethernet24 43 twentyfiveGigE25 25 25000 +Ethernet25 42 twentyfiveGigE26 26 25000 +Ethernet26 44 twentyfiveGigE27 27 25000 +Ethernet27 52 twentyfiveGigE28 28 25000 +Ethernet28 51 twentyfiveGigE29 29 25000 +Ethernet29 41 twentyfiveGigE30 30 25000 +Ethernet30 49 twentyfiveGigE31 31 25000 +Ethernet31 60 twentyfiveGigE32 32 25000 +Ethernet32 50 twentyfiveGigE33 33 25000 +Ethernet33 58 twentyfiveGigE34 34 25000 +Ethernet34 57 twentyfiveGigE35 35 25000 +Ethernet35 59 twentyfiveGigE36 36 25000 +Ethernet36 62 twentyfiveGigE37 37 25000 +Ethernet37 63 twentyfiveGigE38 38 25000 +Ethernet38 64 twentyfiveGigE39 39 25000 +Ethernet39 65 twentyfiveGigE40 40 25000 +Ethernet40 66 twentyfiveGigE41 41 25000 +Ethernet41 61 twentyfiveGigE42 42 25000 +Ethernet42 68 twentyfiveGigE43 43 25000 +Ethernet43 69 twentyfiveGigE44 44 25000 +Ethernet44 67 twentyfiveGigE45 45 25000 +Ethernet45 71 twentyfiveGigE46 46 25000 +Ethernet46 72 twentyfiveGigE47 47 25000 +Ethernet47 70 twentyfiveGigE48 48 25000 +Ethernet48 77,78,79,80 hundredGigE49 49 100000 +Ethernet52 85,86,87,88 hundredGigE50 50 100000 +Ethernet56 93,94,95,96 hundredGigE51 51 100000 +Ethernet60 97,98,99,100 hundredGigE52 52 100000 +Ethernet64 105,106,107,108 hundredGigE53 53 100000 +Ethernet68 113,114,115,116 hundredGigE54 54 100000 +Ethernet72 121,122,123,124 hundredGigE55 55 100000 +Ethernet76 125,126,127,128 hundredGigE56 56 100000 diff --git a/device/accton/x86_64-accton_as7326_56x-r0/Accton-AS7326-56X/sai.profile b/device/accton/x86_64-accton_as7326_56x-r0/Accton-AS7326-56X/sai.profile new file mode 100644 index 00000000000..0e465ce12ed --- /dev/null +++ b/device/accton/x86_64-accton_as7326_56x-r0/Accton-AS7326-56X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/etc/bcm/td3-as7326-48x25G+8x100G.config.bcm diff --git a/device/accton/x86_64-accton_as7326_56x-r0/Accton-AS7326-56X/td3-as7326-48x25G+8x100G.config.bcm b/device/accton/x86_64-accton_as7326_56x-r0/Accton-AS7326-56X/td3-as7326-48x25G+8x100G.config.bcm new file mode 100755 index 00000000000..2b7b6fb0800 --- /dev/null +++ b/device/accton/x86_64-accton_as7326_56x-r0/Accton-AS7326-56X/td3-as7326-48x25G+8x100G.config.bcm @@ -0,0 +1,462 @@ +#polarity/lanemap is using TH2 style. +core_clock_frequency=1525 +dpp_clock_ratio=2:3 + +oversubscribe_mode=1 +pbmp_xport_xe=0x7F878787F878787FDFE1E1E1FE1E1E1FE + +parity_enable=0 +mem_cache_enable=0 + +l2_mem_entries=32768 +l3_mem_entries=16384 +fpem_mem_entries=16384 +l2xmsg_mode=1 + +# Platform specfic +bcm_num_cos=8 +bcm_stat_interval=2000000 +cdma_timeout_usec=3000000 +ipv6_lpm_128b_enable=0x1 +l3_max_ecmp_mode=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +schan_intr_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 +skip_L2_USER_ENTRY=0 +bcm_tunnel_term_compatible_mode=1 + +dport_map_port_1=6 +dport_map_port_2=2 +dport_map_port_3=1 +dport_map_port_4=3 +portmap_1=1:25 +portmap_2=2:25 +portmap_3=3:25 +portmap_4=4:25 +phy_chain_rx_lane_map_physical{1.0}=0x1230 +phy_chain_rx_lane_map_physical{2.0}=0x1230 +phy_chain_rx_lane_map_physical{3.0}=0x1230 +phy_chain_rx_lane_map_physical{4.0}=0x1230 +phy_chain_tx_lane_map_physical{1.0}=0x3210 +phy_chain_tx_lane_map_physical{2.0}=0x3210 +phy_chain_tx_lane_map_physical{3.0}=0x3210 +phy_chain_tx_lane_map_physical{4.0}=0x3210 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x0 +phy_chain_tx_polarity_flip_physical{1.0}=0x1 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 + +dport_map_port_5=7 +dport_map_port_6=9 +dport_map_port_7=5 +dport_map_port_8=4 +portmap_5=5:25 +portmap_6=6:25 +portmap_7=7:25 +portmap_8=8:25 +phy_chain_rx_lane_map_physical{5.0}=0x3210 +phy_chain_rx_lane_map_physical{6.0}=0x3210 +phy_chain_rx_lane_map_physical{7.0}=0x3210 +phy_chain_rx_lane_map_physical{8.0}=0x3210 +phy_chain_tx_lane_map_physical{5.0}=0x3210 +phy_chain_tx_lane_map_physical{6.0}=0x3210 +phy_chain_tx_lane_map_physical{7.0}=0x3210 +phy_chain_tx_lane_map_physical{8.0}=0x3210 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 + +dport_map_port_13=11 +dport_map_port_14=10 +dport_map_port_15=12 +dport_map_port_16=8 +portmap_13=13:25 +portmap_14=14:25 +portmap_15=15:25 +portmap_16=16:25 +phy_chain_rx_lane_map_physical{13.0}=0x3012 +phy_chain_rx_lane_map_physical{14.0}=0x3012 +phy_chain_rx_lane_map_physical{15.0}=0x3012 +phy_chain_rx_lane_map_physical{16.0}=0x3012 +phy_chain_tx_lane_map_physical{13.0}=0x3210 +phy_chain_tx_lane_map_physical{14.0}=0x3210 +phy_chain_tx_lane_map_physical{15.0}=0x3210 +phy_chain_tx_lane_map_physical{16.0}=0x3210 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 + +dport_map_port_21=18 +dport_map_port_22=14 +dport_map_port_23=13 +dport_map_port_24=15 +portmap_21=21:25 +portmap_22=22:25 +portmap_23=23:25 +portmap_24=24:25 +phy_chain_rx_lane_map_physical{21.0}=0x1230 +phy_chain_rx_lane_map_physical{22.0}=0x1230 +phy_chain_rx_lane_map_physical{23.0}=0x1230 +phy_chain_rx_lane_map_physical{24.0}=0x1230 +phy_chain_tx_lane_map_physical{21.0}=0x3210 +phy_chain_tx_lane_map_physical{22.0}=0x3210 +phy_chain_tx_lane_map_physical{23.0}=0x3210 +phy_chain_tx_lane_map_physical{24.0}=0x3210 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 + +dport_map_port_29=19 +dport_map_port_30=21 +dport_map_port_31=17 +dport_map_port_32=16 +portmap_29=29:25 +portmap_30=30:25 +portmap_31=31:25 +portmap_32=32:25 +phy_chain_rx_lane_map_physical{29.0}=0x3210 +phy_chain_rx_lane_map_physical{30.0}=0x3210 +phy_chain_rx_lane_map_physical{31.0}=0x3210 +phy_chain_rx_lane_map_physical{32.0}=0x3210 +phy_chain_tx_lane_map_physical{29.0}=0x3210 +phy_chain_tx_lane_map_physical{30.0}=0x3210 +phy_chain_tx_lane_map_physical{31.0}=0x3210 +phy_chain_tx_lane_map_physical{32.0}=0x3210 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 + +dport_map_port_33=23 +dport_map_port_34=22 +dport_map_port_35=24 +dport_map_port_36=20 +portmap_33=33:25 +portmap_34=34:25 +portmap_35=35:25 +portmap_36=36:25 +phy_chain_rx_lane_map_physical{33.0}=0x3012 +phy_chain_rx_lane_map_physical{34.0}=0x3012 +phy_chain_rx_lane_map_physical{35.0}=0x3012 +phy_chain_rx_lane_map_physical{36.0}=0x3012 +phy_chain_tx_lane_map_physical{33.0}=0x3210 +phy_chain_tx_lane_map_physical{34.0}=0x3210 +phy_chain_tx_lane_map_physical{35.0}=0x3210 +phy_chain_tx_lane_map_physical{36.0}=0x3210 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 +phy_chain_tx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 + +dport_map_port_41=30 +dport_map_port_42=26 +dport_map_port_43=25 +dport_map_port_44=27 +portmap_41=41:25 +portmap_42=42:25 +portmap_43=43:25 +portmap_44=44:25 +phy_chain_rx_lane_map_physical{41.0}=0x1230 +phy_chain_rx_lane_map_physical{42.0}=0x1230 +phy_chain_rx_lane_map_physical{43.0}=0x1230 +phy_chain_rx_lane_map_physical{44.0}=0x1230 +phy_chain_tx_lane_map_physical{41.0}=0x3210 +phy_chain_tx_lane_map_physical{42.0}=0x3210 +phy_chain_tx_lane_map_physical{43.0}=0x3210 +phy_chain_tx_lane_map_physical{44.0}=0x3210 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 + +dport_map_port_49=31 +dport_map_port_50=33 +dport_map_port_51=29 +dport_map_port_52=28 +portmap_49=49:25 +portmap_50=50:25 +portmap_51=51:25 +portmap_52=52:25 +phy_chain_rx_lane_map_physical{49.0}=0x3210 +phy_chain_rx_lane_map_physical{50.0}=0x3210 +phy_chain_rx_lane_map_physical{51.0}=0x3210 +phy_chain_rx_lane_map_physical{52.0}=0x3210 +phy_chain_tx_lane_map_physical{49.0}=0x3210 +phy_chain_tx_lane_map_physical{50.0}=0x3210 +phy_chain_tx_lane_map_physical{51.0}=0x3210 +phy_chain_tx_lane_map_physical{52.0}=0x3210 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x0 + +dport_map_port_57=35 +dport_map_port_58=34 +dport_map_port_59=36 +dport_map_port_60=32 +portmap_57=57:25 +portmap_58=58:25 +portmap_59=59:25 +portmap_60=60:25 +phy_chain_rx_lane_map_physical{57.0}=0x3012 +phy_chain_rx_lane_map_physical{58.0}=0x3012 +phy_chain_rx_lane_map_physical{59.0}=0x3012 +phy_chain_rx_lane_map_physical{60.0}=0x3012 +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_tx_lane_map_physical{58.0}=0x3210 +phy_chain_tx_lane_map_physical{59.0}=0x3210 +phy_chain_tx_lane_map_physical{60.0}=0x3210 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x0 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 + +dport_map_port_61=42 +dport_map_port_62=37 +dport_map_port_63=38 +dport_map_port_64=39 +portmap_61=61:25 +portmap_62=62:25 +portmap_63=63:25 +portmap_64=64:25 +phy_chain_rx_lane_map_physical{61.0}=0x2310 +phy_chain_rx_lane_map_physical{62.0}=0x2310 +phy_chain_rx_lane_map_physical{63.0}=0x2310 +phy_chain_rx_lane_map_physical{64.0}=0x2310 +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_tx_lane_map_physical{62.0}=0x3210 +phy_chain_tx_lane_map_physical{63.0}=0x3210 +phy_chain_tx_lane_map_physical{64.0}=0x3210 +phy_chain_rx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 + +dport_map_port_67=40 +dport_map_port_68=41 +dport_map_port_69=45 +dport_map_port_70=43 +portmap_67=65:25 +portmap_68=66:25 +portmap_69=67:25 +portmap_70=68:25 +phy_chain_rx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{66.0}=0x3210 +phy_chain_rx_lane_map_physical{67.0}=0x3210 +phy_chain_rx_lane_map_physical{68.0}=0x3210 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_tx_lane_map_physical{66.0}=0x3210 +phy_chain_tx_lane_map_physical{67.0}=0x3210 +phy_chain_tx_lane_map_physical{68.0}=0x3210 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 +phy_chain_tx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x1 + +dport_map_port_71=44 +dport_map_port_72=48 +dport_map_port_73=46 +dport_map_port_74=47 +portmap_71=69:25 +portmap_72=70:25 +portmap_73=71:25 +portmap_74=72:25 +phy_chain_rx_lane_map_physical{69.0}=0x1230 +phy_chain_rx_lane_map_physical{70.0}=0x1230 +phy_chain_rx_lane_map_physical{71.0}=0x1230 +phy_chain_rx_lane_map_physical{72.0}=0x1230 +phy_chain_tx_lane_map_physical{69.0}=0x3210 +phy_chain_tx_lane_map_physical{70.0}=0x3210 +phy_chain_tx_lane_map_physical{71.0}=0x3210 +phy_chain_tx_lane_map_physical{72.0}=0x3210 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 + +dport_map_port_79=49 +dport_map_port_80=50 +dport_map_port_81=51 +dport_map_port_82=52 +portmap_79=77:100 +phy_chain_rx_lane_map_physical{77.0}=0x2130 +phy_chain_tx_lane_map_physical{77.0}=0x3120 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 + +dport_map_port_87=53 +dport_map_port_88=54 +dport_map_port_89=55 +dport_map_port_90=56 +portmap_87=85:100 +phy_chain_rx_lane_map_physical{85.0}=0x1203 +phy_chain_tx_lane_map_physical{85.0}=0x2031 +phy_chain_rx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{88.0}=0x1 +phy_chain_tx_polarity_flip_physical{85.0}=0x0 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 + +dport_map_port_95=57 +dport_map_port_96=58 +dport_map_port_97=59 +dport_map_port_98=60 +portmap_95=93:100 +phy_chain_rx_lane_map_physical{93.0}=0x2130 +phy_chain_tx_lane_map_physical{93.0}=0x3210 +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 + +dport_map_port_99=61 +dport_map_port_100=62 +dport_map_port_101=63 +dport_map_port_102=64 +portmap_99=97:100 +phy_chain_rx_lane_map_physical{97.0}=0x1203 +phy_chain_tx_lane_map_physical{97.0}=0x2031 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{98.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{97.0}=0x0 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 + +dport_map_port_107=65 +dport_map_port_108=66 +dport_map_port_109=67 +dport_map_port_110=68 +portmap_107=105:100 +phy_chain_rx_lane_map_physical{105.0}=0x2130 +phy_chain_tx_lane_map_physical{105.0}=0x3120 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 + +dport_map_port_115=69 +dport_map_port_116=70 +dport_map_port_117=71 +dport_map_port_118=72 +portmap_115=113:100 +phy_chain_rx_lane_map_physical{113.0}=0x1203 +phy_chain_tx_lane_map_physical{113.0}=0x2031 +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x1 +phy_chain_tx_polarity_flip_physical{113.0}=0x0 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_tx_polarity_flip_physical{116.0}=0x1 + +dport_map_port_123=73 +dport_map_port_124=74 +dport_map_port_125=75 +dport_map_port_126=76 +portmap_123=121:100 +phy_chain_rx_lane_map_physical{121.0}=0x2130 +phy_chain_tx_lane_map_physical{121.0}=0x3210 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 + +# Not able to breakout, Since overlap with possible mgmt ports +dport_map_port_127=77 +portmap_127=125:100 +phy_chain_rx_lane_map_physical{125.0}=0x1203 +phy_chain_tx_lane_map_physical{125.0}=0x2031 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x1 +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 + +#dport_map_port_130=82 +#dport_map_port_66=81 +#portmap_130=128:10:m +#portmap_66=129:10:m diff --git a/device/accton/x86_64-accton_as7326_56x-r0/default_sku b/device/accton/x86_64-accton_as7326_56x-r0/default_sku new file mode 100644 index 00000000000..922268da79b --- /dev/null +++ b/device/accton/x86_64-accton_as7326_56x-r0/default_sku @@ -0,0 +1 @@ +Accton-AS7326-56X t1 diff --git a/device/accton/x86_64-accton_as7326_56x-r0/installer.conf b/device/accton/x86_64-accton_as7326_56x-r0/installer.conf new file mode 100755 index 00000000000..1a5c9c96921 --- /dev/null +++ b/device/accton/x86_64-accton_as7326_56x-r0/installer.conf @@ -0,0 +1,2 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off tg3.short_preamble=1 tg3.bcm5718s_reset=1" diff --git a/device/accton/x86_64-accton_as7326_56x-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as7326_56x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..1e7d1046d93 --- /dev/null +++ b/device/accton/x86_64-accton_as7326_56x-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as7326_56x-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as7326_56x-r0/plugins/psuutil.py new file mode 100644 index 00000000000..a3c30bc478e --- /dev/null +++ b/device/accton/x86_64-accton_as7326_56x-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 2: "13-0053", + 1: "17-0051", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as7326_56x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7326_56x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..0292e2d52e1 --- /dev/null +++ b/device/accton/x86_64-accton_as7326_56x-r0/plugins/sfputil.py @@ -0,0 +1,308 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +#from xcvrd +SFP_STATUS_REMOVED = '0' +SFP_STATUS_INSERTED = '1' + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 56 + PORTS_IN_BLOCK = 56 + QSFP_PORT_START = 49 + QSFP_PORT_END = 56 + + BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{1}-0050/" + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _cpld_mapping = { + 1: "12-0062", + 2: "18-0060", + 3: "19-0064", + } + + _port_to_i2c_mapping = { + 1: 42, + 2: 41, + 3: 44, + 4: 43, + 5: 47, + 6: 45, + 7: 46, + 8: 50, + 9: 48, + 10: 49, + 11: 51, + 12: 52, + 13: 53, + 14: 56, + 15: 55, + 16: 54, + 17: 58, + 18: 57, + 19: 59, + 20: 60, + 21: 61, + 22: 63, + 23: 62, + 24: 64, + 25: 66, + 26: 68, + 27: 65, + 28: 67, + 29: 69, + 30: 71, + 31: 72, + 32: 70, + 33: 74, + 34: 73, + 35: 76, + 36: 75, + 37: 77, + 38: 79, + 39: 78, + 40: 80, + 41: 81, + 42: 82, + 43: 84, + 44: 85, + 45: 83, + 46: 87, + 47: 88, + 48: 86, + 49: 25,#QSFP49 + 50: 26, + 51: 27, + 52: 28, + 53: 29, + 54: 30, + 55: 31, + 56: 32,#QSFP56 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x]) + + SfpUtilBase.__init__(self) + + # For port 0~23 and 48~51 are at cpld2, others are at cpld3. + def get_cpld_num(self, port_num): + cpld_i = 1 + if (port_num > 30): + cpld_i = 2 + return cpld_i + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + cpld_i = self.get_cpld_num(port_num) + + cpld_ps = self._cpld_mapping[cpld_i] + path = "/sys/bus/i2c/devices/{0}/module_present_{1}" + port_ps = path.format(cpld_ps, port_num) + + try: + val_file = open(port_ps) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False + + eeprom = open(self.port_to_eeprom_mapping[port_num], "rb") + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if ((lpmode & 0x3) == 0x1): + return False # High Power Mode if "Power override" bit is 1 and "Power set" bit is 0 + else: + return True # Low Power Mode if one of the following conditions is matched: + # 1. Power override" bit is 0 + # 2. Power override" bit is 1 and "Power set" bit is 1 + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b") + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def reset(self, port_num): + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + cpld_i = self.get_cpld_num(port_num) + cpld_ps = self._cpld_mapping[cpld_i] + path = "/sys/bus/i2c/devices/{0}/module_reset_{1}" + port_ps = path.format(cpld_ps, port_num) + + self.__port_to_mod_rst = port_ps + try: + reg_file = open(self.__port_to_mod_rst, 'r+', buffering=0) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #toggle reset + reg_file.seek(0) + reg_file.write('1') + time.sleep(1) + reg_file.seek(0) + reg_file.write('0') + reg_file.close() + + return True + @property + def _get_present_bitmap(self): + nodes = [] + rev = [] + port_num = [30,26] + + path = "/sys/bus/i2c/devices/{0}/module_present_all" + cpld_i = self.get_cpld_num(self.port_start) + cpld_ps = self._cpld_mapping[cpld_i] + nodes.append((path.format(cpld_ps), port_num[0])) + cpld_i = self.get_cpld_num(self.port_end) + cpld_ps = self._cpld_mapping[cpld_i] + nodes.append((path.format(cpld_ps), port_num[1])) + + bitmaps = "" + for node in nodes: + try: + reg_file = open(node[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + bitmap = reg_file.readline().rstrip() + bitmap = bin(int(bitmap, 16))[2:].zfill(node[1]) + rev.append(bitmap) + reg_file.close() + + bitmaps = "".join(rev[::-1]) + bitmaps = hex(int(bitmaps, 2)) + return int(bitmaps, 0) + + data = {'valid':0, 'last':0, 'present':0} + def get_transceiver_change_event(self, timeout=2000): + now = time.time() + port_dict = {} + port = 0 + + if timeout < 1000: + timeout = 1000 + timeout = (timeout) / float(1000) # Convert to secs + + if now < (self.data['last'] + timeout) and self.data['valid']: + return True, {} + + reg_value = self._get_present_bitmap + changed_ports = self.data['present'] ^ reg_value + if changed_ports: + for port in range (self.port_start, self.port_end+1): + # Mask off the bit corresponding to our port + mask = (1 << (port - 1)) + if changed_ports & mask: + if (reg_value & mask) == 0: + port_dict[port] = SFP_STATUS_REMOVED + else: + port_dict[port] = SFP_STATUS_INSERTED + + # Update cache + self.data['present'] = reg_value + self.data['last'] = now + self.data['valid'] = 1 + return True, port_dict + else: + return True, {} + return False, {} diff --git a/device/accton/x86_64-accton_as7326_56x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7326_56x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7326_56x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7512_32x-r0/AS7512-C32/port_config.ini b/device/accton/x86_64-accton_as7512_32x-r0/AS7512-C32/port_config.ini new file mode 100644 index 00000000000..c10cd278694 --- /dev/null +++ b/device/accton/x86_64-accton_as7512_32x-r0/AS7512-C32/port_config.ini @@ -0,0 +1,33 @@ +# name lanes +Ethernet0 16,17,18,19 +Ethernet4 20,21,22,23 +Ethernet8 24,25,26,27 +Ethernet12 28,29,30,31 +Ethernet16 32,33,34,35 +Ethernet20 36,37,38,39 +Ethernet24 40,41,42,43 +Ethernet28 44,45,46,47 +Ethernet32 0,1,2,3 +Ethernet36 4,5,6,7 +Ethernet40 8,9,10,11 +Ethernet44 12,13,14,15 +Ethernet48 48,49,50,51 +Ethernet52 52,53,54,55 +Ethernet56 56,57,58,59 +Ethernet60 60,61,62,63 +Ethernet64 127,126,125,124 +Ethernet68 123,122,121,120 +Ethernet72 115,114,113,112 +Ethernet76 119,118,117,116 +Ethernet80 79,78,77,76 +Ethernet84 75,74,73,72 +Ethernet88 64,65,66,67 +Ethernet92 71,70,68,69 +Ethernet96 111,110,109,108 +Ethernet100 107,106,105,104 +Ethernet104 103,102,101,100 +Ethernet108 99,98,97,96 +Ethernet112 95,94,93,92 +Ethernet116 91,90,89,88 +Ethernet120 87,86,85,84 +Ethernet124 83,82,81,80 diff --git a/device/accton/x86_64-accton_as7512_32x-r0/AS7512-C32/sai.profile b/device/accton/x86_64-accton_as7512_32x-r0/AS7512-C32/sai.profile new file mode 100644 index 00000000000..457c339c58a --- /dev/null +++ b/device/accton/x86_64-accton_as7512_32x-r0/AS7512-C32/sai.profile @@ -0,0 +1,2 @@ +mode=3 +hwId=as7512 diff --git a/device/accton/x86_64-accton_as7512_32x-r0/AS7512-S128/port_config.ini b/device/accton/x86_64-accton_as7512_32x-r0/AS7512-S128/port_config.ini new file mode 100644 index 00000000000..c3b66995040 --- /dev/null +++ b/device/accton/x86_64-accton_as7512_32x-r0/AS7512-S128/port_config.ini @@ -0,0 +1,129 @@ +# name lanes +Ethernet1 0 +Ethernet2 1 +Ethernet3 2 +Ethernet4 3 +Ethernet5 4 +Ethernet6 5 +Ethernet7 6 +Ethernet8 7 +Ethernet9 8 +Ethernet10 9 +Ethernet11 10 +Ethernet12 11 +Ethernet13 12 +Ethernet14 13 +Ethernet15 14 +Ethernet16 15 +Ethernet17 16 +Ethernet18 17 +Ethernet19 18 +Ethernet20 19 +Ethernet21 20 +Ethernet22 21 +Ethernet23 22 +Ethernet24 23 +Ethernet25 24 +Ethernet26 25 +Ethernet27 26 +Ethernet28 27 +Ethernet29 28 +Ethernet30 29 +Ethernet31 30 +Ethernet32 31 +Ethernet33 32 +Ethernet34 33 +Ethernet35 34 +Ethernet36 35 +Ethernet37 36 +Ethernet38 37 +Ethernet39 38 +Ethernet40 39 +Ethernet41 40 +Ethernet42 41 +Ethernet43 42 +Ethernet44 43 +Ethernet45 44 +Ethernet46 45 +Ethernet47 46 +Ethernet48 47 +Ethernet49 48 +Ethernet50 49 +Ethernet51 50 +Ethernet52 51 +Ethernet53 52 +Ethernet54 53 +Ethernet55 54 +Ethernet56 55 +Ethernet57 56 +Ethernet58 57 +Ethernet59 58 +Ethernet60 59 +Ethernet61 60 +Ethernet62 61 +Ethernet63 62 +Ethernet64 63 +Ethernet65 64 +Ethernet66 65 +Ethernet67 66 +Ethernet68 67 +Ethernet69 68 +Ethernet70 69 +Ethernet71 70 +Ethernet72 71 +Ethernet73 72 +Ethernet74 73 +Ethernet75 74 +Ethernet76 75 +Ethernet77 76 +Ethernet78 77 +Ethernet79 78 +Ethernet80 79 +Ethernet81 80 +Ethernet82 81 +Ethernet83 82 +Ethernet84 83 +Ethernet85 84 +Ethernet86 85 +Ethernet87 86 +Ethernet88 87 +Ethernet89 88 +Ethernet90 89 +Ethernet91 90 +Ethernet92 91 +Ethernet93 92 +Ethernet94 93 +Ethernet95 94 +Ethernet96 95 +Ethernet97 96 +Ethernet98 97 +Ethernet99 98 +Ethernet100 99 +Ethernet101 100 +Ethernet102 101 +Ethernet103 102 +Ethernet104 103 +Ethernet105 104 +Ethernet106 105 +Ethernet107 106 +Ethernet108 107 +Ethernet109 108 +Ethernet110 109 +Ethernet111 110 +Ethernet112 111 +Ethernet113 112 +Ethernet114 113 +Ethernet115 114 +Ethernet116 115 +Ethernet117 116 +Ethernet118 117 +Ethernet119 118 +Ethernet120 119 +Ethernet121 120 +Ethernet122 121 +Ethernet123 122 +Ethernet124 123 +Ethernet125 124 +Ethernet126 125 +Ethernet127 126 +Ethernet128 127 diff --git a/device/accton/x86_64-accton_as7512_32x-r0/AS7512-S128/sai.profile b/device/accton/x86_64-accton_as7512_32x-r0/AS7512-S128/sai.profile new file mode 100644 index 00000000000..471c4395758 --- /dev/null +++ b/device/accton/x86_64-accton_as7512_32x-r0/AS7512-S128/sai.profile @@ -0,0 +1,2 @@ +mode=0 +hwId=as7512 diff --git a/device/accton/x86_64-accton_as7512_32x-r0/AS7512/port_config.ini b/device/accton/x86_64-accton_as7512_32x-r0/AS7512/port_config.ini new file mode 100644 index 00000000000..c10cd278694 --- /dev/null +++ b/device/accton/x86_64-accton_as7512_32x-r0/AS7512/port_config.ini @@ -0,0 +1,33 @@ +# name lanes +Ethernet0 16,17,18,19 +Ethernet4 20,21,22,23 +Ethernet8 24,25,26,27 +Ethernet12 28,29,30,31 +Ethernet16 32,33,34,35 +Ethernet20 36,37,38,39 +Ethernet24 40,41,42,43 +Ethernet28 44,45,46,47 +Ethernet32 0,1,2,3 +Ethernet36 4,5,6,7 +Ethernet40 8,9,10,11 +Ethernet44 12,13,14,15 +Ethernet48 48,49,50,51 +Ethernet52 52,53,54,55 +Ethernet56 56,57,58,59 +Ethernet60 60,61,62,63 +Ethernet64 127,126,125,124 +Ethernet68 123,122,121,120 +Ethernet72 115,114,113,112 +Ethernet76 119,118,117,116 +Ethernet80 79,78,77,76 +Ethernet84 75,74,73,72 +Ethernet88 64,65,66,67 +Ethernet92 71,70,68,69 +Ethernet96 111,110,109,108 +Ethernet100 107,106,105,104 +Ethernet104 103,102,101,100 +Ethernet108 99,98,97,96 +Ethernet112 95,94,93,92 +Ethernet116 91,90,89,88 +Ethernet120 87,86,85,84 +Ethernet124 83,82,81,80 diff --git a/device/accton/x86_64-accton_as7512_32x-r0/AS7512/sai.profile b/device/accton/x86_64-accton_as7512_32x-r0/AS7512/sai.profile new file mode 100644 index 00000000000..017996f7d7c --- /dev/null +++ b/device/accton/x86_64-accton_as7512_32x-r0/AS7512/sai.profile @@ -0,0 +1,2 @@ +mode=1 +hwId=as7512 diff --git a/device/accton/x86_64-accton_as7512_32x-r0/default_sku b/device/accton/x86_64-accton_as7512_32x-r0/default_sku new file mode 100644 index 00000000000..45eb53f68a9 --- /dev/null +++ b/device/accton/x86_64-accton_as7512_32x-r0/default_sku @@ -0,0 +1 @@ +AS7512 t1 diff --git a/device/accton/x86_64-accton_as7512_32x-r0/fancontrol b/device/accton/x86_64-accton_as7512_32x-r0/fancontrol new file mode 100644 index 00000000000..c80163771e8 --- /dev/null +++ b/device/accton/x86_64-accton_as7512_32x-r0/fancontrol @@ -0,0 +1,7 @@ +INTERVAL=10 +FCTEMPS=/sys/bus/i2c/devices/2-0066/fan_pwm=/sys/bus/i2c/devices/3-004b/hwmon/hwmon[[:print:]]*/temp1_input /sys/bus/i2c/devices/2-0066/fan_pwm=/sys/bus/i2c/devices/3-004a/hwmon/hwmon[[:print:]]*/temp1_input +FCFANS=/sys/bus/i2c/devices/2-0066/fan_pwm=/sys/bus/i2c/devices/2-0066/fan1_front_speed_rpm /sys/bus/i2c/devices/2-0066/fan_pwm=/sys/bus/i2c/devices/2-0066/fan2_front_speed_rpm /sys/bus/i2c/devices/2-0066/fan_pwm=/sys/bus/i2c/devices/2-0066/fan3_front_speed_rpm /sys/bus/i2c/devices/2-0066/fan_pwm=/sys/bus/i2c/devices/2-0066/fan4_front_speed_rpm /sys/bus/i2c/devices/2-0066/fan_pwm=/sys/bus/i2c/devices/2-0066/fan5_front_speed_rpm /sys/bus/i2c/devices/2-0066/fan_pwm=/sys/bus/i2c/devices/2-0066/fan6_front_speed_rpm +MINTEMP=/sys/bus/i2c/devices/2-0066/fan_pwm=20 +MAXTEMP=/sys/bus/i2c/devices/2-0066/fan_pwm=60 +MINSTART=/sys/bus/i2c/devices/2-0066/fan_pwm=150 +MINSTOP=/sys/bus/i2c/devices/2-0066/fan_pwm=7 diff --git a/device/accton/x86_64-accton_as7512_32x-r0/installer.conf b/device/accton/x86_64-accton_as7512_32x-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/accton/x86_64-accton_as7512_32x-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/accton/x86_64-accton_as7512_32x-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as7512_32x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..6e2c0c8bb96 --- /dev/null +++ b/device/accton/x86_64-accton_as7512_32x-r0/plugins/eeprom.py @@ -0,0 +1,32 @@ +#!/usr/bin/env python + +############################################################################# +# Cavium +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + _TLV_INFO_MAX_LEN = 256 + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as7512_32x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7512_32x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..d18e9295f49 --- /dev/null +++ b/device/accton/x86_64-accton_as7512_32x-r0/plugins/sfputil.py @@ -0,0 +1,135 @@ +#! /usr/bin/python + +try: + import time + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class SfpUtil(SfpUtilBase): + """Platform specific sfputil class""" + + _port_start = 0 + _port_end = 31 + ports_in_block = 32 + + + _port_to_eeprom_mapping = {} + + _qsfp_ports = range(0, ports_in_block + 1) + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/sfp_eeprom' + for x in range(self.port_start, self.port_end + 1): + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + 18) + SfpUtilBase.__init__(self) + + def reset(self, port_num): + raise NotImplementedError + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + path = "/sys/bus/i2c/devices/{0}-0050/sfp_is_present" + port_ps = path.format(port_num+18) + + + try: + reg_file = open(port_ps) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if reg_value == '1': + return True + + return False + + @property + def port_start(self): + return self._port_start + + @property + def port_end(self): + return self._port_end + + @property + def qsfp_ports(self): + return range(0, self.ports_in_block + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False + + eeprom = open(self.port_to_eeprom_mapping[port_num], "rb") + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if ((lpmode & 0x3) == 0x3): + return True # Low Power Mode if "Power override" bit is 1 and "Power set" bit is 1 + else: + return False # High Power Mode if one of the following conditions is matched: + # 1. "Power override" bit is 0 + # 2. "Power override" bit is 1 and "Power set" bit is 0 + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b") + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) \ No newline at end of file diff --git a/device/accton/x86_64-accton_as7512_32x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7512_32x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7512_32x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7712_32x-r0/Accton-AS7712-32X/port_config.ini b/device/accton/x86_64-accton_as7712_32x-r0/Accton-AS7712-32X/port_config.ini new file mode 100644 index 00000000000..e101ec29d4a --- /dev/null +++ b/device/accton/x86_64-accton_as7712_32x-r0/Accton-AS7712-32X/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 49,50,51,52 hundredGigE1 1 100000 +Ethernet4 53,54,55,56 hundredGigE2 2 100000 +Ethernet8 57,58,59,60 hundredGigE3 3 100000 +Ethernet12 61,62,63,64 hundredGigE4 4 100000 +Ethernet16 65,66,67,68 hundredGigE5 5 100000 +Ethernet20 69,70,71,72 hundredGigE6 6 100000 +Ethernet24 73,74,75,76 hundredGigE7 7 100000 +Ethernet28 77,78,79,80 hundredGigE8 8 100000 +Ethernet32 33,34,35,36 hundredGigE9 9 100000 +Ethernet36 37,38,39,40 hundredGigE10 10 100000 +Ethernet40 41,42,43,44 hundredGigE11 11 100000 +Ethernet44 45,46,47,48 hundredGigE12 12 100000 +Ethernet48 81,82,83,84 hundredGigE13 13 100000 +Ethernet52 85,86,87,88 hundredGigE14 14 100000 +Ethernet56 89,90,91,92 hundredGigE15 15 100000 +Ethernet60 93,94,95,96 hundredGigE16 16 100000 +Ethernet64 97,98,99,100 hundredGigE17 17 100000 +Ethernet68 101,102,103,104 hundredGigE18 18 100000 +Ethernet72 105,106,107,108 hundredGigE19 19 100000 +Ethernet76 109,110,111,112 hundredGigE20 20 100000 +Ethernet80 17,18,19,20 hundredGigE21 21 100000 +Ethernet84 21,22,23,24 hundredGigE22 22 100000 +Ethernet88 25,26,27,28 hundredGigE23 23 100000 +Ethernet92 29,30,31,32 hundredGigE24 24 100000 +Ethernet96 113,114,115,116 hundredGigE25 25 100000 +Ethernet100 117,118,119,120 hundredGigE26 26 100000 +Ethernet104 121,122,123,124 hundredGigE27 27 100000 +Ethernet108 125,126,127,128 hundredGigE28 28 100000 +Ethernet112 1,2,3,4 hundredGigE29 29 100000 +Ethernet116 5,6,7,8 hundredGigE30 30 100000 +Ethernet120 9,10,11,12 hundredGigE31 31 100000 +Ethernet124 13,14,15,16 hundredGigE32 32 100000 diff --git a/device/accton/x86_64-accton_as7712_32x-r0/Accton-AS7712-32X/sai.profile b/device/accton/x86_64-accton_as7712_32x-r0/Accton-AS7712-32X/sai.profile new file mode 100644 index 00000000000..28953a08f20 --- /dev/null +++ b/device/accton/x86_64-accton_as7712_32x-r0/Accton-AS7712-32X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-as7712-32x100G.config.bcm diff --git a/device/accton/x86_64-accton_as7712_32x-r0/Accton-AS7712-32X/th-as7712-32x100G.config.bcm b/device/accton/x86_64-accton_as7712_32x-r0/Accton-AS7712-32X/th-as7712-32x100G.config.bcm new file mode 100644 index 00000000000..09d97c5e4c6 --- /dev/null +++ b/device/accton/x86_64-accton_as7712_32x-r0/Accton-AS7712-32X/th-as7712-32x100G.config.bcm @@ -0,0 +1,570 @@ +# accton_as7712_32x 32x100G SDK config +os=unix +schan_intr_enable=0 +l2_mem_entries=40960 +l2xmsg_mode=1 +l3_mem_entries=40960 +parity_correction=0 +parity_enable=0 +mmu_lossless=1 + +pbmp_oversubscribe=0x444444441111111104444444422222222 +pbmp_xport_xe=0x444444451111111144444444422222222 + +# +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=8 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +dma_desc_timeout_usec=15000000 +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +max_vp_lags=0 +miim_intr_enable=0 +oversubscribe_mode=1 + +# portmap_0=x:xx +#FC0 +portmap_1=1:100 + +#FC1 +portmap_5=5:100 + +#FC2 +portmap_9=9:100 + +#FC3 +portmap_13=13:100 + +#FC4 +portmap_17=17:100 + +#FC5 +portmap_21=21:100 + +#FC6 +portmap_25=25:100 + +#FC7 +portmap_29=29:100 + +# Tile-1 +#FC8 +portmap_34=33:100 + +#FC9 +portmap_38=37:100 + +#FC10 +portmap_42=41:100 + +#FC11 +portmap_46=45:100 + +#FC12 +portmap_50=49:100 + +#FC13 +portmap_54=53:100 + +#FC14 +portmap_58=57:100 + +#FC15 +portmap_62=61:100 + +#TSC-E Management port 1 +#portmap_66=129:10 +#portmap_67=133:10 + +# Tile-2 +#FC16 +portmap_68=65:100 + +#FC17 +portmap_72=69:100 + +#FC18 +portmap_76=73:100 + +#FC19 +portmap_80=77:100 + +#FC20 +portmap_84=81:100 + +#FC21 +portmap_88=85:100 + +#FC22 +portmap_92=89:100 + +#FC23 +portmap_96=93:100 + +#TSC-E Management port 2 +#portmap_100=131:10 +#portmap_101=134:10 + +# Tile-3 +#FC24 +portmap_102=97:100 + +#FC25 +portmap_106=101:100 + +#FC26 +portmap_110=105:100 + +#FC27 +portmap_114=109:100 + +#FC28 +portmap_118=113:100 + +#FC29 +portmap_122=117:100 + +#FC30 +portmap_126=121:100 + +#FC31 +portmap_130=125:100 + + + +## TX/RX Lane Swap +######### +# port5 # +# FC16 # +######### +xgxs_tx_lane_map_68=0x0123 +xgxs_rx_lane_map_68=0x0123 + +######### +# port8 # +# FC19 # +######### +xgxs_tx_lane_map_80=0x0123 +xgxs_rx_lane_map_80=0x0123 + +######### +# port13# +# FC20 # +######### +xgxs_tx_lane_map_84=0x1032 +xgxs_rx_lane_map_84=0x1032 + +######### +# port14# +# FC21 # +######### +xgxs_tx_lane_map_88=0x0123 +xgxs_rx_lane_map_88=0x0123 + +######### +# port15# +# FC22 # +######### +xgxs_tx_lane_map_92=0x1032 +xgxs_rx_lane_map_92=0x1032 + +######### +# port17# +# FC24 # +######### +xgxs_tx_lane_map_102=0x1032 +xgxs_rx_lane_map_102=0x1032 + +######### +# port18# +# FC25 # +######### +xgxs_tx_lane_map_106=0x0123 +xgxs_rx_lane_map_106=0x0123 + +######### +# port19# +# FC26 # +######### +xgxs_tx_lane_map_110=0x1032 +xgxs_rx_lane_map_110=0x1032 + +######### +# port20# +# FC27 # +######### +xgxs_tx_lane_map_114=0x0123 +xgxs_rx_lane_map_114=0x0123 + +######### +# port26# +# FC29 # +######### +xgxs_tx_lane_map_122=0x0123 +xgxs_rx_lane_map_122=0x0123 + +######### +# port27# +# FC30 # +######### +xgxs_tx_lane_map_126=0x0123 +xgxs_rx_lane_map_126=0x0123 + +######### +# port29# +# FC0 # +######### +xgxs_tx_lane_map_1=0x0123 +xgxs_rx_lane_map_1=0x0123 + +# port30# +# FC1 # +######### +xgxs_tx_lane_map_5=0x0123 +xgxs_rx_lane_map_5=0x0123 + +######### +# port31# +# FC2 # +######### +xgxs_tx_lane_map_9=0x0123 +xgxs_rx_lane_map_9=0x0123 + +######### +# port32# +# FC3 # +######### +xgxs_tx_lane_map_13=0x0123 +xgxs_rx_lane_map_13=0x0123 + + +## RX / TX Serdes lane polarity flip list +## RX / TX Serdes lane polarity flip list +######### +# FC4 # +# port21 # +######### +phy_xaui_tx_polarity_flip_17=0xf + +######### +# FC20 # +# port13 # +######### +phy_xaui_rx_polarity_flip_84=0xf +phy_xaui_tx_polarity_flip_84=0x6 + +######### +# FC21 # +# port14 # +######### +phy_xaui_rx_polarity_flip_88=0xf + +######### +# FC22 # +# port15 # +######### +phy_xaui_rx_polarity_flip_92=0xf +phy_xaui_tx_polarity_flip_92=0xe + + +######### +# FC23 # +# port16 # +######### +phy_xaui_tx_polarity_flip_96=0x1 + +######### +# FC24 # +# port17 # +######### +phy_xaui_tx_polarity_flip_102=0x1 + + +######### +# FC25 # +# port18 # +######### +phy_xaui_rx_polarity_flip_106=0xf + +######### +# FC26 # +# port19 # +######### +phy_xaui_tx_polarity_flip_110=0xe + +######### +# FC27 # +# port20 # +######### +phy_xaui_rx_polarity_flip_114=0x2 + +######### +# FC28 # +# port25 # +######### +phy_xaui_rx_polarity_flip_118=0xa +phy_xaui_tx_polarity_flip_118=0xf + +#Driver Current +serdes_driver_current_lane0_1=0x8 +serdes_driver_current_lane1_1=0x8 +serdes_driver_current_lane2_1=0x8 +serdes_driver_current_lane3_1=0x8 +serdes_driver_current_lane0_5=0x8 +serdes_driver_current_lane1_5=0x8 +serdes_driver_current_lane2_5=0x8 +serdes_driver_current_lane3_5=0x8 +serdes_driver_current_lane0_9=0x8 +serdes_driver_current_lane1_9=0x8 +serdes_driver_current_lane2_9=0x8 +serdes_driver_current_lane3_9=0x8 +serdes_driver_current_lane0_13=0x8 +serdes_driver_current_lane1_13=0x8 +serdes_driver_current_lane2_13=0x8 +serdes_driver_current_lane3_13=0x8 +serdes_driver_current_lane0_17=0x8 +serdes_driver_current_lane1_17=0x8 +serdes_driver_current_lane2_17=0x8 +serdes_driver_current_lane3_17=0x8 +serdes_driver_current_lane0_21=0x8 +serdes_driver_current_lane1_21=0x8 +serdes_driver_current_lane2_21=0x8 +serdes_driver_current_lane3_21=0x8 +serdes_driver_current_lane0_25=0x8 +serdes_driver_current_lane1_25=0x8 +serdes_driver_current_lane2_25=0x8 +serdes_driver_current_lane3_25=0x8 +serdes_driver_current_lane0_29=0x8 +serdes_driver_current_lane1_29=0x8 +serdes_driver_current_lane2_29=0x8 +serdes_driver_current_lane3_29=0x8 +serdes_driver_current_lane0_34=0x8 +serdes_driver_current_lane1_34=0x8 +serdes_driver_current_lane2_34=0x8 +serdes_driver_current_lane3_34=0x8 +serdes_driver_current_lane0_38=0x8 +serdes_driver_current_lane1_38=0x8 +serdes_driver_current_lane2_38=0x8 +serdes_driver_current_lane3_38=0x8 +serdes_driver_current_lane0_42=0x8 +serdes_driver_current_lane1_42=0x8 +serdes_driver_current_lane2_42=0x8 +serdes_driver_current_lane3_42=0x8 +serdes_driver_current_lane0_46=0x8 +serdes_driver_current_lane1_46=0x8 +serdes_driver_current_lane2_46=0x8 +serdes_driver_current_lane3_46=0x8 +serdes_driver_current_lane0_50=0x8 +serdes_driver_current_lane1_50=0x8 +serdes_driver_current_lane2_50=0x8 +serdes_driver_current_lane3_50=0x8 +serdes_driver_current_lane0_54=0x8 +serdes_driver_current_lane1_54=0x8 +serdes_driver_current_lane2_54=0x8 +serdes_driver_current_lane3_54=0x8 +serdes_driver_current_lane0_58=0x8 +serdes_driver_current_lane1_58=0x8 +serdes_driver_current_lane2_58=0x8 +serdes_driver_current_lane3_58=0x8 +serdes_driver_current_lane0_62=0x8 +serdes_driver_current_lane1_62=0x8 +serdes_driver_current_lane2_62=0x8 +serdes_driver_current_lane3_62=0x8 +serdes_driver_current_lane0_68=0x8 +serdes_driver_current_lane1_68=0x8 +serdes_driver_current_lane2_68=0x8 +serdes_driver_current_lane3_68=0x8 +serdes_driver_current_lane0_72=0x8 +serdes_driver_current_lane1_72=0x8 +serdes_driver_current_lane2_72=0x8 +serdes_driver_current_lane3_72=0x8 +serdes_driver_current_lane0_76=0x8 +serdes_driver_current_lane1_76=0x8 +serdes_driver_current_lane2_76=0x8 +serdes_driver_current_lane3_76=0x8 +serdes_driver_current_lane0_80=0x8 +serdes_driver_current_lane1_80=0x8 +serdes_driver_current_lane2_80=0x8 +serdes_driver_current_lane3_80=0x8 +serdes_driver_current_lane0_84=0x8 +serdes_driver_current_lane1_84=0x8 +serdes_driver_current_lane2_84=0x8 +serdes_driver_current_lane3_84=0x8 +serdes_driver_current_lane0_88=0x8 +serdes_driver_current_lane1_88=0x8 +serdes_driver_current_lane2_88=0x8 +serdes_driver_current_lane3_88=0x8 +serdes_driver_current_lane0_92=0x8 +serdes_driver_current_lane1_92=0x8 +serdes_driver_current_lane2_92=0x8 +serdes_driver_current_lane3_92=0x8 +serdes_driver_current_lane0_96=0x8 +serdes_driver_current_lane1_96=0x8 +serdes_driver_current_lane2_96=0x8 +serdes_driver_current_lane3_96=0x8 +serdes_driver_current_lane0_102=0x8 +serdes_driver_current_lane1_102=0x8 +serdes_driver_current_lane2_102=0x8 +serdes_driver_current_lane3_102=0x8 +serdes_driver_current_lane0_106=0x8 +serdes_driver_current_lane1_106=0x8 +serdes_driver_current_lane2_106=0x8 +serdes_driver_current_lane3_106=0x8 +serdes_driver_current_lane0_110=0x8 +serdes_driver_current_lane1_110=0x8 +serdes_driver_current_lane2_110=0x8 +serdes_driver_current_lane3_110=0x8 +serdes_driver_current_lane0_114=0x8 +serdes_driver_current_lane1_114=0x8 +serdes_driver_current_lane2_114=0x8 +serdes_driver_current_lane3_114=0x8 +serdes_driver_current_lane0_118=0x8 +serdes_driver_current_lane1_118=0x8 +serdes_driver_current_lane2_118=0x8 +serdes_driver_current_lane3_118=0x8 +serdes_driver_current_lane0_122=0x8 +serdes_driver_current_lane1_122=0x8 +serdes_driver_current_lane2_122=0x8 +serdes_driver_current_lane3_122=0x8 +serdes_driver_current_lane0_126=0x8 +serdes_driver_current_lane1_126=0x8 +serdes_driver_current_lane2_126=0x8 +serdes_driver_current_lane3_126=0x8 +serdes_driver_current_lane0_130=0x8 +serdes_driver_current_lane1_130=0x8 +serdes_driver_current_lane2_130=0x8 +serdes_driver_current_lane3_130=0x8 + +#Preemphasis +serdes_preemphasis_lane0_1=0x264204 +serdes_preemphasis_lane1_1=0x264204 +serdes_preemphasis_lane2_1=0x264204 +serdes_preemphasis_lane3_1=0x264204 +serdes_preemphasis_lane0_5=0x224406 +serdes_preemphasis_lane1_5=0x224406 +serdes_preemphasis_lane2_5=0x264204 +serdes_preemphasis_lane3_5=0x244206 +serdes_preemphasis_lane0_9=0x204606 +serdes_preemphasis_lane1_9=0x264204 +serdes_preemphasis_lane2_9=0x204606 +serdes_preemphasis_lane3_9=0x224406 +serdes_preemphasis_lane0_13=0x204606 +serdes_preemphasis_lane1_13=0x224406 +serdes_preemphasis_lane2_13=0x224406 +serdes_preemphasis_lane3_13=0x244206 +serdes_preemphasis_lane0_17=0x204606 +serdes_preemphasis_lane1_17=0x204606 +serdes_preemphasis_lane2_17=0x204606 +serdes_preemphasis_lane3_17=0x204606 +serdes_preemphasis_lane0_21=0x204606 +serdes_preemphasis_lane1_21=0x204606 +serdes_preemphasis_lane2_21=0x204606 +serdes_preemphasis_lane3_21=0x224406 +serdes_preemphasis_lane0_25=0x204606 +serdes_preemphasis_lane1_25=0x204606 +serdes_preemphasis_lane2_25=0x204606 +serdes_preemphasis_lane3_25=0x204606 +serdes_preemphasis_lane0_29=0x204606 +serdes_preemphasis_lane1_29=0x204606 +serdes_preemphasis_lane2_29=0x204606 +serdes_preemphasis_lane3_29=0x204606 +serdes_preemphasis_lane0_34=0x284601 +serdes_preemphasis_lane1_34=0x284601 +serdes_preemphasis_lane2_34=0x284601 +serdes_preemphasis_lane3_34=0x284601 +serdes_preemphasis_lane0_38=0x204604 +serdes_preemphasis_lane1_38=0x204604 +serdes_preemphasis_lane2_38=0x224406 +serdes_preemphasis_lane3_38=0x224406 +serdes_preemphasis_lane0_42=0x284601 +serdes_preemphasis_lane1_42=0x294501 +serdes_preemphasis_lane2_42=0x284601 +serdes_preemphasis_lane3_42=0x284601 +serdes_preemphasis_lane0_46=0x204802 +serdes_preemphasis_lane1_46=0x204802 +serdes_preemphasis_lane2_46=0x204802 +serdes_preemphasis_lane3_46=0x204802 +serdes_preemphasis_lane0_50=0x1e4f01 +serdes_preemphasis_lane1_50=0x1e4d01 +serdes_preemphasis_lane2_50=0x1e4f01 +serdes_preemphasis_lane3_50=0x1e4f01 +serdes_preemphasis_lane0_54=0x1f4a03 +serdes_preemphasis_lane1_54=0x1f4a03 +serdes_preemphasis_lane2_54=0x1f4a03 +serdes_preemphasis_lane3_54=0x1f4a03 +serdes_preemphasis_lane0_58=0x1e4f01 +serdes_preemphasis_lane1_58=0x1e4f01 +serdes_preemphasis_lane2_58=0x1e4f01 +serdes_preemphasis_lane3_58=0x1e4f01 +serdes_preemphasis_lane0_62=0x1e4e02 +serdes_preemphasis_lane1_62=0x1e4e02 +serdes_preemphasis_lane2_62=0x1e4e02 +serdes_preemphasis_lane3_62=0x1e4e02 +serdes_preemphasis_lane0_68=0x1e4f01 +serdes_preemphasis_lane1_68=0x1e4f01 +serdes_preemphasis_lane2_68=0x1e4f01 +serdes_preemphasis_lane3_68=0x1e4f01 +serdes_preemphasis_lane0_72=0x1e4e02 +serdes_preemphasis_lane1_72=0x1e4e02 +serdes_preemphasis_lane2_72=0x1e4e02 +serdes_preemphasis_lane3_72=0x1e4e02 +serdes_preemphasis_lane0_76=0x1c4d02 +serdes_preemphasis_lane1_76=0x195002 +serdes_preemphasis_lane2_76=0x195002 +serdes_preemphasis_lane3_76=0x195002 +serdes_preemphasis_lane0_80=0x1e4e02 +serdes_preemphasis_lane1_80=0x1e4e02 +serdes_preemphasis_lane2_80=0x1e4e02 +serdes_preemphasis_lane3_80=0x1e4e02 +serdes_preemphasis_lane0_84=0x234701 +serdes_preemphasis_lane1_84=0x234701 +serdes_preemphasis_lane2_84=0x234701 +serdes_preemphasis_lane3_84=0x234701 +serdes_preemphasis_lane0_88=0x224802 +serdes_preemphasis_lane1_88=0x224602 +serdes_preemphasis_lane2_88=0x224802 +serdes_preemphasis_lane3_88=0x224802 +serdes_preemphasis_lane0_92=0x234801 +serdes_preemphasis_lane1_92=0x244701 +serdes_preemphasis_lane2_92=0x234801 +serdes_preemphasis_lane3_92=0x234601 +serdes_preemphasis_lane0_96=0x204406 +serdes_preemphasis_lane1_96=0x204406 +serdes_preemphasis_lane2_96=0x204406 +serdes_preemphasis_lane3_96=0x224602 +serdes_preemphasis_lane0_102=0x204606 +serdes_preemphasis_lane1_102=0x235002 +serdes_preemphasis_lane2_102=0x204606 +serdes_preemphasis_lane3_102=0x204606 +serdes_preemphasis_lane0_106=0x204606 +serdes_preemphasis_lane1_106=0x204606 +serdes_preemphasis_lane2_106=0x204606 +serdes_preemphasis_lane3_106=0x204606 +serdes_preemphasis_lane0_110=0x204606 +serdes_preemphasis_lane1_110=0x224406 +serdes_preemphasis_lane2_110=0x224406 +serdes_preemphasis_lane3_110=0x224406 +serdes_preemphasis_lane0_114=0x224406 +serdes_preemphasis_lane1_114=0x204606 +serdes_preemphasis_lane2_114=0x204606 +serdes_preemphasis_lane3_114=0x224406 +serdes_preemphasis_lane0_118=0x224406 +serdes_preemphasis_lane1_118=0x224406 +serdes_preemphasis_lane2_118=0x224406 +serdes_preemphasis_lane3_118=0x224406 +serdes_preemphasis_lane0_122=0x244404 +serdes_preemphasis_lane1_122=0x244404 +serdes_preemphasis_lane2_122=0x244404 +serdes_preemphasis_lane3_122=0x244404 +serdes_preemphasis_lane0_126=0x234504 +serdes_preemphasis_lane1_126=0x234404 +serdes_preemphasis_lane2_126=0x224406 +serdes_preemphasis_lane3_126=0x224406 +serdes_preemphasis_lane0_130=0x244404 +serdes_preemphasis_lane1_130=0x244404 +serdes_preemphasis_lane2_130=0x234504 +serdes_preemphasis_lane3_130=0x264501 diff --git a/device/accton/x86_64-accton_as7712_32x-r0/default_sku b/device/accton/x86_64-accton_as7712_32x-r0/default_sku new file mode 100644 index 00000000000..fb1c5c5afc9 --- /dev/null +++ b/device/accton/x86_64-accton_as7712_32x-r0/default_sku @@ -0,0 +1 @@ +Accton-AS7712-32X t1 diff --git a/device/accton/x86_64-accton_as7712_32x-r0/fancontrol b/device/accton/x86_64-accton_as7712_32x-r0/fancontrol new file mode 100644 index 00000000000..9d057024f94 --- /dev/null +++ b/device/accton/x86_64-accton_as7712_32x-r0/fancontrol @@ -0,0 +1,9 @@ +INTERVAL=10 +FCTEMPS=/sys/bus/i2c/devices/2-0066/pwm1=/sys/bus/i2c/devices/2-0066/sys_temp +FCFANS=/sys/bus/i2c/devices/2-0066/pwm1=/sys/bus/i2c/devices/2-0066/fan1_input /sys/bus/i2c/devices/2-0066/pwm1=/sys/bus/i2c/devices/2-0066/fan2_input /sys/bus/i2c/devices/2-0066/pwm1=/sys/bus/i2c/devices/2-0066/fan3_input /sys/bus/i2c/devices/2-0066/pwm1=/sys/bus/i2c/devices/2-0066/fan4_input /sys/bus/i2c/devices/2-0066/pwm1=/sys/bus/i2c/devices/2-0066/fan5_input /sys/bus/i2c/devices/2-0066/pwm1=/sys/bus/i2c/devices/2-0066/fan6_input /sys/bus/i2c/devices/2-0066/pwm1=/sys/bus/i2c/devices/2-0066/fan11_input /sys/bus/i2c/devices/2-0066/pwm1=/sys/bus/i2c/devices/2-0066/fan12_input /sys/bus/i2c/devices/2-0066/pwm1=/sys/bus/i2c/devices/2-0066/fan13_input /sys/bus/i2c/devices/2-0066/pwm1=/sys/bus/i2c/devices/2-0066/fan14_input /sys/bus/i2c/devices/2-0066/pwm1=/sys/bus/i2c/devices/2-0066/fan15_input /sys/bus/i2c/devices/2-0066/pwm1=/sys/bus/i2c/devices/2-0066/fan16_input +MINTEMP=/sys/bus/i2c/devices/2-0066/pwm1=135 +MAXTEMP=/sys/bus/i2c/devices/2-0066/pwm1=160 +MINSTART=/sys/bus/i2c/devices/2-0066/pwm1=100 +MINSTOP=/sys/bus/i2c/devices/2-0066/pwm1=32 +MINPWM=/sys/bus/i2c/devices/2-0066/pwm1=32 +MAXPWM=/sys/bus/i2c/devices/2-0066/pwm1=69 diff --git a/device/accton/x86_64-accton_as7712_32x-r0/installer.conf b/device/accton/x86_64-accton_as7712_32x-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/accton/x86_64-accton_as7712_32x-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/accton/x86_64-accton_as7712_32x-r0/led_proc_init.soc b/device/accton/x86_64-accton_as7712_32x-r0/led_proc_init.soc new file mode 100755 index 00000000000..719cb777719 --- /dev/null +++ b/device/accton/x86_64-accton_as7712_32x-r0/led_proc_init.soc @@ -0,0 +1,41 @@ +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=31 REMAP_PORT_1=30 REMAP_PORT_2=29 REMAP_PORT_3=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=27 REMAP_PORT_5=26 REMAP_PORT_6=25 REMAP_PORT_7=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=23 REMAP_PORT_9=22 REMAP_PORT_10=21 REMAP_PORT_11=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=19 REMAP_PORT_13=18 REMAP_PORT_14=17 REMAP_PORT_15=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=63 REMAP_PORT_17=62 REMAP_PORT_18=61 REMAP_PORT_19=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=59 REMAP_PORT_21=58 REMAP_PORT_22=57 REMAP_PORT_23=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=55 REMAP_PORT_25=54 REMAP_PORT_26=53 REMAP_PORT_27=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=51 REMAP_PORT_29=50 REMAP_PORT_30=49 REMAP_PORT_31=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=47 REMAP_PORT_33=46 REMAP_PORT_34=45 REMAP_PORT_35=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=43 REMAP_PORT_37=42 REMAP_PORT_38=41 REMAP_PORT_39=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=39 REMAP_PORT_41=38 REMAP_PORT_42=37 REMAP_PORT_43=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=35 REMAP_PORT_45=34 REMAP_PORT_46=33 REMAP_PORT_47=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 REMAP_PORT_49=14 REMAP_PORT_50=13 REMAP_PORT_51=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 REMAP_PORT_53=10 REMAP_PORT_54=9 REMAP_PORT_55=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 + +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=35 REMAP_PORT_1=34 REMAP_PORT_2=33 REMAP_PORT_3=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=39 REMAP_PORT_5=38 REMAP_PORT_6=37 REMAP_PORT_7=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=43 REMAP_PORT_9=42 REMAP_PORT_10=41 REMAP_PORT_11=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=47 REMAP_PORT_13=46 REMAP_PORT_14=45 REMAP_PORT_15=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=3 REMAP_PORT_17=2 REMAP_PORT_18=1 REMAP_PORT_19=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=7 REMAP_PORT_21=6 REMAP_PORT_22=5 REMAP_PORT_23=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=11 REMAP_PORT_25=10 REMAP_PORT_26=9 REMAP_PORT_27=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=15 REMAP_PORT_29=14 REMAP_PORT_30=13 REMAP_PORT_31=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=19 REMAP_PORT_33=18 REMAP_PORT_34=17 REMAP_PORT_35=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=23 REMAP_PORT_37=22 REMAP_PORT_38=21 REMAP_PORT_39=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=27 REMAP_PORT_41=26 REMAP_PORT_42=25 REMAP_PORT_43=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=31 REMAP_PORT_45=30 REMAP_PORT_46=29 REMAP_PORT_47=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 REMAP_PORT_49=50 REMAP_PORT_50=49 REMAP_PORT_51=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 REMAP_PORT_53=54 REMAP_PORT_54=53 REMAP_PORT_55=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 REMAP_PORT_57=58 REMAP_PORT_58=57 REMAP_PORT_59=56 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=62 REMAP_PORT_62=61 REMAP_PORT_63=60 + +led 0 prog 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 E0 02 FB 42 40 06 F9 D2 00 74 1E 02 F9 42 03 67 AC 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 84 67 98 57 80 18 71 EB 67 98 67 84 57 67 84 67 84 57 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 0 start + +led 1 prog 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 E0 02 FB 42 40 06 F9 D2 00 74 1E 02 F9 42 03 67 AC 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 84 67 98 57 80 18 71 EB 67 98 67 84 57 67 84 67 84 57 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 1 start + +led auto on \ No newline at end of file diff --git a/device/accton/x86_64-accton_as7712_32x-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as7712_32x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..7681caafeef --- /dev/null +++ b/device/accton/x86_64-accton_as7712_32x-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as7712_32x-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as7712_32x-r0/plugins/psuutil.py new file mode 100644 index 00000000000..d7600a2af4b --- /dev/null +++ b/device/accton/x86_64-accton_as7712_32x-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 1: "11-0053", + 2: "10-0050", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as7712_32x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7712_32x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..2b8d61ef42e --- /dev/null +++ b/device/accton/x86_64-accton_as7712_32x-r0/plugins/sfputil.py @@ -0,0 +1,240 @@ +#!/usr/bin/env python + +try: + import time + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +#from xcvrd +SFP_STATUS_INSERTED = '1' +SFP_STATUS_REMOVED = '0' + + +class SfpUtil(SfpUtilBase): + """Platform specific SfpUtill class""" + + _port_start = 1 + _port_end = 32 + ports_in_block = 32 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 9 : 18, + 10 : 19, + 11 : 20, + 12 : 21, + 1 : 22, + 2 : 23, + 3 : 24, + 4 : 25, + 6 : 26, + 5 : 27, + 8 : 28, + 7 : 29, + 13 : 30, + 14 : 31, + 15 : 32, + 16 : 33, + 17 : 34, + 18 : 35, + 19 : 36, + 20 : 37, + 25 : 38, + 26 : 39, + 27 : 40, + 28 : 41, + 29 : 42, + 30 : 43, + 31 : 44, + 32 : 45, + 21 : 46, + 22 : 47, + 23 : 48, + 24 : 49, + } + + _qsfp_ports = range(0, ports_in_block + 1) + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(self.port_start, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self._port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + path = "/sys/bus/i2c/devices/4-0060/module_reset_{0}" + port_ps = path.format(port_num) + + try: + reg_file = open(port_ps, 'w', buffering=0) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #toggle reset + reg_file.seek(0) + reg_file.write('1') + time.sleep(1) + reg_file.seek(0) + reg_file.write('0') + reg_file.close() + return True + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + path = "/sys/bus/i2c/devices/4-0060/module_present_{0}" + port_ps = path.format(port_num) + + try: + reg_file = open(port_ps) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if reg_value == '1': + return True + + return False + + @property + def port_start(self): + return self._port_start + + @property + def port_end(self): + return self._port_end + + @property + def qsfp_ports(self): + return range(self.port_start, self.ports_in_block + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False + + eeprom = open(self.port_to_eeprom_mapping[port_num], "rb") + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if ((lpmode & 0x3) == 0x3): + return True # Low Power Mode if "Power override" bit is 1 and "Power set" bit is 1 + else: + return False # High Power Mode if one of the following conditions is matched: + # 1. "Power override" bit is 0 + # 2. "Power override" bit is 1 and "Power set" bit is 0 + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b") + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + @property + def _get_all_presence(self): + nodes = [] + + cpld_path = "/sys/bus/i2c/devices/4-0060/" + nodes.append(cpld_path + "module_present_all") + + bitmap = "" + for node in nodes: + try: + reg_file = open(node) + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + bitmap += reg_file.readline().rstrip() + " " + reg_file.close() + + rev = bitmap.split(" ") + rev = "".join(rev[::-1]) + return int(rev,16) + + data = {'valid':0, 'last':0, 'present':0} + def get_transceiver_change_event(self, timeout=2000): + now = time.time() + port_dict = {} + port = 0 + + if timeout < 1000: + timeout = 1000 + timeout = (timeout) / float(1000) # Convert to secs + + if now < (self.data['last'] + timeout) and self.data['valid']: + return True, {} + + reg_value = self._get_all_presence + changed_ports = self.data['present'] ^ reg_value + if changed_ports: + for port in range (self.port_start, self.port_end+1): + # Mask off the bit corresponding to our port + mask = (1 << (port - 1)) + if changed_ports & mask: + if (reg_value & mask) == 0: + port_dict[port] = SFP_STATUS_INSERTED + else: + port_dict[port] = SFP_STATUS_REMOVED + + # Update cache + self.data['present'] = reg_value + self.data['last'] = now + self.data['valid'] = 1 + return True, port_dict + else: + return True, {} + return False, {} + diff --git a/device/accton/x86_64-accton_as7712_32x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7712_32x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7712_32x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7712_32x-r0/sensors.conf b/device/accton/x86_64-accton_as7712_32x-r0/sensors.conf new file mode 100644 index 00000000000..33d75d59812 --- /dev/null +++ b/device/accton/x86_64-accton_as7712_32x-r0/sensors.conf @@ -0,0 +1,23 @@ +# libsensors configuration file for AS7712-32X +# ------------------------------------------------ +# + +#Comment out the following for sku-sensors-data.yml +#chip "ym2651-*" +# label power1 "PSU Output Power" +# label temp1 "Power Supply Temp" +# label fan1 "Fan Speed" +# +#chip "as7712_32x_fan-*" +# label fan1 "Fan tray 1 front" +# label fan2 "Fan tray 2 front" +# label fan3 "Fan tray 3 front" +# label fan4 "Fan tray 4 front" +# label fan5 "Fan tray 5 front" +# label fan6 "Fan tray 6 front" +# label fan11 "Fan tray 1 rear" +# label fan12 "Fan tray 2 rear" +# label fan13 "Fan tray 3 rear" +# label fan14 "Fan tray 4 rear" +# label fan15 "Fan tray 5 rear" +# label fan16 "Fan tray 6 rear" diff --git a/device/accton/x86_64-accton_as7716_32x-r0/Accton-AS7716-32X/port_config.ini b/device/accton/x86_64-accton_as7716_32x-r0/Accton-AS7716-32X/port_config.ini new file mode 100644 index 00000000000..0151b70d71c --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32x-r0/Accton-AS7716-32X/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 49,50,51,52 hundredGigE1 1 100000 +Ethernet4 53,54,55,56 hundredGigE2 2 100000 +Ethernet8 57,58,59,60 hundredGigE3 3 100000 +Ethernet12 61,62,63,64 hundredGigE4 4 100000 +Ethernet16 65,66,67,68 hundredGigE5 5 100000 +Ethernet20 69,70,71,72 hundredGigE6 6 100000 +Ethernet24 73,74,75,76 hundredGigE7 7 100000 +Ethernet28 77,78,79,80 hundredGigE8 8 100000 +Ethernet32 33,34,35,36 hundredGigE9 9 100000 +Ethernet36 37,38,39,40 hundredGigE10 10 100000 +Ethernet40 41,42,43,44 hundredGigE11 11 100000 +Ethernet44 45,46,47,48 hundredGigE12 12 100000 +Ethernet48 81,82,83,84 hundredGigE13 13 100000 +Ethernet52 85,86,87,88 hundredGigE14 14 100000 +Ethernet56 89,90,91,92 hundredGigE15 15 100000 +Ethernet60 93,94,95,96 hundredGigE16 16 100000 +Ethernet64 97,98,99,100 hundredGigE17 17 100000 +Ethernet68 101,102,103,104 hundredGigE18 18 100000 +Ethernet72 105,106,107,108 hundredGigE19 19 100000 +Ethernet76 109,110,111,112 hundredGigE20 20 100000 +Ethernet80 17,18,19,20 hundredGigE21 21 100000 +Ethernet84 21,22,23,24 hundredGigE22 22 100000 +Ethernet88 25,26,27,28 hundredGigE23 23 100000 +Ethernet92 29,30,31,32 hundredGigE24 24 100000 +Ethernet96 113,114,115,116 hundredGigE25 25 100000 +Ethernet100 117,118,119,120 hundredGigE26 26 100000 +Ethernet104 121,122,123,124 hundredGigE27 27 100000 +Ethernet108 125,126,127,128 hundredGigE28 28 100000 +Ethernet112 1,2,3,4 hundredGigE29 29 100000 +Ethernet116 5,6,7,8 hundredGigE30 30 100000 +Ethernet120 9,10,11,12 hundredGigE31 31 100000 +Ethernet124 13,14,15,16 hundredGigE32 32 100000 diff --git a/device/accton/x86_64-accton_as7716_32x-r0/Accton-AS7716-32X/sai.profile b/device/accton/x86_64-accton_as7716_32x-r0/Accton-AS7716-32X/sai.profile new file mode 100644 index 00000000000..65944732653 --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32x-r0/Accton-AS7716-32X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-as7716-32x100G.config.bcm diff --git a/device/accton/x86_64-accton_as7716_32x-r0/Accton-AS7716-32X/th-as7716-32x100G.config.bcm b/device/accton/x86_64-accton_as7716_32x-r0/Accton-AS7716-32X/th-as7716-32x100G.config.bcm new file mode 100644 index 00000000000..1231bf302be --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32x-r0/Accton-AS7716-32X/th-as7716-32x100G.config.bcm @@ -0,0 +1,570 @@ +# accton_as7716_32x 32x100G SDK config +os=unix +schan_intr_enable=0 +l2_mem_entries=40960 +l2xmsg_mode=1 +l3_mem_entries=40960 +parity_correction=0 +parity_enable=0 +mmu_lossless=1 + +pbmp_oversubscribe=0x444444441111111104444444422222222 +pbmp_xport_xe=0x444444451111111144444444422222222 + +# +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=8 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +dma_desc_timeout_usec=15000000 +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +max_vp_lags=0 +miim_intr_enable=0 +oversubscribe_mode=1 + +# portmap_0=x:xx +#FC0 +portmap_1=1:100 + +#FC1 +portmap_5=5:100 + +#FC2 +portmap_9=9:100 + +#FC3 +portmap_13=13:100 + +#FC4 +portmap_17=17:100 + +#FC5 +portmap_21=21:100 + +#FC6 +portmap_25=25:100 + +#FC7 +portmap_29=29:100 + +# Tile-1 +#FC8 +portmap_34=33:100 + +#FC9 +portmap_38=37:100 + +#FC10 +portmap_42=41:100 + +#FC11 +portmap_46=45:100 + +#FC12 +portmap_50=49:100 + +#FC13 +portmap_54=53:100 + +#FC14 +portmap_58=57:100 + +#FC15 +portmap_62=61:100 + +#TSC-E Management port 1 +#portmap_66=129:10 +#portmap_67=133:10 + +# Tile-2 +#FC16 +portmap_68=65:100 + +#FC17 +portmap_72=69:100 + +#FC18 +portmap_76=73:100 + +#FC19 +portmap_80=77:100 + +#FC20 +portmap_84=81:100 + +#FC21 +portmap_88=85:100 + +#FC22 +portmap_92=89:100 + +#FC23 +portmap_96=93:100 + +#TSC-E Management port 2 +#portmap_100=131:10 +#portmap_101=134:10 + +# Tile-3 +#FC24 +portmap_102=97:100 + +#FC25 +portmap_106=101:100 + +#FC26 +portmap_110=105:100 + +#FC27 +portmap_114=109:100 + +#FC28 +portmap_118=113:100 + +#FC29 +portmap_122=117:100 + +#FC30 +portmap_126=121:100 + +#FC31 +portmap_130=125:100 + + + +## TX/RX Lane Swap +######### +# port5 # +# FC16 # +######### +xgxs_tx_lane_map_68=0x0123 +xgxs_rx_lane_map_68=0x0123 + +######### +# port8 # +# FC19 # +######### +xgxs_tx_lane_map_80=0x0123 +xgxs_rx_lane_map_80=0x0123 + +######### +# port13# +# FC20 # +######### +xgxs_tx_lane_map_84=0x1032 +xgxs_rx_lane_map_84=0x1032 + +######### +# port14# +# FC21 # +######### +xgxs_tx_lane_map_88=0x0123 +xgxs_rx_lane_map_88=0x0123 + +######### +# port15# +# FC22 # +######### +xgxs_tx_lane_map_92=0x1032 +xgxs_rx_lane_map_92=0x1032 + +######### +# port17# +# FC24 # +######### +xgxs_tx_lane_map_102=0x1032 +xgxs_rx_lane_map_102=0x1032 + +######### +# port18# +# FC25 # +######### +xgxs_tx_lane_map_106=0x0123 +xgxs_rx_lane_map_106=0x0123 + +######### +# port19# +# FC26 # +######### +xgxs_tx_lane_map_110=0x1032 +xgxs_rx_lane_map_110=0x1032 + +######### +# port20# +# FC27 # +######### +xgxs_tx_lane_map_114=0x0123 +xgxs_rx_lane_map_114=0x0123 + +######### +# port26# +# FC29 # +######### +xgxs_tx_lane_map_122=0x0123 +xgxs_rx_lane_map_122=0x0123 + +######### +# port27# +# FC30 # +######### +xgxs_tx_lane_map_126=0x0123 +xgxs_rx_lane_map_126=0x0123 + +######### +# port29# +# FC0 # +######### +xgxs_tx_lane_map_1=0x0123 +xgxs_rx_lane_map_1=0x0123 + +# port30# +# FC1 # +######### +xgxs_tx_lane_map_5=0x0123 +xgxs_rx_lane_map_5=0x0123 + +######### +# port31# +# FC2 # +######### +xgxs_tx_lane_map_9=0x0123 +xgxs_rx_lane_map_9=0x0123 + +######### +# port32# +# FC3 # +######### +xgxs_tx_lane_map_13=0x0123 +xgxs_rx_lane_map_13=0x0123 + + +## RX / TX Serdes lane polarity flip list +## RX / TX Serdes lane polarity flip list +######### +# FC4 # +# port21 # +######### +phy_xaui_tx_polarity_flip_17=0xf + +######### +# FC20 # +# port13 # +######### +phy_xaui_rx_polarity_flip_84=0xf +phy_xaui_tx_polarity_flip_84=0x6 + +######### +# FC21 # +# port14 # +######### +phy_xaui_rx_polarity_flip_88=0xf + +######### +# FC22 # +# port15 # +######### +phy_xaui_rx_polarity_flip_92=0xf +phy_xaui_tx_polarity_flip_92=0xe + + +######### +# FC23 # +# port16 # +######### +phy_xaui_tx_polarity_flip_96=0x1 + +######### +# FC24 # +# port17 # +######### +phy_xaui_tx_polarity_flip_102=0x1 + + +######### +# FC25 # +# port18 # +######### +phy_xaui_rx_polarity_flip_106=0xf + +######### +# FC26 # +# port19 # +######### +phy_xaui_tx_polarity_flip_110=0xe + +######### +# FC27 # +# port20 # +######### +phy_xaui_rx_polarity_flip_114=0x2 + +######### +# FC28 # +# port25 # +######### +phy_xaui_rx_polarity_flip_118=0xa +phy_xaui_tx_polarity_flip_118=0xf + +#Driver Current +serdes_driver_current_lane0_1=0x8 +serdes_driver_current_lane1_1=0x8 +serdes_driver_current_lane2_1=0x8 +serdes_driver_current_lane3_1=0x8 +serdes_driver_current_lane0_5=0x8 +serdes_driver_current_lane1_5=0x8 +serdes_driver_current_lane2_5=0x8 +serdes_driver_current_lane3_5=0x8 +serdes_driver_current_lane0_9=0x8 +serdes_driver_current_lane1_9=0x8 +serdes_driver_current_lane2_9=0x8 +serdes_driver_current_lane3_9=0x8 +serdes_driver_current_lane0_13=0x8 +serdes_driver_current_lane1_13=0x8 +serdes_driver_current_lane2_13=0x8 +serdes_driver_current_lane3_13=0x8 +serdes_driver_current_lane0_17=0x8 +serdes_driver_current_lane1_17=0x8 +serdes_driver_current_lane2_17=0x8 +serdes_driver_current_lane3_17=0x8 +serdes_driver_current_lane0_21=0x8 +serdes_driver_current_lane1_21=0x8 +serdes_driver_current_lane2_21=0x8 +serdes_driver_current_lane3_21=0x8 +serdes_driver_current_lane0_25=0x8 +serdes_driver_current_lane1_25=0x8 +serdes_driver_current_lane2_25=0x8 +serdes_driver_current_lane3_25=0x8 +serdes_driver_current_lane0_29=0x8 +serdes_driver_current_lane1_29=0x8 +serdes_driver_current_lane2_29=0x8 +serdes_driver_current_lane3_29=0x8 +serdes_driver_current_lane0_34=0x8 +serdes_driver_current_lane1_34=0x8 +serdes_driver_current_lane2_34=0x8 +serdes_driver_current_lane3_34=0x8 +serdes_driver_current_lane0_38=0x8 +serdes_driver_current_lane1_38=0x8 +serdes_driver_current_lane2_38=0x8 +serdes_driver_current_lane3_38=0x8 +serdes_driver_current_lane0_42=0x8 +serdes_driver_current_lane1_42=0x8 +serdes_driver_current_lane2_42=0x8 +serdes_driver_current_lane3_42=0x8 +serdes_driver_current_lane0_46=0x8 +serdes_driver_current_lane1_46=0x8 +serdes_driver_current_lane2_46=0x8 +serdes_driver_current_lane3_46=0x8 +serdes_driver_current_lane0_50=0x8 +serdes_driver_current_lane1_50=0x8 +serdes_driver_current_lane2_50=0x8 +serdes_driver_current_lane3_50=0x8 +serdes_driver_current_lane0_54=0x8 +serdes_driver_current_lane1_54=0x8 +serdes_driver_current_lane2_54=0x8 +serdes_driver_current_lane3_54=0x8 +serdes_driver_current_lane0_58=0x8 +serdes_driver_current_lane1_58=0x8 +serdes_driver_current_lane2_58=0x8 +serdes_driver_current_lane3_58=0x8 +serdes_driver_current_lane0_62=0x8 +serdes_driver_current_lane1_62=0x8 +serdes_driver_current_lane2_62=0x8 +serdes_driver_current_lane3_62=0x8 +serdes_driver_current_lane0_68=0x8 +serdes_driver_current_lane1_68=0x8 +serdes_driver_current_lane2_68=0x8 +serdes_driver_current_lane3_68=0x8 +serdes_driver_current_lane0_72=0x8 +serdes_driver_current_lane1_72=0x8 +serdes_driver_current_lane2_72=0x8 +serdes_driver_current_lane3_72=0x8 +serdes_driver_current_lane0_76=0x8 +serdes_driver_current_lane1_76=0x8 +serdes_driver_current_lane2_76=0x8 +serdes_driver_current_lane3_76=0x8 +serdes_driver_current_lane0_80=0x8 +serdes_driver_current_lane1_80=0x8 +serdes_driver_current_lane2_80=0x8 +serdes_driver_current_lane3_80=0x8 +serdes_driver_current_lane0_84=0x8 +serdes_driver_current_lane1_84=0x8 +serdes_driver_current_lane2_84=0x8 +serdes_driver_current_lane3_84=0x8 +serdes_driver_current_lane0_88=0x8 +serdes_driver_current_lane1_88=0x8 +serdes_driver_current_lane2_88=0x8 +serdes_driver_current_lane3_88=0x8 +serdes_driver_current_lane0_92=0x8 +serdes_driver_current_lane1_92=0x8 +serdes_driver_current_lane2_92=0x8 +serdes_driver_current_lane3_92=0x8 +serdes_driver_current_lane0_96=0x8 +serdes_driver_current_lane1_96=0x8 +serdes_driver_current_lane2_96=0x8 +serdes_driver_current_lane3_96=0x8 +serdes_driver_current_lane0_102=0x8 +serdes_driver_current_lane1_102=0x8 +serdes_driver_current_lane2_102=0x8 +serdes_driver_current_lane3_102=0x8 +serdes_driver_current_lane0_106=0x8 +serdes_driver_current_lane1_106=0x8 +serdes_driver_current_lane2_106=0x8 +serdes_driver_current_lane3_106=0x8 +serdes_driver_current_lane0_110=0x8 +serdes_driver_current_lane1_110=0x8 +serdes_driver_current_lane2_110=0x8 +serdes_driver_current_lane3_110=0x8 +serdes_driver_current_lane0_114=0x8 +serdes_driver_current_lane1_114=0x8 +serdes_driver_current_lane2_114=0x8 +serdes_driver_current_lane3_114=0x8 +serdes_driver_current_lane0_118=0x8 +serdes_driver_current_lane1_118=0x8 +serdes_driver_current_lane2_118=0x8 +serdes_driver_current_lane3_118=0x8 +serdes_driver_current_lane0_122=0x8 +serdes_driver_current_lane1_122=0x8 +serdes_driver_current_lane2_122=0x8 +serdes_driver_current_lane3_122=0x8 +serdes_driver_current_lane0_126=0x8 +serdes_driver_current_lane1_126=0x8 +serdes_driver_current_lane2_126=0x8 +serdes_driver_current_lane3_126=0x8 +serdes_driver_current_lane0_130=0x8 +serdes_driver_current_lane1_130=0x8 +serdes_driver_current_lane2_130=0x8 +serdes_driver_current_lane3_130=0x8 + +#Preemphasis +serdes_preemphasis_lane0_1=0x264204 +serdes_preemphasis_lane1_1=0x264204 +serdes_preemphasis_lane2_1=0x264204 +serdes_preemphasis_lane3_1=0x264204 +serdes_preemphasis_lane0_5=0x224406 +serdes_preemphasis_lane1_5=0x224406 +serdes_preemphasis_lane2_5=0x264204 +serdes_preemphasis_lane3_5=0x244206 +serdes_preemphasis_lane0_9=0x204606 +serdes_preemphasis_lane1_9=0x264204 +serdes_preemphasis_lane2_9=0x204606 +serdes_preemphasis_lane3_9=0x224406 +serdes_preemphasis_lane0_13=0x204606 +serdes_preemphasis_lane1_13=0x224406 +serdes_preemphasis_lane2_13=0x224406 +serdes_preemphasis_lane3_13=0x244206 +serdes_preemphasis_lane0_17=0x204606 +serdes_preemphasis_lane1_17=0x204606 +serdes_preemphasis_lane2_17=0x204606 +serdes_preemphasis_lane3_17=0x204606 +serdes_preemphasis_lane0_21=0x204606 +serdes_preemphasis_lane1_21=0x204606 +serdes_preemphasis_lane2_21=0x204606 +serdes_preemphasis_lane3_21=0x224406 +serdes_preemphasis_lane0_25=0x204606 +serdes_preemphasis_lane1_25=0x204606 +serdes_preemphasis_lane2_25=0x204606 +serdes_preemphasis_lane3_25=0x204606 +serdes_preemphasis_lane0_29=0x204606 +serdes_preemphasis_lane1_29=0x204606 +serdes_preemphasis_lane2_29=0x204606 +serdes_preemphasis_lane3_29=0x204606 +serdes_preemphasis_lane0_34=0x284601 +serdes_preemphasis_lane1_34=0x284601 +serdes_preemphasis_lane2_34=0x284601 +serdes_preemphasis_lane3_34=0x284601 +serdes_preemphasis_lane0_38=0x204604 +serdes_preemphasis_lane1_38=0x204604 +serdes_preemphasis_lane2_38=0x224406 +serdes_preemphasis_lane3_38=0x224406 +serdes_preemphasis_lane0_42=0x284601 +serdes_preemphasis_lane1_42=0x294501 +serdes_preemphasis_lane2_42=0x284601 +serdes_preemphasis_lane3_42=0x284601 +serdes_preemphasis_lane0_46=0x204802 +serdes_preemphasis_lane1_46=0x204802 +serdes_preemphasis_lane2_46=0x204802 +serdes_preemphasis_lane3_46=0x204802 +serdes_preemphasis_lane0_50=0x1e4f01 +serdes_preemphasis_lane1_50=0x1e4d01 +serdes_preemphasis_lane2_50=0x1e4f01 +serdes_preemphasis_lane3_50=0x1e4f01 +serdes_preemphasis_lane0_54=0x1f4a03 +serdes_preemphasis_lane1_54=0x1f4a03 +serdes_preemphasis_lane2_54=0x1f4a03 +serdes_preemphasis_lane3_54=0x1f4a03 +serdes_preemphasis_lane0_58=0x1e4f01 +serdes_preemphasis_lane1_58=0x1e4f01 +serdes_preemphasis_lane2_58=0x1e4f01 +serdes_preemphasis_lane3_58=0x1e4f01 +serdes_preemphasis_lane0_62=0x1e4e02 +serdes_preemphasis_lane1_62=0x1e4e02 +serdes_preemphasis_lane2_62=0x1e4e02 +serdes_preemphasis_lane3_62=0x1e4e02 +serdes_preemphasis_lane0_68=0x1e4f01 +serdes_preemphasis_lane1_68=0x1e4f01 +serdes_preemphasis_lane2_68=0x1e4f01 +serdes_preemphasis_lane3_68=0x1e4f01 +serdes_preemphasis_lane0_72=0x1e4e02 +serdes_preemphasis_lane1_72=0x1e4e02 +serdes_preemphasis_lane2_72=0x1e4e02 +serdes_preemphasis_lane3_72=0x1e4e02 +serdes_preemphasis_lane0_76=0x1c4d02 +serdes_preemphasis_lane1_76=0x195002 +serdes_preemphasis_lane2_76=0x195002 +serdes_preemphasis_lane3_76=0x195002 +serdes_preemphasis_lane0_80=0x1e4e02 +serdes_preemphasis_lane1_80=0x1e4e02 +serdes_preemphasis_lane2_80=0x1e4e02 +serdes_preemphasis_lane3_80=0x1e4e02 +serdes_preemphasis_lane0_84=0x234701 +serdes_preemphasis_lane1_84=0x234701 +serdes_preemphasis_lane2_84=0x234701 +serdes_preemphasis_lane3_84=0x234701 +serdes_preemphasis_lane0_88=0x224802 +serdes_preemphasis_lane1_88=0x224602 +serdes_preemphasis_lane2_88=0x224802 +serdes_preemphasis_lane3_88=0x224802 +serdes_preemphasis_lane0_92=0x234801 +serdes_preemphasis_lane1_92=0x244701 +serdes_preemphasis_lane2_92=0x234801 +serdes_preemphasis_lane3_92=0x234601 +serdes_preemphasis_lane0_96=0x204406 +serdes_preemphasis_lane1_96=0x204406 +serdes_preemphasis_lane2_96=0x204406 +serdes_preemphasis_lane3_96=0x224602 +serdes_preemphasis_lane0_102=0x204606 +serdes_preemphasis_lane1_102=0x235002 +serdes_preemphasis_lane2_102=0x204606 +serdes_preemphasis_lane3_102=0x204606 +serdes_preemphasis_lane0_106=0x204606 +serdes_preemphasis_lane1_106=0x204606 +serdes_preemphasis_lane2_106=0x204606 +serdes_preemphasis_lane3_106=0x204606 +serdes_preemphasis_lane0_110=0x204606 +serdes_preemphasis_lane1_110=0x224406 +serdes_preemphasis_lane2_110=0x224406 +serdes_preemphasis_lane3_110=0x224406 +serdes_preemphasis_lane0_114=0x224406 +serdes_preemphasis_lane1_114=0x204606 +serdes_preemphasis_lane2_114=0x204606 +serdes_preemphasis_lane3_114=0x224406 +serdes_preemphasis_lane0_118=0x224406 +serdes_preemphasis_lane1_118=0x224406 +serdes_preemphasis_lane2_118=0x224406 +serdes_preemphasis_lane3_118=0x224406 +serdes_preemphasis_lane0_122=0x244404 +serdes_preemphasis_lane1_122=0x244404 +serdes_preemphasis_lane2_122=0x244404 +serdes_preemphasis_lane3_122=0x244404 +serdes_preemphasis_lane0_126=0x234504 +serdes_preemphasis_lane1_126=0x234404 +serdes_preemphasis_lane2_126=0x224406 +serdes_preemphasis_lane3_126=0x224406 +serdes_preemphasis_lane0_130=0x244404 +serdes_preemphasis_lane1_130=0x244404 +serdes_preemphasis_lane2_130=0x234504 +serdes_preemphasis_lane3_130=0x264501 diff --git a/device/accton/x86_64-accton_as7716_32x-r0/default_sku b/device/accton/x86_64-accton_as7716_32x-r0/default_sku new file mode 100644 index 00000000000..4cd528a50e9 --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32x-r0/default_sku @@ -0,0 +1 @@ +Accton-AS7716-32X t1 diff --git a/device/accton/x86_64-accton_as7716_32x-r0/installer.conf b/device/accton/x86_64-accton_as7716_32x-r0/installer.conf new file mode 100644 index 00000000000..d97e3195e8f --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32x-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tg3.short_preamble=1 tg3.bcm5718s_reset=1" diff --git a/device/accton/x86_64-accton_as7716_32x-r0/led_proc_init.soc b/device/accton/x86_64-accton_as7716_32x-r0/led_proc_init.soc new file mode 100755 index 00000000000..719cb777719 --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32x-r0/led_proc_init.soc @@ -0,0 +1,41 @@ +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=31 REMAP_PORT_1=30 REMAP_PORT_2=29 REMAP_PORT_3=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=27 REMAP_PORT_5=26 REMAP_PORT_6=25 REMAP_PORT_7=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=23 REMAP_PORT_9=22 REMAP_PORT_10=21 REMAP_PORT_11=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=19 REMAP_PORT_13=18 REMAP_PORT_14=17 REMAP_PORT_15=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=63 REMAP_PORT_17=62 REMAP_PORT_18=61 REMAP_PORT_19=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=59 REMAP_PORT_21=58 REMAP_PORT_22=57 REMAP_PORT_23=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=55 REMAP_PORT_25=54 REMAP_PORT_26=53 REMAP_PORT_27=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=51 REMAP_PORT_29=50 REMAP_PORT_30=49 REMAP_PORT_31=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=47 REMAP_PORT_33=46 REMAP_PORT_34=45 REMAP_PORT_35=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=43 REMAP_PORT_37=42 REMAP_PORT_38=41 REMAP_PORT_39=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=39 REMAP_PORT_41=38 REMAP_PORT_42=37 REMAP_PORT_43=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=35 REMAP_PORT_45=34 REMAP_PORT_46=33 REMAP_PORT_47=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 REMAP_PORT_49=14 REMAP_PORT_50=13 REMAP_PORT_51=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 REMAP_PORT_53=10 REMAP_PORT_54=9 REMAP_PORT_55=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 + +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=35 REMAP_PORT_1=34 REMAP_PORT_2=33 REMAP_PORT_3=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=39 REMAP_PORT_5=38 REMAP_PORT_6=37 REMAP_PORT_7=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=43 REMAP_PORT_9=42 REMAP_PORT_10=41 REMAP_PORT_11=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=47 REMAP_PORT_13=46 REMAP_PORT_14=45 REMAP_PORT_15=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=3 REMAP_PORT_17=2 REMAP_PORT_18=1 REMAP_PORT_19=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=7 REMAP_PORT_21=6 REMAP_PORT_22=5 REMAP_PORT_23=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=11 REMAP_PORT_25=10 REMAP_PORT_26=9 REMAP_PORT_27=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=15 REMAP_PORT_29=14 REMAP_PORT_30=13 REMAP_PORT_31=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=19 REMAP_PORT_33=18 REMAP_PORT_34=17 REMAP_PORT_35=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=23 REMAP_PORT_37=22 REMAP_PORT_38=21 REMAP_PORT_39=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=27 REMAP_PORT_41=26 REMAP_PORT_42=25 REMAP_PORT_43=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=31 REMAP_PORT_45=30 REMAP_PORT_46=29 REMAP_PORT_47=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 REMAP_PORT_49=50 REMAP_PORT_50=49 REMAP_PORT_51=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 REMAP_PORT_53=54 REMAP_PORT_54=53 REMAP_PORT_55=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 REMAP_PORT_57=58 REMAP_PORT_58=57 REMAP_PORT_59=56 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=62 REMAP_PORT_62=61 REMAP_PORT_63=60 + +led 0 prog 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 E0 02 FB 42 40 06 F9 D2 00 74 1E 02 F9 42 03 67 AC 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 84 67 98 57 80 18 71 EB 67 98 67 84 57 67 84 67 84 57 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 0 start + +led 1 prog 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 E0 02 FB 42 40 06 F9 D2 00 74 1E 02 F9 42 03 67 AC 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 84 67 98 57 80 18 71 EB 67 98 67 84 57 67 84 67 84 57 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 1 start + +led auto on \ No newline at end of file diff --git a/device/accton/x86_64-accton_as7716_32x-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as7716_32x-r0/plugins/eeprom.py new file mode 100755 index 00000000000..c0122e65844 --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32x-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0056/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as7716_32x-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as7716_32x-r0/plugins/psuutil.py new file mode 100755 index 00000000000..d8fddc23550 --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32x-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 1: "18-0053", + 2: "17-0050", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as7716_32x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7716_32x-r0/plugins/sfputil.py new file mode 100755 index 00000000000..96637e85a0f --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32x-r0/plugins/sfputil.py @@ -0,0 +1,245 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) +#from xcvrd +SFP_STATUS_REMOVED = '0' +SFP_STATUS_INSERTED = '1' + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 32 + PORTS_IN_BLOCK = 32 + + BASE_OOM_PATH = "/sys/bus/i2c/devices/{0}-0050/" + BASE_CPLD_PATH = "/sys/bus/i2c/devices/11-0060/" + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 1: 29, + 2: 30, + 3: 31, + 4: 32, + 5: 34, + 6: 33, + 7: 36, + 8: 35, + 9: 25, + 10: 26, + 11: 27, + 12: 28, + 13: 37, + 14: 38, + 15: 39, + 16: 40, + 17: 41, + 18: 42, + 19: 43, + 20: 44, + 21: 53, + 22: 54, + 23: 55, + 24: 56, + 25: 45, + 26: 46, + 27: 47, + 28: 48, + 29: 49, + 30: 50, + 31: 51, + 32: 52, + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = self.BASE_OOM_PATH + "eeprom" + + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x] + ) + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + present_path = self.BASE_CPLD_PATH + "module_present_" + str(port_num) + self.__port_to_is_present = present_path + + try: + val_file = open(self.__port_to_is_present) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False + + eeprom = open(self.port_to_eeprom_mapping[port_num], "rb") + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if ((lpmode & 0x3) == 0x3): + return True # Low Power Mode if "Power override" bit is 1 and "Power set" bit is 1 + else: + return False # High Power Mode if one of the following conditions is matched: + # 1. "Power override" bit is 0 + # 2. "Power override" bit is 1 and "Power set" bit is 0 + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b") + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def reset(self, port_num): + if port_num < self.port_start or port_num > self.port_end: + return False + + mod_rst_path = self.BASE_CPLD_PATH + "module_reset_" + str(port_num) + self.__port_to_mod_rst = mod_rst_path + try: + reg_file = open(self.__port_to_mod_rst, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = '1' + + reg_file.write(reg_value) + reg_file.close() + + return True + + @property + def _get_present_bitmap(self): + nodes = [] + + nodes.append(self.BASE_CPLD_PATH + "module_present_all") + bitmap = "" + for node in nodes: + try: + reg_file = open(node) + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + bitmap += reg_file.readline().rstrip() + " " + reg_file.close() + + rev = bitmap.split(" ") + rev = "".join(rev[::-1]) + return int(rev,16) + + data = {'valid':0, 'last':0, 'present':0} + def get_transceiver_change_event(self, timeout=2000): + now = time.time() + port_dict = {} + port = 0 + + if timeout < 1000: + timeout = 1000 + timeout = (timeout) / float(1000) # Convert to secs + + if now < (self.data['last'] + timeout) and self.data['valid']: + return True, {} + + reg_value = self._get_present_bitmap + changed_ports = self.data['present'] ^ reg_value + if changed_ports: + for port in range (self.port_start, self.port_end+1): + # Mask off the bit corresponding to our port + mask = (1 << (port - 1)) + if changed_ports & mask: + if (reg_value & mask) == 0: + port_dict[port] = SFP_STATUS_REMOVED + else: + port_dict[port] = SFP_STATUS_INSERTED + + # Update cache + self.data['present'] = reg_value + self.data['last'] = now + self.data['valid'] = 1 + return True, port_dict + else: + return True, {} + return False, {} + diff --git a/device/accton/x86_64-accton_as7716_32x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7716_32x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7716_32xb-r0/Accton-AS7716-32XB/port_config.ini b/device/accton/x86_64-accton_as7716_32xb-r0/Accton-AS7716-32XB/port_config.ini new file mode 100755 index 00000000000..1fa6d21d960 --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32xb-r0/Accton-AS7716-32XB/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias +Ethernet0 49,50,51,52 hundredGigE1 +Ethernet4 53,54,55,56 hundredGigE2 +Ethernet8 57,58,59,60 hundredGigE3 +Ethernet12 61,62,63,64 hundredGigE4 +Ethernet16 65,66,67,68 hundredGigE5 +Ethernet20 69,70,71,72 hundredGigE6 +Ethernet24 73,74,75,76 hundredGigE7 +Ethernet28 77,78,79,80 hundredGigE8 +Ethernet32 33,34,35,36 hundredGigE9 +Ethernet36 37,38,39,40 hundredGigE10 +Ethernet40 41,42,43,44 hundredGigE11 +Ethernet44 45,46,47,48 hundredGigE12 +Ethernet48 81,82,83,84 hundredGigE13 +Ethernet52 85,86,87,88 hundredGigE14 +Ethernet56 89,90,91,92 hundredGigE15 +Ethernet60 93,94,95,96 hundredGigE16 +Ethernet64 97,98,99,100 hundredGigE17 +Ethernet68 101,102,103,104 hundredGigE18 +Ethernet72 105,106,107,108 hundredGigE19 +Ethernet76 109,110,111,112 hundredGigE20 +Ethernet80 17,18,19,20 hundredGigE21 +Ethernet84 21,22,23,24 hundredGigE22 +Ethernet88 25,26,27,28 hundredGigE23 +Ethernet92 29,30,31,32 hundredGigE24 +Ethernet96 113,114,115,116 hundredGigE25 +Ethernet100 117,118,119,120 hundredGigE26 +Ethernet104 121,122,123,124 hundredGigE27 +Ethernet108 125,126,127,128 hundredGigE28 +Ethernet112 1,2,3,4 hundredGigE29 +Ethernet116 5,6,7,8 hundredGigE30 +Ethernet120 9,10,11,12 hundredGigE31 +Ethernet124 13,14,15,16 hundredGigE32 diff --git a/device/accton/x86_64-accton_as7716_32xb-r0/Accton-AS7716-32XB/sai.profile b/device/accton/x86_64-accton_as7716_32xb-r0/Accton-AS7716-32XB/sai.profile new file mode 100755 index 00000000000..65944732653 --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32xb-r0/Accton-AS7716-32XB/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-as7716-32x100G.config.bcm diff --git a/device/accton/x86_64-accton_as7716_32xb-r0/Accton-AS7716-32XB/th-as7716-32x100G.config.bcm b/device/accton/x86_64-accton_as7716_32xb-r0/Accton-AS7716-32XB/th-as7716-32x100G.config.bcm new file mode 100644 index 00000000000..1231bf302be --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32xb-r0/Accton-AS7716-32XB/th-as7716-32x100G.config.bcm @@ -0,0 +1,570 @@ +# accton_as7716_32x 32x100G SDK config +os=unix +schan_intr_enable=0 +l2_mem_entries=40960 +l2xmsg_mode=1 +l3_mem_entries=40960 +parity_correction=0 +parity_enable=0 +mmu_lossless=1 + +pbmp_oversubscribe=0x444444441111111104444444422222222 +pbmp_xport_xe=0x444444451111111144444444422222222 + +# +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=8 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +dma_desc_timeout_usec=15000000 +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +max_vp_lags=0 +miim_intr_enable=0 +oversubscribe_mode=1 + +# portmap_0=x:xx +#FC0 +portmap_1=1:100 + +#FC1 +portmap_5=5:100 + +#FC2 +portmap_9=9:100 + +#FC3 +portmap_13=13:100 + +#FC4 +portmap_17=17:100 + +#FC5 +portmap_21=21:100 + +#FC6 +portmap_25=25:100 + +#FC7 +portmap_29=29:100 + +# Tile-1 +#FC8 +portmap_34=33:100 + +#FC9 +portmap_38=37:100 + +#FC10 +portmap_42=41:100 + +#FC11 +portmap_46=45:100 + +#FC12 +portmap_50=49:100 + +#FC13 +portmap_54=53:100 + +#FC14 +portmap_58=57:100 + +#FC15 +portmap_62=61:100 + +#TSC-E Management port 1 +#portmap_66=129:10 +#portmap_67=133:10 + +# Tile-2 +#FC16 +portmap_68=65:100 + +#FC17 +portmap_72=69:100 + +#FC18 +portmap_76=73:100 + +#FC19 +portmap_80=77:100 + +#FC20 +portmap_84=81:100 + +#FC21 +portmap_88=85:100 + +#FC22 +portmap_92=89:100 + +#FC23 +portmap_96=93:100 + +#TSC-E Management port 2 +#portmap_100=131:10 +#portmap_101=134:10 + +# Tile-3 +#FC24 +portmap_102=97:100 + +#FC25 +portmap_106=101:100 + +#FC26 +portmap_110=105:100 + +#FC27 +portmap_114=109:100 + +#FC28 +portmap_118=113:100 + +#FC29 +portmap_122=117:100 + +#FC30 +portmap_126=121:100 + +#FC31 +portmap_130=125:100 + + + +## TX/RX Lane Swap +######### +# port5 # +# FC16 # +######### +xgxs_tx_lane_map_68=0x0123 +xgxs_rx_lane_map_68=0x0123 + +######### +# port8 # +# FC19 # +######### +xgxs_tx_lane_map_80=0x0123 +xgxs_rx_lane_map_80=0x0123 + +######### +# port13# +# FC20 # +######### +xgxs_tx_lane_map_84=0x1032 +xgxs_rx_lane_map_84=0x1032 + +######### +# port14# +# FC21 # +######### +xgxs_tx_lane_map_88=0x0123 +xgxs_rx_lane_map_88=0x0123 + +######### +# port15# +# FC22 # +######### +xgxs_tx_lane_map_92=0x1032 +xgxs_rx_lane_map_92=0x1032 + +######### +# port17# +# FC24 # +######### +xgxs_tx_lane_map_102=0x1032 +xgxs_rx_lane_map_102=0x1032 + +######### +# port18# +# FC25 # +######### +xgxs_tx_lane_map_106=0x0123 +xgxs_rx_lane_map_106=0x0123 + +######### +# port19# +# FC26 # +######### +xgxs_tx_lane_map_110=0x1032 +xgxs_rx_lane_map_110=0x1032 + +######### +# port20# +# FC27 # +######### +xgxs_tx_lane_map_114=0x0123 +xgxs_rx_lane_map_114=0x0123 + +######### +# port26# +# FC29 # +######### +xgxs_tx_lane_map_122=0x0123 +xgxs_rx_lane_map_122=0x0123 + +######### +# port27# +# FC30 # +######### +xgxs_tx_lane_map_126=0x0123 +xgxs_rx_lane_map_126=0x0123 + +######### +# port29# +# FC0 # +######### +xgxs_tx_lane_map_1=0x0123 +xgxs_rx_lane_map_1=0x0123 + +# port30# +# FC1 # +######### +xgxs_tx_lane_map_5=0x0123 +xgxs_rx_lane_map_5=0x0123 + +######### +# port31# +# FC2 # +######### +xgxs_tx_lane_map_9=0x0123 +xgxs_rx_lane_map_9=0x0123 + +######### +# port32# +# FC3 # +######### +xgxs_tx_lane_map_13=0x0123 +xgxs_rx_lane_map_13=0x0123 + + +## RX / TX Serdes lane polarity flip list +## RX / TX Serdes lane polarity flip list +######### +# FC4 # +# port21 # +######### +phy_xaui_tx_polarity_flip_17=0xf + +######### +# FC20 # +# port13 # +######### +phy_xaui_rx_polarity_flip_84=0xf +phy_xaui_tx_polarity_flip_84=0x6 + +######### +# FC21 # +# port14 # +######### +phy_xaui_rx_polarity_flip_88=0xf + +######### +# FC22 # +# port15 # +######### +phy_xaui_rx_polarity_flip_92=0xf +phy_xaui_tx_polarity_flip_92=0xe + + +######### +# FC23 # +# port16 # +######### +phy_xaui_tx_polarity_flip_96=0x1 + +######### +# FC24 # +# port17 # +######### +phy_xaui_tx_polarity_flip_102=0x1 + + +######### +# FC25 # +# port18 # +######### +phy_xaui_rx_polarity_flip_106=0xf + +######### +# FC26 # +# port19 # +######### +phy_xaui_tx_polarity_flip_110=0xe + +######### +# FC27 # +# port20 # +######### +phy_xaui_rx_polarity_flip_114=0x2 + +######### +# FC28 # +# port25 # +######### +phy_xaui_rx_polarity_flip_118=0xa +phy_xaui_tx_polarity_flip_118=0xf + +#Driver Current +serdes_driver_current_lane0_1=0x8 +serdes_driver_current_lane1_1=0x8 +serdes_driver_current_lane2_1=0x8 +serdes_driver_current_lane3_1=0x8 +serdes_driver_current_lane0_5=0x8 +serdes_driver_current_lane1_5=0x8 +serdes_driver_current_lane2_5=0x8 +serdes_driver_current_lane3_5=0x8 +serdes_driver_current_lane0_9=0x8 +serdes_driver_current_lane1_9=0x8 +serdes_driver_current_lane2_9=0x8 +serdes_driver_current_lane3_9=0x8 +serdes_driver_current_lane0_13=0x8 +serdes_driver_current_lane1_13=0x8 +serdes_driver_current_lane2_13=0x8 +serdes_driver_current_lane3_13=0x8 +serdes_driver_current_lane0_17=0x8 +serdes_driver_current_lane1_17=0x8 +serdes_driver_current_lane2_17=0x8 +serdes_driver_current_lane3_17=0x8 +serdes_driver_current_lane0_21=0x8 +serdes_driver_current_lane1_21=0x8 +serdes_driver_current_lane2_21=0x8 +serdes_driver_current_lane3_21=0x8 +serdes_driver_current_lane0_25=0x8 +serdes_driver_current_lane1_25=0x8 +serdes_driver_current_lane2_25=0x8 +serdes_driver_current_lane3_25=0x8 +serdes_driver_current_lane0_29=0x8 +serdes_driver_current_lane1_29=0x8 +serdes_driver_current_lane2_29=0x8 +serdes_driver_current_lane3_29=0x8 +serdes_driver_current_lane0_34=0x8 +serdes_driver_current_lane1_34=0x8 +serdes_driver_current_lane2_34=0x8 +serdes_driver_current_lane3_34=0x8 +serdes_driver_current_lane0_38=0x8 +serdes_driver_current_lane1_38=0x8 +serdes_driver_current_lane2_38=0x8 +serdes_driver_current_lane3_38=0x8 +serdes_driver_current_lane0_42=0x8 +serdes_driver_current_lane1_42=0x8 +serdes_driver_current_lane2_42=0x8 +serdes_driver_current_lane3_42=0x8 +serdes_driver_current_lane0_46=0x8 +serdes_driver_current_lane1_46=0x8 +serdes_driver_current_lane2_46=0x8 +serdes_driver_current_lane3_46=0x8 +serdes_driver_current_lane0_50=0x8 +serdes_driver_current_lane1_50=0x8 +serdes_driver_current_lane2_50=0x8 +serdes_driver_current_lane3_50=0x8 +serdes_driver_current_lane0_54=0x8 +serdes_driver_current_lane1_54=0x8 +serdes_driver_current_lane2_54=0x8 +serdes_driver_current_lane3_54=0x8 +serdes_driver_current_lane0_58=0x8 +serdes_driver_current_lane1_58=0x8 +serdes_driver_current_lane2_58=0x8 +serdes_driver_current_lane3_58=0x8 +serdes_driver_current_lane0_62=0x8 +serdes_driver_current_lane1_62=0x8 +serdes_driver_current_lane2_62=0x8 +serdes_driver_current_lane3_62=0x8 +serdes_driver_current_lane0_68=0x8 +serdes_driver_current_lane1_68=0x8 +serdes_driver_current_lane2_68=0x8 +serdes_driver_current_lane3_68=0x8 +serdes_driver_current_lane0_72=0x8 +serdes_driver_current_lane1_72=0x8 +serdes_driver_current_lane2_72=0x8 +serdes_driver_current_lane3_72=0x8 +serdes_driver_current_lane0_76=0x8 +serdes_driver_current_lane1_76=0x8 +serdes_driver_current_lane2_76=0x8 +serdes_driver_current_lane3_76=0x8 +serdes_driver_current_lane0_80=0x8 +serdes_driver_current_lane1_80=0x8 +serdes_driver_current_lane2_80=0x8 +serdes_driver_current_lane3_80=0x8 +serdes_driver_current_lane0_84=0x8 +serdes_driver_current_lane1_84=0x8 +serdes_driver_current_lane2_84=0x8 +serdes_driver_current_lane3_84=0x8 +serdes_driver_current_lane0_88=0x8 +serdes_driver_current_lane1_88=0x8 +serdes_driver_current_lane2_88=0x8 +serdes_driver_current_lane3_88=0x8 +serdes_driver_current_lane0_92=0x8 +serdes_driver_current_lane1_92=0x8 +serdes_driver_current_lane2_92=0x8 +serdes_driver_current_lane3_92=0x8 +serdes_driver_current_lane0_96=0x8 +serdes_driver_current_lane1_96=0x8 +serdes_driver_current_lane2_96=0x8 +serdes_driver_current_lane3_96=0x8 +serdes_driver_current_lane0_102=0x8 +serdes_driver_current_lane1_102=0x8 +serdes_driver_current_lane2_102=0x8 +serdes_driver_current_lane3_102=0x8 +serdes_driver_current_lane0_106=0x8 +serdes_driver_current_lane1_106=0x8 +serdes_driver_current_lane2_106=0x8 +serdes_driver_current_lane3_106=0x8 +serdes_driver_current_lane0_110=0x8 +serdes_driver_current_lane1_110=0x8 +serdes_driver_current_lane2_110=0x8 +serdes_driver_current_lane3_110=0x8 +serdes_driver_current_lane0_114=0x8 +serdes_driver_current_lane1_114=0x8 +serdes_driver_current_lane2_114=0x8 +serdes_driver_current_lane3_114=0x8 +serdes_driver_current_lane0_118=0x8 +serdes_driver_current_lane1_118=0x8 +serdes_driver_current_lane2_118=0x8 +serdes_driver_current_lane3_118=0x8 +serdes_driver_current_lane0_122=0x8 +serdes_driver_current_lane1_122=0x8 +serdes_driver_current_lane2_122=0x8 +serdes_driver_current_lane3_122=0x8 +serdes_driver_current_lane0_126=0x8 +serdes_driver_current_lane1_126=0x8 +serdes_driver_current_lane2_126=0x8 +serdes_driver_current_lane3_126=0x8 +serdes_driver_current_lane0_130=0x8 +serdes_driver_current_lane1_130=0x8 +serdes_driver_current_lane2_130=0x8 +serdes_driver_current_lane3_130=0x8 + +#Preemphasis +serdes_preemphasis_lane0_1=0x264204 +serdes_preemphasis_lane1_1=0x264204 +serdes_preemphasis_lane2_1=0x264204 +serdes_preemphasis_lane3_1=0x264204 +serdes_preemphasis_lane0_5=0x224406 +serdes_preemphasis_lane1_5=0x224406 +serdes_preemphasis_lane2_5=0x264204 +serdes_preemphasis_lane3_5=0x244206 +serdes_preemphasis_lane0_9=0x204606 +serdes_preemphasis_lane1_9=0x264204 +serdes_preemphasis_lane2_9=0x204606 +serdes_preemphasis_lane3_9=0x224406 +serdes_preemphasis_lane0_13=0x204606 +serdes_preemphasis_lane1_13=0x224406 +serdes_preemphasis_lane2_13=0x224406 +serdes_preemphasis_lane3_13=0x244206 +serdes_preemphasis_lane0_17=0x204606 +serdes_preemphasis_lane1_17=0x204606 +serdes_preemphasis_lane2_17=0x204606 +serdes_preemphasis_lane3_17=0x204606 +serdes_preemphasis_lane0_21=0x204606 +serdes_preemphasis_lane1_21=0x204606 +serdes_preemphasis_lane2_21=0x204606 +serdes_preemphasis_lane3_21=0x224406 +serdes_preemphasis_lane0_25=0x204606 +serdes_preemphasis_lane1_25=0x204606 +serdes_preemphasis_lane2_25=0x204606 +serdes_preemphasis_lane3_25=0x204606 +serdes_preemphasis_lane0_29=0x204606 +serdes_preemphasis_lane1_29=0x204606 +serdes_preemphasis_lane2_29=0x204606 +serdes_preemphasis_lane3_29=0x204606 +serdes_preemphasis_lane0_34=0x284601 +serdes_preemphasis_lane1_34=0x284601 +serdes_preemphasis_lane2_34=0x284601 +serdes_preemphasis_lane3_34=0x284601 +serdes_preemphasis_lane0_38=0x204604 +serdes_preemphasis_lane1_38=0x204604 +serdes_preemphasis_lane2_38=0x224406 +serdes_preemphasis_lane3_38=0x224406 +serdes_preemphasis_lane0_42=0x284601 +serdes_preemphasis_lane1_42=0x294501 +serdes_preemphasis_lane2_42=0x284601 +serdes_preemphasis_lane3_42=0x284601 +serdes_preemphasis_lane0_46=0x204802 +serdes_preemphasis_lane1_46=0x204802 +serdes_preemphasis_lane2_46=0x204802 +serdes_preemphasis_lane3_46=0x204802 +serdes_preemphasis_lane0_50=0x1e4f01 +serdes_preemphasis_lane1_50=0x1e4d01 +serdes_preemphasis_lane2_50=0x1e4f01 +serdes_preemphasis_lane3_50=0x1e4f01 +serdes_preemphasis_lane0_54=0x1f4a03 +serdes_preemphasis_lane1_54=0x1f4a03 +serdes_preemphasis_lane2_54=0x1f4a03 +serdes_preemphasis_lane3_54=0x1f4a03 +serdes_preemphasis_lane0_58=0x1e4f01 +serdes_preemphasis_lane1_58=0x1e4f01 +serdes_preemphasis_lane2_58=0x1e4f01 +serdes_preemphasis_lane3_58=0x1e4f01 +serdes_preemphasis_lane0_62=0x1e4e02 +serdes_preemphasis_lane1_62=0x1e4e02 +serdes_preemphasis_lane2_62=0x1e4e02 +serdes_preemphasis_lane3_62=0x1e4e02 +serdes_preemphasis_lane0_68=0x1e4f01 +serdes_preemphasis_lane1_68=0x1e4f01 +serdes_preemphasis_lane2_68=0x1e4f01 +serdes_preemphasis_lane3_68=0x1e4f01 +serdes_preemphasis_lane0_72=0x1e4e02 +serdes_preemphasis_lane1_72=0x1e4e02 +serdes_preemphasis_lane2_72=0x1e4e02 +serdes_preemphasis_lane3_72=0x1e4e02 +serdes_preemphasis_lane0_76=0x1c4d02 +serdes_preemphasis_lane1_76=0x195002 +serdes_preemphasis_lane2_76=0x195002 +serdes_preemphasis_lane3_76=0x195002 +serdes_preemphasis_lane0_80=0x1e4e02 +serdes_preemphasis_lane1_80=0x1e4e02 +serdes_preemphasis_lane2_80=0x1e4e02 +serdes_preemphasis_lane3_80=0x1e4e02 +serdes_preemphasis_lane0_84=0x234701 +serdes_preemphasis_lane1_84=0x234701 +serdes_preemphasis_lane2_84=0x234701 +serdes_preemphasis_lane3_84=0x234701 +serdes_preemphasis_lane0_88=0x224802 +serdes_preemphasis_lane1_88=0x224602 +serdes_preemphasis_lane2_88=0x224802 +serdes_preemphasis_lane3_88=0x224802 +serdes_preemphasis_lane0_92=0x234801 +serdes_preemphasis_lane1_92=0x244701 +serdes_preemphasis_lane2_92=0x234801 +serdes_preemphasis_lane3_92=0x234601 +serdes_preemphasis_lane0_96=0x204406 +serdes_preemphasis_lane1_96=0x204406 +serdes_preemphasis_lane2_96=0x204406 +serdes_preemphasis_lane3_96=0x224602 +serdes_preemphasis_lane0_102=0x204606 +serdes_preemphasis_lane1_102=0x235002 +serdes_preemphasis_lane2_102=0x204606 +serdes_preemphasis_lane3_102=0x204606 +serdes_preemphasis_lane0_106=0x204606 +serdes_preemphasis_lane1_106=0x204606 +serdes_preemphasis_lane2_106=0x204606 +serdes_preemphasis_lane3_106=0x204606 +serdes_preemphasis_lane0_110=0x204606 +serdes_preemphasis_lane1_110=0x224406 +serdes_preemphasis_lane2_110=0x224406 +serdes_preemphasis_lane3_110=0x224406 +serdes_preemphasis_lane0_114=0x224406 +serdes_preemphasis_lane1_114=0x204606 +serdes_preemphasis_lane2_114=0x204606 +serdes_preemphasis_lane3_114=0x224406 +serdes_preemphasis_lane0_118=0x224406 +serdes_preemphasis_lane1_118=0x224406 +serdes_preemphasis_lane2_118=0x224406 +serdes_preemphasis_lane3_118=0x224406 +serdes_preemphasis_lane0_122=0x244404 +serdes_preemphasis_lane1_122=0x244404 +serdes_preemphasis_lane2_122=0x244404 +serdes_preemphasis_lane3_122=0x244404 +serdes_preemphasis_lane0_126=0x234504 +serdes_preemphasis_lane1_126=0x234404 +serdes_preemphasis_lane2_126=0x224406 +serdes_preemphasis_lane3_126=0x224406 +serdes_preemphasis_lane0_130=0x244404 +serdes_preemphasis_lane1_130=0x244404 +serdes_preemphasis_lane2_130=0x234504 +serdes_preemphasis_lane3_130=0x264501 diff --git a/device/accton/x86_64-accton_as7716_32xb-r0/default_sku b/device/accton/x86_64-accton_as7716_32xb-r0/default_sku new file mode 100644 index 00000000000..973e749a1fc --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32xb-r0/default_sku @@ -0,0 +1 @@ +Accton-AS7716-32XB t1 diff --git a/device/accton/x86_64-accton_as7716_32xb-r0/installer.conf b/device/accton/x86_64-accton_as7716_32xb-r0/installer.conf new file mode 100755 index 00000000000..d97e3195e8f --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32xb-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tg3.short_preamble=1 tg3.bcm5718s_reset=1" diff --git a/device/accton/x86_64-accton_as7716_32xb-r0/led_proc_init.soc b/device/accton/x86_64-accton_as7716_32xb-r0/led_proc_init.soc new file mode 100755 index 00000000000..719cb777719 --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32xb-r0/led_proc_init.soc @@ -0,0 +1,41 @@ +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=31 REMAP_PORT_1=30 REMAP_PORT_2=29 REMAP_PORT_3=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=27 REMAP_PORT_5=26 REMAP_PORT_6=25 REMAP_PORT_7=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=23 REMAP_PORT_9=22 REMAP_PORT_10=21 REMAP_PORT_11=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=19 REMAP_PORT_13=18 REMAP_PORT_14=17 REMAP_PORT_15=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=63 REMAP_PORT_17=62 REMAP_PORT_18=61 REMAP_PORT_19=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=59 REMAP_PORT_21=58 REMAP_PORT_22=57 REMAP_PORT_23=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=55 REMAP_PORT_25=54 REMAP_PORT_26=53 REMAP_PORT_27=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=51 REMAP_PORT_29=50 REMAP_PORT_30=49 REMAP_PORT_31=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=47 REMAP_PORT_33=46 REMAP_PORT_34=45 REMAP_PORT_35=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=43 REMAP_PORT_37=42 REMAP_PORT_38=41 REMAP_PORT_39=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=39 REMAP_PORT_41=38 REMAP_PORT_42=37 REMAP_PORT_43=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=35 REMAP_PORT_45=34 REMAP_PORT_46=33 REMAP_PORT_47=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 REMAP_PORT_49=14 REMAP_PORT_50=13 REMAP_PORT_51=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 REMAP_PORT_53=10 REMAP_PORT_54=9 REMAP_PORT_55=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 + +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=35 REMAP_PORT_1=34 REMAP_PORT_2=33 REMAP_PORT_3=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=39 REMAP_PORT_5=38 REMAP_PORT_6=37 REMAP_PORT_7=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=43 REMAP_PORT_9=42 REMAP_PORT_10=41 REMAP_PORT_11=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=47 REMAP_PORT_13=46 REMAP_PORT_14=45 REMAP_PORT_15=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=3 REMAP_PORT_17=2 REMAP_PORT_18=1 REMAP_PORT_19=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=7 REMAP_PORT_21=6 REMAP_PORT_22=5 REMAP_PORT_23=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=11 REMAP_PORT_25=10 REMAP_PORT_26=9 REMAP_PORT_27=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=15 REMAP_PORT_29=14 REMAP_PORT_30=13 REMAP_PORT_31=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=19 REMAP_PORT_33=18 REMAP_PORT_34=17 REMAP_PORT_35=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=23 REMAP_PORT_37=22 REMAP_PORT_38=21 REMAP_PORT_39=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=27 REMAP_PORT_41=26 REMAP_PORT_42=25 REMAP_PORT_43=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=31 REMAP_PORT_45=30 REMAP_PORT_46=29 REMAP_PORT_47=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 REMAP_PORT_49=50 REMAP_PORT_50=49 REMAP_PORT_51=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 REMAP_PORT_53=54 REMAP_PORT_54=53 REMAP_PORT_55=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 REMAP_PORT_57=58 REMAP_PORT_58=57 REMAP_PORT_59=56 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=62 REMAP_PORT_62=61 REMAP_PORT_63=60 + +led 0 prog 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 E0 02 FB 42 40 06 F9 D2 00 74 1E 02 F9 42 03 67 AC 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 84 67 98 57 80 18 71 EB 67 98 67 84 57 67 84 67 84 57 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 0 start + +led 1 prog 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 E0 02 FB 42 40 06 F9 D2 00 74 1E 02 F9 42 03 67 AC 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 84 67 98 57 80 18 71 EB 67 98 67 84 57 67 84 67 84 57 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 1 start + +led auto on \ No newline at end of file diff --git a/device/accton/x86_64-accton_as7716_32xb-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as7716_32xb-r0/plugins/eeprom.py new file mode 100755 index 00000000000..6fa5719afba --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32xb-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as7716_32xb-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as7716_32xb-r0/plugins/psuutil.py new file mode 100755 index 00000000000..5a4b0fe83d8 --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32xb-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 1: "0-0053", + 2: "0-0050", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as7716_32xb-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7716_32xb-r0/plugins/sfputil.py new file mode 100755 index 00000000000..b582602fa9b --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32xb-r0/plugins/sfputil.py @@ -0,0 +1,144 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import os + import sys, getopt + import commands + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 31 + PORTS_IN_BLOCK = 32 + + BASE_OOM_PATH = "/sys/bus/i2c/devices/{0}-0050/" + BASE_CPLD_PATH = "/sys/bus/i2c/devices/0-0060/" + BASE_I2C_PATH = "/sys/bus/i2c/devices/" + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 0: [1, 29], + 1: [2, 30], + 2: [3, 31], + 3: [4, 32], + 4: [5, 34], + 5: [6, 33], + 6: [7, 36], + 7: [8, 35], + 8: [9, 25], + 9: [10, 26], + 10: [11, 27], + 11: [12, 28], + 12: [14, 37], + 13: [15, 38], + 14: [16, 39], + 15: [17, 40], + 16: [18, 41], + 17: [19, 42], + 18: [20, 43], + 19: [21, 44], + 20: [22, 53], + 21: [23, 54], + 22: [24, 55], + 23: [25, 56], + 24: [26, 45], + 25: [27, 46], + 26: [28, 47], + 27: [29, 48], + 28: [30, 49], + 29: [31, 50], + 30: [32, 51], + 31: [33, 52], + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + present_path = self.BASE_CPLD_PATH + "module_present_" + str(port_num+1) + self.__port_to_is_present = present_path + + try: + val_file = open(self.__port_to_is_present) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def __init__(self): + eeprom_path = self.BASE_I2C_PATH + + for x in range(0, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x][1] + ) + if(x < 9): + if(self.get_presence(x)==1): + self.port_to_eeprom_mapping[x] = self.BASE_I2C_PATH + "0-000" +str(x+1) + "/eeprom" + + else: + if(self.get_presence(x)==1): + self.port_to_eeprom_mapping[x] = self.BASE_I2C_PATH + "0-00" +str(x+1)+ "/eeprom" + + SfpUtilBase.__init__(self) + + + + def get_low_power_mode(self, port_num): + raise NotImplementedError + + def set_low_power_mode(self, port_num, lpmode): + raise NotImplementedError + + def reset(self, port_num): + if port_num < self.port_start or port_num > self.port_end: + return False + + mod_rst_cmd = "ipmitool raw 0x34 0x11 " + str(port_num+1) + " 0x11 0x1" + (status, output) = commands.getstatusoutput (mod_rst_cmd) + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/accton/x86_64-accton_as7716_32xb-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7716_32xb-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7716_32xb-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7726_32x-r0/Accton-AS7726-32X/port_config.ini b/device/accton/x86_64-accton_as7726_32x-r0/Accton-AS7726-32X/port_config.ini new file mode 100755 index 00000000000..c12f3b3ba27 --- /dev/null +++ b/device/accton/x86_64-accton_as7726_32x-r0/Accton-AS7726-32X/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 1,2,3,4 hundredGigE1 1 100000 +Ethernet4 5,6,7,8 hundredGigE2 2 100000 +Ethernet8 9,10,11,12 hundredGigE3 3 100000 +Ethernet12 13,14,15,16 hundredGigE4 4 100000 +Ethernet16 17,18,19,20 hundredGigE5 5 100000 +Ethernet20 21,22,23,24 hundredGigE6 6 100000 +Ethernet24 25,26,27,28 hundredGigE7 7 100000 +Ethernet28 29,30,31,32 hundredGigE8 8 100000 +Ethernet32 33,34,35,36 hundredGigE9 9 100000 +Ethernet36 37,38,39,40 hundredGigE10 10 100000 +Ethernet40 41,42,43,44 hundredGigE11 11 100000 +Ethernet44 45,46,47,48 hundredGigE12 12 100000 +Ethernet48 49,50,51,52 hundredGigE13 13 100000 +Ethernet52 53,54,55,56 hundredGigE14 14 100000 +Ethernet56 57,58,59,60 hundredGigE15 15 100000 +Ethernet60 61,62,63,64 hundredGigE16 16 100000 +Ethernet64 65,66,67,68 hundredGigE17 17 100000 +Ethernet68 69,70,71,72 hundredGigE18 18 100000 +Ethernet72 73,74,75,76 hundredGigE19 19 100000 +Ethernet76 77,78,79,80 hundredGigE20 20 100000 +Ethernet80 81,82,83,84 hundredGigE21 21 100000 +Ethernet84 85,86,87,88 hundredGigE22 22 100000 +Ethernet88 89,90,91,92 hundredGigE23 23 100000 +Ethernet92 93,94,95,96 hundredGigE24 24 100000 +Ethernet96 97,98,99,100 hundredGigE25 25 100000 +Ethernet100 101,102,103,104 hundredGigE26 26 100000 +Ethernet104 105,106,107,108 hundredGigE27 27 100000 +Ethernet108 109,110,111,112 hundredGigE28 28 100000 +Ethernet112 113,114,115,116 hundredGigE29 29 100000 +Ethernet116 117,118,119,120 hundredGigE30 30 100000 +Ethernet120 121,122,123,124 hundredGigE31 31 100000 +Ethernet124 125,126,127,128 hundredGigE32 32 100000 diff --git a/device/accton/x86_64-accton_as7726_32x-r0/Accton-AS7726-32X/sai.profile b/device/accton/x86_64-accton_as7726_32x-r0/Accton-AS7726-32X/sai.profile new file mode 100644 index 00000000000..46f5cb3bf85 --- /dev/null +++ b/device/accton/x86_64-accton_as7726_32x-r0/Accton-AS7726-32X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/etc/bcm/td3-as7726-32x100G.config.bcm diff --git a/device/accton/x86_64-accton_as7726_32x-r0/Accton-AS7726-32X/td3-as7726-32x100G.config.bcm b/device/accton/x86_64-accton_as7726_32x-r0/Accton-AS7726-32X/td3-as7726-32x100G.config.bcm new file mode 100755 index 00000000000..16cbb8d341e --- /dev/null +++ b/device/accton/x86_64-accton_as7726_32x-r0/Accton-AS7726-32X/td3-as7726-32x100G.config.bcm @@ -0,0 +1,491 @@ +#polarity/lanemap is using TH2 style. +core_clock_frequency=1525 +dpp_clock_ratio=2:3 + +oversubscribe_mode=1 + +pbmp_xport_xe=0x4888888888888888c2222222222222222 + +parity_enable=0 +mem_cache_enable=0 + +l2_mem_entries=32768 +l3_mem_entries=16384 +fpem_mem_entries=131072 +l2xmsg_mode=1 + +# Platform specfic +bcm_num_cos=8 +bcm_stat_interval=2000000 +cdma_timeout_usec=3000000 +ipv6_lpm_128b_enable=0x1 +l3_max_ecmp_mode=1 +#l3_alpm_enable=2 +lpm_scaling_enable=0 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +schan_intr_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 +skip_L2_USER_ENTRY=0 +bcm_tunnel_term_compatible_mode=1 + +phy_an_c73=1 + +dport_map_port_1=1 +dport_map_port_5=2 +dport_map_port_9=3 +dport_map_port_13=4 +dport_map_port_17=5 +dport_map_port_21=6 +dport_map_port_25=7 +dport_map_port_29=8 +dport_map_port_33=9 +dport_map_port_37=10 +dport_map_port_41=11 +dport_map_port_45=12 +dport_map_port_49=13 +dport_map_port_53=14 +dport_map_port_57=15 +dport_map_port_61=16 +dport_map_port_67=17 +dport_map_port_71=18 +dport_map_port_75=19 +dport_map_port_79=20 +dport_map_port_83=21 +dport_map_port_87=22 +dport_map_port_91=23 +dport_map_port_95=24 +dport_map_port_99=25 +dport_map_port_103=26 +dport_map_port_107=27 +dport_map_port_111=28 +dport_map_port_115=29 +dport_map_port_119=30 +dport_map_port_123=31 +dport_map_port_127=32 +dport_map_port_66=33 +dport_map_port_130=34 + +portmap_1=1:100 +portmap_5=5:100 +portmap_9=9:100 +portmap_13=13:100 +portmap_17=17:100 +portmap_21=21:100 +portmap_25=25:100 +portmap_29=29:100 +portmap_33=33:100 +portmap_37=37:100 +portmap_41=41:100 +portmap_45=45:100 +portmap_49=49:100 +portmap_53=53:100 +portmap_57=57:100 +portmap_61=61:100 +portmap_67=65:100 +portmap_71=69:100 +portmap_75=73:100 +portmap_79=77:100 +portmap_83=81:100 +portmap_87=85:100 +portmap_91=89:100 +portmap_95=93:100 +portmap_99=97:100 +portmap_103=101:100 +portmap_107=105:100 +portmap_111=109:100 +portmap_115=113:100 +portmap_119=117:100 +portmap_123=121:100 +portmap_127=125:100 +portmap_66=129:10:m +portmap_130=128:10:m +portmap_65=130:10 +portmap_131=131:10 + +phy_chain_rx_lane_map_physical{1.0}=0x1320 +phy_chain_rx_lane_map_physical{5.0}=0x0123 +phy_chain_rx_lane_map_physical{9.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{25.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1230 +phy_chain_rx_lane_map_physical{33.0}=0x0123 +phy_chain_rx_lane_map_physical{37.0}=0x3210 +phy_chain_rx_lane_map_physical{41.0}=0x0123 +phy_chain_rx_lane_map_physical{45.0}=0x3210 +phy_chain_rx_lane_map_physical{49.0}=0x0213 +phy_chain_rx_lane_map_physical{53.0}=0x1320 +phy_chain_rx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{61.0}=0x0123 +phy_chain_rx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x1032 +phy_chain_rx_lane_map_physical{73.0}=0x3210 +phy_chain_rx_lane_map_physical{77.0}=0x3201 +phy_chain_rx_lane_map_physical{81.0}=0x3120 +phy_chain_rx_lane_map_physical{85.0}=0x0123 +phy_chain_rx_lane_map_physical{89.0}=0x3210 +phy_chain_rx_lane_map_physical{93.0}=0x0123 +phy_chain_rx_lane_map_physical{97.0}=0x3012 +phy_chain_rx_lane_map_physical{101.0}=0x3210 +phy_chain_rx_lane_map_physical{105.0}=0x3210 +phy_chain_rx_lane_map_physical{109.0}=0x3210 +phy_chain_rx_lane_map_physical{113.0}=0x3210 +phy_chain_rx_lane_map_physical{117.0}=0x3210 +phy_chain_rx_lane_map_physical{121.0}=0x3210 +phy_chain_rx_lane_map_physical{125.0}=0x3210 +phy_chain_tx_lane_map_physical{1.0}=0x3210 +phy_chain_tx_lane_map_physical{5.0}=0x3210 +phy_chain_tx_lane_map_physical{9.0}=0x3210 +phy_chain_tx_lane_map_physical{13.0}=0x3210 +phy_chain_tx_lane_map_physical{17.0}=0x3210 +phy_chain_tx_lane_map_physical{21.0}=0x3210 +phy_chain_tx_lane_map_physical{25.0}=0x3210 +phy_chain_tx_lane_map_physical{29.0}=0x3120 +phy_chain_tx_lane_map_physical{33.0}=0x0123 +phy_chain_tx_lane_map_physical{37.0}=0x3210 +phy_chain_tx_lane_map_physical{41.0}=0x0123 +phy_chain_tx_lane_map_physical{45.0}=0x3210 +phy_chain_tx_lane_map_physical{49.0}=0x2310 +phy_chain_tx_lane_map_physical{53.0}=0x3210 +phy_chain_tx_lane_map_physical{57.0}=0x1230 +phy_chain_tx_lane_map_physical{61.0}=0x1230 +phy_chain_tx_lane_map_physical{65.0}=0x1302 +phy_chain_tx_lane_map_physical{69.0}=0x0123 +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_tx_lane_map_physical{77.0}=0x2013 +phy_chain_tx_lane_map_physical{81.0}=0x3210 +phy_chain_tx_lane_map_physical{85.0}=0x0123 +phy_chain_tx_lane_map_physical{89.0}=0x3210 +phy_chain_tx_lane_map_physical{93.0}=0x0123 +phy_chain_tx_lane_map_physical{97.0}=0x0123 +phy_chain_tx_lane_map_physical{101.0}=0x0123 +phy_chain_tx_lane_map_physical{105.0}=0x0123 +phy_chain_tx_lane_map_physical{109.0}=0x0123 +phy_chain_tx_lane_map_physical{113.0}=0x0123 +phy_chain_tx_lane_map_physical{117.0}=0x0123 +phy_chain_tx_lane_map_physical{121.0}=0x0123 +phy_chain_tx_lane_map_physical{125.0}=0x0123 + +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 + +phy_chain_rx_polarity_flip_physical{9.0}=0x1 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 + +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 + +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 + +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 + +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x1 + +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 + +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 + +phy_chain_rx_polarity_flip_physical{37.0}=0x0 +phy_chain_rx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 + +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 + +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 + +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 + +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 + +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 + +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 + +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 + +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x1 + +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 + +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{83.0}=0x1 +phy_chain_rx_polarity_flip_physical{84.0}=0x1 + +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 + +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 + +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 + +phy_chain_rx_polarity_flip_physical{97.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 + +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x1 +phy_chain_rx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 + +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{108.0}=0x0 + +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x1 + +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 + +phy_chain_rx_polarity_flip_physical{117.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x1 +phy_chain_rx_polarity_flip_physical{119.0}=0x0 +phy_chain_rx_polarity_flip_physical{120.0}=0x1 + +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 + +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 + +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 + +phy_chain_tx_polarity_flip_physical{9.0}=0x1 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 + +phy_chain_tx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 + +phy_chain_tx_polarity_flip_physical{17.0}=0x1 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x0 + +phy_chain_tx_polarity_flip_physical{21.0}=0x1 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 + +phy_chain_tx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 + +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 + +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 + +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 + +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 + +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 + +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 + +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 + +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 + +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 + +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 + +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 + +phy_chain_tx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 + +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 + +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x0 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 + +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 + +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 + +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 + +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 + +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 + +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 + +phy_chain_tx_polarity_flip_physical{109.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 + +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 + +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x1 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 + +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 + +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 diff --git a/device/accton/x86_64-accton_as7726_32x-r0/default_sku b/device/accton/x86_64-accton_as7726_32x-r0/default_sku new file mode 100644 index 00000000000..1573f369d71 --- /dev/null +++ b/device/accton/x86_64-accton_as7726_32x-r0/default_sku @@ -0,0 +1 @@ +Accton-AS7726-32X t1 diff --git a/device/accton/x86_64-accton_as7726_32x-r0/installer.conf b/device/accton/x86_64-accton_as7726_32x-r0/installer.conf new file mode 100755 index 00000000000..3455d9ca4ed --- /dev/null +++ b/device/accton/x86_64-accton_as7726_32x-r0/installer.conf @@ -0,0 +1,2 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off" diff --git a/device/accton/x86_64-accton_as7726_32x-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as7726_32x-r0/plugins/eeprom.py new file mode 100755 index 00000000000..68ed5f9466b --- /dev/null +++ b/device/accton/x86_64-accton_as7726_32x-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/1-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as7726_32x-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as7726_32x-r0/plugins/psuutil.py new file mode 100755 index 00000000000..44fb45662d5 --- /dev/null +++ b/device/accton/x86_64-accton_as7726_32x-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 2: "49-0050", + 1: "50-0053", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as7726_32x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7726_32x-r0/plugins/sfputil.py new file mode 100755 index 00000000000..04a0388daab --- /dev/null +++ b/device/accton/x86_64-accton_as7726_32x-r0/plugins/sfputil.py @@ -0,0 +1,257 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +#from xcvrd +SFP_STATUS_INSERTED = '1' +SFP_STATUS_REMOVED = '0' + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 32 #34 cages actually, but last 2 are not at port_config.ini. + PORTS_IN_BLOCK = 32 + + BASE_OOM_PATH = "/sys/bus/i2c/devices/{0}-0050/" + BASE_CPLD_PATH = "/sys/bus/i2c/devices/11-0060/" + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 1: 21, + 2: 22, + 3: 23, + 4: 24, + 5: 26, + 6: 25, + 7: 28, + 8: 27, + 9: 17, + 10: 18, + 11: 19, + 12: 20, + 13: 29, + 14: 30, + 15: 31, + 16: 32, + 17: 33, + 18: 34, + 19: 35, + 20: 36, + 21: 45, + 22: 46, + 23: 47, + 24: 48, + 25: 37, + 26: 38, + 27: 39, + 28: 40, + 29: 41, + 30: 42, + 31: 43, + 32: 44, + 33: 15, + 34: 16, + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = self.BASE_OOM_PATH + "eeprom" + + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x] + ) + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if not port_num in range(self.port_start, self.port_end+1): + return False + + present_path = self.BASE_CPLD_PATH + "module_present_" + str(port_num) + self.__port_to_is_present = present_path + + try: + val_file = open(self.__port_to_is_present) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False + + eeprom = open(self.port_to_eeprom_mapping[port_num], "rb") + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if ((lpmode & 0x3) == 0x3): + return True # Low Power Mode if "Power override" bit is 1 and "Power set" bit is 1 + else: + return False # High Power Mode if one of the following conditions is matched: + # 1. "Power override" bit is 0 + # 2. "Power override" bit is 1 and "Power set" bit is 0 + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b") + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def reset(self, port_num): + if port_num < self.port_start or port_num > self.port_end: + return False + + mod_rst_path = self.BASE_CPLD_PATH + "module_reset_" + str(port_num) + + self.__port_to_mod_rst = mod_rst_path + try: + reg_file = open(self.__port_to_mod_rst, 'r+', buffering=0) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #toggle reset + reg_file.seek(0) + reg_file.write('1') + time.sleep(1) + reg_file.seek(0) + reg_file.write('0') + reg_file.close() + + return True + + @property + def get_transceiver_status(self): + nodes = [] + + cpld_path = self.BASE_CPLD_PATH + nodes.append(cpld_path + "module_present_all") + + bitmap = "" + for node in nodes: + try: + reg_file = open(node) + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + bitmap += reg_file.readline().rstrip() + " " + reg_file.close() + + rev = bitmap.split(" ") + rev = "".join(rev[::-1]) + return int(rev,16) + + data = {'valid':0, 'last':0, 'present':0} + def get_transceiver_change_event(self, timeout=2000): + now = time.time() + port_dict = {} + port = 0 + + if timeout < 1000: + timeout = 1000 + timeout = (timeout) / float(1000) # Convert to secs + + + if now < (self.data['last'] + timeout) and self.data['valid']: + return True, {} + + reg_value = self.get_transceiver_status + changed_ports = self.data['present'] ^ reg_value + if changed_ports: + for port in range (self.port_start, self.port_end+1): + # Mask off the bit corresponding to our port + fp_port = port + mask = (1 << (fp_port - 1)) + if changed_ports & mask: + if (reg_value & mask) == 0: + port_dict[port] = SFP_STATUS_REMOVED + else: + port_dict[port] = SFP_STATUS_INSERTED + + # Update cache + self.data['present'] = reg_value + self.data['last'] = now + self.data['valid'] = 1 + + return True, port_dict + else: + return True, {} + return False, {} + diff --git a/device/accton/x86_64-accton_as7726_32x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7726_32x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7726_32x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as7816_64x-r0/Accton-AS7816-64X/port_config.ini b/device/accton/x86_64-accton_as7816_64x-r0/Accton-AS7816-64X/port_config.ini new file mode 100644 index 00000000000..8ebbd52c554 --- /dev/null +++ b/device/accton/x86_64-accton_as7816_64x-r0/Accton-AS7816-64X/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias index speed +Ethernet0 73,74,75,76 hundredGigE1 1 100000 +Ethernet4 65,66,67,68 hundredGigE2 2 100000 +Ethernet8 81,82,83,84 hundredGigE3 3 100000 +Ethernet12 89,90,91,92 hundredGigE4 4 100000 +Ethernet16 105,106,107,108 hundredGigE5 5 100000 +Ethernet20 97,98,99,100 hundredGigE6 6 100000 +Ethernet24 113,114,115,116 hundredGigE7 7 100000 +Ethernet28 121,122,123,124 hundredGigE8 8 100000 +Ethernet32 41,42,43,44 hundredGigE9 9 100000 +Ethernet36 33,34,35,36 hundredGigE10 10 100000 +Ethernet40 49,50,51,52 hundredGigE11 11 100000 +Ethernet44 57,58,59,60 hundredGigE12 12 100000 +Ethernet48 137,138,139,140 hundredGigE13 13 100000 +Ethernet52 129,130,131,132 hundredGigE14 14 100000 +Ethernet56 145,146,147,148 hundredGigE15 15 100000 +Ethernet60 153,154,155,156 hundredGigE16 16 100000 +Ethernet64 173,174,175,176 hundredGigE17 17 100000 +Ethernet68 165,166,167,168 hundredGigE18 18 100000 +Ethernet72 181,182,183,184 hundredGigE19 19 100000 +Ethernet76 189,190,191,192 hundredGigE20 20 100000 +Ethernet80 13,14,15,16 hundredGigE21 21 100000 +Ethernet84 5,6,7,8 hundredGigE22 22 100000 +Ethernet88 29,30,31,32 hundredGigE23 23 100000 +Ethernet92 21,22,23,24 hundredGigE24 24 100000 +Ethernet96 205,206,207,208 hundredGigE25 25 100000 +Ethernet100 197,198,199,200 hundredGigE26 26 100000 +Ethernet104 213,214,215,216 hundredGigE27 27 100000 +Ethernet108 221,222,223,224 hundredGigE28 28 100000 +Ethernet112 229,230,231,232 hundredGigE29 29 100000 +Ethernet116 237,238,239,240 hundredGigE30 30 100000 +Ethernet120 245,246,247,248 hundredGigE31 31 100000 +Ethernet124 253,254,255,256 hundredGigE32 32 100000 +Ethernet128 69,70,71,72 hundredGigE33 33 100000 +Ethernet132 77,78,79,80 hundredGigE34 34 100000 +Ethernet136 93,94,95,96 hundredGigE35 35 100000 +Ethernet140 85,86,87,88 hundredGigE36 36 100000 +Ethernet144 101,102,103,104 hundredGigE37 37 100000 +Ethernet148 109,110,111,112 hundredGigE38 38 100000 +Ethernet152 125,126,127,128 hundredGigE39 39 100000 +Ethernet156 117,118,119,120 hundredGigE40 40 100000 +Ethernet160 37,38,39,40 hundredGigE41 41 100000 +Ethernet164 45,46,47,48 hundredGigE42 42 100000 +Ethernet168 61,62,63,64 hundredGigE43 43 100000 +Ethernet172 53,54,55,56 hundredGigE44 44 100000 +Ethernet176 133,134,135,136 hundredGigE45 45 100000 +Ethernet180 141,142,143,144 hundredGigE46 46 100000 +Ethernet184 157,158,159,160 hundredGigE47 47 100000 +Ethernet188 149,150,151,152 hundredGigE48 48 100000 +Ethernet192 161,162,163,164 hundredGigE49 49 100000 +Ethernet196 169,170,171,172 hundredGigE50 50 100000 +Ethernet200 185,186,187,188 hundredGigE51 51 100000 +Ethernet204 177,178,179,180 hundredGigE52 52 100000 +Ethernet208 1,2,3,4 hundredGigE53 53 100000 +Ethernet212 9,10,11,12 hundredGigE54 54 100000 +Ethernet216 25,26,27,28 hundredGigE55 55 100000 +Ethernet220 17,18,19,20 hundredGigE56 56 100000 +Ethernet224 193,194,195,196 hundredGigE57 57 100000 +Ethernet228 201,202,203,204 hundredGigE58 58 100000 +Ethernet232 217,218,219,220 hundredGigE59 59 100000 +Ethernet236 209,210,211,212 hundredGigE60 60 100000 +Ethernet240 225,226,227,228 hundredGigE61 61 100000 +Ethernet244 233,234,235,236 hundredGigE62 62 100000 +Ethernet248 249,250,251,252 hundredGigE63 63 100000 +Ethernet252 241,242,243,244 hundredGigE64 64 100000 diff --git a/device/accton/x86_64-accton_as7816_64x-r0/Accton-AS7816-64X/sai.profile b/device/accton/x86_64-accton_as7816_64x-r0/Accton-AS7816-64X/sai.profile new file mode 100644 index 00000000000..e2f945e9a07 --- /dev/null +++ b/device/accton/x86_64-accton_as7816_64x-r0/Accton-AS7816-64X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-as7816-64x100G.config.bcm diff --git a/device/accton/x86_64-accton_as7816_64x-r0/Accton-AS7816-64X/th2-as7816-64x100G.config.bcm b/device/accton/x86_64-accton_as7816_64x-r0/Accton-AS7816-64X/th2-as7816-64x100G.config.bcm new file mode 100644 index 00000000000..2a440fbfe07 --- /dev/null +++ b/device/accton/x86_64-accton_as7816_64x-r0/Accton-AS7816-64X/th2-as7816-64x100G.config.bcm @@ -0,0 +1,1182 @@ +# accton_as7816_64x 64x100G SDK config +os=unix +schan_intr_enable=0 +l2_mem_entries=40960 +l2xmsg_mode=1 +l3_mem_entries=40960 +parity_correction=0 +parity_enable=0 +mmu_lossless=1 + +pbmp_xport_xe=0x1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff +pbmp_oversubscribe=0x1ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff + +# platform specific setting +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=8 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +dma_desc_timeout_usec=15000000 +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +oversubscribe_mode=1 + +#add loopback port +# port 33 is the first loopback port +portmap_33=260:10 +# port 66 is the first management port +portmap_66=257:10 +# port 67 is the second loopback port +portmap_67=261:10 +# port 100 is the second management port +portmap_100=259:10 +# port 101 is the third loopback port +portmap_101=262:10 +# port 135 is the fourth loopback port +portmap_135=263:10 + +#Port0 +#FC18 +#dport_map_port_34=1 +dport_map_port_34=73 +dport_map_port_35=74 +dport_map_port_36=75 +dport_map_port_37=76 +portmap_34=73:100 +phy_chain_rx_lane_map_physical{73.0}=0x3210 +phy_chain_rx_lane_map_physical{74.0}=0x3210 +phy_chain_rx_lane_map_physical{75.0}=0x3210 +phy_chain_rx_lane_map_physical{76.0}=0x3210 +phy_chain_tx_lane_map_physical{73.0}=0x3021 +phy_chain_tx_lane_map_physical{74.0}=0x3021 +phy_chain_tx_lane_map_physical{75.0}=0x3021 +phy_chain_tx_lane_map_physical{76.0}=0x3021 +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x1 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 + +#Port2 +#FC20 +#dport_map_port_39=5 +dport_map_port_39=81 +dport_map_port_40=82 +dport_map_port_41=83 +dport_map_port_42=84 +portmap_39=81:100 +phy_chain_rx_lane_map_physical{81.0}=0x1230 +phy_chain_rx_lane_map_physical{82.0}=0x1230 +phy_chain_rx_lane_map_physical{83.0}=0x1230 +phy_chain_rx_lane_map_physical{84.0}=0x1230 +phy_chain_tx_lane_map_physical{81.0}=0x1032 +phy_chain_tx_lane_map_physical{82.0}=0x1032 +phy_chain_tx_lane_map_physical{83.0}=0x1032 +phy_chain_tx_lane_map_physical{84.0}=0x1032 +phy_chain_rx_polarity_flip_physical{81.0}=0x1 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{83.0}=0x1 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x1 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 + +#Port4 +#FC26 +#dport_map_port_44=9 +dport_map_port_44=105 +dport_map_port_45=106 +dport_map_port_46=107 +dport_map_port_47=108 +portmap_44=105:100 +phy_chain_rx_lane_map_physical{105.0}=0x3210 +phy_chain_rx_lane_map_physical{106.0}=0x3210 +phy_chain_rx_lane_map_physical{107.0}=0x3210 +phy_chain_rx_lane_map_physical{108.0}=0x3210 +phy_chain_tx_lane_map_physical{105.0}=0x0231 +phy_chain_tx_lane_map_physical{106.0}=0x0231 +phy_chain_tx_lane_map_physical{107.0}=0x0231 +phy_chain_tx_lane_map_physical{108.0}=0x0231 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 + +#Port6 +#FC 28 +#dport_map_port_49=13 +dport_map_port_49=113 +dport_map_port_50=114 +dport_map_port_51=115 +dport_map_port_52=116 +portmap_49=113:100 +phy_chain_rx_lane_map_physical{113.0}=0x3021 +phy_chain_rx_lane_map_physical{114.0}=0x3021 +phy_chain_rx_lane_map_physical{115.0}=0x3021 +phy_chain_rx_lane_map_physical{116.0}=0x3021 +phy_chain_tx_lane_map_physical{113.0}=0x0312 +phy_chain_tx_lane_map_physical{114.0}=0x0312 +phy_chain_tx_lane_map_physical{115.0}=0x0312 +phy_chain_tx_lane_map_physical{116.0}=0x0312 +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x1 + +#Port8 +#FC10 +#dport_map_port_1=17 +dport_map_port_1=41 +dport_map_port_2=42 +dport_map_port_3=43 +dport_map_port_4=44 +portmap_1=41:100 +phy_chain_rx_lane_map_physical{41.0}=0x0132 +phy_chain_rx_lane_map_physical{42.0}=0x0132 +phy_chain_rx_lane_map_physical{43.0}=0x0132 +phy_chain_rx_lane_map_physical{44.0}=0x0132 +phy_chain_tx_lane_map_physical{41.0}=0x1302 +phy_chain_tx_lane_map_physical{42.0}=0x1302 +phy_chain_tx_lane_map_physical{43.0}=0x1302 +phy_chain_tx_lane_map_physical{44.0}=0x1302 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 + +#Port10 +#FC12 +#dport_map_port_6=21 +dport_map_port_6=49 +dport_map_port_7=50 +dport_map_port_8=51 +dport_map_port_9=52 +portmap_6=49:100 +phy_chain_rx_lane_map_physical{49.0}=0x3210 +phy_chain_rx_lane_map_physical{50.0}=0x3210 +phy_chain_rx_lane_map_physical{51.0}=0x3210 +phy_chain_rx_lane_map_physical{52.0}=0x3210 +phy_chain_tx_lane_map_physical{49.0}=0x3102 +phy_chain_tx_lane_map_physical{50.0}=0x3102 +phy_chain_tx_lane_map_physical{51.0}=0x3102 +phy_chain_tx_lane_map_physical{52.0}=0x3102 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 + +#Port12 +#FC34 +#dport_map_port_68=25 +dport_map_port_68=137 +dport_map_port_69=138 +dport_map_port_70=139 +dport_map_port_71=140 +portmap_68=137:100 +phy_chain_rx_lane_map_physical{137.0}=0x3210 +phy_chain_rx_lane_map_physical{138.0}=0x3210 +phy_chain_rx_lane_map_physical{139.0}=0x3210 +phy_chain_rx_lane_map_physical{140.0}=0x3210 +phy_chain_tx_lane_map_physical{137.0}=0x0213 +phy_chain_tx_lane_map_physical{138.0}=0x0213 +phy_chain_tx_lane_map_physical{139.0}=0x0213 +phy_chain_tx_lane_map_physical{140.0}=0x0213 +phy_chain_rx_polarity_flip_physical{137.0}=0x0 +phy_chain_rx_polarity_flip_physical{138.0}=0x0 +phy_chain_rx_polarity_flip_physical{139.0}=0x1 +phy_chain_rx_polarity_flip_physical{140.0}=0x0 +phy_chain_tx_polarity_flip_physical{137.0}=0x1 +phy_chain_tx_polarity_flip_physical{138.0}=0x0 +phy_chain_tx_polarity_flip_physical{139.0}=0x0 +phy_chain_tx_polarity_flip_physical{140.0}=0x0 + +#Port14 +#FC36 +#dport_map_port_73=29 +dport_map_port_73=145 +dport_map_port_74=146 +dport_map_port_75=147 +dport_map_port_76=148 +portmap_73=145:100 +phy_chain_rx_lane_map_physical{145.0}=0x0213 +phy_chain_rx_lane_map_physical{146.0}=0x0213 +phy_chain_rx_lane_map_physical{147.0}=0x0213 +phy_chain_rx_lane_map_physical{148.0}=0x0213 +phy_chain_tx_lane_map_physical{145.0}=0x2301 +phy_chain_tx_lane_map_physical{146.0}=0x2301 +phy_chain_tx_lane_map_physical{147.0}=0x2301 +phy_chain_tx_lane_map_physical{148.0}=0x2301 +phy_chain_rx_polarity_flip_physical{145.0}=0x1 +phy_chain_rx_polarity_flip_physical{146.0}=0x1 +phy_chain_rx_polarity_flip_physical{147.0}=0x0 +phy_chain_rx_polarity_flip_physical{148.0}=0x0 +phy_chain_tx_polarity_flip_physical{145.0}=0x0 +phy_chain_tx_polarity_flip_physical{146.0}=0x0 +phy_chain_tx_polarity_flip_physical{147.0}=0x0 +phy_chain_tx_polarity_flip_physical{148.0}=0x1 + +#Port16 +#FC43 +#dport_map_port_78=33 +dport_map_port_78=173 +dport_map_port_79=174 +dport_map_port_80=175 +dport_map_port_81=176 +portmap_78=173:100 +phy_chain_rx_lane_map_physical{173.0}=0x1032 +phy_chain_rx_lane_map_physical{174.0}=0x1032 +phy_chain_rx_lane_map_physical{175.0}=0x1032 +phy_chain_rx_lane_map_physical{176.0}=0x1032 +phy_chain_tx_lane_map_physical{173.0}=0x1203 +phy_chain_tx_lane_map_physical{174.0}=0x1203 +phy_chain_tx_lane_map_physical{175.0}=0x1203 +phy_chain_tx_lane_map_physical{176.0}=0x1203 +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x0 +phy_chain_rx_polarity_flip_physical{175.0}=0x0 +phy_chain_rx_polarity_flip_physical{176.0}=0x0 +phy_chain_tx_polarity_flip_physical{173.0}=0x1 +phy_chain_tx_polarity_flip_physical{174.0}=0x1 +phy_chain_tx_polarity_flip_physical{175.0}=0x0 +phy_chain_tx_polarity_flip_physical{176.0}=0x1 + +#Port18 +#FC45 +#dport_map_port_83=37 +dport_map_port_83=181 +dport_map_port_84=182 +dport_map_port_85=183 +dport_map_port_86=184 +portmap_83=181:100 +phy_chain_rx_lane_map_physical{181.0}=0x0312 +phy_chain_rx_lane_map_physical{182.0}=0x0312 +phy_chain_rx_lane_map_physical{183.0}=0x0312 +phy_chain_rx_lane_map_physical{184.0}=0x0312 +phy_chain_tx_lane_map_physical{181.0}=0x3120 +phy_chain_tx_lane_map_physical{182.0}=0x3120 +phy_chain_tx_lane_map_physical{183.0}=0x3120 +phy_chain_tx_lane_map_physical{184.0}=0x3120 +phy_chain_rx_polarity_flip_physical{181.0}=0x0 +phy_chain_rx_polarity_flip_physical{182.0}=0x1 +phy_chain_rx_polarity_flip_physical{183.0}=0x1 +phy_chain_rx_polarity_flip_physical{184.0}=0x0 +phy_chain_tx_polarity_flip_physical{181.0}=0x0 +phy_chain_tx_polarity_flip_physical{182.0}=0x0 +phy_chain_tx_polarity_flip_physical{183.0}=0x1 +phy_chain_tx_polarity_flip_physical{184.0}=0x0 + +#Port20 +#FC3 +#dport_map_port_11=41 +dport_map_port_11=13 +dport_map_port_12=14 +dport_map_port_13=15 +dport_map_port_14=16 +portmap_11=13:100 +phy_chain_rx_lane_map_physical{13.0}=0x3120 +phy_chain_rx_lane_map_physical{14.0}=0x3120 +phy_chain_rx_lane_map_physical{15.0}=0x3120 +phy_chain_rx_lane_map_physical{16.0}=0x3120 +phy_chain_tx_lane_map_physical{13.0}=0x3210 +phy_chain_tx_lane_map_physical{14.0}=0x3210 +phy_chain_tx_lane_map_physical{15.0}=0x3210 +phy_chain_tx_lane_map_physical{16.0}=0x3210 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 + +#Port22 +#FC7 +#dport_map_port_16=45 +dport_map_port_16=29 +dport_map_port_17=30 +dport_map_port_18=31 +dport_map_port_19=32 +portmap_16=29:100 +phy_chain_rx_lane_map_physical{29.0}=0x3021 +phy_chain_rx_lane_map_physical{30.0}=0x3021 +phy_chain_rx_lane_map_physical{31.0}=0x3021 +phy_chain_rx_lane_map_physical{32.0}=0x3021 +phy_chain_tx_lane_map_physical{29.0}=0x2130 +phy_chain_tx_lane_map_physical{30.0}=0x2130 +phy_chain_tx_lane_map_physical{31.0}=0x2130 +phy_chain_tx_lane_map_physical{32.0}=0x2130 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 + +#Port24 +#FC51 +#dport_map_port_102=49 +dport_map_port_102=205 +dport_map_port_103=206 +dport_map_port_104=207 +dport_map_port_105=208 +portmap_102=205:100 +phy_chain_rx_lane_map_physical{205.0}=0x0132 +phy_chain_rx_lane_map_physical{206.0}=0x0132 +phy_chain_rx_lane_map_physical{207.0}=0x0132 +phy_chain_rx_lane_map_physical{208.0}=0x0132 +phy_chain_tx_lane_map_physical{205.0}=0x1230 +phy_chain_tx_lane_map_physical{206.0}=0x1230 +phy_chain_tx_lane_map_physical{207.0}=0x1230 +phy_chain_tx_lane_map_physical{208.0}=0x1230 +phy_chain_rx_polarity_flip_physical{205.0}=0x1 +phy_chain_rx_polarity_flip_physical{206.0}=0x1 +phy_chain_rx_polarity_flip_physical{207.0}=0x1 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 +phy_chain_tx_polarity_flip_physical{205.0}=0x0 +phy_chain_tx_polarity_flip_physical{206.0}=0x1 +phy_chain_tx_polarity_flip_physical{207.0}=0x0 +phy_chain_tx_polarity_flip_physical{208.0}=0x1 + +#Port26 +#FC53 +#dport_map_port_107=53 +dport_map_port_107=213 +dport_map_port_108=214 +dport_map_port_109=215 +dport_map_port_110=216 +portmap_107=213:100 +phy_chain_rx_lane_map_physical{213.0}=0x3210 +phy_chain_rx_lane_map_physical{214.0}=0x3210 +phy_chain_rx_lane_map_physical{215.0}=0x3210 +phy_chain_rx_lane_map_physical{216.0}=0x3210 +phy_chain_tx_lane_map_physical{213.0}=0x1230 +phy_chain_tx_lane_map_physical{214.0}=0x1230 +phy_chain_tx_lane_map_physical{215.0}=0x1230 +phy_chain_tx_lane_map_physical{216.0}=0x1230 +phy_chain_rx_polarity_flip_physical{213.0}=0x0 +phy_chain_rx_polarity_flip_physical{214.0}=0x1 +phy_chain_rx_polarity_flip_physical{215.0}=0x0 +phy_chain_rx_polarity_flip_physical{216.0}=0x1 +phy_chain_tx_polarity_flip_physical{213.0}=0x0 +phy_chain_tx_polarity_flip_physical{214.0}=0x0 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x1 + +#Port28 +#FC57 +#dport_map_port_112=57 +dport_map_port_112=229 +dport_map_port_113=230 +dport_map_port_114=231 +dport_map_port_115=232 +portmap_112=229:100 +phy_chain_rx_lane_map_physical{229.0}=0x2301 +phy_chain_rx_lane_map_physical{230.0}=0x2301 +phy_chain_rx_lane_map_physical{231.0}=0x2301 +phy_chain_rx_lane_map_physical{232.0}=0x2301 +phy_chain_tx_lane_map_physical{229.0}=0x3210 +phy_chain_tx_lane_map_physical{230.0}=0x3210 +phy_chain_tx_lane_map_physical{231.0}=0x3210 +phy_chain_tx_lane_map_physical{232.0}=0x3210 +phy_chain_rx_polarity_flip_physical{229.0}=0x1 +phy_chain_rx_polarity_flip_physical{230.0}=0x1 +phy_chain_rx_polarity_flip_physical{231.0}=0x0 +phy_chain_rx_polarity_flip_physical{232.0}=0x1 +phy_chain_tx_polarity_flip_physical{229.0}=0x0 +phy_chain_tx_polarity_flip_physical{230.0}=0x1 +phy_chain_tx_polarity_flip_physical{231.0}=0x0 +phy_chain_tx_polarity_flip_physical{232.0}=0x0 + +#Port30 +#FC61 +#dport_map_port_117=61 +dport_map_port_117=245 +dport_map_port_118=246 +dport_map_port_119=247 +dport_map_port_120=248 +portmap_117=245:100 +phy_chain_rx_lane_map_physical{245.0}=0x0213 +phy_chain_rx_lane_map_physical{246.0}=0x0213 +phy_chain_rx_lane_map_physical{247.0}=0x0213 +phy_chain_rx_lane_map_physical{248.0}=0x0213 +phy_chain_tx_lane_map_physical{245.0}=0x3210 +phy_chain_tx_lane_map_physical{246.0}=0x3210 +phy_chain_tx_lane_map_physical{247.0}=0x3210 +phy_chain_tx_lane_map_physical{248.0}=0x3210 +phy_chain_rx_polarity_flip_physical{245.0}=0x0 +phy_chain_rx_polarity_flip_physical{246.0}=0x0 +phy_chain_rx_polarity_flip_physical{247.0}=0x1 +phy_chain_rx_polarity_flip_physical{248.0}=0x1 +phy_chain_tx_polarity_flip_physical{245.0}=0x1 +phy_chain_tx_polarity_flip_physical{246.0}=0x0 +phy_chain_tx_polarity_flip_physical{247.0}=0x1 +phy_chain_tx_polarity_flip_physical{248.0}=0x0 + +#Port1 +#FC16 +#dport_map_port_38=65 +dport_map_port_38=65 +portmap_38=65:100 +phy_chain_rx_lane_map_physical{65.0}=0x3210 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 + +#Port3 +#FC22 +#dport_map_port_43=66 +dport_map_port_43=89 +portmap_43=89:100 +phy_chain_rx_lane_map_physical{89.0}=0x0132 +phy_chain_tx_lane_map_physical{89.0}=0x1203 +phy_chain_rx_polarity_flip_physical{89.0}=0x1 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{91.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x1 + +#Port5 +#FC24 +#dport_map_port_48=67 +dport_map_port_48=97 +portmap_48=97:100 +phy_chain_rx_lane_map_physical{97.0}=0x0213 +phy_chain_tx_lane_map_physical{97.0}=0x3210 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x1 +phy_chain_tx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 + +#Port7 +#FC30 +#dport_map_port_53=68 +dport_map_port_53=121 +portmap_53=121:100 +phy_chain_rx_lane_map_physical{121.0}=0x3021 +phy_chain_tx_lane_map_physical{121.0}=0x2130 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 + +#Port9 +#FC8 +#dport_map_port_5=69 +dport_map_port_5=33 +portmap_5=33:100 +phy_chain_rx_lane_map_physical{33.0}=0x2310 +phy_chain_tx_lane_map_physical{33.0}=0x0213 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 + +#Port11 +#FC14 +#dport_map_port_10=70 +dport_map_port_10=57 +portmap_10=57:100 +phy_chain_rx_lane_map_physical{57.0}=0x3210 +phy_chain_tx_lane_map_physical{57.0}=0x1302 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x0 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 + +#Port13 +#FC32 +#dport_map_port_72=71 +dport_map_port_72=129 +portmap_72=129:100 +phy_chain_rx_lane_map_physical{129.0}=0x3021 +phy_chain_tx_lane_map_physical{129.0}=0x1203 +phy_chain_rx_polarity_flip_physical{129.0}=0x1 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_tx_polarity_flip_physical{130.0}=0x1 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x1 + +#Port15 +#FC38 +#dport_map_port_77=72 +dport_map_port_77=153 +portmap_77=153:100 +phy_chain_rx_lane_map_physical{153.0}=0x0213 +phy_chain_tx_lane_map_physical{153.0}=0x1302 +phy_chain_rx_polarity_flip_physical{153.0}=0x1 +phy_chain_rx_polarity_flip_physical{154.0}=0x0 +phy_chain_rx_polarity_flip_physical{155.0}=0x1 +phy_chain_rx_polarity_flip_physical{156.0}=0x1 +phy_chain_tx_polarity_flip_physical{153.0}=0x0 +phy_chain_tx_polarity_flip_physical{154.0}=0x1 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x0 + +#Port17 +#FC41 +#dport_map_port_82=73 +dport_map_port_82=165 +portmap_82=165:100 +phy_chain_rx_lane_map_physical{165.0}=0x1230 +phy_chain_tx_lane_map_physical{165.0}=0x2130 +phy_chain_rx_polarity_flip_physical{165.0}=0x1 +phy_chain_rx_polarity_flip_physical{166.0}=0x0 +phy_chain_rx_polarity_flip_physical{167.0}=0x1 +phy_chain_rx_polarity_flip_physical{168.0}=0x1 +phy_chain_tx_polarity_flip_physical{165.0}=0x1 +phy_chain_tx_polarity_flip_physical{166.0}=0x0 +phy_chain_tx_polarity_flip_physical{167.0}=0x1 +phy_chain_tx_polarity_flip_physical{168.0}=0x0 + +#Port19 +#FC47 +#dport_map_port_87=74 +dport_map_port_87=189 +portmap_87=189:100 +phy_chain_rx_lane_map_physical{189.0}=0x0132 +phy_chain_tx_lane_map_physical{189.0}=0x3210 +phy_chain_rx_polarity_flip_physical{189.0}=0x0 +phy_chain_rx_polarity_flip_physical{190.0}=0x1 +phy_chain_rx_polarity_flip_physical{191.0}=0x1 +phy_chain_rx_polarity_flip_physical{192.0}=0x1 +phy_chain_tx_polarity_flip_physical{189.0}=0x1 +phy_chain_tx_polarity_flip_physical{190.0}=0x0 +phy_chain_tx_polarity_flip_physical{191.0}=0x0 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 + +#Port21 +#FC1 +#dport_map_port_15=75 +dport_map_port_15=5 +portmap_15=5:100 +phy_chain_rx_lane_map_physical{5.0}=0x0213 +phy_chain_tx_lane_map_physical{5.0}=0x0321 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 + +#Port23 +#FC5 +#dport_map_port_20=76 +dport_map_port_20=21 +portmap_20=21:100 +phy_chain_rx_lane_map_physical{21.0}=0x0321 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 + +#Port25 +#FC49 +#dport_map_port_106=77 +dport_map_port_106=197 +portmap_106=197:100 +phy_chain_rx_lane_map_physical{197.0}=0x1230 +phy_chain_tx_lane_map_physical{197.0}=0x3021 +phy_chain_rx_polarity_flip_physical{197.0}=0x0 +phy_chain_rx_polarity_flip_physical{198.0}=0x0 +phy_chain_rx_polarity_flip_physical{199.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x0 +phy_chain_tx_polarity_flip_physical{197.0}=0x1 +phy_chain_tx_polarity_flip_physical{198.0}=0x0 +phy_chain_tx_polarity_flip_physical{199.0}=0x1 +phy_chain_tx_polarity_flip_physical{200.0}=0x0 + +#Port27 +#FC55 +#dport_map_port_111=78 +dport_map_port_111=221 +portmap_111=221:100 +phy_chain_rx_lane_map_physical{221.0}=0x3210 +phy_chain_tx_lane_map_physical{221.0}=0x3210 +phy_chain_rx_polarity_flip_physical{221.0}=0x1 +phy_chain_rx_polarity_flip_physical{222.0}=0x1 +phy_chain_rx_polarity_flip_physical{223.0}=0x0 +phy_chain_rx_polarity_flip_physical{224.0}=0x0 +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x0 +phy_chain_tx_polarity_flip_physical{223.0}=0x0 +phy_chain_tx_polarity_flip_physical{224.0}=0x0 + +#Port29 +#FC59 +#dport_map_port_116=79 +dport_map_port_116=237 +portmap_116=237:100 +phy_chain_rx_lane_map_physical{237.0}=0x0123 +phy_chain_tx_lane_map_physical{237.0}=0x3210 +phy_chain_rx_polarity_flip_physical{237.0}=0x1 +phy_chain_rx_polarity_flip_physical{238.0}=0x0 +phy_chain_rx_polarity_flip_physical{239.0}=0x1 +phy_chain_rx_polarity_flip_physical{240.0}=0x1 +phy_chain_tx_polarity_flip_physical{237.0}=0x1 +phy_chain_tx_polarity_flip_physical{238.0}=0x1 +phy_chain_tx_polarity_flip_physical{239.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x0 + +#Port31 +#FC63 +#dport_map_port_121=80 +dport_map_port_121=253 +portmap_121=253:100 +phy_chain_rx_lane_map_physical{253.0}=0x0213 +phy_chain_tx_lane_map_physical{253.0}=0x0312 +phy_chain_rx_polarity_flip_physical{253.0}=0x0 +phy_chain_rx_polarity_flip_physical{254.0}=0x0 +phy_chain_rx_polarity_flip_physical{255.0}=0x0 +phy_chain_rx_polarity_flip_physical{256.0}=0x1 +phy_chain_tx_polarity_flip_physical{253.0}=0x0 +phy_chain_tx_polarity_flip_physical{254.0}=0x1 +phy_chain_tx_polarity_flip_physical{255.0}=0x0 +phy_chain_tx_polarity_flip_physical{256.0}=0x0 + +#Port32 +#FC17 +#dport_map_port_54=81 +dport_map_port_54=69 +portmap_54=69:100 +phy_chain_rx_lane_map_physical{69.0}=0x1032 +phy_chain_tx_lane_map_physical{69.0}=0x3102 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 +#Port33 +#FC19 +#dport_map_port_55=82 +dport_map_port_55=77 +portmap_55=77:100 +phy_chain_rx_lane_map_physical{77.0}=0x1230 +phy_chain_tx_lane_map_physical{77.0}=0x3021 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +#Port34 +#FC23 +#dport_map_port_56=83 +dport_map_port_56=93 +portmap_56=93:100 +phy_chain_rx_lane_map_physical{93.0}=0x1032 +phy_chain_tx_lane_map_physical{93.0}=0x0231 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 +#Port35 +#FC21 +#dport_map_port_57=84 +dport_map_port_57=85 +portmap_57=85:100 +phy_chain_rx_lane_map_physical{85.0}=0x0312 +phy_chain_tx_lane_map_physical{85.0}=0x1230 +phy_chain_rx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x1 +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +#Port36 +#FC25 +#dport_map_port_58=85 +dport_map_port_58=101 +portmap_58=101:100 +phy_chain_rx_lane_map_physical{101.0}=0x1302 +phy_chain_tx_lane_map_physical{101.0}=0x0213 +phy_chain_rx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x1 +#Port37 +#FC27 +#dport_map_port_59=86 +dport_map_port_59=109 +portmap_59=109:100 +phy_chain_rx_lane_map_physical{109.0}=0x0213 +phy_chain_tx_lane_map_physical{109.0}=0x1032 +phy_chain_rx_polarity_flip_physical{109.0}=0x1 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{110.0}=0x1 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x1 +#Port38 +#FC31 +#dport_map_port_60=87 +dport_map_port_60=125 +portmap_60=125:100 +phy_chain_rx_lane_map_physical{125.0}=0x2130 +phy_chain_tx_lane_map_physical{125.0}=0x1203 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x1 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 +#Port39 +#FC29 +#dport_map_port_61=88 +dport_map_port_61=117 +portmap_61=117:100 +phy_chain_rx_lane_map_physical{117.0}=0x3102 +phy_chain_tx_lane_map_physical{117.0}=0x2310 +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x1 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +#Port40 +#FC9 +#dport_map_port_21=89 +dport_map_port_21=37 +portmap_21=37:100 +phy_chain_rx_lane_map_physical{37.0}=0x3210 +phy_chain_tx_lane_map_physical{37.0}=0x1302 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x1 +#Port41 +#FC11 +#dport_map_port_22=90 +dport_map_port_22=45 +portmap_22=45:100 +phy_chain_rx_lane_map_physical{45.0}=0x3210 +phy_chain_tx_lane_map_physical{45.0}=0x0123 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x0 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +#Port42 +#FC15 +#dport_map_port_23=91 +dport_map_port_23=61 +portmap_23=61:100 +phy_chain_rx_lane_map_physical{61.0}=0x3210 +phy_chain_tx_lane_map_physical{61.0}=0x1230 +phy_chain_rx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +#Port43 +#FC13 +#dport_map_port_24=92 +dport_map_port_24=53 +portmap_24=53:100 +phy_chain_rx_lane_map_physical{53.0}=0x3210 +phy_chain_tx_lane_map_physical{53.0}=0x3210 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 +phy_chain_tx_polarity_flip_physical{53.0}=0x1 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x0 +#Port44 +#FC33 +#dport_map_port_88=93 +dport_map_port_88=133 +portmap_88=133:100 +phy_chain_rx_lane_map_physical{133.0}=0x0312 +phy_chain_tx_lane_map_physical{133.0}=0x2310 +phy_chain_rx_polarity_flip_physical{133.0}=0x0 +phy_chain_rx_polarity_flip_physical{134.0}=0x0 +phy_chain_rx_polarity_flip_physical{135.0}=0x1 +phy_chain_rx_polarity_flip_physical{136.0}=0x0 +phy_chain_tx_polarity_flip_physical{133.0}=0x0 +phy_chain_tx_polarity_flip_physical{134.0}=0x1 +phy_chain_tx_polarity_flip_physical{135.0}=0x0 +phy_chain_tx_polarity_flip_physical{136.0}=0x1 +#Port45 +#FC35 +#dport_map_port_89=94 +dport_map_port_89=141 +portmap_89=141:100 +phy_chain_rx_lane_map_physical{141.0}=0x3012 +phy_chain_tx_lane_map_physical{141.0}=0x0123 +phy_chain_rx_polarity_flip_physical{141.0}=0x1 +phy_chain_rx_polarity_flip_physical{142.0}=0x0 +phy_chain_rx_polarity_flip_physical{143.0}=0x1 +phy_chain_rx_polarity_flip_physical{144.0}=0x0 +phy_chain_tx_polarity_flip_physical{141.0}=0x1 +phy_chain_tx_polarity_flip_physical{142.0}=0x1 +phy_chain_tx_polarity_flip_physical{143.0}=0x0 +phy_chain_tx_polarity_flip_physical{144.0}=0x0 +#Port46 +#FC39 +#dport_map_port_90=95 +dport_map_port_90=157 +portmap_90=157:100 +phy_chain_rx_lane_map_physical{157.0}=0x2103 +phy_chain_tx_lane_map_physical{157.0}=0x0231 +phy_chain_rx_polarity_flip_physical{157.0}=0x0 +phy_chain_rx_polarity_flip_physical{158.0}=0x0 +phy_chain_rx_polarity_flip_physical{159.0}=0x1 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 +phy_chain_tx_polarity_flip_physical{157.0}=0x0 +phy_chain_tx_polarity_flip_physical{158.0}=0x1 +phy_chain_tx_polarity_flip_physical{159.0}=0x0 +phy_chain_tx_polarity_flip_physical{160.0}=0x0 +#Port47 +#FC37 +#dport_map_port_91=96 +dport_map_port_91=149 +portmap_91=149:100 +phy_chain_rx_lane_map_physical{149.0}=0x3120 +phy_chain_tx_lane_map_physical{149.0}=0x1023 +phy_chain_rx_polarity_flip_physical{149.0}=0x0 +phy_chain_rx_polarity_flip_physical{150.0}=0x1 +phy_chain_rx_polarity_flip_physical{151.0}=0x0 +phy_chain_rx_polarity_flip_physical{152.0}=0x0 +phy_chain_tx_polarity_flip_physical{149.0}=0x1 +phy_chain_tx_polarity_flip_physical{150.0}=0x0 +phy_chain_tx_polarity_flip_physical{151.0}=0x0 +phy_chain_tx_polarity_flip_physical{152.0}=0x1 +#Port48 +#FC40 +#dport_map_port_92=97 +dport_map_port_92=161 +portmap_92=161:100 +phy_chain_rx_lane_map_physical{161.0}=0x3012 +phy_chain_tx_lane_map_physical{161.0}=0x1023 +phy_chain_rx_polarity_flip_physical{161.0}=0x1 +phy_chain_rx_polarity_flip_physical{162.0}=0x1 +phy_chain_rx_polarity_flip_physical{163.0}=0x0 +phy_chain_rx_polarity_flip_physical{164.0}=0x0 +phy_chain_tx_polarity_flip_physical{161.0}=0x0 +phy_chain_tx_polarity_flip_physical{162.0}=0x1 +phy_chain_tx_polarity_flip_physical{163.0}=0x0 +phy_chain_tx_polarity_flip_physical{164.0}=0x0 +#Port49 +#FC42 +#dport_map_port_93=98 +dport_map_port_93=169 +portmap_93=169:100 +phy_chain_rx_lane_map_physical{169.0}=0x3210 +phy_chain_tx_lane_map_physical{169.0}=0x2031 +phy_chain_rx_polarity_flip_physical{169.0}=0x0 +phy_chain_rx_polarity_flip_physical{170.0}=0x1 +phy_chain_rx_polarity_flip_physical{171.0}=0x0 +phy_chain_rx_polarity_flip_physical{172.0}=0x0 +phy_chain_tx_polarity_flip_physical{169.0}=0x1 +phy_chain_tx_polarity_flip_physical{170.0}=0x0 +phy_chain_tx_polarity_flip_physical{171.0}=0x0 +phy_chain_tx_polarity_flip_physical{172.0}=0x0 +#Port50 +#FC46 +#dport_map_port_94=99 +dport_map_port_94=185 +portmap_94=185:100 +phy_chain_rx_lane_map_physical{185.0}=0x2310 +phy_chain_tx_lane_map_physical{185.0}=0x3021 +phy_chain_rx_polarity_flip_physical{185.0}=0x1 +phy_chain_rx_polarity_flip_physical{186.0}=0x0 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x0 +phy_chain_tx_polarity_flip_physical{185.0}=0x0 +phy_chain_tx_polarity_flip_physical{186.0}=0x1 +phy_chain_tx_polarity_flip_physical{187.0}=0x0 +phy_chain_tx_polarity_flip_physical{188.0}=0x0 +#Port51 +#FC44 +#dport_map_port_95=100 +dport_map_port_95=177 +portmap_95=177:100 +phy_chain_rx_lane_map_physical{177.0}=0x1032 +phy_chain_tx_lane_map_physical{177.0}=0x2301 +phy_chain_rx_polarity_flip_physical{177.0}=0x1 +phy_chain_rx_polarity_flip_physical{178.0}=0x1 +phy_chain_rx_polarity_flip_physical{179.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x1 +phy_chain_tx_polarity_flip_physical{177.0}=0x1 +phy_chain_tx_polarity_flip_physical{178.0}=0x1 +phy_chain_tx_polarity_flip_physical{179.0}=0x1 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 + +#Port52 +#FC0 +#dport_map_port_27=103 +dport_map_port_27=1 +portmap_27=1:100 +phy_chain_rx_lane_map_physical{1.0}=0x2130 +phy_chain_tx_lane_map_physical{1.0}=0x1203 +phy_chain_rx_polarity_flip_physical{1.0}=0x1 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +#Port53 +#FC2 +#dport_map_port_28=104 +dport_map_port_28=9 +portmap_28=9:100 +phy_chain_rx_lane_map_physical{9.0}=0x1203 +phy_chain_tx_lane_map_physical{9.0}=0x1230 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 +phy_chain_tx_polarity_flip_physical{9.0}=0x1 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 +#Port54 +#FC6 +#dport_map_port_25=101 +dport_map_port_25=25 +portmap_25=25:100 +phy_chain_rx_lane_map_physical{25.0}=0x3102 +phy_chain_tx_lane_map_physical{25.0}=0x0132 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x1 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 + +#Port55 +#FC4 +#dport_map_port_26=102 +dport_map_port_26=17 +portmap_26=17:100 +phy_chain_rx_lane_map_physical{17.0}=0x3120 +phy_chain_tx_lane_map_physical{17.0}=0x3021 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x0 + +#Port56 +#FC48 +#dport_map_port_122=105 +dport_map_port_122=193 +portmap_122=193:100 +phy_chain_rx_lane_map_physical{193.0}=0x2103 +phy_chain_tx_lane_map_physical{193.0}=0x1230 +phy_chain_rx_polarity_flip_physical{193.0}=0x0 +phy_chain_rx_polarity_flip_physical{194.0}=0x1 +phy_chain_rx_polarity_flip_physical{195.0}=0x0 +phy_chain_rx_polarity_flip_physical{196.0}=0x1 +phy_chain_tx_polarity_flip_physical{193.0}=0x0 +phy_chain_tx_polarity_flip_physical{194.0}=0x0 +phy_chain_tx_polarity_flip_physical{195.0}=0x1 +phy_chain_tx_polarity_flip_physical{196.0}=0x0 +#Port57 +#FC50 +#dport_map_port_123=106 +dport_map_port_123=201 +portmap_123=201:100 +phy_chain_rx_lane_map_physical{201.0}=0x0321 +phy_chain_tx_lane_map_physical{201.0}=0x3021 +phy_chain_rx_polarity_flip_physical{201.0}=0x0 +phy_chain_rx_polarity_flip_physical{202.0}=0x0 +phy_chain_rx_polarity_flip_physical{203.0}=0x1 +phy_chain_rx_polarity_flip_physical{204.0}=0x0 +phy_chain_tx_polarity_flip_physical{201.0}=0x1 +phy_chain_tx_polarity_flip_physical{202.0}=0x1 +phy_chain_tx_polarity_flip_physical{203.0}=0x0 +phy_chain_tx_polarity_flip_physical{204.0}=0x1 +#Port58 +#FC54 +#dport_map_port_124=107 +dport_map_port_124=217 +portmap_124=217:100 +phy_chain_rx_lane_map_physical{217.0}=0x1203 +phy_chain_tx_lane_map_physical{217.0}=0x2031 +phy_chain_rx_polarity_flip_physical{217.0}=0x1 +phy_chain_rx_polarity_flip_physical{218.0}=0x0 +phy_chain_rx_polarity_flip_physical{219.0}=0x1 +phy_chain_rx_polarity_flip_physical{220.0}=0x1 +phy_chain_tx_polarity_flip_physical{217.0}=0x1 +phy_chain_tx_polarity_flip_physical{218.0}=0x0 +phy_chain_tx_polarity_flip_physical{219.0}=0x1 +phy_chain_tx_polarity_flip_physical{220.0}=0x0 +#Port59 +#FC52 +#dport_map_port_125=108 +dport_map_port_125=209 +portmap_125=209:100 +phy_chain_rx_lane_map_physical{209.0}=0x0321 +phy_chain_tx_lane_map_physical{209.0}=0x3102 +phy_chain_rx_polarity_flip_physical{209.0}=0x0 +phy_chain_rx_polarity_flip_physical{210.0}=0x0 +phy_chain_rx_polarity_flip_physical{211.0}=0x1 +phy_chain_rx_polarity_flip_physical{212.0}=0x0 +phy_chain_tx_polarity_flip_physical{209.0}=0x0 +phy_chain_tx_polarity_flip_physical{210.0}=0x0 +phy_chain_tx_polarity_flip_physical{211.0}=0x1 +phy_chain_tx_polarity_flip_physical{212.0}=0x0 +#Port60 +#FC56 +#dport_map_port_126=109 +dport_map_port_126=225 +portmap_126=225:100 +phy_chain_rx_lane_map_physical{225.0}=0x2103 +phy_chain_tx_lane_map_physical{225.0}=0x2031 +phy_chain_rx_polarity_flip_physical{225.0}=0x0 +phy_chain_rx_polarity_flip_physical{226.0}=0x0 +phy_chain_rx_polarity_flip_physical{227.0}=0x1 +phy_chain_rx_polarity_flip_physical{228.0}=0x1 +phy_chain_tx_polarity_flip_physical{225.0}=0x1 +phy_chain_tx_polarity_flip_physical{226.0}=0x0 +phy_chain_tx_polarity_flip_physical{227.0}=0x1 +phy_chain_tx_polarity_flip_physical{228.0}=0x1 +#Port61 +#FC58 +#dport_map_port_127=110 +dport_map_port_127=233 +portmap_127=233:100 +phy_chain_rx_lane_map_physical{233.0}=0x2130 +phy_chain_tx_lane_map_physical{233.0}=0x0312 +phy_chain_rx_polarity_flip_physical{233.0}=0x0 +phy_chain_rx_polarity_flip_physical{234.0}=0x1 +phy_chain_rx_polarity_flip_physical{235.0}=0x1 +phy_chain_rx_polarity_flip_physical{236.0}=0x0 +phy_chain_tx_polarity_flip_physical{233.0}=0x0 +phy_chain_tx_polarity_flip_physical{234.0}=0x0 +phy_chain_tx_polarity_flip_physical{235.0}=0x1 +phy_chain_tx_polarity_flip_physical{236.0}=0x0 +#Port62 +#FC62 +#dport_map_port_128=111 +dport_map_port_128=249 +portmap_128=249:100 +phy_chain_rx_lane_map_physical{249.0}=0x1302 +phy_chain_tx_lane_map_physical{249.0}=0x1302 +phy_chain_rx_polarity_flip_physical{249.0}=0x0 +phy_chain_rx_polarity_flip_physical{250.0}=0x1 +phy_chain_rx_polarity_flip_physical{251.0}=0x0 +phy_chain_rx_polarity_flip_physical{252.0}=0x1 +phy_chain_tx_polarity_flip_physical{249.0}=0x1 +phy_chain_tx_polarity_flip_physical{250.0}=0x1 +phy_chain_tx_polarity_flip_physical{251.0}=0x1 +phy_chain_tx_polarity_flip_physical{252.0}=0x1 +#Port63 +#FC60 +#dport_map_port_129=112 +dport_map_port_129=241 +portmap_129=241:100 +phy_chain_rx_lane_map_physical{241.0}=0x3012 +phy_chain_tx_lane_map_physical{241.0}=0x2301 +phy_chain_rx_polarity_flip_physical{241.0}=0x1 +phy_chain_rx_polarity_flip_physical{242.0}=0x1 +phy_chain_rx_polarity_flip_physical{243.0}=0x0 +phy_chain_rx_polarity_flip_physical{244.0}=0x1 +phy_chain_tx_polarity_flip_physical{241.0}=0x1 +phy_chain_tx_polarity_flip_physical{242.0}=0x0 +phy_chain_tx_polarity_flip_physical{243.0}=0x1 +phy_chain_tx_polarity_flip_physical{244.0}=0x0 diff --git a/device/accton/x86_64-accton_as7816_64x-r0/default_sku b/device/accton/x86_64-accton_as7816_64x-r0/default_sku new file mode 100644 index 00000000000..31d29c2deb8 --- /dev/null +++ b/device/accton/x86_64-accton_as7816_64x-r0/default_sku @@ -0,0 +1 @@ +Accton-AS7816-64X t1 diff --git a/device/accton/x86_64-accton_as7816_64x-r0/installer.conf b/device/accton/x86_64-accton_as7816_64x-r0/installer.conf new file mode 100644 index 00000000000..9fa12f88854 --- /dev/null +++ b/device/accton/x86_64-accton_as7816_64x-r0/installer.conf @@ -0,0 +1,2 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tg3.short_preamble=1 tg3.bcm5718s_reset=1" diff --git a/device/accton/x86_64-accton_as7816_64x-r0/led_proc_init.soc b/device/accton/x86_64-accton_as7816_64x-r0/led_proc_init.soc new file mode 100755 index 00000000000..75a36c6f9c6 --- /dev/null +++ b/device/accton/x86_64-accton_as7816_64x-r0/led_proc_init.soc @@ -0,0 +1,155 @@ +m CMIC_LEDUP0_CLK_PARAMS REFRESH_CYCLE_PERIOD=0xc00000 +m CMIC_LEDUP1_CLK_PARAMS REFRESH_CYCLE_PERIOD=0xc00000 +m CMIC_LEDUP2_CLK_PARAMS REFRESH_CYCLE_PERIOD=0xc00000 +m CMIC_LEDUP3_CLK_PARAMS REFRESH_CYCLE_PERIOD=0xc00000 + +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=63 REMAP_PORT_1=62 REMAP_PORT_2=61 REMAP_PORT_3=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=59 REMAP_PORT_5=58 REMAP_PORT_6=57 REMAP_PORT_7=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=55 REMAP_PORT_9=54 REMAP_PORT_10=53 REMAP_PORT_11=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=51 REMAP_PORT_13=50 REMAP_PORT_14=49 REMAP_PORT_15=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=47 REMAP_PORT_17=46 REMAP_PORT_18=45 REMAP_PORT_19=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=43 REMAP_PORT_21=42 REMAP_PORT_22=41 REMAP_PORT_23=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=39 REMAP_PORT_25=38 REMAP_PORT_26=37 REMAP_PORT_27=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=35 REMAP_PORT_29=34 REMAP_PORT_30=33 REMAP_PORT_31=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=31 REMAP_PORT_33=30 REMAP_PORT_34=29 REMAP_PORT_35=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=27 REMAP_PORT_37=26 REMAP_PORT_38=25 REMAP_PORT_39=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=23 REMAP_PORT_41=22 REMAP_PORT_42=21 REMAP_PORT_43=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=19 REMAP_PORT_45=18 REMAP_PORT_46=17 REMAP_PORT_47=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 REMAP_PORT_49=14 REMAP_PORT_50=13 REMAP_PORT_51=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 REMAP_PORT_53=10 REMAP_PORT_54=9 REMAP_PORT_55=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 + +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=3 REMAP_PORT_1=2 REMAP_PORT_2=1 REMAP_PORT_3=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=7 REMAP_PORT_5=6 REMAP_PORT_6=5 REMAP_PORT_7=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=11 REMAP_PORT_9=10 REMAP_PORT_10=9 REMAP_PORT_11=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=15 REMAP_PORT_13=14 REMAP_PORT_14=13 REMAP_PORT_15=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=19 REMAP_PORT_17=18 REMAP_PORT_18=17 REMAP_PORT_19=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=23 REMAP_PORT_21=22 REMAP_PORT_22=21 REMAP_PORT_23=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=27 REMAP_PORT_25=26 REMAP_PORT_26=25 REMAP_PORT_27=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=31 REMAP_PORT_29=30 REMAP_PORT_30=29 REMAP_PORT_31=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=35 REMAP_PORT_33=34 REMAP_PORT_34=33 REMAP_PORT_35=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=39 REMAP_PORT_37=38 REMAP_PORT_38=37 REMAP_PORT_39=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=43 REMAP_PORT_41=42 REMAP_PORT_42=41 REMAP_PORT_43=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=47 REMAP_PORT_45=46 REMAP_PORT_46=45 REMAP_PORT_47=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 REMAP_PORT_49=50 REMAP_PORT_50=49 REMAP_PORT_51=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 REMAP_PORT_53=54 REMAP_PORT_54=53 REMAP_PORT_55=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 REMAP_PORT_57=58 REMAP_PORT_58=57 REMAP_PORT_59=56 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=62 REMAP_PORT_62=61 REMAP_PORT_63=60 + +m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=63 REMAP_PORT_1=62 REMAP_PORT_2=61 REMAP_PORT_3=60 +m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=59 REMAP_PORT_5=58 REMAP_PORT_6=57 REMAP_PORT_7=56 +m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=55 REMAP_PORT_9=54 REMAP_PORT_10=53 REMAP_PORT_11=52 +m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=51 REMAP_PORT_13=50 REMAP_PORT_14=49 REMAP_PORT_15=48 +m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=47 REMAP_PORT_17=46 REMAP_PORT_18=45 REMAP_PORT_19=44 +m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=43 REMAP_PORT_21=42 REMAP_PORT_22=41 REMAP_PORT_23=40 +m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=39 REMAP_PORT_25=38 REMAP_PORT_26=37 REMAP_PORT_27=36 +m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=35 REMAP_PORT_29=34 REMAP_PORT_30=33 REMAP_PORT_31=32 +m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=31 REMAP_PORT_33=30 REMAP_PORT_34=29 REMAP_PORT_35=28 +m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=27 REMAP_PORT_37=26 REMAP_PORT_38=25 REMAP_PORT_39=24 +m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=23 REMAP_PORT_41=22 REMAP_PORT_42=21 REMAP_PORT_43=20 +m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=19 REMAP_PORT_45=18 REMAP_PORT_46=17 REMAP_PORT_47=16 +m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 REMAP_PORT_49=14 REMAP_PORT_50=13 REMAP_PORT_51=12 +m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 REMAP_PORT_53=10 REMAP_PORT_54=9 REMAP_PORT_55=8 +m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 + +m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=3 REMAP_PORT_1=2 REMAP_PORT_2=1 REMAP_PORT_3=0 +m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=7 REMAP_PORT_5=6 REMAP_PORT_6=5 REMAP_PORT_7=4 +m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=11 REMAP_PORT_9=10 REMAP_PORT_10=9 REMAP_PORT_11=8 +m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=15 REMAP_PORT_13=14 REMAP_PORT_14=13 REMAP_PORT_15=12 +m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=19 REMAP_PORT_17=18 REMAP_PORT_18=17 REMAP_PORT_19=16 +m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=23 REMAP_PORT_21=22 REMAP_PORT_22=21 REMAP_PORT_23=20 +m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=27 REMAP_PORT_25=26 REMAP_PORT_26=25 REMAP_PORT_27=24 +m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=31 REMAP_PORT_29=30 REMAP_PORT_30=29 REMAP_PORT_31=28 +m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=35 REMAP_PORT_33=34 REMAP_PORT_34=33 REMAP_PORT_35=32 +m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=39 REMAP_PORT_37=38 REMAP_PORT_38=37 REMAP_PORT_39=36 +m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=43 REMAP_PORT_41=42 REMAP_PORT_42=41 REMAP_PORT_43=40 +m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=47 REMAP_PORT_45=46 REMAP_PORT_46=45 REMAP_PORT_47=44 +m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 REMAP_PORT_49=50 REMAP_PORT_50=49 REMAP_PORT_51=48 +m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 REMAP_PORT_53=54 REMAP_PORT_54=53 REMAP_PORT_55=52 +m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 REMAP_PORT_57=58 REMAP_PORT_58=57 REMAP_PORT_59=56 +m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=62 REMAP_PORT_62=61 REMAP_PORT_63=60 + +led 0 stop +led 0 prog \ + 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 E0 \ + 02 FB 42 40 06 F9 D2 00 74 1E 02 F9 42 03 67 AC \ + 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 \ + 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC \ + 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 \ + 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 \ + 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 \ + F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 \ + 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF \ + 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 \ + 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC \ + 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 \ + 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 \ + 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 98 67 \ + 84 57 80 18 71 EB 67 84 67 98 57 67 84 67 84 57 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + + +led 1 stop +led 1 prog \ + 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 E0 \ + 02 FB 42 40 06 F9 D2 00 74 1E 02 F9 42 03 67 AC \ + 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 \ + 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC \ + 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 \ + 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 \ + 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 \ + F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 \ + 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF \ + 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 \ + 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC \ + 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 \ + 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 \ + 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 98 67 \ + 84 57 80 18 71 EB 67 84 67 98 57 67 84 67 84 57 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +led 2 stop +led 2 prog \ + 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 E0 \ + 02 FB 42 40 06 F9 D2 00 74 1E 02 F9 42 03 67 AC \ + 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 \ + 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC \ + 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 \ + 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 \ + 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 \ + F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 \ + 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF \ + 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 \ + 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC \ + 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 \ + 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 \ + 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 98 67 \ + 84 57 80 18 71 EB 67 84 67 98 57 67 84 67 84 57 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +led 3 stop +led 3 prog \ + 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 E0 \ + 02 FB 42 40 06 F9 D2 00 74 1E 02 F9 42 03 67 AC \ + 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 \ + 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC \ + 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 \ + 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 \ + 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 \ + F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 \ + 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF \ + 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 \ + 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC \ + 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 \ + 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 \ + 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 98 67 \ + 84 57 80 18 71 EB 67 84 67 98 57 67 84 67 84 57 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +led auto on +led 0 start +led 1 start +led 2 start +led 3 start diff --git a/device/accton/x86_64-accton_as7816_64x-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as7816_64x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..1e7d1046d93 --- /dev/null +++ b/device/accton/x86_64-accton_as7816_64x-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as7816_64x-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as7816_64x-r0/plugins/psuutil.py new file mode 100755 index 00000000000..707c7c897c8 --- /dev/null +++ b/device/accton/x86_64-accton_as7816_64x-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 1: "10-0053", + 2: "9-0050", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as7816_64x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7816_64x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..b5e76ec8385 --- /dev/null +++ b/device/accton/x86_64-accton_as7816_64x-r0/plugins/sfputil.py @@ -0,0 +1,268 @@ +#!/usr/bin/env python + +try: + import time + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +#from xcvrd +SFP_STATUS_INSERTED = '1' +SFP_STATUS_REMOVED = '0' + +class SfpUtil(SfpUtilBase): + """Platform specific SfpUtill class""" + + _port_start = 1 + _port_end = 64 + ports_in_block = 64 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 61 : 25, + 62 : 26, + 63 : 27, + 64 : 28, + 55 : 29, + 56 : 30, + 53 : 31, + 54 : 32, + 9 : 33, + 10 : 34, + 11 : 35, + 12 : 36, + 1 : 37, + 2 : 38, + 3 : 39, + 4 : 40, + 6 : 41, + 5 : 42, + 8 : 43, + 7 : 44, + 13 : 45, + 14 : 46, + 15 : 47, + 16 : 48, + 17 : 49, + 18 : 50, + 19 : 51, + 20 : 52, + 25 : 53, + 26 : 54, + 27 : 55, + 28 : 56, + 29 : 57, + 30 : 58, + 31 : 59, + 32 : 60, + 21 : 61, + 22 : 62, + 23 : 63, + 24 : 64, + 41 : 65, + 42 : 66, + 43 : 67, + 44 : 68, + 33 : 69, + 34 : 70, + 35 : 71, + 36 : 72, + 45 : 73, + 46 : 74, + 47 : 75, + 48 : 76, + 37 : 77, + 38 : 78, + 39 : 79, + 40 : 80, + 57 : 81, + 58 : 82, + 59 : 83, + 60 : 84, + 49 : 85, + 50 : 86, + 51 : 87, + 52 : 88,} + + _qsfp_ports = range(0, ports_in_block + 1) + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(self.port_start, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self._port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + path = "/sys/bus/i2c/devices/19-0060/module_reset_{0}" + port_ps = path.format(port_num) + + try: + reg_file = open(port_ps, 'w') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #HW will clear reset after set. + reg_file.seek(0) + reg_file.write('1') + reg_file.close() + return True + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + path = "/sys/bus/i2c/devices/19-0060/module_present_{0}" + port_ps = path.format(port_num) + + try: + reg_file = open(port_ps) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if reg_value == '1': + return True + + return False + + @property + def port_start(self): + return self._port_start + + @property + def port_end(self): + return self._port_end + + @property + def qsfp_ports(self): + return range(0, self.ports_in_block + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False + + eeprom = open(self.port_to_eeprom_mapping[port_num], "rb") + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if ((lpmode & 0x3) == 0x3): + return True # Low Power Mode if "Power override" bit is 1 and "Power set" bit is 1 + else: + return False # High Power Mode if one of the following conditions is matched: + # 1. "Power override" bit is 0 + # 2. "Power override" bit is 1 and "Power set" bit is 0 + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b") + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + @property + def _get_present_bitmap(self): + nodes = [] + + cpld_path = "/sys/bus/i2c/devices/19-0060/" + nodes.append(cpld_path + "module_present_all") + + bitmap = "" + for node in nodes: + try: + reg_file = open(node) + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + bitmap += reg_file.readline().rstrip() + " " + reg_file.close() + + rev = bitmap.split(" ") + rev = "".join(rev[::-1]) + return int(rev,16) + + + data = {'valid':0, 'last':0, 'present':0} + def get_transceiver_change_event(self, timeout=2000): + now = time.time() + port_dict = {} + port = 0 + + if timeout < 1000: + timeout = 1000 + timeout = (timeout) / float(1000) # Convert to secs + + if now < (self.data['last'] + timeout) and self.data['valid']: + return True, {} + + reg_value = self._get_present_bitmap + reg_value = ~reg_value + changed_ports = self.data['present'] ^ reg_value + if changed_ports: + for port in range (self.port_start, self.port_end+1): + # Mask off the bit corresponding to our port + mask = (1 << (port - 1)) + if changed_ports & mask: + if (reg_value & mask) == 0: + port_dict[port] = SFP_STATUS_REMOVED + else: + port_dict[port] = SFP_STATUS_INSERTED + + # Update cache + self.data['present'] = reg_value + self.data['last'] = now + self.data['valid'] = 1 + return True, port_dict + else: + return True, {} + return False, {} + diff --git a/device/accton/x86_64-accton_as7816_64x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7816_64x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as7816_64x-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_as9716_32d-r0/Accton-AS9716-32D/port_config.ini b/device/accton/x86_64-accton_as9716_32d-r0/Accton-AS9716-32D/port_config.ini new file mode 100644 index 00000000000..a13514fcd90 --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/Accton-AS9716-32D/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 73,74,75,76,77,78,79,80 fourHundredGigE1 0 400000 +Ethernet4 65,66,67,68,69,70,71,72 fourHundredGigE2 1 400000 +Ethernet8 81,82,83,84,85,86,87,88 fourHundredGigE3 2 400000 +Ethernet12 89,90,91,92,93,94,95,96 fourHundredGigE4 3 400000 +Ethernet16 97,98,99,100,101,102,103,104 fourHundredGigE5 4 400000 +Ethernet20 105,106,107,108,109,110,111,112 fourHundredGigE6 5 400000 +Ethernet24 113,114,115,116,117,118,119,120 fourHundredGigE7 6 400000 +Ethernet28 121,122,123,124,125,126,127,128 fourHundredGigE8 7 400000 +Ethernet32 41,42,43,44,45,46,47,48 fourHundredGigE9 8 400000 +Ethernet36 33,34,35,36,37,38,39,40 fourHundredGigE10 9 400000 +Ethernet40 49,50,51,52,53,54,55,56 fourHundredGigE11 10 400000 +Ethernet44 57,58,59,60,61,62,63,64 fourHundredGigE12 11 400000 +Ethernet48 129,130,131,132,133,134,135,136 fourHundredGigE13 12 400000 +Ethernet52 137,138,139,140,141,142,143,144 fourHundredGigE14 13 400000 +Ethernet56 145,146,147,148,149,150,151,152 fourHundredGigE15 14 400000 +Ethernet60 153,154,155,156,157,158,159,160 fourHundredGigE16 15 400000 +Ethernet64 169,170,171,172,173,174,175,176 fourHundredGigE17 16 400000 +Ethernet68 161,162,163,164,165,166,167,168 fourHundredGigE18 17 400000 +Ethernet72 177,178,179,180,181,182,183,184 fourHundredGigE19 18 400000 +Ethernet76 185,186,187,188,189,190,191,192 fourHundredGigE20 19 400000 +Ethernet80 1,2,3,4,5,6,7,8 fourHundredGigE21 20 400000 +Ethernet84 9,10,11,12,13,14,15,16 fourHundredGigE22 21 400000 +Ethernet88 17,18,19,20,21,22,23,24 fourHundredGigE23 22 400000 +Ethernet92 25,26,27,28,29,30,31,32 fourHundredGigE24 23 400000 +Ethernet96 201,202,203,204,205,206,207,208 fourHundredGigE25 24 400000 +Ethernet100 193,194,195,196,197,198,199,200 fourHundredGigE26 25 400000 +Ethernet104 217,218,219,220,221,222,223,224 fourHundredGigE27 26 400000 +Ethernet108 209,210,211,212,213,214,215,216 fourHundredGigE28 27 400000 +Ethernet112 233,234,235,236,237,238,239,240 fourHundredGigE29 28 400000 +Ethernet116 225,226,227,228,229,230,231,232 fourHundredGigE30 29 400000 +Ethernet120 249,250,251,252,253,254,255,256 fourHundredGigE31 30 400000 +Ethernet124 241,242,243,244,245,246,247,248 fourHundredGigE32 31 400000 diff --git a/device/accton/x86_64-accton_as9716_32d-r0/Accton-AS9716-32D/sai.profile b/device/accton/x86_64-accton_as9716_32d-r0/Accton-AS9716-32D/sai.profile new file mode 100644 index 00000000000..be39b1f961f --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/Accton-AS9716-32D/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/etc/bcm/th3-as9716-32x400G.config.bcm diff --git a/device/accton/x86_64-accton_as9716_32d-r0/default_sku b/device/accton/x86_64-accton_as9716_32d-r0/default_sku new file mode 100644 index 00000000000..ccebae89a34 --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/default_sku @@ -0,0 +1 @@ +Accton-AS9716-32D t1 diff --git a/device/accton/x86_64-accton_as9716_32d-r0/installer.conf b/device/accton/x86_64-accton_as9716_32d-r0/installer.conf new file mode 100644 index 00000000000..d5f9419d77f --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off" diff --git a/device/accton/x86_64-accton_as9716_32d-r0/plugins/eeprom.py b/device/accton/x86_64-accton_as9716_32d-r0/plugins/eeprom.py new file mode 100644 index 00000000000..1e7d1046d93 --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/accton/x86_64-accton_as9716_32d-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as9716_32d-r0/plugins/psuutil.py new file mode 100644 index 00000000000..25eceb7428c --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 2: "10-0051", + 1: "9-0050", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/accton/x86_64-accton_as9716_32d-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as9716_32d-r0/plugins/sfputil.py new file mode 100644 index 00000000000..17799035963 --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/plugins/sfputil.py @@ -0,0 +1,150 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 33 + PORTS_IN_BLOCK = 34 + + BASE_OOM_PATH = "/sys/bus/i2c/devices/{0}-0050/" + BASE_CPLD1_PATH = "/sys/bus/i2c/devices/20-0061/" + BASE_CPLD2_PATH = "/sys/bus/i2c/devices/21-0062/" + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 0: [1, 25], + 1: [2, 26], + 2: [3, 27], + 3: [4, 28], + 4: [5, 29], + 5: [6, 30], + 6: [7, 31], + 7: [8, 32], + 8: [9, 33], + 9: [10, 34], + 10: [11, 35], + 11: [12, 36], + 12: [13, 37], + 13: [14, 38], + 14: [15, 39], + 15: [16, 40], + 16: [17, 41], + 17: [18, 42], + 18: [19, 43], + 19: [20, 44], + 20: [21, 45], + 21: [22, 46], + 22: [23, 47], + 23: [24, 48], + 24: [25, 49], + 25: [26, 50], + 26: [27, 51], + 27: [28, 52], + 28: [29, 53], + 29: [30, 54], + 30: [31, 55], + 31: [32, 56], + 32: [33, 57], + 33: [34, 58], + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = self.BASE_OOM_PATH + "eeprom" + + for x in range(0, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x][1] + ) + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < 16 : + present_path = self.BASE_CPLD1_PATH + "module_present_" + str(port_num+1) + else: + present_path = self.BASE_CPLD2_PATH + "module_present_" + str(port_num+1) + self.__port_to_is_present = present_path + + try: + val_file = open(self.__port_to_is_present) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + raise NotImplementedError + + def set_low_power_mode(self, port_num, lpmode): + raise NotImplementedError + + def reset(self, port_num): + if port_num < self.port_start or port_num > self.port_end: + return False + + if port_num < 16 : + mod_rst_path = self.BASE_CPLD1_PATH + "module_reset_" + str(port_num+1) + else: + mod_rst_path = self.BASE_CPLD2_PATH + "module_reset_" + str(port_num+1) + + self.__port_to_mod_rst = mod_rst_path + try: + reg_file = open(self.__port_to_mod_rst, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = '1' + + reg_file.write(reg_value) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError \ No newline at end of file diff --git a/device/accton/x86_64-accton_as9716_32d-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as9716_32d-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/accton/x86_64-accton_as9716_32d-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/accton/x86_64-accton_minipack-r0/Accton-MINIPACK/config_16Q_FEC544_EVTA_100G.bcm b/device/accton/x86_64-accton_minipack-r0/Accton-MINIPACK/config_16Q_FEC544_EVTA_100G.bcm new file mode 100755 index 00000000000..9f4066cc736 --- /dev/null +++ b/device/accton/x86_64-accton_minipack-r0/Accton-MINIPACK/config_16Q_FEC544_EVTA_100G.bcm @@ -0,0 +1,1485 @@ +pbmp_xport_xe.0=0x3ffffffffffffffffffffffffffffffffffffffe +ccm_dma_enable=0 +ccmdma_intr_enable=0 +ctr_evict_enable=0 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +phy_enable=0 +phy_null=1 +pll_bypass=1 + +init_all_modules=0 +core_clock_frequency=1325 +dpr_clock_frequency=1000 +device_clock_frequency=1325 +port_flex_enable=1 + +#firmware load method, use fast load +load_firmware=0x2 + +serdes_lane_config_dfe=on +serdes_lane_config_media_type=backplane + +port_fec_1=3 +port_fec_2=3 +port_fec_3=3 +port_fec_4=3 +port_fec_5=3 +port_fec_6=3 +port_fec_7=3 +port_fec_8=3 +port_fec_9=3 +port_fec_10=3 +port_fec_11=3 +port_fec_12=3 +port_fec_13=3 +port_fec_14=3 +port_fec_15=3 +port_fec_16=3 +port_fec_20=3 +port_fec_21=3 +port_fec_22=3 +port_fec_23=3 +port_fec_24=3 +port_fec_25=3 +port_fec_26=3 +port_fec_27=3 +port_fec_28=3 +port_fec_29=3 +port_fec_30=3 +port_fec_31=3 +port_fec_32=3 +port_fec_33=3 +port_fec_34=3 +port_fec_35=3 +port_fec_40=3 +port_fec_41=3 +port_fec_42=3 +port_fec_43=3 +port_fec_44=3 +port_fec_45=3 +port_fec_46=3 +port_fec_47=3 +port_fec_48=3 +port_fec_49=3 +port_fec_50=3 +port_fec_51=3 +port_fec_52=3 +port_fec_53=3 +port_fec_54=3 +port_fec_55=3 +port_fec_60=3 +port_fec_61=3 +port_fec_62=3 +port_fec_63=3 +port_fec_64=3 +port_fec_65=3 +port_fec_66=3 +port_fec_67=3 +port_fec_68=3 +port_fec_69=3 +port_fec_70=3 +port_fec_71=3 +port_fec_72=3 +port_fec_73=3 +port_fec_74=3 +port_fec_75=3 +port_fec_80=3 +port_fec_81=3 +port_fec_82=3 +port_fec_83=3 +port_fec_84=3 +port_fec_85=3 +port_fec_86=3 +port_fec_87=3 +port_fec_88=3 +port_fec_89=3 +port_fec_90=3 +port_fec_91=3 +port_fec_92=3 +port_fec_93=3 +port_fec_94=3 +port_fec_95=3 +port_fec_100=3 +port_fec_101=3 +port_fec_102=3 +port_fec_103=3 +port_fec_104=3 +port_fec_105=3 +port_fec_106=3 +port_fec_107=3 +port_fec_108=3 +port_fec_109=3 +port_fec_110=3 +port_fec_111=3 +port_fec_112=3 +port_fec_113=3 +port_fec_114=3 +port_fec_115=3 +port_fec_120=3 +port_fec_121=3 +port_fec_122=3 +port_fec_123=3 +port_fec_124=3 +port_fec_125=3 +port_fec_126=3 +port_fec_127=3 +port_fec_128=3 +port_fec_129=3 +port_fec_130=3 +port_fec_131=3 +port_fec_132=3 +port_fec_133=3 +port_fec_134=3 +port_fec_135=3 +port_fec_140=3 +port_fec_141=3 +port_fec_142=3 +port_fec_143=3 +port_fec_144=3 +port_fec_145=3 +port_fec_146=3 +port_fec_147=3 +port_fec_148=3 +port_fec_149=3 +port_fec_150=3 +port_fec_151=3 +port_fec_152=3 +port_fec_153=3 +port_fec_154=3 +port_fec_155=3 + +dport_map_port_1=3 +dport_map_port_2=4 +dport_map_port_3=1 +dport_map_port_4=2 +portmap_1=1:100 +portmap_2=3:100 +portmap_3=5:100 +portmap_4=7:100 +phy_chain_rx_lane_map_physical{1.0}=0x32145670 +phy_chain_rx_lane_map_physical{2.0}=0x32145670 +phy_chain_rx_lane_map_physical{3.0}=0x32145670 +phy_chain_rx_lane_map_physical{4.0}=0x32145670 +phy_chain_rx_lane_map_physical{5.0}=0x32145670 +phy_chain_rx_lane_map_physical{6.0}=0x32145670 +phy_chain_rx_lane_map_physical{7.0}=0x32145670 +phy_chain_rx_lane_map_physical{8.0}=0x32145670 +phy_chain_tx_lane_map_physical{1.0}=0x32046751 +phy_chain_tx_lane_map_physical{2.0}=0x32046751 +phy_chain_tx_lane_map_physical{3.0}=0x32046751 +phy_chain_tx_lane_map_physical{4.0}=0x32046751 +phy_chain_tx_lane_map_physical{5.0}=0x32046751 +phy_chain_tx_lane_map_physical{6.0}=0x32046751 +phy_chain_tx_lane_map_physical{7.0}=0x32046751 +phy_chain_tx_lane_map_physical{8.0}=0x32046751 +serdes_core_rx_polarity_flip_physical{1}=0xA4 +serdes_core_rx_polarity_flip_physical{2}=0xA4 +serdes_core_rx_polarity_flip_physical{3}=0xA4 +serdes_core_rx_polarity_flip_physical{4}=0xA4 +serdes_core_rx_polarity_flip_physical{5}=0xA4 +serdes_core_rx_polarity_flip_physical{6}=0xA4 +serdes_core_rx_polarity_flip_physical{7}=0xA4 +serdes_core_rx_polarity_flip_physical{8}=0xA4 +serdes_core_tx_polarity_flip_physical{1}=0xE6 +serdes_core_tx_polarity_flip_physical{2}=0xE6 +serdes_core_tx_polarity_flip_physical{3}=0xE6 +serdes_core_tx_polarity_flip_physical{4}=0xE6 +serdes_core_tx_polarity_flip_physical{5}=0xE6 +serdes_core_tx_polarity_flip_physical{6}=0xE6 +serdes_core_tx_polarity_flip_physical{7}=0xE6 +serdes_core_tx_polarity_flip_physical{8}=0xE6 + +dport_map_port_5=19 +dport_map_port_6=20 +dport_map_port_7=17 +dport_map_port_8=18 +portmap_5=9:100 +portmap_6=11:100 +portmap_7=13:100 +portmap_8=15:100 +phy_chain_rx_lane_map_physical{9.0}=0x45673021 +phy_chain_rx_lane_map_physical{10.0}=0x45673021 +phy_chain_rx_lane_map_physical{11.0}=0x45673021 +phy_chain_rx_lane_map_physical{12.0}=0x45673021 +phy_chain_rx_lane_map_physical{13.0}=0x45673021 +phy_chain_rx_lane_map_physical{14.0}=0x45673021 +phy_chain_rx_lane_map_physical{15.0}=0x45673021 +phy_chain_rx_lane_map_physical{16.0}=0x45673021 +phy_chain_tx_lane_map_physical{9.0}=0x13240756 +phy_chain_tx_lane_map_physical{10.0}=0x13240756 +phy_chain_tx_lane_map_physical{11.0}=0x13240756 +phy_chain_tx_lane_map_physical{12.0}=0x13240756 +phy_chain_tx_lane_map_physical{13.0}=0x13240756 +phy_chain_tx_lane_map_physical{14.0}=0x13240756 +phy_chain_tx_lane_map_physical{15.0}=0x13240756 +phy_chain_tx_lane_map_physical{16.0}=0x13240756 +serdes_core_rx_polarity_flip_physical{9}=0x43 +serdes_core_rx_polarity_flip_physical{10}=0x43 +serdes_core_rx_polarity_flip_physical{11}=0x43 +serdes_core_rx_polarity_flip_physical{12}=0x43 +serdes_core_rx_polarity_flip_physical{13}=0x43 +serdes_core_rx_polarity_flip_physical{14}=0x43 +serdes_core_rx_polarity_flip_physical{15}=0x43 +serdes_core_rx_polarity_flip_physical{16}=0x43 +serdes_core_tx_polarity_flip_physical{9}=0x7A +serdes_core_tx_polarity_flip_physical{10}=0x7A +serdes_core_tx_polarity_flip_physical{11}=0x7A +serdes_core_tx_polarity_flip_physical{12}=0x7A +serdes_core_tx_polarity_flip_physical{13}=0x7A +serdes_core_tx_polarity_flip_physical{14}=0x7A +serdes_core_tx_polarity_flip_physical{15}=0x7A +serdes_core_tx_polarity_flip_physical{16}=0x7A + +dport_map_port_9=35 +dport_map_port_10=36 +dport_map_port_11=33 +dport_map_port_12=34 +portmap_9=17:100 +portmap_10=19:100 +portmap_11=21:100 +portmap_12=23:100 +phy_chain_rx_lane_map_physical{17.0}=0x01234576 +phy_chain_rx_lane_map_physical{18.0}=0x01234576 +phy_chain_rx_lane_map_physical{19.0}=0x01234576 +phy_chain_rx_lane_map_physical{20.0}=0x01234576 +phy_chain_rx_lane_map_physical{21.0}=0x01234576 +phy_chain_rx_lane_map_physical{22.0}=0x01234576 +phy_chain_rx_lane_map_physical{23.0}=0x01234576 +phy_chain_rx_lane_map_physical{24.0}=0x01234576 +phy_chain_tx_lane_map_physical{17.0}=0x67451032 +phy_chain_tx_lane_map_physical{18.0}=0x67451032 +phy_chain_tx_lane_map_physical{19.0}=0x67451032 +phy_chain_tx_lane_map_physical{20.0}=0x67451032 +phy_chain_tx_lane_map_physical{21.0}=0x67451032 +phy_chain_tx_lane_map_physical{22.0}=0x67451032 +phy_chain_tx_lane_map_physical{23.0}=0x67451032 +phy_chain_tx_lane_map_physical{24.0}=0x67451032 +serdes_core_rx_polarity_flip_physical{17}=0x2E +serdes_core_rx_polarity_flip_physical{18}=0x2E +serdes_core_rx_polarity_flip_physical{19}=0x2E +serdes_core_rx_polarity_flip_physical{20}=0x2E +serdes_core_rx_polarity_flip_physical{21}=0x2E +serdes_core_rx_polarity_flip_physical{22}=0x2E +serdes_core_rx_polarity_flip_physical{23}=0x2E +serdes_core_rx_polarity_flip_physical{24}=0x2E +serdes_core_tx_polarity_flip_physical{17}=0xD5 +serdes_core_tx_polarity_flip_physical{18}=0xD5 +serdes_core_tx_polarity_flip_physical{19}=0xD5 +serdes_core_tx_polarity_flip_physical{20}=0xD5 +serdes_core_tx_polarity_flip_physical{21}=0xD5 +serdes_core_tx_polarity_flip_physical{22}=0xD5 +serdes_core_tx_polarity_flip_physical{23}=0xD5 +serdes_core_tx_polarity_flip_physical{24}=0xD5 + +dport_map_port_13=51 +dport_map_port_14=52 +dport_map_port_15=49 +dport_map_port_16=50 +portmap_13=25:100 +portmap_14=27:100 +portmap_15=29:100 +portmap_16=31:100 +phy_chain_rx_lane_map_physical{25.0}=0x45017263 +phy_chain_rx_lane_map_physical{26.0}=0x45017263 +phy_chain_rx_lane_map_physical{27.0}=0x45017263 +phy_chain_rx_lane_map_physical{28.0}=0x45017263 +phy_chain_rx_lane_map_physical{29.0}=0x45017263 +phy_chain_rx_lane_map_physical{30.0}=0x45017263 +phy_chain_rx_lane_map_physical{31.0}=0x45017263 +phy_chain_rx_lane_map_physical{32.0}=0x45017263 +phy_chain_tx_lane_map_physical{25.0}=0x30126547 +phy_chain_tx_lane_map_physical{26.0}=0x30126547 +phy_chain_tx_lane_map_physical{27.0}=0x30126547 +phy_chain_tx_lane_map_physical{28.0}=0x30126547 +phy_chain_tx_lane_map_physical{29.0}=0x30126547 +phy_chain_tx_lane_map_physical{30.0}=0x30126547 +phy_chain_tx_lane_map_physical{31.0}=0x30126547 +phy_chain_tx_lane_map_physical{32.0}=0x30126547 +serdes_core_rx_polarity_flip_physical{25}=0x91 +serdes_core_rx_polarity_flip_physical{26}=0x91 +serdes_core_rx_polarity_flip_physical{27}=0x91 +serdes_core_rx_polarity_flip_physical{28}=0x91 +serdes_core_rx_polarity_flip_physical{29}=0x91 +serdes_core_rx_polarity_flip_physical{30}=0x91 +serdes_core_rx_polarity_flip_physical{31}=0x91 +serdes_core_rx_polarity_flip_physical{32}=0x91 +serdes_core_tx_polarity_flip_physical{25}=0x57 +serdes_core_tx_polarity_flip_physical{26}=0x57 +serdes_core_tx_polarity_flip_physical{27}=0x57 +serdes_core_tx_polarity_flip_physical{28}=0x57 +serdes_core_tx_polarity_flip_physical{29}=0x57 +serdes_core_tx_polarity_flip_physical{30}=0x57 +serdes_core_tx_polarity_flip_physical{31}=0x57 +serdes_core_tx_polarity_flip_physical{32}=0x57 + +dport_map_port_20=7 +dport_map_port_21=8 +dport_map_port_22=5 +dport_map_port_23=6 +portmap_20=33:100 +portmap_21=35:100 +portmap_22=37:100 +portmap_23=39:100 +phy_chain_rx_lane_map_physical{33.0}=0x56321074 +phy_chain_rx_lane_map_physical{34.0}=0x56321074 +phy_chain_rx_lane_map_physical{35.0}=0x56321074 +phy_chain_rx_lane_map_physical{36.0}=0x56321074 +phy_chain_rx_lane_map_physical{37.0}=0x56321074 +phy_chain_rx_lane_map_physical{38.0}=0x56321074 +phy_chain_rx_lane_map_physical{39.0}=0x56321074 +phy_chain_rx_lane_map_physical{40.0}=0x56321074 +phy_chain_tx_lane_map_physical{33.0}=0x56103247 +phy_chain_tx_lane_map_physical{34.0}=0x56103247 +phy_chain_tx_lane_map_physical{35.0}=0x56103247 +phy_chain_tx_lane_map_physical{36.0}=0x56103247 +phy_chain_tx_lane_map_physical{37.0}=0x56103247 +phy_chain_tx_lane_map_physical{38.0}=0x56103247 +phy_chain_tx_lane_map_physical{39.0}=0x56103247 +phy_chain_tx_lane_map_physical{40.0}=0x56103247 +serdes_core_rx_polarity_flip_physical{33}=0x96 +serdes_core_rx_polarity_flip_physical{34}=0x96 +serdes_core_rx_polarity_flip_physical{35}=0x96 +serdes_core_rx_polarity_flip_physical{36}=0x96 +serdes_core_rx_polarity_flip_physical{37}=0x96 +serdes_core_rx_polarity_flip_physical{38}=0x96 +serdes_core_rx_polarity_flip_physical{39}=0x96 +serdes_core_rx_polarity_flip_physical{40}=0x96 +serdes_core_tx_polarity_flip_physical{33}=0x15 +serdes_core_tx_polarity_flip_physical{34}=0x15 +serdes_core_tx_polarity_flip_physical{35}=0x15 +serdes_core_tx_polarity_flip_physical{36}=0x15 +serdes_core_tx_polarity_flip_physical{37}=0x15 +serdes_core_tx_polarity_flip_physical{38}=0x15 +serdes_core_tx_polarity_flip_physical{39}=0x15 +serdes_core_tx_polarity_flip_physical{40}=0x15 + +dport_map_port_24=23 +dport_map_port_25=24 +dport_map_port_26=21 +dport_map_port_27=22 +portmap_24=41:100 +portmap_25=43:100 +portmap_26=45:100 +portmap_27=47:100 +phy_chain_rx_lane_map_physical{41.0}=0x76543210 +phy_chain_rx_lane_map_physical{42.0}=0x76543210 +phy_chain_rx_lane_map_physical{43.0}=0x76543210 +phy_chain_rx_lane_map_physical{44.0}=0x76543210 +phy_chain_rx_lane_map_physical{45.0}=0x76543210 +phy_chain_rx_lane_map_physical{46.0}=0x76543210 +phy_chain_rx_lane_map_physical{47.0}=0x76543210 +phy_chain_rx_lane_map_physical{48.0}=0x76543210 +phy_chain_tx_lane_map_physical{41.0}=0x30125476 +phy_chain_tx_lane_map_physical{42.0}=0x30125476 +phy_chain_tx_lane_map_physical{43.0}=0x30125476 +phy_chain_tx_lane_map_physical{44.0}=0x30125476 +phy_chain_tx_lane_map_physical{45.0}=0x30125476 +phy_chain_tx_lane_map_physical{46.0}=0x30125476 +phy_chain_tx_lane_map_physical{47.0}=0x30125476 +phy_chain_tx_lane_map_physical{48.0}=0x30125476 +serdes_core_rx_polarity_flip_physical{41}=0x5A +serdes_core_rx_polarity_flip_physical{42}=0x5A +serdes_core_rx_polarity_flip_physical{43}=0x5A +serdes_core_rx_polarity_flip_physical{44}=0x5A +serdes_core_rx_polarity_flip_physical{45}=0x5A +serdes_core_rx_polarity_flip_physical{46}=0x5A +serdes_core_rx_polarity_flip_physical{47}=0x5A +serdes_core_rx_polarity_flip_physical{48}=0x5A +serdes_core_tx_polarity_flip_physical{41}=0x65 +serdes_core_tx_polarity_flip_physical{42}=0x65 +serdes_core_tx_polarity_flip_physical{43}=0x65 +serdes_core_tx_polarity_flip_physical{44}=0x65 +serdes_core_tx_polarity_flip_physical{45}=0x65 +serdes_core_tx_polarity_flip_physical{46}=0x65 +serdes_core_tx_polarity_flip_physical{47}=0x65 +serdes_core_tx_polarity_flip_physical{48}=0x65 + +dport_map_port_28=39 +dport_map_port_29=40 +dport_map_port_30=37 +dport_map_port_31=38 +portmap_28=49:100 +portmap_29=51:100 +portmap_30=53:100 +portmap_31=55:100 +phy_chain_rx_lane_map_physical{49.0}=0x61023547 +phy_chain_rx_lane_map_physical{50.0}=0x61023547 +phy_chain_rx_lane_map_physical{51.0}=0x61023547 +phy_chain_rx_lane_map_physical{52.0}=0x61023547 +phy_chain_rx_lane_map_physical{53.0}=0x61023547 +phy_chain_rx_lane_map_physical{54.0}=0x61023547 +phy_chain_rx_lane_map_physical{55.0}=0x61023547 +phy_chain_rx_lane_map_physical{56.0}=0x61023547 +phy_chain_tx_lane_map_physical{49.0}=0x07541263 +phy_chain_tx_lane_map_physical{50.0}=0x07541263 +phy_chain_tx_lane_map_physical{51.0}=0x07541263 +phy_chain_tx_lane_map_physical{52.0}=0x07541263 +phy_chain_tx_lane_map_physical{53.0}=0x07541263 +phy_chain_tx_lane_map_physical{54.0}=0x07541263 +phy_chain_tx_lane_map_physical{55.0}=0x07541263 +phy_chain_tx_lane_map_physical{56.0}=0x07541263 +serdes_core_rx_polarity_flip_physical{49}=0x41 +serdes_core_rx_polarity_flip_physical{50}=0x41 +serdes_core_rx_polarity_flip_physical{51}=0x41 +serdes_core_rx_polarity_flip_physical{52}=0x41 +serdes_core_rx_polarity_flip_physical{53}=0x41 +serdes_core_rx_polarity_flip_physical{54}=0x41 +serdes_core_rx_polarity_flip_physical{55}=0x41 +serdes_core_rx_polarity_flip_physical{56}=0x41 +serdes_core_tx_polarity_flip_physical{49}=0x99 +serdes_core_tx_polarity_flip_physical{50}=0x99 +serdes_core_tx_polarity_flip_physical{51}=0x99 +serdes_core_tx_polarity_flip_physical{52}=0x99 +serdes_core_tx_polarity_flip_physical{53}=0x99 +serdes_core_tx_polarity_flip_physical{54}=0x99 +serdes_core_tx_polarity_flip_physical{55}=0x99 +serdes_core_tx_polarity_flip_physical{56}=0x99 + +dport_map_port_32=55 +dport_map_port_33=56 +dport_map_port_34=53 +dport_map_port_35=54 +portmap_32=57:100 +portmap_33=59:100 +portmap_34=61:100 +portmap_35=63:100 +phy_chain_rx_lane_map_physical{57.0}=0x45601273 +phy_chain_rx_lane_map_physical{58.0}=0x45601273 +phy_chain_rx_lane_map_physical{59.0}=0x45601273 +phy_chain_rx_lane_map_physical{60.0}=0x45601273 +phy_chain_rx_lane_map_physical{61.0}=0x45601273 +phy_chain_rx_lane_map_physical{62.0}=0x45601273 +phy_chain_rx_lane_map_physical{63.0}=0x45601273 +phy_chain_rx_lane_map_physical{64.0}=0x45601273 +phy_chain_tx_lane_map_physical{57.0}=0x76231045 +phy_chain_tx_lane_map_physical{58.0}=0x76231045 +phy_chain_tx_lane_map_physical{59.0}=0x76231045 +phy_chain_tx_lane_map_physical{60.0}=0x76231045 +phy_chain_tx_lane_map_physical{61.0}=0x76231045 +phy_chain_tx_lane_map_physical{62.0}=0x76231045 +phy_chain_tx_lane_map_physical{63.0}=0x76231045 +phy_chain_tx_lane_map_physical{64.0}=0x76231045 +serdes_core_rx_polarity_flip_physical{57}=0x49 +serdes_core_rx_polarity_flip_physical{58}=0x49 +serdes_core_rx_polarity_flip_physical{59}=0x49 +serdes_core_rx_polarity_flip_physical{60}=0x49 +serdes_core_rx_polarity_flip_physical{61}=0x49 +serdes_core_rx_polarity_flip_physical{62}=0x49 +serdes_core_rx_polarity_flip_physical{63}=0x49 +serdes_core_rx_polarity_flip_physical{64}=0x49 +serdes_core_tx_polarity_flip_physical{57}=0x25 +serdes_core_tx_polarity_flip_physical{58}=0x25 +serdes_core_tx_polarity_flip_physical{59}=0x25 +serdes_core_tx_polarity_flip_physical{60}=0x25 +serdes_core_tx_polarity_flip_physical{61}=0x25 +serdes_core_tx_polarity_flip_physical{62}=0x25 +serdes_core_tx_polarity_flip_physical{63}=0x25 +serdes_core_tx_polarity_flip_physical{64}=0x25 + +dport_map_port_40=11 +dport_map_port_41=12 +dport_map_port_42=9 +dport_map_port_43=10 +portmap_40=65:100 +portmap_41=67:100 +portmap_42=69:100 +portmap_43=71:100 +phy_chain_rx_lane_map_physical{65.0}=0x73210645 +phy_chain_rx_lane_map_physical{66.0}=0x73210645 +phy_chain_rx_lane_map_physical{67.0}=0x73210645 +phy_chain_rx_lane_map_physical{68.0}=0x73210645 +phy_chain_rx_lane_map_physical{69.0}=0x73210645 +phy_chain_rx_lane_map_physical{70.0}=0x73210645 +phy_chain_rx_lane_map_physical{71.0}=0x73210645 +phy_chain_rx_lane_map_physical{72.0}=0x73210645 +phy_chain_tx_lane_map_physical{65.0}=0x45213076 +phy_chain_tx_lane_map_physical{66.0}=0x45213076 +phy_chain_tx_lane_map_physical{67.0}=0x45213076 +phy_chain_tx_lane_map_physical{68.0}=0x45213076 +phy_chain_tx_lane_map_physical{69.0}=0x45213076 +phy_chain_tx_lane_map_physical{70.0}=0x45213076 +phy_chain_tx_lane_map_physical{71.0}=0x45213076 +phy_chain_tx_lane_map_physical{72.0}=0x45213076 +serdes_core_rx_polarity_flip_physical{65}=0xFF +serdes_core_rx_polarity_flip_physical{66}=0xFF +serdes_core_rx_polarity_flip_physical{67}=0xFF +serdes_core_rx_polarity_flip_physical{68}=0xFF +serdes_core_rx_polarity_flip_physical{69}=0xFF +serdes_core_rx_polarity_flip_physical{70}=0xFF +serdes_core_rx_polarity_flip_physical{71}=0xFF +serdes_core_rx_polarity_flip_physical{72}=0xFF +serdes_core_tx_polarity_flip_physical{65}=0x12 +serdes_core_tx_polarity_flip_physical{66}=0x12 +serdes_core_tx_polarity_flip_physical{67}=0x12 +serdes_core_tx_polarity_flip_physical{68}=0x12 +serdes_core_tx_polarity_flip_physical{69}=0x12 +serdes_core_tx_polarity_flip_physical{70}=0x12 +serdes_core_tx_polarity_flip_physical{71}=0x12 +serdes_core_tx_polarity_flip_physical{72}=0x12 + +dport_map_port_44=27 +dport_map_port_45=28 +dport_map_port_46=25 +dport_map_port_47=26 +portmap_44=73:100 +portmap_45=75:100 +portmap_46=77:100 +portmap_47=79:100 +phy_chain_rx_lane_map_physical{73.0}=0x67543201 +phy_chain_rx_lane_map_physical{74.0}=0x67543201 +phy_chain_rx_lane_map_physical{75.0}=0x67543201 +phy_chain_rx_lane_map_physical{76.0}=0x67543201 +phy_chain_rx_lane_map_physical{77.0}=0x67543201 +phy_chain_rx_lane_map_physical{78.0}=0x67543201 +phy_chain_rx_lane_map_physical{79.0}=0x67543201 +phy_chain_rx_lane_map_physical{80.0}=0x67543201 +phy_chain_tx_lane_map_physical{73.0}=0x31025476 +phy_chain_tx_lane_map_physical{74.0}=0x31025476 +phy_chain_tx_lane_map_physical{75.0}=0x31025476 +phy_chain_tx_lane_map_physical{76.0}=0x31025476 +phy_chain_tx_lane_map_physical{77.0}=0x31025476 +phy_chain_tx_lane_map_physical{78.0}=0x31025476 +phy_chain_tx_lane_map_physical{79.0}=0x31025476 +phy_chain_tx_lane_map_physical{80.0}=0x31025476 +serdes_core_rx_polarity_flip_physical{73}=0x1A +serdes_core_rx_polarity_flip_physical{74}=0x1A +serdes_core_rx_polarity_flip_physical{75}=0x1A +serdes_core_rx_polarity_flip_physical{76}=0x1A +serdes_core_rx_polarity_flip_physical{77}=0x1A +serdes_core_rx_polarity_flip_physical{78}=0x1A +serdes_core_rx_polarity_flip_physical{79}=0x1A +serdes_core_rx_polarity_flip_physical{80}=0x1A +serdes_core_tx_polarity_flip_physical{73}=0xFA +serdes_core_tx_polarity_flip_physical{74}=0xFA +serdes_core_tx_polarity_flip_physical{75}=0xFA +serdes_core_tx_polarity_flip_physical{76}=0xFA +serdes_core_tx_polarity_flip_physical{77}=0xFA +serdes_core_tx_polarity_flip_physical{78}=0xFA +serdes_core_tx_polarity_flip_physical{79}=0xFA +serdes_core_tx_polarity_flip_physical{80}=0xFA + +dport_map_port_48=43 +dport_map_port_49=44 +dport_map_port_50=41 +dport_map_port_51=42 +portmap_48=81:100 +portmap_49=83:100 +portmap_50=85:100 +portmap_51=87:100 +phy_chain_rx_lane_map_physical{81.0}=0x70124356 +phy_chain_rx_lane_map_physical{82.0}=0x70124356 +phy_chain_rx_lane_map_physical{83.0}=0x70124356 +phy_chain_rx_lane_map_physical{84.0}=0x70124356 +phy_chain_rx_lane_map_physical{85.0}=0x70124356 +phy_chain_rx_lane_map_physical{86.0}=0x70124356 +phy_chain_rx_lane_map_physical{87.0}=0x70124356 +phy_chain_rx_lane_map_physical{88.0}=0x70124356 +phy_chain_tx_lane_map_physical{81.0}=0x67541203 +phy_chain_tx_lane_map_physical{82.0}=0x67541203 +phy_chain_tx_lane_map_physical{83.0}=0x67541203 +phy_chain_tx_lane_map_physical{84.0}=0x67541203 +phy_chain_tx_lane_map_physical{85.0}=0x67541203 +phy_chain_tx_lane_map_physical{86.0}=0x67541203 +phy_chain_tx_lane_map_physical{87.0}=0x67541203 +phy_chain_tx_lane_map_physical{88.0}=0x67541203 +serdes_core_rx_polarity_flip_physical{81}=0x6D +serdes_core_rx_polarity_flip_physical{82}=0x6D +serdes_core_rx_polarity_flip_physical{83}=0x6D +serdes_core_rx_polarity_flip_physical{84}=0x6D +serdes_core_rx_polarity_flip_physical{85}=0x6D +serdes_core_rx_polarity_flip_physical{86}=0x6D +serdes_core_rx_polarity_flip_physical{87}=0x6D +serdes_core_rx_polarity_flip_physical{88}=0x6D +serdes_core_tx_polarity_flip_physical{81}=0xE4 +serdes_core_tx_polarity_flip_physical{82}=0xE4 +serdes_core_tx_polarity_flip_physical{83}=0xE4 +serdes_core_tx_polarity_flip_physical{84}=0xE4 +serdes_core_tx_polarity_flip_physical{85}=0xE4 +serdes_core_tx_polarity_flip_physical{86}=0xE4 +serdes_core_tx_polarity_flip_physical{87}=0xE4 +serdes_core_tx_polarity_flip_physical{88}=0xE4 + +dport_map_port_52=59 +dport_map_port_53=60 +dport_map_port_54=57 +dport_map_port_55=58 +portmap_52=89:100 +portmap_53=91:100 +portmap_54=93:100 +portmap_55=95:100 +phy_chain_rx_lane_map_physical{89.0}=0x45017263 +phy_chain_rx_lane_map_physical{90.0}=0x45017263 +phy_chain_rx_lane_map_physical{91.0}=0x45017263 +phy_chain_rx_lane_map_physical{92.0}=0x45017263 +phy_chain_rx_lane_map_physical{93.0}=0x45017263 +phy_chain_rx_lane_map_physical{94.0}=0x45017263 +phy_chain_rx_lane_map_physical{95.0}=0x45017263 +phy_chain_rx_lane_map_physical{96.0}=0x45017263 +phy_chain_tx_lane_map_physical{89.0}=0x62310457 +phy_chain_tx_lane_map_physical{90.0}=0x62310457 +phy_chain_tx_lane_map_physical{91.0}=0x62310457 +phy_chain_tx_lane_map_physical{92.0}=0x62310457 +phy_chain_tx_lane_map_physical{93.0}=0x62310457 +phy_chain_tx_lane_map_physical{94.0}=0x62310457 +phy_chain_tx_lane_map_physical{95.0}=0x62310457 +phy_chain_tx_lane_map_physical{96.0}=0x62310457 +serdes_core_rx_polarity_flip_physical{89}=0xEC +serdes_core_rx_polarity_flip_physical{90}=0xEC +serdes_core_rx_polarity_flip_physical{91}=0xEC +serdes_core_rx_polarity_flip_physical{92}=0xEC +serdes_core_rx_polarity_flip_physical{93}=0xEC +serdes_core_rx_polarity_flip_physical{94}=0xEC +serdes_core_rx_polarity_flip_physical{95}=0xEC +serdes_core_rx_polarity_flip_physical{96}=0xEC +serdes_core_tx_polarity_flip_physical{89}=0x35 +serdes_core_tx_polarity_flip_physical{90}=0x35 +serdes_core_tx_polarity_flip_physical{91}=0x35 +serdes_core_tx_polarity_flip_physical{92}=0x35 +serdes_core_tx_polarity_flip_physical{93}=0x35 +serdes_core_tx_polarity_flip_physical{94}=0x35 +serdes_core_tx_polarity_flip_physical{95}=0x35 +serdes_core_tx_polarity_flip_physical{96}=0x35 + +dport_map_port_60=15 +dport_map_port_61=16 +dport_map_port_62=13 +dport_map_port_63=14 +portmap_60=97:100 +portmap_61=99:100 +portmap_62=101:100 +portmap_63=103:100 +phy_chain_rx_lane_map_physical{97.0}=0x10234567 +phy_chain_rx_lane_map_physical{98.0}=0x10234567 +phy_chain_rx_lane_map_physical{99.0}=0x10234567 +phy_chain_rx_lane_map_physical{100.0}=0x10234567 +phy_chain_rx_lane_map_physical{101.0}=0x10234567 +phy_chain_rx_lane_map_physical{102.0}=0x10234567 +phy_chain_rx_lane_map_physical{103.0}=0x10234567 +phy_chain_rx_lane_map_physical{104.0}=0x10234567 +phy_chain_tx_lane_map_physical{97.0}=0x75462103 +phy_chain_tx_lane_map_physical{98.0}=0x75462103 +phy_chain_tx_lane_map_physical{99.0}=0x75462103 +phy_chain_tx_lane_map_physical{100.0}=0x75462103 +phy_chain_tx_lane_map_physical{101.0}=0x75462103 +phy_chain_tx_lane_map_physical{102.0}=0x75462103 +phy_chain_tx_lane_map_physical{103.0}=0x75462103 +phy_chain_tx_lane_map_physical{104.0}=0x75462103 +serdes_core_rx_polarity_flip_physical{97}=0x65 +serdes_core_rx_polarity_flip_physical{98}=0x65 +serdes_core_rx_polarity_flip_physical{99}=0x65 +serdes_core_rx_polarity_flip_physical{100}=0x65 +serdes_core_rx_polarity_flip_physical{101}=0x65 +serdes_core_rx_polarity_flip_physical{102}=0x65 +serdes_core_rx_polarity_flip_physical{103}=0x65 +serdes_core_rx_polarity_flip_physical{104}=0x65 +serdes_core_tx_polarity_flip_physical{97}=0xDD +serdes_core_tx_polarity_flip_physical{98}=0xDD +serdes_core_tx_polarity_flip_physical{99}=0xDD +serdes_core_tx_polarity_flip_physical{100}=0xDD +serdes_core_tx_polarity_flip_physical{101}=0xDD +serdes_core_tx_polarity_flip_physical{102}=0xDD +serdes_core_tx_polarity_flip_physical{103}=0xDD +serdes_core_tx_polarity_flip_physical{104}=0xDD + +dport_map_port_64=31 +dport_map_port_65=32 +dport_map_port_66=29 +dport_map_port_67=30 +portmap_64=105:100 +portmap_65=107:100 +portmap_66=109:100 +portmap_67=111:100 +phy_chain_rx_lane_map_physical{105.0}=0x32106745 +phy_chain_rx_lane_map_physical{106.0}=0x32106745 +phy_chain_rx_lane_map_physical{107.0}=0x32106745 +phy_chain_rx_lane_map_physical{108.0}=0x32106745 +phy_chain_rx_lane_map_physical{109.0}=0x32106745 +phy_chain_rx_lane_map_physical{110.0}=0x32106745 +phy_chain_rx_lane_map_physical{111.0}=0x32106745 +phy_chain_rx_lane_map_physical{112.0}=0x32106745 +phy_chain_tx_lane_map_physical{105.0}=0x23015746 +phy_chain_tx_lane_map_physical{106.0}=0x23015746 +phy_chain_tx_lane_map_physical{107.0}=0x23015746 +phy_chain_tx_lane_map_physical{108.0}=0x23015746 +phy_chain_tx_lane_map_physical{109.0}=0x23015746 +phy_chain_tx_lane_map_physical{110.0}=0x23015746 +phy_chain_tx_lane_map_physical{111.0}=0x23015746 +phy_chain_tx_lane_map_physical{112.0}=0x23015746 +serdes_core_rx_polarity_flip_physical{105}=0xDB +serdes_core_rx_polarity_flip_physical{106}=0xDB +serdes_core_rx_polarity_flip_physical{107}=0xDB +serdes_core_rx_polarity_flip_physical{108}=0xDB +serdes_core_rx_polarity_flip_physical{109}=0xDB +serdes_core_rx_polarity_flip_physical{110}=0xDB +serdes_core_rx_polarity_flip_physical{111}=0xDB +serdes_core_rx_polarity_flip_physical{112}=0xDB +serdes_core_tx_polarity_flip_physical{105}=0xDC +serdes_core_tx_polarity_flip_physical{106}=0xDC +serdes_core_tx_polarity_flip_physical{107}=0xDC +serdes_core_tx_polarity_flip_physical{108}=0xDC +serdes_core_tx_polarity_flip_physical{109}=0xDC +serdes_core_tx_polarity_flip_physical{110}=0xDC +serdes_core_tx_polarity_flip_physical{111}=0xDC +serdes_core_tx_polarity_flip_physical{112}=0xDC + +dport_map_port_68=47 +dport_map_port_69=48 +dport_map_port_70=45 +dport_map_port_71=46 +portmap_68=113:100 +portmap_69=115:100 +portmap_70=117:100 +portmap_71=119:100 +phy_chain_rx_lane_map_physical{113.0}=0x23104567 +phy_chain_rx_lane_map_physical{114.0}=0x23104567 +phy_chain_rx_lane_map_physical{115.0}=0x23104567 +phy_chain_rx_lane_map_physical{116.0}=0x23104567 +phy_chain_rx_lane_map_physical{117.0}=0x23104567 +phy_chain_rx_lane_map_physical{118.0}=0x23104567 +phy_chain_rx_lane_map_physical{119.0}=0x23104567 +phy_chain_rx_lane_map_physical{120.0}=0x23104567 +phy_chain_tx_lane_map_physical{113.0}=0x65704231 +phy_chain_tx_lane_map_physical{114.0}=0x65704231 +phy_chain_tx_lane_map_physical{115.0}=0x65704231 +phy_chain_tx_lane_map_physical{116.0}=0x65704231 +phy_chain_tx_lane_map_physical{117.0}=0x65704231 +phy_chain_tx_lane_map_physical{118.0}=0x65704231 +phy_chain_tx_lane_map_physical{119.0}=0x65704231 +phy_chain_tx_lane_map_physical{120.0}=0x65704231 +serdes_core_rx_polarity_flip_physical{113}=0x22 +serdes_core_rx_polarity_flip_physical{114}=0x22 +serdes_core_rx_polarity_flip_physical{115}=0x22 +serdes_core_rx_polarity_flip_physical{116}=0x22 +serdes_core_rx_polarity_flip_physical{117}=0x22 +serdes_core_rx_polarity_flip_physical{118}=0x22 +serdes_core_rx_polarity_flip_physical{119}=0x22 +serdes_core_rx_polarity_flip_physical{120}=0x22 +serdes_core_tx_polarity_flip_physical{113}=0x20 +serdes_core_tx_polarity_flip_physical{114}=0x20 +serdes_core_tx_polarity_flip_physical{115}=0x20 +serdes_core_tx_polarity_flip_physical{116}=0x20 +serdes_core_tx_polarity_flip_physical{117}=0x20 +serdes_core_tx_polarity_flip_physical{118}=0x20 +serdes_core_tx_polarity_flip_physical{119}=0x20 +serdes_core_tx_polarity_flip_physical{120}=0x20 + +dport_map_port_72=63 +dport_map_port_73=64 +dport_map_port_74=61 +dport_map_port_75=62 +portmap_72=121:100 +portmap_73=123:100 +portmap_74=125:100 +portmap_75=127:100 +phy_chain_rx_lane_map_physical{121.0}=0x32145670 +phy_chain_rx_lane_map_physical{122.0}=0x32145670 +phy_chain_rx_lane_map_physical{123.0}=0x32145670 +phy_chain_rx_lane_map_physical{124.0}=0x32145670 +phy_chain_rx_lane_map_physical{125.0}=0x32145670 +phy_chain_rx_lane_map_physical{126.0}=0x32145670 +phy_chain_rx_lane_map_physical{127.0}=0x32145670 +phy_chain_rx_lane_map_physical{128.0}=0x32145670 +phy_chain_tx_lane_map_physical{121.0}=0x15764023 +phy_chain_tx_lane_map_physical{122.0}=0x15764023 +phy_chain_tx_lane_map_physical{123.0}=0x15764023 +phy_chain_tx_lane_map_physical{124.0}=0x15764023 +phy_chain_tx_lane_map_physical{125.0}=0x15764023 +phy_chain_tx_lane_map_physical{126.0}=0x15764023 +phy_chain_tx_lane_map_physical{127.0}=0x15764023 +phy_chain_tx_lane_map_physical{128.0}=0x15764023 +serdes_core_rx_polarity_flip_physical{121}=0xB4 +serdes_core_rx_polarity_flip_physical{122}=0xB4 +serdes_core_rx_polarity_flip_physical{123}=0xB4 +serdes_core_rx_polarity_flip_physical{124}=0xB4 +serdes_core_rx_polarity_flip_physical{125}=0xB4 +serdes_core_rx_polarity_flip_physical{126}=0xB4 +serdes_core_rx_polarity_flip_physical{127}=0xB4 +serdes_core_rx_polarity_flip_physical{128}=0xB4 +serdes_core_tx_polarity_flip_physical{121}=0x19 +serdes_core_tx_polarity_flip_physical{122}=0x19 +serdes_core_tx_polarity_flip_physical{123}=0x19 +serdes_core_tx_polarity_flip_physical{124}=0x19 +serdes_core_tx_polarity_flip_physical{125}=0x19 +serdes_core_tx_polarity_flip_physical{126}=0x19 +serdes_core_tx_polarity_flip_physical{127}=0x19 +serdes_core_tx_polarity_flip_physical{128}=0x19 + +dport_map_port_80=67 +dport_map_port_81=68 +dport_map_port_82=65 +dport_map_port_83=66 +portmap_80=129:100 +portmap_81=131:100 +portmap_82=133:100 +portmap_83=135:100 +phy_chain_rx_lane_map_physical{129.0}=0x07654123 +phy_chain_rx_lane_map_physical{130.0}=0x07654123 +phy_chain_rx_lane_map_physical{131.0}=0x07654123 +phy_chain_rx_lane_map_physical{132.0}=0x07654123 +phy_chain_rx_lane_map_physical{133.0}=0x07654123 +phy_chain_rx_lane_map_physical{134.0}=0x07654123 +phy_chain_rx_lane_map_physical{135.0}=0x07654123 +phy_chain_rx_lane_map_physical{136.0}=0x07654123 +phy_chain_tx_lane_map_physical{129.0}=0x31204675 +phy_chain_tx_lane_map_physical{130.0}=0x31204675 +phy_chain_tx_lane_map_physical{131.0}=0x31204675 +phy_chain_tx_lane_map_physical{132.0}=0x31204675 +phy_chain_tx_lane_map_physical{133.0}=0x31204675 +phy_chain_tx_lane_map_physical{134.0}=0x31204675 +phy_chain_tx_lane_map_physical{135.0}=0x31204675 +phy_chain_tx_lane_map_physical{136.0}=0x31204675 +serdes_core_rx_polarity_flip_physical{129}=0xDA +serdes_core_rx_polarity_flip_physical{130}=0xDA +serdes_core_rx_polarity_flip_physical{131}=0xDA +serdes_core_rx_polarity_flip_physical{132}=0xDA +serdes_core_rx_polarity_flip_physical{133}=0xDA +serdes_core_rx_polarity_flip_physical{134}=0xDA +serdes_core_rx_polarity_flip_physical{135}=0xDA +serdes_core_rx_polarity_flip_physical{136}=0xDA +serdes_core_tx_polarity_flip_physical{129}=0x67 +serdes_core_tx_polarity_flip_physical{130}=0x67 +serdes_core_tx_polarity_flip_physical{131}=0x67 +serdes_core_tx_polarity_flip_physical{132}=0x67 +serdes_core_tx_polarity_flip_physical{133}=0x67 +serdes_core_tx_polarity_flip_physical{134}=0x67 +serdes_core_tx_polarity_flip_physical{135}=0x67 +serdes_core_tx_polarity_flip_physical{136}=0x67 + +dport_map_port_84=83 +dport_map_port_85=84 +dport_map_port_86=81 +dport_map_port_87=82 +portmap_84=137:100 +portmap_85=139:100 +portmap_86=141:100 +portmap_87=143:100 +phy_chain_rx_lane_map_physical{137.0}=0x65432107 +phy_chain_rx_lane_map_physical{138.0}=0x65432107 +phy_chain_rx_lane_map_physical{139.0}=0x65432107 +phy_chain_rx_lane_map_physical{140.0}=0x65432107 +phy_chain_rx_lane_map_physical{141.0}=0x65432107 +phy_chain_rx_lane_map_physical{142.0}=0x65432107 +phy_chain_rx_lane_map_physical{143.0}=0x65432107 +phy_chain_rx_lane_map_physical{144.0}=0x65432107 +phy_chain_tx_lane_map_physical{137.0}=0x32140756 +phy_chain_tx_lane_map_physical{138.0}=0x32140756 +phy_chain_tx_lane_map_physical{139.0}=0x32140756 +phy_chain_tx_lane_map_physical{140.0}=0x32140756 +phy_chain_tx_lane_map_physical{141.0}=0x32140756 +phy_chain_tx_lane_map_physical{142.0}=0x32140756 +phy_chain_tx_lane_map_physical{143.0}=0x32140756 +phy_chain_tx_lane_map_physical{144.0}=0x32140756 +serdes_core_rx_polarity_flip_physical{137}=0x68 +serdes_core_rx_polarity_flip_physical{138}=0x68 +serdes_core_rx_polarity_flip_physical{139}=0x68 +serdes_core_rx_polarity_flip_physical{140}=0x68 +serdes_core_rx_polarity_flip_physical{141}=0x68 +serdes_core_rx_polarity_flip_physical{142}=0x68 +serdes_core_rx_polarity_flip_physical{143}=0x68 +serdes_core_rx_polarity_flip_physical{144}=0x68 +serdes_core_tx_polarity_flip_physical{137}=0x2C +serdes_core_tx_polarity_flip_physical{138}=0x2C +serdes_core_tx_polarity_flip_physical{139}=0x2C +serdes_core_tx_polarity_flip_physical{140}=0x2C +serdes_core_tx_polarity_flip_physical{141}=0x2C +serdes_core_tx_polarity_flip_physical{142}=0x2C +serdes_core_tx_polarity_flip_physical{143}=0x2C +serdes_core_tx_polarity_flip_physical{144}=0x2C + +dport_map_port_88=99 +dport_map_port_89=100 +dport_map_port_90=97 +dport_map_port_91=98 +portmap_88=145:100 +portmap_89=147:100 +portmap_90=149:100 +portmap_91=151:100 +phy_chain_rx_lane_map_physical{145.0}=0x02145673 +phy_chain_rx_lane_map_physical{146.0}=0x02145673 +phy_chain_rx_lane_map_physical{147.0}=0x02145673 +phy_chain_rx_lane_map_physical{148.0}=0x02145673 +phy_chain_rx_lane_map_physical{149.0}=0x02145673 +phy_chain_rx_lane_map_physical{150.0}=0x02145673 +phy_chain_rx_lane_map_physical{151.0}=0x02145673 +phy_chain_rx_lane_map_physical{152.0}=0x02145673 +phy_chain_tx_lane_map_physical{145.0}=0x17654023 +phy_chain_tx_lane_map_physical{146.0}=0x17654023 +phy_chain_tx_lane_map_physical{147.0}=0x17654023 +phy_chain_tx_lane_map_physical{148.0}=0x17654023 +phy_chain_tx_lane_map_physical{149.0}=0x17654023 +phy_chain_tx_lane_map_physical{150.0}=0x17654023 +phy_chain_tx_lane_map_physical{151.0}=0x17654023 +phy_chain_tx_lane_map_physical{152.0}=0x17654023 +serdes_core_rx_polarity_flip_physical{145}=0x9A +serdes_core_rx_polarity_flip_physical{146}=0x9A +serdes_core_rx_polarity_flip_physical{147}=0x9A +serdes_core_rx_polarity_flip_physical{148}=0x9A +serdes_core_rx_polarity_flip_physical{149}=0x9A +serdes_core_rx_polarity_flip_physical{150}=0x9A +serdes_core_rx_polarity_flip_physical{151}=0x9A +serdes_core_rx_polarity_flip_physical{152}=0x9A +serdes_core_tx_polarity_flip_physical{145}=0xD6 +serdes_core_tx_polarity_flip_physical{146}=0xD6 +serdes_core_tx_polarity_flip_physical{147}=0xD6 +serdes_core_tx_polarity_flip_physical{148}=0xD6 +serdes_core_tx_polarity_flip_physical{149}=0xD6 +serdes_core_tx_polarity_flip_physical{150}=0xD6 +serdes_core_tx_polarity_flip_physical{151}=0xD6 +serdes_core_tx_polarity_flip_physical{152}=0xD6 + +dport_map_port_92=115 +dport_map_port_93=116 +dport_map_port_94=113 +dport_map_port_95=114 +portmap_92=153:100 +portmap_93=155:100 +portmap_94=157:100 +portmap_95=159:100 +phy_chain_rx_lane_map_physical{153.0}=0x67451023 +phy_chain_rx_lane_map_physical{154.0}=0x67451023 +phy_chain_rx_lane_map_physical{155.0}=0x67451023 +phy_chain_rx_lane_map_physical{156.0}=0x67451023 +phy_chain_rx_lane_map_physical{157.0}=0x67451023 +phy_chain_rx_lane_map_physical{158.0}=0x67451023 +phy_chain_rx_lane_map_physical{159.0}=0x67451023 +phy_chain_rx_lane_map_physical{160.0}=0x67451023 +phy_chain_tx_lane_map_physical{153.0}=0x13205746 +phy_chain_tx_lane_map_physical{154.0}=0x13205746 +phy_chain_tx_lane_map_physical{155.0}=0x13205746 +phy_chain_tx_lane_map_physical{156.0}=0x13205746 +phy_chain_tx_lane_map_physical{157.0}=0x13205746 +phy_chain_tx_lane_map_physical{158.0}=0x13205746 +phy_chain_tx_lane_map_physical{159.0}=0x13205746 +phy_chain_tx_lane_map_physical{160.0}=0x13205746 +serdes_core_rx_polarity_flip_physical{153}=0xE4 +serdes_core_rx_polarity_flip_physical{154}=0xE4 +serdes_core_rx_polarity_flip_physical{155}=0xE4 +serdes_core_rx_polarity_flip_physical{156}=0xE4 +serdes_core_rx_polarity_flip_physical{157}=0xE4 +serdes_core_rx_polarity_flip_physical{158}=0xE4 +serdes_core_rx_polarity_flip_physical{159}=0xE4 +serdes_core_rx_polarity_flip_physical{160}=0xE4 +serdes_core_tx_polarity_flip_physical{153}=0xCC +serdes_core_tx_polarity_flip_physical{154}=0xCC +serdes_core_tx_polarity_flip_physical{155}=0xCC +serdes_core_tx_polarity_flip_physical{156}=0xCC +serdes_core_tx_polarity_flip_physical{157}=0xCC +serdes_core_tx_polarity_flip_physical{158}=0xCC +serdes_core_tx_polarity_flip_physical{159}=0xCC +serdes_core_tx_polarity_flip_physical{160}=0xCC + +dport_map_port_100=71 +dport_map_port_101=72 +dport_map_port_102=69 +dport_map_port_103=70 +portmap_100=161:100 +portmap_101=163:100 +portmap_102=165:100 +portmap_103=167:100 +phy_chain_rx_lane_map_physical{161.0}=0x54321067 +phy_chain_rx_lane_map_physical{162.0}=0x54321067 +phy_chain_rx_lane_map_physical{163.0}=0x54321067 +phy_chain_rx_lane_map_physical{164.0}=0x54321067 +phy_chain_rx_lane_map_physical{165.0}=0x54321067 +phy_chain_rx_lane_map_physical{166.0}=0x54321067 +phy_chain_rx_lane_map_physical{167.0}=0x54321067 +phy_chain_rx_lane_map_physical{168.0}=0x54321067 +phy_chain_tx_lane_map_physical{161.0}=0x40123765 +phy_chain_tx_lane_map_physical{162.0}=0x40123765 +phy_chain_tx_lane_map_physical{163.0}=0x40123765 +phy_chain_tx_lane_map_physical{164.0}=0x40123765 +phy_chain_tx_lane_map_physical{165.0}=0x40123765 +phy_chain_tx_lane_map_physical{166.0}=0x40123765 +phy_chain_tx_lane_map_physical{167.0}=0x40123765 +phy_chain_tx_lane_map_physical{168.0}=0x40123765 +serdes_core_rx_polarity_flip_physical{161}=0x1B +serdes_core_rx_polarity_flip_physical{162}=0x1B +serdes_core_rx_polarity_flip_physical{163}=0x1B +serdes_core_rx_polarity_flip_physical{164}=0x1B +serdes_core_rx_polarity_flip_physical{165}=0x1B +serdes_core_rx_polarity_flip_physical{166}=0x1B +serdes_core_rx_polarity_flip_physical{167}=0x1B +serdes_core_rx_polarity_flip_physical{168}=0x1B +serdes_core_tx_polarity_flip_physical{161}=0xD5 +serdes_core_tx_polarity_flip_physical{162}=0xD5 +serdes_core_tx_polarity_flip_physical{163}=0xD5 +serdes_core_tx_polarity_flip_physical{164}=0xD5 +serdes_core_tx_polarity_flip_physical{165}=0xD5 +serdes_core_tx_polarity_flip_physical{166}=0xD5 +serdes_core_tx_polarity_flip_physical{167}=0xD5 +serdes_core_tx_polarity_flip_physical{168}=0xD5 + +dport_map_port_104=87 +dport_map_port_105=88 +dport_map_port_106=85 +dport_map_port_107=86 +portmap_104=169:100 +portmap_105=171:100 +portmap_106=173:100 +portmap_107=175:100 +phy_chain_rx_lane_map_physical{169.0}=0x76543210 +phy_chain_rx_lane_map_physical{170.0}=0x76543210 +phy_chain_rx_lane_map_physical{171.0}=0x76543210 +phy_chain_rx_lane_map_physical{172.0}=0x76543210 +phy_chain_rx_lane_map_physical{173.0}=0x76543210 +phy_chain_rx_lane_map_physical{174.0}=0x76543210 +phy_chain_rx_lane_map_physical{175.0}=0x76543210 +phy_chain_rx_lane_map_physical{176.0}=0x76543210 +phy_chain_tx_lane_map_physical{169.0}=0x32046751 +phy_chain_tx_lane_map_physical{170.0}=0x32046751 +phy_chain_tx_lane_map_physical{171.0}=0x32046751 +phy_chain_tx_lane_map_physical{172.0}=0x32046751 +phy_chain_tx_lane_map_physical{173.0}=0x32046751 +phy_chain_tx_lane_map_physical{174.0}=0x32046751 +phy_chain_tx_lane_map_physical{175.0}=0x32046751 +phy_chain_tx_lane_map_physical{176.0}=0x32046751 +serdes_core_rx_polarity_flip_physical{169}=0x53 +serdes_core_rx_polarity_flip_physical{170}=0x53 +serdes_core_rx_polarity_flip_physical{171}=0x53 +serdes_core_rx_polarity_flip_physical{172}=0x53 +serdes_core_rx_polarity_flip_physical{173}=0x53 +serdes_core_rx_polarity_flip_physical{174}=0x53 +serdes_core_rx_polarity_flip_physical{175}=0x53 +serdes_core_rx_polarity_flip_physical{176}=0x53 +serdes_core_tx_polarity_flip_physical{169}=0x19 +serdes_core_tx_polarity_flip_physical{170}=0x19 +serdes_core_tx_polarity_flip_physical{171}=0x19 +serdes_core_tx_polarity_flip_physical{172}=0x19 +serdes_core_tx_polarity_flip_physical{173}=0x19 +serdes_core_tx_polarity_flip_physical{174}=0x19 +serdes_core_tx_polarity_flip_physical{175}=0x19 +serdes_core_tx_polarity_flip_physical{176}=0x19 + +dport_map_port_108=103 +dport_map_port_109=104 +dport_map_port_110=101 +dport_map_port_111=102 +portmap_108=177:100 +portmap_109=179:100 +portmap_110=181:100 +portmap_111=183:100 +phy_chain_rx_lane_map_physical{177.0}=0x30126457 +phy_chain_rx_lane_map_physical{178.0}=0x30126457 +phy_chain_rx_lane_map_physical{179.0}=0x30126457 +phy_chain_rx_lane_map_physical{180.0}=0x30126457 +phy_chain_rx_lane_map_physical{181.0}=0x30126457 +phy_chain_rx_lane_map_physical{182.0}=0x30126457 +phy_chain_rx_lane_map_physical{183.0}=0x30126457 +phy_chain_rx_lane_map_physical{184.0}=0x30126457 +phy_chain_tx_lane_map_physical{177.0}=0x67504123 +phy_chain_tx_lane_map_physical{178.0}=0x67504123 +phy_chain_tx_lane_map_physical{179.0}=0x67504123 +phy_chain_tx_lane_map_physical{180.0}=0x67504123 +phy_chain_tx_lane_map_physical{181.0}=0x67504123 +phy_chain_tx_lane_map_physical{182.0}=0x67504123 +phy_chain_tx_lane_map_physical{183.0}=0x67504123 +phy_chain_tx_lane_map_physical{184.0}=0x67504123 +serdes_core_rx_polarity_flip_physical{177}=0x6F +serdes_core_rx_polarity_flip_physical{178}=0x6F +serdes_core_rx_polarity_flip_physical{179}=0x6F +serdes_core_rx_polarity_flip_physical{180}=0x6F +serdes_core_rx_polarity_flip_physical{181}=0x6F +serdes_core_rx_polarity_flip_physical{182}=0x6F +serdes_core_rx_polarity_flip_physical{183}=0x6F +serdes_core_rx_polarity_flip_physical{184}=0x6F +serdes_core_tx_polarity_flip_physical{177}=0x26 +serdes_core_tx_polarity_flip_physical{178}=0x26 +serdes_core_tx_polarity_flip_physical{179}=0x26 +serdes_core_tx_polarity_flip_physical{180}=0x26 +serdes_core_tx_polarity_flip_physical{181}=0x26 +serdes_core_tx_polarity_flip_physical{182}=0x26 +serdes_core_tx_polarity_flip_physical{183}=0x26 +serdes_core_tx_polarity_flip_physical{184}=0x26 + +dport_map_port_112=119 +dport_map_port_113=120 +dport_map_port_114=117 +dport_map_port_115=118 +portmap_112=185:100 +portmap_113=187:100 +portmap_114=189:100 +portmap_115=191:100 +phy_chain_rx_lane_map_physical{185.0}=0x45601273 +phy_chain_rx_lane_map_physical{186.0}=0x45601273 +phy_chain_rx_lane_map_physical{187.0}=0x45601273 +phy_chain_rx_lane_map_physical{188.0}=0x45601273 +phy_chain_rx_lane_map_physical{189.0}=0x45601273 +phy_chain_rx_lane_map_physical{190.0}=0x45601273 +phy_chain_rx_lane_map_physical{191.0}=0x45601273 +phy_chain_rx_lane_map_physical{192.0}=0x45601273 +phy_chain_tx_lane_map_physical{185.0}=0x15234076 +phy_chain_tx_lane_map_physical{186.0}=0x15234076 +phy_chain_tx_lane_map_physical{187.0}=0x15234076 +phy_chain_tx_lane_map_physical{188.0}=0x15234076 +phy_chain_tx_lane_map_physical{189.0}=0x15234076 +phy_chain_tx_lane_map_physical{190.0}=0x15234076 +phy_chain_tx_lane_map_physical{191.0}=0x15234076 +phy_chain_tx_lane_map_physical{192.0}=0x15234076 +serdes_core_rx_polarity_flip_physical{185}=0x49 +serdes_core_rx_polarity_flip_physical{186}=0x49 +serdes_core_rx_polarity_flip_physical{187}=0x49 +serdes_core_rx_polarity_flip_physical{188}=0x49 +serdes_core_rx_polarity_flip_physical{189}=0x49 +serdes_core_rx_polarity_flip_physical{190}=0x49 +serdes_core_rx_polarity_flip_physical{191}=0x49 +serdes_core_rx_polarity_flip_physical{192}=0x49 +serdes_core_tx_polarity_flip_physical{185}=0xE6 +serdes_core_tx_polarity_flip_physical{186}=0xE6 +serdes_core_tx_polarity_flip_physical{187}=0xE6 +serdes_core_tx_polarity_flip_physical{188}=0xE6 +serdes_core_tx_polarity_flip_physical{189}=0xE6 +serdes_core_tx_polarity_flip_physical{190}=0xE6 +serdes_core_tx_polarity_flip_physical{191}=0xE6 +serdes_core_tx_polarity_flip_physical{192}=0xE6 + +dport_map_port_120=75 +dport_map_port_121=76 +dport_map_port_122=73 +dport_map_port_123=74 +portmap_120=193:100 +portmap_121=195:100 +portmap_122=197:100 +portmap_123=199:100 +phy_chain_rx_lane_map_physical{193.0}=0x54632107 +phy_chain_rx_lane_map_physical{194.0}=0x54632107 +phy_chain_rx_lane_map_physical{195.0}=0x54632107 +phy_chain_rx_lane_map_physical{196.0}=0x54632107 +phy_chain_rx_lane_map_physical{197.0}=0x54632107 +phy_chain_rx_lane_map_physical{198.0}=0x54632107 +phy_chain_rx_lane_map_physical{199.0}=0x54632107 +phy_chain_rx_lane_map_physical{200.0}=0x54632107 +phy_chain_tx_lane_map_physical{193.0}=0x41023567 +phy_chain_tx_lane_map_physical{194.0}=0x41023567 +phy_chain_tx_lane_map_physical{195.0}=0x41023567 +phy_chain_tx_lane_map_physical{196.0}=0x41023567 +phy_chain_tx_lane_map_physical{197.0}=0x41023567 +phy_chain_tx_lane_map_physical{198.0}=0x41023567 +phy_chain_tx_lane_map_physical{199.0}=0x41023567 +phy_chain_tx_lane_map_physical{200.0}=0x41023567 +serdes_core_rx_polarity_flip_physical{193}=0xD5 +serdes_core_rx_polarity_flip_physical{194}=0xD5 +serdes_core_rx_polarity_flip_physical{195}=0xD5 +serdes_core_rx_polarity_flip_physical{196}=0xD5 +serdes_core_rx_polarity_flip_physical{197}=0xD5 +serdes_core_rx_polarity_flip_physical{198}=0xD5 +serdes_core_rx_polarity_flip_physical{199}=0xD5 +serdes_core_rx_polarity_flip_physical{200}=0xD5 +serdes_core_tx_polarity_flip_physical{193}=0x1C +serdes_core_tx_polarity_flip_physical{194}=0x1C +serdes_core_tx_polarity_flip_physical{195}=0x1C +serdes_core_tx_polarity_flip_physical{196}=0x1C +serdes_core_tx_polarity_flip_physical{197}=0x1C +serdes_core_tx_polarity_flip_physical{198}=0x1C +serdes_core_tx_polarity_flip_physical{199}=0x1C +serdes_core_tx_polarity_flip_physical{200}=0x1C + +dport_map_port_124=91 +dport_map_port_125=92 +dport_map_port_126=89 +dport_map_port_127=90 +portmap_124=201:100 +portmap_125=203:100 +portmap_126=205:100 +portmap_127=207:100 +phy_chain_rx_lane_map_physical{201.0}=0x76543201 +phy_chain_rx_lane_map_physical{202.0}=0x76543201 +phy_chain_rx_lane_map_physical{203.0}=0x76543201 +phy_chain_rx_lane_map_physical{204.0}=0x76543201 +phy_chain_rx_lane_map_physical{205.0}=0x76543201 +phy_chain_rx_lane_map_physical{206.0}=0x76543201 +phy_chain_rx_lane_map_physical{207.0}=0x76543201 +phy_chain_rx_lane_map_physical{208.0}=0x76543201 +phy_chain_tx_lane_map_physical{201.0}=0x32046751 +phy_chain_tx_lane_map_physical{202.0}=0x32046751 +phy_chain_tx_lane_map_physical{203.0}=0x32046751 +phy_chain_tx_lane_map_physical{204.0}=0x32046751 +phy_chain_tx_lane_map_physical{205.0}=0x32046751 +phy_chain_tx_lane_map_physical{206.0}=0x32046751 +phy_chain_tx_lane_map_physical{207.0}=0x32046751 +phy_chain_tx_lane_map_physical{208.0}=0x32046751 +serdes_core_rx_polarity_flip_physical{201}=0xDA +serdes_core_rx_polarity_flip_physical{202}=0xDA +serdes_core_rx_polarity_flip_physical{203}=0xDA +serdes_core_rx_polarity_flip_physical{204}=0xDA +serdes_core_rx_polarity_flip_physical{205}=0xDA +serdes_core_rx_polarity_flip_physical{206}=0xDA +serdes_core_rx_polarity_flip_physical{207}=0xDA +serdes_core_rx_polarity_flip_physical{208}=0xDA +serdes_core_tx_polarity_flip_physical{201}=0xE6 +serdes_core_tx_polarity_flip_physical{202}=0xE6 +serdes_core_tx_polarity_flip_physical{203}=0xE6 +serdes_core_tx_polarity_flip_physical{204}=0xE6 +serdes_core_tx_polarity_flip_physical{205}=0xE6 +serdes_core_tx_polarity_flip_physical{206}=0xE6 +serdes_core_tx_polarity_flip_physical{207}=0xE6 +serdes_core_tx_polarity_flip_physical{208}=0xE6 + +dport_map_port_128=107 +dport_map_port_129=108 +dport_map_port_130=105 +dport_map_port_131=106 +portmap_128=209:100 +portmap_129=211:100 +portmap_130=213:100 +portmap_131=215:100 +phy_chain_rx_lane_map_physical{209.0}=0x30124756 +phy_chain_rx_lane_map_physical{210.0}=0x30124756 +phy_chain_rx_lane_map_physical{211.0}=0x30124756 +phy_chain_rx_lane_map_physical{212.0}=0x30124756 +phy_chain_rx_lane_map_physical{213.0}=0x30124756 +phy_chain_rx_lane_map_physical{214.0}=0x30124756 +phy_chain_rx_lane_map_physical{215.0}=0x30124756 +phy_chain_rx_lane_map_physical{216.0}=0x30124756 +phy_chain_tx_lane_map_physical{209.0}=0x67504213 +phy_chain_tx_lane_map_physical{210.0}=0x67504213 +phy_chain_tx_lane_map_physical{211.0}=0x67504213 +phy_chain_tx_lane_map_physical{212.0}=0x67504213 +phy_chain_tx_lane_map_physical{213.0}=0x67504213 +phy_chain_tx_lane_map_physical{214.0}=0x67504213 +phy_chain_tx_lane_map_physical{215.0}=0x67504213 +phy_chain_tx_lane_map_physical{216.0}=0x67504213 +serdes_core_rx_polarity_flip_physical{209}=0xED +serdes_core_rx_polarity_flip_physical{210}=0xED +serdes_core_rx_polarity_flip_physical{211}=0xED +serdes_core_rx_polarity_flip_physical{212}=0xED +serdes_core_rx_polarity_flip_physical{213}=0xED +serdes_core_rx_polarity_flip_physical{214}=0xED +serdes_core_rx_polarity_flip_physical{215}=0xED +serdes_core_rx_polarity_flip_physical{216}=0xED +serdes_core_tx_polarity_flip_physical{209}=0xDF +serdes_core_tx_polarity_flip_physical{210}=0xDF +serdes_core_tx_polarity_flip_physical{211}=0xDF +serdes_core_tx_polarity_flip_physical{212}=0xDF +serdes_core_tx_polarity_flip_physical{213}=0xDF +serdes_core_tx_polarity_flip_physical{214}=0xDF +serdes_core_tx_polarity_flip_physical{215}=0xDF +serdes_core_tx_polarity_flip_physical{216}=0xDF + +dport_map_port_132=123 +dport_map_port_133=124 +dport_map_port_134=121 +dport_map_port_135=122 +portmap_132=217:100 +portmap_133=219:100 +portmap_134=221:100 +portmap_135=223:100 +phy_chain_rx_lane_map_physical{217.0}=0x65401273 +phy_chain_rx_lane_map_physical{218.0}=0x65401273 +phy_chain_rx_lane_map_physical{219.0}=0x65401273 +phy_chain_rx_lane_map_physical{220.0}=0x65401273 +phy_chain_rx_lane_map_physical{221.0}=0x65401273 +phy_chain_rx_lane_map_physical{222.0}=0x65401273 +phy_chain_rx_lane_map_physical{223.0}=0x65401273 +phy_chain_rx_lane_map_physical{224.0}=0x65401273 +phy_chain_tx_lane_map_physical{217.0}=0x13524076 +phy_chain_tx_lane_map_physical{218.0}=0x13524076 +phy_chain_tx_lane_map_physical{219.0}=0x13524076 +phy_chain_tx_lane_map_physical{220.0}=0x13524076 +phy_chain_tx_lane_map_physical{221.0}=0x13524076 +phy_chain_tx_lane_map_physical{222.0}=0x13524076 +phy_chain_tx_lane_map_physical{223.0}=0x13524076 +phy_chain_tx_lane_map_physical{224.0}=0x13524076 +serdes_core_rx_polarity_flip_physical{217}=0xD7 +serdes_core_rx_polarity_flip_physical{218}=0xD7 +serdes_core_rx_polarity_flip_physical{219}=0xD7 +serdes_core_rx_polarity_flip_physical{220}=0xD7 +serdes_core_rx_polarity_flip_physical{221}=0xD7 +serdes_core_rx_polarity_flip_physical{222}=0xD7 +serdes_core_rx_polarity_flip_physical{223}=0xD7 +serdes_core_rx_polarity_flip_physical{224}=0xD7 +serdes_core_tx_polarity_flip_physical{217}=0x49 +serdes_core_tx_polarity_flip_physical{218}=0x49 +serdes_core_tx_polarity_flip_physical{219}=0x49 +serdes_core_tx_polarity_flip_physical{220}=0x49 +serdes_core_tx_polarity_flip_physical{221}=0x49 +serdes_core_tx_polarity_flip_physical{222}=0x49 +serdes_core_tx_polarity_flip_physical{223}=0x49 +serdes_core_tx_polarity_flip_physical{224}=0x49 + +dport_map_port_140=79 +dport_map_port_141=80 +dport_map_port_142=77 +dport_map_port_143=78 +portmap_140=225:100 +portmap_141=227:100 +portmap_142=229:100 +portmap_143=231:100 +phy_chain_rx_lane_map_physical{225.0}=0x21036745 +phy_chain_rx_lane_map_physical{226.0}=0x21036745 +phy_chain_rx_lane_map_physical{227.0}=0x21036745 +phy_chain_rx_lane_map_physical{228.0}=0x21036745 +phy_chain_rx_lane_map_physical{229.0}=0x21036745 +phy_chain_rx_lane_map_physical{230.0}=0x21036745 +phy_chain_rx_lane_map_physical{231.0}=0x21036745 +phy_chain_rx_lane_map_physical{232.0}=0x21036745 +phy_chain_tx_lane_map_physical{225.0}=0x56701234 +phy_chain_tx_lane_map_physical{226.0}=0x56701234 +phy_chain_tx_lane_map_physical{227.0}=0x56701234 +phy_chain_tx_lane_map_physical{228.0}=0x56701234 +phy_chain_tx_lane_map_physical{229.0}=0x56701234 +phy_chain_tx_lane_map_physical{230.0}=0x56701234 +phy_chain_tx_lane_map_physical{231.0}=0x56701234 +phy_chain_tx_lane_map_physical{232.0}=0x56701234 +serdes_core_rx_polarity_flip_physical{225}=0xE5 +serdes_core_rx_polarity_flip_physical{226}=0xE5 +serdes_core_rx_polarity_flip_physical{227}=0xE5 +serdes_core_rx_polarity_flip_physical{228}=0xE5 +serdes_core_rx_polarity_flip_physical{229}=0xE5 +serdes_core_rx_polarity_flip_physical{230}=0xE5 +serdes_core_rx_polarity_flip_physical{231}=0xE5 +serdes_core_rx_polarity_flip_physical{232}=0xE5 +serdes_core_tx_polarity_flip_physical{225}=0x4A +serdes_core_tx_polarity_flip_physical{226}=0x4A +serdes_core_tx_polarity_flip_physical{227}=0x4A +serdes_core_tx_polarity_flip_physical{228}=0x4A +serdes_core_tx_polarity_flip_physical{229}=0x4A +serdes_core_tx_polarity_flip_physical{230}=0x4A +serdes_core_tx_polarity_flip_physical{231}=0x4A +serdes_core_tx_polarity_flip_physical{232}=0x4A + +dport_map_port_144=95 +dport_map_port_145=96 +dport_map_port_146=93 +dport_map_port_147=94 +portmap_144=233:100 +portmap_145=235:100 +portmap_146=237:100 +portmap_147=239:100 +phy_chain_rx_lane_map_physical{233.0}=0x76541230 +phy_chain_rx_lane_map_physical{234.0}=0x76541230 +phy_chain_rx_lane_map_physical{235.0}=0x76541230 +phy_chain_rx_lane_map_physical{236.0}=0x76541230 +phy_chain_rx_lane_map_physical{237.0}=0x76541230 +phy_chain_rx_lane_map_physical{238.0}=0x76541230 +phy_chain_rx_lane_map_physical{239.0}=0x76541230 +phy_chain_rx_lane_map_physical{240.0}=0x76541230 +phy_chain_tx_lane_map_physical{233.0}=0x20314675 +phy_chain_tx_lane_map_physical{234.0}=0x20314675 +phy_chain_tx_lane_map_physical{235.0}=0x20314675 +phy_chain_tx_lane_map_physical{236.0}=0x20314675 +phy_chain_tx_lane_map_physical{237.0}=0x20314675 +phy_chain_tx_lane_map_physical{238.0}=0x20314675 +phy_chain_tx_lane_map_physical{239.0}=0x20314675 +phy_chain_tx_lane_map_physical{240.0}=0x20314675 +serdes_core_rx_polarity_flip_physical{233}=0xC9 +serdes_core_rx_polarity_flip_physical{234}=0xC9 +serdes_core_rx_polarity_flip_physical{235}=0xC9 +serdes_core_rx_polarity_flip_physical{236}=0xC9 +serdes_core_rx_polarity_flip_physical{237}=0xC9 +serdes_core_rx_polarity_flip_physical{238}=0xC9 +serdes_core_rx_polarity_flip_physical{239}=0xC9 +serdes_core_rx_polarity_flip_physical{240}=0xC9 +serdes_core_tx_polarity_flip_physical{233}=0xBD +serdes_core_tx_polarity_flip_physical{234}=0xBD +serdes_core_tx_polarity_flip_physical{235}=0xBD +serdes_core_tx_polarity_flip_physical{236}=0xBD +serdes_core_tx_polarity_flip_physical{237}=0xBD +serdes_core_tx_polarity_flip_physical{238}=0xBD +serdes_core_tx_polarity_flip_physical{239}=0xBD +serdes_core_tx_polarity_flip_physical{240}=0xBD + +dport_map_port_148=111 +dport_map_port_149=112 +dport_map_port_150=109 +dport_map_port_151=110 +portmap_148=241:100 +portmap_149=243:100 +portmap_150=245:100 +portmap_151=247:100 +phy_chain_rx_lane_map_physical{241.0}=0x21036754 +phy_chain_rx_lane_map_physical{242.0}=0x21036754 +phy_chain_rx_lane_map_physical{243.0}=0x21036754 +phy_chain_rx_lane_map_physical{244.0}=0x21036754 +phy_chain_rx_lane_map_physical{245.0}=0x21036754 +phy_chain_rx_lane_map_physical{246.0}=0x21036754 +phy_chain_rx_lane_map_physical{247.0}=0x21036754 +phy_chain_rx_lane_map_physical{248.0}=0x21036754 +phy_chain_tx_lane_map_physical{241.0}=0x56740123 +phy_chain_tx_lane_map_physical{242.0}=0x56740123 +phy_chain_tx_lane_map_physical{243.0}=0x56740123 +phy_chain_tx_lane_map_physical{244.0}=0x56740123 +phy_chain_tx_lane_map_physical{245.0}=0x56740123 +phy_chain_tx_lane_map_physical{246.0}=0x56740123 +phy_chain_tx_lane_map_physical{247.0}=0x56740123 +phy_chain_tx_lane_map_physical{248.0}=0x56740123 +serdes_core_rx_polarity_flip_physical{241}=0x15 +serdes_core_rx_polarity_flip_physical{242}=0x15 +serdes_core_rx_polarity_flip_physical{243}=0x15 +serdes_core_rx_polarity_flip_physical{244}=0x15 +serdes_core_rx_polarity_flip_physical{245}=0x15 +serdes_core_rx_polarity_flip_physical{246}=0x15 +serdes_core_rx_polarity_flip_physical{247}=0x15 +serdes_core_rx_polarity_flip_physical{248}=0x15 +serdes_core_tx_polarity_flip_physical{241}=0xEA +serdes_core_tx_polarity_flip_physical{242}=0xEA +serdes_core_tx_polarity_flip_physical{243}=0xEA +serdes_core_tx_polarity_flip_physical{244}=0xEA +serdes_core_tx_polarity_flip_physical{245}=0xEA +serdes_core_tx_polarity_flip_physical{246}=0xEA +serdes_core_tx_polarity_flip_physical{247}=0xEA +serdes_core_tx_polarity_flip_physical{248}=0xEA + +dport_map_port_152=127 +dport_map_port_153=128 +dport_map_port_154=125 +dport_map_port_155=126 +portmap_152=249:100 +portmap_153=251:100 +portmap_154=253:100 +portmap_155=255:100 +phy_chain_rx_lane_map_physical{249.0}=0x01237654 +phy_chain_rx_lane_map_physical{250.0}=0x01237654 +phy_chain_rx_lane_map_physical{251.0}=0x01237654 +phy_chain_rx_lane_map_physical{252.0}=0x01237654 +phy_chain_rx_lane_map_physical{253.0}=0x01237654 +phy_chain_rx_lane_map_physical{254.0}=0x01237654 +phy_chain_rx_lane_map_physical{255.0}=0x01237654 +phy_chain_rx_lane_map_physical{256.0}=0x01237654 +phy_chain_tx_lane_map_physical{249.0}=0x57601432 +phy_chain_tx_lane_map_physical{250.0}=0x57601432 +phy_chain_tx_lane_map_physical{251.0}=0x57601432 +phy_chain_tx_lane_map_physical{252.0}=0x57601432 +phy_chain_tx_lane_map_physical{253.0}=0x57601432 +phy_chain_tx_lane_map_physical{254.0}=0x57601432 +phy_chain_tx_lane_map_physical{255.0}=0x57601432 +phy_chain_tx_lane_map_physical{256.0}=0x57601432 +serdes_core_rx_polarity_flip_physical{249}=0x2A +serdes_core_rx_polarity_flip_physical{250}=0x2A +serdes_core_rx_polarity_flip_physical{251}=0x2A +serdes_core_rx_polarity_flip_physical{252}=0x2A +serdes_core_rx_polarity_flip_physical{253}=0x2A +serdes_core_rx_polarity_flip_physical{254}=0x2A +serdes_core_rx_polarity_flip_physical{255}=0x2A +serdes_core_rx_polarity_flip_physical{256}=0x2A +serdes_core_tx_polarity_flip_physical{249}=0xDE +serdes_core_tx_polarity_flip_physical{250}=0xDE +serdes_core_tx_polarity_flip_physical{251}=0xDE +serdes_core_tx_polarity_flip_physical{252}=0xDE +serdes_core_tx_polarity_flip_physical{253}=0xDE +serdes_core_tx_polarity_flip_physical{254}=0xDE +serdes_core_tx_polarity_flip_physical{255}=0xDE +serdes_core_tx_polarity_flip_physical{256}=0xDE + +dport_map_port_38=299 +portmap_38=257:10 + +dport_map_port_118=300 +portmap_118=258:10 + +portmap_19=259:10 + +portmap_39=260:10 + +portmap_59=261:10 + +portmap_79=262:10 + +portmap_99=263:10 + +portmap_119=264:10 + +portmap_139=265:10 + +portmap_159=266:10 diff --git a/device/accton/x86_64-accton_minipack-r0/Accton-MINIPACK/config_16Q_FEC544_EVTB_100G.bcm b/device/accton/x86_64-accton_minipack-r0/Accton-MINIPACK/config_16Q_FEC544_EVTB_100G.bcm new file mode 100755 index 00000000000..a72f22bbfd9 --- /dev/null +++ b/device/accton/x86_64-accton_minipack-r0/Accton-MINIPACK/config_16Q_FEC544_EVTB_100G.bcm @@ -0,0 +1,1487 @@ +pbmp_xport_xe.0=0x3ffffffffffffffffffffffffffffffffffffffe +ccm_dma_enable=0 +ccmdma_intr_enable=0 +ctr_evict_enable=0 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +phy_enable=0 +phy_null=1 +pll_bypass=1 + +init_all_modules=0 +core_clock_frequency=1325 +dpr_clock_frequency=1000 +device_clock_frequency=1325 +port_flex_enable=1 + +#firmware load method, use fast load +load_firmware=0x2 + +serdes_lane_config_dfe=on +serdes_lane_config_media_type=backplane + +port_fec_1=3 +port_fec_2=3 +port_fec_3=3 +port_fec_4=3 +port_fec_5=3 +port_fec_6=3 +port_fec_7=3 +port_fec_8=3 +port_fec_9=3 +port_fec_10=3 +port_fec_11=3 +port_fec_12=3 +port_fec_13=3 +port_fec_14=3 +port_fec_15=3 +port_fec_16=3 +port_fec_20=3 +port_fec_21=3 +port_fec_22=3 +port_fec_23=3 +port_fec_24=3 +port_fec_25=3 +port_fec_26=3 +port_fec_27=3 +port_fec_28=3 +port_fec_29=3 +port_fec_30=3 +port_fec_31=3 +port_fec_32=3 +port_fec_33=3 +port_fec_34=3 +port_fec_35=3 +port_fec_40=3 +port_fec_41=3 +port_fec_42=3 +port_fec_43=3 +port_fec_44=3 +port_fec_45=3 +port_fec_46=3 +port_fec_47=3 +port_fec_48=3 +port_fec_49=3 +port_fec_50=3 +port_fec_51=3 +port_fec_52=3 +port_fec_53=3 +port_fec_54=3 +port_fec_55=3 +port_fec_60=3 +port_fec_61=3 +port_fec_62=3 +port_fec_63=3 +port_fec_64=3 +port_fec_65=3 +port_fec_66=3 +port_fec_67=3 +port_fec_68=3 +port_fec_69=3 +port_fec_70=3 +port_fec_71=3 +port_fec_72=3 +port_fec_73=3 +port_fec_74=3 +port_fec_75=3 +port_fec_80=3 +port_fec_81=3 +port_fec_82=3 +port_fec_83=3 +port_fec_84=3 +port_fec_85=3 +port_fec_86=3 +port_fec_87=3 +port_fec_88=3 +port_fec_89=3 +port_fec_90=3 +port_fec_91=3 +port_fec_92=3 +port_fec_93=3 +port_fec_94=3 +port_fec_95=3 +port_fec_100=3 +port_fec_101=3 +port_fec_102=3 +port_fec_103=3 +port_fec_104=3 +port_fec_105=3 +port_fec_106=3 +port_fec_107=3 +port_fec_108=3 +port_fec_109=3 +port_fec_110=3 +port_fec_111=3 +port_fec_112=3 +port_fec_113=3 +port_fec_114=3 +port_fec_115=3 +port_fec_120=3 +port_fec_121=3 +port_fec_122=3 +port_fec_123=3 +port_fec_124=3 +port_fec_125=3 +port_fec_126=3 +port_fec_127=3 +port_fec_128=3 +port_fec_129=3 +port_fec_130=3 +port_fec_131=3 +port_fec_132=3 +port_fec_133=3 +port_fec_134=3 +port_fec_135=3 +port_fec_140=3 +port_fec_141=3 +port_fec_142=3 +port_fec_143=3 +port_fec_144=3 +port_fec_145=3 +port_fec_146=3 +port_fec_147=3 +port_fec_148=3 +port_fec_149=3 +port_fec_150=3 +port_fec_151=3 +port_fec_152=3 +port_fec_153=3 +port_fec_154=3 +port_fec_155=3 + + +dport_map_port_3=1 +dport_map_port_4=2 +dport_map_port_1=3 +dport_map_port_2=4 +portmap_1=1:100 +portmap_2=3:100 +portmap_3=5:100 +portmap_4=7:100 +phy_chain_rx_lane_map_physical{1.0}=0x01237645 +phy_chain_rx_lane_map_physical{2.0}=0x01237645 +phy_chain_rx_lane_map_physical{3.0}=0x01237645 +phy_chain_rx_lane_map_physical{4.0}=0x01237645 +phy_chain_rx_lane_map_physical{5.0}=0x01237645 +phy_chain_rx_lane_map_physical{6.0}=0x01237645 +phy_chain_rx_lane_map_physical{7.0}=0x01237645 +phy_chain_rx_lane_map_physical{8.0}=0x01237645 +phy_chain_tx_lane_map_physical{1.0}=0x32046751 +phy_chain_tx_lane_map_physical{2.0}=0x32046751 +phy_chain_tx_lane_map_physical{3.0}=0x32046751 +phy_chain_tx_lane_map_physical{4.0}=0x32046751 +phy_chain_tx_lane_map_physical{5.0}=0x32046751 +phy_chain_tx_lane_map_physical{6.0}=0x32046751 +phy_chain_tx_lane_map_physical{7.0}=0x32046751 +phy_chain_tx_lane_map_physical{8.0}=0x32046751 +serdes_core_rx_polarity_flip_physical{1}=0x29 +serdes_core_rx_polarity_flip_physical{2}=0x29 +serdes_core_rx_polarity_flip_physical{3}=0x29 +serdes_core_rx_polarity_flip_physical{4}=0x29 +serdes_core_rx_polarity_flip_physical{5}=0x29 +serdes_core_rx_polarity_flip_physical{6}=0x29 +serdes_core_rx_polarity_flip_physical{7}=0x29 +serdes_core_rx_polarity_flip_physical{8}=0x29 +serdes_core_tx_polarity_flip_physical{1}=0xE7 +serdes_core_tx_polarity_flip_physical{2}=0xE7 +serdes_core_tx_polarity_flip_physical{3}=0xE7 +serdes_core_tx_polarity_flip_physical{4}=0xE7 +serdes_core_tx_polarity_flip_physical{5}=0xE7 +serdes_core_tx_polarity_flip_physical{6}=0xE7 +serdes_core_tx_polarity_flip_physical{7}=0xE7 +serdes_core_tx_polarity_flip_physical{8}=0xE7 + +dport_map_port_7=17 +dport_map_port_8=18 +dport_map_port_5=19 +dport_map_port_6=20 +portmap_5=9:100 +portmap_6=11:100 +portmap_7=13:100 +portmap_8=15:100 +phy_chain_rx_lane_map_physical{9.0}=0x45672103 +phy_chain_rx_lane_map_physical{10.0}=0x45672103 +phy_chain_rx_lane_map_physical{11.0}=0x45672103 +phy_chain_rx_lane_map_physical{12.0}=0x45672103 +phy_chain_rx_lane_map_physical{13.0}=0x45672103 +phy_chain_rx_lane_map_physical{14.0}=0x45672103 +phy_chain_rx_lane_map_physical{15.0}=0x45672103 +phy_chain_rx_lane_map_physical{16.0}=0x45672103 +phy_chain_tx_lane_map_physical{9.0}=0x13240756 +phy_chain_tx_lane_map_physical{10.0}=0x13240756 +phy_chain_tx_lane_map_physical{11.0}=0x13240756 +phy_chain_tx_lane_map_physical{12.0}=0x13240756 +phy_chain_tx_lane_map_physical{13.0}=0x13240756 +phy_chain_tx_lane_map_physical{14.0}=0x13240756 +phy_chain_tx_lane_map_physical{15.0}=0x13240756 +phy_chain_tx_lane_map_physical{16.0}=0x13240756 +serdes_core_rx_polarity_flip_physical{9}=0xA5 +serdes_core_rx_polarity_flip_physical{10}=0xA5 +serdes_core_rx_polarity_flip_physical{11}=0xA5 +serdes_core_rx_polarity_flip_physical{12}=0xA5 +serdes_core_rx_polarity_flip_physical{13}=0xA5 +serdes_core_rx_polarity_flip_physical{14}=0xA5 +serdes_core_rx_polarity_flip_physical{15}=0xA5 +serdes_core_rx_polarity_flip_physical{16}=0xA5 +serdes_core_tx_polarity_flip_physical{9}=0x85 +serdes_core_tx_polarity_flip_physical{10}=0x85 +serdes_core_tx_polarity_flip_physical{11}=0x85 +serdes_core_tx_polarity_flip_physical{12}=0x85 +serdes_core_tx_polarity_flip_physical{13}=0x85 +serdes_core_tx_polarity_flip_physical{14}=0x85 +serdes_core_tx_polarity_flip_physical{15}=0x85 +serdes_core_tx_polarity_flip_physical{16}=0x85 + +dport_map_port_11=33 +dport_map_port_12=34 +dport_map_port_9=35 +dport_map_port_10=36 +portmap_9=17:100 +portmap_10=19:100 +portmap_11=21:100 +portmap_12=23:100 +phy_chain_rx_lane_map_physical{17.0}=0x10237456 +phy_chain_rx_lane_map_physical{18.0}=0x10237456 +phy_chain_rx_lane_map_physical{19.0}=0x10237456 +phy_chain_rx_lane_map_physical{20.0}=0x10237456 +phy_chain_rx_lane_map_physical{21.0}=0x10237456 +phy_chain_rx_lane_map_physical{22.0}=0x10237456 +phy_chain_rx_lane_map_physical{23.0}=0x10237456 +phy_chain_rx_lane_map_physical{24.0}=0x10237456 +phy_chain_tx_lane_map_physical{17.0}=0x67451032 +phy_chain_tx_lane_map_physical{18.0}=0x67451032 +phy_chain_tx_lane_map_physical{19.0}=0x67451032 +phy_chain_tx_lane_map_physical{20.0}=0x67451032 +phy_chain_tx_lane_map_physical{21.0}=0x67451032 +phy_chain_tx_lane_map_physical{22.0}=0x67451032 +phy_chain_tx_lane_map_physical{23.0}=0x67451032 +phy_chain_tx_lane_map_physical{24.0}=0x67451032 +serdes_core_rx_polarity_flip_physical{17}=0x6A +serdes_core_rx_polarity_flip_physical{18}=0x6A +serdes_core_rx_polarity_flip_physical{19}=0x6A +serdes_core_rx_polarity_flip_physical{20}=0x6A +serdes_core_rx_polarity_flip_physical{21}=0x6A +serdes_core_rx_polarity_flip_physical{22}=0x6A +serdes_core_rx_polarity_flip_physical{23}=0x6A +serdes_core_rx_polarity_flip_physical{24}=0x6A +serdes_core_tx_polarity_flip_physical{17}=0x94 +serdes_core_tx_polarity_flip_physical{18}=0x94 +serdes_core_tx_polarity_flip_physical{19}=0x94 +serdes_core_tx_polarity_flip_physical{20}=0x94 +serdes_core_tx_polarity_flip_physical{21}=0x94 +serdes_core_tx_polarity_flip_physical{22}=0x94 +serdes_core_tx_polarity_flip_physical{23}=0x94 +serdes_core_tx_polarity_flip_physical{24}=0x94 + +dport_map_port_15=49 +dport_map_port_16=50 +dport_map_port_13=51 +dport_map_port_14=52 +portmap_13=25:100 +portmap_14=27:100 +portmap_15=29:100 +portmap_16=31:100 +phy_chain_rx_lane_map_physical{25.0}=0x76231504 +phy_chain_rx_lane_map_physical{26.0}=0x76231504 +phy_chain_rx_lane_map_physical{27.0}=0x76231504 +phy_chain_rx_lane_map_physical{28.0}=0x76231504 +phy_chain_rx_lane_map_physical{29.0}=0x76231504 +phy_chain_rx_lane_map_physical{30.0}=0x76231504 +phy_chain_rx_lane_map_physical{31.0}=0x76231504 +phy_chain_rx_lane_map_physical{32.0}=0x76231504 +phy_chain_tx_lane_map_physical{25.0}=0x36012457 +phy_chain_tx_lane_map_physical{26.0}=0x36012457 +phy_chain_tx_lane_map_physical{27.0}=0x36012457 +phy_chain_tx_lane_map_physical{28.0}=0x36012457 +phy_chain_tx_lane_map_physical{29.0}=0x36012457 +phy_chain_tx_lane_map_physical{30.0}=0x36012457 +phy_chain_tx_lane_map_physical{31.0}=0x36012457 +phy_chain_tx_lane_map_physical{32.0}=0x36012457 +serdes_core_rx_polarity_flip_physical{25}=0x9E +serdes_core_rx_polarity_flip_physical{26}=0x9E +serdes_core_rx_polarity_flip_physical{27}=0x9E +serdes_core_rx_polarity_flip_physical{28}=0x9E +serdes_core_rx_polarity_flip_physical{29}=0x9E +serdes_core_rx_polarity_flip_physical{30}=0x9E +serdes_core_rx_polarity_flip_physical{31}=0x9E +serdes_core_rx_polarity_flip_physical{32}=0x9E +serdes_core_tx_polarity_flip_physical{25}=0x5D +serdes_core_tx_polarity_flip_physical{26}=0x5D +serdes_core_tx_polarity_flip_physical{27}=0x5D +serdes_core_tx_polarity_flip_physical{28}=0x5D +serdes_core_tx_polarity_flip_physical{29}=0x5D +serdes_core_tx_polarity_flip_physical{30}=0x5D +serdes_core_tx_polarity_flip_physical{31}=0x5D +serdes_core_tx_polarity_flip_physical{32}=0x5D + +dport_map_port_22=5 +dport_map_port_23=6 +dport_map_port_20=7 +dport_map_port_21=8 +portmap_20=33:100 +portmap_21=35:100 +portmap_22=37:100 +portmap_23=39:100 +phy_chain_rx_lane_map_physical{33.0}=0x56327410 +phy_chain_rx_lane_map_physical{34.0}=0x56327410 +phy_chain_rx_lane_map_physical{35.0}=0x56327410 +phy_chain_rx_lane_map_physical{36.0}=0x56327410 +phy_chain_rx_lane_map_physical{37.0}=0x56327410 +phy_chain_rx_lane_map_physical{38.0}=0x56327410 +phy_chain_rx_lane_map_physical{39.0}=0x56327410 +phy_chain_rx_lane_map_physical{40.0}=0x56327410 +phy_chain_tx_lane_map_physical{33.0}=0x65103247 +phy_chain_tx_lane_map_physical{34.0}=0x65103247 +phy_chain_tx_lane_map_physical{35.0}=0x65103247 +phy_chain_tx_lane_map_physical{36.0}=0x65103247 +phy_chain_tx_lane_map_physical{37.0}=0x65103247 +phy_chain_tx_lane_map_physical{38.0}=0x65103247 +phy_chain_tx_lane_map_physical{39.0}=0x65103247 +phy_chain_tx_lane_map_physical{40.0}=0x65103247 +serdes_core_rx_polarity_flip_physical{33}=0xA9 +serdes_core_rx_polarity_flip_physical{34}=0xA9 +serdes_core_rx_polarity_flip_physical{35}=0xA9 +serdes_core_rx_polarity_flip_physical{36}=0xA9 +serdes_core_rx_polarity_flip_physical{37}=0xA9 +serdes_core_rx_polarity_flip_physical{38}=0xA9 +serdes_core_rx_polarity_flip_physical{39}=0xA9 +serdes_core_rx_polarity_flip_physical{40}=0xA9 +serdes_core_tx_polarity_flip_physical{33}=0xF6 +serdes_core_tx_polarity_flip_physical{34}=0xF6 +serdes_core_tx_polarity_flip_physical{35}=0xF6 +serdes_core_tx_polarity_flip_physical{36}=0xF6 +serdes_core_tx_polarity_flip_physical{37}=0xF6 +serdes_core_tx_polarity_flip_physical{38}=0xF6 +serdes_core_tx_polarity_flip_physical{39}=0xF6 +serdes_core_tx_polarity_flip_physical{40}=0xF6 + +dport_map_port_26=21 +dport_map_port_27=22 +dport_map_port_24=23 +dport_map_port_25=24 +portmap_24=41:100 +portmap_25=43:100 +portmap_26=45:100 +portmap_27=47:100 +phy_chain_rx_lane_map_physical{41.0}=0x76543201 +phy_chain_rx_lane_map_physical{42.0}=0x76543201 +phy_chain_rx_lane_map_physical{43.0}=0x76543201 +phy_chain_rx_lane_map_physical{44.0}=0x76543201 +phy_chain_rx_lane_map_physical{45.0}=0x76543201 +phy_chain_rx_lane_map_physical{46.0}=0x76543201 +phy_chain_rx_lane_map_physical{47.0}=0x76543201 +phy_chain_rx_lane_map_physical{48.0}=0x76543201 +phy_chain_tx_lane_map_physical{41.0}=0x03517426 +phy_chain_tx_lane_map_physical{42.0}=0x03517426 +phy_chain_tx_lane_map_physical{43.0}=0x03517426 +phy_chain_tx_lane_map_physical{44.0}=0x03517426 +phy_chain_tx_lane_map_physical{45.0}=0x03517426 +phy_chain_tx_lane_map_physical{46.0}=0x03517426 +phy_chain_tx_lane_map_physical{47.0}=0x03517426 +phy_chain_tx_lane_map_physical{48.0}=0x03517426 +serdes_core_rx_polarity_flip_physical{41}=0x59 +serdes_core_rx_polarity_flip_physical{42}=0x59 +serdes_core_rx_polarity_flip_physical{43}=0x59 +serdes_core_rx_polarity_flip_physical{44}=0x59 +serdes_core_rx_polarity_flip_physical{45}=0x59 +serdes_core_rx_polarity_flip_physical{46}=0x59 +serdes_core_rx_polarity_flip_physical{47}=0x59 +serdes_core_rx_polarity_flip_physical{48}=0x59 +serdes_core_tx_polarity_flip_physical{41}=0x92 +serdes_core_tx_polarity_flip_physical{42}=0x92 +serdes_core_tx_polarity_flip_physical{43}=0x92 +serdes_core_tx_polarity_flip_physical{44}=0x92 +serdes_core_tx_polarity_flip_physical{45}=0x92 +serdes_core_tx_polarity_flip_physical{46}=0x92 +serdes_core_tx_polarity_flip_physical{47}=0x92 +serdes_core_tx_polarity_flip_physical{48}=0x92 + +dport_map_port_30=37 +dport_map_port_31=38 +dport_map_port_28=39 +dport_map_port_29=40 +portmap_28=49:100 +portmap_29=51:100 +portmap_30=53:100 +portmap_31=55:100 +phy_chain_rx_lane_map_physical{49.0}=0x63724510 +phy_chain_rx_lane_map_physical{50.0}=0x63724510 +phy_chain_rx_lane_map_physical{51.0}=0x63724510 +phy_chain_rx_lane_map_physical{52.0}=0x63724510 +phy_chain_rx_lane_map_physical{53.0}=0x63724510 +phy_chain_rx_lane_map_physical{54.0}=0x63724510 +phy_chain_rx_lane_map_physical{55.0}=0x63724510 +phy_chain_rx_lane_map_physical{56.0}=0x63724510 +phy_chain_tx_lane_map_physical{49.0}=0x67450213 +phy_chain_tx_lane_map_physical{50.0}=0x67450213 +phy_chain_tx_lane_map_physical{51.0}=0x67450213 +phy_chain_tx_lane_map_physical{52.0}=0x67450213 +phy_chain_tx_lane_map_physical{53.0}=0x67450213 +phy_chain_tx_lane_map_physical{54.0}=0x67450213 +phy_chain_tx_lane_map_physical{55.0}=0x67450213 +phy_chain_tx_lane_map_physical{56.0}=0x67450213 +serdes_core_rx_polarity_flip_physical{49}=0x4A +serdes_core_rx_polarity_flip_physical{50}=0x4A +serdes_core_rx_polarity_flip_physical{51}=0x4A +serdes_core_rx_polarity_flip_physical{52}=0x4A +serdes_core_rx_polarity_flip_physical{53}=0x4A +serdes_core_rx_polarity_flip_physical{54}=0x4A +serdes_core_rx_polarity_flip_physical{55}=0x4A +serdes_core_rx_polarity_flip_physical{56}=0x4A +serdes_core_tx_polarity_flip_physical{49}=0xCC +serdes_core_tx_polarity_flip_physical{50}=0xCC +serdes_core_tx_polarity_flip_physical{51}=0xCC +serdes_core_tx_polarity_flip_physical{52}=0xCC +serdes_core_tx_polarity_flip_physical{53}=0xCC +serdes_core_tx_polarity_flip_physical{54}=0xCC +serdes_core_tx_polarity_flip_physical{55}=0xCC +serdes_core_tx_polarity_flip_physical{56}=0xCC + +dport_map_port_34=53 +dport_map_port_35=54 +dport_map_port_32=55 +dport_map_port_33=56 +portmap_32=57:100 +portmap_33=59:100 +portmap_34=61:100 +portmap_35=63:100 +phy_chain_rx_lane_map_physical{57.0}=0x74501623 +phy_chain_rx_lane_map_physical{58.0}=0x74501623 +phy_chain_rx_lane_map_physical{59.0}=0x74501623 +phy_chain_rx_lane_map_physical{60.0}=0x74501623 +phy_chain_rx_lane_map_physical{61.0}=0x74501623 +phy_chain_rx_lane_map_physical{62.0}=0x74501623 +phy_chain_rx_lane_map_physical{63.0}=0x74501623 +phy_chain_rx_lane_map_physical{64.0}=0x74501623 +phy_chain_tx_lane_map_physical{57.0}=0x62731045 +phy_chain_tx_lane_map_physical{58.0}=0x62731045 +phy_chain_tx_lane_map_physical{59.0}=0x62731045 +phy_chain_tx_lane_map_physical{60.0}=0x62731045 +phy_chain_tx_lane_map_physical{61.0}=0x62731045 +phy_chain_tx_lane_map_physical{62.0}=0x62731045 +phy_chain_tx_lane_map_physical{63.0}=0x62731045 +phy_chain_tx_lane_map_physical{64.0}=0x62731045 +serdes_core_rx_polarity_flip_physical{57}=0x42 +serdes_core_rx_polarity_flip_physical{58}=0x42 +serdes_core_rx_polarity_flip_physical{59}=0x42 +serdes_core_rx_polarity_flip_physical{60}=0x42 +serdes_core_rx_polarity_flip_physical{61}=0x42 +serdes_core_rx_polarity_flip_physical{62}=0x42 +serdes_core_rx_polarity_flip_physical{63}=0x42 +serdes_core_rx_polarity_flip_physical{64}=0x42 +serdes_core_tx_polarity_flip_physical{57}=0x3A +serdes_core_tx_polarity_flip_physical{58}=0x3A +serdes_core_tx_polarity_flip_physical{59}=0x3A +serdes_core_tx_polarity_flip_physical{60}=0x3A +serdes_core_tx_polarity_flip_physical{61}=0x3A +serdes_core_tx_polarity_flip_physical{62}=0x3A +serdes_core_tx_polarity_flip_physical{63}=0x3A +serdes_core_tx_polarity_flip_physical{64}=0x3A + +dport_map_port_42=9 +dport_map_port_43=10 +dport_map_port_40=11 +dport_map_port_41=12 +portmap_40=65:100 +portmap_41=67:100 +portmap_42=69:100 +portmap_43=71:100 +phy_chain_rx_lane_map_physical{65.0}=0x73625104 +phy_chain_rx_lane_map_physical{66.0}=0x73625104 +phy_chain_rx_lane_map_physical{67.0}=0x73625104 +phy_chain_rx_lane_map_physical{68.0}=0x73625104 +phy_chain_rx_lane_map_physical{69.0}=0x73625104 +phy_chain_rx_lane_map_physical{70.0}=0x73625104 +phy_chain_rx_lane_map_physical{71.0}=0x73625104 +phy_chain_rx_lane_map_physical{72.0}=0x73625104 +phy_chain_tx_lane_map_physical{65.0}=0x42513076 +phy_chain_tx_lane_map_physical{66.0}=0x42513076 +phy_chain_tx_lane_map_physical{67.0}=0x42513076 +phy_chain_tx_lane_map_physical{68.0}=0x42513076 +phy_chain_tx_lane_map_physical{69.0}=0x42513076 +phy_chain_tx_lane_map_physical{70.0}=0x42513076 +phy_chain_tx_lane_map_physical{71.0}=0x42513076 +phy_chain_tx_lane_map_physical{72.0}=0x42513076 +serdes_core_rx_polarity_flip_physical{65}=0xE5 +serdes_core_rx_polarity_flip_physical{66}=0xE5 +serdes_core_rx_polarity_flip_physical{67}=0xE5 +serdes_core_rx_polarity_flip_physical{68}=0xE5 +serdes_core_rx_polarity_flip_physical{69}=0xE5 +serdes_core_rx_polarity_flip_physical{70}=0xE5 +serdes_core_rx_polarity_flip_physical{71}=0xE5 +serdes_core_rx_polarity_flip_physical{72}=0xE5 +serdes_core_tx_polarity_flip_physical{65}=0x5A +serdes_core_tx_polarity_flip_physical{66}=0x5A +serdes_core_tx_polarity_flip_physical{67}=0x5A +serdes_core_tx_polarity_flip_physical{68}=0x5A +serdes_core_tx_polarity_flip_physical{69}=0x5A +serdes_core_tx_polarity_flip_physical{70}=0x5A +serdes_core_tx_polarity_flip_physical{71}=0x5A +serdes_core_tx_polarity_flip_physical{72}=0x5A + +dport_map_port_46=25 +dport_map_port_47=26 +dport_map_port_44=27 +dport_map_port_45=28 +portmap_44=73:100 +portmap_45=75:100 +portmap_46=77:100 +portmap_47=79:100 +phy_chain_rx_lane_map_physical{73.0}=0x64501723 +phy_chain_rx_lane_map_physical{74.0}=0x64501723 +phy_chain_rx_lane_map_physical{75.0}=0x64501723 +phy_chain_rx_lane_map_physical{76.0}=0x64501723 +phy_chain_rx_lane_map_physical{77.0}=0x64501723 +phy_chain_rx_lane_map_physical{78.0}=0x64501723 +phy_chain_rx_lane_map_physical{79.0}=0x64501723 +phy_chain_rx_lane_map_physical{80.0}=0x64501723 +phy_chain_tx_lane_map_physical{73.0}=0x32015476 +phy_chain_tx_lane_map_physical{74.0}=0x32015476 +phy_chain_tx_lane_map_physical{75.0}=0x32015476 +phy_chain_tx_lane_map_physical{76.0}=0x32015476 +phy_chain_tx_lane_map_physical{77.0}=0x32015476 +phy_chain_tx_lane_map_physical{78.0}=0x32015476 +phy_chain_tx_lane_map_physical{79.0}=0x32015476 +phy_chain_tx_lane_map_physical{80.0}=0x32015476 +serdes_core_rx_polarity_flip_physical{73}=0xB6 +serdes_core_rx_polarity_flip_physical{74}=0xB6 +serdes_core_rx_polarity_flip_physical{75}=0xB6 +serdes_core_rx_polarity_flip_physical{76}=0xB6 +serdes_core_rx_polarity_flip_physical{77}=0xB6 +serdes_core_rx_polarity_flip_physical{78}=0xB6 +serdes_core_rx_polarity_flip_physical{79}=0xB6 +serdes_core_rx_polarity_flip_physical{80}=0xB6 +serdes_core_tx_polarity_flip_physical{73}=0x10 +serdes_core_tx_polarity_flip_physical{74}=0x10 +serdes_core_tx_polarity_flip_physical{75}=0x10 +serdes_core_tx_polarity_flip_physical{76}=0x10 +serdes_core_tx_polarity_flip_physical{77}=0x10 +serdes_core_tx_polarity_flip_physical{78}=0x10 +serdes_core_tx_polarity_flip_physical{79}=0x10 +serdes_core_tx_polarity_flip_physical{80}=0x10 + +dport_map_port_50=41 +dport_map_port_51=42 +dport_map_port_48=43 +dport_map_port_49=44 +portmap_48=81:100 +portmap_49=83:100 +portmap_50=85:100 +portmap_51=87:100 +phy_chain_rx_lane_map_physical{81.0}=0x20134567 +phy_chain_rx_lane_map_physical{82.0}=0x20134567 +phy_chain_rx_lane_map_physical{83.0}=0x20134567 +phy_chain_rx_lane_map_physical{84.0}=0x20134567 +phy_chain_rx_lane_map_physical{85.0}=0x20134567 +phy_chain_rx_lane_map_physical{86.0}=0x20134567 +phy_chain_rx_lane_map_physical{87.0}=0x20134567 +phy_chain_rx_lane_map_physical{88.0}=0x20134567 +phy_chain_tx_lane_map_physical{81.0}=0x67540123 +phy_chain_tx_lane_map_physical{82.0}=0x67540123 +phy_chain_tx_lane_map_physical{83.0}=0x67540123 +phy_chain_tx_lane_map_physical{84.0}=0x67540123 +phy_chain_tx_lane_map_physical{85.0}=0x67540123 +phy_chain_tx_lane_map_physical{86.0}=0x67540123 +phy_chain_tx_lane_map_physical{87.0}=0x67540123 +phy_chain_tx_lane_map_physical{88.0}=0x67540123 +serdes_core_rx_polarity_flip_physical{81}=0xBA +serdes_core_rx_polarity_flip_physical{82}=0xBA +serdes_core_rx_polarity_flip_physical{83}=0xBA +serdes_core_rx_polarity_flip_physical{84}=0xBA +serdes_core_rx_polarity_flip_physical{85}=0xBA +serdes_core_rx_polarity_flip_physical{86}=0xBA +serdes_core_rx_polarity_flip_physical{87}=0xBA +serdes_core_rx_polarity_flip_physical{88}=0xBA +serdes_core_tx_polarity_flip_physical{81}=0xAA +serdes_core_tx_polarity_flip_physical{82}=0xAA +serdes_core_tx_polarity_flip_physical{83}=0xAA +serdes_core_tx_polarity_flip_physical{84}=0xAA +serdes_core_tx_polarity_flip_physical{85}=0xAA +serdes_core_tx_polarity_flip_physical{86}=0xAA +serdes_core_tx_polarity_flip_physical{87}=0xAA +serdes_core_tx_polarity_flip_physical{88}=0xAA + +dport_map_port_54=57 +dport_map_port_55=58 +dport_map_port_52=59 +dport_map_port_53=60 +portmap_52=89:100 +portmap_53=91:100 +portmap_54=93:100 +portmap_55=95:100 +phy_chain_rx_lane_map_physical{89.0}=0x36271504 +phy_chain_rx_lane_map_physical{90.0}=0x36271504 +phy_chain_rx_lane_map_physical{91.0}=0x36271504 +phy_chain_rx_lane_map_physical{92.0}=0x36271504 +phy_chain_rx_lane_map_physical{93.0}=0x36271504 +phy_chain_rx_lane_map_physical{94.0}=0x36271504 +phy_chain_rx_lane_map_physical{95.0}=0x36271504 +phy_chain_rx_lane_map_physical{96.0}=0x36271504 +phy_chain_tx_lane_map_physical{89.0}=0x62413507 +phy_chain_tx_lane_map_physical{90.0}=0x62413507 +phy_chain_tx_lane_map_physical{91.0}=0x62413507 +phy_chain_tx_lane_map_physical{92.0}=0x62413507 +phy_chain_tx_lane_map_physical{93.0}=0x62413507 +phy_chain_tx_lane_map_physical{94.0}=0x62413507 +phy_chain_tx_lane_map_physical{95.0}=0x62413507 +phy_chain_tx_lane_map_physical{96.0}=0x62413507 +serdes_core_rx_polarity_flip_physical{89}=0x1C +serdes_core_rx_polarity_flip_physical{90}=0x1C +serdes_core_rx_polarity_flip_physical{91}=0x1C +serdes_core_rx_polarity_flip_physical{92}=0x1C +serdes_core_rx_polarity_flip_physical{93}=0x1C +serdes_core_rx_polarity_flip_physical{94}=0x1C +serdes_core_rx_polarity_flip_physical{95}=0x1C +serdes_core_rx_polarity_flip_physical{96}=0x1C +serdes_core_tx_polarity_flip_physical{89}=0x3B +serdes_core_tx_polarity_flip_physical{90}=0x3B +serdes_core_tx_polarity_flip_physical{91}=0x3B +serdes_core_tx_polarity_flip_physical{92}=0x3B +serdes_core_tx_polarity_flip_physical{93}=0x3B +serdes_core_tx_polarity_flip_physical{94}=0x3B +serdes_core_tx_polarity_flip_physical{95}=0x3B +serdes_core_tx_polarity_flip_physical{96}=0x3B + +dport_map_port_62=13 +dport_map_port_63=14 +dport_map_port_60=15 +dport_map_port_61=16 +portmap_60=97:100 +portmap_61=99:100 +portmap_62=101:100 +portmap_63=103:100 +phy_chain_rx_lane_map_physical{97.0}=0x32510467 +phy_chain_rx_lane_map_physical{98.0}=0x32510467 +phy_chain_rx_lane_map_physical{99.0}=0x32510467 +phy_chain_rx_lane_map_physical{100.0}=0x32510467 +phy_chain_rx_lane_map_physical{101.0}=0x32510467 +phy_chain_rx_lane_map_physical{102.0}=0x32510467 +phy_chain_rx_lane_map_physical{103.0}=0x32510467 +phy_chain_rx_lane_map_physical{104.0}=0x32510467 +phy_chain_tx_lane_map_physical{97.0}=0x57462103 +phy_chain_tx_lane_map_physical{98.0}=0x57462103 +phy_chain_tx_lane_map_physical{99.0}=0x57462103 +phy_chain_tx_lane_map_physical{100.0}=0x57462103 +phy_chain_tx_lane_map_physical{101.0}=0x57462103 +phy_chain_tx_lane_map_physical{102.0}=0x57462103 +phy_chain_tx_lane_map_physical{103.0}=0x57462103 +phy_chain_tx_lane_map_physical{104.0}=0x57462103 +serdes_core_rx_polarity_flip_physical{97}=0xE9 +serdes_core_rx_polarity_flip_physical{98}=0xE9 +serdes_core_rx_polarity_flip_physical{99}=0xE9 +serdes_core_rx_polarity_flip_physical{100}=0xE9 +serdes_core_rx_polarity_flip_physical{101}=0xE9 +serdes_core_rx_polarity_flip_physical{102}=0xE9 +serdes_core_rx_polarity_flip_physical{103}=0xE9 +serdes_core_rx_polarity_flip_physical{104}=0xE9 +serdes_core_tx_polarity_flip_physical{97}=0x1 +serdes_core_tx_polarity_flip_physical{98}=0x1 +serdes_core_tx_polarity_flip_physical{99}=0x1 +serdes_core_tx_polarity_flip_physical{100}=0x1 +serdes_core_tx_polarity_flip_physical{101}=0x1 +serdes_core_tx_polarity_flip_physical{102}=0x1 +serdes_core_tx_polarity_flip_physical{103}=0x1 +serdes_core_tx_polarity_flip_physical{104}=0x1 + +dport_map_port_66=29 +dport_map_port_67=30 +dport_map_port_64=31 +dport_map_port_65=32 +portmap_64=105:100 +portmap_65=107:100 +portmap_66=109:100 +portmap_67=111:100 +phy_chain_rx_lane_map_physical{105.0}=0x32106745 +phy_chain_rx_lane_map_physical{106.0}=0x32106745 +phy_chain_rx_lane_map_physical{107.0}=0x32106745 +phy_chain_rx_lane_map_physical{108.0}=0x32106745 +phy_chain_rx_lane_map_physical{109.0}=0x32106745 +phy_chain_rx_lane_map_physical{110.0}=0x32106745 +phy_chain_rx_lane_map_physical{111.0}=0x32106745 +phy_chain_rx_lane_map_physical{112.0}=0x32106745 +phy_chain_tx_lane_map_physical{105.0}=0x23015746 +phy_chain_tx_lane_map_physical{106.0}=0x23015746 +phy_chain_tx_lane_map_physical{107.0}=0x23015746 +phy_chain_tx_lane_map_physical{108.0}=0x23015746 +phy_chain_tx_lane_map_physical{109.0}=0x23015746 +phy_chain_tx_lane_map_physical{110.0}=0x23015746 +phy_chain_tx_lane_map_physical{111.0}=0x23015746 +phy_chain_tx_lane_map_physical{112.0}=0x23015746 +serdes_core_rx_polarity_flip_physical{105}=0x2A +serdes_core_rx_polarity_flip_physical{106}=0x2A +serdes_core_rx_polarity_flip_physical{107}=0x2A +serdes_core_rx_polarity_flip_physical{108}=0x2A +serdes_core_rx_polarity_flip_physical{109}=0x2A +serdes_core_rx_polarity_flip_physical{110}=0x2A +serdes_core_rx_polarity_flip_physical{111}=0x2A +serdes_core_rx_polarity_flip_physical{112}=0x2A +serdes_core_tx_polarity_flip_physical{105}=0xDA +serdes_core_tx_polarity_flip_physical{106}=0xDA +serdes_core_tx_polarity_flip_physical{107}=0xDA +serdes_core_tx_polarity_flip_physical{108}=0xDA +serdes_core_tx_polarity_flip_physical{109}=0xDA +serdes_core_tx_polarity_flip_physical{110}=0xDA +serdes_core_tx_polarity_flip_physical{111}=0xDA +serdes_core_tx_polarity_flip_physical{112}=0xDA + +dport_map_port_70=45 +dport_map_port_71=46 +dport_map_port_68=47 +dport_map_port_69=48 +portmap_68=113:100 +portmap_69=115:100 +portmap_70=117:100 +portmap_71=119:100 +phy_chain_rx_lane_map_physical{113.0}=0x32451607 +phy_chain_rx_lane_map_physical{114.0}=0x32451607 +phy_chain_rx_lane_map_physical{115.0}=0x32451607 +phy_chain_rx_lane_map_physical{116.0}=0x32451607 +phy_chain_rx_lane_map_physical{117.0}=0x32451607 +phy_chain_rx_lane_map_physical{118.0}=0x32451607 +phy_chain_rx_lane_map_physical{119.0}=0x32451607 +phy_chain_rx_lane_map_physical{120.0}=0x32451607 +phy_chain_tx_lane_map_physical{113.0}=0x65704231 +phy_chain_tx_lane_map_physical{114.0}=0x65704231 +phy_chain_tx_lane_map_physical{115.0}=0x65704231 +phy_chain_tx_lane_map_physical{116.0}=0x65704231 +phy_chain_tx_lane_map_physical{117.0}=0x65704231 +phy_chain_tx_lane_map_physical{118.0}=0x65704231 +phy_chain_tx_lane_map_physical{119.0}=0x65704231 +phy_chain_tx_lane_map_physical{120.0}=0x65704231 +serdes_core_rx_polarity_flip_physical{113}=0xD6 +serdes_core_rx_polarity_flip_physical{114}=0xD6 +serdes_core_rx_polarity_flip_physical{115}=0xD6 +serdes_core_rx_polarity_flip_physical{116}=0xD6 +serdes_core_rx_polarity_flip_physical{117}=0xD6 +serdes_core_rx_polarity_flip_physical{118}=0xD6 +serdes_core_rx_polarity_flip_physical{119}=0xD6 +serdes_core_rx_polarity_flip_physical{120}=0xD6 +serdes_core_tx_polarity_flip_physical{113}=0xDF +serdes_core_tx_polarity_flip_physical{114}=0xDF +serdes_core_tx_polarity_flip_physical{115}=0xDF +serdes_core_tx_polarity_flip_physical{116}=0xDF +serdes_core_tx_polarity_flip_physical{117}=0xDF +serdes_core_tx_polarity_flip_physical{118}=0xDF +serdes_core_tx_polarity_flip_physical{119}=0xDF +serdes_core_tx_polarity_flip_physical{120}=0xDF + +dport_map_port_74=61 +dport_map_port_75=62 +dport_map_port_72=63 +dport_map_port_73=64 +portmap_72=121:100 +portmap_73=123:100 +portmap_74=125:100 +portmap_75=127:100 +phy_chain_rx_lane_map_physical{121.0}=0x12304567 +phy_chain_rx_lane_map_physical{122.0}=0x12304567 +phy_chain_rx_lane_map_physical{123.0}=0x12304567 +phy_chain_rx_lane_map_physical{124.0}=0x12304567 +phy_chain_rx_lane_map_physical{125.0}=0x12304567 +phy_chain_rx_lane_map_physical{126.0}=0x12304567 +phy_chain_rx_lane_map_physical{127.0}=0x12304567 +phy_chain_rx_lane_map_physical{128.0}=0x12304567 +phy_chain_tx_lane_map_physical{121.0}=0x17526403 +phy_chain_tx_lane_map_physical{122.0}=0x17526403 +phy_chain_tx_lane_map_physical{123.0}=0x17526403 +phy_chain_tx_lane_map_physical{124.0}=0x17526403 +phy_chain_tx_lane_map_physical{125.0}=0x17526403 +phy_chain_tx_lane_map_physical{126.0}=0x17526403 +phy_chain_tx_lane_map_physical{127.0}=0x17526403 +phy_chain_tx_lane_map_physical{128.0}=0x17526403 +serdes_core_rx_polarity_flip_physical{121}=0xD5 +serdes_core_rx_polarity_flip_physical{122}=0xD5 +serdes_core_rx_polarity_flip_physical{123}=0xD5 +serdes_core_rx_polarity_flip_physical{124}=0xD5 +serdes_core_rx_polarity_flip_physical{125}=0xD5 +serdes_core_rx_polarity_flip_physical{126}=0xD5 +serdes_core_rx_polarity_flip_physical{127}=0xD5 +serdes_core_rx_polarity_flip_physical{128}=0xD5 +serdes_core_tx_polarity_flip_physical{121}=0xE2 +serdes_core_tx_polarity_flip_physical{122}=0xE2 +serdes_core_tx_polarity_flip_physical{123}=0xE2 +serdes_core_tx_polarity_flip_physical{124}=0xE2 +serdes_core_tx_polarity_flip_physical{125}=0xE2 +serdes_core_tx_polarity_flip_physical{126}=0xE2 +serdes_core_tx_polarity_flip_physical{127}=0xE2 +serdes_core_tx_polarity_flip_physical{128}=0xE2 + +dport_map_port_82=65 +dport_map_port_83=66 +dport_map_port_80=67 +dport_map_port_81=68 +portmap_80=129:100 +portmap_81=131:100 +portmap_82=133:100 +portmap_83=135:100 +phy_chain_rx_lane_map_physical{129.0}=0x70453261 +phy_chain_rx_lane_map_physical{130.0}=0x70453261 +phy_chain_rx_lane_map_physical{131.0}=0x70453261 +phy_chain_rx_lane_map_physical{132.0}=0x70453261 +phy_chain_rx_lane_map_physical{133.0}=0x70453261 +phy_chain_rx_lane_map_physical{134.0}=0x70453261 +phy_chain_rx_lane_map_physical{135.0}=0x70453261 +phy_chain_rx_lane_map_physical{136.0}=0x70453261 +phy_chain_tx_lane_map_physical{129.0}=0x32104675 +phy_chain_tx_lane_map_physical{130.0}=0x32104675 +phy_chain_tx_lane_map_physical{131.0}=0x32104675 +phy_chain_tx_lane_map_physical{132.0}=0x32104675 +phy_chain_tx_lane_map_physical{133.0}=0x32104675 +phy_chain_tx_lane_map_physical{134.0}=0x32104675 +phy_chain_tx_lane_map_physical{135.0}=0x32104675 +phy_chain_tx_lane_map_physical{136.0}=0x32104675 +serdes_core_rx_polarity_flip_physical{129}=0x2B +serdes_core_rx_polarity_flip_physical{130}=0x2B +serdes_core_rx_polarity_flip_physical{131}=0x2B +serdes_core_rx_polarity_flip_physical{132}=0x2B +serdes_core_rx_polarity_flip_physical{133}=0x2B +serdes_core_rx_polarity_flip_physical{134}=0x2B +serdes_core_rx_polarity_flip_physical{135}=0x2B +serdes_core_rx_polarity_flip_physical{136}=0x2B +serdes_core_tx_polarity_flip_physical{129}=0xB0 +serdes_core_tx_polarity_flip_physical{130}=0xB0 +serdes_core_tx_polarity_flip_physical{131}=0xB0 +serdes_core_tx_polarity_flip_physical{132}=0xB0 +serdes_core_tx_polarity_flip_physical{133}=0xB0 +serdes_core_tx_polarity_flip_physical{134}=0xB0 +serdes_core_tx_polarity_flip_physical{135}=0xB0 +serdes_core_tx_polarity_flip_physical{136}=0xB0 + +dport_map_port_86=81 +dport_map_port_87=82 +dport_map_port_84=83 +dport_map_port_85=84 +portmap_84=137:100 +portmap_85=139:100 +portmap_86=141:100 +portmap_87=143:100 +phy_chain_rx_lane_map_physical{137.0}=0x73625410 +phy_chain_rx_lane_map_physical{138.0}=0x73625410 +phy_chain_rx_lane_map_physical{139.0}=0x73625410 +phy_chain_rx_lane_map_physical{140.0}=0x73625410 +phy_chain_rx_lane_map_physical{141.0}=0x73625410 +phy_chain_rx_lane_map_physical{142.0}=0x73625410 +phy_chain_rx_lane_map_physical{143.0}=0x73625410 +phy_chain_rx_lane_map_physical{144.0}=0x73625410 +phy_chain_tx_lane_map_physical{137.0}=0x23407615 +phy_chain_tx_lane_map_physical{138.0}=0x23407615 +phy_chain_tx_lane_map_physical{139.0}=0x23407615 +phy_chain_tx_lane_map_physical{140.0}=0x23407615 +phy_chain_tx_lane_map_physical{141.0}=0x23407615 +phy_chain_tx_lane_map_physical{142.0}=0x23407615 +phy_chain_tx_lane_map_physical{143.0}=0x23407615 +phy_chain_tx_lane_map_physical{144.0}=0x23407615 +serdes_core_rx_polarity_flip_physical{137}=0x67 +serdes_core_rx_polarity_flip_physical{138}=0x67 +serdes_core_rx_polarity_flip_physical{139}=0x67 +serdes_core_rx_polarity_flip_physical{140}=0x67 +serdes_core_rx_polarity_flip_physical{141}=0x67 +serdes_core_rx_polarity_flip_physical{142}=0x67 +serdes_core_rx_polarity_flip_physical{143}=0x67 +serdes_core_rx_polarity_flip_physical{144}=0x67 +serdes_core_tx_polarity_flip_physical{137}=0xC6 +serdes_core_tx_polarity_flip_physical{138}=0xC6 +serdes_core_tx_polarity_flip_physical{139}=0xC6 +serdes_core_tx_polarity_flip_physical{140}=0xC6 +serdes_core_tx_polarity_flip_physical{141}=0xC6 +serdes_core_tx_polarity_flip_physical{142}=0xC6 +serdes_core_tx_polarity_flip_physical{143}=0xC6 +serdes_core_tx_polarity_flip_physical{144}=0xC6 + +dport_map_port_90=97 +dport_map_port_91=98 +dport_map_port_88=99 +dport_map_port_89=100 +portmap_88=145:100 +portmap_89=147:100 +portmap_90=149:100 +portmap_91=151:100 +phy_chain_rx_lane_map_physical{145.0}=0x32016457 +phy_chain_rx_lane_map_physical{146.0}=0x32016457 +phy_chain_rx_lane_map_physical{147.0}=0x32016457 +phy_chain_rx_lane_map_physical{148.0}=0x32016457 +phy_chain_rx_lane_map_physical{149.0}=0x32016457 +phy_chain_rx_lane_map_physical{150.0}=0x32016457 +phy_chain_rx_lane_map_physical{151.0}=0x32016457 +phy_chain_rx_lane_map_physical{152.0}=0x32016457 +phy_chain_tx_lane_map_physical{145.0}=0x76540132 +phy_chain_tx_lane_map_physical{146.0}=0x76540132 +phy_chain_tx_lane_map_physical{147.0}=0x76540132 +phy_chain_tx_lane_map_physical{148.0}=0x76540132 +phy_chain_tx_lane_map_physical{149.0}=0x76540132 +phy_chain_tx_lane_map_physical{150.0}=0x76540132 +phy_chain_tx_lane_map_physical{151.0}=0x76540132 +phy_chain_tx_lane_map_physical{152.0}=0x76540132 +serdes_core_rx_polarity_flip_physical{145}=0x63 +serdes_core_rx_polarity_flip_physical{146}=0x63 +serdes_core_rx_polarity_flip_physical{147}=0x63 +serdes_core_rx_polarity_flip_physical{148}=0x63 +serdes_core_rx_polarity_flip_physical{149}=0x63 +serdes_core_rx_polarity_flip_physical{150}=0x63 +serdes_core_rx_polarity_flip_physical{151}=0x63 +serdes_core_rx_polarity_flip_physical{152}=0x63 +serdes_core_tx_polarity_flip_physical{145}=0xB5 +serdes_core_tx_polarity_flip_physical{146}=0xB5 +serdes_core_tx_polarity_flip_physical{147}=0xB5 +serdes_core_tx_polarity_flip_physical{148}=0xB5 +serdes_core_tx_polarity_flip_physical{149}=0xB5 +serdes_core_tx_polarity_flip_physical{150}=0xB5 +serdes_core_tx_polarity_flip_physical{151}=0xB5 +serdes_core_tx_polarity_flip_physical{152}=0xB5 + +dport_map_port_94=113 +dport_map_port_95=114 +dport_map_port_92=115 +dport_map_port_93=116 +portmap_92=153:100 +portmap_93=155:100 +portmap_94=157:100 +portmap_95=159:100 +phy_chain_rx_lane_map_physical{153.0}=0x32106457 +phy_chain_rx_lane_map_physical{154.0}=0x32106457 +phy_chain_rx_lane_map_physical{155.0}=0x32106457 +phy_chain_rx_lane_map_physical{156.0}=0x32106457 +phy_chain_rx_lane_map_physical{157.0}=0x32106457 +phy_chain_rx_lane_map_physical{158.0}=0x32106457 +phy_chain_rx_lane_map_physical{159.0}=0x32106457 +phy_chain_rx_lane_map_physical{160.0}=0x32106457 +phy_chain_tx_lane_map_physical{153.0}=0x13205746 +phy_chain_tx_lane_map_physical{154.0}=0x13205746 +phy_chain_tx_lane_map_physical{155.0}=0x13205746 +phy_chain_tx_lane_map_physical{156.0}=0x13205746 +phy_chain_tx_lane_map_physical{157.0}=0x13205746 +phy_chain_tx_lane_map_physical{158.0}=0x13205746 +phy_chain_tx_lane_map_physical{159.0}=0x13205746 +phy_chain_tx_lane_map_physical{160.0}=0x13205746 +serdes_core_rx_polarity_flip_physical{153}=0xD3 +serdes_core_rx_polarity_flip_physical{154}=0xD3 +serdes_core_rx_polarity_flip_physical{155}=0xD3 +serdes_core_rx_polarity_flip_physical{156}=0xD3 +serdes_core_rx_polarity_flip_physical{157}=0xD3 +serdes_core_rx_polarity_flip_physical{158}=0xD3 +serdes_core_rx_polarity_flip_physical{159}=0xD3 +serdes_core_rx_polarity_flip_physical{160}=0xD3 +serdes_core_tx_polarity_flip_physical{153}=0x75 +serdes_core_tx_polarity_flip_physical{154}=0x75 +serdes_core_tx_polarity_flip_physical{155}=0x75 +serdes_core_tx_polarity_flip_physical{156}=0x75 +serdes_core_tx_polarity_flip_physical{157}=0x75 +serdes_core_tx_polarity_flip_physical{158}=0x75 +serdes_core_tx_polarity_flip_physical{159}=0x75 +serdes_core_tx_polarity_flip_physical{160}=0x75 + +dport_map_port_102=69 +dport_map_port_103=70 +dport_map_port_100=71 +dport_map_port_101=72 +portmap_100=161:100 +portmap_101=163:100 +portmap_102=165:100 +portmap_103=167:100 +phy_chain_rx_lane_map_physical{161.0}=0x04152736 +phy_chain_rx_lane_map_physical{162.0}=0x04152736 +phy_chain_rx_lane_map_physical{163.0}=0x04152736 +phy_chain_rx_lane_map_physical{164.0}=0x04152736 +phy_chain_rx_lane_map_physical{165.0}=0x04152736 +phy_chain_rx_lane_map_physical{166.0}=0x04152736 +phy_chain_rx_lane_map_physical{167.0}=0x04152736 +phy_chain_rx_lane_map_physical{168.0}=0x04152736 +phy_chain_tx_lane_map_physical{161.0}=0x14207653 +phy_chain_tx_lane_map_physical{162.0}=0x14207653 +phy_chain_tx_lane_map_physical{163.0}=0x14207653 +phy_chain_tx_lane_map_physical{164.0}=0x14207653 +phy_chain_tx_lane_map_physical{165.0}=0x14207653 +phy_chain_tx_lane_map_physical{166.0}=0x14207653 +phy_chain_tx_lane_map_physical{167.0}=0x14207653 +phy_chain_tx_lane_map_physical{168.0}=0x14207653 +serdes_core_rx_polarity_flip_physical{161}=0xB6 +serdes_core_rx_polarity_flip_physical{162}=0xB6 +serdes_core_rx_polarity_flip_physical{163}=0xB6 +serdes_core_rx_polarity_flip_physical{164}=0xB6 +serdes_core_rx_polarity_flip_physical{165}=0xB6 +serdes_core_rx_polarity_flip_physical{166}=0xB6 +serdes_core_rx_polarity_flip_physical{167}=0xB6 +serdes_core_rx_polarity_flip_physical{168}=0xB6 +serdes_core_tx_polarity_flip_physical{161}=0x4E +serdes_core_tx_polarity_flip_physical{162}=0x4E +serdes_core_tx_polarity_flip_physical{163}=0x4E +serdes_core_tx_polarity_flip_physical{164}=0x4E +serdes_core_tx_polarity_flip_physical{165}=0x4E +serdes_core_tx_polarity_flip_physical{166}=0x4E +serdes_core_tx_polarity_flip_physical{167}=0x4E +serdes_core_tx_polarity_flip_physical{168}=0x4E + +dport_map_port_106=85 +dport_map_port_107=86 +dport_map_port_104=87 +dport_map_port_105=88 +portmap_104=169:100 +portmap_105=171:100 +portmap_106=173:100 +portmap_107=175:100 +phy_chain_rx_lane_map_physical{169.0}=0x37261504 +phy_chain_rx_lane_map_physical{170.0}=0x37261504 +phy_chain_rx_lane_map_physical{171.0}=0x37261504 +phy_chain_rx_lane_map_physical{172.0}=0x37261504 +phy_chain_rx_lane_map_physical{173.0}=0x37261504 +phy_chain_rx_lane_map_physical{174.0}=0x37261504 +phy_chain_rx_lane_map_physical{175.0}=0x37261504 +phy_chain_rx_lane_map_physical{176.0}=0x37261504 +phy_chain_tx_lane_map_physical{169.0}=0x30246751 +phy_chain_tx_lane_map_physical{170.0}=0x30246751 +phy_chain_tx_lane_map_physical{171.0}=0x30246751 +phy_chain_tx_lane_map_physical{172.0}=0x30246751 +phy_chain_tx_lane_map_physical{173.0}=0x30246751 +phy_chain_tx_lane_map_physical{174.0}=0x30246751 +phy_chain_tx_lane_map_physical{175.0}=0x30246751 +phy_chain_tx_lane_map_physical{176.0}=0x30246751 +serdes_core_rx_polarity_flip_physical{169}=0x69 +serdes_core_rx_polarity_flip_physical{170}=0x69 +serdes_core_rx_polarity_flip_physical{171}=0x69 +serdes_core_rx_polarity_flip_physical{172}=0x69 +serdes_core_rx_polarity_flip_physical{173}=0x69 +serdes_core_rx_polarity_flip_physical{174}=0x69 +serdes_core_rx_polarity_flip_physical{175}=0x69 +serdes_core_rx_polarity_flip_physical{176}=0x69 +serdes_core_tx_polarity_flip_physical{169}=0x3F +serdes_core_tx_polarity_flip_physical{170}=0x3F +serdes_core_tx_polarity_flip_physical{171}=0x3F +serdes_core_tx_polarity_flip_physical{172}=0x3F +serdes_core_tx_polarity_flip_physical{173}=0x3F +serdes_core_tx_polarity_flip_physical{174}=0x3F +serdes_core_tx_polarity_flip_physical{175}=0x3F +serdes_core_tx_polarity_flip_physical{176}=0x3F + +dport_map_port_110=101 +dport_map_port_111=102 +dport_map_port_108=103 +dport_map_port_109=104 +portmap_108=177:100 +portmap_109=179:100 +portmap_110=181:100 +portmap_111=183:100 +phy_chain_rx_lane_map_physical{177.0}=0x72541063 +phy_chain_rx_lane_map_physical{178.0}=0x72541063 +phy_chain_rx_lane_map_physical{179.0}=0x72541063 +phy_chain_rx_lane_map_physical{180.0}=0x72541063 +phy_chain_rx_lane_map_physical{181.0}=0x72541063 +phy_chain_rx_lane_map_physical{182.0}=0x72541063 +phy_chain_rx_lane_map_physical{183.0}=0x72541063 +phy_chain_rx_lane_map_physical{184.0}=0x72541063 +phy_chain_tx_lane_map_physical{177.0}=0x67504312 +phy_chain_tx_lane_map_physical{178.0}=0x67504312 +phy_chain_tx_lane_map_physical{179.0}=0x67504312 +phy_chain_tx_lane_map_physical{180.0}=0x67504312 +phy_chain_tx_lane_map_physical{181.0}=0x67504312 +phy_chain_tx_lane_map_physical{182.0}=0x67504312 +phy_chain_tx_lane_map_physical{183.0}=0x67504312 +phy_chain_tx_lane_map_physical{184.0}=0x67504312 +serdes_core_rx_polarity_flip_physical{177}=0x9B +serdes_core_rx_polarity_flip_physical{178}=0x9B +serdes_core_rx_polarity_flip_physical{179}=0x9B +serdes_core_rx_polarity_flip_physical{180}=0x9B +serdes_core_rx_polarity_flip_physical{181}=0x9B +serdes_core_rx_polarity_flip_physical{182}=0x9B +serdes_core_rx_polarity_flip_physical{183}=0x9B +serdes_core_rx_polarity_flip_physical{184}=0x9B +serdes_core_tx_polarity_flip_physical{177}=0xD3 +serdes_core_tx_polarity_flip_physical{178}=0xD3 +serdes_core_tx_polarity_flip_physical{179}=0xD3 +serdes_core_tx_polarity_flip_physical{180}=0xD3 +serdes_core_tx_polarity_flip_physical{181}=0xD3 +serdes_core_tx_polarity_flip_physical{182}=0xD3 +serdes_core_tx_polarity_flip_physical{183}=0xD3 +serdes_core_tx_polarity_flip_physical{184}=0xD3 + +dport_map_port_114=117 +dport_map_port_115=118 +dport_map_port_112=119 +dport_map_port_113=120 +portmap_112=185:100 +portmap_113=187:100 +portmap_114=189:100 +portmap_115=191:100 +phy_chain_rx_lane_map_physical{185.0}=0x64570123 +phy_chain_rx_lane_map_physical{186.0}=0x64570123 +phy_chain_rx_lane_map_physical{187.0}=0x64570123 +phy_chain_rx_lane_map_physical{188.0}=0x64570123 +phy_chain_rx_lane_map_physical{189.0}=0x64570123 +phy_chain_rx_lane_map_physical{190.0}=0x64570123 +phy_chain_rx_lane_map_physical{191.0}=0x64570123 +phy_chain_rx_lane_map_physical{192.0}=0x64570123 +phy_chain_tx_lane_map_physical{185.0}=0x15247360 +phy_chain_tx_lane_map_physical{186.0}=0x15247360 +phy_chain_tx_lane_map_physical{187.0}=0x15247360 +phy_chain_tx_lane_map_physical{188.0}=0x15247360 +phy_chain_tx_lane_map_physical{189.0}=0x15247360 +phy_chain_tx_lane_map_physical{190.0}=0x15247360 +phy_chain_tx_lane_map_physical{191.0}=0x15247360 +phy_chain_tx_lane_map_physical{192.0}=0x15247360 +serdes_core_rx_polarity_flip_physical{185}=0xCA +serdes_core_rx_polarity_flip_physical{186}=0xCA +serdes_core_rx_polarity_flip_physical{187}=0xCA +serdes_core_rx_polarity_flip_physical{188}=0xCA +serdes_core_rx_polarity_flip_physical{189}=0xCA +serdes_core_rx_polarity_flip_physical{190}=0xCA +serdes_core_rx_polarity_flip_physical{191}=0xCA +serdes_core_rx_polarity_flip_physical{192}=0xCA +serdes_core_tx_polarity_flip_physical{185}=0x4 +serdes_core_tx_polarity_flip_physical{186}=0x4 +serdes_core_tx_polarity_flip_physical{187}=0x4 +serdes_core_tx_polarity_flip_physical{188}=0x4 +serdes_core_tx_polarity_flip_physical{189}=0x4 +serdes_core_tx_polarity_flip_physical{190}=0x4 +serdes_core_tx_polarity_flip_physical{191}=0x4 +serdes_core_tx_polarity_flip_physical{192}=0x4 + +dport_map_port_122=73 +dport_map_port_123=74 +dport_map_port_120=75 +dport_map_port_121=76 +portmap_120=193:100 +portmap_121=195:100 +portmap_122=197:100 +portmap_123=199:100 +phy_chain_rx_lane_map_physical{193.0}=0x36271504 +phy_chain_rx_lane_map_physical{194.0}=0x36271504 +phy_chain_rx_lane_map_physical{195.0}=0x36271504 +phy_chain_rx_lane_map_physical{196.0}=0x36271504 +phy_chain_rx_lane_map_physical{197.0}=0x36271504 +phy_chain_rx_lane_map_physical{198.0}=0x36271504 +phy_chain_rx_lane_map_physical{199.0}=0x36271504 +phy_chain_rx_lane_map_physical{200.0}=0x36271504 +phy_chain_tx_lane_map_physical{193.0}=0x41203675 +phy_chain_tx_lane_map_physical{194.0}=0x41203675 +phy_chain_tx_lane_map_physical{195.0}=0x41203675 +phy_chain_tx_lane_map_physical{196.0}=0x41203675 +phy_chain_tx_lane_map_physical{197.0}=0x41203675 +phy_chain_tx_lane_map_physical{198.0}=0x41203675 +phy_chain_tx_lane_map_physical{199.0}=0x41203675 +phy_chain_tx_lane_map_physical{200.0}=0x41203675 +serdes_core_rx_polarity_flip_physical{193}=0x49 +serdes_core_rx_polarity_flip_physical{194}=0x49 +serdes_core_rx_polarity_flip_physical{195}=0x49 +serdes_core_rx_polarity_flip_physical{196}=0x49 +serdes_core_rx_polarity_flip_physical{197}=0x49 +serdes_core_rx_polarity_flip_physical{198}=0x49 +serdes_core_rx_polarity_flip_physical{199}=0x49 +serdes_core_rx_polarity_flip_physical{200}=0x49 +serdes_core_tx_polarity_flip_physical{193}=0xE8 +serdes_core_tx_polarity_flip_physical{194}=0xE8 +serdes_core_tx_polarity_flip_physical{195}=0xE8 +serdes_core_tx_polarity_flip_physical{196}=0xE8 +serdes_core_tx_polarity_flip_physical{197}=0xE8 +serdes_core_tx_polarity_flip_physical{198}=0xE8 +serdes_core_tx_polarity_flip_physical{199}=0xE8 +serdes_core_tx_polarity_flip_physical{200}=0xE8 + +dport_map_port_126=89 +dport_map_port_127=90 +dport_map_port_124=91 +dport_map_port_125=92 +portmap_124=201:100 +portmap_125=203:100 +portmap_126=205:100 +portmap_127=207:100 +phy_chain_rx_lane_map_physical{201.0}=0x64570123 +phy_chain_rx_lane_map_physical{202.0}=0x64570123 +phy_chain_rx_lane_map_physical{203.0}=0x64570123 +phy_chain_rx_lane_map_physical{204.0}=0x64570123 +phy_chain_rx_lane_map_physical{205.0}=0x64570123 +phy_chain_rx_lane_map_physical{206.0}=0x64570123 +phy_chain_rx_lane_map_physical{207.0}=0x64570123 +phy_chain_rx_lane_map_physical{208.0}=0x64570123 +phy_chain_tx_lane_map_physical{201.0}=0x32046571 +phy_chain_tx_lane_map_physical{202.0}=0x32046571 +phy_chain_tx_lane_map_physical{203.0}=0x32046571 +phy_chain_tx_lane_map_physical{204.0}=0x32046571 +phy_chain_tx_lane_map_physical{205.0}=0x32046571 +phy_chain_tx_lane_map_physical{206.0}=0x32046571 +phy_chain_tx_lane_map_physical{207.0}=0x32046571 +phy_chain_tx_lane_map_physical{208.0}=0x32046571 +serdes_core_rx_polarity_flip_physical{201}=0xBA +serdes_core_rx_polarity_flip_physical{202}=0xBA +serdes_core_rx_polarity_flip_physical{203}=0xBA +serdes_core_rx_polarity_flip_physical{204}=0xBA +serdes_core_rx_polarity_flip_physical{205}=0xBA +serdes_core_rx_polarity_flip_physical{206}=0xBA +serdes_core_rx_polarity_flip_physical{207}=0xBA +serdes_core_rx_polarity_flip_physical{208}=0xBA +serdes_core_tx_polarity_flip_physical{201}=0x5F +serdes_core_tx_polarity_flip_physical{202}=0x5F +serdes_core_tx_polarity_flip_physical{203}=0x5F +serdes_core_tx_polarity_flip_physical{204}=0x5F +serdes_core_tx_polarity_flip_physical{205}=0x5F +serdes_core_tx_polarity_flip_physical{206}=0x5F +serdes_core_tx_polarity_flip_physical{207}=0x5F +serdes_core_tx_polarity_flip_physical{208}=0x5F + +dport_map_port_130=105 +dport_map_port_131=106 +dport_map_port_128=107 +dport_map_port_129=108 +portmap_128=209:100 +portmap_129=211:100 +portmap_130=213:100 +portmap_131=215:100 +phy_chain_rx_lane_map_physical{209.0}=0x37014526 +phy_chain_rx_lane_map_physical{210.0}=0x37014526 +phy_chain_rx_lane_map_physical{211.0}=0x37014526 +phy_chain_rx_lane_map_physical{212.0}=0x37014526 +phy_chain_rx_lane_map_physical{213.0}=0x37014526 +phy_chain_rx_lane_map_physical{214.0}=0x37014526 +phy_chain_rx_lane_map_physical{215.0}=0x37014526 +phy_chain_rx_lane_map_physical{216.0}=0x37014526 +phy_chain_tx_lane_map_physical{209.0}=0x56704213 +phy_chain_tx_lane_map_physical{210.0}=0x56704213 +phy_chain_tx_lane_map_physical{211.0}=0x56704213 +phy_chain_tx_lane_map_physical{212.0}=0x56704213 +phy_chain_tx_lane_map_physical{213.0}=0x56704213 +phy_chain_tx_lane_map_physical{214.0}=0x56704213 +phy_chain_tx_lane_map_physical{215.0}=0x56704213 +phy_chain_tx_lane_map_physical{216.0}=0x56704213 +serdes_core_rx_polarity_flip_physical{209}=0x19 +serdes_core_rx_polarity_flip_physical{210}=0x19 +serdes_core_rx_polarity_flip_physical{211}=0x19 +serdes_core_rx_polarity_flip_physical{212}=0x19 +serdes_core_rx_polarity_flip_physical{213}=0x19 +serdes_core_rx_polarity_flip_physical{214}=0x19 +serdes_core_rx_polarity_flip_physical{215}=0x19 +serdes_core_rx_polarity_flip_physical{216}=0x19 +serdes_core_tx_polarity_flip_physical{209}=0x35 +serdes_core_tx_polarity_flip_physical{210}=0x35 +serdes_core_tx_polarity_flip_physical{211}=0x35 +serdes_core_tx_polarity_flip_physical{212}=0x35 +serdes_core_tx_polarity_flip_physical{213}=0x35 +serdes_core_tx_polarity_flip_physical{214}=0x35 +serdes_core_tx_polarity_flip_physical{215}=0x35 +serdes_core_tx_polarity_flip_physical{216}=0x35 + +dport_map_port_134=121 +dport_map_port_135=122 +dport_map_port_132=123 +dport_map_port_133=124 +portmap_132=217:100 +portmap_133=219:100 +portmap_134=221:100 +portmap_135=223:100 +phy_chain_rx_lane_map_physical{217.0}=0x65041273 +phy_chain_rx_lane_map_physical{218.0}=0x65041273 +phy_chain_rx_lane_map_physical{219.0}=0x65041273 +phy_chain_rx_lane_map_physical{220.0}=0x65041273 +phy_chain_rx_lane_map_physical{221.0}=0x65041273 +phy_chain_rx_lane_map_physical{222.0}=0x65041273 +phy_chain_rx_lane_map_physical{223.0}=0x65041273 +phy_chain_rx_lane_map_physical{224.0}=0x65041273 +phy_chain_tx_lane_map_physical{217.0}=0x53174620 +phy_chain_tx_lane_map_physical{218.0}=0x53174620 +phy_chain_tx_lane_map_physical{219.0}=0x53174620 +phy_chain_tx_lane_map_physical{220.0}=0x53174620 +phy_chain_tx_lane_map_physical{221.0}=0x53174620 +phy_chain_tx_lane_map_physical{222.0}=0x53174620 +phy_chain_tx_lane_map_physical{223.0}=0x53174620 +phy_chain_tx_lane_map_physical{224.0}=0x53174620 +serdes_core_rx_polarity_flip_physical{217}=0xE6 +serdes_core_rx_polarity_flip_physical{218}=0xE6 +serdes_core_rx_polarity_flip_physical{219}=0xE6 +serdes_core_rx_polarity_flip_physical{220}=0xE6 +serdes_core_rx_polarity_flip_physical{221}=0xE6 +serdes_core_rx_polarity_flip_physical{222}=0xE6 +serdes_core_rx_polarity_flip_physical{223}=0xE6 +serdes_core_rx_polarity_flip_physical{224}=0xE6 +serdes_core_tx_polarity_flip_physical{217}=0xE8 +serdes_core_tx_polarity_flip_physical{218}=0xE8 +serdes_core_tx_polarity_flip_physical{219}=0xE8 +serdes_core_tx_polarity_flip_physical{220}=0xE8 +serdes_core_tx_polarity_flip_physical{221}=0xE8 +serdes_core_tx_polarity_flip_physical{222}=0xE8 +serdes_core_tx_polarity_flip_physical{223}=0xE8 +serdes_core_tx_polarity_flip_physical{224}=0xE8 + +dport_map_port_142=77 +dport_map_port_143=78 +dport_map_port_140=79 +dport_map_port_141=80 +portmap_140=225:100 +portmap_141=227:100 +portmap_142=229:100 +portmap_143=231:100 +phy_chain_rx_lane_map_physical{225.0}=0x32106745 +phy_chain_rx_lane_map_physical{226.0}=0x32106745 +phy_chain_rx_lane_map_physical{227.0}=0x32106745 +phy_chain_rx_lane_map_physical{228.0}=0x32106745 +phy_chain_rx_lane_map_physical{229.0}=0x32106745 +phy_chain_rx_lane_map_physical{230.0}=0x32106745 +phy_chain_rx_lane_map_physical{231.0}=0x32106745 +phy_chain_rx_lane_map_physical{232.0}=0x32106745 +phy_chain_tx_lane_map_physical{225.0}=0x65702134 +phy_chain_tx_lane_map_physical{226.0}=0x65702134 +phy_chain_tx_lane_map_physical{227.0}=0x65702134 +phy_chain_tx_lane_map_physical{228.0}=0x65702134 +phy_chain_tx_lane_map_physical{229.0}=0x65702134 +phy_chain_tx_lane_map_physical{230.0}=0x65702134 +phy_chain_tx_lane_map_physical{231.0}=0x65702134 +phy_chain_tx_lane_map_physical{232.0}=0x65702134 +serdes_core_rx_polarity_flip_physical{225}=0xDA +serdes_core_rx_polarity_flip_physical{226}=0xDA +serdes_core_rx_polarity_flip_physical{227}=0xDA +serdes_core_rx_polarity_flip_physical{228}=0xDA +serdes_core_rx_polarity_flip_physical{229}=0xDA +serdes_core_rx_polarity_flip_physical{230}=0xDA +serdes_core_rx_polarity_flip_physical{231}=0xDA +serdes_core_rx_polarity_flip_physical{232}=0xDA +serdes_core_tx_polarity_flip_physical{225}=0xB2 +serdes_core_tx_polarity_flip_physical{226}=0xB2 +serdes_core_tx_polarity_flip_physical{227}=0xB2 +serdes_core_tx_polarity_flip_physical{228}=0xB2 +serdes_core_tx_polarity_flip_physical{229}=0xB2 +serdes_core_tx_polarity_flip_physical{230}=0xB2 +serdes_core_tx_polarity_flip_physical{231}=0xB2 +serdes_core_tx_polarity_flip_physical{232}=0xB2 + +dport_map_port_146=93 +dport_map_port_147=94 +dport_map_port_144=95 +dport_map_port_145=96 +portmap_144=233:100 +portmap_145=235:100 +portmap_146=237:100 +portmap_147=239:100 +phy_chain_rx_lane_map_physical{233.0}=0x76450321 +phy_chain_rx_lane_map_physical{234.0}=0x76450321 +phy_chain_rx_lane_map_physical{235.0}=0x76450321 +phy_chain_rx_lane_map_physical{236.0}=0x76450321 +phy_chain_rx_lane_map_physical{237.0}=0x76450321 +phy_chain_rx_lane_map_physical{238.0}=0x76450321 +phy_chain_rx_lane_map_physical{239.0}=0x76450321 +phy_chain_rx_lane_map_physical{240.0}=0x76450321 +phy_chain_tx_lane_map_physical{233.0}=0x52301467 +phy_chain_tx_lane_map_physical{234.0}=0x52301467 +phy_chain_tx_lane_map_physical{235.0}=0x52301467 +phy_chain_tx_lane_map_physical{236.0}=0x52301467 +phy_chain_tx_lane_map_physical{237.0}=0x52301467 +phy_chain_tx_lane_map_physical{238.0}=0x52301467 +phy_chain_tx_lane_map_physical{239.0}=0x52301467 +phy_chain_tx_lane_map_physical{240.0}=0x52301467 +serdes_core_rx_polarity_flip_physical{233}=0xE5 +serdes_core_rx_polarity_flip_physical{234}=0xE5 +serdes_core_rx_polarity_flip_physical{235}=0xE5 +serdes_core_rx_polarity_flip_physical{236}=0xE5 +serdes_core_rx_polarity_flip_physical{237}=0xE5 +serdes_core_rx_polarity_flip_physical{238}=0xE5 +serdes_core_rx_polarity_flip_physical{239}=0xE5 +serdes_core_rx_polarity_flip_physical{240}=0xE5 +serdes_core_tx_polarity_flip_physical{233}=0xAA +serdes_core_tx_polarity_flip_physical{234}=0xAA +serdes_core_tx_polarity_flip_physical{235}=0xAA +serdes_core_tx_polarity_flip_physical{236}=0xAA +serdes_core_tx_polarity_flip_physical{237}=0xAA +serdes_core_tx_polarity_flip_physical{238}=0xAA +serdes_core_tx_polarity_flip_physical{239}=0xAA +serdes_core_tx_polarity_flip_physical{240}=0xAA + +dport_map_port_150=109 +dport_map_port_151=110 +dport_map_port_148=111 +dport_map_port_149=112 +portmap_148=241:100 +portmap_149=243:100 +portmap_150=245:100 +portmap_151=247:100 +phy_chain_rx_lane_map_physical{241.0}=0x01276534 +phy_chain_rx_lane_map_physical{242.0}=0x01276534 +phy_chain_rx_lane_map_physical{243.0}=0x01276534 +phy_chain_rx_lane_map_physical{244.0}=0x01276534 +phy_chain_rx_lane_map_physical{245.0}=0x01276534 +phy_chain_rx_lane_map_physical{246.0}=0x01276534 +phy_chain_rx_lane_map_physical{247.0}=0x01276534 +phy_chain_rx_lane_map_physical{248.0}=0x01276534 +phy_chain_tx_lane_map_physical{241.0}=0x67540123 +phy_chain_tx_lane_map_physical{242.0}=0x67540123 +phy_chain_tx_lane_map_physical{243.0}=0x67540123 +phy_chain_tx_lane_map_physical{244.0}=0x67540123 +phy_chain_tx_lane_map_physical{245.0}=0x67540123 +phy_chain_tx_lane_map_physical{246.0}=0x67540123 +phy_chain_tx_lane_map_physical{247.0}=0x67540123 +phy_chain_tx_lane_map_physical{248.0}=0x67540123 +serdes_core_rx_polarity_flip_physical{241}=0x34 +serdes_core_rx_polarity_flip_physical{242}=0x34 +serdes_core_rx_polarity_flip_physical{243}=0x34 +serdes_core_rx_polarity_flip_physical{244}=0x34 +serdes_core_rx_polarity_flip_physical{245}=0x34 +serdes_core_rx_polarity_flip_physical{246}=0x34 +serdes_core_rx_polarity_flip_physical{247}=0x34 +serdes_core_rx_polarity_flip_physical{248}=0x34 +serdes_core_tx_polarity_flip_physical{241}=0x83 +serdes_core_tx_polarity_flip_physical{242}=0x83 +serdes_core_tx_polarity_flip_physical{243}=0x83 +serdes_core_tx_polarity_flip_physical{244}=0x83 +serdes_core_tx_polarity_flip_physical{245}=0x83 +serdes_core_tx_polarity_flip_physical{246}=0x83 +serdes_core_tx_polarity_flip_physical{247}=0x83 +serdes_core_tx_polarity_flip_physical{248}=0x83 + +dport_map_port_154=125 +dport_map_port_155=126 +dport_map_port_152=127 +dport_map_port_153=128 +portmap_152=249:100 +portmap_153=251:100 +portmap_154=253:100 +portmap_155=255:100 +phy_chain_rx_lane_map_physical{249.0}=0x06152347 +phy_chain_rx_lane_map_physical{250.0}=0x06152347 +phy_chain_rx_lane_map_physical{251.0}=0x06152347 +phy_chain_rx_lane_map_physical{252.0}=0x06152347 +phy_chain_rx_lane_map_physical{253.0}=0x06152347 +phy_chain_rx_lane_map_physical{254.0}=0x06152347 +phy_chain_rx_lane_map_physical{255.0}=0x06152347 +phy_chain_rx_lane_map_physical{256.0}=0x06152347 +phy_chain_tx_lane_map_physical{249.0}=0x67501342 +phy_chain_tx_lane_map_physical{250.0}=0x67501342 +phy_chain_tx_lane_map_physical{251.0}=0x67501342 +phy_chain_tx_lane_map_physical{252.0}=0x67501342 +phy_chain_tx_lane_map_physical{253.0}=0x67501342 +phy_chain_tx_lane_map_physical{254.0}=0x67501342 +phy_chain_tx_lane_map_physical{255.0}=0x67501342 +phy_chain_tx_lane_map_physical{256.0}=0x67501342 +serdes_core_rx_polarity_flip_physical{249}=0x19 +serdes_core_rx_polarity_flip_physical{250}=0x19 +serdes_core_rx_polarity_flip_physical{251}=0x19 +serdes_core_rx_polarity_flip_physical{252}=0x19 +serdes_core_rx_polarity_flip_physical{253}=0x19 +serdes_core_rx_polarity_flip_physical{254}=0x19 +serdes_core_rx_polarity_flip_physical{255}=0x19 +serdes_core_rx_polarity_flip_physical{256}=0x19 +serdes_core_tx_polarity_flip_physical{249}=0x7E +serdes_core_tx_polarity_flip_physical{250}=0x7E +serdes_core_tx_polarity_flip_physical{251}=0x7E +serdes_core_tx_polarity_flip_physical{252}=0x7E +serdes_core_tx_polarity_flip_physical{253}=0x7E +serdes_core_tx_polarity_flip_physical{254}=0x7E +serdes_core_tx_polarity_flip_physical{255}=0x7E +serdes_core_tx_polarity_flip_physical{256}=0x7E + +dport_map_port_38=299 +portmap_38=257:10 + +dport_map_port_118=300 +portmap_118=258:10 + +portmap_19=259:10 + +portmap_39=260:10 + +portmap_59=261:10 + +portmap_79=262:10 + +portmap_99=263:10 + +portmap_119=264:10 + +portmap_139=265:10 + +portmap_159=266:10 + diff --git a/device/accton/x86_64-accton_minipack-r0/Accton-MINIPACK/port_config.ini b/device/accton/x86_64-accton_minipack-r0/Accton-MINIPACK/port_config.ini new file mode 100755 index 00000000000..cc8e7cbad5f --- /dev/null +++ b/device/accton/x86_64-accton_minipack-r0/Accton-MINIPACK/port_config.ini @@ -0,0 +1,129 @@ +# name lanes alias index +Ethernet1 5,6 onehundredGigE1 0 +Ethernet2 7,8 onehundredGigE2 1 +Ethernet3 1,2 onehundredGigE3 2 +Ethernet4 3,4 onehundredGigE4 3 +Ethernet5 37,38 onehundredGigE5 4 +Ethernet6 39,40 onehundredGigE6 5 +Ethernet7 33,34 onehundredGigE7 6 +Ethernet8 35,36 onehundredGigE8 7 +Ethernet9 69,70 onehundredGigE9 8 +Ethernet10 71,72 onehundredGigE10 9 +Ethernet11 65,66 onehundredGigE11 10 +Ethernet12 67,68 onehundredGigE12 11 +Ethernet13 101,102 onehundredGigE13 12 +Ethernet14 103,104 onehundredGigE14 13 +Ethernet15 97,98 onehundredGigE15 14 +Ethernet16 99,100 onehundredGigE16 15 +Ethernet17 13,14 onehundredGigE17 16 +Ethernet18 15,16 onehundredGigE18 17 +Ethernet19 9,10 onehundredGigE19 18 +Ethernet20 11,12 onehundredGigE20 19 +Ethernet21 45,46 onehundredGigE21 20 +Ethernet22 47,48 onehundredGigE22 21 +Ethernet23 41,42 onehundredGigE23 22 +Ethernet24 43,44 onehundredGigE24 23 +Ethernet25 77,78 onehundredGigE25 24 +Ethernet26 79,80 onehundredGigE26 25 +Ethernet27 73,74 onehundredGigE27 26 +Ethernet28 75,76 onehundredGigE28 27 +Ethernet29 109,110 onehundredGigE29 28 +Ethernet30 111,112 onehundredGigE30 29 +Ethernet31 105,106 onehundredGigE31 30 +Ethernet32 107,108 onehundredGigE32 31 +Ethernet33 21,22 onehundredGigE33 32 +Ethernet34 23,24 onehundredGigE34 33 +Ethernet35 17,18 onehundredGigE35 34 +Ethernet36 19,20 onehundredGigE36 35 +Ethernet37 53,54 onehundredGigE37 36 +Ethernet38 55,56 onehundredGigE38 37 +Ethernet39 49,50 onehundredGigE39 38 +Ethernet40 51,52 onehundredGigE40 39 +Ethernet41 85,86 onehundredGigE41 40 +Ethernet42 87,88 onehundredGigE42 41 +Ethernet43 81,82 onehundredGigE43 42 +Ethernet44 83,84 onehundredGigE44 43 +Ethernet45 117,118 onehundredGigE45 44 +Ethernet46 119,120 onehundredGigE46 45 +Ethernet47 113,114 onehundredGigE47 46 +Ethernet48 115,116 onehundredGigE48 47 +Ethernet49 29,30 onehundredGigE49 48 +Ethernet50 31,32 onehundredGigE50 49 +Ethernet51 25,26 onehundredGigE51 50 +Ethernet52 27,28 onehundredGigE52 51 +Ethernet53 61,62 onehundredGigE53 52 +Ethernet54 63,64 onehundredGigE54 53 +Ethernet55 57,58 onehundredGigE55 54 +Ethernet56 59,60 onehundredGigE56 55 +Ethernet57 93,94 onehundredGigE57 56 +Ethernet58 95,96 onehundredGigE58 57 +Ethernet59 89,90 onehundredGigE59 58 +Ethernet60 91,92 onehundredGigE60 59 +Ethernet61 125,126 onehundredGigE61 60 +Ethernet62 127,128 onehundredGigE62 61 +Ethernet63 121,122 onehundredGigE63 62 +Ethernet64 123,124 onehundredGigE64 63 +Ethernet65 133,134 onehundredGigE65 64 +Ethernet66 135,136 onehundredGigE66 65 +Ethernet67 129,130 onehundredGigE67 66 +Ethernet68 131,132 onehundredGigE68 67 +Ethernet69 165,166 onehundredGigE69 68 +Ethernet70 167,168 onehundredGigE70 69 +Ethernet71 161,162 onehundredGigE71 70 +Ethernet72 163,164 onehundredGigE72 71 +Ethernet73 197,198 onehundredGigE73 72 +Ethernet74 199,200 onehundredGigE74 73 +Ethernet75 193,194 onehundredGigE75 74 +Ethernet76 195,196 onehundredGigE76 75 +Ethernet77 229,230 onehundredGigE77 76 +Ethernet78 231,232 onehundredGigE78 77 +Ethernet79 225,226 onehundredGigE79 78 +Ethernet80 227,228 onehundredGigE80 79 +Ethernet81 141,142 onehundredGigE81 80 +Ethernet82 143,144 onehundredGigE82 81 +Ethernet83 137,138 onehundredGigE83 82 +Ethernet84 139,140 onehundredGigE84 83 +Ethernet85 173,174 onehundredGigE85 84 +Ethernet86 175,176 onehundredGigE86 85 +Ethernet87 169,170 onehundredGigE87 86 +Ethernet88 171,172 onehundredGigE88 87 +Ethernet89 205,206 onehundredGigE89 88 +Ethernet90 207,208 onehundredGigE90 89 +Ethernet91 201,202 onehundredGigE91 90 +Ethernet92 203,204 onehundredGigE92 91 +Ethernet93 237,238 onehundredGigE93 92 +Ethernet94 239,240 onehundredGigE94 93 +Ethernet95 233,234 onehundredGigE95 94 +Ethernet96 235,236 onehundredGigE96 95 +Ethernet97 149,150 onehundredGigE97 96 +Ethernet98 151,152 onehundredGigE98 97 +Ethernet99 145,146 onehundredGigE99 98 +Ethernet100 147,148 onehundredGigE100 99 +Ethernet101 181,182 onehundredGigE101 100 +Ethernet102 183,184 onehundredGigE102 101 +Ethernet103 177,178 onehundredGigE103 102 +Ethernet104 179,180 onehundredGigE104 103 +Ethernet105 213,214 onehundredGigE105 104 +Ethernet106 215,216 onehundredGigE106 105 +Ethernet107 209,210 onehundredGigE107 106 +Ethernet108 211,212 onehundredGigE108 107 +Ethernet109 245,246 onehundredGigE109 108 +Ethernet110 247,248 onehundredGigE110 109 +Ethernet111 241,242 onehundredGigE111 110 +Ethernet112 243,244 onehundredGigE112 111 +Ethernet113 157,158 onehundredGigE113 112 +Ethernet114 159,160 onehundredGigE114 113 +Ethernet115 153,154 onehundredGigE115 114 +Ethernet116 155,156 onehundredGigE116 115 +Ethernet117 189,190 onehundredGigE117 116 +Ethernet118 191,192 onehundredGigE118 117 +Ethernet119 185,186 onehundredGigE119 118 +Ethernet120 187,188 onehundredGigE120 119 +Ethernet121 221,222 onehundredGigE121 120 +Ethernet122 223,224 onehundredGigE122 121 +Ethernet123 217,218 onehundredGigE123 122 +Ethernet124 219,220 onehundredGigE124 123 +Ethernet125 253,254 onehundredGigE125 124 +Ethernet126 255,256 onehundredGigE126 125 +Ethernet127 249,250 onehundredGigE127 126 +Ethernet128 251,252 onehundredGigE128 127 diff --git a/device/accton/x86_64-accton_minipack-r0/Accton-MINIPACK/sai.profile b/device/accton/x86_64-accton_minipack-r0/Accton-MINIPACK/sai.profile new file mode 100755 index 00000000000..f76d1e7424a --- /dev/null +++ b/device/accton/x86_64-accton_minipack-r0/Accton-MINIPACK/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/config_16Q_FEC544_EVTB_100G.bcm diff --git a/device/accton/x86_64-accton_minipack-r0/default_sku b/device/accton/x86_64-accton_minipack-r0/default_sku new file mode 100644 index 00000000000..21ede3d5ad5 --- /dev/null +++ b/device/accton/x86_64-accton_minipack-r0/default_sku @@ -0,0 +1 @@ +Accton-MINIPACK t1 diff --git a/device/accton/x86_64-accton_minipack-r0/installer.conf b/device/accton/x86_64-accton_minipack-r0/installer.conf new file mode 100755 index 00000000000..30392541fad --- /dev/null +++ b/device/accton/x86_64-accton_minipack-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=57600 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off" diff --git a/device/accton/x86_64-accton_minipack-r0/led_proc_init.soc b/device/accton/x86_64-accton_minipack-r0/led_proc_init.soc new file mode 100755 index 00000000000..6b2aaa76407 --- /dev/null +++ b/device/accton/x86_64-accton_minipack-r0/led_proc_init.soc @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/device/accton/x86_64-accton_minipack-r0/plugins/eeprom.py b/device/accton/x86_64-accton_minipack-r0/plugins/eeprom.py new file mode 100644 index 00000000000..c1ac366fc3f --- /dev/null +++ b/device/accton/x86_64-accton_minipack-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0x200, '', True) diff --git a/device/accton/x86_64-accton_minipack-r0/plugins/led_control.py b/device/accton/x86_64-accton_minipack-r0/plugins/led_control.py new file mode 100755 index 00000000000..26e2a7f7c8a --- /dev/null +++ b/device/accton/x86_64-accton_minipack-r0/plugins/led_control.py @@ -0,0 +1,59 @@ +#!/usr/bin/env python +# +# led_control.py +# +# Platform-specific LED control functionality for SONiC +# + +try: + from sonic_led.led_control_base import LedControlBase + import swsssdk + import threading + import os + import logging + import struct + import time + import syslog + from socket import * + from select import * + from minipack.pimutil import PimUtil +except ImportError, e: + raise ImportError(str(e) + " - required module not found") + + +class LedControl(LedControlBase): + """Platform specific LED control class""" + SONIC_PORT_NAME_PREFIX = "Ethernet" + + + def __init__(self): + pim=PimUtil() + pim.init_pim_fpga() + + def _port_name_to_index(self, port_name): + # Strip "Ethernet" off port name + if not port_name.startswith(self.SONIC_PORT_NAME_PREFIX): + return -1 + + port_idx = int(port_name[len(self.SONIC_PORT_NAME_PREFIX):]) + return port_idx + + def _port_state_to_mode(self, port_idx, state): + if state == "up": + return 1, 4 #port linkup, led is green + else: + return 0, 0 #port linkdown, led is off + + def port_link_state_change(self, portname, state): + pim=PimUtil() + port_idx = self._port_name_to_index(portname) + new_control, led_mode = self._port_state_to_mode(port_idx, state) + color, control=pim.get_port_led(port_idx) + + if color==led_mode: + if control==new_control: + return + + pim.set_port_led(port_idx, led_mode, new_control)#port linkup, led is green + #port linkdown, led is off + diff --git a/device/accton/x86_64-accton_minipack-r0/plugins/psuutil.py b/device/accton/x86_64-accton_minipack-r0/plugins/psuutil.py new file mode 100644 index 00000000000..99e1bbae937 --- /dev/null +++ b/device/accton/x86_64-accton_minipack-r0/plugins/psuutil.py @@ -0,0 +1,57 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.num = 4 + self.psu_path = "/sys/bus/platform/devices/minipack_psensor/" + self.psu_voltage = "/in{0}_input" + + def get_num_psus(self): + return self.num + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_voltage.format(index*2-1) + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status > 0 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_voltage.format(index*2) + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status > 0 diff --git a/device/accton/x86_64-accton_minipack-r0/plugins/sfputil.py b/device/accton/x86_64-accton_minipack-r0/plugins/sfputil.py new file mode 100755 index 00000000000..6f62d8ed4c0 --- /dev/null +++ b/device/accton/x86_64-accton_minipack-r0/plugins/sfputil.py @@ -0,0 +1,146 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase + import os + import sys, getopt + from minipack.pimutil import PimUtil +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 128 + + LOCAL_OOM_PATH = "/usr/local/bin/minipack_qsfp/port%d_eeprom" + + _port_to_is_present = {} + _port_to_lp_mode = {} + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORT_END + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def sfp_map(self, index): + port = index + 1 + base = ((port-1)/8*8) + 10 + index = (port - 1) % 8 + index = 7 - index + if (index%2): + index = index -1 + else: + index = index +1 + bus = base + index + return bus + + + def __init__(self): + for x in range(0, self.port_end): + self.port_to_eeprom_mapping[x] = self.LOCAL_OOM_PATH %x + + SfpUtilBase.__init__(self) + pim=PimUtil() + pim.init_pim_fpga() + + def __del__(self): + self.value=0 + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + pim=PimUtil() + status=pim.get_qsfp_presence(port_num) + return status + + def get_low_power_mode(self, port_num): + if port_num < self.port_start or port_num > self.port_end: + return False + + pim=PimUtil() + return pim.get_low_power_mode(port_num) + + def set_low_power_mode(self, port_num, lpmode): + if port_num < self.port_start or port_num > self.port_end: + return False + pim=PimUtil() + pim.set_low_power_mode(port_num, lpmode) + return True + + def reset(self, port_num): + if port_num < self.port_start or port_num > self.port_end: + return False + pim=PimUtil() + pim.reset(port_num) + return True + + def get_transceiver_change_event(self, timeout=0): + pim=PimUtil() + start_time = time.time() + port_dict = {} + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print "get_transceiver_change_event:Invalid timeout value", timeout + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print 'get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + change_status=0 + port_dict = pim.get_qsfp_interrupt() + present=0 + for key, value in port_dict.iteritems(): + if value==1: + present=self.get_presence(key) + change_status=1 + if present: + port_dict[key]='1' + else: + port_dict[key]='0' + + if change_status: + return True, port_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + print "get_evt_change_event: Should not reach here." + return False, {} diff --git a/device/accton/x86_64-accton_minipack-r0/sensors.conf b/device/accton/x86_64-accton_minipack-r0/sensors.conf new file mode 100755 index 00000000000..966d2f11ad9 --- /dev/null +++ b/device/accton/x86_64-accton_minipack-r0/sensors.conf @@ -0,0 +1,3 @@ +# libsensors configuration file +# ------------------------------------------------ + diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/Alphanetworks-SNH60A0-320FV2/port_config.ini b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/Alphanetworks-SNH60A0-320FV2/port_config.ini new file mode 100644 index 00000000000..745cc69428b --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/Alphanetworks-SNH60A0-320FV2/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 33,34,35,36 Ethernet1/0/1 0 100000 +Ethernet4 37,38,39,40 Ethernet1/0/5 1 100000 +Ethernet8 41,42,43,44 Ethernet1/0/9 2 100000 +Ethernet12 45,46,47,48 Ethernet1/0/13 3 100000 +Ethernet16 49,50,51,52 Ethernet1/0/17 4 100000 +Ethernet20 53,54,55,56 Ethernet1/0/21 5 100000 +Ethernet24 57,58,59,60 Ethernet1/0/25 6 100000 +Ethernet28 61,62,63,64 Ethernet1/0/29 7 100000 +Ethernet32 65,66,67,68 Ethernet1/0/33 8 100000 +Ethernet36 69,70,71,72 Ethernet1/0/37 9 100000 +Ethernet40 73,74,75,76 Ethernet1/0/41 10 100000 +Ethernet44 77,78,79,80 Ethernet1/0/45 11 100000 +Ethernet48 81,82,83,84 Ethernet1/0/49 12 100000 +Ethernet52 85,86,87,88 Ethernet1/0/53 13 100000 +Ethernet56 89,90,91,92 Ethernet1/0/57 14 100000 +Ethernet60 93,94,95,96 Ethernet1/0/61 15 100000 +Ethernet64 97,98,99,100 Ethernet1/0/65 16 100000 +Ethernet68 101,102,103,104 Ethernet1/0/69 17 100000 +Ethernet72 105,106,107,108 Ethernet1/0/73 18 100000 +Ethernet76 109,110,111,112 Ethernet1/0/77 19 100000 +Ethernet80 113,114,115,116 Ethernet1/0/81 20 100000 +Ethernet84 117,118,119,120 Ethernet1/0/85 21 100000 +Ethernet88 121,122,123,124 Ethernet1/0/89 22 100000 +Ethernet92 125,126,127,128 Ethernet1/0/93 23 100000 +Ethernet96 1,2,3,4 Ethernet1/0/97 24 100000 +Ethernet100 5,6,7,8 Ethernet1/0/101 25 100000 +Ethernet104 9,10,11,12 Ethernet1/0/105 26 100000 +Ethernet108 13,14,15,16 Ethernet1/0/109 27 100000 +Ethernet112 17,18,19,20 Ethernet1/0/113 28 100000 +Ethernet116 21,22,23,24 Ethernet1/0/117 29 100000 +Ethernet120 25,26,27,28 Ethernet1/0/121 30 100000 +Ethernet124 29,30,31,32 Ethernet1/0/125 31 100000 \ No newline at end of file diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/Alphanetworks-SNH60A0-320FV2/sai.profile b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/Alphanetworks-SNH60A0-320FV2/sai.profile new file mode 100644 index 00000000000..b6e792ad0a1 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/Alphanetworks-SNH60A0-320FV2/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-snh60a0-32x100G.config.bcm diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/Alphanetworks-SNH60A0-320FV2/th-snh60a0-32x100G.config.bcm b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/Alphanetworks-SNH60A0-320FV2/th-snh60a0-32x100G.config.bcm new file mode 100644 index 00000000000..395827122e1 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/Alphanetworks-SNH60A0-320FV2/th-snh60a0-32x100G.config.bcm @@ -0,0 +1,163 @@ +# This property file is for ZION-320F 100G mode only. +# Zion-320F uses Tomahawk BCM56960 as its mac. Besides, it is phyless. +# Note: The settings in this file are not verified yet. + + + +# Set stat collection interval in microseconds. +# Setting this to 0 will prevent counters from being started. +bcm_stat_interval.0=1000000 + +# Linkscan interval in microseconds. +# If non-zero, bcm_init() will start linkscan +bcm_linkscan_interval.0=450000 + + + +# BCM56960 : MMU Cell Buffer Allocation Profile to support ASF (cut-thru) Forwarding +# 0: No cut-through support +# 1: Similar speed profile (Default) +# 2: Extreme speed profile + +os=unix + + + +# EagleCore ports +#portmap_66=129:10 +#portmap_100=131:10 + +# Loopback ports +portmap_33=132:10 +portmap_67=133:10 +portmap_101=134:10 +portmap_135=135:10 + +#FalconCore[0 - 7] must map to logical port[1 - 32] +portmap_1=1:100 +portmap_2=5:100 +portmap_3=9:100 +portmap_4=13:100 +portmap_5=17:100 +portmap_6=21:100 +portmap_7=25:100 +portmap_8=29:100 +#FalconCore[8 - 15] must map to logical port[34 - 65] +portmap_34=33:100 +portmap_35=37:100 +portmap_36=41:100 +portmap_37=45:100 +portmap_38=49:100 +portmap_39=53:100 +portmap_40=57:100 +portmap_41=61:100 +#FalconCore[16 - 23] must map to logical port[68 - 99] +portmap_68=65:100 +portmap_69=69:100 +portmap_70=73:100 +portmap_71=77:100 +portmap_72=81:100 +portmap_73=85:100 +portmap_74=89:100 +portmap_75=93:100 +#FalconCore[24 - 31] must map to logical port[102 - 133] +portmap_102=97:100 +portmap_103=101:100 +portmap_104=105:100 +portmap_105=109:100 +portmap_106=113:100 +portmap_107=117:100 +portmap_108=121:100 +portmap_109=125:100 + +pbmp_xport_xe=0x3fd000000ff4000003fc000001fe +pbmp_oversubscribe=0x0000000000000000000000000000000000003fc000000ff0000003fc000001fe + + + +#core-0 +xgxs_rx_lane_map_ce0=0x3012 +xgxs_rx_lane_map_ce1=0x1230 +xgxs_rx_lane_map_ce2=0x3012 +xgxs_rx_lane_map_ce3=0x1230 +xgxs_rx_lane_map_ce4=0x1230 +xgxs_rx_lane_map_ce5=0x1230 +xgxs_rx_lane_map_ce6=0x1230 +xgxs_rx_lane_map_ce7=0x1230 + +#core-8 +xgxs_rx_lane_map_ce8=0x1032 +xgxs_rx_lane_map_ce9=0x1230 +xgxs_rx_lane_map_ce10=0x1032 +xgxs_rx_lane_map_ce11=0x1230 +xgxs_rx_lane_map_ce12=0x1230 +xgxs_rx_lane_map_ce13=0x3012 +xgxs_rx_lane_map_ce14=0x1230 +xgxs_rx_lane_map_ce15=0x3012 + +#core-16 +xgxs_rx_lane_map_ce16=0x3012 +xgxs_rx_lane_map_ce17=0x3012 +xgxs_rx_lane_map_ce18=0x1230 +xgxs_rx_lane_map_ce19=0x3012 +xgxs_rx_lane_map_ce20=0x3012 +xgxs_rx_lane_map_ce21=0x3012 +xgxs_rx_lane_map_ce22=0x3012 +xgxs_rx_lane_map_ce23=0x3012 + +#core-24 +xgxs_rx_lane_map_ce24=0x3210 +xgxs_rx_lane_map_ce25=0x3012 +xgxs_rx_lane_map_ce26=0x3210 +xgxs_rx_lane_map_ce27=0x3012 +xgxs_rx_lane_map_ce28=0x3012 +xgxs_rx_lane_map_ce29=0x1230 +xgxs_rx_lane_map_ce30=0x3012 +xgxs_rx_lane_map_ce31=0x3012 + +# +# Remap XGXS tx lanes to desired mapping by hardware provide. +#core-0 +xgxs_tx_lane_map_ce0=0x3210 +xgxs_tx_lane_map_ce1=0x1032 +xgxs_tx_lane_map_ce2=0x3210 +xgxs_tx_lane_map_ce3=0x1032 +xgxs_tx_lane_map_ce4=0x3210 +xgxs_tx_lane_map_ce5=0x3210 +xgxs_tx_lane_map_ce6=0x3210 +xgxs_tx_lane_map_ce7=0x1230 + +#core-8 +xgxs_tx_lane_map_ce8=0x2301 +xgxs_tx_lane_map_ce9=0x3210 +xgxs_tx_lane_map_ce10=0x2301 +xgxs_tx_lane_map_ce11=0x3210 +xgxs_tx_lane_map_ce12=0x0123 +xgxs_tx_lane_map_ce13=0x3210 +xgxs_tx_lane_map_ce14=0x0123 +xgxs_tx_lane_map_ce15=0x3210 + +#core-16 +xgxs_tx_lane_map_ce16=0x2301 +xgxs_tx_lane_map_ce17=0x3210 +xgxs_tx_lane_map_ce18=0x0123 +xgxs_tx_lane_map_ce19=0x1032 +xgxs_tx_lane_map_ce20=0x0123 +xgxs_tx_lane_map_ce21=0x1032 +xgxs_tx_lane_map_ce22=0x0123 +xgxs_tx_lane_map_ce23=0x1032 + +#core-24 +xgxs_tx_lane_map_ce24=0x1032 +xgxs_tx_lane_map_ce25=0x1032 +xgxs_tx_lane_map_ce26=0x1032 +xgxs_tx_lane_map_ce27=0x1032 +xgxs_tx_lane_map_ce28=0x1032 +xgxs_tx_lane_map_ce29=0x1032 +xgxs_tx_lane_map_ce30=0x3210 +xgxs_tx_lane_map_ce31=0x3210 + + + +ptp_ts_pll_fref=25000000 +ptp_bs_fref=25000000 diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/default_sku b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/default_sku new file mode 100755 index 00000000000..588c4a951df --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/default_sku @@ -0,0 +1 @@ +Alphanetworks-SNH60A0-320FV2 t1 diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/fancontrol b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/fancontrol new file mode 100644 index 00000000000..24184113d2b --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/fancontrol @@ -0,0 +1,9 @@ +INTERVAL=10 +FCTEMPS=/sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/4-004d/hwmon/hwmon3/temp1_input +FCFANS=/sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan1_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan2_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan3_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan4_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan5_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan6_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan11_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan12_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan13_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan14_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan15_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan16_input +MINTEMP=/sys/bus/i2c/devices/0-005e/fan_pwm=50 +MAXTEMP=/sys/bus/i2c/devices/0-005e/fan_pwm=70 +MINSTART=/sys/bus/i2c/devices/0-005e/fan_pwm=100 +MINSTOP=/sys/bus/i2c/devices/0-005e/fan_pwm=100 +MINPWM=/sys/bus/i2c/devices/0-005e/fan_pwm=100 +MAXPWM=/sys/bus/i2c/devices/0-005e/fan_pwm=200 \ No newline at end of file diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/installer.conf b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/led_proc_init.soc b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/led_proc_init.soc new file mode 100644 index 00000000000..c05dbe3326f --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/led_proc_init.soc @@ -0,0 +1,45 @@ +# LED microprocessor initialization for alphanetworks snh60a0-320fv2 + +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=31 REMAP_PORT_1=30 REMAP_PORT_2=29 REMAP_PORT_3=28 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=27 REMAP_PORT_5=26 REMAP_PORT_6=25 REMAP_PORT_7=24 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=23 REMAP_PORT_9=22 REMAP_PORT_10=21 REMAP_PORT_11=20 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=19 REMAP_PORT_13=18 REMAP_PORT_14=17 REMAP_PORT_15=16 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=15 REMAP_PORT_17=14 REMAP_PORT_18=13 REMAP_PORT_19=12 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=11 REMAP_PORT_21=10 REMAP_PORT_22=9 REMAP_PORT_23=8 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=7 REMAP_PORT_25=6 REMAP_PORT_26=5 REMAP_PORT_27=4 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=3 REMAP_PORT_29=2 REMAP_PORT_30=1 REMAP_PORT_31=0 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=63 REMAP_PORT_33=62 REMAP_PORT_34=61 REMAP_PORT_35=60 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=59 REMAP_PORT_37=58 REMAP_PORT_38=57 REMAP_PORT_39=56 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=55 REMAP_PORT_41=54 REMAP_PORT_42=53 REMAP_PORT_43=52 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=51 REMAP_PORT_45=50 REMAP_PORT_46=49 REMAP_PORT_47=48 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=47 REMAP_PORT_49=46 REMAP_PORT_50=45 REMAP_PORT_51=44 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=43 REMAP_PORT_53=42 REMAP_PORT_54=41 REMAP_PORT_55=40 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=39 REMAP_PORT_57=38 REMAP_PORT_58=37 REMAP_PORT_59=36 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=35 REMAP_PORT_61=34 REMAP_PORT_62=33 REMAP_PORT_63=32 + +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=3 REMAP_PORT_1=2 REMAP_PORT_2=1 REMAP_PORT_3=0 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=7 REMAP_PORT_5=6 REMAP_PORT_6=5 REMAP_PORT_7=4 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=11 REMAP_PORT_9=10 REMAP_PORT_10=9 REMAP_PORT_11=8 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=15 REMAP_PORT_13=14 REMAP_PORT_14=13 REMAP_PORT_15=12 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=19 REMAP_PORT_17=18 REMAP_PORT_18=17 REMAP_PORT_19=16 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=23 REMAP_PORT_21=22 REMAP_PORT_22=21 REMAP_PORT_23=20 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=27 REMAP_PORT_25=26 REMAP_PORT_26=25 REMAP_PORT_27=24 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=31 REMAP_PORT_29=30 REMAP_PORT_30=29 REMAP_PORT_31=28 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=35 REMAP_PORT_33=34 REMAP_PORT_34=33 REMAP_PORT_35=32 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=39 REMAP_PORT_37=38 REMAP_PORT_38=37 REMAP_PORT_39=36 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=43 REMAP_PORT_41=42 REMAP_PORT_42=41 REMAP_PORT_43=40 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=47 REMAP_PORT_45=46 REMAP_PORT_46=45 REMAP_PORT_47=44 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 REMAP_PORT_49=50 REMAP_PORT_50=49 REMAP_PORT_51=48 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 REMAP_PORT_53=54 REMAP_PORT_54=53 REMAP_PORT_55=52 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 REMAP_PORT_57=58 REMAP_PORT_58=57 REMAP_PORT_59=56 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=62 REMAP_PORT_62=61 REMAP_PORT_63=60 + +led 0 stop +led 0 prog 2A 01 86 FF 06 FF C2 7F 60 FF 02 20 60 FE 67 2E 06 FE F2 04 60 FE D2 40 74 0E 70 1C 02 00 60 FE 67 2E 06 FE F2 04 60 FE D2 20 74 20 70 70 02 A0 F6 FE 04 D2 01 70 39 74 5F 06 FE 28 32 00 32 01 B7 97 71 46 75 4E 06 FF C2 04 74 4E 70 5F 67 76 67 72 67 76 67 76 67 76 67 76 67 76 67 76 57 67 76 67 76 67 76 67 76 67 76 67 76 67 76 67 76 57 3A 80 32 0E 87 57 32 0F 87 57 +led 0 auto on +led 0 start + +led 1 stop +led 1 prog 2A 01 86 FF 06 FF C2 7F 60 FF 02 00 60 FE 67 1C 06 FE F2 04 60 FE D2 40 74 0E 70 5E 02 A0 F6 FE 04 D2 01 70 27 74 4D 06 FE 28 32 00 32 01 B7 97 71 34 75 3C 06 FF C2 04 74 3C 70 4D 67 64 67 60 67 64 67 64 67 64 67 64 67 64 67 64 57 67 64 67 64 67 64 67 64 67 64 67 64 67 64 67 64 57 3A 80 32 0E 87 57 32 0F 87 57 +led 1 auto on +led 1 start diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/plugins/eeprom.py b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/plugins/eeprom.py new file mode 100644 index 00000000000..c0122e65844 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0056/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/plugins/led_control.py b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/plugins/led_control.py new file mode 100644 index 00000000000..bab96d69dc4 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/plugins/led_control.py @@ -0,0 +1,255 @@ +#!/usr/bin/env python +# +# led_control.py +# +# Platform-specific LED control functionality for SONiC +# + +# try: +# from sonic_led.led_control_base import LedControlBase +# import swsssdk +# except ImportError, e: +# raise ImportError (str(e) + " - required module not found") + +import time + +class LedControlBase(object): +# __metaclass__ = abc.ABCMeta + +# @abc.abstractmethod + def port_link_state_change(self, port, state): + """ + Called when port link state changes. Update port link state LED here. + + :param port: A string, SONiC port name (e.shg., "Ethernet0") + :param state: A string, the port link state (either "up" or "down") + """ + return + +### Zion specified ### +read_fan_fault = 0 +is_fan_all_OK = 0 +read_power_status = 0 +is_power_all_OK = 0 +is_thermal_high = 0 +is_reset_button_push = 0 +########################## + +def sysled_task(): + while True: + system_led_check() + time.sleep(5) + +### Zion specified ### +def system_led_check(): + global read_fan_fault, read_power_status, is_fan_all_OK, is_power_all_OK, is_thermal_high, is_reset_button_push + is_fan_all_OK = 1 + is_power_all_OK = 0 + is_thermal_high = 0 + is_reset_button_push = 0 + with open("/sys/bus/i2c/devices/1-005e/fan1_fault", "r") as f1: + read_fan_fault = f1.read() + with open("/sys/bus/i2c/devices/9-005f/fan1_led", "w") as f11: + if str(read_fan_fault) == str("1\n"): + is_fan_all_OK = 0 + f11.write("4") + else: + f11.write("1") + with open("/sys/bus/i2c/devices/1-005e/fan2_fault", "r") as f1: + read_fan_fault = f1.read() + with open("/sys/bus/i2c/devices/9-005f/fan2_led", "w") as f11: + if str(read_fan_fault) == str("1\n"): + is_fan_all_OK = 0 + f11.write("4") + else: + f11.write("1") + with open("/sys/bus/i2c/devices/1-005e/fan3_fault", "r") as f1: + read_fan_fault = f1.read() + with open("/sys/bus/i2c/devices/9-005f/fan3_led", "w") as f11: + if str(read_fan_fault) == str("1\n"): + is_fan_all_OK = 0 + f11.write("4") + else: + f11.write("1") + with open("/sys/bus/i2c/devices/1-005e/fan4_fault", "r") as f1: + read_fan_fault = f1.read() + with open("/sys/bus/i2c/devices/9-005f/fan4_led", "w") as f11: + if str(read_fan_fault) == str("1\n"): + is_fan_all_OK = 0 + f11.write("4") + else: + f11.write("1") + with open("/sys/bus/i2c/devices/1-005e/fan5_fault", "r") as f1: + read_fan_fault = f1.read() + with open("/sys/bus/i2c/devices/9-005f/fan5_led", "w") as f11: + if str(read_fan_fault) == str("1\n"): + is_fan_all_OK = 0 + f11.write("4") + else: + f11.write("1") + with open("/sys/bus/i2c/devices/1-005e/fan6_fault", "r") as f1: + read_fan_fault = f1.read() + with open("/sys/bus/i2c/devices/9-005f/fan6_led", "w") as f11: + if str(read_fan_fault) == str("1\n"): + is_fan_all_OK = 0 + f11.write("4") + else: + f11.write("1") + + + with open("/sys/bus/i2c/devices/1-005e/psu1_power_good", "r") as f1: + read_power_status = f1.read() + with open("/sys/bus/i2c/devices/9-005f/sys_pwr", "w") as f11: + if str(read_power_status) == str("1\n"): + f11.write("1") + else: + f11.write("4") + with open("/sys/bus/i2c/devices/1-005e/psu1_present", "r") as f1: + read_power_status = f1.read() + with open("/sys/bus/i2c/devices/9-005f/sys_pwr", "w") as f11: + if str(read_power_status) == str("1\n"): + is_power_all_OK = is_power_all_OK + 1 + f11.write("1") + else: + f11.write("4") + with open("/sys/bus/i2c/devices/1-005e/psu2_power_good", "r") as f1: + read_power_status = f1.read() + with open("/sys/bus/i2c/devices/9-005f/sys_pwr", "w") as f11: + if str(read_power_status) == str("1\n"): + f11.write("1") + else: + f11.write("4") + with open("/sys/bus/i2c/devices/1-005e/psu2_present", "r") as f1: + read_power_status = f1.read() + with open("/sys/bus/i2c/devices/9-005f/sys_pwr", "w") as f11: + if str(read_power_status) == str("1\n"): + is_power_all_OK = is_power_all_OK + 1 + f11.write("1") + else: + f11.write("4") + + + with open("/sys/bus/i2c/devices/9-005f/swi_ctrl", "r") as f5: + is_reset_button_push = f5.read() + if str(is_reset_button_push) == "1\n": + is_reset_button_push = 1 + else: + is_reset_button_push = 0 + + with open("/sys/bus/i2c/devices/4-004d/hwmon/hwmon3/temp1_input", "r") as f3: + is_thermal_high = f3.read() + if int(is_thermal_high) >= 70000: + is_thermal_high = 1 + else: + is_thermal_high = 0 + + with open("/sys/bus/i2c/devices/9-005f/sys_status", "w") as f2: + if is_reset_button_push == 1: + f2.write("3") + elif is_fan_all_OK == 0 or is_power_all_OK == 0 or is_thermal_high == 1: + f2.write("4") + else: + f2.write("1") + + return +########## + + +class LedControl(LedControlBase): + """Platform specific LED control class""" + PORT_TABLE_PREFIX = "PORT_TABLE:" + + SONIC_PORT_NAME_PREFIX = "Ethernet" + + LED_SYSFS_PATH_BREAKOUT_CAPABLE = "/sys/class/leds/qsfp{0}_{1}/brightness" + LED_SYSFS_PATH_NO_BREAKOUT = "/sys/class/leds/qsfp{0}/brightness" + + QSFP_BREAKOUT_START_IDX = 1 + QSFP_BREAKOUT_END_IDX = 24 + QSFP_NO_BREAKOUT_START_IDX = 25 + QSFP_NO_BREAKOUT_END_IDX = 32 + + LED_COLOR_OFF = 0 + LED_COLOR_GREEN = 1 + LED_COLOR_YELLOW = 2 + + # Helper method to map SONiC port name to Arista QSFP index + def _port_name_to_qsfp_index(self, port_name): + # Strip "Ethernet" off port name + if not port_name.startswith(self.SONIC_PORT_NAME_PREFIX): + return -1 + + sonic_port_num = int(port_name[len(self.SONIC_PORT_NAME_PREFIX):]) + + swss = swsssdk.SonicV2Connector() + swss.connect(swss.APPL_DB) + + lanes = swss.get(swss.APPL_DB, self.PORT_TABLE_PREFIX + port_name, 'lanes') + + # SONiC port nums are 0-based and increment by 4 + # Arista QSFP indices are 1-based and increment by 1 + return (((sonic_port_num/4) + 1), sonic_port_num%4, len(lanes.split(','))) + + + # Concrete implementation of port_link_state_change() method + def port_link_state_change_bk(self, port, state): + qsfp_index, lane_index, lanes = self._port_name_to_qsfp_index(port) + + # Ignore invalid QSFP indices + if qsfp_index <= 0 or lanes <= 0 or lanes > 4: + return + + # QSFP indices 1-24 are breakout-capable and have four LEDs, and each LED indicate one lane. + # whereas indices 25-32 are not breakout-capable, and only have one + if qsfp_index <= self.QSFP_BREAKOUT_END_IDX: + # assuming 40G, then we need to control four lanes + led_sysfs_paths = [ self.LED_SYSFS_PATH_BREAKOUT_CAPABLE.format(qsfp_index, i) for i in range(lane_index + 1, lane_index + 1 + lanes) ] + else: + led_sysfs_paths = [ self.LED_SYSFS_PATH_NO_BREAKOUT.format(qsfp_index) ] + + for led_sysfs_path in led_sysfs_paths: + led_file = open(led_sysfs_path, "w") + + if state == "up": + led_file.write("%d" % self.LED_COLOR_GREEN) + else: + led_file.write("%d" % self.LED_COLOR_OFF) + + led_file.close() + + # Constructor + def __init__(self): + # Initialize all front-panel status LEDs to green + with open("/sys/bus/i2c/devices/9-005f/sys_locator", "w") as f: + f.write("0") + with open("/sys/bus/i2c/devices/9-005f/sys_pwr", "w") as f: + f.write("1") + with open("/sys/bus/i2c/devices/9-005f/sys_status", "w") as f: + f.write("1") + + # Initialize all fan LEDs to green + with open("/sys/bus/i2c/devices/9-005f/fan1_led", "w") as f: + f.write("1") + with open("/sys/bus/i2c/devices/9-005f/fan2_led", "w") as f: + f.write("1") + with open("/sys/bus/i2c/devices/9-005f/fan3_led", "w") as f: + f.write("1") + with open("/sys/bus/i2c/devices/9-005f/fan4_led", "w") as f: + f.write("1") + with open("/sys/bus/i2c/devices/9-005f/fan5_led", "w") as f: + f.write("1") + with open("/sys/bus/i2c/devices/9-005f/fan6_led", "w") as f: + f.write("1") + sysled_task() + + # Initialize: Turn all front panel QSFP LEDs off + # # for qsfp_index in range(self.QSFP_BREAKOUT_START_IDX, self.QSFP_BREAKOUT_END_IDX + 1): + # # for lane in range(1, 5): + # # led_sysfs_path = self.LED_SYSFS_PATH_BREAKOUT_CAPABLE.format(qsfp_index, lane) + # # with open(led_sysfs_path, 'w') as led_file: + # # led_file.write("%d" % self.LED_COLOR_OFF) + + # # for qsfp_index in range(self.QSFP_NO_BREAKOUT_START_IDX, self.QSFP_NO_BREAKOUT_END_IDX + 1): + # # led_sysfs_path = self.LED_SYSFS_PATH_NO_BREAKOUT.format(qsfp_index) + # # with open(led_sysfs_path, 'w') as led_file: + # # led_file.write("%d" % self.LED_COLOR_OFF) diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/plugins/psuutil.py b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/plugins/psuutil.py new file mode 100644 index 00000000000..7a3b87f24d2 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/plugins/psuutil.py @@ -0,0 +1,66 @@ +#!/usr/bin/env python + +############################################################################# +# Alphanetworks +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = { + 1: "/psu1_present", + 2: "/psu2_present", + } + self.psu_oper_status = { + 1: "/psu1_power_good", + 2: "/psu2_power_good", + } + self.psu_mapping = "0-005e" + if not os.path.exists(self.psu_path+self.psu_mapping): + self.psu_mapping = "1-005e" + + def get_num_psus(self): + return len(self.psu_presence) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping+self.psu_oper_status[index] + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping + self.psu_presence[index] + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/plugins/sfputil.py b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/plugins/sfputil.py new file mode 100644 index 00000000000..9e502578f15 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/plugins/sfputil.py @@ -0,0 +1,116 @@ +#!/usr/bin/env python + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class SfpUtil(SfpUtilBase): + """Platform specific SfpUtill class""" + + first_port = 0 + last_port = 31 + port_num = 32 + + port_to_eeprom = {} + port_to_i2cbus_mapping = { + 1 : 14, + 2 : 15, + 3 : 16, + 4 : 17, + } + + eeprom_path = "/sys/bus/i2c/devices/{0}-005f/sfp{1}_eeprom" + port_reset_path = "/sys/bus/i2c/devices/{0}-005f/sfp{1}_port_reset" + present_path = "/sys/bus/i2c/devices/{0}-005f/sfp{1}_is_present" + + _qsfp_ports = range(first_port, port_num + 1) + @property + def port_start(self): + return self.first_port + + @property + def port_end(self): + return self.last_port + + @property + def qsfp_ports(self): + return range(self.first_port, self.port_num + 1) + + @property + def port_to_eeprom_mapping(self): + return self.port_to_eeprom + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError + + def __init__(self): + path = self.eeprom_path + for x in range(self.first_port, self.last_port + 1): + index = (x % 8) + i2c_index = (x / 8) + 1 + self.port_to_eeprom[x] = path.format(self.port_to_i2cbus_mapping[i2c_index], (index + 1)) + SfpUtilBase.__init__(self) + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.first_port or port_num > self.last_port: + return False + + index = (port_num % 8) + i2c_index = (port_num / 8) + 1 + path = self.port_reset_path + port_path = path.format(self.port_to_i2cbus_mapping[i2c_index], (index + 1)) + + try: + reg_file = open(port_path, 'w') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # reset + reg_file.write('1') + + time.sleep(1) + + reg_file.write('0') + + reg_file.close() + return True + + def set_low_power_mode(self, port_nuM, lpmode): + raise NotImplementedError + + def get_low_power_mode(self, port_num): + raise NotImplementedError + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.first_port or port_num > self.last_port: + return False + + index = (port_num % 8) + i2c_index = (port_num / 8) + 1 + path = self.present_path + port_path = path.format(self.port_to_i2cbus_mapping[i2c_index], (index + 1)) + + + try: + reg_file = open(port_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if reg_value == '1': + return True + + return False + diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/sensors.conf b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/sensors.conf new file mode 100644 index 00000000000..90562c389f0 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60a0_320fv2-r0/sensors.conf @@ -0,0 +1,17 @@ +# libsensors configuration file for snh60a0_320f +# ------------------------------------------------ + +bus "i2c-1" "SMBus I801 adapter at f000" +chip "goreme_power_cpld-*" + label fan1 "Fan tray 1 front" + label fan2 "Fan tray 2 front" + label fan3 "Fan tray 3 front" + label fan4 "Fan tray 4 front" + label fan5 "Fan tray 5 front" + label fan6 "Fan tray 6 front" + label fan11 "Fan tray 1 rear" + label fan12 "Fan tray 2 rear" + label fan13 "Fan tray 3 rear" + label fan14 "Fan tray 4 rear" + label fan15 "Fan tray 5 rear" + label fan16 "Fan tray 6 rear" diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/Alphanetworks-SNH60B0-640F/port_config.ini b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/Alphanetworks-SNH60B0-640F/port_config.ini new file mode 100644 index 00000000000..d365e18da78 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/Alphanetworks-SNH60B0-640F/port_config.ini @@ -0,0 +1,67 @@ +# name lanes alias index speed +Ethernet0 5,6,7,8 Ethernet1/0/1 0 100000 +Ethernet4 9,10,11,12 Ethernet1/0/5 1 100000 +Ethernet8 13,14,15,16 Ethernet1/0/9 2 100000 +Ethernet12 1,2,3,4 Ethernet1/0/13 3 100000 +Ethernet16 21,22,23,24 Ethernet1/0/17 4 100000 +Ethernet20 25,26,27,28 Ethernet1/0/21 5 100000 +Ethernet24 29,30,31,32 Ethernet1/0/25 6 100000 +Ethernet28 17,18,19,20 Ethernet1/0/29 7 100000 +Ethernet32 37,38,39,40 Ethernet1/0/33 8 100000 +Ethernet36 41,42,43,44 Ethernet1/0/37 9 100000 +Ethernet40 45,46,47,48 Ethernet1/0/41 10 100000 +Ethernet44 33,34,35,36 Ethernet1/0/45 11 100000 +Ethernet48 53,54,55,56 Ethernet1/0/49 12 100000 +Ethernet52 57,58,59,60 Ethernet1/0/53 13 100000 +Ethernet56 61,62,63,64 Ethernet1/0/57 14 100000 +Ethernet60 49,50,51,52 Ethernet1/0/61 15 100000 +Ethernet64 69,70,71,72 Ethernet1/0/65 16 100000 +Ethernet68 73,74,75,76 Ethernet1/0/69 17 100000 +Ethernet72 77,78,79,80 Ethernet1/0/73 18 100000 +Ethernet76 65,66,67,68 Ethernet1/0/77 19 100000 +Ethernet80 85,86,87,88 Ethernet1/0/81 20 100000 +Ethernet84 89,90,91,92 Ethernet1/0/85 21 100000 +Ethernet88 93,94,95,96 Ethernet1/0/89 22 100000 +Ethernet92 81,82,83,84 Ethernet1/0/93 23 100000 +Ethernet96 101,102,103,104 Ethernet1/0/97 24 100000 +Ethernet100 105,106,107,108 Ethernet1/0/101 25 100000 +Ethernet104 109,110,111,112 Ethernet1/0/105 26 100000 +Ethernet108 97,98,99,100 Ethernet1/0/109 27 100000 +Ethernet112 117,118,119,120 Ethernet1/0/113 28 100000 +Ethernet116 121,122,123,124 Ethernet1/0/117 29 100000 +Ethernet120 125,126,127,128 Ethernet1/0/121 30 100000 +Ethernet124 113,114,115,116 Ethernet1/0/125 31 100000 +Ethernet128 133,134,135,136 Ethernet1/0/129 32 100000 +Ethernet132 137,138,139,140 Ethernet1/0/133 33 100000 +Ethernet136 141,142,143,144 Ethernet1/0/137 34 100000 +Ethernet140 129,130,131,132 Ethernet1/0/141 35 100000 +Ethernet144 149,150,151,152 Ethernet1/0/145 36 100000 +Ethernet148 153,154,155,156 Ethernet1/0/149 37 100000 +Ethernet152 157,158,159,160 Ethernet1/0/153 38 100000 +Ethernet156 145,146,147,148 Ethernet1/0/157 39 100000 +Ethernet160 165,166,167,168 Ethernet1/0/161 40 100000 +Ethernet164 169,170,171,172 Ethernet1/0/165 41 100000 +Ethernet168 173,174,175,176 Ethernet1/0/169 42 100000 +Ethernet172 161,162,163,164 Ethernet1/0/173 43 100000 +Ethernet176 181,182,183,184 Ethernet1/0/177 44 100000 +Ethernet180 185,186,187,188 Ethernet1/0/181 45 100000 +Ethernet184 189,190,191,192 Ethernet1/0/185 46 100000 +Ethernet188 177,178,179,180 Ethernet1/0/189 47 100000 +Ethernet192 197,198,199,200 Ethernet1/0/193 48 100000 +Ethernet196 201,202,203,204 Ethernet1/0/197 49 100000 +Ethernet200 205,206,207,208 Ethernet1/0/201 50 100000 +Ethernet204 193,194,195,196 Ethernet1/0/205 51 100000 +Ethernet208 213,214,215,216 Ethernet1/0/209 52 100000 +Ethernet212 217,218,219,220 Ethernet1/0/213 53 100000 +Ethernet216 221,222,223,224 Ethernet1/0/217 54 100000 +Ethernet220 209,210,211,212 Ethernet1/0/221 55 100000 +Ethernet224 229,230,231,232 Ethernet1/0/225 56 100000 +Ethernet228 233,234,235,236 Ethernet1/0/229 57 100000 +Ethernet232 237,238,239,240 Ethernet1/0/233 58 100000 +Ethernet236 225,226,227,228 Ethernet1/0/237 59 100000 +Ethernet240 245,246,247,248 Ethernet1/0/241 60 100000 +Ethernet244 249,250,251,252 Ethernet1/0/245 61 100000 +Ethernet248 253,254,255,256 Ethernet1/0/249 62 100000 +Ethernet252 241,242,243,244 Ethernet1/0/253 63 100000 +Ethernet256 257 Ethernet1/0/257 64 10000 +Ethernet260 259 Ethernet1/0/261 65 10000 diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/Alphanetworks-SNH60B0-640F/sai.profile b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/Alphanetworks-SNH60B0-640F/sai.profile new file mode 100644 index 00000000000..04555733c02 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/Alphanetworks-SNH60B0-640F/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-snh60b0-64x100G.config.bcm diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/Alphanetworks-SNH60B0-640F/th2-snh60b0-64x100G.config.bcm b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/Alphanetworks-SNH60B0-640F/th2-snh60b0-64x100G.config.bcm new file mode 100644 index 00000000000..60ca5053b97 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/Alphanetworks-SNH60B0-640F/th2-snh60b0-64x100G.config.bcm @@ -0,0 +1,535 @@ +# This property file is for GOREME-2U 1x100G mode only. +# GOREME-2U uses Tomahawk2 BCM56970 as its mac. Besides, it is phyless. +# Note: The settings in this file are not verified yet. + +os=unix + +bcm_stat_interval.0=1000000 +bcm_linkscan_interval.0=250000 + +# Tuning MDIO_OUTPUT_DELAY as 0xf based on HW RD suggesstion and DVT result. +mdio_output_delay.0=0xf + +# Mode control to select L2 Table DMA mode aka L2MODE_POLL (0) or +# L2MOD_FIFO mechanism aka L2MODE_FIFO (1) for L2 table change notification. +l2xmsg_mode=1 + +# Memory table size configs +l2_mem_entries=40960 +l3_mem_entries=40960 + +portmap_66=257:10 +portmap_100=259:10 + +# Falcon core - front port +# FalconCore[0 - 15] must map to logical port[1-16], PIPE-0. +portmap_1=5:100 +portmap_2=9:100 +portmap_3=13:100 +portmap_4=1:100 +portmap_5=21:100 +portmap_6=25:100 +portmap_7=29:100 +portmap_8=17:100 +portmap_9=37:100 +portmap_10=41:100 +portmap_11=45:100 +portmap_12=33:100 +portmap_13=53:100 +portmap_14=57:100 +portmap_15=61:100 +portmap_16=49:100 + +# FalconCore[16 - 31] must map to logical port[34-49], PIPE-1. +portmap_34=69:100 +portmap_35=73:100 +portmap_36=77:100 +portmap_37=65:100 +portmap_38=85:100 +portmap_39=89:100 +portmap_40=93:100 +portmap_41=81:100 +portmap_42=101:100 +portmap_43=105:100 +portmap_44=109:100 +portmap_45=97:100 +portmap_46=117:100 +portmap_47=121:100 +portmap_48=125:100 +portmap_49=113:100 + +# FalconCore[32 - 47] must map to logical port[68-83], PIPE-2. +portmap_68=133:100 +portmap_69=137:100 +portmap_70=141:100 +portmap_71=129:100 +portmap_72=149:100 +portmap_73=153:100 +portmap_74=157:100 +portmap_75=145:100 +portmap_76=165:100 +portmap_77=169:100 +portmap_78=173:100 +portmap_79=161:100 +portmap_80=181:100 +portmap_81=185:100 +portmap_82=189:100 +portmap_83=177:100 + +# FalconCore[48 - 63] must map to logical port[102-117], PIPE-3. +portmap_102=197:100 +portmap_103=201:100 +portmap_104=205:100 +portmap_105=193:100 +portmap_106=213:100 +portmap_107=217:100 +portmap_108=221:100 +portmap_109=209:100 +portmap_110=229:100 +portmap_111=233:100 +portmap_112=237:100 +portmap_113=225:100 +portmap_114=245:100 +portmap_115=249:100 +portmap_116=253:100 +portmap_117=241:100 + +# Configure all front port as CE ports. +pbmp_xport_xe=0x00000000000000000000000000000000003fffd0000ffff40003fffc0001fffe + +# Oversubscription mode +# +# Refers to a switch being configured such that the I/O bandwidth is greater than the +# core bandwidth. +# BCM56970 device supports a maximum I/O bandwidth of 6,400 Gbps when the average packet size +# is greater than 250 bytes. +pbmp_oversubscribe=0x00000000000000000000000000000000003fffc0000ffff00003fffc0001fffe + + + +# core-0~7 +xgxs_rx_lane_map_ce0=0x0213 +xgxs_rx_lane_map_ce1=0x3102 +xgxs_rx_lane_map_ce2=0x1032 +xgxs_rx_lane_map_ce3=0x2103 +xgxs_rx_lane_map_ce4=0x0213 +xgxs_rx_lane_map_ce5=0x2103 +xgxs_rx_lane_map_ce6=0x1230 +xgxs_rx_lane_map_ce7=0x3120 + +# core-8~15 +xgxs_rx_lane_map_ce8=0x0123 +xgxs_rx_lane_map_ce9=0x3102 +xgxs_rx_lane_map_ce10=0x1230 +xgxs_rx_lane_map_ce11=0x0123 +xgxs_rx_lane_map_ce12=0x0123 +xgxs_rx_lane_map_ce13=0X1230 +xgxs_rx_lane_map_ce14=0x1230 +xgxs_rx_lane_map_ce15=0x0123 + +# core-16~23 +xgxs_rx_lane_map_ce16=0x0123 +xgxs_rx_lane_map_ce17=0x1230 +xgxs_rx_lane_map_ce18=0x1230 +xgxs_rx_lane_map_ce19=0x0123 +xgxs_rx_lane_map_ce20=0x0123 +xgxs_rx_lane_map_ce21=0x1230 +xgxs_rx_lane_map_ce22=0x1230 +xgxs_rx_lane_map_ce23=0x0123 + +# core-24~31 +xgxs_rx_lane_map_ce24=0x0123 +xgxs_rx_lane_map_ce25=0x0231 +xgxs_rx_lane_map_ce26=0x2130 +xgxs_rx_lane_map_ce27=0x2103 +xgxs_rx_lane_map_ce28=0x3012 +xgxs_rx_lane_map_ce29=0x3102 +xgxs_rx_lane_map_ce30=0x1032 +xgxs_rx_lane_map_ce31=0x2103 + +# core-32~39 +xgxs_rx_lane_map_ce32=0x3102 +xgxs_rx_lane_map_ce33=0x3102 +xgxs_rx_lane_map_ce34=0x0132 +xgxs_rx_lane_map_ce35=0x3021 +xgxs_rx_lane_map_ce36=0x0213 +xgxs_rx_lane_map_ce37=0x3012 +xgxs_rx_lane_map_ce38=0x2130 +xgxs_rx_lane_map_ce39=0x0123 + +# core-40~47 +xgxs_rx_lane_map_ce40=0x0312 +xgxs_rx_lane_map_ce41=0x0132 +xgxs_rx_lane_map_ce42=0x1230 +xgxs_rx_lane_map_ce43=0x0123 +xgxs_rx_lane_map_ce44=0x0312 +xgxs_rx_lane_map_ce45=0x0132 +xgxs_rx_lane_map_ce46=0x1230 +xgxs_rx_lane_map_ce47=0x0123 + +# core-48~55 +xgxs_rx_lane_map_ce48=0x0123 +xgxs_rx_lane_map_ce49=0x0132 +xgxs_rx_lane_map_ce50=0x1230 +xgxs_rx_lane_map_ce51=0x0123 +xgxs_rx_lane_map_ce52=0x0312 +xgxs_rx_lane_map_ce53=0x0132 +xgxs_rx_lane_map_ce54=0x1230 +xgxs_rx_lane_map_ce55=0x0123 + +# core-56~63 +xgxs_rx_lane_map_ce56=0x0123 +xgxs_rx_lane_map_ce57=0x0312 +xgxs_rx_lane_map_ce58=0x1032 +xgxs_rx_lane_map_ce59=0x2103 +xgxs_rx_lane_map_ce60=0x2103 +xgxs_rx_lane_map_ce61=0x3120 +xgxs_rx_lane_map_ce62=0x1032 +xgxs_rx_lane_map_ce63=0x0213 + +# Remap XGXS tx lanes to desired mapping by hardware provide. +#core-0~7 +xgxs_tx_lane_map_ce0=0x2301 +xgxs_tx_lane_map_ce1=0x2301 +xgxs_tx_lane_map_ce2=0x1302 +xgxs_tx_lane_map_ce3=0x3210 +xgxs_tx_lane_map_ce4=0x2301 +xgxs_tx_lane_map_ce5=0x2301 +xgxs_tx_lane_map_ce6=0x0213 +xgxs_tx_lane_map_ce7=0x3210 + +#core-8~15 +xgxs_tx_lane_map_ce8=0x1230 +xgxs_tx_lane_map_ce9=0x2301 +xgxs_tx_lane_map_ce10=0x0231 +xgxs_tx_lane_map_ce11=0x1230 +xgxs_tx_lane_map_ce12=0x3102 +xgxs_tx_lane_map_ce13=0x2301 +xgxs_tx_lane_map_ce14=0x0231 +xgxs_tx_lane_map_ce15=0x1230 + +#core-16~23 +xgxs_tx_lane_map_ce16=0x3102 +xgxs_tx_lane_map_ce17=0x2301 +xgxs_tx_lane_map_ce18=0x0231 +xgxs_tx_lane_map_ce19=0x1230 +xgxs_tx_lane_map_ce20=0x3102 +xgxs_tx_lane_map_ce21=0x2301 +xgxs_tx_lane_map_ce22=0x0231 +xgxs_tx_lane_map_ce23=0x1230 + +#core-24~31 +xgxs_tx_lane_map_ce24=0x3102 +xgxs_tx_lane_map_ce25=0x2301 +xgxs_tx_lane_map_ce26=0x0321 +xgxs_tx_lane_map_ce27=0x3210 +xgxs_tx_lane_map_ce28=0x1302 +xgxs_tx_lane_map_ce29=0x2031 +xgxs_tx_lane_map_ce30=0x3120 +xgxs_tx_lane_map_ce31=0x3210 + +#core-32~39 +xgxs_tx_lane_map_ce32=0x2310 +xgxs_tx_lane_map_ce33=0x2301 +xgxs_tx_lane_map_ce34=0x1203 +xgxs_tx_lane_map_ce35=0x1032 +xgxs_tx_lane_map_ce36=0x2130 +xgxs_tx_lane_map_ce37=0x2301 +xgxs_tx_lane_map_ce38=0x1302 +xgxs_tx_lane_map_ce39=0x3210 + +#core-40~47 +xgxs_tx_lane_map_ce40=0x3201 +xgxs_tx_lane_map_ce41=0x0231 +xgxs_tx_lane_map_ce42=0x1203 +xgxs_tx_lane_map_ce43=0x1230 +xgxs_tx_lane_map_ce44=0x3201 +xgxs_tx_lane_map_ce45=0x0231 +xgxs_tx_lane_map_ce46=0x1203 +xgxs_tx_lane_map_ce47=0x3210 + +#core-48~55 +xgxs_tx_lane_map_ce48=0x3201 +xgxs_tx_lane_map_ce49=0x0231 +xgxs_tx_lane_map_ce50=0x1203 +xgxs_tx_lane_map_ce51=0x3210 +xgxs_tx_lane_map_ce52=0x3201 +xgxs_tx_lane_map_ce53=0x0231 +xgxs_tx_lane_map_ce54=0x1203 +xgxs_tx_lane_map_ce55=0x3210 + +#core-56~63 +xgxs_tx_lane_map_ce56=0x1203 +xgxs_tx_lane_map_ce57=0x2301 +xgxs_tx_lane_map_ce58=0x0213 +xgxs_tx_lane_map_ce59=0x3210 +xgxs_tx_lane_map_ce60=0x0213 +xgxs_tx_lane_map_ce61=0x3021 +xgxs_tx_lane_map_ce62=0x3210 +xgxs_tx_lane_map_ce63=0x3210 + +serdes_preemphasis_lane0_ce0=0x0c5800 +serdes_preemphasis_lane1_ce0=0x0c5800 +serdes_preemphasis_lane2_ce0=0x0c5800 +serdes_preemphasis_lane3_ce0=0x0c5800 +serdes_preemphasis_lane0_ce1=0x0c5800 +serdes_preemphasis_lane1_ce1=0x0c5800 +serdes_preemphasis_lane2_ce1=0x0c5800 +serdes_preemphasis_lane3_ce1=0x0c5800 +serdes_preemphasis_lane0_ce2=0x0c5800 +serdes_preemphasis_lane1_ce2=0x0c5800 +serdes_preemphasis_lane2_ce2=0x0c5800 +serdes_preemphasis_lane3_ce2=0x0c5800 +serdes_preemphasis_lane0_ce3=0x0c5800 +serdes_preemphasis_lane1_ce3=0x0c5800 +serdes_preemphasis_lane2_ce3=0x0c5800 +serdes_preemphasis_lane3_ce3=0x0c5800 +serdes_preemphasis_lane0_ce4=0x0c5800 +serdes_preemphasis_lane1_ce4=0x0c5800 +serdes_preemphasis_lane2_ce4=0x0c5800 +serdes_preemphasis_lane3_ce4=0x0c5800 +serdes_preemphasis_lane0_ce5=0x0c5800 +serdes_preemphasis_lane1_ce5=0x0c5800 +serdes_preemphasis_lane2_ce5=0x0c5800 +serdes_preemphasis_lane3_ce5=0x0c5800 +serdes_preemphasis_lane0_ce6=0x0c5800 +serdes_preemphasis_lane1_ce6=0x0c5800 +serdes_preemphasis_lane2_ce6=0x0c5800 +serdes_preemphasis_lane3_ce6=0x0c5800 +serdes_preemphasis_lane0_ce7=0x0c5800 +serdes_preemphasis_lane1_ce7=0x0c5800 +serdes_preemphasis_lane2_ce7=0x0c5800 +serdes_preemphasis_lane3_ce7=0x0c5800 +serdes_preemphasis_lane0_ce8=0x0c5800 +serdes_preemphasis_lane1_ce8=0x0c5800 +serdes_preemphasis_lane2_ce8=0x0c5800 +serdes_preemphasis_lane3_ce8=0x0c5800 +serdes_preemphasis_lane0_ce9=0x0c5800 +serdes_preemphasis_lane1_ce9=0x0c5800 +serdes_preemphasis_lane2_ce9=0x0c5800 +serdes_preemphasis_lane3_ce9=0x0c5800 +serdes_preemphasis_lane0_ce10=0x0c5800 +serdes_preemphasis_lane1_ce10=0x0c5800 +serdes_preemphasis_lane2_ce10=0x0c5800 +serdes_preemphasis_lane3_ce10=0x0c5800 +serdes_preemphasis_lane0_ce11=0x0c5800 +serdes_preemphasis_lane1_ce11=0x0c5800 +serdes_preemphasis_lane2_ce11=0x0c5800 +serdes_preemphasis_lane3_ce11=0x0c5800 +serdes_preemphasis_lane0_ce12=0x0c5800 +serdes_preemphasis_lane1_ce12=0x0c5800 +serdes_preemphasis_lane2_ce12=0x0c5800 +serdes_preemphasis_lane3_ce12=0x0c5800 +serdes_preemphasis_lane0_ce13=0x0c5800 +serdes_preemphasis_lane1_ce13=0x0c5800 +serdes_preemphasis_lane2_ce13=0x0c5800 +serdes_preemphasis_lane3_ce13=0x0c5800 +serdes_preemphasis_lane0_ce14=0x0c5800 +serdes_preemphasis_lane1_ce14=0x0c5800 +serdes_preemphasis_lane2_ce14=0x0c5800 +serdes_preemphasis_lane3_ce14=0x0c5800 +serdes_preemphasis_lane0_ce15=0x0c5800 +serdes_preemphasis_lane1_ce15=0x0c5800 +serdes_preemphasis_lane2_ce15=0x0c5800 +serdes_preemphasis_lane3_ce15=0x0c5800 +serdes_preemphasis_lane0_ce16=0x085408 +serdes_preemphasis_lane1_ce16=0x085408 +serdes_preemphasis_lane2_ce16=0x085408 +serdes_preemphasis_lane3_ce16=0x085408 +serdes_preemphasis_lane0_ce17=0x085408 +serdes_preemphasis_lane1_ce17=0x085408 +serdes_preemphasis_lane2_ce17=0x085408 +serdes_preemphasis_lane3_ce17=0x085408 +serdes_preemphasis_lane0_ce18=0x085408 +serdes_preemphasis_lane1_ce18=0x085408 +serdes_preemphasis_lane2_ce18=0x085408 +serdes_preemphasis_lane3_ce18=0x085408 +serdes_preemphasis_lane0_ce19=0x085408 +serdes_preemphasis_lane1_ce19=0x085408 +serdes_preemphasis_lane2_ce19=0x085408 +serdes_preemphasis_lane3_ce19=0x085408 +serdes_preemphasis_lane0_ce20=0x085408 +serdes_preemphasis_lane1_ce20=0x085408 +serdes_preemphasis_lane2_ce20=0x085408 +serdes_preemphasis_lane3_ce20=0x085408 +serdes_preemphasis_lane0_ce21=0x085408 +serdes_preemphasis_lane1_ce21=0x085408 +serdes_preemphasis_lane2_ce21=0x085408 +serdes_preemphasis_lane3_ce21=0x085408 +serdes_preemphasis_lane0_ce22=0x085408 +serdes_preemphasis_lane1_ce22=0x085408 +serdes_preemphasis_lane2_ce22=0x085408 +serdes_preemphasis_lane3_ce22=0x085408 +serdes_preemphasis_lane0_ce23=0x085408 +serdes_preemphasis_lane1_ce23=0x085408 +serdes_preemphasis_lane2_ce23=0x085408 +serdes_preemphasis_lane3_ce23=0x085408 +serdes_preemphasis_lane0_ce24=0x085408 +serdes_preemphasis_lane1_ce24=0x085408 +serdes_preemphasis_lane2_ce24=0x085408 +serdes_preemphasis_lane3_ce24=0x085408 +serdes_preemphasis_lane0_ce25=0x085408 +serdes_preemphasis_lane1_ce25=0x085408 +serdes_preemphasis_lane2_ce25=0x085408 +serdes_preemphasis_lane3_ce25=0x085408 +serdes_preemphasis_lane0_ce26=0x0a500a +serdes_preemphasis_lane1_ce26=0x0a500a +serdes_preemphasis_lane2_ce26=0x0a500a +serdes_preemphasis_lane3_ce26=0x0a500a +serdes_preemphasis_lane0_ce27=0x0a500a +serdes_preemphasis_lane1_ce27=0x0a500a +serdes_preemphasis_lane2_ce27=0x0a500a +serdes_preemphasis_lane3_ce27=0x0a500a +serdes_preemphasis_lane0_ce28=0x0a500a +serdes_preemphasis_lane1_ce28=0x0a500a +serdes_preemphasis_lane2_ce28=0x0a500a +serdes_preemphasis_lane3_ce28=0x0a500a +serdes_preemphasis_lane0_ce29=0x0a500a +serdes_preemphasis_lane1_ce29=0x0a500a +serdes_preemphasis_lane2_ce29=0x0a500a +serdes_preemphasis_lane3_ce29=0x0a500a +serdes_preemphasis_lane0_ce30=0x0a500a +serdes_preemphasis_lane1_ce30=0x0a500a +serdes_preemphasis_lane2_ce30=0x0a500a +serdes_preemphasis_lane3_ce30=0x0a500a +serdes_preemphasis_lane0_ce31=0x0a500a +serdes_preemphasis_lane1_ce31=0x0a500a +serdes_preemphasis_lane2_ce31=0x0a500a +serdes_preemphasis_lane3_ce31=0x0a500a +serdes_preemphasis_lane0_ce32=0x0a500a +serdes_preemphasis_lane1_ce32=0x0a500a +serdes_preemphasis_lane2_ce32=0x0a500a +serdes_preemphasis_lane3_ce32=0x0a500a +serdes_preemphasis_lane0_ce33=0x0a500a +serdes_preemphasis_lane1_ce33=0x0a500a +serdes_preemphasis_lane2_ce33=0x0a500a +serdes_preemphasis_lane3_ce33=0x0a500a +serdes_preemphasis_lane0_ce34=0x0a500a +serdes_preemphasis_lane1_ce34=0x0a500a +serdes_preemphasis_lane2_ce34=0x0a500a +serdes_preemphasis_lane3_ce34=0x0a500a +serdes_preemphasis_lane0_ce35=0x0a500a +serdes_preemphasis_lane1_ce35=0x0a500a +serdes_preemphasis_lane2_ce35=0x0a500a +serdes_preemphasis_lane3_ce35=0x0a500a +serdes_preemphasis_lane0_ce36=0x0a500a +serdes_preemphasis_lane1_ce36=0x0a500a +serdes_preemphasis_lane2_ce36=0x0a500a +serdes_preemphasis_lane3_ce36=0x0a500a +serdes_preemphasis_lane0_ce37=0x0a500a +serdes_preemphasis_lane1_ce37=0x0a500a +serdes_preemphasis_lane2_ce37=0x0a500a +serdes_preemphasis_lane3_ce37=0x0a500a +serdes_preemphasis_lane0_ce38=0x0a500a +serdes_preemphasis_lane1_ce38=0x0a500a +serdes_preemphasis_lane2_ce38=0x0a500a +serdes_preemphasis_lane3_ce38=0x0a500a +serdes_preemphasis_lane0_ce39=0x0a500a +serdes_preemphasis_lane1_ce39=0x0a500a +serdes_preemphasis_lane2_ce39=0x0a500a +serdes_preemphasis_lane3_ce39=0x0a500a +serdes_preemphasis_lane0_ce40=0x085408 +serdes_preemphasis_lane1_ce40=0x085408 +serdes_preemphasis_lane2_ce40=0x085408 +serdes_preemphasis_lane3_ce40=0x085408 +serdes_preemphasis_lane0_ce41=0x085408 +serdes_preemphasis_lane1_ce41=0x085408 +serdes_preemphasis_lane2_ce41=0x085408 +serdes_preemphasis_lane3_ce41=0x085408 +serdes_preemphasis_lane0_ce42=0x085408 +serdes_preemphasis_lane1_ce42=0x085408 +serdes_preemphasis_lane2_ce42=0x085408 +serdes_preemphasis_lane3_ce42=0x085408 +serdes_preemphasis_lane0_ce43=0x085408 +serdes_preemphasis_lane1_ce43=0x085408 +serdes_preemphasis_lane2_ce43=0x085408 +serdes_preemphasis_lane3_ce43=0x085408 +serdes_preemphasis_lane0_ce44=0x085408 +serdes_preemphasis_lane1_ce44=0x085408 +serdes_preemphasis_lane2_ce44=0x085408 +serdes_preemphasis_lane3_ce44=0x085408 +serdes_preemphasis_lane0_ce45=0x085408 +serdes_preemphasis_lane1_ce45=0x085408 +serdes_preemphasis_lane2_ce45=0x085408 +serdes_preemphasis_lane3_ce45=0x085408 +serdes_preemphasis_lane0_ce46=0x085408 +serdes_preemphasis_lane1_ce46=0x085408 +serdes_preemphasis_lane2_ce46=0x085408 +serdes_preemphasis_lane3_ce46=0x085408 +serdes_preemphasis_lane0_ce47=0x085408 +serdes_preemphasis_lane1_ce47=0x085408 +serdes_preemphasis_lane2_ce47=0x085408 +serdes_preemphasis_lane3_ce47=0x085408 +serdes_preemphasis_lane0_ce48=0x085408 +serdes_preemphasis_lane1_ce48=0x085408 +serdes_preemphasis_lane2_ce48=0x085408 +serdes_preemphasis_lane3_ce48=0x085408 +serdes_preemphasis_lane0_ce49=0x085408 +serdes_preemphasis_lane1_ce49=0x085408 +serdes_preemphasis_lane2_ce49=0x085408 +serdes_preemphasis_lane3_ce49=0x085408 +serdes_preemphasis_lane0_ce50=0x085408 +serdes_preemphasis_lane1_ce50=0x085408 +serdes_preemphasis_lane2_ce50=0x085408 +serdes_preemphasis_lane3_ce50=0x085408 +serdes_preemphasis_lane0_ce51=0x085408 +serdes_preemphasis_lane1_ce51=0x085408 +serdes_preemphasis_lane2_ce51=0x085408 +serdes_preemphasis_lane3_ce51=0x085408 +serdes_preemphasis_lane0_ce52=0x085408 +serdes_preemphasis_lane1_ce52=0x085408 +serdes_preemphasis_lane2_ce52=0x085408 +serdes_preemphasis_lane3_ce52=0x085408 +serdes_preemphasis_lane0_ce53=0x085408 +serdes_preemphasis_lane1_ce53=0x085408 +serdes_preemphasis_lane2_ce53=0x085408 +serdes_preemphasis_lane3_ce53=0x085408 +serdes_preemphasis_lane0_ce54=0x085408 +serdes_preemphasis_lane1_ce54=0x085408 +serdes_preemphasis_lane2_ce54=0x085408 +serdes_preemphasis_lane3_ce54=0x085408 +serdes_preemphasis_lane0_ce55=0x085408 +serdes_preemphasis_lane1_ce55=0x085408 +serdes_preemphasis_lane2_ce55=0x085408 +serdes_preemphasis_lane3_ce55=0x085408 +serdes_preemphasis_lane0_ce56=0x0c5800 +serdes_preemphasis_lane1_ce56=0x0c5800 +serdes_preemphasis_lane2_ce56=0x0c5800 +serdes_preemphasis_lane3_ce56=0x0c5800 +serdes_preemphasis_lane0_ce57=0x0c5800 +serdes_preemphasis_lane1_ce57=0x0c5800 +serdes_preemphasis_lane2_ce57=0x0c5800 +serdes_preemphasis_lane3_ce57=0x0c5800 +serdes_preemphasis_lane0_ce58=0x0c5800 +serdes_preemphasis_lane1_ce58=0x0c5800 +serdes_preemphasis_lane2_ce58=0x0c5800 +serdes_preemphasis_lane3_ce58=0x0c5800 +serdes_preemphasis_lane0_ce59=0x0c5800 +serdes_preemphasis_lane1_ce59=0x0c5800 +serdes_preemphasis_lane2_ce59=0x0c5800 +serdes_preemphasis_lane3_ce59=0x0c5800 +serdes_preemphasis_lane0_ce60=0x0c5800 +serdes_preemphasis_lane1_ce60=0x0c5800 +serdes_preemphasis_lane2_ce60=0x0c5800 +serdes_preemphasis_lane3_ce60=0x0c5800 +serdes_preemphasis_lane0_ce61=0x0c5800 +serdes_preemphasis_lane1_ce61=0x0c5800 +serdes_preemphasis_lane2_ce61=0x0c5800 +serdes_preemphasis_lane3_ce61=0x0c5800 +serdes_preemphasis_lane0_ce62=0x0c5800 +serdes_preemphasis_lane1_ce62=0x0c5800 +serdes_preemphasis_lane2_ce62=0x0c5800 +serdes_preemphasis_lane3_ce62=0x0c5800 +serdes_preemphasis_lane0_ce63=0x0c5800 +serdes_preemphasis_lane1_ce63=0x0c5800 +serdes_preemphasis_lane2_ce63=0x0c5800 +serdes_preemphasis_lane3_ce63=0x0c5800 + +# # The TX and RX polarity flip variable. +# # It is affected by lane swapping, we used to debug for TE QSFP28 transceiver. +# # + +# # Used to select the reference clock for Timestamping and BroadSync/10Mhz PLL value. +# # 25MHz LVPECL to BS_PLL0_REFCLK, BS_PLL1_REFCLK, and TS_PLL_REFCLK +# ptp_ts_pll_fref=25000000 +# ptp_bs_fref=25000000 diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/default_sku b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/default_sku new file mode 100755 index 00000000000..e262bc70c38 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/default_sku @@ -0,0 +1 @@ +Alphanetworks-SNH60B0-640F t1 diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/fancontrol b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/fancontrol new file mode 100644 index 00000000000..9d443b3d3e6 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/fancontrol @@ -0,0 +1,9 @@ +INTERVAL=10 +FCTEMPS=/sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/3-004d/hwmon/hwmon2/temp1_input +FCFANS=/sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan1_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan2_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan3_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan4_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan11_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan12_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan13_input /sys/bus/i2c/devices/0-005e/fan_pwm=/sys/bus/i2c/devices/0-005e/fan14_input +MINTEMP=/sys/bus/i2c/devices/0-005e/fan_pwm=50 +MAXTEMP=/sys/bus/i2c/devices/0-005e/fan_pwm=70 +MINSTART=/sys/bus/i2c/devices/0-005e/fan_pwm=100 +MINSTOP=/sys/bus/i2c/devices/0-005e/fan_pwm=100 +MINPWM=/sys/bus/i2c/devices/0-005e/fan_pwm=100 +MAXPWM=/sys/bus/i2c/devices/0-005e/fan_pwm=200 \ No newline at end of file diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/installer.conf b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/led_proc_init.soc b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/led_proc_init.soc new file mode 100644 index 00000000000..3fa944a9fab --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/led_proc_init.soc @@ -0,0 +1,111 @@ +# LED microprocessor initialization for alphanetworks snh60b0-640f + +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=0x3f REMAP_PORT_1=0x3e REMAP_PORT_2=0x3d REMAP_PORT_3=0x3c +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=0x3b REMAP_PORT_5=0x3a REMAP_PORT_6=0x39 REMAP_PORT_7=0x38 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=0x37 REMAP_PORT_9=0x36 REMAP_PORT_10=0x35 REMAP_PORT_11=0x34 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=0x33 REMAP_PORT_13=0x32 REMAP_PORT_14=0x31 REMAP_PORT_15=0x30 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=0x2f REMAP_PORT_17=0x2e REMAP_PORT_18=0x2d REMAP_PORT_19=0x2c +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=0x2b REMAP_PORT_21=0x2a REMAP_PORT_22=0x29 REMAP_PORT_23=0x28 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=0x27 REMAP_PORT_25=0x26 REMAP_PORT_26=0x25 REMAP_PORT_27=0x24 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=0x23 REMAP_PORT_29=0x22 REMAP_PORT_30=0x21 REMAP_PORT_31=0x20 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=0x1f REMAP_PORT_33=0x1e REMAP_PORT_34=0x1d REMAP_PORT_35=0x1c +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=0x1b REMAP_PORT_37=0x1a REMAP_PORT_38=0x19 REMAP_PORT_39=0x18 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=0x17 REMAP_PORT_41=0x16 REMAP_PORT_42=0x15 REMAP_PORT_43=0x14 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=0x13 REMAP_PORT_45=0x12 REMAP_PORT_46=0x11 REMAP_PORT_47=0x10 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=0xf REMAP_PORT_49=0xe REMAP_PORT_50=0xd REMAP_PORT_51=0xc +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=0xb REMAP_PORT_53=0xa REMAP_PORT_54=9 REMAP_PORT_55=8 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 + +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=3 REMAP_PORT_1=2 REMAP_PORT_2=1 REMAP_PORT_3=0 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=7 REMAP_PORT_5=6 REMAP_PORT_6=5 REMAP_PORT_7=4 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=0xb REMAP_PORT_9=0xa REMAP_PORT_10=9 REMAP_PORT_11=8 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=0xf REMAP_PORT_13=0xe REMAP_PORT_14=0xd REMAP_PORT_15=0xc +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=0x13 REMAP_PORT_17=0x12 REMAP_PORT_18=0x11 REMAP_PORT_19=0x10 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=0x17 REMAP_PORT_21=0x16 REMAP_PORT_22=0x15 REMAP_PORT_23=0x14 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=0x1b REMAP_PORT_25=0x1a REMAP_PORT_26=0x19 REMAP_PORT_27=0x18 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=0x1f REMAP_PORT_29=0x1e REMAP_PORT_30=0x1d REMAP_PORT_31=0x1c +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=0x23 REMAP_PORT_33=0x22 REMAP_PORT_34=0x21 REMAP_PORT_35=0x20 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=0x27 REMAP_PORT_37=0x26 REMAP_PORT_38=0x25 REMAP_PORT_39=0x24 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=0x2b REMAP_PORT_41=0x2a REMAP_PORT_42=0x29 REMAP_PORT_43=0x28 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=0x2f REMAP_PORT_45=0x2e REMAP_PORT_46=0x2d REMAP_PORT_47=0x2c +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=0x33 REMAP_PORT_49=0x32 REMAP_PORT_50=0x31 REMAP_PORT_51=0x30 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=0x37 REMAP_PORT_53=0x36 REMAP_PORT_54=0x35 REMAP_PORT_55=0x34 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=0x3b REMAP_PORT_57=0x3a REMAP_PORT_58=0x39 REMAP_PORT_59=0x38 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=0x3f REMAP_PORT_61=0x3e REMAP_PORT_62=0x3d REMAP_PORT_63=0x3c + +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=0x3f REMAP_PORT_1=0x3e REMAP_PORT_2=0x3d REMAP_PORT_3=0x3c +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=0x3b REMAP_PORT_5=0x3a REMAP_PORT_6=0x39 REMAP_PORT_7=0x38 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=0x37 REMAP_PORT_9=0x36 REMAP_PORT_10=0x35 REMAP_PORT_11=0x34 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=0x33 REMAP_PORT_13=0x32 REMAP_PORT_14=0x31 REMAP_PORT_15=0x30 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=0x2f REMAP_PORT_17=0x2e REMAP_PORT_18=0x2d REMAP_PORT_19=0x2c +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=0x2b REMAP_PORT_21=0x2a REMAP_PORT_22=0x29 REMAP_PORT_23=0x28 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=0x27 REMAP_PORT_25=0x26 REMAP_PORT_26=0x25 REMAP_PORT_27=0x24 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=0x23 REMAP_PORT_29=0x22 REMAP_PORT_30=0x21 REMAP_PORT_31=0x20 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=0x1f REMAP_PORT_33=0x1e REMAP_PORT_34=0x1d REMAP_PORT_35=0x1c +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=0x1b REMAP_PORT_37=0x1a REMAP_PORT_38=0x19 REMAP_PORT_39=0x18 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=0x17 REMAP_PORT_41=0x16 REMAP_PORT_42=0x15 REMAP_PORT_43=0x14 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=0x13 REMAP_PORT_45=0x12 REMAP_PORT_46=0x11 REMAP_PORT_47=0x10 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=0xf REMAP_PORT_49=0xe REMAP_PORT_50=0xd REMAP_PORT_51=0xc +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=0xb REMAP_PORT_53=0xa REMAP_PORT_54=9 REMAP_PORT_55=8 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 + +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=3 REMAP_PORT_1=2 REMAP_PORT_2=1 REMAP_PORT_3=0 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=7 REMAP_PORT_5=6 REMAP_PORT_6=5 REMAP_PORT_7=4 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=0xb REMAP_PORT_9=0xa REMAP_PORT_10=9 REMAP_PORT_11=8 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=0xf REMAP_PORT_13=0xe REMAP_PORT_14=0xd REMAP_PORT_15=0xc +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=0x13 REMAP_PORT_17=0x12 REMAP_PORT_18=0x11 REMAP_PORT_19=0x10 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=0x17 REMAP_PORT_21=0x16 REMAP_PORT_22=0x15 REMAP_PORT_23=0x14 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=0x1b REMAP_PORT_25=0x1a REMAP_PORT_26=0x19 REMAP_PORT_27=0x18 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=0x1f REMAP_PORT_29=0x1e REMAP_PORT_30=0x1d REMAP_PORT_31=0x1c +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=0x23 REMAP_PORT_33=0x22 REMAP_PORT_34=0x21 REMAP_PORT_35=0x20 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=0x27 REMAP_PORT_37=0x26 REMAP_PORT_38=0x25 REMAP_PORT_39=0x24 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=0x2b REMAP_PORT_41=0x2a REMAP_PORT_42=0x29 REMAP_PORT_43=0x28 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=0x2f REMAP_PORT_45=0x2e REMAP_PORT_46=0x2d REMAP_PORT_47=0x2c +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=0x33 REMAP_PORT_49=0x32 REMAP_PORT_50=0x31 REMAP_PORT_51=0x30 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=0x37 REMAP_PORT_53=0x36 REMAP_PORT_54=0x35 REMAP_PORT_55=0x34 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=0x3b REMAP_PORT_57=0x3a REMAP_PORT_58=0x39 REMAP_PORT_59=0x38 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=0x3f REMAP_PORT_61=0x3e REMAP_PORT_62=0x3d REMAP_PORT_63=0x3c + +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=0x3f REMAP_PORT_1=1 REMAP_PORT_2=0x3f REMAP_PORT_3=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=0x3f REMAP_PORT_5=0x3f REMAP_PORT_6=0x3f REMAP_PORT_7=0x3f +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=0x3f REMAP_PORT_9=0x3f REMAP_PORT_10=0x3f REMAP_PORT_11=0x3f +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=0x3f REMAP_PORT_13=0x3f REMAP_PORT_14=0x3f REMAP_PORT_15=0x3f +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=0x3f REMAP_PORT_17=0x3f REMAP_PORT_18=0x3f REMAP_PORT_19=0x3f +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=0x3f REMAP_PORT_21=0x3f REMAP_PORT_22=0x3f REMAP_PORT_23=0x3f +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=0x3f REMAP_PORT_25=0x3f REMAP_PORT_26=0x3f REMAP_PORT_27=0x3f +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=0x3f REMAP_PORT_29=0x3f REMAP_PORT_30=0x3f REMAP_PORT_31=0x3f +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=0x3f REMAP_PORT_33=0x3f REMAP_PORT_34=0x3f REMAP_PORT_35=0x3f +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=0x3f REMAP_PORT_37=0x3f REMAP_PORT_38=0x3f REMAP_PORT_39=0x3f +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=0x3f REMAP_PORT_41=0x3f REMAP_PORT_42=0x3f REMAP_PORT_43=0x3f +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=0x3f REMAP_PORT_45=0x3f REMAP_PORT_46=0x3f REMAP_PORT_47=0x3f +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=0x3f REMAP_PORT_49=0x3f REMAP_PORT_50=0x3f REMAP_PORT_51=0x3f +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=0x3f REMAP_PORT_53=0x3f REMAP_PORT_54=0x3f REMAP_PORT_55=0x3f +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=0x3f REMAP_PORT_57=0x3f REMAP_PORT_58=0x3f REMAP_PORT_59=0x3f +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=0x3f REMAP_PORT_61=0x3f REMAP_PORT_62=0x3f REMAP_PORT_63=0x3f + +led 0 stop +led 0 prog 86 FF 06 FF C2 7F 60 FF 02 41 60 FE 67 1A 06 FE E2 04 60 FE D2 01 74 0C 77 51 02 9F F6 FE E2 04 04 D2 01 70 27 74 48 06 FE E2 04 90 28 32 00 32 01 B7 97 71 37 75 3F 06 FF C2 10 70 48 74 3F 67 57 67 53 67 57 67 57 57 67 57 67 57 67 57 67 57 57 3A 40 32 0E 87 57 32 0F 87 57 +led 0 auto on +led 0 start + +led 1 stop +led 1 prog 86 FF 06 FF C2 7F 60 FF 02 41 60 FE 67 1A 06 FE E2 04 60 FE D2 01 74 0C 77 51 02 9F F6 FE E2 04 04 D2 01 70 27 74 48 06 FE E2 04 90 28 32 00 32 01 B7 97 71 37 75 3F 06 FF C2 10 70 48 74 3F 67 57 67 53 67 57 67 57 57 67 57 67 57 67 57 67 57 57 3A 40 32 0E 87 57 32 0F 87 57 +led 1 auto on +led 1 start + +led 2 stop +led 2 prog 86 FF 06 FF C2 7F 60 FF 02 41 60 FE 67 1A 06 FE E2 04 60 FE D2 01 74 0C 77 51 02 9F F6 FE E2 04 04 D2 01 70 27 74 48 06 FE E2 04 90 28 32 00 32 01 B7 97 71 37 75 3F 06 FF C2 10 70 48 74 3F 67 57 67 53 67 57 67 57 57 67 57 67 57 67 57 67 57 57 3A 40 32 0E 87 57 32 0F 87 57 +led 2 auto on +led 2 start + +led 3 stop +led 3 prog 86 FF 06 FF C2 7F 60 FF 02 41 60 FE 67 1A 06 FE E2 04 60 FE D2 01 74 0C 77 51 02 9F F6 FE E2 04 04 D2 01 70 27 74 48 06 FE E2 04 90 28 32 00 32 01 B7 97 71 37 75 3F 06 FF C2 10 70 48 74 3F 67 57 67 53 67 57 67 57 57 67 57 67 57 67 57 67 57 57 3A 40 32 0E 87 57 32 0F 87 57 +led 3 auto on +led 3 start + +led 4 stop +led 4 prog 86 FF 06 FF C2 7F 60 FF 02 02 60 FE 67 1A 06 FE E2 01 60 FE D2 00 74 0C 77 6A 02 9F F6 FE 04 D2 01 70 25 74 51 06 FE 90 28 32 03 32 04 97 75 64 97 71 58 75 5E 06 FE 90 28 32 00 32 01 B7 97 71 43 75 4B 06 FF C2 10 70 4E 74 4B 67 6C 57 67 70 57 67 70 67 70 67 70 57 67 6C 67 70 77 35 67 70 67 6C 77 35 67 70 67 70 77 35 3A 06 32 0E 87 57 32 0F 87 57 +led 4 auto on +led 4 start diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/plugins/eeprom.py b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/plugins/eeprom.py new file mode 100644 index 00000000000..c0122e65844 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0056/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/plugins/led_control.py b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/plugins/led_control.py new file mode 100644 index 00000000000..457b1d750b2 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/plugins/led_control.py @@ -0,0 +1,217 @@ +#!/usr/bin/env python +# +# led_control.py +# +# Platform-specific LED control functionality for SONiC +# + +# try: +# from sonic_led.led_control_base import LedControlBase +# import swsssdk +# except ImportError, e: +# raise ImportError (str(e) + " - required module not found") + +import time + +class LedControlBase(object): +# __metaclass__ = abc.ABCMeta + +# @abc.abstractmethod + def port_link_state_change(self, port, state): + """ + Called when port link state changes. Update port link state LED here. + + :param port: A string, SONiC port name (e.g., "Ethernet0") + :param state: A string, the port link state (either "up" or "down") + """ + return + +### Goreme specified ### +read_fan_fault = 0 +is_fan_all_OK = 0 +read_power_status = 0 +is_power_all_OK = 0 +is_thermal_high = 0 +is_reset_button_push = 0 +########################## + +def sysled_task(): + while True: + system_led_check() + time.sleep(5) + +########## Goreme System LED checking +def system_led_check(): + global read_fan_fault, read_power_status, is_fan_all_OK, is_power_all_OK, is_thermal_high, is_reset_button_push + is_fan_all_OK = 1 + is_power_all_OK = 0 + is_thermal_high = 0 + is_reset_button_push = 0 + with open("/sys/bus/i2c/devices/0-005e/fan1_fault", "r") as f1: + read_fan_fault = f1.read() + if str(read_fan_fault) == str("1\n"): + is_fan_all_OK = 0 + with open("/sys/bus/i2c/devices/0-005e/fan2_fault", "r") as f1: + read_fan_fault = f1.read() + if str(read_fan_fault) == str("1\n"): + is_fan_all_OK = 0 + with open("/sys/bus/i2c/devices/0-005e/fan3_fault", "r") as f1: + read_fan_fault = f1.read() + if str(read_fan_fault) == str("1\n"): + is_fan_all_OK = 0 + with open("/sys/bus/i2c/devices/0-005e/fan4_fault", "r") as f1: + read_fan_fault = f1.read() + if str(read_fan_fault) == str("1\n"): + is_fan_all_OK = 0 + + with open("/sys/bus/i2c/devices/8-005f/fan1_led", "w") as f11: + if int(is_fan_all_OK) == 1: + f11.write("1") + else: + f11.write("4") + + + with open("/sys/bus/i2c/devices/0-005e/psu1_power_good", "r") as f1: + read_power_status = f1.read() + if str(read_power_status) != str("1\n"): + is_power_all_OK = -10 + with open("/sys/bus/i2c/devices/0-005e/psu1_present", "r") as f1: + read_power_status = f1.read() + if str(read_power_status) == str("1\n"): + is_power_all_OK = is_power_all_OK + 1 + with open("/sys/bus/i2c/devices/0-005e/psu2_power_good", "r") as f1: + read_power_status = f1.read() + if str(read_power_status) != str("1\n"): + is_power_all_OK = -10 + with open("/sys/bus/i2c/devices/0-005e/psu2_present", "r") as f1: + read_power_status = f1.read() + if str(read_power_status) == str("1\n"): + is_power_all_OK = is_power_all_OK + 1 + + with open("/sys/bus/i2c/devices/8-005f/sys_pwr", "w") as f11: + if int(is_power_all_OK) > 0: + f11.write("1") + else: + f11.write("4") + + + with open("/sys/bus/i2c/devices/8-005f/swi_ctrl", "r") as f5: + is_reset_button_push = f5.read() + if str(is_reset_button_push) == "1\n": + is_reset_button_push = 1 + else: + is_reset_button_push = 0 + + with open("/sys/bus/i2c/devices/3-004d/hwmon/hwmon2/temp1_input", "r") as f3: + is_thermal_high = f3.read() + if int(is_thermal_high) >= 70000: + is_thermal_high = 1 + else: + is_thermal_high = 0 + + with open("/sys/bus/i2c/devices/8-005f/sys_status", "w") as f2: + if is_reset_button_push == 1: + f2.write("3") + elif is_fan_all_OK == 0 or is_power_all_OK == 0 or is_thermal_high == 1: + f2.write("4") + else: + f2.write("1") + + return +########## + +class LedControl(LedControlBase): + """Platform specific LED control class""" + PORT_TABLE_PREFIX = "PORT_TABLE:" + + SONIC_PORT_NAME_PREFIX = "Ethernet" + + LED_SYSFS_PATH_BREAKOUT_CAPABLE = "/sys/class/leds/qsfp{0}_{1}/brightness" + LED_SYSFS_PATH_NO_BREAKOUT = "/sys/class/leds/qsfp{0}/brightness" + + QSFP_BREAKOUT_START_IDX = 1 + QSFP_BREAKOUT_END_IDX = 24 + QSFP_NO_BREAKOUT_START_IDX = 25 + QSFP_NO_BREAKOUT_END_IDX = 32 + + LED_COLOR_OFF = 0 + LED_COLOR_GREEN = 1 + LED_COLOR_YELLOW = 2 + + # Helper method to map SONiC port name to Arista QSFP index + def _port_name_to_qsfp_index(self, port_name): + # Strip "Ethernet" off port name + if not port_name.startswith(self.SONIC_PORT_NAME_PREFIX): + return -1 + + sonic_port_num = int(port_name[len(self.SONIC_PORT_NAME_PREFIX):]) + + swss = swsssdk.SonicV2Connector() + swss.connect(swss.APPL_DB) + + lanes = swss.get(swss.APPL_DB, self.PORT_TABLE_PREFIX + port_name, 'lanes') + + # SONiC port nums are 0-based and increment by 4 + # Arista QSFP indices are 1-based and increment by 1 + return (((sonic_port_num/4) + 1), sonic_port_num%4, len(lanes.split(','))) + + + + # Concrete implementation of port_link_state_change() method + def port_link_state_change_bk(self, port, state): + qsfp_index, lane_index, lanes = self._port_name_to_qsfp_index(port) + + # Ignore invalid QSFP indices + if qsfp_index <= 0 or lanes <= 0 or lanes > 4: + return + + # QSFP indices 0-24 are breakout-capable and have four LEDs, and each LED indicate one lane. + # whereas indices 25-32 are not breakout-capable, and only have one + if qsfp_index <= self.QSFP_BREAKOUT_END_IDX: + # assuming 40G, then we need to control four lanes + led_sysfs_paths = [ self.LED_SYSFS_PATH_BREAKOUT_CAPABLE.format(qsfp_index, i) for i in range(lane_index + 1, lane_index + 1 + lanes) ] + else: + led_sysfs_paths = [ self.LED_SYSFS_PATH_NO_BREAKOUT.format(qsfp_index) ] + + for led_sysfs_path in led_sysfs_paths: + led_file = open(led_sysfs_path, "w") + + if state == "up": + led_file.write("%d" % self.LED_COLOR_GREEN) + else: + led_file.write("%d" % self.LED_COLOR_OFF) + + led_file.close() + + # Constructor + def __init__(self): + # Initialize all front-panel status LEDs to green + with open("/sys/bus/i2c/devices/8-005f/sys_locator", "w") as f: + f.write("0") + with open("/sys/bus/i2c/devices/8-005f/sys_pwr", "w") as f: + f.write("1") + with open("/sys/bus/i2c/devices/8-005f/sys_status", "w") as f: + f.write("1") + + # Initialize all fan LEDs to green + with open("/sys/bus/i2c/devices/8-005f/fan1_led", "w") as f: + f.write("1") + with open("/sys/bus/i2c/devices/8-005f/fan2_led", "w") as f: + f.write("1") + with open("/sys/bus/i2c/devices/8-005f/fan3_led", "w") as f: + f.write("1") + with open("/sys/bus/i2c/devices/8-005f/fan4_led", "w") as f: + f.write("1") + sysled_task() + + # Initialize: Turn all front panel QSFP LEDs off + # # for qsfp_index in range(self.QSFP_BREAKOUT_START_IDX, self.QSFP_BREAKOUT_END_IDX + 1): + # # for lane in range(1, 5): + # # led_sysfs_path = self.LED_SYSFS_PATH_BREAKOUT_CAPABLE.format(qsfp_index, lane) + # # with open(led_sysfs_path, 'w') as led_file: + # # led_file.write("%d" % self.LED_COLOR_OFF) + + # # for qsfp_index in range(self.QSFP_NO_BREAKOUT_START_IDX, self.QSFP_NO_BREAKOUT_END_IDX + 1): + # # led_sysfs_path = self.LED_SYSFS_PATH_NO_BREAKOUT.format(qsfp_index) + # # with open(led_sysfs_path, 'w') as led_file: + # # led_file.write("%d" % self.LED_COLOR_OFF) diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/plugins/psuutil.py b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/plugins/psuutil.py new file mode 100644 index 00000000000..7a3b87f24d2 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/plugins/psuutil.py @@ -0,0 +1,66 @@ +#!/usr/bin/env python + +############################################################################# +# Alphanetworks +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = { + 1: "/psu1_present", + 2: "/psu2_present", + } + self.psu_oper_status = { + 1: "/psu1_power_good", + 2: "/psu2_power_good", + } + self.psu_mapping = "0-005e" + if not os.path.exists(self.psu_path+self.psu_mapping): + self.psu_mapping = "1-005e" + + def get_num_psus(self): + return len(self.psu_presence) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping+self.psu_oper_status[index] + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping + self.psu_presence[index] + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/plugins/sfputil.py b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/plugins/sfputil.py new file mode 100644 index 00000000000..cc3cd4e8611 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/plugins/sfputil.py @@ -0,0 +1,132 @@ +#!/usr/bin/env python + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class SfpUtil(SfpUtilBase): + """Platform specific SfpUtill class""" + + first_port = 0 + last_port = 65 + port_num = 63 + + port_to_eeprom = {} + port_to_i2cbus_mapping = { + 1 : 13, + 2 : 14, + 3 : 15, + 4 : 16, + 5 : 23, + } + + eeprom_path_1 = "/sys/bus/i2c/devices/{0}-0020/sfp{1}_eeprom" + eeprom_path = "/sys/bus/i2c/devices/{0}-005f/sfp{1}_eeprom" + port_reset_path_1 = "/sys/bus/i2c/devices/{0}-0020/sfp{1}_port_reset" + port_reset_path = "/sys/bus/i2c/devices/{0}-005f/sfp{1}_port_reset" + present_path_1 = "/sys/bus/i2c/devices/{0}-0020/sfp{1}_is_present" + present_path = "/sys/bus/i2c/devices/{0}-005f/sfp{1}_is_present" + + _qsfp_ports = range(first_port, port_num) + + @property + def port_start(self): + return self.first_port + + @property + def port_end(self): + return self.last_port + + @property + def qsfp_ports(self): + return range(self.first_port, self.port_num + 1) + + @property + def port_to_eeprom_mapping(self): + return self.port_to_eeprom + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError + + def __init__(self): + for x in range(self.first_port, self.last_port + 1): + cpld_index = (x / 16) + 1 + index = (x % 16) + 1 + if cpld_index == 5: + path = self.eeprom_path_1 + else: + path = self.eeprom_path + self.port_to_eeprom[x] = path.format(self.port_to_i2cbus_mapping[cpld_index], index) + SfpUtilBase.__init__(self) + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.first_port or port_num > self.last_port: + return False + + cpld_index = (port_num / 16) + 1 + index = (port_num % 16) + 1 + if cpld_index == 5: + path = self.port_reset_path_1 + else: + path = self.port_reset_path + port_path = path.format(self.port_to_i2cbus_mapping[cpld_index], index) + + try: + reg_file = open(port_path, 'w') + except IOError as e: + if cpld_index < 5: + print "Error: unable to open file: %s" % str(e) + return False + + # reset + reg_file.write('1') + + time.sleep(1) + + reg_file.write('0') + + reg_file.close() + return True + + def set_low_power_mode(self, port_nuM, lpmode): + raise NotImplementedError + + def get_low_power_mode(self, port_num): + raise NotImplementedError + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.first_port or port_num > self.last_port: + return False + + cpld_index = (port_num / 16) + 1 + index = (port_num % 16) + 1 + if cpld_index == 5: + path = self.present_path_1 + else: + path = self.present_path + port_path = path.format(self.port_to_i2cbus_mapping[cpld_index], index) + + + try: + reg_file = open(port_path) + except IOError as e: + if cpld_index < 5: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if reg_value == '1': + return True + + return False + diff --git a/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/sensors.conf b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/sensors.conf new file mode 100644 index 00000000000..0650d9da652 --- /dev/null +++ b/device/alphanetworks/x86_64-alphanetworks_snh60b0_640f-r0/sensors.conf @@ -0,0 +1,13 @@ +# libsensors configuration file for snh60b0_640f +# ------------------------------------------------ + +bus "i2c-1" "SMBus I801 adapter at f000" +chip "goreme_power_cpld-*" + label fan1 "Fan tray 1 front" + label fan2 "Fan tray 2 front" + label fan3 "Fan tray 3 front" + label fan4 "Fan tray 4 front" + label fan11 "Fan tray 1 rear" + label fan12 "Fan tray 2 rear" + label fan13 "Fan tray 3 rear" + label fan14 "Fan tray 4 rear" diff --git a/device/arista/x86_64-arista_7050_qx32/Arista-7050-Q16S64/port_config.ini b/device/arista/x86_64-arista_7050_qx32/Arista-7050-Q16S64/port_config.ini new file mode 100644 index 00000000000..1cc6c91b130 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/Arista-7050-Q16S64/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index +Ethernet0 125,126,127,128 Ethernet1/1 1 +Ethernet4 121,122,123,124 Ethernet2/1 2 +Ethernet8 13,14,15,16 Ethernet3/1 3 +Ethernet12 9,10,11,12 Ethernet4/1 4 +Ethernet16 17,18,19,20 Ethernet5/1 5 +Ethernet20 21,22,23,24 Ethernet6/1 6 +Ethernet24 25,26,27,28 Ethernet7/1 7 +Ethernet28 29,30,31,32 Ethernet8/1 8 +Ethernet32 37,38,39,40 Ethernet9/1 9 +Ethernet36 33,34,35,36 Ethernet10/1 10 +Ethernet40 45,46,47,48 Ethernet11/1 11 +Ethernet44 41,42,43,44 Ethernet12/1 12 +Ethernet48 53,54,55,56 Ethernet13/1 13 +Ethernet52 49,50,51,52 Ethernet14/1 14 +Ethernet56 69,70,71,72 Ethernet15/1 15 +Ethernet60 65,66,67,68 Ethernet16/1 16 +Ethernet64 77 Ethernet17/1 17 +Ethernet65 78 Ethernet17/2 17 +Ethernet66 79 Ethernet17/3 17 +Ethernet67 80 Ethernet17/4 17 +Ethernet68 73 Ethernet18/1 18 +Ethernet69 74 Ethernet18/2 18 +Ethernet70 75 Ethernet18/3 18 +Ethernet71 76 Ethernet18/4 18 +Ethernet72 93 Ethernet19/1 19 +Ethernet73 94 Ethernet19/2 19 +Ethernet74 95 Ethernet19/3 19 +Ethernet75 96 Ethernet19/4 19 +Ethernet76 89 Ethernet20/1 20 +Ethernet77 90 Ethernet20/2 20 +Ethernet78 91 Ethernet20/3 20 +Ethernet79 92 Ethernet20/4 20 +Ethernet80 101 Ethernet21/1 21 +Ethernet81 102 Ethernet21/2 21 +Ethernet82 103 Ethernet21/3 21 +Ethernet83 104 Ethernet21/4 21 +Ethernet84 97 Ethernet22/1 22 +Ethernet85 98 Ethernet22/2 22 +Ethernet86 99 Ethernet22/3 22 +Ethernet87 100 Ethernet22/4 22 +Ethernet88 109 Ethernet23/1 23 +Ethernet89 110 Ethernet23/2 23 +Ethernet90 111 Ethernet23/3 23 +Ethernet91 112 Ethernet23/4 23 +Ethernet92 105 Ethernet24/1 24 +Ethernet93 106 Ethernet24/2 24 +Ethernet94 107 Ethernet24/3 24 +Ethernet95 108 Ethernet24/4 24 +Ethernet96 61,62,63,64 Ethernet25 25 +Ethernet100 57,58,59,60 Ethernet26 26 +Ethernet104 81,82,83,84 Ethernet27 27 +Ethernet108 85,86,87,88 Ethernet28 28 +Ethernet112 117,118,119,120 Ethernet29 29 +Ethernet116 113,114,115,116 Ethernet30 30 +Ethernet120 5,6,7,8 Ethernet31 31 +Ethernet124 1,2,3,4 Ethernet32 32 diff --git a/device/arista/x86_64-arista_7050_qx32/Arista-7050-Q16S64/sai.profile b/device/arista/x86_64-arista_7050_qx32/Arista-7050-Q16S64/sai.profile new file mode 100644 index 00000000000..5c613675c37 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/Arista-7050-Q16S64/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-qx32-16x40G+32x10G+8x40G.config.bcm +SAI_NUM_ECMP_MEMBERS=32 diff --git a/device/arista/x86_64-arista_7050_qx32/Arista-7050-Q16S64/td2-a7050-qx32-16x40G+32x10G+8x40G.config.bcm b/device/arista/x86_64-arista_7050_qx32/Arista-7050-Q16S64/td2-a7050-qx32-16x40G+32x10G+8x40G.config.bcm new file mode 100644 index 00000000000..4ce6b2d4a9d --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/Arista-7050-Q16S64/td2-a7050-qx32-16x40G+32x10G+8x40G.config.bcm @@ -0,0 +1,706 @@ +#/****************************************************************************** +# * +# * File: config.bcm.cloverdales (7050-QX32) +# * Name: +# * +# * Description: This file contains SDK properties for an Arista +# * Cloverdales platform. +# * +# *----------------------------------------------------------------------------- +# ******************************************************************************/ +#################################################################### +# BCM Config file for Cloverdale platform +# - 16x40g + 32x10g + 8x40G Portmode + +# Old LPM only configuration +# l2_mem_entries=163840 +# l3_mem_entries=90112 +# l3_alpm_enable=0 +# ipv6_lpm_128b_enable=0 +# +# ALPM enable +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 +l2_mem_entries=32768 +l3_mem_entries=16384 + +# From old config file +os=unix +higig2_hdr_mode=1 + +# Parity +parity_correction=1 +parity_enable=1 +stat_if_parity_enable=0 + +# l2 thread related config vars +l2xmsg_hostbuf_size=8192 +l2xmsg_mode=1 + +bcm_num_cos=8 +bcm_stat_interval=2000000 +lls_num_l2uc=12 +max_vp_lags=0 +miim_intr_enable=0 +mmu_lossless=0 +module_64ports=0 +schan_intr_enable=0 +stable_size=0x2000000 +tdma_timeout_usec=5000000 + +# for GLC transceiver +phy_an_c73=0x0 +phy_an_c37=0x3 + +########################### +#port_init_speed_xe=40000 +#port_init_speed_xe.0=40000 + +#load_firmware=0x0102 +load_firmware.0=2 + +######################### +# All ports are in oversubscription mode +pbmp_oversubscribe=0x1fffffffffffffffffffffffffe +pbmp_xport_xe.0=0x1fffffffffffffffffffffffffe + +########################################## +#skip_L2_USER_ENTRY=0 +phy_aux_voltage_enable=1 +############################### +serdes_fiber_pref=1 +############################### +mdio_output_delay.0=0x0d +############################### +serdes_sgmii_m=0 +xgxs_lcpll_xtal_refclk=1 +xgxs_lcpll_xtal_refclk.0=1 +xgxs_lcpll_xtal_refclk.1=1 +xgxs_lcpll_xtal_refclk.2=1 +xgxs_lcpll_xtal_refclk.3=1 +tdma_intr_enable=1 +tslam_intr_enable=1 +tslam_dma_enable.2=1 +tslam_dma_enable.3=1 +#dport_map_port=0 +#pci2eb_overrid=0 +#bcm_xlate_port_enable.0=0 +#xgxs_pdetect_1=0 +table_dma_enable.0=1 +table_dma_enable.1=1 +table_dma_enable.2=1 +table_dma_enable.3=1 + + +phy_84328_1.0=1 +phy_84328_5.0=1 +phy_84328_9.0=1 +phy_84328_13.0=1 +phy_84328_101.0=1 +phy_84328_102.0=1 +phy_84328_103.0=1 +phy_84328_104.0=1 + +phy_an_c37_1.0=0 +phy_an_c37_5.0=0 +phy_an_c37_9.0=0 +phy_an_c37_13.0=0 +phy_an_c37_17.0=0 +phy_an_c37_21.0=0 +phy_an_c37_25.0=0 +phy_an_c37_29.0=0 +phy_an_c37_33.0=0 +phy_an_c37_37.0=0 +phy_an_c37_41.0=0 +phy_an_c37_45.0=0 +phy_an_c37_49.0=0 +phy_an_c37_53.0=0 +phy_an_c37_57.0=0 +phy_an_c37_61.0=0 +phy_an_c37_65.0=3 +phy_an_c37_66.0=3 +phy_an_c37_67.0=3 +phy_an_c37_68.0=3 +phy_an_c37_69.0=3 +phy_an_c37_70.0=3 +phy_an_c37_71.0=3 +phy_an_c37_72.0=3 +phy_an_c37_73.0=3 +phy_an_c37_74.0=3 +phy_an_c37_75.0=3 +phy_an_c37_76.0=3 +phy_an_c37_77.0=3 +phy_an_c37_78.0=3 +phy_an_c37_79.0=3 +phy_an_c37_80.0=3 +phy_an_c37_81.0=3 +phy_an_c37_82.0=3 +phy_an_c37_83.0=3 +phy_an_c37_84.0=3 +phy_an_c37_85.0=3 +phy_an_c37_86.0=3 +phy_an_c37_87.0=3 +phy_an_c37_88.0=3 +phy_an_c37_89.0=3 +phy_an_c37_90.0=3 +phy_an_c37_91.0=3 +phy_an_c37_92.0=3 +phy_an_c37_93.0=3 +phy_an_c37_94.0=3 +phy_an_c37_95.0=3 +phy_an_c37_96.0=3 +phy_an_c37_97.0=0 +phy_an_c37_98.0=0 +phy_an_c37_99.0=0 +phy_an_c37_100.0=0 +phy_an_c37_101.0=0 +phy_an_c37_102.0=0 +phy_an_c37_103.0=0 +phy_an_c37_104.0=0 + +phy_an_c73_1.0=2 +phy_an_c73_5.0=2 +phy_an_c73_9.0=2 +phy_an_c73_13.0=2 +phy_an_c73_17.0=2 +phy_an_c73_21.0=2 +phy_an_c73_25.0=2 +phy_an_c73_29.0=2 +phy_an_c73_33.0=2 +phy_an_c73_37.0=2 +phy_an_c73_41.0=2 +phy_an_c73_45.0=2 +phy_an_c73_49.0=2 +phy_an_c73_53.0=2 +phy_an_c73_57.0=2 +phy_an_c73_61.0=2 +phy_an_c73_65.0=0 +phy_an_c73_66.0=0 +phy_an_c73_67.0=0 +phy_an_c73_68.0=0 +phy_an_c73_69.0=0 +phy_an_c73_70.0=0 +phy_an_c73_71.0=0 +phy_an_c73_72.0=0 +phy_an_c73_73.0=0 +phy_an_c73_74.0=0 +phy_an_c73_75.0=0 +phy_an_c73_76.0=0 +phy_an_c73_77.0=0 +phy_an_c73_78.0=0 +phy_an_c73_79.0=0 +phy_an_c73_80.0=0 +phy_an_c73_81.0=0 +phy_an_c73_82.0=0 +phy_an_c73_83.0=0 +phy_an_c73_84.0=0 +phy_an_c73_85.0=0 +phy_an_c73_86.0=0 +phy_an_c73_87.0=0 +phy_an_c73_88.0=0 +phy_an_c73_89.0=0 +phy_an_c73_90.0=0 +phy_an_c73_91.0=0 +phy_an_c73_92.0=0 +phy_an_c73_93.0=0 +phy_an_c73_94.0=0 +phy_an_c73_95.0=0 +phy_an_c73_96.0=0 +phy_an_c73_97.0=2 +phy_an_c73_98.0=2 +phy_an_c73_99.0=2 +phy_an_c73_100.0=2 +phy_an_c73_101.0=2 +phy_an_c73_102.0=2 +phy_an_c73_103.0=2 +phy_an_c73_104.0=2 + +phy_aux_voltage_enable_1.0=0x1 +phy_aux_voltage_enable_5.0=0x1 +phy_aux_voltage_enable_9.0=0x1 +phy_aux_voltage_enable_13.0=0x1 +phy_aux_voltage_enable_101.0=0x1 +phy_aux_voltage_enable_102.0=0x1 +phy_aux_voltage_enable_103.0=0x1 +phy_aux_voltage_enable_104.0=0x1 + +phy_ext_rom_boot.0=0 + +phy_ext_rom_boot_1.0=0x0 +phy_ext_rom_boot_5.0=0x0 +phy_ext_rom_boot_9.0=0x0 +phy_ext_rom_boot_13.0=0x0 +phy_ext_rom_boot_101.0=0x0 +phy_ext_rom_boot_102.0=0x0 +phy_ext_rom_boot_103.0=0x0 +phy_ext_rom_boot_104.0=0x0 + + +phy_line_tx_mode_1.0=1 +phy_line_tx_mode_5.0=1 +phy_line_tx_mode_9.0=1 +phy_line_tx_mode_13.0=1 +phy_line_tx_mode_101.0=1 +phy_line_tx_mode_102.0=1 +phy_line_tx_mode_103.0=1 +phy_line_tx_mode_104.0=1 + + +phy_rx_polarity_flip_1.0=0x0 +phy_rx_polarity_flip_5.0=0x0 +phy_rx_polarity_flip_9.0=0x0 +phy_rx_polarity_flip_13.0=0x0 +phy_rx_polarity_flip_101.0=0x0 +phy_rx_polarity_flip_102.0=0x0 +phy_rx_polarity_flip_103.0=0x0 +phy_rx_polarity_flip_104.0=0x0 + +phy_system_tx_mode_1.0=0 +phy_system_tx_mode_5.0=0 +phy_system_tx_mode_9.0=0 +phy_system_tx_mode_13.0=0 +phy_system_tx_mode_101.0=0 +phy_system_tx_mode_102.0=0 +phy_system_tx_mode_103.0=0 +phy_system_tx_mode_104.0=0 + + +phy_tx_polarity_flip_1.0=0x0 +phy_tx_polarity_flip_5.0=0x0 +phy_tx_polarity_flip_9.0=0x0 +phy_tx_polarity_flip_13.0=0x0 +phy_tx_polarity_flip_101.0=0x0 +phy_tx_polarity_flip_102.0=0x0 +phy_tx_polarity_flip_103.0=0x0 +phy_tx_polarity_flip_104.0=0x0 + + +phy_xaui_rx_polarity_flip_1.0=0x0 +phy_xaui_rx_polarity_flip_5.0=0x0 +phy_xaui_rx_polarity_flip_9.0=0x0 +phy_xaui_rx_polarity_flip_13.0=0x0 +phy_xaui_rx_polarity_flip_17.0=0x0 +phy_xaui_rx_polarity_flip_21.0=0x0 +phy_xaui_rx_polarity_flip_25.0=0x0 +phy_xaui_rx_polarity_flip_29.0=0x0 +phy_xaui_rx_polarity_flip_33.0=0x0 +phy_xaui_rx_polarity_flip_37.0=0x0 +phy_xaui_rx_polarity_flip_41.0=0x0 +phy_xaui_rx_polarity_flip_45.0=0x0 +phy_xaui_rx_polarity_flip_49.0=0x0 +phy_xaui_rx_polarity_flip_53.0=0x0 +phy_xaui_rx_polarity_flip_57.0=0x0 +phy_xaui_rx_polarity_flip_61.0=0x0 +phy_xaui_rx_polarity_flip_65.0=0x0 +phy_xaui_rx_polarity_flip_66.0=0x0 +phy_xaui_rx_polarity_flip_67.0=0x0 +phy_xaui_rx_polarity_flip_68.0=0x0 +phy_xaui_rx_polarity_flip_69.0=0x0 +phy_xaui_rx_polarity_flip_70.0=0x0 +phy_xaui_rx_polarity_flip_71.0=0x0 +phy_xaui_rx_polarity_flip_72.0=0x0 +phy_xaui_rx_polarity_flip_73.0=0x0 +phy_xaui_rx_polarity_flip_74.0=0x0 +phy_xaui_rx_polarity_flip_75.0=0x0 +phy_xaui_rx_polarity_flip_76.0=0x0 +phy_xaui_rx_polarity_flip_77.0=0x0 +phy_xaui_rx_polarity_flip_78.0=0x0 +phy_xaui_rx_polarity_flip_79.0=0x0 +phy_xaui_rx_polarity_flip_80.0=0x0 +phy_xaui_rx_polarity_flip_81.0=0x0 +phy_xaui_rx_polarity_flip_82.0=0x0 +phy_xaui_rx_polarity_flip_83.0=0x0 +phy_xaui_rx_polarity_flip_84.0=0x0 +phy_xaui_rx_polarity_flip_85.0=0x0 +phy_xaui_rx_polarity_flip_86.0=0x0 +phy_xaui_rx_polarity_flip_87.0=0x0 +phy_xaui_rx_polarity_flip_88.0=0x0 +phy_xaui_rx_polarity_flip_89.0=0x0 +phy_xaui_rx_polarity_flip_90.0=0x0 +phy_xaui_rx_polarity_flip_91.0=0x0 +phy_xaui_rx_polarity_flip_92.0=0x0 +phy_xaui_rx_polarity_flip_93.0=0x0 +phy_xaui_rx_polarity_flip_94.0=0x0 +phy_xaui_rx_polarity_flip_95.0=0x0 +phy_xaui_rx_polarity_flip_96.0=0x0 +phy_xaui_rx_polarity_flip_97.0=0x0 +phy_xaui_rx_polarity_flip_98.0=0x0 +phy_xaui_rx_polarity_flip_99.0=0x0 +phy_xaui_rx_polarity_flip_100.0=0x0 +phy_xaui_rx_polarity_flip_101.0=0x0 +phy_xaui_rx_polarity_flip_102.0=0x0 +phy_xaui_rx_polarity_flip_103.0=0x0 +phy_xaui_rx_polarity_flip_104.0=0x0 + +phy_xaui_tx_polarity_flip_1.0=0x0 +phy_xaui_tx_polarity_flip_5.0=0x0 +phy_xaui_tx_polarity_flip_9.0=0x0 +phy_xaui_tx_polarity_flip_13.0=0x0 +phy_xaui_tx_polarity_flip_17.0=0x0 +phy_xaui_tx_polarity_flip_21.0=0x0 +phy_xaui_tx_polarity_flip_25.0=0x0 +phy_xaui_tx_polarity_flip_29.0=0x0 +phy_xaui_tx_polarity_flip_33.0=0x0 +phy_xaui_tx_polarity_flip_37.0=0x0 +phy_xaui_tx_polarity_flip_41.0=0x0 +phy_xaui_tx_polarity_flip_45.0=0x0 +phy_xaui_tx_polarity_flip_49.0=0x0 +phy_xaui_tx_polarity_flip_53.0=0x0 +phy_xaui_tx_polarity_flip_57.0=0x0 +phy_xaui_tx_polarity_flip_61.0=0x0 +phy_xaui_tx_polarity_flip_65.0=0x0 +phy_xaui_tx_polarity_flip_66.0=0x0 +phy_xaui_tx_polarity_flip_67.0=0x0 +phy_xaui_tx_polarity_flip_68.0=0x0 +phy_xaui_tx_polarity_flip_69.0=0x0 +phy_xaui_tx_polarity_flip_70.0=0x0 +phy_xaui_tx_polarity_flip_71.0=0x0 +phy_xaui_tx_polarity_flip_72.0=0x0 +phy_xaui_tx_polarity_flip_73.0=0x0 +phy_xaui_tx_polarity_flip_74.0=0x0 +phy_xaui_tx_polarity_flip_75.0=0x0 +phy_xaui_tx_polarity_flip_76.0=0x0 +phy_xaui_tx_polarity_flip_77.0=0x0 +phy_xaui_tx_polarity_flip_78.0=0x0 +phy_xaui_tx_polarity_flip_79.0=0x0 +phy_xaui_tx_polarity_flip_80.0=0x0 +phy_xaui_tx_polarity_flip_81.0=0x0 +phy_xaui_tx_polarity_flip_82.0=0x0 +phy_xaui_tx_polarity_flip_83.0=0x0 +phy_xaui_tx_polarity_flip_84.0=0x0 +phy_xaui_tx_polarity_flip_85.0=0x0 +phy_xaui_tx_polarity_flip_86.0=0x0 +phy_xaui_tx_polarity_flip_87.0=0x0 +phy_xaui_tx_polarity_flip_88.0=0x0 +phy_xaui_tx_polarity_flip_89.0=0x0 +phy_xaui_tx_polarity_flip_90.0=0x0 +phy_xaui_tx_polarity_flip_91.0=0x0 +phy_xaui_tx_polarity_flip_92.0=0x0 +phy_xaui_tx_polarity_flip_93.0=0x0 +phy_xaui_tx_polarity_flip_94.0=0x0 +phy_xaui_tx_polarity_flip_95.0=0x0 +phy_xaui_tx_polarity_flip_96.0=0x0 +phy_xaui_tx_polarity_flip_97.0=0x0 +phy_xaui_tx_polarity_flip_98.0=0x0 +phy_xaui_tx_polarity_flip_99.0=0x0 +phy_xaui_tx_polarity_flip_100.0=0x0 +phy_xaui_tx_polarity_flip_101.0=0x0 +phy_xaui_tx_polarity_flip_102.0=0x0 +phy_xaui_tx_polarity_flip_103.0=0x0 +phy_xaui_tx_polarity_flip_104.0=0x0 + +port_init_autoneg_17.0=0 +port_init_autoneg_21.0=0 +port_init_autoneg_25.0=0 +port_init_autoneg_29.0=0 +port_init_autoneg_33.0=0 +port_init_autoneg_37.0=0 +port_init_autoneg_41.0=0 +port_init_autoneg_45.0=0 +port_init_autoneg_49.0=0 +port_init_autoneg_53.0=0 +port_init_autoneg_57.0=0 +port_init_autoneg_61.0=0 +port_init_autoneg_65.0=0 +port_init_autoneg_66.0=0 +port_init_autoneg_67.0=0 +port_init_autoneg_68.0=0 +port_init_autoneg_69.0=0 +port_init_autoneg_70.0=0 +port_init_autoneg_71.0=0 +port_init_autoneg_72.0=0 +port_init_autoneg_73.0=0 +port_init_autoneg_74.0=0 +port_init_autoneg_75.0=0 +port_init_autoneg_76.0=0 +port_init_autoneg_77.0=0 +port_init_autoneg_78.0=0 +port_init_autoneg_79.0=0 +port_init_autoneg_80.0=0 +port_init_autoneg_81.0=0 +port_init_autoneg_82.0=0 +port_init_autoneg_83.0=0 +port_init_autoneg_84.0=0 +port_init_autoneg_85.0=0 +port_init_autoneg_86.0=0 +port_init_autoneg_87.0=0 +port_init_autoneg_88.0=0 +port_init_autoneg_89.0=0 +port_init_autoneg_90.0=0 +port_init_autoneg_91.0=0 +port_init_autoneg_92.0=0 +port_init_autoneg_93.0=0 +port_init_autoneg_94.0=0 +port_init_autoneg_95.0=0 +port_init_autoneg_96.0=0 +port_init_autoneg_97.0=0 +port_init_autoneg_98.0=0 +port_init_autoneg_99.0=0 +port_init_autoneg_100.0=0 + +port_init_cl72_hg.0=0x11 + + +portmap_1.0=125:40 +portmap_5.0=121:40 +portmap_9.0=13:40 +portmap_13.0=9:40 +portmap_17.0=17:40 +portmap_21.0=21:40 +portmap_25.0=25:40 +portmap_29.0=29:40 +portmap_33.0=37:40 +portmap_37.0=33:40 +portmap_41.0=45:40 +portmap_45.0=41:40 +portmap_49.0=53:40 +portmap_53.0=49:40 +portmap_57.0=69:40 +portmap_61.0=65:40 +portmap_65.0=77:10 +portmap_66.0=78:10 +portmap_67.0=79:10 +portmap_68.0=80:10 +portmap_69.0=73:10 +portmap_70.0=74:10 +portmap_71.0=75:10 +portmap_72.0=76:10 +portmap_73.0=93:10 +portmap_74.0=94:10 +portmap_75.0=95:10 +portmap_76.0=96:10 +portmap_77.0=89:10 +portmap_78.0=90:10 +portmap_79.0=91:10 +portmap_80.0=92:10 +portmap_81.0=101:10 +portmap_82.0=102:10 +portmap_83.0=103:10 +portmap_84.0=104:10 +portmap_85.0=97:10 +portmap_86.0=98:10 +portmap_87.0=99:10 +portmap_88.0=100:10 +portmap_89.0=109:10 +portmap_90.0=110:10 +portmap_91.0=111:10 +portmap_92.0=112:10 +portmap_93.0=105:10 +portmap_94.0=106:10 +portmap_95.0=107:10 +portmap_96.0=108:10 +portmap_97.0=61:40 +portmap_98.0=57:40 +portmap_99.0=81:40 +portmap_100.0=85:40 +portmap_101.0=117:40 +portmap_102.0=113:40 +portmap_103.0=5:40 +portmap_104.0=1:40 + +port_phy_addr_1.0=0x4 +port_phy_addr_5.0=0x0 +port_phy_addr_9.0=0x2c +port_phy_addr_13.0=0x28 +port_phy_addr_17.0=0x7f +port_phy_addr_21.0=0x7f +port_phy_addr_25.0=0x7f +port_phy_addr_29.0=0x7f +port_phy_addr_33.0=0x7f +port_phy_addr_37.0=0x7f +port_phy_addr_41.0=0x7f +port_phy_addr_45.0=0x7f +port_phy_addr_49.0=0x7f +port_phy_addr_53.0=0x7f +port_phy_addr_57.0=0x7f +port_phy_addr_61.0=0x7f +port_phy_addr_65.0=0x7f +port_phy_addr_66.0=0x7f +port_phy_addr_67.0=0x7f +port_phy_addr_68.0=0x7f +port_phy_addr_69.0=0x7f +port_phy_addr_70.0=0x7f +port_phy_addr_71.0=0x7f +port_phy_addr_72.0=0x7f +port_phy_addr_73.0=0x7f +port_phy_addr_74.0=0x7f +port_phy_addr_75.0=0x7f +port_phy_addr_76.0=0x7f +port_phy_addr_77.0=0x7f +port_phy_addr_78.0=0x7f +port_phy_addr_79.0=0x7f +port_phy_addr_80.0=0x7f +port_phy_addr_81.0=0x7f +port_phy_addr_82.0=0x7f +port_phy_addr_83.0=0x7f +port_phy_addr_84.0=0x7f +port_phy_addr_85.0=0x7f +port_phy_addr_86.0=0x7f +port_phy_addr_87.0=0x7f +port_phy_addr_88.0=0x7f +port_phy_addr_89.0=0x7f +port_phy_addr_90.0=0x7f +port_phy_addr_91.0=0x7f +port_phy_addr_92.0=0x7f +port_phy_addr_93.0=0x7f +port_phy_addr_94.0=0x7f +port_phy_addr_95.0=0x7f +port_phy_addr_96.0=0x7f +port_phy_addr_97.0=0x7f +port_phy_addr_98.0=0x7f +port_phy_addr_99.0=0x7f +port_phy_addr_100.0=0x7f +port_phy_addr_101.0=0x54 +port_phy_addr_102.0=0x50 +port_phy_addr_103.0=0x7c +port_phy_addr_104.0=0x78 + +port_phy_clause_1.0=0x2d +port_phy_clause_5.0=0x2d +port_phy_clause_9.0=0x2d +port_phy_clause_13.0=0x2d +port_phy_clause_101.0=0x2d +port_phy_clause_102.0=0x2d +port_phy_clause_103.0=0x2d +port_phy_clause_104.0=0x2d + +port_phy_id0_1.0=0x600d +port_phy_id0_5.0=0x600d +port_phy_id0_9.0=0x600d +port_phy_id0_13.0=0x600d +port_phy_id0_101.0=0x600d +port_phy_id0_102.0=0x600d +port_phy_id0_103.0=0x600d +port_phy_id0_104.0=0x600d + +port_phy_id1_1.0=0x8500 +port_phy_id1_5.0=0x8500 +port_phy_id1_9.0=0x8500 +port_phy_id1_13.0=0x8500 +port_phy_id1_101.0=0x8500 +port_phy_id1_102.0=0x8500 +port_phy_id1_103.0=0x8500 +port_phy_id1_104.0=0x8500 + +xgxs_rx_lane_map_1.0=0x0123 +xgxs_rx_lane_map_5.0=0x0123 +xgxs_rx_lane_map_9.0=0x0123 +xgxs_rx_lane_map_13.0=0x0123 +xgxs_rx_lane_map_17.0=0x2031 +xgxs_rx_lane_map_21.0=0x2031 +xgxs_rx_lane_map_25.0=0x2031 +xgxs_rx_lane_map_29.0=0x2031 +xgxs_rx_lane_map_33.0=0x3120 +xgxs_rx_lane_map_37.0=0x3120 +xgxs_rx_lane_map_41.0=0x3120 +xgxs_rx_lane_map_45.0=0x3120 +xgxs_rx_lane_map_49.0=0x3120 +xgxs_rx_lane_map_53.0=0x3120 +xgxs_rx_lane_map_57.0=0x3120 +xgxs_rx_lane_map_61.0=0x3120 +xgxs_rx_lane_map_65.0=0x3120 +xgxs_rx_lane_map_69.0=0x3120 +xgxs_rx_lane_map_73.0=0x3120 +xgxs_rx_lane_map_77.0=0x3120 +xgxs_rx_lane_map_81.0=0x3120 +xgxs_rx_lane_map_85.0=0x3120 +xgxs_rx_lane_map_89.0=0x3120 +xgxs_rx_lane_map_93.0=0x3120 +xgxs_rx_lane_map_97.0=0x1302 +xgxs_rx_lane_map_98.0=0x1302 +xgxs_rx_lane_map_99.0=0x0213 +xgxs_tx_lane_map_100.0=0x0213 +xgxs_tx_lane_map_101.0=0x0123 +xgxs_tx_lane_map_102.0=0x0123 +xgxs_tx_lane_map_103.0=0x0123 +xgxs_tx_lane_map_104.0=0x0123 + +xgxs_tx_lane_map_1.0=0x0123 +xgxs_tx_lane_map_5.0=0x0123 +xgxs_tx_lane_map_9.0=0x0123 +xgxs_tx_lane_map_13.0=0x0123 +xgxs_tx_lane_map_17.0=0x1302 +xgxs_tx_lane_map_21.0=0x1302 +xgxs_tx_lane_map_25.0=0x1302 +xgxs_tx_lane_map_29.0=0x1302 +xgxs_tx_lane_map_33.0=0x3120 +xgxs_tx_lane_map_37.0=0x3120 +xgxs_tx_lane_map_41.0=0x3120 +xgxs_tx_lane_map_45.0=0x3120 +xgxs_tx_lane_map_49.0=0x3120 +xgxs_tx_lane_map_53.0=0x3120 +xgxs_tx_lane_map_57.0=0x3120 +xgxs_tx_lane_map_61.0=0x3120 +xgxs_tx_lane_map_65.0=0x3120 +xgxs_tx_lane_map_69.0=0x3120 +xgxs_tx_lane_map_73.0=0x3120 +xgxs_tx_lane_map_77.0=0x3120 +xgxs_tx_lane_map_81.0=0x3120 +xgxs_tx_lane_map_85.0=0x3120 +xgxs_tx_lane_map_89.0=0x3120 +xgxs_tx_lane_map_93.0=0x3120 +xgxs_tx_lane_map_97.0=0x2031 +xgxs_tx_lane_map_98.0=0x2031 +xgxs_tx_lane_map_99.0=0x0213 +xgxs_rx_lane_map_100.0=0x0213 +xgxs_rx_lane_map_101.0=0x0123 +xgxs_rx_lane_map_102.0=0x0123 +xgxs_rx_lane_map_103.0=0x0123 +xgxs_rx_lane_map_104.0=0x0123 + +serdes_firmware_mode_1.0=1 +serdes_firmware_mode_5.0=1 +serdes_firmware_mode_9.0=1 +serdes_firmware_mode_13.0=1 +serdes_firmware_mode_17.0=2 +serdes_firmware_mode_21.0=2 +serdes_firmware_mode_25.0=2 +serdes_firmware_mode_29.0=2 +serdes_firmware_mode_33.0=2 +serdes_firmware_mode_37.0=2 +serdes_firmware_mode_41.0=2 +serdes_firmware_mode_45.0=2 +serdes_firmware_mode_49.0=2 +serdes_firmware_mode_53.0=2 +serdes_firmware_mode_57.0=2 +serdes_firmware_mode_61.0=2 +serdes_firmware_mode_65.0=2 +serdes_firmware_mode_66.0=2 +serdes_firmware_mode_67.0=2 +serdes_firmware_mode_68.0=2 +serdes_firmware_mode_69.0=2 +serdes_firmware_mode_70.0=2 +serdes_firmware_mode_71.0=2 +serdes_firmware_mode_72.0=2 +serdes_firmware_mode_73.0=2 +serdes_firmware_mode_74.0=2 +serdes_firmware_mode_75.0=2 +serdes_firmware_mode_76.0=2 +serdes_firmware_mode_77.0=2 +serdes_firmware_mode_78.0=2 +serdes_firmware_mode_79.0=2 +serdes_firmware_mode_80.0=2 +serdes_firmware_mode_81.0=2 +serdes_firmware_mode_82.0=2 +serdes_firmware_mode_83.0=2 +serdes_firmware_mode_84.0=2 +serdes_firmware_mode_85.0=2 +serdes_firmware_mode_86.0=2 +serdes_firmware_mode_87.0=2 +serdes_firmware_mode_88.0=2 +serdes_firmware_mode_89.0=2 +serdes_firmware_mode_90.0=2 +serdes_firmware_mode_91.0=2 +serdes_firmware_mode_92.0=2 +serdes_firmware_mode_93.0=2 +serdes_firmware_mode_94.0=2 +serdes_firmware_mode_95.0=2 +serdes_firmware_mode_96.0=2 +serdes_firmware_mode_97.0=2 +serdes_firmware_mode_98.0=2 +serdes_firmware_mode_99.0=2 +serdes_firmware_mode_100.0=2 +serdes_firmware_mode_101.0=1 +serdes_firmware_mode_102.0=1 +serdes_firmware_mode_103.0=1 +serdes_firmware_mode_104.0=1 diff --git a/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/buffers.json.j2 b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/buffers.json.j2 new file mode 100644 index 00000000000..b67cf577ab7 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..38e34eb571e --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/buffers_defaults_t0.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..38e34eb571e --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/buffers_defaults_t1.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/pg_profile_lookup.ini b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/pg_profile_lookup.ini new file mode 100644 index 00000000000..0588079e684 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/pg_profile_lookup.ini @@ -0,0 +1,11 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 40000 5m 56368 18432 55120 -3 2496 + 50000 5m 56368 18432 55120 -3 2496 + 100000 5m 56368 18432 55120 -3 2496 + 40000 40m 56368 18432 55120 -3 2496 + 50000 40m 56368 18432 55120 -3 2496 + 100000 40m 56368 18432 55120 -3 2496 + 40000 300m 56368 18432 55120 -3 2496 + 50000 300m 56368 18432 55120 -3 2496 + 100000 300m 56368 18432 55120 -3 2496 diff --git a/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/port_config.ini b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/port_config.ini new file mode 100644 index 00000000000..212e1da4b0b --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 125,126,127,128 Ethernet1/1 1 40000 +Ethernet4 121,122,123,124 Ethernet2/1 2 40000 +Ethernet8 13,14,15,16 Ethernet3/1 3 40000 +Ethernet12 9,10,11,12 Ethernet4/1 4 40000 +Ethernet16 17,18,19,20 Ethernet5/1 5 40000 +Ethernet20 21,22,23,24 Ethernet6/1 6 40000 +Ethernet24 25,26,27,28 Ethernet7/1 7 40000 +Ethernet28 29,30,31,32 Ethernet8/1 8 40000 +Ethernet32 37,38,39,40 Ethernet9/1 9 40000 +Ethernet36 33,34,35,36 Ethernet10/1 10 40000 +Ethernet40 45,46,47,48 Ethernet11/1 11 40000 +Ethernet44 41,42,43,44 Ethernet12/1 12 40000 +Ethernet48 53,54,55,56 Ethernet13/1 13 40000 +Ethernet52 49,50,51,52 Ethernet14/1 14 40000 +Ethernet56 69,70,71,72 Ethernet15/1 15 40000 +Ethernet60 65,66,67,68 Ethernet16/1 16 40000 +Ethernet64 77,78,79,80 Ethernet17/1 17 40000 +Ethernet68 73,74,75,76 Ethernet18/1 18 40000 +Ethernet72 93,94,95,96 Ethernet19/1 19 40000 +Ethernet76 89,90,91,92 Ethernet20/1 20 40000 +Ethernet80 101,102,103,104 Ethernet21/1 21 40000 +Ethernet84 97,98,99,100 Ethernet22/1 22 40000 +Ethernet88 109,110,111,112 Ethernet23/1 23 40000 +Ethernet92 105,106,107,108 Ethernet24/1 24 40000 +Ethernet96 61,62,63,64 Ethernet25 25 40000 +Ethernet100 57,58,59,60 Ethernet26 26 40000 +Ethernet104 81,82,83,84 Ethernet27 27 40000 +Ethernet108 85,86,87,88 Ethernet28 28 40000 +Ethernet112 117,118,119,120 Ethernet29 29 40000 +Ethernet116 113,114,115,116 Ethernet30 30 40000 +Ethernet120 5,6,7,8 Ethernet31 31 40000 +Ethernet124 1,2,3,4 Ethernet32 32 40000 diff --git a/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/qos.json.j2 b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/sai.profile b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/sai.profile new file mode 100644 index 00000000000..27d83fcc20e --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-qx32-32x40G.config.bcm +SAI_NUM_ECMP_MEMBERS=32 diff --git a/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/td2-a7050-qx32-32x40G.config.bcm b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/td2-a7050-qx32-32x40G.config.bcm new file mode 100644 index 00000000000..76b1af3aba1 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/td2-a7050-qx32-32x40G.config.bcm @@ -0,0 +1,872 @@ +#/****************************************************************************** +# * +# * File: config.bcm.cloverdales (7050-QX32) +# * Name: +# * +# * Description: This file contains SDK properties for an Arista +# * Cloverdales platform. +# * +# *----------------------------------------------------------------------------- +# ******************************************************************************/ +#################################################################### +# BCM Config file for Cloverdale platform +# - 32x40g Portmode + +# Old LPM only configuration +# l2_mem_entries=163840 +# l3_mem_entries=90112 +# l3_alpm_enable=0 +# ipv6_lpm_128b_enable=0 +# +# ALPM enable +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 +l2_mem_entries=32768 +l3_mem_entries=16384 + +# From old config file +os=unix +higig2_hdr_mode=1 + +# Parity +parity_correction=1 +parity_enable=1 +stat_if_parity_enable=0 + +# l2 thread related config vars +l2xmsg_hostbuf_size=8192 +l2xmsg_mode=1 + +bcm_num_cos=8 +bcm_stat_interval=2000000 +lls_num_l2uc=12 +max_vp_lags=0 +miim_intr_enable=0 +mmu_lossless=0 +module_64ports=0 +schan_intr_enable=0 +stable_size=0x2000000 +tdma_timeout_usec=5000000 + +# for GLC transceiver +phy_an_c73=0x0 +phy_an_c37=0x3 + +########################### +#port_init_speed_xe=40000 +#port_init_speed_xe.0=40000 + +#load_firmware=0x0102 +load_firmware.0=2 + +######################### +# All ports are in oversubscription mode +pbmp_oversubscribe=0x1fffffffffffffffffffffffffe +pbmp_xport_xe.0=0x1fffffffe + +phy_84328_1.0=1 +phy_84328_2.0=1 +phy_84328_29.0=1 +phy_84328_3.0=1 +phy_84328_30.0=1 +phy_84328_31.0=1 +phy_84328_32.0=1 +phy_84328_4.0=1 +phy_an_c37_1.0=3 +phy_an_c37_10.0=3 +phy_an_c37_11.0=3 +phy_an_c37_12.0=3 +phy_an_c37_13.0=3 +phy_an_c37_14.0=3 +phy_an_c37_15.0=3 +phy_an_c37_16.0=3 +phy_an_c37_17.0=3 +phy_an_c37_18.0=3 +phy_an_c37_19.0=3 +phy_an_c37_2.0=3 +phy_an_c37_20.0=3 +phy_an_c37_21.0=3 +phy_an_c37_22.0=3 +phy_an_c37_23.0=3 +phy_an_c37_24.0=3 +phy_an_c37_25.0=3 +phy_an_c37_26.0=3 +phy_an_c37_27.0=3 +phy_an_c37_28.0=3 +phy_an_c37_29.0=3 +phy_an_c37_3.0=3 +phy_an_c37_30.0=3 +phy_an_c37_31.0=3 +phy_an_c37_32.0=3 +phy_an_c37_4.0=3 +phy_an_c37_5.0=3 +phy_an_c37_6.0=3 +phy_an_c37_7.0=3 +phy_an_c37_8.0=3 +phy_an_c37_9.0=3 +phy_an_c73_1.0=1 +phy_an_c73_10.0=1 +phy_an_c73_11.0=1 +phy_an_c73_12.0=1 +phy_an_c73_13.0=1 +phy_an_c73_14.0=1 +phy_an_c73_15.0=1 +phy_an_c73_16.0=1 +phy_an_c73_17.0=1 +phy_an_c73_18.0=1 +phy_an_c73_19.0=1 +phy_an_c73_2.0=1 +phy_an_c73_20.0=1 +phy_an_c73_21.0=1 +phy_an_c73_22.0=1 +phy_an_c73_23.0=1 +phy_an_c73_24.0=1 +phy_an_c73_25.0=1 +phy_an_c73_26.0=1 +phy_an_c73_27.0=1 +phy_an_c73_28.0=1 +phy_an_c73_29.0=1 +phy_an_c73_3.0=1 +phy_an_c73_30.0=1 +phy_an_c73_31.0=1 +phy_an_c73_32.0=1 +phy_an_c73_4.0=1 +phy_an_c73_5.0=1 +phy_an_c73_6.0=1 +phy_an_c73_7.0=1 +phy_an_c73_8.0=1 +phy_an_c73_9.0=1 +phy_aux_voltage_enable_1.0=0x1 +phy_aux_voltage_enable_2.0=0x1 +phy_aux_voltage_enable_29.0=0x1 +phy_aux_voltage_enable_3.0=0x1 +phy_aux_voltage_enable_30.0=0x1 +phy_aux_voltage_enable_31.0=0x1 +phy_aux_voltage_enable_32.0=0x1 +phy_aux_voltage_enable_4.0=0x1 +phy_ext_rom_boot.0=0 +phy_ext_rom_boot_1.0=0x0 +phy_ext_rom_boot_2.0=0x0 +phy_ext_rom_boot_29.0=0x0 +phy_ext_rom_boot_3.0=0x0 +phy_ext_rom_boot_30.0=0x0 +phy_ext_rom_boot_31.0=0x0 +phy_ext_rom_boot_32.0=0x0 +phy_ext_rom_boot_4.0=0x0 +phy_line_tx_mode_1.0=1 +phy_line_tx_mode_2.0=1 +phy_line_tx_mode_29.0=1 +phy_line_tx_mode_3.0=1 +phy_line_tx_mode_30.0=1 +phy_line_tx_mode_31.0=1 +phy_line_tx_mode_32.0=1 +phy_line_tx_mode_4.0=1 +phy_rx_polarity_flip_1.0=0x0 +phy_rx_polarity_flip_2.0=0x0 +phy_rx_polarity_flip_29.0=0x0 +phy_rx_polarity_flip_3.0=0x0 +phy_rx_polarity_flip_30.0=0x0 +phy_rx_polarity_flip_31.0=0x0 +phy_rx_polarity_flip_32.0=0x0 +phy_rx_polarity_flip_4.0=0x0 +phy_system_tx_mode_1.0=0 +phy_system_tx_mode_2.0=0 +phy_system_tx_mode_29.0=0 +phy_system_tx_mode_3.0=0 +phy_system_tx_mode_30.0=0 +phy_system_tx_mode_31.0=0 +phy_system_tx_mode_32.0=0 +phy_system_tx_mode_4.0=0 +phy_tx_polarity_flip_1.0=0x0 +phy_tx_polarity_flip_2.0=0x0 +phy_tx_polarity_flip_29.0=0x0 +phy_tx_polarity_flip_3.0=0x0 +phy_tx_polarity_flip_30.0=0x0 +phy_tx_polarity_flip_31.0=0x0 +phy_tx_polarity_flip_32.0=0x0 +phy_tx_polarity_flip_4.0=0x0 +phy_xaui_rx_polarity_flip_1.0=0x0 +phy_xaui_rx_polarity_flip_10.0=0x0 +phy_xaui_rx_polarity_flip_11.0=0x0 +phy_xaui_rx_polarity_flip_12.0=0x0 +phy_xaui_rx_polarity_flip_13.0=0x0 +phy_xaui_rx_polarity_flip_14.0=0x0 +phy_xaui_rx_polarity_flip_15.0=0x0 +phy_xaui_rx_polarity_flip_16.0=0x0 +phy_xaui_rx_polarity_flip_17.0=0x0 +phy_xaui_rx_polarity_flip_18.0=0x0 +phy_xaui_rx_polarity_flip_19.0=0x0 +phy_xaui_rx_polarity_flip_2.0=0x0 +phy_xaui_rx_polarity_flip_20.0=0x0 +phy_xaui_rx_polarity_flip_21.0=0x0 +phy_xaui_rx_polarity_flip_22.0=0x0 +phy_xaui_rx_polarity_flip_23.0=0x0 +phy_xaui_rx_polarity_flip_24.0=0x0 +phy_xaui_rx_polarity_flip_25.0=0x0 +phy_xaui_rx_polarity_flip_26.0=0x0 +phy_xaui_rx_polarity_flip_27.0=0x0 +phy_xaui_rx_polarity_flip_28.0=0x0 +phy_xaui_rx_polarity_flip_29.0=0x0 +phy_xaui_rx_polarity_flip_3.0=0x0 +phy_xaui_rx_polarity_flip_30.0=0x0 +phy_xaui_rx_polarity_flip_31.0=0x0 +phy_xaui_rx_polarity_flip_32.0=0x0 +phy_xaui_rx_polarity_flip_4.0=0x0 +phy_xaui_rx_polarity_flip_5.0=0x0 +phy_xaui_rx_polarity_flip_6.0=0x0 +phy_xaui_rx_polarity_flip_7.0=0x0 +phy_xaui_rx_polarity_flip_8.0=0x0 +phy_xaui_rx_polarity_flip_9.0=0x0 +phy_xaui_tx_polarity_flip_1.0=0x0 +phy_xaui_tx_polarity_flip_10.0=0x0 +phy_xaui_tx_polarity_flip_11.0=0x0 +phy_xaui_tx_polarity_flip_12.0=0x0 +phy_xaui_tx_polarity_flip_13.0=0x0 +phy_xaui_tx_polarity_flip_14.0=0x0 +phy_xaui_tx_polarity_flip_15.0=0x0 +phy_xaui_tx_polarity_flip_16.0=0x0 +phy_xaui_tx_polarity_flip_17.0=0x0 +phy_xaui_tx_polarity_flip_18.0=0x0 +phy_xaui_tx_polarity_flip_19.0=0x0 +phy_xaui_tx_polarity_flip_2.0=0x0 +phy_xaui_tx_polarity_flip_20.0=0x0 +phy_xaui_tx_polarity_flip_21.0=0x0 +phy_xaui_tx_polarity_flip_22.0=0x0 +phy_xaui_tx_polarity_flip_23.0=0x0 +phy_xaui_tx_polarity_flip_24.0=0x0 +phy_xaui_tx_polarity_flip_25.0=0x0 +phy_xaui_tx_polarity_flip_26.0=0x0 +phy_xaui_tx_polarity_flip_27.0=0x0 +phy_xaui_tx_polarity_flip_28.0=0x0 +phy_xaui_tx_polarity_flip_29.0=0x0 +phy_xaui_tx_polarity_flip_3.0=0x0 +phy_xaui_tx_polarity_flip_30.0=0x0 +phy_xaui_tx_polarity_flip_31.0=0x0 +phy_xaui_tx_polarity_flip_32.0=0x0 +phy_xaui_tx_polarity_flip_4.0=0x0 +phy_xaui_tx_polarity_flip_5.0=0x0 +phy_xaui_tx_polarity_flip_6.0=0x0 +phy_xaui_tx_polarity_flip_7.0=0x0 +phy_xaui_tx_polarity_flip_8.0=0x0 +phy_xaui_tx_polarity_flip_9.0=0x0 +port_init_autoneg_10.0=0 +port_init_autoneg_11.0=0 +port_init_autoneg_12.0=0 +port_init_autoneg_13.0=0 +port_init_autoneg_14.0=0 +port_init_autoneg_15.0=0 +port_init_autoneg_16.0=0 +port_init_autoneg_17.0=0 +port_init_autoneg_18.0=0 +port_init_autoneg_19.0=0 +port_init_autoneg_20.0=0 +port_init_autoneg_21.0=0 +port_init_autoneg_22.0=0 +port_init_autoneg_23.0=0 +port_init_autoneg_24.0=0 +port_init_autoneg_25.0=0 +port_init_autoneg_26.0=0 +port_init_autoneg_27.0=0 +port_init_autoneg_28.0=0 +port_init_autoneg_5.0=0 +port_init_autoneg_6.0=0 +port_init_autoneg_7.0=0 +port_init_autoneg_8.0=0 +port_init_autoneg_9.0=0 +port_init_cl72_hg.0=0x11 +port_phy_addr_1.0=0x4 +port_phy_addr_10.0=0x7f +port_phy_addr_11.0=0x7f +port_phy_addr_12.0=0x7f +port_phy_addr_13.0=0x7f +port_phy_addr_14.0=0x7f +port_phy_addr_15.0=0x7f +port_phy_addr_16.0=0x7f +port_phy_addr_17.0=0x7f +port_phy_addr_18.0=0x7f +port_phy_addr_19.0=0x7f +port_phy_addr_2.0=0x0 +port_phy_addr_20.0=0x7f +port_phy_addr_21.0=0x7f +port_phy_addr_22.0=0x7f +port_phy_addr_23.0=0x7f +port_phy_addr_24.0=0x7f +port_phy_addr_25.0=0x7f +port_phy_addr_26.0=0x7f +port_phy_addr_27.0=0x7f +port_phy_addr_28.0=0x7f +port_phy_addr_29.0=0x54 +port_phy_addr_3.0=0x2c +port_phy_addr_30.0=0x50 +port_phy_addr_31.0=0x7c +port_phy_addr_32.0=0x78 +port_phy_addr_4.0=0x28 +port_phy_addr_5.0=0x7f +port_phy_addr_6.0=0x7f +port_phy_addr_7.0=0x7f +port_phy_addr_8.0=0x7f +port_phy_addr_9.0=0x7f +port_phy_clause_1.0=0x2d +port_phy_clause_2.0=0x2d +port_phy_clause_29.0=0x2d +port_phy_clause_3.0=0x2d +port_phy_clause_30.0=0x2d +port_phy_clause_31.0=0x2d +port_phy_clause_32.0=0x2d +port_phy_clause_4.0=0x2d +port_phy_id0_1.0=0x600d +port_phy_id0_2.0=0x600d +port_phy_id0_29.0=0x600d +port_phy_id0_3.0=0x600d +port_phy_id0_30.0=0x600d +port_phy_id0_31.0=0x600d +port_phy_id0_32.0=0x600d +port_phy_id0_4.0=0x600d +port_phy_id1_1.0=0x8500 +port_phy_id1_2.0=0x8500 +port_phy_id1_29.0=0x8500 +port_phy_id1_3.0=0x8500 +port_phy_id1_30.0=0x8500 +port_phy_id1_31.0=0x8500 +port_phy_id1_32.0=0x8500 +port_phy_id1_4.0=0x8500 +portmap_1.0=125:40 +portmap_10.0=33:40 +portmap_11.0=45:40 +portmap_12.0=41:40 +portmap_13.0=53:40 +portmap_14.0=49:40 +portmap_15.0=69:40 +portmap_16.0=65:40 +portmap_17.0=77:40 +portmap_18.0=73:40 +portmap_19.0=93:40 +portmap_2.0=121:40 +portmap_20.0=89:40 +portmap_21.0=101:40 +portmap_22.0=97:40 +portmap_23.0=109:40 +portmap_24.0=105:40 +portmap_25.0=61:40 +portmap_26.0=57:40 +portmap_27.0=81:40 +portmap_28.0=85:40 +portmap_29.0=117:40 +portmap_3.0=13:40 +portmap_30.0=113:40 +portmap_31.0=5:40 +portmap_32.0=1:40 +portmap_4.0=9:40 +portmap_5.0=17:40 +portmap_6.0=21:40 +portmap_7.0=25:40 +portmap_8.0=29:40 +portmap_9.0=37:40 +serdes_firmware_mode_1.0=1 +serdes_firmware_mode_10.0=2 +serdes_firmware_mode_11.0=2 +serdes_firmware_mode_12.0=2 +serdes_firmware_mode_13.0=2 +serdes_firmware_mode_14.0=2 +serdes_firmware_mode_15.0=2 +serdes_firmware_mode_16.0=2 +serdes_firmware_mode_17.0=2 +serdes_firmware_mode_18.0=2 +serdes_firmware_mode_19.0=2 +serdes_firmware_mode_2.0=1 +serdes_firmware_mode_20.0=2 +serdes_firmware_mode_21.0=2 +serdes_firmware_mode_22.0=2 +serdes_firmware_mode_23.0=2 +serdes_firmware_mode_24.0=2 +serdes_firmware_mode_25.0=2 +serdes_firmware_mode_26.0=2 +serdes_firmware_mode_27.0=2 +serdes_firmware_mode_28.0=2 +serdes_firmware_mode_29.0=1 +serdes_firmware_mode_3.0=1 +serdes_firmware_mode_30.0=1 +serdes_firmware_mode_31.0=1 +serdes_firmware_mode_32.0=1 +serdes_firmware_mode_4.0=1 +serdes_firmware_mode_5.0=2 +serdes_firmware_mode_6.0=2 +serdes_firmware_mode_7.0=2 +serdes_firmware_mode_8.0=2 +serdes_firmware_mode_9.0=2 +xgxs_lcpll_xtal_refclk.0=1 +xgxs_rx_lane_map_1.0=0x0123 +xgxs_rx_lane_map_10.0=0x3120 +xgxs_rx_lane_map_11.0=0x3120 +xgxs_rx_lane_map_12.0=0x3120 +xgxs_rx_lane_map_13.0=0x3120 +xgxs_rx_lane_map_14.0=0x3120 +xgxs_rx_lane_map_15.0=0x3120 +xgxs_rx_lane_map_16.0=0x3120 +xgxs_rx_lane_map_17.0=0x3120 +xgxs_rx_lane_map_18.0=0x3120 +xgxs_rx_lane_map_19.0=0x3120 +xgxs_rx_lane_map_2.0=0x0123 +xgxs_rx_lane_map_20.0=0x3120 +xgxs_rx_lane_map_21.0=0x3120 +xgxs_rx_lane_map_22.0=0x3120 +xgxs_rx_lane_map_23.0=0x3120 +xgxs_rx_lane_map_24.0=0x3120 +xgxs_rx_lane_map_25.0=0x2031 +xgxs_rx_lane_map_26.0=0x2031 +xgxs_rx_lane_map_27.0=0x0213 +xgxs_rx_lane_map_28.0=0x0213 +xgxs_rx_lane_map_29.0=0x0123 +xgxs_rx_lane_map_3.0=0x0123 +xgxs_rx_lane_map_30.0=0x0123 +xgxs_rx_lane_map_31.0=0x0123 +xgxs_rx_lane_map_32.0=0x0123 +xgxs_rx_lane_map_4.0=0x0123 +xgxs_rx_lane_map_5.0=0x2031 +xgxs_rx_lane_map_6.0=0x2031 +xgxs_rx_lane_map_7.0=0x2031 +xgxs_rx_lane_map_8.0=0x2031 +xgxs_rx_lane_map_9.0=0x3120 +xgxs_tx_lane_map_1.0=0x0123 +xgxs_tx_lane_map_10.0=0x3120 +xgxs_tx_lane_map_11.0=0x3120 +xgxs_tx_lane_map_12.0=0x3120 +xgxs_tx_lane_map_13.0=0x3120 +xgxs_tx_lane_map_14.0=0x3120 +xgxs_tx_lane_map_15.0=0x3120 +xgxs_tx_lane_map_16.0=0x3120 +xgxs_tx_lane_map_17.0=0x3120 +xgxs_tx_lane_map_18.0=0x3120 +xgxs_tx_lane_map_19.0=0x3120 +xgxs_tx_lane_map_2.0=0x0123 +xgxs_tx_lane_map_20.0=0x3120 +xgxs_tx_lane_map_21.0=0x3120 +xgxs_tx_lane_map_22.0=0x3120 +xgxs_tx_lane_map_23.0=0x3120 +xgxs_tx_lane_map_24.0=0x3120 +xgxs_tx_lane_map_25.0=0x2031 +xgxs_tx_lane_map_26.0=0x2031 +xgxs_tx_lane_map_27.0=0x0213 +xgxs_tx_lane_map_28.0=0x0213 +xgxs_tx_lane_map_29.0=0x0123 +xgxs_tx_lane_map_3.0=0x0123 +xgxs_tx_lane_map_30.0=0x0123 +xgxs_tx_lane_map_31.0=0x0123 +xgxs_tx_lane_map_32.0=0x0123 +xgxs_tx_lane_map_4.0=0x0123 +xgxs_tx_lane_map_5.0=0x1302 +xgxs_tx_lane_map_6.0=0x1302 +xgxs_tx_lane_map_7.0=0x1302 +xgxs_tx_lane_map_8.0=0x1302 +xgxs_tx_lane_map_9.0=0x3120 + +########################################## +#skip_L2_USER_ENTRY=0 +phy_aux_voltage_enable=1 +############################### +serdes_fiber_pref=1 +############################### +mdio_output_delay.0=0x0d +############################### +serdes_sgmii_m=0 +xgxs_lcpll_xtal_refclk=1 +xgxs_lcpll_xtal_refclk.1=1 +xgxs_lcpll_xtal_refclk.2=1 +xgxs_lcpll_xtal_refclk.3=1 +tdma_intr_enable=1 +tslam_intr_enable=1 +tslam_dma_enable.2=1 +tslam_dma_enable.3=1 +#dport_map_port=0 +#dport_map_enable=0 +#dport_map_indexed=0 +#bcm_xlate_port_enable.0=0 +#xgxs_pdetect_1=0 +table_dma_enable.0=1 +table_dma_enable.1=1 +table_dma_enable.2=1 +table_dma_enable.3=1 +serdes_driver_current_lane0_1=2 +serdes_pre_driver_current_lane0_1=2 +serdes_preemphasis_lane0_1=0x8fc0 +serdes_driver_current_lane1_1=2 +serdes_pre_driver_current_lane1_1=2 +serdes_preemphasis_lane1_1=0x8fc0 +serdes_driver_current_lane2_1=2 +serdes_pre_driver_current_lane2_1=2 +serdes_preemphasis_lane2_1=0x8fc0 +serdes_driver_current_lane3_1=2 +serdes_pre_driver_current_lane3_1=2 +serdes_preemphasis_lane3_1=0x8fc0 +serdes_driver_current_lane0_2=3 +serdes_pre_driver_current_lane0_2=2 +serdes_preemphasis_lane0_2=0x8fc0 +serdes_driver_current_lane1_2=3 +serdes_pre_driver_current_lane1_2=2 +serdes_preemphasis_lane1_2=0x8fc0 +serdes_driver_current_lane2_2=3 +serdes_pre_driver_current_lane2_2=2 +serdes_preemphasis_lane2_2=0x8fc0 +serdes_driver_current_lane3_2=3 +serdes_pre_driver_current_lane3_2=2 +serdes_preemphasis_lane3_2=0x8fc0 +serdes_driver_current_lane0_3=2 +serdes_pre_driver_current_lane0_3=2 +serdes_preemphasis_lane0_3=0x8fc0 +serdes_driver_current_lane1_3=2 +serdes_pre_driver_current_lane1_3=2 +serdes_preemphasis_lane1_3=0x8fc0 +serdes_driver_current_lane2_3=2 +serdes_pre_driver_current_lane2_3=2 +serdes_preemphasis_lane2_3=0x8fc0 +serdes_driver_current_lane3_3=2 +serdes_pre_driver_current_lane3_3=2 +serdes_preemphasis_lane3_3=0x8fc0 +serdes_driver_current_lane0_4=2 +serdes_pre_driver_current_lane0_4=2 +serdes_preemphasis_lane0_4=0x8fc0 +serdes_driver_current_lane1_4=2 +serdes_pre_driver_current_lane1_4=2 +serdes_preemphasis_lane1_4=0x8fc0 +serdes_driver_current_lane2_4=2 +serdes_pre_driver_current_lane2_4=2 +serdes_preemphasis_lane2_4=0x8fc0 +serdes_driver_current_lane3_4=2 +serdes_pre_driver_current_lane3_4=2 +serdes_preemphasis_lane3_4=0x8fc0 +serdes_driver_current_lane0_5=4 +serdes_pre_driver_current_lane0_5=4 +serdes_preemphasis_lane0_5=0xbf00 +serdes_driver_current_lane1_5=4 +serdes_pre_driver_current_lane1_5=4 +serdes_preemphasis_lane1_5=0xbf00 +serdes_driver_current_lane2_5=4 +serdes_pre_driver_current_lane2_5=4 +serdes_preemphasis_lane2_5=0xbf00 +serdes_driver_current_lane3_5=4 +serdes_pre_driver_current_lane3_5=4 +serdes_preemphasis_lane3_5=0xbf00 +serdes_driver_current_lane0_6=4 +serdes_pre_driver_current_lane0_6=4 +serdes_preemphasis_lane0_6=0xbb10 +serdes_driver_current_lane1_6=4 +serdes_pre_driver_current_lane1_6=4 +serdes_preemphasis_lane1_6=0xbb10 +serdes_driver_current_lane2_6=4 +serdes_pre_driver_current_lane2_6=4 +serdes_preemphasis_lane2_6=0xbb10 +serdes_driver_current_lane3_6=4 +serdes_pre_driver_current_lane3_6=4 +serdes_preemphasis_lane3_6=0xbb10 +serdes_driver_current_lane0_7=3 +serdes_pre_driver_current_lane0_7=3 +serdes_preemphasis_lane0_7=0xcad0 +serdes_driver_current_lane1_7=3 +serdes_pre_driver_current_lane1_7=3 +serdes_preemphasis_lane1_7=0xcad0 +serdes_driver_current_lane2_7=3 +serdes_pre_driver_current_lane2_7=3 +serdes_preemphasis_lane2_7=0xcad0 +serdes_driver_current_lane3_7=3 +serdes_pre_driver_current_lane3_7=3 +serdes_preemphasis_lane3_7=0xcad0 +serdes_driver_current_lane0_8=3 +serdes_pre_driver_current_lane0_8=3 +serdes_preemphasis_lane0_8=0xcad0 +serdes_driver_current_lane1_8=3 +serdes_pre_driver_current_lane1_8=3 +serdes_preemphasis_lane1_8=0xcad0 +serdes_driver_current_lane2_8=3 +serdes_pre_driver_current_lane2_8=3 +serdes_preemphasis_lane2_8=0xcad0 +serdes_driver_current_lane3_8=3 +serdes_pre_driver_current_lane3_8=3 +serdes_preemphasis_lane3_8=0xcad0 +serdes_driver_current_lane0_9=3 +serdes_pre_driver_current_lane0_9=3 +serdes_preemphasis_lane0_9=0xc2f0 +serdes_driver_current_lane1_9=3 +serdes_pre_driver_current_lane1_9=3 +serdes_preemphasis_lane1_9=0xc2f0 +serdes_driver_current_lane2_9=3 +serdes_pre_driver_current_lane2_9=3 +serdes_preemphasis_lane2_9=0xc2f0 +serdes_driver_current_lane3_9=3 +serdes_pre_driver_current_lane3_9=3 +serdes_preemphasis_lane3_9=0xc2f0 +serdes_driver_current_lane0_10=3 +serdes_pre_driver_current_lane0_10=3 +serdes_preemphasis_lane0_10=0xc6e0 +serdes_driver_current_lane1_10=3 +serdes_pre_driver_current_lane1_10=3 +serdes_preemphasis_lane1_10=0xc6e0 +serdes_driver_current_lane2_10=3 +serdes_pre_driver_current_lane2_10=3 +serdes_preemphasis_lane2_10=0xc6e0 +serdes_driver_current_lane3_10=3 +serdes_pre_driver_current_lane3_10=3 +serdes_preemphasis_lane3_10=0xc6e0 +serdes_driver_current_lane0_11=3 +serdes_pre_driver_current_lane0_11=3 +serdes_preemphasis_lane0_11=0xc2f0 +serdes_driver_current_lane1_11=3 +serdes_pre_driver_current_lane1_11=3 +serdes_preemphasis_lane1_11=0xc2f0 +serdes_driver_current_lane2_11=3 +serdes_pre_driver_current_lane2_11=3 +serdes_preemphasis_lane2_11=0xc2f0 +serdes_driver_current_lane3_11=3 +serdes_pre_driver_current_lane3_11=3 +serdes_preemphasis_lane3_11=0xc2f0 +serdes_driver_current_lane0_12=3 +serdes_pre_driver_current_lane0_12=3 +serdes_preemphasis_lane0_12=0xc2f0 +serdes_driver_current_lane1_12=3 +serdes_pre_driver_current_lane1_12=3 +serdes_preemphasis_lane1_12=0xc2f0 +serdes_driver_current_lane2_12=3 +serdes_pre_driver_current_lane2_12=3 +serdes_preemphasis_lane2_12=0xc2f0 +serdes_driver_current_lane3_12=3 +serdes_pre_driver_current_lane3_12=3 +serdes_preemphasis_lane3_12=0xc2f0 +serdes_driver_current_lane0_13=3 +serdes_pre_driver_current_lane0_13=3 +serdes_preemphasis_lane0_13=0xc2f0 +serdes_driver_current_lane1_13=3 +serdes_pre_driver_current_lane1_13=3 +serdes_preemphasis_lane1_13=0xc2f0 +serdes_driver_current_lane2_13=3 +serdes_pre_driver_current_lane2_13=3 +serdes_preemphasis_lane2_13=0xc2f0 +serdes_driver_current_lane3_13=3 +serdes_pre_driver_current_lane3_13=3 +serdes_preemphasis_lane3_13=0xc2f0 +serdes_driver_current_lane0_14=3 +serdes_pre_driver_current_lane0_14=3 +serdes_preemphasis_lane0_14=0xc2f0 +serdes_driver_current_lane1_14=3 +serdes_pre_driver_current_lane1_14=3 +serdes_preemphasis_lane1_14=0xc2f0 +serdes_driver_current_lane2_14=3 +serdes_pre_driver_current_lane2_14=3 +serdes_preemphasis_lane2_14=0xc2f0 +serdes_driver_current_lane3_14=3 +serdes_pre_driver_current_lane3_14=3 +serdes_preemphasis_lane3_14=0xc2f0 +serdes_driver_current_lane0_15=3 +serdes_pre_driver_current_lane0_15=3 +serdes_preemphasis_lane0_15=0xc2f0 +serdes_driver_current_lane1_15=3 +serdes_pre_driver_current_lane1_15=3 +serdes_preemphasis_lane1_15=0xc2f0 +serdes_driver_current_lane2_15=3 +serdes_pre_driver_current_lane2_15=3 +serdes_preemphasis_lane2_15=0xc2f0 +serdes_driver_current_lane3_15=3 +serdes_pre_driver_current_lane3_15=3 +serdes_preemphasis_lane3_15=0xc2f0 +serdes_driver_current_lane0_16=3 +serdes_pre_driver_current_lane0_16=3 +serdes_preemphasis_lane0_16=0xc2f0 +serdes_driver_current_lane1_16=3 +serdes_pre_driver_current_lane1_16=3 +serdes_preemphasis_lane1_16=0xc2f0 +serdes_driver_current_lane2_16=3 +serdes_pre_driver_current_lane2_16=3 +serdes_preemphasis_lane2_16=0xc2f0 +serdes_driver_current_lane3_16=3 +serdes_pre_driver_current_lane3_16=3 +serdes_preemphasis_lane3_16=0xc2f0 +serdes_driver_current_lane0_17=3 +serdes_pre_driver_current_lane0_17=3 +serdes_preemphasis_lane0_17=0xc2f0 +serdes_driver_current_lane1_17=3 +serdes_pre_driver_current_lane1_17=3 +serdes_preemphasis_lane1_17=0xc2f0 +serdes_driver_current_lane2_17=3 +serdes_pre_driver_current_lane2_17=3 +serdes_preemphasis_lane2_17=0xc2f0 +serdes_driver_current_lane3_17=3 +serdes_pre_driver_current_lane3_17=3 +serdes_preemphasis_lane3_17=0xc2f0 +serdes_driver_current_lane0_18=3 +serdes_pre_driver_current_lane0_18=3 +serdes_preemphasis_lane0_18=0xc2f0 +serdes_driver_current_lane1_18=3 +serdes_pre_driver_current_lane1_18=3 +serdes_preemphasis_lane1_18=0xc2f0 +serdes_driver_current_lane2_18=3 +serdes_pre_driver_current_lane2_18=3 +serdes_preemphasis_lane2_18=0xc2f0 +serdes_driver_current_lane3_18=3 +serdes_pre_driver_current_lane3_18=3 +serdes_preemphasis_lane3_18=0xc2f0 +serdes_driver_current_lane0_19=3 +serdes_pre_driver_current_lane0_19=3 +serdes_preemphasis_lane0_19=0xc2f0 +serdes_driver_current_lane1_19=3 +serdes_pre_driver_current_lane1_19=3 +serdes_preemphasis_lane1_19=0xc2f0 +serdes_driver_current_lane2_19=3 +serdes_pre_driver_current_lane2_19=3 +serdes_preemphasis_lane2_19=0xc2f0 +serdes_driver_current_lane3_19=3 +serdes_pre_driver_current_lane3_19=3 +serdes_preemphasis_lane3_19=0xc2f0 +serdes_driver_current_lane0_20=3 +serdes_pre_driver_current_lane0_20=3 +serdes_preemphasis_lane0_20=0xc2f0 +serdes_driver_current_lane1_20=3 +serdes_pre_driver_current_lane1_20=3 +serdes_preemphasis_lane1_20=0xc2f0 +serdes_driver_current_lane2_20=3 +serdes_pre_driver_current_lane2_20=3 +serdes_preemphasis_lane2_20=0xc2f0 +serdes_driver_current_lane3_20=3 +serdes_pre_driver_current_lane3_20=3 +serdes_preemphasis_lane3_20=0xc2f0 +serdes_driver_current_lane0_21=3 +serdes_pre_driver_current_lane0_21=3 +serdes_preemphasis_lane0_21=0xc6e0 +serdes_driver_current_lane1_21=3 +serdes_pre_driver_current_lane1_21=3 +serdes_preemphasis_lane1_21=0xc6e0 +serdes_driver_current_lane2_21=3 +serdes_pre_driver_current_lane2_21=3 +serdes_preemphasis_lane2_21=0xc6e0 +serdes_driver_current_lane3_21=3 +serdes_pre_driver_current_lane3_21=3 +serdes_preemphasis_lane3_21=0xc6e0 +serdes_driver_current_lane0_22=3 +serdes_pre_driver_current_lane0_22=3 +serdes_preemphasis_lane0_22=0xc6e0 +serdes_driver_current_lane1_22=3 +serdes_pre_driver_current_lane1_22=3 +serdes_preemphasis_lane1_22=0xc6e0 +serdes_driver_current_lane2_22=3 +serdes_pre_driver_current_lane2_22=3 +serdes_preemphasis_lane2_22=0xc6e0 +serdes_driver_current_lane3_22=3 +serdes_pre_driver_current_lane3_22=3 +serdes_preemphasis_lane3_22=0xc6e0 +serdes_driver_current_lane0_23=3 +serdes_pre_driver_current_lane0_23=3 +serdes_preemphasis_lane0_23=0xcad0 +serdes_driver_current_lane1_23=3 +serdes_pre_driver_current_lane1_23=3 +serdes_preemphasis_lane1_23=0xcad0 +serdes_driver_current_lane2_23=3 +serdes_pre_driver_current_lane2_23=3 +serdes_preemphasis_lane2_23=0xcad0 +serdes_driver_current_lane3_23=3 +serdes_pre_driver_current_lane3_23=3 +serdes_preemphasis_lane3_23=0xcad0 +serdes_driver_current_lane0_24=3 +serdes_pre_driver_current_lane0_24=3 +serdes_preemphasis_lane0_24=0xcad0 +serdes_driver_current_lane1_24=3 +serdes_pre_driver_current_lane1_24=3 +serdes_preemphasis_lane1_24=0xcad0 +serdes_driver_current_lane2_24=3 +serdes_pre_driver_current_lane2_24=3 +serdes_preemphasis_lane2_24=0xcad0 +serdes_driver_current_lane3_24=3 +serdes_pre_driver_current_lane3_24=3 +serdes_preemphasis_lane3_24=0xcad0 +serdes_driver_current_lane0_25=5 +serdes_pre_driver_current_lane0_25=5 +serdes_preemphasis_lane0_25=0xc2f0 +serdes_driver_current_lane1_25=5 +serdes_pre_driver_current_lane1_25=5 +serdes_preemphasis_lane1_25=0xc2f0 +serdes_driver_current_lane2_25=5 +serdes_pre_driver_current_lane2_25=5 +serdes_preemphasis_lane2_25=0xc2f0 +serdes_driver_current_lane3_25=5 +serdes_pre_driver_current_lane3_25=5 +serdes_preemphasis_lane3_25=0xc2f0 +serdes_driver_current_lane0_26=5 +serdes_pre_driver_current_lane0_26=5 +serdes_preemphasis_lane0_26=0xc2f0 +serdes_driver_current_lane1_26=5 +serdes_pre_driver_current_lane1_26=5 +serdes_preemphasis_lane1_26=0xc2f0 +serdes_driver_current_lane2_26=5 +serdes_pre_driver_current_lane2_26=5 +serdes_preemphasis_lane2_26=0xc2f0 +serdes_driver_current_lane3_26=5 +serdes_pre_driver_current_lane3_26=5 +serdes_preemphasis_lane3_26=0xc2f0 +serdes_driver_current_lane0_27=5 +serdes_pre_driver_current_lane0_27=5 +serdes_preemphasis_lane0_27=0xc2f0 +serdes_driver_current_lane1_27=5 +serdes_pre_driver_current_lane1_27=5 +serdes_preemphasis_lane1_27=0xc2f0 +serdes_driver_current_lane2_27=5 +serdes_pre_driver_current_lane2_27=5 +serdes_preemphasis_lane2_27=0xc2f0 +serdes_driver_current_lane3_27=5 +serdes_pre_driver_current_lane3_27=5 +serdes_preemphasis_lane3_27=0xc2f0 +serdes_driver_current_lane0_28=8 +serdes_pre_driver_current_lane0_28=6 +serdes_preemphasis_lane0_28=0xc2f0 +serdes_driver_current_lane1_28=8 +serdes_pre_driver_current_lane1_28=6 +serdes_preemphasis_lane1_28=0xc2f0 +serdes_driver_current_lane2_28=8 +serdes_pre_driver_current_lane2_28=6 +serdes_preemphasis_lane2_28=0xc2f0 +serdes_driver_current_lane3_28=8 +serdes_pre_driver_current_lane3_28=6 +serdes_preemphasis_lane3_28=0xc2f0 +serdes_driver_current_lane0_29=2 +serdes_pre_driver_current_lane0_29=2 +serdes_preemphasis_lane0_29=0x8fc0 +serdes_driver_current_lane1_29=2 +serdes_pre_driver_current_lane1_29=2 +serdes_preemphasis_lane1_29=0x8fc0 +serdes_driver_current_lane2_29=2 +serdes_pre_driver_current_lane2_29=2 +serdes_preemphasis_lane2_29=0x8fc0 +serdes_driver_current_lane3_29=2 +serdes_pre_driver_current_lane3_29=2 +serdes_preemphasis_lane3_29=0x8fc0 +serdes_driver_current_lane0_30=2 +serdes_pre_driver_current_lane0_30=2 +serdes_preemphasis_lane0_30=0x8fc0 +serdes_driver_current_lane1_30=2 +serdes_pre_driver_current_lane1_30=2 +serdes_preemphasis_lane1_30=0x8fc0 +serdes_driver_current_lane2_30=2 +serdes_pre_driver_current_lane2_30=2 +serdes_preemphasis_lane2_30=0x8fc0 +serdes_driver_current_lane3_30=2 +serdes_pre_driver_current_lane3_30=2 +serdes_preemphasis_lane3_30=0x8fc0 +serdes_driver_current_lane0_31=2 +serdes_pre_driver_current_lane0_31=2 +serdes_preemphasis_lane0_31=0x8fc0 +serdes_driver_current_lane1_31=2 +serdes_pre_driver_current_lane1_31=2 +serdes_preemphasis_lane1_31=0x8fc0 +serdes_driver_current_lane2_31=2 +serdes_pre_driver_current_lane2_31=2 +serdes_preemphasis_lane2_31=0x8fc0 +serdes_driver_current_lane3_31=2 +serdes_pre_driver_current_lane3_31=2 +serdes_preemphasis_lane3_31=0x8fc0 +serdes_driver_current_lane0_32=2 +serdes_pre_driver_current_lane0_32=2 +serdes_preemphasis_lane0_32=0x8fc0 +serdes_driver_current_lane1_32=2 +serdes_pre_driver_current_lane1_32=2 +serdes_preemphasis_lane1_32=0x8fc0 +serdes_driver_current_lane2_32=2 +serdes_pre_driver_current_lane2_32=2 +serdes_preemphasis_lane2_32=0x8fc0 +serdes_driver_current_lane3_32=2 +serdes_pre_driver_current_lane3_32=2 +serdes_preemphasis_lane3_32=0x8fc0 diff --git a/device/arista/x86_64-arista_7050_qx32/default_sku b/device/arista/x86_64-arista_7050_qx32/default_sku new file mode 100644 index 00000000000..8c19bef02a0 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/default_sku @@ -0,0 +1 @@ +Arista-7050-QX32 t1 diff --git a/device/arista/x86_64-arista_7050_qx32/fancontrol b/device/arista/x86_64-arista_7050_qx32/fancontrol new file mode 100644 index 00000000000..1d94fcf7674 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/fancontrol @@ -0,0 +1,10 @@ +INTERVAL=5 +DEVPATH=hwmon1=devices/platform/sb800-fans hwmon2=devices/pci0000:00/0000:00:09.0/0000:04:00.0/i2c-5/5-004c +DEVNAME=hwmon1=fans hwmon2=max6658 +FCTEMPS=hwmon1/pwm4=hwmon2/temp1_input hwmon1/pwm3=hwmon2/temp1_input hwmon1/pwm2=hwmon2/temp1_input hwmon1/pwm1=hwmon2/temp1_input +FCFANS=hwmon1/pwm4=hwmon1/fan4_input hwmon1/pwm3=hwmon1/fan3_input hwmon1/pwm2=hwmon1/fan2_input hwmon1/pwm1=hwmon1/fan1_input +MINTEMP=hwmon1/pwm4=30 hwmon1/pwm3=30 hwmon1/pwm2=30 hwmon1/pwm1=30 +MINPWM=hwmon1/pwm4=179 hwmon1/pwm3=179 hwmon1/pwm2=179 hwmon1/pwm1=179 +MAXTEMP=hwmon1/pwm4=40 hwmon1/pwm3=40 hwmon1/pwm2=40 hwmon1/pwm1=40 +MINSTART=hwmon1/pwm4=179 hwmon1/pwm3=179 hwmon1/pwm2=179 hwmon1/pwm1=179 +MINSTOP=hwmon1/pwm4=179 hwmon1/pwm3=179 hwmon1/pwm2=179 hwmon1/pwm1=179 diff --git a/device/arista/x86_64-arista_7050_qx32/platform_reboot b/device/arista/x86_64-arista_7050_qx32/platform_reboot new file mode 120000 index 00000000000..7f94a49e38b --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/platform_reboot @@ -0,0 +1 @@ +../x86_64-arista_common/platform_reboot \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050_qx32/plugins b/device/arista/x86_64-arista_7050_qx32/plugins new file mode 120000 index 00000000000..5fbbf98a628 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/plugins @@ -0,0 +1 @@ +../x86_64-arista_common/plugins/ \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050_qx32/sensors.conf b/device/arista/x86_64-arista_7050_qx32/sensors.conf new file mode 100644 index 00000000000..8b6ca752fe8 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32/sensors.conf @@ -0,0 +1,82 @@ +# libsensors configuration file for DCS-7050QX-32 +# ------------------------------------------------ +# + +bus "i2c-5" "SCD 0000:04:00.0 SMBus master 0 bus 0" +bus "i2c-6" "SCD 0000:04:00.0 SMBus master 0 bus 1" +bus "i2c-8" "SCD 0000:04:00.0 SMBus master 0 bus 3" +bus "i2c-9" "SCD 0000:04:00.0 SMBus master 0 bus 4" +bus "i2c-10" "SCD 0000:04:00.0 SMBus master 0 bus 5" + +chip "k10temp-pci-00c3" + label temp1 "Cpu temp sensor" + +chip "lm73-i2c-6-48" + label temp1 "Back panel temp sensor" + set temp1_max 65 + #set temp1_max_alarm 75 # read-only + +chip "max6658-i2c-5-4c" + label temp1 "Board temp sensor" + set temp1_max 65 + set temp1_crit 75 + + label temp2 "Front panel temp sensor" + set temp2_max 65 + set temp2_crit 75 + +# disabled because of some eeprom corruption risks +#chip "pmbus-i2c-6-4e" +# label temp1 "Power controller sensor 1" +# set temp1_max 60 +# set temp1_crit 70 + +# label temp2 "Power controller sensor 2" +# set temp2_max 60 +# set temp2_crit 70 + +# ignore curr1 + +chip "dps460-i2c-8-58" + label temp1 "Power supply 1 inlet temp sensor" + # maximum and critical thresholds are not supported for this psu + set temp1_max 60 + set temp1_crit 70 + + label temp2 "Power supply 1 internal sensor" + set temp2_max 60 + set temp2_crit 70 + + ignore temp3 + + set in1_max 250 + set in1_crit 255 + set power1_max 525 + set power2_max 460 + set power2_crit 462 + set curr1_max 5.28 + set curr1_crit 5.30 + set curr2_max 36 + set curr2_crit 37 + +chip "dps460-i2c-9-58" + label temp1 "Power supply 2 inlet temp sensor" + # maximum and critical thresholds are not supported for this psu + set temp1_max 60 + set temp1_crit 70 + + label temp2 "Power supply 2 internal sensor" + set temp2_max 60 + set temp2_crit 70 + + ignore temp3 + + set in1_max 250 + set in1_crit 255 + set power1_max 525 + set power2_max 460 + set power2_crit 462 + set curr1_max 5.28 + set curr1_crit 5.30 + set curr2_max 36 + set curr2_crit 37 diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/buffers.json.j2 b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/buffers.json.j2 new file mode 100644 index 00000000000..b67cf577ab7 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..38e34eb571e --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/buffers_defaults_t0.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..38e34eb571e --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/buffers_defaults_t1.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init new file mode 100755 index 00000000000..415bca98422 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/hwsku-init @@ -0,0 +1,3 @@ +#!/bin/bash + +echo 0 > /sys/devices/pci0000:00/0000:00:02.2/0000:02:00.0/mux diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/pg_profile_lookup.ini b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/pg_profile_lookup.ini new file mode 100644 index 00000000000..0588079e684 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/pg_profile_lookup.ini @@ -0,0 +1,11 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 40000 5m 56368 18432 55120 -3 2496 + 50000 5m 56368 18432 55120 -3 2496 + 100000 5m 56368 18432 55120 -3 2496 + 40000 40m 56368 18432 55120 -3 2496 + 50000 40m 56368 18432 55120 -3 2496 + 100000 40m 56368 18432 55120 -3 2496 + 40000 300m 56368 18432 55120 -3 2496 + 50000 300m 56368 18432 55120 -3 2496 + 100000 300m 56368 18432 55120 -3 2496 diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/port_config.ini b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/port_config.ini new file mode 100644 index 00000000000..857b126bf83 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 9,10,11,12 Ethernet5/1 5 40000 +Ethernet4 13,14,15,16 Ethernet6/1 6 40000 +Ethernet8 17,18,19,20 Ethernet7/1 7 40000 +Ethernet12 21,22,23,24 Ethernet8/1 8 40000 +Ethernet16 29,30,31,32 Ethernet9/1 9 40000 +Ethernet20 25,26,27,28 Ethernet10/1 10 40000 +Ethernet24 33,34,35,36 Ethernet11/1 11 40000 +Ethernet28 37,38,39,40 Ethernet12/1 12 40000 +Ethernet32 45,46,47,48 Ethernet13/1 13 40000 +Ethernet36 41,42,43,44 Ethernet14/1 14 40000 +Ethernet40 49,50,51,52 Ethernet15/1 15 40000 +Ethernet44 53,54,55,56 Ethernet16/1 16 40000 +Ethernet48 69,70,71,72 Ethernet17/1 17 40000 +Ethernet52 65,66,67,68 Ethernet18/1 18 40000 +Ethernet56 73,74,75,76 Ethernet19/1 19 40000 +Ethernet60 77,78,79,80 Ethernet20/1 20 40000 +Ethernet64 93,94,95,96 Ethernet21/1 21 40000 +Ethernet68 89,90,91,92 Ethernet22/1 22 40000 +Ethernet72 97,98,99,100 Ethernet23/1 23 40000 +Ethernet76 101,102,103,104 Ethernet24/1 24 40000 +Ethernet80 109,110,111,112 Ethernet25/1 25 40000 +Ethernet84 105,106,107,108 Ethernet26/1 26 40000 +Ethernet88 121,122,123,124 Ethernet27/1 27 40000 +Ethernet92 125,126,127,128 Ethernet28/1 28 40000 +Ethernet96 61,62,63,64 Ethernet29 29 40000 +Ethernet100 57,58,59,60 Ethernet30 30 40000 +Ethernet104 81,82,83,84 Ethernet31 31 40000 +Ethernet108 85,86,87,88 Ethernet32 32 40000 +Ethernet112 117,118,119,120 Ethernet33 33 40000 +Ethernet116 113,114,115,116 Ethernet34 34 40000 +Ethernet120 1,2,3,4 Ethernet35 35 40000 +Ethernet124 5,6,7,8 Ethernet36 36 40000 diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/qos.json.j2 b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/sai.profile b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/sai.profile new file mode 100644 index 00000000000..6479c4c14d3 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-qx32s-32x40G.config.bcm diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/td2-a7050-qx32s-32x40G.config.bcm b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/td2-a7050-qx32s-32x40G.config.bcm new file mode 100644 index 00000000000..3b1a4514409 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/td2-a7050-qx32s-32x40G.config.bcm @@ -0,0 +1,744 @@ +#/****************************************************************************** +# * +# * File: config.bcm.clearlake (7050-QX32S) +# * Name: +# * +# * Description: This file contains SDK properties for an Arista +# * Clearlake platform. +# * +# *----------------------------------------------------------------------------- +# ******************************************************************************/ +#################################################################### +# BCM Config file for Clearlake platform +# - 32x40g Portmode + +# ALPM enable +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 +l2_mem_entries=32768 +l3_mem_entries=16384 + +# From old config file +os=unix +higig2_hdr_mode=1 + +# Parity +parity_correction=1 +parity_enable=1 +stat_if_parity_enable=0 + +# l2 thread related config vars +l2xmsg_hostbuf_size=8192 +l2xmsg_mode=1 + +bcm_num_cos=8 +bcm_stat_interval=2000000 +lls_num_l2uc=12 +max_vp_lags=0 +miim_intr_enable=0 +mmu_lossless=0 +module_64ports=0 + +stable_size=0x2000000 + +schan_intr_enable=0 +tdma_timeout_usec=5000000 +tslam_timeout_usec=15000000 +cdma_timeout_usec=15000000 +dma_desc_timeout_usec=15000000 + +############################### +serdes_fiber_pref=1 +############################### +mdio_output_delay=0x0d +############################### +xgxs_lcpll_xtal_refclk=1 +tdma_intr_enable=1 +tslam_intr_enable=1 +table_dma_enable=1 + +pbmp_oversubscribe.0=0x1fffffffffffffffffffffffffe +pbmp_xport_xe.0=0x1fffffffffffffffffffffffffe +phy_an_c37_1.0=3 +phy_an_c37_5.0=3 +phy_an_c37_9.0=3 +phy_an_c37_13.0=3 +phy_an_c37_17.0=3 +phy_an_c37_21.0=3 +phy_an_c37_25.0=3 +phy_an_c37_29.0=3 +phy_an_c37_33.0=3 +phy_an_c37_37.0=3 +phy_an_c37_41.0=3 +phy_an_c37_45.0=3 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+port_phy_addr_103.0=0x7f +port_phy_addr_104.0=0x7f +portmap_1.0=9:40 +portmap_5.0=13:40 +portmap_9.0=17:40 +portmap_13.0=21:40 +portmap_17.0=29:40 +portmap_21.0=25:40 +portmap_25.0=33:40 +portmap_29.0=37:40 +portmap_33.0=45:40 +portmap_37.0=41:40 +portmap_41.0=49:40 +portmap_45.0=53:40 +portmap_49.0=69:40 +portmap_53.0=65:40 +portmap_57.0=73:40 +portmap_61.0=77:40 +portmap_65.0=93:40 +portmap_69.0=89:40 +portmap_73.0=97:40 +portmap_77.0=101:40 +portmap_81.0=109:40 +portmap_85.0=105:40 +portmap_89.0=121:40 +portmap_93.0=125:40 +portmap_97.0=61:40 +portmap_98.0=57:40 +portmap_99.0=81:40 +portmap_100.0=85:40 +portmap_101.0=117:40 +portmap_102.0=113:40 +portmap_103.0=1:40 +portmap_104.0=5:40 +serdes_firmware_mode_1.0=2 +serdes_firmware_mode_5.0=2 +serdes_firmware_mode_9.0=2 +serdes_firmware_mode_13.0=2 +serdes_firmware_mode_17.0=2 +serdes_firmware_mode_21.0=2 +serdes_firmware_mode_25.0=2 +serdes_firmware_mode_29.0=2 +serdes_firmware_mode_33.0=2 +serdes_firmware_mode_37.0=2 +serdes_firmware_mode_41.0=2 +serdes_firmware_mode_45.0=2 +serdes_firmware_mode_49.0=2 +serdes_firmware_mode_53.0=2 +serdes_firmware_mode_57.0=2 +serdes_firmware_mode_61.0=2 +serdes_firmware_mode_65.0=2 +serdes_firmware_mode_69.0=2 +serdes_firmware_mode_73.0=2 +serdes_firmware_mode_77.0=2 +serdes_firmware_mode_81.0=2 +serdes_firmware_mode_85.0=2 +serdes_firmware_mode_89.0=2 +serdes_firmware_mode_93.0=2 +serdes_firmware_mode_97.0=2 +serdes_firmware_mode_98.0=2 +serdes_firmware_mode_99.0=2 +serdes_firmware_mode_100.0=2 +serdes_firmware_mode_101.0=2 +serdes_firmware_mode_102.0=2 +serdes_firmware_mode_103.0=2 +serdes_firmware_mode_104.0=2 +xgxs_rx_lane_map_1.0=0x3210 +xgxs_rx_lane_map_5.0=0x0321 +xgxs_rx_lane_map_9.0=0x1302 +xgxs_rx_lane_map_13.0=0x0213 +xgxs_rx_lane_map_17.0=0x1302 +xgxs_rx_lane_map_21.0=0x1302 +xgxs_rx_lane_map_25.0=0x1302 +xgxs_rx_lane_map_29.0=0x0213 +xgxs_rx_lane_map_33.0=0x1302 +xgxs_rx_lane_map_37.0=0x1302 +xgxs_rx_lane_map_41.0=0x1302 +xgxs_rx_lane_map_45.0=0x0213 +xgxs_rx_lane_map_49.0=0x1302 +xgxs_rx_lane_map_53.0=0x1302 +xgxs_rx_lane_map_57.0=0x1302 +xgxs_rx_lane_map_61.0=0x0213 +xgxs_rx_lane_map_65.0=0x1302 +xgxs_rx_lane_map_69.0=0x1302 +xgxs_rx_lane_map_73.0=0x1302 +xgxs_rx_lane_map_77.0=0x0213 +xgxs_rx_lane_map_81.0=0x1302 +xgxs_rx_lane_map_85.0=0x1302 +xgxs_rx_lane_map_89.0=0x1302 +xgxs_rx_lane_map_93.0=0x0213 +xgxs_rx_lane_map_97.0=0x1302 +xgxs_rx_lane_map_98.0=0x1302 +xgxs_rx_lane_map_99.0=0x1302 +xgxs_rx_lane_map_100.0=0x0213 +xgxs_rx_lane_map_101.0=0x0213 +xgxs_rx_lane_map_102.0=0x1302 +xgxs_rx_lane_map_103.0=0x0123 +xgxs_rx_lane_map_104.0=0x2031 +xgxs_tx_lane_map_1.0=0x0123 +xgxs_tx_lane_map_5.0=0x0321 +xgxs_tx_lane_map_9.0=0x2031 +xgxs_tx_lane_map_13.0=0x0213 +xgxs_tx_lane_map_17.0=0x2031 +xgxs_tx_lane_map_21.0=0x2031 +xgxs_tx_lane_map_25.0=0x2031 +xgxs_tx_lane_map_29.0=0x0213 +xgxs_tx_lane_map_33.0=0x2031 +xgxs_tx_lane_map_37.0=0x2031 +xgxs_tx_lane_map_41.0=0x2031 +xgxs_tx_lane_map_45.0=0x0213 +xgxs_tx_lane_map_49.0=0x2031 +xgxs_tx_lane_map_53.0=0x2031 +xgxs_tx_lane_map_57.0=0x2031 +xgxs_tx_lane_map_61.0=0x0213 +xgxs_tx_lane_map_65.0=0x2031 +xgxs_tx_lane_map_69.0=0x2031 +xgxs_tx_lane_map_73.0=0x2031 +xgxs_tx_lane_map_77.0=0x0213 +xgxs_tx_lane_map_81.0=0x2031 +xgxs_tx_lane_map_85.0=0x2031 +xgxs_tx_lane_map_89.0=0x2031 +xgxs_tx_lane_map_93.0=0x0213 +xgxs_tx_lane_map_97.0=0x2031 +xgxs_tx_lane_map_98.0=0x2031 +xgxs_tx_lane_map_99.0=0x2031 +xgxs_tx_lane_map_100.0=0x0213 +xgxs_tx_lane_map_101.0=0x0213 +xgxs_tx_lane_map_102.0=0x2031 +xgxs_tx_lane_map_103.0=0x3120 +xgxs_tx_lane_map_104.0=0x1302 + +# tuning parameters +serdes_preemphasis_lane0_1.0=0x81f7 +serdes_preemphasis_lane1_1.0=0x81f7 +serdes_preemphasis_lane2_1.0=0x81f7 +serdes_preemphasis_lane3_1.0=0x81f7 +serdes_pre_driver_current_lane0_5.0=0x7 +serdes_driver_current_lane0_5.0=0x7 +serdes_preemphasis_lane0_5.0=0xc2f0 +serdes_pre_driver_current_lane1_5.0=0x7 +serdes_driver_current_lane1_5.0=0x7 +serdes_preemphasis_lane1_5.0=0xc2f0 +serdes_pre_driver_current_lane2_5.0=0x7 +serdes_driver_current_lane2_5.0=0x7 +serdes_preemphasis_lane2_5.0=0xc2f0 +serdes_pre_driver_current_lane3_5.0=0x7 +serdes_driver_current_lane3_5.0=0x7 +serdes_preemphasis_lane3_5.0=0xc2f0 +serdes_pre_driver_current_lane0_9.0=0x7 +serdes_driver_current_lane0_9.0=0x7 +serdes_preemphasis_lane0_9.0=0xbb10 +serdes_pre_driver_current_lane1_9.0=0x7 +serdes_driver_current_lane1_9.0=0x7 +serdes_preemphasis_lane1_9.0=0xbb10 +serdes_pre_driver_current_lane2_9.0=0x7 +serdes_driver_current_lane2_9.0=0x7 +serdes_preemphasis_lane2_9.0=0xbb10 +serdes_pre_driver_current_lane3_9.0=0x7 +serdes_driver_current_lane3_9.0=0x7 +serdes_preemphasis_lane3_9.0=0xbb10 +serdes_pre_driver_current_lane0_13.0=0x7 +serdes_driver_current_lane0_13.0=0x7 +serdes_preemphasis_lane0_13.0=0xbb10 +serdes_pre_driver_current_lane1_13.0=0x7 +serdes_driver_current_lane1_13.0=0x7 +serdes_preemphasis_lane1_13.0=0xbb10 +serdes_pre_driver_current_lane2_13.0=0x7 +serdes_driver_current_lane2_13.0=0x7 +serdes_preemphasis_lane2_13.0=0xbb10 +serdes_pre_driver_current_lane3_13.0=0x7 +serdes_driver_current_lane3_13.0=0x7 +serdes_preemphasis_lane3_13.0=0xbb10 +serdes_pre_driver_current_lane0_17.0=0x6 +serdes_driver_current_lane0_17.0=0x6 +serdes_preemphasis_lane0_17.0=0xb720 +serdes_pre_driver_current_lane1_17.0=0x6 +serdes_driver_current_lane1_17.0=0x6 +serdes_preemphasis_lane1_17.0=0xb720 +serdes_pre_driver_current_lane2_17.0=0x6 +serdes_driver_current_lane2_17.0=0x6 +serdes_preemphasis_lane2_17.0=0xb720 +serdes_pre_driver_current_lane3_17.0=0x6 +serdes_driver_current_lane3_17.0=0x6 +serdes_preemphasis_lane3_17.0=0xb720 +serdes_pre_driver_current_lane0_21.0=0x7 +serdes_driver_current_lane0_21.0=0x7 +serdes_preemphasis_lane0_21.0=0xbb10 +serdes_pre_driver_current_lane1_21.0=0x7 +serdes_driver_current_lane1_21.0=0x7 +serdes_preemphasis_lane1_21.0=0xbb10 +serdes_pre_driver_current_lane2_21.0=0x7 +serdes_driver_current_lane2_21.0=0x7 +serdes_preemphasis_lane2_21.0=0xbb10 +serdes_pre_driver_current_lane3_21.0=0x7 +serdes_driver_current_lane3_21.0=0x7 +serdes_preemphasis_lane3_21.0=0xbb10 +serdes_pre_driver_current_lane0_25.0=0x5 +serdes_driver_current_lane0_25.0=0x5 +serdes_preemphasis_lane0_25.0=0xb720 +serdes_pre_driver_current_lane1_25.0=0x5 +serdes_driver_current_lane1_25.0=0x5 +serdes_preemphasis_lane1_25.0=0xb720 +serdes_pre_driver_current_lane2_25.0=0x5 +serdes_driver_current_lane2_25.0=0x5 +serdes_preemphasis_lane2_25.0=0xb720 +serdes_pre_driver_current_lane3_25.0=0x5 +serdes_driver_current_lane3_25.0=0x5 +serdes_preemphasis_lane3_25.0=0xb720 +serdes_pre_driver_current_lane0_29.0=0x5 +serdes_driver_current_lane0_29.0=0x5 +serdes_preemphasis_lane0_29.0=0xb720 +serdes_pre_driver_current_lane1_29.0=0x5 +serdes_driver_current_lane1_29.0=0x5 +serdes_preemphasis_lane1_29.0=0xb720 +serdes_pre_driver_current_lane2_29.0=0x5 +serdes_driver_current_lane2_29.0=0x5 +serdes_preemphasis_lane2_29.0=0xb720 +serdes_pre_driver_current_lane3_29.0=0x5 +serdes_driver_current_lane3_29.0=0x5 +serdes_preemphasis_lane3_29.0=0xb720 +serdes_pre_driver_current_lane0_33.0=0x4 +serdes_driver_current_lane0_33.0=0x4 +serdes_preemphasis_lane0_33.0=0xb720 +serdes_pre_driver_current_lane1_33.0=0x4 +serdes_driver_current_lane1_33.0=0x4 +serdes_preemphasis_lane1_33.0=0xb720 +serdes_pre_driver_current_lane2_33.0=0x4 +serdes_driver_current_lane2_33.0=0x4 +serdes_preemphasis_lane2_33.0=0xb720 +serdes_pre_driver_current_lane3_33.0=0x4 +serdes_driver_current_lane3_33.0=0x4 +serdes_preemphasis_lane3_33.0=0xb720 +serdes_pre_driver_current_lane0_37.0=0x5 +serdes_driver_current_lane0_37.0=0x5 +serdes_preemphasis_lane0_37.0=0xb720 +serdes_pre_driver_current_lane1_37.0=0x5 +serdes_driver_current_lane1_37.0=0x5 +serdes_preemphasis_lane1_37.0=0xb720 +serdes_pre_driver_current_lane2_37.0=0x5 +serdes_driver_current_lane2_37.0=0x5 +serdes_preemphasis_lane2_37.0=0xb720 +serdes_pre_driver_current_lane3_37.0=0x5 +serdes_driver_current_lane3_37.0=0x5 +serdes_preemphasis_lane3_37.0=0xb720 +serdes_pre_driver_current_lane0_41.0=0x3 +serdes_driver_current_lane0_41.0=0x3 +serdes_preemphasis_lane0_41.0=0xb330 +serdes_pre_driver_current_lane1_41.0=0x3 +serdes_driver_current_lane1_41.0=0x3 +serdes_preemphasis_lane1_41.0=0xb330 +serdes_pre_driver_current_lane2_41.0=0x3 +serdes_driver_current_lane2_41.0=0x3 +serdes_preemphasis_lane2_41.0=0xb330 +serdes_pre_driver_current_lane3_41.0=0x3 +serdes_driver_current_lane3_41.0=0x3 +serdes_preemphasis_lane3_41.0=0xb330 +serdes_pre_driver_current_lane0_45.0=0x4 +serdes_driver_current_lane0_45.0=0x4 +serdes_preemphasis_lane0_45.0=0xb720 +serdes_pre_driver_current_lane1_45.0=0x4 +serdes_driver_current_lane1_45.0=0x4 +serdes_preemphasis_lane1_45.0=0xb720 +serdes_pre_driver_current_lane2_45.0=0x4 +serdes_driver_current_lane2_45.0=0x4 +serdes_preemphasis_lane2_45.0=0xb720 +serdes_pre_driver_current_lane3_45.0=0x4 +serdes_driver_current_lane3_45.0=0x4 +serdes_preemphasis_lane3_45.0=0xb720 +serdes_pre_driver_current_lane0_49.0=0x3 +serdes_driver_current_lane0_49.0=0x3 +serdes_preemphasis_lane0_49.0=0xb330 +serdes_pre_driver_current_lane1_49.0=0x3 +serdes_driver_current_lane1_49.0=0x3 +serdes_preemphasis_lane1_49.0=0xb330 +serdes_pre_driver_current_lane2_49.0=0x3 +serdes_driver_current_lane2_49.0=0x3 +serdes_preemphasis_lane2_49.0=0xb330 +serdes_pre_driver_current_lane3_49.0=0x3 +serdes_driver_current_lane3_49.0=0x3 +serdes_preemphasis_lane3_49.0=0xb330 +serdes_pre_driver_current_lane0_53.0=0x4 +serdes_driver_current_lane0_53.0=0x4 +serdes_preemphasis_lane0_53.0=0xb720 +serdes_pre_driver_current_lane1_53.0=0x4 +serdes_driver_current_lane1_53.0=0x4 +serdes_preemphasis_lane1_53.0=0xb720 +serdes_pre_driver_current_lane2_53.0=0x4 +serdes_driver_current_lane2_53.0=0x4 +serdes_preemphasis_lane2_53.0=0xb720 +serdes_pre_driver_current_lane3_53.0=0x4 +serdes_driver_current_lane3_53.0=0x4 +serdes_preemphasis_lane3_53.0=0xb720 +serdes_pre_driver_current_lane0_57.0=0x3 +serdes_driver_current_lane0_57.0=0x3 +serdes_preemphasis_lane0_57.0=0xb330 +serdes_pre_driver_current_lane1_57.0=0x3 +serdes_driver_current_lane1_57.0=0x3 +serdes_preemphasis_lane1_57.0=0xb330 +serdes_pre_driver_current_lane2_57.0=0x3 +serdes_driver_current_lane2_57.0=0x3 +serdes_preemphasis_lane2_57.0=0xb330 +serdes_pre_driver_current_lane3_57.0=0x3 +serdes_driver_current_lane3_57.0=0x3 +serdes_preemphasis_lane3_57.0=0xb330 +serdes_pre_driver_current_lane0_61.0=0x4 +serdes_driver_current_lane0_61.0=0x4 +serdes_preemphasis_lane0_61.0=0xb720 +serdes_pre_driver_current_lane1_61.0=0x4 +serdes_driver_current_lane1_61.0=0x4 +serdes_preemphasis_lane1_61.0=0xb720 +serdes_pre_driver_current_lane2_61.0=0x4 +serdes_driver_current_lane2_61.0=0x4 +serdes_preemphasis_lane2_61.0=0xb720 +serdes_pre_driver_current_lane3_61.0=0x4 +serdes_driver_current_lane3_61.0=0x4 +serdes_preemphasis_lane3_61.0=0xb720 +serdes_pre_driver_current_lane0_65.0=0x4 +serdes_driver_current_lane0_65.0=0x4 +serdes_preemphasis_lane0_65.0=0xb720 +serdes_pre_driver_current_lane1_65.0=0x4 +serdes_driver_current_lane1_65.0=0x4 +serdes_preemphasis_lane1_65.0=0xb720 +serdes_pre_driver_current_lane2_65.0=0x4 +serdes_driver_current_lane2_65.0=0x4 +serdes_preemphasis_lane2_65.0=0xb720 +serdes_pre_driver_current_lane3_65.0=0x4 +serdes_driver_current_lane3_65.0=0x4 +serdes_preemphasis_lane3_65.0=0xb720 +serdes_pre_driver_current_lane0_69.0=0x4 +serdes_driver_current_lane0_69.0=0x4 +serdes_preemphasis_lane0_69.0=0xb720 +serdes_pre_driver_current_lane1_69.0=0x4 +serdes_driver_current_lane1_69.0=0x4 +serdes_preemphasis_lane1_69.0=0xb720 +serdes_pre_driver_current_lane2_69.0=0x4 +serdes_driver_current_lane2_69.0=0x4 +serdes_preemphasis_lane2_69.0=0xb720 +serdes_pre_driver_current_lane3_69.0=0x4 +serdes_driver_current_lane3_69.0=0x4 +serdes_preemphasis_lane3_69.0=0xb720 +serdes_pre_driver_current_lane0_73.0=0x4 +serdes_driver_current_lane0_73.0=0x4 +serdes_preemphasis_lane0_73.0=0xb720 +serdes_pre_driver_current_lane1_73.0=0x4 +serdes_driver_current_lane1_73.0=0x4 +serdes_preemphasis_lane1_73.0=0xb720 +serdes_pre_driver_current_lane2_73.0=0x4 +serdes_driver_current_lane2_73.0=0x4 +serdes_preemphasis_lane2_73.0=0xb720 +serdes_pre_driver_current_lane3_73.0=0x4 +serdes_driver_current_lane3_73.0=0x4 +serdes_preemphasis_lane3_73.0=0xb720 +serdes_pre_driver_current_lane0_77.0=0x5 +serdes_driver_current_lane0_77.0=0x5 +serdes_preemphasis_lane0_77.0=0xb720 +serdes_pre_driver_current_lane1_77.0=0x5 +serdes_driver_current_lane1_77.0=0x5 +serdes_preemphasis_lane1_77.0=0xb720 +serdes_pre_driver_current_lane2_77.0=0x5 +serdes_driver_current_lane2_77.0=0x5 +serdes_preemphasis_lane2_77.0=0xb720 +serdes_pre_driver_current_lane3_77.0=0x5 +serdes_driver_current_lane3_77.0=0x5 +serdes_preemphasis_lane3_77.0=0xb720 +serdes_pre_driver_current_lane0_81.0=0x5 +serdes_driver_current_lane0_81.0=0x5 +serdes_preemphasis_lane0_81.0=0xb720 +serdes_pre_driver_current_lane1_81.0=0x5 +serdes_driver_current_lane1_81.0=0x5 +serdes_preemphasis_lane1_81.0=0xb720 +serdes_pre_driver_current_lane2_81.0=0x5 +serdes_driver_current_lane2_81.0=0x5 +serdes_preemphasis_lane2_81.0=0xb720 +serdes_pre_driver_current_lane3_81.0=0x5 +serdes_driver_current_lane3_81.0=0x5 +serdes_preemphasis_lane3_81.0=0xb720 +serdes_pre_driver_current_lane0_85.0=0x5 +serdes_driver_current_lane0_85.0=0x5 +serdes_preemphasis_lane0_85.0=0xb720 +serdes_pre_driver_current_lane1_85.0=0x5 +serdes_driver_current_lane1_85.0=0x5 +serdes_preemphasis_lane1_85.0=0xb720 +serdes_pre_driver_current_lane2_85.0=0x5 +serdes_driver_current_lane2_85.0=0x5 +serdes_preemphasis_lane2_85.0=0xb720 +serdes_pre_driver_current_lane3_85.0=0x5 +serdes_driver_current_lane3_85.0=0x5 +serdes_preemphasis_lane3_85.0=0xb720 +serdes_pre_driver_current_lane0_89.0=0x6 +serdes_driver_current_lane0_89.0=0x6 +serdes_preemphasis_lane0_89.0=0xb720 +serdes_pre_driver_current_lane1_89.0=0x6 +serdes_driver_current_lane1_89.0=0x6 +serdes_preemphasis_lane1_89.0=0xb720 +serdes_pre_driver_current_lane2_89.0=0x6 +serdes_driver_current_lane2_89.0=0x6 +serdes_preemphasis_lane2_89.0=0xb720 +serdes_pre_driver_current_lane3_89.0=0x6 +serdes_driver_current_lane3_89.0=0x6 +serdes_preemphasis_lane3_89.0=0xb720 +serdes_pre_driver_current_lane0_93.0=0x7 +serdes_driver_current_lane0_93.0=0x7 +serdes_preemphasis_lane0_93.0=0xbb10 +serdes_pre_driver_current_lane1_93.0=0x7 +serdes_driver_current_lane1_93.0=0x7 +serdes_preemphasis_lane1_93.0=0xbb10 +serdes_pre_driver_current_lane2_93.0=0x7 +serdes_driver_current_lane2_93.0=0x7 +serdes_preemphasis_lane2_93.0=0xbb10 +serdes_pre_driver_current_lane3_93.0=0x7 +serdes_driver_current_lane3_93.0=0x7 +serdes_preemphasis_lane3_93.0=0xbb10 +serdes_pre_driver_current_lane0_97.0=0x5 +serdes_driver_current_lane0_97.0=0x5 +serdes_preemphasis_lane0_97.0=0xb720 +serdes_pre_driver_current_lane1_97.0=0x5 +serdes_driver_current_lane1_97.0=0x5 +serdes_preemphasis_lane1_97.0=0xb720 +serdes_pre_driver_current_lane2_97.0=0x5 +serdes_driver_current_lane2_97.0=0x5 +serdes_preemphasis_lane2_97.0=0xb720 +serdes_pre_driver_current_lane3_97.0=0x5 +serdes_driver_current_lane3_97.0=0x5 +serdes_preemphasis_lane3_97.0=0xb720 +serdes_pre_driver_current_lane0_98.0=0x6 +serdes_driver_current_lane0_98.0=0x6 +serdes_preemphasis_lane0_98.0=0xb720 +serdes_pre_driver_current_lane1_98.0=0x6 +serdes_driver_current_lane1_98.0=0x6 +serdes_preemphasis_lane1_98.0=0xb720 +serdes_pre_driver_current_lane2_98.0=0x6 +serdes_driver_current_lane2_98.0=0x6 +serdes_preemphasis_lane2_98.0=0xb720 +serdes_pre_driver_current_lane3_98.0=0x6 +serdes_driver_current_lane3_98.0=0x6 +serdes_preemphasis_lane3_98.0=0xb720 +serdes_pre_driver_current_lane0_99.0=0x5 +serdes_driver_current_lane0_99.0=0x5 +serdes_preemphasis_lane0_99.0=0xb720 +serdes_pre_driver_current_lane1_99.0=0x5 +serdes_driver_current_lane1_99.0=0x5 +serdes_preemphasis_lane1_99.0=0xb720 +serdes_pre_driver_current_lane2_99.0=0x5 +serdes_driver_current_lane2_99.0=0x5 +serdes_preemphasis_lane2_99.0=0xb720 +serdes_pre_driver_current_lane3_99.0=0x5 +serdes_driver_current_lane3_99.0=0x5 +serdes_preemphasis_lane3_99.0=0xb720 +serdes_pre_driver_current_lane0_100.0=0x7 +serdes_driver_current_lane0_100.0=0x7 +serdes_preemphasis_lane0_100.0=0xbb10 +serdes_pre_driver_current_lane1_100.0=0x7 +serdes_driver_current_lane1_100.0=0x7 +serdes_preemphasis_lane1_100.0=0xbb10 +serdes_pre_driver_current_lane2_100.0=0x7 +serdes_driver_current_lane2_100.0=0x7 +serdes_preemphasis_lane2_100.0=0xbb10 +serdes_pre_driver_current_lane3_100.0=0x7 +serdes_driver_current_lane3_100.0=0x7 +serdes_preemphasis_lane3_100.0=0xbb10 +serdes_pre_driver_current_lane0_101.0=0x7 +serdes_driver_current_lane0_101.0=0x7 +serdes_preemphasis_lane0_101.0=0xbb10 +serdes_pre_driver_current_lane1_101.0=0x7 +serdes_driver_current_lane1_101.0=0x7 +serdes_preemphasis_lane1_101.0=0xbb10 +serdes_pre_driver_current_lane2_101.0=0x7 +serdes_driver_current_lane2_101.0=0x7 +serdes_preemphasis_lane2_101.0=0xbb10 +serdes_pre_driver_current_lane3_101.0=0x7 +serdes_driver_current_lane3_101.0=0x7 +serdes_preemphasis_lane3_101.0=0xbb10 +serdes_pre_driver_current_lane0_102.0=0x7 +serdes_driver_current_lane0_102.0=0x7 +serdes_preemphasis_lane0_102.0=0xbb10 +serdes_pre_driver_current_lane1_102.0=0x7 +serdes_driver_current_lane1_102.0=0x7 +serdes_preemphasis_lane1_102.0=0xbb10 +serdes_pre_driver_current_lane2_102.0=0x7 +serdes_driver_current_lane2_102.0=0x7 +serdes_preemphasis_lane2_102.0=0xbb10 +serdes_pre_driver_current_lane3_102.0=0x7 +serdes_driver_current_lane3_102.0=0x7 +serdes_preemphasis_lane3_102.0=0xbb10 +serdes_preemphasis_lane0_103.0=0x81f4 +serdes_preemphasis_lane1_103.0=0x81f4 +serdes_preemphasis_lane2_103.0=0x81f4 +serdes_preemphasis_lane3_103.0=0x81f4 +serdes_preemphasis_lane0_104.0=0x81f5 +serdes_preemphasis_lane1_104.0=0x81f5 +serdes_preemphasis_lane2_104.0=0x81f5 +serdes_preemphasis_lane3_104.0=0x81f5 diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/buffers.json.j2 b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/buffers.json.j2 new file mode 100644 index 00000000000..b67cf577ab7 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..f72e3eb06fb --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/buffers_defaults_t1.j2 @@ -0,0 +1,49 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% if PORT_ALL.append("Ethernet0") %}{% endif %} + {% if PORT_ALL.append("Ethernet1") %}{% endif %} + {% if PORT_ALL.append("Ethernet2") %}{% endif %} + {% if PORT_ALL.append("Ethernet3") %}{% endif %} + {% for port_idx in range(1,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "8072396", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku-init b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku-init new file mode 100755 index 00000000000..ffc913582aa --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku-init @@ -0,0 +1,3 @@ +#!/bin/bash + +echo 1 > /sys/devices/pci0000:00/0000:00:02.2/0000:02:00.0/mux diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/pg_profile_lookup.ini b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/pg_profile_lookup.ini new file mode 100644 index 00000000000..f961fd33b13 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/pg_profile_lookup.ini @@ -0,0 +1,14 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 41808 18432 40560 -4 2496 + 40000 5m 41808 18432 40560 -4 2496 + 50000 5m 41808 18432 40560 -4 2496 + 100000 5m 41808 18432 40560 -4 2496 + 10000 40m 41808 18432 40560 -4 2496 + 40000 40m 41808 18432 40560 -4 2496 + 50000 40m 41808 18432 40560 -4 2496 + 100000 40m 41808 18432 40560 -4 2496 + 10000 300m 41808 18432 40560 -4 2496 + 40000 300m 41808 18432 40560 -4 2496 + 50000 300m 41808 18432 40560 -4 2496 + 100000 300m 41808 18432 40560 -4 2496 diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/port_config.ini b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/port_config.ini new file mode 100644 index 00000000000..dafdb570e9c --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/port_config.ini @@ -0,0 +1,36 @@ +# name lanes alias index +Ethernet0 9 Ethernet1 1 +Ethernet1 10 Ethernet2 2 +Ethernet2 11 Ethernet3 3 +Ethernet3 12 Ethernet4 4 +Ethernet4 13,14,15,16 Ethernet6/1 6 +Ethernet8 17,18,19,20 Ethernet7/1 7 +Ethernet12 21,22,23,24 Ethernet8/1 8 +Ethernet16 29,30,31,32 Ethernet9/1 9 +Ethernet20 25,26,27,28 Ethernet10/1 10 +Ethernet24 33,34,35,36 Ethernet11/1 11 +Ethernet28 37,38,39,40 Ethernet12/1 12 +Ethernet32 45,46,47,48 Ethernet13/1 13 +Ethernet36 41,42,43,44 Ethernet14/1 14 +Ethernet40 49,50,51,52 Ethernet15/1 15 +Ethernet44 53,54,55,56 Ethernet16/1 16 +Ethernet48 69,70,71,72 Ethernet17/1 17 +Ethernet52 65,66,67,68 Ethernet18/1 18 +Ethernet56 73,74,75,76 Ethernet19/1 19 +Ethernet60 77,78,79,80 Ethernet20/1 20 +Ethernet64 93,94,95,96 Ethernet21/1 21 +Ethernet68 89,90,91,92 Ethernet22/1 22 +Ethernet72 97,98,99,100 Ethernet23/1 23 +Ethernet76 101,102,103,104 Ethernet24/1 24 +Ethernet80 109,110,111,112 Ethernet25/1 25 +Ethernet84 105,106,107,108 Ethernet26/1 26 +Ethernet88 121,122,123,124 Ethernet27/1 27 +Ethernet92 125,126,127,128 Ethernet28/1 28 +Ethernet96 61,62,63,64 Ethernet29 29 +Ethernet100 57,58,59,60 Ethernet30 30 +Ethernet104 81,82,83,84 Ethernet31 31 +Ethernet108 85,86,87,88 Ethernet32 32 +Ethernet112 117,118,119,120 Ethernet33 33 +Ethernet116 113,114,115,116 Ethernet34 34 +Ethernet120 1,2,3,4 Ethernet35 35 +Ethernet124 5,6,7,8 Ethernet36 36 diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/qos.json.j2 b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/qos.json.j2 new file mode 100644 index 00000000000..1accac3ddd0 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/qos.json.j2 @@ -0,0 +1,148 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable": "3,4" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"312000", + "red_min_threshold":"104000", + "yellow_max_threshold":"312000", + "yellow_min_threshold":"104000", + "green_max_threshold":"312000", + "green_min_threshold":"104000" + } + }, + "QUEUE": { + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]" + }, + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|3" : { + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|4" : { + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0" : { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|1" : { + "scheduler" : "[SCHEDULER|scheduler.2]" + } + } +} diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/sai.profile b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/sai.profile new file mode 100644 index 00000000000..9a50433cabd --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-q31s4-31x40G-4x10G.config.bcm diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/td2-a7050-q31s4-31x40G-4x10G.config.bcm b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/td2-a7050-q31s4-31x40G-4x10G.config.bcm new file mode 100644 index 00000000000..4819c7929ec --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/td2-a7050-q31s4-31x40G-4x10G.config.bcm @@ -0,0 +1,675 @@ +arl_clean_timeout_usec=15000000 +bcm_num_cos.0=8 +bcm_stat_flags=1 +bcm_stat_jumbo.0=9236 +cdma_timeout_usec.0=15000000 +dma_desc_timeout_usec.0=15000000 +higig2_hdr_mode.0=1 +ipv6_lpm_128b_enable.0=2 +l2xmsg_mode.0=1 +max_vp_lags.0=0 +mdio_output_delay=0x0d +miim_intr_enable.0=0 +module_64ports.0=0 +os=unix +pbmp_oversubscribe.0=0x1fffffffffffffffffffffffffe +pbmp_xport_xe.0=0x1fffffffffffffffffffffffffe +phy_an_c37_1.0=3 +phy_an_c37_5.0=3 +phy_an_c37_9.0=3 +phy_an_c37_13.0=3 +phy_an_c37_17.0=3 +phy_an_c37_21.0=3 +phy_an_c37_25.0=3 +phy_an_c37_29.0=3 +phy_an_c37_33.0=3 +phy_an_c37_37.0=3 +phy_an_c37_41.0=3 +phy_an_c37_45.0=3 +phy_an_c37_49.0=3 +phy_an_c37_53.0=3 +phy_an_c37_57.0=3 +phy_an_c37_61.0=3 +phy_an_c37_65.0=3 +phy_an_c37_69.0=3 +phy_an_c37_73.0=3 +phy_an_c37_77.0=3 +phy_an_c37_81.0=3 +phy_an_c37_85.0=3 +phy_an_c37_89.0=3 +phy_an_c37_93.0=3 +phy_an_c37_97.0=0 +phy_an_c37_98.0=0 +phy_an_c37_99.0=0 +phy_an_c37_100.0=0 +phy_an_c37_101.0=0 +phy_an_c37_102.0=0 +phy_an_c37_103.0=0 +phy_an_c37_104.0=0 +phy_an_c73_1.0=0 +phy_an_c73_5.0=0 +phy_an_c73_9.0=0 +phy_an_c73_13.0=0 +phy_an_c73_17.0=0 +phy_an_c73_21.0=0 +phy_an_c73_25.0=0 +phy_an_c73_29.0=0 +phy_an_c73_33.0=0 +phy_an_c73_37.0=0 +phy_an_c73_41.0=0 +phy_an_c73_45.0=0 +phy_an_c73_49.0=0 +phy_an_c73_53.0=0 +phy_an_c73_57.0=0 +phy_an_c73_61.0=0 +phy_an_c73_65.0=0 +phy_an_c73_69.0=0 +phy_an_c73_73.0=0 +phy_an_c73_77.0=0 +phy_an_c73_81.0=0 +phy_an_c73_85.0=0 +phy_an_c73_89.0=0 +phy_an_c73_93.0=0 +phy_an_c73_97.0=2 +phy_an_c73_98.0=2 +phy_an_c73_99.0=2 +phy_an_c73_100.0=2 +phy_an_c73_101.0=2 +phy_an_c73_102.0=2 +phy_an_c73_103.0=2 +phy_an_c73_104.0=2 +phy_xaui_rx_polarity_flip_1.0=0x0 +phy_xaui_rx_polarity_flip_5.0=0x0 +phy_xaui_rx_polarity_flip_9.0=0x4 +phy_xaui_rx_polarity_flip_13.0=0x0 +phy_xaui_rx_polarity_flip_17.0=0xb +phy_xaui_rx_polarity_flip_21.0=0x3 +phy_xaui_rx_polarity_flip_25.0=0xb +phy_xaui_rx_polarity_flip_29.0=0xf +phy_xaui_rx_polarity_flip_33.0=0xb +phy_xaui_rx_polarity_flip_37.0=0x3 +phy_xaui_rx_polarity_flip_41.0=0xb +phy_xaui_rx_polarity_flip_45.0=0x0 +phy_xaui_rx_polarity_flip_49.0=0x4 +phy_xaui_rx_polarity_flip_53.0=0xc +phy_xaui_rx_polarity_flip_57.0=0x4 +phy_xaui_rx_polarity_flip_61.0=0x0 +phy_xaui_rx_polarity_flip_65.0=0xb +phy_xaui_rx_polarity_flip_69.0=0x3 +phy_xaui_rx_polarity_flip_73.0=0xb +phy_xaui_rx_polarity_flip_77.0=0xf +phy_xaui_rx_polarity_flip_81.0=0xb +phy_xaui_rx_polarity_flip_85.0=0x3 +phy_xaui_rx_polarity_flip_89.0=0x4 +phy_xaui_rx_polarity_flip_93.0=0x0 +phy_xaui_rx_polarity_flip_97.0=0xb +phy_xaui_rx_polarity_flip_98.0=0x3 +phy_xaui_rx_polarity_flip_99.0=0x4 +phy_xaui_rx_polarity_flip_100.0=0x0 +phy_xaui_rx_polarity_flip_101.0=0x0 +phy_xaui_rx_polarity_flip_102.0=0xe +phy_xaui_rx_polarity_flip_103.0=0x0 +phy_xaui_rx_polarity_flip_104.0=0x0 +phy_xaui_tx_polarity_flip_1.0=0x0 +phy_xaui_tx_polarity_flip_5.0=0x0 +phy_xaui_tx_polarity_flip_9.0=0x2 +phy_xaui_tx_polarity_flip_13.0=0x0 +phy_xaui_tx_polarity_flip_17.0=0xd +phy_xaui_tx_polarity_flip_21.0=0xc +phy_xaui_tx_polarity_flip_25.0=0xd +phy_xaui_tx_polarity_flip_29.0=0xf +phy_xaui_tx_polarity_flip_33.0=0xd +phy_xaui_tx_polarity_flip_37.0=0xc +phy_xaui_tx_polarity_flip_41.0=0xd +phy_xaui_tx_polarity_flip_45.0=0x0 +phy_xaui_tx_polarity_flip_49.0=0x2 +phy_xaui_tx_polarity_flip_53.0=0x3 +phy_xaui_tx_polarity_flip_57.0=0x2 +phy_xaui_tx_polarity_flip_61.0=0x0 +phy_xaui_tx_polarity_flip_65.0=0xd +phy_xaui_tx_polarity_flip_69.0=0xc +phy_xaui_tx_polarity_flip_73.0=0xd +phy_xaui_tx_polarity_flip_77.0=0xf +phy_xaui_tx_polarity_flip_81.0=0xd +phy_xaui_tx_polarity_flip_85.0=0xc +phy_xaui_tx_polarity_flip_89.0=0x2 +phy_xaui_tx_polarity_flip_93.0=0x0 +phy_xaui_tx_polarity_flip_97.0=0xd +phy_xaui_tx_polarity_flip_98.0=0xc +phy_xaui_tx_polarity_flip_99.0=0x2 +phy_xaui_tx_polarity_flip_100.0=0x0 +phy_xaui_tx_polarity_flip_101.0=0x0 +phy_xaui_tx_polarity_flip_102.0=0x7 +phy_xaui_tx_polarity_flip_103.0=0x2 +phy_xaui_tx_polarity_flip_104.0=0x0 +port_init_autoneg_1.0=0 +port_init_autoneg_5.0=0 +port_init_autoneg_9.0=0 +port_init_autoneg_13.0=0 +port_init_autoneg_17.0=0 +port_init_autoneg_21.0=0 +port_init_autoneg_25.0=0 +port_init_autoneg_29.0=0 +port_init_autoneg_33.0=0 +port_init_autoneg_37.0=0 +port_init_autoneg_41.0=0 +port_init_autoneg_45.0=0 +port_init_autoneg_49.0=0 +port_init_autoneg_53.0=0 +port_init_autoneg_57.0=0 +port_init_autoneg_61.0=0 +port_init_autoneg_65.0=0 +port_init_autoneg_69.0=0 +port_init_autoneg_73.0=0 +port_init_autoneg_77.0=0 +port_init_autoneg_81.0=0 +port_init_autoneg_85.0=0 +port_init_autoneg_89.0=0 +port_init_autoneg_93.0=0 +port_init_autoneg_97.0=0 +port_init_autoneg_98.0=0 +port_init_autoneg_99.0=0 +port_init_autoneg_100.0=0 +port_init_autoneg_101.0=0 +port_init_autoneg_102.0=0 +port_init_autoneg_103.0=0 +port_init_autoneg_104.0=0 +port_init_cl72.0=0 +portmap_1.0=9:10 +portmap_2.0=10:10 +portmap_3.0=11:10 +portmap_4.0=12:10 +portmap_5.0=13:40 +portmap_9.0=17:40 +portmap_13.0=21:40 +portmap_17.0=29:40 +portmap_21.0=25:40 +portmap_25.0=33:40 +portmap_29.0=37:40 +portmap_33.0=45:40 +portmap_37.0=41:40 +portmap_41.0=49:40 +portmap_45.0=53:40 +portmap_49.0=69:40 +portmap_53.0=65:40 +portmap_57.0=73:40 +portmap_61.0=77:40 +portmap_65.0=93:40 +portmap_69.0=89:40 +portmap_73.0=97:40 +portmap_77.0=101:40 +portmap_81.0=109:40 +portmap_85.0=105:40 +portmap_89.0=121:40 +portmap_93.0=125:40 +portmap_97.0=61:40 +portmap_98.0=57:40 +portmap_99.0=81:40 +portmap_100.0=85:40 +portmap_101.0=117:40 +portmap_102.0=113:40 +portmap_103.0=1:40 +portmap_104.0=5:40 +schan_intr_enable=0 +serdes_firmware_mode_1.0=2 +serdes_firmware_mode_5.0=2 +serdes_firmware_mode_9.0=2 +serdes_firmware_mode_13.0=2 +serdes_firmware_mode_17.0=2 +serdes_firmware_mode_21.0=2 +serdes_firmware_mode_25.0=2 +serdes_firmware_mode_29.0=2 +serdes_firmware_mode_33.0=2 +serdes_firmware_mode_37.0=2 +serdes_firmware_mode_41.0=2 +serdes_firmware_mode_45.0=2 +serdes_firmware_mode_49.0=2 +serdes_firmware_mode_53.0=2 +serdes_firmware_mode_57.0=2 +serdes_firmware_mode_61.0=2 +serdes_firmware_mode_65.0=2 +serdes_firmware_mode_69.0=2 +serdes_firmware_mode_73.0=2 +serdes_firmware_mode_77.0=2 +serdes_firmware_mode_81.0=2 +serdes_firmware_mode_85.0=2 +serdes_firmware_mode_89.0=2 +serdes_firmware_mode_93.0=2 +serdes_firmware_mode_97.0=2 +serdes_firmware_mode_98.0=2 +serdes_firmware_mode_99.0=2 +serdes_firmware_mode_100.0=2 +serdes_firmware_mode_101.0=2 +serdes_firmware_mode_102.0=2 +serdes_firmware_mode_103.0=2 +serdes_firmware_mode_104.0=2 +stable_size=0x2000000 +tdma_timeout_usec.0=15000000 +tslam_timeout_usec.0=15000000 +xgxs_lcpll_xtal_refclk.0=1 +xgxs_rx_lane_map_1.0=0x3210 +xgxs_rx_lane_map_5.0=0x0321 +xgxs_rx_lane_map_9.0=0x1302 +xgxs_rx_lane_map_13.0=0x0213 +xgxs_rx_lane_map_17.0=0x1302 +xgxs_rx_lane_map_21.0=0x1302 +xgxs_rx_lane_map_25.0=0x1302 +xgxs_rx_lane_map_29.0=0x0213 +xgxs_rx_lane_map_33.0=0x1302 +xgxs_rx_lane_map_37.0=0x1302 +xgxs_rx_lane_map_41.0=0x1302 +xgxs_rx_lane_map_45.0=0x0213 +xgxs_rx_lane_map_49.0=0x1302 +xgxs_rx_lane_map_53.0=0x1302 +xgxs_rx_lane_map_57.0=0x1302 +xgxs_rx_lane_map_61.0=0x0213 +xgxs_rx_lane_map_65.0=0x1302 +xgxs_rx_lane_map_69.0=0x1302 +xgxs_rx_lane_map_73.0=0x1302 +xgxs_rx_lane_map_77.0=0x0213 +xgxs_rx_lane_map_81.0=0x1302 +xgxs_rx_lane_map_85.0=0x1302 +xgxs_rx_lane_map_89.0=0x1302 +xgxs_rx_lane_map_93.0=0x0213 +xgxs_rx_lane_map_97.0=0x1302 +xgxs_rx_lane_map_98.0=0x1302 +xgxs_rx_lane_map_99.0=0x1302 +xgxs_rx_lane_map_100.0=0x0213 +xgxs_rx_lane_map_101.0=0x0213 +xgxs_rx_lane_map_102.0=0x1302 +xgxs_rx_lane_map_103.0=0x0123 +xgxs_rx_lane_map_104.0=0x2031 +xgxs_tx_lane_map_1.0=0x0123 +xgxs_tx_lane_map_5.0=0x0321 +xgxs_tx_lane_map_9.0=0x2031 +xgxs_tx_lane_map_13.0=0x0213 +xgxs_tx_lane_map_17.0=0x2031 +xgxs_tx_lane_map_21.0=0x2031 +xgxs_tx_lane_map_25.0=0x2031 +xgxs_tx_lane_map_29.0=0x0213 +xgxs_tx_lane_map_33.0=0x2031 +xgxs_tx_lane_map_37.0=0x2031 +xgxs_tx_lane_map_41.0=0x2031 +xgxs_tx_lane_map_45.0=0x0213 +xgxs_tx_lane_map_49.0=0x2031 +xgxs_tx_lane_map_53.0=0x2031 +xgxs_tx_lane_map_57.0=0x2031 +xgxs_tx_lane_map_61.0=0x0213 +xgxs_tx_lane_map_65.0=0x2031 +xgxs_tx_lane_map_69.0=0x2031 +xgxs_tx_lane_map_73.0=0x2031 +xgxs_tx_lane_map_77.0=0x0213 +xgxs_tx_lane_map_81.0=0x2031 +xgxs_tx_lane_map_85.0=0x2031 +xgxs_tx_lane_map_89.0=0x2031 +xgxs_tx_lane_map_93.0=0x0213 +xgxs_tx_lane_map_97.0=0x2031 +xgxs_tx_lane_map_98.0=0x2031 +xgxs_tx_lane_map_99.0=0x2031 +xgxs_tx_lane_map_100.0=0x0213 +xgxs_tx_lane_map_101.0=0x0213 +xgxs_tx_lane_map_102.0=0x2031 +xgxs_tx_lane_map_103.0=0x3120 +xgxs_tx_lane_map_104.0=0x1302 + +# tuning parameters +serdes_preemphasis_lane0_1.0=0x81f7 +serdes_preemphasis_lane1_1.0=0x81f7 +serdes_preemphasis_lane2_1.0=0x81f7 +serdes_preemphasis_lane3_1.0=0x81f7 +serdes_pre_driver_current_lane0_5.0=0x7 +serdes_driver_current_lane0_5.0=0x7 +serdes_preemphasis_lane0_5.0=0xc2f0 +serdes_pre_driver_current_lane1_5.0=0x7 +serdes_driver_current_lane1_5.0=0x7 +serdes_preemphasis_lane1_5.0=0xc2f0 +serdes_pre_driver_current_lane2_5.0=0x7 +serdes_driver_current_lane2_5.0=0x7 +serdes_preemphasis_lane2_5.0=0xc2f0 +serdes_pre_driver_current_lane3_5.0=0x7 +serdes_driver_current_lane3_5.0=0x7 +serdes_preemphasis_lane3_5.0=0xc2f0 +serdes_pre_driver_current_lane0_9.0=0x7 +serdes_driver_current_lane0_9.0=0x7 +serdes_preemphasis_lane0_9.0=0xbb10 +serdes_pre_driver_current_lane1_9.0=0x7 +serdes_driver_current_lane1_9.0=0x7 +serdes_preemphasis_lane1_9.0=0xbb10 +serdes_pre_driver_current_lane2_9.0=0x7 +serdes_driver_current_lane2_9.0=0x7 +serdes_preemphasis_lane2_9.0=0xbb10 +serdes_pre_driver_current_lane3_9.0=0x7 +serdes_driver_current_lane3_9.0=0x7 +serdes_preemphasis_lane3_9.0=0xbb10 +serdes_pre_driver_current_lane0_13.0=0x7 +serdes_driver_current_lane0_13.0=0x7 +serdes_preemphasis_lane0_13.0=0xbb10 +serdes_pre_driver_current_lane1_13.0=0x7 +serdes_driver_current_lane1_13.0=0x7 +serdes_preemphasis_lane1_13.0=0xbb10 +serdes_pre_driver_current_lane2_13.0=0x7 +serdes_driver_current_lane2_13.0=0x7 +serdes_preemphasis_lane2_13.0=0xbb10 +serdes_pre_driver_current_lane3_13.0=0x7 +serdes_driver_current_lane3_13.0=0x7 +serdes_preemphasis_lane3_13.0=0xbb10 +serdes_pre_driver_current_lane0_17.0=0x6 +serdes_driver_current_lane0_17.0=0x6 +serdes_preemphasis_lane0_17.0=0xb720 +serdes_pre_driver_current_lane1_17.0=0x6 +serdes_driver_current_lane1_17.0=0x6 +serdes_preemphasis_lane1_17.0=0xb720 +serdes_pre_driver_current_lane2_17.0=0x6 +serdes_driver_current_lane2_17.0=0x6 +serdes_preemphasis_lane2_17.0=0xb720 +serdes_pre_driver_current_lane3_17.0=0x6 +serdes_driver_current_lane3_17.0=0x6 +serdes_preemphasis_lane3_17.0=0xb720 +serdes_pre_driver_current_lane0_21.0=0x7 +serdes_driver_current_lane0_21.0=0x7 +serdes_preemphasis_lane0_21.0=0xbb10 +serdes_pre_driver_current_lane1_21.0=0x7 +serdes_driver_current_lane1_21.0=0x7 +serdes_preemphasis_lane1_21.0=0xbb10 +serdes_pre_driver_current_lane2_21.0=0x7 +serdes_driver_current_lane2_21.0=0x7 +serdes_preemphasis_lane2_21.0=0xbb10 +serdes_pre_driver_current_lane3_21.0=0x7 +serdes_driver_current_lane3_21.0=0x7 +serdes_preemphasis_lane3_21.0=0xbb10 +serdes_pre_driver_current_lane0_25.0=0x5 +serdes_driver_current_lane0_25.0=0x5 +serdes_preemphasis_lane0_25.0=0xb720 +serdes_pre_driver_current_lane1_25.0=0x5 +serdes_driver_current_lane1_25.0=0x5 +serdes_preemphasis_lane1_25.0=0xb720 +serdes_pre_driver_current_lane2_25.0=0x5 +serdes_driver_current_lane2_25.0=0x5 +serdes_preemphasis_lane2_25.0=0xb720 +serdes_pre_driver_current_lane3_25.0=0x5 +serdes_driver_current_lane3_25.0=0x5 +serdes_preemphasis_lane3_25.0=0xb720 +serdes_pre_driver_current_lane0_29.0=0x5 +serdes_driver_current_lane0_29.0=0x5 +serdes_preemphasis_lane0_29.0=0xb720 +serdes_pre_driver_current_lane1_29.0=0x5 +serdes_driver_current_lane1_29.0=0x5 +serdes_preemphasis_lane1_29.0=0xb720 +serdes_pre_driver_current_lane2_29.0=0x5 +serdes_driver_current_lane2_29.0=0x5 +serdes_preemphasis_lane2_29.0=0xb720 +serdes_pre_driver_current_lane3_29.0=0x5 +serdes_driver_current_lane3_29.0=0x5 +serdes_preemphasis_lane3_29.0=0xb720 +serdes_pre_driver_current_lane0_33.0=0x4 +serdes_driver_current_lane0_33.0=0x4 +serdes_preemphasis_lane0_33.0=0xb720 +serdes_pre_driver_current_lane1_33.0=0x4 +serdes_driver_current_lane1_33.0=0x4 +serdes_preemphasis_lane1_33.0=0xb720 +serdes_pre_driver_current_lane2_33.0=0x4 +serdes_driver_current_lane2_33.0=0x4 +serdes_preemphasis_lane2_33.0=0xb720 +serdes_pre_driver_current_lane3_33.0=0x4 +serdes_driver_current_lane3_33.0=0x4 +serdes_preemphasis_lane3_33.0=0xb720 +serdes_pre_driver_current_lane0_37.0=0x5 +serdes_driver_current_lane0_37.0=0x5 +serdes_preemphasis_lane0_37.0=0xb720 +serdes_pre_driver_current_lane1_37.0=0x5 +serdes_driver_current_lane1_37.0=0x5 +serdes_preemphasis_lane1_37.0=0xb720 +serdes_pre_driver_current_lane2_37.0=0x5 +serdes_driver_current_lane2_37.0=0x5 +serdes_preemphasis_lane2_37.0=0xb720 +serdes_pre_driver_current_lane3_37.0=0x5 +serdes_driver_current_lane3_37.0=0x5 +serdes_preemphasis_lane3_37.0=0xb720 +serdes_pre_driver_current_lane0_41.0=0x3 +serdes_driver_current_lane0_41.0=0x3 +serdes_preemphasis_lane0_41.0=0xb330 +serdes_pre_driver_current_lane1_41.0=0x3 +serdes_driver_current_lane1_41.0=0x3 +serdes_preemphasis_lane1_41.0=0xb330 +serdes_pre_driver_current_lane2_41.0=0x3 +serdes_driver_current_lane2_41.0=0x3 +serdes_preemphasis_lane2_41.0=0xb330 +serdes_pre_driver_current_lane3_41.0=0x3 +serdes_driver_current_lane3_41.0=0x3 +serdes_preemphasis_lane3_41.0=0xb330 +serdes_pre_driver_current_lane0_45.0=0x4 +serdes_driver_current_lane0_45.0=0x4 +serdes_preemphasis_lane0_45.0=0xb720 +serdes_pre_driver_current_lane1_45.0=0x4 +serdes_driver_current_lane1_45.0=0x4 +serdes_preemphasis_lane1_45.0=0xb720 +serdes_pre_driver_current_lane2_45.0=0x4 +serdes_driver_current_lane2_45.0=0x4 +serdes_preemphasis_lane2_45.0=0xb720 +serdes_pre_driver_current_lane3_45.0=0x4 +serdes_driver_current_lane3_45.0=0x4 +serdes_preemphasis_lane3_45.0=0xb720 +serdes_pre_driver_current_lane0_49.0=0x3 +serdes_driver_current_lane0_49.0=0x3 +serdes_preemphasis_lane0_49.0=0xb330 +serdes_pre_driver_current_lane1_49.0=0x3 +serdes_driver_current_lane1_49.0=0x3 +serdes_preemphasis_lane1_49.0=0xb330 +serdes_pre_driver_current_lane2_49.0=0x3 +serdes_driver_current_lane2_49.0=0x3 +serdes_preemphasis_lane2_49.0=0xb330 +serdes_pre_driver_current_lane3_49.0=0x3 +serdes_driver_current_lane3_49.0=0x3 +serdes_preemphasis_lane3_49.0=0xb330 +serdes_pre_driver_current_lane0_53.0=0x4 +serdes_driver_current_lane0_53.0=0x4 +serdes_preemphasis_lane0_53.0=0xb720 +serdes_pre_driver_current_lane1_53.0=0x4 +serdes_driver_current_lane1_53.0=0x4 +serdes_preemphasis_lane1_53.0=0xb720 +serdes_pre_driver_current_lane2_53.0=0x4 +serdes_driver_current_lane2_53.0=0x4 +serdes_preemphasis_lane2_53.0=0xb720 +serdes_pre_driver_current_lane3_53.0=0x4 +serdes_driver_current_lane3_53.0=0x4 +serdes_preemphasis_lane3_53.0=0xb720 +serdes_pre_driver_current_lane0_57.0=0x3 +serdes_driver_current_lane0_57.0=0x3 +serdes_preemphasis_lane0_57.0=0xb330 +serdes_pre_driver_current_lane1_57.0=0x3 +serdes_driver_current_lane1_57.0=0x3 +serdes_preemphasis_lane1_57.0=0xb330 +serdes_pre_driver_current_lane2_57.0=0x3 +serdes_driver_current_lane2_57.0=0x3 +serdes_preemphasis_lane2_57.0=0xb330 +serdes_pre_driver_current_lane3_57.0=0x3 +serdes_driver_current_lane3_57.0=0x3 +serdes_preemphasis_lane3_57.0=0xb330 +serdes_pre_driver_current_lane0_61.0=0x4 +serdes_driver_current_lane0_61.0=0x4 +serdes_preemphasis_lane0_61.0=0xb720 +serdes_pre_driver_current_lane1_61.0=0x4 +serdes_driver_current_lane1_61.0=0x4 +serdes_preemphasis_lane1_61.0=0xb720 +serdes_pre_driver_current_lane2_61.0=0x4 +serdes_driver_current_lane2_61.0=0x4 +serdes_preemphasis_lane2_61.0=0xb720 +serdes_pre_driver_current_lane3_61.0=0x4 +serdes_driver_current_lane3_61.0=0x4 +serdes_preemphasis_lane3_61.0=0xb720 +serdes_pre_driver_current_lane0_65.0=0x4 +serdes_driver_current_lane0_65.0=0x4 +serdes_preemphasis_lane0_65.0=0xb720 +serdes_pre_driver_current_lane1_65.0=0x4 +serdes_driver_current_lane1_65.0=0x4 +serdes_preemphasis_lane1_65.0=0xb720 +serdes_pre_driver_current_lane2_65.0=0x4 +serdes_driver_current_lane2_65.0=0x4 +serdes_preemphasis_lane2_65.0=0xb720 +serdes_pre_driver_current_lane3_65.0=0x4 +serdes_driver_current_lane3_65.0=0x4 +serdes_preemphasis_lane3_65.0=0xb720 +serdes_pre_driver_current_lane0_69.0=0x4 +serdes_driver_current_lane0_69.0=0x4 +serdes_preemphasis_lane0_69.0=0xb720 +serdes_pre_driver_current_lane1_69.0=0x4 +serdes_driver_current_lane1_69.0=0x4 +serdes_preemphasis_lane1_69.0=0xb720 +serdes_pre_driver_current_lane2_69.0=0x4 +serdes_driver_current_lane2_69.0=0x4 +serdes_preemphasis_lane2_69.0=0xb720 +serdes_pre_driver_current_lane3_69.0=0x4 +serdes_driver_current_lane3_69.0=0x4 +serdes_preemphasis_lane3_69.0=0xb720 +serdes_pre_driver_current_lane0_73.0=0x4 +serdes_driver_current_lane0_73.0=0x4 +serdes_preemphasis_lane0_73.0=0xb720 +serdes_pre_driver_current_lane1_73.0=0x4 +serdes_driver_current_lane1_73.0=0x4 +serdes_preemphasis_lane1_73.0=0xb720 +serdes_pre_driver_current_lane2_73.0=0x4 +serdes_driver_current_lane2_73.0=0x4 +serdes_preemphasis_lane2_73.0=0xb720 +serdes_pre_driver_current_lane3_73.0=0x4 +serdes_driver_current_lane3_73.0=0x4 +serdes_preemphasis_lane3_73.0=0xb720 +serdes_pre_driver_current_lane0_77.0=0x5 +serdes_driver_current_lane0_77.0=0x5 +serdes_preemphasis_lane0_77.0=0xb720 +serdes_pre_driver_current_lane1_77.0=0x5 +serdes_driver_current_lane1_77.0=0x5 +serdes_preemphasis_lane1_77.0=0xb720 +serdes_pre_driver_current_lane2_77.0=0x5 +serdes_driver_current_lane2_77.0=0x5 +serdes_preemphasis_lane2_77.0=0xb720 +serdes_pre_driver_current_lane3_77.0=0x5 +serdes_driver_current_lane3_77.0=0x5 +serdes_preemphasis_lane3_77.0=0xb720 +serdes_pre_driver_current_lane0_81.0=0x5 +serdes_driver_current_lane0_81.0=0x5 +serdes_preemphasis_lane0_81.0=0xb720 +serdes_pre_driver_current_lane1_81.0=0x5 +serdes_driver_current_lane1_81.0=0x5 +serdes_preemphasis_lane1_81.0=0xb720 +serdes_pre_driver_current_lane2_81.0=0x5 +serdes_driver_current_lane2_81.0=0x5 +serdes_preemphasis_lane2_81.0=0xb720 +serdes_pre_driver_current_lane3_81.0=0x5 +serdes_driver_current_lane3_81.0=0x5 +serdes_preemphasis_lane3_81.0=0xb720 +serdes_pre_driver_current_lane0_85.0=0x5 +serdes_driver_current_lane0_85.0=0x5 +serdes_preemphasis_lane0_85.0=0xb720 +serdes_pre_driver_current_lane1_85.0=0x5 +serdes_driver_current_lane1_85.0=0x5 +serdes_preemphasis_lane1_85.0=0xb720 +serdes_pre_driver_current_lane2_85.0=0x5 +serdes_driver_current_lane2_85.0=0x5 +serdes_preemphasis_lane2_85.0=0xb720 +serdes_pre_driver_current_lane3_85.0=0x5 +serdes_driver_current_lane3_85.0=0x5 +serdes_preemphasis_lane3_85.0=0xb720 +serdes_pre_driver_current_lane0_89.0=0x6 +serdes_driver_current_lane0_89.0=0x6 +serdes_preemphasis_lane0_89.0=0xb720 +serdes_pre_driver_current_lane1_89.0=0x6 +serdes_driver_current_lane1_89.0=0x6 +serdes_preemphasis_lane1_89.0=0xb720 +serdes_pre_driver_current_lane2_89.0=0x6 +serdes_driver_current_lane2_89.0=0x6 +serdes_preemphasis_lane2_89.0=0xb720 +serdes_pre_driver_current_lane3_89.0=0x6 +serdes_driver_current_lane3_89.0=0x6 +serdes_preemphasis_lane3_89.0=0xb720 +serdes_pre_driver_current_lane0_93.0=0x7 +serdes_driver_current_lane0_93.0=0x7 +serdes_preemphasis_lane0_93.0=0xbb10 +serdes_pre_driver_current_lane1_93.0=0x7 +serdes_driver_current_lane1_93.0=0x7 +serdes_preemphasis_lane1_93.0=0xbb10 +serdes_pre_driver_current_lane2_93.0=0x7 +serdes_driver_current_lane2_93.0=0x7 +serdes_preemphasis_lane2_93.0=0xbb10 +serdes_pre_driver_current_lane3_93.0=0x7 +serdes_driver_current_lane3_93.0=0x7 +serdes_preemphasis_lane3_93.0=0xbb10 +serdes_pre_driver_current_lane0_97.0=0x5 +serdes_driver_current_lane0_97.0=0x5 +serdes_preemphasis_lane0_97.0=0xb720 +serdes_pre_driver_current_lane1_97.0=0x5 +serdes_driver_current_lane1_97.0=0x5 +serdes_preemphasis_lane1_97.0=0xb720 +serdes_pre_driver_current_lane2_97.0=0x5 +serdes_driver_current_lane2_97.0=0x5 +serdes_preemphasis_lane2_97.0=0xb720 +serdes_pre_driver_current_lane3_97.0=0x5 +serdes_driver_current_lane3_97.0=0x5 +serdes_preemphasis_lane3_97.0=0xb720 +serdes_pre_driver_current_lane0_98.0=0x6 +serdes_driver_current_lane0_98.0=0x6 +serdes_preemphasis_lane0_98.0=0xb720 +serdes_pre_driver_current_lane1_98.0=0x6 +serdes_driver_current_lane1_98.0=0x6 +serdes_preemphasis_lane1_98.0=0xb720 +serdes_pre_driver_current_lane2_98.0=0x6 +serdes_driver_current_lane2_98.0=0x6 +serdes_preemphasis_lane2_98.0=0xb720 +serdes_pre_driver_current_lane3_98.0=0x6 +serdes_driver_current_lane3_98.0=0x6 +serdes_preemphasis_lane3_98.0=0xb720 +serdes_pre_driver_current_lane0_99.0=0x5 +serdes_driver_current_lane0_99.0=0x5 +serdes_preemphasis_lane0_99.0=0xb720 +serdes_pre_driver_current_lane1_99.0=0x5 +serdes_driver_current_lane1_99.0=0x5 +serdes_preemphasis_lane1_99.0=0xb720 +serdes_pre_driver_current_lane2_99.0=0x5 +serdes_driver_current_lane2_99.0=0x5 +serdes_preemphasis_lane2_99.0=0xb720 +serdes_pre_driver_current_lane3_99.0=0x5 +serdes_driver_current_lane3_99.0=0x5 +serdes_preemphasis_lane3_99.0=0xb720 +serdes_pre_driver_current_lane0_100.0=0x7 +serdes_driver_current_lane0_100.0=0x7 +serdes_preemphasis_lane0_100.0=0xbb10 +serdes_pre_driver_current_lane1_100.0=0x7 +serdes_driver_current_lane1_100.0=0x7 +serdes_preemphasis_lane1_100.0=0xbb10 +serdes_pre_driver_current_lane2_100.0=0x7 +serdes_driver_current_lane2_100.0=0x7 +serdes_preemphasis_lane2_100.0=0xbb10 +serdes_pre_driver_current_lane3_100.0=0x7 +serdes_driver_current_lane3_100.0=0x7 +serdes_preemphasis_lane3_100.0=0xbb10 +serdes_pre_driver_current_lane0_101.0=0x7 +serdes_driver_current_lane0_101.0=0x7 +serdes_preemphasis_lane0_101.0=0xbb10 +serdes_pre_driver_current_lane1_101.0=0x7 +serdes_driver_current_lane1_101.0=0x7 +serdes_preemphasis_lane1_101.0=0xbb10 +serdes_pre_driver_current_lane2_101.0=0x7 +serdes_driver_current_lane2_101.0=0x7 +serdes_preemphasis_lane2_101.0=0xbb10 +serdes_pre_driver_current_lane3_101.0=0x7 +serdes_driver_current_lane3_101.0=0x7 +serdes_preemphasis_lane3_101.0=0xbb10 +serdes_pre_driver_current_lane0_102.0=0x7 +serdes_driver_current_lane0_102.0=0x7 +serdes_preemphasis_lane0_102.0=0xbb10 +serdes_pre_driver_current_lane1_102.0=0x7 +serdes_driver_current_lane1_102.0=0x7 +serdes_preemphasis_lane1_102.0=0xbb10 +serdes_pre_driver_current_lane2_102.0=0x7 +serdes_driver_current_lane2_102.0=0x7 +serdes_preemphasis_lane2_102.0=0xbb10 +serdes_pre_driver_current_lane3_102.0=0x7 +serdes_driver_current_lane3_102.0=0x7 +serdes_preemphasis_lane3_102.0=0xbb10 +serdes_preemphasis_lane0_103.0=0x81f4 +serdes_preemphasis_lane1_103.0=0x81f4 +serdes_preemphasis_lane2_103.0=0x81f4 +serdes_preemphasis_lane3_103.0=0x81f4 +serdes_preemphasis_lane0_104.0=0x81f5 +serdes_preemphasis_lane1_104.0=0x81f5 +serdes_preemphasis_lane2_104.0=0x81f5 +serdes_preemphasis_lane3_104.0=0x81f5 diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX32S-Q32 b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX32S-Q32 new file mode 120000 index 00000000000..6a90d8a3ac7 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX32S-Q32 @@ -0,0 +1 @@ +Arista-7050-QX-32S \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050_qx32s/default_sku b/device/arista/x86_64-arista_7050_qx32s/default_sku new file mode 100644 index 00000000000..657093e0b60 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/default_sku @@ -0,0 +1 @@ +Arista-7050-QX-32S t1 diff --git a/device/arista/x86_64-arista_7050_qx32s/fancontrol b/device/arista/x86_64-arista_7050_qx32s/fancontrol new file mode 100644 index 00000000000..9c329897c9e --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/fancontrol @@ -0,0 +1,10 @@ +INTERVAL=5 +DEVPATH=hwmon2=devices/pci0000:00/0000:00:02.2/0000:02:00.0/i2c-2/2-004c hwmon4=devices/pci0000:00/0000:00:02.2/0000:02:00.0/i2c-3/3-0060 +DEVNAME=hwmon2=max6658 hwmon4=crow_cpld +FCTEMPS=hwmon4/pwm4=hwmon2/temp1_input hwmon4/pwm3=hwmon2/temp1_input hwmon4/pwm2=hwmon2/temp1_input hwmon4/pwm1=hwmon2/temp1_input +FCFANS=hwmon4/pwm4=hwmon4/fan4_input hwmon4/pwm3=hwmon4/fan3_input hwmon4/pwm2=hwmon4/fan2_input hwmon4/pwm1=hwmon4/fan1_input +MINTEMP=hwmon4/pwm4=35 hwmon4/pwm3=35 hwmon4/pwm2=35 hwmon4/pwm1=35 +MINPWM=hwmon4/pwm4=179 hwmon4/pwm3=179 hwmon4/pwm2=179 hwmon4/pwm1=179 +MAXTEMP=hwmon4/pwm4=45 hwmon4/pwm3=45 hwmon4/pwm2=45 hwmon4/pwm1=45 +MINSTART=hwmon4/pwm4=179 hwmon4/pwm3=179 hwmon4/pwm2=179 hwmon4/pwm1=179 +MINSTOP=hwmon4/pwm4=179 hwmon4/pwm3=179 hwmon4/pwm2=179 hwmon4/pwm1=179 diff --git a/device/arista/x86_64-arista_7050_qx32s/platform_reboot b/device/arista/x86_64-arista_7050_qx32s/platform_reboot new file mode 120000 index 00000000000..7f94a49e38b --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/platform_reboot @@ -0,0 +1 @@ +../x86_64-arista_common/platform_reboot \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050_qx32s/plugins b/device/arista/x86_64-arista_7050_qx32s/plugins new file mode 120000 index 00000000000..5fbbf98a628 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/plugins @@ -0,0 +1 @@ +../x86_64-arista_common/plugins/ \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050_qx32s/sensors.conf b/device/arista/x86_64-arista_7050_qx32s/sensors.conf new file mode 100644 index 00000000000..6030de90eea --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/sensors.conf @@ -0,0 +1,40 @@ +# libsensors configuration file for DCS-7050QX-32S +# ------------------------------------------------ +# + +bus "i2c-2" "SCD 0000:02:00.0 SMBus master 0 bus 0" +bus "i2c-3" "SCD 0000:02:00.0 SMBus master 0 bus 1" +bus "i2c-5" "SCD 0000:02:00.0 SMBus master 0 bus 3" +bus "i2c-6" "SCD 0000:02:00.0 SMBus master 0 bus 4" +bus "i2c-7" "SCD 0000:02:00.0 SMBus master 0 bus 5" + +chip "k10temp-pci-00c3" + label temp1 "Cpu temp sensor" + +chip "max6658-i2c-2-4c" + label temp1 "Board temp sensor" + set temp1_max 55 + set temp1_crit 70 + + label temp2 "Front panel temp sensor" + set temp2_max 65 + set temp2_crit 75 + +chip "max6658-i2c-3-4c" + label temp1 "Cpu board temp sensor" + set temp1_max 75 + set temp1_crit 80 + + label temp2 "Back panel temp sensor" + set temp2_max 75 + set temp2_crit 80 + +chip "pmbus-i2c-6-58" + label temp1 "Power supply 1 hotspot sensor" + label temp2 "Power supply 1 inlet temp sensor" + label temp3 "Power supply 1 sensor" + +chip "pmbus-i2c-5-58" + label temp1 "Power supply 2 hotspot sensor" + label temp2 "Power supply 2 inlet temp sensor" + label temp3 "Power supply 2 sensor" diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32-T1 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32-T1 new file mode 120000 index 00000000000..42c11d5f05f --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32-T1 @@ -0,0 +1 @@ +Arista-7060CX-32S-C32 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/buffers.json.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..0869e63968a --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/buffers_defaults_t0.j2 @@ -0,0 +1,47 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,128,4) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10875072", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_lossy_pool": { + "size": "9243812", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"15982720" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..80e96bdceca --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/buffers_defaults_t1.j2 @@ -0,0 +1,47 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,128,4) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10875072", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_lossy_pool": { + "size": "9243812", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"15982720" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/pg_profile_lookup.ini new file mode 100644 index 00000000000..aedda37a887 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -3 2288 + 25000 5m 1248 2288 53248 -3 2288 + 40000 5m 1248 2288 66560 -3 2288 + 50000 5m 1248 2288 90272 -3 2288 + 100000 5m 1248 2288 165568 -3 2288 + 10000 40m 1248 2288 37024 -3 2288 + 25000 40m 1248 2288 53248 -3 2288 + 40000 40m 1248 2288 71552 -3 2288 + 50000 40m 1248 2288 96096 -3 2288 + 100000 40m 1248 2288 177632 -3 2288 + 10000 300m 1248 2288 46176 -3 2288 + 25000 300m 1248 2288 79040 -3 2288 + 40000 300m 1248 2288 108160 -3 2288 + 50000 300m 1248 2288 141856 -3 2288 + 100000 300m 1248 2288 268736 -3 2288 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/port_config.ini b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/port_config.ini new file mode 100644 index 00000000000..bfe4a721141 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index +Ethernet0 33,34,35,36 Ethernet1/1 1 +Ethernet4 37,38,39,40 Ethernet2/1 2 +Ethernet8 41,42,43,44 Ethernet3/1 3 +Ethernet12 45,46,47,48 Ethernet4/1 4 +Ethernet16 49,50,51,52 Ethernet5/1 5 +Ethernet20 53,54,55,56 Ethernet6/1 6 +Ethernet24 57,58,59,60 Ethernet7/1 7 +Ethernet28 61,62,63,64 Ethernet8/1 8 +Ethernet32 65,66,67,68 Ethernet9/1 9 +Ethernet36 69,70,71,72 Ethernet10/1 10 +Ethernet40 73,74,75,76 Ethernet11/1 11 +Ethernet44 77,78,79,80 Ethernet12/1 12 +Ethernet48 81,82,83,84 Ethernet13/1 13 +Ethernet52 85,86,87,88 Ethernet14/1 14 +Ethernet56 89,90,91,92 Ethernet15/1 15 +Ethernet60 93,94,95,96 Ethernet16/1 16 +Ethernet64 97,98,99,100 Ethernet17/1 17 +Ethernet68 101,102,103,104 Ethernet18/1 18 +Ethernet72 105,106,107,108 Ethernet19/1 19 +Ethernet76 109,110,111,112 Ethernet20/1 20 +Ethernet80 113,114,115,116 Ethernet21/1 21 +Ethernet84 117,118,119,120 Ethernet22/1 22 +Ethernet88 121,122,123,124 Ethernet23/1 23 +Ethernet92 125,126,127,128 Ethernet24/1 24 +Ethernet96 1,2,3,4 Ethernet25/1 25 +Ethernet100 5,6,7,8 Ethernet26/1 26 +Ethernet104 9,10,11,12 Ethernet27/1 27 +Ethernet108 13,14,15,16 Ethernet28/1 28 +Ethernet112 17,18,19,20 Ethernet29/1 29 +Ethernet116 21,22,23,24 Ethernet30/1 30 +Ethernet120 25,26,27,28 Ethernet31/1 31 +Ethernet124 29,30,31,32 Ethernet32/1 32 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/qos.json.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/sai.profile b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/sai.profile new file mode 100644 index 00000000000..4f8c558b088 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-32x100G-t1.config.bcm diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/th-a7060-cx32s-32x100G-t1.config.bcm b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/th-a7060-cx32s-32x100G-t1.config.bcm new file mode 100644 index 00000000000..039fd955836 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/th-a7060-cx32s-32x100G-t1.config.bcm @@ -0,0 +1,446 @@ +# Arista 7060CX-32S + +phy_an_allow_pll_change=1 +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=8 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +dma_desc_timeout_usec=15000000 +higig2_hdr_mode=1 +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +l2xmsg_mode=1 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +os=unix +oversubscribe_mode=1 +ptp_bs_fref.0=25000000 +ptp_ts_pll_fref.0=25000000 +robust_hash_disable_egress_vlan.0=1 +robust_hash_disable_mpls.0=1 +robust_hash_disable_vlan.0=1 +tdma_timeout_usec.0=15000000 +tslam_timeout_usec.0=15000000 +pbmp_xport_xe.0=0x7ffffffffffffffffffffffffffffffffe +phy_an_allow_pll_change_hg.0=0 +phy_an_c73_1.0=1 +phy_an_c73_2.0=1 +phy_an_c73_3.0=1 +phy_an_c73_4.0=1 +phy_an_c73_5.0=1 +phy_an_c73_6.0=1 +phy_an_c73_7.0=1 +phy_an_c73_8.0=1 +phy_an_c73_34.0=1 +phy_an_c73_35.0=1 +phy_an_c73_36.0=1 +phy_an_c73_37.0=1 +phy_an_c73_38.0=1 +phy_an_c73_39.0=1 +phy_an_c73_40.0=1 +phy_an_c73_41.0=1 +phy_an_c73_68.0=1 +phy_an_c73_69.0=1 +phy_an_c73_70.0=1 +phy_an_c73_71.0=1 +phy_an_c73_72.0=1 +phy_an_c73_73.0=1 +phy_an_c73_74.0=1 +phy_an_c73_75.0=1 +phy_an_c73_102.0=1 +phy_an_c73_103.0=1 +phy_an_c73_104.0=1 +phy_an_c73_105.0=1 +phy_an_c73_106.0=1 +phy_an_c73_107.0=1 +phy_an_c73_108.0=1 +phy_an_c73_109.0=1 +phy_an_fec_1.0=1 +phy_an_fec_2.0=1 +phy_an_fec_3.0=1 +phy_an_fec_4.0=1 +phy_an_fec_5.0=1 +phy_an_fec_6.0=1 +phy_an_fec_7.0=1 +phy_an_fec_8.0=1 +phy_an_fec_9.0=1 +phy_an_fec_10.0=1 +phy_an_fec_11.0=1 +phy_an_fec_12.0=1 +phy_an_fec_13.0=1 +phy_an_fec_14.0=1 +phy_an_fec_15.0=1 +phy_an_fec_16.0=1 +phy_an_fec_17.0=1 +phy_an_fec_18.0=1 +phy_an_fec_19.0=1 +phy_an_fec_20.0=1 +phy_an_fec_21.0=1 +phy_an_fec_22.0=1 +phy_an_fec_23.0=1 +phy_an_fec_24.0=1 +phy_an_fec_25.0=1 +phy_an_fec_26.0=1 +phy_an_fec_27.0=1 +phy_an_fec_28.0=1 +phy_an_fec_29.0=1 +phy_an_fec_30.0=1 +phy_an_fec_31.0=1 +phy_an_fec_32.0=1 +phy_an_fec_34.0=1 +phy_an_fec_38.0=1 +phy_an_fec_39.0=1 +phy_an_fec_40.0=1 +phy_an_fec_41.0=1 +phy_an_fec_42.0=1 +phy_an_fec_43.0=1 +phy_an_fec_44.0=1 +phy_an_fec_45.0=1 +phy_an_fec_46.0=1 +phy_an_fec_47.0=1 +phy_an_fec_48.0=1 +phy_an_fec_49.0=1 +phy_an_fec_50.0=1 +phy_an_fec_51.0=1 +phy_an_fec_52.0=1 +phy_an_fec_53.0=1 +phy_an_fec_54.0=1 +phy_an_fec_55.0=1 +phy_an_fec_56.0=1 +phy_an_fec_57.0=1 +phy_an_fec_58.0=1 +phy_an_fec_59.0=1 +phy_an_fec_60.0=1 +phy_an_fec_61.0=1 +phy_an_fec_62.0=1 +phy_an_fec_63.0=1 +phy_an_fec_64.0=1 +phy_an_fec_65.0=1 +phy_an_fec_68.0=1 +phy_an_fec_69.0=1 +phy_an_fec_70.0=1 +phy_an_fec_71.0=1 +phy_an_fec_72.0=1 +phy_an_fec_73.0=1 +phy_an_fec_74.0=1 +phy_an_fec_75.0=1 +phy_an_fec_76.0=1 +phy_an_fec_77.0=1 +phy_an_fec_78.0=1 +phy_an_fec_79.0=1 +phy_an_fec_80.0=1 +phy_an_fec_81.0=1 +phy_an_fec_82.0=1 +phy_an_fec_83.0=1 +phy_an_fec_84.0=1 +phy_an_fec_85.0=1 +phy_an_fec_86.0=1 +phy_an_fec_87.0=1 +phy_an_fec_88.0=1 +phy_an_fec_89.0=1 +phy_an_fec_90.0=1 +phy_an_fec_91.0=1 +phy_an_fec_92.0=1 +phy_an_fec_93.0=1 +phy_an_fec_94.0=1 +phy_an_fec_95.0=1 +phy_an_fec_96.0=1 +phy_an_fec_97.0=1 +phy_an_fec_98.0=1 +phy_an_fec_99.0=1 +phy_an_fec_102.0=1 +phy_an_fec_103.0=1 +phy_an_fec_104.0=1 +phy_an_fec_105.0=1 +phy_an_fec_106.0=1 +phy_an_fec_107.0=1 +phy_an_fec_108.0=1 +phy_an_fec_109.0=1 +phy_an_fec_110.0=1 +phy_an_fec_111.0=1 +phy_an_fec_112.0=1 +phy_an_fec_113.0=1 +phy_an_fec_114.0=1 +phy_an_fec_115.0=1 +phy_an_fec_116.0=1 +phy_an_fec_117.0=1 +phy_an_fec_118.0=1 +phy_an_fec_119.0=1 +phy_an_fec_120.0=1 +phy_an_fec_121.0=1 +phy_an_fec_122.0=1 +phy_an_fec_123.0=1 +phy_an_fec_124.0=1 +phy_an_fec_125.0=1 +phy_an_fec_126.0=1 +phy_an_fec_127.0=1 +phy_an_fec_128.0=1 +phy_an_fec_129.0=1 +phy_an_fec_130.0=1 +phy_an_fec_131.0=1 +phy_an_fec_132.0=1 +phy_an_fec_133.0=1 +phy_xaui_rx_polarity_flip_1.0=0x1 +phy_xaui_rx_polarity_flip_2.0=0x5 +phy_xaui_rx_polarity_flip_3.0=0x1 +phy_xaui_rx_polarity_flip_4.0=0x7 +phy_xaui_rx_polarity_flip_5.0=0xc +phy_xaui_rx_polarity_flip_6.0=0xf +phy_xaui_rx_polarity_flip_7.0=0xc +phy_xaui_rx_polarity_flip_8.0=0xf +phy_xaui_rx_polarity_flip_34.0=0x0 +phy_xaui_rx_polarity_flip_35.0=0x7 +phy_xaui_rx_polarity_flip_36.0=0x4 +phy_xaui_rx_polarity_flip_37.0=0x7 +phy_xaui_rx_polarity_flip_38.0=0x4 +phy_xaui_rx_polarity_flip_39.0=0x6 +phy_xaui_rx_polarity_flip_40.0=0x1 +phy_xaui_rx_polarity_flip_41.0=0x2 +phy_xaui_rx_polarity_flip_68.0=0xd +phy_xaui_rx_polarity_flip_69.0=0x6 +phy_xaui_rx_polarity_flip_70.0=0x1 +phy_xaui_rx_polarity_flip_71.0=0x8 +phy_xaui_rx_polarity_flip_72.0=0x7 +phy_xaui_rx_polarity_flip_73.0=0xc +phy_xaui_rx_polarity_flip_74.0=0x7 +phy_xaui_rx_polarity_flip_75.0=0x8 +phy_xaui_rx_polarity_flip_102.0=0xb +phy_xaui_rx_polarity_flip_103.0=0xc +phy_xaui_rx_polarity_flip_104.0=0x3 +phy_xaui_rx_polarity_flip_105.0=0xc +phy_xaui_rx_polarity_flip_106.0=0xb +phy_xaui_rx_polarity_flip_107.0=0x5 +phy_xaui_rx_polarity_flip_108.0=0x1 +phy_xaui_rx_polarity_flip_109.0=0x9 +phy_xaui_tx_polarity_flip_1.0=0x0 +phy_xaui_tx_polarity_flip_2.0=0xe +phy_xaui_tx_polarity_flip_3.0=0x2 +phy_xaui_tx_polarity_flip_4.0=0xe +phy_xaui_tx_polarity_flip_5.0=0xc +phy_xaui_tx_polarity_flip_6.0=0xf +phy_xaui_tx_polarity_flip_7.0=0xc +phy_xaui_tx_polarity_flip_8.0=0xf +phy_xaui_tx_polarity_flip_34.0=0x0 +phy_xaui_tx_polarity_flip_35.0=0xe +phy_xaui_tx_polarity_flip_36.0=0x0 +phy_xaui_tx_polarity_flip_37.0=0xe +phy_xaui_tx_polarity_flip_38.0=0xf +phy_xaui_tx_polarity_flip_39.0=0xe +phy_xaui_tx_polarity_flip_40.0=0x6 +phy_xaui_tx_polarity_flip_41.0=0xb +phy_xaui_tx_polarity_flip_68.0=0x9 +phy_xaui_tx_polarity_flip_69.0=0xb +phy_xaui_tx_polarity_flip_70.0=0xd +phy_xaui_tx_polarity_flip_71.0=0x9 +phy_xaui_tx_polarity_flip_72.0=0x6 +phy_xaui_tx_polarity_flip_73.0=0xc +phy_xaui_tx_polarity_flip_74.0=0x9 +phy_xaui_tx_polarity_flip_75.0=0x9 +phy_xaui_tx_polarity_flip_102.0=0x6 +phy_xaui_tx_polarity_flip_103.0=0xb +phy_xaui_tx_polarity_flip_104.0=0x6 +phy_xaui_tx_polarity_flip_105.0=0xb +phy_xaui_tx_polarity_flip_106.0=0x6 +phy_xaui_tx_polarity_flip_107.0=0xf +phy_xaui_tx_polarity_flip_108.0=0x6 +phy_xaui_tx_polarity_flip_109.0=0xc +portmap_1.0=1:100 +portmap_2.0=5:100 +portmap_3.0=9:100 +portmap_4.0=13:100 +portmap_5.0=17:100 +portmap_6.0=21:100 +portmap_7.0=25:100 +portmap_8.0=29:100 +portmap_34.0=33:100 +portmap_35.0=37:100 +portmap_36.0=41:100 +portmap_37.0=45:100 +portmap_38.0=49:100 +portmap_39.0=53:100 +portmap_40.0=57:100 +portmap_41.0=61:100 +portmap_68.0=65:100 +portmap_69.0=69:100 +portmap_70.0=73:100 +portmap_71.0=77:100 +portmap_72.0=81:100 +portmap_73.0=85:100 +portmap_74.0=89:100 +portmap_75.0=93:100 +portmap_102.0=97:100 +portmap_103.0=101:100 +portmap_104.0=105:100 +portmap_105.0=109:100 +portmap_106.0=113:100 +portmap_107.0=117:100 +portmap_108.0=121:100 +portmap_109.0=125:100 +port_phy_addr_1.0=0xff +port_phy_addr_2.0=0xff +port_phy_addr_3.0=0xff +port_phy_addr_4.0=0xff +port_phy_addr_5.0=0xff +port_phy_addr_6.0=0xff +port_phy_addr_7.0=0xff +port_phy_addr_8.0=0xff +port_phy_addr_34.0=0xff +port_phy_addr_35.0=0xff +port_phy_addr_36.0=0xff +port_phy_addr_37.0=0xff +port_phy_addr_38.0=0xff +port_phy_addr_39.0=0xff +port_phy_addr_40.0=0xff +port_phy_addr_41.0=0xff +port_phy_addr_68.0=0xff +port_phy_addr_69.0=0xff +port_phy_addr_70.0=0xff +port_phy_addr_71.0=0xff +port_phy_addr_72.0=0xff +port_phy_addr_73.0=0xff +port_phy_addr_74.0=0xff +port_phy_addr_75.0=0xff +port_phy_addr_102.0=0xff +port_phy_addr_103.0=0xff +port_phy_addr_104.0=0xff +port_phy_addr_105.0=0xff +port_phy_addr_106.0=0xff +port_phy_addr_107.0=0xff +port_phy_addr_108.0=0xff +port_phy_addr_109.0=0xff +xgxs_rx_lane_map_1.0=0x3210 +xgxs_rx_lane_map_2.0=0x3210 +xgxs_rx_lane_map_3.0=0x3210 +xgxs_rx_lane_map_4.0=0x3210 +xgxs_rx_lane_map_5.0=0x0123 +xgxs_rx_lane_map_6.0=0x2301 +xgxs_rx_lane_map_7.0=0x0123 +xgxs_rx_lane_map_8.0=0x2301 +xgxs_rx_lane_map_34.0=0x0123 +xgxs_rx_lane_map_35.0=0x0321 +xgxs_rx_lane_map_36.0=0x0321 +xgxs_rx_lane_map_37.0=0x0321 +xgxs_rx_lane_map_38.0=0x1230 +xgxs_rx_lane_map_39.0=0x2301 +xgxs_rx_lane_map_40.0=0x1230 +xgxs_rx_lane_map_41.0=0x2103 +xgxs_rx_lane_map_68.0=0x1230 +xgxs_rx_lane_map_69.0=0x2301 +xgxs_rx_lane_map_70.0=0x1230 +xgxs_rx_lane_map_71.0=0x2103 +xgxs_rx_lane_map_72.0=0x1230 +xgxs_rx_lane_map_73.0=0x2301 +xgxs_rx_lane_map_74.0=0x1230 +xgxs_rx_lane_map_75.0=0x2103 +xgxs_rx_lane_map_102.0=0x3210 +xgxs_rx_lane_map_103.0=0x3210 +xgxs_rx_lane_map_104.0=0x3210 +xgxs_rx_lane_map_105.0=0x3210 +xgxs_rx_lane_map_106.0=0x3210 +xgxs_rx_lane_map_107.0=0x3210 +xgxs_rx_lane_map_108.0=0x3210 +xgxs_rx_lane_map_109.0=0x3210 +xgxs_tx_lane_map_1.0=0x0321 +xgxs_tx_lane_map_2.0=0x2301 +xgxs_tx_lane_map_3.0=0x0321 +xgxs_tx_lane_map_4.0=0x2301 +xgxs_tx_lane_map_5.0=0x0123 +xgxs_tx_lane_map_6.0=0x0123 +xgxs_tx_lane_map_7.0=0x0123 +xgxs_tx_lane_map_8.0=0x0123 +xgxs_tx_lane_map_34.0=0x2301 +xgxs_tx_lane_map_35.0=0x0321 +xgxs_tx_lane_map_36.0=0x2301 +xgxs_tx_lane_map_37.0=0x0321 +xgxs_tx_lane_map_38.0=0x0123 +xgxs_tx_lane_map_39.0=0x1230 +xgxs_tx_lane_map_40.0=0x2301 +xgxs_tx_lane_map_41.0=0x1032 +xgxs_tx_lane_map_68.0=0x0123 +xgxs_tx_lane_map_69.0=0x1230 +xgxs_tx_lane_map_70.0=0x2301 +xgxs_tx_lane_map_71.0=0x1032 +xgxs_tx_lane_map_72.0=0x0123 +xgxs_tx_lane_map_73.0=0x1230 +xgxs_tx_lane_map_74.0=0x2301 +xgxs_tx_lane_map_75.0=0x1032 +xgxs_tx_lane_map_102.0=0x0321 +xgxs_tx_lane_map_103.0=0x2301 +xgxs_tx_lane_map_104.0=0x0321 +xgxs_tx_lane_map_105.0=0x2301 +xgxs_tx_lane_map_106.0=0x0321 +xgxs_tx_lane_map_107.0=0x2301 +xgxs_tx_lane_map_108.0=0x0321 +xgxs_tx_lane_map_109.0=0x2301 + +# tuning parameters for 25g serdes fiber +serdes_driver_current_1=0xa +serdes_preemphasis_1=0x284008 +serdes_driver_current_2=0xa +serdes_preemphasis_2=0x284008 +serdes_driver_current_3=0xa +serdes_preemphasis_3=0x284008 +serdes_driver_current_4=0xa +serdes_preemphasis_4=0x284008 +serdes_driver_current_5=0xa +serdes_preemphasis_5=0x284008 +serdes_driver_current_6=0xa +serdes_preemphasis_6=0x284008 +serdes_driver_current_7=0xa +serdes_preemphasis_7=0x284008 +serdes_driver_current_8=0xd +serdes_preemphasis_8=0x303808 +serdes_driver_current_34=0xd +serdes_preemphasis_34=0x303808 +serdes_driver_current_35=0xd +serdes_preemphasis_35=0x303808 +serdes_driver_current_36=0xd +serdes_preemphasis_36=0x303808 +serdes_driver_current_37=0xd +serdes_preemphasis_37=0x303808 +serdes_driver_current_38=0xf +serdes_preemphasis_38=0x373108 +serdes_driver_current_39=0xf +serdes_preemphasis_39=0x373108 +serdes_driver_current_40=0xf +serdes_preemphasis_40=0x373108 +serdes_driver_current_41=0xf +serdes_preemphasis_41=0x373108 +serdes_driver_current_68=0xf +serdes_preemphasis_68=0x373108 +serdes_driver_current_69=0xf +serdes_preemphasis_69=0x373108 +serdes_driver_current_70=0xf +serdes_preemphasis_70=0x373108 +serdes_driver_current_71=0xf +serdes_preemphasis_71=0x373108 +serdes_driver_current_72=0xd +serdes_preemphasis_72=0x303808 +serdes_driver_current_73=0xd +serdes_preemphasis_73=0x303808 +serdes_driver_current_74=0xd +serdes_preemphasis_74=0x303808 +serdes_driver_current_75=0xd +serdes_preemphasis_75=0x303808 +serdes_driver_current_102=0xa +serdes_preemphasis_102=0x284008 +serdes_driver_current_103=0xa +serdes_preemphasis_103=0x284008 +serdes_driver_current_104=0xa +serdes_preemphasis_104=0x284008 +serdes_driver_current_105=0xa +serdes_preemphasis_105=0x284008 +serdes_driver_current_106=0xa +serdes_preemphasis_106=0x284008 +serdes_driver_current_107=0xa +serdes_preemphasis_107=0x284008 +serdes_driver_current_108=0xa +serdes_preemphasis_108=0x284008 +serdes_driver_current_109=0xa +serdes_preemphasis_109=0x284008 + +mmu_init_config="MSFT-TH-Tier1" diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/buffers.json.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/buffers.json.j2 new file mode 100644 index 00000000000..1083a6210fc --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..5add8968e62 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/buffers_defaults_t0.j2 @@ -0,0 +1,61 @@ +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,6) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(10,22) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(24,32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(6,10) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(22,24) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10875072", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_lossy_pool": { + "size": "9243812", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"15982720" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/pg_profile_lookup.ini new file mode 100644 index 00000000000..dc05d0a100a --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -3 2288 + 25000 5m 1248 2288 53248 -3 2288 + 40000 5m 1248 2288 66560 -3 2288 + 50000 5m 1248 2288 79872 -3 2288 + 100000 5m 1248 2288 165568 -3 2288 + 10000 40m 1248 2288 37024 -3 2288 + 25000 40m 1248 2288 56160 -3 2288 + 40000 40m 1248 2288 71552 -3 2288 + 50000 40m 1248 2288 85696 -3 2288 + 100000 40m 1248 2288 177632 -3 2288 + 10000 300m 1248 2288 46176 -3 2288 + 25000 300m 1248 2288 79040 -3 2288 + 40000 300m 1248 2288 108160 -3 2288 + 50000 300m 1248 2288 141856 -3 2288 + 100000 300m 1248 2288 268736 -3 2288 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/port_config.ini b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/port_config.ini new file mode 100644 index 00000000000..0366a339f6f --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed +Ethernet0 33,34 Ethernet1/1 1 50000 +Ethernet2 35,36 Ethernet1/3 1 50000 +Ethernet4 37,38 Ethernet2/1 2 50000 +Ethernet6 39,40 Ethernet2/3 2 50000 +Ethernet8 41,42 Ethernet3/1 3 50000 +Ethernet10 43,44 Ethernet3/3 3 50000 +Ethernet12 45,46 Ethernet4/1 4 50000 +Ethernet14 47,48 Ethernet4/3 4 50000 +Ethernet16 49,50 Ethernet5/1 5 50000 +Ethernet18 51,52 Ethernet5/3 5 50000 +Ethernet20 53,54 Ethernet6/1 6 50000 +Ethernet22 55,56 Ethernet6/3 6 50000 +Ethernet24 57,58,59,60 Ethernet7/1 7 100000 +Ethernet28 61,62,63,64 Ethernet8/1 8 100000 +Ethernet32 65,66,67,68 Ethernet9/1 9 100000 +Ethernet36 69,70,71,72 Ethernet10/1 10 100000 +Ethernet40 73,74 Ethernet11/1 11 50000 +Ethernet42 75,76 Ethernet11/3 11 50000 +Ethernet44 77,78 Ethernet12/1 12 50000 +Ethernet46 79,80 Ethernet12/3 12 50000 +Ethernet48 81,82 Ethernet13/1 13 50000 +Ethernet50 83,84 Ethernet13/3 13 50000 +Ethernet52 85,86 Ethernet14/1 14 50000 +Ethernet54 87,88 Ethernet14/3 14 50000 +Ethernet56 89,90 Ethernet15/1 15 50000 +Ethernet58 91,92 Ethernet15/3 15 50000 +Ethernet60 93,94 Ethernet16/1 16 50000 +Ethernet62 95,96 Ethernet16/3 16 50000 +Ethernet64 97,98 Ethernet17/1 17 50000 +Ethernet66 99,100 Ethernet17/3 17 50000 +Ethernet68 101,102 Ethernet18/1 18 50000 +Ethernet70 103,104 Ethernet18/3 18 50000 +Ethernet72 105,106 Ethernet19/1 19 50000 +Ethernet74 107,108 Ethernet19/3 19 50000 +Ethernet76 109,110 Ethernet20/1 20 50000 +Ethernet78 111,112 Ethernet20/3 20 50000 +Ethernet80 113,114 Ethernet21/1 21 50000 +Ethernet82 115,116 Ethernet21/3 21 50000 +Ethernet84 117,118 Ethernet22/1 22 50000 +Ethernet86 119,120 Ethernet22/3 22 50000 +Ethernet88 121,122,123,124 Ethernet23/1 23 100000 +Ethernet92 125,126,127,128 Ethernet24/1 24 100000 +Ethernet96 1,2,3,4 Ethernet25/1 25 100000 +Ethernet100 5,6,7,8 Ethernet26/1 26 100000 +Ethernet104 9,10 Ethernet27/1 27 50000 +Ethernet106 11,12 Ethernet27/3 27 50000 +Ethernet108 13,14 Ethernet28/1 28 50000 +Ethernet110 15,16 Ethernet28/3 28 50000 +Ethernet112 17,18 Ethernet29/1 29 50000 +Ethernet114 19,20 Ethernet29/3 29 50000 +Ethernet116 21,22 Ethernet30/1 30 50000 +Ethernet118 23,24 Ethernet30/3 30 50000 +Ethernet120 25,26 Ethernet31/1 31 50000 +Ethernet122 27,28 Ethernet31/3 31 50000 +Ethernet124 29,30 Ethernet32/1 32 50000 +Ethernet126 31,32 Ethernet32/3 32 50000 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/qos.json.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/sai.profile b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/sai.profile new file mode 100644 index 00000000000..87b4ffdadd6 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-8x100G+48x50G.config.bcm diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/th-a7060-cx32s-8x100G+48x50G.config.bcm b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/th-a7060-cx32s-8x100G+48x50G.config.bcm new file mode 100644 index 00000000000..326a51ada84 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/th-a7060-cx32s-8x100G+48x50G.config.bcm @@ -0,0 +1,547 @@ +# Arista 7060CX-32S + +phy_an_allow_pll_change=1 +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=8 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +dma_desc_timeout_usec=15000000 +higig2_hdr_mode=1 +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +l2xmsg_mode=1 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +os=unix +oversubscribe_mode=1 +ptp_bs_fref.0=25000000 +ptp_ts_pll_fref.0=25000000 +robust_hash_disable_egress_vlan.0=1 +robust_hash_disable_mpls.0=1 +robust_hash_disable_vlan.0=1 +tdma_timeout_usec.0=15000000 +tslam_timeout_usec.0=15000000 +pbmp_xport_xe=0x1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe +phy_an_allow_pll_change_hg.0=0 +dport_map_direct=1 +phy_an_c73=1 + +phy_an_fec_1.0=1 +phy_an_fec_2.0=1 +phy_an_fec_3.0=1 +phy_an_fec_4.0=1 +phy_an_fec_5.0=1 +phy_an_fec_6.0=1 +phy_an_fec_7.0=1 +phy_an_fec_8.0=1 +phy_an_fec_9.0=1 +phy_an_fec_10.0=1 +phy_an_fec_11.0=1 +phy_an_fec_12.0=1 +phy_an_fec_13.0=1 +phy_an_fec_14.0=1 +phy_an_fec_34.0=1 +phy_an_fec_35.0=1 +phy_an_fec_36.0=1 +phy_an_fec_37.0=1 +phy_an_fec_38.0=1 +phy_an_fec_39.0=1 +phy_an_fec_40.0=1 +phy_an_fec_41.0=1 +phy_an_fec_42.0=1 +phy_an_fec_43.0=1 +phy_an_fec_44.0=1 +phy_an_fec_45.0=1 +phy_an_fec_46.0=1 +phy_an_fec_47.0=1 +phy_an_fec_68.0=1 +phy_an_fec_69.0=1 +phy_an_fec_70.0=1 +phy_an_fec_71.0=1 +phy_an_fec_72.0=1 +phy_an_fec_73.0=1 +phy_an_fec_74.0=1 +phy_an_fec_75.0=1 +phy_an_fec_76.0=1 +phy_an_fec_77.0=1 +phy_an_fec_78.0=1 +phy_an_fec_79.0=1 +phy_an_fec_80.0=1 +phy_an_fec_81.0=1 +phy_an_fec_102.0=1 +phy_an_fec_103.0=1 +phy_an_fec_104.0=1 +phy_an_fec_105.0=1 +phy_an_fec_106.0=1 +phy_an_fec_107.0=1 +phy_an_fec_108.0=1 +phy_an_fec_109.0=1 +phy_an_fec_110.0=1 +phy_an_fec_111.0=1 +phy_an_fec_112.0=1 +phy_an_fec_113.0=1 +phy_an_fec_114.0=1 +phy_an_fec_115.0=1 + +# Q1 +portmap_1.0=1:100 +portmap_2.0=5:100 +portmap_3.0=9:50:2 +portmap_4.0=11:50:2 +portmap_5.0=13:50:2 +portmap_6.0=15:50:2 +portmap_7.0=17:50:2 +portmap_8.0=19:50:2 +portmap_9.0=21:50:2 +portmap_10.0=23:50:2 +portmap_11.0=25:50:2 +portmap_12.0=27:50:2 +portmap_13.0=29:50:2 +portmap_14.0=31:50:2 +phy_xaui_rx_polarity_flip_1.0=0x1 +phy_xaui_rx_polarity_flip_2.0=0x5 +phy_xaui_rx_polarity_flip_3.0=0x1 +phy_xaui_rx_polarity_flip_4.0=0x0 +phy_xaui_rx_polarity_flip_5.0=0x3 +phy_xaui_rx_polarity_flip_6.0=0x1 +phy_xaui_rx_polarity_flip_7.0=0x0 +phy_xaui_rx_polarity_flip_8.0=0x3 +phy_xaui_rx_polarity_flip_9.0=0x3 +phy_xaui_rx_polarity_flip_10.0=0x3 +phy_xaui_rx_polarity_flip_11.0=0x0 +phy_xaui_rx_polarity_flip_12.0=0x3 +phy_xaui_rx_polarity_flip_13.0=0x3 +phy_xaui_rx_polarity_flip_14.0=0x3 +phy_xaui_tx_polarity_flip_1.0=0x0 +phy_xaui_tx_polarity_flip_2.0=0xe +phy_xaui_tx_polarity_flip_3.0=0x2 +phy_xaui_tx_polarity_flip_4.0=0x0 +phy_xaui_tx_polarity_flip_5.0=0x2 +phy_xaui_tx_polarity_flip_6.0=0x3 +phy_xaui_tx_polarity_flip_7.0=0x0 +phy_xaui_tx_polarity_flip_8.0=0x3 +phy_xaui_tx_polarity_flip_9.0=0x3 +phy_xaui_tx_polarity_flip_10.0=0x3 +phy_xaui_tx_polarity_flip_11.0=0x0 +phy_xaui_tx_polarity_flip_12.0=0x3 +phy_xaui_tx_polarity_flip_13.0=0x3 +phy_xaui_tx_polarity_flip_14.0=0x3 +port_phy_addr_1.0=0xff +port_phy_addr_2.0=0xff +port_phy_addr_3.0=0xff +port_phy_addr_4.0=0xff +port_phy_addr_5.0=0xff +port_phy_addr_6.0=0xff +port_phy_addr_7.0=0xff +port_phy_addr_8.0=0xff +port_phy_addr_9.0=0xff +port_phy_addr_10.0=0xff +port_phy_addr_11.0=0xff +port_phy_addr_12.0=0xff +port_phy_addr_13.0=0xff +port_phy_addr_14.0=0xff +xgxs_rx_lane_map_1.0=0x3210 +xgxs_rx_lane_map_2.0=0x3210 +xgxs_rx_lane_map_3.0=0x3210 +xgxs_rx_lane_map_4.0=0x3210 +xgxs_rx_lane_map_5.0=0x3210 +xgxs_rx_lane_map_6.0=0x3210 +xgxs_rx_lane_map_7.0=0x0123 +xgxs_rx_lane_map_8.0=0x0123 +xgxs_rx_lane_map_9.0=0x2301 +xgxs_rx_lane_map_10.0=0x2301 +xgxs_rx_lane_map_11.0=0x0123 +xgxs_rx_lane_map_12.0=0x0123 +xgxs_rx_lane_map_13.0=0x2301 +xgxs_rx_lane_map_14.0=0x2301 +xgxs_tx_lane_map_1.0=0x0321 +xgxs_tx_lane_map_2.0=0x2301 +xgxs_tx_lane_map_3.0=0x0321 +xgxs_tx_lane_map_4.0=0x0321 +xgxs_tx_lane_map_5.0=0x2301 +xgxs_tx_lane_map_6.0=0x2301 +xgxs_tx_lane_map_7.0=0x0123 +xgxs_tx_lane_map_8.0=0x0123 +xgxs_tx_lane_map_9.0=0x0123 +xgxs_tx_lane_map_10.0=0x0123 +xgxs_tx_lane_map_11.0=0x0123 +xgxs_tx_lane_map_12.0=0x0123 +xgxs_tx_lane_map_13.0=0x0123 +xgxs_tx_lane_map_14.0=0x0123 + +# Q2 +portmap_34.0=33:50:2 +portmap_35.0=35:50:2 +portmap_36.0=37:50:2 +portmap_37.0=39:50:2 +portmap_38.0=41:50:2 +portmap_39.0=43:50:2 +portmap_40.0=45:50:2 +portmap_41.0=47:50:2 +portmap_42.0=49:50:2 +portmap_43.0=51:50:2 +portmap_44.0=53:50:2 +portmap_45.0=55:50:2 +portmap_46.0=57:100 +portmap_47.0=61:100 +phy_xaui_rx_polarity_flip_34.0=0x0 +phy_xaui_rx_polarity_flip_35.0=0x0 +phy_xaui_rx_polarity_flip_36.0=0x3 +phy_xaui_rx_polarity_flip_37.0=0x1 +phy_xaui_rx_polarity_flip_38.0=0x0 +phy_xaui_rx_polarity_flip_39.0=0x1 +phy_xaui_rx_polarity_flip_40.0=0x3 +phy_xaui_rx_polarity_flip_41.0=0x1 +phy_xaui_rx_polarity_flip_42.0=0x0 +phy_xaui_rx_polarity_flip_43.0=0x1 +phy_xaui_rx_polarity_flip_44.0=0x2 +phy_xaui_rx_polarity_flip_45.0=0x1 +phy_xaui_rx_polarity_flip_46.0=0x1 +phy_xaui_rx_polarity_flip_47.0=0x2 +phy_xaui_tx_polarity_flip_34.0=0x0 +phy_xaui_tx_polarity_flip_35.0=0x0 +phy_xaui_tx_polarity_flip_36.0=0x2 +phy_xaui_tx_polarity_flip_37.0=0x3 +phy_xaui_tx_polarity_flip_38.0=0x0 +phy_xaui_tx_polarity_flip_39.0=0x0 +phy_xaui_tx_polarity_flip_40.0=0x2 +phy_xaui_tx_polarity_flip_41.0=0x3 +phy_xaui_tx_polarity_flip_42.0=0x3 +phy_xaui_tx_polarity_flip_43.0=0x3 +phy_xaui_tx_polarity_flip_44.0=0x2 +phy_xaui_tx_polarity_flip_45.0=0x3 +phy_xaui_tx_polarity_flip_46.0=0x6 +phy_xaui_tx_polarity_flip_47.0=0xb +port_phy_addr_34.0=0xff +port_phy_addr_35.0=0xff +port_phy_addr_36.0=0xff +port_phy_addr_37.0=0xff +port_phy_addr_38.0=0xff +port_phy_addr_39.0=0xff +port_phy_addr_40.0=0xff +port_phy_addr_41.0=0xff +port_phy_addr_42.0=0xff +port_phy_addr_43.0=0xff +port_phy_addr_44.0=0xff +port_phy_addr_45.0=0xff +port_phy_addr_46.0=0xff +port_phy_addr_47.0=0xff +xgxs_rx_lane_map_34.0=0x0123 +xgxs_rx_lane_map_35.0=0x0123 +xgxs_rx_lane_map_36.0=0x0321 +xgxs_rx_lane_map_37.0=0x0321 +xgxs_rx_lane_map_38.0=0x0321 +xgxs_rx_lane_map_39.0=0x0321 +xgxs_rx_lane_map_40.0=0x0321 +xgxs_rx_lane_map_41.0=0x0321 +xgxs_rx_lane_map_42.0=0x1230 +xgxs_rx_lane_map_43.0=0x1230 +xgxs_rx_lane_map_44.0=0x2301 +xgxs_rx_lane_map_45.0=0x2301 +xgxs_rx_lane_map_46.0=0x1230 +xgxs_rx_lane_map_47.0=0x2103 +xgxs_tx_lane_map_34.0=0x2301 +xgxs_tx_lane_map_35.0=0x2301 +xgxs_tx_lane_map_36.0=0x0321 +xgxs_tx_lane_map_37.0=0x0321 +xgxs_tx_lane_map_38.0=0x2301 +xgxs_tx_lane_map_39.0=0x2301 +xgxs_tx_lane_map_40.0=0x0321 +xgxs_tx_lane_map_41.0=0x0321 +xgxs_tx_lane_map_42.0=0x0123 +xgxs_tx_lane_map_43.0=0x0123 +xgxs_tx_lane_map_44.0=0x1230 +xgxs_tx_lane_map_45.0=0x1230 +xgxs_tx_lane_map_46.0=0x2301 +xgxs_tx_lane_map_47.0=0x1032 + +# Q3 +portmap_68.0=65:100 +portmap_69.0=69:100 +portmap_70.0=73:50:2 +portmap_71.0=75:50:2 +portmap_72.0=77:50:2 +portmap_73.0=79:50:2 +portmap_74.0=81:50:2 +portmap_75.0=83:50:2 +portmap_76.0=85:50:2 +portmap_77.0=87:50:2 +portmap_78.0=89:50:2 +portmap_79.0=91:50:2 +portmap_80.0=93:50:2 +portmap_81.0=95:50:2 +phy_xaui_rx_polarity_flip_68.0=0xd +phy_xaui_rx_polarity_flip_69.0=0x6 +phy_xaui_rx_polarity_flip_70.0=0x1 +phy_xaui_rx_polarity_flip_71.0=0x0 +phy_xaui_rx_polarity_flip_72.0=0x0 +phy_xaui_rx_polarity_flip_73.0=0x2 +phy_xaui_rx_polarity_flip_74.0=0x3 +phy_xaui_rx_polarity_flip_75.0=0x1 +phy_xaui_rx_polarity_flip_76.0=0x0 +phy_xaui_rx_polarity_flip_77.0=0x3 +phy_xaui_rx_polarity_flip_78.0=0x3 +phy_xaui_rx_polarity_flip_79.0=0x1 +phy_xaui_rx_polarity_flip_80.0=0x0 +phy_xaui_rx_polarity_flip_81.0=0x2 +phy_xaui_tx_polarity_flip_68.0=0x9 +phy_xaui_tx_polarity_flip_69.0=0xb +phy_xaui_tx_polarity_flip_70.0=0x1 +phy_xaui_tx_polarity_flip_71.0=0x3 +phy_xaui_tx_polarity_flip_72.0=0x1 +phy_xaui_tx_polarity_flip_73.0=0x2 +phy_xaui_tx_polarity_flip_74.0=0x2 +phy_xaui_tx_polarity_flip_75.0=0x1 +phy_xaui_tx_polarity_flip_76.0=0x0 +phy_xaui_tx_polarity_flip_77.0=0x3 +phy_xaui_tx_polarity_flip_78.0=0x1 +phy_xaui_tx_polarity_flip_79.0=0x2 +phy_xaui_tx_polarity_flip_80.0=0x1 +phy_xaui_tx_polarity_flip_81.0=0x2 +port_phy_addr_68.0=0xff +port_phy_addr_69.0=0xff +port_phy_addr_70.0=0xff +port_phy_addr_71.0=0xff +port_phy_addr_72.0=0xff +port_phy_addr_73.0=0xff +port_phy_addr_74.0=0xff +port_phy_addr_75.0=0xff +port_phy_addr_76.0=0xff +port_phy_addr_77.0=0xff +port_phy_addr_78.0=0xff +port_phy_addr_79.0=0xff +port_phy_addr_80.0=0xff +port_phy_addr_81.0=0xff +xgxs_rx_lane_map_68.0=0x1230 +xgxs_rx_lane_map_69.0=0x2301 +xgxs_rx_lane_map_70.0=0x1230 +xgxs_rx_lane_map_71.0=0x1230 +xgxs_rx_lane_map_72.0=0x2103 +xgxs_rx_lane_map_73.0=0x2103 +xgxs_rx_lane_map_74.0=0x1230 +xgxs_rx_lane_map_75.0=0x1230 +xgxs_rx_lane_map_76.0=0x2301 +xgxs_rx_lane_map_77.0=0x2301 +xgxs_rx_lane_map_78.0=0x1230 +xgxs_rx_lane_map_79.0=0x1230 +xgxs_rx_lane_map_80.0=0x2103 +xgxs_rx_lane_map_81.0=0x2103 +xgxs_tx_lane_map_68.0=0x0123 +xgxs_tx_lane_map_69.0=0x1230 +xgxs_tx_lane_map_70.0=0x2301 +xgxs_tx_lane_map_71.0=0x2301 +xgxs_tx_lane_map_72.0=0x1032 +xgxs_tx_lane_map_73.0=0x1032 +xgxs_tx_lane_map_74.0=0x0123 +xgxs_tx_lane_map_75.0=0x0123 +xgxs_tx_lane_map_76.0=0x1230 +xgxs_tx_lane_map_77.0=0x1230 +xgxs_tx_lane_map_78.0=0x2301 +xgxs_tx_lane_map_79.0=0x2301 +xgxs_tx_lane_map_80.0=0x1032 +xgxs_tx_lane_map_81.0=0x1032 + +# Q4 +portmap_102.0=97:50:2 +portmap_103.0=99:50:2 +portmap_104.0=101:50:2 +portmap_105.0=103:50:2 +portmap_106.0=105:50:2 +portmap_107.0=107:50:2 +portmap_108.0=109:50:2 +portmap_109.0=111:50:2 +portmap_110.0=113:50:2 +portmap_111.0=115:50:2 +portmap_112.0=117:50:2 +portmap_113.0=119:50:2 +portmap_114.0=121:100 +portmap_115.0=125:100 +phy_xaui_rx_polarity_flip_102.0=0x3 +phy_xaui_rx_polarity_flip_103.0=0x2 +phy_xaui_rx_polarity_flip_104.0=0x0 +phy_xaui_rx_polarity_flip_105.0=0x3 +phy_xaui_rx_polarity_flip_106.0=0x3 +phy_xaui_rx_polarity_flip_107.0=0x0 +phy_xaui_rx_polarity_flip_108.0=0x0 +phy_xaui_rx_polarity_flip_109.0=0x3 +phy_xaui_rx_polarity_flip_110.0=0x3 +phy_xaui_rx_polarity_flip_111.0=0x2 +phy_xaui_rx_polarity_flip_112.0=0x1 +phy_xaui_rx_polarity_flip_113.0=0x1 +phy_xaui_rx_polarity_flip_114.0=0x1 +phy_xaui_rx_polarity_flip_115.0=0x9 +phy_xaui_tx_polarity_flip_102.0=0x2 +phy_xaui_tx_polarity_flip_103.0=0x1 +phy_xaui_tx_polarity_flip_104.0=0x3 +phy_xaui_tx_polarity_flip_105.0=0x2 +phy_xaui_tx_polarity_flip_106.0=0x2 +phy_xaui_tx_polarity_flip_107.0=0x1 +phy_xaui_tx_polarity_flip_108.0=0x3 +phy_xaui_tx_polarity_flip_109.0=0x2 +phy_xaui_tx_polarity_flip_110.0=0x2 +phy_xaui_tx_polarity_flip_111.0=0x1 +phy_xaui_tx_polarity_flip_112.0=0x3 +phy_xaui_tx_polarity_flip_113.0=0x3 +phy_xaui_tx_polarity_flip_114.0=0x6 +phy_xaui_tx_polarity_flip_115.0=0xc +port_phy_addr_102.0=0xff +port_phy_addr_103.0=0xff +port_phy_addr_104.0=0xff +port_phy_addr_105.0=0xff +port_phy_addr_106.0=0xff +port_phy_addr_107.0=0xff +port_phy_addr_108.0=0xff +port_phy_addr_109.0=0xff +port_phy_addr_110.0=0xff +port_phy_addr_111.0=0xff +port_phy_addr_112.0=0xff +port_phy_addr_113.0=0xff +port_phy_addr_114.0=0xff +port_phy_addr_115.0=0xff +xgxs_rx_lane_map_102.0=0x3210 +xgxs_rx_lane_map_103.0=0x3210 +xgxs_rx_lane_map_104.0=0x3210 +xgxs_rx_lane_map_105.0=0x3210 +xgxs_rx_lane_map_106.0=0x3210 +xgxs_rx_lane_map_107.0=0x3210 +xgxs_rx_lane_map_108.0=0x3210 +xgxs_rx_lane_map_109.0=0x3210 +xgxs_rx_lane_map_110.0=0x3210 +xgxs_rx_lane_map_111.0=0x3210 +xgxs_rx_lane_map_112.0=0x3210 +xgxs_rx_lane_map_114.0=0x3210 +xgxs_rx_lane_map_115.0=0x3210 +xgxs_tx_lane_map_102.0=0x0321 +xgxs_tx_lane_map_103.0=0x0321 +xgxs_tx_lane_map_104.0=0x2301 +xgxs_tx_lane_map_105.0=0x2301 +xgxs_tx_lane_map_106.0=0x0321 +xgxs_tx_lane_map_107.0=0x0321 +xgxs_tx_lane_map_108.0=0x2301 +xgxs_tx_lane_map_109.0=0x2301 +xgxs_tx_lane_map_110.0=0x0321 +xgxs_tx_lane_map_111.0=0x0321 +xgxs_tx_lane_map_112.0=0x2301 +xgxs_tx_lane_map_113.0=0x2301 +xgxs_tx_lane_map_114.0=0x0321 +xgxs_tx_lane_map_115.0=0x2301 + +# tuning parameters +serdes_driver_current_1=0xa +serdes_preemphasis_1=0x284008 +serdes_driver_current_2=0xa +serdes_preemphasis_2=0x284008 +serdes_driver_current_3=0xf +serdes_preemphasis_3=0x46408 +serdes_driver_current_4=0xf +serdes_preemphasis_4=0x46408 +serdes_driver_current_5=0xf +serdes_preemphasis_5=0x46408 +serdes_driver_current_6=0xf +serdes_preemphasis_6=0x46408 +serdes_driver_current_7=0xf +serdes_preemphasis_7=0x46408 +serdes_driver_current_8=0xf +serdes_preemphasis_8=0x46408 +serdes_driver_current_9=0xf +serdes_preemphasis_9=0x46408 +serdes_driver_current_10=0xf +serdes_preemphasis_10=0x46408 +serdes_driver_current_11=0xf +serdes_preemphasis_11=0x46408 +serdes_driver_current_12=0xf +serdes_preemphasis_12=0x46408 +serdes_driver_current_13=0xf +serdes_preemphasis_13=0x46408 +serdes_driver_current_14=0xf +serdes_preemphasis_14=0x46408 +serdes_driver_current_34=0xf +serdes_preemphasis_34=0x46408 +serdes_driver_current_35=0xf +serdes_preemphasis_35=0x46408 +serdes_driver_current_36=0xf +serdes_preemphasis_36=0x46408 +serdes_driver_current_37=0xf +serdes_preemphasis_37=0x46408 +serdes_driver_current_38=0xf +serdes_preemphasis_38=0x46408 +serdes_driver_current_39=0xf +serdes_preemphasis_39=0x46408 +serdes_driver_current_40=0xf +serdes_preemphasis_40=0x46408 +serdes_driver_current_41=0xf +serdes_preemphasis_41=0x46408 +serdes_driver_current_42=0xf +serdes_preemphasis_42=0x46408 +serdes_driver_current_43=0xf +serdes_preemphasis_43=0x46408 +serdes_driver_current_44=0xf +serdes_preemphasis_44=0x46408 +serdes_driver_current_45=0xf +serdes_preemphasis_45=0x46408 +serdes_driver_current_46=0xf +serdes_preemphasis_46=0x373108 +serdes_driver_current_47=0xf +serdes_preemphasis_47=0x373108 +serdes_driver_current_68=0xf +serdes_preemphasis_68=0x373108 +serdes_driver_current_69=0xf +serdes_preemphasis_69=0x373108 +serdes_driver_current_70=0xf +serdes_preemphasis_70=0x46408 +serdes_driver_current_71=0xf +serdes_preemphasis_71=0x46408 +serdes_driver_current_72=0xf +serdes_preemphasis_72=0x46408 +serdes_driver_current_73=0xf +serdes_preemphasis_73=0x46408 +serdes_driver_current_74=0xf +serdes_preemphasis_74=0x46408 +serdes_driver_current_75=0xf +serdes_preemphasis_75=0x46408 +serdes_driver_current_76=0xf +serdes_preemphasis_76=0x46408 +serdes_driver_current_77=0xf +serdes_preemphasis_77=0x46408 +serdes_driver_current_78=0xf +serdes_preemphasis_78=0x46408 +serdes_driver_current_79=0xf +serdes_preemphasis_79=0x46408 +serdes_driver_current_80=0xf +serdes_preemphasis_80=0x46408 +serdes_driver_current_81=0xf +serdes_preemphasis_81=0x46408 +serdes_driver_current_102=0xf +serdes_preemphasis_102=0x46408 +serdes_driver_current_103=0xf +serdes_preemphasis_103=0x46408 +serdes_driver_current_104=0xf +serdes_preemphasis_104=0x46408 +serdes_driver_current_105=0xf +serdes_preemphasis_105=0x46408 +serdes_driver_current_106=0xf +serdes_preemphasis_106=0x46408 +serdes_driver_current_107=0xf +serdes_preemphasis_107=0x46408 +serdes_driver_current_108=0xf +serdes_preemphasis_108=0x46408 +serdes_driver_current_109=0xf +serdes_preemphasis_109=0x46408 +serdes_driver_current_110=0xf +serdes_preemphasis_110=0x46408 +serdes_driver_current_111=0xf +serdes_preemphasis_111=0x46408 +serdes_driver_current_112=0xf +serdes_preemphasis_112=0x46408 +serdes_driver_current_113=0xf +serdes_preemphasis_113=0x46408 +serdes_driver_current_114=0xa +serdes_preemphasis_114=0x284008 +serdes_driver_current_115=0xa +serdes_preemphasis_115=0x284008 + +mmu_init_config="MSFT-TH-Tier0" diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/buffers.json.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/buffers.json.j2 new file mode 100644 index 00000000000..1083a6210fc --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..c0fa1ff0864 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/buffers_defaults_t0.j2 @@ -0,0 +1,61 @@ +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,6) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(10,22) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(24,32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(6,10) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(22,24) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "11213696", + "type": "ingress", + "mode": "dynamic", + "xoff": "3855488" + }, + "egress_lossy_pool": { + "size": "9532224", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"15982720" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/pg_profile_lookup.ini new file mode 100644 index 00000000000..7222f801492 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -4 2288 + 25000 5m 1248 2288 53248 -4 2288 + 40000 5m 1248 2288 66560 -4 2288 + 50000 5m 1248 2288 79872 -4 2288 + 100000 5m 1248 2288 165568 -4 2288 + 10000 40m 1248 2288 37024 -4 2288 + 25000 40m 1248 2288 56160 -4 2288 + 40000 40m 1248 2288 71552 -4 2288 + 50000 40m 1248 2288 85696 -4 2288 + 100000 40m 1248 2288 177632 -4 2288 + 10000 300m 1248 2288 46176 -4 2288 + 25000 300m 1248 2288 79040 -4 2288 + 40000 300m 1248 2288 108160 -4 2288 + 50000 300m 1248 2288 131456 -4 2288 + 100000 300m 1248 2288 268736 -4 2288 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/port_config.ini b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/port_config.ini new file mode 100644 index 00000000000..4ef0dce97b2 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 33,34,35,36 Ethernet1/1 1 100000 +Ethernet4 37,38,39,40 Ethernet2/1 2 100000 +Ethernet8 41,42,43,44 Ethernet3/1 3 40000 +Ethernet12 45,46,47,48 Ethernet4/1 4 40000 +Ethernet16 49,50,51,52 Ethernet5/1 5 40000 +Ethernet20 53,54,55,56 Ethernet6/1 6 40000 +Ethernet24 57,58,59,60 Ethernet7/1 7 40000 +Ethernet28 61,62,63,64 Ethernet8/1 8 40000 +Ethernet32 65,66,67,68 Ethernet9/1 9 100000 +Ethernet36 69,70,71,72 Ethernet10/1 10 100000 +Ethernet40 73,74,75,76 Ethernet11/1 11 40000 +Ethernet44 77,78,79,80 Ethernet12/1 12 40000 +Ethernet48 81,82,83,84 Ethernet13/1 13 40000 +Ethernet52 85,86,87,88 Ethernet14/1 14 40000 +Ethernet56 89,90,91,92 Ethernet15/1 15 40000 +Ethernet60 93,94,95,96 Ethernet16/1 16 40000 +Ethernet64 97,98,99,100 Ethernet17/1 17 100000 +Ethernet68 101,102,103,104 Ethernet18/1 18 100000 +Ethernet72 105,106,107,108 Ethernet19/1 19 40000 +Ethernet76 109,110,111,112 Ethernet20/1 20 40000 +Ethernet80 113,114,115,116 Ethernet21/1 21 40000 +Ethernet84 117,118,119,120 Ethernet22/1 22 40000 +Ethernet88 121,122,123,124 Ethernet23/1 23 40000 +Ethernet92 125,126,127,128 Ethernet24/1 24 40000 +Ethernet96 1,2,3,4 Ethernet25/1 25 100000 +Ethernet100 5,6,7,8 Ethernet26/1 26 100000 +Ethernet104 9,10,11,12 Ethernet27/1 27 40000 +Ethernet108 13,14,15,16 Ethernet28/1 28 40000 +Ethernet112 17,18,19,20 Ethernet29/1 29 40000 +Ethernet116 21,22,23,24 Ethernet30/1 30 40000 +Ethernet120 25,26,27,28 Ethernet31/1 31 40000 +Ethernet124 29,30,31,32 Ethernet32/1 32 40000 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/qos.json.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/sai.profile b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/sai.profile new file mode 100644 index 00000000000..42e0c57347a --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-8x100G+24x40G.config.bcm diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/th-a7060-cx32s-8x100G+24x40G.config.bcm b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/th-a7060-cx32s-8x100G+24x40G.config.bcm new file mode 100644 index 00000000000..7149b5e7ef5 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/th-a7060-cx32s-8x100G+24x40G.config.bcm @@ -0,0 +1,446 @@ +# Arista 7060CX-32S + +phy_an_allow_pll_change=1 +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=8 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +dma_desc_timeout_usec=15000000 +higig2_hdr_mode=1 +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +l2xmsg_mode=1 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +os=unix +oversubscribe_mode=1 +ptp_bs_fref.0=25000000 +ptp_ts_pll_fref.0=25000000 +robust_hash_disable_egress_vlan.0=1 +robust_hash_disable_mpls.0=1 +robust_hash_disable_vlan.0=1 +tdma_timeout_usec.0=15000000 +tslam_timeout_usec.0=15000000 +pbmp_xport_xe.0=0x7ffffffffffffffffffffffffffffffffe +phy_an_allow_pll_change_hg.0=0 +phy_an_c73_1.0=1 +phy_an_c73_2.0=1 +phy_an_c73_3.0=1 +phy_an_c73_4.0=1 +phy_an_c73_5.0=1 +phy_an_c73_6.0=1 +phy_an_c73_7.0=1 +phy_an_c73_8.0=1 +phy_an_c73_34.0=1 +phy_an_c73_35.0=1 +phy_an_c73_36.0=1 +phy_an_c73_37.0=1 +phy_an_c73_38.0=1 +phy_an_c73_39.0=1 +phy_an_c73_40.0=1 +phy_an_c73_41.0=1 +phy_an_c73_68.0=1 +phy_an_c73_69.0=1 +phy_an_c73_70.0=1 +phy_an_c73_71.0=1 +phy_an_c73_72.0=1 +phy_an_c73_73.0=1 +phy_an_c73_74.0=1 +phy_an_c73_75.0=1 +phy_an_c73_102.0=1 +phy_an_c73_103.0=1 +phy_an_c73_104.0=1 +phy_an_c73_105.0=1 +phy_an_c73_106.0=1 +phy_an_c73_107.0=1 +phy_an_c73_108.0=1 +phy_an_c73_109.0=1 +phy_an_fec_1.0=1 +phy_an_fec_2.0=1 +phy_an_fec_3.0=1 +phy_an_fec_4.0=1 +phy_an_fec_5.0=1 +phy_an_fec_6.0=1 +phy_an_fec_7.0=1 +phy_an_fec_8.0=1 +phy_an_fec_9.0=1 +phy_an_fec_10.0=1 +phy_an_fec_11.0=1 +phy_an_fec_12.0=1 +phy_an_fec_13.0=1 +phy_an_fec_14.0=1 +phy_an_fec_15.0=1 +phy_an_fec_16.0=1 +phy_an_fec_17.0=1 +phy_an_fec_18.0=1 +phy_an_fec_19.0=1 +phy_an_fec_20.0=1 +phy_an_fec_21.0=1 +phy_an_fec_22.0=1 +phy_an_fec_23.0=1 +phy_an_fec_24.0=1 +phy_an_fec_25.0=1 +phy_an_fec_26.0=1 +phy_an_fec_27.0=1 +phy_an_fec_28.0=1 +phy_an_fec_29.0=1 +phy_an_fec_30.0=1 +phy_an_fec_31.0=1 +phy_an_fec_32.0=1 +phy_an_fec_34.0=1 +phy_an_fec_38.0=1 +phy_an_fec_39.0=1 +phy_an_fec_40.0=1 +phy_an_fec_41.0=1 +phy_an_fec_42.0=1 +phy_an_fec_43.0=1 +phy_an_fec_44.0=1 +phy_an_fec_45.0=1 +phy_an_fec_46.0=1 +phy_an_fec_47.0=1 +phy_an_fec_48.0=1 +phy_an_fec_49.0=1 +phy_an_fec_50.0=1 +phy_an_fec_51.0=1 +phy_an_fec_52.0=1 +phy_an_fec_53.0=1 +phy_an_fec_54.0=1 +phy_an_fec_55.0=1 +phy_an_fec_56.0=1 +phy_an_fec_57.0=1 +phy_an_fec_58.0=1 +phy_an_fec_59.0=1 +phy_an_fec_60.0=1 +phy_an_fec_61.0=1 +phy_an_fec_62.0=1 +phy_an_fec_63.0=1 +phy_an_fec_64.0=1 +phy_an_fec_65.0=1 +phy_an_fec_68.0=1 +phy_an_fec_69.0=1 +phy_an_fec_70.0=1 +phy_an_fec_71.0=1 +phy_an_fec_72.0=1 +phy_an_fec_73.0=1 +phy_an_fec_74.0=1 +phy_an_fec_75.0=1 +phy_an_fec_76.0=1 +phy_an_fec_77.0=1 +phy_an_fec_78.0=1 +phy_an_fec_79.0=1 +phy_an_fec_80.0=1 +phy_an_fec_81.0=1 +phy_an_fec_82.0=1 +phy_an_fec_83.0=1 +phy_an_fec_84.0=1 +phy_an_fec_85.0=1 +phy_an_fec_86.0=1 +phy_an_fec_87.0=1 +phy_an_fec_88.0=1 +phy_an_fec_89.0=1 +phy_an_fec_90.0=1 +phy_an_fec_91.0=1 +phy_an_fec_92.0=1 +phy_an_fec_93.0=1 +phy_an_fec_94.0=1 +phy_an_fec_95.0=1 +phy_an_fec_96.0=1 +phy_an_fec_97.0=1 +phy_an_fec_98.0=1 +phy_an_fec_99.0=1 +phy_an_fec_102.0=1 +phy_an_fec_103.0=1 +phy_an_fec_104.0=1 +phy_an_fec_105.0=1 +phy_an_fec_106.0=1 +phy_an_fec_107.0=1 +phy_an_fec_108.0=1 +phy_an_fec_109.0=1 +phy_an_fec_110.0=1 +phy_an_fec_111.0=1 +phy_an_fec_112.0=1 +phy_an_fec_113.0=1 +phy_an_fec_114.0=1 +phy_an_fec_115.0=1 +phy_an_fec_116.0=1 +phy_an_fec_117.0=1 +phy_an_fec_118.0=1 +phy_an_fec_119.0=1 +phy_an_fec_120.0=1 +phy_an_fec_121.0=1 +phy_an_fec_122.0=1 +phy_an_fec_123.0=1 +phy_an_fec_124.0=1 +phy_an_fec_125.0=1 +phy_an_fec_126.0=1 +phy_an_fec_127.0=1 +phy_an_fec_128.0=1 +phy_an_fec_129.0=1 +phy_an_fec_130.0=1 +phy_an_fec_131.0=1 +phy_an_fec_132.0=1 +phy_an_fec_133.0=1 +phy_xaui_rx_polarity_flip_1.0=0x1 +phy_xaui_rx_polarity_flip_2.0=0x5 +phy_xaui_rx_polarity_flip_3.0=0x1 +phy_xaui_rx_polarity_flip_4.0=0x7 +phy_xaui_rx_polarity_flip_5.0=0xc +phy_xaui_rx_polarity_flip_6.0=0xf +phy_xaui_rx_polarity_flip_7.0=0xc +phy_xaui_rx_polarity_flip_8.0=0xf +phy_xaui_rx_polarity_flip_34.0=0x0 +phy_xaui_rx_polarity_flip_35.0=0x7 +phy_xaui_rx_polarity_flip_36.0=0x4 +phy_xaui_rx_polarity_flip_37.0=0x7 +phy_xaui_rx_polarity_flip_38.0=0x4 +phy_xaui_rx_polarity_flip_39.0=0x6 +phy_xaui_rx_polarity_flip_40.0=0x1 +phy_xaui_rx_polarity_flip_41.0=0x2 +phy_xaui_rx_polarity_flip_68.0=0xd +phy_xaui_rx_polarity_flip_69.0=0x6 +phy_xaui_rx_polarity_flip_70.0=0x1 +phy_xaui_rx_polarity_flip_71.0=0x8 +phy_xaui_rx_polarity_flip_72.0=0x7 +phy_xaui_rx_polarity_flip_73.0=0xc +phy_xaui_rx_polarity_flip_74.0=0x7 +phy_xaui_rx_polarity_flip_75.0=0x8 +phy_xaui_rx_polarity_flip_102.0=0xb +phy_xaui_rx_polarity_flip_103.0=0xc +phy_xaui_rx_polarity_flip_104.0=0x3 +phy_xaui_rx_polarity_flip_105.0=0xc +phy_xaui_rx_polarity_flip_106.0=0xb +phy_xaui_rx_polarity_flip_107.0=0x5 +phy_xaui_rx_polarity_flip_108.0=0x1 +phy_xaui_rx_polarity_flip_109.0=0x9 +phy_xaui_tx_polarity_flip_1.0=0x0 +phy_xaui_tx_polarity_flip_2.0=0xe +phy_xaui_tx_polarity_flip_3.0=0x2 +phy_xaui_tx_polarity_flip_4.0=0xe +phy_xaui_tx_polarity_flip_5.0=0xc +phy_xaui_tx_polarity_flip_6.0=0xf +phy_xaui_tx_polarity_flip_7.0=0xc +phy_xaui_tx_polarity_flip_8.0=0xf +phy_xaui_tx_polarity_flip_34.0=0x0 +phy_xaui_tx_polarity_flip_35.0=0xe +phy_xaui_tx_polarity_flip_36.0=0x0 +phy_xaui_tx_polarity_flip_37.0=0xe +phy_xaui_tx_polarity_flip_38.0=0xf +phy_xaui_tx_polarity_flip_39.0=0xe +phy_xaui_tx_polarity_flip_40.0=0x6 +phy_xaui_tx_polarity_flip_41.0=0xb +phy_xaui_tx_polarity_flip_68.0=0x9 +phy_xaui_tx_polarity_flip_69.0=0xb +phy_xaui_tx_polarity_flip_70.0=0xd +phy_xaui_tx_polarity_flip_71.0=0x9 +phy_xaui_tx_polarity_flip_72.0=0x6 +phy_xaui_tx_polarity_flip_73.0=0xc +phy_xaui_tx_polarity_flip_74.0=0x9 +phy_xaui_tx_polarity_flip_75.0=0x9 +phy_xaui_tx_polarity_flip_102.0=0x6 +phy_xaui_tx_polarity_flip_103.0=0xb +phy_xaui_tx_polarity_flip_104.0=0x6 +phy_xaui_tx_polarity_flip_105.0=0xb +phy_xaui_tx_polarity_flip_106.0=0x6 +phy_xaui_tx_polarity_flip_107.0=0xf +phy_xaui_tx_polarity_flip_108.0=0x6 +phy_xaui_tx_polarity_flip_109.0=0xc +portmap_1.0=1:100 +portmap_2.0=5:100 +portmap_3.0=9:40 +portmap_4.0=13:40 +portmap_5.0=17:40 +portmap_6.0=21:40 +portmap_7.0=25:40 +portmap_8.0=29:40 +portmap_34.0=33:100 +portmap_35.0=37:100 +portmap_36.0=41:40 +portmap_37.0=45:40 +portmap_38.0=49:40 +portmap_39.0=53:40 +portmap_40.0=57:40 +portmap_41.0=61:40 +portmap_68.0=65:100 +portmap_69.0=69:100 +portmap_70.0=73:40 +portmap_71.0=77:40 +portmap_72.0=81:40 +portmap_73.0=85:40 +portmap_74.0=89:40 +portmap_75.0=93:40 +portmap_102.0=97:100 +portmap_103.0=101:100 +portmap_104.0=105:40 +portmap_105.0=109:40 +portmap_106.0=113:40 +portmap_107.0=117:40 +portmap_108.0=121:40 +portmap_109.0=125:40 +port_phy_addr_1.0=0xff +port_phy_addr_2.0=0xff +port_phy_addr_3.0=0xff +port_phy_addr_4.0=0xff +port_phy_addr_5.0=0xff +port_phy_addr_6.0=0xff +port_phy_addr_7.0=0xff +port_phy_addr_8.0=0xff +port_phy_addr_34.0=0xff +port_phy_addr_35.0=0xff +port_phy_addr_36.0=0xff +port_phy_addr_37.0=0xff +port_phy_addr_38.0=0xff +port_phy_addr_39.0=0xff +port_phy_addr_40.0=0xff +port_phy_addr_41.0=0xff +port_phy_addr_68.0=0xff +port_phy_addr_69.0=0xff +port_phy_addr_70.0=0xff +port_phy_addr_71.0=0xff +port_phy_addr_72.0=0xff +port_phy_addr_73.0=0xff +port_phy_addr_74.0=0xff +port_phy_addr_75.0=0xff +port_phy_addr_102.0=0xff +port_phy_addr_103.0=0xff +port_phy_addr_104.0=0xff +port_phy_addr_105.0=0xff +port_phy_addr_106.0=0xff +port_phy_addr_107.0=0xff +port_phy_addr_108.0=0xff +port_phy_addr_109.0=0xff +xgxs_rx_lane_map_1.0=0x3210 +xgxs_rx_lane_map_2.0=0x3210 +xgxs_rx_lane_map_3.0=0x3210 +xgxs_rx_lane_map_4.0=0x3210 +xgxs_rx_lane_map_5.0=0x0123 +xgxs_rx_lane_map_6.0=0x2301 +xgxs_rx_lane_map_7.0=0x0123 +xgxs_rx_lane_map_8.0=0x2301 +xgxs_rx_lane_map_34.0=0x0123 +xgxs_rx_lane_map_35.0=0x0321 +xgxs_rx_lane_map_36.0=0x0321 +xgxs_rx_lane_map_37.0=0x0321 +xgxs_rx_lane_map_38.0=0x1230 +xgxs_rx_lane_map_39.0=0x2301 +xgxs_rx_lane_map_40.0=0x1230 +xgxs_rx_lane_map_41.0=0x2103 +xgxs_rx_lane_map_68.0=0x1230 +xgxs_rx_lane_map_69.0=0x2301 +xgxs_rx_lane_map_70.0=0x1230 +xgxs_rx_lane_map_71.0=0x2103 +xgxs_rx_lane_map_72.0=0x1230 +xgxs_rx_lane_map_73.0=0x2301 +xgxs_rx_lane_map_74.0=0x1230 +xgxs_rx_lane_map_75.0=0x2103 +xgxs_rx_lane_map_102.0=0x3210 +xgxs_rx_lane_map_103.0=0x3210 +xgxs_rx_lane_map_104.0=0x3210 +xgxs_rx_lane_map_105.0=0x3210 +xgxs_rx_lane_map_106.0=0x3210 +xgxs_rx_lane_map_107.0=0x3210 +xgxs_rx_lane_map_108.0=0x3210 +xgxs_rx_lane_map_109.0=0x3210 +xgxs_tx_lane_map_1.0=0x0321 +xgxs_tx_lane_map_2.0=0x2301 +xgxs_tx_lane_map_3.0=0x0321 +xgxs_tx_lane_map_4.0=0x2301 +xgxs_tx_lane_map_5.0=0x0123 +xgxs_tx_lane_map_6.0=0x0123 +xgxs_tx_lane_map_7.0=0x0123 +xgxs_tx_lane_map_8.0=0x0123 +xgxs_tx_lane_map_34.0=0x2301 +xgxs_tx_lane_map_35.0=0x0321 +xgxs_tx_lane_map_36.0=0x2301 +xgxs_tx_lane_map_37.0=0x0321 +xgxs_tx_lane_map_38.0=0x0123 +xgxs_tx_lane_map_39.0=0x1230 +xgxs_tx_lane_map_40.0=0x2301 +xgxs_tx_lane_map_41.0=0x1032 +xgxs_tx_lane_map_68.0=0x0123 +xgxs_tx_lane_map_69.0=0x1230 +xgxs_tx_lane_map_70.0=0x2301 +xgxs_tx_lane_map_71.0=0x1032 +xgxs_tx_lane_map_72.0=0x0123 +xgxs_tx_lane_map_73.0=0x1230 +xgxs_tx_lane_map_74.0=0x2301 +xgxs_tx_lane_map_75.0=0x1032 +xgxs_tx_lane_map_102.0=0x0321 +xgxs_tx_lane_map_103.0=0x2301 +xgxs_tx_lane_map_104.0=0x0321 +xgxs_tx_lane_map_105.0=0x2301 +xgxs_tx_lane_map_106.0=0x0321 +xgxs_tx_lane_map_107.0=0x2301 +xgxs_tx_lane_map_108.0=0x0321 +xgxs_tx_lane_map_109.0=0x2301 + +# tuning parameters for 25g serdes fiber +serdes_driver_current_1=0xa +serdes_preemphasis_1=0x284008 +serdes_driver_current_2=0xa +serdes_preemphasis_2=0x284008 +serdes_driver_current_3=0x8 +serdes_preemphasis_3=0x185800 +serdes_driver_current_4=0x8 +serdes_preemphasis_4=0x185800 +serdes_driver_current_5=0x8 +serdes_preemphasis_5=0x185800 +serdes_driver_current_6=0x8 +serdes_preemphasis_6=0x185800 +serdes_driver_current_7=0xf +serdes_preemphasis_7=0x205000 +serdes_driver_current_8=0xf +serdes_preemphasis_8=0x205000 +serdes_driver_current_34=0xd +serdes_preemphasis_34=0x303808 +serdes_driver_current_35=0xd +serdes_preemphasis_35=0x303808 +serdes_driver_current_36=0xf +serdes_preemphasis_36=0x205000 +serdes_driver_current_37=0xf +serdes_preemphasis_37=0x205000 +serdes_driver_current_38=0x8 +serdes_preemphasis_38=0x185800 +serdes_driver_current_39=0x8 +serdes_preemphasis_39=0x185800 +serdes_driver_current_40=0x8 +serdes_preemphasis_40=0x185800 +serdes_driver_current_41=0x8 +serdes_preemphasis_41=0x185800 +serdes_driver_current_68=0xf +serdes_preemphasis_68=0x373108 +serdes_driver_current_69=0xf +serdes_preemphasis_69=0x373108 +serdes_driver_current_70=0x4 +serdes_preemphasis_70=0x145c00 +serdes_driver_current_71=0x4 +serdes_preemphasis_71=0x145c00 +serdes_driver_current_72=0x4 +serdes_preemphasis_72=0x145c00 +serdes_driver_current_73=0x4 +serdes_preemphasis_73=0x145c00 +serdes_driver_current_74=0x4 +serdes_preemphasis_74=0x145c00 +serdes_driver_current_75=0x4 +serdes_preemphasis_75=0x145c00 +serdes_driver_current_102=0xa +serdes_preemphasis_102=0x284008 +serdes_driver_current_103=0xa +serdes_preemphasis_103=0x284008 +serdes_driver_current_104=0x4 +serdes_preemphasis_104=0x145c00 +serdes_driver_current_105=0x4 +serdes_preemphasis_105=0x145c00 +serdes_driver_current_106=0x4 +serdes_preemphasis_106=0x145c00 +serdes_driver_current_107=0x4 +serdes_preemphasis_107=0x145c00 +serdes_driver_current_108=0x4 +serdes_preemphasis_108=0x145c00 +serdes_driver_current_109=0x4 +serdes_preemphasis_109=0x145c00 + +mmu_init_config="MSFT-TH-Tier1" diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/buffers.json.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..0869e63968a --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/buffers_defaults_t0.j2 @@ -0,0 +1,47 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,128,4) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10875072", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_lossy_pool": { + "size": "9243812", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"15982720" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..80e96bdceca --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/buffers_defaults_t1.j2 @@ -0,0 +1,47 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,128,4) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10875072", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_lossy_pool": { + "size": "9243812", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"15982720" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/pg_profile_lookup.ini new file mode 100644 index 00000000000..aedda37a887 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -3 2288 + 25000 5m 1248 2288 53248 -3 2288 + 40000 5m 1248 2288 66560 -3 2288 + 50000 5m 1248 2288 90272 -3 2288 + 100000 5m 1248 2288 165568 -3 2288 + 10000 40m 1248 2288 37024 -3 2288 + 25000 40m 1248 2288 53248 -3 2288 + 40000 40m 1248 2288 71552 -3 2288 + 50000 40m 1248 2288 96096 -3 2288 + 100000 40m 1248 2288 177632 -3 2288 + 10000 300m 1248 2288 46176 -3 2288 + 25000 300m 1248 2288 79040 -3 2288 + 40000 300m 1248 2288 108160 -3 2288 + 50000 300m 1248 2288 141856 -3 2288 + 100000 300m 1248 2288 268736 -3 2288 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/port_config.ini b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/port_config.ini new file mode 100644 index 00000000000..bfe4a721141 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index +Ethernet0 33,34,35,36 Ethernet1/1 1 +Ethernet4 37,38,39,40 Ethernet2/1 2 +Ethernet8 41,42,43,44 Ethernet3/1 3 +Ethernet12 45,46,47,48 Ethernet4/1 4 +Ethernet16 49,50,51,52 Ethernet5/1 5 +Ethernet20 53,54,55,56 Ethernet6/1 6 +Ethernet24 57,58,59,60 Ethernet7/1 7 +Ethernet28 61,62,63,64 Ethernet8/1 8 +Ethernet32 65,66,67,68 Ethernet9/1 9 +Ethernet36 69,70,71,72 Ethernet10/1 10 +Ethernet40 73,74,75,76 Ethernet11/1 11 +Ethernet44 77,78,79,80 Ethernet12/1 12 +Ethernet48 81,82,83,84 Ethernet13/1 13 +Ethernet52 85,86,87,88 Ethernet14/1 14 +Ethernet56 89,90,91,92 Ethernet15/1 15 +Ethernet60 93,94,95,96 Ethernet16/1 16 +Ethernet64 97,98,99,100 Ethernet17/1 17 +Ethernet68 101,102,103,104 Ethernet18/1 18 +Ethernet72 105,106,107,108 Ethernet19/1 19 +Ethernet76 109,110,111,112 Ethernet20/1 20 +Ethernet80 113,114,115,116 Ethernet21/1 21 +Ethernet84 117,118,119,120 Ethernet22/1 22 +Ethernet88 121,122,123,124 Ethernet23/1 23 +Ethernet92 125,126,127,128 Ethernet24/1 24 +Ethernet96 1,2,3,4 Ethernet25/1 25 +Ethernet100 5,6,7,8 Ethernet26/1 26 +Ethernet104 9,10,11,12 Ethernet27/1 27 +Ethernet108 13,14,15,16 Ethernet28/1 28 +Ethernet112 17,18,19,20 Ethernet29/1 29 +Ethernet116 21,22,23,24 Ethernet30/1 30 +Ethernet120 25,26,27,28 Ethernet31/1 31 +Ethernet124 29,30,31,32 Ethernet32/1 32 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/qos.json.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/sai.profile.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/sai.profile.j2 new file mode 100644 index 00000000000..638fd28b076 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/sai.profile.j2 @@ -0,0 +1,13 @@ +{# Get sai.profile based on switch_role #} +{%- if DEVICE_METADATA is defined -%} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] -%} +{%- if switch_role.lower() == 'torrouter' %} +{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-32x40G-t0.config.bcm' -%} +{%- else %} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-32x40G-t1.config.bcm' -%} +{%- endif %} +{%- else %} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-32x40G-t1.config.bcm' -%} +{%- endif %} +{# Write the contents of sai_ profile_filename to sai.profile file #} +{{ sai_profile_contents }} diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t0.config.bcm b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t0.config.bcm new file mode 100644 index 00000000000..0cb4ae4a474 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t0.config.bcm @@ -0,0 +1,444 @@ +# Arista 7060CX-32S + +phy_an_allow_pll_change=1 +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=8 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +dma_desc_timeout_usec=15000000 +higig2_hdr_mode=1 +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +l2xmsg_mode=1 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +os=unix +oversubscribe_mode=1 +ptp_bs_fref.0=25000000 +ptp_ts_pll_fref.0=25000000 +robust_hash_disable_egress_vlan.0=1 +robust_hash_disable_mpls.0=1 +robust_hash_disable_vlan.0=1 +tdma_timeout_usec.0=15000000 +tslam_timeout_usec.0=15000000 +pbmp_xport_xe.0=0x7ffffffffffffffffffffffffffffffffe +phy_an_allow_pll_change_hg.0=0 +phy_an_c73_1.0=1 +phy_an_c73_2.0=1 +phy_an_c73_3.0=1 +phy_an_c73_4.0=1 +phy_an_c73_5.0=1 +phy_an_c73_6.0=1 +phy_an_c73_7.0=1 +phy_an_c73_8.0=1 +phy_an_c73_34.0=1 +phy_an_c73_35.0=1 +phy_an_c73_36.0=1 +phy_an_c73_37.0=1 +phy_an_c73_38.0=1 +phy_an_c73_39.0=1 +phy_an_c73_40.0=1 +phy_an_c73_41.0=1 +phy_an_c73_68.0=1 +phy_an_c73_69.0=1 +phy_an_c73_70.0=1 +phy_an_c73_71.0=1 +phy_an_c73_72.0=1 +phy_an_c73_73.0=1 +phy_an_c73_74.0=1 +phy_an_c73_75.0=1 +phy_an_c73_102.0=1 +phy_an_c73_103.0=1 +phy_an_c73_104.0=1 +phy_an_c73_105.0=1 +phy_an_c73_106.0=1 +phy_an_c73_107.0=1 +phy_an_c73_108.0=1 +phy_an_c73_109.0=1 +phy_an_fec_1.0=1 +phy_an_fec_2.0=1 +phy_an_fec_3.0=1 +phy_an_fec_4.0=1 +phy_an_fec_5.0=1 +phy_an_fec_6.0=1 +phy_an_fec_7.0=1 +phy_an_fec_8.0=1 +phy_an_fec_9.0=1 +phy_an_fec_10.0=1 +phy_an_fec_11.0=1 +phy_an_fec_12.0=1 +phy_an_fec_13.0=1 +phy_an_fec_14.0=1 +phy_an_fec_15.0=1 +phy_an_fec_16.0=1 +phy_an_fec_17.0=1 +phy_an_fec_18.0=1 +phy_an_fec_19.0=1 +phy_an_fec_20.0=1 +phy_an_fec_21.0=1 +phy_an_fec_22.0=1 +phy_an_fec_23.0=1 +phy_an_fec_24.0=1 +phy_an_fec_25.0=1 +phy_an_fec_26.0=1 +phy_an_fec_27.0=1 +phy_an_fec_28.0=1 +phy_an_fec_29.0=1 +phy_an_fec_30.0=1 +phy_an_fec_31.0=1 +phy_an_fec_32.0=1 +phy_an_fec_34.0=1 +phy_an_fec_38.0=1 +phy_an_fec_39.0=1 +phy_an_fec_40.0=1 +phy_an_fec_41.0=1 +phy_an_fec_42.0=1 +phy_an_fec_43.0=1 +phy_an_fec_44.0=1 +phy_an_fec_45.0=1 +phy_an_fec_46.0=1 +phy_an_fec_47.0=1 +phy_an_fec_48.0=1 +phy_an_fec_49.0=1 +phy_an_fec_50.0=1 +phy_an_fec_51.0=1 +phy_an_fec_52.0=1 +phy_an_fec_53.0=1 +phy_an_fec_54.0=1 +phy_an_fec_55.0=1 +phy_an_fec_56.0=1 +phy_an_fec_57.0=1 +phy_an_fec_58.0=1 +phy_an_fec_59.0=1 +phy_an_fec_60.0=1 +phy_an_fec_61.0=1 +phy_an_fec_62.0=1 +phy_an_fec_63.0=1 +phy_an_fec_64.0=1 +phy_an_fec_65.0=1 +phy_an_fec_68.0=1 +phy_an_fec_69.0=1 +phy_an_fec_70.0=1 +phy_an_fec_71.0=1 +phy_an_fec_72.0=1 +phy_an_fec_73.0=1 +phy_an_fec_74.0=1 +phy_an_fec_75.0=1 +phy_an_fec_76.0=1 +phy_an_fec_77.0=1 +phy_an_fec_78.0=1 +phy_an_fec_79.0=1 +phy_an_fec_80.0=1 +phy_an_fec_81.0=1 +phy_an_fec_82.0=1 +phy_an_fec_83.0=1 +phy_an_fec_84.0=1 +phy_an_fec_85.0=1 +phy_an_fec_86.0=1 +phy_an_fec_87.0=1 +phy_an_fec_88.0=1 +phy_an_fec_89.0=1 +phy_an_fec_90.0=1 +phy_an_fec_91.0=1 +phy_an_fec_92.0=1 +phy_an_fec_93.0=1 +phy_an_fec_94.0=1 +phy_an_fec_95.0=1 +phy_an_fec_96.0=1 +phy_an_fec_97.0=1 +phy_an_fec_98.0=1 +phy_an_fec_99.0=1 +phy_an_fec_102.0=1 +phy_an_fec_103.0=1 +phy_an_fec_104.0=1 +phy_an_fec_105.0=1 +phy_an_fec_106.0=1 +phy_an_fec_107.0=1 +phy_an_fec_108.0=1 +phy_an_fec_109.0=1 +phy_an_fec_110.0=1 +phy_an_fec_111.0=1 +phy_an_fec_112.0=1 +phy_an_fec_113.0=1 +phy_an_fec_114.0=1 +phy_an_fec_115.0=1 +phy_an_fec_116.0=1 +phy_an_fec_117.0=1 +phy_an_fec_118.0=1 +phy_an_fec_119.0=1 +phy_an_fec_120.0=1 +phy_an_fec_121.0=1 +phy_an_fec_122.0=1 +phy_an_fec_123.0=1 +phy_an_fec_124.0=1 +phy_an_fec_125.0=1 +phy_an_fec_126.0=1 +phy_an_fec_127.0=1 +phy_an_fec_128.0=1 +phy_an_fec_129.0=1 +phy_an_fec_130.0=1 +phy_an_fec_131.0=1 +phy_an_fec_132.0=1 +phy_an_fec_133.0=1 +phy_xaui_rx_polarity_flip_1.0=0x1 +phy_xaui_rx_polarity_flip_2.0=0x5 +phy_xaui_rx_polarity_flip_3.0=0x1 +phy_xaui_rx_polarity_flip_4.0=0x7 +phy_xaui_rx_polarity_flip_5.0=0xc +phy_xaui_rx_polarity_flip_6.0=0xf +phy_xaui_rx_polarity_flip_7.0=0xc +phy_xaui_rx_polarity_flip_8.0=0xf +phy_xaui_rx_polarity_flip_34.0=0x0 +phy_xaui_rx_polarity_flip_35.0=0x7 +phy_xaui_rx_polarity_flip_36.0=0x4 +phy_xaui_rx_polarity_flip_37.0=0x7 +phy_xaui_rx_polarity_flip_38.0=0x4 +phy_xaui_rx_polarity_flip_39.0=0x6 +phy_xaui_rx_polarity_flip_40.0=0x1 +phy_xaui_rx_polarity_flip_41.0=0x2 +phy_xaui_rx_polarity_flip_68.0=0xd +phy_xaui_rx_polarity_flip_69.0=0x6 +phy_xaui_rx_polarity_flip_70.0=0x1 +phy_xaui_rx_polarity_flip_71.0=0x8 +phy_xaui_rx_polarity_flip_72.0=0x7 +phy_xaui_rx_polarity_flip_73.0=0xc +phy_xaui_rx_polarity_flip_74.0=0x7 +phy_xaui_rx_polarity_flip_75.0=0x8 +phy_xaui_rx_polarity_flip_102.0=0xb +phy_xaui_rx_polarity_flip_103.0=0xc +phy_xaui_rx_polarity_flip_104.0=0x3 +phy_xaui_rx_polarity_flip_105.0=0xc +phy_xaui_rx_polarity_flip_106.0=0xb +phy_xaui_rx_polarity_flip_107.0=0x5 +phy_xaui_rx_polarity_flip_108.0=0x1 +phy_xaui_rx_polarity_flip_109.0=0x9 +phy_xaui_tx_polarity_flip_1.0=0x0 +phy_xaui_tx_polarity_flip_2.0=0xe +phy_xaui_tx_polarity_flip_3.0=0x2 +phy_xaui_tx_polarity_flip_4.0=0xe +phy_xaui_tx_polarity_flip_5.0=0xc +phy_xaui_tx_polarity_flip_6.0=0xf +phy_xaui_tx_polarity_flip_7.0=0xc +phy_xaui_tx_polarity_flip_8.0=0xf +phy_xaui_tx_polarity_flip_34.0=0x0 +phy_xaui_tx_polarity_flip_35.0=0xe +phy_xaui_tx_polarity_flip_36.0=0x0 +phy_xaui_tx_polarity_flip_37.0=0xe +phy_xaui_tx_polarity_flip_38.0=0xf +phy_xaui_tx_polarity_flip_39.0=0xe +phy_xaui_tx_polarity_flip_40.0=0x6 +phy_xaui_tx_polarity_flip_41.0=0xb +phy_xaui_tx_polarity_flip_68.0=0x9 +phy_xaui_tx_polarity_flip_69.0=0xb +phy_xaui_tx_polarity_flip_70.0=0xd +phy_xaui_tx_polarity_flip_71.0=0x9 +phy_xaui_tx_polarity_flip_72.0=0x6 +phy_xaui_tx_polarity_flip_73.0=0xc +phy_xaui_tx_polarity_flip_74.0=0x9 +phy_xaui_tx_polarity_flip_75.0=0x9 +phy_xaui_tx_polarity_flip_102.0=0x6 +phy_xaui_tx_polarity_flip_103.0=0xb +phy_xaui_tx_polarity_flip_104.0=0x6 +phy_xaui_tx_polarity_flip_105.0=0xb +phy_xaui_tx_polarity_flip_106.0=0x6 +phy_xaui_tx_polarity_flip_107.0=0xf +phy_xaui_tx_polarity_flip_108.0=0x6 +phy_xaui_tx_polarity_flip_109.0=0xc +portmap_1.0=1:40 +portmap_2.0=5:40 +portmap_3.0=9:40 +portmap_4.0=13:40 +portmap_5.0=17:40 +portmap_6.0=21:40 +portmap_7.0=25:40 +portmap_8.0=29:40 +portmap_34.0=33:40 +portmap_35.0=37:40 +portmap_36.0=41:40 +portmap_37.0=45:40 +portmap_38.0=49:40 +portmap_39.0=53:40 +portmap_40.0=57:40 +portmap_41.0=61:40 +portmap_68.0=65:40 +portmap_69.0=69:40 +portmap_70.0=73:40 +portmap_71.0=77:40 +portmap_72.0=81:40 +portmap_73.0=85:40 +portmap_74.0=89:40 +portmap_75.0=93:40 +portmap_102.0=97:40 +portmap_103.0=101:40 +portmap_104.0=105:40 +portmap_105.0=109:40 +portmap_106.0=113:40 +portmap_107.0=117:40 +portmap_108.0=121:40 +portmap_109.0=125:40 +port_phy_addr_1.0=0xff +port_phy_addr_2.0=0xff +port_phy_addr_3.0=0xff +port_phy_addr_4.0=0xff +port_phy_addr_5.0=0xff +port_phy_addr_6.0=0xff +port_phy_addr_7.0=0xff +port_phy_addr_8.0=0xff +port_phy_addr_34.0=0xff +port_phy_addr_35.0=0xff +port_phy_addr_36.0=0xff +port_phy_addr_37.0=0xff +port_phy_addr_38.0=0xff +port_phy_addr_39.0=0xff +port_phy_addr_40.0=0xff +port_phy_addr_41.0=0xff +port_phy_addr_68.0=0xff +port_phy_addr_69.0=0xff +port_phy_addr_70.0=0xff +port_phy_addr_71.0=0xff +port_phy_addr_72.0=0xff +port_phy_addr_73.0=0xff +port_phy_addr_74.0=0xff +port_phy_addr_75.0=0xff +port_phy_addr_102.0=0xff +port_phy_addr_103.0=0xff +port_phy_addr_104.0=0xff +port_phy_addr_105.0=0xff +port_phy_addr_106.0=0xff +port_phy_addr_107.0=0xff +port_phy_addr_108.0=0xff +port_phy_addr_109.0=0xff +xgxs_rx_lane_map_1.0=0x3210 +xgxs_rx_lane_map_2.0=0x3210 +xgxs_rx_lane_map_3.0=0x3210 +xgxs_rx_lane_map_4.0=0x3210 +xgxs_rx_lane_map_5.0=0x0123 +xgxs_rx_lane_map_6.0=0x2301 +xgxs_rx_lane_map_7.0=0x0123 +xgxs_rx_lane_map_8.0=0x2301 +xgxs_rx_lane_map_34.0=0x0123 +xgxs_rx_lane_map_35.0=0x0321 +xgxs_rx_lane_map_36.0=0x0321 +xgxs_rx_lane_map_37.0=0x0321 +xgxs_rx_lane_map_38.0=0x1230 +xgxs_rx_lane_map_39.0=0x2301 +xgxs_rx_lane_map_40.0=0x1230 +xgxs_rx_lane_map_41.0=0x2103 +xgxs_rx_lane_map_68.0=0x1230 +xgxs_rx_lane_map_69.0=0x2301 +xgxs_rx_lane_map_70.0=0x1230 +xgxs_rx_lane_map_71.0=0x2103 +xgxs_rx_lane_map_72.0=0x1230 +xgxs_rx_lane_map_73.0=0x2301 +xgxs_rx_lane_map_74.0=0x1230 +xgxs_rx_lane_map_75.0=0x2103 +xgxs_rx_lane_map_102.0=0x3210 +xgxs_rx_lane_map_103.0=0x3210 +xgxs_rx_lane_map_104.0=0x3210 +xgxs_rx_lane_map_105.0=0x3210 +xgxs_rx_lane_map_106.0=0x3210 +xgxs_rx_lane_map_107.0=0x3210 +xgxs_rx_lane_map_108.0=0x3210 +xgxs_rx_lane_map_109.0=0x3210 +xgxs_tx_lane_map_1.0=0x0321 +xgxs_tx_lane_map_2.0=0x2301 +xgxs_tx_lane_map_3.0=0x0321 +xgxs_tx_lane_map_4.0=0x2301 +xgxs_tx_lane_map_5.0=0x0123 +xgxs_tx_lane_map_6.0=0x0123 +xgxs_tx_lane_map_7.0=0x0123 +xgxs_tx_lane_map_8.0=0x0123 +xgxs_tx_lane_map_34.0=0x2301 +xgxs_tx_lane_map_35.0=0x0321 +xgxs_tx_lane_map_36.0=0x2301 +xgxs_tx_lane_map_37.0=0x0321 +xgxs_tx_lane_map_38.0=0x0123 +xgxs_tx_lane_map_39.0=0x1230 +xgxs_tx_lane_map_40.0=0x2301 +xgxs_tx_lane_map_41.0=0x1032 +xgxs_tx_lane_map_68.0=0x0123 +xgxs_tx_lane_map_69.0=0x1230 +xgxs_tx_lane_map_70.0=0x2301 +xgxs_tx_lane_map_71.0=0x1032 +xgxs_tx_lane_map_72.0=0x0123 +xgxs_tx_lane_map_73.0=0x1230 +xgxs_tx_lane_map_74.0=0x2301 +xgxs_tx_lane_map_75.0=0x1032 +xgxs_tx_lane_map_102.0=0x0321 +xgxs_tx_lane_map_103.0=0x2301 +xgxs_tx_lane_map_104.0=0x0321 +xgxs_tx_lane_map_105.0=0x2301 +xgxs_tx_lane_map_106.0=0x0321 +xgxs_tx_lane_map_107.0=0x2301 +xgxs_tx_lane_map_108.0=0x0321 +xgxs_tx_lane_map_109.0=0x2301 +serdes_driver_current_1=0x4 +serdes_preemphasis_1=0x145c00 +serdes_driver_current_2=0x4 +serdes_preemphasis_2=0x145c00 +serdes_driver_current_3=0x8 +serdes_preemphasis_3=0x185800 +serdes_driver_current_4=0x8 +serdes_preemphasis_4=0x185800 +serdes_driver_current_5=0x8 +serdes_preemphasis_5=0x185800 +serdes_driver_current_6=0x8 +serdes_preemphasis_6=0x185800 +serdes_driver_current_7=0xf +serdes_preemphasis_7=0x205000 +serdes_driver_current_8=0xf +serdes_preemphasis_8=0x205000 +serdes_driver_current_34=0xf +serdes_preemphasis_34=0x205000 +serdes_driver_current_35=0xf +serdes_preemphasis_35=0x205000 +serdes_driver_current_36=0xf +serdes_preemphasis_36=0x205000 +serdes_driver_current_37=0xf +serdes_preemphasis_37=0x205000 +serdes_driver_current_38=0x8 +serdes_preemphasis_38=0x185800 +serdes_driver_current_39=0x8 +serdes_preemphasis_39=0x185800 +serdes_driver_current_40=0x8 +serdes_preemphasis_40=0x185800 +serdes_driver_current_41=0x8 +serdes_preemphasis_41=0x185800 +serdes_driver_current_68=0x4 +serdes_preemphasis_68=0x145c00 +serdes_driver_current_69=0x4 +serdes_preemphasis_69=0x145c00 +serdes_driver_current_70=0x4 +serdes_preemphasis_70=0x145c00 +serdes_driver_current_71=0x4 +serdes_preemphasis_71=0x145c00 +serdes_driver_current_72=0x4 +serdes_preemphasis_72=0x145c00 +serdes_driver_current_73=0x4 +serdes_preemphasis_73=0x145c00 +serdes_driver_current_74=0x4 +serdes_preemphasis_74=0x145c00 +serdes_driver_current_75=0x4 +serdes_preemphasis_75=0x145c00 +serdes_driver_current_102=0x4 +serdes_preemphasis_102=0x145c00 +serdes_driver_current_103=0x4 +serdes_preemphasis_103=0x145c00 +serdes_driver_current_104=0x4 +serdes_preemphasis_104=0x145c00 +serdes_driver_current_105=0x4 +serdes_preemphasis_105=0x145c00 +serdes_driver_current_106=0x4 +serdes_preemphasis_106=0x145c00 +serdes_driver_current_107=0x4 +serdes_preemphasis_107=0x145c00 +serdes_driver_current_108=0x4 +serdes_preemphasis_108=0x145c00 +serdes_driver_current_109=0x4 +serdes_preemphasis_109=0x145c00 + +mmu_init_config="MSFT-TH-Tier0" diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t1.config.bcm b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t1.config.bcm new file mode 100644 index 00000000000..c3218645ac2 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t1.config.bcm @@ -0,0 +1,444 @@ +# Arista 7060CX-32S + +phy_an_allow_pll_change=1 +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=8 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +dma_desc_timeout_usec=15000000 +higig2_hdr_mode=1 +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +l2xmsg_mode=1 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +os=unix +oversubscribe_mode=1 +ptp_bs_fref.0=25000000 +ptp_ts_pll_fref.0=25000000 +robust_hash_disable_egress_vlan.0=1 +robust_hash_disable_mpls.0=1 +robust_hash_disable_vlan.0=1 +tdma_timeout_usec.0=15000000 +tslam_timeout_usec.0=15000000 +pbmp_xport_xe.0=0x7ffffffffffffffffffffffffffffffffe +phy_an_allow_pll_change_hg.0=0 +phy_an_c73_1.0=1 +phy_an_c73_2.0=1 +phy_an_c73_3.0=1 +phy_an_c73_4.0=1 +phy_an_c73_5.0=1 +phy_an_c73_6.0=1 +phy_an_c73_7.0=1 +phy_an_c73_8.0=1 +phy_an_c73_34.0=1 +phy_an_c73_35.0=1 +phy_an_c73_36.0=1 +phy_an_c73_37.0=1 +phy_an_c73_38.0=1 +phy_an_c73_39.0=1 +phy_an_c73_40.0=1 +phy_an_c73_41.0=1 +phy_an_c73_68.0=1 +phy_an_c73_69.0=1 +phy_an_c73_70.0=1 +phy_an_c73_71.0=1 +phy_an_c73_72.0=1 +phy_an_c73_73.0=1 +phy_an_c73_74.0=1 +phy_an_c73_75.0=1 +phy_an_c73_102.0=1 +phy_an_c73_103.0=1 +phy_an_c73_104.0=1 +phy_an_c73_105.0=1 +phy_an_c73_106.0=1 +phy_an_c73_107.0=1 +phy_an_c73_108.0=1 +phy_an_c73_109.0=1 +phy_an_fec_1.0=1 +phy_an_fec_2.0=1 +phy_an_fec_3.0=1 +phy_an_fec_4.0=1 +phy_an_fec_5.0=1 +phy_an_fec_6.0=1 +phy_an_fec_7.0=1 +phy_an_fec_8.0=1 +phy_an_fec_9.0=1 +phy_an_fec_10.0=1 +phy_an_fec_11.0=1 +phy_an_fec_12.0=1 +phy_an_fec_13.0=1 +phy_an_fec_14.0=1 +phy_an_fec_15.0=1 +phy_an_fec_16.0=1 +phy_an_fec_17.0=1 +phy_an_fec_18.0=1 +phy_an_fec_19.0=1 +phy_an_fec_20.0=1 +phy_an_fec_21.0=1 +phy_an_fec_22.0=1 +phy_an_fec_23.0=1 +phy_an_fec_24.0=1 +phy_an_fec_25.0=1 +phy_an_fec_26.0=1 +phy_an_fec_27.0=1 +phy_an_fec_28.0=1 +phy_an_fec_29.0=1 +phy_an_fec_30.0=1 +phy_an_fec_31.0=1 +phy_an_fec_32.0=1 +phy_an_fec_34.0=1 +phy_an_fec_38.0=1 +phy_an_fec_39.0=1 +phy_an_fec_40.0=1 +phy_an_fec_41.0=1 +phy_an_fec_42.0=1 +phy_an_fec_43.0=1 +phy_an_fec_44.0=1 +phy_an_fec_45.0=1 +phy_an_fec_46.0=1 +phy_an_fec_47.0=1 +phy_an_fec_48.0=1 +phy_an_fec_49.0=1 +phy_an_fec_50.0=1 +phy_an_fec_51.0=1 +phy_an_fec_52.0=1 +phy_an_fec_53.0=1 +phy_an_fec_54.0=1 +phy_an_fec_55.0=1 +phy_an_fec_56.0=1 +phy_an_fec_57.0=1 +phy_an_fec_58.0=1 +phy_an_fec_59.0=1 +phy_an_fec_60.0=1 +phy_an_fec_61.0=1 +phy_an_fec_62.0=1 +phy_an_fec_63.0=1 +phy_an_fec_64.0=1 +phy_an_fec_65.0=1 +phy_an_fec_68.0=1 +phy_an_fec_69.0=1 +phy_an_fec_70.0=1 +phy_an_fec_71.0=1 +phy_an_fec_72.0=1 +phy_an_fec_73.0=1 +phy_an_fec_74.0=1 +phy_an_fec_75.0=1 +phy_an_fec_76.0=1 +phy_an_fec_77.0=1 +phy_an_fec_78.0=1 +phy_an_fec_79.0=1 +phy_an_fec_80.0=1 +phy_an_fec_81.0=1 +phy_an_fec_82.0=1 +phy_an_fec_83.0=1 +phy_an_fec_84.0=1 +phy_an_fec_85.0=1 +phy_an_fec_86.0=1 +phy_an_fec_87.0=1 +phy_an_fec_88.0=1 +phy_an_fec_89.0=1 +phy_an_fec_90.0=1 +phy_an_fec_91.0=1 +phy_an_fec_92.0=1 +phy_an_fec_93.0=1 +phy_an_fec_94.0=1 +phy_an_fec_95.0=1 +phy_an_fec_96.0=1 +phy_an_fec_97.0=1 +phy_an_fec_98.0=1 +phy_an_fec_99.0=1 +phy_an_fec_102.0=1 +phy_an_fec_103.0=1 +phy_an_fec_104.0=1 +phy_an_fec_105.0=1 +phy_an_fec_106.0=1 +phy_an_fec_107.0=1 +phy_an_fec_108.0=1 +phy_an_fec_109.0=1 +phy_an_fec_110.0=1 +phy_an_fec_111.0=1 +phy_an_fec_112.0=1 +phy_an_fec_113.0=1 +phy_an_fec_114.0=1 +phy_an_fec_115.0=1 +phy_an_fec_116.0=1 +phy_an_fec_117.0=1 +phy_an_fec_118.0=1 +phy_an_fec_119.0=1 +phy_an_fec_120.0=1 +phy_an_fec_121.0=1 +phy_an_fec_122.0=1 +phy_an_fec_123.0=1 +phy_an_fec_124.0=1 +phy_an_fec_125.0=1 +phy_an_fec_126.0=1 +phy_an_fec_127.0=1 +phy_an_fec_128.0=1 +phy_an_fec_129.0=1 +phy_an_fec_130.0=1 +phy_an_fec_131.0=1 +phy_an_fec_132.0=1 +phy_an_fec_133.0=1 +phy_xaui_rx_polarity_flip_1.0=0x1 +phy_xaui_rx_polarity_flip_2.0=0x5 +phy_xaui_rx_polarity_flip_3.0=0x1 +phy_xaui_rx_polarity_flip_4.0=0x7 +phy_xaui_rx_polarity_flip_5.0=0xc +phy_xaui_rx_polarity_flip_6.0=0xf +phy_xaui_rx_polarity_flip_7.0=0xc +phy_xaui_rx_polarity_flip_8.0=0xf +phy_xaui_rx_polarity_flip_34.0=0x0 +phy_xaui_rx_polarity_flip_35.0=0x7 +phy_xaui_rx_polarity_flip_36.0=0x4 +phy_xaui_rx_polarity_flip_37.0=0x7 +phy_xaui_rx_polarity_flip_38.0=0x4 +phy_xaui_rx_polarity_flip_39.0=0x6 +phy_xaui_rx_polarity_flip_40.0=0x1 +phy_xaui_rx_polarity_flip_41.0=0x2 +phy_xaui_rx_polarity_flip_68.0=0xd +phy_xaui_rx_polarity_flip_69.0=0x6 +phy_xaui_rx_polarity_flip_70.0=0x1 +phy_xaui_rx_polarity_flip_71.0=0x8 +phy_xaui_rx_polarity_flip_72.0=0x7 +phy_xaui_rx_polarity_flip_73.0=0xc +phy_xaui_rx_polarity_flip_74.0=0x7 +phy_xaui_rx_polarity_flip_75.0=0x8 +phy_xaui_rx_polarity_flip_102.0=0xb +phy_xaui_rx_polarity_flip_103.0=0xc +phy_xaui_rx_polarity_flip_104.0=0x3 +phy_xaui_rx_polarity_flip_105.0=0xc +phy_xaui_rx_polarity_flip_106.0=0xb +phy_xaui_rx_polarity_flip_107.0=0x5 +phy_xaui_rx_polarity_flip_108.0=0x1 +phy_xaui_rx_polarity_flip_109.0=0x9 +phy_xaui_tx_polarity_flip_1.0=0x0 +phy_xaui_tx_polarity_flip_2.0=0xe +phy_xaui_tx_polarity_flip_3.0=0x2 +phy_xaui_tx_polarity_flip_4.0=0xe +phy_xaui_tx_polarity_flip_5.0=0xc +phy_xaui_tx_polarity_flip_6.0=0xf +phy_xaui_tx_polarity_flip_7.0=0xc +phy_xaui_tx_polarity_flip_8.0=0xf +phy_xaui_tx_polarity_flip_34.0=0x0 +phy_xaui_tx_polarity_flip_35.0=0xe +phy_xaui_tx_polarity_flip_36.0=0x0 +phy_xaui_tx_polarity_flip_37.0=0xe +phy_xaui_tx_polarity_flip_38.0=0xf +phy_xaui_tx_polarity_flip_39.0=0xe +phy_xaui_tx_polarity_flip_40.0=0x6 +phy_xaui_tx_polarity_flip_41.0=0xb +phy_xaui_tx_polarity_flip_68.0=0x9 +phy_xaui_tx_polarity_flip_69.0=0xb +phy_xaui_tx_polarity_flip_70.0=0xd +phy_xaui_tx_polarity_flip_71.0=0x9 +phy_xaui_tx_polarity_flip_72.0=0x6 +phy_xaui_tx_polarity_flip_73.0=0xc +phy_xaui_tx_polarity_flip_74.0=0x9 +phy_xaui_tx_polarity_flip_75.0=0x9 +phy_xaui_tx_polarity_flip_102.0=0x6 +phy_xaui_tx_polarity_flip_103.0=0xb +phy_xaui_tx_polarity_flip_104.0=0x6 +phy_xaui_tx_polarity_flip_105.0=0xb +phy_xaui_tx_polarity_flip_106.0=0x6 +phy_xaui_tx_polarity_flip_107.0=0xf +phy_xaui_tx_polarity_flip_108.0=0x6 +phy_xaui_tx_polarity_flip_109.0=0xc +portmap_1.0=1:40 +portmap_2.0=5:40 +portmap_3.0=9:40 +portmap_4.0=13:40 +portmap_5.0=17:40 +portmap_6.0=21:40 +portmap_7.0=25:40 +portmap_8.0=29:40 +portmap_34.0=33:40 +portmap_35.0=37:40 +portmap_36.0=41:40 +portmap_37.0=45:40 +portmap_38.0=49:40 +portmap_39.0=53:40 +portmap_40.0=57:40 +portmap_41.0=61:40 +portmap_68.0=65:40 +portmap_69.0=69:40 +portmap_70.0=73:40 +portmap_71.0=77:40 +portmap_72.0=81:40 +portmap_73.0=85:40 +portmap_74.0=89:40 +portmap_75.0=93:40 +portmap_102.0=97:40 +portmap_103.0=101:40 +portmap_104.0=105:40 +portmap_105.0=109:40 +portmap_106.0=113:40 +portmap_107.0=117:40 +portmap_108.0=121:40 +portmap_109.0=125:40 +port_phy_addr_1.0=0xff +port_phy_addr_2.0=0xff +port_phy_addr_3.0=0xff +port_phy_addr_4.0=0xff +port_phy_addr_5.0=0xff +port_phy_addr_6.0=0xff +port_phy_addr_7.0=0xff +port_phy_addr_8.0=0xff +port_phy_addr_34.0=0xff +port_phy_addr_35.0=0xff +port_phy_addr_36.0=0xff +port_phy_addr_37.0=0xff +port_phy_addr_38.0=0xff +port_phy_addr_39.0=0xff +port_phy_addr_40.0=0xff +port_phy_addr_41.0=0xff +port_phy_addr_68.0=0xff +port_phy_addr_69.0=0xff +port_phy_addr_70.0=0xff +port_phy_addr_71.0=0xff +port_phy_addr_72.0=0xff +port_phy_addr_73.0=0xff +port_phy_addr_74.0=0xff +port_phy_addr_75.0=0xff +port_phy_addr_102.0=0xff +port_phy_addr_103.0=0xff +port_phy_addr_104.0=0xff +port_phy_addr_105.0=0xff +port_phy_addr_106.0=0xff +port_phy_addr_107.0=0xff +port_phy_addr_108.0=0xff +port_phy_addr_109.0=0xff +xgxs_rx_lane_map_1.0=0x3210 +xgxs_rx_lane_map_2.0=0x3210 +xgxs_rx_lane_map_3.0=0x3210 +xgxs_rx_lane_map_4.0=0x3210 +xgxs_rx_lane_map_5.0=0x0123 +xgxs_rx_lane_map_6.0=0x2301 +xgxs_rx_lane_map_7.0=0x0123 +xgxs_rx_lane_map_8.0=0x2301 +xgxs_rx_lane_map_34.0=0x0123 +xgxs_rx_lane_map_35.0=0x0321 +xgxs_rx_lane_map_36.0=0x0321 +xgxs_rx_lane_map_37.0=0x0321 +xgxs_rx_lane_map_38.0=0x1230 +xgxs_rx_lane_map_39.0=0x2301 +xgxs_rx_lane_map_40.0=0x1230 +xgxs_rx_lane_map_41.0=0x2103 +xgxs_rx_lane_map_68.0=0x1230 +xgxs_rx_lane_map_69.0=0x2301 +xgxs_rx_lane_map_70.0=0x1230 +xgxs_rx_lane_map_71.0=0x2103 +xgxs_rx_lane_map_72.0=0x1230 +xgxs_rx_lane_map_73.0=0x2301 +xgxs_rx_lane_map_74.0=0x1230 +xgxs_rx_lane_map_75.0=0x2103 +xgxs_rx_lane_map_102.0=0x3210 +xgxs_rx_lane_map_103.0=0x3210 +xgxs_rx_lane_map_104.0=0x3210 +xgxs_rx_lane_map_105.0=0x3210 +xgxs_rx_lane_map_106.0=0x3210 +xgxs_rx_lane_map_107.0=0x3210 +xgxs_rx_lane_map_108.0=0x3210 +xgxs_rx_lane_map_109.0=0x3210 +xgxs_tx_lane_map_1.0=0x0321 +xgxs_tx_lane_map_2.0=0x2301 +xgxs_tx_lane_map_3.0=0x0321 +xgxs_tx_lane_map_4.0=0x2301 +xgxs_tx_lane_map_5.0=0x0123 +xgxs_tx_lane_map_6.0=0x0123 +xgxs_tx_lane_map_7.0=0x0123 +xgxs_tx_lane_map_8.0=0x0123 +xgxs_tx_lane_map_34.0=0x2301 +xgxs_tx_lane_map_35.0=0x0321 +xgxs_tx_lane_map_36.0=0x2301 +xgxs_tx_lane_map_37.0=0x0321 +xgxs_tx_lane_map_38.0=0x0123 +xgxs_tx_lane_map_39.0=0x1230 +xgxs_tx_lane_map_40.0=0x2301 +xgxs_tx_lane_map_41.0=0x1032 +xgxs_tx_lane_map_68.0=0x0123 +xgxs_tx_lane_map_69.0=0x1230 +xgxs_tx_lane_map_70.0=0x2301 +xgxs_tx_lane_map_71.0=0x1032 +xgxs_tx_lane_map_72.0=0x0123 +xgxs_tx_lane_map_73.0=0x1230 +xgxs_tx_lane_map_74.0=0x2301 +xgxs_tx_lane_map_75.0=0x1032 +xgxs_tx_lane_map_102.0=0x0321 +xgxs_tx_lane_map_103.0=0x2301 +xgxs_tx_lane_map_104.0=0x0321 +xgxs_tx_lane_map_105.0=0x2301 +xgxs_tx_lane_map_106.0=0x0321 +xgxs_tx_lane_map_107.0=0x2301 +xgxs_tx_lane_map_108.0=0x0321 +xgxs_tx_lane_map_109.0=0x2301 +serdes_driver_current_1=0x4 +serdes_preemphasis_1=0x145c00 +serdes_driver_current_2=0x4 +serdes_preemphasis_2=0x145c00 +serdes_driver_current_3=0x8 +serdes_preemphasis_3=0x185800 +serdes_driver_current_4=0x8 +serdes_preemphasis_4=0x185800 +serdes_driver_current_5=0x8 +serdes_preemphasis_5=0x185800 +serdes_driver_current_6=0x8 +serdes_preemphasis_6=0x185800 +serdes_driver_current_7=0xf +serdes_preemphasis_7=0x205000 +serdes_driver_current_8=0xf +serdes_preemphasis_8=0x205000 +serdes_driver_current_34=0xf +serdes_preemphasis_34=0x205000 +serdes_driver_current_35=0xf +serdes_preemphasis_35=0x205000 +serdes_driver_current_36=0xf +serdes_preemphasis_36=0x205000 +serdes_driver_current_37=0xf +serdes_preemphasis_37=0x205000 +serdes_driver_current_38=0x8 +serdes_preemphasis_38=0x185800 +serdes_driver_current_39=0x8 +serdes_preemphasis_39=0x185800 +serdes_driver_current_40=0x8 +serdes_preemphasis_40=0x185800 +serdes_driver_current_41=0x8 +serdes_preemphasis_41=0x185800 +serdes_driver_current_68=0x4 +serdes_preemphasis_68=0x145c00 +serdes_driver_current_69=0x4 +serdes_preemphasis_69=0x145c00 +serdes_driver_current_70=0x4 +serdes_preemphasis_70=0x145c00 +serdes_driver_current_71=0x4 +serdes_preemphasis_71=0x145c00 +serdes_driver_current_72=0x4 +serdes_preemphasis_72=0x145c00 +serdes_driver_current_73=0x4 +serdes_preemphasis_73=0x145c00 +serdes_driver_current_74=0x4 +serdes_preemphasis_74=0x145c00 +serdes_driver_current_75=0x4 +serdes_preemphasis_75=0x145c00 +serdes_driver_current_102=0x4 +serdes_preemphasis_102=0x145c00 +serdes_driver_current_103=0x4 +serdes_preemphasis_103=0x145c00 +serdes_driver_current_104=0x4 +serdes_preemphasis_104=0x145c00 +serdes_driver_current_105=0x4 +serdes_preemphasis_105=0x145c00 +serdes_driver_current_106=0x4 +serdes_preemphasis_106=0x145c00 +serdes_driver_current_107=0x4 +serdes_preemphasis_107=0x145c00 +serdes_driver_current_108=0x4 +serdes_preemphasis_108=0x145c00 +serdes_driver_current_109=0x4 +serdes_preemphasis_109=0x145c00 + +mmu_init_config="MSFT-TH-Tier1" diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/port_config.ini b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/port_config.ini new file mode 100644 index 00000000000..ddb80965e1d --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/port_config.ini @@ -0,0 +1,105 @@ +# name lanes alias index speed +Ethernet0 33 Ethernet1/1 1 25000 +Ethernet1 34 Ethernet1/2 1 25000 +Ethernet2 35 Ethernet1/3 1 25000 +Ethernet3 36 Ethernet1/4 1 25000 +Ethernet4 37 Ethernet2/1 2 25000 +Ethernet5 38 Ethernet2/2 2 25000 +Ethernet6 39 Ethernet2/3 2 25000 +Ethernet7 40 Ethernet2/4 2 25000 +Ethernet8 41 Ethernet3/1 3 25000 +Ethernet9 42 Ethernet3/2 3 25000 +Ethernet10 43 Ethernet3/3 3 25000 +Ethernet11 44 Ethernet3/4 3 25000 +Ethernet12 45 Ethernet4/1 4 25000 +Ethernet13 46 Ethernet4/2 4 25000 +Ethernet14 47 Ethernet4/3 4 25000 +Ethernet15 48 Ethernet4/4 4 25000 +Ethernet16 49 Ethernet5/1 5 25000 +Ethernet17 50 Ethernet5/2 5 25000 +Ethernet18 51 Ethernet5/3 5 25000 +Ethernet19 52 Ethernet5/4 5 25000 +Ethernet20 53 Ethernet6/1 6 25000 +Ethernet21 54 Ethernet6/2 6 25000 +Ethernet22 55 Ethernet6/3 6 25000 +Ethernet23 56 Ethernet6/4 6 25000 +Ethernet24 57,58,59,60 Ethernet7/1 7 100000 +Ethernet28 61,62,63,64 Ethernet8/1 8 100000 +Ethernet32 65,66,67,68 Ethernet9/1 9 100000 +Ethernet36 69,70,71,72 Ethernet10/1 10 100000 +Ethernet40 73 Ethernet11/1 11 25000 +Ethernet41 74 Ethernet11/2 11 25000 +Ethernet42 75 Ethernet11/3 11 25000 +Ethernet43 76 Ethernet11/4 11 25000 +Ethernet44 77 Ethernet12/1 12 25000 +Ethernet45 78 Ethernet12/2 12 25000 +Ethernet46 79 Ethernet12/3 12 25000 +Ethernet47 80 Ethernet12/4 12 25000 +Ethernet48 81 Ethernet13/1 13 25000 +Ethernet49 82 Ethernet13/2 13 25000 +Ethernet50 83 Ethernet13/3 13 25000 +Ethernet51 84 Ethernet13/4 13 25000 +Ethernet52 85 Ethernet14/1 14 25000 +Ethernet53 86 Ethernet14/2 14 25000 +Ethernet54 87 Ethernet14/3 14 25000 +Ethernet55 88 Ethernet14/4 14 25000 +Ethernet56 89 Ethernet15/1 15 25000 +Ethernet57 90 Ethernet15/2 15 25000 +Ethernet58 91 Ethernet15/3 15 25000 +Ethernet59 92 Ethernet15/4 15 25000 +Ethernet60 93 Ethernet16/1 16 25000 +Ethernet61 94 Ethernet16/2 16 25000 +Ethernet62 95 Ethernet16/3 16 25000 +Ethernet63 96 Ethernet16/4 16 25000 +Ethernet64 97 Ethernet17/1 17 25000 +Ethernet65 98 Ethernet17/2 17 25000 +Ethernet66 99 Ethernet17/3 17 25000 +Ethernet67 100 Ethernet17/4 17 25000 +Ethernet68 101 Ethernet18/1 18 25000 +Ethernet69 102 Ethernet18/2 18 25000 +Ethernet70 103 Ethernet18/3 18 25000 +Ethernet71 104 Ethernet18/4 18 25000 +Ethernet72 105 Ethernet19/1 19 25000 +Ethernet73 106 Ethernet19/2 19 25000 +Ethernet74 107 Ethernet19/3 19 25000 +Ethernet75 108 Ethernet19/4 19 25000 +Ethernet76 109 Ethernet20/1 20 25000 +Ethernet77 110 Ethernet20/2 20 25000 +Ethernet78 111 Ethernet20/3 20 25000 +Ethernet79 112 Ethernet20/4 20 25000 +Ethernet80 113 Ethernet21/1 21 25000 +Ethernet81 114 Ethernet21/2 21 25000 +Ethernet82 115 Ethernet21/3 21 25000 +Ethernet83 116 Ethernet21/4 21 25000 +Ethernet84 117 Ethernet22/1 22 25000 +Ethernet85 118 Ethernet22/2 22 25000 +Ethernet86 119 Ethernet22/3 22 25000 +Ethernet87 120 Ethernet22/4 22 25000 +Ethernet88 121,122,123,124 Ethernet23/1 23 100000 +Ethernet92 125,126,127,128 Ethernet24/1 24 100000 +Ethernet96 1,2,3,4 Ethernet25/1 25 100000 +Ethernet100 5,6,7,8 Ethernet26/1 26 100000 +Ethernet104 9 Ethernet27/1 27 25000 +Ethernet105 10 Ethernet27/2 27 25000 +Ethernet106 11 Ethernet27/3 27 25000 +Ethernet107 12 Ethernet27/4 27 25000 +Ethernet108 13 Ethernet28/1 28 25000 +Ethernet109 14 Ethernet28/2 28 25000 +Ethernet110 15 Ethernet28/3 28 25000 +Ethernet111 16 Ethernet28/4 28 25000 +Ethernet112 17 Ethernet29/1 29 25000 +Ethernet113 18 Ethernet29/2 29 25000 +Ethernet114 19 Ethernet29/3 29 25000 +Ethernet115 20 Ethernet29/4 29 25000 +Ethernet116 21 Ethernet30/1 30 25000 +Ethernet117 22 Ethernet30/2 30 25000 +Ethernet118 23 Ethernet30/3 30 25000 +Ethernet119 24 Ethernet30/4 30 25000 +Ethernet120 25 Ethernet31/1 31 25000 +Ethernet121 26 Ethernet31/2 31 25000 +Ethernet122 27 Ethernet31/3 31 25000 +Ethernet123 28 Ethernet31/4 31 25000 +Ethernet124 29 Ethernet32/1 32 25000 +Ethernet125 30 Ethernet32/2 32 25000 +Ethernet126 31 Ethernet32/3 32 25000 +Ethernet127 32 Ethernet32/4 32 25000 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/sai.profile b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/sai.profile new file mode 100644 index 00000000000..d54a263e72b --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-8x100G+96x25G.config.bcm diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/th-a7060-cx32s-8x100G+96x25G.config.bcm b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/th-a7060-cx32s-8x100G+96x25G.config.bcm new file mode 100644 index 00000000000..d3b9a758ba1 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/th-a7060-cx32s-8x100G+96x25G.config.bcm @@ -0,0 +1,780 @@ +# Arista 7060CX-32S + +phy_an_allow_pll_change=1 +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=8 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +dma_desc_timeout_usec=15000000 +higig2_hdr_mode=1 +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +l2xmsg_mode=1 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +os=unix +oversubscribe_mode=1 +ptp_bs_fref.0=25000000 +ptp_ts_pll_fref.0=25000000 +robust_hash_disable_egress_vlan.0=1 +robust_hash_disable_mpls.0=1 +robust_hash_disable_vlan.0=1 +tdma_timeout_usec.0=15000000 +tslam_timeout_usec.0=15000000 +pbmp_xport_xe=0x1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe +phy_an_allow_pll_change_hg.0=0 +dport_map_direct=1 +phy_an_c73=1 + +phy_an_fec_1.0=1 +phy_an_fec_2.0=1 +phy_an_fec_3.0=1 +phy_an_fec_4.0=1 +phy_an_fec_5.0=1 +phy_an_fec_6.0=1 +phy_an_fec_7.0=1 +phy_an_fec_8.0=1 +phy_an_fec_9.0=1 +phy_an_fec_10.0=1 +phy_an_fec_11.0=1 +phy_an_fec_12.0=1 +phy_an_fec_13.0=1 +phy_an_fec_14.0=1 +phy_an_fec_15.0=1 +phy_an_fec_16.0=1 +phy_an_fec_17.0=1 +phy_an_fec_18.0=1 +phy_an_fec_19.0=1 +phy_an_fec_20.0=1 +phy_an_fec_21.0=1 +phy_an_fec_22.0=1 +phy_an_fec_23.0=1 +phy_an_fec_24.0=1 +phy_an_fec_25.0=1 +phy_an_fec_26.0=1 +phy_an_fec_34.0=1 +phy_an_fec_35.0=1 +phy_an_fec_36.0=1 +phy_an_fec_37.0=1 +phy_an_fec_38.0=1 +phy_an_fec_39.0=1 +phy_an_fec_40.0=1 +phy_an_fec_41.0=1 +phy_an_fec_42.0=1 +phy_an_fec_43.0=1 +phy_an_fec_44.0=1 +phy_an_fec_45.0=1 +phy_an_fec_46.0=1 +phy_an_fec_47.0=1 +phy_an_fec_48.0=1 +phy_an_fec_49.0=1 +phy_an_fec_50.0=1 +phy_an_fec_51.0=1 +phy_an_fec_52.0=1 +phy_an_fec_53.0=1 +phy_an_fec_54.0=1 +phy_an_fec_55.0=1 +phy_an_fec_56.0=1 +phy_an_fec_57.0=1 +phy_an_fec_58.0=1 +phy_an_fec_59.0=1 +phy_an_fec_68.0=1 +phy_an_fec_69.0=1 +phy_an_fec_70.0=1 +phy_an_fec_71.0=1 +phy_an_fec_72.0=1 +phy_an_fec_73.0=1 +phy_an_fec_74.0=1 +phy_an_fec_75.0=1 +phy_an_fec_76.0=1 +phy_an_fec_77.0=1 +phy_an_fec_78.0=1 +phy_an_fec_79.0=1 +phy_an_fec_80.0=1 +phy_an_fec_81.0=1 +phy_an_fec_82.0=1 +phy_an_fec_83.0=1 +phy_an_fec_84.0=1 +phy_an_fec_85.0=1 +phy_an_fec_86.0=1 +phy_an_fec_87.0=1 +phy_an_fec_88.0=1 +phy_an_fec_89.0=1 +phy_an_fec_90.0=1 +phy_an_fec_91.0=1 +phy_an_fec_92.0=1 +phy_an_fec_93.0=1 +phy_an_fec_102.0=1 +phy_an_fec_103.0=1 +phy_an_fec_104.0=1 +phy_an_fec_105.0=1 +phy_an_fec_106.0=1 +phy_an_fec_107.0=1 +phy_an_fec_108.0=1 +phy_an_fec_109.0=1 +phy_an_fec_110.0=1 +phy_an_fec_111.0=1 +phy_an_fec_112.0=1 +phy_an_fec_113.0=1 +phy_an_fec_114.0=1 +phy_an_fec_115.0=1 +phy_an_fec_116.0=1 +phy_an_fec_117.0=1 +phy_an_fec_118.0=1 +phy_an_fec_119.0=1 +phy_an_fec_120.0=1 +phy_an_fec_121.0=1 +phy_an_fec_122.0=1 +phy_an_fec_123.0=1 +phy_an_fec_124.0=1 +phy_an_fec_125.0=1 +phy_an_fec_126.0=1 +phy_an_fec_127.0=1 + +# Q1 +portmap_1.0=1:100 +portmap_2.0=5:100 +portmap_3.0=9:25 +portmap_4.0=10:25 +portmap_5.0=11:25 +portmap_6.0=12:25 +portmap_7.0=13:25 +portmap_8.0=14:25 +portmap_9.0=15:25 +portmap_10.0=16:25 +portmap_11.0=17:25 +portmap_12.0=18:25 +portmap_13.0=19:25 +portmap_14.0=20:25 +portmap_15.0=21:25 +portmap_16.0=22:25 +portmap_17.0=23:25 +portmap_18.0=24:25 +portmap_19.0=25:25 +portmap_20.0=26:25 +portmap_21.0=27:25 +portmap_22.0=28:25 +portmap_23.0=29:25 +portmap_24.0=30:25 +portmap_25.0=31:25 +portmap_26.0=32:25 +phy_xaui_rx_polarity_flip_1.0=0x1 +phy_xaui_rx_polarity_flip_2.0=0x5 +phy_xaui_rx_polarity_flip_3.0=0x1 +phy_xaui_rx_polarity_flip_4.0=0x0 +phy_xaui_rx_polarity_flip_5.0=0x0 +phy_xaui_rx_polarity_flip_6.0=0x0 +phy_xaui_rx_polarity_flip_7.0=0x1 +phy_xaui_rx_polarity_flip_8.0=0x1 +phy_xaui_rx_polarity_flip_9.0=0x1 +phy_xaui_rx_polarity_flip_10.0=0x0 +phy_xaui_rx_polarity_flip_11.0=0x0 +phy_xaui_rx_polarity_flip_12.0=0x0 +phy_xaui_rx_polarity_flip_13.0=0x1 +phy_xaui_rx_polarity_flip_14.0=0x1 +phy_xaui_rx_polarity_flip_15.0=0x1 +phy_xaui_rx_polarity_flip_16.0=0x1 +phy_xaui_rx_polarity_flip_17.0=0x1 +phy_xaui_rx_polarity_flip_18.0=0x1 +phy_xaui_rx_polarity_flip_19.0=0x0 +phy_xaui_rx_polarity_flip_20.0=0x0 +phy_xaui_rx_polarity_flip_21.0=0x1 +phy_xaui_rx_polarity_flip_22.0=0x1 +phy_xaui_rx_polarity_flip_23.0=0x1 +phy_xaui_rx_polarity_flip_24.0=0x1 +phy_xaui_rx_polarity_flip_25.0=0x1 +phy_xaui_rx_polarity_flip_26.0=0x1 +phy_xaui_tx_polarity_flip_1.0=0x0 +phy_xaui_tx_polarity_flip_2.0=0xe +phy_xaui_tx_polarity_flip_3.0=0x0 +phy_xaui_tx_polarity_flip_4.0=0x1 +phy_xaui_tx_polarity_flip_5.0=0x0 +phy_xaui_tx_polarity_flip_6.0=0x0 +phy_xaui_tx_polarity_flip_7.0=0x0 +phy_xaui_tx_polarity_flip_8.0=0x1 +phy_xaui_tx_polarity_flip_9.0=0x1 +phy_xaui_tx_polarity_flip_10.0=0x1 +phy_xaui_tx_polarity_flip_11.0=0x0 +phy_xaui_tx_polarity_flip_12.0=0x0 +phy_xaui_tx_polarity_flip_13.0=0x1 +phy_xaui_tx_polarity_flip_14.0=0x1 +phy_xaui_tx_polarity_flip_15.0=0x1 +phy_xaui_tx_polarity_flip_16.0=0x1 +phy_xaui_tx_polarity_flip_17.0=0x1 +phy_xaui_tx_polarity_flip_18.0=0x1 +phy_xaui_tx_polarity_flip_19.0=0x0 +phy_xaui_tx_polarity_flip_20.0=0x0 +phy_xaui_tx_polarity_flip_21.0=0x1 +phy_xaui_tx_polarity_flip_22.0=0x1 +phy_xaui_tx_polarity_flip_23.0=0x1 +phy_xaui_tx_polarity_flip_24.0=0x1 +phy_xaui_tx_polarity_flip_25.0=0x1 +phy_xaui_tx_polarity_flip_26.0=0x1 +xgxs_rx_lane_map_1.0=0x3210 +xgxs_rx_lane_map_2.0=0x3210 +xgxs_rx_lane_map_3.0=0x3210 +xgxs_rx_lane_map_5.0=0x3210 +xgxs_rx_lane_map_7.0=0x3210 +xgxs_rx_lane_map_9.0=0x3210 +xgxs_rx_lane_map_11.0=0x0123 +xgxs_rx_lane_map_13.0=0x0123 +xgxs_rx_lane_map_15.0=0x2301 +xgxs_rx_lane_map_17.0=0x2301 +xgxs_rx_lane_map_19.0=0x0123 +xgxs_rx_lane_map_21.0=0x0123 +xgxs_rx_lane_map_23.0=0x2301 +xgxs_rx_lane_map_25.0=0x2301 +xgxs_tx_lane_map_1.0=0x0321 +xgxs_tx_lane_map_2.0=0x2301 +xgxs_tx_lane_map_3.0=0x0321 +xgxs_tx_lane_map_5.0=0x0321 +xgxs_tx_lane_map_7.0=0x2301 +xgxs_tx_lane_map_9.0=0x2301 +xgxs_tx_lane_map_11.0=0x0123 +xgxs_tx_lane_map_13.0=0x0123 +xgxs_tx_lane_map_15.0=0x0123 +xgxs_tx_lane_map_17.0=0x0123 +xgxs_tx_lane_map_19.0=0x0123 +xgxs_tx_lane_map_21.0=0x0123 +xgxs_tx_lane_map_23.0=0x0123 +xgxs_tx_lane_map_25.0=0x0123 + +# Q2 +portmap_34.0=33:25 +portmap_35.0=34:25 +portmap_36.0=35:25 +portmap_37.0=36:25 +portmap_38.0=37:25 +portmap_39.0=38:25 +portmap_40.0=39:25 +portmap_41.0=40:25 +portmap_42.0=41:25 +portmap_43.0=42:25 +portmap_44.0=43:25 +portmap_45.0=44:25 +portmap_46.0=45:25 +portmap_47.0=46:25 +portmap_48.0=47:25 +portmap_49.0=48:25 +portmap_50.0=49:25 +portmap_51.0=50:25 +portmap_52.0=51:25 +portmap_53.0=52:25 +portmap_54.0=53:25 +portmap_55.0=54:25 +portmap_56.0=55:25 +portmap_57.0=56:25 +portmap_58.0=57:100 +portmap_59.0=61:100 +phy_xaui_rx_polarity_flip_34.0=0x0 +phy_xaui_rx_polarity_flip_35.0=0x0 +phy_xaui_rx_polarity_flip_36.0=0x0 +phy_xaui_rx_polarity_flip_37.0=0x0 +phy_xaui_rx_polarity_flip_38.0=0x1 +phy_xaui_rx_polarity_flip_39.0=0x1 +phy_xaui_rx_polarity_flip_40.0=0x1 +phy_xaui_rx_polarity_flip_41.0=0x0 +phy_xaui_rx_polarity_flip_42.0=0x0 +phy_xaui_rx_polarity_flip_43.0=0x0 +phy_xaui_rx_polarity_flip_44.0=0x1 +phy_xaui_rx_polarity_flip_45.0=0x0 +phy_xaui_rx_polarity_flip_46.0=0x1 +phy_xaui_rx_polarity_flip_47.0=0x1 +phy_xaui_rx_polarity_flip_48.0=0x1 +phy_xaui_rx_polarity_flip_49.0=0x0 +phy_xaui_rx_polarity_flip_50.0=0x0 +phy_xaui_rx_polarity_flip_51.0=0x0 +phy_xaui_rx_polarity_flip_52.0=0x1 +phy_xaui_rx_polarity_flip_53.0=0x0 +phy_xaui_rx_polarity_flip_54.0=0x0 +phy_xaui_rx_polarity_flip_55.0=0x1 +phy_xaui_rx_polarity_flip_56.0=0x1 +phy_xaui_rx_polarity_flip_57.0=0x0 +phy_xaui_rx_polarity_flip_58.0=0x1 +phy_xaui_rx_polarity_flip_59.0=0x2 +phy_xaui_tx_polarity_flip_34.0=0x0 +phy_xaui_tx_polarity_flip_34.0=0x0 +phy_xaui_tx_polarity_flip_36.0=0x0 +phy_xaui_tx_polarity_flip_36.0=0x0 +phy_xaui_tx_polarity_flip_38.0=0x0 +phy_xaui_tx_polarity_flip_39.0=0x1 +phy_xaui_tx_polarity_flip_40.0=0x1 +phy_xaui_tx_polarity_flip_41.0=0x1 +phy_xaui_tx_polarity_flip_42.0=0x0 +phy_xaui_tx_polarity_flip_43.0=0x0 +phy_xaui_tx_polarity_flip_44.0=0x0 +phy_xaui_tx_polarity_flip_45.0=0x0 +phy_xaui_tx_polarity_flip_46.0=0x0 +phy_xaui_tx_polarity_flip_47.0=0x1 +phy_xaui_tx_polarity_flip_48.0=0x1 +phy_xaui_tx_polarity_flip_49.0=0x1 +phy_xaui_tx_polarity_flip_50.0=0x1 +phy_xaui_tx_polarity_flip_51.0=0x1 +phy_xaui_tx_polarity_flip_52.0=0x1 +phy_xaui_tx_polarity_flip_53.0=0x1 +phy_xaui_tx_polarity_flip_54.0=0x0 +phy_xaui_tx_polarity_flip_55.0=0x1 +phy_xaui_tx_polarity_flip_56.0=0x1 +phy_xaui_tx_polarity_flip_57.0=0x1 +phy_xaui_tx_polarity_flip_58.0=0x6 +phy_xaui_tx_polarity_flip_59.0=0xb +xgxs_rx_lane_map_34.0=0x0123 +xgxs_rx_lane_map_36.0=0x0123 +xgxs_rx_lane_map_38.0=0x0321 +xgxs_rx_lane_map_40.0=0x0321 +xgxs_rx_lane_map_42.0=0x0321 +xgxs_rx_lane_map_44.0=0x0321 +xgxs_rx_lane_map_46.0=0x0321 +xgxs_rx_lane_map_48.0=0x0321 +xgxs_rx_lane_map_50.0=0x1230 +xgxs_rx_lane_map_52.0=0x1230 +xgxs_rx_lane_map_54.0=0x2301 +xgxs_rx_lane_map_56.0=0x2301 +xgxs_rx_lane_map_58.0=0x1230 +xgxs_rx_lane_map_59.0=0x2103 +xgxs_tx_lane_map_34.0=0x2301 +xgxs_tx_lane_map_36.0=0x2301 +xgxs_tx_lane_map_38.0=0x0321 +xgxs_tx_lane_map_40.0=0x0321 +xgxs_tx_lane_map_42.0=0x2301 +xgxs_tx_lane_map_44.0=0x2301 +xgxs_tx_lane_map_46.0=0x0321 +xgxs_tx_lane_map_48.0=0x0321 +xgxs_tx_lane_map_50.0=0x0123 +xgxs_tx_lane_map_52.0=0x0123 +xgxs_tx_lane_map_54.0=0x1230 +xgxs_tx_lane_map_56.0=0x1230 +xgxs_tx_lane_map_58.0=0x2301 +xgxs_tx_lane_map_59.0=0x1032 + +# Q3 +portmap_68.0=65:100 +portmap_69.0=69:100 +portmap_70.0=73:25 +portmap_71.0=74:25 +portmap_72.0=75:25 +portmap_73.0=76:25 +portmap_74.0=77:25 +portmap_75.0=78:25 +portmap_76.0=79:25 +portmap_77.0=80:25 +portmap_78.0=81:25 +portmap_79.0=82:25 +portmap_80.0=83:25 +portmap_81.0=84:25 +portmap_82.0=85:25 +portmap_83.0=86:25 +portmap_84.0=87:25 +portmap_85.0=88:25 +portmap_86.0=89:25 +portmap_87.0=90:25 +portmap_88.0=91:25 +portmap_89.0=92:25 +portmap_90.0=93:25 +portmap_91.0=94:25 +portmap_92.0=95:25 +portmap_93.0=96:25 +phy_xaui_rx_polarity_flip_68.0=0xd +phy_xaui_rx_polarity_flip_69.0=0x6 +phy_xaui_rx_polarity_flip_70.0=0x1 +phy_xaui_rx_polarity_flip_71.0=0x0 +phy_xaui_rx_polarity_flip_72.0=0x0 +phy_xaui_rx_polarity_flip_73.0=0x0 +phy_xaui_rx_polarity_flip_74.0=0x0 +phy_xaui_rx_polarity_flip_75.0=0x0 +phy_xaui_rx_polarity_flip_76.0=0x0 +phy_xaui_rx_polarity_flip_77.0=0x1 +phy_xaui_rx_polarity_flip_78.0=0x1 +phy_xaui_rx_polarity_flip_79.0=0x1 +phy_xaui_rx_polarity_flip_80.0=0x1 +phy_xaui_rx_polarity_flip_81.0=0x0 +phy_xaui_rx_polarity_flip_82.0=0x0 +phy_xaui_rx_polarity_flip_83.0=0x0 +phy_xaui_rx_polarity_flip_84.0=0x1 +phy_xaui_rx_polarity_flip_85.0=0x1 +phy_xaui_rx_polarity_flip_86.0=0x1 +phy_xaui_rx_polarity_flip_87.0=0x1 +phy_xaui_rx_polarity_flip_88.0=0x1 +phy_xaui_rx_polarity_flip_89.0=0x0 +phy_xaui_rx_polarity_flip_90.0=0x0 +phy_xaui_rx_polarity_flip_91.0=0x0 +phy_xaui_rx_polarity_flip_92.0=0x0 +phy_xaui_rx_polarity_flip_93.0=0x1 +phy_xaui_tx_polarity_flip_68.0=0x9 +phy_xaui_tx_polarity_flip_69.0=0xb +phy_xaui_tx_polarity_flip_70.0=0x1 +phy_xaui_tx_polarity_flip_71.0=0x0 +phy_xaui_tx_polarity_flip_72.0=0x1 +phy_xaui_tx_polarity_flip_73.0=0x1 +phy_xaui_tx_polarity_flip_74.0=0x1 +phy_xaui_tx_polarity_flip_75.0=0x0 +phy_xaui_tx_polarity_flip_76.0=0x0 +phy_xaui_tx_polarity_flip_77.0=0x1 +phy_xaui_tx_polarity_flip_78.0=0x0 +phy_xaui_tx_polarity_flip_79.0=0x1 +phy_xaui_tx_polarity_flip_80.0=0x1 +phy_xaui_tx_polarity_flip_81.0=0x0 +phy_xaui_tx_polarity_flip_82.0=0x0 +phy_xaui_tx_polarity_flip_83.0=0x0 +phy_xaui_tx_polarity_flip_84.0=0x1 +phy_xaui_tx_polarity_flip_85.0=0x1 +phy_xaui_tx_polarity_flip_86.0=0x1 +phy_xaui_tx_polarity_flip_87.0=0x0 +phy_xaui_tx_polarity_flip_88.0=0x0 +phy_xaui_tx_polarity_flip_89.0=0x1 +phy_xaui_tx_polarity_flip_90.0=0x1 +phy_xaui_tx_polarity_flip_91.0=0x0 +phy_xaui_tx_polarity_flip_92.0=0x0 +phy_xaui_tx_polarity_flip_93.0=0x1 +xgxs_rx_lane_map_68.0=0x1230 +xgxs_rx_lane_map_69.0=0x2301 +xgxs_rx_lane_map_70.0=0x1230 +xgxs_rx_lane_map_72.0=0x1230 +xgxs_rx_lane_map_74.0=0x2103 +xgxs_rx_lane_map_76.0=0x2103 +xgxs_rx_lane_map_78.0=0x1230 +xgxs_rx_lane_map_80.0=0x1230 +xgxs_rx_lane_map_82.0=0x2301 +xgxs_rx_lane_map_84.0=0x2301 +xgxs_rx_lane_map_86.0=0x1230 +xgxs_rx_lane_map_88.0=0x1230 +xgxs_rx_lane_map_90.0=0x2103 +xgxs_rx_lane_map_92.0=0x2103 +xgxs_tx_lane_map_68.0=0x0123 +xgxs_tx_lane_map_69.0=0x1230 +xgxs_tx_lane_map_70.0=0x2301 +xgxs_tx_lane_map_72.0=0x2301 +xgxs_tx_lane_map_74.0=0x1032 +xgxs_tx_lane_map_76.0=0x1032 +xgxs_tx_lane_map_78.0=0x0123 +xgxs_tx_lane_map_80.0=0x0123 +xgxs_tx_lane_map_82.0=0x1230 +xgxs_tx_lane_map_84.0=0x1230 +xgxs_tx_lane_map_86.0=0x2301 +xgxs_tx_lane_map_88.0=0x2301 +xgxs_tx_lane_map_90.0=0x1032 +xgxs_tx_lane_map_92.0=0x1032 + +# Q4 +portmap_102.0=97:25 +portmap_103.0=98:25 +portmap_104.0=99:25 +portmap_105.0=100:25 +portmap_106.0=101:25 +portmap_107.0=102:25 +portmap_108.0=103:25 +portmap_109.0=104:25 +portmap_110.0=105:25 +portmap_111.0=106:25 +portmap_112.0=107:25 +portmap_113.0=108:25 +portmap_114.0=109:25 +portmap_115.0=110:25 +portmap_116.0=111:25 +portmap_117.0=112:25 +portmap_118.0=113:25 +portmap_119.0=114:25 +portmap_120.0=115:25 +portmap_121.0=116:25 +portmap_122.0=117:25 +portmap_123.0=118:25 +portmap_124.0=119:25 +portmap_125.0=120:25 +portmap_126.0=121:100 +portmap_127.0=125:100 +phy_xaui_rx_polarity_flip_102.0=0x1 +phy_xaui_rx_polarity_flip_103.0=0x1 +phy_xaui_rx_polarity_flip_104.0=0x0 +phy_xaui_rx_polarity_flip_105.0=0x1 +phy_xaui_rx_polarity_flip_106.0=0x0 +phy_xaui_rx_polarity_flip_107.0=0x0 +phy_xaui_rx_polarity_flip_108.0=0x1 +phy_xaui_rx_polarity_flip_109.0=0x1 +phy_xaui_rx_polarity_flip_110.0=0x1 +phy_xaui_rx_polarity_flip_111.0=0x1 +phy_xaui_rx_polarity_flip_112.0=0x0 +phy_xaui_rx_polarity_flip_113.0=0x0 +phy_xaui_rx_polarity_flip_114.0=0x0 +phy_xaui_rx_polarity_flip_115.0=0x0 +phy_xaui_rx_polarity_flip_116.0=0x1 +phy_xaui_rx_polarity_flip_117.0=0x1 +phy_xaui_rx_polarity_flip_118.0=0x1 +phy_xaui_rx_polarity_flip_119.0=0x1 +phy_xaui_rx_polarity_flip_120.0=0x0 +phy_xaui_rx_polarity_flip_121.0=0x1 +phy_xaui_rx_polarity_flip_122.0=0x1 +phy_xaui_rx_polarity_flip_123.0=0x0 +phy_xaui_rx_polarity_flip_124.0=0x1 +phy_xaui_rx_polarity_flip_125.0=0x0 +phy_xaui_rx_polarity_flip_126.0=0x1 +phy_xaui_rx_polarity_flip_127.0=0x9 +phy_xaui_tx_polarity_flip_102.0=0x0 +phy_xaui_tx_polarity_flip_103.0=0x1 +phy_xaui_tx_polarity_flip_104.0=0x1 +phy_xaui_tx_polarity_flip_105.0=0x0 +phy_xaui_tx_polarity_flip_106.0=0x1 +phy_xaui_tx_polarity_flip_107.0=0x1 +phy_xaui_tx_polarity_flip_108.0=0x0 +phy_xaui_tx_polarity_flip_109.0=0x1 +phy_xaui_tx_polarity_flip_110.0=0x0 +phy_xaui_tx_polarity_flip_111.0=0x1 +phy_xaui_tx_polarity_flip_112.0=0x1 +phy_xaui_tx_polarity_flip_113.0=0x0 +phy_xaui_tx_polarity_flip_114.0=0x1 +phy_xaui_tx_polarity_flip_115.0=0x1 +phy_xaui_tx_polarity_flip_116.0=0x0 +phy_xaui_tx_polarity_flip_117.0=0x1 +phy_xaui_tx_polarity_flip_118.0=0x0 +phy_xaui_tx_polarity_flip_119.0=0x1 +phy_xaui_tx_polarity_flip_120.0=0x1 +phy_xaui_tx_polarity_flip_121.0=0x0 +phy_xaui_tx_polarity_flip_122.0=0x1 +phy_xaui_tx_polarity_flip_123.0=0x1 +phy_xaui_tx_polarity_flip_124.0=0x1 +phy_xaui_tx_polarity_flip_125.0=0x1 +phy_xaui_tx_polarity_flip_126.0=0x6 +phy_xaui_tx_polarity_flip_127.0=0xc +xgxs_rx_lane_map_102.0=0x3210 +xgxs_rx_lane_map_104.0=0x3210 +xgxs_rx_lane_map_106.0=0x3210 +xgxs_rx_lane_map_108.0=0x3210 +xgxs_rx_lane_map_110.0=0x3210 +xgxs_rx_lane_map_112.0=0x3210 +xgxs_rx_lane_map_114.0=0x3210 +xgxs_rx_lane_map_116.0=0x3210 +xgxs_rx_lane_map_118.0=0x3210 +xgxs_rx_lane_map_120.0=0x3210 +xgxs_rx_lane_map_122.0=0x3210 +xgxs_rx_lane_map_124.0=0x3210 +xgxs_rx_lane_map_126.0=0x3210 +xgxs_rx_lane_map_127.0=0x3210 +xgxs_tx_lane_map_102.0=0x0321 +xgxs_tx_lane_map_104.0=0x0321 +xgxs_tx_lane_map_106.0=0x2301 +xgxs_tx_lane_map_108.0=0x2301 +xgxs_tx_lane_map_110.0=0x0321 +xgxs_tx_lane_map_112.0=0x0321 +xgxs_tx_lane_map_114.0=0x2301 +xgxs_tx_lane_map_116.0=0x2301 +xgxs_tx_lane_map_118.0=0x0321 +xgxs_tx_lane_map_120.0=0x0321 +xgxs_tx_lane_map_122.0=0x2301 +xgxs_tx_lane_map_124.0=0x2301 +xgxs_tx_lane_map_126.0=0x0321 +xgxs_tx_lane_map_127.0=0x2301 + +#mmu_init_config="MSFT-TH-Tier0" + +# tuning parameters +serdes_driver_current_1=0xa +serdes_preemphasis_1=0x284008 +serdes_driver_current_2=0xa +serdes_preemphasis_2=0x284008 +serdes_driver_current_3=0xf +serdes_preemphasis_3=0x46408 +serdes_driver_current_4=0xf +serdes_preemphasis_4=0x46408 +serdes_driver_current_5=0xf +serdes_preemphasis_5=0x46408 +serdes_driver_current_6=0xf +serdes_preemphasis_6=0x46408 +serdes_driver_current_7=0xf +serdes_preemphasis_7=0x46408 +serdes_driver_current_8=0xf +serdes_preemphasis_8=0x46408 +serdes_driver_current_9=0xf +serdes_preemphasis_9=0x46408 +serdes_driver_current_10=0xf +serdes_preemphasis_10=0x46408 +serdes_driver_current_11=0xf +serdes_preemphasis_11=0x46408 +serdes_driver_current_12=0xf +serdes_preemphasis_12=0x46408 +serdes_driver_current_13=0xf +serdes_preemphasis_13=0x46408 +serdes_driver_current_14=0xf +serdes_preemphasis_14=0x46408 +serdes_driver_current_15=0xf +serdes_preemphasis_15=0x46408 +serdes_driver_current_16=0xf +serdes_preemphasis_16=0x46408 +serdes_driver_current_17=0xf +serdes_preemphasis_17=0x46408 +serdes_driver_current_18=0xf +serdes_preemphasis_18=0x46408 +serdes_driver_current_19=0xf +serdes_preemphasis_19=0x46408 +serdes_driver_current_20=0xf +serdes_preemphasis_20=0x46408 +serdes_driver_current_21=0xf +serdes_preemphasis_21=0x46408 +serdes_driver_current_22=0xf +serdes_preemphasis_22=0x46408 +serdes_driver_current_23=0xf +serdes_preemphasis_23=0x46408 +serdes_driver_current_24=0xf +serdes_preemphasis_24=0x46408 +serdes_driver_current_25=0xf +serdes_preemphasis_25=0x46408 +serdes_driver_current_26=0xf +serdes_preemphasis_26=0x46408 +serdes_driver_current_34=0xf +serdes_preemphasis_34=0x46408 +serdes_driver_current_35=0xf +serdes_preemphasis_35=0x46408 +serdes_driver_current_36=0xf +serdes_preemphasis_36=0x46408 +serdes_driver_current_37=0xf +serdes_preemphasis_37=0x46408 +serdes_driver_current_38=0xf +serdes_preemphasis_38=0x46408 +serdes_driver_current_39=0xf +serdes_preemphasis_39=0x46408 +serdes_driver_current_40=0xf +serdes_preemphasis_40=0x46408 +serdes_driver_current_41=0xf +serdes_preemphasis_41=0x46408 +serdes_driver_current_42=0xf +serdes_preemphasis_42=0x46408 +serdes_driver_current_43=0xf +serdes_preemphasis_43=0x46408 +serdes_driver_current_44=0xf +serdes_preemphasis_44=0x46408 +serdes_driver_current_45=0xf +serdes_preemphasis_45=0x46408 +serdes_driver_current_46=0xf +serdes_preemphasis_46=0x46408 +serdes_driver_current_47=0xf +serdes_preemphasis_47=0x46408 +serdes_driver_current_48=0xf +serdes_preemphasis_48=0x46408 +serdes_driver_current_49=0xf +serdes_preemphasis_49=0x46408 +serdes_driver_current_50=0xf +serdes_preemphasis_50=0x46408 +serdes_driver_current_51=0xf +serdes_preemphasis_51=0x46408 +serdes_driver_current_52=0xf +serdes_preemphasis_52=0x46408 +serdes_driver_current_53=0xf +serdes_preemphasis_53=0x46408 +serdes_driver_current_54=0xf +serdes_preemphasis_54=0x46408 +serdes_driver_current_55=0xf +serdes_preemphasis_55=0x46408 +serdes_driver_current_56=0xf +serdes_preemphasis_56=0x46408 +serdes_driver_current_57=0xf +serdes_preemphasis_57=0x46408 +serdes_driver_current_58=0xf +serdes_preemphasis_58=0x373108 +serdes_driver_current_59=0xf +serdes_preemphasis_59=0x373108 +serdes_driver_current_68=0xf +serdes_preemphasis_68=0x373108 +serdes_driver_current_69=0xf +serdes_preemphasis_69=0x373108 +serdes_driver_current_70=0xf +serdes_preemphasis_70=0x46408 +serdes_driver_current_71=0xf +serdes_preemphasis_71=0x46408 +serdes_driver_current_72=0xf +serdes_preemphasis_72=0x46408 +serdes_driver_current_73=0xf +serdes_preemphasis_73=0x46408 +serdes_driver_current_74=0xf +serdes_preemphasis_74=0x46408 +serdes_driver_current_75=0xf +serdes_preemphasis_75=0x46408 +serdes_driver_current_76=0xf +serdes_preemphasis_76=0x46408 +serdes_driver_current_77=0xf +serdes_preemphasis_77=0x46408 +serdes_driver_current_78=0xf +serdes_preemphasis_78=0x46408 +serdes_driver_current_79=0xf +serdes_preemphasis_79=0x46408 +serdes_driver_current_80=0xf +serdes_preemphasis_80=0x46408 +serdes_driver_current_81=0xf +serdes_preemphasis_81=0x46408 +serdes_driver_current_82=0xf +serdes_preemphasis_82=0x46408 +serdes_driver_current_83=0xf +serdes_preemphasis_83=0x46408 +serdes_driver_current_84=0xf +serdes_preemphasis_84=0x46408 +serdes_driver_current_85=0xf +serdes_preemphasis_85=0x46408 +serdes_driver_current_86=0xf +serdes_preemphasis_86=0x46408 +serdes_driver_current_87=0xf +serdes_preemphasis_87=0x46408 +serdes_driver_current_88=0xf +serdes_preemphasis_88=0x46408 +serdes_driver_current_89=0xf +serdes_preemphasis_89=0x46408 +serdes_driver_current_90=0xf +serdes_preemphasis_90=0x46408 +serdes_driver_current_91=0xf +serdes_preemphasis_91=0x46408 +serdes_driver_current_92=0xf +serdes_preemphasis_92=0x46408 +serdes_driver_current_93=0xf +serdes_preemphasis_93=0x46408 +serdes_driver_current_102=0xf +serdes_preemphasis_102=0x46408 +serdes_driver_current_103=0xf +serdes_preemphasis_103=0x46408 +serdes_driver_current_104=0xf +serdes_preemphasis_104=0x46408 +serdes_driver_current_105=0xf +serdes_preemphasis_105=0x46408 +serdes_driver_current_106=0xf +serdes_preemphasis_106=0x46408 +serdes_driver_current_107=0xf +serdes_preemphasis_107=0x46408 +serdes_driver_current_108=0xf +serdes_preemphasis_108=0x46408 +serdes_driver_current_109=0xf +serdes_preemphasis_109=0x46408 +serdes_driver_current_110=0xf +serdes_preemphasis_110=0x46408 +serdes_driver_current_111=0xf +serdes_preemphasis_111=0x46408 +serdes_driver_current_112=0xf +serdes_preemphasis_112=0x46408 +serdes_driver_current_113=0xf +serdes_preemphasis_113=0x46408 +serdes_driver_current_114=0xf +serdes_preemphasis_114=0x46408 +serdes_driver_current_115=0xf +serdes_preemphasis_115=0x46408 +serdes_driver_current_116=0xf +serdes_preemphasis_116=0x46408 +serdes_driver_current_117=0xf +serdes_preemphasis_117=0x46408 +serdes_driver_current_118=0xf +serdes_preemphasis_118=0x46408 +serdes_driver_current_119=0xf +serdes_preemphasis_119=0x46408 +serdes_driver_current_120=0xf +serdes_preemphasis_120=0x46408 +serdes_driver_current_121=0xf +serdes_preemphasis_121=0x46408 +serdes_driver_current_122=0xf +serdes_preemphasis_122=0x46408 +serdes_driver_current_123=0xf +serdes_preemphasis_123=0x46408 +serdes_driver_current_124=0xf +serdes_preemphasis_124=0x46408 +serdes_driver_current_125=0xf +serdes_preemphasis_125=0x46408 +serdes_driver_current_126=0xa +serdes_preemphasis_126=0x284008 +serdes_driver_current_127=0xa +serdes_preemphasis_127=0x284008 diff --git a/device/arista/x86_64-arista_7060_cx32s/default_sku b/device/arista/x86_64-arista_7060_cx32s/default_sku new file mode 100644 index 00000000000..e94d12dba89 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/default_sku @@ -0,0 +1 @@ +Arista-7060CX-32S-C32 t1 diff --git a/device/arista/x86_64-arista_7060_cx32s/fancontrol b/device/arista/x86_64-arista_7060_cx32s/fancontrol new file mode 100644 index 00000000000..43f885a9f24 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/fancontrol @@ -0,0 +1,10 @@ +INTERVAL=5 +DEVPATH=hwmon2=devices/pci0000:00/0000:00:02.2/0000:02:00.0/i2c-2/2-001a hwmon4=devices/pci0000:00/0000:00:02.2/0000:02:00.0/i2c-3/3-0060 +DEVNAME=hwmon2=max6697 hwmon4=crow_cpld +FCTEMPS=hwmon4/pwm4=hwmon2/temp1_input hwmon4/pwm3=hwmon2/temp1_input hwmon4/pwm2=hwmon2/temp1_input hwmon4/pwm1=hwmon2/temp1_input +FCFANS=hwmon4/pwm4=hwmon4/fan4_input hwmon4/pwm3=hwmon4/fan3_input hwmon4/pwm2=hwmon4/fan2_input hwmon4/pwm1=hwmon4/fan1_input +MINTEMP=hwmon4/pwm4=40 hwmon4/pwm3=40 hwmon4/pwm2=40 hwmon4/pwm1=40 +MINPWM=hwmon4/pwm4=179 hwmon4/pwm3=179 hwmon4/pwm2=179 hwmon4/pwm1=179 +MAXTEMP=hwmon4/pwm4=50 hwmon4/pwm3=50 hwmon4/pwm2=50 hwmon4/pwm1=50 +MINSTART=hwmon4/pwm4=179 hwmon4/pwm3=179 hwmon4/pwm2=179 hwmon4/pwm1=179 +MINSTOP=hwmon4/pwm4=179 hwmon4/pwm3=179 hwmon4/pwm2=179 hwmon4/pwm1=179 diff --git a/device/arista/x86_64-arista_7060_cx32s/platform_reboot b/device/arista/x86_64-arista_7060_cx32s/platform_reboot new file mode 120000 index 00000000000..7f94a49e38b --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/platform_reboot @@ -0,0 +1 @@ +../x86_64-arista_common/platform_reboot \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060_cx32s/plugins b/device/arista/x86_64-arista_7060_cx32s/plugins new file mode 120000 index 00000000000..5fbbf98a628 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/plugins @@ -0,0 +1 @@ +../x86_64-arista_common/plugins/ \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060_cx32s/sensors.conf b/device/arista/x86_64-arista_7060_cx32s/sensors.conf new file mode 100644 index 00000000000..57e78588191 --- /dev/null +++ b/device/arista/x86_64-arista_7060_cx32s/sensors.conf @@ -0,0 +1,51 @@ +# libsensors configuration file for DCS-7060CX-32S +# ------------------------------------------------ +# + +bus "i2c-2" "SCD 0000:02:00.0 SMBus master 0 bus 0" +bus "i2c-3" "SCD 0000:02:00.0 SMBus master 0 bus 1" +bus "i2c-5" "SCD 0000:02:00.0 SMBus master 0 bus 3" +bus "i2c-6" "SCD 0000:02:00.0 SMBus master 0 bus 4" +bus "i2c-7" "SCD 0000:02:00.0 SMBus master 0 bus 5" + +chip "k10temp-pci-00c3" + label temp1 "Cpu temp sensor" + +chip "max6697-i2c-2-1a" + label temp1 "Board sensor" + set temp1_max 95 + + label temp2 "Switch chip left sensor" + set temp2_max 95 + set temp2_crit 105 + + ignore temp3 + ignore temp4 + ignore temp5 + + label temp6 "Switch chip right sensor" + set temp6_max 95 + set temp6_crit 105 + + label temp7 "Front panel temp sensor" + set temp7_max 65 + set temp7_crit 75 + +chip "max6658-i2c-3-4c" + label temp1 "Cpu board temp sensor" + set temp1_max 75 + set temp1_crit 80 + + label temp2 "Back panel temp sensor" + set temp2_max 75 + set temp2_crit 80 + +chip "pmbus-i2c-6-58" + label temp1 "Power supply 1 hotspot sensor" + label temp2 "Power supply 1 inlet temp sensor" + label temp3 "Power supply 1 exhaust temp sensor" + +chip "pmbus-i2c-5-58" + label temp1 "Power supply 2 hotspot sensor" + label temp2 "Power supply 2 inlet temp sensor" + label temp3 "Power supply 2 exhaust temp sensor" diff --git a/device/arista/x86_64-arista_7060dx4_32 b/device/arista/x86_64-arista_7060dx4_32 new file mode 120000 index 00000000000..ac560a1139b --- /dev/null +++ b/device/arista/x86_64-arista_7060dx4_32 @@ -0,0 +1 @@ +x86_64-arista_7060px4_32/ \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-C64/port_config.ini b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-C64/port_config.ini new file mode 100644 index 00000000000..3a643598649 --- /dev/null +++ b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-C64/port_config.ini @@ -0,0 +1,67 @@ +# name lanes alias index speed +Ethernet0 1,2,3,4 Ethernet1/1 1 100000 +Ethernet4 5,6,7,8 Ethernet1/5 1 100000 +Ethernet8 9,10,11,12 Ethernet2/1 2 100000 +Ethernet12 13,14,15,16 Ethernet2/5 2 100000 +Ethernet16 17,18,19,20 Ethernet3/1 3 100000 +Ethernet20 21,22,23,24 Ethernet3/5 3 100000 +Ethernet24 25,26,27,28 Ethernet4/1 4 100000 +Ethernet28 29,30,31,32 Ethernet4/5 4 100000 +Ethernet32 33,34,35,36 Ethernet5/1 5 100000 +Ethernet36 37,38,39,40 Ethernet5/5 5 100000 +Ethernet40 41,42,43,44 Ethernet6/1 6 100000 +Ethernet44 45,46,47,48 Ethernet6/5 6 100000 +Ethernet48 49,50,51,52 Ethernet7/1 7 100000 +Ethernet52 53,54,55,56 Ethernet7/5 7 100000 +Ethernet56 57,58,59,60 Ethernet8/1 8 100000 +Ethernet60 61,62,63,64 Ethernet8/5 8 100000 +Ethernet64 65,66,67,68 Ethernet9/1 9 100000 +Ethernet68 69,70,71,72 Ethernet9/5 9 100000 +Ethernet72 73,74,75,76 Ethernet10/1 10 100000 +Ethernet76 77,78,79,80 Ethernet10/5 10 100000 +Ethernet80 81,82,83,84 Ethernet11/1 11 100000 +Ethernet84 85,86,87,88 Ethernet11/5 11 100000 +Ethernet88 89,90,91,92 Ethernet12/1 12 100000 +Ethernet92 93,94,95,96 Ethernet12/5 12 100000 +Ethernet96 97,98,99,100 Ethernet13/1 13 100000 +Ethernet100 101,102,103,104 Ethernet13/5 13 100000 +Ethernet104 105,106,107,108 Ethernet14/1 14 100000 +Ethernet108 109,110,111,112 Ethernet14/5 14 100000 +Ethernet112 113,114,115,116 Ethernet15/1 15 100000 +Ethernet116 117,118,119,120 Ethernet15/5 15 100000 +Ethernet120 121,122,123,124 Ethernet16/1 16 100000 +Ethernet124 125,126,127,128 Ethernet16/5 16 100000 +Ethernet128 129,130,131,132 Ethernet17/1 17 100000 +Ethernet132 133,134,135,136 Ethernet17/5 17 100000 +Ethernet136 137,138,139,140 Ethernet18/1 18 100000 +Ethernet140 141,142,143,144 Ethernet18/5 18 100000 +Ethernet144 145,146,147,148 Ethernet19/1 19 100000 +Ethernet148 149,150,151,152 Ethernet19/5 19 100000 +Ethernet152 153,154,155,156 Ethernet20/1 20 100000 +Ethernet156 157,158,159,160 Ethernet20/5 20 100000 +Ethernet160 161,162,163,164 Ethernet21/1 21 100000 +Ethernet164 165,166,167,168 Ethernet21/5 21 100000 +Ethernet168 169,170,171,172 Ethernet22/1 22 100000 +Ethernet172 173,174,175,176 Ethernet22/5 22 100000 +Ethernet176 177,178,179,180 Ethernet23/1 23 100000 +Ethernet180 181,182,183,184 Ethernet23/5 23 100000 +Ethernet184 185,186,187,188 Ethernet24/1 24 100000 +Ethernet188 189,190,191,192 Ethernet24/5 24 100000 +Ethernet192 193,194,195,196 Ethernet25/1 25 100000 +Ethernet196 197,198,199,200 Ethernet25/5 25 100000 +Ethernet200 201,202,203,204 Ethernet26/1 26 100000 +Ethernet204 205,206,207,208 Ethernet26/5 26 100000 +Ethernet208 209,210,211,212 Ethernet27/1 27 100000 +Ethernet212 213,214,215,216 Ethernet27/5 27 100000 +Ethernet216 217,218,219,220 Ethernet28/1 28 100000 +Ethernet220 221,222,223,224 Ethernet28/5 28 100000 +Ethernet224 225,226,227,228 Ethernet29/1 29 100000 +Ethernet228 229,230,231,232 Ethernet29/5 29 100000 +Ethernet232 233,234,235,236 Ethernet30/1 30 100000 +Ethernet236 237,238,239,240 Ethernet30/5 30 100000 +Ethernet240 241,242,243,244 Ethernet31/1 31 100000 +Ethernet244 245,246,247,248 Ethernet31/5 31 100000 +Ethernet248 249,250,251,252 Ethernet32/1 32 100000 +Ethernet252 253,254,255,256 Ethernet32/5 32 100000 +Ethernet256 258 Ethernet33 33 10000 +Ethernet260 257 Ethernet34 34 10000 diff --git a/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-C64/sai.profile b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-C64/sai.profile new file mode 100644 index 00000000000..8f820cb0f06 --- /dev/null +++ b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-C64/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-a7060px4-32-64x100G.config.bcm diff --git a/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-C64/th3-a7060px4-32-64x100G.config.bcm b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-C64/th3-a7060px4-32-64x100G.config.bcm new file mode 100644 index 00000000000..5002d29045a --- /dev/null +++ b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-C64/th3-a7060px4-32-64x100G.config.bcm @@ -0,0 +1,945 @@ +PHY_AN_ALLOW_PLL_CHANGE=1 +arl_clean_timeout_usec=15000000 +asf_mem_profile.0=2 +bcm_num_cos.0=8 +bcm_stat_flags=1 +bcm_stat_jumbo.0=9236 +cdma_timeout_usec.0=15000000 +dma_desc_timeout_usec.0=15000000 +dpr_clock_frequency.0=1000 +higig2_hdr_mode.0=1 +ipv6_lpm_128b_enable.0=0 +l2xmsg_mode.0=1 +l2_mem_entries.0=8192 +l3_alpm_enable.0=2 +l3_mem_entries.0=16384 +max_vp_lags.0=0 +miim_intr_enable.0=0 +module_64ports.0=1 +multicast_l2_range.0=511 +num_ipv6_lpm_128b_entries.0=0 +os=unix +oversubscribe_mode=1 +pbmp_xport_xe.0=0xf0000f4000f0000f0000f0000f4000f0001e +phy_an_c37_38.0=2 +phy_an_c37_118.0=2 +phy_an_c37_1.0=1 +phy_an_c37_2.0=1 +phy_an_c37_3.0=1 +phy_an_c37_4.0=1 +phy_an_c37_5.0=1 +phy_an_c37_6.0=1 +phy_an_c37_7.0=1 +phy_an_c37_8.0=1 +phy_an_c37_20.0=1 +phy_an_c37_21.0=1 +phy_an_c37_22.0=1 +phy_an_c37_23.0=1 +phy_an_c37_24.0=1 +phy_an_c37_25.0=1 +phy_an_c37_26.0=1 +phy_an_c37_27.0=1 +phy_an_c37_38.0=0 +phy_an_c37_40.0=1 +phy_an_c37_41.0=1 +phy_an_c37_42.0=1 +phy_an_c37_43.0=1 +phy_an_c37_44.0=1 +phy_an_c37_45.0=1 +phy_an_c37_46.0=1 +phy_an_c37_47.0=1 +phy_an_c37_60.0=1 +phy_an_c37_61.0=1 +phy_an_c37_62.0=1 +phy_an_c37_63.0=1 +phy_an_c37_64.0=1 +phy_an_c37_65.0=1 +phy_an_c37_66.0=1 +phy_an_c37_67.0=1 +phy_an_c37_80.0=1 +phy_an_c37_81.0=1 +phy_an_c37_82.0=1 +phy_an_c37_83.0=1 +phy_an_c37_84.0=1 +phy_an_c37_85.0=1 +phy_an_c37_86.0=1 +phy_an_c37_87.0=1 +phy_an_c37_100.0=1 +phy_an_c37_101.0=1 +phy_an_c37_102.0=1 +phy_an_c37_103.0=1 +phy_an_c37_104.0=1 +phy_an_c37_105.0=1 +phy_an_c37_106.0=1 +phy_an_c37_107.0=1 +phy_an_c37_118.0=0 +phy_an_c37_120.0=1 +phy_an_c37_121.0=1 +phy_an_c37_122.0=1 +phy_an_c37_123.0=1 +phy_an_c37_124.0=1 +phy_an_c37_125.0=1 +phy_an_c37_126.0=1 +phy_an_c37_127.0=1 +phy_an_c37_140.0=1 +phy_an_c37_141.0=1 +phy_an_c37_142.0=1 +phy_an_c37_143.0=1 +phy_an_c37_144.0=1 +phy_an_c37_145.0=1 +phy_an_c37_146.0=1 +phy_an_c37_147.0=1 +phy_chain_rx_lane_map_physical{1.0}=0x72634150 +phy_chain_rx_lane_map_physical{9.0}=0x63725041 +phy_chain_rx_lane_map_physical{17.0}=0x23071465 +phy_chain_rx_lane_map_physical{25.0}=0x03125746 +phy_chain_rx_lane_map_physical{33.0}=0x12063574 +phy_chain_rx_lane_map_physical{41.0}=0x03125647 +phy_chain_rx_lane_map_physical{49.0}=0x12053467 +phy_chain_rx_lane_map_physical{57.0}=0x03125647 +phy_chain_rx_lane_map_physical{65.0}=0x12043576 +phy_chain_rx_lane_map_physical{73.0}=0x03125746 +phy_chain_rx_lane_map_physical{81.0}=0x12043576 +phy_chain_rx_lane_map_physical{89.0}=0x03125746 +phy_chain_rx_lane_map_physical{97.0}=0x40165327 +phy_chain_rx_lane_map_physical{105.0}=0x56470213 +phy_chain_rx_lane_map_physical{113.0}=0x21340576 +phy_chain_rx_lane_map_physical{121.0}=0x47562130 +phy_chain_rx_lane_map_physical{129.0}=0x56437201 +phy_chain_rx_lane_map_physical{137.0}=0x03125647 +phy_chain_rx_lane_map_physical{145.0}=0x12043576 +phy_chain_rx_lane_map_physical{153.0}=0x54106723 +phy_chain_rx_lane_map_physical{161.0}=0x63257014 +phy_chain_rx_lane_map_physical{169.0}=0x03125647 +phy_chain_rx_lane_map_physical{177.0}=0x12043567 +phy_chain_rx_lane_map_physical{185.0}=0x03125647 +phy_chain_rx_lane_map_physical{193.0}=0x12043567 +phy_chain_rx_lane_map_physical{201.0}=0x03125647 +phy_chain_rx_lane_map_physical{209.0}=0x12043576 +phy_chain_rx_lane_map_physical{217.0}=0x03125467 +phy_chain_rx_lane_map_physical{225.0}=0x12073465 +phy_chain_rx_lane_map_physical{233.0}=0x30215647 +phy_chain_rx_lane_map_physical{241.0}=0x23071564 +phy_chain_rx_lane_map_physical{249.0}=0x72634150 +phy_chain_rx_lane_map_physical{257.0}=0x3210 +phy_chain_rx_polarity_flip_physical{1.0}=0x1 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x1 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x1 +phy_chain_rx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x1 +phy_chain_rx_polarity_flip_physical{82.0}=0x1 +phy_chain_rx_polarity_flip_physical{83.0}=0x0 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{89.0}=0x1 +phy_chain_rx_polarity_flip_physical{90.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x0 +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{97.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 +phy_chain_rx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x1 +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{120.0}=0x1 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{133.0}=0x0 +phy_chain_rx_polarity_flip_physical{134.0}=0x1 +phy_chain_rx_polarity_flip_physical{135.0}=0x0 +phy_chain_rx_polarity_flip_physical{136.0}=0x0 +phy_chain_rx_polarity_flip_physical{137.0}=0x0 +phy_chain_rx_polarity_flip_physical{138.0}=0x1 +phy_chain_rx_polarity_flip_physical{139.0}=0x1 +phy_chain_rx_polarity_flip_physical{140.0}=0x0 +phy_chain_rx_polarity_flip_physical{141.0}=0x0 +phy_chain_rx_polarity_flip_physical{142.0}=0x1 +phy_chain_rx_polarity_flip_physical{143.0}=0x1 +phy_chain_rx_polarity_flip_physical{144.0}=0x0 +phy_chain_rx_polarity_flip_physical{145.0}=0x1 +phy_chain_rx_polarity_flip_physical{146.0}=0x1 +phy_chain_rx_polarity_flip_physical{147.0}=0x0 +phy_chain_rx_polarity_flip_physical{148.0}=0x0 +phy_chain_rx_polarity_flip_physical{149.0}=0x1 +phy_chain_rx_polarity_flip_physical{150.0}=0x1 +phy_chain_rx_polarity_flip_physical{151.0}=0x0 +phy_chain_rx_polarity_flip_physical{152.0}=0x0 +phy_chain_rx_polarity_flip_physical{153.0}=0x0 +phy_chain_rx_polarity_flip_physical{154.0}=0x1 +phy_chain_rx_polarity_flip_physical{155.0}=0x0 +phy_chain_rx_polarity_flip_physical{156.0}=0x1 +phy_chain_rx_polarity_flip_physical{157.0}=0x1 +phy_chain_rx_polarity_flip_physical{158.0}=0x0 +phy_chain_rx_polarity_flip_physical{159.0}=0x1 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 +phy_chain_rx_polarity_flip_physical{161.0}=0x1 +phy_chain_rx_polarity_flip_physical{162.0}=0x1 +phy_chain_rx_polarity_flip_physical{163.0}=0x1 +phy_chain_rx_polarity_flip_physical{164.0}=0x1 +phy_chain_rx_polarity_flip_physical{165.0}=0x0 +phy_chain_rx_polarity_flip_physical{166.0}=0x0 +phy_chain_rx_polarity_flip_physical{167.0}=0x0 +phy_chain_rx_polarity_flip_physical{168.0}=0x0 +phy_chain_rx_polarity_flip_physical{169.0}=0x0 +phy_chain_rx_polarity_flip_physical{170.0}=0x1 +phy_chain_rx_polarity_flip_physical{171.0}=0x1 +phy_chain_rx_polarity_flip_physical{172.0}=0x0 +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x1 +phy_chain_rx_polarity_flip_physical{175.0}=0x1 +phy_chain_rx_polarity_flip_physical{176.0}=0x0 +phy_chain_rx_polarity_flip_physical{177.0}=0x0 +phy_chain_rx_polarity_flip_physical{178.0}=0x0 +phy_chain_rx_polarity_flip_physical{179.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x0 +phy_chain_rx_polarity_flip_physical{181.0}=0x1 +phy_chain_rx_polarity_flip_physical{182.0}=0x1 +phy_chain_rx_polarity_flip_physical{183.0}=0x0 +phy_chain_rx_polarity_flip_physical{184.0}=0x0 +phy_chain_rx_polarity_flip_physical{185.0}=0x0 +phy_chain_rx_polarity_flip_physical{186.0}=0x1 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x0 +phy_chain_rx_polarity_flip_physical{189.0}=0x0 +phy_chain_rx_polarity_flip_physical{190.0}=0x1 +phy_chain_rx_polarity_flip_physical{191.0}=0x1 +phy_chain_rx_polarity_flip_physical{192.0}=0x0 +phy_chain_rx_polarity_flip_physical{193.0}=0x0 +phy_chain_rx_polarity_flip_physical{194.0}=0x0 +phy_chain_rx_polarity_flip_physical{195.0}=0x0 +phy_chain_rx_polarity_flip_physical{196.0}=0x0 +phy_chain_rx_polarity_flip_physical{197.0}=0x1 +phy_chain_rx_polarity_flip_physical{198.0}=0x1 +phy_chain_rx_polarity_flip_physical{199.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x0 +phy_chain_rx_polarity_flip_physical{201.0}=0x0 +phy_chain_rx_polarity_flip_physical{202.0}=0x1 +phy_chain_rx_polarity_flip_physical{203.0}=0x1 +phy_chain_rx_polarity_flip_physical{204.0}=0x0 +phy_chain_rx_polarity_flip_physical{205.0}=0x0 +phy_chain_rx_polarity_flip_physical{206.0}=0x1 +phy_chain_rx_polarity_flip_physical{207.0}=0x1 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 +phy_chain_rx_polarity_flip_physical{209.0}=0x1 +phy_chain_rx_polarity_flip_physical{210.0}=0x1 +phy_chain_rx_polarity_flip_physical{211.0}=0x0 +phy_chain_rx_polarity_flip_physical{212.0}=0x0 +phy_chain_rx_polarity_flip_physical{213.0}=0x1 +phy_chain_rx_polarity_flip_physical{214.0}=0x1 +phy_chain_rx_polarity_flip_physical{215.0}=0x0 +phy_chain_rx_polarity_flip_physical{216.0}=0x0 +phy_chain_rx_polarity_flip_physical{217.0}=0x0 +phy_chain_rx_polarity_flip_physical{218.0}=0x1 +phy_chain_rx_polarity_flip_physical{219.0}=0x1 +phy_chain_rx_polarity_flip_physical{220.0}=0x0 +phy_chain_rx_polarity_flip_physical{221.0}=0x0 +phy_chain_rx_polarity_flip_physical{222.0}=0x1 +phy_chain_rx_polarity_flip_physical{223.0}=0x1 +phy_chain_rx_polarity_flip_physical{224.0}=0x0 +phy_chain_rx_polarity_flip_physical{225.0}=0x0 +phy_chain_rx_polarity_flip_physical{226.0}=0x0 +phy_chain_rx_polarity_flip_physical{227.0}=0x1 +phy_chain_rx_polarity_flip_physical{228.0}=0x0 +phy_chain_rx_polarity_flip_physical{229.0}=0x0 +phy_chain_rx_polarity_flip_physical{230.0}=0x1 +phy_chain_rx_polarity_flip_physical{231.0}=0x0 +phy_chain_rx_polarity_flip_physical{232.0}=0x0 +phy_chain_rx_polarity_flip_physical{233.0}=0x0 +phy_chain_rx_polarity_flip_physical{234.0}=0x1 +phy_chain_rx_polarity_flip_physical{235.0}=0x1 +phy_chain_rx_polarity_flip_physical{236.0}=0x0 +phy_chain_rx_polarity_flip_physical{237.0}=0x1 +phy_chain_rx_polarity_flip_physical{238.0}=0x0 +phy_chain_rx_polarity_flip_physical{239.0}=0x0 +phy_chain_rx_polarity_flip_physical{240.0}=0x1 +phy_chain_rx_polarity_flip_physical{241.0}=0x1 +phy_chain_rx_polarity_flip_physical{242.0}=0x0 +phy_chain_rx_polarity_flip_physical{243.0}=0x0 +phy_chain_rx_polarity_flip_physical{244.0}=0x0 +phy_chain_rx_polarity_flip_physical{245.0}=0x0 +phy_chain_rx_polarity_flip_physical{246.0}=0x1 +phy_chain_rx_polarity_flip_physical{247.0}=0x1 +phy_chain_rx_polarity_flip_physical{248.0}=0x1 +phy_chain_rx_polarity_flip_physical{249.0}=0x1 +phy_chain_rx_polarity_flip_physical{250.0}=0x1 +phy_chain_rx_polarity_flip_physical{251.0}=0x0 +phy_chain_rx_polarity_flip_physical{252.0}=0x0 +phy_chain_rx_polarity_flip_physical{253.0}=0x0 +phy_chain_rx_polarity_flip_physical{254.0}=0x0 +phy_chain_rx_polarity_flip_physical{255.0}=0x1 +phy_chain_rx_polarity_flip_physical{256.0}=0x1 +phy_chain_rx_polarity_flip_physical{257.0}=0x0 +phy_chain_rx_polarity_flip_physical{258.0}=0x0 +phy_chain_tx_lane_map_physical{1.0}=0x13245076 +phy_chain_tx_lane_map_physical{9.0}=0x76501423 +phy_chain_tx_lane_map_physical{17.0}=0x75643120 +phy_chain_tx_lane_map_physical{25.0}=0x74653201 +phy_chain_tx_lane_map_physical{33.0}=0x75603124 +phy_chain_tx_lane_map_physical{41.0}=0x64753120 +phy_chain_tx_lane_map_physical{49.0}=0x65741032 +phy_chain_tx_lane_map_physical{57.0}=0x64753210 +phy_chain_tx_lane_map_physical{65.0}=0x65740132 +phy_chain_tx_lane_map_physical{73.0}=0x64753210 +phy_chain_tx_lane_map_physical{81.0}=0x65740132 +phy_chain_tx_lane_map_physical{89.0}=0x64753210 +phy_chain_tx_lane_map_physical{97.0}=0x63057124 +phy_chain_tx_lane_map_physical{105.0}=0x67453021 +phy_chain_tx_lane_map_physical{113.0}=0x76502413 +phy_chain_tx_lane_map_physical{121.0}=0x13257064 +phy_chain_tx_lane_map_physical{129.0}=0x32146057 +phy_chain_tx_lane_map_physical{137.0}=0x57613420 +phy_chain_tx_lane_map_physical{145.0}=0x76502413 +phy_chain_tx_lane_map_physical{153.0}=0x64173520 +phy_chain_tx_lane_map_physical{161.0}=0x56742031 +phy_chain_tx_lane_map_physical{169.0}=0x74601523 +phy_chain_tx_lane_map_physical{177.0}=0x56742031 +phy_chain_tx_lane_map_physical{185.0}=0x74601523 +phy_chain_tx_lane_map_physical{193.0}=0x56742031 +phy_chain_tx_lane_map_physical{201.0}=0x74601523 +phy_chain_tx_lane_map_physical{209.0}=0x56742031 +phy_chain_tx_lane_map_physical{217.0}=0x74603512 +phy_chain_tx_lane_map_physical{225.0}=0x75642031 +phy_chain_tx_lane_map_physical{233.0}=0x57612430 +phy_chain_tx_lane_map_physical{241.0}=0x65742031 +phy_chain_tx_lane_map_physical{249.0}=0x52316470 +phy_chain_tx_lane_map_physical{257.0}=0x3210 +phy_chain_tx_polarity_flip_physical{1.0}=0x1 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{9.0}=0x1 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{17.0}=0x1 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x1 +phy_chain_tx_polarity_flip_physical{83.0}=0x0 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x0 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 +phy_chain_tx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x1 +phy_chain_tx_polarity_flip_physical{91.0}=0x0 +phy_chain_tx_polarity_flip_physical{92.0}=0x1 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_tx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 +phy_chain_tx_polarity_flip_physical{97.0}=0x0 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_tx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{109.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 +phy_chain_tx_polarity_flip_physical{113.0}=0x0 +phy_chain_tx_polarity_flip_physical{114.0}=0x1 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x0 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x0 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x1 +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x1 +phy_chain_tx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_tx_polarity_flip_physical{133.0}=0x1 +phy_chain_tx_polarity_flip_physical{134.0}=0x0 +phy_chain_tx_polarity_flip_physical{135.0}=0x0 +phy_chain_tx_polarity_flip_physical{136.0}=0x0 +phy_chain_tx_polarity_flip_physical{137.0}=0x0 +phy_chain_tx_polarity_flip_physical{138.0}=0x0 +phy_chain_tx_polarity_flip_physical{139.0}=0x1 +phy_chain_tx_polarity_flip_physical{140.0}=0x1 +phy_chain_tx_polarity_flip_physical{141.0}=0x1 +phy_chain_tx_polarity_flip_physical{142.0}=0x1 +phy_chain_tx_polarity_flip_physical{143.0}=0x0 +phy_chain_tx_polarity_flip_physical{144.0}=0x0 +phy_chain_tx_polarity_flip_physical{145.0}=0x0 +phy_chain_tx_polarity_flip_physical{146.0}=0x1 +phy_chain_tx_polarity_flip_physical{147.0}=0x0 +phy_chain_tx_polarity_flip_physical{148.0}=0x0 +phy_chain_tx_polarity_flip_physical{149.0}=0x1 +phy_chain_tx_polarity_flip_physical{150.0}=0x0 +phy_chain_tx_polarity_flip_physical{151.0}=0x0 +phy_chain_tx_polarity_flip_physical{152.0}=0x0 +phy_chain_tx_polarity_flip_physical{153.0}=0x0 +phy_chain_tx_polarity_flip_physical{154.0}=0x0 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x1 +phy_chain_tx_polarity_flip_physical{157.0}=0x0 +phy_chain_tx_polarity_flip_physical{158.0}=0x1 +phy_chain_tx_polarity_flip_physical{159.0}=0x1 +phy_chain_tx_polarity_flip_physical{160.0}=0x0 +phy_chain_tx_polarity_flip_physical{161.0}=0x0 +phy_chain_tx_polarity_flip_physical{162.0}=0x1 +phy_chain_tx_polarity_flip_physical{163.0}=0x1 +phy_chain_tx_polarity_flip_physical{164.0}=0x0 +phy_chain_tx_polarity_flip_physical{165.0}=0x0 +phy_chain_tx_polarity_flip_physical{166.0}=0x0 +phy_chain_tx_polarity_flip_physical{167.0}=0x0 +phy_chain_tx_polarity_flip_physical{168.0}=0x0 +phy_chain_tx_polarity_flip_physical{169.0}=0x1 +phy_chain_tx_polarity_flip_physical{170.0}=0x0 +phy_chain_tx_polarity_flip_physical{171.0}=0x0 +phy_chain_tx_polarity_flip_physical{172.0}=0x1 +phy_chain_tx_polarity_flip_physical{173.0}=0x0 +phy_chain_tx_polarity_flip_physical{174.0}=0x1 +phy_chain_tx_polarity_flip_physical{175.0}=0x1 +phy_chain_tx_polarity_flip_physical{176.0}=0x0 +phy_chain_tx_polarity_flip_physical{177.0}=0x0 +phy_chain_tx_polarity_flip_physical{178.0}=0x1 +phy_chain_tx_polarity_flip_physical{179.0}=0x1 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 +phy_chain_tx_polarity_flip_physical{181.0}=0x0 +phy_chain_tx_polarity_flip_physical{182.0}=0x0 +phy_chain_tx_polarity_flip_physical{183.0}=0x0 +phy_chain_tx_polarity_flip_physical{184.0}=0x0 +phy_chain_tx_polarity_flip_physical{185.0}=0x1 +phy_chain_tx_polarity_flip_physical{186.0}=0x0 +phy_chain_tx_polarity_flip_physical{187.0}=0x0 +phy_chain_tx_polarity_flip_physical{188.0}=0x1 +phy_chain_tx_polarity_flip_physical{189.0}=0x0 +phy_chain_tx_polarity_flip_physical{190.0}=0x1 +phy_chain_tx_polarity_flip_physical{191.0}=0x1 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 +phy_chain_tx_polarity_flip_physical{193.0}=0x0 +phy_chain_tx_polarity_flip_physical{194.0}=0x1 +phy_chain_tx_polarity_flip_physical{195.0}=0x1 +phy_chain_tx_polarity_flip_physical{196.0}=0x0 +phy_chain_tx_polarity_flip_physical{197.0}=0x0 +phy_chain_tx_polarity_flip_physical{198.0}=0x0 +phy_chain_tx_polarity_flip_physical{199.0}=0x0 +phy_chain_tx_polarity_flip_physical{200.0}=0x0 +phy_chain_tx_polarity_flip_physical{201.0}=0x1 +phy_chain_tx_polarity_flip_physical{202.0}=0x0 +phy_chain_tx_polarity_flip_physical{203.0}=0x0 +phy_chain_tx_polarity_flip_physical{204.0}=0x1 +phy_chain_tx_polarity_flip_physical{205.0}=0x0 +phy_chain_tx_polarity_flip_physical{206.0}=0x1 +phy_chain_tx_polarity_flip_physical{207.0}=0x1 +phy_chain_tx_polarity_flip_physical{208.0}=0x0 +phy_chain_tx_polarity_flip_physical{209.0}=0x0 +phy_chain_tx_polarity_flip_physical{210.0}=0x1 +phy_chain_tx_polarity_flip_physical{211.0}=0x1 +phy_chain_tx_polarity_flip_physical{212.0}=0x0 +phy_chain_tx_polarity_flip_physical{213.0}=0x0 +phy_chain_tx_polarity_flip_physical{214.0}=0x0 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x0 +phy_chain_tx_polarity_flip_physical{217.0}=0x0 +phy_chain_tx_polarity_flip_physical{218.0}=0x1 +phy_chain_tx_polarity_flip_physical{219.0}=0x0 +phy_chain_tx_polarity_flip_physical{220.0}=0x1 +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x1 +phy_chain_tx_polarity_flip_physical{223.0}=0x1 +phy_chain_tx_polarity_flip_physical{224.0}=0x0 +phy_chain_tx_polarity_flip_physical{225.0}=0x0 +phy_chain_tx_polarity_flip_physical{226.0}=0x1 +phy_chain_tx_polarity_flip_physical{227.0}=0x1 +phy_chain_tx_polarity_flip_physical{228.0}=0x0 +phy_chain_tx_polarity_flip_physical{229.0}=0x0 +phy_chain_tx_polarity_flip_physical{230.0}=0x1 +phy_chain_tx_polarity_flip_physical{231.0}=0x1 +phy_chain_tx_polarity_flip_physical{232.0}=0x0 +phy_chain_tx_polarity_flip_physical{233.0}=0x0 +phy_chain_tx_polarity_flip_physical{234.0}=0x1 +phy_chain_tx_polarity_flip_physical{235.0}=0x1 +phy_chain_tx_polarity_flip_physical{236.0}=0x0 +phy_chain_tx_polarity_flip_physical{237.0}=0x1 +phy_chain_tx_polarity_flip_physical{238.0}=0x1 +phy_chain_tx_polarity_flip_physical{239.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x0 +phy_chain_tx_polarity_flip_physical{241.0}=0x0 +phy_chain_tx_polarity_flip_physical{242.0}=0x1 +phy_chain_tx_polarity_flip_physical{243.0}=0x1 +phy_chain_tx_polarity_flip_physical{244.0}=0x0 +phy_chain_tx_polarity_flip_physical{245.0}=0x0 +phy_chain_tx_polarity_flip_physical{246.0}=0x0 +phy_chain_tx_polarity_flip_physical{247.0}=0x1 +phy_chain_tx_polarity_flip_physical{248.0}=0x1 +phy_chain_tx_polarity_flip_physical{249.0}=0x1 +phy_chain_tx_polarity_flip_physical{250.0}=0x1 +phy_chain_tx_polarity_flip_physical{251.0}=0x0 +phy_chain_tx_polarity_flip_physical{252.0}=0x0 +phy_chain_tx_polarity_flip_physical{253.0}=0x0 +phy_chain_tx_polarity_flip_physical{254.0}=0x0 +phy_chain_tx_polarity_flip_physical{255.0}=0x1 +phy_chain_tx_polarity_flip_physical{256.0}=0x1 +phy_chain_tx_polarity_flip_physical{257.0}=0x0 +phy_chain_tx_polarity_flip_physical{258.0}=0x0 +portmap_1.0=1:100:4 +portmap_2.0=5:100:4 +portmap_3.0=9:100:4 +portmap_4.0=13:100:4 +portmap_5.0=17:100:4 +portmap_6.0=21:100:4 +portmap_7.0=25:100:4 +portmap_8.0=29:100:4 +portmap_20.0=33:100:4 +portmap_21.0=37:100:4 +portmap_22.0=41:100:4 +portmap_23.0=45:100:4 +portmap_24.0=49:100:4 +portmap_25.0=53:100:4 +portmap_26.0=57:100:4 +portmap_27.0=61:100:4 +portmap_38.0=257:10 +portmap_40.0=65:100:4 +portmap_41.0=69:100:4 +portmap_42.0=73:100:4 +portmap_43.0=77:100:4 +portmap_44.0=81:100:4 +portmap_45.0=85:100:4 +portmap_46.0=89:100:4 +portmap_47.0=93:100:4 +portmap_60.0=97:100:4 +portmap_61.0=101:100:4 +portmap_62.0=105:100:4 +portmap_63.0=109:100:4 +portmap_64.0=113:100:4 +portmap_65.0=117:100:4 +portmap_66.0=121:100:4 +portmap_67.0=125:100:4 +portmap_80.0=129:100:4 +portmap_81.0=133:100:4 +portmap_82.0=137:100:4 +portmap_83.0=141:100:4 +portmap_84.0=145:100:4 +portmap_85.0=149:100:4 +portmap_86.0=153:100:4 +portmap_87.0=157:100:4 +portmap_100.0=161:100:4 +portmap_101.0=165:100:4 +portmap_102.0=169:100:4 +portmap_103.0=173:100:4 +portmap_104.0=177:100:4 +portmap_105.0=181:100:4 +portmap_106.0=185:100:4 +portmap_107.0=189:100:4 +portmap_118.0=258:10 +portmap_120.0=193:100:4 +portmap_121.0=197:100:4 +portmap_122.0=201:100:4 +portmap_123.0=205:100:4 +portmap_124.0=209:100:4 +portmap_125.0=213:100:4 +portmap_126.0=217:100:4 +portmap_127.0=221:100:4 +portmap_140.0=225:100:4 +portmap_141.0=229:100:4 +portmap_142.0=233:100:4 +portmap_143.0=237:100:4 +portmap_144.0=241:100:4 +portmap_145.0=245:100:4 +portmap_146.0=249:100:4 +portmap_147.0=253:100:4 +port_init_autoneg_1.0=0 +port_init_autoneg_2.0=0 +port_init_autoneg_3.0=0 +port_init_autoneg_4.0=0 +port_init_autoneg_5.0=0 +port_init_autoneg_6.0=0 +port_init_autoneg_7.0=0 +port_init_autoneg_8.0=0 +port_init_autoneg_20.0=0 +port_init_autoneg_21.0=0 +port_init_autoneg_22.0=0 +port_init_autoneg_23.0=0 +port_init_autoneg_24.0=0 +port_init_autoneg_25.0=0 +port_init_autoneg_26.0=0 +port_init_autoneg_27.0=0 +port_init_autoneg_38.0=0 +port_init_autoneg_40.0=0 +port_init_autoneg_41.0=0 +port_init_autoneg_42.0=0 +port_init_autoneg_43.0=0 +port_init_autoneg_44.0=0 +port_init_autoneg_45.0=0 +port_init_autoneg_46.0=0 +port_init_autoneg_47.0=0 +port_init_autoneg_60.0=0 +port_init_autoneg_61.0=0 +port_init_autoneg_62.0=0 +port_init_autoneg_63.0=0 +port_init_autoneg_64.0=0 +port_init_autoneg_65.0=0 +port_init_autoneg_66.0=0 +port_init_autoneg_67.0=0 +port_init_autoneg_80.0=0 +port_init_autoneg_81.0=0 +port_init_autoneg_82.0=0 +port_init_autoneg_83.0=0 +port_init_autoneg_84.0=0 +port_init_autoneg_85.0=0 +port_init_autoneg_86.0=0 +port_init_autoneg_87.0=0 +port_init_autoneg_100.0=0 +port_init_autoneg_101.0=0 +port_init_autoneg_102.0=0 +port_init_autoneg_103.0=0 +port_init_autoneg_104.0=0 +port_init_autoneg_105.0=0 +port_init_autoneg_106.0=0 +port_init_autoneg_107.0=0 +port_init_autoneg_118.0=0 +port_init_autoneg_120.0=0 +port_init_autoneg_121.0=0 +port_init_autoneg_122.0=0 +port_init_autoneg_123.0=0 +port_init_autoneg_124.0=0 +port_init_autoneg_125.0=0 +port_init_autoneg_126.0=0 +port_init_autoneg_127.0=0 +port_init_autoneg_140.0=0 +port_init_autoneg_141.0=0 +port_init_autoneg_142.0=0 +port_init_autoneg_143.0=0 +port_init_autoneg_144.0=0 +port_init_autoneg_145.0=0 +port_init_autoneg_146.0=0 +port_init_autoneg_147.0=0 +port_phy_addr_1.0=0xff +port_phy_addr_2.0=0xff +port_phy_addr_3.0=0xff +port_phy_addr_4.0=0xff +port_phy_addr_5.0=0xff +port_phy_addr_6.0=0xff +port_phy_addr_7.0=0xff +port_phy_addr_8.0=0xff +port_phy_addr_20.0=0xff +port_phy_addr_21.0=0xff +port_phy_addr_22.0=0xff +port_phy_addr_23.0=0xff +port_phy_addr_24.0=0xff +port_phy_addr_25.0=0xff +port_phy_addr_26.0=0xff +port_phy_addr_27.0=0xff +port_phy_addr_38.0=0xff +port_phy_addr_40.0=0xff +port_phy_addr_41.0=0xff +port_phy_addr_42.0=0xff +port_phy_addr_43.0=0xff +port_phy_addr_44.0=0xff +port_phy_addr_45.0=0xff +port_phy_addr_46.0=0xff +port_phy_addr_47.0=0xff +port_phy_addr_60.0=0xff +port_phy_addr_61.0=0xff +port_phy_addr_62.0=0xff +port_phy_addr_63.0=0xff +port_phy_addr_64.0=0xff +port_phy_addr_65.0=0xff +port_phy_addr_66.0=0xff +port_phy_addr_67.0=0xff +port_phy_addr_80.0=0xff +port_phy_addr_81.0=0xff +port_phy_addr_82.0=0xff +port_phy_addr_83.0=0xff +port_phy_addr_84.0=0xff +port_phy_addr_85.0=0xff +port_phy_addr_86.0=0xff +port_phy_addr_87.0=0xff +port_phy_addr_100.0=0xff +port_phy_addr_101.0=0xff +port_phy_addr_102.0=0xff +port_phy_addr_103.0=0xff +port_phy_addr_104.0=0xff +port_phy_addr_105.0=0xff +port_phy_addr_106.0=0xff +port_phy_addr_107.0=0xff +port_phy_addr_118.0=0xff +port_phy_addr_120.0=0xff +port_phy_addr_121.0=0xff +port_phy_addr_122.0=0xff +port_phy_addr_123.0=0xff +port_phy_addr_124.0=0xff +port_phy_addr_125.0=0xff +port_phy_addr_126.0=0xff +port_phy_addr_127.0=0xff +port_phy_addr_140.0=0xff +port_phy_addr_141.0=0xff +port_phy_addr_142.0=0xff +port_phy_addr_143.0=0xff +port_phy_addr_144.0=0xff +port_phy_addr_145.0=0xff +port_phy_addr_146.0=0xff +port_phy_addr_147.0=0xff +robust_hash_disable_egress_vlan.0=1 +robust_hash_disable_mpls.0=1 +robust_hash_disable_vlan.0=1 +sram_scan_enable.0=0 +tdma_timeout_usec.0=15000000 +tslam_timeout_usec.0=15000000 + +# Tuning +serdes_core_rx_polarity_flip_physical{1}=0x69 +serdes_core_rx_polarity_flip_physical{9}=0x69 +serdes_core_rx_polarity_flip_physical{17}=0xe4 +serdes_core_rx_polarity_flip_physical{25}=0x62 +serdes_core_rx_polarity_flip_physical{33}=0x33 +serdes_core_rx_polarity_flip_physical{41}=0x66 +serdes_core_rx_polarity_flip_physical{49}=0x24 +serdes_core_rx_polarity_flip_physical{57}=0x66 +serdes_core_rx_polarity_flip_physical{65}=0x33 +serdes_core_rx_polarity_flip_physical{73}=0x63 +serdes_core_rx_polarity_flip_physical{81}=0x33 +serdes_core_rx_polarity_flip_physical{89}=0x63 +serdes_core_rx_polarity_flip_physical{97}=0x1e +serdes_core_rx_polarity_flip_physical{105}=0x63 +serdes_core_rx_polarity_flip_physical{113}=0xdb +serdes_core_rx_polarity_flip_physical{121}=0x69 +serdes_core_rx_polarity_flip_physical{129}=0x24 +serdes_core_rx_polarity_flip_physical{137}=0x66 +serdes_core_rx_polarity_flip_physical{145}=0x33 +serdes_core_rx_polarity_flip_physical{153}=0x5a +serdes_core_rx_polarity_flip_physical{161}=0xf +serdes_core_rx_polarity_flip_physical{169}=0x66 +serdes_core_rx_polarity_flip_physical{177}=0x30 +serdes_core_rx_polarity_flip_physical{185}=0x66 +serdes_core_rx_polarity_flip_physical{193}=0x30 +serdes_core_rx_polarity_flip_physical{201}=0x66 +serdes_core_rx_polarity_flip_physical{209}=0x33 +serdes_core_rx_polarity_flip_physical{217}=0x66 +serdes_core_rx_polarity_flip_physical{225}=0x24 +serdes_core_rx_polarity_flip_physical{233}=0x96 +serdes_core_rx_polarity_flip_physical{241}=0xe1 +serdes_core_rx_polarity_flip_physical{249}=0xc3 +serdes_core_rx_polarity_flip_physical{257}=0x0 +serdes_core_tx_polarity_flip_physical{1}=0x7b +serdes_core_tx_polarity_flip_physical{9}=0x4d +serdes_core_tx_polarity_flip_physical{17}=0x69 +serdes_core_tx_polarity_flip_physical{25}=0x69 +serdes_core_tx_polarity_flip_physical{33}=0x78 +serdes_core_tx_polarity_flip_physical{41}=0xcc +serdes_core_tx_polarity_flip_physical{49}=0xcf +serdes_core_tx_polarity_flip_physical{57}=0xca +serdes_core_tx_polarity_flip_physical{65}=0xc3 +serdes_core_tx_polarity_flip_physical{73}=0xca +serdes_core_tx_polarity_flip_physical{81}=0xc3 +serdes_core_tx_polarity_flip_physical{89}=0xca +serdes_core_tx_polarity_flip_physical{97}=0x70 +serdes_core_tx_polarity_flip_physical{105}=0x59 +serdes_core_tx_polarity_flip_physical{113}=0x12 +serdes_core_tx_polarity_flip_physical{121}=0x3c +serdes_core_tx_polarity_flip_physical{129}=0x12 +serdes_core_tx_polarity_flip_physical{137}=0x3c +serdes_core_tx_polarity_flip_physical{145}=0x12 +serdes_core_tx_polarity_flip_physical{153}=0x68 +serdes_core_tx_polarity_flip_physical{161}=0x6 +serdes_core_tx_polarity_flip_physical{169}=0x69 +serdes_core_tx_polarity_flip_physical{177}=0x6 +serdes_core_tx_polarity_flip_physical{185}=0x69 +serdes_core_tx_polarity_flip_physical{193}=0x6 +serdes_core_tx_polarity_flip_physical{201}=0x69 +serdes_core_tx_polarity_flip_physical{209}=0x6 +serdes_core_tx_polarity_flip_physical{217}=0x6a +serdes_core_tx_polarity_flip_physical{225}=0x66 +serdes_core_tx_polarity_flip_physical{233}=0x36 +serdes_core_tx_polarity_flip_physical{241}=0xc6 +serdes_core_tx_polarity_flip_physical{249}=0xc3 +serdes_core_tx_polarity_flip_physical{257}=0x0 diff --git a/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-O32/port_config.ini b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-O32/port_config.ini new file mode 100644 index 00000000000..45ef9b7754b --- /dev/null +++ b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-O32/port_config.ini @@ -0,0 +1,35 @@ +# name lanes alias index speed +Ethernet0 1,2,3,4,5,6,7,8 Ethernet1/1 1 400000 +Ethernet8 9,10,11,12,13,14,15,16 Ethernet2/1 2 400000 +Ethernet16 17,18,19,20,21,22,23,24 Ethernet3/1 3 400000 +Ethernet24 25,26,27,28,29,30,31,32 Ethernet4/1 4 400000 +Ethernet32 33,34,35,36,37,38,39,40 Ethernet5/1 5 400000 +Ethernet40 41,42,43,44,45,46,47,48 Ethernet6/1 6 400000 +Ethernet48 49,50,51,52,53,54,55,56 Ethernet7/1 7 400000 +Ethernet56 57,58,59,60,61,62,63,64 Ethernet8/1 8 400000 +Ethernet64 65,66,67,68,69,70,71,72 Ethernet9/1 9 400000 +Ethernet72 73,74,75,76,77,78,79,80 Ethernet10/1 10 400000 +Ethernet80 81,82,83,84,85,86,87,88 Ethernet11/1 11 400000 +Ethernet88 89,90,91,92,93,94,95,96 Ethernet12/1 12 400000 +Ethernet96 97,98,99,100,101,102,103,104 Ethernet13/1 13 400000 +Ethernet104 105,106,107,108,109,110,111,112 Ethernet14/1 14 400000 +Ethernet112 113,114,115,116,117,118,119,120 Ethernet15/1 15 400000 +Ethernet120 121,122,123,124,125,126,127,128 Ethernet16/1 16 400000 +Ethernet128 129,130,131,132,133,134,135,136 Ethernet17/1 17 400000 +Ethernet136 137,138,139,140,141,142,143,144 Ethernet18/1 18 400000 +Ethernet144 145,146,147,148,149,150,151,152 Ethernet19/1 19 400000 +Ethernet152 153,154,155,156,157,158,159,160 Ethernet20/1 20 400000 +Ethernet160 161,162,163,164,165,166,167,168 Ethernet21/1 21 400000 +Ethernet168 169,170,171,172,173,174,175,176 Ethernet22/1 22 400000 +Ethernet176 177,178,179,180,181,182,183,184 Ethernet23/1 23 400000 +Ethernet184 185,186,187,188,189,190,191,192 Ethernet24/1 24 400000 +Ethernet192 193,194,195,196,197,198,199,200 Ethernet25/1 25 400000 +Ethernet200 201,202,203,204,205,206,207,208 Ethernet26/1 26 400000 +Ethernet208 209,210,211,212,213,214,215,216 Ethernet27/1 27 400000 +Ethernet216 217,218,219,220,221,222,223,224 Ethernet28/1 28 400000 +Ethernet224 225,226,227,228,229,230,231,232 Ethernet29/1 29 400000 +Ethernet232 233,234,235,236,237,238,239,240 Ethernet30/1 30 400000 +Ethernet240 241,242,243,244,245,246,247,248 Ethernet31/1 31 400000 +Ethernet248 249,250,251,252,253,254,255,256 Ethernet32/1 32 400000 +Ethernet256 258 Ethernet33 33 10000 +Ethernet260 257 Ethernet34 34 10000 diff --git a/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-O32/sai.profile b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-O32/sai.profile new file mode 100644 index 00000000000..2163c4be905 --- /dev/null +++ b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-O32/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-a7060px4-o32-32x400G.config.bcm diff --git a/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-O32/th3-a7060px4-o32-32x400G.config.bcm b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-O32/th3-a7060px4-o32-32x400G.config.bcm new file mode 100644 index 00000000000..d3a66dee635 --- /dev/null +++ b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-O32/th3-a7060px4-o32-32x400G.config.bcm @@ -0,0 +1,851 @@ +PHY_AN_ALLOW_PLL_CHANGE=1 +arl_clean_timeout_usec=15000000 +asf_mem_profile.0=2 +bcm_num_cos.0=8 +bcm_stat_flags=1 +bcm_stat_jumbo.0=9236 +cdma_timeout_usec.0=15000000 +dma_desc_timeout_usec.0=15000000 +dpr_clock_frequency.0=1000 +higig2_hdr_mode.0=1 +ipv6_lpm_128b_enable.0=0 +l2xmsg_mode.0=1 +l2_mem_entries.0=8192 +l3_alpm_enable.0=2 +l3_mem_entries.0=16384 +max_vp_lags.0=0 +miim_intr_enable.0=0 +module_64ports.0=1 +multicast_l2_range.0=511 +num_ipv6_lpm_128b_entries.0=0 +os=unix +oversubscribe_mode=1 +pbmp_xport_xe.0=0xf0000f4000f0000f0000f0000f4000f0001e +phy_an_c37_38.0=2 +phy_an_c37_118.0=2 +phy_an_c73_1.0=1 +phy_an_c73_2.0=1 +phy_an_c73_3.0=1 +phy_an_c73_4.0=1 +phy_an_c73_20.0=1 +phy_an_c73_21.0=1 +phy_an_c73_22.0=1 +phy_an_c73_23.0=1 +phy_an_c73_38.0=0 +phy_an_c73_40.0=1 +phy_an_c73_41.0=1 +phy_an_c73_42.0=1 +phy_an_c73_43.0=1 +phy_an_c73_60.0=1 +phy_an_c73_61.0=1 +phy_an_c73_62.0=1 +phy_an_c73_63.0=1 +phy_an_c73_80.0=1 +phy_an_c73_81.0=1 +phy_an_c73_82.0=1 +phy_an_c73_83.0=1 +phy_an_c73_100.0=1 +phy_an_c73_101.0=1 +phy_an_c73_102.0=1 +phy_an_c73_103.0=1 +phy_an_c73_118.0=0 +phy_an_c73_120.0=1 +phy_an_c73_121.0=1 +phy_an_c73_122.0=1 +phy_an_c73_123.0=1 +phy_an_c73_140.0=1 +phy_an_c73_141.0=1 +phy_an_c73_142.0=1 +phy_an_c73_143.0=1 +phy_chain_rx_lane_map_physical{1.0}=0x72634150 +phy_chain_rx_lane_map_physical{9.0}=0x63725041 +phy_chain_rx_lane_map_physical{17.0}=0x23071465 +phy_chain_rx_lane_map_physical{25.0}=0x03125746 +phy_chain_rx_lane_map_physical{33.0}=0x12063574 +phy_chain_rx_lane_map_physical{41.0}=0x03125647 +phy_chain_rx_lane_map_physical{49.0}=0x12053467 +phy_chain_rx_lane_map_physical{57.0}=0x03125647 +phy_chain_rx_lane_map_physical{65.0}=0x12043576 +phy_chain_rx_lane_map_physical{73.0}=0x03125746 +phy_chain_rx_lane_map_physical{81.0}=0x12043576 +phy_chain_rx_lane_map_physical{89.0}=0x03125746 +phy_chain_rx_lane_map_physical{97.0}=0x40165327 +phy_chain_rx_lane_map_physical{105.0}=0x56470213 +phy_chain_rx_lane_map_physical{113.0}=0x21340576 +phy_chain_rx_lane_map_physical{121.0}=0x47562130 +phy_chain_rx_lane_map_physical{129.0}=0x56437201 +phy_chain_rx_lane_map_physical{137.0}=0x03125647 +phy_chain_rx_lane_map_physical{145.0}=0x12043576 +phy_chain_rx_lane_map_physical{153.0}=0x54106723 +phy_chain_rx_lane_map_physical{161.0}=0x63257014 +phy_chain_rx_lane_map_physical{169.0}=0x03125647 +phy_chain_rx_lane_map_physical{177.0}=0x12043567 +phy_chain_rx_lane_map_physical{185.0}=0x03125647 +phy_chain_rx_lane_map_physical{193.0}=0x12043567 +phy_chain_rx_lane_map_physical{201.0}=0x03125647 +phy_chain_rx_lane_map_physical{209.0}=0x12043576 +phy_chain_rx_lane_map_physical{217.0}=0x03125467 +phy_chain_rx_lane_map_physical{225.0}=0x12073465 +phy_chain_rx_lane_map_physical{233.0}=0x30215647 +phy_chain_rx_lane_map_physical{241.0}=0x23071564 +phy_chain_rx_lane_map_physical{249.0}=0x72634150 +phy_chain_rx_lane_map_physical{257.0}=0x3210 +phy_chain_rx_polarity_flip_physical{1.0}=0x1 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x1 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x1 +phy_chain_rx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x1 +phy_chain_rx_polarity_flip_physical{82.0}=0x1 +phy_chain_rx_polarity_flip_physical{83.0}=0x0 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{89.0}=0x1 +phy_chain_rx_polarity_flip_physical{90.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x0 +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{97.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 +phy_chain_rx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x1 +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{120.0}=0x1 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{133.0}=0x0 +phy_chain_rx_polarity_flip_physical{134.0}=0x1 +phy_chain_rx_polarity_flip_physical{135.0}=0x0 +phy_chain_rx_polarity_flip_physical{136.0}=0x0 +phy_chain_rx_polarity_flip_physical{137.0}=0x0 +phy_chain_rx_polarity_flip_physical{138.0}=0x1 +phy_chain_rx_polarity_flip_physical{139.0}=0x1 +phy_chain_rx_polarity_flip_physical{140.0}=0x0 +phy_chain_rx_polarity_flip_physical{141.0}=0x0 +phy_chain_rx_polarity_flip_physical{142.0}=0x1 +phy_chain_rx_polarity_flip_physical{143.0}=0x1 +phy_chain_rx_polarity_flip_physical{144.0}=0x0 +phy_chain_rx_polarity_flip_physical{145.0}=0x1 +phy_chain_rx_polarity_flip_physical{146.0}=0x1 +phy_chain_rx_polarity_flip_physical{147.0}=0x0 +phy_chain_rx_polarity_flip_physical{148.0}=0x0 +phy_chain_rx_polarity_flip_physical{149.0}=0x1 +phy_chain_rx_polarity_flip_physical{150.0}=0x1 +phy_chain_rx_polarity_flip_physical{151.0}=0x0 +phy_chain_rx_polarity_flip_physical{152.0}=0x0 +phy_chain_rx_polarity_flip_physical{153.0}=0x0 +phy_chain_rx_polarity_flip_physical{154.0}=0x1 +phy_chain_rx_polarity_flip_physical{155.0}=0x0 +phy_chain_rx_polarity_flip_physical{156.0}=0x1 +phy_chain_rx_polarity_flip_physical{157.0}=0x1 +phy_chain_rx_polarity_flip_physical{158.0}=0x0 +phy_chain_rx_polarity_flip_physical{159.0}=0x1 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 +phy_chain_rx_polarity_flip_physical{161.0}=0x1 +phy_chain_rx_polarity_flip_physical{162.0}=0x1 +phy_chain_rx_polarity_flip_physical{163.0}=0x1 +phy_chain_rx_polarity_flip_physical{164.0}=0x1 +phy_chain_rx_polarity_flip_physical{165.0}=0x0 +phy_chain_rx_polarity_flip_physical{166.0}=0x0 +phy_chain_rx_polarity_flip_physical{167.0}=0x0 +phy_chain_rx_polarity_flip_physical{168.0}=0x0 +phy_chain_rx_polarity_flip_physical{169.0}=0x0 +phy_chain_rx_polarity_flip_physical{170.0}=0x1 +phy_chain_rx_polarity_flip_physical{171.0}=0x1 +phy_chain_rx_polarity_flip_physical{172.0}=0x0 +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x1 +phy_chain_rx_polarity_flip_physical{175.0}=0x1 +phy_chain_rx_polarity_flip_physical{176.0}=0x0 +phy_chain_rx_polarity_flip_physical{177.0}=0x0 +phy_chain_rx_polarity_flip_physical{178.0}=0x0 +phy_chain_rx_polarity_flip_physical{179.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x0 +phy_chain_rx_polarity_flip_physical{181.0}=0x1 +phy_chain_rx_polarity_flip_physical{182.0}=0x1 +phy_chain_rx_polarity_flip_physical{183.0}=0x0 +phy_chain_rx_polarity_flip_physical{184.0}=0x0 +phy_chain_rx_polarity_flip_physical{185.0}=0x0 +phy_chain_rx_polarity_flip_physical{186.0}=0x1 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x0 +phy_chain_rx_polarity_flip_physical{189.0}=0x0 +phy_chain_rx_polarity_flip_physical{190.0}=0x1 +phy_chain_rx_polarity_flip_physical{191.0}=0x1 +phy_chain_rx_polarity_flip_physical{192.0}=0x0 +phy_chain_rx_polarity_flip_physical{193.0}=0x0 +phy_chain_rx_polarity_flip_physical{194.0}=0x0 +phy_chain_rx_polarity_flip_physical{195.0}=0x0 +phy_chain_rx_polarity_flip_physical{196.0}=0x0 +phy_chain_rx_polarity_flip_physical{197.0}=0x1 +phy_chain_rx_polarity_flip_physical{198.0}=0x1 +phy_chain_rx_polarity_flip_physical{199.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x0 +phy_chain_rx_polarity_flip_physical{201.0}=0x0 +phy_chain_rx_polarity_flip_physical{202.0}=0x1 +phy_chain_rx_polarity_flip_physical{203.0}=0x1 +phy_chain_rx_polarity_flip_physical{204.0}=0x0 +phy_chain_rx_polarity_flip_physical{205.0}=0x0 +phy_chain_rx_polarity_flip_physical{206.0}=0x1 +phy_chain_rx_polarity_flip_physical{207.0}=0x1 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 +phy_chain_rx_polarity_flip_physical{209.0}=0x1 +phy_chain_rx_polarity_flip_physical{210.0}=0x1 +phy_chain_rx_polarity_flip_physical{211.0}=0x0 +phy_chain_rx_polarity_flip_physical{212.0}=0x0 +phy_chain_rx_polarity_flip_physical{213.0}=0x1 +phy_chain_rx_polarity_flip_physical{214.0}=0x1 +phy_chain_rx_polarity_flip_physical{215.0}=0x0 +phy_chain_rx_polarity_flip_physical{216.0}=0x0 +phy_chain_rx_polarity_flip_physical{217.0}=0x0 +phy_chain_rx_polarity_flip_physical{218.0}=0x1 +phy_chain_rx_polarity_flip_physical{219.0}=0x1 +phy_chain_rx_polarity_flip_physical{220.0}=0x0 +phy_chain_rx_polarity_flip_physical{221.0}=0x0 +phy_chain_rx_polarity_flip_physical{222.0}=0x1 +phy_chain_rx_polarity_flip_physical{223.0}=0x1 +phy_chain_rx_polarity_flip_physical{224.0}=0x0 +phy_chain_rx_polarity_flip_physical{225.0}=0x0 +phy_chain_rx_polarity_flip_physical{226.0}=0x0 +phy_chain_rx_polarity_flip_physical{227.0}=0x1 +phy_chain_rx_polarity_flip_physical{228.0}=0x0 +phy_chain_rx_polarity_flip_physical{229.0}=0x0 +phy_chain_rx_polarity_flip_physical{230.0}=0x1 +phy_chain_rx_polarity_flip_physical{231.0}=0x0 +phy_chain_rx_polarity_flip_physical{232.0}=0x0 +phy_chain_rx_polarity_flip_physical{233.0}=0x0 +phy_chain_rx_polarity_flip_physical{234.0}=0x1 +phy_chain_rx_polarity_flip_physical{235.0}=0x1 +phy_chain_rx_polarity_flip_physical{236.0}=0x0 +phy_chain_rx_polarity_flip_physical{237.0}=0x1 +phy_chain_rx_polarity_flip_physical{238.0}=0x0 +phy_chain_rx_polarity_flip_physical{239.0}=0x0 +phy_chain_rx_polarity_flip_physical{240.0}=0x1 +phy_chain_rx_polarity_flip_physical{241.0}=0x1 +phy_chain_rx_polarity_flip_physical{242.0}=0x0 +phy_chain_rx_polarity_flip_physical{243.0}=0x0 +phy_chain_rx_polarity_flip_physical{244.0}=0x0 +phy_chain_rx_polarity_flip_physical{245.0}=0x0 +phy_chain_rx_polarity_flip_physical{246.0}=0x1 +phy_chain_rx_polarity_flip_physical{247.0}=0x1 +phy_chain_rx_polarity_flip_physical{248.0}=0x1 +phy_chain_rx_polarity_flip_physical{249.0}=0x1 +phy_chain_rx_polarity_flip_physical{250.0}=0x1 +phy_chain_rx_polarity_flip_physical{251.0}=0x0 +phy_chain_rx_polarity_flip_physical{252.0}=0x0 +phy_chain_rx_polarity_flip_physical{253.0}=0x0 +phy_chain_rx_polarity_flip_physical{254.0}=0x0 +phy_chain_rx_polarity_flip_physical{255.0}=0x1 +phy_chain_rx_polarity_flip_physical{256.0}=0x1 +phy_chain_rx_polarity_flip_physical{257.0}=0x0 +phy_chain_rx_polarity_flip_physical{258.0}=0x0 +phy_chain_tx_lane_map_physical{1.0}=0x13245076 +phy_chain_tx_lane_map_physical{9.0}=0x76501423 +phy_chain_tx_lane_map_physical{17.0}=0x75643120 +phy_chain_tx_lane_map_physical{25.0}=0x74653201 +phy_chain_tx_lane_map_physical{33.0}=0x75603124 +phy_chain_tx_lane_map_physical{41.0}=0x64753120 +phy_chain_tx_lane_map_physical{49.0}=0x65741032 +phy_chain_tx_lane_map_physical{57.0}=0x64753210 +phy_chain_tx_lane_map_physical{65.0}=0x65740132 +phy_chain_tx_lane_map_physical{73.0}=0x64753210 +phy_chain_tx_lane_map_physical{81.0}=0x65740132 +phy_chain_tx_lane_map_physical{89.0}=0x64753210 +phy_chain_tx_lane_map_physical{97.0}=0x63057124 +phy_chain_tx_lane_map_physical{105.0}=0x67453021 +phy_chain_tx_lane_map_physical{113.0}=0x76502413 +phy_chain_tx_lane_map_physical{121.0}=0x13257064 +phy_chain_tx_lane_map_physical{129.0}=0x32146057 +phy_chain_tx_lane_map_physical{137.0}=0x57613420 +phy_chain_tx_lane_map_physical{145.0}=0x76502413 +phy_chain_tx_lane_map_physical{153.0}=0x64173520 +phy_chain_tx_lane_map_physical{161.0}=0x56742031 +phy_chain_tx_lane_map_physical{169.0}=0x74601523 +phy_chain_tx_lane_map_physical{177.0}=0x56742031 +phy_chain_tx_lane_map_physical{185.0}=0x74601523 +phy_chain_tx_lane_map_physical{193.0}=0x56742031 +phy_chain_tx_lane_map_physical{201.0}=0x74601523 +phy_chain_tx_lane_map_physical{209.0}=0x56742031 +phy_chain_tx_lane_map_physical{217.0}=0x74603512 +phy_chain_tx_lane_map_physical{225.0}=0x75642031 +phy_chain_tx_lane_map_physical{233.0}=0x57612430 +phy_chain_tx_lane_map_physical{241.0}=0x65742031 +phy_chain_tx_lane_map_physical{249.0}=0x52316470 +phy_chain_tx_lane_map_physical{257.0}=0x3210 +phy_chain_tx_polarity_flip_physical{1.0}=0x1 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{9.0}=0x1 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{17.0}=0x1 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x1 +phy_chain_tx_polarity_flip_physical{83.0}=0x0 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x0 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 +phy_chain_tx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x1 +phy_chain_tx_polarity_flip_physical{91.0}=0x0 +phy_chain_tx_polarity_flip_physical{92.0}=0x1 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_tx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 +phy_chain_tx_polarity_flip_physical{97.0}=0x0 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_tx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{109.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 +phy_chain_tx_polarity_flip_physical{113.0}=0x0 +phy_chain_tx_polarity_flip_physical{114.0}=0x1 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x0 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x0 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x1 +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x1 +phy_chain_tx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_tx_polarity_flip_physical{133.0}=0x1 +phy_chain_tx_polarity_flip_physical{134.0}=0x0 +phy_chain_tx_polarity_flip_physical{135.0}=0x0 +phy_chain_tx_polarity_flip_physical{136.0}=0x0 +phy_chain_tx_polarity_flip_physical{137.0}=0x0 +phy_chain_tx_polarity_flip_physical{138.0}=0x0 +phy_chain_tx_polarity_flip_physical{139.0}=0x1 +phy_chain_tx_polarity_flip_physical{140.0}=0x1 +phy_chain_tx_polarity_flip_physical{141.0}=0x1 +phy_chain_tx_polarity_flip_physical{142.0}=0x1 +phy_chain_tx_polarity_flip_physical{143.0}=0x0 +phy_chain_tx_polarity_flip_physical{144.0}=0x0 +phy_chain_tx_polarity_flip_physical{145.0}=0x0 +phy_chain_tx_polarity_flip_physical{146.0}=0x1 +phy_chain_tx_polarity_flip_physical{147.0}=0x0 +phy_chain_tx_polarity_flip_physical{148.0}=0x0 +phy_chain_tx_polarity_flip_physical{149.0}=0x1 +phy_chain_tx_polarity_flip_physical{150.0}=0x0 +phy_chain_tx_polarity_flip_physical{151.0}=0x0 +phy_chain_tx_polarity_flip_physical{152.0}=0x0 +phy_chain_tx_polarity_flip_physical{153.0}=0x0 +phy_chain_tx_polarity_flip_physical{154.0}=0x0 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x1 +phy_chain_tx_polarity_flip_physical{157.0}=0x0 +phy_chain_tx_polarity_flip_physical{158.0}=0x1 +phy_chain_tx_polarity_flip_physical{159.0}=0x1 +phy_chain_tx_polarity_flip_physical{160.0}=0x0 +phy_chain_tx_polarity_flip_physical{161.0}=0x0 +phy_chain_tx_polarity_flip_physical{162.0}=0x1 +phy_chain_tx_polarity_flip_physical{163.0}=0x1 +phy_chain_tx_polarity_flip_physical{164.0}=0x0 +phy_chain_tx_polarity_flip_physical{165.0}=0x0 +phy_chain_tx_polarity_flip_physical{166.0}=0x0 +phy_chain_tx_polarity_flip_physical{167.0}=0x0 +phy_chain_tx_polarity_flip_physical{168.0}=0x0 +phy_chain_tx_polarity_flip_physical{169.0}=0x1 +phy_chain_tx_polarity_flip_physical{170.0}=0x0 +phy_chain_tx_polarity_flip_physical{171.0}=0x0 +phy_chain_tx_polarity_flip_physical{172.0}=0x1 +phy_chain_tx_polarity_flip_physical{173.0}=0x0 +phy_chain_tx_polarity_flip_physical{174.0}=0x1 +phy_chain_tx_polarity_flip_physical{175.0}=0x1 +phy_chain_tx_polarity_flip_physical{176.0}=0x0 +phy_chain_tx_polarity_flip_physical{177.0}=0x0 +phy_chain_tx_polarity_flip_physical{178.0}=0x1 +phy_chain_tx_polarity_flip_physical{179.0}=0x1 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 +phy_chain_tx_polarity_flip_physical{181.0}=0x0 +phy_chain_tx_polarity_flip_physical{182.0}=0x0 +phy_chain_tx_polarity_flip_physical{183.0}=0x0 +phy_chain_tx_polarity_flip_physical{184.0}=0x0 +phy_chain_tx_polarity_flip_physical{185.0}=0x1 +phy_chain_tx_polarity_flip_physical{186.0}=0x0 +phy_chain_tx_polarity_flip_physical{187.0}=0x0 +phy_chain_tx_polarity_flip_physical{188.0}=0x1 +phy_chain_tx_polarity_flip_physical{189.0}=0x0 +phy_chain_tx_polarity_flip_physical{190.0}=0x1 +phy_chain_tx_polarity_flip_physical{191.0}=0x1 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 +phy_chain_tx_polarity_flip_physical{193.0}=0x0 +phy_chain_tx_polarity_flip_physical{194.0}=0x1 +phy_chain_tx_polarity_flip_physical{195.0}=0x1 +phy_chain_tx_polarity_flip_physical{196.0}=0x0 +phy_chain_tx_polarity_flip_physical{197.0}=0x0 +phy_chain_tx_polarity_flip_physical{198.0}=0x0 +phy_chain_tx_polarity_flip_physical{199.0}=0x0 +phy_chain_tx_polarity_flip_physical{200.0}=0x0 +phy_chain_tx_polarity_flip_physical{201.0}=0x1 +phy_chain_tx_polarity_flip_physical{202.0}=0x0 +phy_chain_tx_polarity_flip_physical{203.0}=0x0 +phy_chain_tx_polarity_flip_physical{204.0}=0x1 +phy_chain_tx_polarity_flip_physical{205.0}=0x0 +phy_chain_tx_polarity_flip_physical{206.0}=0x1 +phy_chain_tx_polarity_flip_physical{207.0}=0x1 +phy_chain_tx_polarity_flip_physical{208.0}=0x0 +phy_chain_tx_polarity_flip_physical{209.0}=0x0 +phy_chain_tx_polarity_flip_physical{210.0}=0x1 +phy_chain_tx_polarity_flip_physical{211.0}=0x1 +phy_chain_tx_polarity_flip_physical{212.0}=0x0 +phy_chain_tx_polarity_flip_physical{213.0}=0x0 +phy_chain_tx_polarity_flip_physical{214.0}=0x0 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x0 +phy_chain_tx_polarity_flip_physical{217.0}=0x0 +phy_chain_tx_polarity_flip_physical{218.0}=0x1 +phy_chain_tx_polarity_flip_physical{219.0}=0x0 +phy_chain_tx_polarity_flip_physical{220.0}=0x1 +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x1 +phy_chain_tx_polarity_flip_physical{223.0}=0x1 +phy_chain_tx_polarity_flip_physical{224.0}=0x0 +phy_chain_tx_polarity_flip_physical{225.0}=0x0 +phy_chain_tx_polarity_flip_physical{226.0}=0x1 +phy_chain_tx_polarity_flip_physical{227.0}=0x1 +phy_chain_tx_polarity_flip_physical{228.0}=0x0 +phy_chain_tx_polarity_flip_physical{229.0}=0x0 +phy_chain_tx_polarity_flip_physical{230.0}=0x1 +phy_chain_tx_polarity_flip_physical{231.0}=0x1 +phy_chain_tx_polarity_flip_physical{232.0}=0x0 +phy_chain_tx_polarity_flip_physical{233.0}=0x0 +phy_chain_tx_polarity_flip_physical{234.0}=0x1 +phy_chain_tx_polarity_flip_physical{235.0}=0x1 +phy_chain_tx_polarity_flip_physical{236.0}=0x0 +phy_chain_tx_polarity_flip_physical{237.0}=0x1 +phy_chain_tx_polarity_flip_physical{238.0}=0x1 +phy_chain_tx_polarity_flip_physical{239.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x0 +phy_chain_tx_polarity_flip_physical{241.0}=0x0 +phy_chain_tx_polarity_flip_physical{242.0}=0x1 +phy_chain_tx_polarity_flip_physical{243.0}=0x1 +phy_chain_tx_polarity_flip_physical{244.0}=0x0 +phy_chain_tx_polarity_flip_physical{245.0}=0x0 +phy_chain_tx_polarity_flip_physical{246.0}=0x0 +phy_chain_tx_polarity_flip_physical{247.0}=0x1 +phy_chain_tx_polarity_flip_physical{248.0}=0x1 +phy_chain_tx_polarity_flip_physical{249.0}=0x1 +phy_chain_tx_polarity_flip_physical{250.0}=0x1 +phy_chain_tx_polarity_flip_physical{251.0}=0x0 +phy_chain_tx_polarity_flip_physical{252.0}=0x0 +phy_chain_tx_polarity_flip_physical{253.0}=0x0 +phy_chain_tx_polarity_flip_physical{254.0}=0x0 +phy_chain_tx_polarity_flip_physical{255.0}=0x1 +phy_chain_tx_polarity_flip_physical{256.0}=0x1 +phy_chain_tx_polarity_flip_physical{257.0}=0x0 +phy_chain_tx_polarity_flip_physical{258.0}=0x0 +portmap_1.0=1:400 +portmap_2.0=9:400 +portmap_3.0=17:400 +portmap_4.0=25:400 +portmap_20.0=33:400 +portmap_21.0=41:400 +portmap_22.0=49:400 +portmap_23.0=57:400 +portmap_38.0=257:10 +portmap_40.0=65:400 +portmap_41.0=73:400 +portmap_42.0=81:400 +portmap_43.0=89:400 +portmap_60.0=97:400 +portmap_61.0=105:400 +portmap_62.0=113:400 +portmap_63.0=121:400 +portmap_80.0=129:400 +portmap_81.0=137:400 +portmap_82.0=145:400 +portmap_83.0=153:400 +portmap_100.0=161:400 +portmap_101.0=169:400 +portmap_102.0=177:400 +portmap_103.0=185:400 +portmap_118.0=258:10 +portmap_120.0=193:400 +portmap_121.0=201:400 +portmap_122.0=209:400 +portmap_123.0=217:400 +portmap_140.0=225:400 +portmap_141.0=233:400 +portmap_142.0=241:400 +portmap_143.0=249:400 +port_init_autoneg_1.0=0 +port_init_autoneg_2.0=0 +port_init_autoneg_3.0=0 +port_init_autoneg_4.0=0 +port_init_autoneg_20.0=0 +port_init_autoneg_21.0=0 +port_init_autoneg_22.0=0 +port_init_autoneg_23.0=0 +port_init_autoneg_38.0=0 +port_init_autoneg_40.0=0 +port_init_autoneg_41.0=0 +port_init_autoneg_42.0=0 +port_init_autoneg_43.0=0 +port_init_autoneg_60.0=0 +port_init_autoneg_61.0=0 +port_init_autoneg_62.0=0 +port_init_autoneg_63.0=0 +port_init_autoneg_80.0=0 +port_init_autoneg_81.0=0 +port_init_autoneg_82.0=0 +port_init_autoneg_83.0=0 +port_init_autoneg_100.0=0 +port_init_autoneg_101.0=0 +port_init_autoneg_102.0=0 +port_init_autoneg_103.0=0 +port_init_autoneg_118.0=0 +port_init_autoneg_120.0=0 +port_init_autoneg_121.0=0 +port_init_autoneg_122.0=0 +port_init_autoneg_123.0=0 +port_init_autoneg_140.0=0 +port_init_autoneg_141.0=0 +port_init_autoneg_142.0=0 +port_init_autoneg_143.0=0 +port_phy_addr_1.0=0xff +port_phy_addr_2.0=0xff +port_phy_addr_3.0=0xff +port_phy_addr_4.0=0xff +port_phy_addr_20.0=0xff +port_phy_addr_21.0=0xff +port_phy_addr_22.0=0xff +port_phy_addr_23.0=0xff +port_phy_addr_38.0=0xff +port_phy_addr_40.0=0xff +port_phy_addr_41.0=0xff +port_phy_addr_42.0=0xff +port_phy_addr_43.0=0xff +port_phy_addr_60.0=0xff +port_phy_addr_61.0=0xff +port_phy_addr_62.0=0xff +port_phy_addr_63.0=0xff +port_phy_addr_80.0=0xff +port_phy_addr_81.0=0xff +port_phy_addr_82.0=0xff +port_phy_addr_83.0=0xff +port_phy_addr_100.0=0xff +port_phy_addr_101.0=0xff +port_phy_addr_102.0=0xff +port_phy_addr_103.0=0xff +port_phy_addr_118.0=0xff +port_phy_addr_120.0=0xff +port_phy_addr_121.0=0xff +port_phy_addr_122.0=0xff +port_phy_addr_123.0=0xff +port_phy_addr_140.0=0xff +port_phy_addr_141.0=0xff +port_phy_addr_142.0=0xff +port_phy_addr_143.0=0xff +robust_hash_disable_egress_vlan.0=1 +robust_hash_disable_mpls.0=1 +robust_hash_disable_vlan.0=1 +sram_scan_enable.0=0 +tdma_timeout_usec.0=15000000 +tslam_timeout_usec.0=15000000 + +# Tuning +serdes_core_rx_polarity_flip_physical{1}=0x69 +serdes_core_rx_polarity_flip_physical{9}=0x69 +serdes_core_rx_polarity_flip_physical{17}=0xe4 +serdes_core_rx_polarity_flip_physical{25}=0x62 +serdes_core_rx_polarity_flip_physical{33}=0x33 +serdes_core_rx_polarity_flip_physical{41}=0x66 +serdes_core_rx_polarity_flip_physical{49}=0x24 +serdes_core_rx_polarity_flip_physical{57}=0x66 +serdes_core_rx_polarity_flip_physical{65}=0x33 +serdes_core_rx_polarity_flip_physical{73}=0x63 +serdes_core_rx_polarity_flip_physical{81}=0x33 +serdes_core_rx_polarity_flip_physical{89}=0x63 +serdes_core_rx_polarity_flip_physical{97}=0x1e +serdes_core_rx_polarity_flip_physical{105}=0x63 +serdes_core_rx_polarity_flip_physical{113}=0xdb +serdes_core_rx_polarity_flip_physical{121}=0x69 +serdes_core_rx_polarity_flip_physical{129}=0x24 +serdes_core_rx_polarity_flip_physical{137}=0x66 +serdes_core_rx_polarity_flip_physical{145}=0x33 +serdes_core_rx_polarity_flip_physical{153}=0x5a +serdes_core_rx_polarity_flip_physical{161}=0xf +serdes_core_rx_polarity_flip_physical{169}=0x66 +serdes_core_rx_polarity_flip_physical{177}=0x30 +serdes_core_rx_polarity_flip_physical{185}=0x66 +serdes_core_rx_polarity_flip_physical{193}=0x30 +serdes_core_rx_polarity_flip_physical{201}=0x66 +serdes_core_rx_polarity_flip_physical{209}=0x33 +serdes_core_rx_polarity_flip_physical{217}=0x66 +serdes_core_rx_polarity_flip_physical{225}=0x24 +serdes_core_rx_polarity_flip_physical{233}=0x96 +serdes_core_rx_polarity_flip_physical{241}=0xe1 +serdes_core_rx_polarity_flip_physical{249}=0xc3 +serdes_core_rx_polarity_flip_physical{257}=0x0 +serdes_core_tx_polarity_flip_physical{1}=0x7b +serdes_core_tx_polarity_flip_physical{9}=0x4d +serdes_core_tx_polarity_flip_physical{17}=0x69 +serdes_core_tx_polarity_flip_physical{25}=0x69 +serdes_core_tx_polarity_flip_physical{33}=0x78 +serdes_core_tx_polarity_flip_physical{41}=0xcc +serdes_core_tx_polarity_flip_physical{49}=0xcf +serdes_core_tx_polarity_flip_physical{57}=0xca +serdes_core_tx_polarity_flip_physical{65}=0xc3 +serdes_core_tx_polarity_flip_physical{73}=0xca +serdes_core_tx_polarity_flip_physical{81}=0xc3 +serdes_core_tx_polarity_flip_physical{89}=0xca +serdes_core_tx_polarity_flip_physical{97}=0x70 +serdes_core_tx_polarity_flip_physical{105}=0x59 +serdes_core_tx_polarity_flip_physical{113}=0x12 +serdes_core_tx_polarity_flip_physical{121}=0x3c +serdes_core_tx_polarity_flip_physical{129}=0x12 +serdes_core_tx_polarity_flip_physical{137}=0x3c +serdes_core_tx_polarity_flip_physical{145}=0x12 +serdes_core_tx_polarity_flip_physical{153}=0x68 +serdes_core_tx_polarity_flip_physical{161}=0x6 +serdes_core_tx_polarity_flip_physical{169}=0x69 +serdes_core_tx_polarity_flip_physical{177}=0x6 +serdes_core_tx_polarity_flip_physical{185}=0x69 +serdes_core_tx_polarity_flip_physical{193}=0x6 +serdes_core_tx_polarity_flip_physical{201}=0x69 +serdes_core_tx_polarity_flip_physical{209}=0x6 +serdes_core_tx_polarity_flip_physical{217}=0x6a +serdes_core_tx_polarity_flip_physical{225}=0x66 +serdes_core_tx_polarity_flip_physical{233}=0x36 +serdes_core_tx_polarity_flip_physical{241}=0xc6 +serdes_core_tx_polarity_flip_physical{249}=0xc3 +serdes_core_tx_polarity_flip_physical{257}=0x0 +serdes_tx_taps_cd0=pam4:-28:124:-12:4:0:0 +serdes_tx_taps_cd1=pam4:-28:124:-12:4:0:0 +serdes_tx_taps_cd2=pam4:-28:124:-12:4:0:0 +serdes_tx_taps_cd3=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd4=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd5=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd6=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd7=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd8=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd9=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd10=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd11=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd12=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd13=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd14=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd15=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd16=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd17=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd18=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd19=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd20=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd21=pam4:-28:124:0:4:0:0 +serdes_tx_taps_cd22=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd23=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd24=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd25=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd26=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd27=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd28=pam4:-28:120:-4:4:0:0 +serdes_tx_taps_cd29=pam4:-28:124:-12:4:0:0 +serdes_tx_taps_cd30=pam4:-28:124:-12:4:0:0 +serdes_tx_taps_cd31=pam4:-28:124:-12:4:0:0 +serdes_tx_taps_cd32=pam4:1:34:9:0:0:0 +serdes_tx_taps_cd33=pam4:1:34:9:0:0:0 diff --git a/device/arista/x86_64-arista_7060px4_32/default_sku b/device/arista/x86_64-arista_7060px4_32/default_sku new file mode 100644 index 00000000000..810b6667a18 --- /dev/null +++ b/device/arista/x86_64-arista_7060px4_32/default_sku @@ -0,0 +1 @@ +Arista-7060PX4-O32 t1 diff --git a/device/arista/x86_64-arista_7060px4_32/fancontrol b/device/arista/x86_64-arista_7060px4_32/fancontrol new file mode 100644 index 00000000000..e0834b0728f --- /dev/null +++ b/device/arista/x86_64-arista_7060px4_32/fancontrol @@ -0,0 +1,10 @@ +INTERVAL=5 +DEVPATH=hwmon3=devices/pci0000:ff/0000:ff:0b.3/i2c-73/73-004c hwmon4=devices/pci0000:ff/0000:ff:0b.3/i2c-85/85-0060 +DEVNAME=hwmon3=max6658 hwmon4=tehama_cpld +FCTEMPS=hwmon4/pwm5=hwmon3/temp1_input hwmon4/pwm4=hwmon3/temp1_input hwmon4/pwm3=hwmon3/temp1_input hwmon4/pwm2=hwmon3/temp1_input hwmon4/pwm1=hwmon3/temp1_input +FCFANS=hwmon4/pwm5=hwmon4/fan5_input hwmon4/pwm4=hwmon4/fan4_input hwmon4/pwm3=hwmon4/fan3_input hwmon4/pwm2=hwmon4/fan2_input hwmon4/pwm1=hwmon4/fan1_input +MINTEMP=hwmon4/pwm5=50 hwmon4/pwm4=50 hwmon4/pwm3=50 hwmon4/pwm2=50 hwmon4/pwm1=50 +MINPWM=hwmon4/pwm5=128 hwmon4/pwm4=128 hwmon4/pwm3=128 hwmon4/pwm2=128 hwmon4/pwm1=128 +MAXTEMP=hwmon4/pwm5=60 hwmon4/pwm4=60 hwmon4/pwm3=60 hwmon4/pwm2=60 hwmon4/pwm1=60 +MINSTART=hwmon4/pwm5=128 hwmon4/pwm4=128 hwmon4/pwm3=128 hwmon4/pwm2=128 hwmon4/pwm1=128 +MINSTOP=hwmon4/pwm5=128 hwmon4/pwm4=128 hwmon4/pwm3=128 hwmon4/pwm2=128 hwmon4/pwm1=128 diff --git a/device/arista/x86_64-arista_7060px4_32/platform_reboot b/device/arista/x86_64-arista_7060px4_32/platform_reboot new file mode 120000 index 00000000000..7f94a49e38b --- /dev/null +++ b/device/arista/x86_64-arista_7060px4_32/platform_reboot @@ -0,0 +1 @@ +../x86_64-arista_common/platform_reboot \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060px4_32/plugins b/device/arista/x86_64-arista_7060px4_32/plugins new file mode 120000 index 00000000000..5fbbf98a628 --- /dev/null +++ b/device/arista/x86_64-arista_7060px4_32/plugins @@ -0,0 +1 @@ +../x86_64-arista_common/plugins/ \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060px4_32/sensors.conf b/device/arista/x86_64-arista_7060px4_32/sensors.conf new file mode 100644 index 00000000000..2168c765fb7 --- /dev/null +++ b/device/arista/x86_64-arista_7060px4_32/sensors.conf @@ -0,0 +1,34 @@ +# libsensors configuration file for DCS-7060X3-32 +# ------------------------------------------------# + +bus "i2c-9" "SCD 0000:07:00.0 SMBus master 1 bus 0" +bus "i2c-12" "SCD 0000:07:00.0 SMBus master 1 bus 3" +bus "i2c-13" "SCD 0000:07:00.0 SMBus master 1 bus 4" +bus "i2c-73" "SCD 0000:ff:0b.3 SMBus master 0 bus 0" +bus "i2c-85" "SCD 0000:ff:0b.3 SMBus master 3 bus 0" + +chip "max6581-i2c-9-4d" + ignore temp1 + label temp2 "TH3 exhaust temp sensor" + label temp3 "Left edge PCB rear temp sensor" + label temp4 "Inlet temp sensor" + ignore temp5 + ignore temp6 + label temp7 "Diode temp sensor 1" + label temp8 "Diode temp sensor 2" + +chip "pmbus-i2c-12-58" + label temp1 "Power supply 1 hotspot sensor" + label temp2 "Power supply 1 inlet temp sensor" + label temp3 "Power supply 1 exhaust temp sensor" + +chip "pmbus-i2c-13-58" + label temp1 "Power supply 2 hotspot sensor" + label temp2 "Power supply 2 inlet temp sensor" + label temp3 "Power supply 2 exhaust temp sensor" + +chip "max6658-i2c-73-4c" + label temp1 "Back panel temp sensor 1" + label temp2 "Back panel temp sensor 2" + +chip "tehama_cpld-i2c-85-60" diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/board_lane_map.json b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/board_lane_map.json new file mode 100644 index 00000000000..04f2a9044a4 --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/board_lane_map.json @@ -0,0 +1,3601 @@ +{ +"board_name": "7170-64C", +"enable_debug_log": 0, +"board_lane_map_entry": [ +{ +"connector": 1, +"device_id": 0, +"mac_block": 63, +"media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 3, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 3, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 3, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 3, + "tx_eq_attn": 0 + } + } +}, + +{ +"connector": 2, +"device_id": 0, +"mac_block": 2, +"media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 8, + "tx_eq_post": 2, + "tx_eq_attn": 1 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 1, + "rx_lane": 1, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 8, + "tx_eq_post": 2, + "tx_eq_attn": 1 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 8, + "tx_eq_post": 2, + "tx_eq_attn": 1 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 8, + "tx_eq_post": 2, + "tx_eq_attn": 1 + } + } +}, + +{ +"connector": 3, +"device_id": 0, +"mac_block": 61, +"media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 7, + "tx_eq_post": 1, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 7, + "tx_eq_post": 1, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 7, + "tx_eq_post": 1, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 1, + "rx_lane": 3, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 7, + "tx_eq_post": 1, + "tx_eq_attn": 0 + } + } +}, + +{ +"connector": 4, +"device_id": 0, +"mac_block": 60, +"media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 0, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 3, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 3, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 3, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 3, + "tx_eq_attn": 0 + } + } +}, + +{ +"connector": 5, +"device_id": 0, +"mac_block": 55, +"media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 0, + "tx_eq_attn": 2 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 0, + "tx_eq_attn": 2 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 0, + "tx_eq_attn": 2 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 0, + "tx_eq_attn": 2 + } + } +}, + +{ +"connector": 6, +"device_id": 0, +"mac_block": 58, +"media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 0, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 7, + "tx_eq_post": 1, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 7, + "tx_eq_post": 1, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 7, + "tx_eq_post": 1, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 1, + "rx_lane": 3, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 7, + "tx_eq_post": 1, + "tx_eq_attn": 0 + } + } +}, + +{ +"connector": 7, +"device_id": 0, +"mac_block": 53, +"media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 0, + "tx_eq_attn": 2 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 1, + "rx_lane": 1, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 0, + "tx_eq_attn": 2 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 0, + "tx_eq_attn": 2 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 0, + "tx_eq_attn": 2 + } + } +}, + +{ +"connector": 8, +"device_id": 0, +"mac_block": 15, +"media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 8, + "tx_eq_post": 2, + "tx_eq_attn": 1 + } + }, + "lane1": { + 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+"mac_block": 36, +"media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 7, + "tx_eq_post": 1, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 1, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 7, + "tx_eq_post": 1, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 7, + "tx_eq_post": 1, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 7, + "tx_eq_post": 1, + "tx_eq_attn": 0 + } + } +}, + +{ +"connector": 63, +"device_id": 0, +"mac_block": 31, +"media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 0, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 8, + "tx_eq_post": 2, + "tx_eq_attn": 1 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 1, + "rx_lane": 1, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 8, + "tx_eq_post": 2, + "tx_eq_attn": 1 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 8, + "tx_eq_post": 2, + "tx_eq_attn": 1 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 8, + "tx_eq_post": 2, + "tx_eq_attn": 1 + } + } +}, + +{ +"connector": 64, +"device_id": 0, +"mac_block": 34, +"media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 3, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 1, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 3, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 3, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 9, + "tx_eq_post": 3, + "tx_eq_attn": 0 + } + } +}, + +{ +"connector": 65, +"device_id": 0, +"mac_block": 64, +"media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 0, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 5, + "tx_eq_post": 0, + "tx_eq_attn": 0 + } + } +}, + +{ +"connector": 66, +"device_id": 0, +"mac_block": 64, +"media_type": "copper", + "lane0": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 5, + "tx_eq_post": 0, + "tx_eq_attn": 0 + } + } +}, + +{ +"connector": 67, +"device_id": 0, +"mac_block": 64, +"media_type": "copper", + "lane0": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 5, + "tx_eq_post": 0, + "tx_eq_attn": 0 + } + } +}, + +{ +"connector": 68, +"device_id": 0, +"mac_block": 64, +"media_type": "copper", + "lane0": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 5, + "tx_eq_post": 0, + "tx_eq_attn": 0 + } + } +} + ] +} \ No newline at end of file diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/buffers.json.j2 b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/buffers.json.j2 new file mode 100644 index 00000000000..e6e9e844469 --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..35188dbeb38 --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/buffers_defaults_t0.j2 @@ -0,0 +1,71 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '4194304' %} +{% set ingress_lossy_pool_size = '7340032' %} +{% set egress_lossless_pool_size = '16777152' %} +{% set egress_lossy_pool_size = '7340032' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic", + "xoff": "2867200" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + } + } +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..eb945c25e63 --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/buffers_defaults_t1.j2 @@ -0,0 +1,71 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '2097152' %} +{% set ingress_lossy_pool_size = '5242880' %} +{% set egress_lossless_pool_size = '16777152' %} +{% set egress_lossy_pool_size = '5242880' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic", + "xoff": "2867200" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + } + } +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/pg_profile_lookup.ini b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/pg_profile_lookup.ini new file mode 100644 index 00000000000..78a72d842ac --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 34816 18432 16384 7 + 25000 5m 34816 18432 16384 7 + 40000 5m 34816 18432 16384 7 + 50000 5m 34816 18432 16384 7 + 100000 5m 36864 18432 18432 7 + 10000 40m 36864 18432 18432 7 + 25000 40m 39936 18432 21504 7 + 40000 40m 41984 18432 23552 7 + 50000 40m 41984 18432 23552 7 + 100000 40m 54272 18432 35840 7 + 10000 300m 49152 18432 30720 7 + 25000 300m 71680 18432 53248 7 + 40000 300m 94208 18432 75776 7 + 50000 300m 94208 18432 75776 7 + 100000 300m 184320 18432 165888 7 diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/port_config.ini b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/port_config.ini new file mode 100644 index 00000000000..cbff872de9c --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias speed index +Ethernet0 0,1,2,3 Ethernet1/1 100000 1 +Ethernet4 4,5,6,7 Ethernet2/1 100000 2 +Ethernet8 8,9,10,11 Ethernet3/1 100000 3 +Ethernet12 12,13,14,15 Ethernet4/1 100000 4 +Ethernet16 16,17,18,19 Ethernet5/1 100000 5 +Ethernet20 20,21,22,23 Ethernet6/1 100000 6 +Ethernet24 24,25,26,27 Ethernet7/1 100000 7 +Ethernet28 28,29,30,31 Ethernet8/1 100000 8 +Ethernet32 32,33,34,35 Ethernet9/1 100000 9 +Ethernet36 36,37,38,39 Ethernet10/1 100000 10 +Ethernet40 40,41,42,43 Ethernet11/1 100000 11 +Ethernet44 44,45,46,47 Ethernet12/1 100000 12 +Ethernet48 48,49,50,51 Ethernet13/1 100000 13 +Ethernet52 52,53,54,55 Ethernet14/1 100000 14 +Ethernet56 56,57,58,59 Ethernet15/1 100000 15 +Ethernet60 60,61,62,63 Ethernet16/1 100000 16 +Ethernet64 64,65,66,67 Ethernet17/1 100000 17 +Ethernet68 68,69,70,71 Ethernet18/1 100000 18 +Ethernet72 72,73,74,75 Ethernet19/1 100000 19 +Ethernet76 76,77,78,79 Ethernet20/1 100000 20 +Ethernet80 80,81,82,83 Ethernet21/1 100000 21 +Ethernet84 84,85,86,87 Ethernet22/1 100000 22 +Ethernet88 88,89,90,91 Ethernet23/1 100000 23 +Ethernet92 92,93,94,95 Ethernet24/1 100000 24 +Ethernet96 96,97,98,99 Ethernet25/1 100000 25 +Ethernet100 100,101,102,103 Ethernet26/1 100000 26 +Ethernet104 104,105,106,107 Ethernet27/1 100000 27 +Ethernet108 108,109,110,111 Ethernet28/1 100000 28 +Ethernet112 112,113,114,115 Ethernet29/1 100000 29 +Ethernet116 116,117,118,119 Ethernet30/1 100000 30 +Ethernet120 120,121,122,123 Ethernet31/1 100000 31 +Ethernet124 124,125,126,127 Ethernet32/1 100000 32 +Ethernet128 128,129,130,131 Ethernet33/1 100000 33 +Ethernet132 132,133,134,135 Ethernet34/1 100000 34 +Ethernet136 136,137,138,139 Ethernet35/1 100000 35 +Ethernet140 140,141,142,143 Ethernet36/1 100000 36 +Ethernet144 144,145,146,147 Ethernet37/1 100000 37 +Ethernet148 148,149,150,151 Ethernet38/1 100000 38 +Ethernet152 152,153,154,155 Ethernet39/1 100000 39 +Ethernet156 156,157,158,159 Ethernet40/1 100000 40 +Ethernet160 160,161,162,163 Ethernet41/1 100000 41 +Ethernet164 164,165,166,167 Ethernet42/1 100000 42 +Ethernet168 168,169,170,171 Ethernet43/1 100000 43 +Ethernet172 172,173,174,175 Ethernet44/1 100000 44 +Ethernet176 176,177,178,179 Ethernet45/1 100000 45 +Ethernet180 180,181,182,183 Ethernet46/1 100000 46 +Ethernet184 184,185,186,187 Ethernet47/1 100000 47 +Ethernet188 188,189,190,191 Ethernet48/1 100000 48 +Ethernet192 192,193,194,195 Ethernet49/1 100000 49 +Ethernet196 196,197,198,199 Ethernet50/1 100000 50 +Ethernet200 200,201,202,203 Ethernet51/1 100000 51 +Ethernet204 204,205,206,207 Ethernet52/1 100000 52 +Ethernet208 208,209,210,211 Ethernet53/1 100000 53 +Ethernet212 212,213,214,215 Ethernet54/1 100000 54 +Ethernet216 216,217,218,219 Ethernet55/1 100000 55 +Ethernet220 220,221,222,223 Ethernet56/1 100000 56 +Ethernet224 224,225,226,227 Ethernet57/1 100000 57 +Ethernet228 228,229,230,231 Ethernet58/1 100000 58 +Ethernet232 232,233,234,235 Ethernet59/1 100000 59 +Ethernet236 236,237,238,239 Ethernet60/1 100000 60 +Ethernet240 240,241,242,243 Ethernet61/1 100000 61 +Ethernet244 244,245,246,247 Ethernet62/1 100000 62 +Ethernet248 248,249,250,251 Ethernet63/1 100000 63 +Ethernet252 252,253,254,255 Ethernet64/1 100000 64 diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/qos.json.j2 b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/switch-sai.conf b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/switch-sai.conf new file mode 100644 index 00000000000..0a807b1c9ea --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/switch-sai.conf @@ -0,0 +1,33 @@ +{ + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:1c.4/0000:07:00.0", + "pcie_domain": 0, + "pcie_bus": 7, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "instance": 0, + "p4_program_list": [ + { + "id": "pgm-0", + "instance": 0, + "path": "switch", + "program-name": "switch", + "pd": "lib/tofinopd/switch/libpd.so", + "pd-thrift": "lib/tofinopd/switch/libpdthrift.so", + "table-config": "share/tofinopd/switch/context.json", + "tofino-bin": "share/tofinopd/switch/tofino.bin", + "switchapi": "lib/libswitchapi.so", + "sai": "lib/libsai.so", + "switchapi_port_add": false, + "non_default_port_ppgs": 5 + } + ] +} diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/switch-tna-sai.conf b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/switch-tna-sai.conf new file mode 100644 index 00000000000..ece3fcbe6a9 --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-64C/switch-tna-sai.conf @@ -0,0 +1,39 @@ +{ + "instance": 0, + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0", + "pcie_domain": 0, + "pcie_bus": 5, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "p4_devices": [ + { + "device-id": 0, + "p4_programs": [ + { + "p4_pipelines": [ + { + "p4_pipeline_name": "pipe", + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" + } + ], + "program-name": "switch", + "sai": "lib/libsai.so", + "bfrt-config": "share/switch/bf-rt.json", + "model_json_path" : "share/switch/aug_model.json", + "switchapi_port_add": false, + "non_default_port_ppgs": 5 + } + ] + } + ] +} diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/board_lane_map.json b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/board_lane_map.json new file mode 100644 index 00000000000..dc81608655b --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/board_lane_map.json @@ -0,0 +1,3534 @@ +{ + "board_name": "7170-64C", + "enable_debug_log": 0, + "board_lane_map_entry": [ + { + "connector": 1, + "device_id": 0, + "mac_block": 63, + "media_type": "optic", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 2, + "device_id": 0, + "mac_block": 2, + "media_type": "optic", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 1, + "rx_lane": 1, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 3, + "device_id": 0, + "mac_block": 61, + "media_type": "optic", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 1, + "rx_lane": 3, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 4, + "device_id": 0, + "mac_block": 60, + "media_type": "optic", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 0, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 5, + "device_id": 0, + "mac_block": 55, + "media_type": "optic", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 6, + "device_id": 0, + "mac_block": 58, + "media_type": "optic", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 0, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 0, 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"lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 53, + "device_id": 0, + "mac_block": 26, + "media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 0, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 1, + "rx_lane": 3, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 54, + "device_id": 0, + "mac_block": 23, + "media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 1, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 55, + "device_id": 0, + "mac_block": 20, + "media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 0, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 1, + "rx_lane": 1, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 56, + "device_id": 0, + "mac_block": 22, + "media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 1, + "rx_lane": 1, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 57, + "device_id": 0, + "mac_block": 18, + "media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 0, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 1, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 58, + "device_id": 0, + "mac_block": 44, + "media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 1, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 59, + "device_id": 0, + "mac_block": 39, + "media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 0, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 60, + "device_id": 0, + "mac_block": 42, + "media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 0, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 61, + "device_id": 0, + "mac_block": 37, + "media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 0, + "rx_lane": 0, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 62, + "device_id": 0, + "mac_block": 36, + "media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 1, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 63, + "device_id": 0, + "mac_block": 31, + "media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 0, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 1, + "rx_lane": 1, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 1, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 64, + "device_id": 0, + "mac_block": 34, + "media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 1, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane1": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 1, + "rx_lane": 1, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane2": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + }, + "lane3": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 1, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 65, + "device_id": 0, + "mac_block": 64, + "media_type": "copper", + "lane0": { + "mac_ch": 0, + "tx_lane": 0, + "tx_pn_swap": 0, + "rx_lane": 0, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 66, + "device_id": 0, + "mac_block": 64, + "media_type": "copper", + "lane0": { + "mac_ch": 1, + "tx_lane": 1, + "tx_pn_swap": 0, + "rx_lane": 1, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 67, + "device_id": 0, + "mac_block": 64, + "media_type": "copper", + "lane0": { + "mac_ch": 2, + "tx_lane": 2, + "tx_pn_swap": 0, + "rx_lane": 2, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + }, + { + "connector": 68, + "device_id": 0, + "mac_block": 64, + "media_type": "copper", + "lane0": { + "mac_ch": 3, + "tx_lane": 3, + "tx_pn_swap": 0, + "rx_lane": 3, + "rx_pn_swap": 0, + "serdes_params": { + "tx_eq_pre": 2, + "tx_eq_post": 4, + "tx_eq_attn": 0 + } + } + } + ] +} \ No newline at end of file diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/buffers.json.j2 b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/buffers.json.j2 new file mode 100644 index 00000000000..e6e9e844469 --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..8cd886c14ff --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/buffers_defaults_t0.j2 @@ -0,0 +1,83 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '4194304' %} +{% set ingress_lossy_pool_size = '7340032' %} +{% set egress_lossless_pool_size = '16777152' %} +{% set egress_lossy_pool_size = '7340032' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,20) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(80,88) %} + {%- if PORT_ALL.append("Ethernet%d" % port_idx) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(22,32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(128,140) %} + {%- if PORT_ALL.append("Ethernet%d" % port_idx) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(35,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic", + "xoff": "2867200" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + } + } +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..e14ad921474 --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/buffers_defaults_t1.j2 @@ -0,0 +1,83 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '2097152' %} +{% set ingress_lossy_pool_size = '5242880' %} +{% set egress_lossless_pool_size = '16777152' %} +{% set egress_lossy_pool_size = '5242880' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,20) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(80,88) %} + {%- if PORT_ALL.append("Ethernet%d" % port_idx) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(22,32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(128,140) %} + {%- if PORT_ALL.append("Ethernet%d" % port_idx) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(35,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic", + "xoff": "2867200" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + } + } +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/pg_profile_lookup.ini b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/pg_profile_lookup.ini new file mode 100644 index 00000000000..78a72d842ac --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 34816 18432 16384 7 + 25000 5m 34816 18432 16384 7 + 40000 5m 34816 18432 16384 7 + 50000 5m 34816 18432 16384 7 + 100000 5m 36864 18432 18432 7 + 10000 40m 36864 18432 18432 7 + 25000 40m 39936 18432 21504 7 + 40000 40m 41984 18432 23552 7 + 50000 40m 41984 18432 23552 7 + 100000 40m 54272 18432 35840 7 + 10000 300m 49152 18432 30720 7 + 25000 300m 71680 18432 53248 7 + 40000 300m 94208 18432 75776 7 + 50000 300m 94208 18432 75776 7 + 100000 300m 184320 18432 165888 7 diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/port_config.ini b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/port_config.ini new file mode 100644 index 00000000000..cf01e339b81 --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/port_config.ini @@ -0,0 +1,80 @@ +# name lanes alias speed index autoneg +Ethernet0 0,1,2,3 Ethernet1/1 40000 1 0 +Ethernet4 4,5,6,7 Ethernet2/1 40000 2 0 +Ethernet8 8,9,10,11 Ethernet3/1 40000 3 0 +Ethernet12 12,13,14,15 Ethernet4/1 40000 4 0 +Ethernet16 16,17,18,19 Ethernet5/1 40000 5 0 +Ethernet20 20,21,22,23 Ethernet6/1 40000 6 0 +Ethernet24 24,25,26,27 Ethernet7/1 40000 7 0 +Ethernet28 28,29,30,31 Ethernet8/1 40000 8 0 +Ethernet32 32,33,34,35 Ethernet9/1 40000 9 1 +Ethernet36 36,37,38,39 Ethernet10/1 40000 10 1 +Ethernet40 40,41,42,43 Ethernet11/1 40000 11 1 +Ethernet44 44,45,46,47 Ethernet12/1 40000 12 1 +Ethernet48 48,49,50,51 Ethernet13/1 40000 13 1 +Ethernet52 52,53,54,55 Ethernet14/1 40000 14 1 +Ethernet56 56,57,58,59 Ethernet15/1 40000 15 1 +Ethernet60 60,61,62,63 Ethernet16/1 40000 16 1 +Ethernet64 64,65,66,67 Ethernet17/1 40000 17 1 +Ethernet68 68,69,70,71 Ethernet18/1 40000 18 1 +Ethernet72 72,73,74,75 Ethernet19/1 40000 19 1 +Ethernet76 76,77,78,79 Ethernet20/1 40000 20 1 +Ethernet80 80 Ethernet21/1 10000 21 0 +Ethernet81 81 Ethernet21/2 10000 21 0 +Ethernet82 82 Ethernet21/3 10000 21 0 +Ethernet83 83 Ethernet21/4 10000 21 0 +Ethernet84 84 Ethernet22/1 10000 22 0 +Ethernet85 85 Ethernet22/2 10000 22 0 +Ethernet86 86 Ethernet22/3 10000 22 0 +Ethernet87 87 Ethernet22/4 10000 22 0 +Ethernet88 88,89,90,91 Ethernet23/1 40000 23 0 +Ethernet92 92,93,94,95 Ethernet24/1 40000 24 0 +Ethernet96 96,97,98,99 Ethernet25/1 40000 25 0 +Ethernet100 100,101,102,103 Ethernet26/1 40000 26 0 +Ethernet104 104,105,106,107 Ethernet27/1 40000 27 0 +Ethernet108 108,109,110,111 Ethernet28/1 40000 28 0 +Ethernet112 112,113,114,115 Ethernet29/1 40000 29 0 +Ethernet116 116,117,118,119 Ethernet30/1 40000 30 0 +Ethernet120 120,121,122,123 Ethernet31/1 40000 31 0 +Ethernet124 124,125,126,127 Ethernet32/1 40000 32 0 +Ethernet128 128 Ethernet33/1 10000 33 0 +Ethernet129 129 Ethernet33/2 10000 33 0 +Ethernet130 130 Ethernet33/3 10000 33 0 +Ethernet131 131 Ethernet33/4 10000 33 0 +Ethernet132 132 Ethernet34/1 10000 34 0 +Ethernet133 133 Ethernet34/2 10000 34 0 +Ethernet134 134 Ethernet34/3 10000 34 0 +Ethernet135 135 Ethernet34/4 10000 34 0 +Ethernet136 136 Ethernet35/1 10000 35 0 +Ethernet137 137 Ethernet35/2 10000 35 0 +Ethernet138 138 Ethernet35/3 10000 35 0 +Ethernet139 139 Ethernet35/4 10000 35 0 +Ethernet140 140,141,142,143 Ethernet36/1 40000 36 0 +Ethernet144 144,145,146,147 Ethernet37/1 40000 37 0 +Ethernet148 148,149,150,151 Ethernet38/1 40000 38 0 +Ethernet152 152,153,154,155 Ethernet39/1 40000 39 0 +Ethernet156 156,157,158,159 Ethernet40/1 40000 40 0 +Ethernet160 160,161,162,163 Ethernet41/1 40000 41 1 +Ethernet164 164,165,166,167 Ethernet42/1 40000 42 1 +Ethernet168 168,169,170,171 Ethernet43/1 40000 43 1 +Ethernet172 172,173,174,175 Ethernet44/1 40000 44 1 +Ethernet176 176,177,178,179 Ethernet45/1 40000 45 1 +Ethernet180 180,181,182,183 Ethernet46/1 40000 46 1 +Ethernet184 184,185,186,187 Ethernet47/1 40000 47 1 +Ethernet188 188,189,190,191 Ethernet48/1 40000 48 1 +Ethernet192 192,193,194,195 Ethernet49/1 40000 49 1 +Ethernet196 196,197,198,199 Ethernet50/1 40000 50 1 +Ethernet200 200,201,202,203 Ethernet51/1 40000 51 1 +Ethernet204 204,205,206,207 Ethernet52/1 40000 52 1 +Ethernet208 208,209,210,211 Ethernet53/1 40000 53 1 +Ethernet212 212,213,214,215 Ethernet54/1 40000 54 1 +Ethernet216 216,217,218,219 Ethernet55/1 40000 55 1 +Ethernet220 220,221,222,223 Ethernet56/1 40000 56 1 +Ethernet224 224,225,226,227 Ethernet57/1 40000 57 1 +Ethernet228 228,229,230,231 Ethernet58/1 40000 58 1 +Ethernet232 232,233,234,235 Ethernet59/1 40000 59 1 +Ethernet236 236,237,238,239 Ethernet60/1 40000 60 1 +Ethernet240 240,241,242,243 Ethernet61/1 40000 61 1 +Ethernet244 244,245,246,247 Ethernet62/1 40000 62 1 +Ethernet248 248,249,250,251 Ethernet63/1 40000 63 1 +Ethernet252 252,253,254,255 Ethernet64/1 40000 64 1 diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/qos.json.j2 b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/switch-sai.conf b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/switch-sai.conf new file mode 100644 index 00000000000..0a807b1c9ea --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/switch-sai.conf @@ -0,0 +1,33 @@ +{ + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:1c.4/0000:07:00.0", + "pcie_domain": 0, + "pcie_bus": 7, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "instance": 0, + "p4_program_list": [ + { + "id": "pgm-0", + "instance": 0, + "path": "switch", + "program-name": "switch", + "pd": "lib/tofinopd/switch/libpd.so", + "pd-thrift": "lib/tofinopd/switch/libpdthrift.so", + "table-config": "share/tofinopd/switch/context.json", + "tofino-bin": "share/tofinopd/switch/tofino.bin", + "switchapi": "lib/libswitchapi.so", + "sai": "lib/libsai.so", + "switchapi_port_add": false, + "non_default_port_ppgs": 5 + } + ] +} diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/switch-tna-sai.conf b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/switch-tna-sai.conf new file mode 100644 index 00000000000..ece3fcbe6a9 --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/switch-tna-sai.conf @@ -0,0 +1,39 @@ +{ + "instance": 0, + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0", + "pcie_domain": 0, + "pcie_bus": 5, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "p4_devices": [ + { + "device-id": 0, + "p4_programs": [ + { + "p4_pipelines": [ + { + "p4_pipeline_name": "pipe", + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" + } + ], + "program-name": "switch", + "sai": "lib/libsai.so", + "bfrt-config": "share/switch/bf-rt.json", + "model_json_path" : "share/switch/aug_model.json", + "switchapi_port_add": false, + "non_default_port_ppgs": 5 + } + ] + } + ] +} diff --git a/device/arista/x86_64-arista_7170_64c/default_sku b/device/arista/x86_64-arista_7170_64c/default_sku new file mode 100644 index 00000000000..c3355162a6d --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/default_sku @@ -0,0 +1 @@ +Arista-7170-64C t1 diff --git a/device/arista/x86_64-arista_7170_64c/fancontrol b/device/arista/x86_64-arista_7170_64c/fancontrol new file mode 100644 index 00000000000..7236dbf4d18 --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/fancontrol @@ -0,0 +1,10 @@ +INTERVAL=5 +DEVPATH=hwmon2=devices/pci0000:00/0000:00:1c.0/0000:06:00.0/i2c-8/8-004c hwmon4=devices/pci0000:ff/0000:ff:0b.3/i2c-93/93-0060 +DEVNAME=hwmon2=max6658 hwmon4=la_cpld +FCTEMPS=hwmon4/pwm4=hwmon2/temp1_input hwmon4/pwm3=hwmon2/temp1_input hwmon4/pwm2=hwmon2/temp1_input hwmon4/pwm1=hwmon2/temp1_input +FCFANS=hwmon4/pwm4=hwmon4/fan4_input hwmon4/pwm3=hwmon4/fan3_input hwmon4/pwm2=hwmon4/fan2_input hwmon4/pwm1=hwmon4/fan1_input +MINTEMP=hwmon4/pwm4=50 hwmon4/pwm3=50 hwmon4/pwm2=50 hwmon4/pwm1=50 +MINPWM=hwmon4/pwm4=128 hwmon4/pwm3=128 hwmon4/pwm2=128 hwmon4/pwm1=128 +MAXTEMP=hwmon4/pwm4=60 hwmon4/pwm3=60 hwmon4/pwm2=60 hwmon4/pwm1=60 +MINSTART=hwmon4/pwm4=128 hwmon4/pwm3=128 hwmon4/pwm2=128 hwmon4/pwm1=128 +MINSTOP=hwmon4/pwm4=128 hwmon4/pwm3=128 hwmon4/pwm2=128 hwmon4/pwm1=128 diff --git a/device/arista/x86_64-arista_7170_64c/platform_reboot b/device/arista/x86_64-arista_7170_64c/platform_reboot new file mode 120000 index 00000000000..7f94a49e38b --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/platform_reboot @@ -0,0 +1 @@ +../x86_64-arista_common/platform_reboot \ No newline at end of file diff --git a/device/arista/x86_64-arista_7170_64c/plugins b/device/arista/x86_64-arista_7170_64c/plugins new file mode 120000 index 00000000000..5fbbf98a628 --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/plugins @@ -0,0 +1 @@ +../x86_64-arista_common/plugins/ \ No newline at end of file diff --git a/device/arista/x86_64-arista_7170_64c/sensors.conf b/device/arista/x86_64-arista_7170_64c/sensors.conf new file mode 100644 index 00000000000..732cb92a96e --- /dev/null +++ b/device/arista/x86_64-arista_7170_64c/sensors.conf @@ -0,0 +1,59 @@ +# libsensors configuration file for DCS-7260CX3-64 +# ------------------------------------------------ + +bus "i2c-6" "SCD 0000:06:00.0 SMBus master 0 bus 5" +bus "i2c-7" "SCD 0000:06:00.0 SMBus master 0 bus 6" +bus "i2c-8" "SCD 0000:06:00.0 SMBus master 0 bus 7" +bus "i2c-81" "SCD 0000:ff:0b.3 SMBus master 0 bus 0" +bus "i2c-93" "SCD 0000:ff:0b.3 SMBus master 3 bus 0" +bus "i2c-96" "SCD 0000:ff:0b.3 SMBus master 3 bus 3" + +chip "max6658-i2c-8-4c" + label temp1 "Temp sensor near ASIC" + + set temp1_max 100 + set temp1_crit 110 + set temp1_min -55 + + set temp2_max 100 + set temp2_crit 110 + set temp2_min -55 + ignore temp2 + +chip "dps1900-i2c-6-58" + label temp1 "PSU1 primary hotspot temp" + label temp2 "PSU1 inlet temp" + label temp3 "PSU1 exhaust temp" + + # setting maximum and critical thresholds is not supported for this psu + # fault and warning limits defined internally by hardware + + ignore fan2 + ignore fan3 + +chip "dps1900-i2c-7-58" + label temp1 "PSU2 primary hotspot temp" + label temp2 "PSU2 inlet temp" + label temp3 "PSU2 exhaust temp" + + # setting maximum and critical thresholds is not supported for this psu + # fault and warning limits defined internally by hardware + + ignore fan2 + ignore fan3 + +chip "max6658-i2c-81-4c" + label temp1 "Rear air temp1" + label temp2 "Rear air temp2" + + set temp1_max 70 + set temp1_crit 80 + set temp1_min -55 + set temp2_max 70 + set temp2_crit 80 + set temp2_min -55 + +chip "lm73-i2c-96-48" + label temp1 "Front air temp" + + set temp1_max 65 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/port_config.ini b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/port_config.ini new file mode 100644 index 00000000000..3940948a354 --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/port_config.ini @@ -0,0 +1,67 @@ +# name lanes alias index speed +Ethernet0 77,78,79,80 Ethernet1/1 1 100000 +Ethernet4 65,66,67,68 Ethernet2/1 2 100000 +Ethernet8 85,86,87,88 Ethernet3/1 3 100000 +Ethernet12 89,90,91,92 Ethernet4/1 4 100000 +Ethernet16 109,110,111,112 Ethernet5/1 5 100000 +Ethernet20 97,98,99,100 Ethernet6/1 6 100000 +Ethernet24 5,6,7,8 Ethernet7/1 7 100000 +Ethernet28 13,14,15,16 Ethernet8/1 8 100000 +Ethernet32 25,26,27,28 Ethernet9/1 9 100000 +Ethernet36 21,22,23,24 Ethernet10/1 10 100000 +Ethernet40 37,38,39,40 Ethernet11/1 11 100000 +Ethernet44 45,46,47,48 Ethernet12/1 12 100000 +Ethernet48 57,58,59,60 Ethernet13/1 13 100000 +Ethernet52 53,54,55,56 Ethernet14/1 14 100000 +Ethernet56 117,118,119,120 Ethernet15/1 15 100000 +Ethernet60 121,122,123,124 Ethernet16/1 16 100000 +Ethernet64 141,142,143,144 Ethernet17/1 17 100000 +Ethernet68 133,134,135,136 Ethernet18/1 18 100000 +Ethernet72 197,198,199,200 Ethernet19/1 19 100000 +Ethernet76 205,206,207,208 Ethernet20/1 20 100000 +Ethernet80 217,218,219,220 Ethernet21/1 21 100000 +Ethernet84 213,214,215,216 Ethernet22/1 22 100000 +Ethernet88 229,230,231,232 Ethernet23/1 23 100000 +Ethernet92 237,238,239,240 Ethernet24/1 24 100000 +Ethernet96 249,250,251,252 Ethernet25/1 25 100000 +Ethernet100 245,246,247,248 Ethernet26/1 26 100000 +Ethernet104 149,150,151,152 Ethernet27/1 27 100000 +Ethernet108 153,154,155,156 Ethernet28/1 28 100000 +Ethernet112 173,174,175,176 Ethernet29/1 29 100000 +Ethernet116 161,162,163,164 Ethernet30/1 30 100000 +Ethernet120 181,182,183,184 Ethernet31/1 31 100000 +Ethernet124 185,186,187,188 Ethernet32/1 32 100000 +Ethernet128 69,70,71,72 Ethernet33/1 33 100000 +Ethernet132 73,74,75,76 Ethernet34/1 34 100000 +Ethernet136 93,94,95,96 Ethernet35/1 35 100000 +Ethernet140 81,82,83,84 Ethernet36/1 36 100000 +Ethernet144 101,102,103,104 Ethernet37/1 37 100000 +Ethernet148 105,106,107,108 Ethernet38/1 38 100000 +Ethernet152 9,10,11,12 Ethernet39/1 39 100000 +Ethernet156 1,2,3,4 Ethernet40/1 40 100000 +Ethernet160 17,18,19,20 Ethernet41/1 41 100000 +Ethernet164 29,30,31,32 Ethernet42/1 42 100000 +Ethernet168 41,42,43,44 Ethernet43/1 43 100000 +Ethernet172 33,34,35,36 Ethernet44/1 44 100000 +Ethernet176 49,50,51,52 Ethernet45/1 45 100000 +Ethernet180 61,62,63,64 Ethernet46/1 46 100000 +Ethernet184 125,126,127,128 Ethernet47/1 47 100000 +Ethernet188 113,114,115,116 Ethernet48/1 48 100000 +Ethernet192 129,130,131,132 Ethernet49/1 49 100000 +Ethernet196 137,138,139,140 Ethernet50/1 50 100000 +Ethernet200 201,202,203,204 Ethernet51/1 51 100000 +Ethernet204 193,194,195,196 Ethernet52/1 52 100000 +Ethernet208 209,210,211,212 Ethernet53/1 53 100000 +Ethernet212 221,222,223,224 Ethernet54/1 54 100000 +Ethernet216 233,234,235,236 Ethernet55/1 55 100000 +Ethernet220 225,226,227,228 Ethernet56/1 56 100000 +Ethernet224 241,242,243,244 Ethernet57/1 57 100000 +Ethernet228 253,254,255,256 Ethernet58/1 58 100000 +Ethernet232 157,158,159,160 Ethernet59/1 59 100000 +Ethernet236 145,146,147,148 Ethernet60/1 60 100000 +Ethernet240 165,166,167,168 Ethernet61/1 61 100000 +Ethernet244 169,170,171,172 Ethernet62/1 62 100000 +Ethernet248 189,190,191,192 Ethernet63/1 63 100000 +Ethernet252 177,178,179,180 Ethernet64/1 64 100000 +Ethernet256 257 Ethernet65 65 10000 +Ethernet260 259 Ethernet66 66 10000 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/sai.profile b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/sai.profile new file mode 100644 index 00000000000..74aea949c3b --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-a7260cx3-64-64x100G.config.bcm diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/th2-a7260cx3-64-64x100G.config.bcm b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/th2-a7260cx3-64-64x100G.config.bcm new file mode 100644 index 00000000000..44fb6f7536b --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/th2-a7260cx3-64-64x100G.config.bcm @@ -0,0 +1,1013 @@ +PHY_AN_ALLOW_PLL_CHANGE=1 +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=8 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +core_clock_frequency=1700 +dma_desc_timeout_usec=15000000 +dpp_clock_ratio=2:3 +higig2_hdr_mode=1 +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +l2xmsg_mode=1 +max_vp_lags=0 +mem_scan_enable=1 +miim_intr_enable=0 +module_64ports=1 +os=unix +oversubscribe_mode=1 +pbmp_xport_xe=0x40003ffff0000ffffc0003fffe0001fffe +phy_an_allow_pll_change_hg=0 +phy_an_c73_100=1 +phy_an_c73_102=1 +phy_an_c73_103=1 +phy_an_c73_104=1 +phy_an_c73_105=1 +phy_an_c73_106=1 +phy_an_c73_107=1 +phy_an_c73_108=1 +phy_an_c73_109=1 +phy_an_c73_10=1 +phy_an_c73_110=1 +phy_an_c73_111=1 +phy_an_c73_112=1 +phy_an_c73_113=1 +phy_an_c73_114=1 +phy_an_c73_115=1 +phy_an_c73_116=1 +phy_an_c73_117=1 +phy_an_c73_11=1 +phy_an_c73_12=1 +phy_an_c73_13=1 +phy_an_c73_14=1 +phy_an_c73_15=1 +phy_an_c73_16=1 +phy_an_c73_1=1 +phy_an_c73_2=1 +phy_an_c73_34=1 +phy_an_c73_35=1 +phy_an_c73_36=1 +phy_an_c73_37=1 +phy_an_c73_38=1 +phy_an_c73_39=1 +phy_an_c73_3=1 +phy_an_c73_40=1 +phy_an_c73_41=1 +phy_an_c73_42=1 +phy_an_c73_43=1 +phy_an_c73_44=1 +phy_an_c73_45=1 +phy_an_c73_46=1 +phy_an_c73_47=1 +phy_an_c73_48=1 +phy_an_c73_49=1 +phy_an_c73_4=1 +phy_an_c73_5=1 +phy_an_c73_66=1 +phy_an_c73_68=1 +phy_an_c73_69=1 +phy_an_c73_6=1 +phy_an_c73_70=1 +phy_an_c73_71=1 +phy_an_c73_72=1 +phy_an_c73_73=1 +phy_an_c73_74=1 +phy_an_c73_75=1 +phy_an_c73_76=1 +phy_an_c73_77=1 +phy_an_c73_78=1 +phy_an_c73_79=1 +phy_an_c73_7=1 +phy_an_c73_80=1 +phy_an_c73_81=1 +phy_an_c73_82=1 +phy_an_c73_83=1 +phy_an_c73_8=1 +phy_an_c73_9=1 +phy_chain_rx_lane_map_physical{1.0}=0x3210 +phy_chain_rx_lane_map_physical{101.0}=0x0123 +phy_chain_rx_lane_map_physical{105.0}=0x0123 +phy_chain_rx_lane_map_physical{109.0}=0x0123 +phy_chain_rx_lane_map_physical{113.0}=0x2301 +phy_chain_rx_lane_map_physical{117.0}=0x3210 +phy_chain_rx_lane_map_physical{121.0}=0x3210 +phy_chain_rx_lane_map_physical{125.0}=0x1203 +phy_chain_rx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_lane_map_physical{13.0}=0x0321 +phy_chain_rx_lane_map_physical{133.0}=0x1032 +phy_chain_rx_lane_map_physical{137.0}=0x3210 +phy_chain_rx_lane_map_physical{141.0}=0x0123 +phy_chain_rx_lane_map_physical{145.0}=0x3210 +phy_chain_rx_lane_map_physical{149.0}=0x2310 +phy_chain_rx_lane_map_physical{153.0}=0x0132 +phy_chain_rx_lane_map_physical{157.0}=0x1302 +phy_chain_rx_lane_map_physical{161.0}=0x3021 +phy_chain_rx_lane_map_physical{165.0}=0x2031 +phy_chain_rx_lane_map_physical{169.0}=0x2031 +phy_chain_rx_lane_map_physical{17.0}=0x3210 +phy_chain_rx_lane_map_physical{173.0}=0x1302 +phy_chain_rx_lane_map_physical{177.0}=0x2031 +phy_chain_rx_lane_map_physical{181.0}=0x0213 +phy_chain_rx_lane_map_physical{185.0}=0x0213 +phy_chain_rx_lane_map_physical{189.0}=0x1302 +phy_chain_rx_lane_map_physical{193.0}=0x3120 +phy_chain_rx_lane_map_physical{197.0}=0x0231 +phy_chain_rx_lane_map_physical{201.0}=0x2031 +phy_chain_rx_lane_map_physical{205.0}=0x0213 +phy_chain_rx_lane_map_physical{209.0}=0x2013 +phy_chain_rx_lane_map_physical{21.0}=0x3021 +phy_chain_rx_lane_map_physical{213.0}=0x3021 +phy_chain_rx_lane_map_physical{217.0}=0x0231 +phy_chain_rx_lane_map_physical{221.0}=0x2031 +phy_chain_rx_lane_map_physical{225.0}=0x1203 +phy_chain_rx_lane_map_physical{229.0}=0x1230 +phy_chain_rx_lane_map_physical{233.0}=0x3021 +phy_chain_rx_lane_map_physical{237.0}=0x1032 +phy_chain_rx_lane_map_physical{241.0}=0x2301 +phy_chain_rx_lane_map_physical{245.0}=0x0321 +phy_chain_rx_lane_map_physical{249.0}=0x2301 +phy_chain_rx_lane_map_physical{25.0}=0x2301 +phy_chain_rx_lane_map_physical{253.0}=0x2301 +phy_chain_rx_lane_map_physical{257.0}=0x3210 +phy_chain_rx_lane_map_physical{29.0}=0x3021 +phy_chain_rx_lane_map_physical{33.0}=0x1302 +phy_chain_rx_lane_map_physical{37.0}=0x2031 +phy_chain_rx_lane_map_physical{41.0}=0x3021 +phy_chain_rx_lane_map_physical{45.0}=0x1023 +phy_chain_rx_lane_map_physical{49.0}=0x0213 +phy_chain_rx_lane_map_physical{5.0}=0x3201 +phy_chain_rx_lane_map_physical{53.0}=0x3201 +phy_chain_rx_lane_map_physical{57.0}=0x2013 +phy_chain_rx_lane_map_physical{61.0}=0x0213 +phy_chain_rx_lane_map_physical{65.0}=0x1203 +phy_chain_rx_lane_map_physical{69.0}=0x0213 +phy_chain_rx_lane_map_physical{73.0}=0x0213 +phy_chain_rx_lane_map_physical{77.0}=0x3120 +phy_chain_rx_lane_map_physical{81.0}=0x0213 +phy_chain_rx_lane_map_physical{85.0}=0x2031 +phy_chain_rx_lane_map_physical{89.0}=0x2031 +phy_chain_rx_lane_map_physical{9.0}=0x0321 +phy_chain_rx_lane_map_physical{93.0}=0x3120 +phy_chain_rx_lane_map_physical{97.0}=0x1203 +phy_chain_rx_polarity_flip_physical{1.0}=0x1 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 +phy_chain_rx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x1 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{117.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x1 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_rx_polarity_flip_physical{130.0}=0x1 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{133.0}=0x1 +phy_chain_rx_polarity_flip_physical{134.0}=0x1 +phy_chain_rx_polarity_flip_physical{135.0}=0x1 +phy_chain_rx_polarity_flip_physical{136.0}=0x0 +phy_chain_rx_polarity_flip_physical{137.0}=0x0 +phy_chain_rx_polarity_flip_physical{138.0}=0x0 +phy_chain_rx_polarity_flip_physical{139.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{140.0}=0x0 +phy_chain_rx_polarity_flip_physical{141.0}=0x1 +phy_chain_rx_polarity_flip_physical{142.0}=0x0 +phy_chain_rx_polarity_flip_physical{143.0}=0x1 +phy_chain_rx_polarity_flip_physical{144.0}=0x0 +phy_chain_rx_polarity_flip_physical{145.0}=0x1 +phy_chain_rx_polarity_flip_physical{146.0}=0x0 +phy_chain_rx_polarity_flip_physical{147.0}=0x1 +phy_chain_rx_polarity_flip_physical{148.0}=0x0 +phy_chain_rx_polarity_flip_physical{149.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{150.0}=0x1 +phy_chain_rx_polarity_flip_physical{151.0}=0x1 +phy_chain_rx_polarity_flip_physical{152.0}=0x0 +phy_chain_rx_polarity_flip_physical{153.0}=0x0 +phy_chain_rx_polarity_flip_physical{154.0}=0x1 +phy_chain_rx_polarity_flip_physical{155.0}=0x1 +phy_chain_rx_polarity_flip_physical{156.0}=0x0 +phy_chain_rx_polarity_flip_physical{157.0}=0x0 +phy_chain_rx_polarity_flip_physical{158.0}=0x0 +phy_chain_rx_polarity_flip_physical{159.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 +phy_chain_rx_polarity_flip_physical{161.0}=0x1 +phy_chain_rx_polarity_flip_physical{162.0}=0x1 +phy_chain_rx_polarity_flip_physical{163.0}=0x0 +phy_chain_rx_polarity_flip_physical{164.0}=0x1 +phy_chain_rx_polarity_flip_physical{165.0}=0x0 +phy_chain_rx_polarity_flip_physical{166.0}=0x0 +phy_chain_rx_polarity_flip_physical{167.0}=0x1 +phy_chain_rx_polarity_flip_physical{168.0}=0x1 +phy_chain_rx_polarity_flip_physical{169.0}=0x1 +phy_chain_rx_polarity_flip_physical{17.0}=0x1 +phy_chain_rx_polarity_flip_physical{170.0}=0x1 +phy_chain_rx_polarity_flip_physical{171.0}=0x0 +phy_chain_rx_polarity_flip_physical{172.0}=0x0 +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x0 +phy_chain_rx_polarity_flip_physical{175.0}=0x1 +phy_chain_rx_polarity_flip_physical{176.0}=0x1 +phy_chain_rx_polarity_flip_physical{177.0}=0x1 +phy_chain_rx_polarity_flip_physical{178.0}=0x1 +phy_chain_rx_polarity_flip_physical{179.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x0 +phy_chain_rx_polarity_flip_physical{181.0}=0x1 +phy_chain_rx_polarity_flip_physical{182.0}=0x1 +phy_chain_rx_polarity_flip_physical{183.0}=0x0 +phy_chain_rx_polarity_flip_physical{184.0}=0x0 +phy_chain_rx_polarity_flip_physical{185.0}=0x0 +phy_chain_rx_polarity_flip_physical{186.0}=0x0 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x1 +phy_chain_rx_polarity_flip_physical{189.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_rx_polarity_flip_physical{190.0}=0x0 +phy_chain_rx_polarity_flip_physical{191.0}=0x1 +phy_chain_rx_polarity_flip_physical{192.0}=0x0 +phy_chain_rx_polarity_flip_physical{193.0}=0x0 +phy_chain_rx_polarity_flip_physical{194.0}=0x0 +phy_chain_rx_polarity_flip_physical{195.0}=0x1 +phy_chain_rx_polarity_flip_physical{196.0}=0x1 +phy_chain_rx_polarity_flip_physical{197.0}=0x1 +phy_chain_rx_polarity_flip_physical{198.0}=0x1 +phy_chain_rx_polarity_flip_physical{199.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x0 +phy_chain_rx_polarity_flip_physical{201.0}=0x0 +phy_chain_rx_polarity_flip_physical{202.0}=0x0 +phy_chain_rx_polarity_flip_physical{203.0}=0x1 +phy_chain_rx_polarity_flip_physical{204.0}=0x0 +phy_chain_rx_polarity_flip_physical{205.0}=0x1 +phy_chain_rx_polarity_flip_physical{206.0}=0x1 +phy_chain_rx_polarity_flip_physical{207.0}=0x0 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 +phy_chain_rx_polarity_flip_physical{209.0}=0x1 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{210.0}=0x1 +phy_chain_rx_polarity_flip_physical{211.0}=0x0 +phy_chain_rx_polarity_flip_physical{212.0}=0x0 +phy_chain_rx_polarity_flip_physical{213.0}=0x0 +phy_chain_rx_polarity_flip_physical{214.0}=0x0 +phy_chain_rx_polarity_flip_physical{215.0}=0x1 +phy_chain_rx_polarity_flip_physical{216.0}=0x0 +phy_chain_rx_polarity_flip_physical{217.0}=0x0 +phy_chain_rx_polarity_flip_physical{218.0}=0x0 +phy_chain_rx_polarity_flip_physical{219.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{220.0}=0x1 +phy_chain_rx_polarity_flip_physical{221.0}=0x0 +phy_chain_rx_polarity_flip_physical{222.0}=0x0 +phy_chain_rx_polarity_flip_physical{223.0}=0x1 +phy_chain_rx_polarity_flip_physical{224.0}=0x1 +phy_chain_rx_polarity_flip_physical{225.0}=0x1 +phy_chain_rx_polarity_flip_physical{226.0}=0x0 +phy_chain_rx_polarity_flip_physical{227.0}=0x0 +phy_chain_rx_polarity_flip_physical{228.0}=0x1 +phy_chain_rx_polarity_flip_physical{229.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{230.0}=0x0 +phy_chain_rx_polarity_flip_physical{231.0}=0x1 +phy_chain_rx_polarity_flip_physical{232.0}=0x1 +phy_chain_rx_polarity_flip_physical{233.0}=0x1 +phy_chain_rx_polarity_flip_physical{234.0}=0x0 +phy_chain_rx_polarity_flip_physical{235.0}=0x0 +phy_chain_rx_polarity_flip_physical{236.0}=0x0 +phy_chain_rx_polarity_flip_physical{237.0}=0x1 +phy_chain_rx_polarity_flip_physical{238.0}=0x0 +phy_chain_rx_polarity_flip_physical{239.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_polarity_flip_physical{240.0}=0x0 +phy_chain_rx_polarity_flip_physical{241.0}=0x1 +phy_chain_rx_polarity_flip_physical{242.0}=0x0 +phy_chain_rx_polarity_flip_physical{243.0}=0x1 +phy_chain_rx_polarity_flip_physical{244.0}=0x0 +phy_chain_rx_polarity_flip_physical{245.0}=0x1 +phy_chain_rx_polarity_flip_physical{246.0}=0x1 +phy_chain_rx_polarity_flip_physical{247.0}=0x1 +phy_chain_rx_polarity_flip_physical{248.0}=0x0 +phy_chain_rx_polarity_flip_physical{249.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_rx_polarity_flip_physical{250.0}=0x1 +phy_chain_rx_polarity_flip_physical{251.0}=0x0 +phy_chain_rx_polarity_flip_physical{252.0}=0x1 +phy_chain_rx_polarity_flip_physical{253.0}=0x1 +phy_chain_rx_polarity_flip_physical{254.0}=0x0 +phy_chain_rx_polarity_flip_physical{255.0}=0x1 +phy_chain_rx_polarity_flip_physical{256.0}=0x0 +phy_chain_rx_polarity_flip_physical{257.0}=0x0 +phy_chain_rx_polarity_flip_physical{259.0}=0x0 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x1 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{81.0}=0x1 +phy_chain_rx_polarity_flip_physical{82.0}=0x1 +phy_chain_rx_polarity_flip_physical{83.0}=0x0 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x1 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{98.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_lane_map_physical{1.0}=0x2031 +phy_chain_tx_lane_map_physical{101.0}=0x1023 +phy_chain_tx_lane_map_physical{105.0}=0x1302 +phy_chain_tx_lane_map_physical{109.0}=0x0321 +phy_chain_tx_lane_map_physical{113.0}=0x2301 +phy_chain_tx_lane_map_physical{117.0}=0x3120 +phy_chain_tx_lane_map_physical{121.0}=0x3102 +phy_chain_tx_lane_map_physical{125.0}=0x3210 +phy_chain_tx_lane_map_physical{129.0}=0x1023 +phy_chain_tx_lane_map_physical{13.0}=0x3021 +phy_chain_tx_lane_map_physical{133.0}=0x3210 +phy_chain_tx_lane_map_physical{137.0}=0x2031 +phy_chain_tx_lane_map_physical{141.0}=0x1302 +phy_chain_tx_lane_map_physical{145.0}=0x3210 +phy_chain_tx_lane_map_physical{149.0}=0x0213 +phy_chain_tx_lane_map_physical{153.0}=0x3210 +phy_chain_tx_lane_map_physical{157.0}=0x1320 +phy_chain_tx_lane_map_physical{161.0}=0x3210 +phy_chain_tx_lane_map_physical{165.0}=0x0231 +phy_chain_tx_lane_map_physical{169.0}=0x3120 +phy_chain_tx_lane_map_physical{17.0}=0x1032 +phy_chain_tx_lane_map_physical{173.0}=0x0312 +phy_chain_tx_lane_map_physical{177.0}=0x0231 +phy_chain_tx_lane_map_physical{181.0}=0x3210 +phy_chain_tx_lane_map_physical{185.0}=0x3210 +phy_chain_tx_lane_map_physical{189.0}=0x1320 +phy_chain_tx_lane_map_physical{193.0}=0x0321 +phy_chain_tx_lane_map_physical{197.0}=0x3120 +phy_chain_tx_lane_map_physical{201.0}=0x3120 +phy_chain_tx_lane_map_physical{205.0}=0x0123 +phy_chain_tx_lane_map_physical{209.0}=0x3120 +phy_chain_tx_lane_map_physical{21.0}=0x0213 +phy_chain_tx_lane_map_physical{213.0}=0x3021 +phy_chain_tx_lane_map_physical{217.0}=0x0312 +phy_chain_tx_lane_map_physical{221.0}=0x2301 +phy_chain_tx_lane_map_physical{225.0}=0x0123 +phy_chain_tx_lane_map_physical{229.0}=0x2031 +phy_chain_tx_lane_map_physical{233.0}=0x0231 +phy_chain_tx_lane_map_physical{237.0}=0x0213 +phy_chain_tx_lane_map_physical{241.0}=0x1320 +phy_chain_tx_lane_map_physical{245.0}=0x2031 +phy_chain_tx_lane_map_physical{249.0}=0x3120 +phy_chain_tx_lane_map_physical{25.0}=0x0231 +phy_chain_tx_lane_map_physical{253.0}=0x0321 +phy_chain_tx_lane_map_physical{257.0}=0x3210 +phy_chain_tx_lane_map_physical{29.0}=0x1230 +phy_chain_tx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{37.0}=0x0123 +phy_chain_tx_lane_map_physical{41.0}=0x0213 +phy_chain_tx_lane_map_physical{45.0}=0x0132 +phy_chain_tx_lane_map_physical{49.0}=0x2031 +phy_chain_tx_lane_map_physical{5.0}=0x2301 +phy_chain_tx_lane_map_physical{53.0}=0x2301 +phy_chain_tx_lane_map_physical{57.0}=0x2031 +phy_chain_tx_lane_map_physical{61.0}=0x2031 +phy_chain_tx_lane_map_physical{65.0}=0x1230 +phy_chain_tx_lane_map_physical{69.0}=0x2013 +phy_chain_tx_lane_map_physical{73.0}=0x0213 +phy_chain_tx_lane_map_physical{77.0}=0x2310 +phy_chain_tx_lane_map_physical{81.0}=0x0321 +phy_chain_tx_lane_map_physical{85.0}=0x2013 +phy_chain_tx_lane_map_physical{89.0}=0x0213 +phy_chain_tx_lane_map_physical{9.0}=0x3012 +phy_chain_tx_lane_map_physical{93.0}=0x3102 +phy_chain_tx_lane_map_physical{97.0}=0x3210 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x0 +phy_chain_tx_polarity_flip_physical{112.0}=0x1 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x1 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x0 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x1 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_tx_polarity_flip_physical{133.0}=0x1 +phy_chain_tx_polarity_flip_physical{134.0}=0x1 +phy_chain_tx_polarity_flip_physical{135.0}=0x1 +phy_chain_tx_polarity_flip_physical{136.0}=0x1 +phy_chain_tx_polarity_flip_physical{137.0}=0x1 +phy_chain_tx_polarity_flip_physical{138.0}=0x1 +phy_chain_tx_polarity_flip_physical{139.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{140.0}=0x1 +phy_chain_tx_polarity_flip_physical{141.0}=0x0 +phy_chain_tx_polarity_flip_physical{142.0}=0x1 +phy_chain_tx_polarity_flip_physical{143.0}=0x1 +phy_chain_tx_polarity_flip_physical{144.0}=0x1 +phy_chain_tx_polarity_flip_physical{145.0}=0x1 +phy_chain_tx_polarity_flip_physical{146.0}=0x1 +phy_chain_tx_polarity_flip_physical{147.0}=0x1 +phy_chain_tx_polarity_flip_physical{148.0}=0x0 +phy_chain_tx_polarity_flip_physical{149.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{150.0}=0x0 +phy_chain_tx_polarity_flip_physical{151.0}=0x0 +phy_chain_tx_polarity_flip_physical{152.0}=0x0 +phy_chain_tx_polarity_flip_physical{153.0}=0x1 +phy_chain_tx_polarity_flip_physical{154.0}=0x0 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x0 +phy_chain_tx_polarity_flip_physical{157.0}=0x0 +phy_chain_tx_polarity_flip_physical{158.0}=0x0 +phy_chain_tx_polarity_flip_physical{159.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{160.0}=0x0 +phy_chain_tx_polarity_flip_physical{161.0}=0x0 +phy_chain_tx_polarity_flip_physical{162.0}=0x1 +phy_chain_tx_polarity_flip_physical{163.0}=0x1 +phy_chain_tx_polarity_flip_physical{164.0}=0x0 +phy_chain_tx_polarity_flip_physical{165.0}=0x1 +phy_chain_tx_polarity_flip_physical{166.0}=0x1 +phy_chain_tx_polarity_flip_physical{167.0}=0x1 +phy_chain_tx_polarity_flip_physical{168.0}=0x0 +phy_chain_tx_polarity_flip_physical{169.0}=0x0 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{170.0}=0x1 +phy_chain_tx_polarity_flip_physical{171.0}=0x1 +phy_chain_tx_polarity_flip_physical{172.0}=0x1 +phy_chain_tx_polarity_flip_physical{173.0}=0x0 +phy_chain_tx_polarity_flip_physical{174.0}=0x0 +phy_chain_tx_polarity_flip_physical{175.0}=0x1 +phy_chain_tx_polarity_flip_physical{176.0}=0x0 +phy_chain_tx_polarity_flip_physical{177.0}=0x1 +phy_chain_tx_polarity_flip_physical{178.0}=0x0 +phy_chain_tx_polarity_flip_physical{179.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 +phy_chain_tx_polarity_flip_physical{181.0}=0x0 +phy_chain_tx_polarity_flip_physical{182.0}=0x0 +phy_chain_tx_polarity_flip_physical{183.0}=0x0 +phy_chain_tx_polarity_flip_physical{184.0}=0x1 +phy_chain_tx_polarity_flip_physical{185.0}=0x0 +phy_chain_tx_polarity_flip_physical{186.0}=0x1 +phy_chain_tx_polarity_flip_physical{187.0}=0x1 +phy_chain_tx_polarity_flip_physical{188.0}=0x1 +phy_chain_tx_polarity_flip_physical{189.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{190.0}=0x0 +phy_chain_tx_polarity_flip_physical{191.0}=0x0 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 +phy_chain_tx_polarity_flip_physical{193.0}=0x1 +phy_chain_tx_polarity_flip_physical{194.0}=0x1 +phy_chain_tx_polarity_flip_physical{195.0}=0x1 +phy_chain_tx_polarity_flip_physical{196.0}=0x0 +phy_chain_tx_polarity_flip_physical{197.0}=0x0 +phy_chain_tx_polarity_flip_physical{198.0}=0x1 +phy_chain_tx_polarity_flip_physical{199.0}=0x1 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_tx_polarity_flip_physical{200.0}=0x1 +phy_chain_tx_polarity_flip_physical{201.0}=0x1 +phy_chain_tx_polarity_flip_physical{202.0}=0x1 +phy_chain_tx_polarity_flip_physical{203.0}=0x1 +phy_chain_tx_polarity_flip_physical{204.0}=0x1 +phy_chain_tx_polarity_flip_physical{205.0}=0x0 +phy_chain_tx_polarity_flip_physical{206.0}=0x1 +phy_chain_tx_polarity_flip_physical{207.0}=0x1 +phy_chain_tx_polarity_flip_physical{208.0}=0x1 +phy_chain_tx_polarity_flip_physical{209.0}=0x1 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{210.0}=0x1 +phy_chain_tx_polarity_flip_physical{211.0}=0x1 +phy_chain_tx_polarity_flip_physical{212.0}=0x0 +phy_chain_tx_polarity_flip_physical{213.0}=0x0 +phy_chain_tx_polarity_flip_physical{214.0}=0x1 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x1 +phy_chain_tx_polarity_flip_physical{217.0}=0x1 +phy_chain_tx_polarity_flip_physical{218.0}=0x1 +phy_chain_tx_polarity_flip_physical{219.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{220.0}=0x1 +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x0 +phy_chain_tx_polarity_flip_physical{223.0}=0x0 +phy_chain_tx_polarity_flip_physical{224.0}=0x1 +phy_chain_tx_polarity_flip_physical{225.0}=0x1 +phy_chain_tx_polarity_flip_physical{226.0}=0x1 +phy_chain_tx_polarity_flip_physical{227.0}=0x1 +phy_chain_tx_polarity_flip_physical{228.0}=0x0 +phy_chain_tx_polarity_flip_physical{229.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{230.0}=0x1 +phy_chain_tx_polarity_flip_physical{231.0}=0x1 +phy_chain_tx_polarity_flip_physical{232.0}=0x1 +phy_chain_tx_polarity_flip_physical{233.0}=0x0 +phy_chain_tx_polarity_flip_physical{234.0}=0x0 +phy_chain_tx_polarity_flip_physical{235.0}=0x0 +phy_chain_tx_polarity_flip_physical{236.0}=0x0 +phy_chain_tx_polarity_flip_physical{237.0}=0x1 +phy_chain_tx_polarity_flip_physical{238.0}=0x1 +phy_chain_tx_polarity_flip_physical{239.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x0 +phy_chain_tx_polarity_flip_physical{241.0}=0x1 +phy_chain_tx_polarity_flip_physical{242.0}=0x1 +phy_chain_tx_polarity_flip_physical{243.0}=0x1 +phy_chain_tx_polarity_flip_physical{244.0}=0x0 +phy_chain_tx_polarity_flip_physical{245.0}=0x1 +phy_chain_tx_polarity_flip_physical{246.0}=0x1 +phy_chain_tx_polarity_flip_physical{247.0}=0x1 +phy_chain_tx_polarity_flip_physical{248.0}=0x1 +phy_chain_tx_polarity_flip_physical{249.0}=0x1 +phy_chain_tx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{250.0}=0x0 +phy_chain_tx_polarity_flip_physical{251.0}=0x0 +phy_chain_tx_polarity_flip_physical{252.0}=0x0 +phy_chain_tx_polarity_flip_physical{253.0}=0x1 +phy_chain_tx_polarity_flip_physical{254.0}=0x1 +phy_chain_tx_polarity_flip_physical{255.0}=0x1 +phy_chain_tx_polarity_flip_physical{256.0}=0x0 +phy_chain_tx_polarity_flip_physical{257.0}=0x0 +phy_chain_tx_polarity_flip_physical{259.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x0 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 +phy_chain_tx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x1 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x1 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_tx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_tx_polarity_flip_physical{97.0}=0x0 +phy_chain_tx_polarity_flip_physical{98.0}=0x1 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +port_init_autoneg_100=0 +port_init_autoneg_102=0 +port_init_autoneg_103=0 +port_init_autoneg_104=0 +port_init_autoneg_105=0 +port_init_autoneg_106=0 +port_init_autoneg_107=0 +port_init_autoneg_108=0 +port_init_autoneg_109=0 +port_init_autoneg_10=0 +port_init_autoneg_110=0 +port_init_autoneg_111=0 +port_init_autoneg_112=0 +port_init_autoneg_113=0 +port_init_autoneg_114=0 +port_init_autoneg_115=0 +port_init_autoneg_116=0 +port_init_autoneg_117=0 +port_init_autoneg_11=0 +port_init_autoneg_12=0 +port_init_autoneg_13=0 +port_init_autoneg_14=0 +port_init_autoneg_15=0 +port_init_autoneg_16=0 +port_init_autoneg_1=0 +port_init_autoneg_2=0 +port_init_autoneg_34=0 +port_init_autoneg_35=0 +port_init_autoneg_36=0 +port_init_autoneg_37=0 +port_init_autoneg_38=0 +port_init_autoneg_39=0 +port_init_autoneg_3=0 +port_init_autoneg_40=0 +port_init_autoneg_41=0 +port_init_autoneg_42=0 +port_init_autoneg_43=0 +port_init_autoneg_44=0 +port_init_autoneg_45=0 +port_init_autoneg_46=0 +port_init_autoneg_47=0 +port_init_autoneg_48=0 +port_init_autoneg_49=0 +port_init_autoneg_4=0 +port_init_autoneg_5=0 +port_init_autoneg_66=0 +port_init_autoneg_68=0 +port_init_autoneg_69=0 +port_init_autoneg_6=0 +port_init_autoneg_70=0 +port_init_autoneg_71=0 +port_init_autoneg_72=0 +port_init_autoneg_73=0 +port_init_autoneg_74=0 +port_init_autoneg_75=0 +port_init_autoneg_76=0 +port_init_autoneg_77=0 +port_init_autoneg_78=0 +port_init_autoneg_79=0 +port_init_autoneg_7=0 +port_init_autoneg_80=0 +port_init_autoneg_81=0 +port_init_autoneg_82=0 +port_init_autoneg_83=0 +port_init_autoneg_8=0 +port_init_autoneg_9=0 +port_init_cl72_hg=1 +port_phy_addr_100=0xff +port_phy_addr_102=0xff +port_phy_addr_103=0xff +port_phy_addr_104=0xff +port_phy_addr_105=0xff +port_phy_addr_106=0xff +port_phy_addr_107=0xff +port_phy_addr_108=0xff +port_phy_addr_109=0xff +port_phy_addr_10=0xff +port_phy_addr_110=0xff +port_phy_addr_111=0xff +port_phy_addr_112=0xff +port_phy_addr_113=0xff +port_phy_addr_114=0xff +port_phy_addr_115=0xff +port_phy_addr_116=0xff +port_phy_addr_117=0xff +port_phy_addr_11=0xff +port_phy_addr_12=0xff +port_phy_addr_13=0xff +port_phy_addr_14=0xff +port_phy_addr_15=0xff +port_phy_addr_16=0xff +port_phy_addr_1=0xff +port_phy_addr_2=0xff +port_phy_addr_34=0xff +port_phy_addr_35=0xff +port_phy_addr_36=0xff +port_phy_addr_37=0xff +port_phy_addr_38=0xff +port_phy_addr_39=0xff +port_phy_addr_3=0xff +port_phy_addr_40=0xff +port_phy_addr_41=0xff +port_phy_addr_42=0xff +port_phy_addr_43=0xff +port_phy_addr_44=0xff +port_phy_addr_45=0xff +port_phy_addr_46=0xff +port_phy_addr_47=0xff +port_phy_addr_48=0xff +port_phy_addr_49=0xff +port_phy_addr_4=0xff +port_phy_addr_5=0xff +port_phy_addr_66=0xff +port_phy_addr_68=0xff +port_phy_addr_69=0xff +port_phy_addr_6=0xff +port_phy_addr_70=0xff +port_phy_addr_71=0xff +port_phy_addr_72=0xff +port_phy_addr_73=0xff +port_phy_addr_74=0xff +port_phy_addr_75=0xff +port_phy_addr_76=0xff +port_phy_addr_77=0xff +port_phy_addr_78=0xff +port_phy_addr_79=0xff +port_phy_addr_7=0xff +port_phy_addr_80=0xff +port_phy_addr_81=0xff +port_phy_addr_82=0xff +port_phy_addr_83=0xff +port_phy_addr_8=0xff +port_phy_addr_9=0xff +portmap_100=259:10 +portmap_101=262:10 +portmap_102=217:100 +portmap_103=213:100 +portmap_104=229:100 +portmap_105=237:100 +portmap_106=249:100 +portmap_107=245:100 +portmap_108=209:100 +portmap_109=221:100 +portmap_10=29:100 +portmap_110=233:100 +portmap_111=225:100 +portmap_112=241:100 +portmap_113=253:100 +portmap_114=197:100 +portmap_115=205:100 +portmap_116=201:100 +portmap_117=193:100 +portmap_11=41:100 +portmap_12=33:100 +portmap_134=263:10 +portmap_13=57:100 +portmap_14=53:100 +portmap_15=49:100 +portmap_16=61:100 +portmap_1=5:100 +portmap_2=13:100 +portmap_33=260:10 +portmap_34=77:100 +portmap_35=65:100 +portmap_36=85:100 +portmap_37=89:100 +portmap_38=109:100 +portmap_39=97:100 +portmap_3=25:100 +portmap_40=69:100 +portmap_41=73:100 +portmap_42=93:100 +portmap_43=81:100 +portmap_44=101:100 +portmap_45=105:100 +portmap_46=117:100 +portmap_47=121:100 +portmap_48=125:100 +portmap_49=113:100 +portmap_4=21:100 +portmap_5=37:100 +portmap_66=257:10 +portmap_67=261:10 +portmap_68=149:100 +portmap_69=153:100 +portmap_6=45:100 +portmap_70=173:100 +portmap_71=161:100 +portmap_72=181:100 +portmap_73=185:100 +portmap_74=157:100 +portmap_75=145:100 +portmap_76=165:100 +portmap_77=169:100 +portmap_78=189:100 +portmap_79=177:100 +portmap_7=9:100 +portmap_80=141:100 +portmap_81=133:100 +portmap_82=129:100 +portmap_83=137:100 +portmap_8=1:100 +portmap_9=17:100 +robust_hash_disable_egress_vlan=1 +robust_hash_disable_mpls=1 +robust_hash_disable_vlan=1 +stable_size=0x5500000 +stable_size=0x5500000 +tdma_timeout_usec=15000000 +tslam_timeout_usec=15000000 + +# tuning parameters +serdes_preemphasis_1=0x184606 +serdes_preemphasis_2=0x164108 +serdes_preemphasis_3=0x164308 +serdes_preemphasis_4=0x144108 +serdes_preemphasis_5=0x144108 +serdes_preemphasis_6=0x164106 +serdes_preemphasis_7=0x184507 +serdes_preemphasis_8=0x184606 +serdes_preemphasis_9=0x184507 +serdes_preemphasis_10=0x194407 +serdes_preemphasis_11=0x194407 +serdes_preemphasis_12=0x184507 +serdes_preemphasis_13=0x144108 +serdes_preemphasis_14=0x144108 +serdes_preemphasis_15=0x194407 +serdes_preemphasis_16=0x194407 +serdes_preemphasis_34=0x184408 +serdes_preemphasis_35=0x184606 +serdes_preemphasis_36=0x164308 +serdes_preemphasis_37=0x184606 +serdes_preemphasis_38=0x164108 +serdes_preemphasis_39=0x184606 +serdes_preemphasis_40=0xe3206 +serdes_preemphasis_41=0xe3205 +serdes_preemphasis_42=0x103a06 +serdes_preemphasis_43=0xe3205 +serdes_preemphasis_44=0x184606 +serdes_preemphasis_45=0x184507 +serdes_preemphasis_46=0x144108 +serdes_preemphasis_47=0x103a07 +serdes_preemphasis_48=0x194407 +serdes_preemphasis_49=0x194407 +serdes_preemphasis_66=0x43004 +serdes_preemphasis_68=0x164308 +serdes_preemphasis_69=0x164408 +serdes_preemphasis_70=0xe3206 +serdes_preemphasis_71=0xe3205 +serdes_preemphasis_72=0xe3205 +serdes_preemphasis_73=0xe3206 +serdes_preemphasis_74=0x164108 +serdes_preemphasis_75=0x184606 +serdes_preemphasis_76=0x164608 +serdes_preemphasis_77=0x184507 +serdes_preemphasis_78=0x184507 +serdes_preemphasis_79=0x184606 +serdes_preemphasis_80=0x184606 +serdes_preemphasis_81=0x184407 +serdes_preemphasis_82=0x103706 +serdes_preemphasis_83=0x103706 +serdes_preemphasis_100=0x43004 +serdes_preemphasis_102=0x184408 +serdes_preemphasis_103=0x184606 +serdes_preemphasis_104=0x184606 +serdes_preemphasis_105=0x16410a +serdes_preemphasis_106=0x184408 +serdes_preemphasis_107=0x194308 +serdes_preemphasis_108=0x144108 +serdes_preemphasis_109=0x144108 +serdes_preemphasis_110=0x144108 +serdes_preemphasis_111=0x144108 +serdes_preemphasis_112=0x164608 +serdes_preemphasis_113=0x164608 +serdes_preemphasis_114=0x174507 +serdes_preemphasis_115=0x184606 +serdes_preemphasis_116=0x103706 +serdes_preemphasis_117=0x133c06 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/buffers.json.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/buffers.json.j2 new file mode 100644 index 00000000000..e6e9e844469 --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..74579a022dc --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/buffers_defaults_t0.j2 @@ -0,0 +1,54 @@ +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,12) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(20,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(12,20) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "33329088", + "type": "ingress", + "mode": "dynamic", + "xoff": "7827456" + }, + "egress_lossy_pool": { + "size": "26663272", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "42349632", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"44302336" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"42349632" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1664", + "dynamic_th":"-1" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/pg_profile_lookup.ini b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/pg_profile_lookup.ini new file mode 100644 index 00000000000..ed0005610b7 --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/pg_profile_lookup.ini @@ -0,0 +1,8 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 50000 5m 1248 1248 56160 -3 2496 + 100000 5m 1248 1248 96928 -3 2496 + 50000 40m 1248 1248 96096 -3 2496 + 100000 40m 1248 1248 177632 -3 2496 + 50000 300m 1248 1248 141856 -3 2496 + 100000 300m 1248 1248 268736 -3 2496 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/port_config.ini b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/port_config.ini new file mode 100644 index 00000000000..c06fdd581ec --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/port_config.ini @@ -0,0 +1,123 @@ +# name lanes alias index speed +Ethernet0 77,78 Ethernet1/1 1 50000 +Ethernet2 79,80 Ethernet1/3 1 50000 +Ethernet4 65,66 Ethernet2/1 2 50000 +Ethernet6 67,68 Ethernet2/3 2 50000 +Ethernet8 85,86 Ethernet3/1 3 50000 +Ethernet10 87,88 Ethernet3/3 3 50000 +Ethernet12 89,90 Ethernet4/1 4 50000 +Ethernet14 91,92 Ethernet4/3 4 50000 +Ethernet16 109,110 Ethernet5/1 5 50000 +Ethernet18 111,112 Ethernet5/3 5 50000 +Ethernet20 97,98 Ethernet6/1 6 50000 +Ethernet22 99,100 Ethernet6/3 6 50000 +Ethernet24 5,6 Ethernet7/1 7 50000 +Ethernet26 7,8 Ethernet7/3 7 50000 +Ethernet28 13,14 Ethernet8/1 8 50000 +Ethernet30 15,16 Ethernet8/3 8 50000 +Ethernet32 25,26 Ethernet9/1 9 50000 +Ethernet34 27,28 Ethernet9/3 9 50000 +Ethernet36 21,22 Ethernet10/1 10 50000 +Ethernet38 23,24 Ethernet10/3 10 50000 +Ethernet40 37,38 Ethernet11/1 11 50000 +Ethernet42 39,40 Ethernet11/3 11 50000 +Ethernet44 45,46 Ethernet12/1 12 50000 +Ethernet46 47,48 Ethernet12/3 12 50000 +Ethernet48 57,58,59,60 Ethernet13/1 13 100000 +Ethernet52 53,54,55,56 Ethernet14/1 14 100000 +Ethernet56 117,118,119,120 Ethernet15/1 15 100000 +Ethernet60 121,122,123,124 Ethernet16/1 16 100000 +Ethernet64 141,142,143,144 Ethernet17/1 17 100000 +Ethernet68 133,134,135,136 Ethernet18/1 18 100000 +Ethernet72 197,198,199,200 Ethernet19/1 19 100000 +Ethernet76 205,206,207,208 Ethernet20/1 20 100000 +Ethernet80 217,218 Ethernet21/1 21 50000 +Ethernet82 219,220 Ethernet21/3 21 50000 +Ethernet84 213,214 Ethernet22/1 22 50000 +Ethernet86 215,216 Ethernet22/3 22 50000 +Ethernet88 229,230 Ethernet23/1 23 50000 +Ethernet90 231,232 Ethernet23/3 23 50000 +Ethernet92 237,238 Ethernet24/1 24 50000 +Ethernet94 239,240 Ethernet24/3 24 50000 +Ethernet96 249,250 Ethernet25/1 25 50000 +Ethernet98 251,252 Ethernet25/3 25 50000 +Ethernet100 245,246 Ethernet26/1 26 50000 +Ethernet102 247,248 Ethernet26/3 26 50000 +Ethernet104 149,150 Ethernet27/1 27 50000 +Ethernet106 151,152 Ethernet27/3 27 50000 +Ethernet108 153,154 Ethernet28/1 28 50000 +Ethernet110 155,156 Ethernet28/3 28 50000 +Ethernet112 173,174 Ethernet29/1 29 50000 +Ethernet114 175,176 Ethernet29/3 29 50000 +Ethernet116 161,162 Ethernet30/1 30 50000 +Ethernet118 163,164 Ethernet30/3 30 50000 +Ethernet120 181,182 Ethernet31/1 31 50000 +Ethernet122 183,184 Ethernet31/3 31 50000 +Ethernet124 185,186 Ethernet32/1 32 50000 +Ethernet126 187,188 Ethernet32/3 32 50000 +Ethernet128 69,70 Ethernet33/1 33 50000 +Ethernet130 71,72 Ethernet33/3 33 50000 +Ethernet132 73,74 Ethernet34/1 34 50000 +Ethernet134 75,76 Ethernet34/3 34 50000 +Ethernet136 93,94 Ethernet35/1 35 50000 +Ethernet138 95,96 Ethernet35/3 35 50000 +Ethernet140 81,82 Ethernet36/1 36 50000 +Ethernet142 83,84 Ethernet36/3 36 50000 +Ethernet144 101,102 Ethernet37/1 37 50000 +Ethernet146 103,104 Ethernet37/3 37 50000 +Ethernet148 105,106 Ethernet38/1 38 50000 +Ethernet150 107,108 Ethernet38/3 38 50000 +Ethernet152 9,10 Ethernet39/1 39 50000 +Ethernet154 11,12 Ethernet39/3 39 50000 +Ethernet156 1,2 Ethernet40/1 40 50000 +Ethernet158 3,4 Ethernet40/3 40 50000 +Ethernet160 17,18 Ethernet41/1 41 50000 +Ethernet162 19,20 Ethernet41/3 41 50000 +Ethernet164 29,30 Ethernet42/1 42 50000 +Ethernet166 31,32 Ethernet42/3 42 50000 +Ethernet168 41,42 Ethernet43/1 43 50000 +Ethernet170 43,44 Ethernet43/3 43 50000 +Ethernet172 33,34 Ethernet44/1 44 50000 +Ethernet174 35,36 Ethernet44/3 44 50000 +Ethernet176 49,50 Ethernet45/1 45 50000 +Ethernet178 51,52 Ethernet45/3 45 50000 +Ethernet180 61,62 Ethernet46/1 46 50000 +Ethernet182 63,64 Ethernet46/3 46 50000 +Ethernet184 125,126 Ethernet47/1 47 50000 +Ethernet186 127,128 Ethernet47/3 47 50000 +Ethernet188 113,114 Ethernet48/1 48 50000 +Ethernet190 115,116 Ethernet48/3 48 50000 +Ethernet192 129,130 Ethernet49/1 49 50000 +Ethernet194 131,132 Ethernet49/3 49 50000 +Ethernet196 137,138 Ethernet50/1 50 50000 +Ethernet198 139,140 Ethernet50/3 50 50000 +Ethernet200 201,202 Ethernet51/1 51 50000 +Ethernet202 203,204 Ethernet51/3 51 50000 +Ethernet204 193,194 Ethernet52/1 52 50000 +Ethernet206 195,196 Ethernet52/3 52 50000 +Ethernet208 209,210 Ethernet53/1 53 50000 +Ethernet210 211,212 Ethernet53/3 53 50000 +Ethernet212 221,222 Ethernet54/1 54 50000 +Ethernet214 223,224 Ethernet54/3 54 50000 +Ethernet216 233,234 Ethernet55/1 55 50000 +Ethernet218 235,236 Ethernet55/3 55 50000 +Ethernet220 225,226 Ethernet56/1 56 50000 +Ethernet222 227,228 Ethernet56/3 56 50000 +Ethernet224 241,242 Ethernet57/1 57 50000 +Ethernet226 243,244 Ethernet57/3 57 50000 +Ethernet228 253,254 Ethernet58/1 58 50000 +Ethernet230 255,256 Ethernet58/3 58 50000 +Ethernet232 157,158 Ethernet59/1 59 50000 +Ethernet234 159,160 Ethernet59/3 59 50000 +Ethernet236 145,146 Ethernet60/1 60 50000 +Ethernet238 147,148 Ethernet60/3 60 50000 +Ethernet240 165,166 Ethernet61/1 61 50000 +Ethernet242 167,168 Ethernet61/3 61 50000 +Ethernet244 169,170 Ethernet62/1 62 50000 +Ethernet246 171,172 Ethernet62/3 62 50000 +Ethernet248 189,190 Ethernet63/1 63 50000 +Ethernet250 191,192 Ethernet63/3 63 50000 +Ethernet252 177,178 Ethernet64/1 64 50000 +Ethernet254 179,180 Ethernet64/3 64 50000 +Ethernet256 257 Ethernet65 65 10000 +Ethernet260 259 Ethernet66 66 10000 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/qos.json.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/sai.profile b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/sai.profile new file mode 100644 index 00000000000..235f2423df8 --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-a7260cx3-64-112x50G+8x100G.config.bcm diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/th2-a7260cx3-64-112x50G+8x100G.config.bcm b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/th2-a7260cx3-64-112x50G+8x100G.config.bcm new file mode 100644 index 00000000000..3c2a343bf04 --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/th2-a7260cx3-64-112x50G+8x100G.config.bcm @@ -0,0 +1,936 @@ +PHY_AN_ALLOW_PLL_CHANGE=1 +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=8 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +core_clock_frequency=1700 +dma_desc_timeout_usec=15000000 +dpp_clock_ratio=2:3 +higig2_hdr_mode=1 +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +l2xmsg_mode=1 +max_vp_lags=0 +mem_scan_enable=1 +miim_intr_enable=0 +module_64ports=1 +os=unix +oversubscribe_mode=1 +pbmp_xport_xe=0xfffffffd3fffffff4fffffffc7ffffffe +#pbmp_xport_xe=0x47fffffff1fffffffcfffffffe7ffffffe +phy_an_allow_pll_change_hg=0 +phy_an_c73=1 +phy_chain_rx_lane_map_physical{1.0}=0x3210 +phy_chain_rx_lane_map_physical{101.0}=0x0123 +phy_chain_rx_lane_map_physical{105.0}=0x0123 +phy_chain_rx_lane_map_physical{109.0}=0x0123 +phy_chain_rx_lane_map_physical{113.0}=0x2301 +phy_chain_rx_lane_map_physical{117.0}=0x3210 +phy_chain_rx_lane_map_physical{121.0}=0x3210 +phy_chain_rx_lane_map_physical{125.0}=0x1203 +phy_chain_rx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_lane_map_physical{13.0}=0x0321 +phy_chain_rx_lane_map_physical{133.0}=0x1032 +phy_chain_rx_lane_map_physical{137.0}=0x3210 +phy_chain_rx_lane_map_physical{141.0}=0x0123 +phy_chain_rx_lane_map_physical{145.0}=0x3210 +phy_chain_rx_lane_map_physical{149.0}=0x2310 +phy_chain_rx_lane_map_physical{153.0}=0x0132 +phy_chain_rx_lane_map_physical{157.0}=0x1302 +phy_chain_rx_lane_map_physical{161.0}=0x3021 +phy_chain_rx_lane_map_physical{165.0}=0x2031 +phy_chain_rx_lane_map_physical{169.0}=0x2031 +phy_chain_rx_lane_map_physical{17.0}=0x3210 +phy_chain_rx_lane_map_physical{173.0}=0x1302 +phy_chain_rx_lane_map_physical{177.0}=0x2031 +phy_chain_rx_lane_map_physical{181.0}=0x0213 +phy_chain_rx_lane_map_physical{185.0}=0x0213 +phy_chain_rx_lane_map_physical{189.0}=0x1302 +phy_chain_rx_lane_map_physical{193.0}=0x3120 +phy_chain_rx_lane_map_physical{197.0}=0x0231 +phy_chain_rx_lane_map_physical{201.0}=0x2031 +phy_chain_rx_lane_map_physical{205.0}=0x0213 +phy_chain_rx_lane_map_physical{209.0}=0x2013 +phy_chain_rx_lane_map_physical{21.0}=0x3021 +phy_chain_rx_lane_map_physical{213.0}=0x3021 +phy_chain_rx_lane_map_physical{217.0}=0x0231 +phy_chain_rx_lane_map_physical{221.0}=0x2031 +phy_chain_rx_lane_map_physical{225.0}=0x1203 +phy_chain_rx_lane_map_physical{229.0}=0x1230 +phy_chain_rx_lane_map_physical{233.0}=0x3021 +phy_chain_rx_lane_map_physical{237.0}=0x1032 +phy_chain_rx_lane_map_physical{241.0}=0x2301 +phy_chain_rx_lane_map_physical{245.0}=0x0321 +phy_chain_rx_lane_map_physical{249.0}=0x2301 +phy_chain_rx_lane_map_physical{25.0}=0x2301 +phy_chain_rx_lane_map_physical{253.0}=0x2301 +phy_chain_rx_lane_map_physical{257.0}=0x3210 +phy_chain_rx_lane_map_physical{29.0}=0x3021 +phy_chain_rx_lane_map_physical{33.0}=0x1302 +phy_chain_rx_lane_map_physical{37.0}=0x2031 +phy_chain_rx_lane_map_physical{41.0}=0x3021 +phy_chain_rx_lane_map_physical{45.0}=0x1023 +phy_chain_rx_lane_map_physical{49.0}=0x0213 +phy_chain_rx_lane_map_physical{5.0}=0x3201 +phy_chain_rx_lane_map_physical{53.0}=0x3201 +phy_chain_rx_lane_map_physical{57.0}=0x2013 +phy_chain_rx_lane_map_physical{61.0}=0x0213 +phy_chain_rx_lane_map_physical{65.0}=0x1203 +phy_chain_rx_lane_map_physical{69.0}=0x0213 +phy_chain_rx_lane_map_physical{73.0}=0x0213 +phy_chain_rx_lane_map_physical{77.0}=0x3120 +phy_chain_rx_lane_map_physical{81.0}=0x0213 +phy_chain_rx_lane_map_physical{85.0}=0x2031 +phy_chain_rx_lane_map_physical{89.0}=0x2031 +phy_chain_rx_lane_map_physical{9.0}=0x0321 +phy_chain_rx_lane_map_physical{93.0}=0x3120 +phy_chain_rx_lane_map_physical{97.0}=0x1203 +phy_chain_rx_polarity_flip_physical{1.0}=0x1 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 +phy_chain_rx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x1 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{117.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x1 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_rx_polarity_flip_physical{130.0}=0x1 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{133.0}=0x1 +phy_chain_rx_polarity_flip_physical{134.0}=0x1 +phy_chain_rx_polarity_flip_physical{135.0}=0x1 +phy_chain_rx_polarity_flip_physical{136.0}=0x0 +phy_chain_rx_polarity_flip_physical{137.0}=0x0 +phy_chain_rx_polarity_flip_physical{138.0}=0x0 +phy_chain_rx_polarity_flip_physical{139.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{140.0}=0x0 +phy_chain_rx_polarity_flip_physical{141.0}=0x1 +phy_chain_rx_polarity_flip_physical{142.0}=0x0 +phy_chain_rx_polarity_flip_physical{143.0}=0x1 +phy_chain_rx_polarity_flip_physical{144.0}=0x0 +phy_chain_rx_polarity_flip_physical{145.0}=0x1 +phy_chain_rx_polarity_flip_physical{146.0}=0x0 +phy_chain_rx_polarity_flip_physical{147.0}=0x1 +phy_chain_rx_polarity_flip_physical{148.0}=0x0 +phy_chain_rx_polarity_flip_physical{149.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{150.0}=0x1 +phy_chain_rx_polarity_flip_physical{151.0}=0x1 +phy_chain_rx_polarity_flip_physical{152.0}=0x0 +phy_chain_rx_polarity_flip_physical{153.0}=0x0 +phy_chain_rx_polarity_flip_physical{154.0}=0x1 +phy_chain_rx_polarity_flip_physical{155.0}=0x1 +phy_chain_rx_polarity_flip_physical{156.0}=0x0 +phy_chain_rx_polarity_flip_physical{157.0}=0x0 +phy_chain_rx_polarity_flip_physical{158.0}=0x0 +phy_chain_rx_polarity_flip_physical{159.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 +phy_chain_rx_polarity_flip_physical{161.0}=0x1 +phy_chain_rx_polarity_flip_physical{162.0}=0x1 +phy_chain_rx_polarity_flip_physical{163.0}=0x0 +phy_chain_rx_polarity_flip_physical{164.0}=0x1 +phy_chain_rx_polarity_flip_physical{165.0}=0x0 +phy_chain_rx_polarity_flip_physical{166.0}=0x0 +phy_chain_rx_polarity_flip_physical{167.0}=0x1 +phy_chain_rx_polarity_flip_physical{168.0}=0x1 +phy_chain_rx_polarity_flip_physical{169.0}=0x1 +phy_chain_rx_polarity_flip_physical{17.0}=0x1 +phy_chain_rx_polarity_flip_physical{170.0}=0x1 +phy_chain_rx_polarity_flip_physical{171.0}=0x0 +phy_chain_rx_polarity_flip_physical{172.0}=0x0 +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x0 +phy_chain_rx_polarity_flip_physical{175.0}=0x1 +phy_chain_rx_polarity_flip_physical{176.0}=0x1 +phy_chain_rx_polarity_flip_physical{177.0}=0x1 +phy_chain_rx_polarity_flip_physical{178.0}=0x1 +phy_chain_rx_polarity_flip_physical{179.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x0 +phy_chain_rx_polarity_flip_physical{181.0}=0x1 +phy_chain_rx_polarity_flip_physical{182.0}=0x1 +phy_chain_rx_polarity_flip_physical{183.0}=0x0 +phy_chain_rx_polarity_flip_physical{184.0}=0x0 +phy_chain_rx_polarity_flip_physical{185.0}=0x0 +phy_chain_rx_polarity_flip_physical{186.0}=0x0 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x1 +phy_chain_rx_polarity_flip_physical{189.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_rx_polarity_flip_physical{190.0}=0x0 +phy_chain_rx_polarity_flip_physical{191.0}=0x1 +phy_chain_rx_polarity_flip_physical{192.0}=0x0 +phy_chain_rx_polarity_flip_physical{193.0}=0x0 +phy_chain_rx_polarity_flip_physical{194.0}=0x0 +phy_chain_rx_polarity_flip_physical{195.0}=0x1 +phy_chain_rx_polarity_flip_physical{196.0}=0x1 +phy_chain_rx_polarity_flip_physical{197.0}=0x1 +phy_chain_rx_polarity_flip_physical{198.0}=0x1 +phy_chain_rx_polarity_flip_physical{199.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x0 +phy_chain_rx_polarity_flip_physical{201.0}=0x0 +phy_chain_rx_polarity_flip_physical{202.0}=0x0 +phy_chain_rx_polarity_flip_physical{203.0}=0x1 +phy_chain_rx_polarity_flip_physical{204.0}=0x0 +phy_chain_rx_polarity_flip_physical{205.0}=0x1 +phy_chain_rx_polarity_flip_physical{206.0}=0x1 +phy_chain_rx_polarity_flip_physical{207.0}=0x0 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 +phy_chain_rx_polarity_flip_physical{209.0}=0x1 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{210.0}=0x1 +phy_chain_rx_polarity_flip_physical{211.0}=0x0 +phy_chain_rx_polarity_flip_physical{212.0}=0x0 +phy_chain_rx_polarity_flip_physical{213.0}=0x0 +phy_chain_rx_polarity_flip_physical{214.0}=0x0 +phy_chain_rx_polarity_flip_physical{215.0}=0x1 +phy_chain_rx_polarity_flip_physical{216.0}=0x0 +phy_chain_rx_polarity_flip_physical{217.0}=0x0 +phy_chain_rx_polarity_flip_physical{218.0}=0x0 +phy_chain_rx_polarity_flip_physical{219.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{220.0}=0x1 +phy_chain_rx_polarity_flip_physical{221.0}=0x0 +phy_chain_rx_polarity_flip_physical{222.0}=0x0 +phy_chain_rx_polarity_flip_physical{223.0}=0x1 +phy_chain_rx_polarity_flip_physical{224.0}=0x1 +phy_chain_rx_polarity_flip_physical{225.0}=0x1 +phy_chain_rx_polarity_flip_physical{226.0}=0x0 +phy_chain_rx_polarity_flip_physical{227.0}=0x0 +phy_chain_rx_polarity_flip_physical{228.0}=0x1 +phy_chain_rx_polarity_flip_physical{229.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{230.0}=0x0 +phy_chain_rx_polarity_flip_physical{231.0}=0x1 +phy_chain_rx_polarity_flip_physical{232.0}=0x1 +phy_chain_rx_polarity_flip_physical{233.0}=0x1 +phy_chain_rx_polarity_flip_physical{234.0}=0x0 +phy_chain_rx_polarity_flip_physical{235.0}=0x0 +phy_chain_rx_polarity_flip_physical{236.0}=0x0 +phy_chain_rx_polarity_flip_physical{237.0}=0x1 +phy_chain_rx_polarity_flip_physical{238.0}=0x0 +phy_chain_rx_polarity_flip_physical{239.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_polarity_flip_physical{240.0}=0x0 +phy_chain_rx_polarity_flip_physical{241.0}=0x1 +phy_chain_rx_polarity_flip_physical{242.0}=0x0 +phy_chain_rx_polarity_flip_physical{243.0}=0x1 +phy_chain_rx_polarity_flip_physical{244.0}=0x0 +phy_chain_rx_polarity_flip_physical{245.0}=0x1 +phy_chain_rx_polarity_flip_physical{246.0}=0x1 +phy_chain_rx_polarity_flip_physical{247.0}=0x1 +phy_chain_rx_polarity_flip_physical{248.0}=0x0 +phy_chain_rx_polarity_flip_physical{249.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_rx_polarity_flip_physical{250.0}=0x1 +phy_chain_rx_polarity_flip_physical{251.0}=0x0 +phy_chain_rx_polarity_flip_physical{252.0}=0x1 +phy_chain_rx_polarity_flip_physical{253.0}=0x1 +phy_chain_rx_polarity_flip_physical{254.0}=0x0 +phy_chain_rx_polarity_flip_physical{255.0}=0x1 +phy_chain_rx_polarity_flip_physical{256.0}=0x0 +phy_chain_rx_polarity_flip_physical{257.0}=0x0 +phy_chain_rx_polarity_flip_physical{259.0}=0x0 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x1 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{81.0}=0x1 +phy_chain_rx_polarity_flip_physical{82.0}=0x1 +phy_chain_rx_polarity_flip_physical{83.0}=0x0 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x1 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{98.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_lane_map_physical{1.0}=0x2031 +phy_chain_tx_lane_map_physical{101.0}=0x1023 +phy_chain_tx_lane_map_physical{105.0}=0x1302 +phy_chain_tx_lane_map_physical{109.0}=0x0321 +phy_chain_tx_lane_map_physical{113.0}=0x2301 +phy_chain_tx_lane_map_physical{117.0}=0x3120 +phy_chain_tx_lane_map_physical{121.0}=0x3102 +phy_chain_tx_lane_map_physical{125.0}=0x3210 +phy_chain_tx_lane_map_physical{129.0}=0x1023 +phy_chain_tx_lane_map_physical{13.0}=0x3021 +phy_chain_tx_lane_map_physical{133.0}=0x3210 +phy_chain_tx_lane_map_physical{137.0}=0x2031 +phy_chain_tx_lane_map_physical{141.0}=0x1302 +phy_chain_tx_lane_map_physical{145.0}=0x3210 +phy_chain_tx_lane_map_physical{149.0}=0x0213 +phy_chain_tx_lane_map_physical{153.0}=0x3210 +phy_chain_tx_lane_map_physical{157.0}=0x1320 +phy_chain_tx_lane_map_physical{161.0}=0x3210 +phy_chain_tx_lane_map_physical{165.0}=0x0231 +phy_chain_tx_lane_map_physical{169.0}=0x3120 +phy_chain_tx_lane_map_physical{17.0}=0x1032 +phy_chain_tx_lane_map_physical{173.0}=0x0312 +phy_chain_tx_lane_map_physical{177.0}=0x0231 +phy_chain_tx_lane_map_physical{181.0}=0x3210 +phy_chain_tx_lane_map_physical{185.0}=0x3210 +phy_chain_tx_lane_map_physical{189.0}=0x1320 +phy_chain_tx_lane_map_physical{193.0}=0x0321 +phy_chain_tx_lane_map_physical{197.0}=0x3120 +phy_chain_tx_lane_map_physical{201.0}=0x3120 +phy_chain_tx_lane_map_physical{205.0}=0x0123 +phy_chain_tx_lane_map_physical{209.0}=0x3120 +phy_chain_tx_lane_map_physical{21.0}=0x0213 +phy_chain_tx_lane_map_physical{213.0}=0x3021 +phy_chain_tx_lane_map_physical{217.0}=0x0312 +phy_chain_tx_lane_map_physical{221.0}=0x2301 +phy_chain_tx_lane_map_physical{225.0}=0x0123 +phy_chain_tx_lane_map_physical{229.0}=0x2031 +phy_chain_tx_lane_map_physical{233.0}=0x0231 +phy_chain_tx_lane_map_physical{237.0}=0x0213 +phy_chain_tx_lane_map_physical{241.0}=0x1320 +phy_chain_tx_lane_map_physical{245.0}=0x2031 +phy_chain_tx_lane_map_physical{249.0}=0x3120 +phy_chain_tx_lane_map_physical{25.0}=0x0231 +phy_chain_tx_lane_map_physical{253.0}=0x0321 +phy_chain_tx_lane_map_physical{257.0}=0x3210 +phy_chain_tx_lane_map_physical{29.0}=0x1230 +phy_chain_tx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{37.0}=0x0123 +phy_chain_tx_lane_map_physical{41.0}=0x0213 +phy_chain_tx_lane_map_physical{45.0}=0x0132 +phy_chain_tx_lane_map_physical{49.0}=0x2031 +phy_chain_tx_lane_map_physical{5.0}=0x2301 +phy_chain_tx_lane_map_physical{53.0}=0x2301 +phy_chain_tx_lane_map_physical{57.0}=0x2031 +phy_chain_tx_lane_map_physical{61.0}=0x2031 +phy_chain_tx_lane_map_physical{65.0}=0x1230 +phy_chain_tx_lane_map_physical{69.0}=0x2013 +phy_chain_tx_lane_map_physical{73.0}=0x0213 +phy_chain_tx_lane_map_physical{77.0}=0x2310 +phy_chain_tx_lane_map_physical{81.0}=0x0321 +phy_chain_tx_lane_map_physical{85.0}=0x2013 +phy_chain_tx_lane_map_physical{89.0}=0x0213 +phy_chain_tx_lane_map_physical{9.0}=0x3012 +phy_chain_tx_lane_map_physical{93.0}=0x3102 +phy_chain_tx_lane_map_physical{97.0}=0x3210 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x0 +phy_chain_tx_polarity_flip_physical{112.0}=0x1 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x1 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x0 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x1 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_tx_polarity_flip_physical{133.0}=0x1 +phy_chain_tx_polarity_flip_physical{134.0}=0x1 +phy_chain_tx_polarity_flip_physical{135.0}=0x1 +phy_chain_tx_polarity_flip_physical{136.0}=0x1 +phy_chain_tx_polarity_flip_physical{137.0}=0x1 +phy_chain_tx_polarity_flip_physical{138.0}=0x1 +phy_chain_tx_polarity_flip_physical{139.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{140.0}=0x1 +phy_chain_tx_polarity_flip_physical{141.0}=0x0 +phy_chain_tx_polarity_flip_physical{142.0}=0x1 +phy_chain_tx_polarity_flip_physical{143.0}=0x1 +phy_chain_tx_polarity_flip_physical{144.0}=0x1 +phy_chain_tx_polarity_flip_physical{145.0}=0x1 +phy_chain_tx_polarity_flip_physical{146.0}=0x1 +phy_chain_tx_polarity_flip_physical{147.0}=0x1 +phy_chain_tx_polarity_flip_physical{148.0}=0x0 +phy_chain_tx_polarity_flip_physical{149.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{150.0}=0x0 +phy_chain_tx_polarity_flip_physical{151.0}=0x0 +phy_chain_tx_polarity_flip_physical{152.0}=0x0 +phy_chain_tx_polarity_flip_physical{153.0}=0x1 +phy_chain_tx_polarity_flip_physical{154.0}=0x0 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x0 +phy_chain_tx_polarity_flip_physical{157.0}=0x0 +phy_chain_tx_polarity_flip_physical{158.0}=0x0 +phy_chain_tx_polarity_flip_physical{159.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{160.0}=0x0 +phy_chain_tx_polarity_flip_physical{161.0}=0x0 +phy_chain_tx_polarity_flip_physical{162.0}=0x1 +phy_chain_tx_polarity_flip_physical{163.0}=0x1 +phy_chain_tx_polarity_flip_physical{164.0}=0x0 +phy_chain_tx_polarity_flip_physical{165.0}=0x1 +phy_chain_tx_polarity_flip_physical{166.0}=0x1 +phy_chain_tx_polarity_flip_physical{167.0}=0x1 +phy_chain_tx_polarity_flip_physical{168.0}=0x0 +phy_chain_tx_polarity_flip_physical{169.0}=0x0 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{170.0}=0x1 +phy_chain_tx_polarity_flip_physical{171.0}=0x1 +phy_chain_tx_polarity_flip_physical{172.0}=0x1 +phy_chain_tx_polarity_flip_physical{173.0}=0x0 +phy_chain_tx_polarity_flip_physical{174.0}=0x0 +phy_chain_tx_polarity_flip_physical{175.0}=0x1 +phy_chain_tx_polarity_flip_physical{176.0}=0x0 +phy_chain_tx_polarity_flip_physical{177.0}=0x1 +phy_chain_tx_polarity_flip_physical{178.0}=0x0 +phy_chain_tx_polarity_flip_physical{179.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 +phy_chain_tx_polarity_flip_physical{181.0}=0x0 +phy_chain_tx_polarity_flip_physical{182.0}=0x0 +phy_chain_tx_polarity_flip_physical{183.0}=0x0 +phy_chain_tx_polarity_flip_physical{184.0}=0x1 +phy_chain_tx_polarity_flip_physical{185.0}=0x0 +phy_chain_tx_polarity_flip_physical{186.0}=0x1 +phy_chain_tx_polarity_flip_physical{187.0}=0x1 +phy_chain_tx_polarity_flip_physical{188.0}=0x1 +phy_chain_tx_polarity_flip_physical{189.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{190.0}=0x0 +phy_chain_tx_polarity_flip_physical{191.0}=0x0 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 +phy_chain_tx_polarity_flip_physical{193.0}=0x1 +phy_chain_tx_polarity_flip_physical{194.0}=0x1 +phy_chain_tx_polarity_flip_physical{195.0}=0x1 +phy_chain_tx_polarity_flip_physical{196.0}=0x0 +phy_chain_tx_polarity_flip_physical{197.0}=0x0 +phy_chain_tx_polarity_flip_physical{198.0}=0x1 +phy_chain_tx_polarity_flip_physical{199.0}=0x1 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_tx_polarity_flip_physical{200.0}=0x1 +phy_chain_tx_polarity_flip_physical{201.0}=0x1 +phy_chain_tx_polarity_flip_physical{202.0}=0x1 +phy_chain_tx_polarity_flip_physical{203.0}=0x1 +phy_chain_tx_polarity_flip_physical{204.0}=0x1 +phy_chain_tx_polarity_flip_physical{205.0}=0x0 +phy_chain_tx_polarity_flip_physical{206.0}=0x1 +phy_chain_tx_polarity_flip_physical{207.0}=0x1 +phy_chain_tx_polarity_flip_physical{208.0}=0x1 +phy_chain_tx_polarity_flip_physical{209.0}=0x1 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{210.0}=0x1 +phy_chain_tx_polarity_flip_physical{211.0}=0x1 +phy_chain_tx_polarity_flip_physical{212.0}=0x0 +phy_chain_tx_polarity_flip_physical{213.0}=0x0 +phy_chain_tx_polarity_flip_physical{214.0}=0x1 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x1 +phy_chain_tx_polarity_flip_physical{217.0}=0x1 +phy_chain_tx_polarity_flip_physical{218.0}=0x1 +phy_chain_tx_polarity_flip_physical{219.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{220.0}=0x1 +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x0 +phy_chain_tx_polarity_flip_physical{223.0}=0x0 +phy_chain_tx_polarity_flip_physical{224.0}=0x1 +phy_chain_tx_polarity_flip_physical{225.0}=0x1 +phy_chain_tx_polarity_flip_physical{226.0}=0x1 +phy_chain_tx_polarity_flip_physical{227.0}=0x1 +phy_chain_tx_polarity_flip_physical{228.0}=0x0 +phy_chain_tx_polarity_flip_physical{229.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{230.0}=0x1 +phy_chain_tx_polarity_flip_physical{231.0}=0x1 +phy_chain_tx_polarity_flip_physical{232.0}=0x1 +phy_chain_tx_polarity_flip_physical{233.0}=0x0 +phy_chain_tx_polarity_flip_physical{234.0}=0x0 +phy_chain_tx_polarity_flip_physical{235.0}=0x0 +phy_chain_tx_polarity_flip_physical{236.0}=0x0 +phy_chain_tx_polarity_flip_physical{237.0}=0x1 +phy_chain_tx_polarity_flip_physical{238.0}=0x1 +phy_chain_tx_polarity_flip_physical{239.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x0 +phy_chain_tx_polarity_flip_physical{241.0}=0x1 +phy_chain_tx_polarity_flip_physical{242.0}=0x1 +phy_chain_tx_polarity_flip_physical{243.0}=0x1 +phy_chain_tx_polarity_flip_physical{244.0}=0x0 +phy_chain_tx_polarity_flip_physical{245.0}=0x1 +phy_chain_tx_polarity_flip_physical{246.0}=0x1 +phy_chain_tx_polarity_flip_physical{247.0}=0x1 +phy_chain_tx_polarity_flip_physical{248.0}=0x1 +phy_chain_tx_polarity_flip_physical{249.0}=0x1 +phy_chain_tx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{250.0}=0x0 +phy_chain_tx_polarity_flip_physical{251.0}=0x0 +phy_chain_tx_polarity_flip_physical{252.0}=0x0 +phy_chain_tx_polarity_flip_physical{253.0}=0x1 +phy_chain_tx_polarity_flip_physical{254.0}=0x1 +phy_chain_tx_polarity_flip_physical{255.0}=0x1 +phy_chain_tx_polarity_flip_physical{256.0}=0x0 +phy_chain_tx_polarity_flip_physical{257.0}=0x0 +phy_chain_tx_polarity_flip_physical{259.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x0 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 +phy_chain_tx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x1 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x1 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_tx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_tx_polarity_flip_physical{97.0}=0x0 +phy_chain_tx_polarity_flip_physical{98.0}=0x1 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 + +port_init_cl72_hg=1 + + + + + + + +robust_hash_disable_egress_vlan=1 +robust_hash_disable_mpls=1 +robust_hash_disable_vlan=1 +stable_size=0x5500000 +stable_size=0x5500000 +tdma_timeout_usec=15000000 +tslam_timeout_usec=15000000 +dport_map_direct=1 +portmap_1=5:50 +portmap_2=7:50 +portmap_3=13:50 +portmap_4=15:50 +portmap_5=25:50 +portmap_6=27:50 +portmap_7=21:50 +portmap_8=23:50 +portmap_9=37:50 +portmap_10=39:50 +portmap_11=45:50 +portmap_12=47:50 +portmap_13=57:100 +portmap_14=53:100 +portmap_15=9:50 +portmap_16=11:50 +portmap_17=1:50 +portmap_18=3:50 +portmap_19=17:50 +portmap_20=19:50 +portmap_21=29:50 +portmap_22=31:50 +portmap_23=41:50 +portmap_24=43:50 +portmap_25=33:50 +portmap_26=35:50 +portmap_27=49:50 +portmap_28=51:50 +portmap_29=61:50 +portmap_30=63:50 +portmap_34=77:50 +portmap_35=79:50 +portmap_36=65:50 +portmap_37=67:50 +portmap_38=85:50 +portmap_39=87:50 +portmap_40=89:50 +portmap_41=91:50 +portmap_42=109:50 +portmap_43=111:50 +portmap_44=97:50 +portmap_45=99:50 +portmap_46=117:100 +portmap_47=121:100 +portmap_48=69:50 +portmap_49=71:50 +portmap_50=73:50 +portmap_51=75:50 +portmap_52=93:50 +portmap_53=95:50 +portmap_54=81:50 +portmap_55=83:50 +portmap_56=101:50 +portmap_57=103:50 +portmap_58=105:50 +portmap_59=107:50 +portmap_60=125:50 +portmap_61=127:50 +portmap_62=113:50 +portmap_63=115:50 +portmap_66=257:10 +portmap_68=141:100 +portmap_69=133:100 +portmap_70=149:50 +portmap_71=151:50 +portmap_72=153:50 +portmap_73=155:50 +portmap_74=173:50 +portmap_75=175:50 +portmap_76=161:50 +portmap_77=163:50 +portmap_78=181:50 +portmap_79=183:50 +portmap_80=185:50 +portmap_81=187:50 +portmap_82=129:50 +portmap_83=131:50 +portmap_84=137:50 +portmap_85=139:50 +portmap_86=157:50 +portmap_87=159:50 +portmap_88=145:50 +portmap_89=147:50 +portmap_90=165:50 +portmap_91=167:50 +portmap_92=169:50 +portmap_93=171:50 +portmap_94=189:50 +portmap_95=191:50 +portmap_96=177:50 +portmap_97=179:50 +portmap_100=259:10 +portmap_102=197:100 +portmap_103=205:100 +portmap_104=217:50 +portmap_105=219:50 +portmap_106=213:50 +portmap_107=215:50 +portmap_108=229:50 +portmap_109=231:50 +portmap_110=237:50 +portmap_111=239:50 +portmap_112=249:50 +portmap_113=251:50 +portmap_114=245:50 +portmap_115=247:50 +portmap_116=201:50 +portmap_117=203:50 +portmap_118=193:50 +portmap_119=195:50 +portmap_120=209:50 +portmap_121=211:50 +portmap_122=221:50 +portmap_123=223:50 +portmap_124=233:50 +portmap_125=235:50 +portmap_126=225:50 +portmap_127=227:50 +portmap_128=241:50 +portmap_129=243:50 +portmap_130=253:50 +portmap_131=255:50 + +# tuning parameters +serdes_preemphasis_1=0x580c +serdes_preemphasis_2=0x580c +serdes_preemphasis_3=0x580c +serdes_preemphasis_4=0x580c +serdes_preemphasis_5=0x580c +serdes_preemphasis_6=0x580c +serdes_preemphasis_7=0x580c +serdes_preemphasis_8=0x580c +serdes_preemphasis_9=0x580c +serdes_preemphasis_10=0x580c +serdes_preemphasis_11=0x580c +serdes_preemphasis_12=0x580c +serdes_preemphasis_13=0x144108 +serdes_preemphasis_14=0x144108 +serdes_preemphasis_15=0x580c +serdes_preemphasis_16=0x580c +serdes_preemphasis_17=0x580c +serdes_preemphasis_18=0x580c +serdes_preemphasis_19=0x580c +serdes_preemphasis_20=0x580c +serdes_preemphasis_21=0x580c +serdes_preemphasis_22=0x580c +serdes_preemphasis_23=0x580c +serdes_preemphasis_24=0x580c +serdes_preemphasis_25=0x580c +serdes_preemphasis_26=0x580c +serdes_preemphasis_27=0x580c +serdes_preemphasis_28=0x580c +serdes_preemphasis_29=0x580c +serdes_preemphasis_30=0x580c +serdes_preemphasis_34=0x580c +serdes_preemphasis_35=0x580c +serdes_preemphasis_36=0x580c +serdes_preemphasis_37=0x580c +serdes_preemphasis_38=0x580c +serdes_preemphasis_39=0x580c +serdes_preemphasis_40=0x580c +serdes_preemphasis_41=0x580c +serdes_preemphasis_42=0x580c +serdes_preemphasis_43=0x580c +serdes_preemphasis_44=0x580c +serdes_preemphasis_45=0x580c +serdes_preemphasis_46=0x144108 +serdes_preemphasis_47=0x103a07 +serdes_preemphasis_48=0x580c +serdes_preemphasis_49=0x580c +serdes_preemphasis_50=0x580c +serdes_preemphasis_51=0x580c +serdes_preemphasis_52=0x580c +serdes_preemphasis_53=0x580c +serdes_preemphasis_54=0x580c +serdes_preemphasis_55=0x580c +serdes_preemphasis_56=0x580c +serdes_preemphasis_57=0x580c +serdes_preemphasis_58=0x580c +serdes_preemphasis_59=0x580c +serdes_preemphasis_60=0x580c +serdes_preemphasis_61=0x580c +serdes_preemphasis_62=0x580c +serdes_preemphasis_63=0x580c +serdes_preemphasis_66=0x43004 +serdes_preemphasis_68=0x184606 +serdes_preemphasis_69=0x184407 +serdes_preemphasis_70=0x580c +serdes_preemphasis_71=0x580c +serdes_preemphasis_72=0x580c +serdes_preemphasis_73=0x580c +serdes_preemphasis_74=0x580c +serdes_preemphasis_75=0x580c +serdes_preemphasis_76=0x580c +serdes_preemphasis_77=0x580c +serdes_preemphasis_78=0x580c +serdes_preemphasis_79=0x580c +serdes_preemphasis_80=0x580c +serdes_preemphasis_81=0x580c +serdes_preemphasis_82=0x580c +serdes_preemphasis_83=0x580c +serdes_preemphasis_84=0x580c +serdes_preemphasis_85=0x580c +serdes_preemphasis_86=0x580c +serdes_preemphasis_87=0x580c +serdes_preemphasis_88=0x580c +serdes_preemphasis_89=0x580c +serdes_preemphasis_90=0x580c +serdes_preemphasis_91=0x580c +serdes_preemphasis_92=0x580c +serdes_preemphasis_93=0x580c +serdes_preemphasis_94=0x580c +serdes_preemphasis_95=0x580c +serdes_preemphasis_96=0x580c +serdes_preemphasis_97=0x580c +serdes_preemphasis_100=0x43004 +serdes_preemphasis_102=0x174507 +serdes_preemphasis_103=0x184606 +serdes_preemphasis_104=0x580c +serdes_preemphasis_105=0x580c +serdes_preemphasis_106=0x580c +serdes_preemphasis_107=0x580c +serdes_preemphasis_108=0x580c +serdes_preemphasis_109=0x580c +serdes_preemphasis_110=0x580c +serdes_preemphasis_111=0x580c +serdes_preemphasis_112=0x580c +serdes_preemphasis_113=0x580c +serdes_preemphasis_114=0x580c +serdes_preemphasis_115=0x580c +serdes_preemphasis_116=0x580c +serdes_preemphasis_117=0x580c +serdes_preemphasis_118=0x580c +serdes_preemphasis_119=0x580c +serdes_preemphasis_120=0x580c +serdes_preemphasis_121=0x580c +serdes_preemphasis_122=0x580c +serdes_preemphasis_123=0x580c +serdes_preemphasis_124=0x580c +serdes_preemphasis_125=0x580c +serdes_preemphasis_126=0x580c +serdes_preemphasis_127=0x580c +serdes_preemphasis_128=0x580c +serdes_preemphasis_129=0x580c +serdes_preemphasis_130=0x580c +serdes_preemphasis_131=0x580c + +mmu_init_config="MSFT-TH2-Tier0" diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q44 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q44 new file mode 120000 index 00000000000..a5c923950dc --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q44 @@ -0,0 +1 @@ +Arista-7260CX3-Q64 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/buffers.json.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/buffers.json.j2 new file mode 100644 index 00000000000..e6e9e844469 --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..3442612f70b --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/buffers_defaults_t0.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "33329088", + "type": "ingress", + "mode": "dynamic", + "xoff": "7827456" + }, + "egress_lossy_pool": { + "size": "26663272", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "42349632", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"44302336" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"42349632" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1664", + "dynamic_th":"-1" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/pg_profile_lookup.ini b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/pg_profile_lookup.ini new file mode 100644 index 00000000000..ac33b4f961f --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/pg_profile_lookup.ini @@ -0,0 +1,11 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 40000 5m 1248 1248 56160 -3 2496 + 50000 5m 1248 1248 56160 -3 2496 + 100000 5m 1248 1248 96928 -3 2496 + 40000 40m 1248 1248 71552 -3 2496 + 50000 40m 1248 1248 96096 -3 2496 + 100000 40m 1248 1248 177632 -3 2496 + 40000 300m 1248 1248 108160 -3 2496 + 50000 300m 1248 1248 141856 -3 2496 + 100000 300m 1248 1248 268736 -3 2496 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/port_config.ini b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/port_config.ini new file mode 100644 index 00000000000..de49cb6971a --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/port_config.ini @@ -0,0 +1,67 @@ +# name lanes alias index speed +Ethernet0 77,78,79,80 Ethernet1/1 1 40000 +Ethernet4 65,66,67,68 Ethernet2/1 2 40000 +Ethernet8 85,86,87,88 Ethernet3/1 3 40000 +Ethernet12 89,90,91,92 Ethernet4/1 4 40000 +Ethernet16 109,110,111,112 Ethernet5/1 5 40000 +Ethernet20 97,98,99,100 Ethernet6/1 6 40000 +Ethernet24 5,6,7,8 Ethernet7/1 7 40000 +Ethernet28 13,14,15,16 Ethernet8/1 8 40000 +Ethernet32 25,26,27,28 Ethernet9/1 9 40000 +Ethernet36 21,22,23,24 Ethernet10/1 10 40000 +Ethernet40 37,38,39,40 Ethernet11/1 11 40000 +Ethernet44 45,46,47,48 Ethernet12/1 12 40000 +Ethernet48 57,58,59,60 Ethernet13/1 13 40000 +Ethernet52 53,54,55,56 Ethernet14/1 14 40000 +Ethernet56 117,118,119,120 Ethernet15/1 15 40000 +Ethernet60 121,122,123,124 Ethernet16/1 16 40000 +Ethernet64 141,142,143,144 Ethernet17/1 17 40000 +Ethernet68 133,134,135,136 Ethernet18/1 18 40000 +Ethernet72 197,198,199,200 Ethernet19/1 19 40000 +Ethernet76 205,206,207,208 Ethernet20/1 20 40000 +Ethernet80 217,218,219,220 Ethernet21/1 21 40000 +Ethernet84 213,214,215,216 Ethernet22/1 22 40000 +Ethernet88 229,230,231,232 Ethernet23/1 23 40000 +Ethernet92 237,238,239,240 Ethernet24/1 24 40000 +Ethernet96 249,250,251,252 Ethernet25/1 25 40000 +Ethernet100 245,246,247,248 Ethernet26/1 26 40000 +Ethernet104 149,150,151,152 Ethernet27/1 27 40000 +Ethernet108 153,154,155,156 Ethernet28/1 28 40000 +Ethernet112 173,174,175,176 Ethernet29/1 29 40000 +Ethernet116 161,162,163,164 Ethernet30/1 30 40000 +Ethernet120 181,182,183,184 Ethernet31/1 31 40000 +Ethernet124 185,186,187,188 Ethernet32/1 32 40000 +Ethernet128 69,70,71,72 Ethernet33/1 33 40000 +Ethernet132 73,74,75,76 Ethernet34/1 34 40000 +Ethernet136 93,94,95,96 Ethernet35/1 35 40000 +Ethernet140 81,82,83,84 Ethernet36/1 36 40000 +Ethernet144 101,102,103,104 Ethernet37/1 37 40000 +Ethernet148 105,106,107,108 Ethernet38/1 38 40000 +Ethernet152 9,10,11,12 Ethernet39/1 39 40000 +Ethernet156 1,2,3,4 Ethernet40/1 40 40000 +Ethernet160 17,18,19,20 Ethernet41/1 41 40000 +Ethernet164 29,30,31,32 Ethernet42/1 42 40000 +Ethernet168 41,42,43,44 Ethernet43/1 43 40000 +Ethernet172 33,34,35,36 Ethernet44/1 44 40000 +Ethernet176 49,50,51,52 Ethernet45/1 45 40000 +Ethernet180 61,62,63,64 Ethernet46/1 46 40000 +Ethernet184 125,126,127,128 Ethernet47/1 47 40000 +Ethernet188 113,114,115,116 Ethernet48/1 48 40000 +Ethernet192 129,130,131,132 Ethernet49/1 49 40000 +Ethernet196 137,138,139,140 Ethernet50/1 50 40000 +Ethernet200 201,202,203,204 Ethernet51/1 51 40000 +Ethernet204 193,194,195,196 Ethernet52/1 52 40000 +Ethernet208 209,210,211,212 Ethernet53/1 53 40000 +Ethernet212 221,222,223,224 Ethernet54/1 54 40000 +Ethernet216 233,234,235,236 Ethernet55/1 55 40000 +Ethernet220 225,226,227,228 Ethernet56/1 56 40000 +Ethernet224 241,242,243,244 Ethernet57/1 57 40000 +Ethernet228 253,254,255,256 Ethernet58/1 58 40000 +Ethernet232 157,158,159,160 Ethernet59/1 59 40000 +Ethernet236 145,146,147,148 Ethernet60/1 60 40000 +Ethernet240 165,166,167,168 Ethernet61/1 61 40000 +Ethernet244 169,170,171,172 Ethernet62/1 62 40000 +Ethernet248 189,190,191,192 Ethernet63/1 63 40000 +Ethernet252 177,178,179,180 Ethernet64/1 64 40000 +Ethernet256 257 Ethernet65 65 10000 +Ethernet260 259 Ethernet66 66 10000 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/qos.json.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/sai.profile b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/sai.profile new file mode 100644 index 00000000000..db64a26b47d --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-a7260cx3-64-64x40G.config.bcm diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/th2-a7260cx3-64-64x40G.config.bcm b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/th2-a7260cx3-64-64x40G.config.bcm new file mode 100644 index 00000000000..f5ac5e37ef7 --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/th2-a7260cx3-64-64x40G.config.bcm @@ -0,0 +1,1015 @@ +PHY_AN_ALLOW_PLL_CHANGE=1 +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=8 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +core_clock_frequency=1700 +dma_desc_timeout_usec=15000000 +dpp_clock_ratio=2:3 +higig2_hdr_mode=1 +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +l2xmsg_mode=1 +max_vp_lags=0 +mem_scan_enable=1 +miim_intr_enable=0 +module_64ports=1 +os=unix +oversubscribe_mode=1 +pbmp_xport_xe=0x40003ffff0000ffffc0003fffe0001fffe +phy_an_allow_pll_change_hg=0 +phy_an_c73_100=1 +phy_an_c73_102=1 +phy_an_c73_103=1 +phy_an_c73_104=1 +phy_an_c73_105=1 +phy_an_c73_106=1 +phy_an_c73_107=1 +phy_an_c73_108=1 +phy_an_c73_109=1 +phy_an_c73_10=1 +phy_an_c73_110=1 +phy_an_c73_111=1 +phy_an_c73_112=1 +phy_an_c73_113=1 +phy_an_c73_114=1 +phy_an_c73_115=1 +phy_an_c73_116=1 +phy_an_c73_117=1 +phy_an_c73_11=1 +phy_an_c73_12=1 +phy_an_c73_13=1 +phy_an_c73_14=1 +phy_an_c73_15=1 +phy_an_c73_16=1 +phy_an_c73_1=1 +phy_an_c73_2=1 +phy_an_c73_34=1 +phy_an_c73_35=1 +phy_an_c73_36=1 +phy_an_c73_37=1 +phy_an_c73_38=1 +phy_an_c73_39=1 +phy_an_c73_3=1 +phy_an_c73_40=1 +phy_an_c73_41=1 +phy_an_c73_42=1 +phy_an_c73_43=1 +phy_an_c73_44=1 +phy_an_c73_45=1 +phy_an_c73_46=1 +phy_an_c73_47=1 +phy_an_c73_48=1 +phy_an_c73_49=1 +phy_an_c73_4=1 +phy_an_c73_5=1 +phy_an_c73_66=1 +phy_an_c73_68=1 +phy_an_c73_69=1 +phy_an_c73_6=1 +phy_an_c73_70=1 +phy_an_c73_71=1 +phy_an_c73_72=1 +phy_an_c73_73=1 +phy_an_c73_74=1 +phy_an_c73_75=1 +phy_an_c73_76=1 +phy_an_c73_77=1 +phy_an_c73_78=1 +phy_an_c73_79=1 +phy_an_c73_7=1 +phy_an_c73_80=1 +phy_an_c73_81=1 +phy_an_c73_82=1 +phy_an_c73_83=1 +phy_an_c73_8=1 +phy_an_c73_9=1 +phy_chain_rx_lane_map_physical{1.0}=0x3210 +phy_chain_rx_lane_map_physical{101.0}=0x0123 +phy_chain_rx_lane_map_physical{105.0}=0x0123 +phy_chain_rx_lane_map_physical{109.0}=0x0123 +phy_chain_rx_lane_map_physical{113.0}=0x2301 +phy_chain_rx_lane_map_physical{117.0}=0x3210 +phy_chain_rx_lane_map_physical{121.0}=0x3210 +phy_chain_rx_lane_map_physical{125.0}=0x1203 +phy_chain_rx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_lane_map_physical{13.0}=0x0321 +phy_chain_rx_lane_map_physical{133.0}=0x1032 +phy_chain_rx_lane_map_physical{137.0}=0x3210 +phy_chain_rx_lane_map_physical{141.0}=0x0123 +phy_chain_rx_lane_map_physical{145.0}=0x3210 +phy_chain_rx_lane_map_physical{149.0}=0x2310 +phy_chain_rx_lane_map_physical{153.0}=0x0132 +phy_chain_rx_lane_map_physical{157.0}=0x1302 +phy_chain_rx_lane_map_physical{161.0}=0x3021 +phy_chain_rx_lane_map_physical{165.0}=0x2031 +phy_chain_rx_lane_map_physical{169.0}=0x2031 +phy_chain_rx_lane_map_physical{17.0}=0x3210 +phy_chain_rx_lane_map_physical{173.0}=0x1302 +phy_chain_rx_lane_map_physical{177.0}=0x2031 +phy_chain_rx_lane_map_physical{181.0}=0x0213 +phy_chain_rx_lane_map_physical{185.0}=0x0213 +phy_chain_rx_lane_map_physical{189.0}=0x1302 +phy_chain_rx_lane_map_physical{193.0}=0x3120 +phy_chain_rx_lane_map_physical{197.0}=0x0231 +phy_chain_rx_lane_map_physical{201.0}=0x2031 +phy_chain_rx_lane_map_physical{205.0}=0x0213 +phy_chain_rx_lane_map_physical{209.0}=0x2013 +phy_chain_rx_lane_map_physical{21.0}=0x3021 +phy_chain_rx_lane_map_physical{213.0}=0x3021 +phy_chain_rx_lane_map_physical{217.0}=0x0231 +phy_chain_rx_lane_map_physical{221.0}=0x2031 +phy_chain_rx_lane_map_physical{225.0}=0x1203 +phy_chain_rx_lane_map_physical{229.0}=0x1230 +phy_chain_rx_lane_map_physical{233.0}=0x3021 +phy_chain_rx_lane_map_physical{237.0}=0x1032 +phy_chain_rx_lane_map_physical{241.0}=0x2301 +phy_chain_rx_lane_map_physical{245.0}=0x0321 +phy_chain_rx_lane_map_physical{249.0}=0x2301 +phy_chain_rx_lane_map_physical{25.0}=0x2301 +phy_chain_rx_lane_map_physical{253.0}=0x2301 +phy_chain_rx_lane_map_physical{257.0}=0x3210 +phy_chain_rx_lane_map_physical{29.0}=0x3021 +phy_chain_rx_lane_map_physical{33.0}=0x1302 +phy_chain_rx_lane_map_physical{37.0}=0x2031 +phy_chain_rx_lane_map_physical{41.0}=0x3021 +phy_chain_rx_lane_map_physical{45.0}=0x1023 +phy_chain_rx_lane_map_physical{49.0}=0x0213 +phy_chain_rx_lane_map_physical{5.0}=0x3201 +phy_chain_rx_lane_map_physical{53.0}=0x3201 +phy_chain_rx_lane_map_physical{57.0}=0x2013 +phy_chain_rx_lane_map_physical{61.0}=0x0213 +phy_chain_rx_lane_map_physical{65.0}=0x1203 +phy_chain_rx_lane_map_physical{69.0}=0x0213 +phy_chain_rx_lane_map_physical{73.0}=0x0213 +phy_chain_rx_lane_map_physical{77.0}=0x3120 +phy_chain_rx_lane_map_physical{81.0}=0x0213 +phy_chain_rx_lane_map_physical{85.0}=0x2031 +phy_chain_rx_lane_map_physical{89.0}=0x2031 +phy_chain_rx_lane_map_physical{9.0}=0x0321 +phy_chain_rx_lane_map_physical{93.0}=0x3120 +phy_chain_rx_lane_map_physical{97.0}=0x1203 +phy_chain_rx_polarity_flip_physical{1.0}=0x1 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 +phy_chain_rx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x1 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{117.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x1 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_rx_polarity_flip_physical{130.0}=0x1 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{133.0}=0x1 +phy_chain_rx_polarity_flip_physical{134.0}=0x1 +phy_chain_rx_polarity_flip_physical{135.0}=0x1 +phy_chain_rx_polarity_flip_physical{136.0}=0x0 +phy_chain_rx_polarity_flip_physical{137.0}=0x0 +phy_chain_rx_polarity_flip_physical{138.0}=0x0 +phy_chain_rx_polarity_flip_physical{139.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{140.0}=0x0 +phy_chain_rx_polarity_flip_physical{141.0}=0x1 +phy_chain_rx_polarity_flip_physical{142.0}=0x0 +phy_chain_rx_polarity_flip_physical{143.0}=0x1 +phy_chain_rx_polarity_flip_physical{144.0}=0x0 +phy_chain_rx_polarity_flip_physical{145.0}=0x1 +phy_chain_rx_polarity_flip_physical{146.0}=0x0 +phy_chain_rx_polarity_flip_physical{147.0}=0x1 +phy_chain_rx_polarity_flip_physical{148.0}=0x0 +phy_chain_rx_polarity_flip_physical{149.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{150.0}=0x1 +phy_chain_rx_polarity_flip_physical{151.0}=0x1 +phy_chain_rx_polarity_flip_physical{152.0}=0x0 +phy_chain_rx_polarity_flip_physical{153.0}=0x0 +phy_chain_rx_polarity_flip_physical{154.0}=0x1 +phy_chain_rx_polarity_flip_physical{155.0}=0x1 +phy_chain_rx_polarity_flip_physical{156.0}=0x0 +phy_chain_rx_polarity_flip_physical{157.0}=0x0 +phy_chain_rx_polarity_flip_physical{158.0}=0x0 +phy_chain_rx_polarity_flip_physical{159.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 +phy_chain_rx_polarity_flip_physical{161.0}=0x1 +phy_chain_rx_polarity_flip_physical{162.0}=0x1 +phy_chain_rx_polarity_flip_physical{163.0}=0x0 +phy_chain_rx_polarity_flip_physical{164.0}=0x1 +phy_chain_rx_polarity_flip_physical{165.0}=0x0 +phy_chain_rx_polarity_flip_physical{166.0}=0x0 +phy_chain_rx_polarity_flip_physical{167.0}=0x1 +phy_chain_rx_polarity_flip_physical{168.0}=0x1 +phy_chain_rx_polarity_flip_physical{169.0}=0x1 +phy_chain_rx_polarity_flip_physical{17.0}=0x1 +phy_chain_rx_polarity_flip_physical{170.0}=0x1 +phy_chain_rx_polarity_flip_physical{171.0}=0x0 +phy_chain_rx_polarity_flip_physical{172.0}=0x0 +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x0 +phy_chain_rx_polarity_flip_physical{175.0}=0x1 +phy_chain_rx_polarity_flip_physical{176.0}=0x1 +phy_chain_rx_polarity_flip_physical{177.0}=0x1 +phy_chain_rx_polarity_flip_physical{178.0}=0x1 +phy_chain_rx_polarity_flip_physical{179.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x0 +phy_chain_rx_polarity_flip_physical{181.0}=0x1 +phy_chain_rx_polarity_flip_physical{182.0}=0x1 +phy_chain_rx_polarity_flip_physical{183.0}=0x0 +phy_chain_rx_polarity_flip_physical{184.0}=0x0 +phy_chain_rx_polarity_flip_physical{185.0}=0x0 +phy_chain_rx_polarity_flip_physical{186.0}=0x0 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x1 +phy_chain_rx_polarity_flip_physical{189.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_rx_polarity_flip_physical{190.0}=0x0 +phy_chain_rx_polarity_flip_physical{191.0}=0x1 +phy_chain_rx_polarity_flip_physical{192.0}=0x0 +phy_chain_rx_polarity_flip_physical{193.0}=0x0 +phy_chain_rx_polarity_flip_physical{194.0}=0x0 +phy_chain_rx_polarity_flip_physical{195.0}=0x1 +phy_chain_rx_polarity_flip_physical{196.0}=0x1 +phy_chain_rx_polarity_flip_physical{197.0}=0x1 +phy_chain_rx_polarity_flip_physical{198.0}=0x1 +phy_chain_rx_polarity_flip_physical{199.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x0 +phy_chain_rx_polarity_flip_physical{201.0}=0x0 +phy_chain_rx_polarity_flip_physical{202.0}=0x0 +phy_chain_rx_polarity_flip_physical{203.0}=0x1 +phy_chain_rx_polarity_flip_physical{204.0}=0x0 +phy_chain_rx_polarity_flip_physical{205.0}=0x1 +phy_chain_rx_polarity_flip_physical{206.0}=0x1 +phy_chain_rx_polarity_flip_physical{207.0}=0x0 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 +phy_chain_rx_polarity_flip_physical{209.0}=0x1 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{210.0}=0x1 +phy_chain_rx_polarity_flip_physical{211.0}=0x0 +phy_chain_rx_polarity_flip_physical{212.0}=0x0 +phy_chain_rx_polarity_flip_physical{213.0}=0x0 +phy_chain_rx_polarity_flip_physical{214.0}=0x0 +phy_chain_rx_polarity_flip_physical{215.0}=0x1 +phy_chain_rx_polarity_flip_physical{216.0}=0x0 +phy_chain_rx_polarity_flip_physical{217.0}=0x0 +phy_chain_rx_polarity_flip_physical{218.0}=0x0 +phy_chain_rx_polarity_flip_physical{219.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{220.0}=0x1 +phy_chain_rx_polarity_flip_physical{221.0}=0x0 +phy_chain_rx_polarity_flip_physical{222.0}=0x0 +phy_chain_rx_polarity_flip_physical{223.0}=0x1 +phy_chain_rx_polarity_flip_physical{224.0}=0x1 +phy_chain_rx_polarity_flip_physical{225.0}=0x1 +phy_chain_rx_polarity_flip_physical{226.0}=0x0 +phy_chain_rx_polarity_flip_physical{227.0}=0x0 +phy_chain_rx_polarity_flip_physical{228.0}=0x1 +phy_chain_rx_polarity_flip_physical{229.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{230.0}=0x0 +phy_chain_rx_polarity_flip_physical{231.0}=0x1 +phy_chain_rx_polarity_flip_physical{232.0}=0x1 +phy_chain_rx_polarity_flip_physical{233.0}=0x1 +phy_chain_rx_polarity_flip_physical{234.0}=0x0 +phy_chain_rx_polarity_flip_physical{235.0}=0x0 +phy_chain_rx_polarity_flip_physical{236.0}=0x0 +phy_chain_rx_polarity_flip_physical{237.0}=0x1 +phy_chain_rx_polarity_flip_physical{238.0}=0x0 +phy_chain_rx_polarity_flip_physical{239.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_polarity_flip_physical{240.0}=0x0 +phy_chain_rx_polarity_flip_physical{241.0}=0x1 +phy_chain_rx_polarity_flip_physical{242.0}=0x0 +phy_chain_rx_polarity_flip_physical{243.0}=0x1 +phy_chain_rx_polarity_flip_physical{244.0}=0x0 +phy_chain_rx_polarity_flip_physical{245.0}=0x1 +phy_chain_rx_polarity_flip_physical{246.0}=0x1 +phy_chain_rx_polarity_flip_physical{247.0}=0x1 +phy_chain_rx_polarity_flip_physical{248.0}=0x0 +phy_chain_rx_polarity_flip_physical{249.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_rx_polarity_flip_physical{250.0}=0x1 +phy_chain_rx_polarity_flip_physical{251.0}=0x0 +phy_chain_rx_polarity_flip_physical{252.0}=0x1 +phy_chain_rx_polarity_flip_physical{253.0}=0x1 +phy_chain_rx_polarity_flip_physical{254.0}=0x0 +phy_chain_rx_polarity_flip_physical{255.0}=0x1 +phy_chain_rx_polarity_flip_physical{256.0}=0x0 +phy_chain_rx_polarity_flip_physical{257.0}=0x0 +phy_chain_rx_polarity_flip_physical{259.0}=0x0 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x1 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{81.0}=0x1 +phy_chain_rx_polarity_flip_physical{82.0}=0x1 +phy_chain_rx_polarity_flip_physical{83.0}=0x0 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x1 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{98.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_lane_map_physical{1.0}=0x2031 +phy_chain_tx_lane_map_physical{101.0}=0x1023 +phy_chain_tx_lane_map_physical{105.0}=0x1302 +phy_chain_tx_lane_map_physical{109.0}=0x0321 +phy_chain_tx_lane_map_physical{113.0}=0x2301 +phy_chain_tx_lane_map_physical{117.0}=0x3120 +phy_chain_tx_lane_map_physical{121.0}=0x3102 +phy_chain_tx_lane_map_physical{125.0}=0x3210 +phy_chain_tx_lane_map_physical{129.0}=0x1023 +phy_chain_tx_lane_map_physical{13.0}=0x3021 +phy_chain_tx_lane_map_physical{133.0}=0x3210 +phy_chain_tx_lane_map_physical{137.0}=0x2031 +phy_chain_tx_lane_map_physical{141.0}=0x1302 +phy_chain_tx_lane_map_physical{145.0}=0x3210 +phy_chain_tx_lane_map_physical{149.0}=0x0213 +phy_chain_tx_lane_map_physical{153.0}=0x3210 +phy_chain_tx_lane_map_physical{157.0}=0x1320 +phy_chain_tx_lane_map_physical{161.0}=0x3210 +phy_chain_tx_lane_map_physical{165.0}=0x0231 +phy_chain_tx_lane_map_physical{169.0}=0x3120 +phy_chain_tx_lane_map_physical{17.0}=0x1032 +phy_chain_tx_lane_map_physical{173.0}=0x0312 +phy_chain_tx_lane_map_physical{177.0}=0x0231 +phy_chain_tx_lane_map_physical{181.0}=0x3210 +phy_chain_tx_lane_map_physical{185.0}=0x3210 +phy_chain_tx_lane_map_physical{189.0}=0x1320 +phy_chain_tx_lane_map_physical{193.0}=0x0321 +phy_chain_tx_lane_map_physical{197.0}=0x3120 +phy_chain_tx_lane_map_physical{201.0}=0x3120 +phy_chain_tx_lane_map_physical{205.0}=0x0123 +phy_chain_tx_lane_map_physical{209.0}=0x3120 +phy_chain_tx_lane_map_physical{21.0}=0x0213 +phy_chain_tx_lane_map_physical{213.0}=0x3021 +phy_chain_tx_lane_map_physical{217.0}=0x0312 +phy_chain_tx_lane_map_physical{221.0}=0x2301 +phy_chain_tx_lane_map_physical{225.0}=0x0123 +phy_chain_tx_lane_map_physical{229.0}=0x2031 +phy_chain_tx_lane_map_physical{233.0}=0x0231 +phy_chain_tx_lane_map_physical{237.0}=0x0213 +phy_chain_tx_lane_map_physical{241.0}=0x1320 +phy_chain_tx_lane_map_physical{245.0}=0x2031 +phy_chain_tx_lane_map_physical{249.0}=0x3120 +phy_chain_tx_lane_map_physical{25.0}=0x0231 +phy_chain_tx_lane_map_physical{253.0}=0x0321 +phy_chain_tx_lane_map_physical{257.0}=0x3210 +phy_chain_tx_lane_map_physical{29.0}=0x1230 +phy_chain_tx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{37.0}=0x0123 +phy_chain_tx_lane_map_physical{41.0}=0x0213 +phy_chain_tx_lane_map_physical{45.0}=0x0132 +phy_chain_tx_lane_map_physical{49.0}=0x2031 +phy_chain_tx_lane_map_physical{5.0}=0x2301 +phy_chain_tx_lane_map_physical{53.0}=0x2301 +phy_chain_tx_lane_map_physical{57.0}=0x2031 +phy_chain_tx_lane_map_physical{61.0}=0x2031 +phy_chain_tx_lane_map_physical{65.0}=0x1230 +phy_chain_tx_lane_map_physical{69.0}=0x2013 +phy_chain_tx_lane_map_physical{73.0}=0x0213 +phy_chain_tx_lane_map_physical{77.0}=0x2310 +phy_chain_tx_lane_map_physical{81.0}=0x0321 +phy_chain_tx_lane_map_physical{85.0}=0x2013 +phy_chain_tx_lane_map_physical{89.0}=0x0213 +phy_chain_tx_lane_map_physical{9.0}=0x3012 +phy_chain_tx_lane_map_physical{93.0}=0x3102 +phy_chain_tx_lane_map_physical{97.0}=0x3210 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x0 +phy_chain_tx_polarity_flip_physical{112.0}=0x1 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x1 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x0 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x1 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_tx_polarity_flip_physical{133.0}=0x1 +phy_chain_tx_polarity_flip_physical{134.0}=0x1 +phy_chain_tx_polarity_flip_physical{135.0}=0x1 +phy_chain_tx_polarity_flip_physical{136.0}=0x1 +phy_chain_tx_polarity_flip_physical{137.0}=0x1 +phy_chain_tx_polarity_flip_physical{138.0}=0x1 +phy_chain_tx_polarity_flip_physical{139.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{140.0}=0x1 +phy_chain_tx_polarity_flip_physical{141.0}=0x0 +phy_chain_tx_polarity_flip_physical{142.0}=0x1 +phy_chain_tx_polarity_flip_physical{143.0}=0x1 +phy_chain_tx_polarity_flip_physical{144.0}=0x1 +phy_chain_tx_polarity_flip_physical{145.0}=0x1 +phy_chain_tx_polarity_flip_physical{146.0}=0x1 +phy_chain_tx_polarity_flip_physical{147.0}=0x1 +phy_chain_tx_polarity_flip_physical{148.0}=0x0 +phy_chain_tx_polarity_flip_physical{149.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{150.0}=0x0 +phy_chain_tx_polarity_flip_physical{151.0}=0x0 +phy_chain_tx_polarity_flip_physical{152.0}=0x0 +phy_chain_tx_polarity_flip_physical{153.0}=0x1 +phy_chain_tx_polarity_flip_physical{154.0}=0x0 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x0 +phy_chain_tx_polarity_flip_physical{157.0}=0x0 +phy_chain_tx_polarity_flip_physical{158.0}=0x0 +phy_chain_tx_polarity_flip_physical{159.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{160.0}=0x0 +phy_chain_tx_polarity_flip_physical{161.0}=0x0 +phy_chain_tx_polarity_flip_physical{162.0}=0x1 +phy_chain_tx_polarity_flip_physical{163.0}=0x1 +phy_chain_tx_polarity_flip_physical{164.0}=0x0 +phy_chain_tx_polarity_flip_physical{165.0}=0x1 +phy_chain_tx_polarity_flip_physical{166.0}=0x1 +phy_chain_tx_polarity_flip_physical{167.0}=0x1 +phy_chain_tx_polarity_flip_physical{168.0}=0x0 +phy_chain_tx_polarity_flip_physical{169.0}=0x0 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{170.0}=0x1 +phy_chain_tx_polarity_flip_physical{171.0}=0x1 +phy_chain_tx_polarity_flip_physical{172.0}=0x1 +phy_chain_tx_polarity_flip_physical{173.0}=0x0 +phy_chain_tx_polarity_flip_physical{174.0}=0x0 +phy_chain_tx_polarity_flip_physical{175.0}=0x1 +phy_chain_tx_polarity_flip_physical{176.0}=0x0 +phy_chain_tx_polarity_flip_physical{177.0}=0x1 +phy_chain_tx_polarity_flip_physical{178.0}=0x0 +phy_chain_tx_polarity_flip_physical{179.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 +phy_chain_tx_polarity_flip_physical{181.0}=0x0 +phy_chain_tx_polarity_flip_physical{182.0}=0x0 +phy_chain_tx_polarity_flip_physical{183.0}=0x0 +phy_chain_tx_polarity_flip_physical{184.0}=0x1 +phy_chain_tx_polarity_flip_physical{185.0}=0x0 +phy_chain_tx_polarity_flip_physical{186.0}=0x1 +phy_chain_tx_polarity_flip_physical{187.0}=0x1 +phy_chain_tx_polarity_flip_physical{188.0}=0x1 +phy_chain_tx_polarity_flip_physical{189.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{190.0}=0x0 +phy_chain_tx_polarity_flip_physical{191.0}=0x0 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 +phy_chain_tx_polarity_flip_physical{193.0}=0x1 +phy_chain_tx_polarity_flip_physical{194.0}=0x1 +phy_chain_tx_polarity_flip_physical{195.0}=0x1 +phy_chain_tx_polarity_flip_physical{196.0}=0x0 +phy_chain_tx_polarity_flip_physical{197.0}=0x0 +phy_chain_tx_polarity_flip_physical{198.0}=0x1 +phy_chain_tx_polarity_flip_physical{199.0}=0x1 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_tx_polarity_flip_physical{200.0}=0x1 +phy_chain_tx_polarity_flip_physical{201.0}=0x1 +phy_chain_tx_polarity_flip_physical{202.0}=0x1 +phy_chain_tx_polarity_flip_physical{203.0}=0x1 +phy_chain_tx_polarity_flip_physical{204.0}=0x1 +phy_chain_tx_polarity_flip_physical{205.0}=0x0 +phy_chain_tx_polarity_flip_physical{206.0}=0x1 +phy_chain_tx_polarity_flip_physical{207.0}=0x1 +phy_chain_tx_polarity_flip_physical{208.0}=0x1 +phy_chain_tx_polarity_flip_physical{209.0}=0x1 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{210.0}=0x1 +phy_chain_tx_polarity_flip_physical{211.0}=0x1 +phy_chain_tx_polarity_flip_physical{212.0}=0x0 +phy_chain_tx_polarity_flip_physical{213.0}=0x0 +phy_chain_tx_polarity_flip_physical{214.0}=0x1 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x1 +phy_chain_tx_polarity_flip_physical{217.0}=0x1 +phy_chain_tx_polarity_flip_physical{218.0}=0x1 +phy_chain_tx_polarity_flip_physical{219.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{220.0}=0x1 +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x0 +phy_chain_tx_polarity_flip_physical{223.0}=0x0 +phy_chain_tx_polarity_flip_physical{224.0}=0x1 +phy_chain_tx_polarity_flip_physical{225.0}=0x1 +phy_chain_tx_polarity_flip_physical{226.0}=0x1 +phy_chain_tx_polarity_flip_physical{227.0}=0x1 +phy_chain_tx_polarity_flip_physical{228.0}=0x0 +phy_chain_tx_polarity_flip_physical{229.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{230.0}=0x1 +phy_chain_tx_polarity_flip_physical{231.0}=0x1 +phy_chain_tx_polarity_flip_physical{232.0}=0x1 +phy_chain_tx_polarity_flip_physical{233.0}=0x0 +phy_chain_tx_polarity_flip_physical{234.0}=0x0 +phy_chain_tx_polarity_flip_physical{235.0}=0x0 +phy_chain_tx_polarity_flip_physical{236.0}=0x0 +phy_chain_tx_polarity_flip_physical{237.0}=0x1 +phy_chain_tx_polarity_flip_physical{238.0}=0x1 +phy_chain_tx_polarity_flip_physical{239.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x0 +phy_chain_tx_polarity_flip_physical{241.0}=0x1 +phy_chain_tx_polarity_flip_physical{242.0}=0x1 +phy_chain_tx_polarity_flip_physical{243.0}=0x1 +phy_chain_tx_polarity_flip_physical{244.0}=0x0 +phy_chain_tx_polarity_flip_physical{245.0}=0x1 +phy_chain_tx_polarity_flip_physical{246.0}=0x1 +phy_chain_tx_polarity_flip_physical{247.0}=0x1 +phy_chain_tx_polarity_flip_physical{248.0}=0x1 +phy_chain_tx_polarity_flip_physical{249.0}=0x1 +phy_chain_tx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{250.0}=0x0 +phy_chain_tx_polarity_flip_physical{251.0}=0x0 +phy_chain_tx_polarity_flip_physical{252.0}=0x0 +phy_chain_tx_polarity_flip_physical{253.0}=0x1 +phy_chain_tx_polarity_flip_physical{254.0}=0x1 +phy_chain_tx_polarity_flip_physical{255.0}=0x1 +phy_chain_tx_polarity_flip_physical{256.0}=0x0 +phy_chain_tx_polarity_flip_physical{257.0}=0x0 +phy_chain_tx_polarity_flip_physical{259.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x0 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 +phy_chain_tx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x1 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x1 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_tx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_tx_polarity_flip_physical{97.0}=0x0 +phy_chain_tx_polarity_flip_physical{98.0}=0x1 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +port_init_autoneg_100=0 +port_init_autoneg_102=0 +port_init_autoneg_103=0 +port_init_autoneg_104=0 +port_init_autoneg_105=0 +port_init_autoneg_106=0 +port_init_autoneg_107=0 +port_init_autoneg_108=0 +port_init_autoneg_109=0 +port_init_autoneg_10=0 +port_init_autoneg_110=0 +port_init_autoneg_111=0 +port_init_autoneg_112=0 +port_init_autoneg_113=0 +port_init_autoneg_114=0 +port_init_autoneg_115=0 +port_init_autoneg_116=0 +port_init_autoneg_117=0 +port_init_autoneg_11=0 +port_init_autoneg_12=0 +port_init_autoneg_13=0 +port_init_autoneg_14=0 +port_init_autoneg_15=0 +port_init_autoneg_16=0 +port_init_autoneg_1=0 +port_init_autoneg_2=0 +port_init_autoneg_34=0 +port_init_autoneg_35=0 +port_init_autoneg_36=0 +port_init_autoneg_37=0 +port_init_autoneg_38=0 +port_init_autoneg_39=0 +port_init_autoneg_3=0 +port_init_autoneg_40=0 +port_init_autoneg_41=0 +port_init_autoneg_42=0 +port_init_autoneg_43=0 +port_init_autoneg_44=0 +port_init_autoneg_45=0 +port_init_autoneg_46=0 +port_init_autoneg_47=0 +port_init_autoneg_48=0 +port_init_autoneg_49=0 +port_init_autoneg_4=0 +port_init_autoneg_5=0 +port_init_autoneg_66=0 +port_init_autoneg_68=0 +port_init_autoneg_69=0 +port_init_autoneg_6=0 +port_init_autoneg_70=0 +port_init_autoneg_71=0 +port_init_autoneg_72=0 +port_init_autoneg_73=0 +port_init_autoneg_74=0 +port_init_autoneg_75=0 +port_init_autoneg_76=0 +port_init_autoneg_77=0 +port_init_autoneg_78=0 +port_init_autoneg_79=0 +port_init_autoneg_7=0 +port_init_autoneg_80=0 +port_init_autoneg_81=0 +port_init_autoneg_82=0 +port_init_autoneg_83=0 +port_init_autoneg_8=0 +port_init_autoneg_9=0 +port_init_cl72_hg=1 +port_phy_addr_100=0xff +port_phy_addr_102=0xff +port_phy_addr_103=0xff +port_phy_addr_104=0xff +port_phy_addr_105=0xff +port_phy_addr_106=0xff +port_phy_addr_107=0xff +port_phy_addr_108=0xff +port_phy_addr_109=0xff +port_phy_addr_10=0xff +port_phy_addr_110=0xff +port_phy_addr_111=0xff +port_phy_addr_112=0xff +port_phy_addr_113=0xff +port_phy_addr_114=0xff +port_phy_addr_115=0xff +port_phy_addr_116=0xff +port_phy_addr_117=0xff +port_phy_addr_11=0xff +port_phy_addr_12=0xff +port_phy_addr_13=0xff +port_phy_addr_14=0xff +port_phy_addr_15=0xff +port_phy_addr_16=0xff +port_phy_addr_1=0xff +port_phy_addr_2=0xff +port_phy_addr_34=0xff +port_phy_addr_35=0xff +port_phy_addr_36=0xff +port_phy_addr_37=0xff +port_phy_addr_38=0xff +port_phy_addr_39=0xff +port_phy_addr_3=0xff +port_phy_addr_40=0xff +port_phy_addr_41=0xff +port_phy_addr_42=0xff +port_phy_addr_43=0xff +port_phy_addr_44=0xff +port_phy_addr_45=0xff +port_phy_addr_46=0xff +port_phy_addr_47=0xff +port_phy_addr_48=0xff +port_phy_addr_49=0xff +port_phy_addr_4=0xff +port_phy_addr_5=0xff +port_phy_addr_66=0xff +port_phy_addr_68=0xff +port_phy_addr_69=0xff +port_phy_addr_6=0xff +port_phy_addr_70=0xff +port_phy_addr_71=0xff +port_phy_addr_72=0xff +port_phy_addr_73=0xff +port_phy_addr_74=0xff +port_phy_addr_75=0xff +port_phy_addr_76=0xff +port_phy_addr_77=0xff +port_phy_addr_78=0xff +port_phy_addr_79=0xff +port_phy_addr_7=0xff +port_phy_addr_80=0xff +port_phy_addr_81=0xff +port_phy_addr_82=0xff +port_phy_addr_83=0xff +port_phy_addr_8=0xff +port_phy_addr_9=0xff +portmap_100=259:10 +portmap_101=262:10 +portmap_102=217:40 +portmap_103=213:40 +portmap_104=229:40 +portmap_105=237:40 +portmap_106=249:40 +portmap_107=245:40 +portmap_108=209:40 +portmap_109=221:40 +portmap_10=29:40 +portmap_110=233:40 +portmap_111=225:40 +portmap_112=241:40 +portmap_113=253:40 +portmap_114=197:40 +portmap_115=205:40 +portmap_116=201:40 +portmap_117=193:40 +portmap_11=41:40 +portmap_12=33:40 +portmap_134=263:10 +portmap_13=57:40 +portmap_14=53:40 +portmap_15=49:40 +portmap_16=61:40 +portmap_1=5:40 +portmap_2=13:40 +portmap_33=260:10 +portmap_34=77:40 +portmap_35=65:40 +portmap_36=85:40 +portmap_37=89:40 +portmap_38=109:40 +portmap_39=97:40 +portmap_3=25:40 +portmap_40=69:40 +portmap_41=73:40 +portmap_42=93:40 +portmap_43=81:40 +portmap_44=101:40 +portmap_45=105:40 +portmap_46=117:40 +portmap_47=121:40 +portmap_48=125:40 +portmap_49=113:40 +portmap_4=21:40 +portmap_5=37:40 +portmap_66=257:10 +portmap_67=261:10 +portmap_68=149:40 +portmap_69=153:40 +portmap_6=45:40 +portmap_70=173:40 +portmap_71=161:40 +portmap_72=181:40 +portmap_73=185:40 +portmap_74=157:40 +portmap_75=145:40 +portmap_76=165:40 +portmap_77=169:40 +portmap_78=189:40 +portmap_79=177:40 +portmap_7=9:40 +portmap_80=141:40 +portmap_81=133:40 +portmap_82=129:40 +portmap_83=137:40 +portmap_8=1:40 +portmap_9=17:40 +robust_hash_disable_egress_vlan=1 +robust_hash_disable_mpls=1 +robust_hash_disable_vlan=1 +stable_size=0x5500000 +stable_size=0x5500000 +tdma_timeout_usec=15000000 +tslam_timeout_usec=15000000 + +# tuning parameters +serdes_preemphasis_1=0x105004 +serdes_preemphasis_2=0x105004 +serdes_preemphasis_3=0x105004 +serdes_preemphasis_4=0x105004 +serdes_preemphasis_5=0x105004 +serdes_preemphasis_6=0x105004 +serdes_preemphasis_7=0x105004 +serdes_preemphasis_8=0x105004 +serdes_preemphasis_9=0x105004 +serdes_preemphasis_10=0x105004 +serdes_preemphasis_11=0x105004 +serdes_preemphasis_12=0x105004 +serdes_preemphasis_13=0x71f01 +serdes_preemphasis_14=0x72101 +serdes_preemphasis_15=0x105004 +serdes_preemphasis_16=0x105004 +serdes_preemphasis_34=0x105004 +serdes_preemphasis_35=0x105004 +serdes_preemphasis_36=0x105004 +serdes_preemphasis_37=0x105004 +serdes_preemphasis_38=0x105004 +serdes_preemphasis_39=0x105004 +serdes_preemphasis_40=0x105004 +serdes_preemphasis_41=0x105004 +serdes_preemphasis_42=0x105004 +serdes_preemphasis_43=0x105004 +serdes_preemphasis_44=0x105004 +serdes_preemphasis_45=0x105004 +serdes_preemphasis_46=0x61d01 +serdes_preemphasis_47=0x51a01 +serdes_preemphasis_48=0x105004 +serdes_preemphasis_49=0x105004 +serdes_preemphasis_66=0x43004 +serdes_preemphasis_68=0x105004 +serdes_preemphasis_69=0x105004 +serdes_preemphasis_70=0x105004 +serdes_preemphasis_71=0x105004 +serdes_preemphasis_72=0x105004 +serdes_preemphasis_73=0x105004 +serdes_preemphasis_74=0x105004 +serdes_preemphasis_75=0x105004 +serdes_preemphasis_76=0x105004 +serdes_preemphasis_77=0x105004 +serdes_preemphasis_78=0x105004 +serdes_preemphasis_79=0x105004 +serdes_preemphasis_80=0x61d01 +serdes_preemphasis_81=0x51b01 +serdes_preemphasis_82=0x105004 +serdes_preemphasis_83=0x105004 +serdes_preemphasis_100=0x43004 +serdes_preemphasis_102=0x105004 +serdes_preemphasis_103=0x105004 +serdes_preemphasis_104=0x105004 +serdes_preemphasis_105=0x105004 +serdes_preemphasis_106=0x105004 +serdes_preemphasis_107=0x105004 +serdes_preemphasis_108=0x105004 +serdes_preemphasis_109=0x105004 +serdes_preemphasis_110=0x105004 +serdes_preemphasis_111=0x105004 +serdes_preemphasis_112=0x105004 +serdes_preemphasis_113=0x105004 +serdes_preemphasis_114=0x61c01 +serdes_preemphasis_115=0x61c01 +serdes_preemphasis_116=0x105004 +serdes_preemphasis_117=0x105004 + +mmu_init_config="MSFT-TH2-Tier0" diff --git a/device/arista/x86_64-arista_7260cx3_64/default_sku b/device/arista/x86_64-arista_7260cx3_64/default_sku new file mode 100644 index 00000000000..959766d95f5 --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/default_sku @@ -0,0 +1 @@ +Arista-7260CX3-C64 t1 diff --git a/device/arista/x86_64-arista_7260cx3_64/fancontrol b/device/arista/x86_64-arista_7260cx3_64/fancontrol new file mode 100644 index 00000000000..eb64fb3e670 --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/fancontrol @@ -0,0 +1,10 @@ +INTERVAL=5 +DEVPATH=hwmon2=devices/pci0000:00/0000:00:1c.0/0000:06:00.0/i2c-1/1-004c hwmon4=devices/pci0000:ff/0000:ff:0b.3/i2c-85/85-0060 +DEVNAME=hwmon2=max6658 hwmon4=la_cpld +FCTEMPS=hwmon4/pwm4=hwmon2/temp1_input hwmon4/pwm3=hwmon2/temp1_input hwmon4/pwm2=hwmon2/temp1_input hwmon4/pwm1=hwmon2/temp1_input +FCFANS=hwmon4/pwm4=hwmon4/fan4_input hwmon4/pwm3=hwmon4/fan3_input hwmon4/pwm2=hwmon4/fan2_input hwmon4/pwm1=hwmon4/fan1_input +MINTEMP=hwmon4/pwm4=50 hwmon4/pwm3=50 hwmon4/pwm2=50 hwmon4/pwm1=50 +MINPWM=hwmon4/pwm4=128 hwmon4/pwm3=128 hwmon4/pwm2=128 hwmon4/pwm1=128 +MAXTEMP=hwmon4/pwm4=60 hwmon4/pwm3=60 hwmon4/pwm2=60 hwmon4/pwm1=60 +MINSTART=hwmon4/pwm4=128 hwmon4/pwm3=128 hwmon4/pwm2=128 hwmon4/pwm1=128 +MINSTOP=hwmon4/pwm4=128 hwmon4/pwm3=128 hwmon4/pwm2=128 hwmon4/pwm1=128 diff --git a/device/arista/x86_64-arista_7260cx3_64/platform_reboot b/device/arista/x86_64-arista_7260cx3_64/platform_reboot new file mode 120000 index 00000000000..7f94a49e38b --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/platform_reboot @@ -0,0 +1 @@ +../x86_64-arista_common/platform_reboot \ No newline at end of file diff --git a/device/arista/x86_64-arista_7260cx3_64/plugins b/device/arista/x86_64-arista_7260cx3_64/plugins new file mode 120000 index 00000000000..5fbbf98a628 --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/plugins @@ -0,0 +1 @@ +../x86_64-arista_common/plugins/ \ No newline at end of file diff --git a/device/arista/x86_64-arista_7260cx3_64/sensors.conf b/device/arista/x86_64-arista_7260cx3_64/sensors.conf new file mode 100644 index 00000000000..1dc02fbaef9 --- /dev/null +++ b/device/arista/x86_64-arista_7260cx3_64/sensors.conf @@ -0,0 +1,53 @@ +# libsensors configuration file for DCS-7260CX3-64 +# ------------------------------------------------# + +bus "i2c-1" "SCD 0000:06:00.0 SMBus master 0 bus 0" +bus "i2c-3" "SCD 0000:06:00.0 SMBus master 0 bus 2" +bus "i2c-4" "SCD 0000:06:00.0 SMBus master 0 bus 3" +bus "i2c-73" "SCD 0000:ff:0b.3 SMBus master 0 bus 0" +bus "i2c-88" "SCD 0000:ff:0b.3 SMBus master 3 bus 3" + +chip "max6658-i2c-1-4c" + label temp1 "Asic temp sensor" + + set temp1_max 65 + set temp1_crit 75 + + ignore temp2 + +chip "pmbus-i2c-3-58" + label temp1 "Power supply 1 hotspot sensor" + label temp2 "Power supply 1 inlet temp sensor" + label temp3 "Power supply 1 exhaust temp sensor" + + # setting maximum and critical thresholds is not supported for this psu + # fault and warning limits defined internally by hardware + + ignore fan2 + ignore fan3 + +chip "pmbus-i2c-4-58" + label temp1 "Power supply 2 hotspot sensor" + label temp2 "Power supply 2 inlet temp sensor" + label temp3 "Power supply 2 exhaust temp sensor" + + # setting maximum and critical thresholds is not supported for this psu + # fault and warning limits defined internally by hardware + + ignore fan2 + ignore fan3 + +chip "max6658-i2c-73-4c" + label temp1 "Back panel temp sensor 1" + label temp2 "Back panel temp sensor 2" + + set temp1_max 65 + set temp1_crit 75 + set temp2_max 65 + set temp2_crit 75 + +chip "lm73-i2c-88-48" + label temp1 "Front panel temp sensor" + + set temp1_max 65 + set temp1_crit 75 diff --git a/device/arista/x86_64-arista_7280cr3_32d4 b/device/arista/x86_64-arista_7280cr3_32d4 new file mode 120000 index 00000000000..d6e2ddbb64b --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3_32d4 @@ -0,0 +1 @@ +x86_64-arista_7280cr3_32p4 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/jr2-a7280cr3-32p4-28x100G-8x10G.config.bcm b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/jr2-a7280cr3-32p4-28x100G-8x10G.config.bcm new file mode 100644 index 00000000000..3d89e2b41b4 --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/jr2-a7280cr3-32p4-28x100G-8x10G.config.bcm @@ -0,0 +1,741 @@ +soc_family.BCM8869X=BCM8869X + +custom_feature_ucode_path=u_code_db2pem.txt +system_headers_mode=1 +suppress_unknown_prop_warnings=1 +l4_protocols_load_balancing_enable=1 +fabric_logical_port_base=512 +trunk_group_max_members=128 +num_olp_tm_ports.BCM8869X=1 + +ucode_port_0.BCM8869X=CPU.0:core_0.0 +ucode_port_200.BCM8869X=CPU.8:core_1.200 +ucode_port_201.BCM8869X=CPU.16:core_0.201 +ucode_port_202.BCM8869X=CPU.24:core_1.202 +ucode_port_203.BCM8869X=CPU.32:core_0.203 + +port_init_speed_xe.BCM8869X=10000 +port_init_speed_xl.BCM8869X=40000 +port_init_speed_le.BCM8869X=50000 +port_init_speed_ce.BCM8869X=100000 +port_init_speed_cc.BCM8869X=200000 +port_init_speed_cd.BCM8869X=400000 +port_init_speed_il.BCM8869X=10312 + +port_init_cl72=0 + +serdes_tx_taps_1=pam4:-16:64:0:3:0:0 +serdes_tx_taps_2=pam4:-16:64:0:3:0:0 +serdes_tx_taps_3=pam4:-16:64:0:3:0:0 +serdes_tx_taps_4=pam4:-16:64:0:3:0:0 +serdes_tx_taps_5=pam4:-16:64:0:3:0:0 +serdes_tx_taps_6=pam4:-16:64:0:3:0:0 +serdes_tx_taps_7=pam4:-16:64:0:3:0:0 +serdes_tx_taps_8=pam4:-16:64:0:3:0:0 +serdes_tx_taps_9=pam4:-8:60:0:0:0:0 +serdes_tx_taps_10=pam4:-8:60:0:0:0:0 +serdes_tx_taps_11=pam4:-8:60:0:0:0:0 +serdes_tx_taps_12=pam4:-8:60:0:0:0:0 +serdes_tx_taps_13=pam4:-8:60:0:0:0:0 +serdes_tx_taps_14=pam4:-8:60:0:0:0:0 +serdes_tx_taps_15=pam4:-8:60:0:0:0:0 +serdes_tx_taps_16=pam4:-8:60:0:0:0:0 +serdes_tx_taps_17=pam4:-8:60:0:0:0:0 +serdes_tx_taps_18=pam4:-8:60:0:0:0:0 +serdes_tx_taps_19=pam4:-8:60:0:0:0:0 +serdes_tx_taps_20=pam4:-8:60:0:0:0:0 +serdes_tx_taps_21=pam4:-8:60:0:0:0:0 +serdes_tx_taps_22=pam4:-8:60:0:0:0:0 +serdes_tx_taps_23=pam4:-8:60:0:0:0:0 +serdes_tx_taps_24=pam4:-8:60:0:0:0:0 +serdes_tx_taps_25=pam4:-8:60:0:0:0:0 +serdes_tx_taps_26=pam4:-8:60:0:0:0:0 +serdes_tx_taps_27=pam4:-8:60:0:0:0:0 +serdes_tx_taps_28=pam4:-8:60:0:0:0:0 +serdes_tx_taps_29=nrz:0:127:0:0:0:0 +serdes_tx_taps_30=nrz:0:127:0:0:0:0 +serdes_tx_taps_31=nrz:0:127:0:0:0:0 +serdes_tx_taps_32=nrz:0:127:0:0:0:0 +serdes_tx_taps_33=nrz:0:127:0:0:0:0 +serdes_tx_taps_34=nrz:0:127:0:0:0:0 +serdes_tx_taps_35=nrz:0:127:0:0:0:0 +serdes_tx_taps_36=nrz:0:127:0:0:0:0 + +ucode_port_100.BCM8869X=RCY_MIRROR.0:core_0.100 +ucode_port_101.BCM8869X=RCY_MIRROR.1:core_0.101 +ucode_port_102.BCM8869X=RCY_MIRROR.2:core_0.102 +ucode_port_103.BCM8869X=RCY_MIRROR.3:core_0.103 +ucode_port_104.BCM8869X=RCY_MIRROR.4:core_0.104 +ucode_port_105.BCM8869X=RCY_MIRROR.5:core_0.105 +ucode_port_106.BCM8869X=RCY_MIRROR.6:core_0.106 +ucode_port_107.BCM8869X=RCY_MIRROR.7:core_0.107 +ucode_port_108.BCM8869X=RCY_MIRROR.8:core_0.108 +ucode_port_109.BCM8869X=RCY_MIRROR.9:core_0.109 +ucode_port_110.BCM8869X=RCY_MIRROR.10:core_0.110 +ucode_port_111.BCM8869X=RCY_MIRROR.11:core_0.111 +ucode_port_112.BCM8869X=RCY_MIRROR.12:core_0.112 +ucode_port_113.BCM8869X=RCY_MIRROR.13:core_0.113 +ucode_port_114.BCM8869X=RCY_MIRROR.14:core_0.114 +ucode_port_115.BCM8869X=RCY_MIRROR.15:core_0.115 +ucode_port_116.BCM8869X=RCY_MIRROR.16:core_0.116 +ucode_port_117.BCM8869X=RCY_MIRROR.17:core_0.117 +ucode_port_118.BCM8869X=RCY_MIRROR.18:core_0.118 +ucode_port_119.BCM8869X=RCY_MIRROR.19:core_0.119 +ucode_port_120.BCM8869X=RCY_MIRROR.0:core_1.120 +ucode_port_121.BCM8869X=RCY_MIRROR.1:core_1.121 +ucode_port_122.BCM8869X=RCY_MIRROR.2:core_1.122 +ucode_port_123.BCM8869X=RCY_MIRROR.3:core_1.123 +ucode_port_124.BCM8869X=RCY_MIRROR.4:core_1.124 +ucode_port_125.BCM8869X=RCY_MIRROR.5:core_1.125 +ucode_port_126.BCM8869X=RCY_MIRROR.6:core_1.126 +ucode_port_127.BCM8869X=RCY_MIRROR.7:core_1.127 +ucode_port_128.BCM8869X=RCY_MIRROR.8:core_1.128 +ucode_port_129.BCM8869X=RCY_MIRROR.9:core_1.129 +ucode_port_130.BCM8869X=RCY_MIRROR.10:core_1.130 +ucode_port_131.BCM8869X=RCY_MIRROR.11:core_1.131 +ucode_port_132.BCM8869X=RCY_MIRROR.12:core_1.132 +ucode_port_133.BCM8869X=RCY_MIRROR.13:core_1.133 +ucode_port_134.BCM8869X=RCY_MIRROR.14:core_1.134 +ucode_port_135.BCM8869X=RCY_MIRROR.15:core_1.135 +ucode_port_136.BCM8869X=RCY_MIRROR.16:core_1.136 +ucode_port_137.BCM8869X=RCY_MIRROR.17:core_1.137 +ucode_port_138.BCM8869X=RCY_MIRROR.18:core_1.138 +ucode_port_139.BCM8869X=RCY_MIRROR.19:core_1.139 + +port_priorities.BCM8869X=8 + +ucode_port_240.BCM8869X=OLP:core_0.240 + +sw_state_max_size.BCM8869X=750000000 + +stable_location.BCM8869X=4 +stable_location.BCM8869X_ADAPTER=3 + +stable_filename.BCM8869X_ADAPTER=warmboot_data_0 +stable_filename=/dev/shm/warmboot_data_0 +stable_filename.1=/dev/shm/warmboot_data_1 +stable_filename.2=/dev/shm/warmboot_data_2 + +stable_size.BCM8869X=800000000 + +tm_port_header_type_in_0.BCM8869X=INJECTED_2 +tm_port_header_type_out_0.BCM8869X=CPU + +tm_port_header_type_in_200.BCM8869X=INJECTED_2_PP +tm_port_header_type_out_200.BCM8869X=ETH +tm_port_header_type_in_201.BCM8869X=INJECTED_2_PP +tm_port_header_type_out_201.BCM8869X=ETH +tm_port_header_type_in_202.BCM8869X=INJECTED_2_PP +tm_port_header_type_out_202.BCM8869X=ETH +tm_port_header_type_in_203.BCM8869X=INJECTED_2_PP +tm_port_header_type_out_203.BCM8869X=ETH + +sat_enable.BCM8869X=1 +tm_port_header_type_out_218.BCM8869X=CPU +tm_port_header_type_in_218.BCM8869X=INJECTED_2 + +tm_port_header_type_in_232.BCM8869X=INJECTED_2 +tm_port_header_type_out_232.BCM8869X=CPU +tm_port_header_type_in_233.BCM8869X=INJECTED_2 +tm_port_header_type_out_233.BCM8869X=CPU + +tm_port_header_type_in_240.BCM8869X=INJECTED_2 +tm_port_header_type_out_240.BCM8869X=RAW + +dtm_flow_mapping_mode_region_64.BCM8869X=3 +dtm_flow_mapping_mode_region_65.BCM8869X=3 +dtm_flow_mapping_mode_region_66.BCM8869X=3 +dtm_flow_mapping_mode_region_67.BCM8869X=3 +dtm_flow_mapping_mode_region_68.BCM8869X=3 +dtm_flow_mapping_mode_region_69.BCM8869X=3 +dtm_flow_mapping_mode_region_70.BCM8869X=3 +dtm_flow_mapping_mode_region_71.BCM8869X=3 +dtm_flow_mapping_mode_region_72.BCM8869X=3 +dtm_flow_mapping_mode_region_73.BCM8869X=3 +dtm_flow_mapping_mode_region_74.BCM8869X=3 +dtm_flow_mapping_mode_region_75.BCM8869X=3 +dtm_flow_mapping_mode_region_76.BCM8869X=3 +dtm_flow_mapping_mode_region_77.BCM8869X=3 +dtm_flow_mapping_mode_region_78.BCM8869X=3 +dtm_flow_mapping_mode_region_79.BCM8869X=7 +dtm_flow_mapping_mode_region_80.BCM8869X=3 +dtm_flow_mapping_mode_region_81.BCM8869X=1 +dtm_flow_mapping_mode_region_82.BCM8869X=3 +dtm_flow_mapping_mode_region_83.BCM8869X=3 +dtm_flow_mapping_mode_region_84.BCM8869X=3 +dtm_flow_mapping_mode_region_85.BCM8869X=3 +dtm_flow_mapping_mode_region_86.BCM8869X=3 +dtm_flow_mapping_mode_region_87.BCM8869X=3 +dtm_flow_mapping_mode_region_88.BCM8869X=3 +dtm_flow_mapping_mode_region_89.BCM8869X=3 +dtm_flow_mapping_mode_region_90.BCM8869X=3 +dtm_flow_mapping_mode_region_91.BCM8869X=3 +dtm_flow_mapping_mode_region_92.BCM8869X=3 +dtm_flow_mapping_mode_region_93.BCM8869X=3 +dtm_flow_mapping_mode_region_94.BCM8869X=3 + +dtm_flow_nof_remote_cores_region_1.BCM8869X=2 +dtm_flow_nof_remote_cores_region_2.BCM8869X=2 +dtm_flow_nof_remote_cores_region_3.BCM8869X=2 +dtm_flow_nof_remote_cores_region_4.BCM8869X=2 +dtm_flow_nof_remote_cores_region_5.BCM8869X=2 +dtm_flow_nof_remote_cores_region_6.BCM8869X=2 +dtm_flow_nof_remote_cores_region_7.BCM8869X=2 +dtm_flow_nof_remote_cores_region_8.BCM8869X=2 +dtm_flow_nof_remote_cores_region_9.BCM8869X=2 +dtm_flow_nof_remote_cores_region_10.BCM8869X=2 +dtm_flow_nof_remote_cores_region_11.BCM8869X=2 +dtm_flow_nof_remote_cores_region_12.BCM8869X=2 +dtm_flow_nof_remote_cores_region_13.BCM8869X=2 +dtm_flow_nof_remote_cores_region_14.BCM8869X=2 +dtm_flow_nof_remote_cores_region_15.BCM8869X=2 +dtm_flow_nof_remote_cores_region_16.BCM8869X=2 +dtm_flow_nof_remote_cores_region_17.BCM8869X=2 +dtm_flow_nof_remote_cores_region_18.BCM8869X=2 +dtm_flow_nof_remote_cores_region_19.BCM8869X=2 +dtm_flow_nof_remote_cores_region_20.BCM8869X=2 +dtm_flow_nof_remote_cores_region_21.BCM8869X=2 +dtm_flow_nof_remote_cores_region_22.BCM8869X=2 +dtm_flow_nof_remote_cores_region_23.BCM8869X=2 +dtm_flow_nof_remote_cores_region_24.BCM8869X=2 +dtm_flow_nof_remote_cores_region_25.BCM8869X=2 +dtm_flow_nof_remote_cores_region_26.BCM8869X=2 +dtm_flow_nof_remote_cores_region_27.BCM8869X=2 +dtm_flow_nof_remote_cores_region_28.BCM8869X=2 +dtm_flow_nof_remote_cores_region_29.BCM8869X=2 +dtm_flow_nof_remote_cores_region_30.BCM8869X=2 +dtm_flow_nof_remote_cores_region_31.BCM8869X=2 +dtm_flow_nof_remote_cores_region_32.BCM8869X=2 +dtm_flow_nof_remote_cores_region_33.BCM8869X=2 +dtm_flow_nof_remote_cores_region_34.BCM8869X=2 +dtm_flow_nof_remote_cores_region_35.BCM8869X=2 +dtm_flow_nof_remote_cores_region_36.BCM8869X=2 +dtm_flow_nof_remote_cores_region_37.BCM8869X=2 +dtm_flow_nof_remote_cores_region_38.BCM8869X=2 +dtm_flow_nof_remote_cores_region_39.BCM8869X=2 +dtm_flow_nof_remote_cores_region_40.BCM8869X=2 +dtm_flow_nof_remote_cores_region_41.BCM8869X=2 +dtm_flow_nof_remote_cores_region_42.BCM8869X=2 +dtm_flow_nof_remote_cores_region_43.BCM8869X=2 +dtm_flow_nof_remote_cores_region_44.BCM8869X=2 +dtm_flow_nof_remote_cores_region_45.BCM8869X=2 +dtm_flow_nof_remote_cores_region_46.BCM8869X=2 +dtm_flow_nof_remote_cores_region_47.BCM8869X=2 +dtm_flow_nof_remote_cores_region_48.BCM8869X=2 +dtm_flow_nof_remote_cores_region_49.BCM8869X=2 +dtm_flow_nof_remote_cores_region_50.BCM8869X=2 +dtm_flow_nof_remote_cores_region_51.BCM8869X=2 +dtm_flow_nof_remote_cores_region_52.BCM8869X=2 +dtm_flow_nof_remote_cores_region_53.BCM8869X=2 +dtm_flow_nof_remote_cores_region_54.BCM8869X=2 +dtm_flow_nof_remote_cores_region_55.BCM8869X=2 +dtm_flow_nof_remote_cores_region_56.BCM8869X=2 +dtm_flow_nof_remote_cores_region_57.BCM8869X=2 +dtm_flow_nof_remote_cores_region_58.BCM8869X=2 +dtm_flow_nof_remote_cores_region_59.BCM8869X=2 +dtm_flow_nof_remote_cores_region_60.BCM8869X=2 + +mdb_profile.BCM8869X=l3-xl + +outlif_logical_to_physical_phase_map_1=S1 +outlif_logical_to_physical_phase_map_2=L1 +outlif_logical_to_physical_phase_map_3=XL +outlif_logical_to_physical_phase_map_4=L2 +outlif_logical_to_physical_phase_map_5=M1 +outlif_logical_to_physical_phase_map_6=M2 +outlif_logical_to_physical_phase_map_7=M3 +outlif_logical_to_physical_phase_map_8=S2 + +outlif_physical_phase_data_granularity_S1=60 +outlif_physical_phase_data_granularity_S2=60 +outlif_physical_phase_data_granularity_M1=60 +outlif_physical_phase_data_granularity_M2=60 +outlif_physical_phase_data_granularity_M3=60 +outlif_physical_phase_data_granularity_L1=60 +outlif_physical_phase_data_granularity_L2=60 +outlif_physical_phase_data_granularity_XL=60 + +port_init_speed_fabric.BCM8869X=53125 + +fabric_connect_mode.BCM8869X=SINGLE_FAP +protocol_traps_mode.BCM8869X=IN_LIF + +schan_intr_enable.BCM8869X=0 +tdma_intr_enable.BCM8869X=0 +tslam_intr_enable.BCM8869X=0 +miim_intr_enable.BCM8869X=0 +schan_timeout_usec.BCM8869X=300000 +tdma_timeout_usec.BCM8869X=1000000 +tslam_timeout_usec.BCM8869X=1000000 + +appl_enable_intr_init.BCM8869X=1 +polled_irq_mode.BCM8869X=1 +polled_irq_delay.BCM8869X=1000 + +bcm_stat_interval.BCM8869X=1000 + +mem_cache_enable_ecc.BCM8869X=1 +mem_cache_enable_parity.BCM8869X=1 + +serdes_nif_clk_freq_in.BCM8869X_A0=2 +serdes_nif_clk_freq_out.BCM8869X_A0=1 +serdes_fabric_clk_freq_in.BCM8869X_A0=2 +serdes_fabric_clk_freq_out.BCM8869X_A0=1 + +serdes_nif_clk_freq_in.BCM8869X=1 +serdes_nif_clk_freq_out.BCM8869X=bypass +serdes_fabric_clk_freq_in.BCM8869X=1 +serdes_fabric_clk_freq_out.BCM8869X=bypass + +dram_phy_tune_mode_on_init.BCM8869X=RUN_TUNE + +dport_map_direct.BCM8869X=1 + +pmf_sexem3_stage.BCM8869X=IPMF3 + +lane_to_serdes_map_fabric_lane0.0=rx0:tx0 +lane_to_serdes_map_fabric_lane1.0=rx1:tx1 +lane_to_serdes_map_fabric_lane2.0=rx2:tx2 +lane_to_serdes_map_fabric_lane3.0=rx3:tx3 +lane_to_serdes_map_fabric_lane4.0=rx4:tx4 +lane_to_serdes_map_fabric_lane5.0=rx5:tx5 +lane_to_serdes_map_fabric_lane6.0=rx6:tx6 +lane_to_serdes_map_fabric_lane7.0=rx7:tx7 +lane_to_serdes_map_fabric_lane8.0=rx8:tx8 +lane_to_serdes_map_fabric_lane9.0=rx9:tx9 +lane_to_serdes_map_fabric_lane10.0=rx10:tx10 +lane_to_serdes_map_fabric_lane11.0=rx11:tx11 +lane_to_serdes_map_fabric_lane12.0=rx12:tx12 +lane_to_serdes_map_fabric_lane13.0=rx13:tx13 +lane_to_serdes_map_fabric_lane14.0=rx14:tx14 +lane_to_serdes_map_fabric_lane15.0=rx15:tx15 +lane_to_serdes_map_fabric_lane16.0=rx16:tx16 +lane_to_serdes_map_fabric_lane17.0=rx17:tx17 +lane_to_serdes_map_fabric_lane18.0=rx18:tx18 +lane_to_serdes_map_fabric_lane19.0=rx19:tx19 +lane_to_serdes_map_fabric_lane20.0=rx20:tx20 +lane_to_serdes_map_fabric_lane21.0=rx21:tx21 +lane_to_serdes_map_fabric_lane22.0=rx22:tx22 +lane_to_serdes_map_fabric_lane23.0=rx23:tx23 +lane_to_serdes_map_fabric_lane24.0=rx24:tx24 +lane_to_serdes_map_fabric_lane25.0=rx25:tx25 +lane_to_serdes_map_fabric_lane26.0=rx26:tx26 +lane_to_serdes_map_fabric_lane27.0=rx27:tx27 +lane_to_serdes_map_fabric_lane28.0=rx28:tx28 +lane_to_serdes_map_fabric_lane29.0=rx29:tx29 +lane_to_serdes_map_fabric_lane30.0=rx30:tx30 +lane_to_serdes_map_fabric_lane31.0=rx31:tx31 +lane_to_serdes_map_fabric_lane32.0=rx32:tx32 +lane_to_serdes_map_fabric_lane33.0=rx33:tx33 +lane_to_serdes_map_fabric_lane34.0=rx34:tx34 +lane_to_serdes_map_fabric_lane35.0=rx35:tx35 +lane_to_serdes_map_fabric_lane36.0=rx36:tx36 +lane_to_serdes_map_fabric_lane37.0=rx37:tx37 +lane_to_serdes_map_fabric_lane38.0=rx38:tx38 +lane_to_serdes_map_fabric_lane39.0=rx39:tx39 +lane_to_serdes_map_fabric_lane40.0=rx40:tx40 +lane_to_serdes_map_fabric_lane41.0=rx41:tx41 +lane_to_serdes_map_fabric_lane42.0=rx42:tx42 +lane_to_serdes_map_fabric_lane43.0=rx43:tx43 +lane_to_serdes_map_fabric_lane44.0=rx44:tx44 +lane_to_serdes_map_fabric_lane45.0=rx45:tx45 +lane_to_serdes_map_fabric_lane46.0=rx46:tx46 +lane_to_serdes_map_fabric_lane47.0=rx47:tx47 +lane_to_serdes_map_fabric_lane48.0=rx48:tx48 +lane_to_serdes_map_fabric_lane49.0=rx49:tx49 +lane_to_serdes_map_fabric_lane50.0=rx50:tx50 +lane_to_serdes_map_fabric_lane51.0=rx51:tx51 +lane_to_serdes_map_fabric_lane52.0=rx52:tx52 +lane_to_serdes_map_fabric_lane53.0=rx53:tx53 +lane_to_serdes_map_fabric_lane54.0=rx54:tx54 +lane_to_serdes_map_fabric_lane55.0=rx55:tx55 +lane_to_serdes_map_fabric_lane56.0=rx56:tx56 +lane_to_serdes_map_fabric_lane57.0=rx57:tx57 +lane_to_serdes_map_fabric_lane58.0=rx58:tx58 +lane_to_serdes_map_fabric_lane59.0=rx59:tx59 +lane_to_serdes_map_fabric_lane60.0=rx60:tx60 +lane_to_serdes_map_fabric_lane61.0=rx61:tx61 +lane_to_serdes_map_fabric_lane62.0=rx62:tx62 +lane_to_serdes_map_fabric_lane63.0=rx63:tx63 +lane_to_serdes_map_fabric_lane64.0=rx64:tx64 +lane_to_serdes_map_fabric_lane65.0=rx65:tx65 +lane_to_serdes_map_fabric_lane66.0=rx66:tx66 +lane_to_serdes_map_fabric_lane67.0=rx67:tx67 +lane_to_serdes_map_fabric_lane68.0=rx68:tx68 +lane_to_serdes_map_fabric_lane69.0=rx69:tx69 +lane_to_serdes_map_fabric_lane70.0=rx70:tx70 +lane_to_serdes_map_fabric_lane71.0=rx71:tx71 +lane_to_serdes_map_fabric_lane72.0=rx72:tx72 +lane_to_serdes_map_fabric_lane73.0=rx73:tx73 +lane_to_serdes_map_fabric_lane74.0=rx74:tx74 +lane_to_serdes_map_fabric_lane75.0=rx75:tx75 +lane_to_serdes_map_fabric_lane76.0=rx76:tx76 +lane_to_serdes_map_fabric_lane77.0=rx77:tx77 +lane_to_serdes_map_fabric_lane78.0=rx78:tx78 +lane_to_serdes_map_fabric_lane79.0=rx79:tx79 +lane_to_serdes_map_fabric_lane80.0=rx80:tx80 +lane_to_serdes_map_fabric_lane81.0=rx81:tx81 +lane_to_serdes_map_fabric_lane82.0=rx82:tx82 +lane_to_serdes_map_fabric_lane83.0=rx83:tx83 +lane_to_serdes_map_fabric_lane84.0=rx84:tx84 +lane_to_serdes_map_fabric_lane85.0=rx85:tx85 +lane_to_serdes_map_fabric_lane86.0=rx86:tx86 +lane_to_serdes_map_fabric_lane87.0=rx87:tx87 +lane_to_serdes_map_fabric_lane88.0=rx88:tx88 +lane_to_serdes_map_fabric_lane89.0=rx89:tx89 +lane_to_serdes_map_fabric_lane90.0=rx90:tx90 +lane_to_serdes_map_fabric_lane91.0=rx91:tx91 +lane_to_serdes_map_fabric_lane92.0=rx92:tx92 +lane_to_serdes_map_fabric_lane93.0=rx93:tx93 +lane_to_serdes_map_fabric_lane94.0=rx94:tx94 +lane_to_serdes_map_fabric_lane95.0=rx95:tx95 +lane_to_serdes_map_fabric_lane96.0=rx96:tx96 +lane_to_serdes_map_fabric_lane97.0=rx97:tx97 +lane_to_serdes_map_fabric_lane98.0=rx98:tx98 +lane_to_serdes_map_fabric_lane99.0=rx99:tx99 +lane_to_serdes_map_fabric_lane100.0=rx100:tx100 +lane_to_serdes_map_fabric_lane101.0=rx101:tx101 +lane_to_serdes_map_fabric_lane102.0=rx102:tx102 +lane_to_serdes_map_fabric_lane103.0=rx103:tx103 +lane_to_serdes_map_fabric_lane104.0=rx104:tx104 +lane_to_serdes_map_fabric_lane105.0=rx105:tx105 +lane_to_serdes_map_fabric_lane106.0=rx106:tx106 +lane_to_serdes_map_fabric_lane107.0=rx107:tx107 +lane_to_serdes_map_fabric_lane108.0=rx108:tx108 +lane_to_serdes_map_fabric_lane109.0=rx109:tx109 +lane_to_serdes_map_fabric_lane110.0=rx110:tx110 +lane_to_serdes_map_fabric_lane111.0=rx111:tx111 + +lane_to_serdes_map_nif_lane0.0=rx5:tx7 +lane_to_serdes_map_nif_lane1.0=rx7:tx6 +lane_to_serdes_map_nif_lane2.0=rx4:tx5 +lane_to_serdes_map_nif_lane3.0=rx6:tx4 +lane_to_serdes_map_nif_lane4.0=rx0:tx0 +lane_to_serdes_map_nif_lane5.0=rx1:tx1 +lane_to_serdes_map_nif_lane6.0=rx2:tx3 +lane_to_serdes_map_nif_lane7.0=rx3:tx2 +lane_to_serdes_map_nif_lane8.0=rx13:tx15 +lane_to_serdes_map_nif_lane9.0=rx12:tx14 +lane_to_serdes_map_nif_lane10.0=rx15:tx13 +lane_to_serdes_map_nif_lane11.0=rx14:tx12 +lane_to_serdes_map_nif_lane12.0=rx10:tx10 +lane_to_serdes_map_nif_lane13.0=rx8:tx9 +lane_to_serdes_map_nif_lane14.0=rx9:tx11 +lane_to_serdes_map_nif_lane15.0=rx11:tx8 +lane_to_serdes_map_nif_lane16.0=rx23:tx23 +lane_to_serdes_map_nif_lane17.0=rx21:tx22 +lane_to_serdes_map_nif_lane18.0=rx22:tx21 +lane_to_serdes_map_nif_lane19.0=rx20:tx20 +lane_to_serdes_map_nif_lane20.0=rx16:tx18 +lane_to_serdes_map_nif_lane21.0=rx17:tx17 +lane_to_serdes_map_nif_lane22.0=rx18:tx16 +lane_to_serdes_map_nif_lane23.0=rx19:tx19 +lane_to_serdes_map_nif_lane24.0=rx31:tx31 +lane_to_serdes_map_nif_lane25.0=rx30:tx30 +lane_to_serdes_map_nif_lane26.0=rx29:tx29 +lane_to_serdes_map_nif_lane27.0=rx28:tx28 +lane_to_serdes_map_nif_lane28.0=rx24:tx26 +lane_to_serdes_map_nif_lane29.0=rx26:tx25 +lane_to_serdes_map_nif_lane30.0=rx25:tx24 +lane_to_serdes_map_nif_lane31.0=rx27:tx27 +lane_to_serdes_map_nif_lane32.0=rx39:tx35 +lane_to_serdes_map_nif_lane33.0=rx38:tx36 +lane_to_serdes_map_nif_lane34.0=rx32:tx32 +lane_to_serdes_map_nif_lane35.0=rx37:tx37 +lane_to_serdes_map_nif_lane36.0=rx33:tx34 +lane_to_serdes_map_nif_lane37.0=rx34:tx38 +lane_to_serdes_map_nif_lane38.0=rx35:tx33 +lane_to_serdes_map_nif_lane39.0=rx36:tx39 +lane_to_serdes_map_nif_lane40.0=rx44:tx47 +lane_to_serdes_map_nif_lane41.0=rx43:tx41 +lane_to_serdes_map_nif_lane42.0=rx47:tx46 +lane_to_serdes_map_nif_lane43.0=rx42:tx42 +lane_to_serdes_map_nif_lane44.0=rx45:tx45 +lane_to_serdes_map_nif_lane45.0=rx41:tx40 +lane_to_serdes_map_nif_lane46.0=rx46:tx44 +lane_to_serdes_map_nif_lane47.0=rx40:tx43 +lane_to_serdes_map_nif_lane48.0=rx55:tx55 +lane_to_serdes_map_nif_lane49.0=rx54:tx54 +lane_to_serdes_map_nif_lane50.0=rx53:tx53 +lane_to_serdes_map_nif_lane51.0=rx52:tx52 +lane_to_serdes_map_nif_lane52.0=rx48:tx48 +lane_to_serdes_map_nif_lane53.0=rx49:tx49 +lane_to_serdes_map_nif_lane54.0=rx50:tx50 +lane_to_serdes_map_nif_lane55.0=rx51:tx51 +lane_to_serdes_map_nif_lane56.0=rx60:tx60 +lane_to_serdes_map_nif_lane57.0=rx61:tx61 +lane_to_serdes_map_nif_lane58.0=rx62:tx63 +lane_to_serdes_map_nif_lane59.0=rx63:tx62 +lane_to_serdes_map_nif_lane60.0=rx58:tx59 +lane_to_serdes_map_nif_lane61.0=rx59:tx56 +lane_to_serdes_map_nif_lane62.0=rx57:tx58 +lane_to_serdes_map_nif_lane63.0=rx56:tx57 +lane_to_serdes_map_nif_lane64.0=rx68:tx69 +lane_to_serdes_map_nif_lane65.0=rx69:tx68 +lane_to_serdes_map_nif_lane66.0=rx70:tx71 +lane_to_serdes_map_nif_lane67.0=rx71:tx70 +lane_to_serdes_map_nif_lane68.0=rx67:tx64 +lane_to_serdes_map_nif_lane69.0=rx66:tx67 +lane_to_serdes_map_nif_lane70.0=rx65:tx65 +lane_to_serdes_map_nif_lane71.0=rx64:tx66 +lane_to_serdes_map_nif_lane72.0=rx78:tx76 +lane_to_serdes_map_nif_lane73.0=rx76:tx77 +lane_to_serdes_map_nif_lane74.0=rx79:tx78 +lane_to_serdes_map_nif_lane75.0=rx77:tx79 +lane_to_serdes_map_nif_lane76.0=rx75:tx72 +lane_to_serdes_map_nif_lane77.0=rx74:tx75 +lane_to_serdes_map_nif_lane78.0=rx73:tx73 +lane_to_serdes_map_nif_lane79.0=rx72:tx74 +lane_to_serdes_map_nif_lane80.0=rx81:tx83 +lane_to_serdes_map_nif_lane81.0=rx85:tx84 +lane_to_serdes_map_nif_lane82.0=rx80:tx80 +lane_to_serdes_map_nif_lane83.0=rx86:tx85 +lane_to_serdes_map_nif_lane84.0=rx82:tx82 +lane_to_serdes_map_nif_lane85.0=rx87:tx86 +lane_to_serdes_map_nif_lane86.0=rx83:tx81 +lane_to_serdes_map_nif_lane87.0=rx84:tx87 +lane_to_serdes_map_nif_lane88.0=rx91:tx95 +lane_to_serdes_map_nif_lane89.0=rx90:tx89 +lane_to_serdes_map_nif_lane90.0=rx95:tx94 +lane_to_serdes_map_nif_lane91.0=rx89:tx90 +lane_to_serdes_map_nif_lane92.0=rx93:tx93 +lane_to_serdes_map_nif_lane93.0=rx94:tx88 +lane_to_serdes_map_nif_lane94.0=rx92:tx92 +lane_to_serdes_map_nif_lane95.0=rx88:tx91 +phy_rx_polarity_flip_phy0=0 +phy_rx_polarity_flip_phy1=1 +phy_rx_polarity_flip_phy2=0 +phy_rx_polarity_flip_phy3=0 +phy_rx_polarity_flip_phy4=0 +phy_rx_polarity_flip_phy5=0 +phy_rx_polarity_flip_phy6=0 +phy_rx_polarity_flip_phy7=0 +phy_rx_polarity_flip_phy8=1 +phy_rx_polarity_flip_phy9=1 +phy_rx_polarity_flip_phy10=1 +phy_rx_polarity_flip_phy11=1 +phy_rx_polarity_flip_phy12=0 +phy_rx_polarity_flip_phy13=1 +phy_rx_polarity_flip_phy14=1 +phy_rx_polarity_flip_phy15=1 +phy_rx_polarity_flip_phy16=0 +phy_rx_polarity_flip_phy17=1 +phy_rx_polarity_flip_phy18=1 +phy_rx_polarity_flip_phy19=0 +phy_rx_polarity_flip_phy20=0 +phy_rx_polarity_flip_phy21=0 +phy_rx_polarity_flip_phy22=0 +phy_rx_polarity_flip_phy23=0 +phy_rx_polarity_flip_phy24=1 +phy_rx_polarity_flip_phy25=1 +phy_rx_polarity_flip_phy26=1 +phy_rx_polarity_flip_phy27=0 +phy_rx_polarity_flip_phy28=0 +phy_rx_polarity_flip_phy29=1 +phy_rx_polarity_flip_phy30=1 +phy_rx_polarity_flip_phy31=0 +phy_rx_polarity_flip_phy32=0 +phy_rx_polarity_flip_phy33=1 +phy_rx_polarity_flip_phy34=1 +phy_rx_polarity_flip_phy35=0 +phy_rx_polarity_flip_phy36=0 +phy_rx_polarity_flip_phy37=0 +phy_rx_polarity_flip_phy38=1 +phy_rx_polarity_flip_phy39=0 +phy_rx_polarity_flip_phy40=1 +phy_rx_polarity_flip_phy41=1 +phy_rx_polarity_flip_phy42=0 +phy_rx_polarity_flip_phy43=0 +phy_rx_polarity_flip_phy44=1 +phy_rx_polarity_flip_phy45=1 +phy_rx_polarity_flip_phy46=0 +phy_rx_polarity_flip_phy47=0 +phy_rx_polarity_flip_phy48=1 +phy_rx_polarity_flip_phy49=1 +phy_rx_polarity_flip_phy50=1 +phy_rx_polarity_flip_phy51=1 +phy_rx_polarity_flip_phy52=0 +phy_rx_polarity_flip_phy53=0 +phy_rx_polarity_flip_phy54=0 +phy_rx_polarity_flip_phy55=0 +phy_rx_polarity_flip_phy56=0 +phy_rx_polarity_flip_phy57=0 +phy_rx_polarity_flip_phy58=0 +phy_rx_polarity_flip_phy59=0 +phy_rx_polarity_flip_phy60=1 +phy_rx_polarity_flip_phy61=1 +phy_rx_polarity_flip_phy62=1 +phy_rx_polarity_flip_phy63=1 +phy_rx_polarity_flip_phy64=1 +phy_rx_polarity_flip_phy65=1 +phy_rx_polarity_flip_phy66=1 +phy_rx_polarity_flip_phy67=1 +phy_rx_polarity_flip_phy68=1 +phy_rx_polarity_flip_phy69=1 +phy_rx_polarity_flip_phy70=1 +phy_rx_polarity_flip_phy71=1 +phy_rx_polarity_flip_phy72=1 +phy_rx_polarity_flip_phy73=0 +phy_rx_polarity_flip_phy74=0 +phy_rx_polarity_flip_phy75=1 +phy_rx_polarity_flip_phy76=1 +phy_rx_polarity_flip_phy77=1 +phy_rx_polarity_flip_phy78=1 +phy_rx_polarity_flip_phy79=1 +phy_rx_polarity_flip_phy80=0 +phy_rx_polarity_flip_phy81=0 +phy_rx_polarity_flip_phy82=1 +phy_rx_polarity_flip_phy83=1 +phy_rx_polarity_flip_phy84=1 +phy_rx_polarity_flip_phy85=0 +phy_rx_polarity_flip_phy86=1 +phy_rx_polarity_flip_phy87=1 +phy_rx_polarity_flip_phy88=0 +phy_rx_polarity_flip_phy89=0 +phy_rx_polarity_flip_phy90=1 +phy_rx_polarity_flip_phy91=1 +phy_rx_polarity_flip_phy92=0 +phy_rx_polarity_flip_phy93=1 +phy_rx_polarity_flip_phy94=0 +phy_rx_polarity_flip_phy95=0 +phy_tx_polarity_flip_phy0=1 +phy_tx_polarity_flip_phy1=1 +phy_tx_polarity_flip_phy2=1 +phy_tx_polarity_flip_phy3=1 +phy_tx_polarity_flip_phy4=1 +phy_tx_polarity_flip_phy5=1 +phy_tx_polarity_flip_phy6=0 +phy_tx_polarity_flip_phy7=0 +phy_tx_polarity_flip_phy8=1 +phy_tx_polarity_flip_phy9=1 +phy_tx_polarity_flip_phy10=1 +phy_tx_polarity_flip_phy11=1 +phy_tx_polarity_flip_phy12=1 +phy_tx_polarity_flip_phy13=1 +phy_tx_polarity_flip_phy14=0 +phy_tx_polarity_flip_phy15=0 +phy_tx_polarity_flip_phy16=0 +phy_tx_polarity_flip_phy17=0 +phy_tx_polarity_flip_phy18=0 +phy_tx_polarity_flip_phy19=0 +phy_tx_polarity_flip_phy20=0 +phy_tx_polarity_flip_phy21=0 +phy_tx_polarity_flip_phy22=0 +phy_tx_polarity_flip_phy23=0 +phy_tx_polarity_flip_phy24=0 +phy_tx_polarity_flip_phy25=0 +phy_tx_polarity_flip_phy26=0 +phy_tx_polarity_flip_phy27=0 +phy_tx_polarity_flip_phy28=0 +phy_tx_polarity_flip_phy29=0 +phy_tx_polarity_flip_phy30=0 +phy_tx_polarity_flip_phy31=0 +phy_tx_polarity_flip_phy32=0 +phy_tx_polarity_flip_phy33=0 +phy_tx_polarity_flip_phy34=1 +phy_tx_polarity_flip_phy35=1 +phy_tx_polarity_flip_phy36=1 +phy_tx_polarity_flip_phy37=0 +phy_tx_polarity_flip_phy38=0 +phy_tx_polarity_flip_phy39=1 +phy_tx_polarity_flip_phy40=1 +phy_tx_polarity_flip_phy41=1 +phy_tx_polarity_flip_phy42=0 +phy_tx_polarity_flip_phy43=1 +phy_tx_polarity_flip_phy44=1 +phy_tx_polarity_flip_phy45=1 +phy_tx_polarity_flip_phy46=0 +phy_tx_polarity_flip_phy47=0 +phy_tx_polarity_flip_phy48=0 +phy_tx_polarity_flip_phy49=0 +phy_tx_polarity_flip_phy50=0 +phy_tx_polarity_flip_phy51=0 +phy_tx_polarity_flip_phy52=0 +phy_tx_polarity_flip_phy53=0 +phy_tx_polarity_flip_phy54=0 +phy_tx_polarity_flip_phy55=0 +phy_tx_polarity_flip_phy56=1 +phy_tx_polarity_flip_phy57=1 +phy_tx_polarity_flip_phy58=0 +phy_tx_polarity_flip_phy59=0 +phy_tx_polarity_flip_phy60=1 +phy_tx_polarity_flip_phy61=1 +phy_tx_polarity_flip_phy62=0 +phy_tx_polarity_flip_phy63=0 +phy_tx_polarity_flip_phy64=0 +phy_tx_polarity_flip_phy65=0 +phy_tx_polarity_flip_phy66=0 +phy_tx_polarity_flip_phy67=0 +phy_tx_polarity_flip_phy68=0 +phy_tx_polarity_flip_phy69=0 +phy_tx_polarity_flip_phy70=1 +phy_tx_polarity_flip_phy71=1 +phy_tx_polarity_flip_phy72=1 +phy_tx_polarity_flip_phy73=1 +phy_tx_polarity_flip_phy74=1 +phy_tx_polarity_flip_phy75=1 +phy_tx_polarity_flip_phy76=0 +phy_tx_polarity_flip_phy77=0 +phy_tx_polarity_flip_phy78=1 +phy_tx_polarity_flip_phy79=1 +phy_tx_polarity_flip_phy80=0 +phy_tx_polarity_flip_phy81=1 +phy_tx_polarity_flip_phy82=1 +phy_tx_polarity_flip_phy83=1 +phy_tx_polarity_flip_phy84=1 +phy_tx_polarity_flip_phy85=0 +phy_tx_polarity_flip_phy86=0 +phy_tx_polarity_flip_phy87=1 +phy_tx_polarity_flip_phy88=1 +phy_tx_polarity_flip_phy89=0 +phy_tx_polarity_flip_phy90=0 +phy_tx_polarity_flip_phy91=1 +phy_tx_polarity_flip_phy92=1 +phy_tx_polarity_flip_phy93=1 +phy_tx_polarity_flip_phy94=0 +phy_tx_polarity_flip_phy95=0 + +ucode_port_1=CGE2_0:core_0.1 +ucode_port_2=CGE2_1:core_0.2 +ucode_port_3=CGE2_2:core_0.3 +ucode_port_4=CGE2_3:core_0.4 +ucode_port_5=CGE2_4:core_0.5 +ucode_port_6=CGE2_5:core_0.6 +ucode_port_7=CGE2_6:core_0.7 +ucode_port_8=CGE2_7:core_0.8 +ucode_port_9=CGE2_8:core_0.9 +ucode_port_10=CGE2_9:core_0.10 +ucode_port_11=CGE2_10:core_0.11 +ucode_port_12=CGE2_11:core_0.12 +ucode_port_13=CGE2_12:core_0.13 +ucode_port_14=CGE2_13:core_0.14 +ucode_port_15=CGE2_14:core_0.15 +ucode_port_16=CGE2_15:core_0.16 +ucode_port_17=CGE2_36:core_1.17 +ucode_port_18=CGE2_37:core_1.18 +ucode_port_19=CGE2_38:core_1.19 +ucode_port_20=CGE2_39:core_1.20 +ucode_port_21=CGE2_32:core_1.21 +ucode_port_22=CGE2_33:core_1.22 +ucode_port_23=CGE2_34:core_1.23 +ucode_port_24=CGE2_35:core_1.24 +ucode_port_25=CGE2_28:core_1.25 +ucode_port_26=CGE2_29:core_1.26 +ucode_port_27=CGE2_30:core_1.27 +ucode_port_28=CGE2_31:core_1.28 +ucode_port_29=XE48:core_1.29 +ucode_port_30=XE49:core_1.30 +ucode_port_31=XE50:core_1.31 +ucode_port_32=XE51:core_1.32 +ucode_port_33=XE52:core_1.33 +ucode_port_34=XE53:core_1.34 +ucode_port_35=XE54:core_1.35 +ucode_port_36=XE55:core_1.36 + +rif_id_max=0x4000 + +dma_desc_aggregator_chain_length_max.BCM8869X=1000 +dma_desc_aggregator_buff_size_kb.BCM8869X=100 +dma_desc_aggregator_timeout_usec.BCM8869X=1000 +dma_desc_aggregator_enable_specific_MDB_LPM.BCM8869X=1 +dma_desc_aggregator_enable_specific_MDB_FEC.BCM8869X=1 diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/port_config.ini b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/port_config.ini new file mode 100644 index 00000000000..cb1c2a4663e --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/port_config.ini @@ -0,0 +1,37 @@ +# name lanes alias index speed +Ethernet0 0,1 Ethernet1/1 1 100000 +Ethernet4 2,3 Ethernet2/1 2 100000 +Ethernet8 4,5 Ethernet3/1 3 100000 +Ethernet12 6,7 Ethernet4/1 4 100000 +Ethernet16 8,9 Ethernet5/1 5 100000 +Ethernet20 10,11 Ethernet6/1 6 100000 +Ethernet24 12,13 Ethernet7/1 7 100000 +Ethernet28 14,15 Ethernet8/1 8 100000 +Ethernet32 16,17 Ethernet9/1 9 100000 +Ethernet36 18,19 Ethernet10/1 10 100000 +Ethernet40 20,21 Ethernet11/1 11 100000 +Ethernet44 22,23 Ethernet12/1 12 100000 +Ethernet48 24,25 Ethernet13/1 13 100000 +Ethernet52 26,27 Ethernet14/1 14 100000 +Ethernet56 28,29 Ethernet15/1 15 100000 +Ethernet60 30,31 Ethernet16/1 16 100000 +Ethernet64 72,73 Ethernet17/1 17 100000 +Ethernet68 74,75 Ethernet18/1 18 100000 +Ethernet72 76,77 Ethernet19/1 19 100000 +Ethernet76 78,79 Ethernet20/1 20 100000 +Ethernet80 64,65 Ethernet21/1 21 100000 +Ethernet84 66,67 Ethernet22/1 22 100000 +Ethernet88 68,69 Ethernet23/1 23 100000 +Ethernet92 70,71 Ethernet24/1 24 100000 +Ethernet96 56,57 Ethernet25/1 25 100000 +Ethernet100 58,59 Ethernet26/1 26 100000 +Ethernet104 60,61 Ethernet27/1 27 100000 +Ethernet108 62,63 Ethernet28/1 28 100000 +Ethernet112 48 Ethernet29/1 29 10000 +Ethernet113 49 Ethernet29/2 29 10000 +Ethernet114 50 Ethernet29/3 29 10000 +Ethernet115 51 Ethernet29/4 29 10000 +Ethernet120 52 Ethernet31/1 31 10000 +Ethernet121 53 Ethernet31/2 31 10000 +Ethernet122 54 Ethernet31/3 31 10000 +Ethernet123 55 Ethernet31/4 31 10000 diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/sai.profile b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/sai.profile new file mode 100644 index 00000000000..7e699b10430 --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/jr2-a7280cr3-32p4-28x100G-8x10G.config.bcm diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C32D4 b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C32D4 new file mode 120000 index 00000000000..cfdaca201c0 --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C32D4 @@ -0,0 +1 @@ +Arista-7280CR3-C32P4 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C32P4/port_config.ini b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C32P4/port_config.ini new file mode 100644 index 00000000000..976eae864d5 --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C32P4/port_config.ini @@ -0,0 +1,37 @@ +# name lanes alias index speed +Ethernet0 1,2 Ethernet1/1 1 100000 +Ethernet4 3,4 Ethernet2/1 2 100000 +Ethernet8 5,6 Ethernet3/1 3 100000 +Ethernet12 7,8 Ethernet4/1 4 100000 +Ethernet16 9,10 Ethernet5/1 5 100000 +Ethernet20 11,12 Ethernet6/1 6 100000 +Ethernet24 13,14 Ethernet7/1 7 100000 +Ethernet28 15,16 Ethernet8/1 8 100000 +Ethernet32 17,18 Ethernet9/1 9 100000 +Ethernet36 19,20 Ethernet10/1 10 100000 +Ethernet40 21,22 Ethernet11/1 11 100000 +Ethernet44 23,24 Ethernet12/1 12 100000 +Ethernet48 25,26 Ethernet13/1 13 100000 +Ethernet52 27,28 Ethernet14/1 14 100000 +Ethernet56 29,30 Ethernet15/1 15 100000 +Ethernet60 31,32 Ethernet16/1 16 100000 +Ethernet64 73,74 Ethernet17/1 17 100000 +Ethernet68 75,76 Ethernet18/1 18 100000 +Ethernet72 77,78 Ethernet19/1 19 100000 +Ethernet76 79,80 Ethernet20/1 20 100000 +Ethernet80 65,66 Ethernet21/1 21 100000 +Ethernet84 67,68 Ethernet22/1 22 100000 +Ethernet88 69,70 Ethernet23/1 23 100000 +Ethernet92 71,72 Ethernet24/1 24 100000 +Ethernet96 57,58 Ethernet25/1 25 100000 +Ethernet100 59,60 Ethernet26/1 26 100000 +Ethernet104 61,62 Ethernet27/1 27 100000 +Ethernet108 63,64 Ethernet28/1 28 100000 +Ethernet112 49,50 Ethernet29/1 29 100000 +Ethernet116 51,52 Ethernet30/1 30 100000 +Ethernet120 53,54 Ethernet31/1 31 100000 +Ethernet124 55,56 Ethernet32/1 32 100000 +Ethernet128 33,34,35,36,37,38,39,40 Ethernet33/1 33 400000 +Ethernet132 41,42,43,44,45,46,47,48 Ethernet34/1 34 400000 +Ethernet136 89,90,91,92,93,94,95,96 Ethernet35/1 35 400000 +Ethernet140 81,82,83,84,85,86,87,88 Ethernet36/1 36 400000 diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/jr2-a7280cr3-32p4-40x100G.config.bcm b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/jr2-a7280cr3-32p4-40x100G.config.bcm new file mode 100644 index 00000000000..654a4d8f158 --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/jr2-a7280cr3-32p4-40x100G.config.bcm @@ -0,0 +1,759 @@ +soc_family.BCM8869X=BCM8869X + +custom_feature_ucode_path=u_code_db2pem.txt +system_headers_mode=1 +suppress_unknown_prop_warnings=1 +l4_protocols_load_balancing_enable=1 +fabric_logical_port_base=512 +trunk_group_max_members=128 +num_olp_tm_ports.BCM8869X=1 + +ucode_port_0.BCM8869X=CPU.0:core_0.0 +ucode_port_200.BCM8869X=CPU.8:core_1.200 +ucode_port_201.BCM8869X=CPU.16:core_0.201 +ucode_port_202.BCM8869X=CPU.24:core_1.202 +ucode_port_203.BCM8869X=CPU.32:core_0.203 + +port_init_speed_xe.BCM8869X=10000 +port_init_speed_xl.BCM8869X=40000 +port_init_speed_le.BCM8869X=50000 +port_init_speed_ce.BCM8869X=100000 +port_init_speed_cc.BCM8869X=200000 +port_init_speed_cd.BCM8869X=400000 +port_init_speed_il.BCM8869X=10312 + +port_init_cl72=0 + +serdes_tx_taps_1=pam4:-16:64:0:3:0:0 +serdes_tx_taps_2=pam4:-16:64:0:3:0:0 +serdes_tx_taps_3=pam4:-16:64:0:3:0:0 +serdes_tx_taps_4=pam4:-16:64:0:3:0:0 +serdes_tx_taps_5=pam4:-16:64:0:3:0:0 +serdes_tx_taps_6=pam4:-16:64:0:3:0:0 +serdes_tx_taps_7=pam4:-16:64:0:3:0:0 +serdes_tx_taps_8=pam4:-16:64:0:3:0:0 +serdes_tx_taps_9=pam4:-8:60:0:0:0:0 +serdes_tx_taps_10=pam4:-8:60:0:0:0:0 +serdes_tx_taps_11=pam4:-8:60:0:0:0:0 +serdes_tx_taps_12=pam4:-8:60:0:0:0:0 +serdes_tx_taps_13=pam4:-8:60:0:0:0:0 +serdes_tx_taps_14=pam4:-8:60:0:0:0:0 +serdes_tx_taps_15=pam4:-8:60:0:0:0:0 +serdes_tx_taps_16=pam4:-8:60:0:0:0:0 +serdes_tx_taps_17=pam4:-8:60:0:0:0:0 +serdes_tx_taps_18=pam4:-8:60:0:0:0:0 +serdes_tx_taps_19=pam4:-8:60:0:0:0:0 +serdes_tx_taps_20=pam4:-8:60:0:0:0:0 +serdes_tx_taps_21=pam4:-8:60:0:0:0:0 +serdes_tx_taps_22=pam4:-8:60:0:0:0:0 +serdes_tx_taps_23=pam4:-8:60:0:0:0:0 +serdes_tx_taps_24=pam4:-8:60:0:0:0:0 +serdes_tx_taps_25=pam4:-8:60:0:0:0:0 +serdes_tx_taps_26=pam4:-8:60:0:0:0:0 +serdes_tx_taps_27=pam4:-8:60:0:0:0:0 +serdes_tx_taps_28=pam4:-8:60:0:0:0:0 +serdes_tx_taps_29=pam4:-16:60:0:3:0:0 +serdes_tx_taps_30=pam4:-16:60:0:3:0:0 +serdes_tx_taps_31=pam4:-16:60:0:3:0:0 +serdes_tx_taps_32=pam4:-16:60:0:3:0:0 +serdes_tx_taps_33=nrz:0:71:-16:-5:0:0 +serdes_tx_taps_34=nrz:0:71:-16:-5:0:0 +serdes_tx_taps_35=nrz:0:78:-22:-4:0:0 +serdes_tx_taps_36=nrz:0:78:-22:-4:0:0 +serdes_tx_taps_37=nrz:0:72:-18:-5:0:0 +serdes_tx_taps_38=nrz:0:72:-18:-5:0:0 +serdes_tx_taps_39=nrz:0:68:-17:-6:0:0 +serdes_tx_taps_40=nrz:0:68:-17:-6:0:0 + +ucode_port_100.BCM8869X=RCY_MIRROR.0:core_0.100 +ucode_port_101.BCM8869X=RCY_MIRROR.1:core_0.101 +ucode_port_102.BCM8869X=RCY_MIRROR.2:core_0.102 +ucode_port_103.BCM8869X=RCY_MIRROR.3:core_0.103 +ucode_port_104.BCM8869X=RCY_MIRROR.4:core_0.104 +ucode_port_105.BCM8869X=RCY_MIRROR.5:core_0.105 +ucode_port_106.BCM8869X=RCY_MIRROR.6:core_0.106 +ucode_port_107.BCM8869X=RCY_MIRROR.7:core_0.107 +ucode_port_108.BCM8869X=RCY_MIRROR.8:core_0.108 +ucode_port_109.BCM8869X=RCY_MIRROR.9:core_0.109 +ucode_port_110.BCM8869X=RCY_MIRROR.10:core_0.110 +ucode_port_111.BCM8869X=RCY_MIRROR.11:core_0.111 +ucode_port_112.BCM8869X=RCY_MIRROR.12:core_0.112 +ucode_port_113.BCM8869X=RCY_MIRROR.13:core_0.113 +ucode_port_114.BCM8869X=RCY_MIRROR.14:core_0.114 +ucode_port_115.BCM8869X=RCY_MIRROR.15:core_0.115 +ucode_port_116.BCM8869X=RCY_MIRROR.16:core_0.116 +ucode_port_117.BCM8869X=RCY_MIRROR.17:core_0.117 +ucode_port_118.BCM8869X=RCY_MIRROR.18:core_0.118 +ucode_port_119.BCM8869X=RCY_MIRROR.19:core_0.119 +ucode_port_120.BCM8869X=RCY_MIRROR.0:core_1.120 +ucode_port_121.BCM8869X=RCY_MIRROR.1:core_1.121 +ucode_port_122.BCM8869X=RCY_MIRROR.2:core_1.122 +ucode_port_123.BCM8869X=RCY_MIRROR.3:core_1.123 +ucode_port_124.BCM8869X=RCY_MIRROR.4:core_1.124 +ucode_port_125.BCM8869X=RCY_MIRROR.5:core_1.125 +ucode_port_126.BCM8869X=RCY_MIRROR.6:core_1.126 +ucode_port_127.BCM8869X=RCY_MIRROR.7:core_1.127 +ucode_port_128.BCM8869X=RCY_MIRROR.8:core_1.128 +ucode_port_129.BCM8869X=RCY_MIRROR.9:core_1.129 +ucode_port_130.BCM8869X=RCY_MIRROR.10:core_1.130 +ucode_port_131.BCM8869X=RCY_MIRROR.11:core_1.131 +ucode_port_132.BCM8869X=RCY_MIRROR.12:core_1.132 +ucode_port_133.BCM8869X=RCY_MIRROR.13:core_1.133 +ucode_port_134.BCM8869X=RCY_MIRROR.14:core_1.134 +ucode_port_135.BCM8869X=RCY_MIRROR.15:core_1.135 +ucode_port_136.BCM8869X=RCY_MIRROR.16:core_1.136 +ucode_port_137.BCM8869X=RCY_MIRROR.17:core_1.137 +ucode_port_138.BCM8869X=RCY_MIRROR.18:core_1.138 +ucode_port_139.BCM8869X=RCY_MIRROR.19:core_1.139 + +port_priorities.BCM8869X=8 + +ucode_port_240.BCM8869X=OLP:core_0.240 + +sw_state_max_size.BCM8869X=750000000 + +stable_location.BCM8869X=4 +stable_location.BCM8869X_ADAPTER=3 + +stable_filename.BCM8869X_ADAPTER=warmboot_data_0 +stable_filename=/dev/shm/warmboot_data_0 +stable_filename.1=/dev/shm/warmboot_data_1 +stable_filename.2=/dev/shm/warmboot_data_2 + +stable_size.BCM8869X=800000000 + +tm_port_header_type_in_0.BCM8869X=INJECTED_2 +tm_port_header_type_out_0.BCM8869X=CPU + +tm_port_header_type_in_200.BCM8869X=INJECTED_2_PP +tm_port_header_type_out_200.BCM8869X=ETH +tm_port_header_type_in_201.BCM8869X=INJECTED_2_PP +tm_port_header_type_out_201.BCM8869X=ETH +tm_port_header_type_in_202.BCM8869X=INJECTED_2_PP +tm_port_header_type_out_202.BCM8869X=ETH +tm_port_header_type_in_203.BCM8869X=INJECTED_2_PP +tm_port_header_type_out_203.BCM8869X=ETH + +sat_enable.BCM8869X=1 +tm_port_header_type_out_218.BCM8869X=CPU +tm_port_header_type_in_218.BCM8869X=INJECTED_2 + +tm_port_header_type_in_232.BCM8869X=INJECTED_2 +tm_port_header_type_out_232.BCM8869X=CPU +tm_port_header_type_in_233.BCM8869X=INJECTED_2 +tm_port_header_type_out_233.BCM8869X=CPU + +tm_port_header_type_in_240.BCM8869X=INJECTED_2 +tm_port_header_type_out_240.BCM8869X=RAW + +dtm_flow_mapping_mode_region_64.BCM8869X=3 +dtm_flow_mapping_mode_region_65.BCM8869X=3 +dtm_flow_mapping_mode_region_66.BCM8869X=3 +dtm_flow_mapping_mode_region_67.BCM8869X=3 +dtm_flow_mapping_mode_region_68.BCM8869X=3 +dtm_flow_mapping_mode_region_69.BCM8869X=3 +dtm_flow_mapping_mode_region_70.BCM8869X=3 +dtm_flow_mapping_mode_region_71.BCM8869X=3 +dtm_flow_mapping_mode_region_72.BCM8869X=3 +dtm_flow_mapping_mode_region_73.BCM8869X=3 +dtm_flow_mapping_mode_region_74.BCM8869X=3 +dtm_flow_mapping_mode_region_75.BCM8869X=3 +dtm_flow_mapping_mode_region_76.BCM8869X=3 +dtm_flow_mapping_mode_region_77.BCM8869X=3 +dtm_flow_mapping_mode_region_78.BCM8869X=3 +dtm_flow_mapping_mode_region_79.BCM8869X=7 +dtm_flow_mapping_mode_region_80.BCM8869X=3 +dtm_flow_mapping_mode_region_81.BCM8869X=1 +dtm_flow_mapping_mode_region_82.BCM8869X=3 +dtm_flow_mapping_mode_region_83.BCM8869X=3 +dtm_flow_mapping_mode_region_84.BCM8869X=3 +dtm_flow_mapping_mode_region_85.BCM8869X=3 +dtm_flow_mapping_mode_region_86.BCM8869X=3 +dtm_flow_mapping_mode_region_87.BCM8869X=3 +dtm_flow_mapping_mode_region_88.BCM8869X=3 +dtm_flow_mapping_mode_region_89.BCM8869X=3 +dtm_flow_mapping_mode_region_90.BCM8869X=3 +dtm_flow_mapping_mode_region_91.BCM8869X=3 +dtm_flow_mapping_mode_region_92.BCM8869X=3 +dtm_flow_mapping_mode_region_93.BCM8869X=3 +dtm_flow_mapping_mode_region_94.BCM8869X=3 + +dtm_flow_nof_remote_cores_region_1.BCM8869X=2 +dtm_flow_nof_remote_cores_region_2.BCM8869X=2 +dtm_flow_nof_remote_cores_region_3.BCM8869X=2 +dtm_flow_nof_remote_cores_region_4.BCM8869X=2 +dtm_flow_nof_remote_cores_region_5.BCM8869X=2 +dtm_flow_nof_remote_cores_region_6.BCM8869X=2 +dtm_flow_nof_remote_cores_region_7.BCM8869X=2 +dtm_flow_nof_remote_cores_region_8.BCM8869X=2 +dtm_flow_nof_remote_cores_region_9.BCM8869X=2 +dtm_flow_nof_remote_cores_region_10.BCM8869X=2 +dtm_flow_nof_remote_cores_region_11.BCM8869X=2 +dtm_flow_nof_remote_cores_region_12.BCM8869X=2 +dtm_flow_nof_remote_cores_region_13.BCM8869X=2 +dtm_flow_nof_remote_cores_region_14.BCM8869X=2 +dtm_flow_nof_remote_cores_region_15.BCM8869X=2 +dtm_flow_nof_remote_cores_region_16.BCM8869X=2 +dtm_flow_nof_remote_cores_region_17.BCM8869X=2 +dtm_flow_nof_remote_cores_region_18.BCM8869X=2 +dtm_flow_nof_remote_cores_region_19.BCM8869X=2 +dtm_flow_nof_remote_cores_region_20.BCM8869X=2 +dtm_flow_nof_remote_cores_region_21.BCM8869X=2 +dtm_flow_nof_remote_cores_region_22.BCM8869X=2 +dtm_flow_nof_remote_cores_region_23.BCM8869X=2 +dtm_flow_nof_remote_cores_region_24.BCM8869X=2 +dtm_flow_nof_remote_cores_region_25.BCM8869X=2 +dtm_flow_nof_remote_cores_region_26.BCM8869X=2 +dtm_flow_nof_remote_cores_region_27.BCM8869X=2 +dtm_flow_nof_remote_cores_region_28.BCM8869X=2 +dtm_flow_nof_remote_cores_region_29.BCM8869X=2 +dtm_flow_nof_remote_cores_region_30.BCM8869X=2 +dtm_flow_nof_remote_cores_region_31.BCM8869X=2 +dtm_flow_nof_remote_cores_region_32.BCM8869X=2 +dtm_flow_nof_remote_cores_region_33.BCM8869X=2 +dtm_flow_nof_remote_cores_region_34.BCM8869X=2 +dtm_flow_nof_remote_cores_region_35.BCM8869X=2 +dtm_flow_nof_remote_cores_region_36.BCM8869X=2 +dtm_flow_nof_remote_cores_region_37.BCM8869X=2 +dtm_flow_nof_remote_cores_region_38.BCM8869X=2 +dtm_flow_nof_remote_cores_region_39.BCM8869X=2 +dtm_flow_nof_remote_cores_region_40.BCM8869X=2 +dtm_flow_nof_remote_cores_region_41.BCM8869X=2 +dtm_flow_nof_remote_cores_region_42.BCM8869X=2 +dtm_flow_nof_remote_cores_region_43.BCM8869X=2 +dtm_flow_nof_remote_cores_region_44.BCM8869X=2 +dtm_flow_nof_remote_cores_region_45.BCM8869X=2 +dtm_flow_nof_remote_cores_region_46.BCM8869X=2 +dtm_flow_nof_remote_cores_region_47.BCM8869X=2 +dtm_flow_nof_remote_cores_region_48.BCM8869X=2 +dtm_flow_nof_remote_cores_region_49.BCM8869X=2 +dtm_flow_nof_remote_cores_region_50.BCM8869X=2 +dtm_flow_nof_remote_cores_region_51.BCM8869X=2 +dtm_flow_nof_remote_cores_region_52.BCM8869X=2 +dtm_flow_nof_remote_cores_region_53.BCM8869X=2 +dtm_flow_nof_remote_cores_region_54.BCM8869X=2 +dtm_flow_nof_remote_cores_region_55.BCM8869X=2 +dtm_flow_nof_remote_cores_region_56.BCM8869X=2 +dtm_flow_nof_remote_cores_region_57.BCM8869X=2 +dtm_flow_nof_remote_cores_region_58.BCM8869X=2 +dtm_flow_nof_remote_cores_region_59.BCM8869X=2 +dtm_flow_nof_remote_cores_region_60.BCM8869X=2 + +mdb_profile.BCM8869X=l3-xl + +outlif_logical_to_physical_phase_map_1=S1 +outlif_logical_to_physical_phase_map_2=L1 +outlif_logical_to_physical_phase_map_3=XL +outlif_logical_to_physical_phase_map_4=L2 +outlif_logical_to_physical_phase_map_5=M1 +outlif_logical_to_physical_phase_map_6=M2 +outlif_logical_to_physical_phase_map_7=M3 +outlif_logical_to_physical_phase_map_8=S2 + +outlif_physical_phase_data_granularity_S1=60 +outlif_physical_phase_data_granularity_S2=60 +outlif_physical_phase_data_granularity_M1=60 +outlif_physical_phase_data_granularity_M2=60 +outlif_physical_phase_data_granularity_M3=60 +outlif_physical_phase_data_granularity_L1=60 +outlif_physical_phase_data_granularity_L2=60 +outlif_physical_phase_data_granularity_XL=60 + +port_init_speed_fabric.BCM8869X=53125 + +fabric_connect_mode.BCM8869X=SINGLE_FAP +protocol_traps_mode.BCM8869X=IN_LIF + +schan_intr_enable.BCM8869X=0 +tdma_intr_enable.BCM8869X=0 +tslam_intr_enable.BCM8869X=0 +miim_intr_enable.BCM8869X=0 +schan_timeout_usec.BCM8869X=300000 +tdma_timeout_usec.BCM8869X=1000000 +tslam_timeout_usec.BCM8869X=1000000 + +appl_enable_intr_init.BCM8869X=1 +polled_irq_mode.BCM8869X=1 +polled_irq_delay.BCM8869X=1000 + +bcm_stat_interval.BCM8869X=1000 + +mem_cache_enable_ecc.BCM8869X=1 +mem_cache_enable_parity.BCM8869X=1 + +serdes_nif_clk_freq_in.BCM8869X_A0=2 +serdes_nif_clk_freq_out.BCM8869X_A0=1 +serdes_fabric_clk_freq_in.BCM8869X_A0=2 +serdes_fabric_clk_freq_out.BCM8869X_A0=1 + +serdes_nif_clk_freq_in.BCM8869X=1 +serdes_nif_clk_freq_out.BCM8869X=bypass +serdes_fabric_clk_freq_in.BCM8869X=1 +serdes_fabric_clk_freq_out.BCM8869X=bypass + +dram_phy_tune_mode_on_init.BCM8869X=RUN_TUNE + +dport_map_direct.BCM8869X=1 + +pmf_sexem3_stage.BCM8869X=IPMF3 + +lane_to_serdes_map_fabric_lane0.0=rx0:tx0 +lane_to_serdes_map_fabric_lane1.0=rx1:tx1 +lane_to_serdes_map_fabric_lane2.0=rx2:tx2 +lane_to_serdes_map_fabric_lane3.0=rx3:tx3 +lane_to_serdes_map_fabric_lane4.0=rx4:tx4 +lane_to_serdes_map_fabric_lane5.0=rx5:tx5 +lane_to_serdes_map_fabric_lane6.0=rx6:tx6 +lane_to_serdes_map_fabric_lane7.0=rx7:tx7 +lane_to_serdes_map_fabric_lane8.0=rx8:tx8 +lane_to_serdes_map_fabric_lane9.0=rx9:tx9 +lane_to_serdes_map_fabric_lane10.0=rx10:tx10 +lane_to_serdes_map_fabric_lane11.0=rx11:tx11 +lane_to_serdes_map_fabric_lane12.0=rx12:tx12 +lane_to_serdes_map_fabric_lane13.0=rx13:tx13 +lane_to_serdes_map_fabric_lane14.0=rx14:tx14 +lane_to_serdes_map_fabric_lane15.0=rx15:tx15 +lane_to_serdes_map_fabric_lane16.0=rx16:tx16 +lane_to_serdes_map_fabric_lane17.0=rx17:tx17 +lane_to_serdes_map_fabric_lane18.0=rx18:tx18 +lane_to_serdes_map_fabric_lane19.0=rx19:tx19 +lane_to_serdes_map_fabric_lane20.0=rx20:tx20 +lane_to_serdes_map_fabric_lane21.0=rx21:tx21 +lane_to_serdes_map_fabric_lane22.0=rx22:tx22 +lane_to_serdes_map_fabric_lane23.0=rx23:tx23 +lane_to_serdes_map_fabric_lane24.0=rx24:tx24 +lane_to_serdes_map_fabric_lane25.0=rx25:tx25 +lane_to_serdes_map_fabric_lane26.0=rx26:tx26 +lane_to_serdes_map_fabric_lane27.0=rx27:tx27 +lane_to_serdes_map_fabric_lane28.0=rx28:tx28 +lane_to_serdes_map_fabric_lane29.0=rx29:tx29 +lane_to_serdes_map_fabric_lane30.0=rx30:tx30 +lane_to_serdes_map_fabric_lane31.0=rx31:tx31 +lane_to_serdes_map_fabric_lane32.0=rx32:tx32 +lane_to_serdes_map_fabric_lane33.0=rx33:tx33 +lane_to_serdes_map_fabric_lane34.0=rx34:tx34 +lane_to_serdes_map_fabric_lane35.0=rx35:tx35 +lane_to_serdes_map_fabric_lane36.0=rx36:tx36 +lane_to_serdes_map_fabric_lane37.0=rx37:tx37 +lane_to_serdes_map_fabric_lane38.0=rx38:tx38 +lane_to_serdes_map_fabric_lane39.0=rx39:tx39 +lane_to_serdes_map_fabric_lane40.0=rx40:tx40 +lane_to_serdes_map_fabric_lane41.0=rx41:tx41 +lane_to_serdes_map_fabric_lane42.0=rx42:tx42 +lane_to_serdes_map_fabric_lane43.0=rx43:tx43 +lane_to_serdes_map_fabric_lane44.0=rx44:tx44 +lane_to_serdes_map_fabric_lane45.0=rx45:tx45 +lane_to_serdes_map_fabric_lane46.0=rx46:tx46 +lane_to_serdes_map_fabric_lane47.0=rx47:tx47 +lane_to_serdes_map_fabric_lane48.0=rx48:tx48 +lane_to_serdes_map_fabric_lane49.0=rx49:tx49 +lane_to_serdes_map_fabric_lane50.0=rx50:tx50 +lane_to_serdes_map_fabric_lane51.0=rx51:tx51 +lane_to_serdes_map_fabric_lane52.0=rx52:tx52 +lane_to_serdes_map_fabric_lane53.0=rx53:tx53 +lane_to_serdes_map_fabric_lane54.0=rx54:tx54 +lane_to_serdes_map_fabric_lane55.0=rx55:tx55 +lane_to_serdes_map_fabric_lane56.0=rx56:tx56 +lane_to_serdes_map_fabric_lane57.0=rx57:tx57 +lane_to_serdes_map_fabric_lane58.0=rx58:tx58 +lane_to_serdes_map_fabric_lane59.0=rx59:tx59 +lane_to_serdes_map_fabric_lane60.0=rx60:tx60 +lane_to_serdes_map_fabric_lane61.0=rx61:tx61 +lane_to_serdes_map_fabric_lane62.0=rx62:tx62 +lane_to_serdes_map_fabric_lane63.0=rx63:tx63 +lane_to_serdes_map_fabric_lane64.0=rx64:tx64 +lane_to_serdes_map_fabric_lane65.0=rx65:tx65 +lane_to_serdes_map_fabric_lane66.0=rx66:tx66 +lane_to_serdes_map_fabric_lane67.0=rx67:tx67 +lane_to_serdes_map_fabric_lane68.0=rx68:tx68 +lane_to_serdes_map_fabric_lane69.0=rx69:tx69 +lane_to_serdes_map_fabric_lane70.0=rx70:tx70 +lane_to_serdes_map_fabric_lane71.0=rx71:tx71 +lane_to_serdes_map_fabric_lane72.0=rx72:tx72 +lane_to_serdes_map_fabric_lane73.0=rx73:tx73 +lane_to_serdes_map_fabric_lane74.0=rx74:tx74 +lane_to_serdes_map_fabric_lane75.0=rx75:tx75 +lane_to_serdes_map_fabric_lane76.0=rx76:tx76 +lane_to_serdes_map_fabric_lane77.0=rx77:tx77 +lane_to_serdes_map_fabric_lane78.0=rx78:tx78 +lane_to_serdes_map_fabric_lane79.0=rx79:tx79 +lane_to_serdes_map_fabric_lane80.0=rx80:tx80 +lane_to_serdes_map_fabric_lane81.0=rx81:tx81 +lane_to_serdes_map_fabric_lane82.0=rx82:tx82 +lane_to_serdes_map_fabric_lane83.0=rx83:tx83 +lane_to_serdes_map_fabric_lane84.0=rx84:tx84 +lane_to_serdes_map_fabric_lane85.0=rx85:tx85 +lane_to_serdes_map_fabric_lane86.0=rx86:tx86 +lane_to_serdes_map_fabric_lane87.0=rx87:tx87 +lane_to_serdes_map_fabric_lane88.0=rx88:tx88 +lane_to_serdes_map_fabric_lane89.0=rx89:tx89 +lane_to_serdes_map_fabric_lane90.0=rx90:tx90 +lane_to_serdes_map_fabric_lane91.0=rx91:tx91 +lane_to_serdes_map_fabric_lane92.0=rx92:tx92 +lane_to_serdes_map_fabric_lane93.0=rx93:tx93 +lane_to_serdes_map_fabric_lane94.0=rx94:tx94 +lane_to_serdes_map_fabric_lane95.0=rx95:tx95 +lane_to_serdes_map_fabric_lane96.0=rx96:tx96 +lane_to_serdes_map_fabric_lane97.0=rx97:tx97 +lane_to_serdes_map_fabric_lane98.0=rx98:tx98 +lane_to_serdes_map_fabric_lane99.0=rx99:tx99 +lane_to_serdes_map_fabric_lane100.0=rx100:tx100 +lane_to_serdes_map_fabric_lane101.0=rx101:tx101 +lane_to_serdes_map_fabric_lane102.0=rx102:tx102 +lane_to_serdes_map_fabric_lane103.0=rx103:tx103 +lane_to_serdes_map_fabric_lane104.0=rx104:tx104 +lane_to_serdes_map_fabric_lane105.0=rx105:tx105 +lane_to_serdes_map_fabric_lane106.0=rx106:tx106 +lane_to_serdes_map_fabric_lane107.0=rx107:tx107 +lane_to_serdes_map_fabric_lane108.0=rx108:tx108 +lane_to_serdes_map_fabric_lane109.0=rx109:tx109 +lane_to_serdes_map_fabric_lane110.0=rx110:tx110 +lane_to_serdes_map_fabric_lane111.0=rx111:tx111 + +lane_to_serdes_map_nif_lane0.0=rx5:tx7 +lane_to_serdes_map_nif_lane1.0=rx7:tx6 +lane_to_serdes_map_nif_lane2.0=rx4:tx5 +lane_to_serdes_map_nif_lane3.0=rx6:tx4 +lane_to_serdes_map_nif_lane4.0=rx0:tx0 +lane_to_serdes_map_nif_lane5.0=rx1:tx1 +lane_to_serdes_map_nif_lane6.0=rx2:tx3 +lane_to_serdes_map_nif_lane7.0=rx3:tx2 +lane_to_serdes_map_nif_lane8.0=rx13:tx15 +lane_to_serdes_map_nif_lane9.0=rx12:tx14 +lane_to_serdes_map_nif_lane10.0=rx15:tx13 +lane_to_serdes_map_nif_lane11.0=rx14:tx12 +lane_to_serdes_map_nif_lane12.0=rx10:tx10 +lane_to_serdes_map_nif_lane13.0=rx8:tx9 +lane_to_serdes_map_nif_lane14.0=rx9:tx11 +lane_to_serdes_map_nif_lane15.0=rx11:tx8 +lane_to_serdes_map_nif_lane16.0=rx23:tx23 +lane_to_serdes_map_nif_lane17.0=rx21:tx22 +lane_to_serdes_map_nif_lane18.0=rx22:tx21 +lane_to_serdes_map_nif_lane19.0=rx20:tx20 +lane_to_serdes_map_nif_lane20.0=rx16:tx18 +lane_to_serdes_map_nif_lane21.0=rx17:tx17 +lane_to_serdes_map_nif_lane22.0=rx18:tx16 +lane_to_serdes_map_nif_lane23.0=rx19:tx19 +lane_to_serdes_map_nif_lane24.0=rx31:tx31 +lane_to_serdes_map_nif_lane25.0=rx30:tx30 +lane_to_serdes_map_nif_lane26.0=rx29:tx29 +lane_to_serdes_map_nif_lane27.0=rx28:tx28 +lane_to_serdes_map_nif_lane28.0=rx24:tx26 +lane_to_serdes_map_nif_lane29.0=rx26:tx25 +lane_to_serdes_map_nif_lane30.0=rx25:tx24 +lane_to_serdes_map_nif_lane31.0=rx27:tx27 +lane_to_serdes_map_nif_lane32.0=rx39:tx35 +lane_to_serdes_map_nif_lane33.0=rx38:tx36 +lane_to_serdes_map_nif_lane34.0=rx32:tx32 +lane_to_serdes_map_nif_lane35.0=rx37:tx37 +lane_to_serdes_map_nif_lane36.0=rx33:tx34 +lane_to_serdes_map_nif_lane37.0=rx34:tx38 +lane_to_serdes_map_nif_lane38.0=rx35:tx33 +lane_to_serdes_map_nif_lane39.0=rx36:tx39 +lane_to_serdes_map_nif_lane40.0=rx44:tx47 +lane_to_serdes_map_nif_lane41.0=rx43:tx41 +lane_to_serdes_map_nif_lane42.0=rx47:tx46 +lane_to_serdes_map_nif_lane43.0=rx42:tx42 +lane_to_serdes_map_nif_lane44.0=rx45:tx45 +lane_to_serdes_map_nif_lane45.0=rx41:tx40 +lane_to_serdes_map_nif_lane46.0=rx46:tx44 +lane_to_serdes_map_nif_lane47.0=rx40:tx43 +lane_to_serdes_map_nif_lane48.0=rx55:tx55 +lane_to_serdes_map_nif_lane49.0=rx54:tx54 +lane_to_serdes_map_nif_lane50.0=rx53:tx53 +lane_to_serdes_map_nif_lane51.0=rx52:tx52 +lane_to_serdes_map_nif_lane52.0=rx48:tx48 +lane_to_serdes_map_nif_lane53.0=rx49:tx49 +lane_to_serdes_map_nif_lane54.0=rx50:tx50 +lane_to_serdes_map_nif_lane55.0=rx51:tx51 +lane_to_serdes_map_nif_lane56.0=rx60:tx60 +lane_to_serdes_map_nif_lane57.0=rx61:tx61 +lane_to_serdes_map_nif_lane58.0=rx62:tx63 +lane_to_serdes_map_nif_lane59.0=rx63:tx62 +lane_to_serdes_map_nif_lane60.0=rx58:tx59 +lane_to_serdes_map_nif_lane61.0=rx59:tx56 +lane_to_serdes_map_nif_lane62.0=rx57:tx58 +lane_to_serdes_map_nif_lane63.0=rx56:tx57 +lane_to_serdes_map_nif_lane64.0=rx68:tx69 +lane_to_serdes_map_nif_lane65.0=rx69:tx68 +lane_to_serdes_map_nif_lane66.0=rx70:tx71 +lane_to_serdes_map_nif_lane67.0=rx71:tx70 +lane_to_serdes_map_nif_lane68.0=rx67:tx64 +lane_to_serdes_map_nif_lane69.0=rx66:tx67 +lane_to_serdes_map_nif_lane70.0=rx65:tx65 +lane_to_serdes_map_nif_lane71.0=rx64:tx66 +lane_to_serdes_map_nif_lane72.0=rx78:tx76 +lane_to_serdes_map_nif_lane73.0=rx76:tx77 +lane_to_serdes_map_nif_lane74.0=rx79:tx78 +lane_to_serdes_map_nif_lane75.0=rx77:tx79 +lane_to_serdes_map_nif_lane76.0=rx75:tx72 +lane_to_serdes_map_nif_lane77.0=rx74:tx75 +lane_to_serdes_map_nif_lane78.0=rx73:tx73 +lane_to_serdes_map_nif_lane79.0=rx72:tx74 +lane_to_serdes_map_nif_lane80.0=rx81:tx83 +lane_to_serdes_map_nif_lane81.0=rx85:tx84 +lane_to_serdes_map_nif_lane82.0=rx80:tx80 +lane_to_serdes_map_nif_lane83.0=rx86:tx85 +lane_to_serdes_map_nif_lane84.0=rx82:tx82 +lane_to_serdes_map_nif_lane85.0=rx87:tx86 +lane_to_serdes_map_nif_lane86.0=rx83:tx81 +lane_to_serdes_map_nif_lane87.0=rx84:tx87 +lane_to_serdes_map_nif_lane88.0=rx91:tx95 +lane_to_serdes_map_nif_lane89.0=rx90:tx89 +lane_to_serdes_map_nif_lane90.0=rx95:tx94 +lane_to_serdes_map_nif_lane91.0=rx89:tx90 +lane_to_serdes_map_nif_lane92.0=rx93:tx93 +lane_to_serdes_map_nif_lane93.0=rx94:tx88 +lane_to_serdes_map_nif_lane94.0=rx92:tx92 +lane_to_serdes_map_nif_lane95.0=rx88:tx91 +phy_rx_polarity_flip_phy0=0 +phy_rx_polarity_flip_phy1=1 +phy_rx_polarity_flip_phy2=0 +phy_rx_polarity_flip_phy3=0 +phy_rx_polarity_flip_phy4=0 +phy_rx_polarity_flip_phy5=0 +phy_rx_polarity_flip_phy6=0 +phy_rx_polarity_flip_phy7=0 +phy_rx_polarity_flip_phy8=1 +phy_rx_polarity_flip_phy9=1 +phy_rx_polarity_flip_phy10=1 +phy_rx_polarity_flip_phy11=1 +phy_rx_polarity_flip_phy12=0 +phy_rx_polarity_flip_phy13=1 +phy_rx_polarity_flip_phy14=1 +phy_rx_polarity_flip_phy15=1 +phy_rx_polarity_flip_phy16=0 +phy_rx_polarity_flip_phy17=1 +phy_rx_polarity_flip_phy18=1 +phy_rx_polarity_flip_phy19=0 +phy_rx_polarity_flip_phy20=0 +phy_rx_polarity_flip_phy21=0 +phy_rx_polarity_flip_phy22=0 +phy_rx_polarity_flip_phy23=0 +phy_rx_polarity_flip_phy24=1 +phy_rx_polarity_flip_phy25=1 +phy_rx_polarity_flip_phy26=1 +phy_rx_polarity_flip_phy27=0 +phy_rx_polarity_flip_phy28=0 +phy_rx_polarity_flip_phy29=1 +phy_rx_polarity_flip_phy30=1 +phy_rx_polarity_flip_phy31=0 +phy_rx_polarity_flip_phy32=0 +phy_rx_polarity_flip_phy33=1 +phy_rx_polarity_flip_phy34=1 +phy_rx_polarity_flip_phy35=0 +phy_rx_polarity_flip_phy36=0 +phy_rx_polarity_flip_phy37=0 +phy_rx_polarity_flip_phy38=1 +phy_rx_polarity_flip_phy39=0 +phy_rx_polarity_flip_phy40=1 +phy_rx_polarity_flip_phy41=1 +phy_rx_polarity_flip_phy42=0 +phy_rx_polarity_flip_phy43=0 +phy_rx_polarity_flip_phy44=1 +phy_rx_polarity_flip_phy45=1 +phy_rx_polarity_flip_phy46=0 +phy_rx_polarity_flip_phy47=0 +phy_rx_polarity_flip_phy48=1 +phy_rx_polarity_flip_phy49=1 +phy_rx_polarity_flip_phy50=1 +phy_rx_polarity_flip_phy51=1 +phy_rx_polarity_flip_phy52=0 +phy_rx_polarity_flip_phy53=0 +phy_rx_polarity_flip_phy54=0 +phy_rx_polarity_flip_phy55=0 +phy_rx_polarity_flip_phy56=0 +phy_rx_polarity_flip_phy57=0 +phy_rx_polarity_flip_phy58=0 +phy_rx_polarity_flip_phy59=0 +phy_rx_polarity_flip_phy60=1 +phy_rx_polarity_flip_phy61=1 +phy_rx_polarity_flip_phy62=1 +phy_rx_polarity_flip_phy63=1 +phy_rx_polarity_flip_phy64=1 +phy_rx_polarity_flip_phy65=1 +phy_rx_polarity_flip_phy66=1 +phy_rx_polarity_flip_phy67=1 +phy_rx_polarity_flip_phy68=1 +phy_rx_polarity_flip_phy69=1 +phy_rx_polarity_flip_phy70=1 +phy_rx_polarity_flip_phy71=1 +phy_rx_polarity_flip_phy72=1 +phy_rx_polarity_flip_phy73=0 +phy_rx_polarity_flip_phy74=0 +phy_rx_polarity_flip_phy75=1 +phy_rx_polarity_flip_phy76=1 +phy_rx_polarity_flip_phy77=1 +phy_rx_polarity_flip_phy78=1 +phy_rx_polarity_flip_phy79=1 +phy_rx_polarity_flip_phy80=0 +phy_rx_polarity_flip_phy81=0 +phy_rx_polarity_flip_phy82=1 +phy_rx_polarity_flip_phy83=1 +phy_rx_polarity_flip_phy84=1 +phy_rx_polarity_flip_phy85=0 +phy_rx_polarity_flip_phy86=1 +phy_rx_polarity_flip_phy87=1 +phy_rx_polarity_flip_phy88=0 +phy_rx_polarity_flip_phy89=0 +phy_rx_polarity_flip_phy90=1 +phy_rx_polarity_flip_phy91=1 +phy_rx_polarity_flip_phy92=0 +phy_rx_polarity_flip_phy93=1 +phy_rx_polarity_flip_phy94=0 +phy_rx_polarity_flip_phy95=0 +phy_tx_polarity_flip_phy0=1 +phy_tx_polarity_flip_phy1=1 +phy_tx_polarity_flip_phy2=1 +phy_tx_polarity_flip_phy3=1 +phy_tx_polarity_flip_phy4=1 +phy_tx_polarity_flip_phy5=1 +phy_tx_polarity_flip_phy6=0 +phy_tx_polarity_flip_phy7=0 +phy_tx_polarity_flip_phy8=1 +phy_tx_polarity_flip_phy9=1 +phy_tx_polarity_flip_phy10=1 +phy_tx_polarity_flip_phy11=1 +phy_tx_polarity_flip_phy12=1 +phy_tx_polarity_flip_phy13=1 +phy_tx_polarity_flip_phy14=0 +phy_tx_polarity_flip_phy15=0 +phy_tx_polarity_flip_phy16=0 +phy_tx_polarity_flip_phy17=0 +phy_tx_polarity_flip_phy18=0 +phy_tx_polarity_flip_phy19=0 +phy_tx_polarity_flip_phy20=0 +phy_tx_polarity_flip_phy21=0 +phy_tx_polarity_flip_phy22=0 +phy_tx_polarity_flip_phy23=0 +phy_tx_polarity_flip_phy24=0 +phy_tx_polarity_flip_phy25=0 +phy_tx_polarity_flip_phy26=0 +phy_tx_polarity_flip_phy27=0 +phy_tx_polarity_flip_phy28=0 +phy_tx_polarity_flip_phy29=0 +phy_tx_polarity_flip_phy30=0 +phy_tx_polarity_flip_phy31=0 +phy_tx_polarity_flip_phy32=0 +phy_tx_polarity_flip_phy33=0 +phy_tx_polarity_flip_phy34=1 +phy_tx_polarity_flip_phy35=1 +phy_tx_polarity_flip_phy36=1 +phy_tx_polarity_flip_phy37=0 +phy_tx_polarity_flip_phy38=0 +phy_tx_polarity_flip_phy39=1 +phy_tx_polarity_flip_phy40=1 +phy_tx_polarity_flip_phy41=1 +phy_tx_polarity_flip_phy42=0 +phy_tx_polarity_flip_phy43=1 +phy_tx_polarity_flip_phy44=1 +phy_tx_polarity_flip_phy45=1 +phy_tx_polarity_flip_phy46=0 +phy_tx_polarity_flip_phy47=0 +phy_tx_polarity_flip_phy48=0 +phy_tx_polarity_flip_phy49=0 +phy_tx_polarity_flip_phy50=0 +phy_tx_polarity_flip_phy51=0 +phy_tx_polarity_flip_phy52=0 +phy_tx_polarity_flip_phy53=0 +phy_tx_polarity_flip_phy54=0 +phy_tx_polarity_flip_phy55=0 +phy_tx_polarity_flip_phy56=1 +phy_tx_polarity_flip_phy57=1 +phy_tx_polarity_flip_phy58=0 +phy_tx_polarity_flip_phy59=0 +phy_tx_polarity_flip_phy60=1 +phy_tx_polarity_flip_phy61=1 +phy_tx_polarity_flip_phy62=0 +phy_tx_polarity_flip_phy63=0 +phy_tx_polarity_flip_phy64=0 +phy_tx_polarity_flip_phy65=0 +phy_tx_polarity_flip_phy66=0 +phy_tx_polarity_flip_phy67=0 +phy_tx_polarity_flip_phy68=0 +phy_tx_polarity_flip_phy69=0 +phy_tx_polarity_flip_phy70=1 +phy_tx_polarity_flip_phy71=1 +phy_tx_polarity_flip_phy72=1 +phy_tx_polarity_flip_phy73=1 +phy_tx_polarity_flip_phy74=1 +phy_tx_polarity_flip_phy75=1 +phy_tx_polarity_flip_phy76=0 +phy_tx_polarity_flip_phy77=0 +phy_tx_polarity_flip_phy78=1 +phy_tx_polarity_flip_phy79=1 +phy_tx_polarity_flip_phy80=0 +phy_tx_polarity_flip_phy81=1 +phy_tx_polarity_flip_phy82=1 +phy_tx_polarity_flip_phy83=1 +phy_tx_polarity_flip_phy84=1 +phy_tx_polarity_flip_phy85=0 +phy_tx_polarity_flip_phy86=0 +phy_tx_polarity_flip_phy87=1 +phy_tx_polarity_flip_phy88=1 +phy_tx_polarity_flip_phy89=0 +phy_tx_polarity_flip_phy90=0 +phy_tx_polarity_flip_phy91=1 +phy_tx_polarity_flip_phy92=1 +phy_tx_polarity_flip_phy93=1 +phy_tx_polarity_flip_phy94=0 +phy_tx_polarity_flip_phy95=0 + +ucode_port_1=CGE2_0:core_0.1 +ucode_port_2=CGE2_1:core_0.2 +ucode_port_3=CGE2_2:core_0.3 +ucode_port_4=CGE2_3:core_0.4 +ucode_port_5=CGE2_4:core_0.5 +ucode_port_6=CGE2_5:core_0.6 +ucode_port_7=CGE2_6:core_0.7 +ucode_port_8=CGE2_7:core_0.8 +ucode_port_9=CGE2_8:core_0.9 +ucode_port_10=CGE2_9:core_0.10 +ucode_port_11=CGE2_10:core_0.11 +ucode_port_12=CGE2_11:core_0.12 +ucode_port_13=CGE2_12:core_0.13 +ucode_port_14=CGE2_13:core_0.14 +ucode_port_15=CGE2_14:core_0.15 +ucode_port_16=CGE2_15:core_0.16 +ucode_port_17=CGE2_36:core_1.17 +ucode_port_18=CGE2_37:core_1.18 +ucode_port_19=CGE2_38:core_1.19 +ucode_port_20=CGE2_39:core_1.20 +ucode_port_21=CGE2_32:core_1.21 +ucode_port_22=CGE2_33:core_1.22 +ucode_port_23=CGE2_34:core_1.23 +ucode_port_24=CGE2_35:core_1.24 +ucode_port_25=CGE2_28:core_1.25 +ucode_port_26=CGE2_29:core_1.26 +ucode_port_27=CGE2_30:core_1.27 +ucode_port_28=CGE2_31:core_1.28 +ucode_port_29=CGE2_24:core_1.29 +ucode_port_30=CGE2_25:core_1.30 +ucode_port_31=CGE2_26:core_1.31 +ucode_port_32=CGE2_27:core_1.32 + +port_fec_33=2 +port_fec_34=2 +port_fec_35=2 +port_fec_36=2 +port_fec_37=2 +port_fec_38=2 +port_fec_39=2 +port_fec_40=2 + +ucode_port_33=CGE8:core_0.33 +ucode_port_34=CGE9:core_0.34 +ucode_port_35=CGE10:core_0.35 +ucode_port_36=CGE11:core_0.36 +ucode_port_37=CGE22:core_1.37 +ucode_port_38=CGE23:core_1.38 +ucode_port_39=CGE20:core_1.39 +ucode_port_40=CGE21:core_1.40 + +rif_id_max=0x4000 + +dma_desc_aggregator_chain_length_max.BCM8869X=1000 +dma_desc_aggregator_buff_size_kb.BCM8869X=100 +dma_desc_aggregator_timeout_usec.BCM8869X=1000 +dma_desc_aggregator_enable_specific_MDB_LPM.BCM8869X=1 +dma_desc_aggregator_enable_specific_MDB_FEC.BCM8869X=1 diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/port_config.ini b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/port_config.ini new file mode 100644 index 00000000000..2ba638aee50 --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/port_config.ini @@ -0,0 +1,41 @@ +# name lanes alias index speed +Ethernet0 0,1 Ethernet1/1 1 100000 +Ethernet4 2,3 Ethernet2/1 2 100000 +Ethernet8 4,5 Ethernet3/1 3 100000 +Ethernet12 6,7 Ethernet4/1 4 100000 +Ethernet16 8,9 Ethernet5/1 5 100000 +Ethernet20 10,11 Ethernet6/1 6 100000 +Ethernet24 12,13 Ethernet7/1 7 100000 +Ethernet28 14,15 Ethernet8/1 8 100000 +Ethernet32 16,17 Ethernet9/1 9 100000 +Ethernet36 18,19 Ethernet10/1 10 100000 +Ethernet40 20,21 Ethernet11/1 11 100000 +Ethernet44 22,23 Ethernet12/1 12 100000 +Ethernet48 24,25 Ethernet13/1 13 100000 +Ethernet52 26,27 Ethernet14/1 14 100000 +Ethernet56 28,29 Ethernet15/1 15 100000 +Ethernet60 30,31 Ethernet16/1 16 100000 +Ethernet64 72,73 Ethernet17/1 17 100000 +Ethernet68 74,75 Ethernet18/1 18 100000 +Ethernet72 76,77 Ethernet19/1 19 100000 +Ethernet76 78,79 Ethernet20/1 20 100000 +Ethernet80 64,65 Ethernet21/1 21 100000 +Ethernet84 66,67 Ethernet22/1 22 100000 +Ethernet88 68,69 Ethernet23/1 23 100000 +Ethernet92 70,71 Ethernet24/1 24 100000 +Ethernet96 56,57 Ethernet25/1 25 100000 +Ethernet100 58,59 Ethernet26/1 26 100000 +Ethernet104 60,61 Ethernet27/1 27 100000 +Ethernet108 62,63 Ethernet28/1 28 100000 +Ethernet112 48,49 Ethernet29/1 29 100000 +Ethernet116 50,51 Ethernet30/1 30 100000 +Ethernet120 52,53 Ethernet31/1 31 100000 +Ethernet124 54,55 Ethernet32/1 32 100000 +Ethernet128 32,33,34,35 Ethernet33/1 33 100000 +Ethernet132 36,37,38,39 Ethernet33/5 33 100000 +Ethernet136 40,41,42,43 Ethernet34/1 34 100000 +Ethernet140 44,45,46,47 Ethernet34/5 34 100000 +Ethernet144 88,89,90,91 Ethernet35/1 35 100000 +Ethernet148 92,93,94,95 Ethernet35/5 35 100000 +Ethernet152 80,81,82,83 Ethernet36/1 36 100000 +Ethernet156 84,85,86,87 Ethernet36/5 36 100000 diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/sai.profile b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/sai.profile new file mode 100644 index 00000000000..130a3f8c4cb --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/jr2-a7280cr3-32p4-40x100G.config.bcm diff --git a/device/arista/x86_64-arista_7280cr3_32p4/default_sku b/device/arista/x86_64-arista_7280cr3_32p4/default_sku new file mode 100644 index 00000000000..a65e1f845ad --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3_32p4/default_sku @@ -0,0 +1 @@ +Arista-7280CR3-C32P4 t1 diff --git a/device/arista/x86_64-arista_7280cr3_32p4/fancontrol b/device/arista/x86_64-arista_7280cr3_32p4/fancontrol new file mode 100644 index 00000000000..1c0415b7e46 --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3_32p4/fancontrol @@ -0,0 +1,10 @@ +INTERVAL=5 +DEVPATH=hwmon2=devices/pci0000:00/0000:00:09.0 hwmon4=devices/pci0000:00/0000:00:09.0/i2c-56/56-004c +DEVNAME=hwmon2=scd_fan_p3 hwmon4=max6658 +FCTEMPS=hwmon2/pwm6=hwmon4/temp1_input hwmon2/pwm5=hwmon4/temp1_input hwmon2/pwm4=hwmon4/temp1_input hwmon2/pwm4=hwmon4/temp1_input hwmon2/pwm2=hwmon4/temp1_input hwmon2/pwm1=hwmon4/temp1_input +FCFANS=hwmon2/pwm6=hwmon2/fan6_input hwmon2/pwm5=hwmon2/fan5_input hwmon2/pwm4=hwmon2/fan4_input hwmon2/pwm3=hwmon2/fan3_input hwmon2/pwm2=hwmon2/fan2_input hwmon2/pwm1=hwmon2/fan1_input +MINTEMP=hwmon2/pwm6=50 hwmon2/pwm5=50 hwmon2/pwm4=50 hwmon2/pwm3=50 hwmon2/pwm2=50 hwmon2/pwm1=50 +MINPWM=hwmon2/pwm6=128 hwmon2/pwm5=128 hwmon2/pwm4=128 hwmon2/pwm3=128 hwmon2/pwm2=128 hwmon2/pwm1=128 +MAXTEMP=hwmon2/pwm6=60 hwmon2/pwm5=60 hwmon2/pwm4=60 hwmon2/pwm3=60 hwmon2/pwm2=60 hwmon2/pwm1=60 +MINSTART=hwmon2/pwm6=128 hwmon2/pwm5=128 hwmon2/pwm4=128 hwmon2/pwm3=128 hwmon2/pwm2=128 hwmon2/pwm1=128 +MINSTOP=hwmon2/pwm6=128 hwmon2/pwm5=128 hwmon2/pwm4=128 hwmon2/pwm3=128 hwmon2/pwm2=128 hwmon2/pwm1=128 diff --git a/device/arista/x86_64-arista_7280cr3_32p4/platform_reboot b/device/arista/x86_64-arista_7280cr3_32p4/platform_reboot new file mode 120000 index 00000000000..7f94a49e38b --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3_32p4/platform_reboot @@ -0,0 +1 @@ +../x86_64-arista_common/platform_reboot \ No newline at end of file diff --git a/device/arista/x86_64-arista_7280cr3_32p4/plugins b/device/arista/x86_64-arista_7280cr3_32p4/plugins new file mode 120000 index 00000000000..5fbbf98a628 --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3_32p4/plugins @@ -0,0 +1 @@ +../x86_64-arista_common/plugins/ \ No newline at end of file diff --git a/device/arista/x86_64-arista_7280cr3_32p4/sensors.conf b/device/arista/x86_64-arista_7280cr3_32p4/sensors.conf new file mode 100644 index 00000000000..2a80dbd612a --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3_32p4/sensors.conf @@ -0,0 +1,66 @@ +# libsensors configuration file for DCS-7280CR3-32P4 +# ------------------------------------------------# + +bus "i2c-8" "SCD 0000:02:00.0 SMBus master 0 bus 0" +bus "i2c-14" "SCD 0000:02:00.0 SMBus master 0 bus 6" +bus "i2c-15" "SCD 0000:02:00.0 SMBus master 0 bus 7" +bus "i2c-56" "SCD 0000:00:09.0 SMBus master 0 bus 0" + +chip "tmp468-i2c-8-48" + label temp1 "Board sensor" + label temp2 "Front air (inlet) sensor" + label temp3 "Rear air sensor" + label temp4 "Front left sensor" + label temp5 "Front right sensor" + label temp6 "Rear left sensor" + label temp7 "Rear right sensor" + label temp8 "Asic temp sensor 1" + label temp9 "Asic temp sensor 2" + + set temp1_max 75 + set temp1_crit 80 + set temp2_max 65 + set temp2_crit 75 + set temp3_max 65 + set temp3_crit 75 + ignore temp4 + ignore temp5 + ignore temp6 + ignore temp7 + set temp8_max 100 + set temp8_crit 110 + set temp9_max 100 + set temp9_crit 110 + +chip "pmbus-i2c-14-58" + label temp1 "Power supply 1 hotspot sensor" + label temp2 "Power supply 1 inlet temp sensor" + label temp3 "Power supply 1 exhaust temp sensor" + + # setting maximum and critical thresholds is not supported for this psu + # fault and warning limits defined internally by hardware + + ignore fan2 + ignore fan3 + ignore fan4 + +chip "pmbus-i2c-15-58" + label temp1 "Power supply 2 hotspot sensor" + label temp2 "Power supply 2 inlet temp sensor" + label temp3 "Power supply 2 exhaust temp sensor" + + # setting maximum and critical thresholds is not supported for this psu + # fault and warning limits defined internally by hardware + + ignore fan2 + ignore fan3 + ignore fan4 + +chip "max6658-i2c-56-4c" + label temp1 "Back panel temp sensor 1" + label temp2 "Back panel temp sensor 2" + + set temp1_max 75 + set temp1_crit 85 + set temp2_max 75 + set temp2_crit 85 diff --git a/device/arista/x86_64-arista_7280cr3k_32p4 b/device/arista/x86_64-arista_7280cr3k_32p4 new file mode 120000 index 00000000000..d6e2ddbb64b --- /dev/null +++ b/device/arista/x86_64-arista_7280cr3k_32p4 @@ -0,0 +1 @@ +x86_64-arista_7280cr3_32p4 \ No newline at end of file diff --git a/device/arista/x86_64-arista_common/platform_reboot b/device/arista/x86_64-arista_common/platform_reboot new file mode 100755 index 00000000000..b8b1a5d7bfe --- /dev/null +++ b/device/arista/x86_64-arista_common/platform_reboot @@ -0,0 +1,11 @@ +#!/usr/bin/env python + +import arista.platforms +from arista.utils.sonic_reboot import reboot + +def main(): + # reboot the system + reboot() + +if __name__ == "__main__": + main() diff --git a/device/arista/x86_64-arista_common/plugins/eeprom.py b/device/arista/x86_64-arista_common/plugins/eeprom.py new file mode 100644 index 00000000000..5c028697905 --- /dev/null +++ b/device/arista/x86_64-arista_common/plugins/eeprom.py @@ -0,0 +1,13 @@ +#!/usr/bin/env python + +# +# Arista eeprom processing for SONiC +# Uses the arista driver library to obtain the TlvInfoDecoder +# + +try: + import arista.utils.sonic_eeprom as arista_eeprom +except ImportError as e: + raise ImportError("%s - required module not found" % e) + +board = arista_eeprom.getTlvInfoDecoder() diff --git a/device/arista/x86_64-arista_common/plugins/led_control.py b/device/arista/x86_64-arista_common/plugins/led_control.py new file mode 100644 index 00000000000..febb04ad161 --- /dev/null +++ b/device/arista/x86_64-arista_common/plugins/led_control.py @@ -0,0 +1,12 @@ +#!/usr/bin/env python + +# +# Arista LED controls for SONiC +# + +try: + import arista.utils.sonic_leds as arista_leds +except ImportError as e: + raise ImportError("%s - required module not found" % e) + +LedControl = arista_leds.getLedControl() diff --git a/device/arista/x86_64-arista_common/plugins/psuutil.py b/device/arista/x86_64-arista_common/plugins/psuutil.py new file mode 100644 index 00000000000..46ec6b32e2e --- /dev/null +++ b/device/arista/x86_64-arista_common/plugins/psuutil.py @@ -0,0 +1,12 @@ +#!/usr/bin/env python + +# +# Arista PSU interface for SONiC +# + +try: + import arista.utils.sonic_psu as arista_psuutil +except ImportError as e: + raise ImportError("%s - required module not found" % e) + +PsuUtil = arista_psuutil.getPsuUtil() diff --git a/device/arista/x86_64-arista_common/plugins/sfputil.py b/device/arista/x86_64-arista_common/plugins/sfputil.py new file mode 100644 index 00000000000..5e02eef69ae --- /dev/null +++ b/device/arista/x86_64-arista_common/plugins/sfputil.py @@ -0,0 +1,12 @@ +#!/usr/bin/env python + +# +# Arista SFP transceiver interface for SONiC +# + +try: + import arista.utils.sonic_sfputil as arista_sfputil +except ImportError as e: + raise ImportError("%s - required module not found" % e) + +SfpUtil = arista_sfputil.getSfpUtil() diff --git a/device/barefoot/x86_64-accton_as9516bf_32d-r0/default_sku b/device/barefoot/x86_64-accton_as9516bf_32d-r0/default_sku new file mode 100644 index 00000000000..517fa893ae1 --- /dev/null +++ b/device/barefoot/x86_64-accton_as9516bf_32d-r0/default_sku @@ -0,0 +1 @@ +newport t1 diff --git a/device/barefoot/x86_64-accton_as9516bf_32d-r0/installer.conf b/device/barefoot/x86_64-accton_as9516bf_32d-r0/installer.conf new file mode 100644 index 00000000000..3714ff053bb --- /dev/null +++ b/device/barefoot/x86_64-accton_as9516bf_32d-r0/installer.conf @@ -0,0 +1 @@ +CONSOLE_SPEED=57600 diff --git a/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/buffers.json.j2 b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/buffers.json.j2 new file mode 100644 index 00000000000..1083a6210fc --- /dev/null +++ b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/buffers_defaults_t0.j2 b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..33698097285 --- /dev/null +++ b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/buffers_defaults_t0.j2 @@ -0,0 +1,71 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '23850816' %} +{% set ingress_lossy_pool_size = '36222208' %} +{% set egress_lossless_pool_size = '29482816' %} +{% set egress_lossy_pool_size = '26400000' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic", + "xoff": "36222208" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + } + } +{%- endmacro %} diff --git a/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/buffers_defaults_t1.j2 b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..33698097285 --- /dev/null +++ b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/buffers_defaults_t1.j2 @@ -0,0 +1,71 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '23850816' %} +{% set ingress_lossy_pool_size = '36222208' %} +{% set egress_lossless_pool_size = '29482816' %} +{% set egress_lossy_pool_size = '26400000' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic", + "xoff": "36222208" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + } + } +{%- endmacro %} diff --git a/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/pg_profile_lookup.ini b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/pg_profile_lookup.ini new file mode 100644 index 00000000000..602400325be --- /dev/null +++ b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/pg_profile_lookup.ini @@ -0,0 +1,20 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 34816 18432 16384 7 + 25000 5m 34816 18432 16384 7 + 40000 5m 34816 18432 16384 7 + 50000 5m 34816 18432 16384 7 + 100000 5m 36864 18432 18432 7 + 400000 5m 36864 18432 18432 7 + 10000 40m 36864 18432 18432 7 + 25000 40m 39936 18432 21504 7 + 40000 40m 41984 18432 23552 7 + 50000 40m 41984 18432 23552 7 + 100000 40m 54272 18432 35840 7 + 400000 40m 54272 18432 35840 7 + 10000 300m 49152 18432 30720 7 + 25000 300m 71680 18432 53248 7 + 40000 300m 94208 18432 75776 7 + 50000 300m 94208 18432 75776 7 + 100000 300m 184320 18432 165888 7 + 400000 300m 184320 18432 165888 7 diff --git a/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/port_config.ini b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/port_config.ini new file mode 100644 index 00000000000..3a3be79dc67 --- /dev/null +++ b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed autoneg fec +Ethernet0 0,1,2,3,4,5,6,7 Ethernet0 1 400000 0 rs +Ethernet8 8,9,10,11,12,13,14,15 Ethernet8 2 400000 0 rs +Ethernet16 16,17,18,19,20,21,22,23 Ethernet16 3 400000 0 rs +Ethernet24 24,25,26,27,28,29,30,31 Ethernet24 4 400000 0 rs +Ethernet32 32,33,34,35,36,37,38,39 Ethernet32 5 400000 0 rs +Ethernet40 40,41,42,43,44,45,46,47 Ethernet40 6 400000 0 rs +Ethernet48 48,49,50,51,52,53,54,55 Ethernet48 7 400000 0 rs +Ethernet56 56,57,58,59,60,61,62,63 Ethernet56 8 400000 0 rs +Ethernet64 64,65,66,67,68,69,70,71 Ethernet64 9 400000 0 rs +Ethernet72 72,73,74,75,76,77,78,79 Ethernet72 10 400000 0 rs +Ethernet80 80,81,82,83,84,85,86,87 Ethernet80 11 400000 0 rs +Ethernet88 88,89,90,91,92,93,94,95 Ethernet88 12 400000 0 rs +Ethernet96 96,97,98,99,100,101,102,103 Ethernet96 13 400000 0 rs +Ethernet104 104,105,106,107,108,109,110,111 Ethernet104 14 400000 0 rs +Ethernet112 112,113,114,115,116,117,118,119 Ethernet112 15 400000 0 rs +Ethernet120 120,121,122,123,124,125,126,127 Ethernet120 16 400000 0 rs +Ethernet128 128,129,130,131,132,133,134,135 Ethernet128 17 400000 0 rs +Ethernet136 136,137,138,139,140,141,142,143 Ethernet136 18 400000 0 rs +Ethernet144 144,145,146,147,148,149,150,151 Ethernet144 19 400000 0 rs +Ethernet152 152,153,154,155,156,157,158,159 Ethernet152 20 400000 0 rs +Ethernet160 160,161,162,163,164,165,166,167 Ethernet160 21 400000 0 rs +Ethernet168 168,169,170,171,172,173,174,175 Ethernet168 22 400000 0 rs +Ethernet176 176,177,178,179,180,181,182,183 Ethernet176 23 400000 0 rs +Ethernet184 184,185,186,187,188,189,190,191 Ethernet184 24 400000 0 rs +Ethernet192 192,193,194,195,196,197,198,199 Ethernet192 25 400000 0 rs +Ethernet200 200,201,202,203,204,205,206,207 Ethernet200 26 400000 0 rs +Ethernet208 208,209,210,211,212,213,214,215 Ethernet208 27 400000 0 rs +Ethernet216 216,217,218,219,220,221,222,223 Ethernet216 28 400000 0 rs +Ethernet224 224,225,226,227,228,229,230,231 Ethernet224 29 400000 0 rs +Ethernet232 232,233,234,235,236,237,238,239 Ethernet232 30 400000 0 rs +Ethernet240 240,241,242,243,244,245,246,247 Ethernet240 31 400000 0 rs +Ethernet248 248,249,250,251,252,253,254,255 Ethernet248 32 400000 0 rs diff --git a/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/qos.json.j2 b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/qos.json.j2 new file mode 100644 index 00000000000..a685277448f --- /dev/null +++ b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/qos.json.j2 @@ -0,0 +1,10 @@ +{%- macro generate_tc_to_pg_map() %} + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "3": "3", + "4": "4" + } + }, +{%- endmacro %} + +{%- include 'qos_config.j2' %} diff --git a/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/sai.profile b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/sai.profile new file mode 100644 index 00000000000..037b5c13537 --- /dev/null +++ b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/sai.profile @@ -0,0 +1,3 @@ +SAI_KEY_WARM_BOOT_WRITE_FILE=/var/warmboot/sai-warmboot.bin +SAI_KEY_WARM_BOOT_READ_FILE=/var/warmboot/sai-warmboot.bin + diff --git a/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/switch-tna-sai.conf b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/switch-tna-sai.conf new file mode 100644 index 00000000000..ca838c1bb5d --- /dev/null +++ b/device/barefoot/x86_64-accton_as9516bf_32d-r0/newport/switch-tna-sai.conf @@ -0,0 +1,41 @@ +{ + "instance": 0, + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino2", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0", + "pcie_domain": 0, + "pcie_bus": 5, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "p4_devices": [ + { + "device-id": 0, + "agent0": "lib/platform/x86_64-accton_as9516bf_32d-r0/libpltfm_mgr.so", + "p4_programs": [ + { + "p4_pipelines": [ + { + "p4_pipeline_name": "pipe", + "config": "share/switch/pipe/tofino2.bin", + "context": "share/switch/pipe/context.json" + } + ], + "program-name": "switch", + "sai": "lib/libsai.so", + "bfrt-config": "share/switch/bf-rt.json", + "model_json_path" : "share/switch/aug_model.json", + "switchapi_port_add": false, + "non_default_port_ppgs": 5, + "cpu_port": "eth2" + } + ] + } + ] +} diff --git a/device/barefoot/x86_64-accton_as9516bf_32d-r0/plugins b/device/barefoot/x86_64-accton_as9516bf_32d-r0/plugins new file mode 120000 index 00000000000..a8464d1ec2b --- /dev/null +++ b/device/barefoot/x86_64-accton_as9516bf_32d-r0/plugins @@ -0,0 +1 @@ +../x86_64-accton_wedge100bf_32x-r0/plugins/ \ No newline at end of file diff --git a/device/barefoot/x86_64-accton_as9516bf_32d-r0/pmon_daemon_control.json b/device/barefoot/x86_64-accton_as9516bf_32d-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..3a76f2fdd0e --- /dev/null +++ b/device/barefoot/x86_64-accton_as9516bf_32d-r0/pmon_daemon_control.json @@ -0,0 +1,6 @@ +{ + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/default_sku b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/default_sku new file mode 100644 index 00000000000..e2f0630cc57 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/default_sku @@ -0,0 +1 @@ +montara t1 diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/installer.conf b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/installer.conf new file mode 100644 index 00000000000..3714ff053bb --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/installer.conf @@ -0,0 +1 @@ +CONSOLE_SPEED=57600 diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/buffers.json.j2 b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/buffers.json.j2 new file mode 100644 index 00000000000..1083a6210fc --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/buffers_defaults_t0.j2 b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..73e95a457a2 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/buffers_defaults_t0.j2 @@ -0,0 +1,83 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '4194304' %} +{% set ingress_lossy_pool_size = '7340032' %} +{% set egress_lossless_pool_size = '16777152' %} +{% set egress_lossy_pool_size = '7340032' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"4096", + "dynamic_th":"0" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"4096", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + } + }, +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + } + } +{%- endmacro %} diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/buffers_defaults_t1.j2 b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..fce82ea2edf --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/buffers_defaults_t1.j2 @@ -0,0 +1,83 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '2097152' %} +{% set ingress_lossy_pool_size = '5242880' %} +{% set egress_lossless_pool_size = '16777152' %} +{% set egress_lossy_pool_size = '5242880' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"4096", + "dynamic_th":"0" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"4096", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + } + }, +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + } + } +{%- endmacro %} diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/pg_profile_lookup.ini b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/pg_profile_lookup.ini new file mode 100644 index 00000000000..b66b129fe43 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 34816 18432 16384 0 + 25000 5m 34816 18432 16384 0 + 40000 5m 34816 18432 16384 0 + 50000 5m 34816 18432 16384 0 + 100000 5m 36864 18432 18432 0 + 10000 40m 36864 18432 18432 0 + 25000 40m 39936 18432 21504 0 + 40000 40m 41984 18432 23552 0 + 50000 40m 41984 18432 23552 0 + 100000 40m 54272 18432 35840 0 + 10000 300m 49152 18432 30720 0 + 25000 300m 71680 18432 53248 0 + 40000 300m 94208 18432 75776 0 + 50000 300m 94208 18432 75776 0 + 100000 300m 184320 18432 165888 0 diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/port_config.ini b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/port_config.ini new file mode 100644 index 00000000000..d98c55a4e88 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed autoneg fec +Ethernet0 0,1,2,3 Ethernet0 1 100000 0 rs +Ethernet4 4,5,6,7 Ethernet4 2 100000 0 rs +Ethernet8 8,9,10,11 Ethernet8 3 100000 0 rs +Ethernet12 12,13,14,15 Ethernet12 4 100000 0 rs +Ethernet16 16,17,18,19 Ethernet16 5 100000 0 rs +Ethernet20 20,21,22,23 Ethernet20 6 100000 0 rs +Ethernet24 24,25,26,27 Ethernet24 7 100000 0 rs +Ethernet28 28,29,30,31 Ethernet28 8 100000 0 rs +Ethernet32 32,33,34,35 Ethernet32 9 100000 0 rs +Ethernet36 36,37,38,39 Ethernet36 10 100000 0 rs +Ethernet40 40,41,42,43 Ethernet40 11 100000 0 rs +Ethernet44 44,45,46,47 Ethernet44 12 100000 0 rs +Ethernet48 48,49,50,51 Ethernet48 13 100000 0 rs +Ethernet52 52,53,54,55 Ethernet52 14 100000 0 rs +Ethernet56 56,57,58,59 Ethernet56 15 100000 0 rs +Ethernet60 60,61,62,63 Ethernet60 16 100000 0 rs +Ethernet64 64,65,66,67 Ethernet64 17 100000 0 rs +Ethernet68 68,69,70,71 Ethernet68 18 100000 0 rs +Ethernet72 72,73,74,75 Ethernet72 19 100000 0 rs +Ethernet76 76,77,78,79 Ethernet76 20 100000 0 rs +Ethernet80 80,81,82,83 Ethernet80 21 100000 0 rs +Ethernet84 84,85,86,87 Ethernet84 22 100000 0 rs +Ethernet88 88,89,90,91 Ethernet88 23 100000 0 rs +Ethernet92 92,93,94,95 Ethernet92 24 100000 0 rs +Ethernet96 96,97,98,99 Ethernet96 25 100000 0 rs +Ethernet100 100,101,102,103 Ethernet100 26 100000 0 rs +Ethernet104 104,105,106,107 Ethernet104 27 100000 0 rs +Ethernet108 108,109,110,111 Ethernet108 28 100000 0 rs +Ethernet112 112,113,114,115 Ethernet112 29 100000 0 rs +Ethernet116 116,117,118,119 Ethernet116 30 100000 0 rs +Ethernet120 120,121,122,123 Ethernet120 31 100000 0 rs +Ethernet124 124,125,126,127 Ethernet124 32 100000 0 rs diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/qos.json.j2 b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/qos.json.j2 new file mode 100644 index 00000000000..a685277448f --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/qos.json.j2 @@ -0,0 +1,10 @@ +{%- macro generate_tc_to_pg_map() %} + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "3": "3", + "4": "4" + } + }, +{%- endmacro %} + +{%- include 'qos_config.j2' %} diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/sai.profile b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/sai.profile new file mode 100644 index 00000000000..037b5c13537 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/sai.profile @@ -0,0 +1,3 @@ +SAI_KEY_WARM_BOOT_WRITE_FILE=/var/warmboot/sai-warmboot.bin +SAI_KEY_WARM_BOOT_READ_FILE=/var/warmboot/sai-warmboot.bin + diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/switch-sai.conf b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/switch-sai.conf new file mode 100644 index 00000000000..fc224c9602e --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/switch-sai.conf @@ -0,0 +1,34 @@ +{ + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0", + "pcie_domain": 0, + "pcie_bus": 5, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "instance": 0, + "p4_program_list": [ + { + "id": "pgm-0", + "instance": 0, + "path": "switch", + "program-name": "switch", + "pd": "lib/tofinopd/switch/libpd.so", + "pd-thrift": "lib/tofinopd/switch/libpdthrift.so", + "table-config": "share/tofinopd/switch/context.json", + "tofino-bin": "share/tofinopd/switch/tofino.bin", + "switchapi": "lib/libswitchapi.so", + "sai": "lib/libsai.so", + "agent0": "lib/platform/x86_64-accton_wedge100bf_32x-r0/libpltfm_mgr.so", + "switchapi_port_add": false, + "non_default_port_ppgs": 5 + } + ] +} diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/switch-tna-sai.conf b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/switch-tna-sai.conf new file mode 100644 index 00000000000..085a1b8dcdf --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/montara/switch-tna-sai.conf @@ -0,0 +1,40 @@ +{ + "instance": 0, + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0", + "pcie_domain": 0, + "pcie_bus": 5, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "p4_devices": [ + { + "device-id": 0, + "agent0": "lib/platform/x86_64-accton_wedge100bf_32x-r0/libpltfm_mgr.so", + "p4_programs": [ + { + "p4_pipelines": [ + { + "p4_pipeline_name": "pipe", + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" + } + ], + "program-name": "switch", + "sai": "lib/libsai.so", + "bfrt-config": "share/switch/bf-rt.json", + "model_json_path" : "share/switch/aug_model.json", + "switchapi_port_add": false, + "non_default_port_ppgs": 5 + } + ] + } + ] +} diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/eeprom.py b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..9c14441475d --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/eeprom.py @@ -0,0 +1,170 @@ +#!/usr/bin/python + + +try: + import importlib + import time + import os + import re + import sys + import errno + import datetime + import logging + import logging.config + import yaml + + sys.path.append(os.path.dirname(__file__)) + import pltfm_mgr_rpc + from pltfm_mgr_rpc.ttypes import * + + from thrift.transport import TSocket + from thrift.transport import TTransport + from thrift.protocol import TBinaryProtocol + from thrift.protocol import TMultiplexedProtocol + + from argparse import ArgumentParser + from cStringIO import StringIO + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +eeprom_default_dict = { + "prod_name" : ("Product Name", "0x21", 12), + "odm_pcba_part_num" : ("Part Number", "0x22", 13), + "prod_ser_num" : ("Serial Number", "0x23", 12), + "ext_mac_addr" : ("Extended MAC Address Base", "0x24", 12), + "sys_mfg_date" : ("System Manufacturing Date", "0x25", 4), + "prod_ver" : ("Product Version", "0x26", 1), + "ext_mac_addr_size" : ("Extende MAC Address Size", "0x2A", 2), + "sys_mfger" : ("Manufacturer", "0x2B", 8) +} + +eeprom_dict = { "version" : ("Version", None, 0), + "pcb_mfger" : ("PCB Manufacturer", "0x01", 8), + "prod_ser_num" : ("Serial Number", "0x23", 12), + "bfn_pcba_part_num" : ("Switch PCBA Part Number", "0x02", 12), + "odm_pcba_part_num" : ("Part Number", "0x22", 13), + "bfn_pcbb_part_num" : ("Switch PCBB Part Number", "0x04", 12), + "sys_asm_part_num" : ("System Assembly Part Number", "0x05", 12), + "prod_state" : ("Product Production State", "0x06", 1), + "location" : ("EEPROM Location of Fabric", "0x07", 8), + "ext_mac_addr_size" : ("Extende MAC Address Size", "0x08", 2), + "sys_mfg_date" : ("System Manufacturing Date", "0x25", 4), + "prod_name" : ("Product Name", "0x21", 12), + "prod_ver" : ("Product Version", "0x26", 1), + "prod_part_num" : ("Product Part Number", "0x09", 8), + "sys_mfger" : ("Manufacturer", "0x2B", 8), + "assembled_at" : ("Assembled at", "0x08", 8), + "prod_ast_tag" : ("Product Asset Tag", "0x09", 12), + "loc_mac_addr" : ("Local MAC address", "0x0A", 12), + "odm_pcba_ser_num" : ("ODM PBCA Serial Number", "0x0B", 12), + "ext_mac_addr" : ("Extended MAC Address Base", "0x0C", 12), + "prod_sub_ver" : ("Product Sub Version", "0x0D", 1) + } + +product_dict = { "Montara" : "Wedge100BF-32X-O-AC-F-BF", + "Lower MAV" : "Wedge100BF-65X-O-AC-F-BF", + "Upper MAV" : "Wedge100BF-65X-O-AC-F-BF" + } + +thrift_server = 'localhost' +transport = None +pltfm_mgr = None + +EEPROM_SYMLINK = "/var/run/platform/eeprom/syseeprom" +EEPROM_STATUS = "/var/run/platform/eeprom/status" + +class board(eeprom_tlvinfo.TlvInfoDecoder): + RETRIES = 3 + + def __init__(self, name, path, cpld_root, ro): + + with open(os.path.dirname(__file__) + "/logging.conf", 'r') as f: + config_dict = yaml.load(f) + logging.config.dictConfig(config_dict) + + if not os.path.exists(os.path.dirname(EEPROM_SYMLINK)): + try: + os.makedirs(os.path.dirname(EEPROM_SYMLINK)) + except OSError as e: + if e.errno != errno.EEXIST: + raise + + open(EEPROM_SYMLINK, 'a').close() + f = open(EEPROM_STATUS, 'w') + f.write("initializing..") + f.close() + + self.eeprom_path = EEPROM_SYMLINK + super(board, self).__init__(self.eeprom_path, 0, EEPROM_STATUS, True) + + for attempt in range(self.RETRIES): + if self.eeprom_init() or (attempt + 1 >= self.RETRIES): + break + time.sleep(1) + + def thrift_setup(self): + global thrift_server, transport, pltfm_mgr + transport = TSocket.TSocket(thrift_server, 9090) + + transport = TTransport.TBufferedTransport(transport) + bprotocol = TBinaryProtocol.TBinaryProtocol(transport) + + pltfm_mgr_client_module = importlib.import_module(".".join(["pltfm_mgr_rpc", "pltfm_mgr_rpc"])) + pltfm_mgr_protocol = TMultiplexedProtocol.TMultiplexedProtocol(bprotocol, "pltfm_mgr_rpc") + pltfm_mgr = pltfm_mgr_client_module.Client(pltfm_mgr_protocol) + + transport.open() + + def thrift_teardown(self): + global transport + transport.close() + + def eeprom_init(self): + global pltfm_mgr + + try: + self.thrift_setup() + eeprom = pltfm_mgr.pltfm_mgr_sys_eeprom_get() + self.thrift_teardown() + except: + return False + + f = open(EEPROM_STATUS, 'w') + f.write("ok") + f.close() + + eeprom_params = "" + for attr, val in eeprom.__dict__.iteritems(): + if val is None: + continue + + elem = eeprom_default_dict.get(attr) + if elem is None: + continue + + if isinstance(val, basestring): + value = val.replace('\0', '') + else: + value = str(val) + + if attr == "sys_mfg_date": + value = datetime.datetime.strptime(value, '%m-%d-%y').strftime('%m/%d/%Y 00:00:00') + + product = product_dict.get(value) + if product is not None: + value = product + if len(eeprom_params) > 0: + eeprom_params += "," + eeprom_params += "{0:s}={1:s}".format(elem[1], value) + + orig_stdout = sys.stdout + sys.stdout = StringIO() + new_e = eeprom_tlvinfo.TlvInfoDecoder.set_eeprom(self, "", [eeprom_params]) + sys.stdout = orig_stdout + eeprom_base.EepromDecoder.write_eeprom(self, new_e) + + return True + diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/logging.conf b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/logging.conf new file mode 100644 index 00000000000..d7fd8477340 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/logging.conf @@ -0,0 +1,17 @@ +version: 1 +disable_existing_loggers: False + +formatters: + simple: + format: '%(asctime)s %(name)-30s %(levelname)-7s %(message)s' + +handlers: + file: + class: logging.handlers.RotatingFileHandler + formatter: simple + filename: /var/log/platform.log + +root: + level: ERROR + handlers: + - file diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/pltfm_mgr_rpc/__init__.py b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/pltfm_mgr_rpc/__init__.py new file mode 100644 index 00000000000..09cb959f2d4 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/pltfm_mgr_rpc/__init__.py @@ -0,0 +1 @@ +__all__ = ['ttypes', 'constants', 'pltfm_mgr_rpc'] diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/pltfm_mgr_rpc/pltfm_mgr_rpc.py b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/pltfm_mgr_rpc/pltfm_mgr_rpc.py new file mode 100644 index 00000000000..b256b6285fc --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/pltfm_mgr_rpc/pltfm_mgr_rpc.py @@ -0,0 +1,2924 @@ +# +# Autogenerated by Thrift Compiler (0.10.0) +# +# DO NOT EDIT UNLESS YOU ARE SURE THAT YOU KNOW WHAT YOU ARE DOING +# +# options string: py +# + +from thrift.Thrift import TType, TMessageType, TFrozenDict, TException, TApplicationException +from thrift.protocol.TProtocol import TProtocolException +import sys +import logging +from .ttypes import * +from thrift.Thrift import TProcessor +from thrift.transport import TTransport + + +class Iface(object): + def pltfm_mgr_dummy(self, device): + """ + Parameters: + - device + """ + pass + + def pltfm_mgr_sys_tmp_get(self): + pass + + def pltfm_mgr_sys_eeprom_get(self): + pass + + def pltfm_mgr_pwr_supply_present_get(self, ps_num): + """ + Parameters: + - ps_num + """ + pass + + def pltfm_mgr_pwr_supply_info_get(self, ps_num): + """ + Parameters: + - ps_num + """ + pass + + def pltfm_mgr_pwr_rail_info_get(self, ps_num): + """ + Parameters: + - ps_num + """ + pass + + def pltfm_mgr_fan_speed_set(self, fan_num, percent): + """ + Parameters: + - fan_num + - percent + """ + pass + + def pltfm_mgr_fan_info_get(self, fan_num): + """ + Parameters: + - fan_num + """ + pass + + def pltfm_mgr_qsfp_presence_get(self, port_num): + """ + Parameters: + - port_num + """ + pass + + def pltfm_mgr_qsfp_info_get(self, port_num): + """ + Parameters: + - port_num + """ + pass + + def pltfm_mgr_qsfp_get_max_port(self): + pass + + def pltfm_mgr_qsfp_reset(self, port_num, reset): + """ + Parameters: + - port_num + - reset + """ + pass + + def pltfm_mgr_qsfp_lpmode_get(self, port_num): + """ + Parameters: + - port_num + """ + pass + + def pltfm_mgr_qsfp_lpmode_set(self, port_num, lpmode): + """ + Parameters: + - port_num + - lpmode + """ + pass + + def pltfm_mgr_sensor_info_get(self, options): + """ + Parameters: + - options + """ + pass + + +class Client(Iface): + def __init__(self, iprot, oprot=None): + self._iprot = self._oprot = iprot + if oprot is not None: + self._oprot = oprot + self._seqid = 0 + + def pltfm_mgr_dummy(self, device): + """ + Parameters: + - device + """ + self.send_pltfm_mgr_dummy(device) + return self.recv_pltfm_mgr_dummy() + + def send_pltfm_mgr_dummy(self, device): + self._oprot.writeMessageBegin('pltfm_mgr_dummy', TMessageType.CALL, self._seqid) + args = pltfm_mgr_dummy_args() + args.device = device + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_dummy(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_dummy_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_dummy failed: unknown result") + + def pltfm_mgr_sys_tmp_get(self): + self.send_pltfm_mgr_sys_tmp_get() + return self.recv_pltfm_mgr_sys_tmp_get() + + def send_pltfm_mgr_sys_tmp_get(self): + self._oprot.writeMessageBegin('pltfm_mgr_sys_tmp_get', TMessageType.CALL, self._seqid) + args = pltfm_mgr_sys_tmp_get_args() + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_sys_tmp_get(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_sys_tmp_get_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + if result.ouch is not None: + raise result.ouch + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_sys_tmp_get failed: unknown result") + + def pltfm_mgr_sys_eeprom_get(self): + self.send_pltfm_mgr_sys_eeprom_get() + return self.recv_pltfm_mgr_sys_eeprom_get() + + def send_pltfm_mgr_sys_eeprom_get(self): + self._oprot.writeMessageBegin('pltfm_mgr_sys_eeprom_get', TMessageType.CALL, self._seqid) + args = pltfm_mgr_sys_eeprom_get_args() + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_sys_eeprom_get(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_sys_eeprom_get_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + if result.ouch is not None: + raise result.ouch + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_sys_eeprom_get failed: unknown result") + + def pltfm_mgr_pwr_supply_present_get(self, ps_num): + """ + Parameters: + - ps_num + """ + self.send_pltfm_mgr_pwr_supply_present_get(ps_num) + return self.recv_pltfm_mgr_pwr_supply_present_get() + + def send_pltfm_mgr_pwr_supply_present_get(self, ps_num): + self._oprot.writeMessageBegin('pltfm_mgr_pwr_supply_present_get', TMessageType.CALL, self._seqid) + args = pltfm_mgr_pwr_supply_present_get_args() + args.ps_num = ps_num + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_pwr_supply_present_get(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_pwr_supply_present_get_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + if result.ouch is not None: + raise result.ouch + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_pwr_supply_present_get failed: unknown result") + + def pltfm_mgr_pwr_supply_info_get(self, ps_num): + """ + Parameters: + - ps_num + """ + self.send_pltfm_mgr_pwr_supply_info_get(ps_num) + return self.recv_pltfm_mgr_pwr_supply_info_get() + + def send_pltfm_mgr_pwr_supply_info_get(self, ps_num): + self._oprot.writeMessageBegin('pltfm_mgr_pwr_supply_info_get', TMessageType.CALL, self._seqid) + args = pltfm_mgr_pwr_supply_info_get_args() + args.ps_num = ps_num + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_pwr_supply_info_get(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_pwr_supply_info_get_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + if result.ouch is not None: + raise result.ouch + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_pwr_supply_info_get failed: unknown result") + + def pltfm_mgr_pwr_rail_info_get(self, ps_num): + """ + Parameters: + - ps_num + """ + self.send_pltfm_mgr_pwr_rail_info_get(ps_num) + return self.recv_pltfm_mgr_pwr_rail_info_get() + + def send_pltfm_mgr_pwr_rail_info_get(self, ps_num): + self._oprot.writeMessageBegin('pltfm_mgr_pwr_rail_info_get', TMessageType.CALL, self._seqid) + args = pltfm_mgr_pwr_rail_info_get_args() + args.ps_num = ps_num + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_pwr_rail_info_get(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_pwr_rail_info_get_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + if result.ouch is not None: + raise result.ouch + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_pwr_rail_info_get failed: unknown result") + + def pltfm_mgr_fan_speed_set(self, fan_num, percent): + """ + Parameters: + - fan_num + - percent + """ + self.send_pltfm_mgr_fan_speed_set(fan_num, percent) + return self.recv_pltfm_mgr_fan_speed_set() + + def send_pltfm_mgr_fan_speed_set(self, fan_num, percent): + self._oprot.writeMessageBegin('pltfm_mgr_fan_speed_set', TMessageType.CALL, self._seqid) + args = pltfm_mgr_fan_speed_set_args() + args.fan_num = fan_num + args.percent = percent + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_fan_speed_set(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_fan_speed_set_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + if result.ouch is not None: + raise result.ouch + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_fan_speed_set failed: unknown result") + + def pltfm_mgr_fan_info_get(self, fan_num): + """ + Parameters: + - fan_num + """ + self.send_pltfm_mgr_fan_info_get(fan_num) + return self.recv_pltfm_mgr_fan_info_get() + + def send_pltfm_mgr_fan_info_get(self, fan_num): + self._oprot.writeMessageBegin('pltfm_mgr_fan_info_get', TMessageType.CALL, self._seqid) + args = pltfm_mgr_fan_info_get_args() + args.fan_num = fan_num + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_fan_info_get(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_fan_info_get_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + if result.ouch is not None: + raise result.ouch + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_fan_info_get failed: unknown result") + + def pltfm_mgr_qsfp_presence_get(self, port_num): + """ + Parameters: + - port_num + """ + self.send_pltfm_mgr_qsfp_presence_get(port_num) + return self.recv_pltfm_mgr_qsfp_presence_get() + + def send_pltfm_mgr_qsfp_presence_get(self, port_num): + self._oprot.writeMessageBegin('pltfm_mgr_qsfp_presence_get', TMessageType.CALL, self._seqid) + args = pltfm_mgr_qsfp_presence_get_args() + args.port_num = port_num + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_qsfp_presence_get(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_qsfp_presence_get_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + if result.ouch is not None: + raise result.ouch + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_qsfp_presence_get failed: unknown result") + + def pltfm_mgr_qsfp_info_get(self, port_num): + """ + Parameters: + - port_num + """ + self.send_pltfm_mgr_qsfp_info_get(port_num) + return self.recv_pltfm_mgr_qsfp_info_get() + + def send_pltfm_mgr_qsfp_info_get(self, port_num): + self._oprot.writeMessageBegin('pltfm_mgr_qsfp_info_get', TMessageType.CALL, self._seqid) + args = pltfm_mgr_qsfp_info_get_args() + args.port_num = port_num + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_qsfp_info_get(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_qsfp_info_get_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + if result.ouch is not None: + raise result.ouch + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_qsfp_info_get failed: unknown result") + + def pltfm_mgr_qsfp_get_max_port(self): + self.send_pltfm_mgr_qsfp_get_max_port() + return self.recv_pltfm_mgr_qsfp_get_max_port() + + def send_pltfm_mgr_qsfp_get_max_port(self): + self._oprot.writeMessageBegin('pltfm_mgr_qsfp_get_max_port', TMessageType.CALL, self._seqid) + args = pltfm_mgr_qsfp_get_max_port_args() + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_qsfp_get_max_port(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_qsfp_get_max_port_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + if result.ouch is not None: + raise result.ouch + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_qsfp_get_max_port failed: unknown result") + + def pltfm_mgr_qsfp_reset(self, port_num, reset): + """ + Parameters: + - port_num + - reset + """ + self.send_pltfm_mgr_qsfp_reset(port_num, reset) + return self.recv_pltfm_mgr_qsfp_reset() + + def send_pltfm_mgr_qsfp_reset(self, port_num, reset): + self._oprot.writeMessageBegin('pltfm_mgr_qsfp_reset', TMessageType.CALL, self._seqid) + args = pltfm_mgr_qsfp_reset_args() + args.port_num = port_num + args.reset = reset + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_qsfp_reset(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_qsfp_reset_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + if result.ouch is not None: + raise result.ouch + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_qsfp_reset failed: unknown result") + + def pltfm_mgr_qsfp_lpmode_get(self, port_num): + """ + Parameters: + - port_num + """ + self.send_pltfm_mgr_qsfp_lpmode_get(port_num) + return self.recv_pltfm_mgr_qsfp_lpmode_get() + + def send_pltfm_mgr_qsfp_lpmode_get(self, port_num): + self._oprot.writeMessageBegin('pltfm_mgr_qsfp_lpmode_get', TMessageType.CALL, self._seqid) + args = pltfm_mgr_qsfp_lpmode_get_args() + args.port_num = port_num + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_qsfp_lpmode_get(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_qsfp_lpmode_get_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + if result.ouch is not None: + raise result.ouch + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_qsfp_lpmode_get failed: unknown result") + + def pltfm_mgr_qsfp_lpmode_set(self, port_num, lpmode): + """ + Parameters: + - port_num + - lpmode + """ + self.send_pltfm_mgr_qsfp_lpmode_set(port_num, lpmode) + return self.recv_pltfm_mgr_qsfp_lpmode_set() + + def send_pltfm_mgr_qsfp_lpmode_set(self, port_num, lpmode): + self._oprot.writeMessageBegin('pltfm_mgr_qsfp_lpmode_set', TMessageType.CALL, self._seqid) + args = pltfm_mgr_qsfp_lpmode_set_args() + args.port_num = port_num + args.lpmode = lpmode + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_qsfp_lpmode_set(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_qsfp_lpmode_set_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + if result.ouch is not None: + raise result.ouch + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_qsfp_lpmode_set failed: unknown result") + + def pltfm_mgr_sensor_info_get(self, options): + """ + Parameters: + - options + """ + self.send_pltfm_mgr_sensor_info_get(options) + return self.recv_pltfm_mgr_sensor_info_get() + + def send_pltfm_mgr_sensor_info_get(self, options): + self._oprot.writeMessageBegin('pltfm_mgr_sensor_info_get', TMessageType.CALL, self._seqid) + args = pltfm_mgr_sensor_info_get_args() + args.options = options + args.write(self._oprot) + self._oprot.writeMessageEnd() + self._oprot.trans.flush() + + def recv_pltfm_mgr_sensor_info_get(self): + iprot = self._iprot + (fname, mtype, rseqid) = iprot.readMessageBegin() + if mtype == TMessageType.EXCEPTION: + x = TApplicationException() + x.read(iprot) + iprot.readMessageEnd() + raise x + result = pltfm_mgr_sensor_info_get_result() + result.read(iprot) + iprot.readMessageEnd() + if result.success is not None: + return result.success + if result.ouch is not None: + raise result.ouch + raise TApplicationException(TApplicationException.MISSING_RESULT, "pltfm_mgr_sensor_info_get failed: unknown result") + + +class Processor(Iface, TProcessor): + def __init__(self, handler): + self._handler = handler + self._processMap = {} + self._processMap["pltfm_mgr_dummy"] = Processor.process_pltfm_mgr_dummy + self._processMap["pltfm_mgr_sys_tmp_get"] = Processor.process_pltfm_mgr_sys_tmp_get + self._processMap["pltfm_mgr_sys_eeprom_get"] = Processor.process_pltfm_mgr_sys_eeprom_get + self._processMap["pltfm_mgr_pwr_supply_present_get"] = Processor.process_pltfm_mgr_pwr_supply_present_get + self._processMap["pltfm_mgr_pwr_supply_info_get"] = Processor.process_pltfm_mgr_pwr_supply_info_get + self._processMap["pltfm_mgr_pwr_rail_info_get"] = Processor.process_pltfm_mgr_pwr_rail_info_get + self._processMap["pltfm_mgr_fan_speed_set"] = Processor.process_pltfm_mgr_fan_speed_set + self._processMap["pltfm_mgr_fan_info_get"] = Processor.process_pltfm_mgr_fan_info_get + self._processMap["pltfm_mgr_qsfp_presence_get"] = Processor.process_pltfm_mgr_qsfp_presence_get + self._processMap["pltfm_mgr_qsfp_info_get"] = Processor.process_pltfm_mgr_qsfp_info_get + self._processMap["pltfm_mgr_qsfp_get_max_port"] = Processor.process_pltfm_mgr_qsfp_get_max_port + self._processMap["pltfm_mgr_qsfp_reset"] = Processor.process_pltfm_mgr_qsfp_reset + self._processMap["pltfm_mgr_qsfp_lpmode_get"] = Processor.process_pltfm_mgr_qsfp_lpmode_get + self._processMap["pltfm_mgr_qsfp_lpmode_set"] = Processor.process_pltfm_mgr_qsfp_lpmode_set + self._processMap["pltfm_mgr_sensor_info_get"] = Processor.process_pltfm_mgr_sensor_info_get + + def process(self, iprot, oprot): + (name, type, seqid) = iprot.readMessageBegin() + if name not in self._processMap: + iprot.skip(TType.STRUCT) + iprot.readMessageEnd() + x = TApplicationException(TApplicationException.UNKNOWN_METHOD, 'Unknown function %s' % (name)) + oprot.writeMessageBegin(name, TMessageType.EXCEPTION, seqid) + x.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + return + else: + self._processMap[name](self, seqid, iprot, oprot) + return True + + def process_pltfm_mgr_dummy(self, seqid, iprot, oprot): + args = pltfm_mgr_dummy_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_dummy_result() + try: + result.success = self._handler.pltfm_mgr_dummy(args.device) + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_dummy", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + + def process_pltfm_mgr_sys_tmp_get(self, seqid, iprot, oprot): + args = pltfm_mgr_sys_tmp_get_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_sys_tmp_get_result() + try: + result.success = self._handler.pltfm_mgr_sys_tmp_get() + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except InvalidPltfmMgrOperation as ouch: + msg_type = TMessageType.REPLY + result.ouch = ouch + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_sys_tmp_get", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + + def process_pltfm_mgr_sys_eeprom_get(self, seqid, iprot, oprot): + args = pltfm_mgr_sys_eeprom_get_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_sys_eeprom_get_result() + try: + result.success = self._handler.pltfm_mgr_sys_eeprom_get() + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except InvalidPltfmMgrOperation as ouch: + msg_type = TMessageType.REPLY + result.ouch = ouch + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_sys_eeprom_get", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + + def process_pltfm_mgr_pwr_supply_present_get(self, seqid, iprot, oprot): + args = pltfm_mgr_pwr_supply_present_get_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_pwr_supply_present_get_result() + try: + result.success = self._handler.pltfm_mgr_pwr_supply_present_get(args.ps_num) + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except InvalidPltfmMgrOperation as ouch: + msg_type = TMessageType.REPLY + result.ouch = ouch + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_pwr_supply_present_get", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + + def process_pltfm_mgr_pwr_supply_info_get(self, seqid, iprot, oprot): + args = pltfm_mgr_pwr_supply_info_get_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_pwr_supply_info_get_result() + try: + result.success = self._handler.pltfm_mgr_pwr_supply_info_get(args.ps_num) + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except InvalidPltfmMgrOperation as ouch: + msg_type = TMessageType.REPLY + result.ouch = ouch + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_pwr_supply_info_get", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + + def process_pltfm_mgr_pwr_rail_info_get(self, seqid, iprot, oprot): + args = pltfm_mgr_pwr_rail_info_get_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_pwr_rail_info_get_result() + try: + result.success = self._handler.pltfm_mgr_pwr_rail_info_get(args.ps_num) + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except InvalidPltfmMgrOperation as ouch: + msg_type = TMessageType.REPLY + result.ouch = ouch + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_pwr_rail_info_get", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + + def process_pltfm_mgr_fan_speed_set(self, seqid, iprot, oprot): + args = pltfm_mgr_fan_speed_set_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_fan_speed_set_result() + try: + result.success = self._handler.pltfm_mgr_fan_speed_set(args.fan_num, args.percent) + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except InvalidPltfmMgrOperation as ouch: + msg_type = TMessageType.REPLY + result.ouch = ouch + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_fan_speed_set", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + + def process_pltfm_mgr_fan_info_get(self, seqid, iprot, oprot): + args = pltfm_mgr_fan_info_get_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_fan_info_get_result() + try: + result.success = self._handler.pltfm_mgr_fan_info_get(args.fan_num) + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except InvalidPltfmMgrOperation as ouch: + msg_type = TMessageType.REPLY + result.ouch = ouch + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_fan_info_get", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + + def process_pltfm_mgr_qsfp_presence_get(self, seqid, iprot, oprot): + args = pltfm_mgr_qsfp_presence_get_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_qsfp_presence_get_result() + try: + result.success = self._handler.pltfm_mgr_qsfp_presence_get(args.port_num) + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except InvalidPltfmMgrOperation as ouch: + msg_type = TMessageType.REPLY + result.ouch = ouch + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_qsfp_presence_get", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + + def process_pltfm_mgr_qsfp_info_get(self, seqid, iprot, oprot): + args = pltfm_mgr_qsfp_info_get_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_qsfp_info_get_result() + try: + result.success = self._handler.pltfm_mgr_qsfp_info_get(args.port_num) + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except InvalidPltfmMgrOperation as ouch: + msg_type = TMessageType.REPLY + result.ouch = ouch + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_qsfp_info_get", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + + def process_pltfm_mgr_qsfp_get_max_port(self, seqid, iprot, oprot): + args = pltfm_mgr_qsfp_get_max_port_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_qsfp_get_max_port_result() + try: + result.success = self._handler.pltfm_mgr_qsfp_get_max_port() + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except InvalidPltfmMgrOperation as ouch: + msg_type = TMessageType.REPLY + result.ouch = ouch + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_qsfp_get_max_port", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + + def process_pltfm_mgr_qsfp_reset(self, seqid, iprot, oprot): + args = pltfm_mgr_qsfp_reset_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_qsfp_reset_result() + try: + result.success = self._handler.pltfm_mgr_qsfp_reset(args.port_num, args.reset) + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except InvalidPltfmMgrOperation as ouch: + msg_type = TMessageType.REPLY + result.ouch = ouch + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_qsfp_reset", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + + def process_pltfm_mgr_qsfp_lpmode_get(self, seqid, iprot, oprot): + args = pltfm_mgr_qsfp_lpmode_get_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_qsfp_lpmode_get_result() + try: + result.success = self._handler.pltfm_mgr_qsfp_lpmode_get(args.port_num) + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except InvalidPltfmMgrOperation as ouch: + msg_type = TMessageType.REPLY + result.ouch = ouch + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_qsfp_lpmode_get", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + + def process_pltfm_mgr_qsfp_lpmode_set(self, seqid, iprot, oprot): + args = pltfm_mgr_qsfp_lpmode_set_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_qsfp_lpmode_set_result() + try: + result.success = self._handler.pltfm_mgr_qsfp_lpmode_set(args.port_num, args.lpmode) + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except InvalidPltfmMgrOperation as ouch: + msg_type = TMessageType.REPLY + result.ouch = ouch + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_qsfp_lpmode_set", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + + def process_pltfm_mgr_sensor_info_get(self, seqid, iprot, oprot): + args = pltfm_mgr_sensor_info_get_args() + args.read(iprot) + iprot.readMessageEnd() + result = pltfm_mgr_sensor_info_get_result() + try: + result.success = self._handler.pltfm_mgr_sensor_info_get(args.options) + msg_type = TMessageType.REPLY + except (TTransport.TTransportException, KeyboardInterrupt, SystemExit): + raise + except InvalidPltfmMgrOperation as ouch: + msg_type = TMessageType.REPLY + result.ouch = ouch + except Exception as ex: + msg_type = TMessageType.EXCEPTION + logging.exception(ex) + result = TApplicationException(TApplicationException.INTERNAL_ERROR, 'Internal error') + oprot.writeMessageBegin("pltfm_mgr_sensor_info_get", msg_type, seqid) + result.write(oprot) + oprot.writeMessageEnd() + oprot.trans.flush() + +# HELPER FUNCTIONS AND STRUCTURES + + +class pltfm_mgr_dummy_args(object): + """ + Attributes: + - device + """ + + thrift_spec = ( + None, # 0 + (1, TType.BYTE, 'device', None, None, ), # 1 + ) + + def __init__(self, device=None,): + self.device = device + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.BYTE: + self.device = iprot.readByte() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_dummy_args') + if self.device is not None: + oprot.writeFieldBegin('device', TType.BYTE, 1) + oprot.writeByte(self.device) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_dummy_result(object): + """ + Attributes: + - success + """ + + thrift_spec = ( + (0, TType.I32, 'success', None, None, ), # 0 + ) + + def __init__(self, success=None,): + self.success = success + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.I32: + self.success = iprot.readI32() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_dummy_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.I32, 0) + oprot.writeI32(self.success) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_sys_tmp_get_args(object): + + thrift_spec = ( + ) + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_sys_tmp_get_args') + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_sys_tmp_get_result(object): + """ + Attributes: + - success + - ouch + """ + + thrift_spec = ( + (0, TType.STRUCT, 'success', (pltfm_mgr_sys_tmp_t, pltfm_mgr_sys_tmp_t.thrift_spec), None, ), # 0 + (1, TType.STRUCT, 'ouch', (InvalidPltfmMgrOperation, InvalidPltfmMgrOperation.thrift_spec), None, ), # 1 + ) + + def __init__(self, success=None, ouch=None,): + self.success = success + self.ouch = ouch + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.STRUCT: + self.success = pltfm_mgr_sys_tmp_t() + self.success.read(iprot) + else: + iprot.skip(ftype) + elif fid == 1: + if ftype == TType.STRUCT: + self.ouch = InvalidPltfmMgrOperation() + self.ouch.read(iprot) + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_sys_tmp_get_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.STRUCT, 0) + self.success.write(oprot) + oprot.writeFieldEnd() + if self.ouch is not None: + oprot.writeFieldBegin('ouch', TType.STRUCT, 1) + self.ouch.write(oprot) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_sys_eeprom_get_args(object): + + thrift_spec = ( + ) + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_sys_eeprom_get_args') + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_sys_eeprom_get_result(object): + """ + Attributes: + - success + - ouch + """ + + thrift_spec = ( + (0, TType.STRUCT, 'success', (pltfm_mgr_eeprom_t, pltfm_mgr_eeprom_t.thrift_spec), None, ), # 0 + (1, TType.STRUCT, 'ouch', (InvalidPltfmMgrOperation, InvalidPltfmMgrOperation.thrift_spec), None, ), # 1 + ) + + def __init__(self, success=None, ouch=None,): + self.success = success + self.ouch = ouch + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.STRUCT: + self.success = pltfm_mgr_eeprom_t() + self.success.read(iprot) + else: + iprot.skip(ftype) + elif fid == 1: + if ftype == TType.STRUCT: + self.ouch = InvalidPltfmMgrOperation() + self.ouch.read(iprot) + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_sys_eeprom_get_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.STRUCT, 0) + self.success.write(oprot) + oprot.writeFieldEnd() + if self.ouch is not None: + oprot.writeFieldBegin('ouch', TType.STRUCT, 1) + self.ouch.write(oprot) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_pwr_supply_present_get_args(object): + """ + Attributes: + - ps_num + """ + + thrift_spec = ( + None, # 0 + (1, TType.I16, 'ps_num', None, None, ), # 1 + ) + + def __init__(self, ps_num=None,): + self.ps_num = ps_num + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I16: + self.ps_num = iprot.readI16() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_pwr_supply_present_get_args') + if self.ps_num is not None: + oprot.writeFieldBegin('ps_num', TType.I16, 1) + oprot.writeI16(self.ps_num) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_pwr_supply_present_get_result(object): + """ + Attributes: + - success + - ouch + """ + + thrift_spec = ( + (0, TType.BOOL, 'success', None, None, ), # 0 + (1, TType.STRUCT, 'ouch', (InvalidPltfmMgrOperation, InvalidPltfmMgrOperation.thrift_spec), None, ), # 1 + ) + + def __init__(self, success=None, ouch=None,): + self.success = success + self.ouch = ouch + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.BOOL: + self.success = iprot.readBool() + else: + iprot.skip(ftype) + elif fid == 1: + if ftype == TType.STRUCT: + self.ouch = InvalidPltfmMgrOperation() + self.ouch.read(iprot) + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_pwr_supply_present_get_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.BOOL, 0) + oprot.writeBool(self.success) + oprot.writeFieldEnd() + if self.ouch is not None: + oprot.writeFieldBegin('ouch', TType.STRUCT, 1) + self.ouch.write(oprot) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_pwr_supply_info_get_args(object): + """ + Attributes: + - ps_num + """ + + thrift_spec = ( + None, # 0 + (1, TType.I16, 'ps_num', None, None, ), # 1 + ) + + def __init__(self, ps_num=None,): + self.ps_num = ps_num + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I16: + self.ps_num = iprot.readI16() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_pwr_supply_info_get_args') + if self.ps_num is not None: + oprot.writeFieldBegin('ps_num', TType.I16, 1) + oprot.writeI16(self.ps_num) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_pwr_supply_info_get_result(object): + """ + Attributes: + - success + - ouch + """ + + thrift_spec = ( + (0, TType.STRUCT, 'success', (pltfm_mgr_pwr_supply_info_t, pltfm_mgr_pwr_supply_info_t.thrift_spec), None, ), # 0 + (1, TType.STRUCT, 'ouch', (InvalidPltfmMgrOperation, InvalidPltfmMgrOperation.thrift_spec), None, ), # 1 + ) + + def __init__(self, success=None, ouch=None,): + self.success = success + self.ouch = ouch + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.STRUCT: + self.success = pltfm_mgr_pwr_supply_info_t() + self.success.read(iprot) + else: + iprot.skip(ftype) + elif fid == 1: + if ftype == TType.STRUCT: + self.ouch = InvalidPltfmMgrOperation() + self.ouch.read(iprot) + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_pwr_supply_info_get_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.STRUCT, 0) + self.success.write(oprot) + oprot.writeFieldEnd() + if self.ouch is not None: + oprot.writeFieldBegin('ouch', TType.STRUCT, 1) + self.ouch.write(oprot) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_pwr_rail_info_get_args(object): + """ + Attributes: + - ps_num + """ + + thrift_spec = ( + None, # 0 + (1, TType.I16, 'ps_num', None, None, ), # 1 + ) + + def __init__(self, ps_num=None,): + self.ps_num = ps_num + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I16: + self.ps_num = iprot.readI16() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_pwr_rail_info_get_args') + if self.ps_num is not None: + oprot.writeFieldBegin('ps_num', TType.I16, 1) + oprot.writeI16(self.ps_num) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_pwr_rail_info_get_result(object): + """ + Attributes: + - success + - ouch + """ + + thrift_spec = ( + (0, TType.STRUCT, 'success', (pltfm_mgr_pwr_rail_info_t, pltfm_mgr_pwr_rail_info_t.thrift_spec), None, ), # 0 + (1, TType.STRUCT, 'ouch', (InvalidPltfmMgrOperation, InvalidPltfmMgrOperation.thrift_spec), None, ), # 1 + ) + + def __init__(self, success=None, ouch=None,): + self.success = success + self.ouch = ouch + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.STRUCT: + self.success = pltfm_mgr_pwr_rail_info_t() + self.success.read(iprot) + else: + iprot.skip(ftype) + elif fid == 1: + if ftype == TType.STRUCT: + self.ouch = InvalidPltfmMgrOperation() + self.ouch.read(iprot) + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_pwr_rail_info_get_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.STRUCT, 0) + self.success.write(oprot) + oprot.writeFieldEnd() + if self.ouch is not None: + oprot.writeFieldBegin('ouch', TType.STRUCT, 1) + self.ouch.write(oprot) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_fan_speed_set_args(object): + """ + Attributes: + - fan_num + - percent + """ + + thrift_spec = ( + None, # 0 + (1, TType.I32, 'fan_num', None, None, ), # 1 + (2, TType.I32, 'percent', None, None, ), # 2 + ) + + def __init__(self, fan_num=None, percent=None,): + self.fan_num = fan_num + self.percent = percent + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I32: + self.fan_num = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 2: + if ftype == TType.I32: + self.percent = iprot.readI32() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_fan_speed_set_args') + if self.fan_num is not None: + oprot.writeFieldBegin('fan_num', TType.I32, 1) + oprot.writeI32(self.fan_num) + oprot.writeFieldEnd() + if self.percent is not None: + oprot.writeFieldBegin('percent', TType.I32, 2) + oprot.writeI32(self.percent) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_fan_speed_set_result(object): + """ + Attributes: + - success + - ouch + """ + + thrift_spec = ( + (0, TType.I32, 'success', None, None, ), # 0 + (1, TType.STRUCT, 'ouch', (InvalidPltfmMgrOperation, InvalidPltfmMgrOperation.thrift_spec), None, ), # 1 + ) + + def __init__(self, success=None, ouch=None,): + self.success = success + self.ouch = ouch + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.I32: + self.success = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 1: + if ftype == TType.STRUCT: + self.ouch = InvalidPltfmMgrOperation() + self.ouch.read(iprot) + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_fan_speed_set_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.I32, 0) + oprot.writeI32(self.success) + oprot.writeFieldEnd() + if self.ouch is not None: + oprot.writeFieldBegin('ouch', TType.STRUCT, 1) + self.ouch.write(oprot) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_fan_info_get_args(object): + """ + Attributes: + - fan_num + """ + + thrift_spec = ( + None, # 0 + (1, TType.I32, 'fan_num', None, None, ), # 1 + ) + + def __init__(self, fan_num=None,): + self.fan_num = fan_num + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I32: + self.fan_num = iprot.readI32() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_fan_info_get_args') + if self.fan_num is not None: + oprot.writeFieldBegin('fan_num', TType.I32, 1) + oprot.writeI32(self.fan_num) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_fan_info_get_result(object): + """ + Attributes: + - success + - ouch + """ + + thrift_spec = ( + (0, TType.STRUCT, 'success', (pltfm_mgr_fan_info_t, pltfm_mgr_fan_info_t.thrift_spec), None, ), # 0 + (1, TType.STRUCT, 'ouch', (InvalidPltfmMgrOperation, InvalidPltfmMgrOperation.thrift_spec), None, ), # 1 + ) + + def __init__(self, success=None, ouch=None,): + self.success = success + self.ouch = ouch + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.STRUCT: + self.success = pltfm_mgr_fan_info_t() + self.success.read(iprot) + else: + iprot.skip(ftype) + elif fid == 1: + if ftype == TType.STRUCT: + self.ouch = InvalidPltfmMgrOperation() + self.ouch.read(iprot) + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_fan_info_get_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.STRUCT, 0) + self.success.write(oprot) + oprot.writeFieldEnd() + if self.ouch is not None: + oprot.writeFieldBegin('ouch', TType.STRUCT, 1) + self.ouch.write(oprot) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_qsfp_presence_get_args(object): + """ + Attributes: + - port_num + """ + + thrift_spec = ( + None, # 0 + (1, TType.I32, 'port_num', None, None, ), # 1 + ) + + def __init__(self, port_num=None,): + self.port_num = port_num + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I32: + self.port_num = iprot.readI32() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_qsfp_presence_get_args') + if self.port_num is not None: + oprot.writeFieldBegin('port_num', TType.I32, 1) + oprot.writeI32(self.port_num) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_qsfp_presence_get_result(object): + """ + Attributes: + - success + - ouch + """ + + thrift_spec = ( + (0, TType.BOOL, 'success', None, None, ), # 0 + (1, TType.STRUCT, 'ouch', (InvalidPltfmMgrOperation, InvalidPltfmMgrOperation.thrift_spec), None, ), # 1 + ) + + def __init__(self, success=None, ouch=None,): + self.success = success + self.ouch = ouch + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.BOOL: + self.success = iprot.readBool() + else: + iprot.skip(ftype) + elif fid == 1: + if ftype == TType.STRUCT: + self.ouch = InvalidPltfmMgrOperation() + self.ouch.read(iprot) + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_qsfp_presence_get_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.BOOL, 0) + oprot.writeBool(self.success) + oprot.writeFieldEnd() + if self.ouch is not None: + oprot.writeFieldBegin('ouch', TType.STRUCT, 1) + self.ouch.write(oprot) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_qsfp_info_get_args(object): + """ + Attributes: + - port_num + """ + + thrift_spec = ( + None, # 0 + (1, TType.I32, 'port_num', None, None, ), # 1 + ) + + def __init__(self, port_num=None,): + self.port_num = port_num + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I32: + self.port_num = iprot.readI32() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_qsfp_info_get_args') + if self.port_num is not None: + oprot.writeFieldBegin('port_num', TType.I32, 1) + oprot.writeI32(self.port_num) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_qsfp_info_get_result(object): + """ + Attributes: + - success + - ouch + """ + + thrift_spec = ( + (0, TType.STRING, 'success', 'UTF8', None, ), # 0 + (1, TType.STRUCT, 'ouch', (InvalidPltfmMgrOperation, InvalidPltfmMgrOperation.thrift_spec), None, ), # 1 + ) + + def __init__(self, success=None, ouch=None,): + self.success = success + self.ouch = ouch + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.STRING: + self.success = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 1: + if ftype == TType.STRUCT: + self.ouch = InvalidPltfmMgrOperation() + self.ouch.read(iprot) + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_qsfp_info_get_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.STRING, 0) + oprot.writeString(self.success.encode('utf-8') if sys.version_info[0] == 2 else self.success) + oprot.writeFieldEnd() + if self.ouch is not None: + oprot.writeFieldBegin('ouch', TType.STRUCT, 1) + self.ouch.write(oprot) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_qsfp_get_max_port_args(object): + + thrift_spec = ( + ) + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_qsfp_get_max_port_args') + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_qsfp_get_max_port_result(object): + """ + Attributes: + - success + - ouch + """ + + thrift_spec = ( + (0, TType.I32, 'success', None, None, ), # 0 + (1, TType.STRUCT, 'ouch', (InvalidPltfmMgrOperation, InvalidPltfmMgrOperation.thrift_spec), None, ), # 1 + ) + + def __init__(self, success=None, ouch=None,): + self.success = success + self.ouch = ouch + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.I32: + self.success = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 1: + if ftype == TType.STRUCT: + self.ouch = InvalidPltfmMgrOperation() + self.ouch.read(iprot) + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_qsfp_get_max_port_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.I32, 0) + oprot.writeI32(self.success) + oprot.writeFieldEnd() + if self.ouch is not None: + oprot.writeFieldBegin('ouch', TType.STRUCT, 1) + self.ouch.write(oprot) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_qsfp_reset_args(object): + """ + Attributes: + - port_num + - reset + """ + + thrift_spec = ( + None, # 0 + (1, TType.I32, 'port_num', None, None, ), # 1 + (2, TType.BOOL, 'reset', None, None, ), # 2 + ) + + def __init__(self, port_num=None, reset=None,): + self.port_num = port_num + self.reset = reset + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I32: + self.port_num = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 2: + if ftype == TType.BOOL: + self.reset = iprot.readBool() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_qsfp_reset_args') + if self.port_num is not None: + oprot.writeFieldBegin('port_num', TType.I32, 1) + oprot.writeI32(self.port_num) + oprot.writeFieldEnd() + if self.reset is not None: + oprot.writeFieldBegin('reset', TType.BOOL, 2) + oprot.writeBool(self.reset) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_qsfp_reset_result(object): + """ + Attributes: + - success + - ouch + """ + + thrift_spec = ( + (0, TType.I32, 'success', None, None, ), # 0 + (1, TType.STRUCT, 'ouch', (InvalidPltfmMgrOperation, InvalidPltfmMgrOperation.thrift_spec), None, ), # 1 + ) + + def __init__(self, success=None, ouch=None,): + self.success = success + self.ouch = ouch + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.I32: + self.success = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 1: + if ftype == TType.STRUCT: + self.ouch = InvalidPltfmMgrOperation() + self.ouch.read(iprot) + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_qsfp_reset_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.I32, 0) + oprot.writeI32(self.success) + oprot.writeFieldEnd() + if self.ouch is not None: + oprot.writeFieldBegin('ouch', TType.STRUCT, 1) + self.ouch.write(oprot) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_qsfp_lpmode_get_args(object): + """ + Attributes: + - port_num + """ + + thrift_spec = ( + None, # 0 + (1, TType.I32, 'port_num', None, None, ), # 1 + ) + + def __init__(self, port_num=None,): + self.port_num = port_num + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I32: + self.port_num = iprot.readI32() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_qsfp_lpmode_get_args') + if self.port_num is not None: + oprot.writeFieldBegin('port_num', TType.I32, 1) + oprot.writeI32(self.port_num) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_qsfp_lpmode_get_result(object): + """ + Attributes: + - success + - ouch + """ + + thrift_spec = ( + (0, TType.BOOL, 'success', None, None, ), # 0 + (1, TType.STRUCT, 'ouch', (InvalidPltfmMgrOperation, InvalidPltfmMgrOperation.thrift_spec), None, ), # 1 + ) + + def __init__(self, success=None, ouch=None,): + self.success = success + self.ouch = ouch + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.BOOL: + self.success = iprot.readBool() + else: + iprot.skip(ftype) + elif fid == 1: + if ftype == TType.STRUCT: + self.ouch = InvalidPltfmMgrOperation() + self.ouch.read(iprot) + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_qsfp_lpmode_get_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.BOOL, 0) + oprot.writeBool(self.success) + oprot.writeFieldEnd() + if self.ouch is not None: + oprot.writeFieldBegin('ouch', TType.STRUCT, 1) + self.ouch.write(oprot) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_qsfp_lpmode_set_args(object): + """ + Attributes: + - port_num + - lpmode + """ + + thrift_spec = ( + None, # 0 + (1, TType.I32, 'port_num', None, None, ), # 1 + (2, TType.BOOL, 'lpmode', None, None, ), # 2 + ) + + def __init__(self, port_num=None, lpmode=None,): + self.port_num = port_num + self.lpmode = lpmode + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I32: + self.port_num = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 2: + if ftype == TType.BOOL: + self.lpmode = iprot.readBool() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_qsfp_lpmode_set_args') + if self.port_num is not None: + oprot.writeFieldBegin('port_num', TType.I32, 1) + oprot.writeI32(self.port_num) + oprot.writeFieldEnd() + if self.lpmode is not None: + oprot.writeFieldBegin('lpmode', TType.BOOL, 2) + oprot.writeBool(self.lpmode) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_qsfp_lpmode_set_result(object): + """ + Attributes: + - success + - ouch + """ + + thrift_spec = ( + (0, TType.I32, 'success', None, None, ), # 0 + (1, TType.STRUCT, 'ouch', (InvalidPltfmMgrOperation, InvalidPltfmMgrOperation.thrift_spec), None, ), # 1 + ) + + def __init__(self, success=None, ouch=None,): + self.success = success + self.ouch = ouch + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.I32: + self.success = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 1: + if ftype == TType.STRUCT: + self.ouch = InvalidPltfmMgrOperation() + self.ouch.read(iprot) + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_qsfp_lpmode_set_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.I32, 0) + oprot.writeI32(self.success) + oprot.writeFieldEnd() + if self.ouch is not None: + oprot.writeFieldBegin('ouch', TType.STRUCT, 1) + self.ouch.write(oprot) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_sensor_info_get_args(object): + """ + Attributes: + - options + """ + + thrift_spec = ( + None, # 0 + (1, TType.STRING, 'options', 'UTF8', None, ), # 1 + ) + + def __init__(self, options=None,): + self.options = options + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.STRING: + self.options = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_sensor_info_get_args') + if self.options is not None: + oprot.writeFieldBegin('options', TType.STRING, 1) + oprot.writeString(self.options.encode('utf-8') if sys.version_info[0] == 2 else self.options) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_sensor_info_get_result(object): + """ + Attributes: + - success + - ouch + """ + + thrift_spec = ( + (0, TType.STRING, 'success', 'UTF8', None, ), # 0 + (1, TType.STRUCT, 'ouch', (InvalidPltfmMgrOperation, InvalidPltfmMgrOperation.thrift_spec), None, ), # 1 + ) + + def __init__(self, success=None, ouch=None,): + self.success = success + self.ouch = ouch + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 0: + if ftype == TType.STRING: + self.success = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 1: + if ftype == TType.STRUCT: + self.ouch = InvalidPltfmMgrOperation() + self.ouch.read(iprot) + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_sensor_info_get_result') + if self.success is not None: + oprot.writeFieldBegin('success', TType.STRING, 0) + oprot.writeString(self.success.encode('utf-8') if sys.version_info[0] == 2 else self.success) + oprot.writeFieldEnd() + if self.ouch is not None: + oprot.writeFieldBegin('ouch', TType.STRUCT, 1) + self.ouch.write(oprot) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/pltfm_mgr_rpc/ttypes.py b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/pltfm_mgr_rpc/ttypes.py new file mode 100644 index 00000000000..ce03e14f869 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/pltfm_mgr_rpc/ttypes.py @@ -0,0 +1,1060 @@ +# +# Autogenerated by Thrift Compiler (0.10.0) +# +# DO NOT EDIT UNLESS YOU ARE SURE THAT YOU KNOW WHAT YOU ARE DOING +# +# options string: py +# + +from thrift.Thrift import TType, TMessageType, TFrozenDict, TException, TApplicationException +from thrift.protocol.TProtocol import TProtocolException +import sys + +from thrift.transport import TTransport + + +class pltfm_mgr_sys_tmp_t(object): + """ + Attributes: + - tmp1 + - tmp2 + - tmp3 + - tmp4 + - tmp5 + - tmp6 + - tmp7 + - tmp8 + - tmp9 + - tmp10 + """ + + thrift_spec = ( + None, # 0 + (1, TType.DOUBLE, 'tmp1', None, None, ), # 1 + (2, TType.DOUBLE, 'tmp2', None, None, ), # 2 + (3, TType.DOUBLE, 'tmp3', None, None, ), # 3 + (4, TType.DOUBLE, 'tmp4', None, None, ), # 4 + (5, TType.DOUBLE, 'tmp5', None, None, ), # 5 + (6, TType.DOUBLE, 'tmp6', None, None, ), # 6 + (7, TType.DOUBLE, 'tmp7', None, None, ), # 7 + (8, TType.DOUBLE, 'tmp8', None, None, ), # 8 + (9, TType.DOUBLE, 'tmp9', None, None, ), # 9 + (10, TType.DOUBLE, 'tmp10', None, None, ), # 10 + ) + + def __init__(self, tmp1=None, tmp2=None, tmp3=None, tmp4=None, tmp5=None, tmp6=None, tmp7=None, tmp8=None, tmp9=None, tmp10=None,): + self.tmp1 = tmp1 + self.tmp2 = tmp2 + self.tmp3 = tmp3 + self.tmp4 = tmp4 + self.tmp5 = tmp5 + self.tmp6 = tmp6 + self.tmp7 = tmp7 + self.tmp8 = tmp8 + self.tmp9 = tmp9 + self.tmp10 = tmp10 + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.DOUBLE: + self.tmp1 = iprot.readDouble() + else: + iprot.skip(ftype) + elif fid == 2: + if ftype == TType.DOUBLE: + self.tmp2 = iprot.readDouble() + else: + iprot.skip(ftype) + elif fid == 3: + if ftype == TType.DOUBLE: + self.tmp3 = iprot.readDouble() + else: + iprot.skip(ftype) + elif fid == 4: + if ftype == TType.DOUBLE: + self.tmp4 = iprot.readDouble() + else: + iprot.skip(ftype) + elif fid == 5: + if ftype == TType.DOUBLE: + self.tmp5 = iprot.readDouble() + else: + iprot.skip(ftype) + elif fid == 6: + if ftype == TType.DOUBLE: + self.tmp6 = iprot.readDouble() + else: + iprot.skip(ftype) + elif fid == 7: + if ftype == TType.DOUBLE: + self.tmp7 = iprot.readDouble() + else: + iprot.skip(ftype) + elif fid == 8: + if ftype == TType.DOUBLE: + self.tmp8 = iprot.readDouble() + else: + iprot.skip(ftype) + elif fid == 9: + if ftype == TType.DOUBLE: + self.tmp9 = iprot.readDouble() + else: + iprot.skip(ftype) + elif fid == 10: + if ftype == TType.DOUBLE: + self.tmp10 = iprot.readDouble() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_sys_tmp_t') + if self.tmp1 is not None: + oprot.writeFieldBegin('tmp1', TType.DOUBLE, 1) + oprot.writeDouble(self.tmp1) + oprot.writeFieldEnd() + if self.tmp2 is not None: + oprot.writeFieldBegin('tmp2', TType.DOUBLE, 2) + oprot.writeDouble(self.tmp2) + oprot.writeFieldEnd() + if self.tmp3 is not None: + oprot.writeFieldBegin('tmp3', TType.DOUBLE, 3) + oprot.writeDouble(self.tmp3) + oprot.writeFieldEnd() + if self.tmp4 is not None: + oprot.writeFieldBegin('tmp4', TType.DOUBLE, 4) + oprot.writeDouble(self.tmp4) + oprot.writeFieldEnd() + if self.tmp5 is not None: + oprot.writeFieldBegin('tmp5', TType.DOUBLE, 5) + oprot.writeDouble(self.tmp5) + oprot.writeFieldEnd() + if self.tmp6 is not None: + oprot.writeFieldBegin('tmp6', TType.DOUBLE, 6) + oprot.writeDouble(self.tmp6) + oprot.writeFieldEnd() + if self.tmp7 is not None: + oprot.writeFieldBegin('tmp7', TType.DOUBLE, 7) + oprot.writeDouble(self.tmp7) + oprot.writeFieldEnd() + if self.tmp8 is not None: + oprot.writeFieldBegin('tmp8', TType.DOUBLE, 8) + oprot.writeDouble(self.tmp8) + oprot.writeFieldEnd() + if self.tmp9 is not None: + oprot.writeFieldBegin('tmp9', TType.DOUBLE, 9) + oprot.writeDouble(self.tmp9) + oprot.writeFieldEnd() + if self.tmp10 is not None: + oprot.writeFieldBegin('tmp10', TType.DOUBLE, 10) + oprot.writeDouble(self.tmp10) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_eeprom_t(object): + """ + Attributes: + - version + - prod_name + - prod_part_num + - sys_asm_part_num + - bfn_pcba_part_num + - bfn_pcbb_part_num + - odm_pcba_part_num + - odm_pcba_ser_num + - prod_state + - prod_ver + - prod_sub_ver + - prod_ser_num + - prod_ast_tag + - sys_mfger + - sys_mfg_date + - pcb_mfger + - assembled_at + - loc_mac_addr + - ext_mac_addr + - ext_mac_addr_size + - location + - crc8 + """ + + thrift_spec = ( + None, # 0 + (1, TType.I16, 'version', None, None, ), # 1 + (2, TType.STRING, 'prod_name', 'UTF8', None, ), # 2 + (3, TType.STRING, 'prod_part_num', 'UTF8', None, ), # 3 + (4, TType.STRING, 'sys_asm_part_num', 'UTF8', None, ), # 4 + (5, TType.STRING, 'bfn_pcba_part_num', 'UTF8', None, ), # 5 + (6, TType.STRING, 'bfn_pcbb_part_num', 'UTF8', None, ), # 6 + (7, TType.STRING, 'odm_pcba_part_num', 'UTF8', None, ), # 7 + (8, TType.STRING, 'odm_pcba_ser_num', 'UTF8', None, ), # 8 + (9, TType.I16, 'prod_state', None, None, ), # 9 + (10, TType.I16, 'prod_ver', None, None, ), # 10 + (11, TType.I16, 'prod_sub_ver', None, None, ), # 11 + (12, TType.STRING, 'prod_ser_num', 'UTF8', None, ), # 12 + (13, TType.STRING, 'prod_ast_tag', 'UTF8', None, ), # 13 + (14, TType.STRING, 'sys_mfger', 'UTF8', None, ), # 14 + (15, TType.STRING, 'sys_mfg_date', 'UTF8', None, ), # 15 + (16, TType.STRING, 'pcb_mfger', 'UTF8', None, ), # 16 + (17, TType.STRING, 'assembled_at', 'UTF8', None, ), # 17 + (18, TType.STRING, 'loc_mac_addr', 'UTF8', None, ), # 18 + (19, TType.STRING, 'ext_mac_addr', 'UTF8', None, ), # 19 + (20, TType.I32, 'ext_mac_addr_size', None, None, ), # 20 + (21, TType.STRING, 'location', 'UTF8', None, ), # 21 + (22, TType.I16, 'crc8', None, None, ), # 22 + ) + + def __init__(self, version=None, prod_name=None, prod_part_num=None, sys_asm_part_num=None, bfn_pcba_part_num=None, bfn_pcbb_part_num=None, odm_pcba_part_num=None, odm_pcba_ser_num=None, prod_state=None, prod_ver=None, prod_sub_ver=None, prod_ser_num=None, prod_ast_tag=None, sys_mfger=None, sys_mfg_date=None, pcb_mfger=None, assembled_at=None, loc_mac_addr=None, ext_mac_addr=None, ext_mac_addr_size=None, location=None, crc8=None,): + self.version = version + self.prod_name = prod_name + self.prod_part_num = prod_part_num + self.sys_asm_part_num = sys_asm_part_num + self.bfn_pcba_part_num = bfn_pcba_part_num + self.bfn_pcbb_part_num = bfn_pcbb_part_num + self.odm_pcba_part_num = odm_pcba_part_num + self.odm_pcba_ser_num = odm_pcba_ser_num + self.prod_state = prod_state + self.prod_ver = prod_ver + self.prod_sub_ver = prod_sub_ver + self.prod_ser_num = prod_ser_num + self.prod_ast_tag = prod_ast_tag + self.sys_mfger = sys_mfger + self.sys_mfg_date = sys_mfg_date + self.pcb_mfger = pcb_mfger + self.assembled_at = assembled_at + self.loc_mac_addr = loc_mac_addr + self.ext_mac_addr = ext_mac_addr + self.ext_mac_addr_size = ext_mac_addr_size + self.location = location + self.crc8 = crc8 + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I16: + self.version = iprot.readI16() + else: + iprot.skip(ftype) + elif fid == 2: + if ftype == TType.STRING: + self.prod_name = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 3: + if ftype == TType.STRING: + self.prod_part_num = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 4: + if ftype == TType.STRING: + self.sys_asm_part_num = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 5: + if ftype == TType.STRING: + self.bfn_pcba_part_num = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 6: + if ftype == TType.STRING: + self.bfn_pcbb_part_num = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 7: + if ftype == TType.STRING: + self.odm_pcba_part_num = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 8: + if ftype == TType.STRING: + self.odm_pcba_ser_num = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 9: + if ftype == TType.I16: + self.prod_state = iprot.readI16() + else: + iprot.skip(ftype) + elif fid == 10: + if ftype == TType.I16: + self.prod_ver = iprot.readI16() + else: + iprot.skip(ftype) + elif fid == 11: + if ftype == TType.I16: + self.prod_sub_ver = iprot.readI16() + else: + iprot.skip(ftype) + elif fid == 12: + if ftype == TType.STRING: + self.prod_ser_num = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 13: + if ftype == TType.STRING: + self.prod_ast_tag = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 14: + if ftype == TType.STRING: + self.sys_mfger = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 15: + if ftype == TType.STRING: + self.sys_mfg_date = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 16: + if ftype == TType.STRING: + self.pcb_mfger = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 17: + if ftype == TType.STRING: + self.assembled_at = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 18: + if ftype == TType.STRING: + self.loc_mac_addr = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 19: + if ftype == TType.STRING: + self.ext_mac_addr = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 20: + if ftype == TType.I32: + self.ext_mac_addr_size = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 21: + if ftype == TType.STRING: + self.location = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 22: + if ftype == TType.I16: + self.crc8 = iprot.readI16() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_eeprom_t') + if self.version is not None: + oprot.writeFieldBegin('version', TType.I16, 1) + oprot.writeI16(self.version) + oprot.writeFieldEnd() + if self.prod_name is not None: + oprot.writeFieldBegin('prod_name', TType.STRING, 2) + oprot.writeString(self.prod_name.encode('utf-8') if sys.version_info[0] == 2 else self.prod_name) + oprot.writeFieldEnd() + if self.prod_part_num is not None: + oprot.writeFieldBegin('prod_part_num', TType.STRING, 3) + oprot.writeString(self.prod_part_num.encode('utf-8') if sys.version_info[0] == 2 else self.prod_part_num) + oprot.writeFieldEnd() + if self.sys_asm_part_num is not None: + oprot.writeFieldBegin('sys_asm_part_num', TType.STRING, 4) + oprot.writeString(self.sys_asm_part_num.encode('utf-8') if sys.version_info[0] == 2 else self.sys_asm_part_num) + oprot.writeFieldEnd() + if self.bfn_pcba_part_num is not None: + oprot.writeFieldBegin('bfn_pcba_part_num', TType.STRING, 5) + oprot.writeString(self.bfn_pcba_part_num.encode('utf-8') if sys.version_info[0] == 2 else self.bfn_pcba_part_num) + oprot.writeFieldEnd() + if self.bfn_pcbb_part_num is not None: + oprot.writeFieldBegin('bfn_pcbb_part_num', TType.STRING, 6) + oprot.writeString(self.bfn_pcbb_part_num.encode('utf-8') if sys.version_info[0] == 2 else self.bfn_pcbb_part_num) + oprot.writeFieldEnd() + if self.odm_pcba_part_num is not None: + oprot.writeFieldBegin('odm_pcba_part_num', TType.STRING, 7) + oprot.writeString(self.odm_pcba_part_num.encode('utf-8') if sys.version_info[0] == 2 else self.odm_pcba_part_num) + oprot.writeFieldEnd() + if self.odm_pcba_ser_num is not None: + oprot.writeFieldBegin('odm_pcba_ser_num', TType.STRING, 8) + oprot.writeString(self.odm_pcba_ser_num.encode('utf-8') if sys.version_info[0] == 2 else self.odm_pcba_ser_num) + oprot.writeFieldEnd() + if self.prod_state is not None: + oprot.writeFieldBegin('prod_state', TType.I16, 9) + oprot.writeI16(self.prod_state) + oprot.writeFieldEnd() + if self.prod_ver is not None: + oprot.writeFieldBegin('prod_ver', TType.I16, 10) + oprot.writeI16(self.prod_ver) + oprot.writeFieldEnd() + if self.prod_sub_ver is not None: + oprot.writeFieldBegin('prod_sub_ver', TType.I16, 11) + oprot.writeI16(self.prod_sub_ver) + oprot.writeFieldEnd() + if self.prod_ser_num is not None: + oprot.writeFieldBegin('prod_ser_num', TType.STRING, 12) + oprot.writeString(self.prod_ser_num.encode('utf-8') if sys.version_info[0] == 2 else self.prod_ser_num) + oprot.writeFieldEnd() + if self.prod_ast_tag is not None: + oprot.writeFieldBegin('prod_ast_tag', TType.STRING, 13) + oprot.writeString(self.prod_ast_tag.encode('utf-8') if sys.version_info[0] == 2 else self.prod_ast_tag) + oprot.writeFieldEnd() + if self.sys_mfger is not None: + oprot.writeFieldBegin('sys_mfger', TType.STRING, 14) + oprot.writeString(self.sys_mfger.encode('utf-8') if sys.version_info[0] == 2 else self.sys_mfger) + oprot.writeFieldEnd() + if self.sys_mfg_date is not None: + oprot.writeFieldBegin('sys_mfg_date', TType.STRING, 15) + oprot.writeString(self.sys_mfg_date.encode('utf-8') if sys.version_info[0] == 2 else self.sys_mfg_date) + oprot.writeFieldEnd() + if self.pcb_mfger is not None: + oprot.writeFieldBegin('pcb_mfger', TType.STRING, 16) + oprot.writeString(self.pcb_mfger.encode('utf-8') if sys.version_info[0] == 2 else self.pcb_mfger) + oprot.writeFieldEnd() + if self.assembled_at is not None: + oprot.writeFieldBegin('assembled_at', TType.STRING, 17) + oprot.writeString(self.assembled_at.encode('utf-8') if sys.version_info[0] == 2 else self.assembled_at) + oprot.writeFieldEnd() + if self.loc_mac_addr is not None: + oprot.writeFieldBegin('loc_mac_addr', TType.STRING, 18) + oprot.writeString(self.loc_mac_addr.encode('utf-8') if sys.version_info[0] == 2 else self.loc_mac_addr) + oprot.writeFieldEnd() + if self.ext_mac_addr is not None: + oprot.writeFieldBegin('ext_mac_addr', TType.STRING, 19) + oprot.writeString(self.ext_mac_addr.encode('utf-8') if sys.version_info[0] == 2 else self.ext_mac_addr) + oprot.writeFieldEnd() + if self.ext_mac_addr_size is not None: + oprot.writeFieldBegin('ext_mac_addr_size', TType.I32, 20) + oprot.writeI32(self.ext_mac_addr_size) + oprot.writeFieldEnd() + if self.location is not None: + oprot.writeFieldBegin('location', TType.STRING, 21) + oprot.writeString(self.location.encode('utf-8') if sys.version_info[0] == 2 else self.location) + oprot.writeFieldEnd() + if self.crc8 is not None: + oprot.writeFieldBegin('crc8', TType.I16, 22) + oprot.writeI16(self.crc8) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_pwr_supply_info_t(object): + """ + Attributes: + - vin + - vout + - iout + - pwr_out + - fspeed + - ffault + - load_sharing + - model + - serial + - rev + """ + + thrift_spec = ( + None, # 0 + (1, TType.I32, 'vin', None, None, ), # 1 + (2, TType.I32, 'vout', None, None, ), # 2 + (3, TType.I32, 'iout', None, None, ), # 3 + (4, TType.I32, 'pwr_out', None, None, ), # 4 + (5, TType.I32, 'fspeed', None, None, ), # 5 + (6, TType.BOOL, 'ffault', None, None, ), # 6 + (7, TType.BOOL, 'load_sharing', None, None, ), # 7 + (8, TType.STRING, 'model', 'UTF8', None, ), # 8 + (9, TType.STRING, 'serial', 'UTF8', None, ), # 9 + (10, TType.STRING, 'rev', 'UTF8', None, ), # 10 + ) + + def __init__(self, vin=None, vout=None, iout=None, pwr_out=None, fspeed=None, ffault=None, load_sharing=None, model=None, serial=None, rev=None,): + self.vin = vin + self.vout = vout + self.iout = iout + self.pwr_out = pwr_out + self.fspeed = fspeed + self.ffault = ffault + self.load_sharing = load_sharing + self.model = model + self.serial = serial + self.rev = rev + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I32: + self.vin = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 2: + if ftype == TType.I32: + self.vout = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 3: + if ftype == TType.I32: + self.iout = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 4: + if ftype == TType.I32: + self.pwr_out = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 5: + if ftype == TType.I32: + self.fspeed = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 6: + if ftype == TType.BOOL: + self.ffault = iprot.readBool() + else: + iprot.skip(ftype) + elif fid == 7: + if ftype == TType.BOOL: + self.load_sharing = iprot.readBool() + else: + iprot.skip(ftype) + elif fid == 8: + if ftype == TType.STRING: + self.model = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 9: + if ftype == TType.STRING: + self.serial = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + elif fid == 10: + if ftype == TType.STRING: + self.rev = iprot.readString().decode('utf-8') if sys.version_info[0] == 2 else iprot.readString() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_pwr_supply_info_t') + if self.vin is not None: + oprot.writeFieldBegin('vin', TType.I32, 1) + oprot.writeI32(self.vin) + oprot.writeFieldEnd() + if self.vout is not None: + oprot.writeFieldBegin('vout', TType.I32, 2) + oprot.writeI32(self.vout) + oprot.writeFieldEnd() + if self.iout is not None: + oprot.writeFieldBegin('iout', TType.I32, 3) + oprot.writeI32(self.iout) + oprot.writeFieldEnd() + if self.pwr_out is not None: + oprot.writeFieldBegin('pwr_out', TType.I32, 4) + oprot.writeI32(self.pwr_out) + oprot.writeFieldEnd() + if self.fspeed is not None: + oprot.writeFieldBegin('fspeed', TType.I32, 5) + oprot.writeI32(self.fspeed) + oprot.writeFieldEnd() + if self.ffault is not None: + oprot.writeFieldBegin('ffault', TType.BOOL, 6) + oprot.writeBool(self.ffault) + oprot.writeFieldEnd() + if self.load_sharing is not None: + oprot.writeFieldBegin('load_sharing', TType.BOOL, 7) + oprot.writeBool(self.load_sharing) + oprot.writeFieldEnd() + if self.model is not None: + oprot.writeFieldBegin('model', TType.STRING, 8) + oprot.writeString(self.model.encode('utf-8') if sys.version_info[0] == 2 else self.model) + oprot.writeFieldEnd() + if self.serial is not None: + oprot.writeFieldBegin('serial', TType.STRING, 9) + oprot.writeString(self.serial.encode('utf-8') if sys.version_info[0] == 2 else self.serial) + oprot.writeFieldEnd() + if self.rev is not None: + oprot.writeFieldBegin('rev', TType.STRING, 10) + oprot.writeString(self.rev.encode('utf-8') if sys.version_info[0] == 2 else self.rev) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_pwr_rail_info_t(object): + """ + Attributes: + - vrail1 + - vrail2 + - vrail3 + - vrail4 + - vrail5 + - vrail6 + - vrail7 + - vrail8 + - vrail9 + - vrail10 + - vrail11 + - vrail12 + - vrail13 + - vrail14 + - vrail15 + - vrail16 + """ + + thrift_spec = ( + None, # 0 + (1, TType.I32, 'vrail1', None, None, ), # 1 + (2, TType.I32, 'vrail2', None, None, ), # 2 + (3, TType.I32, 'vrail3', None, None, ), # 3 + (4, TType.I32, 'vrail4', None, None, ), # 4 + (5, TType.I32, 'vrail5', None, None, ), # 5 + (6, TType.I32, 'vrail6', None, None, ), # 6 + (7, TType.I32, 'vrail7', None, None, ), # 7 + (8, TType.I32, 'vrail8', None, None, ), # 8 + (9, TType.I32, 'vrail9', None, None, ), # 9 + (10, TType.I32, 'vrail10', None, None, ), # 10 + (11, TType.I32, 'vrail11', None, None, ), # 11 + (12, TType.I32, 'vrail12', None, None, ), # 12 + (13, TType.I32, 'vrail13', None, None, ), # 13 + (14, TType.I32, 'vrail14', None, None, ), # 14 + (15, TType.I32, 'vrail15', None, None, ), # 15 + (16, TType.I32, 'vrail16', None, None, ), # 16 + ) + + def __init__(self, vrail1=None, vrail2=None, vrail3=None, vrail4=None, vrail5=None, vrail6=None, vrail7=None, vrail8=None, vrail9=None, vrail10=None, vrail11=None, vrail12=None, vrail13=None, vrail14=None, vrail15=None, vrail16=None,): + self.vrail1 = vrail1 + self.vrail2 = vrail2 + self.vrail3 = vrail3 + self.vrail4 = vrail4 + self.vrail5 = vrail5 + self.vrail6 = vrail6 + self.vrail7 = vrail7 + self.vrail8 = vrail8 + self.vrail9 = vrail9 + self.vrail10 = vrail10 + self.vrail11 = vrail11 + self.vrail12 = vrail12 + self.vrail13 = vrail13 + self.vrail14 = vrail14 + self.vrail15 = vrail15 + self.vrail16 = vrail16 + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I32: + self.vrail1 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 2: + if ftype == TType.I32: + self.vrail2 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 3: + if ftype == TType.I32: + self.vrail3 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 4: + if ftype == TType.I32: + self.vrail4 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 5: + if ftype == TType.I32: + self.vrail5 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 6: + if ftype == TType.I32: + self.vrail6 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 7: + if ftype == TType.I32: + self.vrail7 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 8: + if ftype == TType.I32: + self.vrail8 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 9: + if ftype == TType.I32: + self.vrail9 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 10: + if ftype == TType.I32: + self.vrail10 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 11: + if ftype == TType.I32: + self.vrail11 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 12: + if ftype == TType.I32: + self.vrail12 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 13: + if ftype == TType.I32: + self.vrail13 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 14: + if ftype == TType.I32: + self.vrail14 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 15: + if ftype == TType.I32: + self.vrail15 = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 16: + if ftype == TType.I32: + self.vrail16 = iprot.readI32() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_pwr_rail_info_t') + if self.vrail1 is not None: + oprot.writeFieldBegin('vrail1', TType.I32, 1) + oprot.writeI32(self.vrail1) + oprot.writeFieldEnd() + if self.vrail2 is not None: + oprot.writeFieldBegin('vrail2', TType.I32, 2) + oprot.writeI32(self.vrail2) + oprot.writeFieldEnd() + if self.vrail3 is not None: + oprot.writeFieldBegin('vrail3', TType.I32, 3) + oprot.writeI32(self.vrail3) + oprot.writeFieldEnd() + if self.vrail4 is not None: + oprot.writeFieldBegin('vrail4', TType.I32, 4) + oprot.writeI32(self.vrail4) + oprot.writeFieldEnd() + if self.vrail5 is not None: + oprot.writeFieldBegin('vrail5', TType.I32, 5) + oprot.writeI32(self.vrail5) + oprot.writeFieldEnd() + if self.vrail6 is not None: + oprot.writeFieldBegin('vrail6', TType.I32, 6) + oprot.writeI32(self.vrail6) + oprot.writeFieldEnd() + if self.vrail7 is not None: + oprot.writeFieldBegin('vrail7', TType.I32, 7) + oprot.writeI32(self.vrail7) + oprot.writeFieldEnd() + if self.vrail8 is not None: + oprot.writeFieldBegin('vrail8', TType.I32, 8) + oprot.writeI32(self.vrail8) + oprot.writeFieldEnd() + if self.vrail9 is not None: + oprot.writeFieldBegin('vrail9', TType.I32, 9) + oprot.writeI32(self.vrail9) + oprot.writeFieldEnd() + if self.vrail10 is not None: + oprot.writeFieldBegin('vrail10', TType.I32, 10) + oprot.writeI32(self.vrail10) + oprot.writeFieldEnd() + if self.vrail11 is not None: + oprot.writeFieldBegin('vrail11', TType.I32, 11) + oprot.writeI32(self.vrail11) + oprot.writeFieldEnd() + if self.vrail12 is not None: + oprot.writeFieldBegin('vrail12', TType.I32, 12) + oprot.writeI32(self.vrail12) + oprot.writeFieldEnd() + if self.vrail13 is not None: + oprot.writeFieldBegin('vrail13', TType.I32, 13) + oprot.writeI32(self.vrail13) + oprot.writeFieldEnd() + if self.vrail14 is not None: + oprot.writeFieldBegin('vrail14', TType.I32, 14) + oprot.writeI32(self.vrail14) + oprot.writeFieldEnd() + if self.vrail15 is not None: + oprot.writeFieldBegin('vrail15', TType.I32, 15) + oprot.writeI32(self.vrail15) + oprot.writeFieldEnd() + if self.vrail16 is not None: + oprot.writeFieldBegin('vrail16', TType.I32, 16) + oprot.writeI32(self.vrail16) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class pltfm_mgr_fan_info_t(object): + """ + Attributes: + - fan_num + - front_rpm + - rear_rpm + - percent + """ + + thrift_spec = ( + None, # 0 + (1, TType.I32, 'fan_num', None, None, ), # 1 + (2, TType.I32, 'front_rpm', None, None, ), # 2 + (3, TType.I32, 'rear_rpm', None, None, ), # 3 + (4, TType.I32, 'percent', None, None, ), # 4 + ) + + def __init__(self, fan_num=None, front_rpm=None, rear_rpm=None, percent=None,): + self.fan_num = fan_num + self.front_rpm = front_rpm + self.rear_rpm = rear_rpm + self.percent = percent + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I32: + self.fan_num = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 2: + if ftype == TType.I32: + self.front_rpm = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 3: + if ftype == TType.I32: + self.rear_rpm = iprot.readI32() + else: + iprot.skip(ftype) + elif fid == 4: + if ftype == TType.I32: + self.percent = iprot.readI32() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('pltfm_mgr_fan_info_t') + if self.fan_num is not None: + oprot.writeFieldBegin('fan_num', TType.I32, 1) + oprot.writeI32(self.fan_num) + oprot.writeFieldEnd() + if self.front_rpm is not None: + oprot.writeFieldBegin('front_rpm', TType.I32, 2) + oprot.writeI32(self.front_rpm) + oprot.writeFieldEnd() + if self.rear_rpm is not None: + oprot.writeFieldBegin('rear_rpm', TType.I32, 3) + oprot.writeI32(self.rear_rpm) + oprot.writeFieldEnd() + if self.percent is not None: + oprot.writeFieldBegin('percent', TType.I32, 4) + oprot.writeI32(self.percent) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) + + +class InvalidPltfmMgrOperation(TException): + """ + Attributes: + - code + """ + + thrift_spec = ( + None, # 0 + (1, TType.I32, 'code', None, None, ), # 1 + ) + + def __init__(self, code=None,): + self.code = code + + def read(self, iprot): + if iprot._fast_decode is not None and isinstance(iprot.trans, TTransport.CReadableTransport) and self.thrift_spec is not None: + iprot._fast_decode(self, iprot, (self.__class__, self.thrift_spec)) + return + iprot.readStructBegin() + while True: + (fname, ftype, fid) = iprot.readFieldBegin() + if ftype == TType.STOP: + break + if fid == 1: + if ftype == TType.I32: + self.code = iprot.readI32() + else: + iprot.skip(ftype) + else: + iprot.skip(ftype) + iprot.readFieldEnd() + iprot.readStructEnd() + + def write(self, oprot): + if oprot._fast_encode is not None and self.thrift_spec is not None: + oprot.trans.write(oprot._fast_encode(self, (self.__class__, self.thrift_spec))) + return + oprot.writeStructBegin('InvalidPltfmMgrOperation') + if self.code is not None: + oprot.writeFieldBegin('code', TType.I32, 1) + oprot.writeI32(self.code) + oprot.writeFieldEnd() + oprot.writeFieldStop() + oprot.writeStructEnd() + + def validate(self): + return + + def __str__(self): + return repr(self) + + def __repr__(self): + L = ['%s=%r' % (key, value) + for key, value in self.__dict__.items()] + return '%s(%s)' % (self.__class__.__name__, ', '.join(L)) + + def __eq__(self, other): + return isinstance(other, self.__class__) and self.__dict__ == other.__dict__ + + def __ne__(self, other): + return not (self == other) diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/psuutil.py b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/psuutil.py new file mode 100644 index 00000000000..2c0e2fdb224 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/psuutil.py @@ -0,0 +1,96 @@ +#!/usr/bin/env python + +try: + import os + import sys + import importlib + + sys.path.append(os.path.dirname(__file__)) + import pltfm_mgr_rpc + from pltfm_mgr_rpc.ttypes import * + + from thrift.transport import TSocket + from thrift.transport import TTransport + from thrift.protocol import TBinaryProtocol + from thrift.protocol import TMultiplexedProtocol + + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +thrift_server = 'localhost' +transport = None +pltfm_mgr = None + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def thrift_setup(self): + global thrift_server, transport, pltfm_mgr + transport = TSocket.TSocket(thrift_server, 9090) + + transport = TTransport.TBufferedTransport(transport) + bprotocol = TBinaryProtocol.TBinaryProtocol(transport) + + pltfm_mgr_client_module = importlib.import_module(".".join(["pltfm_mgr_rpc", "pltfm_mgr_rpc"])) + pltfm_mgr_protocol = TMultiplexedProtocol.TMultiplexedProtocol(bprotocol, "pltfm_mgr_rpc") + pltfm_mgr = pltfm_mgr_client_module.Client(pltfm_mgr_protocol) + + transport.open() + + def thrift_teardown(self): + global transport + transport.close() + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + global pltfm_mgr + + try: + self.thrift_setup() + psu_info = pltfm_mgr.pltfm_mgr_pwr_supply_info_get(index) + self.thrift_teardown() + except: + return False + + return (psu_info.ffault == False) + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + global pltfm_mgr + + try: + self.thrift_setup() + status = pltfm_mgr.pltfm_mgr_pwr_supply_present_get(index) + self.thrift_teardown() + except: + return False + + return status + diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/sfputil.py b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..1daee453573 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/plugins/sfputil.py @@ -0,0 +1,237 @@ +#!/usr/bin/env python + +try: + import os + import sys + import importlib + import time + + sys.path.append(os.path.dirname(__file__)) + import pltfm_mgr_rpc + from pltfm_mgr_rpc.ttypes import * + + from thrift.transport import TSocket + from thrift.transport import TTransport + from thrift.protocol import TBinaryProtocol + from thrift.protocol import TMultiplexedProtocol + + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +thrift_server = 'localhost' +transport = None +pltfm_mgr = None + +SFP_EEPROM_CACHE = "/var/run/platform/sfp/cache" + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 0 + PORTS_IN_BLOCK = 0 + QSFP_PORT_START = 1 + QSFP_PORT_END = 0 + EEPROM_OFFSET = 0 + QSFP_CHECK_INTERVAL = 4 + + @property + def port_start(self): + self.update_port_info() + return self.PORT_START + + @property + def port_end(self): + self.update_port_info() + return self.PORT_END + + @property + def qsfp_ports(self): + self.update_port_info() + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + print "dependency on sysfs has been removed" + raise Exception() + + def __init__(self): + self.ready = False + self.phy_port_dict = {'-1': 'system_not_ready'} + self.phy_port_cur_state = {} + self.qsfp_interval = self.QSFP_CHECK_INTERVAL + + if not os.path.exists(os.path.dirname(SFP_EEPROM_CACHE)): + try: + os.makedirs(os.path.dirname(SFP_EEPROM_CACHE)) + except OSError as e: + if e.errno != errno.EEXIST: + raise + + open(SFP_EEPROM_CACHE, 'ab').close() + + SfpUtilBase.__init__(self) + + def update_port_info(self): + global pltfm_mgr + + if self.QSFP_PORT_END == 0: + self.thrift_setup() + self.QSFP_PORT_END = pltfm_mgr.pltfm_mgr_qsfp_get_max_port(); + self.PORT_END = self.QSFP_PORT_END + self.PORTS_IN_BLOCK = self.QSFP_PORT_END + self.thrift_teardown() + + def thrift_setup(self): + global thrift_server, transport, pltfm_mgr + transport = TSocket.TSocket(thrift_server, 9090) + + transport = TTransport.TBufferedTransport(transport) + bprotocol = TBinaryProtocol.TBinaryProtocol(transport) + + pltfm_mgr_client_module = importlib.import_module(".".join(["pltfm_mgr_rpc", "pltfm_mgr_rpc"])) + pltfm_mgr_protocol = TMultiplexedProtocol.TMultiplexedProtocol(bprotocol, "pltfm_mgr_rpc") + pltfm_mgr = pltfm_mgr_client_module.Client(pltfm_mgr_protocol) + + transport.open() + + def thrift_teardown(self): + global transport + transport.close() + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + presence = False + + try: + self.thrift_setup() + presence = pltfm_mgr.pltfm_mgr_qsfp_presence_get(port_num) + self.thrift_teardown() + except Exception as e: + print e.__doc__ + print e.message + + return presence + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + self.thrift_setup() + lpmode = pltfm_mgr.pltfm_mgr_qsfp_lpmode_get(port_num) + self.thrift_teardown() + return lpmode + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + self.thrift_setup() + status = pltfm_mgr.pltfm_mgr_qsfp_lpmode_set(port_num, lpmode) + self.thrift_teardown() + return (status == 0) + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + self.thrift_setup() + status = pltfm_mgr.pltfm_mgr_qsfp_reset(port_num, True) + status = pltfm_mgr.pltfm_mgr_qsfp_reset(port_num, False) + self.thrift_teardown() + return status + + def check_transceiver_change(self): + if not self.ready: + return + + self.phy_port_dict = {} + + try: + self.thrift_setup() + except: + return + + # Get presence of each SFP + for port in range(self.port_start, self.port_end + 1): + try: + sfp_resent = pltfm_mgr.pltfm_mgr_qsfp_presence_get(port) + except: + sfp_resent = False + sfp_state = '1' if sfp_resent else '0' + + if port in self.phy_port_cur_state: + if self.phy_port_cur_state[port] != sfp_state: + self.phy_port_dict[port] = sfp_state + else: + self.phy_port_dict[port] = sfp_state + + # Update port current state + self.phy_port_cur_state[port] = sfp_state + + self.thrift_teardown() + + def get_transceiver_change_event(self, timeout=0): + forever = False + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print "get_transceiver_change_event:Invalid timeout value", timeout + return False, {} + + while forever or timeout > 0: + if not self.ready: + try: + self.thrift_setup() + self.thrift_teardown() + except: + pass + else: + self.ready = True + self.phy_port_dict = {} + break + elif self.qsfp_interval == 0: + self.qsfp_interval = self.QSFP_CHECK_INTERVAL + + # Process transceiver plug-in/out event + self.check_transceiver_change() + + # Break if tranceiver state has changed + if bool(self.phy_port_dict): + break + + if timeout: + timeout -= 1 + + if self.qsfp_interval: + self.qsfp_interval -= 1 + + time.sleep(1) + + return self.ready, self.phy_port_dict + + def _get_port_eeprom_path(self, port_num, devid): + eeprom_path = None + + self.thrift_setup() + presence = pltfm_mgr.pltfm_mgr_qsfp_presence_get(port_num) + if presence == True: + eeprom_cache = open(SFP_EEPROM_CACHE, 'wb') + eeprom_hex = pltfm_mgr.pltfm_mgr_qsfp_info_get(port_num) + eeprom_raw = bytearray.fromhex(eeprom_hex) + eeprom_cache.write(eeprom_raw) + eeprom_cache.close() + eeprom_path = SFP_EEPROM_CACHE + self.thrift_teardown() + + return eeprom_path + diff --git a/device/barefoot/x86_64-accton_wedge100bf_32x-r0/pmon_daemon_control.json b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..3a76f2fdd0e --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_32x-r0/pmon_daemon_control.json @@ -0,0 +1,6 @@ +{ + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/default_sku b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/default_sku new file mode 100644 index 00000000000..ba06df1e2a5 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/default_sku @@ -0,0 +1 @@ +mavericks t1 diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/installer.conf b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/installer.conf new file mode 100644 index 00000000000..3714ff053bb --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/installer.conf @@ -0,0 +1 @@ +CONSOLE_SPEED=57600 diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/buffers.json.j2 b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/buffers.json.j2 new file mode 100644 index 00000000000..1083a6210fc --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/buffers_defaults_t0.j2 b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..e5b949faed0 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/buffers_defaults_t0.j2 @@ -0,0 +1,83 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '4194304' %} +{% set ingress_lossy_pool_size = '7340032' %} +{% set egress_lossless_pool_size = '16777152' %} +{% set egress_lossy_pool_size = '7340032' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"4096", + "dynamic_th":"0" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"4096", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + } + }, +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + } + } +{%- endmacro %} diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/buffers_defaults_t1.j2 b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..1d8096c0d6c --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/buffers_defaults_t1.j2 @@ -0,0 +1,83 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '2097152' %} +{% set ingress_lossy_pool_size = '5242880' %} +{% set egress_lossless_pool_size = '16777152' %} +{% set egress_lossy_pool_size = '5242880' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"4096", + "dynamic_th":"0" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"4096", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + } + }, +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + } + } +{%- endmacro %} diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/pg_profile_lookup.ini b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/pg_profile_lookup.ini new file mode 100644 index 00000000000..b66b129fe43 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 34816 18432 16384 0 + 25000 5m 34816 18432 16384 0 + 40000 5m 34816 18432 16384 0 + 50000 5m 34816 18432 16384 0 + 100000 5m 36864 18432 18432 0 + 10000 40m 36864 18432 18432 0 + 25000 40m 39936 18432 21504 0 + 40000 40m 41984 18432 23552 0 + 50000 40m 41984 18432 23552 0 + 100000 40m 54272 18432 35840 0 + 10000 300m 49152 18432 30720 0 + 25000 300m 71680 18432 53248 0 + 40000 300m 94208 18432 75776 0 + 50000 300m 94208 18432 75776 0 + 100000 300m 184320 18432 165888 0 diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/port_config.ini b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/port_config.ini new file mode 100644 index 00000000000..def494da008 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/port_config.ini @@ -0,0 +1,66 @@ +# name lanes alias index speed autoneg fec +Ethernet0 0,1,2,3 Ethernet0 1 100000 0 rs +Ethernet4 4,5,6,7 Ethernet4 2 100000 0 rs +Ethernet8 8,9,10,11 Ethernet8 3 100000 0 rs +Ethernet12 12,13,14,15 Ethernet12 4 100000 0 rs +Ethernet16 16,17,18,19 Ethernet16 5 100000 0 rs +Ethernet20 20,21,22,23 Ethernet20 6 100000 0 rs +Ethernet24 24,25,26,27 Ethernet24 7 100000 0 rs +Ethernet28 28,29,30,31 Ethernet28 8 100000 0 rs +Ethernet32 32,33,34,35 Ethernet32 9 100000 0 rs +Ethernet36 36,37,38,39 Ethernet36 10 100000 0 rs +Ethernet40 40,41,42,43 Ethernet40 11 100000 0 rs +Ethernet44 44,45,46,47 Ethernet44 12 100000 0 rs +Ethernet48 48,49,50,51 Ethernet48 13 100000 0 rs +Ethernet52 52,53,54,55 Ethernet52 14 100000 0 rs +Ethernet56 56,57,58,59 Ethernet56 15 100000 0 rs +Ethernet60 60,61,62,63 Ethernet60 16 100000 0 rs +Ethernet64 64,65,66,67 Ethernet64 17 100000 0 rs +Ethernet68 68,69,70,71 Ethernet68 18 100000 0 rs +Ethernet72 72,73,74,75 Ethernet72 19 100000 0 rs +Ethernet76 76,77,78,79 Ethernet76 20 100000 0 rs +Ethernet80 80,81,82,83 Ethernet80 21 100000 0 rs +Ethernet84 84,85,86,87 Ethernet84 22 100000 0 rs +Ethernet88 88,89,90,91 Ethernet88 23 100000 0 rs +Ethernet92 92,93,94,95 Ethernet92 24 100000 0 rs +Ethernet96 96,97,98,99 Ethernet96 25 100000 0 rs +Ethernet100 100,101,102,103 Ethernet100 26 100000 0 rs +Ethernet104 104,105,106,107 Ethernet104 27 100000 0 rs +Ethernet108 108,109,110,111 Ethernet108 28 100000 0 rs +Ethernet112 112,113,114,115 Ethernet112 29 100000 0 rs +Ethernet116 116,117,118,119 Ethernet116 30 100000 0 rs +Ethernet120 120,121,122,123 Ethernet120 31 100000 0 rs +Ethernet124 124,125,126,127 Ethernet124 32 100000 0 rs +Ethernet128 128,129,130,131 Ethernet128 33 100000 0 rs +Ethernet132 132,133,134,135 Ethernet132 34 100000 0 rs +Ethernet136 136,137,138,139 Ethernet136 35 100000 0 rs +Ethernet140 140,141,142,143 Ethernet140 36 100000 0 rs +Ethernet144 144,145,146,147 Ethernet144 37 100000 0 rs +Ethernet148 148,149,150,151 Ethernet148 38 100000 0 rs +Ethernet152 152,153,154,155 Ethernet152 39 100000 0 rs +Ethernet156 156,157,158,159 Ethernet156 40 100000 0 rs +Ethernet160 160,161,162,163 Ethernet169 41 100000 0 rs +Ethernet164 164,165,166,167 Ethernet164 42 100000 0 rs +Ethernet168 168,169,170,171 Ethernet168 43 100000 0 rs +Ethernet172 172,173,174,175 Ethernet172 44 100000 0 rs +Ethernet176 176,177,178,179 Ethernet176 45 100000 0 rs +Ethernet180 180,181,182,183 Ethernet180 46 100000 0 rs +Ethernet184 184,185,186,187 Ethernet184 47 100000 0 rs +Ethernet188 188,189,190,191 Ethernet188 48 100000 0 rs +Ethernet192 192,193,194,195 Ethernet192 49 100000 0 rs +Ethernet196 196,197,198,199 Ethernet196 50 100000 0 rs +Ethernet200 200,201,202,203 Ethernet200 51 100000 0 rs +Ethernet204 204,205,206,207 Ethernet204 52 100000 0 rs +Ethernet208 208,209,210,211 Ethernet208 53 100000 0 rs +Ethernet212 212,213,214,215 Ethernet212 54 100000 0 rs +Ethernet216 216,217,218,219 Ethernet216 55 100000 0 rs +Ethernet220 220,221,222,223 Ethernet220 56 100000 0 rs +Ethernet224 224,225,226,227 Ethernet224 57 100000 0 rs +Ethernet228 228,229,230,231 Ethernet228 58 100000 0 rs +Ethernet232 232,233,234,235 Ethernet232 59 100000 0 rs +Ethernet236 236,237,238,239 Ethernet236 60 100000 0 rs +Ethernet240 240,241,242,243 Ethernet240 61 100000 0 rs +Ethernet244 244,245,246,247 Ethernet244 62 100000 0 rs +Ethernet248 248,249,250,251 Ethernet248 63 100000 0 rs +Ethernet252 252,253,254,255 Ethernet252 64 100000 0 rs +Ethernet256 256,257,258,259 Ethernet256 65 100000 0 none diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/qos.json.j2 b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/qos.json.j2 new file mode 100644 index 00000000000..a685277448f --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/qos.json.j2 @@ -0,0 +1,10 @@ +{%- macro generate_tc_to_pg_map() %} + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "3": "3", + "4": "4" + } + }, +{%- endmacro %} + +{%- include 'qos_config.j2' %} diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/sai.profile b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/sai.profile new file mode 100644 index 00000000000..037b5c13537 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/sai.profile @@ -0,0 +1,3 @@ +SAI_KEY_WARM_BOOT_WRITE_FILE=/var/warmboot/sai-warmboot.bin +SAI_KEY_WARM_BOOT_READ_FILE=/var/warmboot/sai-warmboot.bin + diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/switch-sai.conf b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/switch-sai.conf new file mode 100644 index 00000000000..81a7d7bc28c --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/switch-sai.conf @@ -0,0 +1,34 @@ +{ + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0", + "pcie_domain": 0, + "pcie_bus": 5, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "instance": 0, + "p4_program_list": [ + { + "id": "pgm-0", + "instance": 0, + "path": "switch", + "program-name": "switch", + "pd": "lib/tofinopd/switch/libpd.so", + "pd-thrift": "lib/tofinopd/switch/libpdthrift.so", + "table-config": "share/tofinopd/switch/context.json", + "tofino-bin": "share/tofinopd/switch/tofino.bin", + "switchapi": "lib/libswitchapi.so", + "sai": "lib/libsai.so", + "agent0": "lib/platform/x86_64-accton_wedge100bf_65x-r0/libpltfm_mgr.so", + "switchapi_port_add": false, + "non_default_port_ppgs": 5 + } + ] +} diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/switch-tna-sai.conf b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/switch-tna-sai.conf new file mode 100644 index 00000000000..ddcb9d4ba28 --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/switch-tna-sai.conf @@ -0,0 +1,40 @@ +{ + "instance": 0, + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0", + "pcie_domain": 0, + "pcie_bus": 5, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "p4_devices": [ + { + "device-id": 0, + "agent0": "lib/platform/x86_64-accton_wedge100bf_65x-r0/libpltfm_mgr.so", + "p4_programs": [ + { + "p4_pipelines": [ + { + "p4_pipeline_name": "pipe", + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" + } + ], + "program-name": "switch", + "sai": "lib/libsai.so", + "bfrt-config": "share/switch/bf-rt.json", + "model_json_path" : "share/switch/aug_model.json", + "switchapi_port_add": false, + "non_default_port_ppgs": 5 + } + ] + } + ] +} diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/plugins b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/plugins new file mode 120000 index 00000000000..a8464d1ec2b --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/plugins @@ -0,0 +1 @@ +../x86_64-accton_wedge100bf_32x-r0/plugins/ \ No newline at end of file diff --git a/device/barefoot/x86_64-accton_wedge100bf_65x-r0/pmon_daemon_control.json b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..3a76f2fdd0e --- /dev/null +++ b/device/barefoot/x86_64-accton_wedge100bf_65x-r0/pmon_daemon_control.json @@ -0,0 +1,6 @@ +{ + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/broadcom/x86_64-bcm_xlr-r0/BCM956960K/config_th_32x100.bcm b/device/broadcom/x86_64-bcm_xlr-r0/BCM956960K/config_th_32x100.bcm new file mode 100644 index 00000000000..16f18dcd2fd --- /dev/null +++ b/device/broadcom/x86_64-bcm_xlr-r0/BCM956960K/config_th_32x100.bcm @@ -0,0 +1,77 @@ +portmap_1=1:100 +portmap_2=5:100 +portmap_3=9:100 +portmap_4=13:100 +portmap_5=17:100 +portmap_6=21:100 +portmap_7=25:100 +portmap_8=29:100 +portmap_34=33:100 +portmap_35=37:100 +portmap_36=41:100 +portmap_37=45:100 +portmap_38=49:100 +portmap_39=53:100 +portmap_40=57:100 +portmap_41=61:100 +portmap_68=65:100 +portmap_69=69:100 +portmap_70=73:100 +portmap_71=77:100 +portmap_72=81:100 +portmap_73=85:100 +portmap_74=89:100 +portmap_75=93:100 +portmap_102=97:100 +portmap_103=101:100 +portmap_104=105:100 +portmap_105=109:100 +portmap_106=113:100 +portmap_107=117:100 +portmap_108=121:100 +portmap_109=125:100 +oversubscribe_mode=1 +portmap_66=129:10 +portmap_100=131:10 +pbmp_xport_xe=0x3fd000000ff4000003fc000001fe +portmap_33=132:10 +portmap_67=133:10 +portmap_101=134:10 +portmap_135=135:10 +xgxs_tx_lane_map_ce18=0x1032 +xgxs_rx_lane_map_ce18=0x1032 +xgxs_rx_lane_map_ce19=0x2301 +xgxs_rx_lane_map_ce20=0x2301 +xgxs_rx_lane_map_ce21=0x2301 +xgxs_rx_lane_map_ce22=0x2301 +xgxs_rx_lane_map_ce23=0x2301 +xgxs_rx_lane_map_ce24=0x2301 +xgxs_rx_lane_map_ce25=0x2301 +xgxs_rx_lane_map_ce26=0x2301 +xgxs_rx_lane_map_ce27=0x2301 +xgxs_rx_lane_map_ce28=0x2301 +phy_xaui_rx_polarity_flip_ce4=0x2 +phy_xaui_tx_polarity_flip_ce5=0x8 +phy_xaui_rx_polarity_flip_ce5=0x5 +phy_xaui_rx_polarity_flip_ce6=0x2 +phy_xaui_tx_polarity_flip_ce7=0x8 +phy_xaui_tx_polarity_flip_ce8=0x8 +phy_xaui_rx_polarity_flip_ce8=0x8 +phy_xaui_tx_polarity_flip_ce10=0x8 +phy_xaui_rx_polarity_flip_ce10=0x1 +phy_xaui_rx_polarity_flip_ce11=0x2 +phy_xaui_tx_polarity_flip_ce19=0x2 +phy_xaui_rx_polarity_flip_ce19=0x3 +phy_xaui_tx_polarity_flip_ce20=0x8 +phy_xaui_rx_polarity_flip_ce21=0x4 +phy_xaui_tx_polarity_flip_ce22=0x8 +phy_xaui_rx_polarity_flip_ce22=0x8 +phy_xaui_rx_polarity_flip_ce23=0x4 +phy_xaui_rx_polarity_flip_ce24=0x4 +phy_xaui_tx_polarity_flip_ce25=0x8 +phy_xaui_rx_polarity_flip_ce25=0x8 +phy_xaui_rx_polarity_flip_ce26=0x4 +phy_xaui_tx_polarity_flip_ce27=0x8 +phy_xaui_rx_polarity_flip_ce27=0x8 +l2xmsg_mode=1 +fpem_mem_entries=32768 diff --git a/device/broadcom/x86_64-bcm_xlr-r0/BCM956960K/port_config.ini b/device/broadcom/x86_64-bcm_xlr-r0/BCM956960K/port_config.ini new file mode 100644 index 00000000000..21c7013090b --- /dev/null +++ b/device/broadcom/x86_64-bcm_xlr-r0/BCM956960K/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 1,2,3,4 Ethernet1/0/1 0 100000 +Ethernet4 5,6,7,8 Ethernet1/0/5 1 100000 +Ethernet8 9,10,11,12 Ethernet1/0/9 2 100000 +Ethernet12 13,14,15,16 Ethernet1/0/13 3 100000 +Ethernet16 17,18,19,20 Ethernet1/0/17 4 100000 +Ethernet20 21,22,23,24 Ethernet1/0/21 5 100000 +Ethernet24 25,26,27,28 Ethernet1/0/25 6 100000 +Ethernet28 29,30,31,32 Ethernet1/0/29 7 100000 +Ethernet32 33,34,35,36 Ethernet1/0/33 8 100000 +Ethernet36 37,38,39,40 Ethernet1/0/37 9 100000 +Ethernet40 41,42,43,44 Ethernet1/0/41 10 100000 +Ethernet44 45,46,47,48 Ethernet1/0/45 11 100000 +Ethernet48 49,50,51,52 Ethernet1/0/49 12 100000 +Ethernet52 53,54,55,56 Ethernet1/0/53 13 100000 +Ethernet56 57,58,59,60 Ethernet1/0/57 14 100000 +Ethernet60 61,62,63,64 Ethernet1/0/61 15 100000 +Ethernet64 65,66,67,68 Ethernet1/0/65 16 100000 +Ethernet68 69,70,71,72 Ethernet1/0/69 17 100000 +Ethernet72 73,74,75,76 Ethernet1/0/73 18 100000 +Ethernet76 77,78,79,80 Ethernet1/0/77 19 100000 +Ethernet80 81,82,83,84 Ethernet1/0/81 20 100000 +Ethernet84 85,86,87,88 Ethernet1/0/85 21 100000 +Ethernet88 89,90,91,92 Ethernet1/0/89 22 100000 +Ethernet92 93,94,95,96 Ethernet1/0/93 23 100000 +Ethernet96 97,98,99,100 Ethernet1/0/97 24 100000 +Ethernet100 101,102,103,104 Ethernet1/0/101 25 100000 +Ethernet104 105,106,107,108 Ethernet1/0/105 26 100000 +Ethernet108 109,110,111,112 Ethernet1/0/109 27 100000 +Ethernet112 113,114,115,116 Ethernet1/0/113 28 100000 +Ethernet116 117,118,119,120 Ethernet1/0/117 29 100000 +Ethernet120 121,122,123,124 Ethernet1/0/121 30 100000 +Ethernet124 125,126,127,128 Ethernet1/0/125 31 100000 diff --git a/device/broadcom/x86_64-bcm_xlr-r0/BCM956960K/sai.profile b/device/broadcom/x86_64-bcm_xlr-r0/BCM956960K/sai.profile new file mode 100644 index 00000000000..80aa570ddfb --- /dev/null +++ b/device/broadcom/x86_64-bcm_xlr-r0/BCM956960K/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/config_th_32x100.bcm diff --git a/device/broadcom/x86_64-bcm_xlr-r0/default_sku b/device/broadcom/x86_64-bcm_xlr-r0/default_sku new file mode 100644 index 00000000000..0f9dd1d379c --- /dev/null +++ b/device/broadcom/x86_64-bcm_xlr-r0/default_sku @@ -0,0 +1 @@ +bcm_xlr t1 diff --git a/device/broadcom/x86_64-bcm_xlr-r0/installer.conf b/device/broadcom/x86_64-bcm_xlr-r0/installer.conf new file mode 100644 index 00000000000..32c7bd1c172 --- /dev/null +++ b/device/broadcom/x86_64-bcm_xlr-r0/installer.conf @@ -0,0 +1,9 @@ +if [ -d /sys/devices/pci0000:00/0000:00:13.0 ]; then + CONSOLE_PORT=0x3e8 + CONSOLE_DEV=2 +else + CONSOLE_PORT=0x3f8 + CONSOLE_DEV=0 +fi +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.dma=0 libata.noacpi=1" +CONSOLE_SPEED=115200 diff --git a/device/broadcom/x86_64-bcm_xlr-r0/plugins/eeprom.py b/device/broadcom/x86_64-bcm_xlr-r0/plugins/eeprom.py new file mode 100644 index 00000000000..ce122d6ffac --- /dev/null +++ b/device/broadcom/x86_64-bcm_xlr-r0/plugins/eeprom.py @@ -0,0 +1,29 @@ +#!/usr/bin/env python + +############################################################################# +# Broadcom XLR/GTS 'eeprom' support +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +# +# Note: the file /etc/sys_eeprom.bin is generated by the script +# brcm-xlr-gts-create-eeprom-file.py +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/etc/sys_eeprom.bin" + super(board, self).__init__(self.eeprom_path, 0, '', False, True) + + def serial_number_str(self, e): + """Return service tag instead of serial number""" + return "No service tag" diff --git a/device/broadcom/x86_64-bcm_xlr-r0/plugins/psuutil.py b/device/broadcom/x86_64-bcm_xlr-r0/plugins/psuutil.py new file mode 100644 index 00000000000..5cfdda1578b --- /dev/null +++ b/device/broadcom/x86_64-bcm_xlr-r0/plugins/psuutil.py @@ -0,0 +1,41 @@ +#!/usr/bin/env python + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 0 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + return False + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + return False diff --git a/device/broadcom/x86_64-bcm_xlr-r0/plugins/sfputil.py b/device/broadcom/x86_64-bcm_xlr-r0/plugins/sfputil.py new file mode 100644 index 00000000000..3dc25793ba4 --- /dev/null +++ b/device/broadcom/x86_64-bcm_xlr-r0/plugins/sfputil.py @@ -0,0 +1,50 @@ +#!/usr/bin/env python + +try: + import time + import os + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 52 + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return [] + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + return False + + def get_low_power_mode(self, port_num): + raise NotImplementedError + + def set_low_power_mode(self, port_num, lpmode): + raise NotImplementedError + + def reset(self, port_num): + raise NotImplementedError + + def get_transceiver_change_event(self, timeout=0): + raise NotImplementedError diff --git a/device/celestica/x86_64-cel_e1031-r0/Celestica-E1031-T48S4/helix4-e1031-48x1G+4x10G.config.bcm b/device/celestica/x86_64-cel_e1031-r0/Celestica-E1031-T48S4/helix4-e1031-48x1G+4x10G.config.bcm new file mode 100644 index 00000000000..c7942d6fc0b --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/Celestica-E1031-T48S4/helix4-e1031-48x1G+4x10G.config.bcm @@ -0,0 +1,64 @@ +bcm56340_4x10=1 +bcm56340_config=1 +dport_map_direct=0 +ext_sram_freq=0 +ext_tcam_freq=0 +phy_null_ge48=1 +phy_port_primary_and_offset_ge0=0x0000 +phy_port_primary_and_offset_ge1=0x0001 +phy_port_primary_and_offset_ge2=0x0002 +phy_port_primary_and_offset_ge3=0x0003 +phy_port_primary_and_offset_ge4=0x0004 +phy_port_primary_and_offset_ge5=0x0005 +phy_port_primary_and_offset_ge6=0x0006 +phy_port_primary_and_offset_ge7=0x0007 +phy_port_primary_and_offset_ge8=0x0800 +phy_port_primary_and_offset_ge9=0x0801 +phy_port_primary_and_offset_ge10=0x0802 +phy_port_primary_and_offset_ge11=0x0803 +phy_port_primary_and_offset_ge12=0x0804 +phy_port_primary_and_offset_ge13=0x0805 +phy_port_primary_and_offset_ge14=0x0806 +phy_port_primary_and_offset_ge15=0x0807 +phy_port_primary_and_offset_ge16=0x1000 +phy_port_primary_and_offset_ge17=0x1001 +phy_port_primary_and_offset_ge18=0x1002 +phy_port_primary_and_offset_ge19=0x1003 +phy_port_primary_and_offset_ge20=0x1004 +phy_port_primary_and_offset_ge21=0x1005 +phy_port_primary_and_offset_ge22=0x1006 +phy_port_primary_and_offset_ge23=0x1007 +phy_port_primary_and_offset_ge24=0x1800 +phy_port_primary_and_offset_ge25=0x1801 +phy_port_primary_and_offset_ge26=0x1802 +phy_port_primary_and_offset_ge27=0x1803 +phy_port_primary_and_offset_ge28=0x1804 +phy_port_primary_and_offset_ge29=0x1805 +phy_port_primary_and_offset_ge30=0x1806 +phy_port_primary_and_offset_ge31=0x1807 +phy_port_primary_and_offset_ge32=0x2000 +phy_port_primary_and_offset_ge33=0x2001 +phy_port_primary_and_offset_ge34=0x2002 +phy_port_primary_and_offset_ge35=0x2003 +phy_port_primary_and_offset_ge36=0x2004 +phy_port_primary_and_offset_ge37=0x2005 +phy_port_primary_and_offset_ge38=0x2006 +phy_port_primary_and_offset_ge39=0x2007 +phy_port_primary_and_offset_ge40=0x2800 +phy_port_primary_and_offset_ge41=0x2801 +phy_port_primary_and_offset_ge42=0x2802 +phy_port_primary_and_offset_ge43=0x2803 +phy_port_primary_and_offset_ge44=0x2804 +phy_port_primary_and_offset_ge45=0x2805 +phy_port_primary_and_offset_ge46=0x2806 +phy_port_primary_and_offset_ge47=0x2807 +phy_xaui_rx_polarity_flip_xe0=1 +phy_xaui_rx_polarity_flip_xe1=0 +phy_xaui_rx_polarity_flip_xe2=1 +phy_xaui_rx_polarity_flip_xe3=0 +phy_xaui_tx_polarity_flip_xe0=1 +phy_xaui_tx_polarity_flip_xe1=0 +phy_xaui_tx_polarity_flip_xe2=1 +phy_xaui_tx_polarity_flip_xe3=0 +xgxs_rx_lane_map_xe0=0x1032 +xgxs_tx_lane_map_xe0=0x2301 diff --git a/device/celestica/x86_64-cel_e1031-r0/Celestica-E1031-T48S4/port_config.ini b/device/celestica/x86_64-cel_e1031-r0/Celestica-E1031-T48S4/port_config.ini new file mode 100644 index 00000000000..a2b64ea155d --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/Celestica-E1031-T48S4/port_config.ini @@ -0,0 +1,53 @@ +# name lanes index speed alias autoneg +Ethernet0 2 1 1000 etp1 1 +Ethernet1 1 2 1000 etp2 1 +Ethernet2 4 3 1000 etp3 1 +Ethernet3 3 4 1000 etp4 1 +Ethernet4 6 5 1000 etp5 1 +Ethernet5 5 6 1000 etp6 1 +Ethernet6 8 7 1000 etp7 1 +Ethernet7 7 8 1000 etp8 1 +Ethernet8 10 9 1000 etp9 1 +Ethernet9 9 10 1000 etp10 1 +Ethernet10 12 11 1000 etp11 1 +Ethernet11 11 12 1000 etp12 1 +Ethernet12 14 13 1000 etp13 1 +Ethernet13 13 14 1000 etp14 1 +Ethernet14 16 15 1000 etp15 1 +Ethernet15 15 16 1000 etp16 1 +Ethernet16 18 17 1000 etp17 1 +Ethernet17 17 18 1000 etp18 1 +Ethernet18 20 19 1000 etp19 1 +Ethernet19 19 20 1000 etp20 1 +Ethernet20 22 21 1000 etp21 1 +Ethernet21 21 22 1000 etp22 1 +Ethernet22 24 23 1000 etp23 1 +Ethernet23 23 24 1000 etp24 1 +Ethernet24 26 25 1000 etp25 1 +Ethernet25 25 26 1000 etp26 1 +Ethernet26 28 27 1000 etp27 1 +Ethernet27 27 28 1000 etp28 1 +Ethernet28 30 29 1000 etp29 1 +Ethernet29 29 30 1000 etp30 1 +Ethernet30 32 31 1000 etp31 1 +Ethernet31 31 32 1000 etp32 1 +Ethernet32 34 33 1000 etp33 1 +Ethernet33 33 34 1000 etp34 1 +Ethernet34 36 35 1000 etp35 1 +Ethernet35 35 36 1000 etp36 1 +Ethernet36 38 37 1000 etp37 1 +Ethernet37 37 38 1000 etp38 1 +Ethernet38 40 39 1000 etp39 1 +Ethernet39 39 40 1000 etp40 1 +Ethernet40 42 41 1000 etp41 1 +Ethernet41 41 42 1000 etp42 1 +Ethernet42 44 43 1000 etp43 1 +Ethernet43 43 44 1000 etp44 1 +Ethernet44 46 45 1000 etp45 1 +Ethernet45 45 46 1000 etp46 1 +Ethernet46 48 47 1000 etp47 1 +Ethernet47 47 48 1000 etp48 1 +Ethernet48 54 49 10000 etp49 0 +Ethernet49 53 50 10000 etp50 0 +Ethernet50 56 51 10000 etp51 0 +Ethernet51 55 52 10000 etp52 0 diff --git a/device/celestica/x86_64-cel_e1031-r0/Celestica-E1031-T48S4/sai.profile b/device/celestica/x86_64-cel_e1031-r0/Celestica-E1031-T48S4/sai.profile new file mode 100644 index 00000000000..f467f997fe6 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/Celestica-E1031-T48S4/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/helix4-e1031-48x1G+4x10G.config.bcm diff --git a/device/celestica/x86_64-cel_e1031-r0/default_sku b/device/celestica/x86_64-cel_e1031-r0/default_sku new file mode 100644 index 00000000000..89a0aac4181 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/default_sku @@ -0,0 +1 @@ +Celestica-E1031-T48S4 t1 diff --git a/device/celestica/x86_64-cel_e1031-r0/fancontrol-B2F b/device/celestica/x86_64-cel_e1031-r0/fancontrol-B2F new file mode 100644 index 00000000000..883f3c0c899 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/fancontrol-B2F @@ -0,0 +1,13 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=2 +DEVPATH=hwmon3=devices/pci0000:00/0000:00:13.0/i2c-0/i2c-8/i2c-23/23-004d hwmon2=devices/pci0000:00/0000:00:13.0/i2c-0/i2c-8/i2c-11/11-001a +DEVNAME=hwmon3=emc2305 hwmon2=max6699 +FCTEMPS=hwmon3/device/pwm1=hwmon2/temp1_input hwmon3/device/pwm2=hwmon2/temp1_input hwmon3/device/pwm4=hwmon2/temp1_input +FCFANS=hwmon3/device/pwm1=hwmon3/device/fan1_input hwmon3/device/pwm2=hwmon3/device/fan2_input hwmon3/device/pwm4=hwmon3/device/fan4_input +MINTEMP=hwmon3/device/pwm1=27 hwmon3/device/pwm2=27 hwmon3/device/pwm4=27 +MAXTEMP=hwmon3/device/pwm1=46 hwmon3/device/pwm2=46 hwmon3/device/pwm4=46 +MINSTART=hwmon3/device/pwm1=102 hwmon3/device/pwm2=102 hwmon3/device/pwm4=102 +MINSTOP=hwmon3/device/pwm1=102 hwmon3/device/pwm2=102 hwmon3/device/pwm4=102 +MINPWM=hwmon3/device/pwm1=102 hwmon3/device/pwm2=102 hwmon3/device/pwm4=102 +MAXPWM=hwmon3/device/pwm1=255 hwmon3/device/pwm2=255 hwmon3/device/pwm4=255 +THYST=hwmon3/device/pwm1=2 hwmon3/device/pwm2=2 hwmon3/device/pwm4=2 diff --git a/device/celestica/x86_64-cel_e1031-r0/fancontrol-F2B b/device/celestica/x86_64-cel_e1031-r0/fancontrol-F2B new file mode 100644 index 00000000000..3be1f7e339c --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/fancontrol-F2B @@ -0,0 +1,13 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=2 +DEVPATH=hwmon3=devices/pci0000:00/0000:00:13.0/i2c-0/i2c-8/i2c-23/23-004d hwmon2=devices/pci0000:00/0000:00:13.0/i2c-0/i2c-8/i2c-11/11-001a +DEVNAME=hwmon3=emc2305 hwmon2=max6697 +FCTEMPS=hwmon3/device/pwm1=hwmon2/temp3_input hwmon3/device/pwm2=hwmon2/temp3_input hwmon3/device/pwm4=hwmon2/temp3_input +FCFANS=hwmon3/device/pwm1=hwmon3/device/fan1_input hwmon3/device/pwm2=hwmon3/device/fan2_input hwmon3/device/pwm4=hwmon3/device/fan4_input +MINTEMP=hwmon3/device/pwm1=29 hwmon3/device/pwm2=29 hwmon3/device/pwm4=29 +MAXTEMP=hwmon3/device/pwm1=46 hwmon3/device/pwm2=46 hwmon3/device/pwm4=46 +MINSTART=hwmon3/device/pwm1=102 hwmon3/device/pwm2=102 hwmon3/device/pwm4=102 +MINSTOP=hwmon3/device/pwm1=102 hwmon3/device/pwm2=102 hwmon3/device/pwm4=102 +MINPWM=hwmon3/device/pwm1=102 hwmon3/device/pwm2=102 hwmon3/device/pwm4=102 +MAXPWM=hwmon3/device/pwm1=255 hwmon3/device/pwm2=255 hwmon3/device/pwm4=255 +THYST=hwmon3/device/pwm1=2 hwmon3/device/pwm2=2 hwmon3/device/pwm4=2 diff --git a/device/celestica/x86_64-cel_e1031-r0/installer.conf b/device/celestica/x86_64-cel_e1031-r0/installer.conf new file mode 100644 index 00000000000..b158400b229 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=9600 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich" diff --git a/device/celestica/x86_64-cel_e1031-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_e1031-r0/plugins/eeprom.py new file mode 100644 index 00000000000..6577631c890 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/plugins/eeprom.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica Haliburton +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0050/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) + diff --git a/device/celestica/x86_64-cel_e1031-r0/plugins/psuutil.py b/device/celestica/x86_64-cel_e1031-r0/plugins/psuutil.py new file mode 100644 index 00000000000..71b8d4ad3c5 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/devices/platform/e1031.smc/" + self.psu_presence = "psu{}_prs" + self.psu_oper_status = "psu{}_status" + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + psu_location = ["R", "L"] + status = 0 + try: + with open(self.psu_path + self.psu_oper_status.format(psu_location[index - 1]), 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + psu_location = ["R", "L"] + status = 0 + try: + with open(self.psu_path + self.psu_presence.format(psu_location[index - 1]), 'r') as psu_prs: + status = int(psu_prs.read()) + except IOError: + return False + + return status == 1 diff --git a/device/celestica/x86_64-cel_e1031-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_e1031-r0/plugins/sfputil.py new file mode 100644 index 00000000000..9cbec712726 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/plugins/sfputil.py @@ -0,0 +1,156 @@ +#!/usr/bin/env python + +try: + import time + import os + import select + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 52 + port_to_i2c_mapping = { + 1: None, + 2: None, + 3: None, + 4: None, + 5: None, + 6: None, + 7: None, + 8: None, + 9: None, + 10: None, + 11: None, + 12: None, + 13: None, + 14: None, + 15: None, + 16: None, + 17: None, + 18: None, + 19: None, + 20: None, + 21: None, + 22: None, + 23: None, + 24: None, + 25: None, + 26: None, + 27: None, + 28: None, + 29: None, + 30: None, + 31: None, + 32: None, + 33: None, + 34: None, + 35: None, + 36: None, + 37: None, + 38: None, + 39: None, + 40: None, + 41: None, + 42: None, + 43: None, + 44: None, + 45: None, + 46: None, + 47: None, + 48: None, + 49: 15, + 50: 14, + 51: 17, + 52: 16 + } + _port_to_eeprom_mapping = {} + _sfp_port = range(49, PORT_END + 1) + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return [] + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + for x in range(self.PORT_START, self.PORT_END + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + + def get_presence(self, port_num): + sfp_modabs_path = '/sys/devices/platform/e1031.smc/SFP/sfp_modabs' + + if port_num not in self._sfp_port: + return False + + status = 1 + try: + with open(sfp_modabs_path, 'r') as port_status: + status = int(port_status.read(), 16) + status = (status >> (port_num - 49)) & 1 + except IOError: + return False + + return status == 0 + + def get_low_power_mode(self, port_num): + raise NotImplementedError + + def set_low_power_mode(self, port_num, lpmode): + raise NotImplementedError + + def reset(self, port_num): + raise NotImplementedError + + def get_transceiver_change_event(self, timeout=0): + epoll = select.epoll() + port_dict = {} + timeout_sec = timeout/1000 + modabs_interrupt_path = '/sys/devices/platform/e1031.smc/SFP/modabs_int' + try: + # We get notified when there is an SCI interrupt from GPIO SUS7 + fd = open("/sys/devices/platform/hlx-ich.0/sci_int_gpio_sus7", "r") + fd.read() + + epoll.register(fd.fileno(), select.EPOLLIN & select.EPOLLET) + events = epoll.poll(timeout=timeout_sec if timeout != 0 else -1) + if events: + found_flag = 0 + # Read the QSFP ABS interrupt & status registers + with open(modabs_interrupt_path, 'r') as port_changes: + changes = int(port_changes.read(), 16) + for port_num in self._sfp_port: + change = (changes >> ( port_num - 49)) & 1 + if change == 1: + port_dict[str(port_num)] = str(int(self.get_presence(port_num))) + found_flag = 1 + + if not found_flag: + return False, {} + + return True, port_dict + + finally: + fd.close() + epoll.close() + + return False, {} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_e1031-r0/sensors.conf b/device/celestica/x86_64-cel_e1031-r0/sensors.conf new file mode 100644 index 00000000000..64d49af1cf8 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/sensors.conf @@ -0,0 +1,40 @@ +# libsensors configuration file for Celestica E1031. +# The i2c bus portion is omit because adapter name +# changes every time when system boot up. + +bus "i2c-3" "i2c-0-mux (chan_id 1)" +bus "i2c-11" "i2c-8-mux (chan_id 1)" + +chip "max6699-i2c-3-1a" + label temp2 "CPU board temperature sensor : 1" + label temp3 "CPU board temperature sensor : 2" + set temp2_max 90 + set temp3_max 90 + ignore temp1 + ignore temp4 + ignore temp5 + ignore temp6 + ignore temp7 + +chip "max6699-i2c-11-1a" + label temp1 "Rear panel-Inlet ambient sensor" + label temp2 "Rear panel-Helix shutdown sensor" + label temp3 "Front panel-Inlet ambient sensor (right)" + label temp4 "Front panel-Helix shutdown sensor" + label temp5 "Front panel-Inlet ambient sensor (left)" + set temp1_max 55 + set temp2_max 85 + set temp3_max 55 + set temp4_max 85 + set temp5_max 55 + ignore temp6 + ignore temp7 + + +chip "emc2305-i2c-*-4d" + ignore fan3 + ignore fan5 + label fan4 "Fan 1 :" + label fan2 "Fan 2 :" + label fan1 "Fan 3 :" + diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/__init__.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/__init__.py new file mode 100644 index 00000000000..d82f3749319 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import * diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/chassis.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/chassis.py new file mode 100644 index 00000000000..99eb49ce53e --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/chassis.py @@ -0,0 +1,136 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Chassis information which are available in the platform +# +############################################################################# + +import sys +import re +import os +import subprocess +import json + +try: + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.fan import Fan + from sonic_platform.psu import Psu + from sonic_platform.component import Component + from sonic_platform.watchdog import Watchdog + from sonic_platform.thermal import Thermal + from sonic_platform.sfp import Sfp + from sonic_platform.eeprom import Tlv +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_FAN_TRAY = 3 +NUM_FAN = 1 +NUM_PSU = 2 +NUM_THERMAL = 7 +NUM_SFP = 52 +NUM_COMPONENT = 3 +RESET_REGISTER = "0x112" +HOST_REBOOT_CAUSE_PATH = "/host/reboot-cause/previous-reboot-cause.txt" +PMON_REBOOT_CAUSE_PATH = "/usr/share/sonic/platform/api_files/reboot-cause/previous-reboot-cause.txt" +HOST_CHK_CMD = "docker > /dev/null 2>&1" + + +class Chassis(ChassisBase): + """Platform-specific Chassis class""" + + def __init__(self): + ChassisBase.__init__(self) + self.config_data = {} + for fant_index in range(0, NUM_FAN_TRAY): + for fan_index in range(0, NUM_FAN): + fan = Fan(fant_index, fan_index) + self._fan_list.append(fan) + for index in range(0, NUM_PSU): + psu = Psu(index) + self._psu_list.append(psu) + for index in range(0, NUM_THERMAL): + thermal = Thermal(index) + self._thermal_list.append(thermal) + for index in range(0, NUM_SFP): + sfp = Sfp(index) + self._sfp_list.append(sfp) + for index in range(0, NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + self._reboot_cause_path = HOST_REBOOT_CAUSE_PATH if self.__is_host( + ) else PMON_REBOOT_CAUSE_PATH + + self._watchdog = Watchdog() + self._eeprom = Tlv() + + def __is_host(self): + return os.system(HOST_CHK_CMD) == 0 + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.get_mac() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.get_serial() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.get_eeprom() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + description = 'None' + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + hw_reboot_cause = self._component_list[0].get_register_value(RESET_REGISTER) + sw_reboot_cause = self.__read_txt_file( + self._reboot_cause_path) or "Unknown" + + if hw_reboot_cause == "0x55": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = sw_reboot_cause + elif hw_reboot_cause == "0x11": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + elif hw_reboot_cause == "0x33": + reboot_cause = self.REBOOT_CAUSE_WATCHDOG + else: + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Unknown reason' + + return (reboot_cause, description) diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/component.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/component.py new file mode 100644 index 00000000000..ad6810b14c3 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/component.py @@ -0,0 +1,146 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +import json +import os.path +import shutil +import shlex +import subprocess + +try: + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +MMC_CPLD_ADDR = '0x100' +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +CONFIG_DB_PATH = "/etc/sonic/config_db.json" +SMC_CPLD_PATH = "/sys/devices/platform/e1031.smc/version" +GETREG_PATH = "/sys/devices/platform/e1031.smc/getreg" +COMPONENT_NAME_LIST = ["SMC_CPLD", "MMC_CPLD", "BIOS"] +COMPONENT_DES_LIST = ["System Management Controller", + "Module Management CPLD", "Basic Input/Output System"] + + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + ComponentBase.__init__(self) + self.index = component_index + self.name = self.get_name() + + def __run_command(self, command): + # Run bash command and print output to stdout + try: + process = subprocess.Popen( + shlex.split(command), stdout=subprocess.PIPE) + while True: + output = process.stdout.readline() + if output == '' and process.poll() is not None: + break + rc = process.poll() + if rc != 0: + return False + except: + return False + return True + + def __get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def get_register_value(self, register): + # Retrieves the cpld register value + cmd = "echo {1} > {0}; cat {0}".format(GETREG_PATH, register) + p = subprocess.Popen( + cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) + raw_data, err = p.communicate() + if err is not '': + return None + return raw_data.strip() + + def __get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + with open(SMC_CPLD_PATH, 'r') as fd: + smc_cpld_version = fd.read() + smc_cpld_version = 'None' if smc_cpld_version is 'None' else "{}.{}".format( + int(smc_cpld_version[2], 16), int(smc_cpld_version[3], 16)) + + mmc_cpld_version = self.get_register_value(MMC_CPLD_ADDR) + mmc_cpld_version = 'None' if mmc_cpld_version is 'None' else "{}.{}".format( + int(mmc_cpld_version[2], 16), int(mmc_cpld_version[3], 16)) + + cpld_version["SMC_CPLD"] = smc_cpld_version + cpld_version["MMC_CPLD"] = mmc_cpld_version + return cpld_version + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_NAME_LIST[self.index] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_DES_LIST[self.index] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self.__get_bios_version() + elif "CPLD" in self.name: + cpld_version = self.__get_cpld_version() + fw_version = cpld_version.get(self.name) + + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + if not os.path.isfile(image_path): + return False + + if "CPLD" in self.name: + img_name = os.path.basename(image_path) + root, ext = os.path.splitext(img_name) + ext = ".vme" if ext == "" else ext + new_image_path = os.path.join("/tmp", (root.lower() + ext)) + shutil.copy(image_path, new_image_path) + install_command = "ispvm %s" % new_image_path + elif self.name == "BIOS": + install_command = "afulnx_64 %s /p /b /n /x /r" % image_path + + return self.__run_command(install_command) diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/eeprom.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/eeprom.py new file mode 100644 index 00000000000..20f3db111f6 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/eeprom.py @@ -0,0 +1,112 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica Haliburton +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import glob + import os + import sys + import imp + import re + from array import array + from cStringIO import StringIO + from sonic_platform_base.sonic_eeprom import eeprom_dts + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError(str(e) + "- required module not found") + +CACHE_ROOT = '/var/cache/sonic/decode-syseeprom' +CACHE_FILE = 'syseeprom_cache' + + +class Tlv(eeprom_tlvinfo.TlvInfoDecoder): + + EEPROM_DECODE_HEADLINES = 6 + + def __init__(self): + self._eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0050/eeprom" + super(Tlv, self).__init__(self._eeprom_path, 0, '', True) + self._eeprom = self._load_eeprom() + + def __parse_output(self, decode_output): + decode_output.replace('\0', '') + lines = decode_output.split('\n') + lines = lines[self.EEPROM_DECODE_HEADLINES:] + _eeprom_info_dict = dict() + + for line in lines: + try: + match = re.search( + '(0x[0-9a-fA-F]{2})([\s]+[\S]+[\s]+)([\S]+)', line) + if match is not None: + idx = match.group(1) + value = match.group(3).rstrip('\0') + + _eeprom_info_dict[idx] = value + except: + pass + return _eeprom_info_dict + + def _load_eeprom(self): + original_stdout = sys.stdout + sys.stdout = StringIO() + try: + self.read_eeprom_db() + except: + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + return self.__parse_output(decode_output) + + status = self.check_status() + if 'ok' not in status: + return False + + if not os.path.exists(CACHE_ROOT): + try: + os.makedirs(CACHE_ROOT) + except: + pass + + # + # only the eeprom classes that inherit from eeprom_base + # support caching. Others will work normally + # + try: + self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE)) + except: + pass + + e = self.read_eeprom() + if e is None: + return 0 + + try: + self.update_cache(e) + except: + pass + + self.decode_eeprom(e) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + + (is_valid, valid_crc) = self.is_checksum_valid(e) + if not is_valid: + return False + + return self.__parse_output(decode_output) + + def get_eeprom(self): + return self._eeprom + + def get_serial(self): + return self._eeprom.get('0x23', "Undefined.") + + def get_mac(self): + return self._eeprom.get('0x24', "Undefined.") diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/fan.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/fan.py new file mode 100644 index 00000000000..2c5bc5c0c45 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/fan.py @@ -0,0 +1,251 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the fan status which are available in the platform +# +############################################################################# + +import json +import math +import os.path + +try: + from sonic_platform_base.fan_base import FanBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +EMC2305_PATH = "/sys/bus/i2c/drivers/emc2305/" +FAN_PATH = "/sys/devices/platform/e1031.smc/" +EMC2305_MAX_PWM = 255 +EMC2305_FAN_PWM = "pwm{}" +EMC2305_FAN_TARGET = "fan{}_target" +EMC2305_FAN_INPUT = "pwm{}" +FAN_NAME_LIST = ["FAN-1", "FAN-2", "FAN-3"] +PSU_FAN_MAX_RPM = 11000 +PSU_HWMON_PATH = "/sys/bus/i2c/devices/i2c-{0}/{0}-00{1}/hwmon" +PSU_I2C_MAPPING = { + 0: { + "num": 13, + "addr": "5b" + }, + 1: { + "num": 12, + "addr": "5a" + }, +} + + +class Fan(FanBase): + """Platform-specific Fan class""" + + def __init__(self, fan_tray_index, fan_index=0, is_psu_fan=False, psu_index=0): + self.fan_index = fan_index + self.fan_tray_index = fan_tray_index + self.is_psu_fan = is_psu_fan + if self.is_psu_fan: + self.psu_index = psu_index + self.psu_i2c_num = PSU_I2C_MAPPING[self.psu_index]["num"] + self.psu_i2c_addr = PSU_I2C_MAPPING[self.psu_index]["addr"] + self.psu_hwmon_path = PSU_HWMON_PATH.format( + self.psu_i2c_num, self.psu_i2c_addr) + + # e1031 fan attributes + # Single emc2305 chip located at i2c-23-4d + # to control a fan module + self.emc2305_chip_mapping = [ + { + 'device': "23-004d", + 'index_map': [1, 2, 4] + } + ] + self.fan_e1031_presence = "fan{}_prs" + self.fan_e1031_direction = "fan{}_dir" + self.fan_e1031_led = "fan{}_led" + self.fan_e1031_led_col_map = { + self.STATUS_LED_COLOR_GREEN: "green", + self.STATUS_LED_COLOR_RED: "amber", + self.STATUS_LED_COLOR_OFF: "off" + } + FanBase.__init__(self) + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return "" + + def __write_txt_file(self, file_path, value): + try: + with open(file_path, 'w') as fd: + fd.write(str(value)) + except: + return False + return True + + def __search_file_by_name(self, directory, file_name): + for dirpath, dirnames, files in os.walk(directory): + for name in files: + file_path = os.path.join(dirpath, name) + if name in file_name: + return file_path + return None + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = self.FAN_DIRECTION_EXHAUST + if not self.is_psu_fan: + fan_direction_file = (FAN_PATH + + self.fan_e1031_direction.format(self.fan_tray_index+1)) + raw = self.__read_txt_file(fan_direction_file).strip('\r\n') + direction = self.FAN_DIRECTION_INTAKE if str( + raw).upper() == "F2B" else self.FAN_DIRECTION_EXHAUST + + return direction + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + + Note: + speed = pwm_in/255*100 + """ + speed = 0 + if self.is_psu_fan: + fan_speed_sysfs_name = "fan{}_input".format(self.fan_index+1) + fan_speed_sysfs_path = self.__search_file_by_name( + self.psu_hwmon_path, fan_speed_sysfs_name) + fan_speed_rpm = self.__read_txt_file(fan_speed_sysfs_path) or 0 + fan_speed_raw = float(fan_speed_rpm)/PSU_FAN_MAX_RPM * 100 + speed = math.ceil(float(fan_speed_rpm) * 100 / PSU_FAN_MAX_RPM) + elif self.get_presence(): + chip = self.emc2305_chip_mapping[self.fan_index] + device = chip['device'] + fan_index = chip['index_map'] + sysfs_path = "%s%s/%s" % ( + EMC2305_PATH, device, EMC2305_FAN_INPUT) + sysfs_path = sysfs_path.format(fan_index[self.fan_tray_index]) + raw = self.__read_txt_file(sysfs_path).strip('\r\n') + pwm = int(raw, 10) if raw else 0 + speed = math.ceil(float(pwm * 100 / EMC2305_MAX_PWM)) + + return int(speed) + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + + Note: + speed_pc = pwm_target/255*100 + + 0 : when PWM mode is use + pwm : when pwm mode is not use + """ + target = 0 + if not self.is_psu_fan: + chip = self.emc2305_chip_mapping[self.fan_index] + device = chip['device'] + fan_index = chip['index_map'] + sysfs_path = "%s%s/%s" % ( + EMC2305_PATH, device, EMC2305_FAN_TARGET) + sysfs_path = sysfs_path.format(fan_index[self.fan_tray_index]) + raw = self.__read_txt_file(sysfs_path).strip('\r\n') + pwm = int(raw, 10) if raw else 0 + target = math.ceil(float(pwm) * 100 / EMC2305_MAX_PWM) + + return target + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + return 10 + + def set_speed(self, speed): + """ + Sets the fan speed + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + Returns: + A boolean, True if speed is set successfully, False if not + + Note: + Depends on pwm or target mode is selected: + 1) pwm = speed_pc * 255 <-- Currently use this mode. + 2) target_pwm = speed_pc * 100 / 255 + 2.1) set pwm{}_enable to 3 + + """ + pwm = speed * 255 / 100 + if not self.is_psu_fan and self.get_presence(): + chip = self.emc2305_chip_mapping[self.fan_index] + device = chip['device'] + fan_index = chip['index_map'] + sysfs_path = "%s%s/%s" % ( + EMC2305_PATH, device, EMC2305_FAN_PWM) + sysfs_path = sysfs_path.format(fan_index[self.fan_tray_index]) + return self.__write_txt_file(sysfs_path, int(pwm)) + + return False + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + set_status_led = False + if not self.is_psu_fan: + fan_led_file = (FAN_PATH + + self.fan_e1031_led.format(self.fan_tray_index+1)) + + set_status_led = self.__write_txt_file( + fan_led_file, self.fan_e1031_led_col_map[color]) if self.get_presence() else False + + return set_status_led + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + fan_name = FAN_NAME_LIST[self.fan_tray_index] if not self.is_psu_fan else "PSU-{} FAN-{}".format( + self.psu_index+1, self.fan_index+1) + + return fan_name + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + fan_direction_file = (FAN_PATH + + self.fan_e1031_presence.format(self.fan_tray_index+1)) + present_str = self.__read_txt_file(fan_direction_file) or '1' + + return int(present_str) == 0 if not self.is_psu_fan else True diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/platform.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/platform.py new file mode 100644 index 00000000000..a632de87e74 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/platform.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PlatformBase): + """Platform-specific Platform class""" + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/psu.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/psu.py new file mode 100644 index 00000000000..9777bb6fea6 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/psu.py @@ -0,0 +1,201 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path +import sonic_platform + +try: + from sonic_platform_base.psu_base import PsuBase + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +FAN_E1031_SPEED_PATH = "/sys/class/hwmon/hwmon{}/fan1_input" +HWMON_PATH = "/sys/bus/i2c/devices/i2c-{0}/{0}-00{1}/hwmon" +FAN_MAX_RPM = 11000 +PSU_NAME_LIST = ["PSU-R", "PSU-L"] +PSU_NUM_FAN = [1, 1] +PSU_I2C_MAPPING = { + 0: { + "num": 13, + "addr": "5b" + }, + 1: { + "num": 12, + "addr": "5a" + }, +} + + +class Psu(PsuBase): + """Platform-specific Psu class""" + + def __init__(self, psu_index): + PsuBase.__init__(self) + self.index = psu_index + self.psu_path = "/sys/devices/platform/e1031.smc/" + self.psu_presence = "psu{}_prs" + self.psu_oper_status = "psu{}_status" + self.i2c_num = PSU_I2C_MAPPING[self.index]["num"] + self.i2c_addr = PSU_I2C_MAPPING[self.index]["addr"] + self.hwmon_path = HWMON_PATH.format(self.i2c_num, self.i2c_addr) + for fan_index in range(0, PSU_NUM_FAN[self.index]): + fan = Fan(fan_index, 0, is_psu_fan=True, psu_index=self.index) + self._fan_list.append(fan) + PsuBase.__init__(self) + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return "" + + def __search_file_by_contain(self, directory, search_str, file_start): + for dirpath, dirnames, files in os.walk(directory): + for name in files: + file_path = os.path.join(dirpath, name) + if name.startswith(file_start) and search_str in self.__read_txt_file(file_path): + return file_path + return None + + def get_voltage(self): + """ + Retrieves current PSU voltage output + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + psu_voltage = 0.0 + voltage_name = "in{}_input" + voltage_label = "vout1" + + vout_label_path = self.__search_file_by_contain( + self.hwmon_path, voltage_label, "in") + if vout_label_path: + dir_name = os.path.dirname(vout_label_path) + basename = os.path.basename(vout_label_path) + in_num = filter(str.isdigit, basename) + vout_path = os.path.join( + dir_name, voltage_name.format(in_num)) + vout_val = self.__read_txt_file(vout_path) + psu_voltage = float(vout_val) / 1000 + + return psu_voltage + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + psu_current = 0.0 + current_name = "curr{}_input" + current_label = "iout1" + + curr_label_path = self.__search_file_by_contain( + self.hwmon_path, current_label, "cur") + if curr_label_path: + dir_name = os.path.dirname(curr_label_path) + basename = os.path.basename(curr_label_path) + cur_num = filter(str.isdigit, basename) + cur_path = os.path.join( + dir_name, current_name.format(cur_num)) + cur_val = self.__read_txt_file(cur_path) + psu_current = float(cur_val) / 1000 + + return psu_current + + def get_power(self): + """ + Retrieves current energy supplied by PSU + Returns: + A float number, the power in watts, e.g. 302.6 + """ + psu_power = 0.0 + current_name = "power{}_input" + current_label = "pout1" + + pw_label_path = self.__search_file_by_contain( + self.hwmon_path, current_label, "power") + if pw_label_path: + dir_name = os.path.dirname(pw_label_path) + basename = os.path.basename(pw_label_path) + pw_num = filter(str.isdigit, basename) + pw_path = os.path.join( + dir_name, current_name.format(pw_num)) + pw_val = self.__read_txt_file(pw_path) + psu_power = float(pw_val) / 1000000 + + return psu_power + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + Args: + color: A string representing the color with which to set the PSU status LED + Note: Only support green and off + Returns: + bool: True if status LED state is set successfully, False if not + """ + # Hardware not supported + return False + + def get_status_led(self): + """ + Gets the state of the PSU status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + # Hardware not supported + return self.STATUS_LED_COLOR_OFF + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return PSU_NAME_LIST[self.index] + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + psu_location = ["R", "L"] + presences_status = self.__read_txt_file( + self.psu_path + self.psu_presence.format(psu_location[self.index])) or 0 + + return int(presences_status) == 1 + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + psu_location = ["R", "L"] + power_status = self.__read_txt_file( + self.psu_path + self.psu_oper_status.format(psu_location[self.index])) or 0 + + return int(power_status) == 1 diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/sfp.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/sfp.py new file mode 100644 index 00000000000..4cfdcf50b66 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/sfp.py @@ -0,0 +1,717 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Sfp contains an implementation of SONiC Platform Base API and +# provides the sfp device status which are available in the platform +# +############################################################################# + +import os +import time +import subprocess +import sonic_device_util +from ctypes import create_string_buffer + +try: + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8472 import sff8472Dom + from sonic_platform_base.sonic_sfp.sff8472 import sff8472InterfaceId + from sonic_platform_base.sonic_sfp.sff8472 import sffbase + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +INFO_OFFSET = 0 +DOM_OFFSET = 256 + +XCVR_INTFACE_BULK_OFFSET = 0 +XCVR_INTFACE_BULK_WIDTH_SFP = 21 +XCVR_VENDOR_NAME_OFFSET = 20 +XCVR_VENDOR_NAME_WIDTH = 16 +XCVR_VENDOR_OUI_OFFSET = 37 +XCVR_VENDOR_OUI_WIDTH = 3 +XCVR_VENDOR_PN_OFFSET = 40 +XCVR_VENDOR_PN_WIDTH = 16 +XCVR_HW_REV_OFFSET = 56 +XCVR_HW_REV_WIDTH_SFP = 4 +XCVR_VENDOR_SN_OFFSET = 68 +XCVR_VENDOR_SN_WIDTH = 16 +XCVR_VENDOR_DATE_OFFSET = 84 +XCVR_VENDOR_DATE_WIDTH = 8 +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 1 + +# Offset for values in SFP eeprom +SFP_TEMPE_OFFSET = 96 +SFP_TEMPE_WIDTH = 2 +SFP_VOLT_OFFSET = 98 +SFP_VOLT_WIDTH = 2 +SFP_CHANNL_MON_OFFSET = 100 +SFP_CHANNL_MON_WIDTH = 6 +SFP_MODULE_THRESHOLD_OFFSET = 0 +SFP_MODULE_THRESHOLD_WIDTH = 40 +SFP_CHANNL_THRESHOLD_OFFSET = 112 +SFP_CHANNL_THRESHOLD_WIDTH = 2 +SFP_STATUS_CONTROL_OFFSET = 110 +SFP_STATUS_CONTROL_WIDTH = 1 +SFP_TX_DISABLE_HARD_BIT = 7 +SFP_TX_DISABLE_SOFT_BIT = 6 + +sfp_cable_length_tup = ('LengthSMFkm-UnitsOfKm', 'LengthSMF(UnitsOf100m)', + 'Length50um(UnitsOf10m)', 'Length62.5um(UnitsOfm)', + 'LengthCable(UnitsOfm)', 'LengthOM3(UnitsOf10m)') + +sfp_compliance_code_tup = ('10GEthernetComplianceCode', 'InfinibandComplianceCode', + 'ESCONComplianceCodes', 'SONETComplianceCodes', + 'EthernetComplianceCodes', 'FibreChannelLinkLength', + 'FibreChannelTechnology', 'SFP+CableTechnology', + 'FibreChannelTransmissionMedia', 'FibreChannelSpeed') + + +class Sfp(SfpBase): + """Platform-specific Sfp class""" + + # Port number + PORT_START = 1 + PORT_END = 52 + port_to_i2c_mapping = { + 49: 15, + 50: 14, + 51: 17, + 52: 16 + } + _sfp_port = range(49, PORT_END + 1) + PRS_PATH = "/sys/devices/platform/e1031.smc/SFP/sfp_modabs" + PLATFORM_ROOT_PATH = '/usr/share/sonic/device' + PMON_HWSKU_PATH = '/usr/share/sonic/hwsku' + HOST_CHK_CMD = "docker > /dev/null 2>&1" + + PLATFORM = "x86_64-cel_e1031-r0" + HWSKU = "Celestica-E1031-T48S4" + + def __init__(self, sfp_index): + # Init index + self.index = sfp_index + self.port_num = self.index + 1 + + # Init eeprom path + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + self.port_to_eeprom_mapping = {} + for x in range(self.PORT_START, self.PORT_END + 1): + if x not in self._sfp_port: + self.port_to_i2c_mapping[x] = None + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self.port_to_i2c_mapping[x]) + + self.info_dict_keys = ['type', 'hardwarerev', 'serialnum', 'manufacturename', 'modelname', 'Connector', 'encoding', 'ext_identifier', + 'ext_rateselect_compliance', 'cable_type', 'cable_length', 'nominal_bit_rate', 'specification_compliance', 'vendor_date', 'vendor_oui'] + + self.dom_dict_keys = ['rx_los', 'tx_fault', 'reset_status', 'power_lpmode', 'tx_disable', 'tx_disable_channel', 'temperature', 'voltage', + 'rx1power', 'rx2power', 'rx3power', 'rx4power', 'tx1bias', 'tx2bias', 'tx3bias', 'tx4bias', 'tx1power', 'tx2power', 'tx3power', 'tx4power'] + + self.threshold_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', 'rxpowerhighalarm', 'rxpowerhighwarning', + 'rxpowerlowalarm', 'rxpowerlowwarning', 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning'] + + SfpBase.__init__(self) + + def _convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return "" + + def __is_host(self): + return os.system(self.HOST_CHK_CMD) == 0 + + def __get_path_to_port_config_file(self): + platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.PLATFORM]) + hwsku_path = "/".join([platform_path, self.HWSKU] + ) if self.__is_host() else self.PMON_HWSKU_PATH + return "/".join([hwsku_path, "port_config.ini"]) + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + sysfsfile_eeprom = None + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[self.port_num] + try: + sysfsfile_eeprom = open( + sysfs_sfp_i2c_client_eeprom_path, mode="rb", buffering=0) + sysfsfile_eeprom.seek(offset) + raw = sysfsfile_eeprom.read(num_bytes) + for n in range(0, num_bytes): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except: + pass + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + + return eeprom_raw + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + nominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + # check present status + sfpi_obj = sff8472InterfaceId() + if not self.get_presence() or not sfpi_obj: + return {} + + offset = INFO_OFFSET + + sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_INTFACE_BULK_OFFSET), XCVR_INTFACE_BULK_WIDTH_SFP) + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk( + sfp_interface_bulk_raw, 0) + + sfp_vendor_name_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + sfp_vendor_name_data = sfpi_obj.parse_vendor_name( + sfp_vendor_name_raw, 0) + + sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn( + sfp_vendor_pn_raw, 0) + + sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_HW_REV_OFFSET), XCVR_HW_REV_WIDTH_SFP) + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev( + sfp_vendor_rev_raw, 0) + + sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn( + sfp_vendor_sn_raw, 0) + + sfp_vendor_oui_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) + if sfp_vendor_oui_raw is not None: + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui( + sfp_vendor_oui_raw, 0) + + sfp_vendor_date_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) + sfp_vendor_date_data = sfpi_obj.parse_vendor_date( + sfp_vendor_date_raw, 0) + + transceiver_info_dict = dict.fromkeys(self.info_dict_keys, 'N/A') + compliance_code_dict = dict() + + if sfp_interface_bulk_data: + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + transceiver_info_dict['type_abbrv_name'] = sfp_interface_bulk_data['data']['type_abbrv_name']['value'] + + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data[ + 'data']['Vendor Name']['value'] if sfp_vendor_name_data else 'N/A' + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] if sfp_vendor_pn_data else 'N/A' + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] if sfp_vendor_rev_data else 'N/A' + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] if sfp_vendor_sn_data else 'N/A' + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] if sfp_vendor_oui_data else 'N/A' + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data[ + 'data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] if sfp_vendor_date_data else 'N/A' + transceiver_info_dict['cable_type'] = "Unknown" + transceiver_info_dict['cable_length'] = "Unknown" + + for key in sfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str( + sfp_interface_bulk_data['data'][key]['value']) + + for key in sfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + transceiver_info_dict['specification_compliance'] = str( + compliance_code_dict) + transceiver_info_dict['nominal_bit_rate'] = str( + sfp_interface_bulk_data['data']['NominalSignallingRate(UnitsOf100Mbd)']['value']) + + return transceiver_info_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. + tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. + reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. + lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. + tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. + tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 + | |to channel 3. + temperature |INT |module temperature in Celsius + voltage |INT |supply voltage in mV + txbias |INT |TX Bias Current in mA, n is the channel number, + | |for example, tx2bias stands for tx bias of channel 2. + rxpower |INT |received optical power in mW, n is the channel number, + | |for example, rx2power stands for rx power of channel 2. + txpower |INT |TX output power in mW, n is the channel number, + | |for example, tx2power stands for tx power of channel 2. + ======================================================================== + """ + # check present status + sfpd_obj = sff8472Dom() + if not self.get_presence() or not sfpd_obj: + return {} + + eeprom_ifraw = self.__read_eeprom_specific_bytes(0, DOM_OFFSET) + sfpi_obj = sff8472InterfaceId(eeprom_ifraw) + cal_type = sfpi_obj.get_calibration_type() + sfpd_obj._calibration_type = cal_type + + offset = DOM_OFFSET + transceiver_dom_info_dict = dict.fromkeys(self.dom_dict_keys, 'N/A') + dom_temperature_raw = self.__read_eeprom_specific_bytes( + (offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature( + dom_temperature_raw, 0) + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + + dom_voltage_raw = self.__read_eeprom_specific_bytes( + (offset + SFP_VOLT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_voltage_data = sfpd_obj.parse_channel_monitor_params( + dom_channel_monitor_raw, 0) + transceiver_dom_info_dict['tx1power'] = dom_voltage_data['data']['TXPower']['value'] + transceiver_dom_info_dict['rx1power'] = dom_voltage_data['data']['RXPower']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_voltage_data['data']['TXBias']['value'] + + for key in transceiver_dom_info_dict: + transceiver_dom_info_dict[key] = self._convert_string_to_num( + transceiver_dom_info_dict[key]) + + transceiver_dom_info_dict['rx_los'] = self.get_rx_los() + transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() + transceiver_dom_info_dict['reset_status'] = self.get_reset_status() + transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() + + return transceiver_dom_info_dict + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. + templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. + temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. + templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. + vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. + vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. + vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. + vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. + rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. + rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. + rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. + rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. + txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. + txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. + txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. + txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. + txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. + txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. + txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. + txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. + ======================================================================== + """ + # check present status + sfpd_obj = sff8472Dom() + + if not self.get_presence() and not sfpd_obj: + return {} + + eeprom_ifraw = self.__read_eeprom_specific_bytes(0, DOM_OFFSET) + sfpi_obj = sff8472InterfaceId(eeprom_ifraw) + cal_type = sfpi_obj.get_calibration_type() + sfpd_obj._calibration_type = cal_type + + offset = DOM_OFFSET + transceiver_dom_threshold_info_dict = dict.fromkeys( + self.threshold_dict_keys, 'N/A') + dom_module_threshold_raw = self.__read_eeprom_specific_bytes( + (offset + SFP_MODULE_THRESHOLD_OFFSET), SFP_MODULE_THRESHOLD_WIDTH) + if dom_module_threshold_raw is not None: + dom_module_threshold_data = sfpd_obj.parse_alarm_warning_threshold( + dom_module_threshold_raw, 0) + + transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] + transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] + transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] + transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] + transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VoltageHighAlarm']['value'] + transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VoltageLowAlarm']['value'] + transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data[ + 'data']['VoltageHighWarning']['value'] + transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VoltageLowWarning']['value'] + transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_module_threshold_data['data']['BiasHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_module_threshold_data['data']['BiasLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_module_threshold_data['data']['BiasHighWarning']['value'] + transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_module_threshold_data['data']['BiasLowWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_module_threshold_data['data']['TXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_module_threshold_data['data']['TXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_module_threshold_data['data']['TXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_module_threshold_data['data']['TXPowerLowWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_module_threshold_data['data']['RXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_module_threshold_data['data']['RXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_module_threshold_data['data']['RXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_module_threshold_data['data']['RXPowerLowWarning']['value'] + + for key in transceiver_dom_threshold_info_dict: + transceiver_dom_threshold_info_dict[key] = self._convert_string_to_num( + transceiver_dom_threshold_info_dict[key]) + + return transceiver_dom_threshold_info_dict + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + Returns: + A Boolean, True if reset enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + rx_los = False + status_control_raw = self.__read_eeprom_specific_bytes( + SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + rx_los = (sffbase().test_bit(data, 1) != 0) + + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + tx_fault = False + status_control_raw = self.__read_eeprom_specific_bytes( + SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + tx_fault = (sffbase().test_bit(data, 2) != 0) + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + """ + tx_disable = False + tx_fault = False + status_control_raw = self.__read_eeprom_specific_bytes( + SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + tx_disable_hard = (sffbase().test_bit( + data, SFP_TX_DISABLE_HARD_BIT) != 0) + tx_disable_soft = (sffbase().test_bit( + data, SFP_TX_DISABLE_SOFT_BIT) != 0) + tx_disable = tx_disable_hard | tx_disable_soft + + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + # SFP doesn't support this feature + return 0 + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + Returns: + An integer number of current temperature in Celsius + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("temperature", "N/A") + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + Returns: + An integer number of supply voltage in mV + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("voltage", "N/A") + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_bs = transceiver_dom_info_dict.get("tx1bias", "N/A") + return [tx1_bs, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + rx1_pw = transceiver_dom_info_dict.get("rx1power", "N/A") + return [rx1_pw, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_pw = transceiver_dom_info_dict.get("tx1power", "N/A") + return [tx1_pw, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + Returns: + A boolean, True if successful, False if not + """ + # SFP doesn't support this feature + return False + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[self.port_num] + status_control_raw = self.__read_eeprom_specific_bytes( + SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw is not None: + # Set bit 6 for Soft TX Disable Select + # 01000000 = 64 and 10111111 = 191 + tx_disable_bit = 64 if tx_disable else 191 + status_control = int(status_control_raw[0], 16) + tx_disable_ctl = (status_control | tx_disable_bit) if tx_disable else ( + status_control & tx_disable_bit) + try: + sysfsfile_eeprom = open( + sysfs_sfp_i2c_client_eeprom_path, mode="r+b", buffering=0) + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom.seek(SFP_STATUS_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except: + #print("Error: unable to open file: %s" % str(e)) + return False + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + return False + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + Returns: + A boolean, True if successful, False if not + """ + # SFP doesn't support this feature + return False + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + # SFP doesn't support this feature + return False + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + # SFP doesn't support this feature + return False + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings( + self.__get_path_to_port_config_file()) + name = sfputil_helper.logical[self.index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + if self.port_num not in self._sfp_port: + return False + + status = 1 + try: + with open(self.PRS_PATH, 'r') as port_status: + status = int(port_status.read(), 16) + status = (status >> (self.port_num - 49)) & 1 + except IOError: + return False + + return status == 0 + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + transceiver_dom_info_dict = self.get_transceiver_info() + return transceiver_dom_info_dict.get("modelname", "N/A") + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + transceiver_dom_info_dict = self.get_transceiver_info() + return transceiver_dom_info_dict.get("serialnum", "N/A") diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/thermal.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/thermal.py new file mode 100644 index 00000000000..6c37f3b7ce8 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/thermal.py @@ -0,0 +1,164 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Thermal contains an implementation of SONiC Platform Base API and +# provides the thermal device status which are available in the platform +# +############################################################################# + +import os +import re +import os.path + +try: + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Thermal(ThermalBase): + """Platform-specific Thermal class""" + + THERMAL_NAME_LIST = [] + MAINBOARD_SS_PATH = "/sys/class/i2c-adapter/i2c-11/11-001a/hwmon/hwmon2" + CPUBOARD_SS_PATH = "/sys/class/i2c-adapter/i2c-3/3-001a/hwmon/hwmon1" + SS_CONFIG_PATH = "/usr/share/sonic/device/x86_64-cel_e1031-r0/sensors.conf" + + def __init__(self, thermal_index): + self.index = thermal_index + + # Add thermal name + self.THERMAL_NAME_LIST.append("Rear panel-Inlet ambient sensor") + self.THERMAL_NAME_LIST.append("Rear panel-Helix shutdown sensor") + self.THERMAL_NAME_LIST.append( + "Front panel-Inlet ambient sensor (right)") + self.THERMAL_NAME_LIST.append("Front panel-Helix shutdown sensor") + self.THERMAL_NAME_LIST.append( + "Front panel-Inlet ambient sensor (left)") + self.THERMAL_NAME_LIST.append("CPU board temperature sensor : 1") + self.THERMAL_NAME_LIST.append("CPU board temperature sensor : 2") + + # Set hwmon path + self.ss_index, self.hwmon_path = self.__get_ss_info(self.index) + self.ss_key = self.THERMAL_NAME_LIST[self.index] + + def __get_ss_info(self, index): + if self.index <= 4: + ss_path = self.MAINBOARD_SS_PATH + ss_index = index+1 + else: + ss_path = self.CPUBOARD_SS_PATH + ss_index = index-3 + return ss_index, ss_path + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + raise IOError("Unable to open %s file !" % file_path) + + def __get_temp(self, temp_file): + temp_file_path = os.path.join(self.hwmon_path, temp_file) + raw_temp = self.__read_txt_file(temp_file_path) + temp = float(raw_temp)/1000 + return "{:.3f}".format(temp) + + def __set_threshold(self, file_name, temperature): + temp_file_path = os.path.join(self.hwmon_path, file_name) + try: + with open(temp_file_path, 'w') as fd: + fd.write(str(temperature)) + return True + except IOError: + return False + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + temp_file = "temp{}_input".format(self.ss_index) + return self.__get_temp(temp_file) + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + Returns: + A float number, the high threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + temp_file = "temp{}_max".format(self.ss_index) + return self.__get_temp(temp_file) + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if not + """ + temp_file = "temp{}_max".format(self.ss_index) + is_set = self.__set_threshold(temp_file, int(temperature*1000)) + file_set = False + if is_set: + try: + with open(self.SS_CONFIG_PATH, 'r+') as f: + content = f.readlines() + f.seek(0) + ss_found = False + for idx, val in enumerate(content): + if self.ss_key in val: + ss_found = True + elif ss_found and temp_file in val: + content[idx] = " set {} {}\n".format( + temp_file, temperature) + f.writelines(content) + file_set = True + break + except IOError: + file_set = False + + return is_set & file_set + + def get_name(self): + """ + Retrieves the name of the thermal device + Returns: + string: The name of the thermal device + """ + return self.THERMAL_NAME_LIST[self.index] + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + temp_file = "temp{}_input".format(self.ss_index) + temp_file_path = os.path.join(self.hwmon_path, temp_file) + return os.path.isfile(temp_file_path) + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + if not self.get_presence(): + return False + + fault_file = "temp{}_fault".format(self.ss_index) + fault_file_path = os.path.join(self.hwmon_path, fault_file) + if not os.path.isfile(fault_file_path): + return True + + raw_txt = self.__read_txt_file(fault_file_path) + return int(raw_txt) == 0 diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/watchdog.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/watchdog.py new file mode 100644 index 00000000000..b539bc06f61 --- /dev/null +++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/watchdog.py @@ -0,0 +1,233 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Watchdog contains an implementation of SONiC Platform Base API +# +############################################################################# +import ctypes +import fcntl +import os +import subprocess +import time +import array + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +""" ioctl constants """ +IO_WRITE = 0x40000000 +IO_READ = 0x80000000 +IO_READ_WRITE = 0xC0000000 +IO_SIZE_INT = 0x00040000 +IO_SIZE_40 = 0x00280000 +IO_TYPE_WATCHDOG = ord('W') << 8 + +WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG +WDR_40 = IO_READ | IO_SIZE_40 | IO_TYPE_WATCHDOG +WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG + +""" Watchdog ioctl commands """ +WDIOC_GETSUPPORT = 0 | WDR_40 +WDIOC_GETSTATUS = 1 | WDR_INT +WDIOC_GETBOOTSTATUS = 2 | WDR_INT +WDIOC_GETTEMP = 3 | WDR_INT +WDIOC_SETOPTIONS = 4 | WDR_INT +WDIOC_KEEPALIVE = 5 | WDR_INT +WDIOC_SETTIMEOUT = 6 | WDWR_INT +WDIOC_GETTIMEOUT = 7 | WDR_INT +WDIOC_SETPRETIMEOUT = 8 | WDWR_INT +WDIOC_GETPRETIMEOUT = 9 | WDR_INT +WDIOC_GETTIMELEFT = 10 | WDR_INT + +""" Watchdog status constants """ +WDIOS_DISABLECARD = 0x0001 +WDIOS_ENABLECARD = 0x0002 + +WDT_COMMON_ERROR = -1 +WD_MAIN_IDENTITY = "iTCO_wdt" +WDT_SYSFS_PATH = "/sys/class/watchdog/" + + +class Watchdog(WatchdogBase): + + def __init__(self): + + self.watchdog, self.wdt_main_dev_name = self._get_wdt() + self.status_path = "/sys/class/watchdog/%s/status" % self.wdt_main_dev_name + self.state_path = "/sys/class/watchdog/%s/state" % self.wdt_main_dev_name + self.timeout_path = "/sys/class/watchdog/%s/timeout" % self.wdt_main_dev_name + # Set default value + self._disable() + self.armed = False + self.timeout = self._gettimeout(self.timeout_path) + + def _is_wd_main(self, dev): + """ + Checks watchdog identity + """ + identity = self._read_file( + "{}/{}/identity".format(WDT_SYSFS_PATH, dev)) + return identity == WD_MAIN_IDENTITY + + def _get_wdt(self): + """ + Retrieves watchdog device + """ + wdt_main_dev_list = [dev for dev in os.listdir( + "/dev/") if dev.startswith("watchdog") and self._is_wd_main(dev)] + if not wdt_main_dev_list: + return None + wdt_main_dev_name = wdt_main_dev_list[0] + watchdog_device_path = "/dev/{}".format(wdt_main_dev_name) + watchdog = os.open(watchdog_device_path, os.O_RDWR) + return watchdog, wdt_main_dev_name + + def _read_file(self, file_path): + """ + Read text file + """ + try: + with open(file_path, "r") as fd: + txt = fd.read() + except IOError: + return WDT_COMMON_ERROR + return txt.strip() + + def _enable(self): + """ + Turn on the watchdog timer + """ + req = array.array('h', [WDIOS_ENABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _disable(self): + """ + Turn off the watchdog timer + """ + req = array.array('h', [WDIOS_DISABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE) + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + req = array.array('I', [seconds]) + fcntl.ioctl(self.watchdog, WDIOC_SETTIMEOUT, req, True) + return int(req[0]) + + def _gettimeout(self, timeout_path): + """ + Get watchdog timeout + @return watchdog timeout + """ + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMEOUT, req, True) + + return int(req[0]) + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMELEFT, req, True) + + return int(req[0]) + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + if self.armed: + self._keepalive() + else: + self._enable() + self.armed = True + ret = self.timeout + except IOError as e: + pass + + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + self._disable() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + + timeleft = WDT_COMMON_ERROR + + if self.armed: + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft + + def __del__(self): + """ + Close watchdog + """ + + os.close(self.watchdog) diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/buffers.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/buffers.json.j2 new file mode 100644 index 00000000000..45cebf3b714 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 64 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/config_64x100G_midstone200i.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/config_64x100G_midstone200i.yaml new file mode 100755 index 00000000000..0b7e1a2db9d --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/config_64x100G_midstone200i.yaml @@ -0,0 +1,639 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "128" + type: "cpu" + - fec: "KRFEC" + id: "1" + lanes: "0:4" + serdes_group: "31" + speed: "100G" + sysport: "1" + type: "eth" + - fec: "KRFEC" + id: "2" + lanes: "4:4" + serdes_group: "31" + speed: "100G" + sysport: "2" + type: "eth" + - fec: "KRFEC" + id: "3" + lanes: "4:4" + serdes_group: "30" + speed: "100G" + sysport: "3" + type: "eth" + - fec: "KRFEC" + id: "4" + lanes: "0:4" + serdes_group: "30" + speed: "100G" + sysport: "4" + type: "eth" + - fec: "KRFEC" + id: "5" + lanes: "0:4" + serdes_group: "29" + speed: "100G" + sysport: "5" + type: "eth" + - fec: "KRFEC" + id: "6" + lanes: "4:4" + serdes_group: "29" + speed: "100G" + sysport: "6" + type: "eth" + - fec: "KRFEC" + id: "7" + lanes: "4:4" + serdes_group: "28" + speed: "100G" + sysport: "7" + type: "eth" + - fec: "KRFEC" + id: "8" + lanes: "0:4" + serdes_group: "28" + speed: "100G" + sysport: "8" + type: "eth" + - fec: "KRFEC" + id: "9" + lanes: "0:4" + serdes_group: "27" + speed: "100G" + sysport: "9" + type: "eth" + - fec: "KRFEC" + id: "10" + lanes: "4:4" + serdes_group: "27" + speed: "100G" + sysport: "10" + type: "eth" + - fec: "KRFEC" + id: "11" + lanes: "4:4" + serdes_group: "26" + speed: "100G" + sysport: "11" + type: "eth" + - fec: "KRFEC" + id: "12" + lanes: "0:4" + serdes_group: "26" + speed: "100G" + sysport: "12" + type: "eth" + - fec: "KRFEC" + id: "13" + lanes: "0:4" + serdes_group: "25" + speed: "100G" + sysport: "13" + type: "eth" + - fec: "KRFEC" + id: "14" + lanes: "4:4" + serdes_group: "25" + speed: "100G" + sysport: "14" + type: "eth" + - fec: "KRFEC" + id: "15" + lanes: "4:4" + serdes_group: "24" + speed: "100G" + sysport: "15" + type: "eth" + - fec: "KRFEC" + id: "16" + lanes: "0:4" + serdes_group: "24" + speed: "100G" + sysport: "16" + type: "eth" + - fec: "KRFEC" + id: "17" + lanes: "0:4" + serdes_group: "23" + speed: "100G" + sysport: "17" + type: "eth" + - fec: "KRFEC" + id: "18" + lanes: "4:4" + serdes_group: "23" + speed: "100G" + sysport: "18" + type: "eth" + - fec: "KRFEC" + id: "19" + lanes: "4:4" + serdes_group: "22" + speed: "100G" + sysport: "19" + type: "eth" + - fec: "KRFEC" + id: "20" + lanes: "0:4" + serdes_group: "22" + speed: "100G" + sysport: "20" + type: "eth" + - fec: "KRFEC" + id: "21" + lanes: "0:4" + serdes_group: "21" + speed: "100G" + sysport: "21" + type: "eth" + - fec: "KRFEC" + id: "22" + lanes: "4:4" + serdes_group: "21" + speed: "100G" + sysport: "22" + type: "eth" + - fec: "KRFEC" + id: "23" + lanes: "4:4" + serdes_group: "20" + speed: "100G" + sysport: "23" + type: "eth" + - fec: "KRFEC" + id: "24" + lanes: "0:4" + serdes_group: "20" + speed: "100G" + sysport: "24" + type: "eth" + - fec: "KRFEC" + id: "25" + lanes: "0:4" + serdes_group: "19" + speed: "100G" + sysport: "25" + type: "eth" + - fec: "KRFEC" + id: "26" + lanes: "4:4" + serdes_group: "19" + speed: "100G" + sysport: "26" + type: "eth" + - fec: "KRFEC" + id: "27" + lanes: "4:4" + serdes_group: "18" + speed: "100G" + sysport: "27" + type: "eth" + - fec: "KRFEC" + id: "28" + lanes: "0:4" + serdes_group: "18" + speed: "100G" + sysport: "28" + type: "eth" + - fec: "KRFEC" + id: "29" + lanes: "0:4" + serdes_group: "17" + speed: "100G" + sysport: "29" + type: "eth" + - fec: "KRFEC" + id: "30" + lanes: "4:4" + serdes_group: "17" + speed: "100G" + sysport: "30" + type: "eth" + - fec: "KRFEC" + id: "31" + lanes: "4:4" + serdes_group: "16" + speed: "100G" + sysport: "31" + type: "eth" + - fec: "KRFEC" + id: "32" + lanes: "0:4" + serdes_group: "16" + speed: "100G" + sysport: "32" + type: "eth" + - fec: "KRFEC" + id: "33" + lanes: "0:4" + serdes_group: "15" + speed: "100G" + sysport: "33" + type: "eth" + - fec: "KRFEC" + id: "34" + lanes: "4:4" + serdes_group: "15" + speed: "100G" + sysport: "34" + type: "eth" + - fec: "KRFEC" + id: "35" + lanes: "4:4" + serdes_group: "14" + speed: "100G" + sysport: "35" + type: "eth" + - fec: "KRFEC" + id: "36" + lanes: "0:4" + serdes_group: "14" + speed: "100G" + sysport: "36" + type: "eth" + - fec: "KRFEC" + id: "37" + lanes: "0:4" + serdes_group: "13" + speed: "100G" + sysport: "37" + type: "eth" + - fec: "KRFEC" + id: "38" + lanes: "4:4" + serdes_group: "13" + speed: "100G" + sysport: "38" + type: "eth" + - fec: "KRFEC" + id: "39" + lanes: "4:4" + serdes_group: "12" + speed: "100G" + sysport: "39" + type: "eth" + - fec: "KRFEC" + id: "40" + lanes: "0:4" + serdes_group: "12" + speed: "100G" + sysport: "40" + type: "eth" + - fec: "KRFEC" + id: "41" + lanes: "0:4" + serdes_group: "11" + speed: "100G" + sysport: "41" + type: "eth" + - fec: "KRFEC" + id: "42" + lanes: "4:4" + serdes_group: "11" + speed: "100G" + sysport: "42" + type: "eth" + - fec: "KRFEC" + id: "43" + lanes: "4:4" + serdes_group: "10" + speed: "100G" + sysport: "43" + type: "eth" + - fec: "KRFEC" + id: "44" + lanes: "0:4" + serdes_group: "10" + speed: "100G" + sysport: "44" + type: "eth" + - fec: "KRFEC" + id: "45" + lanes: "0:4" + serdes_group: "9" + speed: "100G" + sysport: "45" + type: "eth" + - fec: "KRFEC" + id: "46" + lanes: "4:4" + serdes_group: "9" + speed: "100G" + sysport: "46" + type: "eth" + - fec: "KRFEC" + id: "47" + lanes: "4:4" + serdes_group: "8" + speed: "100G" + sysport: "47" + type: "eth" + - fec: "KRFEC" + id: "48" + lanes: "0:4" + serdes_group: "8" + speed: "100G" + sysport: "48" + type: "eth" + - fec: "KRFEC" + id: "49" + lanes: "0:4" + serdes_group: "7" + speed: "100G" + sysport: "49" + type: "eth" + - fec: "KRFEC" + id: "50" + lanes: "4:4" + serdes_group: "7" + speed: "100G" + sysport: "50" + type: "eth" + - fec: "KRFEC" + id: "51" + lanes: "4:4" + serdes_group: "6" + speed: "100G" + sysport: "51" + type: "eth" + - fec: "KRFEC" + id: "52" + lanes: "0:4" + serdes_group: "6" + speed: "100G" + sysport: "52" + type: "eth" + - fec: "KRFEC" + id: "53" + lanes: "0:4" + serdes_group: "5" + speed: "100G" + sysport: "53" + type: "eth" + - fec: "KRFEC" + id: "54" + lanes: "4:4" + serdes_group: "5" + speed: "100G" + sysport: "54" + type: "eth" + - fec: "KRFEC" + id: "55" + lanes: "4:4" + serdes_group: "4" + speed: "100G" + sysport: "55" + type: "eth" + - fec: "KRFEC" + id: "56" + lanes: "0:4" + serdes_group: "4" + speed: "100G" + sysport: "56" + type: "eth" + - fec: "KRFEC" + id: "57" + lanes: "0:4" + serdes_group: "3" + speed: "100G" + sysport: "57" + type: "eth" + - fec: "KRFEC" + id: "58" + lanes: "4:4" + serdes_group: "3" + speed: "100G" + sysport: "58" + type: "eth" + - fec: "KRFEC" + id: "59" + lanes: "4:4" + serdes_group: "2" + speed: "100G" + sysport: "59" + type: "eth" + - fec: "KRFEC" + id: "60" + lanes: "0:4" + serdes_group: "2" + speed: "100G" + sysport: "60" + type: "eth" + - fec: "KRFEC" + id: "61" + lanes: "0:4" + serdes_group: "1" + speed: "100G" + sysport: "61" + type: "eth" + - fec: "KRFEC" + id: "62" + lanes: "4:4" + serdes_group: "1" + speed: "100G" + sysport: "62" + type: "eth" + - fec: "KRFEC" + id: "63" + lanes: "4:4" + serdes_group: "0" + speed: "100G" + sysport: "63" + type: "eth" + - fec: "KRFEC" + id: "64" + lanes: "0:4" + serdes_group: "0" + speed: "100G" + sysport: "64" + type: "eth" + isg: + - id: "0" + tx_polarity: "00101001" + rx_polarity: "01110001" + lane_swap: "01234567" + - id: "1" + tx_polarity: "10111111" + rx_polarity: "11100100" + lane_swap: "01234567" + - id: "2" + tx_polarity: "00100010" + rx_polarity: "00010001" + lane_swap: "01234567" + - id: "3" + tx_polarity: "00101010" + rx_polarity: "11011101" + lane_swap: "01234567" + - id: "4" + tx_polarity: "10111110" + rx_polarity: "10010101" + lane_swap: "01234567" + - id: "5" + tx_polarity: "01101000" + rx_polarity: "10111001" + lane_swap: "01234567" + - id: "6" + tx_polarity: "01110110" + rx_polarity: "01110011" + lane_swap: "01234567" + - id: "7" + tx_polarity: "01001000" + rx_polarity: "10111001" + lane_swap: "01234567" + - id: "8" + tx_polarity: "11000100" + rx_polarity: "01000000" + lane_swap: "01234567" + - id: "9" + tx_polarity: "10001010" + rx_polarity: "10100100" + lane_swap: "01234567" + - id: "10" + tx_polarity: "11000110" + rx_polarity: "00011101" + lane_swap: "01234567" + - id: "11" + tx_polarity: "01000111" + rx_polarity: "00000101" + lane_swap: "01234567" + - id: "12" + tx_polarity: "01111000" + rx_polarity: "11100000" + lane_swap: "01234567" + - id: "13" + tx_polarity: "10011111" + rx_polarity: "00101111" + lane_swap: "01234567" + - id: "14" + tx_polarity: "00101001" + rx_polarity: "00011000" + lane_swap: "01234567" + - id: "15" + tx_polarity: "10110111" + rx_polarity: "00110110" + lane_swap: "01234567" + - id: "16" + tx_polarity: "00101001" + rx_polarity: "00000111" + lane_swap: "01234567" + - id: "17" + tx_polarity: "10100111" + rx_polarity: "10001000" + lane_swap: "01234567" + - id: "18" + tx_polarity: "00011001" + rx_polarity: "11111110" + lane_swap: "01234567" + - id: "19" + tx_polarity: "10010101" + rx_polarity: "10011010" + lane_swap: "01234567" + - id: "20" + tx_polarity: "00101001" + rx_polarity: "01100000" + lane_swap: "01234567" + - id: "21" + tx_polarity: "10010111" + rx_polarity: "01111001" + lane_swap: "01234567" + - id: "22" + tx_polarity: "00101001" + rx_polarity: "11010011" + lane_swap: "01234567" + - id: "23" + tx_polarity: "10110111" + rx_polarity: "01111011" + lane_swap: "01234567" + - id: "24" + tx_polarity: "00101001" + rx_polarity: "11101011" + lane_swap: "01234567" + - id: "25" + tx_polarity: "10110111" + rx_polarity: "11010111" + lane_swap: "01234567" + - id: "26" + tx_polarity: "00100001" + rx_polarity: "00101101" + lane_swap: "01234567" + - id: "27" + tx_polarity: "11000111" + rx_polarity: "11011001" + lane_swap: "01234567" + - id: "28" + tx_polarity: "00100001" + rx_polarity: "01010011" + lane_swap: "01234567" + - id: "29" + tx_polarity: "10110111" + rx_polarity: "01111001" + lane_swap: "01234567" + - id: "30" + tx_polarity: "00101001" + rx_polarity: "00110001" + lane_swap: "01234567" + - id: "31" + tx_polarity: "10110101" + rx_polarity: "01101101" + lane_swap: "01234567" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/inno.config.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/inno.config.yaml new file mode 100755 index 00000000000..b2a079136ab --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_64x100G_midstone200i.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/innovium.77700_B b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/port_config.ini b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/port_config.ini new file mode 100755 index 00000000000..c9b30d768d5 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/port_config.ini @@ -0,0 +1,65 @@ +# name lanes speed index mtu +Ethernet0 249,250,251,252 100000 1 9126 +Ethernet4 253,254,255,256 100000 2 9126 +Ethernet8 245,246,247,248 100000 3 9126 +Ethernet12 241,242,243,244 100000 4 9126 +Ethernet16 233,234,235,236 100000 5 9126 +Ethernet20 237,238,239,240 100000 6 9126 +Ethernet24 229,230,231,232 100000 7 9126 +Ethernet28 225,226,227,228 100000 8 9126 +Ethernet32 217,218,219,220 100000 9 9126 +Ethernet36 221,222,223,224 100000 10 9126 +Ethernet40 213,214,215,216 100000 11 9126 +Ethernet44 209,210,211,212 100000 12 9126 +Ethernet48 201,202,203,204 100000 13 9126 +Ethernet52 205,206,207,208 100000 14 9126 +Ethernet56 197,198,199,200 100000 15 9126 +Ethernet60 193,194,195,196 100000 16 9126 +Ethernet64 185,186,187,188 100000 17 9126 +Ethernet68 189,190,191,192 100000 18 9126 +Ethernet72 181,182,183,184 100000 19 9126 +Ethernet76 177,178,179,180 100000 20 9126 +Ethernet80 169,170,171,172 100000 21 9126 +Ethernet84 173,174,175,176 100000 22 9126 +Ethernet88 165,166,167,168 100000 23 9126 +Ethernet92 161,162,163,164 100000 24 9126 +Ethernet96 153,154,155,156 100000 25 9126 +Ethernet100 157,158,159,160 100000 26 9126 +Ethernet104 149,150,151,152 100000 27 9126 +Ethernet108 145,146,147,148 100000 28 9126 +Ethernet112 137,138,139,140 100000 29 9126 +Ethernet116 141,142,143,144 100000 30 9126 +Ethernet120 133,134,135,136 100000 31 9126 +Ethernet124 129,130,131,132 100000 32 9126 +Ethernet128 121,122,123,124 100000 33 9126 +Ethernet132 125,126,127,128 100000 34 9126 +Ethernet136 117,118,119,120 100000 35 9126 +Ethernet140 113,114,115,116 100000 36 9126 +Ethernet144 105,106,107,108 100000 37 9126 +Ethernet148 109,110,111,112 100000 38 9126 +Ethernet152 101,102,103,104 100000 39 9126 +Ethernet156 97,98,99,100 100000 40 9126 +Ethernet160 89,90,91,92 100000 41 9126 +Ethernet164 93,94,95,96 100000 42 9126 +Ethernet168 85,86,87,88 100000 43 9126 +Ethernet172 81,82,83,84 100000 44 9126 +Ethernet176 73,74,75,76 100000 45 9126 +Ethernet180 77,78,79,80 100000 46 9126 +Ethernet184 69,70,71,72 100000 47 9126 +Ethernet188 65,66,67,68 100000 48 9126 +Ethernet192 57,58,59,60 100000 49 9126 +Ethernet196 61,62,63,64 100000 50 9126 +Ethernet200 53,54,55,56 100000 51 9126 +Ethernet204 49,50,51,52 100000 52 9126 +Ethernet208 41,42,43,44 100000 53 9126 +Ethernet212 45,46,47,48 100000 54 9126 +Ethernet216 37,38,39,40 100000 55 9126 +Ethernet220 33,34,35,36 100000 56 9126 +Ethernet224 25,26,27,28 100000 57 9126 +Ethernet228 29,30,31,32 100000 58 9126 +Ethernet232 21,22,23,24 100000 59 9126 +Ethernet236 17,18,19,20 100000 60 9126 +Ethernet240 9,10,11,12 100000 61 9126 +Ethernet244 13,14,15,16 100000 62 9126 +Ethernet248 5,6,7,8 100000 63 9126 +Ethernet252 1,2,3,4 100000 64 9126 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/qos.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/qos.json.j2 new file mode 100755 index 00000000000..16f9b42a216 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 64 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/sai.profile b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/buffers.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/buffers.json.j2 new file mode 100644 index 00000000000..9529fbf52fb --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 128 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*2)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/config_128x100G_midstone200i.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/config_128x100G_midstone200i.yaml new file mode 100644 index 00000000000..342d223a96e --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/config_128x100G_midstone200i.yaml @@ -0,0 +1,1100 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:2" + serdes_group: "31" + speed: "100G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "251" + lanes: "2:2" + serdes_group: "31" + speed: "100G" + sysport: "251" + type: "eth" + - fec: "KPFEC" + id: "253" + lanes: "4:2" + serdes_group: "31" + speed: "100G" + sysport: "253" + type: "eth" + - fec: "KPFEC" + id: "255" + lanes: "6:2" + serdes_group: "31" + speed: "100G" + sysport: "255" + type: "eth" + - fec: "KPFEC" + id: "245" + lanes: "4:2" + serdes_group: "30" + speed: "100G" + sysport: "245" + type: "eth" + - fec: "KPFEC" + id: "247" + lanes: "6:2" + serdes_group: "30" + speed: "100G" + sysport: "247" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:2" + serdes_group: "30" + speed: "100G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "243" + lanes: "2:2" + serdes_group: "30" + speed: "100G" + sysport: "243" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:2" + serdes_group: "29" + speed: "100G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "235" + lanes: "2:2" + serdes_group: "29" + speed: "100G" + sysport: "235" + type: "eth" + - fec: "KPFEC" + id: "237" + lanes: "4:2" + serdes_group: "29" + speed: "100G" + sysport: "237" + type: "eth" + - fec: "KPFEC" + id: "239" + lanes: "6:2" + serdes_group: "29" + speed: "100G" + sysport: "239" + type: "eth" + - fec: "KPFEC" + id: "229" + lanes: "4:2" + serdes_group: "28" + speed: "100G" + sysport: "229" + type: "eth" + - fec: "KPFEC" + id: "231" + lanes: "6:2" + serdes_group: "28" + speed: "100G" + sysport: "231" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:2" + serdes_group: "28" + speed: "100G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "227" + lanes: "2:2" + serdes_group: "28" + speed: "100G" + sysport: "227" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:2" + serdes_group: "27" + speed: "100G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "219" + lanes: "2:2" + serdes_group: "27" + speed: "100G" + sysport: "219" + type: "eth" + - fec: "KPFEC" + id: "221" + lanes: "4:2" + serdes_group: "27" + speed: "100G" + sysport: "221" + type: "eth" + - fec: "KPFEC" + id: "223" + lanes: "6:2" + serdes_group: "27" + speed: "100G" + sysport: "223" + type: "eth" + - fec: "KPFEC" + id: "213" + lanes: "4:2" + serdes_group: "26" + speed: "100G" + sysport: "213" + type: "eth" + - fec: "KPFEC" + id: "215" + lanes: "6:2" + serdes_group: "26" + speed: "100G" + sysport: "215" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:2" + serdes_group: "26" + speed: "100G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "211" + lanes: "2:2" + serdes_group: "26" + speed: "100G" + sysport: "211" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:2" + serdes_group: "25" + speed: "100G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "203" + lanes: "2:2" + serdes_group: "25" + speed: "100G" + sysport: "203" + type: "eth" + - fec: "KPFEC" + id: "205" + lanes: "4:2" + serdes_group: "25" + speed: "100G" + sysport: "205" + type: "eth" + - fec: "KPFEC" + id: "207" + lanes: "6:2" + serdes_group: "25" + speed: "100G" + sysport: "207" + type: "eth" + - fec: "KPFEC" + id: "197" + lanes: "4:2" + serdes_group: "24" + speed: "100G" + sysport: "197" + type: "eth" + - fec: "KPFEC" + id: "199" + lanes: "6:2" + serdes_group: "24" + speed: "100G" + sysport: "199" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:2" + serdes_group: "24" + speed: "100G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "195" + lanes: "2:2" + serdes_group: "24" + speed: "100G" + sysport: "195" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:2" + serdes_group: "23" + speed: "100G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "187" + lanes: "2:2" + serdes_group: "23" + speed: "100G" + sysport: "187" + type: "eth" + - fec: "KPFEC" + id: "189" + lanes: "4:2" + serdes_group: "23" + speed: "100G" + sysport: "189" + type: "eth" + - fec: "KPFEC" + id: "191" + lanes: "6:2" + serdes_group: "23" + speed: "100G" + sysport: "191" + type: "eth" + - fec: "KPFEC" + id: "181" + lanes: "4:2" + serdes_group: "22" + speed: "100G" + sysport: "181" + type: "eth" + - fec: "KPFEC" + id: "183" + lanes: "6:2" + serdes_group: "22" + speed: "100G" + sysport: "183" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:2" + serdes_group: "22" + speed: "100G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "179" + lanes: "2:2" + serdes_group: "22" + speed: "100G" + sysport: "179" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:2" + serdes_group: "21" + speed: "100G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "171" + lanes: "2:2" + serdes_group: "21" + speed: "100G" + sysport: "171" + type: "eth" + - fec: "KPFEC" + id: "173" + lanes: "4:2" + serdes_group: "21" + speed: "100G" + sysport: "173" + type: "eth" + - fec: "KPFEC" + id: "175" + lanes: "6:2" + serdes_group: "21" + speed: "100G" + sysport: "175" + type: "eth" + - fec: "KPFEC" + id: "165" + lanes: "4:2" + serdes_group: "20" + speed: "100G" + sysport: "165" + type: "eth" + - fec: "KPFEC" + id: "167" + lanes: "6:2" + serdes_group: "20" + speed: "100G" + sysport: "167" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:2" + serdes_group: "20" + speed: "100G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "163" + lanes: "2:2" + serdes_group: "20" + speed: "100G" + sysport: "163" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:2" + serdes_group: "19" + speed: "100G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "155" + lanes: "2:2" + serdes_group: "19" + speed: "100G" + sysport: "155" + type: "eth" + - fec: "KPFEC" + id: "157" + lanes: "4:2" + serdes_group: "19" + speed: "100G" + sysport: "157" + type: "eth" + - fec: "KPFEC" + id: "159" + lanes: "6:2" + serdes_group: "19" + speed: "100G" + sysport: "159" + type: "eth" + - fec: "KPFEC" + id: "149" + lanes: "4:2" + serdes_group: "18" + speed: "100G" + sysport: "149" + type: "eth" + - fec: "KPFEC" + id: "151" + lanes: "6:2" + serdes_group: "18" + speed: "100G" + sysport: "151" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:2" + serdes_group: "18" + speed: "100G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "147" + lanes: "2:2" + serdes_group: "18" + speed: "100G" + sysport: "147" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:2" + serdes_group: "17" + speed: "100G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "139" + lanes: "2:2" + serdes_group: "17" + speed: "100G" + sysport: "139" + type: "eth" + - fec: "KPFEC" + id: "141" + lanes: "4:2" + serdes_group: "17" + speed: "100G" + sysport: "141" + type: "eth" + - fec: "KPFEC" + id: "143" + lanes: "6:2" + serdes_group: "17" + speed: "100G" + sysport: "143" + type: "eth" + - fec: "KPFEC" + id: "133" + lanes: "4:2" + serdes_group: "16" + speed: "100G" + sysport: "133" + type: "eth" + - fec: "KPFEC" + id: "135" + lanes: "6:2" + serdes_group: "16" + speed: "100G" + sysport: "135" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:2" + serdes_group: "16" + speed: "100G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "131" + lanes: "2:2" + serdes_group: "16" + speed: "100G" + sysport: "131" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:2" + serdes_group: "15" + speed: "100G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "123" + lanes: "2:2" + serdes_group: "15" + speed: "100G" + sysport: "123" + type: "eth" + - fec: "KPFEC" + id: "125" + lanes: "4:2" + serdes_group: "15" + speed: "100G" + sysport: "125" + type: "eth" + - fec: "KPFEC" + id: "127" + lanes: "6:2" + serdes_group: "15" + speed: "100G" + sysport: "127" + type: "eth" + - fec: "KPFEC" + id: "117" + lanes: "4:2" + serdes_group: "14" + speed: "100G" + sysport: "117" + type: "eth" + - fec: "KPFEC" + id: "119" + lanes: "6:2" + serdes_group: "14" + speed: "100G" + sysport: "119" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:2" + serdes_group: "14" + speed: "100G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "115" + lanes: "2:2" + serdes_group: "14" + speed: "100G" + sysport: "115" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:2" + serdes_group: "13" + speed: "100G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "107" + lanes: "2:2" + serdes_group: "13" + speed: "100G" + sysport: "107" + type: "eth" + - fec: "KPFEC" + id: "109" + lanes: "4:2" + serdes_group: "13" + speed: "100G" + sysport: "109" + type: "eth" + - fec: "KPFEC" + id: "111" + lanes: "6:2" + serdes_group: "13" + speed: "100G" + sysport: "111" + type: "eth" + - fec: "KPFEC" + id: "101" + lanes: "4:2" + serdes_group: "12" + speed: "100G" + sysport: "101" + type: "eth" + - fec: "KPFEC" + id: "103" + lanes: "6:2" + serdes_group: "12" + speed: "100G" + sysport: "103" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:2" + serdes_group: "12" + speed: "100G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "99" + lanes: "2:2" + serdes_group: "12" + speed: "100G" + sysport: "99" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:2" + serdes_group: "11" + speed: "100G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "91" + lanes: "2:2" + serdes_group: "11" + speed: "100G" + sysport: "91" + type: "eth" + - fec: "KPFEC" + id: "93" + lanes: "4:2" + serdes_group: "11" + speed: "100G" + sysport: "93" + type: "eth" + - fec: "KPFEC" + id: "95" + lanes: "6:2" + serdes_group: "11" + speed: "100G" + sysport: "95" + type: "eth" + - fec: "KPFEC" + id: "85" + lanes: "4:2" + serdes_group: "10" + speed: "100G" + sysport: "85" + type: "eth" + - fec: "KPFEC" + id: "87" + lanes: "6:2" + serdes_group: "10" + speed: "100G" + sysport: "87" + type: "eth" + - fec: "KPFEC" + id: "87" + lanes: "0:2" + serdes_group: "10" + speed: "100G" + sysport: "87" + type: "eth" + - fec: "KPFEC" + id: "83" + lanes: "2:2" + serdes_group: "10" + speed: "100G" + sysport: "83" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:2" + serdes_group: "9" + speed: "100G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "75" + lanes: "2:2" + serdes_group: "9" + speed: "100G" + sysport: "75" + type: "eth" + - fec: "KPFEC" + id: "91" + lanes: "4:2" + serdes_group: "9" + speed: "100G" + sysport: "91" + type: "eth" + - fec: "KPFEC" + id: "79" + lanes: "6:2" + serdes_group: "9" + speed: "100G" + sysport: "79" + type: "eth" + - fec: "KPFEC" + id: "93" + lanes: "4:2" + serdes_group: "8" + speed: "100G" + sysport: "93" + type: "eth" + - fec: "KPFEC" + id: "71" + lanes: "6:2" + serdes_group: "8" + speed: "100G" + sysport: "71" + type: "eth" + - fec: "KPFEC" + id: "95" + lanes: "0:2" + serdes_group: "8" + speed: "100G" + sysport: "95" + type: "eth" + - fec: "KPFEC" + id: "67" + lanes: "2:2" + serdes_group: "8" + speed: "100G" + sysport: "67" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:2" + serdes_group: "7" + speed: "100G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "59" + lanes: "2:2" + serdes_group: "7" + speed: "100G" + sysport: "59" + type: "eth" + - fec: "KPFEC" + id: "99" + lanes: "4:2" + serdes_group: "7" + speed: "100G" + sysport: "99" + type: "eth" + - fec: "KPFEC" + id: "63" + lanes: "6:2" + serdes_group: "7" + speed: "100G" + sysport: "63" + type: "eth" + - fec: "KPFEC" + id: "101" + lanes: "4:2" + serdes_group: "6" + speed: "100G" + sysport: "101" + type: "eth" + - fec: "KPFEC" + id: "55" + lanes: "6:2" + serdes_group: "6" + speed: "100G" + sysport: "55" + type: "eth" + - fec: "KPFEC" + id: "103" + lanes: "0:2" + serdes_group: "6" + speed: "100G" + sysport: "103" + type: "eth" + - fec: "KPFEC" + id: "51" + lanes: "2:2" + serdes_group: "6" + speed: "100G" + sysport: "51" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:2" + serdes_group: "5" + speed: "100G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "43" + lanes: "2:2" + serdes_group: "5" + speed: "100G" + sysport: "43" + type: "eth" + - fec: "KPFEC" + id: "107" + lanes: "4:2" + serdes_group: "5" + speed: "100G" + sysport: "107" + type: "eth" + - fec: "KPFEC" + id: "47" + lanes: "6:2" + serdes_group: "5" + speed: "100G" + sysport: "47" + type: "eth" + - fec: "KPFEC" + id: "109" + lanes: "4:2" + serdes_group: "4" + speed: "100G" + sysport: "109" + type: "eth" + - fec: "KPFEC" + id: "39" + lanes: "6:2" + serdes_group: "4" + speed: "100G" + sysport: "39" + type: "eth" + - fec: "KPFEC" + id: "111" + lanes: "0:2" + serdes_group: "4" + speed: "100G" + sysport: "111" + type: "eth" + - fec: "KPFEC" + id: "35" + lanes: "2:2" + serdes_group: "4" + speed: "100G" + sysport: "35" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:2" + serdes_group: "3" + speed: "100G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "27" + lanes: "2:2" + serdes_group: "3" + speed: "100G" + sysport: "27" + type: "eth" + - fec: "KPFEC" + id: "115" + lanes: "4:2" + serdes_group: "3" + speed: "100G" + sysport: "115" + type: "eth" + - fec: "KPFEC" + id: "31" + lanes: "6:2" + serdes_group: "3" + speed: "100G" + sysport: "31" + type: "eth" + - fec: "KPFEC" + id: "117" + lanes: "4:2" + serdes_group: "2" + speed: "100G" + sysport: "117" + type: "eth" + - fec: "KPFEC" + id: "23" + lanes: "6:2" + serdes_group: "2" + speed: "100G" + sysport: "23" + type: "eth" + - fec: "KPFEC" + id: "119" + lanes: "0:2" + serdes_group: "2" + speed: "100G" + sysport: "119" + type: "eth" + - fec: "KPFEC" + id: "19" + lanes: "2:2" + serdes_group: "2" + speed: "100G" + sysport: "19" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:2" + serdes_group: "1" + speed: "100G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "11" + lanes: "2:2" + serdes_group: "1" + speed: "100G" + sysport: "11" + type: "eth" + - fec: "KPFEC" + id: "123" + lanes: "4:2" + serdes_group: "1" + speed: "100G" + sysport: "123" + type: "eth" + - fec: "KPFEC" + id: "15" + lanes: "6:2" + serdes_group: "1" + speed: "100G" + sysport: "15" + type: "eth" + - fec: "KPFEC" + id: "125" + lanes: "4:2" + serdes_group: "0" + speed: "100G" + sysport: "125" + type: "eth" + - fec: "KPFEC" + id: "7" + lanes: "6:2" + serdes_group: "0" + speed: "100G" + sysport: "7" + type: "eth" + - fec: "KPFEC" + id: "127" + lanes: "0:2" + serdes_group: "0" + speed: "100G" + sysport: "127" + type: "eth" + - fec: "KPFEC" + id: "3" + lanes: "2:2" + serdes_group: "0" + speed: "100G" + sysport: "3" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + lane_swap: "01234567" + rx_polarity: "01110001" + tx_polarity: "00101001" + - id: "1" + lane_swap: "01234567" + rx_polarity: "11100100" + tx_polarity: "10111111" + - id: "2" + lane_swap: "01234567" + rx_polarity: "00010001" + tx_polarity: "00100010" + - id: "3" + lane_swap: "01234567" + rx_polarity: "11011101" + tx_polarity: "00101010" + - id: "4" + lane_swap: "01234567" + rx_polarity: "10010101" + tx_polarity: "10111110" + - id: "5" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01101000" + - id: "6" + lane_swap: "01234567" + rx_polarity: "01110011" + tx_polarity: "01110110" + - id: "7" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01001000" + - id: "8" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "11000100" + - id: "9" + lane_swap: "01234567" + rx_polarity: "10100100" + tx_polarity: "10001010" + - id: "10" + lane_swap: "01234567" + rx_polarity: "00011101" + tx_polarity: "11000110" + - id: "11" + lane_swap: "01234567" + rx_polarity: "00000101" + tx_polarity: "01000111" + - id: "12" + lane_swap: "01234567" + rx_polarity: "11100000" + tx_polarity: "01111000" + - id: "13" + lane_swap: "01234567" + rx_polarity: "00101111" + tx_polarity: "10011111" + - id: "14" + lane_swap: "01234567" + rx_polarity: "00011000" + tx_polarity: "00101001" + - id: "15" + lane_swap: "01234567" + rx_polarity: "00110110" + tx_polarity: "10110111" + - id: "16" + lane_swap: "01234567" + rx_polarity: "00000111" + tx_polarity: "00101001" + - id: "17" + lane_swap: "01234567" + rx_polarity: "10001000" + tx_polarity: "10100111" + - id: "18" + lane_swap: "01234567" + rx_polarity: "11111110" + tx_polarity: "00011001" + - id: "19" + lane_swap: "01234567" + rx_polarity: "10011010" + tx_polarity: "10010101" + - id: "20" + lane_swap: "01234567" + rx_polarity: "01100000" + tx_polarity: "00101001" + - id: "21" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10010111" + - id: "22" + lane_swap: "01234567" + rx_polarity: "11010011" + tx_polarity: "00101001" + - id: "23" + lane_swap: "01234567" + rx_polarity: "01111011" + tx_polarity: "10110111" + - id: "24" + lane_swap: "01234567" + rx_polarity: "11101011" + tx_polarity: "00101001" + - id: "25" + lane_swap: "01234567" + rx_polarity: "11010111" + tx_polarity: "10110111" + - id: "26" + lane_swap: "01234567" + rx_polarity: "00101101" + tx_polarity: "00100001" + - id: "27" + lane_swap: "01234567" + rx_polarity: "11011001" + tx_polarity: "11000111" + - id: "28" + lane_swap: "01234567" + rx_polarity: "01010011" + tx_polarity: "00100001" + - id: "29" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10110111" + - id: "30" + lane_swap: "01234567" + rx_polarity: "00110001" + tx_polarity: "00101001" + - id: "31" + lane_swap: "01234567" + rx_polarity: "01101101" + tx_polarity: "10110101" + - id: "32" + lane_swap: "01234567" + rx_polarity: "00000000" + tx_polarity: "00000000" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/inno.config.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/inno.config.yaml new file mode 100755 index 00000000000..66e43d312ef --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_128x100G_midstone200i.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/innovium.77700_B b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/port_config.ini b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/port_config.ini new file mode 100644 index 00000000000..9366905c4eb --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/port_config.ini @@ -0,0 +1,131 @@ +# name lanes speed index mtu +Ethernet0 249,250 100000 0 9126 +Ethernet2 251,252 100000 0 9126 +Ethernet4 253,254 100000 1 9126 +Ethernet6 255,256 100000 1 9126 +Ethernet8 245,246 100000 2 9126 +Ethernet10 247,248 100000 2 9126 +Ethernet12 241,242 100000 3 9126 +Ethernet14 243,244 100000 3 9126 +Ethernet16 233,234 100000 4 9126 +Ethernet18 235,236 100000 4 9126 +Ethernet20 237,238 100000 5 9126 +Ethernet22 239,240 100000 5 9126 +Ethernet24 229,230 100000 6 9126 +Ethernet26 231,232 100000 6 9126 +Ethernet28 225,226 100000 7 9126 +Ethernet30 227,228 100000 7 9126 +Ethernet32 217,218 100000 8 9126 +Ethernet34 219,220 100000 8 9126 +Ethernet36 221,222 100000 9 9126 +Ethernet38 223,224 100000 9 9126 +Ethernet40 213,214 100000 10 9126 +Ethernet42 215,216 100000 10 9126 +Ethernet44 209,210 100000 11 9126 +Ethernet46 211,212 100000 11 9126 +Ethernet48 201,202 100000 12 9126 +Ethernet50 203,204 100000 12 9126 +Ethernet52 205,206 100000 13 9126 +Ethernet54 207,208 100000 13 9126 +Ethernet56 197,198 100000 14 9126 +Ethernet58 199,200 100000 14 9126 +Ethernet60 193,194 100000 15 9126 +Ethernet62 195,196 100000 15 9126 +Ethernet64 185,186 100000 16 9126 +Ethernet66 187,188 100000 16 9126 +Ethernet68 189,190 100000 17 9126 +Ethernet70 191,192 100000 17 9126 +Ethernet72 181,182 100000 18 9126 +Ethernet74 183,184 100000 18 9126 +Ethernet76 177,178 100000 19 9126 +Ethernet78 179,180 100000 19 9126 +Ethernet80 169,170 100000 20 9126 +Ethernet82 171,172 100000 20 9126 +Ethernet84 173,174 100000 21 9126 +Ethernet86 175,176 100000 21 9126 +Ethernet88 165,166 100000 22 9126 +Ethernet90 167,168 100000 22 9126 +Ethernet92 161,162 100000 23 9126 +Ethernet94 163,164 100000 23 9126 +Ethernet96 153,154 100000 24 9126 +Ethernet98 155,156 100000 24 9126 +Ethernet100 157,158 100000 25 9126 +Ethernet102 159,160 100000 25 9126 +Ethernet104 149,150 100000 26 9126 +Ethernet106 151,152 100000 26 9126 +Ethernet108 145,146 100000 27 9126 +Ethernet110 147,148 100000 27 9126 +Ethernet112 137,138 100000 28 9126 +Ethernet114 139,140 100000 28 9126 +Ethernet116 141,142 100000 29 9126 +Ethernet118 143,144 100000 29 9126 +Ethernet120 133,134 100000 30 9126 +Ethernet122 135,136 100000 30 9126 +Ethernet124 129,130 100000 31 9126 +Ethernet126 131,132 100000 31 9126 +Ethernet128 121,122 100000 32 9126 +Ethernet130 123,124 100000 32 9126 +Ethernet132 125,126 100000 33 9126 +Ethernet134 127,128 100000 33 9126 +Ethernet136 117,118 100000 34 9126 +Ethernet138 119,120 100000 34 9126 +Ethernet140 113,114 100000 35 9126 +Ethernet142 115,116 100000 35 9126 +Ethernet144 105,106 100000 36 9126 +Ethernet146 107,108 100000 36 9126 +Ethernet148 109,110 100000 37 9126 +Ethernet150 111,112 100000 37 9126 +Ethernet152 101,102 100000 38 9126 +Ethernet154 103,104 100000 38 9126 +Ethernet156 97,98 100000 39 9126 +Ethernet158 99,100 100000 39 9126 +Ethernet160 89,90 100000 40 9126 +Ethernet162 91,92 100000 40 9126 +Ethernet164 93,94 100000 41 9126 +Ethernet166 95,96 100000 41 9126 +Ethernet168 85,86 100000 42 9126 +Ethernet170 87,88 100000 42 9126 +Ethernet172 81,82 100000 43 9126 +Ethernet174 83,84 100000 43 9126 +Ethernet176 73,74 100000 44 9126 +Ethernet178 75,76 100000 44 9126 +Ethernet180 77,78 100000 45 9126 +Ethernet182 79,80 100000 45 9126 +Ethernet184 69,70 100000 46 9126 +Ethernet186 71,72 100000 46 9126 +Ethernet188 65,66 100000 47 9126 +Ethernet190 67,68 100000 47 9126 +Ethernet192 57,58 100000 48 9126 +Ethernet194 59,60 100000 48 9126 +Ethernet196 61,62 100000 49 9126 +Ethernet198 63,64 100000 49 9126 +Ethernet200 53,54 100000 50 9126 +Ethernet202 55,56 100000 50 9126 +Ethernet204 49,50 100000 51 9126 +Ethernet206 51,52 100000 51 9126 +Ethernet208 41,42 100000 52 9126 +Ethernet210 43,44 100000 52 9126 +Ethernet212 45,46 100000 53 9126 +Ethernet214 47,48 100000 53 9126 +Ethernet216 37,38 100000 54 9126 +Ethernet218 39,40 100000 54 9126 +Ethernet220 33,34 100000 55 9126 +Ethernet222 35,36 100000 55 9126 +Ethernet224 25,26 100000 56 9126 +Ethernet226 27,28 100000 56 9126 +Ethernet228 29,30 100000 57 9126 +Ethernet230 31,32 100000 57 9126 +Ethernet232 21,22 100000 58 9126 +Ethernet234 23,24 100000 58 9126 +Ethernet236 17,18 100000 59 9126 +Ethernet238 19,20 100000 59 9126 +Ethernet240 9,10 100000 60 9126 +Ethernet242 11,12 100000 60 9126 +Ethernet244 13,14 100000 61 9126 +Ethernet246 15,16 100000 61 9126 +Ethernet248 5,6 100000 62 9126 +Ethernet250 7,8 100000 62 9126 +Ethernet252 1,2 100000 63 9126 +Ethernet254 3,4 100000 63 9126 +Ethernet256 257 10000 64 9126 +Ethernet257 258 10000 65 9126 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/qos.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/qos.json.j2 new file mode 100755 index 00000000000..733bd51dc86 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 128 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*2)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/sai.profile b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_128x100/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/buffers.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/buffers.json.j2 new file mode 100644 index 00000000000..4fca9cbcd15 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 32 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/config_32x400G_midstone200i.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/config_32x400G_midstone200i.yaml new file mode 100644 index 00000000000..6c387ee17c2 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/config_32x400G_midstone200i.yaml @@ -0,0 +1,429 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_A" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "257" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:8" + serdes_group: "31" + speed: "400G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:8" + serdes_group: "30" + speed: "400G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:8" + serdes_group: "29" + speed: "400G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:8" + serdes_group: "28" + speed: "400G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:8" + serdes_group: "27" + speed: "400G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:8" + serdes_group: "26" + speed: "400G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:8" + serdes_group: "25" + speed: "400G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:8" + serdes_group: "24" + speed: "400G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:8" + serdes_group: "23" + speed: "400G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:8" + serdes_group: "22" + speed: "400G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:8" + serdes_group: "21" + speed: "400G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:8" + serdes_group: "20" + speed: "400G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:8" + serdes_group: "19" + speed: "400G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:8" + serdes_group: "18" + speed: "400G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:8" + serdes_group: "17" + speed: "400G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:8" + serdes_group: "16" + speed: "400G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:8" + serdes_group: "15" + speed: "400G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:8" + serdes_group: "14" + speed: "400G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:8" + serdes_group: "13" + speed: "400G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:8" + serdes_group: "12" + speed: "400G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:8" + serdes_group: "11" + speed: "400G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:8" + serdes_group: "10" + speed: "400G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:8" + serdes_group: "9" + speed: "400G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:8" + serdes_group: "8" + speed: "400G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:8" + serdes_group: "7" + speed: "400G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:8" + serdes_group: "6" + speed: "400G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:8" + serdes_group: "5" + speed: "400G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:8" + serdes_group: "4" + speed: "400G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:8" + serdes_group: "3" + speed: "400G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:8" + serdes_group: "2" + speed: "400G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:8" + serdes_group: "1" + speed: "400G" + sysport: "9" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:8" + serdes_group: "0" + speed: "400G" + sysport: "1" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + lane_swap: "01234567" + rx_polarity: "01110001" + tx_polarity: "00101001" + - id: "1" + lane_swap: "01234567" + rx_polarity: "11100100" + tx_polarity: "10111111" + - id: "2" + lane_swap: "01234567" + rx_polarity: "00010001" + tx_polarity: "00100010" + - id: "3" + lane_swap: "01234567" + rx_polarity: "11011101" + tx_polarity: "00101010" + - id: "4" + lane_swap: "01234567" + rx_polarity: "10010101" + tx_polarity: "10111110" + - id: "5" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01101000" + - id: "6" + lane_swap: "01234567" + rx_polarity: "01110011" + tx_polarity: "01110110" + - id: "7" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01001000" + - id: "8" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "11000100" + - id: "9" + lane_swap: "01234567" + rx_polarity: "10100100" + tx_polarity: "10001010" + - id: "10" + lane_swap: "01234567" + rx_polarity: "00011101" + tx_polarity: "11000110" + - id: "11" + lane_swap: "01234567" + rx_polarity: "00000101" + tx_polarity: "01000111" + - id: "12" + lane_swap: "01234567" + rx_polarity: "11100000" + tx_polarity: "01111000" + - id: "13" + lane_swap: "01234567" + rx_polarity: "00101111" + tx_polarity: "10011111" + - id: "14" + lane_swap: "01234567" + rx_polarity: "00011000" + tx_polarity: "00101001" + - id: "15" + lane_swap: "01234567" + rx_polarity: "00110110" + tx_polarity: "10110111" + - id: "16" + lane_swap: "01234567" + rx_polarity: "00000111" + tx_polarity: "00101001" + - id: "17" + lane_swap: "01234567" + rx_polarity: "10001000" + tx_polarity: "10100111" + - id: "18" + lane_swap: "01234567" + rx_polarity: "11111110" + tx_polarity: "00011001" + - id: "19" + lane_swap: "01234567" + rx_polarity: "10011010" + tx_polarity: "10010101" + - id: "20" + lane_swap: "01234567" + rx_polarity: "01100000" + tx_polarity: "00101001" + - id: "21" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10010111" + - id: "22" + lane_swap: "01234567" + rx_polarity: "11010011" + tx_polarity: "00101001" + - id: "23" + lane_swap: "01234567" + rx_polarity: "01111011" + tx_polarity: "10110111" + - id: "24" + lane_swap: "01234567" + rx_polarity: "11101011" + tx_polarity: "00101001" + - id: "25" + lane_swap: "01234567" + rx_polarity: "11010111" + tx_polarity: "10110111" + - id: "26" + lane_swap: "01234567" + rx_polarity: "00101101" + tx_polarity: "00100001" + - id: "27" + lane_swap: "01234567" + rx_polarity: "11011001" + tx_polarity: "11000111" + - id: "28" + lane_swap: "01234567" + rx_polarity: "01010011" + tx_polarity: "00100001" + - id: "29" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10110111" + - id: "30" + lane_swap: "01234567" + rx_polarity: "00110001" + tx_polarity: "00101001" + - id: "31" + lane_swap: "01234567" + rx_polarity: "01101101" + tx_polarity: "10110101" + - id: "32" + lane_swap: "01234567" + rx_polarity: "00000000" + tx_polarity: "00000000" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/inno.config.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/inno.config.yaml new file mode 100755 index 00000000000..bf1c8f41009 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_32x400G_midstone200i.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_A" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/innovium.77700_A b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/innovium.77700_A new file mode 100644 index 00000000000..84aa4198360 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/innovium.77700_A @@ -0,0 +1,59 @@ +sku: innovium.77700_A + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 6, 5, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 8:0 + ib: 1 + pic_id: 5 + + isg 31: + mode: 8:0 + ib: 0 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/port_config.ini b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/port_config.ini new file mode 100644 index 00000000000..c8ded273cca --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/port_config.ini @@ -0,0 +1,35 @@ +# name lanes speed index mtu fec +Ethernet0 249,250,251,252 400000 0 9126 rs +Ethernet8 241,242,243,244 400000 2 9126 rs +Ethernet16 233,234,235,236 400000 4 9126 rs +Ethernet24 225,226,227,228 400000 6 9126 rs +Ethernet32 217,218,219,220 400000 8 9126 rs +Ethernet40 209,210,211,212 400000 10 9126 rs +Ethernet48 201,202,203,204 400000 12 9126 rs +Ethernet56 193,194,195,196 400000 14 9126 rs +Ethernet64 185,186,187,188 400000 16 9126 rs +Ethernet72 177,178,179,180 400000 18 9126 rs +Ethernet80 169,170,171,172 400000 20 9126 rs +Ethernet88 161,162,163,164 400000 22 9126 rs +Ethernet96 153,154,155,156 400000 24 9126 rs +Ethernet104 145,146,147,148 400000 26 9126 rs +Ethernet112 137,138,139,140 400000 28 9126 rs +Ethernet120 129,130,131,132 400000 30 9126 rs +Ethernet128 121,122,123,124 400000 32 9126 rs +Ethernet136 113,114,115,116 400000 34 9126 rs +Ethernet144 105,106,107,108 400000 36 9126 rs +Ethernet152 97,98,99,100 400000 38 9126 rs +Ethernet160 89,90,91,92 400000 40 9126 rs +Ethernet168 81,82,83,84 400000 42 9126 rs +Ethernet176 73,74,75,76 400000 44 9126 rs +Ethernet184 65,66,67,68 400000 46 9126 rs +Ethernet192 57,58,59,60 400000 48 9126 rs +Ethernet200 49,50,51,52 400000 50 9126 rs +Ethernet208 41,42,43,44 400000 52 9126 rs +Ethernet216 33,34,35,36 400000 54 9126 rs +Ethernet224 25,26,27,28 400000 56 9126 rs +Ethernet232 17,18,19,20 400000 58 9126 rs +Ethernet240 9,10,11,12 400000 60 9126 rs +Ethernet248 1,2,3,4 400000 62 9126 rs +Ethernet256 257 10000 64 9126 none +Ethernet257 258 10000 65 9126 none diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/qos.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/qos.json.j2 new file mode 100755 index 00000000000..6c734d46ff2 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 32 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/sai.profile b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_32x400/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/buffers.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/buffers.json.j2 new file mode 100644 index 00000000000..45cebf3b714 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 64 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/config_64x100G_nrz_midstone200i.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/config_64x100G_nrz_midstone200i.yaml new file mode 100644 index 00000000000..813d012ca3d --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/config_64x100G_nrz_midstone200i.yaml @@ -0,0 +1,785 @@ +ifcs: + options: + log_level: "off" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KRFEC" + id: "249" + lanes: "0:4" + serdes_group: "31" + speed: "100G" + sysport: "249" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "253" + lanes: "4:4" + serdes_group: "31" + speed: "100G" + sysport: "253" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "245" + lanes: "4:4" + serdes_group: "30" + speed: "100G" + sysport: "245" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "241" + lanes: "0:4" + serdes_group: "30" + speed: "100G" + sysport: "241" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "233" + lanes: "0:4" + serdes_group: "29" + speed: "100G" + sysport: "233" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "237" + lanes: "4:4" + serdes_group: "29" + speed: "100G" + sysport: "237" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "229" + lanes: "4:4" + serdes_group: "28" + speed: "100G" + sysport: "229" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "225" + lanes: "0:4" + serdes_group: "28" + speed: "100G" + sysport: "225" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "217" + lanes: "0:4" + serdes_group: "27" + speed: "100G" + sysport: "217" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "221" + lanes: "4:4" + serdes_group: "27" + speed: "100G" + sysport: "221" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "213" + lanes: "4:4" + serdes_group: "26" + speed: "100G" + sysport: "213" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "209" + lanes: "0:4" + serdes_group: "26" + speed: "100G" + sysport: "209" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "201" + lanes: "0:4" + serdes_group: "25" + speed: "100G" + sysport: "201" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "205" + lanes: "4:4" + serdes_group: "25" + speed: "100G" + sysport: "205" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "197" + lanes: "4:4" + serdes_group: "24" + speed: "100G" + sysport: "197" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "193" + lanes: "0:4" + serdes_group: "24" + speed: "100G" + sysport: "193" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "185" + lanes: "0:4" + serdes_group: "23" + speed: "100G" + sysport: "185" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "189" + lanes: "4:4" + serdes_group: "23" + speed: "100G" + sysport: "189" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "181" + lanes: "4:4" + serdes_group: "22" + speed: "100G" + sysport: "181" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "177" + lanes: "0:4" + serdes_group: "22" + speed: "100G" + sysport: "177" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "169" + lanes: "0:4" + serdes_group: "21" + speed: "100G" + sysport: "169" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "173" + lanes: "4:4" + serdes_group: "21" + speed: "100G" + sysport: "173" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "165" + lanes: "4:4" + serdes_group: "20" + speed: "100G" + sysport: "165" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "161" + lanes: "0:4" + serdes_group: "20" + speed: "100G" + sysport: "161" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "153" + lanes: "0:4" + serdes_group: "19" + speed: "100G" + sysport: "153" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "157" + lanes: "4:4" + serdes_group: "19" + speed: "100G" + sysport: "157" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "149" + lanes: "4:4" + serdes_group: "18" + speed: "100G" + sysport: "149" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "145" + lanes: "0:4" + serdes_group: "18" + speed: "100G" + sysport: "145" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "137" + lanes: "0:4" + serdes_group: "17" + speed: "100G" + sysport: "137" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "141" + lanes: "4:4" + serdes_group: "17" + speed: "100G" + sysport: "141" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "133" + lanes: "4:4" + serdes_group: "16" + speed: "100G" + sysport: "133" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "129" + lanes: "0:4" + serdes_group: "16" + speed: "100G" + sysport: "129" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "121" + lanes: "0:4" + serdes_group: "15" + speed: "100G" + sysport: "121" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "125" + lanes: "4:4" + serdes_group: "15" + speed: "100G" + sysport: "125" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "117" + lanes: "4:4" + serdes_group: "14" + speed: "100G" + sysport: "117" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "113" + lanes: "0:4" + serdes_group: "14" + speed: "100G" + sysport: "113" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "105" + lanes: "0:4" + serdes_group: "13" + speed: "100G" + sysport: "105" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "109" + lanes: "4:4" + serdes_group: "13" + speed: "100G" + sysport: "109" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "101" + lanes: "4:4" + serdes_group: "12" + speed: "100G" + sysport: "101" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "97" + lanes: "0:4" + serdes_group: "12" + speed: "100G" + sysport: "97" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "89" + lanes: "0:4" + serdes_group: "11" + speed: "100G" + sysport: "89" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "93" + lanes: "4:4" + serdes_group: "11" + speed: "100G" + sysport: "93" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "85" + lanes: "4:4" + serdes_group: "10" + speed: "100G" + sysport: "85" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "81" + lanes: "0:4" + serdes_group: "10" + speed: "100G" + sysport: "81" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "73" + lanes: "0:4" + serdes_group: "9" + speed: "100G" + sysport: "73" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "77" + lanes: "4:4" + serdes_group: "9" + speed: "100G" + sysport: "77" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "69" + lanes: "4:4" + serdes_group: "8" + speed: "100G" + sysport: "69" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "65" + lanes: "0:4" + serdes_group: "8" + speed: "100G" + sysport: "65" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "57" + lanes: "0:4" + serdes_group: "7" + speed: "100G" + sysport: "57" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "61" + lanes: "4:4" + serdes_group: "7" + speed: "100G" + sysport: "61" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "53" + lanes: "4:4" + serdes_group: "6" + speed: "100G" + sysport: "53" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "49" + lanes: "0:4" + serdes_group: "6" + speed: "100G" + sysport: "49" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "53" + lanes: "0:4" + serdes_group: "5" + speed: "100G" + sysport: "53" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "45" + lanes: "4:4" + serdes_group: "5" + speed: "100G" + sysport: "45" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "37" + lanes: "4:4" + serdes_group: "4" + speed: "100G" + sysport: "37" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "33" + lanes: "0:4" + serdes_group: "4" + speed: "100G" + sysport: "33" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "57" + lanes: "0:4" + serdes_group: "3" + speed: "100G" + sysport: "57" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "29" + lanes: "4:4" + serdes_group: "3" + speed: "100G" + sysport: "29" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "21" + lanes: "4:4" + serdes_group: "2" + speed: "100G" + sysport: "21" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "17" + lanes: "0:4" + serdes_group: "2" + speed: "100G" + sysport: "17" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "61" + lanes: "0:4" + serdes_group: "1" + speed: "100G" + sysport: "61" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "13" + lanes: "4:4" + serdes_group: "1" + speed: "100G" + sysport: "13" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "5" + lanes: "4:4" + serdes_group: "0" + speed: "100G" + sysport: "5" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "1" + lanes: "0:4" + serdes_group: "0" + speed: "100G" + sysport: "1" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + admin_state: "true" + loopback: "none" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + admin_state: "true" + loopback: "none" + isg: + - id: "0" + lane_swap: "01234567" + rx_polarity: "01110001" + tx_polarity: "00101001" + - id: "1" + lane_swap: "01234567" + rx_polarity: "11100100" + tx_polarity: "10111111" + - id: "2" + lane_swap: "01234567" + rx_polarity: "00010001" + tx_polarity: "00100010" + - id: "3" + lane_swap: "01234567" + rx_polarity: "11011101" + tx_polarity: "00101010" + - id: "4" + lane_swap: "01234567" + rx_polarity: "10010101" + tx_polarity: "10111110" + - id: "5" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01101000" + - id: "6" + lane_swap: "01234567" + rx_polarity: "01110011" + tx_polarity: "01110110" + - id: "7" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01001000" + - id: "8" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "11000100" + - id: "9" + lane_swap: "01234567" + rx_polarity: "10100100" + tx_polarity: "10001010" + - id: "10" + lane_swap: "01234567" + rx_polarity: "00011101" + tx_polarity: "11000110" + - id: "11" + lane_swap: "01234567" + rx_polarity: "00000101" + tx_polarity: "01000111" + - id: "12" + lane_swap: "01234567" + rx_polarity: "11100000" + tx_polarity: "01111000" + - id: "13" + lane_swap: "01234567" + rx_polarity: "00101111" + tx_polarity: "10011111" + - id: "14" + lane_swap: "01234567" + rx_polarity: "00011000" + tx_polarity: "00101001" + - id: "15" + lane_swap: "01234567" + rx_polarity: "00110110" + tx_polarity: "10110111" + - id: "16" + lane_swap: "01234567" + rx_polarity: "00000111" + tx_polarity: "00101001" + - id: "17" + lane_swap: "01234567" + rx_polarity: "10001000" + tx_polarity: "10100111" + - id: "18" + lane_swap: "01234567" + rx_polarity: "11111110" + tx_polarity: "00011001" + - id: "19" + lane_swap: "01234567" + rx_polarity: "10011010" + tx_polarity: "10010101" + - id: "20" + lane_swap: "01234567" + rx_polarity: "01100000" + tx_polarity: "00101001" + - id: "21" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10010111" + - id: "22" + lane_swap: "01234567" + rx_polarity: "11010011" + tx_polarity: "00101001" + - id: "23" + lane_swap: "01234567" + rx_polarity: "01111011" + tx_polarity: "10110111" + - id: "24" + lane_swap: "01234567" + rx_polarity: "11101011" + tx_polarity: "00101001" + - id: "25" + lane_swap: "01234567" + rx_polarity: "11010111" + tx_polarity: "10110111" + - id: "26" + lane_swap: "01234567" + rx_polarity: "00101101" + tx_polarity: "00100001" + - id: "27" + lane_swap: "01234567" + rx_polarity: "11011001" + tx_polarity: "11000111" + - id: "28" + lane_swap: "01234567" + rx_polarity: "01010011" + tx_polarity: "00100001" + - id: "29" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10110111" + - id: "30" + lane_swap: "01234567" + rx_polarity: "00110001" + tx_polarity: "00101001" + - id: "31" + lane_swap: "01234567" + rx_polarity: "01101101" + tx_polarity: "10110101" + - id: "32" + lane_swap: "01234567" + rx_polarity: "00000000" + tx_polarity: "00000000" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/inno.config.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/inno.config.yaml new file mode 100755 index 00000000000..7dea4565d8e --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_64x100G_nrz_midstone200i.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/innovium.77700_B b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/port_config.ini b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/port_config.ini new file mode 100644 index 00000000000..cb862ff9b52 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/port_config.ini @@ -0,0 +1,67 @@ +# name lanes speed index mtu +Ethernet0 249,250,251,252 100000 0 9126 +Ethernet4 253,254,255,256 100000 1 9126 +Ethernet8 245,246,247,248 100000 2 9126 +Ethernet12 241,242,243,244 100000 3 9126 +Ethernet16 233,234,235,236 100000 4 9126 +Ethernet20 237,238,239,240 100000 5 9126 +Ethernet24 229,230,231,232 100000 6 9126 +Ethernet28 225,226,227,228 100000 7 9126 +Ethernet32 217,218,219,220 100000 8 9126 +Ethernet36 221,222,223,224 100000 9 9126 +Ethernet40 213,214,215,216 100000 10 9126 +Ethernet44 209,210,211,212 100000 11 9126 +Ethernet48 201,202,203,204 100000 12 9126 +Ethernet52 205,206,207,208 100000 13 9126 +Ethernet56 197,198,199,200 100000 14 9126 +Ethernet60 193,194,195,196 100000 15 9126 +Ethernet64 185,186,187,188 100000 16 9126 +Ethernet68 189,190,191,192 100000 17 9126 +Ethernet72 181,182,183,184 100000 18 9126 +Ethernet76 177,178,179,180 100000 19 9126 +Ethernet80 169,170,171,172 100000 20 9126 +Ethernet84 173,174,175,176 100000 21 9126 +Ethernet88 165,166,167,168 100000 22 9126 +Ethernet92 161,162,163,164 100000 23 9126 +Ethernet96 153,154,155,156 100000 24 9126 +Ethernet100 157,158,159,160 100000 25 9126 +Ethernet104 149,150,151,152 100000 26 9126 +Ethernet108 145,146,147,148 100000 27 9126 +Ethernet112 137,138,139,140 100000 28 9126 +Ethernet116 141,142,143,144 100000 29 9126 +Ethernet120 133,134,135,136 100000 30 9126 +Ethernet124 129,130,131,132 100000 31 9126 +Ethernet128 121,122,123,124 100000 32 9126 +Ethernet132 125,126,127,128 100000 33 9126 +Ethernet136 117,118,119,120 100000 34 9126 +Ethernet140 113,114,115,116 100000 35 9126 +Ethernet144 105,106,107,108 100000 36 9126 +Ethernet148 109,110,111,112 100000 37 9126 +Ethernet152 101,102,103,104 100000 38 9126 +Ethernet156 97,98,99,100 100000 39 9126 +Ethernet160 89,90,91,92 100000 40 9126 +Ethernet164 93,94,95,96 100000 41 9126 +Ethernet168 85,86,87,88 100000 42 9126 +Ethernet172 81,82,83,84 100000 43 9126 +Ethernet176 73,74,75,76 100000 44 9126 +Ethernet180 77,78,79,80 100000 45 9126 +Ethernet184 69,70,71,72 100000 46 9126 +Ethernet188 65,66,67,68 100000 47 9126 +Ethernet192 57,58,59,60 100000 48 9126 +Ethernet196 61,62,63,64 100000 49 9126 +Ethernet200 53,54,55,56 100000 50 9126 +Ethernet204 49,50,51,52 100000 51 9126 +Ethernet208 41,42,43,44 100000 52 9126 +Ethernet212 45,46,47,48 100000 53 9126 +Ethernet216 37,38,39,40 100000 54 9126 +Ethernet220 33,34,35,36 100000 55 9126 +Ethernet224 25,26,27,28 100000 56 9126 +Ethernet228 29,30,31,32 100000 57 9126 +Ethernet232 21,22,23,24 100000 58 9126 +Ethernet236 17,18,19,20 100000 59 9126 +Ethernet240 9,10,11,12 100000 60 9126 +Ethernet244 13,14,15,16 100000 61 9126 +Ethernet248 5,6,7,8 100000 62 9126 +Ethernet252 1,2,3,4 100000 63 9126 +Ethernet256 257 10000 64 9126 +Ethernet257 258 10000 65 9126 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/qos.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/qos.json.j2 new file mode 100755 index 00000000000..16f9b42a216 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 64 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/sai.profile b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/buffers.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/buffers.json.j2 new file mode 100644 index 00000000000..0285e389fd6 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/buffers.json.j2 @@ -0,0 +1,121 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_speed = '100G' %} +{% set default_ports_num = 32 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/config_64x100G_nrz_midstone200i.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/config_64x100G_nrz_midstone200i.yaml new file mode 100644 index 00000000000..8fb6a114a46 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/config_64x100G_nrz_midstone200i.yaml @@ -0,0 +1,767 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "bootstrap_lossless" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "65" + type: "cpu" + - fec: "KRFEC" + id: "1" + lanes: "0:4" + serdes_group: "31" + speed: "100G" + sysport: "1" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "2" + lanes: "4:4" + serdes_group: "31" + speed: "100G" + sysport: "2" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "3" + lanes: "4:4" + serdes_group: "30" + speed: "100G" + sysport: "3" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "4" + lanes: "0:4" + serdes_group: "30" + speed: "100G" + sysport: "4" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "5" + lanes: "0:4" + serdes_group: "29" + speed: "100G" + sysport: "5" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "6" + lanes: "4:4" + serdes_group: "29" + speed: "100G" + sysport: "6" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "7" + lanes: "4:4" + serdes_group: "28" + speed: "100G" + sysport: "7" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "8" + lanes: "0:4" + serdes_group: "28" + speed: "100G" + sysport: "8" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "9" + lanes: "0:4" + serdes_group: "27" + speed: "100G" + sysport: "9" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "10" + lanes: "4:4" + serdes_group: "27" + speed: "100G" + sysport: "10" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "11" + lanes: "4:4" + serdes_group: "26" + speed: "100G" + sysport: "11" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "12" + lanes: "0:4" + serdes_group: "26" + speed: "100G" + sysport: "12" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "13" + lanes: "0:4" + serdes_group: "25" + speed: "100G" + sysport: "13" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "14" + lanes: "4:4" + serdes_group: "25" + speed: "100G" + sysport: "14" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "15" + lanes: "4:4" + serdes_group: "24" + speed: "100G" + sysport: "15" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "16" + lanes: "0:4" + serdes_group: "24" + speed: "100G" + sysport: "16" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "17" + lanes: "0:4" + serdes_group: "23" + speed: "100G" + sysport: "17" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "18" + lanes: "4:4" + serdes_group: "23" + speed: "100G" + sysport: "18" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "19" + lanes: "4:4" + serdes_group: "22" + speed: "100G" + sysport: "19" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "20" + lanes: "0:4" + serdes_group: "22" + speed: "100G" + sysport: "20" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "21" + lanes: "0:4" + serdes_group: "21" + speed: "100G" + sysport: "21" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "22" + lanes: "4:4" + serdes_group: "21" + speed: "100G" + sysport: "22" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "23" + lanes: "4:4" + serdes_group: "20" + speed: "100G" + sysport: "23" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "24" + lanes: "0:4" + serdes_group: "20" + speed: "100G" + sysport: "24" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "25" + lanes: "0:4" + serdes_group: "19" + speed: "100G" + sysport: "25" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "26" + lanes: "4:4" + serdes_group: "19" + speed: "100G" + sysport: "26" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "27" + lanes: "4:4" + serdes_group: "18" + speed: "100G" + sysport: "27" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "28" + lanes: "0:4" + serdes_group: "18" + speed: "100G" + sysport: "28" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "29" + lanes: "0:4" + serdes_group: "17" + speed: "100G" + sysport: "29" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "30" + lanes: "4:4" + serdes_group: "17" + speed: "100G" + sysport: "30" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "31" + lanes: "4:4" + serdes_group: "16" + speed: "100G" + sysport: "31" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "32" + lanes: "0:4" + serdes_group: "16" + speed: "100G" + sysport: "32" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "33" + lanes: "0:4" + serdes_group: "15" + speed: "100G" + sysport: "33" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "34" + lanes: "4:4" + serdes_group: "15" + speed: "100G" + sysport: "34" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "35" + lanes: "4:4" + serdes_group: "14" + speed: "100G" + sysport: "35" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "36" + lanes: "0:4" + serdes_group: "14" + speed: "100G" + sysport: "36" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "37" + lanes: "0:4" + serdes_group: "13" + speed: "100G" + sysport: "37" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "38" + lanes: "4:4" + serdes_group: "13" + speed: "100G" + sysport: "38" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "39" + lanes: "4:4" + serdes_group: "12" + speed: "100G" + sysport: "39" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "40" + lanes: "0:4" + serdes_group: "12" + speed: "100G" + sysport: "40" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "41" + lanes: "0:4" + serdes_group: "11" + speed: "100G" + sysport: "41" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "42" + lanes: "4:4" + serdes_group: "11" + speed: "100G" + sysport: "42" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "43" + lanes: "4:4" + serdes_group: "10" + speed: "100G" + sysport: "43" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "44" + lanes: "0:4" + serdes_group: "10" + speed: "100G" + sysport: "44" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "45" + lanes: "0:4" + serdes_group: "9" + speed: "100G" + sysport: "45" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "46" + lanes: "4:4" + serdes_group: "9" + speed: "100G" + sysport: "46" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "47" + lanes: "4:4" + serdes_group: "8" + speed: "100G" + sysport: "47" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "48" + lanes: "0:4" + serdes_group: "8" + speed: "100G" + sysport: "48" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "49" + lanes: "0:4" + serdes_group: "7" + speed: "100G" + sysport: "49" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "50" + lanes: "4:4" + serdes_group: "7" + speed: "100G" + sysport: "50" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "51" + lanes: "4:4" + serdes_group: "6" + speed: "100G" + sysport: "51" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "52" + lanes: "0:4" + serdes_group: "6" + speed: "100G" + sysport: "52" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "53" + lanes: "0:4" + serdes_group: "5" + speed: "100G" + sysport: "53" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "54" + lanes: "4:4" + serdes_group: "5" + speed: "100G" + sysport: "54" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "55" + lanes: "4:4" + serdes_group: "4" + speed: "100G" + sysport: "55" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "56" + lanes: "0:4" + serdes_group: "4" + speed: "100G" + sysport: "56" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "57" + lanes: "0:4" + serdes_group: "3" + speed: "100G" + sysport: "57" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "58" + lanes: "4:4" + serdes_group: "3" + speed: "100G" + sysport: "58" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "59" + lanes: "4:4" + serdes_group: "2" + speed: "100G" + sysport: "59" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "60" + lanes: "0:4" + serdes_group: "2" + speed: "100G" + sysport: "60" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "61" + lanes: "0:4" + serdes_group: "1" + speed: "100G" + sysport: "61" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "62" + lanes: "4:4" + serdes_group: "1" + speed: "100G" + sysport: "62" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "63" + lanes: "4:4" + serdes_group: "0" + speed: "100G" + sysport: "63" + type: "eth" + admin_state: "true" + loopback: "none" + - fec: "KRFEC" + id: "64" + lanes: "0:4" + serdes_group: "0" + speed: "100G" + sysport: "64" + type: "eth" + admin_state: "true" + loopback: "none" + isg: + - id: "0" + lane_swap: "01234567" + rx_polarity: "01110001" + tx_polarity: "00101001" + - id: "1" + lane_swap: "01234567" + rx_polarity: "11100100" + tx_polarity: "10111111" + - id: "2" + lane_swap: "01234567" + rx_polarity: "00010001" + tx_polarity: "00100010" + - id: "3" + lane_swap: "01234567" + rx_polarity: "11011101" + tx_polarity: "00101010" + - id: "4" + lane_swap: "01234567" + rx_polarity: "10010101" + tx_polarity: "10111110" + - id: "5" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01101000" + - id: "6" + lane_swap: "01234567" + rx_polarity: "01110011" + tx_polarity: "01110110" + - id: "7" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01001000" + - id: "8" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "11000100" + - id: "9" + lane_swap: "01234567" + rx_polarity: "10100100" + tx_polarity: "10001010" + - id: "10" + lane_swap: "01234567" + rx_polarity: "00011101" + tx_polarity: "11000110" + - id: "11" + lane_swap: "01234567" + rx_polarity: "00000101" + tx_polarity: "01000111" + - id: "12" + lane_swap: "01234567" + rx_polarity: "11100000" + tx_polarity: "01111000" + - id: "13" + lane_swap: "01234567" + rx_polarity: "00101111" + tx_polarity: "10011111" + - id: "14" + lane_swap: "01234567" + rx_polarity: "00011000" + tx_polarity: "00101001" + - id: "15" + lane_swap: "01234567" + rx_polarity: "00110110" + tx_polarity: "10110111" + - id: "16" + lane_swap: "01234567" + rx_polarity: "00000111" + tx_polarity: "00101001" + - id: "17" + lane_swap: "01234567" + rx_polarity: "10001000" + tx_polarity: "10100111" + - id: "18" + lane_swap: "01234567" + rx_polarity: "11111110" + tx_polarity: "00011001" + - id: "19" + lane_swap: "01234567" + rx_polarity: "10011010" + tx_polarity: "10010101" + - id: "20" + lane_swap: "01234567" + rx_polarity: "01100000" + tx_polarity: "00101001" + - id: "21" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10010111" + - id: "22" + lane_swap: "01234567" + rx_polarity: "11010011" + tx_polarity: "00101001" + - id: "23" + lane_swap: "01234567" + rx_polarity: "01111011" + tx_polarity: "10110111" + - id: "24" + lane_swap: "01234567" + rx_polarity: "11101011" + tx_polarity: "00101001" + - id: "25" + lane_swap: "01234567" + rx_polarity: "11010111" + tx_polarity: "10110111" + - id: "26" + lane_swap: "01234567" + rx_polarity: "00101101" + tx_polarity: "00100001" + - id: "27" + lane_swap: "01234567" + rx_polarity: "11011001" + tx_polarity: "11000111" + - id: "28" + lane_swap: "01234567" + rx_polarity: "01010011" + tx_polarity: "00100001" + - id: "29" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10110111" + - id: "30" + lane_swap: "01234567" + rx_polarity: "00110001" + tx_polarity: "00101001" + - id: "31" + lane_swap: "01234567" + rx_polarity: "01101101" + tx_polarity: "10110101" + - id: "32" + lane_swap: "01234567" + rx_polarity: "00000000" + tx_polarity: "00000000" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/inno.config.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/inno.config.yaml new file mode 100755 index 00000000000..490de1ca3fd --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_64x100G_nrz_midstone200i.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/innovium.77700_B b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/port_config.ini b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/port_config.ini new file mode 100644 index 00000000000..462950d390b --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/port_config.ini @@ -0,0 +1,65 @@ +# name lanes speed mtu +Ethernet0 249,250,251,252 100000 9126 +Ethernet4 253,254,255,256 100000 9126 +Ethernet8 245,246,247,248 100000 9126 +Ethernet12 241,242,243,244 100000 9126 +Ethernet16 233,234,235,236 100000 9126 +Ethernet20 237,238,239,240 100000 9126 +Ethernet24 229,230,231,232 100000 9126 +Ethernet28 225,226,227,228 100000 9126 +Ethernet32 217,218,219,220 100000 9126 +Ethernet36 221,222,223,224 100000 9126 +Ethernet40 213,214,215,216 100000 9126 +Ethernet44 209,210,211,212 100000 9126 +Ethernet48 201,202,203,204 100000 9126 +Ethernet52 205,206,207,208 100000 9126 +Ethernet56 197,198,199,200 100000 9126 +Ethernet60 193,194,195,196 100000 9126 +Ethernet64 185,186,187,188 100000 9126 +Ethernet68 189,190,191,192 100000 9126 +Ethernet72 181,182,183,184 100000 9126 +Ethernet76 177,178,179,180 100000 9126 +Ethernet80 169,170,171,172 100000 9126 +Ethernet84 173,174,175,176 100000 9126 +Ethernet88 165,166,167,168 100000 9126 +Ethernet92 161,162,163,164 100000 9126 +Ethernet96 153,154,155,156 100000 9126 +Ethernet100 157,158,159,160 100000 9126 +Ethernet104 149,150,151,152 100000 9126 +Ethernet108 145,146,147,148 100000 9126 +Ethernet112 137,138,139,140 100000 9126 +Ethernet116 141,142,143,144 100000 9126 +Ethernet120 133,134,135,136 100000 9126 +Ethernet124 129,130,131,132 100000 9126 +Ethernet128 121,122,123,124 100000 9126 +Ethernet132 125,126,127,128 100000 9126 +Ethernet136 117,118,119,120 100000 9126 +Ethernet140 113,114,115,116 100000 9126 +Ethernet144 105,106,107,108 100000 9126 +Ethernet148 109,110,111,112 100000 9126 +Ethernet152 101,102,103,104 100000 9126 +Ethernet156 97,98,99,100 100000 9126 +Ethernet160 89,90,91,92 100000 9126 +Ethernet164 93,94,95,96 100000 9126 +Ethernet168 85,86,87,88 100000 9126 +Ethernet172 81,82,83,84 100000 9126 +Ethernet176 73,74,75,76 100000 9126 +Ethernet180 77,78,79,80 100000 9126 +Ethernet184 69,70,71,72 100000 9126 +Ethernet188 65,66,67,68 100000 9126 +Ethernet192 57,58,59,60 100000 9126 +Ethernet196 61,62,63,64 100000 9126 +Ethernet200 53,54,55,56 100000 9126 +Ethernet204 49,50,51,52 100000 9126 +Ethernet208 41,42,43,44 100000 9126 +Ethernet212 45,46,47,48 100000 9126 +Ethernet216 37,38,39,40 100000 9126 +Ethernet220 33,34,35,36 100000 9126 +Ethernet224 25,26,27,28 100000 9126 +Ethernet228 29,30,31,32 100000 9126 +Ethernet232 21,22,23,24 100000 9126 +Ethernet236 17,18,19,20 100000 9126 +Ethernet240 9,10,11,12 100000 9126 +Ethernet244 13,14,15,16 100000 9126 +Ethernet248 5,6,7,8 100000 9126 +Ethernet252 1,2,3,4 100000 9126 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/qos.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/qos.json.j2 new file mode 100755 index 00000000000..b22aa6ef599 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/qos.json.j2 @@ -0,0 +1,102 @@ +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "Ethernet180,Ethernet8,Ethernet44,Ethernet184,Ethernet188,Ethernet0,Ethernet4,Ethernet108,Ethernet248,Ethernet100,Ethernet244,Ethernet128,Ethernet104,Ethernet240,Ethernet40,Ethernet228,Ethernet96,Ethernet168,Ethernet148,Ethernet204,Ethernet120,Ethernet220,Ethernet144,Ethernet208,Ethernet160,Ethernet224,Ethernet140,Ethernet56,Ethernet164,Ethernet76,Ethernet72,Ethernet32,Ethernet16,Ethernet36,Ethernet12,Ethernet196,Ethernet28,Ethernet192,Ethernet200,Ethernet124,Ethernet24,Ethernet116,Ethernet80,Ethernet112,Ethernet84,Ethernet152,Ethernet136,Ethernet156,Ethernet92,Ethernet132,Ethernet48,Ethernet232,Ethernet172,Ethernet216,Ethernet236,Ethernet176,Ethernet212,Ethernet64,Ethernet88,Ethernet60,Ethernet52,Ethernet20,Ethernet68,Ethernet252": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/sai.profile b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x100nrz/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/buffers.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/buffers.json.j2 new file mode 100644 index 00000000000..45cebf3b714 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 64 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/config_64x200G_midstone200i.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/config_64x200G_midstone200i.yaml new file mode 100644 index 00000000000..7133de54e49 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/config_64x200G_midstone200i.yaml @@ -0,0 +1,653 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:4" + serdes_group: "31" + speed: "200G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "253" + lanes: "4:4" + serdes_group: "31" + speed: "200G" + sysport: "253" + type: "eth" + - fec: "KPFEC" + id: "245" + lanes: "4:4" + serdes_group: "30" + speed: "200G" + sysport: "245" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:4" + serdes_group: "30" + speed: "200G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:4" + serdes_group: "29" + speed: "200G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "237" + lanes: "4:4" + serdes_group: "29" + speed: "200G" + sysport: "237" + type: "eth" + - fec: "KPFEC" + id: "229" + lanes: "4:4" + serdes_group: "28" + speed: "200G" + sysport: "229" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:4" + serdes_group: "28" + speed: "200G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:4" + serdes_group: "27" + speed: "200G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "221" + lanes: "4:4" + serdes_group: "27" + speed: "200G" + sysport: "221" + type: "eth" + - fec: "KPFEC" + id: "213" + lanes: "4:4" + serdes_group: "26" + speed: "200G" + sysport: "213" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:4" + serdes_group: "26" + speed: "200G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:4" + serdes_group: "25" + speed: "200G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "205" + lanes: "4:4" + serdes_group: "25" + speed: "200G" + sysport: "205" + type: "eth" + - fec: "KPFEC" + id: "197" + lanes: "4:4" + serdes_group: "24" + speed: "200G" + sysport: "197" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:4" + serdes_group: "24" + speed: "200G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:4" + serdes_group: "23" + speed: "200G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "189" + lanes: "4:4" + serdes_group: "23" + speed: "200G" + sysport: "189" + type: "eth" + - fec: "KPFEC" + id: "181" + lanes: "4:4" + serdes_group: "22" + speed: "200G" + sysport: "181" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:4" + serdes_group: "22" + speed: "200G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:4" + serdes_group: "21" + speed: "200G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "173" + lanes: "4:4" + serdes_group: "21" + speed: "200G" + sysport: "173" + type: "eth" + - fec: "KPFEC" + id: "165" + lanes: "4:4" + serdes_group: "20" + speed: "200G" + sysport: "165" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:4" + serdes_group: "20" + speed: "200G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:4" + serdes_group: "19" + speed: "200G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "157" + lanes: "4:4" + serdes_group: "19" + speed: "200G" + sysport: "157" + type: "eth" + - fec: "KPFEC" + id: "149" + lanes: "4:4" + serdes_group: "18" + speed: "200G" + sysport: "149" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:4" + serdes_group: "18" + speed: "200G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:4" + serdes_group: "17" + speed: "200G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "141" + lanes: "4:4" + serdes_group: "17" + speed: "200G" + sysport: "141" + type: "eth" + - fec: "KPFEC" + id: "133" + lanes: "4:4" + serdes_group: "16" + speed: "200G" + sysport: "133" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:4" + serdes_group: "16" + speed: "200G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:4" + serdes_group: "15" + speed: "200G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "125" + lanes: "4:4" + serdes_group: "15" + speed: "200G" + sysport: "125" + type: "eth" + - fec: "KPFEC" + id: "117" + lanes: "4:4" + serdes_group: "14" + speed: "200G" + sysport: "117" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:4" + serdes_group: "14" + speed: "200G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:4" + serdes_group: "13" + speed: "200G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "109" + lanes: "4:4" + serdes_group: "13" + speed: "200G" + sysport: "109" + type: "eth" + - fec: "KPFEC" + id: "101" + lanes: "4:4" + serdes_group: "12" + speed: "200G" + sysport: "101" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:4" + serdes_group: "12" + speed: "200G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:4" + serdes_group: "11" + speed: "200G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "93" + lanes: "4:4" + serdes_group: "11" + speed: "200G" + sysport: "93" + type: "eth" + - fec: "KPFEC" + id: "85" + lanes: "4:4" + serdes_group: "10" + speed: "200G" + sysport: "85" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:4" + serdes_group: "10" + speed: "200G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:4" + serdes_group: "9" + speed: "200G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "77" + lanes: "4:4" + serdes_group: "9" + speed: "200G" + sysport: "77" + type: "eth" + - fec: "KPFEC" + id: "69" + lanes: "4:4" + serdes_group: "8" + speed: "200G" + sysport: "69" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:4" + serdes_group: "8" + speed: "200G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:4" + serdes_group: "7" + speed: "200G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "61" + lanes: "4:4" + serdes_group: "7" + speed: "200G" + sysport: "61" + type: "eth" + - fec: "KPFEC" + id: "53" + lanes: "4:4" + serdes_group: "6" + speed: "200G" + sysport: "53" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:4" + serdes_group: "6" + speed: "200G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:4" + serdes_group: "5" + speed: "200G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "45" + lanes: "4:4" + serdes_group: "5" + speed: "200G" + sysport: "45" + type: "eth" + - fec: "KPFEC" + id: "37" + lanes: "4:4" + serdes_group: "4" + speed: "200G" + sysport: "37" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:4" + serdes_group: "4" + speed: "200G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:4" + serdes_group: "3" + speed: "200G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "29" + lanes: "4:4" + serdes_group: "3" + speed: "200G" + sysport: "29" + type: "eth" + - fec: "KPFEC" + id: "21" + lanes: "4:4" + serdes_group: "2" + speed: "200G" + sysport: "21" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:4" + serdes_group: "2" + speed: "200G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:4" + serdes_group: "1" + speed: "200G" + sysport: "9" + type: "eth" + - fec: "KPFEC" + id: "13" + lanes: "4:4" + serdes_group: "1" + speed: "200G" + sysport: "13" + type: "eth" + - fec: "KPFEC" + id: "5" + lanes: "4:4" + serdes_group: "0" + speed: "200G" + sysport: "5" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:4" + serdes_group: "0" + speed: "200G" + sysport: "1" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 0" + isg: + - id: "0" + lane_swap: "01234567" + rx_polarity: "01110001" + tx_polarity: "00101001" + - id: "1" + lane_swap: "01234567" + rx_polarity: "11100100" + tx_polarity: "10111111" + - id: "2" + lane_swap: "01234567" + rx_polarity: "00010001" + tx_polarity: "00100010" + - id: "3" + lane_swap: "01234567" + rx_polarity: "11011101" + tx_polarity: "00101010" + - id: "4" + lane_swap: "01234567" + rx_polarity: "10010101" + tx_polarity: "10111110" + - id: "5" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01101000" + - id: "6" + lane_swap: "01234567" + rx_polarity: "01110011" + tx_polarity: "01110110" + - id: "7" + lane_swap: "01234567" + rx_polarity: "10111001" + tx_polarity: "01001000" + - id: "8" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "11000100" + - id: "9" + lane_swap: "01234567" + rx_polarity: "10100100" + tx_polarity: "10001010" + - id: "10" + lane_swap: "01234567" + rx_polarity: "00011101" + tx_polarity: "11000110" + - id: "11" + lane_swap: "01234567" + rx_polarity: "00000101" + tx_polarity: "01000111" + - id: "12" + lane_swap: "01234567" + rx_polarity: "11100000" + tx_polarity: "01111000" + - id: "13" + lane_swap: "01234567" + rx_polarity: "00101111" + tx_polarity: "10011111" + - id: "14" + lane_swap: "01234567" + rx_polarity: "00011000" + tx_polarity: "00101001" + - id: "15" + lane_swap: "01234567" + rx_polarity: "00110110" + tx_polarity: "10110111" + - id: "16" + lane_swap: "01234567" + rx_polarity: "00000111" + tx_polarity: "00101001" + - id: "17" + lane_swap: "01234567" + rx_polarity: "10001000" + tx_polarity: "10100111" + - id: "18" + lane_swap: "01234567" + rx_polarity: "11111110" + tx_polarity: "00011001" + - id: "19" + lane_swap: "01234567" + rx_polarity: "10011010" + tx_polarity: "10010101" + - id: "20" + lane_swap: "01234567" + rx_polarity: "01100000" + tx_polarity: "00101001" + - id: "21" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10010111" + - id: "22" + lane_swap: "01234567" + rx_polarity: "11010011" + tx_polarity: "00101001" + - id: "23" + lane_swap: "01234567" + rx_polarity: "01111011" + tx_polarity: "10110111" + - id: "24" + lane_swap: "01234567" + rx_polarity: "11101011" + tx_polarity: "00101001" + - id: "25" + lane_swap: "01234567" + rx_polarity: "11010111" + tx_polarity: "10110111" + - id: "26" + lane_swap: "01234567" + rx_polarity: "00101101" + tx_polarity: "00100001" + - id: "27" + lane_swap: "01234567" + rx_polarity: "11011001" + tx_polarity: "11000111" + - id: "28" + lane_swap: "01234567" + rx_polarity: "01010011" + tx_polarity: "00100001" + - id: "29" + lane_swap: "01234567" + rx_polarity: "01111001" + tx_polarity: "10110111" + - id: "30" + lane_swap: "01234567" + rx_polarity: "00110001" + tx_polarity: "00101001" + - id: "31" + lane_swap: "01234567" + rx_polarity: "01101101" + tx_polarity: "10110101" + - id: "32" + lane_swap: "01234567" + rx_polarity: "00000000" + tx_polarity: "00000000" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/inno.config.yaml b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/inno.config.yaml new file mode 100755 index 00000000000..970a5830339 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_64x200G_midstone200i.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/innovium.77700_B b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/port_config.ini b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/port_config.ini new file mode 100644 index 00000000000..3dcbf72bc32 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/port_config.ini @@ -0,0 +1,67 @@ +# name lanes speed index mtu fec +Ethernet0 249,250,251,252 200000 0 9126 rs +Ethernet4 253,254,255,256 200000 1 9126 rs +Ethernet8 245,246,247,248 200000 2 9126 rs +Ethernet12 241,242,243,244 200000 3 9126 rs +Ethernet16 233,234,235,236 200000 4 9126 rs +Ethernet20 237,238,239,240 200000 5 9126 rs +Ethernet24 229,230,231,232 200000 6 9126 rs +Ethernet28 225,226,227,228 200000 7 9126 rs +Ethernet32 217,218,219,220 200000 8 9126 rs +Ethernet36 221,222,223,224 200000 9 9126 rs +Ethernet40 213,214,215,216 200000 10 9126 rs +Ethernet44 209,210,211,212 200000 11 9126 rs +Ethernet48 201,202,203,204 200000 12 9126 rs +Ethernet52 205,206,207,208 200000 13 9126 rs +Ethernet56 197,198,199,200 200000 14 9126 rs +Ethernet60 193,194,195,196 200000 15 9126 rs +Ethernet64 185,186,187,188 200000 16 9126 rs +Ethernet68 189,190,191,192 200000 17 9126 rs +Ethernet72 181,182,183,184 200000 18 9126 rs +Ethernet76 177,178,179,180 200000 19 9126 rs +Ethernet80 169,170,171,172 200000 20 9126 rs +Ethernet84 173,174,175,176 200000 21 9126 rs +Ethernet88 165,166,167,168 200000 22 9126 rs +Ethernet92 161,162,163,164 200000 23 9126 rs +Ethernet96 153,154,155,156 200000 24 9126 rs +Ethernet100 157,158,159,160 200000 25 9126 rs +Ethernet104 149,150,151,152 200000 26 9126 rs +Ethernet108 145,146,147,148 200000 27 9126 rs +Ethernet112 137,138,139,140 200000 28 9126 rs +Ethernet116 141,142,143,144 200000 29 9126 rs +Ethernet120 133,134,135,136 200000 30 9126 rs +Ethernet124 129,130,131,132 200000 31 9126 rs +Ethernet128 121,122,123,124 200000 32 9126 rs +Ethernet132 125,126,127,128 200000 33 9126 rs +Ethernet136 117,118,119,120 200000 34 9126 rs +Ethernet140 113,114,115,116 200000 35 9126 rs +Ethernet144 105,106,107,108 200000 36 9126 rs +Ethernet148 109,110,111,112 200000 37 9126 rs +Ethernet152 101,102,103,104 200000 38 9126 rs +Ethernet156 97,98,99,100 200000 39 9126 rs +Ethernet160 89,90,91,92 200000 40 9126 rs +Ethernet164 93,94,95,96 200000 41 9126 rs +Ethernet168 85,86,87,88 200000 42 9126 rs +Ethernet172 81,82,83,84 200000 43 9126 rs +Ethernet176 73,74,75,76 200000 44 9126 rs +Ethernet180 77,78,79,80 200000 45 9126 rs +Ethernet184 69,70,71,72 200000 46 9126 rs +Ethernet188 65,66,67,68 200000 47 9126 rs +Ethernet192 57,58,59,60 200000 48 9126 rs +Ethernet196 61,62,63,64 200000 49 9126 rs +Ethernet200 53,54,55,56 200000 50 9126 rs +Ethernet204 49,50,51,52 200000 51 9126 rs +Ethernet208 41,42,43,44 200000 52 9126 rs +Ethernet212 45,46,47,48 200000 53 9126 rs +Ethernet216 37,38,39,40 200000 54 9126 rs +Ethernet220 33,34,35,36 200000 55 9126 rs +Ethernet224 25,26,27,28 200000 56 9126 rs +Ethernet228 29,30,31,32 200000 57 9126 rs +Ethernet232 21,22,23,24 200000 58 9126 rs +Ethernet236 17,18,19,20 200000 59 9126 rs +Ethernet240 9,10,11,12 200000 60 9126 rs +Ethernet244 13,14,15,16 200000 61 9126 rs +Ethernet248 5,6,7,8 200000 62 9126 rs +Ethernet252 1,2,3,4 200000 63 9126 rs +Ethernet256 257 10000 64 9126 none +Ethernet257 258 10000 65 9126 none diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/qos.json.j2 b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/qos.json.j2 new file mode 100755 index 00000000000..16f9b42a216 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 64 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/sai.profile b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/Midstone-200i_64x200/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/celestica/x86_64-cel_midstone-r0/default_sku b/device/celestica/x86_64-cel_midstone-r0/default_sku new file mode 100755 index 00000000000..6fe6e28064b --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/default_sku @@ -0,0 +1 @@ +Midstone-200i t1 diff --git a/generic/platform.conf b/device/celestica/x86_64-cel_midstone-r0/fancontrol old mode 100644 new mode 100755 similarity index 100% rename from generic/platform.conf rename to device/celestica/x86_64-cel_midstone-r0/fancontrol diff --git a/device/celestica/x86_64-cel_midstone-r0/installer.conf b/device/celestica/x86_64-cel_midstone-r0/installer.conf new file mode 100755 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/celestica/x86_64-cel_midstone-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_midstone-r0/plugins/eeprom.py new file mode 100755 index 00000000000..86e7f1b2af1 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica Midstone-200i +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/celestica/x86_64-cel_midstone-r0/plugins/psuutil.py b/device/celestica/x86_64-cel_midstone-r0/plugins/psuutil.py new file mode 100644 index 00000000000..4e6c5eec5d8 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path +import subprocess + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + status = 1 + return status == 1 + + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + status = 1 + return status == 1 + diff --git a/device/celestica/x86_64-cel_midstone-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_midstone-r0/plugins/sfputil.py new file mode 100755 index 00000000000..4d2a444c198 --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/plugins/sfputil.py @@ -0,0 +1,205 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 65 + QSFP_PORT_START = PORT_START + QSFP_PORT_END = 63 + + EEPROM_OFFSET = 1 + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.QSFP_PORT_END+1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + if self.port_start == 1: + offset = self.EEPROM_OFFSET - 1 + else: + offset = self.EEPROM_OFFSET + + for x in range(self.port_start, self.port_end + 1): + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + offset) + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/ms200i_cpld/qsfp_modprs") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + if self.port_start == 1: + bit_index = port_num - 1 + else: + bit_index = port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/ms200i_cpld/qsfp_lpmode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + if self.port_start == 1: + bit_index = port_num - 1 + else: + bit_index = port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/ms200i_cpld/qsfp_lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + if self.port_start == 1: + bit_index = port_num - 1 + else: + bit_index = port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value).strip('L') + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/devices/platform/ms200i_cpld/qsfp_reset" + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + if self.port_start == 1: + bit_index = port_num - 1 + else: + bit_index = port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value).rstrip('L')) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value).rstrip('L')) + reg_file.close() + + return True diff --git a/device/celestica/x86_64-cel_midstone-r0/sensors.conf b/device/celestica/x86_64-cel_midstone-r0/sensors.conf new file mode 100755 index 00000000000..7c9a6321dfc --- /dev/null +++ b/device/celestica/x86_64-cel_midstone-r0/sensors.conf @@ -0,0 +1,2 @@ +# libsensors configuration file for Celestica Midstone-200i. +# The i2c bus portion is omit because adapter name diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/buffers.json.j2 b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..4dd6bd96ad9 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/buffers_defaults_t0.j2 @@ -0,0 +1,54 @@ + +{%- set default_cable = '5m' %} + +{%- set ports2cable = { + 'torrouter_server' : '300m', + 'leafrouter_torrouter' : '300m', + 'spinerouter_leafrouter' : '300m' + } +-%} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10875072", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_lossy_pool": { + "size": "9243812", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"15982720" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..3c93fb8fe2e --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/buffers_defaults_t1.j2 @@ -0,0 +1,54 @@ + +{%- set default_cable = '40m' %} + +{%- set ports2cable = { + 'torrouter_server' : '300m', + 'leafrouter_torrouter' : '300m', + 'spinerouter_leafrouter' : '300m' + } +-%} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10875072", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_lossy_pool": { + "size": "9243812", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"15982720" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/pg_profile_lookup.ini b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/pg_profile_lookup.ini new file mode 100644 index 00000000000..aedda37a887 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -3 2288 + 25000 5m 1248 2288 53248 -3 2288 + 40000 5m 1248 2288 66560 -3 2288 + 50000 5m 1248 2288 90272 -3 2288 + 100000 5m 1248 2288 165568 -3 2288 + 10000 40m 1248 2288 37024 -3 2288 + 25000 40m 1248 2288 53248 -3 2288 + 40000 40m 1248 2288 71552 -3 2288 + 50000 40m 1248 2288 96096 -3 2288 + 100000 40m 1248 2288 177632 -3 2288 + 10000 300m 1248 2288 46176 -3 2288 + 25000 300m 1248 2288 79040 -3 2288 + 40000 300m 1248 2288 108160 -3 2288 + 50000 300m 1248 2288 141856 -3 2288 + 100000 300m 1248 2288 268736 -3 2288 diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/port_config.ini b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/port_config.ini new file mode 100644 index 00000000000..24e7b3c9985 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias speed index +Ethernet0 65,66,67,68 etp1 100000 1 +Ethernet4 69,70,71,72 etp2 100000 2 +Ethernet8 73,74,75,76 etp3 100000 3 +Ethernet12 77,78,79,80 etp4 100000 4 +Ethernet16 33,34,35,36 etp5 100000 5 +Ethernet20 37,38,39,40 etp6 100000 6 +Ethernet24 41,42,43,44 etp7 100000 7 +Ethernet28 45,46,47,48 etp8 100000 8 +Ethernet32 49,50,51,52 etp9 100000 9 +Ethernet36 53,54,55,56 etp10 100000 10 +Ethernet40 57,58,59,60 etp11 100000 11 +Ethernet44 61,62,63,64 etp12 100000 12 +Ethernet48 81,82,83,84 etp13 100000 13 +Ethernet52 85,86,87,88 etp14 100000 14 +Ethernet56 89,90,91,92 etp15 100000 15 +Ethernet60 93,94,95,96 etp16 100000 16 +Ethernet64 97,98,99,100 etp17 100000 17 +Ethernet68 101,102,103,104 etp18 100000 18 +Ethernet72 105,106,107,108 etp19 100000 19 +Ethernet76 109,110,111,112 etp20 100000 20 +Ethernet80 1,2,3,4 etp21 100000 21 +Ethernet84 5,6,7,8 etp22 100000 22 +Ethernet88 9,10,11,12 etp23 100000 23 +Ethernet92 13,14,15,16 etp24 100000 24 +Ethernet96 17,18,19,20 etp25 100000 25 +Ethernet100 21,22,23,24 etp26 100000 26 +Ethernet104 25,26,27,28 etp27 100000 27 +Ethernet108 29,30,31,32 etp28 100000 28 +Ethernet112 113,114,115,116 etp29 100000 29 +Ethernet116 117,118,119,120 etp30 100000 30 +Ethernet120 121,122,123,124 etp31 100000 31 +Ethernet124 125,126,127,128 etp32 100000 32 diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/qos.json.j2 b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/sai.profile.j2 b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/sai.profile.j2 new file mode 100644 index 00000000000..abc2daefd04 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/sai.profile.j2 @@ -0,0 +1,13 @@ +{# Get sai.profile based on switch_role #} +{%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined and DEVICE_METADATA['localhost']['type'] is defined -%} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] -%} +{%- if switch_role.lower() == 'torrouter' %} +{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-seastone-dx010-32x100G-t0.config.bcm' -%} +{%- else %} +{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-seastone-dx010-32x100G-t1.config.bcm' -%} +{%- endif %} +{%- else %} +{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-seastone-dx010-32x100G-t1.config.bcm' -%} +{%- endif %} +{# Write the contents of sai_ profile_filename to sai.profile file #} +{{ sai_profile_contents }} diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/th-seastone-dx010-32x100G-t0.config.bcm b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/th-seastone-dx010-32x100G-t0.config.bcm new file mode 100644 index 00000000000..7c315460dc8 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/th-seastone-dx010-32x100G-t0.config.bcm @@ -0,0 +1,376 @@ +# Define default OS / SAL +os=unix + +# all XPORTs to XE ports +#pbmp_xport_xe=0x1fffffffe +pbmp_xport_xe=0x1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe +pbmp_oversubscribe=0x1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe + +# Mode control to select L2 Table DMA mode aka L2MODE_POLL (0) or +# L2MOD_FIFO mechanism aka L2MODE_FIFO (1) for L2 table change notification. +l2xmsg_mode=1 + +# Memory table size configs +l2_mem_entries=8192 +l3_mem_entries=8192 +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 +mmu_lossless=0 + +################################################################################### +# Celestica Customize for SeaStone +################################################################################### + +#ext mdio frequency to 495/0x80/2(1.933Mhz) or 415/0x80/2(1.62MHz) +# default is 40 +# Set external MDIO freq to 6.19MHz (495MHz) or 5.19MHz (415MHz) +#* target_freq is core_clock_freq * DIVIDEND / DIVISOR / 2 +# +rate_ext_mdio_divisor=0x80 + +# use internal rom boot +phy_ext_rom_boot=0 + +#fpem_mem_entries=32768 +oversubscribe_mode=1 +#pbmp_xport_xe=0x3fd000000ff4000003fc000001fe + + +dport_map_enable=1 + +dport_map_port_68=1 +dport_map_port_72=5 +dport_map_port_76=9 +dport_map_port_80=13 +dport_map_port_34=17 +dport_map_port_38=21 +dport_map_port_42=25 +dport_map_port_46=29 +dport_map_port_50=33 +dport_map_port_54=37 +dport_map_port_58=41 +dport_map_port_62=45 +dport_map_port_84=49 +dport_map_port_88=53 +dport_map_port_92=57 +dport_map_port_96=61 +dport_map_port_102=65 +dport_map_port_106=69 +dport_map_port_110=73 +dport_map_port_114=77 +dport_map_port_1=81 +dport_map_port_5=85 +dport_map_port_9=89 +dport_map_port_13=93 +dport_map_port_17=97 +dport_map_port_21=101 +dport_map_port_25=105 +dport_map_port_29=109 +dport_map_port_118=113 +dport_map_port_122=117 +dport_map_port_126=121 +dport_map_port_130=125 + + +# port mapping +portmap_68=65:100:4 +portmap_72=69:100:4 +portmap_76=73:100:4 +portmap_80=77:100:4 +portmap_34=33:100:4 +portmap_38=37:100:4 +portmap_42=41:100:4 +portmap_46=45:100:4 +portmap_50=49:100:4 +portmap_54=53:100:4 +portmap_58=57:100:4 +portmap_62=61:100:4 +portmap_84=81:100:4 +portmap_88=85:100:4 +portmap_92=89:100:4 +portmap_96=93:100:4 +portmap_102=97:100:4 +portmap_106=101:100:4 +portmap_110=105:100:4 +portmap_114=109:100:4 +portmap_1=1:100:4 +portmap_5=5:100:4 +portmap_9=9:100:4 +portmap_13=13:100:4 +portmap_17=17:100:4 +portmap_21=21:100:4 +portmap_25=25:100:4 +portmap_29=29:100:4 +portmap_118=113:100:4 +portmap_122=117:100:4 +portmap_126=121:100:4 +portmap_130=125:100:4 +#portmap_66=129:10 +#portmap_100=131:10 + +#WC16 +xgxs_tx_lane_map_68=0x3201 +xgxs_rx_lane_map_68=0x2310 + + +#WC17 +xgxs_tx_lane_map_72=0x3201 +xgxs_rx_lane_map_72=0x2301 + +#WC18 +xgxs_tx_lane_map_76=0x0132 +xgxs_rx_lane_map_76=0x0123 + +#WC19 +xgxs_tx_lane_map_80=0x2031 +xgxs_rx_lane_map_80=0x1320 + +#WC8 +xgxs_tx_lane_map_34=0x3021 +xgxs_rx_lane_map_34=0x0213 + +#WC9 +xgxs_tx_lane_map_38=0x3210 +xgxs_rx_lane_map_38=0x1023 + +#WC10 +xgxs_tx_lane_map_42=0x2310 +xgxs_rx_lane_map_42=0x3210 + +#WC11 +xgxs_tx_lane_map_46=0x1032 +xgxs_rx_lane_map_46=0x1302 + +#WC12 +xgxs_tx_lane_map_50=0x3201 +xgxs_rx_lane_map_50=0x0213 + + +#WC13 +xgxs_tx_lane_map_54=0x2301 +xgxs_rx_lane_map_54=0x2310 + +#WC14 +xgxs_tx_lane_map_58=0x3201 +xgxs_rx_lane_map_58=0x0213 + +#WC15 +xgxs_tx_lane_map_62=0x1302 +xgxs_rx_lane_map_62=0x2310 + +#WC20 +xgxs_tx_lane_map_84=0x0213 +xgxs_rx_lane_map_84=0x2301 + +#WC21 +xgxs_tx_lane_map_88=0x0132 +xgxs_rx_lane_map_88=0x3210 + +#WC22 +xgxs_tx_lane_map_92=0x0132 +xgxs_rx_lane_map_92=0x2031 + +#WC23 +xgxs_tx_lane_map_96=0x2031 +xgxs_rx_lane_map_96=0x3201 + +#WC24 +xgxs_tx_lane_map_102=0x0132 +xgxs_rx_lane_map_102=0x2301 + +#WC25 +xgxs_tx_lane_map_106=0x0132 +xgxs_rx_lane_map_106=0x3201 + +#WC26 +xgxs_tx_lane_map_110=0x0132 +xgxs_rx_lane_map_110=0x2031 + +#WC27 +xgxs_tx_lane_map_114=0x2031 +xgxs_rx_lane_map_114=0x2301 + + +#WC0 +xgxs_tx_lane_map_1=0x3210 +xgxs_rx_lane_map_1=0x3120 + +#WC1 +xgxs_tx_lane_map_5=0x0132 +xgxs_rx_lane_map_5=0x1023 + +#WC2 +xgxs_tx_lane_map_9=0x3201 +xgxs_rx_lane_map_9=0x3120 + +#WC3 +xgxs_tx_lane_map_13=0x2031 +xgxs_rx_lane_map_13=0x1032 + +#WC4 +xgxs_tx_lane_map_17=0x2310 +xgxs_rx_lane_map_17=0x3210 + +#WC5 +xgxs_tx_lane_map_21=0x2301 +xgxs_rx_lane_map_21=0x3120 + +#WC6 +xgxs_tx_lane_map_25=0x3201 +xgxs_rx_lane_map_25=0x0213 + +#WC7 +xgxs_tx_lane_map_29=0x1302 +xgxs_rx_lane_map_29=0x1023 + +#WC28 +xgxs_tx_lane_map_118=0x1320 +xgxs_rx_lane_map_118=0x1302 + +#WC29 +xgxs_tx_lane_map_122=0x1032 +xgxs_rx_lane_map_122=0x1023 + +#WC30 +xgxs_tx_lane_map_126=0x3120 +xgxs_rx_lane_map_126=0x3120 + +#WC31 +xgxs_tx_lane_map_130=0x1302 +xgxs_rx_lane_map_130=0x2310 + +#PN + +#WC16 +phy_xaui_tx_polarity_flip_68=0x0000 +phy_xaui_rx_polarity_flip_68=0x0000 + +#WC17 +phy_xaui_tx_polarity_flip_72=0x000D +phy_xaui_rx_polarity_flip_72=0x0002 + + +#WC18 +phy_xaui_tx_polarity_flip_76=0x000F +phy_xaui_rx_polarity_flip_76=0x0000 + +#WC19 +phy_xaui_tx_polarity_flip_80=0x000F +phy_xaui_rx_polarity_flip_80=0x000F + + +#WC8 +phy_xaui_tx_polarity_flip_34=0x000E +phy_xaui_rx_polarity_flip_34=0x0000 + +#WC9 +phy_xaui_tx_polarity_flip_38=0x0008 +phy_xaui_rx_polarity_flip_38=0x0000 + +#WC10 +phy_xaui_tx_polarity_flip_42=0x000D +phy_xaui_rx_polarity_flip_42=0x0000 + +#WC11 +phy_xaui_tx_polarity_flip_46=0x0000 +phy_xaui_rx_polarity_flip_46=0x0000 + + +#WC12 +phy_xaui_tx_polarity_flip_50=0x0002 +phy_xaui_rx_polarity_flip_50=0x0000 + +#WC13 +phy_xaui_tx_polarity_flip_54=0x0002 +phy_xaui_rx_polarity_flip_54=0x0000 + +#WC14 +phy_xaui_tx_polarity_flip_58=0x0000 +phy_xaui_rx_polarity_flip_58=0x0000 + +#WC15 +phy_xaui_tx_polarity_flip_62=0x000A +phy_xaui_rx_polarity_flip_62=0x000F + + +#WC20 + phy_xaui_tx_polarity_flip_84=0x0007 + phy_xaui_rx_polarity_flip_84=0x000E + +#WC21 +phy_xaui_tx_polarity_flip_88=0x000D +phy_xaui_rx_polarity_flip_88=0x000D + +#WC22 +phy_xaui_tx_polarity_flip_92=0x000F +phy_xaui_rx_polarity_flip_92=0x0008 + +#WC23 +phy_xaui_tx_polarity_flip_96=0x0005 +phy_xaui_rx_polarity_flip_96=0x0000 + +#WC24 +phy_xaui_tx_polarity_flip_102=0x0000 +phy_xaui_rx_polarity_flip_102=0x000F + +#WC25 +phy_xaui_tx_polarity_flip_106=0x000F +phy_xaui_rx_polarity_flip_106=0x0000 + +#WC26 +phy_xaui_tx_polarity_flip_110=0x000F +phy_xaui_rx_polarity_flip_110=0x000F + +#WC27 +phy_xaui_tx_polarity_flip_114=0x000F +phy_xaui_rx_polarity_flip_114=0x0007 + +#WC0 +phy_xaui_tx_polarity_flip_1=0x0003 +phy_xaui_rx_polarity_flip_1=0x000F + +#WC1 +phy_xaui_tx_polarity_flip_5=0x0007 +phy_xaui_rx_polarity_flip_5=0x0000 + +#WC2 +phy_xaui_tx_polarity_flip_9=0x0002 +phy_xaui_rx_polarity_flip_9=0x0008 + +#WC3 +phy_xaui_tx_polarity_flip_13=0x000F +phy_xaui_rx_polarity_flip_13=0x0000 + +#WC4 +phy_xaui_tx_polarity_flip_17=0x0007 +phy_xaui_rx_polarity_flip_17=0x0000 + +#WC5 +phy_xaui_tx_polarity_flip_21=0x0000 +phy_xaui_rx_polarity_flip_21=0x0000 + +#WC6 +phy_xaui_tx_polarity_flip_25=0x0002 +phy_xaui_rx_polarity_flip_25=0x0005 + +#WC7 +phy_xaui_tx_polarity_flip_29=0x0002 +phy_xaui_rx_polarity_flip_29=0x0000 + +#WC28 +phy_xaui_tx_polarity_flip_118=0x000F +phy_xaui_rx_polarity_flip_118=0x000F + +#WC29 +phy_xaui_tx_polarity_flip_122=0x0004 +phy_xaui_rx_polarity_flip_122=0x0000 + +#WC30 +phy_xaui_tx_polarity_flip_126=0x000F +phy_xaui_rx_polarity_flip_126=0x0000 + +#WC31 +phy_xaui_tx_polarity_flip_130=0x0006 +phy_xaui_rx_polarity_flip_130=0x0000 + +mmu_init_config="MSFT-TH-Tier0" diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/th-seastone-dx010-32x100G-t1.config.bcm b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/th-seastone-dx010-32x100G-t1.config.bcm new file mode 100644 index 00000000000..effdfb5d757 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-C32/th-seastone-dx010-32x100G-t1.config.bcm @@ -0,0 +1,696 @@ +# Define default OS / SAL +os=unix + +# all XPORTs to XE ports +#pbmp_xport_xe=0x1fffffffe +pbmp_xport_xe=0x1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe +pbmp_oversubscribe=0x1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe + +# Mode control to select L2 Table DMA mode aka L2MODE_POLL (0) or +# L2MOD_FIFO mechanism aka L2MODE_FIFO (1) for L2 table change notification. +l2xmsg_mode=1 + +# Memory table size configs +l2_mem_entries=8192 +l3_mem_entries=8192 +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 +mmu_lossless=0 + +################################################################################### +# Celestica Customize for SeaStone +################################################################################### + +#ext mdio frequency to 495/0x80/2(1.933Mhz) or 415/0x80/2(1.62MHz) +# default is 40 +# Set external MDIO freq to 6.19MHz (495MHz) or 5.19MHz (415MHz) +#* target_freq is core_clock_freq * DIVIDEND / DIVISOR / 2 +# +rate_ext_mdio_divisor=0x80 + +# use internal rom boot +phy_ext_rom_boot=0 + +#fpem_mem_entries=32768 +oversubscribe_mode=1 +#pbmp_xport_xe=0x3fd000000ff4000003fc000001fe + + +dport_map_enable=1 + +dport_map_port_68=1 +dport_map_port_72=5 +dport_map_port_76=9 +dport_map_port_80=13 +dport_map_port_34=17 +dport_map_port_38=21 +dport_map_port_42=25 +dport_map_port_46=29 +dport_map_port_50=33 +dport_map_port_54=37 +dport_map_port_58=41 +dport_map_port_62=45 +dport_map_port_84=49 +dport_map_port_88=53 +dport_map_port_92=57 +dport_map_port_96=61 +dport_map_port_102=65 +dport_map_port_106=69 +dport_map_port_110=73 +dport_map_port_114=77 +dport_map_port_1=81 +dport_map_port_5=85 +dport_map_port_9=89 +dport_map_port_13=93 +dport_map_port_17=97 +dport_map_port_21=101 +dport_map_port_25=105 +dport_map_port_29=109 +dport_map_port_118=113 +dport_map_port_122=117 +dport_map_port_126=121 +dport_map_port_130=125 + + +# port mapping +portmap_68=65:100:4 +portmap_72=69:100:4 +portmap_76=73:100:4 +portmap_80=77:100:4 +portmap_34=33:100:4 +portmap_38=37:100:4 +portmap_42=41:100:4 +portmap_46=45:100:4 +portmap_50=49:100:4 +portmap_54=53:100:4 +portmap_58=57:100:4 +portmap_62=61:100:4 +portmap_84=81:100:4 +portmap_88=85:100:4 +portmap_92=89:100:4 +portmap_96=93:100:4 +portmap_102=97:100:4 +portmap_106=101:100:4 +portmap_110=105:100:4 +portmap_114=109:100:4 +portmap_1=1:100:4 +portmap_5=5:100:4 +portmap_9=9:100:4 +portmap_13=13:100:4 +portmap_17=17:100:4 +portmap_21=21:100:4 +portmap_25=25:100:4 +portmap_29=29:100:4 +portmap_118=113:100:4 +portmap_122=117:100:4 +portmap_126=121:100:4 +portmap_130=125:100:4 +#portmap_66=129:10 +#portmap_100=131:10 + +#WC16 +xgxs_tx_lane_map_68=0x3201 +xgxs_rx_lane_map_68=0x2310 + + +#WC17 +xgxs_tx_lane_map_72=0x3201 +xgxs_rx_lane_map_72=0x2301 + +#WC18 +xgxs_tx_lane_map_76=0x0132 +xgxs_rx_lane_map_76=0x0123 + +#WC19 +xgxs_tx_lane_map_80=0x2031 +xgxs_rx_lane_map_80=0x1320 + +#WC8 +xgxs_tx_lane_map_34=0x3021 +xgxs_rx_lane_map_34=0x0213 + +#WC9 +xgxs_tx_lane_map_38=0x3210 +xgxs_rx_lane_map_38=0x1023 + +#WC10 +xgxs_tx_lane_map_42=0x2310 +xgxs_rx_lane_map_42=0x3210 + +#WC11 +xgxs_tx_lane_map_46=0x1032 +xgxs_rx_lane_map_46=0x1302 + +#WC12 +xgxs_tx_lane_map_50=0x3201 +xgxs_rx_lane_map_50=0x0213 + + +#WC13 +xgxs_tx_lane_map_54=0x2301 +xgxs_rx_lane_map_54=0x2310 + +#WC14 +xgxs_tx_lane_map_58=0x3201 +xgxs_rx_lane_map_58=0x0213 + +#WC15 +xgxs_tx_lane_map_62=0x1302 +xgxs_rx_lane_map_62=0x2310 + +#WC20 +xgxs_tx_lane_map_84=0x0213 +xgxs_rx_lane_map_84=0x2301 + +#WC21 +xgxs_tx_lane_map_88=0x0132 +xgxs_rx_lane_map_88=0x3210 + +#WC22 +xgxs_tx_lane_map_92=0x0132 +xgxs_rx_lane_map_92=0x2031 + +#WC23 +xgxs_tx_lane_map_96=0x2031 +xgxs_rx_lane_map_96=0x3201 + +#WC24 +xgxs_tx_lane_map_102=0x0132 +xgxs_rx_lane_map_102=0x2301 + +#WC25 +xgxs_tx_lane_map_106=0x0132 +xgxs_rx_lane_map_106=0x3201 + +#WC26 +xgxs_tx_lane_map_110=0x0132 +xgxs_rx_lane_map_110=0x2031 + +#WC27 +xgxs_tx_lane_map_114=0x2031 +xgxs_rx_lane_map_114=0x2301 + + +#WC0 +xgxs_tx_lane_map_1=0x3210 +xgxs_rx_lane_map_1=0x3120 + +#WC1 +xgxs_tx_lane_map_5=0x0132 +xgxs_rx_lane_map_5=0x1023 + +#WC2 +xgxs_tx_lane_map_9=0x3201 +xgxs_rx_lane_map_9=0x3120 + +#WC3 +xgxs_tx_lane_map_13=0x2031 +xgxs_rx_lane_map_13=0x1032 + +#WC4 +xgxs_tx_lane_map_17=0x2310 +xgxs_rx_lane_map_17=0x3210 + +#WC5 +xgxs_tx_lane_map_21=0x2301 +xgxs_rx_lane_map_21=0x3120 + +#WC6 +xgxs_tx_lane_map_25=0x3201 +xgxs_rx_lane_map_25=0x0213 + +#WC7 +xgxs_tx_lane_map_29=0x1302 +xgxs_rx_lane_map_29=0x1023 + +#WC28 +xgxs_tx_lane_map_118=0x1320 +xgxs_rx_lane_map_118=0x1302 + +#WC29 +xgxs_tx_lane_map_122=0x1032 +xgxs_rx_lane_map_122=0x1023 + +#WC30 +xgxs_tx_lane_map_126=0x3120 +xgxs_rx_lane_map_126=0x3120 + +#WC31 +xgxs_tx_lane_map_130=0x1302 +xgxs_rx_lane_map_130=0x2310 + +#PN + +#WC16 +phy_xaui_tx_polarity_flip_68=0x0000 +phy_xaui_rx_polarity_flip_68=0x0000 + +#WC17 +phy_xaui_tx_polarity_flip_72=0x000D +phy_xaui_rx_polarity_flip_72=0x0002 + + +#WC18 +phy_xaui_tx_polarity_flip_76=0x000F +phy_xaui_rx_polarity_flip_76=0x0000 + +#WC19 +phy_xaui_tx_polarity_flip_80=0x000F +phy_xaui_rx_polarity_flip_80=0x000F + + +#WC8 +phy_xaui_tx_polarity_flip_34=0x000E +phy_xaui_rx_polarity_flip_34=0x0000 + +#WC9 +phy_xaui_tx_polarity_flip_38=0x0008 +phy_xaui_rx_polarity_flip_38=0x0000 + +#WC10 +phy_xaui_tx_polarity_flip_42=0x000D +phy_xaui_rx_polarity_flip_42=0x0000 + +#WC11 +phy_xaui_tx_polarity_flip_46=0x0000 +phy_xaui_rx_polarity_flip_46=0x0000 + + +#WC12 +phy_xaui_tx_polarity_flip_50=0x0002 +phy_xaui_rx_polarity_flip_50=0x0000 + +#WC13 +phy_xaui_tx_polarity_flip_54=0x0002 +phy_xaui_rx_polarity_flip_54=0x0000 + +#WC14 +phy_xaui_tx_polarity_flip_58=0x0000 +phy_xaui_rx_polarity_flip_58=0x0000 + +#WC15 +phy_xaui_tx_polarity_flip_62=0x000A +phy_xaui_rx_polarity_flip_62=0x000F + + +#WC20 + phy_xaui_tx_polarity_flip_84=0x0007 + phy_xaui_rx_polarity_flip_84=0x000E + +#WC21 +phy_xaui_tx_polarity_flip_88=0x000D +phy_xaui_rx_polarity_flip_88=0x000D + +#WC22 +phy_xaui_tx_polarity_flip_92=0x000F +phy_xaui_rx_polarity_flip_92=0x0008 + +#WC23 +phy_xaui_tx_polarity_flip_96=0x0005 +phy_xaui_rx_polarity_flip_96=0x0000 + +#WC24 +phy_xaui_tx_polarity_flip_102=0x0000 +phy_xaui_rx_polarity_flip_102=0x000F + +#WC25 +phy_xaui_tx_polarity_flip_106=0x000F +phy_xaui_rx_polarity_flip_106=0x0000 + +#WC26 +phy_xaui_tx_polarity_flip_110=0x000F +phy_xaui_rx_polarity_flip_110=0x000F + +#WC27 +phy_xaui_tx_polarity_flip_114=0x000F +phy_xaui_rx_polarity_flip_114=0x0007 + +#WC0 +phy_xaui_tx_polarity_flip_1=0x0003 +phy_xaui_rx_polarity_flip_1=0x000F + +#WC1 +phy_xaui_tx_polarity_flip_5=0x0007 +phy_xaui_rx_polarity_flip_5=0x0000 + +#WC2 +phy_xaui_tx_polarity_flip_9=0x0002 +phy_xaui_rx_polarity_flip_9=0x0008 + +#WC3 +phy_xaui_tx_polarity_flip_13=0x000F +phy_xaui_rx_polarity_flip_13=0x0000 + +#WC4 +phy_xaui_tx_polarity_flip_17=0x0007 +phy_xaui_rx_polarity_flip_17=0x0000 + +#WC5 +phy_xaui_tx_polarity_flip_21=0x0000 +phy_xaui_rx_polarity_flip_21=0x0000 + +#WC6 +phy_xaui_tx_polarity_flip_25=0x0002 +phy_xaui_rx_polarity_flip_25=0x0005 + +#WC7 +phy_xaui_tx_polarity_flip_29=0x0002 +phy_xaui_rx_polarity_flip_29=0x0000 + +#WC28 +phy_xaui_tx_polarity_flip_118=0x000F +phy_xaui_rx_polarity_flip_118=0x000F + +#WC29 +phy_xaui_tx_polarity_flip_122=0x0004 +phy_xaui_rx_polarity_flip_122=0x0000 + +#WC30 +phy_xaui_tx_polarity_flip_126=0x000F +phy_xaui_rx_polarity_flip_126=0x0000 + +#WC31 +phy_xaui_tx_polarity_flip_130=0x0006 +phy_xaui_rx_polarity_flip_130=0x0000 + +#ce0 +serdes_driver_current_lane0_68=0x0b +serdes_driver_current_lane1_68=0x0b +serdes_driver_current_lane2_68=0x0b +serdes_driver_current_lane3_68=0x0b +serdes_preemphasis_lane0_68=0x2d3f04 +serdes_preemphasis_lane1_68=0x2b4104 +serdes_preemphasis_lane2_68=0x2b4104 +serdes_preemphasis_lane3_68=0x2d3f04 + +#ce1 +serdes_driver_current_lane0_72=0x0b +serdes_driver_current_lane1_72=0x0a +serdes_driver_current_lane2_72=0x0a +serdes_driver_current_lane3_72=0x0b +serdes_preemphasis_lane0_72=0x2b4104 +serdes_preemphasis_lane1_72=0x294403 +serdes_preemphasis_lane2_72=0x294403 +serdes_preemphasis_lane3_72=0x2b4104 + +#ce2 +serdes_driver_current_lane0_76=0x0a +serdes_driver_current_lane1_76=0x0a +serdes_driver_current_lane2_76=0x0a +serdes_driver_current_lane3_76=0x0a +serdes_preemphasis_lane0_76=0x294403 +serdes_preemphasis_lane1_76=0x294403 +serdes_preemphasis_lane2_76=0x294403 +serdes_preemphasis_lane3_76=0x294403 + +#ce3 +serdes_driver_current_lane0_80=0x0a +serdes_driver_current_lane1_80=0x0a +serdes_driver_current_lane2_80=0x0a +serdes_driver_current_lane3_80=0x0a +serdes_preemphasis_lane0_80=0x254902 +serdes_preemphasis_lane1_80=0x254902 +serdes_preemphasis_lane2_80=0x294403 +serdes_preemphasis_lane3_80=0x294403 + +#ce4 +serdes_driver_current_lane0_34=0x0b +serdes_driver_current_lane1_34=0x0b +serdes_driver_current_lane2_34=0x0b +serdes_driver_current_lane3_34=0x0b +serdes_preemphasis_lane0_34=0x2b4104 +serdes_preemphasis_lane1_34=0x2d3f04 +serdes_preemphasis_lane2_34=0x2d3f04 +serdes_preemphasis_lane3_34=0x2b4104 + +#ce5 +serdes_driver_current_lane0_38=0x0a +serdes_driver_current_lane1_38=0x0b +serdes_driver_current_lane2_38=0x0b +serdes_driver_current_lane3_38=0x0b +serdes_preemphasis_lane0_38=0x294403 +serdes_preemphasis_lane1_38=0x2b4104 +serdes_preemphasis_lane2_38=0x2b4104 +serdes_preemphasis_lane3_38=0x2b4104 + +#ce6 +serdes_driver_current_lane0_42=0x0a +serdes_driver_current_lane1_42=0x0b +serdes_driver_current_lane2_42=0x0a +serdes_driver_current_lane3_42=0x0a +serdes_preemphasis_lane0_42=0x294403 +serdes_preemphasis_lane1_42=0x2b4104 +serdes_preemphasis_lane2_42=0x294403 +serdes_preemphasis_lane3_42=0x294403 + +#ce7 +serdes_driver_current_lane0_46=0x0a +serdes_driver_current_lane1_46=0x0a +serdes_driver_current_lane2_46=0x0a +serdes_driver_current_lane3_46=0x0a +serdes_preemphasis_lane0_46=0x254902 +serdes_preemphasis_lane1_46=0x294403 +serdes_preemphasis_lane2_46=0x254902 +serdes_preemphasis_lane3_46=0x294403 + +#ce8 +serdes_driver_current_lane0_50=0x0a +serdes_driver_current_lane1_50=0x0a +serdes_driver_current_lane2_50=0x0a +serdes_driver_current_lane3_50=0x0a +serdes_preemphasis_lane0_50=0x294403 +serdes_preemphasis_lane1_50=0x254902 +serdes_preemphasis_lane2_50=0x254902 +serdes_preemphasis_lane3_50=0x254902 + +#ce9 +serdes_driver_current_lane0_54=0x0a +serdes_driver_current_lane1_54=0x09 +serdes_driver_current_lane2_54=0x0a +serdes_driver_current_lane3_54=0x09 +serdes_preemphasis_lane0_54=0x254902 +serdes_preemphasis_lane1_54=0x244a02 +serdes_preemphasis_lane2_54=0x254902 +serdes_preemphasis_lane3_54=0x244a02 + +#ce10 +serdes_driver_current_lane0_58=0x0a +serdes_driver_current_lane1_58=0x09 +serdes_driver_current_lane2_58=0x09 +serdes_driver_current_lane3_58=0x0a +serdes_preemphasis_lane0_58=0x254902 +serdes_preemphasis_lane1_58=0x244a02 +serdes_preemphasis_lane2_58=0x244a02 +serdes_preemphasis_lane3_58=0x254902 + +#ce11 +serdes_driver_current_lane0_62=0x09 +serdes_driver_current_lane1_62=0x0a +serdes_driver_current_lane2_62=0x09 +serdes_driver_current_lane3_62=0x09 +serdes_preemphasis_lane0_62=0x244a02 +serdes_preemphasis_lane1_62=0x254902 +serdes_preemphasis_lane2_62=0x244a02 +serdes_preemphasis_lane3_62=0x244a02 + +#ce12 +serdes_driver_current_lane0_84=0x09 +serdes_driver_current_lane1_84=0x09 +serdes_driver_current_lane2_84=0x09 +serdes_driver_current_lane3_84=0x09 +serdes_preemphasis_lane0_84=0x204e02 +serdes_preemphasis_lane1_84=0x204e02 +serdes_preemphasis_lane2_84=0x204e02 +serdes_preemphasis_lane3_84=0x204e02 + +#ce13 +serdes_driver_current_lane0_88=0x09 +serdes_driver_current_lane1_88=0x08 +serdes_driver_current_lane2_88=0x08 +serdes_driver_current_lane3_88=0x09 +serdes_preemphasis_lane0_88=0x204e02 +serdes_preemphasis_lane1_88=0x1d5102 +serdes_preemphasis_lane2_88=0x1d5102 +serdes_preemphasis_lane3_88=0x204e02 + +#ce14 +serdes_driver_current_lane0_92=0x09 +serdes_driver_current_lane1_92=0x08 +serdes_driver_current_lane2_92=0x08 +serdes_driver_current_lane3_92=0x09 +serdes_preemphasis_lane0_92=0x204e02 +serdes_preemphasis_lane1_92=0x1d5102 +serdes_preemphasis_lane2_92=0x1d5102 +serdes_preemphasis_lane3_92=0x204e02 + +#ce15 +serdes_driver_current_lane0_96=0x08 +serdes_driver_current_lane1_96=0x08 +serdes_driver_current_lane2_96=0x09 +serdes_driver_current_lane3_96=0x09 +serdes_preemphasis_lane0_96=0x1d5102 +serdes_preemphasis_lane1_96=0x1d5102 +serdes_preemphasis_lane2_96=0x204e02 +serdes_preemphasis_lane3_96=0x204e02 + +#ce16 +serdes_driver_current_lane0_102=0x09 +serdes_driver_current_lane1_102=0x08 +serdes_driver_current_lane2_102=0x08 +serdes_driver_current_lane3_102=0x09 +serdes_preemphasis_lane0_102=0x204e02 +serdes_preemphasis_lane1_102=0x1d5102 +serdes_preemphasis_lane2_102=0x1d5102 +serdes_preemphasis_lane3_102=0x224c02 + +#ce17 +serdes_driver_current_lane0_106=0x09 +serdes_driver_current_lane1_106=0x08 +serdes_driver_current_lane2_106=0x08 +serdes_driver_current_lane3_106=0x09 +serdes_preemphasis_lane0_106=0x204e02 +serdes_preemphasis_lane1_106=0x1d5102 +serdes_preemphasis_lane2_106=0x1d5102 +serdes_preemphasis_lane3_106=0x204e02 + +#ce18 +serdes_driver_current_lane0_110=0x09 +serdes_driver_current_lane1_110=0x08 +serdes_driver_current_lane2_110=0x08 +serdes_driver_current_lane3_110=0x09 +serdes_preemphasis_lane0_110=0x204e02 +serdes_preemphasis_lane1_110=0x1d5102 +serdes_preemphasis_lane2_110=0x1d5102 +serdes_preemphasis_lane3_110=0x204e02 + +#ce19 +serdes_driver_current_lane0_114=0x09 +serdes_driver_current_lane1_114=0x08 +serdes_driver_current_lane2_114=0x09 +serdes_driver_current_lane3_114=0x09 +serdes_preemphasis_lane0_114=0x204e02 +serdes_preemphasis_lane1_114=0x1d5102 +serdes_preemphasis_lane2_114=0x224c02 +serdes_preemphasis_lane3_114=0x224c02 + +#ce20 +serdes_driver_current_lane0_1=0x09 +serdes_driver_current_lane1_1=0x0a +serdes_driver_current_lane2_1=0x09 +serdes_driver_current_lane3_1=0x0a +serdes_preemphasis_lane0_1=0x244a02 +serdes_preemphasis_lane1_1=0x254902 +serdes_preemphasis_lane2_1=0x244a02 +serdes_preemphasis_lane3_1=0x254902 + +#ce21 +serdes_driver_current_lane0_5=0x09 +serdes_driver_current_lane1_5=0x09 +serdes_driver_current_lane2_5=0x09 +serdes_driver_current_lane3_5=0x0a +serdes_preemphasis_lane0_5=0x244a02 +serdes_preemphasis_lane1_5=0x244a02 +serdes_preemphasis_lane2_5=0x244a02 +serdes_preemphasis_lane3_5=0x254902 + +#ce22 +serdes_driver_current_lane0_9=0x0a +serdes_driver_current_lane1_9=0x0a +serdes_driver_current_lane2_9=0x0a +serdes_driver_current_lane3_9=0x0a +serdes_preemphasis_lane0_9=0x254902 +serdes_preemphasis_lane1_9=0x254902 +serdes_preemphasis_lane2_9=0x254902 +serdes_preemphasis_lane3_9=0x294403 + +#ce23 +serdes_driver_current_lane0_13=0x09 +serdes_driver_current_lane1_13=0x0a +serdes_driver_current_lane2_13=0x0a +serdes_driver_current_lane3_13=0x0a +serdes_preemphasis_lane0_13=0x244a02 +serdes_preemphasis_lane1_13=0x254902 +serdes_preemphasis_lane2_13=0x294403 +serdes_preemphasis_lane3_13=0x294403 + +#ce24 +serdes_driver_current_lane0_17=0x0a +serdes_driver_current_lane1_17=0x0a +serdes_driver_current_lane2_17=0x0a +serdes_driver_current_lane3_17=0x0a +serdes_preemphasis_lane0_17=0x254902 +serdes_preemphasis_lane1_17=0x294403 +serdes_preemphasis_lane2_17=0x294403 +serdes_preemphasis_lane3_17=0x294403 + +#ce25 +serdes_driver_current_lane0_21=0x0a +serdes_driver_current_lane1_21=0x0a +serdes_driver_current_lane2_21=0x0a +serdes_driver_current_lane3_21=0x0a +serdes_preemphasis_lane0_21=0x294403 +serdes_preemphasis_lane1_21=0x294403 +serdes_preemphasis_lane2_21=0x294403 +serdes_preemphasis_lane3_21=0x254902 + +#ce26 +serdes_driver_current_lane0_25=0x0b +serdes_driver_current_lane1_25=0x0b +serdes_driver_current_lane2_25=0x0b +serdes_driver_current_lane3_25=0x0b +serdes_preemphasis_lane0_25=0x2b4104 +serdes_preemphasis_lane1_25=0x2b4104 +serdes_preemphasis_lane2_25=0x2b4104 +serdes_preemphasis_lane3_25=0x2d3f04 + +#ce27 +serdes_driver_current_lane0_29=0x0b +serdes_driver_current_lane1_29=0x0b +serdes_driver_current_lane2_29=0x0b +serdes_driver_current_lane3_29=0x0a +serdes_preemphasis_lane0_29=0x2d3f04 +serdes_preemphasis_lane1_29=0x2d3f04 +serdes_preemphasis_lane2_29=0x2b4104 +serdes_preemphasis_lane3_29=0x294403 + +#ce28 +serdes_driver_current_lane0_118=0x0a +serdes_driver_current_lane1_118=0x0a +serdes_driver_current_lane2_118=0x0a +serdes_driver_current_lane3_118=0x0a +serdes_preemphasis_lane0_118=0x254902 +serdes_preemphasis_lane1_118=0x294403 +serdes_preemphasis_lane2_118=0x294403 +serdes_preemphasis_lane3_118=0x254902 + +#ce29 +serdes_driver_current_lane0_122=0x0a +serdes_driver_current_lane1_122=0x0a +serdes_driver_current_lane2_122=0x0a +serdes_driver_current_lane3_122=0x0a +serdes_preemphasis_lane0_122=0x294403 +serdes_preemphasis_lane1_122=0x294403 +serdes_preemphasis_lane2_122=0x294403 +serdes_preemphasis_lane3_122=0x294403 + +#ce30 +serdes_driver_current_lane0_126=0x0a +serdes_driver_current_lane1_126=0x0a +serdes_driver_current_lane2_126=0x0b +serdes_driver_current_lane3_126=0x0b +serdes_preemphasis_lane0_126=0x294403 +serdes_preemphasis_lane1_126=0x294403 +serdes_preemphasis_lane2_126=0x2b4104 +serdes_preemphasis_lane3_126=0x2b4104 + +#ce31 +serdes_driver_current_lane0_130=0x0b +serdes_driver_current_lane1_130=0x0b +serdes_driver_current_lane2_130=0x0b +serdes_driver_current_lane3_130=0x0b +serdes_preemphasis_lane0_130=0x2d3f04 +serdes_preemphasis_lane1_130=0x2d3f04 +serdes_preemphasis_lane2_130=0x2b4104 +serdes_preemphasis_lane3_130=0x2b4104 + +mmu_init_config="MSFT-TH-Tier1" diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/buffers.json.j2 b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/buffers.json.j2 new file mode 100644 index 00000000000..1083a6210fc --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..4e4489f84a8 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/buffers_defaults_t0.j2 @@ -0,0 +1,69 @@ + +{%- set default_cable = '5m' %} + +{%- set ports2cable = { + 'torrouter_server' : '300m', + 'leafrouter_torrouter' : '300m', + 'spinerouter_leafrouter' : '300m' + } +-%} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,9) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(14,17) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(22,31) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(10,13) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(18,21) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10875072", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_lossy_pool": { + "size": "9243812", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"15982720" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/pg_profile_lookup.ini b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/pg_profile_lookup.ini new file mode 100644 index 00000000000..aedda37a887 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -3 2288 + 25000 5m 1248 2288 53248 -3 2288 + 40000 5m 1248 2288 66560 -3 2288 + 50000 5m 1248 2288 90272 -3 2288 + 100000 5m 1248 2288 165568 -3 2288 + 10000 40m 1248 2288 37024 -3 2288 + 25000 40m 1248 2288 53248 -3 2288 + 40000 40m 1248 2288 71552 -3 2288 + 50000 40m 1248 2288 96096 -3 2288 + 100000 40m 1248 2288 177632 -3 2288 + 10000 300m 1248 2288 46176 -3 2288 + 25000 300m 1248 2288 79040 -3 2288 + 40000 300m 1248 2288 108160 -3 2288 + 50000 300m 1248 2288 141856 -3 2288 + 100000 300m 1248 2288 268736 -3 2288 diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/port_config.ini b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/port_config.ini new file mode 100644 index 00000000000..7595dfbb3fe --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias speed index +Ethernet0 65,66 etp1a 50000 1 +Ethernet2 67,68 etp1b 50000 1 +Ethernet4 69,70 etp2a 50000 2 +Ethernet6 71,72 etp2b 50000 2 +Ethernet8 73,74 etp3a 50000 3 +Ethernet10 75,76 etp3b 50000 3 +Ethernet12 77,78 etp4a 50000 4 +Ethernet14 79,80 etp4b 50000 4 +Ethernet16 33,34 etp5a 50000 5 +Ethernet18 35,36 etp5b 50000 5 +Ethernet20 37,38 etp6a 50000 6 +Ethernet22 39,40 etp6b 50000 6 +Ethernet24 41,42 etp7a 50000 7 +Ethernet26 43,44 etp7b 50000 7 +Ethernet28 45,46 etp8a 50000 8 +Ethernet30 47,48 etp8b 50000 8 +Ethernet32 49,50 etp9a 50000 9 +Ethernet34 51,52 etp9b 50000 9 +Ethernet36 53,54 etp10a 50000 10 +Ethernet38 55,56 etp10b 50000 10 +Ethernet40 57,58,59,60 etp11 100000 11 +Ethernet44 61,62,63,64 etp12 100000 12 +Ethernet48 81,82,83,84 etp13 100000 13 +Ethernet52 85,86,87,88 etp14 100000 14 +Ethernet56 89,90 etp15a 50000 15 +Ethernet58 91,92 etp15b 50000 15 +Ethernet60 93,94 etp16a 50000 16 +Ethernet62 95,96 etp16b 50000 16 +Ethernet64 97,98 etp17a 50000 17 +Ethernet66 99,100 etp17b 50000 17 +Ethernet68 101,102 etp18a 50000 18 +Ethernet70 103,104 etp18b 50000 18 +Ethernet72 105,106,107,108 etp19 100000 19 +Ethernet76 109,110,111,112 etp20 100000 20 +Ethernet80 1,2,3,4 etp21 100000 21 +Ethernet84 5,6,7,8 etp22 100000 22 +Ethernet88 9,10 etp23a 50000 23 +Ethernet90 11,12 etp23b 50000 23 +Ethernet92 13,14 etp24a 50000 24 +Ethernet94 15,16 etp24b 50000 24 +Ethernet96 17,18 etp25a 50000 25 +Ethernet98 19,20 etp25b 50000 25 +Ethernet100 21,22 etp26a 50000 26 +Ethernet102 23,24 etp26b 50000 26 +Ethernet104 25,26 etp27a 50000 27 +Ethernet106 27,28 etp27b 50000 27 +Ethernet108 29,30 etp28a 50000 28 +Ethernet110 31,32 etp28b 50000 28 +Ethernet112 113,114 etp29a 50000 29 +Ethernet114 115,116 etp29b 50000 29 +Ethernet116 117,118 etp30a 50000 30 +Ethernet118 119,120 etp30b 50000 30 +Ethernet120 121,122 etp31a 50000 31 +Ethernet122 123,124 etp31b 50000 31 +Ethernet124 125,126 etp32a 50000 32 +Ethernet126 127,128 etp32b 50000 32 diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/qos.json.j2 b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/sai.profile b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/sai.profile new file mode 100644 index 00000000000..46d96b2fd90 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-seastone-dx010-48x50G+8x100G.config.bcm diff --git a/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/th-seastone-dx010-48x50G+8x100G.config.bcm b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/th-seastone-dx010-48x50G+8x100G.config.bcm new file mode 100644 index 00000000000..6707aa71df0 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Celestica-DX010-D48C8/th-seastone-dx010-48x50G+8x100G.config.bcm @@ -0,0 +1,648 @@ +os=unix +l2xmsg_mode=1 +parity_enable=0 +rate_ext_mdio_divisor=0x80 +phy_ext_rom_boot=0 +fpem_mem_entries=32768 +l2xmsg_mode=1 +oversubscribe_mode=1 +pbmp_xport_xe=0xcccc44cc33113333044cccccc66666622 + + +dport_map_enable=1 +dport_map_port_68=1 +dport_map_port_69=2 + +dport_map_port_72=5 +dport_map_port_73=6 + +dport_map_port_76=9 +dport_map_port_77=10 + +dport_map_port_80=13 +dport_map_port_81=14 + +dport_map_port_34=17 +dport_map_port_35=18 + +dport_map_port_38=21 +dport_map_port_39=22 + +dport_map_port_42=25 +dport_map_port_43=26 + +dport_map_port_46=29 +dport_map_port_47=30 + +dport_map_port_50=33 +dport_map_port_51=34 + +dport_map_port_54=37 +dport_map_port_55=38 + +dport_map_port_58=41 + +dport_map_port_62=45 + +dport_map_port_84=49 + +dport_map_port_88=53 + +dport_map_port_92=57 +dport_map_port_93=58 + +dport_map_port_96=61 +dport_map_port_97=62 + +dport_map_port_102=65 +dport_map_port_103=66 + +dport_map_port_106=69 +dport_map_port_107=70 + +dport_map_port_110=73 + +dport_map_port_114=77 + +dport_map_port_1=81 + +dport_map_port_5=85 + +dport_map_port_9=89 +dport_map_port_10=90 + +dport_map_port_13=93 +dport_map_port_14=94 + +dport_map_port_17=97 +dport_map_port_18=98 + +dport_map_port_21=101 +dport_map_port_22=102 + +dport_map_port_25=105 +dport_map_port_26=106 + +dport_map_port_29=109 +dport_map_port_30=110 + +dport_map_port_118=113 +dport_map_port_119=114 + +dport_map_port_122=117 +dport_map_port_123=118 + +dport_map_port_126=121 +dport_map_port_127=122 + +dport_map_port_130=125 +dport_map_port_131=126 + + +# port mapping +portmap_68=65:50:2 +portmap_69=67:50:2 + +portmap_72=69:50:2 +portmap_73=71:50:2 + +portmap_76=73:50:2 +portmap_77=75:50:2 + +portmap_80=77:50:2 +portmap_81=79:50:2 + +portmap_34=33:50:2 +portmap_35=35:50:2 + +portmap_38=37:50:2 +portmap_39=39:50:2 + +portmap_42=41:50:2 +portmap_43=43:50:2 + +portmap_46=45:50:2 +portmap_47=47:50:2 + +portmap_50=49:50:2 +portmap_51=51:50:2 + +portmap_54=53:50:2 +portmap_55=55:50:2 + +portmap_58=57:100:4 + +portmap_62=61:100:4 + +portmap_84=81:100:4 + +portmap_88=85:100:4 + +portmap_92=89:50:2 +portmap_93=91:50:2 + +portmap_96=93:50:2 +portmap_97=95:50:2 + +portmap_102=97:50:2 +portmap_103=99:50:2 + +portmap_106=101:50:2 +portmap_107=103:50:2 + +portmap_110=105:100:4 + +portmap_114=109:100:4 + +portmap_1=1:100:4 + +portmap_5=5:100:4 + +portmap_9=9:50:2 +portmap_10=11:50:2 + +portmap_13=13:50:2 +portmap_14=15:50:2 + +portmap_17=17:50:2 +portmap_18=19:50:2 + +portmap_21=21:50:2 +portmap_22=23:50:2 + +portmap_25=25:50:2 +portmap_26=27:50:2 + +portmap_29=29:50:2 +portmap_30=31:50:2 + +portmap_118=113:50:2 +portmap_119=115:50:2 + +portmap_122=117:50:2 +portmap_123=119:50:2 + +portmap_126=121:50:2 +portmap_127=123:50:2 + +portmap_130=125:50:2 +portmap_131=127:50:2 + + +#WC16 +xgxs_tx_lane_map_68=0x1023 +xgxs_rx_lane_map_68=0x0132 +xgxs_tx_lane_map_69=0x1023 +xgxs_rx_lane_map_69=0x0132 + + +#WC17 +xgxs_tx_lane_map_72=0x1023 +xgxs_rx_lane_map_72=0x1032 +xgxs_tx_lane_map_73=0x1023 +xgxs_rx_lane_map_73=0x1032 + +#WC18 +xgxs_tx_lane_map_76=0x2310 +xgxs_rx_lane_map_76=0x3210 +xgxs_tx_lane_map_77=0x2310 +xgxs_rx_lane_map_77=0x3210 + +#WC19 +xgxs_tx_lane_map_80=0x1302 +xgxs_rx_lane_map_80=0x0231 +xgxs_tx_lane_map_81=0x1302 +xgxs_rx_lane_map_81=0x0231 +#WC8 +xgxs_tx_lane_map_34=0x1203 +xgxs_rx_lane_map_34=0x3120 +xgxs_tx_lane_map_35=0x1203 +xgxs_rx_lane_map_35=0x3120 + +#WC9 +xgxs_tx_lane_map_38=0x0123 +xgxs_rx_lane_map_38=0x3201 +xgxs_tx_lane_map_39=0x0123 +xgxs_rx_lane_map_39=0x3201 + +#WC10 +xgxs_tx_lane_map_42=0x0132 +xgxs_rx_lane_map_42=0x0123 +xgxs_tx_lane_map_43=0x0132 +xgxs_rx_lane_map_43=0x0123 + +#WC11 +xgxs_tx_lane_map_46=0x2301 +xgxs_rx_lane_map_46=0x2031 +xgxs_tx_lane_map_47=0x2301 +xgxs_rx_lane_map_47=0x2031 + +#WC12 +xgxs_tx_lane_map_50=0x1032 +xgxs_rx_lane_map_50=0x3120 +xgxs_tx_lane_map_51=0x1032 +xgxs_rx_lane_map_51=0x3120 + + +#WC13 +xgxs_tx_lane_map_54=0x1032 +xgxs_rx_lane_map_54=0x0132 +xgxs_tx_lane_map_55=0x1032 +xgxs_rx_lane_map_55=0x0132 + +#WC14 + xgxs_tx_lane_map_58=0x1032 + xgxs_rx_lane_map_58=0x3120 + +#WC15 +xgxs_tx_lane_map_62=0x2031 +xgxs_rx_lane_map_62=0x0132 + +#WC20 + xgxs_tx_lane_map_84=0x3120 + xgxs_rx_lane_map_84=0x1032 + +#WC21 +xgxs_tx_lane_map_88=0x2310 +xgxs_rx_lane_map_88=0x0123 + +#WC22 +xgxs_tx_lane_map_92=0x2310 +xgxs_rx_lane_map_92=0x1302 +xgxs_tx_lane_map_93=0x2310 +xgxs_rx_lane_map_93=0x1302 + +#WC23 +xgxs_tx_lane_map_96=0x1302 +xgxs_rx_lane_map_96=0x1023 +xgxs_tx_lane_map_97=0x1302 +xgxs_rx_lane_map_97=0x1023 + +#WC24 +xgxs_tx_lane_map_102=0x2310 +xgxs_rx_lane_map_102=0x1032 +xgxs_tx_lane_map_103=0x2310 +xgxs_rx_lane_map_103=0x1032 + +#WC25 +xgxs_tx_lane_map_106=0x2310 +xgxs_rx_lane_map_106=0x1023 +xgxs_tx_lane_map_107=0x2310 +xgxs_rx_lane_map_107=0x1023 + +#WC26 +xgxs_tx_lane_map_110=0x2310 +xgxs_rx_lane_map_110=0x1302 + +#WC27 +xgxs_tx_lane_map_114=0x1302 +xgxs_rx_lane_map_114=0x1032 + +#WC0 +xgxs_tx_lane_map_1=0x0123 +xgxs_rx_lane_map_1=0x0213 + +#WC1 +xgxs_tx_lane_map_5=0x2310 +xgxs_rx_lane_map_5=0x3201 + +#WC2 +xgxs_tx_lane_map_9=0x1023 +xgxs_rx_lane_map_9=0x0213 +xgxs_tx_lane_map_10=0x1023 +xgxs_rx_lane_map_10=0x0213 + +#WC3 +xgxs_tx_lane_map_13=0x1302 +xgxs_rx_lane_map_13=0x3201 +xgxs_tx_lane_map_14=0x1302 +xgxs_rx_lane_map_14=0x3201 + +#WC4 +xgxs_tx_lane_map_17=0x0132 +xgxs_rx_lane_map_17=0x0123 +xgxs_tx_lane_map_18=0x0132 +xgxs_rx_lane_map_18=0x0123 + +#WC5 +xgxs_tx_lane_map_21=0x1032 +xgxs_rx_lane_map_21=0x0213 +xgxs_tx_lane_map_22=0x1032 +xgxs_rx_lane_map_22=0x0213 + +#WC6 +xgxs_tx_lane_map_25=0x1023 +xgxs_rx_lane_map_25=0x3120 +xgxs_tx_lane_map_26=0x1023 +xgxs_rx_lane_map_26=0x3120 + +#WC7 +xgxs_tx_lane_map_29=0x2031 +xgxs_rx_lane_map_29=0x3201 +xgxs_tx_lane_map_30=0x2031 +xgxs_rx_lane_map_30=0x3201 + +#WC28 +xgxs_tx_lane_map_118=0x0231 +xgxs_rx_lane_map_118=0x2031 +xgxs_tx_lane_map_119=0x0231 +xgxs_rx_lane_map_119=0x2031 + +#WC29 +xgxs_tx_lane_map_122=0x3201 +xgxs_rx_lane_map_122=0x2301 +xgxs_tx_lane_map_123=0x3201 +xgxs_rx_lane_map_123=0x2301 + +#WC30 +xgxs_tx_lane_map_126=0x0213 +xgxs_rx_lane_map_126=0x0213 +xgxs_tx_lane_map_127=0x0213 +xgxs_rx_lane_map_127=0x0213 + +#WC31 +xgxs_tx_lane_map_130=0x2031 +xgxs_rx_lane_map_130=0x1032 +xgxs_tx_lane_map_131=0x2031 +xgxs_rx_lane_map_131=0x1032 + +#PN + +#WC16 +phy_xaui_tx_polarity_flip_68=0x0000 +phy_xaui_rx_polarity_flip_68=0x0000 +phy_xaui_tx_polarity_flip_69=0x0000 +phy_xaui_rx_polarity_flip_69=0x0000 + +#WC17 +phy_xaui_tx_polarity_flip_72=0x0003 +phy_xaui_rx_polarity_flip_72=0x0000 +phy_xaui_tx_polarity_flip_73=0x0002 +phy_xaui_rx_polarity_flip_73=0x0001 + + + +#WC18 +phy_xaui_tx_polarity_flip_76=0x0003 +phy_xaui_rx_polarity_flip_76=0x0000 +phy_xaui_tx_polarity_flip_77=0x0003 +phy_xaui_rx_polarity_flip_77=0x0000 + + +#WC19 +phy_xaui_tx_polarity_flip_80=0x0003 +phy_xaui_rx_polarity_flip_80=0x0003 +phy_xaui_tx_polarity_flip_81=0x0003 +phy_xaui_rx_polarity_flip_81=0x0003 + + +#WC8 +phy_xaui_tx_polarity_flip_34=0x0003 +phy_xaui_rx_polarity_flip_34=0x0000 +phy_xaui_tx_polarity_flip_35=0x0001 +phy_xaui_rx_polarity_flip_35=0x0000 + + +#WC9 +phy_xaui_tx_polarity_flip_38=0x0001 +phy_xaui_rx_polarity_flip_38=0x0000 +phy_xaui_tx_polarity_flip_39=0x0000 +phy_xaui_rx_polarity_flip_39=0x0000 + + +#WC10 +phy_xaui_tx_polarity_flip_42=0x0003 +phy_xaui_rx_polarity_flip_42=0x0000 +phy_xaui_tx_polarity_flip_43=0x0002 +phy_xaui_rx_polarity_flip_43=0x0000 + + +#WC11 +phy_xaui_tx_polarity_flip_46=0x0000 +phy_xaui_rx_polarity_flip_46=0x0000 +phy_xaui_tx_polarity_flip_47=0x0000 +phy_xaui_rx_polarity_flip_47=0x0000 + + +#WC12 +phy_xaui_tx_polarity_flip_50=0x0000 +phy_xaui_rx_polarity_flip_50=0x0000 +phy_xaui_tx_polarity_flip_51=0x0001 +phy_xaui_rx_polarity_flip_51=0x0000 + +#WC13 +phy_xaui_tx_polarity_flip_54=0x0000 +phy_xaui_rx_polarity_flip_54=0x0000 +phy_xaui_tx_polarity_flip_55=0x0001 +phy_xaui_rx_polarity_flip_55=0x0000 + +#WC14 +phy_xaui_tx_polarity_flip_58=0x0000 +phy_xaui_rx_polarity_flip_58=0x0000 + +#WC15 +phy_xaui_tx_polarity_flip_62=0x0005 +phy_xaui_rx_polarity_flip_62=0x000F + +#WC20 + phy_xaui_tx_polarity_flip_84=0x000E + phy_xaui_rx_polarity_flip_84=0x0007 + +#WC21 +phy_xaui_tx_polarity_flip_88=0x000B +phy_xaui_rx_polarity_flip_88=0x000B + +#WC22 +phy_xaui_tx_polarity_flip_92=0x0003 +phy_xaui_rx_polarity_flip_92=0x0001 +phy_xaui_tx_polarity_flip_93=0x0003 +phy_xaui_rx_polarity_flip_93=0x0000 + + +#WC23 +phy_xaui_tx_polarity_flip_96=0x0002 +phy_xaui_rx_polarity_flip_96=0x0000 +phy_xaui_tx_polarity_flip_97=0x0002 +phy_xaui_rx_polarity_flip_97=0x0000 + +#WC24 +phy_xaui_tx_polarity_flip_102=0x0000 +phy_xaui_rx_polarity_flip_102=0x0003 +phy_xaui_tx_polarity_flip_103=0x0000 +phy_xaui_rx_polarity_flip_103=0x0003 + + +#WC25 +phy_xaui_tx_polarity_flip_106=0x0003 +phy_xaui_rx_polarity_flip_106=0x0000 +phy_xaui_tx_polarity_flip_107=0x0003 +phy_xaui_rx_polarity_flip_107=0x0000 + +#WC26 +phy_xaui_tx_polarity_flip_110=0x000F +phy_xaui_rx_polarity_flip_110=0x000F + +#WC27 +phy_xaui_tx_polarity_flip_114=0x000F +phy_xaui_rx_polarity_flip_114=0x000E + +#WC0 +phy_xaui_tx_polarity_flip_1=0x000C +phy_xaui_rx_polarity_flip_1=0x000F + +#WC1 +phy_xaui_tx_polarity_flip_5=0x000E +phy_xaui_rx_polarity_flip_5=0x0000 + +#WC2 +phy_xaui_tx_polarity_flip_9=0x0000 +phy_xaui_rx_polarity_flip_9=0x0001 +phy_xaui_tx_polarity_flip_10=0x0001 +phy_xaui_rx_polarity_flip_10=0x0000 + + +#WC3 +phy_xaui_tx_polarity_flip_13=0x0003 +phy_xaui_rx_polarity_flip_13=0x0000 +phy_xaui_tx_polarity_flip_14=0x0003 +phy_xaui_rx_polarity_flip_14=0x0000 + +#WC4 +phy_xaui_tx_polarity_flip_17=0x0002 +phy_xaui_rx_polarity_flip_17=0x0000 +phy_xaui_tx_polarity_flip_18=0x0003 +phy_xaui_rx_polarity_flip_18=0x0000 + + +#WC5 +phy_xaui_tx_polarity_flip_21=0x0000 +phy_xaui_rx_polarity_flip_21=0x0000 +phy_xaui_tx_polarity_flip_22=0x0000 +phy_xaui_rx_polarity_flip_22=0x0000 + + +#WC6 +phy_xaui_tx_polarity_flip_25=0x0000 +phy_xaui_rx_polarity_flip_25=0x0002 +phy_xaui_tx_polarity_flip_26=0x0001 +phy_xaui_rx_polarity_flip_26=0x0002 + + +#WC7 +phy_xaui_tx_polarity_flip_29=0x0000 +phy_xaui_rx_polarity_flip_29=0x0000 +phy_xaui_tx_polarity_flip_30=0x0001 +phy_xaui_rx_polarity_flip_30=0x0000 + + +#WC28 +phy_xaui_tx_polarity_flip_118=0x0003 +phy_xaui_rx_polarity_flip_118=0x0003 +phy_xaui_tx_polarity_flip_119=0x0003 +phy_xaui_rx_polarity_flip_119=0x0003 + + +#WC29 +phy_xaui_tx_polarity_flip_122=0x0002 +phy_xaui_rx_polarity_flip_122=0x0000 +phy_xaui_tx_polarity_flip_123=0x0000 +phy_xaui_rx_polarity_flip_123=0x0000 + + +#WC30 +phy_xaui_tx_polarity_flip_126=0x0003 +phy_xaui_rx_polarity_flip_126=0x0000 +phy_xaui_tx_polarity_flip_127=0x0003 +phy_xaui_rx_polarity_flip_127=0x0000 + + +#WC31 +phy_xaui_tx_polarity_flip_130=0x0002 +phy_xaui_rx_polarity_flip_130=0x0000 +phy_xaui_tx_polarity_flip_131=0x0001 +phy_xaui_rx_polarity_flip_131=0x0000 + +#xe +serdes_driver_current=0x0a +serdes_preemphasis=0x1a5402 + +#ce0 +serdes_driver_current_lane0_58=0x0a +serdes_driver_current_lane1_58=0x09 +serdes_driver_current_lane2_58=0x09 +serdes_driver_current_lane3_58=0x0a +serdes_preemphasis_lane0_58=0x254902 +serdes_preemphasis_lane1_58=0x244a02 +serdes_preemphasis_lane2_58=0x244a02 +serdes_preemphasis_lane3_58=0x254902 + +#ce1 +serdes_driver_current_lane0_62=0x09 +serdes_driver_current_lane1_62=0x0a +serdes_driver_current_lane2_62=0x09 +serdes_driver_current_lane3_62=0x09 +serdes_preemphasis_lane0_62=0x244a02 +serdes_preemphasis_lane1_62=0x254902 +serdes_preemphasis_lane2_62=0x244a02 +serdes_preemphasis_lane3_62=0x244a02 + +#ce2 +serdes_driver_current_lane0_84=0x09 +serdes_driver_current_lane1_84=0x09 +serdes_driver_current_lane2_84=0x09 +serdes_driver_current_lane3_84=0x09 +serdes_preemphasis_lane0_84=0x204e02 +serdes_preemphasis_lane1_84=0x204e02 +serdes_preemphasis_lane2_84=0x204e02 +serdes_preemphasis_lane3_84=0x204e02 + +#ce3 +serdes_driver_current_lane0_88=0x09 +serdes_driver_current_lane1_88=0x08 +serdes_driver_current_lane2_88=0x08 +serdes_driver_current_lane3_88=0x09 +serdes_preemphasis_lane0_88=0x204e02 +serdes_preemphasis_lane1_88=0x1d5102 +serdes_preemphasis_lane2_88=0x1d5102 +serdes_preemphasis_lane3_88=0x204e02 + +#ce4 +serdes_driver_current_lane0_110=0x09 +serdes_driver_current_lane1_110=0x08 +serdes_driver_current_lane2_110=0x08 +serdes_driver_current_lane3_110=0x09 +serdes_preemphasis_lane0_110=0x204e02 +serdes_preemphasis_lane1_110=0x1d5102 +serdes_preemphasis_lane2_110=0x1d5102 +serdes_preemphasis_lane3_110=0x204e02 + +#ce5 +serdes_driver_current_lane0_114=0x09 +serdes_driver_current_lane1_114=0x08 +serdes_driver_current_lane2_114=0x09 +serdes_driver_current_lane3_114=0x09 +serdes_preemphasis_lane0_114=0x204e02 +serdes_preemphasis_lane1_114=0x1d5102 +serdes_preemphasis_lane2_114=0x224c02 +serdes_preemphasis_lane3_114=0x224c02 + +#ce6 +serdes_driver_current_lane0_1=0x09 +serdes_driver_current_lane1_1=0x0a +serdes_driver_current_lane2_1=0x09 +serdes_driver_current_lane3_1=0x0a +serdes_preemphasis_lane0_1=0x244a02 +serdes_preemphasis_lane1_1=0x254902 +serdes_preemphasis_lane2_1=0x244a02 +serdes_preemphasis_lane3_1=0x254902 + +#ce7 +serdes_driver_current_lane0_5=0x09 +serdes_driver_current_lane1_5=0x09 +serdes_driver_current_lane2_5=0x09 +serdes_driver_current_lane3_5=0x0a +serdes_preemphasis_lane0_5=0x244a02 +serdes_preemphasis_lane1_5=0x244a02 +serdes_preemphasis_lane2_5=0x244a02 +serdes_preemphasis_lane3_5=0x254902 + diff --git a/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-10-50/port_config.ini b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-10-50/port_config.ini new file mode 100644 index 00000000000..7f977a26e1f --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-10-50/port_config.ini @@ -0,0 +1,113 @@ +# name lanes alias index speed +Ethernet0 65 Eth1/1 1 10000 +Ethernet1 66 Eth1/2 1 10000 +Ethernet2 67 Eth1/3 1 10000 +Ethernet3 68 Eth1/4 1 10000 +Ethernet4 69 Eth2/1 2 10000 +Ethernet5 70 Eth2/2 2 10000 +Ethernet6 71 Eth2/3 2 10000 +Ethernet7 72 Eth2/4 2 10000 +Ethernet8 73 Eth3/1 3 10000 +Ethernet9 74 Eth3/2 3 10000 +Ethernet10 75 Eth3/3 3 10000 +Ethernet11 76 Eth3/4 3 10000 +Ethernet12 77 Eth4/1 4 10000 +Ethernet13 78 Eth4/2 4 10000 +Ethernet14 79 Eth4/3 4 10000 +Ethernet15 80 Eth4/4 4 10000 +Ethernet16 33 Eth5/1 5 10000 +Ethernet17 34 Eth5/2 5 10000 +Ethernet18 35 Eth5/3 5 10000 +Ethernet19 36 Eth5/4 5 10000 +Ethernet20 37 Eth6/1 6 10000 +Ethernet21 38 Eth6/2 6 10000 +Ethernet22 39 Eth6/3 6 10000 +Ethernet23 40 Eth6/4 6 10000 +Ethernet24 41 Eth7/1 7 10000 +Ethernet25 42 Eth7/2 7 10000 +Ethernet26 43 Eth7/3 7 10000 +Ethernet27 44 Eth7/4 7 10000 +Ethernet28 45 Eth8/1 8 10000 +Ethernet29 46 Eth8/2 8 10000 +Ethernet30 47 Eth8/3 8 10000 +Ethernet31 48 Eth8/4 8 10000 +Ethernet32 49 Eth9/1 9 10000 +Ethernet33 50 Eth9/2 9 10000 +Ethernet34 51 Eth9/3 9 10000 +Ethernet35 52 Eth9/4 9 10000 +Ethernet36 53 Eth10/1 10 10000 +Ethernet37 54 Eth10/2 10 10000 +Ethernet38 55 Eth10/3 10 10000 +Ethernet39 56 Eth10/4 10 10000 +Ethernet40 57 Eth11/1 11 10000 +Ethernet41 58 Eth11/2 11 10000 +Ethernet42 59 Eth11/3 11 10000 +Ethernet43 60 Eth11/4 11 10000 +Ethernet44 61 Eth12/1 12 10000 +Ethernet45 62 Eth12/2 12 10000 +Ethernet46 63 Eth12/3 12 10000 +Ethernet47 64 Eth12/4 12 10000 +Ethernet48 81 Eth13/1 13 10000 +Ethernet49 82 Eth13/2 13 10000 +Ethernet50 83 Eth13/3 13 10000 +Ethernet51 84 Eth13/4 13 10000 +Ethernet52 85 Eth14/1 14 10000 +Ethernet53 86 Eth14/2 14 10000 +Ethernet54 87 Eth14/3 14 10000 +Ethernet55 88 Eth14/4 14 10000 +Ethernet56 89 Eth15/1 15 10000 +Ethernet57 90 Eth15/2 15 10000 +Ethernet58 91 Eth15/3 15 10000 +Ethernet59 92 Eth15/4 15 10000 +Ethernet60 93 Eth16/1 16 10000 +Ethernet61 94 Eth16/2 16 10000 +Ethernet62 95 Eth16/3 16 10000 +Ethernet63 96 Eth16/4 16 10000 +Ethernet64 97 Eth17/1 17 10000 +Ethernet65 98 Eth17/2 17 10000 +Ethernet66 99 Eth17/3 17 10000 +Ethernet67 100 Eth17/4 17 10000 +Ethernet68 101 Eth18/1 18 10000 +Ethernet69 102 Eth18/2 18 10000 +Ethernet70 103 Eth18/3 18 10000 +Ethernet71 104 Eth18/4 18 10000 +Ethernet72 105 Eth19/1 19 10000 +Ethernet73 106 Eth19/2 19 10000 +Ethernet74 107 Eth19/3 19 10000 +Ethernet75 108 Eth19/4 19 10000 +Ethernet76 109 Eth20/1 20 10000 +Ethernet77 110 Eth20/2 20 10000 +Ethernet78 111 Eth20/3 20 10000 +Ethernet79 112 Eth20/4 20 10000 +Ethernet80 1 Eth21/1 21 10000 +Ethernet81 2 Eth21/2 21 10000 +Ethernet82 3 Eth21/3 21 10000 +Ethernet83 4 Eth21/4 21 10000 +Ethernet84 5 Eth22/1 22 10000 +Ethernet85 6 Eth22/2 22 10000 +Ethernet86 7 Eth22/3 22 10000 +Ethernet87 8 Eth22/4 22 10000 +Ethernet88 9 Eth23/1 23 10000 +Ethernet89 10 Eth23/2 23 10000 +Ethernet90 11 Eth23/3 23 10000 +Ethernet91 12 Eth23/4 23 10000 +Ethernet92 13 Eth24/1 24 10000 +Ethernet93 14 Eth24/2 24 10000 +Ethernet94 15 Eth24/3 25 10000 +Ethernet95 16 Eth24/4 25 10000 +Ethernet96 17,18 Eth25/1 26 50000 +Ethernet98 19,20 Eth25/2 26 50000 +Ethernet100 21,22 Eth26/1 27 50000 +Ethernet102 23,24 Eth26/2 27 50000 +Ethernet104 25,26 Eth27/1 28 50000 +Ethernet106 27,28 Eth27/2 28 50000 +Ethernet108 29,30 Eth28/1 29 50000 +Ethernet110 31,32 Eth28/2 29 50000 +Ethernet112 113,114 Eth29/1 30 50000 +Ethernet114 115,116 Eth29/2 30 50000 +Ethernet116 117,118 Eth30/1 31 50000 +Ethernet118 119,120 Eth30/2 31 50000 +Ethernet120 121,122 Eth31/1 32 50000 +Ethernet122 123,124 Eth31/2 32 50000 +Ethernet124 125,126 Eth32/1 32 50000 +Ethernet126 127,128 Eth32/2 32 50000 \ No newline at end of file diff --git a/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-10-50/sai.profile b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-10-50/sai.profile new file mode 100644 index 00000000000..7342ae8002e --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-10-50/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/platform/th-seastone-dx010-config-flex-all.bcm diff --git a/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-25-50/port_config.ini b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-25-50/port_config.ini new file mode 100644 index 00000000000..bcf1388e7c5 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-25-50/port_config.ini @@ -0,0 +1,113 @@ +# name lanes alias index speed +Ethernet0 65 Eth1/1 1 25000 +Ethernet1 66 Eth1/2 1 25000 +Ethernet2 67 Eth1/3 1 25000 +Ethernet3 68 Eth1/4 1 25000 +Ethernet4 69 Eth2/1 2 25000 +Ethernet5 70 Eth2/2 2 25000 +Ethernet6 71 Eth2/3 2 25000 +Ethernet7 72 Eth2/4 2 25000 +Ethernet8 73 Eth3/1 3 25000 +Ethernet9 74 Eth3/2 3 25000 +Ethernet10 75 Eth3/3 3 25000 +Ethernet11 76 Eth3/4 3 25000 +Ethernet12 77 Eth4/1 4 25000 +Ethernet13 78 Eth4/2 4 25000 +Ethernet14 79 Eth4/3 4 25000 +Ethernet15 80 Eth4/4 4 25000 +Ethernet16 33 Eth5/1 5 25000 +Ethernet17 34 Eth5/2 5 25000 +Ethernet18 35 Eth5/3 5 25000 +Ethernet19 36 Eth5/4 5 25000 +Ethernet20 37 Eth6/1 6 25000 +Ethernet21 38 Eth6/2 6 25000 +Ethernet22 39 Eth6/3 6 25000 +Ethernet23 40 Eth6/4 6 25000 +Ethernet24 41 Eth7/1 7 25000 +Ethernet25 42 Eth7/2 7 25000 +Ethernet26 43 Eth7/3 7 25000 +Ethernet27 44 Eth7/4 7 25000 +Ethernet28 45 Eth8/1 8 25000 +Ethernet29 46 Eth8/2 8 25000 +Ethernet30 47 Eth8/3 8 25000 +Ethernet31 48 Eth8/4 8 25000 +Ethernet32 49 Eth9/1 9 25000 +Ethernet33 50 Eth9/2 9 25000 +Ethernet34 51 Eth9/3 9 25000 +Ethernet35 52 Eth9/4 9 25000 +Ethernet36 53 Eth10/1 10 25000 +Ethernet37 54 Eth10/2 10 25000 +Ethernet38 55 Eth10/3 10 25000 +Ethernet39 56 Eth10/4 10 25000 +Ethernet40 57 Eth11/1 11 25000 +Ethernet41 58 Eth11/2 11 25000 +Ethernet42 59 Eth11/3 11 25000 +Ethernet43 60 Eth11/4 11 25000 +Ethernet44 61 Eth12/1 12 25000 +Ethernet45 62 Eth12/2 12 25000 +Ethernet46 63 Eth12/3 12 25000 +Ethernet47 64 Eth12/4 12 25000 +Ethernet48 81 Eth13/1 13 25000 +Ethernet49 82 Eth13/2 13 25000 +Ethernet50 83 Eth13/3 13 25000 +Ethernet51 84 Eth13/4 13 25000 +Ethernet52 85 Eth14/1 14 25000 +Ethernet53 86 Eth14/2 14 25000 +Ethernet54 87 Eth14/3 14 25000 +Ethernet55 88 Eth14/4 14 25000 +Ethernet56 89 Eth15/1 15 25000 +Ethernet57 90 Eth15/2 15 25000 +Ethernet58 91 Eth15/3 15 25000 +Ethernet59 92 Eth15/4 15 25000 +Ethernet60 93 Eth16/1 16 25000 +Ethernet61 94 Eth16/2 16 25000 +Ethernet62 95 Eth16/3 16 25000 +Ethernet63 96 Eth16/4 16 25000 +Ethernet64 97 Eth17/1 17 25000 +Ethernet65 98 Eth17/2 17 25000 +Ethernet66 99 Eth17/3 17 25000 +Ethernet67 100 Eth17/4 17 25000 +Ethernet68 101 Eth18/1 18 25000 +Ethernet69 102 Eth18/2 18 25000 +Ethernet70 103 Eth18/3 18 25000 +Ethernet71 104 Eth18/4 18 25000 +Ethernet72 105 Eth19/1 19 25000 +Ethernet73 106 Eth19/2 19 25000 +Ethernet74 107 Eth19/3 19 25000 +Ethernet75 108 Eth19/4 19 25000 +Ethernet76 109 Eth20/1 20 25000 +Ethernet77 110 Eth20/2 20 25000 +Ethernet78 111 Eth20/3 20 25000 +Ethernet79 112 Eth20/4 20 25000 +Ethernet80 1 Eth21/1 21 25000 +Ethernet81 2 Eth21/2 21 25000 +Ethernet82 3 Eth21/3 21 25000 +Ethernet83 4 Eth21/4 21 25000 +Ethernet84 5 Eth22/1 22 25000 +Ethernet85 6 Eth22/2 22 25000 +Ethernet86 7 Eth22/3 22 25000 +Ethernet87 8 Eth22/4 22 25000 +Ethernet88 9 Eth23/1 23 25000 +Ethernet89 10 Eth23/2 23 25000 +Ethernet90 11 Eth23/3 23 25000 +Ethernet91 12 Eth23/4 23 25000 +Ethernet92 13 Eth24/1 24 25000 +Ethernet93 14 Eth24/2 24 25000 +Ethernet94 15 Eth24/3 24 25000 +Ethernet95 16 Eth24/4 24 25000 +Ethernet96 17,18 Eth25/1 25 50000 +Ethernet98 19,20 Eth25/2 25 50000 +Ethernet100 21,22 Eth26/1 26 50000 +Ethernet102 23,24 Eth26/2 26 50000 +Ethernet104 25,26 Eth27/1 27 50000 +Ethernet106 27,28 Eth27/2 27 50000 +Ethernet108 29,30 Eth28/1 28 50000 +Ethernet110 31,32 Eth28/2 28 50000 +Ethernet112 113,114 Eth29/1 29 50000 +Ethernet114 115,116 Eth29/2 29 50000 +Ethernet116 117,118 Eth30/1 30 50000 +Ethernet118 119,120 Eth30/2 30 50000 +Ethernet120 121,122 Eth31/1 31 50000 +Ethernet122 123,124 Eth31/2 31 50000 +Ethernet124 125,126 Eth32/1 32 50000 +Ethernet126 127,128 Eth32/2 32 50000 diff --git a/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-25-50/sai.profile b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-25-50/sai.profile new file mode 100644 index 00000000000..7342ae8002e --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-25-50/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/platform/th-seastone-dx010-config-flex-all.bcm diff --git a/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-50-40/port_config.ini b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-50-40/port_config.ini new file mode 100644 index 00000000000..0fc9d317176 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-50-40/port_config.ini @@ -0,0 +1,49 @@ +# name lanes alias index speed +Ethernet0 65,66 Eth1/1 1 50000 +Ethernet2 67,68 Eth1/2 1 50000 +Ethernet4 69,70 Eth2/1 2 50000 +Ethernet6 71,72 Eth2/2 2 50000 +Ethernet8 73,74 Eth3/1 3 50000 +Ethernet10 75,76 Eth3/2 3 50000 +Ethernet12 77,78 Eth4/1 4 50000 +Ethernet14 79,80 Eth4/2 4 50000 +Ethernet16 33,34 Eth5/1 5 50000 +Ethernet18 35,36 Eth5/2 5 50000 +Ethernet20 37,38 Eth6/1 6 50000 +Ethernet22 39,40 Eth6/2 6 50000 +Ethernet24 41,42 Eth7/1 7 50000 +Ethernet26 43,44 Eth7/2 7 50000 +Ethernet28 45,46 Eth8/1 8 50000 +Ethernet30 47,48 Eth8/2 8 50000 +Ethernet32 49,50 Eth9/1 9 50000 +Ethernet34 51,52 Eth9/2 9 50000 +Ethernet36 53,54 Eth10/1 10 50000 +Ethernet38 55,56 Eth10/2 10 50000 +Ethernet40 57,58 Eth11/1 11 50000 +Ethernet42 59,60 Eth11/2 11 50000 +Ethernet44 61,62 Eth12/1 12 50000 +Ethernet46 63,64 Eth12/2 12 50000 +Ethernet48 81,82 Eth13/1 13 50000 +Ethernet50 83,84 Eth13/2 13 50000 +Ethernet52 85,86 Eth14/1 14 50000 +Ethernet54 87,88 Eth14/2 14 50000 +Ethernet56 89,90 Eth15/1 15 50000 +Ethernet58 91,92 Eth15/2 15 50000 +Ethernet60 93,94 Eth16/1 16 50000 +Ethernet62 95,96 Eth16/2 16 50000 +Ethernet64 97,98,99,100 Eth17 17 40000 +Ethernet68 101,102,103,104 Eth18 18 40000 +Ethernet72 105,106,107,108 Eth19 19 40000 +Ethernet76 109,110,111,112 Eth20 20 40000 +Ethernet80 1,2,3,4 Eth21 21 40000 +Ethernet84 5,6,7,8 Eth22 22 40000 +Ethernet88 9,10,11,12 Eth23 23 40000 +Ethernet92 13,14,15,16 Eth24 24 40000 +Ethernet96 17,18,19,20 Eth25 25 40000 +Ethernet100 21,22,23,24 Eth26 26 40000 +Ethernet104 25,26,27,28 Eth27 27 40000 +Ethernet108 29,30,31,32 Eth28 28 40000 +Ethernet112 113,114,115,116 Eth29 29 40000 +Ethernet116 117,118,119,120 Eth30 30 40000 +Ethernet120 121,122,123,124 Eth31 31 40000 +Ethernet124 125,126,127,128 Eth32 32 40000 diff --git a/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-50-40/sai.profile b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-50-40/sai.profile new file mode 100644 index 00000000000..7342ae8002e --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-50-40/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/platform/th-seastone-dx010-config-flex-all.bcm diff --git a/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-50/port_config.ini b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-50/port_config.ini new file mode 100644 index 00000000000..bed33e9ed0f --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-50/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias index speed +Ethernet0 65,66 Eth1/1 1 50000 +Ethernet2 67,68 Eth1/2 1 50000 +Ethernet4 69,70 Eth2/1 2 50000 +Ethernet6 71,72 Eth2/2 2 50000 +Ethernet8 73,74 Eth3/1 3 50000 +Ethernet10 75,76 Eth3/2 3 50000 +Ethernet12 77,78 Eth4/1 4 50000 +Ethernet14 79,80 Eth4/2 4 50000 +Ethernet16 33,34 Eth5/1 5 50000 +Ethernet18 35,36 Eth5/2 5 50000 +Ethernet20 37,38 Eth6/1 6 50000 +Ethernet22 39,40 Eth6/2 6 50000 +Ethernet24 41,42 Eth7/1 7 50000 +Ethernet26 43,44 Eth7/2 7 50000 +Ethernet28 45,46 Eth8/1 8 50000 +Ethernet30 47,48 Eth8/2 8 50000 +Ethernet32 49,50 Eth9/1 9 50000 +Ethernet34 51,52 Eth9/2 9 50000 +Ethernet36 53,54 Eth10/1 10 50000 +Ethernet38 55,56 Eth10/2 10 50000 +Ethernet40 57,58 Eth11/1 11 50000 +Ethernet42 59,60 Eth11/2 11 50000 +Ethernet44 61,62 Eth12/1 12 50000 +Ethernet46 63,64 Eth12/2 12 50000 +Ethernet48 81,82 Eth13/1 13 50000 +Ethernet50 83,84 Eth13/2 13 50000 +Ethernet52 85,86 Eth14/1 14 50000 +Ethernet54 87,88 Eth14/2 14 50000 +Ethernet56 89,90 Eth15/1 15 50000 +Ethernet58 91,92 Eth15/2 15 50000 +Ethernet60 93,94 Eth16/1 16 50000 +Ethernet62 95,96 Eth16/2 16 50000 +Ethernet64 97,98 Eth17/1 17 50000 +Ethernet66 99,100 Eth17/2 17 50000 +Ethernet68 101,102 Eth18/1 18 50000 +Ethernet70 103,104 Eth18/2 18 50000 +Ethernet72 105,106 Eth19/1 19 50000 +Ethernet74 107,108 Eth19/2 19 50000 +Ethernet76 109,110 Eth20/1 20 50000 +Ethernet78 111,112 Eth20/2 20 50000 +Ethernet80 1,2 Eth21/1 21 50000 +Ethernet82 3,4 Eth21/2 21 50000 +Ethernet84 5,6 Eth22/1 22 50000 +Ethernet86 7,8 Eth22/2 22 50000 +Ethernet88 9,10 Eth23/1 23 50000 +Ethernet90 11,12 Eth23/2 23 50000 +Ethernet92 13,14 Eth24/1 24 50000 +Ethernet94 15,16 Eth24/2 24 50000 +Ethernet96 17,18 Eth25/1 25 50000 +Ethernet98 19,20 Eth25/2 25 50000 +Ethernet100 21,22 Eth26/1 26 50000 +Ethernet102 23,24 Eth26/2 26 50000 +Ethernet104 25,26 Eth27/1 27 50000 +Ethernet106 27,28 Eth27/2 27 50000 +Ethernet108 29,30 Eth28/1 28 50000 +Ethernet110 31,32 Eth28/2 28 50000 +Ethernet112 113,114 Eth29/1 29 50000 +Ethernet114 115,116 Eth29/2 29 50000 +Ethernet116 117,118 Eth30/1 30 50000 +Ethernet118 119,120 Eth30/2 30 50000 +Ethernet120 121,122 Eth31/1 31 50000 +Ethernet122 123,124 Eth31/2 31 50000 +Ethernet124 125,126 Eth32/1 32 50000 +Ethernet126 127,128 Eth32/2 32 50000 \ No newline at end of file diff --git a/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-50/sai.profile b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-50/sai.profile new file mode 100644 index 00000000000..7342ae8002e --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010-50/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/platform/th-seastone-dx010-config-flex-all.bcm diff --git a/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010/port_config.ini b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010/port_config.ini new file mode 100644 index 00000000000..91d2f91d41c --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 65,66,67,68 Eth1 1 100000 +Ethernet4 69,70,71,72 Eth2 2 100000 +Ethernet8 73,74,75,76 Eth3 3 100000 +Ethernet12 77,78,79,80 Eth4 4 100000 +Ethernet16 33,34,35,36 Eth5 5 100000 +Ethernet20 37,38,39,40 Eth6 6 100000 +Ethernet24 41,42,43,44 Eth7 7 100000 +Ethernet28 45,46,47,48 Eth8 8 100000 +Ethernet32 49,50,51,52 Eth9 9 100000 +Ethernet36 53,54,55,56 Eth10 10 100000 +Ethernet40 57,58,59,60 Eth11 11 100000 +Ethernet44 61,62,63,64 Eth12 12 100000 +Ethernet48 81,82,83,84 Eth13 13 100000 +Ethernet52 85,86,87,88 Eth14 14 100000 +Ethernet56 89,90,91,92 Eth15 15 100000 +Ethernet60 93,94,95,96 Eth16 16 100000 +Ethernet64 97,98,99,100 Eth17 17 100000 +Ethernet68 101,102,103,104 Eth18 18 100000 +Ethernet72 105,106,107,108 Eth19 19 100000 +Ethernet76 109,110,111,112 Eth20 20 100000 +Ethernet80 1,2,3,4 Eth21 21 100000 +Ethernet84 5,6,7,8 Eth22 22 100000 +Ethernet88 9,10,11,12 Eth23 23 100000 +Ethernet92 13,14,15,16 Eth24 24 100000 +Ethernet96 17,18,19,20 Eth25 25 100000 +Ethernet100 21,22,23,24 Eth26 26 100000 +Ethernet104 25,26,27,28 Eth27 27 100000 +Ethernet108 29,30,31,32 Eth28 28 100000 +Ethernet112 113,114,115,116 Eth29 29 100000 +Ethernet116 117,118,119,120 Eth30 30 100000 +Ethernet120 121,122,123,124 Eth31 31 100000 +Ethernet124 125,126,127,128 Eth32 32 100000 \ No newline at end of file diff --git a/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010/sai.profile b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010/sai.profile new file mode 100644 index 00000000000..7342ae8002e --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/Seastone-DX010/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/platform/th-seastone-dx010-config-flex-all.bcm diff --git a/device/celestica/x86_64-cel_seastone-r0/default_sku b/device/celestica/x86_64-cel_seastone-r0/default_sku new file mode 100644 index 00000000000..0c95475c850 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/default_sku @@ -0,0 +1 @@ +Seastone-DX010 t1 diff --git a/device/celestica/x86_64-cel_seastone-r0/fancontrol b/device/celestica/x86_64-cel_seastone-r0/fancontrol new file mode 100644 index 00000000000..8d5cbccb9d0 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/fancontrol @@ -0,0 +1,12 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH=hwmon6=devices/pci0000:00/0000:00:13.0/i2c-1/i2c-13/13-002e hwmon7=devices/pci0000:00/0000:00:13.0/i2c-1/i2c-13/13-004d +DEVNAME=hwmon6=emc2305 hwmon7=emc2305 +FCTEMPS=hwmon6/device/pwm1=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-5/5-0048/hwmon/hwmon1/temp1_input hwmon6/device/pwm2=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-5/5-0048/hwmon/hwmon1/temp1_input hwmon6/device/pwm3=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-5/5-0048/hwmon/hwmon1/temp1_input hwmon6/device/pwm4=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-5/5-0048/hwmon/hwmon1/temp1_input hwmon6/device/pwm5=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-5/5-0048/hwmon/hwmon1/temp1_input hwmon7/device/pwm1=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-5/5-0048/hwmon/hwmon1/temp1_input hwmon7/device/pwm2=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-5/5-0048/hwmon/hwmon1/temp1_input hwmon7/device/pwm3=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-5/5-0048/hwmon/hwmon1/temp1_input hwmon7/device/pwm4=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-5/5-0048/hwmon/hwmon1/temp1_input hwmon7/device/pwm5=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-5/5-0048/hwmon/hwmon1/temp1_input +FCFANS=hwmon7/device/pwm5=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-13/13-004d/pwm5 hwmon7/device/pwm4=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-13/13-004d/pwm4 hwmon7/device/pwm3=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-13/13-004d/pwm3 hwmon7/device/pwm2=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-13/13-004d/pwm2 hwmon7/device/pwm1=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-13/13-004d/pwm1 hwmon6/device/pwm5=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-13/13-002e/pwm5 hwmon6/device/pwm4=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-13/13-002e/pwm4 hwmon6/device/pwm3=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-13/13-002e/pwm3 hwmon6/device/pwm2=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-13/13-002e/pwm2 hwmon6/device/pwm1=/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-13/13-002e/pwm1 +MINTEMP=hwmon6/device/pwm1=26 hwmon6/device/pwm2=26 hwmon6/device/pwm3=26 hwmon6/device/pwm4=26 hwmon6/device/pwm5=26 hwmon7/device/pwm1=26 hwmon7/device/pwm2=26 hwmon7/device/pwm3=26 hwmon7/device/pwm4=26 hwmon7/device/pwm5=26 +MAXTEMP=hwmon6/device/pwm1=45 hwmon6/device/pwm2=45 hwmon6/device/pwm3=45 hwmon6/device/pwm4=45 hwmon6/device/pwm5=45 hwmon7/device/pwm1=45 hwmon7/device/pwm2=45 hwmon7/device/pwm3=45 hwmon7/device/pwm4=45 hwmon7/device/pwm5=45 +MINSTART=hwmon6/device/pwm1=89 hwmon6/device/pwm2=89 hwmon6/device/pwm3=89 hwmon6/device/pwm4=89 hwmon6/device/pwm5=89 hwmon7/device/pwm1=89 hwmon7/device/pwm2=89 hwmon7/device/pwm3=89 hwmon7/device/pwm4=89 hwmon7/device/pwm5=89 +MINSTOP=hwmon6/device/pwm1=89 hwmon6/device/pwm2=89 hwmon6/device/pwm3=89 hwmon6/device/pwm4=89 hwmon6/device/pwm5=89 hwmon7/device/pwm1=89 hwmon7/device/pwm2=89 hwmon7/device/pwm3=89 hwmon7/device/pwm4=89 hwmon7/device/pwm5=89 +MINPWM=hwmon6/device/pwm1=89 hwmon6/device/pwm2=89 hwmon6/device/pwm3=89 hwmon6/device/pwm4=89 hwmon6/device/pwm5=89 hwmon7/device/pwm1=89 hwmon7/device/pwm2=89 hwmon7/device/pwm3=89 hwmon7/device/pwm4=89 hwmon7/device/pwm5=89 +MAXPWM=hwmon6/device/pwm1=255 hwmon6/device/pwm2=255 hwmon6/device/pwm3=255 hwmon6/device/pwm4=255 hwmon6/device/pwm5=255 hwmon7/device/pwm1=255 hwmon7/device/pwm2=255 hwmon7/device/pwm3=255 hwmon7/device/pwm4=255 hwmon7/device/pwm5=255 diff --git a/device/celestica/x86_64-cel_seastone-r0/installer.conf b/device/celestica/x86_64-cel_seastone-r0/installer.conf new file mode 100644 index 00000000000..456a3ae8f4e --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich" \ No newline at end of file diff --git a/device/celestica/x86_64-cel_seastone-r0/led-code/ledcode0 b/device/celestica/x86_64-cel_seastone-r0/led-code/ledcode0 new file mode 100755 index 00000000000..829087013a2 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/led-code/ledcode0 @@ -0,0 +1,16 @@ + 02 20 28 67 2A 12 30 D1 74 02 02 00 28 67 2A 12 + 20 D1 74 0C 02 30 28 67 2A 12 40 D1 74 16 12 E0 + 85 05 D2 05 71 28 52 00 3A 80 67 7C 75 30 77 42 + 67 83 75 36 77 53 67 8A 75 3C 77 42 67 91 75 64 + 77 64 67 75 75 A9 28 67 9F 75 B4 16 E0 DA 04 74 + A9 77 B4 67 75 75 BF 28 67 9F 75 C6 16 E0 DA 04 + 74 BF 77 C6 67 75 75 CD 28 67 9F 75 D2 16 E0 DA + 04 74 CD 77 D2 12 A0 F8 15 1A 00 57 12 A0 F8 15 + 1A 01 57 12 A0 F8 15 1A 02 57 12 A0 F8 15 1A 03 + 57 12 A0 F8 15 1A 04 57 12 A0 F8 15 1A 05 57 28 + 32 00 32 01 B7 97 77 A8 57 67 D7 67 DE 67 DE 67 + DE F2 04 57 67 E5 67 DE 67 DE 67 DE F2 04 57 67 + D7 67 DE F2 02 57 67 E5 67 DE F2 02 57 67 D7 F2 + 01 57 67 E5 F2 01 57 32 0F 87 32 0F 87 57 32 0F + 87 32 0E 87 57 32 0E 87 32 0E 87 57 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/device/celestica/x86_64-cel_seastone-r0/led-code/ledcode1 b/device/celestica/x86_64-cel_seastone-r0/led-code/ledcode1 new file mode 100755 index 00000000000..829087013a2 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/led-code/ledcode1 @@ -0,0 +1,16 @@ + 02 20 28 67 2A 12 30 D1 74 02 02 00 28 67 2A 12 + 20 D1 74 0C 02 30 28 67 2A 12 40 D1 74 16 12 E0 + 85 05 D2 05 71 28 52 00 3A 80 67 7C 75 30 77 42 + 67 83 75 36 77 53 67 8A 75 3C 77 42 67 91 75 64 + 77 64 67 75 75 A9 28 67 9F 75 B4 16 E0 DA 04 74 + A9 77 B4 67 75 75 BF 28 67 9F 75 C6 16 E0 DA 04 + 74 BF 77 C6 67 75 75 CD 28 67 9F 75 D2 16 E0 DA + 04 74 CD 77 D2 12 A0 F8 15 1A 00 57 12 A0 F8 15 + 1A 01 57 12 A0 F8 15 1A 02 57 12 A0 F8 15 1A 03 + 57 12 A0 F8 15 1A 04 57 12 A0 F8 15 1A 05 57 28 + 32 00 32 01 B7 97 77 A8 57 67 D7 67 DE 67 DE 67 + DE F2 04 57 67 E5 67 DE 67 DE 67 DE F2 04 57 67 + D7 67 DE F2 02 57 67 E5 67 DE F2 02 57 67 D7 F2 + 01 57 67 E5 F2 01 57 32 0F 87 32 0F 87 57 32 0F + 87 32 0E 87 57 32 0E 87 32 0E 87 57 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/device/celestica/x86_64-cel_seastone-r0/led-code/ledcode2 b/device/celestica/x86_64-cel_seastone-r0/led-code/ledcode2 new file mode 100755 index 00000000000..9e30d9d28fb --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/led-code/ledcode2 @@ -0,0 +1,8 @@ +02 01 28 67 16 02 01 28 67 16 12 E0 85 05 D2 05 +71 14 52 00 3A 04 67 3C 75 54 77 1C 67 43 75 22 +77 2F 28 67 4A 75 57 16 E0 DA 04 74 54 77 57 28 +67 4A 75 57 16 E0 DA 04 74 54 77 57 12 A0 F8 15 +1A 00 57 12 A0 F8 15 1A 01 57 28 32 00 32 01 B7 +97 77 53 57 67 5D 57 67 6B 57 67 64 57 32 0F 87 +32 0F 87 57 32 0E 87 32 0F 87 57 32 0E 87 32 0E +87 57 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/device/celestica/x86_64-cel_seastone-r0/led_proc_init.soc b/device/celestica/x86_64-cel_seastone-r0/led_proc_init.soc new file mode 100755 index 00000000000..450533c0dc6 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/led_proc_init.soc @@ -0,0 +1,8 @@ +# Download LED code into LED processor and enable (if applicable). + +led 0 load /usr/share/sonic/platform/led-code/ledcode0; +led 0 auto on; led 0 start; +led 1 load /usr/share/sonic/platform/led-code/ledcode1; +led 1 auto on; led 1 start; +led 2 load /usr/share/sonic/platform/led-code/ledcode2; +led 2 auto on; led 2 start diff --git a/device/celestica/x86_64-cel_seastone-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_seastone-r0/plugins/eeprom.py new file mode 100644 index 00000000000..29f01a07fc7 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/plugins/eeprom.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica DX010 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-12/12-0050/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) + diff --git a/device/celestica/x86_64-cel_seastone-r0/plugins/psuutil.py b/device/celestica/x86_64-cel_seastone-r0/plugins/psuutil.py new file mode 100644 index 00000000000..b2764b5b6ae --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/plugins/psuutil.py @@ -0,0 +1,82 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + +import os + + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +GPIO_DIR = "/sys/class/gpio" +GPIO_LABEL = "pca9505" +DX010_MAX_PSUS = 2 + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + # DX010 PSU pin mapping + self.dx010_psu_gpio = [ + {'base': self.__get_gpio_base()}, + {'prs': 27, 'status': 22}, + {'prs': 28, 'status': 25} + ] + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return "" + + def __get_gpio_base(self): + for r in os.listdir(GPIO_DIR): + label_path = os.path.join(GPIO_DIR, r, "label") + if "gpiochip" in r and GPIO_LABEL in self.__read_txt_file(label_path): + return int(r[8:], 10) + return 216 # Reserve + + def __get_gpio_value(self, pinnum): + gpio_base = self.dx010_psu_gpio[0]['base'] + gpio_dir = GPIO_DIR + '/gpio' + str(gpio_base+pinnum) + gpio_file = gpio_dir + "/value" + retval = self.__read_txt_file(gpio_file) + return retval.rstrip('\r\n') + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + return DX010_MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + raw = self.__get_gpio_value( + self.dx010_psu_gpio[index]['status']) + return int(raw, 10) == 1 + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + raw = self.__get_gpio_value(self.dx010_psu_gpio[index]['prs']) + return int(raw, 10) == 0 diff --git a/device/celestica/x86_64-cel_seastone-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_seastone-r0/plugins/sfputil.py new file mode 100644 index 00000000000..c361659b0f1 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/plugins/sfputil.py @@ -0,0 +1,204 @@ +#!/usr/bin/env python +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 32 + PORTS_IN_BLOCK = 32 + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + + for x in range(self.PORT_START, self.PORT_END + 1): + if self.port_start == 1: + self.port_to_eeprom_mapping[x] = eeprom_path.format((x - 1) + 26) + else: + self.port_to_eeprom_mapping[x] = eeprom_path.format(x + 26) + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/dx010_cpld/qsfp_modprs", "r") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + if self.port_start == 1: + bit_index = port_num - 1 + else: + bit_index = port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/dx010_cpld/qsfp_lpmode", "r") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + if self.port_start == 1: + bit_index = port_num - 1 + else: + bit_index = port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/dx010_cpld/qsfp_lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + if self.port_start == 1: + bit_index = port_num - 1 + else: + bit_index = port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value).strip('L') + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/dx010_cpld/qsfp_reset", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the + # register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + if self.port_start == 1: + bit_index = port_num - 1 + else: + bit_index = port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value).rstrip('L')) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port + # out of reset + try: + reg_file = open("/sys/devices/platform/dx010_cpld/qsfp_reset", "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value).rstrip('L')) + reg_file.close() + + return True + + def get_transceiver_change_event(self, timeout=0): + raise NotImplementedError diff --git a/device/celestica/x86_64-cel_seastone-r0/sensors.conf b/device/celestica/x86_64-cel_seastone-r0/sensors.conf new file mode 100644 index 00000000000..d92d6534e76 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/sensors.conf @@ -0,0 +1,73 @@ +# libsensors configuration file for Celestica DX010. +# The i2c bus portion is omit because adapter name +# changes every time when system boot up. + +chip "dps460-i2c-*-5a" + label temp1 "Power Supply 1 temp sensor 1" + label temp2 "Power Supply 1 temp sensor 2" + label temp3 "Power Supply 1 temp sensor 3" + ignore fan2 + ignore fan3 + ignore in2 + + set in1_max 240 + set in1_min 100 + set in1_crit 264 + set in1_lcrit 90 + set in3_max 12.6 + set in3_min 11.4 + set in3_crit 13.0 + set in3_lcrit 11.0 + +chip "dps460-i2c-*-5b" + label temp1 "Power Supply 2 temp sensor 1" + label temp2 "Power Supply 2 temp sensor 2" + label temp3 "Power Supply 2 temp sensor 3" + ignore fan2 + ignore fan3 + ignore in2 + + set in1_max 240 + set in1_min 100 + set in1_crit 264 + set in1_lcrit 90 + set in3_max 12.6 + set in3_min 11.4 + set in3_crit 13.0 + set in3_lcrit 11.0 + +# These sensors located on Main Switch Board. +chip "lm75b-i2c-*-48" + label temp1 "Front-panel temp sensor 1" + set temp1_max 50 + +chip "lm75b-i2c-*-49" + label temp1 "Front-panel temp sensor 2" + set temp1_max 50 + +chip "lm75b-i2c-*-4a" + label temp1 "ASIC temp sensor" + set temp1_max 70 + +# These sensors located on CPU Board. +chip "lm75b-i2c-*-48" + label temp1 "Rear-panel temp sensor 1" + set temp1_max 70 + +chip "lm75b-i2c-*-4e" + label temp1 "Rear-panel temp sensor 2" + set temp1_max 70 + +chip "emc2305-i2c-*-2e" + label fan2 "fan1" + label fan1 "fan2" + label fan4 "fan3" + label fan5 "fan4" + label fan3 "fan5" + +chip "emc2305-i2c-*-4d" + label fan2 "fan1" + label fan4 "fan2" + label fan5 "fan3" + label fan3 "fan4" + label fan1 "fan5" diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/__init__.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/__init__.py new file mode 100644 index 00000000000..d82f3749319 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import * diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/chassis.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/chassis.py new file mode 100644 index 00000000000..c9447b56a2f --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/chassis.py @@ -0,0 +1,148 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Chassis information which are available in the platform +# +############################################################################# + +import sys +import re +import os +import subprocess +import json + +try: + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.fan import Fan + from sonic_platform.psu import Psu + from sonic_platform.component import Component + from sonic_platform.watchdog import Watchdog + from sonic_platform.thermal import Thermal + from sonic_platform.sfp import Sfp + from sonic_platform.eeprom import Tlv +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_FAN_TRAY = 5 +NUM_FAN = 2 +NUM_PSU = 2 +NUM_THERMAL = 5 +NUM_SFP = 32 +NUM_COMPONENT = 5 +RESET_REGISTER = "0x103" +HOST_REBOOT_CAUSE_PATH = "/host/reboot-cause/" +PMON_REBOOT_CAUSE_PATH = "/usr/share/sonic/platform/api_files/reboot-cause/" +REBOOT_CAUSE_FILE = "reboot-cause.txt" +PREV_REBOOT_CAUSE_FILE = "previous-reboot-cause.txt" +HOST_CHK_CMD = "docker > /dev/null 2>&1" + + +class Chassis(ChassisBase): + """Platform-specific Chassis class""" + + def __init__(self): + ChassisBase.__init__(self) + self.config_data = {} + for fant_index in range(0, NUM_FAN_TRAY): + for fan_index in range(0, NUM_FAN): + fan = Fan(fant_index, fan_index) + self._fan_list.append(fan) + for index in range(0, NUM_PSU): + psu = Psu(index) + self._psu_list.append(psu) + for index in range(0, NUM_THERMAL): + thermal = Thermal(index) + self._thermal_list.append(thermal) + for index in range(0, NUM_SFP): + sfp = Sfp(index) + self._sfp_list.append(sfp) + for index in range(0, NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + self._watchdog = Watchdog() + self._eeprom = Tlv() + + def __is_host(self): + return os.system(HOST_CHK_CMD) == 0 + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.get_mac() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.get_serial() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.get_eeprom() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + description = 'None' + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + + reboot_cause_path = (HOST_REBOOT_CAUSE_PATH + REBOOT_CAUSE_FILE) if self.__is_host( + ) else PMON_REBOOT_CAUSE_PATH + REBOOT_CAUSE_FILE + prev_reboot_cause_path = (HOST_REBOOT_CAUSE_PATH + PREV_REBOOT_CAUSE_FILE) if self.__is_host( + ) else PMON_REBOOT_CAUSE_PATH + PREV_REBOOT_CAUSE_FILE + + hw_reboot_cause = self._component_list[0].get_register_value(RESET_REGISTER) + + sw_reboot_cause = self.__read_txt_file( + reboot_cause_path) or "Unknown" + prev_sw_reboot_cause = self.__read_txt_file( + prev_reboot_cause_path) or "Unknown" + + if sw_reboot_cause == "Unknown" and (prev_sw_reboot_cause == "Unknown" or prev_sw_reboot_cause == self.REBOOT_CAUSE_POWER_LOSS) and hw_reboot_cause == "0x11": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + elif sw_reboot_cause != "Unknown" and hw_reboot_cause == "0x11": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = sw_reboot_cause + elif prev_reboot_cause_path != "Unknown" and hw_reboot_cause == "0x11": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = prev_sw_reboot_cause + elif hw_reboot_cause == "0x22": + reboot_cause = self.REBOOT_CAUSE_WATCHDOG, + else: + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Unknown reason' + + return (reboot_cause, description) diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/component.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/component.py new file mode 100644 index 00000000000..67c7a9c4634 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/component.py @@ -0,0 +1,147 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +import json +import os.path +import shutil +import shlex +import subprocess + +try: + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CPLD_ADDR_MAPPING = { + "CPLD1": "0x100", + "CPLD2": "0x200", + "CPLD3": "0x280", + "CPLD4": "0x300", + "CPLD5": "0x380" +} +GETREG_PATH = "/sys/devices/platform/dx010_cpld/getreg" +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_NAME_LIST = ["CPLD1", "CPLD2", "CPLD3", "CPLD4", "BIOS"] +COMPONENT_DES_LIST = ["CPLD1", "CPLD2", "CPLD3", "CPLD4", "Basic Input/Output System"] + + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + ComponentBase.__init__(self) + self.index = component_index + self.name = self.get_name() + + def __run_command(self, command): + # Run bash command and print output to stdout + try: + process = subprocess.Popen( + shlex.split(command), stdout=subprocess.PIPE) + while True: + output = process.stdout.readline() + if output == '' and process.poll() is not None: + break + rc = process.poll() + if rc != 0: + return False + except: + return False + return True + + def __get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def get_register_value(self, register): + # Retrieves the cpld register value + cmd = "echo {1} > {0}; cat {0}".format(GETREG_PATH, register) + p = subprocess.Popen( + cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) + raw_data, err = p.communicate() + if err is not '': + return None + return raw_data.strip() + + def __get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + for cpld_name in CPLD_ADDR_MAPPING: + try: + cpld_addr = CPLD_ADDR_MAPPING[cpld_name] + cpld_version_raw = self.get_register_value(cpld_addr) + cpld_version_str = "{}.{}".format(int(cpld_version_raw[2], 16), int( + cpld_version_raw[3], 16)) if cpld_version_raw is not None else 'None' + cpld_version[cpld_name] = cpld_version_str + except Exception as e: + cpld_version[cpld_name] = 'None' + return cpld_version + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_NAME_LIST[self.index] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_DES_LIST[self.index] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self.__get_bios_version() + elif "CPLD" in self.name: + cpld_version = self.__get_cpld_version() + fw_version = cpld_version.get(self.name) + + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + if not os.path.isfile(image_path): + return False + + if "CPLD" in self.name: + img_name = os.path.basename(image_path) + root, ext = os.path.splitext(img_name) + ext = ".vme" if ext == "" else ext + new_image_path = os.path.join("/tmp", (root.lower() + ext)) + shutil.copy(image_path, new_image_path) + install_command = "ispvm %s" % new_image_path + elif self.name == "BIOS": + install_command = "afulnx_64 %s /p /b /n /x /r" % image_path + + return self.__run_command(install_command) diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/eeprom.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/eeprom.py new file mode 100644 index 00000000000..dffda1a3c05 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/eeprom.py @@ -0,0 +1,112 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica Seastone-DX010 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import glob + import os + import sys + import imp + import re + from array import array + from cStringIO import StringIO + from sonic_platform_base.sonic_eeprom import eeprom_dts + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError(str(e) + "- required module not found") + +CACHE_ROOT = '/var/cache/sonic/decode-syseeprom' +CACHE_FILE = 'syseeprom_cache' + + +class Tlv(eeprom_tlvinfo.TlvInfoDecoder): + + EEPROM_DECODE_HEADLINES = 6 + + def __init__(self): + self._eeprom_path = "/sys/class/i2c-adapter/i2c-12/12-0050/eeprom" + super(Tlv, self).__init__(self._eeprom_path, 0, '', True) + self._eeprom = self._load_eeprom() + + def __parse_output(self, decode_output): + decode_output.replace('\0', '') + lines = decode_output.split('\n') + lines = lines[self.EEPROM_DECODE_HEADLINES:] + _eeprom_info_dict = dict() + + for line in lines: + try: + match = re.search( + '(0x[0-9a-fA-F]{2})([\s]+[\S]+[\s]+)([\S]+)', line) + if match is not None: + idx = match.group(1) + value = match.group(3).rstrip('\0') + + _eeprom_info_dict[idx] = value + except: + pass + return _eeprom_info_dict + + def _load_eeprom(self): + original_stdout = sys.stdout + sys.stdout = StringIO() + try: + self.read_eeprom_db() + except: + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + return self.__parse_output(decode_output) + + status = self.check_status() + if 'ok' not in status: + return False + + if not os.path.exists(CACHE_ROOT): + try: + os.makedirs(CACHE_ROOT) + except: + pass + + # + # only the eeprom classes that inherit from eeprom_base + # support caching. Others will work normally + # + try: + self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE)) + except: + pass + + e = self.read_eeprom() + if e is None: + return 0 + + try: + self.update_cache(e) + except: + pass + + self.decode_eeprom(e) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + + (is_valid, valid_crc) = self.is_checksum_valid(e) + if not is_valid: + return False + + return self.__parse_output(decode_output) + + def get_eeprom(self): + return self._eeprom + + def get_serial(self): + return self._eeprom.get('0x23', "Undefined.") + + def get_mac(self): + return self._eeprom.get('0x24', "Undefined.") diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/fan.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/fan.py new file mode 100644 index 00000000000..c0724e9bb68 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/fan.py @@ -0,0 +1,294 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the fan status which are available in the platform +# +############################################################################# + +import json +import math +import os.path + +try: + from sonic_platform_base.fan_base import FanBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +EMC2305_PATH = "/sys/bus/i2c/drivers/emc2305/" +GPIO_DIR = "/sys/class/gpio" +GPIO_LABEL = "pca9505" +EMC2305_MAX_PWM = 255 +EMC2305_FAN_PWM = "pwm{}" +EMC2305_FAN_TARGET = "fan{}_target" +EMC2305_FAN_INPUT = "pwm{}" +FAN_NAME_LIST = ["FAN-1F", "FAN-1R", "FAN-2F", "FAN-2R", + "FAN-3F", "FAN-3R", "FAN-4F", "FAN-4R", "FAN-5F", "FAN-5R"] +PSU_FAN_MAX_RPM = 11000 +PSU_HWMON_PATH = "/sys/bus/i2c/devices/i2c-{0}/{0}-00{1}/hwmon" +PSU_I2C_MAPPING = { + 0: { + "num": 10, + "addr": "5a" + }, + 1: { + "num": 11, + "addr": "5b" + }, +} + + +class Fan(FanBase): + """Platform-specific Fan class""" + + def __init__(self, fan_tray_index, fan_index=0, is_psu_fan=False, psu_index=0): + self.fan_index = fan_index + self.fan_tray_index = fan_tray_index + self.is_psu_fan = is_psu_fan + if self.is_psu_fan: + self.psu_index = psu_index + self.psu_i2c_num = PSU_I2C_MAPPING[self.psu_index]["num"] + self.psu_i2c_addr = PSU_I2C_MAPPING[self.psu_index]["addr"] + self.psu_hwmon_path = PSU_HWMON_PATH.format( + self.psu_i2c_num, self.psu_i2c_addr) + + # dx010 fan attributes + # Two EMC2305s located at i2c-13-4d and i2c-13-2e + # to control a dual-fan module. + self.emc2305_chip_mapping = [ + { + 'device': "13-002e", + 'index_map': [2, 1, 4, 5, 3] + }, + { + 'device': "13-004d", + 'index_map': [2, 4, 5, 3, 1] + } + ] + self.dx010_fan_gpio = [ + {'base': self.__get_gpio_base()}, + {'prs': 11, 'dir': 16, 'color': {'red': 31, 'green': 32}}, # 1 + {'prs': 10, 'dir': 15, 'color': {'red': 29, 'green': 30}}, # 2 + {'prs': 13, 'dir': 18, 'color': {'red': 35, 'green': 36}}, # 3 + {'prs': 14, 'dir': 19, 'color': {'red': 37, 'green': 38}}, # 4 + {'prs': 12, 'dir': 17, 'color': {'red': 33, 'green': 34}}, # 5 + ] + FanBase.__init__(self) + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return "" + + def __write_txt_file(self, file_path, value): + try: + with open(file_path, 'w') as fd: + fd.write(str(value)) + except: + return False + return True + + def __search_file_by_name(self, directory, file_name): + for dirpath, dirnames, files in os.walk(directory): + for name in files: + file_path = os.path.join(dirpath, name) + if name in file_name: + return file_path + return None + + def __get_gpio_base(self): + for r in os.listdir(GPIO_DIR): + label_path = os.path.join(GPIO_DIR, r, "label") + if "gpiochip" in r and GPIO_LABEL in self.__read_txt_file(label_path): + return int(r[8:], 10) + return 216 # Reserve + + def __get_gpio_value(self, pinnum): + gpio_base = self.dx010_fan_gpio[0]['base'] + gpio_dir = GPIO_DIR + '/gpio' + str(gpio_base+pinnum) + gpio_file = gpio_dir + "/value" + retval = self.__read_txt_file(gpio_file) + return retval.rstrip('\r\n') + + def __set_gpio_value(self, pinnum, value=0): + gpio_base = self.dx010_fan_gpio[0]['base'] + gpio_dir = GPIO_DIR + '/gpio' + str(gpio_base+pinnum) + gpio_file = gpio_dir + "/value" + return self.__write_txt_file(gpio_file, value) + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = self.FAN_DIRECTION_EXHAUST + if not self.is_psu_fan: + raw = self.__get_gpio_value( + self.dx010_fan_gpio[self.fan_tray_index+1]['dir']) + + direction = self.FAN_DIRECTION_INTAKE if int( + raw, 10) == 0 else self.FAN_DIRECTION_EXHAUST + + return direction + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + + Note: + speed = pwm_in/255*100 + """ + speed = 0 + if self.is_psu_fan: + fan_speed_sysfs_name = "fan{}_input".format(self.fan_index+1) + fan_speed_sysfs_path = self.__search_file_by_name( + self.psu_hwmon_path, fan_speed_sysfs_name) + fan_speed_rpm = self.__read_txt_file(fan_speed_sysfs_path) or 0 + fan_speed_raw = float(fan_speed_rpm)/PSU_FAN_MAX_RPM * 100 + speed = math.ceil(float(fan_speed_rpm) * 100 / PSU_FAN_MAX_RPM) + elif self.get_presence(): + chip = self.emc2305_chip_mapping[self.fan_index] + device = chip['device'] + fan_index = chip['index_map'] + sysfs_path = "%s%s/%s" % ( + EMC2305_PATH, device, EMC2305_FAN_INPUT) + sysfs_path = sysfs_path.format(fan_index[self.fan_tray_index]) + raw = self.__read_txt_file(sysfs_path).strip('\r\n') + pwm = int(raw, 10) if raw else 0 + speed = math.ceil(float(pwm * 100 / EMC2305_MAX_PWM)) + + return int(speed) + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + + Note: + speed_pc = pwm_target/255*100 + + 0 : when PWM mode is use + pwm : when pwm mode is not use + """ + target = 0 + if not self.is_psu_fan: + chip = self.emc2305_chip_mapping[self.fan_index] + device = chip['device'] + fan_index = chip['index_map'] + sysfs_path = "%s%s/%s" % ( + EMC2305_PATH, device, EMC2305_FAN_TARGET) + sysfs_path = sysfs_path.format(fan_index[self.fan_tray_index]) + raw = self.__read_txt_file(sysfs_path).strip('\r\n') + pwm = int(raw, 10) if raw else 0 + target = math.ceil(float(pwm) * 100 / EMC2305_MAX_PWM) + + return target + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + return 10 + + def set_speed(self, speed): + """ + Sets the fan speed + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + Returns: + A boolean, True if speed is set successfully, False if not + + Note: + Depends on pwm or target mode is selected: + 1) pwm = speed_pc * 255 <-- Currently use this mode. + 2) target_pwm = speed_pc * 100 / 255 + 2.1) set pwm{}_enable to 3 + + """ + pwm = speed * 255 / 100 + if not self.is_psu_fan and self.get_presence(): + chip = self.emc2305_chip_mapping[self.fan_index] + device = chip['device'] + fan_index = chip['index_map'] + sysfs_path = "%s%s/%s" % ( + EMC2305_PATH, device, EMC2305_FAN_PWM) + sysfs_path = sysfs_path.format(fan_index[self.fan_tray_index]) + return self.__write_txt_file(sysfs_path, int(pwm)) + + return False + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + set_status_led = False + if not self.is_psu_fan: + s1, s2 = False, False + try: + if color == self.STATUS_LED_COLOR_GREEN: + s1 = self.__set_gpio_value( + self.dx010_fan_gpio[self.fan_tray_index+1]['color']['red'], 1) + s2 = self.__set_gpio_value( + self.dx010_fan_gpio[self.fan_tray_index+1]['color']['green'], 0) + + elif color == self.STATUS_LED_COLOR_RED: + s1 = self.__set_gpio_value( + self.dx010_fan_gpio[self.fan_tray_index+1]['color']['red'], 0) + s2 = self.__set_gpio_value( + self.dx010_fan_gpio[self.fan_tray_index+1]['color']['green'], 1) + + elif color == self.STATUS_LED_COLOR_OFF: + s1 = self.__set_gpio_value( + self.dx010_fan_gpio[self.fan_tray_index+1]['color']['red'], 1) + s2 = self.__set_gpio_value( + self.dx010_fan_gpio[self.fan_tray_index+1]['color']['green'], 1) + set_status_led = s1 and s2 + return set_status_led + except IOError: + return False + + return set_status_led + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + fan_name = FAN_NAME_LIST[self.fan_tray_index*2 + self.fan_index] if not self.is_psu_fan else "PSU-{} FAN-{}".format( + self.psu_index+1, self.fan_index+1) + + return fan_name + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + present_str = self.__get_gpio_value( + self.dx010_fan_gpio[self.fan_tray_index+1]['prs']) + + return int(present_str, 10) == 0 if not self.is_psu_fan else True diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/platform.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/platform.py new file mode 100644 index 00000000000..a632de87e74 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/platform.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PlatformBase): + """Platform-specific Platform class""" + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/psu.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/psu.py new file mode 100644 index 00000000000..8558b0b0cad --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/psu.py @@ -0,0 +1,232 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os +import sonic_platform + +try: + from sonic_platform_base.psu_base import PsuBase + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +GREEN_LED_PATH = "/sys/devices/platform/leds_dx010/leds/dx010:green:p-{}/brightness" +HWMON_PATH = "/sys/bus/i2c/devices/i2c-{0}/{0}-00{1}/hwmon" +GPIO_DIR = "/sys/class/gpio" +GPIO_LABEL = "pca9505" +PSU_NAME_LIST = ["PSU-1", "PSU-2"] +PSU_NUM_FAN = [1, 1] +PSU_I2C_MAPPING = { + 0: { + "num": 10, + "addr": "5a" + }, + 1: { + "num": 11, + "addr": "5b" + }, +} + + +class Psu(PsuBase): + """Platform-specific Psu class""" + + def __init__(self, psu_index): + PsuBase.__init__(self) + self.index = psu_index + self.green_led_path = GREEN_LED_PATH.format(self.index+1) + self.dx010_psu_gpio = [ + {'base': self.__get_gpio_base()}, + {'prs': 27, 'status': 22}, + {'prs': 28, 'status': 25} + ] + self.i2c_num = PSU_I2C_MAPPING[self.index]["num"] + self.i2c_addr = PSU_I2C_MAPPING[self.index]["addr"] + self.hwmon_path = HWMON_PATH.format(self.i2c_num, self.i2c_addr) + for fan_index in range(0, PSU_NUM_FAN[self.index]): + fan = Fan(fan_index, 0, is_psu_fan=True, psu_index=self.index) + self._fan_list.append(fan) + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return "" + + def __search_file_by_contain(self, directory, search_str, file_start): + for dirpath, dirnames, files in os.walk(directory): + for name in files: + file_path = os.path.join(dirpath, name) + if name.startswith(file_start) and search_str in self.__read_txt_file(file_path): + return file_path + return None + + def __get_gpio_base(self): + for r in os.listdir(GPIO_DIR): + label_path = os.path.join(GPIO_DIR, r, "label") + if "gpiochip" in r and GPIO_LABEL in self.__read_txt_file(label_path): + return int(r[8:], 10) + return 216 # Reserve + + def __get_gpio_value(self, pinnum): + gpio_base = self.dx010_psu_gpio[0]['base'] + gpio_dir = GPIO_DIR + '/gpio' + str(gpio_base+pinnum) + gpio_file = gpio_dir + "/value" + retval = self.__read_txt_file(gpio_file) + return retval.rstrip('\r\n') + + def get_voltage(self): + """ + Retrieves current PSU voltage output + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + psu_voltage = 0.0 + voltage_name = "in{}_input" + voltage_label = "vout1" + + vout_label_path = self.__search_file_by_contain( + self.hwmon_path, voltage_label, "in") + if vout_label_path: + dir_name = os.path.dirname(vout_label_path) + basename = os.path.basename(vout_label_path) + in_num = filter(str.isdigit, basename) + vout_path = os.path.join( + dir_name, voltage_name.format(in_num)) + vout_val = self.__read_txt_file(vout_path) + psu_voltage = float(vout_val) / 1000 + + return psu_voltage + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + psu_current = 0.0 + current_name = "curr{}_input" + current_label = "iout1" + + curr_label_path = self.__search_file_by_contain( + self.hwmon_path, current_label, "cur") + if curr_label_path: + dir_name = os.path.dirname(curr_label_path) + basename = os.path.basename(curr_label_path) + cur_num = filter(str.isdigit, basename) + cur_path = os.path.join( + dir_name, current_name.format(cur_num)) + cur_val = self.__read_txt_file(cur_path) + psu_current = float(cur_val) / 1000 + + return psu_current + + def get_power(self): + """ + Retrieves current energy supplied by PSU + Returns: + A float number, the power in watts, e.g. 302.6 + """ + psu_power = 0.0 + current_name = "power{}_input" + current_label = "pout1" + + pw_label_path = self.__search_file_by_contain( + self.hwmon_path, current_label, "power") + if pw_label_path: + dir_name = os.path.dirname(pw_label_path) + basename = os.path.basename(pw_label_path) + pw_num = filter(str.isdigit, basename) + pw_path = os.path.join( + dir_name, current_name.format(pw_num)) + pw_val = self.__read_txt_file(pw_path) + psu_power = float(pw_val) / 1000000 + + return psu_power + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + Args: + color: A string representing the color with which to set the PSU status LED + Note: Only support green and off + Returns: + bool: True if status LED state is set successfully, False if not + """ + + set_status_str = { + self.STATUS_LED_COLOR_GREEN: '1', + self.STATUS_LED_COLOR_OFF: '0' + }.get(color, None) + + if not set_status_str: + return False + + try: + with open(self.green_led_path, 'w') as file: + file.write(set_status_str) + except IOError: + return False + + return True + + def get_status_led(self): + """ + Gets the state of the PSU status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + status = self.__read_txt_file(self.green_led_path) + status_str = { + '255': self.STATUS_LED_COLOR_GREEN, + '0': self.STATUS_LED_COLOR_OFF + }.get(status, None) + + return status_str + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return PSU_NAME_LIST[self.index] + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + raw = self.__get_gpio_value(self.dx010_psu_gpio[self.index+1]['prs']) + return int(raw, 10) == 0 + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + raw = self.__get_gpio_value( + self.dx010_psu_gpio[self.index+1]['status']) + return int(raw, 10) == 1 diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/sfp.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/sfp.py new file mode 100644 index 00000000000..3a02be39df6 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/sfp.py @@ -0,0 +1,945 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Sfp contains an implementation of SONiC Platform Base API and +# provides the sfp device status which are available in the platform +# +############################################################################# + +import os +import time +import subprocess +import sonic_device_util +from ctypes import create_string_buffer + +try: + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom + from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +INFO_OFFSET = 128 +DOM_OFFSET = 0 + +XCVR_INTFACE_BULK_OFFSET = 0 +XCVR_INTFACE_BULK_WIDTH_QSFP = 20 +XCVR_HW_REV_WIDTH_QSFP = 2 +XCVR_CABLE_LENGTH_WIDTH_QSFP = 5 +XCVR_VENDOR_NAME_OFFSET = 20 +XCVR_VENDOR_NAME_WIDTH = 16 +XCVR_VENDOR_OUI_OFFSET = 37 +XCVR_VENDOR_OUI_WIDTH = 3 +XCVR_VENDOR_PN_OFFSET = 40 +XCVR_VENDOR_PN_WIDTH = 16 +XCVR_HW_REV_OFFSET = 56 +XCVR_HW_REV_WIDTH_OSFP = 2 +XCVR_HW_REV_WIDTH_SFP = 4 +XCVR_VENDOR_SN_OFFSET = 68 +XCVR_VENDOR_SN_WIDTH = 16 +XCVR_VENDOR_DATE_OFFSET = 84 +XCVR_VENDOR_DATE_WIDTH = 8 +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 1 + +# Offset for values in QSFP eeprom +QSFP_DOM_REV_OFFSET = 1 +QSFP_DOM_REV_WIDTH = 1 +QSFP_TEMPE_OFFSET = 22 +QSFP_TEMPE_WIDTH = 2 +QSFP_VOLT_OFFSET = 26 +QSFP_VOLT_WIDTH = 2 +QSFP_CHANNL_MON_OFFSET = 34 +QSFP_CHANNL_MON_WIDTH = 16 +QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH = 24 +QSFP_CONTROL_OFFSET = 86 +QSFP_CONTROL_WIDTH = 8 +QSFP_CHANNL_RX_LOS_STATUS_OFFSET = 3 +QSFP_CHANNL_RX_LOS_STATUS_WIDTH = 1 +QSFP_CHANNL_TX_FAULT_STATUS_OFFSET = 4 +QSFP_CHANNL_TX_FAULT_STATUS_WIDTH = 1 +QSFP_POWEROVERRIDE_OFFSET = 93 +QSFP_POWEROVERRIDE_WIDTH = 1 +QSFP_MODULE_THRESHOLD_OFFSET = 128 +QSFP_MODULE_THRESHOLD_WIDTH = 24 +QSFP_CHANNEL_THRESHOLD_OFFSET = 176 +QSFP_CHANNEL_THRESHOLD_WIDTH = 16 + +qsfp_cable_length_tup = ('Length(km)', 'Length OM3(2m)', + 'Length OM2(m)', 'Length OM1(m)', + 'Length Cable Assembly(m)') + +qsfp_compliance_code_tup = ('10/40G Ethernet Compliance Code', 'SONET Compliance codes', + 'SAS/SATA compliance codes', 'Gigabit Ethernet Compliant codes', + 'Fibre Channel link length/Transmitter Technology', + 'Fibre Channel transmission media', 'Fibre Channel Speed') + + + +class Sfp(SfpBase): + """Platform-specific Sfp class""" + + # Port number + PORT_START = 1 + PORT_END = 32 + + # Path to QSFP sysfs + RESET_PATH = "/sys/devices/platform/dx010_cpld/qsfp_reset" + LP_PATH = "/sys/devices/platform/dx010_cpld/qsfp_lpmode" + PRS_PATH = "/sys/devices/platform/dx010_cpld/qsfp_modprs" + PLATFORM_ROOT_PATH = "/usr/share/sonic/device" + PMON_HWSKU_PATH = "/usr/share/sonic/hwsku" + HOST_CHK_CMD = "docker > /dev/null 2>&1" + + PLATFORM = "x86_64-cel_seastone-r0" + HWSKU = "Seastone-DX010" + + def __init__(self, sfp_index): + # Init index + self.index = sfp_index + self.port_num = self.index + 1 if self.PORT_START == 1 else index + + # Init eeprom path + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + self.port_to_eeprom_mapping = {} + for x in range(self.PORT_START, self.PORT_END + 1): + p_num = x - 1 if self.PORT_START == 1 else x + self.port_to_eeprom_mapping[x] = eeprom_path.format(p_num + 26) + + self.info_dict_keys = ['type', 'hardwarerev', 'serialnum', 'manufacturename', 'modelname', 'Connector', 'encoding', 'ext_identifier', + 'ext_rateselect_compliance', 'cable_type', 'cable_length', 'nominal_bit_rate', 'specification_compliance', 'vendor_date', 'vendor_oui'] + + self.dom_dict_keys = ['rx_los', 'tx_fault', 'reset_status', 'power_lpmode', 'tx_disable', 'tx_disable_channel', 'temperature', 'voltage', + 'rx1power', 'rx2power', 'rx3power', 'rx4power', 'tx1bias', 'tx2bias', 'tx3bias', 'tx4bias', 'tx1power', 'tx2power', 'tx3power', 'tx4power'] + + self.threshold_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', 'rxpowerhighalarm', 'rxpowerhighwarning', + 'rxpowerlowalarm', 'rxpowerlowwarning', 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning'] + + SfpBase.__init__(self) + + def _convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return "" + + def __is_host(self): + return os.system(self.HOST_CHK_CMD) == 0 + + def __get_path_to_port_config_file(self): + platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.PLATFORM]) + hwsku_path = "/".join([platform_path, self.HWSKU] + ) if self.__is_host() else self.PMON_HWSKU_PATH + return "/".join([hwsku_path, "port_config.ini"]) + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + sysfsfile_eeprom = None + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[self.port_num] + try: + sysfsfile_eeprom = open( + sysfs_sfp_i2c_client_eeprom_path, mode="rb", buffering=0) + sysfsfile_eeprom.seek(offset) + raw = sysfsfile_eeprom.read(num_bytes) + for n in range(0, num_bytes): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except: + pass + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + + return eeprom_raw + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + nominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + # check present status + sfpi_obj = sff8436InterfaceId() + if not self.get_presence() or not sfpi_obj: + return {} + + offset = INFO_OFFSET + + sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_INTFACE_BULK_OFFSET), XCVR_INTFACE_BULK_WIDTH_QSFP) + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk( + sfp_interface_bulk_raw, 0) + + sfp_vendor_name_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + sfp_vendor_name_data = sfpi_obj.parse_vendor_name( + sfp_vendor_name_raw, 0) + + sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn( + sfp_vendor_pn_raw, 0) + + sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_HW_REV_OFFSET), XCVR_HW_REV_WIDTH_QSFP) + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev( + sfp_vendor_rev_raw, 0) + + sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn( + sfp_vendor_sn_raw, 0) + + sfp_vendor_oui_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) + if sfp_vendor_oui_raw is not None: + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui( + sfp_vendor_oui_raw, 0) + + sfp_vendor_date_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) + sfp_vendor_date_data = sfpi_obj.parse_vendor_date( + sfp_vendor_date_raw, 0) + + transceiver_info_dict = dict.fromkeys(self.info_dict_keys, 'N/A') + compliance_code_dict = dict() + + if sfp_interface_bulk_data: + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + transceiver_info_dict['type_abbrv_name'] = sfp_interface_bulk_data['data']['type_abbrv_name']['value'] + + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data[ + 'data']['Vendor Name']['value'] if sfp_vendor_name_data else 'N/A' + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] if sfp_vendor_pn_data else 'N/A' + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] if sfp_vendor_rev_data else 'N/A' + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] if sfp_vendor_sn_data else 'N/A' + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] if sfp_vendor_oui_data else 'N/A' + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data[ + 'data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] if sfp_vendor_date_data else 'N/A' + transceiver_info_dict['cable_type'] = "Unknown" + transceiver_info_dict['cable_length'] = "Unknown" + + for key in qsfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str( + sfp_interface_bulk_data['data'][key]['value']) + + for key in qsfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + transceiver_info_dict['specification_compliance'] = str( + compliance_code_dict) + transceiver_info_dict['nominal_bit_rate'] = str( + sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value']) + + return transceiver_info_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. + tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. + reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. + lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. + tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. + tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 + | |to channel 3. + temperature |INT |module temperature in Celsius + voltage |INT |supply voltage in mV + txbias |INT |TX Bias Current in mA, n is the channel number, + | |for example, tx2bias stands for tx bias of channel 2. + rxpower |INT |received optical power in mW, n is the channel number, + | |for example, rx2power stands for rx power of channel 2. + txpower |INT |TX output power in mW, n is the channel number, + | |for example, tx2power stands for tx power of channel 2. + ======================================================================== + """ + # check present status + sfpd_obj = sff8436Dom() + sfpi_obj = sff8436InterfaceId() + + if not self.get_presence() or not sfpi_obj or not sfpd_obj: + return {} + + transceiver_dom_info_dict = dict.fromkeys(self.dom_dict_keys, 'N/A') + offset = DOM_OFFSET + offset_xcvr = INFO_OFFSET + + # QSFP capability byte parse, through this byte can know whether it support tx_power or not. + # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, + # need to add more code for determining the capability and version compliance + # in SFF-8636 dom capability definitions evolving with the versions. + qsfp_dom_capability_raw = self.__read_eeprom_specific_bytes( + (offset_xcvr + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) + if qsfp_dom_capability_raw is not None: + qspf_dom_capability_data = sfpi_obj.parse_qsfp_dom_capability( + qsfp_dom_capability_raw, 0) + else: + return None + + dom_temperature_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature( + dom_temperature_raw, 0) + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + + dom_voltage_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + qsfp_dom_rev_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_DOM_REV_OFFSET), QSFP_DOM_REV_WIDTH) + if qsfp_dom_rev_raw is not None: + qsfp_dom_rev_data = sfpd_obj.parse_sfp_dom_rev(qsfp_dom_rev_raw, 0) + qsfp_dom_rev = qsfp_dom_rev_data['data']['dom_rev']['value'] + + # The tx_power monitoring is only available on QSFP which compliant with SFF-8636 + # and claimed that it support tx_power with one indicator bit. + dom_channel_monitor_data = {} + dom_channel_monitor_raw = None + qsfp_tx_power_support = qspf_dom_capability_data['data']['Tx_power_support']['value'] + if (qsfp_dom_rev[0:8] != 'SFF-8636' or (qsfp_dom_rev[0:8] == 'SFF-8636' and qsfp_tx_power_support != 'on')): + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params( + dom_channel_monitor_raw, 0) + + else: + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power( + dom_channel_monitor_raw, 0) + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TX1Power']['value'] + transceiver_dom_info_dict['tx2power'] = dom_channel_monitor_data['data']['TX2Power']['value'] + transceiver_dom_info_dict['tx3power'] = dom_channel_monitor_data['data']['TX3Power']['value'] + transceiver_dom_info_dict['tx4power'] = dom_channel_monitor_data['data']['TX4Power']['value'] + + if dom_channel_monitor_raw: + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RX1Power']['value'] + transceiver_dom_info_dict['rx2power'] = dom_channel_monitor_data['data']['RX2Power']['value'] + transceiver_dom_info_dict['rx3power'] = dom_channel_monitor_data['data']['RX3Power']['value'] + transceiver_dom_info_dict['rx4power'] = dom_channel_monitor_data['data']['RX4Power']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value'] + transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value'] + transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value'] + transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value'] + + for key in transceiver_dom_info_dict: + transceiver_dom_info_dict[key] = self._convert_string_to_num( + transceiver_dom_info_dict[key]) + + transceiver_dom_info_dict['rx_los'] = self.get_rx_los() + transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() + transceiver_dom_info_dict['reset_status'] = self.get_reset_status() + transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() + + return transceiver_dom_info_dict + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. + templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. + temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. + templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. + vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. + vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. + vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. + vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. + rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. + rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. + rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. + rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. + txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. + txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. + txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. + txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. + txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. + txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. + txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. + txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. + ======================================================================== + """ + # check present status + sfpd_obj = sff8436Dom() + + if not self.get_presence() or not sfpd_obj: + return {} + + transceiver_dom_threshold_dict = dict.fromkeys( + self.threshold_dict_keys, 'N/A') + dom_thres_raw = self.__read_eeprom_specific_bytes( + QSFP_MODULE_THRESHOLD_OFFSET, QSFP_MODULE_THRESHOLD_WIDTH) if self.get_presence() and sfpd_obj else None + + if dom_thres_raw: + module_threshold_values = sfpd_obj.parse_module_threshold_values( + dom_thres_raw, 0) + module_threshold_data = module_threshold_values.get('data') + if module_threshold_data: + transceiver_dom_threshold_dict['temphighalarm'] = module_threshold_data['TempHighAlarm']['value'] + transceiver_dom_threshold_dict['templowalarm'] = module_threshold_data['TempLowAlarm']['value'] + transceiver_dom_threshold_dict['temphighwarning'] = module_threshold_data['TempHighWarning']['value'] + transceiver_dom_threshold_dict['templowwarning'] = module_threshold_data['TempLowWarning']['value'] + transceiver_dom_threshold_dict['vcchighalarm'] = module_threshold_data['VccHighAlarm']['value'] + transceiver_dom_threshold_dict['vcclowalarm'] = module_threshold_data['VccLowAlarm']['value'] + transceiver_dom_threshold_dict['vcchighwarning'] = module_threshold_data['VccHighWarning']['value'] + transceiver_dom_threshold_dict['vcclowwarning'] = module_threshold_data['VccLowWarning']['value'] + + dom_thres_raw = self.__read_eeprom_specific_bytes( + QSFP_CHANNEL_THRESHOLD_OFFSET, QSFP_CHANNEL_THRESHOLD_WIDTH) if self.get_presence() and sfpd_obj else None + channel_threshold_values = sfpd_obj.parse_channel_threshold_values( + dom_thres_raw, 0) + channel_threshold_data = channel_threshold_values.get('data') + if channel_threshold_data: + transceiver_dom_threshold_dict['rxpowerhighalarm'] = channel_threshold_data['RxPowerHighAlarm']['value'] + transceiver_dom_threshold_dict['rxpowerlowalarm'] = channel_threshold_data['RxPowerLowAlarm']['value'] + transceiver_dom_threshold_dict['rxpowerhighwarning'] = channel_threshold_data['RxPowerHighWarning']['value'] + transceiver_dom_threshold_dict['rxpowerlowwarning'] = channel_threshold_data['RxPowerLowWarning']['value'] + transceiver_dom_threshold_dict['txpowerhighalarm'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerlowalarm'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerhighwarning'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerlowwarning'] = "0.0dBm" + transceiver_dom_threshold_dict['txbiashighalarm'] = channel_threshold_data['TxBiasHighAlarm']['value'] + transceiver_dom_threshold_dict['txbiaslowalarm'] = channel_threshold_data['TxBiasLowAlarm']['value'] + transceiver_dom_threshold_dict['txbiashighwarning'] = channel_threshold_data['TxBiasHighWarning']['value'] + transceiver_dom_threshold_dict['txbiaslowwarning'] = channel_threshold_data['TxBiasLowWarning']['value'] + + for key in transceiver_dom_threshold_dict: + transceiver_dom_threshold_dict[key] = self._convert_string_to_num( + transceiver_dom_threshold_dict[key]) + + return transceiver_dom_threshold_dict + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + Returns: + A Boolean, True if reset enabled, False if disabled + """ + reset_status_raw = self.__read_txt_file(self.RESET_PATH).rstrip() + if not reset_status_raw: + return False + + reg_value = int(reset_status_raw, 16) + bin_format = bin(reg_value)[2:].zfill(32) + return bin_format[::-1][self.index] == '0' + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + rx_los = False + rx_los_list = [] + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + QSFP_CHANNL_RX_LOS_STATUS_OFFSET, QSFP_CHANNL_RX_LOS_STATUS_WIDTH) if self.get_presence() else None + if dom_channel_monitor_raw is not None: + rx_los_data = int(dom_channel_monitor_raw[0], 16) + rx_los_list.append(rx_los_data & 0x01 != 0) + rx_los_list.append(rx_los_data & 0x02 != 0) + rx_los_list.append(rx_los_data & 0x04 != 0) + rx_los_list.append(rx_los_data & 0x08 != 0) + rx_los = rx_los_list[0] and rx_los_list[1] and rx_los_list[2] and rx_los_list[3] + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + tx_fault = False + tx_fault_list = [] + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + QSFP_CHANNL_TX_FAULT_STATUS_OFFSET, QSFP_CHANNL_TX_FAULT_STATUS_WIDTH) if self.get_presence() else None + if dom_channel_monitor_raw is not None: + tx_fault_data = int(dom_channel_monitor_raw[0], 16) + tx_fault_list.append(tx_fault_data & 0x01 != 0) + tx_fault_list.append(tx_fault_data & 0x02 != 0) + tx_fault_list.append(tx_fault_data & 0x04 != 0) + tx_fault_list.append(tx_fault_data & 0x08 != 0) + tx_fault = tx_fault_list[0] and tx_fault_list[1] and tx_fault_list[2] and tx_fault_list[3] + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + """ + tx_disable_list = [] + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return False + + dom_control_raw = self.__read_eeprom_specific_bytes( + QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) if self.get_presence() else None + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + tx_disable_list.append( + 'On' == dom_control_data['data']['TX1Disable']['value']) + tx_disable_list.append( + 'On' == dom_control_data['data']['TX2Disable']['value']) + tx_disable_list.append( + 'On' == dom_control_data['data']['TX3Disable']['value']) + tx_disable_list.append( + 'On' == dom_control_data['data']['TX4Disable']['value']) + + return tx_disable_list + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + tx_disable_list = self.get_tx_disable() + if tx_disable_list is None: + return 0 + tx_disabled = 0 + for i in range(len(tx_disable_list)): + if tx_disable_list[i]: + tx_disabled |= 1 << i + return tx_disabled + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + try: + reg_file = open(self.LP_PATH, "r") + content = reg_file.readline().rstrip() + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + bit_index = self.port_num - 1 if self.PORT_START == 1 else self.port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + power_override = False + + offset = 0 + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return False + + dom_control_raw = self.__read_eeprom_specific_bytes( + QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) if self.get_presence() else None + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + power_override = ( + 'On' == dom_control_data['data']['PowerOverride']['value']) + + return power_override + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + Returns: + An integer number of current temperature in Celsius + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("temperature", "N/A") + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + Returns: + An integer number of supply voltage in mV + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("voltage", "N/A") + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_bs = transceiver_dom_info_dict.get("tx1bias", "N/A") + tx2_bs = transceiver_dom_info_dict.get("tx2bias", "N/A") + tx3_bs = transceiver_dom_info_dict.get("tx3bias", "N/A") + tx4_bs = transceiver_dom_info_dict.get("tx4bias", "N/A") + return [tx1_bs, tx2_bs, tx3_bs, tx4_bs] if transceiver_dom_info_dict else [] + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + rx1_pw = transceiver_dom_info_dict.get("rx1power", "N/A") + rx2_pw = transceiver_dom_info_dict.get("rx2power", "N/A") + rx3_pw = transceiver_dom_info_dict.get("rx3power", "N/A") + rx4_pw = transceiver_dom_info_dict.get("rx4power", "N/A") + return [rx1_pw, rx2_pw, rx3_pw, rx4_pw] if transceiver_dom_info_dict else [] + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_pw = transceiver_dom_info_dict.get("tx1power", "N/A") + tx2_pw = transceiver_dom_info_dict.get("tx2power", "N/A") + tx3_pw = transceiver_dom_info_dict.get("tx3power", "N/A") + tx4_pw = transceiver_dom_info_dict.get("tx4power", "N/A") + return [tx1_pw, tx2_pw, tx3_pw, tx4_pw] + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + Returns: + A boolean, True if successful, False if not + """ + # Check for invalid port_num + + try: + reg_file = open(self.RESET_PATH, "r+") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the + # register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + bit_index = self.port_num - 1 if self.PORT_START == 1 else self.port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value).rstrip('L')) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(self.RESET_PATH, "w") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value).rstrip('L')) + reg_file.close() + + return True + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + sysfsfile_eeprom = None + try: + tx_disable_ctl = 0xf if tx_disable else 0x0 + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom = open( + self.port_to_eeprom_mapping[self.port_num], "r+b") + sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + Returns: + A boolean, True if successful, False if not + """ + sysfsfile_eeprom = None + try: + channel_state = self.get_tx_disable_channel() + tx_enable_mask = [0xe, 0xd, 0xb, 0x7] + tx_disable_mask = [0x1, 0x3, 0x7, 0xf] + tx_disable_ctl = channel_state | tx_disable_mask[ + channel] if disable else channel_state & tx_enable_mask[channel] + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom = open( + self.port_to_eeprom_mapping[self.port_num], "r+b") + sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + try: + reg_file = open(self.LP_PATH, "r+") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + bit_index = self.port_num - 1 if self.PORT_START == 1 else self.port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + # LPMode is active high; set or clear the bit accordingly + reg_value = reg_value | mask if lpmode else reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value).strip('L') + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + try: + power_override_bit = 0 + if power_override: + power_override_bit |= 1 << 0 + + power_set_bit = 0 + if power_set: + power_set_bit |= 1 << 1 + + buffer = create_string_buffer(1) + buffer[0] = chr(power_override_bit | power_set_bit) + # Write to eeprom + sysfsfile_eeprom = open( + self.port_to_eeprom_mapping[self.port_num], "r+b") + sysfsfile_eeprom.seek(QSFP_POWEROVERRIDE_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings( + self.__get_path_to_port_config_file()) + name = sfputil_helper.logical[self.index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + presence_status_raw = self.__read_txt_file(self.PRS_PATH).rstrip() + if not presence_status_raw: + return False + + content = presence_status_raw.rstrip() + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + bit_index = self.port_num - 1 if self.PORT_START == 1 else self.port_num + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + transceiver_dom_info_dict = self.get_transceiver_info() + return transceiver_dom_info_dict.get("modelname", "N/A") + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + transceiver_dom_info_dict = self.get_transceiver_info() + return transceiver_dom_info_dict.get("serialnum", "N/A") + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and self.get_transceiver_bulk_status() diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/thermal.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/thermal.py new file mode 100644 index 00000000000..1e0a2c4b564 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/thermal.py @@ -0,0 +1,159 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Thermal contains an implementation of SONiC Platform Base API and +# provides the thermal device status which are available in the platform +# +############################################################################# + +import os +import re +import os.path + +try: + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Thermal(ThermalBase): + """Platform-specific Thermal class""" + + THERMAL_NAME_LIST = [] + I2C_ADAPTER_PATH = "/sys/class/i2c-adapter" + SS_CONFIG_PATH = "/usr/share/sonic/device/x86_64-cel_seastone-r0/sensors.conf" + + def __init__(self, thermal_index): + self.index = thermal_index + + # Add thermal name + self.THERMAL_NAME_LIST.append("Front-panel temp sensor 1") + self.THERMAL_NAME_LIST.append("Front-panel temp sensor 2") + self.THERMAL_NAME_LIST.append("ASIC temp sensor") + self.THERMAL_NAME_LIST.append("Rear-panel temp sensor 1") + self.THERMAL_NAME_LIST.append("Rear-panel temp sensor 2") + + # Set hwmon path + i2c_path = { + 0: "i2c-5/5-0048/hwmon/hwmon1", # u4 system-inlet + 1: "i2c-6/6-0049/hwmon/hwmon2", # u2 system-inlet + 2: "i2c-7/7-004a/hwmon/hwmon3", # u44 bmc56960-on-board + 3: "i2c-14/14-0048/hwmon/hwmon4", # u9200 cpu-on-board + 4: "i2c-15/15-004e/hwmon/hwmon5" # u9201 system-outlet + }.get(self.index, None) + + self.hwmon_path = "{}/{}".format(self.I2C_ADAPTER_PATH, i2c_path) + self.ss_key = self.THERMAL_NAME_LIST[self.index] + self.ss_index = 1 + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + + def __get_temp(self, temp_file): + temp_file_path = os.path.join(self.hwmon_path, temp_file) + raw_temp = self.__read_txt_file(temp_file_path) + temp = float(raw_temp)/1000 + return "{:.3f}".format(temp) + + def __set_threshold(self, file_name, temperature): + temp_file_path = os.path.join(self.hwmon_path, file_name) + try: + with open(temp_file_path, 'w') as fd: + fd.write(str(temperature)) + return True + except IOError: + return False + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + temp_file = "temp{}_input".format(self.ss_index) + return self.__get_temp(temp_file) + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + Returns: + A float number, the high threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + temp_file = "temp{}_max".format(self.ss_index) + return self.__get_temp(temp_file) + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if not + """ + temp_file = "temp{}_max".format(self.ss_index) + is_set = self.__set_threshold(temp_file, int(temperature*1000)) + file_set = False + if is_set: + try: + with open(self.SS_CONFIG_PATH, 'r+') as f: + content = f.readlines() + f.seek(0) + ss_found = False + for idx, val in enumerate(content): + if self.ss_key in val: + ss_found = True + elif ss_found and temp_file in val: + content[idx] = " set {} {}\n".format( + temp_file, temperature) + f.writelines(content) + file_set = True + break + except IOError: + file_set = False + + return is_set & file_set + + def get_name(self): + """ + Retrieves the name of the thermal device + Returns: + string: The name of the thermal device + """ + return self.THERMAL_NAME_LIST[self.index] + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + temp_file = "temp{}_input".format(self.ss_index) + temp_file_path = os.path.join(self.hwmon_path, temp_file) + return os.path.isfile(temp_file_path) + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + if not self.get_presence(): + return False + + fault_file = "temp{}_fault".format(self.ss_index) + fault_file_path = os.path.join(self.hwmon_path, fault_file) + if not os.path.isfile(fault_file_path): + return True + + raw_txt = self.__read_txt_file(fault_file_path) + return int(raw_txt) == 0 diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/watchdog.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/watchdog.py new file mode 100644 index 00000000000..b539bc06f61 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/watchdog.py @@ -0,0 +1,233 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Watchdog contains an implementation of SONiC Platform Base API +# +############################################################################# +import ctypes +import fcntl +import os +import subprocess +import time +import array + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +""" ioctl constants """ +IO_WRITE = 0x40000000 +IO_READ = 0x80000000 +IO_READ_WRITE = 0xC0000000 +IO_SIZE_INT = 0x00040000 +IO_SIZE_40 = 0x00280000 +IO_TYPE_WATCHDOG = ord('W') << 8 + +WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG +WDR_40 = IO_READ | IO_SIZE_40 | IO_TYPE_WATCHDOG +WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG + +""" Watchdog ioctl commands """ +WDIOC_GETSUPPORT = 0 | WDR_40 +WDIOC_GETSTATUS = 1 | WDR_INT +WDIOC_GETBOOTSTATUS = 2 | WDR_INT +WDIOC_GETTEMP = 3 | WDR_INT +WDIOC_SETOPTIONS = 4 | WDR_INT +WDIOC_KEEPALIVE = 5 | WDR_INT +WDIOC_SETTIMEOUT = 6 | WDWR_INT +WDIOC_GETTIMEOUT = 7 | WDR_INT +WDIOC_SETPRETIMEOUT = 8 | WDWR_INT +WDIOC_GETPRETIMEOUT = 9 | WDR_INT +WDIOC_GETTIMELEFT = 10 | WDR_INT + +""" Watchdog status constants """ +WDIOS_DISABLECARD = 0x0001 +WDIOS_ENABLECARD = 0x0002 + +WDT_COMMON_ERROR = -1 +WD_MAIN_IDENTITY = "iTCO_wdt" +WDT_SYSFS_PATH = "/sys/class/watchdog/" + + +class Watchdog(WatchdogBase): + + def __init__(self): + + self.watchdog, self.wdt_main_dev_name = self._get_wdt() + self.status_path = "/sys/class/watchdog/%s/status" % self.wdt_main_dev_name + self.state_path = "/sys/class/watchdog/%s/state" % self.wdt_main_dev_name + self.timeout_path = "/sys/class/watchdog/%s/timeout" % self.wdt_main_dev_name + # Set default value + self._disable() + self.armed = False + self.timeout = self._gettimeout(self.timeout_path) + + def _is_wd_main(self, dev): + """ + Checks watchdog identity + """ + identity = self._read_file( + "{}/{}/identity".format(WDT_SYSFS_PATH, dev)) + return identity == WD_MAIN_IDENTITY + + def _get_wdt(self): + """ + Retrieves watchdog device + """ + wdt_main_dev_list = [dev for dev in os.listdir( + "/dev/") if dev.startswith("watchdog") and self._is_wd_main(dev)] + if not wdt_main_dev_list: + return None + wdt_main_dev_name = wdt_main_dev_list[0] + watchdog_device_path = "/dev/{}".format(wdt_main_dev_name) + watchdog = os.open(watchdog_device_path, os.O_RDWR) + return watchdog, wdt_main_dev_name + + def _read_file(self, file_path): + """ + Read text file + """ + try: + with open(file_path, "r") as fd: + txt = fd.read() + except IOError: + return WDT_COMMON_ERROR + return txt.strip() + + def _enable(self): + """ + Turn on the watchdog timer + """ + req = array.array('h', [WDIOS_ENABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _disable(self): + """ + Turn off the watchdog timer + """ + req = array.array('h', [WDIOS_DISABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE) + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + req = array.array('I', [seconds]) + fcntl.ioctl(self.watchdog, WDIOC_SETTIMEOUT, req, True) + return int(req[0]) + + def _gettimeout(self, timeout_path): + """ + Get watchdog timeout + @return watchdog timeout + """ + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMEOUT, req, True) + + return int(req[0]) + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMELEFT, req, True) + + return int(req[0]) + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + if self.armed: + self._keepalive() + else: + self._enable() + self.armed = True + ret = self.timeout + except IOError as e: + pass + + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + self._disable() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + + timeleft = WDT_COMMON_ERROR + + if self.armed: + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft + + def __del__(self): + """ + Close watchdog + """ + + os.close(self.watchdog) diff --git a/device/celestica/x86_64-cel_seastone-r0/th-seastone-dx010-config-flex-all.bcm b/device/celestica/x86_64-cel_seastone-r0/th-seastone-dx010-config-flex-all.bcm new file mode 100644 index 00000000000..dc2cdf1c200 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone-r0/th-seastone-dx010-config-flex-all.bcm @@ -0,0 +1,1063 @@ +# Define default OS / SAL +os=unix + +# all XPORTs to XE ports +#pbmp_xport_xe=0x1fffffffe +pbmp_xport_xe=0x1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe +pbmp_oversubscribe=0x1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe + +# Mode control to select L2 Table DMA mode aka L2MODE_POLL (0) or +# L2MOD_FIFO mechanism aka L2MODE_FIFO (1) for L2 table change notification. +l2xmsg_mode=1 + +# Memory table size configs, enable ALPM +l2_mem_entries=8192 +l3_mem_entries=8192 +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 + +#Use MMU lossy configuration +mmu_lossless=0 + +################################################################################### +# SeaStone customized configuration +################################################################################### + +#ext mdio frequency to 495/0x80/2(1.933Mhz) or 415/0x80/2(1.62MHz) +# default is 40 +# Set external MDIO freq to 6.19MHz (495MHz) or 5.19MHz (415MHz) +#* target_freq is core_clock_freq * DIVIDEND / DIVISOR / 2 +# +rate_ext_mdio_divisor=0x80 + +# use internal rom boot +phy_ext_rom_boot=0 + +# oversubscribe mode enabled, also allow 25G+50G in the same port macro +oversubscribe_mode=1 +oversubscribe_mixed_sister_25_50_enable = 1 + +# Map the physical ports to logical ports +dport_map_enable=1 + +dport_map_port_68=1 +dport_map_port_69=2 +dport_map_port_70=3 +dport_map_port_71=4 + +dport_map_port_72=5 +dport_map_port_73=6 +dport_map_port_74=7 +dport_map_port_75=8 + +dport_map_port_76=9 +dport_map_port_77=10 +dport_map_port_78=11 +dport_map_port_79=12 + +dport_map_port_80=13 +dport_map_port_81=14 +dport_map_port_82=15 +dport_map_port_83=16 + +dport_map_port_34=17 +dport_map_port_35=18 +dport_map_port_36=19 +dport_map_port_37=20 + +dport_map_port_38=21 +dport_map_port_39=22 +dport_map_port_40=23 +dport_map_port_41=24 + +dport_map_port_42=25 +dport_map_port_43=26 +dport_map_port_44=27 +dport_map_port_45=28 + +dport_map_port_46=29 +dport_map_port_47=30 +dport_map_port_48=31 +dport_map_port_49=32 + +dport_map_port_50=33 +dport_map_port_51=34 +dport_map_port_52=35 +dport_map_port_53=36 + +dport_map_port_54=37 +dport_map_port_55=38 +dport_map_port_56=39 +dport_map_port_57=40 + +dport_map_port_58=41 +dport_map_port_59=42 +dport_map_port_60=43 +dport_map_port_61=44 + +dport_map_port_62=45 +dport_map_port_63=46 +dport_map_port_64=47 +dport_map_port_65=48 + +dport_map_port_84=49 +dport_map_port_85=50 +dport_map_port_86=51 +dport_map_port_87=52 + +dport_map_port_88=53 +dport_map_port_89=54 +dport_map_port_90=55 +dport_map_port_91=56 + +dport_map_port_92=57 +dport_map_port_93=58 +dport_map_port_94=59 +dport_map_port_95=60 + +dport_map_port_96=61 +dport_map_port_97=62 +dport_map_port_98=63 +dport_map_port_99=64 + +dport_map_port_102=65 +dport_map_port_103=66 +dport_map_port_104=67 +dport_map_port_105=68 + +dport_map_port_106=69 +dport_map_port_107=70 +dport_map_port_108=71 +dport_map_port_109=72 + +dport_map_port_110=73 +dport_map_port_111=74 +dport_map_port_112=75 +dport_map_port_113=76 + +dport_map_port_114=77 +dport_map_port_115=78 +dport_map_port_116=79 +dport_map_port_117=80 + +dport_map_port_1=81 +dport_map_port_2=82 +dport_map_port_3=83 +dport_map_port_4=84 + +dport_map_port_5=85 +dport_map_port_6=86 +dport_map_port_7=87 +dport_map_port_8=88 + +dport_map_port_9=89 +dport_map_port_10=90 +dport_map_port_11=91 +dport_map_port_12=92 + +dport_map_port_13=93 +dport_map_port_14=94 +dport_map_port_15=95 +dport_map_port_16=96 + +dport_map_port_17=97 +dport_map_port_18=98 +dport_map_port_19=99 +dport_map_port_20=100 + +dport_map_port_21=101 +dport_map_port_22=102 +dport_map_port_23=103 +dport_map_port_24=104 + +dport_map_port_25=105 +dport_map_port_26=106 +dport_map_port_27=107 +dport_map_port_28=108 + +dport_map_port_29=109 +dport_map_port_30=110 +dport_map_port_31=111 +dport_map_port_32=112 + +dport_map_port_118=113 +dport_map_port_119=114 +dport_map_port_120=115 +dport_map_port_121=116 + +dport_map_port_122=117 +dport_map_port_123=118 +dport_map_port_124=119 +dport_map_port_125=120 + +dport_map_port_126=121 +dport_map_port_127=122 +dport_map_port_128=123 +dport_map_port_129=124 + +dport_map_port_130=125 +dport_map_port_131=126 +dport_map_port_132=127 +dport_map_port_133=128 + + +# port/lane mapping, 96x25G + 16x50G +portmap_68=65:100 +portmap_69=66:25:i +portmap_70=67:25:50:i +portmap_71=68:25:i + +portmap_72=69:100 +portmap_73=70:25:i +portmap_74=71:25:50:i +portmap_75=72:25:i + +portmap_76=73:100 +portmap_77=74:25:i +portmap_78=75:25:50:i +portmap_79=76:25:i + +portmap_80=77:100 +portmap_81=78:25:i +portmap_82=79:25:50:i +portmap_83=80:25:i + +portmap_34=33:100 +portmap_35=34:25:i +portmap_36=35:25:50:i +portmap_37=36:25:i + +portmap_38=37:100 +portmap_39=38:25:i +portmap_40=39:25:50:i +portmap_41=40:25:i + +portmap_42=41:100 +portmap_43=42:25:i +portmap_44=43:25:50:i +portmap_45=44:25:i + +portmap_46=45:100 +portmap_47=46:25:i +portmap_48=47:25:50:i +portmap_49=48:25:i + +portmap_50=49:100 +portmap_51=50:25:i +portmap_52=51:25:50:i +portmap_53=52:25:i + +portmap_54=53:100 +portmap_55=54:25:i +portmap_56=55:25:50:i +portmap_57=56:25:i + +portmap_58=57:100 +portmap_59=58:25:i +portmap_60=59:25:50:i +portmap_61=60:25:i + +portmap_62=61:100 +portmap_63=62:25:i +portmap_64=63:25:50:i +portmap_65=64:25:i + +portmap_84=81:100 +portmap_85=82:25:i +portmap_86=83:25:50:i +portmap_87=84:25:i + +portmap_88=85:100 +portmap_89=86:25:i +portmap_90=87:25:50:i +portmap_91=88:25:i + +portmap_92=89:100 +portmap_93=90:25:i +portmap_94=91:25:50:i +portmap_95=92:25:i + +portmap_96=93:100 +portmap_97=94:25:i +portmap_98=95:25:50:i +portmap_99=96:25:i + +portmap_102=97:100 +portmap_103=98:25:i +portmap_104=99:25:50:i +portmap_105=100:25:i + +portmap_106=101:100 +portmap_107=102:25:i +portmap_108=103:25:50:i +portmap_109=104:25:i + +portmap_110=105:100 +portmap_111=106:25:i +portmap_112=107:25:50:i +portmap_113=108:25:i + +portmap_114=109:100 +portmap_115=110:25:i +portmap_116=111:25:50:i +portmap_117=112:25:i + +portmap_1=1:100 +portmap_2=2:25:i +portmap_3=3:25:50:i +portmap_4=4:25:i + +portmap_5=5:100 +portmap_6=6:25:i +portmap_7=7:25:50:i +portmap_8=8:25:i + +portmap_9=9:100 +portmap_10=10:25:i +portmap_11=11:25:50:i +portmap_12=12:25:i + +portmap_13=13:100 +portmap_14=14:25:i +portmap_15=15:25:50:i +portmap_16=16:25:i + + +portmap_17=17:100 +portmap_18=18:25:i +portmap_19=19:25:50:i +portmap_20=20:25:i + +portmap_21=21:100 +portmap_22=22:25:i +portmap_23=23:25:50:i +portmap_24=24:25:i + +portmap_25=25:100 +portmap_26=26:25:i +portmap_27=27:25:50:i +portmap_28=28:25:i + +portmap_29=29:100 +portmap_30=30:25:i +portmap_31=31:25:50:i +portmap_32=32:25:i + +portmap_118=113:100 +portmap_119=114:25:i +portmap_120=115:25:50:i +portmap_121=116:25:i + +portmap_122=117:100 +portmap_123=118:25:i +portmap_124=119:25:50:i +portmap_125=120:25:i + +portmap_126=121:100 +portmap_127=122:25:i +portmap_128=123:25:50:i +portmap_129=124:25:i + +portmap_130=125:100 +portmap_131=126:25:i +portmap_132=127:25:50:i +portmap_133=128:25:i + +#portmap_66=129:10 +#portmap_100=131:10 + +#WC16 +xgxs_tx_lane_map_68=0x3201 +xgxs_rx_lane_map_68=0x2310 +xgxs_tx_lane_map_69=0x3201 +xgxs_rx_lane_map_69=0x2310 +xgxs_tx_lane_map_70=0x3201 +xgxs_rx_lane_map_70=0x2310 +xgxs_tx_lane_map_71=0x3201 +xgxs_rx_lane_map_71=0x2310 + + +#WC17 +xgxs_tx_lane_map_72=0x3201 +xgxs_rx_lane_map_72=0x2301 +xgxs_tx_lane_map_73=0x3201 +xgxs_rx_lane_map_73=0x2301 +xgxs_tx_lane_map_74=0x3201 +xgxs_rx_lane_map_74=0x2301 +xgxs_tx_lane_map_75=0x3201 +xgxs_rx_lane_map_75=0x2301 + +#WC18 +xgxs_tx_lane_map_76=0x0132 +xgxs_rx_lane_map_76=0x0123 +xgxs_tx_lane_map_77=0x0132 +xgxs_rx_lane_map_77=0x0123 +xgxs_tx_lane_map_78=0x0132 +xgxs_rx_lane_map_78=0x0123 +xgxs_tx_lane_map_79=0x0132 +xgxs_rx_lane_map_79=0x0123 + +#WC19 +xgxs_tx_lane_map_80=0x2031 +xgxs_rx_lane_map_80=0x1320 +xgxs_tx_lane_map_81=0x2031 +xgxs_rx_lane_map_81=0x1320 +xgxs_tx_lane_map_82=0x2031 +xgxs_rx_lane_map_82=0x1320 +xgxs_tx_lane_map_83=0x2031 +xgxs_rx_lane_map_83=0x1320 + +#WC8 +xgxs_tx_lane_map_34=0x3021 +xgxs_rx_lane_map_34=0x0213 +xgxs_tx_lane_map_35=0x3021 +xgxs_rx_lane_map_35=0x0213 +xgxs_tx_lane_map_36=0x3021 +xgxs_rx_lane_map_36=0x0213 +xgxs_tx_lane_map_37=0x3021 +xgxs_rx_lane_map_37=0x0213 + +#WC9 +xgxs_tx_lane_map_38=0x3210 +xgxs_rx_lane_map_38=0x1023 +xgxs_tx_lane_map_39=0x3210 +xgxs_rx_lane_map_39=0x1023 +xgxs_tx_lane_map_40=0x3210 +xgxs_rx_lane_map_40=0x1023 +xgxs_tx_lane_map_41=0x3210 +xgxs_rx_lane_map_41=0x1023 + +#WC10 +xgxs_tx_lane_map_42=0x2310 +xgxs_rx_lane_map_42=0x3210 +xgxs_tx_lane_map_43=0x2310 +xgxs_rx_lane_map_43=0x3210 +xgxs_tx_lane_map_44=0x2310 +xgxs_rx_lane_map_44=0x3210 +xgxs_tx_lane_map_45=0x2310 +xgxs_rx_lane_map_45=0x3210 + +#WC11 +xgxs_tx_lane_map_46=0x1032 +xgxs_rx_lane_map_46=0x1302 +xgxs_tx_lane_map_47=0x1032 +xgxs_rx_lane_map_47=0x1302 +xgxs_tx_lane_map_48=0x1032 +xgxs_rx_lane_map_48=0x1302 +xgxs_tx_lane_map_49=0x1032 +xgxs_rx_lane_map_49=0x1302 + +#WC12 +xgxs_tx_lane_map_50=0x3201 +xgxs_rx_lane_map_50=0x0213 +xgxs_tx_lane_map_51=0x3201 +xgxs_rx_lane_map_51=0x0213 +xgxs_tx_lane_map_52=0x3201 +xgxs_rx_lane_map_52=0x0213 +xgxs_tx_lane_map_53=0x3201 +xgxs_rx_lane_map_53=0x0213 + + +#WC13 +xgxs_tx_lane_map_54=0x2301 +xgxs_rx_lane_map_54=0x2310 +xgxs_tx_lane_map_55=0x2301 +xgxs_rx_lane_map_55=0x2310 +xgxs_tx_lane_map_56=0x2301 +xgxs_rx_lane_map_56=0x2310 +xgxs_tx_lane_map_57=0x2301 +xgxs_rx_lane_map_57=0x2310 + +#WC14 +xgxs_tx_lane_map_58=0x3201 +xgxs_rx_lane_map_58=0x0213 +xgxs_tx_lane_map_59=0x3201 +xgxs_rx_lane_map_59=0x0213 +xgxs_tx_lane_map_60=0x3201 +xgxs_rx_lane_map_60=0x0213 +xgxs_tx_lane_map_61=0x3201 +xgxs_rx_lane_map_61=0x0213 + +#WC15 +xgxs_tx_lane_map_62=0x1302 +xgxs_rx_lane_map_62=0x2310 +xgxs_tx_lane_map_63=0x1302 +xgxs_rx_lane_map_63=0x2310 +xgxs_tx_lane_map_64=0x1302 +xgxs_rx_lane_map_64=0x2310 +xgxs_tx_lane_map_65=0x1302 +xgxs_rx_lane_map_65=0x2310 + +#WC20 +xgxs_tx_lane_map_84=0x0213 +xgxs_rx_lane_map_84=0x2301 +xgxs_tx_lane_map_85=0x0213 +xgxs_rx_lane_map_85=0x2301 +xgxs_tx_lane_map_86=0x0213 +xgxs_rx_lane_map_86=0x2301 +xgxs_tx_lane_map_87=0x0213 +xgxs_rx_lane_map_87=0x2301 + +#WC21 +xgxs_tx_lane_map_88=0x0132 +xgxs_rx_lane_map_88=0x3210 +xgxs_tx_lane_map_89=0x0132 +xgxs_rx_lane_map_89=0x3210 +xgxs_tx_lane_map_90=0x0132 +xgxs_rx_lane_map_90=0x3210 +xgxs_tx_lane_map_91=0x0132 +xgxs_rx_lane_map_91=0x3210 + +#WC22 +xgxs_tx_lane_map_92=0x0132 +xgxs_rx_lane_map_92=0x2031 +xgxs_tx_lane_map_93=0x0132 +xgxs_rx_lane_map_93=0x2031 +xgxs_tx_lane_map_94=0x0132 +xgxs_rx_lane_map_94=0x2031 +xgxs_tx_lane_map_95=0x0132 +xgxs_rx_lane_map_95=0x2031 + +#WC23 +xgxs_tx_lane_map_96=0x2031 +xgxs_rx_lane_map_96=0x3201 +xgxs_tx_lane_map_97=0x2031 +xgxs_rx_lane_map_97=0x3201 +xgxs_tx_lane_map_98=0x2031 +xgxs_rx_lane_map_98=0x3201 +xgxs_tx_lane_map_99=0x2031 +xgxs_rx_lane_map_99=0x3201 + +#WC24 +xgxs_tx_lane_map_102=0x0132 +xgxs_rx_lane_map_102=0x2301 +xgxs_tx_lane_map_103=0x0132 +xgxs_rx_lane_map_103=0x2301 +xgxs_tx_lane_map_104=0x0132 +xgxs_rx_lane_map_104=0x2301 +xgxs_tx_lane_map_105=0x0132 +xgxs_rx_lane_map_105=0x2301 + +#WC25 +xgxs_tx_lane_map_106=0x0132 +xgxs_rx_lane_map_106=0x3201 +xgxs_tx_lane_map_107=0x0132 +xgxs_rx_lane_map_107=0x3201 +xgxs_tx_lane_map_108=0x0132 +xgxs_rx_lane_map_108=0x3201 +xgxs_tx_lane_map_109=0x0132 +xgxs_rx_lane_map_109=0x3201 + +#WC26 +xgxs_tx_lane_map_110=0x0132 +xgxs_rx_lane_map_110=0x2031 +xgxs_tx_lane_map_111=0x0132 +xgxs_rx_lane_map_111=0x2031 +xgxs_tx_lane_map_112=0x0132 +xgxs_rx_lane_map_112=0x2031 +xgxs_tx_lane_map_113=0x0132 +xgxs_rx_lane_map_113=0x2031 + +#WC27 +xgxs_tx_lane_map_114=0x2031 +xgxs_rx_lane_map_114=0x2301 +xgxs_tx_lane_map_115=0x2031 +xgxs_rx_lane_map_115=0x2301 +xgxs_tx_lane_map_116=0x2031 +xgxs_rx_lane_map_116=0x2301 +xgxs_tx_lane_map_117=0x2031 +xgxs_rx_lane_map_117=0x2301 + + +#WC0 +xgxs_tx_lane_map_1=0x3210 +xgxs_rx_lane_map_1=0x3120 +xgxs_tx_lane_map_2=0x3210 +xgxs_rx_lane_map_2=0x3120 +xgxs_tx_lane_map_3=0x3210 +xgxs_rx_lane_map_3=0x3120 +xgxs_tx_lane_map_4=0x3210 +xgxs_rx_lane_map_4=0x3120 + +#WC1 +xgxs_tx_lane_map_5=0x0132 +xgxs_rx_lane_map_5=0x1023 +xgxs_tx_lane_map_6=0x0132 +xgxs_rx_lane_map_6=0x1023 +xgxs_tx_lane_map_7=0x0132 +xgxs_rx_lane_map_7=0x1023 +xgxs_tx_lane_map_8=0x0132 +xgxs_rx_lane_map_8=0x1023 + +#WC2 +xgxs_tx_lane_map_9=0x3201 +xgxs_rx_lane_map_9=0x3120 +xgxs_tx_lane_map_10=0x3201 +xgxs_rx_lane_map_10=0x3120 +xgxs_tx_lane_map_11=0x3201 +xgxs_rx_lane_map_11=0x3120 +xgxs_tx_lane_map_12=0x3201 +xgxs_rx_lane_map_12=0x3120 + +#WC3 +xgxs_tx_lane_map_13=0x2031 +xgxs_rx_lane_map_13=0x1032 +xgxs_tx_lane_map_14=0x2031 +xgxs_rx_lane_map_14=0x1032 +xgxs_tx_lane_map_15=0x2031 +xgxs_rx_lane_map_15=0x1032 +xgxs_tx_lane_map_16=0x2031 +xgxs_rx_lane_map_16=0x1032 + +#WC4 +xgxs_tx_lane_map_17=0x2310 +xgxs_rx_lane_map_17=0x3210 +xgxs_tx_lane_map_18=0x2310 +xgxs_rx_lane_map_18=0x3210 +xgxs_tx_lane_map_19=0x2310 +xgxs_rx_lane_map_19=0x3210 +xgxs_tx_lane_map_20=0x2310 +xgxs_rx_lane_map_20=0x3210 + +#WC5 +xgxs_tx_lane_map_21=0x2301 +xgxs_rx_lane_map_21=0x3120 +xgxs_tx_lane_map_22=0x2301 +xgxs_rx_lane_map_22=0x3120 +xgxs_tx_lane_map_23=0x2301 +xgxs_rx_lane_map_23=0x3120 +xgxs_tx_lane_map_24=0x2301 +xgxs_rx_lane_map_25=0x3120 + +#WC6 +xgxs_tx_lane_map_25=0x3201 +xgxs_rx_lane_map_25=0x0213 +xgxs_tx_lane_map_26=0x3201 +xgxs_rx_lane_map_26=0x0213 +xgxs_tx_lane_map_27=0x3201 +xgxs_rx_lane_map_27=0x0213 +xgxs_tx_lane_map_28=0x3201 +xgxs_rx_lane_map_28=0x0213 + +#WC7 +xgxs_tx_lane_map_29=0x1302 +xgxs_rx_lane_map_29=0x1023 +xgxs_tx_lane_map_30=0x1302 +xgxs_rx_lane_map_30=0x1023 +xgxs_tx_lane_map_31=0x1302 +xgxs_rx_lane_map_31=0x1023 +xgxs_tx_lane_map_32=0x1302 +xgxs_rx_lane_map_32=0x1023 + +#WC28 +xgxs_tx_lane_map_118=0x1320 +xgxs_rx_lane_map_118=0x1302 +xgxs_tx_lane_map_119=0x1320 +xgxs_rx_lane_map_119=0x1302 +xgxs_tx_lane_map_120=0x1320 +xgxs_rx_lane_map_120=0x1302 +xgxs_tx_lane_map_121=0x1320 +xgxs_rx_lane_map_121=0x1302 + +#WC29 +xgxs_tx_lane_map_122=0x1032 +xgxs_rx_lane_map_122=0x1023 +xgxs_tx_lane_map_123=0x1032 +xgxs_rx_lane_map_123=0x1023 +xgxs_tx_lane_map_124=0x1032 +xgxs_rx_lane_map_124=0x1023 +xgxs_tx_lane_map_125=0x1032 +xgxs_rx_lane_map_125=0x1023 + +#WC30 +xgxs_tx_lane_map_126=0x3120 +xgxs_rx_lane_map_126=0x3120 +xgxs_tx_lane_map_127=0x3120 +xgxs_rx_lane_map_127=0x3120 +xgxs_tx_lane_map_128=0x3120 +xgxs_rx_lane_map_128=0x3120 +xgxs_tx_lane_map_129=0x3120 +xgxs_rx_lane_map_129=0x3120 + +#WC31 +xgxs_tx_lane_map_130=0x1302 +xgxs_rx_lane_map_130=0x2310 +xgxs_tx_lane_map_131=0x1302 +xgxs_rx_lane_map_131=0x2310 +xgxs_tx_lane_map_132=0x1302 +xgxs_rx_lane_map_132=0x2310 +xgxs_tx_lane_map_133=0x1302 +xgxs_rx_lane_map_133=0x2310 + + +#Polarity flip settings + +#WC16 +phy_xaui_tx_polarity_flip_68=0x0000 +phy_xaui_tx_polarity_flip_69=0x0000 +phy_xaui_tx_polarity_flip_70=0x0000 +phy_xaui_tx_polarity_flip_71=0x0000 + +phy_xaui_rx_polarity_flip_68=0x0000 +phy_xaui_rx_polarity_flip_69=0x0000 +phy_xaui_rx_polarity_flip_70=0x0000 +phy_xaui_rx_polarity_flip_71=0x0000 + +#WC17 +phy_xaui_tx_polarity_flip_72=0x000D +phy_xaui_tx_polarity_flip_73=0x0000 +phy_xaui_tx_polarity_flip_74=0x0003 +phy_xaui_tx_polarity_flip_75=0x0001 + +phy_xaui_rx_polarity_flip_72=0x0002 +phy_xaui_rx_polarity_flip_73=0x0001 +phy_xaui_rx_polarity_flip_74=0x0000 +phy_xaui_rx_polarity_flip_75=0x0000 + +#WC18 +phy_xaui_tx_polarity_flip_76=0x000F +phy_xaui_tx_polarity_flip_77=0x0001 +phy_xaui_tx_polarity_flip_78=0x0003 +phy_xaui_tx_polarity_flip_79=0x0001 + +phy_xaui_rx_polarity_flip_76=0x0000 +phy_xaui_rx_polarity_flip_77=0x0000 +phy_xaui_rx_polarity_flip_78=0x0000 +phy_xaui_rx_polarity_flip_79=0x0000 + +#WC19 +phy_xaui_tx_polarity_flip_80=0x000F +phy_xaui_tx_polarity_flip_81=0x0001 +phy_xaui_tx_polarity_flip_82=0x0003 +phy_xaui_tx_polarity_flip_83=0x0001 + +phy_xaui_rx_polarity_flip_80=0x000F +phy_xaui_rx_polarity_flip_81=0x0001 +phy_xaui_rx_polarity_flip_82=0x0003 +phy_xaui_rx_polarity_flip_83=0x0001 + +#WC8 +phy_xaui_tx_polarity_flip_34=0x000E +phy_xaui_tx_polarity_flip_35=0x0001 +phy_xaui_tx_polarity_flip_36=0x0003 +phy_xaui_tx_polarity_flip_37=0x0001 + +phy_xaui_rx_polarity_flip_34=0x0000 +phy_xaui_rx_polarity_flip_35=0x0000 +phy_xaui_rx_polarity_flip_36=0x0000 +phy_xaui_rx_polarity_flip_37=0x0000 + +#WC9 +phy_xaui_tx_polarity_flip_38=0x0008 +phy_xaui_tx_polarity_flip_39=0x0000 +phy_xaui_tx_polarity_flip_40=0x0002 +phy_xaui_tx_polarity_flip_41=0x0001 + +phy_xaui_rx_polarity_flip_38=0x0000 +phy_xaui_rx_polarity_flip_39=0x0000 +phy_xaui_rx_polarity_flip_40=0x0000 +phy_xaui_rx_polarity_flip_41=0x0000 + +#WC10 +phy_xaui_tx_polarity_flip_42=0x000D +phy_xaui_tx_polarity_flip_43=0x0000 +phy_xaui_tx_polarity_flip_44=0x0003 +phy_xaui_tx_polarity_flip_45=0x0001 + +phy_xaui_rx_polarity_flip_42=0x0000 +phy_xaui_rx_polarity_flip_43=0x0000 +phy_xaui_rx_polarity_flip_44=0x0000 +phy_xaui_rx_polarity_flip_45=0x0000 + +#WC11 +phy_xaui_tx_polarity_flip_46=0x0000 +phy_xaui_tx_polarity_flip_47=0x0000 +phy_xaui_tx_polarity_flip_48=0x0000 +phy_xaui_tx_polarity_flip_49=0x0000 + +phy_xaui_rx_polarity_flip_46=0x0000 +phy_xaui_rx_polarity_flip_47=0x0000 +phy_xaui_rx_polarity_flip_48=0x0000 +phy_xaui_rx_polarity_flip_49=0x0000 + +#WC12 +phy_xaui_tx_polarity_flip_50=0x0002 +phy_xaui_tx_polarity_flip_51=0x0001 +phy_xaui_tx_polarity_flip_52=0x0000 +phy_xaui_tx_polarity_flip_53=0x0000 + +phy_xaui_rx_polarity_flip_50=0x0000 +phy_xaui_rx_polarity_flip_51=0x0000 +phy_xaui_rx_polarity_flip_52=0x0000 +phy_xaui_rx_polarity_flip_53=0x0000 + +#WC13 +phy_xaui_tx_polarity_flip_54=0x0002 +phy_xaui_tx_polarity_flip_55=0x0001 +phy_xaui_tx_polarity_flip_56=0x0000 +phy_xaui_tx_polarity_flip_57=0x0000 + +phy_xaui_rx_polarity_flip_54=0x0000 +phy_xaui_rx_polarity_flip_55=0x0000 +phy_xaui_rx_polarity_flip_56=0x0000 +phy_xaui_rx_polarity_flip_57=0x0000 + +#WC14 +phy_xaui_tx_polarity_flip_58=0x0000 +phy_xaui_tx_polarity_flip_59=0x0000 +phy_xaui_tx_polarity_flip_60=0x0000 +phy_xaui_tx_polarity_flip_61=0x0000 + +phy_xaui_rx_polarity_flip_58=0x0000 +phy_xaui_rx_polarity_flip_59=0x0000 +phy_xaui_rx_polarity_flip_60=0x0000 +phy_xaui_rx_polarity_flip_61=0x0000 + +#WC15 +phy_xaui_tx_polarity_flip_62=0x000A +phy_xaui_tx_polarity_flip_63=0x0001 +phy_xaui_tx_polarity_flip_64=0x0002 +phy_xaui_tx_polarity_flip_65=0x0001 + +phy_xaui_rx_polarity_flip_62=0x000F +phy_xaui_rx_polarity_flip_63=0x0001 +phy_xaui_rx_polarity_flip_64=0x0003 +phy_xaui_rx_polarity_flip_65=0x0001 + +#WC20 +phy_xaui_tx_polarity_flip_84=0x0007 +phy_xaui_tx_polarity_flip_85=0x0001 +phy_xaui_tx_polarity_flip_86=0x0001 +phy_xaui_tx_polarity_flip_87=0x0000 + +phy_xaui_rx_polarity_flip_84=0x000E +phy_xaui_rx_polarity_flip_85=0x0001 +phy_xaui_rx_polarity_flip_86=0x0003 +phy_xaui_rx_polarity_flip_87=0x0001 + +#WC21 +phy_xaui_tx_polarity_flip_88=0x000D +phy_xaui_tx_polarity_flip_89=0x0000 +phy_xaui_tx_polarity_flip_90=0x0003 +phy_xaui_tx_polarity_flip_91=0x0001 + +phy_xaui_rx_polarity_flip_88=0x000D +phy_xaui_rx_polarity_flip_89=0x0000 +phy_xaui_rx_polarity_flip_90=0x0003 +phy_xaui_rx_polarity_flip_91=0x0001 + +#WC22 +phy_xaui_tx_polarity_flip_92=0x000F +phy_xaui_tx_polarity_flip_93=0x0001 +phy_xaui_tx_polarity_flip_94=0x0003 +phy_xaui_tx_polarity_flip_95=0x0001 + +phy_xaui_rx_polarity_flip_92=0x0008 +phy_xaui_rx_polarity_flip_93=0x0000 +phy_xaui_rx_polarity_flip_94=0x0002 +phy_xaui_rx_polarity_flip_95=0x0001 + +#WC23 +phy_xaui_tx_polarity_flip_96=0x0005 +phy_xaui_tx_polarity_flip_97=0x0000 +phy_xaui_tx_polarity_flip_98=0x0001 +phy_xaui_tx_polarity_flip_99=0x0000 + +phy_xaui_rx_polarity_flip_96=0x0000 +phy_xaui_rx_polarity_flip_97=0x0000 +phy_xaui_rx_polarity_flip_98=0x0000 +phy_xaui_rx_polarity_flip_99=0x0000 + +#WC24 +phy_xaui_tx_polarity_flip_102=0x0000 +phy_xaui_tx_polarity_flip_103=0x0000 +phy_xaui_tx_polarity_flip_104=0x0000 +phy_xaui_tx_polarity_flip_105=0x0000 + +phy_xaui_rx_polarity_flip_102=0x000F +phy_xaui_rx_polarity_flip_103=0x0001 +phy_xaui_rx_polarity_flip_104=0x0003 +phy_xaui_rx_polarity_flip_105=0x0001 + +#WC25 +phy_xaui_tx_polarity_flip_106=0x000F +phy_xaui_tx_polarity_flip_107=0x0001 +phy_xaui_tx_polarity_flip_108=0x0003 +phy_xaui_tx_polarity_flip_109=0x0001 + +phy_xaui_rx_polarity_flip_106=0x0000 +phy_xaui_rx_polarity_flip_107=0x0000 +phy_xaui_rx_polarity_flip_108=0x0000 +phy_xaui_rx_polarity_flip_109=0x0000 + +#WC26 +phy_xaui_tx_polarity_flip_110=0x000F +phy_xaui_tx_polarity_flip_111=0x0001 +phy_xaui_tx_polarity_flip_112=0x0003 +phy_xaui_tx_polarity_flip_113=0x0001 + +phy_xaui_rx_polarity_flip_110=0x000F +phy_xaui_rx_polarity_flip_111=0x0001 +phy_xaui_rx_polarity_flip_112=0x0003 +phy_xaui_rx_polarity_flip_113=0x0001 + +#WC27 +phy_xaui_tx_polarity_flip_114=0x000F +phy_xaui_tx_polarity_flip_115=0x0001 +phy_xaui_tx_polarity_flip_117=0x0003 +phy_xaui_tx_polarity_flip_116=0x0001 + +phy_xaui_rx_polarity_flip_114=0x0007 +phy_xaui_rx_polarity_flip_115=0x0001 +phy_xaui_rx_polarity_flip_116=0x0001 +phy_xaui_rx_polarity_flip_117=0x0000 + +#WC0 +phy_xaui_tx_polarity_flip_1=0x0003 +phy_xaui_tx_polarity_flip_2=0x0001 +phy_xaui_tx_polarity_flip_3=0x0000 +phy_xaui_tx_polarity_flip_4=0x0000 + +phy_xaui_rx_polarity_flip_1=0x000F +phy_xaui_rx_polarity_flip_2=0x0001 +phy_xaui_rx_polarity_flip_3=0x0003 +phy_xaui_rx_polarity_flip_4=0x0001 + +#WC1 +phy_xaui_tx_polarity_flip_5=0x0007 +phy_xaui_tx_polarity_flip_6=0x0001 +phy_xaui_tx_polarity_flip_7=0x0001 +phy_xaui_tx_polarity_flip_8=0x0000 + +phy_xaui_rx_polarity_flip_5=0x0000 +phy_xaui_rx_polarity_flip_6=0x0000 +phy_xaui_rx_polarity_flip_7=0x0000 +phy_xaui_rx_polarity_flip_8=0x0000 + +#WC2 +phy_xaui_tx_polarity_flip_9=0x0002 +phy_xaui_tx_polarity_flip_10=0x0001 +phy_xaui_tx_polarity_flip_11=0x0000 +phy_xaui_tx_polarity_flip_12=0x0000 + +phy_xaui_rx_polarity_flip_9=0x0008 +phy_xaui_rx_polarity_flip_10=0x0000 +phy_xaui_rx_polarity_flip_11=0x0002 +phy_xaui_rx_polarity_flip_12=0x0001 + +#WC3 +phy_xaui_tx_polarity_flip_13=0x000F +phy_xaui_tx_polarity_flip_14=0x0001 +phy_xaui_tx_polarity_flip_15=0x0003 +phy_xaui_tx_polarity_flip_16=0x0001 + +phy_xaui_rx_polarity_flip_13=0x0000 +phy_xaui_rx_polarity_flip_14=0x0000 +phy_xaui_rx_polarity_flip_15=0x0000 +phy_xaui_rx_polarity_flip_16=0x0000 + +#WC4 +phy_xaui_tx_polarity_flip_17=0x0007 +phy_xaui_tx_polarity_flip_18=0x0001 +phy_xaui_tx_polarity_flip_19=0x0001 +phy_xaui_tx_polarity_flip_20=0x0000 + + +phy_xaui_rx_polarity_flip_17=0x0000 +phy_xaui_rx_polarity_flip_18=0x0000 +phy_xaui_rx_polarity_flip_19=0x0000 +phy_xaui_rx_polarity_flip_20=0x0000 + + + +#WC5 +phy_xaui_tx_polarity_flip_21=0x0000 +phy_xaui_tx_polarity_flip_22=0x0000 +phy_xaui_tx_polarity_flip_23=0x0000 +phy_xaui_tx_polarity_flip_24=0x0000 + +phy_xaui_rx_polarity_flip_21=0x0000 +phy_xaui_rx_polarity_flip_22=0x0000 +phy_xaui_rx_polarity_flip_23=0x0000 +phy_xaui_rx_polarity_flip_24=0x0000 + + + +#WC6 +phy_xaui_tx_polarity_flip_25=0x0002 +phy_xaui_tx_polarity_flip_26=0x0001 +phy_xaui_tx_polarity_flip_27=0x0000 +phy_xaui_tx_polarity_flip_28=0x0000 + +phy_xaui_rx_polarity_flip_25=0x0005 +phy_xaui_rx_polarity_flip_26=0x0000 +phy_xaui_rx_polarity_flip_27=0x0001 +phy_xaui_rx_polarity_flip_28=0x0000 + + + +#WC7 +phy_xaui_tx_polarity_flip_29=0x0002 +phy_xaui_tx_polarity_flip_30=0x0001 +phy_xaui_tx_polarity_flip_31=0x0000 +phy_xaui_tx_polarity_flip_32=0x0000 + +phy_xaui_rx_polarity_flip_29=0x0000 +phy_xaui_rx_polarity_flip_30=0x0000 +phy_xaui_rx_polarity_flip_31=0x0000 +phy_xaui_rx_polarity_flip_32=0x0000 + + + +#WC28 +phy_xaui_tx_polarity_flip_118=0x000F +phy_xaui_tx_polarity_flip_119=0x0001 +phy_xaui_tx_polarity_flip_120=0x0003 +phy_xaui_tx_polarity_flip_121=0x0001 + +phy_xaui_rx_polarity_flip_118=0x000F +phy_xaui_rx_polarity_flip_119=0x0001 +phy_xaui_rx_polarity_flip_120=0x0003 +phy_xaui_rx_polarity_flip_121=0x0001 + + + +#WC29 +phy_xaui_tx_polarity_flip_122=0x0004 +phy_xaui_tx_polarity_flip_123=0x0000 +phy_xaui_tx_polarity_flip_124=0x0001 +phy_xaui_tx_polarity_flip_125=0x0000 + +phy_xaui_rx_polarity_flip_122=0x0000 +phy_xaui_rx_polarity_flip_123=0x0000 +phy_xaui_rx_polarity_flip_124=0x0000 +phy_xaui_rx_polarity_flip_125=0x0000 + + + +#WC30 +phy_xaui_tx_polarity_flip_126=0x000F +phy_xaui_tx_polarity_flip_127=0x0001 +phy_xaui_tx_polarity_flip_128=0x0003 +phy_xaui_tx_polarity_flip_129=0x0001 + +phy_xaui_rx_polarity_flip_126=0x0000 +phy_xaui_rx_polarity_flip_127=0x0000 +phy_xaui_rx_polarity_flip_128=0x0000 +phy_xaui_rx_polarity_flip_129=0x0000 + + + +#WC31 +phy_xaui_tx_polarity_flip_130=0x0006 +phy_xaui_tx_polarity_flip_131=0x0001 +phy_xaui_tx_polarity_flip_132=0x0001 +phy_xaui_tx_polarity_flip_133=0x0000 + +phy_xaui_rx_polarity_flip_130=0x0000 +phy_xaui_rx_polarity_flip_131=0x0000 +phy_xaui_rx_polarity_flip_132=0x0000 +phy_xaui_rx_polarity_flip_133=0x0000 + + + diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/port_config.ini b/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/port_config.ini new file mode 100644 index 00000000000..238c9fa4be7 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/port_config.ini @@ -0,0 +1,129 @@ +# name lanes alias index speed +Ethernet0 33,34 QSFP1/1 1 100000 +Ethernet1 35,36 QSFP1/2 1 100000 +Ethernet2 37,38 QSFP1/3 1 100000 +Ethernet3 39,40 QSFP1/4 1 100000 +Ethernet4 41,42 QSFP2/1 2 100000 +Ethernet5 43,44 QSFP2/2 2 100000 +Ethernet6 45,46 QSFP2/3 2 100000 +Ethernet7 47,48 QSFP2/4 2 100000 +Ethernet8 49,50 QSFP3/1 3 100000 +Ethernet9 51,52 QSFP3/2 3 100000 +Ethernet10 53,54 QSFP3/3 3 100000 +Ethernet11 55,56 QSFP3/4 3 100000 +Ethernet12 57,58 QSFP4/1 4 100000 +Ethernet13 59,60 QSFP4/2 4 100000 +Ethernet14 61,62 QSFP4/3 4 100000 +Ethernet15 63,64 QSFP4/4 4 100000 +Ethernet16 65,66 QSFP5/1 5 100000 +Ethernet17 67,68 QSFP5/2 5 100000 +Ethernet18 69,70 QSFP5/3 5 100000 +Ethernet19 71,72 QSFP5/4 5 100000 +Ethernet20 73,74 QSFP6/1 6 100000 +Ethernet21 75,76 QSFP6/2 6 100000 +Ethernet22 77,78 QSFP6/3 6 100000 +Ethernet23 79,80 QSFP6/4 6 100000 +Ethernet24 81,82 QSFP7/1 7 100000 +Ethernet25 83,84 QSFP7/2 7 100000 +Ethernet26 85,86 QSFP7/3 7 100000 +Ethernet27 87,88 QSFP7/4 7 100000 +Ethernet28 89,90 QSFP8/1 8 100000 +Ethernet29 91,92 QSFP8/2 8 100000 +Ethernet30 93,94 QSFP8/3 8 100000 +Ethernet31 95,96 QSFP8/4 8 100000 +Ethernet32 1,2 QSFP9/1 9 100000 +Ethernet33 3,4 QSFP9/2 9 100000 +Ethernet34 5,6 QSFP9/3 9 100000 +Ethernet35 7,8 QSFP9/4 9 100000 +Ethernet36 9,10 QSFP10/1 10 100000 +Ethernet37 11,12 QSFP10/2 10 100000 +Ethernet38 13,14 QSFP10/3 10 100000 +Ethernet39 15,16 QSFP10/4 10 100000 +Ethernet40 17,18 QSFP11/1 11 100000 +Ethernet41 19,20 QSFP11/2 11 100000 +Ethernet42 21,22 QSFP11/3 11 100000 +Ethernet43 23,24 QSFP11/4 11 100000 +Ethernet44 25,26 QSFP12/1 12 100000 +Ethernet45 27,28 QSFP12/2 12 100000 +Ethernet46 29,30 QSFP12/3 12 100000 +Ethernet47 31,32 QSFP12/4 12 100000 +Ethernet48 97,98 QSFP13/1 13 100000 +Ethernet49 99,100 QSFP13/2 13 100000 +Ethernet50 101,102 QSFP13/3 13 100000 +Ethernet51 103,104 QSFP13/4 13 100000 +Ethernet52 105,106 QSFP14/1 14 100000 +Ethernet53 107,108 QSFP14/2 14 100000 +Ethernet54 109,110 QSFP14/3 14 100000 +Ethernet55 111,112 QSFP14/4 14 100000 +Ethernet56 113,114 QSFP15/1 15 100000 +Ethernet57 115,116 QSFP15/2 15 100000 +Ethernet58 117,118 QSFP15/3 15 100000 +Ethernet59 119,120 QSFP15/4 15 100000 +Ethernet60 121,122 QSFP16/1 16 100000 +Ethernet61 123,124 QSFP16/2 16 100000 +Ethernet62 125,126 QSFP16/3 16 100000 +Ethernet63 127,128 QSFP16/4 16 100000 +Ethernet64 129,130 QSFP17/1 17 100000 +Ethernet65 131,132 QSFP17/2 17 100000 +Ethernet66 133,134 QSFP17/3 17 100000 +Ethernet67 135,136 QSFP17/4 17 100000 +Ethernet68 137,138 QSFP18/1 18 100000 +Ethernet69 139,140 QSFP18/2 18 100000 +Ethernet70 141,142 QSFP18/3 18 100000 +Ethernet71 143,144 QSFP18/4 18 100000 +Ethernet72 145,146 QSFP19/1 19 100000 +Ethernet73 147,148 QSFP19/2 19 100000 +Ethernet74 149,150 QSFP19/3 19 100000 +Ethernet75 151,152 QSFP19/4 19 100000 +Ethernet76 153,154 QSFP20/1 20 100000 +Ethernet77 155,156 QSFP20/2 20 100000 +Ethernet78 157,158 QSFP20/3 20 100000 +Ethernet79 159,160 QSFP20/4 20 100000 +Ethernet80 225,226 QSFP21/1 21 100000 +Ethernet81 227,228 QSFP21/2 21 100000 +Ethernet82 229,230 QSFP21/3 21 100000 +Ethernet83 231,232 QSFP21/4 21 100000 +Ethernet84 233,234 QSFP22/1 22 100000 +Ethernet85 235,236 QSFP22/2 22 100000 +Ethernet86 237,238 QSFP22/3 22 100000 +Ethernet87 239,240 QSFP22/4 22 100000 +Ethernet88 241,242 QSFP23/1 23 100000 +Ethernet89 243,244 QSFP23/2 23 100000 +Ethernet90 245,246 QSFP23/3 23 100000 +Ethernet91 247,248 QSFP23/4 23 100000 +Ethernet92 249,250 QSFP24/1 24 100000 +Ethernet93 251,252 QSFP24/2 24 100000 +Ethernet94 253,254 QSFP24/3 24 100000 +Ethernet95 255,256 QSFP24/4 24 100000 +Ethernet96 161,162 QSFP25/1 25 100000 +Ethernet97 163,164 QSFP25/2 25 100000 +Ethernet98 165,166 QSFP25/3 25 100000 +Ethernet99 167,168 QSFP25/4 25 100000 +Ethernet100 169,170 QSFP26/1 26 100000 +Ethernet101 171,172 QSFP26/2 26 100000 +Ethernet102 173,174 QSFP26/3 26 100000 +Ethernet103 175,176 QSFP26/4 26 100000 +Ethernet104 177,178 QSFP27/1 27 100000 +Ethernet105 179,180 QSFP27/2 27 100000 +Ethernet106 181,182 QSFP27/3 27 100000 +Ethernet107 183,184 QSFP27/4 27 100000 +Ethernet108 185,186 QSFP28/1 28 100000 +Ethernet109 187,188 QSFP28/2 28 100000 +Ethernet110 189,190 QSFP28/3 28 100000 +Ethernet111 191,192 QSFP28/4 28 100000 +Ethernet112 193,194 QSFP29/1 29 100000 +Ethernet113 195,196 QSFP29/2 29 100000 +Ethernet114 197,198 QSFP29/3 29 100000 +Ethernet115 199,200 QSFP29/4 29 100000 +Ethernet116 201,202 QSFP30/1 30 100000 +Ethernet117 203,204 QSFP30/2 30 100000 +Ethernet118 205,206 QSFP30/3 30 100000 +Ethernet119 207,208 QSFP30/4 30 100000 +Ethernet120 209,210 QSFP31/1 31 100000 +Ethernet121 211,212 QSFP31/2 31 100000 +Ethernet122 213,214 QSFP31/3 31 100000 +Ethernet123 215,216 QSFP31/4 31 100000 +Ethernet124 217,218 QSFP32/1 32 100000 +Ethernet125 219,220 QSFP32/2 32 100000 +Ethernet126 221,222 QSFP32/3 32 100000 +Ethernet127 223,224 QSFP32/4 32 100000 \ No newline at end of file diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/sai.profile b/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/sai.profile new file mode 100644 index 00000000000..bc7681f0272 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-128x100G.config.bcm diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm b/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm new file mode 100644 index 00000000000..0b66c8b5381 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm @@ -0,0 +1,441 @@ +pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe +ccm_dma_enable=0 +ccmdma_intr_enable=0 +ctr_evict_enable=0 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +phy_enable=0 +phy_null=1 +pll_bypass=1 + +init_all_modules=0 + +portmap_20=33:100:2 +portmap_21=35:100:2 +portmap_22=37:100:2 +portmap_23=39:100:2 + +portmap_24=41:100:2 +portmap_25=43:100:2 +portmap_26=45:100:2 +portmap_27=47:100:2 + +portmap_28=49:100:2 +portmap_29=51:100:2 +portmap_30=53:100:2 +portmap_31=55:100:2 + +portmap_32=57:100:2 +portmap_33=59:100:2 +portmap_34=61:100:2 +portmap_35=63:100:2 + +portmap_40=65:100:2 +portmap_41=67:100:2 +portmap_42=69:100:2 +portmap_43=71:100:2 + +portmap_44=73:100:2 +portmap_45=75:100:2 +portmap_46=77:100:2 +portmap_47=79:100:2 + +portmap_48=81:100:2 +portmap_49=83:100:2 +portmap_50=85:100:2 +portmap_51=87:100:2 + +portmap_52=89:100:2 +portmap_53=91:100:2 +portmap_54=93:100:2 +portmap_55=95:100:2 + +portmap_1=1:100:2 +portmap_2=3:100:2 +portmap_3=5:100:2 +portmap_4=7:100:2 + +portmap_5=9:100:2 +portmap_6=11:100:2 +portmap_7=13:100:2 +portmap_8=15:100:2 + +portmap_9=17:100:2 +portmap_10=19:100:2 +portmap_11=21:100:2 +portmap_12=23:100:2 + +portmap_13=25:100:2 +portmap_14=27:100:2 +portmap_15=29:100:2 +portmap_16=31:100:2 + +portmap_60=97:100:2 +portmap_61=99:100:2 +portmap_62=101:100:2 +portmap_63=103:100:2 + +portmap_64=105:100:2 +portmap_65=107:100:2 +portmap_66=109:100:2 +portmap_67=111:100:2 + +portmap_68=113:100:2 +portmap_69=115:100:2 +portmap_70=117:100:2 +portmap_71=119:100:2 + +portmap_72=121:100:2 +portmap_73=123:100:2 +portmap_74=125:100:2 +portmap_75=127:100:2 + +portmap_80=129:100:2 +portmap_81=131:100:2 +portmap_82=133:100:2 +portmap_83=135:100:2 + +portmap_84=137:100:2 +portmap_85=139:100:2 +portmap_86=141:100:2 +portmap_87=143:100:2 + +portmap_88=145:100:2 +portmap_89=147:100:2 +portmap_90=149:100:2 +portmap_91=151:100:2 + +portmap_92=153:100:2 +portmap_93=155:100:2 +portmap_94=157:100:2 +portmap_95=159:100:2 + +portmap_140=225:100:2 +portmap_141=227:100:2 +portmap_142=229:100:2 +portmap_143=231:100:2 + +portmap_144=233:100:2 +portmap_145=235:100:2 +portmap_146=237:100:2 +portmap_147=239:100:2 + +portmap_148=241:100:2 +portmap_149=243:100:2 +portmap_150=245:100:2 +portmap_151=247:100:2 + +portmap_152=249:100:2 +portmap_153=251:100:2 +portmap_154=253:100:2 +portmap_155=255:100:2 + +portmap_100=161:100:2 +portmap_101=163:100:2 +portmap_102=165:100:2 +portmap_103=167:100:2 + +portmap_104=169:100:2 +portmap_105=171:100:2 +portmap_106=173:100:2 +portmap_107=175:100:2 + +portmap_108=177:100:2 +portmap_109=179:100:2 +portmap_110=181:100:2 +portmap_111=183:100:2 + +portmap_112=185:100:2 +portmap_113=187:100:2 +portmap_114=189:100:2 +portmap_115=191:100:2 + +portmap_120=193:100:2 +portmap_121=195:100:2 +portmap_122=197:100:2 +portmap_123=199:100:2 + +portmap_124=201:100:2 +portmap_125=203:100:2 +portmap_126=205:100:2 +portmap_127=207:100:2 + +portmap_128=209:100:2 +portmap_129=211:100:2 +portmap_130=213:100:2 +portmap_131=215:100:2 + +portmap_132=217:100:2 +portmap_133=219:100:2 +portmap_134=221:100:2 +portmap_135=223:100:2 + +phy_chain_rx_lane_map_physical{33.0}=0x65732041 +phy_chain_tx_lane_map_physical{33.0}=0x47206531 +phy_chain_rx_lane_map_physical{41.0}=0x07561243 +phy_chain_tx_lane_map_physical{41.0}=0x36207514 +phy_chain_rx_lane_map_physical{49.0}=0x54632071 +phy_chain_tx_lane_map_physical{49.0}=0x06241735 +phy_chain_rx_lane_map_physical{57.0}=0x07561243 +phy_chain_tx_lane_map_physical{57.0}=0x35207614 +phy_chain_rx_lane_map_physical{65.0}=0x45623170 +phy_chain_tx_lane_map_physical{65.0}=0x51260734 +phy_chain_rx_lane_map_physical{73.0}=0x07561243 +phy_chain_tx_lane_map_physical{73.0}=0x37245610 +phy_chain_rx_lane_map_physical{81.0}=0x45632071 +phy_chain_tx_lane_map_physical{81.0}=0x51260734 +phy_chain_rx_lane_map_physical{89.0}=0x07561243 +phy_chain_tx_lane_map_physical{89.0}=0x26437510 +phy_chain_rx_lane_map_physical{1.0}=0x30176524 +phy_chain_tx_lane_map_physical{1.0}=0x20615374 +phy_chain_rx_lane_map_physical{9.0}=0x37562041 +phy_chain_tx_lane_map_physical{9.0}=0x05176432 +phy_chain_rx_lane_map_physical{17.0}=0x43607251 +phy_chain_tx_lane_map_physical{17.0}=0x70261435 +phy_chain_rx_lane_map_physical{25.0}=0x60347125 +phy_chain_tx_lane_map_physical{25.0}=0x46357120 +phy_chain_rx_lane_map_physical{97.0}=0x47601352 +phy_chain_tx_lane_map_physical{97.0}=0x04265137 +phy_chain_rx_lane_map_physical{105.0}=0x73206415 +phy_chain_tx_lane_map_physical{105.0}=0x26374150 +phy_chain_rx_lane_map_physical{113.0}=0x47632051 +phy_chain_tx_lane_map_physical{113.0}=0x03254617 +phy_chain_rx_lane_map_physical{121.0}=0x63027415 +phy_chain_tx_lane_map_physical{121.0}=0x63721045 +phy_chain_rx_lane_map_physical{129.0}=0x30154627 +phy_chain_tx_lane_map_physical{129.0}=0x04735261 +phy_chain_rx_lane_map_physical{137.0}=0x24753061 +phy_chain_tx_lane_map_physical{137.0}=0x37614520 +phy_chain_rx_lane_map_physical{145.0}=0x47601352 +phy_chain_tx_lane_map_physical{145.0}=0x63274510 +phy_chain_rx_lane_map_physical{153.0}=0x07361524 +phy_chain_tx_lane_map_physical{153.0}=0x36527104 +phy_chain_rx_lane_map_physical{225.0}=0x56410273 +phy_chain_tx_lane_map_physical{225.0}=0x10274635 +phy_chain_rx_lane_map_physical{233.0}=0x15740263 +phy_chain_tx_lane_map_physical{233.0}=0x24351607 +phy_chain_rx_lane_map_physical{241.0}=0x74015263 +phy_chain_tx_lane_map_physical{241.0}=0x04152637 +phy_chain_rx_lane_map_physical{249.0}=0x62037514 +phy_chain_tx_lane_map_physical{249.0}=0x72453160 +phy_chain_rx_lane_map_physical{161.0}=0x46510273 +phy_chain_tx_lane_map_physical{161.0}=0x01653724 +phy_chain_rx_lane_map_physical{169.0}=0x25743160 +phy_chain_tx_lane_map_physical{169.0}=0x07216435 +phy_chain_rx_lane_map_physical{177.0}=0x46510273 +phy_chain_tx_lane_map_physical{177.0}=0x01652734 +phy_chain_rx_lane_map_physical{185.0}=0x25743160 +phy_chain_tx_lane_map_physical{185.0}=0x37016425 +phy_chain_rx_lane_map_physical{193.0}=0x46510372 +phy_chain_tx_lane_map_physical{193.0}=0x06153724 +phy_chain_rx_lane_map_physical{201.0}=0x25743160 +phy_chain_tx_lane_map_physical{201.0}=0x36017524 +phy_chain_rx_lane_map_physical{209.0}=0x47601352 +phy_chain_tx_lane_map_physical{209.0}=0x04152736 +phy_chain_rx_lane_map_physical{217.0}=0x26453170 +phy_chain_tx_lane_map_physical{217.0}=0x36027415 + +serdes_core_rx_polarity_flip_physical{33}=0x29 +serdes_core_tx_polarity_flip_physical{33}=0xfe +serdes_core_rx_polarity_flip_physical{41}=0xb1 +serdes_core_tx_polarity_flip_physical{41}=0xe8 +serdes_core_rx_polarity_flip_physical{49}=0xca +serdes_core_tx_polarity_flip_physical{49}=0xb6 +serdes_core_rx_polarity_flip_physical{57}=0x9b +serdes_core_tx_polarity_flip_physical{57}=0xdc +serdes_core_rx_polarity_flip_physical{65}=0x17 +serdes_core_tx_polarity_flip_physical{65}=0x86 +serdes_core_rx_polarity_flip_physical{73}=0x9b +serdes_core_tx_polarity_flip_physical{73}=0x55 +serdes_core_rx_polarity_flip_physical{81}=0xa +serdes_core_tx_polarity_flip_physical{81}=0x6 +serdes_core_rx_polarity_flip_physical{89}=0x9b +serdes_core_tx_polarity_flip_physical{89}=0x48 +serdes_core_rx_polarity_flip_physical{1}=0xec +serdes_core_tx_polarity_flip_physical{1}=0x56 +serdes_core_rx_polarity_flip_physical{9}=0x13 +serdes_core_tx_polarity_flip_physical{9}=0xa6 +serdes_core_rx_polarity_flip_physical{17}=0x5a +serdes_core_tx_polarity_flip_physical{17}=0xc6 +serdes_core_rx_polarity_flip_physical{25}=0xf +serdes_core_tx_polarity_flip_physical{25}=0x4e +serdes_core_rx_polarity_flip_physical{97}=0x17 +serdes_core_tx_polarity_flip_physical{97}=0x2e +serdes_core_rx_polarity_flip_physical{105}=0xce +serdes_core_tx_polarity_flip_physical{105}=0x7c +serdes_core_rx_polarity_flip_physical{113}=0xa +serdes_core_tx_polarity_flip_physical{113}=0x35 + +serdes_core_rx_polarity_flip_physical{121}=0xb9 +serdes_core_tx_polarity_flip_physical{121}=0xef +serdes_core_rx_polarity_flip_physical{129}=0xe8 +serdes_core_tx_polarity_flip_physical{129}=0xac +serdes_core_rx_polarity_flip_physical{137}=0xcb +serdes_core_tx_polarity_flip_physical{137}=0x9c +serdes_core_rx_polarity_flip_physical{145}=0x17 +serdes_core_tx_polarity_flip_physical{145}=0x32 +serdes_core_rx_polarity_flip_physical{153}=0xb9 +serdes_core_tx_polarity_flip_physical{153}=0xaf +serdes_core_rx_polarity_flip_physical{225}=0xaa +serdes_core_tx_polarity_flip_physical{225}=0x7 +serdes_core_rx_polarity_flip_physical{233}=0x31 +serdes_core_tx_polarity_flip_physical{233}=0x47 +serdes_core_rx_polarity_flip_physical{241}=0xe8 +serdes_core_tx_polarity_flip_physical{241}=0x9e +serdes_core_rx_polarity_flip_physical{249}=0xec +serdes_core_tx_polarity_flip_physical{249}=0x1f +serdes_core_rx_polarity_flip_physical{161}=0x6a +serdes_core_tx_polarity_flip_physical{161}=0xd4 +serdes_core_rx_polarity_flip_physical{169}=0x9e +serdes_core_tx_polarity_flip_physical{169}=0x7b +serdes_core_rx_polarity_flip_physical{177}=0x6a +serdes_core_tx_polarity_flip_physical{177}=0xcc +serdes_core_rx_polarity_flip_physical{185}=0x9e +serdes_core_tx_polarity_flip_physical{185}=0x58 +serdes_core_rx_polarity_flip_physical{193}=0x6f +serdes_core_tx_polarity_flip_physical{193}=0x24 +serdes_core_rx_polarity_flip_physical{201}=0x9e +serdes_core_tx_polarity_flip_physical{201}=0xdf +serdes_core_rx_polarity_flip_physical{209}=0x17 +serdes_core_tx_polarity_flip_physical{209}=0xe9 +serdes_core_rx_polarity_flip_physical{217}=0xec +serdes_core_tx_polarity_flip_physical{217}=0x68 + + +dport_map_port_20=1 +dport_map_port_21=2 +dport_map_port_22=3 +dport_map_port_23=4 +dport_map_port_24=5 +dport_map_port_25=6 +dport_map_port_26=7 +dport_map_port_27=8 +dport_map_port_28=9 +dport_map_port_29=10 +dport_map_port_30=11 +dport_map_port_31=12 +dport_map_port_32=13 +dport_map_port_33=14 +dport_map_port_34=15 +dport_map_port_35=16 +dport_map_port_40=17 +dport_map_port_41=18 +dport_map_port_42=19 +dport_map_port_43=20 +dport_map_port_44=21 +dport_map_port_45=22 +dport_map_port_46=23 +dport_map_port_47=24 +dport_map_port_48=25 +dport_map_port_49=26 +dport_map_port_50=27 +dport_map_port_51=28 +dport_map_port_52=29 +dport_map_port_53=30 +dport_map_port_54=31 +dport_map_port_55=32 +dport_map_port_1=33 +dport_map_port_2=34 +dport_map_port_3=35 +dport_map_port_4=36 +dport_map_port_5=37 +dport_map_port_6=38 +dport_map_port_7=39 +dport_map_port_8=40 +dport_map_port_9=41 +dport_map_port_10=42 +dport_map_port_11=43 +dport_map_port_12=44 +dport_map_port_13=45 +dport_map_port_14=46 +dport_map_port_15=47 +dport_map_port_16=48 +dport_map_port_60=49 +dport_map_port_61=50 +dport_map_port_62=51 +dport_map_port_63=52 +dport_map_port_64=53 +dport_map_port_65=54 +dport_map_port_66=55 +dport_map_port_67=56 +dport_map_port_68=57 +dport_map_port_69=58 +dport_map_port_70=59 +dport_map_port_71=60 +dport_map_port_72=61 +dport_map_port_73=62 +dport_map_port_74=63 +dport_map_port_75=64 +dport_map_port_80=65 +dport_map_port_81=66 +dport_map_port_82=67 +dport_map_port_83=68 +dport_map_port_84=69 +dport_map_port_85=70 +dport_map_port_86=71 +dport_map_port_87=72 +dport_map_port_88=73 +dport_map_port_89=74 +dport_map_port_90=75 +dport_map_port_91=76 +dport_map_port_92=77 +dport_map_port_93=78 +dport_map_port_94=79 +dport_map_port_95=80 +dport_map_port_140=81 +dport_map_port_141=82 +dport_map_port_142=83 +dport_map_port_143=84 +dport_map_port_144=85 +dport_map_port_145=86 +dport_map_port_146=87 +dport_map_port_147=88 +dport_map_port_148=89 +dport_map_port_149=90 +dport_map_port_150=91 +dport_map_port_151=92 +dport_map_port_152=93 +dport_map_port_153=94 +dport_map_port_154=95 +dport_map_port_155=96 +dport_map_port_100=97 +dport_map_port_101=98 +dport_map_port_102=99 +dport_map_port_103=100 +dport_map_port_104=101 +dport_map_port_105=102 +dport_map_port_106=103 +dport_map_port_107=104 +dport_map_port_108=105 +dport_map_port_109=106 +dport_map_port_110=107 +dport_map_port_111=108 +dport_map_port_112=109 +dport_map_port_113=110 +dport_map_port_114=111 +dport_map_port_115=112 +dport_map_port_120=113 +dport_map_port_121=114 +dport_map_port_122=115 +dport_map_port_123=116 +dport_map_port_124=117 +dport_map_port_125=118 +dport_map_port_126=119 +dport_map_port_127=120 +dport_map_port_128=121 +dport_map_port_129=122 +dport_map_port_130=123 +dport_map_port_131=124 +dport_map_port_132=125 +dport_map_port_133=126 +dport_map_port_134=127 +dport_map_port_135=128 + +core_clock_frequency=1325 +dpr_clock_frequency=1000 +device_clock_frequency=1325 +port_flex_enable=1 + +#firmware load method, use fast load +load_firmware=0x2 diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini new file mode 100644 index 00000000000..9cd85ee3479 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 33,34,35,36,37,38,39,40 QSFPDD1 1 400000 +Ethernet4 41,42,43,44,45,46,47,48 QSFPDD2 2 400000 +Ethernet8 49,50,51,52,53,54,55,56 QSFPDD3 3 400000 +Ethernet12 57,58,59,60,61,62,63,64 QSFPDD4 4 400000 +Ethernet16 65,66,67,68,69,70,71,72 QSFPDD5 5 400000 +Ethernet20 73,74,75,76,77,78,79,80 QSFPDD6 6 400000 +Ethernet24 81,82,83,84,85,86,87,88 QSFPDD7 7 400000 +Ethernet28 89,90,91,92,93,94,95,96 QSFPDD8 8 400000 +Ethernet32 1,2,3,4,5,6,7,8 QSFPDD9 9 400000 +Ethernet36 9,10,11,12,13,14,15,16 QSFPDD10 10 400000 +Ethernet40 17,18,19,20,21,22,23,24 QSFPDD11 11 400000 +Ethernet44 25,26,27,28,29,30,31,32 QSFPDD12 12 400000 +Ethernet48 97,98,99,100,101,102,103,104 QSFPDD13 13 400000 +Ethernet52 105,106,107,108,109,110,111,112 QSFPDD14 14 400000 +Ethernet56 113,114,115,116,117,118,119,120 QSFPDD15 15 400000 +Ethernet60 121,122,123,124,125,126,127,128 QSFPDD16 16 400000 +Ethernet64 129,130,131,132,133,134,135,136 QSFPDD17 17 400000 +Ethernet68 137,138,139,140,141,142,143,144 QSFPDD18 18 400000 +Ethernet72 145,146,147,148,149,150,151,152 QSFPDD19 19 400000 +Ethernet76 153,154,155,156,157,158,159,160 QSFPDD20 20 400000 +Ethernet80 225,226,227,228,229,230,231,232 QSFPDD21 21 400000 +Ethernet84 233,234,235,236,237,238,239,240 QSFPDD22 22 400000 +Ethernet88 241,242,243,244,245,246,247,248 QSFPDD23 23 400000 +Ethernet92 249,250,251,252,253,254,255,256 QSFPDD24 24 400000 +Ethernet96 161,162,163,164,165,166,167,168 QSFPDD25 25 400000 +Ethernet100 169,170,171,172,173,174,175,176 QSFPDD26 26 400000 +Ethernet104 177,178,179,180,181,182,183,184 QSFPDD27 27 400000 +Ethernet108 185,186,187,188,189,190,191,192 QSFPDD28 28 400000 +Ethernet112 193,194,195,196,197,198,199,200 QSFPDD29 29 400000 +Ethernet116 201,202,203,204,205,206,207,208 QSFPDD30 30 400000 +Ethernet120 209,210,211,212,213,214,215,216 QSFPDD31 31 400000 +Ethernet124 217,218,219,220,221,222,223,224 QSFPDD32 32 400000 \ No newline at end of file diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/sai.profile b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/sai.profile new file mode 100644 index 00000000000..1915eb9b35a --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-32x400G.config.bcm diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm new file mode 100644 index 00000000000..5e5fc82aeac --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm @@ -0,0 +1,231 @@ + +pbmp_xport_xe.0=0x8111181111c1111811118111181111c111182222 +ccm_dma_enable=0 +ccmdma_intr_enable=0 +ctr_evict_enable=0 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +phy_enable=0 +phy_null=1 +pll_bypass=1 + +init_all_modules=0 + + + +#portmap_38=257:10 +#portmap_118=258:10 + + +portmap_20=33:400 +portmap_24=41:400 +portmap_28=49:400 +portmap_32=57:400 +portmap_40=65:400 +portmap_44=73:400 +portmap_48=81:400 +portmap_52=89:400 +portmap_1=1:400 +portmap_5=9:400 +portmap_9=17:400 +portmap_13=25:400 +portmap_60=97:400 +portmap_64=105:400 +portmap_68=113:400 +portmap_72=121:400 +portmap_80=129:400 +portmap_84=137:400 +portmap_88=145:400 +portmap_92=153:400 +portmap_140=225:400 +portmap_144=233:400 +portmap_148=241:400 +portmap_152=249:400 +portmap_100=161:400 +portmap_104=169:400 +portmap_108=177:400 +portmap_112=185:400 +portmap_120=193:400 +portmap_124=201:400 +portmap_128=209:400 +portmap_132=217:400 + +phy_chain_rx_lane_map_physical{33.0}=0x65732041 +phy_chain_tx_lane_map_physical{33.0}=0x47206531 +phy_chain_rx_lane_map_physical{41.0}=0x07561243 +phy_chain_tx_lane_map_physical{41.0}=0x36207514 +phy_chain_rx_lane_map_physical{49.0}=0x54632071 +phy_chain_tx_lane_map_physical{49.0}=0x06241735 +phy_chain_rx_lane_map_physical{57.0}=0x07561243 +phy_chain_tx_lane_map_physical{57.0}=0x35207614 +phy_chain_rx_lane_map_physical{65.0}=0x45623170 +phy_chain_tx_lane_map_physical{65.0}=0x51260734 +phy_chain_rx_lane_map_physical{73.0}=0x07561243 +phy_chain_tx_lane_map_physical{73.0}=0x37245610 +phy_chain_rx_lane_map_physical{81.0}=0x45632071 +phy_chain_tx_lane_map_physical{81.0}=0x51260734 +phy_chain_rx_lane_map_physical{89.0}=0x07561243 +phy_chain_tx_lane_map_physical{89.0}=0x26437510 +phy_chain_rx_lane_map_physical{1.0}=0x30176524 +phy_chain_tx_lane_map_physical{1.0}=0x20615374 +phy_chain_rx_lane_map_physical{9.0}=0x37562041 +phy_chain_tx_lane_map_physical{9.0}=0x05176432 +phy_chain_rx_lane_map_physical{17.0}=0x43607251 +phy_chain_tx_lane_map_physical{17.0}=0x70261435 +phy_chain_rx_lane_map_physical{25.0}=0x60347125 +phy_chain_tx_lane_map_physical{25.0}=0x46357120 +phy_chain_rx_lane_map_physical{97.0}=0x47601352 +phy_chain_tx_lane_map_physical{97.0}=0x04265137 +phy_chain_rx_lane_map_physical{105.0}=0x73206415 +phy_chain_tx_lane_map_physical{105.0}=0x26374150 +phy_chain_rx_lane_map_physical{113.0}=0x47632051 +phy_chain_tx_lane_map_physical{113.0}=0x03254617 +phy_chain_rx_lane_map_physical{121.0}=0x63027415 +phy_chain_tx_lane_map_physical{121.0}=0x63721045 +phy_chain_rx_lane_map_physical{129.0}=0x30154627 +phy_chain_tx_lane_map_physical{129.0}=0x04735261 +phy_chain_rx_lane_map_physical{137.0}=0x24753061 +phy_chain_tx_lane_map_physical{137.0}=0x37614520 +phy_chain_rx_lane_map_physical{145.0}=0x47601352 +phy_chain_tx_lane_map_physical{145.0}=0x63274510 +phy_chain_rx_lane_map_physical{153.0}=0x07361524 +phy_chain_tx_lane_map_physical{153.0}=0x36527104 +phy_chain_rx_lane_map_physical{225.0}=0x56410273 +phy_chain_tx_lane_map_physical{225.0}=0x10274635 +phy_chain_rx_lane_map_physical{233.0}=0x15740263 +phy_chain_tx_lane_map_physical{233.0}=0x24351607 +phy_chain_rx_lane_map_physical{241.0}=0x74015263 +phy_chain_tx_lane_map_physical{241.0}=0x04152637 +phy_chain_rx_lane_map_physical{249.0}=0x62037514 +phy_chain_tx_lane_map_physical{249.0}=0x72453160 +phy_chain_rx_lane_map_physical{161.0}=0x46510273 +phy_chain_tx_lane_map_physical{161.0}=0x01653724 +phy_chain_rx_lane_map_physical{169.0}=0x25743160 +phy_chain_tx_lane_map_physical{169.0}=0x07216435 +phy_chain_rx_lane_map_physical{177.0}=0x46510273 +phy_chain_tx_lane_map_physical{177.0}=0x01652734 +phy_chain_rx_lane_map_physical{185.0}=0x25743160 +phy_chain_tx_lane_map_physical{185.0}=0x37016425 +phy_chain_rx_lane_map_physical{193.0}=0x46510372 +phy_chain_tx_lane_map_physical{193.0}=0x06153724 +phy_chain_rx_lane_map_physical{201.0}=0x25743160 +phy_chain_tx_lane_map_physical{201.0}=0x36017524 +phy_chain_rx_lane_map_physical{209.0}=0x47601352 +phy_chain_tx_lane_map_physical{209.0}=0x04152736 +phy_chain_rx_lane_map_physical{217.0}=0x26453170 +phy_chain_tx_lane_map_physical{217.0}=0x36027415 + +serdes_core_rx_polarity_flip_physical{33}=0x29 +serdes_core_tx_polarity_flip_physical{33}=0xfe +serdes_core_rx_polarity_flip_physical{41}=0xb1 +serdes_core_tx_polarity_flip_physical{41}=0xe8 +serdes_core_rx_polarity_flip_physical{49}=0xca +serdes_core_tx_polarity_flip_physical{49}=0xb6 +serdes_core_rx_polarity_flip_physical{57}=0x9b +serdes_core_tx_polarity_flip_physical{57}=0xdc +serdes_core_rx_polarity_flip_physical{65}=0x17 +serdes_core_tx_polarity_flip_physical{65}=0x86 +serdes_core_rx_polarity_flip_physical{73}=0x9b +serdes_core_tx_polarity_flip_physical{73}=0x55 +serdes_core_rx_polarity_flip_physical{81}=0xa +serdes_core_tx_polarity_flip_physical{81}=0x6 +serdes_core_rx_polarity_flip_physical{89}=0x9b +serdes_core_tx_polarity_flip_physical{89}=0x48 +serdes_core_rx_polarity_flip_physical{1}=0xec +serdes_core_tx_polarity_flip_physical{1}=0x56 +serdes_core_rx_polarity_flip_physical{9}=0x13 +serdes_core_tx_polarity_flip_physical{9}=0xa6 +serdes_core_rx_polarity_flip_physical{17}=0x5a +serdes_core_tx_polarity_flip_physical{17}=0xc6 +serdes_core_rx_polarity_flip_physical{25}=0xf +serdes_core_tx_polarity_flip_physical{25}=0x4e +serdes_core_rx_polarity_flip_physical{97}=0x17 +serdes_core_tx_polarity_flip_physical{97}=0x2e +serdes_core_rx_polarity_flip_physical{105}=0xce +serdes_core_tx_polarity_flip_physical{105}=0x7c +serdes_core_rx_polarity_flip_physical{113}=0xa +serdes_core_tx_polarity_flip_physical{113}=0x35 + +serdes_core_rx_polarity_flip_physical{121}=0xb9 +serdes_core_tx_polarity_flip_physical{121}=0xef +serdes_core_rx_polarity_flip_physical{129}=0xe8 +serdes_core_tx_polarity_flip_physical{129}=0xac +serdes_core_rx_polarity_flip_physical{137}=0xcb +serdes_core_tx_polarity_flip_physical{137}=0x9c +serdes_core_rx_polarity_flip_physical{145}=0x17 +serdes_core_tx_polarity_flip_physical{145}=0x32 +serdes_core_rx_polarity_flip_physical{153}=0xb9 +serdes_core_tx_polarity_flip_physical{153}=0xaf +serdes_core_rx_polarity_flip_physical{225}=0xaa +serdes_core_tx_polarity_flip_physical{225}=0x7 +serdes_core_rx_polarity_flip_physical{233}=0x31 +serdes_core_tx_polarity_flip_physical{233}=0x47 +serdes_core_rx_polarity_flip_physical{241}=0xe8 +serdes_core_tx_polarity_flip_physical{241}=0x9e +serdes_core_rx_polarity_flip_physical{249}=0xec +serdes_core_tx_polarity_flip_physical{249}=0x1f +serdes_core_rx_polarity_flip_physical{161}=0x6a +serdes_core_tx_polarity_flip_physical{161}=0xd4 +serdes_core_rx_polarity_flip_physical{169}=0x9e +serdes_core_tx_polarity_flip_physical{169}=0x7b +serdes_core_rx_polarity_flip_physical{177}=0x6a +serdes_core_tx_polarity_flip_physical{177}=0xcc +serdes_core_rx_polarity_flip_physical{185}=0x9e +serdes_core_tx_polarity_flip_physical{185}=0x58 +serdes_core_rx_polarity_flip_physical{193}=0x6f +serdes_core_tx_polarity_flip_physical{193}=0x24 +serdes_core_rx_polarity_flip_physical{201}=0x9e +serdes_core_tx_polarity_flip_physical{201}=0xdf +serdes_core_rx_polarity_flip_physical{209}=0x17 +serdes_core_tx_polarity_flip_physical{209}=0xe9 +serdes_core_rx_polarity_flip_physical{217}=0xec +serdes_core_tx_polarity_flip_physical{217}=0x68 + +dport_map_port_20=1 +dport_map_port_24=2 +dport_map_port_28=3 +dport_map_port_32=4 +dport_map_port_40=5 +dport_map_port_44=6 +dport_map_port_48=7 +dport_map_port_52=8 +dport_map_port_1=9 +dport_map_port_5=10 +dport_map_port_9=11 +dport_map_port_13=12 +dport_map_port_60=13 +dport_map_port_64=14 +dport_map_port_68=15 +dport_map_port_72=16 +dport_map_port_80=17 +dport_map_port_84=18 +dport_map_port_88=19 +dport_map_port_92=20 +dport_map_port_140=21 +dport_map_port_144=22 +dport_map_port_148=23 +dport_map_port_152=24 +dport_map_port_100=25 +dport_map_port_104=26 +dport_map_port_108=27 +dport_map_port_112=28 +dport_map_port_120=29 +dport_map_port_124=30 +dport_map_port_128=31 +dport_map_port_132=32 + +#dport_map_port_38=33 +#dport_map_port_118=34 + + + +core_clock_frequency=1325 +dpr_clock_frequency=1000 +device_clock_frequency=1325 +port_flex_enable=1 + +#firmware load method, use fast load +load_firmware=0x2 + + diff --git a/device/celestica/x86_64-cel_silverstone-r0/custom.bin b/device/celestica/x86_64-cel_silverstone-r0/custom.bin new file mode 100644 index 00000000000..a08ba6c0666 Binary files /dev/null and b/device/celestica/x86_64-cel_silverstone-r0/custom.bin differ diff --git a/device/celestica/x86_64-cel_silverstone-r0/default_sku b/device/celestica/x86_64-cel_silverstone-r0/default_sku new file mode 100644 index 00000000000..07d986a8431 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/default_sku @@ -0,0 +1 @@ +Silverstone t1 diff --git a/device/celestica/x86_64-cel_silverstone-r0/installer.conf b/device/celestica/x86_64-cel_silverstone-r0/installer.conf new file mode 100644 index 00000000000..5e62742c11b --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/installer.conf @@ -0,0 +1 @@ +CONSOLE_SPEED=115200 diff --git a/device/celestica/x86_64-cel_silverstone-r0/led_proc_init.soc b/device/celestica/x86_64-cel_silverstone-r0/led_proc_init.soc new file mode 100644 index 00000000000..827458afefb --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/led_proc_init.soc @@ -0,0 +1,2 @@ +#The Port LED of Silverstone SONIC can't work well, after the issue is fixed by SAI, The led will start. +#led auto on; led start diff --git a/device/celestica/x86_64-cel_silverstone-r0/linkscan_fw.bin b/device/celestica/x86_64-cel_silverstone-r0/linkscan_fw.bin new file mode 100644 index 00000000000..e86cdc1ef64 Binary files /dev/null and b/device/celestica/x86_64-cel_silverstone-r0/linkscan_fw.bin differ diff --git a/device/celestica/x86_64-cel_silverstone-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_silverstone-r0/plugins/eeprom.py new file mode 100644 index 00000000000..34c50a6ce31 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/plugins/eeprom.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica Silverstone +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) + diff --git a/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py b/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py new file mode 100644 index 00000000000..d5e197e82d2 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py @@ -0,0 +1,91 @@ +#!/usr/bin/env python + +import os.path +import subprocess +import sys +import re + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + self.ipmi_raw = "docker exec -ti pmon ipmitool raw 0x4 0x2d" + self.psu1_id = "0x2f" + self.psu2_id = "0x39" + PsuBase.__init__(self) + + def run_command(self, command): + proc = subprocess.Popen(command, shell=True, stdout=subprocess.PIPE) + (out, err) = proc.communicate() + + if proc.returncode != 0: + sys.exit(proc.returncode) + + return out + + def find_value(self, in_string): + result = re.search("^.+ ([0-9a-f]{2}) .+$", in_string) + if result: + return result.group(1) + else: + return result + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + psu_id = self.psu1_id if index == 1 else self.psu2_id + res_string = self.run_command(self.ipmi_raw + ' ' + psu_id) + status_byte = self.find_value(res_string) + + if status_byte is None: + return False + + failure_detected = (int(status_byte, 16) >> 1) & 1 + input_lost = (int(status_byte, 16) >> 3) & 1 + if failure_detected or input_lost: + return False + else: + return True + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + psu_id = self.psu1_id if index == 1 else self.psu2_id + res_string = self.run_command(self.ipmi_raw + ' ' + psu_id) + status_byte = self.find_value(res_string) + + if status_byte is None: + return False + + presence = ( int(status_byte, 16) >> 0 ) & 1 + if presence: + return True + else: + return False \ No newline at end of file diff --git a/device/celestica/x86_64-cel_silverstone-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_silverstone-r0/plugins/sfputil.py new file mode 100755 index 00000000000..33b761b9397 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/plugins/sfputil.py @@ -0,0 +1,186 @@ +#!/usr/bin/env python +# +# Platform-specific SFP transceiver interface for SONiC +# This plugin supports QSFP-DD, QSFP and SFP. + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 34 + OSFP_PORT_START = 1 + OSFP_PORT_END = 32 + SFP_PORT_START = 33 + SFP_PORT_END = 34 + + EEPROM_OFFSET = 9 + PORT_INFO_PATH = '/sys/class/silverstone_fpga' + + _port_name = "" + _port_to_eeprom_mapping = {} + _port_to_i2cbus_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return [] + + @property + def osfp_ports(self): + return range(self.OSFP_PORT_START, self.OSFP_PORT_END + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def port_to_i2cbus_mapping(self): + return self._port_to_i2cbus_mapping + + def get_port_name(self, port_num): + if port_num in self.osfp_ports: + self._port_name = "QSFP" + str(port_num - self.OSFP_PORT_START + 1) + else: + self._port_name = "SFP" + str(port_num - self.SFP_PORT_START + 1) + return self._port_name + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.osfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256) + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + + for x in range(self.PORT_START, self.PORT_END+1): + self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET) + self.port_to_eeprom_mapping[x] = eeprom_path.format( + x + self.EEPROM_OFFSET) + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num not in range(self.port_start, self.port_end + 1): + return False + + # Get path for access port presence status + port_name = self.get_port_name(port_num) + sysfs_filename = "qsfp_modprs" if port_num in self.osfp_ports else "sfp_modabs" + reg_path = "/".join([self.PORT_INFO_PATH, port_name, sysfs_filename]) + + # Read status + try: + reg_file = open(reg_path) + content = reg_file.readline().rstrip() + reg_value = int(content) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # Module present is active low + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid QSFP port_num + if port_num not in self.osfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open("/".join([self.PORT_INFO_PATH, + port_name, "qsfp_lpmode"])) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # Read status + content = reg_file.readline().rstrip() + reg_value = int(content) + # low power mode is active high + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid QSFP port_num + if port_num not in self.osfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open("/".join([self.PORT_INFO_PATH, + port_name, "qsfp_lpmode"]), "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = hex(lpmode) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + # Check for invalid QSFP port_num + if port_num not in self.osfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open("/".join([self.PORT_INFO_PATH, + port_name, "qsfp_reset"]), "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(0)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_file.seek(0) + reg_file.write(hex(1)) + reg_file.close() + + return True + + def get_transceiver_change_event(self, timeout=0): + """ + TBD + """ + raise NotImplementedError diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/__init__.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/__init__.py new file mode 100644 index 00000000000..d82f3749319 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import * diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/chassis.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/chassis.py new file mode 100644 index 00000000000..dc622016cbb --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/chassis.py @@ -0,0 +1,114 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Chassis information which are available in the platform +# +############################################################################# + +import sys +import re +import os +import subprocess +import json + +try: + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.eeprom import Tlv + from sonic_platform.fan import Fan + from helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_FAN_TRAY = 7 +NUM_FAN = 2 +NUM_PSU = 2 +NUM_THERMAL = 5 +NUM_SFP = 32 +NUM_COMPONENT = 5 + +IPMI_OEM_NETFN = "0x3A" +IPMI_GET_REBOOT_CAUSE = "0x03 0x00 0x01 0x06" + + +class Chassis(ChassisBase): + """Platform-specific Chassis class""" + + def __init__(self): + self.config_data = {} + ChassisBase.__init__(self) + self._eeprom = Tlv() + self._api_helper = APIHelper() + + for fant_index in range(0, NUM_FAN_TRAY): + for fan_index in range(0, NUM_FAN): + fan = Fan(fant_index, fan_index) + self._fan_list.append(fan) + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.get_mac() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.get_serial() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.get_eeprom() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + status, raw_cause = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_GET_REBOOT_CAUSE) + hx_cause = raw_cause.split()[0] if status else 00 + reboot_cause = { + "00": self.REBOOT_CAUSE_HARDWARE_OTHER, + "11": self.REBOOT_CAUSE_POWER_LOSS, + "22": self.REBOOT_CAUSE_NON_HARDWARE, + "33": self.REBOOT_CAUSE_HARDWARE_OTHER, + "44": self.REBOOT_CAUSE_NON_HARDWARE, + "55": self.REBOOT_CAUSE_NON_HARDWARE, + "66": self.REBOOT_CAUSE_WATCHDOG, + "77": self.REBOOT_CAUSE_NON_HARDWARE + }.get(hx_cause, self.REBOOT_CAUSE_HARDWARE_OTHER) + + description = { + "00": "Unknown reason", + "11": "The last reset is Power on reset", + "22": "The last reset is soft-set CPU warm reset", + "33": "The last reset is soft-set CPU cold reset", + "44": "The last reset is CPU warm reset", + "55": "The last reset is CPU cold reset", + "66": "The last reset is watchdog reset", + "77": "The last reset is power cycle reset" + }.get(hx_cause, "Unknown reason") + + return (reboot_cause, description) diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/eeprom.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/eeprom.py new file mode 100644 index 00000000000..dd0c9332b54 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/eeprom.py @@ -0,0 +1,113 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica Silverstone +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import glob + import os + import sys + import imp + import re + from array import array + from cStringIO import StringIO + from sonic_platform_base.sonic_eeprom import eeprom_dts + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError(str(e) + "- required module not found") + +CACHE_ROOT = '/var/cache/sonic/decode-syseeprom' +CACHE_FILE = 'syseeprom_cache' +TLV_EEPROM_I2C_BUS = 0 +TLV_EEPROM_I2C_ADDR = 56 + +class Tlv(eeprom_tlvinfo.TlvInfoDecoder): + + EEPROM_DECODE_HEADLINES = 6 + + def __init__(self): + self._eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-00{1}/eeprom".format(TLV_EEPROM_I2C_BUS, TLV_EEPROM_I2C_ADDR) + super(Tlv, self).__init__(self._eeprom_path, 0, '', True) + self._eeprom = self._load_eeprom() + + def __parse_output(self, decode_output): + decode_output.replace('\0', '') + lines = decode_output.split('\n') + lines = lines[self.EEPROM_DECODE_HEADLINES:] + _eeprom_info_dict = dict() + + for line in lines: + try: + match = re.search( + '(0x[0-9a-fA-F]{2})([\s]+[\S]+[\s]+)([\S]+)', line) + if match is not None: + idx = match.group(1) + value = match.group(3).rstrip('\0') + + _eeprom_info_dict[idx] = value + except: + pass + return _eeprom_info_dict + + def _load_eeprom(self): + original_stdout = sys.stdout + sys.stdout = StringIO() + try: + self.read_eeprom_db() + except: + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + return self.__parse_output(decode_output) + + status = self.check_status() + if 'ok' not in status: + return False + + if not os.path.exists(CACHE_ROOT): + try: + os.makedirs(CACHE_ROOT) + except: + pass + + # + # only the eeprom classes that inherit from eeprom_base + # support caching. Others will work normally + # + try: + self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE)) + except: + pass + + e = self.read_eeprom() + if e is None: + return 0 + + try: + self.update_cache(e) + except: + pass + + self.decode_eeprom(e) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + + (is_valid, valid_crc) = self.is_checksum_valid(e) + if not is_valid: + return False + + return self.__parse_output(decode_output) + + def get_eeprom(self): + return self._eeprom + + def get_serial(self): + return self._eeprom.get('0x23', "Undefined.") + + def get_mac(self): + return self._eeprom.get('0x24', "Undefined.") diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/fan.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/fan.py new file mode 100644 index 00000000000..902de261f8c --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/fan.py @@ -0,0 +1,276 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the fan status which are available in the platform +# +############################################################################# + +import json +import math +import os.path + +try: + from sonic_platform_base.fan_base import FanBase + from helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +FAN_NAME_LIST = ["FAN-1F", "FAN-1R", "FAN-2F", "FAN-2R", "FAN-3F", "FAN-3R", + "FAN-4F", "FAN-4R", "FAN-5F", "FAN-5R", "FAN-6F", "FAN-6R", "FAN-7F", "FAN-7R"] + +IPMI_OEM_NETFN = "0x3A" +IPMI_SENSOR_NETFN = "0x04" +IPMI_FAN_SPEED_CMD = "0x2D {}" +IPMI_AIR_FLOW_CMD = "0x0A {}" +IPMI_FAN_PRESENT_CMD = "0x06 0x03 {}" +IPMI_SET_FAN_LED_CMD = "0x07 {} {}" +IPMI_GET_FAN_LED_CMD = "0x08 {}" +IPMI_SET_PWM = "0x03 0x01 0x02 {} {}" +IPMI_FRU_PRINT_ID = "ipmitool fru print {}" +IPMI_FRU_MODEL_KEY = "Board Part Number" +IPMI_FRU_SERIAL_KEY = "Board Serial" + +MAX_OUTLET = 24700 +MAX_INLET = 29700 +SPEED_TOLERANCE = 10 + +FAN1_FRONT_SS_ID = "0x0D" +FAN1_REAR_SS_ID = "0x45" +FAN_LED_OFF_CMD = "0x00" +FAN_LED_GREEN_CMD = "0x01" +FAN_LED_RED_CMD = "0x02" +FAN1_LED_CMD = "0x04" +FAN_PWM_REGISTER_START = 0x22 +FAN_PWM_REGISTER_STEP = 0x10 +FAN1_FRU_ID = 6 + + +class Fan(FanBase): + """Platform-specific Fan class""" + + def __init__(self, fan_tray_index, fan_index=0, is_psu_fan=False, psu_index=0): + self.fan_index = fan_index + self.fan_tray_index = fan_tray_index + self.is_psu_fan = is_psu_fan + if self.is_psu_fan: + self.psu_index = psu_index + self._api_helper = APIHelper() + self.index = self.fan_tray_index * 2 + self.fan_index + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = self.FAN_DIRECTION_EXHAUST + status, raw_flow = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_AIR_FLOW_CMD.format(hex(self.fan_tray_index))) + if status and raw_flow == "01": + direction = self.FAN_DIRECTION_INTAKE + + return direction + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + + Note: + M = 150 + Max F2B = 24700 RPM + Max B2F = 29700 RPM + """ + # ipmitool raw 0x3a 0x03 0x01 0x01 {register} + # register = 22 32 42 52 62 72 82 + + max_rpm = MAX_OUTLET if self.fan_index % 2 == 0 else MAX_INLET + fan1_ss_start = FAN1_FRONT_SS_ID if self.fan_index % 2 == 0 else FAN1_REAR_SS_ID + + ss_id = hex(int(fan1_ss_start, 16) + self.fan_tray_index) + status, raw_ss_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_FAN_SPEED_CMD.format(ss_id)) + + ss_read = raw_ss_read.split()[0] + rpm_speed = int(ss_read, 16)*150 + speed = int(float(rpm_speed)/max_rpm * 100) + + return speed + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + + Note: + speed_pc = pwm_target/255*100 + + 0 : when PWM mode is use + pwm : when pwm mode is not use + """ + target = 0 + return target + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + return SPEED_TOLERANCE + + def set_speed(self, speed): + """ + Sets the fan speed + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + Returns: + A boolean, True if speed is set successfully, False if not + Notes: + pwm setting mode must set as Manual + manual: ipmitool raw 0x3a 0x06 0x01 0x0 + auto: ipmitool raw 0x3a 0x06 0x01 0x1 + """ + # ipmitool raw 0x3a 0x03 0x01 0x02 {register} {pwm_speed} + # register = 22 32 42 52 62 72 82 + + speed_hex = hex(int(float(speed)/100 * 255)) + fan_register_hex = hex(FAN_PWM_REGISTER_START + + (self.fan_tray_index*FAN_PWM_REGISTER_STEP)) + + set_speed_cmd = IPMI_SET_PWM.format(fan_register_hex, speed_hex) + status, set_speed_res = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, set_speed_cmd) + + set_speed = False if not status else True + + return set_speed + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if status LED state is set successfully, False if not + + Note: + LED setting mode must set as Manual + manual: ipmitool raw 0x3A 0x09 0x02 0x00 + auto: ipmitool raw 0x3A 0x09 0x02 0x01 + """ + led_cmd = { + self.STATUS_LED_COLOR_GREEN: FAN_LED_GREEN_CMD, + self.STATUS_LED_COLOR_RED: FAN_LED_RED_CMD, + self.STATUS_LED_COLOR_OFF: FAN_LED_OFF_CMD + }.get(color) + + fan_selector = hex(int(FAN1_LED_CMD, 16) + self.fan_tray_index) + status, set_led = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_SET_FAN_LED_CMD.format(fan_selector, led_cmd)) + set_status_led = False if not status else True + + return set_status_led + + def get_status_led(self): + """ + Gets the state of the fan status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + + Note: + STATUS_LED_COLOR_GREEN = "green" + STATUS_LED_COLOR_AMBER = "amber" + STATUS_LED_COLOR_RED = "red" + STATUS_LED_COLOR_OFF = "off" + """ + fan_selector = hex(int(FAN1_LED_CMD, 16) + self.fan_tray_index) + status, hx_color = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_GET_FAN_LED_CMD.format(fan_selector)) + + status_led = { + "00": self.STATUS_LED_COLOR_OFF, + "01": self.STATUS_LED_COLOR_GREEN, + "02": self.STATUS_LED_COLOR_RED, + }.get(hx_color, self.STATUS_LED_COLOR_OFF) + + return status_led + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + fan_name = FAN_NAME_LIST[self.fan_tray_index*2 + self.fan_index] if not self.is_psu_fan else "PSU-{} FAN-{}".format( + self.psu_index+1, self.fan_index+1) + + return fan_name + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if FAN is present, False if not + """ + presence = False + status, raw_present = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_FAN_PRESENT_CMD.format(hex(self.index))) + if status and raw_present == "00": + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + model = "Unknown" + ipmi_fru_idx = self.fan_tray_index + FAN1_FRU_ID + status, raw_model = self._api_helper.ipmi_fru_id( + ipmi_fru_idx, IPMI_FRU_MODEL_KEY) + + fru_pn_list = raw_model.split() + if len(fru_pn_list) > 4: + model = fru_pn_list[4] + + return model + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + serial = "Unknown" + ipmi_fru_idx = self.fan_tray_index + FAN1_FRU_ID + status, raw_model = self._api_helper.ipmi_fru_id( + ipmi_fru_idx, IPMI_FRU_SERIAL_KEY) + + fru_sr_list = raw_model.split() + if len(fru_sr_list) > 3: + serial = fru_sr_list[3] + + return serial + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and self.get_speed() > 0 diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/helper.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/helper.py new file mode 100644 index 00000000000..1132b5b0678 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/helper.py @@ -0,0 +1,56 @@ +#!/usr/bin/env python + +import os +import subprocess + + +HOST_CHK_CMD = "docker > /dev/null 2>&1" +EMPTY_STRING = "" + + +class APIHelper(): + + def __init__(self): + pass + + def is_host(self): + return os.system(HOST_CHK_CMD) == 0 + + def read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def ipmi_raw(self, netfn, cmd): + status = True + result = "" + try: + cmd = "ipmitool raw {} {}".format(str(netfn), str(cmd)) + p = subprocess.Popen( + cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) + raw_data, err = p.communicate() + if err == '': + result = raw_data.strip() + except: + status = False + return status, result + + def ipmi_fru_id(self, id, key=None): + status = True + result = "" + try: + cmd = "ipmitool fru print {}".format(str( + id)) if not key else "ipmitool fru print {0} | grep '{1}' ".format(str(id), str(key)) + + p = subprocess.Popen( + cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) + raw_data, err = p.communicate() + if err == '': + result = raw_data.strip() + except: + status = False + return status, result diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/platform.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/platform.py new file mode 100644 index 00000000000..a632de87e74 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/platform.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PlatformBase): + """Platform-specific Platform class""" + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/buffers.json.j2 b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/buffers.json.j2 new file mode 100644 index 00000000000..08e21e428b6 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/buffers.json.j2 @@ -0,0 +1,70 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '40m' %} +{% set default_ports_num = 54 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(1,default_ports_num+1) %} + {% if PORT.append("Ethernet%d" % (port_idx)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "CABLE_LENGTH": { + "AZURE": { + {% for port in PORT %} + {% set cable = cable_length(port) -%} + "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %} + + {% endfor %} + } + } +} + diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/pg_profile_lookup.ini b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/pg_profile_lookup.ini new file mode 100644 index 00000000000..a65244e69b5 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/pg_profile_lookup.ini @@ -0,0 +1,21 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 1000 5m 34816 18432 16384 0 + 10000 5m 34816 18432 16384 0 + 25000 5m 34816 18432 16384 0 + 40000 5m 34816 18432 16384 0 + 50000 5m 34816 18432 16384 0 + 100000 5m 36864 18432 18432 0 + 1000 40m 36864 18432 18432 0 + 10000 40m 36864 18432 18432 0 + 25000 40m 39936 18432 21504 0 + 40000 40m 41984 18432 23552 0 + 50000 40m 41984 18432 23552 0 + 100000 40m 54272 18432 35840 0 + 1000 300m 49152 18432 30720 0 + 10000 300m 49152 18432 30720 0 + 25000 300m 71680 18432 53248 0 + 40000 300m 94208 18432 75776 0 + 50000 300m 94208 18432 75776 0 + 100000 300m 184320 18432 165888 0 + diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/port_config.ini b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/port_config.ini new file mode 100644 index 00000000000..78a1df9f051 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias speed +Ethernet1 75 eth-0-1 1000 +Ethernet2 73 eth-0-2 1000 +Ethernet3 72 eth-0-3 1000 +Ethernet4 70 eth-0-4 1000 +Ethernet5 69 eth-0-5 1000 +Ethernet6 67 eth-0-6 1000 +Ethernet7 66 eth-0-7 1000 +Ethernet8 64 eth-0-8 1000 +Ethernet9 63 eth-0-9 1000 +Ethernet10 61 eth-0-10 1000 +Ethernet11 60 eth-0-11 1000 +Ethernet12 58 eth-0-12 1000 +Ethernet13 57 eth-0-13 10000 +Ethernet14 56 eth-0-14 10000 +Ethernet15 55 eth-0-15 10000 +Ethernet16 53 eth-0-16 10000 +Ethernet17 52 eth-0-17 10000 +Ethernet18 50 eth-0-18 10000 +Ethernet19 49 eth-0-19 10000 +Ethernet20 48 eth-0-20 10000 +Ethernet21 0 eth-0-21 10000 +Ethernet22 1 eth-0-22 10000 +Ethernet23 3 eth-0-23 10000 +Ethernet24 2 eth-0-24 10000 +Ethernet25 4 eth-0-25 10000 +Ethernet26 5 eth-0-26 10000 +Ethernet27 6 eth-0-27 10000 +Ethernet28 7 eth-0-28 10000 +Ethernet29 8 eth-0-29 10000 +Ethernet30 9 eth-0-30 10000 +Ethernet31 10 eth-0-31 10000 +Ethernet32 12 eth-0-32 10000 +Ethernet33 13 eth-0-33 10000 +Ethernet34 15 eth-0-34 10000 +Ethernet35 16 eth-0-35 10000 +Ethernet36 18 eth-0-36 10000 +Ethernet37 19 eth-0-37 10000 +Ethernet38 21 eth-0-38 10000 +Ethernet39 22 eth-0-39 10000 +Ethernet40 24 eth-0-40 10000 +Ethernet41 25 eth-0-41 10000 +Ethernet42 27 eth-0-42 10000 +Ethernet43 28 eth-0-43 10000 +Ethernet44 30 eth-0-44 10000 +Ethernet45 31 eth-0-45 10000 +Ethernet46 33 eth-0-46 10000 +Ethernet47 34 eth-0-47 10000 +Ethernet48 36 eth-0-48 10000 +Ethernet49 42,41,43,40 eth-0-49 40000 +Ethernet50 45,46,44,47 eth-0-50 40000 +Ethernet51 94,93,95,92 eth-0-51 100000 +Ethernet52 89,90,88,91 eth-0-52 100000 +Ethernet53 85,86,84,87 eth-0-53 100000 +Ethernet54 81,82,80,83 eth-0-54 100000 diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/qos.json.j2 b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/sai.profile b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/sai.profile new file mode 100644 index 00000000000..6139a61cf0c --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/etc/centec/E582-48x2q4z-chip-profile.txt +SAI_HW_PORT_PROFILE_ID_CONFIG_FILE=/etc/centec/E582-48x2q4z-datapath-cfg.txt diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/default_sku b/device/centec/x86_64-centec_e582_48x2q4z-r0/default_sku new file mode 100644 index 00000000000..89c83dc3d0e --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/default_sku @@ -0,0 +1 @@ +E582-48x2q4z t1 diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/fancontrol b/device/centec/x86_64-centec_e582_48x2q4z-r0/fancontrol new file mode 100644 index 00000000000..5bcd0383896 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH=hwmon1=devices/platform/coretemp.0 hwmon5=devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-15/15-002f +DEVNAME=hwmon1=coretemp hwmon5=adt7470 +FCTEMPS=hwmon5/pwm4=hwmon1/temp1_input hwmon5/pwm3=hwmon1/temp1_input hwmon5/pwm2=hwmon1/temp1_input hwmon5/pwm1=hwmon1/temp1_input +FCFANS=hwmon5/pwm4=hwmon5/fan4_input hwmon5/pwm3=hwmon5/fan3_input hwmon5/pwm2=hwmon5/fan2_input hwmon5/pwm1=hwmon5/fan1_input +MINTEMP=hwmon5/pwm4=20 hwmon5/pwm3=20 hwmon5/pwm2=20 hwmon5/pwm1=20 +MAXTEMP=hwmon5/pwm4=60 hwmon5/pwm3=60 hwmon5/pwm2=60 hwmon5/pwm1=60 +MINSTART=hwmon5/pwm4=150 hwmon5/pwm3=150 hwmon5/pwm2=150 hwmon5/pwm1=150 +MINSTOP=hwmon5/pwm4=0 hwmon5/pwm3=0 hwmon5/pwm2=0 hwmon5/pwm1=100 diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/installer.conf b/device/centec/x86_64-centec_e582_48x2q4z-r0/installer.conf new file mode 100644 index 00000000000..7d60bf73d36 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/installer.conf @@ -0,0 +1,2 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=no" diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/eeprom.py b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/eeprom.py new file mode 100644 index 00000000000..3fd55c63d8b --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/eeprom.py @@ -0,0 +1,31 @@ +#!/usr/bin/env python + +############################################################################# +# Centec E582-48X6Q +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + import subprocess + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/led_control.py b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/led_control.py new file mode 100644 index 00000000000..4459096cb01 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/led_control.py @@ -0,0 +1,153 @@ +#!/usr/bin/env python +# +# led_control.py +# +# Platform-specific LED control functionality for SONiC +# + +try: + from sonic_led.led_control_base import LedControlBase + import swsssdk + import threading + import os + import logging + import struct + import time + import syslog + from socket import * + from select import * +except ImportError, e: + raise ImportError(str(e) + " - required module not found") + + +def DBG_PRINT(str): + syslog.openlog("centec-led") + syslog.syslog(syslog.LOG_INFO, str) + syslog.closelog() + +class LedControl(LedControlBase): + """Platform specific LED control class""" + SONIC_PORT_NAME_PREFIX = "Ethernet" + LED_MODE_UP = [11, 1] + LED_MODE_DOWN = [7, 2] + + def _initSystemLed(self): + try: + with open(self.f_led.format("system"), 'w') as led_file: + led_file.write("5") + DBG_PRINT("init system led to normal") + with open(self.f_led.format("idn"), 'w') as led_file: + led_file.write("1") + DBG_PRINT("init idn led to off") + except IOError as e: + DBG_PRINT(str(e)) + + def _initPanelLed(self): + with open(self.f_led.format("port1"), 'r') as led_file: + shouldInit = (int(led_file.read()) == 0) + + if shouldInit == True: + for (port, ctlid, defmode) in self.led_mapping[1:59]: + data = struct.pack('=HHHBBH', 0, 7, 4, ctlid, defmode, port) + self.udpClient.sendto(data, ('localhost', 8101)) + + data = struct.pack('=HHHBB30B', 0, 3, 32, 30, 0, *[x[0] for x in self.led_mapping[21:51]]) + self.udpClient.sendto(data, ('localhost', 8101)) + data = struct.pack('=HHHBB28B', 0, 3, 30, 28, 1, *[x[0] for x in (self.led_mapping[1:21]+self.led_mapping[51:59])]) + self.udpClient.sendto(data, ('localhost', 8101)) + + data = struct.pack('=HHHB', 0, 5, 1, 1) + self.udpClient.sendto(data, ('localhost', 8101)) + + for idx in range(1, 55): + (port, ctlid, defmode) = self.led_mapping[idx] + with open(self.f_led.format("port{}".format(idx)), 'w') as led_file: + led_file.write(str(defmode)) + DBG_PRINT("init port{} led to mode={}".format(idx, defmode)) + + for idx in range(1, 55): + (port, ctlid, defmode) = self.led_mapping[idx] + with open(self.f_led.format("port{}".format(idx)), 'r') as led_file: + defmode = int(led_file.read()) + data = struct.pack('=HHHBBH', 0, 7, 4, ctlid, defmode, port) + self.udpClient.sendto(data, ('localhost', 8101)) + DBG_PRINT("init port{} led to mode={}".format(idx, defmode)) + + def _initDefaultConfig(self): + DBG_PRINT("start init led") + while True: + try: + r_sel = [self.udpClient] + echo_req = struct.pack('=HHH', 0, 1, 0) + self.udpClient.sendto(echo_req, ('localhost', 8101)) + result = select(r_sel, [], [], 1) + if self.udpClient in result[0]: + echo_rsp, srv_addr = self.udpClient.recvfrom(1024) + if echo_rsp: + break + DBG_PRINT("connect to sdk rpc server timeout, try again.") + except IOError as e: + DBG_PRINT(str(e)) + + DBG_PRINT("connect to sdk rpc server success.") + + self._initSystemLed() + self._initPanelLed() + + DBG_PRINT("init led done") + + + # Helper method to map SONiC port name to index + def _port_name_to_index(self, port_name): + # Strip "Ethernet" off port name + if not port_name.startswith(self.SONIC_PORT_NAME_PREFIX): + return -1 + + port_idx = int(port_name[len(self.SONIC_PORT_NAME_PREFIX):]) + return port_idx + + def _port_state_to_mode(self, port_idx, state): + if state == "up": + return self.LED_MODE_UP[0] if (port_idx < 49) else self.LED_MODE_UP[1] + else: + return self.LED_MODE_DOWN[0] if (port_idx < 49) else self.LED_MODE_DOWN[1] + + def _port_led_mode_update(self, port_idx, ledMode): + with open(self.f_led.format("port{}".format(port_idx)), 'w') as led_file: + led_file.write(str(ledMode)) + (port, ctlid) = (self.led_mapping[port_idx][0], self.led_mapping[port_idx][1]) + data = struct.pack('=HHHBBH', 0, 7, 4, ctlid, ledMode, port) + self.udpClient.sendto(data, ('localhost', 8101)) + + # Concrete implementation of port_link_state_change() method + def port_link_state_change(self, portname, state): + port_idx = self._port_name_to_index(portname) + ledMode = self._port_state_to_mode(port_idx, state) + with open(self.f_led.format("port{}".format(port_idx)), 'r') as led_file: + saveMode = int(led_file.read()) + + if ledMode == saveMode: + return + + self._port_led_mode_update(port_idx, ledMode) + DBG_PRINT("update {} led mode from {} to {}".format(portname, saveMode, ledMode)) + + # Constructor + def __init__(self): + # [macid, ctlid, defaultmode] + self.led_mapping = [(0, 0, 0)] # resv + self.led_mapping.extend([(27, 1, 7), (25, 1, 7), (24, 1, 7), (22, 1, 7), (21, 1, 7), (19, 1, 7), (18, 1, 7), (16, 1, 7)]) # panel port 1~8 + self.led_mapping.extend([(15, 1, 7), (13, 1, 7), (12, 1, 7), (10, 1, 7), (9, 1, 7), (8, 1, 7), (7, 1, 7), (5, 1, 7)]) # panel port 9~16 + self.led_mapping.extend([(4, 1, 7), (2, 1, 7), (1, 1, 7), (0, 1, 7), (0, 0, 7), (1, 0, 7), (3, 0, 7), (2, 0, 7)]) # panel port 17~24 + self.led_mapping.extend([(4, 0, 7), (5, 0, 7), (6, 0, 7), (7, 0, 7), (8, 0, 7), (9, 0, 7), (10, 0, 7), (12, 0, 7)]) # panel port 25~32 + self.led_mapping.extend([(13, 0, 7), (15, 0, 7), (16, 0, 7), (18, 0, 7), (19, 0, 7), (21, 0, 7), (22, 0, 7), (24, 0, 7)]) # panel port 33~40 + self.led_mapping.extend([(25, 0, 7), (27, 0, 7), (28, 0, 7), (30, 0, 7), (31, 0, 7), (33, 0, 7), (34, 0, 7), (48, 0, 7)]) # panel port 41~48 + self.led_mapping.extend([(36, 0, 2), (52, 0, 2), (52, 1, 2), (36, 1, 2), (48, 1, 2), (32, 1, 2)]) # panel port 49~54 + self.led_mapping.extend([(11, 1, 2), (11, 1, 2), (11, 1, 2), (11, 1, 2), (11, 1, 2), (11, 1, 2)]) + + self.f_led = "/sys/class/leds/{}/brightness" + + self.udpClient = socket(AF_INET, SOCK_DGRAM) + + self._initDefaultConfig() + diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/psuutil.py b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/psuutil.py new file mode 100644 index 00000000000..6505318ed94 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/psuutil.py @@ -0,0 +1,74 @@ +#!/usr/bin/env python + +############################################################################# +# Centec +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/class/psu/psu{}/" + self.psu_presence = "psu_presence" + self.psu_oper_status = "psu_status" + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path.format(index) + self.psu_oper_status, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 0 + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path.format(index) + self.psu_presence, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 0 diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/sfputil.py b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/sfputil.py new file mode 100644 index 00000000000..4d4b3f3e555 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/sfputil.py @@ -0,0 +1,162 @@ +#!/usr/bin/env python + +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import os + import logging + import struct + import syslog + from socket import * + from select import * + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + + +def DBG_PRINT(str): + print str + "\n" + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + SONIC_PORT_NAME_PREFIX = "Ethernet" + PORT_START = 1 + PORT_END = 54 + PORTS_IN_BLOCK = 54 + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(49, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self.eeprom_mapping + + def is_logical_port(self, port_name): + return True + + def get_logical_to_physical(self, port_name): + if not port_name.startswith(self.SONIC_PORT_NAME_PREFIX): + return None + + port_idx = int(port_name[len(self.SONIC_PORT_NAME_PREFIX):]) + + return [port_idx] + + def get_eeprom_data(self, port): + (ctlid, devid) = self.fiber_mapping[port] + offset = (128 if port in self.qsfp_ports else 0) + r_sel = [self.udpClient] + req = struct.pack('=HHHBBHIBBBBI', + 0, 9, 16, # lchip/msgtype/msglen + ctlid, # uint8 ctl_id + devid, # uint8 slave_dev_id + 0x50, # uint16 dev_addr + (1< self.port_end: + return False + try: + with open(self.f_sfp_present.format(port_num), 'r') as sfp_file: + return 1 == int(sfp_file.read()) + except IOError as e: + DBG_PRINT(str(e)) + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def get_transceiver_change_event(self, timeout=0): + return False, {} diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/buffers.json.j2 b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/buffers.json.j2 new file mode 100644 index 00000000000..08e21e428b6 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/buffers.json.j2 @@ -0,0 +1,70 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '40m' %} +{% set default_ports_num = 54 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(1,default_ports_num+1) %} + {% if PORT.append("Ethernet%d" % (port_idx)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "CABLE_LENGTH": { + "AZURE": { + {% for port in PORT %} + {% set cable = cable_length(port) -%} + "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %} + + {% endfor %} + } + } +} + diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/pg_profile_lookup.ini b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/pg_profile_lookup.ini new file mode 100644 index 00000000000..a65244e69b5 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/pg_profile_lookup.ini @@ -0,0 +1,21 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 1000 5m 34816 18432 16384 0 + 10000 5m 34816 18432 16384 0 + 25000 5m 34816 18432 16384 0 + 40000 5m 34816 18432 16384 0 + 50000 5m 34816 18432 16384 0 + 100000 5m 36864 18432 18432 0 + 1000 40m 36864 18432 18432 0 + 10000 40m 36864 18432 18432 0 + 25000 40m 39936 18432 21504 0 + 40000 40m 41984 18432 23552 0 + 50000 40m 41984 18432 23552 0 + 100000 40m 54272 18432 35840 0 + 1000 300m 49152 18432 30720 0 + 10000 300m 49152 18432 30720 0 + 25000 300m 71680 18432 53248 0 + 40000 300m 94208 18432 75776 0 + 50000 300m 94208 18432 75776 0 + 100000 300m 184320 18432 165888 0 + diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/port_config.ini b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/port_config.ini new file mode 100644 index 00000000000..efb24937cec --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias speed +Ethernet1 4 eth-0-1 1000 +Ethernet2 5 eth-0-2 1000 +Ethernet3 6 eth-0-3 1000 +Ethernet4 8 eth-0-4 1000 +Ethernet5 9 eth-0-5 1000 +Ethernet6 10 eth-0-6 1000 +Ethernet7 12 eth-0-7 1000 +Ethernet8 13 eth-0-8 1000 +Ethernet9 14 eth-0-9 1000 +Ethernet10 16 eth-0-10 1000 +Ethernet11 17 eth-0-11 1000 +Ethernet12 18 eth-0-12 1000 +Ethernet13 20 eth-0-13 10000 +Ethernet14 21 eth-0-14 10000 +Ethernet15 22 eth-0-15 10000 +Ethernet16 24 eth-0-16 10000 +Ethernet17 25 eth-0-17 10000 +Ethernet18 26 eth-0-18 10000 +Ethernet19 28 eth-0-19 10000 +Ethernet20 30 eth-0-20 10000 +Ethernet21 31 eth-0-21 10000 +Ethernet22 32 eth-0-22 10000 +Ethernet23 34 eth-0-23 10000 +Ethernet24 35 eth-0-24 10000 +Ethernet25 36 eth-0-25 10000 +Ethernet26 37 eth-0-26 10000 +Ethernet27 39 eth-0-27 10000 +Ethernet28 40 eth-0-28 10000 +Ethernet29 41 eth-0-29 10000 +Ethernet30 43 eth-0-30 10000 +Ethernet31 47 eth-0-31 10000 +Ethernet32 46 eth-0-32 10000 +Ethernet33 45 eth-0-33 10000 +Ethernet34 44 eth-0-34 10000 +Ethernet35 92 eth-0-35 10000 +Ethernet36 93 eth-0-36 10000 +Ethernet37 94 eth-0-37 10000 +Ethernet38 95 eth-0-38 10000 +Ethernet39 90 eth-0-39 10000 +Ethernet40 89 eth-0-40 10000 +Ethernet41 88 eth-0-41 10000 +Ethernet42 87 eth-0-42 10000 +Ethernet43 86 eth-0-43 10000 +Ethernet44 85 eth-0-44 10000 +Ethernet45 84 eth-0-45 10000 +Ethernet46 82 eth-0-46 10000 +Ethernet47 81 eth-0-47 10000 +Ethernet48 80 eth-0-48 10000 +Ethernet49 77,78,76,79 eth-0-49 40000 +Ethernet50 73,74,72,75 eth-0-50 40000 +Ethernet51 70,71,69,68 eth-0-51 40000 +Ethernet52 61,63,60,62 eth-0-52 40000 +Ethernet53 59,57,58,56 eth-0-53 40000 +Ethernet54 53,55,54,52 eth-0-54 40000 diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/qos.json.j2 b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/sai.profile b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/sai.profile new file mode 100644 index 00000000000..c03fcf630c5 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/etc/centec/E582-48x6q-chip-profile.txt +SAI_HW_PORT_PROFILE_ID_CONFIG_FILE=/etc/centec/E582-48x6q-datapath-cfg.txt diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/default_sku b/device/centec/x86_64-centec_e582_48x6q-r0/default_sku new file mode 100644 index 00000000000..e0f7b24535b --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/default_sku @@ -0,0 +1 @@ +E582-48x6q t1 diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/fancontrol b/device/centec/x86_64-centec_e582_48x6q-r0/fancontrol new file mode 100644 index 00000000000..5bcd0383896 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH=hwmon1=devices/platform/coretemp.0 hwmon5=devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-15/15-002f +DEVNAME=hwmon1=coretemp hwmon5=adt7470 +FCTEMPS=hwmon5/pwm4=hwmon1/temp1_input hwmon5/pwm3=hwmon1/temp1_input hwmon5/pwm2=hwmon1/temp1_input hwmon5/pwm1=hwmon1/temp1_input +FCFANS=hwmon5/pwm4=hwmon5/fan4_input hwmon5/pwm3=hwmon5/fan3_input hwmon5/pwm2=hwmon5/fan2_input hwmon5/pwm1=hwmon5/fan1_input +MINTEMP=hwmon5/pwm4=20 hwmon5/pwm3=20 hwmon5/pwm2=20 hwmon5/pwm1=20 +MAXTEMP=hwmon5/pwm4=60 hwmon5/pwm3=60 hwmon5/pwm2=60 hwmon5/pwm1=60 +MINSTART=hwmon5/pwm4=150 hwmon5/pwm3=150 hwmon5/pwm2=150 hwmon5/pwm1=150 +MINSTOP=hwmon5/pwm4=0 hwmon5/pwm3=0 hwmon5/pwm2=0 hwmon5/pwm1=100 diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/installer.conf b/device/centec/x86_64-centec_e582_48x6q-r0/installer.conf new file mode 100644 index 00000000000..7d60bf73d36 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/installer.conf @@ -0,0 +1,2 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=no" diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/plugins/eeprom.py b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/eeprom.py new file mode 100644 index 00000000000..3fd55c63d8b --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/eeprom.py @@ -0,0 +1,31 @@ +#!/usr/bin/env python + +############################################################################# +# Centec E582-48X6Q +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + import subprocess + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/plugins/led_control.py b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/led_control.py new file mode 100644 index 00000000000..d25bf6f8b47 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/led_control.py @@ -0,0 +1,153 @@ +#!/usr/bin/env python +# +# led_control.py +# +# Platform-specific LED control functionality for SONiC +# + +try: + from sonic_led.led_control_base import LedControlBase + import swsssdk + import threading + import os + import logging + import struct + import time + import syslog + from socket import * + from select import * +except ImportError, e: + raise ImportError(str(e) + " - required module not found") + + +def DBG_PRINT(str): + syslog.openlog("centec-led") + syslog.syslog(syslog.LOG_INFO, str) + syslog.closelog() + +class LedControl(LedControlBase): + """Platform specific LED control class""" + SONIC_PORT_NAME_PREFIX = "Ethernet" + LED_MODE_UP = [11, 1] + LED_MODE_DOWN = [7, 2] + + def _initSystemLed(self): + try: + with open(self.f_led.format("system"), 'w') as led_file: + led_file.write("5") + DBG_PRINT("init system led to normal") + with open(self.f_led.format("idn"), 'w') as led_file: + led_file.write("1") + DBG_PRINT("init idn led to off") + except IOError as e: + DBG_PRINT(str(e)) + + def _initPanelLed(self): + with open(self.f_led.format("port1"), 'r') as led_file: + shouldInit = (int(led_file.read()) == 0) + + if shouldInit == True: + for (port, ctlid, defmode) in self.led_mapping[1:59]: + data = struct.pack('=HHHBBH', 0, 7, 4, ctlid, defmode, port) + self.udpClient.sendto(data, ('localhost', 8101)) + + data = struct.pack('=HHHBB34B', 0, 3, 36, 34, 0, *[x[0] for x in self.led_mapping[1:35]]) + self.udpClient.sendto(data, ('localhost', 8101)) + data = struct.pack('=HHHBB24B', 0, 3, 26, 24, 1, *[x[0] for x in self.led_mapping[35:59]]) + self.udpClient.sendto(data, ('localhost', 8101)) + + data = struct.pack('=HHHB', 0, 5, 1, 1) + self.udpClient.sendto(data, ('localhost', 8101)) + + for idx in range(1, 55): + (port, ctlid, defmode) = self.led_mapping[idx] + with open(self.f_led.format("port{}".format(idx)), 'w') as led_file: + led_file.write(str(defmode)) + DBG_PRINT("init port{} led to mode={}".format(idx, defmode)) + + for idx in range(1, 55): + (port, ctlid, defmode) = self.led_mapping[idx] + with open(self.f_led.format("port{}".format(idx)), 'r') as led_file: + defmode = int(led_file.read()) + data = struct.pack('=HHHBBH', 0, 7, 4, ctlid, defmode, port) + self.udpClient.sendto(data, ('localhost', 8101)) + DBG_PRINT("init port{} led to mode={}".format(idx, defmode)) + + def _initDefaultConfig(self): + DBG_PRINT("start init led") + while True: + try: + r_sel = [self.udpClient] + echo_req = struct.pack('=HHH', 0, 1, 0) + self.udpClient.sendto(echo_req, ('localhost', 8101)) + result = select(r_sel, [], [], 1) + if self.udpClient in result[0]: + echo_rsp, srv_addr = self.udpClient.recvfrom(1024) + if echo_rsp: + break + DBG_PRINT("connect to sdk rpc server timeout, try again.") + except IOError as e: + DBG_PRINT(str(e)) + + DBG_PRINT("connect to sdk rpc server success.") + + self._initSystemLed() + self._initPanelLed() + + DBG_PRINT("init led done") + + + # Helper method to map SONiC port name to index + def _port_name_to_index(self, port_name): + # Strip "Ethernet" off port name + if not port_name.startswith(self.SONIC_PORT_NAME_PREFIX): + return -1 + + port_idx = int(port_name[len(self.SONIC_PORT_NAME_PREFIX):]) + return port_idx + + def _port_state_to_mode(self, port_idx, state): + if state == "up": + return self.LED_MODE_UP[0] if (port_idx < 49) else self.LED_MODE_UP[1] + else: + return self.LED_MODE_DOWN[0] if (port_idx < 49) else self.LED_MODE_DOWN[1] + + def _port_led_mode_update(self, port_idx, ledMode): + with open(self.f_led.format("port{}".format(port_idx)), 'w') as led_file: + led_file.write(str(ledMode)) + (port, ctlid) = (self.led_mapping[port_idx][0], self.led_mapping[port_idx][1]) + data = struct.pack('=HHHBBH', 0, 7, 4, ctlid, ledMode, port) + self.udpClient.sendto(data, ('localhost', 8101)) + + # Concrete implementation of port_link_state_change() method + def port_link_state_change(self, portname, state): + port_idx = self._port_name_to_index(portname) + ledMode = self._port_state_to_mode(port_idx, state) + with open(self.f_led.format("port{}".format(port_idx)), 'r') as led_file: + saveMode = int(led_file.read()) + + if ledMode == saveMode: + return + + self._port_led_mode_update(port_idx, ledMode) + DBG_PRINT("update {} led mode from {} to {}".format(portname, saveMode, ledMode)) + + # Constructor + def __init__(self): + # [macid, ctlid, defaultmode] + self.led_mapping = [(0, 0, 0)] # resv + self.led_mapping.extend([(4, 0, 7), (5, 0, 7), (6, 0, 7), (8, 0, 7), (9, 0, 7), (10, 0, 7), (12, 0, 7), (13, 0, 7)]) # panel port 1~8 + self.led_mapping.extend([(14, 0, 7), (16, 0, 7), (17, 0, 7), (18, 0, 7), (20, 0, 7), (21, 0, 7), (22, 0, 7), (24, 0, 7)]) # panel port 9~16 + self.led_mapping.extend([(25, 0, 7), (26, 0, 7), (28, 0, 7), (30, 0, 7), (31, 0, 7), (32, 0, 7), (34, 0, 7), (35, 0, 7)]) # panel port 17~24 + self.led_mapping.extend([(48, 0, 7), (49, 0, 7), (51, 0, 7), (36, 0, 7), (37, 0, 7), (39, 0, 7), (55, 0, 7), (54, 0, 7)]) # panel port 25~32 + self.led_mapping.extend([(53, 0, 7), (52, 0, 7), (52, 1, 7), (53, 1, 7), (54, 1, 7), (55, 1, 7), (38, 1, 7), (37, 1, 7)]) # panel port 33~40 + self.led_mapping.extend([(36, 1, 7), (51, 1, 7), (50, 1, 7), (49, 1, 7), (48, 1, 7), (34, 1, 7), (33, 1, 7), (32, 1, 7)]) # panel port 41~48 + self.led_mapping.extend([(28, 1, 2), (24, 1, 2), (20, 1, 2), (12, 1, 2), (8, 1, 2), (4, 1, 2)]) # panel port 49~54 + self.led_mapping.extend([(0, 1, 2), (0, 1, 2), (0, 1, 2), (0, 1, 2), (0, 1, 2), (0, 1, 2)]) + + self.f_led = "/sys/class/leds/{}/brightness" + + self.udpClient = socket(AF_INET, SOCK_DGRAM) + + self._initDefaultConfig() + diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/plugins/psuutil.py b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/psuutil.py new file mode 100644 index 00000000000..6505318ed94 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/psuutil.py @@ -0,0 +1,74 @@ +#!/usr/bin/env python + +############################################################################# +# Centec +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/class/psu/psu{}/" + self.psu_presence = "psu_presence" + self.psu_oper_status = "psu_status" + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path.format(index) + self.psu_oper_status, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 0 + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path.format(index) + self.psu_presence, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 0 diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/plugins/sfputil.py b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/sfputil.py new file mode 100644 index 00000000000..8d1281492d6 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/sfputil.py @@ -0,0 +1,162 @@ +#!/usr/bin/env python + +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import os + import logging + import struct + import syslog + from socket import * + from select import * + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + + +def DBG_PRINT(str): + print str + "\n" + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + SONIC_PORT_NAME_PREFIX = "Ethernet" + PORT_START = 1 + PORT_END = 54 + PORTS_IN_BLOCK = 54 + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(49, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self.eeprom_mapping + + def is_logical_port(self, port_name): + return True + + def get_logical_to_physical(self, port_name): + if not port_name.startswith(self.SONIC_PORT_NAME_PREFIX): + return None + + port_idx = int(port_name[len(self.SONIC_PORT_NAME_PREFIX):]) + + return [port_idx] + + def get_eeprom_data(self, port): + (ctlid, devid) = self.fiber_mapping[port] + offset = (128 if port in self.qsfp_ports else 0) + r_sel = [self.udpClient] + req = struct.pack('=HHHBBHIBBBBI', + 0, 9, 16, # lchip/msgtype/msglen + ctlid, # uint8 ctl_id + devid, # uint8 slave_dev_id + 0x50, # uint16 dev_addr + (1< self.port_end: + return False + try: + with open(self.f_sfp_present.format(port_num), 'r') as sfp_file: + return 1 == int(sfp_file.read()) + except IOError as e: + DBG_PRINT(str(e)) + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def get_transceiver_change_event(self, timeout=0): + return False, {} diff --git a/device/centec/x86_64-ew_es6220_x48q2h4-r0/ES6428A-X48Q2H4/port_config.ini b/device/centec/x86_64-ew_es6220_x48q2h4-r0/ES6428A-X48Q2H4/port_config.ini new file mode 100644 index 00000000000..b9a831f22e8 --- /dev/null +++ b/device/centec/x86_64-ew_es6220_x48q2h4-r0/ES6428A-X48Q2H4/port_config.ini @@ -0,0 +1,33 @@ +# name lanes +Ethernet0 1 +Ethernet4 2 +Ethernet8 3 +Ethernet12 4 +Ethernet16 5 +Ethernet20 6 +Ethernet24 7 +Ethernet28 8 +Ethernet32 9 +Ethernet36 10 +Ethernet40 11 +Ethernet44 12 +Ethernet48 13 +Ethernet52 14 +Ethernet56 15 +Ethernet60 16 +Ethernet64 17 +Ethernet68 18 +Ethernet72 19 +Ethernet76 20 +Ethernet80 21 +Ethernet84 22 +Ethernet88 23 +Ethernet92 24 +Ethernet96 25 +Ethernet100 26 +Ethernet104 27 +Ethernet108 28 +Ethernet112 29 +Ethernet116 30 +Ethernet120 31 +Ethernet124 32 diff --git a/device/centec/x86_64-ew_es6220_x48q2h4-r0/ES6428A-X48Q2H4/sai.profile b/device/centec/x86_64-ew_es6220_x48q2h4-r0/ES6428A-X48Q2H4/sai.profile new file mode 100644 index 00000000000..6a5af192a2b --- /dev/null +++ b/device/centec/x86_64-ew_es6220_x48q2h4-r0/ES6428A-X48Q2H4/sai.profile @@ -0,0 +1 @@ +BOARD_CONFIG_FILE_PATH=/etc/centec/ES6428A-X48Q2H4.json diff --git a/device/centec/x86_64-ew_es6220_x48q2h4-r0/default_sku b/device/centec/x86_64-ew_es6220_x48q2h4-r0/default_sku new file mode 100644 index 00000000000..d10e1b46328 --- /dev/null +++ b/device/centec/x86_64-ew_es6220_x48q2h4-r0/default_sku @@ -0,0 +1 @@ +ES6428A-X48Q2H4 t1 diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/buffers.json.j2 b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/buffers.json.j2 new file mode 100755 index 00000000000..2c391214fa6 --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/buffers.json.j2 @@ -0,0 +1,111 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '40m' %} +{% set default_speed = '10G' %} +{% set default_ports_num = 54 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "CABLE_LENGTH": { + "AZURE": { + {% for port in PORT %} + {% set cable = cable_length(port) -%} + "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %} + + {% endfor %} + } + }, + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "20971328", + "type": "ingress", + "mode": "static" + }, + "ingress_lossy_pool": { + "size": "20971328", + "type": "ingress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "20971328", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"78400", + "xoff":"132160", + "size":"3584", + "static_th":"82880" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"3584", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"3584", + "dynamic_th":"-4" + } + }, + "BUFFER_PG": { + }, + "BUFFER_QUEUE": { + } +} + \ No newline at end of file diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/pg_profile_lookup.ini b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/pg_profile_lookup.ini new file mode 100755 index 00000000000..d98b0eca6d1 --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 3584 32256 59136 36736 + 25000 5m 3584 41216 68096 45696 + 40000 5m 3584 47488 74368 51968 + 50000 5m 3584 52864 79744 57344 + 100000 5m 3584 78400 132160 82880 + 10000 40m 3584 32256 59136 36736 + 25000 40m 3584 41216 68096 45696 + 40000 40m 3584 47488 74368 51968 + 50000 40m 3584 52864 79744 57344 + 100000 40m 3584 78400 132160 82880 + 10000 300m 3584 32256 65856 36736 + 25000 300m 3584 41216 84672 45696 + 40000 300m 3584 47488 101024 51968 + 50000 300m 3584 52864 113120 57344 + 100000 300m 3584 78400 198688 82880 \ No newline at end of file diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/port_config.ini b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/port_config.ini new file mode 100755 index 00000000000..0a25fc0a345 --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed +Ethernet0 8 Ethernet1/1 0 25000 +Ethernet1 9 Ethernet2/1 1 25000 +Ethernet2 10 Ethernet3/1 2 25000 +Ethernet3 11 Ethernet4/1 3 25000 +Ethernet4 12 Ethernet5/1 4 25000 +Ethernet5 13 Ethernet6/1 5 25000 +Ethernet6 14 Ethernet7/1 6 25000 +Ethernet7 15 Ethernet8/1 7 25000 +Ethernet8 16 Ethernet9/1 8 25000 +Ethernet9 17 Ethernet10/1 9 25000 +Ethernet10 18 Ethernet11/1 10 25000 +Ethernet11 19 Ethernet12/1 11 25000 +Ethernet12 20 Ethernet13/1 12 25000 +Ethernet13 21 Ethernet14/1 13 25000 +Ethernet14 22 Ethernet15/1 14 25000 +Ethernet15 23 Ethernet16/1 15 25000 +Ethernet16 32 Ethernet17/1 16 25000 +Ethernet17 33 Ethernet18/1 17 25000 +Ethernet18 34 Ethernet19/1 18 25000 +Ethernet19 35 Ethernet20/1 19 25000 +Ethernet20 40 Ethernet21/1 20 25000 +Ethernet21 41 Ethernet22/1 21 25000 +Ethernet22 42 Ethernet23/1 22 25000 +Ethernet23 43 Ethernet24/1 23 25000 +Ethernet24 48 Ethernet25/1 24 25000 +Ethernet25 49 Ethernet26/1 25 25000 +Ethernet26 50 Ethernet27/1 26 25000 +Ethernet27 51 Ethernet28/1 27 25000 +Ethernet28 56 Ethernet29/1 28 25000 +Ethernet29 57 Ethernet30/1 29 25000 +Ethernet30 58 Ethernet31/1 30 25000 +Ethernet31 59 Ethernet32/1 31 25000 +Ethernet32 64 Ethernet33/1 32 25000 +Ethernet33 65 Ethernet34/1 33 25000 +Ethernet34 66 Ethernet35/1 34 25000 +Ethernet35 67 Ethernet36/1 35 25000 +Ethernet36 68 Ethernet37/1 36 25000 +Ethernet37 69 Ethernet38/1 37 25000 +Ethernet38 70 Ethernet39/1 38 25000 +Ethernet39 71 Ethernet40/1 39 25000 +Ethernet40 72 Ethernet41/1 40 25000 +Ethernet41 73 Ethernet42/1 41 25000 +Ethernet42 74 Ethernet43/1 42 25000 +Ethernet43 75 Ethernet44/1 43 25000 +Ethernet44 76 Ethernet45/1 44 25000 +Ethernet45 77 Ethernet46/1 45 25000 +Ethernet46 78 Ethernet47/1 46 25000 +Ethernet47 79 Ethernet48/1 47 25000 +Ethernet48 84,85,86,87 Ethernet49/1 48 100000 +Ethernet49 80,81,82,83 Ethernet50/1 49 100000 +Ethernet50 92,93,94,95 Ethernet51/1 50 100000 +Ethernet51 88,89,90,91 Ethernet52/1 51 100000 +Ethernet52 108,109,110,111 Ethernet53/1 52 100000 +Ethernet53 104,105,106,107 Ethernet54/1 53 100000 +Ethernet54 116,117,118,119 Ethernet55/1 54 100000 +Ethernet55 112,113,114,115 Ethernet56/1 55 100000 diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/port_config.nps b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/port_config.nps new file mode 100755 index 00000000000..857e5f1ede5 --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/port_config.nps @@ -0,0 +1,702 @@ +init start stage unit=0 low-level +init set port-map unit=0 port=0 eth-macro=2 lane=0 max-speed=25g active=true +init set port-map unit=0 port=1 eth-macro=2 lane=1 max-speed=25g active=true +init set port-map unit=0 port=2 eth-macro=2 lane=2 max-speed=25g active=true +init set port-map unit=0 port=3 eth-macro=2 lane=3 max-speed=25g active=true +init set port-map unit=0 port=4 eth-macro=3 lane=0 max-speed=25g active=true +init set port-map unit=0 port=5 eth-macro=3 lane=1 max-speed=25g active=true +init set port-map unit=0 port=6 eth-macro=3 lane=2 max-speed=25g active=true +init set port-map unit=0 port=7 eth-macro=3 lane=3 max-speed=25g active=true +init set port-map unit=0 port=8 eth-macro=4 lane=0 max-speed=25g active=true +init set port-map unit=0 port=9 eth-macro=4 lane=1 max-speed=25g active=true +init set port-map unit=0 port=10 eth-macro=4 lane=2 max-speed=25g active=true +init set port-map unit=0 port=11 eth-macro=4 lane=3 max-speed=25g active=true +init set port-map unit=0 port=12 eth-macro=5 lane=0 max-speed=25g active=true +init set port-map unit=0 port=13 eth-macro=5 lane=1 max-speed=25g active=true +init set port-map unit=0 port=14 eth-macro=5 lane=2 max-speed=25g active=true +init set port-map unit=0 port=15 eth-macro=5 lane=3 max-speed=25g active=true +init set port-map unit=0 port=16 eth-macro=8 lane=0 max-speed=25g active=true +init set port-map unit=0 port=17 eth-macro=8 lane=1 max-speed=25g active=true +init set port-map unit=0 port=18 eth-macro=8 lane=2 max-speed=25g active=true +init set port-map unit=0 port=19 eth-macro=8 lane=3 max-speed=25g active=true +init set port-map unit=0 port=20 eth-macro=10 lane=0 max-speed=25g active=true +init set port-map unit=0 port=21 eth-macro=10 lane=1 max-speed=25g active=true +init set port-map unit=0 port=22 eth-macro=10 lane=2 max-speed=25g active=true +init set port-map unit=0 port=23 eth-macro=10 lane=3 max-speed=25g active=true +init set port-map unit=0 port=24 eth-macro=12 lane=0 max-speed=25g active=true +init set port-map unit=0 port=25 eth-macro=12 lane=1 max-speed=25g active=true +init set port-map unit=0 port=26 eth-macro=12 lane=2 max-speed=25g active=true +init set port-map unit=0 port=27 eth-macro=12 lane=3 max-speed=25g active=true +init set port-map unit=0 port=28 eth-macro=14 lane=0 max-speed=25g active=true +init set port-map unit=0 port=29 eth-macro=14 lane=1 max-speed=25g active=true +init set port-map unit=0 port=30 eth-macro=14 lane=2 max-speed=25g active=true +init set port-map unit=0 port=31 eth-macro=14 lane=3 max-speed=25g active=true +init set port-map unit=0 port=32 eth-macro=16 lane=0 max-speed=25g active=true +init set port-map unit=0 port=33 eth-macro=16 lane=1 max-speed=25g active=true +init set port-map unit=0 port=34 eth-macro=16 lane=2 max-speed=25g active=true +init set port-map unit=0 port=35 eth-macro=16 lane=3 max-speed=25g active=true +init set port-map unit=0 port=36 eth-macro=17 lane=0 max-speed=25g active=true +init set port-map unit=0 port=37 eth-macro=17 lane=1 max-speed=25g active=true +init set port-map unit=0 port=38 eth-macro=17 lane=2 max-speed=25g active=true +init set port-map unit=0 port=39 eth-macro=17 lane=3 max-speed=25g active=true +init set port-map unit=0 port=40 eth-macro=18 lane=0 max-speed=25g active=true +init set port-map unit=0 port=41 eth-macro=18 lane=1 max-speed=25g active=true +init set port-map unit=0 port=42 eth-macro=18 lane=2 max-speed=25g active=true +init set port-map unit=0 port=43 eth-macro=18 lane=3 max-speed=25g active=true +init set port-map unit=0 port=44 eth-macro=19 lane=0 max-speed=25g active=true +init set port-map unit=0 port=45 eth-macro=19 lane=1 max-speed=25g active=true +init set port-map unit=0 port=46 eth-macro=19 lane=2 max-speed=25g active=true +init set port-map unit=0 port=47 eth-macro=19 lane=3 max-speed=25g active=true +init set port-map unit=0 port=48 eth-macro=21 lane=0 max-speed=100g active=true +init set port-map unit=0 port=49 eth-macro=20 lane=0 max-speed=100g active=true +init set port-map unit=0 port=50 eth-macro=23 lane=0 max-speed=100g active=true +init set port-map unit=0 port=51 eth-macro=22 lane=0 max-speed=100g active=true +init set port-map unit=0 port=52 eth-macro=27 lane=0 max-speed=100g active=true +init set port-map unit=0 port=53 eth-macro=26 lane=0 max-speed=100g active=true +init set port-map unit=0 port=54 eth-macro=29 lane=0 max-speed=100g active=true +init set port-map unit=0 port=55 eth-macro=28 lane=0 max-speed=100g active=true +init set port-map unit=0 port=129 eth-macro=0 lane=1 max-speed=10g active=true guarantee=true cpi=true +init set port-map unit=0 port=130 eth-macro=0 lane=0 max-speed=10g active=true guarantee=true cpi=true init-done=true +init start stage unit=0 task-rsrc +init start stage unit=0 module +init start stage unit=0 task +phy set lane-swap unit=0 portlist=0 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=1 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=2 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=3 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=4 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=5 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=6 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=7 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=8 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=9 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=10 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=11 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=12 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=13 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=14 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=15 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=16 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=17 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=18 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=19 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=20 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=21 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=22 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=23 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=24 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=25 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=26 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=27 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=28 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=29 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=30 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=31 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=32 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=33 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=34 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=35 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=36 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=37 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=38 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=39 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=40 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=41 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=42 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=43 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=44 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=45 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=46 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=47 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=48 lane-cnt=4 property=tx data=0x3.0.1.2 +phy set lane-swap unit=0 portlist=49 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=50 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap unit=0 portlist=51 lane-cnt=4 property=tx data=0x3.2.0.1 +phy set lane-swap unit=0 portlist=52 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=53 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=54 lane-cnt=4 property=tx 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property=c1 data=0x6 +phy set pre-emphasis unit=0 portlist=31 lane-cnt=1 property=c2 data=0x2 +phy set pre-emphasis unit=0 portlist=31 lane-cnt=1 property=cn1 data=0x0 +phy set pre-emphasis unit=0 portlist=31 lane-cnt=1 property=c0 data=0x1c +phy set pre-emphasis unit=0 portlist=31 lane-cnt=1 property=c1 data=0x6 +phy set pre-emphasis unit=0 portlist=32 lane-cnt=1 property=c2 data=0x2 +phy set pre-emphasis unit=0 portlist=32 lane-cnt=1 property=cn1 data=0x0 +phy set pre-emphasis unit=0 portlist=32 lane-cnt=1 property=c0 data=0x1c +phy set pre-emphasis unit=0 portlist=32 lane-cnt=1 property=c1 data=0x6 +phy set pre-emphasis unit=0 portlist=33 lane-cnt=1 property=c2 data=0x2 +phy set pre-emphasis unit=0 portlist=33 lane-cnt=1 property=cn1 data=0x0 +phy set pre-emphasis unit=0 portlist=33 lane-cnt=1 property=c0 data=0x1c +phy set pre-emphasis unit=0 portlist=33 lane-cnt=1 property=c1 data=0x6 +phy set pre-emphasis unit=0 portlist=34 lane-cnt=1 property=c2 data=0x2 +phy set pre-emphasis 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lane-cnt=1 property=c1 data=0x6 +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis unit=0 portlist=54 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property unit=0 portlist=38 medium-type=sr +port set property unit=0 portlist=39 medium-type=sr +port set property unit=0 portlist=40 medium-type=sr +port set property unit=0 portlist=41 medium-type=sr +port set property unit=0 portlist=42 medium-type=sr +port set property unit=0 portlist=43 medium-type=sr +port set property unit=0 portlist=44 medium-type=sr +port set property unit=0 portlist=45 medium-type=sr +port set property unit=0 portlist=46 medium-type=sr +port set property unit=0 portlist=47 medium-type=sr +port set property unit=0 portlist=48 medium-type=sr4 +port set property unit=0 portlist=49 medium-type=sr4 +port set property unit=0 portlist=50 medium-type=sr4 +port set property unit=0 portlist=51 medium-type=sr4 +port set property unit=0 portlist=52 medium-type=sr4 +port set property unit=0 portlist=53 medium-type=sr4 +port set property unit=0 portlist=54 medium-type=sr4 +port set property unit=0 portlist=55 medium-type=sr4 +port set property unit=0 portlist=129 medium-type=kr +port set property unit=0 portlist=130 medium-type=x +port advertise unit=0 portlist=129 speed-10g-kr +port set property unit=0 portlist=129 an=enable +port set property unit=0 portlist=0 admin=enable +port set property unit=0 portlist=1 admin=enable +port set property unit=0 portlist=2 admin=enable +port set property unit=0 portlist=3 admin=enable +port set property unit=0 portlist=4 admin=enable +port set property unit=0 portlist=5 admin=enable +port set property unit=0 portlist=6 admin=enable +port set property unit=0 portlist=7 admin=enable +port set property unit=0 portlist=8 admin=enable +port set property unit=0 portlist=9 admin=enable +port set property unit=0 portlist=10 admin=enable +port set property unit=0 portlist=11 admin=enable +port set property unit=0 portlist=12 admin=enable +port set property unit=0 portlist=13 admin=enable +port set property unit=0 portlist=14 admin=enable +port set property unit=0 portlist=15 admin=enable +port set property unit=0 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set property unit=0 portlist=36 admin=enable +port set property unit=0 portlist=37 admin=enable +port set property unit=0 portlist=38 admin=enable +port set property unit=0 portlist=39 admin=enable +port set property unit=0 portlist=40 admin=enable +port set property unit=0 portlist=41 admin=enable +port set property unit=0 portlist=42 admin=enable +port set property unit=0 portlist=43 admin=enable +port set property unit=0 portlist=44 admin=enable +port set property unit=0 portlist=45 admin=enable +port set property unit=0 portlist=46 admin=enable +port set property unit=0 portlist=47 admin=enable +port set property unit=0 portlist=48 admin=enable +port set property unit=0 portlist=49 admin=enable +port set property unit=0 portlist=50 admin=enable +port set property unit=0 portlist=51 admin=enable +port set property unit=0 portlist=52 admin=enable +port set property unit=0 portlist=53 admin=enable +port set property unit=0 portlist=54 admin=enable +port set property unit=0 portlist=55 admin=enable +port set property unit=0 portlist=129 admin=enable +port set property unit=0 portlist=130 admin=enable diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/port_config.nps.AOC.R0B b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/port_config.nps.AOC.R0B new file mode 100755 index 00000000000..857e5f1ede5 --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/port_config.nps.AOC.R0B @@ -0,0 +1,702 @@ +init start stage unit=0 low-level +init set port-map unit=0 port=0 eth-macro=2 lane=0 max-speed=25g active=true +init set port-map unit=0 port=1 eth-macro=2 lane=1 max-speed=25g active=true +init set port-map unit=0 port=2 eth-macro=2 lane=2 max-speed=25g active=true +init set port-map unit=0 port=3 eth-macro=2 lane=3 max-speed=25g active=true +init set port-map unit=0 port=4 eth-macro=3 lane=0 max-speed=25g active=true +init set port-map unit=0 port=5 eth-macro=3 lane=1 max-speed=25g active=true +init set port-map unit=0 port=6 eth-macro=3 lane=2 max-speed=25g active=true +init set port-map unit=0 port=7 eth-macro=3 lane=3 max-speed=25g active=true +init set port-map unit=0 port=8 eth-macro=4 lane=0 max-speed=25g active=true +init set port-map unit=0 port=9 eth-macro=4 lane=1 max-speed=25g active=true +init set port-map unit=0 port=10 eth-macro=4 lane=2 max-speed=25g active=true +init set port-map unit=0 port=11 eth-macro=4 lane=3 max-speed=25g active=true +init set port-map unit=0 port=12 eth-macro=5 lane=0 max-speed=25g active=true +init set port-map unit=0 port=13 eth-macro=5 lane=1 max-speed=25g active=true +init set port-map unit=0 port=14 eth-macro=5 lane=2 max-speed=25g active=true +init set port-map unit=0 port=15 eth-macro=5 lane=3 max-speed=25g active=true +init set port-map unit=0 port=16 eth-macro=8 lane=0 max-speed=25g active=true +init set port-map unit=0 port=17 eth-macro=8 lane=1 max-speed=25g active=true +init set port-map unit=0 port=18 eth-macro=8 lane=2 max-speed=25g active=true +init set port-map unit=0 port=19 eth-macro=8 lane=3 max-speed=25g active=true +init set port-map unit=0 port=20 eth-macro=10 lane=0 max-speed=25g active=true +init set port-map unit=0 port=21 eth-macro=10 lane=1 max-speed=25g active=true +init set port-map unit=0 port=22 eth-macro=10 lane=2 max-speed=25g active=true +init set port-map unit=0 port=23 eth-macro=10 lane=3 max-speed=25g active=true +init set port-map unit=0 port=24 eth-macro=12 lane=0 max-speed=25g active=true +init set port-map unit=0 port=25 eth-macro=12 lane=1 max-speed=25g active=true +init set port-map unit=0 port=26 eth-macro=12 lane=2 max-speed=25g active=true +init set port-map unit=0 port=27 eth-macro=12 lane=3 max-speed=25g active=true +init set port-map unit=0 port=28 eth-macro=14 lane=0 max-speed=25g active=true +init set port-map unit=0 port=29 eth-macro=14 lane=1 max-speed=25g active=true +init set port-map unit=0 port=30 eth-macro=14 lane=2 max-speed=25g active=true +init set port-map unit=0 port=31 eth-macro=14 lane=3 max-speed=25g active=true +init set port-map unit=0 port=32 eth-macro=16 lane=0 max-speed=25g active=true +init set port-map unit=0 port=33 eth-macro=16 lane=1 max-speed=25g active=true +init set port-map unit=0 port=34 eth-macro=16 lane=2 max-speed=25g active=true +init set port-map unit=0 port=35 eth-macro=16 lane=3 max-speed=25g active=true +init set port-map unit=0 port=36 eth-macro=17 lane=0 max-speed=25g active=true +init set port-map unit=0 port=37 eth-macro=17 lane=1 max-speed=25g active=true +init set port-map unit=0 port=38 eth-macro=17 lane=2 max-speed=25g active=true +init set port-map unit=0 port=39 eth-macro=17 lane=3 max-speed=25g active=true +init set port-map unit=0 port=40 eth-macro=18 lane=0 max-speed=25g active=true +init set port-map unit=0 port=41 eth-macro=18 lane=1 max-speed=25g active=true +init set port-map unit=0 port=42 eth-macro=18 lane=2 max-speed=25g active=true +init set port-map unit=0 port=43 eth-macro=18 lane=3 max-speed=25g active=true +init set port-map unit=0 port=44 eth-macro=19 lane=0 max-speed=25g active=true +init set port-map unit=0 port=45 eth-macro=19 lane=1 max-speed=25g active=true +init set port-map unit=0 port=46 eth-macro=19 lane=2 max-speed=25g active=true +init set port-map unit=0 port=47 eth-macro=19 lane=3 max-speed=25g active=true +init set port-map unit=0 port=48 eth-macro=21 lane=0 max-speed=100g active=true +init set port-map unit=0 port=49 eth-macro=20 lane=0 max-speed=100g active=true +init set port-map unit=0 port=50 eth-macro=23 lane=0 max-speed=100g active=true +init set port-map unit=0 port=51 eth-macro=22 lane=0 max-speed=100g active=true +init set port-map unit=0 port=52 eth-macro=27 lane=0 max-speed=100g active=true +init set port-map unit=0 port=53 eth-macro=26 lane=0 max-speed=100g active=true +init set port-map unit=0 port=54 eth-macro=29 lane=0 max-speed=100g active=true +init set port-map unit=0 port=55 eth-macro=28 lane=0 max-speed=100g active=true +init set port-map unit=0 port=129 eth-macro=0 lane=1 max-speed=10g active=true guarantee=true cpi=true +init set port-map unit=0 port=130 eth-macro=0 lane=0 max-speed=10g active=true guarantee=true cpi=true init-done=true +init start stage unit=0 task-rsrc +init start stage unit=0 module +init start stage unit=0 task +phy set lane-swap unit=0 portlist=0 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=1 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=2 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=3 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=4 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=5 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=6 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=7 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=8 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=9 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=10 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=11 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=12 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=13 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=14 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=15 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=16 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=17 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=18 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=19 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=20 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=21 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=22 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=23 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=24 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=25 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=26 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=27 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=28 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=29 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=30 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=31 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=32 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=33 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=34 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=35 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=36 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=37 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=38 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=39 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=40 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=41 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=42 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=43 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=44 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=45 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=46 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=47 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=48 lane-cnt=4 property=tx data=0x3.0.1.2 +phy set lane-swap unit=0 portlist=49 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=50 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap unit=0 portlist=51 lane-cnt=4 property=tx data=0x3.2.0.1 +phy set lane-swap unit=0 portlist=52 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=53 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=54 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=55 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=129 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=130 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=0 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=1 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=2 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=3 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=4 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=5 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=6 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=7 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=8 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=9 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=10 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=11 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=12 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=13 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=14 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=15 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=16 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=17 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=18 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=19 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=20 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=21 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=22 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=23 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=24 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=25 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=26 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=27 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=28 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=29 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=30 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=31 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=32 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=33 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=34 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=35 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=36 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=37 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=38 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=39 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=40 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=41 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=42 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=43 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=44 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=45 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=46 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=47 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=48 lane-cnt=4 property=rx data=0x3.1.0.2 +phy set lane-swap unit=0 portlist=49 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=50 lane-cnt=4 property=rx data=0x3.0.1.2 +phy set lane-swap unit=0 portlist=51 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=52 lane-cnt=4 property=rx data=0x1.0.3.2 +phy set lane-swap unit=0 portlist=53 lane-cnt=4 property=rx data=0x2.0.1.3 +phy set lane-swap unit=0 portlist=54 lane-cnt=4 property=rx data=0x1.0.3.2 +phy set lane-swap unit=0 portlist=55 lane-cnt=4 property=rx data=0x1.0.3.2 +phy set lane-swap unit=0 portlist=129 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=130 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=0 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=1 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=2 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=3 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=4 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=5 lane-cnt=1 property=tx data=0x1 +phy set polarity-rev unit=0 portlist=6 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=7 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=8 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=9 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=10 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=11 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=12 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=13 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=14 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=15 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=16 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=17 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=18 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=19 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=20 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=21 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=22 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=23 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=24 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=25 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=26 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=27 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=28 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=29 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=30 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=31 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=32 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=33 lane-cnt=1 property=tx data=0x0 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property=tx data=0x0 +phy set polarity-rev unit=0 portlist=48 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=49 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=50 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=51 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=52 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=53 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=54 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=55 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=129 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=130 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=0 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=1 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=2 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=3 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=4 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=5 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=6 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=7 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=8 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=9 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=10 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=11 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=12 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=13 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=14 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=15 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=16 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=17 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=18 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=19 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=20 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=21 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=22 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=23 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=24 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=25 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=26 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=27 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=28 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=29 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=30 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=31 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=32 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=33 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=34 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=35 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=36 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=37 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=38 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=39 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=40 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=41 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=42 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=43 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=44 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=45 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=46 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=47 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=48 lane-cnt=4 property=rx data=0x0.1.1.0 +phy set polarity-rev unit=0 portlist=49 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=50 lane-cnt=4 property=rx data=0x1.1.1.1 +phy set polarity-rev unit=0 portlist=51 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=52 lane-cnt=4 property=rx data=0x1.1.1.0 +phy set polarity-rev unit=0 portlist=53 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=54 lane-cnt=4 property=rx data=0x1.1.1.0 +phy set polarity-rev unit=0 portlist=55 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=129 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=130 lane-cnt=1 property=rx data=0x0 +phy set pre-emphasis unit=0 portlist=0 lane-cnt=1 property=c2 data=0x2 +phy set pre-emphasis unit=0 portlist=0 lane-cnt=1 property=cn1 data=0x1 +phy set pre-emphasis unit=0 portlist=0 lane-cnt=1 property=c0 data=0x1a +phy set pre-emphasis unit=0 portlist=0 lane-cnt=1 property=c1 data=0x7 +phy set pre-emphasis unit=0 portlist=1 lane-cnt=1 property=c2 data=0x2 +phy set pre-emphasis unit=0 portlist=1 lane-cnt=1 property=cn1 data=0x1 +phy set pre-emphasis unit=0 portlist=1 lane-cnt=1 property=c0 data=0x1a +phy set pre-emphasis unit=0 portlist=1 lane-cnt=1 property=c1 data=0x7 +phy set pre-emphasis unit=0 portlist=2 lane-cnt=1 property=c2 data=0x2 +phy set pre-emphasis unit=0 portlist=2 lane-cnt=1 property=cn1 data=0x1 +phy set pre-emphasis unit=0 portlist=2 lane-cnt=1 property=c0 data=0x1a +phy set pre-emphasis unit=0 portlist=2 lane-cnt=1 property=c1 data=0x7 +phy set pre-emphasis unit=0 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unit=0 portlist=54 speed=100g +port set property unit=0 portlist=55 speed=100g +port set property unit=0 portlist=129 speed=10g +port set property unit=0 portlist=130 speed=1g +port set property unit=0 portlist=0 medium-type=sr +port set property unit=0 portlist=1 medium-type=sr +port set property unit=0 portlist=2 medium-type=sr +port set property unit=0 portlist=3 medium-type=sr +port set property unit=0 portlist=4 medium-type=sr +port set property unit=0 portlist=5 medium-type=sr +port set property unit=0 portlist=6 medium-type=sr +port set property unit=0 portlist=7 medium-type=sr +port set property unit=0 portlist=8 medium-type=sr +port set property unit=0 portlist=9 medium-type=sr +port set property unit=0 portlist=10 medium-type=sr +port set property unit=0 portlist=11 medium-type=sr +port set property unit=0 portlist=12 medium-type=sr +port set property unit=0 portlist=13 medium-type=sr +port set property unit=0 portlist=14 medium-type=sr +port set property unit=0 portlist=15 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portlist=34 medium-type=sr +port set property unit=0 portlist=35 medium-type=sr +port set property unit=0 portlist=36 medium-type=sr +port set property unit=0 portlist=37 medium-type=sr +port set property unit=0 portlist=38 medium-type=sr +port set property unit=0 portlist=39 medium-type=sr +port set property unit=0 portlist=40 medium-type=sr +port set property unit=0 portlist=41 medium-type=sr +port set property unit=0 portlist=42 medium-type=sr +port set property unit=0 portlist=43 medium-type=sr +port set property unit=0 portlist=44 medium-type=sr +port set property unit=0 portlist=45 medium-type=sr +port set property unit=0 portlist=46 medium-type=sr +port set property unit=0 portlist=47 medium-type=sr +port set property unit=0 portlist=48 medium-type=sr4 +port set property unit=0 portlist=49 medium-type=sr4 +port set property unit=0 portlist=50 medium-type=sr4 +port set property unit=0 portlist=51 medium-type=sr4 +port set property unit=0 portlist=52 medium-type=sr4 +port set property unit=0 portlist=53 medium-type=sr4 +port set property unit=0 portlist=54 medium-type=sr4 +port set property unit=0 portlist=55 medium-type=sr4 +port set property unit=0 portlist=129 medium-type=kr +port set property unit=0 portlist=130 medium-type=x +port advertise unit=0 portlist=129 speed-10g-kr +port set property unit=0 portlist=129 an=enable +port set property unit=0 portlist=0 admin=enable +port set property unit=0 portlist=1 admin=enable +port set property unit=0 portlist=2 admin=enable +port set property unit=0 portlist=3 admin=enable +port set property unit=0 portlist=4 admin=enable +port set property unit=0 portlist=5 admin=enable +port set property unit=0 portlist=6 admin=enable +port set property unit=0 portlist=7 admin=enable +port set property unit=0 portlist=8 admin=enable +port set property unit=0 portlist=9 admin=enable +port set property unit=0 portlist=10 admin=enable +port set property unit=0 portlist=11 admin=enable +port set property unit=0 portlist=12 admin=enable +port set property unit=0 portlist=13 admin=enable +port set property unit=0 portlist=14 admin=enable +port set property unit=0 portlist=15 admin=enable +port set property unit=0 portlist=16 admin=enable +port set property unit=0 portlist=17 admin=enable +port set property unit=0 portlist=18 admin=enable +port set property unit=0 portlist=19 admin=enable +port set property unit=0 portlist=20 admin=enable +port set property unit=0 portlist=21 admin=enable +port set property unit=0 portlist=22 admin=enable +port set property unit=0 portlist=23 admin=enable +port set property unit=0 portlist=24 admin=enable +port set property unit=0 portlist=25 admin=enable +port set property unit=0 portlist=26 admin=enable +port set property unit=0 portlist=27 admin=enable +port set property unit=0 portlist=28 admin=enable +port set property unit=0 portlist=29 admin=enable +port set property unit=0 portlist=30 admin=enable +port set property unit=0 portlist=31 admin=enable +port set property unit=0 portlist=32 admin=enable +port set property unit=0 portlist=33 admin=enable +port set property unit=0 portlist=34 admin=enable +port set property unit=0 portlist=35 admin=enable +port set property unit=0 portlist=36 admin=enable +port set property unit=0 portlist=37 admin=enable +port set property unit=0 portlist=38 admin=enable +port set property unit=0 portlist=39 admin=enable +port set property unit=0 portlist=40 admin=enable +port set property unit=0 portlist=41 admin=enable +port set property unit=0 portlist=42 admin=enable +port set property unit=0 portlist=43 admin=enable +port set property unit=0 portlist=44 admin=enable +port set property unit=0 portlist=45 admin=enable +port set property unit=0 portlist=46 admin=enable +port set property unit=0 portlist=47 admin=enable +port set property unit=0 portlist=48 admin=enable +port set property unit=0 portlist=49 admin=enable +port set property unit=0 portlist=50 admin=enable +port set property unit=0 portlist=51 admin=enable +port set property unit=0 portlist=52 admin=enable +port set property unit=0 portlist=53 admin=enable +port set property unit=0 portlist=54 admin=enable +port set property unit=0 portlist=55 admin=enable +port set property unit=0 portlist=129 admin=enable +port set property unit=0 portlist=130 admin=enable diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/port_config.nps.DAC.R0B b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/port_config.nps.DAC.R0B new file mode 100755 index 00000000000..857e5f1ede5 --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/port_config.nps.DAC.R0B @@ -0,0 +1,702 @@ +init start stage unit=0 low-level +init set port-map unit=0 port=0 eth-macro=2 lane=0 max-speed=25g active=true +init set port-map unit=0 port=1 eth-macro=2 lane=1 max-speed=25g active=true +init set port-map unit=0 port=2 eth-macro=2 lane=2 max-speed=25g active=true +init set port-map unit=0 port=3 eth-macro=2 lane=3 max-speed=25g active=true +init set port-map unit=0 port=4 eth-macro=3 lane=0 max-speed=25g active=true +init set port-map unit=0 port=5 eth-macro=3 lane=1 max-speed=25g active=true +init set port-map unit=0 port=6 eth-macro=3 lane=2 max-speed=25g active=true +init set port-map unit=0 port=7 eth-macro=3 lane=3 max-speed=25g active=true +init set port-map unit=0 port=8 eth-macro=4 lane=0 max-speed=25g active=true +init set port-map unit=0 port=9 eth-macro=4 lane=1 max-speed=25g active=true +init set port-map unit=0 port=10 eth-macro=4 lane=2 max-speed=25g active=true +init set port-map unit=0 port=11 eth-macro=4 lane=3 max-speed=25g active=true +init set port-map unit=0 port=12 eth-macro=5 lane=0 max-speed=25g active=true +init set port-map unit=0 port=13 eth-macro=5 lane=1 max-speed=25g active=true +init set port-map unit=0 port=14 eth-macro=5 lane=2 max-speed=25g active=true +init set port-map unit=0 port=15 eth-macro=5 lane=3 max-speed=25g active=true +init set port-map unit=0 port=16 eth-macro=8 lane=0 max-speed=25g active=true +init set port-map unit=0 port=17 eth-macro=8 lane=1 max-speed=25g active=true +init set port-map unit=0 port=18 eth-macro=8 lane=2 max-speed=25g active=true +init set port-map unit=0 port=19 eth-macro=8 lane=3 max-speed=25g active=true +init set port-map unit=0 port=20 eth-macro=10 lane=0 max-speed=25g active=true +init set port-map unit=0 port=21 eth-macro=10 lane=1 max-speed=25g active=true +init set port-map unit=0 port=22 eth-macro=10 lane=2 max-speed=25g active=true +init set port-map unit=0 port=23 eth-macro=10 lane=3 max-speed=25g active=true +init set port-map unit=0 port=24 eth-macro=12 lane=0 max-speed=25g active=true +init set port-map unit=0 port=25 eth-macro=12 lane=1 max-speed=25g active=true +init set port-map unit=0 port=26 eth-macro=12 lane=2 max-speed=25g active=true +init set port-map unit=0 port=27 eth-macro=12 lane=3 max-speed=25g active=true +init set port-map unit=0 port=28 eth-macro=14 lane=0 max-speed=25g active=true +init set port-map unit=0 port=29 eth-macro=14 lane=1 max-speed=25g active=true +init set port-map unit=0 port=30 eth-macro=14 lane=2 max-speed=25g active=true +init set port-map unit=0 port=31 eth-macro=14 lane=3 max-speed=25g active=true +init set port-map unit=0 port=32 eth-macro=16 lane=0 max-speed=25g active=true +init set port-map unit=0 port=33 eth-macro=16 lane=1 max-speed=25g active=true +init set port-map unit=0 port=34 eth-macro=16 lane=2 max-speed=25g active=true +init set port-map unit=0 port=35 eth-macro=16 lane=3 max-speed=25g active=true +init set port-map unit=0 port=36 eth-macro=17 lane=0 max-speed=25g active=true +init set port-map unit=0 port=37 eth-macro=17 lane=1 max-speed=25g active=true +init set port-map unit=0 port=38 eth-macro=17 lane=2 max-speed=25g active=true +init set port-map unit=0 port=39 eth-macro=17 lane=3 max-speed=25g active=true +init set port-map unit=0 port=40 eth-macro=18 lane=0 max-speed=25g active=true +init set port-map unit=0 port=41 eth-macro=18 lane=1 max-speed=25g active=true +init set port-map unit=0 port=42 eth-macro=18 lane=2 max-speed=25g active=true +init set port-map unit=0 port=43 eth-macro=18 lane=3 max-speed=25g active=true +init set port-map unit=0 port=44 eth-macro=19 lane=0 max-speed=25g active=true +init set port-map unit=0 port=45 eth-macro=19 lane=1 max-speed=25g active=true +init set port-map unit=0 port=46 eth-macro=19 lane=2 max-speed=25g active=true +init set port-map unit=0 port=47 eth-macro=19 lane=3 max-speed=25g active=true +init set port-map unit=0 port=48 eth-macro=21 lane=0 max-speed=100g active=true +init set port-map unit=0 port=49 eth-macro=20 lane=0 max-speed=100g active=true +init set port-map unit=0 port=50 eth-macro=23 lane=0 max-speed=100g active=true +init set port-map unit=0 port=51 eth-macro=22 lane=0 max-speed=100g active=true +init set port-map unit=0 port=52 eth-macro=27 lane=0 max-speed=100g active=true +init set port-map unit=0 port=53 eth-macro=26 lane=0 max-speed=100g active=true +init set port-map unit=0 port=54 eth-macro=29 lane=0 max-speed=100g active=true +init set port-map unit=0 port=55 eth-macro=28 lane=0 max-speed=100g active=true +init set port-map unit=0 port=129 eth-macro=0 lane=1 max-speed=10g active=true guarantee=true cpi=true +init set port-map unit=0 port=130 eth-macro=0 lane=0 max-speed=10g active=true guarantee=true cpi=true init-done=true +init start stage unit=0 task-rsrc +init start stage unit=0 module +init start stage unit=0 task +phy set lane-swap unit=0 portlist=0 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=1 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=2 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=3 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=4 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=5 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=6 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=7 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=8 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=9 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=10 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=11 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=12 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=13 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=14 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=15 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=16 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=17 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=18 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=19 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=20 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=21 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=22 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=23 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=24 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=25 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=26 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=27 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=28 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=29 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=30 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=31 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=32 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=33 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=34 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=35 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=36 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=37 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=38 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=39 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=40 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=41 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=42 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=43 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=44 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=45 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=46 lane-cnt=1 property=tx data=0x2 +phy set lane-swap unit=0 portlist=47 lane-cnt=1 property=tx data=0x3 +phy set lane-swap unit=0 portlist=48 lane-cnt=4 property=tx data=0x3.0.1.2 +phy set lane-swap unit=0 portlist=49 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=50 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap unit=0 portlist=51 lane-cnt=4 property=tx data=0x3.2.0.1 +phy set lane-swap unit=0 portlist=52 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=53 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=54 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=55 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=129 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=130 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=0 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=1 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=2 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=3 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=4 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=5 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=6 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=7 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=8 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=9 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=10 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=11 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=12 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=13 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=14 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=15 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=16 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=17 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=18 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=19 lane-cnt=1 property=rx data=0x1 +phy set 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portlist=34 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=35 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=36 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=37 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=38 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=39 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=40 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=41 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=42 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=43 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=44 lane-cnt=1 property=rx data=0x2 +phy set lane-swap unit=0 portlist=45 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=46 lane-cnt=1 property=rx data=0x0 +phy set lane-swap unit=0 portlist=47 lane-cnt=1 property=rx data=0x3 +phy set lane-swap unit=0 portlist=48 lane-cnt=4 property=rx data=0x3.1.0.2 +phy set lane-swap unit=0 portlist=49 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=50 lane-cnt=4 property=rx data=0x3.0.1.2 +phy set lane-swap unit=0 portlist=51 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap unit=0 portlist=52 lane-cnt=4 property=rx data=0x1.0.3.2 +phy set lane-swap unit=0 portlist=53 lane-cnt=4 property=rx data=0x2.0.1.3 +phy set lane-swap unit=0 portlist=54 lane-cnt=4 property=rx data=0x1.0.3.2 +phy set lane-swap unit=0 portlist=55 lane-cnt=4 property=rx data=0x1.0.3.2 +phy set lane-swap unit=0 portlist=129 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=130 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=0 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=1 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=2 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=3 lane-cnt=1 property=tx data=0x0 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property=tx data=0x0 +phy set polarity-rev unit=0 portlist=18 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=19 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=20 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=21 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=22 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=23 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=24 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=25 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=26 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=27 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=28 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=29 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=30 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 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set polarity-rev unit=0 portlist=45 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=46 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=47 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=48 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=49 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=50 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=51 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=52 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=53 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=54 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=55 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=129 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=130 lane-cnt=1 property=tx data=0x0 +phy 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portlist=48 admin=enable +port set property unit=0 portlist=49 admin=enable +port set property unit=0 portlist=50 admin=enable +port set property unit=0 portlist=51 admin=enable +port set property unit=0 portlist=52 admin=enable +port set property unit=0 portlist=53 admin=enable +port set property unit=0 portlist=54 admin=enable +port set property unit=0 portlist=55 admin=enable +port set property unit=0 portlist=129 admin=enable +port set property unit=0 portlist=130 admin=enable diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/qos.json.j2 b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/qos.json.j2 new file mode 100755 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/sai.profile b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/sai.profile new file mode 100755 index 00000000000..880f47910ac --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/Cig-CS6436-56P/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/platform/led_proc_init.nps +SAI_DSH_CONFIG_FILE=/usr/share/sonic/hwsku/port_config.nps diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/default_sku b/device/cig/x86_64-cig_cs6436_56p-r0/default_sku new file mode 100755 index 00000000000..77eed778107 --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/default_sku @@ -0,0 +1 @@ +Cig-CS6436-56P t1 diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/installer.conf b/device/cig/x86_64-cig_cs6436_56p-r0/installer.conf new file mode 100755 index 00000000000..01b63913811 --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3e8 +CONSOLE_DEV=2 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pci=noaer" diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/led_proc_init.nps b/device/cig/x86_64-cig_cs6436_56p-r0/led_proc_init.nps new file mode 100755 index 00000000000..3ba2f35e551 --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/led_proc_init.nps @@ -0,0 +1,10 @@ +#unit NPS_CFG_TYPE_XXX param0 param1 value +#---- ---------------- ------ ------ ----- +0 NPS_CFG_TYPE_USE_UNIT_PORT 0 0 1 +0 NPS_CFG_TYPE_LED_CFG 0 0 7 +0 NPS_CFG_TYPE_CPI_PORT_MODE 129 0 1 +0 NPS_CFG_TYPE_CPI_PORT_MODE 130 0 1 +0 NPS_CFG_TYPE_USER_BUF_CTRL 0 0 1 +0 NPS_CFG_TYPE_HASH_L2_FDB_REGION_ENTRY_NUM 0 0 49152 +0 NPS_CFG_TYPE_HASH_L3_WITH_IPV6_PREFIX_64_REGION_ENTRY_NUM 0 0 32768 + diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/plugins/eeprom.py b/device/cig/x86_64-cig_cs6436_56p-r0/plugins/eeprom.py new file mode 100755 index 00000000000..5019b9c40a9 --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/7-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/plugins/psuutil.py b/device/cig/x86_64-cig_cs6436_56p-r0/plugins/psuutil.py new file mode 100755 index 00000000000..137531c36e1 --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/plugins/psuutil.py @@ -0,0 +1,92 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + SYSFS_PSU_DIR = ["/sys/bus/i2c/devices/5-005a", + "/sys/bus/i2c/devices/5-005b"] + + def __init__(self): + PsuBase.__init__(self) + + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psu_power_good' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU status + if (attr_value == 1): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + attr_file ='psu_present' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU presence + if (attr_value == 1): + status = 1 + + return status + diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/plugins/sfputil.py b/device/cig/x86_64-cig_cs6436_56p-r0/plugins/sfputil.py new file mode 100755 index 00000000000..f5fe6c93142 --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/plugins/sfputil.py @@ -0,0 +1,160 @@ +#!/usr/bin/env python + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class SfpUtil(SfpUtilBase): + """Platform specific SfpUtill class""" + + _port_start = 0 + _port_end = 55 + _qsfp_port_start = 48 + _ports_in_block = 55 + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 0 : 8, + 1 : 9, + 2 : 10, + 3 : 11, + 4 : 12, + 5 : 13, + 6 : 14, + 7 : 15, + 8 : 16, + 9 : 17, + 10 : 18, + 11 : 19, + 12 : 20, + 13 : 21, + 14 : 22, + 15 : 23, + 16 : 24, + 17 : 25, + 18 : 26, + 19 : 27, + 20 : 28, + 21 : 29, + 22 : 30, + 23 : 31, + 24 : 32, + 25 : 33, + 26 : 34, + 27 : 35, + 28 : 36, + 29 : 37, + 30 : 38, + 31 : 39, + 32 : 40, + 33 : 41, + 34 : 42, + 35 : 43, + 36 : 44, + 37 : 45, + 38 : 46, + 39 : 47, + 40 : 48, + 41 : 49, + 42 : 50, + 43 : 51, + 44 : 52, + 45 : 53, + 46 : 54, + 47 : 55, + 48 : 56, + 49 : 57, + 50 : 58, + 51 : 59, + 52 : 60, + 53 : 61, + 54 : 62, + 55 : 63, + } + + _qsfp_ports = range(_qsfp_port_start, _ports_in_block + 1) + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/sfp_eeprom' + for x in range(self._port_start, self._port_end + 1): + port_eeprom_path = eeprom_path.format(self._port_to_i2c_mapping[x]) + self._port_to_eeprom_mapping[x] = port_eeprom_path + + SfpUtilBase.__init__(self) + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + path = "/sys/bus/i2c/devices/{0}-0050/sfp_port_reset" + port_ps = path.format(self._port_to_i2c_mapping[port_num]) + + try: + reg_file = open(port_ps, 'w') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #toggle reset + reg_file.seek(0) + reg_file.write('1') + time.sleep(1) + reg_file.seek(0) + reg_file.write('0') + reg_file.close() + return True + + def set_low_power_mode(self, port_nuM, lpmode): + raise NotImplementedError + + def get_low_power_mode(self, port_num): + raise NotImplementedError + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + path = "/sys/bus/i2c/devices/{0}-0050/sfp_is_present" + port_ps = path.format(self._port_to_i2c_mapping[port_num]) + + + try: + reg_file = open(port_ps) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if reg_value == '1': + return True + + return False + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError + + @property + def port_start(self): + return self._port_start + + @property + def port_end(self): + return self._port_end + + @property + def qsfp_ports(self): + return self._qsfp_ports + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping diff --git a/device/cig/x86_64-cig_cs6436_56p-r0/sensors.conf b/device/cig/x86_64-cig_cs6436_56p-r0/sensors.conf new file mode 100755 index 00000000000..565186de280 --- /dev/null +++ b/device/cig/x86_64-cig_cs6436_56p-r0/sensors.conf @@ -0,0 +1,13 @@ +# libsensors configuration file + +chip "cs6436_56p_fan-*" + label fan1 "front fan 1" + label fan2 "front fan 2" + label fan3 "front fan 3" + label fan4 "front fan 4" + label fan5 "front fan 5" + label fan6 "rear fan 1" + label fan7 "rear fan 2" + label fan8 "rear fan 3" + label fan9 "rear fan 4" + label fan10 "rear fan 5" diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000-Q32 b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000-Q32 new file mode 120000 index 00000000000..175db8c1539 --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000-Q32 @@ -0,0 +1 @@ +Force10-S6000 \ No newline at end of file diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/buffers.json.j2 b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/buffers.json.j2 new file mode 100644 index 00000000000..b67cf577ab7 --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/buffers_defaults_def.j2 b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/buffers_defaults_def.j2 new file mode 100644 index 00000000000..38e34eb571e --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/buffers_defaults_def.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/buffers_defaults_t0.j2 b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..38e34eb571e --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/buffers_defaults_t0.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/buffers_defaults_t1.j2 b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..38e34eb571e --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/buffers_defaults_t1.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/pg_profile_lookup.ini b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/pg_profile_lookup.ini new file mode 100644 index 00000000000..9f2eacb6fc4 --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 56368 18432 55120 -3 2496 + 25000 5m 56368 18432 55120 -3 2496 + 40000 5m 56368 18432 55120 -3 2496 + 50000 5m 56368 18432 55120 -3 2496 + 100000 5m 56368 18432 55120 -3 2496 + 10000 40m 56368 18432 55120 -3 2496 + 25000 40m 56368 18432 55120 -3 2496 + 40000 40m 56368 18432 55120 -3 2496 + 50000 40m 56368 18432 55120 -3 2496 + 100000 40m 56368 18432 55120 -3 2496 + 10000 300m 56368 18432 55120 -3 2496 + 25000 300m 56368 18432 55120 -3 2496 + 40000 300m 56368 18432 55120 -3 2496 + 50000 300m 56368 18432 55120 -3 2496 + 100000 300m 56368 18432 55120 -3 2496 diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/port_config.ini b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/port_config.ini new file mode 100644 index 00000000000..95cf5eec9e4 --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 25,26,27,28 fortyGigE0/0 0 40000 +Ethernet4 29,30,31,32 fortyGigE0/4 1 40000 +Ethernet8 33,34,35,36 fortyGigE0/8 2 40000 +Ethernet12 37,38,39,40 fortyGigE0/12 3 40000 +Ethernet16 45,46,47,48 fortyGigE0/16 4 40000 +Ethernet20 41,42,43,44 fortyGigE0/20 5 40000 +Ethernet24 1,2,3,4 fortyGigE0/24 6 40000 +Ethernet28 5,6,7,8 fortyGigE0/28 7 40000 +Ethernet32 13,14,15,16 fortyGigE0/32 8 40000 +Ethernet36 9,10,11,12 fortyGigE0/36 9 40000 +Ethernet40 17,18,19,20 fortyGigE0/40 10 40000 +Ethernet44 21,22,23,24 fortyGigE0/44 11 40000 +Ethernet48 53,54,55,56 fortyGigE0/48 12 40000 +Ethernet52 49,50,51,52 fortyGigE0/52 13 40000 +Ethernet56 57,58,59,60 fortyGigE0/56 14 40000 +Ethernet60 61,62,63,64 fortyGigE0/60 15 40000 +Ethernet64 69,70,71,72 fortyGigE0/64 16 40000 +Ethernet68 65,66,67,68 fortyGigE0/68 17 40000 +Ethernet72 73,74,75,76 fortyGigE0/72 18 40000 +Ethernet76 77,78,79,80 fortyGigE0/76 19 40000 +Ethernet80 109,110,111,112 fortyGigE0/80 20 40000 +Ethernet84 105,106,107,108 fortyGigE0/84 21 40000 +Ethernet88 113,114,115,116 fortyGigE0/88 22 40000 +Ethernet92 117,118,119,120 fortyGigE0/92 23 40000 +Ethernet96 125,126,127,128 fortyGigE0/96 24 40000 +Ethernet100 121,122,123,124 fortyGigE0/100 25 40000 +Ethernet104 81,82,83,84 fortyGigE0/104 26 40000 +Ethernet108 85,86,87,88 fortyGigE0/108 27 40000 +Ethernet112 93,94,95,96 fortyGigE0/112 28 40000 +Ethernet116 89,90,91,92 fortyGigE0/116 29 40000 +Ethernet120 101,102,103,104 fortyGigE0/120 30 40000 +Ethernet124 97,98,99,100 fortyGigE0/124 31 40000 diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/qos.json.j2 b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/sai.profile b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/sai.profile new file mode 100644 index 00000000000..52e2e289af6 --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-s6000-32x40G.config.bcm +SAI_NUM_ECMP_MEMBERS=32 diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/td2-s6000-32x40G.config.bcm b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/td2-s6000-32x40G.config.bcm new file mode 100644 index 00000000000..4c94db7107c --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/td2-s6000-32x40G.config.bcm @@ -0,0 +1,646 @@ +# Old LPM only configuration +# l2_mem_entries=163840 +# l3_mem_entries=90112 +# l3_alpm_enable=0 +# ipv6_lpm_128b_enable=0 +# +# ALPM enable +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 +l2_mem_entries=32768 +l3_mem_entries=16384 + +# From old config file +os=unix +higig2_hdr_mode=1 + +# Parity +parity_correction=1 +parity_enable=1 +stat_if_parity_enable=0 + +# +bcm_num_cos=8 +bcm_stat_interval=2000000 +l2xmsg_hostbuf_size=8192 +l2xmsg_mode=1 +lls_num_l2uc=12 +max_vp_lags=0 +miim_intr_enable=0 +mmu_lossless=0 +module_64ports=0 +schan_intr_enable=0 +stable_size=0x2000000 +tdma_timeout_usec=5000000 + +pbmp_oversubscribe=0x000007fffffffffffffffffffffffffe +pbmp_xport_xe=0x000007fffffffffffffffffffffffffe + +# Ports configuration +# xe0 (40G) +portmap_1=25:40 +xgxs_rx_lane_map_1=0x213 +xgxs_tx_lane_map_1=0x2031 +phy_xaui_rx_polarity_flip_1=0xe +phy_xaui_tx_polarity_flip_1=0x2 +serdes_driver_current_lane0_xe0=0x5 +serdes_driver_current_lane1_xe0=0x5 +serdes_driver_current_lane2_xe0=0x5 +serdes_driver_current_lane3_xe0=0x5 +serdes_pre_driver_current_lane0_xe0=0x5 +serdes_pre_driver_current_lane1_xe0=0x5 +serdes_pre_driver_current_lane2_xe0=0x5 +serdes_pre_driver_current_lane3_xe0=0x5 +serdes_preemphasis_lane0_xe0=0xcad0 +serdes_preemphasis_lane1_xe0=0xc6e0 +serdes_preemphasis_lane2_xe0=0xc6e0 +serdes_preemphasis_lane3_xe0=0xd2b0 + +# xe1 (40G) +portmap_2=29:40 +xgxs_rx_lane_map_2=0x213 +xgxs_tx_lane_map_2=0x213 +phy_xaui_rx_polarity_flip_2=0xc +phy_xaui_tx_polarity_flip_2=0x9 +serdes_driver_current_lane0_xe1=0x6 +serdes_driver_current_lane1_xe1=0x7 +serdes_driver_current_lane2_xe1=0x6 +serdes_driver_current_lane3_xe1=0x6 +serdes_pre_driver_current_lane0_xe1=0x6 +serdes_pre_driver_current_lane1_xe1=0x7 +serdes_pre_driver_current_lane2_xe1=0x6 +serdes_pre_driver_current_lane3_xe1=0x6 +serdes_preemphasis_lane0_xe1=0xc2f0 +serdes_preemphasis_lane1_xe1=0xd2b0 +serdes_preemphasis_lane2_xe1=0xc6e0 +serdes_preemphasis_lane3_xe1=0xc2f0 + +# xe2 (40G) +portmap_3=33:40 +xgxs_rx_lane_map_3=0x213 +xgxs_tx_lane_map_3=0x132 +phy_xaui_rx_polarity_flip_3=0xe +phy_xaui_tx_polarity_flip_3=0x2 +serdes_driver_current_lane0_xe2=0x4 +serdes_driver_current_lane1_xe2=0x4 +serdes_driver_current_lane2_xe2=0x4 +serdes_driver_current_lane3_xe2=0x4 +serdes_pre_driver_current_lane0_xe2=0x4 +serdes_pre_driver_current_lane1_xe2=0x4 +serdes_pre_driver_current_lane2_xe2=0x4 +serdes_pre_driver_current_lane3_xe2=0x4 +serdes_preemphasis_lane0_xe2=0xc6e0 +serdes_preemphasis_lane1_xe2=0xc6e0 +serdes_preemphasis_lane2_xe2=0xc6e0 +serdes_preemphasis_lane3_xe2=0xc6e0 + +# xe3 (40G) +portmap_4=37:40 +xgxs_rx_lane_map_4=0x213 +xgxs_tx_lane_map_4=0x1203 +phy_xaui_rx_polarity_flip_4=0x3 +phy_xaui_tx_polarity_flip_4=0xe +serdes_driver_current_lane0_xe3=0x4 +serdes_driver_current_lane1_xe3=0x4 +serdes_driver_current_lane2_xe3=0x4 +serdes_driver_current_lane3_xe3=0x4 +serdes_pre_driver_current_lane0_xe3=0x4 +serdes_pre_driver_current_lane1_xe3=0x4 +serdes_pre_driver_current_lane2_xe3=0x4 +serdes_pre_driver_current_lane3_xe3=0x4 +serdes_preemphasis_lane0_xe3=0xcad0 +serdes_preemphasis_lane1_xe3=0xcad0 +serdes_preemphasis_lane2_xe3=0xc2f0 +serdes_preemphasis_lane3_xe3=0xc2f0 + +# xe4 (40G) +portmap_5=45:40 +xgxs_rx_lane_map_5=0x213 +xgxs_tx_lane_map_5=0x213 +phy_xaui_rx_polarity_flip_5=0xe +phy_xaui_tx_polarity_flip_5=0x8 +serdes_driver_current_lane0_xe4=0x4 +serdes_driver_current_lane1_xe4=0x4 +serdes_driver_current_lane2_xe4=0x4 +serdes_driver_current_lane3_xe4=0x4 +serdes_pre_driver_current_lane0_xe4=0x4 +serdes_pre_driver_current_lane1_xe4=0x4 +serdes_pre_driver_current_lane2_xe4=0x4 +serdes_pre_driver_current_lane3_xe4=0x4 +serdes_preemphasis_lane0_xe4=0xc2f0 +serdes_preemphasis_lane1_xe4=0xc2f0 +serdes_preemphasis_lane2_xe4=0xc2f0 +serdes_preemphasis_lane3_xe4=0xc2f0 + +# xe5 (40G) +portmap_6=41:40 +xgxs_rx_lane_map_6=0x213 +xgxs_tx_lane_map_6=0x3021 +phy_xaui_rx_polarity_flip_6=0x3 +phy_xaui_tx_polarity_flip_6=0xb +serdes_driver_current_lane0_xe5=0x4 +serdes_driver_current_lane1_xe5=0x4 +serdes_driver_current_lane2_xe5=0x4 +serdes_driver_current_lane3_xe5=0x4 +serdes_pre_driver_current_lane0_xe5=0x4 +serdes_pre_driver_current_lane1_xe5=0x4 +serdes_pre_driver_current_lane2_xe5=0x4 +serdes_pre_driver_current_lane3_xe5=0x4 +serdes_preemphasis_lane0_xe5=0xc6e0 +serdes_preemphasis_lane1_xe5=0xc2f0 +serdes_preemphasis_lane2_xe5=0xc2f0 +serdes_preemphasis_lane3_xe5=0xcad0 + +# xe6 (40G) +portmap_7=1:40 +xgxs_rx_lane_map_7=0x213 +xgxs_tx_lane_map_7=0x2031 +phy_xaui_rx_polarity_flip_7=0xe +phy_xaui_tx_polarity_flip_7=0xd +serdes_driver_current_lane0_xe6=0x5 +serdes_driver_current_lane1_xe6=0x5 +serdes_driver_current_lane2_xe6=0x5 +serdes_driver_current_lane3_xe6=0x5 +serdes_pre_driver_current_lane0_xe6=0x5 +serdes_pre_driver_current_lane1_xe6=0x5 +serdes_pre_driver_current_lane2_xe6=0x5 +serdes_pre_driver_current_lane3_xe6=0x5 +serdes_preemphasis_lane0_xe6=0xc6e0 +serdes_preemphasis_lane1_xe6=0xcad0 +serdes_preemphasis_lane2_xe6=0xc6e0 +serdes_preemphasis_lane3_xe6=0xcad0 + +# xe7 (40G) +portmap_8=5:40 +xgxs_rx_lane_map_8=0x213 +xgxs_tx_lane_map_8=0x1203 +phy_xaui_rx_polarity_flip_8=0xc +phy_xaui_tx_polarity_flip_8=0x1 +serdes_driver_current_lane0_xe7=0x4 +serdes_driver_current_lane1_xe7=0x4 +serdes_driver_current_lane2_xe7=0x4 +serdes_driver_current_lane3_xe7=0x4 +serdes_pre_driver_current_lane0_xe7=0x4 +serdes_pre_driver_current_lane1_xe7=0x4 +serdes_pre_driver_current_lane2_xe7=0x4 +serdes_pre_driver_current_lane3_xe7=0x4 +serdes_preemphasis_lane0_xe7=0xc6e0 +serdes_preemphasis_lane1_xe7=0xc6e0 +serdes_preemphasis_lane2_xe7=0xc6e0 +serdes_preemphasis_lane3_xe7=0xc6e0 + +# xe8 (40G) +portmap_9=13:40 +xgxs_rx_lane_map_9=0x213 +xgxs_tx_lane_map_9=0x132 +phy_xaui_rx_polarity_flip_9=0xe +phy_xaui_tx_polarity_flip_9=0x0 +serdes_driver_current_lane0_xe8=0x2 +serdes_driver_current_lane1_xe8=0x3 +serdes_driver_current_lane2_xe8=0x2 +serdes_driver_current_lane3_xe8=0x2 +serdes_pre_driver_current_lane0_xe8=0x2 +serdes_pre_driver_current_lane1_xe8=0x3 +serdes_pre_driver_current_lane2_xe8=0x2 +serdes_pre_driver_current_lane3_xe8=0x2 +serdes_preemphasis_lane0_xe8=0xb270 +serdes_preemphasis_lane1_xe8=0xbb10 +serdes_preemphasis_lane2_xe8=0xb720 +serdes_preemphasis_lane3_xe8=0xb720 + +# xe9 (40G) +portmap_10=9:40 +xgxs_rx_lane_map_10=0x3120 +xgxs_tx_lane_map_10=0x3021 +phy_xaui_rx_polarity_flip_10=0x0 +phy_xaui_tx_polarity_flip_10=0x4 +serdes_driver_current_lane0_xe9=0x3 +serdes_driver_current_lane1_xe9=0x3 +serdes_driver_current_lane2_xe9=0x3 +serdes_driver_current_lane3_xe9=0x3 +serdes_pre_driver_current_lane0_xe9=0x3 +serdes_pre_driver_current_lane1_xe9=0x3 +serdes_pre_driver_current_lane2_xe9=0x3 +serdes_pre_driver_current_lane3_xe9=0x3 +serdes_preemphasis_lane0_xe9=0xc2f0 +serdes_preemphasis_lane1_xe9=0xc6e0 +serdes_preemphasis_lane2_xe9=0xbf00 +serdes_preemphasis_lane3_xe9=0xc2f0 + +# xe10 (40G) +portmap_11=17:40 +xgxs_rx_lane_map_11=0x213 +xgxs_tx_lane_map_11=0x132 +phy_xaui_rx_polarity_flip_11=0xe +phy_xaui_tx_polarity_flip_11=0x0 +serdes_driver_current_lane0_xe10=0x2 +serdes_driver_current_lane1_xe10=0x2 +serdes_driver_current_lane2_xe10=0x2 +serdes_driver_current_lane3_xe10=0x2 +serdes_pre_driver_current_lane0_xe10=0x2 +serdes_pre_driver_current_lane1_xe10=0x2 +serdes_pre_driver_current_lane2_xe10=0x2 +serdes_pre_driver_current_lane3_xe10=0x2 +serdes_preemphasis_lane0_xe10=0xb330 +serdes_preemphasis_lane1_xe10=0xbb10 +serdes_preemphasis_lane2_xe10=0xbb10 +serdes_preemphasis_lane3_xe10=0xbb10 + +# xe11 (40G) +portmap_12=21:40 +xgxs_rx_lane_map_12=0x123 +xgxs_tx_lane_map_12=0x1203 +phy_xaui_rx_polarity_flip_12=0xc +phy_xaui_tx_polarity_flip_12=0xe +serdes_driver_current_lane0_xe11=0x2 +serdes_driver_current_lane1_xe11=0x2 +serdes_driver_current_lane2_xe11=0x2 +serdes_driver_current_lane3_xe11=0x2 +serdes_pre_driver_current_lane0_xe11=0x2 +serdes_pre_driver_current_lane1_xe11=0x2 +serdes_pre_driver_current_lane2_xe11=0x2 +serdes_pre_driver_current_lane3_xe11=0x2 +serdes_preemphasis_lane0_xe11=0xb330 +serdes_preemphasis_lane1_xe11=0xb330 +serdes_preemphasis_lane2_xe11=0xb330 +serdes_preemphasis_lane3_xe11=0xb330 + +# xe12 (40G) +portmap_13=53:40 +xgxs_rx_lane_map_13=0x213 +xgxs_tx_lane_map_13=0x231 +phy_xaui_rx_polarity_flip_13=0x1 +phy_xaui_tx_polarity_flip_13=0x0 +serdes_driver_current_lane0_xe12=0x2 +serdes_driver_current_lane1_xe12=0x2 +serdes_driver_current_lane2_xe12=0x2 +serdes_driver_current_lane3_xe12=0x2 +serdes_pre_driver_current_lane0_xe12=0x2 +serdes_pre_driver_current_lane1_xe12=0x2 +serdes_pre_driver_current_lane2_xe12=0x2 +serdes_pre_driver_current_lane3_xe12=0x2 +serdes_preemphasis_lane0_xe12=0xaf40 +serdes_preemphasis_lane1_xe12=0xaf40 +serdes_preemphasis_lane2_xe12=0xaf40 +serdes_preemphasis_lane3_xe12=0xaf40 + +# xe13 (40G) +portmap_14=49:40 +xgxs_rx_lane_map_14=0x1302 +xgxs_tx_lane_map_14=0x2031 +phy_xaui_rx_polarity_flip_14=0xb +phy_xaui_tx_polarity_flip_14=0x3 +serdes_driver_current_lane0_xe13=0x2 +serdes_driver_current_lane1_xe13=0x2 +serdes_driver_current_lane2_xe13=0x2 +serdes_driver_current_lane3_xe13=0x2 +serdes_pre_driver_current_lane0_xe13=0x2 +serdes_pre_driver_current_lane1_xe13=0x2 +serdes_pre_driver_current_lane2_xe13=0x2 +serdes_pre_driver_current_lane3_xe13=0x2 +serdes_preemphasis_lane0_xe13=0xa760 +serdes_preemphasis_lane1_xe13=0xa760 +serdes_preemphasis_lane2_xe13=0xa760 +serdes_preemphasis_lane3_xe13=0xa760 + +# xe14 (40G) +portmap_15=57:40 +xgxs_rx_lane_map_15=0x213 +xgxs_tx_lane_map_15=0x2031 +phy_xaui_rx_polarity_flip_15=0x1 +phy_xaui_tx_polarity_flip_15=0x0 +serdes_driver_current_lane0_xe14=0x1 +serdes_driver_current_lane1_xe14=0x1 +serdes_driver_current_lane2_xe14=0x1 +serdes_driver_current_lane3_xe14=0x1 +serdes_pre_driver_current_lane0_xe14=0x1 +serdes_pre_driver_current_lane1_xe14=0x1 +serdes_pre_driver_current_lane2_xe14=0x1 +serdes_pre_driver_current_lane3_xe14=0x1 +serdes_preemphasis_lane0_xe14=0xa760 +serdes_preemphasis_lane1_xe14=0xa760 +serdes_preemphasis_lane2_xe14=0xa760 +serdes_preemphasis_lane3_xe14=0xa760 + +# xe15 (40G) +portmap_16=61:40 +xgxs_rx_lane_map_16=0x132 +xgxs_tx_lane_map_16=0x213 +phy_xaui_rx_polarity_flip_16=0x0 +phy_xaui_tx_polarity_flip_16=0x0 +serdes_driver_current_lane0_xe15=0x2 +serdes_driver_current_lane1_xe15=0x2 +serdes_driver_current_lane2_xe15=0x2 +serdes_driver_current_lane3_xe15=0x2 +serdes_pre_driver_current_lane0_xe15=0x2 +serdes_pre_driver_current_lane1_xe15=0x2 +serdes_pre_driver_current_lane2_xe15=0x2 +serdes_pre_driver_current_lane3_xe15=0x2 +serdes_preemphasis_lane0_xe15=0xa760 +serdes_preemphasis_lane1_xe15=0xa760 +serdes_preemphasis_lane2_xe15=0xa760 +serdes_preemphasis_lane3_xe15=0xa760 + +# xe16 (40G) +portmap_17=69:40 +xgxs_rx_lane_map_17=0x213 +xgxs_tx_lane_map_17=0x2130 +phy_xaui_rx_polarity_flip_17=0x1 +phy_xaui_tx_polarity_flip_17=0xf +serdes_driver_current_lane0_xe16=0x1 +serdes_driver_current_lane1_xe16=0x1 +serdes_driver_current_lane2_xe16=0x1 +serdes_driver_current_lane3_xe16=0x1 +serdes_pre_driver_current_lane0_xe16=0x1 +serdes_pre_driver_current_lane1_xe16=0x1 +serdes_pre_driver_current_lane2_xe16=0x1 +serdes_pre_driver_current_lane3_xe16=0x1 +serdes_preemphasis_lane0_xe16=0xa760 +serdes_preemphasis_lane1_xe16=0xa760 +serdes_preemphasis_lane2_xe16=0xa760 +serdes_preemphasis_lane3_xe16=0xa760 + +# xe17 (40G) +portmap_18=65:40 +xgxs_rx_lane_map_18=0x132 +xgxs_tx_lane_map_18=0x2031 +phy_xaui_rx_polarity_flip_18=0x3 +phy_xaui_tx_polarity_flip_18=0x9 +serdes_driver_current_lane0_xe17=0x1 +serdes_driver_current_lane1_xe17=0x1 +serdes_driver_current_lane2_xe17=0x1 +serdes_driver_current_lane3_xe17=0x1 +serdes_pre_driver_current_lane0_xe17=0x1 +serdes_pre_driver_current_lane1_xe17=0x1 +serdes_pre_driver_current_lane2_xe17=0x1 +serdes_pre_driver_current_lane3_xe17=0x1 +serdes_preemphasis_lane0_xe17=0xa370 +serdes_preemphasis_lane1_xe17=0xa370 +serdes_preemphasis_lane2_xe17=0xa370 +serdes_preemphasis_lane3_xe17=0xa370 + +# xe18 (40G) +portmap_19=73:40 +xgxs_rx_lane_map_19=0x213 +xgxs_tx_lane_map_19=0x2031 +phy_xaui_rx_polarity_flip_19=0x1 +phy_xaui_tx_polarity_flip_19=0x0 +serdes_driver_current_lane0_xe18=0x2 +serdes_driver_current_lane1_xe18=0x2 +serdes_driver_current_lane2_xe18=0x2 +serdes_driver_current_lane3_xe18=0x2 +serdes_pre_driver_current_lane0_xe18=0x2 +serdes_pre_driver_current_lane1_xe18=0x2 +serdes_pre_driver_current_lane2_xe18=0x2 +serdes_pre_driver_current_lane3_xe18=0x2 +serdes_preemphasis_lane0_xe18=0xa760 +serdes_preemphasis_lane1_xe18=0xa760 +serdes_preemphasis_lane2_xe18=0xa760 +serdes_preemphasis_lane3_xe18=0xa760 + +# xe19 (40G) +portmap_20=77:40 +xgxs_rx_lane_map_20=0x123 +xgxs_tx_lane_map_20=0x1203 +phy_xaui_rx_polarity_flip_20=0x3 +phy_xaui_tx_polarity_flip_20=0xe +serdes_driver_current_lane0_xe19=0x2 +serdes_driver_current_lane1_xe19=0x2 +serdes_driver_current_lane2_xe19=0x2 +serdes_driver_current_lane3_xe19=0x2 +serdes_pre_driver_current_lane0_xe19=0x2 +serdes_pre_driver_current_lane1_xe19=0x2 +serdes_pre_driver_current_lane2_xe19=0x2 +serdes_pre_driver_current_lane3_xe19=0x2 +serdes_preemphasis_lane0_xe19=0xaf40 +serdes_preemphasis_lane1_xe19=0xaf40 +serdes_preemphasis_lane2_xe19=0xaf40 +serdes_preemphasis_lane3_xe19=0xaf40 + +# xe20 (40G) +portmap_21=109:40 +xgxs_rx_lane_map_21=0x132 +xgxs_tx_lane_map_21=0x132 +phy_xaui_rx_polarity_flip_21=0x8 +phy_xaui_tx_polarity_flip_21=0x0 +serdes_driver_current_lane0_xe20=0x1 +serdes_driver_current_lane1_xe20=0x1 +serdes_driver_current_lane2_xe20=0x1 +serdes_driver_current_lane3_xe20=0x2 +serdes_pre_driver_current_lane0_xe20=0x1 +serdes_pre_driver_current_lane1_xe20=0x1 +serdes_pre_driver_current_lane2_xe20=0x1 +serdes_pre_driver_current_lane3_xe20=0x2 +serdes_preemphasis_lane0_xe20=0xb330 +serdes_preemphasis_lane1_xe20=0xb330 +serdes_preemphasis_lane2_xe20=0xb330 +serdes_preemphasis_lane3_xe20=0xbff0 + +# xe21 (40G) +portmap_22=105:40 +xgxs_rx_lane_map_22=0x1320 +xgxs_tx_lane_map_22=0x3021 +phy_xaui_rx_polarity_flip_22=0xd +phy_xaui_tx_polarity_flip_22=0xb +serdes_driver_current_lane0_xe21=0x1 +serdes_driver_current_lane1_xe21=0x1 +serdes_driver_current_lane2_xe21=0x1 +serdes_driver_current_lane3_xe21=0x1 +serdes_pre_driver_current_lane0_xe21=0x1 +serdes_pre_driver_current_lane1_xe21=0x1 +serdes_pre_driver_current_lane2_xe21=0x1 +serdes_pre_driver_current_lane3_xe21=0x1 +serdes_preemphasis_lane0_xe21=0xb330 +serdes_preemphasis_lane1_xe21=0xb330 +serdes_preemphasis_lane2_xe21=0xb330 +serdes_preemphasis_lane3_xe21=0xb330 + +# xe22 (40G) +portmap_23=113:40 +xgxs_rx_lane_map_23=0x132 +xgxs_tx_lane_map_23=0x132 +phy_xaui_rx_polarity_flip_23=0x8 +phy_xaui_tx_polarity_flip_23=0x0 +serdes_driver_current_lane0_xe22=0x1 +serdes_driver_current_lane1_xe22=0x1 +serdes_driver_current_lane2_xe22=0x1 +serdes_driver_current_lane3_xe22=0x1 +serdes_pre_driver_current_lane0_xe22=0x1 +serdes_pre_driver_current_lane1_xe22=0x1 +serdes_pre_driver_current_lane2_xe22=0x1 +serdes_pre_driver_current_lane3_xe22=0x1 +serdes_preemphasis_lane0_xe22=0xbb10 +serdes_preemphasis_lane1_xe22=0xbb10 +serdes_preemphasis_lane2_xe22=0xbb10 +serdes_preemphasis_lane3_xe22=0xc2f0 + +# xe23 (40G) +portmap_24=117:40 +xgxs_rx_lane_map_24=0x231 +xgxs_tx_lane_map_24=0x1203 +phy_xaui_rx_polarity_flip_24=0x3 +phy_xaui_tx_polarity_flip_24=0xe +serdes_driver_current_lane0_xe23=0x3 +serdes_driver_current_lane1_xe23=0x5 +serdes_driver_current_lane2_xe23=0x3 +serdes_driver_current_lane3_xe23=0x3 +serdes_pre_driver_current_lane0_xe23=0x3 +serdes_pre_driver_current_lane1_xe23=0x5 +serdes_pre_driver_current_lane2_xe23=0x3 +serdes_pre_driver_current_lane3_xe23=0x3 +serdes_preemphasis_lane0_xe23=0xc6e0 +serdes_preemphasis_lane1_xe23=0xc6e0 +serdes_preemphasis_lane2_xe23=0xc6e0 +serdes_preemphasis_lane3_xe23=0xc6e0 + +# xe24 (40G) +portmap_25=125:40 +xgxs_rx_lane_map_25=0x132 +xgxs_tx_lane_map_25=0x132 +phy_xaui_rx_polarity_flip_25=0x8 +phy_xaui_tx_polarity_flip_25=0x0 +serdes_driver_current_lane0_xe24=0x4 +serdes_driver_current_lane1_xe24=0x4 +serdes_driver_current_lane2_xe24=0x4 +serdes_driver_current_lane3_xe24=0x4 +serdes_pre_driver_current_lane0_xe24=0x4 +serdes_pre_driver_current_lane1_xe24=0x4 +serdes_pre_driver_current_lane2_xe24=0x4 +serdes_pre_driver_current_lane3_xe24=0x4 +serdes_preemphasis_lane0_xe24=0xc6e0 +serdes_preemphasis_lane1_xe24=0xc6e0 +serdes_preemphasis_lane2_xe24=0xc6e0 +serdes_preemphasis_lane3_xe24=0xcec0 + +# xe25 (40G) +portmap_26=121:40 +xgxs_rx_lane_map_26=0x1320 +xgxs_tx_lane_map_26=0x3021 +phy_xaui_rx_polarity_flip_26=0xd +phy_xaui_tx_polarity_flip_26=0xb +serdes_driver_current_lane0_xe25=0x4 +serdes_driver_current_lane1_xe25=0x4 +serdes_driver_current_lane2_xe25=0x4 +serdes_driver_current_lane3_xe25=0x4 +serdes_pre_driver_current_lane0_xe25=0x4 +serdes_pre_driver_current_lane1_xe25=0x4 +serdes_pre_driver_current_lane2_xe25=0x4 +serdes_pre_driver_current_lane3_xe25=0x4 +serdes_preemphasis_lane0_xe25=0xc6e0 +serdes_preemphasis_lane1_xe25=0xc6e0 +serdes_preemphasis_lane2_xe25=0xc6e0 +serdes_preemphasis_lane3_xe25=0xc6e0 + +# xe26 (40G) +portmap_27=81:40 +xgxs_rx_lane_map_27=0x1320 +xgxs_tx_lane_map_27=0x2031 +phy_xaui_rx_polarity_flip_27=0x1 +phy_xaui_tx_polarity_flip_27=0x2 +serdes_driver_current_lane0_xe26=0x2 +serdes_driver_current_lane1_xe26=0x2 +serdes_driver_current_lane2_xe26=0x2 +serdes_driver_current_lane3_xe26=0x2 +serdes_pre_driver_current_lane0_xe26=0x2 +serdes_pre_driver_current_lane1_xe26=0x2 +serdes_pre_driver_current_lane2_xe26=0x2 +serdes_pre_driver_current_lane3_xe26=0x2 +serdes_preemphasis_lane0_xe26=0xbb10 +serdes_preemphasis_lane1_xe26=0xbb10 +serdes_preemphasis_lane2_xe26=0xbf00 +serdes_preemphasis_lane3_xe26=0xbb10 + +# xe27 (40G) +portmap_28=85:40 +xgxs_rx_lane_map_28=0x213 +xgxs_tx_lane_map_28=0x1203 +phy_xaui_rx_polarity_flip_28=0xc +phy_xaui_tx_polarity_flip_28=0xe +serdes_driver_current_lane0_xe27=0x4 +serdes_driver_current_lane1_xe27=0x5 +serdes_driver_current_lane2_xe27=0x4 +serdes_driver_current_lane3_xe27=0x5 +serdes_pre_driver_current_lane0_xe27=0x4 +serdes_pre_driver_current_lane1_xe27=0x5 +serdes_pre_driver_current_lane2_xe27=0x4 +serdes_pre_driver_current_lane3_xe27=0x5 +serdes_preemphasis_lane0_xe27=0xc2f0 +serdes_preemphasis_lane1_xe27=0xc6e0 +serdes_preemphasis_lane2_xe27=0xc6e0 +serdes_preemphasis_lane3_xe27=0xc6e0 + +# xe28 (40G) +portmap_29=93:40 +xgxs_rx_lane_map_29=0x1320 +xgxs_tx_lane_map_29=0x2031 +phy_xaui_rx_polarity_flip_29=0x1 +phy_xaui_tx_polarity_flip_29=0x2 +serdes_driver_current_lane0_xe28=0x4 +serdes_driver_current_lane1_xe28=0x4 +serdes_driver_current_lane2_xe28=0x4 +serdes_driver_current_lane3_xe28=0x4 +serdes_pre_driver_current_lane0_xe28=0x4 +serdes_pre_driver_current_lane1_xe28=0x4 +serdes_pre_driver_current_lane2_xe28=0x4 +serdes_pre_driver_current_lane3_xe28=0x4 +serdes_preemphasis_lane0_xe28=0xc2f0 +serdes_preemphasis_lane1_xe28=0xc2f0 +serdes_preemphasis_lane2_xe28=0xc2f0 +serdes_preemphasis_lane3_xe28=0xc2f0 + +# xe29 (40G) +portmap_30=89:40 +xgxs_rx_lane_map_30=0x1320 +xgxs_tx_lane_map_30=0x3021 +phy_xaui_rx_polarity_flip_30=0x2 +phy_xaui_tx_polarity_flip_30=0xb +serdes_driver_current_lane0_xe29=0x4 +serdes_driver_current_lane1_xe29=0x4 +serdes_driver_current_lane2_xe29=0x4 +serdes_driver_current_lane3_xe29=0x4 +serdes_pre_driver_current_lane0_xe29=0x4 +serdes_pre_driver_current_lane1_xe29=0x4 +serdes_pre_driver_current_lane2_xe29=0x4 +serdes_pre_driver_current_lane3_xe29=0x4 +serdes_preemphasis_lane0_xe29=0xcad0 +serdes_preemphasis_lane1_xe29=0xc6e0 +serdes_preemphasis_lane2_xe29=0xc6e0 +serdes_preemphasis_lane3_xe29=0xc6e0 + +# xe30 (40G) +portmap_31=101:40 +xgxs_rx_lane_map_31=0x1320 +xgxs_tx_lane_map_31=0x1203 +phy_xaui_rx_polarity_flip_31=0x1 +phy_xaui_tx_polarity_flip_31=0x6 +serdes_driver_current_lane0_xe30=0x6 +serdes_driver_current_lane1_xe30=0x6 +serdes_driver_current_lane2_xe30=0x6 +serdes_driver_current_lane3_xe30=0x7 +serdes_pre_driver_current_lane0_xe30=0x6 +serdes_pre_driver_current_lane1_xe30=0x6 +serdes_pre_driver_current_lane2_xe30=0x6 +serdes_pre_driver_current_lane3_xe30=0x7 +serdes_preemphasis_lane0_xe30=0xcec0 +serdes_preemphasis_lane1_xe30=0xcec0 +serdes_preemphasis_lane2_xe30=0xcad0 +serdes_preemphasis_lane3_xe30=0xc6e0 + +# xe31 (40G) +portmap_32=97:40 +xgxs_rx_lane_map_32=0x213 +xgxs_tx_lane_map_32=0x2031 +phy_xaui_rx_polarity_flip_32=0xc +phy_xaui_tx_polarity_flip_32=0x3 +serdes_driver_current_lane0_xe31=0x5 +serdes_driver_current_lane1_xe31=0x5 +serdes_driver_current_lane2_xe31=0x5 +serdes_driver_current_lane3_xe31=0x5 +serdes_pre_driver_current_lane0_xe31=0x5 +serdes_pre_driver_current_lane1_xe31=0x5 +serdes_pre_driver_current_lane2_xe31=0x5 +serdes_pre_driver_current_lane3_xe31=0x5 +serdes_preemphasis_lane0_xe31=0xcad0 +serdes_preemphasis_lane1_xe31=0xcad0 +serdes_preemphasis_lane2_xe31=0xcad0 +serdes_preemphasis_lane3_xe31=0xcad0 diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/default_sku b/device/dell/x86_64-dell_s6000_s1220-r0/default_sku new file mode 100644 index 00000000000..493e1989b66 --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/default_sku @@ -0,0 +1 @@ +Force10-S6000 t1 diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/installer.conf b/device/dell/x86_64-dell_s6000_s1220-r0/installer.conf new file mode 100644 index 00000000000..45888b61d37 --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/installer.conf @@ -0,0 +1,29 @@ +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="processor.max_cstate=1 intel_idle.max_cstate=0" + +if [ "$install_env" = "onie" ]; then + +echo "Replace ONIE reboot with Dell reset commands" + +# set I2C GPIO mux +[ -d /sys/class/gpio/gpio1 ] || echo 1 > /sys/class/gpio/export +[ -d /sys/class/gpio/gpio2 ] || echo 2 > /sys/class/gpio/export +[ -d /sys/class/gpio/gpio10 ] || echo 10 > /sys/class/gpio/export +echo out > /sys/class/gpio/gpio1/direction +echo out > /sys/class/gpio/gpio2/direction +echo out > /sys/class/gpio/gpio10/direction +echo 0 > /sys/class/gpio/gpio1/value +echo 0 > /sys/class/gpio/gpio2/value + +# replace the original reboot binary with the following command +# sync flushes file system buffers +# i2cset command triggers a hard system reboot, required by ASIC to operate correctly +rm /sbin/reboot +cat <> /sbin/reboot +#!/bin/sh +sync +i2cset -y 0 0x31 1 0xfd +EOF + +chmod a+x /sbin/reboot + +fi diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/led_proc_init.soc b/device/dell/x86_64-dell_s6000_s1220-r0/led_proc_init.soc new file mode 100644 index 00000000000..ddda7bdb639 --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/led_proc_init.soc @@ -0,0 +1,43 @@ +# LED microprocessor initialization for Dell s6000 + +led 0 stop +led 0 prog 02 31 60 F7 02 01 28 60 F6 D6 F7 70 28 67 44 06 F6 06 F6 80 D2 35 74 06 86 F8 3A 40 67 80 67 44 06 F6 67 80 67 80 67 3C D2 32 70 1C D2 34 70 1C 67 44 06 F6 67 80 67 80 67 80 67 3C 06 F7 F2 01 60 F7 77 11 32 08 97 71 4C 77 80 57 67 61 32 00 32 01 B7 97 71 5C 95 75 74 85 77 7C 02 0A 50 77 56 06 F6 D2 17 75 6C 12 88 FE F6 57 06 F6 E2 17 12 D4 F8 57 16 F8 CA 05 74 80 77 7C 22 0E 87 57 22 0F 87 57 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0x31 REMAP_PORT_2=0 REMAP_PORT_1=0 REMAP_PORT_0=0 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=0x32 REMAP_PORT_6=0 REMAP_PORT_5=0 REMAP_PORT_4=0 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=0 REMAP_PORT_8=0 REMAP_PORT_11=0x34 REMAP_PORT_10=0 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=0x33 REMAP_PORT_14=0 REMAP_PORT_13=0 REMAP_PORT_12=0 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=0x16 REMAP_PORT_18=0x15 REMAP_PORT_17=0x18 REMAP_PORT_16=0x17 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=0x11 REMAP_PORT_22=0x12 REMAP_PORT_21=0x13 REMAP_PORT_20=0x14 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=9 REMAP_PORT_26=0xa REMAP_PORT_25=0xb REMAP_PORT_24=0xc +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=0xe REMAP_PORT_30=0xd REMAP_PORT_29=0x10 REMAP_PORT_28=0xf +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=0x2e REMAP_PORT_34=0x2d REMAP_PORT_33=0x30 REMAP_PORT_32=0x2f +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=0x29 REMAP_PORT_38=0x2a REMAP_PORT_37=0x2b REMAP_PORT_36=0x2c +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=6 REMAP_PORT_42=5 REMAP_PORT_41=8 REMAP_PORT_40=7 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=1 REMAP_PORT_46=2 REMAP_PORT_45=3 REMAP_PORT_44=4 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=0x26 REMAP_PORT_50=0x25 REMAP_PORT_49=0x28 REMAP_PORT_48=0x27 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=0x21 REMAP_PORT_54=0x22 REMAP_PORT_53=0x23 REMAP_PORT_52=0x24 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=0x19 REMAP_PORT_58=0x1a REMAP_PORT_57=0x1b REMAP_PORT_56=0x1c +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0x1e REMAP_PORT_62=0x1d REMAP_PORT_61=0x20 REMAP_PORT_60=0x1f +led 0 auto on +led 0 start + +led 1 stop +led 1 prog 02 31 60 F7 02 01 28 60 F6 D6 F7 70 28 67 44 06 F6 06 F6 80 D2 35 74 06 86 F8 3A 40 67 80 67 44 06 F6 67 80 67 80 67 3C D2 32 70 1C D2 34 70 1C 67 44 06 F6 67 80 67 80 67 80 67 3C 06 F7 F2 01 60 F7 77 11 32 08 97 71 4C 77 80 57 67 61 32 00 32 01 B7 97 71 5C 95 75 74 85 77 7C 02 0A 50 77 56 06 F6 D2 17 75 6C 12 88 FE F6 57 06 F6 E2 17 12 D4 F8 57 16 F8 CA 05 74 80 77 7C 22 0E 87 57 22 0F 87 57 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0x1e REMAP_PORT_2=0x1d REMAP_PORT_1=0x20 REMAP_PORT_0=0x1f +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=0x19 REMAP_PORT_6=0x1a REMAP_PORT_5=0x1b REMAP_PORT_4=0x1c +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=0x23 REMAP_PORT_8=0x24 REMAP_PORT_11=0x21 REMAP_PORT_10=0x22 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=0x26 REMAP_PORT_14=0x25 REMAP_PORT_13=0x28 REMAP_PORT_12=0x27 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=0x16 REMAP_PORT_18=0x15 REMAP_PORT_17=0x18 REMAP_PORT_16=0x17 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=0x11 REMAP_PORT_22=0x12 REMAP_PORT_21=0x13 REMAP_PORT_20=0x14 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=0x34 REMAP_PORT_26=0 REMAP_PORT_25=0 REMAP_PORT_24=0 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=0x33 REMAP_PORT_30=0 REMAP_PORT_29=0 REMAP_PORT_28=0 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=0x2e REMAP_PORT_34=0x2d REMAP_PORT_33=0x30 REMAP_PORT_32=0x2f +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=0x29 REMAP_PORT_38=0x2a REMAP_PORT_37=0x2b REMAP_PORT_36=0x2c +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=0x31 REMAP_PORT_42=0 REMAP_PORT_41=0 REMAP_PORT_40=0 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=0x32 REMAP_PORT_46=0 REMAP_PORT_45=0 REMAP_PORT_44=0 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=9 REMAP_PORT_50=0xa REMAP_PORT_49=0xb REMAP_PORT_48=0xc +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=0xe REMAP_PORT_54=0xd REMAP_PORT_53=0x10 REMAP_PORT_52=0xf +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=6 REMAP_PORT_58=5 REMAP_PORT_57=8 REMAP_PORT_56=7 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=1 REMAP_PORT_62=2 REMAP_PORT_61=3 REMAP_PORT_60=4 +led 1 auto on +led 1 start diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/media_settings.json b/device/dell/x86_64-dell_s6000_s1220-r0/media_settings.json new file mode 100644 index 00000000000..9032a2e53b2 --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/media_settings.json @@ -0,0 +1,1348 @@ +{ + "PORT_MEDIA_SETTINGS": { + "0": { + "Default": { + "preemphasis": { + "lane0":"0xcad0", + "lane1":"0xc6e0", + "lane2":"0xc6e0", + "lane3":"0xd2b0" + }, + "idriver": { + "lane0":"0x5", + "lane1":"0x5", + "lane2":"0x5", + "lane3":"0x5" + }, + "ipredriver": { + "lane0":"0x5", + "lane1":"0x5", + "lane2":"0x5", + "lane3":"0x5" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x5", + "lane1":"0x5", + "lane2":"0x5", + "lane3":"0x5" + }, + "ipredriver": { + "lane0":"0x5", + "lane1":"0x5", + "lane2":"0x5", + "lane3":"0x5" + } + } + }, + "1": { + "Default": { + "preemphasis": { + "lane0":"0xc2f0", + "lane1":"0xd2b0", + "lane2":"0xc6e0", + "lane3":"0xc2f0" + }, + "idriver": { + "lane0":"0x6", + "lane1":"0x7", + "lane2":"0x6", + "lane3":"0x6" + }, + "ipredriver": { + "lane0":"0x6", + "lane1":"0x7", + "lane2":"0x6", + "lane3":"0x6" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x6", + "lane1":"0x7", + "lane2":"0x6", + "lane3":"0x6" + }, + "ipredriver": { + "lane0":"0x6", + "lane1":"0x7", + "lane2":"0x6", + "lane3":"0x6" + } + } + }, + "2": { + "Default": { + "preemphasis": { + "lane0":"0xc6e0", + "lane1":"0xc6e0", + "lane2":"0xc6e0", + "lane3":"0xc6e0" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + } + }, + "3": { + "Default": { + "preemphasis": { + "lane0":"0xcad0", + "lane1":"0xcad0", + "lane2":"0xc2f0", + "lane3":"0xc2f0" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + } + }, + "4": { + "Default": { + "preemphasis": { + "lane0":"0xc2f0", + "lane1":"0xc2f0", + "lane2":"0xc2f0", + "lane3":"0xc2f0" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + } + }, + "5": { + "Default": { + "preemphasis": { + "lane0":"0xc6e0", + "lane1":"0xc2f0", + "lane2":"0xc2f0", + "lane3":"0xcad0" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + } + }, + "6": { + "Default": { + "preemphasis": { + "lane0":"0xc6e0", + "lane1":"0xcad0", + "lane2":"0xc6e0", + "lane3":"0xcad0" + }, + "idriver": { + "lane0":"0x5", + "lane1":"0x5", + "lane2":"0x5", + "lane3":"0x5" + }, + "ipredriver": { + "lane0":"0x5", + "lane1":"0x5", + "lane2":"0x5", + "lane3":"0x5" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x5", + "lane1":"0x5", + "lane2":"0x5", + "lane3":"0x5" + }, + "ipredriver": { + "lane0":"0x5", + "lane1":"0x5", + "lane2":"0x5", + "lane3":"0x5" + } + } + }, + "7": { + "Default": { + "preemphasis": { + "lane0":"0xc6e0", + "lane1":"0xc6e0", + "lane2":"0xc6e0", + "lane3":"0xc6e0" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + } + }, + "8": { + "Default": { + "preemphasis": { + "lane0":"0xb270", + "lane1":"0xbb10", + "lane2":"0xb720", + "lane3":"0xb720" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x3", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x3", + "lane2":"0x2", + "lane3":"0x2" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xea05", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x3", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x3", + "lane2":"0x2", + "lane3":"0x2" + } + } + }, + "9": { + "Default": { + "preemphasis": { + "lane0":"0xc2f0", + "lane1":"0xc6e0", + "lane2":"0xbf00", + "lane3":"0xc2f0" + }, + "idriver": { + "lane0":"0x3", + "lane1":"0x3", + "lane2":"0x3", + "lane3":"0x3" + }, + "ipredriver": { + "lane0":"0x3", + "lane1":"0x3", + "lane2":"0x3", + "lane3":"0x3" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x3", + "lane1":"0x3", + "lane2":"0x3", + "lane3":"0x3" + }, + "ipredriver": { + "lane0":"0x3", + "lane1":"0x3", + "lane2":"0x3", + "lane3":"0x3" + } + } + }, + "10": { + "Default": { + "preemphasis": { + "lane0":"0xb330", + "lane1":"0xbb10", + "lane2":"0xbb10", + "lane3":"0xbb10" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xe225", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + } + }, + "11": { + "Default": { + "preemphasis": { + "lane0":"0xb330", + "lane1":"0xb330", + "lane2":"0xb330", + "lane3":"0xb330" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xe225", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + } + }, + "12": { + "Default": { + "preemphasis": { + "lane0":"0xaf40", + "lane1":"0xaf40", + "lane2":"0xaf40", + "lane3":"0xaf40" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xe225", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + } + }, + "13": { + "Default": { + "preemphasis": { + "lane0":"0xa760", + "lane1":"0xa760", + "lane2":"0xa760", + "lane3":"0xa760" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xe225", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + } + }, + "14": { + "Default": { + "preemphasis": { + "lane0":"0xa760", + "lane1":"0xa760", + "lane2":"0xa760", + "lane3":"0xa760" + }, + "idriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + }, + "ipredriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xe225", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + }, + "ipredriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + } + } + }, + "15": { + "Default": { + "preemphasis": { + "lane0":"0xa760", + "lane1":"0xa760", + "lane2":"0xa760", + "lane3":"0xa760" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xe225", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + } + }, + "16": { + "Default": { + "preemphasis": { + "lane0":"0xa760", + "lane1":"0xa760", + "lane2":"0xa760", + "lane3":"0xa760" + }, + "idriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + }, + "ipredriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xe225", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + }, + "ipredriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + } + } + }, + "17": { + "Default": { + "preemphasis": { + "lane0":"0xa370", + "lane1":"0xa370", + "lane2":"0xa370", + "lane3":"0xa370" + }, + "idriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + }, + "ipredriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xe225", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + }, + "ipredriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + } + } + }, + "18": { + "Default": { + "preemphasis": { + "lane0":"0xa760", + "lane1":"0xa760", + "lane2":"0xa760", + "lane3":"0xa760" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xe225", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + } + }, + "19": { + "Default": { + "preemphasis": { + "lane0":"0xaf40", + "lane1":"0xaf40", + "lane2":"0xaf40", + "lane3":"0xaf40" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xe225", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + } + }, + "20": { + "Default": { + "preemphasis": { + "lane0":"0xb330", + "lane1":"0xb330", + "lane2":"0xb330", + "lane3":"0xbff0" + }, + "idriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x2" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xe225", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x2" + } + } + }, + "21": { + "Default": { + "preemphasis": { + "lane0":"0xb330", + "lane1":"0xb330", + "lane2":"0xb330", + "lane3":"0xb330" + }, + "idriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + }, + "ipredriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xe225", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + }, + "ipredriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + } + } + }, + "22": { + "Default": { + "preemphasis": { + "lane0":"0xbb10", + "lane1":"0xbb10", + "lane2":"0xbb10", + "lane3":"0xc2f0" + }, + "idriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + }, + "ipredriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xe225", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + }, + "ipredriver": { + "lane0":"0x1", + "lane1":"0x1", + "lane2":"0x1", + "lane3":"0x1" + } + } + }, + "23": { + "Default": { + "preemphasis": { + "lane0":"0xc6e0", + "lane1":"0xc6e0", + "lane2":"0xc6e0", + "lane3":"0xc6e0" + }, + "idriver": { + "lane0":"0x3", + "lane1":"0x5", + "lane2":"0x3", + "lane3":"0x3" + }, + "ipredriver": { + "lane0":"0x3", + "lane1":"0x5", + "lane2":"0x3", + "lane3":"0x3" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x3", + "lane1":"0x5", + "lane2":"0x3", + "lane3":"0x3" + }, + "ipredriver": { + "lane0":"0x3", + "lane1":"0x5", + "lane2":"0x3", + "lane3":"0x3" + } + } + }, + "24": { + "Default": { + "preemphasis": { + "lane0":"0xc6e0", + "lane1":"0xc6e0", + "lane2":"0xc6e0", + "lane3":"0xcec0" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + } + }, + "25": { + "Default": { + "preemphasis": { + "lane0":"0xc6e0", + "lane1":"0xc6e0", + "lane2":"0xc6e0", + "lane3":"0xc6c0" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + } + }, + "26": { + "Default": { + "preemphasis": { + "lane0":"0xbb10", + "lane1":"0xbb10", + "lane2":"0xbf00", + "lane3":"0xbb10" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + }, + "ipredriver": { + "lane0":"0x2", + "lane1":"0x2", + "lane2":"0x2", + "lane3":"0x2" + } + } + }, + "27": { + "Default": { + "preemphasis": { + "lane0":"0xc2f0", + "lane1":"0xc6e0", + "lane2":"0xc6e0", + "lane3":"0xc6e0" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x5", + "lane2":"0x4", + "lane3":"0x5" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x5", + "lane2":"0x4", + "lane3":"0x5" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x5", + "lane2":"0x4", + "lane3":"0x5" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x5", + "lane2":"0x4", + "lane3":"0x5" + } + } + }, + "28": { + "Default": { + "preemphasis": { + "lane0":"0xc2f0", + "lane1":"0xc2f0", + "lane2":"0xc2f0", + "lane3":"0xc2f0" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xe225", + "lane1":"0xe225", + "lane2":"0xe225", + "lane3":"0xe225" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + } + }, + "29": { + "Default": { + "preemphasis": { + "lane0":"0xcad0", + "lane1":"0xc6e0", + "lane2":"0xc6e0", + "lane3":"0xc6e0" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + }, + "ipredriver": { + "lane0":"0x4", + "lane1":"0x4", + "lane2":"0x4", + "lane3":"0x4" + } + } + }, + "30": { + "Default": { + "preemphasis": { + "lane0":"0xcec0", + "lane1":"0xcec0", + "lane2":"0xcad0", + "lane3":"0xc6e0" + }, + "idriver": { + "lane0":"0x6", + "lane1":"0x6", + "lane2":"0x6", + "lane3":"0x7" + }, + "ipredriver": { + "lane0":"0x6", + "lane1":"0x6", + "lane2":"0x6", + "lane3":"0x7" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x6", + "lane1":"0x6", + "lane2":"0x6", + "lane3":"0x7" + }, + "ipredriver": { + "lane0":"0x6", + "lane1":"0x6", + "lane2":"0x6", + "lane3":"0x7" + } + } + }, + "31": { + "Default": { + "preemphasis": { + "lane0":"0xcad0", + "lane1":"0xcad0", + "lane2":"0xcad0", + "lane3":"0xcad0" + }, + "idriver": { + "lane0":"0x5", + "lane1":"0x5", + "lane2":"0x5", + "lane3":"0x5" + }, + "ipredriver": { + "lane0":"0x5", + "lane1":"0x5", + "lane2":"0x5", + "lane3":"0x5" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0":"0xea05", + "lane1":"0xea05", + "lane2":"0xea05", + "lane3":"0xea05" + }, + "idriver": { + "lane0":"0x5", + "lane1":"0x5", + "lane2":"0x5", + "lane3":"0x5" + }, + "ipredriver": { + "lane0":"0x5", + "lane1":"0x5", + "lane2":"0x5", + "lane3":"0x5" + } + } + } + } +} diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/platform_reboot b/device/dell/x86_64-dell_s6000_s1220-r0/platform_reboot new file mode 100755 index 00000000000..dc6e3d517a8 --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/platform_reboot @@ -0,0 +1,56 @@ +#!/usr/bin/python +import sys +import os +import struct + +NVRAM_RES = '/dev/nvram' +COLD_RESET = 0xE # Cold Reset +WARM_RESET = 0x6 # Warm Reset + +def io_reg_write(resource, offset, val): + fd = os.open(resource, os.O_RDWR) + if(fd < 0): + print 'file open failed %s" % resource' + return + if(os.lseek(fd, offset, os.SEEK_SET) != offset): + print 'lseek failed on %s' % resource + return + ret = os.write(fd, struct.pack('B', val)) + if(ret != 1): + print 'write failed %d' % ret + return + os.close(fd) + + +def power_reset(val): + with open('/sys/devices/platform/dell-s6000-cpld.0/power_reset', 'w') as p: + p.write(str(int(val)) + '\n') + p.flush() + +def gpio_direction(pin,direction): + kernpath = '/sys/class/gpio/gpio'+str(pin)+'/direction' + with open(('kernpath'), 'w') as p: + p.write(str(direction) + '\n') + p.flush() + +def gpio_set(pin,value): + kernpath = '/sys/class/gpio/gpio'+str(pin)+'/value' + with open(('kernpath'), 'w') as p: + p.write(str(int(value)) + '\n') + p.flush() + +def gpio_export(value): + with open('/sys/class/gpio/export', 'w') as p: + p.write(str(int(value)) + '\n') + p.flush() + + +if __name__ == "__main__": + io_reg_write(NVRAM_RES, 0x49, COLD_RESET) + if not os.path.isdir("/sys/class/gpio/gpio10"): + gpio_export(10) + gpio_direction("10","out") + #Toggle GPIO10 pin (to reset MUX) + gpio_set("10",1) + gpio_set("10",0) + power_reset(1) diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/plugins/eeprom.py b/device/dell/x86_64-dell_s6000_s1220-r0/plugins/eeprom.py new file mode 100644 index 00000000000..b326d24f6d4 --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Dell S6000 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-10/10-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/plugins/psuutil.py b/device/dell/x86_64-dell_s6000_s1220-r0/plugins/psuutil.py new file mode 100644 index 00000000000..537605f3975 --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/plugins/psuutil.py @@ -0,0 +1,74 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def get_cpld_register(self, reg_name): + cpld_dir = "/sys/devices/platform/dell-s6000-cpld.0" + retval = 'ERR' + reg_file = cpld_dir +'/' + reg_name + if (not os.path.isfile(reg_file)): + return retval + + try: + with open(reg_file, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", reg_file, "file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + S6000_MAX_PSUS = 2 + return S6000_MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + psu_status = self.get_cpld_register('psu'+str(index - 1)+'_status') + if (psu_status != 'ERR'): + status = int(psu_status, 10) + + presence = self.get_psu_presence(index) + + return (status & presence) + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_presence = self.get_cpld_register('psu'+str(index - 1)+'_prs') + if (psu_presence != 'ERR'): + status = int(psu_presence, 10) + + return status diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/plugins/sfputil.py b/device/dell/x86_64-dell_s6000_s1220-r0/plugins/sfputil.py new file mode 100644 index 00000000000..b27bf4bc22e --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/plugins/sfputil.py @@ -0,0 +1,256 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import datetime + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 31 + PORTS_IN_BLOCK = 32 + + EEPROM_OFFSET = 20 + + _port_to_eeprom_mapping = {} + port_dict = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def get_transceiver_status(self): + + try: + reg_file = open("/sys/devices/platform/dell-s6000-cpld.0/qsfp_modprs") + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + reg_file.close() + + return int(content, 16) + + + def __init__(self): + + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) + + # Get Transceiver status + self.modprs_register = self.get_transceiver_status + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/dell-s6000-cpld.0/qsfp_modprs") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/dell-s6000-cpld.0/qsfp_lpmode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/dell-s6000-cpld.0/qsfp_lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/devices/platform/dell-s6000-cpld.0/qsfp_reset" + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self, timeout=0): + + start_time = time.time() + port_dict = {} + port = self.port_start + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print "get_transceiver_change_event:Invalid timeout value", timeout + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print 'get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + reg_value = self.get_transceiver_status + if reg_value != self.modprs_register: + changed_ports = self.modprs_register ^ reg_value + while port >= self.port_start and port <= self.port_end: + + # Mask off the bit corresponding to our port + mask = (1 << port) + + if changed_ports & mask: + # ModPrsL is active low + if reg_value & mask == 0: + port_dict[port] = '1' + else: + port_dict[port] = '0' + + port += 1 + + # Update reg value + self.modprs_register = reg_value + return True, port_dict + + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + print "get_transceiver_change_event: Should not reach here." + return False, {} diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/pmon_daemon_control.json b/device/dell/x86_64-dell_s6000_s1220-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..94592fa8ceb --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/dell/x86_64-dell_s6000_s1220-r0/sensors.conf b/device/dell/x86_64-dell_s6000_s1220-r0/sensors.conf new file mode 100644 index 00000000000..c87af11afac --- /dev/null +++ b/device/dell/x86_64-dell_s6000_s1220-r0/sensors.conf @@ -0,0 +1,36 @@ +# libsensors configuration file +# -------------------------------------------------- +# + +# tmp75-i2c-11-4c has sensors close to Networking ASIC. +# tmp75-i2c-11-4d has sensors close to NIC. +# tmp75-i2c-11-4e is an ambient temperature sensor. + +chip "tmp75-*" + set temp1_max 50 + set temp1_max_hyst 25 + +# emc1403-i2c-10-4d has following temperature sensors: +# temp1: CPU0 external Temp Sensor +# temp2: CPU1 external Temp Sensor +# temp3: CPU Internal DTS (Internal die, max of all die readings) + +chip "emc1403-*" + set temp1_crit 85 + set temp1_max 50 + set temp2_crit 85 + set temp2_max 50 + set temp3_crit 85 + set temp3_max 50 + +chip "max6620-i2c-*-2a" + ignore fan3 + ignore fan4 + +chip "jc42-*" + set temp1_max 50 + set temp1_crit 85 + +chip "dni_dps460-*" + set temp1_max 50 + set temp2_max 50 diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100-T1 b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100-T1 new file mode 120000 index 00000000000..36b1b840b83 --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100-T1 @@ -0,0 +1 @@ +Force10-S6100 \ No newline at end of file diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/buffers.json.j2 b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/buffers.json.j2 new file mode 100644 index 00000000000..1083a6210fc --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/buffers_defaults_t0.j2 b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..8f55022973f --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/buffers_defaults_t0.j2 @@ -0,0 +1,47 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10875072", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_lossy_pool": { + "size": "9243812", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"15982720" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/buffers_defaults_t1.j2 b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..47a9c81f079 --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/buffers_defaults_t1.j2 @@ -0,0 +1,47 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10875072", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_lossy_pool": { + "size": "9243812", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"15982720" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/pg_profile_lookup.ini b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/pg_profile_lookup.ini new file mode 100644 index 00000000000..dc05d0a100a --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -3 2288 + 25000 5m 1248 2288 53248 -3 2288 + 40000 5m 1248 2288 66560 -3 2288 + 50000 5m 1248 2288 79872 -3 2288 + 100000 5m 1248 2288 165568 -3 2288 + 10000 40m 1248 2288 37024 -3 2288 + 25000 40m 1248 2288 56160 -3 2288 + 40000 40m 1248 2288 71552 -3 2288 + 50000 40m 1248 2288 85696 -3 2288 + 100000 40m 1248 2288 177632 -3 2288 + 10000 300m 1248 2288 46176 -3 2288 + 25000 300m 1248 2288 79040 -3 2288 + 40000 300m 1248 2288 108160 -3 2288 + 50000 300m 1248 2288 141856 -3 2288 + 100000 300m 1248 2288 268736 -3 2288 diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/port_config.ini b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/port_config.ini new file mode 100644 index 00000000000..1922a3e04b5 --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias index speed +Ethernet0 101,102 fortyGigE1/1/1 0 40000 +Ethernet1 103,104 fortyGigE1/1/2 1 40000 +Ethernet2 97,98 fortyGigE1/1/3 2 40000 +Ethernet3 99,100 fortyGigE1/1/4 3 40000 +Ethernet4 69,70 fortyGigE1/1/5 4 40000 +Ethernet5 71,72 fortyGigE1/1/6 5 40000 +Ethernet6 65,66 fortyGigE1/1/7 6 40000 +Ethernet7 67,68 fortyGigE1/1/8 7 40000 +Ethernet8 53,54 fortyGigE1/1/9 8 40000 +Ethernet9 55,56 fortyGigE1/1/10 9 40000 +Ethernet10 49,50 fortyGigE1/1/11 10 40000 +Ethernet11 51,52 fortyGigE1/1/12 11 40000 +Ethernet12 21,22 fortyGigE1/1/13 12 40000 +Ethernet13 23,24 fortyGigE1/1/14 13 40000 +Ethernet14 17,18 fortyGigE1/1/15 14 40000 +Ethernet15 19,20 fortyGigE1/1/16 15 40000 +Ethernet16 25,26 fortyGigE1/2/1 16 40000 +Ethernet17 27,28 fortyGigE1/2/2 17 40000 +Ethernet18 29,30 fortyGigE1/2/3 18 40000 +Ethernet19 31,32 fortyGigE1/2/4 19 40000 +Ethernet20 57,58 fortyGigE1/2/5 20 40000 +Ethernet21 59,60 fortyGigE1/2/6 21 40000 +Ethernet22 61,62 fortyGigE1/2/7 22 40000 +Ethernet23 63,64 fortyGigE1/2/8 23 40000 +Ethernet24 73,74 fortyGigE1/2/9 24 40000 +Ethernet25 75,76 fortyGigE1/2/10 25 40000 +Ethernet26 77,78 fortyGigE1/2/11 26 40000 +Ethernet27 79,80 fortyGigE1/2/12 27 40000 +Ethernet28 105,106 fortyGigE1/2/13 28 40000 +Ethernet29 107,108 fortyGigE1/2/14 29 40000 +Ethernet30 109,110 fortyGigE1/2/15 30 40000 +Ethernet31 111,112 fortyGigE1/2/16 31 40000 +Ethernet32 13,14 fortyGigE1/3/1 32 40000 +Ethernet33 15,16 fortyGigE1/3/2 33 40000 +Ethernet34 9,10 fortyGigE1/3/3 34 40000 +Ethernet35 11,12 fortyGigE1/3/4 35 40000 +Ethernet36 125,126 fortyGigE1/3/5 36 40000 +Ethernet37 127,128 fortyGigE1/3/6 37 40000 +Ethernet38 121,122 fortyGigE1/3/7 38 40000 +Ethernet39 123,124 fortyGigE1/3/8 39 40000 +Ethernet40 93,94 fortyGigE1/3/9 40 40000 +Ethernet41 95,96 fortyGigE1/3/10 41 40000 +Ethernet42 89,90 fortyGigE1/3/11 42 40000 +Ethernet43 91,92 fortyGigE1/3/12 43 40000 +Ethernet44 45,46 fortyGigE1/3/13 44 40000 +Ethernet45 47,48 fortyGigE1/3/14 45 40000 +Ethernet46 41,42 fortyGigE1/3/15 46 40000 +Ethernet47 43,44 fortyGigE1/3/16 47 40000 +Ethernet48 113,114 fortyGigE1/4/1 48 40000 +Ethernet49 115,116 fortyGigE1/4/2 49 40000 +Ethernet50 117,118 fortyGigE1/4/3 50 40000 +Ethernet51 119,120 fortyGigE1/4/4 51 40000 +Ethernet52 1,2 fortyGigE1/4/5 52 40000 +Ethernet53 3,4 fortyGigE1/4/6 53 40000 +Ethernet54 5,6 fortyGigE1/4/7 54 40000 +Ethernet55 7,8 fortyGigE1/4/8 55 40000 +Ethernet56 33,34 fortyGigE1/4/9 56 40000 +Ethernet57 35,36 fortyGigE1/4/10 57 40000 +Ethernet58 37,38 fortyGigE1/4/11 58 40000 +Ethernet59 39,40 fortyGigE1/4/12 59 40000 +Ethernet60 81,82 fortyGigE1/4/13 60 40000 +Ethernet61 83,84 fortyGigE1/4/14 61 40000 +Ethernet62 85,86 fortyGigE1/4/15 62 40000 +Ethernet63 87,88 fortyGigE1/4/16 63 40000 diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/qos.json.j2 b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/sai.profile.j2 b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/sai.profile.j2 new file mode 100644 index 00000000000..df3cbb55829 --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/sai.profile.j2 @@ -0,0 +1,13 @@ +{# Get sai.profile based on switch_role #} +{%- if DEVICE_METADATA is defined -%} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] -%} +{%- if switch_role.lower() == 'torrouter' %} +{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-s6100-64x40G-t0.config.bcm' -%} +{%- else %} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-s6100-64x40G-t1.config.bcm' -%} +{%- endif %} +{%- else %} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-s6100-64x40G-t1.config.bcm' -%} +{%- endif %} +{# Write the contents of sai_ profile_filename to sai.profile file #} +{{ sai_profile_contents }} diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/th-s6100-64x40G-t0.config.bcm b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/th-s6100-64x40G-t0.config.bcm new file mode 100644 index 00000000000..adbef9387ed --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/th-s6100-64x40G-t0.config.bcm @@ -0,0 +1,410 @@ +#TH S6100 64x40 +l3_alpm_enable=2 +pfc_deadlock_seq_control=1 +bcm_stat_interval=2000000 +bcm_num_cos=8 +switch_bypass_mode=0 +mmu_lossless=0 +lpm_scaling_enable=0 +lpm_ipv6_128b_reserved=0 +ipv6_lpm_128b_enable=1 +l2xmsg_mode=1 +oversubscribe_mode=1 +miim_intr_enable=0 + +phy_gearbox_enable=1 +phy_84752=1 +phy_ext_rom_boot=0 +rate_ext_mdio_divisor=0x80 + +serdes_fiber_pref_xe=0 +serdes_if_type_xe=14 + +fpem_mem_entries=32768 + +os=unix + +parity_correction=1 +parity_enable=1 + +xgxs_tx_lane_map_104=0x3210 +xgxs_rx_lane_map_104=0x0312 +phy_xaui_tx_polarity_flip_104=0x0 +phy_xaui_rx_polarity_flip_104=0x0 +port_phy_addr_104=0x1e +port_phy_addr_105=0x1e +dport_map_port_104=1 +dport_map_port_105=2 +xgxs_tx_lane_map_102=0x1032 +xgxs_rx_lane_map_102=0x0132 +phy_xaui_tx_polarity_flip_102=0x3 +phy_xaui_rx_polarity_flip_102=0x3 +phy_xaui_tx_polarity_flip_103=0x3 +phy_xaui_rx_polarity_flip_103=0x3 +port_phy_addr_102=0x1f +port_phy_addr_103=0x1f +dport_map_port_102=3 +dport_map_port_103=4 +xgxs_tx_lane_map_70=0x0123 +xgxs_rx_lane_map_70=0x3201 +phy_xaui_tx_polarity_flip_70=0x3 +phy_xaui_rx_polarity_flip_70=0x3 +phy_xaui_tx_polarity_flip_71=0x3 +phy_xaui_rx_polarity_flip_71=0x3 +port_phy_addr_70=0xE +port_phy_addr_71=0xE +dport_map_port_70=5 +dport_map_port_71=6 +xgxs_tx_lane_map_68=0x2301 +xgxs_rx_lane_map_68=0x1023 +phy_xaui_tx_polarity_flip_68=0x0 +phy_xaui_rx_polarity_flip_68=0x2 +phy_xaui_tx_polarity_flip_69=0x0 +phy_xaui_rx_polarity_flip_69=0x3 +port_phy_addr_68=0xF +port_phy_addr_69=0xF +dport_map_port_68=7 +dport_map_port_69=8 +xgxs_tx_lane_map_44=0x0123 +xgxs_rx_lane_map_44=0x3201 +phy_xaui_tx_polarity_flip_44=0x3 +phy_xaui_rx_polarity_flip_44=0x3 +phy_xaui_tx_polarity_flip_45=0x3 +phy_xaui_rx_polarity_flip_45=0x3 +port_phy_addr_44=0x3e +port_phy_addr_45=0x3e +dport_map_port_44=9 +dport_map_port_45=10 +xgxs_tx_lane_map_42=0x1032 +xgxs_rx_lane_map_42=0x2310 +phy_xaui_tx_polarity_flip_42=0x0 +phy_xaui_rx_polarity_flip_42=0x0 +phy_xaui_tx_polarity_flip_43=0x3 +phy_xaui_rx_polarity_flip_43=0x0 +port_phy_addr_42=0x3f +port_phy_addr_43=0x3f +dport_map_port_42=11 +dport_map_port_43=12 +xgxs_tx_lane_map_11=0x0123 +xgxs_rx_lane_map_11=0x3201 +phy_xaui_tx_polarity_flip_11=0x3 +phy_xaui_rx_polarity_flip_11=0x0 +phy_xaui_tx_polarity_flip_12=0x3 +phy_xaui_rx_polarity_flip_12=0x0 +port_phy_addr_11=0x2E +port_phy_addr_12=0x2E +dport_map_port_11=13 +dport_map_port_12=14 +xgxs_tx_lane_map_9=0x2310 +xgxs_rx_lane_map_9=0x1023 +phy_xaui_tx_polarity_flip_9=0x0 +phy_xaui_rx_polarity_flip_9=0x0 +phy_xaui_tx_polarity_flip_10=0x0 +phy_xaui_rx_polarity_flip_10=0x0 +port_phy_addr_9=0x2F +port_phy_addr_10=0x2F +dport_map_port_9=15 +dport_map_port_10=16 +xgxs_tx_lane_map_13=0x0123 +xgxs_rx_lane_map_13=0x0132 +phy_xaui_tx_polarity_flip_13=0x3 +phy_xaui_rx_polarity_flip_13=0x3 +phy_xaui_tx_polarity_flip_14=0x3 +phy_xaui_rx_polarity_flip_14=0x3 +port_phy_addr_13=0x11e +port_phy_addr_14=0x11e +dport_map_port_13=17 +dport_map_port_14=18 +xgxs_tx_lane_map_15=0x2301 +xgxs_rx_lane_map_15=0x2310 +phy_xaui_tx_polarity_flip_15=0x0 +phy_xaui_rx_polarity_flip_15=0x0 +port_phy_addr_15=0x11f +port_phy_addr_16=0x11f +dport_map_port_15=19 +dport_map_port_16=20 +xgxs_tx_lane_map_46=0x3210 +xgxs_rx_lane_map_46=0x0132 +phy_xaui_tx_polarity_flip_46=0x3 +phy_xaui_rx_polarity_flip_46=0x3 +phy_xaui_tx_polarity_flip_47=0x3 +phy_xaui_rx_polarity_flip_47=0x3 +port_phy_addr_46=0x10e +port_phy_addr_47=0x10e +dport_map_port_46=21 +dport_map_port_47=22 +xgxs_tx_lane_map_48=0x2301 +xgxs_rx_lane_map_48=0x1023 +phy_xaui_tx_polarity_flip_48=0x0 +phy_xaui_rx_polarity_flip_48=0x1 +port_phy_addr_48=0x10F +port_phy_addr_49=0x10F +dport_map_port_48=23 +dport_map_port_49=24 +xgxs_tx_lane_map_72=0x3210 +xgxs_rx_lane_map_72=0x0132 +phy_xaui_tx_polarity_flip_72=0x3 +phy_xaui_rx_polarity_flip_72=0x0 +phy_xaui_tx_polarity_flip_73=0x3 +phy_xaui_rx_polarity_flip_73=0x0 +port_phy_addr_72=0x13e +port_phy_addr_73=0x13e +dport_map_port_72=25 +dport_map_port_73=26 +xgxs_tx_lane_map_74=0x1320 +xgxs_rx_lane_map_74=0x2013 +phy_xaui_tx_polarity_flip_74=0x0 +phy_xaui_rx_polarity_flip_74=0x0 +phy_xaui_tx_polarity_flip_75=0x3 +phy_xaui_rx_polarity_flip_75=0x0 +port_phy_addr_74=0x13f +port_phy_addr_75=0x13f +dport_map_port_74=27 +dport_map_port_75=28 +xgxs_tx_lane_map_106=0x3210 +xgxs_rx_lane_map_106=0x2310 +phy_xaui_tx_polarity_flip_106=0x0 +phy_xaui_rx_polarity_flip_106=0x3 +phy_xaui_tx_polarity_flip_107=0x0 +phy_xaui_rx_polarity_flip_107=0x3 +port_phy_addr_106=0x12e +port_phy_addr_107=0x12e +dport_map_port_106=29 +dport_map_port_107=30 +xgxs_tx_lane_map_108=0x1032 +xgxs_rx_lane_map_108=0x0132 +phy_xaui_tx_polarity_flip_108=0x3 +phy_xaui_rx_polarity_flip_108=0x3 +phy_xaui_tx_polarity_flip_109=0x3 +phy_xaui_rx_polarity_flip_109=0x3 +port_phy_addr_108=0x12f +port_phy_addr_109=0x12f +dport_map_port_108=31 +dport_map_port_109=32 +port_phy_addr_7=0x5e +port_phy_addr_8=0x5e +xgxs_tx_lane_map_7=0x3210 +xgxs_rx_lane_map_7=0x0132 +phy_xaui_tx_polarity_flip_7=0x3 +phy_xaui_rx_polarity_flip_7=0x1 +phy_xaui_tx_polarity_flip_8=0x3 +phy_xaui_rx_polarity_flip_8=0x3 +dport_map_port_7=33 +dport_map_port_8=34 +port_phy_addr_5=0x5f +port_phy_addr_6=0x5f +xgxs_tx_lane_map_5=0x2301 +xgxs_rx_lane_map_5=0x1023 +phy_xaui_tx_polarity_flip_5=0x0 +phy_xaui_rx_polarity_flip_5=0x0 +phy_xaui_tx_polarity_flip_6=0x0 +phy_xaui_tx_polarity_flip_6=0x0 +dport_map_port_5=35 +dport_map_port_6=36 +port_phy_addr_116=0x4e +port_phy_addr_117=0x4e +phy_xaui_tx_polarity_flip_116=0x0 +phy_xaui_rx_polarity_flip_116=0x1 +phy_xaui_tx_polarity_flip_117=0x3 +phy_xaui_rx_polarity_flip_117=0x3 +xgxs_tx_lane_map_116=0x0123 +xgxs_rx_lane_map_116=0x3201 +dport_map_port_116=37 +dport_map_port_117=38 +port_phy_addr_114=0x4f +port_phy_addr_115=0x4f +phy_xaui_tx_polarity_flip_114=0x0 +phy_xaui_rx_polarity_flip_114=0x0 +phy_xaui_tx_polarity_flip_115=0x1 +phy_xaui_rx_polarity_flip_115=0x0 +xgxs_tx_lane_map_114=0x2301 +xgxs_rx_lane_map_114=0x1023 +dport_map_port_114=39 +dport_map_port_115=40 +port_phy_addr_82=0x7e +port_phy_addr_83=0x7e +xgxs_tx_lane_map_82=0x3210 +xgxs_rx_lane_map_82=0x2310 +phy_xaui_tx_polarity_flip_82=0x0 +phy_xaui_rx_polarity_flip_82=0x0 +dport_map_port_82=41 +dport_map_port_83=42 +port_phy_addr_80=0x7f +port_phy_addr_81=0x7f +xgxs_tx_lane_map_80=0x1032 +xgxs_rx_lane_map_80=0x0132 +phy_xaui_tx_polarity_flip_80=0x3 +phy_xaui_rx_polarity_flip_80=0x3 +phy_xaui_tx_polarity_flip_81=0x0 +phy_xaui_rx_polarity_flip_81=0x3 +dport_map_port_80=43 +dport_map_port_81=44 +xgxs_tx_lane_map_40=0x0123 +xgxs_rx_lane_map_40=0x0132 +port_phy_addr_40=0x6e +port_phy_addr_41=0x6e +phy_xaui_tx_polarity_flip_40=0x3 +phy_xaui_rx_polarity_flip_40=0x0 +phy_xaui_tx_polarity_flip_41=0x3 +phy_xaui_rx_polarity_flip_41=0x0 +dport_map_port_40=45 +dport_map_port_41=46 +port_phy_addr_38=0x6f +port_phy_addr_39=0x6f +phy_xaui_tx_polarity_flip_38=0x0 +phy_xaui_rx_polarity_flip_38=0x0 +xgxs_tx_lane_map_38=0x2301 +xgxs_rx_lane_map_38=0x2310 +dport_map_port_38=47 +dport_map_port_39=48 +xgxs_tx_lane_map_110=0x2013 +xgxs_rx_lane_map_110=0x3102 +phy_xaui_tx_polarity_flip_110=0x3 +phy_xaui_rx_polarity_flip_110=0x3 +phy_xaui_tx_polarity_flip_111=0x3 +phy_xaui_rx_polarity_flip_111=0x3 +port_phy_addr_110=0x15e +port_phy_addr_111=0x15e +dport_map_port_110=49 +dport_map_port_111=50 +xgxs_tx_lane_map_112=0x1032 +xgxs_rx_lane_map_112=0x2310 +phy_xaui_tx_polarity_flip_112=0x3 +phy_xaui_rx_polarity_flip_112=0x3 +phy_xaui_tx_polarity_flip_113=0x3 +phy_xaui_rx_polarity_flip_113=0x3 +port_phy_addr_112=0x15f +port_phy_addr_113=0x15f +dport_map_port_112=51 +dport_map_port_113=52 +port_phy_addr_1=0x14e +port_phy_addr_2=0x14e +xgxs_tx_lane_map_1=0x0123 +xgxs_rx_lane_map_1=0x3201 +phy_xaui_tx_polarity_flip_1=0x3 +phy_xaui_rx_polarity_flip_1=0x3 +phy_xaui_tx_polarity_flip_2=0x3 +phy_xaui_rx_polarity_flip_2=0x3 +dport_map_port_1=53 +dport_map_port_2=54 +xgxs_tx_lane_map_3=0x1023 +xgxs_rx_lane_map_3=0x2310 +port_phy_addr_3=0x14f +port_phy_addr_4=0x14f +phy_xaui_tx_polarity_flip_3=0x3 +phy_xaui_rx_polarity_flip_3=0x0 +phy_xaui_tx_polarity_flip_4=0x3 +phy_xaui_rx_polarity_flip_4=0x3 +dport_map_port_3=55 +dport_map_port_4=56 +port_phy_addr_34=0x17e +port_phy_addr_35=0x17e +xgxs_tx_lane_map_34=0x0123 +xgxs_rx_lane_map_34=0x0132 +phy_xaui_tx_polarity_flip_34=0x3 +phy_xaui_rx_polarity_flip_34=0x0 +phy_xaui_tx_polarity_flip_35=0x3 +phy_xaui_rx_polarity_flip_35=0x0 +dport_map_port_34=57 +dport_map_port_35=58 +port_phy_addr_36=0x17f +port_phy_addr_37=0x17f +xgxs_tx_lane_map_36=0x2301 +xgxs_rx_lane_map_36=0x2310 +phy_xaui_tx_polarity_flip_36=0x0 +phy_xaui_rx_polarity_flip_36=0x3 +phy_xaui_tx_polarity_flip_37=0x3 +phy_xaui_rx_polarity_flip_37=0x3 +dport_map_port_36=59 +dport_map_port_37=60 +port_phy_addr_76=0x16e +port_phy_addr_77=0x16e +xgxs_tx_lane_map_76=0x3210 +xgxs_rx_lane_map_76=0x2310 +phy_xaui_tx_polarity_flip_76=0x0 +phy_xaui_rx_polarity_flip_76=0x3 +phy_xaui_tx_polarity_flip_77=0x0 +phy_xaui_rx_polarity_flip_77=0x3 +dport_map_port_76=61 +dport_map_port_77=62 +port_phy_addr_78=0x16f +port_phy_addr_79=0x16f +xgxs_tx_lane_map_78=0x1032 +xgxs_rx_lane_map_78=0x0132 +phy_xaui_tx_polarity_flip_78=0x3 +phy_xaui_rx_polarity_flip_78=0x3 +phy_xaui_tx_polarity_flip_79=0x3 +phy_xaui_rx_polarity_flip_79=0x3 +dport_map_port_78=63 +dport_map_port_79=64 +pbmp_xport_xe=0x3fffd0000ffff40003fffc0001fffe +portmap_33=132:10 +portmap_67=133:10 +portmap_101=134:10 +portmap_135=135:10 +portmap_1=1:40:2 +portmap_2=3:40:2 +portmap_3=5:40:2 +portmap_4=7:40:2 +portmap_5=9:40:2 +portmap_6=11:40:2 +portmap_7=13:40:2 +portmap_8=15:40:2 +portmap_9=17:40:2 +portmap_10=19:40:2 +portmap_11=21:40:2 +portmap_12=23:40:2 +portmap_13=25:40:2 +portmap_14=27:40:2 +portmap_15=29:40:2 +portmap_16=31:40:2 +portmap_34=33:40:2 +portmap_35=35:40:2 +portmap_36=37:40:2 +portmap_37=39:40:2 +portmap_38=41:40:2 +portmap_39=43:40:2 +portmap_40=45:40:2 +portmap_41=47:40:2 +portmap_42=49:40:2 +portmap_43=51:40:2 +portmap_44=53:40:2 +portmap_45=55:40:2 +portmap_46=57:40:2 +portmap_47=59:40:2 +portmap_48=61:40:2 +portmap_49=63:40:2 +portmap_68=65:40:2 +portmap_69=67:40:2 +portmap_70=69:40:2 +portmap_71=71:40:2 +portmap_72=73:40:2 +portmap_73=75:40:2 +portmap_74=77:40:2 +portmap_75=79:40:2 +portmap_76=81:40:2 +portmap_77=83:40:2 +portmap_78=85:40:2 +portmap_79=87:40:2 +portmap_80=89:40:2 +portmap_81=91:40:2 +portmap_82=93:40:2 +portmap_83=95:40:2 +portmap_102=97:40:2 +portmap_103=99:40:2 +portmap_104=101:40:2 +portmap_105=103:40:2 +portmap_106=105:40:2 +portmap_107=107:40:2 +portmap_108=109:40:2 +portmap_109=111:40:2 +portmap_110=113:40:2 +portmap_111=115:40:2 +portmap_112=117:40:2 +portmap_113=119:40:2 +portmap_114=121:40:2 +portmap_115=123:40:2 +portmap_116=125:40:2 +portmap_117=127:40:2 + +mmu_init_config="MSFT-TH-Tier0" diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/th-s6100-64x40G-t1.config.bcm b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/th-s6100-64x40G-t1.config.bcm new file mode 100644 index 00000000000..f9dc619849d --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/Force10-S6100/th-s6100-64x40G-t1.config.bcm @@ -0,0 +1,410 @@ +#TH S6100 64x40 +l3_alpm_enable=2 +pfc_deadlock_seq_control=1 +bcm_stat_interval=2000000 +bcm_num_cos=8 +switch_bypass_mode=0 +mmu_lossless=0 +lpm_scaling_enable=0 +lpm_ipv6_128b_reserved=0 +ipv6_lpm_128b_enable=1 +l2xmsg_mode=1 +oversubscribe_mode=1 +miim_intr_enable=0 + +phy_gearbox_enable=1 +phy_84752=1 +phy_ext_rom_boot=0 +rate_ext_mdio_divisor=0x80 + +serdes_fiber_pref_xe=0 +serdes_if_type_xe=14 + +fpem_mem_entries=32768 + +os=unix + +parity_correction=1 +parity_enable=1 + +xgxs_tx_lane_map_104=0x3210 +xgxs_rx_lane_map_104=0x0312 +phy_xaui_tx_polarity_flip_104=0x0 +phy_xaui_rx_polarity_flip_104=0x0 +port_phy_addr_104=0x1e +port_phy_addr_105=0x1e +dport_map_port_104=1 +dport_map_port_105=2 +xgxs_tx_lane_map_102=0x1032 +xgxs_rx_lane_map_102=0x0132 +phy_xaui_tx_polarity_flip_102=0x3 +phy_xaui_rx_polarity_flip_102=0x3 +phy_xaui_tx_polarity_flip_103=0x3 +phy_xaui_rx_polarity_flip_103=0x3 +port_phy_addr_102=0x1f +port_phy_addr_103=0x1f +dport_map_port_102=3 +dport_map_port_103=4 +xgxs_tx_lane_map_70=0x0123 +xgxs_rx_lane_map_70=0x3201 +phy_xaui_tx_polarity_flip_70=0x3 +phy_xaui_rx_polarity_flip_70=0x3 +phy_xaui_tx_polarity_flip_71=0x3 +phy_xaui_rx_polarity_flip_71=0x3 +port_phy_addr_70=0xE +port_phy_addr_71=0xE +dport_map_port_70=5 +dport_map_port_71=6 +xgxs_tx_lane_map_68=0x2301 +xgxs_rx_lane_map_68=0x1023 +phy_xaui_tx_polarity_flip_68=0x0 +phy_xaui_rx_polarity_flip_68=0x2 +phy_xaui_tx_polarity_flip_69=0x0 +phy_xaui_rx_polarity_flip_69=0x3 +port_phy_addr_68=0xF +port_phy_addr_69=0xF +dport_map_port_68=7 +dport_map_port_69=8 +xgxs_tx_lane_map_44=0x0123 +xgxs_rx_lane_map_44=0x3201 +phy_xaui_tx_polarity_flip_44=0x3 +phy_xaui_rx_polarity_flip_44=0x3 +phy_xaui_tx_polarity_flip_45=0x3 +phy_xaui_rx_polarity_flip_45=0x3 +port_phy_addr_44=0x3e +port_phy_addr_45=0x3e +dport_map_port_44=9 +dport_map_port_45=10 +xgxs_tx_lane_map_42=0x1032 +xgxs_rx_lane_map_42=0x2310 +phy_xaui_tx_polarity_flip_42=0x0 +phy_xaui_rx_polarity_flip_42=0x0 +phy_xaui_tx_polarity_flip_43=0x3 +phy_xaui_rx_polarity_flip_43=0x0 +port_phy_addr_42=0x3f +port_phy_addr_43=0x3f +dport_map_port_42=11 +dport_map_port_43=12 +xgxs_tx_lane_map_11=0x0123 +xgxs_rx_lane_map_11=0x3201 +phy_xaui_tx_polarity_flip_11=0x3 +phy_xaui_rx_polarity_flip_11=0x0 +phy_xaui_tx_polarity_flip_12=0x3 +phy_xaui_rx_polarity_flip_12=0x0 +port_phy_addr_11=0x2E +port_phy_addr_12=0x2E +dport_map_port_11=13 +dport_map_port_12=14 +xgxs_tx_lane_map_9=0x2310 +xgxs_rx_lane_map_9=0x1023 +phy_xaui_tx_polarity_flip_9=0x0 +phy_xaui_rx_polarity_flip_9=0x0 +phy_xaui_tx_polarity_flip_10=0x0 +phy_xaui_rx_polarity_flip_10=0x0 +port_phy_addr_9=0x2F +port_phy_addr_10=0x2F +dport_map_port_9=15 +dport_map_port_10=16 +xgxs_tx_lane_map_13=0x0123 +xgxs_rx_lane_map_13=0x0132 +phy_xaui_tx_polarity_flip_13=0x3 +phy_xaui_rx_polarity_flip_13=0x3 +phy_xaui_tx_polarity_flip_14=0x3 +phy_xaui_rx_polarity_flip_14=0x3 +port_phy_addr_13=0x11e +port_phy_addr_14=0x11e +dport_map_port_13=17 +dport_map_port_14=18 +xgxs_tx_lane_map_15=0x2301 +xgxs_rx_lane_map_15=0x2310 +phy_xaui_tx_polarity_flip_15=0x0 +phy_xaui_rx_polarity_flip_15=0x0 +port_phy_addr_15=0x11f +port_phy_addr_16=0x11f +dport_map_port_15=19 +dport_map_port_16=20 +xgxs_tx_lane_map_46=0x3210 +xgxs_rx_lane_map_46=0x0132 +phy_xaui_tx_polarity_flip_46=0x3 +phy_xaui_rx_polarity_flip_46=0x3 +phy_xaui_tx_polarity_flip_47=0x3 +phy_xaui_rx_polarity_flip_47=0x3 +port_phy_addr_46=0x10e +port_phy_addr_47=0x10e +dport_map_port_46=21 +dport_map_port_47=22 +xgxs_tx_lane_map_48=0x2301 +xgxs_rx_lane_map_48=0x1023 +phy_xaui_tx_polarity_flip_48=0x0 +phy_xaui_rx_polarity_flip_48=0x1 +port_phy_addr_48=0x10F +port_phy_addr_49=0x10F +dport_map_port_48=23 +dport_map_port_49=24 +xgxs_tx_lane_map_72=0x3210 +xgxs_rx_lane_map_72=0x0132 +phy_xaui_tx_polarity_flip_72=0x3 +phy_xaui_rx_polarity_flip_72=0x0 +phy_xaui_tx_polarity_flip_73=0x3 +phy_xaui_rx_polarity_flip_73=0x0 +port_phy_addr_72=0x13e +port_phy_addr_73=0x13e +dport_map_port_72=25 +dport_map_port_73=26 +xgxs_tx_lane_map_74=0x1320 +xgxs_rx_lane_map_74=0x2013 +phy_xaui_tx_polarity_flip_74=0x0 +phy_xaui_rx_polarity_flip_74=0x0 +phy_xaui_tx_polarity_flip_75=0x3 +phy_xaui_rx_polarity_flip_75=0x0 +port_phy_addr_74=0x13f +port_phy_addr_75=0x13f +dport_map_port_74=27 +dport_map_port_75=28 +xgxs_tx_lane_map_106=0x3210 +xgxs_rx_lane_map_106=0x2310 +phy_xaui_tx_polarity_flip_106=0x0 +phy_xaui_rx_polarity_flip_106=0x3 +phy_xaui_tx_polarity_flip_107=0x0 +phy_xaui_rx_polarity_flip_107=0x3 +port_phy_addr_106=0x12e +port_phy_addr_107=0x12e +dport_map_port_106=29 +dport_map_port_107=30 +xgxs_tx_lane_map_108=0x1032 +xgxs_rx_lane_map_108=0x0132 +phy_xaui_tx_polarity_flip_108=0x3 +phy_xaui_rx_polarity_flip_108=0x3 +phy_xaui_tx_polarity_flip_109=0x3 +phy_xaui_rx_polarity_flip_109=0x3 +port_phy_addr_108=0x12f +port_phy_addr_109=0x12f +dport_map_port_108=31 +dport_map_port_109=32 +port_phy_addr_7=0x5e +port_phy_addr_8=0x5e +xgxs_tx_lane_map_7=0x3210 +xgxs_rx_lane_map_7=0x0132 +phy_xaui_tx_polarity_flip_7=0x3 +phy_xaui_rx_polarity_flip_7=0x1 +phy_xaui_tx_polarity_flip_8=0x3 +phy_xaui_rx_polarity_flip_8=0x3 +dport_map_port_7=33 +dport_map_port_8=34 +port_phy_addr_5=0x5f +port_phy_addr_6=0x5f +xgxs_tx_lane_map_5=0x2301 +xgxs_rx_lane_map_5=0x1023 +phy_xaui_tx_polarity_flip_5=0x0 +phy_xaui_rx_polarity_flip_5=0x0 +phy_xaui_tx_polarity_flip_6=0x0 +phy_xaui_tx_polarity_flip_6=0x0 +dport_map_port_5=35 +dport_map_port_6=36 +port_phy_addr_116=0x4e +port_phy_addr_117=0x4e +phy_xaui_tx_polarity_flip_116=0x0 +phy_xaui_rx_polarity_flip_116=0x1 +phy_xaui_tx_polarity_flip_117=0x3 +phy_xaui_rx_polarity_flip_117=0x3 +xgxs_tx_lane_map_116=0x0123 +xgxs_rx_lane_map_116=0x3201 +dport_map_port_116=37 +dport_map_port_117=38 +port_phy_addr_114=0x4f +port_phy_addr_115=0x4f +phy_xaui_tx_polarity_flip_114=0x0 +phy_xaui_rx_polarity_flip_114=0x0 +phy_xaui_tx_polarity_flip_115=0x1 +phy_xaui_rx_polarity_flip_115=0x0 +xgxs_tx_lane_map_114=0x2301 +xgxs_rx_lane_map_114=0x1023 +dport_map_port_114=39 +dport_map_port_115=40 +port_phy_addr_82=0x7e +port_phy_addr_83=0x7e +xgxs_tx_lane_map_82=0x3210 +xgxs_rx_lane_map_82=0x2310 +phy_xaui_tx_polarity_flip_82=0x0 +phy_xaui_rx_polarity_flip_82=0x0 +dport_map_port_82=41 +dport_map_port_83=42 +port_phy_addr_80=0x7f +port_phy_addr_81=0x7f +xgxs_tx_lane_map_80=0x1032 +xgxs_rx_lane_map_80=0x0132 +phy_xaui_tx_polarity_flip_80=0x3 +phy_xaui_rx_polarity_flip_80=0x3 +phy_xaui_tx_polarity_flip_81=0x0 +phy_xaui_rx_polarity_flip_81=0x3 +dport_map_port_80=43 +dport_map_port_81=44 +xgxs_tx_lane_map_40=0x0123 +xgxs_rx_lane_map_40=0x0132 +port_phy_addr_40=0x6e +port_phy_addr_41=0x6e +phy_xaui_tx_polarity_flip_40=0x3 +phy_xaui_rx_polarity_flip_40=0x0 +phy_xaui_tx_polarity_flip_41=0x3 +phy_xaui_rx_polarity_flip_41=0x0 +dport_map_port_40=45 +dport_map_port_41=46 +port_phy_addr_38=0x6f +port_phy_addr_39=0x6f +phy_xaui_tx_polarity_flip_38=0x0 +phy_xaui_rx_polarity_flip_38=0x0 +xgxs_tx_lane_map_38=0x2301 +xgxs_rx_lane_map_38=0x2310 +dport_map_port_38=47 +dport_map_port_39=48 +xgxs_tx_lane_map_110=0x2013 +xgxs_rx_lane_map_110=0x3102 +phy_xaui_tx_polarity_flip_110=0x3 +phy_xaui_rx_polarity_flip_110=0x3 +phy_xaui_tx_polarity_flip_111=0x3 +phy_xaui_rx_polarity_flip_111=0x3 +port_phy_addr_110=0x15e +port_phy_addr_111=0x15e +dport_map_port_110=49 +dport_map_port_111=50 +xgxs_tx_lane_map_112=0x1032 +xgxs_rx_lane_map_112=0x2310 +phy_xaui_tx_polarity_flip_112=0x3 +phy_xaui_rx_polarity_flip_112=0x3 +phy_xaui_tx_polarity_flip_113=0x3 +phy_xaui_rx_polarity_flip_113=0x3 +port_phy_addr_112=0x15f +port_phy_addr_113=0x15f +dport_map_port_112=51 +dport_map_port_113=52 +port_phy_addr_1=0x14e +port_phy_addr_2=0x14e +xgxs_tx_lane_map_1=0x0123 +xgxs_rx_lane_map_1=0x3201 +phy_xaui_tx_polarity_flip_1=0x3 +phy_xaui_rx_polarity_flip_1=0x3 +phy_xaui_tx_polarity_flip_2=0x3 +phy_xaui_rx_polarity_flip_2=0x3 +dport_map_port_1=53 +dport_map_port_2=54 +xgxs_tx_lane_map_3=0x1023 +xgxs_rx_lane_map_3=0x2310 +port_phy_addr_3=0x14f +port_phy_addr_4=0x14f +phy_xaui_tx_polarity_flip_3=0x3 +phy_xaui_rx_polarity_flip_3=0x0 +phy_xaui_tx_polarity_flip_4=0x3 +phy_xaui_rx_polarity_flip_4=0x3 +dport_map_port_3=55 +dport_map_port_4=56 +port_phy_addr_34=0x17e +port_phy_addr_35=0x17e +xgxs_tx_lane_map_34=0x0123 +xgxs_rx_lane_map_34=0x0132 +phy_xaui_tx_polarity_flip_34=0x3 +phy_xaui_rx_polarity_flip_34=0x0 +phy_xaui_tx_polarity_flip_35=0x3 +phy_xaui_rx_polarity_flip_35=0x0 +dport_map_port_34=57 +dport_map_port_35=58 +port_phy_addr_36=0x17f +port_phy_addr_37=0x17f +xgxs_tx_lane_map_36=0x2301 +xgxs_rx_lane_map_36=0x2310 +phy_xaui_tx_polarity_flip_36=0x0 +phy_xaui_rx_polarity_flip_36=0x3 +phy_xaui_tx_polarity_flip_37=0x3 +phy_xaui_rx_polarity_flip_37=0x3 +dport_map_port_36=59 +dport_map_port_37=60 +port_phy_addr_76=0x16e +port_phy_addr_77=0x16e +xgxs_tx_lane_map_76=0x3210 +xgxs_rx_lane_map_76=0x2310 +phy_xaui_tx_polarity_flip_76=0x0 +phy_xaui_rx_polarity_flip_76=0x3 +phy_xaui_tx_polarity_flip_77=0x0 +phy_xaui_rx_polarity_flip_77=0x3 +dport_map_port_76=61 +dport_map_port_77=62 +port_phy_addr_78=0x16f +port_phy_addr_79=0x16f +xgxs_tx_lane_map_78=0x1032 +xgxs_rx_lane_map_78=0x0132 +phy_xaui_tx_polarity_flip_78=0x3 +phy_xaui_rx_polarity_flip_78=0x3 +phy_xaui_tx_polarity_flip_79=0x3 +phy_xaui_rx_polarity_flip_79=0x3 +dport_map_port_78=63 +dport_map_port_79=64 +pbmp_xport_xe=0x3fffd0000ffff40003fffc0001fffe +portmap_33=132:10 +portmap_67=133:10 +portmap_101=134:10 +portmap_135=135:10 +portmap_1=1:40:2 +portmap_2=3:40:2 +portmap_3=5:40:2 +portmap_4=7:40:2 +portmap_5=9:40:2 +portmap_6=11:40:2 +portmap_7=13:40:2 +portmap_8=15:40:2 +portmap_9=17:40:2 +portmap_10=19:40:2 +portmap_11=21:40:2 +portmap_12=23:40:2 +portmap_13=25:40:2 +portmap_14=27:40:2 +portmap_15=29:40:2 +portmap_16=31:40:2 +portmap_34=33:40:2 +portmap_35=35:40:2 +portmap_36=37:40:2 +portmap_37=39:40:2 +portmap_38=41:40:2 +portmap_39=43:40:2 +portmap_40=45:40:2 +portmap_41=47:40:2 +portmap_42=49:40:2 +portmap_43=51:40:2 +portmap_44=53:40:2 +portmap_45=55:40:2 +portmap_46=57:40:2 +portmap_47=59:40:2 +portmap_48=61:40:2 +portmap_49=63:40:2 +portmap_68=65:40:2 +portmap_69=67:40:2 +portmap_70=69:40:2 +portmap_71=71:40:2 +portmap_72=73:40:2 +portmap_73=75:40:2 +portmap_74=77:40:2 +portmap_75=79:40:2 +portmap_76=81:40:2 +portmap_77=83:40:2 +portmap_78=85:40:2 +portmap_79=87:40:2 +portmap_80=89:40:2 +portmap_81=91:40:2 +portmap_82=93:40:2 +portmap_83=95:40:2 +portmap_102=97:40:2 +portmap_103=99:40:2 +portmap_104=101:40:2 +portmap_105=103:40:2 +portmap_106=105:40:2 +portmap_107=107:40:2 +portmap_108=109:40:2 +portmap_109=111:40:2 +portmap_110=113:40:2 +portmap_111=115:40:2 +portmap_112=117:40:2 +portmap_113=119:40:2 +portmap_114=121:40:2 +portmap_115=123:40:2 +portmap_116=125:40:2 +portmap_117=127:40:2 + +mmu_init_config="MSFT-TH-Tier1" diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/bin/S6100-BIOS-3.25.0.2-7.bin b/device/dell/x86_64-dell_s6100_c2538-r0/bin/S6100-BIOS-3.25.0.2-7.bin new file mode 100644 index 00000000000..e6371a2602d Binary files /dev/null and b/device/dell/x86_64-dell_s6100_c2538-r0/bin/S6100-BIOS-3.25.0.2-7.bin differ diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/default_sku b/device/dell/x86_64-dell_s6100_c2538-r0/default_sku new file mode 100644 index 00000000000..0ab29200567 --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/default_sku @@ -0,0 +1 @@ +Force10-S6100 t1 diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/installer.conf b/device/dell/x86_64-dell_s6100_c2538-r0/installer.conf new file mode 100644 index 00000000000..0a9a3a639eb --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich" diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/led_proc_init.soc b/device/dell/x86_64-dell_s6100_c2538-r0/led_proc_init.soc new file mode 100644 index 00000000000..a4a44f15bcf --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/led_proc_init.soc @@ -0,0 +1,13 @@ +# LED microprocessor initialization for Dell S6100 + +led 0 stop +led 0 prog 02 00 60 FE 2E FE 67 2C 86 FE 67 5B 67 5B 67 5B 86 FE 2E FE 67 2C 86 FE 86 FE 06 FE D2 40 71 04 12 FF 85 05 D2 05 71 2A 52 00 3A A0 32 08 97 71 33 77 5B 32 00 32 01 B7 97 75 42 12 BC FE FE 02 0A 50 12 BC FE FE 95 75 4C 85 77 54 16 FF DA 02 71 5B 77 54 22 0E 87 22 0E 87 57 22 0F 87 22 0F 87 57 22 0F 87 22 0E 87 57 +led 0 auto on +led 0 start + +led 1 stop +led 1 prog 02 00 60 FE 2E FE 67 2C 86 FE 67 5B 67 5B 67 5B 86 FE 2E FE 67 2C 86 FE 86 FE 06 FE D2 40 71 04 12 FF 85 05 D2 05 71 2A 52 00 3A A0 32 08 97 71 33 77 5B 32 00 32 01 B7 97 75 42 12 BC FE FE 02 0A 50 12 BC FE FE 95 75 4C 85 77 54 16 FF DA 02 71 5B 77 54 22 0E 87 22 0E 87 57 22 0F 87 22 0F 87 57 22 0F 87 22 0E 87 57 +led 1 auto on +led 1 start + +led 2 stop diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/plugins/eeprom.py b/device/dell/x86_64-dell_s6100_c2538-r0/plugins/eeprom.py new file mode 100644 index 00000000000..7265b90efb1 --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/plugins/eeprom.py @@ -0,0 +1,33 @@ +#!/usr/bin/env python + +############################################################################# +# Dell S6100 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0050/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) + + def serial_number_str(self, e): + """Return service tag instead of serial number""" + + (is_valid, results) = self.get_tlv_field(e, self._TLV_CODE_SERVICE_TAG) + if is_valid == False: + return "Bad service tag" + + # 'results' is a list containing 3 elements, type (int), length (int), + # and value (string) of the requested TLV + return results[2] diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/plugins/psuutil.py b/device/dell/x86_64-dell_s6100_c2538-r0/plugins/psuutil.py new file mode 100644 index 00000000000..2f367380152 --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/plugins/psuutil.py @@ -0,0 +1,82 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +HWMON_DIR = "/sys/devices/platform/SMF.512/hwmon/" +HWMON_NODE = os.listdir(HWMON_DIR)[0] + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + # Get a mailbox register + def get_pmc_register(self, reg_name): + mailbox_dir = HWMON_DIR + HWMON_NODE + retval = 'ERR' + mb_reg_file = mailbox_dir+'/' + reg_name + if (not os.path.isfile(mb_reg_file)): + logging.error(mb_reg_file, "not found !") + return retval + + try: + with open(mb_reg_file, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", mb_reg_file, "file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + S6100_MAX_PSUS = 2 + return S6100_MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + psu_status = self.get_pmc_register('psu'+str(index)+'_presence') + if (psu_status != 'ERR'): + psu_status = int(psu_status, 16) + # Check for PSU statuse + if (~psu_status & 0b1000) or (psu_status & 0b0100): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_presence = self.get_pmc_register('psu'+str(index)+'_presence') + if (psu_presence != 'ERR'): + psu_presence = int(psu_presence, 16) + # Check for PSU presence + if (~psu_presence & 0b1): + status = 1 + + return status diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/plugins/sfputil.py b/device/dell/x86_64-dell_s6100_c2538-r0/plugins/sfputil.py new file mode 100644 index 00000000000..ff4426ba10c --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/plugins/sfputil.py @@ -0,0 +1,637 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# +# +-i2c----+--------+ +# | 6 | 7 | +# | +-------------+ | +# | |IOM1 | IOM3 | | +# | |IOM2 | IOM4 | | +# | +-------------+ | +# | 8 | 9 | +# +--------+--------+ + + +try: + import time + import os + import logging + import select + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 63 + PORTS_IN_BLOCK = 64 + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 0: [6, 18, 34, 50, 66], + 1: [6, 19, 35, 51, 67], + 2: [6, 20, 36, 52, 68], + 3: [6, 21, 37, 53, 69], + 4: [6, 22, 38, 54, 70], + 5: [6, 23, 39, 55, 71], + 6: [6, 24, 40, 56, 72], + 7: [6, 25, 41, 57, 73], + 8: [6, 26, 42, 58, 74], + 9: [6, 27, 43, 59, 75], + 10: [6, 28, 44, 60, 76], + 11: [6, 29, 45, 61, 77], + 12: [6, 30, 46, 62, 78], + 13: [6, 31, 47, 63, 79], + 14: [6, 32, 48, 64, 80], + 15: [6, 33, 49, 65, 81], + 16: [8, 18, 34, 50, 66], + 17: [8, 19, 35, 51, 67], + 18: [8, 20, 36, 52, 68], + 19: [8, 21, 37, 53, 69], + 20: [8, 22, 38, 54, 70], + 21: [8, 23, 39, 55, 71], + 22: [8, 24, 40, 56, 72], + 23: [8, 25, 41, 57, 73], + 24: [8, 26, 42, 58, 74], + 25: [8, 27, 43, 59, 75], + 26: [8, 28, 44, 60, 76], + 27: [8, 29, 45, 61, 77], + 28: [8, 30, 46, 62, 78], + 29: [8, 31, 47, 63, 79], + 30: [8, 32, 48, 64, 80], + 31: [8, 33, 49, 65, 81], + 32: [7, 18, 34, 50, 66], + 33: [7, 19, 35, 51, 67], + 34: [7, 20, 36, 52, 68], + 35: [7, 21, 37, 53, 69], + 36: [7, 22, 38, 54, 70], + 37: [7, 23, 39, 55, 71], + 38: [7, 24, 40, 56, 72], + 39: [7, 25, 41, 57, 73], + 40: [7, 26, 42, 58, 74], + 41: [7, 27, 43, 59, 75], + 42: [7, 28, 44, 60, 76], + 43: [7, 29, 45, 61, 77], + 44: [7, 30, 46, 62, 78], + 45: [7, 31, 47, 63, 79], + 46: [7, 32, 48, 64, 80], + 47: [7, 33, 49, 65, 81], + 48: [9, 18, 34, 50, 66], + 49: [9, 19, 35, 51, 67], + 50: [9, 20, 36, 52, 68], + 51: [9, 21, 37, 53, 69], + 52: [9, 22, 38, 54, 70], + 53: [9, 23, 39, 55, 71], + 54: [9, 24, 40, 56, 72], + 55: [9, 25, 41, 57, 73], + 56: [9, 26, 42, 58, 74], + 57: [9, 27, 43, 59, 75], + 58: [9, 28, 44, 60, 76], + 59: [9, 29, 45, 61, 77], + 60: [9, 30, 46, 62, 78], + 61: [9, 31, 47, 63, 79], + 62: [9, 32, 48, 64, 80], + 63: [9, 33, 49, 65, 81] + } + + IOM_1_PORT_START = 0 + IOM_1_PORT_END = 15 + + IOM_2_PORT_START = 16 + IOM_2_PORT_END = 31 + + IOM_3_PORT_START = 32 + IOM_3_PORT_END = 47 + + IOM_4_PORT_START = 48 + IOM_4_PORT_END = 63 + + BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{0}-003e/" + OIR_FD_PATH = "/sys/devices/platform/dell_ich.0/sci_int_gpio_sus6" + + oir_fd = -1 + epoll = -1 + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def iom1_port_start(self): + return self.IOM_1_PORT_START + + @property + def iom1_port_end(self): + return self.IOM_1_PORT_END + + @property + def iom2_port_start(self): + return self.IOM_2_PORT_START + + @property + def iom2_port_end(self): + return self.IOM_2_PORT_END + + @property + def iom3_port_start(self): + return self.IOM_3_PORT_START + + @property + def iom3_port_end(self): + return self.IOM_3_PORT_END + + @property + def iom4_port_start(self): + return self.IOM_4_PORT_START + + @property + def iom4_port_end(self): + return self.IOM_4_PORT_END + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def port_to_i2c_mapping(self): + return self._port_to_i2c_mapping + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/i2c-{1}/{1}-0050/eeprom" + global port_to_eeprom_path + + for port_num in range(0, self.port_end + 1): + if port_num >= self.iom1_port_start and port_num <=\ + self.iom1_port_end: + assigned = 0 + # i2c-6 + for x in range(1, 5): + port_to_eeprom_path = eeprom_path.format( + self.port_to_i2c_mapping[port_num][0], + self.port_to_i2c_mapping[port_num][x]) + if (os.path.isfile(port_to_eeprom_path)): + self.port_to_eeprom_mapping[port_num] =\ + port_to_eeprom_path + assigned = 1 + elif (not assigned): + self.port_to_eeprom_mapping[port_num] =\ + "No IOM" + + elif(port_num >= self.iom2_port_start and + port_num <= self.iom2_port_end): + assigned = 0 + # i2c-8 + for x in range(1, 5): + port_to_eeprom_path = eeprom_path.format( + self.port_to_i2c_mapping[port_num][0], + self.port_to_i2c_mapping[port_num][x]) + if (os.path.isfile(port_to_eeprom_path)): + self.port_to_eeprom_mapping[port_num] =\ + port_to_eeprom_path + assigned = 1 + elif (not assigned): + self.port_to_eeprom_mapping[port_num] =\ + "No IOM" + + elif(port_num >= self.iom3_port_start and port_num <= + self.iom3_port_end): + assigned = 0 + # i2c-7 + for x in range(1, 5): + port_to_eeprom_path = eeprom_path.format( + self.port_to_i2c_mapping[port_num][0], + self.port_to_i2c_mapping[port_num][x]) + if (os.path.isfile(port_to_eeprom_path)): + self.port_to_eeprom_mapping[port_num] =\ + port_to_eeprom_path + assigned = 1 + elif (not assigned): + self.port_to_eeprom_mapping[port_num] =\ + "No IOM" + + elif(port_num >= self.iom4_port_start and port_num <= + self.iom4_port_end): + assigned = 0 + # i2c-9 + for x in range(1, 5): + port_to_eeprom_path = eeprom_path.format( + self.port_to_i2c_mapping[port_num][0], + self.port_to_i2c_mapping[port_num][x]) + if (os.path.isfile(port_to_eeprom_path)): + self.port_to_eeprom_mapping[port_num] =\ + port_to_eeprom_path + assigned = 1 + elif (not assigned): + self.port_to_eeprom_mapping[port_num] =\ + "No IOM" + + SfpUtilBase.__init__(self) + + def __del__(self): + if self.oir_fd != -1: + self.epoll.unregister(self.oir_fd.fileno()) + self.epoll.close() + self.oir_fd.close() + + def get_presence(self, port_num): + + global i2c_line + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # port_num and i2c match + if(port_num >= self.iom1_port_start and port_num <= + self.iom1_port_end): + i2c_line = 14 + elif(port_num >= self.iom2_port_start and port_num <= + self.iom2_port_end): + i2c_line = 16 + elif(port_num >= self.iom3_port_start and port_num <= + self.iom3_port_end): + i2c_line = 15 + elif(port_num >= self.iom4_port_start and port_num <= + self.iom4_port_end): + i2c_line = 17 + + try: + qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_modprs" + reg_file = open(qsfp_path, "r") + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # Absence of IOM throws read error + if (content == 'read error'): + return False + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Rationalize port settings + if port_num > 15: + port_num = port_num % 16 + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # port_num and i2c match + if(port_num >= self.iom1_port_start and port_num <= + self.iom1_port_end): + i2c_line = 14 + elif(port_num >= self.iom2_port_start and port_num <= + self.iom2_port_end): + i2c_line = 16 + elif(port_num >= self.iom3_port_start and port_num <= + self.iom3_port_end): + i2c_line = 15 + elif(port_num >= self.iom4_port_start and port_num <= + self.iom4_port_end): + i2c_line = 17 + + try: + qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode" + reg_file = open(qsfp_path, "r") + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # Absence of IOM throws read error + if (content == 'read error'): + return False + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Rationalize port settings + if port_num > 15: + port_num = port_num % 16 + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # port_num and i2c match + if(port_num >= self.iom1_port_start and port_num <= + self.iom1_port_end): + i2c_line = 14 + elif(port_num >= self.iom2_port_start and port_num <= + self.iom2_port_end): + i2c_line = 16 + elif(port_num >= self.iom3_port_start and port_num <= + self.iom3_port_end): + i2c_line = 15 + elif(port_num >= self.iom4_port_start and port_num <= + self.iom4_port_end): + i2c_line = 17 + + try: + qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode" + reg_file = open(qsfp_path, "r+") + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # Absence of IOM throws read error + if (content == 'read error'): + return False + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Rationalize port settings + if port_num > 15: + port_num = port_num % 16 + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + + global i2c_line + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # port_num and i2c match + if(port_num >= self.iom1_port_start and port_num <= + self.iom1_port_end): + i2c_line = 14 + elif(port_num >= self.iom2_port_start and port_num <= + self.iom2_port_end): + i2c_line = 16 + elif(port_num >= self.iom3_port_start and port_num <= + self.iom3_port_end): + i2c_line = 15 + elif(port_num >= self.iom4_port_start and port_num <= + self.iom4_port_end): + i2c_line = 17 + + try: + qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode" + reg_file = open(qsfp_path, "r+") + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # Absence of IOM throws read error + if (content == 'read error'): + print("it's empty") + return False + + # File content is a string containing the hex representation + # of the register + reg_value = int(content, 16) + + # Rationalize port settings + if port_num > 15: + port_num = port_num % 16 + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port + # out of reset + try: + qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode" + reg_file = open(qsfp_path, "w") + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_register(self, reg_file): + retval = 'ERR' + + if (not os.path.isfile(reg_file)): + print reg_file, 'not found !' + return retval + + try: + with open(reg_file, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", reg_file, "file !") + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + def check_interrupts(self, port_dict): + retval = 0 + is_port_dict_updated = False + + # Read the QSFP ABS interrupt & status registers + cpld2_abs_int = self.get_register( + "/sys/class/i2c-adapter/i2c-14/14-003e/qsfp_abs_int") + cpld2_abs_sta = self.get_register( + "/sys/class/i2c-adapter/i2c-14/14-003e/qsfp_abs_sta") + cpld3_abs_int = self.get_register( + "/sys/class/i2c-adapter/i2c-15/15-003e/qsfp_abs_int") + cpld3_abs_sta = self.get_register( + "/sys/class/i2c-adapter/i2c-15/15-003e/qsfp_abs_sta") + cpld4_abs_int = self.get_register( + "/sys/class/i2c-adapter/i2c-16/16-003e/qsfp_abs_int") + cpld4_abs_sta = self.get_register( + "/sys/class/i2c-adapter/i2c-16/16-003e/qsfp_abs_sta") + cpld5_abs_int = self.get_register( + "/sys/class/i2c-adapter/i2c-17/17-003e/qsfp_abs_int") + cpld5_abs_sta = self.get_register( + "/sys/class/i2c-adapter/i2c-17/17-003e/qsfp_abs_sta") + + if (cpld2_abs_int == 'ERR' or cpld2_abs_sta == 'ERR' or + cpld3_abs_int == 'ERR' or cpld3_abs_sta == 'ERR' or + cpld4_abs_int == 'ERR' or cpld4_abs_sta == 'ERR' or + cpld5_abs_int == 'ERR' or cpld5_abs_sta == 'ERR'): + return -1 + + # If IOM is not present, interrupt will return 'read error' + # Handle the scenario gracefully + if (cpld2_abs_int == 'read error'): + cpld2_abs_int = "0x0" + cpld2_abs_sta = "0x0" + if (cpld3_abs_int == 'read error'): + cpld3_abs_int = "0x0" + cpld3_abs_sta = "0x0" + if (cpld4_abs_int == 'read error'): + cpld4_abs_int = "0x0" + cpld4_abs_sta = "0x0" + if (cpld5_abs_int == 'read error'): + cpld5_abs_int = "0x0" + cpld5_abs_sta = "0x0" + + cpld2_abs_int = int(cpld2_abs_int, 16) + cpld2_abs_sta = int(cpld2_abs_sta, 16) + cpld3_abs_int = int(cpld3_abs_int, 16) + cpld3_abs_sta = int(cpld3_abs_sta, 16) + cpld4_abs_int = int(cpld4_abs_int, 16) + cpld4_abs_sta = int(cpld4_abs_sta, 16) + cpld5_abs_int = int(cpld5_abs_int, 16) + cpld5_abs_sta = int(cpld5_abs_sta, 16) + + # Make it contiguous + interrupt_reg = (cpld2_abs_int & 0xffff) | \ + ((cpld4_abs_int & 0xffff) << 16) | \ + ((cpld3_abs_int & 0xffff) << 32) | \ + ((cpld5_abs_int & 0xffff) << 48) + status_reg = (cpld2_abs_sta & 0xffff) | \ + ((cpld4_abs_sta & 0xffff) << 16) | \ + ((cpld3_abs_sta & 0xffff) << 32) | \ + ((cpld5_abs_sta & 0xffff) << 48) + + port = self.port_start + while port <= self.port_end: + if interrupt_reg & (1 << port): + # update only if atleast one port has generated + # interrupt + is_port_dict_updated = True + if status_reg & (1 << port): + # status reg 1 => optics is removed + port_dict[port] = '0' + else: + # status reg 0 => optics is inserted + port_dict[port] = '1' + port += 1 + return retval, is_port_dict_updated + + def get_transceiver_change_event(self, timeout=0): + port_dict = {} + try: + # We get notified when there is an SCI interrupt from GPIO SUS6 + # Open the sysfs file and register the epoll object + self.oir_fd = open(self.OIR_FD_PATH, "r") + if self.oir_fd != -1: + # Do a dummy read before epoll register + self.oir_fd.read() + self.epoll = select.epoll() + self.epoll.register(self.oir_fd.fileno(), + select.EPOLLIN & select.EPOLLET) + else: + print("get_transceiver_change_event : unable to create fd") + return False, {} + + # Check for missed interrupts by invoking self.check_interrupts + # which will update the port_dict. + while True: + interrupt_count_start = self.get_register(self.OIR_FD_PATH) + + retval, is_port_dict_updated = \ + self.check_interrupts(port_dict) + if ((retval == 0) and (is_port_dict_updated is True)): + return True, port_dict + + interrupt_count_end = self.get_register(self.OIR_FD_PATH) + + if (interrupt_count_start == 'ERR' or + interrupt_count_end == 'ERR'): + print("get_transceiver_change_event : \ + unable to retrive interrupt count") + break + + # check_interrupts() itself may take upto 100s of msecs. + # We detect a missed interrupt based on the count + if interrupt_count_start == interrupt_count_end: + break + + # Block until an xcvr is inserted or removed with timeout = -1 + events = self.epoll.poll( + timeout=timeout if timeout != 0 else -1) + if events: + # check interrupts and return the port_dict + retval, is_port_dict_updated = \ + self.check_interrupts(port_dict) + if (retval != 0): + return False, {} + + return True, port_dict + except: + return False, {} + finally: + if self.oir_fd != -1: + self.epoll.unregister(self.oir_fd.fileno()) + self.epoll.close() + self.oir_fd.close() + self.oir_fd = -1 + self.epoll = -1 + + return False, {} + diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/pmon_daemon_control.json b/device/dell/x86_64-dell_s6100_c2538-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..94592fa8ceb --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/sensors.conf b/device/dell/x86_64-dell_s6100_c2538-r0/sensors.conf new file mode 100644 index 00000000000..dfb1aa7c92b --- /dev/null +++ b/device/dell/x86_64-dell_s6100_c2538-r0/sensors.conf @@ -0,0 +1,29 @@ +chip "SMF_S6100_ON-isa-0000" +label power1 "PSU1 Input Power" +label power2 "PSU1 Output Power" +label power3 "PSU2 Input Power" +label power4 "PSU2 Output Power" +label temp14 "PSU1 Temp" +label temp15 "PSU2 Temp" +label curr601 "PSU1 Input Current" +label curr602 "PSU1 Output Current" +label curr701 "PSU2 Input Current" +label curr702 "PSU2 Output Current" +ignore temp12 +ignore temp13 +ignore in101 +ignore in102 +ignore in103 +ignore in104 +ignore in201 +ignore in202 +ignore in203 +ignore in204 +ignore in301 +ignore in302 +ignore in303 +ignore in304 +ignore in401 +ignore in402 +ignore in403 +ignore in404 diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/buffers.json.j2 b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/buffers_defaults_t1.j2 b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..fa78303b246 --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/buffers_defaults_t1.j2 @@ -0,0 +1,47 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10875072", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_lossy_pool": { + "size": "9243812", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"15982720" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/led_proc_init.soc b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/led_proc_init.soc new file mode 100644 index 00000000000..dd30163ddcf --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/led_proc_init.soc @@ -0,0 +1,51 @@ +# LED microprocessor initialization for Dell Z9100 +# +# +#Led0 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 REMAP_PORT_53=10 REMAP_PORT_54=9 REMAP_PORT_55=8 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 REMAP_PORT_49=14 REMAP_PORT_50=13 REMAP_PORT_51=12 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=19 REMAP_PORT_9=18 REMAP_PORT_10=17 REMAP_PORT_11=16 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=23 REMAP_PORT_13=22 REMAP_PORT_14=21 REMAP_PORT_15=20 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=27 REMAP_PORT_1=26 REMAP_PORT_2=25 REMAP_PORT_3=24 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=31 REMAP_PORT_5=30 REMAP_PORT_6=29 REMAP_PORT_7=28 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=35 REMAP_PORT_41=34 REMAP_PORT_42=33 REMAP_PORT_43=32 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=39 REMAP_PORT_45=38 REMAP_PORT_46=37 REMAP_PORT_47=36 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=43 REMAP_PORT_33=42 REMAP_PORT_34=41 REMAP_PORT_35=40 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=47 REMAP_PORT_37=46 REMAP_PORT_38=45 REMAP_PORT_39=44 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=51 REMAP_PORT_25=50 REMAP_PORT_26=49 REMAP_PORT_27=48 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=55 REMAP_PORT_29=54 REMAP_PORT_30=53 REMAP_PORT_31=52 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=59 REMAP_PORT_17=58 REMAP_PORT_18=57 REMAP_PORT_19=56 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=63 REMAP_PORT_21=62 REMAP_PORT_22=61 REMAP_PORT_23=60 + +#Led1 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=3 REMAP_PORT_17=2 REMAP_PORT_18=1 REMAP_PORT_19=0 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=7 REMAP_PORT_21=6 REMAP_PORT_22=5 REMAP_PORT_23=4 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=11 REMAP_PORT_25=10 REMAP_PORT_26=9 REMAP_PORT_27=8 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=15 REMAP_PORT_29=14 REMAP_PORT_30=13 REMAP_PORT_31=12 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=19 REMAP_PORT_33=18 REMAP_PORT_34=17 REMAP_PORT_35=16 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=23 REMAP_PORT_37=22 REMAP_PORT_38=21 REMAP_PORT_39=20 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=27 REMAP_PORT_41=26 REMAP_PORT_42=25 REMAP_PORT_43=24 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=31 REMAP_PORT_45=30 REMAP_PORT_46=29 REMAP_PORT_47=28 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=35 REMAP_PORT_5=34 REMAP_PORT_6=33 REMAP_PORT_7=32 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=39 REMAP_PORT_1=38 REMAP_PORT_2=37 REMAP_PORT_3=36 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=43 REMAP_PORT_13=42 REMAP_PORT_14=41 REMAP_PORT_15=40 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=47 REMAP_PORT_9=46 REMAP_PORT_10=45 REMAP_PORT_11=44 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 REMAP_PORT_49=50 REMAP_PORT_50=49 REMAP_PORT_51=48 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 REMAP_PORT_53=54 REMAP_PORT_54=53 REMAP_PORT_55=52 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 REMAP_PORT_57=58 REMAP_PORT_58=57 REMAP_PORT_59=56 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=62 REMAP_PORT_62=61 REMAP_PORT_63=60 + +led 0 stop +led 0 prog 02 A8 60 AA 02 00 60 A7 02 00 60 FE 02 00 60 AB 06 A7 D2 08 74 20 02 A9 60 AA 06 A7 E2 08 60 A7 06 FE 28 67 3D 86 FE 06 FE 86 AB 06 AB D2 04 71 10 86 A7 06 FE D2 40 71 0C 86 FF 3A 80 32 08 97 71 7C 77 4C 57 22 0E 87 22 0E 87 57 22 0F 87 22 0F 87 57 22 0F 87 22 0E 87 57 06 AA 61 A6 16 A7 49 27 16 A6 97 71 53 77 45 57 02 0A 50 95 75 74 85 75 5A 57 16 FF CA 05 74 4C 77 5A 06 FE 12 BC F8 32 00 32 01 B7 97 71 6A 77 5A +led 0 auto on +led 0 start + +led 1 stop +led 1 prog 02 A8 60 AA 02 00 60 A7 02 00 60 FE 02 00 60 AB 06 A7 D2 08 74 20 02 A9 60 AA 06 A7 E2 08 60 A7 06 FE 28 67 3D 86 FE 06 FE 86 AB 06 AB D2 04 71 10 86 A7 06 FE D2 40 71 0C 86 FF 3A 80 32 08 97 71 7C 77 4C 57 22 0E 87 22 0E 87 57 22 0F 87 22 0F 87 57 22 0F 87 22 0E 87 57 06 AA 61 A6 16 A7 49 27 16 A6 97 71 53 77 45 57 02 0A 50 95 75 74 85 75 5A 57 16 FF CA 05 74 4C 77 5A 06 FE 12 BC F8 32 00 32 01 B7 97 71 6A 77 5A + +led 1 auto on +led 1 start + +led 2 stop diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/pg_profile_lookup.ini b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/pg_profile_lookup.ini new file mode 100644 index 00000000000..aedda37a887 --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -3 2288 + 25000 5m 1248 2288 53248 -3 2288 + 40000 5m 1248 2288 66560 -3 2288 + 50000 5m 1248 2288 90272 -3 2288 + 100000 5m 1248 2288 165568 -3 2288 + 10000 40m 1248 2288 37024 -3 2288 + 25000 40m 1248 2288 53248 -3 2288 + 40000 40m 1248 2288 71552 -3 2288 + 50000 40m 1248 2288 96096 -3 2288 + 100000 40m 1248 2288 177632 -3 2288 + 10000 300m 1248 2288 46176 -3 2288 + 25000 300m 1248 2288 79040 -3 2288 + 40000 300m 1248 2288 108160 -3 2288 + 50000 300m 1248 2288 141856 -3 2288 + 100000 300m 1248 2288 268736 -3 2288 diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/port_config.ini b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/port_config.ini new file mode 100644 index 00000000000..6a8e8351f8b --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index +Ethernet0 49,50,51,52 hundredGigE1/1 1 +Ethernet4 53,54,55,56 hundredGigE1/2 2 +Ethernet8 57,58,59,60 hundredGigE1/3 3 +Ethernet12 61,62,63,64 hundredGigE1/4 4 +Ethernet16 65,66,67,68 hundredGigE1/5 5 +Ethernet20 69,70,71,72 hundredGigE1/6 6 +Ethernet24 73,74,75,76 hundredGigE1/7 7 +Ethernet28 77,78,79,80 hundredGigE1/8 8 +Ethernet32 37,38,39,40 hundredGigE1/9 9 +Ethernet36 33,34,35,36 hundredGigE1/10 10 +Ethernet40 45,46,47,48 hundredGigE1/11 11 +Ethernet44 41,42,43,44 hundredGigE1/12 12 +Ethernet48 81,82,83,84 hundredGigE1/13 13 +Ethernet52 85,86,87,88 hundredGigE1/14 14 +Ethernet56 89,90,91,92 hundredGigE1/15 15 +Ethernet60 93,94,95,96 hundredGigE1/16 16 +Ethernet64 97,98,99,100 hundredGigE1/17 17 +Ethernet68 101,102,103,104 hundredGigE1/18 18 +Ethernet72 105,106,107,108 hundredGigE1/19 19 +Ethernet76 109,110,111,112 hundredGigE1/20 20 +Ethernet80 21,22,23,24 hundredGigE1/21 21 +Ethernet84 17,18,19,20 hundredGigE1/22 22 +Ethernet88 29,30,31,32 hundredGigE1/23 23 +Ethernet92 25,26,27,28 hundredGigE1/24 24 +Ethernet96 117,118,119,120 hundredGigE1/25 25 +Ethernet100 113,114,115,116 hundredGigE1/26 26 +Ethernet104 125,126,127,128 hundredGigE1/27 27 +Ethernet108 121,122,123,124 hundredGigE1/28 28 +Ethernet112 5,6,7,8 hundredGigE1/29 29 +Ethernet116 1,2,3,4 hundredGigE1/30 30 +Ethernet120 13,14,15,16 hundredGigE1/31 31 +Ethernet124 9,10,11,12 hundredGigE1/32 32 diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/qos.json.j2 b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/sai.profile b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/sai.profile new file mode 100644 index 00000000000..a690c3ff8b9 --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-z9100-32x100G.config.bcm diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/th-z9100-32x100G.config.bcm b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/th-z9100-32x100G.config.bcm new file mode 100644 index 00000000000..39a3695b4cd --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/th-z9100-32x100G.config.bcm @@ -0,0 +1,230 @@ +#TH Z9100 32x100 + +l3_alpm_enable=2 +pfc_deadlock_seq_control=1 +bcm_stat_interval=2000000 +bcm_num_cos=8 +switch_bypass_mode=0 +mmu_lossless=0 +lpm_scaling_enable=0 +lpm_scaling_enable=0 +lpm_ipv6_128b_reserved=0 +ipv6_lpm_128b_enable=1 +l2xmsg_mode=1 +oversubscribe_mode=1 +os=unix + +pbmp_oversubscribe=0x3fd000000ff4000003fc000001fe +pbmp_xport_xe=0x3fd000000ff4000003fc000001fe + +serdes_if_type_xe=14 +serdes_if_type_ce=14 + +#Parity +parity_correction=1 +parity_enable=1 + +#Port configuration +portmap_38=49:100 +portmap_39=53:100 +portmap_40=57:100 +portmap_41=61:100 +portmap_68=65:100 +portmap_69=69:100 +portmap_70=73:100 +portmap_71=77:100 +portmap_35=37:100 +portmap_34=33:100 +portmap_37=45:100 +portmap_36=41:100 +portmap_72=81:100 +portmap_73=85:100 +portmap_74=89:100 +portmap_75=93:100 +portmap_102=97:100 +portmap_103=101:100 +portmap_104=105:100 +portmap_105=109:100 +portmap_6=21:100 +portmap_5=17:100 +portmap_8=29:100 +portmap_7=25:100 +portmap_107=117:100 +portmap_106=113:100 +portmap_109=125:100 +portmap_108=121:100 +portmap_2=5:100 +portmap_1=1:100 +portmap_4=13:100 +portmap_3=9:100 +portmap_33=132:10 +portmap_67=133:10 +portmap_101=134:10 +portmap_135=135:10 + +xgxs_tx_lane_map_ce0=0x0132 +xgxs_tx_lane_map_ce1=0x2301 +xgxs_tx_lane_map_ce2=0x0123 +xgxs_tx_lane_map_ce3=0x3201 +xgxs_tx_lane_map_ce4=0x3210 +xgxs_tx_lane_map_ce5=0x2301 +xgxs_tx_lane_map_ce6=0x0123 +xgxs_tx_lane_map_ce7=0x1320 +xgxs_tx_lane_map_ce8=0x1032 +xgxs_tx_lane_map_ce9=0x2031 +xgxs_tx_lane_map_ce10=0x1023 +xgxs_tx_lane_map_ce11=0x0132 +xgxs_tx_lane_map_ce12=0x0213 +xgxs_tx_lane_map_ce13=0x1032 +xgxs_tx_lane_map_ce14=0x0132 +xgxs_tx_lane_map_ce15=0x0123 +xgxs_tx_lane_map_ce16=0x0123 +xgxs_tx_lane_map_ce17=0x0123 +xgxs_tx_lane_map_ce18=0x1032 +xgxs_tx_lane_map_ce19=0x0123 +xgxs_tx_lane_map_ce20=0x2301 +xgxs_tx_lane_map_ce21=0x3102 +xgxs_tx_lane_map_ce22=0x1023 +xgxs_tx_lane_map_ce23=0x2130 +xgxs_tx_lane_map_ce24=0x2310 +xgxs_tx_lane_map_ce25=0x2013 +xgxs_tx_lane_map_ce26=0x0132 +xgxs_tx_lane_map_ce27=0x0123 +xgxs_tx_lane_map_ce28=0x0213 +xgxs_tx_lane_map_ce29=0x0123 +xgxs_tx_lane_map_ce30=0x2301 +xgxs_tx_lane_map_ce31=0x0123 + +xgxs_rx_lane_map_ce0=0x1023 +xgxs_rx_lane_map_ce1=0x1302 +xgxs_rx_lane_map_ce2=0x1203 +xgxs_rx_lane_map_ce3=0x1302 +xgxs_rx_lane_map_ce4=0x3201 +xgxs_rx_lane_map_ce5=0x1302 +xgxs_rx_lane_map_ce6=0x1203 +xgxs_rx_lane_map_ce7=0x2301 +xgxs_rx_lane_map_ce8=0x0312 +xgxs_rx_lane_map_ce9=0x1302 +xgxs_rx_lane_map_ce10=0x2103 +xgxs_rx_lane_map_ce11=0x3210 +xgxs_rx_lane_map_ce12=0x2301 +xgxs_rx_lane_map_ce13=0x0213 +xgxs_rx_lane_map_ce14=0x3210 +xgxs_rx_lane_map_ce15=0x3210 +xgxs_rx_lane_map_ce16=0x3201 +xgxs_rx_lane_map_ce17=0x0213 +xgxs_rx_lane_map_ce18=0x3210 +xgxs_rx_lane_map_ce19=0x3210 +xgxs_rx_lane_map_ce20=0x3102 +xgxs_rx_lane_map_ce21=0x2103 +xgxs_rx_lane_map_ce22=0x2301 +xgxs_rx_lane_map_ce23=0x2310 +xgxs_rx_lane_map_ce24=0x3201 +xgxs_rx_lane_map_ce25=0x0123 +xgxs_rx_lane_map_ce26=0x1023 +xgxs_rx_lane_map_ce27=0x0213 +xgxs_rx_lane_map_ce28=0x1203 +xgxs_rx_lane_map_ce29=0x0213 +xgxs_rx_lane_map_ce30=0x3201 +xgxs_rx_lane_map_ce31=0x0213 + +phy_xaui_tx_polarity_flip_ce0=0xe +phy_xaui_tx_polarity_flip_ce1=0x2 +phy_xaui_tx_polarity_flip_ce2=0xa +phy_xaui_tx_polarity_flip_ce3=0xb +phy_xaui_tx_polarity_flip_ce4=0x2 +phy_xaui_tx_polarity_flip_ce5=0x0 +phy_xaui_tx_polarity_flip_ce6=0x0 +phy_xaui_tx_polarity_flip_ce7=0xa +phy_xaui_tx_polarity_flip_ce8=0x0 +phy_xaui_tx_polarity_flip_ce9=0xb +phy_xaui_tx_polarity_flip_ce10=0xe +phy_xaui_tx_polarity_flip_ce11=0x6 +phy_xaui_tx_polarity_flip_ce12=0x6 +phy_xaui_tx_polarity_flip_ce13=0xf +phy_xaui_tx_polarity_flip_ce14=0x5 +phy_xaui_tx_polarity_flip_ce15=0x8 +phy_xaui_tx_polarity_flip_ce16=0xf +phy_xaui_tx_polarity_flip_ce17=0xf +phy_xaui_tx_polarity_flip_ce18=0xf +phy_xaui_tx_polarity_flip_ce19=0xf +phy_xaui_tx_polarity_flip_ce20=0xf +phy_xaui_tx_polarity_flip_ce21=0xf +phy_xaui_tx_polarity_flip_ce22=0xb +phy_xaui_tx_polarity_flip_ce23=0xa +phy_xaui_tx_polarity_flip_ce24=0xf +phy_xaui_tx_polarity_flip_ce25=0x0 +phy_xaui_tx_polarity_flip_ce26=0xb +phy_xaui_tx_polarity_flip_ce27=0x7 +phy_xaui_tx_polarity_flip_ce28=0x8 +phy_xaui_tx_polarity_flip_ce29=0x3 +phy_xaui_tx_polarity_flip_ce30=0xc +phy_xaui_tx_polarity_flip_ce31=0x3 + +phy_xaui_rx_polarity_flip_ce0=0xc +phy_xaui_rx_polarity_flip_ce1=0xd +phy_xaui_rx_polarity_flip_ce2=0x2 +phy_xaui_rx_polarity_flip_ce3=0xf +phy_xaui_rx_polarity_flip_ce4=0xc +phy_xaui_rx_polarity_flip_ce5=0x2 +phy_xaui_rx_polarity_flip_ce6=0x2 +phy_xaui_rx_polarity_flip_ce7=0xd +phy_xaui_rx_polarity_flip_ce8=0xd +phy_xaui_rx_polarity_flip_ce9=0xa +phy_xaui_rx_polarity_flip_ce10=0x7 +phy_xaui_rx_polarity_flip_ce11=0xf +phy_xaui_rx_polarity_flip_ce12=0xf +phy_xaui_rx_polarity_flip_ce13=0xd +phy_xaui_rx_polarity_flip_ce14=0x4 +phy_xaui_rx_polarity_flip_ce15=0xb +phy_xaui_rx_polarity_flip_ce16=0x2 +phy_xaui_rx_polarity_flip_ce17=0xd +phy_xaui_rx_polarity_flip_ce18=0xf +phy_xaui_rx_polarity_flip_ce19=0x0 +phy_xaui_rx_polarity_flip_ce20=0x0 +phy_xaui_rx_polarity_flip_ce21=0x5 +phy_xaui_rx_polarity_flip_ce22=0x0 +phy_xaui_rx_polarity_flip_ce23=0x2 +phy_xaui_rx_polarity_flip_ce24=0xc +phy_xaui_rx_polarity_flip_ce25=0x8 +phy_xaui_rx_polarity_flip_ce26=0x4 +phy_xaui_rx_polarity_flip_ce27=0x7 +phy_xaui_rx_polarity_flip_ce28=0x7 +phy_xaui_rx_polarity_flip_ce29=0x9 +phy_xaui_rx_polarity_flip_ce30=0xc +phy_xaui_rx_polarity_flip_ce31=0x8 + +dport_map_port_38=1 +dport_map_port_39=2 +dport_map_port_40=3 +dport_map_port_41=4 +dport_map_port_68=5 +dport_map_port_69=6 +dport_map_port_70=7 +dport_map_port_71=8 +dport_map_port_35=9 +dport_map_port_34=10 +dport_map_port_37=11 +dport_map_port_36=12 +dport_map_port_72=13 +dport_map_port_73=14 +dport_map_port_74=15 +dport_map_port_75=16 +dport_map_port_102=17 +dport_map_port_103=18 +dport_map_port_104=19 +dport_map_port_105=20 +dport_map_port_6=21 +dport_map_port_5=22 +dport_map_port_8=23 +dport_map_port_7=24 +dport_map_port_107=25 +dport_map_port_106=26 +dport_map_port_109=27 +dport_map_port_108=28 +dport_map_port_2=29 +dport_map_port_1=30 +dport_map_port_4=31 +dport_map_port_3=32 + +mmu_init_config="MSFT-TH-Tier1" diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/buffers.json.j2 b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/buffers.json.j2 new file mode 100644 index 00000000000..1083a6210fc --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/buffers_defaults_t0.j2 b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..fa5b0fc5a52 --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/buffers_defaults_t0.j2 @@ -0,0 +1,61 @@ +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,6) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(10,26) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(30,32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(6,10) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(26,30) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10875072", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_lossy_pool": { + "size": "9243812", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"15982720" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/led_proc_init.soc b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/led_proc_init.soc new file mode 100644 index 00000000000..487c9fb7dcd --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/led_proc_init.soc @@ -0,0 +1,58 @@ +# LED microprocessor initialization for Dell Z9100 +# +# +#Led0 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 REMAP_PORT_53=10 REMAP_PORT_54=9 REMAP_PORT_55=8 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 REMAP_PORT_49=14 REMAP_PORT_50=13 REMAP_PORT_51=12 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=19 REMAP_PORT_9=18 REMAP_PORT_10=17 REMAP_PORT_11=16 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=23 REMAP_PORT_13=22 REMAP_PORT_14=21 REMAP_PORT_15=20 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=27 REMAP_PORT_1=26 REMAP_PORT_2=25 REMAP_PORT_3=24 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=31 REMAP_PORT_5=30 REMAP_PORT_6=29 REMAP_PORT_7=28 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=35 REMAP_PORT_41=34 REMAP_PORT_42=33 REMAP_PORT_43=32 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=39 REMAP_PORT_45=38 REMAP_PORT_46=37 REMAP_PORT_47=36 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=43 REMAP_PORT_33=42 REMAP_PORT_34=41 REMAP_PORT_35=40 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=47 REMAP_PORT_37=46 REMAP_PORT_38=45 REMAP_PORT_39=44 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=51 REMAP_PORT_25=50 REMAP_PORT_26=49 REMAP_PORT_27=48 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=55 REMAP_PORT_29=54 REMAP_PORT_30=53 REMAP_PORT_31=52 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=59 REMAP_PORT_17=58 REMAP_PORT_18=57 REMAP_PORT_19=56 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=63 REMAP_PORT_21=62 REMAP_PORT_22=61 REMAP_PORT_23=60 + +#Led1 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=3 REMAP_PORT_17=2 REMAP_PORT_18=1 REMAP_PORT_19=0 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=7 REMAP_PORT_21=6 REMAP_PORT_22=5 REMAP_PORT_23=4 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=11 REMAP_PORT_25=10 REMAP_PORT_26=9 REMAP_PORT_27=8 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=15 REMAP_PORT_29=14 REMAP_PORT_30=13 REMAP_PORT_31=12 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=19 REMAP_PORT_33=18 REMAP_PORT_34=17 REMAP_PORT_35=16 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=23 REMAP_PORT_37=22 REMAP_PORT_38=21 REMAP_PORT_39=20 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=27 REMAP_PORT_41=26 REMAP_PORT_42=25 REMAP_PORT_43=24 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=31 REMAP_PORT_45=30 REMAP_PORT_46=29 REMAP_PORT_47=28 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=35 REMAP_PORT_5=34 REMAP_PORT_6=33 REMAP_PORT_7=32 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=39 REMAP_PORT_1=38 REMAP_PORT_2=37 REMAP_PORT_3=36 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=43 REMAP_PORT_13=42 REMAP_PORT_14=41 REMAP_PORT_15=40 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=47 REMAP_PORT_9=46 REMAP_PORT_10=45 REMAP_PORT_11=44 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 REMAP_PORT_49=50 REMAP_PORT_50=49 REMAP_PORT_51=48 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 REMAP_PORT_53=54 REMAP_PORT_54=53 REMAP_PORT_55=52 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 REMAP_PORT_57=58 REMAP_PORT_58=57 REMAP_PORT_59=56 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=62 REMAP_PORT_62=61 REMAP_PORT_63=60 + +led 0 stop +led 0 prog 02 A8 60 AA 02 00 60 A7 02 00 60 FE 02 00 60 AB 06 A7 D2 08 74 20 02 A9 60 AA 06 A7 E2 08 60 A7 06 FE 28 67 3D 86 FE 06 FE 86 AB 06 AB D2 04 71 10 86 A7 06 FE D2 40 71 0C 86 FF 3A 80 32 08 97 71 7C 77 4C 57 22 0E 87 22 0E 87 57 22 0F 87 22 0F 87 57 22 0F 87 22 0E 87 57 06 AA 61 A6 16 A7 49 27 16 A6 97 71 53 77 45 57 02 0A 50 95 75 74 85 75 5A 57 16 FF CA 05 74 4C 77 5A 06 FE 12 BC F8 32 00 32 01 B7 97 71 6A 77 5A +led 0 auto on +led 0 start + +led 1 stop +led 1 prog 02 A8 60 AA 02 00 60 A7 02 00 60 FE 02 00 60 AB 06 A7 D2 08 74 20 02 A9 60 AA 06 A7 E2 08 60 A7 06 FE 28 67 3D 86 FE 06 FE 86 AB 06 AB D2 04 71 10 86 A7 06 FE D2 40 71 0C 86 FF 3A 80 32 08 97 71 7C 77 4C 57 22 0E 87 22 0E 87 57 22 0F 87 22 0F 87 57 22 0F 87 22 0E 87 57 06 AA 61 A6 16 A7 49 27 16 A6 97 71 53 77 45 57 02 0A 50 95 75 74 85 75 5A 57 16 FF CA 05 74 4C 77 5A 06 FE 12 BC F8 32 00 32 01 B7 97 71 6A 77 5A + +led 1 auto on +led 1 start + +led 2 stop + + +setreg CMIC_LEDUP1_DATA_RAM[0xa8] 0x3f +setreg CMIC_LEDUP1_DATA_RAM[0xa9] 0xFC +setreg CMIC_LEDUP0_DATA_RAM[0xa8] 0xff +setreg CMIC_LEDUP0_DATA_RAM[0xa9] 0xC3 + diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/pg_profile_lookup.ini b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/pg_profile_lookup.ini new file mode 100644 index 00000000000..aedda37a887 --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -3 2288 + 25000 5m 1248 2288 53248 -3 2288 + 40000 5m 1248 2288 66560 -3 2288 + 50000 5m 1248 2288 90272 -3 2288 + 100000 5m 1248 2288 165568 -3 2288 + 10000 40m 1248 2288 37024 -3 2288 + 25000 40m 1248 2288 53248 -3 2288 + 40000 40m 1248 2288 71552 -3 2288 + 50000 40m 1248 2288 96096 -3 2288 + 100000 40m 1248 2288 177632 -3 2288 + 10000 300m 1248 2288 46176 -3 2288 + 25000 300m 1248 2288 79040 -3 2288 + 40000 300m 1248 2288 108160 -3 2288 + 50000 300m 1248 2288 141856 -3 2288 + 100000 300m 1248 2288 268736 -3 2288 diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/port_config.ini b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/port_config.ini new file mode 100644 index 00000000000..c1a08676485 --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed +Ethernet0 49,50 fiftyGigE1/1/1 1 50000 +Ethernet2 51,52 fiftyGigE1/1/2 1 50000 +Ethernet4 53,54 fiftyGigE1/2/1 2 50000 +Ethernet6 55,56 fiftyGigE1/2/2 2 50000 +Ethernet8 57,58 fiftyGigE1/3/1 3 50000 +Ethernet10 59,60 fiftyGigE1/3/2 3 50000 +Ethernet12 61,62 fiftyGigE1/4/1 4 50000 +Ethernet14 63,64 fiftyGigE1/4/2 4 50000 +Ethernet16 65,66 fiftyGigE1/5/1 5 50000 +Ethernet18 67,68 fiftyGigE1/5/2 5 50000 +Ethernet20 69,70 fiftyGigE1/6/1 6 50000 +Ethernet22 71,72 fiftyGigE1/6/2 6 50000 +Ethernet24 73,74,75,76 hundredGigE1/7 7 100000 +Ethernet28 77,78,79,80 hundredGigE1/8 8 100000 +Ethernet32 37,38,39,40 hundredGigE1/9 9 100000 +Ethernet36 33,34,35,36 hundredGigE1/10 10 100000 +Ethernet40 45,46 fiftyGigE1/11/1 11 50000 +Ethernet42 47,48 fiftyGigE1/11/2 11 50000 +Ethernet44 41,42 fiftyGigE1/12/1 12 50000 +Ethernet46 43,44 fiftyGigE1/12/2 12 50000 +Ethernet48 81,82 fiftyGigE1/13/1 13 50000 +Ethernet50 83,84 fiftyGigE1/13/2 13 50000 +Ethernet52 85,86 fiftyGigE1/14/1 14 50000 +Ethernet54 87,88 fiftyGigE1/14/2 14 50000 +Ethernet56 89,90 fiftyGigE1/15/1 15 50000 +Ethernet58 91,92 fiftyGigE1/15/2 15 50000 +Ethernet60 93,94 fiftyGigE1/16/1 16 50000 +Ethernet62 95,96 fiftyGigE1/16/2 16 50000 +Ethernet64 97,98 fiftyGigE1/17/1 17 50000 +Ethernet66 99,100 fiftyGigE1/17/2 17 50000 +Ethernet68 101,102 fiftyGigE1/18/1 18 50000 +Ethernet70 103,104 fiftyGigE1/18/2 18 50000 +Ethernet72 105,106 fiftyGigE1/19/1 19 50000 +Ethernet74 107,108 fiftyGigE1/19/2 19 50000 +Ethernet76 109,110 fiftyGigE1/20/1 20 50000 +Ethernet78 111,112 fiftyGigE1/20/2 20 50000 +Ethernet80 21,22 fiftyGigE1/21/1 21 50000 +Ethernet82 23,24 fiftyGigE1/21/2 21 50000 +Ethernet84 17,18 fiftyGigE1/22/1 22 50000 +Ethernet86 19,20 fiftyGigE1/22/2 22 50000 +Ethernet88 29,30 fiftyGigE1/23/1 23 50000 +Ethernet90 31,32 fiftyGigE1/23/2 23 50000 +Ethernet92 25,26 fiftyGigE1/24/1 24 50000 +Ethernet94 27,28 fiftyGigE1/24/2 24 50000 +Ethernet96 117,118 fiftyGigE1/25/1 25 50000 +Ethernet98 119,120 fiftyGigE1/25/2 25 50000 +Ethernet100 113,114 fiftyGigE1/26/1 26 50000 +Ethernet102 115,116 fiftyGigE1/26/2 26 50000 +Ethernet104 125,126,127,128 hundredGigE1/27 27 100000 +Ethernet108 121,122,123,124 hundredGigE1/28 28 100000 +Ethernet112 5,6,7,8 hundredGigE1/29 29 100000 +Ethernet116 1,2,3,4 hundredGigE1/30 30 100000 +Ethernet120 13,14 fiftyGigE1/31/1 31 50000 +Ethernet122 15,16 fiftyGigE1/31/2 31 50000 +Ethernet124 9,10 fiftyGigE1/32/1 32 50000 +Ethernet126 11,12 fiftyGigE1/32/2 32 50000 diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/qos.json.j2 b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/sai.profile b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/sai.profile new file mode 100644 index 00000000000..182624c19bd --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-z9100-8x100G-48x50G.config.bcm diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/th-z9100-8x100G-48x50G.config.bcm b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/th-z9100-8x100G-48x50G.config.bcm new file mode 100644 index 00000000000..3dd7cc89456 --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C8D48/th-z9100-8x100G-48x50G.config.bcm @@ -0,0 +1,368 @@ +#TH Z9100 T0 + +l3_alpm_enable=2 +pfc_deadlock_seq_control=1 +bcm_stat_interval=2000000 +bcm_num_cos=8 +switch_bypass_mode=0 +mmu_lossless=0 +lpm_scaling_enable=0 +lpm_scaling_enable=0 +lpm_ipv6_128b_reserved=0 +ipv6_lpm_128b_enable=1 +l2xmsg_mode=1 +oversubscribe_mode=1 +os=unix + +pbmp_oversubscribe=0x3fffffffdffffffff7fffffffdfffffffe +pbmp_xport_xe=0x3fffffffdffffffff7fffffffdfffffffe + +serdes_if_type_xe=14 +serdes_if_type_ce=14 + +#Parity +parity_correction=1 +parity_enable=1 + +#Port configuration +dport_map_port_10.0=126 +dport_map_port_1.0=117 +dport_map_port_102.0=65 +dport_map_port_103.0=66 +dport_map_port_106.0=69 +dport_map_port_107.0=70 +dport_map_port_110.0=73 +dport_map_port_111.0=74 +dport_map_port_114.0=77 +dport_map_port_115.0=78 +dport_map_port_118.0=101 +dport_map_port_119.0=102 +dport_map_port_122.0=97 +dport_map_port_123.0=98 +dport_map_port_126.0=109 +dport_map_port_130.0=105 +dport_map_port_13.0=121 +dport_map_port_14.0=122 +dport_map_port_17.0=85 +dport_map_port_18.0=86 +dport_map_port_21.0=81 +dport_map_port_22.0=82 +dport_map_port_25.0=93 +dport_map_port_26.0=94 +dport_map_port_29.0=89 +dport_map_port_30.0=90 +dport_map_port_34.0=37 +dport_map_port_38.0=33 +dport_map_port_42.0=45 +dport_map_port_43.0=46 +dport_map_port_46.0=41 +dport_map_port_47.0=42 +dport_map_port_50.0=1 +dport_map_port_5.0=113 +dport_map_port_51.0=2 +dport_map_port_54.0=5 +dport_map_port_55.0=6 +dport_map_port_58.0=9 +dport_map_port_59.0=10 +dport_map_port_62.0=13 +dport_map_port_63.0=14 +dport_map_port_68.0=17 +dport_map_port_69.0=18 +dport_map_port_72.0=21 +dport_map_port_73.0=22 +dport_map_port_76.0=25 +dport_map_port_80.0=29 +dport_map_port_84.0=49 +dport_map_port_85.0=50 +dport_map_port_88.0=53 +dport_map_port_89.0=54 +dport_map_port_9.0=125 +dport_map_port_92.0=57 +dport_map_port_93.0=58 +dport_map_port_96.0=61 +dport_map_port_97.0=62 + +phy_xaui_rx_polarity_flip_10.0=0x2 +phy_xaui_rx_polarity_flip_1.0=0x9 +phy_xaui_rx_polarity_flip_102.0=0x2 +phy_xaui_rx_polarity_flip_103.0=0x0 +phy_xaui_rx_polarity_flip_106.0=0x1 +phy_xaui_rx_polarity_flip_107.0=0x3 +phy_xaui_rx_polarity_flip_110.0=0x3 +phy_xaui_rx_polarity_flip_111.0=0x3 +phy_xaui_rx_polarity_flip_114.0=0x0 +phy_xaui_rx_polarity_flip_115.0=0x0 +phy_xaui_rx_polarity_flip_118.0=0x0 +phy_xaui_rx_polarity_flip_119.0=0x2 +phy_xaui_rx_polarity_flip_122.0=0x0 +phy_xaui_rx_polarity_flip_123.0=0x3 +phy_xaui_rx_polarity_flip_126.0=0x7 +phy_xaui_rx_polarity_flip_130.0=0x4 +phy_xaui_rx_polarity_flip_13.0=0x0 +phy_xaui_rx_polarity_flip_14.0=0x3 +phy_xaui_rx_polarity_flip_17.0=0x1 +phy_xaui_rx_polarity_flip_18.0=0x1 +phy_xaui_rx_polarity_flip_21.0=0x0 +phy_xaui_rx_polarity_flip_22.0=0x0 +phy_xaui_rx_polarity_flip_25.0=0x2 +phy_xaui_rx_polarity_flip_26.0=0x0 +phy_xaui_rx_polarity_flip_29.0=0x0 +phy_xaui_rx_polarity_flip_30.0=0x0 +phy_xaui_rx_polarity_flip_34.0=0xa +phy_xaui_rx_polarity_flip_38.0=0xd +phy_xaui_rx_polarity_flip_42.0=0x3 +phy_xaui_rx_polarity_flip_43.0=0x3 +phy_xaui_rx_polarity_flip_46.0=0x3 +phy_xaui_rx_polarity_flip_47.0=0x1 +phy_xaui_rx_polarity_flip_50.0=0x0 +phy_xaui_rx_polarity_flip_5.0=0x7 +phy_xaui_rx_polarity_flip_51.0=0x3 +phy_xaui_rx_polarity_flip_54.0=0x1 +phy_xaui_rx_polarity_flip_55.0=0x3 +phy_xaui_rx_polarity_flip_58.0=0x2 +phy_xaui_rx_polarity_flip_59.0=0x0 +phy_xaui_rx_polarity_flip_62.0=0x3 +phy_xaui_rx_polarity_flip_63.0=0x3 +phy_xaui_rx_polarity_flip_68.0=0x0 +phy_xaui_rx_polarity_flip_69.0=0x3 +phy_xaui_rx_polarity_flip_72.0=0x2 +phy_xaui_rx_polarity_flip_73.0=0x0 +phy_xaui_rx_polarity_flip_76.0=0x2 +phy_xaui_rx_polarity_flip_80.0=0xd +phy_xaui_rx_polarity_flip_84.0=0x3 +phy_xaui_rx_polarity_flip_85.0=0x3 +phy_xaui_rx_polarity_flip_88.0=0x1 +phy_xaui_rx_polarity_flip_89.0=0x3 +phy_xaui_rx_polarity_flip_9.0=0x0 +phy_xaui_rx_polarity_flip_92.0=0x0 +phy_xaui_rx_polarity_flip_93.0=0x1 +phy_xaui_rx_polarity_flip_96.0=0x3 +phy_xaui_rx_polarity_flip_97.0=0x2 + +phy_xaui_tx_polarity_flip_10.0=0x0 +phy_xaui_tx_polarity_flip_1.0=0x3 +phy_xaui_tx_polarity_flip_102.0=0x3 +phy_xaui_tx_polarity_flip_103.0=0x3 +phy_xaui_tx_polarity_flip_106.0=0x3 +phy_xaui_tx_polarity_flip_107.0=0x3 +phy_xaui_tx_polarity_flip_110.0=0x3 +phy_xaui_tx_polarity_flip_111.0=0x3 +phy_xaui_tx_polarity_flip_114.0=0x3 +phy_xaui_tx_polarity_flip_115.0=0x3 +phy_xaui_tx_polarity_flip_118.0=0x0 +phy_xaui_tx_polarity_flip_119.0=0x0 +phy_xaui_tx_polarity_flip_122.0=0x3 +phy_xaui_tx_polarity_flip_123.0=0x3 +phy_xaui_tx_polarity_flip_126.0=0x7 +phy_xaui_tx_polarity_flip_130.0=0xb +phy_xaui_tx_polarity_flip_13.0=0x0 +phy_xaui_tx_polarity_flip_14.0=0x3 +phy_xaui_tx_polarity_flip_17.0=0x3 +phy_xaui_tx_polarity_flip_18.0=0x3 +phy_xaui_tx_polarity_flip_21.0=0x3 +phy_xaui_tx_polarity_flip_22.0=0x3 +phy_xaui_tx_polarity_flip_25.0=0x2 +phy_xaui_tx_polarity_flip_26.0=0x2 +phy_xaui_tx_polarity_flip_29.0=0x3 +phy_xaui_tx_polarity_flip_30.0=0x2 +phy_xaui_tx_polarity_flip_34.0=0xb +phy_xaui_tx_polarity_flip_38.0=0x0 +phy_xaui_tx_polarity_flip_42.0=0x2 +phy_xaui_tx_polarity_flip_43.0=0x1 +phy_xaui_tx_polarity_flip_46.0=0x2 +phy_xaui_tx_polarity_flip_47.0=0x3 +phy_xaui_tx_polarity_flip_50.0=0x2 +phy_xaui_tx_polarity_flip_5.0=0x8 +phy_xaui_tx_polarity_flip_51.0=0x3 +phy_xaui_tx_polarity_flip_54.0=0x2 +phy_xaui_tx_polarity_flip_55.0=0x0 +phy_xaui_tx_polarity_flip_58.0=0x2 +phy_xaui_tx_polarity_flip_59.0=0x2 +phy_xaui_tx_polarity_flip_62.0=0x3 +phy_xaui_tx_polarity_flip_63.0=0x2 +phy_xaui_tx_polarity_flip_68.0=0x2 +phy_xaui_tx_polarity_flip_69.0=0x0 +phy_xaui_tx_polarity_flip_72.0=0x0 +phy_xaui_tx_polarity_flip_73.0=0x0 +phy_xaui_tx_polarity_flip_76.0=0x0 +phy_xaui_tx_polarity_flip_80.0=0xa +phy_xaui_tx_polarity_flip_84.0=0x2 +phy_xaui_tx_polarity_flip_85.0=0x1 +phy_xaui_tx_polarity_flip_88.0=0x3 +phy_xaui_tx_polarity_flip_89.0=0x3 +phy_xaui_tx_polarity_flip_9.0=0x3 +phy_xaui_tx_polarity_flip_92.0=0x1 +phy_xaui_tx_polarity_flip_93.0=0x1 +phy_xaui_tx_polarity_flip_96.0=0x0 +phy_xaui_tx_polarity_flip_97.0=0x2 + +portmap_10.0=11:50:2 +portmap_1.0=1:100 +portmap_102.0=97:50:2 +portmap_103.0=99:50:2 +portmap_106.0=101:50:2 +portmap_107.0=103:50:2 +portmap_110.0=105:50:2 +portmap_111.0=107:50:2 +portmap_114.0=109:50:2 +portmap_115.0=111:50:2 +portmap_118.0=113:50:2 +portmap_119.0=115:50:2 +portmap_122.0=117:50:2 +portmap_123.0=119:50:2 +portmap_126.0=121:100 +portmap_130.0=125:100 +portmap_13.0=13:50:2 +portmap_14.0=15:50:2 +portmap_17.0=17:50:2 +portmap_18.0=19:50:2 +portmap_21.0=21:50:2 +portmap_22.0=23:50:2 +portmap_25.0=25:50:2 +portmap_26.0=27:50:2 +portmap_29.0=29:50:2 +portmap_30.0=31:50:2 +portmap_34.0=33:100 +portmap_38.0=37:100 +portmap_42.0=41:50:2 +portmap_43.0=43:50:2 +portmap_46.0=45:50:2 +portmap_47.0=47:50:2 +portmap_50.0=49:50:2 +portmap_5.0=5:100 +portmap_51.0=51:50:2 +portmap_54.0=53:50:2 +portmap_55.0=55:50:2 +portmap_58.0=57:50:2 +portmap_59.0=59:50:2 +portmap_62.0=61:50:2 +portmap_63.0=63:50:2 +portmap_68.0=65:50:2 +portmap_69.0=67:50:2 +portmap_72.0=69:50:2 +portmap_73.0=71:50:2 +portmap_76.0=73:100 +portmap_80.0=77:100 +portmap_84.0=81:50:2 +portmap_85.0=83:50:2 +portmap_88.0=85:50:2 +portmap_89.0=87:50:2 +portmap_9.0=9:50:2 +portmap_92.0=89:50:2 +portmap_93.0=91:50:2 +portmap_96.0=93:50:2 +portmap_97.0=95:50:2 + +xgxs_rx_lane_map_10.0=0x213 +xgxs_rx_lane_map_1.0=0x213 +xgxs_rx_lane_map_102.0=0x3201 +xgxs_rx_lane_map_103.0=0x3201 +xgxs_rx_lane_map_106.0=0x213 +xgxs_rx_lane_map_107.0=0x213 +xgxs_rx_lane_map_110.0=0x3210 +xgxs_rx_lane_map_111.0=0x3210 +xgxs_rx_lane_map_114.0=0x3210 +xgxs_rx_lane_map_115.0=0x3210 +xgxs_rx_lane_map_118.0=0x123 +xgxs_rx_lane_map_119.0=0x123 +xgxs_rx_lane_map_122.0=0x3201 +xgxs_rx_lane_map_123.0=0x3201 +xgxs_rx_lane_map_126.0=0x213 +xgxs_rx_lane_map_130.0=0x1023 +xgxs_rx_lane_map_13.0=0x3201 +xgxs_rx_lane_map_14.0=0x3201 +xgxs_rx_lane_map_17.0=0x2103 +xgxs_rx_lane_map_18.0=0x2103 +xgxs_rx_lane_map_21.0=0x3102 +xgxs_rx_lane_map_22.0=0x3102 +xgxs_rx_lane_map_25.0=0x2310 +xgxs_rx_lane_map_26.0=0x2310 +xgxs_rx_lane_map_29.0=0x2301 +xgxs_rx_lane_map_30.0=0x2301 +xgxs_rx_lane_map_34.0=0x1302 +xgxs_rx_lane_map_38.0=0x312 +xgxs_rx_lane_map_42.0=0x3210 +xgxs_rx_lane_map_43.0=0x3210 +xgxs_rx_lane_map_46.0=0x2103 +xgxs_rx_lane_map_47.0=0x2103 +xgxs_rx_lane_map_50.0=0x1023 +xgxs_rx_lane_map_5.0=0x1203 +xgxs_rx_lane_map_51.0=0x1023 +xgxs_rx_lane_map_54.0=0x1302 +xgxs_rx_lane_map_55.0=0x1302 +xgxs_rx_lane_map_58.0=0x1203 +xgxs_rx_lane_map_59.0=0x1203 +xgxs_rx_lane_map_62.0=0x1302 +xgxs_rx_lane_map_63.0=0x1302 +xgxs_rx_lane_map_68.0=0x3201 +xgxs_rx_lane_map_69.0=0x3201 +xgxs_rx_lane_map_72.0=0x1302 +xgxs_rx_lane_map_73.0=0x1302 +xgxs_rx_lane_map_76.0=0x1203 +xgxs_rx_lane_map_80.0=0x2301 +xgxs_rx_lane_map_84.0=0x2301 +xgxs_rx_lane_map_85.0=0x2301 +xgxs_rx_lane_map_88.0=0x213 +xgxs_rx_lane_map_89.0=0x213 +xgxs_rx_lane_map_9.0=0x213 +xgxs_rx_lane_map_92.0=0x3210 +xgxs_rx_lane_map_93.0=0x3210 +xgxs_rx_lane_map_96.0=0x3210 +xgxs_rx_lane_map_97.0=0x3210 +xgxs_tx_lane_map_10.0=0x123 +xgxs_tx_lane_map_1.0=0x123 +xgxs_tx_lane_map_102.0=0x123 +xgxs_tx_lane_map_103.0=0x123 +xgxs_tx_lane_map_106.0=0x123 +xgxs_tx_lane_map_107.0=0x123 +xgxs_tx_lane_map_110.0=0x132 +xgxs_tx_lane_map_111.0=0x132 +xgxs_tx_lane_map_114.0=0x123 +xgxs_tx_lane_map_115.0=0x123 +xgxs_tx_lane_map_118.0=0x2013 +xgxs_tx_lane_map_119.0=0x2013 +xgxs_tx_lane_map_122.0=0x2310 +xgxs_tx_lane_map_123.0=0x2310 +xgxs_tx_lane_map_126.0=0x123 +xgxs_tx_lane_map_130.0=0x132 +xgxs_tx_lane_map_13.0=0x2301 +xgxs_tx_lane_map_14.0=0x2301 +xgxs_tx_lane_map_17.0=0x3102 +xgxs_tx_lane_map_18.0=0x3102 +xgxs_tx_lane_map_21.0=0x132 +xgxs_tx_lane_map_22.0=0x132 +xgxs_tx_lane_map_25.0=0x2130 +xgxs_tx_lane_map_26.0=0x2130 +xgxs_tx_lane_map_29.0=0x1023 +xgxs_tx_lane_map_30.0=0x1023 +xgxs_tx_lane_map_34.0=0x2031 +xgxs_tx_lane_map_38.0=0x1032 +xgxs_tx_lane_map_42.0=0x132 +xgxs_tx_lane_map_43.0=0x132 +xgxs_tx_lane_map_46.0=0x1023 +xgxs_tx_lane_map_47.0=0x1023 +xgxs_tx_lane_map_50.0=0x132 +xgxs_tx_lane_map_5.0=0x213 +xgxs_tx_lane_map_51.0=0x132 +xgxs_tx_lane_map_54.0=0x2301 +xgxs_tx_lane_map_55.0=0x2301 +xgxs_tx_lane_map_58.0=0x123 +xgxs_tx_lane_map_59.0=0x123 +xgxs_tx_lane_map_62.0=0x3201 +xgxs_tx_lane_map_63.0=0x3201 +xgxs_tx_lane_map_68.0=0x3210 +xgxs_tx_lane_map_69.0=0x3210 +xgxs_tx_lane_map_72.0=0x2301 +xgxs_tx_lane_map_73.0=0x2301 +xgxs_tx_lane_map_76.0=0x123 +xgxs_tx_lane_map_80.0=0x1320 +xgxs_tx_lane_map_84.0=0x213 +xgxs_tx_lane_map_85.0=0x213 +xgxs_tx_lane_map_88.0=0x1032 +xgxs_tx_lane_map_89.0=0x1032 +xgxs_tx_lane_map_9.0=0x123 +xgxs_tx_lane_map_92.0=0x132 +xgxs_tx_lane_map_93.0=0x132 +xgxs_tx_lane_map_96.0=0x123 +xgxs_tx_lane_map_97.0=0x123 +mmu_init_config="MSFT-TH-Tier0" diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/default_sku b/device/dell/x86_64-dell_z9100_c2538-r0/default_sku new file mode 100644 index 00000000000..e09260239e9 --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/default_sku @@ -0,0 +1 @@ +Force10-Z9100-C32 t1 diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/installer.conf b/device/dell/x86_64-dell_z9100_c2538-r0/installer.conf new file mode 100644 index 00000000000..0a9a3a639eb --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich" diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/media_settings.json b/device/dell/x86_64-dell_z9100_c2538-r0/media_settings.json new file mode 100644 index 00000000000..9bb0a759787 --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/media_settings.json @@ -0,0 +1,751 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-32": { + "AMPHENOL-NDARHF-M201": { + "preemphasis": { + "lane0":"0x006808", + "lane1":"0x006808" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8" + } + }, + "AMPHENOL-NDAAFF-M201": { + "preemphasis": { + "lane0":"0x006808", + "lane1":"0x006808", + "lane2":"0x006808", + "lane3":"0x006808" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "MOLEX-1003461101": { + "preemphasis": { + "lane0":"0x046804", + "lane1":"0x046804" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8" + } + }, + "AMPHENOL-NDARHF-M206": { + "preemphasis": { + "lane0":"0x006808", + "lane1":"0x006808" + }, + "idriver": { + "lane0":"0xb", + "lane1":"0xb" + } + }, + "AMPHENOL-NDAAFF-M206": { + "preemphasis": { + "lane0":"0x006808", + "lane1":"0x006808", + "lane2":"0x006808", + "lane3":"0x006808" + }, + "idriver": { + "lane0":"0xb", + "lane1":"0xb", + "lane2":"0xb", + "lane3":"0xb" + } + }, + "AMPHENOL-NDARHJ-M206": { + "preemphasis": { + "lane0":"0x006808", + "lane1":"0x006808" + }, + "idriver": { + "lane0":"0xb", + "lane1":"0xb" + } + }, + "MOLEX-1003463151": { + "preemphasis": { + "lane0":"0x006808", + "lane1":"0x006808" + }, + "idriver": { + "lane0":"0xb", + "lane1":"0xb" + } + }, + "AMPHENOL-NDARHJ-M202": { + "preemphasis": { + "lane0":"0x006808", + "lane1":"0x006808" + }, + "idriver": { + "lane0":"0xb", + "lane1":"0xb" + } + }, + "AMPHENOL-NDAAFJ-M202": { + "preemphasis": { + "lane0":"0x006808", + "lane1":"0x006808", + "lane2":"0x006808", + "lane3":"0x006808" + }, + "idriver": { + "lane0":"0xb", + "lane1":"0xb", + "lane2":"0xb", + "lane3":"0xb" + } + }, + "MOLEX-1003461201": { + "preemphasis": { + "lane0":"0x046408", + "lane1":"0x046408" + }, + "idriver": { + "lane0":"0xb", + "lane1":"0xb" + } + }, + "AMPHENOL-NDARHF-M205": { + "preemphasis": { + "lane0":"0x006808", + "lane1":"0x006808" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8" + } + }, + "AMPHENOL-NDAAFF-M205": { + "preemphasis": { + "lane0":"0x006808", + "lane1":"0x006808", + "lane2":"0x006808", + "lane3":"0x006808" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "AMPHENOL-NDARHJ-M203": { + "preemphasis": { + "lane0":"0x006808", + "lane1":"0x006808" + }, + "idriver": { + "lane0":"0xe", + "lane1":"0xe" + } + }, + "AMPHENOL-NDAAFJ-M203": { + "preemphasis": { + "lane0":"0x006808", + "lane1":"0x006808", + "lane2":"0x006808", + "lane3":"0x006808" + }, + "idriver": { + "lane0":"0xe", + "lane1":"0xe", + "lane2":"0xe", + "lane3":"0xe" + } + }, + "MOLEX-1002979024": { + "preemphasis": { + "lane0":"0x006808", + "lane1":"0x006808", + "lane2":"0x006808", + "lane3":"0x006808" + }, + "idriver": { + "lane0":"0xb", + "lane1":"0xb", + "lane2":"0xb", + "lane3":"0xb" + } + }, + "QSFP28-40GBASE-CR4-1M":{ + "preemphasis": { + "lane0":"0x32320c", + "lane1":"0x32320c", + "lane2":"0x32320c", + "lane3":"0x32320c" + }, + "idriver": { + "lane0":"0x9", + "lane1":"0x9", + "lane2":"0x9", + "lane3":"0x9" + } + }, + "QSFP28-40GBASE-CR4-2M":{ + "preemphasis": { + "lane0":"0x252f0c", + "lane1":"0x252f0c", + "lane2":"0x252f0c", + "lane3":"0x252f0c" + }, + "idriver": { + "lane0":"0xc", + "lane1":"0xc", + "lane2":"0xc", + "lane3":"0xc" + } + }, + "QSFP28-40GBASE-CR4-3M":{ + "preemphasis": { + "lane0":"0x252f0c", + "lane1":"0x252f0c", + "lane2":"0x252f0c", + "lane3":"0x252f0c" + }, + "idriver": { + "lane0":"0xe", + "lane1":"0xe", + "lane2":"0xe", + "lane3":"0xe" + } + }, + "QSFP28-40GBASE-CR4-5M":{ + "preemphasis": { + "lane0":"0x3d2f04", + "lane1":"0x3d2f04", + "lane2":"0x3d2f04", + "lane3":"0x3d2f04" + }, + "idriver": { + "lane0":"0xf", + "lane1":"0xf", + "lane2":"0xf", + "lane3":"0xf" + } + } + } + }, + "PORT_MEDIA_SETTINGS": { + "1": { + "Default": { + "preemphasis": { + "lane0":"0x2c4004", + "lane1":"0x2b4203", + "lane2":"0x2c4004", + "lane3":"0x2c4004" + }, + "idriver": { + "lane0":"0xb", + "lane1":"0xb", + "lane2":"0xb", + "lane3":"0xb" + } + } + }, + "2": { + "Default": { + "preemphasis": { + "lane0":"0x2b4203", + "lane1":"0x294403", + "lane2":"0x2b4203", + "lane3":"0x2b4203" + }, + "idriver": { + "lane0":"0xb", + "lane1":"0xa", + "lane2":"0xb", + "lane3":"0xb" + } + } + }, + "3": { + "Default": { + "preemphasis": { + "lane0":"0x294403", + "lane1":"0x294403", + "lane2":"0x294403", + "lane3":"0x294403" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xa", + "lane2":"0xa", + "lane3":"0xa" + } + } + }, + "4": { + "Default": { + "preemphasis": { + "lane0":"0x284503", + "lane1":"0x284503", + "lane2":"0x284503", + "lane3":"0x294403" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xa", + "lane2":"0xb", + "lane3":"0xa" + } + } + }, + "5": { + "Default": { + "preemphasis": { + "lane0":"0x284503", + "lane1":"0x284503", + "lane2":"0x264703", + "lane3":"0x284503" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xa", + "lane2":"0xa", + "lane3":"0xa" + } + } + }, + "6": { + "Default": { + "preemphasis": { + "lane0":"0x264703", + "lane1":"0x244903", + "lane2":"0x284503", + "lane3":"0x264703" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xa", + "lane2":"0xa", + "lane3":"0xa" + } + } + }, + "7": { + "Default": { + "preemphasis": { + "lane0":"0x244903", + "lane1":"0x244903", + "lane2":"0x264703", + "lane3":"0x244903" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xa", + "lane2":"0xa", + "lane3":"0x9" + } + } + }, + "8": { + "Default": { + "preemphasis": { + "lane0":"0x234b02", + "lane1":"0x244903", + "lane2":"0x244903", + "lane3":"0x234b02" + }, + "idriver": { + "lane0":"0x9", + "lane1":"0xa", + "lane2":"0x9", + "lane3":"0x9" + } + } + }, + "9": { + "Default": { + "preemphasis": { + "lane0":"0x294403", + "lane1":"0x2c4004", + "lane2":"0x2b4203", + "lane3":"0x2e3e04" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xb", + "lane2":"0xb", + "lane3":"0xb" + } + } + }, + "10": { + "Default": { + "preemphasis": { + "lane0":"0x294403", + "lane1":"0x294403", + "lane2":"0x294403", + "lane3":"0x294403" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xa", + "lane2":"0xa", + "lane3":"0xa" + } + } + }, + "11": { + "Default": { + "preemphasis": { + "lane0":"0x244903", + "lane1":"0x274603", + "lane2":"0x284503", + "lane3":"0x244903" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xa", + "lane2":"0xa", + "lane3":"0xa" + } + } + }, + "12": { + "Default": { + "preemphasis": { + "lane0":"0x284503", + "lane1":"0x274603", + "lane2":"0x264703", + "lane3":"0x264703" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xa", + "lane2":"0xa", + "lane3":"0xa" + } + } + }, + "13": { + "Default": { + "preemphasis": { + "lane0":"0x204e02", + "lane1":"0x204e02", + "lane2":"0x1f4f02", + "lane3":"0x1f4f02" + }, + "idriver": { + "lane0":"0x9", + "lane1":"0x9", + "lane2":"0x8", + "lane3":"0x8" + } + } + }, + "14": { + "Default": { + "preemphasis": { + "lane0":"0x1e5002", + "lane1":"0x204e02", + "lane2":"0x1e5002", + "lane3":"0x204e02" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x9", + "lane2":"0x8", + "lane3":"0x9" + } + } + }, + "15": { + "Default": { + "preemphasis": { + "lane0":"0x204e02", + "lane1":"0x1e5002", + "lane2":"0x1f4f02", + "lane3":"0x1f4f02" + }, + "idriver": { + "lane0":"0x9", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + } + }, + "16": { + "Default": { + "preemphasis": { + "lane0":"0x204e02", + "lane1":"0x1e5002", + "lane2":"0x204e02", + "lane3":"0x1e5002" + }, + "idriver": { + "lane0":"0x9", + "lane1":"0x8", + "lane2":"0x9", + "lane3":"0x8" + } + } + }, + "17": { + "Default": { + "preemphasis": { + "lane0":"0x204e02", + "lane1":"0x1e5002", + "lane2":"0x204e02", + "lane3":"0x1e5002" + }, + "idriver": { + "lane0":"0x9", + "lane1":"0x8", + "lane2":"0x9", + "lane3":"0x8" + } + } + }, + "18": { + "Default": { + "preemphasis": { + "lane0":"0x204e02", + "lane1":"0x1e5002", + "lane2":"0x204e02", + "lane3":"0x1e5002" + }, + "idriver": { + "lane0":"0x9", + "lane1":"0x8", + "lane2":"0x9", + "lane3":"0x8" + } + } + }, + "19": { + "Default": { + "preemphasis": { + "lane0":"0x1e5002", + "lane1":"0x204e02", + "lane2":"0x1e5002", + "lane3":"0x204e02" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x9", + "lane2":"0x8", + "lane3":"0x9" + } + } + }, + "20": { + "Default": { + "preemphasis": { + "lane0":"0x204e02", + "lane1":"0x1f4f02", + "lane2":"0x204e02", + "lane3":"0x1f4f02" + }, + "idriver": { + "lane0":"0x9", + "lane1":"0x8", + "lane2":"0x9", + "lane3":"0x8" + } + } + }, + "21": { + "Default": { + "preemphasis": { + "lane0":"0x244903", + "lane1":"0x244903", + "lane2":"0x244903", + "lane3":"0x244903" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0x9", + "lane2":"0xa", + "lane3":"0x9" + } + } + }, + "22": { + "Default": { + "preemphasis": { + "lane0":"0x264703", + "lane1":"0x244903", + "lane2":"0x244903", + "lane3":"0x244903" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0x9", + "lane2":"0xa", + "lane3":"0xa" + } + } + }, + "23": { + "Default": { + "preemphasis": { + "lane0":"0x294403", + "lane1":"0x244903", + "lane2":"0x244903", + "lane3":"0x284503" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xa", + "lane2":"0xa", + "lane3":"0xa" + } + } + }, + "24": { + "Default": { + "preemphasis": { + "lane0":"0x294403", + "lane1":"0x2b4203", + "lane2":"0x2c4004", + "lane3":"0x2d3f04" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xb", + "lane2":"0xb", + "lane3":"0xb" + } + } + }, + "25": { + "Default": { + "preemphasis": { + "lane0":"0x234b02", + "lane1":"0x234b02", + "lane2":"0x234b02", + "lane3":"0x234b02" + }, + "idriver": { + "lane0":"0x9", + "lane1":"0x9", + "lane2":"0x9", + "lane3":"0x9" + } + } + }, + "26": { + "Default": { + "preemphasis": { + "lane0":"0x234b02", + "lane1":"0x244903", + "lane2":"0x244903", + "lane3":"0x244903" + }, + "idriver": { + "lane0":"0x9", + "lane1":"0x9", + "lane2":"0x9", + "lane3":"0x9" + } + } + }, + "27": { + "Default": { + "preemphasis": { + "lane0":"0x274603", + "lane1":"0x264703", + "lane2":"0x244903", + "lane3":"0x244903" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xa", + "lane2":"0x9", + "lane3":"0xa" + } + } + }, + "28": { + "Default": { + "preemphasis": { + "lane0":"0x264703", + "lane1":"0x244903", + "lane2":"0x284503", + "lane3":"0x274603" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xa", + "lane2":"0xa", + "lane3":"0xa" + } + } + }, + "29": { + "Default": { + "preemphasis": { + "lane0":"0x294403", + "lane1":"0x294403", + "lane2":"0x294403", + "lane3":"0x284503" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xa", + "lane2":"0xa", + "lane3":"0xa" + } + } + }, + "30": { + "Default": { + "preemphasis": { + "lane0":"0x294403", + "lane1":"0x284503", + "lane2":"0x294403", + "lane3":"0x294403" + }, + "idriver": { + "lane0":"0xa", + "lane1":"0xa", + "lane2":"0xa", + "lane3":"0xa" + } + } + }, + "31": { + "Default": { + "preemphasis": { + "lane0":"0x2b4203", + "lane1":"0x294403", + "lane2":"0x2b4203", + "lane3":"0x2b4203" + }, + "idriver": { + "lane0":"0xb", + "lane1":"0xa", + "lane2":"0xb", + "lane3":"0xb" + } + } + }, + "32": { + "Default": { + "preemphasis": { + "lane0":"0x2b4203", + "lane1":"0x2b4203", + "lane2":"0x2c4004", + "lane3":"0x2c4004" + }, + "idriver": { + "lane0":"0xb", + "lane1":"0xb", + "lane2":"0xb", + "lane3":"0xb" + } + } + } + } +} + diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/plugins/eeprom.py b/device/dell/x86_64-dell_z9100_c2538-r0/plugins/eeprom.py new file mode 100644 index 00000000000..8d1d13f4b7c --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Dell Z9100 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0050/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/plugins/psuutil.py b/device/dell/x86_64-dell_z9100_c2538-r0/plugins/psuutil.py new file mode 100644 index 00000000000..f96fac6f46c --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/plugins/psuutil.py @@ -0,0 +1,82 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +HWMON_DIR = "/sys/devices/platform/SMF.512/hwmon/" +HWMON_NODE = os.listdir(HWMON_DIR)[0] + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + # Get a mailbox register + def get_pmc_register(self, reg_name): + mailbox_dir = HWMON_DIR + HWMON_NODE + retval = 'ERR' + mb_reg_file = mailbox_dir+'/' + reg_name + if (not os.path.isfile(mb_reg_file)): + logging.error(mb_reg_file, "not found !") + return retval + + try: + with open(mb_reg_file, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", mb_reg_file, "file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + Z9100_MAX_PSUS = 2 + return Z9100_MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + psu_status = self.get_pmc_register('psu'+str(index)+'_presence') + if (psu_status != 'ERR'): + psu_status = int(psu_status, 16) + # Check for PSU statuse + if (~psu_status & 0b1000) or (psu_status & 0b0100): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_presence = self.get_pmc_register('psu'+str(index)+'_presence') + if (psu_presence != 'ERR'): + psu_presence = int(psu_presence, 16) + # Check for PSU presence + if (~psu_presence & 0b1): + status = 1 + + return status diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/plugins/sfputil.py b/device/dell/x86_64-dell_z9100_c2538-r0/plugins/sfputil.py new file mode 100644 index 00000000000..98c01216902 --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/plugins/sfputil.py @@ -0,0 +1,442 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import os + import logging + import time + import select + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 32 + PORTS_IN_BLOCK = 32 + IOM_1_PORT_START = 1 + IOM_1_PORT_END = 12 + IOM_2_PORT_START = 13 + IOM_2_PORT_END = 22 + IOM_3_PORT_START = 23 + IOM_3_PORT_END = 32 + + BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{0}-003e/" + OIR_FD_PATH = "/sys/devices/platform/dell_ich.0/sci_int_gpio_sus6" + + oir_fd = -1 + epoll = -1 + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 0: [0, 00], # Dummy Entry + 1: [9, 18], + 2: [9, 19], + 3: [9, 20], + 4: [9, 21], + 5: [9, 22], + 6: [9, 23], + 7: [9, 24], + 8: [9, 25], + 9: [8, 26], + 10: [8, 27], + 11: [8, 28], + 12: [8, 29], + 13: [8, 31], # reordered + 14: [8, 30], + 15: [8, 33], # reordered + 16: [8, 32], + 17: [7, 34], + 18: [7, 35], + 19: [7, 36], + 20: [7, 37], + 21: [7, 38], + 22: [7, 39], + 23: [7, 40], + 24: [7, 41], + 25: [6, 42], + 26: [6, 43], + 27: [6, 44], + 28: [6, 45], + 29: [6, 46], + 30: [6, 47], + 31: [6, 48], + 32: [6, 49] + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def iom1_port_start(self): + return self.IOM_1_PORT_START + + @property + def iom1_port_end(self): + return self.IOM_1_PORT_END + + @property + def iom2_port_start(self): + return self.IOM_2_PORT_START + + @property + def iom2_port_end(self): + return self.IOM_2_PORT_END + + @property + def iom3_port_start(self): + return self.IOM_3_PORT_START + + @property + def iom3_port_end(self): + return self.IOM_3_PORT_END + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def port_to_i2c_mapping(self): + return self._port_to_i2c_mapping + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/i2c-{1}/{1}-0050/eeprom" + + for x in range(0, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self.port_to_i2c_mapping[x][0], + self.port_to_i2c_mapping[x][1]) + + SfpUtilBase.__init__(self) + + def __del__(self): + if self.oir_fd != -1: + self.epoll.unregister(self.oir_fd.fileno()) + self.epoll.close() + self.oir_fd.close() + + def normalize_port(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return -1, -1 + # port_num and i2c match + if port_num >= self.iom1_port_start and port_num <= self.iom1_port_end: + i2c_line = 14 + elif (port_num >= self.iom2_port_start and + port_num <= self.iom2_port_end): + i2c_line = 15 + elif (port_num >= self.iom3_port_start and + port_num <= self.iom3_port_end): + i2c_line = 16 + + # Rationalize port settings + if port_num >= self.iom1_port_start and port_num <= self.iom1_port_end: + port_num = port_num - 1 + elif port_num >= self.iom2_port_start and port_num <= self.iom2_port_end: + port_num = (port_num - 1) % 12 + elif (port_num >= self.iom3_port_start and + port_num <= self.iom3_port_end): + port_num = (port_num - 1) % 22 + + return i2c_line, port_num + + + def get_presence(self, port_num): + + i2c_line, port_num = self.normalize_port(port_num) + if port_num == -1: + return False + + try: + qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_modprs" + reg_file = open(qsfp_path, "r") + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # Absence of IOM throws read error + if (content == 'read error'): + return False + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + + i2c_line, port_num = self.normalize_port(port_num) + if port_num == -1: + return False + + try: + qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode" + reg_file = open(qsfp_path, "r") + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # Absence of IOM throws read error + if (content == 'read error'): + return False + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + + i2c_line, port_num = self.normalize_port(port_num) + if port_num == -1: + return False + + try: + qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode" + reg_file = open(qsfp_path, "r+") + + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # Absence of IOM throws read error + if (content == 'read error'): + return False + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + + i2c_line, port_num = self.normalize_port(port_num) + if port_num == -1: + return False + + try: + qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode" + reg_file = open(qsfp_path, "r+") + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of th + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take + # port out of reset + try: + qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode" + reg_file = open(qsfp_path, "w+") + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_register(self, reg_file): + retval = 'ERR' + + if (not os.path.isfile(reg_file)): + print reg_file, 'not found !' + return retval + + try: + with open(reg_file, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", reg_file, "file !") + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + def check_interrupts(self, port_dict): + retval = 0 + is_port_dict_updated = False + # Read the QSFP ABS interrupt & status registers + cpld2_abs_int = self.get_register( + "/sys/class/i2c-adapter/i2c-14/14-003e/qsfp_abs_int") + cpld2_abs_sta = self.get_register( + "/sys/class/i2c-adapter/i2c-14/14-003e/qsfp_abs_sta") + cpld3_abs_int = self.get_register( + "/sys/class/i2c-adapter/i2c-15/15-003e/qsfp_abs_int") + cpld3_abs_sta = self.get_register( + "/sys/class/i2c-adapter/i2c-15/15-003e/qsfp_abs_sta") + cpld4_abs_int = self.get_register( + "/sys/class/i2c-adapter/i2c-16/16-003e/qsfp_abs_int") + cpld4_abs_sta = self.get_register( + "/sys/class/i2c-adapter/i2c-16/16-003e/qsfp_abs_sta") + + if (cpld2_abs_int == 'ERR' or cpld2_abs_sta == 'ERR' or + cpld3_abs_int == 'ERR' or cpld3_abs_sta == 'ERR' or + cpld4_abs_int == 'ERR' or cpld4_abs_sta == 'ERR'): + return -1 + + cpld2_abs_int = int(cpld2_abs_int, 16) + cpld2_abs_sta = int(cpld2_abs_sta, 16) + cpld3_abs_int = int(cpld3_abs_int, 16) + cpld3_abs_sta = int(cpld3_abs_sta, 16) + cpld4_abs_int = int(cpld4_abs_int, 16) + cpld4_abs_sta = int(cpld4_abs_sta, 16) + + # Make it contiguous (discard reserved bits) + interrupt_reg = (cpld2_abs_int & 0xfff) |\ + ((cpld3_abs_int & 0x3ff) << 12) |\ + ((cpld4_abs_int & 0x3ff) << 22) + status_reg = (cpld2_abs_sta & 0xfff) |\ + ((cpld3_abs_sta & 0x3ff) << 12) |\ + ((cpld4_abs_sta & 0x3ff) << 22) + + port = self.port_start + while port <= self.port_end: + if interrupt_reg & (1 << (port-1)): + # update only if atleast one port has generated + # interrupt + is_port_dict_updated = True + if status_reg & (1 << (port-1)): + # status reg 1 => optics is removed + port_dict[port] = '0' + else: + # status reg 0 => optics is inserted + port_dict[port] = '1' + port += 1 + return retval, is_port_dict_updated + + def get_transceiver_change_event(self, timeout=0): + port_dict = {} + try: + # We get notified when there is an SCI interrupt from GPIO SUS6 + # Open the sysfs file and register the epoll object + self.oir_fd = open(self.OIR_FD_PATH, "r") + if self.oir_fd != -1: + # Do a dummy read before epoll register + self.oir_fd.read() + self.epoll = select.epoll() + self.epoll.register(self.oir_fd.fileno(), + select.EPOLLIN & select.EPOLLET) + else: + print("get_transceiver_change_event : unable to create fd") + return False, {} + + # Check for missed interrupts by invoking self.check_interrupts + # which will update the port_dict. + while True: + interrupt_count_start = self.get_register(self.OIR_FD_PATH) + + retval, is_port_dict_updated = \ + self.check_interrupts(port_dict) + if ((retval == 0) and (is_port_dict_updated is True)): + return True, port_dict + + interrupt_count_end = self.get_register(self.OIR_FD_PATH) + + if (interrupt_count_start == 'ERR' or + interrupt_count_end == 'ERR'): + print("get_transceiver_change_event : \ + unable to retrive interrupt count") + break + + # check_interrupts() itself may take upto 100s of msecs. + # We detect a missed interrupt based on the count + if interrupt_count_start == interrupt_count_end: + break + + # Block until an xcvr is inserted or removed with timeout = -1 + events = self.epoll.poll( + timeout=timeout if timeout != 0 else -1) + if events: + # check interrupts and return the port_dict + retval, is_port_dict_updated = \ + self.check_interrupts(port_dict) + if (retval != 0): + return False, {} + + return True, port_dict + except: + return False, {} + finally: + if self.oir_fd != -1: + self.epoll.unregister(self.oir_fd.fileno()) + self.epoll.close() + self.oir_fd.close() + self.oir_fd = -1 + self.epoll = -1 + + return False, {} + diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/pmon_daemon_control.json b/device/dell/x86_64-dell_z9100_c2538-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..94592fa8ceb --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/dell/x86_64-dell_z9100_c2538-r0/sensors.conf b/device/dell/x86_64-dell_z9100_c2538-r0/sensors.conf new file mode 100644 index 00000000000..e23891de6bf --- /dev/null +++ b/device/dell/x86_64-dell_z9100_c2538-r0/sensors.conf @@ -0,0 +1,32 @@ +chip "SMF_Z9100_ON-isa-0000" +label power1 "PSU1 Input Power" +label power2 "PSU1 Output Power" +label power3 "PSU2 Input Power" +label power4 "PSU2 Output Power" +label temp14 "PSU1 Temp" +label temp15 "PSU2 Temp" +label curr601 "PSU1 Input Current" +label curr602 "PSU1 Output Current" +label curr701 "PSU2 Input Current" +label curr702 "PSU2 Output Current" +ignore temp12 +ignore temp13 +ignore temp5 +ignore temp7 +ignore temp8 +ignore in101 +ignore in102 +ignore in103 +ignore in104 +ignore in201 +ignore in202 +ignore in203 +ignore in204 +ignore in301 +ignore in302 +ignore in303 +ignore in304 +ignore in401 +ignore in402 +ignore in403 +ignore in404 diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/buffers.json.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/buffers_defaults_t0.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..98ec91a9b69 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/buffers_defaults_t0.j2 @@ -0,0 +1,37 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "28550336", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_pool": { + "size": "28550336", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_pool]", + "size":"0", + "mode": "static", + "static_th":"32744448" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_pool]", + "size":"0", + "mode": "dynamic", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/buffers_defaults_t1.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..98ec91a9b69 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/buffers_defaults_t1.j2 @@ -0,0 +1,37 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "28550336", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_pool": { + "size": "28550336", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_pool]", + "size":"0", + "mode": "static", + "static_th":"32744448" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_pool]", + "size":"0", + "mode": "dynamic", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/custom_led.bin b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/custom_led.bin new file mode 100755 index 00000000000..49e559cd981 Binary files /dev/null and b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/custom_led.bin differ diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/linkscan_led_fw.bin b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/linkscan_led_fw.bin new file mode 100755 index 00000000000..c2fa94a2d8c Binary files /dev/null and b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/linkscan_led_fw.bin differ diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/pg_profile_lookup.ini b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/pg_profile_lookup.ini new file mode 100644 index 00000000000..aedda37a887 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -3 2288 + 25000 5m 1248 2288 53248 -3 2288 + 40000 5m 1248 2288 66560 -3 2288 + 50000 5m 1248 2288 90272 -3 2288 + 100000 5m 1248 2288 165568 -3 2288 + 10000 40m 1248 2288 37024 -3 2288 + 25000 40m 1248 2288 53248 -3 2288 + 40000 40m 1248 2288 71552 -3 2288 + 50000 40m 1248 2288 96096 -3 2288 + 100000 40m 1248 2288 177632 -3 2288 + 10000 300m 1248 2288 46176 -3 2288 + 25000 300m 1248 2288 79040 -3 2288 + 40000 300m 1248 2288 108160 -3 2288 + 50000 300m 1248 2288 141856 -3 2288 + 100000 300m 1248 2288 268736 -3 2288 diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/port_config.ini b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/port_config.ini new file mode 100644 index 00000000000..55c8fb3dcf6 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/port_config.ini @@ -0,0 +1,35 @@ +# name lanes alias index speed +Ethernet0 1,2,3,4 hundredGigE1/1 1 100000 +Ethernet4 5,6,7,8 hundredGigE1/2 2 100000 +Ethernet8 9,10,11,12 hundredGigE1/3 3 100000 +Ethernet12 13,14,15,16 hundredGigE1/4 4 100000 +Ethernet16 17,18,19,20 hundredGigE1/5 5 100000 +Ethernet20 21,22,23,24 hundredGigE1/6 6 100000 +Ethernet24 25,26,27,28 hundredGigE1/7 7 100000 +Ethernet28 29,30,31,32 hundredGigE1/8 8 100000 +Ethernet32 33,34,35,36 hundredGigE1/9 9 100000 +Ethernet36 37,38,39,40 hundredGigE1/10 10 100000 +Ethernet40 41,42,43,44 hundredGigE1/11 11 100000 +Ethernet44 45,46,47,48 hundredGigE1/12 12 100000 +Ethernet48 49,50,51,52 hundredGigE1/13 13 100000 +Ethernet52 53,54,55,56 hundredGigE1/14 14 100000 +Ethernet56 57,58,59,60 hundredGigE1/15 15 100000 +Ethernet60 61,62,63,64 hundredGigE1/16 16 100000 +Ethernet64 65,66,67,68 hundredGigE1/17 17 100000 +Ethernet68 69,70,71,72 hundredGigE1/18 18 100000 +Ethernet72 73,74,75,76 hundredGigE1/19 19 100000 +Ethernet76 77,78,79,80 hundredGigE1/20 20 100000 +Ethernet80 81,82,83,84 hundredGigE1/21 21 100000 +Ethernet84 85,86,87,88 hundredGigE1/22 22 100000 +Ethernet88 89,90,91,92 hundredGigE1/23 23 100000 +Ethernet92 93,94,95,96 hundredGigE1/24 24 100000 +Ethernet96 97,98,99,100 hundredGigE1/25 25 100000 +Ethernet100 101,102,103,104 hundredGigE1/26 26 100000 +Ethernet104 105,106,107,108 hundredGigE1/27 27 100000 +Ethernet108 109,110,111,112 hundredGigE1/28 28 100000 +Ethernet112 113,114,115,116 hundredGigE1/29 29 100000 +Ethernet116 117,118,119,120 hundredGigE1/30 30 100000 +Ethernet120 121,122,123,124 hundredGigE1/31 31 100000 +Ethernet124 125,126,127,128 hundredGigE1/32 32 100000 +Ethernet128 128 tenGigE1/33 33 10000 +Ethernet129 129 tenGigE1/34 34 10000 diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/qos.json.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/sai.profile b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/sai.profile new file mode 100644 index 00000000000..e5362a7aef0 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-s5232f-32x100G.config.bcm diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/td3-s5232f-32x100G.config.bcm b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/td3-s5232f-32x100G.config.bcm new file mode 100644 index 00000000000..e5b61b7f1b5 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-C32/td3-s5232f-32x100G.config.bcm @@ -0,0 +1,544 @@ +os=unix + +core_clock_frequency=1525 +dpp_clock_ratio=2:3 + +parity_enable=1 +parity_correction=1 +tdma_intr_enable=1 +schan_intr_enable=0 +tdma_intr_enable=1 +miim_intr_enable=1 +stat_if_parity_enable=1 + +port_flex_enable=1 +port_flex_enable_66=0 +port_flex_enable_130=0 +phy_an_c73=3 +phy_an_c73_66=0 +phy_an_c73_130=0 + +module_64ports=0 +table_dma_enable=1 +tdma_timeout_usec=5000000 +mmu_lossless=0 +pdma_descriptor_prefetch_enable=1 +pktdma_poll_mode_channel_bitmap=1 + +l2xmsg_mode=1 +l2xmsg_hostbuf_size=8192 +ipv6_lpm_128b_enable=1 +max_vp_lags=0 + +l3_alpm_enable=2 +l2_mem_entries=32768 +l3_mem_entries=16384 +l3_max_ecmp_mode=1 + +bcm_tunnel_term_compatible_mode=1 +ifp_inports_support_enable=1 + +stable_size=0x5500000 + +oversubscribe_mode=1 +pbmp_oversubscribe=0x6fffffffffffffffdfffffffffffffffe +pbmp_xport_xe=0x6fffffffffffffffdfffffffffffffffe + + +portmap_1.0=1:100 +portmap_5.0=5:100 +portmap_9.0=9:100 +portmap_13.0=13:100 +portmap_17.0=17:100 +portmap_21.0=21:100 +portmap_25.0=25:100 +portmap_29.0=29:100 +portmap_33.0=33:100 +portmap_37.0=37:100 +portmap_41.0=41:100 +portmap_45.0=45:100 +portmap_49.0=49:100 +portmap_53.0=53:100 +portmap_57.0=57:100 +portmap_61.0=61:100 +portmap_67.0=65:100 +portmap_71.0=69:100 +portmap_75.0=73:100 +portmap_79.0=77:100 +portmap_83.0=81:100 +portmap_87.0=85:100 +portmap_91.0=89:100 +portmap_95.0=93:100 +portmap_99.0=97:100 +portmap_103.0=101:100 +portmap_107.0=105:100 +portmap_111.0=109:100 +portmap_115.0=113:100 +portmap_119.0=117:100 +portmap_123.0=121:100 +portmap_127.0=125:100 +portmap_130.0=128:10:m +portmap_66.0=129:10:m +phy_chain_tx_lane_map_physical{1.0}=0x0132 +phy_chain_rx_lane_map_physical{1.0}=0x3210 +phy_chain_tx_lane_map_physical{5.0}=0x2301 +phy_chain_rx_lane_map_physical{5.0}=0x2031 +phy_chain_tx_lane_map_physical{9.0}=0x0132 +phy_chain_rx_lane_map_physical{9.0}=0x3210 +phy_chain_tx_lane_map_physical{13.0}=0x3201 +phy_chain_rx_lane_map_physical{13.0}=0x2031 +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x3210 +phy_chain_tx_lane_map_physical{21.0}=0x2301 +phy_chain_rx_lane_map_physical{21.0}=0x2031 +phy_chain_tx_lane_map_physical{25.0}=0x0123 +phy_chain_rx_lane_map_physical{25.0}=0x3210 +phy_chain_tx_lane_map_physical{29.0}=0x3201 +phy_chain_rx_lane_map_physical{29.0}=0x2031 +phy_chain_tx_lane_map_physical{33.0}=0x0213 +phy_chain_rx_lane_map_physical{33.0}=0x1302 +phy_chain_tx_lane_map_physical{37.0}=0x1302 +phy_chain_rx_lane_map_physical{37.0}=0x2031 +phy_chain_tx_lane_map_physical{41.0}=0x0231 +phy_chain_rx_lane_map_physical{41.0}=0x3120 +phy_chain_tx_lane_map_physical{45.0}=0x1302 +phy_chain_rx_lane_map_physical{45.0}=0x2031 +phy_chain_tx_lane_map_physical{49.0}=0x2103 +phy_chain_rx_lane_map_physical{49.0}=0x3120 +phy_chain_tx_lane_map_physical{53.0}=0x2301 +phy_chain_rx_lane_map_physical{53.0}=0x2031 +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x2301 +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x1032 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x1023 +phy_chain_tx_lane_map_physical{69.0}=0x0123 +phy_chain_rx_lane_map_physical{69.0}=0x1302 +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x1032 +phy_chain_tx_lane_map_physical{77.0}=0x2013 +phy_chain_rx_lane_map_physical{77.0}=0x3120 +phy_chain_tx_lane_map_physical{81.0}=0x1302 +phy_chain_rx_lane_map_physical{81.0}=0x2031 +phy_chain_tx_lane_map_physical{85.0}=0x0123 +phy_chain_rx_lane_map_physical{85.0}=0x2130 +phy_chain_tx_lane_map_physical{89.0}=0x2301 +phy_chain_rx_lane_map_physical{89.0}=0x2031 +phy_chain_tx_lane_map_physical{93.0}=0x0312 +phy_chain_rx_lane_map_physical{93.0}=0x2310 +phy_chain_tx_lane_map_physical{97.0}=0x2301 +phy_chain_rx_lane_map_physical{97.0}=0x1032 +phy_chain_tx_lane_map_physical{101.0}=0x0123 +phy_chain_rx_lane_map_physical{101.0}=0x3210 +phy_chain_tx_lane_map_physical{105.0}=0x2301 +phy_chain_rx_lane_map_physical{105.0}=0x1032 +phy_chain_tx_lane_map_physical{109.0}=0x0123 +phy_chain_rx_lane_map_physical{109.0}=0x3210 +phy_chain_tx_lane_map_physical{113.0}=0x2301 +phy_chain_rx_lane_map_physical{113.0}=0x2031 +phy_chain_tx_lane_map_physical{117.0}=0x0123 +phy_chain_rx_lane_map_physical{117.0}=0x3210 +phy_chain_tx_lane_map_physical{121.0}=0x2301 +phy_chain_rx_lane_map_physical{121.0}=0x1032 +phy_chain_tx_lane_map_physical{125.0}=0x0123 +phy_chain_rx_lane_map_physical{125.0}=0x3210 +phy_chain_tx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_lane_map_physical{129.0}=0x0231 +phy_chain_tx_lane_map_physical{128.0}=0x3210 +phy_chain_rx_lane_map_physical{128.0}=0x0231 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_tx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_rx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x1 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{109.0}=0x1 +phy_chain_rx_polarity_flip_physical{109.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_rx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x1 +dport_map_enable=1 +dport_map_port_1=1 +dport_map_port_2=2 +dport_map_port_3=3 +dport_map_port_4=4 +dport_map_port_5=5 +dport_map_port_6=6 +dport_map_port_7=7 +dport_map_port_8=8 +dport_map_port_9=9 +dport_map_port_10=10 +dport_map_port_11=11 +dport_map_port_12=12 +dport_map_port_13=13 +dport_map_port_14=14 +dport_map_port_15=15 +dport_map_port_16=16 +dport_map_port_17=17 +dport_map_port_18=18 +dport_map_port_19=19 +dport_map_port_20=20 +dport_map_port_21=21 +dport_map_port_22=22 +dport_map_port_23=23 +dport_map_port_24=24 +dport_map_port_25=25 +dport_map_port_26=26 +dport_map_port_27=27 +dport_map_port_28=28 +dport_map_port_29=29 +dport_map_port_30=30 +dport_map_port_31=31 +dport_map_port_32=32 +dport_map_port_33=33 +dport_map_port_34=34 +dport_map_port_35=35 +dport_map_port_36=36 +dport_map_port_37=37 +dport_map_port_38=38 +dport_map_port_39=39 +dport_map_port_40=40 +dport_map_port_41=41 +dport_map_port_42=42 +dport_map_port_43=43 +dport_map_port_44=44 +dport_map_port_45=45 +dport_map_port_46=46 +dport_map_port_47=47 +dport_map_port_48=48 +dport_map_port_49=49 +dport_map_port_50=50 +dport_map_port_51=51 +dport_map_port_52=52 +dport_map_port_53=53 +dport_map_port_54=54 +dport_map_port_55=55 +dport_map_port_56=56 +dport_map_port_57=57 +dport_map_port_58=58 +dport_map_port_59=59 +dport_map_port_60=60 +dport_map_port_61=61 +dport_map_port_62=62 +dport_map_port_63=63 +dport_map_port_64=64 +dport_map_port_67=65 +dport_map_port_68=66 +dport_map_port_69=67 +dport_map_port_70=68 +dport_map_port_71=69 +dport_map_port_72=70 +dport_map_port_73=71 +dport_map_port_74=72 +dport_map_port_75=73 +dport_map_port_76=74 +dport_map_port_77=75 +dport_map_port_78=76 +dport_map_port_79=77 +dport_map_port_80=78 +dport_map_port_81=79 +dport_map_port_82=80 +dport_map_port_83=81 +dport_map_port_84=82 +dport_map_port_85=83 +dport_map_port_86=84 +dport_map_port_87=85 +dport_map_port_88=86 +dport_map_port_89=87 +dport_map_port_90=88 +dport_map_port_91=89 +dport_map_port_92=90 +dport_map_port_93=91 +dport_map_port_94=92 +dport_map_port_95=93 +dport_map_port_96=94 +dport_map_port_97=95 +dport_map_port_98=96 +dport_map_port_99=97 +dport_map_port_100=98 +dport_map_port_101=99 +dport_map_port_102=100 +dport_map_port_103=101 +dport_map_port_104=102 +dport_map_port_105=103 +dport_map_port_106=104 +dport_map_port_107=105 +dport_map_port_108=106 +dport_map_port_109=107 +dport_map_port_110=108 +dport_map_port_111=109 +dport_map_port_112=110 +dport_map_port_113=111 +dport_map_port_114=112 +dport_map_port_115=113 +dport_map_port_116=114 +dport_map_port_117=115 +dport_map_port_118=116 +dport_map_port_119=117 +dport_map_port_120=118 +dport_map_port_121=119 +dport_map_port_122=120 +dport_map_port_123=121 +dport_map_port_124=122 +dport_map_port_125=123 +dport_map_port_126=124 +dport_map_port_127=125 +dport_map_port_129=126 +dport_map_port_66=127 +dport_map_port_130=128 + +mmu_init_config="TD3-DEFAULT-LOSSLESS-P3P4" diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/buffers.json.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/buffers_defaults_t0.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..c31728e4654 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/buffers_defaults_t0.j2 @@ -0,0 +1,46 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "32744448", + "type": "ingress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "32744448", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"32744448" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { + "{{ port_names_active }}|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, +{%- endmacro %} + +{% macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { + "{{ port_names_active }}|0-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +{% endmacro %} + diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/buffers_defaults_t1.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..c31728e4654 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "32744448", + "type": "ingress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "32744448", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"32744448" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { + "{{ port_names_active }}|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, +{%- endmacro %} + +{% macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { + "{{ port_names_active }}|0-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +{% endmacro %} + diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/custom_led.bin b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/custom_led.bin new file mode 100755 index 00000000000..49e559cd981 Binary files /dev/null and b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/custom_led.bin differ diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/linkscan_led_fw.bin b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/linkscan_led_fw.bin new file mode 100755 index 00000000000..c2fa94a2d8c Binary files /dev/null and b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/linkscan_led_fw.bin differ diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/port_config.ini b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/port_config.ini new file mode 100644 index 00000000000..55c8fb3dcf6 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/port_config.ini @@ -0,0 +1,35 @@ +# name lanes alias index speed +Ethernet0 1,2,3,4 hundredGigE1/1 1 100000 +Ethernet4 5,6,7,8 hundredGigE1/2 2 100000 +Ethernet8 9,10,11,12 hundredGigE1/3 3 100000 +Ethernet12 13,14,15,16 hundredGigE1/4 4 100000 +Ethernet16 17,18,19,20 hundredGigE1/5 5 100000 +Ethernet20 21,22,23,24 hundredGigE1/6 6 100000 +Ethernet24 25,26,27,28 hundredGigE1/7 7 100000 +Ethernet28 29,30,31,32 hundredGigE1/8 8 100000 +Ethernet32 33,34,35,36 hundredGigE1/9 9 100000 +Ethernet36 37,38,39,40 hundredGigE1/10 10 100000 +Ethernet40 41,42,43,44 hundredGigE1/11 11 100000 +Ethernet44 45,46,47,48 hundredGigE1/12 12 100000 +Ethernet48 49,50,51,52 hundredGigE1/13 13 100000 +Ethernet52 53,54,55,56 hundredGigE1/14 14 100000 +Ethernet56 57,58,59,60 hundredGigE1/15 15 100000 +Ethernet60 61,62,63,64 hundredGigE1/16 16 100000 +Ethernet64 65,66,67,68 hundredGigE1/17 17 100000 +Ethernet68 69,70,71,72 hundredGigE1/18 18 100000 +Ethernet72 73,74,75,76 hundredGigE1/19 19 100000 +Ethernet76 77,78,79,80 hundredGigE1/20 20 100000 +Ethernet80 81,82,83,84 hundredGigE1/21 21 100000 +Ethernet84 85,86,87,88 hundredGigE1/22 22 100000 +Ethernet88 89,90,91,92 hundredGigE1/23 23 100000 +Ethernet92 93,94,95,96 hundredGigE1/24 24 100000 +Ethernet96 97,98,99,100 hundredGigE1/25 25 100000 +Ethernet100 101,102,103,104 hundredGigE1/26 26 100000 +Ethernet104 105,106,107,108 hundredGigE1/27 27 100000 +Ethernet108 109,110,111,112 hundredGigE1/28 28 100000 +Ethernet112 113,114,115,116 hundredGigE1/29 29 100000 +Ethernet116 117,118,119,120 hundredGigE1/30 30 100000 +Ethernet120 121,122,123,124 hundredGigE1/31 31 100000 +Ethernet124 125,126,127,128 hundredGigE1/32 32 100000 +Ethernet128 128 tenGigE1/33 33 10000 +Ethernet129 129 tenGigE1/34 34 10000 diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/qos.json.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/qos.json.j2 new file mode 100644 index 00000000000..d2b3d2b0131 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/qos.json.j2 @@ -0,0 +1,226 @@ +{%- set PORT_ALL = [] %} +{%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{% endif %} +{%- endfor %} +{%- if PORT_ALL | sort_by_port_index %}{% endif %} + +{%- set port_names_list_all = [] %} +{%- for port in PORT_ALL %} + {%- if port_names_list_all.append(port) %}{% endif %} +{%- endfor %} +{%- set port_names_all = port_names_list_all | join(',') -%} + + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} +{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') -%} + + +{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%} + + +{ +{% if generate_tc_to_pg_map is defined %} + {{- generate_tc_to_pg_map() }} +{% else %} + "TC_TO_PRIORITY_GROUP_MAP": { + "DEFAULT": { + "0": "0", + "1": "0", + "2": "0", + "3": "0", + "4": "0", + "5": "0", + "6": "0", + "7": "7" + } + }, +{% endif %} + "MAP_PFC_PRIORITY_TO_QUEUE": { + "DEFAULT": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_QUEUE_MAP": { + "DEFAULT": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "DSCP_TO_TC_MAP": { + "DEFAULT": { + "0" : "0", + "1" : "0", + "2" : "0", + "3" : "0", + "4" : "0", + "5" : "0", + "6" : "0", + "7" : "0", + "8" : "0", + "9" : "0", + "10": "0", + "11": "0", + "12": "0", + "13": "0", + "14": "0", + "15": "0", + "16": "0", + "17": "0", + "18": "0", + "19": "0", + "20": "0", + "21": "0", + "22": "0", + "23": "0", + "24": "0", + "25": "0", + "26": "0", + "27": "0", + "28": "0", + "29": "0", + "30": "0", + "31": "0", + "32": "0", + "33": "0", + "34": "0", + "35": "0", + "36": "0", + "37": "0", + "38": "0", + "39": "0", + "40": "0", + "41": "0", + "42": "0", + "43": "0", + "44": "0", + "45": "0", + "46": "0", + "47": "0", + "48": "0", + "49": "0", + "50": "0", + "51": "0", + "52": "0", + "53": "0", + "54": "0", + "55": "0", + "56": "0", + "57": "0", + "58": "0", + "59": "0", + "60": "0", + "61": "0", + "62": "0", + "63": "0" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type" : "DWRR", + "weight": "1" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "2" + }, + "scheduler.2": { + "type" : "DWRR", + "weight": "3" + }, + "scheduler.3": { + "type" : "DWRR", + "weight": "4" + }, + "scheduler.4": { + "type" : "DWRR", + "weight": "5" + }, + "scheduler.5": { + "type" : "DWRR", + "weight": "10" + }, + "scheduler.6": { + "type" : "DWRR", + "weight": "25" + }, + "scheduler.7": { + "type" : "DWRR", + "weight": "50" + } + }, + "PORT_QOS_MAP": { + "{{ port_names_active }}": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|DEFAULT]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|DEFAULT]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|DEFAULT]" + } + }, + "QUEUE": { +{% for port in PORT_ACTIVE %} + "{{ port }}|0": { + "scheduler" : "[SCHEDULER|scheduler.0]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|1": { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|2": { + "scheduler": "[SCHEDULER|scheduler.2]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|3": { + "scheduler": "[SCHEDULER|scheduler.3]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|4": { + "scheduler": "[SCHEDULER|scheduler.4]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|5": { + "scheduler": "[SCHEDULER|scheduler.5]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|6": { + "scheduler": "[SCHEDULER|scheduler.6]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|7": { + "scheduler": "[SCHEDULER|scheduler.7]" + }{% if not loop.last %},{% endif %} +{% endfor %} + } +} diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/sai.profile b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/sai.profile new file mode 100644 index 00000000000..e5362a7aef0 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-s5232f-32x100G.config.bcm diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/td3-s5232f-32x100G.config.bcm b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/td3-s5232f-32x100G.config.bcm new file mode 100644 index 00000000000..533e19aca1c --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-100G/td3-s5232f-32x100G.config.bcm @@ -0,0 +1,544 @@ +os=unix + +core_clock_frequency=1525 +dpp_clock_ratio=2:3 + +parity_enable=1 +parity_correction=1 +tdma_intr_enable=1 +schan_intr_enable=0 +tdma_intr_enable=1 +miim_intr_enable=1 +stat_if_parity_enable=1 + +port_flex_enable=1 +port_flex_enable_66=0 +port_flex_enable_130=0 +phy_an_c73=3 +phy_an_c73_66=0 +phy_an_c73_130=0 + +module_64ports=0 +table_dma_enable=1 +tdma_timeout_usec=5000000 +mmu_lossless=0 +pdma_descriptor_prefetch_enable=1 +pktdma_poll_mode_channel_bitmap=1 + +l2xmsg_mode=1 +l2xmsg_hostbuf_size=8192 +ipv6_lpm_128b_enable=1 +max_vp_lags=0 + +l3_alpm_enable=2 +l2_mem_entries=32768 +l3_mem_entries=16384 +l3_max_ecmp_mode=1 + +bcm_tunnel_term_compatible_mode=1 +ifp_inports_support_enable=1 + +stable_size=0x5500000 + +oversubscribe_mode=1 +pbmp_oversubscribe=0x6fffffffffffffffdfffffffffffffffe +pbmp_xport_xe=0x6fffffffffffffffdfffffffffffffffe + + +portmap_1.0=1:100 +portmap_5.0=5:100 +portmap_9.0=9:100 +portmap_13.0=13:100 +portmap_17.0=17:100 +portmap_21.0=21:100 +portmap_25.0=25:100 +portmap_29.0=29:100 +portmap_33.0=33:100 +portmap_37.0=37:100 +portmap_41.0=41:100 +portmap_45.0=45:100 +portmap_49.0=49:100 +portmap_53.0=53:100 +portmap_57.0=57:100 +portmap_61.0=61:100 +portmap_67.0=65:100 +portmap_71.0=69:100 +portmap_75.0=73:100 +portmap_79.0=77:100 +portmap_83.0=81:100 +portmap_87.0=85:100 +portmap_91.0=89:100 +portmap_95.0=93:100 +portmap_99.0=97:100 +portmap_103.0=101:100 +portmap_107.0=105:100 +portmap_111.0=109:100 +portmap_115.0=113:100 +portmap_119.0=117:100 +portmap_123.0=121:100 +portmap_127.0=125:100 +portmap_130.0=128:10:m +portmap_66.0=129:10:m +phy_chain_tx_lane_map_physical{1.0}=0x0132 +phy_chain_rx_lane_map_physical{1.0}=0x3210 +phy_chain_tx_lane_map_physical{5.0}=0x2301 +phy_chain_rx_lane_map_physical{5.0}=0x2031 +phy_chain_tx_lane_map_physical{9.0}=0x0132 +phy_chain_rx_lane_map_physical{9.0}=0x3210 +phy_chain_tx_lane_map_physical{13.0}=0x3201 +phy_chain_rx_lane_map_physical{13.0}=0x2031 +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x3210 +phy_chain_tx_lane_map_physical{21.0}=0x2301 +phy_chain_rx_lane_map_physical{21.0}=0x2031 +phy_chain_tx_lane_map_physical{25.0}=0x0123 +phy_chain_rx_lane_map_physical{25.0}=0x3210 +phy_chain_tx_lane_map_physical{29.0}=0x3201 +phy_chain_rx_lane_map_physical{29.0}=0x2031 +phy_chain_tx_lane_map_physical{33.0}=0x0213 +phy_chain_rx_lane_map_physical{33.0}=0x1302 +phy_chain_tx_lane_map_physical{37.0}=0x1302 +phy_chain_rx_lane_map_physical{37.0}=0x2031 +phy_chain_tx_lane_map_physical{41.0}=0x0231 +phy_chain_rx_lane_map_physical{41.0}=0x3120 +phy_chain_tx_lane_map_physical{45.0}=0x1302 +phy_chain_rx_lane_map_physical{45.0}=0x2031 +phy_chain_tx_lane_map_physical{49.0}=0x2103 +phy_chain_rx_lane_map_physical{49.0}=0x3120 +phy_chain_tx_lane_map_physical{53.0}=0x2301 +phy_chain_rx_lane_map_physical{53.0}=0x2031 +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x2301 +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x1032 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x1023 +phy_chain_tx_lane_map_physical{69.0}=0x0123 +phy_chain_rx_lane_map_physical{69.0}=0x1302 +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x1032 +phy_chain_tx_lane_map_physical{77.0}=0x2013 +phy_chain_rx_lane_map_physical{77.0}=0x3120 +phy_chain_tx_lane_map_physical{81.0}=0x1302 +phy_chain_rx_lane_map_physical{81.0}=0x2031 +phy_chain_tx_lane_map_physical{85.0}=0x0123 +phy_chain_rx_lane_map_physical{85.0}=0x2130 +phy_chain_tx_lane_map_physical{89.0}=0x2301 +phy_chain_rx_lane_map_physical{89.0}=0x2031 +phy_chain_tx_lane_map_physical{93.0}=0x0312 +phy_chain_rx_lane_map_physical{93.0}=0x2310 +phy_chain_tx_lane_map_physical{97.0}=0x2301 +phy_chain_rx_lane_map_physical{97.0}=0x1032 +phy_chain_tx_lane_map_physical{101.0}=0x0123 +phy_chain_rx_lane_map_physical{101.0}=0x3210 +phy_chain_tx_lane_map_physical{105.0}=0x2301 +phy_chain_rx_lane_map_physical{105.0}=0x1032 +phy_chain_tx_lane_map_physical{109.0}=0x0123 +phy_chain_rx_lane_map_physical{109.0}=0x3210 +phy_chain_tx_lane_map_physical{113.0}=0x2301 +phy_chain_rx_lane_map_physical{113.0}=0x2031 +phy_chain_tx_lane_map_physical{117.0}=0x0123 +phy_chain_rx_lane_map_physical{117.0}=0x3210 +phy_chain_tx_lane_map_physical{121.0}=0x2301 +phy_chain_rx_lane_map_physical{121.0}=0x1032 +phy_chain_tx_lane_map_physical{125.0}=0x0123 +phy_chain_rx_lane_map_physical{125.0}=0x3210 +phy_chain_tx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_lane_map_physical{129.0}=0x0231 +phy_chain_tx_lane_map_physical{128.0}=0x3210 +phy_chain_rx_lane_map_physical{128.0}=0x0231 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_tx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_rx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x1 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{109.0}=0x1 +phy_chain_rx_polarity_flip_physical{109.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_rx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x1 +dport_map_enable=1 +dport_map_port_1=1 +dport_map_port_2=2 +dport_map_port_3=3 +dport_map_port_4=4 +dport_map_port_5=5 +dport_map_port_6=6 +dport_map_port_7=7 +dport_map_port_8=8 +dport_map_port_9=9 +dport_map_port_10=10 +dport_map_port_11=11 +dport_map_port_12=12 +dport_map_port_13=13 +dport_map_port_14=14 +dport_map_port_15=15 +dport_map_port_16=16 +dport_map_port_17=17 +dport_map_port_18=18 +dport_map_port_19=19 +dport_map_port_20=20 +dport_map_port_21=21 +dport_map_port_22=22 +dport_map_port_23=23 +dport_map_port_24=24 +dport_map_port_25=25 +dport_map_port_26=26 +dport_map_port_27=27 +dport_map_port_28=28 +dport_map_port_29=29 +dport_map_port_30=30 +dport_map_port_31=31 +dport_map_port_32=32 +dport_map_port_33=33 +dport_map_port_34=34 +dport_map_port_35=35 +dport_map_port_36=36 +dport_map_port_37=37 +dport_map_port_38=38 +dport_map_port_39=39 +dport_map_port_40=40 +dport_map_port_41=41 +dport_map_port_42=42 +dport_map_port_43=43 +dport_map_port_44=44 +dport_map_port_45=45 +dport_map_port_46=46 +dport_map_port_47=47 +dport_map_port_48=48 +dport_map_port_49=49 +dport_map_port_50=50 +dport_map_port_51=51 +dport_map_port_52=52 +dport_map_port_53=53 +dport_map_port_54=54 +dport_map_port_55=55 +dport_map_port_56=56 +dport_map_port_57=57 +dport_map_port_58=58 +dport_map_port_59=59 +dport_map_port_60=60 +dport_map_port_61=61 +dport_map_port_62=62 +dport_map_port_63=63 +dport_map_port_64=64 +dport_map_port_67=65 +dport_map_port_68=66 +dport_map_port_69=67 +dport_map_port_70=68 +dport_map_port_71=69 +dport_map_port_72=70 +dport_map_port_73=71 +dport_map_port_74=72 +dport_map_port_75=73 +dport_map_port_76=74 +dport_map_port_77=75 +dport_map_port_78=76 +dport_map_port_79=77 +dport_map_port_80=78 +dport_map_port_81=79 +dport_map_port_82=80 +dport_map_port_83=81 +dport_map_port_84=82 +dport_map_port_85=83 +dport_map_port_86=84 +dport_map_port_87=85 +dport_map_port_88=86 +dport_map_port_89=87 +dport_map_port_90=88 +dport_map_port_91=89 +dport_map_port_92=90 +dport_map_port_93=91 +dport_map_port_94=92 +dport_map_port_95=93 +dport_map_port_96=94 +dport_map_port_97=95 +dport_map_port_98=96 +dport_map_port_99=97 +dport_map_port_100=98 +dport_map_port_101=99 +dport_map_port_102=100 +dport_map_port_103=101 +dport_map_port_104=102 +dport_map_port_105=103 +dport_map_port_106=104 +dport_map_port_107=105 +dport_map_port_108=106 +dport_map_port_109=107 +dport_map_port_110=108 +dport_map_port_111=109 +dport_map_port_112=110 +dport_map_port_113=111 +dport_map_port_114=112 +dport_map_port_115=113 +dport_map_port_116=114 +dport_map_port_117=115 +dport_map_port_118=116 +dport_map_port_119=117 +dport_map_port_120=118 +dport_map_port_121=119 +dport_map_port_122=120 +dport_map_port_123=121 +dport_map_port_124=122 +dport_map_port_125=123 +dport_map_port_126=124 +dport_map_port_127=125 +dport_map_port_129=126 +dport_map_port_66=127 +dport_map_port_130=128 + +mmu_init_config="TD3-DEFAULT" diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/buffers.json.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/buffers_defaults_t0.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..c31728e4654 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/buffers_defaults_t0.j2 @@ -0,0 +1,46 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "32744448", + "type": "ingress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "32744448", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"32744448" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { + "{{ port_names_active }}|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, +{%- endmacro %} + +{% macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { + "{{ port_names_active }}|0-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +{% endmacro %} + diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/buffers_defaults_t1.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..c31728e4654 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "32744448", + "type": "ingress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "32744448", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"32744448" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { + "{{ port_names_active }}|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, +{%- endmacro %} + +{% macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { + "{{ port_names_active }}|0-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +{% endmacro %} + diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/custom_led.bin b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/custom_led.bin new file mode 100755 index 00000000000..49e559cd981 Binary files /dev/null and b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/custom_led.bin differ diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/linkscan_led_fw.bin b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/linkscan_led_fw.bin new file mode 100755 index 00000000000..c2fa94a2d8c Binary files /dev/null and b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/linkscan_led_fw.bin differ diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/port_config.ini b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/port_config.ini new file mode 100644 index 00000000000..726427759c0 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/port_config.ini @@ -0,0 +1,107 @@ +# name lanes alias index speed +Ethernet0 1 tenGigE1/1/1 1 10000 +Ethernet1 2 tenGigE1/1/2 1 10000 +Ethernet2 3 tenGigE1/1/3 1 10000 +Ethernet3 4 tenGigE1/1/4 1 10000 +Ethernet4 5 tenGigE1/2/1 2 10000 +Ethernet5 6 tenGigE1/2/2 2 10000 +Ethernet6 7 tenGigE1/2/3 2 10000 +Ethernet7 8 tenGigE1/2/4 2 10000 +Ethernet8 9 tenGigE1/3/1 3 10000 +Ethernet9 10 tenGigE1/3/2 3 10000 +Ethernet10 11 tenGigE1/3/3 3 10000 +Ethernet11 12 tenGigE1/3/4 3 10000 +Ethernet12 13 tenGigE1/4/1 4 10000 +Ethernet13 14 tenGigE1/4/2 4 10000 +Ethernet14 15 tenGigE1/4/3 4 10000 +Ethernet15 16 tenGigE1/4/4 4 10000 +Ethernet16 17 tenGigE1/5/1 5 10000 +Ethernet17 18 tenGigE1/5/2 5 10000 +Ethernet18 19 tenGigE1/5/3 5 10000 +Ethernet19 20 tenGigE1/5/4 5 10000 +Ethernet20 21 tenGigE1/6/1 6 10000 +Ethernet21 22 tenGigE1/6/2 6 10000 +Ethernet22 23 tenGigE1/6/3 6 10000 +Ethernet23 24 tenGigE1/6/4 6 10000 +Ethernet24 25 tenGigE1/7/1 7 10000 +Ethernet25 26 tenGigE1/7/2 7 10000 +Ethernet26 27 tenGigE1/7/3 7 10000 +Ethernet27 28 tenGigE1/7/4 7 10000 +Ethernet28 29 tenGigE1/8/1 8 10000 +Ethernet29 30 tenGigE1/8/2 8 10000 +Ethernet30 31 tenGigE1/8/3 8 10000 +Ethernet31 32 tenGigE1/8/4 8 10000 +Ethernet32 33 tenGigE1/9/1 9 10000 +Ethernet33 34 tenGigE1/9/2 9 10000 +Ethernet34 35 tenGigE1/9/3 9 10000 +Ethernet35 36 tenGigE1/9/4 9 10000 +Ethernet36 37 tenGigE1/10/1 10 10000 +Ethernet37 38 tenGigE1/10/2 10 10000 +Ethernet38 39 tenGigE1/10/3 10 10000 +Ethernet39 40 tenGigE1/10/4 10 10000 +Ethernet40 41 tenGigE1/11/1 11 10000 +Ethernet41 42 tenGigE1/11/2 11 10000 +Ethernet42 43 tenGigE1/11/3 11 10000 +Ethernet43 44 tenGigE1/11/4 11 10000 +Ethernet44 45 tenGigE1/12/1 12 10000 +Ethernet45 46 tenGigE1/12/2 12 10000 +Ethernet46 47 tenGigE1/12/3 12 10000 +Ethernet47 48 tenGigE1/12/4 12 10000 +Ethernet48 49 tenGigE1/13/1 13 10000 +Ethernet49 50 tenGigE1/13/2 13 10000 +Ethernet50 51 tenGigE1/13/3 13 10000 +Ethernet51 52 tenGigE1/13/4 13 10000 +Ethernet52 53 tenGigE1/14/1 14 10000 +Ethernet53 54 tenGigE1/14/2 14 10000 +Ethernet54 55 tenGigE1/14/3 14 10000 +Ethernet55 56 tenGigE1/14/4 14 10000 +Ethernet56 57 tenGigE1/15/1 15 10000 +Ethernet57 58 tenGigE1/15/2 15 10000 +Ethernet58 59 tenGigE1/15/3 15 10000 +Ethernet59 60 tenGigE1/15/4 15 10000 +Ethernet60 61 tenGigE1/16/1 16 10000 +Ethernet61 62 tenGigE1/16/2 16 10000 +Ethernet62 63 tenGigE1/16/3 16 10000 +Ethernet63 64 tenGigE1/16/4 16 10000 +Ethernet64 65 tenGigE1/17/1 17 10000 +Ethernet65 66 tenGigE1/17/2 17 10000 +Ethernet66 67 tenGigE1/17/3 17 10000 +Ethernet67 68 tenGigE1/17/4 17 10000 +Ethernet68 69 tenGigE1/18/1 18 10000 +Ethernet69 70 tenGigE1/18/2 18 10000 +Ethernet70 71 tenGigE1/18/3 18 10000 +Ethernet71 72 tenGigE1/18/4 18 10000 +Ethernet72 73 tenGigE1/19/1 19 10000 +Ethernet73 74 tenGigE1/19/2 19 10000 +Ethernet74 75 tenGigE1/19/3 19 10000 +Ethernet75 76 tenGigE1/19/4 19 10000 +Ethernet76 77 tenGigE1/20/1 20 10000 +Ethernet77 78 tenGigE1/20/2 20 10000 +Ethernet78 79 tenGigE1/20/3 20 10000 +Ethernet79 80 tenGigE1/20/4 20 10000 +Ethernet80 81 tenGigE1/21/1 21 10000 +Ethernet81 82 tenGigE1/21/2 21 10000 +Ethernet82 83 tenGigE1/21/3 21 10000 +Ethernet83 84 tenGigE1/21/4 21 10000 +Ethernet84 85 tenGigE1/22/1 22 10000 +Ethernet85 86 tenGigE1/22/2 22 10000 +Ethernet86 87 tenGigE1/22/3 22 10000 +Ethernet87 88 tenGigE1/22/4 22 10000 +Ethernet88 89 tenGigE1/23/1 23 10000 +Ethernet89 90 tenGigE1/23/2 23 10000 +Ethernet90 91 tenGigE1/23/3 23 10000 +Ethernet91 92 tenGigE1/23/4 23 10000 +Ethernet92 93 tenGigE1/24/1 24 10000 +Ethernet93 94 tenGigE1/24/2 24 10000 +Ethernet94 95 tenGigE1/24/3 24 10000 +Ethernet95 96 tenGigE1/24/4 24 10000 +Ethernet96 97,98,99,100 hundredGigE1/25 25 100000 +Ethernet100 101,102,103,104 hundredGigE1/26 26 100000 +Ethernet104 105,106,107,108 hundredGigE1/27 27 100000 +Ethernet108 109,110,111,112 hundredGigE1/28 28 100000 +Ethernet112 113,114,115,116 hundredGigE1/29 29 100000 +Ethernet116 117,118,119,120 hundredGigE1/30 30 100000 +Ethernet120 121,122,123,124 hundredGigE1/31 31 100000 +Ethernet124 125,126,127,128 hundredGigE1/32 32 100000 +Ethernet128 128 tenGigE1/33 33 10000 +Ethernet129 129 tenGigE1/34 34 10000 diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/qos.json.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/qos.json.j2 new file mode 100644 index 00000000000..d2b3d2b0131 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/qos.json.j2 @@ -0,0 +1,226 @@ +{%- set PORT_ALL = [] %} +{%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{% endif %} +{%- endfor %} +{%- if PORT_ALL | sort_by_port_index %}{% endif %} + +{%- set port_names_list_all = [] %} +{%- for port in PORT_ALL %} + {%- if port_names_list_all.append(port) %}{% endif %} +{%- endfor %} +{%- set port_names_all = port_names_list_all | join(',') -%} + + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} +{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') -%} + + +{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%} + + +{ +{% if generate_tc_to_pg_map is defined %} + {{- generate_tc_to_pg_map() }} +{% else %} + "TC_TO_PRIORITY_GROUP_MAP": { + "DEFAULT": { + "0": "0", + "1": "0", + "2": "0", + "3": "0", + "4": "0", + "5": "0", + "6": "0", + "7": "7" + } + }, +{% endif %} + "MAP_PFC_PRIORITY_TO_QUEUE": { + "DEFAULT": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_QUEUE_MAP": { + "DEFAULT": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "DSCP_TO_TC_MAP": { + "DEFAULT": { + "0" : "0", + "1" : "0", + "2" : "0", + "3" : "0", + "4" : "0", + "5" : "0", + "6" : "0", + "7" : "0", + "8" : "0", + "9" : "0", + "10": "0", + "11": "0", + "12": "0", + "13": "0", + "14": "0", + "15": "0", + "16": "0", + "17": "0", + "18": "0", + "19": "0", + "20": "0", + "21": "0", + "22": "0", + "23": "0", + "24": "0", + "25": "0", + "26": "0", + "27": "0", + "28": "0", + "29": "0", + "30": "0", + "31": "0", + "32": "0", + "33": "0", + "34": "0", + "35": "0", + "36": "0", + "37": "0", + "38": "0", + "39": "0", + "40": "0", + "41": "0", + "42": "0", + "43": "0", + "44": "0", + "45": "0", + "46": "0", + "47": "0", + "48": "0", + "49": "0", + "50": "0", + "51": "0", + "52": "0", + "53": "0", + "54": "0", + "55": "0", + "56": "0", + "57": "0", + "58": "0", + "59": "0", + "60": "0", + "61": "0", + "62": "0", + "63": "0" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type" : "DWRR", + "weight": "1" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "2" + }, + "scheduler.2": { + "type" : "DWRR", + "weight": "3" + }, + "scheduler.3": { + "type" : "DWRR", + "weight": "4" + }, + "scheduler.4": { + "type" : "DWRR", + "weight": "5" + }, + "scheduler.5": { + "type" : "DWRR", + "weight": "10" + }, + "scheduler.6": { + "type" : "DWRR", + "weight": "25" + }, + "scheduler.7": { + "type" : "DWRR", + "weight": "50" + } + }, + "PORT_QOS_MAP": { + "{{ port_names_active }}": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|DEFAULT]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|DEFAULT]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|DEFAULT]" + } + }, + "QUEUE": { +{% for port in PORT_ACTIVE %} + "{{ port }}|0": { + "scheduler" : "[SCHEDULER|scheduler.0]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|1": { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|2": { + "scheduler": "[SCHEDULER|scheduler.2]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|3": { + "scheduler": "[SCHEDULER|scheduler.3]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|4": { + "scheduler": "[SCHEDULER|scheduler.4]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|5": { + "scheduler": "[SCHEDULER|scheduler.5]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|6": { + "scheduler": "[SCHEDULER|scheduler.6]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|7": { + "scheduler": "[SCHEDULER|scheduler.7]" + }{% if not loop.last %},{% endif %} +{% endfor %} + } +} diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/sai.profile b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/sai.profile new file mode 100644 index 00000000000..947af7ebacc --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-s5232f-96x10G+8x100G.config.bcm diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/td3-s5232f-96x10G+8x100G.config.bcm b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/td3-s5232f-96x10G+8x100G.config.bcm new file mode 100644 index 00000000000..0da20afc220 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-10G/td3-s5232f-96x10G+8x100G.config.bcm @@ -0,0 +1,617 @@ +os=unix + +core_clock_frequency=1525 +dpp_clock_ratio=2:3 + +parity_enable=1 +parity_correction=1 +tdma_intr_enable=1 +schan_intr_enable=0 +tdma_intr_enable=1 +miim_intr_enable=1 +stat_if_parity_enable=1 + +port_flex_enable=1 +port_flex_enable_66=0 +port_flex_enable_130=0 +phy_an_c73=3 +phy_an_c73_66=0 +phy_an_c73_130=0 + +module_64ports=0 +table_dma_enable=1 +tdma_timeout_usec=5000000 +mmu_lossless=0 +pdma_descriptor_prefetch_enable=1 +pktdma_poll_mode_channel_bitmap=1 + +l2xmsg_mode=1 +l2xmsg_hostbuf_size=8192 +ipv6_lpm_128b_enable=1 +max_vp_lags=0 + +l3_alpm_enable=2 +l2_mem_entries=32768 +l3_mem_entries=16384 +l3_max_ecmp_mode=1 + +bcm_tunnel_term_compatible_mode=1 +ifp_inports_support_enable=1 + +stable_size=0x5500000 + +oversubscribe_mode=1 +pbmp_oversubscribe=0x6fffffffffffffffdfffffffffffffffe +pbmp_xport_xe=0x6fffffffffffffffdfffffffffffffffe + + +portmap_1.0=1:10:1 +portmap_2.0=2:10:1 +portmap_3.0=3:10:1 +portmap_4.0=4:10:1 +portmap_5.0=5:10:1 +portmap_6.0=6:10:1 +portmap_7.0=7:10:1 +portmap_8.0=8:10:1 +portmap_9.0=9:10:1 +portmap_10.0=10:10:1 +portmap_11.0=11:10:1 +portmap_12.0=12:10:1 +portmap_13.0=13:10:1 +portmap_14.0=14:10:1 +portmap_15.0=15:10:1 +portmap_16.0=16:10:1 +portmap_17.0=17:10:1 +portmap_18.0=18:10:1 +portmap_19.0=19:10:1 +portmap_20.0=20:10:1 +portmap_21.0=21:10:1 +portmap_22.0=22:10:1 +portmap_23.0=23:10:1 +portmap_24.0=24:10:1 +portmap_25.0=25:10:1 +portmap_26.0=26:10:1 +portmap_27.0=27:10:1 +portmap_28.0=28:10:1 +portmap_29.0=29:10:1 +portmap_30.0=30:10:1 +portmap_31.0=31:10:1 +portmap_32.0=32:10:1 +portmap_33.0=33:10:1 +portmap_34.0=34:10:1 +portmap_35.0=35:10:1 +portmap_36.0=36:10:1 +portmap_37.0=37:10:1 +portmap_38.0=38:10:1 +portmap_39.0=39:10:1 +portmap_40.0=40:10:1 +portmap_41.0=41:10:1 +portmap_42.0=42:10:1 +portmap_43.0=43:10:1 +portmap_44.0=44:10:1 +portmap_45.0=45:10:1 +portmap_46.0=46:10:1 +portmap_47.0=47:10:1 +portmap_48.0=48:10:1 +portmap_49.0=49:10:1 +portmap_50.0=50:10:1 +portmap_51.0=51:10:1 +portmap_52.0=52:10:1 +portmap_53.0=53:10:1 +portmap_54.0=54:10:1 +portmap_55.0=55:10:1 +portmap_56.0=56:10:1 +portmap_57.0=57:10:1 +portmap_58.0=58:10:1 +portmap_59.0=59:10:1 +portmap_60.0=60:10:1 +portmap_61.0=61:10:1 +portmap_62.0=62:10:1 +portmap_63.0=63:10:1 +portmap_64.0=64:10:1 + +portmap_67.0=65:10:1 +portmap_68.0=66:10:1 +portmap_69.0=67:10:1 +portmap_70.0=68:10:1 +portmap_71.0=69:10:1 +portmap_72.0=70:10:1 +portmap_73.0=71:10:1 +portmap_74.0=72:10:1 +portmap_75.0=73:10:1 +portmap_76.0=74:10:1 +portmap_77.0=75:10:1 +portmap_78.0=76:10:1 +portmap_79.0=77:10:1 +portmap_80.0=78:10:1 +portmap_81.0=79:10:1 +portmap_82.0=80:10:1 +portmap_83.0=81:10:1 +portmap_84.0=82:10:1 +portmap_85.0=83:10:1 +portmap_86.0=84:10:1 +portmap_87.0=85:10:1 +portmap_88.0=86:10:1 +portmap_89.0=87:10:1 +portmap_90.0=88:10:1 +portmap_91.0=89:10:1 +portmap_92.0=90:10:1 +portmap_93.0=91:10:1 +portmap_94.0=92:10:1 +portmap_95.0=93:10:1 +portmap_96.0=94:10:1 +portmap_97.0=95:10:1 +portmap_98.0=96:10:1 +portmap_99.0=97:100 +portmap_103.0=101:100 +portmap_107.0=105:100 +portmap_111.0=109:100 +portmap_115.0=113:100 +portmap_119.0=117:100 +portmap_123.0=121:100 +portmap_127.0=125:100 +portmap_130.0=128:10:m +portmap_66.0=129:10:m +phy_chain_tx_lane_map_physical{1.0}=0x0132 +phy_chain_rx_lane_map_physical{1.0}=0x3210 +phy_chain_tx_lane_map_physical{5.0}=0x2301 +phy_chain_rx_lane_map_physical{5.0}=0x2031 +phy_chain_tx_lane_map_physical{9.0}=0x0132 +phy_chain_rx_lane_map_physical{9.0}=0x3210 +phy_chain_tx_lane_map_physical{13.0}=0x3201 +phy_chain_rx_lane_map_physical{13.0}=0x2031 +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x3210 +phy_chain_tx_lane_map_physical{21.0}=0x2301 +phy_chain_rx_lane_map_physical{21.0}=0x2031 +phy_chain_tx_lane_map_physical{25.0}=0x0123 +phy_chain_rx_lane_map_physical{25.0}=0x3210 +phy_chain_tx_lane_map_physical{29.0}=0x3201 +phy_chain_rx_lane_map_physical{29.0}=0x2031 +phy_chain_tx_lane_map_physical{33.0}=0x0213 +phy_chain_rx_lane_map_physical{33.0}=0x1302 +phy_chain_tx_lane_map_physical{37.0}=0x1302 +phy_chain_rx_lane_map_physical{37.0}=0x2031 +phy_chain_tx_lane_map_physical{41.0}=0x0231 +phy_chain_rx_lane_map_physical{41.0}=0x3120 +phy_chain_tx_lane_map_physical{45.0}=0x1302 +phy_chain_rx_lane_map_physical{45.0}=0x2031 +phy_chain_tx_lane_map_physical{49.0}=0x2103 +phy_chain_rx_lane_map_physical{49.0}=0x3120 +phy_chain_tx_lane_map_physical{53.0}=0x2301 +phy_chain_rx_lane_map_physical{53.0}=0x2031 +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x2301 +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x1032 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x1023 +phy_chain_tx_lane_map_physical{69.0}=0x0123 +phy_chain_rx_lane_map_physical{69.0}=0x1302 +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x1032 +phy_chain_tx_lane_map_physical{77.0}=0x2013 +phy_chain_rx_lane_map_physical{77.0}=0x3120 +phy_chain_tx_lane_map_physical{81.0}=0x1302 +phy_chain_rx_lane_map_physical{81.0}=0x2031 +phy_chain_tx_lane_map_physical{85.0}=0x0123 +phy_chain_rx_lane_map_physical{85.0}=0x2130 +phy_chain_tx_lane_map_physical{89.0}=0x2301 +phy_chain_rx_lane_map_physical{89.0}=0x2031 +phy_chain_tx_lane_map_physical{93.0}=0x0312 +phy_chain_rx_lane_map_physical{93.0}=0x2310 +phy_chain_tx_lane_map_physical{97.0}=0x2301 +phy_chain_rx_lane_map_physical{97.0}=0x1032 +phy_chain_tx_lane_map_physical{101.0}=0x0123 +phy_chain_rx_lane_map_physical{101.0}=0x3210 +phy_chain_tx_lane_map_physical{105.0}=0x2301 +phy_chain_rx_lane_map_physical{105.0}=0x1032 +phy_chain_tx_lane_map_physical{109.0}=0x0123 +phy_chain_rx_lane_map_physical{109.0}=0x3210 +phy_chain_tx_lane_map_physical{113.0}=0x2301 +phy_chain_rx_lane_map_physical{113.0}=0x2031 +phy_chain_tx_lane_map_physical{117.0}=0x0123 +phy_chain_rx_lane_map_physical{117.0}=0x3210 +phy_chain_tx_lane_map_physical{121.0}=0x2301 +phy_chain_rx_lane_map_physical{121.0}=0x1032 +phy_chain_tx_lane_map_physical{125.0}=0x0123 +phy_chain_rx_lane_map_physical{125.0}=0x3210 +phy_chain_tx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_lane_map_physical{129.0}=0x0231 +phy_chain_tx_lane_map_physical{128.0}=0x3210 +phy_chain_rx_lane_map_physical{128.0}=0x0231 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_tx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_rx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x1 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{109.0}=0x1 +phy_chain_rx_polarity_flip_physical{109.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_rx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x1 +dport_map_enable=1 +dport_map_port_1=1 +dport_map_port_2=2 +dport_map_port_3=3 +dport_map_port_4=4 +dport_map_port_5=5 +dport_map_port_6=6 +dport_map_port_7=7 +dport_map_port_8=8 +dport_map_port_9=9 +dport_map_port_10=10 +dport_map_port_11=11 +dport_map_port_12=12 +dport_map_port_13=13 +dport_map_port_14=14 +dport_map_port_15=15 +dport_map_port_16=16 +dport_map_port_17=17 +dport_map_port_18=18 +dport_map_port_19=19 +dport_map_port_20=20 +dport_map_port_21=21 +dport_map_port_22=22 +dport_map_port_23=23 +dport_map_port_24=24 +dport_map_port_25=25 +dport_map_port_26=26 +dport_map_port_27=27 +dport_map_port_28=28 +dport_map_port_29=29 +dport_map_port_30=30 +dport_map_port_31=31 +dport_map_port_32=32 +dport_map_port_33=33 +dport_map_port_34=34 +dport_map_port_35=35 +dport_map_port_36=36 +dport_map_port_37=37 +dport_map_port_38=38 +dport_map_port_39=39 +dport_map_port_40=40 +dport_map_port_41=41 +dport_map_port_42=42 +dport_map_port_43=43 +dport_map_port_44=44 +dport_map_port_45=45 +dport_map_port_46=46 +dport_map_port_47=47 +dport_map_port_48=48 +dport_map_port_49=49 +dport_map_port_50=50 +dport_map_port_51=51 +dport_map_port_52=52 +dport_map_port_53=53 +dport_map_port_54=54 +dport_map_port_55=55 +dport_map_port_56=56 +dport_map_port_57=57 +dport_map_port_58=58 +dport_map_port_59=59 +dport_map_port_60=60 +dport_map_port_61=61 +dport_map_port_62=62 +dport_map_port_63=63 +dport_map_port_64=64 +dport_map_port_67=65 +dport_map_port_68=66 +dport_map_port_69=67 +dport_map_port_70=68 +dport_map_port_71=69 +dport_map_port_72=70 +dport_map_port_73=71 +dport_map_port_74=72 +dport_map_port_75=73 +dport_map_port_76=74 +dport_map_port_77=75 +dport_map_port_78=76 +dport_map_port_79=77 +dport_map_port_80=78 +dport_map_port_81=79 +dport_map_port_82=80 +dport_map_port_83=81 +dport_map_port_84=82 +dport_map_port_85=83 +dport_map_port_86=84 +dport_map_port_87=85 +dport_map_port_88=86 +dport_map_port_89=87 +dport_map_port_90=88 +dport_map_port_91=89 +dport_map_port_92=90 +dport_map_port_93=91 +dport_map_port_94=92 +dport_map_port_95=93 +dport_map_port_96=94 +dport_map_port_97=95 +dport_map_port_98=96 +dport_map_port_99=97 +dport_map_port_100=98 +dport_map_port_101=99 +dport_map_port_102=100 +dport_map_port_103=101 +dport_map_port_104=102 +dport_map_port_105=103 +dport_map_port_106=104 +dport_map_port_107=105 +dport_map_port_108=106 +dport_map_port_109=107 +dport_map_port_110=108 +dport_map_port_111=109 +dport_map_port_112=110 +dport_map_port_113=111 +dport_map_port_114=112 +dport_map_port_115=113 +dport_map_port_116=114 +dport_map_port_117=115 +dport_map_port_118=116 +dport_map_port_119=117 +dport_map_port_120=118 +dport_map_port_121=119 +dport_map_port_122=120 +dport_map_port_123=121 +dport_map_port_124=122 +dport_map_port_125=123 +dport_map_port_126=124 +dport_map_port_127=125 +dport_map_port_129=126 +dport_map_port_66=127 +dport_map_port_130=128 + +mmu_init_config="TD3-DEFAULT" diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/buffers.json.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/buffers_defaults_t0.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..c31728e4654 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/buffers_defaults_t0.j2 @@ -0,0 +1,46 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "32744448", + "type": "ingress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "32744448", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"32744448" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { + "{{ port_names_active }}|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, +{%- endmacro %} + +{% macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { + "{{ port_names_active }}|0-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +{% endmacro %} + diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/buffers_defaults_t1.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..c31728e4654 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "32744448", + "type": "ingress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "32744448", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"32744448" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { + "{{ port_names_active }}|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, +{%- endmacro %} + +{% macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { + "{{ port_names_active }}|0-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +{% endmacro %} + diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/custom_led.bin b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/custom_led.bin new file mode 100755 index 00000000000..49e559cd981 Binary files /dev/null and b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/custom_led.bin differ diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/linkscan_led_fw.bin b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/linkscan_led_fw.bin new file mode 100755 index 00000000000..c2fa94a2d8c Binary files /dev/null and b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/linkscan_led_fw.bin differ diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/port_config.ini b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/port_config.ini new file mode 100644 index 00000000000..7366a95cf8b --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/port_config.ini @@ -0,0 +1,107 @@ +# name lanes alias index speed +Ethernet0 1 twentyfiveGigE1/1/1 1 25000 +Ethernet1 2 twentyfiveGigE1/1/2 1 25000 +Ethernet2 3 twentyfiveGigE1/1/3 1 25000 +Ethernet3 4 twentyfiveGigE1/1/4 1 25000 +Ethernet4 5 twentyfiveGigE1/2/1 2 25000 +Ethernet5 6 twentyfiveGigE1/2/2 2 25000 +Ethernet6 7 twentyfiveGigE1/2/3 2 25000 +Ethernet7 8 twentyfiveGigE1/2/4 2 25000 +Ethernet8 9 twentyfiveGigE1/3/1 3 25000 +Ethernet9 10 twentyfiveGigE1/3/2 3 25000 +Ethernet10 11 twentyfiveGigE1/3/3 3 25000 +Ethernet11 12 twentyfiveGigE1/3/4 3 25000 +Ethernet12 13 twentyfiveGigE1/4/1 4 25000 +Ethernet13 14 twentyfiveGigE1/4/2 4 25000 +Ethernet14 15 twentyfiveGigE1/4/3 4 25000 +Ethernet15 16 twentyfiveGigE1/4/4 4 25000 +Ethernet16 17 twentyfiveGigE1/5/1 5 25000 +Ethernet17 18 twentyfiveGigE1/5/2 5 25000 +Ethernet18 19 twentyfiveGigE1/5/3 5 25000 +Ethernet19 20 twentyfiveGigE1/5/4 5 25000 +Ethernet20 21 twentyfiveGigE1/6/1 6 25000 +Ethernet21 22 twentyfiveGigE1/6/2 6 25000 +Ethernet22 23 twentyfiveGigE1/6/3 6 25000 +Ethernet23 24 twentyfiveGigE1/6/4 6 25000 +Ethernet24 25 twentyfiveGigE1/7/1 7 25000 +Ethernet25 26 twentyfiveGigE1/7/2 7 25000 +Ethernet26 27 twentyfiveGigE1/7/3 7 25000 +Ethernet27 28 twentyfiveGigE1/7/4 7 25000 +Ethernet28 29 twentyfiveGigE1/8/1 8 25000 +Ethernet29 30 twentyfiveGigE1/8/2 8 25000 +Ethernet30 31 twentyfiveGigE1/8/3 8 25000 +Ethernet31 32 twentyfiveGigE1/8/4 8 25000 +Ethernet32 33 twentyfiveGigE1/9/1 9 25000 +Ethernet33 34 twentyfiveGigE1/9/2 9 25000 +Ethernet34 35 twentyfiveGigE1/9/3 9 25000 +Ethernet35 36 twentyfiveGigE1/9/4 9 25000 +Ethernet36 37 twentyfiveGigE1/10/1 10 25000 +Ethernet37 38 twentyfiveGigE1/10/2 10 25000 +Ethernet38 39 twentyfiveGigE1/10/3 10 25000 +Ethernet39 40 twentyfiveGigE1/10/4 10 25000 +Ethernet40 41 twentyfiveGigE1/11/1 11 25000 +Ethernet41 42 twentyfiveGigE1/11/2 11 25000 +Ethernet42 43 twentyfiveGigE1/11/3 11 25000 +Ethernet43 44 twentyfiveGigE1/11/4 11 25000 +Ethernet44 45 twentyfiveGigE1/12/1 12 25000 +Ethernet45 46 twentyfiveGigE1/12/2 12 25000 +Ethernet46 47 twentyfiveGigE1/12/3 12 25000 +Ethernet47 48 twentyfiveGigE1/12/4 12 25000 +Ethernet48 49 twentyfiveGigE1/13/1 13 25000 +Ethernet49 50 twentyfiveGigE1/13/2 13 25000 +Ethernet50 51 twentyfiveGigE1/13/3 13 25000 +Ethernet51 52 twentyfiveGigE1/13/4 13 25000 +Ethernet52 53 twentyfiveGigE1/14/1 14 25000 +Ethernet53 54 twentyfiveGigE1/14/2 14 25000 +Ethernet54 55 twentyfiveGigE1/14/3 14 25000 +Ethernet55 56 twentyfiveGigE1/14/4 14 25000 +Ethernet56 57 twentyfiveGigE1/15/1 15 25000 +Ethernet57 58 twentyfiveGigE1/15/2 15 25000 +Ethernet58 59 twentyfiveGigE1/15/3 15 25000 +Ethernet59 60 twentyfiveGigE1/15/4 15 25000 +Ethernet60 61 twentyfiveGigE1/16/1 16 25000 +Ethernet61 62 twentyfiveGigE1/16/2 16 25000 +Ethernet62 63 twentyfiveGigE1/16/3 16 25000 +Ethernet63 64 twentyfiveGigE1/16/4 16 25000 +Ethernet64 65 twentyfiveGigE1/17/1 17 25000 +Ethernet65 66 twentyfiveGigE1/17/2 17 25000 +Ethernet66 67 twentyfiveGigE1/17/3 17 25000 +Ethernet67 68 twentyfiveGigE1/17/4 17 25000 +Ethernet68 69 twentyfiveGigE1/18/1 18 25000 +Ethernet69 70 twentyfiveGigE1/18/2 18 25000 +Ethernet70 71 twentyfiveGigE1/18/3 18 25000 +Ethernet71 72 twentyfiveGigE1/18/4 18 25000 +Ethernet72 73 twentyfiveGigE1/19/1 19 25000 +Ethernet73 74 twentyfiveGigE1/19/2 19 25000 +Ethernet74 75 twentyfiveGigE1/19/3 19 25000 +Ethernet75 76 twentyfiveGigE1/19/4 19 25000 +Ethernet76 77 twentyfiveGigE1/20/1 20 25000 +Ethernet77 78 twentyfiveGigE1/20/2 20 25000 +Ethernet78 79 twentyfiveGigE1/20/3 20 25000 +Ethernet79 80 twentyfiveGigE1/20/4 20 25000 +Ethernet80 81 twentyfiveGigE1/21/1 21 25000 +Ethernet81 82 twentyfiveGigE1/21/2 21 25000 +Ethernet82 83 twentyfiveGigE1/21/3 21 25000 +Ethernet83 84 twentyfiveGigE1/21/4 21 25000 +Ethernet84 85 twentyfiveGigE1/22/1 22 25000 +Ethernet85 86 twentyfiveGigE1/22/2 22 25000 +Ethernet86 87 twentyfiveGigE1/22/3 22 25000 +Ethernet87 88 twentyfiveGigE1/22/4 22 25000 +Ethernet88 89 twentyfiveGigE1/23/1 23 25000 +Ethernet89 90 twentyfiveGigE1/23/2 23 25000 +Ethernet90 91 twentyfiveGigE1/23/3 23 25000 +Ethernet91 92 twentyfiveGigE1/23/4 23 25000 +Ethernet92 93 twentyfiveGigE1/24/1 24 25000 +Ethernet93 94 twentyfiveGigE1/24/2 24 25000 +Ethernet94 95 twentyfiveGigE1/24/3 24 25000 +Ethernet95 96 twentyfiveGigE1/24/4 24 25000 +Ethernet96 97,98,99,100 hundredGigE1/25 25 100000 +Ethernet100 101,102,103,104 hundredGigE1/26 26 100000 +Ethernet104 105,106,107,108 hundredGigE1/27 27 100000 +Ethernet108 109,110,111,112 hundredGigE1/28 28 100000 +Ethernet112 113,114,115,116 hundredGigE1/29 29 100000 +Ethernet116 117,118,119,120 hundredGigE1/30 30 100000 +Ethernet120 121,122,123,124 hundredGigE1/31 31 100000 +Ethernet124 125,126,127,128 hundredGigE1/32 32 100000 +Ethernet128 128 tenGigE1/33 33 10000 +Ethernet129 129 tenGigE1/34 34 10000 diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/qos.json.j2 b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/qos.json.j2 new file mode 100644 index 00000000000..d2b3d2b0131 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/qos.json.j2 @@ -0,0 +1,226 @@ +{%- set PORT_ALL = [] %} +{%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{% endif %} +{%- endfor %} +{%- if PORT_ALL | sort_by_port_index %}{% endif %} + +{%- set port_names_list_all = [] %} +{%- for port in PORT_ALL %} + {%- if port_names_list_all.append(port) %}{% endif %} +{%- endfor %} +{%- set port_names_all = port_names_list_all | join(',') -%} + + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} +{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') -%} + + +{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%} + + +{ +{% if generate_tc_to_pg_map is defined %} + {{- generate_tc_to_pg_map() }} +{% else %} + "TC_TO_PRIORITY_GROUP_MAP": { + "DEFAULT": { + "0": "0", + "1": "0", + "2": "0", + "3": "0", + "4": "0", + "5": "0", + "6": "0", + "7": "7" + } + }, +{% endif %} + "MAP_PFC_PRIORITY_TO_QUEUE": { + "DEFAULT": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_QUEUE_MAP": { + "DEFAULT": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "DSCP_TO_TC_MAP": { + "DEFAULT": { + "0" : "0", + "1" : "0", + "2" : "0", + "3" : "0", + "4" : "0", + "5" : "0", + "6" : "0", + "7" : "0", + "8" : "0", + "9" : "0", + "10": "0", + "11": "0", + "12": "0", + "13": "0", + "14": "0", + "15": "0", + "16": "0", + "17": "0", + "18": "0", + "19": "0", + "20": "0", + "21": "0", + "22": "0", + "23": "0", + "24": "0", + "25": "0", + "26": "0", + "27": "0", + "28": "0", + "29": "0", + "30": "0", + "31": "0", + "32": "0", + "33": "0", + "34": "0", + "35": "0", + "36": "0", + "37": "0", + "38": "0", + "39": "0", + "40": "0", + "41": "0", + "42": "0", + "43": "0", + "44": "0", + "45": "0", + "46": "0", + "47": "0", + "48": "0", + "49": "0", + "50": "0", + "51": "0", + "52": "0", + "53": "0", + "54": "0", + "55": "0", + "56": "0", + "57": "0", + "58": "0", + "59": "0", + "60": "0", + "61": "0", + "62": "0", + "63": "0" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type" : "DWRR", + "weight": "1" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "2" + }, + "scheduler.2": { + "type" : "DWRR", + "weight": "3" + }, + "scheduler.3": { + "type" : "DWRR", + "weight": "4" + }, + "scheduler.4": { + "type" : "DWRR", + "weight": "5" + }, + "scheduler.5": { + "type" : "DWRR", + "weight": "10" + }, + "scheduler.6": { + "type" : "DWRR", + "weight": "25" + }, + "scheduler.7": { + "type" : "DWRR", + "weight": "50" + } + }, + "PORT_QOS_MAP": { + "{{ port_names_active }}": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|DEFAULT]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|DEFAULT]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|DEFAULT]" + } + }, + "QUEUE": { +{% for port in PORT_ACTIVE %} + "{{ port }}|0": { + "scheduler" : "[SCHEDULER|scheduler.0]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|1": { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|2": { + "scheduler": "[SCHEDULER|scheduler.2]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|3": { + "scheduler": "[SCHEDULER|scheduler.3]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|4": { + "scheduler": "[SCHEDULER|scheduler.4]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|5": { + "scheduler": "[SCHEDULER|scheduler.5]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|6": { + "scheduler": "[SCHEDULER|scheduler.6]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|7": { + "scheduler": "[SCHEDULER|scheduler.7]" + }{% if not loop.last %},{% endif %} +{% endfor %} + } +} diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/sai.profile b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/sai.profile new file mode 100644 index 00000000000..ae09492f0e7 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-s5232f-96x25G+8x100G.config.bcm diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/td3-s5232f-96x25G+8x100G.config.bcm b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/td3-s5232f-96x25G+8x100G.config.bcm new file mode 100644 index 00000000000..47cbb41f407 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/DellEMC-S5232f-P-25G/td3-s5232f-96x25G+8x100G.config.bcm @@ -0,0 +1,617 @@ +os=unix + +core_clock_frequency=1525 +dpp_clock_ratio=2:3 + +parity_enable=1 +parity_correction=1 +tdma_intr_enable=1 +schan_intr_enable=0 +tdma_intr_enable=1 +miim_intr_enable=1 +stat_if_parity_enable=1 + +port_flex_enable=1 +port_flex_enable_66=0 +port_flex_enable_130=0 +phy_an_c73=3 +phy_an_c73_66=0 +phy_an_c73_130=0 + +module_64ports=0 +table_dma_enable=1 +tdma_timeout_usec=5000000 +mmu_lossless=0 +pdma_descriptor_prefetch_enable=1 +pktdma_poll_mode_channel_bitmap=1 + +l2xmsg_mode=1 +l2xmsg_hostbuf_size=8192 +ipv6_lpm_128b_enable=1 +max_vp_lags=0 + +l3_alpm_enable=2 +l2_mem_entries=32768 +l3_mem_entries=16384 +l3_max_ecmp_mode=1 + +bcm_tunnel_term_compatible_mode=1 +ifp_inports_support_enable=1 + +stable_size=0x5500000 + +oversubscribe_mode=1 +pbmp_oversubscribe=0x6fffffffffffffffdfffffffffffffffe +pbmp_xport_xe=0x6fffffffffffffffdfffffffffffffffe + + +portmap_1.0=1:25:1 +portmap_2.0=2:25:1 +portmap_3.0=3:25:1 +portmap_4.0=4:25:1 +portmap_5.0=5:25:1 +portmap_6.0=6:25:1 +portmap_7.0=7:25:1 +portmap_8.0=8:25:1 +portmap_9.0=9:25:1 +portmap_10.0=10:25:1 +portmap_11.0=11:25:1 +portmap_12.0=12:25:1 +portmap_13.0=13:25:1 +portmap_14.0=14:25:1 +portmap_15.0=15:25:1 +portmap_16.0=16:25:1 +portmap_17.0=17:25:1 +portmap_18.0=18:25:1 +portmap_19.0=19:25:1 +portmap_20.0=20:25:1 +portmap_21.0=21:25:1 +portmap_22.0=22:25:1 +portmap_23.0=23:25:1 +portmap_24.0=24:25:1 +portmap_25.0=25:25:1 +portmap_26.0=26:25:1 +portmap_27.0=27:25:1 +portmap_28.0=28:25:1 +portmap_29.0=29:25:1 +portmap_30.0=30:25:1 +portmap_31.0=31:25:1 +portmap_32.0=32:25:1 +portmap_33.0=33:25:1 +portmap_34.0=34:25:1 +portmap_35.0=35:25:1 +portmap_36.0=36:25:1 +portmap_37.0=37:25:1 +portmap_38.0=38:25:1 +portmap_39.0=39:25:1 +portmap_40.0=40:25:1 +portmap_41.0=41:25:1 +portmap_42.0=42:25:1 +portmap_43.0=43:25:1 +portmap_44.0=44:25:1 +portmap_45.0=45:25:1 +portmap_46.0=46:25:1 +portmap_47.0=47:25:1 +portmap_48.0=48:25:1 +portmap_49.0=49:25:1 +portmap_50.0=50:25:1 +portmap_51.0=51:25:1 +portmap_52.0=52:25:1 +portmap_53.0=53:25:1 +portmap_54.0=54:25:1 +portmap_55.0=55:25:1 +portmap_56.0=56:25:1 +portmap_57.0=57:25:1 +portmap_58.0=58:25:1 +portmap_59.0=59:25:1 +portmap_60.0=60:25:1 +portmap_61.0=61:25:1 +portmap_62.0=62:25:1 +portmap_63.0=63:25:1 +portmap_64.0=64:25:1 + +portmap_67.0=65:25:1 +portmap_68.0=66:25:1 +portmap_69.0=67:25:1 +portmap_70.0=68:25:1 +portmap_71.0=69:25:1 +portmap_72.0=70:25:1 +portmap_73.0=71:25:1 +portmap_74.0=72:25:1 +portmap_75.0=73:25:1 +portmap_76.0=74:25:1 +portmap_77.0=75:25:1 +portmap_78.0=76:25:1 +portmap_79.0=77:25:1 +portmap_80.0=78:25:1 +portmap_81.0=79:25:1 +portmap_82.0=80:25:1 +portmap_83.0=81:25:1 +portmap_84.0=82:25:1 +portmap_85.0=83:25:1 +portmap_86.0=84:25:1 +portmap_87.0=85:25:1 +portmap_88.0=86:25:1 +portmap_89.0=87:25:1 +portmap_90.0=88:25:1 +portmap_91.0=89:25:1 +portmap_92.0=90:25:1 +portmap_93.0=91:25:1 +portmap_94.0=92:25:1 +portmap_95.0=93:25:1 +portmap_96.0=94:25:1 +portmap_97.0=95:25:1 +portmap_98.0=96:25:1 +portmap_99.0=97:100 +portmap_103.0=101:100 +portmap_107.0=105:100 +portmap_111.0=109:100 +portmap_115.0=113:100 +portmap_119.0=117:100 +portmap_123.0=121:100 +portmap_127.0=125:100 +portmap_130.0=128:10:m +portmap_66.0=129:10:m +phy_chain_tx_lane_map_physical{1.0}=0x0132 +phy_chain_rx_lane_map_physical{1.0}=0x3210 +phy_chain_tx_lane_map_physical{5.0}=0x2301 +phy_chain_rx_lane_map_physical{5.0}=0x2031 +phy_chain_tx_lane_map_physical{9.0}=0x0132 +phy_chain_rx_lane_map_physical{9.0}=0x3210 +phy_chain_tx_lane_map_physical{13.0}=0x3201 +phy_chain_rx_lane_map_physical{13.0}=0x2031 +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x3210 +phy_chain_tx_lane_map_physical{21.0}=0x2301 +phy_chain_rx_lane_map_physical{21.0}=0x2031 +phy_chain_tx_lane_map_physical{25.0}=0x0123 +phy_chain_rx_lane_map_physical{25.0}=0x3210 +phy_chain_tx_lane_map_physical{29.0}=0x3201 +phy_chain_rx_lane_map_physical{29.0}=0x2031 +phy_chain_tx_lane_map_physical{33.0}=0x0213 +phy_chain_rx_lane_map_physical{33.0}=0x1302 +phy_chain_tx_lane_map_physical{37.0}=0x1302 +phy_chain_rx_lane_map_physical{37.0}=0x2031 +phy_chain_tx_lane_map_physical{41.0}=0x0231 +phy_chain_rx_lane_map_physical{41.0}=0x3120 +phy_chain_tx_lane_map_physical{45.0}=0x1302 +phy_chain_rx_lane_map_physical{45.0}=0x2031 +phy_chain_tx_lane_map_physical{49.0}=0x2103 +phy_chain_rx_lane_map_physical{49.0}=0x3120 +phy_chain_tx_lane_map_physical{53.0}=0x2301 +phy_chain_rx_lane_map_physical{53.0}=0x2031 +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x2301 +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x1032 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x1023 +phy_chain_tx_lane_map_physical{69.0}=0x0123 +phy_chain_rx_lane_map_physical{69.0}=0x1302 +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x1032 +phy_chain_tx_lane_map_physical{77.0}=0x2013 +phy_chain_rx_lane_map_physical{77.0}=0x3120 +phy_chain_tx_lane_map_physical{81.0}=0x1302 +phy_chain_rx_lane_map_physical{81.0}=0x2031 +phy_chain_tx_lane_map_physical{85.0}=0x0123 +phy_chain_rx_lane_map_physical{85.0}=0x2130 +phy_chain_tx_lane_map_physical{89.0}=0x2301 +phy_chain_rx_lane_map_physical{89.0}=0x2031 +phy_chain_tx_lane_map_physical{93.0}=0x0312 +phy_chain_rx_lane_map_physical{93.0}=0x2310 +phy_chain_tx_lane_map_physical{97.0}=0x2301 +phy_chain_rx_lane_map_physical{97.0}=0x1032 +phy_chain_tx_lane_map_physical{101.0}=0x0123 +phy_chain_rx_lane_map_physical{101.0}=0x3210 +phy_chain_tx_lane_map_physical{105.0}=0x2301 +phy_chain_rx_lane_map_physical{105.0}=0x1032 +phy_chain_tx_lane_map_physical{109.0}=0x0123 +phy_chain_rx_lane_map_physical{109.0}=0x3210 +phy_chain_tx_lane_map_physical{113.0}=0x2301 +phy_chain_rx_lane_map_physical{113.0}=0x2031 +phy_chain_tx_lane_map_physical{117.0}=0x0123 +phy_chain_rx_lane_map_physical{117.0}=0x3210 +phy_chain_tx_lane_map_physical{121.0}=0x2301 +phy_chain_rx_lane_map_physical{121.0}=0x1032 +phy_chain_tx_lane_map_physical{125.0}=0x0123 +phy_chain_rx_lane_map_physical{125.0}=0x3210 +phy_chain_tx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_lane_map_physical{129.0}=0x0231 +phy_chain_tx_lane_map_physical{128.0}=0x3210 +phy_chain_rx_lane_map_physical{128.0}=0x0231 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_tx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_rx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x1 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{109.0}=0x1 +phy_chain_rx_polarity_flip_physical{109.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_rx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x1 +dport_map_enable=1 +dport_map_port_1=1 +dport_map_port_2=2 +dport_map_port_3=3 +dport_map_port_4=4 +dport_map_port_5=5 +dport_map_port_6=6 +dport_map_port_7=7 +dport_map_port_8=8 +dport_map_port_9=9 +dport_map_port_10=10 +dport_map_port_11=11 +dport_map_port_12=12 +dport_map_port_13=13 +dport_map_port_14=14 +dport_map_port_15=15 +dport_map_port_16=16 +dport_map_port_17=17 +dport_map_port_18=18 +dport_map_port_19=19 +dport_map_port_20=20 +dport_map_port_21=21 +dport_map_port_22=22 +dport_map_port_23=23 +dport_map_port_24=24 +dport_map_port_25=25 +dport_map_port_26=26 +dport_map_port_27=27 +dport_map_port_28=28 +dport_map_port_29=29 +dport_map_port_30=30 +dport_map_port_31=31 +dport_map_port_32=32 +dport_map_port_33=33 +dport_map_port_34=34 +dport_map_port_35=35 +dport_map_port_36=36 +dport_map_port_37=37 +dport_map_port_38=38 +dport_map_port_39=39 +dport_map_port_40=40 +dport_map_port_41=41 +dport_map_port_42=42 +dport_map_port_43=43 +dport_map_port_44=44 +dport_map_port_45=45 +dport_map_port_46=46 +dport_map_port_47=47 +dport_map_port_48=48 +dport_map_port_49=49 +dport_map_port_50=50 +dport_map_port_51=51 +dport_map_port_52=52 +dport_map_port_53=53 +dport_map_port_54=54 +dport_map_port_55=55 +dport_map_port_56=56 +dport_map_port_57=57 +dport_map_port_58=58 +dport_map_port_59=59 +dport_map_port_60=60 +dport_map_port_61=61 +dport_map_port_62=62 +dport_map_port_63=63 +dport_map_port_64=64 +dport_map_port_67=65 +dport_map_port_68=66 +dport_map_port_69=67 +dport_map_port_70=68 +dport_map_port_71=69 +dport_map_port_72=70 +dport_map_port_73=71 +dport_map_port_74=72 +dport_map_port_75=73 +dport_map_port_76=74 +dport_map_port_77=75 +dport_map_port_78=76 +dport_map_port_79=77 +dport_map_port_80=78 +dport_map_port_81=79 +dport_map_port_82=80 +dport_map_port_83=81 +dport_map_port_84=82 +dport_map_port_85=83 +dport_map_port_86=84 +dport_map_port_87=85 +dport_map_port_88=86 +dport_map_port_89=87 +dport_map_port_90=88 +dport_map_port_91=89 +dport_map_port_92=90 +dport_map_port_93=91 +dport_map_port_94=92 +dport_map_port_95=93 +dport_map_port_96=94 +dport_map_port_97=95 +dport_map_port_98=96 +dport_map_port_99=97 +dport_map_port_100=98 +dport_map_port_101=99 +dport_map_port_102=100 +dport_map_port_103=101 +dport_map_port_104=102 +dport_map_port_105=103 +dport_map_port_106=104 +dport_map_port_107=105 +dport_map_port_108=106 +dport_map_port_109=107 +dport_map_port_110=108 +dport_map_port_111=109 +dport_map_port_112=110 +dport_map_port_113=111 +dport_map_port_114=112 +dport_map_port_115=113 +dport_map_port_116=114 +dport_map_port_117=115 +dport_map_port_118=116 +dport_map_port_119=117 +dport_map_port_120=118 +dport_map_port_121=119 +dport_map_port_122=120 +dport_map_port_123=121 +dport_map_port_124=122 +dport_map_port_125=123 +dport_map_port_126=124 +dport_map_port_127=125 +dport_map_port_129=126 +dport_map_port_66=127 +dport_map_port_130=128 + +mmu_init_config="TD3-DEFAULT" diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/default_sku b/device/dell/x86_64-dellemc_s5232f_c3538-r0/default_sku new file mode 100644 index 00000000000..f403451c018 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/default_sku @@ -0,0 +1 @@ +DellEMC-S5232f-C32 t1 diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/installer.conf b/device/dell/x86_64-dellemc_s5232f_c3538-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/led_proc_init.soc b/device/dell/x86_64-dellemc_s5232f_c3538-r0/led_proc_init.soc new file mode 100644 index 00000000000..7105381ecdb --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/led_proc_init.soc @@ -0,0 +1,9 @@ +# LED microprocessor initialization for Dell S5232 +# +# +#Led0 +#led stop +m0 load 0 0x0 /usr/share/sonic/hwsku/linkscan_led_fw.bin +m0 load 0 0x3800 /usr/share/sonic/hwsku/custom_led.bin +#led auto on +led start diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/media_settings.json b/device/dell/x86_64-dellemc_s5232f_c3538-r0/media_settings.json new file mode 100644 index 00000000000..8bdc0e7aa98 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/media_settings.json @@ -0,0 +1,442 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-32": { + "QSFP28-40GBASE-CR4-1M":{ + "preemphasis": { + "lane0":"0x16440A", + "lane1":"0x16440A", + "lane2":"0x16440A", + "lane3":"0x16440A" + } + }, + "QSFP28-40GBASE-CR4-2M":{ + "preemphasis": { + "lane0":"0x18420A", + "lane1":"0x18420A", + "lane2":"0x18420A", + "lane3":"0x18420A" + } + }, + "QSFP28-40GBASE-CR4-3M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP28-40GBASE-CR4-4M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP28-40GBASE-CR4-5M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP28-40GBASE-CR4-7M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP28-40GBASE-CR4-10M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP+-40GBASE-CR4-1M":{ + "preemphasis": { + "lane0":"0x16440A", + "lane1":"0x16440A", + "lane2":"0x16440A", + "lane3":"0x16440A" + } + }, + "QSFP+-40GBASE-CR4-2M":{ + "preemphasis": { + "lane0":"0x18420A", + "lane1":"0x18420A", + "lane2":"0x18420A", + "lane3":"0x18420A" + } + }, + "QSFP+-40GBASE-CR4-3M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP+-40GBASE-CR4-4M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP+-40GBASE-CR4-5M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP+-40GBASE-CR4-7M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP+-40GBASE-CR4-10M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + } + } + }, + + "PORT_MEDIA_SETTINGS": { + "1": { + "Default": { + "preemphasis": { + "lane0":"0x164509", + "lane1":"0x164509", + "lane2":"0x164509", + "lane3":"0x164509" + } + } + }, + "2": { + "Default": { + "preemphasis": { + "lane0":"0x164509", + "lane1":"0x164509", + "lane2":"0x164509", + "lane3":"0x164509" + } + } + }, + "3": { + "Default": { + "preemphasis": { + "lane0":"0x144808", + "lane1":"0x144808", + "lane2":"0x144808", + "lane3":"0x144808" + } + } + }, + "4": { + "Default": { + "preemphasis": { + "lane0":"0x144808", + "lane1":"0x144808", + "lane2":"0x144808", + "lane3":"0x144808" + } + } + }, + "5": { + "Default": { + "preemphasis": { + "lane0":"0x144808", + "lane1":"0x144808", + "lane2":"0x144808", + "lane3":"0x144808" + } + } + }, + "6": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "7": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "8": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "9": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "10": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "11": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "12": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "13": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "14": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "15": { + "Default": { + "preemphasis": { + "lane0":"0x0E4E08", + "lane1":"0x0E4E08", + "lane2":"0x0E4E08", + "lane3":"0x0E4E08" + } + } + }, + "16": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "17": { + "Default": { + "preemphasis": { + "lane0":"0x0E4E08", + "lane1":"0x0E4E08", + "lane2":"0x0E4E08", + "lane3":"0x0E4E08" + } + } + }, + "18": { + "Default": { + "preemphasis": { + "lane0":"0x0E4E08", + "lane1":"0x0E4E08", + "lane2":"0x0E4E08", + "lane3":"0x0E4E08" + } + } + }, + "19": { + "Default": { + "preemphasis": { + "lane0":"0x0E4E08", + "lane1":"0x0E4E08", + "lane2":"0x0E4E08", + "lane3":"0x0E4E08" + } + } + }, + "20": { + "Default": { + "preemphasis": { + "lane0":"0x0E4E08", + "lane1":"0x0E4E08", + "lane2":"0x0E4E08", + "lane3":"0x0E4E08" + } + } + }, + "21": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "22": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "23": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "24": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "25": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "26": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "27": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "28": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "29": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "30": { + "Default": { + "preemphasis": { + "lane0":"0x144808", + "lane1":"0x144808", + "lane2":"0x144808", + "lane3":"0x144808" + } + } + }, + "31": { + "Default": { + "preemphasis": { + "lane0":"0x144808", + "lane1":"0x144808", + "lane2":"0x144808", + "lane3":"0x144808" + } + } + }, + "32": { + "Default": { + "preemphasis": { + "lane0":"0x144808", + "lane1":"0x144808", + "lane2":"0x144808", + "lane3":"0x144808" + } + } + } + } +} + diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/plugins/eeprom.py b/device/dell/x86_64-dellemc_s5232f_c3538-r0/plugins/eeprom.py new file mode 100644 index 00000000000..ed10672bed1 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# DellEMC S5232f +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0050/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/plugins/psuutil.py b/device/dell/x86_64-dellemc_s5232f_c3538-r0/plugins/psuutil.py new file mode 100644 index 00000000000..bf10ef12962 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/plugins/psuutil.py @@ -0,0 +1,107 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path +import logging +import commands +import sys + + +S5232F_MAX_PSUS = 2 +IPMI_PSU_DATA = "docker exec -it pmon ipmitool sdr list" +IPMI_PSU_DATA_DOCKER = "ipmitool sdr list" +PSU_PRESENCE = "PSU{0}_stat" +# Use this for older firmware +# PSU_PRESENCE="PSU{0}_prsnt" +ipmi_sdr_list = "" + + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def isDockerEnv(self): + num_docker = open('/proc/self/cgroup', 'r').read().count(":/docker") + if num_docker > 0: + return True + else: + return False + + # Fetch a BMC register + def get_pmc_register(self, reg_name): + + status = 1 + global ipmi_sdr_list + ipmi_dev_node = "/dev/pmi0" + ipmi_cmd = IPMI_PSU_DATA + dockerenv = self.isDockerEnv() + if dockerenv == True: + ipmi_cmd = IPMI_PSU_DATA_DOCKER + + status, ipmi_sdr_list = commands.getstatusoutput(ipmi_cmd) + + if status: + logging.error('Failed to execute:' + ipmi_sdr_list) + sys.exit(0) + + for item in ipmi_sdr_list.split("\n"): + if reg_name in item: + output = item.strip() + + if not output: + print('\nFailed to fetch: ' + reg_name + ' sensor ') + sys.exit(0) + + output = output.split('|')[1] + + logging.basicConfig(level=logging.DEBUG) + return output + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + S5232F_MAX_PSUS = 2 + return S5232F_MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + # Until psu_status is implemented this is hardcoded temporarily + + status = 1 + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_reg_name = PSU_PRESENCE.format(index) + psu_status = int(self.get_pmc_register(psu_reg_name), 16) + if (psu_status != 'ERR'): + # Check for PSU presence + if (psu_status == 0x00): + status = 1 + return status + diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/plugins/sfputil.py b/device/dell/x86_64-dellemc_s5232f_c3538-r0/plugins/sfputil.py new file mode 100644 index 00000000000..192fb80f6c5 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/plugins/sfputil.py @@ -0,0 +1,227 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import struct + import sys + import getopt + import time + from sonic_sfp.sfputilbase import SfpUtilBase + from os import * + from mmap import * + +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 64 + PORTS_IN_BLOCK = 64 + + BASE_RES_PATH = "/sys/bus/pci/devices/0000:04:00.0/resource0" + + _port_to_eeprom_mapping = {} + + _global_port_pres_dict = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def pci_mem_read(self, mm, offset): + mm.seek(offset) + read_data_stream=mm.read(4) + reg_val=struct.unpack('I',read_data_stream) + mem_val = str(reg_val)[1:-2] + # print "reg_val read:%x"%reg_val + return mem_val + + def pci_mem_write(self, mm, offset, data): + mm.seek(offset) + # print "data to write:%x"%data + mm.write(struct.pack('I',data)) + + def pci_set_value(self, resource, val, offset): + fd = open(resource, O_RDWR) + mm = mmap(fd, 0) + val = self.pci_mem_write(mm, offset, val) + mm.close() + close(fd) + return val + + def pci_get_value(self, resource, offset): + fd = open(resource, O_RDWR) + mm = mmap(fd, 0) + val = self.pci_mem_read(mm, offset) + mm.close() + close(fd) + return val + + def init_global_port_presence(self): + for port_num in range(self.port_start, (self.port_end + 1)): + presence = self.get_presence(port_num) + if(presence): + self._global_port_pres_dict[port_num] = '1' + else: + self._global_port_pres_dict[port_num] = '0' + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(self.port_start, self.port_end + 1): + port_num = x + 1 + self.port_to_eeprom_mapping[x] = eeprom_path.format( + port_num) + port_num = 0 + self.init_global_port_presence() + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4004 + port_offset = 16388 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == "" ): + return False + + # Mask off 4th bit for presence + mask = (1 << 4) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4000 + port_offset = 16384 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == "" ): + return False + + # Mask off 4th bit for presence + mask = (1 << 6) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4000 + port_offset = 16384 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == "" ): + return False + + # Mask off 4th bit for presence + mask = (1 << 6) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) + + return True + + def reset(self, port_num): + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4000 + port_offset = 16384 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == "" ): + return False + + # Mask off 4th bit for presence + mask = (1 << 6) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) + + # Sleep 1 second to allow it to settle + time.sleep(1) + + reg_value = reg_value | mask + + # Convert our register value back to a hex string and write back + status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) + + return True + + def get_transceiver_change_event(self): + port_dict = {} + while True: + for port_num in range(self.port_start, (self.port_end + 1)): + presence = self.get_presence(port_num) + if(presence and self._global_port_pres_dict[port_num] == '0'): + self._global_port_pres_dict[port_num] = '1' + port_dict[port_num] = '1' + elif(not presence and + self._global_port_pres_dict[port_num] == '1'): + self._global_port_pres_dict[port_num] = '0' + port_dict[port_num] = '0' + + if(len(port_dict) > 0): + return True, port_dict + + time.sleep(0.5) diff --git a/device/dell/x86_64-dellemc_s5232f_c3538-r0/pmon_daemon_control.json b/device/dell/x86_64-dellemc_s5232f_c3538-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..94592fa8ceb --- /dev/null +++ b/device/dell/x86_64-dellemc_s5232f_c3538-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/buffers.json.j2 b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/buffers_defaults_t0.j2 b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..c31728e4654 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/buffers_defaults_t0.j2 @@ -0,0 +1,46 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "32744448", + "type": "ingress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "32744448", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"32744448" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { + "{{ port_names_active }}|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, +{%- endmacro %} + +{% macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { + "{{ port_names_active }}|0-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +{% endmacro %} + diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/buffers_defaults_t1.j2 b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..c31728e4654 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "32744448", + "type": "ingress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "32744448", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"32744448" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { + "{{ port_names_active }}|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, +{%- endmacro %} + +{% macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { + "{{ port_names_active }}|0-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +{% endmacro %} + diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/custom_led.bin b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/custom_led.bin new file mode 100755 index 00000000000..b3966e520c5 Binary files /dev/null and b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/custom_led.bin differ diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/linkscan_led_fw.bin b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/linkscan_led_fw.bin new file mode 100755 index 00000000000..c2fa94a2d8c Binary files /dev/null and b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/linkscan_led_fw.bin differ diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/port_config.ini b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/port_config.ini new file mode 100644 index 00000000000..3827e7acbe2 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed +Ethernet0 49 tenGigE1/1/1 1 10000 +Ethernet1 50 tenGigE1/1/2 2 10000 +Ethernet2 51 tenGigE1/1/3 3 10000 +Ethernet3 52 tenGigE1/1/4 4 10000 +Ethernet4 57 tenGigE1/2/1 5 10000 +Ethernet5 58 tenGigE1/2/2 6 10000 +Ethernet6 59 tenGigE1/2/3 7 10000 +Ethernet7 60 tenGigE1/2/4 8 10000 +Ethernet8 61 tenGigE1/3/1 9 10000 +Ethernet9 62 tenGigE1/3/2 10 10000 +Ethernet10 63 tenGigE1/3/3 11 10000 +Ethernet11 64 tenGigE1/3/4 12 10000 +Ethernet12 77 tenGigE1/4/1 13 10000 +Ethernet13 78 tenGigE1/4/2 14 10000 +Ethernet14 79 tenGigE1/4/3 15 10000 +Ethernet15 80 tenGigE1/4/4 16 10000 +Ethernet16 85 tenGigE1/5/1 17 10000 +Ethernet17 86 tenGigE1/5/2 18 10000 +Ethernet18 87 tenGigE1/5/3 19 10000 +Ethernet19 88 tenGigE1/5/4 20 10000 +Ethernet20 93 tenGigE1/6/1 21 10000 +Ethernet21 94 tenGigE1/6/2 22 10000 +Ethernet22 95 tenGigE1/6/3 23 10000 +Ethernet23 96 tenGigE1/6/4 24 10000 +Ethernet24 13 tenGigE1/7/1 25 10000 +Ethernet25 14 tenGigE1/7/2 26 10000 +Ethernet26 15 tenGigE1/7/3 27 10000 +Ethernet27 16 tenGigE1/7/4 28 10000 +Ethernet28 21 tenGigE1/8/1 29 10000 +Ethernet29 22 tenGigE1/8/2 30 10000 +Ethernet30 23 tenGigE1/8/3 31 10000 +Ethernet31 24 tenGigE1/8/4 32 10000 +Ethernet32 29 tenGigE1/9/1 33 10000 +Ethernet33 30 tenGigE1/9/2 34 10000 +Ethernet34 31 tenGigE1/9/3 35 10000 +Ethernet35 32 tenGigE1/9/4 36 10000 +Ethernet36 97 tenGigE1/10/1 37 10000 +Ethernet37 98 tenGigE1/10/2 38 10000 +Ethernet38 99 tenGigE1/10/3 39 10000 +Ethernet39 100 tenGigE1/10/4 40 10000 +Ethernet40 105 tenGigE1/11/1 41 10000 +Ethernet41 106 tenGigE1/11/2 42 10000 +Ethernet42 107 tenGigE1/11/3 43 10000 +Ethernet43 108 tenGigE1/11/4 44 10000 +Ethernet44 113 tenGigE1/12/1 45 10000 +Ethernet45 114 tenGigE1/12/2 46 10000 +Ethernet46 115 tenGigE1/12/3 47 10000 +Ethernet47 116 tenGigE1/12/4 48 10000 +Ethernet48 121,122,123,124 hundredGigE1/49 49 100000 +Ethernet49 125,126,127,128 hundredGigE1/50 50 100000 +Ethernet50 69,70,71,72 hundredGigE1/51 51 100000 +Ethernet51 65,66,67,68 hundredGigE1/52 52 100000 +Ethernet52 1,2,3,4 hundredGigE1/53 53 100000 +Ethernet53 33,34,35,36 hundredGigE1/54 54 100000 +Ethernet54 5,6,7,8 hundredGigE1/55 55 100000 +Ethernet55 41,42,43,44 hundredGigE1/56 56 100000 diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/qos.json.j2 b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/qos.json.j2 new file mode 100644 index 00000000000..d2b3d2b0131 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/qos.json.j2 @@ -0,0 +1,226 @@ +{%- set PORT_ALL = [] %} +{%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{% endif %} +{%- endfor %} +{%- if PORT_ALL | sort_by_port_index %}{% endif %} + +{%- set port_names_list_all = [] %} +{%- for port in PORT_ALL %} + {%- if port_names_list_all.append(port) %}{% endif %} +{%- endfor %} +{%- set port_names_all = port_names_list_all | join(',') -%} + + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} +{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') -%} + + +{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%} + + +{ +{% if generate_tc_to_pg_map is defined %} + {{- generate_tc_to_pg_map() }} +{% else %} + "TC_TO_PRIORITY_GROUP_MAP": { + "DEFAULT": { + "0": "0", + "1": "0", + "2": "0", + "3": "0", + "4": "0", + "5": "0", + "6": "0", + "7": "7" + } + }, +{% endif %} + "MAP_PFC_PRIORITY_TO_QUEUE": { + "DEFAULT": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_QUEUE_MAP": { + "DEFAULT": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "DSCP_TO_TC_MAP": { + "DEFAULT": { + "0" : "0", + "1" : "0", + "2" : "0", + "3" : "0", + "4" : "0", + "5" : "0", + "6" : "0", + "7" : "0", + "8" : "0", + "9" : "0", + "10": "0", + "11": "0", + "12": "0", + "13": "0", + "14": "0", + "15": "0", + "16": "0", + "17": "0", + "18": "0", + "19": "0", + "20": "0", + "21": "0", + "22": "0", + "23": "0", + "24": "0", + "25": "0", + "26": "0", + "27": "0", + "28": "0", + "29": "0", + "30": "0", + "31": "0", + "32": "0", + "33": "0", + "34": "0", + "35": "0", + "36": "0", + "37": "0", + "38": "0", + "39": "0", + "40": "0", + "41": "0", + "42": "0", + "43": "0", + "44": "0", + "45": "0", + "46": "0", + "47": "0", + "48": "0", + "49": "0", + "50": "0", + "51": "0", + "52": "0", + "53": "0", + "54": "0", + "55": "0", + "56": "0", + "57": "0", + "58": "0", + "59": "0", + "60": "0", + "61": "0", + "62": "0", + "63": "0" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type" : "DWRR", + "weight": "1" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "2" + }, + "scheduler.2": { + "type" : "DWRR", + "weight": "3" + }, + "scheduler.3": { + "type" : "DWRR", + "weight": "4" + }, + "scheduler.4": { + "type" : "DWRR", + "weight": "5" + }, + "scheduler.5": { + "type" : "DWRR", + "weight": "10" + }, + "scheduler.6": { + "type" : "DWRR", + "weight": "25" + }, + "scheduler.7": { + "type" : "DWRR", + "weight": "50" + } + }, + "PORT_QOS_MAP": { + "{{ port_names_active }}": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|DEFAULT]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|DEFAULT]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|DEFAULT]" + } + }, + "QUEUE": { +{% for port in PORT_ACTIVE %} + "{{ port }}|0": { + "scheduler" : "[SCHEDULER|scheduler.0]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|1": { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|2": { + "scheduler": "[SCHEDULER|scheduler.2]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|3": { + "scheduler": "[SCHEDULER|scheduler.3]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|4": { + "scheduler": "[SCHEDULER|scheduler.4]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|5": { + "scheduler": "[SCHEDULER|scheduler.5]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|6": { + "scheduler": "[SCHEDULER|scheduler.6]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|7": { + "scheduler": "[SCHEDULER|scheduler.7]" + }{% if not loop.last %},{% endif %} +{% endfor %} + } +} diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/sai.profile b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/sai.profile new file mode 100644 index 00000000000..52afc687173 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-s5248f-10g.config.bcm diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/sai_preinit_cmd.soc b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/sai_preinit_cmd.soc new file mode 100644 index 00000000000..4d62900f898 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/sai_preinit_cmd.soc @@ -0,0 +1,2 @@ +m0 load 0 0x0 /usr/share/sonic/hwsku/linkscan_led_fw.bin +m0 load 0 0x3800 /usr/share/sonic/hwsku/custom_led.bin diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/td3-s5248f-10g.config.bcm b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/td3-s5248f-10g.config.bcm new file mode 100644 index 00000000000..2369f459079 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-10G/td3-s5248f-10g.config.bcm @@ -0,0 +1,353 @@ +os=unix +dpp_clock_ratio=2:3 +oversubscribe_mode=1 +core_clock_frequency=1525 +l2xmsg_mode=1 +pbmp_oversubscribe=0x7f878787f878787f9fe1e1e1fe1e1e1fe +pbmp_xport_xe=0x7f878787f878787f9fe1e1e1fe1e1e1fe +ifp_inports_support_enable=1 +port_flex_enable=1 +phy_an_c73=3 +l2xmsg_hostbuf_size=8192 +module_64ports=0 +tdma_intr_enable=1 +ipv6_lpm_128b_enable=1 +stat_if_parity_enable=1 +bcm_tunnel_term_compatible_mode=1 +table_dma_enable=1 +schan_intr_enable=0 +parity_enable=1 +parity_correction=1 +miim_intr_enable=1 +max_vp_lags=0 +tdma_intr_enable=1 +tdma_timeout_usec=5000000 +mmu_lossless=0 +pdma_descriptor_prefetch_enable=1 +pktdma_poll_mode_channel_bitmap=1 + +l3_alpm_enable=2 +l3_alpm_ipv6_128b_bkt_rsvd=1 +l2_mem_entries=40960 +l3_mem_entries=40960 +l3_max_ecmp_mode=1 + +stable_size=0x5500000 + +portmap_1.0=1:100 +portmap_5.0=5:100 +portmap_13.0=13:10 +portmap_14.0=14:10 +portmap_15.0=15:10 +portmap_16.0=16:10 +portmap_21.0=21:10 +portmap_22.0=22:10 +portmap_23.0=23:10 +portmap_24.0=24:10 +portmap_29.0=29:10 +portmap_30.0=30:10 +portmap_31.0=31:10 +portmap_32.0=32:10 +portmap_33.0=33:100 +portmap_41.0=41:100 +portmap_49.0=49:10 +portmap_50.0=50:10 +portmap_51.0=51:10 +portmap_52.0=52:10 +portmap_57.0=57:10 +portmap_58.0=58:10 +portmap_59.0=59:10 +portmap_60.0=60:10 +portmap_61.0=61:10 +portmap_62.0=62:10 +portmap_63.0=63:10 +portmap_64.0=64:10 +portmap_67.0=65:100 +portmap_71.0=69:100 +portmap_79.0=77:10 +portmap_80.0=78:10 +portmap_81.0=79:10 +portmap_82.0=80:10 +portmap_87.0=85:10 +portmap_88.0=86:10 +portmap_89.0=87:10 +portmap_90.0=88:10 +portmap_95.0=93:10 +portmap_96.0=94:10 +portmap_97.0=95:10 +portmap_98.0=96:10 +portmap_99.0=97:10 +portmap_100.0=98:10 +portmap_101.0=99:10 +portmap_102.0=100:10 +portmap_107.0=105:10 +portmap_108.0=106:10 +portmap_109.0=107:10 +portmap_110.0=108:10 +portmap_115.0=113:10 +portmap_116.0=114:10 +portmap_117.0=115:10 +portmap_118.0=116:10 +portmap_123.0=121:100 +portmap_127.0=125:100 +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{1.0}=0x1302 +phy_chain_tx_lane_map_physical{5.0}=0x1032 +phy_chain_rx_lane_map_physical{5.0}=0x1302 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x1302 +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x3120 +phy_chain_rx_lane_map_physical{41.0}=0x1032 +phy_chain_tx_lane_map_physical{49.0}=0x0123 +phy_chain_rx_lane_map_physical{49.0}=0x1032 +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x1032 +phy_chain_tx_lane_map_physical{61.0}=0x0123 +phy_chain_rx_lane_map_physical{61.0}=0x1032 +phy_chain_tx_lane_map_physical{65.0}=0x0123 +phy_chain_rx_lane_map_physical{65.0}=0x2031 +phy_chain_tx_lane_map_physical{69.0}=0x3021 +phy_chain_rx_lane_map_physical{69.0}=0x2130 +phy_chain_tx_lane_map_physical{77.0}=0x3210 +phy_chain_rx_lane_map_physical{77.0}=0x2301 +phy_chain_tx_lane_map_physical{85.0}=0x3210 +phy_chain_rx_lane_map_physical{85.0}=0x2301 +phy_chain_tx_lane_map_physical{93.0}=0x3210 +phy_chain_rx_lane_map_physical{93.0}=0x2301 +phy_chain_tx_lane_map_physical{97.0}=0x3210 +phy_chain_rx_lane_map_physical{97.0}=0x2301 +phy_chain_tx_lane_map_physical{105.0}=0x3210 +phy_chain_rx_lane_map_physical{105.0}=0x2301 +phy_chain_tx_lane_map_physical{113.0}=0x3210 +phy_chain_rx_lane_map_physical{113.0}=0x2301 +phy_chain_tx_lane_map_physical{121.0}=0x0312 +phy_chain_rx_lane_map_physical{121.0}=0x1023 +phy_chain_tx_lane_map_physical{125.0}=0x2301 +phy_chain_rx_lane_map_physical{125.0}=0x3120 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x1 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x1 +phy_chain_tx_polarity_flip_physical{121.0}=0x0 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_rx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 +dport_map_enable=1 +dport_map_port_49=1 +dport_map_port_50=2 +dport_map_port_51=3 +dport_map_port_52=4 +dport_map_port_57=5 +dport_map_port_58=6 +dport_map_port_59=7 +dport_map_port_60=8 +dport_map_port_61=9 +dport_map_port_62=10 +dport_map_port_63=11 +dport_map_port_64=12 +dport_map_port_79=13 +dport_map_port_80=14 +dport_map_port_81=15 +dport_map_port_82=16 +dport_map_port_87=17 +dport_map_port_88=18 +dport_map_port_89=19 +dport_map_port_90=20 +dport_map_port_95=21 +dport_map_port_96=22 +dport_map_port_97=23 +dport_map_port_98=24 +dport_map_port_13=25 +dport_map_port_14=26 +dport_map_port_15=27 +dport_map_port_16=28 +dport_map_port_21=29 +dport_map_port_22=30 +dport_map_port_23=31 +dport_map_port_24=32 +dport_map_port_29=33 +dport_map_port_30=34 +dport_map_port_31=35 +dport_map_port_32=36 +dport_map_port_99=37 +dport_map_port_100=38 +dport_map_port_101=39 +dport_map_port_102=40 +dport_map_port_107=41 +dport_map_port_108=42 +dport_map_port_109=43 +dport_map_port_110=44 +dport_map_port_115=45 +dport_map_port_116=46 +dport_map_port_117=47 +dport_map_port_118=48 +dport_map_port_123=49 +dport_map_port_127=50 +dport_map_port_71=51 +dport_map_port_67=52 +dport_map_port_1=53 +dport_map_port_33=54 +dport_map_port_5=55 +dport_map_port_41=56 + +mmu_init_config="TD3-DELL-lossless" +#sai_preinit_cmd_file=/usr/share/sonic/hwsku/sai_preinit_cmd.soc + diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/buffers.json.j2 b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/buffers_defaults_t0.j2 b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..c31728e4654 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/buffers_defaults_t0.j2 @@ -0,0 +1,46 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "32744448", + "type": "ingress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "32744448", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"32744448" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { + "{{ port_names_active }}|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, +{%- endmacro %} + +{% macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { + "{{ port_names_active }}|0-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +{% endmacro %} + diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/buffers_defaults_t1.j2 b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..c31728e4654 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "32744448", + "type": "ingress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "32744448", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"32744448" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { + "{{ port_names_active }}|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, +{%- endmacro %} + +{% macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { + "{{ port_names_active }}|0-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +{% endmacro %} + diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/custom_led.bin b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/custom_led.bin new file mode 100755 index 00000000000..b3966e520c5 Binary files /dev/null and b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/custom_led.bin differ diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/linkscan_led_fw.bin b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/linkscan_led_fw.bin new file mode 100755 index 00000000000..c2fa94a2d8c Binary files /dev/null and b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/linkscan_led_fw.bin differ diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/port_config.ini b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/port_config.ini new file mode 100644 index 00000000000..3dc16e2eb9b --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed +Ethernet0 49 twentyfiveGigE1/1/1 1 25000 +Ethernet1 50 twentyfiveGigE1/1/2 2 25000 +Ethernet2 51 twentyfiveGigE1/1/3 3 25000 +Ethernet3 52 twentyfiveGigE1/1/4 4 25000 +Ethernet4 57 twentyfiveGigE1/2/1 5 25000 +Ethernet5 58 twentyfiveGigE1/2/2 6 25000 +Ethernet6 59 twentyfiveGigE1/2/3 7 25000 +Ethernet7 60 twentyfiveGigE1/2/4 8 25000 +Ethernet8 61 twentyfiveGigE1/3/1 9 25000 +Ethernet9 62 twentyfiveGigE1/3/2 10 25000 +Ethernet10 63 twentyfiveGigE1/3/3 11 25000 +Ethernet11 64 twentyfiveGigE1/3/4 12 25000 +Ethernet12 77 twentyfiveGigE1/4/1 13 25000 +Ethernet13 78 twentyfiveGigE1/4/2 14 25000 +Ethernet14 79 twentyfiveGigE1/4/3 15 25000 +Ethernet15 80 twentyfiveGigE1/4/4 16 25000 +Ethernet16 85 twentyfiveGigE1/5/1 17 25000 +Ethernet17 86 twentyfiveGigE1/5/2 18 25000 +Ethernet18 87 twentyfiveGigE1/5/3 19 25000 +Ethernet19 88 twentyfiveGigE1/5/4 20 25000 +Ethernet20 93 twentyfiveGigE1/6/1 21 25000 +Ethernet21 94 twentyfiveGigE1/6/2 22 25000 +Ethernet22 95 twentyfiveGigE1/6/3 23 25000 +Ethernet23 96 twentyfiveGigE1/6/4 24 25000 +Ethernet24 13 twentyfiveGigE1/7/1 25 25000 +Ethernet25 14 twentyfiveGigE1/7/2 26 25000 +Ethernet26 15 twentyfiveGigE1/7/3 27 25000 +Ethernet27 16 twentyfiveGigE1/7/4 28 25000 +Ethernet28 21 twentyfiveGigE1/8/1 29 25000 +Ethernet29 22 twentyfiveGigE1/8/2 30 25000 +Ethernet30 23 twentyfiveGigE1/8/3 31 25000 +Ethernet31 24 twentyfiveGigE1/8/4 32 25000 +Ethernet32 29 twentyfiveGigE1/9/1 33 25000 +Ethernet33 30 twentyfiveGigE1/9/2 34 25000 +Ethernet34 31 twentyfiveGigE1/9/3 35 25000 +Ethernet35 32 twentyfiveGigE1/9/4 36 25000 +Ethernet36 97 twentyfiveGigE1/10/1 37 25000 +Ethernet37 98 twentyfiveGigE1/10/2 38 25000 +Ethernet38 99 twentyfiveGigE1/10/3 39 25000 +Ethernet39 100 twentyfiveGigE1/10/4 40 25000 +Ethernet40 105 twentyfiveGigE1/11/1 41 25000 +Ethernet41 106 twentyfiveGigE1/11/2 42 25000 +Ethernet42 107 twentyfiveGigE1/11/3 43 25000 +Ethernet43 108 twentyfiveGigE1/11/4 44 25000 +Ethernet44 113 twentyfiveGigE1/12/1 45 25000 +Ethernet45 114 twentyfiveGigE1/12/2 46 25000 +Ethernet46 115 twentyfiveGigE1/12/3 47 25000 +Ethernet47 116 twentyfiveGigE1/12/4 48 25000 +Ethernet48 121,122,123,124 hundredGigE1/49 49 100000 +Ethernet49 125,126,127,128 hundredGigE1/50 50 100000 +Ethernet50 69,70,71,72 hundredGigE1/51 51 100000 +Ethernet51 65,66,67,68 hundredGigE1/52 52 100000 +Ethernet52 1,2,3,4 hundredGigE1/53 53 100000 +Ethernet53 33,34,35,36 hundredGigE1/54 54 100000 +Ethernet54 5,6,7,8 hundredGigE1/55 55 100000 +Ethernet55 41,42,43,44 hundredGigE1/56 56 100000 diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/qos.json.j2 b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/qos.json.j2 new file mode 100644 index 00000000000..d2b3d2b0131 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/qos.json.j2 @@ -0,0 +1,226 @@ +{%- set PORT_ALL = [] %} +{%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{% endif %} +{%- endfor %} +{%- if PORT_ALL | sort_by_port_index %}{% endif %} + +{%- set port_names_list_all = [] %} +{%- for port in PORT_ALL %} + {%- if port_names_list_all.append(port) %}{% endif %} +{%- endfor %} +{%- set port_names_all = port_names_list_all | join(',') -%} + + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} +{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') -%} + + +{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%} + + +{ +{% if generate_tc_to_pg_map is defined %} + {{- generate_tc_to_pg_map() }} +{% else %} + "TC_TO_PRIORITY_GROUP_MAP": { + "DEFAULT": { + "0": "0", + "1": "0", + "2": "0", + "3": "0", + "4": "0", + "5": "0", + "6": "0", + "7": "7" + } + }, +{% endif %} + "MAP_PFC_PRIORITY_TO_QUEUE": { + "DEFAULT": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_QUEUE_MAP": { + "DEFAULT": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "DSCP_TO_TC_MAP": { + "DEFAULT": { + "0" : "0", + "1" : "0", + "2" : "0", + "3" : "0", + "4" : "0", + "5" : "0", + "6" : "0", + "7" : "0", + "8" : "0", + "9" : "0", + "10": "0", + "11": "0", + "12": "0", + "13": "0", + "14": "0", + "15": "0", + "16": "0", + "17": "0", + "18": "0", + "19": "0", + "20": "0", + "21": "0", + "22": "0", + "23": "0", + "24": "0", + "25": "0", + "26": "0", + "27": "0", + "28": "0", + "29": "0", + "30": "0", + "31": "0", + "32": "0", + "33": "0", + "34": "0", + "35": "0", + "36": "0", + "37": "0", + "38": "0", + "39": "0", + "40": "0", + "41": "0", + "42": "0", + "43": "0", + "44": "0", + "45": "0", + "46": "0", + "47": "0", + "48": "0", + "49": "0", + "50": "0", + "51": "0", + "52": "0", + "53": "0", + "54": "0", + "55": "0", + "56": "0", + "57": "0", + "58": "0", + "59": "0", + "60": "0", + "61": "0", + "62": "0", + "63": "0" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type" : "DWRR", + "weight": "1" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "2" + }, + "scheduler.2": { + "type" : "DWRR", + "weight": "3" + }, + "scheduler.3": { + "type" : "DWRR", + "weight": "4" + }, + "scheduler.4": { + "type" : "DWRR", + "weight": "5" + }, + "scheduler.5": { + "type" : "DWRR", + "weight": "10" + }, + "scheduler.6": { + "type" : "DWRR", + "weight": "25" + }, + "scheduler.7": { + "type" : "DWRR", + "weight": "50" + } + }, + "PORT_QOS_MAP": { + "{{ port_names_active }}": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|DEFAULT]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|DEFAULT]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|DEFAULT]" + } + }, + "QUEUE": { +{% for port in PORT_ACTIVE %} + "{{ port }}|0": { + "scheduler" : "[SCHEDULER|scheduler.0]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|1": { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|2": { + "scheduler": "[SCHEDULER|scheduler.2]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|3": { + "scheduler": "[SCHEDULER|scheduler.3]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|4": { + "scheduler": "[SCHEDULER|scheduler.4]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|5": { + "scheduler": "[SCHEDULER|scheduler.5]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|6": { + "scheduler": "[SCHEDULER|scheduler.6]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|7": { + "scheduler": "[SCHEDULER|scheduler.7]" + }{% if not loop.last %},{% endif %} +{% endfor %} + } +} diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/sai.profile b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/sai.profile new file mode 100644 index 00000000000..4753ec3886c --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-s5248f-25g.config.bcm diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/sai_preinit_cmd.soc b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/sai_preinit_cmd.soc new file mode 100644 index 00000000000..4d62900f898 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/sai_preinit_cmd.soc @@ -0,0 +1,2 @@ +m0 load 0 0x0 /usr/share/sonic/hwsku/linkscan_led_fw.bin +m0 load 0 0x3800 /usr/share/sonic/hwsku/custom_led.bin diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/td3-s5248f-25g.config.bcm b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/td3-s5248f-25g.config.bcm new file mode 100644 index 00000000000..4095c2d0a4f --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/td3-s5248f-25g.config.bcm @@ -0,0 +1,355 @@ +os=unix + +dpp_clock_ratio=2:3 +oversubscribe_mode=1 +core_clock_frequency=1525 +l2xmsg_mode=1 +pbmp_oversubscribe=0x7f878787f878787f9fe1e1e1fe1e1e1fe +pbmp_xport_xe=0x7f878787f878787f9fe1e1e1fe1e1e1fe +ifp_inports_support_enable=1 +port_flex_enable=1 +phy_an_c73=3 +l2xmsg_hostbuf_size=8192 +module_64ports=0 +tdma_intr_enable=1 +ipv6_lpm_128b_enable=1 +stat_if_parity_enable=1 +bcm_tunnel_term_compatible_mode=1 +table_dma_enable=1 +schan_intr_enable=0 +parity_enable=1 +parity_correction=1 +miim_intr_enable=1 +max_vp_lags=0 +tdma_intr_enable=1 +tdma_timeout_usec=5000000 +mmu_lossless=0 +pdma_descriptor_prefetch_enable=1 +pktdma_poll_mode_channel_bitmap=1 + +l3_alpm_enable=2 +l3_alpm_ipv6_128b_bkt_rsvd=1 +l2_mem_entries=40960 +l3_mem_entries=40960 +l3_max_ecmp_mode=1 + + +stable_size=0x5500000 + +portmap_1.0=1:100 +portmap_5.0=5:100 +portmap_13.0=13:25 +portmap_14.0=14:25 +portmap_15.0=15:25 +portmap_16.0=16:25 +portmap_21.0=21:25 +portmap_22.0=22:25 +portmap_23.0=23:25 +portmap_24.0=24:25 +portmap_29.0=29:25 +portmap_30.0=30:25 +portmap_31.0=31:25 +portmap_32.0=32:25 +portmap_33.0=33:100 +portmap_41.0=41:100 +portmap_49.0=49:25 +portmap_50.0=50:25 +portmap_51.0=51:25 +portmap_52.0=52:25 +portmap_57.0=57:25 +portmap_58.0=58:25 +portmap_59.0=59:25 +portmap_60.0=60:25 +portmap_61.0=61:25 +portmap_62.0=62:25 +portmap_63.0=63:25 +portmap_64.0=64:25 +portmap_67.0=65:100 +portmap_71.0=69:100 +portmap_79.0=77:25 +portmap_80.0=78:25 +portmap_81.0=79:25 +portmap_82.0=80:25 +portmap_87.0=85:25 +portmap_88.0=86:25 +portmap_89.0=87:25 +portmap_90.0=88:25 +portmap_95.0=93:25 +portmap_96.0=94:25 +portmap_97.0=95:25 +portmap_98.0=96:25 +portmap_99.0=97:25 +portmap_100.0=98:25 +portmap_101.0=99:25 +portmap_102.0=100:25 +portmap_107.0=105:25 +portmap_108.0=106:25 +portmap_109.0=107:25 +portmap_110.0=108:25 +portmap_115.0=113:25 +portmap_116.0=114:25 +portmap_117.0=115:25 +portmap_118.0=116:25 +portmap_123.0=121:100 +portmap_127.0=125:100 +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{1.0}=0x1302 +phy_chain_tx_lane_map_physical{5.0}=0x1032 +phy_chain_rx_lane_map_physical{5.0}=0x1302 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x1302 +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x3120 +phy_chain_rx_lane_map_physical{41.0}=0x1032 +phy_chain_tx_lane_map_physical{49.0}=0x0123 +phy_chain_rx_lane_map_physical{49.0}=0x1032 +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x1032 +phy_chain_tx_lane_map_physical{61.0}=0x0123 +phy_chain_rx_lane_map_physical{61.0}=0x1032 +phy_chain_tx_lane_map_physical{65.0}=0x0123 +phy_chain_rx_lane_map_physical{65.0}=0x2031 +phy_chain_tx_lane_map_physical{69.0}=0x3021 +phy_chain_rx_lane_map_physical{69.0}=0x2130 +phy_chain_tx_lane_map_physical{77.0}=0x3210 +phy_chain_rx_lane_map_physical{77.0}=0x2301 +phy_chain_tx_lane_map_physical{85.0}=0x3210 +phy_chain_rx_lane_map_physical{85.0}=0x2301 +phy_chain_tx_lane_map_physical{93.0}=0x3210 +phy_chain_rx_lane_map_physical{93.0}=0x2301 +phy_chain_tx_lane_map_physical{97.0}=0x3210 +phy_chain_rx_lane_map_physical{97.0}=0x2301 +phy_chain_tx_lane_map_physical{105.0}=0x3210 +phy_chain_rx_lane_map_physical{105.0}=0x2301 +phy_chain_tx_lane_map_physical{113.0}=0x3210 +phy_chain_rx_lane_map_physical{113.0}=0x2301 +phy_chain_tx_lane_map_physical{121.0}=0x0312 +phy_chain_rx_lane_map_physical{121.0}=0x1023 +phy_chain_tx_lane_map_physical{125.0}=0x2301 +phy_chain_rx_lane_map_physical{125.0}=0x3120 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x1 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x1 +phy_chain_tx_polarity_flip_physical{121.0}=0x0 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_rx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 +dport_map_enable=1 +dport_map_port_49=1 +dport_map_port_50=2 +dport_map_port_51=3 +dport_map_port_52=4 +dport_map_port_57=5 +dport_map_port_58=6 +dport_map_port_59=7 +dport_map_port_60=8 +dport_map_port_61=9 +dport_map_port_62=10 +dport_map_port_63=11 +dport_map_port_64=12 +dport_map_port_79=13 +dport_map_port_80=14 +dport_map_port_81=15 +dport_map_port_82=16 +dport_map_port_87=17 +dport_map_port_88=18 +dport_map_port_89=19 +dport_map_port_90=20 +dport_map_port_95=21 +dport_map_port_96=22 +dport_map_port_97=23 +dport_map_port_98=24 +dport_map_port_13=25 +dport_map_port_14=26 +dport_map_port_15=27 +dport_map_port_16=28 +dport_map_port_21=29 +dport_map_port_22=30 +dport_map_port_23=31 +dport_map_port_24=32 +dport_map_port_29=33 +dport_map_port_30=34 +dport_map_port_31=35 +dport_map_port_32=36 +dport_map_port_99=37 +dport_map_port_100=38 +dport_map_port_101=39 +dport_map_port_102=40 +dport_map_port_107=41 +dport_map_port_108=42 +dport_map_port_109=43 +dport_map_port_110=44 +dport_map_port_115=45 +dport_map_port_116=46 +dport_map_port_117=47 +dport_map_port_118=48 +dport_map_port_123=49 +dport_map_port_127=50 +dport_map_port_71=51 +dport_map_port_67=52 +dport_map_port_1=53 +dport_map_port_33=54 +dport_map_port_5=55 +dport_map_port_41=56 + +mmu_init_config="TD3-DELL-lossless" +#sai_preinit_cmd_file=/usr/share/sonic/hwsku/sai_preinit_cmd.soc + diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/default_sku b/device/dell/x86_64-dellemc_s5248f_c3538-r0/default_sku new file mode 100644 index 00000000000..618471d5629 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/default_sku @@ -0,0 +1 @@ +DellEMC-S5248f-P-25G t1 \ No newline at end of file diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/installer.conf b/device/dell/x86_64-dellemc_s5248f_c3538-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/led_proc_init.soc b/device/dell/x86_64-dellemc_s5248f_c3538-r0/led_proc_init.soc new file mode 100644 index 00000000000..69072c369a6 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/led_proc_init.soc @@ -0,0 +1,6 @@ +# LED microprocessor initialization for Dell S5232 +# +# +#Led0 +led auto on +led start diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/media_settings.json b/device/dell/x86_64-dellemc_s5248f_c3538-r0/media_settings.json new file mode 100644 index 00000000000..8bdc0e7aa98 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/media_settings.json @@ -0,0 +1,442 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-32": { + "QSFP28-40GBASE-CR4-1M":{ + "preemphasis": { + "lane0":"0x16440A", + "lane1":"0x16440A", + "lane2":"0x16440A", + "lane3":"0x16440A" + } + }, + "QSFP28-40GBASE-CR4-2M":{ + "preemphasis": { + "lane0":"0x18420A", + "lane1":"0x18420A", + "lane2":"0x18420A", + "lane3":"0x18420A" + } + }, + "QSFP28-40GBASE-CR4-3M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP28-40GBASE-CR4-4M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP28-40GBASE-CR4-5M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP28-40GBASE-CR4-7M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP28-40GBASE-CR4-10M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP+-40GBASE-CR4-1M":{ + "preemphasis": { + "lane0":"0x16440A", + "lane1":"0x16440A", + "lane2":"0x16440A", + "lane3":"0x16440A" + } + }, + "QSFP+-40GBASE-CR4-2M":{ + "preemphasis": { + "lane0":"0x18420A", + "lane1":"0x18420A", + "lane2":"0x18420A", + "lane3":"0x18420A" + } + }, + "QSFP+-40GBASE-CR4-3M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP+-40GBASE-CR4-4M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP+-40GBASE-CR4-5M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP+-40GBASE-CR4-7M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + }, + "QSFP+-40GBASE-CR4-10M":{ + "preemphasis": { + "lane0":"0x1A400A", + "lane1":"0x1A400A", + "lane2":"0x1A400A", + "lane3":"0x1A400A" + } + } + } + }, + + "PORT_MEDIA_SETTINGS": { + "1": { + "Default": { + "preemphasis": { + "lane0":"0x164509", + "lane1":"0x164509", + "lane2":"0x164509", + "lane3":"0x164509" + } + } + }, + "2": { + "Default": { + "preemphasis": { + "lane0":"0x164509", + "lane1":"0x164509", + "lane2":"0x164509", + "lane3":"0x164509" + } + } + }, + "3": { + "Default": { + "preemphasis": { + "lane0":"0x144808", + "lane1":"0x144808", + "lane2":"0x144808", + "lane3":"0x144808" + } + } + }, + "4": { + "Default": { + "preemphasis": { + "lane0":"0x144808", + "lane1":"0x144808", + "lane2":"0x144808", + "lane3":"0x144808" + } + } + }, + "5": { + "Default": { + "preemphasis": { + "lane0":"0x144808", + "lane1":"0x144808", + "lane2":"0x144808", + "lane3":"0x144808" + } + } + }, + "6": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "7": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "8": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "9": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "10": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "11": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "12": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "13": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "14": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "15": { + "Default": { + "preemphasis": { + "lane0":"0x0E4E08", + "lane1":"0x0E4E08", + "lane2":"0x0E4E08", + "lane3":"0x0E4E08" + } + } + }, + "16": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "17": { + "Default": { + "preemphasis": { + "lane0":"0x0E4E08", + "lane1":"0x0E4E08", + "lane2":"0x0E4E08", + "lane3":"0x0E4E08" + } + } + }, + "18": { + "Default": { + "preemphasis": { + "lane0":"0x0E4E08", + "lane1":"0x0E4E08", + "lane2":"0x0E4E08", + "lane3":"0x0E4E08" + } + } + }, + "19": { + "Default": { + "preemphasis": { + "lane0":"0x0E4E08", + "lane1":"0x0E4E08", + "lane2":"0x0E4E08", + "lane3":"0x0E4E08" + } + } + }, + "20": { + "Default": { + "preemphasis": { + "lane0":"0x0E4E08", + "lane1":"0x0E4E08", + "lane2":"0x0E4E08", + "lane3":"0x0E4E08" + } + } + }, + "21": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "22": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "23": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "24": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "25": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "26": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "27": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "28": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "29": { + "Default": { + "preemphasis": { + "lane0":"0x124A08", + "lane1":"0x124A08", + "lane2":"0x124A08", + "lane3":"0x124A08" + } + } + }, + "30": { + "Default": { + "preemphasis": { + "lane0":"0x144808", + "lane1":"0x144808", + "lane2":"0x144808", + "lane3":"0x144808" + } + } + }, + "31": { + "Default": { + "preemphasis": { + "lane0":"0x144808", + "lane1":"0x144808", + "lane2":"0x144808", + "lane3":"0x144808" + } + } + }, + "32": { + "Default": { + "preemphasis": { + "lane0":"0x144808", + "lane1":"0x144808", + "lane2":"0x144808", + "lane3":"0x144808" + } + } + } + } +} + diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/plugins/eeprom.py b/device/dell/x86_64-dellemc_s5248f_c3538-r0/plugins/eeprom.py new file mode 100644 index 00000000000..5b044d0ee30 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# DellEMC S5248f +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0050/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/plugins/psuutil.py b/device/dell/x86_64-dellemc_s5248f_c3538-r0/plugins/psuutil.py new file mode 100644 index 00000000000..8004697d7c0 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/plugins/psuutil.py @@ -0,0 +1,107 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path +import logging +import commands +import sys + + +S5248F_MAX_PSUS = 2 +IPMI_PSU_DATA = "docker exec -it pmon ipmitool sdr list" +IPMI_PSU_DATA_DOCKER = "ipmitool sdr list" +PSU_PRESENCE = "PSU{0}_stat" +# Use this for older firmware +# PSU_PRESENCE="PSU{0}_prsnt" +ipmi_sdr_list = "" + + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def isDockerEnv(self): + num_docker = open('/proc/self/cgroup', 'r').read().count(":/docker") + if num_docker > 0: + return True + else: + return False + + # Fetch a BMC register + def get_pmc_register(self, reg_name): + + status = 1 + global ipmi_sdr_list + ipmi_dev_node = "/dev/pmi0" + ipmi_cmd = IPMI_PSU_DATA + dockerenv = self.isDockerEnv() + if dockerenv == True: + ipmi_cmd = IPMI_PSU_DATA_DOCKER + + status, ipmi_sdr_list = commands.getstatusoutput(ipmi_cmd) + + if status: + logging.error('Failed to execute:' + ipmi_sdr_list) + sys.exit(0) + + for item in ipmi_sdr_list.split("\n"): + if reg_name in item: + output = item.strip() + + if not output: + print('\nFailed to fetch: ' + reg_name + ' sensor ') + sys.exit(0) + + output = output.split('|')[1] + + logging.basicConfig(level=logging.DEBUG) + return output + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + S5248F_MAX_PSUS = 2 + return S5248F_MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + # Until psu_status is implemented this is hardcoded temporarily + + status = 1 + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_reg_name = PSU_PRESENCE.format(index) + psu_status = int(self.get_pmc_register(psu_reg_name), 16) + if (psu_status != 'ERR'): + # Check for PSU presence + if (psu_status == 0x00): + status = 1 + return status + diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/plugins/sfputil.py b/device/dell/x86_64-dellemc_s5248f_c3538-r0/plugins/sfputil.py new file mode 100644 index 00000000000..e6680dc8d91 --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/plugins/sfputil.py @@ -0,0 +1,289 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# +# For S5248F-ON, hardware version X01 + +try: + import struct + import sys + import getopt + import time + from sonic_sfp.sfputilbase import SfpUtilBase + from os import * + from mmap import * + +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 56 + PORTS_IN_BLOCK = 56 + + BASE_RES_PATH = "/sys/bus/pci/devices/0000:04:00.0/resource0" + + _port_to_i2c_mapping = { + 1: 2, + 2: 3, + 3: 4, + 4: 5, + 5: 6, + 6: 7, + 7: 8, + 8: 9, + 9: 10, + 10: 11, + 11: 12, + 12: 13, + 13: 14, + 14: 15, + 15: 16, + 16: 17, + 17: 18, + 18: 19, + 19: 20, + 20: 21, + 21: 22, + 22: 23, + 23: 24, + 24: 25, + 25: 26, + 26: 27, + 27: 28, + 28: 29, + 29: 30, + 30: 31, + 31: 32, + 32: 33, + 33: 34, + 34: 35, + 35: 36, + 36: 37, + 37: 38, + 38: 39, + 39: 40, + 40: 41, + 41: 42, + 42: 43, + 43: 44, + 44: 45, + 45: 46, + 46: 47, + 47: 48, + 48: 49, + # DD + QSFP28 + 49: 50, + 50: 50, + 51: 51, + 52: 51, + 53: 52, + 54: 53, + 55: 54, + 56: 55, + } + + _port_to_eeprom_mapping = {} + + + _global_port_pres_dict = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(49, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def pci_mem_read(self, mm, offset): + mm.seek(offset) + read_data_stream=mm.read(4) + reg_val=struct.unpack('I',read_data_stream) + mem_val = str(reg_val)[1:-2] + # print "reg_val read:%x"%reg_val + return mem_val + + def pci_mem_write(self, mm, offset, data): + mm.seek(offset) + # print "data to write:%x"%data + mm.write(struct.pack('I',data)) + + def pci_set_value(self, resource, val, offset): + fd = open(resource, O_RDWR) + mm = mmap(fd, 0) + val = self.pci_mem_write(mm, offset, val) + mm.close() + close(fd) + return val + + def pci_get_value(self, resource, offset): + fd = open(resource, O_RDWR) + mm = mmap(fd, 0) + val = self.pci_mem_read(mm, offset) + mm.close() + close(fd) + return val + + def init_global_port_presence(self): + for port_num in range(self.port_start, (self.port_end + 1)): + presence = self.get_presence(port_num) + if(presence): + self._global_port_pres_dict[port_num] = '1' + else: + self._global_port_pres_dict[port_num] = '0' + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(self.port_start, self.port_end + 1): + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_i2c_mapping[x]) + self.init_global_port_presence() + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4004 + port_offset = 16388 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == "" ): + return False + + # Mask off bit for presence + mask = (1 << 1) + if (port_num > 48): + mask = (1 << 4) + + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4000 + port_offset = 16384 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == "" ): + return False + + # Mask off 4th bit for presence + mask = (1 << 6) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4000 + port_offset = 16384 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == "" ): + return False + + # Mask off 4th bit for presence + mask = (1 << 6) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) + + return True + + def reset(self, port_num): + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4000 + port_offset = 16384 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == "" ): + return False + + # Mask off 4th bit for presence + mask = (1 << 6) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) + + # Sleep 1 second to allow it to settle + time.sleep(1) + + reg_value = reg_value | mask + + # Convert our register value back to a hex string and write back + status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) + + return True + + def get_transceiver_change_event(self, timeout=0): + port_dict = {} + while True: + for port_num in range(self.port_start, (self.port_end + 1)): + presence = self.get_presence(port_num) + if(presence and self._global_port_pres_dict[port_num] == '0'): + self._global_port_pres_dict[port_num] = '1' + port_dict[port_num] = '1' + elif(not presence and + self._global_port_pres_dict[port_num] == '1'): + self._global_port_pres_dict[port_num] = '0' + port_dict[port_num] = '0' + + if(len(port_dict) > 0): + return True, port_dict + + time.sleep(0.5) diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/pmon_daemon_control.json b/device/dell/x86_64-dellemc_s5248f_c3538-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..94592fa8ceb --- /dev/null +++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/buffers.json.j2 b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/buffers_defaults_t1.j2 b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..f120b337de0 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/buffers_defaults_t1.j2 @@ -0,0 +1,47 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "34859968", + "type": "ingress", + "mode": "dynamic", + "xoff": "7847424" + }, + "egress_lossy_pool": { + "size": "29631680", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "43481152", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"10870288" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/led_proc_init.soc b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/led_proc_init.soc new file mode 100644 index 00000000000..d38282b6508 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/led_proc_init.soc @@ -0,0 +1,111 @@ +# LED microprocessor initialization for DellEMC-Z9264f + +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=32 REMAP_PORT_2=33 REMAP_PORT_1=34 REMAP_PORT_0=35 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=36 REMAP_PORT_6=37 REMAP_PORT_5=38 REMAP_PORT_4=39 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=4 REMAP_PORT_10=5 REMAP_PORT_9=6 REMAP_PORT_8=7 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=0 REMAP_PORT_14=1 REMAP_PORT_13=2 REMAP_PORT_12=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=56 REMAP_PORT_18=57 REMAP_PORT_17=58 REMAP_PORT_16=59 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=60 REMAP_PORT_22=61 REMAP_PORT_21=62 REMAP_PORT_20=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=28 REMAP_PORT_26=29 REMAP_PORT_25=30 REMAP_PORT_24=31 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=24 REMAP_PORT_30=25 REMAP_PORT_29=26 REMAP_PORT_28=27 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=48 REMAP_PORT_34=49 REMAP_PORT_33=50 REMAP_PORT_32=51 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=52 REMAP_PORT_38=53 REMAP_PORT_37=54 REMAP_PORT_36=55 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=20 REMAP_PORT_42=21 REMAP_PORT_41=22 REMAP_PORT_40=23 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=16 REMAP_PORT_46=17 REMAP_PORT_45=18 REMAP_PORT_44=19 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=40 REMAP_PORT_50=41 REMAP_PORT_49=42 REMAP_PORT_48=43 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=44 REMAP_PORT_54=45 REMAP_PORT_53=46 REMAP_PORT_52=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=12 REMAP_PORT_58=13 REMAP_PORT_57=14 REMAP_PORT_56=15 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=8 REMAP_PORT_62=9 REMAP_PORT_61=10 REMAP_PORT_60=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0 REMAP_PORT_2=1 REMAP_PORT_1=2 REMAP_PORT_0=3 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=4 REMAP_PORT_6=5 REMAP_PORT_5=6 REMAP_PORT_4=7 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=38 REMAP_PORT_8=39 REMAP_PORT_11=36 REMAP_PORT_10=37 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=32 REMAP_PORT_14=33 REMAP_PORT_13=34 REMAP_PORT_12=35 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=8 REMAP_PORT_18=9 REMAP_PORT_17=10 REMAP_PORT_16=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=12 REMAP_PORT_22=13 REMAP_PORT_21=14 REMAP_PORT_20=15 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=44 REMAP_PORT_26=45 REMAP_PORT_25=46 REMAP_PORT_24=47 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=40 REMAP_PORT_30=41 REMAP_PORT_29=42 REMAP_PORT_28=43 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=16 REMAP_PORT_34=17 REMAP_PORT_33=18 REMAP_PORT_32=19 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=20 REMAP_PORT_38=21 REMAP_PORT_37=22 REMAP_PORT_36=23 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=52 REMAP_PORT_42=53 REMAP_PORT_41=54 REMAP_PORT_40=55 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=48 REMAP_PORT_46=49 REMAP_PORT_45=50 REMAP_PORT_44=51 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=24 REMAP_PORT_50=25 REMAP_PORT_49=26 REMAP_PORT_48=27 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=28 REMAP_PORT_54=29 REMAP_PORT_53=30 REMAP_PORT_52=31 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=60 REMAP_PORT_58=61 REMAP_PORT_57=62 REMAP_PORT_56=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=56 REMAP_PORT_62=57 REMAP_PORT_61=58 REMAP_PORT_60=59 +m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=60 REMAP_PORT_2=61 REMAP_PORT_1=62 REMAP_PORT_0=63 +m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=56 REMAP_PORT_6=57 REMAP_PORT_5=58 REMAP_PORT_4=59 +m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=24 REMAP_PORT_10=25 REMAP_PORT_9=26 REMAP_PORT_8=27 +m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=28 REMAP_PORT_14=29 REMAP_PORT_13=30 REMAP_PORT_12=31 +m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=52 REMAP_PORT_18=53 REMAP_PORT_17=54 REMAP_PORT_16=55 +m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=48 REMAP_PORT_22=49 REMAP_PORT_21=50 REMAP_PORT_20=51 +m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=16 REMAP_PORT_26=17 REMAP_PORT_25=18 REMAP_PORT_24=19 +m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=20 REMAP_PORT_30=21 REMAP_PORT_29=22 REMAP_PORT_28=23 +m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=44 REMAP_PORT_34=45 REMAP_PORT_33=46 REMAP_PORT_32=47 +m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=40 REMAP_PORT_38=41 REMAP_PORT_37=42 REMAP_PORT_36=43 +m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=8 REMAP_PORT_42=9 REMAP_PORT_41=10 REMAP_PORT_40=11 +m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=12 REMAP_PORT_46=13 REMAP_PORT_45=14 REMAP_PORT_44=15 +m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=36 REMAP_PORT_50=37 REMAP_PORT_49=38 REMAP_PORT_48=39 +m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=32 REMAP_PORT_54=33 REMAP_PORT_53=34 REMAP_PORT_52=35 +m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=0 REMAP_PORT_58=1 REMAP_PORT_57=2 REMAP_PORT_56=3 +m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=4 REMAP_PORT_62=5 REMAP_PORT_61=6 REMAP_PORT_60=7 +m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=28 REMAP_PORT_2=29 REMAP_PORT_1=30 REMAP_PORT_0=31 +m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=24 REMAP_PORT_6=25 REMAP_PORT_5=26 REMAP_PORT_4=27 +m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=56 REMAP_PORT_10=57 REMAP_PORT_9=58 REMAP_PORT_8=59 +m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=60 REMAP_PORT_14=61 REMAP_PORT_13=62 REMAP_PORT_12=63 +m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=4 REMAP_PORT_18=5 REMAP_PORT_17=6 REMAP_PORT_16=7 +m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=0 REMAP_PORT_22=1 REMAP_PORT_21=2 REMAP_PORT_20=3 +m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=32 REMAP_PORT_26=33 REMAP_PORT_25=34 REMAP_PORT_24=35 +m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=36 REMAP_PORT_30=37 REMAP_PORT_29=38 REMAP_PORT_28=39 +m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=12 REMAP_PORT_34=13 REMAP_PORT_33=14 REMAP_PORT_32=15 +m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=8 REMAP_PORT_38=9 REMAP_PORT_37=10 REMAP_PORT_36=11 +m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=40 REMAP_PORT_42=41 REMAP_PORT_41=42 REMAP_PORT_40=43 +m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=44 REMAP_PORT_46=45 REMAP_PORT_45=46 REMAP_PORT_44=47 +m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=20 REMAP_PORT_50=21 REMAP_PORT_49=22 REMAP_PORT_48=23 +m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=16 REMAP_PORT_54=17 REMAP_PORT_53=18 REMAP_PORT_52=19 +m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=48 REMAP_PORT_58=49 REMAP_PORT_57=50 REMAP_PORT_56=51 +m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=52 REMAP_PORT_62=53 REMAP_PORT_61=54 REMAP_PORT_60=55 +m CMIC_LEDUP4_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=1 REMAP_PORT_1=0 + +led 0 stop +led 0 prog \ + 02 00 60 FE 2E FE 67 1C 86 FE 06 FE D2 40 71 04 \ + 12 FF 85 05 D2 05 71 1A 52 00 3A 80 32 08 97 71 \ + 23 77 4B 32 00 32 01 B7 97 75 32 12 BC FE FE 02 \ + 0A 50 12 BC FE FE 95 75 3C 85 77 44 16 FF DA 02 \ + 71 4B 77 44 22 0F 87 22 0E 87 57 22 0E 87 22 0E \ + 87 57 22 0E 87 22 0F 87 57 00 00 00 00 00 00 00 +led 0 auto on +led 0 start + +led 1 stop +led 1 prog \ + 02 00 60 FE 2E FE 67 1C 86 FE 06 FE D2 40 71 04 \ + 12 FF 85 05 D2 05 71 1A 52 00 3A 80 32 08 97 71 \ + 23 77 4B 32 00 32 01 B7 97 75 32 12 BC FE FE 02 \ + 0A 50 12 BC FE FE 95 75 3C 85 77 44 16 FF DA 02 \ + 71 4B 77 44 22 0F 87 22 0E 87 57 22 0E 87 22 0E \ + 87 57 22 0E 87 22 0F 87 57 00 00 00 00 00 00 00 +led 1 auto on +led 1 start + +led 2 stop +led 2 prog \ + 02 00 60 FE 2E FE 67 1C 86 FE 06 FE D2 40 71 04 \ + 12 FF 85 05 D2 05 71 1A 52 00 3A 80 32 08 97 71 \ + 23 77 4B 32 00 32 01 B7 97 75 32 12 BC FE FE 02 \ + 0A 50 12 BC FE FE 95 75 3C 85 77 44 16 FF DA 02 \ + 71 4B 77 44 22 0F 87 22 0E 87 57 22 0E 87 22 0E \ + 87 57 22 0E 87 22 0F 87 57 00 00 00 00 00 00 00 +led 2 auto on +led 2 start + +led 3 stop +led 3 prog \ + 02 00 60 FE 2E FE 67 1C 86 FE 06 FE D2 40 71 04 \ + 12 FF 85 05 D2 05 71 1A 52 00 3A 80 32 08 97 71 \ + 23 77 4B 32 00 32 01 B7 97 75 32 12 BC FE FE 02 \ + 0A 50 12 BC FE FE 95 75 3C 85 77 44 16 FF DA 02 \ + 71 4B 77 44 22 0F 87 22 0E 87 57 22 0E 87 22 0E \ + 87 57 22 0E 87 22 0F 87 57 00 00 00 00 00 00 00 +led 3 auto on +led 3 start diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/pg_profile_lookup.ini b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/pg_profile_lookup.ini new file mode 100644 index 00000000000..aedda37a887 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -3 2288 + 25000 5m 1248 2288 53248 -3 2288 + 40000 5m 1248 2288 66560 -3 2288 + 50000 5m 1248 2288 90272 -3 2288 + 100000 5m 1248 2288 165568 -3 2288 + 10000 40m 1248 2288 37024 -3 2288 + 25000 40m 1248 2288 53248 -3 2288 + 40000 40m 1248 2288 71552 -3 2288 + 50000 40m 1248 2288 96096 -3 2288 + 100000 40m 1248 2288 177632 -3 2288 + 10000 300m 1248 2288 46176 -3 2288 + 25000 300m 1248 2288 79040 -3 2288 + 40000 300m 1248 2288 108160 -3 2288 + 50000 300m 1248 2288 141856 -3 2288 + 100000 300m 1248 2288 268736 -3 2288 diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/port_config.ini b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/port_config.ini new file mode 100644 index 00000000000..2bd5931d786 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/port_config.ini @@ -0,0 +1,67 @@ +# name lanes alias index speed +Ethernet0 49,50,51,52 hundredGigE1/1 1 100000 +Ethernet4 53,54,55,56 hundredGigE1/2 2 100000 +Ethernet8 65,66,67,68 hundredGigE1/3 3 100000 +Ethernet12 69,70,71,72 hundredGigE1/4 4 100000 +Ethernet16 81,82,83,84 hundredGigE1/5 5 100000 +Ethernet20 85,86,87,88 hundredGigE1/6 6 100000 +Ethernet24 97,98,99,100 hundredGigE1/7 7 100000 +Ethernet28 101,102,103,104 hundredGigE1/8 8 100000 +Ethernet32 1,2,3,4 hundredGigE1/9 9 100000 +Ethernet36 5,6,7,8 hundredGigE1/10 10 100000 +Ethernet40 17,18,19,20 hundredGigE1/11 11 100000 +Ethernet44 21,22,23,24 hundredGigE1/12 12 100000 +Ethernet48 33,34,35,36 hundredGigE1/13 13 100000 +Ethernet52 37,38,39,40 hundredGigE1/14 14 100000 +Ethernet56 113,114,115,116 hundredGigE1/15 15 100000 +Ethernet60 117,118,119,120 hundredGigE1/16 16 100000 +Ethernet64 133,134,135,136 hundredGigE1/17 17 100000 +Ethernet68 129,130,131,132 hundredGigE1/18 18 100000 +Ethernet72 213,214,215,216 hundredGigE1/19 19 100000 +Ethernet76 209,210,211,212 hundredGigE1/20 20 100000 +Ethernet80 229,230,231,232 hundredGigE1/21 21 100000 +Ethernet84 225,226,227,228 hundredGigE1/22 22 100000 +Ethernet88 245,246,247,248 hundredGigE1/23 23 100000 +Ethernet92 241,242,243,244 hundredGigE1/24 24 100000 +Ethernet96 149,150,151,152 hundredGigE1/25 25 100000 +Ethernet100 145,146,147,148 hundredGigE1/26 26 100000 +Ethernet104 165,166,167,168 hundredGigE1/27 27 100000 +Ethernet108 161,162,163,164 hundredGigE1/28 28 100000 +Ethernet112 181,182,183,184 hundredGigE1/29 29 100000 +Ethernet116 177,178,179,180 hundredGigE1/30 30 100000 +Ethernet120 197,198,199,200 hundredGigE1/31 31 100000 +Ethernet124 193,194,195,196 hundredGigE1/32 32 100000 +Ethernet128 61,62,63,64 hundredGigE1/33 33 100000 +Ethernet132 57,58,59,60 hundredGigE1/34 34 100000 +Ethernet136 77,78,79,80 hundredGigE1/35 35 100000 +Ethernet140 73,74,75,76 hundredGigE1/36 36 100000 +Ethernet144 93,94,95,96 hundredGigE1/37 37 100000 +Ethernet148 89,90,91,92 hundredGigE1/38 38 100000 +Ethernet152 109,110,111,112 hundredGigE1/39 39 100000 +Ethernet156 105,106,107,108 hundredGigE1/40 40 100000 +Ethernet160 13,14,15,16 hundredGigE1/41 41 100000 +Ethernet164 9,10,11,12 hundredGigE1/42 42 100000 +Ethernet168 29,30,31,32 hundredGigE1/43 43 100000 +Ethernet172 25,26,27,28 hundredGigE1/44 44 100000 +Ethernet176 45,46,47,48 hundredGigE1/45 45 100000 +Ethernet180 41,42,43,44 hundredGigE1/46 46 100000 +Ethernet184 125,126,127,128 hundredGigE1/47 47 100000 +Ethernet188 121,122,123,124 hundredGigE1/48 48 100000 +Ethernet192 137,138,139,140 hundredGigE1/49 49 100000 +Ethernet196 141,142,143,144 hundredGigE1/50 50 100000 +Ethernet200 217,218,219,220 hundredGigE1/51 51 100000 +Ethernet204 221,222,223,224 hundredGigE1/52 52 100000 +Ethernet208 233,234,235,236 hundredGigE1/53 53 100000 +Ethernet212 237,238,239,240 hundredGigE1/54 54 100000 +Ethernet216 249,250,251,252 hundredGigE1/55 55 100000 +Ethernet220 253,254,255,256 hundredGigE1/56 56 100000 +Ethernet224 153,154,155,156 hundredGigE1/57 57 100000 +Ethernet228 157,158,159,160 hundredGigE1/58 58 100000 +Ethernet232 169,170,171,172 hundredGigE1/59 59 100000 +Ethernet236 173,174,175,176 hundredGigE1/60 60 100000 +Ethernet240 185,186,187,188 hundredGigE1/61 61 100000 +Ethernet244 189,190,191,192 hundredGigE1/62 62 100000 +Ethernet248 201,202,203,204 hundredGigE1/63 63 100000 +Ethernet252 205,206,207,208 hundredGigE1/64 64 100000 +Ethernet256 257 tenGigE1/65 65 10000 +Ethernet257 259 tenGigE1/66 66 10000 diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/qos.json.j2 b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/sai.profile b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/sai.profile new file mode 100644 index 00000000000..0a4fed04175 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-z9264f-64x100G.config.bcm diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/th2-z9264f-64x100G.config.bcm b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/th2-z9264f-64x100G.config.bcm new file mode 100644 index 00000000000..fdd3b3fc076 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C64/th2-z9264f-64x100G.config.bcm @@ -0,0 +1,1005 @@ +#TH2 Z9264F 64x100G +os=unix +core_clock_frequency=1700 +dpp_clock_ratio=2:3 +pbmp_xport_xe=0x3FFFD0000FFFF40003FFFC0001FFFE +oversubscribe_mode=1 +fpem_mem_entries=65536 +l2xmsg_mode=1 + +l3_alpm_enable=2 +bcm_num_cos=8 +switch_bypass_mode=0 +mmu_lossless=0 +lpm_scaling_enable=0 +lpm_ipv6_128b_reserved=0 +ipv6_lpm_128b_enable=1 + +parity_correction=1 +parity_enable=1 + +dport_map_enable=1 + +dport_map_enable=1 +dport_map_port_13=1 +dport_map_port_14=2 +dport_map_port_34=3 +dport_map_port_35=4 +dport_map_port_38=5 +dport_map_port_39=6 +dport_map_port_42=7 +dport_map_port_43=8 +dport_map_port_1=9 +dport_map_port_2=10 +dport_map_port_5=11 +dport_map_port_6=12 +dport_map_port_9=13 +dport_map_port_10=14 +dport_map_port_46=15 +dport_map_port_47=16 + +dport_map_port_69=17 +dport_map_port_68=18 +dport_map_port_107=19 +dport_map_port_106=20 +dport_map_port_111=21 +dport_map_port_110=22 +dport_map_port_115=23 +dport_map_port_114=24 +dport_map_port_73=25 +dport_map_port_72=26 +dport_map_port_77=27 +dport_map_port_76=28 +dport_map_port_81=29 +dport_map_port_80=30 +dport_map_port_103=31 +dport_map_port_102=32 + +dport_map_port_16=33 +dport_map_port_15=34 +dport_map_port_37=35 +dport_map_port_36=36 +dport_map_port_41=37 +dport_map_port_40=38 +dport_map_port_45=39 +dport_map_port_44=40 +dport_map_port_4=41 +dport_map_port_3=42 +dport_map_port_8=43 +dport_map_port_7=44 +dport_map_port_12=45 +dport_map_port_11=46 +dport_map_port_49=47 +dport_map_port_48=48 + +dport_map_port_70=49 +dport_map_port_71=50 +dport_map_port_108=51 +dport_map_port_109=52 +dport_map_port_112=53 +dport_map_port_113=54 +dport_map_port_116=55 +dport_map_port_117=56 +dport_map_port_74=57 +dport_map_port_75=58 +dport_map_port_78=59 +dport_map_port_79=60 +dport_map_port_82=61 +dport_map_port_83=62 +dport_map_port_104=63 +dport_map_port_105=64 + +# +# Tile-0 FC0~FC15 +# +portmap_1=1:100 +portmap_2=5:100 +portmap_3=9:100 +portmap_4=13:100 +portmap_5=17:100 +portmap_6=21:100 +portmap_7=25:100 +portmap_8=29:100 +portmap_9=33:100 +portmap_10=37:100 +portmap_11=41:100 +portmap_12=45:100 +portmap_13=49:100 +portmap_14=53:100 +portmap_15=57:100 +portmap_16=61:100 + +# TX polarity +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 + +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 + +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 + +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 + +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 + +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 + +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 + +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x1 + +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 + +phy_chain_tx_polarity_flip_physical{37.0}=0x0 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_tx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x1 + +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 + +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 + +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 + +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 + +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 + +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 + +# RX polarity +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 + +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 + +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 + +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 + +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 + +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x1 + +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 + +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 + +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 + +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 + +phy_chain_rx_polarity_flip_physical{53.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 + +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 + +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 + +# TX lane swap +phy_chain_tx_lane_map_physical{1.0}=0x3120 +phy_chain_tx_lane_map_physical{5.0}=0x2130 +phy_chain_tx_lane_map_physical{9.0}=0x0213 +phy_chain_tx_lane_map_physical{13.0}=0x3021 + +phy_chain_tx_lane_map_physical{17.0}=0x3201 +phy_chain_tx_lane_map_physical{21.0}=0x3210 +phy_chain_tx_lane_map_physical{25.0}=0x1023 +phy_chain_tx_lane_map_physical{29.0}=0x0231 + +phy_chain_tx_lane_map_physical{33.0}=0x3210 +phy_chain_tx_lane_map_physical{37.0}=0x3120 +phy_chain_tx_lane_map_physical{41.0}=0x2031 +phy_chain_tx_lane_map_physical{45.0}=0x2130 + +phy_chain_tx_lane_map_physical{49.0}=0x2130 +phy_chain_tx_lane_map_physical{53.0}=0x3012 +phy_chain_tx_lane_map_physical{57.0}=0x2031 +phy_chain_tx_lane_map_physical{61.0}=0x0231 + +# RX lane swap +phy_chain_rx_lane_map_physical{1.0}=0x1320 +phy_chain_rx_lane_map_physical{5.0}=0x0213 +phy_chain_rx_lane_map_physical{9.0}=0x2301 +phy_chain_rx_lane_map_physical{13.0}=0x0321 + +phy_chain_rx_lane_map_physical{17.0}=0x2031 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_rx_lane_map_physical{25.0}=0x2310 +phy_chain_rx_lane_map_physical{29.0}=0x2013 + +phy_chain_rx_lane_map_physical{33.0}=0x2103 +phy_chain_rx_lane_map_physical{37.0}=0x0132 +phy_chain_rx_lane_map_physical{41.0}=0x2031 +phy_chain_rx_lane_map_physical{45.0}=0x1032 + +phy_chain_rx_lane_map_physical{49.0}=0x3201 +phy_chain_rx_lane_map_physical{53.0}=0x0132 +phy_chain_rx_lane_map_physical{57.0}=0x2031 +phy_chain_rx_lane_map_physical{61.0}=0x1032 + +# +# Tile-1 FC16~FC31 +# +portmap_34=65:100 +portmap_35=69:100 +portmap_36=73:100 +portmap_37=77:100 +portmap_38=81:100 +portmap_39=85:100 +portmap_40=89:100 +portmap_41=93:100 +portmap_42=97:100 +portmap_43=101:100 +portmap_44=105:100 +portmap_45=109:100 +portmap_46=113:100 +portmap_47=117:100 +portmap_48=121:100 +portmap_49=125:100 + +#TX polarity +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 + +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 + +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_tx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 + +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 + +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x1 +phy_chain_tx_polarity_flip_physical{83.0}=0x0 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 + +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 + +phy_chain_tx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x1 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 + +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 + +phy_chain_tx_polarity_flip_physical{97.0}=0x0 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 + +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 + +phy_chain_tx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 + +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{110.0}=0x1 +phy_chain_tx_polarity_flip_physical{111.0}=0x0 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 + +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 + +phy_chain_tx_polarity_flip_physical{117.0}=0x0 +phy_chain_tx_polarity_flip_physical{118.0}=0x1 +phy_chain_tx_polarity_flip_physical{119.0}=0x0 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 + +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 + +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 + +#RX polarity +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 + +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 + +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 + +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 + +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{83.0}=0x0 +phy_chain_rx_polarity_flip_physical{84.0}=0x1 + +phy_chain_rx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 + +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{92.0}=0x0 + +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 + +phy_chain_rx_polarity_flip_physical{97.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 + +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{104.0}=0x1 + +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 + +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{112.0}=0x1 + +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 + +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 + +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 + +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +# TX lane swap +phy_chain_tx_lane_map_physical{65.0}=0x2130 +phy_chain_tx_lane_map_physical{69.0}=0x3012 +phy_chain_tx_lane_map_physical{73.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x0231 + +phy_chain_tx_lane_map_physical{81.0}=0x2130 +phy_chain_tx_lane_map_physical{85.0}=0x1032 +phy_chain_tx_lane_map_physical{89.0}=0x2031 +phy_chain_tx_lane_map_physical{93.0}=0x0231 + +phy_chain_tx_lane_map_physical{97.0}=0x0123 +phy_chain_tx_lane_map_physical{101.0}=0x1320 +phy_chain_tx_lane_map_physical{105.0}=0x2301 +phy_chain_tx_lane_map_physical{109.0}=0x0213 + +phy_chain_tx_lane_map_physical{113.0}=0x0123 +phy_chain_tx_lane_map_physical{117.0}=0x1023 +phy_chain_tx_lane_map_physical{121.0}=0x2130 +phy_chain_tx_lane_map_physical{125.0}=0x1302 + +# RX lane swap +phy_chain_rx_lane_map_physical{65.0}=0x2103 +phy_chain_rx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{73.0}=0x2031 +phy_chain_rx_lane_map_physical{77.0}=0x1032 + +phy_chain_rx_lane_map_physical{81.0}=0x2103 +phy_chain_rx_lane_map_physical{85.0}=0x3210 +phy_chain_rx_lane_map_physical{89.0}=0x2031 +phy_chain_rx_lane_map_physical{93.0}=0x1032 + +phy_chain_rx_lane_map_physical{97.0}=0x1023 +phy_chain_rx_lane_map_physical{101.0}=0x3120 +phy_chain_rx_lane_map_physical{105.0}=0x1023 +phy_chain_rx_lane_map_physical{109.0}=0x0231 + +phy_chain_rx_lane_map_physical{113.0}=0x1320 +phy_chain_rx_lane_map_physical{117.0}=0x3102 +phy_chain_rx_lane_map_physical{121.0}=0x0213 +phy_chain_rx_lane_map_physical{125.0}=0x0231 + +# +# Tile-2 FC32~FC47 +# +# port 66 is the first management port +portmap_66=257:10 +# port 67 is the second loopback port +#portmap_67=261:10 +portmap_68=129:100 +portmap_69=133:100 +portmap_70=137:100 +portmap_71=141:100 +portmap_72=145:100 +portmap_73=149:100 +portmap_74=153:100 +portmap_75=157:100 +portmap_76=161:100 +portmap_77=165:100 +portmap_78=169:100 +portmap_79=173:100 +portmap_80=177:100 +portmap_81=181:100 +portmap_82=185:100 +portmap_83=189:100 + +# TX polarity +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x1 + +phy_chain_tx_polarity_flip_physical{133.0}=0x0 +phy_chain_tx_polarity_flip_physical{134.0}=0x0 +phy_chain_tx_polarity_flip_physical{135.0}=0x1 +phy_chain_tx_polarity_flip_physical{136.0}=0x1 + +phy_chain_tx_polarity_flip_physical{137.0}=0x1 +phy_chain_tx_polarity_flip_physical{138.0}=0x0 +phy_chain_tx_polarity_flip_physical{139.0}=0x1 +phy_chain_tx_polarity_flip_physical{140.0}=0x0 + +phy_chain_tx_polarity_flip_physical{141.0}=0x1 +phy_chain_tx_polarity_flip_physical{142.0}=0x0 +phy_chain_tx_polarity_flip_physical{143.0}=0x1 +phy_chain_tx_polarity_flip_physical{144.0}=0x1 + +phy_chain_tx_polarity_flip_physical{145.0}=0x1 +phy_chain_tx_polarity_flip_physical{146.0}=0x0 +phy_chain_tx_polarity_flip_physical{147.0}=0x0 +phy_chain_tx_polarity_flip_physical{148.0}=0x1 + +phy_chain_tx_polarity_flip_physical{149.0}=0x0 +phy_chain_tx_polarity_flip_physical{150.0}=0x1 +phy_chain_tx_polarity_flip_physical{151.0}=0x1 +phy_chain_tx_polarity_flip_physical{152.0}=0x1 + +phy_chain_tx_polarity_flip_physical{153.0}=0x0 +phy_chain_tx_polarity_flip_physical{154.0}=0x1 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x0 + +phy_chain_tx_polarity_flip_physical{157.0}=0x0 +phy_chain_tx_polarity_flip_physical{158.0}=0x0 +phy_chain_tx_polarity_flip_physical{159.0}=0x1 +phy_chain_tx_polarity_flip_physical{160.0}=0x0 + +phy_chain_tx_polarity_flip_physical{161.0}=0x1 +phy_chain_tx_polarity_flip_physical{162.0}=0x0 +phy_chain_tx_polarity_flip_physical{163.0}=0x0 +phy_chain_tx_polarity_flip_physical{164.0}=0x1 + +phy_chain_tx_polarity_flip_physical{165.0}=0x1 +phy_chain_tx_polarity_flip_physical{166.0}=0x0 +phy_chain_tx_polarity_flip_physical{167.0}=0x0 +phy_chain_tx_polarity_flip_physical{168.0}=0x0 + +phy_chain_tx_polarity_flip_physical{169.0}=0x0 +phy_chain_tx_polarity_flip_physical{170.0}=0x0 +phy_chain_tx_polarity_flip_physical{171.0}=0x0 +phy_chain_tx_polarity_flip_physical{172.0}=0x0 + +phy_chain_tx_polarity_flip_physical{173.0}=0x0 +phy_chain_tx_polarity_flip_physical{174.0}=0x1 +phy_chain_tx_polarity_flip_physical{175.0}=0x0 +phy_chain_tx_polarity_flip_physical{176.0}=0x1 + +phy_chain_tx_polarity_flip_physical{177.0}=0x0 +phy_chain_tx_polarity_flip_physical{178.0}=0x0 +phy_chain_tx_polarity_flip_physical{179.0}=0x0 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 + +phy_chain_tx_polarity_flip_physical{181.0}=0x1 +phy_chain_tx_polarity_flip_physical{182.0}=0x0 +phy_chain_tx_polarity_flip_physical{183.0}=0x0 +phy_chain_tx_polarity_flip_physical{184.0}=0x0 + +phy_chain_tx_polarity_flip_physical{185.0}=0x0 +phy_chain_tx_polarity_flip_physical{186.0}=0x0 +phy_chain_tx_polarity_flip_physical{187.0}=0x0 +phy_chain_tx_polarity_flip_physical{188.0}=0x0 + +phy_chain_tx_polarity_flip_physical{189.0}=0x1 +phy_chain_tx_polarity_flip_physical{190.0}=0x0 +phy_chain_tx_polarity_flip_physical{191.0}=0x1 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 + +# RX polarity +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 + +phy_chain_rx_polarity_flip_physical{133.0}=0x0 +phy_chain_rx_polarity_flip_physical{134.0}=0x1 +phy_chain_rx_polarity_flip_physical{135.0}=0x1 +phy_chain_rx_polarity_flip_physical{136.0}=0x0 + +phy_chain_rx_polarity_flip_physical{137.0}=0x1 +phy_chain_rx_polarity_flip_physical{138.0}=0x0 +phy_chain_rx_polarity_flip_physical{139.0}=0x1 +phy_chain_rx_polarity_flip_physical{140.0}=0x1 + +phy_chain_rx_polarity_flip_physical{141.0}=0x0 +phy_chain_rx_polarity_flip_physical{142.0}=0x0 +phy_chain_rx_polarity_flip_physical{143.0}=0x1 +phy_chain_rx_polarity_flip_physical{144.0}=0x1 + +phy_chain_rx_polarity_flip_physical{145.0}=0x0 +phy_chain_rx_polarity_flip_physical{146.0}=0x0 +phy_chain_rx_polarity_flip_physical{147.0}=0x1 +phy_chain_rx_polarity_flip_physical{148.0}=0x0 + +phy_chain_rx_polarity_flip_physical{149.0}=0x0 +phy_chain_rx_polarity_flip_physical{150.0}=0x1 +phy_chain_rx_polarity_flip_physical{151.0}=0x1 +phy_chain_rx_polarity_flip_physical{152.0}=0x0 + +phy_chain_rx_polarity_flip_physical{153.0}=0x0 +phy_chain_rx_polarity_flip_physical{154.0}=0x1 +phy_chain_rx_polarity_flip_physical{155.0}=0x0 +phy_chain_rx_polarity_flip_physical{156.0}=0x0 + +phy_chain_rx_polarity_flip_physical{157.0}=0x1 +phy_chain_rx_polarity_flip_physical{158.0}=0x1 +phy_chain_rx_polarity_flip_physical{159.0}=0x0 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 + +phy_chain_rx_polarity_flip_physical{161.0}=0x1 +phy_chain_rx_polarity_flip_physical{162.0}=0x1 +phy_chain_rx_polarity_flip_physical{163.0}=0x0 +phy_chain_rx_polarity_flip_physical{164.0}=0x1 + +phy_chain_rx_polarity_flip_physical{165.0}=0x0 +phy_chain_rx_polarity_flip_physical{166.0}=0x1 +phy_chain_rx_polarity_flip_physical{167.0}=0x1 +phy_chain_rx_polarity_flip_physical{168.0}=0x0 + +phy_chain_rx_polarity_flip_physical{169.0}=0x0 +phy_chain_rx_polarity_flip_physical{170.0}=0x1 +phy_chain_rx_polarity_flip_physical{171.0}=0x0 +phy_chain_rx_polarity_flip_physical{172.0}=0x1 + +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x1 +phy_chain_rx_polarity_flip_physical{175.0}=0x0 +phy_chain_rx_polarity_flip_physical{176.0}=0x0 + +phy_chain_rx_polarity_flip_physical{177.0}=0x1 +phy_chain_rx_polarity_flip_physical{178.0}=0x0 +phy_chain_rx_polarity_flip_physical{179.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x1 + +phy_chain_rx_polarity_flip_physical{181.0}=0x0 +phy_chain_rx_polarity_flip_physical{182.0}=0x1 +phy_chain_rx_polarity_flip_physical{183.0}=0x0 +phy_chain_rx_polarity_flip_physical{184.0}=0x1 + +phy_chain_rx_polarity_flip_physical{185.0}=0x1 +phy_chain_rx_polarity_flip_physical{186.0}=0x0 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x0 + +phy_chain_rx_polarity_flip_physical{189.0}=0x1 +phy_chain_rx_polarity_flip_physical{190.0}=0x1 +phy_chain_rx_polarity_flip_physical{191.0}=0x0 +phy_chain_rx_polarity_flip_physical{192.0}=0x0 + +# TX lane swap +phy_chain_tx_lane_map_physical{129.0}=0x0312 +phy_chain_tx_lane_map_physical{133.0}=0x3120 +phy_chain_tx_lane_map_physical{137.0}=0x1203 +phy_chain_tx_lane_map_physical{141.0}=0x0132 + +phy_chain_tx_lane_map_physical{145.0}=0x0312 +phy_chain_tx_lane_map_physical{149.0}=0x2310 +phy_chain_tx_lane_map_physical{153.0}=0x1032 +phy_chain_tx_lane_map_physical{157.0}=0x3120 + +phy_chain_tx_lane_map_physical{161.0}=0x1023 +phy_chain_tx_lane_map_physical{165.0}=0x1203 +phy_chain_tx_lane_map_physical{169.0}=0x0213 +phy_chain_tx_lane_map_physical{173.0}=0x0123 + +phy_chain_tx_lane_map_physical{177.0}=0x2031 +phy_chain_tx_lane_map_physical{181.0}=0x1203 +phy_chain_tx_lane_map_physical{185.0}=0x0213 +phy_chain_tx_lane_map_physical{189.0}=0x3210 + +# RX lane swap +phy_chain_rx_lane_map_physical{129.0}=0x0321 +phy_chain_rx_lane_map_physical{133.0}=0x0312 +phy_chain_rx_lane_map_physical{137.0}=0x2103 +phy_chain_rx_lane_map_physical{141.0}=0x0231 + +phy_chain_rx_lane_map_physical{145.0}=0x0321 +phy_chain_rx_lane_map_physical{149.0}=0x0312 +phy_chain_rx_lane_map_physical{153.0}=0x3120 +phy_chain_rx_lane_map_physical{157.0}=0x2103 + +phy_chain_rx_lane_map_physical{161.0}=0x1032 +phy_chain_rx_lane_map_physical{165.0}=0x2031 +phy_chain_rx_lane_map_physical{169.0}=0x0132 +phy_chain_rx_lane_map_physical{173.0}=0x2103 + +phy_chain_rx_lane_map_physical{177.0}=0x1032 +phy_chain_rx_lane_map_physical{181.0}=0x1230 +phy_chain_rx_lane_map_physical{185.0}=0x0321 +phy_chain_rx_lane_map_physical{189.0}=0x3201 + +# +# Tile-3 FC48~FC63 +# portmap_0=x:xx // cpu port (not required, but included for illustration purposes) +# +# port 100 is the second management port +portmap_100=259:10 +# port 101 is the third loopback port +#portmap_101=262:10 +portmap_102=193:100 +portmap_103=197:100 +portmap_104=201:100 +portmap_105=205:100 +portmap_106=209:100 +portmap_107=213:100 +portmap_108=217:100 +portmap_109=221:100 +portmap_110=225:100 +portmap_111=229:100 +portmap_112=233:100 +portmap_113=237:100 +portmap_114=241:100 +portmap_115=245:100 +portmap_116=249:100 +portmap_117=253:100 +# port 135 is the fourth loopback port +portmap_135=263:10 + +# TX polarity +phy_chain_tx_polarity_flip_physical{193.0}=0x0 +phy_chain_tx_polarity_flip_physical{194.0}=0x0 +phy_chain_tx_polarity_flip_physical{195.0}=0x0 +phy_chain_tx_polarity_flip_physical{196.0}=0x0 + +phy_chain_tx_polarity_flip_physical{197.0}=0x1 +phy_chain_tx_polarity_flip_physical{198.0}=0x0 +phy_chain_tx_polarity_flip_physical{199.0}=0x1 +phy_chain_tx_polarity_flip_physical{200.0}=0x0 + +phy_chain_tx_polarity_flip_physical{201.0}=0x0 +phy_chain_tx_polarity_flip_physical{202.0}=0x0 +phy_chain_tx_polarity_flip_physical{203.0}=0x0 +phy_chain_tx_polarity_flip_physical{204.0}=0x0 + +phy_chain_tx_polarity_flip_physical{205.0}=0x1 +phy_chain_tx_polarity_flip_physical{206.0}=0x0 +phy_chain_tx_polarity_flip_physical{207.0}=0x1 +phy_chain_tx_polarity_flip_physical{208.0}=0x0 + +phy_chain_tx_polarity_flip_physical{209.0}=0x1 +phy_chain_tx_polarity_flip_physical{210.0}=0x0 +phy_chain_tx_polarity_flip_physical{211.0}=0x0 +phy_chain_tx_polarity_flip_physical{212.0}=0x1 + +phy_chain_tx_polarity_flip_physical{213.0}=0x1 +phy_chain_tx_polarity_flip_physical{214.0}=0x0 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x0 + +phy_chain_tx_polarity_flip_physical{217.0}=0x0 +phy_chain_tx_polarity_flip_physical{218.0}=0x0 +phy_chain_tx_polarity_flip_physical{219.0}=0x0 +phy_chain_tx_polarity_flip_physical{220.0}=0x0 + +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x1 +phy_chain_tx_polarity_flip_physical{223.0}=0x1 +phy_chain_tx_polarity_flip_physical{224.0}=0x0 + +phy_chain_tx_polarity_flip_physical{225.0}=0x1 +phy_chain_tx_polarity_flip_physical{226.0}=0x1 +phy_chain_tx_polarity_flip_physical{227.0}=0x0 +phy_chain_tx_polarity_flip_physical{228.0}=0x0 + +phy_chain_tx_polarity_flip_physical{229.0}=0x1 +phy_chain_tx_polarity_flip_physical{230.0}=0x1 +phy_chain_tx_polarity_flip_physical{231.0}=0x1 +phy_chain_tx_polarity_flip_physical{232.0}=0x1 + +phy_chain_tx_polarity_flip_physical{233.0}=0x0 +phy_chain_tx_polarity_flip_physical{234.0}=0x0 +phy_chain_tx_polarity_flip_physical{235.0}=0x1 +phy_chain_tx_polarity_flip_physical{236.0}=0x1 + +phy_chain_tx_polarity_flip_physical{237.0}=0x1 +phy_chain_tx_polarity_flip_physical{238.0}=0x1 +phy_chain_tx_polarity_flip_physical{239.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x0 + +phy_chain_tx_polarity_flip_physical{241.0}=0x0 +phy_chain_tx_polarity_flip_physical{242.0}=0x1 +phy_chain_tx_polarity_flip_physical{243.0}=0x0 +phy_chain_tx_polarity_flip_physical{244.0}=0x0 + +phy_chain_tx_polarity_flip_physical{245.0}=0x1 +phy_chain_tx_polarity_flip_physical{246.0}=0x0 +phy_chain_tx_polarity_flip_physical{247.0}=0x0 +phy_chain_tx_polarity_flip_physical{248.0}=0x0 + +phy_chain_tx_polarity_flip_physical{249.0}=0x0 +phy_chain_tx_polarity_flip_physical{250.0}=0x0 +phy_chain_tx_polarity_flip_physical{251.0}=0x0 +phy_chain_tx_polarity_flip_physical{252.0}=0x0 + +phy_chain_tx_polarity_flip_physical{253.0}=0x1 +phy_chain_tx_polarity_flip_physical{254.0}=0x0 +phy_chain_tx_polarity_flip_physical{255.0}=0x0 +phy_chain_tx_polarity_flip_physical{256.0}=0x0 + +# RX polarity +phy_chain_rx_polarity_flip_physical{193.0}=0x1 +phy_chain_rx_polarity_flip_physical{194.0}=0x0 +phy_chain_rx_polarity_flip_physical{195.0}=0x0 +phy_chain_rx_polarity_flip_physical{196.0}=0x1 + +phy_chain_rx_polarity_flip_physical{197.0}=0x1 +phy_chain_rx_polarity_flip_physical{198.0}=0x1 +phy_chain_rx_polarity_flip_physical{199.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x1 + +phy_chain_rx_polarity_flip_physical{201.0}=0x1 +phy_chain_rx_polarity_flip_physical{202.0}=0x0 +phy_chain_rx_polarity_flip_physical{203.0}=0x1 +phy_chain_rx_polarity_flip_physical{204.0}=0x1 + +phy_chain_rx_polarity_flip_physical{205.0}=0x1 +phy_chain_rx_polarity_flip_physical{206.0}=0x1 +phy_chain_rx_polarity_flip_physical{207.0}=0x0 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 + +phy_chain_rx_polarity_flip_physical{209.0}=0x1 +phy_chain_rx_polarity_flip_physical{210.0}=0x1 +phy_chain_rx_polarity_flip_physical{211.0}=0x0 +phy_chain_rx_polarity_flip_physical{212.0}=0x1 + +phy_chain_rx_polarity_flip_physical{213.0}=0x0 +phy_chain_rx_polarity_flip_physical{214.0}=0x1 +phy_chain_rx_polarity_flip_physical{215.0}=0x1 +phy_chain_rx_polarity_flip_physical{216.0}=0x0 + +phy_chain_rx_polarity_flip_physical{217.0}=0x1 +phy_chain_rx_polarity_flip_physical{218.0}=0x0 +phy_chain_rx_polarity_flip_physical{219.0}=0x1 +phy_chain_rx_polarity_flip_physical{220.0}=0x1 + +phy_chain_rx_polarity_flip_physical{221.0}=0x1 +phy_chain_rx_polarity_flip_physical{222.0}=0x1 +phy_chain_rx_polarity_flip_physical{223.0}=0x0 +phy_chain_rx_polarity_flip_physical{224.0}=0x0 + +phy_chain_rx_polarity_flip_physical{225.0}=0x1 +phy_chain_rx_polarity_flip_physical{226.0}=0x1 +phy_chain_rx_polarity_flip_physical{227.0}=0x1 +phy_chain_rx_polarity_flip_physical{228.0}=0x0 + +phy_chain_rx_polarity_flip_physical{229.0}=0x1 +phy_chain_rx_polarity_flip_physical{230.0}=0x0 +phy_chain_rx_polarity_flip_physical{231.0}=0x0 +phy_chain_rx_polarity_flip_physical{232.0}=0x1 + +phy_chain_rx_polarity_flip_physical{233.0}=0x1 +phy_chain_rx_polarity_flip_physical{234.0}=0x1 +phy_chain_rx_polarity_flip_physical{235.0}=0x1 +phy_chain_rx_polarity_flip_physical{236.0}=0x0 + +phy_chain_rx_polarity_flip_physical{237.0}=0x0 +phy_chain_rx_polarity_flip_physical{238.0}=0x1 +phy_chain_rx_polarity_flip_physical{239.0}=0x0 +phy_chain_rx_polarity_flip_physical{240.0}=0x0 + +phy_chain_rx_polarity_flip_physical{241.0}=0x0 +phy_chain_rx_polarity_flip_physical{242.0}=0x1 +phy_chain_rx_polarity_flip_physical{243.0}=0x0 +phy_chain_rx_polarity_flip_physical{244.0}=0x1 + +phy_chain_rx_polarity_flip_physical{245.0}=0x1 +phy_chain_rx_polarity_flip_physical{246.0}=0x0 +phy_chain_rx_polarity_flip_physical{247.0}=0x0 +phy_chain_rx_polarity_flip_physical{248.0}=0x1 + +phy_chain_rx_polarity_flip_physical{249.0}=0x0 +phy_chain_rx_polarity_flip_physical{250.0}=0x0 +phy_chain_rx_polarity_flip_physical{251.0}=0x1 +phy_chain_rx_polarity_flip_physical{252.0}=0x0 + +phy_chain_rx_polarity_flip_physical{253.0}=0x1 +phy_chain_rx_polarity_flip_physical{254.0}=0x0 +phy_chain_rx_polarity_flip_physical{255.0}=0x0 +phy_chain_rx_polarity_flip_physical{256.0}=0x0 + +# TX lane swap +phy_chain_tx_lane_map_physical{193.0}=0x2031 +phy_chain_tx_lane_map_physical{197.0}=0x1203 +phy_chain_tx_lane_map_physical{201.0}=0x0213 +phy_chain_tx_lane_map_physical{205.0}=0x3210 + +phy_chain_tx_lane_map_physical{209.0}=0x1023 +phy_chain_tx_lane_map_physical{213.0}=0x1203 +phy_chain_tx_lane_map_physical{217.0}=0x0213 +phy_chain_tx_lane_map_physical{221.0}=0x3102 + +phy_chain_tx_lane_map_physical{225.0}=0x2031 +phy_chain_tx_lane_map_physical{229.0}=0x1023 +phy_chain_tx_lane_map_physical{233.0}=0x1320 +phy_chain_tx_lane_map_physical{237.0}=0x2013 + +phy_chain_tx_lane_map_physical{241.0}=0x1023 +phy_chain_tx_lane_map_physical{245.0}=0x1203 +phy_chain_tx_lane_map_physical{249.0}=0x3120 +phy_chain_tx_lane_map_physical{253.0}=0x3210 + +# RX lane swap +phy_chain_rx_lane_map_physical{193.0}=0x1032 +phy_chain_rx_lane_map_physical{197.0}=0x1230 +phy_chain_rx_lane_map_physical{201.0}=0x0321 +phy_chain_rx_lane_map_physical{205.0}=0x3201 + +phy_chain_rx_lane_map_physical{209.0}=0x3201 +phy_chain_rx_lane_map_physical{213.0}=0x2031 +phy_chain_rx_lane_map_physical{217.0}=0x0321 +phy_chain_rx_lane_map_physical{221.0}=0x3201 + +phy_chain_rx_lane_map_physical{225.0}=0x2103 +phy_chain_rx_lane_map_physical{229.0}=0x2310 +phy_chain_rx_lane_map_physical{233.0}=0x0213 +phy_chain_rx_lane_map_physical{237.0}=0x1032 + +phy_chain_rx_lane_map_physical{241.0}=0x0321 +phy_chain_rx_lane_map_physical{245.0}=0x2301 +phy_chain_rx_lane_map_physical{249.0}=0x2103 +phy_chain_rx_lane_map_physical{253.0}=0x2013 + +physical_ports=64 +logical_ports=136 +uplink_ports=2 +dport_map_port_66=65 +dport_map_port_100=66 + +module_64ports=1 diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/buffers.json.j2 b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/buffers.json.j2 new file mode 100644 index 00000000000..1083a6210fc --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/buffers_defaults_t0.j2 b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..2b40c3d6ad2 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/buffers_defaults_t0.j2 @@ -0,0 +1,54 @@ +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,12) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(20,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(12,20) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "33096128", + "type": "ingress", + "mode": "dynamic", + "xoff": "9098752" + }, + "egress_lossy_pool": { + "size": "28132416", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "43108416", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"10777104" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/led_proc_init.soc b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/led_proc_init.soc new file mode 100644 index 00000000000..d38282b6508 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/led_proc_init.soc @@ -0,0 +1,111 @@ +# LED microprocessor initialization for DellEMC-Z9264f + +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=32 REMAP_PORT_2=33 REMAP_PORT_1=34 REMAP_PORT_0=35 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=36 REMAP_PORT_6=37 REMAP_PORT_5=38 REMAP_PORT_4=39 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=4 REMAP_PORT_10=5 REMAP_PORT_9=6 REMAP_PORT_8=7 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=0 REMAP_PORT_14=1 REMAP_PORT_13=2 REMAP_PORT_12=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=56 REMAP_PORT_18=57 REMAP_PORT_17=58 REMAP_PORT_16=59 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=60 REMAP_PORT_22=61 REMAP_PORT_21=62 REMAP_PORT_20=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=28 REMAP_PORT_26=29 REMAP_PORT_25=30 REMAP_PORT_24=31 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=24 REMAP_PORT_30=25 REMAP_PORT_29=26 REMAP_PORT_28=27 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=48 REMAP_PORT_34=49 REMAP_PORT_33=50 REMAP_PORT_32=51 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=52 REMAP_PORT_38=53 REMAP_PORT_37=54 REMAP_PORT_36=55 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=20 REMAP_PORT_42=21 REMAP_PORT_41=22 REMAP_PORT_40=23 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=16 REMAP_PORT_46=17 REMAP_PORT_45=18 REMAP_PORT_44=19 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=40 REMAP_PORT_50=41 REMAP_PORT_49=42 REMAP_PORT_48=43 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=44 REMAP_PORT_54=45 REMAP_PORT_53=46 REMAP_PORT_52=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=12 REMAP_PORT_58=13 REMAP_PORT_57=14 REMAP_PORT_56=15 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=8 REMAP_PORT_62=9 REMAP_PORT_61=10 REMAP_PORT_60=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0 REMAP_PORT_2=1 REMAP_PORT_1=2 REMAP_PORT_0=3 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=4 REMAP_PORT_6=5 REMAP_PORT_5=6 REMAP_PORT_4=7 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=38 REMAP_PORT_8=39 REMAP_PORT_11=36 REMAP_PORT_10=37 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=32 REMAP_PORT_14=33 REMAP_PORT_13=34 REMAP_PORT_12=35 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=8 REMAP_PORT_18=9 REMAP_PORT_17=10 REMAP_PORT_16=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=12 REMAP_PORT_22=13 REMAP_PORT_21=14 REMAP_PORT_20=15 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=44 REMAP_PORT_26=45 REMAP_PORT_25=46 REMAP_PORT_24=47 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=40 REMAP_PORT_30=41 REMAP_PORT_29=42 REMAP_PORT_28=43 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=16 REMAP_PORT_34=17 REMAP_PORT_33=18 REMAP_PORT_32=19 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=20 REMAP_PORT_38=21 REMAP_PORT_37=22 REMAP_PORT_36=23 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=52 REMAP_PORT_42=53 REMAP_PORT_41=54 REMAP_PORT_40=55 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=48 REMAP_PORT_46=49 REMAP_PORT_45=50 REMAP_PORT_44=51 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=24 REMAP_PORT_50=25 REMAP_PORT_49=26 REMAP_PORT_48=27 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=28 REMAP_PORT_54=29 REMAP_PORT_53=30 REMAP_PORT_52=31 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=60 REMAP_PORT_58=61 REMAP_PORT_57=62 REMAP_PORT_56=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=56 REMAP_PORT_62=57 REMAP_PORT_61=58 REMAP_PORT_60=59 +m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=60 REMAP_PORT_2=61 REMAP_PORT_1=62 REMAP_PORT_0=63 +m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=56 REMAP_PORT_6=57 REMAP_PORT_5=58 REMAP_PORT_4=59 +m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=24 REMAP_PORT_10=25 REMAP_PORT_9=26 REMAP_PORT_8=27 +m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=28 REMAP_PORT_14=29 REMAP_PORT_13=30 REMAP_PORT_12=31 +m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=52 REMAP_PORT_18=53 REMAP_PORT_17=54 REMAP_PORT_16=55 +m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=48 REMAP_PORT_22=49 REMAP_PORT_21=50 REMAP_PORT_20=51 +m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=16 REMAP_PORT_26=17 REMAP_PORT_25=18 REMAP_PORT_24=19 +m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=20 REMAP_PORT_30=21 REMAP_PORT_29=22 REMAP_PORT_28=23 +m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=44 REMAP_PORT_34=45 REMAP_PORT_33=46 REMAP_PORT_32=47 +m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=40 REMAP_PORT_38=41 REMAP_PORT_37=42 REMAP_PORT_36=43 +m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=8 REMAP_PORT_42=9 REMAP_PORT_41=10 REMAP_PORT_40=11 +m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=12 REMAP_PORT_46=13 REMAP_PORT_45=14 REMAP_PORT_44=15 +m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=36 REMAP_PORT_50=37 REMAP_PORT_49=38 REMAP_PORT_48=39 +m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=32 REMAP_PORT_54=33 REMAP_PORT_53=34 REMAP_PORT_52=35 +m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=0 REMAP_PORT_58=1 REMAP_PORT_57=2 REMAP_PORT_56=3 +m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=4 REMAP_PORT_62=5 REMAP_PORT_61=6 REMAP_PORT_60=7 +m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=28 REMAP_PORT_2=29 REMAP_PORT_1=30 REMAP_PORT_0=31 +m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=24 REMAP_PORT_6=25 REMAP_PORT_5=26 REMAP_PORT_4=27 +m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=56 REMAP_PORT_10=57 REMAP_PORT_9=58 REMAP_PORT_8=59 +m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=60 REMAP_PORT_14=61 REMAP_PORT_13=62 REMAP_PORT_12=63 +m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=4 REMAP_PORT_18=5 REMAP_PORT_17=6 REMAP_PORT_16=7 +m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=0 REMAP_PORT_22=1 REMAP_PORT_21=2 REMAP_PORT_20=3 +m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=32 REMAP_PORT_26=33 REMAP_PORT_25=34 REMAP_PORT_24=35 +m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=36 REMAP_PORT_30=37 REMAP_PORT_29=38 REMAP_PORT_28=39 +m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=12 REMAP_PORT_34=13 REMAP_PORT_33=14 REMAP_PORT_32=15 +m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=8 REMAP_PORT_38=9 REMAP_PORT_37=10 REMAP_PORT_36=11 +m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=40 REMAP_PORT_42=41 REMAP_PORT_41=42 REMAP_PORT_40=43 +m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=44 REMAP_PORT_46=45 REMAP_PORT_45=46 REMAP_PORT_44=47 +m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=20 REMAP_PORT_50=21 REMAP_PORT_49=22 REMAP_PORT_48=23 +m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=16 REMAP_PORT_54=17 REMAP_PORT_53=18 REMAP_PORT_52=19 +m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=48 REMAP_PORT_58=49 REMAP_PORT_57=50 REMAP_PORT_56=51 +m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=52 REMAP_PORT_62=53 REMAP_PORT_61=54 REMAP_PORT_60=55 +m CMIC_LEDUP4_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=1 REMAP_PORT_1=0 + +led 0 stop +led 0 prog \ + 02 00 60 FE 2E FE 67 1C 86 FE 06 FE D2 40 71 04 \ + 12 FF 85 05 D2 05 71 1A 52 00 3A 80 32 08 97 71 \ + 23 77 4B 32 00 32 01 B7 97 75 32 12 BC FE FE 02 \ + 0A 50 12 BC FE FE 95 75 3C 85 77 44 16 FF DA 02 \ + 71 4B 77 44 22 0F 87 22 0E 87 57 22 0E 87 22 0E \ + 87 57 22 0E 87 22 0F 87 57 00 00 00 00 00 00 00 +led 0 auto on +led 0 start + +led 1 stop +led 1 prog \ + 02 00 60 FE 2E FE 67 1C 86 FE 06 FE D2 40 71 04 \ + 12 FF 85 05 D2 05 71 1A 52 00 3A 80 32 08 97 71 \ + 23 77 4B 32 00 32 01 B7 97 75 32 12 BC FE FE 02 \ + 0A 50 12 BC FE FE 95 75 3C 85 77 44 16 FF DA 02 \ + 71 4B 77 44 22 0F 87 22 0E 87 57 22 0E 87 22 0E \ + 87 57 22 0E 87 22 0F 87 57 00 00 00 00 00 00 00 +led 1 auto on +led 1 start + +led 2 stop +led 2 prog \ + 02 00 60 FE 2E FE 67 1C 86 FE 06 FE D2 40 71 04 \ + 12 FF 85 05 D2 05 71 1A 52 00 3A 80 32 08 97 71 \ + 23 77 4B 32 00 32 01 B7 97 75 32 12 BC FE FE 02 \ + 0A 50 12 BC FE FE 95 75 3C 85 77 44 16 FF DA 02 \ + 71 4B 77 44 22 0F 87 22 0E 87 57 22 0E 87 22 0E \ + 87 57 22 0E 87 22 0F 87 57 00 00 00 00 00 00 00 +led 2 auto on +led 2 start + +led 3 stop +led 3 prog \ + 02 00 60 FE 2E FE 67 1C 86 FE 06 FE D2 40 71 04 \ + 12 FF 85 05 D2 05 71 1A 52 00 3A 80 32 08 97 71 \ + 23 77 4B 32 00 32 01 B7 97 75 32 12 BC FE FE 02 \ + 0A 50 12 BC FE FE 95 75 3C 85 77 44 16 FF DA 02 \ + 71 4B 77 44 22 0F 87 22 0E 87 57 22 0E 87 22 0E \ + 87 57 22 0E 87 22 0F 87 57 00 00 00 00 00 00 00 +led 3 auto on +led 3 start diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/pg_profile_lookup.ini b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/pg_profile_lookup.ini new file mode 100644 index 00000000000..aedda37a887 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -3 2288 + 25000 5m 1248 2288 53248 -3 2288 + 40000 5m 1248 2288 66560 -3 2288 + 50000 5m 1248 2288 90272 -3 2288 + 100000 5m 1248 2288 165568 -3 2288 + 10000 40m 1248 2288 37024 -3 2288 + 25000 40m 1248 2288 53248 -3 2288 + 40000 40m 1248 2288 71552 -3 2288 + 50000 40m 1248 2288 96096 -3 2288 + 100000 40m 1248 2288 177632 -3 2288 + 10000 300m 1248 2288 46176 -3 2288 + 25000 300m 1248 2288 79040 -3 2288 + 40000 300m 1248 2288 108160 -3 2288 + 50000 300m 1248 2288 141856 -3 2288 + 100000 300m 1248 2288 268736 -3 2288 diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/port_config.ini b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/port_config.ini new file mode 100644 index 00000000000..27c3906a9a4 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/port_config.ini @@ -0,0 +1,123 @@ +# name lanes alias index speed +Ethernet0 49,50 fiftyGigE1/1/1 1 50000 +Ethernet2 51,52 fiftyGigE1/1/2 1 50000 +Ethernet4 53,54 fiftyGigE1/2/1 2 50000 +Ethernet6 55,56 fiftyGigE1/2/2 2 50000 +Ethernet8 65,66 fiftyGigE1/3/1 3 50000 +Ethernet10 67,68 fiftyGigE1/3/2 3 50000 +Ethernet12 69,70 fiftyGigE1/4/1 4 50000 +Ethernet14 71,72 fiftyGigE1/4/2 4 50000 +Ethernet16 81,82 fiftyGigE1/5/1 5 50000 +Ethernet18 83,84 fiftyGigE1/5/2 5 50000 +Ethernet20 85,86 fiftyGigE1/6/1 6 50000 +Ethernet22 87,88 fiftyGigE1/6/2 6 50000 +Ethernet24 97,98 fiftyGigE1/7/1 7 50000 +Ethernet26 99,100 fiftyGigE1/7/2 7 50000 +Ethernet28 101,102 fiftyGigE1/8/1 8 50000 +Ethernet30 103,104 fiftyGigE1/8/2 8 50000 +Ethernet32 1,2 fiftyGigE1/9/1 9 50000 +Ethernet34 3,4 fiftyGigE1/9/2 9 50000 +Ethernet36 5,6 fiftyGigE1/10/1 10 50000 +Ethernet38 7,8 fiftyGigE1/10/2 10 50000 +Ethernet40 17,18 fiftyGigE1/11/1 11 50000 +Ethernet42 19,20 fiftyGigE1/11/2 11 50000 +Ethernet44 21,22 fiftyGigE1/12/1 12 50000 +Ethernet46 23,24 fiftyGigE1/12/2 12 50000 +Ethernet48 33,34,35,36 hundredGigE1/13 13 100000 +Ethernet52 37,38,39,40 hundredGigE1/14 14 100000 +Ethernet56 113,114,115,116 hundredGigE1/15 15 100000 +Ethernet60 117,118,119,120 hundredGigE1/16 16 100000 +Ethernet64 133,134,135,136 hundredGigE1/17 17 100000 +Ethernet68 129,130,131,132 hundredGigE1/18 18 100000 +Ethernet72 213,214,215,216 hundredGigE1/19 19 100000 +Ethernet76 209,210,211,212 hundredGigE1/20 20 100000 +Ethernet80 229,230 fiftyGigE1/21/1 21 50000 +Ethernet82 231,232 fiftyGigE1/21/2 21 50000 +Ethernet84 225,226 fiftyGigE1/22/1 22 50000 +Ethernet86 227,228 fiftyGigE1/22/2 22 50000 +Ethernet88 245,246 fiftyGigE1/23/1 23 50000 +Ethernet90 247,248 fiftyGigE1/23/2 23 50000 +Ethernet92 241,242 fiftyGigE1/24/1 24 50000 +Ethernet94 243,244 fiftyGigE1/24/2 24 50000 +Ethernet96 149,150 fiftyGigE1/25/1 25 50000 +Ethernet98 151,152 fiftyGigE1/25/2 25 50000 +Ethernet100 145,146 fiftyGigE1/26/1 26 50000 +Ethernet102 147,148 fiftyGigE1/26/2 26 50000 +Ethernet104 165,166 fiftyGigE1/27/1 27 50000 +Ethernet106 167,168 fiftyGigE1/27/2 27 50000 +Ethernet108 161,162 fiftyGigE1/28/1 28 50000 +Ethernet110 163,164 fiftyGigE1/28/2 28 50000 +Ethernet112 181,182 fiftyGigE1/29/1 29 50000 +Ethernet114 183,184 fiftyGigE1/29/2 29 50000 +Ethernet116 177,178 fiftyGigE1/30/1 30 50000 +Ethernet118 179,180 fiftyGigE1/30/2 30 50000 +Ethernet120 197,198 fiftyGigE1/31/1 31 50000 +Ethernet122 199,200 fiftyGigE1/31/2 31 50000 +Ethernet124 193,194 fiftyGigE1/32/1 32 50000 +Ethernet126 195,196 fiftyGigE1/32/2 32 50000 +Ethernet128 61,62 fiftyGigE1/33/1 33 50000 +Ethernet130 63,64 fiftyGigE1/33/2 33 50000 +Ethernet132 57,58 fiftyGigE1/34/1 34 50000 +Ethernet134 59,60 fiftyGigE1/34/2 34 50000 +Ethernet136 77,78 fiftyGigE1/35/1 35 50000 +Ethernet138 79,80 fiftyGigE1/35/2 35 50000 +Ethernet140 73,74 fiftyGigE1/36/1 36 50000 +Ethernet142 75,76 fiftyGigE1/36/2 36 50000 +Ethernet144 93,94 fiftyGigE1/37/1 37 50000 +Ethernet146 95,96 fiftyGigE1/37/2 37 50000 +Ethernet148 89,90 fiftyGigE1/38/1 38 50000 +Ethernet150 91,92 fiftyGigE1/38/2 38 50000 +Ethernet152 109,110 fiftyGigE1/39/1 39 50000 +Ethernet154 111,112 fiftyGigE1/39/2 39 50000 +Ethernet156 105,106 fiftyGigE1/40/1 40 50000 +Ethernet158 107,108 fiftyGigE1/40/2 40 50000 +Ethernet160 13,14 fiftyGigE1/41/1 41 50000 +Ethernet162 15,16 fiftyGigE1/41/2 41 50000 +Ethernet164 9,10 fiftyGigE1/42/1 42 50000 +Ethernet166 11,12 fiftyGigE1/42/2 42 50000 +Ethernet168 29,30 fiftyGigE1/43/1 43 50000 +Ethernet170 31,32 fiftyGigE1/43/2 43 50000 +Ethernet172 25,26 fiftyGigE1/44/1 44 50000 +Ethernet174 27,28 fiftyGigE1/44/2 44 50000 +Ethernet176 45,46 fiftyGigE1/45/1 45 50000 +Ethernet178 47,48 fiftyGigE1/45/2 45 50000 +Ethernet180 41,42 fiftyGigE1/46/1 46 50000 +Ethernet182 43,44 fiftyGigE1/46/2 46 50000 +Ethernet184 125,126 fiftyGigE1/47/1 47 50000 +Ethernet186 127,128 fiftyGigE1/47/2 47 50000 +Ethernet188 121,122 fiftyGigE1/48/1 48 50000 +Ethernet190 123,124 fiftyGigE1/48/2 48 50000 +Ethernet192 137,138 fiftyGigE1/49/1 49 50000 +Ethernet194 139,140 fiftyGigE1/49/2 49 50000 +Ethernet196 141,142 fiftyGigE1/50/1 50 50000 +Ethernet198 143,144 fiftyGigE1/50/2 50 50000 +Ethernet200 217,218 fiftyGigE1/51/1 51 50000 +Ethernet202 219,220 fiftyGigE1/51/2 51 50000 +Ethernet204 221,222 fiftyGigE1/52/1 52 50000 +Ethernet206 223,224 fiftyGigE1/52/2 52 50000 +Ethernet208 233,234 fiftyGigE1/53/1 53 50000 +Ethernet210 235,236 fiftyGigE1/53/2 53 50000 +Ethernet212 237,238 fiftyGigE1/54/1 54 50000 +Ethernet214 239,240 fiftyGigE1/54/2 54 50000 +Ethernet216 249,250 fiftyGigE1/55/1 55 50000 +Ethernet218 251,252 fiftyGigE1/55/2 55 50000 +Ethernet220 253,254 fiftyGigE1/56/1 56 50000 +Ethernet222 255,256 fiftyGigE1/56/2 56 50000 +Ethernet224 153,154 fiftyGigE1/57/1 57 50000 +Ethernet226 155,156 fiftyGigE1/57/2 57 50000 +Ethernet228 157,158 fiftyGigE1/58/1 58 50000 +Ethernet230 159,160 fiftyGigE1/58/2 58 50000 +Ethernet232 169,170 fiftyGigE1/59/1 59 50000 +Ethernet234 171,172 fiftyGigE1/59/2 59 50000 +Ethernet236 173,174 fiftyGigE1/60/1 60 50000 +Ethernet238 175,176 fiftyGigE1/60/2 60 50000 +Ethernet240 185,186 fiftyGigE1/61/1 61 50000 +Ethernet242 187,188 fiftyGigE1/61/2 61 50000 +Ethernet244 189,190 fiftyGigE1/62/1 62 50000 +Ethernet246 191,192 fiftyGigE1/62/2 62 50000 +Ethernet248 201,202 fiftyGigE1/63/1 63 50000 +Ethernet250 203,204 fiftyGigE1/63/2 63 50000 +Ethernet252 205,206 fiftyGigE1/64/1 64 50000 +Ethernet254 207,208 fiftyGigE1/64/2 64 50000 +Ethernet256 257 tenGigE1/65 65 10000 +Ethernet257 259 tenGigE1/66 66 10000 diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/qos.json.j2 b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/sai.profile b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/sai.profile new file mode 100644 index 00000000000..7bf21827cd1 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-z9264f-8x100G-112x50G.config.bcm diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/th2-z9264f-8x100G-112x50G.config.bcm b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/th2-z9264f-8x100G-112x50G.config.bcm new file mode 100644 index 00000000000..f4b3addfb51 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-C8D112/th2-z9264f-8x100G-112x50G.config.bcm @@ -0,0 +1,1119 @@ +#TH2 Z9264F 112x50G,8x100G +os=unix +core_clock_frequency=1700 +dpp_clock_ratio=2:3 +pbmp_xport_xe=0xfffffffd3fffffff4fffffffc7ffffffe +oversubscribe_mode=1 +fpem_mem_entries=65536 +l2xmsg_mode=1 + +l3_alpm_enable=2 +bcm_num_cos=8 +switch_bypass_mode=0 +mmu_lossless=0 +lpm_scaling_enable=0 +lpm_ipv6_128b_reserved=0 +ipv6_lpm_128b_enable=1 + +parity_correction=1 +parity_enable=1 + +dport_map_enable=1 + +dport_map_port_23=1 +dport_map_port_24=2 +dport_map_port_25=3 +dport_map_port_26=4 +dport_map_port_34=5 +dport_map_port_35=6 +dport_map_port_36=7 +dport_map_port_37=8 +dport_map_port_42=9 +dport_map_port_43=10 +dport_map_port_44=11 +dport_map_port_45=12 +dport_map_port_50=13 +dport_map_port_51=14 +dport_map_port_52=15 +dport_map_port_53=16 +dport_map_port_1=17 +dport_map_port_2=18 +dport_map_port_3=19 +dport_map_port_4=20 +dport_map_port_9=21 +dport_map_port_10=22 +dport_map_port_11=23 +dport_map_port_12=24 + +dport_map_port_17=25 +dport_map_port_18=26 +dport_map_port_58=27 +dport_map_port_59=28 +dport_map_port_69=29 +dport_map_port_68=30 +dport_map_port_111=31 +dport_map_port_110=32 +dport_map_port_118=33 +dport_map_port_119=34 +dport_map_port_116=35 +dport_map_port_117=36 +dport_map_port_126=37 +dport_map_port_127=38 +dport_map_port_124=39 +dport_map_port_125=40 +dport_map_port_76=41 +dport_map_port_77=42 +dport_map_port_74=43 +dport_map_port_75=44 +dport_map_port_84=45 +dport_map_port_85=46 +dport_map_port_82=47 +dport_map_port_83=48 +dport_map_port_92=49 +dport_map_port_93=50 +dport_map_port_90=51 +dport_map_port_91=52 +dport_map_port_104=53 +dport_map_port_105=54 +dport_map_port_102=55 +dport_map_port_103=56 +dport_map_port_29=57 +dport_map_port_30=58 +dport_map_port_27=59 +dport_map_port_28=60 +dport_map_port_40=61 +dport_map_port_41=62 +dport_map_port_38=63 +dport_map_port_39=64 +dport_map_port_48=65 +dport_map_port_49=66 +dport_map_port_46=67 +dport_map_port_47=68 +dport_map_port_56=69 +dport_map_port_57=70 +dport_map_port_54=71 +dport_map_port_55=72 +dport_map_port_7=73 +dport_map_port_8=74 +dport_map_port_5=75 +dport_map_port_6=76 +dport_map_port_15=77 +dport_map_port_16=78 +dport_map_port_13=79 +dport_map_port_14=80 +dport_map_port_21=81 +dport_map_port_22=82 +dport_map_port_19=83 +dport_map_port_20=84 +dport_map_port_62=85 +dport_map_port_63=86 +dport_map_port_60=87 +dport_map_port_61=88 +dport_map_port_70=89 +dport_map_port_71=90 +dport_map_port_72=91 +dport_map_port_73=92 +dport_map_port_112=93 +dport_map_port_113=94 +dport_map_port_114=95 +dport_map_port_115=96 +dport_map_port_120=97 +dport_map_port_121=98 +dport_map_port_122=99 +dport_map_port_123=100 +dport_map_port_128=101 +dport_map_port_129=102 +dport_map_port_130=103 +dport_map_port_131=104 +dport_map_port_78=105 +dport_map_port_79=106 +dport_map_port_80=107 +dport_map_port_81=108 +dport_map_port_86=109 +dport_map_port_87=110 +dport_map_port_88=111 +dport_map_port_89=112 +dport_map_port_94=113 +dport_map_port_95=114 +dport_map_port_96=115 +dport_map_port_97=116 +dport_map_port_106=117 +dport_map_port_107=118 +dport_map_port_108=119 +dport_map_port_109=120 + +# +# Tile-0 FC0~FC15 +# +portmap_1=1:50:2 +portmap_2=3:50:2 +portmap_3=5:50:2 +portmap_4=7:50:2 +portmap_5=9:50:2 +portmap_6=11:50:2 +portmap_7=13:50:2 +portmap_8=15:50:2 +portmap_9=17:50:2 +portmap_10=19:50:2 +portmap_11=21:50:2 +portmap_12=23:50:2 +portmap_13=25:50:2 +portmap_14=27:50:2 +portmap_15=29:50:2 +portmap_16=31:50:2 +portmap_17=33:100 +portmap_18=37:100 +portmap_19=41:50:2 +portmap_20=43:50:2 +portmap_21=45:50:2 +portmap_22=47:50:2 +portmap_23=49:50:2 +portmap_24=51:50:2 +portmap_25=53:50:2 +portmap_26=55:50:2 +portmap_27=57:50:2 +portmap_28=59:50:2 +portmap_29=61:50:2 +portmap_30=63:50:2 + + +# TX polarity +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 + +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 + +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 + +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 + +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 + +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 + +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 + +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x1 + +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 + +phy_chain_tx_polarity_flip_physical{37.0}=0x0 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_tx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x1 + +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 + +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 + +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 + +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 + +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 + +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 + +# RX polarity +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 + +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 + +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 + +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 + +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 + +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x1 + +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 + +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 + +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 + +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 + +phy_chain_rx_polarity_flip_physical{53.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 + +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 + +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 + +# TX lane swap +phy_chain_tx_lane_map_physical{1.0}=0x3120 +phy_chain_tx_lane_map_physical{5.0}=0x2130 +phy_chain_tx_lane_map_physical{9.0}=0x0213 +phy_chain_tx_lane_map_physical{13.0}=0x3021 + +phy_chain_tx_lane_map_physical{17.0}=0x3201 +phy_chain_tx_lane_map_physical{21.0}=0x3210 +phy_chain_tx_lane_map_physical{25.0}=0x1023 +phy_chain_tx_lane_map_physical{29.0}=0x0231 + +phy_chain_tx_lane_map_physical{33.0}=0x3210 +phy_chain_tx_lane_map_physical{37.0}=0x3120 +phy_chain_tx_lane_map_physical{41.0}=0x2031 +phy_chain_tx_lane_map_physical{45.0}=0x2130 + +phy_chain_tx_lane_map_physical{49.0}=0x2130 +phy_chain_tx_lane_map_physical{53.0}=0x3012 +phy_chain_tx_lane_map_physical{57.0}=0x2031 +phy_chain_tx_lane_map_physical{61.0}=0x0231 + +# RX lane swap +phy_chain_rx_lane_map_physical{1.0}=0x1320 +phy_chain_rx_lane_map_physical{5.0}=0x0213 +phy_chain_rx_lane_map_physical{9.0}=0x2301 +phy_chain_rx_lane_map_physical{13.0}=0x0321 + +phy_chain_rx_lane_map_physical{17.0}=0x2031 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_rx_lane_map_physical{25.0}=0x2310 +phy_chain_rx_lane_map_physical{29.0}=0x2013 + +phy_chain_rx_lane_map_physical{33.0}=0x2103 +phy_chain_rx_lane_map_physical{37.0}=0x0132 +phy_chain_rx_lane_map_physical{41.0}=0x2031 +phy_chain_rx_lane_map_physical{45.0}=0x1032 + +phy_chain_rx_lane_map_physical{49.0}=0x3201 +phy_chain_rx_lane_map_physical{53.0}=0x0132 +phy_chain_rx_lane_map_physical{57.0}=0x2031 +phy_chain_rx_lane_map_physical{61.0}=0x1032 + +# +# Tile-1 FC16~FC31 +# +portmap_34=65:50:2 +portmap_35=67:50:2 +portmap_36=69:50:2 +portmap_37=71:50:2 +portmap_38=73:50:2 +portmap_39=75:50:2 +portmap_40=77:50:2 +portmap_41=79:50:2 +portmap_42=81:50:2 +portmap_43=83:50:2 +portmap_44=85:50:2 +portmap_45=87:50:2 +portmap_46=89:50:2 +portmap_47=91:50:2 +portmap_48=93:50:2 +portmap_49=95:50:2 +portmap_50=97:50:2 +portmap_51=99:50:2 +portmap_52=101:50:2 +portmap_53=103:50:2 +portmap_54=105:50:2 +portmap_55=107:50:2 +portmap_56=109:50:2 +portmap_57=111:50:2 +portmap_58=113:100 +portmap_59=117:100 +portmap_60=121:50:2 +portmap_61=123:50:2 +portmap_62=125:50:2 +portmap_63=127:50:2 + +#TX polarity +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 + +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 + +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_tx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 + +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 + +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x1 +phy_chain_tx_polarity_flip_physical{83.0}=0x0 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 + +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 + +phy_chain_tx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x1 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 + +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 + +phy_chain_tx_polarity_flip_physical{97.0}=0x0 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 + +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 + +phy_chain_tx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 + +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{110.0}=0x1 +phy_chain_tx_polarity_flip_physical{111.0}=0x0 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 + +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 + +phy_chain_tx_polarity_flip_physical{117.0}=0x0 +phy_chain_tx_polarity_flip_physical{118.0}=0x1 +phy_chain_tx_polarity_flip_physical{119.0}=0x0 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 + +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 + +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 + +#RX polarity +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 + +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 + +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 + +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 + +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{83.0}=0x0 +phy_chain_rx_polarity_flip_physical{84.0}=0x1 + +phy_chain_rx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 + +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{92.0}=0x0 + +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 + +phy_chain_rx_polarity_flip_physical{97.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 + +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{104.0}=0x1 + +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 + +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{112.0}=0x1 + +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 + +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 + +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 + +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +# TX lane swap +phy_chain_tx_lane_map_physical{65.0}=0x2130 +phy_chain_tx_lane_map_physical{69.0}=0x3012 +phy_chain_tx_lane_map_physical{73.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x0231 + +phy_chain_tx_lane_map_physical{81.0}=0x2130 +phy_chain_tx_lane_map_physical{85.0}=0x1032 +phy_chain_tx_lane_map_physical{89.0}=0x2031 +phy_chain_tx_lane_map_physical{93.0}=0x0231 + +phy_chain_tx_lane_map_physical{97.0}=0x0123 +phy_chain_tx_lane_map_physical{101.0}=0x1320 +phy_chain_tx_lane_map_physical{105.0}=0x2301 +phy_chain_tx_lane_map_physical{109.0}=0x0213 + +phy_chain_tx_lane_map_physical{113.0}=0x0123 +phy_chain_tx_lane_map_physical{117.0}=0x1023 +phy_chain_tx_lane_map_physical{121.0}=0x2130 +phy_chain_tx_lane_map_physical{125.0}=0x1302 + +# RX lane swap +phy_chain_rx_lane_map_physical{65.0}=0x2103 +phy_chain_rx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{73.0}=0x2031 +phy_chain_rx_lane_map_physical{77.0}=0x1032 + +phy_chain_rx_lane_map_physical{81.0}=0x2103 +phy_chain_rx_lane_map_physical{85.0}=0x3210 +phy_chain_rx_lane_map_physical{89.0}=0x2031 +phy_chain_rx_lane_map_physical{93.0}=0x1032 + +phy_chain_rx_lane_map_physical{97.0}=0x1023 +phy_chain_rx_lane_map_physical{101.0}=0x3120 +phy_chain_rx_lane_map_physical{105.0}=0x1023 +phy_chain_rx_lane_map_physical{109.0}=0x0231 + +phy_chain_rx_lane_map_physical{113.0}=0x1320 +phy_chain_rx_lane_map_physical{117.0}=0x3102 +phy_chain_rx_lane_map_physical{121.0}=0x0213 +phy_chain_rx_lane_map_physical{125.0}=0x0231 + +# +# Tile-2 FC32~FC47 +# +# port 66 is the first management port +portmap_66=257:10 +# port 67 is the second loopback port +#portmap_67=261:10 +portmap_68=129:100 +portmap_69=133:100 +portmap_70=137:50:2 +portmap_71=139:50:2 +portmap_72=141:50:2 +portmap_73=143:50:2 +portmap_74=145:50:2 +portmap_75=147:50:2 +portmap_76=149:50:2 +portmap_77=151:50:2 +portmap_78=153:50:2 +portmap_79=155:50:2 +portmap_80=157:50:2 +portmap_81=159:50:2 +portmap_82=161:50:2 +portmap_83=163:50:2 +portmap_84=165:50:2 +portmap_85=167:50:2 +portmap_86=169:50:2 +portmap_87=171:50:2 +portmap_88=173:50:2 +portmap_89=175:50:2 +portmap_90=177:50:2 +portmap_91=179:50:2 +portmap_92=181:50:2 +portmap_93=183:50:2 +portmap_94=185:50:2 +portmap_95=187:50:2 +portmap_96=189:50:2 +portmap_97=191:50:2 + + +# TX polarity +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x1 + +phy_chain_tx_polarity_flip_physical{133.0}=0x0 +phy_chain_tx_polarity_flip_physical{134.0}=0x0 +phy_chain_tx_polarity_flip_physical{135.0}=0x1 +phy_chain_tx_polarity_flip_physical{136.0}=0x1 + +phy_chain_tx_polarity_flip_physical{137.0}=0x1 +phy_chain_tx_polarity_flip_physical{138.0}=0x0 +phy_chain_tx_polarity_flip_physical{139.0}=0x1 +phy_chain_tx_polarity_flip_physical{140.0}=0x0 + +phy_chain_tx_polarity_flip_physical{141.0}=0x1 +phy_chain_tx_polarity_flip_physical{142.0}=0x0 +phy_chain_tx_polarity_flip_physical{143.0}=0x1 +phy_chain_tx_polarity_flip_physical{144.0}=0x1 + +phy_chain_tx_polarity_flip_physical{145.0}=0x1 +phy_chain_tx_polarity_flip_physical{146.0}=0x0 +phy_chain_tx_polarity_flip_physical{147.0}=0x0 +phy_chain_tx_polarity_flip_physical{148.0}=0x1 + +phy_chain_tx_polarity_flip_physical{149.0}=0x0 +phy_chain_tx_polarity_flip_physical{150.0}=0x1 +phy_chain_tx_polarity_flip_physical{151.0}=0x1 +phy_chain_tx_polarity_flip_physical{152.0}=0x1 + +phy_chain_tx_polarity_flip_physical{153.0}=0x0 +phy_chain_tx_polarity_flip_physical{154.0}=0x1 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x0 + +phy_chain_tx_polarity_flip_physical{157.0}=0x0 +phy_chain_tx_polarity_flip_physical{158.0}=0x0 +phy_chain_tx_polarity_flip_physical{159.0}=0x1 +phy_chain_tx_polarity_flip_physical{160.0}=0x0 + +phy_chain_tx_polarity_flip_physical{161.0}=0x1 +phy_chain_tx_polarity_flip_physical{162.0}=0x0 +phy_chain_tx_polarity_flip_physical{163.0}=0x0 +phy_chain_tx_polarity_flip_physical{164.0}=0x1 + +phy_chain_tx_polarity_flip_physical{165.0}=0x1 +phy_chain_tx_polarity_flip_physical{166.0}=0x0 +phy_chain_tx_polarity_flip_physical{167.0}=0x0 +phy_chain_tx_polarity_flip_physical{168.0}=0x0 + +phy_chain_tx_polarity_flip_physical{169.0}=0x0 +phy_chain_tx_polarity_flip_physical{170.0}=0x0 +phy_chain_tx_polarity_flip_physical{171.0}=0x0 +phy_chain_tx_polarity_flip_physical{172.0}=0x0 + +phy_chain_tx_polarity_flip_physical{173.0}=0x0 +phy_chain_tx_polarity_flip_physical{174.0}=0x1 +phy_chain_tx_polarity_flip_physical{175.0}=0x0 +phy_chain_tx_polarity_flip_physical{176.0}=0x1 + +phy_chain_tx_polarity_flip_physical{177.0}=0x0 +phy_chain_tx_polarity_flip_physical{178.0}=0x0 +phy_chain_tx_polarity_flip_physical{179.0}=0x0 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 + +phy_chain_tx_polarity_flip_physical{181.0}=0x1 +phy_chain_tx_polarity_flip_physical{182.0}=0x0 +phy_chain_tx_polarity_flip_physical{183.0}=0x0 +phy_chain_tx_polarity_flip_physical{184.0}=0x0 + +phy_chain_tx_polarity_flip_physical{185.0}=0x0 +phy_chain_tx_polarity_flip_physical{186.0}=0x0 +phy_chain_tx_polarity_flip_physical{187.0}=0x0 +phy_chain_tx_polarity_flip_physical{188.0}=0x0 + +phy_chain_tx_polarity_flip_physical{189.0}=0x1 +phy_chain_tx_polarity_flip_physical{190.0}=0x0 +phy_chain_tx_polarity_flip_physical{191.0}=0x1 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 + +# RX polarity +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 + +phy_chain_rx_polarity_flip_physical{133.0}=0x0 +phy_chain_rx_polarity_flip_physical{134.0}=0x1 +phy_chain_rx_polarity_flip_physical{135.0}=0x1 +phy_chain_rx_polarity_flip_physical{136.0}=0x0 + +phy_chain_rx_polarity_flip_physical{137.0}=0x1 +phy_chain_rx_polarity_flip_physical{138.0}=0x0 +phy_chain_rx_polarity_flip_physical{139.0}=0x1 +phy_chain_rx_polarity_flip_physical{140.0}=0x1 + +phy_chain_rx_polarity_flip_physical{141.0}=0x0 +phy_chain_rx_polarity_flip_physical{142.0}=0x0 +phy_chain_rx_polarity_flip_physical{143.0}=0x1 +phy_chain_rx_polarity_flip_physical{144.0}=0x1 + +phy_chain_rx_polarity_flip_physical{145.0}=0x0 +phy_chain_rx_polarity_flip_physical{146.0}=0x0 +phy_chain_rx_polarity_flip_physical{147.0}=0x1 +phy_chain_rx_polarity_flip_physical{148.0}=0x0 + +phy_chain_rx_polarity_flip_physical{149.0}=0x0 +phy_chain_rx_polarity_flip_physical{150.0}=0x1 +phy_chain_rx_polarity_flip_physical{151.0}=0x1 +phy_chain_rx_polarity_flip_physical{152.0}=0x0 + +phy_chain_rx_polarity_flip_physical{153.0}=0x0 +phy_chain_rx_polarity_flip_physical{154.0}=0x1 +phy_chain_rx_polarity_flip_physical{155.0}=0x0 +phy_chain_rx_polarity_flip_physical{156.0}=0x0 + +phy_chain_rx_polarity_flip_physical{157.0}=0x1 +phy_chain_rx_polarity_flip_physical{158.0}=0x1 +phy_chain_rx_polarity_flip_physical{159.0}=0x0 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 + +phy_chain_rx_polarity_flip_physical{161.0}=0x1 +phy_chain_rx_polarity_flip_physical{162.0}=0x1 +phy_chain_rx_polarity_flip_physical{163.0}=0x0 +phy_chain_rx_polarity_flip_physical{164.0}=0x1 + +phy_chain_rx_polarity_flip_physical{165.0}=0x0 +phy_chain_rx_polarity_flip_physical{166.0}=0x1 +phy_chain_rx_polarity_flip_physical{167.0}=0x1 +phy_chain_rx_polarity_flip_physical{168.0}=0x0 + +phy_chain_rx_polarity_flip_physical{169.0}=0x0 +phy_chain_rx_polarity_flip_physical{170.0}=0x1 +phy_chain_rx_polarity_flip_physical{171.0}=0x0 +phy_chain_rx_polarity_flip_physical{172.0}=0x1 + +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x1 +phy_chain_rx_polarity_flip_physical{175.0}=0x0 +phy_chain_rx_polarity_flip_physical{176.0}=0x0 + +phy_chain_rx_polarity_flip_physical{177.0}=0x1 +phy_chain_rx_polarity_flip_physical{178.0}=0x0 +phy_chain_rx_polarity_flip_physical{179.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x1 + +phy_chain_rx_polarity_flip_physical{181.0}=0x0 +phy_chain_rx_polarity_flip_physical{182.0}=0x1 +phy_chain_rx_polarity_flip_physical{183.0}=0x0 +phy_chain_rx_polarity_flip_physical{184.0}=0x1 + +phy_chain_rx_polarity_flip_physical{185.0}=0x1 +phy_chain_rx_polarity_flip_physical{186.0}=0x0 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x0 + +phy_chain_rx_polarity_flip_physical{189.0}=0x1 +phy_chain_rx_polarity_flip_physical{190.0}=0x1 +phy_chain_rx_polarity_flip_physical{191.0}=0x0 +phy_chain_rx_polarity_flip_physical{192.0}=0x0 + +# TX lane swap +phy_chain_tx_lane_map_physical{129.0}=0x0312 +phy_chain_tx_lane_map_physical{133.0}=0x3120 +phy_chain_tx_lane_map_physical{137.0}=0x1203 +phy_chain_tx_lane_map_physical{141.0}=0x0132 + +phy_chain_tx_lane_map_physical{145.0}=0x0312 +phy_chain_tx_lane_map_physical{149.0}=0x2310 +phy_chain_tx_lane_map_physical{153.0}=0x1032 +phy_chain_tx_lane_map_physical{157.0}=0x3120 + +phy_chain_tx_lane_map_physical{161.0}=0x1023 +phy_chain_tx_lane_map_physical{165.0}=0x1203 +phy_chain_tx_lane_map_physical{169.0}=0x0213 +phy_chain_tx_lane_map_physical{173.0}=0x0123 + +phy_chain_tx_lane_map_physical{177.0}=0x2031 +phy_chain_tx_lane_map_physical{181.0}=0x1203 +phy_chain_tx_lane_map_physical{185.0}=0x0213 +phy_chain_tx_lane_map_physical{189.0}=0x3210 + +# RX lane swap +phy_chain_rx_lane_map_physical{129.0}=0x0321 +phy_chain_rx_lane_map_physical{133.0}=0x0312 +phy_chain_rx_lane_map_physical{137.0}=0x2103 +phy_chain_rx_lane_map_physical{141.0}=0x0231 + +phy_chain_rx_lane_map_physical{145.0}=0x0321 +phy_chain_rx_lane_map_physical{149.0}=0x0312 +phy_chain_rx_lane_map_physical{153.0}=0x3120 +phy_chain_rx_lane_map_physical{157.0}=0x2103 + +phy_chain_rx_lane_map_physical{161.0}=0x1032 +phy_chain_rx_lane_map_physical{165.0}=0x2031 +phy_chain_rx_lane_map_physical{169.0}=0x0132 +phy_chain_rx_lane_map_physical{173.0}=0x2103 + +phy_chain_rx_lane_map_physical{177.0}=0x1032 +phy_chain_rx_lane_map_physical{181.0}=0x1230 +phy_chain_rx_lane_map_physical{185.0}=0x0321 +phy_chain_rx_lane_map_physical{189.0}=0x3201 + +# +# Tile-3 FC48~FC63 +# portmap_0=x:xx // cpu port (not required, but included for illustration purposes) +# +# port 100 is the second management port +portmap_100=259:10 +# port 101 is the third loopback port +#portmap_101=262:10 +portmap_102=193:50:2 +portmap_103=195:50:2 +portmap_104=197:50:2 +portmap_105=199:50:2 +portmap_106=201:50:2 +portmap_107=203:50:2 +portmap_108=205:50:2 +portmap_109=207:50:2 +portmap_110=209:100 +portmap_111=213:100 +portmap_112=217:50:2 +portmap_113=219:50:2 +portmap_114=221:50:2 +portmap_115=223:50:2 +portmap_116=225:50:2 +portmap_117=227:50:2 +portmap_118=229:50:2 +portmap_119=231:50:2 +portmap_120=233:50:2 +portmap_121=235:50:2 +portmap_122=237:50:2 +portmap_123=239:50:2 +portmap_124=241:50:2 +portmap_125=243:50:2 +portmap_126=245:50:2 +portmap_127=247:50:2 +portmap_128=249:50:2 +portmap_129=251:50:2 +portmap_130=253:50:2 +portmap_131=255:50:2 + +# port 135 is the fourth loopback port +portmap_135=263:10 + +# TX polarity +phy_chain_tx_polarity_flip_physical{193.0}=0x0 +phy_chain_tx_polarity_flip_physical{194.0}=0x0 +phy_chain_tx_polarity_flip_physical{195.0}=0x0 +phy_chain_tx_polarity_flip_physical{196.0}=0x0 + +phy_chain_tx_polarity_flip_physical{197.0}=0x1 +phy_chain_tx_polarity_flip_physical{198.0}=0x0 +phy_chain_tx_polarity_flip_physical{199.0}=0x1 +phy_chain_tx_polarity_flip_physical{200.0}=0x0 + +phy_chain_tx_polarity_flip_physical{201.0}=0x0 +phy_chain_tx_polarity_flip_physical{202.0}=0x0 +phy_chain_tx_polarity_flip_physical{203.0}=0x0 +phy_chain_tx_polarity_flip_physical{204.0}=0x0 + +phy_chain_tx_polarity_flip_physical{205.0}=0x1 +phy_chain_tx_polarity_flip_physical{206.0}=0x0 +phy_chain_tx_polarity_flip_physical{207.0}=0x1 +phy_chain_tx_polarity_flip_physical{208.0}=0x0 + +phy_chain_tx_polarity_flip_physical{209.0}=0x1 +phy_chain_tx_polarity_flip_physical{210.0}=0x0 +phy_chain_tx_polarity_flip_physical{211.0}=0x0 +phy_chain_tx_polarity_flip_physical{212.0}=0x1 + +phy_chain_tx_polarity_flip_physical{213.0}=0x1 +phy_chain_tx_polarity_flip_physical{214.0}=0x0 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x0 + +phy_chain_tx_polarity_flip_physical{217.0}=0x0 +phy_chain_tx_polarity_flip_physical{218.0}=0x0 +phy_chain_tx_polarity_flip_physical{219.0}=0x0 +phy_chain_tx_polarity_flip_physical{220.0}=0x0 + +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x1 +phy_chain_tx_polarity_flip_physical{223.0}=0x1 +phy_chain_tx_polarity_flip_physical{224.0}=0x0 + +phy_chain_tx_polarity_flip_physical{225.0}=0x1 +phy_chain_tx_polarity_flip_physical{226.0}=0x1 +phy_chain_tx_polarity_flip_physical{227.0}=0x0 +phy_chain_tx_polarity_flip_physical{228.0}=0x0 + +phy_chain_tx_polarity_flip_physical{229.0}=0x1 +phy_chain_tx_polarity_flip_physical{230.0}=0x1 +phy_chain_tx_polarity_flip_physical{231.0}=0x1 +phy_chain_tx_polarity_flip_physical{232.0}=0x1 + +phy_chain_tx_polarity_flip_physical{233.0}=0x0 +phy_chain_tx_polarity_flip_physical{234.0}=0x0 +phy_chain_tx_polarity_flip_physical{235.0}=0x1 +phy_chain_tx_polarity_flip_physical{236.0}=0x1 + +phy_chain_tx_polarity_flip_physical{237.0}=0x1 +phy_chain_tx_polarity_flip_physical{238.0}=0x1 +phy_chain_tx_polarity_flip_physical{239.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x0 + +phy_chain_tx_polarity_flip_physical{241.0}=0x0 +phy_chain_tx_polarity_flip_physical{242.0}=0x1 +phy_chain_tx_polarity_flip_physical{243.0}=0x0 +phy_chain_tx_polarity_flip_physical{244.0}=0x0 + +phy_chain_tx_polarity_flip_physical{245.0}=0x1 +phy_chain_tx_polarity_flip_physical{246.0}=0x0 +phy_chain_tx_polarity_flip_physical{247.0}=0x0 +phy_chain_tx_polarity_flip_physical{248.0}=0x0 + +phy_chain_tx_polarity_flip_physical{249.0}=0x0 +phy_chain_tx_polarity_flip_physical{250.0}=0x0 +phy_chain_tx_polarity_flip_physical{251.0}=0x0 +phy_chain_tx_polarity_flip_physical{252.0}=0x0 + +phy_chain_tx_polarity_flip_physical{253.0}=0x1 +phy_chain_tx_polarity_flip_physical{254.0}=0x0 +phy_chain_tx_polarity_flip_physical{255.0}=0x0 +phy_chain_tx_polarity_flip_physical{256.0}=0x0 + +# RX polarity +phy_chain_rx_polarity_flip_physical{193.0}=0x1 +phy_chain_rx_polarity_flip_physical{194.0}=0x0 +phy_chain_rx_polarity_flip_physical{195.0}=0x0 +phy_chain_rx_polarity_flip_physical{196.0}=0x1 + +phy_chain_rx_polarity_flip_physical{197.0}=0x1 +phy_chain_rx_polarity_flip_physical{198.0}=0x1 +phy_chain_rx_polarity_flip_physical{199.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x1 + +phy_chain_rx_polarity_flip_physical{201.0}=0x1 +phy_chain_rx_polarity_flip_physical{202.0}=0x0 +phy_chain_rx_polarity_flip_physical{203.0}=0x1 +phy_chain_rx_polarity_flip_physical{204.0}=0x1 + +phy_chain_rx_polarity_flip_physical{205.0}=0x1 +phy_chain_rx_polarity_flip_physical{206.0}=0x1 +phy_chain_rx_polarity_flip_physical{207.0}=0x0 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 + +phy_chain_rx_polarity_flip_physical{209.0}=0x1 +phy_chain_rx_polarity_flip_physical{210.0}=0x1 +phy_chain_rx_polarity_flip_physical{211.0}=0x0 +phy_chain_rx_polarity_flip_physical{212.0}=0x1 + +phy_chain_rx_polarity_flip_physical{213.0}=0x0 +phy_chain_rx_polarity_flip_physical{214.0}=0x1 +phy_chain_rx_polarity_flip_physical{215.0}=0x1 +phy_chain_rx_polarity_flip_physical{216.0}=0x0 + +phy_chain_rx_polarity_flip_physical{217.0}=0x1 +phy_chain_rx_polarity_flip_physical{218.0}=0x0 +phy_chain_rx_polarity_flip_physical{219.0}=0x1 +phy_chain_rx_polarity_flip_physical{220.0}=0x1 + +phy_chain_rx_polarity_flip_physical{221.0}=0x1 +phy_chain_rx_polarity_flip_physical{222.0}=0x1 +phy_chain_rx_polarity_flip_physical{223.0}=0x0 +phy_chain_rx_polarity_flip_physical{224.0}=0x0 + +phy_chain_rx_polarity_flip_physical{225.0}=0x1 +phy_chain_rx_polarity_flip_physical{226.0}=0x1 +phy_chain_rx_polarity_flip_physical{227.0}=0x1 +phy_chain_rx_polarity_flip_physical{228.0}=0x0 + +phy_chain_rx_polarity_flip_physical{229.0}=0x1 +phy_chain_rx_polarity_flip_physical{230.0}=0x0 +phy_chain_rx_polarity_flip_physical{231.0}=0x0 +phy_chain_rx_polarity_flip_physical{232.0}=0x1 + +phy_chain_rx_polarity_flip_physical{233.0}=0x1 +phy_chain_rx_polarity_flip_physical{234.0}=0x1 +phy_chain_rx_polarity_flip_physical{235.0}=0x1 +phy_chain_rx_polarity_flip_physical{236.0}=0x0 + +phy_chain_rx_polarity_flip_physical{237.0}=0x0 +phy_chain_rx_polarity_flip_physical{238.0}=0x1 +phy_chain_rx_polarity_flip_physical{239.0}=0x0 +phy_chain_rx_polarity_flip_physical{240.0}=0x0 + +phy_chain_rx_polarity_flip_physical{241.0}=0x0 +phy_chain_rx_polarity_flip_physical{242.0}=0x1 +phy_chain_rx_polarity_flip_physical{243.0}=0x0 +phy_chain_rx_polarity_flip_physical{244.0}=0x1 + +phy_chain_rx_polarity_flip_physical{245.0}=0x1 +phy_chain_rx_polarity_flip_physical{246.0}=0x0 +phy_chain_rx_polarity_flip_physical{247.0}=0x0 +phy_chain_rx_polarity_flip_physical{248.0}=0x1 + +phy_chain_rx_polarity_flip_physical{249.0}=0x0 +phy_chain_rx_polarity_flip_physical{250.0}=0x0 +phy_chain_rx_polarity_flip_physical{251.0}=0x1 +phy_chain_rx_polarity_flip_physical{252.0}=0x0 + +phy_chain_rx_polarity_flip_physical{253.0}=0x1 +phy_chain_rx_polarity_flip_physical{254.0}=0x0 +phy_chain_rx_polarity_flip_physical{255.0}=0x0 +phy_chain_rx_polarity_flip_physical{256.0}=0x0 + +# TX lane swap +phy_chain_tx_lane_map_physical{193.0}=0x2031 +phy_chain_tx_lane_map_physical{197.0}=0x1203 +phy_chain_tx_lane_map_physical{201.0}=0x0213 +phy_chain_tx_lane_map_physical{205.0}=0x3210 + +phy_chain_tx_lane_map_physical{209.0}=0x1023 +phy_chain_tx_lane_map_physical{213.0}=0x1203 +phy_chain_tx_lane_map_physical{217.0}=0x0213 +phy_chain_tx_lane_map_physical{221.0}=0x3102 + +phy_chain_tx_lane_map_physical{225.0}=0x2031 +phy_chain_tx_lane_map_physical{229.0}=0x1023 +phy_chain_tx_lane_map_physical{233.0}=0x1320 +phy_chain_tx_lane_map_physical{237.0}=0x2013 + +phy_chain_tx_lane_map_physical{241.0}=0x1023 +phy_chain_tx_lane_map_physical{245.0}=0x1203 +phy_chain_tx_lane_map_physical{249.0}=0x3120 +phy_chain_tx_lane_map_physical{253.0}=0x3210 + +# RX lane swap +phy_chain_rx_lane_map_physical{193.0}=0x1032 +phy_chain_rx_lane_map_physical{197.0}=0x1230 +phy_chain_rx_lane_map_physical{201.0}=0x0321 +phy_chain_rx_lane_map_physical{205.0}=0x3201 + +phy_chain_rx_lane_map_physical{209.0}=0x3201 +phy_chain_rx_lane_map_physical{213.0}=0x2031 +phy_chain_rx_lane_map_physical{217.0}=0x0321 +phy_chain_rx_lane_map_physical{221.0}=0x3201 + +phy_chain_rx_lane_map_physical{225.0}=0x2103 +phy_chain_rx_lane_map_physical{229.0}=0x2310 +phy_chain_rx_lane_map_physical{233.0}=0x0213 +phy_chain_rx_lane_map_physical{237.0}=0x1032 + +phy_chain_rx_lane_map_physical{241.0}=0x0321 +phy_chain_rx_lane_map_physical{245.0}=0x2301 +phy_chain_rx_lane_map_physical{249.0}=0x2103 +phy_chain_rx_lane_map_physical{253.0}=0x2013 + +physical_ports=64 +logical_ports=136 +uplink_ports=2 +dport_map_port_66=121 +dport_map_port_100=122 + +module_64ports=1 +mmu_init_config="MSFT-TH-Tier0" + diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/buffers.json.j2 b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/buffers_defaults_t0.j2 b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..c3e8cbda67d --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/buffers_defaults_t0.j2 @@ -0,0 +1,47 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "38738752", + "type": "ingress", + "mode": "dynamic", + "xoff": "3855488" + }, + "egress_lossy_pool": { + "size": "37057280", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "43507776", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"10876944" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/buffers_defaults_t1.j2 b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..a5322c73272 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/buffers_defaults_t1.j2 @@ -0,0 +1,47 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "37968320", + "type": "ingress", + "mode": "dynamic", + "xoff": "4625920" + }, + "egress_lossy_pool": { + "size": "36402496", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "43507776", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"10876944" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/led_proc_init.soc b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/led_proc_init.soc new file mode 100644 index 00000000000..93806b33dbe --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/led_proc_init.soc @@ -0,0 +1,115 @@ +# LED microprocessor initialization for DellEMC-Z9264f + +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=32 REMAP_PORT_2=33 REMAP_PORT_1=34 REMAP_PORT_0=35 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=36 REMAP_PORT_6=37 REMAP_PORT_5=38 REMAP_PORT_4=39 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=4 REMAP_PORT_10=5 REMAP_PORT_9=6 REMAP_PORT_8=7 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=0 REMAP_PORT_14=1 REMAP_PORT_13=2 REMAP_PORT_12=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=56 REMAP_PORT_18=57 REMAP_PORT_17=58 REMAP_PORT_16=59 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=60 REMAP_PORT_22=61 REMAP_PORT_21=62 REMAP_PORT_20=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=28 REMAP_PORT_26=29 REMAP_PORT_25=30 REMAP_PORT_24=31 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=24 REMAP_PORT_30=25 REMAP_PORT_29=26 REMAP_PORT_28=27 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=48 REMAP_PORT_34=49 REMAP_PORT_33=50 REMAP_PORT_32=51 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=52 REMAP_PORT_38=53 REMAP_PORT_37=54 REMAP_PORT_36=55 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=20 REMAP_PORT_42=21 REMAP_PORT_41=22 REMAP_PORT_40=23 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=16 REMAP_PORT_46=17 REMAP_PORT_45=18 REMAP_PORT_44=19 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=40 REMAP_PORT_50=41 REMAP_PORT_49=42 REMAP_PORT_48=43 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=44 REMAP_PORT_54=45 REMAP_PORT_53=46 REMAP_PORT_52=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=12 REMAP_PORT_58=13 REMAP_PORT_57=14 REMAP_PORT_56=15 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=8 REMAP_PORT_62=9 REMAP_PORT_61=10 REMAP_PORT_60=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0 REMAP_PORT_2=1 REMAP_PORT_1=2 REMAP_PORT_0=3 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=4 REMAP_PORT_6=5 REMAP_PORT_5=6 REMAP_PORT_4=7 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=38 REMAP_PORT_8=39 REMAP_PORT_11=36 REMAP_PORT_10=37 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=32 REMAP_PORT_14=33 REMAP_PORT_13=34 REMAP_PORT_12=35 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=8 REMAP_PORT_18=9 REMAP_PORT_17=10 REMAP_PORT_16=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=12 REMAP_PORT_22=13 REMAP_PORT_21=14 REMAP_PORT_20=15 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=44 REMAP_PORT_26=45 REMAP_PORT_25=46 REMAP_PORT_24=47 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=40 REMAP_PORT_30=41 REMAP_PORT_29=42 REMAP_PORT_28=43 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=16 REMAP_PORT_34=17 REMAP_PORT_33=18 REMAP_PORT_32=19 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=20 REMAP_PORT_38=21 REMAP_PORT_37=22 REMAP_PORT_36=23 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=52 REMAP_PORT_42=53 REMAP_PORT_41=54 REMAP_PORT_40=55 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=48 REMAP_PORT_46=49 REMAP_PORT_45=50 REMAP_PORT_44=51 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=24 REMAP_PORT_50=25 REMAP_PORT_49=26 REMAP_PORT_48=27 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=28 REMAP_PORT_54=29 REMAP_PORT_53=30 REMAP_PORT_52=31 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=60 REMAP_PORT_58=61 REMAP_PORT_57=62 REMAP_PORT_56=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=56 REMAP_PORT_62=57 REMAP_PORT_61=58 REMAP_PORT_60=59 +m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=60 REMAP_PORT_2=61 REMAP_PORT_1=62 REMAP_PORT_0=63 +m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=56 REMAP_PORT_6=57 REMAP_PORT_5=58 REMAP_PORT_4=59 +m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=24 REMAP_PORT_10=25 REMAP_PORT_9=26 REMAP_PORT_8=27 +m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=28 REMAP_PORT_14=29 REMAP_PORT_13=30 REMAP_PORT_12=31 +m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=52 REMAP_PORT_18=53 REMAP_PORT_17=54 REMAP_PORT_16=55 +m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=48 REMAP_PORT_22=49 REMAP_PORT_21=50 REMAP_PORT_20=51 +m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=16 REMAP_PORT_26=17 REMAP_PORT_25=18 REMAP_PORT_24=19 +m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=20 REMAP_PORT_30=21 REMAP_PORT_29=22 REMAP_PORT_28=23 +m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=44 REMAP_PORT_34=45 REMAP_PORT_33=46 REMAP_PORT_32=47 +m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=40 REMAP_PORT_38=41 REMAP_PORT_37=42 REMAP_PORT_36=43 +m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=8 REMAP_PORT_42=9 REMAP_PORT_41=10 REMAP_PORT_40=11 +m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=12 REMAP_PORT_46=13 REMAP_PORT_45=14 REMAP_PORT_44=15 +m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=36 REMAP_PORT_50=37 REMAP_PORT_49=38 REMAP_PORT_48=39 +m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=32 REMAP_PORT_54=33 REMAP_PORT_53=34 REMAP_PORT_52=35 +m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=0 REMAP_PORT_58=1 REMAP_PORT_57=2 REMAP_PORT_56=3 +m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=4 REMAP_PORT_62=5 REMAP_PORT_61=6 REMAP_PORT_60=7 +m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=28 REMAP_PORT_2=29 REMAP_PORT_1=30 REMAP_PORT_0=31 +m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=24 REMAP_PORT_6=25 REMAP_PORT_5=26 REMAP_PORT_4=27 +m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=56 REMAP_PORT_10=57 REMAP_PORT_9=58 REMAP_PORT_8=59 +m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=60 REMAP_PORT_14=61 REMAP_PORT_13=62 REMAP_PORT_12=63 +m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=4 REMAP_PORT_18=5 REMAP_PORT_17=6 REMAP_PORT_16=7 +m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=0 REMAP_PORT_22=1 REMAP_PORT_21=2 REMAP_PORT_20=3 +m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=32 REMAP_PORT_26=33 REMAP_PORT_25=34 REMAP_PORT_24=35 +m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=36 REMAP_PORT_30=37 REMAP_PORT_29=38 REMAP_PORT_28=39 +m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=12 REMAP_PORT_34=13 REMAP_PORT_33=14 REMAP_PORT_32=15 +m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=8 REMAP_PORT_38=9 REMAP_PORT_37=10 REMAP_PORT_36=11 +m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=40 REMAP_PORT_42=41 REMAP_PORT_41=42 REMAP_PORT_40=43 +m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=44 REMAP_PORT_46=45 REMAP_PORT_45=46 REMAP_PORT_44=47 +m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=20 REMAP_PORT_50=21 REMAP_PORT_49=22 REMAP_PORT_48=23 +m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=16 REMAP_PORT_54=17 REMAP_PORT_53=18 REMAP_PORT_52=19 +m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=48 REMAP_PORT_58=49 REMAP_PORT_57=50 REMAP_PORT_56=51 +m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=52 REMAP_PORT_62=53 REMAP_PORT_61=54 REMAP_PORT_60=55 +m CMIC_LEDUP4_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=1 REMAP_PORT_1=0 + +led 0 stop +led 0 prog \ + 02 00 28 60 FE 67 1B 06 FE 80 D2 40 74 02 86 FD \ + 3A 80 28 32 08 97 71 5A 77 4C 57 28 32 08 97 75 \ + 4C 28 32 00 32 01 B7 97 75 3C 16 FD DA 0A 74 36 \ + 12 00 61 FD CA 05 CA 05 74 3C 77 4C 12 96 F8 15 \ + 1A 00 75 53 77 5A 57 28 32 07 97 57 32 0E 87 32 \ + 0E 87 57 32 0E 87 32 0F 87 57 32 0F 87 32 0E 87 \ + 57 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 0 auto on +led 0 start + +led 1 stop +led 1 prog \ + 02 00 28 60 FE 67 1B 06 FE 80 D2 40 74 02 86 FD \ + 3A 80 28 32 08 97 71 5A 77 4C 57 28 32 08 97 75 \ + 4C 28 32 00 32 01 B7 97 75 3C 16 FD DA 0A 74 36 \ + 12 00 61 FD CA 05 CA 05 74 3C 77 4C 12 96 F8 15 \ + 1A 00 75 53 77 5A 57 28 32 07 97 57 32 0E 87 32 \ + 0E 87 57 32 0E 87 32 0F 87 57 32 0F 87 32 0E 87 \ + 57 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 1 auto on +led 1 start + +led 2 stop +led 2 prog \ + 02 00 28 60 FE 67 1B 06 FE 80 D2 40 74 02 86 FD \ + 3A 80 28 32 08 97 71 5A 77 4C 57 28 32 08 97 75 \ + 4C 28 32 00 32 01 B7 97 75 3C 16 FD DA 0A 74 36 \ + 12 00 61 FD CA 05 CA 05 74 3C 77 4C 12 96 F8 15 \ + 1A 00 75 53 77 5A 57 28 32 07 97 57 32 0E 87 32 \ + 0E 87 57 32 0E 87 32 0F 87 57 32 0F 87 32 0E 87 \ + 57 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 2 auto on +led 2 start + +led 3 stop +led 3 prog \ + 02 00 28 60 FE 67 1B 06 FE 80 D2 40 74 02 86 FD \ + 3A 80 28 32 08 97 71 5A 77 4C 57 28 32 08 97 75 \ + 4C 28 32 00 32 01 B7 97 75 3C 16 FD DA 0A 74 36 \ + 12 00 61 FD CA 05 CA 05 74 3C 77 4C 12 96 F8 15 \ + 1A 00 75 53 77 5A 57 28 32 07 97 57 32 0E 87 32 \ + 0E 87 57 32 0E 87 32 0F 87 57 32 0F 87 32 0E 87 \ + 57 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +led 3 auto on +led 3 start diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/pg_profile_lookup.ini b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/pg_profile_lookup.ini new file mode 100644 index 00000000000..aedda37a887 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -3 2288 + 25000 5m 1248 2288 53248 -3 2288 + 40000 5m 1248 2288 66560 -3 2288 + 50000 5m 1248 2288 90272 -3 2288 + 100000 5m 1248 2288 165568 -3 2288 + 10000 40m 1248 2288 37024 -3 2288 + 25000 40m 1248 2288 53248 -3 2288 + 40000 40m 1248 2288 71552 -3 2288 + 50000 40m 1248 2288 96096 -3 2288 + 100000 40m 1248 2288 177632 -3 2288 + 10000 300m 1248 2288 46176 -3 2288 + 25000 300m 1248 2288 79040 -3 2288 + 40000 300m 1248 2288 108160 -3 2288 + 50000 300m 1248 2288 141856 -3 2288 + 100000 300m 1248 2288 268736 -3 2288 diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/port_config.ini b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/port_config.ini new file mode 100644 index 00000000000..13c0d660002 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/port_config.ini @@ -0,0 +1,67 @@ +# name lanes alias index speed +Ethernet0 49,50,51,52 fortyGigE1/1 1 40000 +Ethernet4 53,54,55,56 fortyGigE1/2 2 40000 +Ethernet8 65,66,67,68 fortyGigE1/3 3 40000 +Ethernet12 69,70,71,72 fortyGigE1/4 4 40000 +Ethernet16 81,82,83,84 fortyGigE1/5 5 40000 +Ethernet20 85,86,87,88 fortyGigE1/6 6 40000 +Ethernet24 97,98,99,100 fortyGigE1/7 7 40000 +Ethernet28 101,102,103,104 fortyGigE1/8 8 40000 +Ethernet32 1,2,3,4 fortyGigE1/9 9 40000 +Ethernet36 5,6,7,8 fortyGigE1/10 10 40000 +Ethernet40 17,18,19,20 fortyGigE1/11 11 40000 +Ethernet44 21,22,23,24 fortyGigE1/12 12 40000 +Ethernet48 33,34,35,36 fortyGigE1/13 13 40000 +Ethernet52 37,38,39,40 fortyGigE1/14 14 40000 +Ethernet56 113,114,115,116 fortyGigE1/15 15 40000 +Ethernet60 117,118,119,120 fortyGigE1/16 16 40000 +Ethernet64 133,134,135,136 fortyGigE1/17 17 40000 +Ethernet68 129,130,131,132 fortyGigE1/18 18 40000 +Ethernet72 213,214,215,216 fortyGigE1/19 19 40000 +Ethernet76 209,210,211,212 fortyGigE1/20 20 40000 +Ethernet80 229,230,231,232 fortyGigE1/21 21 40000 +Ethernet84 225,226,227,228 fortyGigE1/22 22 40000 +Ethernet88 245,246,247,248 fortyGigE1/23 23 40000 +Ethernet92 241,242,243,244 fortyGigE1/24 24 40000 +Ethernet96 149,150,151,152 fortyGigE1/25 25 40000 +Ethernet100 145,146,147,148 fortyGigE1/26 26 40000 +Ethernet104 165,166,167,168 fortyGigE1/27 27 40000 +Ethernet108 161,162,163,164 fortyGigE1/28 28 40000 +Ethernet112 181,182,183,184 fortyGigE1/29 29 40000 +Ethernet116 177,178,179,180 fortyGigE1/30 30 40000 +Ethernet120 197,198,199,200 fortyGigE1/31 31 40000 +Ethernet124 193,194,195,196 fortyGigE1/32 32 40000 +Ethernet128 61,62,63,64 fortyGigE1/33 33 40000 +Ethernet132 57,58,59,60 fortyGigE1/34 34 40000 +Ethernet136 77,78,79,80 fortyGigE1/35 35 40000 +Ethernet140 73,74,75,76 fortyGigE1/36 36 40000 +Ethernet144 93,94,95,96 fortyGigE1/37 37 40000 +Ethernet148 89,90,91,92 fortyGigE1/38 38 40000 +Ethernet152 109,110,111,112 fortyGigE1/39 39 40000 +Ethernet156 105,106,107,108 fortyGigE1/40 40 40000 +Ethernet160 13,14,15,16 fortyGigE1/41 41 40000 +Ethernet164 9,10,11,12 fortyGigE1/42 42 40000 +Ethernet168 29,30,31,32 fortyGigE1/43 43 40000 +Ethernet172 25,26,27,28 fortyGigE1/44 44 40000 +Ethernet176 45,46,47,48 fortyGigE1/45 45 40000 +Ethernet180 41,42,43,44 fortyGigE1/46 46 40000 +Ethernet184 125,126,127,128 fortyGigE1/47 47 40000 +Ethernet188 121,122,123,124 fortyGigE1/48 48 40000 +Ethernet192 137,138,139,140 fortyGigE1/49 49 40000 +Ethernet196 141,142,143,144 fortyGigE1/50 50 40000 +Ethernet200 217,218,219,220 fortyGigE1/51 51 40000 +Ethernet204 221,222,223,224 fortyGigE1/52 52 40000 +Ethernet208 233,234,235,236 fortyGigE1/53 53 40000 +Ethernet212 237,238,239,240 fortyGigE1/54 54 40000 +Ethernet216 249,250,251,252 fortyGigE1/55 55 40000 +Ethernet220 253,254,255,256 fortyGigE1/56 56 40000 +Ethernet224 153,154,155,156 fortyGigE1/57 57 40000 +Ethernet228 157,158,159,160 fortyGigE1/58 58 40000 +Ethernet232 169,170,171,172 fortyGigE1/59 59 40000 +Ethernet236 173,174,175,176 fortyGigE1/60 60 40000 +Ethernet240 185,186,187,188 fortyGigE1/61 61 40000 +Ethernet244 189,190,191,192 fortyGigE1/62 62 40000 +Ethernet248 201,202,203,204 fortyGigE1/63 63 40000 +Ethernet252 205,206,207,208 fortyGigE1/64 64 40000 +Ethernet256 257 tenGigE1/65 65 10000 +Ethernet257 259 tenGigE1/66 66 10000 diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/qos.json.j2 b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/sai.profile.j2 b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/sai.profile.j2 new file mode 100644 index 00000000000..66859a47373 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/sai.profile.j2 @@ -0,0 +1,13 @@ +{# Get sai.profile based on switch_role #} +{%- if DEVICE_METADATA is defined -%} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] -%} +{%- if switch_role.lower() == 'torrouter' %} +{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-z9264f-64x40G-t0.config.bcm' -%} +{%- else %} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-z9264f-64x40G-t1.config.bcm' -%} +{%- endif %} +{%- else %} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-z9264f-64x40G-t1.config.bcm' -%} +{%- endif %} +{# Write the contents of sai_ profile_filename to sai.profile file #} +{{ sai_profile_contents }} diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/th2-z9264f-64x40G-t0.config.bcm b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/th2-z9264f-64x40G-t0.config.bcm new file mode 100644 index 00000000000..79ec519f785 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/th2-z9264f-64x40G-t0.config.bcm @@ -0,0 +1,1007 @@ +#TH2 Z9264F 64x40G +os=unix +core_clock_frequency=1700 +dpp_clock_ratio=2:3 +pbmp_xport_xe=0x3FFFD0000FFFF40003FFFC0001FFFE +oversubscribe_mode=1 +fpem_mem_entries=65536 +l2xmsg_mode=1 + +l3_alpm_enable=2 +bcm_num_cos=8 +switch_bypass_mode=0 +mmu_lossless=0 +lpm_scaling_enable=0 +lpm_ipv6_128b_reserved=0 +ipv6_lpm_128b_enable=1 + +parity_correction=1 +parity_enable=1 + +dport_map_enable=1 + +dport_map_enable=1 +dport_map_port_13=1 +dport_map_port_14=2 +dport_map_port_34=3 +dport_map_port_35=4 +dport_map_port_38=5 +dport_map_port_39=6 +dport_map_port_42=7 +dport_map_port_43=8 +dport_map_port_1=9 +dport_map_port_2=10 +dport_map_port_5=11 +dport_map_port_6=12 +dport_map_port_9=13 +dport_map_port_10=14 +dport_map_port_46=15 +dport_map_port_47=16 + +dport_map_port_69=17 +dport_map_port_68=18 +dport_map_port_107=19 +dport_map_port_106=20 +dport_map_port_111=21 +dport_map_port_110=22 +dport_map_port_115=23 +dport_map_port_114=24 +dport_map_port_73=25 +dport_map_port_72=26 +dport_map_port_77=27 +dport_map_port_76=28 +dport_map_port_81=29 +dport_map_port_80=30 +dport_map_port_103=31 +dport_map_port_102=32 + +dport_map_port_16=33 +dport_map_port_15=34 +dport_map_port_37=35 +dport_map_port_36=36 +dport_map_port_41=37 +dport_map_port_40=38 +dport_map_port_45=39 +dport_map_port_44=40 +dport_map_port_4=41 +dport_map_port_3=42 +dport_map_port_8=43 +dport_map_port_7=44 +dport_map_port_12=45 +dport_map_port_11=46 +dport_map_port_49=47 +dport_map_port_48=48 + +dport_map_port_70=49 +dport_map_port_71=50 +dport_map_port_108=51 +dport_map_port_109=52 +dport_map_port_112=53 +dport_map_port_113=54 +dport_map_port_116=55 +dport_map_port_117=56 +dport_map_port_74=57 +dport_map_port_75=58 +dport_map_port_78=59 +dport_map_port_79=60 +dport_map_port_82=61 +dport_map_port_83=62 +dport_map_port_104=63 +dport_map_port_105=64 + +# +# Tile-0 FC0~FC15 +# +portmap_1=1:40 +portmap_2=5:40 +portmap_3=9:40 +portmap_4=13:40 +portmap_5=17:40 +portmap_6=21:40 +portmap_7=25:40 +portmap_8=29:40 +portmap_9=33:40 +portmap_10=37:40 +portmap_11=41:40 +portmap_12=45:40 +portmap_13=49:40 +portmap_14=53:40 +portmap_15=57:40 +portmap_16=61:40 + +# TX polarity +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 + +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 + +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 + +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 + +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 + +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 + +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 + +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x1 + +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 + +phy_chain_tx_polarity_flip_physical{37.0}=0x0 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_tx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x1 + +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 + +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 + +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 + +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 + +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 + +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 + +# RX polarity +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 + +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 + +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 + +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 + +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 + +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x1 + +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 + +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 + +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 + +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 + +phy_chain_rx_polarity_flip_physical{53.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 + +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 + +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 + +# TX lane swap +phy_chain_tx_lane_map_physical{1.0}=0x3120 +phy_chain_tx_lane_map_physical{5.0}=0x2130 +phy_chain_tx_lane_map_physical{9.0}=0x0213 +phy_chain_tx_lane_map_physical{13.0}=0x3021 + +phy_chain_tx_lane_map_physical{17.0}=0x3201 +phy_chain_tx_lane_map_physical{21.0}=0x3210 +phy_chain_tx_lane_map_physical{25.0}=0x1023 +phy_chain_tx_lane_map_physical{29.0}=0x0231 + +phy_chain_tx_lane_map_physical{33.0}=0x3210 +phy_chain_tx_lane_map_physical{37.0}=0x3120 +phy_chain_tx_lane_map_physical{41.0}=0x2031 +phy_chain_tx_lane_map_physical{45.0}=0x2130 + +phy_chain_tx_lane_map_physical{49.0}=0x2130 +phy_chain_tx_lane_map_physical{53.0}=0x3012 +phy_chain_tx_lane_map_physical{57.0}=0x2031 +phy_chain_tx_lane_map_physical{61.0}=0x0231 + +# RX lane swap +phy_chain_rx_lane_map_physical{1.0}=0x1320 +phy_chain_rx_lane_map_physical{5.0}=0x0213 +phy_chain_rx_lane_map_physical{9.0}=0x2301 +phy_chain_rx_lane_map_physical{13.0}=0x0321 + +phy_chain_rx_lane_map_physical{17.0}=0x2031 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_rx_lane_map_physical{25.0}=0x2310 +phy_chain_rx_lane_map_physical{29.0}=0x2013 + +phy_chain_rx_lane_map_physical{33.0}=0x2103 +phy_chain_rx_lane_map_physical{37.0}=0x0132 +phy_chain_rx_lane_map_physical{41.0}=0x2031 +phy_chain_rx_lane_map_physical{45.0}=0x1032 + +phy_chain_rx_lane_map_physical{49.0}=0x3201 +phy_chain_rx_lane_map_physical{53.0}=0x0132 +phy_chain_rx_lane_map_physical{57.0}=0x2031 +phy_chain_rx_lane_map_physical{61.0}=0x1032 + +# +# Tile-1 FC16~FC31 +# +portmap_34=65:40 +portmap_35=69:40 +portmap_36=73:40 +portmap_37=77:40 +portmap_38=81:40 +portmap_39=85:40 +portmap_40=89:40 +portmap_41=93:40 +portmap_42=97:40 +portmap_43=101:40 +portmap_44=105:40 +portmap_45=109:40 +portmap_46=113:40 +portmap_47=117:40 +portmap_48=121:40 +portmap_49=125:40 + +#TX polarity +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 + +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 + +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_tx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 + +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 + +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x1 +phy_chain_tx_polarity_flip_physical{83.0}=0x0 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 + +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 + +phy_chain_tx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x1 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 + +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 + +phy_chain_tx_polarity_flip_physical{97.0}=0x0 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 + +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 + +phy_chain_tx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 + +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{110.0}=0x1 +phy_chain_tx_polarity_flip_physical{111.0}=0x0 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 + +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 + +phy_chain_tx_polarity_flip_physical{117.0}=0x0 +phy_chain_tx_polarity_flip_physical{118.0}=0x1 +phy_chain_tx_polarity_flip_physical{119.0}=0x0 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 + +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 + +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 + +#RX polarity +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 + +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 + +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 + +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 + +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{83.0}=0x0 +phy_chain_rx_polarity_flip_physical{84.0}=0x1 + +phy_chain_rx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 + +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{92.0}=0x0 + +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 + +phy_chain_rx_polarity_flip_physical{97.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 + +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{104.0}=0x1 + +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 + +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{112.0}=0x1 + +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 + +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 + +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 + +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +# TX lane swap +phy_chain_tx_lane_map_physical{65.0}=0x2130 +phy_chain_tx_lane_map_physical{69.0}=0x3012 +phy_chain_tx_lane_map_physical{73.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x0231 + +phy_chain_tx_lane_map_physical{81.0}=0x2130 +phy_chain_tx_lane_map_physical{85.0}=0x1032 +phy_chain_tx_lane_map_physical{89.0}=0x2031 +phy_chain_tx_lane_map_physical{93.0}=0x0231 + +phy_chain_tx_lane_map_physical{97.0}=0x0123 +phy_chain_tx_lane_map_physical{101.0}=0x1320 +phy_chain_tx_lane_map_physical{105.0}=0x2301 +phy_chain_tx_lane_map_physical{109.0}=0x0213 + +phy_chain_tx_lane_map_physical{113.0}=0x0123 +phy_chain_tx_lane_map_physical{117.0}=0x1023 +phy_chain_tx_lane_map_physical{121.0}=0x2130 +phy_chain_tx_lane_map_physical{125.0}=0x1302 + +# RX lane swap +phy_chain_rx_lane_map_physical{65.0}=0x2103 +phy_chain_rx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{73.0}=0x2031 +phy_chain_rx_lane_map_physical{77.0}=0x1032 + +phy_chain_rx_lane_map_physical{81.0}=0x2103 +phy_chain_rx_lane_map_physical{85.0}=0x3210 +phy_chain_rx_lane_map_physical{89.0}=0x2031 +phy_chain_rx_lane_map_physical{93.0}=0x1032 + +phy_chain_rx_lane_map_physical{97.0}=0x1023 +phy_chain_rx_lane_map_physical{101.0}=0x3120 +phy_chain_rx_lane_map_physical{105.0}=0x1023 +phy_chain_rx_lane_map_physical{109.0}=0x0231 + +phy_chain_rx_lane_map_physical{113.0}=0x1320 +phy_chain_rx_lane_map_physical{117.0}=0x3102 +phy_chain_rx_lane_map_physical{121.0}=0x0213 +phy_chain_rx_lane_map_physical{125.0}=0x0231 + +# +# Tile-2 FC32~FC47 +# +# port 66 is the first management port +portmap_66=257:10 +# port 67 is the second loopback port +#portmap_67=261:10 +portmap_68=129:40 +portmap_69=133:40 +portmap_70=137:40 +portmap_71=141:40 +portmap_72=145:40 +portmap_73=149:40 +portmap_74=153:40 +portmap_75=157:40 +portmap_76=161:40 +portmap_77=165:40 +portmap_78=169:40 +portmap_79=173:40 +portmap_80=177:40 +portmap_81=181:40 +portmap_82=185:40 +portmap_83=189:40 + +# TX polarity +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x1 + +phy_chain_tx_polarity_flip_physical{133.0}=0x0 +phy_chain_tx_polarity_flip_physical{134.0}=0x0 +phy_chain_tx_polarity_flip_physical{135.0}=0x1 +phy_chain_tx_polarity_flip_physical{136.0}=0x1 + +phy_chain_tx_polarity_flip_physical{137.0}=0x1 +phy_chain_tx_polarity_flip_physical{138.0}=0x0 +phy_chain_tx_polarity_flip_physical{139.0}=0x1 +phy_chain_tx_polarity_flip_physical{140.0}=0x0 + +phy_chain_tx_polarity_flip_physical{141.0}=0x1 +phy_chain_tx_polarity_flip_physical{142.0}=0x0 +phy_chain_tx_polarity_flip_physical{143.0}=0x1 +phy_chain_tx_polarity_flip_physical{144.0}=0x1 + +phy_chain_tx_polarity_flip_physical{145.0}=0x1 +phy_chain_tx_polarity_flip_physical{146.0}=0x0 +phy_chain_tx_polarity_flip_physical{147.0}=0x0 +phy_chain_tx_polarity_flip_physical{148.0}=0x1 + +phy_chain_tx_polarity_flip_physical{149.0}=0x0 +phy_chain_tx_polarity_flip_physical{150.0}=0x1 +phy_chain_tx_polarity_flip_physical{151.0}=0x1 +phy_chain_tx_polarity_flip_physical{152.0}=0x1 + +phy_chain_tx_polarity_flip_physical{153.0}=0x0 +phy_chain_tx_polarity_flip_physical{154.0}=0x1 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x0 + +phy_chain_tx_polarity_flip_physical{157.0}=0x0 +phy_chain_tx_polarity_flip_physical{158.0}=0x0 +phy_chain_tx_polarity_flip_physical{159.0}=0x1 +phy_chain_tx_polarity_flip_physical{160.0}=0x0 + +phy_chain_tx_polarity_flip_physical{161.0}=0x1 +phy_chain_tx_polarity_flip_physical{162.0}=0x0 +phy_chain_tx_polarity_flip_physical{163.0}=0x0 +phy_chain_tx_polarity_flip_physical{164.0}=0x1 + +phy_chain_tx_polarity_flip_physical{165.0}=0x1 +phy_chain_tx_polarity_flip_physical{166.0}=0x0 +phy_chain_tx_polarity_flip_physical{167.0}=0x0 +phy_chain_tx_polarity_flip_physical{168.0}=0x0 + +phy_chain_tx_polarity_flip_physical{169.0}=0x0 +phy_chain_tx_polarity_flip_physical{170.0}=0x0 +phy_chain_tx_polarity_flip_physical{171.0}=0x0 +phy_chain_tx_polarity_flip_physical{172.0}=0x0 + +phy_chain_tx_polarity_flip_physical{173.0}=0x0 +phy_chain_tx_polarity_flip_physical{174.0}=0x1 +phy_chain_tx_polarity_flip_physical{175.0}=0x0 +phy_chain_tx_polarity_flip_physical{176.0}=0x1 + +phy_chain_tx_polarity_flip_physical{177.0}=0x0 +phy_chain_tx_polarity_flip_physical{178.0}=0x0 +phy_chain_tx_polarity_flip_physical{179.0}=0x0 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 + +phy_chain_tx_polarity_flip_physical{181.0}=0x1 +phy_chain_tx_polarity_flip_physical{182.0}=0x0 +phy_chain_tx_polarity_flip_physical{183.0}=0x0 +phy_chain_tx_polarity_flip_physical{184.0}=0x0 + +phy_chain_tx_polarity_flip_physical{185.0}=0x0 +phy_chain_tx_polarity_flip_physical{186.0}=0x0 +phy_chain_tx_polarity_flip_physical{187.0}=0x0 +phy_chain_tx_polarity_flip_physical{188.0}=0x0 + +phy_chain_tx_polarity_flip_physical{189.0}=0x1 +phy_chain_tx_polarity_flip_physical{190.0}=0x0 +phy_chain_tx_polarity_flip_physical{191.0}=0x1 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 + +# RX polarity +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 + +phy_chain_rx_polarity_flip_physical{133.0}=0x0 +phy_chain_rx_polarity_flip_physical{134.0}=0x1 +phy_chain_rx_polarity_flip_physical{135.0}=0x1 +phy_chain_rx_polarity_flip_physical{136.0}=0x0 + +phy_chain_rx_polarity_flip_physical{137.0}=0x1 +phy_chain_rx_polarity_flip_physical{138.0}=0x0 +phy_chain_rx_polarity_flip_physical{139.0}=0x1 +phy_chain_rx_polarity_flip_physical{140.0}=0x1 + +phy_chain_rx_polarity_flip_physical{141.0}=0x0 +phy_chain_rx_polarity_flip_physical{142.0}=0x0 +phy_chain_rx_polarity_flip_physical{143.0}=0x1 +phy_chain_rx_polarity_flip_physical{144.0}=0x1 + +phy_chain_rx_polarity_flip_physical{145.0}=0x0 +phy_chain_rx_polarity_flip_physical{146.0}=0x0 +phy_chain_rx_polarity_flip_physical{147.0}=0x1 +phy_chain_rx_polarity_flip_physical{148.0}=0x0 + +phy_chain_rx_polarity_flip_physical{149.0}=0x0 +phy_chain_rx_polarity_flip_physical{150.0}=0x1 +phy_chain_rx_polarity_flip_physical{151.0}=0x1 +phy_chain_rx_polarity_flip_physical{152.0}=0x0 + +phy_chain_rx_polarity_flip_physical{153.0}=0x0 +phy_chain_rx_polarity_flip_physical{154.0}=0x1 +phy_chain_rx_polarity_flip_physical{155.0}=0x0 +phy_chain_rx_polarity_flip_physical{156.0}=0x0 + +phy_chain_rx_polarity_flip_physical{157.0}=0x1 +phy_chain_rx_polarity_flip_physical{158.0}=0x1 +phy_chain_rx_polarity_flip_physical{159.0}=0x0 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 + +phy_chain_rx_polarity_flip_physical{161.0}=0x1 +phy_chain_rx_polarity_flip_physical{162.0}=0x1 +phy_chain_rx_polarity_flip_physical{163.0}=0x0 +phy_chain_rx_polarity_flip_physical{164.0}=0x1 + +phy_chain_rx_polarity_flip_physical{165.0}=0x0 +phy_chain_rx_polarity_flip_physical{166.0}=0x1 +phy_chain_rx_polarity_flip_physical{167.0}=0x1 +phy_chain_rx_polarity_flip_physical{168.0}=0x0 + +phy_chain_rx_polarity_flip_physical{169.0}=0x0 +phy_chain_rx_polarity_flip_physical{170.0}=0x1 +phy_chain_rx_polarity_flip_physical{171.0}=0x0 +phy_chain_rx_polarity_flip_physical{172.0}=0x1 + +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x1 +phy_chain_rx_polarity_flip_physical{175.0}=0x0 +phy_chain_rx_polarity_flip_physical{176.0}=0x0 + +phy_chain_rx_polarity_flip_physical{177.0}=0x1 +phy_chain_rx_polarity_flip_physical{178.0}=0x0 +phy_chain_rx_polarity_flip_physical{179.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x1 + +phy_chain_rx_polarity_flip_physical{181.0}=0x0 +phy_chain_rx_polarity_flip_physical{182.0}=0x1 +phy_chain_rx_polarity_flip_physical{183.0}=0x0 +phy_chain_rx_polarity_flip_physical{184.0}=0x1 + +phy_chain_rx_polarity_flip_physical{185.0}=0x1 +phy_chain_rx_polarity_flip_physical{186.0}=0x0 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x0 + +phy_chain_rx_polarity_flip_physical{189.0}=0x1 +phy_chain_rx_polarity_flip_physical{190.0}=0x1 +phy_chain_rx_polarity_flip_physical{191.0}=0x0 +phy_chain_rx_polarity_flip_physical{192.0}=0x0 + +# TX lane swap +phy_chain_tx_lane_map_physical{129.0}=0x0312 +phy_chain_tx_lane_map_physical{133.0}=0x3120 +phy_chain_tx_lane_map_physical{137.0}=0x1203 +phy_chain_tx_lane_map_physical{141.0}=0x0132 + +phy_chain_tx_lane_map_physical{145.0}=0x0312 +phy_chain_tx_lane_map_physical{149.0}=0x2310 +phy_chain_tx_lane_map_physical{153.0}=0x1032 +phy_chain_tx_lane_map_physical{157.0}=0x3120 + +phy_chain_tx_lane_map_physical{161.0}=0x1023 +phy_chain_tx_lane_map_physical{165.0}=0x1203 +phy_chain_tx_lane_map_physical{169.0}=0x0213 +phy_chain_tx_lane_map_physical{173.0}=0x0123 + +phy_chain_tx_lane_map_physical{177.0}=0x2031 +phy_chain_tx_lane_map_physical{181.0}=0x1203 +phy_chain_tx_lane_map_physical{185.0}=0x0213 +phy_chain_tx_lane_map_physical{189.0}=0x3210 + +# RX lane swap +phy_chain_rx_lane_map_physical{129.0}=0x0321 +phy_chain_rx_lane_map_physical{133.0}=0x0312 +phy_chain_rx_lane_map_physical{137.0}=0x2103 +phy_chain_rx_lane_map_physical{141.0}=0x0231 + +phy_chain_rx_lane_map_physical{145.0}=0x0321 +phy_chain_rx_lane_map_physical{149.0}=0x0312 +phy_chain_rx_lane_map_physical{153.0}=0x3120 +phy_chain_rx_lane_map_physical{157.0}=0x2103 + +phy_chain_rx_lane_map_physical{161.0}=0x1032 +phy_chain_rx_lane_map_physical{165.0}=0x2031 +phy_chain_rx_lane_map_physical{169.0}=0x0132 +phy_chain_rx_lane_map_physical{173.0}=0x2103 + +phy_chain_rx_lane_map_physical{177.0}=0x1032 +phy_chain_rx_lane_map_physical{181.0}=0x1230 +phy_chain_rx_lane_map_physical{185.0}=0x0321 +phy_chain_rx_lane_map_physical{189.0}=0x3201 + +# +# Tile-3 FC48~FC63 +# portmap_0=x:xx // cpu port (not required, but included for illustration purposes) +# +# port 100 is the second management port +portmap_100=259:10 +# port 101 is the third loopback port +#portmap_101=262:10 +portmap_102=193:40 +portmap_103=197:40 +portmap_104=201:40 +portmap_105=205:40 +portmap_106=209:40 +portmap_107=213:40 +portmap_108=217:40 +portmap_109=221:40 +portmap_110=225:40 +portmap_111=229:40 +portmap_112=233:40 +portmap_113=237:40 +portmap_114=241:40 +portmap_115=245:40 +portmap_116=249:40 +portmap_117=253:40 +# port 135 is the fourth loopback port +portmap_135=263:10 + +# TX polarity +phy_chain_tx_polarity_flip_physical{193.0}=0x0 +phy_chain_tx_polarity_flip_physical{194.0}=0x0 +phy_chain_tx_polarity_flip_physical{195.0}=0x0 +phy_chain_tx_polarity_flip_physical{196.0}=0x0 + +phy_chain_tx_polarity_flip_physical{197.0}=0x1 +phy_chain_tx_polarity_flip_physical{198.0}=0x0 +phy_chain_tx_polarity_flip_physical{199.0}=0x1 +phy_chain_tx_polarity_flip_physical{200.0}=0x0 + +phy_chain_tx_polarity_flip_physical{201.0}=0x0 +phy_chain_tx_polarity_flip_physical{202.0}=0x0 +phy_chain_tx_polarity_flip_physical{203.0}=0x0 +phy_chain_tx_polarity_flip_physical{204.0}=0x0 + +phy_chain_tx_polarity_flip_physical{205.0}=0x1 +phy_chain_tx_polarity_flip_physical{206.0}=0x0 +phy_chain_tx_polarity_flip_physical{207.0}=0x1 +phy_chain_tx_polarity_flip_physical{208.0}=0x0 + +phy_chain_tx_polarity_flip_physical{209.0}=0x1 +phy_chain_tx_polarity_flip_physical{210.0}=0x0 +phy_chain_tx_polarity_flip_physical{211.0}=0x0 +phy_chain_tx_polarity_flip_physical{212.0}=0x1 + +phy_chain_tx_polarity_flip_physical{213.0}=0x1 +phy_chain_tx_polarity_flip_physical{214.0}=0x0 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x0 + +phy_chain_tx_polarity_flip_physical{217.0}=0x0 +phy_chain_tx_polarity_flip_physical{218.0}=0x0 +phy_chain_tx_polarity_flip_physical{219.0}=0x0 +phy_chain_tx_polarity_flip_physical{220.0}=0x0 + +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x1 +phy_chain_tx_polarity_flip_physical{223.0}=0x1 +phy_chain_tx_polarity_flip_physical{224.0}=0x0 + +phy_chain_tx_polarity_flip_physical{225.0}=0x1 +phy_chain_tx_polarity_flip_physical{226.0}=0x1 +phy_chain_tx_polarity_flip_physical{227.0}=0x0 +phy_chain_tx_polarity_flip_physical{228.0}=0x0 + +phy_chain_tx_polarity_flip_physical{229.0}=0x1 +phy_chain_tx_polarity_flip_physical{230.0}=0x1 +phy_chain_tx_polarity_flip_physical{231.0}=0x1 +phy_chain_tx_polarity_flip_physical{232.0}=0x1 + +phy_chain_tx_polarity_flip_physical{233.0}=0x0 +phy_chain_tx_polarity_flip_physical{234.0}=0x0 +phy_chain_tx_polarity_flip_physical{235.0}=0x1 +phy_chain_tx_polarity_flip_physical{236.0}=0x1 + +phy_chain_tx_polarity_flip_physical{237.0}=0x1 +phy_chain_tx_polarity_flip_physical{238.0}=0x1 +phy_chain_tx_polarity_flip_physical{239.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x0 + +phy_chain_tx_polarity_flip_physical{241.0}=0x0 +phy_chain_tx_polarity_flip_physical{242.0}=0x1 +phy_chain_tx_polarity_flip_physical{243.0}=0x0 +phy_chain_tx_polarity_flip_physical{244.0}=0x0 + +phy_chain_tx_polarity_flip_physical{245.0}=0x1 +phy_chain_tx_polarity_flip_physical{246.0}=0x0 +phy_chain_tx_polarity_flip_physical{247.0}=0x0 +phy_chain_tx_polarity_flip_physical{248.0}=0x0 + +phy_chain_tx_polarity_flip_physical{249.0}=0x0 +phy_chain_tx_polarity_flip_physical{250.0}=0x0 +phy_chain_tx_polarity_flip_physical{251.0}=0x0 +phy_chain_tx_polarity_flip_physical{252.0}=0x0 + +phy_chain_tx_polarity_flip_physical{253.0}=0x1 +phy_chain_tx_polarity_flip_physical{254.0}=0x0 +phy_chain_tx_polarity_flip_physical{255.0}=0x0 +phy_chain_tx_polarity_flip_physical{256.0}=0x0 + +# RX polarity +phy_chain_rx_polarity_flip_physical{193.0}=0x1 +phy_chain_rx_polarity_flip_physical{194.0}=0x0 +phy_chain_rx_polarity_flip_physical{195.0}=0x0 +phy_chain_rx_polarity_flip_physical{196.0}=0x1 + +phy_chain_rx_polarity_flip_physical{197.0}=0x1 +phy_chain_rx_polarity_flip_physical{198.0}=0x1 +phy_chain_rx_polarity_flip_physical{199.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x1 + +phy_chain_rx_polarity_flip_physical{201.0}=0x1 +phy_chain_rx_polarity_flip_physical{202.0}=0x0 +phy_chain_rx_polarity_flip_physical{203.0}=0x1 +phy_chain_rx_polarity_flip_physical{204.0}=0x1 + +phy_chain_rx_polarity_flip_physical{205.0}=0x1 +phy_chain_rx_polarity_flip_physical{206.0}=0x1 +phy_chain_rx_polarity_flip_physical{207.0}=0x0 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 + +phy_chain_rx_polarity_flip_physical{209.0}=0x1 +phy_chain_rx_polarity_flip_physical{210.0}=0x1 +phy_chain_rx_polarity_flip_physical{211.0}=0x0 +phy_chain_rx_polarity_flip_physical{212.0}=0x1 + +phy_chain_rx_polarity_flip_physical{213.0}=0x0 +phy_chain_rx_polarity_flip_physical{214.0}=0x1 +phy_chain_rx_polarity_flip_physical{215.0}=0x1 +phy_chain_rx_polarity_flip_physical{216.0}=0x0 + +phy_chain_rx_polarity_flip_physical{217.0}=0x1 +phy_chain_rx_polarity_flip_physical{218.0}=0x0 +phy_chain_rx_polarity_flip_physical{219.0}=0x1 +phy_chain_rx_polarity_flip_physical{220.0}=0x1 + +phy_chain_rx_polarity_flip_physical{221.0}=0x1 +phy_chain_rx_polarity_flip_physical{222.0}=0x1 +phy_chain_rx_polarity_flip_physical{223.0}=0x0 +phy_chain_rx_polarity_flip_physical{224.0}=0x0 + +phy_chain_rx_polarity_flip_physical{225.0}=0x1 +phy_chain_rx_polarity_flip_physical{226.0}=0x1 +phy_chain_rx_polarity_flip_physical{227.0}=0x1 +phy_chain_rx_polarity_flip_physical{228.0}=0x0 + +phy_chain_rx_polarity_flip_physical{229.0}=0x1 +phy_chain_rx_polarity_flip_physical{230.0}=0x0 +phy_chain_rx_polarity_flip_physical{231.0}=0x0 +phy_chain_rx_polarity_flip_physical{232.0}=0x1 + +phy_chain_rx_polarity_flip_physical{233.0}=0x1 +phy_chain_rx_polarity_flip_physical{234.0}=0x1 +phy_chain_rx_polarity_flip_physical{235.0}=0x1 +phy_chain_rx_polarity_flip_physical{236.0}=0x0 + +phy_chain_rx_polarity_flip_physical{237.0}=0x0 +phy_chain_rx_polarity_flip_physical{238.0}=0x1 +phy_chain_rx_polarity_flip_physical{239.0}=0x0 +phy_chain_rx_polarity_flip_physical{240.0}=0x0 + +phy_chain_rx_polarity_flip_physical{241.0}=0x0 +phy_chain_rx_polarity_flip_physical{242.0}=0x1 +phy_chain_rx_polarity_flip_physical{243.0}=0x0 +phy_chain_rx_polarity_flip_physical{244.0}=0x1 + +phy_chain_rx_polarity_flip_physical{245.0}=0x1 +phy_chain_rx_polarity_flip_physical{246.0}=0x0 +phy_chain_rx_polarity_flip_physical{247.0}=0x0 +phy_chain_rx_polarity_flip_physical{248.0}=0x1 + +phy_chain_rx_polarity_flip_physical{249.0}=0x0 +phy_chain_rx_polarity_flip_physical{250.0}=0x0 +phy_chain_rx_polarity_flip_physical{251.0}=0x1 +phy_chain_rx_polarity_flip_physical{252.0}=0x0 + +phy_chain_rx_polarity_flip_physical{253.0}=0x1 +phy_chain_rx_polarity_flip_physical{254.0}=0x0 +phy_chain_rx_polarity_flip_physical{255.0}=0x0 +phy_chain_rx_polarity_flip_physical{256.0}=0x0 + +# TX lane swap +phy_chain_tx_lane_map_physical{193.0}=0x2031 +phy_chain_tx_lane_map_physical{197.0}=0x1203 +phy_chain_tx_lane_map_physical{201.0}=0x0213 +phy_chain_tx_lane_map_physical{205.0}=0x3210 + +phy_chain_tx_lane_map_physical{209.0}=0x1023 +phy_chain_tx_lane_map_physical{213.0}=0x1203 +phy_chain_tx_lane_map_physical{217.0}=0x0213 +phy_chain_tx_lane_map_physical{221.0}=0x3102 + +phy_chain_tx_lane_map_physical{225.0}=0x2031 +phy_chain_tx_lane_map_physical{229.0}=0x1023 +phy_chain_tx_lane_map_physical{233.0}=0x1320 +phy_chain_tx_lane_map_physical{237.0}=0x2013 + +phy_chain_tx_lane_map_physical{241.0}=0x1023 +phy_chain_tx_lane_map_physical{245.0}=0x1203 +phy_chain_tx_lane_map_physical{249.0}=0x3120 +phy_chain_tx_lane_map_physical{253.0}=0x3210 + +# RX lane swap +phy_chain_rx_lane_map_physical{193.0}=0x1032 +phy_chain_rx_lane_map_physical{197.0}=0x1230 +phy_chain_rx_lane_map_physical{201.0}=0x0321 +phy_chain_rx_lane_map_physical{205.0}=0x3201 + +phy_chain_rx_lane_map_physical{209.0}=0x3201 +phy_chain_rx_lane_map_physical{213.0}=0x2031 +phy_chain_rx_lane_map_physical{217.0}=0x0321 +phy_chain_rx_lane_map_physical{221.0}=0x3201 + +phy_chain_rx_lane_map_physical{225.0}=0x2103 +phy_chain_rx_lane_map_physical{229.0}=0x2310 +phy_chain_rx_lane_map_physical{233.0}=0x0213 +phy_chain_rx_lane_map_physical{237.0}=0x1032 + +phy_chain_rx_lane_map_physical{241.0}=0x0321 +phy_chain_rx_lane_map_physical{245.0}=0x2301 +phy_chain_rx_lane_map_physical{249.0}=0x2103 +phy_chain_rx_lane_map_physical{253.0}=0x2013 + +physical_ports=64 +logical_ports=136 +uplink_ports=2 +dport_map_port_66=65 +dport_map_port_100=66 + +module_64ports=1 + +mmu_init_config="MSFT-TH-Tier0" diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/th2-z9264f-64x40G-t1.config.bcm b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/th2-z9264f-64x40G-t1.config.bcm new file mode 100644 index 00000000000..8551d7b5b14 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/DellEMC-Z9264f-Q64/th2-z9264f-64x40G-t1.config.bcm @@ -0,0 +1,1007 @@ +#TH2 Z9264F 64x40G +os=unix +core_clock_frequency=1700 +dpp_clock_ratio=2:3 +pbmp_xport_xe=0x3FFFD0000FFFF40003FFFC0001FFFE +oversubscribe_mode=1 +fpem_mem_entries=65536 +l2xmsg_mode=1 + +l3_alpm_enable=2 +bcm_num_cos=8 +switch_bypass_mode=0 +mmu_lossless=0 +lpm_scaling_enable=0 +lpm_ipv6_128b_reserved=0 +ipv6_lpm_128b_enable=1 + +parity_correction=1 +parity_enable=1 + +dport_map_enable=1 + +dport_map_enable=1 +dport_map_port_13=1 +dport_map_port_14=2 +dport_map_port_34=3 +dport_map_port_35=4 +dport_map_port_38=5 +dport_map_port_39=6 +dport_map_port_42=7 +dport_map_port_43=8 +dport_map_port_1=9 +dport_map_port_2=10 +dport_map_port_5=11 +dport_map_port_6=12 +dport_map_port_9=13 +dport_map_port_10=14 +dport_map_port_46=15 +dport_map_port_47=16 + +dport_map_port_69=17 +dport_map_port_68=18 +dport_map_port_107=19 +dport_map_port_106=20 +dport_map_port_111=21 +dport_map_port_110=22 +dport_map_port_115=23 +dport_map_port_114=24 +dport_map_port_73=25 +dport_map_port_72=26 +dport_map_port_77=27 +dport_map_port_76=28 +dport_map_port_81=29 +dport_map_port_80=30 +dport_map_port_103=31 +dport_map_port_102=32 + +dport_map_port_16=33 +dport_map_port_15=34 +dport_map_port_37=35 +dport_map_port_36=36 +dport_map_port_41=37 +dport_map_port_40=38 +dport_map_port_45=39 +dport_map_port_44=40 +dport_map_port_4=41 +dport_map_port_3=42 +dport_map_port_8=43 +dport_map_port_7=44 +dport_map_port_12=45 +dport_map_port_11=46 +dport_map_port_49=47 +dport_map_port_48=48 + +dport_map_port_70=49 +dport_map_port_71=50 +dport_map_port_108=51 +dport_map_port_109=52 +dport_map_port_112=53 +dport_map_port_113=54 +dport_map_port_116=55 +dport_map_port_117=56 +dport_map_port_74=57 +dport_map_port_75=58 +dport_map_port_78=59 +dport_map_port_79=60 +dport_map_port_82=61 +dport_map_port_83=62 +dport_map_port_104=63 +dport_map_port_105=64 + +# +# Tile-0 FC0~FC15 +# +portmap_1=1:40 +portmap_2=5:40 +portmap_3=9:40 +portmap_4=13:40 +portmap_5=17:40 +portmap_6=21:40 +portmap_7=25:40 +portmap_8=29:40 +portmap_9=33:40 +portmap_10=37:40 +portmap_11=41:40 +portmap_12=45:40 +portmap_13=49:40 +portmap_14=53:40 +portmap_15=57:40 +portmap_16=61:40 + +# TX polarity +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 + +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 + +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 + +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 + +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 + +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 + +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 + +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x1 + +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 + +phy_chain_tx_polarity_flip_physical{37.0}=0x0 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_tx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x1 + +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 + +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 + +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 + +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 + +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 + +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 + +# RX polarity +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 + +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 + +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 + +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 + +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 + +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x1 + +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 + +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 + +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 + +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 + +phy_chain_rx_polarity_flip_physical{53.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 + +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 + +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 + +# TX lane swap +phy_chain_tx_lane_map_physical{1.0}=0x3120 +phy_chain_tx_lane_map_physical{5.0}=0x2130 +phy_chain_tx_lane_map_physical{9.0}=0x0213 +phy_chain_tx_lane_map_physical{13.0}=0x3021 + +phy_chain_tx_lane_map_physical{17.0}=0x3201 +phy_chain_tx_lane_map_physical{21.0}=0x3210 +phy_chain_tx_lane_map_physical{25.0}=0x1023 +phy_chain_tx_lane_map_physical{29.0}=0x0231 + +phy_chain_tx_lane_map_physical{33.0}=0x3210 +phy_chain_tx_lane_map_physical{37.0}=0x3120 +phy_chain_tx_lane_map_physical{41.0}=0x2031 +phy_chain_tx_lane_map_physical{45.0}=0x2130 + +phy_chain_tx_lane_map_physical{49.0}=0x2130 +phy_chain_tx_lane_map_physical{53.0}=0x3012 +phy_chain_tx_lane_map_physical{57.0}=0x2031 +phy_chain_tx_lane_map_physical{61.0}=0x0231 + +# RX lane swap +phy_chain_rx_lane_map_physical{1.0}=0x1320 +phy_chain_rx_lane_map_physical{5.0}=0x0213 +phy_chain_rx_lane_map_physical{9.0}=0x2301 +phy_chain_rx_lane_map_physical{13.0}=0x0321 + +phy_chain_rx_lane_map_physical{17.0}=0x2031 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_rx_lane_map_physical{25.0}=0x2310 +phy_chain_rx_lane_map_physical{29.0}=0x2013 + +phy_chain_rx_lane_map_physical{33.0}=0x2103 +phy_chain_rx_lane_map_physical{37.0}=0x0132 +phy_chain_rx_lane_map_physical{41.0}=0x2031 +phy_chain_rx_lane_map_physical{45.0}=0x1032 + +phy_chain_rx_lane_map_physical{49.0}=0x3201 +phy_chain_rx_lane_map_physical{53.0}=0x0132 +phy_chain_rx_lane_map_physical{57.0}=0x2031 +phy_chain_rx_lane_map_physical{61.0}=0x1032 + +# +# Tile-1 FC16~FC31 +# +portmap_34=65:40 +portmap_35=69:40 +portmap_36=73:40 +portmap_37=77:40 +portmap_38=81:40 +portmap_39=85:40 +portmap_40=89:40 +portmap_41=93:40 +portmap_42=97:40 +portmap_43=101:40 +portmap_44=105:40 +portmap_45=109:40 +portmap_46=113:40 +portmap_47=117:40 +portmap_48=121:40 +portmap_49=125:40 + +#TX polarity +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 + +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 + +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_tx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 + +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 + +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x1 +phy_chain_tx_polarity_flip_physical{83.0}=0x0 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 + +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 + +phy_chain_tx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x1 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 + +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 + +phy_chain_tx_polarity_flip_physical{97.0}=0x0 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 + +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 + +phy_chain_tx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 + +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{110.0}=0x1 +phy_chain_tx_polarity_flip_physical{111.0}=0x0 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 + +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 + +phy_chain_tx_polarity_flip_physical{117.0}=0x0 +phy_chain_tx_polarity_flip_physical{118.0}=0x1 +phy_chain_tx_polarity_flip_physical{119.0}=0x0 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 + +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 + +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 + +#RX polarity +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 + +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 + +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 + +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 + +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{83.0}=0x0 +phy_chain_rx_polarity_flip_physical{84.0}=0x1 + +phy_chain_rx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 + +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{92.0}=0x0 + +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 + +phy_chain_rx_polarity_flip_physical{97.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 + +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{104.0}=0x1 + +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 + +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{112.0}=0x1 + +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 + +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 + +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 + +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +# TX lane swap +phy_chain_tx_lane_map_physical{65.0}=0x2130 +phy_chain_tx_lane_map_physical{69.0}=0x3012 +phy_chain_tx_lane_map_physical{73.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x0231 + +phy_chain_tx_lane_map_physical{81.0}=0x2130 +phy_chain_tx_lane_map_physical{85.0}=0x1032 +phy_chain_tx_lane_map_physical{89.0}=0x2031 +phy_chain_tx_lane_map_physical{93.0}=0x0231 + +phy_chain_tx_lane_map_physical{97.0}=0x0123 +phy_chain_tx_lane_map_physical{101.0}=0x1320 +phy_chain_tx_lane_map_physical{105.0}=0x2301 +phy_chain_tx_lane_map_physical{109.0}=0x0213 + +phy_chain_tx_lane_map_physical{113.0}=0x0123 +phy_chain_tx_lane_map_physical{117.0}=0x1023 +phy_chain_tx_lane_map_physical{121.0}=0x2130 +phy_chain_tx_lane_map_physical{125.0}=0x1302 + +# RX lane swap +phy_chain_rx_lane_map_physical{65.0}=0x2103 +phy_chain_rx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{73.0}=0x2031 +phy_chain_rx_lane_map_physical{77.0}=0x1032 + +phy_chain_rx_lane_map_physical{81.0}=0x2103 +phy_chain_rx_lane_map_physical{85.0}=0x3210 +phy_chain_rx_lane_map_physical{89.0}=0x2031 +phy_chain_rx_lane_map_physical{93.0}=0x1032 + +phy_chain_rx_lane_map_physical{97.0}=0x1023 +phy_chain_rx_lane_map_physical{101.0}=0x3120 +phy_chain_rx_lane_map_physical{105.0}=0x1023 +phy_chain_rx_lane_map_physical{109.0}=0x0231 + +phy_chain_rx_lane_map_physical{113.0}=0x1320 +phy_chain_rx_lane_map_physical{117.0}=0x3102 +phy_chain_rx_lane_map_physical{121.0}=0x0213 +phy_chain_rx_lane_map_physical{125.0}=0x0231 + +# +# Tile-2 FC32~FC47 +# +# port 66 is the first management port +portmap_66=257:10 +# port 67 is the second loopback port +#portmap_67=261:10 +portmap_68=129:40 +portmap_69=133:40 +portmap_70=137:40 +portmap_71=141:40 +portmap_72=145:40 +portmap_73=149:40 +portmap_74=153:40 +portmap_75=157:40 +portmap_76=161:40 +portmap_77=165:40 +portmap_78=169:40 +portmap_79=173:40 +portmap_80=177:40 +portmap_81=181:40 +portmap_82=185:40 +portmap_83=189:40 + +# TX polarity +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x1 + +phy_chain_tx_polarity_flip_physical{133.0}=0x0 +phy_chain_tx_polarity_flip_physical{134.0}=0x0 +phy_chain_tx_polarity_flip_physical{135.0}=0x1 +phy_chain_tx_polarity_flip_physical{136.0}=0x1 + +phy_chain_tx_polarity_flip_physical{137.0}=0x1 +phy_chain_tx_polarity_flip_physical{138.0}=0x0 +phy_chain_tx_polarity_flip_physical{139.0}=0x1 +phy_chain_tx_polarity_flip_physical{140.0}=0x0 + +phy_chain_tx_polarity_flip_physical{141.0}=0x1 +phy_chain_tx_polarity_flip_physical{142.0}=0x0 +phy_chain_tx_polarity_flip_physical{143.0}=0x1 +phy_chain_tx_polarity_flip_physical{144.0}=0x1 + +phy_chain_tx_polarity_flip_physical{145.0}=0x1 +phy_chain_tx_polarity_flip_physical{146.0}=0x0 +phy_chain_tx_polarity_flip_physical{147.0}=0x0 +phy_chain_tx_polarity_flip_physical{148.0}=0x1 + +phy_chain_tx_polarity_flip_physical{149.0}=0x0 +phy_chain_tx_polarity_flip_physical{150.0}=0x1 +phy_chain_tx_polarity_flip_physical{151.0}=0x1 +phy_chain_tx_polarity_flip_physical{152.0}=0x1 + +phy_chain_tx_polarity_flip_physical{153.0}=0x0 +phy_chain_tx_polarity_flip_physical{154.0}=0x1 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x0 + +phy_chain_tx_polarity_flip_physical{157.0}=0x0 +phy_chain_tx_polarity_flip_physical{158.0}=0x0 +phy_chain_tx_polarity_flip_physical{159.0}=0x1 +phy_chain_tx_polarity_flip_physical{160.0}=0x0 + +phy_chain_tx_polarity_flip_physical{161.0}=0x1 +phy_chain_tx_polarity_flip_physical{162.0}=0x0 +phy_chain_tx_polarity_flip_physical{163.0}=0x0 +phy_chain_tx_polarity_flip_physical{164.0}=0x1 + +phy_chain_tx_polarity_flip_physical{165.0}=0x1 +phy_chain_tx_polarity_flip_physical{166.0}=0x0 +phy_chain_tx_polarity_flip_physical{167.0}=0x0 +phy_chain_tx_polarity_flip_physical{168.0}=0x0 + +phy_chain_tx_polarity_flip_physical{169.0}=0x0 +phy_chain_tx_polarity_flip_physical{170.0}=0x0 +phy_chain_tx_polarity_flip_physical{171.0}=0x0 +phy_chain_tx_polarity_flip_physical{172.0}=0x0 + +phy_chain_tx_polarity_flip_physical{173.0}=0x0 +phy_chain_tx_polarity_flip_physical{174.0}=0x1 +phy_chain_tx_polarity_flip_physical{175.0}=0x0 +phy_chain_tx_polarity_flip_physical{176.0}=0x1 + +phy_chain_tx_polarity_flip_physical{177.0}=0x0 +phy_chain_tx_polarity_flip_physical{178.0}=0x0 +phy_chain_tx_polarity_flip_physical{179.0}=0x0 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 + +phy_chain_tx_polarity_flip_physical{181.0}=0x1 +phy_chain_tx_polarity_flip_physical{182.0}=0x0 +phy_chain_tx_polarity_flip_physical{183.0}=0x0 +phy_chain_tx_polarity_flip_physical{184.0}=0x0 + +phy_chain_tx_polarity_flip_physical{185.0}=0x0 +phy_chain_tx_polarity_flip_physical{186.0}=0x0 +phy_chain_tx_polarity_flip_physical{187.0}=0x0 +phy_chain_tx_polarity_flip_physical{188.0}=0x0 + +phy_chain_tx_polarity_flip_physical{189.0}=0x1 +phy_chain_tx_polarity_flip_physical{190.0}=0x0 +phy_chain_tx_polarity_flip_physical{191.0}=0x1 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 + +# RX polarity +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 + +phy_chain_rx_polarity_flip_physical{133.0}=0x0 +phy_chain_rx_polarity_flip_physical{134.0}=0x1 +phy_chain_rx_polarity_flip_physical{135.0}=0x1 +phy_chain_rx_polarity_flip_physical{136.0}=0x0 + +phy_chain_rx_polarity_flip_physical{137.0}=0x1 +phy_chain_rx_polarity_flip_physical{138.0}=0x0 +phy_chain_rx_polarity_flip_physical{139.0}=0x1 +phy_chain_rx_polarity_flip_physical{140.0}=0x1 + +phy_chain_rx_polarity_flip_physical{141.0}=0x0 +phy_chain_rx_polarity_flip_physical{142.0}=0x0 +phy_chain_rx_polarity_flip_physical{143.0}=0x1 +phy_chain_rx_polarity_flip_physical{144.0}=0x1 + +phy_chain_rx_polarity_flip_physical{145.0}=0x0 +phy_chain_rx_polarity_flip_physical{146.0}=0x0 +phy_chain_rx_polarity_flip_physical{147.0}=0x1 +phy_chain_rx_polarity_flip_physical{148.0}=0x0 + +phy_chain_rx_polarity_flip_physical{149.0}=0x0 +phy_chain_rx_polarity_flip_physical{150.0}=0x1 +phy_chain_rx_polarity_flip_physical{151.0}=0x1 +phy_chain_rx_polarity_flip_physical{152.0}=0x0 + +phy_chain_rx_polarity_flip_physical{153.0}=0x0 +phy_chain_rx_polarity_flip_physical{154.0}=0x1 +phy_chain_rx_polarity_flip_physical{155.0}=0x0 +phy_chain_rx_polarity_flip_physical{156.0}=0x0 + +phy_chain_rx_polarity_flip_physical{157.0}=0x1 +phy_chain_rx_polarity_flip_physical{158.0}=0x1 +phy_chain_rx_polarity_flip_physical{159.0}=0x0 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 + +phy_chain_rx_polarity_flip_physical{161.0}=0x1 +phy_chain_rx_polarity_flip_physical{162.0}=0x1 +phy_chain_rx_polarity_flip_physical{163.0}=0x0 +phy_chain_rx_polarity_flip_physical{164.0}=0x1 + +phy_chain_rx_polarity_flip_physical{165.0}=0x0 +phy_chain_rx_polarity_flip_physical{166.0}=0x1 +phy_chain_rx_polarity_flip_physical{167.0}=0x1 +phy_chain_rx_polarity_flip_physical{168.0}=0x0 + +phy_chain_rx_polarity_flip_physical{169.0}=0x0 +phy_chain_rx_polarity_flip_physical{170.0}=0x1 +phy_chain_rx_polarity_flip_physical{171.0}=0x0 +phy_chain_rx_polarity_flip_physical{172.0}=0x1 + +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x1 +phy_chain_rx_polarity_flip_physical{175.0}=0x0 +phy_chain_rx_polarity_flip_physical{176.0}=0x0 + +phy_chain_rx_polarity_flip_physical{177.0}=0x1 +phy_chain_rx_polarity_flip_physical{178.0}=0x0 +phy_chain_rx_polarity_flip_physical{179.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x1 + +phy_chain_rx_polarity_flip_physical{181.0}=0x0 +phy_chain_rx_polarity_flip_physical{182.0}=0x1 +phy_chain_rx_polarity_flip_physical{183.0}=0x0 +phy_chain_rx_polarity_flip_physical{184.0}=0x1 + +phy_chain_rx_polarity_flip_physical{185.0}=0x1 +phy_chain_rx_polarity_flip_physical{186.0}=0x0 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x0 + +phy_chain_rx_polarity_flip_physical{189.0}=0x1 +phy_chain_rx_polarity_flip_physical{190.0}=0x1 +phy_chain_rx_polarity_flip_physical{191.0}=0x0 +phy_chain_rx_polarity_flip_physical{192.0}=0x0 + +# TX lane swap +phy_chain_tx_lane_map_physical{129.0}=0x0312 +phy_chain_tx_lane_map_physical{133.0}=0x3120 +phy_chain_tx_lane_map_physical{137.0}=0x1203 +phy_chain_tx_lane_map_physical{141.0}=0x0132 + +phy_chain_tx_lane_map_physical{145.0}=0x0312 +phy_chain_tx_lane_map_physical{149.0}=0x2310 +phy_chain_tx_lane_map_physical{153.0}=0x1032 +phy_chain_tx_lane_map_physical{157.0}=0x3120 + +phy_chain_tx_lane_map_physical{161.0}=0x1023 +phy_chain_tx_lane_map_physical{165.0}=0x1203 +phy_chain_tx_lane_map_physical{169.0}=0x0213 +phy_chain_tx_lane_map_physical{173.0}=0x0123 + +phy_chain_tx_lane_map_physical{177.0}=0x2031 +phy_chain_tx_lane_map_physical{181.0}=0x1203 +phy_chain_tx_lane_map_physical{185.0}=0x0213 +phy_chain_tx_lane_map_physical{189.0}=0x3210 + +# RX lane swap +phy_chain_rx_lane_map_physical{129.0}=0x0321 +phy_chain_rx_lane_map_physical{133.0}=0x0312 +phy_chain_rx_lane_map_physical{137.0}=0x2103 +phy_chain_rx_lane_map_physical{141.0}=0x0231 + +phy_chain_rx_lane_map_physical{145.0}=0x0321 +phy_chain_rx_lane_map_physical{149.0}=0x0312 +phy_chain_rx_lane_map_physical{153.0}=0x3120 +phy_chain_rx_lane_map_physical{157.0}=0x2103 + +phy_chain_rx_lane_map_physical{161.0}=0x1032 +phy_chain_rx_lane_map_physical{165.0}=0x2031 +phy_chain_rx_lane_map_physical{169.0}=0x0132 +phy_chain_rx_lane_map_physical{173.0}=0x2103 + +phy_chain_rx_lane_map_physical{177.0}=0x1032 +phy_chain_rx_lane_map_physical{181.0}=0x1230 +phy_chain_rx_lane_map_physical{185.0}=0x0321 +phy_chain_rx_lane_map_physical{189.0}=0x3201 + +# +# Tile-3 FC48~FC63 +# portmap_0=x:xx // cpu port (not required, but included for illustration purposes) +# +# port 100 is the second management port +portmap_100=259:10 +# port 101 is the third loopback port +#portmap_101=262:10 +portmap_102=193:40 +portmap_103=197:40 +portmap_104=201:40 +portmap_105=205:40 +portmap_106=209:40 +portmap_107=213:40 +portmap_108=217:40 +portmap_109=221:40 +portmap_110=225:40 +portmap_111=229:40 +portmap_112=233:40 +portmap_113=237:40 +portmap_114=241:40 +portmap_115=245:40 +portmap_116=249:40 +portmap_117=253:40 +# port 135 is the fourth loopback port +portmap_135=263:10 + +# TX polarity +phy_chain_tx_polarity_flip_physical{193.0}=0x0 +phy_chain_tx_polarity_flip_physical{194.0}=0x0 +phy_chain_tx_polarity_flip_physical{195.0}=0x0 +phy_chain_tx_polarity_flip_physical{196.0}=0x0 + +phy_chain_tx_polarity_flip_physical{197.0}=0x1 +phy_chain_tx_polarity_flip_physical{198.0}=0x0 +phy_chain_tx_polarity_flip_physical{199.0}=0x1 +phy_chain_tx_polarity_flip_physical{200.0}=0x0 + +phy_chain_tx_polarity_flip_physical{201.0}=0x0 +phy_chain_tx_polarity_flip_physical{202.0}=0x0 +phy_chain_tx_polarity_flip_physical{203.0}=0x0 +phy_chain_tx_polarity_flip_physical{204.0}=0x0 + +phy_chain_tx_polarity_flip_physical{205.0}=0x1 +phy_chain_tx_polarity_flip_physical{206.0}=0x0 +phy_chain_tx_polarity_flip_physical{207.0}=0x1 +phy_chain_tx_polarity_flip_physical{208.0}=0x0 + +phy_chain_tx_polarity_flip_physical{209.0}=0x1 +phy_chain_tx_polarity_flip_physical{210.0}=0x0 +phy_chain_tx_polarity_flip_physical{211.0}=0x0 +phy_chain_tx_polarity_flip_physical{212.0}=0x1 + +phy_chain_tx_polarity_flip_physical{213.0}=0x1 +phy_chain_tx_polarity_flip_physical{214.0}=0x0 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x0 + +phy_chain_tx_polarity_flip_physical{217.0}=0x0 +phy_chain_tx_polarity_flip_physical{218.0}=0x0 +phy_chain_tx_polarity_flip_physical{219.0}=0x0 +phy_chain_tx_polarity_flip_physical{220.0}=0x0 + +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x1 +phy_chain_tx_polarity_flip_physical{223.0}=0x1 +phy_chain_tx_polarity_flip_physical{224.0}=0x0 + +phy_chain_tx_polarity_flip_physical{225.0}=0x1 +phy_chain_tx_polarity_flip_physical{226.0}=0x1 +phy_chain_tx_polarity_flip_physical{227.0}=0x0 +phy_chain_tx_polarity_flip_physical{228.0}=0x0 + +phy_chain_tx_polarity_flip_physical{229.0}=0x1 +phy_chain_tx_polarity_flip_physical{230.0}=0x1 +phy_chain_tx_polarity_flip_physical{231.0}=0x1 +phy_chain_tx_polarity_flip_physical{232.0}=0x1 + +phy_chain_tx_polarity_flip_physical{233.0}=0x0 +phy_chain_tx_polarity_flip_physical{234.0}=0x0 +phy_chain_tx_polarity_flip_physical{235.0}=0x1 +phy_chain_tx_polarity_flip_physical{236.0}=0x1 + +phy_chain_tx_polarity_flip_physical{237.0}=0x1 +phy_chain_tx_polarity_flip_physical{238.0}=0x1 +phy_chain_tx_polarity_flip_physical{239.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x0 + +phy_chain_tx_polarity_flip_physical{241.0}=0x0 +phy_chain_tx_polarity_flip_physical{242.0}=0x1 +phy_chain_tx_polarity_flip_physical{243.0}=0x0 +phy_chain_tx_polarity_flip_physical{244.0}=0x0 + +phy_chain_tx_polarity_flip_physical{245.0}=0x1 +phy_chain_tx_polarity_flip_physical{246.0}=0x0 +phy_chain_tx_polarity_flip_physical{247.0}=0x0 +phy_chain_tx_polarity_flip_physical{248.0}=0x0 + +phy_chain_tx_polarity_flip_physical{249.0}=0x0 +phy_chain_tx_polarity_flip_physical{250.0}=0x0 +phy_chain_tx_polarity_flip_physical{251.0}=0x0 +phy_chain_tx_polarity_flip_physical{252.0}=0x0 + +phy_chain_tx_polarity_flip_physical{253.0}=0x1 +phy_chain_tx_polarity_flip_physical{254.0}=0x0 +phy_chain_tx_polarity_flip_physical{255.0}=0x0 +phy_chain_tx_polarity_flip_physical{256.0}=0x0 + +# RX polarity +phy_chain_rx_polarity_flip_physical{193.0}=0x1 +phy_chain_rx_polarity_flip_physical{194.0}=0x0 +phy_chain_rx_polarity_flip_physical{195.0}=0x0 +phy_chain_rx_polarity_flip_physical{196.0}=0x1 + +phy_chain_rx_polarity_flip_physical{197.0}=0x1 +phy_chain_rx_polarity_flip_physical{198.0}=0x1 +phy_chain_rx_polarity_flip_physical{199.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x1 + +phy_chain_rx_polarity_flip_physical{201.0}=0x1 +phy_chain_rx_polarity_flip_physical{202.0}=0x0 +phy_chain_rx_polarity_flip_physical{203.0}=0x1 +phy_chain_rx_polarity_flip_physical{204.0}=0x1 + +phy_chain_rx_polarity_flip_physical{205.0}=0x1 +phy_chain_rx_polarity_flip_physical{206.0}=0x1 +phy_chain_rx_polarity_flip_physical{207.0}=0x0 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 + +phy_chain_rx_polarity_flip_physical{209.0}=0x1 +phy_chain_rx_polarity_flip_physical{210.0}=0x1 +phy_chain_rx_polarity_flip_physical{211.0}=0x0 +phy_chain_rx_polarity_flip_physical{212.0}=0x1 + +phy_chain_rx_polarity_flip_physical{213.0}=0x0 +phy_chain_rx_polarity_flip_physical{214.0}=0x1 +phy_chain_rx_polarity_flip_physical{215.0}=0x1 +phy_chain_rx_polarity_flip_physical{216.0}=0x0 + +phy_chain_rx_polarity_flip_physical{217.0}=0x1 +phy_chain_rx_polarity_flip_physical{218.0}=0x0 +phy_chain_rx_polarity_flip_physical{219.0}=0x1 +phy_chain_rx_polarity_flip_physical{220.0}=0x1 + +phy_chain_rx_polarity_flip_physical{221.0}=0x1 +phy_chain_rx_polarity_flip_physical{222.0}=0x1 +phy_chain_rx_polarity_flip_physical{223.0}=0x0 +phy_chain_rx_polarity_flip_physical{224.0}=0x0 + +phy_chain_rx_polarity_flip_physical{225.0}=0x1 +phy_chain_rx_polarity_flip_physical{226.0}=0x1 +phy_chain_rx_polarity_flip_physical{227.0}=0x1 +phy_chain_rx_polarity_flip_physical{228.0}=0x0 + +phy_chain_rx_polarity_flip_physical{229.0}=0x1 +phy_chain_rx_polarity_flip_physical{230.0}=0x0 +phy_chain_rx_polarity_flip_physical{231.0}=0x0 +phy_chain_rx_polarity_flip_physical{232.0}=0x1 + +phy_chain_rx_polarity_flip_physical{233.0}=0x1 +phy_chain_rx_polarity_flip_physical{234.0}=0x1 +phy_chain_rx_polarity_flip_physical{235.0}=0x1 +phy_chain_rx_polarity_flip_physical{236.0}=0x0 + +phy_chain_rx_polarity_flip_physical{237.0}=0x0 +phy_chain_rx_polarity_flip_physical{238.0}=0x1 +phy_chain_rx_polarity_flip_physical{239.0}=0x0 +phy_chain_rx_polarity_flip_physical{240.0}=0x0 + +phy_chain_rx_polarity_flip_physical{241.0}=0x0 +phy_chain_rx_polarity_flip_physical{242.0}=0x1 +phy_chain_rx_polarity_flip_physical{243.0}=0x0 +phy_chain_rx_polarity_flip_physical{244.0}=0x1 + +phy_chain_rx_polarity_flip_physical{245.0}=0x1 +phy_chain_rx_polarity_flip_physical{246.0}=0x0 +phy_chain_rx_polarity_flip_physical{247.0}=0x0 +phy_chain_rx_polarity_flip_physical{248.0}=0x1 + +phy_chain_rx_polarity_flip_physical{249.0}=0x0 +phy_chain_rx_polarity_flip_physical{250.0}=0x0 +phy_chain_rx_polarity_flip_physical{251.0}=0x1 +phy_chain_rx_polarity_flip_physical{252.0}=0x0 + +phy_chain_rx_polarity_flip_physical{253.0}=0x1 +phy_chain_rx_polarity_flip_physical{254.0}=0x0 +phy_chain_rx_polarity_flip_physical{255.0}=0x0 +phy_chain_rx_polarity_flip_physical{256.0}=0x0 + +# TX lane swap +phy_chain_tx_lane_map_physical{193.0}=0x2031 +phy_chain_tx_lane_map_physical{197.0}=0x1203 +phy_chain_tx_lane_map_physical{201.0}=0x0213 +phy_chain_tx_lane_map_physical{205.0}=0x3210 + +phy_chain_tx_lane_map_physical{209.0}=0x1023 +phy_chain_tx_lane_map_physical{213.0}=0x1203 +phy_chain_tx_lane_map_physical{217.0}=0x0213 +phy_chain_tx_lane_map_physical{221.0}=0x3102 + +phy_chain_tx_lane_map_physical{225.0}=0x2031 +phy_chain_tx_lane_map_physical{229.0}=0x1023 +phy_chain_tx_lane_map_physical{233.0}=0x1320 +phy_chain_tx_lane_map_physical{237.0}=0x2013 + +phy_chain_tx_lane_map_physical{241.0}=0x1023 +phy_chain_tx_lane_map_physical{245.0}=0x1203 +phy_chain_tx_lane_map_physical{249.0}=0x3120 +phy_chain_tx_lane_map_physical{253.0}=0x3210 + +# RX lane swap +phy_chain_rx_lane_map_physical{193.0}=0x1032 +phy_chain_rx_lane_map_physical{197.0}=0x1230 +phy_chain_rx_lane_map_physical{201.0}=0x0321 +phy_chain_rx_lane_map_physical{205.0}=0x3201 + +phy_chain_rx_lane_map_physical{209.0}=0x3201 +phy_chain_rx_lane_map_physical{213.0}=0x2031 +phy_chain_rx_lane_map_physical{217.0}=0x0321 +phy_chain_rx_lane_map_physical{221.0}=0x3201 + +phy_chain_rx_lane_map_physical{225.0}=0x2103 +phy_chain_rx_lane_map_physical{229.0}=0x2310 +phy_chain_rx_lane_map_physical{233.0}=0x0213 +phy_chain_rx_lane_map_physical{237.0}=0x1032 + +phy_chain_rx_lane_map_physical{241.0}=0x0321 +phy_chain_rx_lane_map_physical{245.0}=0x2301 +phy_chain_rx_lane_map_physical{249.0}=0x2103 +phy_chain_rx_lane_map_physical{253.0}=0x2013 + +physical_ports=64 +logical_ports=136 +uplink_ports=2 +dport_map_port_66=65 +dport_map_port_100=66 + +module_64ports=1 + +mmu_init_config="MSFT-TH-Tier1" diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/default_sku b/device/dell/x86_64-dellemc_z9264f_c3538-r0/default_sku new file mode 100644 index 00000000000..e110b267e20 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/default_sku @@ -0,0 +1 @@ +DellEMC-Z9264f-C64 t1 diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/installer.conf b/device/dell/x86_64-dellemc_z9264f_c3538-r0/installer.conf new file mode 100644 index 00000000000..924e0fb8196 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/installer.conf @@ -0,0 +1,2 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/led_proc_init.soc b/device/dell/x86_64-dellemc_z9264f_c3538-r0/led_proc_init.soc new file mode 100644 index 00000000000..d38282b6508 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/led_proc_init.soc @@ -0,0 +1,111 @@ +# LED microprocessor initialization for DellEMC-Z9264f + +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=32 REMAP_PORT_2=33 REMAP_PORT_1=34 REMAP_PORT_0=35 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=36 REMAP_PORT_6=37 REMAP_PORT_5=38 REMAP_PORT_4=39 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=4 REMAP_PORT_10=5 REMAP_PORT_9=6 REMAP_PORT_8=7 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=0 REMAP_PORT_14=1 REMAP_PORT_13=2 REMAP_PORT_12=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=56 REMAP_PORT_18=57 REMAP_PORT_17=58 REMAP_PORT_16=59 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=60 REMAP_PORT_22=61 REMAP_PORT_21=62 REMAP_PORT_20=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=28 REMAP_PORT_26=29 REMAP_PORT_25=30 REMAP_PORT_24=31 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=24 REMAP_PORT_30=25 REMAP_PORT_29=26 REMAP_PORT_28=27 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=48 REMAP_PORT_34=49 REMAP_PORT_33=50 REMAP_PORT_32=51 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=52 REMAP_PORT_38=53 REMAP_PORT_37=54 REMAP_PORT_36=55 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=20 REMAP_PORT_42=21 REMAP_PORT_41=22 REMAP_PORT_40=23 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=16 REMAP_PORT_46=17 REMAP_PORT_45=18 REMAP_PORT_44=19 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=40 REMAP_PORT_50=41 REMAP_PORT_49=42 REMAP_PORT_48=43 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=44 REMAP_PORT_54=45 REMAP_PORT_53=46 REMAP_PORT_52=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=12 REMAP_PORT_58=13 REMAP_PORT_57=14 REMAP_PORT_56=15 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=8 REMAP_PORT_62=9 REMAP_PORT_61=10 REMAP_PORT_60=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0 REMAP_PORT_2=1 REMAP_PORT_1=2 REMAP_PORT_0=3 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=4 REMAP_PORT_6=5 REMAP_PORT_5=6 REMAP_PORT_4=7 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=38 REMAP_PORT_8=39 REMAP_PORT_11=36 REMAP_PORT_10=37 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=32 REMAP_PORT_14=33 REMAP_PORT_13=34 REMAP_PORT_12=35 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=8 REMAP_PORT_18=9 REMAP_PORT_17=10 REMAP_PORT_16=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=12 REMAP_PORT_22=13 REMAP_PORT_21=14 REMAP_PORT_20=15 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=44 REMAP_PORT_26=45 REMAP_PORT_25=46 REMAP_PORT_24=47 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=40 REMAP_PORT_30=41 REMAP_PORT_29=42 REMAP_PORT_28=43 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=16 REMAP_PORT_34=17 REMAP_PORT_33=18 REMAP_PORT_32=19 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=20 REMAP_PORT_38=21 REMAP_PORT_37=22 REMAP_PORT_36=23 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=52 REMAP_PORT_42=53 REMAP_PORT_41=54 REMAP_PORT_40=55 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=48 REMAP_PORT_46=49 REMAP_PORT_45=50 REMAP_PORT_44=51 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=24 REMAP_PORT_50=25 REMAP_PORT_49=26 REMAP_PORT_48=27 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=28 REMAP_PORT_54=29 REMAP_PORT_53=30 REMAP_PORT_52=31 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=60 REMAP_PORT_58=61 REMAP_PORT_57=62 REMAP_PORT_56=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=56 REMAP_PORT_62=57 REMAP_PORT_61=58 REMAP_PORT_60=59 +m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=60 REMAP_PORT_2=61 REMAP_PORT_1=62 REMAP_PORT_0=63 +m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=56 REMAP_PORT_6=57 REMAP_PORT_5=58 REMAP_PORT_4=59 +m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=24 REMAP_PORT_10=25 REMAP_PORT_9=26 REMAP_PORT_8=27 +m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=28 REMAP_PORT_14=29 REMAP_PORT_13=30 REMAP_PORT_12=31 +m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=52 REMAP_PORT_18=53 REMAP_PORT_17=54 REMAP_PORT_16=55 +m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=48 REMAP_PORT_22=49 REMAP_PORT_21=50 REMAP_PORT_20=51 +m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=16 REMAP_PORT_26=17 REMAP_PORT_25=18 REMAP_PORT_24=19 +m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=20 REMAP_PORT_30=21 REMAP_PORT_29=22 REMAP_PORT_28=23 +m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=44 REMAP_PORT_34=45 REMAP_PORT_33=46 REMAP_PORT_32=47 +m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=40 REMAP_PORT_38=41 REMAP_PORT_37=42 REMAP_PORT_36=43 +m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=8 REMAP_PORT_42=9 REMAP_PORT_41=10 REMAP_PORT_40=11 +m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=12 REMAP_PORT_46=13 REMAP_PORT_45=14 REMAP_PORT_44=15 +m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=36 REMAP_PORT_50=37 REMAP_PORT_49=38 REMAP_PORT_48=39 +m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=32 REMAP_PORT_54=33 REMAP_PORT_53=34 REMAP_PORT_52=35 +m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=0 REMAP_PORT_58=1 REMAP_PORT_57=2 REMAP_PORT_56=3 +m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=4 REMAP_PORT_62=5 REMAP_PORT_61=6 REMAP_PORT_60=7 +m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=28 REMAP_PORT_2=29 REMAP_PORT_1=30 REMAP_PORT_0=31 +m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=24 REMAP_PORT_6=25 REMAP_PORT_5=26 REMAP_PORT_4=27 +m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=56 REMAP_PORT_10=57 REMAP_PORT_9=58 REMAP_PORT_8=59 +m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=60 REMAP_PORT_14=61 REMAP_PORT_13=62 REMAP_PORT_12=63 +m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=4 REMAP_PORT_18=5 REMAP_PORT_17=6 REMAP_PORT_16=7 +m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=0 REMAP_PORT_22=1 REMAP_PORT_21=2 REMAP_PORT_20=3 +m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=32 REMAP_PORT_26=33 REMAP_PORT_25=34 REMAP_PORT_24=35 +m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=36 REMAP_PORT_30=37 REMAP_PORT_29=38 REMAP_PORT_28=39 +m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=12 REMAP_PORT_34=13 REMAP_PORT_33=14 REMAP_PORT_32=15 +m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=8 REMAP_PORT_38=9 REMAP_PORT_37=10 REMAP_PORT_36=11 +m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=40 REMAP_PORT_42=41 REMAP_PORT_41=42 REMAP_PORT_40=43 +m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=44 REMAP_PORT_46=45 REMAP_PORT_45=46 REMAP_PORT_44=47 +m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=20 REMAP_PORT_50=21 REMAP_PORT_49=22 REMAP_PORT_48=23 +m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=16 REMAP_PORT_54=17 REMAP_PORT_53=18 REMAP_PORT_52=19 +m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=48 REMAP_PORT_58=49 REMAP_PORT_57=50 REMAP_PORT_56=51 +m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=52 REMAP_PORT_62=53 REMAP_PORT_61=54 REMAP_PORT_60=55 +m CMIC_LEDUP4_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=1 REMAP_PORT_1=0 + +led 0 stop +led 0 prog \ + 02 00 60 FE 2E FE 67 1C 86 FE 06 FE D2 40 71 04 \ + 12 FF 85 05 D2 05 71 1A 52 00 3A 80 32 08 97 71 \ + 23 77 4B 32 00 32 01 B7 97 75 32 12 BC FE FE 02 \ + 0A 50 12 BC FE FE 95 75 3C 85 77 44 16 FF DA 02 \ + 71 4B 77 44 22 0F 87 22 0E 87 57 22 0E 87 22 0E \ + 87 57 22 0E 87 22 0F 87 57 00 00 00 00 00 00 00 +led 0 auto on +led 0 start + +led 1 stop +led 1 prog \ + 02 00 60 FE 2E FE 67 1C 86 FE 06 FE D2 40 71 04 \ + 12 FF 85 05 D2 05 71 1A 52 00 3A 80 32 08 97 71 \ + 23 77 4B 32 00 32 01 B7 97 75 32 12 BC FE FE 02 \ + 0A 50 12 BC FE FE 95 75 3C 85 77 44 16 FF DA 02 \ + 71 4B 77 44 22 0F 87 22 0E 87 57 22 0E 87 22 0E \ + 87 57 22 0E 87 22 0F 87 57 00 00 00 00 00 00 00 +led 1 auto on +led 1 start + +led 2 stop +led 2 prog \ + 02 00 60 FE 2E FE 67 1C 86 FE 06 FE D2 40 71 04 \ + 12 FF 85 05 D2 05 71 1A 52 00 3A 80 32 08 97 71 \ + 23 77 4B 32 00 32 01 B7 97 75 32 12 BC FE FE 02 \ + 0A 50 12 BC FE FE 95 75 3C 85 77 44 16 FF DA 02 \ + 71 4B 77 44 22 0F 87 22 0E 87 57 22 0E 87 22 0E \ + 87 57 22 0E 87 22 0F 87 57 00 00 00 00 00 00 00 +led 2 auto on +led 2 start + +led 3 stop +led 3 prog \ + 02 00 60 FE 2E FE 67 1C 86 FE 06 FE D2 40 71 04 \ + 12 FF 85 05 D2 05 71 1A 52 00 3A 80 32 08 97 71 \ + 23 77 4B 32 00 32 01 B7 97 75 32 12 BC FE FE 02 \ + 0A 50 12 BC FE FE 95 75 3C 85 77 44 16 FF DA 02 \ + 71 4B 77 44 22 0F 87 22 0E 87 57 22 0E 87 22 0E \ + 87 57 22 0E 87 22 0F 87 57 00 00 00 00 00 00 00 +led 3 auto on +led 3 start diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/media_settings.json b/device/dell/x86_64-dellemc_z9264f_c3538-r0/media_settings.json new file mode 100644 index 00000000000..e0d81f8146c --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/media_settings.json @@ -0,0 +1,6276 @@ +{ + "PORT_MEDIA_SETTINGS": { + "1": { + "Default": { + "preemphasis": { + "lane0": "0x15450a", + "lane1": "0x14460a", + "lane2": "0x15450a", + "lane3": "0x16440a" + } + }, + "QSFP28-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0x104311", + "lane1": "0x104311", + "lane2": "0x104311", + "lane3": "0x104311" + } + }, + "QSFP28-40GBASE-CR4-2M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4610", + "lane3": "0xE4610" + } + }, + "QSFP28-40GBASE-CR4-3M": { + "preemphasis": { + "lane0": "0xE4511", + "lane1": "0xE4511", + "lane2": "0xE4511", + "lane3": "0xE4511" + } + }, + "QSFP28-40GBASE-CR4-5M": { + "preemphasis": { + "lane0": "0xE4511", + "lane1": "0xE4511", + "lane2": "0xE4511", + "lane3": "0xE4511" + } + }, + "QSFP+-40GBASE-SR4": { + "preemphasis": { + "lane0": "0xa3402", + "lane1": "0xa3401", + "lane2": "0xc3602", + "lane3": "0xa3602" + } + }, + "AMPHENOL-616750000": { + "preemphasis": { + "lane0": "0x53E02", + "lane1": "0x53E02", + "lane2": "0x53E02", + "lane3": "0x53E02" + } + }, + "QSFP+-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0x54102", + "lane1": "0x54102", + "lane2": "0x54102", + "lane3": "0x54102" + } + }, + "QSFP+-40GBASE-CR4-2M": { + "preemphasis": { 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"lane1": "0x82e01", + "lane2": "0xa3201", + "lane3": "0xa2f00" + } + }, + "AMPHENOL-616750000": { + "preemphasis": { + "lane0": "0x43704", + "lane1": "0x43704", + "lane2": "0x43704", + "lane3": "0x43704" + } + }, + "QSFP+-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0x43A04", + "lane1": "0x43A04", + "lane2": "0x43A04", + "lane3": "0x43A04" + } + }, + "QSFP+-40GBASE-CR4-2M": { + "preemphasis": { + "lane0": "0x43c04", + "lane1": "0x43c04", + "lane2": "0x43c04", + "lane3": "0x43c04" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0": "0x43f04", + "lane1": "0x43f04", + "lane2": "0x43f04", + "lane3": "0x43f04" + } + }, + "QSFP+-40GBASE-CR4-5M": { + "preemphasis": { + "lane0": "0x44404", + "lane1": "0x44404", + "lane2": "0x44404", + "lane3": "0x44404" + } + }, + "QSFP+-40GBASE-CR4-7M": { + "preemphasis": { + "lane0": "0x54605", + "lane1": "0x54605", + "lane2": "0x54605", + "lane3": "0x54605" + } + } + }, + "59": { + "Default": { + "preemphasis": { + "lane0": "0x12480a", + "lane1": "0x12480a", + "lane2": "0x114a09", + "lane3": "0x11480b" + } + }, + "QSFP28-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0xF460F", + "lane1": "0xF460F", + "lane2": "0xF460F", + "lane3": "0xF460F" + } + }, + "QSFP28-40GBASE-CR4-2M": { + "preemphasis": { + "lane0": "0xD480F", + "lane1": "0xD480F", + "lane2": "0xD480F", + "lane3": "0xD480F" + } + }, + "QSFP28-40GBASE-CR4-3M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4610", + "lane3": "0xE4610" + } + }, + "QSFP28-40GBASE-CR4-5M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4610", + "lane3": "0xE4610" + } + }, + "QSFP+-40GBASE-SR4": { + "preemphasis": { + "lane0": "0x93101", + "lane1": "0x83000", + "lane2": "0x83000", + "lane3": "0x93101" + } + }, + "AMPHENOL-616750000": { + "preemphasis": { + "lane0": "0x43704", + "lane1": "0x43704", + "lane2": "0x43704", + "lane3": "0x43704" + } + }, + "QSFP+-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0x43A04", + "lane1": "0x43A04", + "lane2": "0x43A04", + "lane3": "0x43A04" + } + }, + "QSFP+-40GBASE-CR4-2M": { + "preemphasis": { + "lane0": "0x43c04", + "lane1": "0x43c04", + "lane2": "0x43c04", + "lane3": "0x43c04" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0": "0x43f04", + "lane1": "0x43f04", + "lane2": "0x43f04", + "lane3": "0x43f04" + } + }, + "QSFP+-40GBASE-CR4-5M": { + "preemphasis": { + "lane0": "0x44404", + "lane1": "0x44404", + "lane2": "0x44404", + "lane3": "0x44404" + } + }, + "QSFP+-40GBASE-CR4-7M": { + "preemphasis": { + "lane0": "0x54605", + "lane1": "0x54605", + "lane2": "0x54605", + "lane3": "0x54605" + } + } + }, + "60": { + "Default": { + "preemphasis": { + "lane0": "0x12480a", + "lane1": "0x104a0a", + "lane2": "0x114a09", + "lane3": "0x11480b" + } + }, + "QSFP28-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0xF460F", + "lane1": "0xF460F", + "lane2": "0xF460F", + "lane3": "0xF460F" + } + }, + "QSFP28-40GBASE-CR4-2M": { + "preemphasis": { + "lane0": "0xD480F", + "lane1": "0xD480F", + "lane2": "0xD480F", + "lane3": "0xD480F" + } + }, + "QSFP28-40GBASE-CR4-3M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4610", + "lane3": "0xE4610" + } + }, + "QSFP28-40GBASE-CR4-5M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4610", + "lane3": "0xE4610" + } + }, + "QSFP+-40GBASE-SR4": { + "preemphasis": { + "lane0": "0xa3501", + "lane1": "0xa3501", + "lane2": "0x83000", + "lane3": "0xa3702" + } + }, + "AMPHENOL-616750000": { + "preemphasis": { + "lane0": "0x43704", + "lane1": "0x43704", + "lane2": "0x43704", + "lane3": "0x43704" + } + }, + "QSFP+-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0x43A04", + "lane1": "0x43A04", + "lane2": "0x43A04", + "lane3": "0x43A04" + } + }, + "QSFP+-40GBASE-CR4-2M": { + "preemphasis": { + "lane0": "0x43c04", + "lane1": "0x43c04", + "lane2": "0x43c04", + "lane3": "0x43c04" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0": "0x43f04", + "lane1": "0x43f04", + "lane2": "0x43f04", + "lane3": "0x43f04" + } + }, + "QSFP+-40GBASE-CR4-5M": { + "preemphasis": { + "lane0": "0x44404", + "lane1": "0x44404", + "lane2": "0x44404", + "lane3": "0x44404" + } + }, + "QSFP+-40GBASE-CR4-7M": { + "preemphasis": { + "lane0": "0x54605", + "lane1": "0x54605", + "lane2": "0x54605", + "lane3": "0x54605" + } + } + }, + "61": { + "Default": { + "preemphasis": { + "lane0": "0x12480a", + "lane1": "0x12480a", + "lane2": "0x114a09", + "lane3": "0x11480b" + } + }, + "QSFP28-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0x104311", + "lane1": "0x104311", + "lane2": "0x104311", + "lane3": "0x104311" + } + }, + "QSFP28-40GBASE-CR4-2M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4610", + "lane3": "0xE4610" + } + }, + "QSFP28-40GBASE-CR4-3M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4511", + "lane3": "0xE4610" + } + }, + "QSFP28-40GBASE-CR4-5M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4511", + "lane3": "0xE4610" + } + }, + "QSFP+-40GBASE-SR4": { + "preemphasis": { + "lane0": "0x93201", + "lane1": "0x83000", + "lane2": "0x83000", + "lane3": "0xa3702" + } + }, + "AMPHENOL-616750000": { + "preemphasis": { + "lane0": "0x53E02", + "lane1": "0x53E02", + "lane2": "0x53E02", + "lane3": "0x53E02" + } + }, + "QSFP+-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0x54102", + "lane1": "0x54102", + "lane2": "0x54102", + "lane3": "0x54102" + } + }, + "QSFP+-40GBASE-CR4-2M": { + "preemphasis": { + "lane0": "0x54302", + "lane1": "0x54302", + "lane2": "0x54302", + "lane3": "0x54302" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0": "0x54602", + "lane1": "0x54602", + "lane2": "0x54602", + "lane3": "0x54602" + } + }, + "QSFP+-40GBASE-CR4-5M": { + "preemphasis": { + "lane0": "0x44802", + "lane1": "0x44802", + "lane2": "0x44802", + "lane3": "0x44802" + } + }, + "QSFP+-40GBASE-CR4-7M": { + "preemphasis": { + "lane0": "0x55005", + "lane1": "0x55005", + "lane2": "0x55005", + "lane3": "0x55005" + } + } + }, + "62": { + "Default": { + "preemphasis": { + "lane0": "0x154609", + "lane1": "0x144709", + "lane2": "0x114a09", + "lane3": "0x11480b" + } + }, + "QSFP28-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0xF460F", + "lane1": "0x104311", + "lane2": "0xF460F", + "lane3": "0xF460F" + } + }, + "QSFP28-40GBASE-CR4-2M": { + "preemphasis": { + "lane0": "0xD480F", + "lane1": "0xE4610", + "lane2": "0xD480F", + "lane3": "0xD480F" + } + }, + "QSFP28-40GBASE-CR4-3M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4610", + "lane3": "0xE4610" + } + }, + "QSFP28-40GBASE-CR4-5M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4610", + "lane3": "0xE4610" + } + }, + "QSFP+-40GBASE-SR4": { + "preemphasis": { + "lane0": "0xa3501", + "lane1": "0xa3501", + "lane2": "0xb3501", + "lane3": "0xa3500" + } + }, + "AMPHENOL-616750000": { + "preemphasis": { + "lane0": "0x43704", + "lane1": "0x53E02", + "lane2": "0x53E02", + "lane3": "0x53E02" + } + }, + "QSFP+-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0x43A04", + "lane1": "0x54102", + "lane2": "0x54102", + "lane3": "0x54102" + } + }, + "QSFP+-40GBASE-CR4-2M": { + "preemphasis": { + "lane0": "0x43c04", + "lane1": "0x54302", + "lane2": "0x54302", + "lane3": "0x54302" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0": "0x43f04", + "lane1": "0x54602", + "lane2": "0x54602", + "lane3": "0x54602" + } + }, + "QSFP+-40GBASE-CR4-5M": { + "preemphasis": { + "lane0": "0x44404", + "lane1": "0x44802", + "lane2": "0x44802", + "lane3": "0x44802" + } + }, + "QSFP+-40GBASE-CR4-7M": { + "preemphasis": { + "lane0": "0x54605", + "lane1": "0x55005", + "lane2": "0x54605", + "lane3": "0x54605" + } + } + }, + "63": { + "Default": { + "preemphasis": { + "lane0": "0x164608", + "lane1": "0x144709", + "lane2": "0x144709", + "lane3": "0x14460a" + } + }, + "QSFP28-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0x104311", + "lane1": "0x104311", + "lane2": "0x104311", + "lane3": "0x104311" + } + }, + "QSFP28-40GBASE-CR4-2M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4610", + "lane3": "0xE4610" + } + }, + "QSFP28-40GBASE-CR4-3M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4610", + "lane3": "0xE4610" + } + }, + "QSFP28-40GBASE-CR4-5M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4610", + "lane3": "0xE4610" + } + }, + "QSFP+-40GBASE-SR4": { + "preemphasis": { + "lane0": "0x82e00", + "lane1": "0x72d00", + "lane2": "0xa3001", + "lane3": "0xa3001" + } + }, + "AMPHENOL-616750000": { + "preemphasis": { + "lane0": "0x53E02", + "lane1": "0x53E02", + "lane2": "0x53E02", + "lane3": "0x53E02" + } + }, + "QSFP+-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0x54102", + "lane1": "0x54102", + "lane2": "0x54102", + "lane3": "0x54102" + } + }, + "QSFP+-40GBASE-CR4-2M": { + "preemphasis": { + "lane0": "0x54302", + "lane1": "0x54302", + "lane2": "0x54302", + "lane3": "0x54302" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0": "0x54602", + "lane1": "0x54602", + "lane2": "0x54602", + "lane3": "0x54602" + } + }, + "QSFP+-40GBASE-CR4-5M": { + "preemphasis": { + "lane0": "0x44802", + "lane1": "0x44802", + "lane2": "0x44802", + "lane3": "0x44802" + } + }, + "QSFP+-40GBASE-CR4-7M": { + "preemphasis": { + "lane0": "0x55005", + "lane1": "0x55005", + "lane2": "0x55005", + "lane3": "0x55005" + } + } + }, + "64": { + "Default": { + "preemphasis": { + "lane0": "0x194209", + "lane1": "0x14460a", + "lane2": "0x14460a", + "lane3": "0x16440a" + } + }, + "QSFP28-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0x104311", + "lane1": "0x104311", + "lane2": "0x104311", + "lane3": "0x104311" + } + }, + "QSFP28-40GBASE-CR4-2M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4610", + "lane3": "0xE4610" + } + }, + "QSFP28-40GBASE-CR4-3M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4610", + "lane3": "0xE4610" + } + }, + "QSFP28-40GBASE-CR4-5M": { + "preemphasis": { + "lane0": "0xE4610", + "lane1": "0xE4610", + "lane2": "0xE4610", + "lane3": "0xE4610" + } + }, + "QSFP+-40GBASE-SR4": { + "preemphasis": { + "lane0": "0xd3203", + "lane1": "0xa3301", + "lane2": "0xa3201", + "lane3": "0xc3202" + } + }, + "AMPHENOL-616750000": { + "preemphasis": { + "lane0": "0x53E02", + "lane1": "0x53E02", + "lane2": "0x53E02", + "lane3": "0x53E02" + } + }, + "QSFP+-40GBASE-CR4-1M": { + "preemphasis": { + "lane0": "0x54102", + "lane1": "0x54102", + "lane2": "0x54102", + "lane3": "0x54102" + } + }, + "QSFP+-40GBASE-CR4-2M": { + "preemphasis": { + "lane0": "0x54302", + "lane1": "0x54302", + "lane2": "0x54302", + "lane3": "0x54302" + } + }, + "QSFP+-40GBASE-CR4-3M": { + "preemphasis": { + "lane0": "0x54602", + "lane1": "0x54602", + "lane2": "0x54602", + "lane3": "0x54602" + } + }, + "QSFP+-40GBASE-CR4-5M": { + "preemphasis": { + "lane0": "0x44802", + "lane1": "0x44802", + "lane2": "0x44802", + "lane3": "0x44802" + } + }, + "QSFP+-40GBASE-CR4-7M": { + "preemphasis": { + "lane0": "0x55005", + "lane1": "0x55005", + "lane2": "0x55005", + "lane3": "0x55005" + } + } + } + } +} diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/eeprom.py b/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/eeprom.py new file mode 100644 index 00000000000..2af10473065 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# DellEMC Z9264f +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0050/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/psuutil.py b/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/psuutil.py new file mode 100644 index 00000000000..c72a2d6675b --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/psuutil.py @@ -0,0 +1,107 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path +import logging +import commands +import sys + + +Z9264F_MAX_PSUS = 2 +IPMI_PSU_DATA = "docker exec -it pmon ipmitool sdr list" +IPMI_PSU_DATA_DOCKER = "ipmitool sdr list" +PSU_PRESENCE = "PSU{0}_state" +# Use this for older firmware +# PSU_PRESENCE="PSU{0}_prsnt" +ipmi_sdr_list = "" + + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def isDockerEnv(self): + num_docker = open('/proc/self/cgroup', 'r').read().count(":/docker") + if num_docker > 0: + return True + else: + return False + + # Fetch a BMC register + def get_pmc_register(self, reg_name): + + status = 1 + global ipmi_sdr_list + ipmi_dev_node = "/dev/pmi0" + ipmi_cmd = IPMI_PSU_DATA + dockerenv = self.isDockerEnv() + if dockerenv == True: + ipmi_cmd = IPMI_PSU_DATA_DOCKER + + status, ipmi_sdr_list = commands.getstatusoutput(ipmi_cmd) + + if status: + logging.error('Failed to execute:' + ipmi_sdr_list) + sys.exit(0) + + for item in ipmi_sdr_list.split("\n"): + if reg_name in item: + output = item.strip() + + if not output: + print('\nFailed to fetch: ' + reg_name + ' sensor ') + sys.exit(0) + + output = output.split('|')[1] + + logging.basicConfig(level=logging.DEBUG) + return output + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + Z9264F_MAX_PSUS = 2 + return Z9264F_MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + # Until psu_status is implemented this is hardcoded temporarily + + status = 1 + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_reg_name = PSU_PRESENCE.format(index) + psu_status = int(self.get_pmc_register(psu_reg_name), 16) + if (psu_status != 'ERR'): + # Check for PSU presence + if (psu_status): + status = 1 + return status + diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/sfputil.py b/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/sfputil.py new file mode 100644 index 00000000000..bb1c961ab67 --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/plugins/sfputil.py @@ -0,0 +1,621 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import io + import struct + import sys + import getopt + import time + import select + from sonic_sfp.sfputilbase import SfpUtilBase + from os import * + from mmap import * + from sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_sfp.sff8436 import sff8436Dom + from sonic_sfp.sff8472 import sff8472InterfaceId + from sonic_sfp.sff8472 import sff8472Dom + +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +#definitions of the offset and width for values in DOM info eeprom +QSFP_DOM_REV_OFFSET = 1 +QSFP_DOM_REV_WIDTH = 1 +QSFP_TEMPE_OFFSET = 22 +QSFP_TEMPE_WIDTH = 2 +QSFP_VOLT_OFFSET = 26 +QSFP_VOLT_WIDTH = 2 +QSFP_CHANNL_MON_OFFSET = 34 +QSFP_CHANNL_MON_WIDTH = 16 +QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH = 24 +QSFP_MODULE_THRESHOLD_OFFSET = 128 +QSFP_MODULE_THRESHOLD_WIDTH = 24 +QSFP_CHANNL_THRESHOLD_OFFSET = 176 +QSFP_CHANNL_THRESHOLD_WIDTH = 16 +QSFP_CHANNL_MON_MASK_OFFSET = 242 +QSFP_CHANNL_MON_MASK_WIDTH = 4 + +SFP_TEMPE_OFFSET = 96 +SFP_TEMPE_WIDTH = 2 +SFP_VOLT_OFFSET = 98 +SFP_VOLT_WIDTH = 2 +SFP_MODULE_THRESHOLD_OFFSET = 0 +SFP_MODULE_THRESHOLD_WIDTH = 56 + +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 1 + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 66 + PORTS_IN_BLOCK = 64 + + BASE_RES_PATH = "/sys/bus/pci/devices/0000:04:00.0/resource0" + OIR_FD_PATH = "/sys/bus/pci/devices/0000:04:00.0/port_msi" + + oir_fd = -1 + epoll = -1 + + _port_to_eeprom_mapping = {} + + _global_port_pres_dict = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def pci_mem_read(self, mm, offset): + mm.seek(offset) + read_data_stream = mm.read(4) + reg_val = struct.unpack('I', read_data_stream) + mem_val = str(reg_val)[1:-2] + # print "reg_val read:%x"%reg_val + return mem_val + + def pci_mem_write(self, mm, offset, data): + mm.seek(offset) + # print "data to write:%x"%data + mm.write(struct.pack('I', data)) + + def pci_set_value(self, resource, val, offset): + fd = open(resource, O_RDWR) + mm = mmap(fd, 0) + val = self.pci_mem_write(mm, offset, val) + mm.close() + close(fd) + return val + + def pci_get_value(self, resource, offset): + fd = open(resource, O_RDWR) + mm = mmap(fd, 0) + val = self.pci_mem_read(mm, offset) + mm.close() + close(fd) + return val + + def init_global_port_presence(self): + for port_num in range(self.port_start, (self.port_end + 1)): + presence = self.get_presence(port_num) + if(presence): + self._global_port_pres_dict[port_num] = '1' + else: + self._global_port_pres_dict[port_num] = '0' + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(self.port_start, self.port_end + 1): + port_num = x + 1 + self.port_to_eeprom_mapping[x] = eeprom_path.format(port_num) + port_num = 0 + self.init_global_port_presence() + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4004 + port_offset = 16388 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == ""): + return False + + # Mask off 4th bit for presence + mask = (1 << 4) + + # Mask off 1st bit for presence 65,66 + if (port_num > 64): + mask = (1 << 0) + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4000 + port_offset = 16384 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == ""): + return False + + # Mask off 4th bit for presence + mask = (1 << 6) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4000 + port_offset = 16384 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == ""): + return False + + # Mask off 4th bit for presence + mask = (1 << 6) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) + + return True + + def reset(self, port_num): + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4000 + port_offset = 16384 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == ""): + return False + + # Mask off 4th bit for presence + mask = (1 << 6) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) + + # Sleep 1 second to allow it to settle + time.sleep(1) + + reg_value = reg_value | mask + + # Convert our register value back to a hex string and write back + status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) + + return True + + def get_register(self, reg_file): + retval = 'ERR' + if (not path.isfile(reg_file)): + print reg_file, 'not found !' + return retval + + try: + with fdopen(open(reg_file, O_RDONLY)) as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", reg_file, "file !") + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + def check_interrupts(self, port_dict): + retval = 0 + is_port_dict_updated = False + for port_num in range(self.port_start, (self.port_end + 1)): + presence = self.get_presence(port_num) + if(presence and self._global_port_pres_dict[port_num] == '0'): + is_port_dict_updated = True + self._global_port_pres_dict[port_num] = '1' + port_dict[port_num] = '1' + elif(not presence and + self._global_port_pres_dict[port_num] == '1'): + is_port_dict_updated = True + self._global_port_pres_dict[port_num] = '0' + port_dict[port_num] = '0' + return retval, is_port_dict_updated + + def get_transceiver_change_event(self, timeout=0): + port_dict = {} + try: + # We get notified when there is a MSI interrupt (vector 4/5)CVR + # Open the sysfs file and register the epoll object + self.oir_fd = fdopen(open(self.OIR_FD_PATH, O_RDONLY)) + if self.oir_fd != -1: + # Do a dummy read before epoll register + self.oir_fd.read() + self.epoll = select.epoll() + self.epoll.register( + self.oir_fd.fileno(), select.EPOLLIN & select.EPOLLET) + else: + print("get_transceiver_change_event : unable to create fd") + return False, {} + + # Check for missed interrupts by invoking self.check_interrupts + # which will update the port_dict. + while True: + interrupt_count_start = self.get_register(self.OIR_FD_PATH) + retval, is_port_dict_updated = \ + self.check_interrupts(port_dict) + if ((retval == 0) and (is_port_dict_updated is True)): + return True, port_dict + interrupt_count_end = self.get_register(self.OIR_FD_PATH) + if (interrupt_count_start == 'ERR' or + interrupt_count_end == 'ERR'): + print("get_transceiver_change_event : \ + unable to retrive interrupt count") + break + + # check_interrupts() itself may take upto 100s of msecs. + # We detect a missed interrupt based on the count + if interrupt_count_start == interrupt_count_end: + break + + # Block until an xcvr is inserted or removed with timeout = -1 + events = self.epoll.poll( + timeout=timeout if timeout != 0 else -1) + if events: + # check interrupts and return the port_dict + retval, is_port_dict_updated = \ + self.check_interrupts(port_dict) + if (retval != 0): + return False, {} + + return True, port_dict + except: + return False, {} + finally: + if self.oir_fd != -1: + self.epoll.unregister(self.oir_fd.fileno()) + self.epoll.close() + self.oir_fd.close() + self.oir_fd = -1 + self.epoll = -1 + + return False, {} + + def get_transceiver_dom_info_dict(self, port_num): + transceiver_dom_info_dict = {} + + dom_info_dict_keys = ['temperature', 'voltage', 'rx1power', + 'rx2power', 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', 'tx3bias', + 'tx4bias', 'tx1power', 'tx2power', + 'tx3power', 'tx4power', + ] + transceiver_dom_info_dict = dict.fromkeys(dom_info_dict_keys, 'N/A') + + if port_num in self.qsfp_ports: + offset = 0 + offset_xcvr = 128 + file_path = self._get_port_eeprom_path(port_num, self.IDENTITY_EEPROM_ADDR) + if not self._sfp_eeprom_present(file_path, 0): + return None + + try: + sysfsfile_eeprom = io.open(file_path, mode="rb", buffering=0) + except IOError: + print("Error: reading sysfs file %s" % file_path) + return None + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return transceiver_dom_info_dict + + sfpi_obj = sff8436InterfaceId() + if sfpi_obj is None: + return transceiver_dom_info_dict + + # QSFP capability byte parse, through this byte can know whether it support tx_power or not. + # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, + # need to add more code for determining the capability and version compliance + # in SFF-8636 dom capability definitions evolving with the versions. + qsfp_dom_capability_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset_xcvr + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) + if qsfp_dom_capability_raw is not None: + qspf_dom_capability_data = sfpi_obj.parse_qsfp_dom_capability(qsfp_dom_capability_raw, 0) + else: + return transceiver_dom_info_dict + + dom_temperature_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + else: + return transceiver_dom_info_dict + + dom_voltage_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + else: + return transceiver_dom_info_dict + + qsfp_dom_rev_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + QSFP_DOM_REV_OFFSET), QSFP_DOM_REV_WIDTH) + if qsfp_dom_rev_raw is not None: + qsfp_dom_rev_data = sfpd_obj.parse_sfp_dom_rev(qsfp_dom_rev_raw, 0) + else: + return transceiver_dom_info_dict + + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + # The tx_power monitoring is only available on QSFP which compliant with SFF-8636 + # and claimed that it support tx_power with one indicator bit. + dom_channel_monitor_data = {} + qsfp_dom_rev = qsfp_dom_rev_data['data']['dom_rev']['value'] + qsfp_tx_power_support = qspf_dom_capability_data['data']['Tx_power_support']['value'] + if (qsfp_dom_rev[0:8] != 'SFF-8636' or (qsfp_dom_rev[0:8] == 'SFF-8636' and qsfp_tx_power_support != 'on')): + dom_channel_monitor_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + else: + return transceiver_dom_info_dict + + transceiver_dom_info_dict['tx1power'] = 'N/A' + transceiver_dom_info_dict['tx2power'] = 'N/A' + transceiver_dom_info_dict['tx3power'] = 'N/A' + transceiver_dom_info_dict['tx4power'] = 'N/A' + try: + sysfsfile_eeprom.close() + except IOError: + print("Error: closing sysfs file %s" % file_path) + return None + + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RX1Power']['value'] + transceiver_dom_info_dict['rx2power'] = dom_channel_monitor_data['data']['RX2Power']['value'] + transceiver_dom_info_dict['rx3power'] = dom_channel_monitor_data['data']['RX3Power']['value'] + transceiver_dom_info_dict['rx4power'] = dom_channel_monitor_data['data']['RX4Power']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value'] + transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value'] + transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value'] + transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value'] + + else: + offset = 256 + file_path = self._get_port_eeprom_path(port_num, self.DOM_EEPROM_ADDR) + if not self._sfp_eeprom_present(file_path, 0): + return None + + try: + sysfsfile_eeprom = io.open(file_path,"rb",0) + except IOError: + print("Error: reading sysfs file %s" % file_path) + return None + + sfpd_obj = sff8472Dom(None,1) + if sfpd_obj is None: + return None + dom_temperature_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_TEMPE_OFFSET), + SFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + else: + return transceiver_dom_info_dict + + dom_voltage_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_VOLT_OFFSET), + SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + else: + return transceiver_dom_info_dict + + dom_channel_monitor_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_MODULE_THRESHOLD_OFFSET), + SFP_MODULE_THRESHOLD_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + else: + return transceiver_dom_info_dict + + try: + sysfsfile_eeprom.close() + except IOError: + print("Error: closing sysfs file %s" % file_path) + return None + + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RXPower']['value'] + transceiver_dom_info_dict['rx2power'] = 'N/A' + transceiver_dom_info_dict['rx3power'] = 'N/A' + transceiver_dom_info_dict['rx4power'] = 'N/A' + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TXBias']['value'] + transceiver_dom_info_dict['tx2bias'] = 'N/A' + transceiver_dom_info_dict['tx3bias'] = 'N/A' + transceiver_dom_info_dict['tx4bias'] = 'N/A' + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TXPower']['value'] + transceiver_dom_info_dict['tx2power'] = 'N/A' + transceiver_dom_info_dict['tx3power'] = 'N/A' + transceiver_dom_info_dict['tx4power'] = 'N/A' + + return transceiver_dom_info_dict + + def get_transceiver_dom_threshold_info_dict(self, port_num): + transceiver_dom_threshold_info_dict = {} + dom_info_dict_keys = ['temphighalarm', 'temphighwarning', + 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', + 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', + 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', + 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', + 'txbiaslowalarm', 'txbiaslowwarning' + ] + transceiver_dom_threshold_info_dict = dict.fromkeys(dom_info_dict_keys, 'N/A') + + if port_num in self.qsfp_ports: + file_path = self._get_port_eeprom_path(port_num, self.IDENTITY_EEPROM_ADDR) + if not self._sfp_eeprom_present(file_path, 0): + return None + + try: + sysfsfile_eeprom = io.open(file_path, mode="rb", buffering=0) + except IOError: + print("Error: reading sysfs file %s" % file_path) + return None + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return transceiver_dom_threshold_info_dict + + # Dom Threshold data starts from offset 384 + # Revert offset back to 0 once data is retrieved + offset = 384 + dom_module_threshold_raw = self._read_eeprom_specific_bytes( + sysfsfile_eeprom, + (offset + QSFP_MODULE_THRESHOLD_OFFSET), + QSFP_MODULE_THRESHOLD_WIDTH) + if dom_module_threshold_raw is not None: + dom_module_threshold_data = sfpd_obj.parse_module_threshold_values(dom_module_threshold_raw, 0) + else: + return transceiver_dom_threshold_info_dict + + dom_channel_threshold_raw = self._read_eeprom_specific_bytes( + sysfsfile_eeprom, + (offset + QSFP_CHANNL_THRESHOLD_OFFSET), + QSFP_CHANNL_THRESHOLD_WIDTH) + if dom_channel_threshold_raw is not None: + dom_channel_threshold_data = sfpd_obj.parse_channel_threshold_values(dom_channel_threshold_raw, 0) + else: + return transceiver_dom_threshold_info_dict + + try: + sysfsfile_eeprom.close() + except IOError: + print("Error: closing sysfs file %s" % file_path) + return None + + # Threshold Data + transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] + transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] + transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] + transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] + transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VccHighAlarm']['value'] + transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VccHighWarning']['value'] + transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VccLowAlarm']['value'] + transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VccLowWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_channel_threshold_data['data']['RxPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_channel_threshold_data['data']['RxPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_channel_threshold_data['data']['RxPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_channel_threshold_data['data']['RxPowerLowWarning']['value'] + transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_channel_threshold_data['data']['TxBiasHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_channel_threshold_data['data']['TxBiasHighWarning']['value'] + transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_channel_threshold_data['data']['TxBiasLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_channel_threshold_data['data']['TxBiasLowWarning']['value'] + + else: + offset = 256 + file_path = self._get_port_eeprom_path(port_num, self.DOM_EEPROM_ADDR) + if not self._sfp_eeprom_present(file_path, 0): + return None + + try: + sysfsfile_eeprom = io.open(file_path,"rb",0) + except IOError: + print("Error: reading sysfs file %s" % file_path) + return None + + sfpd_obj = sff8472Dom(None,1) + if sfpd_obj is None: + return transceiver_dom_threshold_info_dict + + dom_module_threshold_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, + (offset + SFP_MODULE_THRESHOLD_OFFSET), SFP_MODULE_THRESHOLD_WIDTH) + + if dom_module_threshold_raw is not None: + dom_module_threshold_data = sfpd_obj.parse_alarm_warning_threshold(dom_module_threshold_raw, 0) + else: + return transceiver_dom_threshold_info_dict + + try: + sysfsfile_eeprom.close() + except IOError: + print("Error: closing sysfs file %s" % file_path) + return None + + #Threshold Data + transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] + transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] + transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] + transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] + transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VoltageHighAlarm']['value'] + transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VoltageLowAlarm']['value'] + transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VoltageHighWarning']['value'] + transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VoltageLowWarning']['value'] + transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_module_threshold_data['data']['BiasHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_module_threshold_data['data']['BiasLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_module_threshold_data['data']['BiasHighWarning']['value'] + transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_module_threshold_data['data']['BiasLowWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_module_threshold_data['data']['TXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_module_threshold_data['data']['TXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_module_threshold_data['data']['TXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_module_threshold_data['data']['TXPowerLowWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_module_threshold_data['data']['RXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_module_threshold_data['data']['RXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_module_threshold_data['data']['RXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_module_threshold_data['data']['RXPowerLowWarning']['value'] + + return transceiver_dom_threshold_info_dict diff --git a/device/dell/x86_64-dellemc_z9264f_c3538-r0/pmon_daemon_control.json b/device/dell/x86_64-dellemc_z9264f_c3538-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..94592fa8ceb --- /dev/null +++ b/device/dell/x86_64-dellemc_z9264f_c3538-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/delta/x86_64-delta_ag5648-r0/Delta-ag5648/port_config.ini b/device/delta/x86_64-delta_ag5648-r0/Delta-ag5648/port_config.ini new file mode 100644 index 00000000000..ace4228d861 --- /dev/null +++ b/device/delta/x86_64-delta_ag5648-r0/Delta-ag5648/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias +Ethernet0 65 twentyfiveGigE1 +Ethernet4 66 twentyfiveGigE2 +Ethernet8 67 twentyfiveGigE3 +Ethernet12 68 twentyfiveGigE4 +Ethernet16 69 twentyfiveGigE5 +Ethernet20 70 twentyfiveGigE6 +Ethernet24 71 twentyfiveGigE7 +Ethernet28 72 twentyfiveGigE8 +Ethernet32 81 twentyfiveGigE9 +Ethernet36 82 twentyfiveGigE10 +Ethernet40 83 twentyfiveGigE11 +Ethernet44 84 twentyfiveGigE12 +Ethernet48 85 twentyfiveGigE13 +Ethernet52 86 twentyfiveGigE14 +Ethernet56 87 twentyfiveGigE15 +Ethernet60 88 twentyfiveGigE16 +Ethernet64 33 twentyfiveGigE17 +Ethernet68 34 twentyfiveGigE18 +Ethernet72 35 twentyfiveGigE19 +Ethernet76 36 twentyfiveGigE20 +Ethernet80 37 twentyfiveGigE21 +Ethernet84 38 twentyfiveGigE22 +Ethernet88 39 twentyfiveGigE23 +Ethernet92 40 twentyfiveGigE24 +Ethernet96 42 twentyfiveGigE25 +Ethernet100 41 twentyfiveGigE26 +Ethernet104 44 twentyfiveGigE27 +Ethernet108 43 twentyfiveGigE28 +Ethernet112 49 twentyfiveGigE29 +Ethernet116 50 twentyfiveGigE30 +Ethernet120 51 twentyfiveGigE31 +Ethernet124 52 twentyfiveGigE32 +Ethernet128 53 twentyfiveGigE33 +Ethernet132 54 twentyfiveGigE34 +Ethernet136 55 twentyfiveGigE35 +Ethernet140 56 twentyfiveGigE36 +Ethernet144 97 twentyfiveGigE37 +Ethernet148 98 twentyfiveGigE38 +Ethernet152 99 twentyfiveGigE39 +Ethernet156 100 twentyfiveGigE40 +Ethernet160 101 twentyfiveGigE41 +Ethernet164 102 twentyfiveGigE42 +Ethernet168 103 twentyfiveGigE43 +Ethernet172 104 twentyfiveGigE44 +Ethernet176 105 twentyfiveGigE45 +Ethernet180 106 twentyfiveGigE46 +Ethernet184 107 twentyfiveGigE47 +Ethernet188 108 twentyfiveGigE48 +Ethernet192 117,118,119,120 hundredGigE51 +Ethernet196 109,110,111,112 hundredGigE51 +Ethernet200 5,6,7,8 hundredGigE51 +Ethernet204 1,2,3,4 hundredGigE52 +Ethernet208 21,22,23,24 hundredGigE53 +Ethernet212 9,10,11,12 hundredGigE54 diff --git a/device/delta/x86_64-delta_ag5648-r0/Delta-ag5648/sai.profile b/device/delta/x86_64-delta_ag5648-r0/Delta-ag5648/sai.profile new file mode 100644 index 00000000000..094e2d2cda0 --- /dev/null +++ b/device/delta/x86_64-delta_ag5648-r0/Delta-ag5648/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-ag5648-48x25G+6x100G.config.bcm diff --git a/device/delta/x86_64-delta_ag5648-r0/Delta-ag5648/th-ag5648-48x25G+6x100G.config.bcm b/device/delta/x86_64-delta_ag5648-r0/Delta-ag5648/th-ag5648-48x25G+6x100G.config.bcm new file mode 100644 index 00000000000..86afb258fd1 --- /dev/null +++ b/device/delta/x86_64-delta_ag5648-r0/Delta-ag5648/th-ag5648-48x25G+6x100G.config.bcm @@ -0,0 +1,277 @@ +os=unix +schan_intr_enable=0 +l2_mem_entries=40960 +l2xmsg_mode=1 +l3_mem_entries=40960 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +pbmp_oversubscribe=0x000fffc0000ffff0003ffffc0000001e +pbmp_xport_xe=0x000fffc0000ffff0003ffffc0000001e + +# Tile-0: 1, 5, 9, 21 +portmap_1=1:100 +portmap_2=5:100 +portmap_3=9:100 +portmap_4=21:100 + +## TX lane swap +xgxs_tx_lane_map_1=0x0123 +xgxs_tx_lane_map_2=0x2301 +xgxs_tx_lane_map_3=0x0123 +xgxs_tx_lane_map_4=0x1302 + +## RX lane swap +xgxs_rx_lane_map_1=0x0123 +xgxs_rx_lane_map_2=0x2301 +xgxs_rx_lane_map_3=0x0123 +xgxs_rx_lane_map_4=0x2031 + +## TX polarity +phy_xaui_tx_polarity_flip_1=0x0 +phy_xaui_tx_polarity_flip_2=0xf +phy_xaui_tx_polarity_flip_3=0x0 +phy_xaui_tx_polarity_flip_4=0xf + +## RX polarity +phy_xaui_rx_polarity_flip_1=0x0 +phy_xaui_rx_polarity_flip_2=0xf +phy_xaui_rx_polarity_flip_3=0x0 +phy_xaui_rx_polarity_flip_4=0xf + + +# Tile-1: 8, 9, 11, 12, 13 +portmap_34=33:25 +portmap_35=34:25 +portmap_36=35:25 +portmap_37=36:25 +portmap_38=37:25 +portmap_39=38:25 +portmap_40=39:25 +portmap_41=40:25 +portmap_42=41:25 +portmap_43=42:25 +portmap_44=43:25 +portmap_45=44:25 +portmap_46=49:25 +portmap_47=50:25 +portmap_48=51:25 +portmap_49=52:25 +portmap_50=53:25 +portmap_51=54:25 +portmap_52=55:25 +portmap_53=56:25 + + +## TX lane swap +xgxs_tx_lane_map_34=0x3210 +xgxs_tx_lane_map_38=0x0123 +xgxs_tx_lane_map_42=0x2031 +xgxs_tx_lane_map_46=0x0123 +xgxs_tx_lane_map_50=0x0123 + +## RX lane swap +xgxs_rx_lane_map_34=0x2301 +xgxs_rx_lane_map_38=0x1032 +xgxs_rx_lane_map_42=0x0213 +xgxs_rx_lane_map_46=0x2301 +xgxs_rx_lane_map_50=0x2301 + + +## TX polarity +phy_xaui_tx_polarity_flip_34=0x0 +phy_xaui_tx_polarity_flip_35=0x1 +phy_xaui_tx_polarity_flip_36=0x0 +phy_xaui_tx_polarity_flip_37=0x1 + +phy_xaui_tx_polarity_flip_38=0x1 +phy_xaui_tx_polarity_flip_39=0x0 +phy_xaui_tx_polarity_flip_40=0x1 +phy_xaui_tx_polarity_flip_41=0x0 + +phy_xaui_tx_polarity_flip_42=0x1 +phy_xaui_tx_polarity_flip_43=0x0 +phy_xaui_tx_polarity_flip_44=0x1 +phy_xaui_tx_polarity_flip_45=0x0 + +phy_xaui_tx_polarity_flip_46=0x0 +phy_xaui_tx_polarity_flip_47=0x1 +phy_xaui_tx_polarity_flip_48=0x0 +phy_xaui_tx_polarity_flip_49=0x1 + +phy_xaui_tx_polarity_flip_50=0x0 +phy_xaui_tx_polarity_flip_51=0x1 +phy_xaui_tx_polarity_flip_52=0x0 +phy_xaui_tx_polarity_flip_53=0x1 + + +## RX polarity +phy_xaui_rx_polarity_flip_34=0x0 +phy_xaui_rx_polarity_flip_35=0x1 +phy_xaui_rx_polarity_flip_36=0x0 +phy_xaui_rx_polarity_flip_37=0x1 + +phy_xaui_rx_polarity_flip_38=0x1 +phy_xaui_rx_polarity_flip_39=0x0 +phy_xaui_rx_polarity_flip_40=0x1 +phy_xaui_rx_polarity_flip_41=0x0 + +phy_xaui_rx_polarity_flip_42=0x1 +phy_xaui_rx_polarity_flip_43=0x0 +phy_xaui_rx_polarity_flip_44=0x1 +phy_xaui_rx_polarity_flip_45=0x0 + +phy_xaui_rx_polarity_flip_46=0x0 +phy_xaui_rx_polarity_flip_47=0x1 +phy_xaui_rx_polarity_flip_48=0x0 +phy_xaui_rx_polarity_flip_49=0x1 + +phy_xaui_rx_polarity_flip_50=0x0 +phy_xaui_rx_polarity_flip_51=0x1 +phy_xaui_rx_polarity_flip_52=0x0 +phy_xaui_rx_polarity_flip_53=0x1 + + +# Tile-2: 16, 17, 20, 21 +portmap_68=65:25 +portmap_69=66:25 +portmap_70=67:25 +portmap_71=68:25 +portmap_72=69:25 +portmap_73=70:25 +portmap_74=71:25 +portmap_75=72:25 +portmap_76=81:25 +portmap_77=82:25 +portmap_78=83:25 +portmap_79=84:25 +portmap_80=85:25 +portmap_81=86:25 +portmap_82=87:25 +portmap_83=88:25 + + +## TX lane swap +xgxs_tx_lane_map_68=0x3210 +xgxs_tx_lane_map_72=0x0123 +xgxs_tx_lane_map_76=0x0123 +xgxs_tx_lane_map_80=0x3210 + +## RX lane swap +xgxs_rx_lane_map_68=0x1032 +xgxs_rx_lane_map_72=0x2301 +xgxs_rx_lane_map_76=0x0123 +xgxs_rx_lane_map_80=0x3210 + + +## TX polarity +phy_xaui_tx_polarity_flip_68=0x0 +phy_xaui_tx_polarity_flip_69=0x1 +phy_xaui_tx_polarity_flip_70=0x0 +phy_xaui_tx_polarity_flip_71=0x1 + +phy_xaui_tx_polarity_flip_72=0x0 +phy_xaui_tx_polarity_flip_73=0x1 +phy_xaui_tx_polarity_flip_74=0x0 +phy_xaui_tx_polarity_flip_75=0x1 + +phy_xaui_tx_polarity_flip_76=0x0 +phy_xaui_tx_polarity_flip_77=0x1 +phy_xaui_tx_polarity_flip_78=0x0 +phy_xaui_tx_polarity_flip_79=0x1 + +phy_xaui_tx_polarity_flip_80=0x1 +phy_xaui_tx_polarity_flip_81=0x0 +phy_xaui_tx_polarity_flip_82=0x1 +phy_xaui_tx_polarity_flip_83=0x0 + +## RX polarity +phy_xaui_rx_polarity_flip_68=0x0 +phy_xaui_rx_polarity_flip_69=0x1 +phy_xaui_rx_polarity_flip_70=0x0 +phy_xaui_rx_polarity_flip_71=0x1 + +phy_xaui_rx_polarity_flip_72=0x0 +phy_xaui_rx_polarity_flip_73=0x1 +phy_xaui_rx_polarity_flip_74=0x0 +phy_xaui_rx_polarity_flip_75=0x1 + +phy_xaui_rx_polarity_flip_76=0x0 +phy_xaui_rx_polarity_flip_77=0x1 +phy_xaui_rx_polarity_flip_78=0x0 +phy_xaui_rx_polarity_flip_79=0x1 + +phy_xaui_rx_polarity_flip_80=0x1 +phy_xaui_rx_polarity_flip_81=0x0 +phy_xaui_rx_polarity_flip_82=0x1 +phy_xaui_rx_polarity_flip_83=0x0 + + +# Tile-3: 24, 25, 26; 27, 29 +portmap_102=97:25 +portmap_103=98:25 +portmap_104=99:25 +portmap_105=100:25 +portmap_106=101:25 +portmap_107=102:25 +portmap_108=103:25 +portmap_109=104:25 +portmap_110=105:25 +portmap_111=106:25 +portmap_112=107:25 +portmap_113=108:25 +portmap_114=109:100 +portmap_115=117:100 + + +## TX lane swap +xgxs_tx_lane_map_102=0x0123 +xgxs_tx_lane_map_106=0x3210 +xgxs_tx_lane_map_110=0x0123 +xgxs_tx_lane_map_114=0x3120 +xgxs_tx_lane_map_115=0x2301 + +## RX lane swap +xgxs_rx_lane_map_102=0x0123 +xgxs_rx_lane_map_106=0x3210 +xgxs_rx_lane_map_110=0x0123 +xgxs_rx_lane_map_114=0x3120 +xgxs_rx_lane_map_115=0x2301 + +## TX polarity +phy_xaui_tx_polarity_flip_102=0 +phy_xaui_tx_polarity_flip_103=1 +phy_xaui_tx_polarity_flip_104=0 +phy_xaui_tx_polarity_flip_105=1 + +phy_xaui_tx_polarity_flip_106=1 +phy_xaui_tx_polarity_flip_107=0 +phy_xaui_tx_polarity_flip_108=1 +phy_xaui_tx_polarity_flip_109=0 + +phy_xaui_tx_polarity_flip_110=0 +phy_xaui_tx_polarity_flip_111=1 +phy_xaui_tx_polarity_flip_112=0 +phy_xaui_tx_polarity_flip_113=1 + +phy_xaui_tx_polarity_flip_114=0xf +phy_xaui_tx_polarity_flip_115=0xf + +## RX polarity +phy_xaui_rx_polarity_flip_102=0 +phy_xaui_rx_polarity_flip_103=1 +phy_xaui_rx_polarity_flip_104=0 +phy_xaui_rx_polarity_flip_105=1 + +phy_xaui_rx_polarity_flip_106=1 +phy_xaui_rx_polarity_flip_107=0 +phy_xaui_rx_polarity_flip_108=1 +phy_xaui_rx_polarity_flip_109=0 + +phy_xaui_rx_polarity_flip_110=0 +phy_xaui_rx_polarity_flip_111=1 +phy_xaui_rx_polarity_flip_112=0 +phy_xaui_rx_polarity_flip_113=1 + +phy_xaui_rx_polarity_flip_114=0xf +phy_xaui_rx_polarity_flip_115=0xf diff --git a/device/delta/x86_64-delta_ag5648-r0/default_sku b/device/delta/x86_64-delta_ag5648-r0/default_sku new file mode 100644 index 00000000000..c4ce98e3555 --- /dev/null +++ b/device/delta/x86_64-delta_ag5648-r0/default_sku @@ -0,0 +1 @@ +Delta-ag5648 t1 diff --git a/device/delta/x86_64-delta_ag5648-r0/fancontrol b/device/delta/x86_64-delta_ag5648-r0/fancontrol new file mode 100644 index 00000000000..2666ad97d9c --- /dev/null +++ b/device/delta/x86_64-delta_ag5648-r0/fancontrol @@ -0,0 +1,10 @@ +INTERVAL=10 +DEVPATH=hwmon1=/sys/bus/i2c/devices +DEVNAME=hwmon1=emc2305 +FCTEMPS=DEVPATH/2-004d/hwmon/hwmon*/temp1_input DEVPATH/3-0049/hwmon/hwmon*/temp1_input DEVPATH/3-004b/hwmon/hwmon*/temp1_input DEVPATH/3-004c/hwmon/hwmon*/temp1_input DEVPATH/3-004e/hwmon/hwmon*/temp1_input DEVPATH/3-004f/hwmon/hwmon*/temp1_input DEVPATH/6-0059/temp1_input DEVPATH/6-0058/temp1_input + +FCFANS=DEVPATH/3-004d/fan1_input DEVPATH/3-004d/fan2_input DEVPATH/3-004d/fan3_input DEVPATH/3-004d/fan4_input DEVPATH/5-004d/fan1_input DEVPATH/5-004d/fan2_input DEVPATH/5-004d/fan3_input DEVPATH/5-004d/fan4_input +MINTEMP=20 +MAXTEMP=60 +MINSTART=75 +MINSTOP=22 diff --git a/device/delta/x86_64-delta_ag5648-r0/fancontrol.service b/device/delta/x86_64-delta_ag5648-r0/fancontrol.service new file mode 100755 index 00000000000..ace4392f436 --- /dev/null +++ b/device/delta/x86_64-delta_ag5648-r0/fancontrol.service @@ -0,0 +1,262 @@ +#!/bin/bash +# +# Simple script implementing a temperature dependent fan speed control +# Supported Linux kernel versions: 2.6.5 and later +# +# Version 0.70 +# +# Usage: fancontrol.service [CONFIGFILE] +# +# Dependencies: +# bash, egrep, sed, cut, sleep, readlink, lm_sensors :) +# +# Please send any questions, comments or success stories to +# marius.reiner@hdev.de +# Thanks! +# +# For configuration instructions and warnings please see fancontrol.txt, which +# can be found in the doc/ directory or at the website mentioned above. +# +# +# Copyright 2003 Marius Reiner +# Copyright (C) 2007-2009 Jean Delvare +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA. +# +# + +PIDFILE="/var/run/fancontrol.pid" + +#DEBUG=1 +MAX=255 + +function LoadConfig +{ + local fcvcount fcv + + echo "Loading configuration from $1 ..." + if [ ! -r "$1" ] + then + echo "Error: Can't read configuration file" >&2 + exit 1 + fi + + # grep configuration from file + INTERVAL=`egrep '^INTERVAL=.*$' $1 | sed -e 's/INTERVAL=//g'` + DEVPATH=`egrep '^DEVPATH=.*$' $1 | sed -e 's/DEVPATH= *//g'` + DEVNAME=`egrep '^DEVNAME=.*$' $1 | sed -e 's/DEVNAME= *//g'` + FCTEMPS=`egrep '^FCTEMPS=.*$' $1 | sed -e 's/FCTEMPS=//g'` + MINTEMP=`egrep '^MINTEMP=.*$' $1 | sed -e 's/MINTEMP=//g'` + MAXTEMP=`egrep '^MAXTEMP=.*$' $1 | sed -e 's/MAXTEMP=//g'` + MINSTART=`egrep '^MINSTART=.*$' $1 | sed -e 's/MINSTART=//g'` + MINSTOP=`egrep '^MINSTOP=.*$' $1 | sed -e 's/MINSTOP=//g'` + HWMON=$( echo "$DEVPATH" | sed 's/=.*$//g') + FCDEVPATH=$( echo "$DEVPATH" | sed 's/^.*=//g') + FCMINTEMP=$MINTEMP + FCMAXTEMP=$MAXTEMP + FCMINSTART=$MINSTART + FCMINSTOP=$MINSTOP + + FCFANS=`egrep '^FCFANS=.*$' $1 | sed -e 's/FCFANS=//g'` + + # Check whether all mandatory settings are set + if [[ -z ${INTERVAL} || -z ${FCTEMPS} || -z ${MINTEMP} || -z ${MAXTEMP} || -z ${MINSTART} || -z ${MINSTOP} ]] + then + echo "Some mandatory settings missing, please check your config file!" >&2 + exit 1 + fi + if [ "$INTERVAL" -le 0 ] + then + echo "Error in configuration file:" >&2 + echo "INTERVAL must be at least 1" >&2 + exit 1 + fi + + # write settings to arrays for easier use and print them + echo "Common settings:" + + temp_string=$FCTEMPS + + let fcvcount=0 + for fcv in $FCTEMPS + do + fcvcount=$((fcvcount+1)) + AFCTEMP[$fcvcount]=$( echo "$temp_string" | cut -d" " -f $fcvcount ) + AFCTEMP[$fcvcount]=$( echo "${AFCTEMP[$fcvcount]}" | sed 's/DEVPATH/\/sys\/bus\/i2c\/devices/g' ) + AFCTEMP_PATH[$fcvcount]=$( echo "${AFCTEMP[$fcvcount]}" | sed 's/DEVPATH/\/sys\/bus\/i2c\/devices/g' ) + + #if [ $fcvcount -eq 5 ];then + #echo "0x00" > '/sys/bus/i2c/devices/6-0058/psu_select_member' + # AFCTEMP[$fcvcount]=$( cat ${AFCTEMP[$fcvcount]} ) + #elif [ $fcvcount -eq 6 ];then + #echo "0x20" > '/sys/bus/i2c/devices/6-0058/psu_select_member' + # AFCTEMP[$fcvcount]=$( cat ${AFCTEMP[$fcvcount]} ) + #else + # AFCTEMP[$fcvcount]=$( cat ${AFCTEMP[$fcvcount]} ) + #fi + AFCTEMP[$fcvcount]=$( cat ${AFCTEMP[$fcvcount]} ) + AFCTEMP[$fcvcount]=$(( AFCTEMP[$fcvcount]/1000 )) + echo "AFCTEMP[$fcvcount]=${AFCTEMP[$fcvcount]} (Celsius)" + done + + fan_string=$FCFANS + fcvcount=0 + zero=0 + for fcv in $FCFANS + do + fcvcount=$((fcvcount+1)) + AFCFAN[$fcvcount]=$( echo "$fan_string" | cut -d" " -f $fcvcount ) + AFCFAN_PATH[$fcvcount]=$( echo "${AFCFAN[$fcvcount]}" | sed 's/DEVPATH/\/sys\/bus\/i2c\/devices/g' ) + AFCFAN_TARGET[$fcvcount]=$( echo "${AFCFAN_PATH[$fcvcount]}" | sed 's/DEVPATH/\/sys\/bus\/i2c\/devices/g' ) + AFCFAN_TARGET[$fcvcount]=$( echo "${AFCFAN_TARGET[$fcvcount]}" | sed 's/$/_percentage/g') + AFCFAN[$fcvcount]=$( cat ${AFCFAN_PATH[$fcvcount]} ) + if [ "${AFCFAN[$fcvcount]}" == 960 ] + then + AFCFAN[$fcvcount]=$zero + fi + echo "AFCFAN[$fcvcount]=${AFCFAN[$fcvcount]} (rpm)" + done + echo "INTERVAL=$INTERVAL" + echo "DEVPATH=$FCDEVPATH" + echo "MINTEMP=$FCMINTEMP" + echo "MAXTEMP=$FCMAXTEMP" + echo "MINSTART=$FCMINSTART" + echo "MINSTOP=$FCMINSTOP" +} + +# Check that all referenced sysfs files exist +function CheckFiles +{ + local outdated=0 fcvcount tsen fan + if [ $outdated -eq 1 ] + then + echo >&2 + echo "At least one referenced file is missing. Either some required kernel" >&2 + echo "modules haven't been loaded, or your configuration file is outdated." >&2 + echo "In the latter case, you should run pwmconfig again." >&2 + fi + return $outdated +} + +LoadConfig $1 + +# Detect path to sensors +if [ ! -d $DIR ] +then + echo $0: 'No sensors found! (did you load the necessary modules?)' >&2 + exit 1 +fi +cd $DIR + +# Check for configuration change +if [ "$DIR" != "/" ] && [ -z "$DEVPATH" -o -z "$DEVNAME" ] +then + echo "Configuration is too old, please run pwmconfig again" >&2 + exit 1 +fi +if [ "$DIR" = "/" -a -n "$DEVPATH" ] +then + echo "Unneeded DEVPATH with absolute device paths" >&2 + exit 1 +fi +CheckFiles || exit 1 + +if [ -f "$PIDFILE" ] +then + echo "File $PIDFILE exists, is fancontrol already running?" >&2 + exit 1 +fi +echo $$ > "$PIDFILE" + + +# main function +function UpdateThermalSensors +{ + echo "" + TEMP_HIGHEST=0 + FAN_PERCENTAGE=0 + + for i in ${AFCTEMP_PATH[@]}; do + if (( $(cat $i) > $TEMP_HIGHEST )); then + TEMP_HIGHEST=$(cat $i); + fi; + done + TEMP_HIGHEST=$((TEMP_HIGHEST/1000)) + echo "The highest temperature of thermal sensors: $TEMP_HIGHEST C" + +} + +function UpdateFanSpeeds +{ + if [ $TEMP_HIGHEST -lt 51 ]; then #TEMP<=50 + FAN_PERCENTAGE=40 + elif [ $TEMP_HIGHEST -lt 56 -a $TEMP_HIGHEST -gt 50 ]; then #50 ${AFCFAN_TARGET[$fcvcount]} + AFCFAN[$fcvcount]=$( cat ${AFCFAN_PATH[$fcvcount]} ) + + if [ "${AFCFAN[$fcvcount]}" == 960 ] + then + AFCFAN[$fcvcount]=$zero + fi + echo "AFCFAN[$fcvcount]=${AFCFAN[$fcvcount]} (rpm)" + done + + if [ $TEMP_HIGHEST -lt 51 ]; then #TEMP<=50 + FAN_ON_PSU_PERCENTAGE=50 + elif [ $TEMP_HIGHEST -lt 100 -a $TEMP_HIGHEST -gt 50 ]; then #50 '/sys/bus/i2c/devices/4-0058/psu_select_member' + echo "$FAN_ON_PSU_PERCENTAGE" > '/sys/bus/i2c/devices/6-0059/fan1_set_percentage' + echo "PSU fan1 =$( cat '/sys/bus/i2c/devices/6-0059/fan1_input' ) (rpm)" + #Set speed to PSU_FAN2 + #echo "0x20" > '/sys/bus/i2c/devices/6-0058/psu_select_member' + echo "$FAN_ON_PSU_PERCENTAGE" > '/sys/bus/i2c/devices/6-0058/fan1_set_percentage' + echo "PSU fan2 =$( cat '/sys/bus/i2c/devices/6-0058/fan1_input' ) (rpm)" + + rm -f "$PIDFILE" +} +# main loop calling the main function at specified intervals +while true +do + UpdateThermalSensors + UpdateFanSpeeds + echo "Sleep $INTERVAL seconds ..." + # Sleep while still handling signals + sleep $INTERVAL & + wait $! +done diff --git a/device/delta/x86_64-delta_ag5648-r0/installer.conf b/device/delta/x86_64-delta_ag5648-r0/installer.conf new file mode 100644 index 00000000000..85ed43ab48e --- /dev/null +++ b/device/delta/x86_64-delta_ag5648-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_SPEED=115200 +CONSOLE_DEV=0 diff --git a/device/delta/x86_64-delta_ag5648-r0/led_proc_init.soc b/device/delta/x86_64-delta_ag5648-r0/led_proc_init.soc new file mode 100755 index 00000000000..a329017fbde --- /dev/null +++ b/device/delta/x86_64-delta_ag5648-r0/led_proc_init.soc @@ -0,0 +1,67 @@ +#AG5648 LED + +led 0 stop +led 0 prog \ + 02 00 60 E0 02 A0 60 E2 86 ED 02 00 60 E1 67 EF \ + 71 1F 2E E0 32 08 97 02 00 0E 02 60 E3 77 2A 2E \ + E0 32 08 97 02 00 0E 03 60 E3 2E E0 32 00 32 01 \ + B7 97 02 00 0E 00 12 E7 FE E1 50 67 EF 71 49 86 \ + E0 86 E1 06 E1 D2 04 74 2A 02 00 60 E1 12 E7 FE \ + E1 05 60 EC 12 E3 FE E1 05 0A 03 71 61 67 EB 77 \ + 63 67 CB 67 EF 71 76 12 E3 FE E1 05 0A 02 71 74 \ + 67 EB 77 76 67 CB 12 E3 FE E1 05 0A 01 71 87 67 \ + EB 67 EF 71 97 77 8D 67 CB 67 EF 71 97 86 E1 06 \ + E1 D2 04 74 4D 77 A5 06 E0 28 32 08 97 71 A3 67 \ + EB 77 A5 67 D7 06 E2 67 EF 71 B1 F2 04 60 E2 77 \ + B7 F2 01 60 E2 86 E0 06 E0 D2 24 74 0A 67 EB 67 \ + EB 67 EB 67 EB 67 EB 67 EB 3A 72 67 EF 71 E7 06 \ + EC D2 00 70 E7 77 DD 06 EC D2 00 70 EB 16 ED 99 \ + 99 1A 00 71 E7 77 EB 32 0F 87 57 32 0E 87 57 16 \ + E0 DA 0C 57 00 00 00 00 00 00 00 00 00 00 00 00 +led 0 auto on +led 0 start + +led 1 stop +led 1 prog \ + 02 00 60 E0 02 A0 60 E2 86 E6 02 00 60 E1 2E E0 \ + 32 08 97 02 00 0E 03 60 E3 2E E0 32 00 32 01 B7 \ + 97 02 00 0E 00 12 E4 FE E1 50 12 E4 05 60 E5 12 \ + E3 05 0A 03 71 3A 67 83 77 3C 67 7F 12 E3 05 0A \ + 01 71 47 67 83 77 49 67 7F 06 E0 28 32 08 97 71 \ + 55 67 83 77 57 67 6F 06 E2 F2 01 60 E2 86 E0 06 \ + E0 D2 24 74 0A 67 83 67 83 67 83 67 83 3A 70 06 \ + E5 D2 00 70 83 16 E6 99 99 1A 00 71 7F 77 83 32 \ + 0F 87 57 32 0E 87 57 00 00 00 00 00 00 00 00 00 +led 1 auto on +led 1 start + +# LED0 port order remap +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=47 REMAP_PORT_1=47 REMAP_PORT_2=47 REMAP_PORT_3=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=47 REMAP_PORT_5=47 REMAP_PORT_6=47 REMAP_PORT_7=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=31 REMAP_PORT_9=30 REMAP_PORT_10=29 REMAP_PORT_11=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=47 REMAP_PORT_13=47 REMAP_PORT_14=47 REMAP_PORT_15=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=47 REMAP_PORT_17=47 REMAP_PORT_18=47 REMAP_PORT_19=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=35 REMAP_PORT_21=34 REMAP_PORT_22=33 REMAP_PORT_23=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=23 REMAP_PORT_25=22 REMAP_PORT_26=21 REMAP_PORT_27=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=27 REMAP_PORT_29=26 REMAP_PORT_30=25 REMAP_PORT_31=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=47 REMAP_PORT_33=47 REMAP_PORT_34=47 REMAP_PORT_35=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=15 REMAP_PORT_41=14 REMAP_PORT_42=13 REMAP_PORT_43=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=19 REMAP_PORT_49=18 REMAP_PORT_50=17 REMAP_PORT_51=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 REMAP_PORT_53=10 REMAP_PORT_54=9 REMAP_PORT_55=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 + +# LED1 port order remap +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=19 REMAP_PORT_1=18 REMAP_PORT_2=17 REMAP_PORT_3=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=23 REMAP_PORT_5=22 REMAP_PORT_6=21 REMAP_PORT_7=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=26 REMAP_PORT_9=27 REMAP_PORT_10=24 REMAP_PORT_11=25 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=63 REMAP_PORT_13=63 REMAP_PORT_14=63 REMAP_PORT_15=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=31 REMAP_PORT_17=30 REMAP_PORT_18=29 REMAP_PORT_19=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=35 REMAP_PORT_21=34 REMAP_PORT_22=33 REMAP_PORT_23=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=63 REMAP_PORT_25=63 REMAP_PORT_26=63 REMAP_PORT_27=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=63 REMAP_PORT_29=63 REMAP_PORT_30=63 REMAP_PORT_31=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=3 REMAP_PORT_33=2 REMAP_PORT_34=1 REMAP_PORT_35=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=7 REMAP_PORT_37=6 REMAP_PORT_38=5 REMAP_PORT_39=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=11 REMAP_PORT_49=10 REMAP_PORT_50=9 REMAP_PORT_51=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=15 REMAP_PORT_53=14 REMAP_PORT_54=13 REMAP_PORT_55=12 + diff --git a/device/delta/x86_64-delta_ag5648-r0/plugins/eeprom.py b/device/delta/x86_64-delta_ag5648-r0/plugins/eeprom.py new file mode 100644 index 00000000000..786e1fdc85e --- /dev/null +++ b/device/delta/x86_64-delta_ag5648-r0/plugins/eeprom.py @@ -0,0 +1,32 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + _TLV_INFO_MAX_LEN = 256 + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-2/2-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/delta/x86_64-delta_ag5648-r0/plugins/psuutil.py b/device/delta/x86_64-delta_ag5648-r0/plugins/psuutil.py new file mode 100644 index 00000000000..0d17ff05681 --- /dev/null +++ b/device/delta/x86_64-delta_ag5648-r0/plugins/psuutil.py @@ -0,0 +1,56 @@ +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/6-00{}/" + self.psu_oper_status = "in1_input" + self.psu_presence = "i2cget -y 6 0x{} 0x00" + + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + if index is None: + return False + Base_bus_number = 57 + status = 0 + try: + with open(self.psu_path.format(index + Base_bus_number) + self.psu_oper_status, 'r') as power_status: + if int(power_status.read()) == 0 : + return False + else: + status = 1 + except IOError: + return False + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + Base_bus_number = 49 + status = 0 + try: + p = os.popen(self.psu_presence.format(index + Base_bus_number)+ "> /dev/null 2>&1") + if p.readline() != None: + status = 1 + p.close() + except IOError: + return False + return status == 1 + + diff --git a/device/delta/x86_64-delta_ag5648-r0/plugins/sfputil.py b/device/delta/x86_64-delta_ag5648-r0/plugins/sfputil.py new file mode 100644 index 00000000000..86497741425 --- /dev/null +++ b/device/delta/x86_64-delta_ag5648-r0/plugins/sfputil.py @@ -0,0 +1,211 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_START_QSFP = 48 + PORT_END = 53 + PORTS_IN_BLOCK = 54 + + EEPROM_OFFSET = 10 + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + @property + def port_start_qsfp(self): + return self.PORT_START_QSFP + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + if x > self.port_start_qsfp -1 and x < self.port_end + 1: + self.get_response(x) + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) + SfpUtilBase.__init__(self) + + def get_response(self, port_num): + # Check for invalid port_num + if port_num < self.port_start_qsfp or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/delta-ag5648-cpld.0/sfp_response", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # set the bit corresponding to our port + mask = (port_num + 1) % 8 - 1 + mask = 1 << mask + + # Convert our register value back to a hex string and write back + content = hex(mask) + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/delta-ag5648-cpld.0/sfp_present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/delta-ag5648-cpld.0/sfp_lpmode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start_qsfp or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/delta-ag5648-cpld.0/sfp_lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/devices/platform/delta-ag5648-cpld.0/sfp_reset" + + # Check for invalid port_num + if port_num < self.port_start_qsfp or port_num > self.port_end: + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/delta/x86_64-delta_ag5648-r0/sensors.conf b/device/delta/x86_64-delta_ag5648-r0/sensors.conf new file mode 100644 index 00000000000..ff71a21a747 --- /dev/null +++ b/device/delta/x86_64-delta_ag5648-r0/sensors.conf @@ -0,0 +1,91 @@ +# libsensors configuration file for AG5648 +# ------------------------------------------------ +# + +bus "i2c-2" "i2c-1-mux (chan_id 0)" +bus "i2c-3" "i2c-1-mux (chan_id 1)" +bus "i2c-4" "i2c-1-mux (chan_id 2)" +bus "i2c-5" "i2c-1-mux (chan_id 3)" +bus "i2c-6" "i2c-1-mux (chan_id 4)" +bus "i2c-7" "i2c-1-mux (chan_id 5)" + +# tmp75-i2c-2-4d board sensor near Left of front vents. +# tmp75-i2c-3-49 board sensor near MAC. +# tmp75-i2c-3-4b board sensor near Middle of front vents. +# tmp75-i2c-3-4c board sensor near Right of front vents. +# tmp75-i2c-3-4e board sensor near DC fan. +# tmp75-i2c-3-4f board sensor near CPU. + +chip "tmp75-i2c-2-4d" + label temp1 "board sensor near Left of front vents" + set temp1_max 60 + set temp1_max_hyst 55 + +chip "tmp75-i2c-3-49" + label temp1 "board sensor near MAC" + set temp1_max 85 + set temp1_max_hyst 80 + +chip "tmp75-i2c-3-4b" + label temp1 "board sensor near Middle of front vents" + set temp1_max 70 + set temp1_max_hyst 65 + +chip "tmp75-i2c-3-4c" + label temp1 "board sensor near Right of front vents" + set temp1_max 65 + set temp1_max_hyst 60 + +chip "tmp75-i2c-3-4e" + label temp1 "board sensor near DC fan" + set temp1_max 60 + set temp1_max_hyst 55 + +chip "tmp75-i2c-3-4f" + label temp1 "board sensor near CPU" + set temp1_max 80 + set temp1_max_hyst 75 + +chip "emc2305-i2c-3-4d" + label fan1 "FANTRAY 1 REAR" + label fan2 "FANTRAY 2 REAR" + label fan3 "FANTRAY 3 REAR" + label fan4 "FANTRAY 4 REAR" + +chip "emc2305-i2c-5-4d" + label fan1 "FANTRAY 1 FRONT" + label fan2 "FANTRAY 2 FRONT" + label fan3 "FANTRAY 3 FRONT" + label fan4 "FANTRAY 4 FRONT" + +chip "ltc4215-i2c-3-40" + label in1 "PSU Hot-Swap voltage 1" + label in2 "PSU Hot-Swap voltage 2" + label power1 "PSU Hot-Swap power" + label curr1 "PSU Hot-Swap current" + +chip "ltc4215-i2c-3-42" + label in1 "PSU Hot-Swap voltage 1" + label in2 "PSU Hot-Swap voltage 2" + label power1 "PSU Hot-Swap power" + label curr1 "PSU Hot-Swap current" + +chip "dni_ag5648_psu-i2c-6-59" + label in1 "PSU voltage 1" + label in2 "PSU voltage 2" + label fan1 "PSU fan" + label temp1 "PSU temperature" + label power1 "PSU power1" + label power2 "PSU power2" + label curr1 "PSU current1" + label curr2 "PSU current2" + +chip "dni_ag5648_psu-i2c-6-58" + label in1 "PSU voltage 1" + label in2 "PSU voltage 2" + label fan1 "PSU fan" + label temp1 "PSU temperature" + label power1 "PSU power1" + label power2 "PSU power2" + label curr1 "PSU current1" + label curr2 "PSU current2" \ No newline at end of file diff --git a/device/delta/x86_64-delta_ag9032v1-r0/Delta-ag9032v1/port_config.ini b/device/delta/x86_64-delta_ag9032v1-r0/Delta-ag9032v1/port_config.ini new file mode 100644 index 00000000000..4fb783847b0 --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v1-r0/Delta-ag9032v1/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias +Ethernet0 41,42,43,44 hundredGigE1/1 +Ethernet4 45,46,47,48 hundredGigE1/2 +Ethernet8 49,50,51,52 hundredGigE1/3 +Ethernet12 37,38,39,40 hundredGigE1/4 +Ethernet16 33,34,35,36 hundredGigE1/5 +Ethernet20 53,54,55,56 hundredGigE1/6 +Ethernet24 57,58,59,60 hundredGigE1/7 +Ethernet28 61,62,63,64 hundredGigE1/8 +Ethernet32 65,66,67,68 hundredGigE1/9 +Ethernet36 69,70,71,72 hundredGigE1/10 +Ethernet40 73,74,75,76 hundredGigE1/11 +Ethernet44 77,78,79,80 hundredGigE1/12 +Ethernet48 81,82,83,84 hundredGigE1/13 +Ethernet52 85,86,87,88 hundredGigE1/14 +Ethernet56 89,90,91,92 hundredGigE1/15 +Ethernet60 93,94,95,96 hundredGigE1/16 +Ethernet64 97,98,99,100 hundredGigE1/17 +Ethernet68 101,102,103,104 hundredGigE1/18 +Ethernet72 105,106,107,108 hundredGigE1/19 +Ethernet76 109,110,111,112 hundredGigE1/20 +Ethernet80 121,122,123,124 hundredGigE1/21 +Ethernet84 113,114,115,116 hundredGigE1/22 +Ethernet88 1,2,3,4 hundredGigE1/23 +Ethernet92 117,118,119,120 hundredGigE1/24 +Ethernet96 5,6,7,8 hundredGigE1/25 +Ethernet100 125,126,127,128 hundredGigE1/26 +Ethernet104 29,30,31,32 hundredGigE1/27 +Ethernet108 9,10,11,12 hundredGigE1/28 +Ethernet112 13,14,15,16 hundredGigE1/29 +Ethernet116 25,26,27,28 hundredGigE1/30 +Ethernet120 17,18,19,20 hundredGigE1/31 +Ethernet124 21,22,23,24 hundredGigE1/32 diff --git a/device/delta/x86_64-delta_ag9032v1-r0/Delta-ag9032v1/sai.profile b/device/delta/x86_64-delta_ag9032v1-r0/Delta-ag9032v1/sai.profile new file mode 100644 index 00000000000..c77b2bf79a3 --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v1-r0/Delta-ag9032v1/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-ag9032v1-32x100G.config.bcm diff --git a/device/delta/x86_64-delta_ag9032v1-r0/Delta-ag9032v1/th-ag9032v1-32x100G.config.bcm b/device/delta/x86_64-delta_ag9032v1-r0/Delta-ag9032v1/th-ag9032v1-32x100G.config.bcm new file mode 100644 index 00000000000..a088c8f7a6b --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v1-r0/Delta-ag9032v1/th-ag9032v1-32x100G.config.bcm @@ -0,0 +1,523 @@ +os=unix +schan_intr_enable=0 +ctr_evict_enable=0 +l2_mem_entries=40960 +l2xmsg_mode=1 +l3_mem_entries=40960 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +pbmp_oversubscribe=0x00003fc000000ff0000003fc000001fe +pbmp_xport_xe=0x00003fc000000ff0000003fc000001fe +port_phy_clause_1=45 +port_phy_clause_2=45 +port_phy_clause_3=45 +port_phy_clause_4=45 +port_phy_clause_5=45 +port_phy_clause_6=45 +port_phy_clause_7=45 +port_phy_clause_8=45 + +port_phy_clause_34=45 +port_phy_clause_35=45 +port_phy_clause_36=45 +port_phy_clause_37=45 +port_phy_clause_38=45 +port_phy_clause_39=45 +port_phy_clause_40=45 +port_phy_clause_41=45 + +port_phy_clause_68=45 +port_phy_clause_69=45 +port_phy_clause_70=45 +port_phy_clause_71=45 +port_phy_clause_72=45 +port_phy_clause_73=45 +port_phy_clause_74=45 +port_phy_clause_75=45 + +port_phy_clause_102=45 +port_phy_clause_103=45 +port_phy_clause_104=45 +port_phy_clause_105=45 +port_phy_clause_106=45 +port_phy_clause_107=45 +port_phy_clause_108=45 +port_phy_clause_109=45 + +port_phy_addr_1=0xff +port_phy_addr_2=0xff +port_phy_addr_3=0xff +port_phy_addr_4=0xff +port_phy_addr_5=0xff +port_phy_addr_6=0xff +port_phy_addr_7=0xff +port_phy_addr_8=0xff + +port_phy_addr_34=0xff +port_phy_addr_35=0xff +port_phy_addr_36=0xff +port_phy_addr_37=0xff +port_phy_addr_38=0xff +port_phy_addr_39=0xff +port_phy_addr_40=0xff +port_phy_addr_41=0xff + +port_phy_addr_68=0xff +port_phy_addr_69=0xff +port_phy_addr_70=0xff +port_phy_addr_71=0xff +port_phy_addr_72=0xff +port_phy_addr_73=0xff +port_phy_addr_74=0xff +port_phy_addr_75=0xff + +port_phy_addr_102=0xff +port_phy_addr_103=0xff +port_phy_addr_104=0xff +port_phy_addr_105=0xff +port_phy_addr_106=0xff +port_phy_addr_107=0xff +port_phy_addr_108=0xff +port_phy_addr_109=0xff + +# Tile-0 +portmap_1=1:100 +portmap_2=5:100 +portmap_3=9:100 +portmap_4=13:100 +portmap_5=17:100 +portmap_6=21:100 +portmap_7=25:100 +portmap_8=29:100 + +# Tile-1 +portmap_34=33:100 +portmap_35=37:100 +portmap_36=41:100 +portmap_37=45:100 +portmap_38=49:100 +portmap_39=53:100 +portmap_40=57:100 +portmap_41=61:100 + +# Tile-2 +portmap_68=65:100 +portmap_69=69:100 +portmap_70=73:100 +portmap_71=77:100 +portmap_72=81:100 +portmap_73=85:100 +portmap_74=89:100 +portmap_75=93:100 + +# Tile-3 +portmap_102=97:100 +portmap_103=101:100 +portmap_104=105:100 +portmap_105=109:100 +portmap_106=113:100 +portmap_107=117:100 +portmap_108=121:100 +portmap_109=125:100 + +dport_map_enable=1 +dport_map_indexed=1 +dport_map_direct=0 + +dport_map_port_36=1 +dport_map_port_37=2 +dport_map_port_38=3 +dport_map_port_35=4 +dport_map_port_34=5 +dport_map_port_39=6 +dport_map_port_40=7 +dport_map_port_41=8 + +dport_map_port_68=34 +dport_map_port_69=35 +dport_map_port_70=36 +dport_map_port_71=37 +dport_map_port_72=38 +dport_map_port_73=39 +dport_map_port_74=40 +dport_map_port_75=41 + +dport_map_port_102=68 +dport_map_port_103=69 +dport_map_port_104=70 +dport_map_port_105=71 +dport_map_port_108=72 +dport_map_port_106=73 +dport_map_port_1=74 +dport_map_port_107=75 + +dport_map_port_2=102 +dport_map_port_109=103 +dport_map_port_8=104 +dport_map_port_3=105 +dport_map_port_4=106 +dport_map_port_7=107 +dport_map_port_5=108 +dport_map_port_6=109 + +# Tile-0 FC0~FC7 +# TX polarity +phy_xaui_tx_polarity_flip_1=0xF +phy_xaui_tx_polarity_flip_2=0xF +phy_xaui_tx_polarity_flip_3=0x0 +phy_xaui_tx_polarity_flip_4=0x0 +phy_xaui_tx_polarity_flip_5=0x0 +phy_xaui_tx_polarity_flip_6=0x0 +phy_xaui_tx_polarity_flip_7=0xF +phy_xaui_tx_polarity_flip_8=0xF + +# RX polarity +phy_xaui_rx_polarity_flip_1=0xF +phy_xaui_rx_polarity_flip_2=0xF +phy_xaui_rx_polarity_flip_3=0x0 +phy_xaui_rx_polarity_flip_4=0x0 +phy_xaui_rx_polarity_flip_5=0x0 +phy_xaui_rx_polarity_flip_6=0x0 +phy_xaui_rx_polarity_flip_7=0xF +phy_xaui_rx_polarity_flip_8=0xF + +# TX lane swap +xgxs_tx_lane_map_1=0x1302 +xgxs_tx_lane_map_2=0x1302 +xgxs_tx_lane_map_3=0x0213 +xgxs_tx_lane_map_4=0x1302 +xgxs_tx_lane_map_5=0x1032 +xgxs_tx_lane_map_6=0x0213 +xgxs_tx_lane_map_7=0x3120 +xgxs_tx_lane_map_8=0x1302 + +# RX lane swap +xgxs_rx_lane_map_1=0x1302 +xgxs_rx_lane_map_2=0x1302 +xgxs_rx_lane_map_3=0x0213 +xgxs_rx_lane_map_4=0x1302 +xgxs_rx_lane_map_5=0x0123 +xgxs_rx_lane_map_6=0x1032 +xgxs_rx_lane_map_7=0x0213 +xgxs_rx_lane_map_8=0x2031 + +# Tile-1 FC8~FC15 +#TX polarity +phy_xaui_tx_polarity_flip_34=0x0 +phy_xaui_tx_polarity_flip_35=0x1 +phy_xaui_tx_polarity_flip_36=0x0 +phy_xaui_tx_polarity_flip_37=0x1 +phy_xaui_tx_polarity_flip_38=0xF +phy_xaui_tx_polarity_flip_39=0xE +phy_xaui_tx_polarity_flip_40=0x0 +phy_xaui_tx_polarity_flip_41=0xE + +#RX polarity +phy_xaui_rx_polarity_flip_34=0x0 +phy_xaui_rx_polarity_flip_35=0x0 +phy_xaui_rx_polarity_flip_36=0x0 +phy_xaui_rx_polarity_flip_37=0x2 +phy_xaui_rx_polarity_flip_38=0xF +phy_xaui_rx_polarity_flip_39=0xF +phy_xaui_rx_polarity_flip_40=0x0 +phy_xaui_rx_polarity_flip_41=0xF + +# TX lane swap +xgxs_tx_lane_map_34=0x0213 +xgxs_tx_lane_map_35=0x2031 +xgxs_tx_lane_map_36=0x0123 +xgxs_tx_lane_map_37=0x1032 +xgxs_tx_lane_map_38=0x0213 +xgxs_tx_lane_map_39=0x1302 +xgxs_tx_lane_map_40=0x0213 +xgxs_tx_lane_map_41=0x1302 + +# RX lane swap +xgxs_rx_lane_map_34=0x3120 +xgxs_rx_lane_map_35=0x2301 +xgxs_rx_lane_map_36=0x1032 +xgxs_rx_lane_map_37=0x0123 +xgxs_rx_lane_map_38=0x0213 +xgxs_rx_lane_map_39=0x1302 +xgxs_rx_lane_map_40=0x0213 +xgxs_rx_lane_map_41=0x1302 + +# Tile-2 FC16~FC23 +# TX polarity +phy_xaui_tx_polarity_flip_68=0x0 +phy_xaui_tx_polarity_flip_69=0xE +phy_xaui_tx_polarity_flip_70=0x0 +phy_xaui_tx_polarity_flip_71=0xE +phy_xaui_tx_polarity_flip_72=0xF +phy_xaui_tx_polarity_flip_73=0xE +phy_xaui_tx_polarity_flip_74=0xF +phy_xaui_tx_polarity_flip_75=0xE + +# RX polarity +phy_xaui_rx_polarity_flip_68=0x0 +phy_xaui_rx_polarity_flip_69=0xD +phy_xaui_rx_polarity_flip_70=0x0 +phy_xaui_rx_polarity_flip_71=0xF +phy_xaui_rx_polarity_flip_72=0xF +phy_xaui_rx_polarity_flip_73=0xF +phy_xaui_rx_polarity_flip_74=0xF +phy_xaui_rx_polarity_flip_75=0xF + +# TX lane swap +xgxs_tx_lane_map_68=0x3120 +xgxs_tx_lane_map_69=0x1302 +xgxs_tx_lane_map_70=0x0213 +xgxs_tx_lane_map_71=0x0123 +xgxs_tx_lane_map_72=0x0213 +xgxs_tx_lane_map_73=0x2031 +xgxs_tx_lane_map_74=0x0213 +xgxs_tx_lane_map_75=0x2031 + +# RX lane swap +xgxs_rx_lane_map_68=0x3120 +xgxs_rx_lane_map_69=0x1302 +xgxs_rx_lane_map_70=0x0213 +xgxs_rx_lane_map_71=0x2103 +xgxs_rx_lane_map_72=0x2031 +xgxs_rx_lane_map_73=0x0213 +xgxs_rx_lane_map_74=0x3210 +xgxs_rx_lane_map_75=0x0213 + +# Tile-3 +# portmap_0=x:xx // cpu port (not required, but included for illustration purposes) +# TX polarity +phy_xaui_tx_polarity_flip_102=0x0 +phy_xaui_tx_polarity_flip_103=0xF +phy_xaui_tx_polarity_flip_104=0x0 +phy_xaui_tx_polarity_flip_105=0x0 +phy_xaui_tx_polarity_flip_106=0x0 +phy_xaui_tx_polarity_flip_107=0x0 +phy_xaui_tx_polarity_flip_108=0xF +phy_xaui_tx_polarity_flip_109=0x0 + +# RX polarity +phy_xaui_rx_polarity_flip_102=0x0 +phy_xaui_rx_polarity_flip_103=0x2 +phy_xaui_rx_polarity_flip_104=0x0 +phy_xaui_rx_polarity_flip_105=0xF +phy_xaui_rx_polarity_flip_106=0x0 +phy_xaui_rx_polarity_flip_107=0x0 +phy_xaui_rx_polarity_flip_108=0xF +phy_xaui_rx_polarity_flip_109=0x2 + +# TX lane swap +xgxs_tx_lane_map_102=0x2031 +xgxs_tx_lane_map_103=0x0213 +xgxs_tx_lane_map_104=0x2031 +xgxs_tx_lane_map_105=0x0213 +xgxs_tx_lane_map_106=0x0123 +xgxs_tx_lane_map_107=0x0213 +xgxs_tx_lane_map_108=0x0312 +xgxs_tx_lane_map_109=0x3120 + +# RX lane swap +xgxs_rx_lane_map_102=0x0213 +xgxs_rx_lane_map_103=0x2031 +xgxs_rx_lane_map_104=0x0213 +xgxs_rx_lane_map_105=0x2031 +xgxs_rx_lane_map_106=0x0123 +xgxs_rx_lane_map_107=0x0213 +xgxs_rx_lane_map_108=0x1302 +xgxs_rx_lane_map_109=0x3120 + +#serdes_preemphasis_lane0_1=0x(post)(main)(pre) +#ce0 +serdes_preemphasis_lane0_36=0x3c320f +serdes_preemphasis_lane1_36=0x3c320f +serdes_preemphasis_lane2_36=0x3c320c +serdes_preemphasis_lane3_36=0x3c320c + +#ce1 +serdes_preemphasis_lane0_37=0x3c320f +serdes_preemphasis_lane1_37=0x3c320f +serdes_preemphasis_lane2_37=0x3c320c +serdes_preemphasis_lane3_37=0x37320c + +#ce2 +serdes_preemphasis_lane0_38=0x3c3206 +serdes_preemphasis_lane1_38=0x373206 +serdes_preemphasis_lane2_38=0x373206 +serdes_preemphasis_lane3_38=0x373206 + +#ce3 +serdes_preemphasis_lane0_35=0x3c3206 +serdes_preemphasis_lane1_35=0x3c3206 +serdes_preemphasis_lane2_35=0x3c3206 +serdes_preemphasis_lane3_35=0x3c3206 + +#ce4 +serdes_preemphasis_lane0_34=0x3c3206 +serdes_preemphasis_lane1_34=0x3c3206 +serdes_preemphasis_lane2_34=0x3c3206 +serdes_preemphasis_lane3_34=0x373206 + +#ce5 +serdes_preemphasis_lane0_39=0x323206 +serdes_preemphasis_lane1_39=0x323206 +serdes_preemphasis_lane2_39=0x323206 +serdes_preemphasis_lane3_39=0x323206 + +#ce6 +serdes_preemphasis_lane0_40=0x323206 +serdes_preemphasis_lane1_40=0x2D3206 +serdes_preemphasis_lane2_40=0x2D3206 +serdes_preemphasis_lane3_40=0x2D3206 + +#ce7 +serdes_preemphasis_lane0_41=0x2D3206 +serdes_preemphasis_lane1_41=0x2D3206 +serdes_preemphasis_lane2_41=0x2D3206 +serdes_preemphasis_lane3_41=0x2D3206 + +#ce8 +serdes_preemphasis_lane0_68=0x283206 +serdes_preemphasis_lane1_68=0x283206 +serdes_preemphasis_lane2_68=0x283206 +serdes_preemphasis_lane3_68=0x283206 + +#ce9 +serdes_preemphasis_lane0_69=0x283206 +serdes_preemphasis_lane1_69=0x283206 +serdes_preemphasis_lane2_69=0x283206 +serdes_preemphasis_lane3_69=0x283206 + +#ce10 +serdes_preemphasis_lane0_70=0x2D3206 +serdes_preemphasis_lane1_70=0x2D3206 +serdes_preemphasis_lane2_70=0x2D3206 +serdes_preemphasis_lane3_70=0x2D3206 + +#ce11 +serdes_preemphasis_lane0_71=0x2D3206 +serdes_preemphasis_lane1_71=0x2D3206 +serdes_preemphasis_lane2_71=0x2D3206 +serdes_preemphasis_lane3_71=0x2D3206 + +#ce12 +serdes_preemphasis_lane0_72=0x2D3203 +serdes_preemphasis_lane1_72=0x2D3206 +serdes_preemphasis_lane2_72=0x2D3206 +serdes_preemphasis_lane3_73=0x2D3206 + +#ce13 +serdes_preemphasis_lane0_73=0x2D3206 +serdes_preemphasis_lane1_73=0x283206 +serdes_preemphasis_lane2_73=0x283206 +serdes_preemphasis_lane3_73=0x283206 + +#ce14 +serdes_preemphasis_lane0_74=0x2D3203 +serdes_preemphasis_lane1_74=0x2D3203 +serdes_preemphasis_lane2_74=0x2D3203 +serdes_preemphasis_lane3_74=0x283206 + +#ce15 +serdes_preemphasis_lane0_75=0x2D3206 +serdes_preemphasis_lane1_75=0x283206 +serdes_preemphasis_lane2_75=0x283206 +serdes_preemphasis_lane3_75=0x283206 + +#ce16 +serdes_preemphasis_lane0_102=0x2D3206 +serdes_preemphasis_lane1_102=0x2D3206 +serdes_preemphasis_lane2_102=0x2D3206 +serdes_preemphasis_lane3_102=0x2D3206 + +#ce17 +serdes_preemphasis_lane0_103=0x2D3206 +serdes_preemphasis_lane1_103=0x283206 +serdes_preemphasis_lane2_103=0x283206 +serdes_preemphasis_lane3_103=0x283206 + +#ce18 +serdes_preemphasis_lane0_104=0x2D3206 +serdes_preemphasis_lane1_104=0x283206 +serdes_preemphasis_lane2_104=0x283206 +serdes_preemphasis_lane3_104=0x283206 + +#ce19 +serdes_preemphasis_lane0_105=0x2D3206 +serdes_preemphasis_lane1_105=0x2D3206 +serdes_preemphasis_lane2_105=0x2D3206 +serdes_preemphasis_lane3_105=0x2D3206 + +#ce20 +serdes_preemphasis_lane0_108=0x323206 +serdes_preemphasis_lane1_108=0x283206 +serdes_preemphasis_lane2_108=0x283206 +serdes_preemphasis_lane3_108=0x283206 + +#ce21 +serdes_preemphasis_lane0_106=0x2D3206 +serdes_preemphasis_lane1_106=0x283206 +serdes_preemphasis_lane2_106=0x283206 +serdes_preemphasis_lane3_106=0x283206 + +#ce22 +serdes_preemphasis_lane0_1=0x323206 +serdes_preemphasis_lane1_1=0x283206 +serdes_preemphasis_lane2_1=0x283206 +serdes_preemphasis_lane3_1=0x283206 + +#ce23 +serdes_preemphasis_lane0_107=0x323206 +serdes_preemphasis_lane1_107=0x283206 +serdes_preemphasis_lane2_107=0x283206 +serdes_preemphasis_lane3_107=0x283206 + +#ce24 +serdes_preemphasis_lane0_2=0x2D3206 +serdes_preemphasis_lane1_2=0x2D3206 +serdes_preemphasis_lane2_2=0x323206 +serdes_preemphasis_lane3_3=0x2D3206 + +#ce25 +serdes_preemphasis_lane0_109=0x323203 +serdes_preemphasis_lane1_109=0x2D3206 +serdes_preemphasis_lane2_109=0x2D3206 +serdes_preemphasis_lane3_109=0x2D3206 + +#ce26 +serdes_preemphasis_lane0_8=0x373206 +serdes_preemphasis_lane1_8=0x373206 +serdes_preemphasis_lane2_8=0x373206 +serdes_preemphasis_lane3_8=0x373206 + +#ce27 +serdes_preemphasis_lane0_3=0x323203 +serdes_preemphasis_lane1_3=0x323203 +serdes_preemphasis_lane2_3=0x323203 +serdes_preemphasis_lane3_3=0x323203 + +#ce28 +serdes_preemphasis_lane0_4=0x373203 +serdes_preemphasis_lane1_4=0x323203 +serdes_preemphasis_lane2_4=0x323203 +serdes_preemphasis_lane3_4=0x323205 + +#ce29 +serdes_preemphasis_lane0_7=0x3c3203 +serdes_preemphasis_lane1_7=0x3c3203 +serdes_preemphasis_lane2_7=0x3c3203 +serdes_preemphasis_lane3_7=0x3c3205 + +#ce30 +serdes_preemphasis_lane0_5=0x3c320f +serdes_preemphasis_lane1_5=0x3c320f +serdes_preemphasis_lane2_5=0x3c320c +serdes_preemphasis_lane3_5=0x2c320c + +#ce31 +serdes_preemphasis_lane0_6=0x3c320f +serdes_preemphasis_lane1_6=0x3c320f +serdes_preemphasis_lane2_6=0x2c320c +serdes_preemphasis_lane3_6=0x2c320c + + + diff --git a/device/delta/x86_64-delta_ag9032v1-r0/default_sku b/device/delta/x86_64-delta_ag9032v1-r0/default_sku new file mode 100644 index 00000000000..f175f53b323 --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v1-r0/default_sku @@ -0,0 +1 @@ +Delta-ag9032v1 t1 diff --git a/device/delta/x86_64-delta_ag9032v1-r0/fancontrol b/device/delta/x86_64-delta_ag9032v1-r0/fancontrol new file mode 100644 index 00000000000..4a1cde92478 --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v1-r0/fancontrol @@ -0,0 +1,10 @@ +INTERVAL=10 +DEVPATH=hwmon1=/sys/bus/i2c/devices +DEVNAME=hwmon1=emc2305 +FCTEMPS=hwmon1/2-004d/hwmon/hwmon*/temp1_input hwmon1/7-004c/hwmon/hwmon*/temp1_input hwmon1/7-004d/hwmon/hwmon*/temp1_input hwmon1/7-004e/hwmon/hwmon*/temp1_input hwmon1/30-004f/hwmon/hwmon*/temp1_input hwmon1/40-0058/temp1_input hwmon1/41-0058/temp1_input + +FCFANS=hwmon1/37-002c/fan1_input hwmon1/37-002c/fan2_input hwmon1/37-002c/fan3_input hwmon1/37-002c/fan4_input hwmon1/37-002c/fan5_input hwmon1/38-002d/fan1_input hwmon1/38-002d/fan2_input hwmon1/38-002d/fan3_input hwmon1/38-002d/fan4_input hwmon1/38-002d/fan5_input +MINTEMP=20 +MAXTEMP=60 +MINSTART=75 +MINSTOP=22 diff --git a/device/delta/x86_64-delta_ag9032v1-r0/fancontrol.service b/device/delta/x86_64-delta_ag9032v1-r0/fancontrol.service new file mode 100755 index 00000000000..83f14245d1b --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v1-r0/fancontrol.service @@ -0,0 +1,289 @@ +#!/bin/bash +# +# Simple script implementing a temperature dependent fan speed control +# Supported Linux kernel versions: 2.6.5 and later +# +# Version 0.70 +# +# Usage: fancontrol [CONFIGFILE] +# +# Dependencies: +# bash, egrep, sed, cut, sleep, readlink, lm_sensors :) +# +# Please send any questions, comments or success stories to +# marius.reiner@hdev.de +# Thanks! +# +# For configuration instructions and warnings please see fancontrol.txt, which +# can be found in the doc/ directory or at the website mentioned above. +# +# +# Copyright 2003 Marius Reiner +# Copyright (C) 2007-2009 Jean Delvare +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA. +# +# + +PIDFILE="/var/run/fancontrol.pid" + +#DEBUG=1 +MAX=255 + +function LoadConfig +{ + local fcvcount fcv + + echo "Loading configuration from $1 ..." + if [ ! -r "$1" ] + then + echo "Error: Can't read configuration file" >&2 + exit 1 + fi + + # grep configuration from file + INTERVAL=`egrep '^INTERVAL=.*$' $1 | sed -e 's/INTERVAL=//g'` + DEVPATH=`egrep '^DEVPATH=.*$' $1 | sed -e 's/DEVPATH= *//g'` + DEVNAME=`egrep '^DEVNAME=.*$' $1 | sed -e 's/DEVNAME= *//g'` + FCTEMPS=`egrep '^FCTEMPS=.*$' $1 | sed -e 's/FCTEMPS=//g'` + MINTEMP=`egrep '^MINTEMP=.*$' $1 | sed -e 's/MINTEMP=//g'` + MAXTEMP=`egrep '^MAXTEMP=.*$' $1 | sed -e 's/MAXTEMP=//g'` + MINSTART=`egrep '^MINSTART=.*$' $1 | sed -e 's/MINSTART=//g'` + MINSTOP=`egrep '^MINSTOP=.*$' $1 | sed -e 's/MINSTOP=//g'` + HWMON=$( echo "$DEVPATH" | sed 's/=.*$//g') + FCDEVPATH=$( echo "$DEVPATH" | sed 's/^.*=//g') + FCMINTEMP=$MINTEMP + FCMAXTEMP=$MAXTEMP + FCMINSTART=$MINSTART + FCMINSTOP=$MINSTOP + AFCTEMP_1_LOWER=(00 39 36 41 46 55) + AFCTEMP_1_UPPER=(39 39 44 49 54 150) + AFCTEMP_2_LOWER=(00 61 65 69 73 82) + AFCTEMP_2_UPPER=(63 67 71 75 79 150) + AFCTEMP_3_LOWER=(00 51 55 59 63 71) + AFCTEMP_3_UPPER=(53 57 61 65 69 150) + AFCTEMP_4_LOWER=(00 46 50 54 58 65) + AFCTEMP_4_UPPER=(45 52 56 60 64 150) + AFCTEMP_5_LOWER=(00 46 50 54 58 65) + AFCTEMP_5_UPPER=(45 52 56 60 64 150) + + + FCFANS=`egrep '^FCFANS=.*$' $1 | sed -e 's/FCFANS=//g'` + + # Check whether all mandatory settings are set + if [[ -z ${INTERVAL} || -z ${FCTEMPS} || -z ${MINTEMP} || -z ${MAXTEMP} || -z ${MINSTART} || -z ${MINSTOP} ]] + then + echo "Some mandatory settings missing, please check your config file!" >&2 + exit 1 + fi + if [ "$INTERVAL" -le 0 ] + then + echo "Error in configuration file:" >&2 + echo "INTERVAL must be at least 1" >&2 + exit 1 + fi + + # write settings to arrays for easier use and print them + echo + echo "Common settings:" + + temp_string=$FCTEMPS + + let fcvcount=0 + for fcv in $FCTEMPS + do + fcvcount=$((fcvcount+1)) + AFCTEMP[$fcvcount]=$( echo "$temp_string" | cut -d" " -f $fcvcount ) + AFCTEMP[$fcvcount]=$( echo "${AFCTEMP[$fcvcount]}" | sed 's/hwmon1/\/sys\/bus\/i2c\/devices/g' ) + AFCTEMP_PATH[$fcvcount]=$( echo "${AFCTEMP[$fcvcount]}" | sed 's/hwmon1/\/sys\/bus\/i2c\/devices/g' ) + AFCTEMP[$fcvcount]=$( cat ${AFCTEMP[$fcvcount]} ) + AFCTEMP[$fcvcount]=$(( AFCTEMP[$fcvcount]/1000 )) + done + + fan_string=$FCFANS + fcvcount=0 + zero=0 + for fcv in $FCFANS + do + fcvcount=$((fcvcount+1)) + AFCFAN[$fcvcount]=$( echo "$fan_string" | cut -d" " -f $fcvcount ) + AFCFAN_PATH[$fcvcount]=$( echo "${AFCFAN[$fcvcount]}" | sed 's/hwmon1/\/sys\/bus\/i2c\/devices/g' ) + AFCFAN_TARGET[$fcvcount]=$( echo "${AFCFAN_PATH[$fcvcount]}" | sed 's/hwmon1/\/sys\/bus\/i2c\/devices/g' ) + AFCFAN_TARGET[$fcvcount]=$( echo "${AFCFAN_TARGET[$fcvcount]}" | sed 's/$/_percentage/g') + AFCFAN[$fcvcount]=$( cat ${AFCFAN_PATH[$fcvcount]} ) + if [ "${AFCFAN[$fcvcount]}" == 960 ] + then + AFCFAN[$fcvcount]=$zero + fi + done +} + +# Check that all referenced sysfs files exist +function CheckFiles +{ + local outdated=0 fcvcount tsen fan + if [ $outdated -eq 1 ] + then + echo >&2 + echo "At least one referenced file is missing. Either some required kernel" >&2 + echo "modules haven't been loaded, or your configuration file is outdated." >&2 + echo "In the latter case, you should run pwmconfig again." >&2 + fi + return $outdated +} + +LoadConfig $1 + +# Detect path to sensors +if [ ! -d $DIR ] +then + echo $0: 'No sensors found! (did you load the necessary modules?)' >&2 + exit 1 +fi +cd $DIR + +# Check for configuration change +if [ "$DIR" != "/" ] && [ -z "$DEVPATH" -o -z "$DEVNAME" ] +then + echo "Configuration is too old, please run pwmconfig again" >&2 + exit 1 +fi +if [ "$DIR" = "/" -a -n "$DEVPATH" ] +then + echo "Unneeded DEVPATH with absolute device paths" >&2 + exit 1 +fi +CheckFiles || exit 1 + +if [ -f "$PIDFILE" ] +then + echo "File $PIDFILE exists, is fancontrol already running?" >&2 + exit 1 +fi +echo $$ > "$PIDFILE" + +# main function +function UpdateThermalSensors +{ + fcvcount=0 + for fcv in $FCTEMPS + do + fcvcount=$((fcvcount+1)) + AFCTEMP[$fcvcount]=$( cat ${AFCTEMP_PATH[$fcvcount]} ) + AFCTEMP[$fcvcount]=$(( AFCTEMP[$fcvcount]/1000 )) + done +} + +function UpdateThermalLevel +{ + AFCTEMP_NUM=$((6-${AFCTEMP_LEVEL[$i]})) + AFCTEMP_UPPER_BUF=AFCTEMP_"$i"_UPPER["$AFCTEMP_NUM"] + AFCTEMP_LOWER_BUF=AFCTEMP_"$i"_LOWER["$AFCTEMP_NUM"] + + AFCTEMP_UPPER=${!AFCTEMP_UPPER_BUF} + AFCTEMP_LOWER=${!AFCTEMP_LOWER_BUF} + + + if (( ("${AFCTEMP[$i]}" <= "$AFCTEMP_UPPER") && ("${AFCTEMP[$i]}" >= "$AFCTEMP_LOWER") )) ; then + FLAG=2 + elif (( "${AFCTEMP[$i]}" > "$AFCTEMP_UPPER" )); then + AFCTEMP_LEVEL[$i]=$((${AFCTEMP_LEVEL[$i]} - 1)) + FLAG=1 + elif (( "${AFCTEMP[$i]}" < "$AFCTEMP_LOWER" )); then + AFCTEMP_LEVEL[$i]=$((${AFCTEMP_LEVEL[$i]} + 1)) + FLAG=1 + else + AFCTEMP_LEVEL[$i]=1 + FLAG=2 + fi +} + +function UpdateFanSpeeds +{ + #echo "num tmp lev F L H" + #Update level + for i in 1 2 3 4 5 + do + #echo "----------------------" + FLAG=0 + #FLAG=0 : initial flag + #FLAG=1 : update level + #FLAG=2 : final level + while [ $FLAG -ne 2 ] + do + UpdateThermalLevel + #echo " $i ${AFCTEMP[$i]} ${AFCTEMP_LEVEL[$i]} $FLAG $AFCTEMP_LOWER $AFCTEMP_UPPER " + done + done + + min=${AFCTEMP_LEVEL[0]} + for j in "${AFCTEMP_LEVEL[@]}"; do + (( j < min )) && min=$j + done + + if (($min == 1 || $min == 2)); then + FAN_PERCENTAGE=100 + elif (($min == 3)); then + FAN_PERCENTAGE=80 + elif (($min == 4)); then + FAN_PERCENTAGE=60 + elif (($min == 5)); then + FAN_PERCENTAGE=40 + elif (($min == 6)); then + FAN_PERCENTAGE=30 + else + FAN_PERCENTAGE=100 + fi + echo "The lowest level of thermal sensors: $min " + echo "Trying to set fan speed to $FAN_PERCENTAGE %" + #Set speed to fan1~fan10 + let fcvcount=0 + for fcv in $FCFANS + do + fcvcount=$(( fcvcount + 1 )) + echo $FAN_PERCENTAGE > ${AFCFAN_TARGET[$fcvcount]} + AFCFAN[$fcvcount]=$( cat ${AFCFAN_PATH[$fcvcount]} ) + + if [ "${AFCFAN[$fcvcount]}" == 960 ] + then + AFCFAN[$fcvcount]=$zero + fi + echo "FAN fan$fcvcount = ${AFCFAN[$fcvcount]} (rpm)" + done + + FAN_ON_PSU_PERCENTAGE=$FAN_PERCENTAGE + #Set speed to PSU_FAN1 + echo "$FAN_ON_PSU_PERCENTAGE" > '/sys/bus/i2c/devices/40-0058/fan1_set_percentage' + echo "PSU fan1 =$( cat '/sys/bus/i2c/devices/40-0058/fan1_input' ) (rpm)" + #Set speed to PSU_FAN2 + echo "$FAN_ON_PSU_PERCENTAGE" > '/sys/bus/i2c/devices/41-0058/fan1_set_percentage' + echo "PSU fan2 =$( cat '/sys/bus/i2c/devices/41-0058/fan1_input' ) (rpm)" + + rm -f "$PIDFILE" +} + +# main loop calling the main function at specified intervals +AFCTEMP_LEVEL=(9 4 4 4 4 4) #inttial level +while true +do + UpdateThermalSensors + UpdateFanSpeeds + echo "Sleep $INTERVAL seconds ..." + echo + # Sleep while still handling signals + sleep $INTERVAL & + wait $! +done diff --git a/device/delta/x86_64-delta_ag9032v1-r0/installer.conf b/device/delta/x86_64-delta_ag9032v1-r0/installer.conf new file mode 100644 index 00000000000..85ed43ab48e --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v1-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_SPEED=115200 +CONSOLE_DEV=0 diff --git a/device/delta/x86_64-delta_ag9032v1-r0/led_proc_init.soc b/device/delta/x86_64-delta_ag9032v1-r0/led_proc_init.soc new file mode 100644 index 00000000000..7f6789e9012 --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v1-r0/led_proc_init.soc @@ -0,0 +1,45 @@ +s CMIC_LEDUP0_PROGRAM_RAM 0 +s CMIC_LEDUP1_PROGRAM_RAM 0 + +led 0 stop +led 0 prog 02 00 60 E0 86 ED 2E E0 32 08 97 02 00 0E 00 60 E3 2E E0 32 00 32 01 B7 97 02 00 0E 00 12 E7 50 86 E0 86 E0 86 E0 86 E0 16 E7 61 EB 06 E3 67 4E 67 66 67 66 67 66 67 66 67 66 67 66 67 66 67 66 67 66 67 66 67 66 06 E0 D2 40 74 06 3A C0 D2 01 74 66 06 EB D2 00 70 62 16 ED 99 99 1A 00 71 62 77 66 32 0F 87 57 32 0E 87 57 +led 0 auto on +led 0 start +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=31 REMAP_PORT_1=30 REMAP_PORT_2=29 REMAP_PORT_3=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=27 REMAP_PORT_5=26 REMAP_PORT_6=25 REMAP_PORT_7=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=23 REMAP_PORT_9=22 REMAP_PORT_10=21 REMAP_PORT_11=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=19 REMAP_PORT_13=18 REMAP_PORT_14=17 REMAP_PORT_15=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=15 REMAP_PORT_17=14 REMAP_PORT_18=13 REMAP_PORT_19=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=11 REMAP_PORT_21=10 REMAP_PORT_22=9 REMAP_PORT_23=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=7 REMAP_PORT_25=6 REMAP_PORT_26=5 REMAP_PORT_27=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=3 REMAP_PORT_29=2 REMAP_PORT_30=1 REMAP_PORT_31=0 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=63 REMAP_PORT_33=62 REMAP_PORT_34=61 REMAP_PORT_35=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=59 REMAP_PORT_37=58 REMAP_PORT_38=57 REMAP_PORT_39=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=55 REMAP_PORT_41=54 REMAP_PORT_42=53 REMAP_PORT_43=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=51 REMAP_PORT_45=50 REMAP_PORT_46=49 REMAP_PORT_47=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=47 REMAP_PORT_49=46 REMAP_PORT_50=45 REMAP_PORT_51=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=43 REMAP_PORT_53=42 REMAP_PORT_54=41 REMAP_PORT_55=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=39 REMAP_PORT_57=38 REMAP_PORT_58=37 REMAP_PORT_59=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=35 REMAP_PORT_61=34 REMAP_PORT_62=33 REMAP_PORT_63=32 + +led 1 stop +led 1 prog 02 00 60 E0 86 ED 2E E0 32 08 97 02 00 0E 00 60 E3 2E E0 32 00 32 01 B7 97 02 00 0E 00 12 E7 50 86 E0 86 E0 86 E0 86 E0 16 E7 61 EB 06 E3 67 4E 67 66 67 66 67 66 67 66 67 66 67 66 67 66 67 66 67 66 67 66 67 66 06 E0 D2 40 74 06 3A C0 D2 01 74 66 06 EB D2 00 70 62 16 ED 99 99 1A 00 71 62 77 66 32 0F 87 57 32 0E 87 57 +led 1 auto on +led 1 start +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=3 REMAP_PORT_1=2 REMAP_PORT_2=1 REMAP_PORT_3=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=7 REMAP_PORT_5=6 REMAP_PORT_6=5 REMAP_PORT_7=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=11 REMAP_PORT_9=10 REMAP_PORT_10=9 REMAP_PORT_11=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=15 REMAP_PORT_13=14 REMAP_PORT_14=13 REMAP_PORT_15=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=19 REMAP_PORT_17=18 REMAP_PORT_18=17 REMAP_PORT_19=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=23 REMAP_PORT_21=22 REMAP_PORT_22=21 REMAP_PORT_23=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=27 REMAP_PORT_25=26 REMAP_PORT_26=25 REMAP_PORT_27=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=31 REMAP_PORT_29=30 REMAP_PORT_30=29 REMAP_PORT_31=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=35 REMAP_PORT_33=34 REMAP_PORT_34=33 REMAP_PORT_35=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=39 REMAP_PORT_37=38 REMAP_PORT_38=37 REMAP_PORT_39=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=43 REMAP_PORT_41=42 REMAP_PORT_42=41 REMAP_PORT_43=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=47 REMAP_PORT_45=46 REMAP_PORT_46=45 REMAP_PORT_47=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 REMAP_PORT_49=50 REMAP_PORT_50=49 REMAP_PORT_51=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 REMAP_PORT_53=54 REMAP_PORT_54=53 REMAP_PORT_55=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 REMAP_PORT_57=58 REMAP_PORT_58=57 REMAP_PORT_59=56 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=62 REMAP_PORT_62=61 REMAP_PORT_63=60 + diff --git a/device/delta/x86_64-delta_ag9032v1-r0/plugins/eeprom.py b/device/delta/x86_64-delta_ag9032v1-r0/plugins/eeprom.py new file mode 100644 index 00000000000..786e1fdc85e --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v1-r0/plugins/eeprom.py @@ -0,0 +1,32 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + _TLV_INFO_MAX_LEN = 256 + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-2/2-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/delta/x86_64-delta_ag9032v1-r0/plugins/psuutil.py b/device/delta/x86_64-delta_ag9032v1-r0/plugins/psuutil.py new file mode 100644 index 00000000000..4b370d9a744 --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v1-r0/plugins/psuutil.py @@ -0,0 +1,57 @@ +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/{}-0058/" + self.psu_oper_status = "in1_input" + self.psu_presence = "i2cget -y {} 0x50 0x00" + + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + if index is None: + return False + Base_bus_number = 39 + status = 0 + #index from 1, psu attribute bus from 40 + try: + with open(self.psu_path.format(index + Base_bus_number) + self.psu_oper_status, 'r') as power_status: + if int(power_status.read()) == 0 : + return False + else: + status = 1 + except IOError: + return False + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + Base_bus_number = 39 + status = 0 + try: + p = os.popen(self.psu_presence.format(index + Base_bus_number)+ "> /dev/null 2>&1") + if p.readline() != None: + status = 1 + p.close() + except IOError: + return False + return status == 1 + + diff --git a/device/delta/x86_64-delta_ag9032v1-r0/plugins/sfputil.py b/device/delta/x86_64-delta_ag9032v1-r0/plugins/sfputil.py new file mode 100644 index 00000000000..748e2b6643f --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v1-r0/plugins/sfputil.py @@ -0,0 +1,183 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 31 + PORTS_IN_BLOCK = 32 + + EEPROM_OFFSET = 50 + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/delta-ag9032v1-swpld.0/sfp_present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/delta-ag9032v1-swpld.0/sfp_lpmode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/delta-ag9032v1-swpld.0/sfp_lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/devices/platform/delta-ag9032v1-swpld.0/sfp_reset" + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/delta/x86_64-delta_ag9032v1-r0/sensors.conf b/device/delta/x86_64-delta_ag9032v1-r0/sensors.conf new file mode 100644 index 00000000000..d3b2aea2a5a --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v1-r0/sensors.conf @@ -0,0 +1,61 @@ +# libsensors configuration file for DCS-7060CX-32S +# ------------------------------------------------ +# + +bus "i2c-2" "i2c-1-mux (chan_id 0)" +bus "i2c-3" "i2c-1-mux (chan_id 1)" +bus "i2c-4" "i2c-1-mux (chan_id 2)" +bus "i2c-7" "i2c-1-mux (chan_id 5)" + + +# tmp75-i2c-2-4d CPU below side thermal sensor. +# tmp75-i2c-3-4f Wind thermal sensor. +# tmp75-i2c-7-4c MAC up side thermal sensor. +# tmp75-i2c-7-4d MAC down side thermal sensor. +# tmp75-i2c-7-4e Surroundings thermal sensor. + +chip "tmp75-i2c-2-4d" + label temp1 "CPU below side thermal sensor" + set temp1_max 60 + set temp1_max_hyst 55 + +chip "tmp75-i2c-*-4f" + label temp1 "Wind thermal sensor" + set temp1_max 65 + set temp1_max_hyst 60 +chip "tmp75-i2c-7-4c" + label temp1 "MAC up side thermal sensor" + set temp1_max 80 + set temp1_max_hyst 75 +chip "tmp75-i2c-7-4d" + label temp1 "MAC down side thermal sensor" + set temp1_max 75 + set temp1_max_hyst 70 +chip "tmp75-i2c-7-4e" + label temp1 "Surroundings thermal sensor" + set temp1_max 65 + set temp1_max_hyst 60 + + +chip "emc2305-i2c-3-2d" + label fan1 "FANTRAY 1 REAR" + label fan2 "FANTRAY 2 REAR" + label fan3 "FANTRAY 3 REAR" + label fan4 "FANTRAY 4 REAR" + label fan5 "FANTRAY 5 REAR" +chip "emc2305-i2c-3-2c" + label fan1 "FANTRAY 1 FRONT" + label fan2 "FANTRAY 2 FRONT" + label fan3 "FANTRAY 3 FRONT" + label fan4 "FANTRAY 4 FRONT" + label fan5 "FANTRAY 5 FRONT" +chip "pmbus-i2c-4-50" + label temp1 "Fan of power supply controller 1 sensor 1" + label temp2 "Fan of Power supply controller 1 sensor 2" + +chip "pmbus-i2c-4-40" + label temp1 "Power supply 1 hotspot sensor" + +chip "pmbus-i2c-4-40" + label temp1 "Power supply 2 hotspot sensor" + diff --git a/device/delta/x86_64-delta_ag9032v2a-r0/Delta-ag9032v2a/port_config.ini b/device/delta/x86_64-delta_ag9032v2a-r0/Delta-ag9032v2a/port_config.ini new file mode 100644 index 00000000000..9eb4ac0c8a0 --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v2a-r0/Delta-ag9032v2a/port_config.ini @@ -0,0 +1,34 @@ +# name lanes alias index speed +Ethernet0 1,2,3,4 hundredGigE1/1 0 100000 +Ethernet4 5,6,7,8 hundredGigE1/2 1 100000 +Ethernet8 9,10,11,12 hundredGigE1/3 2 100000 +Ethernet12 13,14,15,16 hundredGigE1/4 3 100000 +Ethernet16 17,18,19,20 hundredGigE1/5 4 100000 +Ethernet20 21,22,23,24 hundredGigE1/6 5 100000 +Ethernet24 25,26,27,28 hundredGigE1/7 6 100000 +Ethernet28 29,30,31,32 hundredGigE1/8 7 100000 +Ethernet32 33,34,35,36 hundredGigE1/9 8 100000 +Ethernet36 37,38,39,40 hundredGigE1/10 9 100000 +Ethernet40 41,42,43,44 hundredGigE1/11 10 100000 +Ethernet44 45,46,47,48 hundredGigE1/12 11 100000 +Ethernet48 49,50,51,52 hundredGigE1/13 12 100000 +Ethernet52 53,54,55,56 hundredGigE1/14 13 100000 +Ethernet56 57,58,59,60 hundredGigE1/15 14 100000 +Ethernet60 61,62,63,64 hundredGigE1/16 15 100000 +Ethernet64 65,66,67,68 hundredGigE1/17 16 100000 +Ethernet68 69,70,71,72 hundredGigE1/18 17 100000 +Ethernet72 73,74,75,76 hundredGigE1/19 18 100000 +Ethernet76 77,78,79,80 hundredGigE1/20 19 100000 +Ethernet80 81,82,83,84 hundredGigE1/21 20 100000 +Ethernet84 85,86,87,88 hundredGigE1/22 21 100000 +Ethernet88 89,90,91,92 hundredGigE1/23 22 100000 +Ethernet92 93,94,95,96 hundredGigE1/24 23 100000 +Ethernet96 97,98,99,100 hundredGigE1/25 24 100000 +Ethernet100 101,102,103,104 hundredGigE1/26 25 100000 +Ethernet104 105,106,107,108 hundredGigE1/27 26 100000 +Ethernet108 109,110,111,112 hundredGigE1/28 27 100000 +Ethernet112 113,114,115,116 hundredGigE1/29 28 100000 +Ethernet116 117,118,119,120 hundredGigE1/30 29 100000 +Ethernet120 121,122,123,124 hundredGigE1/31 30 100000 +Ethernet124 125,126,127,128 hundredGigE1/32 31 100000 +Ethernet128 129 tenGigE1/33 32 10000 diff --git a/device/delta/x86_64-delta_ag9032v2a-r0/Delta-ag9032v2a/sai.profile b/device/delta/x86_64-delta_ag9032v2a-r0/Delta-ag9032v2a/sai.profile new file mode 100644 index 00000000000..f0eccb02825 --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v2a-r0/Delta-ag9032v2a/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-ag9032v2a-32x100G+1x10G.config.bcm diff --git a/device/delta/x86_64-delta_ag9032v2a-r0/Delta-ag9032v2a/td3-ag9032v2a-32x100G+1x10G.config.bcm b/device/delta/x86_64-delta_ag9032v2a-r0/Delta-ag9032v2a/td3-ag9032v2a-32x100G+1x10G.config.bcm new file mode 100755 index 00000000000..4c6ceb075bf --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v2a-r0/Delta-ag9032v2a/td3-ag9032v2a-32x100G+1x10G.config.bcm @@ -0,0 +1,389 @@ +pbmp_oversubscribe=0x00003fc000000ff0000003fc000001fe +pbmp_xport_xe=0xffffffffffffffffffffffffffffffffffff +core_clock_frequency=1525 +dpp_clock_ratio=2:3 +oversubscribe_mode=1 +parity_enable=0 +mem_cache_enable=0 +l2_mem_entries=32768 +l3_mem_entries=16384 +fpem_mem_entries=131072 +l2xmsg_mode=1 +bcm_num_cos=8 +bcm_stat_interval=2000000 +cdma_timeout_usec=3000000 +ipv6_lpm_128b_enable=0x1 +l3_max_ecmp_mode=1 +lpm_scaling_enable=0 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +schan_intr_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 +skip_L2_USER_ENTRY=0 +bcm_tunnel_term_compatible_mode=1 +phy_an_c73=1 +ifp_inports_support_enable=1 +port_flex_enable=1 + +phy_chain_rx_lane_map_physical{1.0}=0x3120 +phy_chain_rx_lane_map_physical{101.0}=0x3120 +phy_chain_rx_lane_map_physical{105.0}=0x1302 +phy_chain_rx_lane_map_physical{109.0}=0x3120 +phy_chain_rx_lane_map_physical{113.0}=0x3120 +phy_chain_rx_lane_map_physical{117.0}=0x1302 +phy_chain_rx_lane_map_physical{121.0}=0x3120 +phy_chain_rx_lane_map_physical{125.0}=0x1302 +phy_chain_rx_lane_map_physical{13.0}=0x2031 +phy_chain_rx_lane_map_physical{17.0}=0x3120 +phy_chain_rx_lane_map_physical{21.0}=0x2031 +phy_chain_rx_lane_map_physical{25.0}=0x3120 +phy_chain_rx_lane_map_physical{29.0}=0x2031 +phy_chain_rx_lane_map_physical{33.0}=0x1302 +phy_chain_rx_lane_map_physical{37.0}=0x2031 +phy_chain_rx_lane_map_physical{41.0}=0x3120 +phy_chain_rx_lane_map_physical{45.0}=0x2031 +phy_chain_rx_lane_map_physical{49.0}=0x3120 +phy_chain_rx_lane_map_physical{5.0}=0x2031 +phy_chain_rx_lane_map_physical{53.0}=0x2031 +phy_chain_rx_lane_map_physical{57.0}=0x3120 +phy_chain_rx_lane_map_physical{61.0}=0x2031 +phy_chain_rx_lane_map_physical{65.0}=0x1302 +phy_chain_rx_lane_map_physical{69.0}=0x3120 +phy_chain_rx_lane_map_physical{73.0}=0x2031 +phy_chain_rx_lane_map_physical{77.0}=0x3120 +phy_chain_rx_lane_map_physical{81.0}=0x1302 +phy_chain_rx_lane_map_physical{85.0}=0x3120 +phy_chain_rx_lane_map_physical{89.0}=0x1302 +phy_chain_rx_lane_map_physical{9.0}=0x3120 +phy_chain_rx_lane_map_physical{93.0}=0x3120 +phy_chain_rx_lane_map_physical{97.0}=0x1302 +phy_chain_rx_polarity_flip_physical{1.0}=0x1 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{104.0}=0x1 +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{109.0}=0x1 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{118.0}=0x1 +phy_chain_rx_polarity_flip_physical{119.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{125.0}=0x1 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_polarity_flip_physical{129.0}=0xf +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 +phy_chain_rx_polarity_flip_physical{17.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x1 +phy_chain_rx_polarity_flip_physical{28.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{53.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{83.0}=0x1 +phy_chain_rx_polarity_flip_physical{84.0}=0x1 +phy_chain_rx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{88.0}=0x1 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x1 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 +phy_chain_rx_polarity_flip_physical{97.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_lane_map_physical{1.0}=0x0213 +phy_chain_tx_lane_map_physical{101.0}=0x0213 +phy_chain_tx_lane_map_physical{105.0}=0x2031 +phy_chain_tx_lane_map_physical{109.0}=0x0213 +phy_chain_tx_lane_map_physical{113.0}=0x0213 +phy_chain_tx_lane_map_physical{117.0}=0x2031 +phy_chain_tx_lane_map_physical{121.0}=0x0213 +phy_chain_tx_lane_map_physical{125.0}=0x2031 +phy_chain_tx_lane_map_physical{13.0}=0x1302 +phy_chain_tx_lane_map_physical{17.0}=0x0213 +phy_chain_tx_lane_map_physical{21.0}=0x1302 +phy_chain_tx_lane_map_physical{25.0}=0x0213 +phy_chain_tx_lane_map_physical{29.0}=0x1302 +phy_chain_tx_lane_map_physical{33.0}=0x2031 +phy_chain_tx_lane_map_physical{37.0}=0x1302 +phy_chain_tx_lane_map_physical{41.0}=0x0231 +phy_chain_tx_lane_map_physical{45.0}=0x1302 +phy_chain_tx_lane_map_physical{49.0}=0x0213 +phy_chain_tx_lane_map_physical{5.0}=0x1302 +phy_chain_tx_lane_map_physical{53.0}=0x1302 +phy_chain_tx_lane_map_physical{57.0}=0x0213 +phy_chain_tx_lane_map_physical{61.0}=0x1302 +phy_chain_tx_lane_map_physical{65.0}=0x2031 +phy_chain_tx_lane_map_physical{69.0}=0x0213 +phy_chain_tx_lane_map_physical{73.0}=0x3210 +phy_chain_tx_lane_map_physical{77.0}=0x0213 +phy_chain_tx_lane_map_physical{81.0}=0x2031 +phy_chain_tx_lane_map_physical{85.0}=0x0213 +phy_chain_tx_lane_map_physical{89.0}=0x2031 +phy_chain_tx_lane_map_physical{9.0}=0x0213 +phy_chain_tx_lane_map_physical{93.0}=0x0213 +phy_chain_tx_lane_map_physical{97.0}=0x2031 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_tx_polarity_flip_physical{104.0}=0x1 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_tx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x1 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x1 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x0 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_tx_polarity_flip_physical{120.0}=0x1 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_tx_polarity_flip_physical{21.0}=0x1 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x1 +phy_chain_tx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x1 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{53.0}=0x1 +phy_chain_tx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x0 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 +phy_chain_tx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x1 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x1 +phy_chain_tx_polarity_flip_physical{83.0}=0x0 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x0 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x1 +phy_chain_tx_polarity_flip_physical{91.0}=0x0 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_tx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x1 +phy_chain_tx_polarity_flip_physical{99.0}=0x0 +portmap_66.0=129:10:m +portmap_103=101:100 +portmap_107=105:100 +portmap_111=109:100 +portmap_115=113:100 +portmap_119=117:100 +portmap_123=121:100 +portmap_127=125:100 +portmap_13=13:100 +portmap_17=17:100 +portmap_1=1:100 +portmap_21=21:100 +portmap_25=25:100 +portmap_29=29:100 +portmap_33=33:100 +portmap_37=37:100 +portmap_41=41:100 +portmap_45=45:100 +portmap_49=49:100 +portmap_53=53:100 +portmap_57=57:100 +portmap_5=5:100 +portmap_61=61:100 +portmap_67=65:100 +portmap_71=69:100 +portmap_75=73:100 +portmap_79=77:100 +portmap_83=81:100 +portmap_87=85:100 +portmap_91=89:100 +portmap_95=93:100 +portmap_99=97:100 +portmap_9=9:100 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 +ptp_ts_pll_fref=50000000 + + diff --git a/device/delta/x86_64-delta_ag9032v2a-r0/default_sku b/device/delta/x86_64-delta_ag9032v2a-r0/default_sku new file mode 100644 index 00000000000..2e67043ab05 --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v2a-r0/default_sku @@ -0,0 +1 @@ +Delta-ag9032v2a t1 diff --git a/device/delta/x86_64-delta_ag9032v2a-r0/installer.conf b/device/delta/x86_64-delta_ag9032v2a-r0/installer.conf new file mode 100644 index 00000000000..85ed43ab48e --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v2a-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_SPEED=115200 +CONSOLE_DEV=0 diff --git a/device/delta/x86_64-delta_ag9032v2a-r0/plugins/eeprom.py b/device/delta/x86_64-delta_ag9032v2a-r0/plugins/eeprom.py new file mode 100644 index 00000000000..fc741c11e9e --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v2a-r0/plugins/eeprom.py @@ -0,0 +1,32 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + _TLV_INFO_MAX_LEN = 256 + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-1/1-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/delta/x86_64-delta_ag9032v2a-r0/plugins/psuutil.py b/device/delta/x86_64-delta_ag9032v2a-r0/plugins/psuutil.py new file mode 100644 index 00000000000..93936664c1c --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v2a-r0/plugins/psuutil.py @@ -0,0 +1,85 @@ +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# + +import os.path +import subprocess + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + status = 0 + try: + p = os.popen("ipmitool raw 0x38 0x2 3 0x6a 0x3 1") + content = p.readline().rstrip() + reg_value = int(content, 16) + if index == 1: + mask = (1 << 6) + else: + mask = (1 << 2) + if reg_value & mask == 0: + return False + status = 1 + p.close() + except IOError: + return False + return status == 1 + + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + status = 0 + try: + p = os.popen("ipmitool raw 0x38 0x2 3 0x6a 0x3 1") + content = p.readline().rstrip() + reg_value = int(content, 16) + if index == 1: + mask = (1 << 7) + if reg_value & mask == 0x80: + return False + else: + mask = (1 << 3) + if reg_value & mask == 0x08: + return False + status = 1 + p.close() + except IOError: + return False + return status == 1 + diff --git a/device/delta/x86_64-delta_ag9032v2a-r0/plugins/sfputil.py b/device/delta/x86_64-delta_ag9032v2a-r0/plugins/sfputil.py new file mode 100644 index 00000000000..9abaa8cf01c --- /dev/null +++ b/device/delta/x86_64-delta_ag9032v2a-r0/plugins/sfputil.py @@ -0,0 +1,183 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 32 + PORTS_IN_BLOCK = 33 + + EEPROM_OFFSET = 20 + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORT_END - self.PORT_START + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/delta-ag9032v2a-swpld1.0/sfp_is_present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (self.port_end - port_num + 7)) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end - 1: + return False + + try: + reg_file = open("/sys/devices/platform/delta-ag9032v2a-swpld1.0/qsfp_lpmode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (self.port_end - port_num) - 1) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end - 1: + return False + + try: + reg_file = open("/sys/devices/platform/delta-ag9032v2a-swpld1.0/qsfp_lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (self.port_end - port_num) - 1) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/devices/platform/delta-ag9032v2a-swpld1.0/qsfp_reset" + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end - 1: + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (self.port_end - port_num) - 1) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/delta/x86_64-delta_ag9064-r0/Delta-ag9064/port_config.ini b/device/delta/x86_64-delta_ag9064-r0/Delta-ag9064/port_config.ini new file mode 100644 index 00000000000..ee425d4ad4f --- /dev/null +++ b/device/delta/x86_64-delta_ag9064-r0/Delta-ag9064/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias index speed +Ethernet0 49,50,51,52 hundredGigE1/1 0 100000 +Ethernet4 53,54,55,56 hundredGigE1/2 1 100000 +Ethernet8 65,66,67,68 hundredGigE1/3 2 100000 +Ethernet12 69,70,71,72 hundredGigE1/4 3 100000 +Ethernet16 81,82,83,84 hundredGigE1/5 4 100000 +Ethernet20 85,86,87,88 hundredGigE1/6 5 100000 +Ethernet24 1,2,3,4 hundredGigE1/7 6 100000 +Ethernet28 101,102,103,104 hundredGigE1/8 7 100000 +Ethernet32 5,6,7,8 hundredGigE1/9 8 100000 +Ethernet36 17,18,19,20 hundredGigE1/10 9 100000 +Ethernet40 21,22,23,24 hundredGigE1/11 10 100000 +Ethernet44 33,34,35,36 hundredGigE1/12 11 100000 +Ethernet48 37,38,39,40 hundredGigE1/13 12 100000 +Ethernet52 97,98,99,100 hundredGigE1/14 13 100000 +Ethernet56 113,114,115,116 hundredGigE1/15 14 100000 +Ethernet60 117,118,119,120 hundredGigE1/16 15 100000 +Ethernet64 129,130,131,132 hundredGigE1/17 16 100000 +Ethernet68 133,134,135,136 hundredGigE1/18 17 100000 +Ethernet72 145,146,147,148 hundredGigE1/19 18 100000 +Ethernet76 209,210,211,212 hundredGigE1/20 19 100000 +Ethernet80 213,214,215,216 hundredGigE1/21 20 100000 +Ethernet84 225,226,227,228 hundredGigE1/22 21 100000 +Ethernet88 229,230,231,232 hundredGigE1/23 22 100000 +Ethernet92 241,242,243,244 hundredGigE1/24 23 100000 +Ethernet96 245,246,247,248 hundredGigE1/25 24 100000 +Ethernet100 157,158,159,160 hundredGigE1/26 25 100000 +Ethernet104 161,162,163,164 hundredGigE1/27 26 100000 +Ethernet108 165,166,167,168 hundredGigE1/28 27 100000 +Ethernet112 177,178,179,180 hundredGigE1/29 28 100000 +Ethernet116 181,182,183,184 hundredGigE1/30 29 100000 +Ethernet120 193,194,195,196 hundredGigE1/31 30 100000 +Ethernet124 197,198,199,200 hundredGigE1/32 31 100000 +Ethernet128 61,62,63,64 hundredGigE1/33 32 100000 +Ethernet132 57,58,59,60 hundredGigE1/34 33 100000 +Ethernet136 77,78,79,80 hundredGigE1/35 34 100000 +Ethernet140 73,74,75,76 hundredGigE1/36 35 100000 +Ethernet144 93,94,95,96 hundredGigE1/37 36 100000 +Ethernet148 89,90,91,92 hundredGigE1/38 37 100000 +Ethernet152 105,106,107,108 hundredGigE1/39 38 100000 +Ethernet156 9,10,11,12 hundredGigE1/40 39 100000 +Ethernet160 25,26,27,28 hundredGigE1/41 40 100000 +Ethernet164 13,14,15,16 hundredGigE1/42 41 100000 +Ethernet168 41,42,43,44 hundredGigE1/43 42 100000 +Ethernet172 29,30,31,32 hundredGigE1/44 43 100000 +Ethernet176 45,46,47,48 hundredGigE1/45 44 100000 +Ethernet180 109,110,111,112 hundredGigE1/46 45 100000 +Ethernet184 125,126,127,128 hundredGigE1/47 46 100000 +Ethernet188 121,122,123,124 hundredGigE1/48 47 100000 +Ethernet192 141,142,143,144 hundredGigE1/49 48 100000 +Ethernet196 137,138,139,140 hundredGigE1/50 49 100000 +Ethernet200 217,218,219,220 hundredGigE1/51 50 100000 +Ethernet204 149,150,151,152 hundredGigE1/52 51 100000 +Ethernet208 233,234,235,236 hundredGigE1/53 52 100000 +Ethernet212 221,222,223,224 hundredGigE1/54 53 100000 +Ethernet216 249,250,251,252 hundredGigE1/55 54 100000 +Ethernet220 237,238,239,240 hundredGigE1/56 55 100000 +Ethernet224 153,154,155,156 hundredGigE1/57 56 100000 +Ethernet228 253,254,255,256 hundredGigE1/58 57 100000 +Ethernet232 173,174,175,176 hundredGigE1/59 58 100000 +Ethernet236 169,170,171,172 hundredGigE1/60 59 100000 +Ethernet240 189,190,191,192 hundredGigE1/61 60 100000 +Ethernet244 185,186,187,188 hundredGigE1/62 61 100000 +Ethernet248 205,206,207,208 hundredGigE1/63 62 100000 +Ethernet252 201,202,203,204 hundredGigE1/64 63 100000 diff --git a/device/delta/x86_64-delta_ag9064-r0/Delta-ag9064/sai.profile b/device/delta/x86_64-delta_ag9064-r0/Delta-ag9064/sai.profile new file mode 100644 index 00000000000..21f013773e6 --- /dev/null +++ b/device/delta/x86_64-delta_ag9064-r0/Delta-ag9064/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-ag9064-64x100G.config.bcm diff --git a/device/delta/x86_64-delta_ag9064-r0/Delta-ag9064/th2-ag9064-64x100G.config.bcm b/device/delta/x86_64-delta_ag9064-r0/Delta-ag9064/th2-ag9064-64x100G.config.bcm new file mode 100644 index 00000000000..eae7278a3ab --- /dev/null +++ b/device/delta/x86_64-delta_ag9064-r0/Delta-ag9064/th2-ag9064-64x100G.config.bcm @@ -0,0 +1,795 @@ +core_clock_frequency=1700 +dport_map_enable=1 +dport_map_port_102=31 +dport_map_port_103=32 +dport_map_port_104=64 +dport_map_port_105=63 +dport_map_port_106=20 +dport_map_port_107=21 +dport_map_port_108=51 +dport_map_port_109=54 +dport_map_port_10=13 +dport_map_port_110=22 +dport_map_port_111=23 +dport_map_port_112=53 +dport_map_port_113=56 +dport_map_port_114=24 +dport_map_port_115=25 +dport_map_port_116=55 +dport_map_port_117=58 +dport_map_port_11=43 +dport_map_port_12=45 +dport_map_port_13=1 +dport_map_port_14=2 +dport_map_port_15=34 +dport_map_port_16=33 +dport_map_port_1=7 +dport_map_port_2=9 +dport_map_port_34=3 +dport_map_port_35=4 +dport_map_port_36=36 +dport_map_port_37=35 +dport_map_port_38=5 +dport_map_port_39=6 +dport_map_port_3=40 +dport_map_port_40=38 +dport_map_port_41=37 +dport_map_port_42=14 +dport_map_port_43=8 +dport_map_port_44=39 +dport_map_port_45=46 +dport_map_port_46=15 +dport_map_port_47=16 +dport_map_port_48=48 +dport_map_port_49=47 +dport_map_port_4=42 +dport_map_port_5=10 +dport_map_port_68=17 +dport_map_port_69=18 +dport_map_port_6=11 +dport_map_port_70=50 +dport_map_port_71=49 +dport_map_port_72=19 +dport_map_port_73=52 +dport_map_port_74=57 +dport_map_port_75=26 +dport_map_port_76=27 +dport_map_port_77=28 +dport_map_port_78=60 +dport_map_port_79=59 +dport_map_port_7=41 +dport_map_port_80=29 +dport_map_port_81=30 +dport_map_port_82=62 +dport_map_port_83=61 +dport_map_port_8=44 +dport_map_port_9=12 +dpp_clock_ratio=2:3 +fpem_mem_entries=65536 +l2_mem_entries=40960 +l2xmsg_mode=1 +l3_mem_entries=40960 +mem_cache_enable=0 +os=unix +oversubscribe_mode=1 +parity_correction=0 +parity_enable=0 +pbmp_xport_xe=0x40003ffff0000ffffc0003fffe0001fffe +phy_chain_rx_lane_map_physical{1.0}=0x2130 +phy_chain_rx_lane_map_physical{101.0}=0x2310 +phy_chain_rx_lane_map_physical{105.0}=0x3021 +phy_chain_rx_lane_map_physical{109.0}=0x0213 +phy_chain_rx_lane_map_physical{113.0}=0x1302 +phy_chain_rx_lane_map_physical{117.0}=0x0312 +phy_chain_rx_lane_map_physical{121.0}=0x1203 +phy_chain_rx_lane_map_physical{125.0}=0x3021 +phy_chain_rx_lane_map_physical{129.0}=0x1302 +phy_chain_rx_lane_map_physical{13.0}=0x2310 +phy_chain_rx_lane_map_physical{133.0}=0x2310 +phy_chain_rx_lane_map_physical{137.0}=0x1023 +phy_chain_rx_lane_map_physical{141.0}=0x2031 +phy_chain_rx_lane_map_physical{145.0}=0x1032 +phy_chain_rx_lane_map_physical{149.0}=0x1203 +phy_chain_rx_lane_map_physical{153.0}=0x2310 +phy_chain_rx_lane_map_physical{157.0}=0x2013 +phy_chain_rx_lane_map_physical{161.0}=0x2103 +phy_chain_rx_lane_map_physical{165.0}=0x3012 +phy_chain_rx_lane_map_physical{169.0}=0x1320 +phy_chain_rx_lane_map_physical{17.0}=0x0213 +phy_chain_rx_lane_map_physical{173.0}=0x2301 +phy_chain_rx_lane_map_physical{177.0}=0x1032 +phy_chain_rx_lane_map_physical{181.0}=0x1032 +phy_chain_rx_lane_map_physical{185.0}=0x3210 +phy_chain_rx_lane_map_physical{189.0}=0x2103 +phy_chain_rx_lane_map_physical{193.0}=0x1032 +phy_chain_rx_lane_map_physical{197.0}=0x1032 +phy_chain_rx_lane_map_physical{201.0}=0x2301 +phy_chain_rx_lane_map_physical{205.0}=0x2301 +phy_chain_rx_lane_map_physical{209.0}=0x2103 +phy_chain_rx_lane_map_physical{21.0}=0x3120 +phy_chain_rx_lane_map_physical{213.0}=0x3201 +phy_chain_rx_lane_map_physical{217.0}=0x2301 +phy_chain_rx_lane_map_physical{221.0}=0x2301 +phy_chain_rx_lane_map_physical{225.0}=0x0123 +phy_chain_rx_lane_map_physical{229.0}=0x1302 +phy_chain_rx_lane_map_physical{233.0}=0x3120 +phy_chain_rx_lane_map_physical{237.0}=0x0123 +phy_chain_rx_lane_map_physical{241.0}=0x2310 +phy_chain_rx_lane_map_physical{245.0}=0x0312 +phy_chain_rx_lane_map_physical{249.0}=0x3021 +phy_chain_rx_lane_map_physical{25.0}=0x1203 +phy_chain_rx_lane_map_physical{253.0}=0x2013 +phy_chain_rx_lane_map_physical{29.0}=0x3012 +phy_chain_rx_lane_map_physical{33.0}=0x3210 +phy_chain_rx_lane_map_physical{37.0}=0x3210 +phy_chain_rx_lane_map_physical{41.0}=0x1230 +phy_chain_rx_lane_map_physical{45.0}=0x2013 +phy_chain_rx_lane_map_physical{49.0}=0x2301 +phy_chain_rx_lane_map_physical{5.0}=0x2031 +phy_chain_rx_lane_map_physical{53.0}=0x3210 +phy_chain_rx_lane_map_physical{57.0}=0x1203 +phy_chain_rx_lane_map_physical{61.0}=0x0231 +phy_chain_rx_lane_map_physical{65.0}=0x2301 +phy_chain_rx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{73.0}=0x2013 +phy_chain_rx_lane_map_physical{77.0}=0x3012 +phy_chain_rx_lane_map_physical{81.0}=0x2301 +phy_chain_rx_lane_map_physical{85.0}=0x3210 +phy_chain_rx_lane_map_physical{89.0}=0x2013 +phy_chain_rx_lane_map_physical{9.0}=0x0312 +phy_chain_rx_lane_map_physical{93.0}=0x3012 +phy_chain_rx_lane_map_physical{97.0}=0x1320 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{102.0}=0x1 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{109.0}=0x1 +phy_chain_rx_polarity_flip_physical{11.0}=0x1 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{112.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{117.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 +phy_chain_rx_polarity_flip_physical{120.0}=0x1 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 +phy_chain_rx_polarity_flip_physical{125.0}=0x1 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x1 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{133.0}=0x0 +phy_chain_rx_polarity_flip_physical{134.0}=0x1 +phy_chain_rx_polarity_flip_physical{135.0}=0x1 +phy_chain_rx_polarity_flip_physical{136.0}=0x1 +phy_chain_rx_polarity_flip_physical{137.0}=0x0 +phy_chain_rx_polarity_flip_physical{138.0}=0x0 +phy_chain_rx_polarity_flip_physical{139.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{140.0}=0x0 +phy_chain_rx_polarity_flip_physical{141.0}=0x1 +phy_chain_rx_polarity_flip_physical{142.0}=0x1 +phy_chain_rx_polarity_flip_physical{143.0}=0x0 +phy_chain_rx_polarity_flip_physical{144.0}=0x0 +phy_chain_rx_polarity_flip_physical{145.0}=0x1 +phy_chain_rx_polarity_flip_physical{146.0}=0x1 +phy_chain_rx_polarity_flip_physical{147.0}=0x0 +phy_chain_rx_polarity_flip_physical{148.0}=0x0 +phy_chain_rx_polarity_flip_physical{149.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{150.0}=0x1 +phy_chain_rx_polarity_flip_physical{151.0}=0x0 +phy_chain_rx_polarity_flip_physical{152.0}=0x1 +phy_chain_rx_polarity_flip_physical{153.0}=0x1 +phy_chain_rx_polarity_flip_physical{154.0}=0x1 +phy_chain_rx_polarity_flip_physical{155.0}=0x0 +phy_chain_rx_polarity_flip_physical{156.0}=0x0 +phy_chain_rx_polarity_flip_physical{157.0}=0x1 +phy_chain_rx_polarity_flip_physical{158.0}=0x0 +phy_chain_rx_polarity_flip_physical{159.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 +phy_chain_rx_polarity_flip_physical{161.0}=0x0 +phy_chain_rx_polarity_flip_physical{162.0}=0x1 +phy_chain_rx_polarity_flip_physical{163.0}=0x0 +phy_chain_rx_polarity_flip_physical{164.0}=0x1 +phy_chain_rx_polarity_flip_physical{165.0}=0x0 +phy_chain_rx_polarity_flip_physical{166.0}=0x0 +phy_chain_rx_polarity_flip_physical{167.0}=0x0 +phy_chain_rx_polarity_flip_physical{168.0}=0x1 +phy_chain_rx_polarity_flip_physical{169.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x1 +phy_chain_rx_polarity_flip_physical{170.0}=0x0 +phy_chain_rx_polarity_flip_physical{171.0}=0x0 +phy_chain_rx_polarity_flip_physical{172.0}=0x1 +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x0 +phy_chain_rx_polarity_flip_physical{175.0}=0x1 +phy_chain_rx_polarity_flip_physical{176.0}=0x1 +phy_chain_rx_polarity_flip_physical{177.0}=0x1 +phy_chain_rx_polarity_flip_physical{178.0}=0x0 +phy_chain_rx_polarity_flip_physical{179.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x1 +phy_chain_rx_polarity_flip_physical{181.0}=0x0 +phy_chain_rx_polarity_flip_physical{182.0}=0x1 +phy_chain_rx_polarity_flip_physical{183.0}=0x1 +phy_chain_rx_polarity_flip_physical{184.0}=0x0 +phy_chain_rx_polarity_flip_physical{185.0}=0x1 +phy_chain_rx_polarity_flip_physical{186.0}=0x1 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x0 +phy_chain_rx_polarity_flip_physical{189.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{190.0}=0x0 +phy_chain_rx_polarity_flip_physical{191.0}=0x0 +phy_chain_rx_polarity_flip_physical{192.0}=0x1 +phy_chain_rx_polarity_flip_physical{193.0}=0x1 +phy_chain_rx_polarity_flip_physical{194.0}=0x0 +phy_chain_rx_polarity_flip_physical{195.0}=0x1 +phy_chain_rx_polarity_flip_physical{196.0}=0x1 +phy_chain_rx_polarity_flip_physical{197.0}=0x0 +phy_chain_rx_polarity_flip_physical{198.0}=0x1 +phy_chain_rx_polarity_flip_physical{199.0}=0x1 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x0 +phy_chain_rx_polarity_flip_physical{201.0}=0x0 +phy_chain_rx_polarity_flip_physical{202.0}=0x1 +phy_chain_rx_polarity_flip_physical{203.0}=0x0 +phy_chain_rx_polarity_flip_physical{204.0}=0x1 +phy_chain_rx_polarity_flip_physical{205.0}=0x0 +phy_chain_rx_polarity_flip_physical{206.0}=0x1 +phy_chain_rx_polarity_flip_physical{207.0}=0x1 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 +phy_chain_rx_polarity_flip_physical{209.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{210.0}=0x1 +phy_chain_rx_polarity_flip_physical{211.0}=0x0 +phy_chain_rx_polarity_flip_physical{212.0}=0x1 +phy_chain_rx_polarity_flip_physical{213.0}=0x1 +phy_chain_rx_polarity_flip_physical{214.0}=0x1 +phy_chain_rx_polarity_flip_physical{215.0}=0x1 +phy_chain_rx_polarity_flip_physical{216.0}=0x0 +phy_chain_rx_polarity_flip_physical{217.0}=0x0 +phy_chain_rx_polarity_flip_physical{218.0}=0x1 +phy_chain_rx_polarity_flip_physical{219.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{220.0}=0x0 +phy_chain_rx_polarity_flip_physical{221.0}=0x0 +phy_chain_rx_polarity_flip_physical{222.0}=0x0 +phy_chain_rx_polarity_flip_physical{223.0}=0x1 +phy_chain_rx_polarity_flip_physical{224.0}=0x1 +phy_chain_rx_polarity_flip_physical{225.0}=0x1 +phy_chain_rx_polarity_flip_physical{226.0}=0x1 +phy_chain_rx_polarity_flip_physical{227.0}=0x1 +phy_chain_rx_polarity_flip_physical{228.0}=0x1 +phy_chain_rx_polarity_flip_physical{229.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{230.0}=0x0 +phy_chain_rx_polarity_flip_physical{231.0}=0x1 +phy_chain_rx_polarity_flip_physical{232.0}=0x1 +phy_chain_rx_polarity_flip_physical{233.0}=0x1 +phy_chain_rx_polarity_flip_physical{234.0}=0x0 +phy_chain_rx_polarity_flip_physical{235.0}=0x1 +phy_chain_rx_polarity_flip_physical{236.0}=0x1 +phy_chain_rx_polarity_flip_physical{237.0}=0x1 +phy_chain_rx_polarity_flip_physical{238.0}=0x1 +phy_chain_rx_polarity_flip_physical{239.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{240.0}=0x0 +phy_chain_rx_polarity_flip_physical{241.0}=0x0 +phy_chain_rx_polarity_flip_physical{242.0}=0x1 +phy_chain_rx_polarity_flip_physical{243.0}=0x0 +phy_chain_rx_polarity_flip_physical{244.0}=0x0 +phy_chain_rx_polarity_flip_physical{245.0}=0x1 +phy_chain_rx_polarity_flip_physical{246.0}=0x0 +phy_chain_rx_polarity_flip_physical{247.0}=0x1 +phy_chain_rx_polarity_flip_physical{248.0}=0x1 +phy_chain_rx_polarity_flip_physical{249.0}=0x1 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{250.0}=0x0 +phy_chain_rx_polarity_flip_physical{251.0}=0x1 +phy_chain_rx_polarity_flip_physical{252.0}=0x0 +phy_chain_rx_polarity_flip_physical{253.0}=0x1 +phy_chain_rx_polarity_flip_physical{254.0}=0x1 +phy_chain_rx_polarity_flip_physical{255.0}=0x0 +phy_chain_rx_polarity_flip_physical{256.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x0 +phy_chain_rx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x1 +phy_chain_rx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{83.0}=0x0 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_rx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{91.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 +phy_chain_rx_polarity_flip_physical{97.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_lane_map_physical{1.0}=0x2301 +phy_chain_tx_lane_map_physical{101.0}=0x2103 +phy_chain_tx_lane_map_physical{105.0}=0x2310 +phy_chain_tx_lane_map_physical{109.0}=0x2013 +phy_chain_tx_lane_map_physical{113.0}=0x0312 +phy_chain_tx_lane_map_physical{117.0}=0x1230 +phy_chain_tx_lane_map_physical{121.0}=0x1203 +phy_chain_tx_lane_map_physical{125.0}=0x1203 +phy_chain_tx_lane_map_physical{129.0}=0x1320 +phy_chain_tx_lane_map_physical{13.0}=0x0312 +phy_chain_tx_lane_map_physical{133.0}=0x3201 +phy_chain_tx_lane_map_physical{137.0}=0x2130 +phy_chain_tx_lane_map_physical{141.0}=0x1032 +phy_chain_tx_lane_map_physical{145.0}=0x1320 +phy_chain_tx_lane_map_physical{149.0}=0x0321 +phy_chain_tx_lane_map_physical{153.0}=0x1023 +phy_chain_tx_lane_map_physical{157.0}=0x3021 +phy_chain_tx_lane_map_physical{161.0}=0x0321 +phy_chain_tx_lane_map_physical{165.0}=0x2130 +phy_chain_tx_lane_map_physical{169.0}=0x1320 +phy_chain_tx_lane_map_physical{17.0}=0x0213 +phy_chain_tx_lane_map_physical{173.0}=0x2130 +phy_chain_tx_lane_map_physical{177.0}=0x0321 +phy_chain_tx_lane_map_physical{181.0}=0x2130 +phy_chain_tx_lane_map_physical{185.0}=0x0132 +phy_chain_tx_lane_map_physical{189.0}=0x1320 +phy_chain_tx_lane_map_physical{193.0}=0x3012 +phy_chain_tx_lane_map_physical{197.0}=0x2130 +phy_chain_tx_lane_map_physical{201.0}=0x1023 +phy_chain_tx_lane_map_physical{205.0}=0x1320 +phy_chain_tx_lane_map_physical{209.0}=0x0321 +phy_chain_tx_lane_map_physical{21.0}=0x2310 +phy_chain_tx_lane_map_physical{213.0}=0x2031 +phy_chain_tx_lane_map_physical{217.0}=0x1032 +phy_chain_tx_lane_map_physical{221.0}=0x3201 +phy_chain_tx_lane_map_physical{225.0}=0x0123 +phy_chain_tx_lane_map_physical{229.0}=0x0231 +phy_chain_tx_lane_map_physical{233.0}=0x1302 +phy_chain_tx_lane_map_physical{237.0}=0x3210 +phy_chain_tx_lane_map_physical{241.0}=0x0312 +phy_chain_tx_lane_map_physical{245.0}=0x2031 +phy_chain_tx_lane_map_physical{249.0}=0x3201 +phy_chain_tx_lane_map_physical{25.0}=0x0312 +phy_chain_tx_lane_map_physical{253.0}=0x3120 +phy_chain_tx_lane_map_physical{29.0}=0x1230 +phy_chain_tx_lane_map_physical{33.0}=0x3201 +phy_chain_tx_lane_map_physical{37.0}=0x3201 +phy_chain_tx_lane_map_physical{41.0}=0x3201 +phy_chain_tx_lane_map_physical{45.0}=0x2031 +phy_chain_tx_lane_map_physical{49.0}=0x0132 +phy_chain_tx_lane_map_physical{5.0}=0x2301 +phy_chain_tx_lane_map_physical{53.0}=0x3201 +phy_chain_tx_lane_map_physical{57.0}=0x3201 +phy_chain_tx_lane_map_physical{61.0}=0x2031 +phy_chain_tx_lane_map_physical{65.0}=0x0321 +phy_chain_tx_lane_map_physical{69.0}=0x3201 +phy_chain_tx_lane_map_physical{73.0}=0x3201 +phy_chain_tx_lane_map_physical{77.0}=0x1032 +phy_chain_tx_lane_map_physical{81.0}=0x0132 +phy_chain_tx_lane_map_physical{85.0}=0x1320 +phy_chain_tx_lane_map_physical{89.0}=0x3201 +phy_chain_tx_lane_map_physical{9.0}=0x2130 +phy_chain_tx_lane_map_physical{93.0}=0x0321 +phy_chain_tx_lane_map_physical{97.0}=0x1320 +phy_chain_tx_polarity_flip_physical{1.0}=0x1 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 +phy_chain_tx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_tx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x1 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x1 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_tx_polarity_flip_physical{116.0}=0x1 +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x1 +phy_chain_tx_polarity_flip_physical{119.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x0 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{130.0}=0x1 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x1 +phy_chain_tx_polarity_flip_physical{133.0}=0x0 +phy_chain_tx_polarity_flip_physical{134.0}=0x0 +phy_chain_tx_polarity_flip_physical{135.0}=0x1 +phy_chain_tx_polarity_flip_physical{136.0}=0x0 +phy_chain_tx_polarity_flip_physical{137.0}=0x0 +phy_chain_tx_polarity_flip_physical{138.0}=0x1 +phy_chain_tx_polarity_flip_physical{139.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{140.0}=0x1 +phy_chain_tx_polarity_flip_physical{141.0}=0x1 +phy_chain_tx_polarity_flip_physical{142.0}=0x0 +phy_chain_tx_polarity_flip_physical{143.0}=0x1 +phy_chain_tx_polarity_flip_physical{144.0}=0x1 +phy_chain_tx_polarity_flip_physical{145.0}=0x1 +phy_chain_tx_polarity_flip_physical{146.0}=0x0 +phy_chain_tx_polarity_flip_physical{147.0}=0x0 +phy_chain_tx_polarity_flip_physical{148.0}=0x1 +phy_chain_tx_polarity_flip_physical{149.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{150.0}=0x0 +phy_chain_tx_polarity_flip_physical{151.0}=0x1 +phy_chain_tx_polarity_flip_physical{152.0}=0x1 +phy_chain_tx_polarity_flip_physical{153.0}=0x0 +phy_chain_tx_polarity_flip_physical{154.0}=0x1 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x0 +phy_chain_tx_polarity_flip_physical{157.0}=0x1 +phy_chain_tx_polarity_flip_physical{158.0}=0x0 +phy_chain_tx_polarity_flip_physical{159.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 +phy_chain_tx_polarity_flip_physical{160.0}=0x1 +phy_chain_tx_polarity_flip_physical{161.0}=0x0 +phy_chain_tx_polarity_flip_physical{162.0}=0x0 +phy_chain_tx_polarity_flip_physical{163.0}=0x0 +phy_chain_tx_polarity_flip_physical{164.0}=0x1 +phy_chain_tx_polarity_flip_physical{165.0}=0x0 +phy_chain_tx_polarity_flip_physical{166.0}=0x0 +phy_chain_tx_polarity_flip_physical{167.0}=0x0 +phy_chain_tx_polarity_flip_physical{168.0}=0x1 +phy_chain_tx_polarity_flip_physical{169.0}=0x1 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{170.0}=0x0 +phy_chain_tx_polarity_flip_physical{171.0}=0x1 +phy_chain_tx_polarity_flip_physical{172.0}=0x1 +phy_chain_tx_polarity_flip_physical{173.0}=0x1 +phy_chain_tx_polarity_flip_physical{174.0}=0x1 +phy_chain_tx_polarity_flip_physical{175.0}=0x1 +phy_chain_tx_polarity_flip_physical{176.0}=0x0 +phy_chain_tx_polarity_flip_physical{177.0}=0x0 +phy_chain_tx_polarity_flip_physical{178.0}=0x1 +phy_chain_tx_polarity_flip_physical{179.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 +phy_chain_tx_polarity_flip_physical{181.0}=0x0 +phy_chain_tx_polarity_flip_physical{182.0}=0x1 +phy_chain_tx_polarity_flip_physical{183.0}=0x0 +phy_chain_tx_polarity_flip_physical{184.0}=0x1 +phy_chain_tx_polarity_flip_physical{185.0}=0x1 +phy_chain_tx_polarity_flip_physical{186.0}=0x0 +phy_chain_tx_polarity_flip_physical{187.0}=0x1 +phy_chain_tx_polarity_flip_physical{188.0}=0x1 +phy_chain_tx_polarity_flip_physical{189.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{190.0}=0x0 +phy_chain_tx_polarity_flip_physical{191.0}=0x1 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 +phy_chain_tx_polarity_flip_physical{193.0}=0x0 +phy_chain_tx_polarity_flip_physical{194.0}=0x0 +phy_chain_tx_polarity_flip_physical{195.0}=0x1 +phy_chain_tx_polarity_flip_physical{196.0}=0x1 +phy_chain_tx_polarity_flip_physical{197.0}=0x0 +phy_chain_tx_polarity_flip_physical{198.0}=0x1 +phy_chain_tx_polarity_flip_physical{199.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_tx_polarity_flip_physical{200.0}=0x0 +phy_chain_tx_polarity_flip_physical{201.0}=0x0 +phy_chain_tx_polarity_flip_physical{202.0}=0x1 +phy_chain_tx_polarity_flip_physical{203.0}=0x1 +phy_chain_tx_polarity_flip_physical{204.0}=0x1 +phy_chain_tx_polarity_flip_physical{205.0}=0x0 +phy_chain_tx_polarity_flip_physical{206.0}=0x0 +phy_chain_tx_polarity_flip_physical{207.0}=0x1 +phy_chain_tx_polarity_flip_physical{208.0}=0x0 +phy_chain_tx_polarity_flip_physical{209.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x1 +phy_chain_tx_polarity_flip_physical{210.0}=0x0 +phy_chain_tx_polarity_flip_physical{211.0}=0x0 +phy_chain_tx_polarity_flip_physical{212.0}=0x1 +phy_chain_tx_polarity_flip_physical{213.0}=0x1 +phy_chain_tx_polarity_flip_physical{214.0}=0x0 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x1 +phy_chain_tx_polarity_flip_physical{217.0}=0x1 +phy_chain_tx_polarity_flip_physical{218.0}=0x1 +phy_chain_tx_polarity_flip_physical{219.0}=0x1 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{220.0}=0x0 +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x1 +phy_chain_tx_polarity_flip_physical{223.0}=0x1 +phy_chain_tx_polarity_flip_physical{224.0}=0x1 +phy_chain_tx_polarity_flip_physical{225.0}=0x1 +phy_chain_tx_polarity_flip_physical{226.0}=0x0 +phy_chain_tx_polarity_flip_physical{227.0}=0x0 +phy_chain_tx_polarity_flip_physical{228.0}=0x1 +phy_chain_tx_polarity_flip_physical{229.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{230.0}=0x0 +phy_chain_tx_polarity_flip_physical{231.0}=0x1 +phy_chain_tx_polarity_flip_physical{232.0}=0x0 +phy_chain_tx_polarity_flip_physical{233.0}=0x1 +phy_chain_tx_polarity_flip_physical{234.0}=0x0 +phy_chain_tx_polarity_flip_physical{235.0}=0x0 +phy_chain_tx_polarity_flip_physical{236.0}=0x0 +phy_chain_tx_polarity_flip_physical{237.0}=0x1 +phy_chain_tx_polarity_flip_physical{238.0}=0x1 +phy_chain_tx_polarity_flip_physical{239.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x1 +phy_chain_tx_polarity_flip_physical{241.0}=0x1 +phy_chain_tx_polarity_flip_physical{242.0}=0x0 +phy_chain_tx_polarity_flip_physical{243.0}=0x1 +phy_chain_tx_polarity_flip_physical{244.0}=0x1 +phy_chain_tx_polarity_flip_physical{245.0}=0x1 +phy_chain_tx_polarity_flip_physical{246.0}=0x0 +phy_chain_tx_polarity_flip_physical{247.0}=0x0 +phy_chain_tx_polarity_flip_physical{248.0}=0x1 +phy_chain_tx_polarity_flip_physical{249.0}=0x1 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{250.0}=0x1 +phy_chain_tx_polarity_flip_physical{251.0}=0x0 +phy_chain_tx_polarity_flip_physical{252.0}=0x1 +phy_chain_tx_polarity_flip_physical{253.0}=0x1 +phy_chain_tx_polarity_flip_physical{254.0}=0x1 +phy_chain_tx_polarity_flip_physical{255.0}=0x0 +phy_chain_tx_polarity_flip_physical{256.0}=0x1 +phy_chain_tx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_tx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x1 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{53.0}=0x1 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_tx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_tx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x1 +phy_chain_tx_polarity_flip_physical{83.0}=0x0 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x1 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +portmap_102=193:100 +portmap_103=197:100 +portmap_104=201:100 +portmap_105=205:100 +portmap_106=209:100 +portmap_107=213:100 +portmap_108=217:100 +portmap_109=221:100 +portmap_10=37:100 +portmap_110=225:100 +portmap_111=229:100 +portmap_112=233:100 +portmap_113=237:100 +portmap_114=241:100 +portmap_115=245:100 +portmap_116=249:100 +portmap_117=253:100 +portmap_11=41:100 +portmap_12=45:100 +portmap_13=49:100 +portmap_14=53:100 +portmap_15=57:100 +portmap_16=61:100 +portmap_1=1:100 +portmap_2=5:100 +portmap_34=65:100 +portmap_35=69:100 +portmap_36=73:100 +portmap_37=77:100 +portmap_38=81:100 +portmap_39=85:100 +portmap_3=9:100 +portmap_40=89:100 +portmap_41=93:100 +portmap_42=97:100 +portmap_43=101:100 +portmap_44=105:100 +portmap_45=109:100 +portmap_46=113:100 +portmap_47=117:100 +portmap_48=121:100 +portmap_49=125:100 +portmap_4=13:100 +portmap_5=17:100 +portmap_68=129:100 +portmap_69=133:100 +portmap_6=21:100 +portmap_70=137:100 +portmap_71=141:100 +portmap_72=145:100 +portmap_73=149:100 +portmap_74=153:100 +portmap_75=157:100 +portmap_76=161:100 +portmap_77=165:100 +portmap_78=169:100 +portmap_79=173:100 +portmap_7=25:100 +portmap_80=177:100 +portmap_81=181:100 +portmap_82=185:100 +portmap_83=189:100 +portmap_8=29:100 +portmap_9=33:100 + +lpm_scaling_enable=0 +bcm_num_cos=8 +bcm_stat_jumbo=9236 +ipv6_lpm_128b_enable=1 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +phy_an_allow_pll_change_hg=0 +robust_hash_disable_egress_vlan=1 +robust_hash_disable_mpls=1 +robust_hash_disable_vlan=1 +stable_size=0x5500000 +mmu_lossless=1 diff --git a/device/delta/x86_64-delta_ag9064-r0/default_sku b/device/delta/x86_64-delta_ag9064-r0/default_sku new file mode 100644 index 00000000000..5de7fcd3733 --- /dev/null +++ b/device/delta/x86_64-delta_ag9064-r0/default_sku @@ -0,0 +1 @@ +Delta-ag9064 t1 diff --git a/device/delta/x86_64-delta_ag9064-r0/installer.conf b/device/delta/x86_64-delta_ag9064-r0/installer.conf new file mode 100644 index 00000000000..85ed43ab48e --- /dev/null +++ b/device/delta/x86_64-delta_ag9064-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_SPEED=115200 +CONSOLE_DEV=0 diff --git a/device/delta/x86_64-delta_ag9064-r0/led_proc_init.soc b/device/delta/x86_64-delta_ag9064-r0/led_proc_init.soc new file mode 100644 index 00000000000..2e6f394b121 --- /dev/null +++ b/device/delta/x86_64-delta_ag9064-r0/led_proc_init.soc @@ -0,0 +1,63 @@ +led 0 stop +led 0 prog \ + 02 00 60 E0 02 A0 60 E2 86 ED 02 00 60 E1 2E E0 \ + 32 08 97 02 00 0E 05 60 E3 2E E0 32 00 32 01 B7 \ + 97 02 00 0E 00 12 E7 FE E1 50 86 E0 86 E1 06 E1 \ + D2 04 74 19 16 E7 61 EB 06 E3 12 05 67 92 06 E3 \ + 12 04 67 92 06 E3 12 03 67 92 16 E9 61 EB 06 E5 \ + 12 03 67 92 02 02 60 EC 02 00 60 E1 77 66 02 01 \ + 60 EC 02 00 60 E1 12 E7 FE E1 05 60 EB 12 E3 FE \ + E1 05 16 EC 67 92 86 E1 06 E1 D2 04 74 66 06 EC \ + D2 02 70 5E 06 E2 F2 04 60 E2 06 E0 D2 40 74 0A \ + 3A C0 09 75 A9 06 EB D2 00 70 A5 16 ED 99 99 1A \ + 00 71 A5 77 A9 32 0F 87 57 32 0E 87 57 00 00 00 +led 0 auto on +led 0 start + +led 1 stop +led 1 prog \ + 02 00 60 E0 02 A0 60 E2 86 ED 02 00 60 E1 2E E0 \ + 32 08 97 02 00 0E 05 60 E3 2E E0 32 00 32 01 B7 \ + 97 02 00 0E 00 12 E7 FE E1 50 86 E0 86 E1 06 E1 \ + D2 04 74 19 16 E7 61 EB 06 E3 12 05 67 92 06 E3 \ + 12 04 67 92 06 E3 12 03 67 92 16 E9 61 EB 06 E5 \ + 12 03 67 92 02 02 60 EC 02 00 60 E1 77 66 02 01 \ + 60 EC 02 00 60 E1 12 E7 FE E1 05 60 EB 12 E3 FE \ + E1 05 16 EC 67 92 86 E1 06 E1 D2 04 74 66 06 EC \ + D2 02 70 5E 06 E2 F2 04 60 E2 06 E0 D2 40 74 0A \ + 3A C0 09 75 A9 06 EB D2 00 70 A5 16 ED 99 99 1A \ + 00 71 A5 77 A9 32 0F 87 57 32 0E 87 57 00 00 00 +led 1 auto on +led 1 start + +led 2 stop +led 2 prog \ + 02 00 60 E0 02 A0 60 E2 86 ED 02 00 60 E1 2E E0 \ + 32 08 97 02 00 0E 05 60 E3 2E E0 32 00 32 01 B7 \ + 97 02 00 0E 00 12 E7 FE E1 50 86 E0 86 E1 06 E1 \ + D2 04 74 19 16 E7 61 EB 06 E3 12 05 67 92 06 E3 \ + 12 04 67 92 06 E3 12 03 67 92 16 E9 61 EB 06 E5 \ + 12 03 67 92 02 02 60 EC 02 00 60 E1 77 66 02 01 \ + 60 EC 02 00 60 E1 12 E7 FE E1 05 60 EB 12 E3 FE \ + E1 05 16 EC 67 92 86 E1 06 E1 D2 04 74 66 06 EC \ + D2 02 70 5E 06 E2 F2 04 60 E2 06 E0 D2 40 74 0A \ + 3A C0 09 75 A9 06 EB D2 00 70 A5 16 ED 99 99 1A \ + 00 71 A5 77 A9 32 0F 87 57 32 0E 87 57 00 00 00 +led 2 auto on +led 2 start + +led 3 stop +led 3 prog \ + 02 00 60 E0 02 A0 60 E2 86 ED 02 00 60 E1 2E E0 \ + 32 08 97 02 00 0E 05 60 E3 2E E0 32 00 32 01 B7 \ + 97 02 00 0E 00 12 E7 FE E1 50 86 E0 86 E1 06 E1 \ + D2 04 74 19 16 E7 61 EB 06 E3 12 05 67 92 06 E3 \ + 12 04 67 92 06 E3 12 03 67 92 16 E9 61 EB 06 E5 \ + 12 03 67 92 02 02 60 EC 02 00 60 E1 77 66 02 01 \ + 60 EC 02 00 60 E1 12 E7 FE E1 05 60 EB 12 E3 FE \ + E1 05 16 EC 67 92 86 E1 06 E1 D2 04 74 66 06 EC \ + D2 02 70 5E 06 E2 F2 04 60 E2 06 E0 D2 40 74 0A \ + 3A C0 09 75 A9 06 EB D2 00 70 A5 16 ED 99 99 1A \ + 00 71 A5 77 A9 32 0F 87 57 32 0E 87 57 00 00 00 +led 3 auto on +led 3 start diff --git a/device/delta/x86_64-delta_ag9064-r0/plugins/eeprom.py b/device/delta/x86_64-delta_ag9064-r0/plugins/eeprom.py new file mode 100644 index 00000000000..e4048ed302d --- /dev/null +++ b/device/delta/x86_64-delta_ag9064-r0/plugins/eeprom.py @@ -0,0 +1,32 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + _TLV_INFO_MAX_LEN = 256 + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/delta/x86_64-delta_ag9064-r0/plugins/psuutil.py b/device/delta/x86_64-delta_ag9064-r0/plugins/psuutil.py new file mode 100644 index 00000000000..2a2bd1eea6a --- /dev/null +++ b/device/delta/x86_64-delta_ag9064-r0/plugins/psuutil.py @@ -0,0 +1,78 @@ +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# + +import os.path +import subprocess + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + self.psu_presence = "cat /sys/devices/platform/delta-ag9064-cpld.0/psu{}_scan" + self.psu_status = "cat /sys/devices/platform/delta-ag9064-swpld1.0/psu{}_pwr_ok" + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + status = 0 + try: + p = os.popen(self.psu_status.format(index)) + content = p.readline().rstrip() + reg_value = int(content) + if reg_value != 0: + return False + status = 1 + p.close() + except IOError: + return False + return status == 1 + + + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + status = 0 + try: + p = os.popen(self.psu_presence.format(index)) + content = p.readline().rstrip() + reg_value = int(content, 16) + if reg_value != 0: + return False + status = 1 + p.close() + except IOError: + return False + return status == 1 + diff --git a/device/delta/x86_64-delta_ag9064-r0/plugins/sfputil.py b/device/delta/x86_64-delta_ag9064-r0/plugins/sfputil.py new file mode 100644 index 00000000000..8b1b1aea1d8 --- /dev/null +++ b/device/delta/x86_64-delta_ag9064-r0/plugins/sfputil.py @@ -0,0 +1,183 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 63 + PORTS_IN_BLOCK = 64 + + EEPROM_OFFSET = 1 + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/kernel/sfp/eeprom_sfp_{0}" + + for x in range(0, self.port_end + 1): + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/delta-ag9064-cpld.0/qsfp_present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/delta-ag9064-cpld.0/qsfp_lpmode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/delta-ag9064-cpld.0/qsfp_lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value).rstrip("L") or "0" + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/devices/platform/delta-ag9064-cpld.0/qsfp_reset" + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/delta/x86_64-delta_ag9064-r0/sensors.conf b/device/delta/x86_64-delta_ag9064-r0/sensors.conf new file mode 100644 index 00000000000..1d8489248a5 --- /dev/null +++ b/device/delta/x86_64-delta_ag9064-r0/sensors.conf @@ -0,0 +1,14 @@ +# libsensors configuration file for DCS-7060CX-32S +# ------------------------------------------------ +# + +bus "i2c-1" "i2c-1-mux (chan_id 1)" + + +# tmp75-i2c-1-4d CPU below side thermal sensor. + +chip "tmp75-i2c-1-4d" + label temp1 "CPU below side thermal sensor" + set temp1_max 60 + set temp1_max_hyst 55 + diff --git a/device/delta/x86_64-delta_et-6248brb-r0/Delta-et-6248brb/helix4-et-6248brb-48x1G+2x10G.config.bcm b/device/delta/x86_64-delta_et-6248brb-r0/Delta-et-6248brb/helix4-et-6248brb-48x1G+2x10G.config.bcm new file mode 100644 index 00000000000..05d1c1e8820 --- /dev/null +++ b/device/delta/x86_64-delta_et-6248brb-r0/Delta-et-6248brb/helix4-et-6248brb-48x1G+2x10G.config.bcm @@ -0,0 +1,158 @@ +# bcm56340 setting : +# Specifies the base port and phy index of a multi slice phy chip. +#phy_port_primary_and_offset_ value is 0xPPOO 0xPP is primary port number 0xOO is offset of the slice +# bcm56340 QG0 port setting +phy_port_primary_and_offset_1=0x0100 +phy_port_primary_and_offset_2=0x0101 +phy_port_primary_and_offset_3=0x0102 +phy_port_primary_and_offset_4=0x0103 +phy_port_primary_and_offset_5=0x0104 +phy_port_primary_and_offset_6=0x0105 +phy_port_primary_and_offset_7=0x0106 +phy_port_primary_and_offset_8=0x0107 + +# bcm56340 QG1 port setting +phy_port_primary_and_offset_9=0x0900 +phy_port_primary_and_offset_10=0x0901 +phy_port_primary_and_offset_11=0x0902 +phy_port_primary_and_offset_12=0x0903 +phy_port_primary_and_offset_13=0x0904 +phy_port_primary_and_offset_14=0x0905 +phy_port_primary_and_offset_15=0x0906 +phy_port_primary_and_offset_16=0x0907 + +# bcm56340 QG2 port setting +phy_port_primary_and_offset_17=0x1100 +phy_port_primary_and_offset_18=0x1101 +phy_port_primary_and_offset_19=0x1102 +phy_port_primary_and_offset_20=0x1103 +phy_port_primary_and_offset_21=0x1104 +phy_port_primary_and_offset_22=0x1105 +phy_port_primary_and_offset_23=0x1106 +phy_port_primary_and_offset_24=0x1107 + +# bcm56340 QG3 port setting +phy_port_primary_and_offset_25=0x1900 +phy_port_primary_and_offset_26=0x1901 +phy_port_primary_and_offset_27=0x1902 +phy_port_primary_and_offset_28=0x1903 +phy_port_primary_and_offset_29=0x1904 +phy_port_primary_and_offset_30=0x1905 +phy_port_primary_and_offset_31=0x1906 +phy_port_primary_and_offset_32=0x1907 + +# bcm56340 QG4 port setting +phy_port_primary_and_offset_33=0x2100 +phy_port_primary_and_offset_34=0x2101 +phy_port_primary_and_offset_35=0x2102 +phy_port_primary_and_offset_36=0x2103 +phy_port_primary_and_offset_37=0x2104 +phy_port_primary_and_offset_38=0x2105 +phy_port_primary_and_offset_39=0x2106 +phy_port_primary_and_offset_40=0x2107 + +# bcm56340 QG5 port setting +phy_port_primary_and_offset_41=0x2900 +phy_port_primary_and_offset_42=0x2901 +phy_port_primary_and_offset_43=0x2902 +phy_port_primary_and_offset_44=0x2903 +phy_port_primary_and_offset_45=0x2904 +phy_port_primary_and_offset_46=0x2905 +phy_port_primary_and_offset_47=0x2906 +phy_port_primary_and_offset_48=0x2907 + +# bcm56340 port group setting +bcm56340_4x10=1 +portgroup_0=1 +portgroup_1=1 +portgroup_2=1 +portgroup_3=1 +portgroup_4=1 +portgroup_5=1 +portgroup_6=1 +portgroup_7=1 +portgroup_8=1 +portgroup_9=1 +portgroup_10=1 +portgroup_11=1 +portgroup_12=1 + +# Port map +pbmp_xport_ge=0x0001FFFFFFFFFFFE +pbmp_xport_xe=0x3F000000000000 + +# phy addr setting for bcm54285-0 +port_phy_addr_1=0x1 +port_phy_addr_2=0x2 +port_phy_addr_3=0x3 +port_phy_addr_4=0x4 +port_phy_addr_5=0x5 +port_phy_addr_6=0x6 +port_phy_addr_7=0x7 +port_phy_addr_8=0x8 + +# phy addr setting for bcm54285-1 +port_phy_addr_9=0xa +port_phy_addr_10=0xb +port_phy_addr_11=0xc +port_phy_addr_12=0xd +port_phy_addr_13=0xe +port_phy_addr_14=0xf +port_phy_addr_15=0x10 +port_phy_addr_16=0x11 + +# phy addr setting for bcm54285-2 +port_phy_addr_17=0x13 +port_phy_addr_18=0x14 +port_phy_addr_19=0x15 +port_phy_addr_20=0x16 +port_phy_addr_21=0x17 +port_phy_addr_22=0x18 +port_phy_addr_23=0x19 +port_phy_addr_24=0x1a + +# phy addr setting for bcm54285-3 +port_phy_addr_25=0x21 +port_phy_addr_26=0x22 +port_phy_addr_27=0x23 +port_phy_addr_28=0x24 +port_phy_addr_29=0x25 +port_phy_addr_30=0x26 +port_phy_addr_31=0x27 +port_phy_addr_32=0x28 + +# phy addr setting for bcm54285-4 +port_phy_addr_33=0x2a +port_phy_addr_34=0x2b +port_phy_addr_35=0x2c +port_phy_addr_36=0x2d +port_phy_addr_37=0x2e +port_phy_addr_38=0x2f +port_phy_addr_39=0x30 +port_phy_addr_40=0x31 + +# phy addr setting for bcm54285-5 +port_phy_addr_41=0x33 +port_phy_addr_42=0x34 +port_phy_addr_43=0x35 +port_phy_addr_44=0x36 +port_phy_addr_45=0x37 +port_phy_addr_46=0x38 +port_phy_addr_47=0x39 +port_phy_addr_48=0x3a + +# phy addr setting for bcm84758 +port_phy_addr_50=0x40 +port_phy_addr_51=0x41 +port_phy_addr_52=0x42 +port_phy_addr_53=0x43 + +# Fiber prefer setting for bcm54285 +phy_automedium=1 +#phy_fiber_pref value is 1 +phy_ext_rom_boot=0 +phy_sgmii_autoneg_ge=1 + +os=unix +phy_null_port52=1 +phy_null_port53=1 diff --git a/device/delta/x86_64-delta_et-6248brb-r0/Delta-et-6248brb/port_config.ini b/device/delta/x86_64-delta_et-6248brb-r0/Delta-et-6248brb/port_config.ini new file mode 100755 index 00000000000..3747a5c4989 --- /dev/null +++ b/device/delta/x86_64-delta_et-6248brb-r0/Delta-et-6248brb/port_config.ini @@ -0,0 +1,51 @@ +# name lanes alias index +Ethernet0 1 1000 0 +Ethernet1 2 1000 1 +Ethernet2 3 1000 2 +Ethernet3 4 1000 3 +Ethernet4 5 1000 4 +Ethernet5 6 1000 5 +Ethernet6 7 1000 6 +Ethernet7 8 1000 7 +Ethernet8 9 1000 8 +Ethernet9 10 1000 9 +Ethernet10 11 1000 10 +Ethernet11 12 1000 11 +Ethernet12 13 1000 12 +Ethernet13 14 1000 13 +Ethernet14 15 1000 14 +Ethernet15 16 1000 15 +Ethernet16 17 1000 16 +Ethernet17 18 1000 17 +Ethernet18 19 1000 18 +Ethernet19 20 1000 19 +Ethernet20 21 1000 20 +Ethernet21 22 1000 21 +Ethernet22 23 1000 22 +Ethernet23 24 1000 23 +Ethernet24 25 1000 24 +Ethernet25 26 1000 25 +Ethernet26 27 1000 26 +Ethernet27 28 1000 27 +Ethernet28 29 1000 28 +Ethernet29 30 1000 29 +Ethernet30 31 1000 30 +Ethernet31 32 1000 31 +Ethernet32 33 1000 32 +Ethernet33 34 1000 33 +Ethernet34 35 1000 34 +Ethernet35 36 1000 35 +Ethernet36 37 1000 36 +Ethernet37 38 1000 37 +Ethernet38 39 1000 38 +Ethernet39 40 1000 39 +Ethernet40 41 1000 40 +Ethernet41 42 1000 41 +Ethernet42 43 1000 42 +Ethernet43 44 1000 43 +Ethernet44 45 1000 44 +Ethernet45 46 1000 45 +Ethernet46 47 1000 46 +Ethernet47 48 1000 47 +Ethernet48 54 10000 48 +Ethernet49 53 10000 49 diff --git a/device/delta/x86_64-delta_et-6248brb-r0/Delta-et-6248brb/sai.profile b/device/delta/x86_64-delta_et-6248brb-r0/Delta-et-6248brb/sai.profile new file mode 100644 index 00000000000..726e1b6dc66 --- /dev/null +++ b/device/delta/x86_64-delta_et-6248brb-r0/Delta-et-6248brb/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/etc/bcm/helix4-et-6248brb-48x1G+2x10G.config.bcm diff --git a/device/delta/x86_64-delta_et-6248brb-r0/default_sku b/device/delta/x86_64-delta_et-6248brb-r0/default_sku new file mode 100644 index 00000000000..ce1cdf6e4c6 --- /dev/null +++ b/device/delta/x86_64-delta_et-6248brb-r0/default_sku @@ -0,0 +1 @@ +Delta-et-6248brb t1 diff --git a/device/delta/x86_64-delta_et-6248brb-r0/fancontrol b/device/delta/x86_64-delta_et-6248brb-r0/fancontrol new file mode 100644 index 00000000000..0deef5b88ef --- /dev/null +++ b/device/delta/x86_64-delta_et-6248brb-r0/fancontrol @@ -0,0 +1,12 @@ +INTERVAL=10 +DEVPATH=hwmon1=/sys/bus/i2c/devices +DEVNAME=hwmon1=adt7473 +FCTEMPS=hwmon1/0-0048/hwmon/hwmon*/temp1_input hwmon1/7-0049/hwmon/hwmon*/temp1_input hwmon1/8-004a/hwmon/hwmon*/temp1_input + +FCFANS=hwmon1/0-002e/fan1_input hwmon1/0-002e/fan2_input + +FCTARGETS=hwmon1/0-002e/pwm1 hwmon1/0-002e/pwm2 +MINTEMP=20 +MAXTEMP=60 +MINSTART=75 +MINSTOP=22 diff --git a/device/delta/x86_64-delta_et-6248brb-r0/fancontrol.service b/device/delta/x86_64-delta_et-6248brb-r0/fancontrol.service new file mode 100755 index 00000000000..3864d6d9966 --- /dev/null +++ b/device/delta/x86_64-delta_et-6248brb-r0/fancontrol.service @@ -0,0 +1,279 @@ +#!/bin/bash +# +# Simple script implementing a temperature dependent fan speed control +# Supported Linux kernel versions: 2.6.5 and later +# +# Version 0.70 +# +# Usage: fancontrol [CONFIGFILE] +# +# Dependencies: +# bash, egrep, sed, cut, sleep, readlink, lm_sensors :) +# +# Please send any questions, comments or success stories to +# marius.reiner@hdev.de +# Thanks! +# +# For configuration instructions and warnings please see fancontrol.txt, which +# can be found in the doc/ directory or at the website mentioned above. +# +# +# Copyright 2003 Marius Reiner +# Copyright (C) 2007-2009 Jean Delvare +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA. +# +# + +PIDFILE="/var/run/fancontrol.pid" + +#DEBUG=1 +MAX=255 + +function LoadConfig +{ + local fcvcount fcv + + echo "Loading configuration from $1 ..." + if [ ! -r "$1" ] + then + echo "Error: Can't read configuration file" >&2 + exit 1 + fi + + # grep configuration from file + INTERVAL=`egrep '^INTERVAL=.*$' $1 | sed -e 's/INTERVAL=//g'` + DEVPATH=`egrep '^DEVPATH=.*$' $1 | sed -e 's/DEVPATH= *//g'` + DEVNAME=`egrep '^DEVNAME=.*$' $1 | sed -e 's/DEVNAME= *//g'` + FCTEMPS=`egrep '^FCTEMPS=.*$' $1 | sed -e 's/FCTEMPS=//g'` + MINTEMP=`egrep '^MINTEMP=.*$' $1 | sed -e 's/MINTEMP=//g'` + MAXTEMP=`egrep '^MAXTEMP=.*$' $1 | sed -e 's/MAXTEMP=//g'` + MINSTART=`egrep '^MINSTART=.*$' $1 | sed -e 's/MINSTART=//g'` + MINSTOP=`egrep '^MINSTOP=.*$' $1 | sed -e 's/MINSTOP=//g'` + HWMON=$( echo "$DEVPATH" | sed 's/=.*$//g') + FCDEVPATH=$( echo "$DEVPATH" | sed 's/^.*=//g') + FCMINTEMP=$MINTEMP + FCMAXTEMP=$MAXTEMP + FCMINSTART=$MINSTART + FCMINSTOP=$MINSTOP + AFCTEMP_1_LOWER=(00 39 36 41 46 55) + AFCTEMP_1_UPPER=(39 39 44 49 54 150) + AFCTEMP_2_LOWER=(00 61 65 69 73 82) + AFCTEMP_2_UPPER=(63 67 71 75 79 150) + AFCTEMP_3_LOWER=(00 51 55 59 63 71) + AFCTEMP_3_UPPER=(53 57 61 65 69 150) + + + FCFANS=`egrep '^FCFANS=.*$' $1 | sed -e 's/FCFANS=//g'` + + FCTARGETS=`egrep '^FCTARGETS=.*$' $1 | sed -e 's/FCTARGETS=//g'` + + # Check whether all mandatory settings are set + if [[ -z ${INTERVAL} || -z ${FCTEMPS} || -z ${MINTEMP} || -z ${MAXTEMP} || -z ${MINSTART} || -z ${MINSTOP} ]] + then + echo "Some mandatory settings missing, please check your config file!" >&2 + exit 1 + fi + if [ "$INTERVAL" -le 0 ] + then + echo "Error in configuration file:" >&2 + echo "INTERVAL must be at least 1" >&2 + exit 1 + fi + + # write settings to arrays for easier use and print them + echo + echo "Common settings:" + + temp_string=$FCTEMPS + + let fcvcount=0 + for fcv in $FCTEMPS + do + fcvcount=$((fcvcount+1)) + AFCTEMP[$fcvcount]=$( echo "$temp_string" | cut -d" " -f $fcvcount ) + AFCTEMP[$fcvcount]=$( echo "${AFCTEMP[$fcvcount]}" | sed 's/hwmon1/\/sys\/bus\/i2c\/devices/g' ) + AFCTEMP_PATH[$fcvcount]=$( echo "${AFCTEMP[$fcvcount]}" | sed 's/hwmon1/\/sys\/bus\/i2c\/devices/g' ) + AFCTEMP[$fcvcount]=$( cat ${AFCTEMP[$fcvcount]} ) + AFCTEMP[$fcvcount]=$(( AFCTEMP[$fcvcount]/1000 )) + done + + fan_string=$FCFANS + fcvcount=0 + for fcv in $FCFANS + do + fcvcount=$((fcvcount+1)) + AFCFAN[$fcvcount]=$( echo "$fan_string" | cut -d" " -f $fcvcount ) + AFCFAN_PATH[$fcvcount]=$( echo "${AFCFAN[$fcvcount]}" | sed 's/hwmon1/\/sys\/bus\/i2c\/devices/g' ) + AFCFAN[$fcvcount]=$( cat ${AFCFAN_PATH[$fcvcount]} ) + done + + target_string=$FCTARGETS + fcvcount=0 + for fcv in $FCTARGETS + do + fcvcount=$((fcvcount+1)) + AFCTARGET[$fcvcount]=$( echo "$target_string" | cut -d" " -f $fcvcount ) + AFCFAN_TARGET[$fcvcount]=$( echo "${AFCTARGET[$fcvcount]}" | sed 's/hwmon1/\/sys\/bus\/i2c\/devices/g' ) + done + +} + +# Check that all referenced sysfs files exist +function CheckFiles +{ + local outdated=0 fcvcount tsen fan + if [ $outdated -eq 1 ] + then + echo >&2 + echo "At least one referenced file is missing. Either some required kernel" >&2 + echo "modules haven't been loaded, or your configuration file is outdated." >&2 + echo "In the latter case, you should run pwmconfig again." >&2 + fi + return $outdated +} + +LoadConfig $1 + +# Detect path to sensors +if [ ! -d $DIR ] +then + echo $0: 'No sensors found! (did you load the necessary modules?)' >&2 + exit 1 +fi +cd $DIR + +# Check for configuration change +if [ "$DIR" != "/" ] && [ -z "$DEVPATH" -o -z "$DEVNAME" ] +then + echo "Configuration is too old, please run pwmconfig again" >&2 + exit 1 +fi +if [ "$DIR" = "/" -a -n "$DEVPATH" ] +then + echo "Unneeded DEVPATH with absolute device paths" >&2 + exit 1 +fi +CheckFiles || exit 1 + +if [ -f "$PIDFILE" ] +then + echo "File $PIDFILE exists, is fancontrol already running?" >&2 + exit 1 +fi +echo $$ > "$PIDFILE" + +# main function +function UpdateThermalSensors +{ + fcvcount=0 + for fcv in $FCTEMPS + do + fcvcount=$((fcvcount+1)) + AFCTEMP[$fcvcount]=$( cat ${AFCTEMP_PATH[$fcvcount]} ) + AFCTEMP[$fcvcount]=$(( AFCTEMP[$fcvcount]/1000 )) + done +} + +function UpdateThermalLevel +{ + AFCTEMP_NUM=$((6-${AFCTEMP_LEVEL[$i]})) + AFCTEMP_UPPER_BUF=AFCTEMP_"$i"_UPPER["$AFCTEMP_NUM"] + AFCTEMP_LOWER_BUF=AFCTEMP_"$i"_LOWER["$AFCTEMP_NUM"] + + AFCTEMP_UPPER=${!AFCTEMP_UPPER_BUF} + AFCTEMP_LOWER=${!AFCTEMP_LOWER_BUF} + + + if (( ("${AFCTEMP[$i]}" <= "$AFCTEMP_UPPER") && ("${AFCTEMP[$i]}" >= "$AFCTEMP_LOWER") )) ; then + FLAG=2 + elif (( "${AFCTEMP[$i]}" > "$AFCTEMP_UPPER" )); then + AFCTEMP_LEVEL[$i]=$((${AFCTEMP_LEVEL[$i]} - 1)) + FLAG=1 + elif (( "${AFCTEMP[$i]}" < "$AFCTEMP_LOWER" )); then + AFCTEMP_LEVEL[$i]=$((${AFCTEMP_LEVEL[$i]} + 1)) + FLAG=1 + else + AFCTEMP_LEVEL[$i]=1 + FLAG=2 + fi +} + +function UpdateFanSpeeds +{ + #echo "num tmp lev F L H" + #Update level + for i in 1 2 3 + do + #echo "----------------------" + FLAG=0 + #FLAG=0 : initial flag + #FLAG=1 : update level + #FLAG=2 : final level + while [ $FLAG -ne 2 ] + do + UpdateThermalLevel + #echo " $i ${AFCTEMP[$i]} ${AFCTEMP_LEVEL[$i]} $FLAG $AFCTEMP_LOWER $AFCTEMP_UPPER " + done + done + + min=${AFCTEMP_LEVEL[0]} + for j in "${AFCTEMP_LEVEL[@]}"; do + (( j < min )) && min=$j + done + + if (($min == 1 || $min == 2)); then + FAN_PERCENTAGE=100 + elif (($min == 3)); then + FAN_PERCENTAGE=80 + elif (($min == 4)); then + FAN_PERCENTAGE=60 + elif (($min == 5)); then + FAN_PERCENTAGE=40 + elif (($min == 6)); then + FAN_PERCENTAGE=30 + else + FAN_PERCENTAGE=100 + fi + echo "The lowest level of thermal sensors: $min " + echo "Trying to set fan speed to $FAN_PERCENTAGE %" + #Set speed to fan1~fan10 + FAN_PERCENTAGE=`expr $FAN_PERCENTAGE \* 255 / 100` + let fcvcount=0 + for fcv in $FCFANS + do + fcvcount=$(( fcvcount + 1 )) + echo $FAN_PERCENTAGE > ${AFCFAN_TARGET[$fcvcount]} + AFCFAN[$fcvcount]=$( cat ${AFCFAN_PATH[$fcvcount]} ) + + echo "FAN fan$fcvcount = ${AFCFAN[$fcvcount]} (rpm)" + done + + rm -f "$PIDFILE" +} + +# main loop calling the main function at specified intervals +AFCTEMP_LEVEL=(9 4 4 4) #inttial level +while true +do + UpdateThermalSensors + UpdateFanSpeeds + echo "Sleep $INTERVAL seconds ..." + echo + # Sleep while still handling signals + sleep $INTERVAL & + wait $! +done diff --git a/device/delta/x86_64-delta_et-6248brb-r0/installer.conf b/device/delta/x86_64-delta_et-6248brb-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/delta/x86_64-delta_et-6248brb-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/delta/x86_64-delta_et-6248brb-r0/led_proc_init.soc b/device/delta/x86_64-delta_et-6248brb-r0/led_proc_init.soc new file mode 100644 index 00000000000..ebc8f238a33 --- /dev/null +++ b/device/delta/x86_64-delta_et-6248brb-r0/led_proc_init.soc @@ -0,0 +1,46 @@ +#ET_6248BRB Port_Remap +# Vlan set and port enable +clear c +port ge en=1 +port hg en=1 + +# led0 port order remap +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=0 REMAP_PORT_1=1 REMAP_PORT_2=2 REMAP_PORT_3=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=4 REMAP_PORT_5=5 REMAP_PORT_6=6 REMAP_PORT_7=7 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=51 REMAP_PORT_9=50 REMAP_PORT_10=49 REMAP_PORT_11=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=47 REMAP_PORT_13=46 REMAP_PORT_14=45 REMAP_PORT_15=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=43 REMAP_PORT_17=42 REMAP_PORT_18=41 REMAP_PORT_19=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=39 REMAP_PORT_21=38 REMAP_PORT_22=37 REMAP_PORT_23=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=35 REMAP_PORT_25=34 REMAP_PORT_26=33 REMAP_PORT_27=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=31 REMAP_PORT_29=30 REMAP_PORT_30=29 REMAP_PORT_31=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=27 REMAP_PORT_33=26 REMAP_PORT_34=25 REMAP_PORT_35=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=23 REMAP_PORT_37=22 REMAP_PORT_38=21 REMAP_PORT_39=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=19 REMAP_PORT_41=18 REMAP_PORT_42=17 REMAP_PORT_43=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=15 REMAP_PORT_45=14 REMAP_PORT_46=13 REMAP_PORT_47=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=11 REMAP_PORT_49=10 REMAP_PORT_50=9 REMAP_PORT_51=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=7 REMAP_PORT_53=6 REMAP_PORT_54=5 REMAP_PORT_55=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=3 REMAP_PORT_57=2 REMAP_PORT_58=1 REMAP_PORT_59=0 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=60 REMAP_PORT_61=61 REMAP_PORT_62=62 REMAP_PORT_63=63 + +echo "ET_6248BRB LED Port Remap: Done." + +#ET_6248BRB_LED + +#-------------------------------------------------------------------------------------------------- +#LED Auto link/up + +led stop +led prog '\ + 02 00 60 E0 02 A0 60 E2 86 E6 02 00 60 E1 06 E0\ + D2 30 75 28 02 00 2E E0 32 08 97 71 1F 77 44 2E\ + E0 32 04 97 71 3C 77 40 02 00 2E E0 32 08 97 71\ + 33 77 44 2E E0 32 03 97 71 3C 77 40 02 02 77 44\ + 02 04 77 44 60 E3 2E E0 32 00 32 01 B7 97 02 00\ + 0E 00 12 E4 FE E1 50 12 E4 05 60 E5 12 E3 05 0A\ + 02 71 67 67 9A 77 69 67 86 12 E3 05 0A 01 71 74\ + 67 9A 77 76 67 86 06 E2 F2 01 60 E2 86 E0 06 E0\ + D2 34 74 0A 3A 68 06 E5 D2 00 70 96 16 E6 99 99\ + 1A 00 71 96 77 9A 32 0F 87 57 32 0E 87 57 00 00\ +' +led auto on +led start diff --git a/device/delta/x86_64-delta_et-6248brb-r0/plugins/eeprom.py b/device/delta/x86_64-delta_et-6248brb-r0/plugins/eeprom.py new file mode 100644 index 00000000000..11c9285f47d --- /dev/null +++ b/device/delta/x86_64-delta_et-6248brb-r0/plugins/eeprom.py @@ -0,0 +1,32 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + _TLV_INFO_MAX_LEN = 256 + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/devices/pci0000:00/0000:00:13.0/i2c-1/1-0054/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/delta/x86_64-delta_et-6248brb-r0/plugins/psuutil.py b/device/delta/x86_64-delta_et-6248brb-r0/plugins/psuutil.py new file mode 100644 index 00000000000..99e8f1d17dd --- /dev/null +++ b/device/delta/x86_64-delta_et-6248brb-r0/plugins/psuutil.py @@ -0,0 +1,55 @@ +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/devices/platform/delta-et6248brb-gpio.0/PSU/psu{}_pg" + self.psu_oper_status = "in1_input" + self.psu_presence = "/sys/devices/platform/delta-et6248brb-gpio.0/PSU/psu{}_pres" + + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + if index is None: + return False + + try: + reg_file = open(self.psu_path.format(index)) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + if int(reg_file.readline()) == 1: + return True + + return False + + def get_psu_presence(self, index): + if index is None: + return False + + try: + reg_file = open(self.psu_presence.format(index)) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + if int(reg_file.readline()) == 0: + return True + + return False diff --git a/device/delta/x86_64-delta_et-6248brb-r0/plugins/sfputil.py b/device/delta/x86_64-delta_et-6248brb-r0/plugins/sfputil.py new file mode 100644 index 00000000000..84a3bfc3dac --- /dev/null +++ b/device/delta/x86_64-delta_et-6248brb-r0/plugins/sfputil.py @@ -0,0 +1,96 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 48 + PORT_END = 49 + PORTS_IN_BLOCK = 1 + + EEPROM_OFFSET = 44 + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + if x >= self.port_start and x <= self.port_end: + self._port_to_eeprom_mapping[x] = eeprom_path.format(x - self.EEPROM_OFFSET) + else: + self._port_to_eeprom_mapping[x] = eeprom_path.format(x - x) + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + presence_path = "/sys/devices/platform/delta-et6248brb-gpio.0/SFP/sfp_mod_p{}" + + try: + reg_file = open(presence_path.format(port_num - 47)) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + if int(reg_file.readline()) == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/delta/x86_64-delta_et-6248brb-r0/sensors.conf b/device/delta/x86_64-delta_et-6248brb-r0/sensors.conf new file mode 100644 index 00000000000..d5da19ffecd --- /dev/null +++ b/device/delta/x86_64-delta_et-6248brb-r0/sensors.conf @@ -0,0 +1,13 @@ +# libsensors configuration file for et-6248brb +# ------------------------------------------------ + +chip "tmp75-i2c-0-48" + label temp1 "0-0048 thermal sensor" +chip "tmp75-i2c-7-49" + label temp1 "7-0048 thermal sensor" +chip "tmp75-i2c-8-4a" + label temp1 "8-004a thermal sensor" + +chip "adt7473-i2c-0-2e" + label fan1 "FANTRAY 1" + label fan2 "FANTRAY 2" \ No newline at end of file diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/buffers.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/buffers.json.j2 new file mode 100644 index 00000000000..4fca9cbcd15 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 32 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/config_32x400G_Delta-et-c032if.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/config_32x400G_Delta-et-c032if.yaml new file mode 100755 index 00000000000..2ba23d2a5a6 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/config_32x400G_Delta-et-c032if.yaml @@ -0,0 +1,429 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_A" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:8" + serdes_group: "31" + speed: "400G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:8" + serdes_group: "30" + speed: "400G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:8" + serdes_group: "29" + speed: "400G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:8" + serdes_group: "28" + speed: "400G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:8" + serdes_group: "27" + speed: "400G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:8" + serdes_group: "26" + speed: "400G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:8" + serdes_group: "25" + speed: "400G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:8" + serdes_group: "24" + speed: "400G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:8" + serdes_group: "23" + speed: "400G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:8" + serdes_group: "22" + speed: "400G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:8" + serdes_group: "21" + speed: "400G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:8" + serdes_group: "20" + speed: "400G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:8" + serdes_group: "19" + speed: "400G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:8" + serdes_group: "18" + speed: "400G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:8" + serdes_group: "17" + speed: "400G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:8" + serdes_group: "16" + speed: "400G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:8" + serdes_group: "15" + speed: "400G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:8" + serdes_group: "14" + speed: "400G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:8" + serdes_group: "12" + speed: "400G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:8" + serdes_group: "13" + speed: "400G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:8" + serdes_group: "10" + speed: "400G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:8" + serdes_group: "11" + speed: "400G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:8" + serdes_group: "8" + speed: "400G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:8" + serdes_group: "9" + speed: "400G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:8" + serdes_group: "6" + speed: "400G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:8" + serdes_group: "7" + speed: "400G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:8" + serdes_group: "4" + speed: "400G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:8" + serdes_group: "5" + speed: "400G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:8" + serdes_group: "2" + speed: "400G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:8" + serdes_group: "3" + speed: "400G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:8" + serdes_group: "0" + speed: "400G" + sysport: "1" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:8" + serdes_group: "1" + speed: "400G" + sysport: "9" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + tx_polarity: "01010101" + rx_polarity: "01100000" + lane_swap: "23641075" + - id: "1" + tx_polarity: "10110000" + rx_polarity: "11111111" + lane_swap: "64317520" + - id: "2" + tx_polarity: "00000000" + rx_polarity: "00000011" + lane_swap: "63147520" + - id: "3" + tx_polarity: "01101000" + rx_polarity: "00001110" + lane_swap: "31572046" + - id: "4" + tx_polarity: "00111000" + rx_polarity: "00001000" + lane_swap: "46105732" + - id: "5" + tx_polarity: "10111111" + rx_polarity: "11101000" + lane_swap: "27153604" + - id: "6" + tx_polarity: "01101110" + rx_polarity: "00001101" + lane_swap: "46503721" + - id: "7" + tx_polarity: "01000100" + rx_polarity: "10000101" + lane_swap: "03671245" + - id: "8" + tx_polarity: "01110101" + rx_polarity: "00010000" + lane_swap: "12640375" + - id: "9" + tx_polarity: "01011100" + rx_polarity: "11001111" + lane_swap: "02561347" + - id: "10" + tx_polarity: "01110110" + rx_polarity: "11000000" + lane_swap: "12740365" + - id: "11" + tx_polarity: "00111000" + rx_polarity: "00010111" + lane_swap: "01572436" + - id: "12" + tx_polarity: "00001111" + rx_polarity: "10111001" + lane_swap: "54320176" + - id: "13" + tx_polarity: "10011101" + rx_polarity: "00111011" + lane_swap: "26153704" + - id: "14" + tx_polarity: "00110000" + rx_polarity: "11010000" + lane_swap: "37452601" + - id: "15" + tx_polarity: "11100010" + rx_polarity: "01110011" + lane_swap: "51370462" + - id: "16" + tx_polarity: "10111010" + rx_polarity: "11010011" + lane_swap: "36152704" + - id: "17" + tx_polarity: "01011101" + rx_polarity: "00110001" + lane_swap: "45621073" + - id: "18" + tx_polarity: "11011111" + rx_polarity: "11001011" + lane_swap: "26143705" + - id: "19" + tx_polarity: "00100110" + rx_polarity: "00001001" + lane_swap: "42730165" + - id: "20" + tx_polarity: "10011011" + rx_polarity: "01101101" + lane_swap: "54217603" + - id: "21" + tx_polarity: "00101110" + rx_polarity: "10111111" + lane_swap: "26031745" + - id: "22" + tx_polarity: "01001110" + rx_polarity: "00111001" + lane_swap: "36024715" + - id: "23" + tx_polarity: "10101101" + rx_polarity: "01010011" + lane_swap: "45621370" + - id: "24" + tx_polarity: "11001110" + rx_polarity: "00011111" + lane_swap: "65234701" + - id: "25" + tx_polarity: "01110001" + rx_polarity: "01010111" + lane_swap: "37601452" + - id: "26" + tx_polarity: "01000100" + rx_polarity: "00001111" + lane_swap: "65034721" + - id: "27" + tx_polarity: "10111101" + rx_polarity: "11000101" + lane_swap: "34501672" + - id: "28" + tx_polarity: "01111000" + rx_polarity: "01110110" + lane_swap: "43061275" + - id: "29" + tx_polarity: "11110111" + rx_polarity: "11100111" + lane_swap: "57304621" + - id: "30" + tx_polarity: "10000100" + rx_polarity: "00101111" + lane_swap: "47125603" + - id: "31" + tx_polarity: "11111111" + rx_polarity: "11100010" + lane_swap: "13460275" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/inno.config.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/inno.config.yaml new file mode 100755 index 00000000000..360b5af8e60 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_32x400G_Delta-et-c032if.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_A" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/innovium.77700_A b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/innovium.77700_A new file mode 100644 index 00000000000..84aa4198360 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/innovium.77700_A @@ -0,0 +1,59 @@ +sku: innovium.77700_A + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 6, 5, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 8:0 + ib: 1 + pic_id: 5 + + isg 31: + mode: 8:0 + ib: 0 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/port_config.ini b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/port_config.ini new file mode 100755 index 00000000000..360e363f485 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/port_config.ini @@ -0,0 +1,35 @@ +# name lanes speed index mtu fec +Ethernet0 249,250,251,252 400000 0 9126 rs +Ethernet8 241,242,243,244 400000 1 9126 rs +Ethernet16 233,234,235,236 400000 2 9126 rs +Ethernet24 225,226,227,228 400000 3 9126 rs +Ethernet32 217,218,219,220 400000 4 9126 rs +Ethernet40 209,210,211,212 400000 5 9126 rs +Ethernet48 201,202,203,204 400000 6 9126 rs +Ethernet56 193,194,195,196 400000 7 9126 rs +Ethernet64 185,186,187,188 400000 8 9126 rs +Ethernet72 177,178,179,180 400000 9 9126 rs +Ethernet80 169,170,171,172 400000 10 9126 rs +Ethernet88 161,162,163,164 400000 11 9126 rs +Ethernet96 153,154,155,156 400000 12 9126 rs +Ethernet104 145,146,147,148 400000 13 9126 rs +Ethernet112 137,138,139,140 400000 14 9126 rs +Ethernet120 129,130,131,132 400000 15 9126 rs +Ethernet128 121,122,123,124 400000 16 9126 rs +Ethernet136 113,114,115,116 400000 17 9126 rs +Ethernet144 97,98,99,100 400000 18 9126 rs +Ethernet152 105,106,107,108 400000 19 9126 rs +Ethernet160 81,82,83,84 400000 20 9126 rs +Ethernet168 89,90,91,92 400000 21 9126 rs +Ethernet176 65,66,67,68 400000 22 9126 rs +Ethernet184 73,74,75,76 400000 23 9126 rs +Ethernet192 49,50,51,52 400000 24 9126 rs +Ethernet200 57,58,59,60 400000 25 9126 rs +Ethernet208 33,34,35,36 400000 26 9126 rs +Ethernet216 41,42,43,44 400000 27 9126 rs +Ethernet224 17,18,19,20 400000 28 9126 rs +Ethernet232 25,26,27,28 400000 29 9126 rs +Ethernet240 1,2,3,4 400000 30 9126 rs +Ethernet248 9,10,11,12 400000 31 9126 rs +Ethernet256 257 10000 32 9126 none +Ethernet257 258 10000 33 9126 none diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/qos.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/qos.json.j2 new file mode 100755 index 00000000000..6c734d46ff2 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 32 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/sai.profile b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/buffers.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/buffers.json.j2 new file mode 100644 index 00000000000..9529fbf52fb --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 128 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*2)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/config_128x100G_Delta-et-c032if.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/config_128x100G_Delta-et-c032if.yaml new file mode 100755 index 00000000000..ad50fd04c2a --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/config_128x100G_Delta-et-c032if.yaml @@ -0,0 +1,1102 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:2" + serdes_group: "31" + speed: "100G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "251" + lanes: "2:2" + serdes_group: "31" + speed: "100G" + sysport: "251" + type: "eth" + - fec: "KPFEC" + id: "253" + lanes: "4:2" + serdes_group: "31" + speed: "100G" + sysport: "253" + type: "eth" + - fec: "KPFEC" + id: "255" + lanes: "6:2" + serdes_group: "31" + speed: "100G" + sysport: "255" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:2" + serdes_group: "30" + speed: "100G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "243" + lanes: "2:2" + serdes_group: "30" + speed: "100G" + sysport: "243" + type: "eth" + - fec: "KPFEC" + id: "245" + lanes: "4:2" + serdes_group: "30" + speed: "100G" + sysport: "245" + type: "eth" + - fec: "KPFEC" + id: "247" + lanes: "6:2" + serdes_group: "30" + speed: "100G" + sysport: "247" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:2" + serdes_group: "29" + speed: "100G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "235" + lanes: "2:2" + serdes_group: "29" + speed: "100G" + sysport: "235" + type: "eth" + - fec: "KPFEC" + id: "237" + lanes: "4:2" + serdes_group: "29" + speed: "100G" + sysport: "237" + type: "eth" + - fec: "KPFEC" + id: "239" + lanes: "6:2" + serdes_group: "29" + speed: "100G" + sysport: "239" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:2" + serdes_group: "28" + speed: "100G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "227" + lanes: "2:2" + serdes_group: "28" + speed: "100G" + sysport: "227" + type: "eth" + - fec: "KPFEC" + id: "229" + lanes: "4:2" + serdes_group: "28" + speed: "100G" + sysport: "229" + type: "eth" + - fec: "KPFEC" + id: "231" + lanes: "6:2" + serdes_group: "28" + speed: "100G" + sysport: "231" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:2" + serdes_group: "27" + speed: "100G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "219" + lanes: "2:2" + serdes_group: "27" + speed: "100G" + sysport: "219" + type: "eth" + - fec: "KPFEC" + id: "221" + lanes: "4:2" + serdes_group: "27" + speed: "100G" + sysport: "221" + type: "eth" + - fec: "KPFEC" + id: "223" + lanes: "6:2" + serdes_group: "27" + speed: "100G" + sysport: "223" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:2" + serdes_group: "26" + speed: "100G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "211" + lanes: "2:2" + serdes_group: "26" + speed: "100G" + sysport: "211" + type: "eth" + - fec: "KPFEC" + id: "213" + lanes: "4:2" + serdes_group: "26" + speed: "100G" + sysport: "213" + type: "eth" + - fec: "KPFEC" + id: "215" + lanes: "6:2" + serdes_group: "26" + speed: "100G" + sysport: "215" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:2" + serdes_group: "25" + speed: "100G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "203" + lanes: "2:2" + serdes_group: "25" + speed: "100G" + sysport: "203" + type: "eth" + - fec: "KPFEC" + id: "205" + lanes: "4:2" + serdes_group: "25" + speed: "100G" + sysport: "205" + type: "eth" + - fec: "KPFEC" + id: "207" + lanes: "6:2" + serdes_group: "25" + speed: "100G" + sysport: "207" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:2" + serdes_group: "24" + speed: "100G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "195" + lanes: "2:2" + serdes_group: "24" + speed: "100G" + sysport: "195" + type: "eth" + - fec: "KPFEC" + id: "197" + lanes: "4:2" + serdes_group: "24" + speed: "100G" + sysport: "197" + type: "eth" + - fec: "KPFEC" + id: "199" + lanes: "6:2" + serdes_group: "24" + speed: "100G" + sysport: "199" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:2" + serdes_group: "23" + speed: "100G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "187" + lanes: "2:2" + serdes_group: "23" + speed: "100G" + sysport: "187" + type: "eth" + - fec: "KPFEC" + id: "189" + lanes: "4:2" + serdes_group: "23" + speed: "100G" + sysport: "189" + type: "eth" + - fec: "KPFEC" + id: "191" + lanes: "6:2" + serdes_group: "23" + speed: "100G" + sysport: "191" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:2" + serdes_group: "22" + speed: "100G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "179" + lanes: "2:2" + serdes_group: "22" + speed: "100G" + sysport: "179" + type: "eth" + - fec: "KPFEC" + id: "181" + lanes: "4:2" + serdes_group: "22" + speed: "100G" + sysport: "181" + type: "eth" + - fec: "KPFEC" + id: "183" + lanes: "6:2" + serdes_group: "22" + speed: "100G" + sysport: "183" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:2" + serdes_group: "21" + speed: "100G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "171" + lanes: "2:2" + serdes_group: "21" + speed: "100G" + sysport: "171" + type: "eth" + - fec: "KPFEC" + id: "173" + lanes: "4:2" + serdes_group: "21" + speed: "100G" + sysport: "173" + type: "eth" + - fec: "KPFEC" + id: "175" + lanes: "6:2" + serdes_group: "21" + speed: "100G" + sysport: "175" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:2" + serdes_group: "20" + speed: "100G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "163" + lanes: "2:2" + serdes_group: "20" + speed: "100G" + sysport: "163" + type: "eth" + - fec: "KPFEC" + id: "165" + lanes: "4:2" + serdes_group: "20" + speed: "100G" + sysport: "165" + type: "eth" + - fec: "KPFEC" + id: "167" + lanes: "6:2" + serdes_group: "20" + speed: "100G" + sysport: "167" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:2" + serdes_group: "19" + speed: "100G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "155" + lanes: "2:2" + serdes_group: "19" + speed: "100G" + sysport: "155" + type: "eth" + - fec: "KPFEC" + id: "157" + lanes: "4:2" + serdes_group: "19" + speed: "100G" + sysport: "157" + type: "eth" + - fec: "KPFEC" + id: "159" + lanes: "6:2" + serdes_group: "19" + speed: "100G" + sysport: "159" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:2" + serdes_group: "18" + speed: "100G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "147" + lanes: "2:2" + serdes_group: "18" + speed: "100G" + sysport: "147" + type: "eth" + - fec: "KPFEC" + id: "149" + lanes: "4:2" + serdes_group: "18" + speed: "100G" + sysport: "149" + type: "eth" + - fec: "KPFEC" + id: "151" + lanes: "6:2" + serdes_group: "18" + speed: "100G" + sysport: "151" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:2" + serdes_group: "17" + speed: "100G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "139" + lanes: "2:2" + serdes_group: "17" + speed: "100G" + sysport: "139" + type: "eth" + - fec: "KPFEC" + id: "141" + lanes: "4:2" + serdes_group: "17" + speed: "100G" + sysport: "141" + type: "eth" + - fec: "KPFEC" + id: "143" + lanes: "6:2" + serdes_group: "17" + speed: "100G" + sysport: "143" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:2" + serdes_group: "16" + speed: "100G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "131" + lanes: "2:2" + serdes_group: "16" + speed: "100G" + sysport: "131" + type: "eth" + - fec: "KPFEC" + id: "133" + lanes: "4:2" + serdes_group: "16" + speed: "100G" + sysport: "133" + type: "eth" + - fec: "KPFEC" + id: "135" + lanes: "6:2" + serdes_group: "16" + speed: "100G" + sysport: "135" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:2" + serdes_group: "15" + speed: "100G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "123" + lanes: "2:2" + serdes_group: "15" + speed: "100G" + sysport: "123" + type: "eth" + - fec: "KPFEC" + id: "125" + lanes: "4:2" + serdes_group: "15" + speed: "100G" + sysport: "125" + type: "eth" + - fec: "KPFEC" + id: "127" + lanes: "6:2" + serdes_group: "15" + speed: "100G" + sysport: "127" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:2" + serdes_group: "14" + speed: "100G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "115" + lanes: "2:2" + serdes_group: "14" + speed: "100G" + sysport: "115" + type: "eth" + - fec: "KPFEC" + id: "117" + lanes: "4:2" + serdes_group: "14" + speed: "100G" + sysport: "117" + type: "eth" + - fec: "KPFEC" + id: "119" + lanes: "6:2" + serdes_group: "14" + speed: "100G" + sysport: "119" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:2" + serdes_group: "12" + speed: "100G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "99" + lanes: "2:2" + serdes_group: "12" + speed: "100G" + sysport: "99" + type: "eth" + - fec: "KPFEC" + id: "101" + lanes: "4:2" + serdes_group: "12" + speed: "100G" + sysport: "101" + type: "eth" + - fec: "KPFEC" + id: "103" + lanes: "6:2" + serdes_group: "12" + speed: "100G" + sysport: "103" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:2" + serdes_group: "13" + speed: "100G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "107" + lanes: "2:2" + serdes_group: "13" + speed: "100G" + sysport: "107" + type: "eth" + - fec: "KPFEC" + id: "109" + lanes: "4:2" + serdes_group: "13" + speed: "100G" + sysport: "109" + type: "eth" + - fec: "KPFEC" + id: "111" + lanes: "6:2" + serdes_group: "13" + speed: "100G" + sysport: "111" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:2" + serdes_group: "10" + speed: "100G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "83" + lanes: "2:2" + serdes_group: "10" + speed: "100G" + sysport: "83" + type: "eth" + - fec: "KPFEC" + id: "85" + lanes: "4:2" + serdes_group: "10" + speed: "100G" + sysport: "85" + type: "eth" + - fec: "KPFEC" + id: "87" + lanes: "6:2" + serdes_group: "10" + speed: "100G" + sysport: "87" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:2" + serdes_group: "11" + speed: "100G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "91" + lanes: "2:2" + serdes_group: "11" + speed: "100G" + sysport: "91" + type: "eth" + - fec: "KPFEC" + id: "93" + lanes: "4:2" + serdes_group: "11" + speed: "100G" + sysport: "93" + type: "eth" + - fec: "KPFEC" + id: "95" + lanes: "6:2" + serdes_group: "11" + speed: "100G" + sysport: "95" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:2" + serdes_group: "8" + speed: "100G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "67" + lanes: "2:2" + serdes_group: "8" + speed: "100G" + sysport: "67" + type: "eth" + - fec: "KPFEC" + id: "69" + lanes: "4:2" + serdes_group: "8" + speed: "100G" + sysport: "69" + type: "eth" + - fec: "KPFEC" + id: "71" + lanes: "6:2" + serdes_group: "8" + speed: "100G" + sysport: "71" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:2" + serdes_group: "9" + speed: "100G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "75" + lanes: "2:2" + serdes_group: "9" + speed: "100G" + sysport: "75" + type: "eth" + - fec: "KPFEC" + id: "77" + lanes: "4:2" + serdes_group: "9" + speed: "100G" + sysport: "77" + type: "eth" + - fec: "KPFEC" + id: "79" + lanes: "6:2" + serdes_group: "9" + speed: "100G" + sysport: "79" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:2" + serdes_group: "6" + speed: "100G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "51" + lanes: "2:2" + serdes_group: "6" + speed: "100G" + sysport: "51" + type: "eth" + - fec: "KPFEC" + id: "53" + lanes: "4:2" + serdes_group: "6" + speed: "100G" + sysport: "53" + type: "eth" + - fec: "KPFEC" + id: "55" + lanes: "6:2" + serdes_group: "6" + speed: "100G" + sysport: "55" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:2" + serdes_group: "7" + speed: "100G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "59" + lanes: "2:2" + serdes_group: "7" + speed: "100G" + sysport: "59" + type: "eth" + - fec: "KPFEC" + id: "61" + lanes: "4:2" + serdes_group: "7" + speed: "100G" + sysport: "61" + type: "eth" + - fec: "KPFEC" + id: "63" + lanes: "6:2" + serdes_group: "7" + speed: "100G" + sysport: "63" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:2" + serdes_group: "4" + speed: "100G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "35" + lanes: "2:2" + serdes_group: "4" + speed: "100G" + sysport: "35" + type: "eth" + - fec: "KPFEC" + id: "37" + lanes: "4:2" + serdes_group: "4" + speed: "100G" + sysport: "37" + type: "eth" + - fec: "KPFEC" + id: "39" + lanes: "6:2" + serdes_group: "4" + speed: "100G" + sysport: "39" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:2" + serdes_group: "5" + speed: "100G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "43" + lanes: "2:2" + serdes_group: "5" + speed: "100G" + sysport: "43" + type: "eth" + - fec: "KPFEC" + id: "45" + lanes: "4:2" + serdes_group: "5" + speed: "100G" + sysport: "45" + type: "eth" + - fec: "KPFEC" + id: "47" + lanes: "6:2" + serdes_group: "5" + speed: "100G" + sysport: "47" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:2" + serdes_group: "2" + speed: "100G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "19" + lanes: "2:2" + serdes_group: "2" + speed: "100G" + sysport: "19" + type: "eth" + - fec: "KPFEC" + id: "21" + lanes: "4:2" + serdes_group: "2" + speed: "100G" + sysport: "21" + type: "eth" + - fec: "KPFEC" + id: "23" + lanes: "6:2" + serdes_group: "2" + speed: "100G" + sysport: "23" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:2" + serdes_group: "3" + speed: "100G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "27" + lanes: "2:2" + serdes_group: "3" + speed: "100G" + sysport: "27" + type: "eth" + - fec: "KPFEC" + id: "29" + lanes: "4:2" + serdes_group: "3" + speed: "100G" + sysport: "29" + type: "eth" + - fec: "KPFEC" + id: "31" + lanes: "6:2" + serdes_group: "3" + speed: "100G" + sysport: "31" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:2" + serdes_group: "0" + speed: "100G" + sysport: "1" + type: "eth" + - fec: "KPFEC" + id: "3" + lanes: "2:2" + serdes_group: "0" + speed: "100G" + sysport: "3" + type: "eth" + - fec: "KPFEC" + id: "5" + lanes: "4:2" + serdes_group: "0" + speed: "100G" + sysport: "5" + type: "eth" + - fec: "KPFEC" + id: "7" + lanes: "6:2" + serdes_group: "0" + speed: "100G" + sysport: "7" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:2" + serdes_group: "1" + speed: "100G" + sysport: "9" + type: "eth" + - fec: "KPFEC" + id: "11" + lanes: "2:2" + serdes_group: "1" + speed: "100G" + sysport: "11" + type: "eth" + - fec: "KPFEC" + id: "13" + lanes: "4:2" + serdes_group: "1" + speed: "100G" + sysport: "13" + type: "eth" + - fec: "KPFEC" + id: "15" + lanes: "6:2" + serdes_group: "1" + speed: "100G" + sysport: "15" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + + isg: + - id: "0" + tx_polarity: "01010101" + rx_polarity: "01100000" + lane_swap: "23641075" + - id: "1" + tx_polarity: "10110000" + rx_polarity: "11111111" + lane_swap: "64317520" + - id: "2" + tx_polarity: "00000000" + rx_polarity: "00000011" + lane_swap: "63147520" + - id: "3" + tx_polarity: "01101000" + rx_polarity: "00001110" + lane_swap: "31572046" + - id: "4" + tx_polarity: "00111000" + rx_polarity: "00001000" + lane_swap: "46105732" + - id: "5" + tx_polarity: "10111111" + rx_polarity: "11101000" + lane_swap: "27153604" + - id: "6" + tx_polarity: "01101110" + rx_polarity: "00001101" + lane_swap: "46503721" + - id: "7" + tx_polarity: "01000100" + rx_polarity: "10000101" + lane_swap: "03671245" + - id: "8" + tx_polarity: "01110101" + rx_polarity: "00010000" + lane_swap: "12640375" + - id: "9" + tx_polarity: "01011100" + rx_polarity: "11001111" + lane_swap: "02561347" + - id: "10" + tx_polarity: "01110110" + rx_polarity: "11000000" + lane_swap: "12740365" + - id: "11" + tx_polarity: "00111000" + rx_polarity: "00010111" + lane_swap: "01572436" + - id: "12" + tx_polarity: "00001111" + rx_polarity: "10111001" + lane_swap: "54320176" + - id: "13" + tx_polarity: "10011101" + rx_polarity: "00111011" + lane_swap: "26153704" + - id: "14" + tx_polarity: "00110000" + rx_polarity: "11010000" + lane_swap: "37452601" + - id: "15" + tx_polarity: "11100010" + rx_polarity: "01110011" + lane_swap: "51370462" + - id: "16" + tx_polarity: "10111010" + rx_polarity: "11010011" + lane_swap: "36152704" + - id: "17" + tx_polarity: "01011101" + rx_polarity: "00110001" + lane_swap: "45621073" + - id: "18" + tx_polarity: "11011111" + rx_polarity: "11001011" + lane_swap: "26143705" + - id: "19" + tx_polarity: "00100110" + rx_polarity: "00001001" + lane_swap: "42730165" + - id: "20" + tx_polarity: "10011011" + rx_polarity: "01101101" + lane_swap: "54217603" + - id: "21" + tx_polarity: "00101110" + rx_polarity: "10111111" + lane_swap: "26031745" + - id: "22" + tx_polarity: "01001110" + rx_polarity: "00111001" + lane_swap: "36024715" + - id: "23" + tx_polarity: "10101101" + rx_polarity: "01010011" + lane_swap: "45621370" + - id: "24" + tx_polarity: "11001110" + rx_polarity: "00011111" + lane_swap: "65234701" + - id: "25" + tx_polarity: "01110001" + rx_polarity: "01010111" + lane_swap: "37601452" + - id: "26" + tx_polarity: "01000100" + rx_polarity: "00001111" + lane_swap: "65034721" + - id: "27" + tx_polarity: "10111101" + rx_polarity: "11000101" + lane_swap: "34501672" + - id: "28" + tx_polarity: "01111000" + rx_polarity: "01110110" + lane_swap: "43061275" + - id: "29" + tx_polarity: "11110111" + rx_polarity: "11100111" + lane_swap: "57304621" + - id: "30" + tx_polarity: "10000100" + rx_polarity: "00101111" + lane_swap: "47125603" + - id: "31" + tx_polarity: "11111111" + rx_polarity: "11100010" + lane_swap: "13460275" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/inno.config.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/inno.config.yaml new file mode 100755 index 00000000000..17f3e060d71 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_128x100G_Delta-et-c032if.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/innovium.77700_B b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/port_config.ini b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/port_config.ini new file mode 100644 index 00000000000..cd4dbc611ec --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/port_config.ini @@ -0,0 +1,131 @@ +# name lanes speed index mtu +Ethernet0 249,250 100000 0 9126 +Ethernet2 251,252 100000 0 9126 +Ethernet4 253,254 100000 0 9126 +Ethernet6 255,256 100000 0 9126 +Ethernet8 241,242 100000 1 9126 +Ethernet10 243,244 100000 1 9126 +Ethernet12 245,246 100000 1 9126 +Ethernet14 247,248 100000 1 9126 +Ethernet16 233,234 100000 2 9126 +Ethernet18 235,236 100000 2 9126 +Ethernet20 237,238 100000 2 9126 +Ethernet22 239,240 100000 2 9126 +Ethernet24 225,226 100000 3 9126 +Ethernet26 227,228 100000 3 9126 +Ethernet28 229,230 100000 3 9126 +Ethernet30 231,232 100000 3 9126 +Ethernet32 217,218 100000 4 9126 +Ethernet34 219,220 100000 4 9126 +Ethernet36 221,222 100000 4 9126 +Ethernet38 223,224 100000 4 9126 +Ethernet40 209,210 100000 5 9126 +Ethernet42 211,212 100000 5 9126 +Ethernet44 213,214 100000 5 9126 +Ethernet46 215,216 100000 5 9126 +Ethernet48 201,202 100000 6 9126 +Ethernet50 203,204 100000 6 9126 +Ethernet52 205,206 100000 6 9126 +Ethernet54 207,208 100000 6 9126 +Ethernet56 193,194 100000 7 9126 +Ethernet58 195,196 100000 7 9126 +Ethernet60 197,198 100000 7 9126 +Ethernet62 199,200 100000 7 9126 +Ethernet64 185,186 100000 8 9126 +Ethernet66 187,188 100000 8 9126 +Ethernet68 189,190 100000 8 9126 +Ethernet70 191,192 100000 8 9126 +Ethernet72 177,178 100000 9 9126 +Ethernet74 179,180 100000 9 9126 +Ethernet76 181,182 100000 9 9126 +Ethernet78 183,184 100000 9 9126 +Ethernet80 169,170 100000 10 9126 +Ethernet82 171,172 100000 10 9126 +Ethernet84 173,174 100000 10 9126 +Ethernet86 175,176 100000 10 9126 +Ethernet88 161,162 100000 11 9126 +Ethernet90 163,164 100000 11 9126 +Ethernet92 165,166 100000 11 9126 +Ethernet94 167,168 100000 11 9126 +Ethernet96 153,154 100000 12 9126 +Ethernet98 155,156 100000 12 9126 +Ethernet100 157,158 100000 12 9126 +Ethernet102 159,160 100000 12 9126 +Ethernet104 145,146 100000 13 9126 +Ethernet106 147,148 100000 13 9126 +Ethernet108 149,150 100000 13 9126 +Ethernet110 151,152 100000 13 9126 +Ethernet112 137,138 100000 14 9126 +Ethernet114 139,140 100000 14 9126 +Ethernet116 141,142 100000 14 9126 +Ethernet118 143,144 100000 14 9126 +Ethernet120 129,130 100000 15 9126 +Ethernet122 131,132 100000 15 9126 +Ethernet124 133,134 100000 15 9126 +Ethernet126 135,136 100000 15 9126 +Ethernet128 121,122 100000 16 9126 +Ethernet130 123,124 100000 16 9126 +Ethernet132 125,126 100000 16 9126 +Ethernet134 127,128 100000 16 9126 +Ethernet136 113,114 100000 17 9126 +Ethernet138 115,116 100000 17 9126 +Ethernet140 117,118 100000 17 9126 +Ethernet142 119,120 100000 17 9126 +Ethernet144 97,98 100000 18 9126 +Ethernet146 99,100 100000 18 9126 +Ethernet148 101,102 100000 18 9126 +Ethernet150 103,104 100000 18 9126 +Ethernet152 105,106 100000 19 9126 +Ethernet154 107,108 100000 19 9126 +Ethernet156 109,110 100000 19 9126 +Ethernet158 111,112 100000 19 9126 +Ethernet160 81,82 100000 20 9126 +Ethernet162 83,84 100000 20 9126 +Ethernet164 85,86 100000 20 9126 +Ethernet166 87,88 100000 20 9126 +Ethernet168 89,90 100000 21 9126 +Ethernet170 91,92 100000 21 9126 +Ethernet172 93,94 100000 21 9126 +Ethernet174 95,96 100000 21 9126 +Ethernet176 65,66 100000 22 9126 +Ethernet178 67,68 100000 22 9126 +Ethernet180 69,70 100000 22 9126 +Ethernet182 71,72 100000 22 9126 +Ethernet184 73,74 100000 23 9126 +Ethernet186 75,76 100000 23 9126 +Ethernet188 77,78 100000 23 9126 +Ethernet190 79,80 100000 23 9126 +Ethernet192 49,50 100000 24 9126 +Ethernet194 51,52 100000 24 9126 +Ethernet196 53,54 100000 24 9126 +Ethernet198 55,56 100000 24 9126 +Ethernet200 57,58 100000 25 9126 +Ethernet202 59,60 100000 25 9126 +Ethernet204 61,62 100000 25 9126 +Ethernet206 63,64 100000 25 9126 +Ethernet208 33,34 100000 26 9126 +Ethernet210 35,36 100000 26 9126 +Ethernet212 37,38 100000 26 9126 +Ethernet214 39,40 100000 26 9126 +Ethernet216 41,42 100000 27 9126 +Ethernet218 43,44 100000 27 9126 +Ethernet220 45,46 100000 27 9126 +Ethernet222 47,48 100000 27 9126 +Ethernet224 17,18 100000 28 9126 +Ethernet226 19,20 100000 28 9126 +Ethernet228 21,22 100000 28 9126 +Ethernet230 23,24 100000 28 9126 +Ethernet232 25,26 100000 29 9126 +Ethernet234 27,28 100000 29 9126 +Ethernet236 29,30 100000 29 9126 +Ethernet238 31,32 100000 29 9126 +Ethernet240 1,2 100000 30 9126 +Ethernet242 3,4 100000 30 9126 +Ethernet244 5,6 100000 30 9126 +Ethernet246 7,8 100000 30 9126 +Ethernet248 9,10 100000 31 9126 +Ethernet250 11,12 100000 31 9126 +Ethernet252 13,14 100000 31 9126 +Ethernet254 15,16 100000 31 9126 +Ethernet256 257 10000 32 9126 +Ethernet257 258 10000 33 9126 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/qos.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/qos.json.j2 new file mode 100755 index 00000000000..733bd51dc86 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 128 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*2)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/sai.profile b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_128x100/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/buffers.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/buffers.json.j2 new file mode 100644 index 00000000000..4fca9cbcd15 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 32 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/config_32x100G_Delta-et-c032if.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/config_32x100G_Delta-et-c032if.yaml new file mode 100755 index 00000000000..4b4f02da489 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/config_32x100G_Delta-et-c032if.yaml @@ -0,0 +1,415 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KRFEC" + id: "249" + lanes: "0:4" + serdes_group: "31" + speed: "100G" + sysport: "249" + type: "eth" + - fec: "KRFEC" + id: "241" + lanes: "0:4" + serdes_group: "30" + speed: "100G" + sysport: "241" + type: "eth" + - fec: "KRFEC" + id: "233" + lanes: "0:4" + serdes_group: "29" + speed: "100G" + sysport: "233" + type: "eth" + - fec: "KRFEC" + id: "225" + lanes: "0:4" + serdes_group: "28" + speed: "100G" + sysport: "225" + type: "eth" + - fec: "KRFEC" + id: "217" + lanes: "0:4" + serdes_group: "27" + speed: "100G" + sysport: "217" + type: "eth" + - fec: "KRFEC" + id: "209" + lanes: "0:4" + serdes_group: "26" + speed: "100G" + sysport: "209" + type: "eth" + - fec: "KRFEC" + id: "201" + lanes: "0:4" + serdes_group: "25" + speed: "100G" + sysport: "201" + type: "eth" + - fec: "KRFEC" + id: "193" + lanes: "0:4" + serdes_group: "24" + speed: "100G" + sysport: "193" + type: "eth" + - fec: "KRFEC" + id: "185" + lanes: "0:4" + serdes_group: "23" + speed: "100G" + sysport: "185" + type: "eth" + - fec: "KRFEC" + id: "177" + lanes: "0:4" + serdes_group: "22" + speed: "100G" + sysport: "177" + type: "eth" + - fec: "KRFEC" + id: "169" + lanes: "0:4" + serdes_group: "21" + speed: "100G" + sysport: "169" + type: "eth" + - fec: "KRFEC" + id: "161" + lanes: "0:4" + serdes_group: "20" + speed: "100G" + sysport: "161" + type: "eth" + - fec: "KRFEC" + id: "153" + lanes: "0:4" + serdes_group: "19" + speed: "100G" + sysport: "153" + type: "eth" + - fec: "KRFEC" + id: "145" + lanes: "0:4" + serdes_group: "18" + speed: "100G" + sysport: "145" + type: "eth" + - fec: "KRFEC" + id: "137" + lanes: "0:4" + serdes_group: "17" + speed: "100G" + sysport: "137" + type: "eth" + - fec: "KRFEC" + id: "129" + lanes: "0:4" + serdes_group: "16" + speed: "100G" + sysport: "129" + type: "eth" + - fec: "KRFEC" + id: "121" + lanes: "0:4" + serdes_group: "15" + speed: "100G" + sysport: "121" + type: "eth" + - fec: "KRFEC" + id: "113" + lanes: "0:4" + serdes_group: "14" + speed: "100G" + sysport: "113" + type: "eth" + - fec: "KRFEC" + id: "97" + lanes: "0:4" + serdes_group: "12" + speed: "100G" + sysport: "97" + type: "eth" + - fec: "KRFEC" + id: "105" + lanes: "0:4" + serdes_group: "13" + speed: "100G" + sysport: "105" + type: "eth" + - fec: "KRFEC" + id: "81" + lanes: "0:4" + serdes_group: "10" + speed: "100G" + sysport: "81" + type: "eth" + - fec: "KRFEC" + id: "89" + lanes: "0:4" + serdes_group: "11" + speed: "100G" + sysport: "89" + type: "eth" + - fec: "KRFEC" + id: "65" + lanes: "0:4" + serdes_group: "8" + speed: "100G" + sysport: "65" + type: "eth" + - fec: "KRFEC" + id: "73" + lanes: "0:4" + serdes_group: "9" + speed: "100G" + sysport: "73" + type: "eth" + - fec: "KRFEC" + id: "49" + lanes: "0:4" + serdes_group: "6" + speed: "100G" + sysport: "49" + type: "eth" + - fec: "KRFEC" + id: "57" + lanes: "0:4" + serdes_group: "7" + speed: "100G" + sysport: "57" + type: "eth" + - fec: "KRFEC" + id: "33" + lanes: "0:4" + serdes_group: "4" + speed: "100G" + sysport: "33" + type: "eth" + - fec: "KRFEC" + id: "41" + lanes: "0:4" + serdes_group: "5" + speed: "100G" + sysport: "41" + type: "eth" + - fec: "KRFEC" + id: "17" + lanes: "0:4" + serdes_group: "2" + speed: "100G" + sysport: "17" + type: "eth" + - fec: "KRFEC" + id: "25" + lanes: "0:4" + serdes_group: "3" + speed: "100G" + sysport: "25" + type: "eth" + - fec: "KRFEC" + id: "1" + lanes: "0:4" + serdes_group: "0" + speed: "100G" + sysport: "1" + type: "eth" + - fec: "KRFEC" + id: "9" + lanes: "0:4" + serdes_group: "1" + speed: "100G" + sysport: "9" + type: "eth" + isg: + - id: "0" + tx_polarity: "01010101" + rx_polarity: "01100000" + lane_swap: "23641075" + - id: "1" + tx_polarity: "10110000" + rx_polarity: "11111111" + lane_swap: "64317520" + - id: "2" + tx_polarity: "00000000" + rx_polarity: "00000011" + lane_swap: "63147520" + - id: "3" + tx_polarity: "01101000" + rx_polarity: "00001110" + lane_swap: "31572046" + - id: "4" + tx_polarity: "00111000" + rx_polarity: "00001000" + lane_swap: "46105732" + - id: "5" + tx_polarity: "10111111" + rx_polarity: "11101000" + lane_swap: "27153604" + - id: "6" + tx_polarity: "01101110" + rx_polarity: "00001101" + lane_swap: "46503721" + - id: "7" + tx_polarity: "01000100" + rx_polarity: "10000101" + lane_swap: "03671245" + - id: "8" + tx_polarity: "01110101" + rx_polarity: "00010000" + lane_swap: "12640375" + - id: "9" + tx_polarity: "01011100" + rx_polarity: "11001111" + lane_swap: "02561347" + - id: "10" + tx_polarity: "01110110" + rx_polarity: "11000000" + lane_swap: "12740365" + - id: "11" + tx_polarity: "00111000" + rx_polarity: "00010111" + lane_swap: "01572436" + - id: "12" + tx_polarity: "00001111" + rx_polarity: "10111001" + lane_swap: "54320176" + - id: "13" + tx_polarity: "10011101" + rx_polarity: "00111011" + lane_swap: "26153704" + - id: "14" + tx_polarity: "00110000" + rx_polarity: "11010000" + lane_swap: "37452601" + - id: "15" + tx_polarity: "11100010" + rx_polarity: "01110011" + lane_swap: "51370462" + - id: "16" + tx_polarity: "10111010" + rx_polarity: "11010011" + lane_swap: "36152704" + - id: "17" + tx_polarity: "01011101" + rx_polarity: "00110001" + lane_swap: "45621073" + - id: "18" + tx_polarity: "11011111" + rx_polarity: "11001011" + lane_swap: "26143705" + - id: "19" + tx_polarity: "00100110" + rx_polarity: "00001001" + lane_swap: "42730165" + - id: "20" + tx_polarity: "10011011" + rx_polarity: "01101101" + lane_swap: "54217603" + - id: "21" + tx_polarity: "00101110" + rx_polarity: "10111111" + lane_swap: "26031745" + - id: "22" + tx_polarity: "01001110" + rx_polarity: "00111001" + lane_swap: "36024715" + - id: "23" + tx_polarity: "10101101" + rx_polarity: "01010011" + lane_swap: "45621370" + - id: "24" + tx_polarity: "11001110" + rx_polarity: "00011111" + lane_swap: "65234701" + - id: "25" + tx_polarity: "01110001" + rx_polarity: "01010111" + lane_swap: "37601452" + - id: "26" + tx_polarity: "01000100" + rx_polarity: "00001111" + lane_swap: "65034721" + - id: "27" + tx_polarity: "10111101" + rx_polarity: "11000101" + lane_swap: "34501672" + - id: "28" + tx_polarity: "01111000" + rx_polarity: "01110110" + lane_swap: "43061275" + - id: "29" + tx_polarity: "11110111" + rx_polarity: "11100111" + lane_swap: "57304621" + - id: "30" + tx_polarity: "10000100" + rx_polarity: "00101111" + lane_swap: "47125603" + - id: "31" + tx_polarity: "11111111" + rx_polarity: "11100010" + lane_swap: "13460275" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/inno.config.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/inno.config.yaml new file mode 100755 index 00000000000..9350e166634 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_32x100G_Delta-et-c032if.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/innovium.77700_A b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/innovium.77700_A new file mode 100644 index 00000000000..84aa4198360 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/innovium.77700_A @@ -0,0 +1,59 @@ +sku: innovium.77700_A + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 6, 5, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 8:0 + ib: 1 + pic_id: 5 + + isg 31: + mode: 8:0 + ib: 0 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/innovium.77700_B b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/port_config.ini b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/port_config.ini new file mode 100755 index 00000000000..45fbfd346c9 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/port_config.ini @@ -0,0 +1,33 @@ +# name lanes speed index mtu fec +Ethernet0 249,250,251,252 100000 0 9126 rs +Ethernet8 241,242,243,244 100000 1 9126 rs +Ethernet16 233,234,235,236 100000 2 9126 rs +Ethernet24 225,226,227,228 100000 3 9126 rs +Ethernet32 217,218,219,220 100000 4 9126 rs +Ethernet40 209,210,211,212 100000 5 9126 rs +Ethernet48 201,202,203,204 100000 6 9126 rs +Ethernet56 193,194,195,196 100000 7 9126 rs +Ethernet64 185,186,187,188 100000 8 9126 rs +Ethernet72 177,178,179,180 100000 9 9126 rs +Ethernet80 169,170,171,172 100000 10 9126 rs +Ethernet88 161,162,163,164 100000 11 9126 rs +Ethernet96 153,154,155,156 100000 12 9126 rs +Ethernet104 145,146,147,148 100000 13 9126 rs +Ethernet112 137,138,139,140 100000 14 9126 rs +Ethernet120 129,130,131,132 100000 15 9126 rs +Ethernet128 121,122,123,124 100000 16 9126 rs +Ethernet136 113,114,115,116 100000 17 9126 rs +Ethernet144 97,98,99,100 100000 18 9126 rs +Ethernet152 105,106,107,108 100000 19 9126 rs +Ethernet160 81,82,83,84 100000 20 9126 rs +Ethernet168 89,90,91,92 100000 21 9126 rs +Ethernet176 65,66,67,68 100000 22 9126 rs +Ethernet184 73,74,75,76 100000 23 9126 rs +Ethernet192 49,50,51,52 100000 24 9126 rs +Ethernet200 57,58,59,60 100000 25 9126 rs +Ethernet208 33,34,35,36 100000 26 9126 rs +Ethernet216 41,42,43,44 100000 27 9126 rs +Ethernet224 17,18,19,20 100000 28 9126 rs +Ethernet232 25,26,27,28 100000 29 9126 rs +Ethernet240 1,2,3,4 100000 30 9126 rs +Ethernet248 9,10,11,12 100000 31 9126 rs diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/qos.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/qos.json.j2 new file mode 100755 index 00000000000..6c734d46ff2 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 32 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/sai.profile b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x100/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/buffers.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/buffers.json.j2 new file mode 100644 index 00000000000..4fca9cbcd15 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 32 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/config_32x200G_Delta-et-c032if.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/config_32x200G_Delta-et-c032if.yaml new file mode 100755 index 00000000000..0a76811110e --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/config_32x200G_Delta-et-c032if.yaml @@ -0,0 +1,429 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:4" + serdes_group: "31" + speed: "200G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:4" + serdes_group: "30" + speed: "200G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:4" + serdes_group: "29" + speed: "200G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:4" + serdes_group: "28" + speed: "200G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:4" + serdes_group: "27" + speed: "200G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:4" + serdes_group: "26" + speed: "200G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:4" + serdes_group: "25" + speed: "200G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:4" + serdes_group: "24" + speed: "200G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:4" + serdes_group: "23" + speed: "200G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:4" + serdes_group: "22" + speed: "200G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:4" + serdes_group: "21" + speed: "200G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:4" + serdes_group: "20" + speed: "200G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:4" + serdes_group: "19" + speed: "200G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:4" + serdes_group: "18" + speed: "200G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:4" + serdes_group: "17" + speed: "200G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:4" + serdes_group: "16" + speed: "200G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:4" + serdes_group: "15" + speed: "200G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:4" + serdes_group: "14" + speed: "200G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:4" + serdes_group: "12" + speed: "200G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:4" + serdes_group: "13" + speed: "200G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:4" + serdes_group: "10" + speed: "200G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:4" + serdes_group: "11" + speed: "200G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:4" + serdes_group: "8" + speed: "200G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:4" + serdes_group: "9" + speed: "200G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:4" + serdes_group: "6" + speed: "200G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:4" + serdes_group: "7" + speed: "200G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:4" + serdes_group: "4" + speed: "200G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:4" + serdes_group: "5" + speed: "200G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:4" + serdes_group: "2" + speed: "200G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:4" + serdes_group: "3" + speed: "200G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:4" + serdes_group: "0" + speed: "200G" + sysport: "1" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:4" + serdes_group: "1" + speed: "200G" + sysport: "9" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + tx_polarity: "01010101" + rx_polarity: "01100000" + lane_swap: "23641075" + - id: "1" + tx_polarity: "10110000" + rx_polarity: "11111111" + lane_swap: "64317520" + - id: "2" + tx_polarity: "00000000" + rx_polarity: "00000011" + lane_swap: "63147520" + - id: "3" + tx_polarity: "01101000" + rx_polarity: "00001110" + lane_swap: "31572046" + - id: "4" + tx_polarity: "00111000" + rx_polarity: "00001000" + lane_swap: "46105732" + - id: "5" + tx_polarity: "10111111" + rx_polarity: "11101000" + lane_swap: "27153604" + - id: "6" + tx_polarity: "01101110" + rx_polarity: "00001101" + lane_swap: "46503721" + - id: "7" + tx_polarity: "01000100" + rx_polarity: "10000101" + lane_swap: "03671245" + - id: "8" + tx_polarity: "01110101" + rx_polarity: "00010000" + lane_swap: "12640375" + - id: "9" + tx_polarity: "01011100" + rx_polarity: "11001111" + lane_swap: "02561347" + - id: "10" + tx_polarity: "01110110" + rx_polarity: "11000000" + lane_swap: "12740365" + - id: "11" + tx_polarity: "00111000" + rx_polarity: "00010111" + lane_swap: "01572436" + - id: "12" + tx_polarity: "00001111" + rx_polarity: "10111001" + lane_swap: "54320176" + - id: "13" + tx_polarity: "10011101" + rx_polarity: "00111011" + lane_swap: "26153704" + - id: "14" + tx_polarity: "00110000" + rx_polarity: "11010000" + lane_swap: "37452601" + - id: "15" + tx_polarity: "11100010" + rx_polarity: "01110011" + lane_swap: "51370462" + - id: "16" + tx_polarity: "10111010" + rx_polarity: "11010011" + lane_swap: "36152704" + - id: "17" + tx_polarity: "01011101" + rx_polarity: "00110001" + lane_swap: "45621073" + - id: "18" + tx_polarity: "11011111" + rx_polarity: "11001011" + lane_swap: "26143705" + - id: "19" + tx_polarity: "00100110" + rx_polarity: "00001001" + lane_swap: "42730165" + - id: "20" + tx_polarity: "10011011" + rx_polarity: "01101101" + lane_swap: "54217603" + - id: "21" + tx_polarity: "00101110" + rx_polarity: "10111111" + lane_swap: "26031745" + - id: "22" + tx_polarity: "01001110" + rx_polarity: "00111001" + lane_swap: "36024715" + - id: "23" + tx_polarity: "10101101" + rx_polarity: "01010011" + lane_swap: "45621370" + - id: "24" + tx_polarity: "11001110" + rx_polarity: "00011111" + lane_swap: "65234701" + - id: "25" + tx_polarity: "01110001" + rx_polarity: "01010111" + lane_swap: "37601452" + - id: "26" + tx_polarity: "01000100" + rx_polarity: "00001111" + lane_swap: "65034721" + - id: "27" + tx_polarity: "10111101" + rx_polarity: "11000101" + lane_swap: "34501672" + - id: "28" + tx_polarity: "01111000" + rx_polarity: "01110110" + lane_swap: "43061275" + - id: "29" + tx_polarity: "11110111" + rx_polarity: "11100111" + lane_swap: "57304621" + - id: "30" + tx_polarity: "10000100" + rx_polarity: "00101111" + lane_swap: "47125603" + - id: "31" + tx_polarity: "11111111" + rx_polarity: "11100010" + lane_swap: "13460275" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/inno.config.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/inno.config.yaml new file mode 100755 index 00000000000..9bc0114cf69 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_32x200G_Delta-et-c032if.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/innovium.77700_B b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/port_config.ini b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/port_config.ini new file mode 100755 index 00000000000..48091f5e367 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/port_config.ini @@ -0,0 +1,35 @@ +# name lanes speed index mtu fec +Ethernet0 249,250,251,252 200000 0 9126 rs +Ethernet8 241,242,243,244 200000 1 9126 rs +Ethernet16 233,234,235,236 200000 2 9126 rs +Ethernet24 225,226,227,228 200000 3 9126 rs +Ethernet32 217,218,219,220 200000 4 9126 rs +Ethernet40 209,210,211,212 200000 5 9126 rs +Ethernet48 201,202,203,204 200000 6 9126 rs +Ethernet56 193,194,195,196 200000 7 9126 rs +Ethernet64 185,186,187,188 200000 8 9126 rs +Ethernet72 177,178,179,180 200000 9 9126 rs +Ethernet80 169,170,171,172 200000 10 9126 rs +Ethernet88 161,162,163,164 200000 11 9126 rs +Ethernet96 153,154,155,156 200000 12 9126 rs +Ethernet104 145,146,147,148 200000 13 9126 rs +Ethernet112 137,138,139,140 200000 14 9126 rs +Ethernet120 129,130,131,132 200000 15 9126 rs +Ethernet128 121,122,123,124 200000 16 9126 rs +Ethernet136 113,114,115,116 200000 17 9126 rs +Ethernet144 97,98,99,100 200000 18 9126 rs +Ethernet152 105,106,107,108 200000 19 9126 rs +Ethernet160 81,82,83,84 200000 20 9126 rs +Ethernet168 89,90,91,92 200000 21 9126 rs +Ethernet176 65,66,67,68 200000 22 9126 rs +Ethernet184 73,74,75,76 200000 23 9126 rs +Ethernet192 49,50,51,52 200000 24 9126 rs +Ethernet200 57,58,59,60 200000 25 9126 rs +Ethernet208 33,34,35,36 200000 26 9126 rs +Ethernet216 41,42,43,44 200000 27 9126 rs +Ethernet224 17,18,19,20 200000 28 9126 rs +Ethernet232 25,26,27,28 200000 29 9126 rs +Ethernet240 1,2,3,4 200000 30 9126 rs +Ethernet248 9,10,11,12 200000 31 9126 rs +Ethernet256 257 10000 32 9126 none +Ethernet257 258 10000 33 9126 none diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/qos.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/qos.json.j2 new file mode 100755 index 00000000000..6c734d46ff2 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 32 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/sai.profile b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x200/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/buffers.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/buffers.json.j2 new file mode 100644 index 00000000000..4fca9cbcd15 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 32 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/config_32x400G_Delta-et-c032if.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/config_32x400G_Delta-et-c032if.yaml new file mode 100755 index 00000000000..2ba23d2a5a6 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/config_32x400G_Delta-et-c032if.yaml @@ -0,0 +1,429 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_A" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:8" + serdes_group: "31" + speed: "400G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:8" + serdes_group: "30" + speed: "400G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:8" + serdes_group: "29" + speed: "400G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:8" + serdes_group: "28" + speed: "400G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:8" + serdes_group: "27" + speed: "400G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:8" + serdes_group: "26" + speed: "400G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:8" + serdes_group: "25" + speed: "400G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:8" + serdes_group: "24" + speed: "400G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:8" + serdes_group: "23" + speed: "400G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:8" + serdes_group: "22" + speed: "400G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:8" + serdes_group: "21" + speed: "400G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:8" + serdes_group: "20" + speed: "400G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:8" + serdes_group: "19" + speed: "400G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:8" + serdes_group: "18" + speed: "400G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:8" + serdes_group: "17" + speed: "400G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:8" + serdes_group: "16" + speed: "400G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:8" + serdes_group: "15" + speed: "400G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:8" + serdes_group: "14" + speed: "400G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:8" + serdes_group: "12" + speed: "400G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:8" + serdes_group: "13" + speed: "400G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:8" + serdes_group: "10" + speed: "400G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:8" + serdes_group: "11" + speed: "400G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:8" + serdes_group: "8" + speed: "400G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:8" + serdes_group: "9" + speed: "400G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:8" + serdes_group: "6" + speed: "400G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:8" + serdes_group: "7" + speed: "400G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:8" + serdes_group: "4" + speed: "400G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:8" + serdes_group: "5" + speed: "400G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:8" + serdes_group: "2" + speed: "400G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:8" + serdes_group: "3" + speed: "400G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:8" + serdes_group: "0" + speed: "400G" + sysport: "1" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:8" + serdes_group: "1" + speed: "400G" + sysport: "9" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + tx_polarity: "01010101" + rx_polarity: "01100000" + lane_swap: "23641075" + - id: "1" + tx_polarity: "10110000" + rx_polarity: "11111111" + lane_swap: "64317520" + - id: "2" + tx_polarity: "00000000" + rx_polarity: "00000011" + lane_swap: "63147520" + - id: "3" + tx_polarity: "01101000" + rx_polarity: "00001110" + lane_swap: "31572046" + - id: "4" + tx_polarity: "00111000" + rx_polarity: "00001000" + lane_swap: "46105732" + - id: "5" + tx_polarity: "10111111" + rx_polarity: "11101000" + lane_swap: "27153604" + - id: "6" + tx_polarity: "01101110" + rx_polarity: "00001101" + lane_swap: "46503721" + - id: "7" + tx_polarity: "01000100" + rx_polarity: "10000101" + lane_swap: "03671245" + - id: "8" + tx_polarity: "01110101" + rx_polarity: "00010000" + lane_swap: "12640375" + - id: "9" + tx_polarity: "01011100" + rx_polarity: "11001111" + lane_swap: "02561347" + - id: "10" + tx_polarity: "01110110" + rx_polarity: "11000000" + lane_swap: "12740365" + - id: "11" + tx_polarity: "00111000" + rx_polarity: "00010111" + lane_swap: "01572436" + - id: "12" + tx_polarity: "00001111" + rx_polarity: "10111001" + lane_swap: "54320176" + - id: "13" + tx_polarity: "10011101" + rx_polarity: "00111011" + lane_swap: "26153704" + - id: "14" + tx_polarity: "00110000" + rx_polarity: "11010000" + lane_swap: "37452601" + - id: "15" + tx_polarity: "11100010" + rx_polarity: "01110011" + lane_swap: "51370462" + - id: "16" + tx_polarity: "10111010" + rx_polarity: "11010011" + lane_swap: "36152704" + - id: "17" + tx_polarity: "01011101" + rx_polarity: "00110001" + lane_swap: "45621073" + - id: "18" + tx_polarity: "11011111" + rx_polarity: "11001011" + lane_swap: "26143705" + - id: "19" + tx_polarity: "00100110" + rx_polarity: "00001001" + lane_swap: "42730165" + - id: "20" + tx_polarity: "10011011" + rx_polarity: "01101101" + lane_swap: "54217603" + - id: "21" + tx_polarity: "00101110" + rx_polarity: "10111111" + lane_swap: "26031745" + - id: "22" + tx_polarity: "01001110" + rx_polarity: "00111001" + lane_swap: "36024715" + - id: "23" + tx_polarity: "10101101" + rx_polarity: "01010011" + lane_swap: "45621370" + - id: "24" + tx_polarity: "11001110" + rx_polarity: "00011111" + lane_swap: "65234701" + - id: "25" + tx_polarity: "01110001" + rx_polarity: "01010111" + lane_swap: "37601452" + - id: "26" + tx_polarity: "01000100" + rx_polarity: "00001111" + lane_swap: "65034721" + - id: "27" + tx_polarity: "10111101" + rx_polarity: "11000101" + lane_swap: "34501672" + - id: "28" + tx_polarity: "01111000" + rx_polarity: "01110110" + lane_swap: "43061275" + - id: "29" + tx_polarity: "11110111" + rx_polarity: "11100111" + lane_swap: "57304621" + - id: "30" + tx_polarity: "10000100" + rx_polarity: "00101111" + lane_swap: "47125603" + - id: "31" + tx_polarity: "11111111" + rx_polarity: "11100010" + lane_swap: "13460275" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/inno.config.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/inno.config.yaml new file mode 100755 index 00000000000..360b5af8e60 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_32x400G_Delta-et-c032if.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_A" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/innovium.77700_A b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/innovium.77700_A new file mode 100644 index 00000000000..84aa4198360 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/innovium.77700_A @@ -0,0 +1,59 @@ +sku: innovium.77700_A + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 6, 5, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 8:0 + ib: 1 + pic_id: 5 + + isg 31: + mode: 8:0 + ib: 0 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/innovium.77700_B b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/port_config.ini b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/port_config.ini new file mode 100755 index 00000000000..360e363f485 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/port_config.ini @@ -0,0 +1,35 @@ +# name lanes speed index mtu fec +Ethernet0 249,250,251,252 400000 0 9126 rs +Ethernet8 241,242,243,244 400000 1 9126 rs +Ethernet16 233,234,235,236 400000 2 9126 rs +Ethernet24 225,226,227,228 400000 3 9126 rs +Ethernet32 217,218,219,220 400000 4 9126 rs +Ethernet40 209,210,211,212 400000 5 9126 rs +Ethernet48 201,202,203,204 400000 6 9126 rs +Ethernet56 193,194,195,196 400000 7 9126 rs +Ethernet64 185,186,187,188 400000 8 9126 rs +Ethernet72 177,178,179,180 400000 9 9126 rs +Ethernet80 169,170,171,172 400000 10 9126 rs +Ethernet88 161,162,163,164 400000 11 9126 rs +Ethernet96 153,154,155,156 400000 12 9126 rs +Ethernet104 145,146,147,148 400000 13 9126 rs +Ethernet112 137,138,139,140 400000 14 9126 rs +Ethernet120 129,130,131,132 400000 15 9126 rs +Ethernet128 121,122,123,124 400000 16 9126 rs +Ethernet136 113,114,115,116 400000 17 9126 rs +Ethernet144 97,98,99,100 400000 18 9126 rs +Ethernet152 105,106,107,108 400000 19 9126 rs +Ethernet160 81,82,83,84 400000 20 9126 rs +Ethernet168 89,90,91,92 400000 21 9126 rs +Ethernet176 65,66,67,68 400000 22 9126 rs +Ethernet184 73,74,75,76 400000 23 9126 rs +Ethernet192 49,50,51,52 400000 24 9126 rs +Ethernet200 57,58,59,60 400000 25 9126 rs +Ethernet208 33,34,35,36 400000 26 9126 rs +Ethernet216 41,42,43,44 400000 27 9126 rs +Ethernet224 17,18,19,20 400000 28 9126 rs +Ethernet232 25,26,27,28 400000 29 9126 rs +Ethernet240 1,2,3,4 400000 30 9126 rs +Ethernet248 9,10,11,12 400000 31 9126 rs +Ethernet256 257 10000 32 9126 none +Ethernet257 258 10000 33 9126 none diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/qos.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/qos.json.j2 new file mode 100755 index 00000000000..6c734d46ff2 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 32 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/sai.profile b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_32x400/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/buffers.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/buffers.json.j2 new file mode 100644 index 00000000000..45cebf3b714 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 64 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/config_64x100G_Delta-et-c032if.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/config_64x100G_Delta-et-c032if.yaml new file mode 100755 index 00000000000..e5fbcc93543 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/config_64x100G_Delta-et-c032if.yaml @@ -0,0 +1,653 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KRFEC" + id: "249" + lanes: "0:4" + serdes_group: "31" + speed: "100G" + sysport: "249" + type: "eth" + - fec: "KRFEC" + id: "253" + lanes: "4:4" + serdes_group: "31" + speed: "100G" + sysport: "253" + type: "eth" + - fec: "KRFEC" + id: "241" + lanes: "0:4" + serdes_group: "30" + speed: "100G" + sysport: "241" + type: "eth" + - fec: "KRFEC" + id: "245" + lanes: "4:4" + serdes_group: "30" + speed: "100G" + sysport: "245" + type: "eth" + - fec: "KRFEC" + id: "233" + lanes: "0:4" + serdes_group: "29" + speed: "100G" + sysport: "233" + type: "eth" + - fec: "KRFEC" + id: "237" + lanes: "4:4" + serdes_group: "29" + speed: "100G" + sysport: "237" + type: "eth" + - fec: "KRFEC" + id: "225" + lanes: "0:4" + serdes_group: "28" + speed: "100G" + sysport: "225" + type: "eth" + - fec: "KRFEC" + id: "229" + lanes: "4:4" + serdes_group: "28" + speed: "100G" + sysport: "229" + type: "eth" + - fec: "KRFEC" + id: "217" + lanes: "0:4" + serdes_group: "27" + speed: "100G" + sysport: "217" + type: "eth" + - fec: "KRFEC" + id: "221" + lanes: "4:4" + serdes_group: "27" + speed: "100G" + sysport: "221" + type: "eth" + - fec: "KRFEC" + id: "209" + lanes: "0:4" + serdes_group: "26" + speed: "100G" + sysport: "209" + type: "eth" + - fec: "KRFEC" + id: "213" + lanes: "4:4" + serdes_group: "26" + speed: "100G" + sysport: "213" + type: "eth" + - fec: "KRFEC" + id: "201" + lanes: "0:4" + serdes_group: "25" + speed: "100G" + sysport: "201" + type: "eth" + - fec: "KRFEC" + id: "205" + lanes: "4:4" + serdes_group: "25" + speed: "100G" + sysport: "205" + type: "eth" + - fec: "KRFEC" + id: "193" + lanes: "0:4" + serdes_group: "24" + speed: "100G" + sysport: "193" + type: "eth" + - fec: "KRFEC" + id: "197" + lanes: "4:4" + serdes_group: "24" + speed: "100G" + sysport: "197" + type: "eth" + - fec: "KRFEC" + id: "185" + lanes: "0:4" + serdes_group: "23" + speed: "100G" + sysport: "185" + type: "eth" + - fec: "KRFEC" + id: "189" + lanes: "4:4" + serdes_group: "23" + speed: "100G" + sysport: "189" + type: "eth" + - fec: "KRFEC" + id: "177" + lanes: "0:4" + serdes_group: "22" + speed: "100G" + sysport: "177" + type: "eth" + - fec: "KRFEC" + id: "181" + lanes: "4:4" + serdes_group: "22" + speed: "100G" + sysport: "181" + type: "eth" + - fec: "KRFEC" + id: "169" + lanes: "0:4" + serdes_group: "21" + speed: "100G" + sysport: "169" + type: "eth" + - fec: "KRFEC" + id: "173" + lanes: "4:4" + serdes_group: "21" + speed: "100G" + sysport: "173" + type: "eth" + - fec: "KRFEC" + id: "161" + lanes: "0:4" + serdes_group: "20" + speed: "100G" + sysport: "161" + type: "eth" + - fec: "KRFEC" + id: "165" + lanes: "4:4" + serdes_group: "20" + speed: "100G" + sysport: "165" + type: "eth" + - fec: "KRFEC" + id: "153" + lanes: "0:4" + serdes_group: "19" + speed: "100G" + sysport: "153" + type: "eth" + - fec: "KRFEC" + id: "157" + lanes: "4:4" + serdes_group: "19" + speed: "100G" + sysport: "157" + type: "eth" + - fec: "KRFEC" + id: "145" + lanes: "0:4" + serdes_group: "18" + speed: "100G" + sysport: "145" + type: "eth" + - fec: "KRFEC" + id: "149" + lanes: "4:4" + serdes_group: "18" + speed: "100G" + sysport: "149" + type: "eth" + - fec: "KRFEC" + id: "137" + lanes: "0:4" + serdes_group: "17" + speed: "100G" + sysport: "137" + type: "eth" + - fec: "KRFEC" + id: "141" + lanes: "4:4" + serdes_group: "17" + speed: "100G" + sysport: "141" + type: "eth" + - fec: "KRFEC" + id: "129" + lanes: "0:4" + serdes_group: "16" + speed: "100G" + sysport: "129" + type: "eth" + - fec: "KRFEC" + id: "133" + lanes: "4:4" + serdes_group: "16" + speed: "100G" + sysport: "133" + type: "eth" + - fec: "KRFEC" + id: "121" + lanes: "0:4" + serdes_group: "15" + speed: "100G" + sysport: "121" + type: "eth" + - fec: "KRFEC" + id: "125" + lanes: "4:4" + serdes_group: "15" + speed: "100G" + sysport: "125" + type: "eth" + - fec: "KRFEC" + id: "113" + lanes: "0:4" + serdes_group: "14" + speed: "100G" + sysport: "113" + type: "eth" + - fec: "KRFEC" + id: "117" + lanes: "4:4" + serdes_group: "14" + speed: "100G" + sysport: "117" + type: "eth" + - fec: "KRFEC" + id: "97" + lanes: "0:4" + serdes_group: "12" + speed: "100G" + sysport: "97" + type: "eth" + - fec: "KRFEC" + id: "101" + lanes: "4:4" + serdes_group: "12" + speed: "100G" + sysport: "101" + type: "eth" + - fec: "KRFEC" + id: "105" + lanes: "0:4" + serdes_group: "13" + speed: "100G" + sysport: "105" + type: "eth" + - fec: "KRFEC" + id: "109" + lanes: "4:4" + serdes_group: "13" + speed: "100G" + sysport: "109" + type: "eth" + - fec: "KRFEC" + id: "81" + lanes: "0:4" + serdes_group: "10" + speed: "100G" + sysport: "81" + type: "eth" + - fec: "KRFEC" + id: "85" + lanes: "4:4" + serdes_group: "10" + speed: "100G" + sysport: "85" + type: "eth" + - fec: "KRFEC" + id: "89" + lanes: "0:4" + serdes_group: "11" + speed: "100G" + sysport: "89" + type: "eth" + - fec: "KRFEC" + id: "93" + lanes: "4:4" + serdes_group: "11" + speed: "100G" + sysport: "93" + type: "eth" + - fec: "KRFEC" + id: "65" + lanes: "0:4" + serdes_group: "8" + speed: "100G" + sysport: "65" + type: "eth" + - fec: "KRFEC" + id: "69" + lanes: "4:4" + serdes_group: "8" + speed: "100G" + sysport: "69" + type: "eth" + - fec: "KRFEC" + id: "73" + lanes: "0:4" + serdes_group: "9" + speed: "100G" + sysport: "73" + type: "eth" + - fec: "KRFEC" + id: "77" + lanes: "4:4" + serdes_group: "9" + speed: "100G" + sysport: "77" + type: "eth" + - fec: "KRFEC" + id: "49" + lanes: "0:4" + serdes_group: "6" + speed: "100G" + sysport: "49" + type: "eth" + - fec: "KRFEC" + id: "53" + lanes: "4:4" + serdes_group: "6" + speed: "100G" + sysport: "53" + type: "eth" + - fec: "KRFEC" + id: "57" + lanes: "0:4" + serdes_group: "7" + speed: "100G" + sysport: "57" + type: "eth" + - fec: "KRFEC" + id: "61" + lanes: "4:4" + serdes_group: "7" + speed: "100G" + sysport: "61" + type: "eth" + - fec: "KRFEC" + id: "33" + lanes: "0:4" + serdes_group: "4" + speed: "100G" + sysport: "33" + type: "eth" + - fec: "KRFEC" + id: "37" + lanes: "4:4" + serdes_group: "4" + speed: "100G" + sysport: "37" + type: "eth" + - fec: "KRFEC" + id: "41" + lanes: "0:4" + serdes_group: "5" + speed: "100G" + sysport: "41" + type: "eth" + - fec: "KRFEC" + id: "45" + lanes: "4:4" + serdes_group: "5" + speed: "100G" + sysport: "45" + type: "eth" + - fec: "KRFEC" + id: "17" + lanes: "0:4" + serdes_group: "2" + speed: "100G" + sysport: "17" + type: "eth" + - fec: "KRFEC" + id: "21" + lanes: "4:4" + serdes_group: "2" + speed: "100G" + sysport: "21" + type: "eth" + - fec: "KRFEC" + id: "25" + lanes: "0:4" + serdes_group: "3" + speed: "100G" + sysport: "25" + type: "eth" + - fec: "KRFEC" + id: "29" + lanes: "4:4" + serdes_group: "3" + speed: "100G" + sysport: "29" + type: "eth" + - fec: "KRFEC" + id: "1" + lanes: "0:4" + serdes_group: "0" + speed: "100G" + sysport: "1" + type: "eth" + - fec: "KRFEC" + id: "5" + lanes: "4:4" + serdes_group: "0" + speed: "100G" + sysport: "5" + type: "eth" + - fec: "KRFEC" + id: "9" + lanes: "0:4" + serdes_group: "1" + speed: "100G" + sysport: "9" + type: "eth" + - fec: "KRFEC" + id: "13" + lanes: "4:4" + serdes_group: "1" + speed: "100G" + sysport: "13" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + tx_polarity: "01010101" + rx_polarity: "01100000" + lane_swap: "23641075" + - id: "1" + tx_polarity: "10110000" + rx_polarity: "11111111" + lane_swap: "64317520" + - id: "2" + tx_polarity: "00000000" + rx_polarity: "00000011" + lane_swap: "63147520" + - id: "3" + tx_polarity: "01101000" + rx_polarity: "00001110" + lane_swap: "31572046" + - id: "4" + tx_polarity: "00111000" + rx_polarity: "00001000" + lane_swap: "46105732" + - id: "5" + tx_polarity: "10111111" + rx_polarity: "11101000" + lane_swap: "27153604" + - id: "6" + tx_polarity: "01101110" + rx_polarity: "00001101" + lane_swap: "46503721" + - id: "7" + tx_polarity: "01000100" + rx_polarity: "10000101" + lane_swap: "03671245" + - id: "8" + tx_polarity: "01110101" + rx_polarity: "00010000" + lane_swap: "12640375" + - id: "9" + tx_polarity: "01011100" + rx_polarity: "11001111" + lane_swap: "02561347" + - id: "10" + tx_polarity: "01110110" + rx_polarity: "11000000" + lane_swap: "12740365" + - id: "11" + tx_polarity: "00111000" + rx_polarity: "00010111" + lane_swap: "01572436" + - id: "12" + tx_polarity: "00001111" + rx_polarity: "10111001" + lane_swap: "54320176" + - id: "13" + tx_polarity: "10011101" + rx_polarity: "00111011" + lane_swap: "26153704" + - id: "14" + tx_polarity: "00110000" + rx_polarity: "11010000" + lane_swap: "37452601" + - id: "15" + tx_polarity: "11100010" + rx_polarity: "01110011" + lane_swap: "51370462" + - id: "16" + tx_polarity: "10111010" + rx_polarity: "11010011" + lane_swap: "36152704" + - id: "17" + tx_polarity: "01011101" + rx_polarity: "00110001" + lane_swap: "45621073" + - id: "18" + tx_polarity: "11011111" + rx_polarity: "11001011" + lane_swap: "26143705" + - id: "19" + tx_polarity: "00100110" + rx_polarity: "00001001" + lane_swap: "42730165" + - id: "20" + tx_polarity: "10011011" + rx_polarity: "01101101" + lane_swap: "54217603" + - id: "21" + tx_polarity: "00101110" + rx_polarity: "10111111" + lane_swap: "26031745" + - id: "22" + tx_polarity: "01001110" + rx_polarity: "00111001" + lane_swap: "36024715" + - id: "23" + tx_polarity: "10101101" + rx_polarity: "01010011" + lane_swap: "45621370" + - id: "24" + tx_polarity: "11001110" + rx_polarity: "00011111" + lane_swap: "65234701" + - id: "25" + tx_polarity: "01110001" + rx_polarity: "01010111" + lane_swap: "37601452" + - id: "26" + tx_polarity: "01000100" + rx_polarity: "00001111" + lane_swap: "65034721" + - id: "27" + tx_polarity: "10111101" + rx_polarity: "11000101" + lane_swap: "34501672" + - id: "28" + tx_polarity: "01111000" + rx_polarity: "01110110" + lane_swap: "43061275" + - id: "29" + tx_polarity: "11110111" + rx_polarity: "11100111" + lane_swap: "57304621" + - id: "30" + tx_polarity: "10000100" + rx_polarity: "00101111" + lane_swap: "47125603" + - id: "31" + tx_polarity: "11111111" + rx_polarity: "11100010" + lane_swap: "13460275" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/inno.config.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/inno.config.yaml new file mode 100755 index 00000000000..d44c7bc0bc2 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_64x100G_Delta-et-c032if.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/innovium.77700_B b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/port_config.ini b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/port_config.ini new file mode 100644 index 00000000000..9999a677da4 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/port_config.ini @@ -0,0 +1,67 @@ +# name lanes speed index mtu +Ethernet0 249,250,251,252 100000 0 9126 +Ethernet4 253,254,255,256 100000 0 9126 +Ethernet8 241,242,243,244 100000 1 9126 +Ethernet12 245,246,247,248 100000 1 9126 +Ethernet16 233,234,235,236 100000 2 9126 +Ethernet20 237,238,239,240 100000 2 9126 +Ethernet24 225,226,227,228 100000 3 9126 +Ethernet28 229,230,231,232 100000 3 9126 +Ethernet32 217,218,219,220 100000 4 9126 +Ethernet36 221,222,223,224 100000 4 9126 +Ethernet40 209,210,211,212 100000 5 9126 +Ethernet44 213,214,215,216 100000 5 9126 +Ethernet48 201,202,203,204 100000 6 9126 +Ethernet52 205,206,207,208 100000 6 9126 +Ethernet56 193,194,195,196 100000 7 9126 +Ethernet60 197,198,199,200 100000 7 9126 +Ethernet64 185,186,187,188 100000 8 9126 +Ethernet68 189,190,191,192 100000 8 9126 +Ethernet72 177,178,179,180 100000 9 9126 +Ethernet76 181,182,183,184 100000 9 9126 +Ethernet80 169,170,171,172 100000 10 9126 +Ethernet84 173,174,175,176 100000 10 9126 +Ethernet88 161,162,163,164 100000 11 9126 +Ethernet92 165,166,167,168 100000 11 9126 +Ethernet96 153,154,155,156 100000 12 9126 +Ethernet100 157,158,159,160 100000 12 9126 +Ethernet104 145,146,147,148 100000 13 9126 +Ethernet108 149,150,151,152 100000 13 9126 +Ethernet112 137,138,139,140 100000 14 9126 +Ethernet116 141,142,143,144 100000 14 9126 +Ethernet120 129,130,131,132 100000 15 9126 +Ethernet124 133,134,135,136 100000 15 9126 +Ethernet128 121,122,123,124 100000 16 9126 +Ethernet132 125,126,127,128 100000 16 9126 +Ethernet136 113,114,115,116 100000 17 9126 +Ethernet140 117,118,119,120 100000 17 9126 +Ethernet144 97,98,99,100 100000 18 9126 +Ethernet148 101,102,103,104 100000 18 9126 +Ethernet152 105,106,107,108 100000 19 9126 +Ethernet156 109,110,111,112 100000 19 9126 +Ethernet160 81,82,83,84 100000 20 9126 +Ethernet164 85,86,87,88 100000 20 9126 +Ethernet168 89,90,91,92 100000 21 9126 +Ethernet172 93,94,95,96 100000 21 9126 +Ethernet176 65,66,67,68 100000 22 9126 +Ethernet180 69,70,71,72 100000 22 9126 +Ethernet184 73,74,75,76 100000 23 9126 +Ethernet188 77,78,79,80 100000 23 9126 +Ethernet192 49,50,51,52 100000 24 9126 +Ethernet196 53,54,55,56 100000 24 9126 +Ethernet200 57,58,59,60 100000 25 9126 +Ethernet204 61,62,63,64 100000 25 9126 +Ethernet208 33,34,35,36 100000 26 9126 +Ethernet212 37,38,39,40 100000 26 9126 +Ethernet216 41,42,43,44 100000 27 9126 +Ethernet220 45,46,47,48 100000 27 9126 +Ethernet224 17,18,19,20 100000 28 9126 +Ethernet228 21,22,23,24 100000 28 9126 +Ethernet232 25,26,27,28 100000 29 9126 +Ethernet236 29,30,31,32 100000 29 9126 +Ethernet240 1,2,3,4 100000 30 9126 +Ethernet244 5,6,7,8 100000 30 9126 +Ethernet248 9,10,11,12 100000 31 9126 +Ethernet252 13,14,15,16 100000 31 9126 +Ethernet256 257 10000 32 9126 +Ethernet257 258 10000 33 9126 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/qos.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/qos.json.j2 new file mode 100755 index 00000000000..16f9b42a216 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 64 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/sai.profile b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x100/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/buffers.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/buffers.json.j2 new file mode 100644 index 00000000000..45cebf3b714 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/buffers.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_ports_num = 64 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "47218432", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "egress_lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xoff":"1433600", + "size":"1518", + "dynamic_th":"-4", + "xon_offset":"6272" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "static_th":"9721600" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|4-5": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "{{ port_names }}|0-3": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port_names }}|6-7": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/config_64x200G_Delta-et-c032if.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/config_64x200G_Delta-et-c032if.yaml new file mode 100755 index 00000000000..4b75a205ab5 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/config_64x200G_Delta-et-c032if.yaml @@ -0,0 +1,653 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sku: "configs/sku/innovium.77700_B" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + max_lossless_tc: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "249" + lanes: "0:4" + serdes_group: "31" + speed: "200G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "253" + lanes: "4:4" + serdes_group: "31" + speed: "200G" + sysport: "253" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:4" + serdes_group: "30" + speed: "200G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "245" + lanes: "4:4" + serdes_group: "30" + speed: "200G" + sysport: "245" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:4" + serdes_group: "29" + speed: "200G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "237" + lanes: "4:4" + serdes_group: "29" + speed: "200G" + sysport: "237" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:4" + serdes_group: "28" + speed: "200G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "229" + lanes: "4:4" + serdes_group: "28" + speed: "200G" + sysport: "229" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:4" + serdes_group: "27" + speed: "200G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "221" + lanes: "4:4" + serdes_group: "27" + speed: "200G" + sysport: "221" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:4" + serdes_group: "26" + speed: "200G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "213" + lanes: "4:4" + serdes_group: "26" + speed: "200G" + sysport: "213" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:4" + serdes_group: "25" + speed: "200G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "205" + lanes: "4:4" + serdes_group: "25" + speed: "200G" + sysport: "205" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:4" + serdes_group: "24" + speed: "200G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "197" + lanes: "4:4" + serdes_group: "24" + speed: "200G" + sysport: "197" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:4" + serdes_group: "23" + speed: "200G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "189" + lanes: "4:4" + serdes_group: "23" + speed: "200G" + sysport: "189" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:4" + serdes_group: "22" + speed: "200G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "181" + lanes: "4:4" + serdes_group: "22" + speed: "200G" + sysport: "181" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:4" + serdes_group: "21" + speed: "200G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "173" + lanes: "4:4" + serdes_group: "21" + speed: "200G" + sysport: "173" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:4" + serdes_group: "20" + speed: "200G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "165" + lanes: "4:4" + serdes_group: "20" + speed: "200G" + sysport: "165" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:4" + serdes_group: "19" + speed: "200G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "157" + lanes: "4:4" + serdes_group: "19" + speed: "200G" + sysport: "157" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:4" + serdes_group: "18" + speed: "200G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "149" + lanes: "4:4" + serdes_group: "18" + speed: "200G" + sysport: "149" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:4" + serdes_group: "17" + speed: "200G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "141" + lanes: "4:4" + serdes_group: "17" + speed: "200G" + sysport: "141" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:4" + serdes_group: "16" + speed: "200G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "133" + lanes: "4:4" + serdes_group: "16" + speed: "200G" + sysport: "133" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:4" + serdes_group: "15" + speed: "200G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "125" + lanes: "4:4" + serdes_group: "15" + speed: "200G" + sysport: "125" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:4" + serdes_group: "14" + speed: "200G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "117" + lanes: "4:4" + serdes_group: "14" + speed: "200G" + sysport: "117" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:4" + serdes_group: "12" + speed: "200G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "101" + lanes: "4:4" + serdes_group: "12" + speed: "200G" + sysport: "101" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:4" + serdes_group: "13" + speed: "200G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "109" + lanes: "4:4" + serdes_group: "13" + speed: "200G" + sysport: "109" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:4" + serdes_group: "10" + speed: "200G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "85" + lanes: "4:4" + serdes_group: "10" + speed: "200G" + sysport: "85" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:4" + serdes_group: "11" + speed: "200G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "93" + lanes: "4:4" + serdes_group: "11" + speed: "200G" + sysport: "93" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:4" + serdes_group: "8" + speed: "200G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "69" + lanes: "4:4" + serdes_group: "8" + speed: "200G" + sysport: "69" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:4" + serdes_group: "9" + speed: "200G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "77" + lanes: "4:4" + serdes_group: "9" + speed: "200G" + sysport: "77" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:4" + serdes_group: "6" + speed: "200G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "53" + lanes: "4:4" + serdes_group: "6" + speed: "200G" + sysport: "53" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:4" + serdes_group: "7" + speed: "200G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "61" + lanes: "4:4" + serdes_group: "7" + speed: "200G" + sysport: "61" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:4" + serdes_group: "4" + speed: "200G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "37" + lanes: "4:4" + serdes_group: "4" + speed: "200G" + sysport: "37" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:4" + serdes_group: "5" + speed: "200G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "45" + lanes: "4:4" + serdes_group: "5" + speed: "200G" + sysport: "45" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:4" + serdes_group: "2" + speed: "200G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "21" + lanes: "4:4" + serdes_group: "2" + speed: "200G" + sysport: "21" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:4" + serdes_group: "3" + speed: "200G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "29" + lanes: "4:4" + serdes_group: "3" + speed: "200G" + sysport: "29" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:4" + serdes_group: "0" + speed: "200G" + sysport: "1" + type: "eth" + - fec: "KPFEC" + id: "5" + lanes: "4:4" + serdes_group: "0" + speed: "200G" + sysport: "5" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:4" + serdes_group: "1" + speed: "200G" + sysport: "9" + type: "eth" + - fec: "KPFEC" + id: "13" + lanes: "4:4" + serdes_group: "1" + speed: "200G" + sysport: "13" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + speed: "10G" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + speed: "10G" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + tx_polarity: "01010101" + rx_polarity: "01100000" + lane_swap: "23641075" + - id: "1" + tx_polarity: "10110000" + rx_polarity: "11111111" + lane_swap: "64317520" + - id: "2" + tx_polarity: "00000000" + rx_polarity: "00000011" + lane_swap: "63147520" + - id: "3" + tx_polarity: "01101000" + rx_polarity: "00001110" + lane_swap: "31572046" + - id: "4" + tx_polarity: "00111000" + rx_polarity: "00001000" + lane_swap: "46105732" + - id: "5" + tx_polarity: "10111111" + rx_polarity: "11101000" + lane_swap: "27153604" + - id: "6" + tx_polarity: "01101110" + rx_polarity: "00001101" + lane_swap: "46503721" + - id: "7" + tx_polarity: "01000100" + rx_polarity: "10000101" + lane_swap: "03671245" + - id: "8" + tx_polarity: "01110101" + rx_polarity: "00010000" + lane_swap: "12640375" + - id: "9" + tx_polarity: "01011100" + rx_polarity: "11001111" + lane_swap: "02561347" + - id: "10" + tx_polarity: "01110110" + rx_polarity: "11000000" + lane_swap: "12740365" + - id: "11" + tx_polarity: "00111000" + rx_polarity: "00010111" + lane_swap: "01572436" + - id: "12" + tx_polarity: "00001111" + rx_polarity: "10111001" + lane_swap: "54320176" + - id: "13" + tx_polarity: "10011101" + rx_polarity: "00111011" + lane_swap: "26153704" + - id: "14" + tx_polarity: "00110000" + rx_polarity: "11010000" + lane_swap: "37452601" + - id: "15" + tx_polarity: "11100010" + rx_polarity: "01110011" + lane_swap: "51370462" + - id: "16" + tx_polarity: "10111010" + rx_polarity: "11010011" + lane_swap: "36152704" + - id: "17" + tx_polarity: "01011101" + rx_polarity: "00110001" + lane_swap: "45621073" + - id: "18" + tx_polarity: "11011111" + rx_polarity: "11001011" + lane_swap: "26143705" + - id: "19" + tx_polarity: "00100110" + rx_polarity: "00001001" + lane_swap: "42730165" + - id: "20" + tx_polarity: "10011011" + rx_polarity: "01101101" + lane_swap: "54217603" + - id: "21" + tx_polarity: "00101110" + rx_polarity: "10111111" + lane_swap: "26031745" + - id: "22" + tx_polarity: "01001110" + rx_polarity: "00111001" + lane_swap: "36024715" + - id: "23" + tx_polarity: "10101101" + rx_polarity: "01010011" + lane_swap: "45621370" + - id: "24" + tx_polarity: "11001110" + rx_polarity: "00011111" + lane_swap: "65234701" + - id: "25" + tx_polarity: "01110001" + rx_polarity: "01010111" + lane_swap: "37601452" + - id: "26" + tx_polarity: "01000100" + rx_polarity: "00001111" + lane_swap: "65034721" + - id: "27" + tx_polarity: "10111101" + rx_polarity: "11000101" + lane_swap: "34501672" + - id: "28" + tx_polarity: "01111000" + rx_polarity: "01110110" + lane_swap: "43061275" + - id: "29" + tx_polarity: "11110111" + rx_polarity: "11100111" + lane_swap: "57304621" + - id: "30" + tx_polarity: "10000100" + rx_polarity: "00101111" + lane_swap: "47125603" + - id: "31" + tx_polarity: "11111111" + rx_polarity: "11100010" + lane_swap: "13460275" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/inno.config.yaml b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/inno.config.yaml new file mode 100755 index 00000000000..f68930c37ef --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/inno.config.yaml @@ -0,0 +1,7 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_64x200G_Delta-et-c032if.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_B" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes" diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/innovium.77700_B b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/innovium.77700_B new file mode 100644 index 00000000000..27297b31395 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/innovium.77700_B @@ -0,0 +1,59 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/port_config.ini b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/port_config.ini new file mode 100644 index 00000000000..726e1a377d8 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/port_config.ini @@ -0,0 +1,67 @@ +# name lanes speed index mtu +Ethernet0 249,250,251,252 200000 0 9126 +Ethernet4 253,254,255,256 200000 0 9126 +Ethernet8 241,242,243,244 200000 1 9126 +Ethernet12 245,246,247,248 200000 1 9126 +Ethernet16 233,234,235,236 200000 2 9126 +Ethernet20 237,238,239,240 200000 2 9126 +Ethernet24 225,226,227,228 200000 3 9126 +Ethernet28 229,230,231,232 200000 3 9126 +Ethernet32 217,218,219,220 200000 4 9126 +Ethernet36 221,222,223,224 200000 4 9126 +Ethernet40 209,210,211,212 200000 5 9126 +Ethernet44 213,214,215,216 200000 5 9126 +Ethernet48 201,202,203,204 200000 6 9126 +Ethernet52 205,206,207,208 200000 6 9126 +Ethernet56 193,194,195,196 200000 7 9126 +Ethernet60 197,198,199,200 200000 7 9126 +Ethernet64 185,186,187,188 200000 8 9126 +Ethernet68 189,190,191,192 200000 8 9126 +Ethernet72 177,178,179,180 200000 9 9126 +Ethernet76 181,182,183,184 200000 9 9126 +Ethernet80 169,170,171,172 200000 10 9126 +Ethernet84 173,174,175,176 200000 10 9126 +Ethernet88 161,162,163,164 200000 11 9126 +Ethernet92 165,166,167,168 200000 11 9126 +Ethernet96 153,154,155,156 200000 12 9126 +Ethernet100 157,158,159,160 200000 12 9126 +Ethernet104 145,146,147,148 200000 13 9126 +Ethernet108 149,150,151,152 200000 13 9126 +Ethernet112 137,138,139,140 200000 14 9126 +Ethernet116 141,142,143,144 200000 14 9126 +Ethernet120 129,130,131,132 200000 15 9126 +Ethernet124 133,134,135,136 200000 15 9126 +Ethernet128 121,122,123,124 200000 16 9126 +Ethernet132 125,126,127,128 200000 16 9126 +Ethernet136 113,114,115,116 200000 17 9126 +Ethernet140 117,118,119,120 200000 17 9126 +Ethernet144 97,98,99,100 200000 18 9126 +Ethernet148 101,102,103,104 200000 18 9126 +Ethernet152 105,106,107,108 200000 19 9126 +Ethernet156 109,110,111,112 200000 19 9126 +Ethernet160 81,82,83,84 200000 20 9126 +Ethernet164 85,86,87,88 200000 20 9126 +Ethernet168 89,90,91,92 200000 21 9126 +Ethernet172 93,94,95,96 200000 21 9126 +Ethernet176 65,66,67,68 200000 22 9126 +Ethernet180 69,70,71,72 200000 22 9126 +Ethernet184 73,74,75,76 200000 23 9126 +Ethernet188 77,78,79,80 200000 23 9126 +Ethernet192 49,50,51,52 200000 24 9126 +Ethernet196 53,54,55,56 200000 24 9126 +Ethernet200 57,58,59,60 200000 25 9126 +Ethernet204 61,62,63,64 200000 25 9126 +Ethernet208 33,34,35,36 200000 26 9126 +Ethernet212 37,38,39,40 200000 26 9126 +Ethernet216 41,42,43,44 200000 27 9126 +Ethernet220 45,46,47,48 200000 27 9126 +Ethernet224 17,18,19,20 200000 28 9126 +Ethernet228 21,22,23,24 200000 28 9126 +Ethernet232 25,26,27,28 200000 29 9126 +Ethernet236 29,30,31,32 200000 29 9126 +Ethernet240 1,2,3,4 200000 30 9126 +Ethernet244 5,6,7,8 200000 30 9126 +Ethernet248 9,10,11,12 200000 31 9126 +Ethernet252 13,14,15,16 200000 31 9126 +Ethernet256 257 10000 32 9126 +Ethernet257 258 10000 33 9126 diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/qos.json.j2 b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/qos.json.j2 new file mode 100755 index 00000000000..16f9b42a216 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/qos.json.j2 @@ -0,0 +1,120 @@ +{# Default values which will be used if no actual configura available #} + +{% set default_ports_num = 64 -%} +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "1":"1", + "0":"0", + "3":"3", + "2":"2", + "5":"5", + "4":"4", + "7":"7", + "6":"6" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "4": "1", + "5": "2", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"4", + "5":"5", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { + "{{ port_names }}": { + "tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP:AZURE]", + "tc_to_queue_map": "[TC_TO_QUEUE_MAP:AZURE]", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP:AZURE]", + "pfc_enable": "4,5" + } + } +} diff --git a/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/sai.profile b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/sai.profile new file mode 100755 index 00000000000..0769b3063a1 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/Delta-et-c032if_64x200/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/inno.config.yaml diff --git a/device/delta/x86_64-delta_et-c032if-r0/default_sku b/device/delta/x86_64-delta_et-c032if-r0/default_sku new file mode 100644 index 00000000000..92740942d0e --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/default_sku @@ -0,0 +1 @@ +Delta-et-c032if t1 diff --git a/device/delta/x86_64-delta_et-c032if-r0/installer.conf b/device/delta/x86_64-delta_et-c032if-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/delta/x86_64-delta_et-c032if-r0/led_proc_init.soc b/device/delta/x86_64-delta_et-c032if-r0/led_proc_init.soc new file mode 100644 index 00000000000..4173de277f6 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/led_proc_init.soc @@ -0,0 +1,10 @@ +#ET_C032IF Port_Remap +# Vlan set and port enable + +# led0 port order remap + +#ET_C032IF_LED + +#-------------------------------------------------------------------------------------------------- +#LED Auto link/up + diff --git a/device/delta/x86_64-delta_et-c032if-r0/plugins/eeprom.py b/device/delta/x86_64-delta_et-c032if-r0/plugins/eeprom.py new file mode 100644 index 00000000000..1a624414637 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/plugins/eeprom.py @@ -0,0 +1,32 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + _TLV_INFO_MAX_LEN = 256 + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-10/10-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/delta/x86_64-delta_et-c032if-r0/plugins/psuutil.py b/device/delta/x86_64-delta_et-c032if-r0/plugins/psuutil.py new file mode 100644 index 00000000000..80383aaffdd --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/plugins/psuutil.py @@ -0,0 +1,78 @@ +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# + +import os.path +import subprocess + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + self.psu_status = "ipmitool raw 0x38 0x1 {} 0x50" + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + status = 0 + try: + p = os.popen("ipmitool raw 0x38 0x2 7 0x32 0x28 1") + content = p.readline().rstrip() + reg_value = int(content, 16) + mask = (1 << (8 - index)) + if reg_value & mask == 0: + return False + status = 1 + p.close() + except IOError: + return False + return status == 1 + + + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + status = 0 + try: + p = os.popen(self.psu_status.format(index - 1)) + content = p.readline().rstrip() + reg_value = int(content, 16) + if reg_value != 0: + return False + status = 1 + p.close() + except IOError: + return False + return status == 1 + diff --git a/device/delta/x86_64-delta_et-c032if-r0/plugins/sfputil.py b/device/delta/x86_64-delta_et-c032if-r0/plugins/sfputil.py new file mode 100644 index 00000000000..4802c3a8f0c --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/plugins/sfputil.py @@ -0,0 +1,255 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import datetime + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_START_SFP = 32 + PORT_END = 33 + PORTS_IN_BLOCK = 34 + + EEPROM_OFFSET = 1 + + _port_to_eeprom_mapping = {} + port_dict = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_start_sfp(self): + return self.PORT_START_SFP + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def get_transceiver_status(self): + + try: + reg_file = open("/sys/devices/platform/delta-et-c032if-cpld.0/sfp_is_present") + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + reg_file.close() + + return int(content, 16) + + + def __init__(self): + eeprom_path = "/sys/kernel/sfp/eeprom_sfp_{0}" + + for x in range(0, self.port_end + 1): + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) + + self.modprs_register = self.get_transceiver_status + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/delta-et-c032if-cpld.0/sfp_is_present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (self.port_end - port_num + 6)) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end - 2: + return False + + try: + reg_file = open("/sys/devices/platform/delta-et-c032if-cpld.0/sfp_lp_mode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (self.port_end - port_num) - 2) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end - 2: + return False + + try: + reg_file = open("/sys/devices/platform/delta-et-c032if-cpld.0/sfp_lp_mode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (self.port_end - port_num) - 2) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value).rstrip("L") or "0" + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/devices/platform/delta-et-c032if-cpld.0/sfp_reset" + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end - 2: + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (self.port_end - port_num) - 2) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self, timeout=0): + start_time = time.time() + port_dict = {} + port = self.port_start + forever = False + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print "get_transceiver_change_event:Invalid timeout value", timeout + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print 'get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout + + return False, {} # Time wrap or possibly incorrect timeout + while timeout >= 0: + # Check for OIR events and return updated port_dict + reg_value = self.get_transceiver_status + if reg_value != self.modprs_register: + changed_ports = self.modprs_register ^ reg_value + while port >= self.port_start and port <= self.port_end: + + # Mask off the bit corresponding to our port + mask = (1 << (self.port_end - port + 6)) + + if changed_ports & mask: + # ModPrsL is active low + if reg_value & mask == 0: + port_dict[port] = '1' + else: + port_dict[port] = '0' + + port += 1 + + # Update reg value + self.modprs_register = reg_value + return True, port_dict + + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + print "get_transceiver_change_event: Should not reach here." + return False, {} diff --git a/device/delta/x86_64-delta_et-c032if-r0/sensors.conf b/device/delta/x86_64-delta_et-c032if-r0/sensors.conf new file mode 100644 index 00000000000..db34a541b26 --- /dev/null +++ b/device/delta/x86_64-delta_et-c032if-r0/sensors.conf @@ -0,0 +1,4 @@ +# libsensors configuration file for DELTA-ET-C032IF +# ------------------------------------------------ +# + diff --git a/device/embedway/x86_64-ew_es6220_x48q2h4-r0/default_sku b/device/embedway/x86_64-ew_es6220_x48q2h4-r0/default_sku new file mode 100644 index 00000000000..0f663505d7a --- /dev/null +++ b/device/embedway/x86_64-ew_es6220_x48q2h4-r0/default_sku @@ -0,0 +1 @@ +OSW1800-48x6q t1 diff --git a/device/embedway/x86_64-ew_es6220_x48q2h4-r0/installer.conf b/device/embedway/x86_64-ew_es6220_x48q2h4-r0/installer.conf new file mode 100644 index 00000000000..5e62742c11b --- /dev/null +++ b/device/embedway/x86_64-ew_es6220_x48q2h4-r0/installer.conf @@ -0,0 +1 @@ +CONSOLE_SPEED=115200 diff --git a/device/facebook/x86_64-facebook_wedge100-r0/Facebook-W100-C32/port_config.ini b/device/facebook/x86_64-facebook_wedge100-r0/Facebook-W100-C32/port_config.ini new file mode 100644 index 00000000000..973e47589aa --- /dev/null +++ b/device/facebook/x86_64-facebook_wedge100-r0/Facebook-W100-C32/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias +Ethernet0 117,118,119,120 +Ethernet4 113,114,115,116 +Ethernet8 125,126,127,128 +Ethernet12 121,122,123,124 +Ethernet16 5,6,7,8 +Ethernet20 1,2,3,4 +Ethernet24 13,14,15,16 +Ethernet28 9,10,11,12 +Ethernet32 21,22,23,24 +Ethernet36 17,18,19,20 +Ethernet40 29,30,31,32 +Ethernet44 25,26,27,28 +Ethernet48 37,38,39,40 +Ethernet52 33,34,35,36 +Ethernet56 45,46,47,48 +Ethernet60 41,42,43,44 +Ethernet64 53,54,55,56 +Ethernet68 49,50,51,52 +Ethernet72 61,62,63,64 +Ethernet76 57,58,59,60 +Ethernet80 69,70,71,72 +Ethernet84 65,66,67,68 +Ethernet88 77,78,79,80 +Ethernet92 73,74,75,76 +Ethernet96 85,86,87,88 +Ethernet100 81,82,83,84 +Ethernet104 93,94,95,96 +Ethernet108 89,90,91,92 +Ethernet112 101,102,103,104 +Ethernet116 97,98,99,100 +Ethernet120 109,110,111,112 +Ethernet124 105,106,107,108 diff --git a/device/facebook/x86_64-facebook_wedge100-r0/Facebook-W100-C32/sai.profile b/device/facebook/x86_64-facebook_wedge100-r0/Facebook-W100-C32/sai.profile new file mode 100644 index 00000000000..b5586b7ba24 --- /dev/null +++ b/device/facebook/x86_64-facebook_wedge100-r0/Facebook-W100-C32/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-wedge100-32x100G.config.bcm diff --git a/device/facebook/x86_64-facebook_wedge100-r0/Facebook-W100-C32/th-wedge100-32x100G.config.bcm b/device/facebook/x86_64-facebook_wedge100-r0/Facebook-W100-C32/th-wedge100-32x100G.config.bcm new file mode 100644 index 00000000000..afd1db4cbc0 --- /dev/null +++ b/device/facebook/x86_64-facebook_wedge100-r0/Facebook-W100-C32/th-wedge100-32x100G.config.bcm @@ -0,0 +1,433 @@ +ctr_evict_enable=0x0 +l2_mem_entries=0x8000 +l3_intf_vlan_split_egress=0x1 +l3_mem_entries=0x4000 +mdio_output_delay=0xb +mmu_lossless=0x0 +os=unix +oversubscribe_mode=0x1 +parity_enable=0x1 +pbmp_xport_xe=0x1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe +phy_an_c37=0x3 +phy_an_c73=0x0 +portmap_1=5:100 +portmap_102=101:100 +portmap_106=97:100 +portmap_110=109:100 +portmap_114=105:100 +portmap_118=117:100 +portmap_122=113:100 +portmap_126=125:100 +portmap_13=9:100 +portmap_130=121:100 +portmap_17=21:100 +portmap_21=17:100 +portmap_25=29:100 +portmap_29=25:100 +portmap_34=37:100 +portmap_38=33:100 +portmap_42=45:100 +portmap_46=41:100 +portmap_5=1:100 +portmap_50=53:100 +portmap_54=49:100 +portmap_58=61:100 +portmap_62=57:100 +portmap_68=69:100 +portmap_72=65:100 +portmap_76=77:100 +portmap_80=73:100 +portmap_84=85:100 +portmap_88=81:100 +portmap_9=13:100 +portmap_92=93:100 +portmap_96=89:100 +rate_ext_mdio_divisor=0x65 +serdes_automedium=0x0 +serdes_fiber_pref=0x1 +serdes_firmware_mode_xe=0x2 +serdes_preemphasis_1=0x284008 +serdes_preemphasis_10=0x284008 +serdes_preemphasis_102=0x2c4004 +serdes_preemphasis_103=0x2c4004 +serdes_preemphasis_104=0x2c4004 +serdes_preemphasis_105=0x2c4004 +serdes_preemphasis_106=0x2c4004 +serdes_preemphasis_107=0x2c4004 +serdes_preemphasis_108=0x2c4004 +serdes_preemphasis_109=0x2c4004 +serdes_preemphasis_11=0x284008 +serdes_preemphasis_110=0x303c04 +serdes_preemphasis_111=0x303c04 +serdes_preemphasis_112=0x303c04 +serdes_preemphasis_113=0x303c04 +serdes_preemphasis_114=0x303c04 +serdes_preemphasis_115=0x303c04 +serdes_preemphasis_116=0x303c04 +serdes_preemphasis_117=0x303c04 +serdes_preemphasis_118=0x2c4004 +serdes_preemphasis_119=0x2c4004 +serdes_preemphasis_12=0x284008 +serdes_preemphasis_120=0x2c4004 +serdes_preemphasis_121=0x2c4004 +serdes_preemphasis_122=0x303c04 +serdes_preemphasis_123=0x303c04 +serdes_preemphasis_124=0x303c04 +serdes_preemphasis_125=0x303c04 +serdes_preemphasis_126=0x2c4004 +serdes_preemphasis_127=0x2c4004 +serdes_preemphasis_128=0x2c4004 +serdes_preemphasis_129=0x2c4004 +serdes_preemphasis_13=0x284008 +serdes_preemphasis_130=0x2c4004 +serdes_preemphasis_131=0x2c4004 +serdes_preemphasis_132=0x2c4004 +serdes_preemphasis_133=0x2c4004 +serdes_preemphasis_14=0x284008 +serdes_preemphasis_15=0x284008 +serdes_preemphasis_16=0x284008 +serdes_preemphasis_17=0x205000 +serdes_preemphasis_18=0x205000 +serdes_preemphasis_19=0x205000 +serdes_preemphasis_2=0x284008 +serdes_preemphasis_20=0x205000 +serdes_preemphasis_21=0x284800 +serdes_preemphasis_22=0x284800 +serdes_preemphasis_23=0x284800 +serdes_preemphasis_24=0x284800 +serdes_preemphasis_25=0x205000 +serdes_preemphasis_26=0x205000 +serdes_preemphasis_27=0x205000 +serdes_preemphasis_28=0x205000 +serdes_preemphasis_29=0x205000 +serdes_preemphasis_3=0x284008 +serdes_preemphasis_30=0x205000 +serdes_preemphasis_31=0x205000 +serdes_preemphasis_32=0x205000 +serdes_preemphasis_34=0x205000 +serdes_preemphasis_35=0x205000 +serdes_preemphasis_36=0x205000 +serdes_preemphasis_37=0x205000 +serdes_preemphasis_38=0x205000 +serdes_preemphasis_39=0x205000 +serdes_preemphasis_4=0x284008 +serdes_preemphasis_40=0x205000 +serdes_preemphasis_41=0x205000 +serdes_preemphasis_42=0x205000 +serdes_preemphasis_43=0x205000 +serdes_preemphasis_44=0x205000 +serdes_preemphasis_45=0x205000 +serdes_preemphasis_46=0x205000 +serdes_preemphasis_47=0x205000 +serdes_preemphasis_48=0x205000 +serdes_preemphasis_49=0x205000 +serdes_preemphasis_5=0x284008 +serdes_preemphasis_50=0x205000 +serdes_preemphasis_51=0x205000 +serdes_preemphasis_52=0x205000 +serdes_preemphasis_53=0x205000 +serdes_preemphasis_54=0x205000 +serdes_preemphasis_55=0x205000 +serdes_preemphasis_56=0x205000 +serdes_preemphasis_57=0x205000 +serdes_preemphasis_58=0x205000 +serdes_preemphasis_59=0x205000 +serdes_preemphasis_6=0x284008 +serdes_preemphasis_60=0x205000 +serdes_preemphasis_61=0x205000 +serdes_preemphasis_62=0x205000 +serdes_preemphasis_63=0x205000 +serdes_preemphasis_64=0x205000 +serdes_preemphasis_65=0x205000 +serdes_preemphasis_68=0x205000 +serdes_preemphasis_69=0x205000 +serdes_preemphasis_7=0x284008 +serdes_preemphasis_70=0x205000 +serdes_preemphasis_71=0x205000 +serdes_preemphasis_72=0x205000 +serdes_preemphasis_73=0x205000 +serdes_preemphasis_74=0x205000 +serdes_preemphasis_75=0x205000 +serdes_preemphasis_76=0x284800 +serdes_preemphasis_77=0x284800 +serdes_preemphasis_78=0x284800 +serdes_preemphasis_79=0x284800 +serdes_preemphasis_8=0x284008 +serdes_preemphasis_80=0x205000 +serdes_preemphasis_81=0x205000 +serdes_preemphasis_82=0x205000 +serdes_preemphasis_83=0x205000 +serdes_preemphasis_84=0x284800 +serdes_preemphasis_85=0x284800 +serdes_preemphasis_86=0x284800 +serdes_preemphasis_87=0x284800 +serdes_preemphasis_88=0x284800 +serdes_preemphasis_89=0x284800 +serdes_preemphasis_9=0x284008 +serdes_preemphasis_90=0x284800 +serdes_preemphasis_91=0x284800 +serdes_preemphasis_92=0x284800 +serdes_preemphasis_93=0x284800 +serdes_preemphasis_94=0x284800 +serdes_preemphasis_95=0x284800 +serdes_preemphasis_96=0x284800 +serdes_preemphasis_97=0x284800 +serdes_preemphasis_98=0x284800 +serdes_preemphasis_99=0x284800 +stable_size=0x6000000 +xgxs_rx_lane_map_1=0x3210 +xgxs_rx_lane_map_10=0x3210 +xgxs_rx_lane_map_102=0x123 +xgxs_rx_lane_map_103=0x123 +xgxs_rx_lane_map_104=0x123 +xgxs_rx_lane_map_105=0x123 +xgxs_rx_lane_map_106=0x3210 +xgxs_rx_lane_map_107=0x3210 +xgxs_rx_lane_map_108=0x3210 +xgxs_rx_lane_map_109=0x3210 +xgxs_rx_lane_map_11=0x3210 +xgxs_rx_lane_map_110=0x1032 +xgxs_rx_lane_map_111=0x1032 +xgxs_rx_lane_map_112=0x1032 +xgxs_rx_lane_map_113=0x1032 +xgxs_rx_lane_map_114=0x3210 +xgxs_rx_lane_map_115=0x3210 +xgxs_rx_lane_map_116=0x3210 +xgxs_rx_lane_map_117=0x3210 +xgxs_rx_lane_map_118=0x2301 +xgxs_rx_lane_map_119=0x2301 +xgxs_rx_lane_map_12=0x3210 +xgxs_rx_lane_map_120=0x2301 +xgxs_rx_lane_map_121=0x2301 +xgxs_rx_lane_map_122=0x3210 +xgxs_rx_lane_map_123=0x3210 +xgxs_rx_lane_map_124=0x3210 +xgxs_rx_lane_map_125=0x3210 +xgxs_rx_lane_map_126=0x1032 +xgxs_rx_lane_map_127=0x1032 +xgxs_rx_lane_map_128=0x1032 +xgxs_rx_lane_map_129=0x1032 +xgxs_rx_lane_map_13=0x3210 +xgxs_rx_lane_map_130=0x3210 +xgxs_rx_lane_map_131=0x3210 +xgxs_rx_lane_map_132=0x3210 +xgxs_rx_lane_map_133=0x3210 +xgxs_rx_lane_map_14=0x3210 +xgxs_rx_lane_map_15=0x3210 +xgxs_rx_lane_map_16=0x3210 +xgxs_rx_lane_map_17=0x2301 +xgxs_rx_lane_map_18=0x2301 +xgxs_rx_lane_map_19=0x2301 +xgxs_rx_lane_map_2=0x3210 +xgxs_rx_lane_map_20=0x2301 +xgxs_rx_lane_map_21=0x1032 +xgxs_rx_lane_map_22=0x1032 +xgxs_rx_lane_map_23=0x1032 +xgxs_rx_lane_map_24=0x1032 +xgxs_rx_lane_map_25=0x3210 +xgxs_rx_lane_map_26=0x3210 +xgxs_rx_lane_map_27=0x3210 +xgxs_rx_lane_map_28=0x3210 +xgxs_rx_lane_map_29=0x1032 +xgxs_rx_lane_map_3=0x3210 +xgxs_rx_lane_map_30=0x1032 +xgxs_rx_lane_map_31=0x1032 +xgxs_rx_lane_map_32=0x1032 +xgxs_rx_lane_map_34=0x2301 +xgxs_rx_lane_map_35=0x2301 +xgxs_rx_lane_map_36=0x2301 +xgxs_rx_lane_map_37=0x2301 +xgxs_rx_lane_map_38=0x1032 +xgxs_rx_lane_map_39=0x1032 +xgxs_rx_lane_map_4=0x3210 +xgxs_rx_lane_map_40=0x1032 +xgxs_rx_lane_map_41=0x1032 +xgxs_rx_lane_map_42=0x3210 +xgxs_rx_lane_map_43=0x3210 +xgxs_rx_lane_map_44=0x3210 +xgxs_rx_lane_map_45=0x3210 +xgxs_rx_lane_map_46=0x1032 +xgxs_rx_lane_map_47=0x1032 +xgxs_rx_lane_map_48=0x1032 +xgxs_rx_lane_map_49=0x1032 +xgxs_rx_lane_map_5=0x3210 +xgxs_rx_lane_map_50=0x1032 +xgxs_rx_lane_map_51=0x1032 +xgxs_rx_lane_map_52=0x1032 +xgxs_rx_lane_map_53=0x1032 +xgxs_rx_lane_map_54=0x1032 +xgxs_rx_lane_map_55=0x1032 +xgxs_rx_lane_map_56=0x1032 +xgxs_rx_lane_map_57=0x1032 +xgxs_rx_lane_map_58=0x1032 +xgxs_rx_lane_map_59=0x1032 +xgxs_rx_lane_map_6=0x3210 +xgxs_rx_lane_map_60=0x1032 +xgxs_rx_lane_map_61=0x1032 +xgxs_rx_lane_map_62=0x1032 +xgxs_rx_lane_map_63=0x1032 +xgxs_rx_lane_map_64=0x1032 +xgxs_rx_lane_map_65=0x1032 +xgxs_rx_lane_map_68=0x1032 +xgxs_rx_lane_map_69=0x1032 +xgxs_rx_lane_map_7=0x3210 +xgxs_rx_lane_map_70=0x1032 +xgxs_rx_lane_map_71=0x1032 +xgxs_rx_lane_map_72=0x3210 +xgxs_rx_lane_map_73=0x3210 +xgxs_rx_lane_map_74=0x3210 +xgxs_rx_lane_map_75=0x3210 +xgxs_rx_lane_map_76=0x213 +xgxs_rx_lane_map_77=0x213 +xgxs_rx_lane_map_78=0x213 +xgxs_rx_lane_map_79=0x213 +xgxs_rx_lane_map_8=0x3210 +xgxs_rx_lane_map_80=0x1032 +xgxs_rx_lane_map_81=0x1032 +xgxs_rx_lane_map_82=0x1032 +xgxs_rx_lane_map_83=0x1032 +xgxs_rx_lane_map_84=0x123 +xgxs_rx_lane_map_85=0x123 +xgxs_rx_lane_map_86=0x123 +xgxs_rx_lane_map_87=0x123 +xgxs_rx_lane_map_88=0x3210 +xgxs_rx_lane_map_89=0x3210 +xgxs_rx_lane_map_9=0x3210 +xgxs_rx_lane_map_90=0x3210 +xgxs_rx_lane_map_91=0x3210 +xgxs_rx_lane_map_92=0x1032 +xgxs_rx_lane_map_93=0x1032 +xgxs_rx_lane_map_94=0x1032 +xgxs_rx_lane_map_95=0x1032 +xgxs_rx_lane_map_96=0x3210 +xgxs_rx_lane_map_97=0x3210 +xgxs_rx_lane_map_98=0x3210 +xgxs_rx_lane_map_99=0x3210 +xgxs_tx_lane_map_1=0x3210 +xgxs_tx_lane_map_10=0x3210 +xgxs_tx_lane_map_102=0x3210 +xgxs_tx_lane_map_103=0x3210 +xgxs_tx_lane_map_104=0x3210 +xgxs_tx_lane_map_105=0x3210 +xgxs_tx_lane_map_106=0x1032 +xgxs_tx_lane_map_107=0x1032 +xgxs_tx_lane_map_108=0x1032 +xgxs_tx_lane_map_109=0x1032 +xgxs_tx_lane_map_11=0x3210 +xgxs_tx_lane_map_110=0x3210 +xgxs_tx_lane_map_111=0x3210 +xgxs_tx_lane_map_112=0x3210 +xgxs_tx_lane_map_113=0x3210 +xgxs_tx_lane_map_114=0x1032 +xgxs_tx_lane_map_115=0x1032 +xgxs_tx_lane_map_116=0x1032 +xgxs_tx_lane_map_117=0x1032 +xgxs_tx_lane_map_118=0x3210 +xgxs_tx_lane_map_119=0x3210 +xgxs_tx_lane_map_12=0x3210 +xgxs_tx_lane_map_120=0x3210 +xgxs_tx_lane_map_121=0x3210 +xgxs_tx_lane_map_122=0x1032 +xgxs_tx_lane_map_123=0x1032 +xgxs_tx_lane_map_124=0x1032 +xgxs_tx_lane_map_125=0x1032 +xgxs_tx_lane_map_126=0x1032 +xgxs_tx_lane_map_127=0x1032 +xgxs_tx_lane_map_128=0x1032 +xgxs_tx_lane_map_129=0x1032 +xgxs_tx_lane_map_13=0x3210 +xgxs_tx_lane_map_130=0x3210 +xgxs_tx_lane_map_131=0x3210 +xgxs_tx_lane_map_132=0x3210 +xgxs_tx_lane_map_133=0x3210 +xgxs_tx_lane_map_14=0x3210 +xgxs_tx_lane_map_15=0x3210 +xgxs_tx_lane_map_16=0x3210 +xgxs_tx_lane_map_17=0x1032 +xgxs_tx_lane_map_18=0x1032 +xgxs_tx_lane_map_19=0x1032 +xgxs_tx_lane_map_2=0x3210 +xgxs_tx_lane_map_20=0x1032 +xgxs_tx_lane_map_21=0x3210 +xgxs_tx_lane_map_22=0x3210 +xgxs_tx_lane_map_23=0x3210 +xgxs_tx_lane_map_24=0x3210 +xgxs_tx_lane_map_25=0x1032 +xgxs_tx_lane_map_26=0x1032 +xgxs_tx_lane_map_27=0x1032 +xgxs_tx_lane_map_28=0x1032 +xgxs_tx_lane_map_29=0x3210 +xgxs_tx_lane_map_3=0x3210 +xgxs_tx_lane_map_30=0x3210 +xgxs_tx_lane_map_31=0x3210 +xgxs_tx_lane_map_32=0x3210 +xgxs_tx_lane_map_34=0x1032 +xgxs_tx_lane_map_35=0x1032 +xgxs_tx_lane_map_36=0x1032 +xgxs_tx_lane_map_37=0x1032 +xgxs_tx_lane_map_38=0x3210 +xgxs_tx_lane_map_39=0x3210 +xgxs_tx_lane_map_4=0x3210 +xgxs_tx_lane_map_40=0x3210 +xgxs_tx_lane_map_41=0x3210 +xgxs_tx_lane_map_42=0x1032 +xgxs_tx_lane_map_43=0x1032 +xgxs_tx_lane_map_44=0x1032 +xgxs_tx_lane_map_45=0x1032 +xgxs_tx_lane_map_46=0x3210 +xgxs_tx_lane_map_47=0x3210 +xgxs_tx_lane_map_48=0x3210 +xgxs_tx_lane_map_49=0x3210 +xgxs_tx_lane_map_5=0x3210 +xgxs_tx_lane_map_50=0x1032 +xgxs_tx_lane_map_51=0x1032 +xgxs_tx_lane_map_52=0x1032 +xgxs_tx_lane_map_53=0x1032 +xgxs_tx_lane_map_54=0x1032 +xgxs_tx_lane_map_55=0x1032 +xgxs_tx_lane_map_56=0x1032 +xgxs_tx_lane_map_57=0x1032 +xgxs_tx_lane_map_58=0x1032 +xgxs_tx_lane_map_59=0x1032 +xgxs_tx_lane_map_6=0x3210 +xgxs_tx_lane_map_60=0x1032 +xgxs_tx_lane_map_61=0x1032 +xgxs_tx_lane_map_62=0x1032 +xgxs_tx_lane_map_63=0x1032 +xgxs_tx_lane_map_64=0x1032 +xgxs_tx_lane_map_65=0x1032 +xgxs_tx_lane_map_68=0x1032 +xgxs_tx_lane_map_69=0x1032 +xgxs_tx_lane_map_7=0x3210 +xgxs_tx_lane_map_70=0x1032 +xgxs_tx_lane_map_71=0x1032 +xgxs_tx_lane_map_72=0x3210 +xgxs_tx_lane_map_73=0x3210 +xgxs_tx_lane_map_74=0x3210 +xgxs_tx_lane_map_75=0x3210 +xgxs_tx_lane_map_76=0x3210 +xgxs_tx_lane_map_77=0x3210 +xgxs_tx_lane_map_78=0x3210 +xgxs_tx_lane_map_79=0x3210 +xgxs_tx_lane_map_8=0x3210 +xgxs_tx_lane_map_80=0x1032 +xgxs_tx_lane_map_81=0x1032 +xgxs_tx_lane_map_82=0x1032 +xgxs_tx_lane_map_83=0x1032 +xgxs_tx_lane_map_84=0x3210 +xgxs_tx_lane_map_85=0x3210 +xgxs_tx_lane_map_86=0x3210 +xgxs_tx_lane_map_87=0x3210 +xgxs_tx_lane_map_88=0x1032 +xgxs_tx_lane_map_89=0x1032 +xgxs_tx_lane_map_9=0x3210 +xgxs_tx_lane_map_90=0x1032 +xgxs_tx_lane_map_91=0x1032 +xgxs_tx_lane_map_92=0x3210 +xgxs_tx_lane_map_93=0x3210 +xgxs_tx_lane_map_94=0x3210 +xgxs_tx_lane_map_95=0x3210 +xgxs_tx_lane_map_96=0x1032 +xgxs_tx_lane_map_97=0x1032 +xgxs_tx_lane_map_98=0x1032 +xgxs_tx_lane_map_99=0x1032 diff --git a/device/facebook/x86_64-facebook_wedge100-r0/default_sku b/device/facebook/x86_64-facebook_wedge100-r0/default_sku new file mode 100644 index 00000000000..e8fafcb709d --- /dev/null +++ b/device/facebook/x86_64-facebook_wedge100-r0/default_sku @@ -0,0 +1 @@ +Facebook-W100-C32 t1 diff --git a/device/facebook/x86_64-facebook_wedge100-r0/installer.conf b/device/facebook/x86_64-facebook_wedge100-r0/installer.conf new file mode 100644 index 00000000000..3714ff053bb --- /dev/null +++ b/device/facebook/x86_64-facebook_wedge100-r0/installer.conf @@ -0,0 +1 @@ +CONSOLE_SPEED=57600 diff --git a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/INGRASYS-S8810-32Q/port_config.ini b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/INGRASYS-S8810-32Q/port_config.ini new file mode 100644 index 00000000000..bf87e1402ab --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/INGRASYS-S8810-32Q/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index +Ethernet0 37,38,39,40 Ethernet1/1 0 +Ethernet4 33,34,35,36 Ethernet2/1 1 +Ethernet8 45,46,47,48 Ethernet3/1 2 +Ethernet12 41,42,43,44 Ethernet4/1 3 +Ethernet16 53,54,55,56 Ethernet5/1 4 +Ethernet20 49,50,51,52 Ethernet6/1 5 +Ethernet24 61,62,63,64 Ethernet7/1 6 +Ethernet28 57,58,59,60 Ethernet8/1 7 +Ethernet32 69,70,71,72 Ethernet9/1 8 +Ethernet36 65,66,67,68 Ethernet10/1 9 +Ethernet40 77,78,79,80 Ethernet11/1 10 +Ethernet44 73,74,75,76 Ethernet12/1 11 +Ethernet48 85,86,87,88 Ethernet13/1 12 +Ethernet52 81,82,83,84 Ethernet14/1 13 +Ethernet56 93,94,95,96 Ethernet15/1 14 +Ethernet60 89,90,91,92 Ethernet16/1 15 +Ethernet64 101,102,103,104 Ethernet17/1 16 +Ethernet68 97,98,99,100 Ethernet18/1 17 +Ethernet72 109,110,111,112 Ethernet19/1 18 +Ethernet76 105,106,107,108 Ethernet20/1 19 +Ethernet80 117,118,119,120 Ethernet21/1 20 +Ethernet84 113,114,115,116 Ethernet22/1 21 +Ethernet88 125,126,127,128 Ethernet23/1 22 +Ethernet92 121,122,123,124 Ethernet24/1 23 +Ethernet96 5,6,7,8 Ethernet25/1 24 +Ethernet100 1,2,3,4 Ethernet26/1 25 +Ethernet104 13,14,15,16 Ethernet27/1 26 +Ethernet108 9,10,11,12 Ethernet28/1 27 +Ethernet112 21,22,23,24 Ethernet29/1 28 +Ethernet116 17,18,19,20 Ethernet30/1 29 +Ethernet120 29,30,31,32 Ethernet31/1 30 +Ethernet124 25,26,27,28 Ethernet32/1 31 diff --git a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/INGRASYS-S8810-32Q/sai.profile b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/INGRASYS-S8810-32Q/sai.profile new file mode 100644 index 00000000000..42315ee4ea6 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/INGRASYS-S8810-32Q/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-s8810-32x40G.config.bcm diff --git a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/INGRASYS-S8810-32Q/td2-s8810-32x40G.config.bcm b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/INGRASYS-S8810-32Q/td2-s8810-32x40G.config.bcm new file mode 100644 index 00000000000..894f60345a7 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/INGRASYS-S8810-32Q/td2-s8810-32x40G.config.bcm @@ -0,0 +1,473 @@ +#2017/09/12 +os=unix + +module_64ports=0 +schan_intr_enable=0 +stable_size=0x2000000 + +pbmp_xport_xe=0x000007fffffffffffffffffffffffffe +pbmp_oversubscribe=0x000007fffffffffffffffffffffffffe + +# ALPM enable +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 +l2_mem_entries=32768 +l3_mem_entries=16384 + +l2xmsg_mode=1 +mmu_lossless=0 + +#Parity +parity_correction=1 +parity_enable=1 + +portmap_1=37:40 +portmap_2=33:40 +portmap_3=45:40 +portmap_4=41:40 +portmap_5=53:40 +portmap_6=49:40 +portmap_7=61:40 +portmap_8=57:40 +portmap_9=69:40 +portmap_10=65:40 +portmap_11=77:40 +portmap_12=73:40 +portmap_13=85:40 +portmap_14=81:40 +portmap_15=93:40 +portmap_16=89:40 +portmap_17=101:40 +portmap_18=97:40 +portmap_19=109:40 +portmap_20=105:40 +portmap_21=117:40 +portmap_22=113:40 +portmap_23=125:40 +portmap_24=121:40 +portmap_25=5:40 +portmap_26=1:40 +portmap_27=13:40 +portmap_28=9:40 +portmap_29=21:40 +portmap_30=17:40 +portmap_31=29:40 +portmap_32=25:40 + +serdes_driver_current_lane0_xe0=0x6 +serdes_driver_current_lane1_xe0=0x6 +serdes_driver_current_lane2_xe0=0x6 +serdes_driver_current_lane3_xe0=0x7 +serdes_pre_driver_current_lane0_xe0=0x6 +serdes_pre_driver_current_lane1_xe0=0x6 +serdes_pre_driver_current_lane2_xe0=0x6 +serdes_pre_driver_current_lane3_xe0=0x7 +serdes_preemphasis_lane0_xe0=0xc2f0 +serdes_preemphasis_lane1_xe0=0xcf20 +serdes_preemphasis_lane2_xe0=0xc2f0 +serdes_preemphasis_lane3_xe0=0xc2f0 + +serdes_driver_current_lane0_xe1=0x8 +serdes_driver_current_lane1_xe1=0x8 +serdes_driver_current_lane2_xe1=0x8 +serdes_driver_current_lane3_xe1=0x8 +serdes_pre_driver_current_lane0_xe1=0x8 +serdes_pre_driver_current_lane1_xe1=0x8 +serdes_pre_driver_current_lane2_xe1=0x8 +serdes_pre_driver_current_lane3_xe1=0x8 +serdes_preemphasis_lane0_xe1=0xc6e0 +serdes_preemphasis_lane1_xe1=0xc6e0 +serdes_preemphasis_lane2_xe1=0xc6e0 +serdes_preemphasis_lane3_xe1=0xc6e0 + +serdes_driver_current_lane0_xe2=0x5 +serdes_driver_current_lane1_xe2=0x3 +serdes_driver_current_lane2_xe2=0x3 +serdes_driver_current_lane3_xe2=0x3 +serdes_pre_driver_current_lane0_xe2=0x5 +serdes_pre_driver_current_lane1_xe2=0x3 +serdes_pre_driver_current_lane2_xe2=0x3 +serdes_pre_driver_current_lane3_xe2=0x3 +serdes_preemphasis_lane0_xe2=0x9b90 +serdes_preemphasis_lane1_xe2=0x9f80 +serdes_preemphasis_lane2_xe2=0x9b90 +serdes_preemphasis_lane3_xe2=0x9b90 + +serdes_driver_current_lane0_xe3=0x5 +serdes_driver_current_lane1_xe3=0x5 +serdes_driver_current_lane2_xe3=0x5 +serdes_driver_current_lane3_xe3=0x5 +serdes_pre_driver_current_lane0_xe3=0x5 +serdes_pre_driver_current_lane1_xe3=0x5 +serdes_pre_driver_current_lane2_xe3=0x5 +serdes_pre_driver_current_lane3_xe3=0x5 +serdes_preemphasis_lane0_xe3=0x9b90 +serdes_preemphasis_lane1_xe3=0x9b90 +serdes_preemphasis_lane2_xe3=0x9b90 +serdes_preemphasis_lane3_xe3=0x9b90 + +serdes_driver_current_lane0_xe4=0x3 +serdes_driver_current_lane1_xe4=0x3 +serdes_driver_current_lane2_xe4=0x3 +serdes_driver_current_lane3_xe4=0x3 +serdes_pre_driver_current_lane0_xe4=0x3 +serdes_pre_driver_current_lane1_xe4=0x3 +serdes_pre_driver_current_lane2_xe4=0x3 +serdes_pre_driver_current_lane3_xe4=0x3 +serdes_preemphasis_lane0_xe4=0x93b0 +serdes_preemphasis_lane1_xe4=0x97a0 +serdes_preemphasis_lane2_xe4=0x9b90 +serdes_preemphasis_lane3_xe4=0x9b90 + +serdes_driver_current_lane0_xe5=0x3 +serdes_driver_current_lane1_xe5=0x3 +serdes_driver_current_lane2_xe5=0x3 +serdes_driver_current_lane3_xe5=0x3 +serdes_pre_driver_current_lane0_xe5=0x3 +serdes_pre_driver_current_lane1_xe5=0x3 +serdes_pre_driver_current_lane2_xe5=0x3 +serdes_pre_driver_current_lane3_xe5=0x3 +serdes_preemphasis_lane0_xe5=0x9b90 +serdes_preemphasis_lane1_xe5=0x9b90 +serdes_preemphasis_lane2_xe5=0x9b90 +serdes_preemphasis_lane3_xe5=0x9b90 + +serdes_driver_current_lane0_xe6=0x1 +serdes_driver_current_lane1_xe6=0x1 +serdes_driver_current_lane2_xe6=0x1 +serdes_driver_current_lane3_xe6=0x1 +serdes_pre_driver_current_lane0_xe6=0x1 +serdes_pre_driver_current_lane1_xe6=0x1 +serdes_pre_driver_current_lane2_xe6=0x1 +serdes_pre_driver_current_lane3_xe6=0x1 +serdes_preemphasis_lane0_xe6=0xa760 +serdes_preemphasis_lane1_xe6=0xc2f0 +serdes_preemphasis_lane2_xe6=0xa760 +serdes_preemphasis_lane3_xe6=0xa760 + +serdes_driver_current_lane0_xe7=0x1 +serdes_driver_current_lane1_xe7=0x1 +serdes_driver_current_lane2_xe7=0x1 +serdes_driver_current_lane3_xe7=0x1 +serdes_pre_driver_current_lane0_xe7=0x0 +serdes_pre_driver_current_lane1_xe7=0x0 +serdes_pre_driver_current_lane2_xe7=0x0 +serdes_pre_driver_current_lane3_xe7=0x0 +serdes_preemphasis_lane0_xe7=0xa760 +serdes_preemphasis_lane1_xe7=0xa760 +serdes_preemphasis_lane2_xe7=0xa760 +serdes_preemphasis_lane3_xe7=0xa760 + +serdes_driver_current_lane0_xe8=0x1 +serdes_driver_current_lane1_xe8=0x1 +serdes_driver_current_lane2_xe8=0x1 +serdes_driver_current_lane3_xe8=0x0 +serdes_pre_driver_current_lane0_xe8=0x0 +serdes_pre_driver_current_lane1_xe8=0x0 +serdes_pre_driver_current_lane2_xe8=0x0 +serdes_pre_driver_current_lane3_xe8=0x0 +serdes_preemphasis_lane0_xe8=0xa760 +serdes_preemphasis_lane1_xe8=0xa760 +serdes_preemphasis_lane2_xe8=0xa760 +serdes_preemphasis_lane3_xe8=0xa760 + +serdes_driver_current_lane0_xe9=0x1 +serdes_driver_current_lane1_xe9=0x1 +serdes_driver_current_lane2_xe9=0x1 +serdes_driver_current_lane3_xe9=0x1 +serdes_pre_driver_current_lane0_xe9=0x0 +serdes_pre_driver_current_lane1_xe9=0x0 +serdes_pre_driver_current_lane2_xe9=0x0 +serdes_pre_driver_current_lane3_xe9=0x0 +serdes_preemphasis_lane0_xe9=0xa760 +serdes_preemphasis_lane1_xe9=0xa760 +serdes_preemphasis_lane2_xe9=0xa760 +serdes_preemphasis_lane3_xe9=0xa760 + +serdes_driver_current_lane0_xe10=0x1 +serdes_driver_current_lane1_xe10=0x1 +serdes_driver_current_lane2_xe10=0x1 +serdes_driver_current_lane3_xe10=0x1 +serdes_pre_driver_current_lane0_xe10=0x0 +serdes_pre_driver_current_lane1_xe10=0x0 +serdes_pre_driver_current_lane2_xe10=0x0 +serdes_pre_driver_current_lane3_xe10=0x0 +serdes_preemphasis_lane0_xe10=0xa760 +serdes_preemphasis_lane1_xe10=0xa760 +serdes_preemphasis_lane2_xe10=0xa760 +serdes_preemphasis_lane3_xe10=0xa760 + +serdes_driver_current_lane0_xe11=0x1 +serdes_driver_current_lane1_xe11=0x1 +serdes_driver_current_lane2_xe11=0x1 +serdes_driver_current_lane3_xe11=0x1 +serdes_pre_driver_current_lane0_xe11=0x1 +serdes_pre_driver_current_lane1_xe11=0x0 +serdes_pre_driver_current_lane2_xe11=0x1 +serdes_pre_driver_current_lane3_xe11=0x0 +serdes_preemphasis_lane0_xe11=0xa760 +serdes_preemphasis_lane1_xe11=0xa760 +serdes_preemphasis_lane2_xe11=0xa760 +serdes_preemphasis_lane3_xe11=0xa760 + +serdes_driver_current_lane0_xe12=0x1 +serdes_driver_current_lane1_xe12=0x1 +serdes_driver_current_lane2_xe12=0x1 +serdes_driver_current_lane3_xe12=0x1 +serdes_pre_driver_current_lane0_xe12=0x0 +serdes_pre_driver_current_lane1_xe12=0x0 +serdes_pre_driver_current_lane2_xe12=0x0 +serdes_pre_driver_current_lane3_xe12=0x0 +serdes_preemphasis_lane0_xe12=0xa760 +serdes_preemphasis_lane1_xe12=0xa760 +serdes_preemphasis_lane2_xe12=0xa760 +serdes_preemphasis_lane3_xe12=0xa760 + +serdes_driver_current_lane0_xe13=0x1 +serdes_driver_current_lane1_xe13=0x1 +serdes_driver_current_lane2_xe13=0x1 +serdes_driver_current_lane3_xe13=0x1 +serdes_pre_driver_current_lane0_xe13=0x1 +serdes_pre_driver_current_lane1_xe13=0x1 +serdes_pre_driver_current_lane2_xe13=0x1 +serdes_pre_driver_current_lane3_xe13=0x0 +serdes_preemphasis_lane0_xe13=0xa760 +serdes_preemphasis_lane1_xe13=0xa760 +serdes_preemphasis_lane2_xe13=0xa760 +serdes_preemphasis_lane3_xe13=0xa760 + +serdes_driver_current_lane0_xe14=0x3 +serdes_driver_current_lane1_xe14=0x3 +serdes_driver_current_lane2_xe14=0x3 +serdes_driver_current_lane3_xe14=0x3 +serdes_pre_driver_current_lane0_xe14=0x3 +serdes_pre_driver_current_lane1_xe14=0x3 +serdes_pre_driver_current_lane2_xe14=0x3 +serdes_pre_driver_current_lane3_xe14=0x3 +serdes_preemphasis_lane0_xe14=0xaf40 +serdes_preemphasis_lane1_xe14=0xab50 +serdes_preemphasis_lane2_xe14=0xaf40 +serdes_preemphasis_lane3_xe14=0xaf40 + +serdes_driver_current_lane0_xe15=0x3 +serdes_driver_current_lane1_xe15=0x3 +serdes_driver_current_lane2_xe15=0x3 +serdes_driver_current_lane3_xe15=0x3 +serdes_pre_driver_current_lane0_xe15=0x3 +serdes_pre_driver_current_lane1_xe15=0x3 +serdes_pre_driver_current_lane2_xe15=0x3 +serdes_pre_driver_current_lane3_xe15=0x3 +serdes_preemphasis_lane0_xe15=0xaf40 +serdes_preemphasis_lane1_xe15=0xaf40 +serdes_preemphasis_lane2_xe15=0xab50 +serdes_preemphasis_lane3_xe15=0xab50 + +serdes_driver_current_lane0_xe16=0x0 +serdes_driver_current_lane1_xe16=0x1 +serdes_driver_current_lane2_xe16=0x1 +serdes_driver_current_lane3_xe16=0x1 +serdes_pre_driver_current_lane0_xe16=0x0 +serdes_pre_driver_current_lane1_xe16=0x1 +serdes_pre_driver_current_lane2_xe16=0x1 +serdes_pre_driver_current_lane3_xe16=0x1 +serdes_preemphasis_lane0_xe16=0xa760 +serdes_preemphasis_lane1_xe16=0xa760 +serdes_preemphasis_lane2_xe16=0xa760 +serdes_preemphasis_lane3_xe16=0xa760 + +serdes_driver_current_lane0_xe17=0x1 +serdes_driver_current_lane1_xe17=0x0 +serdes_driver_current_lane2_xe17=0x1 +serdes_driver_current_lane3_xe17=0x1 +serdes_pre_driver_current_lane0_xe17=0x1 +serdes_pre_driver_current_lane1_xe17=0x0 +serdes_pre_driver_current_lane2_xe17=0x1 +serdes_pre_driver_current_lane3_xe17=0x1 +serdes_preemphasis_lane0_xe17=0xa760 +serdes_preemphasis_lane1_xe17=0x9b90 +serdes_preemphasis_lane2_xe17=0xa760 +serdes_preemphasis_lane3_xe17=0xa760 + +serdes_driver_current_lane0_xe18=0x1 +serdes_driver_current_lane1_xe18=0x1 +serdes_driver_current_lane2_xe18=0x1 +serdes_driver_current_lane3_xe18=0x1 +serdes_pre_driver_current_lane0_xe18=0x1 +serdes_pre_driver_current_lane1_xe18=0x1 +serdes_pre_driver_current_lane2_xe18=0x1 +serdes_pre_driver_current_lane3_xe18=0x1 +serdes_preemphasis_lane0_xe18=0xa760 +serdes_preemphasis_lane1_xe18=0xa760 +serdes_preemphasis_lane2_xe18=0xa760 +serdes_preemphasis_lane3_xe18=0xa760 + +serdes_driver_current_lane0_xe19=0x1 +serdes_driver_current_lane1_xe19=0x1 +serdes_driver_current_lane2_xe19=0x1 +serdes_driver_current_lane3_xe19=0x1 +serdes_pre_driver_current_lane0_xe19=0x1 +serdes_pre_driver_current_lane1_xe19=0x1 +serdes_pre_driver_current_lane2_xe19=0x0 +serdes_pre_driver_current_lane3_xe19=0x1 +serdes_preemphasis_lane0_xe19=0xa760 +serdes_preemphasis_lane1_xe19=0xa760 +serdes_preemphasis_lane2_xe19=0xa760 +serdes_preemphasis_lane3_xe19=0xa760 + +serdes_driver_current_lane0_xe20=0x1 +serdes_driver_current_lane1_xe20=0x2 +serdes_driver_current_lane2_xe20=0x1 +serdes_driver_current_lane3_xe20=0x1 +serdes_pre_driver_current_lane0_xe20=0x0 +serdes_pre_driver_current_lane1_xe20=0x2 +serdes_pre_driver_current_lane2_xe20=0x1 +serdes_pre_driver_current_lane3_xe20=0x1 +serdes_preemphasis_lane0_xe20=0xa760 +serdes_preemphasis_lane1_xe20=0xa670 +serdes_preemphasis_lane2_xe20=0xa760 +serdes_preemphasis_lane3_xe20=0xa760 + +serdes_driver_current_lane0_xe21=0x1 +serdes_driver_current_lane1_xe21=0x1 +serdes_driver_current_lane2_xe21=0x0 +serdes_driver_current_lane3_xe21=0x1 +serdes_pre_driver_current_lane0_xe21=0x0 +serdes_pre_driver_current_lane1_xe21=0x1 +serdes_pre_driver_current_lane2_xe21=0x0 +serdes_pre_driver_current_lane3_xe21=0x1 +serdes_preemphasis_lane0_xe21=0xa760 +serdes_preemphasis_lane1_xe21=0xa670 +serdes_preemphasis_lane2_xe21=0xa760 +serdes_preemphasis_lane3_xe21=0xa760 + +serdes_driver_current_lane0_xe22=0x1 +serdes_driver_current_lane1_xe22=0x4 +serdes_driver_current_lane2_xe22=0x2 +serdes_driver_current_lane3_xe22=0x2 +serdes_pre_driver_current_lane0_xe22=0x1 +serdes_pre_driver_current_lane1_xe22=0x4 +serdes_pre_driver_current_lane2_xe22=0x2 +serdes_pre_driver_current_lane3_xe22=0x2 +serdes_preemphasis_lane0_xe22=0xa760 +serdes_preemphasis_lane1_xe22=0x97a0 +serdes_preemphasis_lane2_xe22=0xa670 +serdes_preemphasis_lane3_xe22=0xa760 + +serdes_driver_current_lane0_xe23=0x3 +serdes_driver_current_lane1_xe23=0x3 +serdes_driver_current_lane2_xe23=0x1 +serdes_driver_current_lane3_xe23=0x1 +serdes_pre_driver_current_lane0_xe23=0x3 +serdes_pre_driver_current_lane1_xe23=0x3 +serdes_pre_driver_current_lane2_xe23=0x1 +serdes_pre_driver_current_lane3_xe23=0x1 +serdes_preemphasis_lane0_xe23=0xa760 +serdes_preemphasis_lane1_xe23=0x9b90 +serdes_preemphasis_lane2_xe23=0xab50 +serdes_preemphasis_lane3_xe23=0xa760 + +serdes_driver_current_lane0_xe24=0x1 +serdes_driver_current_lane1_xe24=0x4 +serdes_driver_current_lane2_xe24=0x4 +serdes_driver_current_lane3_xe24=0x3 +serdes_pre_driver_current_lane0_xe24=0x1 +serdes_pre_driver_current_lane1_xe24=0x4 +serdes_pre_driver_current_lane2_xe24=0x4 +serdes_pre_driver_current_lane3_xe24=0x3 +serdes_preemphasis_lane0_xe24=0xa760 +serdes_preemphasis_lane1_xe24=0x93b0 +serdes_preemphasis_lane2_xe24=0x9b90 +serdes_preemphasis_lane3_xe24=0xa760 + +serdes_driver_current_lane0_xe25=0x4 +serdes_driver_current_lane1_xe25=0x3 +serdes_driver_current_lane2_xe25=0x3 +serdes_driver_current_lane3_xe25=0x1 +serdes_pre_driver_current_lane0_xe25=0x4 +serdes_pre_driver_current_lane1_xe25=0x3 +serdes_pre_driver_current_lane2_xe25=0x3 +serdes_pre_driver_current_lane3_xe25=0x1 +serdes_preemphasis_lane0_xe25=0x93b0 +serdes_preemphasis_lane1_xe25=0x9b90 +serdes_preemphasis_lane2_xe25=0x9b90 +serdes_preemphasis_lane3_xe25=0xa760 + +serdes_driver_current_lane0_xe26=0x4 +serdes_driver_current_lane1_xe26=0x4 +serdes_driver_current_lane2_xe26=0x4 +serdes_driver_current_lane3_xe26=0x4 +serdes_pre_driver_current_lane0_xe26=0x4 +serdes_pre_driver_current_lane1_xe26=0x4 +serdes_pre_driver_current_lane2_xe26=0x4 +serdes_pre_driver_current_lane3_xe26=0x4 +serdes_preemphasis_lane0_xe26=0x9b90 +serdes_preemphasis_lane1_xe26=0x97a0 +serdes_preemphasis_lane2_xe26=0x9b90 +serdes_preemphasis_lane3_xe26=0x97a0 + +serdes_driver_current_lane0_xe27=0x4 +serdes_driver_current_lane1_xe27=0x3 +serdes_driver_current_lane2_xe27=0x3 +serdes_driver_current_lane3_xe27=0x3 +serdes_pre_driver_current_lane0_xe27=0x4 +serdes_pre_driver_current_lane1_xe27=0x3 +serdes_pre_driver_current_lane2_xe27=0x3 +serdes_pre_driver_current_lane3_xe27=0x3 +serdes_preemphasis_lane0_xe27=0x9b90 +serdes_preemphasis_lane1_xe27=0x9b90 +serdes_preemphasis_lane2_xe27=0x9b90 +serdes_preemphasis_lane3_xe27=0x9b90 + +serdes_driver_current_lane0_xe28=0x5 +serdes_driver_current_lane1_xe28=0x5 +serdes_driver_current_lane2_xe28=0x6 +serdes_driver_current_lane3_xe28=0x6 +serdes_pre_driver_current_lane0_xe28=0x5 +serdes_pre_driver_current_lane1_xe28=0x5 +serdes_pre_driver_current_lane2_xe28=0x6 +serdes_pre_driver_current_lane3_xe28=0x6 +serdes_preemphasis_lane0_xe28=0xbf00 +serdes_preemphasis_lane1_xe28=0xbf00 +serdes_preemphasis_lane2_xe28=0xbf00 +serdes_preemphasis_lane3_xe28=0xbf00 + +serdes_driver_current_lane0_xe29=0x7 +serdes_driver_current_lane1_xe29=0x6 +serdes_driver_current_lane2_xe29=0x6 +serdes_driver_current_lane3_xe29=0x6 +serdes_pre_driver_current_lane0_xe29=0x7 +serdes_pre_driver_current_lane1_xe29=0x6 +serdes_pre_driver_current_lane2_xe29=0x6 +serdes_pre_driver_current_lane3_xe29=0x6 +serdes_preemphasis_lane0_xe29=0xbb10 +serdes_preemphasis_lane1_xe29=0xbb10 +serdes_preemphasis_lane2_xe29=0xbb10 +serdes_preemphasis_lane3_xe29=0xbb10 + +serdes_driver_current_lane0_xe30=0x7 +serdes_driver_current_lane1_xe30=0x7 +serdes_driver_current_lane2_xe30=0x7 +serdes_driver_current_lane3_xe30=0x7 +serdes_pre_driver_current_lane0_xe30=0x7 +serdes_pre_driver_current_lane1_xe30=0x7 +serdes_pre_driver_current_lane2_xe30=0x7 +serdes_pre_driver_current_lane3_xe30=0x7 +serdes_preemphasis_lane0_xe30=0xc2f0 +serdes_preemphasis_lane1_xe30=0xc2f0 +serdes_preemphasis_lane2_xe30=0xc2f0 +serdes_preemphasis_lane3_xe30=0xc2f0 + +serdes_driver_current_lane0_xe31=0x7 +serdes_driver_current_lane1_xe31=0x7 +serdes_driver_current_lane2_xe31=0x7 +serdes_driver_current_lane3_xe31=0x7 +serdes_pre_driver_current_lane0_xe31=0x7 +serdes_pre_driver_current_lane1_xe31=0x7 +serdes_pre_driver_current_lane2_xe31=0x7 +serdes_pre_driver_current_lane3_xe31=0x7 +serdes_preemphasis_lane0_xe31=0xc2f0 +serdes_preemphasis_lane1_xe31=0xc2f0 +serdes_preemphasis_lane2_xe31=0xc2f0 +serdes_preemphasis_lane3_xe31=0xc2f0 + +serdes_if_type_xe=14 diff --git a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/default_sku new file mode 100644 index 00000000000..fe68cd87d18 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S8810-32Q t1 diff --git a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/fancontrol b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/fancontrol new file mode 100644 index 00000000000..8c378371a9a --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/fancontrol @@ -0,0 +1,11 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH=hwmon1=devices/pci0000:00/0000:00:1f.3/i2c-0/0-002f +DEVNAME=hwmon1=w83795adg +FCTEMPS=hwmon1/device/pwm2=hwmon1/device/temp2_input hwmon1/device/pwm1=hwmon1/device/temp2_input +FCFANS=hwmon1/device/pwm2=hwmon1/device/fan8_input hwmon1/device/pwm2=hwmon1/device/fan7_input hwmon1/device/pwm2=hwmon1/device/fan6_input hwmon1/device/pwm2=hwmon1/device/fan5_input hwmon1/device/pwm1=hwmon1/device/fan4_input hwmon1/device/pwm1=hwmon1/device/fan3_input hwmon1/device/pwm1=hwmon1/device/fan2_input hwmon1/device/pwm1=hwmon1/device/fan1_input +MINTEMP=hwmon1/device/pwm2=20 hwmon1/device/pwm1=20 +MAXTEMP=hwmon1/device/pwm2=60 hwmon1/device/pwm1=60 +MINSTART=hwmon1/device/pwm2=75 hwmon1/device/pwm1=75 +MINSTOP=hwmon1/device/pwm2=22 hwmon1/device/pwm1=22 + diff --git a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/installer.conf b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/led_proc_init.soc b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/led_proc_init.soc new file mode 100644 index 00000000000..8c1a18f6236 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/led_proc_init.soc @@ -0,0 +1,45 @@ +#processor initialization for Ingrasys S8810-32Q + +led 0 stop +led 0 prog 12 00 61 F1 12 10 61 F2 12 04 61 F3 12 04 61 F4 67 16 86 F0 77 74 96 F2 2E F1 67 2B 67 3F 16 F3 FE F1 61 F1 12 00 DE F2 74 16 57 2E F1 32 00 32 01 B7 97 75 3A 02 01 60 FE 57 02 00 60 FE 57 2E F1 32 08 97 75 58 77 48 06 FE D2 01 70 50 77 66 06 F0 C2 08 74 58 77 66 16 F4 91 22 0E 87 22 0E 87 DA 00 74 5A 57 16 F4 91 22 0E 87 22 0F 87 DA 00 74 68 57 02 80 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=48 REMAP_PORT_2=49 REMAP_PORT_1=50 REMAP_PORT_0=51 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=52 REMAP_PORT_6=53 REMAP_PORT_5=54 REMAP_PORT_4=55 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=56 REMAP_PORT_10=57 REMAP_PORT_9=58 REMAP_PORT_8=59 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=60 REMAP_PORT_14=61 REMAP_PORT_13=62 REMAP_PORT_12=63 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=44 REMAP_PORT_18=45 REMAP_PORT_17=46 REMAP_PORT_16=47 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=40 REMAP_PORT_22=41 REMAP_PORT_21=42 REMAP_PORT_20=43 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=36 REMAP_PORT_26=37 REMAP_PORT_25=38 REMAP_PORT_24=39 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=32 REMAP_PORT_30=33 REMAP_PORT_29=34 REMAP_PORT_28=35 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=16 REMAP_PORT_34=17 REMAP_PORT_33=18 REMAP_PORT_32=19 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=20 REMAP_PORT_38=21 REMAP_PORT_37=22 REMAP_PORT_36=23 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=24 REMAP_PORT_42=25 REMAP_PORT_41=26 REMAP_PORT_40=27 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=28 REMAP_PORT_46=29 REMAP_PORT_45=30 REMAP_PORT_44=31 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=12 REMAP_PORT_50=13 REMAP_PORT_49=14 REMAP_PORT_48=15 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=8 REMAP_PORT_54=9 REMAP_PORT_53=10 REMAP_PORT_52=11 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=4 REMAP_PORT_58=5 REMAP_PORT_57=6 REMAP_PORT_56=7 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0 REMAP_PORT_62=1 REMAP_PORT_61=2 REMAP_PORT_60=3 + +led 0 auto on +led 0 start + +led 1 stop +led 1 prog 12 00 61 F1 12 10 61 F2 12 04 61 F3 12 04 61 F4 67 16 86 F0 77 74 96 F2 2E F1 67 2B 67 3F 16 F3 FE F1 61 F1 12 00 DE F2 74 16 57 2E F1 32 00 32 01 B7 97 75 3A 02 01 60 FE 57 02 00 60 FE 57 2E F1 32 08 97 75 58 77 48 06 FE D2 01 70 50 77 66 06 F0 C2 08 74 58 77 66 16 F4 91 22 0E 87 22 0E 87 DA 00 74 5A 57 16 F4 91 22 0E 87 22 0F 87 DA 00 74 68 57 02 80 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=48 REMAP_PORT_2=49 REMAP_PORT_1=50 REMAP_PORT_0=51 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=52 REMAP_PORT_6=53 REMAP_PORT_5=54 REMAP_PORT_4=55 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=56 REMAP_PORT_10=57 REMAP_PORT_9=58 REMAP_PORT_8=59 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=60 REMAP_PORT_14=61 REMAP_PORT_13=62 REMAP_PORT_12=63 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=44 REMAP_PORT_18=45 REMAP_PORT_17=46 REMAP_PORT_16=47 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=40 REMAP_PORT_22=41 REMAP_PORT_21=42 REMAP_PORT_20=43 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=36 REMAP_PORT_26=37 REMAP_PORT_25=38 REMAP_PORT_24=39 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=32 REMAP_PORT_30=33 REMAP_PORT_29=34 REMAP_PORT_28=35 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=16 REMAP_PORT_34=17 REMAP_PORT_33=18 REMAP_PORT_32=19 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=20 REMAP_PORT_38=21 REMAP_PORT_37=22 REMAP_PORT_36=23 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=24 REMAP_PORT_42=25 REMAP_PORT_41=26 REMAP_PORT_40=27 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=28 REMAP_PORT_46=29 REMAP_PORT_45=30 REMAP_PORT_44=31 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=12 REMAP_PORT_50=13 REMAP_PORT_49=14 REMAP_PORT_48=15 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=8 REMAP_PORT_54=9 REMAP_PORT_53=10 REMAP_PORT_52=11 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=4 REMAP_PORT_58=5 REMAP_PORT_57=6 REMAP_PORT_56=7 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0 REMAP_PORT_62=1 REMAP_PORT_61=2 REMAP_PORT_60=3 + +led 1 auto on +led 1 start diff --git a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/plugins/eeprom.py b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/plugins/eeprom.py new file mode 100644 index 00000000000..4f919ccd727 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +############################################################################# +# Ingrasys S8810-32Q +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + i2c_bus = "12" + i2c_addr = "0056" + self.eeprom_path = "/sys/class/i2c-adapter/i2c-" + i2c_bus + "/" + i2c_bus + "-" + i2c_addr + "/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/plugins/psuutil.py b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/plugins/psuutil.py new file mode 100644 index 00000000000..7e69360b040 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/plugins/psuutil.py @@ -0,0 +1,92 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + SYSFS_PSU_DIR = ["/sys/bus/i2c/devices/i2c-3/3-0051", + "/sys/bus/i2c/devices/i2c-4/4-0051"] + + def __init__(self): + PsuBase.__init__(self) + + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psu_pg' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU status + if (attr_value == 1): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + attr_file ='psu_abs' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU presence + if (attr_value == 0): + status = 1 + + return status + diff --git a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/plugins/sfputil.py new file mode 100644 index 00000000000..8d195f644e1 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/plugins/sfputil.py @@ -0,0 +1,183 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +import os + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 31 + PORTS_IN_BLOCK = 32 + + EEPROM_OFFSET = 18 + + ABS_GPIO_BASE = 224 + #INT_GPIO_BASE = 192 + LP_GPIO_BASE = 160 + RST_GPIO_BASE = 128 + GPIO_OFFSET = 0 + + BASE_DIR_PATH = "/sys/class/gpio/gpio{0}/direction" + BASE_VAL_PATH = "/sys/class/gpio/gpio{0}/value" + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def set_gpio_offset(self): + sys_gpio_dir = "/sys/class/gpio" + self.GPIO_OFFSET = 0 + gpiochip_no = 0 + for d in os.listdir(sys_gpio_dir): + if "gpiochip" in d: + try: + gpiochip_no = int(d[8:],10) + except ValueError as e: + print "Error: %s" % str(e) + if gpiochip_no > 255: + self.GPIO_OFFSET=256 + return True + return True + + def update_gpio_base(self): + self.ABS_GPIO_BASE = 224 + self.GPIO_OFFSET + self.LP_GPIO_BASE = 160 + self.GPIO_OFFSET + self.RST_GPIO_BASE = 128 + self.GPIO_OFFSET + return True + + def __init__(self): + # Update abs, lpmode, and reset gpio base + self.set_gpio_offset() + self.update_gpio_base() + + # Override port_to_eeprom_mapping for class initialization + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(self.port_start, self.port_end + 1): + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + abs_device_file = self.BASE_VAL_PATH.format( + port_num + self.ABS_GPIO_BASE) + val_file = open(abs_device_file) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + lpmode_val_device_file = self.BASE_VAL_PATH.format( + port_num + self.LP_GPIO_BASE) + val_file = open(lpmode_val_device_file) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + lpmode_val_device_file = self.BASE_VAL_PATH.format( + port_num + self.LP_GPIO_BASE) + val_file = open(lpmode_val_device_file, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + val_file.write("1" if lpmode is True else "0") + val_file.close() + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reset_val_device_file = self.BASE_VAL_PATH.format( + port_num + self.RST_GPIO_BASE) + val_file = open(reset_val_device_file, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + val_file.write("1") + val_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + try: + reset_val_device_file = self.BASE_VAL_PATH.format( + port_num + self.RST_GPIO_BASE) + val_file = open(reset_val_device_file, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + val_file.write("0") + val_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/sensors.conf b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/sensors.conf new file mode 100644 index 00000000000..8332fbdf908 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8810_32q-r0/sensors.conf @@ -0,0 +1,47 @@ +# libsensors configuration file +chip "i350bb-*" + ignore loc1 + +chip "jc42-*" + label temp1 "DIMM Temp" + set temp1_max 50 + set temp1_crit 85 + +chip "w83795adg-*" + label in0 "ROV" + set in0_min 1.025 * 0.98 + set in0_max 1.025 * 1.02 + ignore in1 + ignore in2 + label in3 "1.0V" + set in3_min 1 * 0.97 + set in3_max 1 * 1.03 + label in4 "1.8V" + set in4_min 1.8 * 0.95 + set in4_max 1.8 * 1.05 + ignore in5 + label in6 "5.0V" + compute in6 (4)*@, @/(4) + set in6_min 5 * 0.95 + set in6_max 5 * 1.05 + ignore in7 + label in12 "3.3V" + compute in6 (2)*@, @/(2) + set in12_min 3.3 * 0.97 + set in12_max 3.3 * 1.03 + ignore in14 + ignore in15 + ignore in16 + label fan1 "FANTRAY 1-A" + label fan2 "FANTRAY 1-B" + label fan3 "FANTRAY 2-A" + label fan4 "FANTRAY 2-B" + label fan5 "FANTRAY 3-A" + label fan6 "FANTRAY 3-B" + label fan7 "FANTRAY 4-A" + label fan8 "FANTRAY 4-B" + label temp1 "MAC Temp" + label temp2 "SFP+ Port 1 Temp" + label temp3 "SFP+ Port 8 Temp" + ignore temp4 + ignore intrusion0 diff --git a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/INGRASYS-S8900-54XC/port_config.ini b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/INGRASYS-S8900-54XC/port_config.ini new file mode 100644 index 00000000000..079bb63455f --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/INGRASYS-S8900-54XC/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias index +Ethernet0 1 Ethernet1/1 0 +Ethernet1 2 Ethernet2/1 1 +Ethernet2 3 Ethernet3/1 2 +Ethernet3 4 Ethernet4/1 3 +Ethernet4 5 Ethernet5/1 4 +Ethernet5 6 Ethernet6/1 5 +Ethernet6 7 Ethernet7/1 6 +Ethernet7 8 Ethernet8/1 7 +Ethernet8 9 Ethernet9/1 8 +Ethernet9 10 Ethernet10/1 9 +Ethernet10 11 Ethernet11/1 10 +Ethernet11 12 Ethernet12/1 11 +Ethernet12 21 Ethernet13/1 12 +Ethernet13 22 Ethernet14/1 13 +Ethernet14 23 Ethernet15/1 14 +Ethernet15 24 Ethernet16/1 15 +Ethernet16 33 Ethernet17/1 16 +Ethernet17 34 Ethernet18/1 17 +Ethernet18 35 Ethernet19/1 18 +Ethernet19 36 Ethernet20/1 19 +Ethernet20 37 Ethernet21/1 20 +Ethernet21 38 Ethernet22/1 21 +Ethernet22 39 Ethernet23/1 22 +Ethernet23 40 Ethernet24/1 23 +Ethernet24 41 Ethernet25/1 24 +Ethernet25 42 Ethernet26/1 25 +Ethernet26 43 Ethernet27/1 26 +Ethernet27 44 Ethernet28/1 27 +Ethernet28 49 Ethernet29/1 28 +Ethernet29 50 Ethernet30/1 29 +Ethernet30 51 Ethernet31/1 30 +Ethernet31 52 Ethernet32/1 31 +Ethernet32 53 Ethernet33/1 32 +Ethernet33 54 Ethernet34/1 33 +Ethernet34 55 Ethernet35/1 34 +Ethernet35 56 Ethernet36/1 35 +Ethernet36 65 Ethernet37/1 36 +Ethernet37 66 Ethernet38/1 37 +Ethernet38 67 Ethernet39/1 38 +Ethernet39 68 Ethernet40/1 39 +Ethernet40 69 Ethernet41/1 40 +Ethernet41 70 Ethernet42/1 41 +Ethernet42 71 Ethernet43/1 42 +Ethernet43 72 Ethernet44/1 43 +Ethernet44 81 Ethernet45/1 44 +Ethernet45 82 Ethernet46/1 45 +Ethernet46 83 Ethernet47/1 46 +Ethernet47 84 Ethernet48/1 47 +Ethernet48 85,86,87,88 Ethernet52/1 48 +Ethernet52 97,98,99,100 Ethernet56/1 49 +Ethernet56 101,102,103,104 Ethernet60/1 50 +Ethernet60 105,106,107,108 Ethernet64/1 51 +Ethernet64 109,110,111,112 Ethernet68/1 52 +Ethernet68 117,118,119,120 Ethernet69/1 53 diff --git a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/INGRASYS-S8900-54XC/sai.profile b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/INGRASYS-S8900-54XC/sai.profile new file mode 100644 index 00000000000..29db3ecd162 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/INGRASYS-S8900-54XC/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-s8900-48x25G+6x100G.config.bcm diff --git a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/INGRASYS-S8900-54XC/th-s8900-48x25G+6x100G.config.bcm b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/INGRASYS-S8900-54XC/th-s8900-48x25G+6x100G.config.bcm new file mode 100644 index 00000000000..4485a77af2d --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/INGRASYS-S8900-54XC/th-s8900-48x25G+6x100G.config.bcm @@ -0,0 +1,340 @@ +#2018/03/31 + +os=unix + +oversubscribe_mode=1 +pbmp_xport_xe=0x7f00001fff4003ffffc0001fffe + +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 +l3_mem_entries=40960 +l2_mem_entries=40960 + +l2xmsg_mode=1 +mmu_lossless=0 + +#Parity +parity_correction=1 +parity_enable=1 + +#PIPE0 +portmap_1=1:25 +portmap_2=2:25 +portmap_3=3:25 +portmap_4=4:25 +portmap_5=5:25 +portmap_6=6:25 +portmap_7=7:25 +portmap_8=8:25 +portmap_9=9:25 +portmap_10=10:25 +portmap_11=11:25 +portmap_12=12:25 +portmap_13=21:25 +portmap_14=22:25 +portmap_15=23:25 +portmap_16=24:25 + +#PIPE1 +portmap_34=33:25 +portmap_35=34:25 +portmap_36=35:25 +portmap_37=36:25 +portmap_38=37:25 +portmap_39=38:25 +portmap_40=39:25 +portmap_41=40:25 +portmap_42=41:25 +portmap_43=42:25 +portmap_44=43:25 +portmap_45=44:25 +portmap_46=49:25 +portmap_47=50:25 +portmap_48=51:25 +portmap_49=52:25 +portmap_50=53:25 +portmap_51=54:25 +portmap_52=55:25 +portmap_53=56:25 + +#PIPE2 +portmap_68=65:25 +portmap_69=66:25 +portmap_70=67:25 +portmap_71=68:25 +portmap_72=69:25 +portmap_73=70:25 +portmap_74=71:25 +portmap_75=72:25 +portmap_76=81:25 +portmap_77=82:25 +portmap_78=83:25 +portmap_79=84:25 +portmap_80=85:100 + +#PIPE3 +portmap_102=97:100 +portmap_103=101:100 +portmap_104=105:100 +portmap_105=109:100 +portmap_106=117:100 + + +portmap_66=129:10 +portmap_100=131:10 +portmap_33=132:10 +portmap_67=133:10 +portmap_101=134:10 +portmap_135=135:10 + +serdes_driver_current_xe0=0xF +serdes_preemphasis_xe0=0x3E3200 +serdes_if_type_xe0=14 + +serdes_driver_current_xe1=0xF +serdes_preemphasis_xe1=0x3A3600 +serdes_if_type_xe1=14 + +serdes_driver_current_xe2=0xF +serdes_preemphasis_xe2=0x3A3600 +serdes_if_type_xe2=14 + +serdes_driver_current_xe3=0xF +serdes_preemphasis_xe3=0x383800 +serdes_if_type_xe3=14 + +serdes_driver_current_xe4=0xF +serdes_preemphasis_xe4=0x373900 +serdes_if_type_xe4=14 + +serdes_driver_current_xe5=0xF +serdes_preemphasis_xe5=0x2E4200 +serdes_if_type_xe5=14 + +serdes_driver_current_xe6=0xF +serdes_preemphasis_xe6=0x333D00 +serdes_if_type_xe6=14 + +serdes_driver_current_xe7=0xC +serdes_preemphasis_xe7=0x304000 +serdes_if_type_xe7=14 + +serdes_driver_current_xe8=0xE +serdes_preemphasis_xe8=0x2F4300 +serdes_if_type_xe8=14 + +serdes_driver_current_xe9=0xC +serdes_preemphasis_xe9=0x2D4300 +serdes_if_type_xe9=14 + +serdes_driver_current_xe10=0xC +serdes_preemphasis_xe10=0x2C4400 +serdes_if_type_xe10=14 + +serdes_driver_current_xe11=0xC +serdes_preemphasis_xe11=0x2D4300 +serdes_if_type_xe11=14 + +serdes_driver_current_xe12=0xC +serdes_preemphasis_xe12=0x294700 +serdes_if_type_xe12=14 + +serdes_driver_current_xe13=0xC +serdes_preemphasis_xe13=0x284800 +serdes_if_type_xe13=14 + +serdes_driver_current_xe14=0xA +serdes_preemphasis_xe14=0x294700 +serdes_if_type_xe14=14 + +serdes_driver_current_xe15=0xF +serdes_preemphasis_xe15=0x294700 +serdes_if_type_xe15=14 + +serdes_driver_current_xe16=0x9 +serdes_preemphasis_xe16=0x185800 +serdes_if_type_xe16=14 + +serdes_driver_current_xe17=0x9 +serdes_preemphasis_xe17=0x1D5300 +serdes_if_type_xe17=14 + +serdes_driver_current_xe18=0x9 +serdes_preemphasis_xe18=0x1C5400 +serdes_if_type_xe18=14 + +serdes_driver_current_xe19=0x9 +serdes_preemphasis_xe19=0x1C5400 +serdes_if_type_xe19=14 + +serdes_driver_current_xe20=0x9 +serdes_preemphasis_xe20=0x1C5400 +serdes_if_type_xe20=14 + +serdes_driver_current_xe21=0x9 +serdes_preemphasis_xe21=0x1C5400 +serdes_if_type_xe21=14 + +serdes_driver_current_xe22=0x9 +serdes_preemphasis_xe22=0x1C5400 +serdes_if_type_xe22=14 + +serdes_driver_current_xe23=0x9 +serdes_preemphasis_xe23=0x1C5400 +serdes_if_type_xe23=14 + +serdes_driver_current_xe24=0x8 +serdes_preemphasis_xe24=0x1C5400 +serdes_if_type_xe24=14 + +serdes_driver_current_xe25=0x8 +serdes_preemphasis_xe25=0x1C5400 +serdes_if_type_xe25=14 + +serdes_driver_current_xe26=0x8 +serdes_preemphasis_xe26=0x185800 +serdes_if_type_xe26=14 + +serdes_driver_current_xe27=0x8 +serdes_preemphasis_xe27=0x185800 +serdes_if_type_xe27=14 + +serdes_driver_current_xe28=0x8 +serdes_preemphasis_xe28=0x145C00 +serdes_if_type_xe28=14 + +serdes_driver_current_xe29=0x8 +serdes_preemphasis_xe29=0x195700 +serdes_if_type_xe29=14 + +serdes_driver_current_xe30=0x8 +serdes_preemphasis_xe30=0x195700 +serdes_if_type_xe30=14 + +serdes_driver_current_xe31=0x8 +serdes_preemphasis_xe31=0x195700 +serdes_if_type_xe31=14 + +serdes_driver_current_xe32=0xC +serdes_preemphasis_xe32=0x195700 +serdes_if_type_xe32=14 + +serdes_driver_current_xe33=0x9 +serdes_preemphasis_xe33=0x205000 +serdes_if_type_xe33=14 + +serdes_driver_current_xe34=0xC +serdes_preemphasis_xe34=0x214F00 +serdes_if_type_xe34=14 + +serdes_driver_current_xe35=0xC +serdes_preemphasis_xe35=0x244C00 +serdes_if_type_xe35=14 + +serdes_driver_current_xe36=0xC +serdes_preemphasis_xe36=0x244C00 +serdes_if_type_xe36=14 + +serdes_driver_current_xe37=0xC +serdes_preemphasis_xe37=0x244C00 +serdes_if_type_xe37=14 + +serdes_driver_current_xe38=0xC +serdes_preemphasis_xe38=0x244C00 +serdes_if_type_xe38=14 + +serdes_driver_current_xe39=0xC +serdes_preemphasis_xe39=0x244C00 +serdes_if_type_xe39=14 + +serdes_driver_current_xe40=0xD +serdes_preemphasis_xe40=0x284800 +serdes_if_type_xe40=14 + +serdes_driver_current_xe41=0xC +serdes_preemphasis_xe41=0x284800 +serdes_if_type_xe41=14 + +serdes_driver_current_xe42=0xE +serdes_preemphasis_xe42=0x294700 +serdes_if_type_xe42=14 + +serdes_driver_current_xe43=0xE +serdes_preemphasis_xe43=0x294700 +serdes_if_type_xe43=14 + +serdes_driver_current_xe44=0xE +serdes_preemphasis_xe44=0x294700 +serdes_if_type_xe44=14 + +serdes_driver_current_xe45=0xF +serdes_preemphasis_xe45=0x284800 +serdes_if_type_xe45=14 + +serdes_driver_current_xe46=0xF +serdes_preemphasis_xe46=0x284800 +serdes_if_type_xe46=14 + +serdes_driver_current_xe47=0xF +serdes_preemphasis_xe47=0x304000 +serdes_if_type_xe47=14 + +serdes_driver_current_lane0_ce0=0xC +serdes_driver_current_lane1_ce0=0xC +serdes_driver_current_lane2_ce0=0xF +serdes_driver_current_lane3_ce0=0xC +serdes_preemphasis_lane0_ce0=0x284800 +serdes_preemphasis_lane1_ce0=0x294100 +serdes_preemphasis_lane2_ce0=0x294100 +serdes_preemphasis_lane3_ce0=0x294100 +serdes_if_type_ce0=14 + +serdes_driver_current_lane0_ce1=0xC +serdes_driver_current_lane1_ce1=0xF +serdes_driver_current_lane2_ce1=0xC +serdes_driver_current_lane3_ce1=0xC +serdes_preemphasis_lane0_ce1=0x284200 +serdes_preemphasis_lane1_ce1=0x3A3600 +serdes_preemphasis_lane2_ce1=0x2C4400 +serdes_preemphasis_lane3_ce1=0x2C4400 +serdes_if_type_ce1=14 + +serdes_driver_current_lane0_ce2=0xC +serdes_driver_current_lane1_ce2=0xC +serdes_driver_current_lane2_ce2=0xC +serdes_driver_current_lane3_ce2=0xC +serdes_preemphasis_lane0_ce2=0x2F4100 +serdes_preemphasis_lane1_ce2=0x383800 +serdes_preemphasis_lane2_ce2=0x2F4100 +serdes_preemphasis_lane3_ce2=0x304000 +serdes_if_type_ce2=14 + +serdes_driver_current_lane0_ce3=0xC +serdes_driver_current_lane1_ce3=0xF +serdes_driver_current_lane2_ce3=0xC +serdes_driver_current_lane3_ce3=0xA +serdes_preemphasis_lane0_ce3=0x304000 +serdes_preemphasis_lane1_ce3=0x3F3100 +serdes_preemphasis_lane2_ce3=0x313F00 +serdes_preemphasis_lane3_ce3=0x304000 +serdes_if_type_ce3=14 + +serdes_driver_current_lane0_ce4=0xC +serdes_driver_current_lane1_ce4=0xF +serdes_driver_current_lane2_ce4=0xC +serdes_driver_current_lane3_ce4=0xC +serdes_preemphasis_lane0_ce4=0x304000 +serdes_preemphasis_lane1_ce4=0x313F00 +serdes_preemphasis_lane2_ce4=0x2F4100 +serdes_preemphasis_lane3_ce4=0x2E4200 +serdes_if_type_ce4=14 + +serdes_driver_current_lane0_ce5=0xE +serdes_driver_current_lane1_ce5=0xF +serdes_driver_current_lane2_ce5=0xF +serdes_driver_current_lane3_ce5=0xF +serdes_preemphasis_lane0_ce5=0x304000 +serdes_preemphasis_lane1_ce5=0x3F3100 +serdes_preemphasis_lane2_ce5=0x383800 +serdes_preemphasis_lane3_ce5=0x3F3100 +serdes_if_type_ce5=14 diff --git a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/default_sku new file mode 100644 index 00000000000..ba80569555d --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S8900-54XC t1 diff --git a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/fancontrol b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/fancontrol new file mode 100644 index 00000000000..e1f88f6b79c --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH=hwmon1=devices/pci0000:00/0000:00:1f.3/i2c-0/0-002f +DEVNAME=hwmon1=w83795adg +FCTEMPS=hwmon1/device/pwm2=hwmon1/device/temp2_input hwmon1/device/pwm1=hwmon1/device/temp2_input +FCFANS=hwmon1/device/pwm2=hwmon1/device/fan8_input hwmon1/device/pwm2=hwmon1/device/fan7_input hwmon1/device/pwm2=hwmon1/device/fan6_input hwmon1/device/pwm2=hwmon1/device/fan5_input hwmon1/device/pwm1=hwmon1/device/fan4_input hwmon1/device/pwm1=hwmon1/device/fan3_input hwmon1/device/pwm1=hwmon1/device/fan2_input hwmon1/device/pwm1=hwmon1/device/fan1_input +MINTEMP=hwmon1/device/pwm2=20 hwmon1/device/pwm1=20 +MAXTEMP=hwmon1/device/pwm2=60 hwmon1/device/pwm1=60 +MINSTART=hwmon1/device/pwm2=75 hwmon1/device/pwm1=75 +MINSTOP=hwmon1/device/pwm2=22 hwmon1/device/pwm1=22 diff --git a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/installer.conf b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/led_proc_init.soc b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/led_proc_init.soc new file mode 100644 index 00000000000..8eef1389abc --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/led_proc_init.soc @@ -0,0 +1,43 @@ +# LED microprocessor initialization for Ingrasys S8900-54XC + +led 0 stop +led 0 prog 12 00 61 F1 12 10 61 F2 12 01 61 F3 12 01 61 F4 67 28 12 10 61 F1 12 05 61 F2 12 04 61 F3 12 04 61 F4 67 28 86 F0 77 86 96 F2 2E F1 67 3D 67 51 16 F3 FE F1 61 F1 12 00 DE F2 74 28 57 2E F1 32 00 32 01 B7 97 75 4C 02 01 60 FE 57 02 00 60 FE 57 2E F1 32 08 97 75 6A 77 5A 06 FE D2 01 70 62 77 78 06 F0 C2 08 74 6A 77 78 16 F4 91 22 0E 87 22 0E 87 DA 00 74 6C 57 16 F4 91 22 0E 87 22 0F 87 DA 00 74 7A 57 02 48 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=36 REMAP_PORT_2=37 REMAP_PORT_1=38 REMAP_PORT_0=39 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=40 REMAP_PORT_6=41 REMAP_PORT_5=42 REMAP_PORT_4=43 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=12 REMAP_PORT_10=13 REMAP_PORT_9=14 REMAP_PORT_8=15 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=44 REMAP_PORT_14=45 REMAP_PORT_13=46 REMAP_PORT_12=47 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=48 REMAP_PORT_18=49 REMAP_PORT_17=50 REMAP_PORT_16=51 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=8 REMAP_PORT_22=9 REMAP_PORT_21=10 REMAP_PORT_20=11 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=4 REMAP_PORT_26=5 REMAP_PORT_25=6 REMAP_PORT_24=7 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=0 REMAP_PORT_30=1 REMAP_PORT_29=2 REMAP_PORT_28=3 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=52 REMAP_PORT_34=53 REMAP_PORT_33=54 REMAP_PORT_32=55 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=56 REMAP_PORT_38=57 REMAP_PORT_37=58 REMAP_PORT_36=59 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=32 REMAP_PORT_42=33 REMAP_PORT_41=34 REMAP_PORT_40=35 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=59 REMAP_PORT_46=60 REMAP_PORT_45=61 REMAP_PORT_44=62 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=28 REMAP_PORT_50=29 REMAP_PORT_49=30 REMAP_PORT_48=31 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=24 REMAP_PORT_54=25 REMAP_PORT_53=26 REMAP_PORT_52=27 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=20 REMAP_PORT_58=21 REMAP_PORT_57=22 REMAP_PORT_56=23 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=16 REMAP_PORT_62=17 REMAP_PORT_61=18 REMAP_PORT_60=19 +led 0 auto on +led 0 start + +led 1 stop +led 1 prog 12 00 61 F1 12 20 61 F2 12 01 61 F3 12 01 61 F4 67 28 12 20 61 F1 12 01 61 F2 12 04 61 F3 12 04 61 F4 67 28 86 F0 77 86 96 F2 2E F1 67 3D 67 51 16 F3 FE F1 61 F1 12 00 DE F2 74 28 57 2E F1 32 00 32 01 B7 97 75 4C 02 01 60 FE 57 02 00 60 FE 57 2E F1 32 08 97 75 6A 77 5A 06 FE D2 01 70 62 77 78 06 F0 C2 08 74 6A 77 78 16 F4 91 22 0E 87 22 0E 87 DA 00 74 6C 57 16 F4 91 22 0E 87 22 0F 87 DA 00 74 7A 57 02 48 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0 REMAP_PORT_2=1 REMAP_PORT_1=2 REMAP_PORT_0=3 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=4 REMAP_PORT_6=5 REMAP_PORT_5=6 REMAP_PORT_4=7 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=8 REMAP_PORT_10=9 REMAP_PORT_9=10 REMAP_PORT_8=11 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=36 REMAP_PORT_14=37 REMAP_PORT_13=38 REMAP_PORT_12=39 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=12 REMAP_PORT_18=13 REMAP_PORT_17=14 REMAP_PORT_16=15 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=16 REMAP_PORT_22=17 REMAP_PORT_21=18 REMAP_PORT_20=19 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=40 REMAP_PORT_26=41 REMAP_PORT_25=42 REMAP_PORT_24=43 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=44 REMAP_PORT_30=45 REMAP_PORT_29=46 REMAP_PORT_28=47 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=20 REMAP_PORT_34=21 REMAP_PORT_33=22 REMAP_PORT_32=23 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=24 REMAP_PORT_38=25 REMAP_PORT_37=26 REMAP_PORT_36=27 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=48 REMAP_PORT_42=49 REMAP_PORT_41=50 REMAP_PORT_40=51 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=52 REMAP_PORT_46=53 REMAP_PORT_45=54 REMAP_PORT_44=55 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=28 REMAP_PORT_50=29 REMAP_PORT_49=30 REMAP_PORT_48=31 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=32 REMAP_PORT_54=33 REMAP_PORT_53=34 REMAP_PORT_52=35 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=56 REMAP_PORT_58=57 REMAP_PORT_57=58 REMAP_PORT_56=59 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=60 REMAP_PORT_62=61 REMAP_PORT_61=62 REMAP_PORT_60=63 +led 1 auto on +led 1 start diff --git a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/plugins/eeprom.py b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/plugins/eeprom.py new file mode 100644 index 00000000000..414ff38221b --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Dell Z9100 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-17/17-0054/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/plugins/psuutil.py b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/plugins/psuutil.py new file mode 100644 index 00000000000..4f226c69fff --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/plugins/psuutil.py @@ -0,0 +1,92 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + PSU_CPLD_DIR = "/sys/bus/i2c/devices/0-0033" + + def __init__(self): + PsuBase.__init__(self) + + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + mask = [ 0x08, 0x10 ] + attr_file = 'cpld_pw_good' + attr_path = self.PSU_CPLD_DIR +'/'+ attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU status + if (attr_value & mask[index-1]): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + mask = [ 0x01, 0x02 ] + attr_file ='cpld_pw_abs' + attr_path = self.PSU_CPLD_DIR +'/'+ attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU presence + if (~attr_value & mask[index-1]): + status = 1 + + return status + diff --git a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/plugins/sfputil.py new file mode 100644 index 00000000000..586e6e18974 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/plugins/sfputil.py @@ -0,0 +1,321 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +import os + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 53 + QSFP_PORT_START = 48 + PORTS_IN_BLOCK = 54 + GPIO_OFFSET = 0 + + BASE_DIR_PATH = "/sys/class/gpio/gpio{0}/direction" + BASE_VAL_PATH = "/sys/class/gpio/gpio{0}/value" + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0: 18, + 1: 19, + 2: 20, + 3: 21, + 4: 22, + 5: 23, + 6: 24, + 7: 25, + 8: 26, + 9: 27, + 10: 28, + 11: 29, + 12: 30, + 13: 31, + 14: 32, + 15: 33, + 16: 34, + 17: 35, + 18: 36, + 19: 37, + 20: 38, + 21: 39, + 22: 40, + 23: 41, + 24: 42, + 25: 43, + 26: 44, + 27: 45, + 28: 46, + 29: 47, + 30: 48, + 31: 49, + 32: 50, + 33: 51, + 34: 52, + 35: 53, + 36: 54, + 37: 55, + 38: 56, + 39: 57, + 40: 58, + 41: 59, + 42: 60, + 43: 61, + 44: 62, + 45: 63, + 46: 64, + 47: 65, + 48: 66, + 49: 67, + 50: 68, + 51: 69, + 52: 70, + 53: 71 + } + + abs_to_gpio_mapping = {} + lpmode_to_gpio_mapping = {} + reset_to_gpio_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def set_gpio_offset(self): + sys_gpio_dir = "/sys/class/gpio" + self.GPIO_OFFSET = 0 + gpiochip_no = 0 + for d in os.listdir(sys_gpio_dir): + if "gpiochip" in d: + try: + gpiochip_no = int(d[8:],10) + except ValueError as e: + print "Error: %s" % str(e) + if gpiochip_no > 255: + self.GPIO_OFFSET=256 + return True + return True + + def init_abs_to_gpio_mapping(self): + self.abs_to_gpio_mapping = { + 0: 192+self.GPIO_OFFSET, + 1: 193+self.GPIO_OFFSET, + 2: 194+self.GPIO_OFFSET, + 3: 195+self.GPIO_OFFSET, + 4: 196+self.GPIO_OFFSET, + 5: 197+self.GPIO_OFFSET, + 6: 198+self.GPIO_OFFSET, + 7: 199+self.GPIO_OFFSET, + 8: 200+self.GPIO_OFFSET, + 9: 201+self.GPIO_OFFSET, + 10: 202+self.GPIO_OFFSET, + 11: 203+self.GPIO_OFFSET, + 12: 204+self.GPIO_OFFSET, + 13: 205+self.GPIO_OFFSET, + 14: 206+self.GPIO_OFFSET, + 15: 207+self.GPIO_OFFSET, + 16: 176+self.GPIO_OFFSET, + 17: 177+self.GPIO_OFFSET, + 18: 178+self.GPIO_OFFSET, + 19: 179+self.GPIO_OFFSET, + 20: 180+self.GPIO_OFFSET, + 21: 181+self.GPIO_OFFSET, + 22: 182+self.GPIO_OFFSET, + 23: 183+self.GPIO_OFFSET, + 24: 184+self.GPIO_OFFSET, + 25: 185+self.GPIO_OFFSET, + 26: 186+self.GPIO_OFFSET, + 27: 187+self.GPIO_OFFSET, + 28: 188+self.GPIO_OFFSET, + 29: 189+self.GPIO_OFFSET, + 30: 190+self.GPIO_OFFSET, + 31: 191+self.GPIO_OFFSET, + 32: 160+self.GPIO_OFFSET, + 33: 161+self.GPIO_OFFSET, + 34: 162+self.GPIO_OFFSET, + 35: 163+self.GPIO_OFFSET, + 36: 164+self.GPIO_OFFSET, + 37: 165+self.GPIO_OFFSET, + 38: 166+self.GPIO_OFFSET, + 39: 167+self.GPIO_OFFSET, + 40: 168+self.GPIO_OFFSET, + 41: 169+self.GPIO_OFFSET, + 42: 170+self.GPIO_OFFSET, + 43: 171+self.GPIO_OFFSET, + 44: 172+self.GPIO_OFFSET, + 45: 173+self.GPIO_OFFSET, + 46: 174+self.GPIO_OFFSET, + 47: 175+self.GPIO_OFFSET, + 48: 240+self.GPIO_OFFSET, + 49: 241+self.GPIO_OFFSET, + 50: 242+self.GPIO_OFFSET, + 51: 243+self.GPIO_OFFSET, + 52: 244+self.GPIO_OFFSET, + 53: 245+self.GPIO_OFFSET + } + return True + + def init_lpmode_to_gpio_mapping(self): + self.lpmode_to_gpio_mapping = { + 48: 224+self.GPIO_OFFSET, + 49: 225+self.GPIO_OFFSET, + 50: 226+self.GPIO_OFFSET, + 51: 227+self.GPIO_OFFSET, + 52: 228+self.GPIO_OFFSET, + 53: 229+self.GPIO_OFFSET + } + return True + + def init_reset_to_gpio_mapping(self): + self.reset_to_gpio_mapping = { + 48: 208+self.GPIO_OFFSET, + 49: 209+self.GPIO_OFFSET, + 50: 210+self.GPIO_OFFSET, + 51: 211+self.GPIO_OFFSET, + 52: 212+self.GPIO_OFFSET, + 53: 213+self.GPIO_OFFSET + } + return True + + def __init__(self): + # Init abs, lpmode, and reset to gpio mapping + self.set_gpio_offset() + self.init_abs_to_gpio_mapping() + self.init_lpmode_to_gpio_mapping() + self.init_reset_to_gpio_mapping() + + # Override port_to_eeprom_mapping for class initialization + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(self.port_start, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + abs_device_file = self.BASE_VAL_PATH.format( + self.abs_to_gpio_mapping[port_num]) + val_file = open(abs_device_file) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.port_end: + return False + + try: + lpmode_val_device_file = self.BASE_VAL_PATH.format( + self.lpmode_to_gpio_mapping[port_num]) + val_file = open(lpmode_val_device_file) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.port_end: + return False + + try: + lpmode_val_device_file = self.BASE_VAL_PATH.format( + self.lpmode_to_gpio_mapping[port_num]) + val_file = open(lpmode_val_device_file, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + val_file.write("1" if lpmode is True else "0") + val_file.close() + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.port_end: + print "Error: unable to reset non-QSFP module: port %s" % str(port_num) + return False + + try: + print "port %s" % str(port_num) + reset_val_device_file = self.BASE_VAL_PATH.format( + self.reset_to_gpio_mapping[port_num]) + val_file = open(reset_val_device_file, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + val_file.write("1") + val_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + try: + reset_val_device_file = self.BASE_VAL_PATH.format( + self.reset_to_gpio_mapping[port_num]) + val_file = open(reset_val_device_file, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + val_file.write("0") + val_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/sensors.conf b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/sensors.conf new file mode 100644 index 00000000000..88a474a0674 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_54xc-r0/sensors.conf @@ -0,0 +1,39 @@ +# libsensors configuration file +chip "i350bb-*" + ignore loc1 + +chip "jc42-*" + label temp1 "DIMM Temp" + set temp1_max 50 + set temp1_crit 85 + +chip "w83795adg-*" + label in0 "1.0V" + label in1 "1.0V_ROV" + label in2 "1.25V" + label in3 "1.8V" + ignore in4 + ignore in5 + ignore in6 + ignore in7 + label in12 "+3.3V" + ignore in14 + ignore in15 + ignore in16 + label fan1 "FANTRAY 1-A" + label fan2 "FANTRAY 1-B" + label fan3 "FANTRAY 2-A" + label fan4 "FANTRAY 2-B" + label fan5 "FANTRAY 3-A" + label fan6 "FANTRAY 3-B" + label fan7 "FANTRAY 4-A" + label fan8 "FANTRAY 4-B" + label temp1 "Front MAC Temp" + set temp1_max 70 + set temp1_crit 80 + label temp2 "Rear MAC Temp" + set temp1_max 70 + set temp1_crit 80 + ignore temp3 + ignore temp4 + ignore intrusion0 diff --git a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/INGRASYS-S8900-64XC/port_config.ini b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/INGRASYS-S8900-64XC/port_config.ini new file mode 100644 index 00000000000..385056e6e8f --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/INGRASYS-S8900-64XC/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias index +Ethernet0 17 Ethernet1/1 0 +Ethernet1 18 Ethernet2/1 1 +Ethernet2 19 Ethernet3/1 2 +Ethernet3 20 Ethernet4/1 3 +Ethernet4 24 Ethernet5/1 4 +Ethernet5 23 Ethernet6/1 5 +Ethernet6 22 Ethernet7/1 6 +Ethernet7 21 Ethernet8/1 7 +Ethernet8 28 Ethernet9/1 8 +Ethernet9 27 Ethernet10/1 9 +Ethernet10 26 Ethernet11/1 10 +Ethernet11 25 Ethernet12/1 11 +Ethernet12 32 Ethernet13/1 12 +Ethernet13 31 Ethernet14/1 13 +Ethernet14 30 Ethernet15/1 14 +Ethernet15 29 Ethernet16/1 15 +Ethernet16 1 Ethernet17/1 16 +Ethernet17 2 Ethernet18/1 17 +Ethernet18 3 Ethernet19/1 18 +Ethernet19 4 Ethernet20/1 19 +Ethernet20 8 Ethernet21/1 20 +Ethernet21 7 Ethernet22/1 21 +Ethernet22 6 Ethernet23/1 22 +Ethernet23 5 Ethernet24/1 23 +Ethernet24 12 Ethernet25/1 24 +Ethernet25 11 Ethernet26/1 25 +Ethernet26 10 Ethernet27/1 26 +Ethernet27 9 Ethernet28/1 27 +Ethernet28 13 Ethernet29/1 28 +Ethernet29 14 Ethernet30/1 29 +Ethernet30 15 Ethernet31/1 30 +Ethernet31 16 Ethernet32/1 31 +Ethernet32 33 Ethernet33/1 32 +Ethernet33 34 Ethernet34/1 33 +Ethernet34 35 Ethernet35/1 34 +Ethernet35 36 Ethernet36/1 35 +Ethernet36 38 Ethernet37/1 36 +Ethernet37 39 Ethernet38/1 37 +Ethernet38 40 Ethernet39/1 38 +Ethernet39 37 Ethernet40/1 39 +Ethernet40 41 Ethernet41/1 40 +Ethernet41 42 Ethernet42/1 41 +Ethernet42 43 Ethernet43/1 42 +Ethernet43 44 Ethernet44/1 43 +Ethernet44 48 Ethernet45/1 44 +Ethernet45 45 Ethernet46/1 45 +Ethernet46 46 Ethernet47/1 46 +Ethernet47 47 Ethernet48/1 47 +Ethernet48 49,50,51,52 Ethernet49/1 48 +Ethernet52 53,54,55,56 Ethernet50/1 49 +Ethernet56 57,58,59,60 Ethernet51/1 50 +Ethernet60 61,62,63,64 Ethernet52/1 51 +Ethernet64 65,66,67,68 Ethernet53/1 52 +Ethernet68 69,70,71,72 Ethernet54/1 53 +Ethernet72 73,74,75,76 Ethernet55/1 54 +Ethernet76 77,78,79,80 Ethernet56/1 55 +Ethernet80 81,82,83,84 Ethernet57/1 56 +Ethernet84 85,86,87,88 Ethernet58/1 57 +Ethernet88 89,90,91,92 Ethernet59/1 58 +Ethernet92 93,94,95,96 Ethernet60/1 59 +Ethernet96 97,98,99,100 Ethernet61/1 60 +Ethernet100 101,102,103,104 Ethernet62/1 61 +Ethernet104 105,106,107,108 Ethernet63/1 62 +Ethernet108 109,110,111,112 Ethernet64/1 63 diff --git a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/INGRASYS-S8900-64XC/sai.profile b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/INGRASYS-S8900-64XC/sai.profile new file mode 100644 index 00000000000..77a0e3efa43 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/INGRASYS-S8900-64XC/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-s8900-48x25G+16x100G.config.bcm diff --git a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/INGRASYS-S8900-64XC/th-s8900-48x25G+16x100G.config.bcm b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/INGRASYS-S8900-64XC/th-s8900-48x25G+16x100G.config.bcm new file mode 100644 index 00000000000..f30d4ea6dd3 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/INGRASYS-S8900-64XC/th-s8900-48x25G+16x100G.config.bcm @@ -0,0 +1,448 @@ +#2018/03/31 + +os=unix + +oversubscribe_mode=1 +pbmp_xport_xe=0x3c000000ff0003ffffdfffffffe + +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 +l3_mem_entries=40960 +l2_mem_entries=40960 + +l2xmsg_mode=1 +mmu_lossless=0 + +#Parity +parity_correction=1 +parity_enable=1 + +#PIPE0 +portmap_1=17:25 +portmap_2=18:25 +portmap_3=19:25 +portmap_4=20:25 +portmap_5=24:25 +portmap_6=23:25 +portmap_7=22:25 +portmap_8=21:25 +portmap_9=28:25 +portmap_10=27:25 +portmap_11=26:25 +portmap_12=25:25 +portmap_13=32:25 +portmap_14=31:25 +portmap_15=30:25 +portmap_16=29:25 +portmap_17=1:25 +portmap_18=2:25 +portmap_19=3:25 +portmap_20=4:25 +portmap_21=8:25 +portmap_22=7:25 +portmap_23=6:25 +portmap_24=5:25 +portmap_25=12:25 +portmap_26=11:25 +portmap_27=10:25 +portmap_28=9:25 +portmap_29=13:25 +portmap_30=14:25 +portmap_31=15:25 +portmap_32=16:25 + +#PIPE1 +portmap_34=33:25 +portmap_35=34:25 +portmap_36=35:25 +portmap_37=36:25 +portmap_38=38:25 +portmap_39=39:25 +portmap_40=40:25 +portmap_41=37:25 +portmap_42=41:25 +portmap_43=42:25 +portmap_44=43:25 +portmap_45=44:25 +portmap_46=48:25 +portmap_47=45:25 +portmap_48=46:25 +portmap_49=47:25 +portmap_50=49:100 +portmap_51=53:100 +portmap_52=57:100 +portmap_53=61:100 + +#PIPE2 +portmap_68=65:100 +portmap_69=69:100 +portmap_70=73:100 +portmap_71=77:100 +portmap_72=81:100 +portmap_73=85:100 +portmap_74=89:100 +portmap_75=93:100 + +#PIPE3 +portmap_102=97:100 +portmap_103=101:100 +portmap_104=105:100 +portmap_105=109:100 + + +portmap_33=132:10 +portmap_67=133:10 +portmap_101=134:10 +portmap_135=135:10 + +serdes_driver_current_xe0=0xf +serdes_preemphasis_xe0=0x003c14 +serdes_if_type_xe0=14 + +serdes_driver_current_xe1=0xf +serdes_preemphasis_xe1=0x003c1c +serdes_if_type_xe1=14 + +serdes_driver_current_xe2=0xf +serdes_preemphasis_xe2=0x003c08 +serdes_if_type_xe2=14 + +serdes_driver_current_xe3=0xf +serdes_preemphasis_xe3=0x003c08 +serdes_if_type_xe3=14 + +serdes_driver_current_xe4=0xf +serdes_preemphasis_xe4=0x003c08 +serdes_if_type_xe4=14 + +serdes_driver_current_xe5=0xf +serdes_preemphasis_xe5=0x003c10 +serdes_if_type_xe5=14 + +serdes_driver_current_xe6=0xf +serdes_preemphasis_xe6=0x083c08 +serdes_if_type_xe6=14 + +serdes_driver_current_xe7=0xf +serdes_preemphasis_xe7=0x043c10 +serdes_if_type_xe7=14 + +serdes_driver_current_xe8=0x9 +serdes_preemphasis_xe8=0x003c08 +serdes_if_type_xe8=14 + +serdes_driver_current_xe9=0x9 +serdes_preemphasis_xe9=0x003c08 +serdes_if_type_xe9=14 + +serdes_driver_current_xe10=0x9 +serdes_preemphasis_xe10=0x003c08 +serdes_if_type_xe10=14 + +serdes_driver_current_xe11=0x9 +serdes_preemphasis_xe11=0x003c08 +serdes_if_type_xe11=14 + +serdes_driver_current_xe12=0x9 +serdes_preemphasis_xe12=0x2c4408 +serdes_if_type_xe12=14 + +serdes_driver_current_xe13=0x9 +serdes_preemphasis_xe13=0x003c08 +serdes_if_type_xe13=14 + +serdes_driver_current_xe14=0x9 +serdes_preemphasis_xe14=0x003c08 +serdes_if_type_xe14=14 + +serdes_driver_current_xe15=0x9 +serdes_preemphasis_xe15=0x003c08 +serdes_if_type_xe15=14 + +serdes_driver_current_xe16=0xb +serdes_preemphasis_xe16=0x0c3c08 +serdes_if_type_xe16=14 + +serdes_driver_current_xe17=0xb +serdes_preemphasis_xe17=0x0c3c10 +serdes_if_type_xe17=14 + +serdes_driver_current_xe18=0xa +serdes_preemphasis_xe18=0x083c08 +serdes_if_type_xe18=14 + +serdes_driver_current_xe19=0x9 +serdes_preemphasis_xe19=0x0c3c10 +serdes_if_type_xe19=14 + +serdes_driver_current_xe20=0xc +serdes_preemphasis_xe20=0x043c08 +serdes_if_type_xe20=14 + +serdes_driver_current_xe21=0x9 +serdes_preemphasis_xe21=0x083c08 +serdes_if_type_xe21=14 + +serdes_driver_current_xe22=0xc +serdes_preemphasis_xe22=0x083c08 +serdes_if_type_xe22=14 + +serdes_driver_current_xe23=0xa +serdes_preemphasis_xe23=0x083c10 +serdes_if_type_xe23=14 + +serdes_driver_current_xe24=0x9 +serdes_preemphasis_xe24=0x083c08 +serdes_if_type_xe24=14 + +serdes_driver_current_xe25=0x9 +serdes_preemphasis_xe25=0x043c08 +serdes_if_type_xe25=14 + +serdes_driver_current_xe26=0x9 +serdes_preemphasis_xe26=0x003c08 +serdes_if_type_xe26=14 + +serdes_driver_current_xe27=0xc +serdes_preemphasis_xe27=0x083c08 +serdes_if_type_xe27=14 + +serdes_driver_current_xe28=0xa +serdes_preemphasis_xe28=0x003c10 +serdes_if_type_xe28=14 + +serdes_driver_current_xe29=0x9 +serdes_preemphasis_xe29=0x043c10 +serdes_if_type_xe29=14 + +serdes_driver_current_xe30=0x9 +serdes_preemphasis_xe30=0x003c14 +serdes_if_type_xe30=14 + +serdes_driver_current_xe31=0xa +serdes_preemphasis_xe31=0x003c14 +serdes_if_type_xe31=14 + +serdes_driver_current_xe32=0x9 +serdes_preemphasis_xe32=0x003c08 +serdes_if_type_xe32=14 + +serdes_driver_current_xe33=0x7 +serdes_preemphasis_xe33=0x003c08 +serdes_if_type_xe33=14 + +serdes_driver_current_xe34=0x9 +serdes_preemphasis_xe34=0x003c08 +serdes_if_type_xe34=14 + +serdes_driver_current_xe35=0x9 +serdes_preemphasis_xe35=0x003c08 +serdes_if_type_xe35=14 + +serdes_driver_current_xe36=0x9 +serdes_preemphasis_xe36=0x003c08 +serdes_if_type_xe36=14 + +serdes_driver_current_xe37=0x9 +serdes_preemphasis_xe37=0x003c0c +serdes_if_type_xe37=14 + +serdes_driver_current_xe38=0x9 +serdes_preemphasis_xe38=0x003c08 +serdes_if_type_xe38=14 + +serdes_driver_current_xe39=0x9 +serdes_preemphasis_xe39=0x003c08 +serdes_if_type_xe39=14 + +serdes_driver_current_xe40=0xa +serdes_preemphasis_xe40=0x003c10 +serdes_if_type_xe40=14 + +serdes_driver_current_xe41=0x9 +serdes_preemphasis_xe41=0x003c10 +serdes_if_type_xe41=14 + +serdes_driver_current_xe42=0xc +serdes_preemphasis_xe42=0x083c08 +serdes_if_type_xe42=14 + +serdes_driver_current_xe43=0xa +serdes_preemphasis_xe43=0x003c10 +serdes_if_type_xe43=14 + +serdes_driver_current_xe44=0xa +serdes_preemphasis_xe44=0x003c08 +serdes_if_type_xe44=14 + +serdes_driver_current_xe45=0x9 +serdes_preemphasis_xe45=0x003c10 +serdes_if_type_xe45=14 + +serdes_driver_current_xe46=0x9 +serdes_preemphasis_xe46=0x043c08 +serdes_if_type_xe46=14 + +serdes_driver_current_xe47=0xa +serdes_preemphasis_xe47=0x003c08 +serdes_if_type_xe47=14 + +serdes_driver_current_lane0_ce0=0x9 +serdes_driver_current_lane1_ce0=0xf +serdes_driver_current_lane2_ce0=0x9 +serdes_driver_current_lane3_ce0=0x9 +serdes_preemphasis_lane0_ce0=0x003c08 +serdes_preemphasis_lane1_ce0=0x003c08 +serdes_preemphasis_lane2_ce0=0x003c08 +serdes_preemphasis_lane3_ce0=0x003c08 +serdes_if_type_ce0=14 + +serdes_driver_current_lane0_ce1=0x9 +serdes_driver_current_lane1_ce1=0x9 +serdes_driver_current_lane2_ce1=0x9 +serdes_driver_current_lane3_ce1=0xe +serdes_preemphasis_lane0_ce1=0x003c08 +serdes_preemphasis_lane1_ce1=0x003c08 +serdes_preemphasis_lane2_ce1=0x003c08 +serdes_preemphasis_lane3_ce1=0x003c08 +serdes_if_type_ce1=14 + +serdes_driver_current_lane0_ce2=0x9 +serdes_driver_current_lane1_ce2=0xf +serdes_driver_current_lane2_ce2=0x9 +serdes_driver_current_lane3_ce2=0xd +serdes_preemphasis_lane0_ce2=0x003c08 +serdes_preemphasis_lane1_ce2=0x003c08 +serdes_preemphasis_lane2_ce2=0x003c08 +serdes_preemphasis_lane3_ce2=0x003c08 +serdes_if_type_ce2=14 + +serdes_driver_current_lane0_ce3=0x9 +serdes_driver_current_lane1_ce3=0xd +serdes_driver_current_lane2_ce3=0x9 +serdes_driver_current_lane3_ce3=0xd +serdes_preemphasis_lane0_ce3=0x003c08 +serdes_preemphasis_lane1_ce3=0x003c08 +serdes_preemphasis_lane2_ce3=0x003c08 +serdes_preemphasis_lane3_ce3=0x003c08 +serdes_if_type_ce3=14 + +serdes_driver_current_lane0_ce4=0x9 +serdes_driver_current_lane1_ce4=0x9 +serdes_driver_current_lane2_ce4=0x9 +serdes_driver_current_lane3_ce4=0xd +serdes_preemphasis_lane0_ce4=0x003c08 +serdes_preemphasis_lane1_ce4=0x003c08 +serdes_preemphasis_lane2_ce4=0x003c08 +serdes_preemphasis_lane3_ce4=0x003c08 +serdes_if_type_ce4=14 + +serdes_driver_current_lane0_ce5=0x9 +serdes_driver_current_lane1_ce5=0xf +serdes_driver_current_lane2_ce5=0x9 +serdes_driver_current_lane3_ce5=0x9 +serdes_preemphasis_lane0_ce5=0x003c08 +serdes_preemphasis_lane1_ce5=0x003c08 +serdes_preemphasis_lane2_ce5=0x003c08 +serdes_preemphasis_lane3_ce5=0x003c08 +serdes_if_type_ce5=14 + +serdes_driver_current_lane0_ce6=0x9 +serdes_driver_current_lane1_ce6=0x9 +serdes_driver_current_lane2_ce6=0x9 +serdes_driver_current_lane3_ce6=0xe +serdes_preemphasis_lane0_ce6=0x003c08 +serdes_preemphasis_lane1_ce6=0x003c08 +serdes_preemphasis_lane2_ce6=0x003c08 +serdes_preemphasis_lane3_ce6=0x003c08 +serdes_if_type_ce6=14 + +serdes_driver_current_lane0_ce7=0x9 +serdes_driver_current_lane1_ce7=0xa +serdes_driver_current_lane2_ce7=0x9 +serdes_driver_current_lane3_ce7=0Xe +serdes_preemphasis_lane0_ce7=0x003c08 +serdes_preemphasis_lane1_ce7=0x003c08 +serdes_preemphasis_lane2_ce7=0x003c08 +serdes_preemphasis_lane3_ce7=0x003c08 +serdes_if_type_ce7=14 + +serdes_driver_current_lane0_ce8=0xf +serdes_driver_current_lane1_ce8=0xf +serdes_driver_current_lane2_ce8=0xf +serdes_driver_current_lane3_ce8=0xf +serdes_preemphasis_lane0_ce8=0x043c08 +serdes_preemphasis_lane1_ce8=0x003c08 +serdes_preemphasis_lane2_ce8=0x043c08 +serdes_preemphasis_lane3_ce8=0x003c08 +serdes_if_type_ce8=14 + +serdes_driver_current_lane0_ce9=0xf +serdes_driver_current_lane1_ce9=0xf +serdes_driver_current_lane2_ce9=0xf +serdes_driver_current_lane3_ce9=0xf +serdes_preemphasis_lane0_ce9=0x043c08 +serdes_preemphasis_lane1_ce9=0x043c08 +serdes_preemphasis_lane2_ce9=0x043c08 +serdes_preemphasis_lane3_ce9=0x043c08 +serdes_if_type_ce9=14 + +serdes_driver_current_lane0_ce10=0xf +serdes_driver_current_lane1_ce10=0xf +serdes_driver_current_lane2_ce10=0xf +serdes_driver_current_lane3_ce10=0xf +serdes_preemphasis_lane0_ce10=0x043c08 +serdes_preemphasis_lane1_ce10=0x083c10 +serdes_preemphasis_lane2_ce10=0x043c08 +serdes_preemphasis_lane3_ce10=0x043c08 +serdes_if_type_ce10=14 + +serdes_driver_current_lane0_ce11=0xf +serdes_driver_current_lane1_ce11=0xf +serdes_driver_current_lane2_ce11=0xf +serdes_driver_current_lane3_ce11=0xf +serdes_preemphasis_lane0_ce11=0x083c08 +serdes_preemphasis_lane1_ce11=0x043c08 +serdes_preemphasis_lane2_ce11=0X043c08 +serdes_preemphasis_lane3_ce11=0X043c08 +serdes_if_type_ce11=14 + +serdes_driver_current_lane0_ce12=0xf +serdes_driver_current_lane1_ce12=0xf +serdes_driver_current_lane2_ce12=0xf +serdes_driver_current_lane3_ce12=0xf +serdes_preemphasis_lane0_ce12=0x0c3c08 +serdes_preemphasis_lane1_ce12=0x083c08 +serdes_preemphasis_lane2_ce12=0x0c3c08 +serdes_preemphasis_lane3_ce12=0x083c08 +serdes_if_type_ce12=14 + +serdes_driver_current_lane0_ce13=0xf +serdes_driver_current_lane1_ce13=0xf +serdes_driver_current_lane2_ce13=0xf +serdes_driver_current_lane3_ce13=0xf +serdes_preemphasis_lane0_ce13=0x083c08 +serdes_preemphasis_lane1_ce13=0x0c3c08 +serdes_preemphasis_lane2_ce13=0x083c08 +serdes_preemphasis_lane3_ce13=0x0c3c08 +serdes_if_type_ce13=14 + +serdes_driver_current_lane0_ce14=0xf +serdes_driver_current_lane1_ce14=0xf +serdes_driver_current_lane2_ce14=0xf +serdes_driver_current_lane3_ce14=0xf +serdes_preemphasis_lane0_ce14=0x103c10 +serdes_preemphasis_lane1_ce14=0x0c3c08 +serdes_preemphasis_lane2_ce14=0x0c3c08 +serdes_preemphasis_lane3_ce14=0x0c3c08 +serdes_if_type_ce14=14 + +serdes_driver_current_lane0_ce15=0xf +serdes_driver_current_lane1_ce15=0xf +serdes_driver_current_lane2_ce15=0xf +serdes_driver_current_lane3_ce15=0xf +serdes_preemphasis_lane0_ce15=0x143c08 +serdes_preemphasis_lane1_ce15=0x103c08 +serdes_preemphasis_lane2_ce15=0x103c08 +serdes_preemphasis_lane3_ce15=0x103c08 +serdes_if_type_ce15=14 diff --git a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/default_sku new file mode 100644 index 00000000000..3002ec5856f --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S8900-64XC t1 diff --git a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/fancontrol b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/fancontrol new file mode 100644 index 00000000000..4819fe11317 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH=hwmon1=devices/pci0000:00/0000:00:1f.3/i2c-0/0-002f +DEVNAME=hwmon1=w83795adg +FCTEMPS=hwmon1/device/pwm1=hwmon1/device/temp2_input hwmon1/device/pwm2=hwmon1/device/temp2_input +FCFANS=hwmon1/device/pwm2=hwmon1/device/fan10_input hwmon1/device/pwm2=hwmon1/device/fan9_input hwmon1/device/pwm2=hwmon1/device/fan8_input hwmon1/device/pwm2=hwmon1/device/fan7_input hwmon1/device/pwm2=hwmon1/device/fan6_input hwmon1/device/pwm2=hwmon1/device/fan5_input hwmon1/device/pwm1=hwmon1/device/fan4_input hwmon1/device/pwm1=hwmon1/device/fan3_input hwmon1/device/pwm1=hwmon1/device/fan2_input hwmon1/device/pwm1=hwmon1/device/fan1_input +MINTEMP=hwmon1/device/pwm1=20 hwmon1/device/pwm2=20 +MAXTEMP=hwmon1/device/pwm1=60 hwmon1/device/pwm2=60 +MINSTART=hwmon1/device/pwm1=150 hwmon1/device/pwm2=150 +MINSTOP=hwmon1/device/pwm1=0 hwmon1/device/pwm2=0 diff --git a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/installer.conf b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/led_proc_init.soc b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/led_proc_init.soc new file mode 100644 index 00000000000..6a1f4f2c1ea --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/led_proc_init.soc @@ -0,0 +1,43 @@ +# LED microprocessor initialization for Ingrasys S8900-64XC + +led 0 stop +led 0 prog 12 00 61 F1 12 20 61 F2 12 01 61 F3 12 01 61 F4 67 28 12 20 61 F1 12 04 61 F2 12 04 61 F3 12 01 61 F4 67 28 86 F0 77 86 96 F2 2E F1 67 3D 67 51 16 F3 FE F1 61 F1 12 00 DE F2 74 28 57 2E F1 32 00 32 01 B7 97 75 4C 02 01 60 FE 57 02 00 60 FE 57 2E F1 32 08 97 75 6A 77 5A 06 FE D2 01 70 62 77 78 06 F0 C2 08 74 6A 77 78 16 F4 91 22 0E 87 22 0E 87 DA 00 74 6C 57 16 F4 91 22 0E 87 22 0F 87 DA 00 74 7A 57 02 48 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=28 REMAP_PORT_2=29 REMAP_PORT_1=30 REMAP_PORT_0=31 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=24 REMAP_PORT_6=25 REMAP_PORT_5=26 REMAP_PORT_4=27 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=20 REMAP_PORT_10=21 REMAP_PORT_9=22 REMAP_PORT_8=19 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=16 REMAP_PORT_14=17 REMAP_PORT_13=18 REMAP_PORT_12=23 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=12 REMAP_PORT_18=13 REMAP_PORT_17=14 REMAP_PORT_16=15 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=8 REMAP_PORT_22=9 REMAP_PORT_21=10 REMAP_PORT_20=11 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=4 REMAP_PORT_26=5 REMAP_PORT_25=6 REMAP_PORT_24=7 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=0 REMAP_PORT_30=1 REMAP_PORT_29=2 REMAP_PORT_28=3 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=60 REMAP_PORT_34=61 REMAP_PORT_33=62 REMAP_PORT_32=63 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=56 REMAP_PORT_38=57 REMAP_PORT_37=58 REMAP_PORT_36=59 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=52 REMAP_PORT_42=53 REMAP_PORT_41=54 REMAP_PORT_40=55 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=48 REMAP_PORT_46=49 REMAP_PORT_45=50 REMAP_PORT_44=51 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=44 REMAP_PORT_50=45 REMAP_PORT_49=46 REMAP_PORT_48=47 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=40 REMAP_PORT_54=41 REMAP_PORT_53=42 REMAP_PORT_52=43 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=36 REMAP_PORT_58=37 REMAP_PORT_57=38 REMAP_PORT_56=39 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=32 REMAP_PORT_62=33 REMAP_PORT_61=34 REMAP_PORT_60=35 +led 0 auto on +led 0 start + +led 1 stop +led 1 prog 12 00 61 F1 12 10 61 F2 12 01 61 F3 12 01 61 F4 67 28 12 10 61 F1 12 0C 61 F2 12 04 61 F3 12 01 61 F4 67 28 86 F0 77 86 96 F2 2E F1 67 3D 67 51 16 F3 FE F1 61 F1 12 00 DE F2 74 28 57 2E F1 32 00 32 01 B7 97 75 4C 02 01 60 FE 57 02 00 60 FE 57 2E F1 32 08 97 75 6A 77 5A 06 FE D2 01 70 62 77 78 06 F0 C2 08 74 6A 77 78 16 F4 91 22 0E 87 22 0E 87 DA 00 74 6C 57 16 F4 91 22 0E 87 22 0F 87 DA 00 74 7A 57 02 38 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0 REMAP_PORT_2=1 REMAP_PORT_1=2 REMAP_PORT_0=3 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=4 REMAP_PORT_6=5 REMAP_PORT_5=6 REMAP_PORT_4=7 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=8 REMAP_PORT_10=9 REMAP_PORT_9=10 REMAP_PORT_8=11 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=12 REMAP_PORT_14=13 REMAP_PORT_13=14 REMAP_PORT_12=15 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=16 REMAP_PORT_18=17 REMAP_PORT_17=18 REMAP_PORT_16=19 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=20 REMAP_PORT_22=21 REMAP_PORT_21=22 REMAP_PORT_20=23 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=24 REMAP_PORT_26=25 REMAP_PORT_25=26 REMAP_PORT_24=27 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=28 REMAP_PORT_30=29 REMAP_PORT_29=30 REMAP_PORT_28=31 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=32 REMAP_PORT_34=33 REMAP_PORT_33=34 REMAP_PORT_32=35 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=36 REMAP_PORT_38=37 REMAP_PORT_37=38 REMAP_PORT_36=39 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=40 REMAP_PORT_42=41 REMAP_PORT_41=42 REMAP_PORT_40=43 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=44 REMAP_PORT_46=45 REMAP_PORT_45=46 REMAP_PORT_44=47 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=48 REMAP_PORT_50=49 REMAP_PORT_49=50 REMAP_PORT_48=51 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=52 REMAP_PORT_54=53 REMAP_PORT_53=54 REMAP_PORT_52=55 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=56 REMAP_PORT_58=57 REMAP_PORT_57=58 REMAP_PORT_56=59 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=60 REMAP_PORT_62=61 REMAP_PORT_61=62 REMAP_PORT_60=63 +led 1 auto on +led 1 start diff --git a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/plugins/eeprom.py b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/plugins/eeprom.py new file mode 100644 index 00000000000..1b8de3f16bc --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Ingrasys S8900-64XC +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-7/7-0054/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/plugins/psuutil.py b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/plugins/psuutil.py new file mode 100644 index 00000000000..3af5423daeb --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/plugins/psuutil.py @@ -0,0 +1,92 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + PSU_CPLD_DIR = "/sys/bus/i2c/devices/0-0033" + + def __init__(self): + PsuBase.__init__(self) + + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + mask = [ 0x04, 0x08 ] + attr_file = 'cpld_pw_good' + attr_path = self.PSU_CPLD_DIR +'/'+ attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU status + if (attr_value & mask[index-1]): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + mask = [ 0x01, 0x02 ] + attr_file ='cpld_pw_abs' + attr_path = self.PSU_CPLD_DIR +'/'+ attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU presence + if (~attr_value & mask[index-1]): + status = 1 + + return status + diff --git a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/plugins/sfputil.py new file mode 100644 index 00000000000..26355bf441e --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/plugins/sfputil.py @@ -0,0 +1,264 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import subprocess + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +i2c_set = 'i2cset' +i2c_get = 'i2cget' +cpld_addr = '0x33' +mux_reg = '0x4A' + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 63 + QSFP_PORT_START = 48 + PORTS_IN_BLOCK = 64 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0: [2,1], + 1: [2,2], + 2: [2,3], + 3: [2,4], + 4: [2,5], + 5: [2,6], + 6: [2,7], + 7: [2,8], + 8: [2,9], + 9: [2,10], + 10: [2,11], + 11: [2,12], + 12: [2,13], + 13: [2,14], + 14: [2,15], + 15: [2,16], + 16: [2,17], + 17: [2,18], + 18: [2,19], + 19: [2,20], + 20: [2,21], + 21: [2,22], + 22: [2,23], + 23: [2,24], + 24: [3,25], + 25: [3,26], + 26: [3,27], + 27: [3,28], + 28: [3,29], + 29: [3,30], + 30: [3,31], + 31: [3,32], + 32: [3,33], + 33: [3,34], + 34: [3,35], + 35: [3,36], + 36: [3,37], + 37: [3,38], + 38: [3,39], + 39: [3,40], + 40: [3,41], + 41: [3,42], + 42: [3,43], + 43: [3,44], + 44: [3,45], + 45: [3,46], + 46: [3,47], + 47: [3,48], + 48: [4,49], + 49: [4,50], + 50: [4,51], + 51: [4,52], + 52: [4,53], + 53: [4,54], + 54: [4,55], + 55: [4,56], + 56: [4,57], + 57: [4,58], + 58: [4,59], + 59: [4,60], + 60: [4,61], + 61: [4,62], + 62: [4,63], + 63: [4,64] + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + def __init__(self): + + sfp_eeprom_path = '/sys/bus/i2c/devices/{0[0]}-0050/sfp{0[1]}' + qsfp_eeprom_path = '/sys/bus/i2c/devices/{0[0]}-0050/qsfp{0[1]}' + for x in range(self.port_start, self.qsfp_port_start): + port_eeprom_path = sfp_eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + for x in range(self.qsfp_port_start, self.port_end + 1): + port_eeprom_path = qsfp_eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/ingrasys-s8900-64xc-cpld.0/qsfp_modprs") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # content is a string, either "0" or "1" + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/ingrasys-s8900-64xc-cpld.0/qsfp_lpmode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (port_num - self.qsfp_port_start) ) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/devices/platform/ingrasys-s8900-64xc-cpld.0/qsfp_lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (port_num - self.qsfp_port_start) ) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/devices/platform/ingrasys-s8900-64xc-cpld.0/qsfp_reset" + + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.port_end: + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << (port_num - self.qsfp_port_start)) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/sensors.conf b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/sensors.conf new file mode 100644 index 00000000000..374bd3a64f0 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s8900_64xc-r0/sensors.conf @@ -0,0 +1,55 @@ +# libsensors configuration file +chip "i350bb-*" + ignore loc1 + +chip "jc42-*" + label temp1 "DIMM Temp" + set temp1_max 50 + set temp1_crit 85 + +chip "w83795adg-*" + label in0 "1.0V" + label in1 "1.0V_ROV" + label in2 "1.25V" + label in3 "1.8V" + ignore in4 + ignore in5 + ignore in6 + ignore in7 + label in12 "+3.3V" + ignore in14 + ignore in15 + ignore in16 + label fan1 "FANTRAY 1-A" + label fan2 "FANTRAY 1-B" + label fan3 "FANTRAY 2-A" + label fan4 "FANTRAY 2-B" + label fan5 "FANTRAY 3-A" + label fan6 "FANTRAY 3-B" + label fan7 "FANTRAY 4-A" + label fan8 "FANTRAY 4-B" + label fan9 "FANTRAY 5-A" + label fan10 "FANTRAY 5-B" + label temp1 "Front MAC Temp" + set temp1_max 60 + set temp1_crit 65 + label temp2 "Rear MAC Temp" + set temp2_max 60 + set temp2_crit 65 + label temp3 "Near Port 15" + set temp3_max 50 + set temp3_crit 70 + label temp4 "Near Port 56" + set temp4_max 50 + set temp4_crit 70 + ignore intrusion0 + +bus "i2c-5" "i2c-1-switch (chan_id 3)" +chip "tmp75-i2c-*-48" + label temp1 "FAN Temp1" + set temp1_max 50 + set temp1_crit 70 +chip "tmp75-i2c-*-49" + label temp1 "FAN Temp2" + set temp1_max 50 + set temp1_crit 70 diff --git a/device/ingrasys/x86_64-ingrasys_s9100-r0/INGRASYS-S9100-C32/port_config.ini b/device/ingrasys/x86_64-ingrasys_s9100-r0/INGRASYS-S9100-C32/port_config.ini new file mode 100644 index 00000000000..ab020201157 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9100-r0/INGRASYS-S9100-C32/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index +Ethernet0 5,6,7,8 Ethernet1/1 0 +Ethernet4 1,2,3,4 Ethernet2/1 1 +Ethernet8 13,14,15,16 Ethernet3/1 2 +Ethernet12 9,10,11,12 Ethernet4/1 3 +Ethernet16 21,22,23,24 Ethernet5/1 4 +Ethernet20 17,18,19,20 Ethernet6/1 5 +Ethernet24 29,30,31,32 Ethernet7/1 6 +Ethernet28 25,26,27,28 Ethernet8/1 7 +Ethernet32 37,38,39,40 Ethernet9/1 8 +Ethernet36 33,34,35,36 Ethernet10/1 9 +Ethernet40 45,46,47,48 Ethernet11/1 10 +Ethernet44 41,42,43,44 Ethernet12/1 11 +Ethernet48 53,54,55,56 Ethernet13/1 12 +Ethernet52 49,50,51,52 Ethernet14/1 13 +Ethernet56 61,62,63,64 Ethernet15/1 14 +Ethernet60 57,58,59,60 Ethernet16/1 15 +Ethernet64 69,70,71,72 Ethernet17/1 16 +Ethernet68 65,66,67,68 Ethernet18/1 17 +Ethernet72 77,78,79,80 Ethernet19/1 18 +Ethernet76 73,74,75,76 Ethernet20/1 19 +Ethernet80 85,86,87,88 Ethernet21/1 20 +Ethernet84 81,82,83,84 Ethernet22/1 21 +Ethernet88 93,94,95,96 Ethernet23/1 22 +Ethernet92 89,90,91,92 Ethernet24/1 23 +Ethernet96 101,102,103,104 Ethernet25/1 24 +Ethernet100 97,98,99,100 Ethernet26/1 25 +Ethernet104 109,110,111,112 Ethernet27/1 26 +Ethernet108 105,106,107,108 Ethernet28/1 27 +Ethernet112 117,118,119,120 Ethernet29/1 28 +Ethernet116 113,114,115,116 Ethernet30/1 29 +Ethernet120 125,126,127,128 Ethernet31/1 30 +Ethernet124 121,122,123,124 Ethernet32/1 31 diff --git a/device/ingrasys/x86_64-ingrasys_s9100-r0/INGRASYS-S9100-C32/sai.profile b/device/ingrasys/x86_64-ingrasys_s9100-r0/INGRASYS-S9100-C32/sai.profile new file mode 100644 index 00000000000..14a36af5f55 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9100-r0/INGRASYS-S9100-C32/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-s9100-32x100G.config.bcm diff --git a/device/ingrasys/x86_64-ingrasys_s9100-r0/INGRASYS-S9100-C32/th-s9100-32x100G.config.bcm b/device/ingrasys/x86_64-ingrasys_s9100-r0/INGRASYS-S9100-C32/th-s9100-32x100G.config.bcm new file mode 100644 index 00000000000..46b8799efef --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9100-r0/INGRASYS-S9100-C32/th-s9100-32x100G.config.bcm @@ -0,0 +1,357 @@ +#2017/09/12 + +os=unix + +oversubscribe_mode=1 +pbmp_xport_xe=0x3fc000000ff0000003fc000001fe + +#ALPM enable +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 +l3_mem_entries=40960 +l2_mem_entries=40960 + +l2xmsg_mode=1 +mmu_lossless=0 + +#Parity +parity_correction=1 +parity_enable=1 + +#PIPE0 +portmap_1=5:100 +portmap_2=1:100 +portmap_3=13:100 +portmap_4=9:100 +portmap_5=21:100 +portmap_6=17:100 +portmap_7=29:100 +portmap_8=25:100 + +#PIPE1 +portmap_34=37:100 +portmap_35=33:100 +portmap_36=45:100 +portmap_37=41:100 +portmap_38=53:100 +portmap_39=49:100 +portmap_40=61:100 +portmap_41=57:100 + +#PIPE2 +portmap_68=69:100 +portmap_69=65:100 +portmap_70=77:100 +portmap_71=73:100 +portmap_72=85:100 +portmap_73=81:100 +portmap_74=93:100 +portmap_75=89:100 + +#PIPE3 +portmap_102=101:100 +portmap_103=97:100 +portmap_104=109:100 +portmap_105=105:100 +portmap_106=117:100 +portmap_107=113:100 +portmap_108=125:100 +portmap_109=121:100 + +#portmap_66=129:10 +#portmap_100=131:10 +portmap_33=132:10 +portmap_67=133:10 +portmap_101=134:10 +portmap_135=135:10 + +serdes_driver_current_lane0_ce0=0xF +serdes_driver_current_lane1_ce0=0xF +serdes_driver_current_lane2_ce0=0xF +serdes_driver_current_lane3_ce0=0xF +serdes_preemphasis_lane0_ce0=0x153C1F +serdes_preemphasis_lane1_ce0=0x20341C +serdes_preemphasis_lane2_ce0=0x153C1F +serdes_preemphasis_lane3_ce0=0x243418 + +serdes_driver_current_lane0_ce1=0xF +serdes_driver_current_lane1_ce1=0xF +serdes_driver_current_lane2_ce1=0xF +serdes_driver_current_lane3_ce1=0xF +serdes_preemphasis_lane0_ce1=0x153C1F +serdes_preemphasis_lane1_ce1=0x20341C +serdes_preemphasis_lane2_ce1=0x153C1F +serdes_preemphasis_lane3_ce1=0x20341C + +serdes_driver_current_lane0_ce2=0xF +serdes_driver_current_lane1_ce2=0xD +serdes_driver_current_lane2_ce2=0xF +serdes_driver_current_lane3_ce2=0xD +serdes_preemphasis_lane0_ce2=0x153C1F +serdes_preemphasis_lane1_ce2=0x243418 +serdes_preemphasis_lane2_ce2=0x153C1F +serdes_preemphasis_lane3_ce2=0x203C14 + +serdes_driver_current_lane0_ce3=0xF +serdes_driver_current_lane1_ce3=0xD +serdes_driver_current_lane2_ce3=0xF +serdes_driver_current_lane3_ce3=0xD +serdes_preemphasis_lane0_ce3=0x153C1F +serdes_preemphasis_lane1_ce3=0x203C14 +serdes_preemphasis_lane2_ce3=0x153C1F +serdes_preemphasis_lane3_ce3=0x243418 + +serdes_driver_current_lane0_ce4=0xF +serdes_driver_current_lane1_ce4=0xB +serdes_driver_current_lane2_ce4=0xF +serdes_driver_current_lane3_ce4=0xA +serdes_preemphasis_lane0_ce4=0x153C1F +serdes_preemphasis_lane1_ce4=0x333D00 +serdes_preemphasis_lane2_ce4=0x153C1F +serdes_preemphasis_lane3_ce4=0x304000 + +serdes_driver_current_lane0_ce5=0xF +serdes_driver_current_lane1_ce5=0xB +serdes_driver_current_lane2_ce5=0xF +serdes_driver_current_lane3_ce5=0xA +serdes_preemphasis_lane0_ce5=0x153C1F +serdes_preemphasis_lane1_ce5=0x304000 +serdes_preemphasis_lane2_ce5=0x153C1F +serdes_preemphasis_lane3_ce5=0x304000 + +serdes_driver_current_lane0_ce6=0xF +serdes_driver_current_lane1_ce6=0xC +serdes_driver_current_lane2_ce6=0xF +serdes_driver_current_lane3_ce6=0xA +serdes_preemphasis_lane0_ce6=0x153C1F +serdes_preemphasis_lane1_ce6=0x363A00 +serdes_preemphasis_lane2_ce6=0x153C1F +serdes_preemphasis_lane3_ce6=0x304000 + +serdes_driver_current_lane0_ce7=0xF +serdes_driver_current_lane1_ce7=0x8 +serdes_driver_current_lane2_ce7=0xF +serdes_driver_current_lane3_ce7=0x8 +serdes_preemphasis_lane0_ce7=0x153C1F +serdes_preemphasis_lane1_ce7=0x304000 +serdes_preemphasis_lane2_ce7=0x153C1F +serdes_preemphasis_lane3_ce7=0x304000 + +serdes_driver_current_lane0_ce8=0x8 +serdes_driver_current_lane1_ce8=0x9 +serdes_driver_current_lane2_ce8=0x8 +serdes_driver_current_lane3_ce8=0x8 +serdes_preemphasis_lane0_ce8=0x254B00 +serdes_preemphasis_lane1_ce8=0x2C4400 +serdes_preemphasis_lane2_ce8=0x254B00 +serdes_preemphasis_lane3_ce8=0x254B00 + +serdes_driver_current_lane0_ce9=0x8 +serdes_driver_current_lane1_ce9=0x9 +serdes_driver_current_lane2_ce9=0x8 +serdes_driver_current_lane3_ce9=0x8 +serdes_preemphasis_lane0_ce9=0x254B00 +serdes_preemphasis_lane1_ce9=0x2B4500 +serdes_preemphasis_lane2_ce9=0x254B00 +serdes_preemphasis_lane3_ce9=0x254B00 + +serdes_driver_current_lane0_ce10=0x8 +serdes_driver_current_lane1_ce10=0x7 +serdes_driver_current_lane2_ce10=0x8 +serdes_driver_current_lane3_ce10=0x8 +serdes_preemphasis_lane0_ce10=0x254B00 +serdes_preemphasis_lane1_ce10=0x2B4500 +serdes_preemphasis_lane2_ce10=0x254B00 +serdes_preemphasis_lane3_ce10=0x254B00 + +serdes_driver_current_lane0_ce11=0x8 +serdes_driver_current_lane1_ce11=0x8 +serdes_driver_current_lane2_ce11=0x8 +serdes_driver_current_lane3_ce11=0x8 +serdes_preemphasis_lane0_ce11=0x254B00 +serdes_preemphasis_lane1_ce11=0x2C4400 +serdes_preemphasis_lane2_ce11=0x254B00 +serdes_preemphasis_lane3_ce11=0x254B00 + +serdes_driver_current_lane0_ce12=0x8 +serdes_driver_current_lane1_ce12=0x5 +serdes_driver_current_lane2_ce12=0x8 +serdes_driver_current_lane3_ce12=0x8 +serdes_preemphasis_lane0_ce12=0x254B00 +serdes_preemphasis_lane1_ce12=0x254B00 +serdes_preemphasis_lane2_ce12=0x254B00 +serdes_preemphasis_lane3_ce12=0x254B00 + +serdes_driver_current_lane0_ce13=0x8 +serdes_driver_current_lane1_ce13=0x8 +serdes_driver_current_lane2_ce13=0x8 +serdes_driver_current_lane3_ce13=0x8 +serdes_preemphasis_lane0_ce13=0x254B00 +serdes_preemphasis_lane1_ce13=0x254B00 +serdes_preemphasis_lane2_ce13=0x254B00 +serdes_preemphasis_lane3_ce13=0x254B00 + +serdes_driver_current_lane0_ce14=0x7 +serdes_driver_current_lane1_ce14=0x7 +serdes_driver_current_lane2_ce14=0x7 +serdes_driver_current_lane3_ce14=0x7 +serdes_preemphasis_lane0_ce14=0x254B00 +serdes_preemphasis_lane1_ce14=0x254B00 +serdes_preemphasis_lane2_ce14=0x254B00 +serdes_preemphasis_lane3_ce14=0x254B00 + +serdes_driver_current_lane0_ce15=0x7 +serdes_driver_current_lane1_ce15=0x5 +serdes_driver_current_lane2_ce15=0x7 +serdes_driver_current_lane3_ce15=0x7 +serdes_preemphasis_lane0_ce15=0x254B00 +serdes_preemphasis_lane1_ce15=0x254B00 +serdes_preemphasis_lane2_ce15=0x254B00 +serdes_preemphasis_lane3_ce15=0x254B00 + +serdes_driver_current_lane0_ce16=0x4 +serdes_driver_current_lane1_ce16=0x4 +serdes_driver_current_lane2_ce16=0x4 +serdes_driver_current_lane3_ce16=0x4 +serdes_preemphasis_lane0_ce16=0x274900 +serdes_preemphasis_lane1_ce16=0x274900 +serdes_preemphasis_lane2_ce16=0x274900 +serdes_preemphasis_lane3_ce16=0x274900 + +serdes_driver_current_lane0_ce17=0x8 +serdes_driver_current_lane1_ce17=0xF +serdes_driver_current_lane2_ce17=0xF +serdes_driver_current_lane3_ce17=0xF +serdes_preemphasis_lane0_ce17=0x254B00 +serdes_preemphasis_lane1_ce17=0x304000 +serdes_preemphasis_lane2_ce17=0x304000 +serdes_preemphasis_lane3_ce17=0x304000 + +serdes_driver_current_lane0_ce18=0x2 +serdes_driver_current_lane1_ce18=0x2 +serdes_driver_current_lane2_ce18=0x2 +serdes_driver_current_lane3_ce18=0x2 +serdes_preemphasis_lane0_ce18=0x205000 +serdes_preemphasis_lane1_ce18=0x205000 +serdes_preemphasis_lane2_ce18=0x205000 +serdes_preemphasis_lane3_ce18=0x205000 + +serdes_driver_current_lane0_ce19=0x2 +serdes_driver_current_lane1_ce19=0x2 +serdes_driver_current_lane2_ce19=0x2 +serdes_driver_current_lane3_ce19=0x2 +serdes_preemphasis_lane0_ce19=0x205000 +serdes_preemphasis_lane1_ce19=0x205000 +serdes_preemphasis_lane2_ce19=0x205000 +serdes_preemphasis_lane3_ce19=0x205000 + +serdes_driver_current_lane0_ce20=0x2 +serdes_driver_current_lane1_ce20=0x2 +serdes_driver_current_lane2_ce20=0x2 +serdes_driver_current_lane3_ce20=0x2 +serdes_preemphasis_lane0_ce20=0x205000 +serdes_preemphasis_lane1_ce20=0x205000 +serdes_preemphasis_lane2_ce20=0x205000 +serdes_preemphasis_lane3_ce20=0x205000 + +serdes_driver_current_lane0_ce21=0x4 +serdes_driver_current_lane1_ce21=0x2 +serdes_driver_current_lane2_ce21=0x2 +serdes_driver_current_lane3_ce21=0x2 +serdes_preemphasis_lane0_ce21=0x175900 +serdes_preemphasis_lane1_ce21=0x175900 +serdes_preemphasis_lane2_ce21=0x205000 +serdes_preemphasis_lane3_ce21=0x205000 + +serdes_driver_current_lane0_ce22=0x7 +serdes_driver_current_lane1_ce22=0x7 +serdes_driver_current_lane2_ce22=0x7 +serdes_driver_current_lane3_ce22=0x7 +serdes_preemphasis_lane0_ce22=0x254B00 +serdes_preemphasis_lane1_ce22=0x254B00 +serdes_preemphasis_lane2_ce22=0x254B00 +serdes_preemphasis_lane3_ce22=0x254B00 + +serdes_driver_current_lane0_ce23=0x7 +serdes_driver_current_lane1_ce23=0x7 +serdes_driver_current_lane2_ce23=0x7 +serdes_driver_current_lane3_ce23=0x7 +serdes_preemphasis_lane0_ce23=0x254B00 +serdes_preemphasis_lane1_ce23=0x254B00 +serdes_preemphasis_lane2_ce23=0x254B00 +serdes_preemphasis_lane3_ce23=0x254B00 + +serdes_driver_current_lane0_ce24=0xF +serdes_driver_current_lane1_ce24=0x8 +serdes_driver_current_lane2_ce24=0xF +serdes_driver_current_lane3_ce24=0x4 +serdes_preemphasis_lane0_ce24=0x153C1F +serdes_preemphasis_lane1_ce24=0x294700 +serdes_preemphasis_lane2_ce24=0x153C1F +serdes_preemphasis_lane3_ce24=0x294700 + +serdes_driver_current_lane0_ce25=0xF +serdes_driver_current_lane1_ce25=0x8 +serdes_driver_current_lane2_ce25=0xF +serdes_driver_current_lane3_ce25=0x4 +serdes_preemphasis_lane0_ce25=0x153C1F +serdes_preemphasis_lane1_ce25=0x294700 +serdes_preemphasis_lane2_ce25=0x153C1F +serdes_preemphasis_lane3_ce25=0x294700 + +serdes_driver_current_lane0_ce26=0xF +serdes_driver_current_lane1_ce26=0xA +serdes_driver_current_lane2_ce26=0xF +serdes_driver_current_lane3_ce26=0x9 +serdes_preemphasis_lane0_ce26=0x153C1F +serdes_preemphasis_lane1_ce26=0x304000 +serdes_preemphasis_lane2_ce26=0x153C1F +serdes_preemphasis_lane3_ce26=0x304000 + +serdes_driver_current_lane0_ce27=0xF +serdes_driver_current_lane1_ce27=0x9 +serdes_driver_current_lane2_ce27=0xF +serdes_driver_current_lane3_ce27=0x9 +serdes_preemphasis_lane0_ce27=0x153C1F +serdes_preemphasis_lane1_ce27=0x304000 +serdes_preemphasis_lane2_ce27=0x153C1F +serdes_preemphasis_lane3_ce27=0x304000 + +serdes_driver_current_lane0_ce28=0xF +serdes_driver_current_lane1_ce28=0xC +serdes_driver_current_lane2_ce28=0xF +serdes_driver_current_lane3_ce28=0xC +serdes_preemphasis_lane0_ce28=0x153C1F +serdes_preemphasis_lane1_ce28=0x183C10 +serdes_preemphasis_lane2_ce28=0x153C1F +serdes_preemphasis_lane3_ce28=0x1C3C10 + +serdes_driver_current_lane0_ce29=0xF +serdes_driver_current_lane1_ce29=0xC +serdes_driver_current_lane2_ce29=0xF +serdes_driver_current_lane3_ce29=0xC +serdes_preemphasis_lane0_ce29=0x153C1F +serdes_preemphasis_lane1_ce29=0x203C10 +serdes_preemphasis_lane2_ce29=0x153C1F +serdes_preemphasis_lane3_ce29=0x203C10 + +serdes_driver_current_lane0_ce30=0xF +serdes_driver_current_lane1_ce30=0xC +serdes_driver_current_lane2_ce30=0xF +serdes_driver_current_lane3_ce30=0xC +serdes_preemphasis_lane0_ce30=0x153C1F +serdes_preemphasis_lane1_ce30=0x243C10 +serdes_preemphasis_lane2_ce30=0x153C1F +serdes_preemphasis_lane3_ce30=0x243C08 + +serdes_driver_current_lane0_ce31=0xF +serdes_driver_current_lane1_ce31=0xC +serdes_driver_current_lane2_ce31=0xF +serdes_driver_current_lane3_ce31=0xE +serdes_preemphasis_lane0_ce31=0x153C1F +serdes_preemphasis_lane1_ce31=0x243C10 +serdes_preemphasis_lane2_ce31=0x153C1F +serdes_preemphasis_lane3_ce31=0x203C14 + +serdes_if_type_xe=14 +serdes_if_type_ce=14 diff --git a/device/ingrasys/x86_64-ingrasys_s9100-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s9100-r0/default_sku new file mode 100644 index 00000000000..1a78c849d5e --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9100-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S9100-C32 t1 diff --git a/device/ingrasys/x86_64-ingrasys_s9100-r0/fancontrol b/device/ingrasys/x86_64-ingrasys_s9100-r0/fancontrol new file mode 100644 index 00000000000..e1f88f6b79c --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9100-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH=hwmon1=devices/pci0000:00/0000:00:1f.3/i2c-0/0-002f +DEVNAME=hwmon1=w83795adg +FCTEMPS=hwmon1/device/pwm2=hwmon1/device/temp2_input hwmon1/device/pwm1=hwmon1/device/temp2_input +FCFANS=hwmon1/device/pwm2=hwmon1/device/fan8_input hwmon1/device/pwm2=hwmon1/device/fan7_input hwmon1/device/pwm2=hwmon1/device/fan6_input hwmon1/device/pwm2=hwmon1/device/fan5_input hwmon1/device/pwm1=hwmon1/device/fan4_input hwmon1/device/pwm1=hwmon1/device/fan3_input hwmon1/device/pwm1=hwmon1/device/fan2_input hwmon1/device/pwm1=hwmon1/device/fan1_input +MINTEMP=hwmon1/device/pwm2=20 hwmon1/device/pwm1=20 +MAXTEMP=hwmon1/device/pwm2=60 hwmon1/device/pwm1=60 +MINSTART=hwmon1/device/pwm2=75 hwmon1/device/pwm1=75 +MINSTOP=hwmon1/device/pwm2=22 hwmon1/device/pwm1=22 diff --git a/device/ingrasys/x86_64-ingrasys_s9100-r0/installer.conf b/device/ingrasys/x86_64-ingrasys_s9100-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9100-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/ingrasys/x86_64-ingrasys_s9100-r0/led_proc_init.soc b/device/ingrasys/x86_64-ingrasys_s9100-r0/led_proc_init.soc new file mode 100644 index 00000000000..492d3b89785 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9100-r0/led_proc_init.soc @@ -0,0 +1,43 @@ +# LED microprocessor initialization for Ingrasys S9100-32X + +led 0 stop +led 0 prog 12 00 61 F1 12 10 61 F2 12 04 61 F3 12 04 61 F4 67 16 86 F0 77 74 96 F2 2E F1 67 2B 67 3F 16 F3 FE F1 61 F1 12 00 DE F2 74 16 57 2E F1 32 00 32 01 B7 97 75 3A 02 01 60 FE 57 02 00 60 FE 57 2E F1 32 08 97 75 58 77 48 06 FE D2 01 70 50 77 66 06 F0 C2 08 74 58 77 66 16 F4 91 22 0E 87 22 0E 87 DA 00 74 5A 57 16 F4 91 22 0E 87 22 0F 87 DA 00 74 68 57 02 80 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=28 REMAP_PORT_2=29 REMAP_PORT_1=30 REMAP_PORT_0=31 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=24 REMAP_PORT_6=25 REMAP_PORT_5=26 REMAP_PORT_4=27 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=20 REMAP_PORT_10=21 REMAP_PORT_9=22 REMAP_PORT_8=23 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=16 REMAP_PORT_14=17 REMAP_PORT_13=18 REMAP_PORT_12=19 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=12 REMAP_PORT_18=13 REMAP_PORT_17=14 REMAP_PORT_16=15 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=8 REMAP_PORT_22=9 REMAP_PORT_21=10 REMAP_PORT_20=11 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=4 REMAP_PORT_26=5 REMAP_PORT_25=6 REMAP_PORT_24=7 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=0 REMAP_PORT_30=1 REMAP_PORT_29=2 REMAP_PORT_28=3 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=60 REMAP_PORT_34=61 REMAP_PORT_33=62 REMAP_PORT_32=63 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=56 REMAP_PORT_38=57 REMAP_PORT_37=58 REMAP_PORT_36=59 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=52 REMAP_PORT_42=53 REMAP_PORT_41=54 REMAP_PORT_40=55 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=48 REMAP_PORT_46=49 REMAP_PORT_45=50 REMAP_PORT_44=51 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=44 REMAP_PORT_50=45 REMAP_PORT_49=46 REMAP_PORT_48=47 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=40 REMAP_PORT_54=41 REMAP_PORT_53=42 REMAP_PORT_52=43 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=36 REMAP_PORT_58=37 REMAP_PORT_57=38 REMAP_PORT_56=39 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=32 REMAP_PORT_62=33 REMAP_PORT_61=34 REMAP_PORT_60=35 +led 0 auto on +led 0 start + +led 1 stop +led 1 prog 12 00 61 F1 12 10 61 F2 12 04 61 F3 12 04 61 F4 67 16 86 F0 77 74 96 F2 2E F1 67 2B 67 3F 16 F3 FE F1 61 F1 12 00 DE F2 74 16 57 2E F1 32 00 32 01 B7 97 75 3A 02 01 60 FE 57 02 00 60 FE 57 2E F1 32 08 97 75 58 77 48 06 FE D2 01 70 50 77 66 06 F0 C2 08 74 58 77 66 16 F4 91 22 0E 87 22 0E 87 DA 00 74 5A 57 16 F4 91 22 0E 87 22 0F 87 DA 00 74 68 57 02 80 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0 REMAP_PORT_2=1 REMAP_PORT_1=2 REMAP_PORT_0=3 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=4 REMAP_PORT_6=5 REMAP_PORT_5=6 REMAP_PORT_4=7 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=8 REMAP_PORT_10=9 REMAP_PORT_9=10 REMAP_PORT_8=11 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=12 REMAP_PORT_14=13 REMAP_PORT_13=14 REMAP_PORT_12=15 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=16 REMAP_PORT_18=17 REMAP_PORT_17=18 REMAP_PORT_16=19 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=20 REMAP_PORT_22=21 REMAP_PORT_21=22 REMAP_PORT_20=23 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=24 REMAP_PORT_26=25 REMAP_PORT_25=26 REMAP_PORT_24=27 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=28 REMAP_PORT_30=29 REMAP_PORT_29=30 REMAP_PORT_28=31 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=32 REMAP_PORT_34=33 REMAP_PORT_33=34 REMAP_PORT_32=35 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=36 REMAP_PORT_38=37 REMAP_PORT_37=38 REMAP_PORT_36=39 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=40 REMAP_PORT_42=41 REMAP_PORT_41=42 REMAP_PORT_40=43 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=44 REMAP_PORT_46=45 REMAP_PORT_45=46 REMAP_PORT_44=47 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=48 REMAP_PORT_50=49 REMAP_PORT_49=50 REMAP_PORT_48=51 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=52 REMAP_PORT_54=53 REMAP_PORT_53=54 REMAP_PORT_52=55 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=56 REMAP_PORT_58=57 REMAP_PORT_57=58 REMAP_PORT_56=59 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=60 REMAP_PORT_62=61 REMAP_PORT_61=62 REMAP_PORT_60=63 +led 1 auto on +led 1 start diff --git a/device/ingrasys/x86_64-ingrasys_s9100-r0/plugins/eeprom.py b/device/ingrasys/x86_64-ingrasys_s9100-r0/plugins/eeprom.py new file mode 100644 index 00000000000..83bf65a389b --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9100-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Ingrasys S9100 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-9/9-0054/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/ingrasys/x86_64-ingrasys_s9100-r0/plugins/psuutil.py b/device/ingrasys/x86_64-ingrasys_s9100-r0/plugins/psuutil.py new file mode 100644 index 00000000000..4f226c69fff --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9100-r0/plugins/psuutil.py @@ -0,0 +1,92 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + PSU_CPLD_DIR = "/sys/bus/i2c/devices/0-0033" + + def __init__(self): + PsuBase.__init__(self) + + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + mask = [ 0x08, 0x10 ] + attr_file = 'cpld_pw_good' + attr_path = self.PSU_CPLD_DIR +'/'+ attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU status + if (attr_value & mask[index-1]): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + mask = [ 0x01, 0x02 ] + attr_file ='cpld_pw_abs' + attr_path = self.PSU_CPLD_DIR +'/'+ attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU presence + if (~attr_value & mask[index-1]): + status = 1 + + return status + diff --git a/device/ingrasys/x86_64-ingrasys_s9100-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s9100-r0/plugins/sfputil.py new file mode 100644 index 00000000000..849bd13d94d --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9100-r0/plugins/sfputil.py @@ -0,0 +1,324 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +import os + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 31 + PORTS_IN_BLOCK = 32 + GPIO_OFFSET = 0 + + BASE_DIR_PATH = "/sys/class/gpio/gpio{0}/direction" + BASE_VAL_PATH = "/sys/class/gpio/gpio{0}/value" + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0: 11, + 1: 10, + 2: 13, + 3: 12, + 4: 15, + 5: 14, + 6: 17, + 7: 16, + 8: 19, + 9: 18, + 10: 21, + 11: 20, + 12: 23, + 13: 22, + 14: 25, + 15: 24, + 16: 27, + 17: 26, + 18: 29, + 19: 28, + 20: 31, + 21: 30, + 22: 33, + 23: 32, + 24: 35, + 25: 34, + 26: 37, + 27: 36, + 28: 39, + 29: 38, + 30: 41, + 31: 40 + } + + abs_to_gpio_mapping = {} + lpmode_to_gpio_mapping = {} + reset_to_gpio_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def set_gpio_offset(self): + sys_gpio_dir = "/sys/class/gpio" + self.GPIO_OFFSET = 0 + gpiochip_no = 0 + for d in os.listdir(sys_gpio_dir): + if "gpiochip" in d: + try: + gpiochip_no = int(d[8:],10) + except ValueError as e: + print "Error: %s" % str(e) + if gpiochip_no > 255: + self.GPIO_OFFSET=256 + return True + return True + + def init_abs_to_gpio_mapping(self): + self.abs_to_gpio_mapping = { + 0: 241+self.GPIO_OFFSET, + 1: 240+self.GPIO_OFFSET, + 2: 243+self.GPIO_OFFSET, + 3: 242+self.GPIO_OFFSET, + 4: 245+self.GPIO_OFFSET, + 5: 244+self.GPIO_OFFSET, + 6: 247+self.GPIO_OFFSET, + 7: 246+self.GPIO_OFFSET, + 8: 249+self.GPIO_OFFSET, + 9: 248+self.GPIO_OFFSET, + 10: 251+self.GPIO_OFFSET, + 11: 250+self.GPIO_OFFSET, + 12: 253+self.GPIO_OFFSET, + 13: 252+self.GPIO_OFFSET, + 14: 255+self.GPIO_OFFSET, + 15: 254+self.GPIO_OFFSET, + 16: 225+self.GPIO_OFFSET, + 17: 224+self.GPIO_OFFSET, + 18: 227+self.GPIO_OFFSET, + 19: 226+self.GPIO_OFFSET, + 20: 229+self.GPIO_OFFSET, + 21: 228+self.GPIO_OFFSET, + 22: 231+self.GPIO_OFFSET, + 23: 230+self.GPIO_OFFSET, + 24: 233+self.GPIO_OFFSET, + 25: 232+self.GPIO_OFFSET, + 26: 235+self.GPIO_OFFSET, + 27: 234+self.GPIO_OFFSET, + 28: 237+self.GPIO_OFFSET, + 29: 236+self.GPIO_OFFSET, + 30: 239+self.GPIO_OFFSET, + 31: 238+self.GPIO_OFFSET + } + return True + + def init_lpmode_to_gpio_mapping(self): + self.lpmode_to_gpio_mapping = { + 0: 177+self.GPIO_OFFSET, + 1: 176+self.GPIO_OFFSET, + 2: 179+self.GPIO_OFFSET, + 3: 178+self.GPIO_OFFSET, + 4: 181+self.GPIO_OFFSET, + 5: 180+self.GPIO_OFFSET, + 6: 183+self.GPIO_OFFSET, + 7: 182+self.GPIO_OFFSET, + 8: 185+self.GPIO_OFFSET, + 9: 184+self.GPIO_OFFSET, + 10: 187+self.GPIO_OFFSET, + 11: 186+self.GPIO_OFFSET, + 12: 189+self.GPIO_OFFSET, + 13: 188+self.GPIO_OFFSET, + 14: 191+self.GPIO_OFFSET, + 15: 190+self.GPIO_OFFSET, + 16: 161+self.GPIO_OFFSET, + 17: 160+self.GPIO_OFFSET, + 18: 163+self.GPIO_OFFSET, + 19: 162+self.GPIO_OFFSET, + 20: 165+self.GPIO_OFFSET, + 21: 164+self.GPIO_OFFSET, + 22: 167+self.GPIO_OFFSET, + 23: 166+self.GPIO_OFFSET, + 24: 169+self.GPIO_OFFSET, + 25: 168+self.GPIO_OFFSET, + 26: 171+self.GPIO_OFFSET, + 27: 170+self.GPIO_OFFSET, + 28: 173+self.GPIO_OFFSET, + 29: 172+self.GPIO_OFFSET, + 30: 175+self.GPIO_OFFSET, + 31: 174+self.GPIO_OFFSET + } + return True + + def init_reset_to_gpio_mapping(self): + self.reset_to_gpio_mapping = { + 0: 145+self.GPIO_OFFSET, + 1: 144+self.GPIO_OFFSET, + 2: 147+self.GPIO_OFFSET, + 3: 146+self.GPIO_OFFSET, + 4: 149+self.GPIO_OFFSET, + 5: 148+self.GPIO_OFFSET, + 6: 151+self.GPIO_OFFSET, + 7: 150+self.GPIO_OFFSET, + 8: 153+self.GPIO_OFFSET, + 9: 152+self.GPIO_OFFSET, + 10: 155+self.GPIO_OFFSET, + 11: 154+self.GPIO_OFFSET, + 12: 157+self.GPIO_OFFSET, + 13: 156+self.GPIO_OFFSET, + 14: 159+self.GPIO_OFFSET, + 15: 158+self.GPIO_OFFSET, + 16: 129+self.GPIO_OFFSET, + 17: 128+self.GPIO_OFFSET, + 18: 131+self.GPIO_OFFSET, + 19: 130+self.GPIO_OFFSET, + 20: 133+self.GPIO_OFFSET, + 21: 132+self.GPIO_OFFSET, + 22: 135+self.GPIO_OFFSET, + 23: 134+self.GPIO_OFFSET, + 24: 137+self.GPIO_OFFSET, + 25: 136+self.GPIO_OFFSET, + 26: 139+self.GPIO_OFFSET, + 27: 138+self.GPIO_OFFSET, + 28: 141+self.GPIO_OFFSET, + 29: 140+self.GPIO_OFFSET, + 30: 143+self.GPIO_OFFSET, + 31: 142+self.GPIO_OFFSET + } + return True + + def __init__(self): + # Init abs, lpmode, and reset to gpio mapping + self.set_gpio_offset() + self.init_abs_to_gpio_mapping() + self.init_lpmode_to_gpio_mapping() + self.init_reset_to_gpio_mapping() + + # Override port_to_eeprom_mapping for class initialization + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(self.port_start, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + abs_device_file = self.BASE_VAL_PATH.format( + self.abs_to_gpio_mapping[port_num]) + val_file = open(abs_device_file) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + lpmode_val_device_file = self.BASE_VAL_PATH.format( + self.lpmode_to_gpio_mapping[port_num]) + val_file = open(lpmode_val_device_file) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + lpmode_val_device_file = self.BASE_VAL_PATH.format( + self.lpmode_to_gpio_mapping[port_num]) + val_file = open(lpmode_val_device_file, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + val_file.write("1" if lpmode is True else "0") + val_file.close() + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reset_val_device_file = self.BASE_VAL_PATH.format( + self.reset_to_gpio_mapping[port_num]) + val_file = open(reset_val_device_file, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + val_file.write("1") + val_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + try: + reset_val_device_file = self.BASE_VAL_PATH.format( + self.reset_to_gpio_mapping[port_num]) + val_file = open(reset_val_device_file, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + val_file.write("0") + val_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s9100-r0/sensors.conf b/device/ingrasys/x86_64-ingrasys_s9100-r0/sensors.conf new file mode 100644 index 00000000000..5535db7e7eb --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9100-r0/sensors.conf @@ -0,0 +1,49 @@ +# libsensors configuration file +chip "i350bb-*" + ignore loc1 + +chip "jc42-*" + label temp1 "DIMM Temp" + set temp1_max 50 + set temp1_crit 85 + +chip "w83795adg-*" + label in0 "1.0V" + set in0_min 1.00 * 0.97 + set in0_max 1.00 * 1.03 + label in1 "1.0V_ROV" + set in1_min 1.00 * 0.98 + set in1_max 1.00 * 1.02 + label in2 "1.25V" + set in2_min 1.25 * 0.97 + set in2_max 1.25 * 1.03 + label in3 "1.8V" + set in3_min 1.80 * 0.97 + set in3_max 1.80 * 1.03 + ignore in4 + ignore in5 + ignore in6 + ignore in7 + label in12 "+3.3V" + set in12_min 3.30 * 0.97 + set in12_max 3.30 * 1.03 + ignore in14 + ignore in15 + ignore in16 + label fan1 "FANTRAY 1-A" + label fan2 "FANTRAY 1-B" + label fan3 "FANTRAY 2-A" + label fan4 "FANTRAY 2-B" + label fan5 "FANTRAY 3-A" + label fan6 "FANTRAY 3-B" + label fan7 "FANTRAY 4-A" + label fan8 "FANTRAY 4-B" + label temp1 "Front MAC Temp" + set temp1_max 70 + set temp1_crit 80 + label temp2 "Rear MAC Temp" + set temp2_max 70 + set temp2_crit 80 + ignore temp3 + ignore temp4 + ignore intrusion0 diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers.json.j2 b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers.json.j2 new file mode 100644 index 00000000000..9354b7ec5b5 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} \ No newline at end of file diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers_defaults_t0.j2 b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..b008aa892bc --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers_defaults_t0.j2 @@ -0,0 +1,69 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '20971328' %} +{% set ingress_lossy_pool_size = '20971328' %} +{% set egress_lossless_pool_size = '20971328' %} +{% set egress_lossy_pool_size = '20971328' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"78400", + "xoff":"132160", + "size":"3584", + "static_th":"82880" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"3584", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"3584", + "dynamic_th":"-4" + } + }, +{%- endmacro %} + +{# the typo of generate_pg_profils dued to buffers_config.j2 #} +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + } +{%- endmacro %} + +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} \ No newline at end of file diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers_defaults_t1.j2 b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..b008aa892bc --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers_defaults_t1.j2 @@ -0,0 +1,69 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '20971328' %} +{% set ingress_lossy_pool_size = '20971328' %} +{% set egress_lossless_pool_size = '20971328' %} +{% set egress_lossy_pool_size = '20971328' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"78400", + "xoff":"132160", + "size":"3584", + "static_th":"82880" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"3584", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"3584", + "dynamic_th":"-4" + } + }, +{%- endmacro %} + +{# the typo of generate_pg_profils dued to buffers_config.j2 #} +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + } +{%- endmacro %} + +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} \ No newline at end of file diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/pg_profile_lookup.ini b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/pg_profile_lookup.ini new file mode 100644 index 00000000000..d98b0eca6d1 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 3584 32256 59136 36736 + 25000 5m 3584 41216 68096 45696 + 40000 5m 3584 47488 74368 51968 + 50000 5m 3584 52864 79744 57344 + 100000 5m 3584 78400 132160 82880 + 10000 40m 3584 32256 59136 36736 + 25000 40m 3584 41216 68096 45696 + 40000 40m 3584 47488 74368 51968 + 50000 40m 3584 52864 79744 57344 + 100000 40m 3584 78400 132160 82880 + 10000 300m 3584 32256 65856 36736 + 25000 300m 3584 41216 84672 45696 + 40000 300m 3584 47488 101024 51968 + 50000 300m 3584 52864 113120 57344 + 100000 300m 3584 78400 198688 82880 \ No newline at end of file diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/port_config.ini b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/port_config.ini new file mode 100644 index 00000000000..bb26684cb7d --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index +Ethernet0 0,1,2,3 Ethernet1/1 0 +Ethernet4 4,5,6,7 Ethernet2/1 1 +Ethernet8 8,9,10,11 Ethernet3/1 2 +Ethernet12 12,13,14,15 Ethernet4/1 3 +Ethernet16 16,17,18,19 Ethernet5/1 4 +Ethernet20 20,21,22,23 Ethernet6/1 5 +Ethernet24 24,25,26,27 Ethernet7/1 6 +Ethernet28 28,29,30,31 Ethernet8/1 7 +Ethernet32 32,33,34,35 Ethernet9/1 8 +Ethernet36 36,37,38,39 Ethernet10/1 9 +Ethernet40 40,41,42,43 Ethernet11/1 10 +Ethernet44 44,45,46,47 Ethernet12/1 11 +Ethernet48 48,49,50,51 Ethernet13/1 12 +Ethernet52 52,53,54,55 Ethernet14/1 13 +Ethernet56 56,57,58,59 Ethernet15/1 14 +Ethernet60 60,61,62,63 Ethernet16/1 15 +Ethernet64 64,65,66,67 Ethernet17/1 16 +Ethernet68 68,69,70,71 Ethernet18/1 17 +Ethernet72 72,73,74,75 Ethernet19/1 18 +Ethernet76 76,77,78,79 Ethernet20/1 19 +Ethernet80 80,81,82,83 Ethernet21/1 20 +Ethernet84 84,85,86,87 Ethernet22/1 21 +Ethernet88 88,89,90,91 Ethernet23/1 22 +Ethernet92 92,93,94,95 Ethernet24/1 23 +Ethernet96 96,97,98,99 Ethernet25/1 24 +Ethernet100 100,101,102,103 Ethernet26/1 25 +Ethernet104 104,105,106,107 Ethernet27/1 26 +Ethernet108 108,109,110,111 Ethernet28/1 27 +Ethernet112 112,113,114,115 Ethernet29/1 28 +Ethernet116 116,117,118,119 Ethernet30/1 29 +Ethernet120 120,121,122,123 Ethernet31/1 30 +Ethernet124 124,125,126,127 Ethernet32/1 31 diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/port_config.nps b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/port_config.nps new file mode 100644 index 00000000000..49068859b25 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/port_config.nps @@ -0,0 +1,352 @@ +init start stage unit=0 low-level +init set port-map unit=0 port=0 eth-macro=0 lane=0 max-speed=100g active=true +init set port-map unit=0 port=1 eth-macro=1 lane=0 max-speed=100g active=true +init set port-map unit=0 port=2 eth-macro=2 lane=0 max-speed=100g active=true +init set port-map unit=0 port=3 eth-macro=3 lane=0 max-speed=100g active=true +init set port-map unit=0 port=4 eth-macro=4 lane=0 max-speed=100g active=true +init set port-map unit=0 port=5 eth-macro=5 lane=0 max-speed=100g active=true +init set port-map unit=0 port=6 eth-macro=6 lane=0 max-speed=100g active=true +init set port-map unit=0 port=7 eth-macro=7 lane=0 max-speed=100g active=true +init set port-map unit=0 port=8 eth-macro=8 lane=0 max-speed=100g active=true +init set port-map unit=0 port=9 eth-macro=9 lane=0 max-speed=100g active=true +init set port-map unit=0 port=10 eth-macro=10 lane=0 max-speed=100g active=true +init set port-map unit=0 port=11 eth-macro=11 lane=0 max-speed=100g active=true +init set port-map unit=0 port=12 eth-macro=12 lane=0 max-speed=100g active=true +init set port-map unit=0 port=13 eth-macro=13 lane=0 max-speed=100g active=true +init set port-map unit=0 port=14 eth-macro=14 lane=0 max-speed=100g active=true +init set port-map unit=0 port=15 eth-macro=15 lane=0 max-speed=100g active=true +init set port-map unit=0 port=16 eth-macro=16 lane=0 max-speed=100g active=true +init set port-map unit=0 port=17 eth-macro=17 lane=0 max-speed=100g active=true +init set port-map unit=0 port=18 eth-macro=18 lane=0 max-speed=100g active=true +init set port-map unit=0 port=19 eth-macro=19 lane=0 max-speed=100g active=true +init set port-map unit=0 port=20 eth-macro=20 lane=0 max-speed=100g active=true +init set port-map unit=0 port=21 eth-macro=21 lane=0 max-speed=100g active=true +init set port-map unit=0 port=22 eth-macro=22 lane=0 max-speed=100g active=true +init set port-map unit=0 port=23 eth-macro=23 lane=0 max-speed=100g active=true +init set port-map unit=0 port=24 eth-macro=24 lane=0 max-speed=100g active=true +init set port-map unit=0 port=25 eth-macro=25 lane=0 max-speed=100g active=true +init set port-map unit=0 port=26 eth-macro=26 lane=0 max-speed=100g active=true +init set port-map unit=0 port=27 eth-macro=27 lane=0 max-speed=100g active=true +init set port-map unit=0 port=28 eth-macro=28 lane=0 max-speed=100g active=true +init set port-map unit=0 port=29 eth-macro=29 lane=0 max-speed=100g active=true +init set port-map unit=0 port=30 eth-macro=30 lane=0 max-speed=100g active=true +init set port-map unit=0 port=31 eth-macro=31 lane=0 max-speed=100g active=true +init set port-map unit=0 port=129 eth-macro=0 lane=1 max-speed=10g active=true guarantee=true cpi=true +init set port-map unit=0 port=130 eth-macro=0 lane=0 max-speed=10g active=true guarantee=true cpi=true init-done=true +init start stage unit=0 task-rsrc +init start stage unit=0 module +init start stage unit=0 task +phy set lane-swap unit=0 portlist=0 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=1 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=2 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=3 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=4 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=5 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=6 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=7 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=8 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=9 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=10 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=11 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=12 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=13 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=14 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=15 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=16 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=17 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=18 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=19 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=20 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=21 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=22 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=23 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=24 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=25 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=26 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=27 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=28 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=29 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=30 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=31 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=129 lane-cnt=1 property=tx data=0x1 +phy set lane-swap unit=0 portlist=130 lane-cnt=1 property=tx data=0x0 +phy set lane-swap unit=0 portlist=0 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=1 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=2 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=3 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=4 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=5 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=6 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=7 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=8 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=9 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=10 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=11 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=12 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=13 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=14 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=15 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=16 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=17 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=18 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=19 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=20 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=21 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=22 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=23 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=24 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=25 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=26 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=27 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=28 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=29 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=30 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=31 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=129 lane-cnt=1 property=rx data=0x1 +phy set lane-swap unit=0 portlist=130 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=0 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=1 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=2 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=3 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=4 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=5 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=6 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=7 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=8 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=9 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=10 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=11 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=12 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=13 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=14 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=15 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=16 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=17 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=18 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=19 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=20 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=21 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=22 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=23 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=24 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=25 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=26 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=27 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=28 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=29 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=30 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=31 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=129 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=130 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev unit=0 portlist=0 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=1 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=2 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=3 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=4 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=5 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=6 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=7 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=8 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=9 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=10 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=11 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=12 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=13 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=14 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=15 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=16 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=17 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=18 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=19 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=20 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=21 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=22 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=23 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=24 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=25 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=26 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=27 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=28 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=29 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=30 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=31 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev unit=0 portlist=129 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev unit=0 portlist=130 lane-cnt=1 property=rx data=0x0 +phy set pre-emphasis unit=0 portlist=0 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=0 lane-cnt=4 property=cn1 data=0x01.01.01.01 +phy set pre-emphasis unit=0 portlist=0 lane-cnt=4 property=c0 data=0x1A.1A.1A.1A +phy set pre-emphasis unit=0 portlist=0 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis unit=0 portlist=1 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=1 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=1 lane-cnt=4 property=c0 data=0x1A.1A.1A.1A +phy set pre-emphasis unit=0 portlist=1 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis unit=0 portlist=2 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=2 lane-cnt=4 property=cn1 data=0x01.01.01.01 +phy set pre-emphasis unit=0 portlist=2 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=2 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis unit=0 portlist=3 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=3 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=3 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=3 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis unit=0 portlist=4 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=4 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=4 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=4 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=5 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=5 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=5 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=5 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis unit=0 portlist=6 lane-cnt=4 property=c2 data=0x03.03.03.03 +phy set pre-emphasis unit=0 portlist=6 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=6 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=6 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis unit=0 portlist=7 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=7 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=7 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=7 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=8 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=8 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=8 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=8 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=9 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=9 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=9 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=9 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=10 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=10 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=10 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=10 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=11 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=11 lane-cnt=4 property=cn1 data=0x01.01.01.01 +phy set pre-emphasis unit=0 portlist=11 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=11 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=12 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=12 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=12 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=12 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=13 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=13 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=13 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=13 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=14 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=14 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=14 lane-cnt=4 property=c0 data=0x1D.1D.1D.1D +phy set pre-emphasis unit=0 portlist=14 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis unit=0 portlist=15 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=15 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=15 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=15 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=16 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=16 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=16 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=16 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis unit=0 portlist=17 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=17 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=17 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=17 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=18 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=18 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=18 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=18 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=19 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=19 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=19 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=19 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=20 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=20 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=20 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=20 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=21 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=21 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=21 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=21 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=22 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=22 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=22 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=22 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=23 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=23 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=23 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=23 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=24 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=24 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=24 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=24 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=25 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=25 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=25 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=25 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=26 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=26 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=26 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=26 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=27 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=27 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=27 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=27 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=28 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=28 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=28 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=28 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis unit=0 portlist=29 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=29 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=29 lane-cnt=4 property=c0 data=0x1A.1A.1A.1A +phy set pre-emphasis unit=0 portlist=29 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis unit=0 portlist=30 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=30 lane-cnt=4 property=cn1 data=0x01.01.01.01 +phy set pre-emphasis unit=0 portlist=30 lane-cnt=4 property=c0 data=0x1A.1A.1A.1A +phy set pre-emphasis unit=0 portlist=30 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis unit=0 portlist=31 lane-cnt=4 property=c2 data=0x01.01.01.01 +phy set pre-emphasis unit=0 portlist=31 lane-cnt=4 property=cn1 data=0x03.03.03.03 +phy set pre-emphasis unit=0 portlist=31 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis unit=0 portlist=31 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis unit=0 portlist=129 lane-cnt=1 property=c2 data=0x01 +phy set pre-emphasis unit=0 portlist=129 lane-cnt=1 property=cn1 data=0x01 +phy set pre-emphasis unit=0 portlist=129 lane-cnt=1 property=c0 data=0x02 +phy set pre-emphasis unit=0 portlist=129 lane-cnt=1 property=c1 data=0x03 +phy set pre-emphasis unit=0 portlist=130 lane-cnt=1 property=c2 data=0x01 +phy set pre-emphasis unit=0 portlist=130 lane-cnt=1 property=cn1 data=0x01 +phy set pre-emphasis unit=0 portlist=130 lane-cnt=1 property=c0 data=0x02 +phy set pre-emphasis unit=0 portlist=130 lane-cnt=1 property=c1 data=0x03 +phy set mdio portlist=0 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=1 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=2 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=3 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=4 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=5 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=6 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=7 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=8 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=9 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=10 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=11 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=12 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=13 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=14 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=15 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=16 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=17 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=18 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=19 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=20 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=21 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=22 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=23 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=24 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=25 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=26 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=27 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=28 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=29 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=30 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=31 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=129 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=130 devad=0x1E addr=0x2 data=0x0000 +port set property unit=0 portlist=0-31 speed=100g +port set property unit=0 portlist=129-130 speed=10g +port set property unit=0 portlist=0-31 medium-type=sr4 +port set property unit=0 portlist=129-130 medium-type=kr +port set property unit=0 portlist=0-31 fec=disable +port set adver unit=0 portlist=129-130 speed-10g-kr +port set property unit=0 portlist=129-130 an=enable +port set property unit=0 portlist=0-31,129-130 admin=enable diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/qos.json.j2 b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/qos.json.j2 new file mode 100644 index 00000000000..42eef17c362 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/qos.json.j2 @@ -0,0 +1,136 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "1", + "1": "0", + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "3": "3", + "4": "4" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "1", + "1": "0", + "3": "3", + "4": "4" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"1", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + }, + "WRED_PROFILE": { + "AZURE_LOSSY" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"516096", + "red_min_threshold":"516096", + "yellow_max_threshold":"516096", + "yellow_min_threshold":"516096", + "green_max_threshold": "184128", + "green_min_threshold": "184128" + }, + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"516096", + "red_min_threshold":"516096", + "yellow_max_threshold":"516096", + "yellow_min_threshold":"516096", + "green_max_threshold": "184128", + "green_min_threshold": "184128" + } + }, + "QUEUE": { + } +} diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/sai.profile b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/sai.profile new file mode 100644 index 00000000000..880f47910ac --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/platform/led_proc_init.nps +SAI_DSH_CONFIG_FILE=/usr/share/sonic/hwsku/port_config.nps diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/default_sku new file mode 100644 index 00000000000..2464f73308e --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S9130-32X t1 diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/fancontrol b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/fancontrol new file mode 100644 index 00000000000..5ed165966b9 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/fancontrol @@ -0,0 +1,12 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH=hwmon5=devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-8/8-002f +DEVNAME=hwmon5=w83795adg +FCTEMPS=hwmon5/device/pwm2=hwmon1/temp1_input hwmon5/device/pwm1=hwmon1/temp1_input +FCFANS=hwmon5/device/pwm2=hwmon5/device/fan8_input hwmon5/device/pwm2=hwmon5/device/fan7_input hwmon5/device/pwm2=hwmon5/device/fan6_input hwmon5/device/pwm2=hwmon5/device/fan5_input hwmon5/device/pwm1=hwmon5/device/fan4_input hwmon5/device/pwm1=hwmon5/device/fan3_input hwmon5/device/pwm1=hwmon5/device/fan2_input hwmon5/device/pwm1=hwmon5/device/fan1_input +# TODO: check the temp value with HW after board ready +MINTEMP=hwmon5/device/pwm2=20 hwmon5/device/pwm1=20 +MAXTEMP=hwmon5/device/pwm2=60 hwmon5/device/pwm1=60 +MINSTART=hwmon5/device/pwm2=75 hwmon5/device/pwm1=75 +MINSTOP=hwmon5/device/pwm2=22 hwmon5/device/pwm1=22 + diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/installer.conf b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/led_proc_init.nps b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/led_proc_init.nps new file mode 100644 index 00000000000..d1695e36b59 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/led_proc_init.nps @@ -0,0 +1,9 @@ +#unit NPS_CFG_TYPE_XXX param0 param1 value +#---- ---------------- ------ ------ ----- +0 NPS_CFG_TYPE_USE_UNIT_PORT 0 0 1 +0 NPS_CFG_TYPE_LED_CFG 0 0 1 +0 NPS_CFG_TYPE_CPI_PORT_MODE 129 0 1 +0 NPS_CFG_TYPE_CPI_PORT_MODE 130 0 1 +0 NPS_CFG_TYPE_USER_BUF_CTRL 0 0 1 +0 NPS_CFG_TYPE_HASH_L2_FDB_REGION_ENTRY_NUM 0 0 49152 +0 NPS_CFG_TYPE_HASH_L3_WITH_IPV6_PREFIX_64_REGION_ENTRY_NUM 0 0 32768 diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/eeprom.py b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..71ce941f1ab --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Ingrasys S9130-32X +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0051/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/psuutil.py b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/psuutil.py new file mode 100644 index 00000000000..4a029c15b1a --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/psuutil.py @@ -0,0 +1,92 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + SYSFS_PSU_DIR = ["/sys/bus/i2c/devices/i2c-10/10-0050", + "/sys/bus/i2c/devices/i2c-9/9-0050"] + + def __init__(self): + PsuBase.__init__(self) + + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psu_pg' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU status + if (attr_value == 1): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + attr_file ='psu_abs' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU presence + if (attr_value == 0): + status = 1 + + return status + diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..4827ad3bfa8 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/sfputil.py @@ -0,0 +1,220 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +import os + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 31 + PORTS_IN_BLOCK = 32 + EEPROM_OFFSET = 21 + ABS_GPIO_BASE_0_15 = 240 + ABS_GPIO_BASE_16_31 = 224 + LP_MODE_GPIO_BASE_0_15 = 176 + LP_MODE_GPIO_BASE_16_31 = 160 + RST_GPIO_BASE_0_15 = 144 + RST_GPIO_BASE_16_31 = 128 + GPIO_OFFSET = 0 + + GPIO_VAL_PATH = "/sys/class/gpio/gpio{0}/value" + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def set_gpio_offset(self): + sys_gpio_dir = "/sys/class/gpio" + self.GPIO_OFFSET = 0 + gpiochip_no = 0 + for d in os.listdir(sys_gpio_dir): + if "gpiochip" in d: + try: + gpiochip_no = int(d[8:],10) + except ValueError as e: + print "Error: %s" % str(e) + if gpiochip_no > 255: + self.GPIO_OFFSET=256 + return True + return True + + def update_gpio_base(self): + self.ABS_GPIO_BASE_0_15 = 240 + self.GPIO_OFFSET + self.ABS_GPIO_BASE_16_31 = 224 + self.GPIO_OFFSET + self.LP_MODE_GPIO_BASE_0_15 = 176 + self.GPIO_OFFSET + self.LP_MODE_GPIO_BASE_16_31 = 160 + self.GPIO_OFFSET + self.RST_GPIO_BASE_0_15 = 144 + self.GPIO_OFFSET + self.RST_GPIO_BASE_16_31 = 128 + self.GPIO_OFFSET + return True + + def __init__(self): + # Update abs, lpmode, and reset gpio base + self.set_gpio_offset() + self.update_gpio_base() + + # Override port_to_eeprom_mapping for class initialization + eeprom_path = '/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom' + for x in range(self.port_start, self.port_end + 1): + port_eeprom_path = eeprom_path.format(x + self.EEPROM_OFFSET) + self.port_to_eeprom_mapping[x] = port_eeprom_path + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # open corrsponding gpio file + try: + if port_num <= 15: + gpio_base = self.ABS_GPIO_BASE_0_15 + else : + gpio_base = self.ABS_GPIO_BASE_16_31 + gpio_index = gpio_base + (port_num % 16) + gpio_file_path = self.GPIO_VAL_PATH.format(gpio_index) + gpio_file = open(gpio_file_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # content is a string containing the gpio value + gpio_val = int(gpio_file.readline().rstrip()) + gpio_file.close() + + # the gpio pin is ACTIVE_LOW but reversed + if gpio_val == 0: + return False + + return True + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # open corrsponding gpio file + try: + if port_num <= 15: + gpio_base = self.LP_MODE_GPIO_BASE_0_15 + else : + gpio_base = self.LP_MODE_GPIO_BASE_16_31 + gpio_index = gpio_base + (port_num % 16) + gpio_file_path = self.GPIO_VAL_PATH.format(gpio_index) + gpio_file = open(gpio_file_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # content is a string containing the gpio value + gpio_val = int(gpio_file.readline().rstrip()) + gpio_file.close() + + if gpio_val == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # open corrsponding gpio file + try: + if port_num <= 15: + gpio_base = self.LP_MODE_GPIO_BASE_0_15 + else : + gpio_base = self.LP_MODE_GPIO_BASE_16_31 + gpio_index = gpio_base + (port_num % 16) + gpio_file_path = self.GPIO_VAL_PATH.format(gpio_index) + gpio_file = open(gpio_file_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # the gpio pin is ACTIVE_HIGH + if lpmode is True: + gpio_val = "1" + else: + gpio_val = "0" + + # write value to gpio + gpio_file.seek(0) + gpio_file.write(gpio_val) + gpio_file.close() + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # open corrsponding gpio file + try: + if port_num <= 15: + gpio_base = self.RST_GPIO_BASE_0_15 + else : + gpio_base = self.RST_GPIO_BASE_16_31 + gpio_index = gpio_base + (port_num % 16) + gpio_file_path = self.GPIO_VAL_PATH.format(gpio_index) + gpio_file = open(gpio_file_path, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # set the gpio to take port into reset + # the gpio pin is ACTIVE_LOW but reversed + gpio_val = "1" + # write value to gpio + gpio_file.seek(0) + gpio_file.write(gpio_val) + gpio_file.close() + + # Sleep 1 second to let it settle + time.sleep(1) + + # open corrsponding gpio file + try: + gpio_file = open(gpio_file_path, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # set gpio back low to take port out of reset + # the gpio pin is ACTIVE_LOW but reversed + gpio_val = "0" + # write value to gpio + gpio_file.seek(0) + gpio_file.write(gpio_val) + gpio_file.close() + + return True + + def get_transceiver_change_event(self, timeout=0): + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/sensors.conf b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/sensors.conf new file mode 100644 index 00000000000..9b55f73af2a --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/sensors.conf @@ -0,0 +1,69 @@ +# libsensors configuration file +chip "i350bb-*" + ignore loc1 + +chip "jc42-*" + +bus "i2c-8" "i2c-mux-0 (chan_id 7)" +chip "w83795adg-*" + label in0 "0.9V" + set in0_max 0.945 + set in0_min 0.855 + label in1 "VDD_CORE" + set in1_max 0.945 + set in1_min 0.855 + label in2 "1.2V" + set in2_max 1.26 + set in2_min 1.14 + label in3 "1.8V" + set in3_max 1.89 + set in3_min 1.71 + label in4 "1.01V" + set in4_max 1.0605 + set in4_min 0.9595 + ignore in5 + ignore in6 + ignore in7 + ignore in11 + label in12 "3.3VDD" + set in12_max 3.465 + set in12_min 3.135 + # in12 and in13 are the same source + ignore in13 + label fan1 "FANTRAY 1-A" + label fan2 "FANTRAY 1-B" + label fan3 "FANTRAY 2-A" + label fan4 "FANTRAY 2-B" + label fan5 "FANTRAY 3-A" + label fan6 "FANTRAY 3-B" + label fan7 "FANTRAY 4-A" + label fan8 "FANTRAY 4-B" + ignore temp1 + ignore temp2 + ignore temp3 + ignore temp4 + ignore temp5 + ignore temp6 + ignore intrusion0 + +chip "tmp75-i2c-*-4A" + label temp1 "BMC board Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +bus "i2c-0" "i2c-main" +chip "tmp75-i2c-*-4F" + label temp1 "x86 CPU board Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +bus "i2c-12" "i2c-mux-1 (chan_id 3)" +chip "tmp75-i2c-*-4C" + label temp1 "rear MAC Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +chip "tmp75-i2c-*-49" + label temp1 "front MAC Temp" + set temp1_max 50 + set temp1_max_hyst 45 diff --git a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/INGRASYS-S9180-32X/port_config.ini b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/INGRASYS-S9180-32X/port_config.ini new file mode 100644 index 00000000000..8b25c1333a6 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/INGRASYS-S9180-32X/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias speed autoneg fec index +Ethernet0 0,1,2,3 Ethernet0 100000 0 none 0 +Ethernet4 4,5,6,7 Ethernet4 100000 0 none 1 +Ethernet8 8,9,10,11 Ethernet8 100000 0 none 2 +Ethernet12 12,13,14,15 Ethernet12 100000 0 none 3 +Ethernet16 16,17,18,19 Ethernet16 100000 0 none 4 +Ethernet20 20,21,22,23 Ethernet20 100000 0 none 5 +Ethernet24 24,25,26,27 Ethernet24 100000 0 none 6 +Ethernet28 28,29,30,31 Ethernet28 100000 0 none 7 +Ethernet32 32,33,34,35 Ethernet32 100000 0 none 8 +Ethernet36 36,37,38,39 Ethernet36 100000 0 none 9 +Ethernet40 40,41,42,43 Ethernet40 100000 0 none 10 +Ethernet44 44,45,46,47 Ethernet44 100000 0 none 11 +Ethernet48 48,49,50,51 Ethernet48 100000 0 none 12 +Ethernet52 52,53,54,55 Ethernet52 100000 0 none 13 +Ethernet56 56,57,58,59 Ethernet56 100000 0 none 14 +Ethernet60 60,61,62,63 Ethernet60 100000 0 none 15 +Ethernet64 64,65,66,67 Ethernet64 100000 0 none 16 +Ethernet68 68,69,70,71 Ethernet68 100000 0 none 17 +Ethernet72 72,73,74,75 Ethernet72 100000 0 none 18 +Ethernet76 76,77,78,79 Ethernet76 100000 0 none 19 +Ethernet80 80,81,82,83 Ethernet80 100000 0 none 20 +Ethernet84 84,85,86,87 Ethernet84 100000 0 none 21 +Ethernet88 88,89,90,91 Ethernet88 100000 0 none 22 +Ethernet92 92,93,94,95 Ethernet92 100000 0 none 23 +Ethernet96 96,97,98,99 Ethernet96 100000 0 none 24 +Ethernet100 100,101,102,103 Ethernet100 100000 0 none 25 +Ethernet104 104,105,106,107 Ethernet104 100000 0 none 26 +Ethernet108 108,109,110,111 Ethernet108 100000 0 none 27 +Ethernet112 112,113,114,115 Ethernet112 100000 0 none 28 +Ethernet116 116,117,118,119 Ethernet116 100000 0 none 29 +Ethernet120 120,121,122,123 Ethernet120 100000 0 none 30 +Ethernet124 124,125,126,127 Ethernet124 100000 0 none 31 diff --git a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/INGRASYS-S9180-32X/switch-sai.conf b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/INGRASYS-S9180-32X/switch-sai.conf new file mode 100644 index 00000000000..bf15b40d0c5 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/INGRASYS-S9180-32X/switch-sai.conf @@ -0,0 +1,33 @@ +{ + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0", + "pcie_domain": 0, + "pcie_bus": 5, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "instance": 0, + "p4_program_list": [ + { + "id": "pgm-0", + "instance": 0, + "path": "switch", + "program-name": "switch", + "pd": "lib/tofinopd/switch/libpd.so", + "pd-thrift": "lib/tofinopd/switch/libpdthrift.so", + "table-config": "share/tofinopd/switch/context.json", + "tofino-bin": "share/tofinopd/switch/tofino.bin", + "switchapi": "lib/libswitchapi.so", + "sai": "lib/libsai.so", + "agent0": "lib/platform/x86_64-ingrasys_s9180_32x-r0/libpltfm_mgr.so", + "switchapi_port_add": false + } + ] +} diff --git a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/INGRASYS-S9180-32X/switch-tna-sai.conf b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/INGRASYS-S9180-32X/switch-tna-sai.conf new file mode 100644 index 00000000000..9fbf9d3cdb6 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/INGRASYS-S9180-32X/switch-tna-sai.conf @@ -0,0 +1,40 @@ +{ + "instance": 0, + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0", + "pcie_domain": 0, + "pcie_bus": 5, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "p4_devices": [ + { + "device-id": 0, + "agent0": "lib/platform/x86_64-ingrasys_s9180_32x-r0/libpltfm_mgr.so", + "p4_programs": [ + { + "p4_pipelines": [ + { + "p4_pipeline_name": "pipe", + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" + } + ], + "program-name": "switch", + "sai": "lib/libsai.so", + "bfrt-config": "share/switch/bf-rt.json", + "model_json_path" : "share/switch/aug_model.json", + "switchapi_port_add": false, + "non_default_port_ppgs": 5 + } + ] + } + ] +} diff --git a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/default_sku new file mode 100644 index 00000000000..984f54a96e2 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S9180-32X t1 diff --git a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/fancontrol b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/fancontrol new file mode 100644 index 00000000000..dc303afac03 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/fancontrol @@ -0,0 +1,12 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH=hwmon1=devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-56/56-002f +DEVNAME=hwmon1=w83795adg +FCTEMPS=hwmon1/device/pwm2=hwmon2/temp2_input hwmon1/device/pwm1=hwmon2/temp2_input +FCFANS=hwmon1/device/pwm2=hwmon1/device/fan8_input hwmon1/device/pwm2=hwmon1/device/fan7_input hwmon1/device/pwm2=hwmon1/device/fan6_input hwmon1/device/pwm2=hwmon1/device/fan5_input hwmon1/device/pwm1=hwmon1/device/fan4_input hwmon1/device/pwm1=hwmon1/device/fan3_input hwmon1/device/pwm1=hwmon1/device/fan2_input hwmon1/device/pwm1=hwmon1/device/fan1_input +# TODO: check the temp value with HW after board ready +MINTEMP=hwmon1/device/pwm2=20 hwmon1/device/pwm1=20 +MAXTEMP=hwmon1/device/pwm2=60 hwmon1/device/pwm1=60 +MINSTART=hwmon1/device/pwm2=75 hwmon1/device/pwm1=75 +MINSTOP=hwmon1/device/pwm2=22 hwmon1/device/pwm1=22 + diff --git a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/installer.conf b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/plugins/eeprom.py b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..d1270eeffbf --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Ingrasys S9180-32X +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0055/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/plugins/psuutil.py b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/plugins/psuutil.py new file mode 100644 index 00000000000..25cdfb03188 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/plugins/psuutil.py @@ -0,0 +1,107 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + GPIO_OFFSET = 0 + SYS_GPIO_DIR = "/sys/class/gpio/" + + def set_gpio_offset(self): + sys_gpio_dir = "/sys/class/gpio" + self.GPIO_OFFSET = 0 + gpiochip_no = 0 + for d in os.listdir(sys_gpio_dir): + if "gpiochip" in d: + try: + gpiochip_no = int(d[8:],10) + except ValueError as e: + print "Error: %s" % str(e) + if gpiochip_no > 255: + self.GPIO_OFFSET=256 + return True + return True + + def __init__(self): + self.set_gpio_offset() + PsuBase.__init__(self) + + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + gpio_path = [ 'gpio'+str(99+self.GPIO_OFFSET)+'/value', 'gpio'+str(96+self.GPIO_OFFSET)+'/value' ] + attr_path = self.SYS_GPIO_DIR + gpio_path[index-1] + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 10) + # Check for PSU status + if (attr_value == 1): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + gpio_path = [ 'gpio'+str(100+self.GPIO_OFFSET)+'/value', 'gpio'+str(97+self.GPIO_OFFSET)+'/value' ] + attr_path = self.SYS_GPIO_DIR + gpio_path[index-1] + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 10) + # Check for PSU status + if (attr_value == 1): + status = 1 + + return status + diff --git a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..00c5e10e0b0 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/plugins/sfputil.py @@ -0,0 +1,332 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +import os + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 33 + SFP_PORT_START = 32 + PORTS_IN_BLOCK = 34 + GPIO_OFFSET = 0 + + BASE_DIR_PATH = "/sys/class/gpio/gpio{0}/direction" + BASE_VAL_PATH = "/sys/class/gpio/gpio{0}/value" + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0: 10, + 1: 9, + 2: 12, + 3: 11, + 4: 14, + 5: 13, + 6: 16, + 7: 15, + 8: 18, + 9: 17, + 10: 20, + 11: 19, + 12: 22, + 13: 21, + 14: 24, + 15: 23, + 16: 26, + 17: 25, + 18: 28, + 19: 27, + 20: 30, + 21: 29, + 22: 32, + 23: 31, + 24: 34, + 25: 33, + 26: 36, + 27: 35, + 28: 38, + 29: 37, + 30: 40, + 31: 39, + 32: 45, + 33: 46 + } + + abs_to_gpio_mapping = {} + lpmode_to_gpio_mapping = {} + reset_to_gpio_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + @property + def sfp_port_start(self): + return self.SFP_PORT_START + + def set_gpio_offset(self): + sys_gpio_dir = "/sys/class/gpio" + self.GPIO_OFFSET = 0 + gpiochip_no = 0 + for d in os.listdir(sys_gpio_dir): + if "gpiochip" in d: + try: + gpiochip_no = int(d[8:],10) + except ValueError as e: + print "Error: %s" % str(e) + if gpiochip_no > 255: + self.GPIO_OFFSET=256 + return True + return True + + def init_abs_to_gpio_mapping(self): + self.abs_to_gpio_mapping = { + 0: 241+self.GPIO_OFFSET, + 1: 240+self.GPIO_OFFSET, + 2: 243+self.GPIO_OFFSET, + 3: 242+self.GPIO_OFFSET, + 4: 245+self.GPIO_OFFSET, + 5: 244+self.GPIO_OFFSET, + 6: 247+self.GPIO_OFFSET, + 7: 246+self.GPIO_OFFSET, + 8: 249+self.GPIO_OFFSET, + 9: 248+self.GPIO_OFFSET, + 10: 251+self.GPIO_OFFSET, + 11: 250+self.GPIO_OFFSET, + 12: 253+self.GPIO_OFFSET, + 13: 252+self.GPIO_OFFSET, + 14: 255+self.GPIO_OFFSET, + 15: 254+self.GPIO_OFFSET, + 16: 225+self.GPIO_OFFSET, + 17: 224+self.GPIO_OFFSET, + 18: 227+self.GPIO_OFFSET, + 19: 226+self.GPIO_OFFSET, + 20: 229+self.GPIO_OFFSET, + 21: 228+self.GPIO_OFFSET, + 22: 231+self.GPIO_OFFSET, + 23: 230+self.GPIO_OFFSET, + 24: 233+self.GPIO_OFFSET, + 25: 232+self.GPIO_OFFSET, + 26: 235+self.GPIO_OFFSET, + 27: 234+self.GPIO_OFFSET, + 28: 237+self.GPIO_OFFSET, + 29: 236+self.GPIO_OFFSET, + 30: 239+self.GPIO_OFFSET, + 31: 238+self.GPIO_OFFSET, + 32: 177+self.GPIO_OFFSET, + 33: 176+self.GPIO_OFFSET + } + return True + + def init_lpmode_to_gpio_mapping(self): + self.lpmode_to_gpio_mapping = { + 0: 161+self.GPIO_OFFSET, + 1: 160+self.GPIO_OFFSET, + 2: 163+self.GPIO_OFFSET, + 3: 162+self.GPIO_OFFSET, + 4: 165+self.GPIO_OFFSET, + 5: 164+self.GPIO_OFFSET, + 6: 167+self.GPIO_OFFSET, + 7: 166+self.GPIO_OFFSET, + 8: 169+self.GPIO_OFFSET, + 9: 168+self.GPIO_OFFSET, + 10: 171+self.GPIO_OFFSET, + 11: 170+self.GPIO_OFFSET, + 12: 173+self.GPIO_OFFSET, + 13: 172+self.GPIO_OFFSET, + 14: 175+self.GPIO_OFFSET, + 15: 174+self.GPIO_OFFSET, + 16: 145+self.GPIO_OFFSET, + 17: 144+self.GPIO_OFFSET, + 18: 147+self.GPIO_OFFSET, + 19: 146+self.GPIO_OFFSET, + 20: 149+self.GPIO_OFFSET, + 21: 148+self.GPIO_OFFSET, + 22: 151+self.GPIO_OFFSET, + 23: 150+self.GPIO_OFFSET, + 24: 153+self.GPIO_OFFSET, + 25: 152+self.GPIO_OFFSET, + 26: 155+self.GPIO_OFFSET, + 27: 154+self.GPIO_OFFSET, + 28: 157+self.GPIO_OFFSET, + 29: 156+self.GPIO_OFFSET, + 30: 159+self.GPIO_OFFSET, + 31: 158+self.GPIO_OFFSET + } + return True + + def init_reset_to_gpio_mapping(self): + self.reset_to_gpio_mapping = { + 0: 129+self.GPIO_OFFSET, + 1: 128+self.GPIO_OFFSET, + 2: 131+self.GPIO_OFFSET, + 3: 130+self.GPIO_OFFSET, + 4: 133+self.GPIO_OFFSET, + 5: 132+self.GPIO_OFFSET, + 6: 135+self.GPIO_OFFSET, + 7: 134+self.GPIO_OFFSET, + 8: 137+self.GPIO_OFFSET, + 9: 136+self.GPIO_OFFSET, + 10: 139+self.GPIO_OFFSET, + 11: 138+self.GPIO_OFFSET, + 12: 141+self.GPIO_OFFSET, + 13: 140+self.GPIO_OFFSET, + 14: 143+self.GPIO_OFFSET, + 15: 142+self.GPIO_OFFSET, + 16: 113+self.GPIO_OFFSET, + 17: 112+self.GPIO_OFFSET, + 18: 115+self.GPIO_OFFSET, + 19: 114+self.GPIO_OFFSET, + 20: 117+self.GPIO_OFFSET, + 21: 116+self.GPIO_OFFSET, + 22: 119+self.GPIO_OFFSET, + 23: 118+self.GPIO_OFFSET, + 24: 121+self.GPIO_OFFSET, + 25: 120+self.GPIO_OFFSET, + 26: 123+self.GPIO_OFFSET, + 27: 122+self.GPIO_OFFSET, + 28: 125+self.GPIO_OFFSET, + 29: 124+self.GPIO_OFFSET, + 30: 127+self.GPIO_OFFSET, + 31: 126+self.GPIO_OFFSET + } + return True + + def __init__(self): + # Init abs, lpmode, and reset to gpio mapping + self.set_gpio_offset() + self.init_abs_to_gpio_mapping() + self.init_lpmode_to_gpio_mapping() + self.init_reset_to_gpio_mapping() + + # Override port_to_eeprom_mapping for class initialization + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(self.port_start, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + abs_device_file = self.BASE_VAL_PATH.format( + self.abs_to_gpio_mapping[port_num]) + val_file = open(abs_device_file) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.sfp_port_start: # TBD + return False + + try: + lpmode_val_device_file = self.BASE_VAL_PATH.format( + self.lpmode_to_gpio_mapping[port_num]) + val_file = open(lpmode_val_device_file) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + # content is a string, either "0" or "1" + if content == "1": + return True + + return False + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.sfp_port_start: # TBD + return False + + try: + lpmode_val_device_file = self.BASE_VAL_PATH.format( + self.lpmode_to_gpio_mapping[port_num]) + val_file = open(lpmode_val_device_file, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + val_file.write("1" if lpmode is True else "0") + val_file.close() + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.sfp_port_start: # TBD + return False + + try: + reset_val_device_file = self.BASE_VAL_PATH.format( + self.reset_to_gpio_mapping[port_num]) + val_file = open(reset_val_device_file, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + val_file.write("1") + val_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + try: + reset_val_device_file = self.BASE_VAL_PATH.format( + self.reset_to_gpio_mapping[port_num]) + val_file = open(reset_val_device_file, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + val_file.write("0") + val_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/sensors.conf b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/sensors.conf new file mode 100644 index 00000000000..eb991d771d1 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9180_32x-r0/sensors.conf @@ -0,0 +1,76 @@ +# libsensors configuration file +chip "i350bb-*" + ignore loc1 + +chip "jc42-*" + label temp1 "DIMM Temp" + set temp1_max 50 + set temp1_crit 85 + +bus "i2c-0" "I2C I801" +chip "tmp75-i2c-*-4f" + label temp1 "CPU Board Temp" + set temp1_max 50 + +bus "i2c-41" "i2c-7-switch (chan_id 0)" +chip "tmp75-i2c-*-48" + label temp1 "Near PSU1" + set temp1_max 50 +chip "tmp75-i2c-*-4a" + label temp1 "Rear MAC" + set temp1_max 50 +chip "tmp75-i2c-*-4b" + label temp1 "Near Port 32" + set temp1_max 50 +chip "tmp75-i2c-*-4d" + label temp1 "Near PSU2" + set temp1_max 50 +chip "lm86-i2c-*-4c" + label temp1 "Front MAC" + label temp2 "ASIC Core Temp" + set temp1_min 20 + set temp1_max 65 + set temp1_crit 70 + set temp2_min 20 + set temp2_max 70 + set temp2_crit 80 + +bus "i2c-56" "i2c-0-mux (chan_id 7)" +chip "w83795adg-*" + label in0 "0.9V" + set in0_max 0.927 + set in0_min 0.873 + label in1 "VDD" + set in1_max 0.962 + set in1_min 0.717 + ignore in2 + ignore in3 + ignore in4 + ignore in5 + ignore in6 + ignore in7 + label in12 "2.5V" + #compute in12 (2*4*@)/10, @-(2*4*@/10) + compute in12 @/(1+(3/10)), @*(1+(3/10)) + set in12_max 2.625 + set in12_min 2.375 + # in12 and in13 are the same source + ignore in13 + ignore in14 + ignore in15 + ignore in16 + label fan1 "FANTRAY 1-A" + label fan2 "FANTRAY 1-B" + label fan3 "FANTRAY 2-A" + label fan4 "FANTRAY 2-B" + label fan5 "FANTRAY 3-A" + label fan6 "FANTRAY 3-B" + label fan7 "FANTRAY 4-A" + label fan8 "FANTRAY 4-B" + ignore temp1 + ignore temp2 + ignore temp3 + ignore temp4 + ignore temp5 + ignore temp6 + ignore intrusion0 diff --git a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/INGRASYS-S9200-64X/port_config.ini b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/INGRASYS-S9200-64X/port_config.ini new file mode 100644 index 00000000000..c1d2642fab8 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/INGRASYS-S9200-64X/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias index +Ethernet0 49,50,51,52 Ethernet1/1 0 +Ethernet4 53,54,55,56 Ethernet2/1 1 +Ethernet8 65,66,67,68 Ethernet3/1 2 +Ethernet12 69,70,71,72 Ethernet4/1 3 +Ethernet16 81,82,83,84 Ethernet5/1 4 +Ethernet20 85,86,87,88 Ethernet6/1 5 +Ethernet24 1,2,3,4 Ethernet7/1 6 +Ethernet28 5,6,7,8 Ethernet8/1 7 +Ethernet32 17,18,19,20 Ethernet9/1 8 +Ethernet36 21,22,23,24 Ethernet10/1 9 +Ethernet40 33,34,35,36 Ethernet11/1 10 +Ethernet44 37,38,39,40 Ethernet12/1 11 +Ethernet48 97,98,99,100 Ethernet13/1 12 +Ethernet52 101,102,103,104 Ethernet14/1 13 +Ethernet56 113,114,115,116 Ethernet15/1 14 +Ethernet60 117,118,119,120 Ethernet16/1 15 +Ethernet64 129,130,131,132 Ethernet17/1 16 +Ethernet68 133,134,135,136 Ethernet18/1 17 +Ethernet72 145,146,147,148 Ethernet19/1 18 +Ethernet76 149,150,151,152 Ethernet20/1 19 +Ethernet80 209,210,211,212 Ethernet21/1 20 +Ethernet84 213,214,215,216 Ethernet22/1 21 +Ethernet88 225,226,227,228 Ethernet23/1 22 +Ethernet92 229,230,231,232 Ethernet24/1 23 +Ethernet96 241,242,243,244 Ethernet25/1 24 +Ethernet100 245,246,247,248 Ethernet26/1 25 +Ethernet104 161,162,163,164 Ethernet27/1 26 +Ethernet108 165,166,167,168 Ethernet28/1 27 +Ethernet112 177,178,179,180 Ethernet29/1 28 +Ethernet116 181,182,183,184 Ethernet30/1 29 +Ethernet120 193,194,195,196 Ethernet31/1 30 +Ethernet124 197,198,199,200 Ethernet32/1 31 +Ethernet128 57,58,59,60 Ethernet33/1 32 +Ethernet132 61,62,63,64 Ethernet34/1 33 +Ethernet136 73,74,75,76 Ethernet35/1 34 +Ethernet140 77,78,79,80 Ethernet36/1 35 +Ethernet144 89,90,91,92 Ethernet37/1 36 +Ethernet148 93,94,95,96 Ethernet38/1 37 +Ethernet152 9,10,11,12 Ethernet39/1 38 +Ethernet156 13,14,15,16 Ethernet40/1 39 +Ethernet160 25,26,27,28 Ethernet41/1 40 +Ethernet164 29,30,31,32 Ethernet42/1 41 +Ethernet168 41,42,43,44 Ethernet43/1 42 +Ethernet172 45,46,47,48 Ethernet44/1 43 +Ethernet176 105,106,107,108 Ethernet45/1 44 +Ethernet180 109,110,111,112 Ethernet46/1 45 +Ethernet184 121,122,123,124 Ethernet47/1 46 +Ethernet188 125,126,127,128 Ethernet48/1 47 +Ethernet192 137,138,139,140 Ethernet49/1 48 +Ethernet196 141,142,143,144 Ethernet50/1 49 +Ethernet200 153,154,155,156 Ethernet51/1 50 +Ethernet204 157,158,159,160 Ethernet52/1 51 +Ethernet208 217,218,219,220 Ethernet53/1 52 +Ethernet212 221,222,223,224 Ethernet54/1 53 +Ethernet216 233,234,235,236 Ethernet55/1 54 +Ethernet220 237,238,239,240 Ethernet56/1 55 +Ethernet224 249,250,251,252 Ethernet57/1 56 +Ethernet228 253,254,255,256 Ethernet58/1 57 +Ethernet232 169,170,171,172 Ethernet59/1 58 +Ethernet236 173,174,175,176 Ethernet60/1 59 +Ethernet240 185,186,187,188 Ethernet61/1 60 +Ethernet244 189,190,191,192 Ethernet62/1 61 +Ethernet248 201,202,203,204 Ethernet63/1 62 +Ethernet252 205,206,207,208 Ethernet64/1 63 diff --git a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/INGRASYS-S9200-64X/sai.profile b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/INGRASYS-S9200-64X/sai.profile new file mode 100644 index 00000000000..5404ca338ff --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/INGRASYS-S9200-64X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-s9200-64x100G.config.bcm diff --git a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/INGRASYS-S9200-64X/th2-s9200-64x100G.config.bcm b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/INGRASYS-S9200-64X/th2-s9200-64x100G.config.bcm new file mode 100644 index 00000000000..b143fb425b9 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/INGRASYS-S9200-64X/th2-s9200-64x100G.config.bcm @@ -0,0 +1,873 @@ +#2018/3/6 + +os=unix + +oversubscribe_mode=1 +pbmp_xport_xe=0x3fffd0000ffff40003fffc0001fffe + +#ALPM enable +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 +l3_mem_entries=40960 +l2_mem_entries=40960 + +#Parity +parity_correction=1 +parity_enable=1 + +l2xmsg_mode=1 +mmu_lossless=0 + +# core_clock_frequency can be 1125, 850, 765, 672, 645 or 545 +#core_clock_frequency=1125 + + +#PIPE-0 +#FC 0 +portmap_1=1:100 +phy_chain_tx_polarity_flip_physical{1.0}=0 +phy_chain_tx_polarity_flip_physical{2.0}=1 +phy_chain_tx_polarity_flip_physical{3.0}=0 +phy_chain_tx_polarity_flip_physical{4.0}=0 +phy_chain_rx_polarity_flip_physical{1.0}=1 +phy_chain_rx_polarity_flip_physical{2.0}=1 +phy_chain_rx_polarity_flip_physical{3.0}=0 +phy_chain_rx_polarity_flip_physical{4.0}=1 +phy_chain_tx_lane_map_physical{1.0}=0x3210 +phy_chain_rx_lane_map_physical{1.0}=0x0312 + +#FC 1 +portmap_2=5:100 +phy_chain_tx_polarity_flip_physical{5.0}=1 +phy_chain_tx_polarity_flip_physical{6.0}=1 +phy_chain_tx_polarity_flip_physical{7.0}=0 +phy_chain_tx_polarity_flip_physical{8.0}=0 +phy_chain_rx_polarity_flip_physical{5.0}=1 +phy_chain_rx_polarity_flip_physical{6.0}=0 +phy_chain_rx_polarity_flip_physical{7.0}=1 +phy_chain_rx_polarity_flip_physical{8.0}=1 +phy_chain_tx_lane_map_physical{5.0}=0x1023 +phy_chain_rx_lane_map_physical{5.0}=0x2103 + +#FC 2 +portmap_3=9:100 +phy_chain_tx_polarity_flip_physical{9.0}=0 +phy_chain_tx_polarity_flip_physical{10.0}=0 +phy_chain_tx_polarity_flip_physical{11.0}=1 +phy_chain_tx_polarity_flip_physical{12.0}=1 +phy_chain_rx_polarity_flip_physical{9.0}=1 +phy_chain_rx_polarity_flip_physical{10.0}=1 +phy_chain_rx_polarity_flip_physical{11.0}=0 +phy_chain_rx_polarity_flip_physical{12.0}=1 +phy_chain_tx_lane_map_physical{9.0}=0x3201 +phy_chain_rx_lane_map_physical{9.0}=0x1320 + +#FC 3 +portmap_4=13:100 +phy_chain_tx_polarity_flip_physical{13.0}=0 +phy_chain_tx_polarity_flip_physical{14.0}=0 +phy_chain_tx_polarity_flip_physical{15.0}=0 +phy_chain_tx_polarity_flip_physical{16.0}=1 +phy_chain_rx_polarity_flip_physical{13.0}=0 +phy_chain_rx_polarity_flip_physical{14.0}=0 +phy_chain_rx_polarity_flip_physical{15.0}=0 +phy_chain_rx_polarity_flip_physical{16.0}=0 +phy_chain_tx_lane_map_physical{13.0}=0x2013 +phy_chain_rx_lane_map_physical{13.0}=0x2310 + +#FC 4 +portmap_5=17:100 +phy_chain_tx_polarity_flip_physical{17.0}=1 +phy_chain_tx_polarity_flip_physical{18.0}=0 +phy_chain_tx_polarity_flip_physical{19.0}=0 +phy_chain_tx_polarity_flip_physical{20.0}=0 +phy_chain_rx_polarity_flip_physical{17.0}=0 +phy_chain_rx_polarity_flip_physical{18.0}=1 +phy_chain_rx_polarity_flip_physical{19.0}=1 +phy_chain_rx_polarity_flip_physical{20.0}=1 +phy_chain_tx_lane_map_physical{17.0}=0x0213 +phy_chain_rx_lane_map_physical{17.0}=0x0132 + +#FC 5 +portmap_6=21:100 +phy_chain_tx_polarity_flip_physical{21.0}=1 +phy_chain_tx_polarity_flip_physical{22.0}=1 +phy_chain_tx_polarity_flip_physical{23.0}=0 +phy_chain_tx_polarity_flip_physical{24.0}=0 +phy_chain_rx_polarity_flip_physical{21.0}=1 +phy_chain_rx_polarity_flip_physical{22.0}=0 +phy_chain_rx_polarity_flip_physical{23.0}=0 +phy_chain_rx_polarity_flip_physical{24.0}=1 +phy_chain_tx_lane_map_physical{21.0}=0x3021 +phy_chain_rx_lane_map_physical{21.0}=0x0312 + +#FC 6 +portmap_7=25:100 +phy_chain_tx_polarity_flip_physical{25.0}=0 +phy_chain_tx_polarity_flip_physical{26.0}=0 +phy_chain_tx_polarity_flip_physical{27.0}=0 +phy_chain_tx_polarity_flip_physical{28.0}=0 +phy_chain_rx_polarity_flip_physical{25.0}=0 +phy_chain_rx_polarity_flip_physical{26.0}=0 +phy_chain_rx_polarity_flip_physical{27.0}=0 +phy_chain_rx_polarity_flip_physical{28.0}=0 +phy_chain_tx_lane_map_physical{25.0}=0x2310 +phy_chain_rx_lane_map_physical{25.0}=0x1302 + +#FC 7 +portmap_8=29:100 +phy_chain_tx_polarity_flip_physical{29.0}=0 +phy_chain_tx_polarity_flip_physical{30.0}=0 +phy_chain_tx_polarity_flip_physical{31.0}=0 +phy_chain_tx_polarity_flip_physical{32.0}=1 +phy_chain_rx_polarity_flip_physical{29.0}=0 +phy_chain_rx_polarity_flip_physical{30.0}=0 +phy_chain_rx_polarity_flip_physical{31.0}=1 +phy_chain_rx_polarity_flip_physical{32.0}=0 +phy_chain_tx_lane_map_physical{29.0}=0x2031 +phy_chain_rx_lane_map_physical{29.0}=0x2310 + +#FC 8 +portmap_9=33:100 +phy_chain_tx_polarity_flip_physical{33.0}=1 +phy_chain_tx_polarity_flip_physical{34.0}=1 +phy_chain_tx_polarity_flip_physical{35.0}=0 +phy_chain_tx_polarity_flip_physical{36.0}=1 +phy_chain_rx_polarity_flip_physical{33.0}=1 +phy_chain_rx_polarity_flip_physical{34.0}=0 +phy_chain_rx_polarity_flip_physical{35.0}=0 +phy_chain_rx_polarity_flip_physical{36.0}=0 +phy_chain_tx_lane_map_physical{33.0}=0x3120 +phy_chain_rx_lane_map_physical{33.0}=0x2130 + +#FC 9 +portmap_10=37:100 +phy_chain_tx_polarity_flip_physical{37.0}=1 +phy_chain_tx_polarity_flip_physical{38.0}=1 +phy_chain_tx_polarity_flip_physical{39.0}=1 +phy_chain_tx_polarity_flip_physical{40.0}=1 +phy_chain_rx_polarity_flip_physical{37.0}=0 +phy_chain_rx_polarity_flip_physical{38.0}=1 +phy_chain_rx_polarity_flip_physical{39.0}=0 +phy_chain_rx_polarity_flip_physical{40.0}=0 +phy_chain_tx_lane_map_physical{37.0}=0x0123 +phy_chain_rx_lane_map_physical{37.0}=0x1230 + +#FC 10 +portmap_11=41:100 +phy_chain_tx_polarity_flip_physical{41.0}=1 +phy_chain_tx_polarity_flip_physical{42.0}=1 +phy_chain_tx_polarity_flip_physical{43.0}=0 +phy_chain_tx_polarity_flip_physical{44.0}=0 +phy_chain_rx_polarity_flip_physical{41.0}=1 +phy_chain_rx_polarity_flip_physical{42.0}=0 +phy_chain_rx_polarity_flip_physical{43.0}=0 +phy_chain_rx_polarity_flip_physical{44.0}=0 +phy_chain_tx_lane_map_physical{41.0}=0x3021 +phy_chain_rx_lane_map_physical{41.0}=0x1230 + +#FC 11 +portmap_12=45:100 +phy_chain_tx_polarity_flip_physical{45.0}=0 +phy_chain_tx_polarity_flip_physical{46.0}=1 +phy_chain_tx_polarity_flip_physical{47.0}=1 +phy_chain_tx_polarity_flip_physical{48.0}=1 +phy_chain_rx_polarity_flip_physical{45.0}=0 +phy_chain_rx_polarity_flip_physical{46.0}=1 +phy_chain_rx_polarity_flip_physical{47.0}=1 +phy_chain_rx_polarity_flip_physical{48.0}=1 +phy_chain_tx_lane_map_physical{45.0}=0x0123 +phy_chain_rx_lane_map_physical{45.0}=0x0213 + +#FC 12 +portmap_13=49:100 +phy_chain_tx_polarity_flip_physical{49.0}=1 +phy_chain_tx_polarity_flip_physical{50.0}=0 +phy_chain_tx_polarity_flip_physical{51.0}=1 +phy_chain_tx_polarity_flip_physical{52.0}=0 +phy_chain_rx_polarity_flip_physical{49.0}=1 +phy_chain_rx_polarity_flip_physical{50.0}=1 +phy_chain_rx_polarity_flip_physical{51.0}=1 +phy_chain_rx_polarity_flip_physical{52.0}=0 +phy_chain_tx_lane_map_physical{49.0}=0x0213 +phy_chain_rx_lane_map_physical{49.0}=0x0123 + +#FC 13 +portmap_14=53:100 +phy_chain_tx_polarity_flip_physical{53.0}=1 +phy_chain_tx_polarity_flip_physical{54.0}=1 +phy_chain_tx_polarity_flip_physical{55.0}=0 +phy_chain_tx_polarity_flip_physical{56.0}=1 +phy_chain_rx_polarity_flip_physical{53.0}=0 +phy_chain_rx_polarity_flip_physical{54.0}=1 +phy_chain_rx_polarity_flip_physical{55.0}=1 +phy_chain_rx_polarity_flip_physical{56.0}=1 +phy_chain_tx_lane_map_physical{53.0}=0x2031 +phy_chain_rx_lane_map_physical{53.0}=0x0132 + +#FC 14 +portmap_15=57:100 +phy_chain_tx_polarity_flip_physical{57.0}=1 +phy_chain_tx_polarity_flip_physical{58.0}=0 +phy_chain_tx_polarity_flip_physical{59.0}=0 +phy_chain_tx_polarity_flip_physical{60.0}=0 +phy_chain_rx_polarity_flip_physical{57.0}=0 +phy_chain_rx_polarity_flip_physical{58.0}=0 +phy_chain_rx_polarity_flip_physical{59.0}=0 +phy_chain_rx_polarity_flip_physical{60.0}=0 +phy_chain_tx_lane_map_physical{57.0}=0x3021 +phy_chain_rx_lane_map_physical{57.0}=0x2103 + +#FC 15 +portmap_16=61:100 +phy_chain_tx_polarity_flip_physical{61.0}=0 +phy_chain_tx_polarity_flip_physical{62.0}=0 +phy_chain_tx_polarity_flip_physical{63.0}=0 +phy_chain_tx_polarity_flip_physical{64.0}=1 +phy_chain_rx_polarity_flip_physical{61.0}=0 +phy_chain_rx_polarity_flip_physical{62.0}=1 +phy_chain_rx_polarity_flip_physical{63.0}=1 +phy_chain_rx_polarity_flip_physical{64.0}=1 +phy_chain_tx_lane_map_physical{61.0}=0x0132 +phy_chain_rx_lane_map_physical{61.0}=0x1320 + +#PIPE-1 +#FC 16 +portmap_34=65:100 +phy_chain_tx_polarity_flip_physical{65.0}=1 +phy_chain_tx_polarity_flip_physical{66.0}=1 +phy_chain_tx_polarity_flip_physical{67.0}=1 +phy_chain_tx_polarity_flip_physical{68.0}=1 +phy_chain_rx_polarity_flip_physical{65.0}=0 +phy_chain_rx_polarity_flip_physical{66.0}=0 +phy_chain_rx_polarity_flip_physical{67.0}=1 +phy_chain_rx_polarity_flip_physical{68.0}=0 +phy_chain_tx_lane_map_physical{65.0}=0x2031 +phy_chain_rx_lane_map_physical{65.0}=0x2031 + +#FC 17 +portmap_35=69:100 +phy_chain_tx_polarity_flip_physical{69.0}=1 +phy_chain_tx_polarity_flip_physical{70.0}=0 +phy_chain_tx_polarity_flip_physical{71.0}=0 +phy_chain_tx_polarity_flip_physical{72.0}=1 +phy_chain_rx_polarity_flip_physical{69.0}=1 +phy_chain_rx_polarity_flip_physical{70.0}=0 +phy_chain_rx_polarity_flip_physical{71.0}=0 +phy_chain_rx_polarity_flip_physical{72.0}=1 +phy_chain_tx_lane_map_physical{69.0}=0x2031 +phy_chain_rx_lane_map_physical{69.0}=0x3201 + +#FC 18 +portmap_36=73:100 +phy_chain_tx_polarity_flip_physical{73.0}=0 +phy_chain_tx_polarity_flip_physical{74.0}=0 +phy_chain_tx_polarity_flip_physical{75.0}=1 +phy_chain_tx_polarity_flip_physical{76.0}=0 +phy_chain_rx_polarity_flip_physical{73.0}=1 +phy_chain_rx_polarity_flip_physical{74.0}=1 +phy_chain_rx_polarity_flip_physical{75.0}=0 +phy_chain_rx_polarity_flip_physical{76.0}=0 +phy_chain_tx_lane_map_physical{73.0}=0x3120 +phy_chain_rx_lane_map_physical{73.0}=0x3201 + +#FC 19 +portmap_37=77:100 +phy_chain_tx_polarity_flip_physical{77.0}=1 +phy_chain_tx_polarity_flip_physical{78.0}=0 +phy_chain_tx_polarity_flip_physical{79.0}=1 +phy_chain_tx_polarity_flip_physical{80.0}=0 +phy_chain_rx_polarity_flip_physical{77.0}=1 +phy_chain_rx_polarity_flip_physical{78.0}=0 +phy_chain_rx_polarity_flip_physical{79.0}=1 +phy_chain_rx_polarity_flip_physical{80.0}=0 +phy_chain_tx_lane_map_physical{77.0}=0x0132 +phy_chain_rx_lane_map_physical{77.0}=0x1032 + +#FC 20 +portmap_38=81:100 +phy_chain_tx_polarity_flip_physical{81.0}=1 +phy_chain_tx_polarity_flip_physical{82.0}=0 +phy_chain_tx_polarity_flip_physical{83.0}=1 +phy_chain_tx_polarity_flip_physical{84.0}=0 +phy_chain_rx_polarity_flip_physical{81.0}=0 +phy_chain_rx_polarity_flip_physical{82.0}=1 +phy_chain_rx_polarity_flip_physical{83.0}=1 +phy_chain_rx_polarity_flip_physical{84.0}=1 +phy_chain_tx_lane_map_physical{81.0}=0x0213 +phy_chain_rx_lane_map_physical{81.0}=0x1203 + +#FC 21 +portmap_39=85:100 +phy_chain_tx_polarity_flip_physical{85.0}=1 +phy_chain_tx_polarity_flip_physical{86.0}=1 +phy_chain_tx_polarity_flip_physical{87.0}=0 +phy_chain_tx_polarity_flip_physical{88.0}=0 +phy_chain_rx_polarity_flip_physical{85.0}=0 +phy_chain_rx_polarity_flip_physical{86.0}=1 +phy_chain_rx_polarity_flip_physical{87.0}=0 +phy_chain_rx_polarity_flip_physical{88.0}=1 +phy_chain_tx_lane_map_physical{85.0}=0x3021 +phy_chain_rx_lane_map_physical{85.0}=0x1230 + +#FC 22 +portmap_40=89:100 +phy_chain_tx_polarity_flip_physical{89.0}=1 +phy_chain_tx_polarity_flip_physical{90.0}=0 +phy_chain_tx_polarity_flip_physical{91.0}=0 +phy_chain_tx_polarity_flip_physical{92.0}=0 +phy_chain_rx_polarity_flip_physical{89.0}=1 +phy_chain_rx_polarity_flip_physical{90.0}=1 +phy_chain_rx_polarity_flip_physical{91.0}=0 +phy_chain_rx_polarity_flip_physical{92.0}=0 +phy_chain_tx_lane_map_physical{89.0}=0x3021 +phy_chain_rx_lane_map_physical{89.0}=0x3201 + +#FC 23 +portmap_41=93:100 +phy_chain_tx_polarity_flip_physical{93.0}=0 +phy_chain_tx_polarity_flip_physical{94.0}=0 +phy_chain_tx_polarity_flip_physical{95.0}=1 +phy_chain_tx_polarity_flip_physical{96.0}=0 +phy_chain_rx_polarity_flip_physical{93.0}=1 +phy_chain_rx_polarity_flip_physical{94.0}=0 +phy_chain_rx_polarity_flip_physical{95.0}=1 +phy_chain_rx_polarity_flip_physical{96.0}=0 +phy_chain_tx_lane_map_physical{93.0}=0x1023 +phy_chain_rx_lane_map_physical{93.0}=0x1032 + +#FC 24 +portmap_42=97:100 +phy_chain_tx_polarity_flip_physical{97.0}=0 +phy_chain_tx_polarity_flip_physical{98.0}=1 +phy_chain_tx_polarity_flip_physical{99.0}=1 +phy_chain_tx_polarity_flip_physical{100.0}=0 +phy_chain_rx_polarity_flip_physical{97.0}=0 +phy_chain_rx_polarity_flip_physical{98.0}=0 +phy_chain_rx_polarity_flip_physical{99.0}=0 +phy_chain_rx_polarity_flip_physical{100.0}=1 +phy_chain_tx_lane_map_physical{97.0}=0x0132 +phy_chain_rx_lane_map_physical{97.0}=0x1320 + +#FC 25 +portmap_43=101:100 +phy_chain_tx_polarity_flip_physical{101.0}=0 +phy_chain_tx_polarity_flip_physical{102.0}=1 +phy_chain_tx_polarity_flip_physical{103.0}=1 +phy_chain_tx_polarity_flip_physical{104.0}=1 +phy_chain_rx_polarity_flip_physical{101.0}=1 +phy_chain_rx_polarity_flip_physical{102.0}=1 +phy_chain_rx_polarity_flip_physical{103.0}=1 +phy_chain_rx_polarity_flip_physical{104.0}=1 +phy_chain_tx_lane_map_physical{101.0}=0x1023 +phy_chain_rx_lane_map_physical{101.0}=0x3120 + +#FC 26 +portmap_44=105:100 +phy_chain_tx_polarity_flip_physical{105.0}=1 +phy_chain_tx_polarity_flip_physical{106.0}=0 +phy_chain_tx_polarity_flip_physical{107.0}=1 +phy_chain_tx_polarity_flip_physical{108.0}=1 +phy_chain_rx_polarity_flip_physical{105.0}=1 +phy_chain_rx_polarity_flip_physical{106.0}=1 +phy_chain_rx_polarity_flip_physical{107.0}=0 +phy_chain_rx_polarity_flip_physical{108.0}=0 +phy_chain_tx_lane_map_physical{105.0}=0x2103 +phy_chain_rx_lane_map_physical{105.0}=0x1203 + +#FC 27 +portmap_45=109:100 +phy_chain_tx_polarity_flip_physical{109.0}=1 +phy_chain_tx_polarity_flip_physical{110.0}=1 +phy_chain_tx_polarity_flip_physical{111.0}=0 +phy_chain_tx_polarity_flip_physical{112.0}=1 +phy_chain_rx_polarity_flip_physical{109.0}=0 +phy_chain_rx_polarity_flip_physical{110.0}=0 +phy_chain_rx_polarity_flip_physical{111.0}=1 +phy_chain_rx_polarity_flip_physical{112.0}=0 +phy_chain_tx_lane_map_physical{109.0}=0x3201 +phy_chain_rx_lane_map_physical{109.0}=0x0123 + +#FC 28 +portmap_46=113:100 +phy_chain_tx_polarity_flip_physical{113.0}=0 +phy_chain_tx_polarity_flip_physical{114.0}=1 +phy_chain_tx_polarity_flip_physical{115.0}=1 +phy_chain_tx_polarity_flip_physical{116.0}=0 +phy_chain_rx_polarity_flip_physical{113.0}=1 +phy_chain_rx_polarity_flip_physical{114.0}=0 +phy_chain_rx_polarity_flip_physical{115.0}=0 +phy_chain_rx_polarity_flip_physical{116.0}=1 +phy_chain_tx_lane_map_physical{113.0}=0x3012 +phy_chain_rx_lane_map_physical{113.0}=0x1302 + +#FC 29 +portmap_47=117:100 +phy_chain_tx_polarity_flip_physical{117.0}=1 +phy_chain_tx_polarity_flip_physical{118.0}=1 +phy_chain_tx_polarity_flip_physical{119.0}=0 +phy_chain_tx_polarity_flip_physical{120.0}=0 +phy_chain_rx_polarity_flip_physical{117.0}=1 +phy_chain_rx_polarity_flip_physical{118.0}=0 +phy_chain_rx_polarity_flip_physical{119.0}=0 +phy_chain_rx_polarity_flip_physical{120.0}=1 +phy_chain_tx_lane_map_physical{117.0}=0x0312 +phy_chain_rx_lane_map_physical{117.0}=0x0132 + +#FC 30 +portmap_48=121:100 +phy_chain_tx_polarity_flip_physical{121.0}=1 +phy_chain_tx_polarity_flip_physical{122.0}=0 +phy_chain_tx_polarity_flip_physical{123.0}=0 +phy_chain_tx_polarity_flip_physical{124.0}=0 +phy_chain_rx_polarity_flip_physical{121.0}=1 +phy_chain_rx_polarity_flip_physical{122.0}=1 +phy_chain_rx_polarity_flip_physical{123.0}=0 +phy_chain_rx_polarity_flip_physical{124.0}=0 +phy_chain_tx_lane_map_physical{121.0}=0x1023 +phy_chain_rx_lane_map_physical{121.0}=0x1203 + +#FC 31 +portmap_49=125:100 +phy_chain_tx_polarity_flip_physical{125.0}=0 +phy_chain_tx_polarity_flip_physical{126.0}=1 +phy_chain_tx_polarity_flip_physical{127.0}=0 +phy_chain_tx_polarity_flip_physical{128.0}=1 +phy_chain_rx_polarity_flip_physical{125.0}=0 +phy_chain_rx_polarity_flip_physical{126.0}=0 +phy_chain_rx_polarity_flip_physical{127.0}=1 +phy_chain_rx_polarity_flip_physical{128.0}=0 +phy_chain_tx_lane_map_physical{125.0}=0x1320 +phy_chain_rx_lane_map_physical{125.0}=0x2103 + +#PIPE-2 +#FC 32 +portmap_68=129:100 +phy_chain_tx_polarity_flip_physical{129.0}=0 +phy_chain_tx_polarity_flip_physical{130.0}=1 +phy_chain_tx_polarity_flip_physical{131.0}=1 +phy_chain_tx_polarity_flip_physical{132.0}=0 +phy_chain_rx_polarity_flip_physical{129.0}=0 +phy_chain_rx_polarity_flip_physical{130.0}=1 +phy_chain_rx_polarity_flip_physical{131.0}=1 +phy_chain_rx_polarity_flip_physical{132.0}=1 +phy_chain_tx_lane_map_physical{129.0}=0x0321 +phy_chain_rx_lane_map_physical{129.0}=0x2310 + +#FC 33 +portmap_69=133:100 +phy_chain_tx_polarity_flip_physical{133.0}=1 +phy_chain_tx_polarity_flip_physical{134.0}=0 +phy_chain_tx_polarity_flip_physical{135.0}=0 +phy_chain_tx_polarity_flip_physical{136.0}=1 +phy_chain_rx_polarity_flip_physical{133.0}=1 +phy_chain_rx_polarity_flip_physical{134.0}=0 +phy_chain_rx_polarity_flip_physical{135.0}=0 +phy_chain_rx_polarity_flip_physical{136.0}=1 +phy_chain_tx_lane_map_physical{133.0}=0x2013 +phy_chain_rx_lane_map_physical{133.0}=0x1203 + +#FC 34 +portmap_70=137:100 +phy_chain_tx_polarity_flip_physical{137.0}=0 +phy_chain_tx_polarity_flip_physical{138.0}=1 +phy_chain_tx_polarity_flip_physical{139.0}=0 +phy_chain_tx_polarity_flip_physical{140.0}=0 +phy_chain_rx_polarity_flip_physical{137.0}=0 +phy_chain_rx_polarity_flip_physical{138.0}=1 +phy_chain_rx_polarity_flip_physical{139.0}=1 +phy_chain_rx_polarity_flip_physical{140.0}=0 +phy_chain_tx_lane_map_physical{137.0}=0x2301 +phy_chain_rx_lane_map_physical{137.0}=0x0213 + +#FC 35 +portmap_71=141:100 +phy_chain_tx_polarity_flip_physical{141.0}=0 +phy_chain_tx_polarity_flip_physical{142.0}=1 +phy_chain_tx_polarity_flip_physical{143.0}=0 +phy_chain_tx_polarity_flip_physical{144.0}=1 +phy_chain_rx_polarity_flip_physical{141.0}=0 +phy_chain_rx_polarity_flip_physical{142.0}=0 +phy_chain_rx_polarity_flip_physical{143.0}=0 +phy_chain_rx_polarity_flip_physical{144.0}=1 +phy_chain_tx_lane_map_physical{141.0}=0x2013 +phy_chain_rx_lane_map_physical{141.0}=0x2310 + +#FC 36 +portmap_72=145:100 +phy_chain_tx_polarity_flip_physical{145.0}=1 +phy_chain_tx_polarity_flip_physical{146.0}=0 +phy_chain_tx_polarity_flip_physical{147.0}=1 +phy_chain_tx_polarity_flip_physical{148.0}=0 +phy_chain_rx_polarity_flip_physical{145.0}=1 +phy_chain_rx_polarity_flip_physical{146.0}=0 +phy_chain_rx_polarity_flip_physical{147.0}=0 +phy_chain_rx_polarity_flip_physical{148.0}=1 +phy_chain_tx_lane_map_physical{145.0}=0x2310 +phy_chain_rx_lane_map_physical{145.0}=0x0231 + +#FC 37 +portmap_73=149:100 +phy_chain_tx_polarity_flip_physical{149.0}=1 +phy_chain_tx_polarity_flip_physical{150.0}=1 +phy_chain_tx_polarity_flip_physical{151.0}=0 +phy_chain_tx_polarity_flip_physical{152.0}=0 +phy_chain_rx_polarity_flip_physical{149.0}=1 +phy_chain_rx_polarity_flip_physical{150.0}=0 +phy_chain_rx_polarity_flip_physical{151.0}=0 +phy_chain_rx_polarity_flip_physical{152.0}=1 +phy_chain_tx_lane_map_physical{149.0}=0x3021 +phy_chain_rx_lane_map_physical{149.0}=0x1203 + +#FC 38 +portmap_74=153:100 +phy_chain_tx_polarity_flip_physical{153.0}=1 +phy_chain_tx_polarity_flip_physical{154.0}=0 +phy_chain_tx_polarity_flip_physical{155.0}=1 +phy_chain_tx_polarity_flip_physical{156.0}=1 +phy_chain_rx_polarity_flip_physical{153.0}=0 +phy_chain_rx_polarity_flip_physical{154.0}=0 +phy_chain_rx_polarity_flip_physical{155.0}=0 +phy_chain_rx_polarity_flip_physical{156.0}=0 +phy_chain_tx_lane_map_physical{153.0}=0x1230 +phy_chain_rx_lane_map_physical{153.0}=0x3120 + +#FC 39 +portmap_75=157:100 +phy_chain_tx_polarity_flip_physical{157.0}=1 +phy_chain_tx_polarity_flip_physical{158.0}=1 +phy_chain_tx_polarity_flip_physical{159.0}=1 +phy_chain_tx_polarity_flip_physical{160.0}=0 +phy_chain_rx_polarity_flip_physical{157.0}=0 +phy_chain_rx_polarity_flip_physical{158.0}=0 +phy_chain_rx_polarity_flip_physical{159.0}=1 +phy_chain_rx_polarity_flip_physical{160.0}=0 +phy_chain_tx_lane_map_physical{157.0}=0x3210 +phy_chain_rx_lane_map_physical{157.0}=0x3210 + +#FC 40 +portmap_76=161:100 +phy_chain_tx_polarity_flip_physical{161.0}=1 +phy_chain_tx_polarity_flip_physical{162.0}=1 +phy_chain_tx_polarity_flip_physical{163.0}=0 +phy_chain_tx_polarity_flip_physical{164.0}=1 +phy_chain_rx_polarity_flip_physical{161.0}=1 +phy_chain_rx_polarity_flip_physical{162.0}=1 +phy_chain_rx_polarity_flip_physical{163.0}=1 +phy_chain_rx_polarity_flip_physical{164.0}=1 +phy_chain_tx_lane_map_physical{161.0}=0x2031 +phy_chain_rx_lane_map_physical{161.0}=0x1032 + +#FC 41 +portmap_77=165:100 +phy_chain_tx_polarity_flip_physical{165.0}=0 +phy_chain_tx_polarity_flip_physical{166.0}=0 +phy_chain_tx_polarity_flip_physical{167.0}=1 +phy_chain_tx_polarity_flip_physical{168.0}=1 +phy_chain_rx_polarity_flip_physical{165.0}=0 +phy_chain_rx_polarity_flip_physical{166.0}=1 +phy_chain_rx_polarity_flip_physical{167.0}=0 +phy_chain_rx_polarity_flip_physical{168.0}=1 +phy_chain_tx_lane_map_physical{165.0}=0x2310 +phy_chain_rx_lane_map_physical{165.0}=0x1230 + +#FC 42 +portmap_78=169:100 +phy_chain_tx_polarity_flip_physical{169.0}=1 +phy_chain_tx_polarity_flip_physical{170.0}=0 +phy_chain_tx_polarity_flip_physical{171.0}=1 +phy_chain_tx_polarity_flip_physical{172.0}=0 +phy_chain_rx_polarity_flip_physical{169.0}=0 +phy_chain_rx_polarity_flip_physical{170.0}=0 +phy_chain_rx_polarity_flip_physical{171.0}=0 +phy_chain_rx_polarity_flip_physical{172.0}=0 +phy_chain_tx_lane_map_physical{169.0}=0x1302 +phy_chain_rx_lane_map_physical{169.0}=0x3210 + +#FC 43 +portmap_79=173:100 +phy_chain_tx_polarity_flip_physical{173.0}=1 +phy_chain_tx_polarity_flip_physical{174.0}=0 +phy_chain_tx_polarity_flip_physical{175.0}=0 +phy_chain_tx_polarity_flip_physical{176.0}=0 +phy_chain_rx_polarity_flip_physical{173.0}=0 +phy_chain_rx_polarity_flip_physical{174.0}=1 +phy_chain_rx_polarity_flip_physical{175.0}=0 +phy_chain_rx_polarity_flip_physical{176.0}=1 +phy_chain_tx_lane_map_physical{173.0}=0x0312 +phy_chain_rx_lane_map_physical{173.0}=0x3210 + +#FC 44 +portmap_80=177:100 +phy_chain_tx_polarity_flip_physical{177.0}=0 +phy_chain_tx_polarity_flip_physical{178.0}=1 +phy_chain_tx_polarity_flip_physical{179.0}=0 +phy_chain_tx_polarity_flip_physical{180.0}=1 +phy_chain_rx_polarity_flip_physical{177.0}=1 +phy_chain_rx_polarity_flip_physical{178.0}=1 +phy_chain_rx_polarity_flip_physical{179.0}=0 +phy_chain_rx_polarity_flip_physical{180.0}=1 +phy_chain_tx_lane_map_physical{177.0}=0x2031 +phy_chain_rx_lane_map_physical{177.0}=0x1302 + +#FC 45 +portmap_81=181:100 +phy_chain_tx_polarity_flip_physical{181.0}=0 +phy_chain_tx_polarity_flip_physical{182.0}=0 +phy_chain_tx_polarity_flip_physical{183.0}=0 +phy_chain_tx_polarity_flip_physical{184.0}=0 +phy_chain_rx_polarity_flip_physical{181.0}=0 +phy_chain_rx_polarity_flip_physical{182.0}=1 +phy_chain_rx_polarity_flip_physical{183.0}=0 +phy_chain_rx_polarity_flip_physical{184.0}=1 +phy_chain_tx_lane_map_physical{181.0}=0x1023 +phy_chain_rx_lane_map_physical{181.0}=0x2301 + +#FC 46 +portmap_82=185:100 +phy_chain_tx_polarity_flip_physical{185.0}=0 +phy_chain_tx_polarity_flip_physical{186.0}=0 +phy_chain_tx_polarity_flip_physical{187.0}=1 +phy_chain_tx_polarity_flip_physical{188.0}=0 +phy_chain_rx_polarity_flip_physical{185.0}=0 +phy_chain_rx_polarity_flip_physical{186.0}=0 +phy_chain_rx_polarity_flip_physical{187.0}=0 +phy_chain_rx_polarity_flip_physical{188.0}=0 +phy_chain_tx_lane_map_physical{185.0}=0x1320 +phy_chain_rx_lane_map_physical{185.0}=0x3210 + +#FC 47 +portmap_83=189:100 +phy_chain_tx_polarity_flip_physical{189.0}=1 +phy_chain_tx_polarity_flip_physical{190.0}=1 +phy_chain_tx_polarity_flip_physical{191.0}=0 +phy_chain_tx_polarity_flip_physical{192.0}=1 +phy_chain_rx_polarity_flip_physical{189.0}=0 +phy_chain_rx_polarity_flip_physical{190.0}=1 +phy_chain_rx_polarity_flip_physical{191.0}=0 +phy_chain_rx_polarity_flip_physical{192.0}=1 +phy_chain_tx_lane_map_physical{189.0}=0x3021 +phy_chain_rx_lane_map_physical{189.0}=0x3210 + +#PIPE-3 +#FC 48 +portmap_102=193:100 +phy_chain_tx_polarity_flip_physical{193.0}=1 +phy_chain_tx_polarity_flip_physical{194.0}=0 +phy_chain_tx_polarity_flip_physical{195.0}=1 +phy_chain_tx_polarity_flip_physical{196.0}=0 +phy_chain_rx_polarity_flip_physical{193.0}=1 +phy_chain_rx_polarity_flip_physical{194.0}=1 +phy_chain_rx_polarity_flip_physical{195.0}=0 +phy_chain_rx_polarity_flip_physical{196.0}=1 +phy_chain_tx_lane_map_physical{193.0}=0x3021 +phy_chain_rx_lane_map_physical{193.0}=0x1302 + +#FC 49 +portmap_103=197:100 +phy_chain_tx_polarity_flip_physical{197.0}=1 +phy_chain_tx_polarity_flip_physical{198.0}=0 +phy_chain_tx_polarity_flip_physical{199.0}=0 +phy_chain_tx_polarity_flip_physical{200.0}=1 +phy_chain_rx_polarity_flip_physical{197.0}=0 +phy_chain_rx_polarity_flip_physical{198.0}=1 +phy_chain_rx_polarity_flip_physical{199.0}=0 +phy_chain_rx_polarity_flip_physical{200.0}=1 +phy_chain_tx_lane_map_physical{197.0}=0x0132 +phy_chain_rx_lane_map_physical{197.0}=0x2301 + +#FC 50 +portmap_104=201:100 +phy_chain_tx_polarity_flip_physical{201.0}=1 +phy_chain_tx_polarity_flip_physical{202.0}=0 +phy_chain_tx_polarity_flip_physical{203.0}=1 +phy_chain_tx_polarity_flip_physical{204.0}=1 +phy_chain_rx_polarity_flip_physical{201.0}=0 +phy_chain_rx_polarity_flip_physical{202.0}=0 +phy_chain_rx_polarity_flip_physical{203.0}=0 +phy_chain_rx_polarity_flip_physical{204.0}=0 +phy_chain_tx_lane_map_physical{201.0}=0x2301 +phy_chain_rx_lane_map_physical{201.0}=0x1230 + +#FC 51 +portmap_105=205:100 +phy_chain_tx_polarity_flip_physical{205.0}=1 +phy_chain_tx_polarity_flip_physical{206.0}=1 +phy_chain_tx_polarity_flip_physical{207.0}=0 +phy_chain_tx_polarity_flip_physical{208.0}=0 +phy_chain_rx_polarity_flip_physical{205.0}=0 +phy_chain_rx_polarity_flip_physical{206.0}=0 +phy_chain_rx_polarity_flip_physical{207.0}=0 +phy_chain_rx_polarity_flip_physical{208.0}=1 +phy_chain_tx_lane_map_physical{205.0}=0x3021 +phy_chain_rx_lane_map_physical{205.0}=0x2130 + +#FC 52 +portmap_106=209:100 +phy_chain_tx_polarity_flip_physical{209.0}=1 +phy_chain_tx_polarity_flip_physical{210.0}=1 +phy_chain_tx_polarity_flip_physical{211.0}=0 +phy_chain_tx_polarity_flip_physical{212.0}=1 +phy_chain_rx_polarity_flip_physical{209.0}=0 +phy_chain_rx_polarity_flip_physical{210.0}=0 +phy_chain_rx_polarity_flip_physical{211.0}=1 +phy_chain_rx_polarity_flip_physical{212.0}=1 +phy_chain_tx_lane_map_physical{209.0}=0x2031 +phy_chain_rx_lane_map_physical{209.0}=0x3021 + +#FC 53 +portmap_107=213:100 +phy_chain_tx_polarity_flip_physical{213.0}=0 +phy_chain_tx_polarity_flip_physical{214.0}=1 +phy_chain_tx_polarity_flip_physical{215.0}=1 +phy_chain_tx_polarity_flip_physical{216.0}=0 +phy_chain_rx_polarity_flip_physical{213.0}=0 +phy_chain_rx_polarity_flip_physical{214.0}=1 +phy_chain_rx_polarity_flip_physical{215.0}=0 +phy_chain_rx_polarity_flip_physical{216.0}=1 +phy_chain_tx_lane_map_physical{213.0}=0x1302 +phy_chain_rx_lane_map_physical{213.0}=0x1032 + +#FC 54 +portmap_108=217:100 +phy_chain_tx_polarity_flip_physical{217.0}=1 +phy_chain_tx_polarity_flip_physical{218.0}=0 +phy_chain_tx_polarity_flip_physical{219.0}=1 +phy_chain_tx_polarity_flip_physical{220.0}=1 +phy_chain_rx_polarity_flip_physical{217.0}=0 +phy_chain_rx_polarity_flip_physical{218.0}=0 +phy_chain_rx_polarity_flip_physical{219.0}=0 +phy_chain_rx_polarity_flip_physical{220.0}=0 +phy_chain_tx_lane_map_physical{217.0}=0x2301 +phy_chain_rx_lane_map_physical{217.0}=0x1230 + +#FC 55 +portmap_109=221:100 +phy_chain_tx_polarity_flip_physical{221.0}=0 +phy_chain_tx_polarity_flip_physical{222.0}=0 +phy_chain_tx_polarity_flip_physical{223.0}=0 +phy_chain_tx_polarity_flip_physical{224.0}=0 +phy_chain_rx_polarity_flip_physical{221.0}=0 +phy_chain_rx_polarity_flip_physical{222.0}=1 +phy_chain_rx_polarity_flip_physical{223.0}=0 +phy_chain_rx_polarity_flip_physical{224.0}=1 +phy_chain_tx_lane_map_physical{221.0}=0x3210 +phy_chain_rx_lane_map_physical{221.0}=0x2310 + +#FC 56 +portmap_110=225:100 +phy_chain_tx_polarity_flip_physical{225.0}=0 +phy_chain_tx_polarity_flip_physical{226.0}=0 +phy_chain_tx_polarity_flip_physical{227.0}=1 +phy_chain_tx_polarity_flip_physical{228.0}=0 +phy_chain_rx_polarity_flip_physical{225.0}=0 +phy_chain_rx_polarity_flip_physical{226.0}=1 +phy_chain_rx_polarity_flip_physical{227.0}=1 +phy_chain_rx_polarity_flip_physical{228.0}=1 +phy_chain_tx_lane_map_physical{225.0}=0x3120 +phy_chain_rx_lane_map_physical{225.0}=0x3021 + +#FC 57 +portmap_111=229:100 +phy_chain_tx_polarity_flip_physical{229.0}=0 +phy_chain_tx_polarity_flip_physical{230.0}=0 +phy_chain_tx_polarity_flip_physical{231.0}=1 +phy_chain_tx_polarity_flip_physical{232.0}=0 +phy_chain_rx_polarity_flip_physical{229.0}=0 +phy_chain_rx_polarity_flip_physical{230.0}=0 +phy_chain_rx_polarity_flip_physical{231.0}=1 +phy_chain_rx_polarity_flip_physical{232.0}=1 +phy_chain_tx_lane_map_physical{229.0}=0x0231 +phy_chain_rx_lane_map_physical{229.0}=0x2031 + +#FC 58 +portmap_112=233:100 +phy_chain_tx_polarity_flip_physical{233.0}=1 +phy_chain_tx_polarity_flip_physical{234.0}=0 +phy_chain_tx_polarity_flip_physical{235.0}=0 +phy_chain_tx_polarity_flip_physical{236.0}=0 +phy_chain_rx_polarity_flip_physical{233.0}=0 +phy_chain_rx_polarity_flip_physical{234.0}=0 +phy_chain_rx_polarity_flip_physical{235.0}=1 +phy_chain_rx_polarity_flip_physical{236.0}=1 +phy_chain_tx_lane_map_physical{233.0}=0x1023 +phy_chain_rx_lane_map_physical{233.0}=0x1203 + +#FC 59 +portmap_113=237:100 +phy_chain_tx_polarity_flip_physical{237.0}=0 +phy_chain_tx_polarity_flip_physical{238.0}=0 +phy_chain_tx_polarity_flip_physical{239.0}=1 +phy_chain_tx_polarity_flip_physical{240.0}=0 +phy_chain_rx_polarity_flip_physical{237.0}=1 +phy_chain_rx_polarity_flip_physical{238.0}=0 +phy_chain_rx_polarity_flip_physical{239.0}=0 +phy_chain_rx_polarity_flip_physical{240.0}=0 +phy_chain_tx_lane_map_physical{237.0}=0x2013 +phy_chain_rx_lane_map_physical{237.0}=0x0213 + +#FC 60 +portmap_114=241:100 +phy_chain_tx_polarity_flip_physical{241.0}=0 +phy_chain_tx_polarity_flip_physical{242.0}=1 +phy_chain_tx_polarity_flip_physical{243.0}=0 +phy_chain_tx_polarity_flip_physical{244.0}=0 +phy_chain_rx_polarity_flip_physical{241.0}=0 +phy_chain_rx_polarity_flip_physical{242.0}=0 +phy_chain_rx_polarity_flip_physical{243.0}=0 +phy_chain_rx_polarity_flip_physical{244.0}=0 +phy_chain_tx_lane_map_physical{241.0}=0x1032 +phy_chain_rx_lane_map_physical{241.0}=0x2310 + +#FC 61 +portmap_115=245:100 +phy_chain_tx_polarity_flip_physical{245.0}=1 +phy_chain_tx_polarity_flip_physical{246.0}=0 +phy_chain_tx_polarity_flip_physical{247.0}=0 +phy_chain_tx_polarity_flip_physical{248.0}=1 +phy_chain_rx_polarity_flip_physical{245.0}=1 +phy_chain_rx_polarity_flip_physical{246.0}=1 +phy_chain_rx_polarity_flip_physical{247.0}=0 +phy_chain_rx_polarity_flip_physical{248.0}=1 +phy_chain_tx_lane_map_physical{245.0}=0x1302 +phy_chain_rx_lane_map_physical{245.0}=0x1302 + +#FC 62 +portmap_116=249:100 +phy_chain_tx_polarity_flip_physical{249.0}=0 +phy_chain_tx_polarity_flip_physical{250.0}=1 +phy_chain_tx_polarity_flip_physical{251.0}=0 +phy_chain_tx_polarity_flip_physical{252.0}=0 +phy_chain_rx_polarity_flip_physical{249.0}=1 +phy_chain_rx_polarity_flip_physical{250.0}=1 +phy_chain_rx_polarity_flip_physical{251.0}=0 +phy_chain_rx_polarity_flip_physical{252.0}=0 +phy_chain_tx_lane_map_physical{249.0}=0x1032 +phy_chain_rx_lane_map_physical{249.0}=0x1203 + +#FC 63 +portmap_117=253:100 +phy_chain_tx_polarity_flip_physical{253.0}=0 +phy_chain_tx_polarity_flip_physical{254.0}=0 +phy_chain_tx_polarity_flip_physical{255.0}=0 +phy_chain_tx_polarity_flip_physical{256.0}=1 +phy_chain_rx_polarity_flip_physical{253.0}=0 +phy_chain_rx_polarity_flip_physical{254.0}=1 +phy_chain_rx_polarity_flip_physical{255.0}=1 +phy_chain_rx_polarity_flip_physical{256.0}=0 +phy_chain_tx_lane_map_physical{253.0}=0x3210 +phy_chain_rx_lane_map_physical{253.0}=0x2103 + + + +#MGMT +portmap_66=257:10 +portmap_100=259:10 +#phy_chain_tx_lane_map_physical{257.0}=0x0123 +#phy_chain_rx_lane_map_physical{257.0}=0x0123 + +#LPBK +portmap_33=260:10 +portmap_67=261:10 +portmap_101=262:10 +portmap_135=263:10 diff --git a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/default_sku new file mode 100644 index 00000000000..30331b0d9fc --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S9200-64X t1 diff --git a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/fancontrol b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/fancontrol new file mode 100644 index 00000000000..489ebeaee95 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/fancontrol @@ -0,0 +1,9 @@ +INTERVAL=10 +DEVPATH=hwmon5=devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-002f hwmon2=devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-7/7-004d +DEVNAME=hwmon5=w83795adg +FCTEMPS=hwmon5/device/pwm2=hwmon2/temp1_input +FCFANS=hwmon5/device/pwm2=hwmon5/device/fan7_input hwmon5/device/pwm2=hwmon5/device/fan5_input hwmon5/device/pwm2=hwmon5/device/fan3_input hwmon5/device/pwm2=hwmon5/device/fan1_input +MINTEMP=hwmon5/device/pwm2=20 +MAXTEMP=hwmon5/device/pwm2=60 +MINSTART=hwmon5/device/pwm2=75 +MINSTOP=hwmon5/device/pwm2=22 diff --git a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/installer.conf b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/led_proc_init.soc b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/led_proc_init.soc new file mode 100644 index 00000000000..774923ff868 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/led_proc_init.soc @@ -0,0 +1,111 @@ +#processor initialization for Ingrasys S9200-64X + +led 0 stop +led 0 prog 12 00 61 F1 12 10 61 F2 12 04 61 F3 12 04 61 F4 67 16 86 F0 77 74 96 F2 2E F1 67 2B 67 3F 16 F3 FE F1 61 F1 12 00 DE F2 74 16 57 2E F1 32 00 32 01 B7 97 75 3A 02 01 60 FE 57 02 00 60 FE 57 2E F1 32 08 97 75 58 77 48 06 FE D2 01 70 50 77 66 06 F0 C2 08 74 58 77 66 16 F4 91 22 0E 87 22 0E 87 DA 00 74 5A 57 16 F4 91 22 0F 87 22 0E 87 DA 00 74 68 57 02 80 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=56 REMAP_PORT_2=57 REMAP_PORT_1=58 REMAP_PORT_0=59 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=60 REMAP_PORT_6=61 REMAP_PORT_5=62 REMAP_PORT_4=63 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=52 REMAP_PORT_10=53 REMAP_PORT_9=54 REMAP_PORT_8=55 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=48 REMAP_PORT_14=49 REMAP_PORT_13=50 REMAP_PORT_12=51 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=40 REMAP_PORT_18=41 REMAP_PORT_17=42 REMAP_PORT_16=43 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=44 REMAP_PORT_22=45 REMAP_PORT_21=46 REMAP_PORT_20=47 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=36 REMAP_PORT_26=37 REMAP_PORT_25=38 REMAP_PORT_24=39 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=32 REMAP_PORT_30=33 REMAP_PORT_29=34 REMAP_PORT_28=35 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=24 REMAP_PORT_34=25 REMAP_PORT_33=26 REMAP_PORT_32=27 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=28 REMAP_PORT_38=29 REMAP_PORT_37=30 REMAP_PORT_36=31 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=20 REMAP_PORT_42=21 REMAP_PORT_41=22 REMAP_PORT_40=23 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=16 REMAP_PORT_46=17 REMAP_PORT_45=18 REMAP_PORT_44=19 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=8 REMAP_PORT_50=9 REMAP_PORT_49=10 REMAP_PORT_48=11 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=12 REMAP_PORT_54=13 REMAP_PORT_53=14 REMAP_PORT_52=15 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=4 REMAP_PORT_58=5 REMAP_PORT_57=6 REMAP_PORT_56=7 +modreg CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0 REMAP_PORT_62=1 REMAP_PORT_61=2 REMAP_PORT_60=3 + +led 0 auto on +led 0 start + +led 1 stop +led 1 prog 12 00 61 F1 12 10 61 F2 12 04 61 F3 12 04 61 F4 67 16 86 F0 77 74 96 F2 2E F1 67 2B 67 3F 16 F3 FE F1 61 F1 12 00 DE F2 74 16 57 2E F1 32 00 32 01 B7 97 75 3A 02 01 60 FE 57 02 00 60 FE 57 2E F1 32 08 97 75 58 77 48 06 FE D2 01 70 50 77 66 06 F0 C2 08 74 58 77 66 16 F4 91 22 0E 87 22 0E 87 DA 00 74 5A 57 16 F4 91 22 0F 87 22 0E 87 DA 00 74 68 57 02 80 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0 REMAP_PORT_2=1 REMAP_PORT_1=2 REMAP_PORT_0=3 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=4 REMAP_PORT_6=5 REMAP_PORT_5=6 REMAP_PORT_4=7 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=12 REMAP_PORT_10=13 REMAP_PORT_9=14 REMAP_PORT_8=15 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=8 REMAP_PORT_14=9 REMAP_PORT_13=10 REMAP_PORT_12=11 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=16 REMAP_PORT_18=17 REMAP_PORT_17=18 REMAP_PORT_16=19 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=20 REMAP_PORT_22=21 REMAP_PORT_21=22 REMAP_PORT_20=23 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=28 REMAP_PORT_26=29 REMAP_PORT_25=30 REMAP_PORT_24=31 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=24 REMAP_PORT_30=25 REMAP_PORT_29=26 REMAP_PORT_28=27 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=32 REMAP_PORT_34=33 REMAP_PORT_33=34 REMAP_PORT_32=35 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=36 REMAP_PORT_38=37 REMAP_PORT_37=38 REMAP_PORT_36=39 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=44 REMAP_PORT_42=45 REMAP_PORT_41=46 REMAP_PORT_40=47 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=40 REMAP_PORT_46=41 REMAP_PORT_45=42 REMAP_PORT_44=43 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=48 REMAP_PORT_50=49 REMAP_PORT_49=50 REMAP_PORT_48=51 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=52 REMAP_PORT_54=53 REMAP_PORT_53=54 REMAP_PORT_52=55 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=60 REMAP_PORT_58=61 REMAP_PORT_57=62 REMAP_PORT_56=63 +modreg CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=56 REMAP_PORT_62=57 REMAP_PORT_61=58 REMAP_PORT_60=59 + +led 1 auto on +led 1 start + +led 2 stop +led 2 prog 12 00 61 F1 12 10 61 F2 12 04 61 F3 12 04 61 F4 67 16 86 F0 77 74 96 F2 2E F1 67 2B 67 3F 16 F3 FE F1 61 F1 12 00 DE F2 74 16 57 2E F1 32 00 32 01 B7 97 75 3A 02 01 60 FE 57 02 00 60 FE 57 2E F1 32 08 97 75 58 77 48 06 FE D2 01 70 50 77 66 06 F0 C2 08 74 58 77 66 16 F4 91 22 0E 87 22 0E 87 DA 00 74 5A 57 16 F4 91 22 0F 87 22 0E 87 DA 00 74 68 57 02 80 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=56 REMAP_PORT_2=57 REMAP_PORT_1=58 REMAP_PORT_0=59 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=60 REMAP_PORT_6=61 REMAP_PORT_5=62 REMAP_PORT_4=63 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=52 REMAP_PORT_10=53 REMAP_PORT_9=54 REMAP_PORT_8=55 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=48 REMAP_PORT_14=49 REMAP_PORT_13=50 REMAP_PORT_12=51 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=40 REMAP_PORT_18=41 REMAP_PORT_17=42 REMAP_PORT_16=43 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=44 REMAP_PORT_22=45 REMAP_PORT_21=46 REMAP_PORT_20=47 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=36 REMAP_PORT_26=37 REMAP_PORT_25=38 REMAP_PORT_24=39 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=32 REMAP_PORT_30=33 REMAP_PORT_29=34 REMAP_PORT_28=35 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=24 REMAP_PORT_34=25 REMAP_PORT_33=26 REMAP_PORT_32=27 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=28 REMAP_PORT_38=29 REMAP_PORT_37=30 REMAP_PORT_36=31 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=20 REMAP_PORT_42=21 REMAP_PORT_41=22 REMAP_PORT_40=23 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=16 REMAP_PORT_46=17 REMAP_PORT_45=18 REMAP_PORT_44=19 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=8 REMAP_PORT_50=9 REMAP_PORT_49=10 REMAP_PORT_48=11 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=12 REMAP_PORT_54=13 REMAP_PORT_53=14 REMAP_PORT_52=15 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=4 REMAP_PORT_58=5 REMAP_PORT_57=6 REMAP_PORT_56=7 +modreg CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0 REMAP_PORT_62=1 REMAP_PORT_61=2 REMAP_PORT_60=3 + +led 2 auto on +led 2 start + +led 3 stop +led 3 prog 12 00 61 F1 12 10 61 F2 12 04 61 F3 12 04 61 F4 67 16 86 F0 77 74 96 F2 2E F1 67 2B 67 3F 16 F3 FE F1 61 F1 12 00 DE F2 74 16 57 2E F1 32 00 32 01 B7 97 75 3A 02 01 60 FE 57 02 00 60 FE 57 2E F1 32 08 97 75 58 77 48 06 FE D2 01 70 50 77 66 06 F0 C2 08 74 58 77 66 16 F4 91 22 0E 87 22 0E 87 DA 00 74 5A 57 16 F4 91 22 0F 87 22 0E 87 DA 00 74 68 57 02 80 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0 REMAP_PORT_2=1 REMAP_PORT_1=2 REMAP_PORT_0=3 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=4 REMAP_PORT_6=5 REMAP_PORT_5=6 REMAP_PORT_4=7 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=12 REMAP_PORT_10=13 REMAP_PORT_9=14 REMAP_PORT_8=15 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=8 REMAP_PORT_14=9 REMAP_PORT_13=10 REMAP_PORT_12=11 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=16 REMAP_PORT_18=17 REMAP_PORT_17=18 REMAP_PORT_16=19 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=20 REMAP_PORT_22=21 REMAP_PORT_21=22 REMAP_PORT_20=23 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=28 REMAP_PORT_26=29 REMAP_PORT_25=30 REMAP_PORT_24=31 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=24 REMAP_PORT_30=25 REMAP_PORT_29=26 REMAP_PORT_28=27 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=32 REMAP_PORT_34=33 REMAP_PORT_33=34 REMAP_PORT_32=35 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=36 REMAP_PORT_38=37 REMAP_PORT_37=38 REMAP_PORT_36=39 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=44 REMAP_PORT_42=45 REMAP_PORT_41=46 REMAP_PORT_40=47 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=40 REMAP_PORT_46=41 REMAP_PORT_45=42 REMAP_PORT_44=43 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=48 REMAP_PORT_50=49 REMAP_PORT_49=50 REMAP_PORT_48=51 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=52 REMAP_PORT_54=53 REMAP_PORT_53=54 REMAP_PORT_52=55 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=60 REMAP_PORT_58=61 REMAP_PORT_57=62 REMAP_PORT_56=63 +modreg CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=56 REMAP_PORT_62=57 REMAP_PORT_61=58 REMAP_PORT_60=59 + +led 3 auto on +led 3 start + +led 4 stop +led 4 prog 12 00 61 F1 12 40 61 F2 12 01 61 F3 12 01 61 F4 67 16 86 F0 77 74 96 F2 2E F1 67 2B 67 3F 16 F3 FE F1 61 F1 12 00 DE F2 74 16 57 2E F1 32 00 32 01 B7 97 75 3A 02 01 60 FE 57 02 00 60 FE 57 2E F1 32 08 97 75 58 77 48 06 FE D2 01 70 50 77 66 06 F0 C2 08 74 58 77 66 16 F4 91 22 0E 87 22 0E 87 DA 00 74 5A 57 16 F4 91 22 0F 87 22 0E 87 DA 00 74 68 57 02 80 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=62 REMAP_PORT_2=0 REMAP_PORT_1=63 REMAP_PORT_0=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=0 REMAP_PORT_6=0 REMAP_PORT_5=0 REMAP_PORT_4=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=0 REMAP_PORT_10=0 REMAP_PORT_9=0 REMAP_PORT_8=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=0 REMAP_PORT_14=0 REMAP_PORT_13=0 REMAP_PORT_12=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=0 REMAP_PORT_18=0 REMAP_PORT_17=0 REMAP_PORT_16=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=0 REMAP_PORT_22=0 REMAP_PORT_21=0 REMAP_PORT_20=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=0 REMAP_PORT_26=0 REMAP_PORT_25=0 REMAP_PORT_24=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=0 REMAP_PORT_30=0 REMAP_PORT_29=0 REMAP_PORT_28=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=0 REMAP_PORT_34=0 REMAP_PORT_33=0 REMAP_PORT_32=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=0 REMAP_PORT_38=0 REMAP_PORT_37=0 REMAP_PORT_36=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=0 REMAP_PORT_42=0 REMAP_PORT_41=0 REMAP_PORT_40=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=0 REMAP_PORT_46=0 REMAP_PORT_45=0 REMAP_PORT_44=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=0 REMAP_PORT_50=0 REMAP_PORT_49=0 REMAP_PORT_48=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=0 REMAP_PORT_54=0 REMAP_PORT_53=0 REMAP_PORT_52=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=0 REMAP_PORT_58=0 REMAP_PORT_57=0 REMAP_PORT_56=0 +modreg CMIC_LEDUP4_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0 REMAP_PORT_62=0 REMAP_PORT_61=0 REMAP_PORT_60=0 + +led 4 auto on +led 4 start diff --git a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/plugins/eeprom.py b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..64ddb99554b --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +############################################################################# +# Ingrasys S9200-64X +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + i2c_bus = "0" + i2c_addr = "0051" + self.eeprom_path = "/sys/class/i2c-adapter/i2c-" + i2c_bus + "/" + i2c_bus + "-" + i2c_addr + "/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/plugins/psuutil.py b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/plugins/psuutil.py new file mode 100644 index 00000000000..cc996057e09 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/plugins/psuutil.py @@ -0,0 +1,92 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + SYSFS_PSU_DIR = ["/sys/bus/i2c/devices/i2c-18/18-0050", + "/sys/bus/i2c/devices/i2c-17/17-0050"] + + def __init__(self): + PsuBase.__init__(self) + + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psu_pg' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU status + if (attr_value == 1): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + attr_file ='psu_abs' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU presence + if (attr_value == 0): + status = 1 + + return status + diff --git a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..584b0e9716b --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/plugins/sfputil.py @@ -0,0 +1,268 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 63 + PORTS_IN_BLOCK = 64 + + EEPROM_OFFSET = 29 + + _port_to_eeprom_mapping = {} + + _logic_to_phy_port_mapping = { + 0: 0, + 1: 1, + 2: 4, + 3: 5, + 4: 8, + 5: 9, + 6: 12, + 7: 13, + 8: 16, + 9: 17, + 10: 20, + 11: 21, + 12: 24, + 13: 25, + 14: 28, + 15: 29, + 16: 32, + 17: 33, + 18: 36, + 19: 37, + 20: 40, + 21: 41, + 22: 44, + 23: 45, + 24: 48, + 25: 49, + 26: 52, + 27: 53, + 28: 56, + 29: 57, + 30: 60, + 31: 61, + 32: 2, + 33: 3, + 34: 6, + 35: 7, + 36: 10, + 37: 11, + 38: 14, + 39: 15, + 40: 18, + 41: 19, + 42: 22, + 43: 23, + 44: 26, + 45: 27, + 46: 30, + 47: 31, + 48: 34, + 49: 35, + 50: 38, + 51: 39, + 52: 42, + 53: 43, + 54: 46, + 55: 47, + 56: 50, + 57: 51, + 58: 54, + 59: 55, + 60: 58, + 61: 59, + 62: 62, + 63: 63 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + phy_port = self._logic_to_phy_port_mapping[x] + self._port_to_eeprom_mapping[x] = eeprom_path.format(phy_port + self.EEPROM_OFFSET) + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # logic port to physical port mapping + port_num = self._logic_to_phy_port_mapping[port_num] + + try: + reg_file = open("/sys/devices/platform/ingrasys-s9200-cpld.0/qsfp_modprs") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # logic port to physical port mapping + port_num = self._logic_to_phy_port_mapping[port_num] + + try: + reg_file = open("/sys/devices/platform/ingrasys-s9200-cpld.0/qsfp_lpmode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # logic port to physical port mapping + port_num = self._logic_to_phy_port_mapping[port_num] + + try: + reg_file = open("/sys/devices/platform/ingrasys-s9200-cpld.0/qsfp_lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = format(reg_value, 'x') + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/devices/platform/ingrasys-s9200-cpld.0/qsfp_reset" + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # logic port to physical port mapping + port_num = self._logic_to_phy_port_mapping[port_num] + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + content = format(reg_value, 'x') + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + content = format(reg_value, 'x') + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/sensors.conf b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/sensors.conf new file mode 100644 index 00000000000..25ab494e1f8 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9200_64x-r0/sensors.conf @@ -0,0 +1,80 @@ +# libsensors configuration file +chip "i350bb-*" + ignore loc1 + +chip "jc42-*" + label temp1 "DIMM Temp" + set temp1_max 50 + set temp1_crit 85 + +chip "w83795adg-*" + ignore in0 + label in1 "P0V9" + set in1_min 0.84 * 0.97 + set in1_max 0.96 * 1.03 + ignore in2 + label in3 "P1V8" + set in3_min 1.8 * 0.97 + set in3_max 1.8 * 1.03 + label in4 "P1V0" + set in4_min 1.0 * 0.97 + set in4_max 1.0 * 1.03 + label in5 "P0V8" + set in5_min 0.831 * 0.97 + set in5_max 0.831 * 1.03 + ignore in6 + ignore in7 + ignore in8 + ignore in9 + ignore in10 + ignore in11 + ignore in12 + ignore in13 + ignore in14 + ignore in15 + ignore in16 + ignore in17 + ignore in18 + ignore in19 + label fan1 "FANTRAY 1" + ignore fan2 + label fan3 "FANTRAY 2" + ignore fan4 + label fan5 "FANTRAY 3" + ignore fan6 + label fan7 "FANTRAY 4" + ignore fan8 + ignore temp1 + ignore temp2 + ignore temp3 + ignore temp4 + ignore temp5 + ignore temp6 + ignore intrusion0 + +chip "tmp75-i2c-*-4A" + label temp1 "BMC Board Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +chip "tmp75-i2c-*-4F" + label temp1 "x86 CPU Board Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +bus "i2c-6" "i2c-0-mux (chan_id 5)" +chip "lm75-i2c-6-4E" + label temp1 "MAC Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +chip "lm75-i2c-6-4D" + label temp1 "REAR MAC Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +bus "i2c-7" "i2c-0-mux (chan_id 6)" +chip "lm75-i2c-7-4D" + label temp1 "Front MAC Temp" + set temp1_max 50 + set temp1_max_hyst 45 diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers.json.j2 b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers.json.j2 new file mode 100644 index 00000000000..9354b7ec5b5 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} \ No newline at end of file diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers_defaults_t0.j2 b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..82194b2c318 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers_defaults_t0.j2 @@ -0,0 +1,69 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '20971328' %} +{% set ingress_lossy_pool_size = '20971328' %} +{% set egress_lossless_pool_size = '20971328' %} +{% set egress_lossy_pool_size = '20971328' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"78400", + "xoff":"132160", + "size":"3584", + "static_th":"82880" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"3584", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"3584", + "dynamic_th":"-4" + } + }, +{%- endmacro %} + +{# the typo of generate_pg_profils dued to buffers_config.j2 #} +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + } +{%- endmacro %} + +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} \ No newline at end of file diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers_defaults_t1.j2 b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..82194b2c318 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers_defaults_t1.j2 @@ -0,0 +1,69 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '20971328' %} +{% set ingress_lossy_pool_size = '20971328' %} +{% set egress_lossless_pool_size = '20971328' %} +{% set egress_lossy_pool_size = '20971328' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"78400", + "xoff":"132160", + "size":"3584", + "static_th":"82880" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"3584", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"3584", + "dynamic_th":"-4" + } + }, +{%- endmacro %} + +{# the typo of generate_pg_profils dued to buffers_config.j2 #} +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + } +{%- endmacro %} + +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} \ No newline at end of file diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/pg_profile_lookup.ini b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/pg_profile_lookup.ini new file mode 100644 index 00000000000..d98b0eca6d1 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 3584 32256 59136 36736 + 25000 5m 3584 41216 68096 45696 + 40000 5m 3584 47488 74368 51968 + 50000 5m 3584 52864 79744 57344 + 100000 5m 3584 78400 132160 82880 + 10000 40m 3584 32256 59136 36736 + 25000 40m 3584 41216 68096 45696 + 40000 40m 3584 47488 74368 51968 + 50000 40m 3584 52864 79744 57344 + 100000 40m 3584 78400 132160 82880 + 10000 300m 3584 32256 65856 36736 + 25000 300m 3584 41216 84672 45696 + 40000 300m 3584 47488 101024 51968 + 50000 300m 3584 52864 113120 57344 + 100000 300m 3584 78400 198688 82880 \ No newline at end of file diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/port_config.ini b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/port_config.ini new file mode 100644 index 00000000000..d57c1f35018 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias index +Ethernet0 0,1,2,3 Ethernet1/1 0 +Ethernet4 4,5,6,7 Ethernet2/1 1 +Ethernet8 20,21,22,23 Ethernet3/1 2 +Ethernet12 16,17,18,19 Ethernet4/1 3 +Ethernet16 36,37,38,39 Ethernet5/1 4 +Ethernet20 32,33,34,35 Ethernet6/1 5 +Ethernet24 52,53,54,55 Ethernet7/1 6 +Ethernet28 48,49,50,51 Ethernet8/1 7 +Ethernet32 68,69,70,71 Ethernet9/1 8 +Ethernet36 64,65,66,67 Ethernet10/1 9 +Ethernet40 84,85,86,87 Ethernet11/1 10 +Ethernet44 80,81,82,83 Ethernet12/1 11 +Ethernet48 100,101,102,103 Ethernet13/1 12 +Ethernet52 96,97,98,99 Ethernet14/1 13 +Ethernet56 116,117,118,119 Ethernet15/1 14 +Ethernet60 112,113,114,115 Ethernet16/1 15 +Ethernet64 132,133,134,135 Ethernet17/1 16 +Ethernet68 128,129,130,131 Ethernet18/1 17 +Ethernet72 148,149,150,151 Ethernet19/1 18 +Ethernet76 144,145,146,147 Ethernet20/1 19 +Ethernet80 164,165,166,167 Ethernet21/1 20 +Ethernet84 160,161,162,163 Ethernet22/1 21 +Ethernet88 180,181,182,183 Ethernet23/1 22 +Ethernet92 176,177,178,179 Ethernet24/1 23 +Ethernet96 196,197,198,199 Ethernet25/1 24 +Ethernet100 192,193,194,195 Ethernet26/1 25 +Ethernet104 212,213,214,215 Ethernet27/1 26 +Ethernet108 208,209,210,211 Ethernet28/1 27 +Ethernet112 228,229,230,231 Ethernet29/1 28 +Ethernet116 224,225,226,227 Ethernet30/1 29 +Ethernet120 244,245,246,247 Ethernet31/1 30 +Ethernet124 240,241,242,243 Ethernet32/1 31 +Ethernet128 12,13,14,15 Ethernet33/1 32 +Ethernet132 8,9,10,11 Ethernet34/1 33 +Ethernet136 28,29,30,31 Ethernet35/1 34 +Ethernet140 24,25,26,27 Ethernet36/1 35 +Ethernet144 44,45,46,47 Ethernet37/1 36 +Ethernet148 40,41,42,43 Ethernet38/1 37 +Ethernet152 60,61,62,63 Ethernet39/1 38 +Ethernet156 56,57,58,59 Ethernet40/1 39 +Ethernet160 76,77,78,79 Ethernet41/1 40 +Ethernet164 72,73,74,75 Ethernet42/1 41 +Ethernet168 92,93,94,95 Ethernet43/1 42 +Ethernet172 88,89,90,91 Ethernet44/1 43 +Ethernet176 108,109,110,111 Ethernet45/1 44 +Ethernet180 104,105,106,107 Ethernet46/1 45 +Ethernet184 124,125,126,127 Ethernet47/1 46 +Ethernet188 120,121,122,123 Ethernet48/1 47 +Ethernet192 140,141,142,143 Ethernet49/1 48 +Ethernet196 136,137,138,139 Ethernet50/1 49 +Ethernet200 156,157,158,159 Ethernet51/1 50 +Ethernet204 152,153,154,155 Ethernet52/1 51 +Ethernet208 172,173,174,175 Ethernet53/1 52 +Ethernet212 168,169,170,171 Ethernet54/1 53 +Ethernet216 188,189,190,191 Ethernet55/1 54 +Ethernet220 184,185,186,187 Ethernet56/1 55 +Ethernet224 204,205,206,207 Ethernet57/1 56 +Ethernet228 200,201,202,203 Ethernet58/1 57 +Ethernet232 220,221,222,223 Ethernet59/1 58 +Ethernet236 216,217,218,219 Ethernet60/1 59 +Ethernet240 236,237,238,239 Ethernet61/1 60 +Ethernet244 232,233,234,235 Ethernet62/1 61 +Ethernet248 248,249,250,251 Ethernet63/1 62 +Ethernet252 252,253,254,255 Ethernet64/1 63 \ No newline at end of file diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/port_config.nps b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/port_config.nps new file mode 100644 index 00000000000..0e14b9ced3f --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/port_config.nps @@ -0,0 +1,681 @@ +init start stage low-level +init set port-map port=0 eth-macro=0 lane=0 max-speed=100g active=true +init set port-map port=1 eth-macro=1 lane=0 max-speed=100g active=true +init set port-map port=2 eth-macro=5 lane=0 max-speed=100g active=true +init set port-map port=3 eth-macro=4 lane=0 max-speed=100g active=true +init set port-map port=4 eth-macro=9 lane=0 max-speed=100g active=true +init set port-map port=5 eth-macro=8 lane=0 max-speed=100g active=true +init set port-map port=6 eth-macro=13 lane=0 max-speed=100g active=true +init set port-map port=7 eth-macro=12 lane=0 max-speed=100g active=true +init set port-map port=8 eth-macro=17 lane=0 max-speed=100g active=true +init set port-map port=9 eth-macro=16 lane=0 max-speed=100g active=true +init set port-map port=10 eth-macro=21 lane=0 max-speed=100g active=true +init set port-map port=11 eth-macro=20 lane=0 max-speed=100g active=true +init set port-map port=12 eth-macro=25 lane=0 max-speed=100g active=true +init set port-map port=13 eth-macro=24 lane=0 max-speed=100g active=true +init set port-map port=14 eth-macro=29 lane=0 max-speed=100g active=true +init set port-map port=15 eth-macro=28 lane=0 max-speed=100g active=true +init set port-map port=16 eth-macro=33 lane=0 max-speed=100g active=true +init set port-map port=17 eth-macro=32 lane=0 max-speed=100g active=true +init set port-map port=18 eth-macro=37 lane=0 max-speed=100g active=true +init set port-map port=19 eth-macro=36 lane=0 max-speed=100g active=true +init set port-map port=20 eth-macro=41 lane=0 max-speed=100g active=true +init set port-map port=21 eth-macro=40 lane=0 max-speed=100g active=true +init set port-map port=22 eth-macro=45 lane=0 max-speed=100g active=true +init set port-map port=23 eth-macro=44 lane=0 max-speed=100g active=true +init set port-map port=24 eth-macro=49 lane=0 max-speed=100g active=true +init set port-map port=25 eth-macro=48 lane=0 max-speed=100g active=true +init set port-map port=26 eth-macro=53 lane=0 max-speed=100g active=true +init set port-map port=27 eth-macro=52 lane=0 max-speed=100g active=true +init set port-map port=28 eth-macro=57 lane=0 max-speed=100g active=true +init set port-map port=29 eth-macro=56 lane=0 max-speed=100g active=true +init set port-map port=30 eth-macro=61 lane=0 max-speed=100g active=true +init set port-map port=31 eth-macro=60 lane=0 max-speed=100g active=true +init set port-map port=32 eth-macro=3 lane=0 max-speed=100g active=true +init set port-map port=33 eth-macro=2 lane=0 max-speed=100g active=true +init set port-map port=34 eth-macro=7 lane=0 max-speed=100g active=true +init set port-map port=35 eth-macro=6 lane=0 max-speed=100g active=true +init set port-map port=36 eth-macro=11 lane=0 max-speed=100g active=true +init set port-map port=37 eth-macro=10 lane=0 max-speed=100g active=true +init set port-map port=38 eth-macro=15 lane=0 max-speed=100g active=true +init set port-map port=39 eth-macro=14 lane=0 max-speed=100g active=true +init set port-map port=40 eth-macro=19 lane=0 max-speed=100g active=true +init set port-map port=41 eth-macro=18 lane=0 max-speed=100g active=true +init set port-map port=42 eth-macro=23 lane=0 max-speed=100g active=true +init set port-map port=43 eth-macro=22 lane=0 max-speed=100g active=true +init set port-map port=44 eth-macro=27 lane=0 max-speed=100g active=true +init set port-map port=45 eth-macro=26 lane=0 max-speed=100g active=true +init set port-map port=46 eth-macro=31 lane=0 max-speed=100g active=true +init set port-map port=47 eth-macro=30 lane=0 max-speed=100g active=true +init set port-map port=48 eth-macro=35 lane=0 max-speed=100g active=true +init set port-map port=49 eth-macro=34 lane=0 max-speed=100g active=true +init set port-map port=50 eth-macro=39 lane=0 max-speed=100g active=true +init set port-map port=51 eth-macro=38 lane=0 max-speed=100g active=true +init set port-map port=52 eth-macro=43 lane=0 max-speed=100g active=true +init set port-map port=53 eth-macro=42 lane=0 max-speed=100g active=true +init set port-map port=54 eth-macro=47 lane=0 max-speed=100g active=true +init set port-map port=55 eth-macro=46 lane=0 max-speed=100g active=true +init set port-map port=56 eth-macro=51 lane=0 max-speed=100g active=true +init set port-map port=57 eth-macro=50 lane=0 max-speed=100g active=true +init set port-map port=58 eth-macro=55 lane=0 max-speed=100g active=true +init set port-map port=59 eth-macro=54 lane=0 max-speed=100g active=true +init set port-map port=60 eth-macro=59 lane=0 max-speed=100g active=true +init set port-map port=61 eth-macro=58 lane=0 max-speed=100g active=true +init set port-map port=62 eth-macro=62 lane=0 max-speed=100g active=true +init set port-map port=63 eth-macro=63 lane=0 max-speed=100g active=true +init set port-map port=129 eth-macro=0 lane=1 max-speed=10g active=true guarantee=true cpi=true +init set port-map port=130 eth-macro=0 lane=0 max-speed=10g active=true guarantee=true cpi=true init-done=true + +init start stage task-rsrc +init start stage module +init start stage task + +phy set lane-swap portlist=0 lane-cnt=4 property=tx data=0x3.2.0.1 +phy set lane-swap portlist=1 lane-cnt=4 property=tx data=0x2.1.3.0 +phy set lane-swap portlist=2 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=3 lane-cnt=4 property=tx data=0x2.3.0.1 +phy set lane-swap portlist=4 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=5 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=6 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=7 lane-cnt=4 property=tx data=0x1.0.2.3 +phy set lane-swap portlist=8 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=9 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=10 lane-cnt=4 property=tx data=0x0.3.2.1 +phy set lane-swap portlist=11 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=12 lane-cnt=4 property=tx data=0x3.2.0.1 +phy set lane-swap portlist=13 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap portlist=14 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=15 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=16 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=17 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=18 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=19 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=20 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=21 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=22 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=23 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=24 lane-cnt=4 property=tx data=0x0.3.2.1 +phy set lane-swap portlist=25 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=26 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=27 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=28 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=29 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=30 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=31 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=32 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=33 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=34 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=35 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=36 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=37 lane-cnt=4 property=tx data=0x3.1.0.2 +phy set lane-swap portlist=38 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=39 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=40 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=41 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=42 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=43 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=44 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap portlist=45 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap portlist=46 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=47 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=48 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=49 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=50 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=51 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=52 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=53 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=54 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=55 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=56 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=57 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=58 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=59 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=60 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=61 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=62 lane-cnt=4 property=tx data=0x1.0.2.3 +phy set lane-swap portlist=63 lane-cnt=4 property=tx data=0x3.1.0.2 +phy set lane-swap portlist=129 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=130 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=0 lane-cnt=4 property=rx data=0x2.0.3.1 +phy set lane-swap portlist=1 lane-cnt=4 property=rx data=0x1.3.0.2 +phy set lane-swap portlist=2 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=3 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=4 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=5 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=6 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=7 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=8 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=9 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=10 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=11 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=12 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap portlist=13 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap portlist=14 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=15 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=16 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=17 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=18 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=19 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=20 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=21 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=22 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=23 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=24 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=25 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=26 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=27 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=28 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=29 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=30 lane-cnt=4 property=rx data=0x0.2.1.3 +phy set lane-swap portlist=31 lane-cnt=4 property=rx data=0x0.2.1.3 +phy set lane-swap portlist=32 lane-cnt=4 property=rx data=0x0.2.1.3 +phy set lane-swap portlist=33 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=34 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=35 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=36 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=37 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=38 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=39 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=40 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=41 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=42 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=43 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=44 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap portlist=45 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap portlist=46 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=47 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=48 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=49 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=50 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=51 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=52 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=53 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=54 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=55 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=56 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=57 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=58 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=59 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=60 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=61 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=62 lane-cnt=4 property=rx data=0x1.3.0.2 +phy set lane-swap portlist=63 lane-cnt=4 property=rx data=0x3.1.2.0 +phy set lane-swap portlist=129 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=130 lane-cnt=1 property=rx data=0x0 + +phy set polarity-rev portlist=0 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=1 lane-cnt=4 property=tx data=0x0.1.0.0 +phy set polarity-rev portlist=2 lane-cnt=4 property=tx data=0x1.0.0.1 +phy set polarity-rev portlist=3 lane-cnt=4 property=tx data=0x1.1.1.1 +phy set polarity-rev portlist=4 lane-cnt=4 property=tx data=0x0.1.0.1 +phy set polarity-rev portlist=5 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=6 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=7 lane-cnt=4 property=tx data=0x1.0.0.0 +phy set polarity-rev portlist=8 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=9 lane-cnt=4 property=tx data=0x0.1.0.0 +phy set polarity-rev portlist=10 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=11 lane-cnt=4 property=tx data=0x0.1.0.0 +phy set polarity-rev portlist=12 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=13 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=14 lane-cnt=4 property=tx data=0x1.0.0.0 +phy set polarity-rev portlist=15 lane-cnt=4 property=tx data=0x0.1.0.0 +phy set polarity-rev portlist=16 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=17 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=18 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=19 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=20 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=21 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=22 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=23 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=24 lane-cnt=4 property=tx data=0x0.0.1.0 +phy set polarity-rev portlist=25 lane-cnt=4 property=tx data=0x1.0.0.1 +phy set polarity-rev portlist=26 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=27 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=28 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=29 lane-cnt=4 property=tx data=0x0.1.0.0 +phy set polarity-rev portlist=30 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=31 lane-cnt=4 property=tx data=0x0.0.1.0 +phy set polarity-rev portlist=32 lane-cnt=4 property=tx data=0x0.1.1.1 +phy set polarity-rev portlist=33 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=34 lane-cnt=4 property=tx data=0x0.1.1.1 +phy set polarity-rev portlist=35 lane-cnt=4 property=tx data=0x1.0.0.0 +phy set polarity-rev portlist=36 lane-cnt=4 property=tx data=0x0.0.1.1 +phy set polarity-rev portlist=37 lane-cnt=4 property=tx data=0x0.0.0.1 +phy set polarity-rev portlist=38 lane-cnt=4 property=tx data=0x0.1.1.0 +phy set polarity-rev portlist=39 lane-cnt=4 property=tx data=0x1.0.1.0 +phy set polarity-rev portlist=40 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=41 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=42 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=43 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=44 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=45 lane-cnt=4 property=tx data=0x0.0.1.0 +phy set polarity-rev portlist=46 lane-cnt=4 property=tx data=0x0.0.0.1 +phy set polarity-rev portlist=47 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=48 lane-cnt=4 property=tx data=0x0.0.1.1 +phy set polarity-rev portlist=49 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=50 lane-cnt=4 property=tx data=0x0.0.1.1 +phy set polarity-rev portlist=51 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=52 lane-cnt=4 property=tx data=0x0.0.1.1 +phy set polarity-rev portlist=53 lane-cnt=4 property=tx data=0x0.0.1.0 +phy set polarity-rev portlist=54 lane-cnt=4 property=tx data=0x0.0.1.1 +phy set polarity-rev portlist=55 lane-cnt=4 property=tx data=0x0.0.1.1 +phy set polarity-rev portlist=56 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=57 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=58 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=59 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=60 lane-cnt=4 property=tx data=0x0.1.0.1 +phy set polarity-rev portlist=61 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=62 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=63 lane-cnt=4 property=tx data=0x0.0.1.0 +phy set polarity-rev portlist=129 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=130 lane-cnt=1 property=tx data=0x0 + +phy set polarity-rev portlist=0 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=1 lane-cnt=4 property=rx data=0x1.0.0.0 +phy set polarity-rev portlist=2 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=3 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=4 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=5 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=6 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=7 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=8 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=9 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=10 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=11 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=12 lane-cnt=4 property=rx data=0x1.0.0.0 +phy set polarity-rev portlist=13 lane-cnt=4 property=rx data=0x0.0.1.0 +phy set polarity-rev portlist=14 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=15 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=16 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=17 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=18 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=19 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=20 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=21 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=22 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=23 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=24 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=25 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=26 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=27 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=28 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=29 lane-cnt=4 property=rx data=0x1.0.1.0 +phy set polarity-rev portlist=30 lane-cnt=4 property=rx data=0x0.0.1.0 +phy set polarity-rev portlist=31 lane-cnt=4 property=rx data=0x1.1.0.0 +phy set polarity-rev portlist=32 lane-cnt=4 property=rx data=0x0.1.1.1 +phy set polarity-rev portlist=33 lane-cnt=4 property=rx data=0x1.1.1.0 +phy set polarity-rev portlist=34 lane-cnt=4 property=rx data=0x0.0.1.1 +phy set polarity-rev portlist=35 lane-cnt=4 property=rx data=0x0.0.1.0 +phy set polarity-rev portlist=36 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=37 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=38 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=39 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=40 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=41 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=42 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=43 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=44 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=45 lane-cnt=4 property=rx data=0x0.1.0.1 +phy set polarity-rev portlist=46 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=47 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=48 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=49 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=50 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=51 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=52 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=53 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=54 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=55 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=56 lane-cnt=4 property=rx data=0x0.1.0.0 +phy set polarity-rev portlist=57 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=58 lane-cnt=4 property=rx data=0x0.1.0.0 +phy set polarity-rev portlist=59 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=60 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=61 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=62 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=63 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=129 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=130 lane-cnt=1 property=rx data=0x0 + +phy set pre-emphasis portlist=0 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=0 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=0 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=0 lane-cnt=4 property=c0 data=0x19.19.18.19 +phy set pre-emphasis portlist=1 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=1 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=1 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=1 lane-cnt=4 property=c0 data=0x19.18.19.19 +phy set pre-emphasis portlist=2 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=2 lane-cnt=4 property=c1 data=0x08.08.09.09 +phy set pre-emphasis portlist=2 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=2 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=3 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=3 lane-cnt=4 property=c1 data=0x08.08.09.08 +phy set pre-emphasis portlist=3 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=3 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=4 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=4 lane-cnt=4 property=c1 data=0x06.07.07.08 +phy set pre-emphasis portlist=4 lane-cnt=4 property=cn1 data=0x03.02.02.02 +phy set pre-emphasis portlist=4 lane-cnt=4 property=c0 data=0x19.19.18.19 +phy set pre-emphasis portlist=5 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=5 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis portlist=5 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=5 lane-cnt=4 property=c0 data=0x19.19.18.18 +phy set pre-emphasis portlist=6 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=6 lane-cnt=4 property=c1 data=0x06.06.06.07 +phy set pre-emphasis portlist=6 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=6 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=7 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=7 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=7 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=7 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=8 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=8 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=8 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=8 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=9 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=9 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=9 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=9 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=10 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=10 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=10 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=10 lane-cnt=4 property=c0 data=0x16.17.17.17 +phy set pre-emphasis portlist=11 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=11 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=11 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=11 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=12 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=12 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=12 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=12 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=13 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=13 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=13 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=13 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=14 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=14 lane-cnt=4 property=c1 data=0x04.05.04.05 +phy set pre-emphasis portlist=14 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=14 lane-cnt=4 property=c0 data=0x18.17.18.17 +phy set pre-emphasis portlist=15 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=15 lane-cnt=4 property=c1 data=0x06.05.06.06 +phy set pre-emphasis portlist=15 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=15 lane-cnt=4 property=c0 data=0x16.17.16.16 +phy set pre-emphasis portlist=16 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=16 lane-cnt=4 property=c1 data=0x05.06.06.06 +phy set pre-emphasis portlist=16 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=16 lane-cnt=4 property=c0 data=0x17.18.18.16 +phy set pre-emphasis portlist=17 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=17 lane-cnt=4 property=c1 data=0x04.04.04.04 +phy set pre-emphasis portlist=17 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=17 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=18 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=18 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=18 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=18 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=19 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=19 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=19 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=19 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=20 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=20 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=20 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=20 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=21 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=21 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=21 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=21 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=22 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=22 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=22 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=22 lane-cnt=4 property=c0 data=0x17.17.18.17 +phy set pre-emphasis portlist=23 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=23 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=23 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=23 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=24 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=24 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis portlist=24 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=24 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=25 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=25 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis portlist=25 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=25 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=26 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=26 lane-cnt=4 property=c1 data=0x08.08.07.07 +phy set pre-emphasis portlist=26 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=26 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=27 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=27 lane-cnt=4 property=c1 data=0x08.08.08.08 +phy set pre-emphasis portlist=27 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=27 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=28 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=28 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=28 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=28 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=29 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=29 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=29 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=29 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=30 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=30 lane-cnt=4 property=c1 data=0x08.09.09.09 +phy set pre-emphasis portlist=30 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=30 lane-cnt=4 property=c0 data=0x18.19.19.19 +phy set pre-emphasis portlist=31 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=31 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=31 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=31 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=32 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=32 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=32 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=32 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=33 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=33 lane-cnt=4 property=c1 data=0x08.09.09.09 +phy set pre-emphasis portlist=33 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=33 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=34 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=34 lane-cnt=4 property=c1 data=0x08.07.08.08 +phy set pre-emphasis portlist=34 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=34 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=35 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=35 lane-cnt=4 property=c1 data=0x08.08.07.08 +phy set pre-emphasis portlist=35 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=35 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=36 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=36 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis portlist=36 lane-cnt=4 property=cn1 data=0x01.02.02.02 +phy set pre-emphasis portlist=36 lane-cnt=4 property=c0 data=0x19.18.18.18 +phy set pre-emphasis portlist=37 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=37 lane-cnt=4 property=c1 data=0x06.06.06.07 +phy set pre-emphasis portlist=37 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=37 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=38 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=38 lane-cnt=4 property=c1 data=0x06.06.05.06 +phy set pre-emphasis portlist=38 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=38 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=39 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=39 lane-cnt=4 property=c1 data=0x06.07.06.06 +phy set pre-emphasis portlist=39 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=39 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=40 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=40 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=40 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=40 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=41 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=41 lane-cnt=4 property=c1 data=0x05.06.05.05 +phy set pre-emphasis portlist=41 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=41 lane-cnt=4 property=c0 data=0x16.17.18.18 +phy set pre-emphasis portlist=42 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=42 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=42 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=42 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=43 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=43 lane-cnt=4 property=c1 data=0x06.05.05.05 +phy set pre-emphasis portlist=43 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=43 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=44 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=44 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=44 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=44 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=45 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=45 lane-cnt=4 property=c1 data=0x05.05.04.05 +phy set pre-emphasis portlist=45 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=45 lane-cnt=4 property=c0 data=0x17.17.18.17 +phy set pre-emphasis portlist=46 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=46 lane-cnt=4 property=c1 data=0x05.05.06.06 +phy set pre-emphasis portlist=46 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=46 lane-cnt=4 property=c0 data=0x17.17.16.16 +phy set pre-emphasis portlist=47 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=47 lane-cnt=4 property=c1 data=0x05.05.06.06 +phy set pre-emphasis portlist=47 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=47 lane-cnt=4 property=c0 data=0x17.17.16.16 +phy set pre-emphasis portlist=48 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=48 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=48 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=48 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=49 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=49 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=49 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=49 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=50 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=50 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=50 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=50 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=51 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=51 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=51 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=51 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=52 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=52 lane-cnt=4 property=c1 data=0x06.06.05.05 +phy set pre-emphasis portlist=52 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=52 lane-cnt=4 property=c0 data=0x16.17.17.17 +phy set pre-emphasis portlist=53 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=53 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=53 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=53 lane-cnt=4 property=c0 data=0x16.17.17.17 +phy set pre-emphasis portlist=54 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=54 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=54 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=54 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=55 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=55 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=55 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=55 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=56 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=56 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis portlist=56 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=56 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=57 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=57 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis portlist=57 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=57 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=58 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=58 lane-cnt=4 property=c1 data=0x08.08.08.08 +phy set pre-emphasis portlist=58 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=58 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=59 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=59 lane-cnt=4 property=c1 data=0x08.08.08.08 +phy set pre-emphasis portlist=59 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=59 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=60 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=60 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=60 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=60 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=61 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=61 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=61 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=61 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=62 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=62 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=62 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=62 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=63 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=63 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=63 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=63 lane-cnt=4 property=c0 data=0x19.19.19.19 + +phy set pre-emphasis portlist=129 lane-cnt=1 property=c2 data=0x01 +phy set pre-emphasis portlist=129 lane-cnt=1 property=cn1 data=0x01 +phy set pre-emphasis portlist=129 lane-cnt=1 property=c0 data=0x02 +phy set pre-emphasis portlist=129 lane-cnt=1 property=c1 data=0x03 +phy set pre-emphasis portlist=130 lane-cnt=1 property=c2 data=0x01 +phy set pre-emphasis portlist=130 lane-cnt=1 property=cn1 data=0x01 +phy set pre-emphasis portlist=130 lane-cnt=1 property=c0 data=0x02 +phy set pre-emphasis portlist=130 lane-cnt=1 property=c1 data=0x03 + +phy set mdio portlist=0 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=1 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=2 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=3 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=4 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=5 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=6 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=7 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=8 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=9 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=10 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=11 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=12 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=13 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=14 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=15 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=16 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=17 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=18 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=19 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=20 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=21 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=22 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=23 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=24 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=25 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=26 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=27 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=28 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=29 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=30 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=31 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=32 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=33 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=34 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=35 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=36 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=37 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=38 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=39 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=40 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=41 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=42 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=43 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=44 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=45 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=46 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=47 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=48 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=49 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=50 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=51 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=52 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=53 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=54 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=55 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=56 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=57 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=58 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=59 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=60 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=61 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=62 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=63 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=129 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=130 devad=0x1E addr=0x2 data=0x0000 + +port set property portlist=0-63 speed=100g +port set property portlist=129-130 speed=10g +port set property portlist=0-63 medium-type=sr4 +port set property portlist=129-130 medium-type=kr +port set property portlist=0-63 fec=disable +port set adver portlist=129-130 speed-10g-kr +port set property portlist=129-130 an=enable + +port set property portlist=0-63,129-130 admin=enable diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/qos.json.j2 b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/qos.json.j2 new file mode 100644 index 00000000000..42eef17c362 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/qos.json.j2 @@ -0,0 +1,136 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "1", + "1": "0", + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "3": "3", + "4": "4" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "1", + "1": "0", + "3": "3", + "4": "4" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"1", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + }, + "WRED_PROFILE": { + "AZURE_LOSSY" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"516096", + "red_min_threshold":"516096", + "yellow_max_threshold":"516096", + "yellow_min_threshold":"516096", + "green_max_threshold": "184128", + "green_min_threshold": "184128" + }, + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"516096", + "red_min_threshold":"516096", + "yellow_max_threshold":"516096", + "yellow_min_threshold":"516096", + "green_max_threshold": "184128", + "green_min_threshold": "184128" + } + }, + "QUEUE": { + } +} diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/sai.profile b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/sai.profile new file mode 100644 index 00000000000..880f47910ac --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/platform/led_proc_init.nps +SAI_DSH_CONFIG_FILE=/usr/share/sonic/hwsku/port_config.nps diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/default_sku new file mode 100644 index 00000000000..46ddac21550 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S9230-64X t1 diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/fancontrol b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/fancontrol new file mode 100644 index 00000000000..86b4e636375 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/fancontrol @@ -0,0 +1,9 @@ +INTERVAL=10 +DEVPATH=hwmon7=devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-002f hwmon4=devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-7/7-004e +DEVNAME=hwmon7=w83795adg +FCTEMPS=hwmon7/device/pwm2=hwmon4/temp1_input +FCFANS=hwmon7/device/pwm2=hwmon7/device/fan7_input hwmon7/device/pwm2=hwmon7/device/fan5_input hwmon7/device/pwm2=hwmon7/device/fan3_input hwmon7/device/pwm2=hwmon7/device/fan1_input +MINTEMP=hwmon7/device/pwm2=20 +MAXTEMP=hwmon7/device/pwm2=60 +MINSTART=hwmon7/device/pwm2=75 +MINSTOP=hwmon7/device/pwm2=22 diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/installer.conf b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/led_proc_init.nps b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/led_proc_init.nps new file mode 100644 index 00000000000..717d3303f17 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/led_proc_init.nps @@ -0,0 +1,9 @@ +#unit NPS_CFG_TYPE_XXX param0 param1 value +#---- ---------------- ------ ------ ----- +0 NPS_CFG_TYPE_USE_UNIT_PORT 0 0 1 +0 NPS_CFG_TYPE_LED_CFG 0 0 6 +0 NPS_CFG_TYPE_CPI_PORT_MODE 129 0 1 +0 NPS_CFG_TYPE_CPI_PORT_MODE 130 0 1 +0 NPS_CFG_TYPE_USER_BUF_CTRL 0 0 1 +0 NPS_CFG_TYPE_HASH_L2_FDB_REGION_ENTRY_NUM 0 0 49152 +0 NPS_CFG_TYPE_HASH_L3_WITH_IPV6_PREFIX_64_REGION_ENTRY_NUM 0 0 32768 diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/eeprom.py b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..770b0cf43ba --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Ingrasys S9230-64X +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0051/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/psuutil.py b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/psuutil.py new file mode 100644 index 00000000000..cc996057e09 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/psuutil.py @@ -0,0 +1,92 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + SYSFS_PSU_DIR = ["/sys/bus/i2c/devices/i2c-18/18-0050", + "/sys/bus/i2c/devices/i2c-17/17-0050"] + + def __init__(self): + PsuBase.__init__(self) + + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psu_pg' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU status + if (attr_value == 1): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + attr_file ='psu_abs' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU presence + if (attr_value == 0): + status = 1 + + return status + diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..2f7a5395bb4 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/sfputil.py @@ -0,0 +1,295 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 63 + PORTS_IN_BLOCK = 64 + #TODO: modify according to port map + EEPROM_OFFSET = 33 + CPLD1_PORTS = 12 + CPLDx_PORTS = 13 + CPLD_OFFSET = 1 + CPLD_PRES_BIT = 1 + CPLD_RESET_BIT = 0 + CPLD_LPMOD_BIT = 2 + CPLDx_I2C_ADDR = "33" + CPLD_PORT_STATUS_KEY = "cpld_qsfp_port_status" + CPLD_PORT_CONFIG_KEY = "cpld_qsfp_port_config" + CPLD_REG_PATH = "/sys/bus/i2c/devices/{0}-00{1}/{2}_{3}" + + _port_to_eeprom_mapping = {} + + _logic_to_phy_port_mapping = { + 0: 0, + 1: 1, + 2: 4, + 3: 5, + 4: 8, + 5: 9, + 6: 12, + 7: 13, + 8: 16, + 9: 17, + 10: 20, + 11: 21, + 12: 24, + 13: 25, + 14: 28, + 15: 29, + 16: 32, + 17: 33, + 18: 36, + 19: 37, + 20: 40, + 21: 41, + 22: 44, + 23: 45, + 24: 48, + 25: 49, + 26: 52, + 27: 53, + 28: 56, + 29: 57, + 30: 60, + 31: 61, + 32: 2, + 33: 3, + 34: 6, + 35: 7, + 36: 10, + 37: 11, + 38: 14, + 39: 15, + 40: 18, + 41: 19, + 42: 22, + 43: 23, + 44: 26, + 45: 27, + 46: 30, + 47: 31, + 48: 34, + 49: 35, + 50: 38, + 51: 39, + 52: 42, + 53: 43, + 54: 46, + 55: 47, + 56: 50, + 57: 51, + 58: 54, + 59: 55, + 60: 58, + 61: 59, + 62: 62, + 63: 63 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + for x in range(self.port_start, self.port_end + 1): + phy_port = self._logic_to_phy_port_mapping[x] + port_eeprom_path = eeprom_path.format(phy_port + self.EEPROM_OFFSET) + self.port_to_eeprom_mapping[x] = port_eeprom_path + + SfpUtilBase.__init__(self) + + def qsfp_to_cpld_index(self, port_num): + if port_num < self.CPLD1_PORTS: + cpld_id = 0 + cpld_port_index = port_num + 1 + else: + cpld_id = 1 + (port_num - self.CPLD1_PORTS) / self.CPLDx_PORTS + cpld_port_index = ((port_num - self.CPLD1_PORTS) % self.CPLDx_PORTS) + 1 + return cpld_id, cpld_port_index + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # logic port to physical port mapping + port_num = self._logic_to_phy_port_mapping[port_num] + + cpld_id, cpld_port_index = self.qsfp_to_cpld_index(port_num) + i2c_id = self.CPLD_OFFSET + cpld_id + reg_path = self.CPLD_REG_PATH.format(i2c_id, self.CPLDx_I2C_ADDR, \ + self.CPLD_PORT_STATUS_KEY, cpld_port_index) + + try: + reg_file = open(reg_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # content is a string containing the status register value + content = reg_file.readline().rstrip() + reg_file.close() + + reg_value = int(content, 16) + # mask for presence bit (bit 1) + mask = (1 << self.CPLD_PRES_BIT) + + # 0 - presence, 1 - absence + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # logic port to physical port mapping + port_num = self._logic_to_phy_port_mapping[port_num] + + cpld_id, cpld_port_index = self.qsfp_to_cpld_index(port_num) + i2c_id = self.CPLD_OFFSET + cpld_id + reg_path = self.CPLD_REG_PATH.format(i2c_id, self.CPLDx_I2C_ADDR, \ + self.CPLD_PORT_CONFIG_KEY, cpld_port_index) + + try: + reg_file = open(reg_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # content is a string containing the status register value + content = reg_file.readline().rstrip() + reg_file.close() + + reg_value = int(content, 16) + # mask for lp_mod bit (bit 2) + mask = (1 << self.CPLD_LPMOD_BIT) + + # 0 - disable, 1 - low power mode + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # logic port to physical port mapping + port_num = self._logic_to_phy_port_mapping[port_num] + + cpld_id, cpld_port_index = self.qsfp_to_cpld_index(port_num) + i2c_id = self.CPLD_OFFSET + cpld_id + reg_path = self.CPLD_REG_PATH.format(i2c_id, self.CPLDx_I2C_ADDR, \ + self.CPLD_PORT_CONFIG_KEY, cpld_port_index) + + try: + reg_file = open(reg_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # content is a string containing the status register value + content = reg_file.readline().rstrip() + reg_value = int(content, 16) + # mask for lp_mod bit (bit 2) + mask = (1 << self.CPLD_LPMOD_BIT) + + # 1 - low power mode, 0 - high power mode + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # convert value to hex string + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # logic port to physical port mapping + port_num = self._logic_to_phy_port_mapping[port_num] + + cpld_id, cpld_port_index = self.qsfp_to_cpld_index(port_num) + i2c_id = self.CPLD_OFFSET + cpld_id + reg_path = self.CPLD_REG_PATH.format(i2c_id, self.CPLDx_I2C_ADDR, \ + self.CPLD_PORT_CONFIG_KEY, cpld_port_index) + + # reset the port + try: + reg_file = open(reg_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # content is a string containing the status register value + content = reg_file.readline().rstrip() + reg_value = int(content, 16) + # mask for reset bit (bit 0) + mask = (1 << self.CPLD_RESET_BIT) + + # 1 - out of reset, 0 - reset + reg_value = reg_value & ~mask + + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to reset done + time.sleep(1) + + # take the port out of reset + try: + reg_file = open(reg_path, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self, timeout=0): + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/sensors.conf b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/sensors.conf new file mode 100644 index 00000000000..84abfe88062 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/sensors.conf @@ -0,0 +1,83 @@ +# libsensors configuration file +chip "i350bb-*" + ignore loc1 + +chip "jc42-*" + +bus "i2c-16" "i2c-mux-1 (chan_id 7)" +chip "w83795adg-*" + ignore in0 + label in1 "VDD_CORE" + set in1_min 0.90 * 0.98 + set in1_max 0.90 * 1.02 + ignore in2 + label in3 "1.8V" + set in3_min 1.8 * 0.97 + set in3_max 1.8 * 1.03 + label in4 "3.3V" + compute in4 @/(0.3052), (0.3052)*@ + set in4_min 3.3 * 0.95 + set in4_max 3.3 * 1.05 + label in5 "0.9V" + set in5_min 0.90 * 0.98 + set in5_max 0.90 * 1.02 + ignore in6 + ignore in7 + ignore in8 + ignore in9 + ignore in10 + ignore in11 + ignore in12 + ignore in13 + ignore in14 + ignore in15 + ignore in16 + ignore in17 + ignore in18 + ignore in19 + label fan1 "FANTRAY 1" + ignore fan2 + label fan3 "FANTRAY 2" + ignore fan4 + label fan5 "FANTRAY 3" + ignore fan6 + label fan7 "FANTRAY 4" + ignore fan8 + ignore temp1 + ignore temp2 + ignore temp3 + ignore temp4 + ignore temp5 + ignore temp6 + ignore intrusion0 + +chip "tmp75-i2c-*-4A" + label temp1 "BMC Board Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +bus "i2c-0" "SMBus I801 adapter at f000" +chip "tmp75-i2c-*-4F" + label temp1 "x86 CPU Board Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +bus "i2c-6" "i2c-0-mux (chan_id 5)" +chip "lm75-i2c-6-4D" + label temp1 "Rear Panel Temp" + set temp1_max 50 + set temp1_max_hyst 45 +chip "lm75-i2c-6-4E" + label temp1 "Rear MAC Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +bus "i2c-7" "i2c-0-mux (chan_id 6)" +chip "lm75-i2c-7-4D" + label temp1 "Front Panel Temp" + set temp1_max 50 + set temp1_max_hyst 45 +chip "lm75-i2c-7-4E" + label temp1 "Front MAC Temp" + set temp1_max 50 + set temp1_max_hyst 45 diff --git a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/INGRASYS-S9280-64X/port_config.ini b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/INGRASYS-S9280-64X/port_config.ini new file mode 100644 index 00000000000..749f9f484a3 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/INGRASYS-S9280-64X/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias speed autoneg fec index +Ethernet0 0,1,2,3 Ethernet0 100000 0 0 0 +Ethernet4 4,5,6,7 Ethernet4 100000 0 0 1 +Ethernet8 8,9,10,11 Ethernet8 100000 0 0 2 +Ethernet12 12,13,14,15 Ethernet12 100000 0 0 3 +Ethernet16 16,17,18,19 Ethernet16 100000 0 0 4 +Ethernet20 20,21,22,23 Ethernet20 100000 0 0 5 +Ethernet24 24,25,26,27 Ethernet24 100000 0 0 6 +Ethernet28 28,29,30,31 Ethernet28 100000 0 0 7 +Ethernet32 32,33,34,35 Ethernet32 100000 0 0 8 +Ethernet36 36,37,38,39 Ethernet36 100000 0 0 9 +Ethernet40 40,41,42,43 Ethernet40 100000 0 0 10 +Ethernet44 44,45,46,47 Ethernet44 100000 0 0 11 +Ethernet48 48,49,50,51 Ethernet48 100000 0 0 12 +Ethernet52 52,53,54,55 Ethernet52 100000 0 0 13 +Ethernet56 56,57,58,59 Ethernet56 100000 0 0 14 +Ethernet60 60,61,62,63 Ethernet60 100000 0 0 15 +Ethernet64 64,65,66,67 Ethernet64 100000 0 0 16 +Ethernet68 68,69,70,71 Ethernet68 100000 0 0 17 +Ethernet72 72,73,74,75 Ethernet72 100000 0 0 18 +Ethernet76 76,77,78,79 Ethernet76 100000 0 0 19 +Ethernet80 80,81,82,83 Ethernet80 100000 0 0 20 +Ethernet84 84,85,86,87 Ethernet84 100000 0 0 21 +Ethernet88 88,89,90,91 Ethernet88 100000 0 0 22 +Ethernet92 92,93,94,95 Ethernet92 100000 0 0 23 +Ethernet96 96,97,98,99 Ethernet96 100000 0 0 24 +Ethernet100 100,101,102,103 Ethernet100 100000 0 0 25 +Ethernet104 104,105,106,107 Ethernet104 100000 0 0 26 +Ethernet108 108,109,110,111 Ethernet108 100000 0 0 27 +Ethernet112 112,113,114,115 Ethernet112 100000 0 0 28 +Ethernet116 116,117,118,119 Ethernet116 100000 0 0 29 +Ethernet120 120,121,122,123 Ethernet120 100000 0 0 30 +Ethernet124 124,125,126,127 Ethernet124 100000 0 0 31 +Ethernet128 128,129,130,131 Ethernet128 100000 0 0 32 +Ethernet132 132,133,134,135 Ethernet132 100000 0 0 33 +Ethernet136 136,137,138,139 Ethernet136 100000 0 0 34 +Ethernet140 140,141,142,143 Ethernet140 100000 0 0 35 +Ethernet144 144,145,146,147 Ethernet144 100000 0 0 36 +Ethernet148 148,149,150,151 Ethernet148 100000 0 0 37 +Ethernet152 152,153,154,155 Ethernet152 100000 0 0 38 +Ethernet156 156,157,158,159 Ethernet156 100000 0 0 39 +Ethernet160 160,161,162,163 Ethernet160 100000 0 0 40 +Ethernet164 164,165,166,167 Ethernet164 100000 0 0 41 +Ethernet168 168,169,170,171 Ethernet168 100000 0 0 42 +Ethernet172 172,173,174,175 Ethernet172 100000 0 0 43 +Ethernet176 176,177,178,179 Ethernet176 100000 0 0 44 +Ethernet180 180,181,182,183 Ethernet180 100000 0 0 45 +Ethernet184 184,185,186,187 Ethernet184 100000 0 0 46 +Ethernet188 188,189,190,191 Ethernet188 100000 0 0 47 +Ethernet192 192,193,194,195 Ethernet192 100000 0 0 48 +Ethernet196 196,197,198,199 Ethernet196 100000 0 0 49 +Ethernet200 200,201,202,203 Ethernet200 100000 0 0 50 +Ethernet204 204,205,206,207 Ethernet204 100000 0 0 51 +Ethernet208 208,209,210,211 Ethernet208 100000 0 0 52 +Ethernet212 212,213,214,215 Ethernet212 100000 0 0 53 +Ethernet216 216,217,218,219 Ethernet216 100000 0 0 54 +Ethernet220 220,221,222,223 Ethernet220 100000 0 0 55 +Ethernet224 224,225,226,227 Ethernet224 100000 0 0 56 +Ethernet228 228,229,230,231 Ethernet228 100000 0 0 57 +Ethernet232 232,233,234,235 Ethernet232 100000 0 0 58 +Ethernet236 236,237,238,239 Ethernet236 100000 0 0 59 +Ethernet240 240,241,242,243 Ethernet240 100000 0 0 60 +Ethernet244 244,245,246,247 Ethernet244 100000 0 0 61 +Ethernet248 248,249,250,251 Ethernet248 100000 0 0 62 +Ethernet252 252,253,254,255 Ethernet252 100000 0 0 63 diff --git a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/INGRASYS-S9280-64X/switch-sai.conf b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/INGRASYS-S9280-64X/switch-sai.conf new file mode 100644 index 00000000000..f1e9c0bc10d --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/INGRASYS-S9280-64X/switch-sai.conf @@ -0,0 +1,33 @@ +{ + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0", + "pcie_domain": 0, + "pcie_bus": 5, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "instance": 0, + "p4_program_list": [ + { + "id": "pgm-0", + "instance": 0, + "path": "switch", + "program-name": "switch", + "pd": "lib/tofinopd/switch/libpd.so", + "pd-thrift": "lib/tofinopd/switch/libpdthrift.so", + "table-config": "share/tofinopd/switch/context.json", + "tofino-bin": "share/tofinopd/switch/tofino.bin", + "switchapi": "lib/libswitchapi.so", + "sai": "lib/libsai.so", + "agent0": "lib/platform/x86_64-ingrasys_s9280_64x-r0/libpltfm_mgr.so", + "switchapi_port_add": false + } + ] +} diff --git a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/INGRASYS-S9280-64X/switch-tna-sai.conf b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/INGRASYS-S9280-64X/switch-tna-sai.conf new file mode 100644 index 00000000000..4895ac901ff --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/INGRASYS-S9280-64X/switch-tna-sai.conf @@ -0,0 +1,40 @@ +{ + "instance": 0, + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0", + "pcie_domain": 0, + "pcie_bus": 5, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "p4_devices": [ + { + "device-id": 0, + "agent0": "lib/platform/x86_64-ingrasys_s9280_64x-r0/libpltfm_mgr.so", + "p4_programs": [ + { + "p4_pipelines": [ + { + "p4_pipeline_name": "pipe", + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" + } + ], + "program-name": "switch", + "sai": "lib/libsai.so", + "bfrt-config": "share/switch/bf-rt.json", + "model_json_path" : "share/switch/aug_model.json", + "switchapi_port_add": false, + "non_default_port_ppgs": 5 + } + ] + } + ] +} diff --git a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/default_sku b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/default_sku new file mode 100644 index 00000000000..68e0c87eb0a --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/default_sku @@ -0,0 +1 @@ +INGRASYS-S9280-64X t1 diff --git a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/fancontrol b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/fancontrol new file mode 100644 index 00000000000..427cc6561c5 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/fancontrol @@ -0,0 +1,9 @@ +INTERVAL=10 +DEVPATH=hwmon1=devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-002f hwmon3=devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-6/6-004c +DEVNAME=hwmon1=w83795adg +FCTEMPS=hwmon1/device/pwm2=hwmon3/temp1_input +FCFANS=hwmon1/device/pwm2=hwmon1/device/fan7_input hwmon1/device/pwm2=hwmon1/device/fan5_input hwmon1/device/pwm2=hwmon1/device/fan3_input hwmon1/device/pwm2=hwmon1/device/fan1_input +MINTEMP=hwmon1/device/pwm2=20 +MAXTEMP=hwmon1/device/pwm2=60 +MINSTART=hwmon1/device/pwm2=75 +MINSTOP=hwmon1/device/pwm2=22 diff --git a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/installer.conf b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/plugins/eeprom.py b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..ecf17153984 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Ingrasys S9280-64X +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0051/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/plugins/psuutil.py b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/plugins/psuutil.py new file mode 100644 index 00000000000..c4b78c943e8 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/plugins/psuutil.py @@ -0,0 +1,93 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + # TODO: need to check if the patch mapping correct + SYSFS_PSU_DIR = ["/sys/bus/i2c/devices/i2c-18/18-0050", + "/sys/bus/i2c/devices/i2c-17/17-0050"] + + def __init__(self): + PsuBase.__init__(self) + + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psu_pg' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU status + if (attr_value == 1): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + attr_file ='psu_abs' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU presence + if (attr_value == 0): + status = 1 + + return status + diff --git a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..57edb81cd10 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/plugins/sfputil.py @@ -0,0 +1,308 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 63 + PORTS_IN_BLOCK = 64 + EEPROM_OFFSET = 41 + CPLD1_PORTS = 12 + CPLDx_PORTS = 13 + #TODO: check init sequence for CPLD i2c bus + CPLD_OFFSET = 1 + CPLD_PRES_BIT = 1 + CPLD_RESET_BIT = 0 + CPLD_LPMOD_BIT = 2 + CPLDx_I2C_ADDR = "33" + EEPROM_I2C_ADDR = "50" + CPLD_PORT_STATUS_KEY = "cpld_qsfp_port_status" + CPLD_PORT_CONFIG_KEY = "cpld_qsfp_port_config" + CPLD_REG_PATH = "/sys/bus/i2c/devices/{0}-00{1}/{2}_{3}" + + _port_to_eeprom_mapping = {} + + #TODO: check the fp port to phy port mapping + _fp2phy_port_mapping = { + 0: 0, + 1: 1, + 2: 4, + 3: 5, + 4: 8, + 5: 9, + 6: 12, + 7: 13, + 8: 16, + 9: 17, + 10: 20, + 11: 21, + 12: 24, + 13: 25, + 14: 28, + 15: 29, + 16: 32, + 17: 33, + 18: 36, + 19: 37, + 20: 40, + 21: 41, + 22: 44, + 23: 45, + 24: 48, + 25: 49, + 26: 52, + 27: 53, + 28: 56, + 29: 57, + 30: 60, + 31: 61, + 32: 2, + 33: 3, + 34: 6, + 35: 7, + 36: 10, + 37: 11, + 38: 14, + 39: 15, + 40: 18, + 41: 19, + 42: 22, + 43: 23, + 44: 26, + 45: 27, + 46: 30, + 47: 31, + 48: 34, + 49: 35, + 50: 38, + 51: 39, + 52: 42, + 53: 43, + 54: 46, + 55: 47, + 56: 50, + 57: 51, + 58: 54, + 59: 55, + 60: 58, + 61: 59, + 62: 62, + 63: 63 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-00{1}/eeprom" + for x in range(self.port_start, self.port_end + 1): + phy_port = self.fp2phy_port_num(x) + port_eeprom_path = eeprom_path.format(phy_port + self.EEPROM_OFFSET, self.EEPROM_I2C_ADDR) + self.port_to_eeprom_mapping[x] = port_eeprom_path + + SfpUtilBase.__init__(self) + + def qsfp_to_cpld_index(self, port_num): + if port_num < self.CPLD1_PORTS: + cpld_id = 0 + cpld_port_index = port_num + 1 + else: + cpld_id = 1 + (port_num - self.CPLD1_PORTS) / self.CPLDx_PORTS + cpld_port_index = ((port_num - self.CPLD1_PORTS) % self.CPLDx_PORTS) + 1 + return cpld_id, cpld_port_index + + def fp2phy_port_num(self, fp_port_num): + + phy_port_num = self._fp2phy_port_mapping[fp_port_num] + return phy_port_num + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # logic port to physical port mapping + port_num = self.fp2phy_port_num(port_num) + + cpld_id, cpld_port_index = self.qsfp_to_cpld_index(port_num) + i2c_id = self.CPLD_OFFSET + cpld_id + reg_path = self.CPLD_REG_PATH.format(i2c_id, self.CPLDx_I2C_ADDR, \ + self.CPLD_PORT_STATUS_KEY, cpld_port_index) + + try: + reg_file = open(reg_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # content is a string containing the status register value + content = reg_file.readline().rstrip() + reg_file.close() + + reg_value = int(content, 16) + # mask for presence bit (bit 1) + mask = (1 << self.CPLD_PRES_BIT) + + # 0 - presence, 1 - absence + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # logic port to physical port mapping + port_num = self.fp2phy_port_num(port_num) + + cpld_id, cpld_port_index = self.qsfp_to_cpld_index(port_num) + i2c_id = self.CPLD_OFFSET + cpld_id + reg_path = self.CPLD_REG_PATH.format(i2c_id, self.CPLDx_I2C_ADDR, \ + self.CPLD_PORT_CONFIG_KEY, cpld_port_index) + + try: + reg_file = open(reg_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # content is a string containing the status register value + content = reg_file.readline().rstrip() + reg_file.close() + + reg_value = int(content, 16) + # mask for lp_mod bit (bit 2) + mask = (1 << self.CPLD_LPMOD_BIT) + + # 0 - disable, 1 - low power mode + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # logic port to physical port mapping + port_num = self.fp2phy_port_num(port_num) + + cpld_id, cpld_port_index = self.qsfp_to_cpld_index(port_num) + i2c_id = self.CPLD_OFFSET + cpld_id + reg_path = self.CPLD_REG_PATH.format(i2c_id, self.CPLDx_I2C_ADDR, \ + self.CPLD_PORT_CONFIG_KEY, cpld_port_index) + + try: + reg_file = open(reg_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # content is a string containing the status register value + content = reg_file.readline().rstrip() + reg_value = int(content, 16) + # mask for lp_mod bit (bit 2) + mask = (1 << self.CPLD_LPMOD_BIT) + + # 1 - low power mode, 0 - high power mode + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # convert value to hex string + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # logic port to physical port mapping + port_num = self.fp2phy_port_num(port_num) + + cpld_id, cpld_port_index = self.qsfp_to_cpld_index(port_num) + i2c_id = self.CPLD_OFFSET + cpld_id + reg_path = self.CPLD_REG_PATH.format(i2c_id, self.CPLDx_I2C_ADDR, \ + self.CPLD_PORT_CONFIG_KEY, cpld_port_index) + + # reset the port + try: + reg_file = open(reg_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # content is a string containing the status register value + content = reg_file.readline().rstrip() + reg_value = int(content, 16) + # mask for reset bit (bit 0) + mask = (1 << self.CPLD_RESET_BIT) + + # 1 - out of reset, 0 - reset + reg_value = reg_value & ~mask + + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to reset done + time.sleep(1) + + # take the port out of reset + try: + reg_file = open(reg_path, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | mask + + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError + diff --git a/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/sensors.conf b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/sensors.conf new file mode 100644 index 00000000000..0e9f5cd41ba --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9280_64x-r0/sensors.conf @@ -0,0 +1,85 @@ +# libsensors configuration file +chip "i350bb-*" + ignore loc1 + +chip "jc42-*" + +bus "i2c-16" "i2c-mux-1 (chan_id 7)" +chip "w83795adg-*" + ignore in0 + label in1 "VDD_CORE" + set in1_min 0.717 + set in1_max 0.962 + ignore in2 + ignore in3 + label in4 "3.3V" + compute in4 @/(0.3052), (0.3052)*@ + set in4_min 3.3 * 0.95 + set in4_max 3.3 * 1.05 + label in5 "0.9V" + set in5_min 0.90 * 0.98 + set in5_max 0.90 * 1.02 + ignore in6 + ignore in7 + ignore in8 + ignore in9 + ignore in10 + ignore in11 + ignore in12 + ignore in13 + ignore in14 + ignore in15 + ignore in16 + ignore in17 + ignore in18 + ignore in19 + label fan1 "FANTRAY 1" + ignore fan2 + label fan3 "FANTRAY 2" + ignore fan4 + label fan5 "FANTRAY 3" + ignore fan6 + label fan7 "FANTRAY 4" + ignore fan8 + ignore temp1 + ignore temp2 + ignore temp3 + ignore temp4 + ignore temp5 + ignore temp6 + ignore intrusion0 + +chip "tmp75-i2c-*-4A" + label temp1 "BMC Board Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +bus "i2c-0" "SMBus I801 adapter at f000" +chip "tmp75-i2c-*-4F" + label temp1 "x86 CPU Board Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +bus "i2c-6" "i2c-0-mux (chan_id 5)" +chip "lm75-i2c-6-4D" + label temp1 "Rear Panel Temp" + set temp1_max 50 + set temp1_max_hyst 45 +chip "lm75-i2c-6-4E" + label temp1 "Right Side MB Tetmp" + set temp1_max 50 + set temp1_max_hyst 45 +chip "lm86-i2c-6-4C" + label temp1 "Front Panel Temp" + set temp1_max 50 + label temp2 "Front MAC Temp" + set temp2_max 70 +bus "i2c-7" "i2c-0-mux (chan_id 6)" +chip "lm75-i2c-7-4D" + label temp1 "Left Side MB Temp" + set temp1_max 50 + set temp1_max_hyst 45 +chip "lm75-i2c-7-4E" + label temp1 "Left Side MAC Temp" + set temp1_max 50 + set temp1_max_hyst 45 diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/port_config.ini b/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/port_config.ini new file mode 100644 index 00000000000..24823135f4c --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/port_config.ini @@ -0,0 +1,74 @@ +# name lanes alias +Ethernet0 16 Ethernet0 +Ethernet4 15 Ethernet4 +Ethernet8 14 Ethernet8 +Ethernet12 13 Ethernet12 +Ethernet16 24 Ethernet16 +Ethernet20 23 Ethernet20 +Ethernet24 22 Ethernet24 +Ethernet28 21 Ethernet28 +Ethernet32 28 Ethernet32 +Ethernet36 27 Ethernet36 +Ethernet40 26 Ethernet40 +Ethernet44 25 Ethernet44 +Ethernet48 32 Ethernet48 +Ethernet52 31 Ethernet52 +Ethernet56 30 Ethernet56 +Ethernet60 29 Ethernet60 +Ethernet64 48 Ethernet64 +Ethernet68 47 Ethernet68 +Ethernet72 46 Ethernet72 +Ethernet76 45 Ethernet76 +Ethernet80 52 Ethernet80 +Ethernet84 51 Ethernet84 +Ethernet88 50 Ethernet88 +Ethernet92 49 Ethernet92 +Ethernet96 56 Ethernet96 +Ethernet100 55 Ethernet100 +Ethernet104 54 Ethernet104 +Ethernet108 53 Ethernet108 +Ethernet112 60 Ethernet112 +Ethernet116 59 Ethernet116 +Ethernet120 58 Ethernet120 +Ethernet124 57 Ethernet124 +Ethernet128 64 Ethernet128 +Ethernet132 63 Ethernet132 +Ethernet136 62 Ethernet136 +Ethernet140 61 Ethernet140 +Ethernet144 68 Ethernet144 +Ethernet148 67 Ethernet148 +Ethernet152 66 Ethernet152 +Ethernet156 65 Ethernet156 +Ethernet160 72 Ethernet160 +Ethernet164 71 Ethernet164 +Ethernet168 70 Ethernet168 +Ethernet172 69 Ethernet172 +Ethernet176 76 Ethernet176 +Ethernet180 75 Ethernet180 +Ethernet184 74 Ethernet184 +Ethernet188 73 Ethernet188 +Ethernet192 82 Ethernet192 +Ethernet196 84 Ethernet196 +Ethernet200 81 Ethernet200 +Ethernet204 83 Ethernet204 +Ethernet208 78 Ethernet208 +Ethernet212 80 Ethernet212 +Ethernet216 77 Ethernet216 +Ethernet220 79 Ethernet220 +Ethernet224 98 Ethernet224 +Ethernet228 100 Ethernet228 +Ethernet232 97 Ethernet232 +Ethernet236 99 Ethernet236 +Ethernet240 104 Ethernet240 +Ethernet244 102 Ethernet244 +Ethernet248 103 Ethernet248 +Ethernet252 101 Ethernet252 +Ethernet256 108 Ethernet256 +Ethernet260 106 Ethernet260 +Ethernet264 107 Ethernet264 +Ethernet268 105 Ethernet268 +Ethernet272 112 Ethernet272 +Ethernet276 110 Ethernet276 +Ethernet280 111 Ethernet280 +Ethernet284 109 Ethernet284 + diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/sai.profile b/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/sai.profile new file mode 100644 index 00000000000..3f549dd63b4 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-d6254qs-72x10G.config +SAI_NUM_ECMP_MEMBERS=32 diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/td2-d6254qs-72x10G.config.bcm b/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/td2-d6254qs-72x10G.config.bcm new file mode 100644 index 00000000000..66b7172bce7 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/INVENTEC-D6254QS/td2-d6254qs-72x10G.config.bcm @@ -0,0 +1,160 @@ +os=unix +parity_enable=0 +pbmp_xport_xe.0=0x1fffffffffffffffffffffffffffffffe +miim_intr_enable=0 +schan_intr_enable=0 +bcm_stat_interval=2000000 +serdes_firmware_mode_xe=0x2 + +portmap_1=16:10 +portmap_2=15:10 +portmap_3=14:10 +portmap_4=13:10 +portmap_5=24:10 +portmap_6=23:10 +portmap_7=22:10 +portmap_8=21:10 +portmap_9=28:10 +portmap_10=27:10 +portmap_11=26:10 +portmap_12=25:10 +portmap_13=32:10 +portmap_14=31:10 +portmap_15=30:10 +portmap_16=29:10 +portmap_17=48:10 +portmap_18=47:10 +portmap_19=46:10 +portmap_20=45:10 +portmap_21=52:10 +portmap_22=51:10 +portmap_23=50:10 +portmap_24=49:10 +portmap_25=56:10 +portmap_26=55:10 +portmap_27=54:10 +portmap_28=53:10 +portmap_29=60:10 +portmap_30=59:10 +portmap_31=58:10 +portmap_32=57:10 +portmap_33=64:10 +portmap_34=63:10 +portmap_35=62:10 +portmap_36=61:10 +portmap_37=68:10 +portmap_38=67:10 +portmap_39=66:10 +portmap_40=65:10 +portmap_41=72:10 +portmap_42=71:10 +portmap_43=70:10 +portmap_44=69:10 +portmap_45=76:10 +portmap_46=75:10 +portmap_47=74:10 +portmap_48=73:10 + +portmap_49=82:10 +portmap_50=84:10 +portmap_51=81:10 +portmap_52=83:10 + +portmap_53=78:10 +portmap_54=80:10 +portmap_55=77:10 +portmap_56=79:10 + +portmap_57=98:10 +portmap_58=100:10 +portmap_59=97:10 +portmap_60=99:10 + +portmap_61=104:10 +portmap_62=102:10 +portmap_63=103:10 +portmap_64=101:10 + +portmap_65=108:10 +portmap_66=106:10 +portmap_67=107:10 +portmap_68=105:10 + +portmap_69=112:10 +portmap_70=110:10 +portmap_71=111:10 +portmap_72=109:10 + +xgxs_rx_lane_map_xe0=0x0123 +xgxs_rx_lane_map_xe1=0x0123 +xgxs_rx_lane_map_xe2=0x0123 +xgxs_rx_lane_map_xe3=0x0123 +xgxs_rx_lane_map_xe4=0x0123 +xgxs_rx_lane_map_xe5=0x0123 +xgxs_rx_lane_map_xe6=0x0123 +xgxs_rx_lane_map_xe7=0x0123 +xgxs_rx_lane_map_xe8=0x0123 +xgxs_rx_lane_map_xe9=0x0123 +xgxs_rx_lane_map_xe10=0x0123 +xgxs_rx_lane_map_xe11=0x0123 +xgxs_rx_lane_map_xe12=0x0123 +xgxs_rx_lane_map_xe13=0x0123 +xgxs_rx_lane_map_xe14=0x0123 +xgxs_rx_lane_map_xe15=0x0123 +xgxs_rx_lane_map_xe16=0x0123 +xgxs_rx_lane_map_xe17=0x0123 +xgxs_rx_lane_map_xe18=0x0123 +xgxs_rx_lane_map_xe19=0x0123 +xgxs_rx_lane_map_xe20=0x0123 +xgxs_rx_lane_map_xe21=0x0123 +xgxs_rx_lane_map_xe22=0x0123 +xgxs_rx_lane_map_xe23=0x0123 +xgxs_rx_lane_map_xe24=0x0123 +xgxs_rx_lane_map_xe25=0x0123 +xgxs_rx_lane_map_xe26=0x0123 +xgxs_rx_lane_map_xe27=0x0123 +xgxs_rx_lane_map_xe28=0x0123 +xgxs_rx_lane_map_xe29=0x0123 +xgxs_rx_lane_map_xe30=0x0123 +xgxs_rx_lane_map_xe31=0x0123 +xgxs_rx_lane_map_xe32=0x0123 +xgxs_rx_lane_map_xe33=0x0123 +xgxs_rx_lane_map_xe34=0x0123 +xgxs_rx_lane_map_xe35=0x0123 +xgxs_rx_lane_map_xe36=0x0123 +xgxs_rx_lane_map_xe37=0x0123 +xgxs_rx_lane_map_xe38=0x0123 +xgxs_rx_lane_map_xe39=0x0123 +xgxs_rx_lane_map_xe40=0x0123 +xgxs_rx_lane_map_xe41=0x0123 +xgxs_rx_lane_map_xe42=0x0123 +xgxs_rx_lane_map_xe43=0x0123 +xgxs_rx_lane_map_xe44=0x0123 +xgxs_rx_lane_map_xe45=0x0123 +xgxs_rx_lane_map_xe46=0x0123 +xgxs_rx_lane_map_xe47=0x0123 +xgxs_rx_lane_map_xe48=0x0123 +xgxs_rx_lane_map_xe49=0x0123 +xgxs_rx_lane_map_xe50=0x0123 +xgxs_rx_lane_map_xe51=0x0123 +xgxs_rx_lane_map_xe52=0x0123 +xgxs_rx_lane_map_xe53=0x0123 +xgxs_rx_lane_map_xe54=0x0123 +xgxs_rx_lane_map_xe55=0x0123 +xgxs_rx_lane_map_xe56=0x0123 +xgxs_rx_lane_map_xe57=0x0123 +xgxs_rx_lane_map_xe58=0x0123 +xgxs_rx_lane_map_xe59=0x0123 +xgxs_rx_lane_map_xe60=0x0123 +xgxs_rx_lane_map_xe61=0x0123 +xgxs_rx_lane_map_xe62=0x0123 +xgxs_rx_lane_map_xe63=0x0123 +xgxs_rx_lane_map_xe64=0x0123 +xgxs_rx_lane_map_xe65=0x0123 +xgxs_rx_lane_map_xe66=0x0123 +xgxs_rx_lane_map_xe67=0x0123 +xgxs_rx_lane_map_xe68=0x0123 +xgxs_rx_lane_map_xe69=0x0123 +xgxs_rx_lane_map_xe70=0x0123 +xgxs_rx_lane_map_xe71=0x0123 + diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/installer.conf b/device/inventec/x86_64-inventec_d6254qs-r0/installer.conf new file mode 100644 index 00000000000..6b489db6e16 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 +VAR_LOG_SIZE=1024 diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/led_proc_init.soc b/device/inventec/x86_64-inventec_d6254qs-r0/led_proc_init.soc new file mode 100644 index 00000000000..92423b23449 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/led_proc_init.soc @@ -0,0 +1,136 @@ +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=31 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=30 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=29 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=27 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=26 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=25 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=23 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=22 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=21 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=19 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=18 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=17 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=15 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=14 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=13 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=11 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=10 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=9 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=7 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=6 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=5 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=2 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=1 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=0 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=62 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=61 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=59 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=58 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=57 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=55 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=54 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=53 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=51 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=50 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=49 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=46 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=45 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=43 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=42 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=41 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=39 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=38 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=37 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=35 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=34 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=33 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=3 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=2 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=1 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=7 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=6 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=5 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=10 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=9 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=15 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=14 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=13 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=19 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=18 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=17 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=23 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=22 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=21 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=27 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=26 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=25 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=31 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=30 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=29 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=35 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=34 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=33 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=39 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=38 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=37 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=43 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=42 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=41 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=47 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=46 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=45 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=50 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=49 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=54 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=53 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=58 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=57 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=56 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=62 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=61 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=60 + +led 0 stop +led 0 prog 02 00 60 F1 12 00 DA 0F 70 10 67 47 67 42 77 06 02 A0 60 F0 12 00 06 F0 4A 04 27 67 42 4A 03 27 67 42 4A 07 27 67 42 4A 00 27 67 42 DA 80 70 34 86 F0 77 16 12 00 DA 03 70 40 67 4A 67 42 77 36 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +led 0 start + +led 1 stop +led 1 prog 02 00 60 F1 12 00 DA 0F 70 10 67 47 67 42 77 06 02 A0 60 F0 12 00 06 F0 4A 04 27 67 42 4A 03 27 67 42 4A 07 27 67 42 4A 00 27 67 42 DA 80 70 34 86 F0 77 16 12 00 DA 03 70 40 67 4A 67 42 77 36 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +led 1 start diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/minigraph.xml b/device/inventec/x86_64-inventec_d6254qs-r0/minigraph.xml new file mode 100644 index 00000000000..e2368e171b5 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/minigraph.xml @@ -0,0 +1,144 @@ + + + + + + OCPSCH0104001MS + 10.10.1.26 + SONiC-Inventec-d6254qs + 10.10.1.25 + 1 + 10 + 3 + + + OCPSCH0104002MS + 10.10.2.26 + SONiC-Inventec-d6254qs + 10.10.2.25 + 1 + 10 + 3 + + + + + 64536 + SONiC-Inventec-d6254qs + + +
10.10.1.26
+ + + + +
10.10.2.26
+ + + + + + + + 64542 + OCPSCH0104001MS + + + + 64543 + OCPSCH0104002MS + + + + + + + + + + HostIP + Loopback0 + + 100.0.0.9/32 + + 100.0.0.9/32 + + + + + + + + SONiC-Inventec-d6254qs + + + + + + Ethernet0 + 10.10.1.25/30 + + + + Ethernet4 + 10.10.2.25/30 + + + + + + + + + + + + DeviceInterfaceLink + OCPSCH0104001MS + Ethernet24 + SONiC-Inventec-d6254qs + Ethernet0 + + + DeviceInterfaceLink + OCPSCH0104002MS + Ethernet24 + SONiC-Inventec-d6254qs + Ethernet4 + + + + + SONiC-Inventec-d6254qs + INVENTEC-D6254QS + + + + + + + SONiC-Inventec-d6254qs + + + DhcpResources + + + + + NtpResources + + 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org + + + SyslogResources + + + + + + + + + SONiC-Inventec-d6254qs + INVENTEC-D6254QS + diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/plugins/eeprom.py b/device/inventec/x86_64-inventec_d6254qs-r0/plugins/eeprom.py new file mode 100644 index 00000000000..de5c24ba0e6 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7032q28b +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/plugins/psuutil.py b/device/inventec/x86_64-inventec_d6254qs-r0/plugins/psuutil.py new file mode 100644 index 00000000000..4bd3f7a2705 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/plugins/psuutil.py @@ -0,0 +1,84 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + PSU_DIR = "/sys/bus/i2c/devices/0-0066" + + def __init__(self): + PsuBase.__init__(self) + +# Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psoc_psu'+ str(index) + '_iout' + attr_path = self.PSU_DIR +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU status + if (attr_value != 0): + status = 1 + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + ind = index-1 + attr_file ='psu'+ str(ind) + attr_path = self.PSU_DIR +'/' + attr_file + normal_attr_value = '0 : normal' + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU presence + if (attr_value == normal_attr_value): + status = 1 + return status diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/plugins/sfputil.py b/device/inventec/x86_64-inventec_d6254qs-r0/plugins/sfputil.py new file mode 100644 index 00000000000..6cd470795fb --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/plugins/sfputil.py @@ -0,0 +1,209 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 53 + PORTS_IN_BLOCK = 54 + QSFP_PORT_START = 48 + QSFP_PORT_END = 53 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0: 10, + 1: 11, + 2: 12, + 3: 13, + 4: 14, + 5: 15, + 6: 16, + 7: 17, + 8: 18, + 9: 19, + 10: 20, + 11: 21, + 12: 22, + 13: 23, + 14: 24, + 15: 25, + 16: 26, + 17: 27, + 18: 28, + 19: 29, + 20: 30, + 21: 31, + 22: 32, + 23: 33, + 24: 34, + 25: 35, + 26: 36, + 27: 37, + 28: 38, + 29: 39, + 30: 40, + 31: 41, + 32: 42, + 33: 43, + 34: 44, + 35: 45, + 36: 46, + 37: 47, + 38: 48, + 39: 49, + 40: 50, + 41: 51, + 42: 52, + 43: 53, + 44: 54, + 45: 55, + 46: 56, + 47: 57, + 48: 58, + 49: 59, + 50: 60, + 51: 61, + 52: 62, + 53: 63 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/bus/i2c/devices/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/class/swps/port"+str(port_num)+"/reset" + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True diff --git a/device/inventec/x86_64-inventec_d6254qs-r0/sensors.conf b/device/inventec/x86_64-inventec_d6254qs-r0/sensors.conf new file mode 100644 index 00000000000..653900cad36 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6254qs-r0/sensors.conf @@ -0,0 +1,15 @@ +# libsensors configuration file +chip "inv_psoc-*" + ignore temp3 + ignore temp4 + label temp1 "CPU Board Temperature" + label temp2 "SW Board I Temperature" + label temp5 "SW Board II Temperature" + label temp6 "ASIC Temperature" + label in1 "PSU1 Voltage" + label in2 "PSU2 Voltage" + label curr1 "PSU1 Current" + label curr2 "PSU2 Current" + label power1 "PSU1 Power" + label power2 "PSU2 Power" + diff --git a/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/buffers.json.j2 b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/buffers_defaults_t0.j2 b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..1587625a294 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/buffers_defaults_t0.j2 @@ -0,0 +1,50 @@ +{%- set default_cable = '40m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,47) %} + {% if PORT.append("Ethernet%d" % (port_idx)) %}{% endif %} + {% endfor %} + {% for port_idx in range(12,19) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10443264", + "type": "ingress", + "mode": "dynamic", + "xoff": "7335744" + }, + "egress_lossy_pool": { + "size": "8877440", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"3995680" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} + diff --git a/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/buffers_defaults_t1.j2 b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..1587625a294 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/buffers_defaults_t1.j2 @@ -0,0 +1,50 @@ +{%- set default_cable = '40m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,47) %} + {% if PORT.append("Ethernet%d" % (port_idx)) %}{% endif %} + {% endfor %} + {% for port_idx in range(12,19) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10443264", + "type": "ingress", + "mode": "dynamic", + "xoff": "7335744" + }, + "egress_lossy_pool": { + "size": "8877440", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"3995680" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} + diff --git a/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/pg_profile_lookup.ini b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/pg_profile_lookup.ini new file mode 100644 index 00000000000..7222f801492 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -4 2288 + 25000 5m 1248 2288 53248 -4 2288 + 40000 5m 1248 2288 66560 -4 2288 + 50000 5m 1248 2288 79872 -4 2288 + 100000 5m 1248 2288 165568 -4 2288 + 10000 40m 1248 2288 37024 -4 2288 + 25000 40m 1248 2288 56160 -4 2288 + 40000 40m 1248 2288 71552 -4 2288 + 50000 40m 1248 2288 85696 -4 2288 + 100000 40m 1248 2288 177632 -4 2288 + 10000 300m 1248 2288 46176 -4 2288 + 25000 300m 1248 2288 79040 -4 2288 + 40000 300m 1248 2288 108160 -4 2288 + 50000 300m 1248 2288 131456 -4 2288 + 100000 300m 1248 2288 268736 -4 2288 diff --git a/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/port_config.ini b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/port_config.ini new file mode 100755 index 00000000000..aaac478ab8f --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed +Ethernet0 1 Ethernet0 0 25000 +Ethernet1 2 Ethernet1 1 25000 +Ethernet2 3 Ethernet2 2 25000 +Ethernet3 4 Ethernet3 3 25000 +Ethernet4 5 Ethernet4 4 25000 +Ethernet5 6 Ethernet5 5 25000 +Ethernet6 7 Ethernet6 6 25000 +Ethernet7 8 Ethernet7 7 25000 +Ethernet8 13 Ethernet8 8 25000 +Ethernet9 14 Ethernet9 9 25000 +Ethernet10 15 Ethernet10 10 25000 +Ethernet11 16 Ethernet11 11 25000 +Ethernet12 21 Ethernet12 12 25000 +Ethernet13 22 Ethernet13 13 25000 +Ethernet14 23 Ethernet14 14 25000 +Ethernet15 24 Ethernet15 15 25000 +Ethernet16 29 Ethernet16 16 25000 +Ethernet17 30 Ethernet17 17 25000 +Ethernet18 31 Ethernet18 18 25000 +Ethernet19 32 Ethernet19 19 25000 +Ethernet20 33 Ethernet20 20 25000 +Ethernet21 34 Ethernet21 21 25000 +Ethernet22 35 Ethernet22 22 25000 +Ethernet23 36 Ethernet23 23 25000 +Ethernet24 41 Ethernet24 24 25000 +Ethernet25 42 Ethernet25 25 25000 +Ethernet26 43 Ethernet26 26 25000 +Ethernet27 44 Ethernet27 27 25000 +Ethernet28 49 Ethernet28 28 25000 +Ethernet29 50 Ethernet29 29 25000 +Ethernet30 51 Ethernet30 30 25000 +Ethernet31 52 Ethernet31 31 25000 +Ethernet32 57 Ethernet32 32 25000 +Ethernet33 58 Ethernet33 33 25000 +Ethernet34 59 Ethernet34 34 25000 +Ethernet35 60 Ethernet35 35 25000 +Ethernet36 61 Ethernet36 36 25000 +Ethernet37 62 Ethernet37 37 25000 +Ethernet38 63 Ethernet38 38 25000 +Ethernet39 64 Ethernet39 39 25000 +Ethernet40 65 Ethernet40 40 25000 +Ethernet41 66 Ethernet41 41 25000 +Ethernet42 67 Ethernet42 42 25000 +Ethernet43 68 Ethernet43 43 25000 +Ethernet44 69 Ethernet44 44 25000 +Ethernet45 70 Ethernet45 45 25000 +Ethernet46 71 Ethernet46 46 25000 +Ethernet47 72 Ethernet47 47 25000 +Ethernet48 85,86,87,88 Ethernet48 48 100000 +Ethernet52 77,78,79,80 Ethernet52 49 100000 +Ethernet56 93,94,95,96 Ethernet56 50 100000 +Ethernet60 97,98,99,100 Ethernet60 51 100000 +Ethernet64 113,114,115,116 Ethernet64 52 100000 +Ethernet68 105,106,107,108 Ethernet68 53 100000 +Ethernet72 121,122,123,124 Ethernet72 54 100000 +Ethernet76 125,126,127,128 Ethernet76 55 100000 diff --git a/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/qos.json.j2 b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/qos.json.j2 new file mode 100644 index 00000000000..d3cac04f662 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/qos.json.j2 @@ -0,0 +1,155 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable": "3,4" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"312000", + "red_min_threshold":"104000", + "yellow_max_threshold":"312000", + "yellow_min_threshold":"104000", + "green_max_threshold": "312000", + "green_min_threshold": "104000" + } + }, + "QUEUE": { + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76|0" : { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76|1" : { + "scheduler" : "[SCHEDULER|scheduler.2]" + } + } +} diff --git a/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/sai.profile b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/sai.profile new file mode 100755 index 00000000000..f147d44c0b3 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-d6356-48x25G-8x100G.config.bcm +SAI_NUM_ECMP_MEMBERS=32 diff --git a/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/td3-d6356-48x10G-8x40G.config.bcm b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/td3-d6356-48x10G-8x40G.config.bcm new file mode 100644 index 00000000000..5e4d9e9136e --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/td3-d6356-48x10G-8x40G.config.bcm @@ -0,0 +1,426 @@ +### fix for sonic +led_fw_path=/usr/share/sonic/platform/ +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 +ifp_inports_support_enable=1 +### end fix + + +core_clock_frequency=1525 +dpp_clock_ratio=2:3 +stable_size=0x5500000 +oversubscribe_mode=1 +pbmp_xport_xe=0x488787878808787fdfe1e1e1fe1e1e1fe + +#portmap_65=130:10 + +### Pipeline0, halfpipe 0 (12x25G + 2x100G) +portmap_1=1:10 +portmap_2=2:10 +portmap_3=3:10 +portmap_4=4:10 +portmap_5=5:10 +portmap_6=6:10 +portmap_7=7:10 +portmap_8=8:10 +portmap_13=13:10 +portmap_14=14:10 +portmap_15=15:10 +portmap_16=16:10 +portmap_21=21:10 +portmap_22=22:10 +portmap_23=23:10 +portmap_24=24:10 +portmap_29=29:10 +portmap_30=30:10 +portmap_31=31:10 +portmap_32=32:10 + +### Pipeline0, halfpipe 1 (12x25G + 2x100G) +portmap_33=33:10 +portmap_34=34:10 +portmap_35=35:10 +portmap_36=36:10 +portmap_41=41:10 +portmap_42=42:10 +portmap_43=43:10 +portmap_44=44:10 +portmap_49=49:10 +portmap_50=50:10 +portmap_51=51:10 +portmap_52=52:10 +portmap_57=57:10 +portmap_58=58:10 +portmap_59=59:10 +portmap_60=60:10 +portmap_61=61:10 +portmap_62=62:10 +portmap_63=63:10 +portmap_64=64:10 + +### Pipeline 1 +### First management port +#portmap_66=129:10:m +### Second management port +#portmap_130=128:10:m +### Loopback port +#portmap_131=131:10 + +### Pipeline 1, halfpipe 0 (12x25G + 2x100G) +portmap_67=65:10 +portmap_68=66:10 +portmap_69=67:10 +portmap_70=68:10 +portmap_71=69:10 +portmap_72=70:10 +portmap_73=71:10 +portmap_74=72:10 +portmap_79=77:40 +portmap_87=85:40 +portmap_95=93:40 + +### Pipeline 1, halfpipe 1 (12x25G + 2x100G) +portmap_99=97:40 +portmap_107=105:40 +portmap_115=113:40 +portmap_123=121:40 +portmap_127=125:40 +l2_mem_entries=32768 +l3_mem_entries=16384 +fpem_mem_entries=16384 +l2xmsg_mode=1 + +pdma_dv_free_count=64 +pdma_dv_free_size=320 +pdma_descriptor_prefetch_enable=1 + +port_flex_enable=1 + +#dport part +dport_map_port_79=87 +dport_map_port_87=79 +dport_map_port_107=115 +dport_map_port_115=107 + +#Polarity flips after lane swaps +#rx part +#FC1 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 + +#FC3 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 + +#FC5 +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 + +#FC8 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +#FC10 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 + +#FC12 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 + +#FC14 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 + +#FC15 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 + +#FC16 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 + +#FC17 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 + +#FC19 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 + +#FC21 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 + +#FC23 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 + +#FC24 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 + +#FC26 +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 + +#FC28 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +#phy_chain_rx_polarity_flip_physical{114.0}=0x1 + +#FC30 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 + +#FC31 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x1 + +#tx part +#FC19 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 + +#FC21 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 + +#FC23 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 + +#FC24 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 + +#FC26 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 + +#FC28 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_tx_polarity_flip_physical{116.0}=0x1 + +#FC30 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x1 + +#FC31 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 + + +phy_chain_rx_lane_map_physical{1.0}=0x1032 +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{5.0}=0x1032 +phy_chain_tx_lane_map_physical{5.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 + +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x0123 +phy_chain_rx_lane_map_physical{41.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x0123 +phy_chain_rx_lane_map_physical{49.0}=0x1032 +phy_chain_tx_lane_map_physical{49.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x1032 +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{61.0}=0x1032 +phy_chain_tx_lane_map_physical{61.0}=0x0123 + +phy_chain_rx_lane_map_physical{65.0}=0x2301 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x2301 +phy_chain_tx_lane_map_physical{69.0}=0x3210 + +phy_chain_rx_lane_map_physical{85.0}=0x0213 +phy_chain_tx_lane_map_physical{85.0}=0x3120 +phy_chain_rx_lane_map_physical{77.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x1302 + +phy_chain_rx_lane_map_physical{93.0}=0x2031 +phy_chain_tx_lane_map_physical{93.0}=0x1302 +phy_chain_rx_lane_map_physical{97.0}=0x0213 +phy_chain_tx_lane_map_physical{97.0}=0x3120 + +phy_chain_rx_lane_map_physical{113.0}=0x1203 +phy_chain_tx_lane_map_physical{113.0}=0x3120 +phy_chain_rx_lane_map_physical{105.0}=0x2031 +phy_chain_tx_lane_map_physical{105.0}=0x1302 + +phy_chain_rx_lane_map_physical{121.0}=0x2031 +phy_chain_tx_lane_map_physical{121.0}=0x1302 +phy_chain_rx_lane_map_physical{125.0}=0x0213 +phy_chain_tx_lane_map_physical{125.0}=0x3120 + +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 + + +serdes_preemphasis_1=0x0B3D01 +serdes_preemphasis_2=0x0A3C01 +serdes_preemphasis_3=0x0B3D01 +serdes_preemphasis_4=0x083200 +serdes_preemphasis_5=0x0A3D01 +serdes_preemphasis_6=0x083400 +serdes_preemphasis_7=0x0A3801 +serdes_preemphasis_8=0x083400 +serdes_preemphasis_13=0x093801 +serdes_preemphasis_14=0x083400 +serdes_preemphasis_15=0x083601 +serdes_preemphasis_16=0x083400 +serdes_preemphasis_21=0x083401 +serdes_preemphasis_22=0x073200 +serdes_preemphasis_23=0x083401 +serdes_preemphasis_24=0x063101 +serdes_preemphasis_29=0x063401 +serdes_preemphasis_30=0x063201 +serdes_preemphasis_31=0x063001 +serdes_preemphasis_32=0x052E00 +serdes_preemphasis_33=0x063001 +serdes_preemphasis_34=0x052E00 +serdes_preemphasis_35=0x052E01 +serdes_preemphasis_36=0x062D01 +serdes_preemphasis_41=0x063000 +serdes_preemphasis_42=0x062D01 +serdes_preemphasis_43=0x052C00 +serdes_preemphasis_44=0x052C01 +serdes_preemphasis_49=0x052C00 +serdes_preemphasis_50=0x052C00 +serdes_preemphasis_51=0x052C00 +serdes_preemphasis_52=0x062E01 +serdes_preemphasis_57=0x052D00 +serdes_preemphasis_58=0x062E01 +serdes_preemphasis_59=0x052D00 +serdes_preemphasis_60=0x052D00 +serdes_preemphasis_61=0x052E00 +serdes_preemphasis_62=0x052C01 +serdes_preemphasis_63=0x082E00 +serdes_preemphasis_64=0x062D01 +serdes_preemphasis_67=0x072C01 +serdes_preemphasis_68=0x052D00 +serdes_preemphasis_69=0x063001 +serdes_preemphasis_70=0x052D01 +serdes_preemphasis_71=0x083401 +serdes_preemphasis_72=0x052D01 +serdes_preemphasis_73=0x093901 +serdes_preemphasis_74=0x072D01 +serdes_preemphasis_lane0_87=0x083101 +serdes_preemphasis_lane1_87=0x083201 +serdes_preemphasis_lane2_87=0x083001 +serdes_preemphasis_lane3_87=0x093001 +serdes_preemphasis_lane0_79=0x082E01 +serdes_preemphasis_lane1_79=0x083301 +serdes_preemphasis_lane2_79=0x083101 +serdes_preemphasis_lane3_79=0x093102 +serdes_preemphasis_lane0_95=0x082F01 +serdes_preemphasis_lane1_95=0x083001 +serdes_preemphasis_lane2_95=0x083201 +serdes_preemphasis_lane3_95=0x093202 +serdes_preemphasis_lane0_99=0x083001 +serdes_preemphasis_lane1_99=0x0A3101 +serdes_preemphasis_lane2_99=0x083301 +serdes_preemphasis_lane3_99=0x093302 +serdes_preemphasis_lane0_115=0x093101 +serdes_preemphasis_lane1_115=0x0A3201 +serdes_preemphasis_lane2_115=0x0A3402 +serdes_preemphasis_lane3_115=0x093402 +serdes_preemphasis_lane0_107=0x093201 +serdes_preemphasis_lane1_107=0x0A3301 +serdes_preemphasis_lane2_107=0x093401 +serdes_preemphasis_lane3_107=0x093502 +serdes_preemphasis_lane0_123=0x093101 +serdes_preemphasis_lane1_123=0x0A3401 +serdes_preemphasis_lane2_123=0x0A3501 +serdes_preemphasis_lane3_123=0x093602 +serdes_preemphasis_lane0_127=0x093201 +serdes_preemphasis_lane1_127=0x0A3501 +serdes_preemphasis_lane2_127=0x0A3601 +serdes_preemphasis_lane3_127=0x093701 + +# interface type +serdes_if_type_1=16 +serdes_if_type_2=16 +serdes_if_type_3=16 +serdes_if_type_4=16 +serdes_if_type_5=16 +serdes_if_type_6=16 +serdes_if_type_7=16 +serdes_if_type_8=16 +serdes_if_type_13=16 +serdes_if_type_14=16 +serdes_if_type_15=16 +serdes_if_type_16=16 +serdes_if_type_21=16 +serdes_if_type_22=16 +serdes_if_type_23=16 +serdes_if_type_24=16 +serdes_if_type_29=16 +serdes_if_type_30=16 +serdes_if_type_31=16 +serdes_if_type_32=16 +serdes_if_type_33=16 +serdes_if_type_34=16 +serdes_if_type_35=16 +serdes_if_type_36=16 +serdes_if_type_41=16 +serdes_if_type_42=16 +serdes_if_type_43=16 +serdes_if_type_44=16 +serdes_if_type_49=16 +serdes_if_type_50=16 +serdes_if_type_51=16 +serdes_if_type_52=16 +serdes_if_type_57=16 +serdes_if_type_58=16 +serdes_if_type_59=16 +serdes_if_type_60=16 +serdes_if_type_61=16 +serdes_if_type_62=16 +serdes_if_type_63=16 +serdes_if_type_64=16 +serdes_if_type_67=16 +serdes_if_type_68=16 +serdes_if_type_69=16 +serdes_if_type_70=16 +serdes_if_type_71=16 +serdes_if_type_72=16 +serdes_if_type_73=16 +serdes_if_type_74=16 +serdes_if_type_87=28 +serdes_if_type_79=28 +serdes_if_type_95=28 +serdes_if_type_99=28 +serdes_if_type_115=28 +serdes_if_type_107=28 +serdes_if_type_123=28 +serdes_if_type_127=28 diff --git a/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/td3-d6356-48x25G-8x100G.config.bcm b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/td3-d6356-48x25G-8x100G.config.bcm new file mode 100644 index 00000000000..15981fa5b96 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/INVENTEC-D6356/td3-d6356-48x25G-8x100G.config.bcm @@ -0,0 +1,411 @@ +### fix for sonic +led_fw_path=/usr/share/sonic/platform/ +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 +ifp_inports_support_enable=1 +### end fix + + +core_clock_frequency=1525 +dpp_clock_ratio=2:3 +stable_size=0x5500000 +oversubscribe_mode=1 +pbmp_xport_xe=0x488787878808787fdfe1e1e1fe1e1e1fe + + +#portmap_65=130:10 + +### Pipeline0, halfpipe 0 (12x25G + 2x100G) +portmap_1=1:25 +portmap_2=2:25 +portmap_3=3:25 +portmap_4=4:25 +portmap_5=5:25 +portmap_6=6:25 +portmap_7=7:25 +portmap_8=8:25 +portmap_13=13:25 +portmap_14=14:25 +portmap_15=15:25 +portmap_16=16:25 +portmap_21=21:25 +portmap_22=22:25 +portmap_23=23:25 +portmap_24=24:25 +portmap_29=29:25 +portmap_30=30:25 +portmap_31=31:25 +portmap_32=32:25 + +### Pipeline0, halfpipe 1 (12x25G + 2x100G) +portmap_33=33:25 +portmap_34=34:25 +portmap_35=35:25 +portmap_36=36:25 +portmap_41=41:25 +portmap_42=42:25 +portmap_43=43:25 +portmap_44=44:25 +portmap_49=49:25 +portmap_50=50:25 +portmap_51=51:25 +portmap_52=52:25 +portmap_57=57:25 +portmap_58=58:25 +portmap_59=59:25 +portmap_60=60:25 +portmap_61=61:25 +portmap_62=62:25 +portmap_63=63:25 +portmap_64=64:25 + +### Pipeline 1 +### First management port +#portmap_66=129:10:m +### Second management port +#portmap_130=128:10:m +### Loopback port +#portmap_131=131:10 + +### Pipeline 1, halfpipe 0 (12x25G + 2x100G) +portmap_67=65:25 +portmap_68=66:25 +portmap_69=67:25 +portmap_70=68:25 +portmap_71=69:25 +portmap_72=70:25 +portmap_73=71:25 +portmap_74=72:25 +portmap_79=77:100 +portmap_87=85:100 +portmap_95=93:100 + +### Pipeline 1, halfpipe 1 (12x25G + 2x100G) +portmap_99=97:100 +portmap_107=105:100 +portmap_115=113:100 +portmap_123=121:100 +portmap_127=125:100 + +l2_mem_entries=32768 +l3_mem_entries=16384 +fpem_mem_entries=16384 +l2xmsg_mode=1 + +pdma_dv_free_count=64 +pdma_dv_free_size=320 +pdma_descriptor_prefetch_enable=1 + +port_flex_enable=1 + +#dport part +dport_map_port_79=87 +dport_map_port_87=79 +dport_map_port_107=115 +dport_map_port_115=107 + +#Polarity flips after lane swaps +#rx part +#FC1 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 + +#FC3 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 + +#FC5 +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 + +#FC8 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +#FC10 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 + +#FC12 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 + +#FC14 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 + +#FC15 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 + +#FC16 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 + +#FC17 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 + +#FC19 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 + +#FC21 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 + +#FC23 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 + +#FC24 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 + +#FC26 +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 + +#FC28 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +#phy_chain_rx_polarity_flip_physical{114.0}=0x1 + +#FC30 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 + +#FC31 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x1 + +#tx part +#FC19 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 + +#FC21 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 + +#FC23 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 + +#FC24 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 + +#FC26 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 + +#FC28 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_tx_polarity_flip_physical{116.0}=0x1 + +#FC30 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x1 + +#FC31 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 + + +phy_chain_rx_lane_map_physical{1.0}=0x1032 +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{5.0}=0x1032 +phy_chain_tx_lane_map_physical{5.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 + +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x0123 +phy_chain_rx_lane_map_physical{41.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x0123 +phy_chain_rx_lane_map_physical{49.0}=0x1032 +phy_chain_tx_lane_map_physical{49.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x1032 +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{61.0}=0x1032 +phy_chain_tx_lane_map_physical{61.0}=0x0123 + +phy_chain_rx_lane_map_physical{65.0}=0x2301 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x2301 +phy_chain_tx_lane_map_physical{69.0}=0x3210 + +phy_chain_rx_lane_map_physical{85.0}=0x0213 +phy_chain_tx_lane_map_physical{85.0}=0x3120 +phy_chain_rx_lane_map_physical{77.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x1302 + +phy_chain_rx_lane_map_physical{93.0}=0x2031 +phy_chain_tx_lane_map_physical{93.0}=0x1302 +phy_chain_rx_lane_map_physical{97.0}=0x0213 +phy_chain_tx_lane_map_physical{97.0}=0x3120 + +phy_chain_rx_lane_map_physical{113.0}=0x1203 +phy_chain_tx_lane_map_physical{113.0}=0x3120 +phy_chain_rx_lane_map_physical{105.0}=0x2031 +phy_chain_tx_lane_map_physical{105.0}=0x1302 + +phy_chain_rx_lane_map_physical{121.0}=0x2031 +phy_chain_tx_lane_map_physical{121.0}=0x1302 +phy_chain_rx_lane_map_physical{125.0}=0x0213 +phy_chain_tx_lane_map_physical{125.0}=0x3120 + +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 + +# EQ/IDriver +# 25G +serdes_preemphasis_1=0x0F4B0A +serdes_preemphasis_2=0x104A0A +serdes_preemphasis_3=0x0E4C0A +serdes_preemphasis_4=0x0E4C0A +serdes_preemphasis_5=0x0D4D0A +serdes_preemphasis_6=0x0D4D0A +serdes_preemphasis_7=0x0D4D0A +serdes_preemphasis_8=0x0D4D0A +serdes_preemphasis_13=0x0C4E0A +serdes_preemphasis_14=0x0D4D0A +serdes_preemphasis_15=0x0B4F0A +serdes_preemphasis_16=0x0C4E0A +serdes_preemphasis_21=0x0A500A +serdes_preemphasis_22=0x0A500A +serdes_preemphasis_23=0x09510A +serdes_preemphasis_24=0x09510A +serdes_preemphasis_29=0x08520A +serdes_preemphasis_30=0x08520A +serdes_preemphasis_31=0x07530A +serdes_preemphasis_32=0x07530A +serdes_preemphasis_33=0x06540A +serdes_preemphasis_34=0x07530A +serdes_preemphasis_35=0x05550A +serdes_preemphasis_36=0x06540A +serdes_preemphasis_41=0x05550A +serdes_preemphasis_42=0x06540A +serdes_preemphasis_43=0x05550A +serdes_preemphasis_44=0x05550A +serdes_preemphasis_49=0x04560A +serdes_preemphasis_50=0x05550A +serdes_preemphasis_51=0x05550A +serdes_preemphasis_52=0x06540A +serdes_preemphasis_57=0x06540A +serdes_preemphasis_58=0x07530A +serdes_preemphasis_59=0x06540A +serdes_preemphasis_60=0x07530A +serdes_preemphasis_61=0x06540A +serdes_preemphasis_62=0x08520A +serdes_preemphasis_63=0x08520A +serdes_preemphasis_64=0x09510A +serdes_preemphasis_67=0x06540A +serdes_preemphasis_68=0x06540A +serdes_preemphasis_69=0x06540A +serdes_preemphasis_70=0x08520A +serdes_preemphasis_71=0x09510A +serdes_preemphasis_72=0x09510A +serdes_preemphasis_73=0x09510A +serdes_preemphasis_74=0x0A500A +serdes_preemphasis_lane0_87=0x07530A +serdes_preemphasis_lane1_87=0x05550A +serdes_preemphasis_lane2_87=0x07530A +serdes_preemphasis_lane3_87=0x05550A +serdes_preemphasis_79=0x05550A +serdes_preemphasis_95=0x07530A +serdes_preemphasis_lane0_99=0x085309 +serdes_preemphasis_lane1_99=0x0B4F0A +serdes_preemphasis_lane2_99=0x085309 +serdes_preemphasis_lane3_99=0x0B4F0A +serdes_preemphasis_115=0x0B4F0A +serdes_preemphasis_107=0x0B4F0A +serdes_preemphasis_123=0x0B4F0A +serdes_preemphasis_127=0x0D4E09 + +# interface type +serdes_if_type_1=16 +serdes_if_type_2=16 +serdes_if_type_3=16 +serdes_if_type_4=16 +serdes_if_type_5=16 +serdes_if_type_6=16 +serdes_if_type_7=16 +serdes_if_type_8=16 +serdes_if_type_13=16 +serdes_if_type_14=16 +serdes_if_type_15=16 +serdes_if_type_16=16 +serdes_if_type_21=16 +serdes_if_type_22=16 +serdes_if_type_23=16 +serdes_if_type_24=16 +serdes_if_type_29=16 +serdes_if_type_30=16 +serdes_if_type_31=16 +serdes_if_type_32=16 +serdes_if_type_33=16 +serdes_if_type_34=16 +serdes_if_type_35=16 +serdes_if_type_36=16 +serdes_if_type_41=16 +serdes_if_type_42=16 +serdes_if_type_43=16 +serdes_if_type_44=16 +serdes_if_type_49=16 +serdes_if_type_50=16 +serdes_if_type_51=16 +serdes_if_type_52=16 +serdes_if_type_57=16 +serdes_if_type_58=16 +serdes_if_type_59=16 +serdes_if_type_60=16 +serdes_if_type_61=16 +serdes_if_type_62=16 +serdes_if_type_63=16 +serdes_if_type_64=16 +serdes_if_type_67=16 +serdes_if_type_68=16 +serdes_if_type_69=16 +serdes_if_type_70=16 +serdes_if_type_71=16 +serdes_if_type_72=16 +serdes_if_type_73=16 +serdes_if_type_74=16 +serdes_if_type_87=28 +serdes_if_type_79=28 +serdes_if_type_95=28 +serdes_if_type_99=28 +serdes_if_type_115=28 +serdes_if_type_107=28 +serdes_if_type_123=28 +serdes_if_type_127=28 diff --git a/device/inventec/x86_64-inventec_d6356-r0/custom_led.bin b/device/inventec/x86_64-inventec_d6356-r0/custom_led.bin new file mode 100755 index 00000000000..90cfecf8e42 Binary files /dev/null and b/device/inventec/x86_64-inventec_d6356-r0/custom_led.bin differ diff --git a/device/inventec/x86_64-inventec_d6356-r0/default_sku b/device/inventec/x86_64-inventec_d6356-r0/default_sku new file mode 100644 index 00000000000..f4c77ebd10f --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/default_sku @@ -0,0 +1 @@ +INVENTEC-D6356 t1 diff --git a/device/inventec/x86_64-inventec_d6356-r0/installer.conf b/device/inventec/x86_64-inventec_d6356-r0/installer.conf new file mode 100644 index 00000000000..1db64ba02c3 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +VAR_LOG_SIZE=1024 diff --git a/device/inventec/x86_64-inventec_d6356-r0/led_proc_init.soc b/device/inventec/x86_64-inventec_d6356-r0/led_proc_init.soc new file mode 100644 index 00000000000..6d9fa922791 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/led_proc_init.soc @@ -0,0 +1,7 @@ +led auto off +led stop +m0 load 0 0x0 /usr/share/sonic/platform/linkscan_led_fw.bin +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +#led auto on +cint /usr/share/sonic/platform/plugins/inv_led_cb.c +led start diff --git a/device/inventec/x86_64-inventec_d6356-r0/linkscan_led_fw.bin b/device/inventec/x86_64-inventec_d6356-r0/linkscan_led_fw.bin new file mode 100755 index 00000000000..86cf30e80fb Binary files /dev/null and b/device/inventec/x86_64-inventec_d6356-r0/linkscan_led_fw.bin differ diff --git a/device/inventec/x86_64-inventec_d6356-r0/plugins/eeprom.py b/device/inventec/x86_64-inventec_d6356-r0/plugins/eeprom.py new file mode 100644 index 00000000000..953570d79cd --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d6356 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/2-0055/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/inventec/x86_64-inventec_d6356-r0/plugins/psuutil.py b/device/inventec/x86_64-inventec_d6356-r0/plugins/psuutil.py new file mode 100755 index 00000000000..a7d68c2f811 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/plugins/psuutil.py @@ -0,0 +1,88 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + PSU_DIR = "/sys/class/hwmon/hwmon2/device/" + + def __init__(self): + PsuBase.__init__(self) + +# Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + + if index == 1 : + attr_path = "/sys/class/hwmon/hwmon7/device/in1_input" + else : + attr_path = "/sys/class/hwmon/hwmon8/device/in1_input" + + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU status + if (attr_value != "0"): + status = 1 + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + ind = index + attr_file ='psu'+ str(ind) + attr_path = self.PSU_DIR +'/' + attr_file + normal_attr_value = '1:normal' + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU presence + if (attr_value == normal_attr_value): + status = 1 + return status + diff --git a/device/inventec/x86_64-inventec_d6356-r0/plugins/sfputil.py b/device/inventec/x86_64-inventec_d6356-r0/plugins/sfputil.py new file mode 100755 index 00000000000..aaa7210d105 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/plugins/sfputil.py @@ -0,0 +1,389 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# +# +# INV_FIX-4037 +# (1) Support get_transceiver_change_event. +# Create the SWPSEventMonitor class to handle any kobject event from the SWPS driver. +# (2) Integrated with the optoe driver +# Due to installing the optoe driver to create the i2c topology, +# it needs to overwrite the followings functions which are declared in the sfputilbase.py. +# First, it needs to impore some SFP-related class object +# +try: + import time + import socket, re,os + from sonic_sfp.sfputilbase import SfpUtilBase + from collections import OrderedDict + from sonic_sfp.sff8472 import sff8472Dom +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +SFP_TEMPE_OFFSET = 96 +SFP_TEMPE_WIDTH = 2 +SFP_VLOT_OFFSET = 98 +SFP_VOLT_WIDTH = 2 +SFP_CHANNL_MON_OFFSET = 100 +SFP_CHANNL_MON_WIDTH = 6 + +NETLINK_KOBJECT_UEVENT = 15 +monitor = None + +class SWPSEventMonitor(object): + + def __init__(self): + self.recieved_events = OrderedDict() + self.socket = socket.socket( + socket.AF_NETLINK, socket.SOCK_DGRAM, NETLINK_KOBJECT_UEVENT) + + def start(self): + self.socket.bind((os.getpid(), -1)) + + def stop(self): + self.socket.close() + + def __enter__(self): + self.start() + return self + + def __exit__(self, exc_type, exc_value, traceback): + self.stop() + + def __iter__(self): + global monitor + while True: + for item in monitor.next_events(): + yield item + + def next_events(self): + data = self.socket.recv(16384) + event = {} + for item in data.split(b'\x00'): + if not item: + # check if we have an event and if we already received it + if event and event['SEQNUM'] not in self.recieved_events: + self.recieved_events[event['SEQNUM']] = None + if (len(self.recieved_events) > 100): + self.recieved_events.popitem(last=False) + yield event + event = {} + else: + try: + k, v = item.split(b'=', 1) + event[k.decode('ascii')] = v.decode('ascii') + except ValueError: + pass + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 55 + PORTS_IN_BLOCK = 56 + QSFP_PORT_START = 48 + QSFP_PORT_END = 55 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0:22, + 1:23, + 2:24, + 3:25, + 4:26, + 5:27, + 6:28, + 7:29, + 8:30, + 9:31, + 10:32, + 11:33, + 12:34, + 13:35, + 14:36, + 15:37, + 16:38, + 17:39, + 18:40, + 19:41, + 20:42, + 21:43, + 22:44, + 23:45, + 24:46, + 25:47, + 26:48, + 27:49, + 28:50, + 29:51, + 30:52, + 31:53, + 32:54, + 33:55, + 34:56, + 35:57, + 36:58, + 37:59, + 38:60, + 39:61, + 40:62, + 41:63, + 42:64, + 43:65, + 44:66, + 45:67, + 46:68, + 47:69, + 48:14, + 49:15, + 50:16, + 51:17, + 52:18, + 53:19, + 54:20, + 55:21 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/bus/i2c/devices/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/class/swps/port"+str(port_num)+"/reset" + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True +# +# INV_FIX-4037 +# (1) Support get_transceiver_change_event. +# Modify get_transceiver_change_event() to listen the SWPS kobject event. +# (2) Integrated with the optoe driver +# Due to installing the optoe driver to create the i2c topology, +# it needs to overwrite the followings functions which are declared in the sfputilbase.py. +# It modified the get_eeprom_dom_raw() and get_transceiver_dom_info_dict(). +# + def get_transceiver_change_event(self): + global monitor + port_dict = {} + with SWPSEventMonitor() as monitor: + for event in monitor: + if event['SUBSYSTEM'] == 'swps': + #print('SWPS event. From %s, ACTION %s, IF_TYPE %s, IF_LANE %s' % (event['DEVPATH'], event['ACTION'], event['IF_TYPE'], event['IF_LANE'])) + portname = event['DEVPATH'].split("/")[-1] + rc = re.match(r"port(?P\d+)",portname) + if rc is not None: + if event['ACTION'] == "remove": + remove_num = int(rc.group("num")) + port_dict[remove_num] = "0" + #port_dict[rc.group("num")] = "0" + if event['ACTION'] == "add": + add_num = int(rc.group("num")) + port_dict[add_num] = "1" + #port_dict[rc.group("num")] = "1" + return True, port_dict + return False, {} + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256) + + def get_transceiver_dom_info_dict(self, port_num): + if port_num in self.qsfp_ports or port_num in self.osfp_ports: + return SfpUtilBase.get_transceiver_dom_info_dict(self, port_num) + else: + transceiver_dom_info_dict = {} + transceiver_dom_info_dict['temperature'] = 'N/A' + transceiver_dom_info_dict['voltage'] = 'N/A' + transceiver_dom_info_dict['rx1power'] = 'N/A' + transceiver_dom_info_dict['rx2power'] = 'N/A' + transceiver_dom_info_dict['rx3power'] = 'N/A' + transceiver_dom_info_dict['rx4power'] = 'N/A' + transceiver_dom_info_dict['tx1bias'] = 'N/A' + transceiver_dom_info_dict['tx2bias'] = 'N/A' + transceiver_dom_info_dict['tx3bias'] = 'N/A' + transceiver_dom_info_dict['tx4bias'] = 'N/A' + transceiver_dom_info_dict['tx1power'] = 'N/A' + transceiver_dom_info_dict['tx2power'] = 'N/A' + transceiver_dom_info_dict['tx3power'] = 'N/A' + transceiver_dom_info_dict['tx4power'] = 'N/A' + + offset = 256 + file_path = self._get_port_eeprom_path(port_num, self.DOM_EEPROM_ADDR) + if not self._sfp_eeprom_present(file_path, 0): + return None + + try: + sysfsfile_eeprom = open(file_path, "rb") + except IOError: + print("Error: reading sysfs file %s" % file_path) + return None + + sfpd_obj = sff8472Dom(None, 1) + if sfpd_obj is None: + return None + + dom_temperature_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + else: + return transceiver_dom_info_dict + + dom_voltage_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_VLOT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + else: + return transceiver_dom_info_dict + + dom_channel_monitor_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + else: + return transceiver_dom_info_dict + + try: + sysfsfile_eeprom.close() + except IOError: + print("Error: closing sysfs file %s" % file_path) + return None + + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RXPower']['value'] + transceiver_dom_info_dict['rx2power'] = 'N/A' + transceiver_dom_info_dict['rx3power'] = 'N/A' + transceiver_dom_info_dict['rx4power'] = 'N/A' + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TXBias']['value'] + transceiver_dom_info_dict['tx2bias'] = 'N/A' + transceiver_dom_info_dict['tx3bias'] = 'N/A' + transceiver_dom_info_dict['tx4bias'] = 'N/A' + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TXPower']['value'] + transceiver_dom_info_dict['tx2power'] = 'N/A' + transceiver_dom_info_dict['tx3power'] = 'N/A' + transceiver_dom_info_dict['tx4power'] = 'N/A' + + return transceiver_dom_info_dict diff --git a/device/inventec/x86_64-inventec_d6356-r0/pmon_daemon_control.json b/device/inventec/x86_64-inventec_d6356-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..94592fa8ceb --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/inventec/x86_64-inventec_d6356-r0/sensors.conf b/device/inventec/x86_64-inventec_d6356-r0/sensors.conf new file mode 100644 index 00000000000..2e4e5dccdff --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356-r0/sensors.conf @@ -0,0 +1,112 @@ +# libsensors configuration file +chip "ucd90160-*" + ignore temp1 + +chip "pch_haswell-*" + label temp1 "PCH Temperature" + +chip "tmp75-i2c-*-0048" + label temp1 "CPU Board Temperature" + +chip "tmp75-i2c-*-004a" + label temp1 "FrontSide Temperature" + +chip "tmp75-i2c-*-004e" + label temp1 "NearASIC Temperature" + +chip "tmp75-i2c-*-004d" + label temp1 "RearSide Temperature" + +chip "inv_cpld-i2c-*-77" + label fan1 "FanModule1 Front RPM" + label fan2 "FanModule1 Rear RPM" + label fan3 "FanModule2 Front RPM" + label fan4 "FanModule2 Rear RPM" + label fan5 "FanModule3 Front RPM" + label fan6 "FanModule3 Rear RPM" + label fan7 "FanModule4 Front RPM" + label fan8 "FanModule4 Rear RPM" + label fan9 "FanModule5 Front RPM" + label fan10 "FanModule5 Rear RPM" + label pwm1 "FanModule1 PWM (0-255)" + label pwm2 "FanModule2 PWM (0-255)" + label pwm3 "FanModule3 PWM (0-255)" + label pwm4 "FanModule4 PWM (0-255)" + label pwm5 "FanModule5 PWM (0-255)" + label temp1 "ASIC Temperature" + +chip "inv_psu-i2c-*-005b" + ignore power3 + ignore curr3 + ignore fan2 + label fan1 "PSU1 Fan RPM" + label temp1 "PSU1 Temperature1" + label temp2 "PSU1 Temperature2" + label temp3 "PSU1 Temperature3" + label in1 "PSU1 Input Voltage" + label curr1 "PSU1 Input Current" + label power1 "PSU1 Input Power" + label in2 "PSU1 Output Voltage" + label curr2 "PSU1 Output Current" + label power2 "PSU1 Output Power" + label pwm1 "PSU1 PWM (0-100)" + +chip "inv_psu-i2c-*-005a" + ignore power3 + ignore curr3 + ignore fan2 + label fan1 "PSU2 Fan RPM" + label temp1 "PSU2 Temperature1" + label temp2 "PSU2 Temperature2" + label temp3 "PSU2 Temperature3" + label in1 "PSU2 Input Voltage" + label curr1 "PSU2 Input Current" + label power1 "PSU2 Input Power" + label in2 "PSU2 Output Voltage" + label curr2 "PSU2 Output Current" + label power2 "PSU2 Output Power" + label pwm1 "PSU2 PWM (0-100)" + +chip "inv_psoc-*" + label temp1 "FrontSide Temperature" + label temp2 "FanBoard Temperature" + label temp3 "NearASIC Temperature" + label temp4 "Center Temperature" + + label temp5 "CPU Board Temperature" + label temp6 "ASIC Temperature" + label temp7 "PSU1 Temperature1" + label temp8 "PSU2 Temperature1" + label temp9 "PSU1 Temperature2" + label temp10 "PSU2 Temperature2" + label fan1 "FanModule1 Front RPM" + label fan2 "FanModule1 Rear RPM" + label fan3 "FanModule2 Front RPM" + label fan4 "FanModule2 Rear RPM" + label fan5 "FanModule3 Front RPM" + label fan6 "FanModule3 Rear RPM" + label fan7 "FanModule4 Front RPM" + label fan8 "FanModule4 Rear RPM" + label fan9 "FanModule5 Front RPM" + label fan10 "FanModule5 Rear RPM" + label pwm1 "FanModule1 PWM" + label pwm2 "FanModule2 PWM" + label pwm3 "FanModule3 PWM" + label pwm4 "FanModule4 PWM" + label pwm5 "FanModule5 PWM" + label pwm6 "PSU1 FAN PWM" + label pwm7 "PSU2 FAN PWM" + label fan11 "PSU1 FAN RPM" + label fan12 "PSU2 FAN RPM" + label in1 "PSU1 Input Voltage" + label in2 "PSU2 Input Voltage" + label curr1 "PSU1 Input Current" + label curr2 "PSU2 Input Current" + label power1 "PSU1 Input Power" + label power2 "PSU2 Input Power" + label in3 "PSU1 Output Voltage" + label in4 "PSU2 Output Voltage" + label curr3 "PSU1 Output Current" + label curr4 "PSU2 Output Current" + label power3 "PSU1 Output Power" + label power4 "PSU2 Output Power" diff --git a/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/buffers.json.j2 b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/buffers_defaults_t0.j2 b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..1587625a294 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/buffers_defaults_t0.j2 @@ -0,0 +1,50 @@ +{%- set default_cable = '40m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,47) %} + {% if PORT.append("Ethernet%d" % (port_idx)) %}{% endif %} + {% endfor %} + {% for port_idx in range(12,19) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10443264", + "type": "ingress", + "mode": "dynamic", + "xoff": "7335744" + }, + "egress_lossy_pool": { + "size": "8877440", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"3995680" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} + diff --git a/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/buffers_defaults_t1.j2 b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..1587625a294 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/buffers_defaults_t1.j2 @@ -0,0 +1,50 @@ +{%- set default_cable = '40m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,47) %} + {% if PORT.append("Ethernet%d" % (port_idx)) %}{% endif %} + {% endfor %} + {% for port_idx in range(12,19) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10443264", + "type": "ingress", + "mode": "dynamic", + "xoff": "7335744" + }, + "egress_lossy_pool": { + "size": "8877440", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"3995680" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} + diff --git a/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/pg_profile_lookup.ini b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/pg_profile_lookup.ini new file mode 100644 index 00000000000..7222f801492 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 -4 2288 + 25000 5m 1248 2288 53248 -4 2288 + 40000 5m 1248 2288 66560 -4 2288 + 50000 5m 1248 2288 79872 -4 2288 + 100000 5m 1248 2288 165568 -4 2288 + 10000 40m 1248 2288 37024 -4 2288 + 25000 40m 1248 2288 56160 -4 2288 + 40000 40m 1248 2288 71552 -4 2288 + 50000 40m 1248 2288 85696 -4 2288 + 100000 40m 1248 2288 177632 -4 2288 + 10000 300m 1248 2288 46176 -4 2288 + 25000 300m 1248 2288 79040 -4 2288 + 40000 300m 1248 2288 108160 -4 2288 + 50000 300m 1248 2288 131456 -4 2288 + 100000 300m 1248 2288 268736 -4 2288 diff --git a/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/port_config.ini b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/port_config.ini new file mode 100755 index 00000000000..aaac478ab8f --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed +Ethernet0 1 Ethernet0 0 25000 +Ethernet1 2 Ethernet1 1 25000 +Ethernet2 3 Ethernet2 2 25000 +Ethernet3 4 Ethernet3 3 25000 +Ethernet4 5 Ethernet4 4 25000 +Ethernet5 6 Ethernet5 5 25000 +Ethernet6 7 Ethernet6 6 25000 +Ethernet7 8 Ethernet7 7 25000 +Ethernet8 13 Ethernet8 8 25000 +Ethernet9 14 Ethernet9 9 25000 +Ethernet10 15 Ethernet10 10 25000 +Ethernet11 16 Ethernet11 11 25000 +Ethernet12 21 Ethernet12 12 25000 +Ethernet13 22 Ethernet13 13 25000 +Ethernet14 23 Ethernet14 14 25000 +Ethernet15 24 Ethernet15 15 25000 +Ethernet16 29 Ethernet16 16 25000 +Ethernet17 30 Ethernet17 17 25000 +Ethernet18 31 Ethernet18 18 25000 +Ethernet19 32 Ethernet19 19 25000 +Ethernet20 33 Ethernet20 20 25000 +Ethernet21 34 Ethernet21 21 25000 +Ethernet22 35 Ethernet22 22 25000 +Ethernet23 36 Ethernet23 23 25000 +Ethernet24 41 Ethernet24 24 25000 +Ethernet25 42 Ethernet25 25 25000 +Ethernet26 43 Ethernet26 26 25000 +Ethernet27 44 Ethernet27 27 25000 +Ethernet28 49 Ethernet28 28 25000 +Ethernet29 50 Ethernet29 29 25000 +Ethernet30 51 Ethernet30 30 25000 +Ethernet31 52 Ethernet31 31 25000 +Ethernet32 57 Ethernet32 32 25000 +Ethernet33 58 Ethernet33 33 25000 +Ethernet34 59 Ethernet34 34 25000 +Ethernet35 60 Ethernet35 35 25000 +Ethernet36 61 Ethernet36 36 25000 +Ethernet37 62 Ethernet37 37 25000 +Ethernet38 63 Ethernet38 38 25000 +Ethernet39 64 Ethernet39 39 25000 +Ethernet40 65 Ethernet40 40 25000 +Ethernet41 66 Ethernet41 41 25000 +Ethernet42 67 Ethernet42 42 25000 +Ethernet43 68 Ethernet43 43 25000 +Ethernet44 69 Ethernet44 44 25000 +Ethernet45 70 Ethernet45 45 25000 +Ethernet46 71 Ethernet46 46 25000 +Ethernet47 72 Ethernet47 47 25000 +Ethernet48 85,86,87,88 Ethernet48 48 100000 +Ethernet52 77,78,79,80 Ethernet52 49 100000 +Ethernet56 93,94,95,96 Ethernet56 50 100000 +Ethernet60 97,98,99,100 Ethernet60 51 100000 +Ethernet64 113,114,115,116 Ethernet64 52 100000 +Ethernet68 105,106,107,108 Ethernet68 53 100000 +Ethernet72 121,122,123,124 Ethernet72 54 100000 +Ethernet76 125,126,127,128 Ethernet76 55 100000 diff --git a/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/qos.json.j2 b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/qos.json.j2 new file mode 100644 index 00000000000..d3cac04f662 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/qos.json.j2 @@ -0,0 +1,155 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable": "3,4" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"312000", + "red_min_threshold":"104000", + "yellow_max_threshold":"312000", + "yellow_min_threshold":"104000", + "green_max_threshold": "312000", + "green_min_threshold": "104000" + } + }, + "QUEUE": { + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76|0" : { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, + "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76|1" : { + "scheduler" : "[SCHEDULER|scheduler.2]" + } + } +} diff --git a/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/sai.profile b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/sai.profile new file mode 100755 index 00000000000..d17f28dbe05 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-d6356j-48x25G-8x100G.config.bcm +SAI_NUM_ECMP_MEMBERS=32 diff --git a/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/td3-d6356j-48x10G-8x40G.config.bcm b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/td3-d6356j-48x10G-8x40G.config.bcm new file mode 100644 index 00000000000..5e4d9e9136e --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/td3-d6356j-48x10G-8x40G.config.bcm @@ -0,0 +1,426 @@ +### fix for sonic +led_fw_path=/usr/share/sonic/platform/ +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 +ifp_inports_support_enable=1 +### end fix + + +core_clock_frequency=1525 +dpp_clock_ratio=2:3 +stable_size=0x5500000 +oversubscribe_mode=1 +pbmp_xport_xe=0x488787878808787fdfe1e1e1fe1e1e1fe + +#portmap_65=130:10 + +### Pipeline0, halfpipe 0 (12x25G + 2x100G) +portmap_1=1:10 +portmap_2=2:10 +portmap_3=3:10 +portmap_4=4:10 +portmap_5=5:10 +portmap_6=6:10 +portmap_7=7:10 +portmap_8=8:10 +portmap_13=13:10 +portmap_14=14:10 +portmap_15=15:10 +portmap_16=16:10 +portmap_21=21:10 +portmap_22=22:10 +portmap_23=23:10 +portmap_24=24:10 +portmap_29=29:10 +portmap_30=30:10 +portmap_31=31:10 +portmap_32=32:10 + +### Pipeline0, halfpipe 1 (12x25G + 2x100G) +portmap_33=33:10 +portmap_34=34:10 +portmap_35=35:10 +portmap_36=36:10 +portmap_41=41:10 +portmap_42=42:10 +portmap_43=43:10 +portmap_44=44:10 +portmap_49=49:10 +portmap_50=50:10 +portmap_51=51:10 +portmap_52=52:10 +portmap_57=57:10 +portmap_58=58:10 +portmap_59=59:10 +portmap_60=60:10 +portmap_61=61:10 +portmap_62=62:10 +portmap_63=63:10 +portmap_64=64:10 + +### Pipeline 1 +### First management port +#portmap_66=129:10:m +### Second management port +#portmap_130=128:10:m +### Loopback port +#portmap_131=131:10 + +### Pipeline 1, halfpipe 0 (12x25G + 2x100G) +portmap_67=65:10 +portmap_68=66:10 +portmap_69=67:10 +portmap_70=68:10 +portmap_71=69:10 +portmap_72=70:10 +portmap_73=71:10 +portmap_74=72:10 +portmap_79=77:40 +portmap_87=85:40 +portmap_95=93:40 + +### Pipeline 1, halfpipe 1 (12x25G + 2x100G) +portmap_99=97:40 +portmap_107=105:40 +portmap_115=113:40 +portmap_123=121:40 +portmap_127=125:40 +l2_mem_entries=32768 +l3_mem_entries=16384 +fpem_mem_entries=16384 +l2xmsg_mode=1 + +pdma_dv_free_count=64 +pdma_dv_free_size=320 +pdma_descriptor_prefetch_enable=1 + +port_flex_enable=1 + +#dport part +dport_map_port_79=87 +dport_map_port_87=79 +dport_map_port_107=115 +dport_map_port_115=107 + +#Polarity flips after lane swaps +#rx part +#FC1 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 + +#FC3 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 + +#FC5 +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 + +#FC8 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +#FC10 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 + +#FC12 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 + +#FC14 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 + +#FC15 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 + +#FC16 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 + +#FC17 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 + +#FC19 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 + +#FC21 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 + +#FC23 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 + +#FC24 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 + +#FC26 +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 + +#FC28 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +#phy_chain_rx_polarity_flip_physical{114.0}=0x1 + +#FC30 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 + +#FC31 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x1 + +#tx part +#FC19 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 + +#FC21 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 + +#FC23 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 + +#FC24 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 + +#FC26 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 + +#FC28 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_tx_polarity_flip_physical{116.0}=0x1 + +#FC30 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x1 + +#FC31 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 + + +phy_chain_rx_lane_map_physical{1.0}=0x1032 +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{5.0}=0x1032 +phy_chain_tx_lane_map_physical{5.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 + +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x0123 +phy_chain_rx_lane_map_physical{41.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x0123 +phy_chain_rx_lane_map_physical{49.0}=0x1032 +phy_chain_tx_lane_map_physical{49.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x1032 +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{61.0}=0x1032 +phy_chain_tx_lane_map_physical{61.0}=0x0123 + +phy_chain_rx_lane_map_physical{65.0}=0x2301 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x2301 +phy_chain_tx_lane_map_physical{69.0}=0x3210 + +phy_chain_rx_lane_map_physical{85.0}=0x0213 +phy_chain_tx_lane_map_physical{85.0}=0x3120 +phy_chain_rx_lane_map_physical{77.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x1302 + +phy_chain_rx_lane_map_physical{93.0}=0x2031 +phy_chain_tx_lane_map_physical{93.0}=0x1302 +phy_chain_rx_lane_map_physical{97.0}=0x0213 +phy_chain_tx_lane_map_physical{97.0}=0x3120 + +phy_chain_rx_lane_map_physical{113.0}=0x1203 +phy_chain_tx_lane_map_physical{113.0}=0x3120 +phy_chain_rx_lane_map_physical{105.0}=0x2031 +phy_chain_tx_lane_map_physical{105.0}=0x1302 + +phy_chain_rx_lane_map_physical{121.0}=0x2031 +phy_chain_tx_lane_map_physical{121.0}=0x1302 +phy_chain_rx_lane_map_physical{125.0}=0x0213 +phy_chain_tx_lane_map_physical{125.0}=0x3120 + +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 + + +serdes_preemphasis_1=0x0B3D01 +serdes_preemphasis_2=0x0A3C01 +serdes_preemphasis_3=0x0B3D01 +serdes_preemphasis_4=0x083200 +serdes_preemphasis_5=0x0A3D01 +serdes_preemphasis_6=0x083400 +serdes_preemphasis_7=0x0A3801 +serdes_preemphasis_8=0x083400 +serdes_preemphasis_13=0x093801 +serdes_preemphasis_14=0x083400 +serdes_preemphasis_15=0x083601 +serdes_preemphasis_16=0x083400 +serdes_preemphasis_21=0x083401 +serdes_preemphasis_22=0x073200 +serdes_preemphasis_23=0x083401 +serdes_preemphasis_24=0x063101 +serdes_preemphasis_29=0x063401 +serdes_preemphasis_30=0x063201 +serdes_preemphasis_31=0x063001 +serdes_preemphasis_32=0x052E00 +serdes_preemphasis_33=0x063001 +serdes_preemphasis_34=0x052E00 +serdes_preemphasis_35=0x052E01 +serdes_preemphasis_36=0x062D01 +serdes_preemphasis_41=0x063000 +serdes_preemphasis_42=0x062D01 +serdes_preemphasis_43=0x052C00 +serdes_preemphasis_44=0x052C01 +serdes_preemphasis_49=0x052C00 +serdes_preemphasis_50=0x052C00 +serdes_preemphasis_51=0x052C00 +serdes_preemphasis_52=0x062E01 +serdes_preemphasis_57=0x052D00 +serdes_preemphasis_58=0x062E01 +serdes_preemphasis_59=0x052D00 +serdes_preemphasis_60=0x052D00 +serdes_preemphasis_61=0x052E00 +serdes_preemphasis_62=0x052C01 +serdes_preemphasis_63=0x082E00 +serdes_preemphasis_64=0x062D01 +serdes_preemphasis_67=0x072C01 +serdes_preemphasis_68=0x052D00 +serdes_preemphasis_69=0x063001 +serdes_preemphasis_70=0x052D01 +serdes_preemphasis_71=0x083401 +serdes_preemphasis_72=0x052D01 +serdes_preemphasis_73=0x093901 +serdes_preemphasis_74=0x072D01 +serdes_preemphasis_lane0_87=0x083101 +serdes_preemphasis_lane1_87=0x083201 +serdes_preemphasis_lane2_87=0x083001 +serdes_preemphasis_lane3_87=0x093001 +serdes_preemphasis_lane0_79=0x082E01 +serdes_preemphasis_lane1_79=0x083301 +serdes_preemphasis_lane2_79=0x083101 +serdes_preemphasis_lane3_79=0x093102 +serdes_preemphasis_lane0_95=0x082F01 +serdes_preemphasis_lane1_95=0x083001 +serdes_preemphasis_lane2_95=0x083201 +serdes_preemphasis_lane3_95=0x093202 +serdes_preemphasis_lane0_99=0x083001 +serdes_preemphasis_lane1_99=0x0A3101 +serdes_preemphasis_lane2_99=0x083301 +serdes_preemphasis_lane3_99=0x093302 +serdes_preemphasis_lane0_115=0x093101 +serdes_preemphasis_lane1_115=0x0A3201 +serdes_preemphasis_lane2_115=0x0A3402 +serdes_preemphasis_lane3_115=0x093402 +serdes_preemphasis_lane0_107=0x093201 +serdes_preemphasis_lane1_107=0x0A3301 +serdes_preemphasis_lane2_107=0x093401 +serdes_preemphasis_lane3_107=0x093502 +serdes_preemphasis_lane0_123=0x093101 +serdes_preemphasis_lane1_123=0x0A3401 +serdes_preemphasis_lane2_123=0x0A3501 +serdes_preemphasis_lane3_123=0x093602 +serdes_preemphasis_lane0_127=0x093201 +serdes_preemphasis_lane1_127=0x0A3501 +serdes_preemphasis_lane2_127=0x0A3601 +serdes_preemphasis_lane3_127=0x093701 + +# interface type +serdes_if_type_1=16 +serdes_if_type_2=16 +serdes_if_type_3=16 +serdes_if_type_4=16 +serdes_if_type_5=16 +serdes_if_type_6=16 +serdes_if_type_7=16 +serdes_if_type_8=16 +serdes_if_type_13=16 +serdes_if_type_14=16 +serdes_if_type_15=16 +serdes_if_type_16=16 +serdes_if_type_21=16 +serdes_if_type_22=16 +serdes_if_type_23=16 +serdes_if_type_24=16 +serdes_if_type_29=16 +serdes_if_type_30=16 +serdes_if_type_31=16 +serdes_if_type_32=16 +serdes_if_type_33=16 +serdes_if_type_34=16 +serdes_if_type_35=16 +serdes_if_type_36=16 +serdes_if_type_41=16 +serdes_if_type_42=16 +serdes_if_type_43=16 +serdes_if_type_44=16 +serdes_if_type_49=16 +serdes_if_type_50=16 +serdes_if_type_51=16 +serdes_if_type_52=16 +serdes_if_type_57=16 +serdes_if_type_58=16 +serdes_if_type_59=16 +serdes_if_type_60=16 +serdes_if_type_61=16 +serdes_if_type_62=16 +serdes_if_type_63=16 +serdes_if_type_64=16 +serdes_if_type_67=16 +serdes_if_type_68=16 +serdes_if_type_69=16 +serdes_if_type_70=16 +serdes_if_type_71=16 +serdes_if_type_72=16 +serdes_if_type_73=16 +serdes_if_type_74=16 +serdes_if_type_87=28 +serdes_if_type_79=28 +serdes_if_type_95=28 +serdes_if_type_99=28 +serdes_if_type_115=28 +serdes_if_type_107=28 +serdes_if_type_123=28 +serdes_if_type_127=28 diff --git a/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/td3-d6356j-48x25G-8x100G.config.bcm b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/td3-d6356j-48x25G-8x100G.config.bcm new file mode 100644 index 00000000000..15981fa5b96 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/INVENTEC-D6356J/td3-d6356j-48x25G-8x100G.config.bcm @@ -0,0 +1,411 @@ +### fix for sonic +led_fw_path=/usr/share/sonic/platform/ +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 +ifp_inports_support_enable=1 +### end fix + + +core_clock_frequency=1525 +dpp_clock_ratio=2:3 +stable_size=0x5500000 +oversubscribe_mode=1 +pbmp_xport_xe=0x488787878808787fdfe1e1e1fe1e1e1fe + + +#portmap_65=130:10 + +### Pipeline0, halfpipe 0 (12x25G + 2x100G) +portmap_1=1:25 +portmap_2=2:25 +portmap_3=3:25 +portmap_4=4:25 +portmap_5=5:25 +portmap_6=6:25 +portmap_7=7:25 +portmap_8=8:25 +portmap_13=13:25 +portmap_14=14:25 +portmap_15=15:25 +portmap_16=16:25 +portmap_21=21:25 +portmap_22=22:25 +portmap_23=23:25 +portmap_24=24:25 +portmap_29=29:25 +portmap_30=30:25 +portmap_31=31:25 +portmap_32=32:25 + +### Pipeline0, halfpipe 1 (12x25G + 2x100G) +portmap_33=33:25 +portmap_34=34:25 +portmap_35=35:25 +portmap_36=36:25 +portmap_41=41:25 +portmap_42=42:25 +portmap_43=43:25 +portmap_44=44:25 +portmap_49=49:25 +portmap_50=50:25 +portmap_51=51:25 +portmap_52=52:25 +portmap_57=57:25 +portmap_58=58:25 +portmap_59=59:25 +portmap_60=60:25 +portmap_61=61:25 +portmap_62=62:25 +portmap_63=63:25 +portmap_64=64:25 + +### Pipeline 1 +### First management port +#portmap_66=129:10:m +### Second management port +#portmap_130=128:10:m +### Loopback port +#portmap_131=131:10 + +### Pipeline 1, halfpipe 0 (12x25G + 2x100G) +portmap_67=65:25 +portmap_68=66:25 +portmap_69=67:25 +portmap_70=68:25 +portmap_71=69:25 +portmap_72=70:25 +portmap_73=71:25 +portmap_74=72:25 +portmap_79=77:100 +portmap_87=85:100 +portmap_95=93:100 + +### Pipeline 1, halfpipe 1 (12x25G + 2x100G) +portmap_99=97:100 +portmap_107=105:100 +portmap_115=113:100 +portmap_123=121:100 +portmap_127=125:100 + +l2_mem_entries=32768 +l3_mem_entries=16384 +fpem_mem_entries=16384 +l2xmsg_mode=1 + +pdma_dv_free_count=64 +pdma_dv_free_size=320 +pdma_descriptor_prefetch_enable=1 + +port_flex_enable=1 + +#dport part +dport_map_port_79=87 +dport_map_port_87=79 +dport_map_port_107=115 +dport_map_port_115=107 + +#Polarity flips after lane swaps +#rx part +#FC1 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 + +#FC3 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 + +#FC5 +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 + +#FC8 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +#FC10 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 + +#FC12 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 + +#FC14 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 + +#FC15 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 + +#FC16 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 + +#FC17 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 + +#FC19 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 + +#FC21 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 + +#FC23 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 + +#FC24 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 + +#FC26 +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 + +#FC28 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +#phy_chain_rx_polarity_flip_physical{114.0}=0x1 + +#FC30 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 + +#FC31 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x1 + +#tx part +#FC19 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 + +#FC21 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 + +#FC23 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 + +#FC24 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 + +#FC26 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 + +#FC28 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_tx_polarity_flip_physical{116.0}=0x1 + +#FC30 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x1 + +#FC31 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 + + +phy_chain_rx_lane_map_physical{1.0}=0x1032 +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{5.0}=0x1032 +phy_chain_tx_lane_map_physical{5.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 + +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x0123 +phy_chain_rx_lane_map_physical{41.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x0123 +phy_chain_rx_lane_map_physical{49.0}=0x1032 +phy_chain_tx_lane_map_physical{49.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x1032 +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{61.0}=0x1032 +phy_chain_tx_lane_map_physical{61.0}=0x0123 + +phy_chain_rx_lane_map_physical{65.0}=0x2301 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x2301 +phy_chain_tx_lane_map_physical{69.0}=0x3210 + +phy_chain_rx_lane_map_physical{85.0}=0x0213 +phy_chain_tx_lane_map_physical{85.0}=0x3120 +phy_chain_rx_lane_map_physical{77.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x1302 + +phy_chain_rx_lane_map_physical{93.0}=0x2031 +phy_chain_tx_lane_map_physical{93.0}=0x1302 +phy_chain_rx_lane_map_physical{97.0}=0x0213 +phy_chain_tx_lane_map_physical{97.0}=0x3120 + +phy_chain_rx_lane_map_physical{113.0}=0x1203 +phy_chain_tx_lane_map_physical{113.0}=0x3120 +phy_chain_rx_lane_map_physical{105.0}=0x2031 +phy_chain_tx_lane_map_physical{105.0}=0x1302 + +phy_chain_rx_lane_map_physical{121.0}=0x2031 +phy_chain_tx_lane_map_physical{121.0}=0x1302 +phy_chain_rx_lane_map_physical{125.0}=0x0213 +phy_chain_tx_lane_map_physical{125.0}=0x3120 + +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 + +# EQ/IDriver +# 25G +serdes_preemphasis_1=0x0F4B0A +serdes_preemphasis_2=0x104A0A +serdes_preemphasis_3=0x0E4C0A +serdes_preemphasis_4=0x0E4C0A +serdes_preemphasis_5=0x0D4D0A +serdes_preemphasis_6=0x0D4D0A +serdes_preemphasis_7=0x0D4D0A +serdes_preemphasis_8=0x0D4D0A +serdes_preemphasis_13=0x0C4E0A +serdes_preemphasis_14=0x0D4D0A +serdes_preemphasis_15=0x0B4F0A +serdes_preemphasis_16=0x0C4E0A +serdes_preemphasis_21=0x0A500A +serdes_preemphasis_22=0x0A500A +serdes_preemphasis_23=0x09510A +serdes_preemphasis_24=0x09510A +serdes_preemphasis_29=0x08520A +serdes_preemphasis_30=0x08520A +serdes_preemphasis_31=0x07530A +serdes_preemphasis_32=0x07530A +serdes_preemphasis_33=0x06540A +serdes_preemphasis_34=0x07530A +serdes_preemphasis_35=0x05550A +serdes_preemphasis_36=0x06540A +serdes_preemphasis_41=0x05550A +serdes_preemphasis_42=0x06540A +serdes_preemphasis_43=0x05550A +serdes_preemphasis_44=0x05550A +serdes_preemphasis_49=0x04560A +serdes_preemphasis_50=0x05550A +serdes_preemphasis_51=0x05550A +serdes_preemphasis_52=0x06540A +serdes_preemphasis_57=0x06540A +serdes_preemphasis_58=0x07530A +serdes_preemphasis_59=0x06540A +serdes_preemphasis_60=0x07530A +serdes_preemphasis_61=0x06540A +serdes_preemphasis_62=0x08520A +serdes_preemphasis_63=0x08520A +serdes_preemphasis_64=0x09510A +serdes_preemphasis_67=0x06540A +serdes_preemphasis_68=0x06540A +serdes_preemphasis_69=0x06540A +serdes_preemphasis_70=0x08520A +serdes_preemphasis_71=0x09510A +serdes_preemphasis_72=0x09510A +serdes_preemphasis_73=0x09510A +serdes_preemphasis_74=0x0A500A +serdes_preemphasis_lane0_87=0x07530A +serdes_preemphasis_lane1_87=0x05550A +serdes_preemphasis_lane2_87=0x07530A +serdes_preemphasis_lane3_87=0x05550A +serdes_preemphasis_79=0x05550A +serdes_preemphasis_95=0x07530A +serdes_preemphasis_lane0_99=0x085309 +serdes_preemphasis_lane1_99=0x0B4F0A +serdes_preemphasis_lane2_99=0x085309 +serdes_preemphasis_lane3_99=0x0B4F0A +serdes_preemphasis_115=0x0B4F0A +serdes_preemphasis_107=0x0B4F0A +serdes_preemphasis_123=0x0B4F0A +serdes_preemphasis_127=0x0D4E09 + +# interface type +serdes_if_type_1=16 +serdes_if_type_2=16 +serdes_if_type_3=16 +serdes_if_type_4=16 +serdes_if_type_5=16 +serdes_if_type_6=16 +serdes_if_type_7=16 +serdes_if_type_8=16 +serdes_if_type_13=16 +serdes_if_type_14=16 +serdes_if_type_15=16 +serdes_if_type_16=16 +serdes_if_type_21=16 +serdes_if_type_22=16 +serdes_if_type_23=16 +serdes_if_type_24=16 +serdes_if_type_29=16 +serdes_if_type_30=16 +serdes_if_type_31=16 +serdes_if_type_32=16 +serdes_if_type_33=16 +serdes_if_type_34=16 +serdes_if_type_35=16 +serdes_if_type_36=16 +serdes_if_type_41=16 +serdes_if_type_42=16 +serdes_if_type_43=16 +serdes_if_type_44=16 +serdes_if_type_49=16 +serdes_if_type_50=16 +serdes_if_type_51=16 +serdes_if_type_52=16 +serdes_if_type_57=16 +serdes_if_type_58=16 +serdes_if_type_59=16 +serdes_if_type_60=16 +serdes_if_type_61=16 +serdes_if_type_62=16 +serdes_if_type_63=16 +serdes_if_type_64=16 +serdes_if_type_67=16 +serdes_if_type_68=16 +serdes_if_type_69=16 +serdes_if_type_70=16 +serdes_if_type_71=16 +serdes_if_type_72=16 +serdes_if_type_73=16 +serdes_if_type_74=16 +serdes_if_type_87=28 +serdes_if_type_79=28 +serdes_if_type_95=28 +serdes_if_type_99=28 +serdes_if_type_115=28 +serdes_if_type_107=28 +serdes_if_type_123=28 +serdes_if_type_127=28 diff --git a/device/inventec/x86_64-inventec_d6356j-r0/custom_led.bin b/device/inventec/x86_64-inventec_d6356j-r0/custom_led.bin new file mode 100755 index 00000000000..90cfecf8e42 Binary files /dev/null and b/device/inventec/x86_64-inventec_d6356j-r0/custom_led.bin differ diff --git a/device/inventec/x86_64-inventec_d6356j-r0/default_sku b/device/inventec/x86_64-inventec_d6356j-r0/default_sku new file mode 100644 index 00000000000..d9b5b87245e --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/default_sku @@ -0,0 +1 @@ +INVENTEC-D6356J t1 diff --git a/device/inventec/x86_64-inventec_d6356j-r0/installer.conf b/device/inventec/x86_64-inventec_d6356j-r0/installer.conf new file mode 100644 index 00000000000..1db64ba02c3 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +VAR_LOG_SIZE=1024 diff --git a/device/inventec/x86_64-inventec_d6356j-r0/led_proc_init.soc b/device/inventec/x86_64-inventec_d6356j-r0/led_proc_init.soc new file mode 100644 index 00000000000..6d9fa922791 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/led_proc_init.soc @@ -0,0 +1,7 @@ +led auto off +led stop +m0 load 0 0x0 /usr/share/sonic/platform/linkscan_led_fw.bin +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +#led auto on +cint /usr/share/sonic/platform/plugins/inv_led_cb.c +led start diff --git a/device/inventec/x86_64-inventec_d6356j-r0/linkscan_led_fw.bin b/device/inventec/x86_64-inventec_d6356j-r0/linkscan_led_fw.bin new file mode 100755 index 00000000000..86cf30e80fb Binary files /dev/null and b/device/inventec/x86_64-inventec_d6356j-r0/linkscan_led_fw.bin differ diff --git a/device/inventec/x86_64-inventec_d6356j-r0/plugins/eeprom.py b/device/inventec/x86_64-inventec_d6356j-r0/plugins/eeprom.py new file mode 100644 index 00000000000..96b2be8e25e --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d6356j +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/2-0055/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/inventec/x86_64-inventec_d6356j-r0/plugins/psuutil.py b/device/inventec/x86_64-inventec_d6356j-r0/plugins/psuutil.py new file mode 100755 index 00000000000..a7d68c2f811 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/plugins/psuutil.py @@ -0,0 +1,88 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + PSU_DIR = "/sys/class/hwmon/hwmon2/device/" + + def __init__(self): + PsuBase.__init__(self) + +# Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + + if index == 1 : + attr_path = "/sys/class/hwmon/hwmon7/device/in1_input" + else : + attr_path = "/sys/class/hwmon/hwmon8/device/in1_input" + + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU status + if (attr_value != "0"): + status = 1 + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + ind = index + attr_file ='psu'+ str(ind) + attr_path = self.PSU_DIR +'/' + attr_file + normal_attr_value = '1:normal' + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU presence + if (attr_value == normal_attr_value): + status = 1 + return status + diff --git a/device/inventec/x86_64-inventec_d6356j-r0/plugins/sfputil.py b/device/inventec/x86_64-inventec_d6356j-r0/plugins/sfputil.py new file mode 100755 index 00000000000..aaa7210d105 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/plugins/sfputil.py @@ -0,0 +1,389 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# +# +# INV_FIX-4037 +# (1) Support get_transceiver_change_event. +# Create the SWPSEventMonitor class to handle any kobject event from the SWPS driver. +# (2) Integrated with the optoe driver +# Due to installing the optoe driver to create the i2c topology, +# it needs to overwrite the followings functions which are declared in the sfputilbase.py. +# First, it needs to impore some SFP-related class object +# +try: + import time + import socket, re,os + from sonic_sfp.sfputilbase import SfpUtilBase + from collections import OrderedDict + from sonic_sfp.sff8472 import sff8472Dom +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +SFP_TEMPE_OFFSET = 96 +SFP_TEMPE_WIDTH = 2 +SFP_VLOT_OFFSET = 98 +SFP_VOLT_WIDTH = 2 +SFP_CHANNL_MON_OFFSET = 100 +SFP_CHANNL_MON_WIDTH = 6 + +NETLINK_KOBJECT_UEVENT = 15 +monitor = None + +class SWPSEventMonitor(object): + + def __init__(self): + self.recieved_events = OrderedDict() + self.socket = socket.socket( + socket.AF_NETLINK, socket.SOCK_DGRAM, NETLINK_KOBJECT_UEVENT) + + def start(self): + self.socket.bind((os.getpid(), -1)) + + def stop(self): + self.socket.close() + + def __enter__(self): + self.start() + return self + + def __exit__(self, exc_type, exc_value, traceback): + self.stop() + + def __iter__(self): + global monitor + while True: + for item in monitor.next_events(): + yield item + + def next_events(self): + data = self.socket.recv(16384) + event = {} + for item in data.split(b'\x00'): + if not item: + # check if we have an event and if we already received it + if event and event['SEQNUM'] not in self.recieved_events: + self.recieved_events[event['SEQNUM']] = None + if (len(self.recieved_events) > 100): + self.recieved_events.popitem(last=False) + yield event + event = {} + else: + try: + k, v = item.split(b'=', 1) + event[k.decode('ascii')] = v.decode('ascii') + except ValueError: + pass + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 55 + PORTS_IN_BLOCK = 56 + QSFP_PORT_START = 48 + QSFP_PORT_END = 55 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0:22, + 1:23, + 2:24, + 3:25, + 4:26, + 5:27, + 6:28, + 7:29, + 8:30, + 9:31, + 10:32, + 11:33, + 12:34, + 13:35, + 14:36, + 15:37, + 16:38, + 17:39, + 18:40, + 19:41, + 20:42, + 21:43, + 22:44, + 23:45, + 24:46, + 25:47, + 26:48, + 27:49, + 28:50, + 29:51, + 30:52, + 31:53, + 32:54, + 33:55, + 34:56, + 35:57, + 36:58, + 37:59, + 38:60, + 39:61, + 40:62, + 41:63, + 42:64, + 43:65, + 44:66, + 45:67, + 46:68, + 47:69, + 48:14, + 49:15, + 50:16, + 51:17, + 52:18, + 53:19, + 54:20, + 55:21 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/bus/i2c/devices/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/class/swps/port"+str(port_num)+"/reset" + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True +# +# INV_FIX-4037 +# (1) Support get_transceiver_change_event. +# Modify get_transceiver_change_event() to listen the SWPS kobject event. +# (2) Integrated with the optoe driver +# Due to installing the optoe driver to create the i2c topology, +# it needs to overwrite the followings functions which are declared in the sfputilbase.py. +# It modified the get_eeprom_dom_raw() and get_transceiver_dom_info_dict(). +# + def get_transceiver_change_event(self): + global monitor + port_dict = {} + with SWPSEventMonitor() as monitor: + for event in monitor: + if event['SUBSYSTEM'] == 'swps': + #print('SWPS event. From %s, ACTION %s, IF_TYPE %s, IF_LANE %s' % (event['DEVPATH'], event['ACTION'], event['IF_TYPE'], event['IF_LANE'])) + portname = event['DEVPATH'].split("/")[-1] + rc = re.match(r"port(?P\d+)",portname) + if rc is not None: + if event['ACTION'] == "remove": + remove_num = int(rc.group("num")) + port_dict[remove_num] = "0" + #port_dict[rc.group("num")] = "0" + if event['ACTION'] == "add": + add_num = int(rc.group("num")) + port_dict[add_num] = "1" + #port_dict[rc.group("num")] = "1" + return True, port_dict + return False, {} + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256) + + def get_transceiver_dom_info_dict(self, port_num): + if port_num in self.qsfp_ports or port_num in self.osfp_ports: + return SfpUtilBase.get_transceiver_dom_info_dict(self, port_num) + else: + transceiver_dom_info_dict = {} + transceiver_dom_info_dict['temperature'] = 'N/A' + transceiver_dom_info_dict['voltage'] = 'N/A' + transceiver_dom_info_dict['rx1power'] = 'N/A' + transceiver_dom_info_dict['rx2power'] = 'N/A' + transceiver_dom_info_dict['rx3power'] = 'N/A' + transceiver_dom_info_dict['rx4power'] = 'N/A' + transceiver_dom_info_dict['tx1bias'] = 'N/A' + transceiver_dom_info_dict['tx2bias'] = 'N/A' + transceiver_dom_info_dict['tx3bias'] = 'N/A' + transceiver_dom_info_dict['tx4bias'] = 'N/A' + transceiver_dom_info_dict['tx1power'] = 'N/A' + transceiver_dom_info_dict['tx2power'] = 'N/A' + transceiver_dom_info_dict['tx3power'] = 'N/A' + transceiver_dom_info_dict['tx4power'] = 'N/A' + + offset = 256 + file_path = self._get_port_eeprom_path(port_num, self.DOM_EEPROM_ADDR) + if not self._sfp_eeprom_present(file_path, 0): + return None + + try: + sysfsfile_eeprom = open(file_path, "rb") + except IOError: + print("Error: reading sysfs file %s" % file_path) + return None + + sfpd_obj = sff8472Dom(None, 1) + if sfpd_obj is None: + return None + + dom_temperature_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + else: + return transceiver_dom_info_dict + + dom_voltage_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_VLOT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + else: + return transceiver_dom_info_dict + + dom_channel_monitor_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + else: + return transceiver_dom_info_dict + + try: + sysfsfile_eeprom.close() + except IOError: + print("Error: closing sysfs file %s" % file_path) + return None + + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RXPower']['value'] + transceiver_dom_info_dict['rx2power'] = 'N/A' + transceiver_dom_info_dict['rx3power'] = 'N/A' + transceiver_dom_info_dict['rx4power'] = 'N/A' + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TXBias']['value'] + transceiver_dom_info_dict['tx2bias'] = 'N/A' + transceiver_dom_info_dict['tx3bias'] = 'N/A' + transceiver_dom_info_dict['tx4bias'] = 'N/A' + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TXPower']['value'] + transceiver_dom_info_dict['tx2power'] = 'N/A' + transceiver_dom_info_dict['tx3power'] = 'N/A' + transceiver_dom_info_dict['tx4power'] = 'N/A' + + return transceiver_dom_info_dict diff --git a/device/inventec/x86_64-inventec_d6356j-r0/pmon_daemon_control.json b/device/inventec/x86_64-inventec_d6356j-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..94592fa8ceb --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/inventec/x86_64-inventec_d6356j-r0/sensors.conf b/device/inventec/x86_64-inventec_d6356j-r0/sensors.conf new file mode 100644 index 00000000000..2e4e5dccdff --- /dev/null +++ b/device/inventec/x86_64-inventec_d6356j-r0/sensors.conf @@ -0,0 +1,112 @@ +# libsensors configuration file +chip "ucd90160-*" + ignore temp1 + +chip "pch_haswell-*" + label temp1 "PCH Temperature" + +chip "tmp75-i2c-*-0048" + label temp1 "CPU Board Temperature" + +chip "tmp75-i2c-*-004a" + label temp1 "FrontSide Temperature" + +chip "tmp75-i2c-*-004e" + label temp1 "NearASIC Temperature" + +chip "tmp75-i2c-*-004d" + label temp1 "RearSide Temperature" + +chip "inv_cpld-i2c-*-77" + label fan1 "FanModule1 Front RPM" + label fan2 "FanModule1 Rear RPM" + label fan3 "FanModule2 Front RPM" + label fan4 "FanModule2 Rear RPM" + label fan5 "FanModule3 Front RPM" + label fan6 "FanModule3 Rear RPM" + label fan7 "FanModule4 Front RPM" + label fan8 "FanModule4 Rear RPM" + label fan9 "FanModule5 Front RPM" + label fan10 "FanModule5 Rear RPM" + label pwm1 "FanModule1 PWM (0-255)" + label pwm2 "FanModule2 PWM (0-255)" + label pwm3 "FanModule3 PWM (0-255)" + label pwm4 "FanModule4 PWM (0-255)" + label pwm5 "FanModule5 PWM (0-255)" + label temp1 "ASIC Temperature" + +chip "inv_psu-i2c-*-005b" + ignore power3 + ignore curr3 + ignore fan2 + label fan1 "PSU1 Fan RPM" + label temp1 "PSU1 Temperature1" + label temp2 "PSU1 Temperature2" + label temp3 "PSU1 Temperature3" + label in1 "PSU1 Input Voltage" + label curr1 "PSU1 Input Current" + label power1 "PSU1 Input Power" + label in2 "PSU1 Output Voltage" + label curr2 "PSU1 Output Current" + label power2 "PSU1 Output Power" + label pwm1 "PSU1 PWM (0-100)" + +chip "inv_psu-i2c-*-005a" + ignore power3 + ignore curr3 + ignore fan2 + label fan1 "PSU2 Fan RPM" + label temp1 "PSU2 Temperature1" + label temp2 "PSU2 Temperature2" + label temp3 "PSU2 Temperature3" + label in1 "PSU2 Input Voltage" + label curr1 "PSU2 Input Current" + label power1 "PSU2 Input Power" + label in2 "PSU2 Output Voltage" + label curr2 "PSU2 Output Current" + label power2 "PSU2 Output Power" + label pwm1 "PSU2 PWM (0-100)" + +chip "inv_psoc-*" + label temp1 "FrontSide Temperature" + label temp2 "FanBoard Temperature" + label temp3 "NearASIC Temperature" + label temp4 "Center Temperature" + + label temp5 "CPU Board Temperature" + label temp6 "ASIC Temperature" + label temp7 "PSU1 Temperature1" + label temp8 "PSU2 Temperature1" + label temp9 "PSU1 Temperature2" + label temp10 "PSU2 Temperature2" + label fan1 "FanModule1 Front RPM" + label fan2 "FanModule1 Rear RPM" + label fan3 "FanModule2 Front RPM" + label fan4 "FanModule2 Rear RPM" + label fan5 "FanModule3 Front RPM" + label fan6 "FanModule3 Rear RPM" + label fan7 "FanModule4 Front RPM" + label fan8 "FanModule4 Rear RPM" + label fan9 "FanModule5 Front RPM" + label fan10 "FanModule5 Rear RPM" + label pwm1 "FanModule1 PWM" + label pwm2 "FanModule2 PWM" + label pwm3 "FanModule3 PWM" + label pwm4 "FanModule4 PWM" + label pwm5 "FanModule5 PWM" + label pwm6 "PSU1 FAN PWM" + label pwm7 "PSU2 FAN PWM" + label fan11 "PSU1 FAN RPM" + label fan12 "PSU2 FAN RPM" + label in1 "PSU1 Input Voltage" + label in2 "PSU2 Input Voltage" + label curr1 "PSU1 Input Current" + label curr2 "PSU2 Input Current" + label power1 "PSU1 Input Power" + label power2 "PSU2 Input Power" + label in3 "PSU1 Output Voltage" + label in4 "PSU2 Output Voltage" + label curr3 "PSU1 Output Current" + label curr4 "PSU2 Output Current" + label power3 "PSU1 Output Power" + label power4 "PSU2 Output Power" diff --git a/device/inventec/x86_64-inventec_d6556-r0/INVENTEC-D6556/port_config.ini b/device/inventec/x86_64-inventec_d6556-r0/INVENTEC-D6556/port_config.ini new file mode 100644 index 00000000000..4af8faabf67 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/INVENTEC-D6556/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias +Ethernet0 1 Ethernet0 +Ethernet4 2 Ethernet4 +Ethernet8 3 Ethernet8 +Ethernet12 4 Ethernet12 +Ethernet16 5 Ethernet16 +Ethernet20 6 Ethernet20 +Ethernet24 7 Ethernet24 +Ethernet28 8 Ethernet28 +Ethernet32 13 Ethernet32 +Ethernet36 14 Ethernet36 +Ethernet40 15 Ethernet40 +Ethernet44 16 Ethernet44 +Ethernet48 21 Ethernet48 +Ethernet52 22 Ethernet52 +Ethernet56 23 Ethernet56 +Ethernet60 24 Ethernet60 +Ethernet64 29 Ethernet64 +Ethernet68 30 Ethernet68 +Ethernet72 31 Ethernet72 +Ethernet76 32 Ethernet76 +Ethernet80 33 Ethernet80 +Ethernet84 34 Ethernet84 +Ethernet88 35 Ethernet88 +Ethernet92 36 Ethernet92 +Ethernet96 41 Ethernet96 +Ethernet100 42 Ethernet100 +Ethernet104 43 Ethernet104 +Ethernet108 44 Ethernet108 +Ethernet112 49 Ethernet112 +Ethernet116 50 Ethernet116 +Ethernet120 51 Ethernet120 +Ethernet124 52 Ethernet124 +Ethernet128 57 Ethernet128 +Ethernet132 58 Ethernet132 +Ethernet136 59 Ethernet136 +Ethernet140 60 Ethernet140 +Ethernet144 61 Ethernet144 +Ethernet148 62 Ethernet148 +Ethernet152 63 Ethernet152 +Ethernet156 64 Ethernet156 +Ethernet160 65 Ethernet160 +Ethernet164 66 Ethernet164 +Ethernet168 67 Ethernet168 +Ethernet172 68 Ethernet172 +Ethernet176 69 Ethernet176 +Ethernet180 70 Ethernet180 +Ethernet184 71 Ethernet184 +Ethernet188 72 Ethernet188 +Ethernet192 77,78,79,80 Ethernet192 +Ethernet196 85,86,87,88 Ethernet196 +Ethernet200 93,94,95,96 Ethernet200 +Ethernet204 97,98,99,100 Ethernet204 +Ethernet208 105,106,107,108 Ethernet208 +Ethernet212 113,114,115,116 Ethernet212 +Ethernet216 121,122,123,124 Ethernet216 +Ethernet220 125,126,127,128 Ethernet220 diff --git a/device/inventec/x86_64-inventec_d6556-r0/INVENTEC-D6556/sai.profile b/device/inventec/x86_64-inventec_d6556-r0/INVENTEC-D6556/sai.profile new file mode 100644 index 00000000000..6f0bf54024a --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/INVENTEC-D6556/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-d6556-48x25G-8x100G.config.bcm.inventec +SAI_NUM_ECMP_MEMBERS=32 diff --git a/device/inventec/x86_64-inventec_d6556-r0/installer.conf b/device/inventec/x86_64-inventec_d6556-r0/installer.conf new file mode 100644 index 00000000000..1db64ba02c3 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +VAR_LOG_SIZE=1024 diff --git a/device/inventec/x86_64-inventec_d6556-r0/led_proc_init.soc b/device/inventec/x86_64-inventec_d6556-r0/led_proc_init.soc new file mode 100644 index 00000000000..d4c2fde64f9 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/led_proc_init.soc @@ -0,0 +1,6 @@ +led auto off +led stop +m0 load 0 0x0 /usr/share/sonic/platform/linkscan_led_fw.bin +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +led auto on +led start diff --git a/device/inventec/x86_64-inventec_d6556-r0/minigraph.xml b/device/inventec/x86_64-inventec_d6556-r0/minigraph.xml new file mode 100644 index 00000000000..50b3a05cfcc --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/minigraph.xml @@ -0,0 +1,144 @@ + + + + + + OCPSCH0104001MS + 10.10.1.26 + SONiC-Inventec-d6556 + 10.10.1.25 + 1 + 10 + 3 + + + OCPSCH0104002MS + 10.10.2.26 + SONiC-Inventec-d6556 + 10.10.2.25 + 1 + 10 + 3 + + + + + 64536 + SONiC-Inventec-d6556 + + +
10.10.1.26
+ + + + +
10.10.2.26
+ + + + + + + + 64542 + OCPSCH0104001MS + + + + 64543 + OCPSCH0104002MS + + + + + + + + + + HostIP + Loopback0 + + 100.0.0.9/32 + + 100.0.0.9/32 + + + + + + + + SONiC-Inventec-d6556 + + + + + + Ethernet0 + 10.10.1.25/30 + + + + Ethernet4 + 10.10.2.25/30 + + + + + + + + + + + + DeviceInterfaceLink + OCPSCH0104001MS + Ethernet24 + SONiC-Inventec-d6556 + Ethernet0 + + + DeviceInterfaceLink + OCPSCH0104002MS + Ethernet24 + SONiC-Inventec-d6556 + Ethernet4 + + + + + SONiC-Inventec-d6556 + INVENTEC-D6556 + + + + + + + SONiC-Inventec-d6556 + + + DhcpResources + + + + + NtpResources + + 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org + + + SyslogResources + + + + + + + + + SONiC-Inventec-d6556 + INVENTEC-D6556 + diff --git a/device/inventec/x86_64-inventec_d6556-r0/plugins/eeprom.py b/device/inventec/x86_64-inventec_d6556-r0/plugins/eeprom.py new file mode 100644 index 00000000000..de5c24ba0e6 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7032q28b +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/inventec/x86_64-inventec_d6556-r0/plugins/psuutil.py b/device/inventec/x86_64-inventec_d6556-r0/plugins/psuutil.py new file mode 100644 index 00000000000..855162f63b9 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/plugins/psuutil.py @@ -0,0 +1,84 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + PSU_DIR = "/sys/class/hwmon/hwmon1" + + def __init__(self): + PsuBase.__init__(self) + +# Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psoc_psu'+ str(index) + '_iout' + attr_path = self.PSU_DIR +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU status + if (attr_value != 0): + status = 1 + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + ind = index-1 + attr_file ='psu'+ str(ind) + attr_path = self.PSU_DIR +'/' + attr_file + normal_attr_value = '0 : normal' + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU presence + if (attr_value == normal_attr_value): + status = 1 + return status diff --git a/device/inventec/x86_64-inventec_d6556-r0/plugins/sfputil.py b/device/inventec/x86_64-inventec_d6556-r0/plugins/sfputil.py new file mode 100644 index 00000000000..155b956827f --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/plugins/sfputil.py @@ -0,0 +1,211 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 55 + PORTS_IN_BLOCK = 56 + QSFP_PORT_START = 48 + QSFP_PORT_END = 55 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0: 18, + 1: 19, + 2: 20, + 3: 21, + 4: 22, + 5: 23, + 6: 24, + 7: 25, + 8: 26, + 9: 27, + 10: 28, + 11: 29, + 12: 30, + 13: 31, + 14: 32, + 15: 33, + 16: 34, + 17: 35, + 18: 36, + 19: 37, + 20: 38, + 21: 39, + 22: 40, + 23: 41, + 24: 42, + 25: 43, + 26: 44, + 27: 45, + 28: 46, + 29: 47, + 30: 48, + 31: 49, + 32: 50, + 33: 51, + 34: 52, + 35: 53, + 36: 54, + 37: 55, + 38: 56, + 39: 57, + 40: 58, + 41: 59, + 42: 60, + 43: 61, + 44: 62, + 45: 63, + 46: 64, + 47: 65, + 48: 10, + 49: 11, + 50: 12, + 51: 13, + 52: 14, + 53: 15, + 54: 16, + 55: 17 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/bus/i2c/devices/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/class/swps/port"+str(port_num)+"/reset" + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True diff --git a/device/inventec/x86_64-inventec_d6556-r0/sensors.conf b/device/inventec/x86_64-inventec_d6556-r0/sensors.conf new file mode 100644 index 00000000000..98a8e59b915 --- /dev/null +++ b/device/inventec/x86_64-inventec_d6556-r0/sensors.conf @@ -0,0 +1,44 @@ +# libsensors configuration file +chip "inv_psoc-*" + label temp1 "FrontSide Temperature" + label temp2 "FanBoard Temperature" + label temp3 "NearASIC Temperature" + label temp4 "Center Temperature" + + label temp5 "CPU Board Temperature" + label temp6 "ASIC Temperature" + label temp7 "PSU1 Temperature1" + label temp8 "PSU2 Temperature1" + label temp9 "PSU1 Temperature2" + label temp10 "PSU2 Temperature2" + label fan1 "FanModule1 Front RPM" + label fan2 "FanModule1 Rear RPM" + label fan3 "FanModule2 Front RPM" + label fan4 "FanModule2 Rear RPM" + label fan5 "FanModule3 Front RPM" + label fan6 "FanModule3 Rear RPM" + label fan7 "FanModule4 Front RPM" + label fan8 "FanModule4 Rear RPM" + label fan9 "FanModule5 Front RPM" + label fan10 "FanModule5 Rear RPM" + label pwm1 "FanModule1 PWM" + label pwm2 "FanModule2 PWM" + label pwm3 "FanModule3 PWM" + label pwm4 "FanModule4 PWM" + label pwm5 "FanModule5 PWM" + label pwm6 "PSU1 FAN PWM" + label pwm7 "PSU2 FAN PWM" + label fan11 "PSU1 FAN RPM" + label fan12 "PSU2 FAN RPM" + label in1 "PSU1 Input Voltage" + label in2 "PSU2 Input Voltage" + label curr1 "PSU1 Input Current" + label curr2 "PSU2 Input Current" + label power1 "PSU1 Input Power" + label power2 "PSU2 Input Power" + label in3 "PSU1 Output Voltage" + label in4 "PSU2 Output Voltage" + label curr3 "PSU1 Output Current" + label curr4 "PSU2 Output Current" + label power3 "PSU1 Output Power" + label power4 "PSU2 Output Power" diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/buffers.json.j2 b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/buffers.json.j2 new file mode 100644 index 00000000000..864e3bd9870 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/buffers.json.j2 @@ -0,0 +1,128 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_speed = '100G' %} +{% set default_ports_num = 32 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "CABLE_LENGTH": { + "AZURE": { + {% for port in PORT %} + {% set cable = cable_length(port) -%} + "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %} + + {% endfor %} + } + }, + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "6000000", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "8072396", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"18432", + "xoff":"40560", + "size":"41808", + "dynamic_th":"-4", + "xon_offset":"2496" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"6000000" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/port_config.ini b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/port_config.ini new file mode 100644 index 00000000000..9b41dd7f601 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias +Ethernet0 1,2,3,4 Ethernet0 +Ethernet4 5,6,7,8 Ethernet4 +Ethernet8 9,10,11,12 Ethernet8 +Ethernet12 13,14,15,16 Ethernet12 +Ethernet16 17,18,19,20 Ethernet16 +Ethernet20 21,22,23,24 Ethernet20 +Ethernet24 25,26,27,28 Ethernet24 +Ethernet28 29,30,31,32 Ethernet28 +Ethernet32 33,34,35,36 Ethernet32 +Ethernet36 37,38,39,40 Ethernet36 +Ethernet40 41,42,43,44 Ethernet40 +Ethernet44 45,46,47,48 Ethernet44 +Ethernet48 49,50,51,52 Ethernet48 +Ethernet52 53,54,55,56 Ethernet52 +Ethernet56 57,58,59,60 Ethernet56 +Ethernet60 61,62,63,64 Ethernet60 +Ethernet64 65,66,67,68 Ethernet64 +Ethernet68 69,70,71,72 Ethernet68 +Ethernet72 73,74,75,76 Ethernet72 +Ethernet76 77,78,79,80 Ethernet76 +Ethernet80 81,82,83,84 Ethernet80 +Ethernet84 85,86,87,88 Ethernet84 +Ethernet88 89,90,91,92 Ethernet88 +Ethernet92 93,94,95,96 Ethernet92 +Ethernet96 97,98,99,100 Ethernet96 +Ethernet100 101,102,103,104 Ethernet100 +Ethernet104 105,106,107,108 Ethernet104 +Ethernet108 109,110,111,112 Ethernet108 +Ethernet112 113,114,115,116 Ethernet112 +Ethernet116 117,118,119,120 Ethernet116 +Ethernet120 121,122,123,124 Ethernet120 +Ethernet124 125,126,127,128 Ethernet124 diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/qos.json b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/qos.json new file mode 100644 index 00000000000..926911ab59d --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/qos.json @@ -0,0 +1,143 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable": "3,4" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"312000", + "red_min_threshold":"104000", + "yellow_max_threshold":"312000", + "yellow_min_threshold":"104000", + "green_max_threshold":"312000", + "green_min_threshold":"104000" + } + }, + "QUEUE": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0" : { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|1" : { + "scheduler" : "[SCHEDULER|scheduler.2]" + } + } +} diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/sai.profile b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/sai.profile new file mode 100644 index 00000000000..acd7f903486 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-d7032q28b-32x100g.config.bcm +SAI_NUM_ECMP_MEMBERS=32 diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/th-d7032q28b-32x100g.config.bcm b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/th-d7032q28b-32x100g.config.bcm new file mode 100644 index 00000000000..61315843163 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/th-d7032q28b-32x100g.config.bcm @@ -0,0 +1,290 @@ +# Redwood BCM Shell config / all 100G 32 ports + +# Define default OS / SAL +os=unix + +l2_mem_entries=8192 +l3_mem_entries=8192 +l3_alpm_enable=2 +#ipv6_lpm_128b_enable=1 +l2xmsg_mode=1 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +# per Broadcom feedback, no more pbmp_oversubscribe +# pbmp_oversubscribe=0x00003fc000000ff0000003fc000001fe +oversubscribe_mode=1 +pbmp_xport_xe=0x3fd000000ff4000003fc000001fe + +# EagleCore ports +portmap_66=129:10 +portmap_100=131:10 + +# Loopback ports +portmap_33=132:10 +portmap_67=133:10 +portmap_101=134:10 +portmap_135=135:10 + +portmap_68=65:100 +portmap_69=69:100 +portmap_70=73:100 +portmap_71=77:100 +portmap_72=81:100 +portmap_73=85:100 +portmap_74=89:100 +portmap_75=93:100 + +portmap_102=97:100 +portmap_103=101:100 +portmap_104=105:100 +portmap_105=109:100 +portmap_106=113:100 +portmap_107=117:100 +portmap_108=121:100 +portmap_109=125:100 + +portmap_1=1:100 +portmap_2=5:100 +portmap_3=9:100 +portmap_4=13:100 +portmap_5=17:100 +portmap_6=21:100 +portmap_7=25:100 +portmap_8=29:100 + +portmap_34=33:100 +portmap_35=37:100 +portmap_36=41:100 +portmap_37=45:100 +portmap_38=49:100 +portmap_39=53:100 +portmap_40=57:100 +portmap_41=61:100 + +phy_xaui_tx_polarity_flip_ce0=0x8 +phy_xaui_tx_polarity_flip_ce1=0x6 +phy_xaui_tx_polarity_flip_ce2=0x6 +phy_xaui_tx_polarity_flip_ce3=0x6 +phy_xaui_tx_polarity_flip_ce4=0x3 +phy_xaui_tx_polarity_flip_ce5=0x4 +phy_xaui_tx_polarity_flip_ce6=0xc +phy_xaui_tx_polarity_flip_ce7=0x6 +phy_xaui_tx_polarity_flip_ce8=0xc +phy_xaui_tx_polarity_flip_ce9=0x3 +phy_xaui_tx_polarity_flip_ce10=0x3 +phy_xaui_tx_polarity_flip_ce11=0x3 +phy_xaui_tx_polarity_flip_ce12=0x4 +phy_xaui_tx_polarity_flip_ce13=0x1 +phy_xaui_tx_polarity_flip_ce14=0x2 +phy_xaui_tx_polarity_flip_ce15=0x3 +phy_xaui_tx_polarity_flip_ce16=0x2 +phy_xaui_tx_polarity_flip_ce17=0x3 +phy_xaui_tx_polarity_flip_ce18=0x2 +phy_xaui_tx_polarity_flip_ce19=0x8 +phy_xaui_tx_polarity_flip_ce20=0x2 +phy_xaui_tx_polarity_flip_ce21=0x9 +phy_xaui_tx_polarity_flip_ce22=0x8 +phy_xaui_tx_polarity_flip_ce23=0x9 +phy_xaui_tx_polarity_flip_ce24=0x2 +phy_xaui_tx_polarity_flip_ce25=0x4 +phy_xaui_tx_polarity_flip_ce26=0xd +phy_xaui_tx_polarity_flip_ce27=0xc +phy_xaui_tx_polarity_flip_ce28=0x3 +phy_xaui_tx_polarity_flip_ce29=0xc +phy_xaui_tx_polarity_flip_ce30=0xc +phy_xaui_tx_polarity_flip_ce31=0x2 + +phy_xaui_rx_polarity_flip_ce0=0xb +phy_xaui_rx_polarity_flip_ce1=0xc +phy_xaui_rx_polarity_flip_ce2=0xc +phy_xaui_rx_polarity_flip_ce3=0xc +phy_xaui_rx_polarity_flip_ce4=0x1 +phy_xaui_rx_polarity_flip_ce5=0xc +phy_xaui_rx_polarity_flip_ce6=0x4 +phy_xaui_rx_polarity_flip_ce7=0xc +phy_xaui_rx_polarity_flip_ce8=0xb +phy_xaui_rx_polarity_flip_ce9=0x6 +phy_xaui_rx_polarity_flip_ce10=0x1 +phy_xaui_rx_polarity_flip_ce11=0x8 +phy_xaui_rx_polarity_flip_ce12=0xc +phy_xaui_rx_polarity_flip_ce13=0x6 +phy_xaui_rx_polarity_flip_ce14=0x4 +phy_xaui_rx_polarity_flip_ce15=0xe +phy_xaui_rx_polarity_flip_ce16=0xe +phy_xaui_rx_polarity_flip_ce17=0x2 +phy_xaui_rx_polarity_flip_ce18=0x4 +phy_xaui_rx_polarity_flip_ce19=0x6 +phy_xaui_rx_polarity_flip_ce20=0xe +phy_xaui_rx_polarity_flip_ce21=0x3 +phy_xaui_rx_polarity_flip_ce22=0x3 +phy_xaui_rx_polarity_flip_ce23=0x3 +phy_xaui_rx_polarity_flip_ce24=0xb +phy_xaui_rx_polarity_flip_ce25=0xc +phy_xaui_rx_polarity_flip_ce26=0xe +phy_xaui_rx_polarity_flip_ce27=0xc +phy_xaui_rx_polarity_flip_ce28=0xb +phy_xaui_rx_polarity_flip_ce29=0x9 +phy_xaui_rx_polarity_flip_ce30=0x6 +phy_xaui_rx_polarity_flip_ce31=0x9 + +# EQ/iDriver +serdes_preemphasis_1=0x323E00 +serdes_preemphasis_2=0x323E00 +serdes_preemphasis_3=0x323E00 +serdes_preemphasis_4=0x323E00 + +serdes_preemphasis_5=0x323E00 +serdes_preemphasis_6=0x323E00 +serdes_preemphasis_7=0x323E00 +serdes_preemphasis_8=0x323E00 + +serdes_preemphasis_9=0x343C00 +serdes_preemphasis_10=0x343C00 +serdes_preemphasis_11=0x343C00 +serdes_preemphasis_12=0x343C00 + +serdes_preemphasis_13=0x343C00 +serdes_preemphasis_14=0x343C00 +serdes_preemphasis_15=0x343C00 +serdes_preemphasis_16=0x343C00 + +serdes_preemphasis_17=0x323E00 +serdes_preemphasis_18=0x323E00 +serdes_preemphasis_19=0x323E00 +serdes_preemphasis_20=0x323E00 + +serdes_preemphasis_21=0x323E00 +serdes_preemphasis_22=0x323E00 +serdes_preemphasis_23=0x323E00 +serdes_preemphasis_24=0x323E00 + +serdes_preemphasis_25=0x304000 +serdes_preemphasis_26=0x304000 +serdes_preemphasis_27=0x304000 +serdes_preemphasis_28=0x304000 + +serdes_preemphasis_29=0x304000 +serdes_preemphasis_30=0x304000 +serdes_preemphasis_31=0x304000 +serdes_preemphasis_32=0x304000 + +serdes_preemphasis_34=0x2D4300 +serdes_preemphasis_35=0x2D4300 +serdes_preemphasis_36=0x2D4300 +serdes_preemphasis_37=0x2D4300 + +serdes_preemphasis_38=0x2D4300 +serdes_preemphasis_39=0x2D4300 +serdes_preemphasis_40=0x2D4300 +serdes_preemphasis_41=0x2D4300 + +serdes_preemphasis_42=0x2B4500 +serdes_preemphasis_43=0x2B4500 +serdes_preemphasis_44=0x2B4500 +serdes_preemphasis_45=0x2B4500 + +serdes_preemphasis_46=0x2B4500 +serdes_preemphasis_47=0x2B4500 +serdes_preemphasis_48=0x2B4500 +serdes_preemphasis_49=0x2B4500 + +serdes_preemphasis_50=0x2B4500 +serdes_preemphasis_51=0x2B4500 +serdes_preemphasis_52=0x2B4500 +serdes_preemphasis_53=0x2B4500 + +serdes_preemphasis_54=0x284800 +serdes_preemphasis_55=0x284800 +serdes_preemphasis_56=0x284800 +serdes_preemphasis_57=0x284800 + +serdes_preemphasis_58=0x2B4500 +serdes_preemphasis_59=0x2B4500 +serdes_preemphasis_60=0x2B4500 +serdes_preemphasis_61=0x2B4500 + +serdes_preemphasis_62=0x2B4500 +serdes_preemphasis_63=0x2B4500 +serdes_preemphasis_64=0x2B4500 +serdes_preemphasis_65=0x2B4500 + +serdes_preemphasis_68=0x284800 +serdes_preemphasis_69=0x284800 +serdes_preemphasis_70=0x284800 +serdes_preemphasis_71=0x284800 + +serdes_preemphasis_72=0x284800 +serdes_preemphasis_73=0x284800 +serdes_preemphasis_74=0x284800 +serdes_preemphasis_75=0x284800 + +serdes_preemphasis_76=0x284800 +serdes_preemphasis_77=0x284800 +serdes_preemphasis_78=0x284800 +serdes_preemphasis_79=0x284800 + +serdes_preemphasis_80=0x2A4600 +serdes_preemphasis_81=0x2A4600 +serdes_preemphasis_82=0x2A4600 +serdes_preemphasis_83=0x2A4600 + +serdes_preemphasis_84=0x2B4500 +serdes_preemphasis_85=0x2B4500 +serdes_preemphasis_86=0x2B4500 +serdes_preemphasis_87=0x2B4500 + +serdes_preemphasis_88=0x2A4600 +serdes_preemphasis_89=0x2A4600 +serdes_preemphasis_90=0x2A4600 +serdes_preemphasis_91=0x2A4600 + +serdes_preemphasis_92=0x2B4500 +serdes_preemphasis_93=0x2B4500 +serdes_preemphasis_94=0x2B4500 +serdes_preemphasis_95=0x2B4500 + +serdes_preemphasis_96=0x2B4500 +serdes_preemphasis_97=0x2B4500 +serdes_preemphasis_98=0x2B4500 +serdes_preemphasis_99=0x2B4500 + +serdes_preemphasis_102=0x2B4500 +serdes_preemphasis_103=0x2B4500 +serdes_preemphasis_104=0x2B4500 +serdes_preemphasis_105=0x2B4500 + +serdes_preemphasis_106=0x2B4500 +serdes_preemphasis_107=0x2B4500 +serdes_preemphasis_108=0x2B4500 +serdes_preemphasis_109=0x2B4500 + +serdes_preemphasis_110=0x2D4300 +serdes_preemphasis_111=0x2D4300 +serdes_preemphasis_112=0x2D4300 +serdes_preemphasis_113=0x2D4300 + +serdes_preemphasis_114=0x304000 +serdes_preemphasis_115=0x304000 +serdes_preemphasis_116=0x304000 +serdes_preemphasis_117=0x304000 + +serdes_preemphasis_118=0x304000 +serdes_preemphasis_119=0x304000 +serdes_preemphasis_120=0x304000 +serdes_preemphasis_121=0x304000 + +serdes_preemphasis_122=0x304000 +serdes_preemphasis_123=0x304000 +serdes_preemphasis_124=0x304000 +serdes_preemphasis_125=0x304000 + +serdes_preemphasis_126=0x343C00 +serdes_preemphasis_127=0x343C00 +serdes_preemphasis_128=0x343C00 +serdes_preemphasis_129=0x343C00 + +serdes_preemphasis_130=0x343C00 +serdes_preemphasis_131=0x343C00 +serdes_preemphasis_132=0x343C00 +serdes_preemphasis_133=0x343C00 diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/th-d7032q28b-32x40g.config.bcm b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/th-d7032q28b-32x40g.config.bcm new file mode 100644 index 00000000000..03d0bb06cb0 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/INVENTEC-D7032Q28B-C32/th-d7032q28b-32x40g.config.bcm @@ -0,0 +1,427 @@ +# Redwood BCM Shell config / all 100G 32 ports + +# Define default OS / SAL +os=unix + +l2_mem_entries=8192 +l3_mem_entries=8192 +l3_alpm_enable=2 +#ipv6_lpm_128b_enable=1 +l2xmsg_mode=1 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +# per Broadcom feedback, no more pbmp_oversubscribe +# pbmp_oversubscribe=0x00003fc000000ff0000003fc000001fe +oversubscribe_mode=1 +pbmp_xport_xe=0x3fd000000ff4000003fc000001fe + +# EagleCore ports +portmap_66=129:10 +portmap_100=131:10 + +# Loopback ports +portmap_33=132:10 +portmap_67=133:10 +portmap_101=134:10 +portmap_135=135:10 + +portmap_68=65:40 +portmap_69=69:40 +portmap_70=73:40 +portmap_71=77:40 +portmap_72=81:40 +portmap_73=85:40 +portmap_74=89:40 +portmap_75=93:40 + +portmap_102=97:40 +portmap_103=101:40 +portmap_104=105:40 +portmap_105=109:40 +portmap_106=113:40 +portmap_107=117:40 +portmap_108=121:40 +portmap_109=125:40 + +portmap_1=1:40 +portmap_2=5:40 +portmap_3=9:40 +portmap_4=13:40 +portmap_5=17:40 +portmap_6=21:40 +portmap_7=25:40 +portmap_8=29:40 + +portmap_34=33:40 +portmap_35=37:40 +portmap_36=41:40 +portmap_37=45:40 +portmap_38=49:40 +portmap_39=53:40 +portmap_40=57:40 +portmap_41=61:40 + +phy_xaui_tx_polarity_flip_xe0=0x8 +phy_xaui_tx_polarity_flip_xe1=0x6 +phy_xaui_tx_polarity_flip_xe2=0x6 +phy_xaui_tx_polarity_flip_xe3=0x6 +phy_xaui_tx_polarity_flip_xe4=0x3 +phy_xaui_tx_polarity_flip_xe5=0x4 +phy_xaui_tx_polarity_flip_xe6=0xc +phy_xaui_tx_polarity_flip_xe7=0x6 +phy_xaui_tx_polarity_flip_xe8=0xc +phy_xaui_tx_polarity_flip_xe9=0x3 +phy_xaui_tx_polarity_flip_xe10=0x3 +phy_xaui_tx_polarity_flip_xe11=0x3 +phy_xaui_tx_polarity_flip_xe12=0x4 +phy_xaui_tx_polarity_flip_xe13=0x1 +phy_xaui_tx_polarity_flip_xe14=0x2 +phy_xaui_tx_polarity_flip_xe15=0x3 +phy_xaui_tx_polarity_flip_xe16=0x2 +phy_xaui_tx_polarity_flip_xe17=0x3 +phy_xaui_tx_polarity_flip_xe18=0x2 +phy_xaui_tx_polarity_flip_xe19=0x8 +phy_xaui_tx_polarity_flip_xe20=0x2 +phy_xaui_tx_polarity_flip_xe21=0x9 +phy_xaui_tx_polarity_flip_xe22=0x8 +phy_xaui_tx_polarity_flip_xe23=0x9 +phy_xaui_tx_polarity_flip_xe24=0x2 +phy_xaui_tx_polarity_flip_xe25=0x4 +phy_xaui_tx_polarity_flip_xe26=0xd +phy_xaui_tx_polarity_flip_xe27=0xc +phy_xaui_tx_polarity_flip_xe28=0x3 +phy_xaui_tx_polarity_flip_xe29=0xc +phy_xaui_tx_polarity_flip_xe30=0xc +phy_xaui_tx_polarity_flip_xe31=0x2 + +phy_xaui_rx_polarity_flip_xe0=0xb +phy_xaui_rx_polarity_flip_xe1=0xc +phy_xaui_rx_polarity_flip_xe2=0xc +phy_xaui_rx_polarity_flip_xe3=0xc +phy_xaui_rx_polarity_flip_xe4=0x1 +phy_xaui_rx_polarity_flip_xe5=0xc +phy_xaui_rx_polarity_flip_xe6=0x4 +phy_xaui_rx_polarity_flip_xe7=0xc +phy_xaui_rx_polarity_flip_xe8=0xb +phy_xaui_rx_polarity_flip_xe9=0x6 +phy_xaui_rx_polarity_flip_xe10=0x1 +phy_xaui_rx_polarity_flip_xe11=0x8 +phy_xaui_rx_polarity_flip_xe12=0xc +phy_xaui_rx_polarity_flip_xe13=0x6 +phy_xaui_rx_polarity_flip_xe14=0x4 +phy_xaui_rx_polarity_flip_xe15=0xe +phy_xaui_rx_polarity_flip_xe16=0xe +phy_xaui_rx_polarity_flip_xe17=0x2 +phy_xaui_rx_polarity_flip_xe18=0x4 +phy_xaui_rx_polarity_flip_xe19=0x6 +phy_xaui_rx_polarity_flip_xe20=0xe +phy_xaui_rx_polarity_flip_xe21=0x3 +phy_xaui_rx_polarity_flip_xe22=0x3 +phy_xaui_rx_polarity_flip_xe23=0x3 +phy_xaui_rx_polarity_flip_xe24=0xb +phy_xaui_rx_polarity_flip_xe25=0xc +phy_xaui_rx_polarity_flip_xe26=0xe +phy_xaui_rx_polarity_flip_xe27=0xc +phy_xaui_rx_polarity_flip_xe28=0xb +phy_xaui_rx_polarity_flip_xe29=0x9 +phy_xaui_rx_polarity_flip_xe30=0x6 +phy_xaui_rx_polarity_flip_xe31=0x9 + +# EQ/iDriver +# 0 ~ 5 +serdes_preemphasis_1=0x1E5200 +serdes_preemphasis_2=0x1E5200 +serdes_preemphasis_3=0x1E5200 +serdes_preemphasis_4=0x1E5200 +serdes_driver_current_1=0x000001 +serdes_driver_current_2=0x000001 +serdes_driver_current_3=0x000001 +serdes_driver_current_4=0x000001 + +serdes_preemphasis_5=0x1E5200 +serdes_preemphasis_6=0x1E5200 +serdes_preemphasis_7=0x1E5200 +serdes_preemphasis_8=0x1E5200 +serdes_driver_current_5=0x000001 +serdes_driver_current_6=0x000001 +serdes_driver_current_7=0x000001 +serdes_driver_current_8=0x000001 + +serdes_preemphasis_9=0x1E5200 +serdes_preemphasis_10=0x1E5200 +serdes_preemphasis_11=0x1E5200 +serdes_preemphasis_12=0x1E5200 +serdes_driver_current_9=0x000001 +serdes_driver_current_10=0x000001 +serdes_driver_current_11=0x000001 +serdes_driver_current_12=0x000001 + +serdes_preemphasis_13=0x1E5200 +serdes_preemphasis_14=0x1E5200 +serdes_preemphasis_15=0x1E5200 +serdes_preemphasis_16=0x1E5200 +serdes_driver_current_13=0x000001 +serdes_driver_current_14=0x000001 +serdes_driver_current_15=0x000001 +serdes_driver_current_16=0x000001 + +serdes_preemphasis_17=0x1E5200 +serdes_preemphasis_18=0x1E5200 +serdes_preemphasis_19=0x1E5200 +serdes_preemphasis_20=0x1E5200 +serdes_driver_current_17=0x000001 +serdes_driver_current_18=0x000001 +serdes_driver_current_19=0x000001 +serdes_driver_current_20=0x000001 + +serdes_preemphasis_21=0x1E5200 +serdes_preemphasis_22=0x1E5200 +serdes_preemphasis_23=0x1E5200 +serdes_preemphasis_24=0x1E5200 +serdes_driver_current_21=0x000001 +serdes_driver_current_22=0x000001 +serdes_driver_current_23=0x000001 +serdes_driver_current_24=0x000001 + +# 6 ~ 11 +serdes_preemphasis_25=0x1A5600 +serdes_preemphasis_26=0x1A5600 +serdes_preemphasis_27=0x1A5600 +serdes_preemphasis_28=0x1A5600 +serdes_driver_current_25=0x000001 +serdes_driver_current_26=0x000001 +serdes_driver_current_27=0x000001 +serdes_driver_current_28=0x000001 + +serdes_preemphasis_29=0x1A5600 +serdes_preemphasis_30=0x1A5600 +serdes_preemphasis_31=0x1A5600 +serdes_preemphasis_32=0x1A5600 +serdes_driver_current_29=0x000001 +serdes_driver_current_30=0x000001 +serdes_driver_current_31=0x000001 +serdes_driver_current_32=0x000001 + +serdes_preemphasis_34=0x1A5600 +serdes_preemphasis_35=0x1A5600 +serdes_preemphasis_36=0x1A5600 +serdes_preemphasis_37=0x1A5600 +serdes_driver_current_34=0x000001 +serdes_driver_current_35=0x000001 +serdes_driver_current_36=0x000001 +serdes_driver_current_37=0x000001 + +serdes_preemphasis_38=0x1A5600 +serdes_preemphasis_39=0x1A5600 +serdes_preemphasis_40=0x1A5600 +serdes_preemphasis_41=0x1A5600 +serdes_driver_current_38=0x000001 +serdes_driver_current_39=0x000001 +serdes_driver_current_40=0x000001 +serdes_driver_current_41=0x000001 + +serdes_preemphasis_42=0x1A5600 +serdes_preemphasis_43=0x1A5600 +serdes_preemphasis_44=0x1A5600 +serdes_preemphasis_45=0x1A5600 +serdes_driver_current_42=0x000001 +serdes_driver_current_43=0x000001 +serdes_driver_current_44=0x000001 +serdes_driver_current_45=0x000001 + +serdes_preemphasis_46=0x1A5600 +serdes_preemphasis_47=0x1A5600 +serdes_preemphasis_48=0x1A5600 +serdes_preemphasis_49=0x1A5600 +serdes_driver_current_46=0x000001 +serdes_driver_current_47=0x000001 +serdes_driver_current_48=0x000001 +serdes_driver_current_49=0x000001 + +# 12 ~ 13 +serdes_preemphasis_50=0x165A00 +serdes_preemphasis_51=0x165A00 +serdes_preemphasis_52=0x165A00 +serdes_preemphasis_53=0x165A00 +serdes_driver_current_50=0x000000 +serdes_driver_current_51=0x000000 +serdes_driver_current_52=0x000000 +serdes_driver_current_53=0x000000 + +serdes_preemphasis_54=0x165A00 +serdes_preemphasis_55=0x165A00 +serdes_preemphasis_56=0x165A00 +serdes_preemphasis_57=0x165A00 +serdes_driver_current_54=0x000000 +serdes_driver_current_55=0x000000 +serdes_driver_current_56=0x000000 +serdes_driver_current_57=0x000000 + +# 14 ~ 16 +serdes_preemphasis_58=0x125E00 +serdes_preemphasis_59=0x125E00 +serdes_preemphasis_60=0x125E00 +serdes_preemphasis_61=0x125E00 +serdes_driver_current_58=0x000100 +serdes_driver_current_59=0x000100 +serdes_driver_current_60=0x000100 +serdes_driver_current_61=0x000100 + +serdes_preemphasis_62=0x125E00 +serdes_preemphasis_63=0x125E00 +serdes_preemphasis_64=0x125E00 +serdes_preemphasis_65=0x125E00 +serdes_driver_current_62=0x000100 +serdes_driver_current_63=0x000100 +serdes_driver_current_64=0x000100 +serdes_driver_current_65=0x000100 + +serdes_preemphasis_68=0x125E00 +serdes_preemphasis_69=0x125E00 +serdes_preemphasis_70=0x125E00 +serdes_preemphasis_71=0x125E00 +serdes_driver_current_68=0x000100 +serdes_driver_current_69=0x000100 +serdes_driver_current_70=0x000100 +serdes_driver_current_71=0x000100 + +# 17 ~ 21 +serdes_preemphasis_72=0x106000 +serdes_preemphasis_73=0x106000 +serdes_preemphasis_74=0x106000 +serdes_preemphasis_75=0x106000 +serdes_driver_current_72=0x000100 +serdes_driver_current_73=0x000100 +serdes_driver_current_74=0x000100 +serdes_driver_current_75=0x000100 + +serdes_preemphasis_76=0x106000 +serdes_preemphasis_77=0x106000 +serdes_preemphasis_78=0x106000 +serdes_preemphasis_79=0x106000 +serdes_driver_current_76=0x000100 +serdes_driver_current_77=0x000100 +serdes_driver_current_78=0x000100 +serdes_driver_current_79=0x000100 + +serdes_preemphasis_80=0x106000 +serdes_preemphasis_81=0x106000 +serdes_preemphasis_82=0x106000 +serdes_preemphasis_83=0x106000 +serdes_driver_current_80=0x000100 +serdes_driver_current_81=0x000100 +serdes_driver_current_82=0x000100 +serdes_driver_current_83=0x000100 + +serdes_preemphasis_84=0x106000 +serdes_preemphasis_85=0x106000 +serdes_preemphasis_86=0x106000 +serdes_preemphasis_87=0x106000 +serdes_driver_current_84=0x000100 +serdes_driver_current_85=0x000100 +serdes_driver_current_86=0x000100 +serdes_driver_current_87=0x000100 + +serdes_preemphasis_88=0x106000 +serdes_preemphasis_89=0x106000 +serdes_preemphasis_90=0x106000 +serdes_preemphasis_91=0x106000 +serdes_driver_current_88=0x000100 +serdes_driver_current_89=0x000100 +serdes_driver_current_90=0x000100 +serdes_driver_current_91=0x000100 + +# 22 ~ 23 +serdes_preemphasis_92=0x125E00 +serdes_preemphasis_93=0x125E00 +serdes_preemphasis_94=0x125E00 +serdes_preemphasis_95=0x125E00 +serdes_driver_current_92=0x000100 +serdes_driver_current_93=0x000100 +serdes_driver_current_94=0x000100 +serdes_driver_current_95=0x000100 + +serdes_preemphasis_96=0x125E00 +serdes_preemphasis_97=0x125E00 +serdes_preemphasis_98=0x125E00 +serdes_preemphasis_99=0x125E00 +serdes_driver_current_96=0x000100 +serdes_driver_current_97=0x000100 +serdes_driver_current_98=0x000100 +serdes_driver_current_99=0x000100 + +# 24 ~ 25 +serdes_preemphasis_102=0x165A00 +serdes_preemphasis_103=0x165A00 +serdes_preemphasis_104=0x165A00 +serdes_preemphasis_105=0x165A00 +serdes_driver_current_102=0x000000 +serdes_driver_current_103=0x000000 +serdes_driver_current_104=0x000000 +serdes_driver_current_105=0x000000 + +serdes_preemphasis_106=0x165A00 +serdes_preemphasis_107=0x165A00 +serdes_preemphasis_108=0x165A00 +serdes_preemphasis_109=0x165A00 +serdes_driver_current_106=0x000000 +serdes_driver_current_107=0x000000 +serdes_driver_current_108=0x000000 +serdes_driver_current_109=0x000000 + +# 26 ~ 29 +serdes_preemphasis_110=0x1A5600 +serdes_preemphasis_111=0x1A5600 +serdes_preemphasis_112=0x1A5600 +serdes_preemphasis_113=0x1A5600 +serdes_driver_current_110=0x000001 +serdes_driver_current_111=0x000001 +serdes_driver_current_112=0x000001 +serdes_driver_current_113=0x000001 + +serdes_preemphasis_114=0x1A5600 +serdes_preemphasis_115=0x1A5600 +serdes_preemphasis_116=0x1A5600 +serdes_preemphasis_117=0x1A5600 +serdes_driver_current_114=0x000001 +serdes_driver_current_115=0x000001 +serdes_driver_current_116=0x000001 +serdes_driver_current_117=0x000001 + +serdes_preemphasis_118=0x1A5600 +serdes_preemphasis_119=0x1A5600 +serdes_preemphasis_120=0x1A5600 +serdes_preemphasis_121=0x1A5600 +serdes_driver_current_118=0x000001 +serdes_driver_current_119=0x000001 +serdes_driver_current_120=0x000001 +serdes_driver_current_121=0x000001 + +serdes_preemphasis_122=0x1A5600 +serdes_preemphasis_123=0x1A5600 +serdes_preemphasis_124=0x1A5600 +serdes_preemphasis_125=0x1A5600 +serdes_driver_current_122=0x000001 +serdes_driver_current_123=0x000001 +serdes_driver_current_124=0x000001 +serdes_driver_current_125=0x000001 + +# 30 ~ 31 +serdes_preemphasis_126=0x1E5200 +serdes_preemphasis_127=0x1E5200 +serdes_preemphasis_128=0x1E5200 +serdes_preemphasis_129=0x1E5200 +serdes_driver_current_126=0x000001 +serdes_driver_current_127=0x000001 +serdes_driver_current_128=0x000001 +serdes_driver_current_129=0x000001 + +serdes_preemphasis_130=0x1E5200 +serdes_preemphasis_131=0x1E5200 +serdes_preemphasis_132=0x1E5200 +serdes_preemphasis_133=0x1E5200 +serdes_driver_current_130=0x000001 +serdes_driver_current_131=0x000001 +serdes_driver_current_132=0x000001 +serdes_driver_current_133=0x000001 diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/default_sku b/device/inventec/x86_64-inventec_d7032q28b-r0/default_sku new file mode 100644 index 00000000000..505f1765e6e --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/default_sku @@ -0,0 +1 @@ +INVENTEC-D7032Q28B-C32 t1 diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/installer.conf b/device/inventec/x86_64-inventec_d7032q28b-r0/installer.conf new file mode 100644 index 00000000000..6b489db6e16 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 +VAR_LOG_SIZE=1024 diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/led_proc_init.soc b/device/inventec/x86_64-inventec_d7032q28b-r0/led_proc_init.soc new file mode 100644 index 00000000000..92423b23449 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/led_proc_init.soc @@ -0,0 +1,136 @@ +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=31 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=30 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=29 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=27 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=26 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=25 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=23 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=22 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=21 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=19 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=18 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=17 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=15 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=14 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=13 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=11 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=10 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=9 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=7 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=6 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=5 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=2 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=1 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=0 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=62 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=61 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=59 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=58 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=57 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=55 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=54 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=53 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=51 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=50 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=49 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=46 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=45 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=43 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=42 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=41 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=39 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=38 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=37 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=35 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=34 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=33 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=3 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=2 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=1 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=7 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=6 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=5 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=10 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=9 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=15 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=14 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=13 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=19 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=18 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=17 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=23 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=22 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=21 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=27 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=26 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=25 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=31 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=30 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=29 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=35 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=34 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=33 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=39 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=38 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=37 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=43 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=42 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=41 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=47 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=46 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=45 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=50 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=49 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=54 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=53 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=58 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=57 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=56 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=62 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=61 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=60 + +led 0 stop +led 0 prog 02 00 60 F1 12 00 DA 0F 70 10 67 47 67 42 77 06 02 A0 60 F0 12 00 06 F0 4A 04 27 67 42 4A 03 27 67 42 4A 07 27 67 42 4A 00 27 67 42 DA 80 70 34 86 F0 77 16 12 00 DA 03 70 40 67 4A 67 42 77 36 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +led 0 start + +led 1 stop +led 1 prog 02 00 60 F1 12 00 DA 0F 70 10 67 47 67 42 77 06 02 A0 60 F0 12 00 06 F0 4A 04 27 67 42 4A 03 27 67 42 4A 07 27 67 42 4A 00 27 67 42 DA 80 70 34 86 F0 77 16 12 00 DA 03 70 40 67 4A 67 42 77 36 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +led 1 start diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/plugins/eeprom.py b/device/inventec/x86_64-inventec_d7032q28b-r0/plugins/eeprom.py new file mode 100644 index 00000000000..de5c24ba0e6 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7032q28b +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/plugins/psuutil.py b/device/inventec/x86_64-inventec_d7032q28b-r0/plugins/psuutil.py new file mode 100644 index 00000000000..cc5ca004dad --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/plugins/psuutil.py @@ -0,0 +1,88 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + PSU_DIR = "/sys/bus/i2c/devices/0-0066" + + def __init__(self): + PsuBase.__init__(self) + +# Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + if (index == 1): + ind = 2 + if (index == 2): + ind = 1 + attr_file = 'psu'+ str(ind) + '_iout' + attr_path = self.PSU_DIR +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU status + if (attr_value != 0): + status = 1 + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + ind = index-1 + attr_file ='psu'+ str(ind) + attr_path = self.PSU_DIR +'/' + attr_file + normal_attr_value = '0 : normal' + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU presence + if (attr_value == normal_attr_value): + status = 1 + return status diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/plugins/sfputil.py b/device/inventec/x86_64-inventec_d7032q28b-r0/plugins/sfputil.py new file mode 100644 index 00000000000..d109f49f2e7 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/plugins/sfputil.py @@ -0,0 +1,187 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 31 + PORTS_IN_BLOCK = 32 + QSFP_PORT_START = 0 + QSFP_PORT_END = 31 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0: 22, + 1: 23, + 2: 24, + 3: 25, + 4: 26, + 5: 27, + 6: 28, + 7: 29, + 8: 30, + 9: 31, + 10: 32, + 11: 33, + 12: 34, + 13: 35, + 14: 36, + 15: 37, + 16: 6, + 17: 7, + 18: 8, + 19: 9, + 20: 10, + 21: 11, + 22: 12, + 23: 13, + 24: 14, + 25: 15, + 26: 16, + 27: 17, + 28: 18, + 29: 19, + 30: 20, + 31: 21 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/class/swps/port"+str(port_num)+"/reset" + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/inventec/x86_64-inventec_d7032q28b-r0/sensors.conf b/device/inventec/x86_64-inventec_d7032q28b-r0/sensors.conf new file mode 100644 index 00000000000..653900cad36 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7032q28b-r0/sensors.conf @@ -0,0 +1,15 @@ +# libsensors configuration file +chip "inv_psoc-*" + ignore temp3 + ignore temp4 + label temp1 "CPU Board Temperature" + label temp2 "SW Board I Temperature" + label temp5 "SW Board II Temperature" + label temp6 "ASIC Temperature" + label in1 "PSU1 Voltage" + label in2 "PSU2 Voltage" + label curr1 "PSU1 Current" + label curr2 "PSU2 Current" + label power1 "PSU1 Power" + label power2 "PSU2 Power" + diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/buffers.json.j2 b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/buffers.json.j2 new file mode 100644 index 00000000000..ccf463c4052 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/buffers.json.j2 @@ -0,0 +1,128 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_speed = '100G' %} +{% set default_ports_num = 54 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "CABLE_LENGTH": { + "AZURE": { + {% for port in PORT %} + {% set cable = cable_length(port) -%} + "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %} + + {% endfor %} + } + }, + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "6000000", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "8072396", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"18432", + "xoff":"40560", + "size":"41808", + "dynamic_th":"-4", + "xon_offset":"2496" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"6000000" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/port_config.ini b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/port_config.ini new file mode 100644 index 00000000000..8b0addcada1 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias +Ethernet0 2 Ethernet0 +Ethernet4 1 Ethernet4 +Ethernet8 4 Ethernet8 +Ethernet12 3 Ethernet12 +Ethernet16 6 Ethernet16 +Ethernet20 5 Ethernet20 +Ethernet24 8 Ethernet24 +Ethernet28 7 Ethernet28 +Ethernet32 10 Ethernet32 +Ethernet36 9 Ethernet36 +Ethernet40 12 Ethernet40 +Ethernet44 11 Ethernet44 +Ethernet48 22 Ethernet48 +Ethernet52 21 Ethernet52 +Ethernet56 24 Ethernet56 +Ethernet60 23 Ethernet60 +Ethernet64 34 Ethernet64 +Ethernet68 33 Ethernet68 +Ethernet72 36 Ethernet72 +Ethernet76 35 Ethernet76 +Ethernet80 38 Ethernet80 +Ethernet84 37 Ethernet84 +Ethernet88 40 Ethernet88 +Ethernet92 39 Ethernet92 +Ethernet96 42 Ethernet96 +Ethernet100 41 Ethernet100 +Ethernet104 44 Ethernet104 +Ethernet108 43 Ethernet108 +Ethernet112 50 Ethernet112 +Ethernet116 49 Ethernet116 +Ethernet120 52 Ethernet120 +Ethernet124 51 Ethernet124 +Ethernet128 54 Ethernet128 +Ethernet132 53 Ethernet132 +Ethernet136 56 Ethernet136 +Ethernet140 55 Ethernet140 +Ethernet144 66 Ethernet144 +Ethernet148 65 Ethernet148 +Ethernet152 68 Ethernet152 +Ethernet156 67 Ethernet156 +Ethernet160 70 Ethernet160 +Ethernet164 69 Ethernet164 +Ethernet168 72 Ethernet168 +Ethernet172 71 Ethernet172 +Ethernet176 82 Ethernet176 +Ethernet180 81 Ethernet180 +Ethernet184 84 Ethernet184 +Ethernet188 83 Ethernet188 +Ethernet192 85,86,87,88 Ethernet192 +Ethernet196 97,98,99,100 Ethernet196 +Ethernet200 105,106,107,108 Ethernet200 +Ethernet204 101,102,103,104 Ethernet204 +Ethernet208 117,118,119,120 Ethernet208 +Ethernet212 109,110,111,112 Ethernet212 diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/qos.json b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/qos.json new file mode 100644 index 00000000000..9949a5903d8 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/qos.json @@ -0,0 +1,143 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable": "3,4" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"312000", + "red_min_threshold":"104000", + "yellow_max_threshold":"312000", + "yellow_min_threshold":"104000", + "green_max_threshold":"312000", + "green_min_threshold":"104000" + } + }, + "QUEUE": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212|0" : { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212|1" : { + "scheduler" : "[SCHEDULER|scheduler.2]" + } + } +} diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/sai.profile b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/sai.profile new file mode 100644 index 00000000000..73cbea23969 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-d7054q28b-48x25g-6x100g.config.bcm +SAI_NUM_ECMP_MEMBERS=32 diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/th-d7054q28b-48x10g-6x100g.config.bcm b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/th-d7054q28b-48x10g-6x100g.config.bcm new file mode 100644 index 00000000000..b90ba92a97b --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/th-d7054q28b-48x10g-6x100g.config.bcm @@ -0,0 +1,465 @@ +# Cypress BCM Shell config / 10G * 48 ports; 100G * 6 ports + +# Define default OS / SAL +os=unix + +l2_mem_entries=40960 +l3_mem_entries=40960 +fpem_mem_entries=32768 +l2xmsg_mode=1 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 + +## update the hex string based on case ID: 925941 +## 1. type "phy info" then get each hg ports' number +## 2. Set these number as 1 in pbmp_xport_xe and pbmp_oversubscribe +## 130 xe ports, 4 * 32 + 2 +## no more pbmp_oversubscribe +oversubscribe_mode=1 +pbmp_xport_xe=0x3fffffffdffffffff7fffffffdfffffffe + + +# EagleCore ports: 36 & 49 +portmap_66=129:10 +portmap_100=131:10 + +# Loopback ports +portmap_33=132:10 +portmap_67=133:10 +portmap_101=134:10 +portmap_135=135:10 + +# First 12*4 48 ports config for 10G +# Second 6 ports config for 100G +# For Tomahawk FalconCore: +# Physical ports in FalconCore[0 - 7] must map to logical port[1 - 32] at any order +# Physical ports in FalconCore[8 - 15] must map to logical port[34 - 65] at any order +# Physical ports in FalconCore[16 - 23] must map to logical port[68 - 99] at any order +# Physical ports in FalconCore[24 - 31] must map to logical port[102 - 133] at any order + +## FalconCore[0,1,2,5] +portmap_1=2:10 +portmap_2=1:10 +portmap_3=4:10 +portmap_4=3:10 +portmap_5=6:10 +portmap_6=5:10 +portmap_7=8:10 +portmap_8=7:10 +portmap_9=10:10 +portmap_10=9:10 +portmap_11=12:10 +portmap_12=11:10 +# FC-05 +portmap_13=22:10 +portmap_14=21:10 +portmap_15=24:10 +portmap_16=23:10 + +## FalconCore[8, 9, 10, 12, 13] +portmap_34=34:10 +portmap_35=33:10 +portmap_36=36:10 +portmap_37=35:10 +portmap_38=38:10 +portmap_39=37:10 +portmap_40=40:10 +portmap_41=39:10 +portmap_42=42:10 +portmap_43=41:10 +portmap_44=44:10 +portmap_45=43:10 +# FC-12 & FC-13 +portmap_46=50:10 +portmap_47=49:10 +portmap_48=52:10 +portmap_49=51:10 +portmap_50=54:10 +portmap_51=53:10 +portmap_52=56:10 +portmap_53=55:10 + +## FalconCore[16, 17, 20] +portmap_68=66:10 +portmap_69=65:10 +portmap_70=68:10 +portmap_71=67:10 +portmap_72=70:10 +portmap_73=69:10 +portmap_74=72:10 +portmap_75=71:10 +# FC-20 +portmap_76=82:10 +portmap_77=81:10 +portmap_78=84:10 +portmap_79=83:10 + +# FC-21 (100G) +portmap_80=85:100 + +## FalconCore[24, 25, 26, 27, 29] (100G) +portmap_102=97:100 +portmap_103=105:100 +portmap_104=101:100 +portmap_105=117:100 +portmap_107=109:100 + + + +# FalconCore[0,1,2,5] ports TX polarity flip for 25G +# no polarity reversal + +# FalconCore[8, 9, 10, 12, 13] ports TX polarity flip for 25G +# For Baidu xe20 & xe22; for GA xe21 & xe23 +phy_xaui_tx_polarity_flip_xe20=1 +phy_xaui_tx_polarity_flip_xe22=1 + +# FalconCore[16, 17, 20] ports TX polarity flip for 25G +# no polarity reversal + +# FC-21 for 100G + +# FalconCore[24, 25, 26, 27, 29] ports TX polarity flip for 100G +phy_xaui_tx_polarity_flip_ce1=0xf +phy_xaui_tx_polarity_flip_ce2=0xf + + +# FalconCore[0,1,2,5] ports RX polarity flip for 25G +# no polarity reversal + +# FalconCore[8, 9, 10, 12, 13] ports RX polarity flip for 25G +# no polarity reversal + +# FalconCore[16, 17, 20] ports RX polarity flip for 25G +# no polarity reversal + +# FC-21 for 100G + +# FalconCore[24, 25, 26, 27, 29] ports RX polarity flip for 100G +phy_xaui_rx_polarity_flip_ce2=0xf + + +## Lane swapping +## The HEX value is connection of red line within Falconcore in "Fig 3-4 SFP28 port connection" +# TX - Config A. (FC 0/1/2/16) +# 0x3210 - port 0-11, 36-39 +xgxs_tx_lane_map_xe0=0x3210 +xgxs_tx_lane_map_xe1=0x3210 +xgxs_tx_lane_map_xe2=0x3210 +xgxs_tx_lane_map_xe3=0x3210 +xgxs_tx_lane_map_xe4=0x3210 +xgxs_tx_lane_map_xe5=0x3210 +xgxs_tx_lane_map_xe6=0x3210 +xgxs_tx_lane_map_xe7=0x3210 +xgxs_tx_lane_map_xe8=0x3210 +xgxs_tx_lane_map_xe9=0x3210 +xgxs_tx_lane_map_xe10=0x3210 +xgxs_tx_lane_map_xe11=0x3210 +xgxs_tx_lane_map_xe37=0x3210 +xgxs_tx_lane_map_xe38=0x3210 +xgxs_tx_lane_map_xe39=0x3210 +xgxs_tx_lane_map_xe40=0x3210 + + +# TX - Config B. (FC 5/9/20) +# 0x0123 - port 12-13, 20-23, 44-47 +xgxs_tx_lane_map_xe12=0x0123 +xgxs_tx_lane_map_xe13=0x0123 +xgxs_tx_lane_map_xe14=0x0123 +xgxs_tx_lane_map_xe15=0x0123 +xgxs_tx_lane_map_xe20=0x0123 +xgxs_tx_lane_map_xe21=0x0123 +xgxs_tx_lane_map_xe22=0x0123 +xgxs_tx_lane_map_xe23=0x0123 +xgxs_tx_lane_map_xe45=0x0123 +xgxs_tx_lane_map_xe46=0x0123 +xgxs_tx_lane_map_xe47=0x0123 +xgxs_tx_lane_map_xe48=0x0123 + + +# TX - Config C. (FC 8/10) +# 0x3210 - port 16-19, 24-27 +xgxs_tx_lane_map_xe16=0x3210 +xgxs_tx_lane_map_xe17=0x3210 +xgxs_tx_lane_map_xe18=0x3210 +xgxs_tx_lane_map_xe19=0x3210 +xgxs_tx_lane_map_xe24=0x3210 +xgxs_tx_lane_map_xe25=0x3210 +xgxs_tx_lane_map_xe26=0x3210 +xgxs_tx_lane_map_xe27=0x3210 + + +# TX - Config D. (FC 12/13/17) +# 0x0123 - port 28-35, 40-43 +xgxs_tx_lane_map_xe28=0x0123 +xgxs_tx_lane_map_xe29=0x0123 +xgxs_tx_lane_map_xe30=0x0123 +xgxs_tx_lane_map_xe31=0x0123 +xgxs_tx_lane_map_xe32=0x0123 +xgxs_tx_lane_map_xe33=0x0123 +xgxs_tx_lane_map_xe34=0x0123 +xgxs_tx_lane_map_xe35=0x0123 +xgxs_tx_lane_map_xe41=0x0123 +xgxs_tx_lane_map_xe42=0x0123 +xgxs_tx_lane_map_xe43=0x0123 +xgxs_tx_lane_map_xe44=0x0123 + + + + +# RX - Config A. (FC 0/1/2/16) +# 0x1032 - port 0-11, 36-39 +xgxs_rx_lane_map_xe0=0x1032 +xgxs_rx_lane_map_xe1=0x1032 +xgxs_rx_lane_map_xe2=0x1032 +xgxs_rx_lane_map_xe3=0x1032 +xgxs_rx_lane_map_xe4=0x1032 +xgxs_rx_lane_map_xe5=0x1032 +xgxs_rx_lane_map_xe6=0x1032 +xgxs_rx_lane_map_xe7=0x1032 +xgxs_rx_lane_map_xe8=0x1032 +xgxs_rx_lane_map_xe9=0x1032 +xgxs_rx_lane_map_xe10=0x1032 +xgxs_rx_lane_map_xe11=0x1032 +xgxs_rx_lane_map_xe37=0x1032 +xgxs_rx_lane_map_xe38=0x1032 +xgxs_rx_lane_map_xe39=0x1032 +xgxs_rx_lane_map_xe40=0x1032 + + + +# RX - Config B. (FC 5/9/20) +# 0x1032 - port 12-13, 20-23, 44-47 +xgxs_rx_lane_map_xe12=0x1032 +xgxs_rx_lane_map_xe13=0x1032 +xgxs_rx_lane_map_xe14=0x1032 +xgxs_rx_lane_map_xe15=0x1032 +xgxs_rx_lane_map_xe20=0x1032 +xgxs_rx_lane_map_xe21=0x1032 +xgxs_rx_lane_map_xe22=0x1032 +xgxs_rx_lane_map_xe23=0x1032 +xgxs_rx_lane_map_xe45=0x1032 +xgxs_rx_lane_map_xe46=0x1032 +xgxs_rx_lane_map_xe47=0x1032 +xgxs_rx_lane_map_xe48=0x1032 + + +# RX - Config C. (FC 8/10) +# 0x3210 - port 16-19, 24-27 +xgxs_rx_lane_map_xe16=0x3210 +xgxs_rx_lane_map_xe17=0x3210 +xgxs_rx_lane_map_xe18=0x3210 +xgxs_rx_lane_map_xe19=0x3210 +xgxs_rx_lane_map_xe24=0x3210 +xgxs_rx_lane_map_xe25=0x3210 +xgxs_rx_lane_map_xe26=0x3210 +xgxs_rx_lane_map_xe27=0x3210 + + +# RX - Config D. (FC 12/13/17) +# 0x3210 - port 28-35, 40-43 +xgxs_rx_lane_map_xe28=0x3210 +xgxs_rx_lane_map_xe29=0x3210 +xgxs_rx_lane_map_xe30=0x3210 +xgxs_rx_lane_map_xe31=0x3210 +xgxs_rx_lane_map_xe32=0x3210 +xgxs_rx_lane_map_xe33=0x3210 +xgxs_rx_lane_map_xe34=0x3210 +xgxs_rx_lane_map_xe35=0x3210 +xgxs_rx_lane_map_xe41=0x3210 +xgxs_rx_lane_map_xe42=0x3210 +xgxs_rx_lane_map_xe43=0x3210 +xgxs_rx_lane_map_xe44=0x3210 + + +## Lane swapping for QSFP28 (100G) +## The HEX value is connection of red line within Falconcore in "Fig 3-4 SFP28 port connection" +# TX - Config A. (FC 21/25) +# 0x3210 - port ce0, ce3 +xgxs_tx_lane_map_ce0=0x3210 +xgxs_tx_lane_map_ce3=0x3210 + + +# TX - Config B. (FC 24) +# 0x3210 - port ce1 +xgxs_tx_lane_map_ce1=0x3210 + + +# TX - Config C. (FC 26) +# 0x3210 - port ce2 +xgxs_tx_lane_map_ce2=0x3210 + + +# TX - Config D. (FC 27) +# 0x3210 - ce5 +xgxs_tx_lane_map_ce5=0x3210 + + +# TX - Config E. (FC 29) +# 0x3210 - ce4 +xgxs_tx_lane_map_ce4=0x3210 + + +# RX - Config A. (FC 21/25) +# 0x1032 - port ce0, ce3 +xgxs_rx_lane_map_ce0=0x1032 +xgxs_rx_lane_map_ce3=0x1032 + + +# RX - Config B. (FC 24) +# 0x1032 - port ce1 +xgxs_rx_lane_map_ce1=0x1032 + + +# RX - Config C. (FC 26) +# 0x2301 - port ce2 +xgxs_rx_lane_map_ce2=0x2301 + + +# RX - Config D. (FC 27) +# 0x2301 - ce5 +xgxs_rx_lane_map_ce5=0x2301 + + +# TX - Config E. (FC 29) +# 0x3210 - ce4 +xgxs_rx_lane_map_ce4=0x3210 + +# EQ/iDriver + +# The 1st 16 ports, xe0-xe15 +serdes_preemphasis_1=0x1A5600 +serdes_preemphasis_2=0x1A5600 +serdes_preemphasis_3=0x1A5600 +serdes_preemphasis_4=0x1A5600 +serdes_preemphasis_5=0x1A5600 +serdes_preemphasis_6=0x1A5600 +serdes_preemphasis_7=0x185800 +serdes_preemphasis_8=0x1A5600 +serdes_preemphasis_9=0x185800 +serdes_preemphasis_10=0x185800 +serdes_preemphasis_11=0x165A00 +serdes_preemphasis_12=0x185800 +serdes_preemphasis_13=0x105F01 +serdes_preemphasis_14=0x165A00 +serdes_preemphasis_15=0x105F01 +serdes_preemphasis_16=0x105F01 + +serdes_driver_current_1=0x000001 +serdes_driver_current_2=0x000001 +serdes_driver_current_3=0x000001 +serdes_driver_current_4=0x000001 +serdes_driver_current_5=0x000001 +serdes_driver_current_6=0x000001 +serdes_driver_current_7=0x000001 +serdes_driver_current_8=0x000001 +serdes_driver_current_9=0x000000 +serdes_driver_current_10=0x000001 +serdes_driver_current_11=0x000000 +serdes_driver_current_12=0x000000 +serdes_driver_current_13=0x000000 +serdes_driver_current_14=0x000000 +serdes_driver_current_15=0x000000 +serdes_driver_current_16=0x000000 + +# The 2nd 20 ports, xe16-xe35 +serdes_preemphasis_34=0x105F01 +serdes_preemphasis_35=0x105F01 +serdes_preemphasis_36=0x0E6002 +serdes_preemphasis_37=0x0E6002 +serdes_preemphasis_38=0x0E6002 +serdes_preemphasis_39=0x0E6002 +serdes_preemphasis_40=0x125B03 +serdes_preemphasis_41=0x0E6002 +serdes_preemphasis_42=0x125B03 +serdes_preemphasis_43=0x125B03 +serdes_preemphasis_44=0x125B03 +serdes_preemphasis_45=0x125B03 +serdes_preemphasis_46=0x125B03 +serdes_preemphasis_47=0x125B03 +serdes_preemphasis_48=0x125B03 +serdes_preemphasis_49=0x125B03 +serdes_preemphasis_50=0x125B03 +serdes_preemphasis_51=0x125B03 +serdes_preemphasis_52=0x125B03 +serdes_preemphasis_53=0x125B03 + +serdes_driver_current_34=0x000000 +serdes_driver_current_35=0x000000 +serdes_driver_current_36=0x000000 +serdes_driver_current_37=0x000000 +serdes_driver_current_38=0x000000 +serdes_driver_current_39=0x000000 +serdes_driver_current_40=0x000000 +serdes_driver_current_41=0x000000 +serdes_driver_current_42=0x000000 +serdes_driver_current_43=0x000000 +serdes_driver_current_44=0x000000 +serdes_driver_current_45=0x000000 +serdes_driver_current_46=0x000000 +serdes_driver_current_47=0x000000 +serdes_driver_current_48=0x000000 +serdes_driver_current_49=0x000000 +serdes_driver_current_50=0x000000 +serdes_driver_current_51=0x000000 +serdes_driver_current_52=0x000000 +serdes_driver_current_53=0x000000 + +# The 3rd 12 ports, xe36-xe47 +serdes_preemphasis_68=0x125B03 +serdes_preemphasis_69=0x125B03 +serdes_preemphasis_70=0x125B03 +serdes_preemphasis_71=0x125B03 +serdes_preemphasis_72=0x125B03 +serdes_preemphasis_73=0x125B03 +serdes_preemphasis_74=0x125B03 +serdes_preemphasis_75=0x125B03 +serdes_preemphasis_76=0x105F01 +serdes_preemphasis_77=0x105F01 +serdes_preemphasis_78=0x105F01 +serdes_preemphasis_79=0x105F01 + +serdes_driver_current_68=0x000000 +serdes_driver_current_69=0x000000 +serdes_driver_current_70=0x000000 +serdes_driver_current_71=0x000000 +serdes_driver_current_72=0x000000 +serdes_driver_current_73=0x000000 +serdes_driver_current_74=0x000000 +serdes_driver_current_75=0x000000 +serdes_driver_current_76=0x000000 +serdes_driver_current_77=0x000000 +serdes_driver_current_78=0x000000 +serdes_driver_current_79=0x000000 + +# 6 x 100G ports, expandable to 24 x 25G ports +serdes_preemphasis_80=0x2D4300 +serdes_preemphasis_81=0x2D4300 +serdes_preemphasis_82=0x2D4300 +serdes_preemphasis_83=0x2D4300 + +serdes_preemphasis_102=0x304000 +serdes_preemphasis_103=0x304000 +serdes_preemphasis_104=0x304000 +serdes_preemphasis_105=0x304000 + +serdes_preemphasis_106=0x304000 +serdes_preemphasis_107=0x304000 +serdes_preemphasis_108=0x304000 +serdes_preemphasis_109=0x304000 + +serdes_preemphasis_110=0x304000 +serdes_preemphasis_111=0x304000 +serdes_preemphasis_112=0x304000 +serdes_preemphasis_113=0x304000 + +serdes_preemphasis_114=0x2E360C +serdes_preemphasis_115=0x2E360C +serdes_preemphasis_116=0x2E360C +serdes_preemphasis_117=0x2E360C + +serdes_preemphasis_118=0x2E360C +serdes_preemphasis_119=0x2E360C +serdes_preemphasis_120=0x2E360C +serdes_preemphasis_121=0x2E360C diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/th-d7054q28b-48x25g-6x100g.config.bcm b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/th-d7054q28b-48x25g-6x100g.config.bcm new file mode 100644 index 00000000000..ff09305ccbf --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/INVENTEC-D7054Q28B-S48-Q6/th-d7054q28b-48x25g-6x100g.config.bcm @@ -0,0 +1,414 @@ +# Cypress BCM Shell config / 25G * 48 ports; 100G * 6 ports + +# Define default OS / SAL +os=unix + +l2_mem_entries=40960 +l3_mem_entries=40960 +fpem_mem_entries=32768 +l2xmsg_mode=1 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 + +## update the hex string based on case ID: 925941 +## 1. type "phy info" then get each hg ports' number +## 2. Set these number as 1 in pbmp_xport_xe and pbmp_oversubscribe +## 130 xe ports, 4 * 32 + 2 +## no more pbmp_oversubscribe +oversubscribe_mode=1 +pbmp_xport_xe=0x3fffffffdffffffff7fffffffdfffffffe + + +# EagleCore ports: 36 & 49 +portmap_66=129:10 +portmap_100=131:10 + +# Loopback ports +portmap_33=132:10 +portmap_67=133:10 +portmap_101=134:10 +portmap_135=135:10 + +# First 12*4 48 ports config for 25G +# Second 6 ports config for 100G +# For Tomahawk FalconCore: +# Physical ports in FalconCore[0 - 7] must map to logical port[1 - 32] at any order +# Physical ports in FalconCore[8 - 15] must map to logical port[34 - 65] at any order +# Physical ports in FalconCore[16 - 23] must map to logical port[68 - 99] at any order +# Physical ports in FalconCore[24 - 31] must map to logical port[102 - 133] at any order + +## FalconCore[0,1,2,5] +portmap_1=2:25 +portmap_2=1:25 +portmap_3=4:25 +portmap_4=3:25 +portmap_5=6:25 +portmap_6=5:25 +portmap_7=8:25 +portmap_8=7:25 +portmap_9=10:25 +portmap_10=9:25 +portmap_11=12:25 +portmap_12=11:25 +# FC-05 +portmap_13=22:25 +portmap_14=21:25 +portmap_15=24:25 +portmap_16=23:25 + +## FalconCore[8, 9, 10, 12, 13] +portmap_34=34:25 +portmap_35=33:25 +portmap_36=36:25 +portmap_37=35:25 +portmap_38=38:25 +portmap_39=37:25 +portmap_40=40:25 +portmap_41=39:25 +portmap_42=42:25 +portmap_43=41:25 +portmap_44=44:25 +portmap_45=43:25 +# FC-12 & FC-13 +portmap_46=50:25 +portmap_47=49:25 +portmap_48=52:25 +portmap_49=51:25 +portmap_50=54:25 +portmap_51=53:25 +portmap_52=56:25 +portmap_53=55:25 + +## FalconCore[16, 17, 20] +portmap_68=66:25 +portmap_69=65:25 +portmap_70=68:25 +portmap_71=67:25 +portmap_72=70:25 +portmap_73=69:25 +portmap_74=72:25 +portmap_75=71:25 +# FC-20 +portmap_76=82:25 +portmap_77=81:25 +portmap_78=84:25 +portmap_79=83:25 + +# FC-21 (100G) +portmap_80=85:100 + +## FalconCore[24, 25, 26, 27, 29] (100G) +portmap_102=97:100 +portmap_103=105:100 +portmap_104=101:100 +portmap_105=117:100 +portmap_107=109:100 + + + +# FalconCore[0,1,2,5] ports TX polarity flip for 25G +# no polarity reversal + +# FalconCore[8, 9, 10, 12, 13] ports TX polarity flip for 25G +# For Baidu xe20 & xe22; for GA xe21 & xe23 +phy_xaui_tx_polarity_flip_xe20=1 +phy_xaui_tx_polarity_flip_xe22=1 + +# FalconCore[16, 17, 20] ports TX polarity flip for 25G +# no polarity reversal + +# FC-21 for 100G + +# FalconCore[24, 25, 26, 27, 29] ports TX polarity flip for 100G +phy_xaui_tx_polarity_flip_ce1=0xf +phy_xaui_tx_polarity_flip_ce2=0xf + + +# FalconCore[0,1,2,5] ports RX polarity flip for 25G +# no polarity reversal + +# FalconCore[8, 9, 10, 12, 13] ports RX polarity flip for 25G +# no polarity reversal + +# FalconCore[16, 17, 20] ports RX polarity flip for 25G +# no polarity reversal + +# FC-21 for 100G + +# FalconCore[24, 25, 26, 27, 29] ports RX polarity flip for 100G +phy_xaui_rx_polarity_flip_ce2=0xf + + +## Lane swapping +## The HEX value is connection of red line within Falconcore in "Fig 3-4 SFP28 port connection" +# TX - Config A. (FC 0/1/2/16) +# 0x3210 - port 0-11, 36-39 +xgxs_tx_lane_map_xe0=0x3210 +xgxs_tx_lane_map_xe1=0x3210 +xgxs_tx_lane_map_xe2=0x3210 +xgxs_tx_lane_map_xe3=0x3210 +xgxs_tx_lane_map_xe4=0x3210 +xgxs_tx_lane_map_xe5=0x3210 +xgxs_tx_lane_map_xe6=0x3210 +xgxs_tx_lane_map_xe7=0x3210 +xgxs_tx_lane_map_xe8=0x3210 +xgxs_tx_lane_map_xe9=0x3210 +xgxs_tx_lane_map_xe10=0x3210 +xgxs_tx_lane_map_xe11=0x3210 +xgxs_tx_lane_map_xe37=0x3210 +xgxs_tx_lane_map_xe38=0x3210 +xgxs_tx_lane_map_xe39=0x3210 +xgxs_tx_lane_map_xe40=0x3210 + + +# TX - Config B. (FC 5/9/20) +# 0x0123 - port 12-13, 20-23, 44-47 +xgxs_tx_lane_map_xe12=0x0123 +xgxs_tx_lane_map_xe13=0x0123 +xgxs_tx_lane_map_xe14=0x0123 +xgxs_tx_lane_map_xe15=0x0123 +xgxs_tx_lane_map_xe20=0x0123 +xgxs_tx_lane_map_xe21=0x0123 +xgxs_tx_lane_map_xe22=0x0123 +xgxs_tx_lane_map_xe23=0x0123 +xgxs_tx_lane_map_xe45=0x0123 +xgxs_tx_lane_map_xe46=0x0123 +xgxs_tx_lane_map_xe47=0x0123 +xgxs_tx_lane_map_xe48=0x0123 + + +# TX - Config C. (FC 8/10) +# 0x3210 - port 16-19, 24-27 +xgxs_tx_lane_map_xe16=0x3210 +xgxs_tx_lane_map_xe17=0x3210 +xgxs_tx_lane_map_xe18=0x3210 +xgxs_tx_lane_map_xe19=0x3210 +xgxs_tx_lane_map_xe24=0x3210 +xgxs_tx_lane_map_xe25=0x3210 +xgxs_tx_lane_map_xe26=0x3210 +xgxs_tx_lane_map_xe27=0x3210 + + +# TX - Config D. (FC 12/13/17) +# 0x0123 - port 28-35, 40-43 +xgxs_tx_lane_map_xe28=0x0123 +xgxs_tx_lane_map_xe29=0x0123 +xgxs_tx_lane_map_xe30=0x0123 +xgxs_tx_lane_map_xe31=0x0123 +xgxs_tx_lane_map_xe32=0x0123 +xgxs_tx_lane_map_xe33=0x0123 +xgxs_tx_lane_map_xe34=0x0123 +xgxs_tx_lane_map_xe35=0x0123 +xgxs_tx_lane_map_xe41=0x0123 +xgxs_tx_lane_map_xe42=0x0123 +xgxs_tx_lane_map_xe43=0x0123 +xgxs_tx_lane_map_xe44=0x0123 + + + + +# RX - Config A. (FC 0/1/2/16) +# 0x1032 - port 0-11, 36-39 +xgxs_rx_lane_map_xe0=0x1032 +xgxs_rx_lane_map_xe1=0x1032 +xgxs_rx_lane_map_xe2=0x1032 +xgxs_rx_lane_map_xe3=0x1032 +xgxs_rx_lane_map_xe4=0x1032 +xgxs_rx_lane_map_xe5=0x1032 +xgxs_rx_lane_map_xe6=0x1032 +xgxs_rx_lane_map_xe7=0x1032 +xgxs_rx_lane_map_xe8=0x1032 +xgxs_rx_lane_map_xe9=0x1032 +xgxs_rx_lane_map_xe10=0x1032 +xgxs_rx_lane_map_xe11=0x1032 +xgxs_rx_lane_map_xe37=0x1032 +xgxs_rx_lane_map_xe38=0x1032 +xgxs_rx_lane_map_xe39=0x1032 +xgxs_rx_lane_map_xe40=0x1032 + + + +# RX - Config B. (FC 5/9/20) +# 0x1032 - port 12-13, 20-23, 44-47 +xgxs_rx_lane_map_xe12=0x1032 +xgxs_rx_lane_map_xe13=0x1032 +xgxs_rx_lane_map_xe14=0x1032 +xgxs_rx_lane_map_xe15=0x1032 +xgxs_rx_lane_map_xe20=0x1032 +xgxs_rx_lane_map_xe21=0x1032 +xgxs_rx_lane_map_xe22=0x1032 +xgxs_rx_lane_map_xe23=0x1032 +xgxs_rx_lane_map_xe45=0x1032 +xgxs_rx_lane_map_xe46=0x1032 +xgxs_rx_lane_map_xe47=0x1032 +xgxs_rx_lane_map_xe48=0x1032 + + +# RX - Config C. (FC 8/10) +# 0x3210 - port 16-19, 24-27 +xgxs_rx_lane_map_xe16=0x3210 +xgxs_rx_lane_map_xe17=0x3210 +xgxs_rx_lane_map_xe18=0x3210 +xgxs_rx_lane_map_xe19=0x3210 +xgxs_rx_lane_map_xe24=0x3210 +xgxs_rx_lane_map_xe25=0x3210 +xgxs_rx_lane_map_xe26=0x3210 +xgxs_rx_lane_map_xe27=0x3210 + + +# RX - Config D. (FC 12/13/17) +# 0x3210 - port 28-35, 40-43 +xgxs_rx_lane_map_xe28=0x3210 +xgxs_rx_lane_map_xe29=0x3210 +xgxs_rx_lane_map_xe30=0x3210 +xgxs_rx_lane_map_xe31=0x3210 +xgxs_rx_lane_map_xe32=0x3210 +xgxs_rx_lane_map_xe33=0x3210 +xgxs_rx_lane_map_xe34=0x3210 +xgxs_rx_lane_map_xe35=0x3210 +xgxs_rx_lane_map_xe41=0x3210 +xgxs_rx_lane_map_xe42=0x3210 +xgxs_rx_lane_map_xe43=0x3210 +xgxs_rx_lane_map_xe44=0x3210 + + +## Lane swapping for QSFP28 (100G) +## The HEX value is connection of red line within Falconcore in "Fig 3-4 SFP28 port connection" +# TX - Config A. (FC 21/25) +# 0x3210 - port ce0, ce3 +xgxs_tx_lane_map_ce0=0x3210 +xgxs_tx_lane_map_ce3=0x3210 + + +# TX - Config B. (FC 24) +# 0x3210 - port ce1 +xgxs_tx_lane_map_ce1=0x3210 + + +# TX - Config C. (FC 26) +# 0x3210 - port ce2 +xgxs_tx_lane_map_ce2=0x3210 + + +# TX - Config D. (FC 27) +# 0x3210 - ce5 +xgxs_tx_lane_map_ce5=0x3210 + + +# TX - Config E. (FC 29) +# 0x3210 - ce4 +xgxs_tx_lane_map_ce4=0x3210 + + +# RX - Config A. (FC 21/25) +# 0x1032 - port ce0, ce3 +xgxs_rx_lane_map_ce0=0x1032 +xgxs_rx_lane_map_ce3=0x1032 + + +# RX - Config B. (FC 24) +# 0x1032 - port ce1 +xgxs_rx_lane_map_ce1=0x1032 + + +# RX - Config C. (FC 26) +# 0x2301 - port ce2 +xgxs_rx_lane_map_ce2=0x2301 + + +# RX - Config D. (FC 27) +# 0x2301 - ce5 +xgxs_rx_lane_map_ce5=0x2301 + + +# TX - Config E. (FC 29) +# 0x3210 - ce4 +xgxs_rx_lane_map_ce4=0x3210 + +# EQ/iDriver + +# The first 16 ports, xe0-xe15 +serdes_preemphasis_1=0x2E380A +serdes_preemphasis_2=0x2E380A +serdes_preemphasis_3=0x2E380A +serdes_preemphasis_4=0x2E380A +serdes_preemphasis_5=0x2C3A0A +serdes_preemphasis_6=0x2C3A0A +serdes_preemphasis_7=0x2C3A0A +serdes_preemphasis_8=0x2C3A0A +serdes_preemphasis_9=0x323E00 +serdes_preemphasis_10=0x323E00 +serdes_preemphasis_11=0x304000 +serdes_preemphasis_12=0x304000 +serdes_preemphasis_13=0x2D4300 +serdes_preemphasis_14=0x304000 +serdes_preemphasis_15=0x2D4300 +serdes_preemphasis_16=0x2D4300 + +# The 2nd 20 ports, xe16-xe35 +serdes_preemphasis_34=0x2D4300 +serdes_preemphasis_35=0x2D4300 +serdes_preemphasis_36=0x2B4500 +serdes_preemphasis_37=0x2B4500 +serdes_preemphasis_38=0x2B4500 +serdes_preemphasis_39=0x2B4500 +serdes_preemphasis_40=0x2B4500 +serdes_preemphasis_41=0x2B4500 +serdes_preemphasis_42=0x2B4500 +serdes_preemphasis_43=0x2B4500 +serdes_preemphasis_44=0x284800 +serdes_preemphasis_45=0x284800 +serdes_preemphasis_46=0x284800 +serdes_preemphasis_47=0x284800 +serdes_preemphasis_48=0x284800 +serdes_preemphasis_49=0x284800 +serdes_preemphasis_50=0x2B4500 +serdes_preemphasis_51=0x2B4500 +serdes_preemphasis_52=0x284800 +serdes_preemphasis_53=0x284800 + +# The 3rd 12 ports, xe36-xe47 +serdes_preemphasis_68=0x284800 +serdes_preemphasis_69=0x2A4600 +serdes_preemphasis_70=0x2B4500 +serdes_preemphasis_71=0x2A4600 +serdes_preemphasis_72=0x2A4600 +serdes_preemphasis_73=0x2B4500 +serdes_preemphasis_74=0x2B4500 +serdes_preemphasis_75=0x2A4600 +serdes_preemphasis_76=0x2B4500 +serdes_preemphasis_77=0x2B4500 +serdes_preemphasis_78=0x2B4500 +serdes_preemphasis_79=0x2B4500 + +# 6 x 100G ports, expandable to 24 x 25G ports +serdes_preemphasis_80=0x2D4300 +serdes_preemphasis_81=0x2D4300 +serdes_preemphasis_82=0x2D4300 +serdes_preemphasis_83=0x2D4300 + +serdes_preemphasis_102=0x304000 +serdes_preemphasis_103=0x304000 +serdes_preemphasis_104=0x304000 +serdes_preemphasis_105=0x304000 + +serdes_preemphasis_106=0x304000 +serdes_preemphasis_107=0x304000 +serdes_preemphasis_108=0x304000 +serdes_preemphasis_109=0x304000 + +serdes_preemphasis_110=0x304000 +serdes_preemphasis_111=0x304000 +serdes_preemphasis_112=0x304000 +serdes_preemphasis_113=0x304000 + +serdes_preemphasis_114=0x2E360C +serdes_preemphasis_115=0x2E360C +serdes_preemphasis_116=0x2E360C +serdes_preemphasis_117=0x2E360C + +serdes_preemphasis_118=0x2E360C +serdes_preemphasis_119=0x2E360C +serdes_preemphasis_120=0x2E360C +serdes_preemphasis_121=0x2E360C diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/default_sku b/device/inventec/x86_64-inventec_d7054q28b-r0/default_sku new file mode 100644 index 00000000000..3b1520a5e17 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/default_sku @@ -0,0 +1 @@ +INVENTEC-D7054Q28B-S48-Q6 t1 diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/installer.conf b/device/inventec/x86_64-inventec_d7054q28b-r0/installer.conf new file mode 100644 index 00000000000..1db64ba02c3 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +VAR_LOG_SIZE=1024 diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/led_proc_init.soc b/device/inventec/x86_64-inventec_d7054q28b-r0/led_proc_init.soc new file mode 100644 index 00000000000..ceaa9a8e6d5 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/led_proc_init.soc @@ -0,0 +1,200 @@ +#LED processor initialization for Inventec d7054q28b platform + +led 0 stop +led 0 prog 02 00 60 F1 12 00 DA 0F 70 10 67 61 67 5C 77 06 02 A0 60 F0 02 00 60 F2 12 00 06 F0 4A 01 71 38 4A 02 27 67 5C 06 F2 28 32 08 67 5C 06 F2 28 32 00 32 01 B7 67 5C 77 44 67 64 67 5C 67 64 67 5C 67 61 67 5C DA 6C 70 4E 86 F0 86 F2 77 1A 12 00 DA 03 70 5A 67 64 67 5C 77 50 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=14 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=15 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=13 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=10 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=11 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=9 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=6 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=7 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=5 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=2 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=0 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=1 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=31 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=30 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=29 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=35 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=34 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=33 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=23 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=22 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=21 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=27 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=26 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=25 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=19 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=18 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=17 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=16 +led 0 start + +led 1 stop +led 1 prog 02 00 60 F1 12 00 DA 0F 70 10 67 61 67 5C 77 06 02 A0 60 F0 02 00 60 F2 12 00 06 F0 4A 01 71 38 4A 02 27 67 5C 06 F2 28 32 08 67 5C 06 F2 28 32 00 32 01 B7 67 5C 77 44 67 64 67 5C 67 64 67 5C 67 61 67 5C DA 6C 70 4E 86 F0 86 F2 77 1A 12 00 DA 03 70 5A 67 64 67 5C 77 50 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=2 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=3 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=1 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=6 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=7 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=5 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=10 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=9 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=14 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=15 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=13 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=18 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=19 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=17 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=22 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=23 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=21 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=26 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=27 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=25 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=30 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=31 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=29 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=35 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=34 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=33 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=63 +led 1 start + +# Set per port speed config of LED Color register +# For Invnetec Cypress platform, +# If we want to set 10G speed per port, We need to set amber color light, so use cmd "setreg CMIC_LEDUP0_DATA_RAM(160) 0x04". +# If we want to set 25G ( or up ) speed per port, we need to set green color light, so use cmd "setreg CMIC_LEDUP0_DATA_RAM(160) 0x00". + +setreg CMIC_LEDUP0_DATA_RAM(160) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(161) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(162) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(163) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(164) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(165) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(166) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(167) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(168) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(169) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(170) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(171) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(172) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(173) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(174) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(175) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(176) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(177) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(178) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(179) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(180) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(181) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(182) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(183) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(184) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(185) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(186) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(187) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(188) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(189) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(190) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(191) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(192) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(193) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(194) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(195) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(196) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(197) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(198) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(199) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(200) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(201) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(202) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(203) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(204) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(205) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(206) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(207) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(208) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(209) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(210) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(211) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(212) 0x00 +setreg CMIC_LEDUP0_DATA_RAM(213) 0x00 + +age 150 + diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/plugins/eeprom.py b/device/inventec/x86_64-inventec_d7054q28b-r0/plugins/eeprom.py new file mode 100644 index 00000000000..de5c24ba0e6 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7032q28b +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/plugins/psuutil.py b/device/inventec/x86_64-inventec_d7054q28b-r0/plugins/psuutil.py new file mode 100644 index 00000000000..4bd3f7a2705 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/plugins/psuutil.py @@ -0,0 +1,84 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + PSU_DIR = "/sys/bus/i2c/devices/0-0066" + + def __init__(self): + PsuBase.__init__(self) + +# Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psoc_psu'+ str(index) + '_iout' + attr_path = self.PSU_DIR +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU status + if (attr_value != 0): + status = 1 + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + ind = index-1 + attr_file ='psu'+ str(ind) + attr_path = self.PSU_DIR +'/' + attr_file + normal_attr_value = '0 : normal' + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU presence + if (attr_value == normal_attr_value): + status = 1 + return status diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/plugins/sfputil.py b/device/inventec/x86_64-inventec_d7054q28b-r0/plugins/sfputil.py new file mode 100755 index 00000000000..5dffdd0335b --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/plugins/sfputil.py @@ -0,0 +1,217 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 53 + PORTS_IN_BLOCK = 54 + QSFP_PORT_START = 48 + QSFP_PORT_END = 53 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0: 11, + 1: 10, + 2: 13, + 3: 12, + 4: 15, + 5: 14, + 6: 17, + 7: 16, + 8: 19, + 9: 18, + 10: 21, + 11: 20, + 12: 23, + 13: 22, + 14: 25, + 15: 24, + 16: 27, + 17: 26, + 18: 29, + 19: 28, + 20: 31, + 21: 30, + 22: 33, + 23: 32, + 24: 35, + 25: 34, + 26: 37, + 27: 36, + 28: 39, + 29: 38, + 30: 41, + 31: 40, + 32: 43, + 33: 42, + 34: 45, + 35: 44, + 36: 47, + 37: 46, + 38: 49, + 39: 48, + 40: 51, + 41: 50, + 42: 53, + 43: 52, + 44: 55, + 45: 54, + 46: 57, + 47: 56, + 48: 59, + 49: 58, + 50: 61, + 51: 60, + 52: 63, + 53: 62 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/bus/i2c/devices/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/class/swps/port"+str(port_num)+"/reset" + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/inventec/x86_64-inventec_d7054q28b-r0/sensors.conf b/device/inventec/x86_64-inventec_d7054q28b-r0/sensors.conf new file mode 100644 index 00000000000..b3fd61236c9 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7054q28b-r0/sensors.conf @@ -0,0 +1,44 @@ +# libsensors configuration file +chip "inv_psoc-*" + label temp1 "FrontSide Temperature" + label temp2 "FanBoard Temperature" + label temp3 "NearASIC Temperature" + label temp4 "NearPSU Temperature" + label temp5 "CPU Board Temperature" + label temp6 "ASIC Temperature" + label temp7 "PSU1 Temperature1" + label temp8 "PSU2 Temperature1" + label temp9 "PSU1 Temperature2" + label temp10 "PSU2 Temperature2" + label fan1 "FanModule1 Front RPM" + label fan2 "FanModule1 Rear RPM" + label fan3 "FanModule2 Front RPM" + label fan4 "FanModule2 Rear RPM" + label fan5 "FanModule3 Front RPM" + label fan6 "FanModule3 Rear RPM" + label fan7 "FanModule4 Front RPM" + label fan8 "FanModule4 Rear RPM" + label fan9 "FanModule5 Front RPM" + label fan10 "FanModule5 Rear RPM" + label pwm1 "FanModule1 PWM" + label pwm2 "FanModule2 PWM" + label pwm3 "FanModule3 PWM" + label pwm4 "FanModule4 PWM" + label pwm5 "FanModule5 PWM" + label pwm6 "PSU1 FAN PWM" + label pwm7 "PSU2 FAN PWM" + label fan11 "PSU1 FAN RPM" + label fan12 "PSU2 FAN RPM" + label in1 "PSU1 Input Voltage" + label in2 "PSU2 Input Voltage" + label curr1 "PSU1 Input Current" + label curr2 "PSU2 Input Current" + label power1 "PSU1 Input Power" + label power2 "PSU2 Input Power" + label in3 "PSU1 Output Voltage" + label in4 "PSU2 Output Voltage" + label curr3 "PSU1 Output Current" + label curr4 "PSU2 Output Current" + label power3 "PSU1 Output Power" + label power4 "PSU2 Output Power" + diff --git a/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/buffers.json.j2 b/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/buffers.json.j2 new file mode 100644 index 00000000000..22f36714081 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/buffers.json.j2 @@ -0,0 +1,128 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_speed = '100G' %} +{% set default_ports_num = 64 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "CABLE_LENGTH": { + "AZURE": { + {% for port in PORT %} + {% set cable = cable_length(port) -%} + "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %} + + {% endfor %} + } + }, + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "6000000", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "8072396", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"18432", + "xoff":"40560", + "size":"41808", + "dynamic_th":"-4", + "xon_offset":"2496" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"6000000" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/port_config.ini b/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/port_config.ini new file mode 100644 index 00000000000..fe90a51426c --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias index speed +Ethernet0 9,10,11,12 Ethernet0 0 100000 +Ethernet4 1,2,3,4 Ethernet4 1 100000 +Ethernet8 25,26,27,28 Ethernet8 2 100000 +Ethernet12 17,18,19,20 Ethernet12 3 100000 +Ethernet16 41,42,43,44 Ethernet16 4 100000 +Ethernet20 33,34,35,36 Ethernet20 5 100000 +Ethernet24 57,58,59,60 Ethernet24 6 100000 +Ethernet28 49,50,51,52 Ethernet28 7 100000 +Ethernet32 73,74,75,76 Ethernet32 8 100000 +Ethernet36 65,66,67,68 Ethernet36 9 100000 +Ethernet40 89,90,91,92 Ethernet40 10 100000 +Ethernet44 81,82,83,84 Ethernet44 11 100000 +Ethernet48 105,106,107,108 Ethernet48 12 100000 +Ethernet52 97,98,99,100 Ethernet52 13 100000 +Ethernet56 121,122,123,124 Ethernet56 14 100000 +Ethernet60 113,114,115,116 Ethernet60 15 100000 +Ethernet64 137,138,139,140 Ethernet64 16 100000 +Ethernet68 129,130,131,132 Ethernet68 17 100000 +Ethernet72 153,154,155,156 Ethernet72 18 100000 +Ethernet76 145,146,147,148 Ethernet76 19 100000 +Ethernet80 169,170,171,172 Ethernet80 20 100000 +Ethernet84 161,162,163,164 Ethernet84 21 100000 +Ethernet88 185,186,187,188 Ethernet88 22 100000 +Ethernet92 177,178,179,180 Ethernet92 23 100000 +Ethernet96 201,202,203,204 Ethernet96 24 100000 +Ethernet100 193,194,195,196 Ethernet100 25 100000 +Ethernet104 217,218,219,220 Ethernet104 26 100000 +Ethernet108 209,210,211,212 Ethernet108 27 100000 +Ethernet112 233,234,235,236 Ethernet112 28 100000 +Ethernet116 225,226,227,228 Ethernet116 29 100000 +Ethernet120 249,250,251,252 Ethernet120 30 100000 +Ethernet124 241,242,243,244 Ethernet124 31 100000 +Ethernet128 13,14,15,16 Ethernet128 32 100000 +Ethernet132 5,6,7,8 Ethernet132 33 100000 +Ethernet136 29,30,31,32 Ethernet136 34 100000 +Ethernet140 21,22,23,24 Ethernet140 35 100000 +Ethernet144 45,46,47,48 Ethernet144 36 100000 +Ethernet148 37,38,39,40 Ethernet148 37 100000 +Ethernet152 61,62,63,64 Ethernet152 38 100000 +Ethernet156 53,54,55,56 Ethernet156 39 100000 +Ethernet160 77,78,79,80 Ethernet160 40 100000 +Ethernet164 69,70,71,72 Ethernet164 41 100000 +Ethernet168 93,94,95,96 Ethernet168 42 100000 +Ethernet172 85,86,87,88 Ethernet172 43 100000 +Ethernet176 109,110,111,112 Ethernet176 44 100000 +Ethernet180 101,102,103,104 Ethernet180 45 100000 +Ethernet184 125,126,127,128 Ethernet184 46 100000 +Ethernet188 117,118,119,120 Ethernet188 47 100000 +Ethernet192 141,142,143,144 Ethernet192 48 100000 +Ethernet196 133,134,135,136 Ethernet196 49 100000 +Ethernet200 157,158,159,160 Ethernet200 50 100000 +Ethernet204 149,150,151,152 Ethernet204 51 100000 +Ethernet208 173,174,175,176 Ethernet208 52 100000 +Ethernet212 165,166,167,168 Ethernet212 53 100000 +Ethernet216 189,190,191,192 Ethernet216 54 100000 +Ethernet220 181,182,183,184 Ethernet220 55 100000 +Ethernet224 205,206,207,208 Ethernet224 56 100000 +Ethernet228 197,198,199,200 Ethernet228 57 100000 +Ethernet232 221,222,223,224 Ethernet232 58 100000 +Ethernet236 213,214,215,216 Ethernet236 59 100000 +Ethernet240 237,238,239,240 Ethernet240 60 100000 +Ethernet244 229,230,231,232 Ethernet244 61 100000 +Ethernet248 253,254,255,256 Ethernet248 62 100000 +Ethernet252 245,246,247,248 Ethernet252 63 100000 diff --git a/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/qos.json.j2 b/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/qos.json.j2 new file mode 100644 index 00000000000..f3b1e7e8200 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/qos.json.j2 @@ -0,0 +1,143 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable": "3,4" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"312000", + "red_min_threshold":"104000", + "yellow_max_threshold":"312000", + "yellow_min_threshold":"104000", + "green_max_threshold":"312000", + "green_min_threshold":"104000" + } + }, + "QUEUE": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252|0" : { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252|1" : { + "scheduler" : "[SCHEDULER|scheduler.2]" + } + } +} diff --git a/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/sai.profile b/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/sai.profile new file mode 100644 index 00000000000..38c71bfae7b --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-d7264-64x100g.config.bcm +SAI_NUM_ECMP_MEMBERS=32 diff --git a/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/th2-d7264-64x100g.config.bcm b/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/th2-d7264-64x100g.config.bcm new file mode 100644 index 00000000000..a76bcecbcac --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264-r0/INVENTEC-D7264/th2-d7264-64x100g.config.bcm @@ -0,0 +1,1157 @@ +# Sequoia BCM Shell config / 100G * 64 ports + +core_clock_frequency=1700 +dpp_clock_ratio=2:3 +load_firmware=1 + +# 64 ports config for 100G +# For Tomahawk FalconCore: +#Physical ports in FalconCore[0-15] must map to logical port[1-32] at any order +#Physical ports in FalconCore[16-31] must map to logical port[34-65] at any order +#Physical ports in FalconCore[32-47] must map to logical port[68-99] at any order +#Physical ports in FalconCore[48-63] must map to logical port[102-133] at any order + +## FalconCore[0-15] +portmap_1=9:100 +portmap_2=1:100 +portmap_3=13:100 +portmap_4=5:100 +portmap_5=25:100 +portmap_6=17:100 +portmap_7=29:100 +portmap_8=21:100 +portmap_9=41:100 +portmap_10=33:100 +portmap_11=45:100 +portmap_12=37:100 +portmap_13=57:100 +portmap_14=49:100 +portmap_15=61:100 +portmap_16=53:100 + +## FalconCore[16-31] +portmap_34=73:100 +portmap_35=65:100 +portmap_36=77:100 +portmap_37=69:100 +portmap_38=89:100 +portmap_39=81:100 +portmap_40=93:100 +portmap_41=85:100 +portmap_42=105:100 +portmap_43=97:100 +portmap_44=109:100 +portmap_45=101:100 +portmap_46=121:100 +portmap_47=113:100 +portmap_48=125:100 +portmap_49=117:100 + +## FalconCore[32-47] +portmap_68=137:100 +portmap_69=129:100 +portmap_70=141:100 +portmap_71=133:100 +portmap_72=153:100 +portmap_73=145:100 +portmap_74=157:100 +portmap_75=149:100 +portmap_76=169:100 +portmap_77=161:100 +portmap_78=173:100 +portmap_79=165:100 +portmap_80=185:100 +portmap_81=177:100 +portmap_82=189:100 +portmap_83=181:100 + +## FalconCore[48-63] +portmap_102=201:100 +portmap_103=193:100 +portmap_104=205:100 +portmap_105=197:100 +portmap_106=217:100 +portmap_107=209:100 +portmap_108=221:100 +portmap_109=213:100 +portmap_110=233:100 +portmap_111=225:100 +portmap_112=237:100 +portmap_113=229:100 +portmap_114=249:100 +portmap_115=241:100 +portmap_116=253:100 +portmap_117=245:100 + +pbmp_xport_xe=0x3FFFD0000FFFF40003FFFC0001FFFE +oversubscribe_mode=1 +l2_mem_entries=73728 +l3_mem_entries=73728 +fpem_mem_entries=65536 +l2xmsg_mode=1 + +## FalconCore [0-15] port TX Lane Swapping +phy_chain_tx_lane_map_physical{1.0}=0x3201 +phy_chain_tx_lane_map_physical{5.0}=0x3210 +phy_chain_tx_lane_map_physical{9.0}=0x2301 +phy_chain_tx_lane_map_physical{13.0}=0x3210 +phy_chain_tx_lane_map_physical{17.0}=0x3201 +phy_chain_tx_lane_map_physical{21.0}=0x3201 +phy_chain_tx_lane_map_physical{25.0}=0x3201 +phy_chain_tx_lane_map_physical{29.0}=0x3210 +phy_chain_tx_lane_map_physical{33.0}=0x3201 +phy_chain_tx_lane_map_physical{37.0}=0x3210 +phy_chain_tx_lane_map_physical{41.0}=0x3210 +phy_chain_tx_lane_map_physical{45.0}=0x3210 +phy_chain_tx_lane_map_physical{49.0}=0x3201 +phy_chain_tx_lane_map_physical{53.0}=0x3210 +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_tx_lane_map_physical{61.0}=0x3210 + + +## FalconCore [16-31] port TX Lane Swapping +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_tx_lane_map_physical{69.0}=0x3201 +phy_chain_tx_lane_map_physical{73.0}=0x3210 +phy_chain_tx_lane_map_physical{77.0}=0x3210 +phy_chain_tx_lane_map_physical{81.0}=0x3210 +phy_chain_tx_lane_map_physical{85.0}=0x3210 +phy_chain_tx_lane_map_physical{89.0}=0x3210 +phy_chain_tx_lane_map_physical{93.0}=0x3210 +phy_chain_tx_lane_map_physical{97.0}=0x3210 +phy_chain_tx_lane_map_physical{101.0}=0x2310 +phy_chain_tx_lane_map_physical{105.0}=0x2310 +phy_chain_tx_lane_map_physical{109.0}=0x3210 +phy_chain_tx_lane_map_physical{113.0}=0x3210 +phy_chain_tx_lane_map_physical{117.0}=0x2310 +phy_chain_tx_lane_map_physical{121.0}=0x2310 +phy_chain_tx_lane_map_physical{125.0}=0x3210 + + +## FalconCore [32-47] port TX Lane Swapping +phy_chain_tx_lane_map_physical{129.0}=0x2301 +phy_chain_tx_lane_map_physical{133.0}=0x3210 +phy_chain_tx_lane_map_physical{137.0}=0x2301 +phy_chain_tx_lane_map_physical{141.0}=0x3210 +phy_chain_tx_lane_map_physical{145.0}=0x2301 +phy_chain_tx_lane_map_physical{149.0}=0x3210 +phy_chain_tx_lane_map_physical{153.0}=0x3210 +phy_chain_tx_lane_map_physical{157.0}=0x3210 +phy_chain_tx_lane_map_physical{161.0}=0x2310 +phy_chain_tx_lane_map_physical{165.0}=0x2310 +phy_chain_tx_lane_map_physical{169.0}=0x2310 +phy_chain_tx_lane_map_physical{173.0}=0x3210 +phy_chain_tx_lane_map_physical{177.0}=0x3210 +phy_chain_tx_lane_map_physical{181.0}=0x2310 +phy_chain_tx_lane_map_physical{185.0}=0x3210 +phy_chain_tx_lane_map_physical{189.0}=0x2310 + + +## FalconCore [48-63] port TX Lane Swapping +phy_chain_tx_lane_map_physical{193.0}=0x2310 +phy_chain_tx_lane_map_physical{197.0}=0x2310 +phy_chain_tx_lane_map_physical{201.0}=0x2310 +phy_chain_tx_lane_map_physical{205.0}=0x2310 +phy_chain_tx_lane_map_physical{209.0}=0x3210 +phy_chain_tx_lane_map_physical{213.0}=0x2310 +phy_chain_tx_lane_map_physical{217.0}=0x3210 +phy_chain_tx_lane_map_physical{221.0}=0x2301 +phy_chain_tx_lane_map_physical{225.0}=0x3210 +phy_chain_tx_lane_map_physical{229.0}=0x2310 +phy_chain_tx_lane_map_physical{233.0}=0x2310 +phy_chain_tx_lane_map_physical{237.0}=0x1023 +phy_chain_tx_lane_map_physical{241.0}=0x3210 +phy_chain_tx_lane_map_physical{245.0}=0x2310 +phy_chain_tx_lane_map_physical{249.0}=0x3210 +phy_chain_tx_lane_map_physical{253.0}=0x2310 + +## FalconCore [0-15] port RX Lane Swapping +phy_chain_rx_lane_map_physical{1.0}=0x3210 +phy_chain_rx_lane_map_physical{5.0}=0x3210 +phy_chain_rx_lane_map_physical{9.0}=0x3210 +phy_chain_rx_lane_map_physical{13.0}=0x3210 +phy_chain_rx_lane_map_physical{17.0}=0x2310 +phy_chain_rx_lane_map_physical{21.0}=0x0213 +phy_chain_rx_lane_map_physical{25.0}=0x2310 +phy_chain_rx_lane_map_physical{29.0}=0x3210 +phy_chain_rx_lane_map_physical{33.0}=0x3210 +phy_chain_rx_lane_map_physical{37.0}=0x3210 +phy_chain_rx_lane_map_physical{41.0}=0x3210 +phy_chain_rx_lane_map_physical{45.0}=0x3210 +phy_chain_rx_lane_map_physical{49.0}=0x3210 +phy_chain_rx_lane_map_physical{53.0}=0x3210 +phy_chain_rx_lane_map_physical{57.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x3210 + + +## FalconCore [16-31] port RX Lane Swapping +phy_chain_rx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{73.0}=0x3210 +phy_chain_rx_lane_map_physical{77.0}=0x3210 +phy_chain_rx_lane_map_physical{81.0}=0x3210 +phy_chain_rx_lane_map_physical{85.0}=0x3210 +phy_chain_rx_lane_map_physical{89.0}=0x3210 +phy_chain_rx_lane_map_physical{93.0}=0x3210 +phy_chain_rx_lane_map_physical{97.0}=0x3210 +phy_chain_rx_lane_map_physical{101.0}=0x3201 +phy_chain_rx_lane_map_physical{105.0}=0x3210 +phy_chain_rx_lane_map_physical{109.0}=0x3210 +phy_chain_rx_lane_map_physical{113.0}=0x3210 +phy_chain_rx_lane_map_physical{117.0}=0x3210 +phy_chain_rx_lane_map_physical{121.0}=0x3210 +phy_chain_rx_lane_map_physical{125.0}=0x3210 + + +## FalconCore [32-47] port RX Lane Swapping +phy_chain_rx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_lane_map_physical{133.0}=0x2301 +phy_chain_rx_lane_map_physical{137.0}=0x3210 +phy_chain_rx_lane_map_physical{141.0}=0x2310 +phy_chain_rx_lane_map_physical{145.0}=0x3210 +phy_chain_rx_lane_map_physical{149.0}=0x3210 +phy_chain_rx_lane_map_physical{153.0}=0x3210 +phy_chain_rx_lane_map_physical{157.0}=0x3210 +phy_chain_rx_lane_map_physical{161.0}=0x3210 +phy_chain_rx_lane_map_physical{165.0}=0x3210 +phy_chain_rx_lane_map_physical{169.0}=0x3210 +phy_chain_rx_lane_map_physical{173.0}=0x3210 +phy_chain_rx_lane_map_physical{177.0}=0x3210 +phy_chain_rx_lane_map_physical{181.0}=0x3210 +phy_chain_rx_lane_map_physical{185.0}=0x3210 +phy_chain_rx_lane_map_physical{189.0}=0x3210 + + +## FalconCore [48-63] port RX Lan Swapping +phy_chain_rx_lane_map_physical{193.0}=0x3210 +phy_chain_rx_lane_map_physical{197.0}=0x3210 +phy_chain_rx_lane_map_physical{201.0}=0x3210 +phy_chain_rx_lane_map_physical{205.0}=0x3210 +phy_chain_rx_lane_map_physical{209.0}=0x3210 +phy_chain_rx_lane_map_physical{213.0}=0x3210 +phy_chain_rx_lane_map_physical{217.0}=0x3210 +phy_chain_rx_lane_map_physical{221.0}=0x3210 +phy_chain_rx_lane_map_physical{225.0}=0x3210 +phy_chain_rx_lane_map_physical{229.0}=0x2301 +phy_chain_rx_lane_map_physical{233.0}=0x3210 +phy_chain_rx_lane_map_physical{237.0}=0x1023 +phy_chain_rx_lane_map_physical{241.0}=0x3210 +phy_chain_rx_lane_map_physical{245.0}=0x3210 +phy_chain_rx_lane_map_physical{249.0}=0x3210 +phy_chain_rx_lane_map_physical{253.0}=0x3210 + + +## FalconCore[0-15] ports TX polarity flip +phy_chain_tx_polarity_flip_physical{1.0}=0x1 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{37.0}=0x0 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x0 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_tx_polarity_flip_physical{56.0}=0x0 +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_tx_polarity_flip_physical{58.0}=0x0 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 + +## FalconCore[16-31] ports TX polarity flip +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_tx_polarity_flip_physical{82.0}=0x0 +phy_chain_tx_polarity_flip_physical{83.0}=0x0 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x0 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x0 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_tx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x0 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 +phy_chain_tx_polarity_flip_physical{113.0}=0x0 +phy_chain_tx_polarity_flip_physical{114.0}=0x1 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x0 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x0 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 + +## FalconCore[32-47] ports TX polarity flip +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_tx_polarity_flip_physical{133.0}=0x0 +phy_chain_tx_polarity_flip_physical{134.0}=0x0 +phy_chain_tx_polarity_flip_physical{135.0}=0x0 +phy_chain_tx_polarity_flip_physical{136.0}=0x0 +phy_chain_tx_polarity_flip_physical{137.0}=0x0 +phy_chain_tx_polarity_flip_physical{138.0}=0x1 +phy_chain_tx_polarity_flip_physical{139.0}=0x0 +phy_chain_tx_polarity_flip_physical{140.0}=0x0 +phy_chain_tx_polarity_flip_physical{141.0}=0x0 +phy_chain_tx_polarity_flip_physical{142.0}=0x0 +phy_chain_tx_polarity_flip_physical{143.0}=0x0 +phy_chain_tx_polarity_flip_physical{144.0}=0x0 +phy_chain_tx_polarity_flip_physical{145.0}=0x1 +phy_chain_tx_polarity_flip_physical{146.0}=0x0 +phy_chain_tx_polarity_flip_physical{147.0}=0x0 +phy_chain_tx_polarity_flip_physical{148.0}=0x0 +phy_chain_tx_polarity_flip_physical{149.0}=0x0 +phy_chain_tx_polarity_flip_physical{150.0}=0x0 +phy_chain_tx_polarity_flip_physical{151.0}=0x0 +phy_chain_tx_polarity_flip_physical{152.0}=0x0 +phy_chain_tx_polarity_flip_physical{153.0}=0x0 +phy_chain_tx_polarity_flip_physical{154.0}=0x1 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x0 +phy_chain_tx_polarity_flip_physical{157.0}=0x0 +phy_chain_tx_polarity_flip_physical{158.0}=0x0 +phy_chain_tx_polarity_flip_physical{159.0}=0x0 +phy_chain_tx_polarity_flip_physical{160.0}=0x0 +phy_chain_tx_polarity_flip_physical{161.0}=0x1 +phy_chain_tx_polarity_flip_physical{162.0}=0x0 +phy_chain_tx_polarity_flip_physical{163.0}=0x0 +phy_chain_tx_polarity_flip_physical{164.0}=0x0 +phy_chain_tx_polarity_flip_physical{165.0}=0x0 +phy_chain_tx_polarity_flip_physical{166.0}=0x0 +phy_chain_tx_polarity_flip_physical{167.0}=0x0 +phy_chain_tx_polarity_flip_physical{168.0}=0x0 +phy_chain_tx_polarity_flip_physical{169.0}=0x0 +phy_chain_tx_polarity_flip_physical{170.0}=0x1 +phy_chain_tx_polarity_flip_physical{171.0}=0x0 +phy_chain_tx_polarity_flip_physical{172.0}=0x0 +phy_chain_tx_polarity_flip_physical{173.0}=0x0 +phy_chain_tx_polarity_flip_physical{174.0}=0x0 +phy_chain_tx_polarity_flip_physical{175.0}=0x0 +phy_chain_tx_polarity_flip_physical{176.0}=0x0 +phy_chain_tx_polarity_flip_physical{177.0}=0x0 +phy_chain_tx_polarity_flip_physical{178.0}=0x1 +phy_chain_tx_polarity_flip_physical{179.0}=0x0 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 +phy_chain_tx_polarity_flip_physical{181.0}=0x0 +phy_chain_tx_polarity_flip_physical{182.0}=0x0 +phy_chain_tx_polarity_flip_physical{183.0}=0x0 +phy_chain_tx_polarity_flip_physical{184.0}=0x0 +phy_chain_tx_polarity_flip_physical{185.0}=0x0 +phy_chain_tx_polarity_flip_physical{186.0}=0x0 +phy_chain_tx_polarity_flip_physical{187.0}=0x0 +phy_chain_tx_polarity_flip_physical{188.0}=0x0 +phy_chain_tx_polarity_flip_physical{189.0}=0x0 +phy_chain_tx_polarity_flip_physical{190.0}=0x0 +phy_chain_tx_polarity_flip_physical{191.0}=0x0 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 + +## FalconCore[48-63] ports TX polarity flip +phy_chain_tx_polarity_flip_physical{193.0}=0x1 +phy_chain_tx_polarity_flip_physical{194.0}=0x0 +phy_chain_tx_polarity_flip_physical{195.0}=0x0 +phy_chain_tx_polarity_flip_physical{196.0}=0x0 +phy_chain_tx_polarity_flip_physical{197.0}=0x0 +phy_chain_tx_polarity_flip_physical{198.0}=0x0 +phy_chain_tx_polarity_flip_physical{199.0}=0x0 +phy_chain_tx_polarity_flip_physical{200.0}=0x0 +phy_chain_tx_polarity_flip_physical{201.0}=0x0 +phy_chain_tx_polarity_flip_physical{202.0}=0x1 +phy_chain_tx_polarity_flip_physical{203.0}=0x0 +phy_chain_tx_polarity_flip_physical{204.0}=0x0 +phy_chain_tx_polarity_flip_physical{205.0}=0x0 +phy_chain_tx_polarity_flip_physical{206.0}=0x0 +phy_chain_tx_polarity_flip_physical{207.0}=0x0 +phy_chain_tx_polarity_flip_physical{208.0}=0x0 +phy_chain_tx_polarity_flip_physical{209.0}=0x0 +phy_chain_tx_polarity_flip_physical{210.0}=0x0 +phy_chain_tx_polarity_flip_physical{211.0}=0x0 +phy_chain_tx_polarity_flip_physical{212.0}=0x0 +phy_chain_tx_polarity_flip_physical{213.0}=0x0 +phy_chain_tx_polarity_flip_physical{214.0}=0x0 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x0 +phy_chain_tx_polarity_flip_physical{217.0}=0x1 +phy_chain_tx_polarity_flip_physical{218.0}=0x0 +phy_chain_tx_polarity_flip_physical{219.0}=0x0 +phy_chain_tx_polarity_flip_physical{220.0}=0x0 +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x0 +phy_chain_tx_polarity_flip_physical{223.0}=0x0 +phy_chain_tx_polarity_flip_physical{224.0}=0x0 +phy_chain_tx_polarity_flip_physical{225.0}=0x1 +phy_chain_tx_polarity_flip_physical{226.0}=0x0 +phy_chain_tx_polarity_flip_physical{227.0}=0x0 +phy_chain_tx_polarity_flip_physical{228.0}=0x0 +phy_chain_tx_polarity_flip_physical{229.0}=0x0 +phy_chain_tx_polarity_flip_physical{230.0}=0x0 +phy_chain_tx_polarity_flip_physical{231.0}=0x0 +phy_chain_tx_polarity_flip_physical{232.0}=0x0 +phy_chain_tx_polarity_flip_physical{233.0}=0x1 +phy_chain_tx_polarity_flip_physical{234.0}=0x0 +phy_chain_tx_polarity_flip_physical{235.0}=0x0 +phy_chain_tx_polarity_flip_physical{236.0}=0x0 +phy_chain_tx_polarity_flip_physical{237.0}=0x0 +phy_chain_tx_polarity_flip_physical{238.0}=0x0 +phy_chain_tx_polarity_flip_physical{239.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x0 +phy_chain_tx_polarity_flip_physical{241.0}=0x1 +phy_chain_tx_polarity_flip_physical{242.0}=0x0 +phy_chain_tx_polarity_flip_physical{243.0}=0x0 +phy_chain_tx_polarity_flip_physical{244.0}=0x0 +phy_chain_tx_polarity_flip_physical{245.0}=0x0 +phy_chain_tx_polarity_flip_physical{246.0}=0x0 +phy_chain_tx_polarity_flip_physical{247.0}=0x0 +phy_chain_tx_polarity_flip_physical{248.0}=0x1 +phy_chain_tx_polarity_flip_physical{249.0}=0x1 +phy_chain_tx_polarity_flip_physical{250.0}=0x0 +phy_chain_tx_polarity_flip_physical{251.0}=0x0 +phy_chain_tx_polarity_flip_physical{252.0}=0x0 +phy_chain_tx_polarity_flip_physical{253.0}=0x0 +phy_chain_tx_polarity_flip_physical{254.0}=0x0 +phy_chain_tx_polarity_flip_physical{255.0}=0x0 +phy_chain_tx_polarity_flip_physical{256.0}=0x1 + +## FalconCore[0-15] ports RX polarity flip +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{37.0}=0x0 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +## FalconCore [16-31] ports RX polarity flip +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{83.0}=0x0 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_rx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{91.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x0 +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{97.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x0 +phy_chain_rx_polarity_flip_physical{111.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{117.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x0 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{127.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +## FalconCore [32-47] ports RX polarity flip +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{133.0}=0x0 +phy_chain_rx_polarity_flip_physical{134.0}=0x0 +phy_chain_rx_polarity_flip_physical{135.0}=0x0 +phy_chain_rx_polarity_flip_physical{136.0}=0x0 +phy_chain_rx_polarity_flip_physical{137.0}=0x0 +phy_chain_rx_polarity_flip_physical{138.0}=0x0 +phy_chain_rx_polarity_flip_physical{139.0}=0x0 +phy_chain_rx_polarity_flip_physical{140.0}=0x0 +phy_chain_rx_polarity_flip_physical{141.0}=0x0 +phy_chain_rx_polarity_flip_physical{142.0}=0x0 +phy_chain_rx_polarity_flip_physical{143.0}=0x0 +phy_chain_rx_polarity_flip_physical{144.0}=0x0 +phy_chain_rx_polarity_flip_physical{145.0}=0x0 +phy_chain_rx_polarity_flip_physical{146.0}=0x0 +phy_chain_rx_polarity_flip_physical{147.0}=0x0 +phy_chain_rx_polarity_flip_physical{148.0}=0x1 +phy_chain_rx_polarity_flip_physical{149.0}=0x0 +phy_chain_rx_polarity_flip_physical{150.0}=0x0 +phy_chain_rx_polarity_flip_physical{151.0}=0x0 +phy_chain_rx_polarity_flip_physical{152.0}=0x0 +phy_chain_rx_polarity_flip_physical{153.0}=0x0 +phy_chain_rx_polarity_flip_physical{154.0}=0x0 +phy_chain_rx_polarity_flip_physical{155.0}=0x0 +phy_chain_rx_polarity_flip_physical{156.0}=0x1 +phy_chain_rx_polarity_flip_physical{157.0}=0x0 +phy_chain_rx_polarity_flip_physical{158.0}=0x0 +phy_chain_rx_polarity_flip_physical{159.0}=0x0 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 +phy_chain_rx_polarity_flip_physical{161.0}=0x0 +phy_chain_rx_polarity_flip_physical{162.0}=0x0 +phy_chain_rx_polarity_flip_physical{163.0}=0x0 +phy_chain_rx_polarity_flip_physical{164.0}=0x0 +phy_chain_rx_polarity_flip_physical{165.0}=0x0 +phy_chain_rx_polarity_flip_physical{166.0}=0x0 +phy_chain_rx_polarity_flip_physical{167.0}=0x0 +phy_chain_rx_polarity_flip_physical{168.0}=0x0 +phy_chain_rx_polarity_flip_physical{169.0}=0x0 +phy_chain_rx_polarity_flip_physical{170.0}=0x0 +phy_chain_rx_polarity_flip_physical{171.0}=0x0 +phy_chain_rx_polarity_flip_physical{172.0}=0x0 +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x0 +phy_chain_rx_polarity_flip_physical{175.0}=0x0 +phy_chain_rx_polarity_flip_physical{176.0}=0x0 +phy_chain_rx_polarity_flip_physical{177.0}=0x0 +phy_chain_rx_polarity_flip_physical{178.0}=0x0 +phy_chain_rx_polarity_flip_physical{179.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x0 +phy_chain_rx_polarity_flip_physical{181.0}=0x0 +phy_chain_rx_polarity_flip_physical{182.0}=0x0 +phy_chain_rx_polarity_flip_physical{183.0}=0x0 +phy_chain_rx_polarity_flip_physical{184.0}=0x0 +phy_chain_rx_polarity_flip_physical{185.0}=0x0 +phy_chain_rx_polarity_flip_physical{186.0}=0x0 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x0 +phy_chain_rx_polarity_flip_physical{189.0}=0x0 +phy_chain_rx_polarity_flip_physical{190.0}=0x0 +phy_chain_rx_polarity_flip_physical{191.0}=0x0 +phy_chain_rx_polarity_flip_physical{192.0}=0x0 + +## FalconCore [48-63] ports RX polarity flip +phy_chain_rx_polarity_flip_physical{193.0}=0x0 +phy_chain_rx_polarity_flip_physical{194.0}=0x0 +phy_chain_rx_polarity_flip_physical{195.0}=0x0 +phy_chain_rx_polarity_flip_physical{196.0}=0x0 +phy_chain_rx_polarity_flip_physical{197.0}=0x0 +phy_chain_rx_polarity_flip_physical{198.0}=0x0 +phy_chain_rx_polarity_flip_physical{199.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x0 +phy_chain_rx_polarity_flip_physical{201.0}=0x0 +phy_chain_rx_polarity_flip_physical{202.0}=0x0 +phy_chain_rx_polarity_flip_physical{203.0}=0x0 +phy_chain_rx_polarity_flip_physical{204.0}=0x0 +phy_chain_rx_polarity_flip_physical{205.0}=0x0 +phy_chain_rx_polarity_flip_physical{206.0}=0x0 +phy_chain_rx_polarity_flip_physical{207.0}=0x0 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 +phy_chain_rx_polarity_flip_physical{209.0}=0x0 +phy_chain_rx_polarity_flip_physical{210.0}=0x0 +phy_chain_rx_polarity_flip_physical{211.0}=0x1 +phy_chain_rx_polarity_flip_physical{212.0}=0x1 +phy_chain_rx_polarity_flip_physical{213.0}=0x0 +phy_chain_rx_polarity_flip_physical{214.0}=0x0 +phy_chain_rx_polarity_flip_physical{215.0}=0x0 +phy_chain_rx_polarity_flip_physical{216.0}=0x0 +phy_chain_rx_polarity_flip_physical{217.0}=0x0 +phy_chain_rx_polarity_flip_physical{218.0}=0x0 +phy_chain_rx_polarity_flip_physical{219.0}=0x1 +phy_chain_rx_polarity_flip_physical{220.0}=0x0 +phy_chain_rx_polarity_flip_physical{221.0}=0x0 +phy_chain_rx_polarity_flip_physical{222.0}=0x0 +phy_chain_rx_polarity_flip_physical{223.0}=0x0 +phy_chain_rx_polarity_flip_physical{224.0}=0x0 +phy_chain_rx_polarity_flip_physical{225.0}=0x0 +phy_chain_rx_polarity_flip_physical{226.0}=0x0 +phy_chain_rx_polarity_flip_physical{227.0}=0x0 +phy_chain_rx_polarity_flip_physical{228.0}=0x0 +phy_chain_rx_polarity_flip_physical{229.0}=0x0 +phy_chain_rx_polarity_flip_physical{230.0}=0x0 +phy_chain_rx_polarity_flip_physical{231.0}=0x0 +phy_chain_rx_polarity_flip_physical{232.0}=0x0 +phy_chain_rx_polarity_flip_physical{233.0}=0x0 +phy_chain_rx_polarity_flip_physical{234.0}=0x0 +phy_chain_rx_polarity_flip_physical{235.0}=0x0 +phy_chain_rx_polarity_flip_physical{236.0}=0x0 +phy_chain_rx_polarity_flip_physical{237.0}=0x0 +phy_chain_rx_polarity_flip_physical{238.0}=0x0 +phy_chain_rx_polarity_flip_physical{239.0}=0x0 +phy_chain_rx_polarity_flip_physical{240.0}=0x0 +phy_chain_rx_polarity_flip_physical{241.0}=0x0 +phy_chain_rx_polarity_flip_physical{242.0}=0x0 +phy_chain_rx_polarity_flip_physical{243.0}=0x1 +phy_chain_rx_polarity_flip_physical{244.0}=0x0 +phy_chain_rx_polarity_flip_physical{245.0}=0x0 +phy_chain_rx_polarity_flip_physical{246.0}=0x0 +phy_chain_rx_polarity_flip_physical{247.0}=0x0 +phy_chain_rx_polarity_flip_physical{248.0}=0x0 +phy_chain_rx_polarity_flip_physical{249.0}=0x0 +phy_chain_rx_polarity_flip_physical{250.0}=0x0 +phy_chain_rx_polarity_flip_physical{251.0}=0x1 +phy_chain_rx_polarity_flip_physical{252.0}=0x0 +phy_chain_rx_polarity_flip_physical{253.0}=0x0 +phy_chain_rx_polarity_flip_physical{254.0}=0x0 +phy_chain_rx_polarity_flip_physical{255.0}=0x0 +phy_chain_rx_polarity_flip_physical{256.0}=0x0 + +dport_map_enable=1 +dport_map_port_3=68 +dport_map_port_4=69 +dport_map_port_5=3 +dport_map_port_6=4 +dport_map_port_7=70 +dport_map_port_8=71 +dport_map_port_9=5 +dport_map_port_10=6 +dport_map_port_11=72 +dport_map_port_12=73 +dport_map_port_13=7 +dport_map_port_14=8 +dport_map_port_15=74 +dport_map_port_16=75 +dport_map_port_34=9 +dport_map_port_35=10 +dport_map_port_36=76 +dport_map_port_37=77 +dport_map_port_38=11 +dport_map_port_39=12 +dport_map_port_40=78 +dport_map_port_41=79 +dport_map_port_42=13 +dport_map_port_43=14 +dport_map_port_44=80 +dport_map_port_45=81 +dport_map_port_46=15 +dport_map_port_47=16 +dport_map_port_48=82 +dport_map_port_49=83 +dport_map_port_68=34 +dport_map_port_69=35 +dport_map_port_70=102 +dport_map_port_71=103 +dport_map_port_72=36 +dport_map_port_73=37 +dport_map_port_74=104 +dport_map_port_75=105 +dport_map_port_76=38 +dport_map_port_77=39 +dport_map_port_78=106 +dport_map_port_79=107 +dport_map_port_80=40 +dport_map_port_81=41 +dport_map_port_82=108 +dport_map_port_83=109 +dport_map_port_102=42 +dport_map_port_103=43 +dport_map_port_104=110 +dport_map_port_105=111 +dport_map_port_106=44 +dport_map_port_107=45 +dport_map_port_108=112 +dport_map_port_109=113 +dport_map_port_110=46 +dport_map_port_111=47 +dport_map_port_112=114 +dport_map_port_113=115 +dport_map_port_114=48 +dport_map_port_115=49 + +## ce +## POST: 24(18) MAIN: 62(3E) PRE: 8(08) +serdes_preemphasis_lane0_1=0x0D4D0A +serdes_preemphasis_lane1_1=0x0D4D0A +serdes_preemphasis_lane2_1=0x0D4D0A +serdes_preemphasis_lane3_1=0x0E4C0A +serdes_preemphasis_lane0_2=0x0E4C0A +serdes_preemphasis_lane1_2=0x0E4C0A +serdes_preemphasis_lane2_2=0x0E4C0A +serdes_preemphasis_lane3_2=0x0E4C0A +serdes_preemphasis_lane0_5=0x0A500A +serdes_preemphasis_lane1_5=0x0A500A +serdes_preemphasis_lane2_5=0x0A500A +serdes_preemphasis_lane3_5=0x0A500A +serdes_preemphasis_lane0_6=0x0D4D0A +serdes_preemphasis_lane1_6=0x0D4D0A +serdes_preemphasis_lane2_6=0x0D4D0A +serdes_preemphasis_lane3_6=0x0D4D0A +serdes_preemphasis_lane0_9=0x085309 +serdes_preemphasis_lane1_9=0x0A500A +serdes_preemphasis_lane2_9=0x085309 +serdes_preemphasis_lane3_9=0x0A500A +serdes_preemphasis_lane0_10=0x0A500A +serdes_preemphasis_lane1_10=0x0A500A +serdes_preemphasis_lane2_10=0x0A500A +serdes_preemphasis_lane3_10=0x0A500A +serdes_preemphasis_lane0_13=0x085408 +serdes_preemphasis_lane1_13=0x085309 +serdes_preemphasis_lane2_13=0x085309 +serdes_preemphasis_lane3_13=0x085309 +serdes_preemphasis_lane0_14=0x085309 +serdes_preemphasis_lane1_14=0x0A500A +serdes_preemphasis_lane2_14=0x085309 +serdes_preemphasis_lane3_14=0x0A500A +serdes_preemphasis_lane0_34=0x085408 +serdes_preemphasis_lane1_34=0x085408 +serdes_preemphasis_lane2_34=0x085408 +serdes_preemphasis_lane3_34=0x085408 +serdes_preemphasis_lane0_35=0x085408 +serdes_preemphasis_lane1_35=0x085309 +serdes_preemphasis_lane2_35=0x085408 +serdes_preemphasis_lane3_35=0x085309 +serdes_preemphasis_lane0_38=0x075508 +serdes_preemphasis_lane1_38=0x075508 +serdes_preemphasis_lane2_38=0x075508 +serdes_preemphasis_lane3_38=0x075508 +serdes_preemphasis_lane0_39=0x085408 +serdes_preemphasis_lane1_39=0x085408 +serdes_preemphasis_lane2_39=0x085408 +serdes_preemphasis_lane3_39=0x085408 +serdes_preemphasis_lane0_42=0x075607 +serdes_preemphasis_lane1_42=0x075607 +serdes_preemphasis_lane2_42=0x075607 +serdes_preemphasis_lane3_42=0x075607 +serdes_preemphasis_lane0_43=0x075508 +serdes_preemphasis_lane1_43=0x075508 +serdes_preemphasis_lane2_43=0x075508 +serdes_preemphasis_lane3_43=0x075508 +serdes_preemphasis_lane0_46=0x075607 +serdes_preemphasis_lane1_46=0x075508 +serdes_preemphasis_lane2_46=0x075607 +serdes_preemphasis_lane3_46=0x075508 +serdes_preemphasis_lane0_47=0x075607 +serdes_preemphasis_lane1_47=0x075508 +serdes_preemphasis_lane2_47=0x075508 +serdes_preemphasis_lane3_47=0x075508 +serdes_preemphasis_lane0_68=0x075607 +serdes_preemphasis_lane1_68=0x075607 +serdes_preemphasis_lane2_68=0x075607 +serdes_preemphasis_lane3_68=0x075607 +serdes_preemphasis_lane0_69=0x075508 +serdes_preemphasis_lane1_69=0x075508 +serdes_preemphasis_lane2_69=0x075508 +serdes_preemphasis_lane3_69=0x075508 +serdes_preemphasis_lane0_72=0x075607 +serdes_preemphasis_lane1_72=0x075607 +serdes_preemphasis_lane2_72=0x075607 +serdes_preemphasis_lane3_72=0x075607 +serdes_preemphasis_lane0_73=0x075508 +serdes_preemphasis_lane1_73=0x075508 +serdes_preemphasis_lane2_73=0x075508 +serdes_preemphasis_lane3_73=0x075508 +serdes_preemphasis_lane0_76=0x075508 +serdes_preemphasis_lane1_76=0x075508 +serdes_preemphasis_lane2_76=0x075508 +serdes_preemphasis_lane3_76=0x075508 +serdes_preemphasis_lane0_77=0x075508 +serdes_preemphasis_lane1_77=0x075508 +serdes_preemphasis_lane2_77=0x075508 +serdes_preemphasis_lane3_77=0x075508 +serdes_preemphasis_lane0_80=0x085408 +serdes_preemphasis_lane1_80=0x085408 +serdes_preemphasis_lane2_80=0x085408 +serdes_preemphasis_lane3_80=0x085408 +serdes_preemphasis_lane0_81=0x085408 +serdes_preemphasis_lane1_81=0x085408 +serdes_preemphasis_lane2_81=0x085408 +serdes_preemphasis_lane3_81=0x085408 +serdes_preemphasis_lane0_102=0x085408 +serdes_preemphasis_lane1_102=0x085408 +serdes_preemphasis_lane2_102=0x085408 +serdes_preemphasis_lane3_102=0x085309 +serdes_preemphasis_lane0_103=0x085408 +serdes_preemphasis_lane1_103=0x085408 +serdes_preemphasis_lane2_103=0x085309 +serdes_preemphasis_lane3_103=0x085309 +serdes_preemphasis_lane0_106=0x0A500A +serdes_preemphasis_lane1_106=0x0A500A +serdes_preemphasis_lane2_106=0x0A500A +serdes_preemphasis_lane3_106=0x0A500A +serdes_preemphasis_lane0_107=0x0A500A +serdes_preemphasis_lane1_107=0x0A500A +serdes_preemphasis_lane2_107=0x0A500A +serdes_preemphasis_lane3_107=0x0A500A +serdes_preemphasis_lane0_110=0x0A500A +serdes_preemphasis_lane1_110=0x0A500A +serdes_preemphasis_lane2_110=0x0A500A +serdes_preemphasis_lane3_110=0x0A500A +serdes_preemphasis_lane0_111=0x0A500A +serdes_preemphasis_lane1_111=0x0A500A +serdes_preemphasis_lane2_111=0x0A500A +serdes_preemphasis_lane3_111=0x0A500A +serdes_preemphasis_lane0_114=0x0D4D0A +serdes_preemphasis_lane1_114=0x0D4D0A +serdes_preemphasis_lane2_114=0x0D4D0A +serdes_preemphasis_lane3_114=0x0D4D0A +serdes_preemphasis_lane0_115=0x0D4D0A +serdes_preemphasis_lane1_115=0x0D4D0A +serdes_preemphasis_lane2_115=0x0D4D0A +serdes_preemphasis_lane3_115=0x0D4D0A +serdes_preemphasis_lane0_3=0x0A500A +serdes_preemphasis_lane1_3=0x0A500A +serdes_preemphasis_lane2_3=0x0A500A +serdes_preemphasis_lane3_3=0x0A500A +serdes_preemphasis_lane0_4=0x0A500A +serdes_preemphasis_lane1_4=0x0A500A +serdes_preemphasis_lane2_4=0x0A500A +serdes_preemphasis_lane3_4=0x0A500A +serdes_preemphasis_lane0_7=0x0D4D0A +serdes_preemphasis_lane1_7=0x0D4D0A +serdes_preemphasis_lane2_7=0x0D4D0A +serdes_preemphasis_lane3_7=0x0D4D0A +serdes_preemphasis_lane0_8=0x0D4D0A +serdes_preemphasis_lane1_8=0x0D4D0A +serdes_preemphasis_lane2_8=0x0D4D0A +serdes_preemphasis_lane3_8=0x0D4D0A +serdes_preemphasis_lane0_11=0x085408 +serdes_preemphasis_lane1_11=0x085408 +serdes_preemphasis_lane2_11=0x085408 +serdes_preemphasis_lane3_11=0x085408 +serdes_preemphasis_lane0_12=0x085408 +serdes_preemphasis_lane1_12=0x085309 +serdes_preemphasis_lane2_12=0x085309 +serdes_preemphasis_lane3_12=0x085408 +serdes_preemphasis_lane0_15=0x085309 +serdes_preemphasis_lane1_15=0x085309 +serdes_preemphasis_lane2_15=0x085309 +serdes_preemphasis_lane3_15=0x085309 +serdes_preemphasis_lane0_16=0x085309 +serdes_preemphasis_lane1_16=0x085309 +serdes_preemphasis_lane2_16=0x085309 +serdes_preemphasis_lane3_16=0x085309 +serdes_preemphasis_lane0_36=0x075508 +serdes_preemphasis_lane1_36=0x075508 +serdes_preemphasis_lane2_36=0x075508 +serdes_preemphasis_lane3_36=0x075508 +serdes_preemphasis_lane0_37=0x075508 +serdes_preemphasis_lane1_37=0x075508 +serdes_preemphasis_lane2_37=0x075508 +serdes_preemphasis_lane3_37=0x075508 +serdes_preemphasis_lane0_40=0x085408 +serdes_preemphasis_lane1_40=0x085408 +serdes_preemphasis_lane2_40=0x085408 +serdes_preemphasis_lane3_40=0x085408 +serdes_preemphasis_lane0_41=0x085408 +serdes_preemphasis_lane1_41=0x085408 +serdes_preemphasis_lane2_41=0x085408 +serdes_preemphasis_lane3_41=0x085408 +serdes_preemphasis_lane0_44=0x075607 +serdes_preemphasis_lane1_44=0x075508 +serdes_preemphasis_lane2_44=0x075607 +serdes_preemphasis_lane3_44=0x075508 +serdes_preemphasis_lane0_45=0x075508 +serdes_preemphasis_lane1_45=0x075508 +serdes_preemphasis_lane2_45=0x075508 +serdes_preemphasis_lane3_45=0x075508 +serdes_preemphasis_lane0_48=0x075607 +serdes_preemphasis_lane1_48=0x075508 +serdes_preemphasis_lane2_48=0x075607 +serdes_preemphasis_lane3_48=0x075508 +serdes_preemphasis_lane0_49=0x075607 +serdes_preemphasis_lane1_49=0x075508 +serdes_preemphasis_lane2_49=0x075508 +serdes_preemphasis_lane3_49=0x075508 +serdes_preemphasis_lane0_70=0x075508 +serdes_preemphasis_lane1_70=0x075508 +serdes_preemphasis_lane2_70=0x075508 +serdes_preemphasis_lane3_70=0x075508 +serdes_preemphasis_lane0_71=0x075508 +serdes_preemphasis_lane1_71=0x075508 +serdes_preemphasis_lane2_71=0x075508 +serdes_preemphasis_lane3_71=0x075508 +serdes_preemphasis_lane0_74=0x075508 +serdes_preemphasis_lane1_74=0x075508 +serdes_preemphasis_lane2_74=0x075607 +serdes_preemphasis_lane3_74=0x075508 +serdes_preemphasis_lane0_75=0x075508 +serdes_preemphasis_lane1_75=0x075508 +serdes_preemphasis_lane2_75=0x075508 +serdes_preemphasis_lane3_75=0x075508 +serdes_preemphasis_lane0_78=0x085408 +serdes_preemphasis_lane1_78=0x085408 +serdes_preemphasis_lane2_78=0x085408 +serdes_preemphasis_lane3_78=0x085408 +serdes_preemphasis_lane0_79=0x085408 +serdes_preemphasis_lane1_79=0x085309 +serdes_preemphasis_lane2_79=0x085309 +serdes_preemphasis_lane3_79=0x085309 +serdes_preemphasis_lane0_82=0x075508 +serdes_preemphasis_lane1_82=0x085408 +serdes_preemphasis_lane2_82=0x075508 +serdes_preemphasis_lane3_82=0x085408 +serdes_preemphasis_lane0_83=0x085408 +serdes_preemphasis_lane1_83=0x085408 +serdes_preemphasis_lane2_83=0x085408 +serdes_preemphasis_lane3_83=0x085408 +serdes_preemphasis_lane0_104=0x0A500A +serdes_preemphasis_lane1_104=0x0A500A +serdes_preemphasis_lane2_104=0x0A500A +serdes_preemphasis_lane3_104=0x0A500A +serdes_preemphasis_lane0_105=0x0A500A +serdes_preemphasis_lane1_105=0x0A500A +serdes_preemphasis_lane2_105=0x0A500A +serdes_preemphasis_lane3_105=0x0A500A +serdes_preemphasis_lane0_108=0x085309 +serdes_preemphasis_lane1_108=0x0A500A +serdes_preemphasis_lane2_108=0x085309 +serdes_preemphasis_lane3_108=0x0A500A +serdes_preemphasis_lane0_109=0x0A500A +serdes_preemphasis_lane1_109=0x0A500A +serdes_preemphasis_lane2_109=0x0A500A +serdes_preemphasis_lane3_109=0x0A500A +serdes_preemphasis_lane0_112=0x0D4D0A +serdes_preemphasis_lane1_112=0x0E4C0A +serdes_preemphasis_lane2_112=0x0D4D0A +serdes_preemphasis_lane3_112=0x0D4D0A +serdes_preemphasis_lane0_113=0x0E4C0A +serdes_preemphasis_lane1_113=0x0F4B0A +serdes_preemphasis_lane2_113=0x0E4C0A +serdes_preemphasis_lane3_113=0x0F4B0A +serdes_preemphasis_lane0_116=0x0A500A +serdes_preemphasis_lane1_116=0x0A500A +serdes_preemphasis_lane2_116=0x0A500A +serdes_preemphasis_lane3_116=0x0A500A +serdes_preemphasis_lane0_117=0x0D4D0A +serdes_preemphasis_lane1_117=0x0D4D0A +serdes_preemphasis_lane2_117=0x0D4D0A +serdes_preemphasis_lane3_117=0x0D4D0A + +# Interface Type +serdes_if_type_1=28 +serdes_if_type_2=28 +serdes_if_type_5=28 +serdes_if_type_6=28 +serdes_if_type_9=28 +serdes_if_type_10=28 +serdes_if_type_13=28 +serdes_if_type_14=28 +serdes_if_type_34=28 +serdes_if_type_35=28 +serdes_if_type_38=28 +serdes_if_type_39=28 +serdes_if_type_42=28 +serdes_if_type_43=28 +serdes_if_type_46=28 +serdes_if_type_47=28 +serdes_if_type_68=28 +serdes_if_type_69=28 +serdes_if_type_72=28 +serdes_if_type_73=28 +serdes_if_type_76=28 +serdes_if_type_77=28 +serdes_if_type_80=28 +serdes_if_type_81=28 +serdes_if_type_102=28 +serdes_if_type_103=28 +serdes_if_type_106=28 +serdes_if_type_107=28 +serdes_if_type_110=28 +serdes_if_type_111=28 +serdes_if_type_114=28 +serdes_if_type_115=28 +serdes_if_type_3=28 +serdes_if_type_4=28 +serdes_if_type_7=28 +serdes_if_type_8=28 +serdes_if_type_11=28 +serdes_if_type_12=28 +serdes_if_type_15=28 +serdes_if_type_16=28 +serdes_if_type_36=28 +serdes_if_type_37=28 +serdes_if_type_40=28 +serdes_if_type_41=28 +serdes_if_type_44=28 +serdes_if_type_45=28 +serdes_if_type_48=28 +serdes_if_type_49=28 +serdes_if_type_70=28 +serdes_if_type_71=28 +serdes_if_type_74=28 +serdes_if_type_75=28 +serdes_if_type_78=28 +serdes_if_type_79=28 +serdes_if_type_82=28 +serdes_if_type_83=28 +serdes_if_type_104=28 +serdes_if_type_105=28 +serdes_if_type_108=28 +serdes_if_type_109=28 +serdes_if_type_112=28 +serdes_if_type_113=28 +serdes_if_type_116=28 +serdes_if_type_117=28 diff --git a/device/inventec/x86_64-inventec_d7264-r0/default_sku b/device/inventec/x86_64-inventec_d7264-r0/default_sku new file mode 100644 index 00000000000..8509a08747f --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264-r0/default_sku @@ -0,0 +1 @@ +INVENTEC-D7264 t1 diff --git a/device/inventec/x86_64-inventec_d7264-r0/installer.conf b/device/inventec/x86_64-inventec_d7264-r0/installer.conf new file mode 100644 index 00000000000..1db64ba02c3 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +VAR_LOG_SIZE=1024 diff --git a/device/inventec/x86_64-inventec_d7264-r0/led_proc_init.soc b/device/inventec/x86_64-inventec_d7264-r0/led_proc_init.soc new file mode 100644 index 00000000000..296f8746f10 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264-r0/led_proc_init.soc @@ -0,0 +1,273 @@ +#LED processor initialization for Inventec Sequoia platform + +led 0 stop +led 0 prog 02 00 60 F1 12 00 DA 0F 70 10 67 72 67 6D 77 06 02 A0 60 F0 02 00 60 F2 12 00 02 00 60 F4 06 F0 4A 01 71 41 4A 03 27 67 6D 4A 02 27 67 6D 06 F2 28 32 08 67 6D 06 F2 28 32 00 32 01 B7 67 6D 77 4D 67 75 67 6D 67 75 67 6D 67 72 67 6D DA A0 70 5F 86 F0 86 F2 86 F4 06 F4 D2 04 74 2E 77 1A 12 00 DA 00 70 6B 67 75 67 6D 77 61 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=59 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=57 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=58 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=51 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=49 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=50 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=61 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=62 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=55 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=53 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=54 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=43 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=41 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=42 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=35 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=33 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=34 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=45 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=46 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=39 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=37 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=38 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=27 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=25 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=26 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=19 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=17 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=18 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=31 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=29 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=30 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=23 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=21 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=22 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=11 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=9 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=10 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=1 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=2 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=0 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=15 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=13 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=14 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=7 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=5 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=6 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=4 +led 0 start + +led 1 stop +led 1 prog 02 00 60 F1 12 00 DA 0F 70 10 67 72 67 6D 77 06 02 A0 60 F0 02 00 60 F2 12 00 02 00 60 F4 06 F0 4A 01 71 41 4A 03 27 67 6D 4A 02 27 67 6D 06 F2 28 32 08 67 6D 06 F2 28 32 00 32 01 B7 67 6D 77 4D 67 75 67 6D 67 75 67 6D 67 72 67 6D DA A0 70 5F 86 F0 86 F2 86 F4 06 F4 D2 04 74 2E 77 1A 12 00 DA 00 70 6B 67 75 67 6D 77 61 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=7 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=5 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=6 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=15 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=13 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=14 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=3 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=1 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=2 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=9 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=10 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=23 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=21 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=22 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=31 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=29 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=30 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=19 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=17 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=18 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=27 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=25 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=26 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=39 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=37 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=38 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=47 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=45 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=46 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=35 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=33 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=34 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=43 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=41 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=42 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=55 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=53 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=54 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=61 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=62 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=60 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=51 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=49 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=50 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=59 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=57 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=58 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=56 +led 1 start + +led 2 stop +led 2 prog 02 00 60 F1 12 00 DA 0F 70 10 67 72 67 6D 77 06 02 A0 60 F0 02 00 60 F2 12 00 02 00 60 F4 06 F0 4A 01 71 41 4A 03 27 67 6D 4A 02 27 67 6D 06 F2 28 32 08 67 6D 06 F2 28 32 00 32 01 B7 67 6D 77 4D 67 75 67 6D 67 75 67 6D 67 72 67 6D DA A0 70 5F 86 F0 86 F2 86 F4 06 F4 D2 04 74 2E 77 1A 12 00 DA 00 70 6B 67 75 67 6D 77 61 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=59 +m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=57 +m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=58 +m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=56 +m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=51 +m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=49 +m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=50 +m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=48 +m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=63 +m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=61 +m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=62 +m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=60 +m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=55 +m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=53 +m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=54 +m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=52 +m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=43 +m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=41 +m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=42 +m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=40 +m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=35 +m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=33 +m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=34 +m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=32 +m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=47 +m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=45 +m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=46 +m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=44 +m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=39 +m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=37 +m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=38 +m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=36 +m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=27 +m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=25 +m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=26 +m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=24 +m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=19 +m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=17 +m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=18 +m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=16 +m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=31 +m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=29 +m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=30 +m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=28 +m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=23 +m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=21 +m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=22 +m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=20 +m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=11 +m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=9 +m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=10 +m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=8 +m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=3 +m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=1 +m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=2 +m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=0 +m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=15 +m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=13 +m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=14 +m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=12 +m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=7 +m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=5 +m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=6 +m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=4 +led 2 start + +led 3 stop +led 3 prog 02 00 60 F1 12 00 DA 0F 70 10 67 72 67 6D 77 06 02 A0 60 F0 02 00 60 F2 12 00 02 00 60 F4 06 F0 4A 01 71 41 4A 03 27 67 6D 4A 02 27 67 6D 06 F2 28 32 08 67 6D 06 F2 28 32 00 32 01 B7 67 6D 77 4D 67 75 67 6D 67 75 67 6D 67 72 67 6D DA A0 70 5F 86 F0 86 F2 86 F4 06 F4 D2 04 74 2E 77 1A 12 00 DA 00 70 6B 67 75 67 6D 77 61 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=7 +m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=5 +m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=6 +m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=4 +m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=15 +m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=13 +m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=14 +m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=12 +m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=3 +m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=1 +m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=2 +m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=0 +m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=11 +m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=9 +m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=10 +m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=8 +m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=23 +m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=21 +m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=22 +m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=20 +m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=31 +m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=29 +m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=30 +m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=28 +m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=19 +m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=17 +m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=18 +m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=16 +m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=27 +m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=25 +m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=26 +m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=24 +m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=39 +m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=37 +m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=38 +m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=36 +m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=47 +m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=45 +m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=46 +m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=44 +m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=35 +m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=33 +m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=34 +m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=32 +m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=43 +m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=41 +m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=42 +m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=40 +m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=55 +m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=53 +m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=54 +m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=52 +m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=63 +m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=61 +m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=62 +m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=60 +m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=51 +m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=49 +m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=50 +m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=48 +m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=59 +m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=57 +m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=58 +m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=56 +led 3 start diff --git a/device/inventec/x86_64-inventec_d7264-r0/plugins/eeprom.py b/device/inventec/x86_64-inventec_d7264-r0/plugins/eeprom.py new file mode 100644 index 00000000000..422cea51fa7 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7032q28b +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/i2c-2/2-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/inventec/x86_64-inventec_d7264-r0/plugins/psuutil.py b/device/inventec/x86_64-inventec_d7264-r0/plugins/psuutil.py new file mode 100755 index 00000000000..f2930e185b8 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264-r0/plugins/psuutil.py @@ -0,0 +1,84 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + PSU_PSOC_DIR = "/sys/class/hwmon/hwmon2" + PSU_CPLD_DIR = "/sys/class/hwmon/hwmon3/device" + + def __init__(self): + PsuBase.__init__(self) + +# Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psoc_psu'+ str(index) + '_iout' + attr_path = self.PSU_PSOC_DIR +'/' + attr_file + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU status + if (attr_value != 0): + status = 1 + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + attr_file ='psu'+ str(index) + normal_attr_value = '0:normal' + attr_path = self.PSU_CPLD_DIR +'/' + attr_file + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU presence + if (attr_value == normal_attr_value): + status = 1 + return status + diff --git a/device/inventec/x86_64-inventec_d7264-r0/plugins/sfputil.py b/device/inventec/x86_64-inventec_d7264-r0/plugins/sfputil.py new file mode 100755 index 00000000000..783647d3f54 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264-r0/plugins/sfputil.py @@ -0,0 +1,387 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +# +# INV_FIX-4037 +# (1) Support get_transceiver_change_event. +# Create the SWPSEventMonitor class to handle any kobject event from the SWPS driver. +# (2) Integrated with the optoe driver +# Due to installing the optoe driver to create the i2c topology, +# it needs to overwrite the followings functions which are declared in the sfputilbase.py. +# First, it needs to impore some SFP-related class object +# +try: + import time + import socket, re,os + from collections import OrderedDict + from sonic_sfp.sfputilbase import SfpUtilBase + from sonic_sfp.sff8472 import sff8472Dom +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +SFP_TEMPE_OFFSET = 96 +SFP_TEMPE_WIDTH = 2 +SFP_VLOT_OFFSET = 98 +SFP_VOLT_WIDTH = 2 +SFP_CHANNL_MON_OFFSET = 100 +SFP_CHANNL_MON_WIDTH = 6 + +NETLINK_KOBJECT_UEVENT = 15 +monitor = None + +class SWPSEventMonitor(object): + + def __init__(self): + self.recieved_events = OrderedDict() + self.socket = socket.socket( + socket.AF_NETLINK, socket.SOCK_DGRAM, NETLINK_KOBJECT_UEVENT) + + def start(self): + self.socket.bind((os.getpid(), -1)) + + def stop(self): + self.socket.close() + + def __enter__(self): + self.start() + return self + + def __exit__(self, exc_type, exc_value, traceback): + self.stop() + + def __iter__(self): + global monitor + while True: + for item in monitor.next_events(): + yield item + + def next_events(self): + data = self.socket.recv(16384) + event = {} + for item in data.split(b'\x00'): + if not item: + # check if we have an event and if we already received it + if event and event['SEQNUM'] not in self.recieved_events: + self.recieved_events[event['SEQNUM']] = None + if (len(self.recieved_events) > 100): + self.recieved_events.popitem(last=False) + yield event + event = {} + else: + try: + k, v = item.split(b'=', 1) + event[k.decode('ascii')] = v.decode('ascii') + except ValueError: + pass + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 63 + PORTS_IN_BLOCK = 64 + QSFP_PORT_START = 0 + QSFP_PORT_END = 63 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0: 100, + 1: 101, + 2: 102, + 3: 103, + 4: 104, + 5: 105, + 6: 106, + 7: 107, + 8: 108, + 9: 109, + 10: 110, + 11: 111, + 12: 112, + 13: 113, + 14: 114, + 15: 115, + 16: 116, + 17: 117, + 18: 118, + 19: 119, + 20: 120, + 21: 121, + 22: 122, + 23: 123, + 24: 124, + 25: 125, + 26: 126, + 27: 127, + 28: 128, + 29: 129, + 30: 130, + 31: 131, + 32: 135, + 33: 134, + 34: 133, + 35: 132, + 36: 139, + 37: 138, + 38: 137, + 39: 136, + 40: 143, + 41: 142, + 42: 141, + 43: 140, + 44: 147, + 45: 146, + 46: 145, + 47: 144, + 48: 151, + 49: 150, + 50: 149, + 51: 148, + 52: 155, + 53: 154, + 54: 153, + 55: 152, + 56: 159, + 57: 158, + 58: 157, + 59: 156, + 60: 163, + 61: 162, + 62: 161, + 63: 160, + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/bus/i2c/devices/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/class/swps/port"+str(port_num)+"/reset" + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + +# +# INV_FIX-4037 +# (1) Support get_transceiver_change_event. +# Modify get_transceiver_change_event() to listen the SWPS kobject event. +# (2) Integrated with the optoe driver +# Due to installing the optoe driver to create the i2c topology, +# it needs to overwrite the followings functions which are declared in the sfputilbase.py. +# It modified the get_eeprom_dom_raw() and get_transceiver_dom_info_dict(). +# + def get_transceiver_change_event(self): + global monitor + port_dict = {} + with SWPSEventMonitor() as monitor: + for event in monitor: + if event['SUBSYSTEM'] == 'swps': + #print('SWPS event. From %s, ACTION %s, IF_TYPE %s, IF_LANE %s' % (event['DEVPATH'], event['ACTION'], event['IF_TYPE'], event['IF_LANE'])) + portname = event['DEVPATH'].split("/")[-1] + rc = re.match(r"port(?P\d+)",portname) + if rc is not None: + if event['ACTION'] == "remove": + remove_num = int(rc.group("num")) + port_dict[remove_num] = "0" + #port_dict[rc.group("num")] = "0" + if event['ACTION'] == "add": + add_num = int(rc.group("num")) + port_dict[add_num] = "1" + #port_dict[rc.group("num")] = "1" + return True, port_dict + return False, {} + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256) + + def get_transceiver_dom_info_dict(self, port_num): + if port_num in self.qsfp_ports: + return SfpUtilBase.get_transceiver_dom_info_dict(self, port_num) + else: + transceiver_dom_info_dict = {} + + offset = 256 + file_path = self._get_port_eeprom_path(port_num, self.DOM_EEPROM_ADDR) + if not self._sfp_eeprom_present(file_path, 0): + return None + + try: + sysfsfile_eeprom = open(file_path, "rb") + except IOError: + print("Error: reading sysfs file %s" % file_path) + return None + + sfpd_obj = sff8472Dom(None, 1) + if sfpd_obj is None: + return None + + dom_temperature_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + else: + return None + + dom_voltage_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_VLOT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + else: + return None + + dom_channel_monitor_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + else: + return None + + try: + sysfsfile_eeprom.close() + except IOError: + print("Error: closing sysfs file %s" % file_path) + return None + + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RXPower']['value'] + transceiver_dom_info_dict['rx2power'] = 'N/A' + transceiver_dom_info_dict['rx3power'] = 'N/A' + transceiver_dom_info_dict['rx4power'] = 'N/A' + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TXBias']['value'] + transceiver_dom_info_dict['tx2bias'] = 'N/A' + transceiver_dom_info_dict['tx3bias'] = 'N/A' + transceiver_dom_info_dict['tx4bias'] = 'N/A' + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TXPower']['value'] + transceiver_dom_info_dict['tx2power'] = 'N/A' + transceiver_dom_info_dict['tx3power'] = 'N/A' + transceiver_dom_info_dict['tx4power'] = 'N/A' + + return transceiver_dom_info_dict + + diff --git a/device/inventec/x86_64-inventec_d7264-r0/pmon_daemon_control.json b/device/inventec/x86_64-inventec_d7264-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/inventec/x86_64-inventec_d7264-r0/sensors.conf b/device/inventec/x86_64-inventec_d7264-r0/sensors.conf new file mode 100644 index 00000000000..05586a8b1c9 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264-r0/sensors.conf @@ -0,0 +1,147 @@ +# libsensors configuration file +chip "inv_ucd90160-i2c-*-0034" + label in1 "SW_12V" + label in2 "SW_5V" + label in3 "SW_3.3V_STBY" + label in4 "SW_3.3V_SYS" + label in5 "SW_3.3v_A" + label in6 "SW_3.3V_B" + label in7 "SW_1.8V" + label in8 "SW_1.2V" + label in9 "SW_0.8V_AVDD" + label in10 "SW_0.9V_VCORE" + ignore in11 + ignore in12 + ignore in13 + ignore in14 + ignore in15 + ignore in16 + +chip "inv_ucd90160-i2c-*-006b" + label in1 "CPU_12V" + label in2 "CPU_5V" + label in3 "CPU_3.3V_AUX" + label in4 "CPU_1.7V" + label in5 "CPU_1.3V_KRHV" + label in6 "CPU_1.05V_IOIN" + label in7 "CPU_1.05V_GBE" + label in8 "CPU_1.05_SCSUS" + label in9 "CPU_2.5_VPP" + label in10 "CPU_1.2V_VDDQ" + label in11 "CPU_0.6V_DIMM" + label in12 "CPU_1.82V_IN" + label in13 "CPU_1.05V_PROCIO" + label in14 "CPU_1.05V_PCH" + label in15 "CPU_1.5V_PCH" + label in16 "CPU_3.3V" + +chip "inv_tmp75-i2c-*-0048" + label temp1 "CPU Board Temperature" + +chip "inv_tmp75-i2c-*-004f" + label temp1 "Fan Board Temperature" + +chip "inv_tmp75-i2c-*-0049" + label temp1 "FrontSide Temperature" + +chip "inv_tmp75-i2c-*-004a" + label temp1 "RearSide Temperature" + +chip "inv_tmp75-i2c-*-004b" + label temp1 "NearASIC Temperature" + +chip "inv_cpld-i2c-*-77" + ignore temp1 + ignore fan1 + ignore fan2 + ignore fan3 + ignore fan4 + ignore fan5 + ignore fan6 + ignore fan7 + ignore fan8 + ignore fan9 + ignore fan10 + ignore pwm1 + ignore pwm2 + ignore pwm3 + ignore pwm4 + ignore pwm5 + +chip "inv_psu-i2c-*-0058" + ignore power3 + ignore curr3 + ignore temp3 + ignore fan2 + ignore fan1 + ignore temp1 + ignore temp2 + ignore temp3 + ignore in1 + ignore curr1 + ignore curr2 + ignore power1 + ignore in2 + ignore power2 + ignore pwm1 + +chip "inv_psu-i2c-*-0059" + ignore power3 + ignore curr3 + ignore temp3 + ignore fan2 + ignore fan1 + ignore temp1 + ignore temp2 + ignore temp3 + ignore in1 + ignore curr1 + ignore curr2 + ignore power1 + ignore in2 + ignore curr2 + ignore power2 + ignore pwm1 + +chip "inv_psoc-*" + label temp1 "FrontSide Temperature" + label temp2 "FanBoard Temperature" + label temp3 "NearASIC Temperature" + label temp4 "Center(U10) Temperature" + label temp5 "CPU Board Temperature" + label temp6 "ASIC Temperature" + label temp7 "PSU1 Temperature1" + label temp8 "PSU2 Temperature1" + label temp9 "PSU1 Temperature2" + label temp10 "PSU2 Temperature2" + label fan1 "FanModule1 Front RPM" + label fan2 "FanModule1 Rear RPM" + label fan3 "FanModule2 Front RPM" + label fan4 "FanModule2 Rear RPM" + label fan5 "FanModule3 Front RPM" + label fan6 "FanModule3 Rear RPM" + label fan7 "FanModule4 Front RPM" + label fan8 "FanModule4 Rear RPM" + ignore fan9 + ignore fan10 + label pwm1 "FanModule1 PWM" + label pwm2 "FanModule2 PWM" + label pwm3 "FanModule3 PWM" + label pwm4 "FanModule4 PWM" + ignore pwm5 + label pwm6 "PSU1 FAN PWM" + label pwm7 "PSU2 FAN PWM" + label fan11 "PSU1 FAN RPM" + label fan12 "PSU2 FAN RPM" + label in1 "PSU1 Input Voltage" + label in2 "PSU2 Input Voltage" + label curr1 "PSU1 Input Current" + label curr2 "PSU2 Input Current" + label power1 "PSU1 Input Power" + label power2 "PSU2 Input Power" + label in3 "PSU1 Output Voltage" + label in4 "PSU2 Output Voltage" + label curr3 "PSU1 Output Current" + label curr4 "PSU2 Output Current" + label power3 "PSU1 Output Power" + label power4 "PSU2 Output Power" diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/buffers.json.j2 b/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/buffers.json.j2 new file mode 100644 index 00000000000..22f36714081 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/buffers.json.j2 @@ -0,0 +1,128 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '300m' %} +{% set default_speed = '100G' %} +{% set default_ports_num = 64 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(0,default_ports_num) %} + {% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "CABLE_LENGTH": { + "AZURE": { + {% for port in PORT %} + {% set cable = cable_length(port) -%} + "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %} + + {% endfor %} + } + }, + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "6000000", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "8072396", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"18432", + "xoff":"40560", + "size":"41808", + "dynamic_th":"-4", + "xon_offset":"2496" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"6000000" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|ingress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, + "BUFFER_QUEUE": { + "{{ port_names }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "{{ port_names }}|0-1": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/port_config.ini b/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/port_config.ini new file mode 100644 index 00000000000..5564014b67a --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias index speed +Ethernet0 9,10,11,12 Ethernet0 0 100000 +Ethernet4 1,2,3,4 Ethernet4 1 100000 +Ethernet8 25,26,27,28 Ethernet8 2 100000 +Ethernet12 17,18,19,20 Ethernet12 3 100000 +Ethernet16 41,42,43,44 Ethernet16 4 100000 +Ethernet20 33,34,35,36 Ethernet20 5 100000 +Ethernet24 57,58,59,60 Ethernet24 6 100000 +Ethernet28 49,50,51,52 Ethernet28 7 100000 +Ethernet32 73,74,75,76 Ethernet32 8 100000 +Ethernet36 65,66,67,68 Ethernet36 9 100000 +Ethernet40 89,90,91,92 Ethernet40 10 100000 +Ethernet44 81,82,83,84 Ethernet44 11 100000 +Ethernet48 105,106,107,108 Ethernet48 12 100000 +Ethernet52 97,98,99,100 Ethernet52 13 100000 +Ethernet56 121,122,123,124 Ethernet56 14 100000 +Ethernet60 113,114,115,116 Ethernet60 15 100000 +Ethernet64 137,138,139,140 Ethernet64 16 100000 +Ethernet68 129,130,131,132 Ethernet68 17 100000 +Ethernet72 153,154,155,156 Ethernet72 18 100000 +Ethernet76 145,146,147,148 Ethernet76 19 100000 +Ethernet80 169,170,171,172 Ethernet80 20 100000 +Ethernet84 161,162,163,164 Ethernet84 21 100000 +Ethernet88 185,186,187,188 Ethernet88 22 100000 +Ethernet92 177,178,179,180 Ethernet92 23 100000 +Ethernet96 201,202,203,204 Ethernet96 24 100000 +Ethernet100 193,194,195,196 Ethernet100 25 100000 +Ethernet104 217,218,219,220 Ethernet104 26 100000 +Ethernet108 209,210,211,212 Ethernet108 27 100000 +Ethernet112 233,234,235,236 Ethernet112 28 100000 +Ethernet116 225,226,227,228 Ethernet116 29 100000 +Ethernet120 249,250,251,252 Ethernet120 30 100000 +Ethernet124 241,242,243,244 Ethernet124 31 100000 +Ethernet128 13,14,15,16 Ethernet128 32 100000 +Ethernet132 5,6,7,8 Ethernet132 33 100000 +Ethernet136 29,30,31,32 Ethernet136 34 100000 +Ethernet140 21,22,23,24 Ethernet140 35 100000 +Ethernet144 45,46,47,48 Ethernet144 36 100000 +Ethernet148 37,38,39,40 Ethernet148 37 100000 +Ethernet152 61,62,63,64 Ethernet152 38 100000 +Ethernet156 53,54,55,56 Ethernet156 39 100000 +Ethernet160 77,78,79,80 Ethernet160 40 100000 +Ethernet164 69,70,71,72 Ethernet164 41 100000 +Ethernet168 93,94,95,96 Ethernet168 42 100000 +Ethernet172 85,86,87,88 Ethernet172 43 100000 +Ethernet176 109,110,111,112 Ethernet176 44 100000 +Ethernet180 101,102,103,104 Ethernet180 45 100000 +Ethernet184 125,126,127,128 Ethernet184 46 100000 +Ethernet188 117,118,119,120 Ethernet188 47 100000 +Ethernet192 141,142,143,144 Ethernet192 48 100000 +Ethernet196 133,134,135,136 Ethernet196 49 100000 +Ethernet200 157,158,159,160 Ethernet200 50 100000 +Ethernet204 149,150,151,152 Ethernet204 51 100000 +Ethernet208 173,174,175,176 Ethernet208 52 100000 +Ethernet212 165,166,167,168 Ethernet212 53 100000 +Ethernet216 189,190,191,192 Ethernet216 54 100000 +Ethernet220 181,182,183,184 Ethernet220 55 100000 +Ethernet224 205,206,207,208 Ethernet224 56 100000 +Ethernet228 197,198,199,200 Ethernet228 57 100000 +Ethernet232 221,222,223,224 Ethernet232 58 100000 +Ethernet236 213,214,215,216 Ethernet236 59 100000 +Ethernet240 237,238,239,240 Ethernet240 60 100000 +Ethernet244 229,230,231,232 Ethernet244 61 100000 +Ethernet248 253,254,255,256 Ethernet248 62 100000 +Ethernet252 245,246,247,248 Ethernet252 63 100000 diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/qos.json.j2 b/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/qos.json.j2 new file mode 100644 index 00000000000..f3b1e7e8200 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/qos.json.j2 @@ -0,0 +1,143 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "3": "3", + "4": "4" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable": "3,4" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"312000", + "red_min_threshold":"104000", + "yellow_max_threshold":"312000", + "yellow_min_threshold":"104000", + "green_max_threshold":"312000", + "green_min_threshold":"104000" + } + }, + "QUEUE": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252|0" : { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252|1" : { + "scheduler" : "[SCHEDULER|scheduler.2]" + } + } +} diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/sai.profile b/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/sai.profile new file mode 100644 index 00000000000..74c0e88255c --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-d7264q28b-64x100g.config.bcm +SAI_NUM_ECMP_MEMBERS=32 diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/th2-d7264q28b-64x100g.config.bcm b/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/th2-d7264q28b-64x100g.config.bcm new file mode 100644 index 00000000000..c07000580ab --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/th2-d7264q28b-64x100g.config.bcm @@ -0,0 +1,968 @@ +# Sequoia BCM Shell config / 100G * 64 ports + +core_clock_frequency=1700 +dpp_clock_ratio=2:3 +load_firmware=1 + +# 64 ports config for 100G +# For Tomahawk FalconCore: +#Physical ports in FalconCore[0-15] must map to logical port[1-32] at any order +#Physical ports in FalconCore[16-31] must map to logical port[34-65] at any order +#Physical ports in FalconCore[32-47] must map to logical port[68-99] at any order +#Physical ports in FalconCore[48-63] must map to logical port[102-133] at any order + +## FalconCore[0-15] +portmap_1=9:100 +portmap_2=1:100 +portmap_3=13:100 +portmap_4=5:100 +portmap_5=25:100 +portmap_6=17:100 +portmap_7=29:100 +portmap_8=21:100 +portmap_9=41:100 +portmap_10=33:100 +portmap_11=45:100 +portmap_12=37:100 +portmap_13=57:100 +portmap_14=49:100 +portmap_15=61:100 +portmap_16=53:100 + +## FalconCore[16-31] +portmap_34=73:100 +portmap_35=65:100 +portmap_36=77:100 +portmap_37=69:100 +portmap_38=89:100 +portmap_39=81:100 +portmap_40=93:100 +portmap_41=85:100 +portmap_42=105:100 +portmap_43=97:100 +portmap_44=109:100 +portmap_45=101:100 +portmap_46=121:100 +portmap_47=113:100 +portmap_48=125:100 +portmap_49=117:100 + +## FalconCore[32-47] +portmap_68=137:100 +portmap_69=129:100 +portmap_70=141:100 +portmap_71=133:100 +portmap_72=153:100 +portmap_73=145:100 +portmap_74=157:100 +portmap_75=149:100 +portmap_76=169:100 +portmap_77=161:100 +portmap_78=173:100 +portmap_79=165:100 +portmap_80=185:100 +portmap_81=177:100 +portmap_82=189:100 +portmap_83=181:100 + +## FalconCore[48-63] +portmap_102=201:100 +portmap_103=193:100 +portmap_104=205:100 +portmap_105=197:100 +portmap_106=217:100 +portmap_107=209:100 +portmap_108=221:100 +portmap_109=213:100 +portmap_110=233:100 +portmap_111=225:100 +portmap_112=237:100 +portmap_113=229:100 +portmap_114=249:100 +portmap_115=241:100 +portmap_116=253:100 +portmap_117=245:100 + +pbmp_xport_xe=0x3FFFD0000FFFF40003FFFC0001FFFE +oversubscribe_mode=1 +port_flex_enable=1 +l2_mem_entries=73728 +l3_mem_entries=73728 +fpem_mem_entries=65536 +l2xmsg_mode=1 + + +## FalconCore [0-15] port TX Lane Swapping +phy_chain_tx_lane_map_physical{1.0}=0x3201 +phy_chain_tx_lane_map_physical{5.0}=0x3210 +phy_chain_tx_lane_map_physical{9.0}=0x2301 +phy_chain_tx_lane_map_physical{13.0}=0x3210 +phy_chain_tx_lane_map_physical{17.0}=0x3201 +phy_chain_tx_lane_map_physical{21.0}=0x3201 +phy_chain_tx_lane_map_physical{25.0}=0x3201 +phy_chain_tx_lane_map_physical{29.0}=0x3210 +phy_chain_tx_lane_map_physical{33.0}=0x3201 +phy_chain_tx_lane_map_physical{37.0}=0x3210 +phy_chain_tx_lane_map_physical{41.0}=0x3210 +phy_chain_tx_lane_map_physical{45.0}=0x3210 +phy_chain_tx_lane_map_physical{49.0}=0x3201 +phy_chain_tx_lane_map_physical{53.0}=0x3210 +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_tx_lane_map_physical{61.0}=0x3210 + + +## FalconCore [16-31] port TX Lane Swapping +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_tx_lane_map_physical{69.0}=0x3201 +phy_chain_tx_lane_map_physical{73.0}=0x3210 +phy_chain_tx_lane_map_physical{77.0}=0x3210 +phy_chain_tx_lane_map_physical{81.0}=0x3210 +phy_chain_tx_lane_map_physical{85.0}=0x3210 +phy_chain_tx_lane_map_physical{89.0}=0x3210 +phy_chain_tx_lane_map_physical{93.0}=0x3210 +phy_chain_tx_lane_map_physical{97.0}=0x3210 +phy_chain_tx_lane_map_physical{101.0}=0x2310 +phy_chain_tx_lane_map_physical{105.0}=0x2310 +phy_chain_tx_lane_map_physical{109.0}=0x3210 +phy_chain_tx_lane_map_physical{113.0}=0x3210 +phy_chain_tx_lane_map_physical{117.0}=0x2310 +phy_chain_tx_lane_map_physical{121.0}=0x2310 +phy_chain_tx_lane_map_physical{125.0}=0x3210 + + +## FalconCore [32-47] port TX Lane Swapping +phy_chain_tx_lane_map_physical{129.0}=0x2301 +phy_chain_tx_lane_map_physical{133.0}=0x3210 +phy_chain_tx_lane_map_physical{137.0}=0x2301 +phy_chain_tx_lane_map_physical{141.0}=0x3210 +phy_chain_tx_lane_map_physical{145.0}=0x2301 +phy_chain_tx_lane_map_physical{149.0}=0x3210 +phy_chain_tx_lane_map_physical{153.0}=0x3210 +phy_chain_tx_lane_map_physical{157.0}=0x3210 +phy_chain_tx_lane_map_physical{161.0}=0x2310 +phy_chain_tx_lane_map_physical{165.0}=0x2310 +phy_chain_tx_lane_map_physical{169.0}=0x2310 +phy_chain_tx_lane_map_physical{173.0}=0x3210 +phy_chain_tx_lane_map_physical{177.0}=0x3210 +phy_chain_tx_lane_map_physical{181.0}=0x2310 +phy_chain_tx_lane_map_physical{185.0}=0x3210 +phy_chain_tx_lane_map_physical{189.0}=0x2310 + + +## FalconCore [48-63] port TX Lane Swapping +phy_chain_tx_lane_map_physical{193.0}=0x2310 +phy_chain_tx_lane_map_physical{197.0}=0x2310 +phy_chain_tx_lane_map_physical{201.0}=0x2310 +phy_chain_tx_lane_map_physical{205.0}=0x2310 +phy_chain_tx_lane_map_physical{209.0}=0x3210 +phy_chain_tx_lane_map_physical{213.0}=0x2310 +phy_chain_tx_lane_map_physical{217.0}=0x3210 +phy_chain_tx_lane_map_physical{221.0}=0x2301 +phy_chain_tx_lane_map_physical{225.0}=0x3210 +phy_chain_tx_lane_map_physical{229.0}=0x2310 +phy_chain_tx_lane_map_physical{233.0}=0x2310 +phy_chain_tx_lane_map_physical{237.0}=0x1023 +phy_chain_tx_lane_map_physical{241.0}=0x3210 +phy_chain_tx_lane_map_physical{245.0}=0x2310 +phy_chain_tx_lane_map_physical{249.0}=0x3210 +phy_chain_tx_lane_map_physical{253.0}=0x2310 + +## FalconCore [0-15] port RX Lane Swapping +phy_chain_rx_lane_map_physical{1.0}=0x3210 +phy_chain_rx_lane_map_physical{5.0}=0x3210 +phy_chain_rx_lane_map_physical{9.0}=0x3210 +phy_chain_rx_lane_map_physical{13.0}=0x3210 +phy_chain_rx_lane_map_physical{17.0}=0x2310 +phy_chain_rx_lane_map_physical{21.0}=0x0213 +phy_chain_rx_lane_map_physical{25.0}=0x2310 +phy_chain_rx_lane_map_physical{29.0}=0x3210 +phy_chain_rx_lane_map_physical{33.0}=0x3210 +phy_chain_rx_lane_map_physical{37.0}=0x3210 +phy_chain_rx_lane_map_physical{41.0}=0x3210 +phy_chain_rx_lane_map_physical{45.0}=0x3210 +phy_chain_rx_lane_map_physical{49.0}=0x3210 +phy_chain_rx_lane_map_physical{53.0}=0x3210 +phy_chain_rx_lane_map_physical{57.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x3210 + + +## FalconCore [16-31] port RX Lane Swapping +phy_chain_rx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{73.0}=0x3210 +phy_chain_rx_lane_map_physical{77.0}=0x3210 +phy_chain_rx_lane_map_physical{81.0}=0x3210 +phy_chain_rx_lane_map_physical{85.0}=0x3210 +phy_chain_rx_lane_map_physical{89.0}=0x3210 +phy_chain_rx_lane_map_physical{93.0}=0x3210 +phy_chain_rx_lane_map_physical{97.0}=0x3210 +phy_chain_rx_lane_map_physical{101.0}=0x3201 +phy_chain_rx_lane_map_physical{105.0}=0x3210 +phy_chain_rx_lane_map_physical{109.0}=0x3210 +phy_chain_rx_lane_map_physical{113.0}=0x3210 +phy_chain_rx_lane_map_physical{117.0}=0x3210 +phy_chain_rx_lane_map_physical{121.0}=0x3210 +phy_chain_rx_lane_map_physical{125.0}=0x3210 + + +## FalconCore [32-47] port RX Lane Swapping +phy_chain_rx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_lane_map_physical{133.0}=0x2301 +phy_chain_rx_lane_map_physical{137.0}=0x3210 +phy_chain_rx_lane_map_physical{141.0}=0x2310 +phy_chain_rx_lane_map_physical{145.0}=0x3210 +phy_chain_rx_lane_map_physical{149.0}=0x3210 +phy_chain_rx_lane_map_physical{153.0}=0x3210 +phy_chain_rx_lane_map_physical{157.0}=0x3210 +phy_chain_rx_lane_map_physical{161.0}=0x3210 +phy_chain_rx_lane_map_physical{165.0}=0x3210 +phy_chain_rx_lane_map_physical{169.0}=0x3210 +phy_chain_rx_lane_map_physical{173.0}=0x3210 +phy_chain_rx_lane_map_physical{177.0}=0x3210 +phy_chain_rx_lane_map_physical{181.0}=0x3210 +phy_chain_rx_lane_map_physical{185.0}=0x3210 +phy_chain_rx_lane_map_physical{189.0}=0x3210 + + +## FalconCore [48-63] port RX Lan Swapping +phy_chain_rx_lane_map_physical{193.0}=0x3210 +phy_chain_rx_lane_map_physical{197.0}=0x3210 +phy_chain_rx_lane_map_physical{201.0}=0x3210 +phy_chain_rx_lane_map_physical{205.0}=0x3210 +phy_chain_rx_lane_map_physical{209.0}=0x3210 +phy_chain_rx_lane_map_physical{213.0}=0x3210 +phy_chain_rx_lane_map_physical{217.0}=0x3210 +phy_chain_rx_lane_map_physical{221.0}=0x3210 +phy_chain_rx_lane_map_physical{225.0}=0x3210 +phy_chain_rx_lane_map_physical{229.0}=0x2301 +phy_chain_rx_lane_map_physical{233.0}=0x3210 +phy_chain_rx_lane_map_physical{237.0}=0x1023 +phy_chain_rx_lane_map_physical{241.0}=0x3210 +phy_chain_rx_lane_map_physical{245.0}=0x3210 +phy_chain_rx_lane_map_physical{249.0}=0x3210 +phy_chain_rx_lane_map_physical{253.0}=0x3210 + + +## FalconCore[0-15] ports TX polarity flip +phy_chain_tx_polarity_flip_physical{1.0}=0x1 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{37.0}=0x0 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x0 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_tx_polarity_flip_physical{56.0}=0x0 +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_tx_polarity_flip_physical{58.0}=0x0 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 + +## FalconCore[16-31] ports TX polarity flip +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_tx_polarity_flip_physical{82.0}=0x0 +phy_chain_tx_polarity_flip_physical{83.0}=0x0 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x0 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x0 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_tx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x0 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 +phy_chain_tx_polarity_flip_physical{113.0}=0x0 +phy_chain_tx_polarity_flip_physical{114.0}=0x1 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x0 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x0 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 + +## FalconCore[32-47] ports TX polarity flip +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_tx_polarity_flip_physical{133.0}=0x0 +phy_chain_tx_polarity_flip_physical{134.0}=0x0 +phy_chain_tx_polarity_flip_physical{135.0}=0x0 +phy_chain_tx_polarity_flip_physical{136.0}=0x0 +phy_chain_tx_polarity_flip_physical{137.0}=0x0 +phy_chain_tx_polarity_flip_physical{138.0}=0x1 +phy_chain_tx_polarity_flip_physical{139.0}=0x0 +phy_chain_tx_polarity_flip_physical{140.0}=0x0 +phy_chain_tx_polarity_flip_physical{141.0}=0x0 +phy_chain_tx_polarity_flip_physical{142.0}=0x0 +phy_chain_tx_polarity_flip_physical{143.0}=0x0 +phy_chain_tx_polarity_flip_physical{144.0}=0x0 +phy_chain_tx_polarity_flip_physical{145.0}=0x1 +phy_chain_tx_polarity_flip_physical{146.0}=0x0 +phy_chain_tx_polarity_flip_physical{147.0}=0x0 +phy_chain_tx_polarity_flip_physical{148.0}=0x0 +phy_chain_tx_polarity_flip_physical{149.0}=0x0 +phy_chain_tx_polarity_flip_physical{150.0}=0x0 +phy_chain_tx_polarity_flip_physical{151.0}=0x0 +phy_chain_tx_polarity_flip_physical{152.0}=0x0 +phy_chain_tx_polarity_flip_physical{153.0}=0x0 +phy_chain_tx_polarity_flip_physical{154.0}=0x1 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x0 +phy_chain_tx_polarity_flip_physical{157.0}=0x0 +phy_chain_tx_polarity_flip_physical{158.0}=0x0 +phy_chain_tx_polarity_flip_physical{159.0}=0x0 +phy_chain_tx_polarity_flip_physical{160.0}=0x0 +phy_chain_tx_polarity_flip_physical{161.0}=0x1 +phy_chain_tx_polarity_flip_physical{162.0}=0x0 +phy_chain_tx_polarity_flip_physical{163.0}=0x0 +phy_chain_tx_polarity_flip_physical{164.0}=0x0 +phy_chain_tx_polarity_flip_physical{165.0}=0x0 +phy_chain_tx_polarity_flip_physical{166.0}=0x0 +phy_chain_tx_polarity_flip_physical{167.0}=0x0 +phy_chain_tx_polarity_flip_physical{168.0}=0x0 +phy_chain_tx_polarity_flip_physical{169.0}=0x0 +phy_chain_tx_polarity_flip_physical{170.0}=0x1 +phy_chain_tx_polarity_flip_physical{171.0}=0x0 +phy_chain_tx_polarity_flip_physical{172.0}=0x0 +phy_chain_tx_polarity_flip_physical{173.0}=0x0 +phy_chain_tx_polarity_flip_physical{174.0}=0x0 +phy_chain_tx_polarity_flip_physical{175.0}=0x0 +phy_chain_tx_polarity_flip_physical{176.0}=0x0 +phy_chain_tx_polarity_flip_physical{177.0}=0x0 +phy_chain_tx_polarity_flip_physical{178.0}=0x1 +phy_chain_tx_polarity_flip_physical{179.0}=0x0 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 +phy_chain_tx_polarity_flip_physical{181.0}=0x0 +phy_chain_tx_polarity_flip_physical{182.0}=0x0 +phy_chain_tx_polarity_flip_physical{183.0}=0x0 +phy_chain_tx_polarity_flip_physical{184.0}=0x0 +phy_chain_tx_polarity_flip_physical{185.0}=0x0 +phy_chain_tx_polarity_flip_physical{186.0}=0x0 +phy_chain_tx_polarity_flip_physical{187.0}=0x0 +phy_chain_tx_polarity_flip_physical{188.0}=0x0 +phy_chain_tx_polarity_flip_physical{189.0}=0x0 +phy_chain_tx_polarity_flip_physical{190.0}=0x0 +phy_chain_tx_polarity_flip_physical{191.0}=0x0 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 + +## FalconCore[48-63] ports TX polarity flip +phy_chain_tx_polarity_flip_physical{193.0}=0x1 +phy_chain_tx_polarity_flip_physical{194.0}=0x0 +phy_chain_tx_polarity_flip_physical{195.0}=0x0 +phy_chain_tx_polarity_flip_physical{196.0}=0x0 +phy_chain_tx_polarity_flip_physical{197.0}=0x0 +phy_chain_tx_polarity_flip_physical{198.0}=0x0 +phy_chain_tx_polarity_flip_physical{199.0}=0x0 +phy_chain_tx_polarity_flip_physical{200.0}=0x0 +phy_chain_tx_polarity_flip_physical{201.0}=0x0 +phy_chain_tx_polarity_flip_physical{202.0}=0x1 +phy_chain_tx_polarity_flip_physical{203.0}=0x0 +phy_chain_tx_polarity_flip_physical{204.0}=0x0 +phy_chain_tx_polarity_flip_physical{205.0}=0x0 +phy_chain_tx_polarity_flip_physical{206.0}=0x0 +phy_chain_tx_polarity_flip_physical{207.0}=0x0 +phy_chain_tx_polarity_flip_physical{208.0}=0x0 +phy_chain_tx_polarity_flip_physical{209.0}=0x0 +phy_chain_tx_polarity_flip_physical{210.0}=0x0 +phy_chain_tx_polarity_flip_physical{211.0}=0x0 +phy_chain_tx_polarity_flip_physical{212.0}=0x0 +phy_chain_tx_polarity_flip_physical{213.0}=0x0 +phy_chain_tx_polarity_flip_physical{214.0}=0x0 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x0 +phy_chain_tx_polarity_flip_physical{217.0}=0x1 +phy_chain_tx_polarity_flip_physical{218.0}=0x0 +phy_chain_tx_polarity_flip_physical{219.0}=0x0 +phy_chain_tx_polarity_flip_physical{220.0}=0x0 +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x0 +phy_chain_tx_polarity_flip_physical{223.0}=0x0 +phy_chain_tx_polarity_flip_physical{224.0}=0x0 +phy_chain_tx_polarity_flip_physical{225.0}=0x1 +phy_chain_tx_polarity_flip_physical{226.0}=0x0 +phy_chain_tx_polarity_flip_physical{227.0}=0x0 +phy_chain_tx_polarity_flip_physical{228.0}=0x0 +phy_chain_tx_polarity_flip_physical{229.0}=0x0 +phy_chain_tx_polarity_flip_physical{230.0}=0x0 +phy_chain_tx_polarity_flip_physical{231.0}=0x0 +phy_chain_tx_polarity_flip_physical{232.0}=0x0 +phy_chain_tx_polarity_flip_physical{233.0}=0x1 +phy_chain_tx_polarity_flip_physical{234.0}=0x0 +phy_chain_tx_polarity_flip_physical{235.0}=0x0 +phy_chain_tx_polarity_flip_physical{236.0}=0x0 +phy_chain_tx_polarity_flip_physical{237.0}=0x0 +phy_chain_tx_polarity_flip_physical{238.0}=0x0 +phy_chain_tx_polarity_flip_physical{239.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x0 +phy_chain_tx_polarity_flip_physical{241.0}=0x1 +phy_chain_tx_polarity_flip_physical{242.0}=0x0 +phy_chain_tx_polarity_flip_physical{243.0}=0x0 +phy_chain_tx_polarity_flip_physical{244.0}=0x0 +phy_chain_tx_polarity_flip_physical{245.0}=0x0 +phy_chain_tx_polarity_flip_physical{246.0}=0x0 +phy_chain_tx_polarity_flip_physical{247.0}=0x0 +phy_chain_tx_polarity_flip_physical{248.0}=0x1 +phy_chain_tx_polarity_flip_physical{249.0}=0x1 +phy_chain_tx_polarity_flip_physical{250.0}=0x0 +phy_chain_tx_polarity_flip_physical{251.0}=0x0 +phy_chain_tx_polarity_flip_physical{252.0}=0x0 +phy_chain_tx_polarity_flip_physical{253.0}=0x0 +phy_chain_tx_polarity_flip_physical{254.0}=0x0 +phy_chain_tx_polarity_flip_physical{255.0}=0x0 +phy_chain_tx_polarity_flip_physical{256.0}=0x1 + +## FalconCore[0-15] ports RX polarity flip +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{37.0}=0x0 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +## FalconCore [16-31] ports RX polarity flip +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{83.0}=0x0 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_rx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{91.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x0 +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{97.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x0 +phy_chain_rx_polarity_flip_physical{111.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{117.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x0 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{127.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +## FalconCore [32-47] ports RX polarity flip +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{133.0}=0x0 +phy_chain_rx_polarity_flip_physical{134.0}=0x0 +phy_chain_rx_polarity_flip_physical{135.0}=0x0 +phy_chain_rx_polarity_flip_physical{136.0}=0x0 +phy_chain_rx_polarity_flip_physical{137.0}=0x0 +phy_chain_rx_polarity_flip_physical{138.0}=0x0 +phy_chain_rx_polarity_flip_physical{139.0}=0x0 +phy_chain_rx_polarity_flip_physical{140.0}=0x0 +phy_chain_rx_polarity_flip_physical{141.0}=0x0 +phy_chain_rx_polarity_flip_physical{142.0}=0x0 +phy_chain_rx_polarity_flip_physical{143.0}=0x0 +phy_chain_rx_polarity_flip_physical{144.0}=0x0 +phy_chain_rx_polarity_flip_physical{145.0}=0x0 +phy_chain_rx_polarity_flip_physical{146.0}=0x0 +phy_chain_rx_polarity_flip_physical{147.0}=0x0 +phy_chain_rx_polarity_flip_physical{148.0}=0x1 +phy_chain_rx_polarity_flip_physical{149.0}=0x0 +phy_chain_rx_polarity_flip_physical{150.0}=0x0 +phy_chain_rx_polarity_flip_physical{151.0}=0x0 +phy_chain_rx_polarity_flip_physical{152.0}=0x0 +phy_chain_rx_polarity_flip_physical{153.0}=0x0 +phy_chain_rx_polarity_flip_physical{154.0}=0x0 +phy_chain_rx_polarity_flip_physical{155.0}=0x0 +phy_chain_rx_polarity_flip_physical{156.0}=0x1 +phy_chain_rx_polarity_flip_physical{157.0}=0x0 +phy_chain_rx_polarity_flip_physical{158.0}=0x0 +phy_chain_rx_polarity_flip_physical{159.0}=0x0 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 +phy_chain_rx_polarity_flip_physical{161.0}=0x0 +phy_chain_rx_polarity_flip_physical{162.0}=0x0 +phy_chain_rx_polarity_flip_physical{163.0}=0x0 +phy_chain_rx_polarity_flip_physical{164.0}=0x0 +phy_chain_rx_polarity_flip_physical{165.0}=0x0 +phy_chain_rx_polarity_flip_physical{166.0}=0x0 +phy_chain_rx_polarity_flip_physical{167.0}=0x0 +phy_chain_rx_polarity_flip_physical{168.0}=0x0 +phy_chain_rx_polarity_flip_physical{169.0}=0x0 +phy_chain_rx_polarity_flip_physical{170.0}=0x0 +phy_chain_rx_polarity_flip_physical{171.0}=0x0 +phy_chain_rx_polarity_flip_physical{172.0}=0x0 +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x0 +phy_chain_rx_polarity_flip_physical{175.0}=0x0 +phy_chain_rx_polarity_flip_physical{176.0}=0x0 +phy_chain_rx_polarity_flip_physical{177.0}=0x0 +phy_chain_rx_polarity_flip_physical{178.0}=0x0 +phy_chain_rx_polarity_flip_physical{179.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x0 +phy_chain_rx_polarity_flip_physical{181.0}=0x0 +phy_chain_rx_polarity_flip_physical{182.0}=0x0 +phy_chain_rx_polarity_flip_physical{183.0}=0x0 +phy_chain_rx_polarity_flip_physical{184.0}=0x0 +phy_chain_rx_polarity_flip_physical{185.0}=0x0 +phy_chain_rx_polarity_flip_physical{186.0}=0x0 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x0 +phy_chain_rx_polarity_flip_physical{189.0}=0x0 +phy_chain_rx_polarity_flip_physical{190.0}=0x0 +phy_chain_rx_polarity_flip_physical{191.0}=0x0 +phy_chain_rx_polarity_flip_physical{192.0}=0x0 + +## FalconCore [48-63] ports RX polarity flip +phy_chain_rx_polarity_flip_physical{193.0}=0x0 +phy_chain_rx_polarity_flip_physical{194.0}=0x0 +phy_chain_rx_polarity_flip_physical{195.0}=0x0 +phy_chain_rx_polarity_flip_physical{196.0}=0x0 +phy_chain_rx_polarity_flip_physical{197.0}=0x0 +phy_chain_rx_polarity_flip_physical{198.0}=0x0 +phy_chain_rx_polarity_flip_physical{199.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x0 +phy_chain_rx_polarity_flip_physical{201.0}=0x0 +phy_chain_rx_polarity_flip_physical{202.0}=0x0 +phy_chain_rx_polarity_flip_physical{203.0}=0x0 +phy_chain_rx_polarity_flip_physical{204.0}=0x0 +phy_chain_rx_polarity_flip_physical{205.0}=0x0 +phy_chain_rx_polarity_flip_physical{206.0}=0x0 +phy_chain_rx_polarity_flip_physical{207.0}=0x0 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 +phy_chain_rx_polarity_flip_physical{209.0}=0x0 +phy_chain_rx_polarity_flip_physical{210.0}=0x0 +phy_chain_rx_polarity_flip_physical{211.0}=0x1 +phy_chain_rx_polarity_flip_physical{212.0}=0x1 +phy_chain_rx_polarity_flip_physical{213.0}=0x0 +phy_chain_rx_polarity_flip_physical{214.0}=0x0 +phy_chain_rx_polarity_flip_physical{215.0}=0x0 +phy_chain_rx_polarity_flip_physical{216.0}=0x0 +phy_chain_rx_polarity_flip_physical{217.0}=0x0 +phy_chain_rx_polarity_flip_physical{218.0}=0x0 +phy_chain_rx_polarity_flip_physical{219.0}=0x1 +phy_chain_rx_polarity_flip_physical{220.0}=0x0 +phy_chain_rx_polarity_flip_physical{221.0}=0x0 +phy_chain_rx_polarity_flip_physical{222.0}=0x0 +phy_chain_rx_polarity_flip_physical{223.0}=0x0 +phy_chain_rx_polarity_flip_physical{224.0}=0x0 +phy_chain_rx_polarity_flip_physical{225.0}=0x0 +phy_chain_rx_polarity_flip_physical{226.0}=0x0 +phy_chain_rx_polarity_flip_physical{227.0}=0x0 +phy_chain_rx_polarity_flip_physical{228.0}=0x0 +phy_chain_rx_polarity_flip_physical{229.0}=0x0 +phy_chain_rx_polarity_flip_physical{230.0}=0x0 +phy_chain_rx_polarity_flip_physical{231.0}=0x0 +phy_chain_rx_polarity_flip_physical{232.0}=0x0 +phy_chain_rx_polarity_flip_physical{233.0}=0x0 +phy_chain_rx_polarity_flip_physical{234.0}=0x0 +phy_chain_rx_polarity_flip_physical{235.0}=0x0 +phy_chain_rx_polarity_flip_physical{236.0}=0x0 +phy_chain_rx_polarity_flip_physical{237.0}=0x0 +phy_chain_rx_polarity_flip_physical{238.0}=0x0 +phy_chain_rx_polarity_flip_physical{239.0}=0x0 +phy_chain_rx_polarity_flip_physical{240.0}=0x0 +phy_chain_rx_polarity_flip_physical{241.0}=0x0 +phy_chain_rx_polarity_flip_physical{242.0}=0x0 +phy_chain_rx_polarity_flip_physical{243.0}=0x1 +phy_chain_rx_polarity_flip_physical{244.0}=0x0 +phy_chain_rx_polarity_flip_physical{245.0}=0x0 +phy_chain_rx_polarity_flip_physical{246.0}=0x0 +phy_chain_rx_polarity_flip_physical{247.0}=0x0 +phy_chain_rx_polarity_flip_physical{248.0}=0x0 +phy_chain_rx_polarity_flip_physical{249.0}=0x0 +phy_chain_rx_polarity_flip_physical{250.0}=0x0 +phy_chain_rx_polarity_flip_physical{251.0}=0x1 +phy_chain_rx_polarity_flip_physical{252.0}=0x0 +phy_chain_rx_polarity_flip_physical{253.0}=0x0 +phy_chain_rx_polarity_flip_physical{254.0}=0x0 +phy_chain_rx_polarity_flip_physical{255.0}=0x0 +phy_chain_rx_polarity_flip_physical{256.0}=0x0 + +dport_map_enable=1 +dport_map_port_3=68 +dport_map_port_4=69 +dport_map_port_5=3 +dport_map_port_6=4 +dport_map_port_7=70 +dport_map_port_8=71 +dport_map_port_9=5 +dport_map_port_10=6 +dport_map_port_11=72 +dport_map_port_12=73 +dport_map_port_13=7 +dport_map_port_14=8 +dport_map_port_15=74 +dport_map_port_16=75 +dport_map_port_34=9 +dport_map_port_35=10 +dport_map_port_36=76 +dport_map_port_37=77 +dport_map_port_38=11 +dport_map_port_39=12 +dport_map_port_40=78 +dport_map_port_41=79 +dport_map_port_42=13 +dport_map_port_43=14 +dport_map_port_44=80 +dport_map_port_45=81 +dport_map_port_46=15 +dport_map_port_47=16 +dport_map_port_48=82 +dport_map_port_49=83 +dport_map_port_68=34 +dport_map_port_69=35 +dport_map_port_70=102 +dport_map_port_71=103 +dport_map_port_72=36 +dport_map_port_73=37 +dport_map_port_74=104 +dport_map_port_75=105 +dport_map_port_76=38 +dport_map_port_77=39 +dport_map_port_78=106 +dport_map_port_79=107 +dport_map_port_80=40 +dport_map_port_81=41 +dport_map_port_82=108 +dport_map_port_83=109 +dport_map_port_102=42 +dport_map_port_103=43 +dport_map_port_104=110 +dport_map_port_105=111 +dport_map_port_106=44 +dport_map_port_107=45 +dport_map_port_108=112 +dport_map_port_109=113 +dport_map_port_110=46 +dport_map_port_111=47 +dport_map_port_112=114 +dport_map_port_113=115 +dport_map_port_114=48 +dport_map_port_115=49 + +## ce +## POST: 24(18) MAIN: 62(3E) PRE: 8(08) +serdes_preemphasis_1=0x183E08 +serdes_preemphasis_2=0x193E08 +serdes_preemphasis_5=0x173E08 +serdes_preemphasis_6=0x173E08 +serdes_preemphasis_9=0x163E07 +serdes_preemphasis_10=0x173E08 +serdes_preemphasis_13=0x154007 +serdes_preemphasis_14=0x154007 +serdes_preemphasis_34=0x134007 +serdes_preemphasis_35=0x144007 +serdes_preemphasis_38=0x133F07 +serdes_preemphasis_39=0x133F07 +serdes_preemphasis_42=0x133F07 +serdes_preemphasis_43=0x133F06 +serdes_preemphasis_46=0x113E06 +serdes_preemphasis_47=0x113E05 +serdes_preemphasis_68=0x103F06 +serdes_preemphasis_69=0x103F06 +serdes_preemphasis_72=0x113F06 +serdes_preemphasis_73=0x103F06 +serdes_preemphasis_76=0x124006 +serdes_preemphasis_77=0x124006 +serdes_preemphasis_80=0x144007 +serdes_preemphasis_81=0x144007 +serdes_preemphasis_102=0x144007 +serdes_preemphasis_103=0x144007 +serdes_preemphasis_106=0x153F08 +serdes_preemphasis_107=0x153F08 +serdes_preemphasis_110=0x164008 +serdes_preemphasis_111=0x164008 +serdes_preemphasis_114=0x184008 +serdes_preemphasis_115=0x184008 +serdes_preemphasis_3=0x184108 +serdes_preemphasis_4=0x184108 +serdes_preemphasis_7=0x173F08 +serdes_preemphasis_8=0x174108 +serdes_preemphasis_11=0x154007 +serdes_preemphasis_12=0x154007 +serdes_preemphasis_15=0x144007 +serdes_preemphasis_16=0x144007 +serdes_preemphasis_36=0x133F07 +serdes_preemphasis_37=0x133F07 +serdes_preemphasis_40=0x133F07 +serdes_preemphasis_41=0x123F07 +serdes_preemphasis_44=0x113F07 +serdes_preemphasis_45=0x113F07 +serdes_preemphasis_48=0x113F06 +serdes_preemphasis_49=0x103F06 +serdes_preemphasis_70=0x113F06 +serdes_preemphasis_71=0x103F06 +serdes_preemphasis_74=0x113F06 +serdes_preemphasis_75=0x113F06 +serdes_preemphasis_78=0x123F07 +serdes_preemphasis_79=0x134007 +serdes_preemphasis_82=0x144007 +serdes_preemphasis_83=0x144007 +serdes_preemphasis_104=0x164007 +serdes_preemphasis_105=0x154107 +serdes_preemphasis_108=0x174107 +serdes_preemphasis_109=0x163F07 +serdes_preemphasis_112=0x194107 +serdes_preemphasis_113=0x174107 +serdes_preemphasis_116=0x1B4108 +serdes_preemphasis_117=0x194108 + + +# Interface Type +serdes_if_type_1=28 +serdes_if_type_2=28 +serdes_if_type_5=28 +serdes_if_type_6=28 +serdes_if_type_9=28 +serdes_if_type_10=28 +serdes_if_type_13=28 +serdes_if_type_14=28 +serdes_if_type_34=28 +serdes_if_type_35=28 +serdes_if_type_38=28 +serdes_if_type_39=28 +serdes_if_type_42=28 +serdes_if_type_43=28 +serdes_if_type_46=28 +serdes_if_type_47=28 +serdes_if_type_68=28 +serdes_if_type_69=28 +serdes_if_type_72=28 +serdes_if_type_73=28 +serdes_if_type_76=28 +serdes_if_type_77=28 +serdes_if_type_80=28 +serdes_if_type_81=28 +serdes_if_type_102=28 +serdes_if_type_103=28 +serdes_if_type_106=28 +serdes_if_type_107=28 +serdes_if_type_110=28 +serdes_if_type_111=28 +serdes_if_type_114=28 +serdes_if_type_115=28 +serdes_if_type_3=28 +serdes_if_type_4=28 +serdes_if_type_7=28 +serdes_if_type_8=28 +serdes_if_type_11=28 +serdes_if_type_12=28 +serdes_if_type_15=28 +serdes_if_type_16=28 +serdes_if_type_36=28 +serdes_if_type_37=28 +serdes_if_type_40=28 +serdes_if_type_41=28 +serdes_if_type_44=28 +serdes_if_type_45=28 +serdes_if_type_48=28 +serdes_if_type_49=28 +serdes_if_type_70=28 +serdes_if_type_71=28 +serdes_if_type_74=28 +serdes_if_type_75=28 +serdes_if_type_78=28 +serdes_if_type_79=28 +serdes_if_type_82=28 +serdes_if_type_83=28 +serdes_if_type_104=28 +serdes_if_type_105=28 +serdes_if_type_108=28 +serdes_if_type_109=28 +serdes_if_type_112=28 +serdes_if_type_113=28 +serdes_if_type_116=28 +serdes_if_type_117=28 diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/th2-d7264q28b-64x40g.config.bcm b/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/th2-d7264q28b-64x40g.config.bcm new file mode 100644 index 00000000000..049d1088f2a --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/th2-d7264q28b-64x40g.config.bcm @@ -0,0 +1,1033 @@ +# Sequoia BCM Shell config / 100G * 64 ports + +core_clock_frequency=1700 +dpp_clock_ratio=2:3 +load_firmware=1 + +# 64 ports config for 100G +# For Tomahawk FalconCore: +#Physical ports in FalconCore[0-15] must map to logical port[1-32] at any order +#Physical ports in FalconCore[16-31] must map to logical port[34-65] at any order +#Physical ports in FalconCore[32-47] must map to logical port[68-99] at any order +#Physical ports in FalconCore[48-63] must map to logical port[102-133] at any order + +## FalconCore[0-15] +portmap_1=9:100 +portmap_2=1:100 +portmap_3=13:100 +portmap_4=5:100 +portmap_5=25:100 +portmap_6=17:100 +portmap_7=29:100 +portmap_8=21:100 +portmap_9=41:100 +portmap_10=33:100 +portmap_11=45:100 +portmap_12=37:100 +portmap_13=57:100 +portmap_14=49:100 +portmap_15=61:100 +portmap_16=53:100 + +## FalconCore[16-31] +portmap_34=73:100 +portmap_35=65:100 +portmap_36=77:100 +portmap_37=69:100 +portmap_38=89:100 +portmap_39=81:100 +portmap_40=93:100 +portmap_41=85:100 +portmap_42=105:100 +portmap_43=97:100 +portmap_44=109:100 +portmap_45=101:100 +portmap_46=121:100 +portmap_47=113:100 +portmap_48=125:100 +portmap_49=117:100 + +## FalconCore[32-47] +portmap_68=137:100 +portmap_69=129:100 +portmap_70=141:100 +portmap_71=133:100 +portmap_72=153:100 +portmap_73=145:100 +portmap_74=157:100 +portmap_75=149:100 +portmap_76=169:100 +portmap_77=161:100 +portmap_78=173:100 +portmap_79=165:100 +portmap_80=185:100 +portmap_81=177:100 +portmap_82=189:100 +portmap_83=181:100 + +## FalconCore[48-63] +portmap_102=201:100 +portmap_103=193:100 +portmap_104=205:100 +portmap_105=197:100 +portmap_106=217:100 +portmap_107=209:100 +portmap_108=221:100 +portmap_109=213:100 +portmap_110=233:100 +portmap_111=225:100 +portmap_112=237:100 +portmap_113=229:100 +portmap_114=249:100 +portmap_115=241:100 +portmap_116=253:100 +portmap_117=245:100 + +pbmp_xport_xe=0x3FFFD0000FFFF40003FFFC0001FFFE +oversubscribe_mode=1 +port_flex_enable=1 +l2_mem_entries=73728 +l3_mem_entries=73728 +fpem_mem_entries=65536 +l2xmsg_mode=1 + + +## FalconCore [0-15] port TX Lane Swapping +phy_chain_tx_lane_map_physical{1.0}=0x3201 +phy_chain_tx_lane_map_physical{5.0}=0x3210 +phy_chain_tx_lane_map_physical{9.0}=0x2301 +phy_chain_tx_lane_map_physical{13.0}=0x3210 +phy_chain_tx_lane_map_physical{17.0}=0x3201 +phy_chain_tx_lane_map_physical{21.0}=0x3201 +phy_chain_tx_lane_map_physical{25.0}=0x3201 +phy_chain_tx_lane_map_physical{29.0}=0x3210 +phy_chain_tx_lane_map_physical{33.0}=0x3201 +phy_chain_tx_lane_map_physical{37.0}=0x3210 +phy_chain_tx_lane_map_physical{41.0}=0x3210 +phy_chain_tx_lane_map_physical{45.0}=0x3210 +phy_chain_tx_lane_map_physical{49.0}=0x3201 +phy_chain_tx_lane_map_physical{53.0}=0x3210 +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_tx_lane_map_physical{61.0}=0x3210 + + +## FalconCore [16-31] port TX Lane Swapping +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_tx_lane_map_physical{69.0}=0x3201 +phy_chain_tx_lane_map_physical{73.0}=0x3210 +phy_chain_tx_lane_map_physical{77.0}=0x3210 +phy_chain_tx_lane_map_physical{81.0}=0x3210 +phy_chain_tx_lane_map_physical{85.0}=0x3210 +phy_chain_tx_lane_map_physical{89.0}=0x3210 +phy_chain_tx_lane_map_physical{93.0}=0x3210 +phy_chain_tx_lane_map_physical{97.0}=0x3210 +phy_chain_tx_lane_map_physical{101.0}=0x2310 +phy_chain_tx_lane_map_physical{105.0}=0x2310 +phy_chain_tx_lane_map_physical{109.0}=0x3210 +phy_chain_tx_lane_map_physical{113.0}=0x3210 +phy_chain_tx_lane_map_physical{117.0}=0x2310 +phy_chain_tx_lane_map_physical{121.0}=0x2310 +phy_chain_tx_lane_map_physical{125.0}=0x3210 + + +## FalconCore [32-47] port TX Lane Swapping +phy_chain_tx_lane_map_physical{129.0}=0x2301 +phy_chain_tx_lane_map_physical{133.0}=0x3210 +phy_chain_tx_lane_map_physical{137.0}=0x2301 +phy_chain_tx_lane_map_physical{141.0}=0x3210 +phy_chain_tx_lane_map_physical{145.0}=0x2301 +phy_chain_tx_lane_map_physical{149.0}=0x3210 +phy_chain_tx_lane_map_physical{153.0}=0x3210 +phy_chain_tx_lane_map_physical{157.0}=0x3210 +phy_chain_tx_lane_map_physical{161.0}=0x2310 +phy_chain_tx_lane_map_physical{165.0}=0x2310 +phy_chain_tx_lane_map_physical{169.0}=0x2310 +phy_chain_tx_lane_map_physical{173.0}=0x3210 +phy_chain_tx_lane_map_physical{177.0}=0x3210 +phy_chain_tx_lane_map_physical{181.0}=0x2310 +phy_chain_tx_lane_map_physical{185.0}=0x3210 +phy_chain_tx_lane_map_physical{189.0}=0x2310 + + +## FalconCore [48-63] port TX Lane Swapping +phy_chain_tx_lane_map_physical{193.0}=0x2310 +phy_chain_tx_lane_map_physical{197.0}=0x2310 +phy_chain_tx_lane_map_physical{201.0}=0x2310 +phy_chain_tx_lane_map_physical{205.0}=0x2310 +phy_chain_tx_lane_map_physical{209.0}=0x3210 +phy_chain_tx_lane_map_physical{213.0}=0x2310 +phy_chain_tx_lane_map_physical{217.0}=0x3210 +phy_chain_tx_lane_map_physical{221.0}=0x2301 +phy_chain_tx_lane_map_physical{225.0}=0x3210 +phy_chain_tx_lane_map_physical{229.0}=0x2310 +phy_chain_tx_lane_map_physical{233.0}=0x2310 +phy_chain_tx_lane_map_physical{237.0}=0x1023 +phy_chain_tx_lane_map_physical{241.0}=0x3210 +phy_chain_tx_lane_map_physical{245.0}=0x2310 +phy_chain_tx_lane_map_physical{249.0}=0x3210 +phy_chain_tx_lane_map_physical{253.0}=0x2310 + +## FalconCore [0-15] port RX Lane Swapping +phy_chain_rx_lane_map_physical{1.0}=0x3210 +phy_chain_rx_lane_map_physical{5.0}=0x3210 +phy_chain_rx_lane_map_physical{9.0}=0x3210 +phy_chain_rx_lane_map_physical{13.0}=0x3210 +phy_chain_rx_lane_map_physical{17.0}=0x2310 +phy_chain_rx_lane_map_physical{21.0}=0x0213 +phy_chain_rx_lane_map_physical{25.0}=0x2310 +phy_chain_rx_lane_map_physical{29.0}=0x3210 +phy_chain_rx_lane_map_physical{33.0}=0x3210 +phy_chain_rx_lane_map_physical{37.0}=0x3210 +phy_chain_rx_lane_map_physical{41.0}=0x3210 +phy_chain_rx_lane_map_physical{45.0}=0x3210 +phy_chain_rx_lane_map_physical{49.0}=0x3210 +phy_chain_rx_lane_map_physical{53.0}=0x3210 +phy_chain_rx_lane_map_physical{57.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x3210 + + +## FalconCore [16-31] port RX Lane Swapping +phy_chain_rx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{73.0}=0x3210 +phy_chain_rx_lane_map_physical{77.0}=0x3210 +phy_chain_rx_lane_map_physical{81.0}=0x3210 +phy_chain_rx_lane_map_physical{85.0}=0x3210 +phy_chain_rx_lane_map_physical{89.0}=0x3210 +phy_chain_rx_lane_map_physical{93.0}=0x3210 +phy_chain_rx_lane_map_physical{97.0}=0x3210 +phy_chain_rx_lane_map_physical{101.0}=0x3201 +phy_chain_rx_lane_map_physical{105.0}=0x3210 +phy_chain_rx_lane_map_physical{109.0}=0x3210 +phy_chain_rx_lane_map_physical{113.0}=0x3210 +phy_chain_rx_lane_map_physical{117.0}=0x3210 +phy_chain_rx_lane_map_physical{121.0}=0x3210 +phy_chain_rx_lane_map_physical{125.0}=0x3210 + + +## FalconCore [32-47] port RX Lane Swapping +phy_chain_rx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_lane_map_physical{133.0}=0x2301 +phy_chain_rx_lane_map_physical{137.0}=0x3210 +phy_chain_rx_lane_map_physical{141.0}=0x2310 +phy_chain_rx_lane_map_physical{145.0}=0x3210 +phy_chain_rx_lane_map_physical{149.0}=0x3210 +phy_chain_rx_lane_map_physical{153.0}=0x3210 +phy_chain_rx_lane_map_physical{157.0}=0x3210 +phy_chain_rx_lane_map_physical{161.0}=0x3210 +phy_chain_rx_lane_map_physical{165.0}=0x3210 +phy_chain_rx_lane_map_physical{169.0}=0x3210 +phy_chain_rx_lane_map_physical{173.0}=0x3210 +phy_chain_rx_lane_map_physical{177.0}=0x3210 +phy_chain_rx_lane_map_physical{181.0}=0x3210 +phy_chain_rx_lane_map_physical{185.0}=0x3210 +phy_chain_rx_lane_map_physical{189.0}=0x3210 + + +## FalconCore [48-63] port RX Lan Swapping +phy_chain_rx_lane_map_physical{193.0}=0x3210 +phy_chain_rx_lane_map_physical{197.0}=0x3210 +phy_chain_rx_lane_map_physical{201.0}=0x3210 +phy_chain_rx_lane_map_physical{205.0}=0x3210 +phy_chain_rx_lane_map_physical{209.0}=0x3210 +phy_chain_rx_lane_map_physical{213.0}=0x3210 +phy_chain_rx_lane_map_physical{217.0}=0x3210 +phy_chain_rx_lane_map_physical{221.0}=0x3210 +phy_chain_rx_lane_map_physical{225.0}=0x3210 +phy_chain_rx_lane_map_physical{229.0}=0x2301 +phy_chain_rx_lane_map_physical{233.0}=0x3210 +phy_chain_rx_lane_map_physical{237.0}=0x1023 +phy_chain_rx_lane_map_physical{241.0}=0x3210 +phy_chain_rx_lane_map_physical{245.0}=0x3210 +phy_chain_rx_lane_map_physical{249.0}=0x3210 +phy_chain_rx_lane_map_physical{253.0}=0x3210 + + +## FalconCore[0-15] ports TX polarity flip +phy_chain_tx_polarity_flip_physical{1.0}=0x1 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{37.0}=0x0 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x0 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_tx_polarity_flip_physical{56.0}=0x0 +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_tx_polarity_flip_physical{58.0}=0x0 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 + +## FalconCore[16-31] ports TX polarity flip +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_tx_polarity_flip_physical{82.0}=0x0 +phy_chain_tx_polarity_flip_physical{83.0}=0x0 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x0 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x0 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_tx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x0 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 +phy_chain_tx_polarity_flip_physical{113.0}=0x0 +phy_chain_tx_polarity_flip_physical{114.0}=0x1 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x0 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x0 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 + +## FalconCore[32-47] ports TX polarity flip +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_tx_polarity_flip_physical{133.0}=0x0 +phy_chain_tx_polarity_flip_physical{134.0}=0x0 +phy_chain_tx_polarity_flip_physical{135.0}=0x0 +phy_chain_tx_polarity_flip_physical{136.0}=0x0 +phy_chain_tx_polarity_flip_physical{137.0}=0x0 +phy_chain_tx_polarity_flip_physical{138.0}=0x1 +phy_chain_tx_polarity_flip_physical{139.0}=0x0 +phy_chain_tx_polarity_flip_physical{140.0}=0x0 +phy_chain_tx_polarity_flip_physical{141.0}=0x0 +phy_chain_tx_polarity_flip_physical{142.0}=0x0 +phy_chain_tx_polarity_flip_physical{143.0}=0x0 +phy_chain_tx_polarity_flip_physical{144.0}=0x0 +phy_chain_tx_polarity_flip_physical{145.0}=0x1 +phy_chain_tx_polarity_flip_physical{146.0}=0x0 +phy_chain_tx_polarity_flip_physical{147.0}=0x0 +phy_chain_tx_polarity_flip_physical{148.0}=0x0 +phy_chain_tx_polarity_flip_physical{149.0}=0x0 +phy_chain_tx_polarity_flip_physical{150.0}=0x0 +phy_chain_tx_polarity_flip_physical{151.0}=0x0 +phy_chain_tx_polarity_flip_physical{152.0}=0x0 +phy_chain_tx_polarity_flip_physical{153.0}=0x0 +phy_chain_tx_polarity_flip_physical{154.0}=0x1 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x0 +phy_chain_tx_polarity_flip_physical{157.0}=0x0 +phy_chain_tx_polarity_flip_physical{158.0}=0x0 +phy_chain_tx_polarity_flip_physical{159.0}=0x0 +phy_chain_tx_polarity_flip_physical{160.0}=0x0 +phy_chain_tx_polarity_flip_physical{161.0}=0x1 +phy_chain_tx_polarity_flip_physical{162.0}=0x0 +phy_chain_tx_polarity_flip_physical{163.0}=0x0 +phy_chain_tx_polarity_flip_physical{164.0}=0x0 +phy_chain_tx_polarity_flip_physical{165.0}=0x0 +phy_chain_tx_polarity_flip_physical{166.0}=0x0 +phy_chain_tx_polarity_flip_physical{167.0}=0x0 +phy_chain_tx_polarity_flip_physical{168.0}=0x0 +phy_chain_tx_polarity_flip_physical{169.0}=0x0 +phy_chain_tx_polarity_flip_physical{170.0}=0x1 +phy_chain_tx_polarity_flip_physical{171.0}=0x0 +phy_chain_tx_polarity_flip_physical{172.0}=0x0 +phy_chain_tx_polarity_flip_physical{173.0}=0x0 +phy_chain_tx_polarity_flip_physical{174.0}=0x0 +phy_chain_tx_polarity_flip_physical{175.0}=0x0 +phy_chain_tx_polarity_flip_physical{176.0}=0x0 +phy_chain_tx_polarity_flip_physical{177.0}=0x0 +phy_chain_tx_polarity_flip_physical{178.0}=0x1 +phy_chain_tx_polarity_flip_physical{179.0}=0x0 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 +phy_chain_tx_polarity_flip_physical{181.0}=0x0 +phy_chain_tx_polarity_flip_physical{182.0}=0x0 +phy_chain_tx_polarity_flip_physical{183.0}=0x0 +phy_chain_tx_polarity_flip_physical{184.0}=0x0 +phy_chain_tx_polarity_flip_physical{185.0}=0x0 +phy_chain_tx_polarity_flip_physical{186.0}=0x0 +phy_chain_tx_polarity_flip_physical{187.0}=0x0 +phy_chain_tx_polarity_flip_physical{188.0}=0x0 +phy_chain_tx_polarity_flip_physical{189.0}=0x0 +phy_chain_tx_polarity_flip_physical{190.0}=0x0 +phy_chain_tx_polarity_flip_physical{191.0}=0x0 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 + +## FalconCore[48-63] ports TX polarity flip +phy_chain_tx_polarity_flip_physical{193.0}=0x1 +phy_chain_tx_polarity_flip_physical{194.0}=0x0 +phy_chain_tx_polarity_flip_physical{195.0}=0x0 +phy_chain_tx_polarity_flip_physical{196.0}=0x0 +phy_chain_tx_polarity_flip_physical{197.0}=0x0 +phy_chain_tx_polarity_flip_physical{198.0}=0x0 +phy_chain_tx_polarity_flip_physical{199.0}=0x0 +phy_chain_tx_polarity_flip_physical{200.0}=0x0 +phy_chain_tx_polarity_flip_physical{201.0}=0x0 +phy_chain_tx_polarity_flip_physical{202.0}=0x1 +phy_chain_tx_polarity_flip_physical{203.0}=0x0 +phy_chain_tx_polarity_flip_physical{204.0}=0x0 +phy_chain_tx_polarity_flip_physical{205.0}=0x0 +phy_chain_tx_polarity_flip_physical{206.0}=0x0 +phy_chain_tx_polarity_flip_physical{207.0}=0x0 +phy_chain_tx_polarity_flip_physical{208.0}=0x0 +phy_chain_tx_polarity_flip_physical{209.0}=0x0 +phy_chain_tx_polarity_flip_physical{210.0}=0x0 +phy_chain_tx_polarity_flip_physical{211.0}=0x0 +phy_chain_tx_polarity_flip_physical{212.0}=0x0 +phy_chain_tx_polarity_flip_physical{213.0}=0x0 +phy_chain_tx_polarity_flip_physical{214.0}=0x0 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x0 +phy_chain_tx_polarity_flip_physical{217.0}=0x1 +phy_chain_tx_polarity_flip_physical{218.0}=0x0 +phy_chain_tx_polarity_flip_physical{219.0}=0x0 +phy_chain_tx_polarity_flip_physical{220.0}=0x0 +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x0 +phy_chain_tx_polarity_flip_physical{223.0}=0x0 +phy_chain_tx_polarity_flip_physical{224.0}=0x0 +phy_chain_tx_polarity_flip_physical{225.0}=0x1 +phy_chain_tx_polarity_flip_physical{226.0}=0x0 +phy_chain_tx_polarity_flip_physical{227.0}=0x0 +phy_chain_tx_polarity_flip_physical{228.0}=0x0 +phy_chain_tx_polarity_flip_physical{229.0}=0x0 +phy_chain_tx_polarity_flip_physical{230.0}=0x0 +phy_chain_tx_polarity_flip_physical{231.0}=0x0 +phy_chain_tx_polarity_flip_physical{232.0}=0x0 +phy_chain_tx_polarity_flip_physical{233.0}=0x1 +phy_chain_tx_polarity_flip_physical{234.0}=0x0 +phy_chain_tx_polarity_flip_physical{235.0}=0x0 +phy_chain_tx_polarity_flip_physical{236.0}=0x0 +phy_chain_tx_polarity_flip_physical{237.0}=0x0 +phy_chain_tx_polarity_flip_physical{238.0}=0x0 +phy_chain_tx_polarity_flip_physical{239.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x0 +phy_chain_tx_polarity_flip_physical{241.0}=0x1 +phy_chain_tx_polarity_flip_physical{242.0}=0x0 +phy_chain_tx_polarity_flip_physical{243.0}=0x0 +phy_chain_tx_polarity_flip_physical{244.0}=0x0 +phy_chain_tx_polarity_flip_physical{245.0}=0x0 +phy_chain_tx_polarity_flip_physical{246.0}=0x0 +phy_chain_tx_polarity_flip_physical{247.0}=0x0 +phy_chain_tx_polarity_flip_physical{248.0}=0x1 +phy_chain_tx_polarity_flip_physical{249.0}=0x1 +phy_chain_tx_polarity_flip_physical{250.0}=0x0 +phy_chain_tx_polarity_flip_physical{251.0}=0x0 +phy_chain_tx_polarity_flip_physical{252.0}=0x0 +phy_chain_tx_polarity_flip_physical{253.0}=0x0 +phy_chain_tx_polarity_flip_physical{254.0}=0x0 +phy_chain_tx_polarity_flip_physical{255.0}=0x0 +phy_chain_tx_polarity_flip_physical{256.0}=0x1 + +## FalconCore[0-15] ports RX polarity flip +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{37.0}=0x0 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +## FalconCore [16-31] ports RX polarity flip +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{83.0}=0x0 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_rx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{91.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x0 +phy_chain_rx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{94.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{97.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x0 +phy_chain_rx_polarity_flip_physical{111.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{117.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x0 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{127.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +## FalconCore [32-47] ports RX polarity flip +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{133.0}=0x0 +phy_chain_rx_polarity_flip_physical{134.0}=0x0 +phy_chain_rx_polarity_flip_physical{135.0}=0x0 +phy_chain_rx_polarity_flip_physical{136.0}=0x0 +phy_chain_rx_polarity_flip_physical{137.0}=0x0 +phy_chain_rx_polarity_flip_physical{138.0}=0x0 +phy_chain_rx_polarity_flip_physical{139.0}=0x0 +phy_chain_rx_polarity_flip_physical{140.0}=0x0 +phy_chain_rx_polarity_flip_physical{141.0}=0x0 +phy_chain_rx_polarity_flip_physical{142.0}=0x0 +phy_chain_rx_polarity_flip_physical{143.0}=0x0 +phy_chain_rx_polarity_flip_physical{144.0}=0x0 +phy_chain_rx_polarity_flip_physical{145.0}=0x0 +phy_chain_rx_polarity_flip_physical{146.0}=0x0 +phy_chain_rx_polarity_flip_physical{147.0}=0x0 +phy_chain_rx_polarity_flip_physical{148.0}=0x1 +phy_chain_rx_polarity_flip_physical{149.0}=0x0 +phy_chain_rx_polarity_flip_physical{150.0}=0x0 +phy_chain_rx_polarity_flip_physical{151.0}=0x0 +phy_chain_rx_polarity_flip_physical{152.0}=0x0 +phy_chain_rx_polarity_flip_physical{153.0}=0x0 +phy_chain_rx_polarity_flip_physical{154.0}=0x0 +phy_chain_rx_polarity_flip_physical{155.0}=0x0 +phy_chain_rx_polarity_flip_physical{156.0}=0x1 +phy_chain_rx_polarity_flip_physical{157.0}=0x0 +phy_chain_rx_polarity_flip_physical{158.0}=0x0 +phy_chain_rx_polarity_flip_physical{159.0}=0x0 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 +phy_chain_rx_polarity_flip_physical{161.0}=0x0 +phy_chain_rx_polarity_flip_physical{162.0}=0x0 +phy_chain_rx_polarity_flip_physical{163.0}=0x0 +phy_chain_rx_polarity_flip_physical{164.0}=0x0 +phy_chain_rx_polarity_flip_physical{165.0}=0x0 +phy_chain_rx_polarity_flip_physical{166.0}=0x0 +phy_chain_rx_polarity_flip_physical{167.0}=0x0 +phy_chain_rx_polarity_flip_physical{168.0}=0x0 +phy_chain_rx_polarity_flip_physical{169.0}=0x0 +phy_chain_rx_polarity_flip_physical{170.0}=0x0 +phy_chain_rx_polarity_flip_physical{171.0}=0x0 +phy_chain_rx_polarity_flip_physical{172.0}=0x0 +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x0 +phy_chain_rx_polarity_flip_physical{175.0}=0x0 +phy_chain_rx_polarity_flip_physical{176.0}=0x0 +phy_chain_rx_polarity_flip_physical{177.0}=0x0 +phy_chain_rx_polarity_flip_physical{178.0}=0x0 +phy_chain_rx_polarity_flip_physical{179.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x0 +phy_chain_rx_polarity_flip_physical{181.0}=0x0 +phy_chain_rx_polarity_flip_physical{182.0}=0x0 +phy_chain_rx_polarity_flip_physical{183.0}=0x0 +phy_chain_rx_polarity_flip_physical{184.0}=0x0 +phy_chain_rx_polarity_flip_physical{185.0}=0x0 +phy_chain_rx_polarity_flip_physical{186.0}=0x0 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x0 +phy_chain_rx_polarity_flip_physical{189.0}=0x0 +phy_chain_rx_polarity_flip_physical{190.0}=0x0 +phy_chain_rx_polarity_flip_physical{191.0}=0x0 +phy_chain_rx_polarity_flip_physical{192.0}=0x0 + +## FalconCore [48-63] ports RX polarity flip +phy_chain_rx_polarity_flip_physical{193.0}=0x0 +phy_chain_rx_polarity_flip_physical{194.0}=0x0 +phy_chain_rx_polarity_flip_physical{195.0}=0x0 +phy_chain_rx_polarity_flip_physical{196.0}=0x0 +phy_chain_rx_polarity_flip_physical{197.0}=0x0 +phy_chain_rx_polarity_flip_physical{198.0}=0x0 +phy_chain_rx_polarity_flip_physical{199.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x0 +phy_chain_rx_polarity_flip_physical{201.0}=0x0 +phy_chain_rx_polarity_flip_physical{202.0}=0x0 +phy_chain_rx_polarity_flip_physical{203.0}=0x0 +phy_chain_rx_polarity_flip_physical{204.0}=0x0 +phy_chain_rx_polarity_flip_physical{205.0}=0x0 +phy_chain_rx_polarity_flip_physical{206.0}=0x0 +phy_chain_rx_polarity_flip_physical{207.0}=0x0 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 +phy_chain_rx_polarity_flip_physical{209.0}=0x0 +phy_chain_rx_polarity_flip_physical{210.0}=0x0 +phy_chain_rx_polarity_flip_physical{211.0}=0x1 +phy_chain_rx_polarity_flip_physical{212.0}=0x1 +phy_chain_rx_polarity_flip_physical{213.0}=0x0 +phy_chain_rx_polarity_flip_physical{214.0}=0x0 +phy_chain_rx_polarity_flip_physical{215.0}=0x0 +phy_chain_rx_polarity_flip_physical{216.0}=0x0 +phy_chain_rx_polarity_flip_physical{217.0}=0x0 +phy_chain_rx_polarity_flip_physical{218.0}=0x0 +phy_chain_rx_polarity_flip_physical{219.0}=0x1 +phy_chain_rx_polarity_flip_physical{220.0}=0x0 +phy_chain_rx_polarity_flip_physical{221.0}=0x0 +phy_chain_rx_polarity_flip_physical{222.0}=0x0 +phy_chain_rx_polarity_flip_physical{223.0}=0x0 +phy_chain_rx_polarity_flip_physical{224.0}=0x0 +phy_chain_rx_polarity_flip_physical{225.0}=0x0 +phy_chain_rx_polarity_flip_physical{226.0}=0x0 +phy_chain_rx_polarity_flip_physical{227.0}=0x0 +phy_chain_rx_polarity_flip_physical{228.0}=0x0 +phy_chain_rx_polarity_flip_physical{229.0}=0x0 +phy_chain_rx_polarity_flip_physical{230.0}=0x0 +phy_chain_rx_polarity_flip_physical{231.0}=0x0 +phy_chain_rx_polarity_flip_physical{232.0}=0x0 +phy_chain_rx_polarity_flip_physical{233.0}=0x0 +phy_chain_rx_polarity_flip_physical{234.0}=0x0 +phy_chain_rx_polarity_flip_physical{235.0}=0x0 +phy_chain_rx_polarity_flip_physical{236.0}=0x0 +phy_chain_rx_polarity_flip_physical{237.0}=0x0 +phy_chain_rx_polarity_flip_physical{238.0}=0x0 +phy_chain_rx_polarity_flip_physical{239.0}=0x0 +phy_chain_rx_polarity_flip_physical{240.0}=0x0 +phy_chain_rx_polarity_flip_physical{241.0}=0x0 +phy_chain_rx_polarity_flip_physical{242.0}=0x0 +phy_chain_rx_polarity_flip_physical{243.0}=0x1 +phy_chain_rx_polarity_flip_physical{244.0}=0x0 +phy_chain_rx_polarity_flip_physical{245.0}=0x0 +phy_chain_rx_polarity_flip_physical{246.0}=0x0 +phy_chain_rx_polarity_flip_physical{247.0}=0x0 +phy_chain_rx_polarity_flip_physical{248.0}=0x0 +phy_chain_rx_polarity_flip_physical{249.0}=0x0 +phy_chain_rx_polarity_flip_physical{250.0}=0x0 +phy_chain_rx_polarity_flip_physical{251.0}=0x1 +phy_chain_rx_polarity_flip_physical{252.0}=0x0 +phy_chain_rx_polarity_flip_physical{253.0}=0x0 +phy_chain_rx_polarity_flip_physical{254.0}=0x0 +phy_chain_rx_polarity_flip_physical{255.0}=0x0 +phy_chain_rx_polarity_flip_physical{256.0}=0x0 + +dport_map_enable=1 +dport_map_port_3=68 +dport_map_port_4=69 +dport_map_port_5=3 +dport_map_port_6=4 +dport_map_port_7=70 +dport_map_port_8=71 +dport_map_port_9=5 +dport_map_port_10=6 +dport_map_port_11=72 +dport_map_port_12=73 +dport_map_port_13=7 +dport_map_port_14=8 +dport_map_port_15=74 +dport_map_port_16=75 +dport_map_port_34=9 +dport_map_port_35=10 +dport_map_port_36=76 +dport_map_port_37=77 +dport_map_port_38=11 +dport_map_port_39=12 +dport_map_port_40=78 +dport_map_port_41=79 +dport_map_port_42=13 +dport_map_port_43=14 +dport_map_port_44=80 +dport_map_port_45=81 +dport_map_port_46=15 +dport_map_port_47=16 +dport_map_port_48=82 +dport_map_port_49=83 +dport_map_port_68=34 +dport_map_port_69=35 +dport_map_port_70=102 +dport_map_port_71=103 +dport_map_port_72=36 +dport_map_port_73=37 +dport_map_port_74=104 +dport_map_port_75=105 +dport_map_port_76=38 +dport_map_port_77=39 +dport_map_port_78=106 +dport_map_port_79=107 +dport_map_port_80=40 +dport_map_port_81=41 +dport_map_port_82=108 +dport_map_port_83=109 +dport_map_port_102=42 +dport_map_port_103=43 +dport_map_port_104=110 +dport_map_port_105=111 +dport_map_port_106=44 +dport_map_port_107=45 +dport_map_port_108=112 +dport_map_port_109=113 +dport_map_port_110=46 +dport_map_port_111=47 +dport_map_port_112=114 +dport_map_port_113=115 +dport_map_port_114=48 +dport_map_port_115=49 + +## xe - 40G +### POST: 24(18) MAIN: 62(3E) PRE: 8(08) +serdes_preemphasis_1=0x0B3F02 +serdes_preemphasis_2=0x0B3F02 +serdes_preemphasis_5=0x0A3F02 +serdes_preemphasis_6=0x0A3F02 +serdes_preemphasis_9=0x0A3F02 +serdes_preemphasis_10=0x0A3F02 +serdes_preemphasis_13=0x093E02 +serdes_preemphasis_14=0x093D02 +serdes_preemphasis_34=0x093C02 +serdes_preemphasis_35=0x093C02 +serdes_preemphasis_38=0x093C02 +serdes_preemphasis_39=0x093C02 +serdes_preemphasis_42=0x083B01 +serdes_preemphasis_43=0x083B01 +serdes_preemphasis_46=0x063800 +serdes_preemphasis_47=0x063A00 +serdes_preemphasis_68=0x073900 +serdes_preemphasis_69=0x063A00 +serdes_preemphasis_72=0x083C00 +serdes_preemphasis_73=0x073A00 +serdes_preemphasis_76=0x073B00 +serdes_preemphasis_77=0x083C00 +serdes_preemphasis_80=0x083C01 +serdes_preemphasis_81=0x083C01 +serdes_preemphasis_102=0x093E02 +serdes_preemphasis_103=0x093E02 +serdes_preemphasis_106=0x093E02 +serdes_preemphasis_107=0x093E02 +serdes_preemphasis_110=0x0A3F02 +serdes_preemphasis_111=0x0B4002 +serdes_preemphasis_114=0x0B4002 +serdes_preemphasis_115=0x0B4002 +serdes_preemphasis_3=0x0B3F02 +serdes_preemphasis_4=0x0B3F02 +serdes_preemphasis_7=0x0A3F02 +serdes_preemphasis_8=0x0A3F02 +serdes_preemphasis_11=0x0A3F02 +serdes_preemphasis_12=0x0A3F02 +serdes_preemphasis_15=0x083E02 +serdes_preemphasis_16=0x083D02 +serdes_preemphasis_36=0x083C02 +serdes_preemphasis_37=0x073A02 +serdes_preemphasis_40=0x083B02 +serdes_preemphasis_41=0x073802 +serdes_preemphasis_44=0x073A01 +serdes_preemphasis_45=0x063901 +serdes_preemphasis_48=0x073101 +serdes_preemphasis_49=0x053500 +serdes_preemphasis_70=0x053500 +serdes_preemphasis_71=0x063800 +serdes_preemphasis_74=0x073A00 +serdes_preemphasis_75=0x063A00 +serdes_preemphasis_78=0x083C00 +serdes_preemphasis_79=0x073C00 +serdes_preemphasis_82=0x083C01 +serdes_preemphasis_83=0x093D01 +serdes_preemphasis_104=0x093E02 +serdes_preemphasis_105=0x083E02 +serdes_preemphasis_108=0x0A3E02 +serdes_preemphasis_109=0x093E02 +serdes_preemphasis_112=0x0B3F02 +serdes_preemphasis_113=0x0B3F02 +serdes_preemphasis_116=0x0B4002 +serdes_preemphasis_117=0x0B4002 + +### PRE: POST2: POST3 +serdes_preemphasis_pre2_post2_post3_1=0x000202 +serdes_preemphasis_pre2_post2_post3_2=0x000202 +serdes_preemphasis_pre2_post2_post3_5=0x000202 +serdes_preemphasis_pre2_post2_post3_6=0x000202 +serdes_preemphasis_pre2_post2_post3_9=0x000202 +serdes_preemphasis_pre2_post2_post3_10=0x000202 +serdes_preemphasis_pre2_post2_post3_13=0x000202 +serdes_preemphasis_pre2_post2_post3_14=0x000202 +serdes_preemphasis_pre2_post2_post3_34=0x000201 +serdes_preemphasis_pre2_post2_post3_35=0x000202 +serdes_preemphasis_pre2_post2_post3_38=0x000202 +serdes_preemphasis_pre2_post2_post3_39=0x000202 +serdes_preemphasis_pre2_post2_post3_42=0x000101 +serdes_preemphasis_pre2_post2_post3_43=0x000101 +serdes_preemphasis_pre2_post2_post3_46=0x000101 +serdes_preemphasis_pre2_post2_post3_47=0x000101 +serdes_preemphasis_pre2_post2_post3_68=0x000101 +serdes_preemphasis_pre2_post2_post3_69=0x000101 +serdes_preemphasis_pre2_post2_post3_72=0x000101 +serdes_preemphasis_pre2_post2_post3_73=0x000101 +serdes_preemphasis_pre2_post2_post3_76=0x000101 +serdes_preemphasis_pre2_post2_post3_77=0x000101 +serdes_preemphasis_pre2_post2_post3_80=0x000101 +serdes_preemphasis_pre2_post2_post3_81=0x000101 +serdes_preemphasis_pre2_post2_post3_102=0x000202 +serdes_preemphasis_pre2_post2_post3_103=0x000202 +serdes_preemphasis_pre2_post2_post3_106=0x000202 +serdes_preemphasis_pre2_post2_post3_107=0x000202 +serdes_preemphasis_pre2_post2_post3_110=0x000202 +serdes_preemphasis_pre2_post2_post3_111=0x000202 +serdes_preemphasis_pre2_post2_post3_114=0x000202 +serdes_preemphasis_pre2_post2_post3_115=0x000202 +serdes_preemphasis_pre2_post2_post3_3=0x000202 +serdes_preemphasis_pre2_post2_post3_4=0x000202 +serdes_preemphasis_pre2_post2_post3_7=0x000202 +serdes_preemphasis_pre2_post2_post3_8=0x000202 +serdes_preemphasis_pre2_post2_post3_11=0x000202 +serdes_preemphasis_pre2_post2_post3_12=0x000202 +serdes_preemphasis_pre2_post2_post3_15=0x000202 +serdes_preemphasis_pre2_post2_post3_16=0x000202 +serdes_preemphasis_pre2_post2_post3_36=0x000201 +serdes_preemphasis_pre2_post2_post3_37=0x000201 +serdes_preemphasis_pre2_post2_post3_40=0x000201 +serdes_preemphasis_pre2_post2_post3_41=0x000201 +serdes_preemphasis_pre2_post2_post3_44=0x000101 +serdes_preemphasis_pre2_post2_post3_45=0x000101 +serdes_preemphasis_pre2_post2_post3_48=0x000000 +serdes_preemphasis_pre2_post2_post3_49=0x000100 +serdes_preemphasis_pre2_post2_post3_70=0x000100 +serdes_preemphasis_pre2_post2_post3_71=0x000100 +serdes_preemphasis_pre2_post2_post3_74=0x000101 +serdes_preemphasis_pre2_post2_post3_75=0x000101 +serdes_preemphasis_pre2_post2_post3_78=0x000101 +serdes_preemphasis_pre2_post2_post3_79=0x000101 +serdes_preemphasis_pre2_post2_post3_82=0x000101 +serdes_preemphasis_pre2_post2_post3_83=0x000101 +serdes_preemphasis_pre2_post2_post3_104=0x000202 +serdes_preemphasis_pre2_post2_post3_105=0x000202 +serdes_preemphasis_pre2_post2_post3_108=0x000202 +serdes_preemphasis_pre2_post2_post3_109=0x000202 +serdes_preemphasis_pre2_post2_post3_112=0x000202 +serdes_preemphasis_pre2_post2_post3_113=0x000202 +serdes_preemphasis_pre2_post2_post3_116=0x000202 +serdes_preemphasis_pre2_post2_post3_117=0x000202 + +# Interface Type +serdes_if_type_1=28 +serdes_if_type_2=28 +serdes_if_type_5=28 +serdes_if_type_6=28 +serdes_if_type_9=28 +serdes_if_type_10=28 +serdes_if_type_13=28 +serdes_if_type_14=28 +serdes_if_type_34=28 +serdes_if_type_35=28 +serdes_if_type_38=28 +serdes_if_type_39=28 +serdes_if_type_42=28 +serdes_if_type_43=28 +serdes_if_type_46=28 +serdes_if_type_47=28 +serdes_if_type_68=28 +serdes_if_type_69=28 +serdes_if_type_72=28 +serdes_if_type_73=28 +serdes_if_type_76=28 +serdes_if_type_77=28 +serdes_if_type_80=28 +serdes_if_type_81=28 +serdes_if_type_102=28 +serdes_if_type_103=28 +serdes_if_type_106=28 +serdes_if_type_107=28 +serdes_if_type_110=28 +serdes_if_type_111=28 +serdes_if_type_114=28 +serdes_if_type_115=28 +serdes_if_type_3=28 +serdes_if_type_4=28 +serdes_if_type_7=28 +serdes_if_type_8=28 +serdes_if_type_11=28 +serdes_if_type_12=28 +serdes_if_type_15=28 +serdes_if_type_16=28 +serdes_if_type_36=28 +serdes_if_type_37=28 +serdes_if_type_40=28 +serdes_if_type_41=28 +serdes_if_type_44=28 +serdes_if_type_45=28 +serdes_if_type_48=28 +serdes_if_type_49=28 +serdes_if_type_70=28 +serdes_if_type_71=28 +serdes_if_type_74=28 +serdes_if_type_75=28 +serdes_if_type_78=28 +serdes_if_type_79=28 +serdes_if_type_82=28 +serdes_if_type_83=28 +serdes_if_type_104=28 +serdes_if_type_105=28 +serdes_if_type_108=28 +serdes_if_type_109=28 +serdes_if_type_112=28 +serdes_if_type_113=28 +serdes_if_type_116=28 +serdes_if_type_117=28 diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/default_sku b/device/inventec/x86_64-inventec_d7264q28b-r0/default_sku new file mode 100644 index 00000000000..134ade2e2cd --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/default_sku @@ -0,0 +1 @@ +INVENTEC-D7264Q28B t1 diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/installer.conf b/device/inventec/x86_64-inventec_d7264q28b-r0/installer.conf new file mode 100644 index 00000000000..1db64ba02c3 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +VAR_LOG_SIZE=1024 diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/led_proc_init.soc b/device/inventec/x86_64-inventec_d7264q28b-r0/led_proc_init.soc new file mode 100644 index 00000000000..296f8746f10 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/led_proc_init.soc @@ -0,0 +1,273 @@ +#LED processor initialization for Inventec Sequoia platform + +led 0 stop +led 0 prog 02 00 60 F1 12 00 DA 0F 70 10 67 72 67 6D 77 06 02 A0 60 F0 02 00 60 F2 12 00 02 00 60 F4 06 F0 4A 01 71 41 4A 03 27 67 6D 4A 02 27 67 6D 06 F2 28 32 08 67 6D 06 F2 28 32 00 32 01 B7 67 6D 77 4D 67 75 67 6D 67 75 67 6D 67 72 67 6D DA A0 70 5F 86 F0 86 F2 86 F4 06 F4 D2 04 74 2E 77 1A 12 00 DA 00 70 6B 67 75 67 6D 77 61 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=59 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=57 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=58 +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=51 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=49 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=50 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=63 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=61 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=62 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=55 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=53 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=54 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=43 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=41 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=42 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=35 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=33 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=34 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=47 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=45 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=46 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=39 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=37 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=38 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=27 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=25 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=26 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=19 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=17 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=18 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=31 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=29 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=30 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=23 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=21 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=22 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=11 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=9 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=10 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=3 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=1 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=2 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=0 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=15 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=13 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=14 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=7 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=5 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=6 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=4 +led 0 start + +led 1 stop +led 1 prog 02 00 60 F1 12 00 DA 0F 70 10 67 72 67 6D 77 06 02 A0 60 F0 02 00 60 F2 12 00 02 00 60 F4 06 F0 4A 01 71 41 4A 03 27 67 6D 4A 02 27 67 6D 06 F2 28 32 08 67 6D 06 F2 28 32 00 32 01 B7 67 6D 77 4D 67 75 67 6D 67 75 67 6D 67 72 67 6D DA A0 70 5F 86 F0 86 F2 86 F4 06 F4 D2 04 74 2E 77 1A 12 00 DA 00 70 6B 67 75 67 6D 77 61 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=7 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=5 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=6 +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=15 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=13 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=14 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=3 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=1 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=2 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=11 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=9 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=10 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=23 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=21 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=22 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=31 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=29 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=30 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=19 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=17 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=18 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=27 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=25 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=26 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=39 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=37 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=38 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=47 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=45 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=46 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=35 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=33 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=34 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=43 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=41 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=42 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=55 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=53 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=54 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=63 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=61 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=62 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=60 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=51 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=49 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=50 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=59 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=57 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=58 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=56 +led 1 start + +led 2 stop +led 2 prog 02 00 60 F1 12 00 DA 0F 70 10 67 72 67 6D 77 06 02 A0 60 F0 02 00 60 F2 12 00 02 00 60 F4 06 F0 4A 01 71 41 4A 03 27 67 6D 4A 02 27 67 6D 06 F2 28 32 08 67 6D 06 F2 28 32 00 32 01 B7 67 6D 77 4D 67 75 67 6D 67 75 67 6D 67 72 67 6D DA A0 70 5F 86 F0 86 F2 86 F4 06 F4 D2 04 74 2E 77 1A 12 00 DA 00 70 6B 67 75 67 6D 77 61 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=59 +m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=57 +m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=58 +m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=56 +m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=51 +m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=49 +m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=50 +m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=48 +m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=63 +m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=61 +m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=62 +m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=60 +m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=55 +m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=53 +m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=54 +m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=52 +m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=43 +m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=41 +m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=42 +m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=40 +m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=35 +m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=33 +m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=34 +m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=32 +m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=47 +m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=45 +m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=46 +m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=44 +m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=39 +m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=37 +m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=38 +m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=36 +m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=27 +m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=25 +m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=26 +m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=24 +m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=19 +m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=17 +m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=18 +m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=16 +m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=31 +m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=29 +m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=30 +m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=28 +m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=23 +m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=21 +m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=22 +m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=20 +m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=11 +m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=9 +m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=10 +m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=8 +m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=3 +m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=1 +m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=2 +m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=0 +m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=15 +m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=13 +m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=14 +m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=12 +m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=7 +m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=5 +m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=6 +m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=4 +led 2 start + +led 3 stop +led 3 prog 02 00 60 F1 12 00 DA 0F 70 10 67 72 67 6D 77 06 02 A0 60 F0 02 00 60 F2 12 00 02 00 60 F4 06 F0 4A 01 71 41 4A 03 27 67 6D 4A 02 27 67 6D 06 F2 28 32 08 67 6D 06 F2 28 32 00 32 01 B7 67 6D 77 4D 67 75 67 6D 67 75 67 6D 67 72 67 6D DA A0 70 5F 86 F0 86 F2 86 F4 06 F4 D2 04 74 2E 77 1A 12 00 DA 00 70 6B 67 75 67 6D 77 61 3E F1 87 86 F1 81 57 17 27 57 07 27 57 +m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=7 +m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=5 +m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=6 +m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=4 +m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=15 +m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=13 +m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=14 +m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=12 +m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=3 +m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=1 +m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=2 +m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=0 +m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=11 +m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=9 +m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=10 +m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=8 +m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=23 +m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=21 +m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=22 +m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=20 +m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=31 +m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=29 +m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=30 +m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=28 +m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=19 +m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=17 +m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=18 +m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=16 +m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=27 +m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=25 +m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=26 +m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=24 +m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=39 +m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=37 +m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=38 +m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=36 +m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=47 +m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=45 +m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=46 +m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=44 +m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=35 +m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=33 +m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=34 +m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=32 +m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=43 +m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=41 +m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=42 +m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=40 +m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=55 +m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=53 +m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=54 +m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=52 +m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=63 +m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=61 +m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=62 +m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=60 +m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=51 +m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=49 +m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=50 +m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=48 +m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=59 +m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=57 +m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=58 +m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=56 +led 3 start diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/plugins/eeprom.py b/device/inventec/x86_64-inventec_d7264q28b-r0/plugins/eeprom.py new file mode 100644 index 00000000000..de5c24ba0e6 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7032q28b +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/plugins/psuutil.py b/device/inventec/x86_64-inventec_d7264q28b-r0/plugins/psuutil.py new file mode 100755 index 00000000000..77726ccd321 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/plugins/psuutil.py @@ -0,0 +1,84 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + PSU_DIR = "/sys/class/hwmon/hwmon2" + + def __init__(self): + PsuBase.__init__(self) + +# Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psoc_psu'+ str(index) + '_iout' + attr_path = self.PSU_DIR +'/' + attr_file + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU status + if (attr_value != 0): + status = 1 + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + ind = index-1 + attr_file ='psu'+ str(ind) + normal_attr_value = '0 : normal' + attr_path = self.PSU_DIR +'/' + attr_file + attr_value = self.get_attr_value(attr_path) + if (attr_value != 'ERR'): + # Check for PSU presence + if (attr_value == normal_attr_value): + status = 1 + return status + diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/plugins/sfputil.py b/device/inventec/x86_64-inventec_d7264q28b-r0/plugins/sfputil.py new file mode 100755 index 00000000000..286d84c2a04 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/plugins/sfputil.py @@ -0,0 +1,374 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +# +# INV_FIX-4037 +# (1) Support get_transceiver_change_event. +# Create the SWPSEventMonitor class to handle any kobject event from the SWPS driver. +# (2) Integrated with the optoe driver +# Due to installing the optoe driver to create the i2c topology, +# it needs to overwrite the followings functions which are declared in the sfputilbase.py. +# First, it needs to impore some SFP-related class object +# +try: + import time + import socket, re,os + from collections import OrderedDict + from sonic_sfp.sfputilbase import SfpUtilBase + from sonic_sfp.sff8472 import sff8472Dom +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +SFP_TEMPE_OFFSET = 96 +SFP_TEMPE_WIDTH = 2 +SFP_VLOT_OFFSET = 98 +SFP_VOLT_WIDTH = 2 +SFP_CHANNL_MON_OFFSET = 100 +SFP_CHANNL_MON_WIDTH = 6 +NETLINK_KOBJECT_UEVENT = 15 +monitor = None +class SWPSEventMonitor(object): + def __init__(self): + self.recieved_events = OrderedDict() + self.socket = socket.socket( + socket.AF_NETLINK, socket.SOCK_DGRAM, NETLINK_KOBJECT_UEVENT) + def start(self): + self.socket.bind((os.getpid(), -1)) + def stop(self): + self.socket.close() + def __enter__(self): + self.start() + return self + def __exit__(self, exc_type, exc_value, traceback): + self.stop() + def __iter__(self): + global monitor + while True: + for item in monitor.next_events(): + yield item + def next_events(self): + data = self.socket.recv(16384) + event = {} + for item in data.split(b'\x00'): + if not item: + # check if we have an event and if we already received it + if event and event['SEQNUM'] not in self.recieved_events: + self.recieved_events[event['SEQNUM']] = None + if (len(self.recieved_events) > 100): + self.recieved_events.popitem(last=False) + yield event + event = {} + else: + try: + k, v = item.split(b'=', 1) + event[k.decode('ascii')] = v.decode('ascii') + except ValueError: + pass + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 63 + PORTS_IN_BLOCK = 64 + QSFP_PORT_START = 0 + QSFP_PORT_END = 63 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 0: 10, + 1: 11, + 2: 12, + 3: 13, + 4: 14, + 5: 15, + 6: 16, + 7: 17, + 8: 18, + 9: 19, + 10: 20, + 11: 21, + 12: 22, + 13: 23, + 14: 24, + 15: 25, + 16: 26, + 17: 27, + 18: 28, + 19: 29, + 20: 30, + 21: 31, + 22: 32, + 23: 33, + 24: 34, + 25: 35, + 26: 36, + 27: 37, + 28: 38, + 29: 39, + 30: 40, + 31: 41, + 32: 45, + 33: 44, + 34: 43, + 35: 42, + 36: 49, + 37: 48, + 38: 47, + 39: 46, + 40: 53, + 41: 52, + 42: 51, + 43: 50, + 44: 57, + 45: 56, + 46: 55, + 47: 54, + 48: 61, + 49: 60, + 50: 59, + 51: 58, + 52: 65, + 53: 64, + 54: 63, + 55: 62, + 56: 69, + 57: 68, + 58: 67, + 59: 66, + 60: 73, + 61: 72, + 62: 71, + 63: 70 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/bus/i2c/devices/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/class/swps/port"+str(port_num)+"/reset" + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + print "\nError:SFP's don't support this property" + return False + + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + +# +# INV_FIX-4037 +# (1) Support get_transceiver_change_event. +# Modify get_transceiver_change_event() to listen the SWPS kobject event. +# (2) Integrated with the optoe driver +# Due to installing the optoe driver to create the i2c topology, +# it needs to overwrite the followings functions which are declared in the sfputilbase.py. +# It modified the get_eeprom_dom_raw() and get_transceiver_dom_info_dict(). +# + def get_transceiver_change_event(self): + global monitor + port_dict = {} + with SWPSEventMonitor() as monitor: + for event in monitor: + if event['SUBSYSTEM'] == 'swps': + #print('SWPS event. From %s, ACTION %s, IF_TYPE %s, IF_LANE %s' % (event['DEVPATH'], event['ACTION'], event['IF_TYPE'], event['IF_LANE'])) + portname = event['DEVPATH'].split("/")[-1] + rc = re.match(r"port(?P\d+)",portname) + if rc is not None: + if event['ACTION'] == "remove": + remove_num = int(rc.group("num")) + port_dict[remove_num] = "0" + #port_dict[rc.group("num")] = "0" + if event['ACTION'] == "add": + add_num = int(rc.group("num")) + port_dict[add_num] = "1" + #port_dict[rc.group("num")] = "1" + return True, port_dict + return False, {} + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256) + + def get_transceiver_dom_info_dict(self, port_num): + if port_num in self.qsfp_ports: + return SfpUtilBase.get_transceiver_dom_info_dict(self, port_num) + else: + transceiver_dom_info_dict = {} + offset = 256 + file_path = self._get_port_eeprom_path(port_num, self.DOM_EEPROM_ADDR) + if not self._sfp_eeprom_present(file_path, 0): + return None + try: + sysfsfile_eeprom = open(file_path, "rb") + except IOError: + print("Error: reading sysfs file %s" % file_path) + return None + + sfpd_obj = sff8472Dom(None, 1) + if sfpd_obj is None: + return None + + dom_temperature_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + else: + return None + + dom_voltage_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_VLOT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + else: + return None + + dom_channel_monitor_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + else: + return None + + try: + sysfsfile_eeprom.close() + except IOError: + print("Error: closing sysfs file %s" % file_path) + return None + + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RXPower']['value'] + transceiver_dom_info_dict['rx2power'] = 'N/A' + transceiver_dom_info_dict['rx3power'] = 'N/A' + transceiver_dom_info_dict['rx4power'] = 'N/A' + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TXBias']['value'] + transceiver_dom_info_dict['tx2bias'] = 'N/A' + transceiver_dom_info_dict['tx3bias'] = 'N/A' + transceiver_dom_info_dict['tx4bias'] = 'N/A' + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TXPower']['value'] + transceiver_dom_info_dict['tx2power'] = 'N/A' + transceiver_dom_info_dict['tx3power'] = 'N/A' + transceiver_dom_info_dict['tx4power'] = 'N/A' + + return transceiver_dom_info_dict \ No newline at end of file diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/pmon_daemon_control.json b/device/inventec/x86_64-inventec_d7264q28b-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/inventec/x86_64-inventec_d7264q28b-r0/sensors.conf b/device/inventec/x86_64-inventec_d7264q28b-r0/sensors.conf new file mode 100644 index 00000000000..660ac6c970e --- /dev/null +++ b/device/inventec/x86_64-inventec_d7264q28b-r0/sensors.conf @@ -0,0 +1,47 @@ +# libsensors configuration file +chip "inv_psoc-*" + label temp1 "FrontSide Temperature" + label temp2 "FanBoard Temperature" + label temp3 "NearASIC Temperature" + label temp4 "Center(U10) Temperature" + label temp5 "CPU Board Temperature" + label temp6 "ASIC Temperature" + label temp7 "PSU1 Temperature1" + label temp8 "PSU2 Temperature1" + label temp9 "PSU1 Temperature2" + label temp10 "PSU2 Temperature2" + label fan1 "FanModule1 Front RPM" + label fan2 "FanModule1 Rear RPM" + label fan3 "FanModule2 Front RPM" + label fan4 "FanModule2 Rear RPM" + label fan5 "FanModule3 Front RPM" + label fan6 "FanModule3 Rear RPM" + label fan7 "FanModule4 Front RPM" + label fan8 "FanModule4 Rear RPM" + label fan9 "FanModule5 Front RPM" + label fan10 "FanModule5 Rear RPM" + label pwm1 "FanModule1 PWM" + label pwm2 "FanModule2 PWM" + label pwm3 "FanModule3 PWM" + label pwm4 "FanModule4 PWM" + label pwm5 "FanModule5 PWM" + label pwm6 "PSU1 FAN PWM" + label pwm7 "PSU2 FAN PWM" + label fan11 "PSU1 FAN RPM" + label fan12 "PSU2 FAN RPM" + label in1 "PSU1 Input Voltage" + label in2 "PSU2 Input Voltage" + label curr1 "PSU1 Input Current" + label curr2 "PSU2 Input Current" + label power1 "PSU1 Input Power" + label power2 "PSU2 Input Power" + label in3 "PSU1 Output Voltage" + label in4 "PSU2 Output Voltage" + label curr3 "PSU1 Output Current" + label curr4 "PSU2 Output Current" + label power3 "PSU1 Output Power" + label power4 "PSU2 Output Power" + compute power1 @*1000,@/1000 + compute power2 @*1000,@/1000 + compute power3 @*1000,@/1000 + compute power4 @*1000,@/1000 diff --git a/device/juniper/x86_64-juniper_qfx5210-r0/Juniper-QFX5210-64C/port_config.ini b/device/juniper/x86_64-juniper_qfx5210-r0/Juniper-QFX5210-64C/port_config.ini new file mode 100644 index 00000000000..da3321b5566 --- /dev/null +++ b/device/juniper/x86_64-juniper_qfx5210-r0/Juniper-QFX5210-64C/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias index speed +Ethernet0 73,74,75,76 hundredGigE1 0 100000 +Ethernet4 65,66,67,68 hundredGigE2 1 100000 +Ethernet8 81,82,83,84 hundredGigE3 2 100000 +Ethernet12 89,90,91,92 hundredGigE4 3 100000 +Ethernet16 105,106,107,108 hundredGigE5 4 100000 +Ethernet20 97,98,99,100 hundredGigE6 5 100000 +Ethernet24 113,114,115,116 hundredGigE7 6 100000 +Ethernet28 121,122,123,124 hundredGigE8 7 100000 +Ethernet32 41,42,43,44 hundredGigE9 8 100000 +Ethernet36 33,34,35,36 hundredGigE10 9 100000 +Ethernet40 49,50,51,52 hundredGigE11 10 100000 +Ethernet44 57,58,59,60 hundredGigE12 11 100000 +Ethernet48 137,138,139,140 hundredGigE13 12 100000 +Ethernet52 129,130,131,132 hundredGigE14 13 100000 +Ethernet56 145,146,147,148 hundredGigE15 14 100000 +Ethernet60 153,154,155,156 hundredGigE16 15 100000 +Ethernet64 173,174,175,176 hundredGigE17 16 100000 +Ethernet68 165,166,167,168 hundredGigE18 17 100000 +Ethernet72 181,182,183,184 hundredGigE19 18 100000 +Ethernet76 189,190,191,192 hundredGigE20 19 100000 +Ethernet80 13,14,15,16 hundredGigE21 20 100000 +Ethernet84 5,6,7,8 hundredGigE22 21 100000 +Ethernet88 29,30,31,32 hundredGigE23 22 100000 +Ethernet92 21,22,23,24 hundredGigE24 23 100000 +Ethernet96 205,206,207,208 hundredGigE25 24 100000 +Ethernet100 197,198,199,200 hundredGigE26 25 100000 +Ethernet104 213,214,215,216 hundredGigE27 26 100000 +Ethernet108 221,222,223,224 hundredGigE28 27 100000 +Ethernet112 229,230,231,232 hundredGigE29 28 100000 +Ethernet116 237,238,239,240 hundredGigE30 29 100000 +Ethernet120 245,246,247,248 hundredGigE31 30 100000 +Ethernet124 253,254,255,256 hundredGigE32 31 100000 +Ethernet128 69,70,71,72 hundredGigE33 32 100000 +Ethernet132 77,78,79,80 hundredGigE34 33 100000 +Ethernet136 93,94,95,96 hundredGigE35 34 100000 +Ethernet140 85,86,87,88 hundredGigE36 35 100000 +Ethernet144 101,102,103,104 hundredGigE37 36 100000 +Ethernet148 109,110,111,112 hundredGigE38 37 100000 +Ethernet152 125,126,127,128 hundredGigE39 38 100000 +Ethernet156 117,118,119,120 hundredGigE40 39 100000 +Ethernet160 37,38,39,40 hundredGigE41 40 100000 +Ethernet164 45,46,47,48 hundredGigE42 41 100000 +Ethernet168 61,62,63,64 hundredGigE43 42 100000 +Ethernet172 53,54,55,56 hundredGigE44 43 100000 +Ethernet176 133,134,135,136 hundredGigE45 44 100000 +Ethernet180 141,142,143,144 hundredGigE46 45 100000 +Ethernet184 157,158,159,160 hundredGigE47 46 100000 +Ethernet188 149,150,151,152 hundredGigE48 47 100000 +Ethernet192 161,162,163,164 hundredGigE49 48 100000 +Ethernet196 169,170,171,172 hundredGigE50 49 100000 +Ethernet200 185,186,187,188 hundredGigE51 50 100000 +Ethernet204 177,178,179,180 hundredGigE52 51 100000 +Ethernet208 1,2,3,4 hundredGigE53 52 100000 +Ethernet212 9,10,11,12 hundredGigE54 53 100000 +Ethernet216 25,26,27,28 hundredGigE55 54 100000 +Ethernet220 17,18,19,20 hundredGigE56 55 100000 +Ethernet224 193,194,195,196 hundredGigE57 56 100000 +Ethernet228 201,202,203,204 hundredGigE58 57 100000 +Ethernet232 217,218,219,220 hundredGigE59 58 100000 +Ethernet236 209,210,211,212 hundredGigE60 59 100000 +Ethernet240 225,226,227,228 hundredGigE61 60 100000 +Ethernet244 233,234,235,236 hundredGigE62 61 100000 +Ethernet248 249,250,251,252 hundredGigE63 62 100000 +Ethernet252 241,242,243,244 hundredGigE64 63 100000 diff --git a/device/juniper/x86_64-juniper_qfx5210-r0/Juniper-QFX5210-64C/sai.profile b/device/juniper/x86_64-juniper_qfx5210-r0/Juniper-QFX5210-64C/sai.profile new file mode 100644 index 00000000000..dca8c2f68c0 --- /dev/null +++ b/device/juniper/x86_64-juniper_qfx5210-r0/Juniper-QFX5210-64C/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-qfx5210-64x100G.config.bcm diff --git a/device/juniper/x86_64-juniper_qfx5210-r0/Juniper-QFX5210-64C/th2-qfx5210-64x100G.config.bcm b/device/juniper/x86_64-juniper_qfx5210-r0/Juniper-QFX5210-64C/th2-qfx5210-64x100G.config.bcm new file mode 100644 index 00000000000..bc421a4e515 --- /dev/null +++ b/device/juniper/x86_64-juniper_qfx5210-r0/Juniper-QFX5210-64C/th2-qfx5210-64x100G.config.bcm @@ -0,0 +1,875 @@ +# Broadcom Tomahawk SDK configuration +os=unix +schan_intr_enable=0 +l2_mem_entries=40960 +l2xmsg_mode=1 +l3_mem_entries=40960 +parity_correction=0 +parity_enable=0 +mmu_lossless=1 + +pbmp_xport_xe=0x1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff +pbmp_oversubscribe=0x1ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff + +# platform specific setting +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=8 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +dma_desc_timeout_usec=15000000 +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +oversubscribe_mode=1 + +#add loopback port +# port 33 is the first loopback port +# portmap_33=260:10 +# port 66 is the first management port +# portmap_66=257:10 +# port 67 is the second loopback port +# portmap_67=261:10 +# port 100 is the second management port +# portmap_100=259:10 +# port 101 is the third loopback port +# portmap_101=262:10 +# port 135 is the fourth loopback port +# portmap_135=263:10 + +#Port0 +#FC18 +portmap_36=73:100 +phy_chain_rx_lane_map_physical{73.0}=0x3210 +phy_chain_tx_lane_map_physical{73.0}=0x3021 +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x1 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 +#Port1 +#FC16 +portmap_34=65:100 +phy_chain_rx_lane_map_physical{65.0}=0x3210 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +#Port2 +#FC20 +portmap_38=81:100 +phy_chain_rx_lane_map_physical{81.0}=0x1230 +phy_chain_tx_lane_map_physical{81.0}=0x1032 +phy_chain_rx_polarity_flip_physical{81.0}=0x1 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{83.0}=0x1 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x1 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x0 +#Port3 +#FC22 +portmap_40=89:100 +phy_chain_rx_lane_map_physical{89.0}=0x0132 +phy_chain_tx_lane_map_physical{89.0}=0x1203 +phy_chain_rx_polarity_flip_physical{89.0}=0x1 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{91.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x1 +#Port4 +#FC26 +portmap_44=105:100 +phy_chain_rx_lane_map_physical{105.0}=0x3210 +phy_chain_tx_lane_map_physical{105.0}=0x0231 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 +#Port5 +#FC24 +portmap_42=97:100 +phy_chain_rx_lane_map_physical{97.0}=0x0213 +phy_chain_tx_lane_map_physical{97.0}=0x3210 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x1 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x1 +phy_chain_tx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +#Port6 +#FC 28 +portmap_46=113:100 +phy_chain_rx_lane_map_physical{113.0}=0x3021 +phy_chain_tx_lane_map_physical{113.0}=0x0312 +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x1 +#Port7 +#FC30 +portmap_48=121:100 +phy_chain_rx_lane_map_physical{121.0}=0x3021 +phy_chain_tx_lane_map_physical{121.0}=0x2130 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +#Port8 +#FC10 +portmap_11=41:100 +phy_chain_rx_lane_map_physical{41.0}=0x0132 +phy_chain_tx_lane_map_physical{41.0}=0x1302 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +#Port9 +#FC8 +portmap_9=33:100 +phy_chain_rx_lane_map_physical{33.0}=0x2310 +phy_chain_tx_lane_map_physical{33.0}=0x0213 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +#Port10 +#FC12 +portmap_13=49:100 +phy_chain_rx_lane_map_physical{49.0}=0x3210 +phy_chain_tx_lane_map_physical{49.0}=0x3102 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +#Port11 +#FC14 +portmap_15=57:100 +phy_chain_rx_lane_map_physical{57.0}=0x3210 +phy_chain_tx_lane_map_physical{57.0}=0x1302 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x0 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +#Port12 +#FC34 +portmap_70=137:100 +phy_chain_rx_lane_map_physical{137.0}=0x3210 +phy_chain_tx_lane_map_physical{137.0}=0x0213 +phy_chain_rx_polarity_flip_physical{137.0}=0x0 +phy_chain_rx_polarity_flip_physical{138.0}=0x0 +phy_chain_rx_polarity_flip_physical{139.0}=0x1 +phy_chain_rx_polarity_flip_physical{140.0}=0x0 +phy_chain_tx_polarity_flip_physical{137.0}=0x1 +phy_chain_tx_polarity_flip_physical{138.0}=0x0 +phy_chain_tx_polarity_flip_physical{139.0}=0x0 +phy_chain_tx_polarity_flip_physical{140.0}=0x0 +#Port13 +#FC32 +portmap_68=129:100 +phy_chain_rx_lane_map_physical{129.0}=0x3021 +phy_chain_tx_lane_map_physical{129.0}=0x1203 +phy_chain_rx_polarity_flip_physical{129.0}=0x1 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_tx_polarity_flip_physical{130.0}=0x1 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x1 +#Port14 +#FC36 +portmap_72=145:100 +phy_chain_rx_lane_map_physical{145.0}=0x0213 +phy_chain_tx_lane_map_physical{145.0}=0x2301 +phy_chain_rx_polarity_flip_physical{145.0}=0x1 +phy_chain_rx_polarity_flip_physical{146.0}=0x1 +phy_chain_rx_polarity_flip_physical{147.0}=0x0 +phy_chain_rx_polarity_flip_physical{148.0}=0x0 +phy_chain_tx_polarity_flip_physical{145.0}=0x0 +phy_chain_tx_polarity_flip_physical{146.0}=0x0 +phy_chain_tx_polarity_flip_physical{147.0}=0x0 +phy_chain_tx_polarity_flip_physical{148.0}=0x1 +#Port15 +#FC38 +portmap_74=153:100 +phy_chain_rx_lane_map_physical{153.0}=0x0213 +phy_chain_tx_lane_map_physical{153.0}=0x1302 +phy_chain_rx_polarity_flip_physical{153.0}=0x1 +phy_chain_rx_polarity_flip_physical{154.0}=0x0 +phy_chain_rx_polarity_flip_physical{155.0}=0x1 +phy_chain_rx_polarity_flip_physical{156.0}=0x1 +phy_chain_tx_polarity_flip_physical{153.0}=0x0 +phy_chain_tx_polarity_flip_physical{154.0}=0x1 +phy_chain_tx_polarity_flip_physical{155.0}=0x0 +phy_chain_tx_polarity_flip_physical{156.0}=0x0 +#Port16 +#FC43 +portmap_79=173:100 +phy_chain_rx_lane_map_physical{173.0}=0x1032 +phy_chain_tx_lane_map_physical{173.0}=0x1203 +phy_chain_rx_polarity_flip_physical{173.0}=0x0 +phy_chain_rx_polarity_flip_physical{174.0}=0x0 +phy_chain_rx_polarity_flip_physical{175.0}=0x0 +phy_chain_rx_polarity_flip_physical{176.0}=0x0 +phy_chain_tx_polarity_flip_physical{173.0}=0x1 +phy_chain_tx_polarity_flip_physical{174.0}=0x1 +phy_chain_tx_polarity_flip_physical{175.0}=0x0 +phy_chain_tx_polarity_flip_physical{176.0}=0x1 +#Port17 +#FC41 +portmap_77=165:100 +phy_chain_rx_lane_map_physical{165.0}=0x1230 +phy_chain_tx_lane_map_physical{165.0}=0x2130 +phy_chain_rx_polarity_flip_physical{165.0}=0x1 +phy_chain_rx_polarity_flip_physical{166.0}=0x0 +phy_chain_rx_polarity_flip_physical{167.0}=0x1 +phy_chain_rx_polarity_flip_physical{168.0}=0x1 +phy_chain_tx_polarity_flip_physical{165.0}=0x1 +phy_chain_tx_polarity_flip_physical{166.0}=0x0 +phy_chain_tx_polarity_flip_physical{167.0}=0x1 +phy_chain_tx_polarity_flip_physical{168.0}=0x0 +#Port18 +#FC45 +portmap_81=181:100 +phy_chain_rx_lane_map_physical{181.0}=0x0312 +phy_chain_tx_lane_map_physical{181.0}=0x3120 +phy_chain_rx_polarity_flip_physical{181.0}=0x0 +phy_chain_rx_polarity_flip_physical{182.0}=0x1 +phy_chain_rx_polarity_flip_physical{183.0}=0x1 +phy_chain_rx_polarity_flip_physical{184.0}=0x0 +phy_chain_tx_polarity_flip_physical{181.0}=0x0 +phy_chain_tx_polarity_flip_physical{182.0}=0x0 +phy_chain_tx_polarity_flip_physical{183.0}=0x1 +phy_chain_tx_polarity_flip_physical{184.0}=0x0 +#Port19 +#FC47 +portmap_83=189:100 +phy_chain_rx_lane_map_physical{189.0}=0x0132 +phy_chain_tx_lane_map_physical{189.0}=0x3210 +phy_chain_rx_polarity_flip_physical{189.0}=0x0 +phy_chain_rx_polarity_flip_physical{190.0}=0x1 +phy_chain_rx_polarity_flip_physical{191.0}=0x1 +phy_chain_rx_polarity_flip_physical{192.0}=0x1 +phy_chain_tx_polarity_flip_physical{189.0}=0x1 +phy_chain_tx_polarity_flip_physical{190.0}=0x0 +phy_chain_tx_polarity_flip_physical{191.0}=0x0 +phy_chain_tx_polarity_flip_physical{192.0}=0x0 +#Port20 +#FC3 +portmap_4=13:100 +phy_chain_rx_lane_map_physical{13.0}=0x3120 +phy_chain_tx_lane_map_physical{13.0}=0x3210 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 +#Port21 +#FC1 +portmap_2=5:100 +phy_chain_rx_lane_map_physical{5.0}=0x0213 +phy_chain_tx_lane_map_physical{5.0}=0x0321 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +#Port22 +#FC7 +portmap_8=29:100 +phy_chain_rx_lane_map_physical{29.0}=0x3021 +phy_chain_tx_lane_map_physical{29.0}=0x2130 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +#Port23 +#FC5 +portmap_6=21:100 +phy_chain_rx_lane_map_physical{21.0}=0x0321 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +#Port24 +#FC51 +portmap_105=205:100 +phy_chain_rx_lane_map_physical{205.0}=0x0132 +phy_chain_tx_lane_map_physical{205.0}=0x1230 +phy_chain_rx_polarity_flip_physical{205.0}=0x1 +phy_chain_rx_polarity_flip_physical{206.0}=0x1 +phy_chain_rx_polarity_flip_physical{207.0}=0x1 +phy_chain_rx_polarity_flip_physical{208.0}=0x0 +phy_chain_tx_polarity_flip_physical{205.0}=0x0 +phy_chain_tx_polarity_flip_physical{206.0}=0x1 +phy_chain_tx_polarity_flip_physical{207.0}=0x0 +phy_chain_tx_polarity_flip_physical{208.0}=0x1 +#Port25 +#FC49 +portmap_103=197:100 +phy_chain_rx_lane_map_physical{197.0}=0x1230 +phy_chain_tx_lane_map_physical{197.0}=0x3021 +phy_chain_rx_polarity_flip_physical{197.0}=0x0 +phy_chain_rx_polarity_flip_physical{198.0}=0x0 +phy_chain_rx_polarity_flip_physical{199.0}=0x0 +phy_chain_rx_polarity_flip_physical{200.0}=0x0 +phy_chain_tx_polarity_flip_physical{197.0}=0x1 +phy_chain_tx_polarity_flip_physical{198.0}=0x0 +phy_chain_tx_polarity_flip_physical{199.0}=0x1 +phy_chain_tx_polarity_flip_physical{200.0}=0x0 +#Port26 +#FC53 +portmap_107=213:100 +phy_chain_rx_lane_map_physical{213.0}=0x3210 +phy_chain_tx_lane_map_physical{213.0}=0x1230 +phy_chain_rx_polarity_flip_physical{213.0}=0x0 +phy_chain_rx_polarity_flip_physical{214.0}=0x1 +phy_chain_rx_polarity_flip_physical{215.0}=0x0 +phy_chain_rx_polarity_flip_physical{216.0}=0x1 +phy_chain_tx_polarity_flip_physical{213.0}=0x0 +phy_chain_tx_polarity_flip_physical{214.0}=0x0 +phy_chain_tx_polarity_flip_physical{215.0}=0x0 +phy_chain_tx_polarity_flip_physical{216.0}=0x1 +#Port27 +#FC55 +portmap_109=221:100 +phy_chain_rx_lane_map_physical{221.0}=0x3210 +phy_chain_tx_lane_map_physical{221.0}=0x3210 +phy_chain_rx_polarity_flip_physical{221.0}=0x1 +phy_chain_rx_polarity_flip_physical{222.0}=0x1 +phy_chain_rx_polarity_flip_physical{223.0}=0x0 +phy_chain_rx_polarity_flip_physical{224.0}=0x0 +phy_chain_tx_polarity_flip_physical{221.0}=0x0 +phy_chain_tx_polarity_flip_physical{222.0}=0x0 +phy_chain_tx_polarity_flip_physical{223.0}=0x0 +phy_chain_tx_polarity_flip_physical{224.0}=0x0 +#Port28 +#FC57 +portmap_111=229:100 +phy_chain_rx_lane_map_physical{229.0}=0x2301 +phy_chain_tx_lane_map_physical{229.0}=0x3210 +phy_chain_rx_polarity_flip_physical{229.0}=0x1 +phy_chain_rx_polarity_flip_physical{230.0}=0x1 +phy_chain_rx_polarity_flip_physical{231.0}=0x0 +phy_chain_rx_polarity_flip_physical{232.0}=0x1 +phy_chain_tx_polarity_flip_physical{229.0}=0x0 +phy_chain_tx_polarity_flip_physical{230.0}=0x1 +phy_chain_tx_polarity_flip_physical{231.0}=0x0 +phy_chain_tx_polarity_flip_physical{232.0}=0x0 +#Port29 +#FC59 +portmap_113=237:100 +phy_chain_rx_lane_map_physical{237.0}=0x0123 +phy_chain_tx_lane_map_physical{237.0}=0x3210 +phy_chain_rx_polarity_flip_physical{237.0}=0x1 +phy_chain_rx_polarity_flip_physical{238.0}=0x0 +phy_chain_rx_polarity_flip_physical{239.0}=0x1 +phy_chain_rx_polarity_flip_physical{240.0}=0x1 +phy_chain_tx_polarity_flip_physical{237.0}=0x1 +phy_chain_tx_polarity_flip_physical{238.0}=0x1 +phy_chain_tx_polarity_flip_physical{239.0}=0x0 +phy_chain_tx_polarity_flip_physical{240.0}=0x0 +#Port30 +#FC61 +portmap_115=245:100 +phy_chain_rx_lane_map_physical{245.0}=0x0213 +phy_chain_tx_lane_map_physical{245.0}=0x3210 +phy_chain_rx_polarity_flip_physical{245.0}=0x0 +phy_chain_rx_polarity_flip_physical{246.0}=0x0 +phy_chain_rx_polarity_flip_physical{247.0}=0x1 +phy_chain_rx_polarity_flip_physical{248.0}=0x1 +phy_chain_tx_polarity_flip_physical{245.0}=0x1 +phy_chain_tx_polarity_flip_physical{246.0}=0x0 +phy_chain_tx_polarity_flip_physical{247.0}=0x1 +phy_chain_tx_polarity_flip_physical{248.0}=0x0 +#Port31 +#FC63 +portmap_117=253:100 +phy_chain_rx_lane_map_physical{253.0}=0x0213 +phy_chain_tx_lane_map_physical{253.0}=0x0312 +phy_chain_rx_polarity_flip_physical{253.0}=0x0 +phy_chain_rx_polarity_flip_physical{254.0}=0x0 +phy_chain_rx_polarity_flip_physical{255.0}=0x0 +phy_chain_rx_polarity_flip_physical{256.0}=0x1 +phy_chain_tx_polarity_flip_physical{253.0}=0x0 +phy_chain_tx_polarity_flip_physical{254.0}=0x1 +phy_chain_tx_polarity_flip_physical{255.0}=0x0 +phy_chain_tx_polarity_flip_physical{256.0}=0x0 +#Port32 +#FC17 +portmap_35=69:100 +phy_chain_rx_lane_map_physical{69.0}=0x1032 +phy_chain_tx_lane_map_physical{69.0}=0x3102 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 +#Port33 +#FC19 +portmap_37=77:100 +phy_chain_rx_lane_map_physical{77.0}=0x1230 +phy_chain_tx_lane_map_physical{77.0}=0x3021 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +#Port34 +#FC23 +portmap_41=93:100 +phy_chain_rx_lane_map_physical{93.0}=0x1032 +phy_chain_tx_lane_map_physical{93.0}=0x0231 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 +#Port35 +#FC21 +portmap_39=85:100 +phy_chain_rx_lane_map_physical{85.0}=0x0312 +phy_chain_tx_lane_map_physical{85.0}=0x1230 +phy_chain_rx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x1 +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +#Port36 +#FC25 +portmap_43=101:100 +phy_chain_rx_lane_map_physical{101.0}=0x1302 +phy_chain_tx_lane_map_physical{101.0}=0x0213 +phy_chain_rx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_tx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x1 +#Port37 +#FC27 +portmap_45=109:100 +phy_chain_rx_lane_map_physical{109.0}=0x0213 +phy_chain_tx_lane_map_physical{109.0}=0x1032 +phy_chain_rx_polarity_flip_physical{109.0}=0x1 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{110.0}=0x1 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x1 +#Port38 +#FC31 +portmap_49=125:100 +phy_chain_rx_lane_map_physical{125.0}=0x2130 +phy_chain_tx_lane_map_physical{125.0}=0x1203 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x1 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 +#Port39 +#FC29 +portmap_47=117:100 +phy_chain_rx_lane_map_physical{117.0}=0x3102 +phy_chain_tx_lane_map_physical{117.0}=0x2310 +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x1 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +#Port40 +#FC9 +portmap_10=37:100 +phy_chain_rx_lane_map_physical{37.0}=0x3210 +phy_chain_tx_lane_map_physical{37.0}=0x1302 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x1 +#Port41 +#FC11 +portmap_12=45:100 +phy_chain_rx_lane_map_physical{45.0}=0x3210 +phy_chain_tx_lane_map_physical{45.0}=0x0123 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x0 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +#Port42 +#FC15 +portmap_16=61:100 +phy_chain_rx_lane_map_physical{61.0}=0x3210 +phy_chain_tx_lane_map_physical{61.0}=0x1230 +phy_chain_rx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +#Port43 +#FC13 +portmap_14=53:100 +phy_chain_rx_lane_map_physical{53.0}=0x3210 +phy_chain_tx_lane_map_physical{53.0}=0x3210 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 +phy_chain_tx_polarity_flip_physical{53.0}=0x1 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x0 +#Port44 +#FC33 +portmap_69=133:100 +phy_chain_rx_lane_map_physical{133.0}=0x0312 +phy_chain_tx_lane_map_physical{133.0}=0x2310 +phy_chain_rx_polarity_flip_physical{133.0}=0x0 +phy_chain_rx_polarity_flip_physical{134.0}=0x0 +phy_chain_rx_polarity_flip_physical{135.0}=0x1 +phy_chain_rx_polarity_flip_physical{136.0}=0x0 +phy_chain_tx_polarity_flip_physical{133.0}=0x0 +phy_chain_tx_polarity_flip_physical{134.0}=0x1 +phy_chain_tx_polarity_flip_physical{135.0}=0x0 +phy_chain_tx_polarity_flip_physical{136.0}=0x1 +#Port45 +#FC35 +portmap_71=141:100 +phy_chain_rx_lane_map_physical{141.0}=0x3012 +phy_chain_tx_lane_map_physical{141.0}=0x0123 +phy_chain_rx_polarity_flip_physical{141.0}=0x1 +phy_chain_rx_polarity_flip_physical{142.0}=0x0 +phy_chain_rx_polarity_flip_physical{143.0}=0x1 +phy_chain_rx_polarity_flip_physical{144.0}=0x0 +phy_chain_tx_polarity_flip_physical{141.0}=0x1 +phy_chain_tx_polarity_flip_physical{142.0}=0x1 +phy_chain_tx_polarity_flip_physical{143.0}=0x0 +phy_chain_tx_polarity_flip_physical{144.0}=0x0 +#Port46 +#FC39 +portmap_75=157:100 +phy_chain_rx_lane_map_physical{157.0}=0x2103 +phy_chain_tx_lane_map_physical{157.0}=0x0231 +phy_chain_rx_polarity_flip_physical{157.0}=0x0 +phy_chain_rx_polarity_flip_physical{158.0}=0x0 +phy_chain_rx_polarity_flip_physical{159.0}=0x1 +phy_chain_rx_polarity_flip_physical{160.0}=0x0 +phy_chain_tx_polarity_flip_physical{157.0}=0x0 +phy_chain_tx_polarity_flip_physical{158.0}=0x1 +phy_chain_tx_polarity_flip_physical{159.0}=0x0 +phy_chain_tx_polarity_flip_physical{160.0}=0x0 +#Port47 +#FC37 +portmap_73=149:100 +phy_chain_rx_lane_map_physical{149.0}=0x3120 +phy_chain_tx_lane_map_physical{149.0}=0x1023 +phy_chain_rx_polarity_flip_physical{149.0}=0x0 +phy_chain_rx_polarity_flip_physical{150.0}=0x1 +phy_chain_rx_polarity_flip_physical{151.0}=0x0 +phy_chain_rx_polarity_flip_physical{152.0}=0x0 +phy_chain_tx_polarity_flip_physical{149.0}=0x1 +phy_chain_tx_polarity_flip_physical{150.0}=0x0 +phy_chain_tx_polarity_flip_physical{151.0}=0x0 +phy_chain_tx_polarity_flip_physical{152.0}=0x1 +#Port48 +#FC40 +portmap_76=161:100 +phy_chain_rx_lane_map_physical{161.0}=0x3012 +phy_chain_tx_lane_map_physical{161.0}=0x1023 +phy_chain_rx_polarity_flip_physical{161.0}=0x1 +phy_chain_rx_polarity_flip_physical{162.0}=0x1 +phy_chain_rx_polarity_flip_physical{163.0}=0x0 +phy_chain_rx_polarity_flip_physical{164.0}=0x0 +phy_chain_tx_polarity_flip_physical{161.0}=0x0 +phy_chain_tx_polarity_flip_physical{162.0}=0x1 +phy_chain_tx_polarity_flip_physical{163.0}=0x0 +phy_chain_tx_polarity_flip_physical{164.0}=0x0 +#Port49 +#FC42 +portmap_78=169:100 +phy_chain_rx_lane_map_physical{169.0}=0x3210 +phy_chain_tx_lane_map_physical{169.0}=0x2031 +phy_chain_rx_polarity_flip_physical{169.0}=0x0 +phy_chain_rx_polarity_flip_physical{170.0}=0x1 +phy_chain_rx_polarity_flip_physical{171.0}=0x0 +phy_chain_rx_polarity_flip_physical{172.0}=0x0 +phy_chain_tx_polarity_flip_physical{169.0}=0x1 +phy_chain_tx_polarity_flip_physical{170.0}=0x0 +phy_chain_tx_polarity_flip_physical{171.0}=0x0 +phy_chain_tx_polarity_flip_physical{172.0}=0x0 +#Port50 +#FC46 +portmap_82=185:100 +phy_chain_rx_lane_map_physical{185.0}=0x2310 +phy_chain_tx_lane_map_physical{185.0}=0x3021 +phy_chain_rx_polarity_flip_physical{185.0}=0x1 +phy_chain_rx_polarity_flip_physical{186.0}=0x0 +phy_chain_rx_polarity_flip_physical{187.0}=0x1 +phy_chain_rx_polarity_flip_physical{188.0}=0x0 +phy_chain_tx_polarity_flip_physical{185.0}=0x0 +phy_chain_tx_polarity_flip_physical{186.0}=0x1 +phy_chain_tx_polarity_flip_physical{187.0}=0x0 +phy_chain_tx_polarity_flip_physical{188.0}=0x0 +#Port51 +#FC44 +portmap_80=177:100 +phy_chain_rx_lane_map_physical{177.0}=0x1032 +phy_chain_tx_lane_map_physical{177.0}=0x2301 +phy_chain_rx_polarity_flip_physical{177.0}=0x1 +phy_chain_rx_polarity_flip_physical{178.0}=0x1 +phy_chain_rx_polarity_flip_physical{179.0}=0x0 +phy_chain_rx_polarity_flip_physical{180.0}=0x1 +phy_chain_tx_polarity_flip_physical{177.0}=0x1 +phy_chain_tx_polarity_flip_physical{178.0}=0x1 +phy_chain_tx_polarity_flip_physical{179.0}=0x1 +phy_chain_tx_polarity_flip_physical{180.0}=0x0 +#Port52 +#FC6 +portmap_7=25:100 +phy_chain_rx_lane_map_physical{25.0}=0x3102 +phy_chain_tx_lane_map_physical{25.0}=0x0132 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x1 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 +#Port53 +#FC4 +portmap_5=17:100 +phy_chain_rx_lane_map_physical{17.0}=0x3120 +phy_chain_tx_lane_map_physical{17.0}=0x3021 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x0 +#Port54 +#FC0 +portmap_1=1:100 +phy_chain_rx_lane_map_physical{1.0}=0x2130 +phy_chain_tx_lane_map_physical{1.0}=0x1203 +phy_chain_rx_polarity_flip_physical{1.0}=0x1 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +#Port55 +#FC2 +portmap_3=9:100 +phy_chain_rx_lane_map_physical{9.0}=0x1203 +phy_chain_tx_lane_map_physical{9.0}=0x1230 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 +phy_chain_tx_polarity_flip_physical{9.0}=0x1 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 +#Port56 +#FC48 +portmap_102=193:100 +phy_chain_rx_lane_map_physical{193.0}=0x2103 +phy_chain_tx_lane_map_physical{193.0}=0x1230 +phy_chain_rx_polarity_flip_physical{193.0}=0x0 +phy_chain_rx_polarity_flip_physical{194.0}=0x1 +phy_chain_rx_polarity_flip_physical{195.0}=0x0 +phy_chain_rx_polarity_flip_physical{196.0}=0x1 +phy_chain_tx_polarity_flip_physical{193.0}=0x0 +phy_chain_tx_polarity_flip_physical{194.0}=0x0 +phy_chain_tx_polarity_flip_physical{195.0}=0x1 +phy_chain_tx_polarity_flip_physical{196.0}=0x0 +#Port57 +#FC50 +portmap_104=201:100 +phy_chain_rx_lane_map_physical{201.0}=0x0321 +phy_chain_tx_lane_map_physical{201.0}=0x3021 +phy_chain_rx_polarity_flip_physical{201.0}=0x0 +phy_chain_rx_polarity_flip_physical{202.0}=0x0 +phy_chain_rx_polarity_flip_physical{203.0}=0x1 +phy_chain_rx_polarity_flip_physical{204.0}=0x0 +phy_chain_tx_polarity_flip_physical{201.0}=0x1 +phy_chain_tx_polarity_flip_physical{202.0}=0x1 +phy_chain_tx_polarity_flip_physical{203.0}=0x0 +phy_chain_tx_polarity_flip_physical{204.0}=0x1 +#Port58 +#FC54 +portmap_108=217:100 +phy_chain_rx_lane_map_physical{217.0}=0x1203 +phy_chain_tx_lane_map_physical{217.0}=0x2031 +phy_chain_rx_polarity_flip_physical{217.0}=0x1 +phy_chain_rx_polarity_flip_physical{218.0}=0x0 +phy_chain_rx_polarity_flip_physical{219.0}=0x1 +phy_chain_rx_polarity_flip_physical{220.0}=0x1 +phy_chain_tx_polarity_flip_physical{217.0}=0x1 +phy_chain_tx_polarity_flip_physical{218.0}=0x0 +phy_chain_tx_polarity_flip_physical{219.0}=0x1 +phy_chain_tx_polarity_flip_physical{220.0}=0x0 +#Port59 +#FC52 +portmap_106=209:100 +phy_chain_rx_lane_map_physical{209.0}=0x0321 +phy_chain_tx_lane_map_physical{209.0}=0x3102 +phy_chain_rx_polarity_flip_physical{209.0}=0x0 +phy_chain_rx_polarity_flip_physical{210.0}=0x0 +phy_chain_rx_polarity_flip_physical{211.0}=0x1 +phy_chain_rx_polarity_flip_physical{212.0}=0x0 +phy_chain_tx_polarity_flip_physical{209.0}=0x0 +phy_chain_tx_polarity_flip_physical{210.0}=0x0 +phy_chain_tx_polarity_flip_physical{211.0}=0x1 +phy_chain_tx_polarity_flip_physical{212.0}=0x0 +#Port60 +#FC56 +portmap_110=225:100 +phy_chain_rx_lane_map_physical{225.0}=0x2103 +phy_chain_tx_lane_map_physical{225.0}=0x2031 +phy_chain_rx_polarity_flip_physical{225.0}=0x0 +phy_chain_rx_polarity_flip_physical{226.0}=0x0 +phy_chain_rx_polarity_flip_physical{227.0}=0x1 +phy_chain_rx_polarity_flip_physical{228.0}=0x1 +phy_chain_tx_polarity_flip_physical{225.0}=0x1 +phy_chain_tx_polarity_flip_physical{226.0}=0x0 +phy_chain_tx_polarity_flip_physical{227.0}=0x1 +phy_chain_tx_polarity_flip_physical{228.0}=0x1 +#Port61 +#FC58 +portmap_112=233:100 +phy_chain_rx_lane_map_physical{233.0}=0x2130 +phy_chain_tx_lane_map_physical{233.0}=0x0312 +phy_chain_rx_polarity_flip_physical{233.0}=0x0 +phy_chain_rx_polarity_flip_physical{234.0}=0x1 +phy_chain_rx_polarity_flip_physical{235.0}=0x1 +phy_chain_rx_polarity_flip_physical{236.0}=0x0 +phy_chain_tx_polarity_flip_physical{233.0}=0x0 +phy_chain_tx_polarity_flip_physical{234.0}=0x0 +phy_chain_tx_polarity_flip_physical{235.0}=0x1 +phy_chain_tx_polarity_flip_physical{236.0}=0x0 +#Port62 +#FC62 +portmap_116=249:100 +phy_chain_rx_lane_map_physical{249.0}=0x1302 +phy_chain_tx_lane_map_physical{249.0}=0x1302 +phy_chain_rx_polarity_flip_physical{249.0}=0x0 +phy_chain_rx_polarity_flip_physical{250.0}=0x1 +phy_chain_rx_polarity_flip_physical{251.0}=0x0 +phy_chain_rx_polarity_flip_physical{252.0}=0x1 +phy_chain_tx_polarity_flip_physical{249.0}=0x1 +phy_chain_tx_polarity_flip_physical{250.0}=0x1 +phy_chain_tx_polarity_flip_physical{251.0}=0x1 +phy_chain_tx_polarity_flip_physical{252.0}=0x1 +#Port63 +#FC60 +portmap_114=241:100 +phy_chain_rx_lane_map_physical{241.0}=0x3012 +phy_chain_tx_lane_map_physical{241.0}=0x2301 +phy_chain_rx_polarity_flip_physical{241.0}=0x1 +phy_chain_rx_polarity_flip_physical{242.0}=0x1 +phy_chain_rx_polarity_flip_physical{243.0}=0x0 +phy_chain_rx_polarity_flip_physical{244.0}=0x1 +phy_chain_tx_polarity_flip_physical{241.0}=0x1 +phy_chain_tx_polarity_flip_physical{242.0}=0x0 +phy_chain_tx_polarity_flip_physical{243.0}=0x1 +phy_chain_tx_polarity_flip_physical{244.0}=0x0 diff --git a/device/juniper/x86_64-juniper_qfx5210-r0/default_sku b/device/juniper/x86_64-juniper_qfx5210-r0/default_sku new file mode 100644 index 00000000000..869e1625da4 --- /dev/null +++ b/device/juniper/x86_64-juniper_qfx5210-r0/default_sku @@ -0,0 +1 @@ +Juniper-QFX5210-64C t1 diff --git a/device/juniper/x86_64-juniper_qfx5210-r0/installer.conf b/device/juniper/x86_64-juniper_qfx5210-r0/installer.conf new file mode 100644 index 00000000000..5c03f5844ba --- /dev/null +++ b/device/juniper/x86_64-juniper_qfx5210-r0/installer.conf @@ -0,0 +1,2 @@ +CONSOLE_SPEED=9600 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tg3.short_preamble=1 tg3.bcm5718s_reset=1" diff --git a/device/juniper/x86_64-juniper_qfx5210-r0/led_proc_init.soc b/device/juniper/x86_64-juniper_qfx5210-r0/led_proc_init.soc new file mode 100755 index 00000000000..75a36c6f9c6 --- /dev/null +++ b/device/juniper/x86_64-juniper_qfx5210-r0/led_proc_init.soc @@ -0,0 +1,155 @@ +m CMIC_LEDUP0_CLK_PARAMS REFRESH_CYCLE_PERIOD=0xc00000 +m CMIC_LEDUP1_CLK_PARAMS REFRESH_CYCLE_PERIOD=0xc00000 +m CMIC_LEDUP2_CLK_PARAMS REFRESH_CYCLE_PERIOD=0xc00000 +m CMIC_LEDUP3_CLK_PARAMS REFRESH_CYCLE_PERIOD=0xc00000 + +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=63 REMAP_PORT_1=62 REMAP_PORT_2=61 REMAP_PORT_3=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=59 REMAP_PORT_5=58 REMAP_PORT_6=57 REMAP_PORT_7=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=55 REMAP_PORT_9=54 REMAP_PORT_10=53 REMAP_PORT_11=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=51 REMAP_PORT_13=50 REMAP_PORT_14=49 REMAP_PORT_15=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=47 REMAP_PORT_17=46 REMAP_PORT_18=45 REMAP_PORT_19=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=43 REMAP_PORT_21=42 REMAP_PORT_22=41 REMAP_PORT_23=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=39 REMAP_PORT_25=38 REMAP_PORT_26=37 REMAP_PORT_27=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=35 REMAP_PORT_29=34 REMAP_PORT_30=33 REMAP_PORT_31=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=31 REMAP_PORT_33=30 REMAP_PORT_34=29 REMAP_PORT_35=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=27 REMAP_PORT_37=26 REMAP_PORT_38=25 REMAP_PORT_39=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=23 REMAP_PORT_41=22 REMAP_PORT_42=21 REMAP_PORT_43=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=19 REMAP_PORT_45=18 REMAP_PORT_46=17 REMAP_PORT_47=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 REMAP_PORT_49=14 REMAP_PORT_50=13 REMAP_PORT_51=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 REMAP_PORT_53=10 REMAP_PORT_54=9 REMAP_PORT_55=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 + +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=3 REMAP_PORT_1=2 REMAP_PORT_2=1 REMAP_PORT_3=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=7 REMAP_PORT_5=6 REMAP_PORT_6=5 REMAP_PORT_7=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=11 REMAP_PORT_9=10 REMAP_PORT_10=9 REMAP_PORT_11=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=15 REMAP_PORT_13=14 REMAP_PORT_14=13 REMAP_PORT_15=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=19 REMAP_PORT_17=18 REMAP_PORT_18=17 REMAP_PORT_19=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=23 REMAP_PORT_21=22 REMAP_PORT_22=21 REMAP_PORT_23=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=27 REMAP_PORT_25=26 REMAP_PORT_26=25 REMAP_PORT_27=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=31 REMAP_PORT_29=30 REMAP_PORT_30=29 REMAP_PORT_31=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=35 REMAP_PORT_33=34 REMAP_PORT_34=33 REMAP_PORT_35=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=39 REMAP_PORT_37=38 REMAP_PORT_38=37 REMAP_PORT_39=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=43 REMAP_PORT_41=42 REMAP_PORT_42=41 REMAP_PORT_43=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=47 REMAP_PORT_45=46 REMAP_PORT_46=45 REMAP_PORT_47=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 REMAP_PORT_49=50 REMAP_PORT_50=49 REMAP_PORT_51=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 REMAP_PORT_53=54 REMAP_PORT_54=53 REMAP_PORT_55=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 REMAP_PORT_57=58 REMAP_PORT_58=57 REMAP_PORT_59=56 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=62 REMAP_PORT_62=61 REMAP_PORT_63=60 + +m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=63 REMAP_PORT_1=62 REMAP_PORT_2=61 REMAP_PORT_3=60 +m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=59 REMAP_PORT_5=58 REMAP_PORT_6=57 REMAP_PORT_7=56 +m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=55 REMAP_PORT_9=54 REMAP_PORT_10=53 REMAP_PORT_11=52 +m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=51 REMAP_PORT_13=50 REMAP_PORT_14=49 REMAP_PORT_15=48 +m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=47 REMAP_PORT_17=46 REMAP_PORT_18=45 REMAP_PORT_19=44 +m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=43 REMAP_PORT_21=42 REMAP_PORT_22=41 REMAP_PORT_23=40 +m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=39 REMAP_PORT_25=38 REMAP_PORT_26=37 REMAP_PORT_27=36 +m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=35 REMAP_PORT_29=34 REMAP_PORT_30=33 REMAP_PORT_31=32 +m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=31 REMAP_PORT_33=30 REMAP_PORT_34=29 REMAP_PORT_35=28 +m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=27 REMAP_PORT_37=26 REMAP_PORT_38=25 REMAP_PORT_39=24 +m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=23 REMAP_PORT_41=22 REMAP_PORT_42=21 REMAP_PORT_43=20 +m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=19 REMAP_PORT_45=18 REMAP_PORT_46=17 REMAP_PORT_47=16 +m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 REMAP_PORT_49=14 REMAP_PORT_50=13 REMAP_PORT_51=12 +m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 REMAP_PORT_53=10 REMAP_PORT_54=9 REMAP_PORT_55=8 +m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 + +m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=3 REMAP_PORT_1=2 REMAP_PORT_2=1 REMAP_PORT_3=0 +m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=7 REMAP_PORT_5=6 REMAP_PORT_6=5 REMAP_PORT_7=4 +m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=11 REMAP_PORT_9=10 REMAP_PORT_10=9 REMAP_PORT_11=8 +m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=15 REMAP_PORT_13=14 REMAP_PORT_14=13 REMAP_PORT_15=12 +m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=19 REMAP_PORT_17=18 REMAP_PORT_18=17 REMAP_PORT_19=16 +m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=23 REMAP_PORT_21=22 REMAP_PORT_22=21 REMAP_PORT_23=20 +m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=27 REMAP_PORT_25=26 REMAP_PORT_26=25 REMAP_PORT_27=24 +m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=31 REMAP_PORT_29=30 REMAP_PORT_30=29 REMAP_PORT_31=28 +m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=35 REMAP_PORT_33=34 REMAP_PORT_34=33 REMAP_PORT_35=32 +m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=39 REMAP_PORT_37=38 REMAP_PORT_38=37 REMAP_PORT_39=36 +m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=43 REMAP_PORT_41=42 REMAP_PORT_42=41 REMAP_PORT_43=40 +m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=47 REMAP_PORT_45=46 REMAP_PORT_46=45 REMAP_PORT_47=44 +m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 REMAP_PORT_49=50 REMAP_PORT_50=49 REMAP_PORT_51=48 +m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 REMAP_PORT_53=54 REMAP_PORT_54=53 REMAP_PORT_55=52 +m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 REMAP_PORT_57=58 REMAP_PORT_58=57 REMAP_PORT_59=56 +m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=62 REMAP_PORT_62=61 REMAP_PORT_63=60 + +led 0 stop +led 0 prog \ + 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 42 E0 \ + 02 FB 42 40 06 F9 D2 00 74 1E 02 F9 42 03 67 AC \ + 67 C3 67 52 86 FE 67 C3 67 52 86 FE 67 C3 67 52 \ + 86 FE 67 C3 67 52 86 FE 06 FB D6 FE 74 1E 86 FC \ + 3E FA 06 FE 88 4A 03 71 4C 67 84 57 67 84 57 67 \ + 98 57 06 FE 88 80 4A 00 27 97 75 4F 90 4A 00 27 \ + 4A 01 27 B7 97 71 69 77 42 06 F9 D6 FC 74 7C 02 \ + F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 \ + 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF \ + 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 \ + 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC \ + 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 \ + 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 \ + 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 98 67 \ + 84 57 80 18 71 EB 67 84 67 98 57 67 84 67 84 57 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + + +led 1 stop +led 1 prog \ + 02 FD 42 80 02 FF 42 00 02 FE 42 00 02 FA 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97 71 69 77 42 06 F9 D6 FC 74 7C 02 \ + F9 4A 07 37 4E 07 02 FC 42 00 4E 07 06 F9 0A 07 \ + 71 4F 77 42 16 FF 06 FD 17 4D DA 07 74 95 12 FF \ + 52 00 86 FD 57 86 FF 57 16 FF 06 FD 07 4D DA 07 \ + 74 A9 12 FF 52 00 86 FD 57 86 FF 57 06 FE C2 FC \ + 98 98 12 F4 50 C2 FC 98 98 F2 F0 14 06 F4 C2 03 \ + 88 77 D1 06 FE C2 FC 98 98 F2 E0 14 06 FE C2 03 \ + 88 18 71 E2 80 18 71 DD 67 98 67 98 57 67 98 67 \ + 84 57 80 18 71 EB 67 84 67 98 57 67 84 67 84 57 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +led auto on +led 0 start +led 1 start +led 2 start +led 3 start diff --git a/device/juniper/x86_64-juniper_qfx5210-r0/media_settings.json b/device/juniper/x86_64-juniper_qfx5210-r0/media_settings.json new file mode 100644 index 00000000000..22788f3a6f2 --- /dev/null +++ b/device/juniper/x86_64-juniper_qfx5210-r0/media_settings.json @@ -0,0 +1,19848 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + }, + "PORT_MEDIA_SETTINGS": { + "0": { + "Default": { + "preemphasis": { + "lane0":"0x14410a", + "lane1":"0x14410a", + "lane2":"0x14410a", + "lane3":"0x14410a" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-AVAGO-AFBR-89CDDZ-JU1": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-1F3-1F3QAA": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TF-FC030-NJC": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TF-FC020-NJC": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TF-FC010-NJC": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TF-FC001-NJC": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TF-FC003-NJC": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TR-FC13R-NJ3": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TR-FC13T-NJ3": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FTLC9551REPM-J1": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FTLC1151RDPL-J1": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C01-J1": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C03-J1": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C10-J1": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C20-J1": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C30-J1": { + "preemphasis": { + "lane0":"0x1c4503", + "lane1":"0x1c4503", + "lane2":"0x1c4503", + "lane3":"0x1c4503" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "AVAGO-AFBR-79EQDZ-JU1": { + "preemphasis": { + "lane0":"0xd3a02", + "lane1":"0x103f02", + "lane2":"0xd3a02", + "lane3":"0xd3a02" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "FINISAR CORP-FTL410QE3C-J1": { + "preemphasis": { + "lane0":"0xd3a02", + "lane1":"0x103f02", + "lane2":"0xd3a02", + "lane3":"0xd3a02" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FTL410QE3C-J1": { + "preemphasis": { + "lane0":"0xd3a02", + "lane1":"0x103f02", + "lane2":"0xd3a02", + "lane3":"0xd3a02" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TR-IQ13L-NJ3": { + "preemphasis": { + "lane0":"0xd3a02", + "lane1":"0x103f02", + "lane2":"0xd3a02", + "lane3":"0xd3a02" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TR-IQ13L-NJ5": { + "preemphasis": { + "lane0":"0xd3a02", + "lane1":"0x103f02", + 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"lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TF-FC003-NJC": { + "preemphasis": { + "lane0":"0x1c4404", + "lane1":"0x1c4404", + "lane2":"0x1b4504", + "lane3":"0x1c4404" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TR-FC13R-NJ3": { + "preemphasis": { + "lane0":"0x1c4404", + "lane1":"0x1c4404", + "lane2":"0x1b4504", + "lane3":"0x1c4404" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TR-FC13T-NJ3": { + "preemphasis": { + "lane0":"0x1c4404", + "lane1":"0x1c4404", + "lane2":"0x1b4504", + "lane3":"0x1c4404" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FTLC9551REPM-J1": { + "preemphasis": { + "lane0":"0x1c4404", + "lane1":"0x1c4404", + "lane2":"0x1b4504", + "lane3":"0x1c4404" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FTLC1151RDPL-J1": { + "preemphasis": { + "lane0":"0x1c4404", + "lane1":"0x1c4404", + "lane2":"0x1b4504", + "lane3":"0x1c4404" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C01-J1": { + "preemphasis": { + "lane0":"0x1c4404", + "lane1":"0x1c4404", + "lane2":"0x1b4504", + "lane3":"0x1c4404" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C03-J1": { + "preemphasis": { + "lane0":"0x1c4404", + "lane1":"0x1c4404", + "lane2":"0x1b4504", + "lane3":"0x1c4404" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C10-J1": { + "preemphasis": { + "lane0":"0x1c4404", + "lane1":"0x1c4404", + "lane2":"0x1b4504", + "lane3":"0x1c4404" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C20-J1": { + "preemphasis": { + "lane0":"0x1c4404", + "lane1":"0x1c4404", + "lane2":"0x1b4504", + "lane3":"0x1c4404" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C30-J1": { + "preemphasis": { + "lane0":"0x1c4404", + "lane1":"0x1c4404", + "lane2":"0x1b4504", + "lane3":"0x1c4404" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "AVAGO-AFBR-79EQDZ-JU1": { + "preemphasis": { + "lane0":"0xd3a03", + "lane1":"0xd3a03", + "lane2":"0xd3a03", + "lane3":"0xd3a03" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "FINISAR CORP-FTL410QE3C-J1": { + "preemphasis": { + "lane0":"0xd3a03", + "lane1":"0xd3a03", + "lane2":"0xd3a03", + "lane3":"0xd3a03" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FTL410QE3C-J1": { + "preemphasis": { + "lane0":"0xd3a03", + "lane1":"0xd3a03", + "lane2":"0xd3a03", + "lane3":"0xd3a03" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TR-IQ13L-NJ3": { + "preemphasis": { + "lane0":"0xd3a03", + "lane1":"0xd3a03", + "lane2":"0xd3a03", + "lane3":"0xd3a03" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TR-IQ13L-NJ5": { + "preemphasis": { + "lane0":"0xd3a03", + "lane1":"0xd3a03", + "lane2":"0xd3a03", + "lane3":"0xd3a03" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + } + }, + "63": { + "Default": { + "preemphasis": { + "lane0":"0x14410a", + "lane1":"0x14410a", + "lane2":"0x14410a", + "lane3":"0x14410a" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-AVAGO-AFBR-89CDDZ-JU1": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-1F3-1F3QAA": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TF-FC030-NJC": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TF-FC020-NJC": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TF-FC010-NJC": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TF-FC001-NJC": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TF-FC003-NJC": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TR-FC13R-NJ3": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TR-FC13T-NJ3": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FTLC9551REPM-J1": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FTLC1151RDPL-J1": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C01-J1": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C03-J1": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C10-J1": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C20-J1": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FCBN425QE1C30-J1": { + "preemphasis": { + "lane0":"0x1b4504", + "lane1":"0x1b4504", + "lane2":"0x1a4703", + "lane3":"0x1b4504" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "AVAGO-AFBR-79EQDZ-JU1": { + "preemphasis": { + "lane0":"0xd3a02", + "lane1":"0xd3a02", + "lane2":"0xd3a03", + "lane3":"0xd3a02" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "FINISAR CORP-FTL410QE3C-J1": { + "preemphasis": { + "lane0":"0xd3a02", + "lane1":"0xd3a02", + "lane2":"0xd3a03", + "lane3":"0xd3a02" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-FINISAR-FTL410QE3C-J1": { + "preemphasis": { + "lane0":"0xd3a02", + "lane1":"0xd3a02", + "lane2":"0xd3a03", + "lane3":"0xd3a02" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TR-IQ13L-NJ3": { + "preemphasis": { + "lane0":"0xd3a02", + "lane1":"0xd3a02", + "lane2":"0xd3a03", + "lane3":"0xd3a02" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + }, + "JUNIPER-INNO-TR-IQ13L-NJ5": { + "preemphasis": { + "lane0":"0xd3a02", + "lane1":"0xd3a02", + "lane2":"0xd3a03", + "lane3":"0xd3a02" + }, + "idriver": { + "lane0":"0x8", + "lane1":"0x8", + "lane2":"0x8", + "lane3":"0x8" + } + } + } + } +} + diff --git a/device/juniper/x86_64-juniper_qfx5210-r0/plugins/eeprom.py b/device/juniper/x86_64-juniper_qfx5210-r0/plugins/eeprom.py new file mode 100644 index 00000000000..a5453dc4f0a --- /dev/null +++ b/device/juniper/x86_64-juniper_qfx5210-r0/plugins/eeprom.py @@ -0,0 +1,40 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess + import syslog + from struct import * + from array import * + +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +SYSLOG_IDENTIFIER = "eeprom.py" +EEPROM_PATH = "/sys/bus/i2c/devices/0-0056/eeprom" + +def log_error(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_ERR, msg) + syslog.closelog() + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + + def __init__(self, name, path, cpld_root, ro): + + if not os.path.exists(EEPROM_PATH): + log_error("Cannot find system eeprom") + raise RuntimeError("No syseeprom found") + + self.eeprom_path = EEPROM_PATH + super(board, self).__init__(self.eeprom_path, 0, '', True) + diff --git a/device/juniper/x86_64-juniper_qfx5210-r0/plugins/psuutil.py b/device/juniper/x86_64-juniper_qfx5210-r0/plugins/psuutil.py new file mode 100755 index 00000000000..707c7c897c8 --- /dev/null +++ b/device/juniper/x86_64-juniper_qfx5210-r0/plugins/psuutil.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +############################################################################# +# Accton +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/bus/i2c/devices/" + self.psu_presence = "/psu_present" + self.psu_oper_status = "/psu_power_good" + self.psu_mapping = { + 1: "10-0053", + 2: "9-0050", + } + + def get_num_psus(self): + return len(self.psu_mapping) + + def get_psu_status(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + if index is None: + return False + + status = 0 + node = self.psu_path + self.psu_mapping[index] + self.psu_presence + try: + with open(node, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/juniper/x86_64-juniper_qfx5210-r0/plugins/sfputil.py b/device/juniper/x86_64-juniper_qfx5210-r0/plugins/sfputil.py new file mode 100644 index 00000000000..59b1dfdb587 --- /dev/null +++ b/device/juniper/x86_64-juniper_qfx5210-r0/plugins/sfputil.py @@ -0,0 +1,696 @@ +#!/usr/bin/env python + +try: + import time + from sonic_sfp.sfputilbase import * + import sys + import os + import string + from ctypes import create_string_buffer + # sys.path.append('/usr/local/bin') + # import sfp_detect +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +qfx5210_qsfp_cable_length_tup = ('Length(km)', 'Length OM3(2m)', + 'Length OM2(m)', 'Length OM1(m)', + 'Length Cable Assembly(m)') + +qfx5210_sfp_cable_length_tup = ('LengthSMFkm-UnitsOfKm', 'LengthSMF(UnitsOf100m)', + 'Length50um(UnitsOf10m)', 'Length62.5um(UnitsOfm)', + 'LengthCable(UnitsOfm)', 'LengthOM3(UnitsOf10m)') + +qfx5210_sfp_compliance_code_tup = ('10GEthernetComplianceCode', 'InfinibandComplianceCode', + 'ESCONComplianceCodes', 'SONETComplianceCodes', + 'EthernetComplianceCodes','FibreChannelLinkLength', + 'FibreChannelTechnology', 'SFP+CableTechnology', + 'FibreChannelTransmissionMedia','FibreChannelSpeed') + +qfx5210_qsfp_compliance_code_tup = ('10/40G Ethernet Compliance Code', 'SONET Compliance codes', + 'SAS/SATA compliance codes', 'Gigabit Ethernet Compliant codes', + 'Fibre Channel link length/Transmitter Technology', + 'Fibre Channel transmission media', 'Fibre Channel Speed') + + + +class SfpUtil(SfpUtilBase): + """Platform specific SfpUtill class""" + + _port_start = 0 + _port_end = 63 + ports_in_block = 64 + cmd = '/var/run/sfppresence' + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 60 : 25, + 61 : 26, + 62 : 27, + 63 : 28, + 54 : 29, + 55 : 30, + 52 : 31, + 53 : 32, + 8 : 33, + 9 : 34, + 10 : 35, + 11 : 36, + 0 : 37, + 1 : 38, + 2 : 39, + 3 : 40, + 5 : 41, + 4 : 42, + 7 : 43, + 6 : 44, + 12 : 45, + 13 : 46, + 14 : 47, + 15 : 48, + 16 : 49, + 17 : 50, + 18 : 51, + 19 : 52, + 24 : 53, + 25 : 54, + 26 : 55, + 27 : 56, + 28 : 57, + 29 : 58, + 30 : 59, + 31 : 60, + 20 : 61, + 21 : 62, + 22 : 63, + 23 : 64, + 40 : 65, + 41 : 66, + 42 : 67, + 43 : 68, + 32 : 69, + 33 : 70, + 34 : 71, + 35 : 72, + 44 : 73, + 45 : 74, + 46 : 75, + 47 : 76, + 36 : 77, + 37 : 78, + 38 : 79, + 39 : 80, + 56 : 81, + 57 : 82, + 58 : 83, + 59 : 84, + 48 : 85, + 49 : 86, + 50 : 87, + 51 : 88,} + + # sys.path.append('/usr/local/bin') + _qsfp_ports = range(0, ports_in_block + 1) + + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(self._port_start, self._port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self._port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + path = "/sys/bus/i2c/devices/19-0060/module_reset_{0}" + port_ps = path.format(port_num+1) + + try: + reg_file = open(port_ps, 'w') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #HW will clear reset after set. + reg_file.seek(0) + reg_file.write('1') + reg_file.close() + return True + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + path = "/sys/bus/i2c/devices/19-0060/module_present_{0}" + port_ps = path.format(port_num + 1) + + try: + reg_file = open(port_ps) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if reg_value == '1': + return True + + return False + + @property + def port_start(self): + return self._port_start + + @property + def port_end(self): + return self._port_end + + @property + def qsfp_ports(self): + return range(0, self.ports_in_block + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + # Writing to a file from a list + def write_to_file(self, file_name, from_list): + try: + fp1 = open(file_name, 'w') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + for i in from_list: + fp1.write(i) + fp1.write('\n') + + fp1.close() + return True + + + # Reading from a file to a list + def read_from_file(self, file_name): + try: + fp = open(file_name, 'r') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + to_list = fp.readlines() + to_list = [x.rstrip() for x in to_list] + fp.close() + return to_list + + def sfp_detect(self): + x = 0 + ret_dict = {} + defl_dict = {} + current_sfp_values = [0] * 64 + previous_sfp_values = [0] * 64 + + path = "/sys/bus/i2c/devices/19-0060/module_present_{0}" + + if not os.path.isfile(self.cmd): + pass + else: + if (self.read_from_file(self.cmd) == False): + return False, defl_dict + else: + previous_sfp_values = self.read_from_file(self.cmd) + + # Read the current values from sysfs + for x in range(self._port_start , self._port_end + 1): + try: + new_path = path.format(x + 1) + reg_file = open(new_path, 'r') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False, defl_dict + + sfp_present = reg_file.readline().rstrip() + reg_file.close() + current_sfp_values[x] = sfp_present + if (current_sfp_values[x] != previous_sfp_values[x]): + ret_dict.update({x:current_sfp_values[x]}) + + if(self.write_to_file(self.cmd, current_sfp_values) == True): + return True, ret_dict + else: + return False, defl_dict + + def get_transceiver_change_event(self, timeout=2000): + time.sleep(3) + return self.sfp_detect() + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False + + eeprom = open(self.port_to_eeprom_mapping[port_num], "rb") + eeprom.seek(93) + lpmode = ord(eeprom.read(1)) + + if ((lpmode & 0x3) == 0x3): + return True # Low Power Mode if "Power override" bit is 1 and "Power set" bit is 1 + else: + return False # High Power Mode if one of the following conditions is matched: + # 1. "Power override" bit is 0 + # 2. "Power override" bit is 1 and "Power set" bit is 0 + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + try: + eeprom = None + + if not self.get_presence(port_num): + return False # Port is not present, unable to set the eeprom + + # Fill in write buffer + regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode + buffer = create_string_buffer(1) + buffer[0] = chr(regval) + + # Write to eeprom + eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b") + eeprom.seek(93) + eeprom.write(buffer[0]) + return True + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if eeprom is not None: + eeprom.close() + time.sleep(0.01) + + # Read out SFP type, vendor name, PN, REV, SN from eeprom. + def get_transceiver_info_dict(self, port_num): + transceiver_info_dict = {} + compliance_code_dict = {} + + # ToDo: OSFP tranceiver info parsing not fully supported. + # in inf8628.py lack of some memory map definition + # will be implemented when the inf8628 memory map ready + if port_num in self.osfp_ports: + offset = 0 + vendor_rev_width = XCVR_HW_REV_WIDTH_OSFP + + sfpi_obj = inf8628InterfaceId() + if sfpi_obj is None: + print("Error: sfp_object open failed") + return None + + file_path = self._get_port_eeprom_path(port_num, self.IDENTITY_EEPROM_ADDR) + if not self._sfp_eeprom_present(file_path, 0): + print("Error, file not exist %s" % file_path) + return None + + try: + sysfsfile_eeprom = open(file_path, mode="rb", buffering=0) + except IOError: + print("Error: reading sysfs file %s" % file_path) + return None + + sfp_type_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + OSFP_TYPE_OFFSET), XCVR_TYPE_WIDTH) + if sfp_type_raw is not None: + sfp_type_data = sfpi_obj.parse_sfp_type(sfp_type_raw, 0) + else: + return None + + sfp_vendor_name_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + OSFP_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + if sfp_vendor_name_raw is not None: + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) + else: + return None + + sfp_vendor_pn_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + OSFP_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + if sfp_vendor_pn_raw is not None: + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) + else: + return None + + sfp_vendor_rev_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + OSFP_HW_REV_OFFSET), vendor_rev_width) + if sfp_vendor_rev_raw is not None: + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) + else: + return None + + sfp_vendor_sn_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + OSFP_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + if sfp_vendor_sn_raw is not None: + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) + else: + return None + + try: + sysfsfile_eeprom.close() + except IOError: + print("Error: closing sysfs file %s" % file_path) + return None + + transceiver_info_dict['type'] = sfp_type_data['data']['type']['value'] + transceiver_info_dict['type_abbrv_name'] = sfp_type_data['data']['type_abbrv_name']['value'] + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] + # Below part is added to avoid fail the xcvrd, shall be implemented later + transceiver_info_dict['vendor_oui'] = 'N/A' + transceiver_info_dict['vendor_date'] = 'N/A' + transceiver_info_dict['Connector'] = 'N/A' + transceiver_info_dict['encoding'] = 'N/A' + transceiver_info_dict['ext_identifier'] = 'N/A' + transceiver_info_dict['ext_rateselect_compliance'] = 'N/A' + transceiver_info_dict['cable_type'] = 'N/A' + transceiver_info_dict['cable_length'] = 'N/A' + transceiver_info_dict['specification_compliance'] = 'N/A' + transceiver_info_dict['nominal_bit_rate'] = 'N/A' + + else: + if port_num in self.qsfp_ports: + offset = 128 + vendor_rev_width = XCVR_HW_REV_WIDTH_QSFP + cable_length_width = XCVR_CABLE_LENGTH_WIDTH_QSFP + interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_QSFP + sfp_type = 'QSFP' + + sfpi_obj = sff8436InterfaceId() + if sfpi_obj is None: + print("Error: sfp_object open failed") + return None + + else: + offset = 0 + vendor_rev_width = XCVR_HW_REV_WIDTH_SFP + cable_length_width = XCVR_CABLE_LENGTH_WIDTH_SFP + interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_SFP + sfp_type = 'SFP' + + sfpi_obj = sff8472InterfaceId() + if sfpi_obj is None: + print("Error: sfp_object open failed") + return None + + file_path = self._get_port_eeprom_path(port_num, self.IDENTITY_EEPROM_ADDR) + if not self._sfp_eeprom_present(file_path, 0): + print("Error, file not exist %s" % file_path) + return None + + try: + sysfsfile_eeprom = open(file_path, mode="rb", buffering=0) + except IOError: + print("Error: reading sysfs file %s" % file_path) + return None + + sfp_interface_bulk_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + XCVR_INTFACE_BULK_OFFSET), interface_info_bulk_width) + if sfp_interface_bulk_raw is not None: + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw, 0) + else: + return None + + sfp_vendor_name_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + if sfp_vendor_name_raw is not None: + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) + else: + return None + + sfp_vendor_pn_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + if sfp_vendor_pn_raw is not None: + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) + else: + return None + + sfp_vendor_rev_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + XCVR_HW_REV_OFFSET), vendor_rev_width) + if sfp_vendor_rev_raw is not None: + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) + else: + return None + + sfp_vendor_sn_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + if sfp_vendor_sn_raw is not None: + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) + else: + return None + + sfp_vendor_oui_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) + if sfp_vendor_oui_raw is not None: + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_vendor_oui_raw, 0) + else: + return None + + sfp_vendor_date_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) + if sfp_vendor_date_raw is not None: + sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_vendor_date_raw, 0) + else: + return None + + try: + sysfsfile_eeprom.close() + except IOError: + print("Error: closing sysfs file %s" % file_path) + return None + + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['type_abbrv_name'] = sfp_interface_bulk_data['data']['type_abbrv_name']['value'] + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + if sfp_type == 'QSFP': + for key in qfx5210_qsfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + break + else: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = 'N/A' + + for key in qfx5210_qsfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + if sfp_interface_bulk_data['data'].has_key('Nominal Bit Rate(100Mbs)'): + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value']) + else: + transceiver_info_dict['nominal_bit_rate'] = 'N/A' + else: + for key in qfx5210_sfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + else: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = 'N/A' + + for key in qfx5210_sfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + if sfp_interface_bulk_data['data'].has_key('NominalSignallingRate(UnitsOf100Mbd)'): + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['NominalSignallingRate(UnitsOf100Mbd)']['value']) + else: + transceiver_info_dict['nominal_bit_rate'] = 'N/A' + #transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['NominalSignallingRate(UnitsOf100Mbd)']['value']) + + return transceiver_info_dict + + def get_transceiver_dom_info_dict(self, port_num): + transceiver_dom_info_dict = {} + + if port_num in self.osfp_ports: + # Below part is added to avoid fail xcvrd, shall be implemented later + transceiver_dom_info_dict['temperature'] = 'N/A' + transceiver_dom_info_dict['voltage'] = 'N/A' + transceiver_dom_info_dict['rx1power'] = 'N/A' + transceiver_dom_info_dict['rx2power'] = 'N/A' + transceiver_dom_info_dict['rx3power'] = 'N/A' + transceiver_dom_info_dict['rx4power'] = 'N/A' + transceiver_dom_info_dict['tx1bias'] = 'N/A' + transceiver_dom_info_dict['tx2bias'] = 'N/A' + transceiver_dom_info_dict['tx3bias'] = 'N/A' + transceiver_dom_info_dict['tx4bias'] = 'N/A' + transceiver_dom_info_dict['tx1power'] = 'N/A' + transceiver_dom_info_dict['tx2power'] = 'N/A' + transceiver_dom_info_dict['tx3power'] = 'N/A' + transceiver_dom_info_dict['tx4power'] = 'N/A' + + elif port_num in self.qsfp_ports: + offset = 0 + offset_xcvr = 128 + file_path = self._get_port_eeprom_path(port_num, self.IDENTITY_EEPROM_ADDR) + if not self._sfp_eeprom_present(file_path, 0): + return None + + try: + sysfsfile_eeprom = open(file_path, mode="rb", buffering=0) + except IOError: + print("Error: reading sysfs file %s" % file_path) + return None + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + + sfpi_obj = sff8436InterfaceId() + if sfpi_obj is None: + return None + + # QSFP capability byte parse, through this byte can know whether it support tx_power or not. + # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, + # need to add more code for determining the capability and version compliance + # in SFF-8636 dom capability definitions evolving with the versions. + qsfp_dom_capability_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset_xcvr + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) + if qsfp_dom_capability_raw is not None: + qspf_dom_capability_data = sfpi_obj.parse_qsfp_dom_capability(qsfp_dom_capability_raw, 0) + else: + return None + + dom_temperature_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + else: + return None + + dom_voltage_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + else: + return None + + qsfp_dom_rev_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + QSFP_DOM_REV_OFFSET), QSFP_DOM_REV_WIDTH) + if qsfp_dom_rev_raw is not None: + qsfp_dom_rev_data = sfpd_obj.parse_sfp_dom_rev(qsfp_dom_rev_raw, 0) + else: + return None + + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + # The tx_power monitoring is only available on QSFP which compliant with SFF-8636 + # and claimed that it support tx_power with one indicator bit. + dom_channel_monitor_data = {} + qsfp_dom_rev = qsfp_dom_rev_data['data']['dom_rev']['value'] + qsfp_tx_power_support = qspf_dom_capability_data['data']['Tx_power_support']['value'] + if (qsfp_dom_rev[0:8] != 'SFF-8636' or (qsfp_dom_rev[0:8] == 'SFF-8636' and qsfp_tx_power_support != 'on')): + dom_channel_monitor_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + else: + return None + + transceiver_dom_info_dict['tx1power'] = 'N/A' + transceiver_dom_info_dict['tx2power'] = 'N/A' + transceiver_dom_info_dict['tx3power'] = 'N/A' + transceiver_dom_info_dict['tx4power'] = 'N/A' + else: + dom_channel_monitor_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0) + else: + return None + + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TX1Power']['value'] + transceiver_dom_info_dict['tx2power'] = dom_channel_monitor_data['data']['TX2Power']['value'] + transceiver_dom_info_dict['tx3power'] = dom_channel_monitor_data['data']['TX3Power']['value'] + transceiver_dom_info_dict['tx4power'] = dom_channel_monitor_data['data']['TX4Power']['value'] + + try: + sysfsfile_eeprom.close() + except IOError: + print("Error: closing sysfs file %s" % file_path) + return None + + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RX1Power']['value'] + transceiver_dom_info_dict['rx2power'] = dom_channel_monitor_data['data']['RX2Power']['value'] + transceiver_dom_info_dict['rx3power'] = dom_channel_monitor_data['data']['RX3Power']['value'] + transceiver_dom_info_dict['rx4power'] = dom_channel_monitor_data['data']['RX4Power']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value'] + transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value'] + transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value'] + transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value'] + + else: + offset = 256 + file_path = self._get_port_eeprom_path(port_num, self.DOM_EEPROM_ADDR) + if not self._sfp_eeprom_present(file_path, 0): + return None + + try: + sysfsfile_eeprom = open(file_path, mode="rb", buffering=0) + except IOError: + print("Error: reading sysfs file %s" % file_path) + return None + + sfpd_obj = sff8472Dom() + if sfpd_obj is None: + return None + + dom_temperature_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + else: + return None + + dom_voltage_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_VOLT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + else: + return None + + dom_channel_monitor_raw = self._read_eeprom_specific_bytes(sysfsfile_eeprom, (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + else: + return None + + try: + sysfsfile_eeprom.close() + except IOError: + print("Error: closing sysfs file %s" % file_path) + return None + + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RXPower']['value'] + transceiver_dom_info_dict['rx2power'] = 'N/A' + transceiver_dom_info_dict['rx3power'] = 'N/A' + transceiver_dom_info_dict['rx4power'] = 'N/A' + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TXBias']['value'] + transceiver_dom_info_dict['tx2bias'] = 'N/A' + transceiver_dom_info_dict['tx3bias'] = 'N/A' + transceiver_dom_info_dict['tx4bias'] = 'N/A' + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TXPower']['value'] + transceiver_dom_info_dict['tx2power'] = 'N/A' + transceiver_dom_info_dict['tx3power'] = 'N/A' + transceiver_dom_info_dict['tx4power'] = 'N/A' + + return transceiver_dom_info_dict diff --git a/device/marvell/armhf-marvell_et6448m_52x-r0/default_sku b/device/marvell/armhf-marvell_et6448m_52x-r0/default_sku new file mode 100644 index 00000000000..4f0da7a2693 --- /dev/null +++ b/device/marvell/armhf-marvell_et6448m_52x-r0/default_sku @@ -0,0 +1 @@ +et6448m t1 diff --git a/device/marvell/armhf-marvell_et6448m_52x-r0/et6448m/buffers_defaults_t1.j2 b/device/marvell/armhf-marvell_et6448m_52x-r0/et6448m/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..38e34eb571e --- /dev/null +++ b/device/marvell/armhf-marvell_et6448m_52x-r0/et6448m/buffers_defaults_t1.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/marvell/armhf-marvell_et6448m_52x-r0/et6448m/port_config.ini b/device/marvell/armhf-marvell_et6448m_52x-r0/et6448m/port_config.ini new file mode 100644 index 00000000000..8073e8bec86 --- /dev/null +++ b/device/marvell/armhf-marvell_et6448m_52x-r0/et6448m/port_config.ini @@ -0,0 +1,53 @@ +# name lanes alias +Ethernet0 1 Ethernet0 +Ethernet1 2 Ethernet1 +Ethernet2 3 Ethernet2 +Ethernet3 4 Ethernet3 +Ethernet4 5 Ethernet4 +Ethernet5 6 Ethernet5 +Ethernet6 7 Ethernet6 +Ethernet7 8 Ethernet7 +Ethernet8 9 Ethernet8 +Ethernet9 10 Ethernet9 +Ethernet10 11 Ethernet10 +Ethernet11 12 Ethernet11 +Ethernet12 13 Ethernet12 +Ethernet13 14 Ethernet13 +Ethernet14 15 Ethernet14 +Ethernet15 16 Ethernet15 +Ethernet16 17 Ethernet16 +Ethernet17 18 Ethernet17 +Ethernet18 19 Ethernet18 +Ethernet19 20 Ethernet19 +Ethernet20 21 Ethernet20 +Ethernet21 22 Ethernet21 +Ethernet22 23 Ethernet22 +Ethernet23 24 Ethernet23 +Ethernet24 25 Ethernet24 +Ethernet25 26 Ethernet25 +Ethernet26 27 Ethernet26 +Ethernet27 28 Ethernet27 +Ethernet28 29 Ethernet28 +Ethernet29 30 Ethernet29 +Ethernet30 31 Ethernet30 +Ethernet31 32 Ethernet31 +Ethernet32 33 Ethernet32 +Ethernet33 34 Ethernet33 +Ethernet34 35 Ethernet34 +Ethernet35 36 Ethernet35 +Ethernet36 37 Ethernet36 +Ethernet37 38 Ethernet37 +Ethernet38 39 Ethernet38 +Ethernet39 40 Ethernet39 +Ethernet40 41 Ethernet40 +Ethernet41 42 Ethernet41 +Ethernet42 43 Ethernet42 +Ethernet43 44 Ethernet43 +Ethernet44 45 Ethernet44 +Ethernet45 46 Ethernet45 +Ethernet46 47 Ethernet46 +Ethernet47 48 Ethernet47 +Ethernet48 49 Ethernet48 +Ethernet49 50 Ethernet49 +Ethernet50 51 Ethernet50 +Ethernet51 52 Ethernet51 diff --git a/device/marvell/armhf-marvell_et6448m_52x-r0/et6448m/profile.ini b/device/marvell/armhf-marvell_et6448m_52x-r0/et6448m/profile.ini new file mode 100644 index 00000000000..c81a156d58f --- /dev/null +++ b/device/marvell/armhf-marvell_et6448m_52x-r0/et6448m/profile.ini @@ -0,0 +1 @@ +switchMacAddress=00:50:43:ee:ee:ee diff --git a/device/marvell/armhf-marvell_et6448m_52x-r0/et6448m/sai.profile b/device/marvell/armhf-marvell_et6448m_52x-r0/et6448m/sai.profile new file mode 100644 index 00000000000..10053fa935a --- /dev/null +++ b/device/marvell/armhf-marvell_et6448m_52x-r0/et6448m/sai.profile @@ -0,0 +1,3 @@ +mode=1 +hwId=et6448m +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini diff --git a/device/marvell/armhf-marvell_et6448m_52x-r0/fancontrol b/device/marvell/armhf-marvell_et6448m_52x-r0/fancontrol new file mode 100755 index 00000000000..c2150eb4574 --- /dev/null +++ b/device/marvell/armhf-marvell_et6448m_52x-r0/fancontrol @@ -0,0 +1,10 @@ +INTERVAL=10 +DEVPATH=hwmon0=devices/platform/soc/soc:internal-regs/f1011000.i2c/i2c-0/0-002e hwmon1=devices/platform/soc/soc:internal-regs/f1011000.i2c/i2c-0/0-004a hwmon2=devices/platform/soc/soc:internal-regs/f1011000.i2c/i2c-0/0-004b +DEVNAME=hwmon0=adt7473 hwmon1=lm75a hwmon2=lm75a +FCTEMPS=hwmon0/device/pwm2=hwmon2/temp1_input hwmon0/device/pwm1=hwmon1/temp1_input +FCFANS=hwmon0/device/pwm2=hwmon0/device/fan2_input hwmon0/device/pwm1=hwmon0/device/fan1_input +MINTEMP=hwmon0/device/pwm2=20 hwmon0/device/pwm1=20 +MAXTEMP=hwmon0/device/pwm2=60 hwmon0/device/pwm1=60 +MINSTART=hwmon0/device/pwm2=150 hwmon0/device/pwm1=150 +MINSTOP=hwmon0/device/pwm2=0 hwmon0/device/pwm1=0 + diff --git a/device/marvell/armhf-marvell_et6448m_52x-r0/plugins/eeprom.py b/device/marvell/armhf-marvell_et6448m_52x-r0/plugins/eeprom.py new file mode 100644 index 00000000000..ea525f5d74b --- /dev/null +++ b/device/marvell/armhf-marvell_et6448m_52x-r0/plugins/eeprom.py @@ -0,0 +1,13 @@ +#!/usr/bin/env python + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/etc/sonic/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/marvell/armhf-marvell_et6448m_52x-r0/plugins/psuutil.py b/device/marvell/armhf-marvell_et6448m_52x-r0/plugins/psuutil.py new file mode 100755 index 00000000000..16965414e64 --- /dev/null +++ b/device/marvell/armhf-marvell_et6448m_52x-r0/plugins/psuutil.py @@ -0,0 +1,76 @@ +#!/usr/bin/env python + +import sys +import os.path +if sys.version_info[0] < 3: + import commands as cmd +else: + import subprocess as cmd + +smbus_present = 1 +try: + import smbus +except ImportError as e: + smbus_present = 0 + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + MAX_PSUS = 2 + + def get_num_psus(self): + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + if index is None: + return False + if smbus_present == 0: + cmdstatus, psustatus = cmd.getstatusoutput('i2cget -y 0 0x41 0xa') #need to verify the cpld register logic + psustatus = int(psustatus, 16) + else : + bus = smbus.SMBus(0) + DEVICE_ADDRESS = 0x41 + DEVICE_REG = 0xa + psustatus = bus.read_byte_data(DEVICE_ADDRESS, DEVICE_REG) + if index == 1: + psustatus = psustatus&4 + if psustatus == 4 : + return True + if index == 2: + psustatus = psustatus&8 + if psustatus == 8 : + return True + + return False + + def get_psu_presence(self, index): + if index is None: + return False + + if smbus_present == 0: + cmdstatus, psustatus = cmd.getstatusoutput('i2cget -y 0 0x41 0xa') #need to verify the cpld register logic + psustatus = int(psustatus, 16) + else : + bus = smbus.SMBus(0) + DEVICE_ADDRESS = 0x41 + DEVICE_REG = 0xa + psustatus = bus.read_byte_data(DEVICE_ADDRESS, DEVICE_REG) + + if index == 1: + psustatus = psustatus&1 + if psustatus == 1 : + return True + if index == 2: + psustatus = psustatus&2 + if psustatus == 2 : + return True + return False + diff --git a/device/marvell/armhf-marvell_et6448m_52x-r0/plugins/sfputil.py b/device/marvell/armhf-marvell_et6448m_52x-r0/plugins/sfputil.py new file mode 100755 index 00000000000..92a1604f311 --- /dev/null +++ b/device/marvell/armhf-marvell_et6448m_52x-r0/plugins/sfputil.py @@ -0,0 +1,258 @@ +#!/usr/bin/env python + +try: + import os + import time + import re + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +smbus_present = 1 + +try: + import smbus +except ImportError, e: + smbus_present = 0 + +class SfpUtil(SfpUtilBase): + """Platform specific sfputil class""" + + _port_start = 49 + _port_end = 52 + ports_in_block = 4 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 49 : 0, + 50 : 0, + 51 : 0, + 52 : 0 + } + + _qsfp_ports = range(_port_start, ports_in_block + 1) + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + if not os.path.exists("/sys/class/gpio/gpio50/") : + os.system("echo 50 > /sys/class/gpio/gpiochip32/subsystem/export") + if not os.path.exists("/sys/class/gpio/gpio52/") : + os.system("echo 52 > /sys/class/gpio/gpiochip32/subsystem/export") + os.system("echo out > /sys/class/gpio/gpio50/direction") + os.system("echo out > /sys/class/gpio/gpio52/direction ") + + if not os.path.exists("/sys/bus/i2c/devices/0-0050") : + os.system("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/new_device") + + eeprom_path = '/sys/bus/i2c/devices/0-0050/eeprom' + for x in range(self.port_start, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + # Enable optical SFP Tx + if smbus_present == 0 : + os.system("i2cset -y -m 0x0f 0 0x41 0x5 0x00") + else : + bus = smbus.SMBus(0) + DEVICE_ADDRESS = 0x41 + DEVICEREG = 0x5 + OPTIC_E = bus.read_byte_data(DEVICE_ADDRESS, DEVICEREG) + OPTIC_E = OPTIC_E & 0xf0 + bus.write_byte_data(DEVICE_ADDRESS, DEVICEREG, OPTIC_E) + SfpUtilBase.__init__(self) + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + path = "/sys/bus/i2c/devices/{0}-0050/sfp_port_reset" + port_ps = path.format(self.port_to_i2c_mapping[port_num+1]) + + try: + reg_file = open(port_ps, 'w') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #toggle reset + reg_file.seek(0) + reg_file.write('1') + time.sleep(1) + reg_file.seek(0) + reg_file.write('0') + reg_file.close() + return True + + def set_low_power_mode(self, port_nuM, lpmode): + raise NotImplementedError + + def get_low_power_mode(self, port_num): + raise NotImplementedError + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + prt = port_num % 49 + prt = "{0:02b}".format(prt) + p = prt[0] + q = prt[1] + cmd1 = "echo " + q + " > /sys/class/gpio/gpio50/value" + cmd2 = "echo " + p + " > /sys/class/gpio/gpio52/value" + os.system(cmd1) + os.system(cmd2) + + '''if port_num == 49 : + os.system("echo 0 > /sys/class/gpio/gpio50/value") + os.system("echo 0 > /sys/class/gpio/gpio52/value") + if port_num == 50 : + os.system("echo 0 > /sys/class/gpio/gpio50/value") + os.system("echo 0 > /sys/class/gpio/gpio52/value") + if port_num == 51 : + os.system("echo 0 > /sys/class/gpio/gpio50/value") + os.system("echo 0 > /sys/class/gpio/gpio52/value") + if port_num == 52: + os.system("echo 0 > /sys/class/gpio/gpio50/value") + os.system("echo 0 > /sys/class/gpio/gpio52/value")''' + path = "/sys/bus/i2c/devices/0-0050/eeprom" + #port_ps = path.format(self.port_to_i2c_mapping[port_num+1]) + + try: + reg_file = open(path) + reg_file.seek(01) + reg_file.read(02) + except IOError as e: + #print "Error: unable to open file: %s" % str(e) + + return False + + #reg_value = reg_file.readline().rstrip() + #if reg_value == '1': + # return True + + return True + + def read_porttab_mappings(self, porttabfile): + logical = [] + logical_to_bcm = {} + logical_to_physical = {} + physical_to_logical = {} + last_fp_port_index = 0 + last_portname = "" + first = 1 + port_pos_in_file = 0 + parse_fmt_port_config_ini = False + + try: + f = open(porttabfile) + except: + raise + + parse_fmt_port_config_ini = (os.path.basename(porttabfile) == "port_config.ini") + + # Read the porttab file and generate dicts + # with mapping for future reference. + # + # TODO: Refactor this to use the portconfig.py module that now + # exists as part of the sonic-config-engine package. + title = [] + for line in f: + line.strip() + if re.search("^#", line) is not None: + # The current format is: # name lanes alias index speed + # Where the ordering of the columns can vary + title = line.split()[1:] + continue + + # Parsing logic for 'port_config.ini' file + if (parse_fmt_port_config_ini): + # bcm_port is not explicitly listed in port_config.ini format + # Currently we assume ports are listed in numerical order according to bcm_port + # so we use the port's position in the file (zero-based) as bcm_port + portname = line.split()[0] + + bcm_port = str(port_pos_in_file) + #print("portname " + portname) + + if "index" in title: + fp_port_index = int(line.split()[title.index("index")]) + # Leave the old code for backward compatibility + elif len(line.split()) >= 4: + fp_port_index = int(line.split()[3]) + else: + fp_port_index = portname.split("Ethernet").pop() + fp_port_index = int(fp_port_index.split("s").pop(0))+1 + #print(fp_port_index) + else: # Parsing logic for older 'portmap.ini' file + (portname, bcm_port) = line.split("=")[1].split(",")[:2] + + fp_port_index = portname.split("Ethernet").pop() + fp_port_index = int(fp_port_index.split("s").pop(0))+1 + + if ((len(self.sfp_ports) > 0) and (fp_port_index not in self.sfp_ports)): + continue + + if first == 1: + # Initialize last_[physical|logical]_port + # to the first valid port + last_fp_port_index = fp_port_index + last_portname = portname + first = 0 + + logical.append(portname) + + logical_to_bcm[portname] = "xe" + bcm_port + logical_to_physical[portname] = [fp_port_index] + if physical_to_logical.get(fp_port_index) is None: + physical_to_logical[fp_port_index] = [portname] + else: + physical_to_logical[fp_port_index].append( + portname) + + if (fp_port_index - last_fp_port_index) > 1: + # last port was a gang port + for p in range(last_fp_port_index+1, fp_port_index): + logical_to_physical[last_portname].append(p) + if physical_to_logical.get(p) is None: + physical_to_logical[p] = [last_portname] + else: + physical_to_logical[p].append(last_portname) + + last_fp_port_index = fp_port_index + last_portname = portname + + port_pos_in_file += 1 + + self.logical = logical + self.logical_to_bcm = logical_to_bcm + self.logical_to_physical = logical_to_physical + self.physical_to_logical = physical_to_logical + + + #print(self.logical_to_physical) + '''print("logical: " + self.logical) + print("logical to bcm: " + self.logical_to_bcm) + print("logical to physical: " + self.logical_to_physical) + print("physical to logical: " + self.physical_to_logical)''' + + + + @property + def port_start(self): + return self._port_start + + @property + def port_end(self): + return self._port_end + + @property + def qsfp_ports(self): + return self._qsfp_ports + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def get_transceiver_change_event(self): + raise NotImplementedError diff --git a/device/marvell/armhf-marvell_et6448m_52x-r0/sensors.conf b/device/marvell/armhf-marvell_et6448m_52x-r0/sensors.conf new file mode 100644 index 00000000000..5f9b97162ee --- /dev/null +++ b/device/marvell/armhf-marvell_et6448m_52x-r0/sensors.conf @@ -0,0 +1,18 @@ +chip "adt7473-*" + label fan1 "rear fan 1" + label fan2 "rear fan 2" + ignore fan3 + ignore fan4 + ignore in1 + +chip "lm75a-i2c-*-4a" + label temp1 "MAC temp sensor" + set temp1_max 65 + set temp1_crit 75 + +chip "lm75a-i2c-*-4b" + label temp1 "Board temp sensor" + set temp2_max 65 + set temp2_crit 75 +chip "armada_thermal-*" + ignore temp1 diff --git a/device/marvell/x86_64-marvell_slm5401_54x-r0/SLM5401-54x/port_config.ini b/device/marvell/x86_64-marvell_slm5401_54x-r0/SLM5401-54x/port_config.ini new file mode 100755 index 00000000000..74865956f61 --- /dev/null +++ b/device/marvell/x86_64-marvell_slm5401_54x-r0/SLM5401-54x/port_config.ini @@ -0,0 +1,55 @@ +# name lanes +Ethernet0 0 +Ethernet1 1 +Ethernet2 2 +Ethernet3 3 +Ethernet4 4 +Ethernet5 5 +Ethernet6 6 +Ethernet7 7 +Ethernet8 8 +Ethernet9 9 +Ethernet10 10 +Ethernet11 11 +Ethernet12 12 +Ethernet13 13 +Ethernet14 14 +Ethernet15 15 +Ethernet16 16 +Ethernet17 17 +Ethernet18 18 +Ethernet19 19 +Ethernet20 20 +Ethernet21 21 +Ethernet22 22 +Ethernet23 23 +Ethernet24 24 +Ethernet25 25 +Ethernet26 26 +Ethernet27 27 +Ethernet28 28 +Ethernet29 29 +Ethernet30 30 +Ethernet31 31 +Ethernet32 32 +Ethernet33 33 +Ethernet34 34 +Ethernet35 35 +Ethernet36 36 +Ethernet37 37 +Ethernet38 38 +Ethernet39 39 +Ethernet40 40 +Ethernet41 41 +Ethernet42 42 +Ethernet43 43 +Ethernet44 44 +Ethernet45 45 +Ethernet46 46 +Ethernet47 47 +Ethernet48 48 +Ethernet49 49 +Ethernet50 50 +Ethernet51 51 +Ethernet52 52 +Ethernet53 53 diff --git a/device/marvell/x86_64-marvell_slm5401_54x-r0/SLM5401-54x/sai.profile b/device/marvell/x86_64-marvell_slm5401_54x-r0/SLM5401-54x/sai.profile new file mode 100755 index 00000000000..edba72ba482 --- /dev/null +++ b/device/marvell/x86_64-marvell_slm5401_54x-r0/SLM5401-54x/sai.profile @@ -0,0 +1,2 @@ +mode=1 +hwId=slm5401-54x diff --git a/device/marvell/x86_64-marvell_slm5401_54x-r0/default_sku b/device/marvell/x86_64-marvell_slm5401_54x-r0/default_sku new file mode 100644 index 00000000000..8ace9a8abce --- /dev/null +++ b/device/marvell/x86_64-marvell_slm5401_54x-r0/default_sku @@ -0,0 +1 @@ +SLM5401-54x t1 diff --git a/device/marvell/x86_64-marvell_slm5401_54x-r0/installer.conf b/device/marvell/x86_64-marvell_slm5401_54x-r0/installer.conf new file mode 100755 index 00000000000..14404194ef5 --- /dev/null +++ b/device/marvell/x86_64-marvell_slm5401_54x-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/marvell/x86_64-marvell_slm5401_54x-r0/plugins/eeprom.py b/device/marvell/x86_64-marvell_slm5401_54x-r0/plugins/eeprom.py new file mode 100755 index 00000000000..7681caafeef --- /dev/null +++ b/device/marvell/x86_64-marvell_slm5401_54x-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/marvell/x86_64-marvell_slm5401_54x-r0/plugins/sfputil.py b/device/marvell/x86_64-marvell_slm5401_54x-r0/plugins/sfputil.py new file mode 100755 index 00000000000..fa706867a58 --- /dev/null +++ b/device/marvell/x86_64-marvell_slm5401_54x-r0/plugins/sfputil.py @@ -0,0 +1,135 @@ +#!/usr/bin/env python + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class sfputil(SfpUtilBase): + """Platform specific sfputil class""" + + port_start = 0 + port_end = 31 + ports_in_block = 32 + + port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 9 : 18, + 10 : 19, + 11 : 20, + 12 : 21, + 1 : 22, + 2 : 23, + 3 : 24, + 4 : 25, + 6 : 26, + 5 : 27, + 8 : 28, + 7 : 29, + 13 : 30, + 14 : 31, + 15 : 32, + 16 : 33, + 17 : 34, + 18 : 35, + 19 : 36, + 20 : 37, + 25 : 38, + 26 : 39, + 27 : 40, + 28 : 41, + 29 : 42, + 30 : 43, + 31 : 44, + 32 : 45, + 21 : 46, + 22 : 47, + 23 : 48, + 24 : 49, + } + + _qsfp_ports = range(0, ports_in_block + 1) + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/sfp_eeprom' + for x in range(self.port_start, self.port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x+1]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + path = "/sys/bus/i2c/devices/{0}-0050/sfp_port_reset" + port_ps = path.format(self.port_to_i2c_mapping[port_num+1]) + + try: + reg_file = open(port_ps, 'w') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + #toggle reset + reg_file.seek(0) + reg_file.write('1') + time.sleep(1) + reg_file.seek(0) + reg_file.write('0') + reg_file.close() + return True + + def set_low_power_mode(self, port_nuM, lpmode): + raise NotImplementedErro + + def get_low_power_mode(self, port_num): + raise NotImplementedErro + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + path = "/sys/bus/i2c/devices/{0}-0050/sfp_is_present" + port_ps = path.format(self.port_to_i2c_mapping[port_num+1]) + + + try: + reg_file = open(port_ps) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if reg_value == '1': + return True + + return False + + @property + def port_start(self): + return self._port_start + + @property + def port_end(self): + return self._port_end + + @property + def qsfp_ports(self): + return range(0, self.ports_in_block + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/mellanox/x86_64-mlnx_lssn2700-r0/LS-SN2700 b/device/mellanox/x86_64-mlnx_lssn2700-r0/LS-SN2700 new file mode 120000 index 00000000000..dfed1bb2cfb --- /dev/null +++ b/device/mellanox/x86_64-mlnx_lssn2700-r0/LS-SN2700 @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/ACS-MSN2700/ \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_lssn2700-r0/default_sku b/device/mellanox/x86_64-mlnx_lssn2700-r0/default_sku new file mode 100644 index 00000000000..22e3116d2db --- /dev/null +++ b/device/mellanox/x86_64-mlnx_lssn2700-r0/default_sku @@ -0,0 +1 @@ +LS-SN2700 t1 diff --git a/device/mellanox/x86_64-mlnx_lssn2700-r0/installer.conf b/device/mellanox/x86_64-mlnx_lssn2700-r0/installer.conf new file mode 120000 index 00000000000..955db12ff42 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_lssn2700-r0/installer.conf @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/installer.conf \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_lssn2700-r0/platform_reboot b/device/mellanox/x86_64-mlnx_lssn2700-r0/platform_reboot new file mode 120000 index 00000000000..43c8ea56749 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_lssn2700-r0/platform_reboot @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_reboot \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_lssn2700-r0/platform_wait b/device/mellanox/x86_64-mlnx_lssn2700-r0/platform_wait new file mode 120000 index 00000000000..4b30bd42985 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_lssn2700-r0/platform_wait @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_wait \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_lssn2700-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_lssn2700-r0/pmon_daemon_control.json new file mode 120000 index 00000000000..435a2ce7c0b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_lssn2700-r0/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_lssn2700-r0/sensors.conf b/device/mellanox/x86_64-mlnx_lssn2700-r0/sensors.conf new file mode 120000 index 00000000000..ea04d66d008 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_lssn2700-r0/sensors.conf @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/sensors.conf \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers_defaults_t0.j2 new file mode 120000 index 00000000000..7bcae62336f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers_defaults_t1.j2 new file mode 120000 index 00000000000..a437d613434 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/pg_profile_lookup.ini new file mode 120000 index 00000000000..3c97f3dcb16 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/pg_profile_lookup.ini @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/port_config.ini b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/port_config.ini new file mode 100644 index 00000000000..2bd7aef02e1 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/port_config.ini @@ -0,0 +1,23 @@ +# name lanes index +Ethernet0 0 0 +Ethernet4 4 1 +Ethernet8 8 2 +Ethernet12 12 3 +Ethernet16 16 4 +Ethernet20 20 5 +Ethernet24 24 6 +Ethernet28 28 7 +Ethernet32 32 8 +Ethernet36 36 9 +Ethernet40 40 10 +Ethernet44 44 11 +Ethernet48 48 12 +Ethernet52 52 13 +Ethernet56 56 14 +Ethernet60 60 15 +Ethernet64 64 16 +Ethernet68 68 17 +Ethernet72 72,73,74,75 18 +Ethernet76 76,77,78,79 19 +Ethernet80 80,81,82,83 20 +Ethernet84 84,85,86,87 21 diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/qos.json.j2 new file mode 120000 index 00000000000..eccf286dc87 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai.profile b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai.profile new file mode 100644 index 00000000000..c13ca373750 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2010.xml diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai_2010.xml b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai_2010.xml new file mode 100644 index 00000000000..34151a434a2 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai_2010.xml @@ -0,0 +1,176 @@ + + + + + + 00:02:03:04:05:00 + + + 1 + + + 22 + + + + + 1 + 1 + 14 + + + 0 + + + 939524096 + + + 2 + 1 + 15 + 0 + 939524096 + + + 3 + 1 + 16 + 0 + 939524096 + + + 4 + 1 + 17 + 0 + 939524096 + + + 5 + 4 + 19 + 3 + 11534336 + + + 9 + 4 + 18 + 3 + 11534336 + + + 13 + 4 + 21 + 3 + 11534336 + + + 17 + 4 + 20 + 3 + 11534336 + + + 33 + 1 + 10 + 0 + 939524096 + + + 34 + 1 + 11 + 0 + 939524096 + + + 35 + 1 + 12 + 0 + 939524096 + + + 36 + 1 + 13 + 0 + 939524096 + + + 37 + 1 + 6 + 0 + 939524096 + + + 38 + 1 + 7 + 0 + 939524096 + + + 39 + 1 + 8 + 0 + 939524096 + + + 40 + 1 + 9 + 0 + 939524096 + + + 41 + 1 + 2 + 0 + 939524096 + + + 42 + 1 + 3 + 0 + 939524096 + + + 43 + 1 + 4 + 0 + 939524096 + + + 44 + 1 + 5 + 0 + 939524096 + + + 45 + 1 + 0 + 0 + 939524096 + + + 46 + 1 + 1 + 0 + 939524096 + + + + diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/default_sku b/device/mellanox/x86_64-mlnx_msn2010-r0/default_sku new file mode 100644 index 00000000000..558120a701d --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/default_sku @@ -0,0 +1 @@ +ACS-MSN2010 t1 diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn2010-r0/installer.conf new file mode 100644 index 00000000000..c9c9493a540 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/installer.conf @@ -0,0 +1 @@ +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=lax acpi=noirq" diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2010-r0/platform_reboot new file mode 120000 index 00000000000..43c8ea56749 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/platform_reboot @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_reboot \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/platform_wait b/device/mellanox/x86_64-mlnx_msn2010-r0/platform_wait new file mode 120000 index 00000000000..4b30bd42985 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/platform_wait @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_wait \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/eeprom.py b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/eeprom.py new file mode 120000 index 00000000000..b4e2a6a6167 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/eeprom.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/eeprom.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/psuutil.py b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/psuutil.py new file mode 100644 index 00000000000..a51a9b07292 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/psuutil.py @@ -0,0 +1,74 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/var/run/hw-management/thermal/" + self.psu_presence = "psu{}_pwr_status" + self.psu_oper_status = "psu{}_pwr_status" + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path + self.psu_oper_status.format(index), 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path + self.psu_presence.format(index), 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfplpmget.py new file mode 120000 index 00000000000..2e84f435abd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfplpmget.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfplpmset.py new file mode 120000 index 00000000000..6a88bac3046 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfplpmset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfpreset.py b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfpreset.py new file mode 120000 index 00000000000..fef2063e349 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfpreset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfpreset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfputil.py new file mode 120000 index 00000000000..45909b880fc --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/plugins/sfputil.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfputil.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn2010-r0/pmon_daemon_control.json new file mode 120000 index 00000000000..435a2ce7c0b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf new file mode 100644 index 00000000000..3b68f775df2 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf @@ -0,0 +1,92 @@ +bus "i2c-2" "i2c-1-mux (chan_id 1)" +chip "mlxsw-i2c-2-48" + label temp1 "ASIC Temp" + +bus "i2c-7" "i2c-1-mux (chan_id 6)" +chip "lm75-*" + label temp1 "Ambient Port Temp" + +bus "i2c-5" "i2c-1-mux (chan_id 4)" +chip "tps53679-*" + label vin "TPS vin" + label vout1 "TPS vout1" + label vout2 "TPS vout2" + label temp1 "TPS Temp1" + label temp2 "TPS Temp2" + label pout1 "TPS pouti1" + label pout2 "TPS pout2" + label iout1 "TPS iout1" + label iout2 "TPS iout2" + +chip "mlxsw-*" + ignore temp2 + ignore temp3 + ignore temp4 + ignore temp5 + ignore temp6 + ignore temp7 + ignore temp8 + ignore temp9 + ignore temp10 + ignore temp11 + ignore temp12 + ignore temp13 + ignore temp14 + ignore temp15 + ignore temp16 + ignore temp17 + ignore temp18 + ignore temp19 + ignore temp20 + ignore temp21 + ignore temp22 + ignore temp23 + ignore temp24 + ignore temp25 + ignore temp26 + ignore temp27 + ignore temp28 + ignore temp29 + ignore temp30 + ignore temp31 + ignore temp32 + ignore temp33 + ignore temp34 + ignore temp35 + ignore temp36 + ignore temp37 + ignore temp38 + ignore temp39 + ignore temp40 + ignore temp41 + ignore temp42 + ignore temp43 + ignore temp44 + ignore temp45 + ignore temp46 + ignore temp47 + ignore temp48 + ignore temp49 + ignore temp50 + ignore temp51 + ignore temp52 + ignore temp53 + ignore temp54 + ignore temp55 + ignore temp56 + ignore temp57 + ignore temp58 + ignore temp59 + ignore temp60 + ignore temp61 + ignore temp62 + ignore temp63 + ignore temp64 + +chip "*-virtual-*" + ignore temp1 + ignore temp2 + +chip "dps460-*" + ignore fan2 + ignore fan3 diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/buffers_defaults_t0.j2 new file mode 120000 index 00000000000..7bcae62336f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/buffers_defaults_t1.j2 new file mode 120000 index 00000000000..a437d613434 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/pg_profile_lookup.ini new file mode 120000 index 00000000000..3c97f3dcb16 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/pg_profile_lookup.ini @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/port_config.ini b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/port_config.ini new file mode 100644 index 00000000000..c792a4114b9 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/port_config.ini @@ -0,0 +1,17 @@ +# name lanes +Ethernet0 0,1,2,3 +Ethernet4 4,5,6,7 +Ethernet8 8,9,10,11 +Ethernet12 12,13,14,15 +Ethernet16 16,17,18,19 +Ethernet20 20,21,22,23 +Ethernet24 24,25,26,27 +Ethernet28 28,29,30,31 +Ethernet32 32,33,34,35 +Ethernet36 36,37,38,39 +Ethernet40 40,41,42,43 +Ethernet44 44,45,46,47 +Ethernet48 48,49,50,51 +Ethernet52 52,53,54,55 +Ethernet56 56,57,58,59 +Ethernet60 60,61,62,63 diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/sai.profile b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/sai.profile new file mode 100644 index 00000000000..5a381e4666e --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2100.xml diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/sai_2100.xml b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/sai_2100.xml new file mode 100644 index 00000000000..c9b844cd4bf --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/sai_2100.xml @@ -0,0 +1,131 @@ + + + + + + 00:02:03:04:05:00 + + + 16 + + + + + 25 + 4 + 0 + + + 3 + + + 98368 + + + 29 + 4 + 1 + 3 + 98368 + + + 17 + 4 + 2 + 3 + 98368 + + + 21 + 4 + 3 + 3 + 98368 + + + 9 + 4 + 4 + 3 + 98368 + + + 13 + 4 + 5 + 3 + 98368 + + + 1 + 4 + 6 + 3 + 98368 + + + 5 + 4 + 7 + 3 + 98368 + + + 37 + 4 + 8 + 3 + 98368 + + + 33 + 4 + 9 + 3 + 98368 + + + 45 + 4 + 10 + 3 + 98368 + + + 41 + 4 + 11 + 3 + 98368 + + + 53 + 4 + 12 + 3 + 98368 + + + 49 + 4 + 13 + 3 + 98368 + + + 61 + 4 + 14 + 3 + 98368 + + + 57 + 4 + 15 + 3 + 98368 + + + + diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/default_sku b/device/mellanox/x86_64-mlnx_msn2100-r0/default_sku new file mode 100644 index 00000000000..5d7c94c0bc8 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/default_sku @@ -0,0 +1 @@ +ACS-MSN2100 t1 diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn2100-r0/installer.conf new file mode 120000 index 00000000000..955db12ff42 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/installer.conf @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/installer.conf \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2100-r0/platform_reboot new file mode 120000 index 00000000000..43c8ea56749 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/platform_reboot @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_reboot \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/platform_wait b/device/mellanox/x86_64-mlnx_msn2100-r0/platform_wait new file mode 120000 index 00000000000..4b30bd42985 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/platform_wait @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_wait \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/eeprom.py b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/eeprom.py new file mode 120000 index 00000000000..b4e2a6a6167 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/eeprom.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/eeprom.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/psuutil.py b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/psuutil.py new file mode 100644 index 00000000000..b14b1d9dac4 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/psuutil.py @@ -0,0 +1,64 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/var/run/hw-management/thermal/" + self.psu_presence = "psu{}_status" + self.psu_oper_status = "psu{}_pwr_status" + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path + self.psu_oper_status.format(index), 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + return isinstance(index, int) and index > 0 and index <= self.get_num_psus() diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfplpmget.py new file mode 120000 index 00000000000..2e84f435abd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfplpmget.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfplpmset.py new file mode 120000 index 00000000000..6a88bac3046 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfplpmset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfpreset.py b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfpreset.py new file mode 120000 index 00000000000..fef2063e349 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfpreset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfpreset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfputil.py new file mode 120000 index 00000000000..45909b880fc --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfputil.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfputil.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn2100-r0/pmon_daemon_control.json new file mode 120000 index 00000000000..435a2ce7c0b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2100-r0/sensors.conf new file mode 120000 index 00000000000..ea04d66d008 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/sensors.conf @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/sensors.conf \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/buffers_defaults_t0.j2 new file mode 120000 index 00000000000..7bcae62336f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/buffers_defaults_t1.j2 new file mode 120000 index 00000000000..a437d613434 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/pg_profile_lookup.ini new file mode 120000 index 00000000000..3c97f3dcb16 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/pg_profile_lookup.ini @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/port_config.ini b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/port_config.ini new file mode 100644 index 00000000000..c7db66b0227 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/port_config.ini @@ -0,0 +1,57 @@ +# name lanes +Ethernet0 0 +Ethernet4 4 +Ethernet8 8 +Ethernet12 12 +Ethernet16 16 +Ethernet20 20 +Ethernet24 24 +Ethernet28 28 +Ethernet32 32 +Ethernet36 36 +Ethernet40 40 +Ethernet44 44 +Ethernet48 48 +Ethernet52 52 +Ethernet56 56 +Ethernet60 60 +Ethernet64 64 +Ethernet68 68 +Ethernet72 72 +Ethernet76 76 +Ethernet80 80 +Ethernet84 84 +Ethernet88 88 +Ethernet92 92 +Ethernet96 96 +Ethernet100 100 +Ethernet104 104 +Ethernet108 108 +Ethernet112 112 +Ethernet116 116 +Ethernet120 120 +Ethernet124 124 +Ethernet128 128 +Ethernet132 132 +Ethernet136 136 +Ethernet140 140 +Ethernet144 144 +Ethernet148 148 +Ethernet152 152 +Ethernet156 156 +Ethernet160 160 +Ethernet164 164 +Ethernet168 168 +Ethernet172 172 +Ethernet176 176 +Ethernet180 180 +Ethernet184 184 +Ethernet188 188 +Ethernet192 192,193,194,195 +Ethernet196 196,197,198,199 +Ethernet200 200,201,202,203 +Ethernet204 204,205,206,207 +Ethernet208 208,209,210,211 +Ethernet212 212,213,214,215 +Ethernet216 216,217,218,219 +Ethernet220 220,221,222,223 diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/sai.profile b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/sai.profile new file mode 100644 index 00000000000..f7cb264c228 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2410.xml diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/sai_2410.xml b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/sai_2410.xml new file mode 100644 index 00000000000..4884cd754a3 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/sai_2410.xml @@ -0,0 +1,414 @@ + + + + + + 00:02:03:04:05:00 + + + 1 + + + 56 + + + + + 1 + 32 + 1 + + + 0 + + + 939524096 + + + 2 + 33 + 1 + 0 + 939524096 + + + 3 + 34 + 1 + 0 + 939524096 + + + 4 + 35 + 1 + 0 + 939524096 + + + 5 + 36 + 1 + 0 + 939524096 + + + 6 + 37 + 1 + 0 + 939524096 + + + 7 + 38 + 1 + 0 + 939524096 + + + 8 + 39 + 1 + 0 + 939524096 + + + 9 + 40 + 1 + 0 + 939524096 + + + 10 + 41 + 1 + 0 + 939524096 + + + 11 + 42 + 1 + 0 + 939524096 + + + 12 + 43 + 1 + 0 + 939524096 + + + 13 + 44 + 1 + 0 + 939524096 + + + 14 + 45 + 1 + 0 + 939524096 + + + 15 + 46 + 1 + 0 + 939524096 + + + 16 + 47 + 1 + 0 + 939524096 + + + 17 + 48 + 4 + 3 + 11534336 + + + 19 + 49 + 4 + 1 + 11534336 + + + 21 + 50 + 4 + 3 + 11534336 + + + 23 + 51 + 4 + 1 + 11534336 + + + 25 + 52 + 4 + 3 + 11534336 + + + 27 + 53 + 4 + 1 + 11534336 + + + 29 + 54 + 4 + 3 + 11534336 + + + 31 + 55 + 4 + 1 + 11534336 + + + 33 + 28 + 1 + 0 + 939524096 + + + 34 + 29 + 1 + 0 + 939524096 + + + 35 + 30 + 1 + 0 + 939524096 + + + 36 + 31 + 1 + 0 + 939524096 + + + 37 + 24 + 1 + 0 + 939524096 + + + 38 + 25 + 1 + 0 + 939524096 + + + 39 + 26 + 1 + 0 + 939524096 + + + 40 + 27 + 1 + 0 + 939524096 + + + 41 + 20 + 1 + 0 + 939524096 + + + 42 + 21 + 1 + 0 + 939524096 + + + 43 + 22 + 1 + 0 + 939524096 + + + 44 + 23 + 1 + 0 + 939524096 + + + 45 + 16 + 1 + 0 + 939524096 + + + 46 + 17 + 1 + 0 + 939524096 + + + 47 + 18 + 1 + 0 + 939524096 + + + 48 + 19 + 1 + 0 + 939524096 + + + 49 + 12 + 1 + 0 + 939524096 + + + 50 + 13 + 1 + 0 + 939524096 + + + 51 + 14 + 1 + 0 + 939524096 + + + 52 + 15 + 1 + 0 + 939524096 + + + 53 + 8 + 1 + 0 + 939524096 + + + 54 + 9 + 1 + 0 + 939524096 + + + 55 + 10 + 1 + 0 + 939524096 + + + 56 + 11 + 1 + 0 + 939524096 + + + 57 + 4 + 1 + 0 + 939524096 + + + 58 + 5 + 1 + 0 + 939524096 + + + 59 + 6 + 1 + 0 + 939524096 + + + 60 + 7 + 1 + 0 + 939524096 + + + 61 + 0 + 1 + 0 + 939524096 + + + 62 + 1 + 1 + 0 + 939524096 + + + 63 + 2 + 1 + 0 + 939524096 + + + 64 + 3 + 1 + 0 + 939524096 + + + + diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/default_sku b/device/mellanox/x86_64-mlnx_msn2410-r0/default_sku new file mode 100644 index 00000000000..ac04d6adf5f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/default_sku @@ -0,0 +1 @@ +ACS-MSN2410 t1 diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn2410-r0/installer.conf new file mode 120000 index 00000000000..955db12ff42 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/installer.conf @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/installer.conf \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2410-r0/platform_reboot new file mode 120000 index 00000000000..43c8ea56749 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/platform_reboot @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_reboot \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/platform_wait b/device/mellanox/x86_64-mlnx_msn2410-r0/platform_wait new file mode 120000 index 00000000000..4b30bd42985 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/platform_wait @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_wait \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/eeprom.py b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/eeprom.py new file mode 120000 index 00000000000..b4e2a6a6167 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/eeprom.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/eeprom.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/psuutil.py b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/psuutil.py new file mode 100644 index 00000000000..f3cce52b12a --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/psuutil.py @@ -0,0 +1,74 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/var/run/hw-management/thermal/" + self.psu_presence = "psu{}_status" + self.psu_oper_status = "psu{}_pwr_status" + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path + self.psu_oper_status.format(index), 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path + self.psu_presence.format(index), 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfplpmget.py new file mode 120000 index 00000000000..2e84f435abd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfplpmget.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfplpmset.py new file mode 120000 index 00000000000..6a88bac3046 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfplpmset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfpreset.py b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfpreset.py new file mode 120000 index 00000000000..fef2063e349 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfpreset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfpreset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfputil.py new file mode 120000 index 00000000000..45909b880fc --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfputil.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfputil.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn2410-r0/pmon_daemon_control.json new file mode 120000 index 00000000000..435a2ce7c0b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2410-r0/sensors.conf new file mode 120000 index 00000000000..ea04d66d008 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/sensors.conf @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/sensors.conf \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 new file mode 100644 index 00000000000..1083a6210fc --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..8c3cac4b80b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t0.j2 @@ -0,0 +1,106 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '4194304' %} +{% set ingress_lossy_pool_size = '7340032' %} +{% set egress_lossless_pool_size = '16777152' %} +{% set egress_lossy_pool_size = '7340032' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"0" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_profile_lists(port_names) %} + "BUFFER_PORT_INGRESS_PROFILE_LIST": { +{% for port in port_names.split(',') %} + "{{ port }}": { + "profile_list" : "[BUFFER_PROFILE|ingress_lossless_profile],[BUFFER_PROFILE|ingress_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "BUFFER_PORT_EGRESS_PROFILE_LIST": { +{% for port in port_names.split(',') %} + "{{ port }}": { + "profile_list" : "[BUFFER_PROFILE|egress_lossless_profile],[BUFFER_PROFILE|egress_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { +{% for port in port_names.split(',') %} + "{{ port }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, +{% endfor %} +{% for port in port_names.split(',') %} + "{{ port }}|0-2": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + }, +{% endfor %} +{% for port in port_names.split(',') %} + "{{ port }}|5-6": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + + diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..45433b1b264 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t1.j2 @@ -0,0 +1,106 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '2097152' %} +{% set ingress_lossy_pool_size = '5242880' %} +{% set egress_lossless_pool_size = '16777152' %} +{% set egress_lossy_pool_size = '5242880' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"0" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_profile_lists(port_names) %} + "BUFFER_PORT_INGRESS_PROFILE_LIST": { +{% for port in port_names.split(',') %} + "{{ port }}": { + "profile_list" : "[BUFFER_PROFILE|ingress_lossless_profile],[BUFFER_PROFILE|ingress_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "BUFFER_PORT_EGRESS_PROFILE_LIST": { +{% for port in port_names.split(',') %} + "{{ port }}": { + "profile_list" : "[BUFFER_PROFILE|egress_lossless_profile],[BUFFER_PROFILE|egress_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { +{% for port in port_names.split(',') %} + "{{ port }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, +{% endfor %} +{% for port in port_names.split(',') %} + "{{ port }}|0-2": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + }, +{% endfor %} +{% for port in port_names.split(',') %} + "{{ port }}|5-6": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + + diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/pg_profile_lookup.ini new file mode 100644 index 00000000000..b66b129fe43 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 34816 18432 16384 0 + 25000 5m 34816 18432 16384 0 + 40000 5m 34816 18432 16384 0 + 50000 5m 34816 18432 16384 0 + 100000 5m 36864 18432 18432 0 + 10000 40m 36864 18432 18432 0 + 25000 40m 39936 18432 21504 0 + 40000 40m 41984 18432 23552 0 + 50000 40m 41984 18432 23552 0 + 100000 40m 54272 18432 35840 0 + 10000 300m 49152 18432 30720 0 + 25000 300m 71680 18432 53248 0 + 40000 300m 94208 18432 75776 0 + 50000 300m 94208 18432 75776 0 + 100000 300m 184320 18432 165888 0 diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/port_config.ini b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/port_config.ini new file mode 100644 index 00000000000..1e1906ff0ef --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias +Ethernet0 0,1,2,3 etp1 +Ethernet4 4,5,6,7 etp2 +Ethernet8 8,9,10,11 etp3 +Ethernet12 12,13,14,15 etp4 +Ethernet16 16,17,18,19 etp5 +Ethernet20 20,21,22,23 etp6 +Ethernet24 24,25,26,27 etp7 +Ethernet28 28,29,30,31 etp8 +Ethernet32 32,33,34,35 etp9 +Ethernet36 36,37,38,39 etp10 +Ethernet40 40,41,42,43 etp11 +Ethernet44 44,45,46,47 etp12 +Ethernet48 48,49,50,51 etp13 +Ethernet52 52,53,54,55 etp14 +Ethernet56 56,57,58,59 etp15 +Ethernet60 60,61,62,63 etp16 +Ethernet64 64,65,66,67 etp17 +Ethernet68 68,69,70,71 etp18 +Ethernet72 72,73,74,75 etp19 +Ethernet76 76,77,78,79 etp20 +Ethernet80 80,81,82,83 etp21 +Ethernet84 84,85,86,87 etp22 +Ethernet88 88,89,90,91 etp23 +Ethernet92 92,93,94,95 etp24 +Ethernet96 96,97,98,99 etp25 +Ethernet100 100,101,102,103 etp26 +Ethernet104 104,105,106,107 etp27 +Ethernet108 108,109,110,111 etp28 +Ethernet112 112,113,114,115 etp29 +Ethernet116 116,117,118,119 etp30 +Ethernet120 120,121,122,123 etp31 +Ethernet124 124,125,126,127 etp32 diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai.profile new file mode 100644 index 00000000000..696f3d8182f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700.xml diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai_2700.xml b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai_2700.xml new file mode 100644 index 00000000000..eedf359fb88 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai_2700.xml @@ -0,0 +1,246 @@ + + + + + + 00:02:03:04:05:00 + + + 1 + + + 32 + + + + + 1 + 4 + 16 + + + 3 + + + 98368 + + + 3 + 4 + 17 + 1 + 98368 + + + 5 + 4 + 18 + 3 + 98368 + + + 7 + 4 + 19 + 1 + 98368 + + + 9 + 4 + 20 + 3 + 98368 + + + 11 + 4 + 21 + 1 + 98368 + + + 13 + 4 + 22 + 3 + 98368 + + + 15 + 4 + 23 + 1 + 98368 + + + 17 + 4 + 24 + 3 + 98368 + + + 19 + 4 + 25 + 1 + 98368 + + + 21 + 4 + 26 + 3 + 98368 + + + 23 + 4 + 27 + 1 + 98368 + + + 25 + 4 + 28 + 3 + 98368 + + + 27 + 4 + 29 + 1 + 98368 + + + 29 + 4 + 30 + 3 + 98368 + + + 31 + 4 + 31 + 1 + 98368 + + + 33 + 4 + 14 + 3 + 98368 + + + 35 + 4 + 15 + 1 + 98368 + + + 37 + 4 + 12 + 3 + 98368 + + + 39 + 4 + 13 + 1 + 98368 + + + 41 + 4 + 10 + 3 + 98368 + + + 43 + 4 + 11 + 1 + 98368 + + + 45 + 4 + 8 + 3 + 98368 + + + 47 + 4 + 9 + 1 + 98368 + + + 49 + 4 + 6 + 3 + 98368 + + + 51 + 4 + 7 + 1 + 98368 + + + 53 + 4 + 4 + 3 + 98368 + + + 55 + 4 + 5 + 1 + 98368 + + + 57 + 4 + 2 + 3 + 98368 + + + 59 + 4 + 3 + 1 + 98368 + + + 61 + 4 + 0 + 3 + 98368 + + + 63 + 4 + 1 + 1 + 98368 + + + + diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700 new file mode 120000 index 00000000000..9f12504c7c5 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700 @@ -0,0 +1 @@ +ACS-MSN2700 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/buffers.json.j2 new file mode 120000 index 00000000000..30c4e1d5bfd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/buffers.json.j2 @@ -0,0 +1 @@ +../ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/buffers_defaults_t0.j2 new file mode 120000 index 00000000000..a722094938f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +../ACS-MSN2700/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/buffers_defaults_t1.j2 new file mode 120000 index 00000000000..b02d5e0194a --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +../ACS-MSN2700/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/pg_profile_lookup.ini new file mode 120000 index 00000000000..229a556f88a --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/pg_profile_lookup.ini @@ -0,0 +1 @@ +../ACS-MSN2700/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/port_config.ini b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/port_config.ini new file mode 100644 index 00000000000..345e6a20673 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/port_config.ini @@ -0,0 +1,37 @@ +# name lanes speed alias index +Ethernet0 0,1,2,3 100000 etp1 1 +Ethernet4 4,5,6,7 100000 etp2 2 +Ethernet8 8,9,10,11 100000 etp3 3 +Ethernet12 12,13,14,15 100000 etp4 4 +Ethernet16 16,17,18,19 100000 etp5 5 +Ethernet20 20,21,22,23 100000 etp6 6 +Ethernet24 24,25,26,27 100000 etp7 7 +Ethernet28 28,29,30,31 100000 etp8 8 +Ethernet32 32,33,34,35 100000 etp9 9 +Ethernet36 36,37,38,39 100000 etp10 10 +Ethernet40 40,41,42,43 100000 etp11 11 +Ethernet44 44,45,46,47 100000 etp12 12 +Ethernet48 48,49,50,51 100000 etp13 13 +Ethernet52 52,53,54,55 100000 etp14 14 +Ethernet56 56,57,58,59 100000 etp15 15 +Ethernet60 60,61,62,63 100000 etp16 16 +Ethernet64 64,65,66,67 100000 etp17 17 +Ethernet68 68,69,70,71 100000 etp18 18 +Ethernet72 72,73,74,75 100000 etp19 19 +Ethernet76 76,77,78,79 100000 etp20 20 +Ethernet80 80,81,82,83 100000 etp21 21 +Ethernet84 84,85,86,87 100000 etp22 22 +Ethernet88 88,89,90,91 100000 etp23 23 +Ethernet92 92,93,94,95 100000 etp24 24 +Ethernet96 96,97,98,99 100000 etp25 25 +Ethernet100 100,101,102,103 100000 etp26 26 +Ethernet104 104,105,106,107 100000 etp27 27 +Ethernet108 108,109,110,111 100000 etp28 28 +Ethernet112 112,113 50000 etp29a 29 +Ethernet114 114,115 50000 etp29b 29 +Ethernet116 116,117 50000 etp30a 30 +Ethernet118 118,119 50000 etp30b 30 +Ethernet120 120,121 50000 etp31a 31 +Ethernet122 122,123 50000 etp31b 31 +Ethernet124 124,125 50000 etp32a 32 +Ethernet126 126,127 50000 etp32b 32 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/qos.json.j2 new file mode 120000 index 00000000000..8bd2d26567b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/qos.json.j2 @@ -0,0 +1 @@ +../ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai.profile new file mode 100644 index 00000000000..cfeb4a5fa4b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700_8x50g_28x100g.xml diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai_2700_8x50g_28x100g.xml b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai_2700_8x50g_28x100g.xml new file mode 100644 index 00000000000..ee20db3e5dd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai_2700_8x50g_28x100g.xml @@ -0,0 +1,250 @@ + + + + + + 00:02:03:04:05:00 + + + 1 + + + 32 + + + + + 1 + 4 + 16 + + + 3 + + + 11534336 + + + 3 + 4 + 17 + 1 + 11534336 + + + 5 + 4 + 18 + 3 + 11534336 + + + 7 + 4 + 19 + 1 + 11534336 + + + 9 + 4 + 20 + 3 + 11534336 + + + 11 + 4 + 21 + 1 + 11534336 + + + 13 + 4 + 22 + 3 + 11534336 + + + 15 + 4 + 23 + 1 + 11534336 + + + 17 + 4 + 24 + 3 + 11534336 + + + 19 + 4 + 25 + 1 + 11534336 + + + 21 + 4 + 26 + 3 + 11534336 + + + 23 + 4 + 27 + 1 + 11534336 + + + 25 + 4 + 28 + 3 + 3221225472 + 2 + + + 27 + 4 + 29 + 1 + 3221225472 + 2 + + + 29 + 4 + 30 + 3 + 3221225472 + 2 + + + 31 + 4 + 31 + 1 + 3221225472 + 2 + + + 33 + 4 + 14 + 3 + 11534336 + + + 35 + 4 + 15 + 1 + 11534336 + + + 37 + 4 + 12 + 3 + 11534336 + + + 39 + 4 + 13 + 1 + 11534336 + + + 41 + 4 + 10 + 3 + 11534336 + + + 43 + 4 + 11 + 1 + 11534336 + + + 45 + 4 + 8 + 3 + 11534336 + + + 47 + 4 + 9 + 1 + 11534336 + + + 49 + 4 + 6 + 3 + 11534336 + + + 51 + 4 + 7 + 1 + 11534336 + + + 53 + 4 + 4 + 3 + 11534336 + + + 55 + 4 + 5 + 1 + 11534336 + + + 57 + 4 + 2 + 3 + 11534336 + + + 59 + 4 + 3 + 1 + 11534336 + + + 61 + 4 + 0 + 3 + 11534336 + + + 63 + 4 + 1 + 1 + 11534336 + + + + diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers.json.j2 new file mode 120000 index 00000000000..30c4e1d5bfd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers.json.j2 @@ -0,0 +1 @@ +../ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_t0.j2 new file mode 120000 index 00000000000..a722094938f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +../ACS-MSN2700/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_t1.j2 new file mode 120000 index 00000000000..b02d5e0194a --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +../ACS-MSN2700/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/pg_profile_lookup.ini new file mode 120000 index 00000000000..229a556f88a --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/pg_profile_lookup.ini @@ -0,0 +1 @@ +../ACS-MSN2700/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/port_config.ini b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/port_config.ini new file mode 100644 index 00000000000..9e01da79f44 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/port_config.ini @@ -0,0 +1,57 @@ +# name lanes speed alias index +Ethernet0 0,1 50000 etp1a 1 +Ethernet2 2,3 50000 etp1b 1 +Ethernet4 4,5 50000 etp2a 2 +Ethernet6 6,7 50000 etp2b 2 +Ethernet8 8,9 50000 etp3a 3 +Ethernet10 10,11 50000 etp3b 3 +Ethernet12 12,13 50000 etp4a 4 +Ethernet14 14,15 50000 etp4b 4 +Ethernet16 16,17 50000 etp5a 5 +Ethernet18 18,19 50000 etp5b 5 +Ethernet20 20,21 50000 etp6a 6 +Ethernet22 22,23 50000 etp6b 6 +Ethernet24 24,25,26,27 100000 etp7 7 +Ethernet28 28,29,30,31 100000 etp8 8 +Ethernet32 32,33,34,35 100000 etp9 9 +Ethernet36 36,37,38,39 100000 etp10 10 +Ethernet40 40,41 50000 etp11a 11 +Ethernet42 42,43 50000 etp11b 11 +Ethernet44 44,45 50000 etp12a 12 +Ethernet46 46,47 50000 etp12b 12 +Ethernet48 48,49 50000 etp13a 13 +Ethernet50 50,51 50000 etp13b 13 +Ethernet52 52,53 50000 etp14a 14 +Ethernet54 54,55 50000 etp14b 14 +Ethernet56 56,57 50000 etp15a 15 +Ethernet58 58,59 50000 etp15b 15 +Ethernet60 60,61 50000 etp16a 16 +Ethernet62 62,63 50000 etp16b 16 +Ethernet64 64,65 50000 etp17a 17 +Ethernet66 66,67 50000 etp17b 17 +Ethernet68 68,69 50000 etp18a 18 +Ethernet70 70,71 50000 etp18b 18 +Ethernet72 72,73 50000 etp19a 19 +Ethernet74 74,75 50000 etp19b 19 +Ethernet76 76,77 50000 etp20a 20 +Ethernet78 78,79 50000 etp20b 20 +Ethernet80 80,81 50000 etp21a 21 +Ethernet82 82,83 50000 etp21b 21 +Ethernet84 84,85 50000 etp22a 22 +Ethernet86 86,87 50000 etp22b 22 +Ethernet88 88,89,90,91 100000 etp23 23 +Ethernet92 92,93,94,95 100000 etp24 24 +Ethernet96 96,97,98,99 100000 etp25 25 +Ethernet100 100,101,102,103 100000 etp26 26 +Ethernet104 104,105 50000 etp27a 27 +Ethernet106 106,107 50000 etp27b 27 +Ethernet108 108,109 50000 etp28a 28 +Ethernet110 110,111 50000 etp28b 28 +Ethernet112 112,113 50000 etp29a 29 +Ethernet114 114,115 50000 etp29b 29 +Ethernet116 116,117 50000 etp30a 30 +Ethernet118 118,119 50000 etp30b 30 +Ethernet120 120,121 50000 etp31a 31 +Ethernet122 122,123 50000 etp31b 31 +Ethernet124 124,125 50000 etp32a 32 +Ethernet126 126,127 50000 etp32b 32 diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai.profile new file mode 100644 index 00000000000..bfbcb1e78f4 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700_48x50g_8x100g.xml diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai_2700_48x50g_8x100g.xml b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai_2700_48x50g_8x100g.xml new file mode 100644 index 00000000000..dccb606f743 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai_2700_48x50g_8x100g.xml @@ -0,0 +1,270 @@ + + + + + + 00:02:03:04:05:00 + + + 1 + + + 32 + + + + + 1 + 4 + 16 + + + 3 + + + 3221225472 + 2 + + + 3 + 4 + 17 + 1 + 3221225472 + 2 + + + 5 + 4 + 18 + 3 + 3221225472 + 2 + + + 7 + 4 + 19 + 1 + 3221225472 + 2 + + + 9 + 4 + 20 + 3 + 3221225472 + 2 + + + 11 + 4 + 21 + 1 + 3221225472 + 2 + + + 13 + 4 + 22 + 3 + 11534336 + + + 15 + 4 + 23 + 1 + 11534336 + + + 17 + 4 + 24 + 3 + 11534336 + + + 19 + 4 + 25 + 1 + 11534336 + + + 21 + 4 + 26 + 3 + 3221225472 + 2 + + + 23 + 4 + 27 + 1 + 3221225472 + 2> + + + 25 + 4 + 28 + 3 + 3221225472 + 2 + + + 27 + 4 + 29 + 1 + 3221225472 + 2 + + + 29 + 4 + 30 + 3 + 3221225472 + 2 + + + 31 + 4 + 31 + 1 + 3221225472 + 2 + + + 33 + 4 + 14 + 3 + 3221225472 + 2 + + + 35 + 4 + 15 + 1 + 3221225472 + 2 + + + 37 + 4 + 12 + 3 + 3221225472 + 2 + + + 39 + 4 + 13 + 1 + 3221225472 + 2 + + + 41 + 4 + 10 + 3 + 3221225472 + 2 + + + 43 + 4 + 11 + 1 + 3221225472 + 2 + + + 45 + 4 + 8 + 3 + 11534336 + + + 47 + 4 + 9 + 1 + 11534336 + + + 49 + 4 + 6 + 3 + 11534336 + + + 51 + 4 + 7 + 1 + 11534336 + + + 53 + 4 + 4 + 3 + 3221225472 + 2 + + + 55 + 4 + 5 + 1 + 3221225472 + 2 + + + 57 + 4 + 2 + 3 + 3221225472 + 2 + + + 59 + 4 + 3 + 1 + 3221225472 + 2 + + + 61 + 4 + 0 + 3 + 3221225472 + 2 + + + 63 + 4 + 1 + 1 + 3221225472 + 2 + + + + diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/default_sku b/device/mellanox/x86_64-mlnx_msn2700-r0/default_sku new file mode 100644 index 00000000000..bcce12890af --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/default_sku @@ -0,0 +1 @@ +Mellanox-SN2700 t1 diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn2700-r0/installer.conf new file mode 100644 index 00000000000..c9c9493a540 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/installer.conf @@ -0,0 +1 @@ +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=lax acpi=noirq" diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2700-r0/platform_reboot new file mode 100755 index 00000000000..28c5aedc4e3 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/platform_reboot @@ -0,0 +1,43 @@ +#!/bin/bash + +declare -r EXIT_SUCCESS="0" +declare -r EXIT_ERROR="1" + +declare -r FW_UPGRADE_SCRIPT="/usr/bin/mlnx-fw-upgrade.sh" +declare -r SYSFS_PWR_CYCLE="/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/pwr_cycle" + +FORCE_REBOOT="no" + +function ParseArguments() { + while [ $# -ge 1 ]; do + case "$1" in + -f|--force) + FORCE_REBOOT="yes" + ;; + esac + shift + done +} + +function SafePwrCycle() { + sync ; sync + umount -fa > /dev/null 2&>1 + echo 1 > $SYSFS_PWR_CYCLE + sleep 3 + echo 0 > $SYSFS_PWR_CYCLE +} + +ParseArguments "$@" + +${FW_UPGRADE_SCRIPT} --upgrade --verbose +EXIT_CODE="$?" +if [[ "${EXIT_CODE}" != "${EXIT_SUCCESS}" ]]; then + echo "Failed to burn MLNX FW: errno=${EXIT_CODE}" + + if [[ "${FORCE_REBOOT}" != "yes" ]]; then + echo "Reboot is interrupted: use -f|--force to override" + exit "${EXIT_ERROR}" + fi +fi + +SafePwrCycle diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/platform_wait b/device/mellanox/x86_64-mlnx_msn2700-r0/platform_wait new file mode 100755 index 00000000000..44321184dcc --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/platform_wait @@ -0,0 +1,40 @@ +#!/bin/bash + +declare -r EXIT_SUCCESS="0" +declare -r EXIT_TIMEOUT="1" + +declare -r QSFP_PATH="/var/run/hw-management/qsfp" + +function WaitForQsfpReady() { + local -r _QSFP_PATH="${1}" + + local -i _WDOG_CNT="1" + local -ir _WDOG_MAX="300" + + local -r _TIMEOUT="1s" + + while [[ "${_WDOG_CNT}" -le "${_WDOG_MAX}" ]]; do + for _QSFP in ${_QSFP_PATH}/qsfp*; do + if [[ -e "${_QSFP}" ]]; then + return "${EXIT_SUCCESS}" + fi + done + + let "_WDOG_CNT++" + sleep "${_TIMEOUT}" + done + + return "${EXIT_TIMEOUT}" +} + +echo "Wait for QSFP I2C interface is ready" + +WaitForQsfpReady "${QSFP_PATH}" +EXIT_CODE="$?" +if [[ "${EXIT_CODE}" != "${EXIT_SUCCESS}" ]]; then + echo "QSFP I2C interface is not ready: timeout" + exit "${EXIT_CODE}" +fi + +echo "QSFP I2C interface is ready: mlxsw_minimal has finished initialization" +exit "${EXIT_SUCCESS}" diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/eeprom.py b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/eeprom.py new file mode 100644 index 00000000000..63303c13a24 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/eeprom.py @@ -0,0 +1,62 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + import syslog + from cStringIO import StringIO + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +SYSLOG_IDENTIFIER = "eeprom.py" +EEPROM_SYMLINK = "/var/run/hw-management/eeprom/vpd_info" +CACHE_FILE = "/var/cache/sonic/decode-syseeprom/syseeprom_cache" + +def log_error(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_ERR, msg) + syslog.closelog() + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + _TLV_INFO_MAX_LEN = 256 + RETRIES = 5 + + def __init__(self, name, path, cpld_root, ro): + for attempt in range(self.RETRIES): + if not os.path.islink(EEPROM_SYMLINK): + time.sleep(1) + else: + break + + if not (os.path.exists(EEPROM_SYMLINK) or os.path.isfile(CACHE_FILE)): + log_error("Nowhere to read syseeprom from! No symlink or cache file found") + raise RuntimeError("No syseeprom symlink or cache file found") + + self.eeprom_path = EEPROM_SYMLINK + super(board, self).__init__(self.eeprom_path, 0, '', True) + + def decode_eeprom(self, e): + original_stdout = sys.stdout + sys.stdout = StringIO() + eeprom_tlvinfo.TlvInfoDecoder.decode_eeprom(self, e) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + print(decode_output.replace('\0', '')) diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/psuutil.py b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/psuutil.py new file mode 100644 index 00000000000..f3cce52b12a --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/psuutil.py @@ -0,0 +1,74 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/var/run/hw-management/thermal/" + self.psu_presence = "psu{}_status" + self.psu_oper_status = "psu{}_pwr_status" + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path + self.psu_oper_status.format(index), 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path + self.psu_presence.format(index), 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py new file mode 100644 index 00000000000..170766e9bce --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py @@ -0,0 +1,43 @@ +#!/usr/bin/env python + +import sys, errno +import os +from python_sdk_api.sxd_api import * +from python_sdk_api.sx_api import * + +# Check if SFP port number is provided +if len(sys.argv) < 2: + print "SFP module number is missed." + print "Usage: sfplpmget.py " + sys.exit(errno.EINVAL) + +# Init SDK API +rc, handle = sx_api_open(None) +if (rc != SX_STATUS_SUCCESS): + print "Failed to open api handle.\nPlease check that SDK is running." + sys.exit(errno.EACCES) + +pid = os.getpid() +rc = sxd_access_reg_init(pid, None, 0) +if (rc != 0): + print "Failed to initializing register access.\nPlease check that SDK is running." + sys.exit(errno.EACCES) + +# Get SFP module number +sfp_module = int(sys.argv[1]) + +# Get MCION +mcion = ku_mcion_reg() +mcion.module = sfp_module +meta = sxd_reg_meta_t() +meta.dev_id = 1 +meta.swid = 0 +meta.access_cmd = SXD_ACCESS_CMD_GET + +rc = sxd_access_reg_mcion(mcion, meta, 1, None, None) +assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_mcion failed, rc = %d" % rc + +# Get low power mode status +lpm_mask = 1 << 8 +lpm_status = (lpm_mask & mcion.module_status_bits) != 0 +print "LPM ON" if lpm_status else "LPM OFF" diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py new file mode 100644 index 00000000000..c11675766d3 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py @@ -0,0 +1,163 @@ +#!/usr/bin/env python + +import sys, errno +import os +from python_sdk_api.sxd_api import * +from python_sdk_api.sx_api import * + +REGISTER_NUM = 1 +SXD_LOG_VERBOSITY_LEVEL = 0 +DEVICE_ID = 1 +SWITCH_ID = 0 +SX_PORT_ATTR_ARR_SIZE = 64 + +PMAOS_ASE = 1 +PMAOS_EE = 1 +PMAOS_E = 2 +PMAOS_RST = 0 +PMAOS_ENABLE = 1 +PMAOS_DISABLE = 2 + +PORT_TYPE_NVE = 8 +PORT_TYPE_OFFSET = 28 +PORT_TYPE_MASK = 0xF0000000 +NVE_MASK = PORT_TYPE_MASK & (PORT_TYPE_NVE << PORT_TYPE_OFFSET) + +def is_nve(port): + return (port & NVE_MASK) != 0 + +def is_port_admin_status_up(log_port): + oper_state_p = new_sx_port_oper_state_t_p() + admin_state_p = new_sx_port_admin_state_t_p() + module_state_p = new_sx_port_module_state_t_p() + rc = sx_api_port_state_get(handle, log_port, oper_state_p, admin_state_p, module_state_p) + assert rc == SXD_STATUS_SUCCESS, "sx_api_port_state_get failed, rc = %d" % rc + + admin_state = sx_port_admin_state_t_p_value(admin_state_p) + if admin_state == SX_PORT_ADMIN_STATUS_UP: + return True + else: + return False + +def set_port_admin_status_by_log_port(handle, log_port, admin_status): + rc = sx_api_port_state_set(handle, log_port, admin_status) + assert rc == SX_STATUS_SUCCESS, "sx_api_port_state_set failed, rc = %d" % rc + +# Get all the ports related to the sfp, if port admin status is up, put it to list +def get_log_ports(handle, sfp_module): + port_attributes_list = new_sx_port_attributes_t_arr(SX_PORT_ATTR_ARR_SIZE) + port_cnt_p = new_uint32_t_p() + uint32_t_p_assign(port_cnt_p, SX_PORT_ATTR_ARR_SIZE) + + rc = sx_api_port_device_get(handle, DEVICE_ID , SWITCH_ID, port_attributes_list, port_cnt_p) + assert rc == SX_STATUS_SUCCESS, "sx_api_port_device_get failed, rc = %d" % rc + + port_cnt = uint32_t_p_value(port_cnt_p) + log_port_list = [] + for i in range(0, port_cnt): + port_attributes = sx_port_attributes_t_arr_getitem(port_attributes_list, i) + if is_nve(int(port_attributes.log_port)) == False \ + and port_attributes.port_mapping.module_port == sfp_module \ + and is_port_admin_status_up(port_attributes.log_port): + log_port_list.append(port_attributes.log_port) + + return log_port_list + +def init_sx_meta_data(): + meta = sxd_reg_meta_t() + meta.dev_id = DEVICE_ID + meta.swid = SWITCH_ID + return meta + +def set_sfp_admin_status(sfp_module, admin_status): + # Get PMAOS + pmaos = ku_pmaos_reg() + pmaos.module = sfp_module + meta = init_sx_meta_data() + meta.access_cmd = SXD_ACCESS_CMD_GET + rc = sxd_access_reg_pmaos(pmaos, meta, REGISTER_NUM, None, None) + assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmaos failed, rc = %d" % rc + + # Set admin status to PMAOS + pmaos.ase = PMAOS_ASE + pmaos.ee = PMAOS_EE + pmaos.e = PMAOS_E + pmaos.rst = PMAOS_RST + if admin_status == SX_PORT_ADMIN_STATUS_DOWN: + pmaos.admin_status = PMAOS_DISABLE + else: + pmaos.admin_status = PMAOS_ENABLE + + meta.access_cmd = SXD_ACCESS_CMD_SET + rc = sxd_access_reg_pmaos(pmaos, meta, REGISTER_NUM, None, None) + assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmaos failed, rc = %d" % rc + +def set_sfp_lpmode(sfp_module, lpm_enable): + # Get PMMP + pmmp = ku_pmmp_reg() + pmmp.module = sfp_module + meta = init_sx_meta_data() + meta.access_cmd = SXD_ACCESS_CMD_GET + rc = sxd_access_reg_pmmp(pmmp, meta, REGISTER_NUM, None, None) + assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmmp failed, rc = %d" % rc + + # Set low power mode status + lpm_mask = 1 << 8 + if lpm_enable: + pmmp.eeprom_override = pmmp.eeprom_override | lpm_mask + else: + pmmp.eeprom_override = pmmp.eeprom_override & (~lpm_mask) + + meta.access_cmd = SXD_ACCESS_CMD_SET + rc = sxd_access_reg_pmmp(pmmp, meta, REGISTER_NUM, None, None) + assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmmp failed, rc = %d" % rc + +# Check if SFP port number is provided +if len(sys.argv) < 3: + print "SFP module number or LPM is missed." + print "Usage: sfplpmset.py " + sys.exit(errno.EINVAL) + +lpm_enable = None +if sys.argv[2] == 'on': + lpm_enable = True +elif sys.argv[2] == 'off': + lpm_enable = False +else: + print "Unrecognized LPM parameter. Please use or values" + sys.exit(errno.EINVAL) + +# Init SDK API +rc, handle = sx_api_open(None) +if (rc != SX_STATUS_SUCCESS): + print "Failed to open api handle.\nPlease check that SDK is running." + sys.exit(errno.EACCES) + +pid = os.getpid() +rc = sxd_access_reg_init(pid, None, SXD_LOG_VERBOSITY_LEVEL) +if (rc != SXD_STATUS_SUCCESS): + print "Failed to initializing register access.\nPlease check that SDK is running." + sys.exit(errno.EACCES); + +# Get SFP module +sfp_module = int(sys.argv[1]) + +# Get all ports at admin up status that related to the SFP module +log_port_list = get_log_ports(handle, sfp_module) + +# SET SFP related ports to admin down status +for log_port in log_port_list: + set_port_admin_status_by_log_port(handle, log_port, SX_PORT_ADMIN_STATUS_DOWN) + +# Disable admin status before LPM settings +set_sfp_admin_status(sfp_module, SX_PORT_ADMIN_STATUS_DOWN) + +# Set low power mode status +set_sfp_lpmode(sfp_module, lpm_enable) + +# Enable admin status after LPM settings +set_sfp_admin_status(sfp_module, SX_PORT_ADMIN_STATUS_UP) + +# SET SFP related ports to admin up status +for log_port in log_port_list: + set_port_admin_status_by_log_port(handle, log_port, SX_PORT_ADMIN_STATUS_UP) diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfpreset.py b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfpreset.py new file mode 100644 index 00000000000..69fa2be614c --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfpreset.py @@ -0,0 +1,45 @@ +#!/usr/bin/env python + +import sys, errno +import os +from python_sdk_api.sxd_api import * +from python_sdk_api.sx_api import * + +# Check if SFP port number is provided +if len(sys.argv) < 2: + print "SFP module number or LPM is missed." + print "Usage: sfpreset.py " + sys.exit(errno.EINVAL) + +# Init SDK API +rc, handle = sx_api_open(None) +if (rc != SX_STATUS_SUCCESS): + print "Failed to open api handle.\nPlease check that SDK is running." + sys.exit(errno.EACCES) + +pid = os.getpid() +rc = sxd_access_reg_init(pid, None, 0) +if (rc != 0): + print "Failed to initializing register access.\nPlease check that SDK is running." + sys.exit(errno.EACCES) + +# Get SFP module number +sfp_module = int(sys.argv[1]) + +# Get PMAOS +pmaos = ku_pmaos_reg() +pmaos.module = sfp_module +meta = sxd_reg_meta_t() +meta.dev_id = 1 +meta.swid = 0 +meta.access_cmd = SXD_ACCESS_CMD_GET + +rc = sxd_access_reg_pmaos(pmaos, meta, 1, None, None) +assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmaos failed, rc = %d" % rc + +# Reset SFP +pmaos.rst = 1 +meta.access_cmd = SXD_ACCESS_CMD_SET +rc = sxd_access_reg_pmaos(pmaos, meta, 1, None, None) +assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmaos failed, rc = %d" % rc +print "Reset flag is set" diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py new file mode 100644 index 00000000000..e41ac2924da --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py @@ -0,0 +1,663 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import subprocess + from sonic_sfp.sfputilbase import * + import syslog +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +# sfp supports dom +XCVR_DOM_CAPABILITY_DOM_SUPPORT_BIT = 0x40 + +# sfp module threshold offset and width +SFP_MODULE_THRESHOLD_OFFSET = 0 +SFP_MODULE_THRESHOLD_WIDTH = 56 + +# I2C page size for sfp +SFP_I2C_PAGE_SIZE = 256 + +# parameters for DB connection +REDIS_HOSTNAME = "localhost" +REDIS_PORT = 6379 +REDIS_TIMEOUT_USECS = 0 + +# parameters for SFP presence +SFP_STATUS_INSERTED = '1' + +# system level event/error +EVENT_ON_ALL_SFP = '-1' +SYSTEM_NOT_READY = 'system_not_ready' +SYSTEM_READY = 'system_become_ready' +SYSTEM_FAIL = 'system_fail' + +GET_HWSKU_CMD = "sonic-cfggen -d -v DEVICE_METADATA.localhost.hwsku" + +# Ethernet <=> sfp +SFP_PORT_NAME_OFFSET = 1 +SFP_PORT_NAME_CONVENTION = "sfp{}" + +# magic code defnition for port number, qsfp port position of each hwsku +# port_position_tuple = (PORT_START, QSFP_PORT_START, PORT_END, PORT_IN_BLOCK, EEPROM_OFFSET) +hwsku_dict = {'ACS-MSN2700': 0, 'Mellanox-SN2700': 0, 'Mellanox-SN2700-D48C8': 0, "LS-SN2700":0, 'ACS-MSN2740': 0, 'ACS-MSN2100': 1, 'ACS-MSN2410': 2, 'ACS-MSN2010': 3, 'ACS-MSN3700': 0, 'ACS-MSN3700C': 0, 'ACS-MSN3800': 4} +port_position_tuple_list = [(0, 0, 31, 32, 1), (0, 0, 15, 16, 1), (0, 48, 55, 56, 1), (0, 18, 21, 22, 1), (0, 0, 63, 64, 1)] + +def log_info(msg, also_print_to_console=False): + syslog.openlog("sfputil") + syslog.syslog(syslog.LOG_INFO, msg) + syslog.closelog() + +def log_err(msg, also_print_to_console=False): + syslog.openlog("sfputil") + syslog.syslog(syslog.LOG_ERR, msg) + syslog.closelog() + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + PORT_START = 0 + QSFP_PORT_START = 0 + PORT_END = 0 + PORTS_IN_BLOCK = 0 + EEPROM_OFFSET = 0 + + db_sel = None + db_sel_timeout = None + db_sel_object = None + db_sel_tbl = None + state_db = None + sfpd_status_tbl = None + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + print "dependency on sysfs has been removed" + raise Exception() + + def get_port_position_tuple_by_sku_name(self): + p = subprocess.Popen(GET_HWSKU_CMD, shell=True, stdout=subprocess.PIPE) + out, err = p.communicate() + position_tuple = port_position_tuple_list[hwsku_dict[out.rstrip('\n')]] + return position_tuple + + def __init__(self): + port_position_tuple = self.get_port_position_tuple_by_sku_name() + self.PORT_START = port_position_tuple[0] + self.QSFP_PORT_START = port_position_tuple[1] + self.PORT_END = port_position_tuple[2] + self.PORTS_IN_BLOCK = port_position_tuple[3] + self.EEPROM_OFFSET = port_position_tuple[4] + self.mlnx_sfpd_started = False + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + presence = False + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return presence + + port_num += SFP_PORT_NAME_OFFSET + sfpname = SFP_PORT_NAME_CONVENTION.format(port_num) + + ethtool_cmd = "ethtool -m {} 2>/dev/null".format(sfpname) + try: + proc = subprocess.Popen(ethtool_cmd, stdout=subprocess.PIPE, shell=True, stderr=subprocess.STDOUT) + stdout = proc.communicate()[0] + proc.wait() + result = stdout.rstrip('\n') + if result != '': + presence = True + + except OSError, e: + return presence + + return presence + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + lpm_cmd = "docker exec syncd python /usr/share/sonic/platform/plugins/sfplpmget.py {}".format(port_num) + + try: + output = subprocess.check_output(lpm_cmd, shell=True) + if 'LPM ON' in output: + return True + except subprocess.CalledProcessError as e: + print "Error! Unable to get LPM for {}, rc = {}, err msg: {}".format(port_num, e.returncode, e.output) + return False + + return False + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + curr_lpmode = self.get_low_power_mode(port_num) + if curr_lpmode == lpmode: + return True + + # Compose LPM command + lpm = 'on' if lpmode else 'off' + lpm_cmd = "docker exec syncd python /usr/share/sonic/platform/plugins/sfplpmset.py {} {}".format(port_num, lpm) + + # Set LPM + try: + subprocess.check_output(lpm_cmd, shell=True) + except subprocess.CalledProcessError as e: + print "Error! Unable to set LPM for {}, rc = {}, err msg: {}".format(port_num, e.returncode, e.output) + return False + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + lpm_cmd = "docker exec syncd python /usr/share/sonic/platform/plugins/sfpreset.py {}".format(port_num) + + try: + subprocess.check_output(lpm_cmd, shell=True) + return True + except subprocess.CalledProcessError as e: + print "Error! Unable to set LPM for {}, rc = {}, err msg: {}".format(port_num, e.returncode, e.output) + return False + + return False + + def get_transceiver_change_event(self, timeout=0): + phy_port_dict = {} + status = True + + if self.db_sel == None: + from swsscommon import swsscommon + self.state_db = swsscommon.DBConnector(swsscommon.STATE_DB, + REDIS_HOSTNAME, + REDIS_PORT, + REDIS_TIMEOUT_USECS) + + # Subscribe to state table for SFP change notifications + self.db_sel = swsscommon.Select() + self.db_sel_tbl = swsscommon.NotificationConsumer(self.state_db, 'TRANSCEIVER_NOTIFY') + self.db_sel.addSelectable(self.db_sel_tbl) + self.db_sel_timeout = swsscommon.Select.TIMEOUT + self.db_sel_object = swsscommon.Select.OBJECT + self.sfpd_status_tbl = swsscommon.Table(self.state_db, 'MLNX_SFPD_TASK') + + # Check the liveness of mlnx-sfpd, if it failed, return system_fail event + # If mlnx-sfpd not started, return system_not_ready event + keys = self.sfpd_status_tbl.getKeys() + if 'LIVENESS' not in keys: + if self.mlnx_sfpd_started: + log_err("mlnx-sfpd exited, return false to notify xcvrd.") + phy_port_dict[EVENT_ON_ALL_SFP] = SYSTEM_FAIL + return False, phy_port_dict + else: + log_info("mlnx-sfpd not ready, return false to notify xcvrd.") + phy_port_dict[EVENT_ON_ALL_SFP] = SYSTEM_NOT_READY + return False, phy_port_dict + else: + if not self.mlnx_sfpd_started: + self.mlnx_sfpd_started = True + log_info("mlnx-sfpd is running") + phy_port_dict[EVENT_ON_ALL_SFP] = SYSTEM_READY + return False, phy_port_dict + + if timeout: + (state, c) = self.db_sel.select(timeout) + else: + (state, c) = self.db_sel.select() + + if state == self.db_sel_timeout: + status = True + elif state != self.db_sel_object: + status = False + else: + (key, op, fvp) = self.db_sel_tbl.pop() + phy_port_dict[key] = op + + return status, phy_port_dict + + def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes): + print("_read_eeprom_specific_bytes should not be called since the sysfs it dependents on will no longer exist.") + print("_read_eeprom_specific_bytes_via_ethtool should be called instead") + raise Exception() + + # Read out any bytes from any offset + def _read_eeprom_specific_bytes_via_ethtool(self, port_num, offset, num_bytes): + port_num += SFP_PORT_NAME_OFFSET + sfpname = SFP_PORT_NAME_CONVENTION.format(port_num) + + eeprom_raw = [] + ethtool_cmd = "ethtool -m {} hex on offset {} length {}".format(sfpname, offset, num_bytes) + try: + output = subprocess.check_output(ethtool_cmd, shell=True) + output_lines = output.splitlines() + first_line_raw = output_lines[0] + if "Offset" in first_line_raw: + for line in output_lines[2:]: + line_split = line.split() + eeprom_raw = eeprom_raw + line_split[1:] + except subprocess.CalledProcessError as e: + return None + + return eeprom_raw + + # Read eeprom + def _read_eeprom_devid(self, port_num, devid, offset, num_bytes = 512): + if port_num in self.osfp_ports: + pass + elif port_num in self.qsfp_ports: + pass + elif (self.DOM_EEPROM_ADDR == devid): + offset += 256 + + eeprom_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, offset, num_bytes) + + return eeprom_raw + + # Read out SFP type, vendor name, PN, REV, SN from eeprom. + def get_transceiver_info_dict(self, port_num): + transceiver_info_dict = {} + compliance_code_dict = {} + + # ToDo: OSFP tranceiver info parsing not fully supported. + # in inf8628.py lack of some memory map definition + # will be implemented when the inf8628 memory map ready + if port_num in self.osfp_ports: + offset = 0 + vendor_rev_width = XCVR_HW_REV_WIDTH_OSFP + + sfpi_obj = inf8628InterfaceId() + if sfpi_obj is None: + print("Error: sfp_object open failed") + return None + + sfp_type_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + OSFP_TYPE_OFFSET), XCVR_TYPE_WIDTH) + if sfp_type_raw is not None: + sfp_type_data = sfpi_obj.parse_sfp_type(sfp_type_raw, 0) + else: + return None + + sfp_vendor_name_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + OSFP_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + if sfp_vendor_name_raw is not None: + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) + else: + return None + + sfp_vendor_pn_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + OSFP_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + if sfp_vendor_pn_raw is not None: + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) + else: + return None + + sfp_vendor_rev_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + OSFP_HW_REV_OFFSET), vendor_rev_width) + if sfp_vendor_rev_raw is not None: + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) + else: + return None + + sfp_vendor_sn_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + OSFP_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + if sfp_vendor_sn_raw is not None: + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) + else: + return None + + transceiver_info_dict['type'] = sfp_type_data['data']['type']['value'] + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] + # Below part is added to avoid fail the xcvrd, shall be implemented later + transceiver_info_dict['vendor_oui'] = 'N/A' + transceiver_info_dict['vendor_date'] = 'N/A' + transceiver_info_dict['Connector'] = 'N/A' + transceiver_info_dict['encoding'] = 'N/A' + transceiver_info_dict['ext_identifier'] = 'N/A' + transceiver_info_dict['ext_rateselect_compliance'] = 'N/A' + transceiver_info_dict['cable_type'] = 'N/A' + transceiver_info_dict['cable_length'] = 'N/A' + transceiver_info_dict['specification_compliance'] = 'N/A' + transceiver_info_dict['nominal_bit_rate'] = 'N/A' + + else: + if port_num in self.qsfp_ports: + offset = 128 + vendor_rev_width = XCVR_HW_REV_WIDTH_QSFP + cable_length_width = XCVR_CABLE_LENGTH_WIDTH_QSFP + interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_QSFP + sfp_type = 'QSFP' + + sfpi_obj = sff8436InterfaceId() + if sfpi_obj is None: + print("Error: sfp_object open failed") + return None + + else: + offset = 0 + vendor_rev_width = XCVR_HW_REV_WIDTH_SFP + cable_length_width = XCVR_CABLE_LENGTH_WIDTH_SFP + interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_SFP + sfp_type = 'SFP' + + sfpi_obj = sff8472InterfaceId() + if sfpi_obj is None: + print("Error: sfp_object open failed") + return None + + sfp_interface_bulk_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + XCVR_INTFACE_BULK_OFFSET), interface_info_bulk_width) + if sfp_interface_bulk_raw is not None: + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw, 0) + else: + return None + + sfp_vendor_name_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + if sfp_vendor_name_raw is not None: + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) + else: + return None + + sfp_vendor_pn_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + if sfp_vendor_pn_raw is not None: + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) + else: + return None + + sfp_vendor_rev_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + XCVR_HW_REV_OFFSET), vendor_rev_width) + if sfp_vendor_rev_raw is not None: + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) + else: + return None + + sfp_vendor_sn_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + if sfp_vendor_sn_raw is not None: + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) + else: + return None + + sfp_vendor_oui_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) + if sfp_vendor_oui_raw is not None: + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_vendor_oui_raw, 0) + else: + return None + + sfp_vendor_date_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) + if sfp_vendor_date_raw is not None: + sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_vendor_date_raw, 0) + else: + return None + + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + if sfp_type == 'QSFP': + for key in qsfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + + for key in qsfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value']) + else: + for key in sfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + + for key in sfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['NominalSignallingRate(UnitsOf100Mbd)']['value']) + + return transceiver_info_dict + + def get_transceiver_dom_info_dict(self, port_num): + transceiver_dom_info_dict = {} + + # Below part is added to avoid failing xcvrd + # Currently, the way in which dom data is read has been changed from + # using sysfs to using ethtool. + # The ethtool returns None for ports without dom support, resulting in + # None being returned. However, this fails xcvrd to add the + # TRANSCEIVER_DOM_SENSOR table entry of associated port to CONFIG_DB + # and then causes SNMP fail. + # To address this issue a default dict is initialized with all data set to + # 'N/A' and is returned is the above case. + # BTW, in the original implementation which sysfs is used to read dom data, + # even though non-None data is returned for ports without dom support, + # it does not contain valid data. This can result in wrong data in + # TRANSCEIVER_DOM_SENSOR table. + transceiver_dom_info_dict['temperature'] = 'N/A' + transceiver_dom_info_dict['voltage'] = 'N/A' + transceiver_dom_info_dict['rx1power'] = 'N/A' + transceiver_dom_info_dict['rx2power'] = 'N/A' + transceiver_dom_info_dict['rx3power'] = 'N/A' + transceiver_dom_info_dict['rx4power'] = 'N/A' + transceiver_dom_info_dict['tx1bias'] = 'N/A' + transceiver_dom_info_dict['tx2bias'] = 'N/A' + transceiver_dom_info_dict['tx3bias'] = 'N/A' + transceiver_dom_info_dict['tx4bias'] = 'N/A' + transceiver_dom_info_dict['tx1power'] = 'N/A' + transceiver_dom_info_dict['tx2power'] = 'N/A' + transceiver_dom_info_dict['tx3power'] = 'N/A' + transceiver_dom_info_dict['tx4power'] = 'N/A' + + if port_num in self.osfp_ports: + pass + elif port_num in self.qsfp_ports: + offset = 0 + offset_xcvr = 128 + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + + sfpi_obj = sff8436InterfaceId() + if sfpi_obj is None: + return None + + + # QSFP capability byte parse, through this byte can know whether it support tx_power or not. + # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, + # need to add more code for determining the capability and version compliance + # in SFF-8636 dom capability definitions evolving with the versions. + qsfp_dom_capability_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset_xcvr + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) + if qsfp_dom_capability_raw is not None: + qspf_dom_capability_data = sfpi_obj.parse_qsfp_dom_capability(qsfp_dom_capability_raw, 0) + else: + return transceiver_dom_info_dict + + dom_temperature_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + else: + return transceiver_dom_info_dict + + dom_voltage_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + else: + return transceiver_dom_info_dict + + qsfp_dom_rev_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + QSFP_DOM_REV_OFFSET), QSFP_DOM_REV_WIDTH) + if qsfp_dom_rev_raw is not None: + qsfp_dom_rev_data = sfpd_obj.parse_sfp_dom_rev(qsfp_dom_rev_raw, 0) + else: + return transceiver_dom_info_dict + + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + # The tx_power monitoring is only available on QSFP which compliant with SFF-8636 + # and claimed that it support tx_power with one indicator bit. + dom_channel_monitor_data = {} + qsfp_dom_rev = qsfp_dom_rev_data['data']['dom_rev']['value'] + qsfp_tx_power_support = qspf_dom_capability_data['data']['Tx_power_support']['value'] + if (qsfp_dom_rev[0:8] != 'SFF-8636' or (qsfp_dom_rev[0:8] == 'SFF-8636' and qsfp_tx_power_support != 'on')): + dom_channel_monitor_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + else: + return transceiver_dom_info_dict + else: + dom_channel_monitor_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0) + else: + return transceiver_dom_info_dict + + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TX1Power']['value'] + transceiver_dom_info_dict['tx2power'] = dom_channel_monitor_data['data']['TX2Power']['value'] + transceiver_dom_info_dict['tx3power'] = dom_channel_monitor_data['data']['TX3Power']['value'] + transceiver_dom_info_dict['tx4power'] = dom_channel_monitor_data['data']['TX4Power']['value'] + + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RX1Power']['value'] + transceiver_dom_info_dict['rx2power'] = dom_channel_monitor_data['data']['RX2Power']['value'] + transceiver_dom_info_dict['rx3power'] = dom_channel_monitor_data['data']['RX3Power']['value'] + transceiver_dom_info_dict['rx4power'] = dom_channel_monitor_data['data']['RX4Power']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value'] + transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value'] + transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value'] + transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value'] + + else: + offset = SFP_I2C_PAGE_SIZE + + eeprom_raw = ['0'] * SFP_I2C_PAGE_SIZE + eeprom_raw[XCVR_DOM_CAPABILITY_OFFSET : XCVR_DOM_CAPABILITY_OFFSET + XCVR_DOM_CAPABILITY_WIDTH] = \ + self._read_eeprom_specific_bytes_via_ethtool(port_num, XCVR_DOM_CAPABILITY_OFFSET, XCVR_DOM_CAPABILITY_WIDTH) + sfp_obj = sff8472InterfaceId() + calibration_type = sfp_obj._get_calibration_type(eeprom_raw) + + dom_supported = (int(eeprom_raw[XCVR_DOM_CAPABILITY_OFFSET], 16) & XCVR_DOM_CAPABILITY_DOM_SUPPORT_BIT != 0) + if not dom_supported: + return transceiver_dom_info_dict + + eeprom_domraw = self._read_eeprom_specific_bytes_via_ethtool(port_num, offset, SFP_I2C_PAGE_SIZE) + if eeprom_domraw is None: + return transceiver_dom_info_dict + + sfpd_obj = sff8472Dom(None, calibration_type) + if sfpd_obj is None: + print "no sff8472Dom" + return None + + dom_temperature_raw = eeprom_domraw[SFP_TEMPE_OFFSET:SFP_TEMPE_OFFSET+SFP_TEMPE_WIDTH] + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + + dom_voltage_raw = eeprom_domraw[SFP_VOLT_OFFSET:SFP_VOLT_OFFSET+SFP_VOLT_WIDTH] + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + + dom_channel_monitor_raw = eeprom_domraw[SFP_CHANNL_MON_OFFSET:SFP_CHANNL_MON_OFFSET+SFP_CHANNL_MON_WIDTH] + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RXPower']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TXBias']['value'] + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TXPower']['value'] + + return transceiver_dom_info_dict + + def get_transceiver_dom_threshold_info_dict(self, port_num): + transceiver_dom_threshold_info_dict = {} + + dom_info_dict_keys = ['temphighalarm', 'temphighwarning', + 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', + 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', + 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', + 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', + 'txbiaslowalarm', 'txbiaslowwarning' + ] + transceiver_dom_threshold_info_dict = dict.fromkeys(dom_info_dict_keys, 'N/A') + + if port_num in self.qsfp_ports: + # current we don't support qsfp since threshold data is on page 3 and the way to read this page is under discussion. + return transceiver_dom_threshold_info_dict + else: + offset = SFP_I2C_PAGE_SIZE + + eeprom_raw = ['0'] * SFP_I2C_PAGE_SIZE + eeprom_raw[XCVR_DOM_CAPABILITY_OFFSET : XCVR_DOM_CAPABILITY_OFFSET + XCVR_DOM_CAPABILITY_WIDTH] = \ + self._read_eeprom_specific_bytes_via_ethtool(port_num, XCVR_DOM_CAPABILITY_OFFSET, XCVR_DOM_CAPABILITY_WIDTH) + sfp_obj = sff8472InterfaceId() + calibration_type = sfp_obj._get_calibration_type(eeprom_raw) + + dom_supported = (int(eeprom_raw[XCVR_DOM_CAPABILITY_OFFSET], 16) & XCVR_DOM_CAPABILITY_DOM_SUPPORT_BIT != 0) + if not dom_supported: + return transceiver_dom_threshold_info_dict + + sfpd_obj = sff8472Dom(None, calibration_type) + if sfpd_obj is None: + return transceiver_dom_threshold_info_dict + + dom_module_threshold_raw = self._read_eeprom_specific_bytes_via_ethtool(port_num, + (offset + SFP_MODULE_THRESHOLD_OFFSET), + SFP_MODULE_THRESHOLD_WIDTH) + if dom_module_threshold_raw is not None: + dom_module_threshold_data = sfpd_obj.parse_alarm_warning_threshold(dom_module_threshold_raw, 0) + else: + return transceiver_dom_threshold_info_dict + + # Threshold Data + transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] + transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] + transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] + transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] + transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VoltageHighAlarm']['value'] + transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VoltageLowAlarm']['value'] + transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VoltageHighWarning']['value'] + transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VoltageLowWarning']['value'] + transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_module_threshold_data['data']['BiasHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_module_threshold_data['data']['BiasLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_module_threshold_data['data']['BiasHighWarning']['value'] + transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_module_threshold_data['data']['BiasLowWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_module_threshold_data['data']['TXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_module_threshold_data['data']['TXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_module_threshold_data['data']['TXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_module_threshold_data['data']['TXPowerLowWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_module_threshold_data['data']['RXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_module_threshold_data['data']['RXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_module_threshold_data['data']['RXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_module_threshold_data['data']['RXPowerLowWarning']['value'] + + return transceiver_dom_threshold_info_dict diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..44bad649422 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true +} + diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2700-r0/sensors.conf new file mode 100644 index 00000000000..247db54f99d --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/sensors.conf @@ -0,0 +1,95 @@ +bus "i2c-7" "i2c-1-mux (chan_id 5)" +chip "lm75-i2c-7-4a" + label temp1 "Ambient Port Temp" + +bus "i2c-5" "i2c-1-mux (chan_id 3)" +chip "ucd9200-i2c-5-27" + label in1 "UCD1 vin" + label in2 "ASIC 3.3 vout" + label in3 "ASIC 1.2 vout" + label temp1 "UCD1 Temp" + label temp2 "UCD1 Temp2" + +chip "ucd9200-i2c-5-41" + label in1 "UCD2 vin" + label in2 "ASIC Vcore vout" + label temp1 "UCD2 Temp1" + label temp2 "UCD2 Temp2" + +bus "i2c-17" "i2c-1-mux (chan_id 7)" +chip "lm75-i2c-17-49" + label temp1 "Ambient Board Temp" + +chip "mlxsw-*" + ignore temp2 + ignore temp3 + ignore temp4 + ignore temp5 + ignore temp6 + ignore temp7 + ignore temp8 + ignore temp9 + ignore temp10 + ignore temp11 + ignore temp12 + ignore temp13 + ignore temp14 + ignore temp15 + ignore temp16 + ignore temp17 + ignore temp18 + ignore temp19 + ignore temp20 + ignore temp21 + ignore temp22 + ignore temp23 + ignore temp24 + ignore temp25 + ignore temp26 + ignore temp27 + ignore temp28 + ignore temp29 + ignore temp30 + ignore temp31 + ignore temp32 + ignore temp33 + ignore temp34 + ignore temp35 + ignore temp36 + ignore temp37 + ignore temp38 + ignore temp39 + ignore temp40 + ignore temp41 + ignore temp42 + ignore temp43 + ignore temp44 + ignore temp45 + ignore temp46 + ignore temp47 + ignore temp48 + ignore temp49 + ignore temp50 + ignore temp51 + ignore temp52 + ignore temp53 + ignore temp54 + ignore temp55 + ignore temp56 + ignore temp57 + ignore temp58 + ignore temp59 + ignore temp60 + ignore temp61 + ignore temp62 + ignore temp63 + ignore temp64 + +chip "*-virtual-*" + ignore temp1 + ignore temp2 + +chip "dps460-*" + ignore fan2 + ignore fan3 + diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/ACS-MSN2700 b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/ACS-MSN2700 new file mode 120000 index 00000000000..929c10e08df --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/ACS-MSN2700 @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/ACS-MSN2700 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/Mellanox-SN2700 b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/Mellanox-SN2700 new file mode 120000 index 00000000000..c547b85a651 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/Mellanox-SN2700 @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/Mellanox-SN2700 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/Mellanox-SN2700-D48C8 b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/Mellanox-SN2700-D48C8 new file mode 120000 index 00000000000..0ecc644a629 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/Mellanox-SN2700-D48C8 @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/default_sku b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/default_sku new file mode 120000 index 00000000000..4efa67e398f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/default_sku @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/default_sku \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf new file mode 120000 index 00000000000..955db12ff42 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/installer.conf \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/platform_reboot new file mode 100755 index 00000000000..5b9809e1042 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/platform_reboot @@ -0,0 +1,21 @@ +#!/bin/bash + +declare -r EXIT_SUCCESS="0" +declare -r EXIT_ERROR="1" + +FORCE_REBOOT="no" + +function ParseArguments() { + while [ $# -ge 1 ]; do + case "$1" in + -f|--force) + FORCE_REBOOT="yes" + ;; + esac + shift + done +} + +ParseArguments "$@" + +exec /sbin/reboot $@ diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/plugins b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/plugins new file mode 120000 index 00000000000..2e583e688dc --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/plugins @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/plugins \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..40fc367acf3 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/pmon_daemon_control.json @@ -0,0 +1,5 @@ +{ + "skip_ledd": true, + "skip_xcvrd": true, + "skip_psud": true +} diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/syseeprom.hex b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/syseeprom.hex new file mode 100644 index 00000000000..3b1c3614173 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/syseeprom.hex @@ -0,0 +1,256 @@ +54 6c 76 49 6e 66 6f 00 01 02 0f 21 40 4d 53 4e +32 37 30 30 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 22 14 4d +53 4e 32 37 30 30 2d 43 53 32 46 4f 00 00 00 00 +00 00 00 23 18 4d 54 31 36 32 33 58 30 39 35 32 +32 00 00 00 00 00 00 00 00 00 00 00 00 24 06 7c +fe 90 f5 36 40 25 13 30 36 2f 31 30 2f 32 30 31 +36 20 30 31 3a 35 37 3a 33 31 26 01 00 2a 02 00 +80 2b 08 4d 65 6c 6c 61 6e 6f 78 fd 24 00 00 81 +19 00 16 01 01 03 6c 00 00 4d 4c 4e 58 02 01 0c +05 0e 02 10 06 00 00 00 00 00 00 00 00 00 00 00 +00 fd a4 00 00 81 19 00 92 00 03 01 62 00 00 4d +54 31 36 32 33 58 30 39 35 32 32 00 00 00 00 00 +00 00 00 00 00 00 00 4d 53 4e 32 37 30 30 2d 43 +53 32 46 4f 00 00 00 00 00 00 00 41 35 00 00 00 +79 0c a4 50 61 6e 74 68 65 72 20 45 74 68 20 31 +30 30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 50 00 00 00 0a 8c 4d 53 4e 32 37 +30 30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 fd 24 00 00 81 19 00 10 00 +03 05 e8 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 fd 24 00 +00 81 19 00 1e 00 11 02 55 00 00 0d 00 00 00 00 +00 00 00 7c fe 90 f5 36 40 00 80 7c fe 90 03 00 +f5 36 40 fd 24 00 00 81 19 00 12 00 01 06 85 00 +00 00 46 00 00 08 00 05 05 05 05 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 28 12 78 38 36 5f 36 +34 2d 6d 6c 6e 78 5f 78 38 36 2d 72 30 29 15 32 +30 31 38 2e 30 35 2d 35 2e 32 2e 30 30 30 34 2d +39 36 30 30 fe 04 89 d7 4c 56 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 29 20 35 2e 30 +2e 31 34 30 34 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 fe 04 12 +8a 61 b2 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 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+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/buffers_defaults_t0.j2 new file mode 120000 index 00000000000..7bcae62336f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/buffers_defaults_t1.j2 new file mode 120000 index 00000000000..a437d613434 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/pg_profile_lookup.ini new file mode 120000 index 00000000000..3c97f3dcb16 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/pg_profile_lookup.ini @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/port_config.ini b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/port_config.ini new file mode 100644 index 00000000000..816bb0e94a7 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/port_config.ini @@ -0,0 +1,33 @@ +# name lanes +Ethernet0 0,1,2,3 +Ethernet4 4,5,6,7 +Ethernet8 8,9,10,11 +Ethernet12 12,13,14,15 +Ethernet16 16,17,18,19 +Ethernet20 20,21,22,23 +Ethernet24 24,25,26,27 +Ethernet28 28,29,30,31 +Ethernet32 32,33,34,35 +Ethernet36 36,37,38,39 +Ethernet40 40,41,42,43 +Ethernet44 44,45,46,47 +Ethernet48 48,49,50,51 +Ethernet52 52,53,54,55 +Ethernet56 56,57,58,59 +Ethernet60 60,61,62,63 +Ethernet64 64,65,66,67 +Ethernet68 68,69,70,71 +Ethernet72 72,73,74,75 +Ethernet76 76,77,78,79 +Ethernet80 80,81,82,83 +Ethernet84 84,85,86,87 +Ethernet88 88,89,90,91 +Ethernet92 92,93,94,95 +Ethernet96 96,97,98,99 +Ethernet100 100,101,102,103 +Ethernet104 104,105,106,107 +Ethernet108 108,109,110,111 +Ethernet112 112,113,114,115 +Ethernet116 116,117,118,119 +Ethernet120 120,121,122,123 +Ethernet124 124,125,126,127 diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/qos.json.j2 new file mode 120000 index 00000000000..eccf286dc87 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/sai.profile b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/sai.profile new file mode 100644 index 00000000000..adaa280e6cd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2740.xml diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/sai_2740.xml b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/sai_2740.xml new file mode 100644 index 00000000000..559f2bdd10c --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/sai_2740.xml @@ -0,0 +1,243 @@ + + + + + + 00:02:03:04:05:00 + + + 32 + + + + + 1 + 4 + 16 + + + 3 + + + 98368 + + + 3 + 4 + 17 + 1 + 98368 + + + 5 + 4 + 18 + 3 + 98368 + + + 7 + 4 + 19 + 1 + 98368 + + + 9 + 4 + 20 + 3 + 98368 + + + 11 + 4 + 21 + 1 + 98368 + + + 13 + 4 + 22 + 3 + 98368 + + + 15 + 4 + 23 + 1 + 98368 + + + 17 + 4 + 24 + 3 + 98368 + + + 19 + 4 + 25 + 1 + 98368 + + + 21 + 4 + 26 + 3 + 98368 + + + 23 + 4 + 27 + 1 + 98368 + + + 25 + 4 + 28 + 3 + 98368 + + + 27 + 4 + 29 + 1 + 98368 + + + 29 + 4 + 30 + 3 + 98368 + + + 31 + 4 + 31 + 1 + 98368 + + + 33 + 4 + 14 + 3 + 98368 + + + 35 + 4 + 15 + 1 + 98368 + + + 37 + 4 + 12 + 3 + 98368 + + + 39 + 4 + 13 + 1 + 98368 + + + 41 + 4 + 10 + 3 + 98368 + + + 43 + 4 + 11 + 1 + 98368 + + + 45 + 4 + 8 + 3 + 98368 + + + 47 + 4 + 9 + 1 + 98368 + + + 49 + 4 + 6 + 3 + 98368 + + + 51 + 4 + 7 + 1 + 98368 + + + 53 + 4 + 4 + 3 + 98368 + + + 55 + 4 + 5 + 1 + 98368 + + + 57 + 4 + 2 + 3 + 98368 + + + 59 + 4 + 3 + 1 + 98368 + + + 61 + 4 + 0 + 3 + 98368 + + + 63 + 4 + 1 + 1 + 98368 + + + + diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/default_sku b/device/mellanox/x86_64-mlnx_msn2740-r0/default_sku new file mode 100644 index 00000000000..9641115a494 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/default_sku @@ -0,0 +1 @@ +ACS-MSN2740 t1 diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn2740-r0/installer.conf new file mode 120000 index 00000000000..955db12ff42 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/installer.conf @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/installer.conf \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2740-r0/platform_reboot new file mode 120000 index 00000000000..43c8ea56749 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/platform_reboot @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_reboot \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/platform_wait b/device/mellanox/x86_64-mlnx_msn2740-r0/platform_wait new file mode 120000 index 00000000000..4b30bd42985 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/platform_wait @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_wait \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/eeprom.py b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/eeprom.py new file mode 120000 index 00000000000..b4e2a6a6167 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/eeprom.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/eeprom.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/psuutil.py b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/psuutil.py new file mode 100644 index 00000000000..f3cce52b12a --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/psuutil.py @@ -0,0 +1,74 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/var/run/hw-management/thermal/" + self.psu_presence = "psu{}_status" + self.psu_oper_status = "psu{}_pwr_status" + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path + self.psu_oper_status.format(index), 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 1 + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path + self.psu_presence.format(index), 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 1 diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfplpmget.py new file mode 120000 index 00000000000..2e84f435abd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfplpmget.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfplpmset.py new file mode 120000 index 00000000000..6a88bac3046 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfplpmset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfpreset.py b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfpreset.py new file mode 120000 index 00000000000..fef2063e349 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfpreset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfpreset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfputil.py new file mode 120000 index 00000000000..45909b880fc --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfputil.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfputil.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn2740-r0/pmon_daemon_control.json new file mode 120000 index 00000000000..435a2ce7c0b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2740-r0/sensors.conf new file mode 120000 index 00000000000..ea04d66d008 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/sensors.conf @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/sensors.conf \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..d40bc03fbb5 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/buffers_defaults_t0.j2 @@ -0,0 +1,104 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '8224768' %} +{% set ingress_lossy_pool_size = '8224768' %} +{% set egress_lossless_pool_size = '35966016' %} +{% set egress_lossy_pool_size = '8224768' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"0" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_profile_lists(port_names) %} + "BUFFER_PORT_INGRESS_PROFILE_LIST": { +{% for port in port_names.split(',') %} + "{{ port }}": { + "profile_list" : "[BUFFER_PROFILE|ingress_lossless_profile],[BUFFER_PROFILE|ingress_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "BUFFER_PORT_EGRESS_PROFILE_LIST": { +{% for port in port_names.split(',') %} + "{{ port }}": { + "profile_list" : "[BUFFER_PROFILE|egress_lossless_profile],[BUFFER_PROFILE|egress_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { +{% for port in port_names.split(',') %} + "{{ port }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, +{% endfor %} +{% for port in port_names.split(',') %} + "{{ port }}|0-2": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + }, +{% endfor %} +{% for port in port_names.split(',') %} + "{{ port }}|5-6": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..fe8c27b9d36 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/buffers_defaults_t1.j2 @@ -0,0 +1,104 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '12042240' %} +{% set ingress_lossy_pool_size = '12042240' %} +{% set egress_lossless_pool_size = '35966016' %} +{% set egress_lossy_pool_size = '12042240' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"0" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_profile_lists(port_names) %} + "BUFFER_PORT_INGRESS_PROFILE_LIST": { +{% for port in port_names.split(',') %} + "{{ port }}": { + "profile_list" : "[BUFFER_PROFILE|ingress_lossless_profile],[BUFFER_PROFILE|ingress_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "BUFFER_PORT_EGRESS_PROFILE_LIST": { +{% for port in port_names.split(',') %} + "{{ port }}": { + "profile_list" : "[BUFFER_PROFILE|egress_lossless_profile],[BUFFER_PROFILE|egress_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { +{% for port in port_names.split(',') %} + "{{ port }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, +{% endfor %} +{% for port in port_names.split(',') %} + "{{ port }}|0-2": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + }, +{% endfor %} +{% for port in port_names.split(',') %} + "{{ port }}|5-6": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/pg_profile_lookup.ini new file mode 100644 index 00000000000..6cd06326cf3 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/pg_profile_lookup.ini @@ -0,0 +1,22 @@ +# speed cable size xon xoff threshold + 1000 5m 35840 18432 17408 0 + 10000 5m 36864 18432 18432 0 + 25000 5m 36864 18432 18432 0 + 40000 5m 36864 18432 18432 0 + 50000 5m 37888 18432 19456 0 + 100000 5m 38912 18432 20480 0 + 200000 5m 41984 18432 23552 0 + 1000 40m 36864 18432 18432 0 + 10000 40m 38912 18432 20480 0 + 25000 40m 41984 18432 23552 0 + 40000 40m 45056 18432 26624 0 + 50000 40m 47104 18432 28672 0 + 100000 40m 59392 18432 40960 0 + 200000 40m 81920 18432 63488 0 + 1000 300m 37888 18432 19456 0 + 10000 300m 53248 18432 34816 0 + 25000 300m 78848 18432 60416 0 + 40000 300m 104448 18432 86016 0 + 50000 300m 121856 18432 103424 0 + 100000 300m 206848 18432 188416 0 + 200000 300m 376832 18432 358400 0 diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/port_config.ini b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/port_config.ini new file mode 120000 index 00000000000..73505f3a0ba --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/port_config.ini @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/port_config.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/qos.json.j2 new file mode 120000 index 00000000000..eccf286dc87 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/sai.profile b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/sai.profile new file mode 100644 index 00000000000..4907e971a2d --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3700.xml diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/sai_3700.xml b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/sai_3700.xml new file mode 100644 index 00000000000..8f6c427888b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/sai_3700.xml @@ -0,0 +1,243 @@ + + + + + + 00:02:03:04:05:00 + + + 32 + + + + + 1 + 4 + 16 + + + 3 + + + 1536 + + + 5 + 4 + 17 + 3 + 1536 + + + 9 + 4 + 18 + 3 + 1536 + + + 13 + 4 + 19 + 3 + 1536 + + + 17 + 4 + 20 + 3 + 1536 + + + 21 + 4 + 21 + 3 + 1536 + + + 25 + 4 + 22 + 3 + 1536 + + + 29 + 4 + 23 + 3 + 1536 + + + 33 + 4 + 14 + 3 + 1536 + + + 37 + 4 + 15 + 3 + 1536 + + + 41 + 4 + 12 + 3 + 1536 + + + 45 + 4 + 13 + 3 + 1536 + + + 49 + 4 + 10 + 3 + 1536 + + + 53 + 4 + 11 + 3 + 1536 + + + 57 + 4 + 8 + 3 + 1536 + + + 61 + 4 + 9 + 3 + 1536 + + + 65 + 4 + 30 + 3 + 1536 + + + 69 + 4 + 31 + 3 + 1536 + + + 73 + 4 + 28 + 3 + 1536 + + + 77 + 4 + 29 + 3 + 1536 + + + 81 + 4 + 26 + 3 + 1536 + + + 85 + 4 + 27 + 3 + 1536 + + + 89 + 4 + 24 + 3 + 1536 + + + 93 + 4 + 25 + 3 + 1536 + + + 97 + 4 + 0 + 3 + 1536 + + + 101 + 4 + 1 + 3 + 1536 + + + 105 + 4 + 2 + 3 + 1536 + + + 109 + 4 + 3 + 3 + 1536 + + + 113 + 4 + 4 + 3 + 1536 + + + 117 + 4 + 5 + 3 + 1536 + + + 121 + 4 + 6 + 3 + 1536 + + + 125 + 4 + 7 + 3 + 1536 + + + + diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/default_sku b/device/mellanox/x86_64-mlnx_msn3700-r0/default_sku new file mode 100644 index 00000000000..5385adf06ac --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/default_sku @@ -0,0 +1 @@ +ACS-MSN3700 t1 diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn3700-r0/platform_reboot new file mode 120000 index 00000000000..43c8ea56749 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/platform_reboot @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_reboot \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/platform_wait b/device/mellanox/x86_64-mlnx_msn3700-r0/platform_wait new file mode 120000 index 00000000000..4b30bd42985 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/platform_wait @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_wait \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/eeprom.py b/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/eeprom.py new file mode 120000 index 00000000000..b4e2a6a6167 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/eeprom.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/eeprom.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/psuutil.py b/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/psuutil.py new file mode 120000 index 00000000000..9f724238a8d --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/psuutil.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/psuutil.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/sfplpmget.py new file mode 120000 index 00000000000..2e84f435abd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/sfplpmget.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/sfplpmset.py new file mode 120000 index 00000000000..6a88bac3046 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/sfplpmset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/sfpreset.py b/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/sfpreset.py new file mode 120000 index 00000000000..fef2063e349 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/sfpreset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfpreset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/sfputil.py new file mode 120000 index 00000000000..45909b880fc --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/plugins/sfputil.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfputil.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn3700-r0/pmon_daemon_control.json new file mode 120000 index 00000000000..435a2ce7c0b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn3700-r0/sensors.conf new file mode 100644 index 00000000000..376d079390a --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/sensors.conf @@ -0,0 +1,116 @@ +################################################################################ +# Copyright (c) 2019 Mellanox Technologies +# +# Platform specific sensors config for SN3700 +################################################################################ + +# Temperature sensors +bus "i2c-2" "i2c-1-mux (chan_id 1)" + chip "mlxsw-i2c-*-48" + label temp1 "Ambient ASIC Temp" + +bus "i2c-7" "i2c-1-mux (chan_id 6)" + chip "tmp102-i2c-*-49" + label temp1 "Ambient Fan Side Temp (air intake)" + chip "tmp102-i2c-*-4a" + label temp1 "Ambient Port Side Temp (air exhaust)" + +bus "i2c-15" "i2c-1-mux (chan_id 6)" + chip "tmp102-i2c-15-49" + label temp1 "Ambient COMEX Temp" + +# Power controllers +bus "i2c-5" "i2c-1-mux (chan_id 4)" + chip "tps53679-i2c-*-70" + label in1 "PMIC-1 PSU 12V Rail (in)" + label in2 "PMIC-1 ASIC 0.8V VCORE Rail (out)" + label in3 "PMIC-1 ASIC 1.2V Rail (out)" + label temp1 "PMIC-1 Temp 1" + label temp2 "PMIC-1 Temp 2" + label power1 "PMIC-1 ASIC 0.8V VCORE Rail Pwr (out)" + label power2 "PMIC-1 ASIC 1.2V Rail Pwr (out)" + label curr1 "PMIC-1 ASIC 0.8V VCORE Rail Curr (out)" + label curr2 "PMIC-1 ASIC 1.2V Rail Curr (out)" + chip "tps53679-i2c-*-71" + label in1 "PMIC-2 PSU 12V Rail (in)" + label in2 "PMIC-2 ASIC 3.3V Rail (out)" + compute in2 (1.5)*@, @/(1.5) + label in3 "PMIC-2 ASIC 1.8V Rail (out)" + label temp1 "PMIC-2 Temp 1" + label temp2 "PMIC-2 Temp 2" + label power1 "PMIC-2 ASIC 3.3V Rail Pwr (out)" + label power2 "PMIC-2 ASIC 1.8V Rail Pwr (out)" + label curr1 "PMIC-2 ASIC 3.3V Rail Curr (out)" + label curr2 "PMIC-2 ASIC 1.8V Rail Curr (out)" + +bus "i2c-15" "i2c-1-mux (chan_id 6)" + chip "tps53679-i2c-*-58" + label in1 "PMIC-3 PSU 12V Rail (in)" + label in2 "PMIC-3 COMEX 1.8V Rail (out)" + label in3 "PMIC-3 COMEX 1.05V Rail (out)" + label temp1 "PMIC-3 Temp 1" + label temp2 "PMIC-3 Temp 2" + label power1 "PMIC-3 COMEX 1.8V Rail Pwr (out)" + label power2 "PMIC-3 COMEX 1.05V Rail Pwr (out)" + label curr1 "PMIC-3 COMEX 1.8V Rail Curr (out)" + label curr2 "PMIC-3 COMEX 1.05V Rail Curr (out)" + chip "tps53679-i2c-*-61" + label in1 "PMIC-4 PSU 12V Rail (in)" + label in2 "PMIC-4 COMEX 1.2V Rail (out)" + ignore in3 + label temp1 "PMIC-4 Temp 1" + label temp2 "PMIC-4 Temp 2" + label power1 "PMIC-4 COMEX 1.2V Rail Pwr (out)" + ignore power2 + label curr1 "PMIC-4 COMEX 1.2V Rail Curr (out)" + ignore curr2 + +# Power supplies +bus "i2c-4" "i2c-1-mux (chan_id 3)" + chip "dps460-i2c-*-58" + label in1 "PSU-1 220V Rail (in)" + ignore in2 + label in3 "PSU-1 12V Rail (out)" + label fan1 "PSU-1 Fan 1" + ignore fan2 + ignore fan3 + label temp1 "PSU-1 Temp 1" + label temp2 "PSU-1 Temp 2" + label temp3 "PSU-1 Temp 3" + label power1 "PSU-1 220V Rail Pwr (in)" + label power2 "PSU-1 12V Rail Pwr (out)" + label curr1 "PSU-1 220V Rail Curr (in)" + label curr2 "PSU-1 12V Rail Curr (out)" + chip "dps460-i2c-*-59" + label in1 "PSU-2 220V Rail (in)" + ignore in2 + label in3 "PSU-2 12V Rail (out)" + label fan1 "PSU-2 Fan 1" + ignore fan2 + ignore fan3 + label temp1 "PSU-2 Temp 1" + label temp2 "PSU-2 Temp 2" + label temp3 "PSU-2 Temp 3" + label power1 "PSU-2 220V Rail Pwr (in)" + label power2 "PSU-2 12V Rail Pwr (out)" + label curr1 "PSU-2 220V Rail Curr (in)" + label curr2 "PSU-2 12V Rail Curr (out)" + +# Chassis fans +chip "mlxreg_fan-isa-*" + label fan1 "Chassis Fan Drawer-1 Tach 1" + label fan2 "Chassis Fan Drawer-1 Tach 2" + label fan3 "Chassis Fan Drawer-2 Tach 1" + label fan4 "Chassis Fan Drawer-2 Tach 2" + label fan5 "Chassis Fan Drawer-3 Tach 1" + label fan6 "Chassis Fan Drawer-3 Tach 2" + label fan7 "Chassis Fan Drawer-4 Tach 1" + label fan8 "Chassis Fan Drawer-4 Tach 2" + label fan9 "Chassis Fan Drawer-5 Tach 1" + label fan10 "Chassis Fan Drawer-5 Tach 2" + label fan11 "Chassis Fan Drawer-6 Tach 1" + label fan12 "Chassis Fan Drawer-6 Tach 2" + +# Miscellaneous +chip "*-virtual-*" + ignore temp1 diff --git a/device/mellanox/x86_64-mlnx_msn3700_simx-r0/ACS-MSN3700 b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/ACS-MSN3700 new file mode 120000 index 00000000000..06a1a919f53 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/ACS-MSN3700 @@ -0,0 +1 @@ +../x86_64-mlnx_msn3700-r0/ACS-MSN3700 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700_simx-r0/default_sku b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/default_sku new file mode 120000 index 00000000000..e1d1f987772 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/default_sku @@ -0,0 +1 @@ +../x86_64-mlnx_msn3700-r0/default_sku \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700_simx-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/platform_reboot new file mode 120000 index 00000000000..dfaf5341766 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/platform_reboot @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700_simx-r0/platform_reboot \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700_simx-r0/plugins b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/plugins new file mode 120000 index 00000000000..f6f09c83f7d --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/plugins @@ -0,0 +1 @@ +../x86_64-mlnx_msn3700-r0/plugins \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700_simx-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..40fc367acf3 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/pmon_daemon_control.json @@ -0,0 +1,5 @@ +{ + "skip_ledd": true, + "skip_xcvrd": true, + "skip_psud": true +} diff --git a/device/mellanox/x86_64-mlnx_msn3700_simx-r0/syseeprom.hex b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/syseeprom.hex new file mode 100644 index 00000000000..b50ffa5a023 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/syseeprom.hex @@ -0,0 +1,256 @@ +54 6c 76 49 6e 66 6f 00 01 02 53 21 40 4d 53 4e +33 37 30 30 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 22 14 4d +53 4e 33 37 30 30 2d 56 53 32 46 00 00 00 00 00 +00 00 00 23 18 4d 54 31 38 35 31 58 30 32 39 36 +31 00 00 00 00 00 00 00 00 00 00 00 00 24 06 98 +03 9b 94 d4 80 25 13 31 32 2f 32 38 2f 32 30 31 +38 20 30 34 3a 34 32 3a 31 38 26 01 00 2a 02 00 +fe 2b 08 4d 65 6c 6c 61 6e 6f 78 fd 24 00 00 81 +19 00 16 01 01 00 56 00 00 4d 4c 4e 58 02 01 0c +05 0e 02 10 06 12 07 00 00 00 00 00 00 00 00 00 +00 fd a4 00 00 81 19 00 92 00 03 01 01 00 00 4d +54 31 38 35 31 58 30 32 39 36 31 00 00 00 00 00 +00 00 00 00 00 00 00 4d 53 4e 33 37 30 30 2d 56 +53 32 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00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/buffers_defaults_t0.j2 new file mode 120000 index 00000000000..85f0b6b6b35 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn3700-r0/ACS-MSN3700/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/buffers_defaults_t1.j2 new file mode 120000 index 00000000000..3bb496a5103 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn3700-r0/ACS-MSN3700/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/pg_profile_lookup.ini new file mode 120000 index 00000000000..252ae8d4149 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/pg_profile_lookup.ini @@ -0,0 +1 @@ +../../x86_64-mlnx_msn3700-r0/ACS-MSN3700/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/port_config.ini b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/port_config.ini new file mode 120000 index 00000000000..73505f3a0ba --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/port_config.ini @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/port_config.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/qos.json.j2 new file mode 120000 index 00000000000..eccf286dc87 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/sai.profile b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/sai.profile new file mode 100644 index 00000000000..46750fb2e07 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3700c.xml diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/sai_3700c.xml b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/sai_3700c.xml new file mode 120000 index 00000000000..58740b9776d --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/sai_3700c.xml @@ -0,0 +1 @@ +../../x86_64-mlnx_msn3700-r0/ACS-MSN3700/sai_3700.xml \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/default_sku b/device/mellanox/x86_64-mlnx_msn3700c-r0/default_sku new file mode 100644 index 00000000000..12f543e1cc8 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/default_sku @@ -0,0 +1 @@ +ACS-MSN3700C t1 diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn3700c-r0/platform_reboot new file mode 120000 index 00000000000..43c8ea56749 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/platform_reboot @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_reboot \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/platform_wait b/device/mellanox/x86_64-mlnx_msn3700c-r0/platform_wait new file mode 120000 index 00000000000..4b30bd42985 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/platform_wait @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_wait \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/eeprom.py b/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/eeprom.py new file mode 120000 index 00000000000..b4e2a6a6167 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/eeprom.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/eeprom.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/psuutil.py b/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/psuutil.py new file mode 120000 index 00000000000..9f724238a8d --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/psuutil.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/psuutil.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/sfplpmget.py new file mode 120000 index 00000000000..2e84f435abd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/sfplpmget.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/sfplpmset.py new file mode 120000 index 00000000000..6a88bac3046 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/sfplpmset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/sfpreset.py b/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/sfpreset.py new file mode 120000 index 00000000000..fef2063e349 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/sfpreset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfpreset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/sfputil.py new file mode 120000 index 00000000000..45909b880fc --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/plugins/sfputil.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfputil.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn3700c-r0/pmon_daemon_control.json new file mode 120000 index 00000000000..435a2ce7c0b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors.conf new file mode 100644 index 00000000000..7efcefc5f74 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors.conf @@ -0,0 +1,112 @@ +################################################################################ +# Copyright (c) 2019 Mellanox Technologies +# +# Platform specific sensors config for SN3700C +################################################################################ + +# Temperature sensors +bus "i2c-2" "i2c-1-mux (chan_id 1)" + chip "mlxsw-i2c-*-48" + label temp1 "Ambient ASIC Temp" + +bus "i2c-7" "i2c-1-mux (chan_id 6)" + chip "tmp102-i2c-*-49" + label temp1 "Ambient Fan Side Temp (air intake)" + chip "tmp102-i2c-*-4a" + label temp1 "Ambient Port Side Temp (air exhaust)" + +bus "i2c-15" "i2c-1-mux (chan_id 6)" + chip "tmp102-i2c-15-49" + label temp1 "Ambient COMEX Temp" + +# Power controllers +bus "i2c-5" "i2c-1-mux (chan_id 4)" + chip "tps53679-i2c-*-70" + label in1 "PMIC-1 PSU 12V Rail (in)" + label in2 "PMIC-1 ASIC 0.8V VCORE Rail (out)" + label in3 "PMIC-1 ASIC 1.2V Rail (out)" + label temp1 "PMIC-1 Temp 1" + label temp2 "PMIC-1 Temp 2" + label power1 "PMIC-1 ASIC 0.8V VCORE Rail Pwr (out)" + label power2 "PMIC-1 ASIC 1.2V Rail Pwr (out)" + label curr1 "PMIC-1 ASIC 0.8V VCORE Rail Curr (out)" + label curr2 "PMIC-1 ASIC 1.2V Rail Curr (out)" + chip "tps53679-i2c-*-71" + label in1 "PMIC-2 PSU 12V Rail (in)" + label in2 "PMIC-2 ASIC 3.3V Rail (out)" + compute in2 (1.5)*@, @/(1.5) + label in3 "PMIC-2 ASIC 1.8V Rail (out)" + label temp1 "PMIC-2 Temp 1" + label temp2 "PMIC-2 Temp 2" + label power1 "PMIC-2 ASIC 3.3V Rail Pwr (out)" + label power2 "PMIC-2 ASIC 1.8V Rail Pwr (out)" + label curr1 "PMIC-2 ASIC 3.3V Rail Curr (out)" + label curr2 "PMIC-2 ASIC 1.8V Rail Curr (out)" + +bus "i2c-15" "i2c-1-mux (chan_id 6)" + chip "tps53679-i2c-*-58" + label in1 "PMIC-3 PSU 12V Rail (in)" + label in2 "PMIC-3 COMEX 1.8V Rail (out)" + label in3 "PMIC-3 COMEX 1.05V Rail (out)" + label temp1 "PMIC-3 Temp 1" + label temp2 "PMIC-3 Temp 2" + label power1 "PMIC-3 COMEX 1.8V Rail Pwr (out)" + label power2 "PMIC-3 COMEX 1.05V Rail Pwr (out)" + label curr1 "PMIC-3 COMEX 1.8V Rail Curr (out)" + label curr2 "PMIC-3 COMEX 1.05V Rail Curr (out)" + chip "tps53679-i2c-*-61" + label in1 "PMIC-4 PSU 12V Rail (in)" + label in2 "PMIC-4 COMEX 1.2V Rail (out)" + ignore in3 + label temp1 "PMIC-4 Temp 1" + label temp2 "PMIC-4 Temp 2" + label power1 "PMIC-4 COMEX 1.2V Rail Pwr (out)" + ignore power2 + label curr1 "PMIC-4 COMEX 1.2V Rail Curr (out)" + ignore curr2 + +# Power supplies +bus "i2c-4" "i2c-1-mux (chan_id 3)" + chip "dps460-i2c-*-58" + label in1 "PSU-1 220V Rail (in)" + ignore in2 + label in3 "PSU-1 12V Rail (out)" + label fan1 "PSU-1 Fan 1" + ignore fan2 + ignore fan3 + label temp1 "PSU-1 Temp 1" + label temp2 "PSU-1 Temp 2" + label temp3 "PSU-1 Temp 3" + label power1 "PSU-1 220V Rail Pwr (in)" + label power2 "PSU-1 12V Rail Pwr (out)" + label curr1 "PSU-1 220V Rail Curr (in)" + label curr2 "PSU-1 12V Rail Curr (out)" + chip "dps460-i2c-*-59" + label in1 "PSU-2 220V Rail (in)" + ignore in2 + label in3 "PSU-2 12V Rail (out)" + label fan1 "PSU-2 Fan 1" + ignore fan2 + ignore fan3 + label temp1 "PSU-2 Temp 1" + label temp2 "PSU-2 Temp 2" + label temp3 "PSU-2 Temp 3" + label power1 "PSU-2 220V Rail Pwr (in)" + label power2 "PSU-2 12V Rail Pwr (out)" + label curr1 "PSU-2 220V Rail Curr (in)" + label curr2 "PSU-2 12V Rail Curr (out)" + +# Chassis fans +chip "mlxreg_fan-isa-*" + label fan1 "Chassis Fan Drawer-1 Tach 1" + label fan2 "Chassis Fan Drawer-1 Tach 2" + label fan3 "Chassis Fan Drawer-2 Tach 1" + label fan4 "Chassis Fan Drawer-2 Tach 2" + label fan5 "Chassis Fan Drawer-3 Tach 1" + label fan6 "Chassis Fan Drawer-3 Tach 2" + label fan7 "Chassis Fan Drawer-4 Tach 1" + label fan8 "Chassis Fan Drawer-4 Tach 2" + +# Miscellaneous +chip "*-virtual-*" + ignore temp1 diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/buffers_defaults_t0.j2 new file mode 120000 index 00000000000..85f0b6b6b35 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn3700-r0/ACS-MSN3700/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/buffers_defaults_t1.j2 new file mode 120000 index 00000000000..3bb496a5103 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn3700-r0/ACS-MSN3700/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/pg_profile_lookup.ini new file mode 120000 index 00000000000..252ae8d4149 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/pg_profile_lookup.ini @@ -0,0 +1 @@ +../../x86_64-mlnx_msn3700-r0/ACS-MSN3700/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/port_config.ini b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/port_config.ini new file mode 100644 index 00000000000..db5216ccf24 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias +Ethernet0 0,1,2,3 etp1 +Ethernet4 4,5,6,7 etp2 +Ethernet8 8,9,10,11 etp3 +Ethernet12 12,13,14,15 etp4 +Ethernet16 16,17,18,19 etp5 +Ethernet20 20,21,22,23 etp6 +Ethernet24 24,25,26,27 etp7 +Ethernet28 28,29,30,31 etp8 +Ethernet32 32,33,34,35 etp9 +Ethernet36 36,37,38,39 etp10 +Ethernet40 40,41,42,43 etp11 +Ethernet44 44,45,46,47 etp12 +Ethernet48 48,49,50,51 etp13 +Ethernet52 52,53,54,55 etp14 +Ethernet56 56,57,58,59 etp15 +Ethernet60 60,61,62,63 etp16 +Ethernet64 64,65,66,67 etp17 +Ethernet68 68,69,70,71 etp18 +Ethernet72 72,73,74,75 etp19 +Ethernet76 76,77,78,79 etp20 +Ethernet80 80,81,82,83 etp21 +Ethernet84 84,85,86,87 etp22 +Ethernet88 88,89,90,91 etp23 +Ethernet92 92,93,94,95 etp24 +Ethernet96 96,97,98,99 etp25 +Ethernet100 100,101,102,103 etp26 +Ethernet104 104,105,106,107 etp27 +Ethernet108 108,109,110,111 etp28 +Ethernet112 112,113,114,115 etp29 +Ethernet116 116,117,118,119 etp30 +Ethernet120 120,121,122,123 etp31 +Ethernet124 124,125,126,127 etp32 +Ethernet128 128,129,130,131 etp33 +Ethernet132 132,133,134,135 etp34 +Ethernet136 136,137,138,139 etp35 +Ethernet140 140,141,142,143 etp36 +Ethernet144 144,145,146,147 etp37 +Ethernet148 148,149,150,151 etp38 +Ethernet152 152,153,154,155 etp39 +Ethernet156 156,157,158,159 etp40 +Ethernet160 160,161,162,163 etp41 +Ethernet164 164,165,166,167 etp42 +Ethernet168 168,169,170,171 etp43 +Ethernet172 172,173,174,175 etp44 +Ethernet176 176,177,178,179 etp45 +Ethernet180 180,181,182,183 etp46 +Ethernet184 184,185,186,187 etp47 +Ethernet188 188,189,190,191 etp48 +Ethernet192 192,193,194,195 etp49 +Ethernet196 196,197,198,199 etp50 +Ethernet200 200,201,202,203 etp51 +Ethernet204 204,205,206,207 etp52 +Ethernet208 208,209,210,211 etp53 +Ethernet212 212,213,214,215 etp54 +Ethernet216 216,217,218,219 etp55 +Ethernet220 220,221,222,223 etp56 +Ethernet224 224,225,226,227 etp57 +Ethernet228 228,229,230,231 etp58 +Ethernet232 232,233,234,235 etp59 +Ethernet236 236,237,238,239 etp60 +Ethernet240 240,241,242,243 etp61 +Ethernet244 244,245,246,247 etp62 +Ethernet248 248,249,250,251 etp63 +Ethernet252 252,253,254,255 etp64 diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/qos.json.j2 new file mode 120000 index 00000000000..eccf286dc87 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/sai.profile b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/sai.profile new file mode 100644 index 00000000000..367f6c4e99c --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3800.xml diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/sai_3800.xml b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/sai_3800.xml new file mode 100644 index 00000000000..2d4c0f93d10 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/sai_3800.xml @@ -0,0 +1,467 @@ + + + + + + 00:02:03:04:05:00 + + + 64 + + + + + 1 + 4 + 48 + + + 3 + + + 1536 + + + 3 + 4 + 49 + 3 + 1536 + + + 5 + 4 + 50 + 3 + 1536 + + + 7 + 4 + 51 + 3 + 1536 + + + 9 + 4 + 52 + 3 + 1536 + + + 11 + 4 + 53 + 3 + 1536 + + + 13 + 4 + 54 + 3 + 1536 + + + 15 + 4 + 55 + 3 + 1536 + + + 17 + 4 + 56 + 3 + 1536 + + + 19 + 4 + 57 + 3 + 1536 + + + 21 + 4 + 58 + 3 + 1536 + + + 23 + 4 + 59 + 3 + 1536 + + + 25 + 4 + 60 + 3 + 1536 + + + 27 + 4 + 61 + 3 + 1536 + + + 29 + 4 + 62 + 3 + 1536 + + + 31 + 4 + 63 + 3 + 1536 + + + 33 + 4 + 12 + 3 + 1536 + + + 35 + 4 + 13 + 3 + 1536 + + + 37 + 4 + 14 + 3 + 1536 + + + 39 + 4 + 15 + 3 + 1536 + + + 41 + 4 + 8 + 3 + 1536 + + + 43 + 4 + 9 + 3 + 1536 + + + 45 + 4 + 10 + 3 + 1536 + + + 47 + 4 + 11 + 3 + 1536 + + + 49 + 4 + 4 + 3 + 1536 + + + 51 + 4 + 5 + 3 + 1536 + + + 53 + 4 + 6 + 3 + 1536 + + + 55 + 4 + 7 + 3 + 1536 + + + 57 + 4 + 0 + 3 + 1536 + + + 59 + 4 + 1 + 3 + 1536 + + + 61 + 4 + 2 + 3 + 1536 + + + 63 + 4 + 3 + 3 + 1536 + + + 65 + 4 + 44 + 3 + 1536 + + + 67 + 4 + 45 + 3 + 1536 + + + 69 + 4 + 46 + 3 + 1536 + + + 71 + 4 + 47 + 3 + 1536 + + + 73 + 4 + 40 + 3 + 1536 + + + 75 + 4 + 41 + 3 + 1536 + + + 77 + 4 + 42 + 3 + 1536 + + + 79 + 4 + 43 + 3 + 1536 + + + 81 + 4 + 36 + 3 + 1536 + + + 83 + 4 + 37 + 3 + 1536 + + + 85 + 4 + 38 + 3 + 1536 + + + 87 + 4 + 39 + 3 + 1536 + + + 89 + 4 + 32 + 3 + 1536 + + + 91 + 4 + 33 + 3 + 1536 + + + 93 + 4 + 34 + 3 + 1536 + + + 95 + 4 + 35 + 3 + 1536 + + + 97 + 4 + 16 + 3 + 1536 + + + 99 + 4 + 17 + 3 + 1536 + + + 101 + 4 + 18 + 3 + 1536 + + + 103 + 4 + 19 + 3 + 1536 + + + 105 + 4 + 20 + 3 + 1536 + + + 107 + 4 + 21 + 3 + 1536 + + + 109 + 4 + 22 + 3 + 1536 + + + 111 + 4 + 23 + 3 + 1536 + + + 113 + 4 + 24 + 3 + 1536 + + + 115 + 4 + 25 + 3 + 1536 + + + 117 + 4 + 26 + 3 + 1536 + + + 119 + 4 + 27 + 3 + 1536 + + + 121 + 4 + 28 + 3 + 1536 + + + 123 + 4 + 29 + 3 + 1536 + + + 125 + 4 + 30 + 3 + 1536 + + + 127 + 4 + 31 + 3 + 1536 + + + + diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/default_sku b/device/mellanox/x86_64-mlnx_msn3800-r0/default_sku new file mode 100644 index 00000000000..c5d9d513ad0 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/default_sku @@ -0,0 +1 @@ +ACS-MSN3800 t1 diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn3800-r0/platform_reboot new file mode 120000 index 00000000000..43c8ea56749 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/platform_reboot @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_reboot \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/platform_wait b/device/mellanox/x86_64-mlnx_msn3800-r0/platform_wait new file mode 120000 index 00000000000..4b30bd42985 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/platform_wait @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_wait \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/eeprom.py b/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/eeprom.py new file mode 120000 index 00000000000..b4e2a6a6167 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/eeprom.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/eeprom.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/psuutil.py b/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/psuutil.py new file mode 120000 index 00000000000..9f724238a8d --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/psuutil.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/psuutil.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/sfplpmget.py new file mode 120000 index 00000000000..2e84f435abd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/sfplpmget.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/sfplpmset.py new file mode 120000 index 00000000000..6a88bac3046 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/sfplpmset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/sfpreset.py b/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/sfpreset.py new file mode 120000 index 00000000000..fef2063e349 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/sfpreset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfpreset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/sfputil.py new file mode 120000 index 00000000000..45909b880fc --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/plugins/sfputil.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfputil.py \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn3800-r0/pmon_daemon_control.json new file mode 120000 index 00000000000..435a2ce7c0b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn3800-r0/sensors.conf new file mode 100644 index 00000000000..fab58890adf --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/sensors.conf @@ -0,0 +1,127 @@ +################################################################################ +# Copyright (c) 2019 Mellanox Technologies +# +# Platform specific sensors config for SN3800 +################################################################################ + +# Temperature sensors +bus "i2c-2" "i2c-1-mux (chan_id 1)" + chip "mlxsw-i2c-*-48" + label temp1 "Ambient ASIC Temp" + +bus "i2c-7" "i2c-1-mux (chan_id 6)" + chip "tmp102-i2c-*-49" + label temp1 "Ambient Fan Side Temp (air intake)" + chip "tmp102-i2c-*-4a" + label temp1 "Ambient Port Side Temp (air exhaust)" + +bus "i2c-15" "i2c-1-mux (chan_id 6)" + chip "tmp102-i2c-15-49" + label temp1 "Ambient COMEX Temp" + +# Power controllers +bus "i2c-5" "i2c-1-mux (chan_id 4)" + chip "tps53679-i2c-*-70" + label in1 "PMIC-1 PSU 12V Rail (in)" + label in2 "PMIC-1 ASIC 0.8V VCORE Rail (out)" + label in3 "PMIC-1 ASIC 1.2V Rail (out)" + label temp1 "PMIC-1 Temp 1" + label temp2 "PMIC-1 Temp 2" + label power1 "PMIC-1 ASIC 0.8V VCORE Rail Pwr (out)" + label power2 "PMIC-1 ASIC 1.2V Rail Pwr (out)" + label curr1 "PMIC-1 ASIC 0.8V VCORE Rail Curr (out)" + label curr2 "PMIC-1 ASIC 1.2V Rail Curr (out)" + chip "tps53679-i2c-*-71" + label in1 "PMIC-2 PSU 12V Rail (in)" + label in2 "PMIC-2 GB 0.8V Rail (out)" + label in3 "PMIC-2 GB 1.125V Rail (out)" + label temp1 "PMIC-2 Temp 1" + label temp2 "PMIC-2 Temp 2" + label power1 "PMIC-2 GB 0.8V Rail Pwr (out)" + label power2 "PMIC-2 GB 1.125V Rail Pwr (out)" + label curr1 "PMIC-2 GB 0.8V Rail Curr (out)" + label curr2 "PMIC-2 GB 1.125V Rail Curr (out)" + chip "tps53679-i2c-*-72" + label in1 "PMIC-3 PSU 12V Rail (in)" + label in2 "PMIC-3 ASIC 1.8V Rail (out)" + ignore in3 + label temp1 "PMIC-3 Temp 1" + label temp2 "PMIC-3 Temp 2" + label power1 "PMIC-3 ASIC 1.8V Rail Pwr (out)" + ignore power2 + label curr1 "PMIC-3 ASIC 1.8V Rail Curr (out)" + ignore curr2 + chip "tps53679-i2c-*-73" + label in1 "PMIC-4 PSU 12V Rail (in)" + label in2 "PMIC-4 GB 0.8V Rail (out)" + label in3 "PMIC-4 GB 1.125V Rail (out)" + label temp1 "PMIC-4 Temp 1" + label temp2 "PMIC-4 Temp 2" + label power1 "PMIC-4 GB 0.8V Rail Pwr (out)" + label power2 "PMIC-4 GB 1.125V Rail Pwr (out)" + label curr1 "PMIC-4 GB 0.8V Rail Curr (out)" + label curr2 "PMIC-4 GB 1.125V Rail Curr (out)" + +bus "i2c-15" "i2c-1-mux (chan_id 6)" + chip "tps53679-i2c-*-58" + label in1 "PMIC-5 PSU 12V Rail (in)" + label in2 "PMIC-5 COMEX 1.8V Rail (out)" + label in3 "PMIC-5 COMEX 1.05V Rail (out)" + label temp1 "PMIC-5 Temp 1" + label temp2 "PMIC-5 Temp 2" + label power1 "PMIC-5 COMEX 1.8V Rail Pwr (out)" + label power2 "PMIC-5 COMEX 1.05V Rail Pwr (out)" + label curr1 "PMIC-5 COMEX 1.8V Rail Curr (out)" + label curr2 "PMIC-5 COMEX 1.05V Rail Curr (out)" + chip "tps53679-i2c-*-61" + label in1 "PMIC-6 PSU 12V Rail (in)" + label in2 "PMIC-6 COMEX 1.2V Rail (out)" + ignore in3 + label temp1 "PMIC-6 Temp 1" + label temp2 "PMIC-6 Temp 2" + label power1 "PMIC-6 COMEX 1.2V Rail Pwr (out)" + ignore power2 + label curr1 "PMIC-6 COMEX 1.2V Rail Curr (out)" + ignore curr2 + +# Power supplies +bus "i2c-4" "i2c-1-mux (chan_id 3)" + chip "dps460-i2c-*-58" + label in1 "PSU-1 220V Rail (in)" + ignore in2 + label in3 "PSU-1 12V Rail (out)" + label fan1 "PSU-1 Fan 1" + ignore fan2 + ignore fan3 + label temp1 "PSU-1 Temp 1" + label temp2 "PSU-1 Temp 2" + label temp3 "PSU-1 Temp 3" + label power1 "PSU-1 220V Rail Pwr (in)" + label power2 "PSU-1 12V Rail Pwr (out)" + label curr1 "PSU-1 220V Rail Curr (in)" + label curr2 "PSU-1 12V Rail Curr (out)" + chip "dps460-i2c-*-59" + label in1 "PSU-2 220V Rail (in)" + ignore in2 + label in3 "PSU-2 12V Rail (out)" + label fan1 "PSU-2 Fan 1" + ignore fan2 + ignore fan3 + label temp1 "PSU-2 Temp 1" + label temp2 "PSU-2 Temp 2" + label temp3 "PSU-2 Temp 3" + label power1 "PSU-2 220V Rail Pwr (in)" + label power2 "PSU-2 12V Rail Pwr (out)" + label curr1 "PSU-2 220V Rail Curr (in)" + label curr2 "PSU-2 12V Rail Curr (out)" + +# Chassis fans +chip "mlxreg_fan-isa-*" + label fan1 "Chassis Fan Drawer-1 Tach 1" + label fan2 "Chassis Fan Drawer-2 Tach 1" + label fan3 "Chassis Fan Drawer-3 Tach 1" + +# Miscellaneous +chip "*-virtual-*" + ignore temp1 + ignore temp2 diff --git a/device/mellanox/x86_64-mlnx_x86-r5.0.1400/default_sku b/device/mellanox/x86_64-mlnx_x86-r5.0.1400/default_sku new file mode 100644 index 00000000000..9641115a494 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_x86-r5.0.1400/default_sku @@ -0,0 +1 @@ +ACS-MSN2740 t1 diff --git a/device/mellanox/x86_64-mlnx_x86-r5.0.1400/installer.conf b/device/mellanox/x86_64-mlnx_x86-r5.0.1400/installer.conf new file mode 100644 index 00000000000..c9c9493a540 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_x86-r5.0.1400/installer.conf @@ -0,0 +1 @@ +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=lax acpi=noirq" diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/port_config.ini b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/port_config.ini new file mode 100644 index 00000000000..1fa6d21d960 --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias +Ethernet0 49,50,51,52 hundredGigE1 +Ethernet4 53,54,55,56 hundredGigE2 +Ethernet8 57,58,59,60 hundredGigE3 +Ethernet12 61,62,63,64 hundredGigE4 +Ethernet16 65,66,67,68 hundredGigE5 +Ethernet20 69,70,71,72 hundredGigE6 +Ethernet24 73,74,75,76 hundredGigE7 +Ethernet28 77,78,79,80 hundredGigE8 +Ethernet32 33,34,35,36 hundredGigE9 +Ethernet36 37,38,39,40 hundredGigE10 +Ethernet40 41,42,43,44 hundredGigE11 +Ethernet44 45,46,47,48 hundredGigE12 +Ethernet48 81,82,83,84 hundredGigE13 +Ethernet52 85,86,87,88 hundredGigE14 +Ethernet56 89,90,91,92 hundredGigE15 +Ethernet60 93,94,95,96 hundredGigE16 +Ethernet64 97,98,99,100 hundredGigE17 +Ethernet68 101,102,103,104 hundredGigE18 +Ethernet72 105,106,107,108 hundredGigE19 +Ethernet76 109,110,111,112 hundredGigE20 +Ethernet80 17,18,19,20 hundredGigE21 +Ethernet84 21,22,23,24 hundredGigE22 +Ethernet88 25,26,27,28 hundredGigE23 +Ethernet92 29,30,31,32 hundredGigE24 +Ethernet96 113,114,115,116 hundredGigE25 +Ethernet100 117,118,119,120 hundredGigE26 +Ethernet104 121,122,123,124 hundredGigE27 +Ethernet108 125,126,127,128 hundredGigE28 +Ethernet112 1,2,3,4 hundredGigE29 +Ethernet116 5,6,7,8 hundredGigE30 +Ethernet120 9,10,11,12 hundredGigE31 +Ethernet124 13,14,15,16 hundredGigE32 diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/sai.profile b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/sai.profile new file mode 100644 index 00000000000..a58c3ac6eab --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-ly1200-32x100G.config.bcm diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/th-ly1200-32x100G.config.bcm b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/th-ly1200-32x100G.config.bcm new file mode 100644 index 00000000000..84b2c572664 --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/th-ly1200-32x100G.config.bcm @@ -0,0 +1,319 @@ +### BMS (start) +## Global settings +bcm_num_cos=8 +dport_map_indexed=0 + +## Switch settings +# Port number and bandwidth assignment. +portmap_1=1:100 +portmap_5=5:100 +portmap_9=9:100 +portmap_13=13:100 +portmap_17=17:100 +portmap_21=21:100 +portmap_25=25:100 +portmap_29=29:100 +portmap_34=33:100 +portmap_38=37:100 +portmap_42=41:100 +portmap_46=45:100 +portmap_50=49:100 +portmap_54=53:100 +portmap_58=57:100 +portmap_62=61:100 +portmap_68=65:100 +portmap_72=69:100 +portmap_76=73:100 +portmap_80=77:100 +portmap_84=81:100 +portmap_88=85:100 +portmap_92=89:100 +portmap_96=93:100 +portmap_102=97:100 +portmap_106=101:100 +portmap_110=105:100 +portmap_114=109:100 +portmap_118=113:100 +portmap_122=117:100 +portmap_126=121:100 +portmap_130=125:100 + +# pbmp_xport_xe is used to specify if a XPORT block is configured as xe port +# By default, an XPORT block is treated as HG port. +pbmp_xport_xe=0x0444444441111111104444444422222222 + +# Map dport number to internal port number . +dport_map_port_0=327 +dport_map_port_1=112 +dport_map_port_5=116 +dport_map_port_9=120 +dport_map_port_13=124 +dport_map_port_17=80 +dport_map_port_21=84 +dport_map_port_25=88 +dport_map_port_29=92 +dport_map_port_34=32 +dport_map_port_38=36 +dport_map_port_42=40 +dport_map_port_46=44 +dport_map_port_50=0 +dport_map_port_54=4 +dport_map_port_58=8 +dport_map_port_62=12 +dport_map_port_68=16 +dport_map_port_72=20 +dport_map_port_76=24 +dport_map_port_80=28 +dport_map_port_84=48 +dport_map_port_88=52 +dport_map_port_92=56 +dport_map_port_96=60 +dport_map_port_102=64 +dport_map_port_106=68 +dport_map_port_110=72 +dport_map_port_114=76 +dport_map_port_118=96 +dport_map_port_122=100 +dport_map_port_126=104 +dport_map_port_130=108 + +# Remap XGXS rx and tx lanes to desired mapping. Four bits were used for +# specifying each lane in the format of Lane 0 (bit 15-12), Lane 1 (bit 11-8), +# lane 2 (bit 7-4), and lane 3 (bit 3-0). +# For example, to reverse the tx lane mapping in 3, 2, 1, 0 order, +xgxs_tx_lane_map_ce0=0x3210 +xgxs_rx_lane_map_ce0=0x3210 +xgxs_tx_lane_map_ce4=0x3210 +xgxs_rx_lane_map_ce4=0x2103 +xgxs_tx_lane_map_ce8=0x3210 +xgxs_rx_lane_map_ce8=0x3210 +xgxs_tx_lane_map_ce12=0x3210 +xgxs_rx_lane_map_ce12=0x2103 +xgxs_tx_lane_map_ce16=0x0123 +xgxs_rx_lane_map_ce16=0x0123 +xgxs_tx_lane_map_ce20=0x3210 +xgxs_rx_lane_map_ce20=0x2103 +xgxs_tx_lane_map_ce24=0x3210 +xgxs_rx_lane_map_ce24=0x3210 +xgxs_tx_lane_map_ce28=0x0123 +xgxs_rx_lane_map_ce28=0x1203 +xgxs_tx_lane_map_ce32=0x3210 +xgxs_rx_lane_map_ce32=0x3210 +xgxs_tx_lane_map_ce36=0x2301 +xgxs_rx_lane_map_ce36=0x3120 +xgxs_tx_lane_map_ce40=0x3210 +xgxs_rx_lane_map_ce40=0x3210 +xgxs_tx_lane_map_ce44=0x3102 +xgxs_rx_lane_map_ce44=0x2301 +xgxs_tx_lane_map_ce48=0x3210 +xgxs_rx_lane_map_ce48=0x1203 +xgxs_tx_lane_map_ce52=0x0123 +xgxs_rx_lane_map_ce52=0x3210 +xgxs_tx_lane_map_ce56=0x3210 +xgxs_rx_lane_map_ce56=0x1203 +xgxs_tx_lane_map_ce60=0x0213 +xgxs_rx_lane_map_ce60=0x3210 +xgxs_tx_lane_map_ce64=0x3120 +xgxs_rx_lane_map_ce64=0x1032 +xgxs_tx_lane_map_ce68=0x0123 +xgxs_rx_lane_map_ce68=0x3012 +xgxs_tx_lane_map_ce72=0x1230 +xgxs_rx_lane_map_ce72=0x1032 +xgxs_tx_lane_map_ce76=0x0123 +xgxs_rx_lane_map_ce76=0x3012 +xgxs_tx_lane_map_ce80=0x0213 +xgxs_rx_lane_map_ce80=0x2031 +xgxs_tx_lane_map_ce84=0x2301 +xgxs_rx_lane_map_ce84=0x3120 +xgxs_tx_lane_map_ce88=0x3210 +xgxs_rx_lane_map_ce88=0x3210 +xgxs_tx_lane_map_ce92=0x2301 +xgxs_rx_lane_map_ce92=0x3120 +xgxs_tx_lane_map_ce96=0x3210 +xgxs_rx_lane_map_ce96=0x0321 +xgxs_tx_lane_map_ce100=0x0123 +xgxs_rx_lane_map_ce100=0x1032 +xgxs_tx_lane_map_ce104=0x0123 +xgxs_rx_lane_map_ce104=0x0123 +xgxs_tx_lane_map_ce108=0x3210 +xgxs_rx_lane_map_ce108=0x2103 +xgxs_tx_lane_map_ce112=0x0123 +xgxs_rx_lane_map_ce112=0x0123 +xgxs_tx_lane_map_ce116=0x0123 +xgxs_rx_lane_map_ce116=0x1230 +xgxs_tx_lane_map_ce120=0x0123 +xgxs_rx_lane_map_ce120=0x0123 +xgxs_tx_lane_map_ce124=0x0123 +xgxs_rx_lane_map_ce124=0x1230 + +# Config to describe the system Linerate or Oversubscribe mode. +# 0: Linerate only (default). +# 1: Oversubscribe mode (all ports will be oversub). +# 2: Mixed mode. Check device specification for applicability. Port bitmap specified via pbmp_oversubscribe. +oversubscribe_mode=1 + +# Set the default MMU lossless behavior. +mmu_lossless=0 + +# Set preemphasis +serdes_preemphasis_lane0_ce0=0x2c3c08 +serdes_preemphasis_lane1_ce0=0x2c3c08 +serdes_preemphasis_lane2_ce0=0x2c3c08 +serdes_preemphasis_lane3_ce0=0x2c3c08 + +serdes_preemphasis_lane0_ce4=0x2c3c08 +serdes_preemphasis_lane1_ce4=0x2c3c08 +serdes_preemphasis_lane2_ce4=0x2c3c08 +serdes_preemphasis_lane3_ce4=0x2c3c08 + +serdes_preemphasis_lane0_ce8=0x2c3c08 +serdes_preemphasis_lane1_ce8=0x2c3c08 +serdes_preemphasis_lane2_ce8=0x2c3c08 +serdes_preemphasis_lane3_ce8=0x2c3c08 + +serdes_preemphasis_lane0_ce12=0x2c3c08 +serdes_preemphasis_lane1_ce12=0x2c3c08 +serdes_preemphasis_lane2_ce12=0x2c3c08 +serdes_preemphasis_lane3_ce12=0x2c3c08 + +serdes_preemphasis_lane0_ce16=0x244408 +serdes_preemphasis_lane1_ce16=0x244408 +serdes_preemphasis_lane2_ce16=0x244408 +serdes_preemphasis_lane3_ce16=0x244408 + +serdes_preemphasis_lane0_ce20=0x244408 +serdes_preemphasis_lane1_ce20=0x244408 +serdes_preemphasis_lane2_ce20=0x244408 +serdes_preemphasis_lane3_ce20=0x244408 + +serdes_preemphasis_lane0_ce24=0x244408 +serdes_preemphasis_lane1_ce24=0x244408 +serdes_preemphasis_lane2_ce24=0x244408 +serdes_preemphasis_lane3_ce24=0x244408 + +serdes_preemphasis_lane0_ce28=0x244408 +serdes_preemphasis_lane1_ce28=0x244408 +serdes_preemphasis_lane2_ce28=0x244408 +serdes_preemphasis_lane3_ce28=0x244408 + +serdes_preemphasis_lane0_ce32=0x2c3c08 +serdes_preemphasis_lane1_ce32=0x2c3c08 +serdes_preemphasis_lane2_ce32=0x2c3c08 +serdes_preemphasis_lane3_ce32=0x2c3c08 + +serdes_preemphasis_lane0_ce36=0x2c3c08 +serdes_preemphasis_lane1_ce36=0x2c3c08 +serdes_preemphasis_lane2_ce36=0x2c3c08 +serdes_preemphasis_lane3_ce36=0x2c3c08 + +serdes_preemphasis_lane0_ce40=0x2c3c08 +serdes_preemphasis_lane1_ce40=0x2c3c08 +serdes_preemphasis_lane2_ce40=0x2c3c08 +serdes_preemphasis_lane3_ce40=0x2c3c08 + +serdes_preemphasis_lane0_ce44=0x244408 +serdes_preemphasis_lane1_ce44=0x244408 +serdes_preemphasis_lane2_ce44=0x244408 +serdes_preemphasis_lane3_ce44=0x244408 + +serdes_preemphasis_lane0_ce48=0x244408 +serdes_preemphasis_lane1_ce48=0x244408 +serdes_preemphasis_lane2_ce48=0x244408 +serdes_preemphasis_lane3_ce48=0x244408 + +serdes_preemphasis_lane0_ce52=0x244408 +serdes_preemphasis_lane1_ce52=0x244408 +serdes_preemphasis_lane2_ce52=0x244408 +serdes_preemphasis_lane3_ce52=0x244408 + +serdes_preemphasis_lane0_ce56=0x244408 +serdes_preemphasis_lane1_ce56=0x244408 +serdes_preemphasis_lane2_ce56=0x244408 +serdes_preemphasis_lane3_ce56=0x244408 + +serdes_preemphasis_lane0_ce60=0x244408 +serdes_preemphasis_lane1_ce60=0x244408 +serdes_preemphasis_lane2_ce60=0x244408 +serdes_preemphasis_lane3_ce60=0x244408 + +serdes_preemphasis_lane0_ce64=0x244408 +serdes_preemphasis_lane1_ce64=0x244408 +serdes_preemphasis_lane2_ce64=0x244408 +serdes_preemphasis_lane3_ce64=0x244408 + +serdes_preemphasis_lane0_ce68=0x244408 +serdes_preemphasis_lane1_ce68=0x244408 +serdes_preemphasis_lane2_ce68=0x244408 +serdes_preemphasis_lane3_ce68=0x244408 + +serdes_preemphasis_lane0_ce72=0x244408 +serdes_preemphasis_lane1_ce72=0x244408 +serdes_preemphasis_lane2_ce72=0x244408 +serdes_preemphasis_lane3_ce72=0x244408 + +serdes_preemphasis_lane0_ce76=0x244408 +serdes_preemphasis_lane1_ce76=0x244408 +serdes_preemphasis_lane2_ce76=0x244408 +serdes_preemphasis_lane3_ce76=0x244408 + +serdes_preemphasis_lane0_ce80=0x244408 +serdes_preemphasis_lane1_ce80=0x244408 +serdes_preemphasis_lane2_ce80=0x244408 +serdes_preemphasis_lane3_ce80=0x244408 + +serdes_preemphasis_lane0_ce84=0x2c3c08 +serdes_preemphasis_lane1_ce84=0x2c3c08 +serdes_preemphasis_lane2_ce84=0x2c3c08 +serdes_preemphasis_lane3_ce84=0x2c3c08 + +serdes_preemphasis_lane0_ce88=0x2c3c08 +serdes_preemphasis_lane1_ce88=0x2c3c08 +serdes_preemphasis_lane2_ce88=0x2c3c08 +serdes_preemphasis_lane3_ce88=0x2c3c08 + +serdes_preemphasis_lane0_ce92=0x2c3c08 +serdes_preemphasis_lane1_ce92=0x2c3c08 +serdes_preemphasis_lane2_ce92=0x2c3c08 +serdes_preemphasis_lane3_ce92=0x2c3c08 + +serdes_preemphasis_lane0_ce96=0x244408 +serdes_preemphasis_lane1_ce96=0x244408 +serdes_preemphasis_lane2_ce96=0x244408 +serdes_preemphasis_lane3_ce96=0x244408 + +serdes_preemphasis_lane0_ce100=0x244408 +serdes_preemphasis_lane1_ce100=0x244408 +serdes_preemphasis_lane2_ce100=0x244408 +serdes_preemphasis_lane3_ce100=0x244408 + +serdes_preemphasis_lane0_ce104=0x244408 +serdes_preemphasis_lane1_ce104=0x244408 +serdes_preemphasis_lane2_ce104=0x244408 +serdes_preemphasis_lane3_ce104=0x244408 + +serdes_preemphasis_lane0_ce108=0x244408 +serdes_preemphasis_lane1_ce108=0x244408 +serdes_preemphasis_lane2_ce108=0x244408 +serdes_preemphasis_lane3_ce108=0x244408 + +serdes_preemphasis_lane0_ce112=0x2c3c08 +serdes_preemphasis_lane1_ce112=0x2c3c08 +serdes_preemphasis_lane2_ce112=0x2c3c08 +serdes_preemphasis_lane3_ce112=0x2c3c08 + +serdes_preemphasis_lane0_ce116=0x2c3c08 +serdes_preemphasis_lane1_ce116=0x2c3c08 +serdes_preemphasis_lane2_ce116=0x2c3c08 +serdes_preemphasis_lane3_ce116=0x2c3c08 + +serdes_preemphasis_lane0_ce120=0x2c3c08 +serdes_preemphasis_lane1_ce120=0x2c3c08 +serdes_preemphasis_lane2_ce120=0x2c3c08 +serdes_preemphasis_lane3_ce120=0x2c3c08 + +serdes_preemphasis_lane0_ce124=0x2c3c08 +serdes_preemphasis_lane1_ce124=0x2c3c08 +serdes_preemphasis_lane2_ce124=0x2c3c08 +serdes_preemphasis_lane3_ce124=0x2c3c08 + +### BMS (end) \ No newline at end of file diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/default_sku b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/default_sku new file mode 100644 index 00000000000..b533cbe35c5 --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/default_sku @@ -0,0 +1 @@ +MiTAC-LY1200-B32H0-C3 t1 diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/installer.conf b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/installer.conf new file mode 100644 index 00000000000..8d4683add46 --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=lax pcie_aspm=off irqpoll" diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/led_proc_init.soc b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/led_proc_init.soc new file mode 100644 index 00000000000..867cd1b6fe3 --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/led_proc_init.soc @@ -0,0 +1,43 @@ +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=31 REMAP_PORT_1=30 REMAP_PORT_2=29 REMAP_PORT_3=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=27 REMAP_PORT_5=26 REMAP_PORT_6=25 REMAP_PORT_7=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=23 REMAP_PORT_9=22 REMAP_PORT_10=21 REMAP_PORT_11=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=19 REMAP_PORT_13=18 REMAP_PORT_14=17 REMAP_PORT_15=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=63 REMAP_PORT_17=62 REMAP_PORT_18=61 REMAP_PORT_19=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=59 REMAP_PORT_21=58 REMAP_PORT_22=57 REMAP_PORT_23=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=55 REMAP_PORT_25=54 REMAP_PORT_26=53 REMAP_PORT_27=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=51 REMAP_PORT_29=50 REMAP_PORT_30=49 REMAP_PORT_31=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=47 REMAP_PORT_33=46 REMAP_PORT_34=45 REMAP_PORT_35=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=43 REMAP_PORT_37=42 REMAP_PORT_38=41 REMAP_PORT_39=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=39 REMAP_PORT_41=38 REMAP_PORT_42=37 REMAP_PORT_43=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=35 REMAP_PORT_45=34 REMAP_PORT_46=33 REMAP_PORT_47=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 REMAP_PORT_49=14 REMAP_PORT_50=13 REMAP_PORT_51=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 REMAP_PORT_53=10 REMAP_PORT_54=9 REMAP_PORT_55=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 + +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=35 REMAP_PORT_1=34 REMAP_PORT_2=33 REMAP_PORT_3=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=39 REMAP_PORT_5=38 REMAP_PORT_6=37 REMAP_PORT_7=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=43 REMAP_PORT_9=42 REMAP_PORT_10=41 REMAP_PORT_11=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=47 REMAP_PORT_13=46 REMAP_PORT_14=45 REMAP_PORT_15=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=3 REMAP_PORT_17=2 REMAP_PORT_18=1 REMAP_PORT_19=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=7 REMAP_PORT_21=6 REMAP_PORT_22=5 REMAP_PORT_23=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=11 REMAP_PORT_25=10 REMAP_PORT_26=9 REMAP_PORT_27=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=15 REMAP_PORT_29=14 REMAP_PORT_30=13 REMAP_PORT_31=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=19 REMAP_PORT_33=18 REMAP_PORT_34=17 REMAP_PORT_35=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=23 REMAP_PORT_37=22 REMAP_PORT_38=21 REMAP_PORT_39=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=27 REMAP_PORT_41=26 REMAP_PORT_42=25 REMAP_PORT_43=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=31 REMAP_PORT_45=30 REMAP_PORT_46=29 REMAP_PORT_47=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 REMAP_PORT_49=50 REMAP_PORT_50=49 REMAP_PORT_51=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 REMAP_PORT_53=54 REMAP_PORT_54=53 REMAP_PORT_55=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 REMAP_PORT_57=58 REMAP_PORT_58=57 REMAP_PORT_59=56 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=62 REMAP_PORT_62=61 REMAP_PORT_63=60 + +led 0 prog 06 EE 80 D2 0A 71 08 E0 60 EE E9 D2 05 75 10 81 61 ED 02 00 12 A0 F8 15 67 22 F2 01 D2 40 74 14 3A 80 28 32 08 97 71 2A 77 65 1A 07 71 30 77 3C 1A 02 27 1A 03 27 C7 97 71 5E 77 4A 28 32 00 32 01 B7 26 ED C7 97 75 50 77 65 1A 02 71 50 77 57 32 0E 87 32 0F 87 57 32 0F 87 32 0E 87 57 32 0E 87 32 0E 87 57 32 0F 87 32 0F 87 57 + +led 0 start + +led 1 prog 06 EE 80 D2 0A 71 08 E0 60 EE E9 D2 05 75 10 81 61 ED 02 00 12 A0 F8 15 67 22 F2 01 D2 40 74 14 3A 80 28 32 08 97 71 2A 77 65 1A 07 71 30 77 3C 1A 02 27 1A 03 27 C7 97 71 5E 77 4A 28 32 00 32 01 B7 26 ED C7 97 75 50 77 65 1A 02 71 50 77 57 32 0E 87 32 0F 87 57 32 0F 87 32 0E 87 57 32 0E 87 32 0E 87 57 32 0F 87 32 0F 87 57 + +led 1 start + +led auto on diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/eeprom.py b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/eeprom.py new file mode 100644 index 00000000000..96dcc597532 --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/2-0050/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/2-0050/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/sfputil.py b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/sfputil.py new file mode 100644 index 00000000000..33e98016384 --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/sfputil.py @@ -0,0 +1,190 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 31 + PORTS_IN_BLOCK = 32 + + EEPROM_OFFSET = 10 + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + if port_num > 16: + cpld_addr=33 + else: + cpld_addr=32 + + file_path="/sys/bus/i2c/devices/1-00" + str(cpld_addr) + "/port" + str(port_num) + "/port" + str(port_num) + "_present" + + try: + reg_file = open("file_path") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + + # ModPrsL is active low + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + if port_num > 16: + cpld_addr=33 + else: + cpld_addr=32 + + + file_path="/sys/bus/i2c/devices/1-00" + str(cpld_addr) + "/port" + str(port_num) + "/port" + str(port_num) + "_lpmode" + + try: + reg_file = open(file_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # LPMode is active high + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + if port_num > 16: + cpld_addr=33 + else: + cpld_addr=32 + + file_path="/sys/bus/i2c/devices/1-00" + str(cpld_num) + "/port" + str(port_num) + "/port" + str(port_num) + "_lpmode" + + try: + reg_file = open(file_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + # Convert our register value back to a hex string and write back + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + if port_num > 16: + cpld_addr=33 + else: + cpld_addr=32 + + file_path="/sys/bus/i2c/devices/1-00" + str(cpld_num) + "/port" + str(port_num) + "/port" + str(port_num) + "_rst" + + try: + reg_file = open(file_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # ResetL is active low + reg_value = 0 + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/default_sku b/device/pegatron/x86_64-pegatron_porsche-r0/default_sku new file mode 100644 index 00000000000..6b47d90d1cf --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/default_sku @@ -0,0 +1 @@ +porsche t1 diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/installer.conf b/device/pegatron/x86_64-pegatron_porsche-r0/installer.conf new file mode 100755 index 00000000000..14404194ef5 --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/plugins/eeprom.py b/device/pegatron/x86_64-pegatron_porsche-r0/plugins/eeprom.py new file mode 100755 index 00000000000..6964c6bade4 --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/4-0054/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/plugins/psuutil.py b/device/pegatron/x86_64-pegatron_porsche-r0/plugins/psuutil.py new file mode 100755 index 00000000000..a23a7b7fe73 --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/plugins/psuutil.py @@ -0,0 +1,92 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + SYSFS_PSU_DIR = "/sys/bus/i2c/devices/7-0075" + + def __init__(self): + PsuBase.__init__(self) + + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + + fd.close() + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psu_'+str(index)+'_status' + attr_path = self.SYSFS_PSU_DIR +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU status + if (attr_value == 1): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + attr_file = 'psu_'+str(index)+'_present' + attr_path = self.SYSFS_PSU_DIR +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU presence + if (attr_value == 0): + status = 1 + + return status + diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/plugins/sfputil.py b/device/pegatron/x86_64-pegatron_porsche-r0/plugins/sfputil.py new file mode 100755 index 00000000000..28909f00110 --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/plugins/sfputil.py @@ -0,0 +1,238 @@ +#!/usr/bin/env python + +try: + import os + import re + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class SfpUtil(SfpUtilBase): + """Platform specific sfputil class""" + + port_start = 0 + port_end = 53 + ports_in_block = 54 + cplda_sfp_num = 24 + cpldb_sfp_num = 12 + cpldc_sfp_num = 18 + + port_to_eeprom_mapping = {} + port_to_i2c_mapping = {} + sfp_ports = range(0, ports_in_block) + qsfp_ports = range(ports_in_block - 6, ports_in_block) + + + def __init__(self): + for x in range(self.port_start, self.port_end + 1): + if x < self.cpldb_sfp_num: + self.port_to_i2c_mapping.update({x:7}) + elif x < self.cplda_sfp_num + self.cpldb_sfp_num: + self.port_to_i2c_mapping.update({x:6}) + else: + self.port_to_i2c_mapping.update({x:8}) + + for x in range(self.port_start, self.port_end+1): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/sfp'+str(x+1)+'_eeprom' + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + + def get_presence(self, port_num): + if port_num < self.port_start or port_num > self.port_end: + return False + + if port_num < self.cpldb_sfp_num: + presence_path = '/sys/bus/i2c/devices/7-0075/sfp'+str(port_num+1)+'_present' + elif port_num < self.cpldb_sfp_num + self.cplda_sfp_num: + presence_path = '/sys/bus/i2c/devices/6-0074/sfp'+str(port_num+1)+'_present' + else: + presence_path = '/sys/bus/i2c/devices/8-0076/sfp'+str(port_num+1)+'_present' + + try: + file = open(presence_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + value = int(file.readline().rstrip()) + + file.close() + if value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + if port_num not in self.qsfp_ports: + return False + + lowpower_path = '/sys/bus/i2c/devices/8-0076/sfp'+str(port_num+1)+'_lowpower' + + try: + file = open(lowpower_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + value = int(file.readline().rstrip()) + + file.close() + if value == 1: + return True + + return False + + def set_low_power_mode(self, port_num, lpmode): + if port_num not in self.qsfp_ports: + return False + + lowpower_path = '/sys/bus/i2c/devices/8-0076/sfp'+str(port_num+1)+'_lowpower' + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + value = 1 + else: + value = 0 + + try: + file = open(lowpower_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + file.seek(0) + file.write(str(value)) + file.close() + + return True + + def reset(self, port_num): + if port_num not in self.qsfp_ports: + return False + reset_path = '/sys/bus/i2c/devices/8-0076/sfp'+str(port_num+1)+'_reset' + + try: + file = open(reset_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + file.seek(0) + file.write(str(2)) + file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + try: + file = open(reset_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + file.seek(0) + file.write(str(1)) + file.close() + + return True + + def read_porttab_mappings(self, porttabfile): + logical = [] + logical_to_bcm = {} + logical_to_physical = {} + physical_to_logical = {} + last_fp_port_index = 0 + last_portname = "" + first = 1 + port_pos_in_file = 0 + parse_fmt_port_config_ini = False + + try: + f = open(porttabfile) + except: + raise + + parse_fmt_port_config_ini = (os.path.basename(porttabfile) == "port_config.ini") + + # Read the porttab file and generate dicts + # with mapping for future reference. + # XXX: move the porttab + # parsing stuff to a separate module, or reuse + # if something already exists + for line in f: + line.strip() + if re.search("^#", line) is not None: + continue + + # Parsing logic for 'port_config.ini' file + if (parse_fmt_port_config_ini): + # bcm_port is not explicitly listed in port_config.ini format + # Currently we assume ports are listed in numerical order according to bcm_port + # so we use the port's position in the file (zero-based) as bcm_port + portname = line.split()[0] + + bcm_port = str(port_pos_in_file) + + if len(line.split()) >= 4: + fp_port_index = int(line.split()[3]) + else: + fp_port_index = portname.split("Ethernet").pop() + fp_port_index = int(fp_port_index.split("s").pop(0))/4 + else: # Parsing logic for older 'portmap.ini' file + (portname, bcm_port) = line.split("=")[1].split(",")[:2] + + fp_port_index = portname.split("Ethernet").pop() + fp_port_index = int(fp_port_index.split("s").pop(0))/4 + + if ((len(self.sfp_ports) > 0) and (fp_port_index not in self.sfp_ports)): + continue + + if first == 1: + # Initialize last_[physical|logical]_port + # to the first valid port + last_fp_port_index = fp_port_index + last_portname = portname + first = 0 + + logical.append(portname) + + logical_to_bcm[portname] = "xe" + bcm_port + logical_to_physical[portname] = [fp_port_index] + if physical_to_logical.get(fp_port_index) is None: + physical_to_logical[fp_port_index] = [portname] + else: + physical_to_logical[fp_port_index].append( + portname) + + if (fp_port_index - last_fp_port_index) > 1: + # last port was a gang port + for p in range(last_fp_port_index+1, fp_port_index): + logical_to_physical[last_portname].append(p) + if physical_to_logical.get(p) is None: + physical_to_logical[p] = [last_portname] + else: + physical_to_logical[p].append(last_portname) + + last_fp_port_index = fp_port_index + last_portname = portname + + port_pos_in_file += 1 + + self.logical = logical + self.logical_to_bcm = logical_to_bcm + self.logical_to_physical = logical_to_physical + self.physical_to_logical = physical_to_logical + + """ + print "logical: " + self.logical + print "logical to bcm: " + self.logical_to_bcm + print "logical to physical: " + self.logical_to_physical + print "physical to logical: " + self.physical_to_logical + """ + + + diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/porsche/port_config.ini b/device/pegatron/x86_64-pegatron_porsche-r0/porsche/port_config.ini new file mode 100755 index 00000000000..15fc6037594 --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/porsche/port_config.ini @@ -0,0 +1,55 @@ +#name lanes alias index speed +Ethernet0 8 Ethernet1/1 0 10000 +Ethernet1 9 Ethernet2/1 1 10000 +Ethernet2 10 Ethernet3/1 2 10000 +Ethernet3 11 Ethernet4/1 3 10000 +Ethernet4 12 Ethernet5/1 4 10000 +Ethernet5 13 Ethernet6/1 5 10000 +Ethernet6 14 Ethernet7/1 6 10000 +Ethernet7 15 Ethernet8/1 7 10000 +Ethernet8 16 Ethernet9/1 8 10000 +Ethernet9 17 Ethernet10/1 9 10000 +Ethernet10 18 Ethernet11/1 10 10000 +Ethernet11 19 Ethernet12/1 11 10000 +Ethernet12 20 Ethernet13/1 12 10000 +Ethernet13 21 Ethernet14/1 13 10000 +Ethernet14 22 Ethernet15/1 14 10000 +Ethernet15 23 Ethernet16/1 15 10000 +Ethernet16 32 Ethernet17/1 16 10000 +Ethernet17 33 Ethernet18/1 17 10000 +Ethernet18 34 Ethernet19/1 18 10000 +Ethernet19 35 Ethernet20/1 19 10000 +Ethernet20 40 Ethernet21/1 20 10000 +Ethernet21 41 Ethernet22/1 21 10000 +Ethernet22 42 Ethernet23/1 22 10000 +Ethernet23 43 Ethernet24/1 23 10000 +Ethernet24 48 Ethernet25/1 24 10000 +Ethernet25 49 Ethernet26/1 25 10000 +Ethernet26 50 Ethernet27/1 26 10000 +Ethernet27 51 Ethernet28/1 27 10000 +Ethernet28 56 Ethernet29/1 28 10000 +Ethernet29 57 Ethernet30/1 29 10000 +Ethernet30 58 Ethernet31/1 30 10000 +Ethernet31 59 Ethernet32/1 31 10000 +Ethernet32 64 Ethernet33/1 32 10000 +Ethernet33 65 Ethernet34/1 33 10000 +Ethernet34 66 Ethernet35/1 34 10000 +Ethernet35 67 Ethernet36/1 35 10000 +Ethernet36 68 Ethernet37/1 36 10000 +Ethernet37 69 Ethernet38/1 37 10000 +Ethernet38 70 Ethernet39/1 38 10000 +Ethernet39 71 Ethernet40/1 39 10000 +Ethernet40 72 Ethernet41/1 40 10000 +Ethernet41 73 Ethernet42/1 41 10000 +Ethernet42 74 Ethernet43/1 42 10000 +Ethernet43 75 Ethernet44/1 43 10000 +Ethernet44 76 Ethernet45/1 44 10000 +Ethernet45 77 Ethernet46/1 45 10000 +Ethernet46 78 Ethernet47/1 46 10000 +Ethernet47 79 Ethernet48/1 47 10000 +Ethernet48 80,81,82,83 Ethernet49/1 48 100000 +Ethernet49 84,85,86,87 Ethernet50/1 49 100000 +Ethernet50 104,105,106,107 Ethernet51/1 50 100000 +Ethernet51 108,109,110,111 Ethernet52/1 51 100000 +Ethernet52 112,113,114,115 Ethernet53/1 52 100000 +Ethernet53 116,117,118,119 Ethernet54/1 53 100000 diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/porsche/sai.profile b/device/pegatron/x86_64-pegatron_porsche-r0/porsche/sai.profile new file mode 100755 index 00000000000..f19a366b1ca --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/porsche/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/platform/tau-porsche.cfg +SAI_DSH_CONFIG_FILE=/usr/share/sonic/hwsku/tau-porsche.dsh diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/porsche/tau-porsche.dsh b/device/pegatron/x86_64-pegatron_porsche-r0/porsche/tau-porsche.dsh new file mode 100755 index 00000000000..b370fe83b83 --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/porsche/tau-porsche.dsh @@ -0,0 +1,497 @@ +init start stage unit=0 low-level +init set port-map unit=0 port=0 eth-macro=2 lane=0 max-speed=10g active=true +init set port-map unit=0 port=1 eth-macro=2 lane=1 max-speed=10g active=true +init set port-map unit=0 port=2 eth-macro=2 lane=2 max-speed=10g active=true +init set port-map unit=0 port=3 eth-macro=2 lane=3 max-speed=10g active=true +init set port-map unit=0 port=4 eth-macro=3 lane=0 max-speed=10g active=true +init set port-map unit=0 port=5 eth-macro=3 lane=1 max-speed=10g active=true +init set port-map unit=0 port=6 eth-macro=3 lane=2 max-speed=10g active=true +init set port-map unit=0 port=7 eth-macro=3 lane=3 max-speed=10g active=true +init set port-map unit=0 port=8 eth-macro=4 lane=0 max-speed=10g active=true +init set port-map unit=0 port=9 eth-macro=4 lane=1 max-speed=10g active=true +init set port-map unit=0 port=10 eth-macro=4 lane=2 max-speed=10g active=true +init set port-map unit=0 port=11 eth-macro=4 lane=3 max-speed=10g active=true +init set port-map unit=0 port=12 eth-macro=5 lane=0 max-speed=10g active=true +init set port-map unit=0 port=13 eth-macro=5 lane=1 max-speed=10g active=true +init set port-map unit=0 port=14 eth-macro=5 lane=2 max-speed=10g active=true +init set port-map unit=0 port=15 eth-macro=5 lane=3 max-speed=10g active=true +init set port-map unit=0 port=16 eth-macro=8 lane=0 max-speed=10g active=true +init set port-map unit=0 port=17 eth-macro=8 lane=1 max-speed=10g active=true +init set port-map unit=0 port=18 eth-macro=8 lane=2 max-speed=10g active=true +init set port-map unit=0 port=19 eth-macro=8 lane=3 max-speed=10g active=true +init set port-map unit=0 port=20 eth-macro=10 lane=0 max-speed=10g active=true +init set port-map unit=0 port=21 eth-macro=10 lane=1 max-speed=10g active=true +init set port-map unit=0 port=22 eth-macro=10 lane=2 max-speed=10g active=true +init set port-map unit=0 port=23 eth-macro=10 lane=3 max-speed=10g active=true +init set port-map unit=0 port=24 eth-macro=12 lane=0 max-speed=10g active=true +init set port-map unit=0 port=25 eth-macro=12 lane=1 max-speed=10g active=true +init set port-map unit=0 port=26 eth-macro=12 lane=2 max-speed=10g active=true +init set port-map unit=0 port=27 eth-macro=12 lane=3 max-speed=10g active=true +init set port-map unit=0 port=28 eth-macro=14 lane=0 max-speed=10g active=true +init set port-map unit=0 port=29 eth-macro=14 lane=1 max-speed=10g active=true +init set port-map unit=0 port=30 eth-macro=14 lane=2 max-speed=10g active=true +init set port-map unit=0 port=31 eth-macro=14 lane=3 max-speed=10g active=true +init set port-map unit=0 port=32 eth-macro=16 lane=0 max-speed=10g active=true +init set port-map unit=0 port=33 eth-macro=16 lane=1 max-speed=10g active=true +init set port-map unit=0 port=34 eth-macro=16 lane=2 max-speed=10g active=true +init set port-map unit=0 port=35 eth-macro=16 lane=3 max-speed=10g active=true +init set port-map unit=0 port=36 eth-macro=17 lane=0 max-speed=10g active=true +init set port-map unit=0 port=37 eth-macro=17 lane=1 max-speed=10g active=true +init set port-map unit=0 port=38 eth-macro=17 lane=2 max-speed=10g active=true +init set port-map unit=0 port=39 eth-macro=17 lane=3 max-speed=10g active=true +init set port-map unit=0 port=40 eth-macro=18 lane=0 max-speed=10g active=true +init set port-map unit=0 port=41 eth-macro=18 lane=1 max-speed=10g active=true +init set port-map unit=0 port=42 eth-macro=18 lane=2 max-speed=10g active=true +init set port-map unit=0 port=43 eth-macro=18 lane=3 max-speed=10g active=true +init set port-map unit=0 port=44 eth-macro=19 lane=0 max-speed=10g active=true +init set port-map unit=0 port=45 eth-macro=19 lane=1 max-speed=10g active=true +init set port-map unit=0 port=46 eth-macro=19 lane=2 max-speed=10g active=true +init set port-map unit=0 port=47 eth-macro=19 lane=3 max-speed=10g active=true +init set port-map unit=0 port=48 eth-macro=20 lane=0 max-speed=100g active=true +init set port-map unit=0 port=49 eth-macro=21 lane=0 max-speed=100g active=true +init set port-map unit=0 port=50 eth-macro=26 lane=0 max-speed=100g active=true +init set port-map unit=0 port=51 eth-macro=27 lane=0 max-speed=100g active=true +init set port-map unit=0 port=52 eth-macro=28 lane=0 max-speed=100g active=true +init set port-map unit=0 port=53 eth-macro=29 lane=0 max-speed=100g active=true init-done=true +init start stage unit=0 task-rsrc +init start stage unit=0 module +init start stage unit=0 task +phy set lane-swap unit=0 portlist=0 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=1 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=2 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=3 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=4 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=5 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=6 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=7 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=8 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=9 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=10 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=11 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=12 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=13 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=14 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=15 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=16 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=17 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=18 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=19 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=20 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=21 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=22 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=23 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=24 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=25 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=26 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=27 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=28 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=29 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=30 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=31 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=32 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=33 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=34 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=35 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=36 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=37 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=38 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=39 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=40 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=41 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=42 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=43 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=44 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=45 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=46 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=47 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=48 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=49 lane-cnt=4 property=tx data=0x01.02.03.00 +phy set lane-swap unit=0 portlist=50 lane-cnt=4 property=tx data=0x01.02.03.00 +phy set lane-swap unit=0 portlist=51 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=52 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=53 lane-cnt=4 property=tx data=0x01.02.03.00 +phy set lane-swap unit=0 portlist=0 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=1 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=2 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=3 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=4 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=5 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=6 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=7 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=8 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=9 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=10 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=11 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=12 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=13 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=14 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=15 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=16 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=17 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=18 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=19 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=20 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=21 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=22 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=23 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=24 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=25 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=26 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=27 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=28 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=29 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=30 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=31 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=32 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=33 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=34 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=35 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=36 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=37 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=38 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=39 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=40 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=41 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=42 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=43 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=44 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=45 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=46 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=47 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=48 lane-cnt=4 property=rx data=0x03.00.01.02 +phy set lane-swap unit=0 portlist=49 lane-cnt=4 property=rx data=0x03.00.01.02 +phy set lane-swap unit=0 portlist=50 lane-cnt=4 property=rx data=0x03.01.02.00 +phy set lane-swap unit=0 portlist=51 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=52 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=53 lane-cnt=4 property=rx data=0x00.01.02.03 +phy set polarity-rev unit=0 portlist=0 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=1 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=2 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=3 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=4 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=5 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=6 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=7 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=8 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=9 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=10 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=11 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=12 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=13 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=14 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=15 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=16 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=17 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=18 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=19 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=20 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=21 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=22 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=23 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=24 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=25 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=26 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=27 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=28 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=29 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=30 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=31 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=32 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=33 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=34 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=35 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=36 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=37 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=38 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=39 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=40 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=41 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=42 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=43 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=44 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=45 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=46 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=47 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=48 lane-cnt=4 property=tx data=0x00.01.00.00 +phy set polarity-rev unit=0 portlist=49 lane-cnt=4 property=tx data=0x00.00.01.00 +phy set polarity-rev unit=0 portlist=50 lane-cnt=4 property=tx data=0x01.00.01.01 +phy set polarity-rev unit=0 portlist=51 lane-cnt=4 property=tx data=0x01.01.01.01 +phy set polarity-rev unit=0 portlist=52 lane-cnt=4 property=tx data=0x01.00.00.00 +phy set polarity-rev unit=0 portlist=53 lane-cnt=4 property=tx data=0x00.00.01.00 +phy set polarity-rev unit=0 portlist=0 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=1 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=2 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=3 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=4 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=5 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=6 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=7 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=8 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=9 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=10 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=11 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=12 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=13 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=14 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=15 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=16 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=17 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=18 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=19 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=20 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=21 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=22 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=23 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=24 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=25 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=26 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=27 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=28 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=29 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=30 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=31 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=32 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=33 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=34 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=35 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=36 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=37 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=38 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=39 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=40 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=41 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=42 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=43 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=44 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=45 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=46 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=47 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=48 lane-cnt=4 property=rx data=0x00.01.00.00 +phy set polarity-rev unit=0 portlist=49 lane-cnt=4 property=rx data=0x00.00.01.00 +phy set polarity-rev unit=0 portlist=50 lane-cnt=4 property=rx data=0x00.00.01.01 +phy set polarity-rev unit=0 portlist=51 lane-cnt=4 property=rx data=0x00.01.00.01 +phy set polarity-rev unit=0 portlist=52 lane-cnt=4 property=rx data=0x00.01.00.01 +phy set polarity-rev unit=0 portlist=53 lane-cnt=4 property=rx data=0x01.01.01.01 +phy set pre-emphasis unit=0 portlist=0 lane-cnt=1 property=c2 data=0x00 +phy set pre-emphasis unit=0 portlist=0 lane-cnt=1 property=cn1 data=0x04 +phy set pre-emphasis unit=0 portlist=0 lane-cnt=1 property=c0 data=0x1E +phy set pre-emphasis unit=0 portlist=0 lane-cnt=1 property=c1 data=0x02 +phy set pre-emphasis unit=0 portlist=1 lane-cnt=1 property=c2 data=0x00 +phy set pre-emphasis unit=0 portlist=1 lane-cnt=1 property=cn1 data=0x04 +phy set pre-emphasis unit=0 portlist=1 lane-cnt=1 property=c0 data=0x1E +phy set pre-emphasis unit=0 portlist=1 lane-cnt=1 property=c1 data=0x02 +phy set pre-emphasis unit=0 portlist=2 lane-cnt=1 property=c2 data=0x00 +phy set pre-emphasis unit=0 portlist=2 lane-cnt=1 property=cn1 data=0x04 +phy set pre-emphasis unit=0 portlist=2 lane-cnt=1 property=c0 data=0x1E +phy set pre-emphasis unit=0 portlist=2 lane-cnt=1 property=c1 data=0x02 +phy set pre-emphasis unit=0 portlist=3 lane-cnt=1 property=c2 data=0x00 +phy set pre-emphasis unit=0 portlist=3 lane-cnt=1 property=cn1 data=0x04 +phy set pre-emphasis unit=0 portlist=3 lane-cnt=1 property=c0 data=0x1E +phy set pre-emphasis unit=0 portlist=3 lane-cnt=1 property=c1 data=0x02 +phy set pre-emphasis unit=0 portlist=4 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=4 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=4 lane-cnt=1 property=c0 data=0x1B +phy set pre-emphasis unit=0 portlist=4 lane-cnt=1 property=c1 data=0x07 +phy set pre-emphasis unit=0 portlist=5 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=5 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=5 lane-cnt=1 property=c0 data=0x1B +phy set pre-emphasis unit=0 portlist=5 lane-cnt=1 property=c1 data=0x07 +phy set pre-emphasis unit=0 portlist=6 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=6 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=6 lane-cnt=1 property=c0 data=0x1B +phy set pre-emphasis unit=0 portlist=6 lane-cnt=1 property=c1 data=0x07 +phy set pre-emphasis unit=0 portlist=7 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=7 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=7 lane-cnt=1 property=c0 data=0x1B +phy set pre-emphasis unit=0 portlist=7 lane-cnt=1 property=c1 data=0x07 +phy set pre-emphasis unit=0 portlist=8 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=8 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=8 lane-cnt=1 property=c0 data=0x1B +phy set pre-emphasis unit=0 portlist=8 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=9 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=9 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=9 lane-cnt=1 property=c0 data=0x1B +phy set pre-emphasis unit=0 portlist=9 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=10 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=10 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=10 lane-cnt=1 property=c0 data=0x1B +phy set pre-emphasis unit=0 portlist=10 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=11 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=11 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=11 lane-cnt=1 property=c0 data=0x1B +phy set pre-emphasis unit=0 portlist=11 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=12 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=12 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=12 lane-cnt=1 property=c0 data=0x1B +phy set pre-emphasis unit=0 portlist=12 lane-cnt=1 property=c1 data=0x07 +phy set pre-emphasis unit=0 portlist=13 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=13 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=13 lane-cnt=1 property=c0 data=0x1B +phy set pre-emphasis unit=0 portlist=13 lane-cnt=1 property=c1 data=0x07 +phy set pre-emphasis unit=0 portlist=14 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=14 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=14 lane-cnt=1 property=c0 data=0x1B +phy set pre-emphasis unit=0 portlist=14 lane-cnt=1 property=c1 data=0x07 +phy set pre-emphasis unit=0 portlist=15 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=15 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=15 lane-cnt=1 property=c0 data=0x1B +phy set pre-emphasis unit=0 portlist=15 lane-cnt=1 property=c1 data=0x07 +phy set pre-emphasis unit=0 portlist=16 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=16 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=16 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=16 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=17 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=17 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=17 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=17 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=18 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=18 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=18 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=18 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=19 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=19 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=19 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=19 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=20 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=20 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=20 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=20 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=21 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=21 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=21 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=21 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=22 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=22 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=22 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=22 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=23 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=23 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=23 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=23 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=24 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=24 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=24 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=24 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=25 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=25 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=25 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=25 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=26 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=26 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=26 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=26 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=27 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=27 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=27 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=27 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=28 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=28 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=28 lane-cnt=1 property=c0 data=0x1D +phy set pre-emphasis unit=0 portlist=28 lane-cnt=1 property=c1 data=0x05 +phy set pre-emphasis unit=0 portlist=29 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=29 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=29 lane-cnt=1 property=c0 data=0x1D +phy set pre-emphasis unit=0 portlist=29 lane-cnt=1 property=c1 data=0x05 +phy set pre-emphasis unit=0 portlist=30 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=30 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=30 lane-cnt=1 property=c0 data=0x1D +phy set pre-emphasis unit=0 portlist=30 lane-cnt=1 property=c1 data=0x05 +phy set pre-emphasis unit=0 portlist=31 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=31 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=31 lane-cnt=1 property=c0 data=0x1D +phy set pre-emphasis unit=0 portlist=31 lane-cnt=1 property=c1 data=0x05 +phy set pre-emphasis unit=0 portlist=32 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=32 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=32 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=32 lane-cnt=1 property=c1 data=0x05 +phy set pre-emphasis unit=0 portlist=33 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=33 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=33 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=33 lane-cnt=1 property=c1 data=0x05 +phy set pre-emphasis unit=0 portlist=34 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=34 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=34 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=34 lane-cnt=1 property=c1 data=0x05 +phy set pre-emphasis unit=0 portlist=35 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=35 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=35 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=35 lane-cnt=1 property=c1 data=0x05 +phy set pre-emphasis unit=0 portlist=36 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=36 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=36 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=36 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=37 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=37 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=37 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=37 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=38 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=38 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=38 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=38 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=39 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=39 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=39 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=39 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=40 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=40 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=40 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=40 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=41 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=41 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=41 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=41 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=42 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=42 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=42 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=42 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=43 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=43 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=43 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=43 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=44 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=44 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=44 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=44 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=45 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=45 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=45 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=45 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=46 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=46 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=46 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=46 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=47 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=47 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=47 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=47 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=c0 data=0x1A.1A.1A.1A +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=c1 data=0x07.07.07.07 +port set property unit=0 portlist=0-47 speed=10g +port set property unit=0 portlist=0-47 medium-type=sr +port set property unit=0 portlist=48-53 speed=100g +port set property unit=0 portlist=48-53 medium-type=sr4 +port set property unit=0 portlist=0-53 fec=disable +port set property unit=0 portlist=0-53 an=disable +port set property unit=0 portlist=0-53 admin=enable \ No newline at end of file diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/tau-porsche.cfg b/device/pegatron/x86_64-pegatron_porsche-r0/tau-porsche.cfg new file mode 100755 index 00000000000..bbd7c8f80ff --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/tau-porsche.cfg @@ -0,0 +1,23 @@ +#This configuration file is for customer init value feature. Please refer to mtk_cfg.h/mtk_cfg.c for detail. +#1. The lines beginning with # are comment lines. The lines beginning with number are the setting lines. +#2. There are five parameters which can be set. +# 1) the first is unit. +# 2) the second is NPS_CFG_TYPE_XXX. Refer to NPS_CFG_TYPE_T. +# 3) the 3-5 are {param0, param1, value} pairs. Refer to NPS_CFG_VALUE_T. Support HEX format. +# 4) the (unit, NPS_CFG_TYPE_XXX, param0, param1) group is the key to get the correspingding value. +# There should be no same (unit, NPS_CFG_TYPE_XXX, param0, param1) group. +#3. User must follow correct format to apply the setting. Please refer to below commentted example(#0 NPS_CFG_TYPE_L2_ADDR_MODE 0 0 1); +#4. Usage under the linux shell: +# 1) ./image-path/image-name -c cfg-path/NPS_Ari_EVB_24.cfg : mamually specify directory path if they are not in current work dirctory. +# 2) ./image-name -c NPS_Ari_EVB_24.cfg : the image and the NPS_Ari_EVB_24.cfg are in the current work directory. + +#unit NPS_CFG_TYPE_XXX param0 param1 value +#---- ---------------- ------ ------ ----- +0 NPS_CFG_TYPE_USE_UNIT_PORT 0 0 1 +0 NPS_CFG_TYPE_LED_CFG 0 0 3 +0 NPS_CFG_TYPE_CPI_PORT_MODE 129 0 1 +0 NPS_CFG_TYPE_CPI_PORT_MODE 130 0 1 +0 NPS_CFG_TYPE_USER_BUF_CTRL 0 0 1 +0 NPS_CFG_TYPE_HASH_L2_FDB_REGION_ENTRY_NUM 0 0 49152 +0 NPS_CFG_TYPE_HASH_L3_WITH_IPV6_PREFIX_64_REGION_ENTRY_NUM 0 0 32768 + diff --git a/device/quanta/x86_64-quanta_ix1b_32x-r0/default_sku b/device/quanta/x86_64-quanta_ix1b_32x-r0/default_sku new file mode 100644 index 00000000000..68cbc0d6058 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix1b_32x-r0/default_sku @@ -0,0 +1 @@ +Quanta-IX1B-32X t1 diff --git a/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/port_config.ini b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/port_config.ini new file mode 100755 index 00000000000..4f4f63925d8 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias +Ethernet0 65,66,67,68 hundredGigE1 +Ethernet4 69,70,71,72 hundredGigE2 +Ethernet8 73,74,75,76 hundredGigE3 +Ethernet12 77,78,79,80 hundredGigE4 +Ethernet16 45,46,47,48 hundredGigE5 +Ethernet20 41,42,43,44 hundredGigE6 +Ethernet24 53,54,55,56 hundredGigE7 +Ethernet28 49,50,51,52 hundredGigE8 +Ethernet32 61,62,63,64 hundredGigE9 +Ethernet36 57,58,59,60 hundredGigE10 +Ethernet40 37,38,39,40 hundredGigE11 +Ethernet44 33,34,35,36 hundredGigE12 +Ethernet48 81,82,83,84 hundredGigE13 +Ethernet52 85,86,87,88 hundredGigE14 +Ethernet56 89,90,91,92 hundredGigE15 +Ethernet60 93,94,95,96 hundredGigE16 +Ethernet64 97,98,99,100 hundredGigE17 +Ethernet68 101,102,103,104 hundredGigE18 +Ethernet72 105,106,107,108 hundredGigE19 +Ethernet76 109,110,111,112 hundredGigE20 +Ethernet80 29,30,31,32 hundredGigE21 +Ethernet84 25,26,27,28 hundredGigE22 +Ethernet88 5,6,7,8 hundredGigE23 +Ethernet92 1,2,3,4 hundredGigE24 +Ethernet96 13,14,15,16 hundredGigE25 +Ethernet100 9,10,11,12 hundredGigE26 +Ethernet104 21,22,23,24 hundredGigE27 +Ethernet108 17,18,19,20 hundredGigE28 +Ethernet112 113,114,115,116 hundredGigE29 +Ethernet116 117,118,119,120 hundredGigE30 +Ethernet120 121,122,123,124 hundredGigE31 +Ethernet124 125,126,127,128 hundredGigE32 diff --git a/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/sai.profile b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/sai.profile new file mode 100755 index 00000000000..fbd01105a4f --- /dev/null +++ b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-ix1b-32x100G.config.bcm diff --git a/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/th-ix1b-32x100G.config.bcm b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/th-ix1b-32x100G.config.bcm new file mode 100644 index 00000000000..051b8ed71e8 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/Quanta-IX1B-32X/th-ix1b-32x100G.config.bcm @@ -0,0 +1,256 @@ +os=unix + +pbmp_xport_xe=0x3fd000000ff4000003fc000001fe +pbmp_oversubscribe=0x3fd000000ff4000003fc000001fe +l2xmsg_mode=1 + +schan_intr_enable=0 + +# Control to disable parity messages +parity_enable=1 + +# Control to disable parity correction +parity_correction=1 + +ipv6_lpm_128b_enable=1 +l3_alpm_enable=2 + +l2_mem_entries=40960 +l3_mem_entries=40960 + +portmap_1=1:100 +portmap_2=5:100 +portmap_3=9:100 +portmap_4=13:100 +portmap_5=17:100 +portmap_6=21:100 +portmap_7=25:100 +portmap_8=29:100 +portmap_34=33:100 +portmap_35=37:100 +portmap_36=41:100 +portmap_37=45:100 +portmap_38=49:100 +portmap_39=53:100 +portmap_40=57:100 +portmap_41=61:100 +portmap_68=65:100 +portmap_69=69:100 +portmap_70=73:100 +portmap_71=77:100 +portmap_72=81:100 +portmap_73=85:100 +portmap_74=89:100 +portmap_75=93:100 +portmap_102=97:100 +portmap_103=101:100 +portmap_104=105:100 +portmap_105=109:100 +portmap_106=113:100 +portmap_107=117:100 +portmap_108=121:100 +portmap_109=125:100 + +portmap_66=129:10 +portmap_100=131:10 +portmap_33=132:10 +portmap_67=133:10 +portmap_101=134:10 +portmap_135=135:10 + + +mem_cache_enable=1 +ctr_evict_enable=0 + +#mdio setting +rate_ext_mdio_divisor=0x2f +mdio_output_delay=15 + +#lanes swap and polarity +xgxs_rx_lane_map_1=0x3120 +phy_xaui_rx_polarity_flip_1=0xa +xgxs_tx_lane_map_1=0x1230 +phy_xaui_tx_polarity_flip_1=0x7 + +xgxs_rx_lane_map_2=0x3120 +phy_xaui_rx_polarity_flip_2=0xc +xgxs_tx_lane_map_2=0x0213 +phy_xaui_tx_polarity_flip_2=0x5 + +xgxs_rx_lane_map_3=0x2013 +phy_xaui_rx_polarity_flip_3=0xb +xgxs_tx_lane_map_3=0x3120 +phy_xaui_tx_polarity_flip_3=0x6 + +xgxs_rx_lane_map_4=0x2103 +phy_xaui_rx_polarity_flip_4=0xf +xgxs_tx_lane_map_4=0x3201 +phy_xaui_tx_polarity_flip_4=0x5 + +xgxs_rx_lane_map_5=0x1032 +phy_xaui_rx_polarity_flip_5=0x7 +xgxs_tx_lane_map_5=0x1302 +phy_xaui_tx_polarity_flip_5=0x0 + +xgxs_rx_lane_map_6=0x2103 +phy_xaui_rx_polarity_flip_6=0x3 +xgxs_tx_lane_map_6=0x3120 +phy_xaui_tx_polarity_flip_6=0x2 + +xgxs_rx_lane_map_7=0x0123 +phy_xaui_rx_polarity_flip_7=0x5 +xgxs_tx_lane_map_7=0x3012 +phy_xaui_tx_polarity_flip_7=0x3 + +xgxs_rx_lane_map_8=0x1032 +phy_xaui_rx_polarity_flip_8=0xf +xgxs_tx_lane_map_8=0x3120 +phy_xaui_tx_polarity_flip_8=0x2 + +xgxs_rx_lane_map_34=0x3021 +phy_xaui_rx_polarity_flip_34=0xa +xgxs_tx_lane_map_34=0x3210 +phy_xaui_tx_polarity_flip_34=0xf + +xgxs_rx_lane_map_35=0x2103 +phy_xaui_rx_polarity_flip_35=0x6 +xgxs_tx_lane_map_35=0x3120 +phy_xaui_tx_polarity_flip_35=0x5 + +xgxs_rx_lane_map_36=0x0312 +phy_xaui_rx_polarity_flip_36=0x4 +xgxs_tx_lane_map_36=0x3210 +phy_xaui_tx_polarity_flip_36=0x2 + +xgxs_rx_lane_map_37=0x0231 +phy_xaui_rx_polarity_flip_37=0x4 +xgxs_tx_lane_map_37=0x1032 +phy_xaui_tx_polarity_flip_37=0x2 + +xgxs_rx_lane_map_38=0x3012 +phy_xaui_rx_polarity_flip_38=0xa +xgxs_tx_lane_map_38=0x2103 +phy_xaui_tx_polarity_flip_38=0xd + +xgxs_rx_lane_map_39=0x0123 +phy_xaui_rx_polarity_flip_39=0x9 +xgxs_tx_lane_map_39=0x3120 +phy_xaui_tx_polarity_flip_39=0xd + +xgxs_rx_lane_map_40=0x2310 +phy_xaui_rx_polarity_flip_40=0x6 +xgxs_tx_lane_map_40=0x0123 + +xgxs_rx_lane_map_41=0x1230 +phy_xaui_rx_polarity_flip_41=0xa +xgxs_tx_lane_map_41=0x0123 +phy_xaui_tx_polarity_flip_41=0xe + +xgxs_rx_lane_map_68=0x1230 +phy_xaui_rx_polarity_flip_68=0xb +xgxs_tx_lane_map_68=0x3012 +phy_xaui_tx_polarity_flip_68=0xa + +xgxs_rx_lane_map_69=0x2310 +phy_xaui_rx_polarity_flip_69=0xf +xgxs_tx_lane_map_69=0x3120 +phy_xaui_tx_polarity_flip_69=0x2 + +xgxs_rx_lane_map_70=0x2310 +phy_xaui_rx_polarity_flip_70=0xe +xgxs_tx_lane_map_70=0x0213 +phy_xaui_tx_polarity_flip_70=0x2 + +xgxs_rx_lane_map_71=0x2130 +phy_xaui_rx_polarity_flip_71=0x5 +xgxs_tx_lane_map_71=0x3210 + +phy_xaui_rx_polarity_flip_72=0xa +xgxs_tx_lane_map_72=0x1230 + +xgxs_rx_lane_map_73=0x0213 +phy_xaui_rx_polarity_flip_73=0x5 +xgxs_tx_lane_map_73=0x1320 +phy_xaui_tx_polarity_flip_73=0x3 + +xgxs_rx_lane_map_74=0x2310 +phy_xaui_rx_polarity_flip_74=0xe +xgxs_tx_lane_map_74=0x2310 +phy_xaui_tx_polarity_flip_74=0xc + +xgxs_rx_lane_map_75=0x0321 +xgxs_tx_lane_map_75=0x2130 +phy_xaui_tx_polarity_flip_75=0x6 + +xgxs_rx_lane_map_102=0x1302 +phy_xaui_rx_polarity_flip_102=0x4 +xgxs_tx_lane_map_102=0x0123 +phy_xaui_tx_polarity_flip_102=0xa + +xgxs_tx_lane_map_103=0x2130 +phy_xaui_tx_polarity_flip_103=0x8 + +xgxs_rx_lane_map_104=0x1302 +phy_xaui_rx_polarity_flip_104=0xd +xgxs_tx_lane_map_104=0x1302 +phy_xaui_tx_polarity_flip_104=0x2 + +xgxs_rx_lane_map_105=0x1230 +phy_xaui_rx_polarity_flip_105=0x8 +xgxs_tx_lane_map_105=0x1320 + +xgxs_rx_lane_map_106=0x3120 +phy_xaui_rx_polarity_flip_106=0xc +xgxs_tx_lane_map_106=0x3120 +phy_xaui_tx_polarity_flip_106=0x0 + +xgxs_rx_lane_map_107=0x0321 +phy_xaui_rx_polarity_flip_107=0xa +xgxs_tx_lane_map_107=0x1032 +phy_xaui_tx_polarity_flip_107=0xf + +xgxs_rx_lane_map_108=0x0321 +phy_xaui_rx_polarity_flip_108=0xf +xgxs_tx_lane_map_108=0x3210 +phy_xaui_tx_polarity_flip_108=0x0 + +xgxs_rx_lane_map_109=0x0321 +phy_xaui_rx_polarity_flip_109=0xa +xgxs_tx_lane_map_109=0x3021 +phy_xaui_tx_polarity_flip_109=0x3 + +dport_map_port_68=1 +dport_map_port_69=2 +dport_map_port_70=3 +dport_map_port_71=4 +dport_map_port_37=5 +dport_map_port_36=6 +dport_map_port_39=7 +dport_map_port_38=8 +dport_map_port_41=9 +dport_map_port_40=10 +dport_map_port_35=11 +dport_map_port_34=12 +dport_map_port_72=13 +dport_map_port_73=14 +dport_map_port_74=15 +dport_map_port_75=16 +dport_map_port_102=17 +dport_map_port_103=18 +dport_map_port_104=19 +dport_map_port_105=20 +dport_map_port_8=21 +dport_map_port_7=22 +dport_map_port_2=23 +dport_map_port_1=24 +dport_map_port_4=25 +dport_map_port_3=26 +dport_map_port_6=27 +dport_map_port_5=28 +dport_map_port_106=29 +dport_map_port_107=30 +dport_map_port_108=31 +dport_map_port_109=32 +dport_map_port_66=33 +dport_map_port_100=34 + diff --git a/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/default_sku b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/default_sku new file mode 100755 index 00000000000..68cbc0d6058 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/default_sku @@ -0,0 +1 @@ +Quanta-IX1B-32X t1 diff --git a/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/installer.conf b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/installer.conf new file mode 100755 index 00000000000..14404194ef5 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/led_proc_init.soc b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/led_proc_init.soc new file mode 100755 index 00000000000..831f74df755 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/led_proc_init.soc @@ -0,0 +1,10 @@ +led 0 stop +led 1 stop + +led 0 prog 02 00 60 E2 D2 40 71 12 12 F0 85 05 D2 0A 71 19 52 00 67 1B 06 E2 80 77 02 3A 80 67 20 67 2E 57 06 E2 12 00 F0 80 F8 15 1A 00 75 4E 77 52 06 E2 F0 12 00 F8 15 1A 00 75 3B 77 46 06 E2 F0 12 00 F8 15 1A 01 75 4E 16 F0 DA 05 75 4E 77 52 32 0F 87 57 32 0E 87 57 00 00 00 00 00 00 00 00 00 00 +led 1 prog 02 00 60 E2 D2 40 71 12 12 F0 85 05 D2 0A 71 19 52 00 67 1B 06 E2 80 77 02 3A 80 67 20 67 2E 57 06 E2 12 00 F0 80 F8 15 1A 00 75 4E 77 52 06 E2 F0 12 00 F8 15 1A 00 75 3B 77 46 06 E2 F0 12 00 F8 15 1A 01 75 4E 16 F0 DA 05 75 4E 77 52 32 0F 87 57 32 0E 87 57 00 00 00 00 00 00 00 00 00 00 + +led 0 auto on +led 1 auto on +led 0 start +led 1 start \ No newline at end of file diff --git a/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/eeprom.py b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/eeprom.py new file mode 100755 index 00000000000..989f7fe5079 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/22-0054/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/psuutil.py b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/psuutil.py new file mode 100755 index 00000000000..1986aa846c5 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/psuutil.py @@ -0,0 +1,170 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path +import subprocess +import logging + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +DEBUG = False + +def show_log(txt): + if DEBUG == True: + print("[IX2]"+txt) + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + try: + output = subprocess.check_output(cmd, shell=True) + show_log (cmd +"output:"+str(output)) + except subprocess.CalledProcessError as e: + logging.info("Failed :"+cmd) + if show: + print("Failed :"+cmd +"returncode = {}, err msg: {}".format(e.returncode, e.output)) + return output + +def my_log(txt): + if DEBUG == True: + print("[QUANTA DBG]: "+txt) + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status = 1 + output = "" + try: + output = subprocess.check_output(cmd, shell=True) + my_log (cmd +"output:"+str(output)) + except subprocess.CalledProcessError as e: + logging.info('Failed :'+cmd) + if show: + print("Failed :"+cmd +"returncode = {}, err msg: {}".format(e.returncode, e.output)) + return output + +def gpio16_exist(): + ls = log_os_system("ls /sys/class/gpio/ | grep gpio16", 0) + logging.info('mods:'+ls) + if len(ls) ==0: + return False + +def gpio17_exist(): + ls = log_os_system("ls /sys/class/gpio/ | grep gpio17", 0) + logging.info('mods:'+ls) + if len(ls) ==0: + return False + +def gpio19_exist(): + ls = log_os_system("ls /sys/class/gpio/ | grep gpio19", 0) + logging.info('mods:'+ls) + if len(ls) ==0: + return False + +def gpio20_exist(): + ls = log_os_system("ls /sys/class/gpio/ | grep gpio20", 0) + logging.info('mods:'+ls) + if len(ls) ==0: + return False + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + SYSFS_PSU_PRESENT_DIR = ["/sys/class/gpio/gpio16", + "/sys/class/gpio/gpio19"] + + SYSFS_PSU_POWERGOOD_DIR = ["/sys/class/gpio/gpio17", + "/sys/class/gpio/gpio20"] + def __init__(self): + PsuBase.__init__(self) + + if gpio16_exist() == False: + output = exec_cmd("echo 16 > /sys/class/gpio/export ", 1) + output = exec_cmd("echo in > /sys/class/gpio/gpio16/direction ", 1) + + if gpio17_exist() == False: + output = exec_cmd("echo 17 > /sys/class/gpio/export ", 1) + output = exec_cmd("echo in > /sys/class/gpio/gpio17/direction ", 1) + + if gpio19_exist() == False: + output = exec_cmd("echo 19 > /sys/class/gpio/export ", 1) + output = exec_cmd("echo in > /sys/class/gpio/gpio19/direction ", 1) + + if gpio20_exist() == False: + output = exec_cmd("echo 20 > /sys/class/gpio/export ", 1) + output = exec_cmd("echo in > /sys/class/gpio/gpio20/direction ", 1) + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'value' + attr_path = self.SYSFS_PSU_POWERGOOD_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU status + if (attr_value == 1): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + attr_file ='value' + attr_path = self.SYSFS_PSU_PRESENT_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU presence + if (attr_value == 0): + status = 1 + + return status + diff --git a/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/sfputil.py b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/sfputil.py new file mode 100755 index 00000000000..851f4b90277 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix1b_rglbmc-r0/plugins/sfputil.py @@ -0,0 +1,179 @@ +#!/usr/bin/env python + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class SfpUtil(SfpUtilBase): + """Platform specific SfpUtill class""" + + _port_start = 0 + _port_end = 31 + ports_in_block = 32 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 1 : 32, + 2 : 33, + 3 : 34, + 4 : 35, + 5 : 36, + 6 : 37, + 7 : 38, + 8 : 39, + 9 : 40, + 10 : 41, + 11 : 42, + 12 : 43, + 13 : 44, + 14 : 45, + 15 : 46, + 16 : 47, + 17 : 48, + 18 : 49, + 19 : 50, + 20 : 51, + 21 : 52, + 22 : 53, + 23 : 54, + 24 : 55, + 25 : 56, + 26 : 57, + 27 : 58, + 28 : 59, + 29 : 60, + 30 : 61, + 31 : 62, + 32 : 63, + } + + _qsfp_ports = range(0, ports_in_block + 1) + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(0, self._port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x+1]) + self._port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num+1)+"/reset", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num+1)+"/reset", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num+1)+"/lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num+1)+"/lpmode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + #path = "/sys/class/cpld-qsfp28/port-{0}/module_present" + #port_ps = path.format(self.port_to_i2c_mapping[port_num+1]) + + try: + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num+1)+"/module_present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if reg_value == '1': + return True + + return False + + @property + def port_start(self): + return self._port_start + + @property + def port_end(self): + return self._port_end + + @property + def qsfp_ports(self): + return range(0, self.ports_in_block + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError + + diff --git a/device/quanta/x86_64-quanta_ix7_rglbmc-r0/Quanta-IX7-32X/port_config.ini b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/Quanta-IX7-32X/port_config.ini new file mode 100644 index 00000000000..14f4716d909 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/Quanta-IX7-32X/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 29,30,31,32 hundredGigE1 1 100000 +Ethernet4 33,34,35,36 hundredGigE2 2 100000 +Ethernet8 41,42,43,44 hundredGigE3 3 100000 +Ethernet12 45,46,47,48 hundredGigE4 4 100000 +Ethernet16 1,2,3,4 hundredGigE5 5 100000 +Ethernet20 5,6,7,8 hundredGigE6 6 100000 +Ethernet24 9,10,11,12 hundredGigE7 7 100000 +Ethernet28 13,14,15,16 hundredGigE8 8 100000 +Ethernet32 17,18,19,20 hundredGigE9 9 100000 +Ethernet36 21,22,23,24 hundredGigE10 10 100000 +Ethernet40 25,26,27,28 hundredGigE11 11 100000 +Ethernet44 37,38,39,40 hundredGigE12 12 100000 +Ethernet48 49,50,51,52 hundredGigE13 13 100000 +Ethernet52 53,54,55,56 hundredGigE14 14 100000 +Ethernet56 57,58,59,60 hundredGigE15 15 100000 +Ethernet60 61,62,63,64 hundredGigE16 16 100000 +Ethernet64 65,66,67,68 hundredGigE17 17 100000 +Ethernet68 69,70,71,72 hundredGigE18 18 100000 +Ethernet72 73,74,75,76 hundredGigE19 19 100000 +Ethernet76 77,78,79,80 hundredGigE20 20 100000 +Ethernet80 93,94,95,96 hundredGigE21 21 100000 +Ethernet84 101,102,103,104 hundredGigE22 22 100000 +Ethernet88 105,106,107,108 hundredGigE23 23 100000 +Ethernet92 109,110,111,112 hundredGigE24 24 100000 +Ethernet96 113,114,115,116 hundredGigE25 25 100000 +Ethernet100 117,118,119,120 hundredGigE26 26 100000 +Ethernet104 121,122,123,124 hundredGigE27 27 100000 +Ethernet108 125,126,127,128 hundredGigE28 28 100000 +Ethernet112 81,82,83,84 hundredGigE29 29 100000 +Ethernet116 85,86,87,88 hundredGigE30 30 100000 +Ethernet120 89,90,91,92 hundredGigE31 31 100000 +Ethernet124 97,98,99,100 hundredGigE32 32 100000 diff --git a/device/quanta/x86_64-quanta_ix7_rglbmc-r0/Quanta-IX7-32X/sai.profile b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/Quanta-IX7-32X/sai.profile new file mode 100644 index 00000000000..8088d09edc1 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/Quanta-IX7-32X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-ix7-32x100G.config.bcm diff --git a/device/quanta/x86_64-quanta_ix7_rglbmc-r0/Quanta-IX7-32X/td3-ix7-32x100G.config.bcm b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/Quanta-IX7-32X/td3-ix7-32x100G.config.bcm new file mode 100644 index 00000000000..54abc9ddae7 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/Quanta-IX7-32X/td3-ix7-32x100G.config.bcm @@ -0,0 +1,534 @@ +bcm_tunnel_term_compatible_mode=1 +core_clock_frequency=1525 +dpp_clock_ratio=2:3 +parity_enable=0 +mem_cache_enable=0 +l2_mem_entries=40960 +l3_mem_entries=40960 +fpem_mem_entries=16384 +l2xmsg_mode=1 + +bcm_num_cos=8 +bcm_stat_interval=2000000 +cdma_timeout_usec=3000000 + +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l3_max_ecmp_mode=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 + +miim_intr_enable=0 +module_64ports=1 + +schan_intr_enable=0 +skip_L2_USER_ENTRY=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 + +# portmap settings +oversubscribe_mode=1 +pbmp_xport_xe=0x4888888888888888c2222222222222222 + +port_flex_enable=1 + +portmap_1=1:100 +portmap_5=5:100 +portmap_9=9:100 +portmap_13=13:100 +portmap_17=17:100 +portmap_21=21:100 +portmap_25=25:100 +portmap_29=29:100 + +portmap_33=33:100 +portmap_37=37:100 +portmap_41=41:100 +portmap_45=45:100 +portmap_49=49:100 +portmap_53=53:100 +portmap_57=57:100 +portmap_61=61:100 + +portmap_67=65:100 +portmap_71=69:100 +portmap_75=73:100 +portmap_79=77:100 +portmap_83=81:100 +portmap_87=85:100 +portmap_91=89:100 +portmap_95=93:100 + +portmap_99=97:100 +portmap_103=101:100 +portmap_107=105:100 +portmap_111=109:100 +portmap_115=113:100 +portmap_119=117:100 +portmap_123=121:100 +portmap_127=125:100 + +# datapath port -- merlin core +portmap_66=129:10:m +portmap_130=128:10:m + +# loopback port +portmap_65=130:10 +portmap_131=131:10 + +# port order remap +dport_map_port_29=1 +dport_map_port_33=2 +dport_map_port_41=3 +dport_map_port_45=4 +dport_map_port_1=5 +dport_map_port_5=6 +dport_map_port_9=7 +dport_map_port_13=8 +dport_map_port_17=9 +dport_map_port_21=10 +dport_map_port_25=11 +dport_map_port_37=12 +dport_map_port_49=13 +dport_map_port_53=14 +dport_map_port_57=15 +dport_map_port_61=16 + +dport_map_port_67=17 +dport_map_port_71=18 +dport_map_port_75=19 +dport_map_port_79=20 +dport_map_port_95=21 +dport_map_port_103=22 +dport_map_port_107=23 +dport_map_port_111=24 +dport_map_port_115=25 +dport_map_port_119=26 +dport_map_port_123=27 +dport_map_port_127=28 +dport_map_port_83=29 +dport_map_port_87=30 +dport_map_port_91=31 +dport_map_port_99=32 + +dport_map_port_66=33 +dport_map_port_130=34 + +### interface setting +# TSCF / TSCE interface definition +# NULL 1 +# GMII 3 +# SGMII 4 +# XGMII 6 +# SFI 9 +# XFI 10 +# KR 11 +# KR4 12 +# CR 13 +# CR4 14 +# XLAUI 15 +# SR 16 +# ILKN 21 +# CAUI 25 +# LR 26 +# LR4 27 +# SR4 28 +# SR2 38 +# KR2 39 +# CR2 40 +# XLAUI2 42 +# LR2 55 +# CAUI4 62 +### + + +serdes_if_type_29=14 +serdes_if_type_33=14 +serdes_if_type_41=14 +serdes_if_type_45=14 +serdes_if_type_1=14 +serdes_if_type_5=14 +serdes_if_type_9=14 +serdes_if_type_13=14 +serdes_if_type_17=14 +serdes_if_type_21=14 +serdes_if_type_25=14 +serdes_if_type_37=14 +serdes_if_type_49=14 +serdes_if_type_53=14 +serdes_if_type_57=14 +serdes_if_type_61=14 + +serdes_if_type_67=14 +serdes_if_type_71=14 +serdes_if_type_75=14 +serdes_if_type_79=14 +serdes_if_type_95=14 +serdes_if_type_103=14 +serdes_if_type_107=14 +serdes_if_type_111=14 +serdes_if_type_115=14 +serdes_if_type_119=14 +serdes_if_type_123=14 +serdes_if_type_127=14 +serdes_if_type_83=14 +serdes_if_type_87=14 +serdes_if_type_91=14 +serdes_if_type_99=14 + +serdes_if_type_66=11 +serdes_if_type_130=11 + +### lane swap and polarity follow physical port +phy_chain_tx_lane_map_physical{29.0}=0x1230 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x1 +phy_chain_rx_lane_map_physical{29.0}=0x1302 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 + +phy_chain_tx_lane_map_physical{33.0}=0x3210 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_lane_map_physical{33.0}=0x0123 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +phy_chain_tx_lane_map_physical{41.0}=0x0213 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +phy_chain_rx_lane_map_physical{41.0}=0x1302 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 + +phy_chain_tx_lane_map_physical{45.0}=0x3210 +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +phy_chain_rx_lane_map_physical{45.0}=0x2103 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x1 +phy_chain_rx_polarity_flip_physical{48.0}=0x0 + +phy_chain_tx_lane_map_physical{1.0}=0x0213 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_lane_map_physical{1.0}=0x1302 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +phy_chain_tx_lane_map_physical{5.0}=0x3210 +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_lane_map_physical{5.0}=0x2103 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 + +phy_chain_tx_lane_map_physical{9.0}=0x0213 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 +phy_chain_rx_lane_map_physical{9.0}=0x1302 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{11.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 + +phy_chain_tx_lane_map_physical{13.0}=0x3210 +phy_chain_tx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 +phy_chain_rx_lane_map_physical{13.0}=0x2031 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 + +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_lane_map_physical{17.0}=0x1302 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 + +phy_chain_tx_lane_map_physical{21.0}=0x3210 +phy_chain_tx_polarity_flip_physical{21.0}=0x1 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 + +phy_chain_tx_lane_map_physical{25.0}=0x0213 +phy_chain_tx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 +phy_chain_rx_lane_map_physical{25.0}=0x1302 +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 + +phy_chain_tx_lane_map_physical{37.0}=0x3210 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x1 +phy_chain_rx_lane_map_physical{37.0}=0x2103 +phy_chain_rx_polarity_flip_physical{37.0}=0x0 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 + +phy_chain_tx_lane_map_physical{49.0}=0x0213 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_lane_map_physical{49.0}=0x1302 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 + +phy_chain_tx_lane_map_physical{53.0}=0x3210 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_tx_polarity_flip_physical{56.0}=0x0 +phy_chain_rx_lane_map_physical{53.0}=0x2103 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 + +phy_chain_tx_lane_map_physical{57.0}=0x0213 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 +phy_chain_rx_lane_map_physical{57.0}=0x1302 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 + +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 +phy_chain_rx_lane_map_physical{61.0}=0x2103 +phy_chain_rx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_tx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x1 +phy_chain_rx_lane_map_physical{65.0}=0x3120 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 + +phy_chain_tx_lane_map_physical{69.0}=0x0123 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_lane_map_physical{69.0}=0x2301 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 + +phy_chain_tx_lane_map_physical{73.0}=0x3120 +phy_chain_tx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_lane_map_physical{73.0}=0x3120 +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x1 + +phy_chain_tx_lane_map_physical{77.0}=0x0213 +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_lane_map_physical{77.0}=0x0321 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 + +phy_chain_tx_lane_map_physical{93.0}=0x3120 +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 +phy_chain_rx_lane_map_physical{93.0}=0x3120 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 + +phy_chain_tx_lane_map_physical{101.0}=0x0321 +phy_chain_tx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_tx_polarity_flip_physical{104.0}=0x1 +phy_chain_rx_lane_map_physical{101.0}=0x0321 +phy_chain_rx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{102.0}=0x1 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x1 + +phy_chain_tx_lane_map_physical{105.0}=0x3120 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 +phy_chain_rx_lane_map_physical{105.0}=0x3120 +phy_chain_rx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x0 + +phy_chain_tx_lane_map_physical{109.0}=0x0123 +phy_chain_tx_polarity_flip_physical{109.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x1 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x1 +phy_chain_rx_lane_map_physical{109.0}=0x0321 +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x0 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 + +phy_chain_tx_lane_map_physical{113.0}=0x0312 +phy_chain_tx_polarity_flip_physical{113.0}=0x0 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_lane_map_physical{113.0}=0x3120 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x1 + +phy_chain_tx_lane_map_physical{117.0}=0x0123 +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x1 +phy_chain_tx_polarity_flip_physical{119.0}=0x1 +phy_chain_tx_polarity_flip_physical{120.0}=0x1 +phy_chain_rx_lane_map_physical{117.0}=0x1320 +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{118.0}=0x1 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 + +phy_chain_tx_lane_map_physical{121.0}=0x3120 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x1 +phy_chain_rx_lane_map_physical{121.0}=0x0123 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 + +phy_chain_tx_lane_map_physical{125.0}=0x0123 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_lane_map_physical{125.0}=0x0321 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +phy_chain_tx_lane_map_physical{81.0}=0x3201 +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_tx_polarity_flip_physical{82.0}=0x1 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x1 +phy_chain_rx_lane_map_physical{81.0}=0x3120 +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{83.0}=0x1 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 + +phy_chain_tx_lane_map_physical{85.0}=0x0123 +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 +phy_chain_rx_lane_map_physical{85.0}=0x0321 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x1 + +phy_chain_tx_lane_map_physical{89.0}=0x3210 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_tx_polarity_flip_physical{90.0}=0x1 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x1 +phy_chain_rx_lane_map_physical{89.0}=0x0123 +phy_chain_rx_polarity_flip_physical{89.0}=0x1 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{92.0}=0x0 + +phy_chain_tx_lane_map_physical{97.0}=0x0312 +phy_chain_tx_polarity_flip_physical{97.0}=0x0 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 +phy_chain_rx_lane_map_physical{97.0}=0x0321 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 + diff --git a/device/quanta/x86_64-quanta_ix7_rglbmc-r0/default_sku b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/default_sku new file mode 100644 index 00000000000..e9066fe7299 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/default_sku @@ -0,0 +1 @@ +Quanta-IX7-32X t1 diff --git a/device/quanta/x86_64-quanta_ix7_rglbmc-r0/installer.conf b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/quanta/x86_64-quanta_ix7_rglbmc-r0/led_proc_init.soc b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/led_proc_init.soc new file mode 100755 index 00000000000..0861486660c --- /dev/null +++ b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/led_proc_init.soc @@ -0,0 +1,6 @@ +sleep 10 +led stop +sleep 3 +led start +sleep 3 +led auto on \ No newline at end of file diff --git a/device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/eeprom.py b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/eeprom.py new file mode 100644 index 00000000000..2a35f3a22a1 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/18-0054/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/psuutil.py b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/psuutil.py new file mode 100644 index 00000000000..885842bbda5 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/psuutil.py @@ -0,0 +1,49 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 1 + + return status diff --git a/device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/sfputil.py b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/sfputil.py new file mode 100644 index 00000000000..85a4aad26da --- /dev/null +++ b/device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/sfputil.py @@ -0,0 +1,176 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 32 + PORTS_IN_BLOCK = 32 + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 1 : 32, + 2 : 33, + 3 : 34, + 4 : 35, + 5 : 36, + 6 : 37, + 7 : 38, + 8 : 39, + 9 : 40, + 10 : 41, + 11 : 42, + 12 : 43, + 13 : 44, + 14 : 45, + 15 : 46, + 16 : 47, + 17 : 48, + 18 : 49, + 19 : 50, + 20 : 51, + 21 : 52, + 22 : 53, + 23 : 54, + 24 : 55, + 25 : 56, + 26 : 57, + 27 : 58, + 28 : 59, + 29 : 60, + 30 : 61, + 31 : 62, + 32 : 63, + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format(self._port_to_i2c_mapping[x]) + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/module_present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if reg_value == '1': + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/lpmode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/reset", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/reset", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/quanta/x86_64-quanta_ix8_rglbmc-r0/Quanta-IX8-56X/port_config.ini b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/Quanta-IX8-56X/port_config.ini new file mode 100644 index 00000000000..c9dd2fb999f --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/Quanta-IX8-56X/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed +Ethernet0 60 twentyfiveGigE1 1 25000 +Ethernet1 59 twentyfiveGigE2 2 25000 +Ethernet2 58 twentyfiveGigE3 3 25000 +Ethernet3 57 twentyfiveGigE4 4 25000 +Ethernet4 64 twentyfiveGigE5 5 25000 +Ethernet5 63 twentyfiveGigE6 6 25000 +Ethernet6 62 twentyfiveGigE7 7 25000 +Ethernet7 61 twentyfiveGigE8 8 25000 +Ethernet8 49 twentyfiveGigE9 9 25000 +Ethernet9 50 twentyfiveGigE10 10 25000 +Ethernet10 51 twentyfiveGigE11 11 25000 +Ethernet11 52 twentyfiveGigE12 12 25000 +Ethernet12 4 twentyfiveGigE13 13 25000 +Ethernet13 3 twentyfiveGigE14 14 25000 +Ethernet14 2 twentyfiveGigE15 15 25000 +Ethernet15 1 twentyfiveGigE16 16 25000 +Ethernet16 8 twentyfiveGigE17 17 25000 +Ethernet17 7 twentyfiveGigE18 18 25000 +Ethernet18 6 twentyfiveGigE19 19 25000 +Ethernet19 5 twentyfiveGigE20 20 25000 +Ethernet20 16 twentyfiveGigE21 21 25000 +Ethernet21 15 twentyfiveGigE22 22 25000 +Ethernet22 14 twentyfiveGigE23 23 25000 +Ethernet23 13 twentyfiveGigE24 24 25000 +Ethernet24 24 twentyfiveGigE25 25 25000 +Ethernet25 23 twentyfiveGigE26 26 25000 +Ethernet26 22 twentyfiveGigE27 27 25000 +Ethernet27 21 twentyfiveGigE28 28 25000 +Ethernet28 32 twentyfiveGigE29 29 25000 +Ethernet29 31 twentyfiveGigE30 30 25000 +Ethernet30 30 twentyfiveGigE31 31 25000 +Ethernet31 29 twentyfiveGigE32 32 25000 +Ethernet32 36 twentyfiveGigE33 33 25000 +Ethernet33 35 twentyfiveGigE34 34 25000 +Ethernet34 34 twentyfiveGigE35 35 25000 +Ethernet35 33 twentyfiveGigE36 36 25000 +Ethernet36 44 twentyfiveGigE37 37 25000 +Ethernet37 43 twentyfiveGigE38 38 25000 +Ethernet38 42 twentyfiveGigE39 39 25000 +Ethernet39 41 twentyfiveGigE40 40 25000 +Ethernet40 86 twentyfiveGigE41 41 25000 +Ethernet41 85 twentyfiveGigE42 42 25000 +Ethernet42 88 twentyfiveGigE43 43 25000 +Ethernet43 87 twentyfiveGigE44 44 25000 +Ethernet44 94 twentyfiveGigE45 45 25000 +Ethernet45 93 twentyfiveGigE46 46 25000 +Ethernet46 96 twentyfiveGigE47 47 25000 +Ethernet47 95 twentyfiveGigE48 48 25000 +Ethernet48 97,98,99,100 hundredGigE49 49 100000 +Ethernet52 105,106,107,108 hundredGigE50 50 100000 +Ethernet56 113,114,115,116 hundredGigE51 51 100000 +Ethernet60 121,122,123,124 hundredGigE52 52 100000 +Ethernet64 77,78,79,80 hundredGigE53 53 100000 +Ethernet68 65,66,67,68 hundredGigE54 54 100000 +Ethernet72 69,70,71,72 hundredGigE55 55 100000 +Ethernet76 125,126,127,128 hundredGigE56 56 100000 diff --git a/device/quanta/x86_64-quanta_ix8_rglbmc-r0/Quanta-IX8-56X/sai.profile b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/Quanta-IX8-56X/sai.profile new file mode 100644 index 00000000000..faf28ace4c1 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/Quanta-IX8-56X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-ix8-48x25G+8x100G.config.bcm diff --git a/device/quanta/x86_64-quanta_ix8_rglbmc-r0/Quanta-IX8-56X/td3-ix8-48x25G+8x100G.config.bcm b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/Quanta-IX8-56X/td3-ix8-48x25G+8x100G.config.bcm new file mode 100644 index 00000000000..e4c8f8b656e --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/Quanta-IX8-56X/td3-ix8-48x25G+8x100G.config.bcm @@ -0,0 +1,480 @@ +bcm_tunnel_term_compatible_mode=1 +core_clock_frequency=1525 +dpp_clock_ratio=2:3 +parity_enable=0 +mem_cache_enable=0 +l2_mem_entries=40960 +l3_mem_entries=40960 +fpem_mem_entries=16384 +l2xmsg_mode=1 + +bcm_num_cos=8 +bcm_stat_interval=2000000 +cdma_timeout_usec=3000000 + +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l3_max_ecmp_mode=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 + +miim_intr_enable=0 +module_64ports=1 + +schan_intr_enable=0 +skip_L2_USER_ENTRY=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 + +# portmap settings +oversubscribe_mode=1 +pbmp_xport_xe=0x48808080f8780808dfe1e1e1fe1e1e1fe + +port_flex_enable=1 + +portmap_1=1:25 +portmap_2=2:25 +portmap_3=3:25 +portmap_4=4:25 +portmap_5=5:25 +portmap_6=6:25 +portmap_7=7:25 +portmap_8=8:25 +portmap_13=13:25 +portmap_14=14:25 +portmap_15=15:25 +portmap_16=16:25 +portmap_21=21:25 +portmap_22=22:25 +portmap_23=23:25 +portmap_24=24:25 +portmap_29=29:25 +portmap_30=30:25 +portmap_31=31:25 +portmap_32=32:25 +portmap_33=33:25 +portmap_34=34:25 +portmap_35=35:25 +portmap_36=36:25 +portmap_41=41:25 +portmap_42=42:25 +portmap_43=43:25 +portmap_44=44:25 +portmap_49=49:25 +portmap_50=50:25 +portmap_51=51:25 +portmap_52=52:25 +portmap_57=57:25 +portmap_58=58:25 +portmap_59=59:25 +portmap_60=60:25 +portmap_61=61:25 +portmap_62=62:25 +portmap_63=63:25 +portmap_64=64:25 +portmap_67=65:100 +portmap_71=69:100 +portmap_79=77:100 +portmap_87=85:25 +portmap_88=86:25 +portmap_89=87:25 +portmap_90=88:25 +portmap_95=93:25 +portmap_96=94:25 +portmap_97=95:25 +portmap_98=96:25 +portmap_99=97:100 +portmap_107=105:100 +portmap_115=113:100 +portmap_123=121:100 +portmap_127=125:100 + +# datapath port -- MerlinCore +portmap_66=129:10:m +portmap_130=128:10:m + +# loopback port +portmap_65=130:10 +portmap_131=131:10 + + +### interface setting +# TSCF / TSCE interface definition +# NULL 1 +# GMII 3 +# SGMII 4 +# XGMII 6 +# SFI 9 +# XFI 10 +# KR 11 +# KR4 12 +# CR 13 +# CR4 14 +# XLAUI 15 +# SR 16 +# ILKN 21 +# CAUI 25 +# LR 26 +# LR4 27 +# SR4 28 +# SR2 38 +# KR2 39 +# CR2 40 +# XLAUI2 42 +# LR2 55 +# CAUI4 62 +### + +serdes_if_type_1=13 +serdes_if_type_2=13 +serdes_if_type_3=13 +serdes_if_type_4=13 +serdes_if_type_5=13 +serdes_if_type_6=13 +serdes_if_type_7=13 +serdes_if_type_8=13 +serdes_if_type_13=13 +serdes_if_type_14=13 +serdes_if_type_15=13 +serdes_if_type_16=13 +serdes_if_type_21=13 +serdes_if_type_22=13 +serdes_if_type_23=13 +serdes_if_type_24=13 +serdes_if_type_29=13 +serdes_if_type_30=13 +serdes_if_type_31=13 +serdes_if_type_32=13 +serdes_if_type_33=13 +serdes_if_type_34=13 +serdes_if_type_35=13 +serdes_if_type_36=13 +serdes_if_type_41=13 +serdes_if_type_42=13 +serdes_if_type_43=13 +serdes_if_type_44=13 +serdes_if_type_49=13 +serdes_if_type_50=13 +serdes_if_type_51=13 +serdes_if_type_52=13 +serdes_if_type_57=13 +serdes_if_type_58=13 +serdes_if_type_59=13 +serdes_if_type_60=13 +serdes_if_type_61=13 +serdes_if_type_62=13 +serdes_if_type_63=13 +serdes_if_type_64=13 +serdes_if_type_67=14 +serdes_if_type_71=14 +serdes_if_type_79=14 +serdes_if_type_87=13 +serdes_if_type_88=13 +serdes_if_type_89=13 +serdes_if_type_90=13 +serdes_if_type_95=13 +serdes_if_type_96=13 +serdes_if_type_97=13 +serdes_if_type_98=13 +serdes_if_type_99=14 +serdes_if_type_107=14 +serdes_if_type_115=14 +serdes_if_type_123=14 +serdes_if_type_127=14 +serdes_if_type_66=11 +serdes_if_type_130=11 + + +dport_map_port_60=1 +dport_map_port_59=2 +dport_map_port_58=3 +dport_map_port_57=4 +dport_map_port_64=5 +dport_map_port_63=6 +dport_map_port_62=7 +dport_map_port_61=8 +dport_map_port_49=9 +dport_map_port_50=10 +dport_map_port_51=11 +dport_map_port_52=12 +dport_map_port_4=13 +dport_map_port_3=14 +dport_map_port_2=15 +dport_map_port_1=16 +dport_map_port_8=17 +dport_map_port_7=18 +dport_map_port_6=19 +dport_map_port_5=20 +dport_map_port_16=21 +dport_map_port_15=22 +dport_map_port_14=23 +dport_map_port_13=24 +dport_map_port_24=25 +dport_map_port_23=26 +dport_map_port_22=27 +dport_map_port_21=28 +dport_map_port_32=29 +dport_map_port_31=30 +dport_map_port_30=31 +dport_map_port_29=32 +dport_map_port_36=33 +dport_map_port_35=34 +dport_map_port_34=35 +dport_map_port_33=36 +dport_map_port_44=37 +dport_map_port_43=38 +dport_map_port_42=39 +dport_map_port_41=40 +dport_map_port_88=41 +dport_map_port_87=42 +dport_map_port_90=43 +dport_map_port_89=44 +dport_map_port_96=45 +dport_map_port_95=46 +dport_map_port_98=47 +dport_map_port_97=48 +dport_map_port_99=49 +dport_map_port_107=50 +dport_map_port_115=51 +dport_map_port_123=52 +dport_map_port_79=53 +dport_map_port_67=54 +dport_map_port_71=55 +dport_map_port_127=56 + +dport_map_port_66=57 +dport_map_port_130=58 + + +phy_chain_tx_lane_map_physical{1.0}=0x3210 +phy_chain_tx_polarity_flip_physical{1.0}=0x1 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_lane_map_physical{1.0}=0x3210 +phy_chain_rx_polarity_flip_physical{1.0}=0x1 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x0 + +phy_chain_tx_lane_map_physical{5.0}=0x3210 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_lane_map_physical{5.0}=0x3210 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 + +phy_chain_tx_lane_map_physical{13.0}=0x3210 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_lane_map_physical{13.0}=0x3210 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 + +phy_chain_tx_lane_map_physical{21.0}=0x3210 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_lane_map_physical{21.0}=0x3210 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 + +phy_chain_tx_lane_map_physical{29.0}=0x3210 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_lane_map_physical{29.0}=0x3210 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 + +phy_chain_tx_lane_map_physical{33.0}=0x3210 +phy_chain_tx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_lane_map_physical{33.0}=0x3210 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +phy_chain_tx_lane_map_physical{41.0}=0x3210 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +phy_chain_rx_lane_map_physical{41.0}=0x3210 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 + +phy_chain_tx_lane_map_physical{49.0}=0x3210 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_lane_map_physical{49.0}=0x3210 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 + +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_lane_map_physical{57.0}=0x3210 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 + +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 +phy_chain_rx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +phy_chain_tx_lane_map_physical{65.0}=0x0123 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x1 +phy_chain_rx_lane_map_physical{65.0}=0x0321 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 + +phy_chain_tx_lane_map_physical{69.0}=0x3120 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 +phy_chain_rx_lane_map_physical{69.0}=0x0123 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 + +phy_chain_tx_lane_map_physical{77.0}=0x2130 +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +phy_chain_rx_lane_map_physical{77.0}=0x3102 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 + +phy_chain_tx_lane_map_physical{85.0}=0x3210 +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 +phy_chain_rx_lane_map_physical{85.0}=0x3210 +phy_chain_rx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{88.0}=0x1 + +phy_chain_tx_lane_map_physical{93.0}=0x3210 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 +phy_chain_rx_lane_map_physical{93.0}=0x3210 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 + +phy_chain_tx_lane_map_physical{97.0}=0x0312 +phy_chain_tx_polarity_flip_physical{97.0}=0x0 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 +phy_chain_rx_lane_map_physical{97.0}=0x1023 +phy_chain_rx_polarity_flip_physical{97.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 + +phy_chain_tx_lane_map_physical{105.0}=0x0123 +phy_chain_tx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_lane_map_physical{105.0}=0x0321 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 + +phy_chain_tx_lane_map_physical{113.0}=0x3120 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_lane_map_physical{113.0}=0x1023 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 + +phy_chain_tx_lane_map_physical{121.0}=0x0132 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_lane_map_physical{121.0}=0x0321 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 + +phy_chain_tx_lane_map_physical{125.0}=0x0213 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 +phy_chain_rx_lane_map_physical{125.0}=0x0321 +phy_chain_rx_polarity_flip_physical{125.0}=0x1 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +### MerlinCore +phy_chain_tx_lane_map_physical{129.0}=0x3210 +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x1 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x1 +phy_chain_rx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 + diff --git a/device/quanta/x86_64-quanta_ix8_rglbmc-r0/default_sku b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/default_sku new file mode 100644 index 00000000000..b775ae4d3e6 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/default_sku @@ -0,0 +1 @@ +Quanta-IX8-56X t1 diff --git a/device/quanta/x86_64-quanta_ix8_rglbmc-r0/installer.conf b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/installer.conf new file mode 100644 index 00000000000..14404194ef5 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/quanta/x86_64-quanta_ix8_rglbmc-r0/led_proc_init.soc b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/led_proc_init.soc new file mode 100755 index 00000000000..0861486660c --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/led_proc_init.soc @@ -0,0 +1,6 @@ +sleep 10 +led stop +sleep 3 +led start +sleep 3 +led auto on \ No newline at end of file diff --git a/device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/eeprom.py b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/eeprom.py new file mode 100644 index 00000000000..2a35f3a22a1 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/18-0054/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/psuutil.py b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/psuutil.py new file mode 100644 index 00000000000..885842bbda5 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/psuutil.py @@ -0,0 +1,49 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 1 + + return status diff --git a/device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/sfputil.py b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/sfputil.py new file mode 100644 index 00000000000..627c99fee0c --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/sfputil.py @@ -0,0 +1,217 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 56 + PORTS_IN_BLOCK = 56 + QSFP_PORT_START = 49 + QSFP_PORT_END = 56 + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 1 : 32, + 2 : 33, + 3 : 34, + 4 : 35, + 5 : 36, + 6 : 37, + 7 : 38, + 8 : 39, + 9 : 40, + 10 : 41, + 11 : 42, + 12 : 43, + 13 : 44, + 14 : 45, + 15 : 46, + 16 : 47, + 17 : 48, + 18 : 49, + 19 : 50, + 20 : 51, + 21 : 52, + 22 : 53, + 23 : 54, + 24 : 55, + 25 : 56, + 26 : 57, + 27 : 58, + 28 : 59, + 29 : 60, + 30 : 61, + 31 : 62, + 32 : 63, + 33 : 64, + 34 : 65, + 35 : 66, + 36 : 67, + 37 : 68, + 38 : 69, + 39 : 70, + 40 : 71, + 41 : 72, + 42 : 73, + 43 : 74, + 44 : 75, + 45 : 76, + 46 : 77, + 47 : 78, + 48 : 79, + 49 : 80,#QSFP49 + 50 : 81,#QSFP50 + 51 : 82,#QSFP51 + 52 : 83,#QSFP52 + 53 : 84,#QSFP53 + 54 : 85,#QSFP54 + 55 : 86,#QSFP55 + 56 : 87,#QSFP56 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format(self._port_to_i2c_mapping[x]) + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + if port_num < self.qsfp_port_start: + reg_file = open("/sys/class/cpld-sfp28/port-"+str(port_num)+"/pre_n") + else: + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+34)+"/value") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if port_num < self.qsfp_port_start: + if reg_value == '1': + return True + else: + if reg_value == '0': + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+35)+"/value") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+35)+"/value", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+32)+"/value", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+32)+"/value", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/quanta/x86_64-quanta_ix8c_bwde-r0/Quanta-IX8C-56X/port_config.ini b/device/quanta/x86_64-quanta_ix8c_bwde-r0/Quanta-IX8C-56X/port_config.ini new file mode 100644 index 00000000000..c9dd2fb999f --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8c_bwde-r0/Quanta-IX8C-56X/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed +Ethernet0 60 twentyfiveGigE1 1 25000 +Ethernet1 59 twentyfiveGigE2 2 25000 +Ethernet2 58 twentyfiveGigE3 3 25000 +Ethernet3 57 twentyfiveGigE4 4 25000 +Ethernet4 64 twentyfiveGigE5 5 25000 +Ethernet5 63 twentyfiveGigE6 6 25000 +Ethernet6 62 twentyfiveGigE7 7 25000 +Ethernet7 61 twentyfiveGigE8 8 25000 +Ethernet8 49 twentyfiveGigE9 9 25000 +Ethernet9 50 twentyfiveGigE10 10 25000 +Ethernet10 51 twentyfiveGigE11 11 25000 +Ethernet11 52 twentyfiveGigE12 12 25000 +Ethernet12 4 twentyfiveGigE13 13 25000 +Ethernet13 3 twentyfiveGigE14 14 25000 +Ethernet14 2 twentyfiveGigE15 15 25000 +Ethernet15 1 twentyfiveGigE16 16 25000 +Ethernet16 8 twentyfiveGigE17 17 25000 +Ethernet17 7 twentyfiveGigE18 18 25000 +Ethernet18 6 twentyfiveGigE19 19 25000 +Ethernet19 5 twentyfiveGigE20 20 25000 +Ethernet20 16 twentyfiveGigE21 21 25000 +Ethernet21 15 twentyfiveGigE22 22 25000 +Ethernet22 14 twentyfiveGigE23 23 25000 +Ethernet23 13 twentyfiveGigE24 24 25000 +Ethernet24 24 twentyfiveGigE25 25 25000 +Ethernet25 23 twentyfiveGigE26 26 25000 +Ethernet26 22 twentyfiveGigE27 27 25000 +Ethernet27 21 twentyfiveGigE28 28 25000 +Ethernet28 32 twentyfiveGigE29 29 25000 +Ethernet29 31 twentyfiveGigE30 30 25000 +Ethernet30 30 twentyfiveGigE31 31 25000 +Ethernet31 29 twentyfiveGigE32 32 25000 +Ethernet32 36 twentyfiveGigE33 33 25000 +Ethernet33 35 twentyfiveGigE34 34 25000 +Ethernet34 34 twentyfiveGigE35 35 25000 +Ethernet35 33 twentyfiveGigE36 36 25000 +Ethernet36 44 twentyfiveGigE37 37 25000 +Ethernet37 43 twentyfiveGigE38 38 25000 +Ethernet38 42 twentyfiveGigE39 39 25000 +Ethernet39 41 twentyfiveGigE40 40 25000 +Ethernet40 86 twentyfiveGigE41 41 25000 +Ethernet41 85 twentyfiveGigE42 42 25000 +Ethernet42 88 twentyfiveGigE43 43 25000 +Ethernet43 87 twentyfiveGigE44 44 25000 +Ethernet44 94 twentyfiveGigE45 45 25000 +Ethernet45 93 twentyfiveGigE46 46 25000 +Ethernet46 96 twentyfiveGigE47 47 25000 +Ethernet47 95 twentyfiveGigE48 48 25000 +Ethernet48 97,98,99,100 hundredGigE49 49 100000 +Ethernet52 105,106,107,108 hundredGigE50 50 100000 +Ethernet56 113,114,115,116 hundredGigE51 51 100000 +Ethernet60 121,122,123,124 hundredGigE52 52 100000 +Ethernet64 77,78,79,80 hundredGigE53 53 100000 +Ethernet68 65,66,67,68 hundredGigE54 54 100000 +Ethernet72 69,70,71,72 hundredGigE55 55 100000 +Ethernet76 125,126,127,128 hundredGigE56 56 100000 diff --git a/device/quanta/x86_64-quanta_ix8c_bwde-r0/Quanta-IX8C-56X/sai.profile b/device/quanta/x86_64-quanta_ix8c_bwde-r0/Quanta-IX8C-56X/sai.profile new file mode 100644 index 00000000000..04b43d5a4d3 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8c_bwde-r0/Quanta-IX8C-56X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-ix8c-48x25G+8x100G.config.bcm diff --git a/device/quanta/x86_64-quanta_ix8c_bwde-r0/Quanta-IX8C-56X/td3-ix8c-48x25G+8x100G.config.bcm b/device/quanta/x86_64-quanta_ix8c_bwde-r0/Quanta-IX8C-56X/td3-ix8c-48x25G+8x100G.config.bcm new file mode 100644 index 00000000000..e4c8f8b656e --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8c_bwde-r0/Quanta-IX8C-56X/td3-ix8c-48x25G+8x100G.config.bcm @@ -0,0 +1,480 @@ +bcm_tunnel_term_compatible_mode=1 +core_clock_frequency=1525 +dpp_clock_ratio=2:3 +parity_enable=0 +mem_cache_enable=0 +l2_mem_entries=40960 +l3_mem_entries=40960 +fpem_mem_entries=16384 +l2xmsg_mode=1 + +bcm_num_cos=8 +bcm_stat_interval=2000000 +cdma_timeout_usec=3000000 + +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l3_max_ecmp_mode=1 +l3_alpm_enable=2 +lpm_scaling_enable=0 + +miim_intr_enable=0 +module_64ports=1 + +schan_intr_enable=0 +skip_L2_USER_ENTRY=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 + +# portmap settings +oversubscribe_mode=1 +pbmp_xport_xe=0x48808080f8780808dfe1e1e1fe1e1e1fe + +port_flex_enable=1 + +portmap_1=1:25 +portmap_2=2:25 +portmap_3=3:25 +portmap_4=4:25 +portmap_5=5:25 +portmap_6=6:25 +portmap_7=7:25 +portmap_8=8:25 +portmap_13=13:25 +portmap_14=14:25 +portmap_15=15:25 +portmap_16=16:25 +portmap_21=21:25 +portmap_22=22:25 +portmap_23=23:25 +portmap_24=24:25 +portmap_29=29:25 +portmap_30=30:25 +portmap_31=31:25 +portmap_32=32:25 +portmap_33=33:25 +portmap_34=34:25 +portmap_35=35:25 +portmap_36=36:25 +portmap_41=41:25 +portmap_42=42:25 +portmap_43=43:25 +portmap_44=44:25 +portmap_49=49:25 +portmap_50=50:25 +portmap_51=51:25 +portmap_52=52:25 +portmap_57=57:25 +portmap_58=58:25 +portmap_59=59:25 +portmap_60=60:25 +portmap_61=61:25 +portmap_62=62:25 +portmap_63=63:25 +portmap_64=64:25 +portmap_67=65:100 +portmap_71=69:100 +portmap_79=77:100 +portmap_87=85:25 +portmap_88=86:25 +portmap_89=87:25 +portmap_90=88:25 +portmap_95=93:25 +portmap_96=94:25 +portmap_97=95:25 +portmap_98=96:25 +portmap_99=97:100 +portmap_107=105:100 +portmap_115=113:100 +portmap_123=121:100 +portmap_127=125:100 + +# datapath port -- MerlinCore +portmap_66=129:10:m +portmap_130=128:10:m + +# loopback port +portmap_65=130:10 +portmap_131=131:10 + + +### interface setting +# TSCF / TSCE interface definition +# NULL 1 +# GMII 3 +# SGMII 4 +# XGMII 6 +# SFI 9 +# XFI 10 +# KR 11 +# KR4 12 +# CR 13 +# CR4 14 +# XLAUI 15 +# SR 16 +# ILKN 21 +# CAUI 25 +# LR 26 +# LR4 27 +# SR4 28 +# SR2 38 +# KR2 39 +# CR2 40 +# XLAUI2 42 +# LR2 55 +# CAUI4 62 +### + +serdes_if_type_1=13 +serdes_if_type_2=13 +serdes_if_type_3=13 +serdes_if_type_4=13 +serdes_if_type_5=13 +serdes_if_type_6=13 +serdes_if_type_7=13 +serdes_if_type_8=13 +serdes_if_type_13=13 +serdes_if_type_14=13 +serdes_if_type_15=13 +serdes_if_type_16=13 +serdes_if_type_21=13 +serdes_if_type_22=13 +serdes_if_type_23=13 +serdes_if_type_24=13 +serdes_if_type_29=13 +serdes_if_type_30=13 +serdes_if_type_31=13 +serdes_if_type_32=13 +serdes_if_type_33=13 +serdes_if_type_34=13 +serdes_if_type_35=13 +serdes_if_type_36=13 +serdes_if_type_41=13 +serdes_if_type_42=13 +serdes_if_type_43=13 +serdes_if_type_44=13 +serdes_if_type_49=13 +serdes_if_type_50=13 +serdes_if_type_51=13 +serdes_if_type_52=13 +serdes_if_type_57=13 +serdes_if_type_58=13 +serdes_if_type_59=13 +serdes_if_type_60=13 +serdes_if_type_61=13 +serdes_if_type_62=13 +serdes_if_type_63=13 +serdes_if_type_64=13 +serdes_if_type_67=14 +serdes_if_type_71=14 +serdes_if_type_79=14 +serdes_if_type_87=13 +serdes_if_type_88=13 +serdes_if_type_89=13 +serdes_if_type_90=13 +serdes_if_type_95=13 +serdes_if_type_96=13 +serdes_if_type_97=13 +serdes_if_type_98=13 +serdes_if_type_99=14 +serdes_if_type_107=14 +serdes_if_type_115=14 +serdes_if_type_123=14 +serdes_if_type_127=14 +serdes_if_type_66=11 +serdes_if_type_130=11 + + +dport_map_port_60=1 +dport_map_port_59=2 +dport_map_port_58=3 +dport_map_port_57=4 +dport_map_port_64=5 +dport_map_port_63=6 +dport_map_port_62=7 +dport_map_port_61=8 +dport_map_port_49=9 +dport_map_port_50=10 +dport_map_port_51=11 +dport_map_port_52=12 +dport_map_port_4=13 +dport_map_port_3=14 +dport_map_port_2=15 +dport_map_port_1=16 +dport_map_port_8=17 +dport_map_port_7=18 +dport_map_port_6=19 +dport_map_port_5=20 +dport_map_port_16=21 +dport_map_port_15=22 +dport_map_port_14=23 +dport_map_port_13=24 +dport_map_port_24=25 +dport_map_port_23=26 +dport_map_port_22=27 +dport_map_port_21=28 +dport_map_port_32=29 +dport_map_port_31=30 +dport_map_port_30=31 +dport_map_port_29=32 +dport_map_port_36=33 +dport_map_port_35=34 +dport_map_port_34=35 +dport_map_port_33=36 +dport_map_port_44=37 +dport_map_port_43=38 +dport_map_port_42=39 +dport_map_port_41=40 +dport_map_port_88=41 +dport_map_port_87=42 +dport_map_port_90=43 +dport_map_port_89=44 +dport_map_port_96=45 +dport_map_port_95=46 +dport_map_port_98=47 +dport_map_port_97=48 +dport_map_port_99=49 +dport_map_port_107=50 +dport_map_port_115=51 +dport_map_port_123=52 +dport_map_port_79=53 +dport_map_port_67=54 +dport_map_port_71=55 +dport_map_port_127=56 + +dport_map_port_66=57 +dport_map_port_130=58 + + +phy_chain_tx_lane_map_physical{1.0}=0x3210 +phy_chain_tx_polarity_flip_physical{1.0}=0x1 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_lane_map_physical{1.0}=0x3210 +phy_chain_rx_polarity_flip_physical{1.0}=0x1 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x0 + +phy_chain_tx_lane_map_physical{5.0}=0x3210 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_lane_map_physical{5.0}=0x3210 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 + +phy_chain_tx_lane_map_physical{13.0}=0x3210 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_lane_map_physical{13.0}=0x3210 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 + +phy_chain_tx_lane_map_physical{21.0}=0x3210 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_lane_map_physical{21.0}=0x3210 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 + +phy_chain_tx_lane_map_physical{29.0}=0x3210 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_lane_map_physical{29.0}=0x3210 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 + +phy_chain_tx_lane_map_physical{33.0}=0x3210 +phy_chain_tx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_lane_map_physical{33.0}=0x3210 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +phy_chain_tx_lane_map_physical{41.0}=0x3210 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +phy_chain_rx_lane_map_physical{41.0}=0x3210 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 + +phy_chain_tx_lane_map_physical{49.0}=0x3210 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_lane_map_physical{49.0}=0x3210 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 + +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_lane_map_physical{57.0}=0x3210 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 + +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 +phy_chain_rx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +phy_chain_tx_lane_map_physical{65.0}=0x0123 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x1 +phy_chain_rx_lane_map_physical{65.0}=0x0321 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 + +phy_chain_tx_lane_map_physical{69.0}=0x3120 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 +phy_chain_rx_lane_map_physical{69.0}=0x0123 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 + +phy_chain_tx_lane_map_physical{77.0}=0x2130 +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +phy_chain_rx_lane_map_physical{77.0}=0x3102 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 + +phy_chain_tx_lane_map_physical{85.0}=0x3210 +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 +phy_chain_rx_lane_map_physical{85.0}=0x3210 +phy_chain_rx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{88.0}=0x1 + +phy_chain_tx_lane_map_physical{93.0}=0x3210 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 +phy_chain_rx_lane_map_physical{93.0}=0x3210 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 + +phy_chain_tx_lane_map_physical{97.0}=0x0312 +phy_chain_tx_polarity_flip_physical{97.0}=0x0 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 +phy_chain_rx_lane_map_physical{97.0}=0x1023 +phy_chain_rx_polarity_flip_physical{97.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 + +phy_chain_tx_lane_map_physical{105.0}=0x0123 +phy_chain_tx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_lane_map_physical{105.0}=0x0321 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 + +phy_chain_tx_lane_map_physical{113.0}=0x3120 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_lane_map_physical{113.0}=0x1023 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 + +phy_chain_tx_lane_map_physical{121.0}=0x0132 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_lane_map_physical{121.0}=0x0321 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 + +phy_chain_tx_lane_map_physical{125.0}=0x0213 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 +phy_chain_rx_lane_map_physical{125.0}=0x0321 +phy_chain_rx_polarity_flip_physical{125.0}=0x1 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +### MerlinCore +phy_chain_tx_lane_map_physical{129.0}=0x3210 +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x1 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x1 +phy_chain_rx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 + diff --git a/device/quanta/x86_64-quanta_ix8c_bwde-r0/default_sku b/device/quanta/x86_64-quanta_ix8c_bwde-r0/default_sku new file mode 100644 index 00000000000..58415770bc6 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8c_bwde-r0/default_sku @@ -0,0 +1 @@ +Quanta-IX8C-56X t1 diff --git a/device/quanta/x86_64-quanta_ix8c_bwde-r0/installer.conf b/device/quanta/x86_64-quanta_ix8c_bwde-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8c_bwde-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/quanta/x86_64-quanta_ix8c_bwde-r0/led_proc_init.soc b/device/quanta/x86_64-quanta_ix8c_bwde-r0/led_proc_init.soc new file mode 100644 index 00000000000..0861486660c --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8c_bwde-r0/led_proc_init.soc @@ -0,0 +1,6 @@ +sleep 10 +led stop +sleep 3 +led start +sleep 3 +led auto on \ No newline at end of file diff --git a/device/quanta/x86_64-quanta_ix8c_bwde-r0/plugins/eeprom.py b/device/quanta/x86_64-quanta_ix8c_bwde-r0/plugins/eeprom.py new file mode 100644 index 00000000000..2a35f3a22a1 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8c_bwde-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/18-0054/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/quanta/x86_64-quanta_ix8c_bwde-r0/plugins/psuutil.py b/device/quanta/x86_64-quanta_ix8c_bwde-r0/plugins/psuutil.py new file mode 100644 index 00000000000..cc9be248aa1 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8c_bwde-r0/plugins/psuutil.py @@ -0,0 +1,49 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 1 + + return status diff --git a/device/quanta/x86_64-quanta_ix8c_bwde-r0/plugins/sfputil.py b/device/quanta/x86_64-quanta_ix8c_bwde-r0/plugins/sfputil.py new file mode 100644 index 00000000000..627c99fee0c --- /dev/null +++ b/device/quanta/x86_64-quanta_ix8c_bwde-r0/plugins/sfputil.py @@ -0,0 +1,217 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import string + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 56 + PORTS_IN_BLOCK = 56 + QSFP_PORT_START = 49 + QSFP_PORT_END = 56 + + _port_to_eeprom_mapping = {} + _port_to_i2c_mapping = { + 1 : 32, + 2 : 33, + 3 : 34, + 4 : 35, + 5 : 36, + 6 : 37, + 7 : 38, + 8 : 39, + 9 : 40, + 10 : 41, + 11 : 42, + 12 : 43, + 13 : 44, + 14 : 45, + 15 : 46, + 16 : 47, + 17 : 48, + 18 : 49, + 19 : 50, + 20 : 51, + 21 : 52, + 22 : 53, + 23 : 54, + 24 : 55, + 25 : 56, + 26 : 57, + 27 : 58, + 28 : 59, + 29 : 60, + 30 : 61, + 31 : 62, + 32 : 63, + 33 : 64, + 34 : 65, + 35 : 66, + 36 : 67, + 37 : 68, + 38 : 69, + 39 : 70, + 40 : 71, + 41 : 72, + 42 : 73, + 43 : 74, + 44 : 75, + 45 : 76, + 46 : 77, + 47 : 78, + 48 : 79, + 49 : 80,#QSFP49 + 50 : 81,#QSFP50 + 51 : 82,#QSFP51 + 52 : 83,#QSFP52 + 53 : 84,#QSFP53 + 54 : 85,#QSFP54 + 55 : 86,#QSFP55 + 56 : 87,#QSFP56 + } + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_port_start(self): + return self.QSFP_PORT_START + + @property + def qsfp_port_end(self): + return self.QSFP_PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(self.port_start, self.port_end+1): + self.port_to_eeprom_mapping[x] = eeprom_path.format(self._port_to_i2c_mapping[x]) + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + if port_num < self.qsfp_port_start: + reg_file = open("/sys/class/cpld-sfp28/port-"+str(port_num)+"/pre_n") + else: + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+34)+"/value") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if port_num < self.qsfp_port_start: + if reg_value == '1': + return True + else: + if reg_value == '0': + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+35)+"/value") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: + return False + + try: + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+35)+"/value", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.qsfp_port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+32)+"/value", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+32)+"/value", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/port_config.ini b/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/port_config.ini new file mode 100644 index 00000000000..8f770329437 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index +Ethernet0 33,34,35,36,37,38,39,40 fourhundredGigE1 0 +Ethernet4 25,26,27,28,29,30,31,32 fourhundredGigE2 1 +Ethernet8 49,50,51,52,53,54,55,56 fourhundredGigE3 2 +Ethernet12 57,58,59,60,61,62,63,64 fourhundredGigE4 3 +Ethernet16 65,66,67,68,69,70,71,72 fourhundredGigE5 4 +Ethernet20 73,74,75,76,77,78,79,80 fourhundredGigE6 5 +Ethernet24 81,82,83,84,85,86,87,88 fourhundredGigE7 6 +Ethernet28 89,90,91,92,93,94,95,96 fourhundredGigE8 7 +Ethernet32 17,18,19,20,21,22,23,24 fourhundredGigE9 8 +Ethernet36 97,98,99,100,101,102,103,104 fourhundredGigE10 9 +Ethernet40 9,10,11,12,13,14,15,16 fourhundredGigE11 10 +Ethernet44 41,42,43,44,45,46,47,48 fourhundredGigE12 11 +Ethernet48 113,114,115,116,117,118,119,120 fourhundredGigE13 12 +Ethernet52 105,106,107,108,109,110,111,112 fourhundredGigE14 13 +Ethernet56 121,122,123,124,125,126,127,128 fourhundredGigE15 14 +Ethernet60 1,2,3,4,5,6,7,8 fourhundredGigE16 15 +Ethernet64 137,138,139,140,141,142,143,144 fourhundredGigE17 16 +Ethernet68 129,130,131,132,133,134,135,136 fourhundredGigE18 17 +Ethernet72 241,242,243,244,245,246,247,248 fourhundredGigE19 18 +Ethernet76 249,250,251,252,253,254,255,256 fourhundredGigE20 19 +Ethernet80 225,226,227,228,229,230,231,232 fourhundredGigE21 20 +Ethernet84 145,146,147,148,149,150,151,152 fourhundredGigE22 21 +Ethernet88 153,154,155,156,157,158,159,160 fourhundredGigE23 22 +Ethernet92 233,234,235,236,237,238,239,240 fourhundredGigE24 23 +Ethernet96 161,162,163,164,165,166,167,168 fourhundredGigE25 24 +Ethernet100 169,170,171,172,173,174,175,176 fourhundredGigE26 25 +Ethernet104 177,178,179,180,181,182,183,184 fourhundredGigE27 26 +Ethernet108 185,186,187,188,189,190,191,192 fourhundredGigE28 27 +Ethernet112 193,194,195,196,197,198,199,200 fourhundredGigE29 28 +Ethernet116 201,202,203,204,205,206,207,208 fourhundredGigE30 29 +Ethernet120 209,210,211,212,213,214,215,216 fourhundredGigE31 30 +Ethernet124 217,218,219,220,221,222,223,224 fourhundredGigE32 31 diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/sai.profile b/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/sai.profile new file mode 100644 index 00000000000..54b62b1d097 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-ix9-32x400G.config.bcm diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/th3-ix9-32x400G.config.bcm b/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/th3-ix9-32x400G.config.bcm new file mode 100644 index 00000000000..704183e1092 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/Quanta-IX9-32X/th3-ix9-32x400G.config.bcm @@ -0,0 +1,341 @@ +ccm_dma_enable=0 +ccmdma_intr_enable=0 +ctr_evict_enable=0 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +phy_enable=0 +phy_null=1 +pll_bypass=1 + +init_all_modules=0 +core_clock_frequency=1325 +dpr_clock_frequency=1000 +device_clock_frequency=1325 + +load_firmware=0x2 +port_flex_enable=1 + +# portmap settings +pbmp_xport_xe=0x111101111411110111101111011114111102222 + +portmap_1=1:400 +portmap_5=9:400 +portmap_9=17:400 +portmap_13=25:400 +portmap_20=33:400 +portmap_24=41:400 +portmap_28=49:400 +portmap_32=57:400 + +portmap_40=65:400 +portmap_44=73:400 +portmap_48=81:400 +portmap_52=89:400 +portmap_60=97:400 +portmap_64=105:400 +portmap_68=113:400 +portmap_72=121:400 + +portmap_80=129:400 +portmap_84=137:400 +portmap_88=145:400 +portmap_92=153:400 +portmap_100=161:400 +portmap_104=169:400 +portmap_108=177:400 +portmap_112=185:400 + +portmap_120=193:400 +portmap_124=201:400 +portmap_128=209:400 +portmap_132=217:400 +portmap_140=225:400 +portmap_144=233:400 +portmap_148=241:400 +portmap_152=249:400 + +# datapath port +portmap_38=257:10 +portmap_118=258:10 + +# loopback port +portmap_19=260:10 +portmap_39=260:10 +portmap_59=261:10 +portmap_79=262:10 +portmap_99=263:10 +portmap_119=264:10 +portmap_139=265:10 +portmap_159=266:10 + +# port order remap +dport_map_port_20=1 +dport_map_port_13=2 +dport_map_port_28=3 +dport_map_port_32=4 +dport_map_port_40=5 +dport_map_port_44=6 +dport_map_port_48=7 +dport_map_port_52=8 +dport_map_port_9=9 +dport_map_port_60=10 +dport_map_port_5=11 +dport_map_port_24=12 +dport_map_port_68=13 +dport_map_port_64=14 +dport_map_port_72=15 +dport_map_port_1=16 + +dport_map_port_84=17 +dport_map_port_80=18 +dport_map_port_148=19 +dport_map_port_152=20 +dport_map_port_140=21 +dport_map_port_88=22 +dport_map_port_92=23 +dport_map_port_144=24 +dport_map_port_100=25 +dport_map_port_104=26 +dport_map_port_108=27 +dport_map_port_112=28 +dport_map_port_120=29 +dport_map_port_124=30 +dport_map_port_128=31 +dport_map_port_132=32 + +dport_map_port_38=33 +dport_map_port_118=34 + +### lane swap and polarity follow front port order ### +phy_chain_tx_lane_map_physical{33.0}=0x75206431 +serdes_core_tx_polarity_flip_physical{33}=0xdb +phy_chain_rx_lane_map_physical{33.0}=0x13572064 +serdes_core_rx_polarity_flip_physical{33}=0x69 + +phy_chain_tx_lane_map_physical{25.0}=0x75314206 +serdes_core_tx_polarity_flip_physical{25}=0xe8 +phy_chain_rx_lane_map_physical{25.0}=0x67103524 +serdes_core_rx_polarity_flip_physical{25}=0x7c + +phy_chain_tx_lane_map_physical{49.0}=0x57326014 +serdes_core_tx_polarity_flip_physical{49}=0x0e +phy_chain_rx_lane_map_physical{49.0}=0x21463057 +serdes_core_rx_polarity_flip_physical{49}=0xd2 + +phy_chain_tx_lane_map_physical{57.0}=0x12307564 +serdes_core_tx_polarity_flip_physical{57}=0xa6 +phy_chain_rx_lane_map_physical{57.0}=0x57460231 +serdes_core_rx_polarity_flip_physical{57}=0x99 + +phy_chain_tx_lane_map_physical{65.0}=0x60345721 +serdes_core_tx_polarity_flip_physical{65}=0xe2 +phy_chain_rx_lane_map_physical{65.0}=0x40675123 +serdes_core_rx_polarity_flip_physical{65}=0x0f + +phy_chain_tx_lane_map_physical{73.0}=0x21306574 +serdes_core_tx_polarity_flip_physical{73}=0xa4 +phy_chain_rx_lane_map_physical{73.0}=0x67451302 +serdes_core_rx_polarity_flip_physical{73}=0x06 + +phy_chain_tx_lane_map_physical{81.0}=0x65210347 +serdes_core_tx_polarity_flip_physical{81}=0xe2 +phy_chain_rx_lane_map_physical{81.0}=0x10675423 +serdes_core_rx_polarity_flip_physical{81}=0x0f + +phy_chain_tx_lane_map_physical{89.0}=0x41236570 +serdes_core_tx_polarity_flip_physical{89}=0x8d +phy_chain_rx_lane_map_physical{89.0}=0x45672031 +serdes_core_rx_polarity_flip_physical{89}=0x63 + +phy_chain_tx_lane_map_physical{17.0}=0x76312504 +serdes_core_tx_polarity_flip_physical{17}=0x8e +phy_chain_rx_lane_map_physical{17.0}=0x75126403 +serdes_core_rx_polarity_flip_physical{17}=0x2d + +phy_chain_tx_lane_map_physical{97.0}=0x31025764 +serdes_core_tx_polarity_flip_physical{97}=0x3c +phy_chain_rx_lane_map_physical{97.0}=0x52136470 +serdes_core_rx_polarity_flip_physical{97}=0x9c + +phy_chain_tx_lane_map_physical{9.0}=0x57326014 +serdes_core_tx_polarity_flip_physical{9}=0x3d +phy_chain_rx_lane_map_physical{9.0}=0x31452076 +serdes_core_rx_polarity_flip_physical{9}=0x1e + +phy_chain_tx_lane_map_physical{41.0}=0x03215764 +serdes_core_tx_polarity_flip_physical{41}=0x3c +phy_chain_rx_lane_map_physical{41.0}=0x54671302 +serdes_core_rx_polarity_flip_physical{41}=0x99 + +phy_chain_tx_lane_map_physical{113.0}=0x60175243 +serdes_core_tx_polarity_flip_physical{113}=0xcd +phy_chain_rx_lane_map_physical{113.0}=0x20473156 +serdes_core_rx_polarity_flip_physical{113}=0x87 + +phy_chain_tx_lane_map_physical{105.0}=0x65034721 +serdes_core_tx_polarity_flip_physical{105}=0xe6 +phy_chain_rx_lane_map_physical{105.0}=0x04157263 +serdes_core_rx_polarity_flip_physical{105}=0x4c + +phy_chain_tx_lane_map_physical{121.0}=0x16435072 +serdes_core_tx_polarity_flip_physical{121}=0xae +phy_chain_rx_lane_map_physical{121.0}=0x13560247 +serdes_core_rx_polarity_flip_physical{121}=0x2d + +phy_chain_tx_lane_map_physical{1.0}=0x34650172 +serdes_core_tx_polarity_flip_physical{1}=0xff +phy_chain_rx_lane_map_physical{1.0}=0x13026457 +serdes_core_rx_polarity_flip_physical{1}=0x99 + +phy_chain_tx_lane_map_physical{137.0}=0x02673451 +serdes_core_tx_polarity_flip_physical{137}=0x25 +phy_chain_rx_lane_map_physical{137.0}=0x14730562 +serdes_core_rx_polarity_flip_physical{137}=0x86 + +phy_chain_tx_lane_map_physical{129.0}=0x12304675 +serdes_core_tx_polarity_flip_physical{129}=0x49 +phy_chain_rx_lane_map_physical{129.0}=0x76453021 +serdes_core_rx_polarity_flip_physical{129}=0xc3 + +phy_chain_tx_lane_map_physical{241.0}=0x31462075 +serdes_core_tx_polarity_flip_physical{241}=0xf5 +phy_chain_rx_lane_map_physical{241.0}=0x47315602 +serdes_core_rx_polarity_flip_physical{241}=0xe1 + +phy_chain_tx_lane_map_physical{249.0}=0x13206547 +serdes_core_tx_polarity_flip_physical{249}=0x27 +phy_chain_rx_lane_map_physical{249.0}=0x64750312 +serdes_core_rx_polarity_flip_physical{249}=0xbd + +phy_chain_tx_lane_map_physical{225.0}=0x60315742 +serdes_core_tx_polarity_flip_physical{225}=0x44 +phy_chain_rx_lane_map_physical{225.0}=0x01546372 +serdes_core_rx_polarity_flip_physical{225}=0xc3 + +phy_chain_tx_lane_map_physical{145.0}=0x51374602 +serdes_core_tx_polarity_flip_physical{145}=0x5f +phy_chain_rx_lane_map_physical{145.0}=0x23106754 +serdes_core_rx_polarity_flip_physical{145}=0xbc + +phy_chain_tx_lane_map_physical{153.0}=0x05163742 +serdes_core_tx_polarity_flip_physical{153}=0x0f +phy_chain_rx_lane_map_physical{153.0}=0x67102354 +serdes_core_rx_polarity_flip_physical{153}=0xf0 + +phy_chain_tx_lane_map_physical{233.0}=0x20134576 +serdes_core_tx_polarity_flip_physical{233}=0x07 +phy_chain_rx_lane_map_physical{233.0}=0x23107465 +serdes_core_rx_polarity_flip_physical{233}=0xe6 + +phy_chain_tx_lane_map_physical{161.0}=0x53246710 +serdes_core_tx_polarity_flip_physical{161}=0x0f +phy_chain_rx_lane_map_physical{161.0}=0x03471265 +serdes_core_rx_polarity_flip_physical{161}=0xc0 + +phy_chain_tx_lane_map_physical{169.0}=0x20137654 +serdes_core_tx_polarity_flip_physical{169}=0x8a +phy_chain_rx_lane_map_physical{169.0}=0x27360415 +serdes_core_rx_polarity_flip_physical{169}=0x9c + +phy_chain_tx_lane_map_physical{177.0}=0x50346712 +serdes_core_tx_polarity_flip_physical{177}=0x4f +phy_chain_rx_lane_map_physical{177.0}=0x13460257 +serdes_core_rx_polarity_flip_physical{177}=0x5a + +phy_chain_tx_lane_map_physical{185.0}=0x12305674 +serdes_core_tx_polarity_flip_physical{185}=0xba +phy_chain_rx_lane_map_physical{185.0}=0x57460123 +serdes_core_rx_polarity_flip_physical{185}=0x9f + +phy_chain_tx_lane_map_physical{193.0}=0x50346712 +serdes_core_tx_polarity_flip_physical{193}=0x4f +phy_chain_rx_lane_map_physical{193.0}=0x13750264 +serdes_core_rx_polarity_flip_physical{193}=0x69 + +phy_chain_tx_lane_map_physical{201.0}=0x12305674 +serdes_core_tx_polarity_flip_physical{201}=0xba +phy_chain_rx_lane_map_physical{201.0}=0x57460123 +serdes_core_rx_polarity_flip_physical{201}=0x9f + +phy_chain_tx_lane_map_physical{209.0}=0x50346712 +serdes_core_tx_polarity_flip_physical{209}=0x4f +phy_chain_rx_lane_map_physical{209.0}=0x13460275 +serdes_core_rx_polarity_flip_physical{209}=0x5a + +phy_chain_tx_lane_map_physical{217.0}=0x31205674 +serdes_core_tx_polarity_flip_physical{217}=0x5a +phy_chain_rx_lane_map_physical{217.0}=0x67541203 +serdes_core_rx_polarity_flip_physical{217}=0x33 + + +port_fec_20=9 +port_fec_13=9 +port_fec_28=9 +port_fec_32=9 +port_fec_40=9 +port_fec_44=9 +port_fec_48=9 +port_fec_52=9 +port_fec_9=9 +port_fec_60=9 +port_fec_5=9 +port_fec_24=9 +port_fec_68=9 +port_fec_64=9 +port_fec_72=9 +port_fec_1=9 + +port_fec_84=9 +port_fec_80=9 +port_fec_148=9 +port_fec_152=9 +port_fec_140=9 +port_fec_88=9 +port_fec_92=9 +port_fec_144=9 +port_fec_100=9 +port_fec_104=9 +port_fec_108=9 +port_fec_112=9 +port_fec_120=9 +port_fec_124=9 +port_fec_128=9 +port_fec_132=9 + + +port_init_cl72_20=1 +port_init_cl72_13=1 +port_init_cl72_28=1 +port_init_cl72_32=1 +port_init_cl72_40=1 +port_init_cl72_44=1 +port_init_cl72_48=1 +port_init_cl72_52=1 +port_init_cl72_9=1 +port_init_cl72_60=1 +port_init_cl72_5=1 +port_init_cl72_24=1 +port_init_cl72_68=1 +port_init_cl72_64=1 +port_init_cl72_72=1 +port_init_cl72_1=1 + +port_init_cl72_84=1 +port_init_cl72_80=1 +port_init_cl72_148=1 +port_init_cl72_152=1 +port_init_cl72_140=1 +port_init_cl72_88=1 +port_init_cl72_92=1 +port_init_cl72_144=1 +port_init_cl72_100=1 +port_init_cl72_104=1 +port_init_cl72_108=1 +port_init_cl72_112=1 +port_init_cl72_120=1 +port_init_cl72_124=1 +port_init_cl72_128=1 +port_init_cl72_132=1 + + diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/default_sku b/device/quanta/x86_64-quanta_ix9_bwde-r0/default_sku new file mode 100644 index 00000000000..0ca35bb0074 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/default_sku @@ -0,0 +1 @@ +Quanta-IX9-32X t1 diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/installer.conf b/device/quanta/x86_64-quanta_ix9_bwde-r0/installer.conf new file mode 100644 index 00000000000..925a32fc0c3 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/led_proc_init.soc b/device/quanta/x86_64-quanta_ix9_bwde-r0/led_proc_init.soc new file mode 100644 index 00000000000..adff95218e4 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/led_proc_init.soc @@ -0,0 +1,2 @@ +sleep 10 +led auto on diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/eeprom.py b/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/eeprom.py new file mode 100644 index 00000000000..2a35f3a22a1 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/18-0054/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/psuutil.py b/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/psuutil.py new file mode 100644 index 00000000000..885842bbda5 --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/psuutil.py @@ -0,0 +1,49 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 1 + + return status diff --git a/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/sfputil.py b/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/sfputil.py new file mode 100644 index 00000000000..6dc23d8195f --- /dev/null +++ b/device/quanta/x86_64-quanta_ix9_bwde-r0/plugins/sfputil.py @@ -0,0 +1,176 @@ +#!/usr/bin/env python + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class SfpUtil(SfpUtilBase): + """Platform specific SfpUtill class""" + + _port_start = 0 + _port_end = 31 + ports_in_block = 32 + + _port_to_eeprom_mapping = {} + port_to_i2c_mapping = { + 1 : 32, + 2 : 33, + 3 : 34, + 4 : 35, + 5 : 36, + 6 : 37, + 7 : 38, + 8 : 39, + 9 : 40, + 10 : 41, + 11 : 42, + 12 : 43, + 13 : 44, + 14 : 45, + 15 : 46, + 16 : 47, + 17 : 48, + 18 : 49, + 19 : 50, + 20 : 51, + 21 : 52, + 22 : 53, + 23 : 54, + 24 : 55, + 25 : 56, + 26 : 57, + 27 : 58, + 28 : 59, + 29 : 60, + 30 : 61, + 31 : 62, + 32 : 63, + } + + _qsfp_ports = range(0, ports_in_block + 1) + + def __init__(self): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom' + for x in range(0, self._port_end + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x+1]) + self._port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfpdd/port-"+str(port_num+1)+"/reset", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open("/sys/class/cpld-qsfpdd/port-"+str(port_num+1)+"/reset", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfpdd/port-"+str(port_num+1)+"/lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfpdd/port-"+str(port_num+1)+"/lpmode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if reg_value == 0: + return False + + return True + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self._port_start or port_num > self._port_end: + return False + + try: + reg_file = open("/sys/class/cpld-qsfpdd/port-"+str(port_num+1)+"/module_present") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_file.readline().rstrip() + if reg_value == '1': + return True + + return False + + @property + def port_start(self): + return self._port_start + + @property + def port_end(self): + return self._port_end + + @property + def qsfp_ports(self): + return range(0, self.ports_in_block + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError + + diff --git a/device/virtual/x86_64-kvm_x86_64-r0/default_sku b/device/virtual/x86_64-kvm_x86_64-r0/default_sku new file mode 100644 index 00000000000..493e1989b66 --- /dev/null +++ b/device/virtual/x86_64-kvm_x86_64-r0/default_sku @@ -0,0 +1 @@ +Force10-S6000 t1 diff --git a/device/virtual/x86_64-kvm_x86_64-r0/installer.conf b/device/virtual/x86_64-kvm_x86_64-r0/installer.conf new file mode 100644 index 00000000000..e69de29bb2d diff --git a/device/virtual/x86_64-kvm_x86_64-r0/plugins/eeprom.py b/device/virtual/x86_64-kvm_x86_64-r0/plugins/eeprom.py new file mode 100644 index 00000000000..5cc8cb68018 --- /dev/null +++ b/device/virtual/x86_64-kvm_x86_64-r0/plugins/eeprom.py @@ -0,0 +1,42 @@ +#!/usr/bin/env python + +############################################################################# +# SONiC Virtual switch platform +# +############################################################################# + +class board(): + + def __init__(self, name, path, cpld_root, ro): + return + + def check_status(self): + return "ok" + + def is_checksum_valid(self, e): + return (True, 0) + + def read_eeprom(self): + return \ +""" +TLV Name Code Len Value +-------------------- ---- --- ----- +Product Name 0x21 5 SONiC +Part Number 0x22 6 000000 +Serial Number 0x23 20 0000000000000000000 +Base MAC Address 0x24 6 00:00:00:00:00:01 +Manufacture Date 0x25 19 10/19/2019 00:00:03 +Device Version 0x26 1 1 +Label Revision 0x27 3 A01 +Platform Name 0x28 20 x86_64-kvm_x86_64-r0 +ONIE Version 0x29 19 master-201811170418 +MAC Addresses 0x2A 2 16 +Vendor Name 0x2D 5 SONiC +""" + + def decode_eeprom(self, e): + print e + + def serial_number_str(self, e): + """Return service tag instead of serial number""" + return "000000" diff --git a/device/wnc/x86_64-wnc_osw1800-r0/OSW1800-48x6q/port_config.ini b/device/wnc/x86_64-wnc_osw1800-r0/OSW1800-48x6q/port_config.ini new file mode 100644 index 00000000000..578f59203d3 --- /dev/null +++ b/device/wnc/x86_64-wnc_osw1800-r0/OSW1800-48x6q/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias speed autoneg fec +Ethernet0 0 Ethernet0 25000 1 rs +Ethernet4 1 Ethernet4 25000 1 rs +Ethernet8 2 Ethernet8 25000 1 rs +Ethernet12 3 Ethernet12 25000 1 rs +Ethernet16 4 Ethernet16 25000 1 rs +Ethernet20 5 Ethernet20 25000 1 rs +Ethernet24 6 Ethernet24 25000 1 rs +Ethernet28 7 Ethernet28 25000 1 rs +Ethernet32 8 Ethernet32 25000 1 rs +Ethernet36 9 Ethernet36 25000 1 rs +Ethernet40 10 Ethernet40 25000 1 rs +Ethernet44 11 Ethernet44 25000 1 rs +Ethernet48 12 Ethernet48 25000 1 rs +Ethernet52 13 Ethernet52 25000 1 rs +Ethernet56 14 Ethernet56 25000 1 rs +Ethernet60 15 Ethernet60 25000 1 rs +Ethernet64 16 Ethernet64 25000 1 rs +Ethernet68 17 Ethernet68 25000 1 rs +Ethernet72 18 Ethernet72 25000 1 rs +Ethernet76 19 Ethernet76 25000 1 rs +Ethernet80 20 Ethernet80 25000 1 rs +Ethernet84 21 Ethernet84 25000 1 rs +Ethernet88 22 Ethernet88 25000 1 rs +Ethernet92 23 Ethernet92 25000 1 rs +Ethernet96 24 Ethernet96 25000 1 rs +Ethernet100 25 Ethernet100 25000 1 rs +Ethernet104 26 Ethernet104 25000 1 rs +Ethernet108 27 Ethernet108 25000 1 rs +Ethernet112 28 Ethernet112 25000 1 rs +Ethernet116 29 Ethernet116 25000 1 rs +Ethernet120 30 Ethernet120 25000 1 rs +Ethernet124 31 Ethernet124 25000 1 rs +Ethernet128 32 Ethernet128 25000 1 rs +Ethernet132 33 Ethernet132 25000 1 rs +Ethernet136 34 Ethernet136 25000 1 rs +Ethernet140 35 Ethernet140 25000 1 rs +Ethernet144 36 Ethernet144 25000 1 rs +Ethernet148 37 Ethernet148 25000 1 rs +Ethernet152 38 Ethernet152 25000 1 rs +Ethernet156 39 Ethernet156 25000 1 rs +Ethernet160 40 Ethernet160 25000 1 rs +Ethernet164 41 Ethernet164 25000 1 rs +Ethernet168 42 Ethernet168 25000 1 rs +Ethernet172 43 Ethernet172 25000 1 rs +Ethernet176 44 Ethernet176 25000 1 rs +Ethernet180 45 Ethernet180 25000 1 rs +Ethernet184 46 Ethernet184 25000 1 rs +Ethernet188 47 Ethernet188 25000 1 rs +Ethernet192 48,49,50,51 Ethernet192 100000 1 rs +Ethernet196 52,53,54,55 Ethernet196 100000 1 rs +Ethernet200 56,57,58,59 Ethernet200 100000 1 rs +Ethernet204 60,61,62,63 Ethernet204 100000 1 rs +Ethernet208 64,65,66,67 Ethernet208 100000 1 rs +Ethernet212 68,69,70,71 Ethernet212 100000 1 rs diff --git a/device/wnc/x86_64-wnc_osw1800-r0/OSW1800-48x6q/switch-sai.conf b/device/wnc/x86_64-wnc_osw1800-r0/OSW1800-48x6q/switch-sai.conf new file mode 100644 index 00000000000..ae01f3ebe96 --- /dev/null +++ b/device/wnc/x86_64-wnc_osw1800-r0/OSW1800-48x6q/switch-sai.conf @@ -0,0 +1,33 @@ +{ + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0", + "pcie_domain": 0, + "pcie_bus": 5, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "instance": 0, + "p4_program_list": [ + { + "id": "pgm-0", + "instance": 0, + "path": "switch", + "program-name": "switch", + "pd": "lib/tofinopd/switch/libpd.so", + "pd-thrift": "lib/tofinopd/switch/libpdthrift.so", + "table-config": "share/tofinopd/switch/context.json", + "tofino-bin": "share/tofinopd/switch/tofino.bin", + "switchapi": "lib/libswitchapi.so", + "sai": "lib/libsai.so", + "agent0": "lib/platform/x86_64-wnc_osw1800-r0/libpltfm_mgr.so", + "switchapi_port_add": false + } + ] +} diff --git a/device/wnc/x86_64-wnc_osw1800-r0/OSW1800-48x6q/switch-tna-sai.conf b/device/wnc/x86_64-wnc_osw1800-r0/OSW1800-48x6q/switch-tna-sai.conf new file mode 100644 index 00000000000..7cb3ddc48fc --- /dev/null +++ b/device/wnc/x86_64-wnc_osw1800-r0/OSW1800-48x6q/switch-tna-sai.conf @@ -0,0 +1,40 @@ +{ + "instance": 0, + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0", + "pcie_domain": 0, + "pcie_bus": 5, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "p4_devices": [ + { + "device-id": 0, + "agent0": "lib/platform/x86_64-wnc_osw1800-r0/libpltfm_mgr.so", + "p4_programs": [ + { + "p4_pipelines": [ + { + "p4_pipeline_name": "pipe", + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" + } + ], + "program-name": "switch", + "sai": "lib/libsai.so", + "bfrt-config": "share/switch/bf-rt.json", + "model_json_path" : "share/switch/aug_model.json", + "switchapi_port_add": false, + "non_default_port_ppgs": 5 + } + ] + } + ] +} diff --git a/device/wnc/x86_64-wnc_osw1800-r0/default_sku b/device/wnc/x86_64-wnc_osw1800-r0/default_sku new file mode 100644 index 00000000000..0f663505d7a --- /dev/null +++ b/device/wnc/x86_64-wnc_osw1800-r0/default_sku @@ -0,0 +1 @@ +OSW1800-48x6q t1 diff --git a/device/wnc/x86_64-wnc_osw1800-r0/fancontrol b/device/wnc/x86_64-wnc_osw1800-r0/fancontrol new file mode 100644 index 00000000000..d661bd11f1b --- /dev/null +++ b/device/wnc/x86_64-wnc_osw1800-r0/fancontrol @@ -0,0 +1,11 @@ +INTERVAL=10 +DEVPATH=hwmon1=devices/pci0000:00/0000:00:16.0/usb1/1-1/1-1.2/1-1.2.3/1-1.2.3:1.2/i2c-2/i2c-5/5-0033 hwmon2=devices/pci0000:00/0000:00:16.0/usb1/1-1/1-1.2/1-1.2.3/1-1.2.3:1.2/i2c-2/i2c-7/7-001e hwmon3=devices/pci0000:00/0000:00:16.0/usb1/1-1/1-1.2/1-1.2.3/1-1.2.3:1.2/i2c-2/i2c-7/7-004e hwmon4=devices/pci0000:00/0000:00:16.0/usb1/1-1/1-1.2/1-1.2.3/1-1.2.3:1.2/i2c-2/i2c-7/7-004f +DEVNAME=hwmon1=wnc_cpld3 hwmon2=tmp421 hwmon3=tmp75 hwmon4=tmp421 +FCTEMPS=hwmon1/pwm1=hwmon2/temp1_input hwmon1/pwm2=hwmon2/temp2_input hwmon1/pwm3=hwmon3/temp1_input hwmon1/pwm4=hwmon4/temp1_input hwmon1/pwm5=hwmon4/temp2_input +FCFANS=hwmon1/pwm1=hwmon1/fan1_input hwmon1/pwm2=hwmon1/fan2_input hwmon1/pwm3=hwmon1/fan3_input hwmon1/pwm4=hwmon1/fan4_input hwmon1/pwm5=hwmon1/fan5_input +MINTEMP=hwmon1/pwm1=20 hwmon1/pwm2=20 hwmon1/pwm3=20 hwmon1/pwm4=20 hwmon1/pwm5=20 +MAXTEMP=hwmon1/pwm1=50 hwmon1/pwm2=50 hwmon1/pwm3=50 hwmon1/pwm4=50 hwmon1/pwm5=50 +MINSTART=hwmon1/pwm1=32 hwmon1/pwm2=32 hwmon1/pwm3=32 hwmon1/pwm4=32 hwmon1/pwm5=32 +MINSTOP=hwmon1/pwm1=22 hwmon1/pwm2=22 hwmon1/pwm3=22 hwmon1/pwm4=22 hwmon1/pwm5=22 +MINPWM=hwmon1/pwm1=10 hwmon1/pwm2=10 hwmon1/pwm3=10 hwmon1/pwm4=10 hwmon1/pwm5=10 +MAXPWM=hwmon1/pwm1=100 hwmon1/pwm2=100 hwmon1/pwm3=100 hwmon1/pwm4=100 hwmon1/pwm5=100 diff --git a/device/wnc/x86_64-wnc_osw1800-r0/installer.conf b/device/wnc/x86_64-wnc_osw1800-r0/installer.conf new file mode 100644 index 00000000000..dfa6df22689 --- /dev/null +++ b/device/wnc/x86_64-wnc_osw1800-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=57600 diff --git a/device/wnc/x86_64-wnc_osw1800-r0/plugins/eeprom.py b/device/wnc/x86_64-wnc_osw1800-r0/plugins/eeprom.py new file mode 100644 index 00000000000..a073374794f --- /dev/null +++ b/device/wnc/x86_64-wnc_osw1800-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-8/8-0052/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) + diff --git a/device/wnc/x86_64-wnc_osw1800-r0/plugins/psuutil.py b/device/wnc/x86_64-wnc_osw1800-r0/plugins/psuutil.py new file mode 100644 index 00000000000..e62159c8a8c --- /dev/null +++ b/device/wnc/x86_64-wnc_osw1800-r0/plugins/psuutil.py @@ -0,0 +1,64 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def get_num_psus(self): + return 2 + + def get_psu_status(self, index): + if index == 1: + psu_path = "/sys/bus/i2c/devices/6-0050/eeprom" + elif index == 2: + psu_path = "/sys/bus/i2c/devices/6-0051/eeprom" + else: + return False + + try: + data = open(psu_path, "rb") + except IOError: + return False + + result = int(data.read(1).encode("hex"), 16) + data.close() + + if result != 255 and result != 0: + return True + else: + return False + + def get_psu_presence(self, index): + if index == 1: + psu_path = "/sys/bus/i2c/devices/6-0050/eeprom" + elif index == 2: + psu_path = "/sys/bus/i2c/devices/6-0051/eeprom" + else: + return False + + try: + data = open(psu_path, "rb") + except IOError: + return False + + result = int(data.read(1).encode("hex"), 16) + data.close() + + if result != 255 and result != 0: + return True + else: + return False diff --git a/device/wnc/x86_64-wnc_osw1800-r0/plugins/sfputil.py b/device/wnc/x86_64-wnc_osw1800-r0/plugins/sfputil.py new file mode 100644 index 00000000000..549790bfb44 --- /dev/null +++ b/device/wnc/x86_64-wnc_osw1800-r0/plugins/sfputil.py @@ -0,0 +1,213 @@ +#! /usr/bin/python +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase + import sys + sys.path.append('/usr/lib/python2.7/dist-packages/sonic_sfp/') + from sff8472 import sff8472InterfaceId + from sff8472 import sff8472Dom + from sff8436 import sff8436InterfaceId + from sff8436 import sff8436Dom +except ImportError, e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 53 + PORTS_IN_BLOCK = 54 + + EEPROM_OFFSET = 11 + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START + 48, self.PORTS_IN_BLOCK) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + bit_mask = port_num % 8 + + if port_num <= 7: + presence_path = "/sys/bus/i2c/devices/3-0031/sfp_mod_abs1" + elif 8 <= port_num and port_num <= 15: + presence_path = "/sys/bus/i2c/devices/3-0031/sfp_mod_abs2" + elif 16 <= port_num and port_num <= 23: + presence_path = "/sys/bus/i2c/devices/3-0031/sfp_mod_abs3" + elif 24 <= port_num and port_num <= 27: + presence_path = "/sys/bus/i2c/devices/3-0031/sfp_mod_abs4" + elif 28 <= port_num and port_num <= 31: + presence_path = "/sys/bus/i2c/devices/4-0032/sfp_mod_abs1" + bit_mask = bit_mask - 4 + elif 32 <= port_num and port_num <= 39: + presence_path = "/sys/bus/i2c/devices/4-0032/sfp_mod_abs2" + elif 40 <= port_num and port_num <= 47: + presence_path = "/sys/bus/i2c/devices/4-0032/sfp_mod_abs3" + elif 48 <= port_num and port_num <= 71: + presence_path = "/sys/bus/i2c/devices/4-0032/qsfp_modprs" + else: + return False + + try: + reg_file = open(presence_path, "rb") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + reg_value = int(content, 16) + reg_file.close() + + if reg_value & (1 << bit_mask) == 0: + return True + else: + return False + + def get_low_power_mode(self, port_num): + if port_num in self.qsfp_ports: + bit_mask = port_num % 8 + else: + return False + + try: + reg_file = open("/sys/bus/i2c/devices/4-0032/qsfp_lpmode") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + content = reg_file.readline().rstrip() + reg_value = int(content, 16) + reg_file.close() + + if reg_value & (1 << bit_mask) == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + if port_num in self.qsfp_ports: + bit_mask = port_num % 8 + else: + return False + + try: + reg_file = open("/sys/bus/i2c/devices/4-0032/qsfp_lpmode", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + reg_value = int(content, 16) + + if lpmode is True: + reg_value = reg_value | (1 << bit_mask) + else: + reg_value = reg_value & ~(1 << bit_mask) + + reg_file.seek(0) + reg_file.write(str(reg_value)) + reg_file.close() + + return True + + def reset(self, port_num): + if port_num in self.qsfp_ports: + bit_mask = (port_num % 8) + 2 + else: + return False + + try: + reg_file = open("/sys/bus/i2c/devices/4-0032/reset_control", "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + reg_value = int(content, 16) + reg_value = reg_value & ~(1 << bit_mask) + + reg_file.seek(0) + reg_file.write(str(reg_value)) + reg_file.close() + + time.sleep(1) + + try: + reg_file = open("/sys/bus/i2c/devices/4-0032/reset_control", "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = reg_value | (1 << bit_mask) + reg_file.seek(0) + reg_file.write(str(reg_value)) + reg_file.close() + + return True + + def get_eeprom_dict(self, port_num): + if not self.get_presence(port_num): + return None + + sfp_data = {} + + eeprom_ifraw = self.get_eeprom_raw(port_num) + eeprom_domraw = self.get_eeprom_dom_raw(port_num) + + if eeprom_ifraw is None: + return None + + if port_num in self.qsfp_ports: + sfpi_obj = sff8436InterfaceId(eeprom_ifraw) + if sfpi_obj is not None: + sfp_data['interface'] = sfpi_obj.get_data_pretty() + + sfpd_obj = sff8436Dom(eeprom_ifraw) + if sfpd_obj is not None: + sfp_data['dom'] = sfpd_obj.get_data_pretty() + return sfp_data + + sfpi_obj = sff8472InterfaceId(eeprom_ifraw) + if sfpi_obj is not None: + sfp_data['interface'] = sfpi_obj.get_data_pretty() + cal_type = sfpi_obj.get_calibration_type() + + if eeprom_domraw is not None: + sfpd_obj = sff8472Dom(eeprom_domraw, cal_type) + if sfpd_obj is not None: + sfp_data['dom'] = sfpd_obj.get_data_pretty() + + return sfp_data + + def get_transceiver_change_event(self): + """ + TODO: This function need to be implemented + when decide to support monitoring SFP(Xcvrd) + on this platform. + """ + raise NotImplementedError diff --git a/device/wnc/x86_64-wnc_osw1800-r0/sensors.conf b/device/wnc/x86_64-wnc_osw1800-r0/sensors.conf new file mode 100644 index 00000000000..d91945ff722 --- /dev/null +++ b/device/wnc/x86_64-wnc_osw1800-r0/sensors.conf @@ -0,0 +1,33 @@ +# libsensors configuration filei +# -------------------------------------------------- +# + +bus "i2c-7" "i2c-2-mux" +chip "tmp421-i2c-7-1E" + label temp1 "ts1" + set temp1_max 50 + set temp1_max_hyst 25 + label temp2 "ts4" + set temp2_max 50 + set temp2_max_hyst 25 + +chip "tmp75-i2c-7-4E" + label temp1 "ts3" + set temp1_max 50 + set temp1_max_hyst 25 + +chip "tmp421-i2c-7-4F" + label temp1 "ts2" + set temp1_max 50 + set temp1_max_hyst 25 + label temp2 "ts5" + set temp2_max 50 + set temp2_max_hyst 25 + +bus "i2c-5" "i2c-2-mux" +chip "wnc_cpld3-i2c-5-33" + label fan1 "fan1" + label fan2 "fan2" + label fan3 "fan3" + label fan4 "fan4" + label fan5 "fan5" diff --git a/docker-bgp/Dockerfile b/docker-bgp/Dockerfile deleted file mode 100755 index 711e48fee20..00000000000 --- a/docker-bgp/Dockerfile +++ /dev/null @@ -1,17 +0,0 @@ -FROM debian:jessie - -## Set the apt source -COPY files/sources.list /etc/sources.list -RUN apt-get clean && apt-get update - -## Pre-install the fundamental packages -RUN apt-get -y install \ - rsyslog \ - python - -COPY deps /deps -RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; dpkg_apt /deps/quagga_*.deb - -ENTRYPOINT service rsyslog start \ - && service quagga start \ - && /bin/bash diff --git a/docker-database/Dockerfile b/docker-database/Dockerfile deleted file mode 100755 index e830385d4fb..00000000000 --- a/docker-database/Dockerfile +++ /dev/null @@ -1,14 +0,0 @@ -FROM debian:jessie - -## Set the apt source -COPY files/sources.list /etc/sources.list -RUN apt-get clean && apt-get update - -## Pre-install the fundamental packages -RUN apt-get -y install \ - rsyslog \ - redis-server - -ENTRYPOINT service rsyslog start \ - && service redis-server start \ - && /bin/bash diff --git a/docker-lldp/Dockerfile b/docker-lldp/Dockerfile deleted file mode 100755 index 322a92f57ea..00000000000 --- a/docker-lldp/Dockerfile +++ /dev/null @@ -1,23 +0,0 @@ -FROM debian:jessie - -## Set the apt source -COPY files/sources.list /etc/sources.list -RUN apt-get clean && apt-get update - -## Pre-install the fundamental packages -RUN apt-get -y install \ - rsyslog \ - lldpd - -COPY deps /deps - -## Install Python SSWSDK (lldpsyncd dependancy) -## Note: dpkg_apt function has the benefit to detect missing .deb file -RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; dpkg_apt /deps/python-sswsdk_*.deb -## Install LLDP Sync Daemon -## Note: dpkg_apt function has the benefit to detect missing .deb file -RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; dpkg_apt /deps/lldpsyncd_*.deb - -## Specify init as CMD to enable systemd -## Note: don't provide ENTRYPOINT at the same time -CMD ["/sbin/init"] diff --git a/docker-ptf/Dockerfile b/docker-ptf/Dockerfile deleted file mode 100644 index 6c35e524a91..00000000000 --- a/docker-ptf/Dockerfile +++ /dev/null @@ -1,48 +0,0 @@ -FROM debian:jessie - -MAINTAINER Pavel Shirshov - -## Copy dependencies -COPY deps /root/deps - -## Make apt-get non-interactive -ENV DEBIAN_FRONTEND=noninteractive - -## Set the apt source, update package cache and install necessary packages -RUN echo "deb http://ftp.us.debian.org/debian/ jessie main contrib non-free" > /etc/apt/sources.list \ - && apt-get update \ - && apt-get upgrade -y \ - && apt-get dist-upgrade -y \ - && apt-get install -y --no-install-recommends \ - openssh-server \ - vim-tiny \ - python \ - python-scapy \ - net-tools \ - python-setuptools \ - supervisor \ - traceroute \ - lsof \ - tcpdump \ - && dpkg -i /root/deps/python-ptf_*.deb \ - && dpkg -i --force-depends /root/deps/libthrift-0.9.2_*.deb \ - && dpkg -i --force-depends /root/deps/python-thrift_*.deb \ - && apt-get -y install -f \ - && rm -rf /root/deps \ - && apt-get -y autoclean \ - && apt-get -y autoremove \ - && rm -rf /var/lib/apt/lists/* - -## Adjust sshd settings -RUN mkdir /var/run/sshd \ - && echo 'root:root' | chpasswd \ - && sed -ri 's/^PermitRootLogin\s+.*/PermitRootLogin yes/' /etc/ssh/sshd_config \ - && sed -ri 's/UsePAM yes/#UsePAM yes/g' /etc/ssh/sshd_config \ - && sed -i '$aUseDNS no' /etc/ssh/sshd_config \ - && mkdir /root/deps - -COPY supervisord.conf /etc/supervisor/conf.d/supervisord.conf - -EXPOSE 22 - -ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/docker-snmp/Dockerfile b/docker-snmp/Dockerfile deleted file mode 100755 index 2afc5eddeee..00000000000 --- a/docker-snmp/Dockerfile +++ /dev/null @@ -1,23 +0,0 @@ -FROM debian:jessie - -## Set the apt source -COPY files/sources.list /etc/sources.list -RUN apt-get clean && apt-get update - -## Pre-install the fundamental packages -RUN apt-get -y install \ - rsyslog \ - snmp \ - snmpd - -COPY deps /deps - -## Install Python SSWSDK (SNMP subagent dependancy) -## Note: dpkg_apt function has the benefit to detect missing .deb file -RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; dpkg_apt /deps/python-sswsdk_*.deb -## Install SNMP subagent -RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; dpkg_apt /deps/acs-snmp-subagent_*.deb - -## Specify init as CMD to enable systemd -## Note: don't provide ENTRYPOINT at the same time -CMD ["/sbin/init"] diff --git a/docker-sswsyncd/Dockerfile b/docker-sswsyncd/Dockerfile deleted file mode 100755 index d260f442b39..00000000000 --- a/docker-sswsyncd/Dockerfile +++ /dev/null @@ -1,21 +0,0 @@ -FROM debian:jessie - -## Set the apt source -COPY files/sources.list /etc/sources.list -RUN apt-get clean && apt-get update - -## Pre-install the fundamental packages -## TODO: sswsyncd depends on ifupdown -RUN apt-get -y install \ - ifupdown \ - rsyslog - -COPY deps /deps -RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; dpkg_apt /deps/libopennsl_*.deb -RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; dpkg_apt /deps/libsaibcm_*.deb -RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; dpkg_apt /deps/libsswsdk_*.deb -RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; dpkg_apt /deps/sswsyncd_*.deb - -ENTRYPOINT service rsyslog start \ - && service sswsyncd start \ - && /bin/bash diff --git a/dockers/docker-base-stretch/Dockerfile.j2 b/dockers/docker-base-stretch/Dockerfile.j2 new file mode 100644 index 00000000000..95272e2322c --- /dev/null +++ b/dockers/docker-base-stretch/Dockerfile.j2 @@ -0,0 +1,88 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +{% if CONFIGURED_ARCH == "armhf" %} +FROM multiarch/debian-debootstrap:armhf-stretch +{% elif CONFIGURED_ARCH == "arm64" %} +FROM multiarch/debian-debootstrap:arm64-stretch +{% else %} +FROM debian:stretch +{% endif %} + +# Clean documentation in FROM image +RUN find /usr/share/doc -depth \( -type f -o -type l \) ! -name copyright | xargs rm || true + +# Clean doc directories that are empty or only contain empty directories +RUN while [ -n "$(find /usr/share/doc -depth -type d -empty -print -exec rmdir {} +)" ]; do :; done && \ + rm -rf \ + /usr/share/man/* \ + /usr/share/groff/* \ + /usr/share/info/* \ + /usr/share/lintian/* \ + /usr/share/linda/* \ + /var/cache/man/* \ + /usr/share/locale/* + +# Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +# Configure data sources for apt/dpkg +COPY ["dpkg_01_drop", "/etc/dpkg/dpkg.cfg.d/01_drop"] +{% if CONFIGURED_ARCH == "armhf" %} +COPY ["sources.list.armhf", "/etc/apt/sources.list"] +{% elif CONFIGURED_ARCH == "arm64" %} +COPY ["sources.list.arm64", "/etc/apt/sources.list"] +{% else %} +COPY ["sources.list", "/etc/apt/sources.list"] +{% endif %} +COPY ["no_install_recommend_suggest", "/etc/apt/apt.conf.d"] + +# Update apt cache and +# pre-install fundamental packages +RUN apt-get update && \ + apt-get -y install \ + less \ + perl \ + procps \ + python \ + rsyslog \ + vim-tiny \ +# Install dependencies of supervisor + python-pkg-resources \ + python-meld3 + +{% if CONFIGURED_ARCH == "armhf" %} +# ip and ifconfig utility missing in docker for armhf +RUN apt-get -y install \ + iproute2 \ + net-tools +{% endif %} + +RUN mkdir -p /etc/supervisor /var/log/supervisor + +RUN apt-get -y purge \ + exim4 \ + exim4-base \ + exim4-config \ + exim4-daemon-light + +{% if docker_base_stretch_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_base_stretch_debs.split(' '), "/debs/") }} + +# Install built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_base_stretch_debs.split(' ')) }} +{%- endif %} + +# Clean up apt +# Remove /var/lib/apt/lists/*, could be obsoleted for derived images +RUN apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /var/lib/apt/lists/* /tmp/* + +COPY ["etc/rsyslog.conf", "/etc/rsyslog.conf"] +COPY ["etc/rsyslog.d/*", "/etc/rsyslog.d/"] +COPY ["root/.vimrc", "/root/.vimrc"] + +RUN ln /usr/bin/vim.tiny /usr/bin/vim + +COPY ["etc/supervisor/supervisord.conf", "/etc/supervisor/"] diff --git a/dockers/docker-base-stretch/LICENSE b/dockers/docker-base-stretch/LICENSE new file mode 100644 index 00000000000..03d8f31e513 --- /dev/null +++ b/dockers/docker-base-stretch/LICENSE @@ -0,0 +1,13 @@ +Copyright 2016 Microsoft, Inc. + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. diff --git a/dockers/docker-base-stretch/dpkg_01_drop b/dockers/docker-base-stretch/dpkg_01_drop new file mode 100644 index 00000000000..e75ef314715 --- /dev/null +++ b/dockers/docker-base-stretch/dpkg_01_drop @@ -0,0 +1,22 @@ +## Drop unnecessary files +## ref: https://wiki.ubuntu.com/ReducingDiskFootprint + +## Documentation +path-exclude /usr/share/doc/* +# we need to keep copyright files for legal reasons +path-include /usr/share/doc/*/copyright +path-exclude /usr/share/man/* +path-exclude /usr/share/groff/* +path-exclude /usr/share/info/* +# lintian stuff is small, but really unnecessary +path-exclude /usr/share/lintian/* +path-exclude /usr/share/linda/* + +## Translations +path-exclude /usr/share/locale/* + +## Landscape +path-exclude /usr/share/pyshared/twisted/test* +path-exclude /usr/lib/python*/dist-packages/twisted/test* +path-exclude /usr/share/pyshared/twisted/*/test* +path-exclude /usr/lib/python*/dist-packages/twisted/*/test* diff --git a/dockers/docker-base-stretch/etc/rsyslog.conf b/dockers/docker-base-stretch/etc/rsyslog.conf new file mode 100644 index 00000000000..ef249229ab1 --- /dev/null +++ b/dockers/docker-base-stretch/etc/rsyslog.conf @@ -0,0 +1,76 @@ +# +# /etc/rsyslog.conf Configuration file for rsyslog. +# +# For more information see +# /usr/share/doc/rsyslog-doc/html/rsyslog_conf.html + + +################# +#### MODULES #### +################# + +$ModLoad imuxsock # provides support for local system logging + +# +# Set a rate limit on messages from the container +# +$SystemLogRateLimitInterval 300 +$SystemLogRateLimitBurst 20000 + +#$ModLoad imklog # provides kernel logging support +#$ModLoad immark # provides --MARK-- message capability + +# provides UDP syslog reception +#$ModLoad imudp +#$UDPServerRun 514 + +# provides TCP syslog reception +#$ModLoad imtcp +#$InputTCPServerRun 514 + + +########################### +#### GLOBAL DIRECTIVES #### +########################### + +# Set remote syslog server +template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %syslogtag%%msg:::sp-if-no-1st-sp%%msg%") +*.* action(type="omfwd" target="127.0.0.1" port="514" protocol="udp" Template="ForwardFormatInContainer") + +# +# Use traditional timestamp format. +# To enable high precision timestamps, comment out the following line. +# +#$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat + +# Define a custom template +$template SONiCFileFormat,"%TIMESTAMP%.%timestamp:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" +$ActionFileDefaultTemplate SONiCFileFormat + +# +# Set the default permissions for all log files. +# +$FileOwner root +$FileGroup adm +$FileCreateMode 0640 +$DirCreateMode 0755 +$Umask 0022 + +# +# Where to place spool and state files +# +$WorkDirectory /var/spool/rsyslog + +# +# Include all config files in /etc/rsyslog.d/ +# +$IncludeConfig /etc/rsyslog.d/*.conf + +# +# Suppress duplicate messages and report "message repeated n times" +# +$RepeatedMsgReduction on + +############### +#### RULES #### +############### diff --git a/dockers/docker-base-stretch/etc/rsyslog.d/supervisor.conf b/dockers/docker-base-stretch/etc/rsyslog.d/supervisor.conf new file mode 100644 index 00000000000..7c7a64d7afe --- /dev/null +++ b/dockers/docker-base-stretch/etc/rsyslog.d/supervisor.conf @@ -0,0 +1,9 @@ +$ModLoad imfile + +$InputFileName /var/log/supervisor/supervisord.log +$InputFileTag supervisord +$InputFileStateFile state-supervisor +$InputFileSeverity info +$InputFileFacility local0 +$InputFilePersistStateInterval 1 +$InputRunFileMonitor diff --git a/dockers/docker-base-stretch/etc/supervisor/supervisord.conf b/dockers/docker-base-stretch/etc/supervisor/supervisord.conf new file mode 100644 index 00000000000..5d1010e8fa4 --- /dev/null +++ b/dockers/docker-base-stretch/etc/supervisor/supervisord.conf @@ -0,0 +1,33 @@ +; supervisor config file + +[unix_http_server] +file=/var/run/supervisor.sock ; (the path to the socket file) +chmod=0700 ; socket file mode (default 0700) +username=dummy +password=dummy + +[supervisord] +logfile=/var/log/supervisor/supervisord.log ; (main log file;default $CWD/supervisord.log) +pidfile=/var/run/supervisord.pid ; (supervisord pidfile;default supervisord.pid) +childlogdir=/var/log/supervisor ; ('AUTO' child log dir, default $TEMP) +user=root + +; the below section must remain in the config file for RPC +; (supervisorctl/web interface) to work, additional interfaces may be +; added by defining them in separate rpcinterface: sections +[rpcinterface:supervisor] +supervisor.rpcinterface_factory = supervisor.rpcinterface:make_main_rpcinterface + +[supervisorctl] +serverurl=unix:///var/run/supervisor.sock ; use a unix:// URL for a unix socket +username=dummy +password=dummy + +; The [include] section can just contain the "files" setting. This +; setting can list multiple files (separated by whitespace or +; newlines). It can also contain wildcards. The filenames are +; interpreted as relative to this file. Included files *cannot* +; include files themselves. + +[include] +files = /etc/supervisor/conf.d/*.conf diff --git a/dockers/docker-base-stretch/no_install_recommend_suggest b/dockers/docker-base-stretch/no_install_recommend_suggest new file mode 100644 index 00000000000..b5bca577de1 --- /dev/null +++ b/dockers/docker-base-stretch/no_install_recommend_suggest @@ -0,0 +1,5 @@ +# Instruct apt-get to NOT install "recommended" or "suggested" packages by +# default when installing a package. + +APT::Install-Recommends "false"; +APT::Install-Suggests "false"; diff --git a/dockers/docker-base-stretch/root/.vimrc b/dockers/docker-base-stretch/root/.vimrc new file mode 100644 index 00000000000..5c1ba8a04f4 --- /dev/null +++ b/dockers/docker-base-stretch/root/.vimrc @@ -0,0 +1,2 @@ +" enable vim features +set nocompatible diff --git a/dockers/docker-base-stretch/sources.list b/dockers/docker-base-stretch/sources.list new file mode 100644 index 00000000000..752b1bb4fc6 --- /dev/null +++ b/dockers/docker-base-stretch/sources.list @@ -0,0 +1,8 @@ +## Debian mirror on Microsoft Azure +## Ref: http://debian-archive.trafficmanager.net/ + +deb [arch=amd64] http://debian-archive.trafficmanager.net/debian/ stretch main contrib non-free +deb-src [arch=amd64] http://debian-archive.trafficmanager.net/debian/ stretch main contrib non-free +deb [arch=amd64] http://debian-archive.trafficmanager.net/debian-security/ stretch/updates main contrib non-free +deb-src [arch=amd64] http://debian-archive.trafficmanager.net/debian-security/ stretch/updates main contrib non-free +deb [arch=amd64] http://debian-archive.trafficmanager.net/debian/ stretch-backports main contrib non-free diff --git a/dockers/docker-base-stretch/sources.list.arm64 b/dockers/docker-base-stretch/sources.list.arm64 new file mode 100644 index 00000000000..b2e0a329d0b --- /dev/null +++ b/dockers/docker-base-stretch/sources.list.arm64 @@ -0,0 +1,7 @@ +## Debian mirror for ARM repo + +# ARM repo +deb [arch=arm64] http://deb.debian.org/debian stretch main contrib non-free +deb-src [arch=arm64] http://deb.debian.org/debian stretch main contrib non-free +deb [arch=arm64] http://security.debian.org stretch/updates main contrib non-free +deb-src [arch=arm64] http://security.debian.org stretch/updates main contrib non-free diff --git a/dockers/docker-base-stretch/sources.list.armhf b/dockers/docker-base-stretch/sources.list.armhf new file mode 100644 index 00000000000..884a091175a --- /dev/null +++ b/dockers/docker-base-stretch/sources.list.armhf @@ -0,0 +1,7 @@ +## Debian mirror for ARM repo + +# ARM repo +deb [arch=armhf] http://deb.debian.org/debian stretch main contrib non-free +deb-src [arch=armhf] http://deb.debian.org/debian stretch main contrib non-free +deb [arch=armhf] http://security.debian.org stretch/updates main contrib non-free +deb-src [arch=armhf] http://security.debian.org stretch/updates main contrib non-free diff --git a/dockers/docker-base/Dockerfile.j2 b/dockers/docker-base/Dockerfile.j2 new file mode 100644 index 00000000000..cb2ff80186a --- /dev/null +++ b/dockers/docker-base/Dockerfile.j2 @@ -0,0 +1,98 @@ +{% if CONFIGURED_ARCH == "armhf" %} +FROM multiarch/debian-debootstrap:armhf-jessie +{% elif CONFIGURED_ARCH == "arm64" %} +FROM multiarch/debian-debootstrap:arm64-jessie +{% else %} +FROM debian:jessie +{% endif %} + +## Remove retired jessie-updates repo +RUN sed -i '/http:\/\/deb.debian.org\/debian jessie-updates main/d' /etc/apt/sources.list + +# Clean documentation in FROM image +RUN find /usr/share/doc -depth \( -type f -o -type l \) ! -name copyright | xargs rm || true + +# Clean doc directories that are empty or only contain empty directories +RUN while [ -n "$(find /usr/share/doc -depth -type d -empty -print -exec rmdir {} +)" ]; do :; done +RUN rm -rf \ + /usr/share/man/* \ + /usr/share/groff/* \ + /usr/share/info/* \ + /usr/share/lintian/* \ + /usr/share/linda/* \ + /var/cache/man/* \ + /usr/share/locale/* + +# Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +# Configure data sources for apt/dpkg +COPY ["dpkg_01_drop", "/etc/dpkg/dpkg.cfg.d/01_drop"] +{% if CONFIGURED_ARCH == "armhf" %} +COPY ["sources.list.armhf", "/etc/apt/sources.list"] +{% elif CONFIGURED_ARCH == "arm64" %} +COPY ["sources.list.arm64", "/etc/apt/sources.list"] +COPY ["aptconf_archive_expired_release", "/etc/apt/apt.conf.d"] +{% else %} +COPY ["sources.list", "/etc/apt/sources.list"] +{% endif %} +COPY ["no_install_recommend_suggest", "/etc/apt/apt.conf.d"] +RUN apt-get update + +# Pre-install fundamental packages +RUN apt-get -y install \ + vim-tiny \ + perl \ + python \ + rsyslog \ + less + +COPY ["etc/rsyslog.conf", "/etc/rsyslog.conf"] +COPY ["etc/rsyslog.d/*", "/etc/rsyslog.d/"] +COPY ["root/.vimrc", "/root/.vimrc"] + +# Install dependencies of supervisor +RUN apt-get -y install python-pkg-resources python-meld3 + +RUN mkdir -p /etc/supervisor +RUN mkdir -p /var/log/supervisor + +COPY ["etc/supervisor/supervisord.conf", "/etc/supervisor/"] + +RUN apt-get -y purge \ + exim4 \ + exim4-base \ + exim4-config \ + exim4-daemon-light + +{% if docker_base_debs.strip() -%} +# Copy built Debian packages +{%- for deb in docker_base_debs.split(' ') %} +COPY debs/{{ deb }} debs/ +{%- endfor %} + +# Install built Debian packages and implicitly install their dependencies +{%- for deb in docker_base_debs.split(' ') %} +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; dpkg_apt debs/{{ deb }} +{%- endfor %} +{%- endif %} + +{% if docker_base_dbgs.strip() -%} +# Install common debug-packages +{%- for dbg_pkg in docker_base_dbgs.split(' ') %} +RUN apt-get -y install {{ dbg_pkg }} +{%- endfor %} +{% else %} +RUN ln /usr/bin/vim.tiny /usr/bin/vim +{%- endif %} + +# Remove python3.4 +# Note: if later python3 is required by more docker images, consider install homebrew python3 here instead of in SNMP image only +RUN apt-get purge -y libpython3.4-minimal + +# Clean up apt +# Remove /var/lib/apt/lists/*, could be obsoleted for derived images +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /var/lib/apt/lists/* + +RUN rm -rf /tmp/* diff --git a/dockers/docker-base/LICENSE b/dockers/docker-base/LICENSE new file mode 100644 index 00000000000..03d8f31e513 --- /dev/null +++ b/dockers/docker-base/LICENSE @@ -0,0 +1,13 @@ +Copyright 2016 Microsoft, Inc. + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. diff --git a/dockers/docker-base/aptconf_archive_expired_release b/dockers/docker-base/aptconf_archive_expired_release new file mode 100644 index 00000000000..67bc409b217 --- /dev/null +++ b/dockers/docker-base/aptconf_archive_expired_release @@ -0,0 +1,3 @@ +# Instruct apt-get to override expired releases repo list for jessie archives + +Acquire::Check-Valid-Until "0"; diff --git a/dockers/docker-base/dpkg_01_drop b/dockers/docker-base/dpkg_01_drop new file mode 100644 index 00000000000..e75ef314715 --- /dev/null +++ b/dockers/docker-base/dpkg_01_drop @@ -0,0 +1,22 @@ +## Drop unnecessary files +## ref: https://wiki.ubuntu.com/ReducingDiskFootprint + +## Documentation +path-exclude /usr/share/doc/* +# we need to keep copyright files for legal reasons +path-include /usr/share/doc/*/copyright +path-exclude /usr/share/man/* +path-exclude /usr/share/groff/* +path-exclude /usr/share/info/* +# lintian stuff is small, but really unnecessary +path-exclude /usr/share/lintian/* +path-exclude /usr/share/linda/* + +## Translations +path-exclude /usr/share/locale/* + +## Landscape +path-exclude /usr/share/pyshared/twisted/test* +path-exclude /usr/lib/python*/dist-packages/twisted/test* +path-exclude /usr/share/pyshared/twisted/*/test* +path-exclude /usr/lib/python*/dist-packages/twisted/*/test* diff --git a/dockers/docker-base/etc/rsyslog.conf b/dockers/docker-base/etc/rsyslog.conf new file mode 100644 index 00000000000..4851ac78447 --- /dev/null +++ b/dockers/docker-base/etc/rsyslog.conf @@ -0,0 +1,80 @@ +############################################################################### +# Managed by Ansible +# file: ansible/roles/acs/templates/rsyslog.conf.j2 +############################################################################### +# +# /etc/rsyslog.conf Configuration file for rsyslog. +# +# For more information see +# /usr/share/doc/rsyslog-doc/html/rsyslog_conf.html + + +################# +#### MODULES #### +################# + +$ModLoad imuxsock # provides support for local system logging + +# +# Set a rate limit on messages from the container +# +$SystemLogRateLimitInterval 300 +$SystemLogRateLimitBurst 20000 + +#$ModLoad imklog # provides kernel logging support +#$ModLoad immark # provides --MARK-- message capability + +# provides UDP syslog reception +#$ModLoad imudp +#$UDPServerRun 514 + +# provides TCP syslog reception +#$ModLoad imtcp +#$InputTCPServerRun 514 + + +########################### +#### GLOBAL DIRECTIVES #### +########################### + +# Set remote syslog server +template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %syslogtag%%msg:::sp-if-no-1st-sp%%msg%") +*.* action(type="omfwd" target="127.0.0.1" port="514" protocol="udp" Template="ForwardFormatInContainer") + +# +# Use traditional timestamp format. +# To enable high precision timestamps, comment out the following line. +# +#$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat + +# Define a custom template +$template SONiCFileFormat,"%TIMESTAMP%.%timestamp:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" +$ActionFileDefaultTemplate SONiCFileFormat + +# +# Set the default permissions for all log files. +# +$FileOwner root +$FileGroup adm +$FileCreateMode 0640 +$DirCreateMode 0755 +$Umask 0022 + +# +# Where to place spool and state files +# +$WorkDirectory /var/spool/rsyslog + +# +# Include all config files in /etc/rsyslog.d/ +# +$IncludeConfig /etc/rsyslog.d/*.conf + +# +# Suppress duplicate messages and report "message repeated n times" +# +$RepeatedMsgReduction on + +############### +#### RULES #### +############### diff --git a/dockers/docker-base/etc/rsyslog.d/supervisor.conf b/dockers/docker-base/etc/rsyslog.d/supervisor.conf new file mode 100644 index 00000000000..7c7a64d7afe --- /dev/null +++ b/dockers/docker-base/etc/rsyslog.d/supervisor.conf @@ -0,0 +1,9 @@ +$ModLoad imfile + +$InputFileName /var/log/supervisor/supervisord.log +$InputFileTag supervisord +$InputFileStateFile state-supervisor +$InputFileSeverity info +$InputFileFacility local0 +$InputFilePersistStateInterval 1 +$InputRunFileMonitor diff --git a/dockers/docker-base/etc/supervisor/supervisord.conf b/dockers/docker-base/etc/supervisor/supervisord.conf new file mode 100644 index 00000000000..5d1010e8fa4 --- /dev/null +++ b/dockers/docker-base/etc/supervisor/supervisord.conf @@ -0,0 +1,33 @@ +; supervisor config file + +[unix_http_server] +file=/var/run/supervisor.sock ; (the path to the socket file) +chmod=0700 ; socket file mode (default 0700) +username=dummy +password=dummy + +[supervisord] +logfile=/var/log/supervisor/supervisord.log ; (main log file;default $CWD/supervisord.log) +pidfile=/var/run/supervisord.pid ; (supervisord pidfile;default supervisord.pid) +childlogdir=/var/log/supervisor ; ('AUTO' child log dir, default $TEMP) +user=root + +; the below section must remain in the config file for RPC +; (supervisorctl/web interface) to work, additional interfaces may be +; added by defining them in separate rpcinterface: sections +[rpcinterface:supervisor] +supervisor.rpcinterface_factory = supervisor.rpcinterface:make_main_rpcinterface + +[supervisorctl] +serverurl=unix:///var/run/supervisor.sock ; use a unix:// URL for a unix socket +username=dummy +password=dummy + +; The [include] section can just contain the "files" setting. This +; setting can list multiple files (separated by whitespace or +; newlines). It can also contain wildcards. The filenames are +; interpreted as relative to this file. Included files *cannot* +; include files themselves. + +[include] +files = /etc/supervisor/conf.d/*.conf diff --git a/dockers/docker-base/no_install_recommend_suggest b/dockers/docker-base/no_install_recommend_suggest new file mode 100644 index 00000000000..b5bca577de1 --- /dev/null +++ b/dockers/docker-base/no_install_recommend_suggest @@ -0,0 +1,5 @@ +# Instruct apt-get to NOT install "recommended" or "suggested" packages by +# default when installing a package. + +APT::Install-Recommends "false"; +APT::Install-Suggests "false"; diff --git a/dockers/docker-base/root/.vimrc b/dockers/docker-base/root/.vimrc new file mode 100644 index 00000000000..5c1ba8a04f4 --- /dev/null +++ b/dockers/docker-base/root/.vimrc @@ -0,0 +1,2 @@ +" enable vim features +set nocompatible diff --git a/dockers/docker-base/sources.list b/dockers/docker-base/sources.list new file mode 100644 index 00000000000..afdff92d3c7 --- /dev/null +++ b/dockers/docker-base/sources.list @@ -0,0 +1,7 @@ +## Debian mirror on Microsoft Azure +## Ref: http://debian-archive.trafficmanager.net/ + +deb [arch=amd64] http://debian-archive.trafficmanager.net/debian/ jessie main contrib non-free +deb-src [arch=amd64] http://debian-archive.trafficmanager.net/debian/ jessie main contrib non-free +deb [arch=amd64] http://debian-archive.trafficmanager.net/debian-security/ jessie/updates main contrib non-free +deb-src [arch=amd64] http://debian-archive.trafficmanager.net/debian-security/ jessie/updates main contrib non-free diff --git a/dockers/docker-base/sources.list.arm64 b/dockers/docker-base/sources.list.arm64 new file mode 100644 index 00000000000..a451be25fd7 --- /dev/null +++ b/dockers/docker-base/sources.list.arm64 @@ -0,0 +1,7 @@ +## Debian mirror for ARM repo + +# ARM64 repo +deb [arch=arm64] http://archive.debian.org/debian jessie main contrib non-free +deb-src [arch=arm64] http://archive.debian.org/debian jessie main contrib non-free +deb-src [arch=arm64] http://archive.debian.org/debian jessie-backports main contrib non-free +deb [arch=arm64] http://archive.debian.org/debian jessie-backports main contrib non-free diff --git a/dockers/docker-base/sources.list.armhf b/dockers/docker-base/sources.list.armhf new file mode 100644 index 00000000000..18f71fc31fc --- /dev/null +++ b/dockers/docker-base/sources.list.armhf @@ -0,0 +1,7 @@ +## Debian mirror for ARM repo + +# ARMhf repo +deb [arch=armhf] http://deb.debian.org/debian jessie main contrib non-free +deb-src [arch=armhf] http://deb.debian.org/debian jessie main contrib non-free +deb [arch=armhf] http://security.debian.org jessie/updates main contrib non-free +deb-src [arch=armhf] http://security.debian.org jessie/updates main contrib non-free diff --git a/dockers/docker-basic_router/Dockerfile b/dockers/docker-basic_router/Dockerfile new file mode 100644 index 00000000000..7d7c724920c --- /dev/null +++ b/dockers/docker-basic_router/Dockerfile @@ -0,0 +1,22 @@ +FROM docker-base + +MAINTAINER Xudong Wu + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +## Update apt's cache of available packages +RUN apt-get clean && apt-get update + +COPY deps /deps + +RUN dpkg -i /deps/libopennsl_*.deb; \ + dpkg -i /deps/libsaibcm_*.deb; \ + apt-get -y install -f + +RUN mv /deps/basic_router /usr/sbin/basic_router + +COPY ["start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/dockers/docker-basic_router/start.sh b/dockers/docker-basic_router/start.sh new file mode 100755 index 00000000000..a4d378ef77d --- /dev/null +++ b/dockers/docker-basic_router/start.sh @@ -0,0 +1,5 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd diff --git a/dockers/docker-basic_router/supervisord.conf b/dockers/docker-basic_router/supervisord.conf new file mode 100644 index 00000000000..bfa84fdcdfb --- /dev/null +++ b/dockers/docker-basic_router/supervisord.conf @@ -0,0 +1,20 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/dockers/docker-config-engine-stretch/Dockerfile.j2 b/dockers/docker-config-engine-stretch/Dockerfile.j2 new file mode 100644 index 00000000000..8b958b8f4f5 --- /dev/null +++ b/dockers/docker-config-engine-stretch/Dockerfile.j2 @@ -0,0 +1,49 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-base-stretch + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update && \ + apt-get install -y \ + # Dependencies for sonic-cfggen + python-lxml \ + python-yaml \ + python-bitarray \ + python-pip \ + python-dev \ + python-natsort \ + python-setuptools + +RUN pip install --upgrade pip + +RUN pip install \ + netaddr \ + ipaddr \ + jinja2 \ + pyangbind==0.5.10 + +{% if docker_config_engine_stretch_debs.strip() %} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_config_engine_stretch_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_config_engine_stretch_debs.split(' ')) }} +{% endif %} + +{% if docker_config_engine_stretch_whls.strip() %} +# Copy locally-built Python wheel dependencies +{{ copy_files("python-wheels/", docker_config_engine_stretch_whls.split(' '), "/python-wheels/") }} + +# Install locally-built Python wheel dependencies +{{ install_python_wheels(docker_config_engine_stretch_whls.split(' ')) }} +{% endif %} + +## Clean up +RUN apt-get purge -y \ + python-pip \ + python-dev && \ + apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs /python-wheels diff --git a/dockers/docker-config-engine/Dockerfile.j2 b/dockers/docker-config-engine/Dockerfile.j2 new file mode 100644 index 00000000000..ba72cce31d4 --- /dev/null +++ b/dockers/docker-config-engine/Dockerfile.j2 @@ -0,0 +1,47 @@ +FROM docker-base + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +# Dependencies for sonic-cfggen +RUN apt-get install -y python-lxml python-yaml python-bitarray python-pip python-dev python-natsort + +RUN pip install --upgrade pip + +RUN pip install netaddr ipaddr jinja2 pyangbind==0.5.10 + +{% if docker_config_engine_debs.strip() %} +COPY \ +{% for deb in docker_config_engine_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ +{%- endif -%} + +{% if docker_config_engine_debs.strip() %} +RUN dpkg -i \ +{% for deb in docker_config_engine_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} +{%- endif -%} + +{% if docker_config_engine_whls.strip() %} +COPY \ +{% for whl in docker_config_engine_whls.split(' ') -%} +python-wheels/{{ whl }}{{' '}} +{%- endfor -%} +python-wheels/ +{%- endif -%} + +{% if docker_config_engine_whls.strip() %} +RUN pip install \ +{% for whl in docker_config_engine_whls.split(' ') -%} +python-wheels/{{ whl }}{{' '}} +{%- endfor %} +{%- endif -%} + +## Clean up +RUN apt-get purge -y python-pip python-dev; apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs /python-wheels diff --git a/dockers/docker-database/Dockerfile.j2 b/dockers/docker-database/Dockerfile.j2 new file mode 100644 index 00000000000..acb5e013fb8 --- /dev/null +++ b/dockers/docker-database/Dockerfile.j2 @@ -0,0 +1,40 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +# Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +# Update apt's cache of available packages +RUN apt-get update + +{% if docker_database_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_database_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_database_debs.split(' ')) }} +{%- endif %} + +# Clean up +RUN apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs ~/.cache && \ + sed -ri 's/^(save .*$)/# \1/g; \ + s/^daemonize yes$/daemonize no/; \ + s/^logfile .*$/logfile ""/; \ + s/^# syslog-enabled no$/syslog-enabled no/; \ + s/^# unixsocket/unixsocket/; \ + s/redis-server.sock/redis.sock/g; \ + s/^client-output-buffer-limit pubsub [0-9]+mb [0-9]+mb [0-9]+/client-output-buffer-limit pubsub 0 0 0/ \ + ' /etc/redis/redis.conf + +COPY ["supervisord.conf.j2", "/usr/share/sonic/templates/"] +COPY ["docker-database-init.sh", "/usr/local/bin/"] +COPY ["ping_pong_db_insts", "/usr/local/bin/"] +COPY ["database_config.json", "/etc/default/sonic-db/"] + +ENTRYPOINT ["/usr/local/bin/docker-database-init.sh"] diff --git a/dockers/docker-database/base_image_files/redis-cli b/dockers/docker-database/base_image_files/redis-cli new file mode 100755 index 00000000000..6ce1951cd4b --- /dev/null +++ b/dockers/docker-database/base_image_files/redis-cli @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS database redis-cli "$@" diff --git a/dockers/docker-database/database_config.json b/dockers/docker-database/database_config.json new file mode 100644 index 00000000000..b86ae11bba9 --- /dev/null +++ b/dockers/docker-database/database_config.json @@ -0,0 +1,57 @@ +{ + "INSTANCES": { + "redis":{ + "hostname" : "127.0.0.1", + "port" : 6379, + "unix_socket_path" : "/var/run/redis/redis.sock" + } + }, + "DATABASES" : { + "APPL_DB" : { + "id" : 0, + "separator": ":", + "instance" : "redis" + }, + "ASIC_DB" : { + "id" : 1, + "separator": ":", + "instance" : "redis" + }, + "COUNTERS_DB" : { + "id" : 2, + "separator": ":", + "instance" : "redis" + }, + "LOGLEVEL_DB" : { + "id" : 3, + "separator": ":", + "instance" : "redis" + }, + "CONFIG_DB" : { + "id" : 4, + "separator": "|", + "instance" : "redis" + }, + "PFC_WD_DB" : { + "id" : 5, + "separator": ":", + "instance" : "redis" + }, + "FLEX_COUNTER_DB" : { + "id" : 5, + "separator": ":", + "instance" : "redis" + }, + "STATE_DB" : { + "id" : 6, + "separator": "|", + "instance" : "redis" + }, + "SNMP_OVERLAY_DB" : { + "id" : 7, + "separator": "|", + "instance" : "redis" + } + }, + "VERSION" : "1.0" +} diff --git a/dockers/docker-database/docker-database-init.sh b/dockers/docker-database/docker-database-init.sh new file mode 100755 index 00000000000..ebdcc6abb69 --- /dev/null +++ b/dockers/docker-database/docker-database-init.sh @@ -0,0 +1,14 @@ +#!/usr/bin/env bash + +mkdir -p /var/run/redis/sonic-db +if [ -f /etc/sonic/database_config.json ]; then + cp /etc/sonic/database_config.json /var/run/redis/sonic-db +else + cp /etc/default/sonic-db/database_config.json /var/run/redis/sonic-db +fi + +mkdir -p /etc/supervisor/conf.d/ +# generate all redis server supervisord configuration file +sonic-cfggen -j /var/run/redis/sonic-db/database_config.json -t /usr/share/sonic/templates/supervisord.conf.j2 > /etc/supervisor/conf.d/supervisord.conf + +exec /usr/bin/supervisord diff --git a/dockers/docker-database/ping_pong_db_insts b/dockers/docker-database/ping_pong_db_insts new file mode 100755 index 00000000000..484d4da0cfb --- /dev/null +++ b/dockers/docker-database/ping_pong_db_insts @@ -0,0 +1,40 @@ +#!/usr/bin/python +import json +import os +import subprocess +import time +import syslog + +def ping_redis(cmd): + output = '' + while True: + try: + output = subprocess.check_output(cmd, shell=True) + except subprocess.CalledProcessError as e: + syslog.syslog(syslog.LOG_ERR, 'ping redis failed, cmd : {}'.format(cmd)) + + if 'PONG' in output: + break + syslog.syslog(syslog.LOG_ERR, 'ping response : {}'.format(output)) + time.sleep(1) + +database_config_file = "/var/run/redis/sonic-db/database_config.json" + +data = {} +while True: + if os.path.isfile(database_config_file): + with open(database_config_file, "r") as read_file: + data = json.load(read_file) + break + time.sleep(1) + syslog.syslog(syslog.LOG_ERR, 'config file {} does not exist right now'.format(database_config_file)) + +while True: + if 'INSTANCES' in data: + for inst in data["INSTANCES"]: + port = data["INSTANCES"][inst]["port"] + cmd = "redis-cli -p " + str(port) + " ping" + ping_redis(cmd) + break + time.sleep(1) + syslog.syslog(syslog.LOG_ERR, 'config file {} does not have INSTANCES'.format(database_config_file)) diff --git a/dockers/docker-database/supervisord.conf.j2 b/dockers/docker-database/supervisord.conf.j2 new file mode 100644 index 00000000000..110619f762b --- /dev/null +++ b/dockers/docker-database/supervisord.conf.j2 @@ -0,0 +1,24 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:rsyslogd] +command=/bin/bash -c "rm -f /var/run/rsyslogd.pid && /usr/sbin/rsyslogd -n" +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +{% if INSTANCES %} +{% for redis_inst, redis_items in INSTANCES.iteritems() %} +[program: {{ redis_inst }}] +command=/bin/bash -c "{ [[ -s /var/lib/{{ redis_inst }}/dump.rdb ]] || rm -f /var/lib/{{ redis_inst }}/dump.rdb; } && mkdir -p /var/lib/{{ redis_inst }} && exec /usr/bin/redis-server /etc/redis/redis.conf --port {{ redis_items['port'] }} --unixsocket {{ redis_items['unix_socket_path'] }} --pidfile /var/run/redis/{{ redis_inst }}.pid --dir /var/lib/{{ redis_inst }}" +priority=2 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog +{% endfor %} +{% endif %} diff --git a/dockers/docker-dhcp-relay/Dockerfile.j2 b/dockers/docker-dhcp-relay/Dockerfile.j2 new file mode 100644 index 00000000000..d3c09f9ba26 --- /dev/null +++ b/dockers/docker-dhcp-relay/Dockerfile.j2 @@ -0,0 +1,32 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +# Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +# Update apt's cache of available packages +RUN apt-get update + +{% if docker_dhcp_relay_debs.strip() -%} +# Copy built Debian packages +{{ copy_files("debs/", docker_dhcp_relay_debs.split(' '), "/debs/") }} + +# Install built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_dhcp_relay_debs.split(' ')) }} +{%- endif %} + +# Clean up +RUN apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs + +COPY ["docker_init.sh", "start.sh", "/usr/bin/"] +COPY ["docker-dhcp-relay.supervisord.conf.j2", "wait_for_intf.sh.j2", "/usr/share/sonic/templates/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor"] + +ENTRYPOINT ["/usr/bin/docker_init.sh"] diff --git a/dockers/docker-dhcp-relay/critical_processes b/dockers/docker-dhcp-relay/critical_processes new file mode 100644 index 00000000000..ddb183963a6 --- /dev/null +++ b/dockers/docker-dhcp-relay/critical_processes @@ -0,0 +1 @@ +isc-dhcp-relay diff --git a/dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2 b/dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2 new file mode 100644 index 00000000000..e738e8699e6 --- /dev/null +++ b/dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2 @@ -0,0 +1,89 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +{# If our configuration has VLANs... #} +{% if VLAN %} +{# Count how many VLANs require a DHCP relay agent... #} +{% set num_relays = { 'count': 0 } %} +{% for vlan_name in VLAN %} +{% if VLAN[vlan_name]['dhcp_servers'] %} +{% set _dummy = num_relays.update({'count': num_relays.count + 1}) %} +{% endif %} +{% endfor %} +{# If one or more of the VLANs require a DHCP relay agent... #} +{% if num_relays.count > 0 %} +[group:isc-dhcp-relay] +programs= +{%- set add_preceding_comma = { 'flag': False } %} +{% for vlan_name in VLAN %} +{% if VLAN[vlan_name]['dhcp_servers'] %} +{% if add_preceding_comma.flag %},{% endif %} +{% set _dummy = add_preceding_comma.update({'flag': True}) %} +isc-dhcp-relay-{{ vlan_name }} +{%- endif %} +{% endfor %} + + +{# Create a program entry for each DHCP relay agent instance #} +{% set relay_for_ipv4 = { 'flag': False } %} +{% for vlan_name in VLAN %} +{% if VLAN[vlan_name]['dhcp_servers'] %} +{% for dhcp_server in VLAN[vlan_name]['dhcp_servers'] %} +{% if dhcp_server | ipv4 %} +{% set _dummy = relay_for_ipv4.update({'flag': True}) %} +{% endif %} +{% endfor %} +{% if relay_for_ipv4.flag %} +{% set _dummy = relay_for_ipv4.update({'flag': False}) %} +[program:isc-dhcp-relay-{{ vlan_name }}] +{# We treat this VLAN as a downstream interface (-id), as we only want to listen for requests #} +command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /tmp/port-name-alias-map.txt -id {{ vlan_name }} +{#- We treat all other interfaces as upstream interfaces (-iu), as we only want to listen for replies #} +{% for (name, prefix) in VLAN_INTERFACE|pfx_filter %} +{% if prefix | ipv4 and name != vlan_name %} -iu {{ name }}{% endif -%} +{% endfor %} +{% for (name, prefix) in INTERFACE|pfx_filter %} +{% if prefix | ipv4 %} -iu {{ name }}{% endif -%} +{% endfor %} +{% for (name, prefix) in PORTCHANNEL_INTERFACE|pfx_filter %} +{% if prefix | ipv4 %} -iu {{ name }}{% endif -%} +{% endfor %} +{% for dhcp_server in VLAN[vlan_name]['dhcp_servers'] %} +{%- if dhcp_server | ipv4 %} {{ dhcp_server }}{% endif -%} +{% endfor %} + +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +{% endif %} +{% endif %} +{% endfor %} +{% endif %} +{% endif %} diff --git a/dockers/docker-dhcp-relay/docker_init.sh b/dockers/docker-dhcp-relay/docker_init.sh new file mode 100755 index 00000000000..f6d402e6f78 --- /dev/null +++ b/dockers/docker-dhcp-relay/docker_init.sh @@ -0,0 +1,18 @@ +#!/usr/bin/env bash + +# Generate supervisord config file +mkdir -p /etc/supervisor/conf.d/ +sonic-cfggen -d -t /usr/share/sonic/templates/docker-dhcp-relay.supervisord.conf.j2 > /etc/supervisor/conf.d/docker-dhcp-relay.supervisord.conf + +# Generate the script that waits for all interfaces to come up and make it executable +sonic-cfggen -d -t /usr/share/sonic/templates/wait_for_intf.sh.j2 > /usr/bin/wait_for_intf.sh +chmod +x /usr/bin/wait_for_intf.sh + +# Generate port name-alias map for isc-dhcp-relay to parse. Each line contains one +# name-alias pair of the form " " +sonic-cfggen -d --var-json "PORT" | python -c "import sys, json, os; [sys.stdout.write('%s %s\n' % (k, v['alias'] if 'alias' in v else k)) for (k, v) in json.load(sys.stdin).iteritems()]" > /tmp/port-name-alias-map.txt + +# The docker container should start this script as PID 1, so now that supervisord is +# properly configured, we exec supervisord so that it runs as PID 1 for the +# duration of the container's lifetime +exec /usr/bin/supervisord diff --git a/dockers/docker-dhcp-relay/start.sh b/dockers/docker-dhcp-relay/start.sh new file mode 100755 index 00000000000..54e58dd42a0 --- /dev/null +++ b/dockers/docker-dhcp-relay/start.sh @@ -0,0 +1,27 @@ +#!/usr/bin/env bash + +# Remove stale rsyslog PID file if it exists +rm -f /var/run/rsyslogd.pid + +# Start rsyslog +supervisorctl start rsyslogd + +# If our supervisor config has entries in the "isc-dhcp-relay" group... +if [ $(supervisorctl status | grep -c "^isc-dhcp-relay:") -gt 0 ]; then + # Wait for all interfaces to come up and be assigned IPv4 addresses before + # starting the DHCP relay agent(s). If an interface the relay should listen + # on is down, the relay agent will not start. If an interface the relay + # should listen on is up but does not have an IP address assigned when the + # relay agent starts, it will not listen or send on that interface for the + # lifetime of the process. + /usr/bin/wait_for_intf.sh + + # Allow a bit more time for interfaces to settle before starting the + # relay agent processes. + # FIXME: Remove/decrease this once we determine how to prevent future race + # conditions here. + sleep 180 + + # Start all DHCP relay agent(s) + supervisorctl start isc-dhcp-relay:* +fi diff --git a/dockers/docker-dhcp-relay/wait_for_intf.sh.j2 b/dockers/docker-dhcp-relay/wait_for_intf.sh.j2 new file mode 100644 index 00000000000..0488799a4c8 --- /dev/null +++ b/dockers/docker-dhcp-relay/wait_for_intf.sh.j2 @@ -0,0 +1,42 @@ +#!/usr/bin/env bash + +STATE_DB_IDX="6" + +function wait_until_iface_ready +{ + IFACE_NAME=$1 + IFACE_CIDR=$2 + + echo "Waiting until interface ${IFACE_NAME} is ready..." + + # Wait for the interface to come up + # (i.e., interface is present in STATE_DB and state is "ok") + while true; do + RESULT=$(redis-cli -n ${STATE_DB_IDX} HGET "INTERFACE_TABLE|${IFACE_NAME}|${IFACE_CIDR}" "state" 2> /dev/null) + if [ x"$RESULT" == x"ok" ]; then + break + fi + + sleep 1 + done + + echo "Interface ${IFACE_NAME} is ready!" +} + + +# Wait for all interfaces with IPv4 addresses to be up and ready +{% for (name, prefix) in INTERFACE|pfx_filter %} +{% if prefix | ipv4 %} +wait_until_iface_ready {{ name }} {{ prefix }} +{% endif %} +{% endfor %} +{% for (name, prefix) in VLAN_INTERFACE|pfx_filter %} +{% if prefix | ipv4 %} +wait_until_iface_ready {{ name }} {{ prefix }} +{% endif %} +{% endfor %} +{% for (name, prefix) in PORTCHANNEL_INTERFACE|pfx_filter %} +{% if prefix | ipv4 %} +wait_until_iface_ready {{ name }} {{ prefix }} +{% endif %} +{% endfor %} diff --git a/dockers/docker-fpm-frr/.dockerignore b/dockers/docker-fpm-frr/.dockerignore new file mode 100644 index 00000000000..bd5eecc5d79 --- /dev/null +++ b/dockers/docker-fpm-frr/.dockerignore @@ -0,0 +1 @@ +Dockerfile.j2 diff --git a/dockers/docker-fpm-frr/Dockerfile.j2 b/dockers/docker-fpm-frr/Dockerfile.j2 new file mode 100644 index 00000000000..418676c1832 --- /dev/null +++ b/dockers/docker-fpm-frr/Dockerfile.j2 @@ -0,0 +1,57 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-config-engine-stretch + +ARG docker_container_name +ARG frr_user_uid +ARG frr_user_gid + +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +# Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +# Update apt's cache of available packages +# Install required packages +RUN apt-get update && \ + apt-get install -y \ + libdbus-1-3 \ + libdaemon0 \ + libjansson4 \ + libc-ares2 \ + iproute2 \ + libpython2.7 \ + libjson-c3 \ + logrotate \ + libunwind8 + +RUN groupadd -g ${frr_user_gid} frr +RUN useradd -u ${frr_user_uid} -g ${frr_user_gid} -M -s /bin/false frr + +{% if docker_fpm_frr_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_fpm_frr_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_fpm_frr_debs.split(' ')) }} +{%- endif %} + +RUN chown -R ${frr_user_uid}:${frr_user_gid} /etc/frr/ + +# Clean up +RUN apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs ~/.cache + +COPY ["bgpcfgd", "start.sh", "/usr/bin/"] +COPY ["*.j2", "/usr/share/sonic/templates/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["snmp.conf", "/etc/snmp/frr.conf"] +COPY ["TSA", "/usr/bin/TSA"] +COPY ["TSB", "/usr/bin/TSB"] +COPY ["TSC", "/usr/bin/TSC"] +RUN chmod a+x /usr/bin/TSA && \ + chmod a+x /usr/bin/TSB && \ + chmod a+x /usr/bin/TSC + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/dockers/docker-fpm-frr/TSA b/dockers/docker-fpm-frr/TSA new file mode 100755 index 00000000000..1d74757b2d5 --- /dev/null +++ b/dockers/docker-fpm-frr/TSA @@ -0,0 +1,23 @@ +#!/bin/bash + +c=0 +config=$(vtysh -c "show run") +echo "$config" | grep -q "route-map TO_BGP_PEER_V4 permit 2" +c=$((c+$?)) +echo "$config" | grep -q "route-map TO_BGP_PEER_V4 deny 3" +c=$((c+$?)) +echo "$config" | grep -q "route-map TO_BGP_PEER_V6 permit 2" +c=$((c+$?)) +echo "$config" | grep -q "route-map TO_BGP_PEER_V6 deny 3" +c=$((c+$?)) + +if [[ $c -eq 4 ]]; +then + TSA_FILE=$(mktemp) + sonic-cfggen -d -y /etc/sonic/constants.yml -t /usr/share/sonic/templates/bgpd.tsa.isolate.conf.j2 > "$TSA_FILE" + vtysh -f "$TSA_FILE" + rm -f "$TSA_FILE" + echo "System Mode: Normal -> Maintenance" +else + echo "System is already in Maintenance mode" +fi diff --git a/dockers/docker-fpm-frr/TSB b/dockers/docker-fpm-frr/TSB new file mode 100755 index 00000000000..83ead86952c --- /dev/null +++ b/dockers/docker-fpm-frr/TSB @@ -0,0 +1,23 @@ +#!/bin/bash + +c=0 +config=$(vtysh -c "show run") +echo "$config" | grep -q "route-map TO_BGP_PEER_V4 permit 2" +c=$((c+$?)) +echo "$config" | grep -q "route-map TO_BGP_PEER_V4 deny 3" +c=$((c+$?)) +echo "$config" | grep -q "route-map TO_BGP_PEER_V6 permit 2" +c=$((c+$?)) +echo "$config" | grep -q "route-map TO_BGP_PEER_V6 deny 3" +c=$((c+$?)) + +if [[ $c -eq 0 ]]; +then + TSB_FILE=$(mktemp) + sonic-cfggen -d -y /etc/sonic/constants.yml -t /usr/share/sonic/templates/bgpd.tsa.unisolate.conf.j2 > "$TSB_FILE" + vtysh -f "$TSB_FILE" + rm -f "$TSB_FILE" + echo "System Mode: Maintenance -> Normal" +else + echo "System is already in Normal mode" +fi diff --git a/dockers/docker-fpm-frr/TSC b/dockers/docker-fpm-frr/TSC new file mode 100755 index 00000000000..c79f4bb2a41 --- /dev/null +++ b/dockers/docker-fpm-frr/TSC @@ -0,0 +1,25 @@ +#!/bin/bash + +echo "Traffic Shift Check:" +c=0 +config=$(vtysh -c "show run") +echo "$config" | grep -q "route-map TO_BGP_PEER_V4 permit 2" +c=$((c+$?)) +echo "$config" | grep -q "route-map TO_BGP_PEER_V4 deny 3" +c=$((c+$?)) +echo "$config" | grep -q "route-map TO_BGP_PEER_V6 permit 2" +c=$((c+$?)) +echo "$config" | grep -q "route-map TO_BGP_PEER_V6 deny 3" +c=$((c+$?)) + +if [[ $c -eq 4 ]]; +then + echo "System Mode: Normal" +elif [[ $c -eq 0 ]]; +then + echo "System Mode: Maintenance" +else + echo "System Mode: Not consistent" +fi + +echo diff --git a/dockers/docker-fpm-frr/base_image_files/TSA b/dockers/docker-fpm-frr/base_image_files/TSA new file mode 100755 index 00000000000..95c7957f7dc --- /dev/null +++ b/dockers/docker-fpm-frr/base_image_files/TSA @@ -0,0 +1,3 @@ +#!/bin/bash + +docker exec -i bgp /usr/bin/TSA diff --git a/dockers/docker-fpm-frr/base_image_files/TSB b/dockers/docker-fpm-frr/base_image_files/TSB new file mode 100755 index 00000000000..f292d2031db --- /dev/null +++ b/dockers/docker-fpm-frr/base_image_files/TSB @@ -0,0 +1,3 @@ +#!/bin/bash + +docker exec -i bgp /usr/bin/TSB diff --git a/dockers/docker-fpm-frr/base_image_files/TSC b/dockers/docker-fpm-frr/base_image_files/TSC new file mode 100755 index 00000000000..f0ccebb73d6 --- /dev/null +++ b/dockers/docker-fpm-frr/base_image_files/TSC @@ -0,0 +1,5 @@ +#!/bin/bash + +docker exec -i bgp /usr/bin/TSC + +/usr/bin/portstat -p 5 diff --git a/dockers/docker-fpm-frr/base_image_files/vtysh b/dockers/docker-fpm-frr/base_image_files/vtysh new file mode 100755 index 00000000000..24016bd96b2 --- /dev/null +++ b/dockers/docker-fpm-frr/base_image_files/vtysh @@ -0,0 +1,16 @@ +#!/bin/bash + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + # Prepare a function to send HUP signal to vtysh in the container + # we mark the new instance of vtysh with the current tty as a tag + TTY=$(tty) + function cleanup + { + docker exec -i bgp pkill -HUP -f "vtysh $TTY" + } + trap cleanup HUP + docker exec -ti bgp vtysh "$TTY" "$@" +else + docker exec -i bgp vtysh "$@" +fi diff --git a/dockers/docker-fpm-frr/bgpcfgd b/dockers/docker-fpm-frr/bgpcfgd new file mode 100755 index 00000000000..120e07fcdbe --- /dev/null +++ b/dockers/docker-fpm-frr/bgpcfgd @@ -0,0 +1,423 @@ +#!/usr/bin/env python + +import sys +import subprocess +import datetime +import time +import syslog +import signal +import traceback +import os +import tempfile +import json +from collections import defaultdict +from pprint import pprint +from pprint import pformat + +import jinja2 +import netaddr +from swsscommon import swsscommon + + +g_run = True +g_debug = False + + +def run_command(command, shell=False): + str_cmd = " ".join(command) + if g_debug: + syslog.syslog(syslog.LOG_DEBUG, "execute command {}.".format(str_cmd)) + p = subprocess.Popen(command, shell=shell, stdout=subprocess.PIPE, stderr=subprocess.PIPE) + stdout, stderr = p.communicate() + if p.returncode != 0: + syslog.syslog(syslog.LOG_ERR, 'command execution returned {}. Command: "{}", stdout: "{}", stderr: "{}"'.format(p.returncode, str_cmd, stdout, stderr)) + + return p.returncode, stdout, stderr + + +class TemplateFabric(object): + def __init__(self): + j2_template_paths = ['/usr/share/sonic/templates'] + j2_loader = jinja2.FileSystemLoader(j2_template_paths) + j2_env = jinja2.Environment(loader=j2_loader, trim_blocks=True) + j2_env.filters['ipv4'] = self.is_ipv4 + j2_env.filters['ipv6'] = self.is_ipv6 + self.env = j2_env + + def from_file(self, filename): + return self.env.get_template(filename) + + def from_string(self, tmpl): + return self.env.from_string(tmpl) + + @staticmethod + def is_ipv4(value): + if not value: + return False + if isinstance(value, netaddr.IPNetwork): + addr = value + else: + try: + addr = netaddr.IPNetwork(str(value)) + except: + return False + return addr.version == 4 + + @staticmethod + def is_ipv6(value): + if not value: + return False + if isinstance(value, netaddr.IPNetwork): + addr = value + else: + try: + addr = netaddr.IPNetwork(str(value)) + except: + return False + return addr.version == 6 + + +class Daemon(object): + SELECT_TIMEOUT = 1000 + + def __init__(self): + self.db_connectors = {} + self.selector = swsscommon.Select() + self.callbacks = defaultdict(lambda : defaultdict(list)) # db -> table -> [] + self.subscribers = set() + + def add_manager(self, db, table_name, callback): + if db not in self.db_connectors: + self.db_connectors[db] = swsscommon.DBConnector(db, swsscommon.DBConnector.DEFAULT_UNIXSOCKET, 0) + + if table_name not in self.callbacks[db]: + conn = self.db_connectors[db] + subscriber = swsscommon.SubscriberStateTable(conn, table_name) + self.subscribers.add(subscriber) + self.selector.addSelectable(subscriber) + self.callbacks[db][table_name].append(callback) + + def run(self): + while g_run: + state, _ = self.selector.select(Daemon.SELECT_TIMEOUT) + if state == self.selector.TIMEOUT: + continue + elif state == self.selector.ERROR: + raise Exception("Received error from select") + + for subscriber in self.subscribers: + key, op, fvs = subscriber.pop() + if not key: + continue + if g_debug: + syslog.syslog(syslog.LOG_DEBUG, "Received message : {}".format((key, op, fvs))) + for callback in self.callbacks[subscriber.getDbConnector().getDbId()][subscriber.getTableName()]: + callback(key, op, dict(fvs)) + + +class Directory(object): + def __init__(self): + self.data = defaultdict(dict) + self.notify = defaultdict(lambda: defaultdict(list)) + + def path_exist(self, slot, path): + if slot not in self.data: + return False + elif path == '': + return True + d = self.data[slot] + for p in path.split("/"): + if p not in d: + return False + d = d[p] + return True + + def get_path(self, slot, path): + if slot not in self.data: + return None + elif path == '': + return self.data[slot] + d = self.data[slot] + for p in path.split("/"): + if p not in d: + return None + d = d[p] + return d + + def put(self, slot, key, value): + self.data[slot][key] = value + if slot in self.notify: + for path in self.notify[slot].keys(): + if self.path_exist(slot, path): + for handler in self.notify[slot][path]: + handler() + + def get(self, slot, key): + return self.data[slot][key] + + def remove(self, slot, key): + if slot in self.data: + if key in self.data[slot]: + del self.data[slot][key] + else: + syslog.syslog(syslog.LOG_ERR, "Directory: Can't remove key '%s' from slot '%s'. The key doesn't exist" % (key, slot)) + else: + syslog.syslog(syslog.LOG_ERR, "Directory: Can't remove key '%s' from slot '%s'. The slot doesn't exist" % (key, slot)) + + def remove_slot(self, slot, key): + if slot in self.data: + del self.data[slot] + else: + syslog.syslog(syslog.LOG_ERR, "Directory: Can't remove slot '%s'. The slot doesn't exist" % slot) + + def get_slot(self, slot): + return self.data[slot] + + def available_slot(self, slot): + return slot in self.data + + def available_deps(self, deps): + res = True + for slot, path in deps: + res = res and self.path_exist(slot, path) + return res + + def subscribe(self, deps, handler): + for slot, path in deps: + self.notify[slot][path].append(handler) + + +class Manager(object): + def __init__(self, daemon, directory, deps, database, table_name): + self.directory = directory + self.deps = deps + self.set_queue = [] + daemon.add_manager(database, table_name, self.handler) + directory.subscribe(deps, self.on_deps_change) + + def handler(self, key, op, data): + if op == swsscommon.SET_COMMAND: + if self.directory.available_deps(self.deps): + res = self.set_handler(key, data) + if not res: + self.set_queue.append((key, data)) + else: + self.set_queue.append((key, data)) + elif op == swsscommon.DEL_COMMAND: + self.del_handler(key) + else: + syslog.syslog(syslog.LOG_ERR, 'Invalid operation "%s" for key "%s"' % (op, key)) + + def on_deps_change(self): + new_queue = [] + for key, data in self.set_queue: + res = self.set_handler(key, data) + if not res: + new_queue.append((key, data)) + self.set_queue = new_queue + + def set_handler(self, key, data): + syslog.syslog(syslog.LOG_ERR, "%s wasn't implemented for %s" % (self.__name__, self.__class__)) + + def del_handler(self, key): + syslog.syslog(syslog.LOG_ERR, "%s wasn't implemented for %s" % (self.__name__, self.__class__)) + + +class BGPDeviceMetaMgr(Manager): + def __init__(self, daemon, directory): + super(BGPDeviceMetaMgr, self).__init__( + daemon, + directory, + [], + swsscommon.CONFIG_DB, + swsscommon.CFG_DEVICE_METADATA_TABLE_NAME + ) + + def set_handler(self, key, data): + if key != "localhost" or "bgp_asn" not in data: + return + if self.directory.path_exist("meta", "localhost/bgp_asn"): + bgp_asn = self.directory.get_path("meta", "localhost/bgp_asn") + if bgp_asn == data["bgp_asn"]: + return + self.directory.put("meta", key, data) + + return True + + def del_handler(self, key): + self.directory.remove("meta", key) + + +class BGPNeighborMetaMgr(Manager): + def __init__(self, daemon, directory): + super(BGPNeighborMetaMgr, self).__init__( + daemon, + directory, + [], + swsscommon.CONFIG_DB, + swsscommon.CFG_DEVICE_NEIGHBOR_METADATA_TABLE_NAME + ) + + def set_handler(self, key, data): + self.directory.put("neigmeta", key, data) + + return True + + def del_handler(self, key): + self.directory.remove("neigmeta", key) + + +class BGPPeerMgr(Manager): + def __init__(self, daemon, directory): + super(BGPPeerMgr, self).__init__( + daemon, + directory, + [ + ("meta", "localhost/bgp_asn"), + ("neigmeta", ""), + ], + swsscommon.CONFIG_DB, + swsscommon.CFG_BGP_NEIGHBOR_TABLE_NAME + ) + self.peers = self.load_peers() + fabric = TemplateFabric() + self.templates = { + "add": fabric.from_file('bgpd.peer.conf.j2'), + "delete": fabric.from_string('no neighbor {{ neighbor_addr }}'), + "shutdown": fabric.from_string('neighbor {{ neighbor_addr }} shutdown'), + "no shutdown": fabric.from_string('no neighbor {{ neighbor_addr }} shutdown'), + } + + def set_handler(self, key, data): + if key not in self.peers: + cmd = None + neigmeta = self.directory.get_slot("neigmeta") + if 'name' in data and data["name"] not in neigmeta: + return False + try: + cmd = self.templates["add"].render( + DEVICE_METADATA=self.directory.get_slot("meta"), + DEVICE_NEIGHBOR_METADATA=neigmeta, + neighbor_addr=key, + bgp_session=data + ) + except: + syslog.syslog(syslog.LOG_ERR, 'Peer {}. Error in rendering the template for "SET" command {}'.format(key, data)) + return True + if cmd is not None: + rc = self.apply_op(cmd) + if rc: + self.peers.add(key) + syslog.syslog(syslog.LOG_INFO, 'Peer {} added with attributes {}'.format(key, data)) + else: + syslog.syslog(syslog.LOG_ERR, "Peer {} wasn't added.".format(key)) + else: + # when the peer is already configured we support "shutdown/no shutdown" + # commands for the peers only + if "admin_status" in data: + if data['admin_status'] == 'up': + rc = self.apply_op(self.templates["no shutdown"].render(neighbor_addr=key)) + if rc: + syslog.syslog(syslog.LOG_INFO, 'Peer {} admin state is set to "up"'.format(key)) + else: + syslog.syslog(syslog.LOG_ERR, "Peer {} admin state wasn't set to 'up'.".format(key)) + elif data['admin_status'] == 'down': + rc = self.apply_op(self.templates["shutdown"].render(neighbor_addr=key)) + if rc: + syslog.syslog(syslog.LOG_INFO, 'Peer {} admin state is set to "down"'.format(key)) + else: + syslog.syslog(syslog.LOG_ERR, "Peer {} admin state wasn't set to 'down'.".format(key)) + else: + syslog.syslog(syslog.LOG_ERR, "Peer {}: Can't update the peer. has wrong attribute value attr['admin_status'] = '{}'".format(key, data['admin_status'])) + else: + syslog.syslog(syslog.LOG_ERR, "Peer {}: Can't update the peer. No 'admin_status' attribute in the request".format(key)) + return True + + def del_handler(self, key): + if key not in self.peers: + syslog.syslog(syslog.LOG_WARNING, 'Peer {} has not been found'.format(key)) + return + cmd = self.templates["delete"].render(neighbor_addr=key) + rc = self.apply_op(cmd) + if rc: + syslog.syslog(syslog.LOG_INFO, 'Peer {} has been removed'.format(key)) + self.peers.remove(key) + else: + syslog.syslog(syslog.LOG_ERR, "Peer {} hasn't been removed".format(key)) + + def apply_op(self, cmd): + bgp_asn = self.directory.get_slot("meta")["localhost"]["bgp_asn"] + fd, tmp_filename = tempfile.mkstemp(dir='/tmp') + os.close(fd) + with open(tmp_filename, 'w') as fp: + fp.write('router bgp %s\n' % bgp_asn) + fp.write("%s\n" % cmd) + + command = ["vtysh", "-f", tmp_filename] + rc, _, _ = run_command(command) + os.remove(tmp_filename) + return rc == 0 + + @staticmethod + def load_peers(): + peers = set() + command = ["vtysh", "-c", "show bgp neighbors json"] + rc, out, err = run_command(command) + if rc == 0: + js_bgp = json.loads(out) + peers = set(js_bgp.keys()) + return peers + + +def wait_for_bgpd(): + # wait for 20 seconds + stop_time = datetime.datetime.now() + datetime.timedelta(seconds=20) + syslog.syslog(syslog.LOG_INFO, "Start waiting for bgpd: %s" % str(datetime.datetime.now())) + while datetime.datetime.now() < stop_time: + rc, out, err = run_command(["vtysh", "-c", "show daemons"]) + if rc == 0 and "bgpd" in out: + syslog.syslog(syslog.LOG_INFO, "bgpd connected to vtysh: %s" % str(datetime.datetime.now())) + return + time.sleep(0.1) # sleep 100 ms + raise RuntimeError("bgpd hasn't been started in 20 seconds") + + +def main(): + managers = [ + BGPDeviceMetaMgr, + BGPNeighborMetaMgr, + BGPPeerMgr, + ] + wait_for_bgpd() + daemon = Daemon() + directory = Directory() + manager_instanses = [ manager(daemon, directory) for manager in managers ] + daemon.run() + + +def signal_handler(signum, frame): + global g_run + g_run = False + + +if __name__ == '__main__': + rc = 0 + try: + syslog.openlog('bgpcfgd') + signal.signal(signal.SIGTERM, signal_handler) + signal.signal(signal.SIGINT, signal_handler) + main() + except KeyboardInterrupt: + syslog.syslog(syslog.LOG_NOTICE, "Keyboard interrupt") + except RuntimeError as e: + syslog.syslog(syslog.LOG_CRIT, "%s" % str(e)) + rc = -2 + except Exception as e: + syslog.syslog(syslog.LOG_CRIT, "Got an exception %s: Traceback: %s" % (str(e), traceback.format_exc())) + rc = -1 + finally: + syslog.closelog() + try: + sys.exit(rc) + except SystemExit: + os._exit(rc) diff --git a/dockers/docker-fpm-frr/bgpd.conf.default.j2 b/dockers/docker-fpm-frr/bgpd.conf.default.j2 new file mode 100644 index 00000000000..e12782b035a --- /dev/null +++ b/dockers/docker-fpm-frr/bgpd.conf.default.j2 @@ -0,0 +1,160 @@ +! +{% if DEVICE_METADATA['localhost'].has_key('bgp_asn') %} +{% block bgp_init %} +! +! bgp multiple-instance +! +route-map FROM_BGP_SPEAKER_V4 permit 10 +! +route-map TO_BGP_SPEAKER_V4 deny 10 +! +{# generate loopback prefix-lists #} +{% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} +{% if prefix | ipv4 and name == 'Loopback0' %} +ip prefix-list PL_LoopbackV4 permit {{ prefix | ip }}/32 +{% elif prefix | ipv6 and name == 'Loopback0' %} +ipv6 prefix-list PL_LoopbackV6 permit {{ prefix | replace('/128', '/64') | ip_network }}/64 +{% endif %} +{% endfor %} +! +{# generate default peer route-maps #} +! +route-map TO_BGP_PEER_V4 permit 100 +! +route-map TO_BGP_PEER_V6 permit 100 +! +{% if BGP_MONITORS is defined and BGP_MONITORS|length > 0 %} +route-map FROM_BGPMON deny 10 +! +route-map TO_BGPMON permit 10 +! +{% endif %} +! +route-map ISOLATE permit 10 + set as-path prepend {{ DEVICE_METADATA['localhost']['bgp_asn'] }} +! +route-map set-next-hop-global-v6 permit 10 + set ipv6 next-hop prefer-global +! +router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }} + bgp log-neighbor-changes + bgp bestpath as-path multipath-relax + no bgp default ipv4-unicast + bgp graceful-restart restart-time 240 + bgp graceful-restart +{% if DEVICE_METADATA['localhost']['type'] == 'ToRRouter' %} + bgp graceful-restart preserve-fw-state +{% endif %} +{% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} +{% if prefix | ipv4 and name == 'Loopback0' %} + bgp router-id {{ prefix | ip }} +{% endif %} +{% endfor %} +{# advertise loopback #} +{% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} +{% if prefix | ipv4 and name == 'Loopback0' %} + network {{ prefix | ip }}/32 +{% elif prefix | ipv6 and name == 'Loopback0' %} + address-family ipv6 + network {{ prefix | ip }}/64 + exit-address-family +{% endif %} +{% endfor %} +{% endblock bgp_init %} +{% endif %} +{% block vlan_advertisement %} +{% for (name, prefix) in VLAN_INTERFACE|pfx_filter %} +{% if prefix | ipv4 %} + network {{ prefix }} +{% elif prefix | ipv6 %} + address-family ipv6 + network {{ prefix }} + exit-address-family +{% endif %} +{% endfor %} +{% endblock vlan_advertisement %} +{% block maximum_paths %} + address-family ipv4 + maximum-paths 64 + exit-address-family + address-family ipv6 + maximum-paths 64 + exit-address-family +{% endblock maximum_paths %} +{% block peers_peer_group %} + neighbor PEER_V4 peer-group + neighbor PEER_V6 peer-group + address-family ipv4 +{% if DEVICE_METADATA['localhost']['type'] == 'ToRRouter' %} + neighbor PEER_V4 allowas-in 1 +{% endif %} + neighbor PEER_V4 soft-reconfiguration inbound + neighbor PEER_V4 route-map TO_BGP_PEER_V4 out + exit-address-family + address-family ipv6 +{% if DEVICE_METADATA['localhost']['type'] == 'ToRRouter' %} + neighbor PEER_V6 allowas-in 1 +{% endif %} + neighbor PEER_V6 soft-reconfiguration inbound + neighbor PEER_V6 route-map TO_BGP_PEER_V6 out + exit-address-family +{% endblock peers_peer_group %} +{% block bgp_peers_with_range %} +{% if BGP_PEER_RANGE %} +{% for bgp_peer in BGP_PEER_RANGE.values() %} + neighbor {{ bgp_peer['name'] }} peer-group + neighbor {{ bgp_peer['name'] }} passive +{% if bgp_peer['peer_asn'] is defined %} + neighbor {{ bgp_peer['name'] }} remote-as {{ bgp_peer['peer_asn'] }} +{% else %} + neighbor {{ bgp_peer['name'] }} remote-as {{ constants.deployment_id_asn_map[DEVICE_METADATA['localhost']['deployment_id']] }} +{% endif %} + neighbor {{ bgp_peer['name'] }} ebgp-multihop 255 + neighbor {{ bgp_peer['name'] }} soft-reconfiguration inbound +{% if bgp_peer['src_address'] is defined %} + neighbor {{ bgp_peer['name'] }} update-source {{ bgp_peer['src_address'] | ip }} +{% else %} +{% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} +{% if name == 'Loopback1' %} + neighbor {{ bgp_peer['name'] }} update-source {{ prefix | ip }} +{% endif %} +{% endfor %} +{% endif %} + neighbor {{ bgp_peer['name'] }} route-map FROM_BGP_SPEAKER_V4 in + neighbor {{ bgp_peer['name'] }} route-map TO_BGP_SPEAKER_V4 out +{% for ip_range in bgp_peer['ip_range'] %} + bgp listen range {{ip_range}} peer-group {{ bgp_peer['name'] }} +{% endfor %} + address-family ipv4 + neighbor {{ bgp_peer['name'] }} activate + exit-address-family + address-family ipv6 + neighbor {{ bgp_peer['name'] }} activate + exit-address-family +{% endfor %} +{% endif %} +{% endblock bgp_peers_with_range %} +{% block bgp_monitors %} +{% if BGP_MONITORS is defined and BGP_MONITORS|length > 0 %} + neighbor BGPMON peer-group +{% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} +{% if prefix | ipv4 and name == 'Loopback0' %} + neighbor BGPMON update-source {{ prefix | ip }} +{% endif %} +{% endfor %} + neighbor BGPMON route-map FROM_BGPMON in + neighbor BGPMON route-map TO_BGPMON out + neighbor BGPMON send-community + neighbor BGPMON maximum-prefix 1 +{% for neighbor_addr, bgp_session in BGP_MONITORS.items() %} + neighbor {{ neighbor_addr }} remote-as {{ DEVICE_METADATA['localhost']['bgp_asn'] }} + neighbor {{ neighbor_addr }} peer-group BGPMON + neighbor {{ neighbor_addr }} description {{ bgp_session['name'] }} + neighbor {{ neighbor_addr }} activate + address-family ipv6 + neighbor {{ neighbor_addr }} activate + exit-address-family +{% endfor %} +{% endif %} +{% endblock bgp_monitors %} +! diff --git a/dockers/docker-fpm-frr/bgpd.conf.j2 b/dockers/docker-fpm-frr/bgpd.conf.j2 new file mode 100644 index 00000000000..b4b2cd59c9b --- /dev/null +++ b/dockers/docker-fpm-frr/bgpd.conf.j2 @@ -0,0 +1,18 @@ +! +{% block banner %} +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/bgpd.conf.j2 with config DB data +! file: bgpd.conf +! +{% endblock banner %} +! +{% include "daemons.common.conf.j2" %} +! +agentx +! +{% if DEVICE_METADATA['localhost']['type'] == "SpineChassisFrontendRouter" %} +{% include "bgpd.conf.spine_chassis_frontend_router.j2" %} +{% endif %} +! +{% include "bgpd.conf.default.j2" %} +! diff --git a/dockers/docker-fpm-frr/bgpd.conf.spine_chassis_frontend_router.j2 b/dockers/docker-fpm-frr/bgpd.conf.spine_chassis_frontend_router.j2 new file mode 100644 index 00000000000..afb621b0bf6 --- /dev/null +++ b/dockers/docker-fpm-frr/bgpd.conf.spine_chassis_frontend_router.j2 @@ -0,0 +1,63 @@ +! +{# VNET BGP Instance #} +! Vnet BGP instance +{% set interfaces_in_vnets = [] %} +{% block vnet_bgp_instance %} +{% for vnet_name, vnet_metadata in VNET.iteritems() %} +router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }} vrf {{ vnet_name }} + no bgp default ipv4-unicast + bgp log-neighbor-changes + bgp bestpath as-path multipath-relax + no bgp default ipv4-unicast + bgp graceful-restart restart-time 240 + bgp graceful-restart +{# Router ID #} +{% for (name, prefix) in LOOPBACK_INTERFACE | pfx_filter %} +{% if prefix | ipv4 and name == 'Loopback0' %} + bgp router-id {{ prefix | ip }} +{% endif %} +{% endfor %} +{# Got interfaces that belong this vnet #} +{% set interfaces_in_vnet = [] %} +{% for (key, metadata) in INTERFACE.iteritems() %} +{% if metadata.has_key("vnet_name") and metadata["vnet_name"] == vnet_name %} +{% for (name_prefix_pair, metadata) in INTERFACE.iteritems() %} +{% if key == name_prefix_pair[0] %} +{% if interfaces_in_vnet.append( name_prefix_pair[1] | ip ) %} +{% endif %} +{% if interfaces_in_vnets.append( name_prefix_pair[1] | ip ) %} +{% endif %} +{% endif %} +{% endfor %} +{% endif %} +{% endfor %} +{# Each bgp neighbors #} +{% for neighbor_addr, bgp_session in BGP_NEIGHBOR.iteritems() %} +{% if bgp_session.has_key("local_addr") and bgp_session["local_addr"] in interfaces_in_vnet %} +{% if bgp_session['asn'] | int != 0 %} + neighbor {{ neighbor_addr }} remote-as {{ bgp_session['asn'] }} + neighbor {{ neighbor_addr }} description {{ bgp_session['name'] }} +{# set the bgp neighbor timers if they have not default values #} +{% if (bgp_session['keepalive'] is defined and bgp_session['keepalive'] | int != 60) + or (bgp_session['holdtime'] is defined and bgp_session['holdtime'] | int != 180) %} + neighbor {{ neighbor_addr }} timers {{ bgp_session['keepalive'] }} {{ bgp_session['holdtime'] }} +{% endif %} +{% if bgp_session.has_key('admin_status') and bgp_session['admin_status'] == 'down' or not bgp_session.has_key('admin_status') and DEVICE_METADATA['localhost'].has_key('default_bgp_status') and DEVICE_METADATA['localhost']['default_bgp_status'] == 'down' %} + neighbor {{ neighbor_addr }} shutdown +{% endif %} +{% if neighbor_addr | ipv4 %} + address-family ipv4 unicast + neighbor {{ neighbor_addr }} activate + neighbor {{ neighbor_addr }} soft-reconfiguration inbound + maximum-paths 64 + exit-address-family +{% endif %} + address-family l2vpn evpn + advertise ipv4 unicast + exit-address-family +{% endif %} +{% endif %} +{% endfor %} +{% endfor %} +{% endblock vnet_bgp_instance %} +! diff --git a/dockers/docker-fpm-frr/bgpd.peer.conf.j2 b/dockers/docker-fpm-frr/bgpd.peer.conf.j2 new file mode 100644 index 00000000000..c3dc50449d3 --- /dev/null +++ b/dockers/docker-fpm-frr/bgpd.peer.conf.j2 @@ -0,0 +1,38 @@ +{% block bgp_peer %} + neighbor {{ neighbor_addr }} remote-as {{ bgp_session['asn'] }} + neighbor {{ neighbor_addr }} description {{ bgp_session['name'] }} +{# set the bgp neighbor timers if they have not default values #} +{% if (bgp_session['keepalive'] is defined and bgp_session['keepalive'] | int != 60) + or (bgp_session['holdtime'] is defined and bgp_session['holdtime'] | int != 180) %} + neighbor {{ neighbor_addr }} timers {{ bgp_session['keepalive'] }} {{ bgp_session['holdtime'] }} +{% endif %} +{% if bgp_session.has_key('admin_status') and bgp_session['admin_status'] == 'down' or not bgp_session.has_key('admin_status') and DEVICE_METADATA['localhost'].has_key('default_bgp_status') and DEVICE_METADATA['localhost']['default_bgp_status'] == 'down' %} + neighbor {{ neighbor_addr }} shutdown +{% endif %} +{% if neighbor_addr | ipv4 %} + address-family ipv4 + neighbor {{ neighbor_addr }} peer-group PEER_V4 +{% elif neighbor_addr | ipv6 %} + address-family ipv6 +{% if bgp_session['asn'] != DEVICE_METADATA['localhost']['bgp_asn'] %} + neighbor {{ neighbor_addr }} route-map set-next-hop-global-v6 in +{% endif %} + neighbor {{ neighbor_addr }} peer-group PEER_V6 +{% endif %} +{% if bgp_session['rrclient'] | int != 0 %} + neighbor {{ neighbor_addr }} route-reflector-client +{% endif %} +{% if bgp_session['nhopself'] | int != 0 %} + neighbor {{ neighbor_addr }} next-hop-self +{% endif %} +{% if bgp_session["asn"] == DEVICE_METADATA['localhost']['bgp_asn'] + and DEVICE_METADATA['localhost']['type'] == "SpineChassisFrontendRouter" + and (not bgp_session.has_key("local_addr") or bgp_session["local_addr"] not in interfaces_in_vnets) %} + address-family l2vpn evpn + neighbor {{ neighbor_addr }} activate + advertise-all-vni + exit-address-family +{% endif %} + neighbor {{ neighbor_addr }} activate + exit-address-family +{% endblock bgp_peer %} diff --git a/dockers/docker-fpm-frr/bgpd.tsa.isolate.conf.j2 b/dockers/docker-fpm-frr/bgpd.tsa.isolate.conf.j2 new file mode 100644 index 00000000000..9cd61b89907 --- /dev/null +++ b/dockers/docker-fpm-frr/bgpd.tsa.isolate.conf.j2 @@ -0,0 +1,10 @@ +route-map TO_BGP_PEER_V4 permit 2 + match ip address prefix-list PL_LoopbackV4 + set community {{ constants.traffic_shift_community }} +route-map TO_BGP_PEER_V4 deny 3 +! +route-map TO_BGP_PEER_V6 permit 2 + match ipv6 address prefix-list PL_LoopbackV6 + set community {{ constants.traffic_shift_community }} +route-map TO_BGP_PEER_V6 deny 3 +! diff --git a/dockers/docker-fpm-frr/bgpd.tsa.unisolate.conf.j2 b/dockers/docker-fpm-frr/bgpd.tsa.unisolate.conf.j2 new file mode 100644 index 00000000000..25d7c49125e --- /dev/null +++ b/dockers/docker-fpm-frr/bgpd.tsa.unisolate.conf.j2 @@ -0,0 +1,6 @@ +no route-map TO_BGP_PEER_V4 permit 2 +no route-map TO_BGP_PEER_V4 deny 3 +! +no route-map TO_BGP_PEER_V6 permit 2 +no route-map TO_BGP_PEER_V6 deny 3 +! diff --git a/dockers/docker-fpm-frr/daemons.common.conf.j2 b/dockers/docker-fpm-frr/daemons.common.conf.j2 new file mode 100644 index 00000000000..23eb5184f5e --- /dev/null +++ b/dockers/docker-fpm-frr/daemons.common.conf.j2 @@ -0,0 +1,12 @@ +! +{% block sys_init %} +hostname {{ DEVICE_METADATA['localhost']['hostname'] }} +password zebra +enable password zebra +{% endblock sys_init %} +! +{% block logging %} +log syslog informational +log facility local4 +{% endblock logging %} +! diff --git a/dockers/docker-fpm-frr/frr.conf.j2 b/dockers/docker-fpm-frr/frr.conf.j2 new file mode 100644 index 00000000000..afa40ad8ba7 --- /dev/null +++ b/dockers/docker-fpm-frr/frr.conf.j2 @@ -0,0 +1,18 @@ +! +{% block banner %} +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/frr/frr.conf.j2 with config DB data +! file: frr.conf +! +{% endblock banner %} +! +{% include "daemons.common.conf.j2" %} +! +agentx +! +{% include "zebra.interfaces.conf.j2" %} +! +{% include "staticd.default_route.conf.j2" %} +! +{% include "bgpd.conf.default.j2" %} +! diff --git a/dockers/docker-fpm-frr/isolate.j2 b/dockers/docker-fpm-frr/isolate.j2 new file mode 100755 index 00000000000..9d19f9f4090 --- /dev/null +++ b/dockers/docker-fpm-frr/isolate.j2 @@ -0,0 +1,26 @@ +#!/bin/bash +## vtysh only accepts script in stdin, so cannot be directly used in shebang +## Cut the tail of this script and feed vtysh stdin +sed -n -e '9,$p' < "$0" | vtysh "$@" +## Exit with vtysh return code +exit $? + +## vtysh script start from next line, which line number MUST equal in 'sed' command above + +configure terminal + router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }} +{% for neighbor_addr in BGP_NEIGHBOR %} +{% if neighbor_addr | ipv4 %} + neighbor {{ neighbor_addr }} route-map ISOLATE out +{% else %} + address-family ipv6 + neighbor {{ neighbor_addr }} route-map ISOLATE out + exit-address-family +{% endif %} +{% endfor %} + exit +exit + +{% for neighbor_addr in BGP_NEIGHBOR %} +clear ip bgp {{ neighbor_addr }} soft out +{% endfor %} diff --git a/dockers/docker-fpm-frr/snmp.conf b/dockers/docker-fpm-frr/snmp.conf new file mode 100644 index 00000000000..0d875a61fe8 --- /dev/null +++ b/dockers/docker-fpm-frr/snmp.conf @@ -0,0 +1,7 @@ +# This line allows the FRR docker to speak with the snmp container +# Make sure this line matches the one in the snmp docker +# snmp:/etc/snmp/snmpd.conf +# To verify this works you need to have a valid bgp daemon running and configured +# Check that a snmpwalk to 1.3.6.1.2.1.15 gives an output +# Further verification: 1.3.6.1.2.1.15.2.0 = INTEGER: 65000 the returned value should be the confiugred ASN +agentXSocket tcp:localhost:3161 diff --git a/dockers/docker-fpm-frr/start.sh b/dockers/docker-fpm-frr/start.sh new file mode 100755 index 00000000000..b3cef5e6324 --- /dev/null +++ b/dockers/docker-fpm-frr/start.sh @@ -0,0 +1,52 @@ +#!/usr/bin/env bash + +mkdir -p /etc/frr + +CONFIG_TYPE=`sonic-cfggen -d -v 'DEVICE_METADATA["localhost"]["docker_routing_config_mode"]'` + +if [ -z "$CONFIG_TYPE" ] || [ "$CONFIG_TYPE" == "separated" ]; then + sonic-cfggen -d -y /etc/sonic/constants.yml -t /usr/share/sonic/templates/bgpd.conf.j2 > /etc/frr/bgpd.conf + sonic-cfggen -d -t /usr/share/sonic/templates/zebra.conf.j2 > /etc/frr/zebra.conf + sonic-cfggen -d -t /usr/share/sonic/templates/staticd.conf.j2 > /etc/frr/staticd.conf + echo "no service integrated-vtysh-config" > /etc/frr/vtysh.conf + rm -f /etc/frr/frr.conf +elif [ "$CONFIG_TYPE" == "unified" ]; then + sonic-cfggen -d -y /etc/sonic/constants.yml -t /usr/share/sonic/templates/frr.conf.j2 >/etc/frr/frr.conf + echo "service integrated-vtysh-config" > /etc/frr/vtysh.conf + rm -f /etc/frr/bgpd.conf /etc/frr/zebra.conf /etc/frr/staticd.conf +fi + +chown -R frr:frr /etc/frr/ + +sonic-cfggen -d -t /usr/share/sonic/templates/isolate.j2 > /usr/sbin/bgp-isolate +chown root:root /usr/sbin/bgp-isolate +chmod 0755 /usr/sbin/bgp-isolate + +sonic-cfggen -d -t /usr/share/sonic/templates/unisolate.j2 > /usr/sbin/bgp-unisolate +chown root:root /usr/sbin/bgp-unisolate +chmod 0755 /usr/sbin/bgp-unisolate + +mkdir -p /var/sonic +echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +# start eoiu pulling, only if configured so +if [[ $(sonic-cfggen -d -v 'WARM_RESTART.bgp.bgp_eoiu') == 'true' ]]; then + supervisorctl start bgp_eoiu_marker +fi + +# Start Quagga processes +supervisorctl start zebra +supervisorctl start staticd +supervisorctl start bgpd + +if [ "$CONFIG_TYPE" == "unified" ]; then + supervisorctl start vtysh_b +fi + +supervisorctl start fpmsyncd + +supervisorctl start bgpcfgd diff --git a/dockers/docker-fpm-frr/staticd.conf.j2 b/dockers/docker-fpm-frr/staticd.conf.j2 new file mode 100644 index 00000000000..4e39e17d7db --- /dev/null +++ b/dockers/docker-fpm-frr/staticd.conf.j2 @@ -0,0 +1,12 @@ +! +{% block banner %} +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/frr/staticd.conf.j2 using config DB data +! file: staticd.conf +! +{% endblock banner %} +! +{% include "daemons.common.conf.j2" %} +! +{% include "staticd.default_route.conf.j2" %} +! diff --git a/dockers/docker-fpm-frr/staticd.default_route.conf.j2 b/dockers/docker-fpm-frr/staticd.default_route.conf.j2 new file mode 100644 index 00000000000..22d61ebbd0f --- /dev/null +++ b/dockers/docker-fpm-frr/staticd.default_route.conf.j2 @@ -0,0 +1,10 @@ +! +{% block default_route %} +! set static default route to mgmt gateway as a backup to learned default +{% for (name, prefix) in MGMT_INTERFACE|pfx_filter %} +{% if prefix | ipv4 %} +ip route 0.0.0.0/0 {{ MGMT_INTERFACE[(name, prefix)]['gwaddr'] }} 200 +{% endif %} +{% endfor %} +{% endblock default_route %} +! diff --git a/dockers/docker-fpm-frr/supervisord.conf b/dockers/docker-fpm-frr/supervisord.conf new file mode 100644 index 00000000000..fe0ce6eda1a --- /dev/null +++ b/dockers/docker-fpm-frr/supervisord.conf @@ -0,0 +1,87 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:bgpcfgd] +command=/usr/bin/bgpcfgd +priority=2 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=3 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:zebra] +command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M fpm -M snmp +priority=4 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:staticd] +command=/usr/lib/frr/staticd -A 127.0.0.1 +priority=4 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:bgpd] +command=/usr/lib/frr/bgpd -A 127.0.0.1 -M snmp +priority=5 +stopsignal=KILL +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:vtysh_b] +command=/usr/bin/vtysh -b +priority=6 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:fpmsyncd] +command=fpmsyncd +priority=6 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:bgp_eoiu_marker] +command=/usr/bin/bgp_eoiu_marker.py +priority=7 +autostart=false +autorestart=false +startsecs=0 +startretries=0 +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/dockers/docker-fpm-frr/unisolate.j2 b/dockers/docker-fpm-frr/unisolate.j2 new file mode 100755 index 00000000000..abd6a912c0d --- /dev/null +++ b/dockers/docker-fpm-frr/unisolate.j2 @@ -0,0 +1,26 @@ +#!/bin/bash +## vtysh only accepts script in stdin, so cannot be directly used in shebang +## Cut the tail of this script and feed vtysh stdin +sed -n -e '9,$p' < "$0" | vtysh "$@" +## Exit with vtysh return code +exit $? + +## vtysh script start from next line, which line number MUST equal in 'sed' command above + +configure terminal + router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }} +{% for neighbor_ip in BGP_NEIGHBOR %} +{% if neighbor_ip | ipv4 %} + no neighbor {{ neighbor_ip }} route-map ISOLATE out +{% else %} + address-family ipv6 + no neighbor {{ neighbor_ip }} route-map ISOLATE out + exit-address-family +{% endif %} +{% endfor %} + exit +exit + +{% for neighbor_ip in BGP_NEIGHBOR %} +clear ip bgp {{ neighbor_ip }} soft out +{% endfor %} diff --git a/dockers/docker-fpm-frr/vtysh.conf b/dockers/docker-fpm-frr/vtysh.conf new file mode 100644 index 00000000000..e0ab9cb6f31 --- /dev/null +++ b/dockers/docker-fpm-frr/vtysh.conf @@ -0,0 +1 @@ +service integrated-vtysh-config diff --git a/dockers/docker-fpm-frr/zebra.conf.j2 b/dockers/docker-fpm-frr/zebra.conf.j2 new file mode 100644 index 00000000000..8c1c6f96484 --- /dev/null +++ b/dockers/docker-fpm-frr/zebra.conf.j2 @@ -0,0 +1,12 @@ +! +{% block banner %} +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/zebra.conf.j2 using config DB data +! file: zebra.conf +! +{% endblock banner %} +! +{% include "daemons.common.conf.j2" %} +! +{% include "zebra.interfaces.conf.j2" %} +! diff --git a/dockers/docker-fpm-frr/zebra.interfaces.conf.j2 b/dockers/docker-fpm-frr/zebra.interfaces.conf.j2 new file mode 100644 index 00000000000..4a089e4dc72 --- /dev/null +++ b/dockers/docker-fpm-frr/zebra.interfaces.conf.j2 @@ -0,0 +1,60 @@ +! +{% block vrf %} +{% if VNET is defined %} +{% for vnet_name, vnet_metadata in VNET.iteritems() %} +vrf {{ vnet_name }} +vni {{ vnet_metadata['vni'] }} +! +{% endfor %} +{% endif %} +{% endblock vrf %} +! +{% block interfaces %} +! Enable link-detect (default disabled) +{% for (name, prefix) in INTERFACE|pfx_filter %} +interface {{ name }} +link-detect +! +{% endfor %} +{% for pc in PORTCHANNEL %} +interface {{ pc }} +link-detect +! +{% endfor %} +{% endblock interfaces %} +! +{% block source_loopback %} +{% set lo_ipv4_addrs = [] %} +{% set lo_ipv6_addrs = [] %} +{% if LOOPBACK_INTERFACE %} +{% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} +{% if name == 'Loopback0' %} +{% if prefix | ipv6 %} +{% if lo_ipv6_addrs.append(prefix) %} +{% endif %} +{% else %} +{% if lo_ipv4_addrs.append(prefix) %} +{% endif %} +{% endif %} +{% endif %} +{% endfor %} +{% endif %} +! Set ip source to loopback for bgp learned routes +{% if lo_ipv4_addrs|length > 0 -%} +route-map RM_SET_SRC permit 10 + set src {{ lo_ipv4_addrs[0] | ip }} +! +{% endif %} +{% if lo_ipv6_addrs|length > 0 %} +route-map RM_SET_SRC6 permit 10 + set src {{ lo_ipv6_addrs[0] | ip }} +! +{% endif %} +ip protocol bgp route-map RM_SET_SRC +! +{% if lo_ipv6_addrs|length > 0 %} +ipv6 protocol bgp route-map RM_SET_SRC6 +! +{% endif %} +{% endblock source_loopback %} +! diff --git a/dockers/docker-fpm-gobgp/Dockerfile.j2 b/dockers/docker-fpm-gobgp/Dockerfile.j2 new file mode 100644 index 00000000000..1e333d9026c --- /dev/null +++ b/dockers/docker-fpm-gobgp/Dockerfile.j2 @@ -0,0 +1,28 @@ +FROM docker-fpm-quagga + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +COPY \ +{% for deb in docker_fpm_gobgp_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN dpkg -i \ +{% for deb in docker_fpm_gobgp_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +COPY ["start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["*.j2", "/usr/share/sonic/templates/"] +COPY ["daemons", "/etc/quagga/"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/dockers/docker-fpm-gobgp/daemons b/dockers/docker-fpm-gobgp/daemons new file mode 100644 index 00000000000..6832c3db78d --- /dev/null +++ b/dockers/docker-fpm-gobgp/daemons @@ -0,0 +1,31 @@ +# This file tells the quagga package which daemons to start. +# +# Entries are in the format: =(yes|no|priority) +# 0, "no" = disabled +# 1, "yes" = highest priority +# 2 .. 10 = lower priorities +# Read /usr/share/doc/quagga/README.Debian for details. +# +# Sample configurations for these daemons can be found in +# /usr/share/doc/quagga/examples/. +# +# ATTENTION: +# +# When activation a daemon at the first time, a config file, even if it is +# empty, has to be present *and* be owned by the user and group "quagga", else +# the daemon will not be started by /etc/init.d/quagga. The permissions should +# be u=rw,g=r,o=. +# When using "vtysh" such a config file is also needed. It should be owned by +# group "quaggavty" and set to ug=rw,o= though. Check /etc/pam.d/quagga, too. +# +# The watchquagga daemon is always started. Per default in monitoring-only but +# that can be changed via /etc/quagga/debian.conf. +# +zebra=yes +bgpd=no +ospfd=no +ospf6d=no +ripd=no +ripngd=no +isisd=no +babeld=no diff --git a/dockers/docker-fpm-gobgp/gobgpd.conf.j2 b/dockers/docker-fpm-gobgp/gobgpd.conf.j2 new file mode 100644 index 00000000000..a4fb80bf11c --- /dev/null +++ b/dockers/docker-fpm-gobgp/gobgpd.conf.j2 @@ -0,0 +1,28 @@ +[global.config] + as = {{ DEVICE_METADATA['localhost']['bgp_asn'] }} + router-id = "{{ LOOPBACK_INTERFACE.keys()[0][1] }}" +{% for neighbor_addr, bgp_session in BGP_NEIGHBOR.iteritems() %} +{% if bgp_session['asn'] | int != 0 %} +[[neighbors]] + [neighbors.config] + peer-as = {{ bgp_session['asn'] }} + neighbor-address = "{{ neighbor_addr }}" + [neighbors.graceful-restart.config] + enabled = true + [[neighbors.afi-safis]] + [neighbors.afi-safis.config] +{% if neighbor_addr | ipv6 %} + afi-safi-name = "ipv6-unicast" +{% else %} + afi-safi-name = "ipv4-unicast" +{% endif %} + [neighbors.afi-safis.mp-graceful-restart.config] + enabled = true +{% endif %} +{% endfor %} +[zebra] + [zebra.config] + enabled = true + url = "unix:/var/run/quagga/zserv.api" + redistribute-route-type-list = ["connect"] + diff --git a/dockers/docker-fpm-gobgp/isolate.j2 b/dockers/docker-fpm-gobgp/isolate.j2 new file mode 100755 index 00000000000..4502ff89577 --- /dev/null +++ b/dockers/docker-fpm-gobgp/isolate.j2 @@ -0,0 +1,4 @@ +#!/bin/bash + +echo Not implemented yet +exit diff --git a/dockers/docker-fpm-gobgp/start.sh b/dockers/docker-fpm-gobgp/start.sh new file mode 100755 index 00000000000..83afbda4f73 --- /dev/null +++ b/dockers/docker-fpm-gobgp/start.sh @@ -0,0 +1,25 @@ +#!/usr/bin/env bash + +mkdir -p /etc/quagga +sonic-cfggen -d -t /usr/share/sonic/templates/gobgpd.conf.j2 > /etc/gobgp/gobgpd.conf +sonic-cfggen -d -t /usr/share/sonic/templates/zebra.conf.j2 > /etc/quagga/zebra.conf + +sonic-cfggen -d -t /usr/share/sonic/templates/isolate.j2 > /usr/sbin/bgp-isolate +chown root:root /usr/sbin/bgp-isolate +chmod 0755 /usr/sbin/bgp-isolate + +sonic-cfggen -d -t /usr/share/sonic/templates/unisolate.j2 > /usr/sbin/bgp-unisolate +chown root:root /usr/sbin/bgp-unisolate +chmod 0755 /usr/sbin/bgp-unisolate + +mkdir -p /var/sonic +echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +# Quagga has its own monitor process, 'watchquagga' +service quagga start + +supervisorctl start fpmsyncd diff --git a/dockers/docker-fpm-gobgp/supervisord.conf b/dockers/docker-fpm-gobgp/supervisord.conf new file mode 100644 index 00000000000..4e635f4093d --- /dev/null +++ b/dockers/docker-fpm-gobgp/supervisord.conf @@ -0,0 +1,36 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:gobgpd] +command=/usr/sbin/gobgpd -p -f /etc/gobgp/gobgpd.conf -r +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:fpmsyncd] +command=fpmsyncd +priority=5 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/dockers/docker-fpm-gobgp/unisolate.j2 b/dockers/docker-fpm-gobgp/unisolate.j2 new file mode 100755 index 00000000000..69172744bae --- /dev/null +++ b/dockers/docker-fpm-gobgp/unisolate.j2 @@ -0,0 +1,5 @@ +#!/bin/bash + +echo Not implemented yet +exit + diff --git a/dockers/docker-fpm-gobgp/zebra.conf.j2 b/dockers/docker-fpm-gobgp/zebra.conf.j2 new file mode 100644 index 00000000000..2da0316ae50 --- /dev/null +++ b/dockers/docker-fpm-gobgp/zebra.conf.j2 @@ -0,0 +1,74 @@ +! +{% block banner %} +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/zebra.conf.j2 using config DB data +! file: zebra.conf +! +{% endblock banner %} +! +{% block sys_init %} +hostname {{ DEVICE_METADATA['localhost']['hostname'] }} +password zebra +enable password zebra +{% endblock sys_init %} +! +{% block interfaces %} +! Enable link-detect (default disabled) +{% for (name, prefix) in INTERFACE|pfx_filter %} +interface {{ name }} +link-detect +! +{% endfor %} +{% for pc in PORTCHANNEL %} +interface {{ pc }} +link-detect +! +{% endfor %} +{% endblock interfaces %} +! +{% block default_route %} +! set static default route to mgmt gateway as a backup to learned default +{% for (name, prefix) in MGMT_INTERFACE|pfx_filter %} +{% if prefix | ipv4 %} +ip route 0.0.0.0/0 {{ MGMT_INTERFACE[(name, prefix)]['gwaddr'] }} 200 +{% endif %} +{% endfor %} +{% endblock default_route %} +! +{% block source_loopback %} +{% set lo_ipv4_addrs = [] %} +{% set lo_ipv6_addrs = [] %} +{% if LOOPBACK_INTERFACE %} +{% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} +{% if prefix | ipv6 %} +{% if lo_ipv6_addrs.append(prefix) %} +{% endif %} +{% else %} +{% if lo_ipv4_addrs.append(prefix) %} +{% endif %} +{% endif %} +{% endfor %} +{% endif %} +! Set ip source to loopback for bgp learned routes +route-map RM_SET_SRC permit 10 + set src {{ lo_ipv4_addrs[0] | ip }} +! +{% if lo_ipv6_addrs|length > 0 %} +route-map RM_SET_SRC6 permit 10 + set src {{ lo_ipv6_addrs[0] | ip }} +! +{% endif %} +ip protocol bgp route-map RM_SET_SRC +! +{% if lo_ipv6_addrs|length > 0 %} +ipv6 protocol bgp route-map RM_SET_SRC6 +! +{% endif %} +{% endblock source_loopback %} +! +{% block logging %} +log syslog informational +log facility local4 +{% endblock logging %} +! + diff --git a/dockers/docker-fpm-quagga/Dockerfile.j2 b/dockers/docker-fpm-quagga/Dockerfile.j2 new file mode 100644 index 00000000000..f048e278942 --- /dev/null +++ b/dockers/docker-fpm-quagga/Dockerfile.j2 @@ -0,0 +1,37 @@ +FROM docker-config-engine + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +# Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +# Update apt's cache of available packages +RUN apt-get update + +# Install required packages +RUN apt-get install -y libdbus-1-3 libdaemon0 libjansson4 libpython2.7 + +{% if docker_fpm_quagga_debs.strip() -%} +# Copy locally-built Debian package dependencies +{%- for deb in docker_fpm_quagga_debs.split(' ') %} +COPY debs/{{ deb }} /debs/ +{%- endfor %} + +# Install locally-built Debian packages and implicitly install their dependencies +{%- for deb in docker_fpm_quagga_debs.split(' ') %} +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; dpkg_apt /debs/{{ deb }} +{%- endfor %} +{%- endif %} + +# Clean up +RUN apt-get clean -y +RUN apt-get autoclean -y +RUN apt-get autoremove -y +RUN rm -rf /debs ~/.cache + +COPY ["bgpcfgd", "start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["*.j2", "/usr/share/sonic/templates/"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/dockers/docker-fpm-quagga/base_image_files/vtysh b/dockers/docker-fpm-quagga/base_image_files/vtysh new file mode 100755 index 00000000000..24016bd96b2 --- /dev/null +++ b/dockers/docker-fpm-quagga/base_image_files/vtysh @@ -0,0 +1,16 @@ +#!/bin/bash + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + # Prepare a function to send HUP signal to vtysh in the container + # we mark the new instance of vtysh with the current tty as a tag + TTY=$(tty) + function cleanup + { + docker exec -i bgp pkill -HUP -f "vtysh $TTY" + } + trap cleanup HUP + docker exec -ti bgp vtysh "$TTY" "$@" +else + docker exec -i bgp vtysh "$@" +fi diff --git a/dockers/docker-fpm-quagga/bgpcfgd b/dockers/docker-fpm-quagga/bgpcfgd new file mode 100755 index 00000000000..012a766c20b --- /dev/null +++ b/dockers/docker-fpm-quagga/bgpcfgd @@ -0,0 +1,65 @@ +#!/usr/bin/env python + +import sys +import redis +import subprocess +import syslog +from swsssdk import ConfigDBConnector + +class BGPConfigDaemon: + + def __init__(self): + self.config_db = ConfigDBConnector() + self.config_db.connect() + self.bgp_asn = self.config_db.get_entry('DEVICE_METADATA', 'localhost')['bgp_asn'] + self.bgp_neighbor = self.config_db.get_table('BGP_NEIGHBOR') + + def __run_command(self, command): +# print command + p = subprocess.Popen(command, shell=True, stdout=subprocess.PIPE) + stdout = p.communicate()[0] + p.wait() + if p.returncode != 0: + syslog.syslog(syslog.LOG_ERR, '[bgp cfgd] command execution returned {}. Command: "{}", stdout: "{}"'.format(p.returncode, command, stdout)) + + def metadata_handler(self, key, data): + if key == 'localhost' and data.has_key('bgp_asn'): + if data['bgp_asn'] != self.bgp_asn: + syslog.syslog(syslog.LOG_INFO, '[bgp cfgd] ASN changed to {} from {}, restart BGP...'.format(data['bgp_asn'], self.bgp_asn)) + self.__run_command("supervisorctl restart start.sh") + self.__run_command("service quagga restart") + self.bgp_asn = data['bgp_asn'] + + def bgp_handler(self, key, data): + syslog.syslog(syslog.LOG_INFO, '[bgp cfgd] value for {} changed to {}'.format(key, data)) + if not data: + # Neighbor is deleted + command = "vtysh -c 'configure terminal' -c 'router bgp {}' -c 'no neighbor {}'".format(self.bgp_asn, key) + self.__run_command(command) + self.bgp_neighbor.pop(key) + else: + command = "vtysh -c 'configure terminal' -c 'router bgp {}' -c 'neighbor {} remote-as {}'".format(self.bgp_asn, key, data['asn']) + self.__run_command(command) + if data.has_key('name'): + command = "vtysh -c 'configure terminal' -c 'router bgp {}' -c 'neighbor {} description {}'".format(self.bgp_asn, key, data['name']) + self.__run_command(command) + if data.has_key('admin_status'): + command_mod = 'no ' if data['admin_status'] == 'up' else '' + command = "vtysh -c 'configure terminal' -c 'router bgp {}' -c '{}neighbor {} shutdown'".format(self.bgp_asn, command_mod, key) + self.__run_command(command) + self.bgp_neighbor[key] = data + + def start(self): + self.config_db.subscribe('BGP_NEIGHBOR', + lambda table, key, data: self.bgp_handler(key, data)) + self.config_db.subscribe('DEVICE_METADATA', + lambda table, key, data: self.metadata_handler(key, data)) + self.config_db.listen() + + +def main(): + daemon = BGPConfigDaemon() + daemon.start() + +if __name__ == "__main__": + main() diff --git a/dockers/docker-fpm-quagga/bgpd.conf.j2 b/dockers/docker-fpm-quagga/bgpd.conf.j2 new file mode 100644 index 00000000000..2f4c741303a --- /dev/null +++ b/dockers/docker-fpm-quagga/bgpd.conf.j2 @@ -0,0 +1,140 @@ +! +{% block banner %} +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/bgpd.conf.j2 with config DB data +! file: bgpd.conf +! +{% endblock banner %} +! +{% block system_init %} +hostname {{ DEVICE_METADATA['localhost']['hostname'] }} +password zebra +log syslog informational +log facility local4 +! enable password {# {{ en_passwd }} TODO: param needed #} +{% endblock system_init %} +! +{% if DEVICE_METADATA['localhost'].has_key('bgp_asn') %} +{% block bgp_init %} +! +! bgp multiple-instance +! +route-map FROM_BGP_SPEAKER_V4 permit 10 +! +route-map TO_BGP_SPEAKER_V4 deny 10 +! +router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }} + bgp log-neighbor-changes + bgp bestpath as-path multipath-relax + no bgp default ipv4-unicast + bgp graceful-restart restart-time 240 + bgp graceful-restart +{% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} +{% if prefix | ipv4 and name == 'Loopback0' %} + bgp router-id {{ prefix | ip }} +{% endif %} +{% endfor %} +{# advertise loopback #} +{% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} +{% if prefix | ipv4 and name == 'Loopback0' %} + network {{ prefix | ip }}/32 +{% elif prefix | ipv6 and name == 'Loopback0' %} + address-family ipv6 + network {{ prefix | ip }}/64 + exit-address-family +{% endif %} +{% endfor %} +{% endblock bgp_init %} +{% endif %} +{% block vlan_advertisement %} +{% for (name, prefix) in VLAN_INTERFACE|pfx_filter %} +{% if prefix | ipv4 %} + network {{ prefix }} +{% elif prefix | ipv6 %} + address-family ipv6 + network {{ prefix }} + exit-address-family +{% endif %} +{% endfor %} +{% endblock vlan_advertisement %} +{% block bgp_sessions %} +{% for neighbor_addr, bgp_session in BGP_NEIGHBOR.iteritems() %} +{% if bgp_session['asn'] | int != 0 %} + neighbor {{ neighbor_addr }} remote-as {{ bgp_session['asn'] }} + neighbor {{ neighbor_addr }} description {{ bgp_session['name'] }} +{# set the bgp neighbor timers if they have not default values #} +{% if (bgp_session['keepalive'] is defined and bgp_session['keepalive'] | int != 60) + or (bgp_session['holdtime'] is defined and bgp_session['holdtime'] | int != 180) %} + neighbor {{ neighbor_addr }} timers {{ bgp_session['keepalive'] }} {{ bgp_session['holdtime'] }} +{% endif %} +{% if bgp_session.has_key('admin_status') and bgp_session['admin_status'] == 'down' or not bgp_session.has_key('admin_status') and DEVICE_METADATA['localhost'].has_key('default_bgp_status') and DEVICE_METADATA['localhost']['default_bgp_status'] == 'down' %} + neighbor {{ neighbor_addr }} shutdown +{% endif %} +{% if neighbor_addr | ipv4 %} + address-family ipv4 +{% if DEVICE_METADATA['localhost']['type'] == 'ToRRouter' %} + neighbor {{ neighbor_addr }} allowas-in 1 +{% endif %} + neighbor {{ neighbor_addr }} activate + neighbor {{ neighbor_addr }} soft-reconfiguration inbound + maximum-paths 64 + exit-address-family +{% endif %} +{% if neighbor_addr | ipv6 %} + address-family ipv6 +{% if DEVICE_METADATA['localhost']['type'] == 'ToRRouter' %} + neighbor {{ neighbor_addr }} allowas-in 1 +{% endif %} + neighbor {{ neighbor_addr }} activate + neighbor {{ neighbor_addr }} soft-reconfiguration inbound + maximum-paths 64 + exit-address-family +{% endif %} +{% endif %} +{% endfor %} +{% endblock bgp_sessions %} +{% block bgp_peers_with_range %} +{% if BGP_PEER_RANGE %} +{% for bgp_peer in BGP_PEER_RANGE.values() %} + neighbor {{ bgp_peer['name'] }} peer-group + neighbor {{ bgp_peer['name'] }} passive +{% if bgp_peer['peer_asn'] is defined %} + neighbor {{ bgp_peer['name'] }} remote-as {{ bgp_peer['peer_asn'] }} +{% else %} + neighbor {{ bgp_peer['name'] }} remote-as {{ constants.deployment_id_asn_map[DEVICE_METADATA['localhost']['deployment_id']] }} +{% endif %} + neighbor {{ bgp_peer['name'] }} ebgp-multihop 255 + neighbor {{ bgp_peer['name'] }} soft-reconfiguration inbound +{% if bgp_peer['src_address'] is defined %} + neighbor {{ bgp_peer['name'] }} update-source {{ bgp_peer['src_address'] | ip }} +{% else %} +{% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} +{% if name == 'Loopback1' %} + neighbor {{ bgp_peer['name'] }} update-source {{ prefix | ip }} +{% endif %} +{% endfor %} +{% endif %} + neighbor {{ bgp_peer['name'] }} route-map FROM_BGP_SPEAKER_V4 in + neighbor {{ bgp_peer['name'] }} route-map TO_BGP_SPEAKER_V4 out +{% for ip_range in bgp_peer['ip_range'] %} + bgp listen range {{ip_range}} peer-group {{ bgp_peer['name'] }} +{% endfor %} + address-family ipv4 + neighbor {{ bgp_peer['name'] }} activate + maximum-paths 64 + exit-address-family + address-family ipv6 + neighbor {{ bgp_peer['name'] }} activate + maximum-paths 64 + exit-address-family +{% endfor %} +{% endif %} +{% endblock bgp_peers_with_range %} +! +{% if DEVICE_METADATA['localhost'].has_key('bgp_asn') %} +maximum-paths 64 +! +route-map ISOLATE permit 10 +set as-path prepend {{ DEVICE_METADATA['localhost']['bgp_asn'] }} +{% endif %} +! diff --git a/dockers/docker-fpm-quagga/isolate.j2 b/dockers/docker-fpm-quagga/isolate.j2 new file mode 100755 index 00000000000..9d19f9f4090 --- /dev/null +++ b/dockers/docker-fpm-quagga/isolate.j2 @@ -0,0 +1,26 @@ +#!/bin/bash +## vtysh only accepts script in stdin, so cannot be directly used in shebang +## Cut the tail of this script and feed vtysh stdin +sed -n -e '9,$p' < "$0" | vtysh "$@" +## Exit with vtysh return code +exit $? + +## vtysh script start from next line, which line number MUST equal in 'sed' command above + +configure terminal + router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }} +{% for neighbor_addr in BGP_NEIGHBOR %} +{% if neighbor_addr | ipv4 %} + neighbor {{ neighbor_addr }} route-map ISOLATE out +{% else %} + address-family ipv6 + neighbor {{ neighbor_addr }} route-map ISOLATE out + exit-address-family +{% endif %} +{% endfor %} + exit +exit + +{% for neighbor_addr in BGP_NEIGHBOR %} +clear ip bgp {{ neighbor_addr }} soft out +{% endfor %} diff --git a/dockers/docker-fpm-quagga/start.sh b/dockers/docker-fpm-quagga/start.sh new file mode 100755 index 00000000000..1ffda3d1773 --- /dev/null +++ b/dockers/docker-fpm-quagga/start.sh @@ -0,0 +1,29 @@ +#!/usr/bin/env bash + +mkdir -p /etc/quagga +sonic-cfggen -d -y /etc/sonic/constants.yml -t /usr/share/sonic/templates/bgpd.conf.j2 > /etc/quagga/bgpd.conf + +sonic-cfggen -d -t /usr/share/sonic/templates/zebra.conf.j2 > /etc/quagga/zebra.conf + +sonic-cfggen -d -t /usr/share/sonic/templates/isolate.j2 > /usr/sbin/bgp-isolate +chown root:root /usr/sbin/bgp-isolate +chmod 0755 /usr/sbin/bgp-isolate + +sonic-cfggen -d -t /usr/share/sonic/templates/unisolate.j2 > /usr/sbin/bgp-unisolate +chown root:root /usr/sbin/bgp-unisolate +chmod 0755 /usr/sbin/bgp-unisolate + +mkdir -p /var/sonic +echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status + +rm -f /var/run/rsyslogd.pid + +supervisorctl start bgpcfgd + +supervisorctl start rsyslogd + +# Start Quagga processes +supervisorctl start zebra +supervisorctl start bgpd + +supervisorctl start fpmsyncd diff --git a/dockers/docker-fpm-quagga/supervisord.conf b/dockers/docker-fpm-quagga/supervisord.conf new file mode 100644 index 00000000000..c4351fafefe --- /dev/null +++ b/dockers/docker-fpm-quagga/supervisord.conf @@ -0,0 +1,59 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:bgpcfgd] +command=/usr/bin/bgpcfgd +priority=2 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=3 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:zebra] +command=/usr/lib/quagga/zebra -A 127.0.0.1 +priority=4 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:bgpd] +command=/usr/lib/quagga/bgpd -A 127.0.0.1 -F +priority=5 +stopsignal=KILL +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:fpmsyncd] +command=fpmsyncd +priority=6 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/dockers/docker-fpm-quagga/unisolate.j2 b/dockers/docker-fpm-quagga/unisolate.j2 new file mode 100755 index 00000000000..abd6a912c0d --- /dev/null +++ b/dockers/docker-fpm-quagga/unisolate.j2 @@ -0,0 +1,26 @@ +#!/bin/bash +## vtysh only accepts script in stdin, so cannot be directly used in shebang +## Cut the tail of this script and feed vtysh stdin +sed -n -e '9,$p' < "$0" | vtysh "$@" +## Exit with vtysh return code +exit $? + +## vtysh script start from next line, which line number MUST equal in 'sed' command above + +configure terminal + router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }} +{% for neighbor_ip in BGP_NEIGHBOR %} +{% if neighbor_ip | ipv4 %} + no neighbor {{ neighbor_ip }} route-map ISOLATE out +{% else %} + address-family ipv6 + no neighbor {{ neighbor_ip }} route-map ISOLATE out + exit-address-family +{% endif %} +{% endfor %} + exit +exit + +{% for neighbor_ip in BGP_NEIGHBOR %} +clear ip bgp {{ neighbor_ip }} soft out +{% endfor %} diff --git a/dockers/docker-fpm-quagga/zebra.conf.j2 b/dockers/docker-fpm-quagga/zebra.conf.j2 new file mode 100644 index 00000000000..c0357eaed86 --- /dev/null +++ b/dockers/docker-fpm-quagga/zebra.conf.j2 @@ -0,0 +1,78 @@ +! +{% block banner %} +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/zebra.conf.j2 using config DB data +! file: zebra.conf +! +{% endblock banner %} +! +{% block sys_init %} +hostname {{ DEVICE_METADATA['localhost']['hostname'] }} +password zebra +enable password zebra +{% endblock sys_init %} +! +{% block interfaces %} +! Enable link-detect (default disabled) +{% for (name, prefix) in INTERFACE|pfx_filter %} +interface {{ name }} +link-detect +! +{% endfor %} +{% for pc in PORTCHANNEL %} +interface {{ pc }} +link-detect +! +{% endfor %} +{% endblock interfaces %} +! +{% block default_route %} +! set static default route to mgmt gateway as a backup to learned default +{% for (name, prefix) in MGMT_INTERFACE|pfx_filter %} +{% if prefix | ipv4 %} +ip route 0.0.0.0/0 {{ MGMT_INTERFACE[(name, prefix)]['gwaddr'] }} 200 +{% endif %} +{% endfor %} +{% endblock default_route %} +! +{% block source_loopback %} +{% set lo_ipv4_addrs = [] %} +{% set lo_ipv6_addrs = [] %} +{% if LOOPBACK_INTERFACE %} +{% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} +{% if name == 'Loopback0' %} +{% if prefix | ipv6 %} +{% if lo_ipv6_addrs.append(prefix) %} +{% endif %} +{% else %} +{% if lo_ipv4_addrs.append(prefix) %} +{% endif %} +{% endif %} +{% endif %} +{% endfor %} +{% endif %} +! Set ip source to loopback for bgp learned routes +{% if lo_ipv4_addrs|length > 0 -%} +route-map RM_SET_SRC permit 10 + set src {{ lo_ipv4_addrs[0] | ip }} +! +{% endif %} +{% if lo_ipv6_addrs|length > 0 %} +route-map RM_SET_SRC6 permit 10 + set src {{ lo_ipv6_addrs[0] | ip }} +! +{% endif %} +ip protocol bgp route-map RM_SET_SRC +! +{% if lo_ipv6_addrs|length > 0 %} +ipv6 protocol bgp route-map RM_SET_SRC6 +! +{% endif %} +{% endblock source_loopback %} +! +{% block logging %} +log syslog informational +log facility local4 +{% endblock logging %} +! + diff --git a/dockers/docker-lldp-sv2/Dockerfile.j2 b/dockers/docker-lldp-sv2/Dockerfile.j2 new file mode 100644 index 00000000000..6a720514ef9 --- /dev/null +++ b/dockers/docker-lldp-sv2/Dockerfile.j2 @@ -0,0 +1,46 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +# Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +# Update apt's cache of available packages +RUN apt-get update + +{% if docker_lldp_sv2_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_lldp_sv2_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_lldp_sv2_debs.split(' ')) }} +{%- endif %} + +{% if docker_lldp_sv2_whls.strip() -%} +# Copy locally-built Python wheel dependencies +{{ copy_files("python-wheels/", docker_lldp_sv2_whls.split(' '), "/python-wheels/") }} + +# Install locally-built Python wheel dependencies +{{ install_python_wheels(docker_lldp_sv2_whls.split(' ')) }} +{% endif %} + +# Clean up +RUN apt-get purge -y python-pip && \ + apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs \ + /python-wheels \ + ~/.cache + +COPY ["start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["lldpd.conf.j2", "/usr/share/sonic/templates/"] +COPY ["lldpd", "/etc/default/"] +COPY ["lldpmgrd", "/usr/bin/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/dockers/docker-lldp-sv2/base_image_files/lldpcli b/dockers/docker-lldp-sv2/base_image_files/lldpcli new file mode 100644 index 00000000000..3c8037862d4 --- /dev/null +++ b/dockers/docker-lldp-sv2/base_image_files/lldpcli @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS lldp lldpcli "$@" diff --git a/dockers/docker-lldp-sv2/base_image_files/lldpctl b/dockers/docker-lldp-sv2/base_image_files/lldpctl new file mode 100755 index 00000000000..f5b6d8307ee --- /dev/null +++ b/dockers/docker-lldp-sv2/base_image_files/lldpctl @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS lldp lldpctl "$@" diff --git a/dockers/docker-lldp-sv2/critical_processes b/dockers/docker-lldp-sv2/critical_processes new file mode 100644 index 00000000000..b845b70bb3f --- /dev/null +++ b/dockers/docker-lldp-sv2/critical_processes @@ -0,0 +1,3 @@ +lldpd +lldp-syncd +lldpmgrd diff --git a/dockers/docker-lldp-sv2/lldpd b/dockers/docker-lldp-sv2/lldpd new file mode 100644 index 00000000000..ba22e49b9b4 --- /dev/null +++ b/dockers/docker-lldp-sv2/lldpd @@ -0,0 +1,6 @@ +############################################################################### +# Managed by sonic-cfggen +############################################################################### + +# Uncomment to start SNMP subagent and enable CDP, SONMP and EDP protocol +DAEMON_ARGS="" diff --git a/dockers/docker-lldp-sv2/lldpd.conf.j2 b/dockers/docker-lldp-sv2/lldpd.conf.j2 new file mode 100644 index 00000000000..d5b6dba8700 --- /dev/null +++ b/dockers/docker-lldp-sv2/lldpd.conf.j2 @@ -0,0 +1,12 @@ +{% if MGMT_INTERFACE %} +{# If MGMT port alias is available, use it for port ID subtype, otherwise use port name #} +{% set mgmt_port_name = MGMT_INTERFACE.keys()[0][0] %} +{% set ipv4 = MGMT_INTERFACE.keys()[0][1].split('/')[0] %} +{% if MGMT_PORT and MGMT_PORT[mgmt_port_name] and MGMT_PORT[mgmt_port_name].alias %} +configure ports eth0 lldp portidsubtype local {{ MGMT_PORT[mgmt_port_name].alias }} +{% else %} +configure ports eth0 lldp portidsubtype local {{ mgmt_port_name }} +{% endif %} +configure system ip management pattern {{ ipv4 }} +{% endif %} +configure system hostname {{ DEVICE_METADATA['localhost']['hostname'] }} diff --git a/dockers/docker-lldp-sv2/lldpmgrd b/dockers/docker-lldp-sv2/lldpmgrd new file mode 100755 index 00000000000..edcdc5c42e4 --- /dev/null +++ b/dockers/docker-lldp-sv2/lldpmgrd @@ -0,0 +1,266 @@ +#!/usr/bin/env python + +""" + lldpmgrd + + LLDP manager daemon for SONiC + + Daemon which listens for changes in the PORT table of the State DB + and updates LLDP configuration accordingly for that port by calling + lldpcli. + + TODO: Also listen for changes in DEVICE_NEIGHBOR and PORT tables in + Config DB and update LLDP config upon changes. +""" + + +try: + import os + import signal + import subprocess + import sys + import syslog + import os.path + from swsscommon import swsscommon +except ImportError as err: + raise ImportError("%s - required module not found" % str(err)) + +VERSION = "1.0" + +SYSLOG_IDENTIFIER = "lldpmgrd" + + +# ========================== Syslog wrappers ========================== + +def log_debug(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_DEBUG, msg) + syslog.closelog() + + +def log_info(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_INFO, msg) + syslog.closelog() + + +def log_warning(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_WARNING, msg) + syslog.closelog() + + +def log_error(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_ERR, msg) + syslog.closelog() + + +# ========================== Signal Handling ========================== + +def signal_handler(sig, frame): + if sig == signal.SIGHUP: + log_info("Caught SIGHUP - ignoring...") + return + elif sig == signal.SIGINT: + log_info("Caught SIGINT - exiting...") + sys.exit(128 + sig) + elif sig == signal.SIGTERM: + log_info("Caught SIGTERM - exiting...") + sys.exit(128 + sig) + else: + log_warning("Caught unhandled signal '" + sig + "'") + +# ============================== Classes ============================== + +class LldpManager(object): + """ + Class which subscribes to notifications of changes in the PORT table of + the Redis State database and updates LLDP configuration accordingly for + that port by calling lldpcli. + Attributes: + state_db: Handle to Redis State database via swsscommon lib + config_db: Handle to Redis Config database via swsscommon lib + pending_cmds: Dictionary where key is port name, value is pending + LLDP configuration command to run + """ + REDIS_HOSTNAME = "localhost" + REDIS_PORT = 6379 + REDIS_TIMEOUT_MS = 0 + + def __init__(self): + # Open a handle to the Config database + self.config_db = swsscommon.DBConnector(swsscommon.CONFIG_DB, + self.REDIS_HOSTNAME, + self.REDIS_PORT, + self.REDIS_TIMEOUT_MS) + + # Open a handle to the Application database + self.appl_db = swsscommon.DBConnector(swsscommon.APPL_DB, + self.REDIS_HOSTNAME, + self.REDIS_PORT, + self.REDIS_TIMEOUT_MS) + + self.pending_cmds = {} + + def is_port_up(self, port_name): + """ + Determine if a port is up or down by looking into the oper-status for the port in + PORT TABLE in the Application DB + """ + # Retrieve all entires for this port from the Port table + port_table = swsscommon.Table(self.appl_db, swsscommon.APP_PORT_TABLE_NAME) + (status, fvp) = port_table.get(port_name) + if status: + # Convert list of tuples to a dictionary + port_table_dict = dict(fvp) + + # Get the oper-status for the port + if port_table_dict.has_key("oper_status"): + port_oper_status = port_table_dict.get("oper_status") + log_info("Port name {} oper status: {}".format(port_name, port_oper_status)) + return port_oper_status == "up" + else: + return False + else: + log_error("Port '{}' not found in {} table in App DB".format(port_name, swsscommon.APP_PORT_TABLE_NAME)) + return False + + def generate_pending_lldp_config_cmd_for_port(self, port_name): + """ + For port `port_name`, look up the description and alias in the Config database, + then form the appropriate lldpcli configuration command and run it. + """ + port_desc = None + + # Retrieve all entires for this port from the Port table + port_table = swsscommon.Table(self.config_db, swsscommon.CFG_PORT_TABLE_NAME) + (status, fvp) = port_table.get(port_name) + if status: + # Convert list of tuples to a dictionary + port_table_dict = dict(fvp) + + # Get the port alias. If None or empty string, use port name instead + port_alias = port_table_dict.get("alias") + if not port_alias: + log_info("Unable to retrieve port alias for port '{}'. Using port name instead.".format(port_name)) + port_alias = port_name + + # Get the port description. If None or empty string, we'll skip this configuration + port_desc = port_table_dict.get("description") + + else: + log_error("Port '{}' not found in {} table in Config DB. Using port name instead of port alias.".format(port_name, swsscommon.CFG_PORT_TABLE_NAME)) + port_alias = port_name + + lldpcli_cmd = "lldpcli configure ports {0} lldp portidsubtype local {1}".format(port_name, port_alias) + + # if there is a description available, also configure that + if port_desc: + lldpcli_cmd += " description {}".format(port_desc) + else: + log_info("Unable to retrieve description for port '{}'. Not adding port description".format(port_name)) + + # Add the command to our dictionary of pending commands, overwriting any + # previous pending command for this port + self.pending_cmds[port_name] = lldpcli_cmd + + def process_pending_cmds(self): + # List of port names (keys of elements) to delete from self.pending_cmds + to_delete = [] + + for (port_name, cmd) in self.pending_cmds.iteritems(): + log_debug("Running command: '{}'".format(cmd)) + + proc = subprocess.Popen(cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) + + (stdout, stderr) = proc.communicate() + + # If the command succeeds, add the port name to our to_delete list. + # We will delete this command from self.pending_cmds below. + # If the command fails, log a message, but don't delete the command + # from self.pending_cmds, so that the command will be retried the + # next time this method is called. + if proc.returncode == 0: + to_delete.append(port_name) + else: + log_warning("Command failed '{}': {}".format(cmd, stderr)) + + # Delete all successful commands from self.pending_cmds + for port_name in to_delete: + self.pending_cmds.pop(port_name, None) + + def run(self): + """ + Subscribes to notifications of changes in the PORT table + of the Redis Config/Application database. + Subscribe to APP_DB - get port oper status + Subscribe to CONFIG_DB - get notified of port config changes + Update LLDP configuration accordingly. + """ + # Set select timeout to 10 seconds + SELECT_TIMEOUT_MS = 1000 * 10 + + sel = swsscommon.Select() + + # Subscribe to PORT table notifications in the Config DB + sst_confdb = swsscommon.SubscriberStateTable(self.config_db, swsscommon.CFG_PORT_TABLE_NAME) + sel.addSelectable(sst_confdb) + + # Subscribe to PORT table notifications in the App DB + sst_appdb = swsscommon.SubscriberStateTable(self.appl_db, swsscommon.APP_PORT_TABLE_NAME) + sel.addSelectable(sst_appdb) + + # Listen for changes to the PORT table in the CONFIG_DB and APP_DB + while True: + (state, c) = sel.select(SELECT_TIMEOUT_MS) + + if state == swsscommon.Select.OBJECT: + (key, op, fvp) = sst_confdb.pop() + if fvp: + fvp_dict = dict(fvp) + + # handle config change + if (fvp_dict.has_key("alias") or fvp_dict.has_key("description")) and (op in ["SET", "DEL"]): + if self.is_port_up(key): + self.generate_pending_lldp_config_cmd_for_port(key) + else: + self.pending_cmds.pop(key, None) + + (key, op, fvp) = sst_appdb.pop() + if (key != "PortInitDone") and (key != "PortConfigDone"): + if fvp: + fvp_dict = dict(fvp) + + # handle port status change + if fvp_dict.has_key("oper_status"): + if "up" in fvp_dict.get("oper_status"): + self.generate_pending_lldp_config_cmd_for_port(key) + else: + self.pending_cmds.pop(key, None) + + # Process all pending commands + self.process_pending_cmds() + + +# ============================= Functions ============================= + +def main(): + log_info("Starting up...") + + if not os.geteuid() == 0: + log_error("Must be root to run this daemon") + print "Error: Must be root to run this daemon" + sys.exit(1) + + # Register our signal handlers + signal.signal(signal.SIGHUP, signal_handler) + signal.signal(signal.SIGINT, signal_handler) + signal.signal(signal.SIGTERM, signal_handler) + + # Instantiate a LldpManager object + lldpmgr = LldpManager() + lldpmgr.run() + +if __name__ == "__main__": + main() diff --git a/dockers/docker-lldp-sv2/start.sh b/dockers/docker-lldp-sv2/start.sh new file mode 100755 index 00000000000..76666e77aca --- /dev/null +++ b/dockers/docker-lldp-sv2/start.sh @@ -0,0 +1,38 @@ +#!/usr/bin/env bash + +sonic-cfggen -d -t /usr/share/sonic/templates/lldpd.conf.j2 > /etc/lldpd.conf + +mkdir -p /var/sonic +echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status + +rm -f /var/run/rsyslogd.pid +rm -f /var/run/lldpd.socket + +supervisorctl start rsyslogd +supervisorctl start lldpd + +# Current lldpd version has a bug. +# When lldpd starts it is in the pause state by default +# But then it execute 'lldpcli resume' to configure and unpause itself. +# When lldpd execute lldpcli, it doesn't check the return code +# Sometimes lldpcli returns failure, but lldpd doesn't catch it +# and keeps working paused and unconfigured +# +# The fix below addresses the issue. +# + +# wait until lldpd started +until [[ -e /var/run/lldpd.socket ]]; +do + sleep 1; +done + +# Manually try to resume lldpd, until it's successful +while /bin/true; +do + lldpcli -u /var/run/lldpd.socket -c /etc/lldpd.conf -c /etc/lldpd.d resume > /dev/null && break + sleep 1 +done + +supervisorctl start lldp-syncd +supervisorctl start lldpmgrd diff --git a/dockers/docker-lldp-sv2/supervisord.conf b/dockers/docker-lldp-sv2/supervisord.conf new file mode 100644 index 00000000000..3f3f5beabc8 --- /dev/null +++ b/dockers/docker-lldp-sv2/supervisord.conf @@ -0,0 +1,55 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:lldpd] +# https://github.com/vincentbernat/lldpd/commit/9856f2792c301116cc4a3fcfba91b9672ee5db1f +# - `-d` means to stay in foreground, log to syslog +# - `-dd` means to stay in foreground, log warnings to console +# - `-ddd` means to stay in foreground, log warnings and info to console +# - `-dddd` means to stay in foreground, log all to console +command=/usr/sbin/lldpd -d -I Ethernet*,eth0 -C eth0 +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:lldp-syncd] +command=/usr/bin/env python2 -m lldp_syncd +priority=4 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:lldpmgrd] +command=/usr/bin/lldpmgrd +priority=5 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/dockers/docker-orchagent/Dockerfile.j2 b/dockers/docker-orchagent/Dockerfile.j2 new file mode 100755 index 00000000000..f01bca72409 --- /dev/null +++ b/dockers/docker-orchagent/Dockerfile.j2 @@ -0,0 +1,81 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update && \ + apt-get install -f -y \ + ifupdown \ + arping \ + libdbus-1-3 \ + libdaemon0 \ + libjansson4 \ + libpython2.7 \ + iproute2 \ + ndisc6 \ + tcpdump \ + # Install redis-tools dependencies + # TODO: implicitly install dependencies + libatomic1 \ + libjemalloc1 \ + liblua5.1-0 \ + lua-bitop \ + lua-cjson \ + libelf1 \ + libmnl0 \ + bridge-utils + +{% if ( CONFIGURED_ARCH == "armhf" or CONFIGURED_ARCH == "arm64" ) %} +## Fix for gcc/python not found in arm docker +RUN apt-get install -f -y python2.7 python2.7-dev +RUN apt-get install -y gcc-6 +{% endif %} +{% if CONFIGURED_ARCH == "armhf" %} +RUN ln -s -f /usr/bin/gcc-6 /usr/bin/arm-linux-gnueabihf-gcc +{% endif %} +{% if CONFIGURED_ARCH == "arm64" %} +RUN ln -s -f /usr/bin/gcc-6 /usr/bin/aarch64-linux-gnu-gcc +{% endif %} + +RUN pip install \ + scapy==2.4.2 \ + setuptools \ + pyroute2==0.5.3 +RUN pip install \ + netifaces==0.10.7 \ + monotonic==1.5 + +{% if ( CONFIGURED_ARCH == "armhf" or CONFIGURED_ARCH == "arm64" ) %} +# Remove installed gcc +RUN apt-get remove -y gcc-6 +{% endif %} + +{% if docker_orchagent_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_orchagent_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_orchagent_debs.split(' ')) }} +{%- endif %} + +## Clean up +RUN apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs + +COPY ["files/arp_update", "/usr/bin"] +COPY ["enable_counters.py", "/usr/bin"] +COPY ["start.sh", "orchagent.sh", "swssconfig.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor/"] + +## Copy all Jinja2 template files into the templates folder +COPY ["*.j2", "/usr/share/sonic/templates/"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/dockers/docker-orchagent/base_image_files/swssloglevel b/dockers/docker-orchagent/base_image_files/swssloglevel new file mode 100755 index 00000000000..d03685ed383 --- /dev/null +++ b/dockers/docker-orchagent/base_image_files/swssloglevel @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS swss swssloglevel "$@" diff --git a/dockers/docker-orchagent/critical_processes b/dockers/docker-orchagent/critical_processes new file mode 100644 index 00000000000..7fd8a516520 --- /dev/null +++ b/dockers/docker-orchagent/critical_processes @@ -0,0 +1,10 @@ +orchagent +portsyncd +neighsyncd +vlanmgrd +intfmgrd +portmgrd +buffermgrd +vrfmgrd +nbrmgrd +vxlanmgrd diff --git a/dockers/docker-orchagent/enable_counters.py b/dockers/docker-orchagent/enable_counters.py new file mode 100755 index 00000000000..75f8ef82cb4 --- /dev/null +++ b/dockers/docker-orchagent/enable_counters.py @@ -0,0 +1,36 @@ +#!/usr/bin/env python + +import swsssdk +import time + +def enable_counter_group(db, name): + info = {} + info['FLEX_COUNTER_STATUS'] = 'enable' + db.mod_entry("FLEX_COUNTER_TABLE", name, info) + +def enable_counters(): + db = swsssdk.ConfigDBConnector() + db.connect() + enable_counter_group(db, 'PORT') + enable_counter_group(db, 'QUEUE') + enable_counter_group(db, 'PFCWD') + enable_counter_group(db, 'PG_WATERMARK') + enable_counter_group(db, 'QUEUE_WATERMARK') + +def get_uptime(): + with open('/proc/uptime') as fp: + return float(fp.read().split(' ')[0]) + +def main(): + # If the switch was just started (uptime less than 5 minutes), + # wait for 3 minutes and enable counters + # otherwise wait for 60 seconds and enable counters + uptime = get_uptime() + if uptime < 300: + time.sleep(180) + else: + time.sleep(60) + enable_counters() + +if __name__ == '__main__': + main() diff --git a/dockers/docker-orchagent/ipinip.json.j2 b/dockers/docker-orchagent/ipinip.json.j2 new file mode 100644 index 00000000000..66bec75da7d --- /dev/null +++ b/dockers/docker-orchagent/ipinip.json.j2 @@ -0,0 +1,78 @@ +{% set ipv4_addresses = [] %} +{% set ipv6_addresses = [] %} +{% set ipv4_loopback_addresses = [] %} +{% set ipv6_loopback_addresses = [] %} +{% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} + {%- if prefix | ipv4 and name == 'Loopback0' %} + {%- set ipv4_addresses = ipv4_addresses.append(prefix) %} + {%- set ipv4_loopback_addresses = ipv4_loopback_addresses.append(prefix) %} + {%- endif %} + {%- if prefix | ipv6 and name == 'Loopback0' %} + {%- set ipv6_addresses = ipv6_addresses.append(prefix) %} + {%- set ipv6_loopback_addresses = ipv6_loopback_addresses.append(prefix) %} + {%- endif %} +{% endfor %} +{% for (name, prefix) in INTERFACE|pfx_filter %} + {%- if prefix | ipv4 %} + {%- set ipv4_addresses = ipv4_addresses.append(prefix) %} + {%- endif %} + {%- if prefix | ipv6 %} + {%- set ipv6_addresses = ipv6_addresses.append(prefix) %} + {%- endif %} +{% endfor %} +{% for (name, prefix) in PORTCHANNEL_INTERFACE|pfx_filter %} + {%- if prefix | ipv4 %} + {%- set ipv4_addresses = ipv4_addresses.append(prefix) %} + {%- endif %} + {%- if prefix | ipv6 %} + {%- set ipv6_addresses = ipv6_addresses.append(prefix) %} + {%- endif %} +{% endfor %} +{% for (name, prefix) in VLAN_INTERFACE|pfx_filter %} + {%- if prefix | ipv4 %} + {%- set ipv4_addresses = ipv4_addresses.append(prefix) %} + {%- endif %} + {%- if prefix | ipv6 %} + {%- set ipv6_addresses = ipv6_addresses.append(prefix) %} + {%- endif %} +{% endfor %} +[ +{% if ipv4_loopback_addresses %} + { + "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : { + "tunnel_type":"IPINIP", +{% if "mlnx" in DEVICE_METADATA.localhost.platform %} + "dst_ip":"{% for prefix in ipv4_loopback_addresses %}{{ prefix | ip }}{% if not loop.last %},{% endif %}{% endfor %}", + "dscp_mode":"uniform", + "ecn_mode":"standard", +{% else %} + "dst_ip":"{% for prefix in ipv4_addresses %}{{ prefix | ip }}{% if not loop.last %},{% endif %}{% endfor %}", + "dscp_mode":"pipe", + "ecn_mode":"copy_from_outer", +{% endif %} + "ttl_mode":"pipe" + }, + "OP": "SET" + } +{% endif %} +{% if ipv4_loopback_addresses and ipv6_loopback_addresses %} , +{% endif %} +{% if ipv6_loopback_addresses %} + { + "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : { + "tunnel_type":"IPINIP", +{% if "mlnx" in DEVICE_METADATA.localhost.platform %} + "dst_ip":"{% for prefix in ipv6_loopback_addresses %}{{ prefix | ip }}{% if not loop.last %},{% endif %}{% endfor %}", + "dscp_mode":"uniform", + "ecn_mode":"standard", +{% else %} + "dst_ip":"{% for prefix in ipv6_addresses %}{{ prefix | ip }}{% if not loop.last %},{% endif %}{% endfor %}", + "dscp_mode":"pipe", + "ecn_mode":"copy_from_outer", +{% endif %} + "ttl_mode":"pipe" + }, + "OP": "SET" + } +{% endif %} +] diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh new file mode 100755 index 00000000000..5e01cd480f5 --- /dev/null +++ b/dockers/docker-orchagent/orchagent.sh @@ -0,0 +1,41 @@ +#!/usr/bin/env bash + +# Export platform information. Required to be able to write +# vendor specific code. +export platform=`sonic-cfggen -y /etc/sonic/sonic_version.yml -v asic_type` + +MAC_ADDRESS=`ip link show eth0 | grep ether | awk '{print $2}'` + +# Create a folder for SwSS record files +mkdir -p /var/log/swss +ORCHAGENT_ARGS="-d /var/log/swss " + +# Set orchagent pop batch size to 8192 +ORCHAGENT_ARGS+="-b 8192 " + +# Add platform specific arguments if necessary +if [ "$platform" == "broadcom" ]; then + ORCHAGENT_ARGS+="-m $MAC_ADDRESS" +elif [ "$platform" == "cavium" ]; then + ORCHAGENT_ARGS+="-m $MAC_ADDRESS" +elif [ "$platform" == "nephos" ]; then + ORCHAGENT_ARGS+="-m $MAC_ADDRESS" +elif [ "$platform" == "centec" ]; then + last_byte=$(python -c "print '$MAC_ADDRESS'[-2:]") + aligned_last_byte=$(python -c "print format(int(int('$last_byte', 16) + 1), '02x')") # put mask and take away the 0x prefix + ALIGNED_MAC_ADDRESS=$(python -c "print '$MAC_ADDRESS'[:-2] + '$aligned_last_byte'") # put aligned byte into the end of MAC + ORCHAGENT_ARGS+="-m $ALIGNED_MAC_ADDRESS" +elif [ "$platform" == "barefoot" ]; then + ORCHAGENT_ARGS+="-m $MAC_ADDRESS" +elif [ "$platform" == "vs" ]; then + ORCHAGENT_ARGS+="-m $MAC_ADDRESS" +elif [ "$platform" == "mellanox" ]; then + ORCHAGENT_ARGS+="" +elif [ "$platform" == "innovium" ]; then + ORCHAGENT_ARGS+="-m $MAC_ADDRESS" +else + MAC_ADDRESS=`sonic-cfggen -d -v 'DEVICE_METADATA.localhost.mac'` + ORCHAGENT_ARGS+="-m $MAC_ADDRESS" +fi + +exec /usr/bin/orchagent ${ORCHAGENT_ARGS} diff --git a/dockers/docker-orchagent/ports.json.j2 b/dockers/docker-orchagent/ports.json.j2 new file mode 100644 index 00000000000..b10d4d58a43 --- /dev/null +++ b/dockers/docker-orchagent/ports.json.j2 @@ -0,0 +1,20 @@ +[ +{% set ports_with_speed_set=[] %} +{% if PORT %} +{% for port in PORT %} +{% if PORT[port].has_key('speed') %} + {%- if ports_with_speed_set.append(port) -%}{%- endif -%} +{%- endif -%} +{% endfor %} +{% for port in ports_with_speed_set %} + { + "PORT_TABLE:{{ port }}": { + "speed": "{{ PORT[port]['speed'] }}", + "description": "{{ PORT[port]['description'] }}" + }, + "OP": "SET" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} +] diff --git a/dockers/docker-orchagent/start.sh b/dockers/docker-orchagent/start.sh new file mode 100755 index 00000000000..b7357ad58f6 --- /dev/null +++ b/dockers/docker-orchagent/start.sh @@ -0,0 +1,50 @@ +#!/usr/bin/env bash + +mkdir -p /etc/swss/config.d/ + +sonic-cfggen -d -y /etc/sonic/sonic_version.yml -t /usr/share/sonic/templates/switch.json.j2 > /etc/swss/config.d/switch.json +sonic-cfggen -d -t /usr/share/sonic/templates/ipinip.json.j2 > /etc/swss/config.d/ipinip.json +sonic-cfggen -d -t /usr/share/sonic/templates/ports.json.j2 > /etc/swss/config.d/ports.json + +# Executed HWSKU specific initialization tasks. +if [ -x /usr/share/sonic/hwsku/hwsku-init ]; then + /usr/share/sonic/hwsku/hwsku-init +fi + +export platform=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform` + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +supervisorctl start orchagent + +supervisorctl start restore_neighbors + +supervisorctl start portsyncd + +supervisorctl start neighsyncd + +supervisorctl start swssconfig + +supervisorctl start vrfmgrd + +supervisorctl start vlanmgrd + +supervisorctl start intfmgrd + +supervisorctl start portmgrd + +supervisorctl start buffermgrd + +supervisorctl start enable_counters + +supervisorctl start nbrmgrd + +supervisorctl start vxlanmgrd + +# Start arp_update when VLAN exists +VLAN=`sonic-cfggen -d -v 'VLAN.keys() | join(" ") if VLAN'` +if [ "$VLAN" != "" ]; then + supervisorctl start arp_update +fi diff --git a/dockers/docker-orchagent/supervisord.conf b/dockers/docker-orchagent/supervisord.conf new file mode 100644 index 00000000000..9ae2776f6d2 --- /dev/null +++ b/dockers/docker-orchagent/supervisord.conf @@ -0,0 +1,142 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=unexpected +stdout_logfile=syslog +stderr_logfile=syslog + +[program:orchagent] +command=/usr/bin/orchagent.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:portsyncd] +command=/usr/bin/portsyncd +priority=4 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:neighsyncd] +command=/usr/bin/neighsyncd +priority=5 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:swssconfig] +command=/usr/bin/swssconfig.sh +priority=6 +autostart=false +autorestart=unexpected +startretries=0 +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:arp_update] +command=/usr/bin/arp_update +priority=7 +autostart=false +autorestart=unexpected +stdout_logfile=syslog +stderr_logfile=syslog + +[program:vlanmgrd] +command=/usr/bin/vlanmgrd +priority=8 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:intfmgrd] +command=/usr/bin/intfmgrd +priority=9 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:portmgrd] +command=/usr/bin/portmgrd +priority=10 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:buffermgrd] +command=/usr/bin/buffermgrd -l /usr/share/sonic/hwsku/pg_profile_lookup.ini +priority=11 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:enable_counters] +command=/usr/bin/enable_counters.py +priority=12 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:vrfmgrd] +command=/usr/bin/vrfmgrd +priority=13 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:restore_neighbors] +command=/usr/bin/restore_neighbors.py +priority=14 +autostart=false +autorestart=false +startsecs=0 +startretries=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:nbrmgrd] +command=/usr/bin/nbrmgrd +priority=15 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:vxlanmgrd] +command=/usr/bin/vxlanmgrd +priority=16 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/dockers/docker-orchagent/switch.json.j2 b/dockers/docker-orchagent/switch.json.j2 new file mode 100644 index 00000000000..f8beffbc9ad --- /dev/null +++ b/dockers/docker-orchagent/switch.json.j2 @@ -0,0 +1,22 @@ +{# the range of hash_seed is 0-15 #} +{# set default hash seed to 0 #} +{% set hash_seed = 0 %} +{% if DEVICE_METADATA.localhost.type %} +{% if DEVICE_METADATA.localhost.type == "ToRRouter" %} +{% set hash_seed = 0 %} +{% elif DEVICE_METADATA.localhost.type == "LeafRouter" %} +{% set hash_seed = 10 %} +{% elif DEVICE_METADATA.localhost.type == "SpineRouter" %} +{% set hash_seed = 15 %} +{% endif %} +{% endif %} +[ + { + "SWITCH_TABLE:switch": { + "ecmp_hash_seed": "{{ hash_seed }}", + "lag_hash_seed": "{{ hash_seed }}", + "fdb_aging_time": "600" + }, + "OP": "SET" + } +] diff --git a/dockers/docker-orchagent/swssconfig.sh b/dockers/docker-orchagent/swssconfig.sh new file mode 100755 index 00000000000..c521fadf0a4 --- /dev/null +++ b/dockers/docker-orchagent/swssconfig.sh @@ -0,0 +1,61 @@ +#!/usr/bin/env bash + +set -e + +function fast_reboot { + case "$(cat /proc/cmdline)" in + *fast-reboot*) + if [[ -f /fdb.json ]]; + then + swssconfig /fdb.json + rm -f /fdb.json + fi + + if [[ -f /arp.json ]]; + then + swssconfig /arp.json + rm -f /arp.json + fi + + if [[ -f /default_routes.json ]]; + then + swssconfig /default_routes.json + rm -f /default_routes.json + fi + + ;; + *) + ;; + esac +} + +# Wait until swss.sh in the host system create file swss:/ready +until [[ -e /ready ]]; do + sleep 0.1; +done + +rm -f /ready + +# Restore FDB and ARP table ASAP +fast_reboot + +HWSKU=`sonic-cfggen -d -v "DEVICE_METADATA['localhost']['hwsku']"` + +# Don't load json config if system warm start or +# swss docker warm start is enabled, the data already exists in appDB. +SYSTEM_WARM_START=`redis-cli -n 6 hget "WARM_RESTART_ENABLE_TABLE|system" enable` +SWSS_WARM_START=`redis-cli -n 6 hget "WARM_RESTART_ENABLE_TABLE|swss" enable` +if [[ "$SYSTEM_WARM_START" == "true" ]] || [[ "$SWSS_WARM_START" == "true" ]]; then + # We have to make sure db data has not been flushed. + RESTORE_COUNT=`redis-cli -n 6 hget "WARM_RESTART_TABLE|orchagent" restore_count` + if [[ -n "$RESTORE_COUNT" ]] && [[ "$RESTORE_COUNT" != "0" ]]; then + exit 0 + fi +fi + +SWSSCONFIG_ARGS="00-copp.config.json ipinip.json ports.json switch.json " + +for file in $SWSSCONFIG_ARGS; do + swssconfig /etc/swss/config.d/$file + sleep 1 +done diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2 new file mode 100755 index 00000000000..fd11f628559 --- /dev/null +++ b/dockers/docker-platform-monitor/Dockerfile.j2 @@ -0,0 +1,63 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +# Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +# Install required packages +RUN apt-get update && \ + apt-get install -y \ + python-pip \ + libpython2.7 \ + ipmitool \ + librrd8 \ + librrd-dev \ + rrdtool \ + python-smbus \ + ethtool \ + dmidecode + +{% if docker_platform_monitor_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_platform_monitor_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_platform_monitor_debs.split(' ')) }} +{%- endif %} + +{% if docker_platform_monitor_pydebs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("python-debs/", docker_platform_monitor_pydebs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_platform_monitor_pydebs.split(' ')) }} +{%- endif %} + +{% if docker_platform_monitor_whls.strip() -%} +# Copy locally-built Python wheel dependencies +{{ copy_files("python-wheels/", docker_platform_monitor_whls.split(' '), "/python-wheels/") }} + +# Install locally-built Python wheel dependencies +{{ install_python_wheels(docker_platform_monitor_whls.split(' ')) }} +{% endif %} + +# Clean up +RUN apt-get purge -y \ + python-pip && \ + apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs \ + /python-wheels \ + ~/.cache + +COPY ["docker_init.sh", "lm-sensors.sh", "/usr/bin/"] +COPY ["docker-pmon.supervisord.conf.j2", "start.sh.j2", "/usr/share/sonic/templates/"] +COPY ["ssd_tools/*", "/usr/bin/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor"] + +ENTRYPOINT ["/usr/bin/docker_init.sh"] diff --git a/dockers/docker-platform-monitor/base_image_files/cmd_wrapper b/dockers/docker-platform-monitor/base_image_files/cmd_wrapper new file mode 100755 index 00000000000..74e5dd7ab9c --- /dev/null +++ b/dockers/docker-platform-monitor/base_image_files/cmd_wrapper @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS pmon $(basename $0) "$@" diff --git a/dockers/docker-platform-monitor/critical_processes b/dockers/docker-platform-monitor/critical_processes new file mode 100644 index 00000000000..4233cda3498 --- /dev/null +++ b/dockers/docker-platform-monitor/critical_processes @@ -0,0 +1,5 @@ +fancontrol +ledd +xcvrd +psud +syseepromd diff --git a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 new file mode 100644 index 00000000000..9a2414c30d0 --- /dev/null +++ b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 @@ -0,0 +1,88 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog +startsecs=0 + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:lm-sensors] +command=/usr/bin/lm-sensors.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog +startsecs=0 + +[program:fancontrol] +command=/usr/sbin/fancontrol +priority=4 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +{% if not skip_ledd %} +[program:ledd] +command=/usr/bin/ledd +priority=5 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog +startsecs=0 +{% endif %} + +{% if not skip_xcvrd %} +[program:xcvrd] +command=/usr/bin/xcvrd +priority=6 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog +startsecs=0 +{% endif %} + +{% if not skip_psud %} +[program:psud] +command=/usr/bin/psud +priority=7 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog +startsecs=0 +{% endif %} + +{% if not skip_syseepromd %} +[program:syseepromd] +command=/usr/bin/syseepromd +priority=8 +autostart=false +autorestart=true +stdout_logfile=syslog +stderr_logfile=syslog +startsecs=0 +{% endif %} diff --git a/dockers/docker-platform-monitor/docker_init.sh b/dockers/docker-platform-monitor/docker_init.sh new file mode 100755 index 00000000000..a2be49f49dd --- /dev/null +++ b/dockers/docker-platform-monitor/docker_init.sh @@ -0,0 +1,18 @@ +#!/usr/bin/env bash + +# Generate supervisord config file and the start.sh scripts +mkdir -p /etc/supervisor/conf.d/ + +if [ -e /usr/share/sonic/platform/pmon_daemon_control.json ]; +then + sonic-cfggen -j /usr/share/sonic/platform/pmon_daemon_control.json -t /usr/share/sonic/templates/docker-pmon.supervisord.conf.j2 > /etc/supervisor/conf.d/supervisord.conf + sonic-cfggen -j /usr/share/sonic/platform/pmon_daemon_control.json -t /usr/share/sonic/templates/start.sh.j2 > /usr/bin/start.sh + chmod +x /usr/bin/start.sh +else + sonic-cfggen -t /usr/share/sonic/templates/docker-pmon.supervisord.conf.j2 > /etc/supervisor/conf.d/supervisord.conf + sonic-cfggen -t /usr/share/sonic/templates/start.sh.j2 > /usr/bin/start.sh + chmod +x /usr/bin/start.sh +fi + +exec /usr/bin/supervisord + diff --git a/dockers/docker-platform-monitor/lm-sensors.sh b/dockers/docker-platform-monitor/lm-sensors.sh new file mode 100755 index 00000000000..2f4768a8cdd --- /dev/null +++ b/dockers/docker-platform-monitor/lm-sensors.sh @@ -0,0 +1,23 @@ +#!/usr/bin/env bash +# +# Based off /etc/init.d/lm-sensors +# + + +# NOTE: lm-sensors v3.3.5 appears to have a bug. If `sensors -s` is called, it +# will first load /etc/sensors.conf, then load all files in /etc/sensors.d/, +# overriding any values that may have already been specified in +# /etc/sensors.conf. However, it appears this overriding is not taking place. +# As a workaround, as long as a platform-specific sensors.conf has been copied +# to /etc/sensors.d/, we will ONLY load that file, otherwise we load the default. +if [ -e /etc/sensors.d/sensors.conf ]; then + /usr/bin/sensors -s -c /etc/sensors.d/sensors.conf > /dev/null 2>&1 +else + /usr/bin/sensors -s > /dev/null 2>&1 +fi + +/usr/bin/sensors > /dev/null 2>&1 + +# Currently, there is no way to run sensord in the foreground, so we +# can't use supervisord. Instead, we just start the service for now. +service sensord start diff --git a/dockers/docker-platform-monitor/ssd_tools/SmartCmd b/dockers/docker-platform-monitor/ssd_tools/SmartCmd new file mode 100755 index 00000000000..dae647e4697 Binary files /dev/null and b/dockers/docker-platform-monitor/ssd_tools/SmartCmd differ diff --git a/dockers/docker-platform-monitor/ssd_tools/iSmart b/dockers/docker-platform-monitor/ssd_tools/iSmart new file mode 100755 index 00000000000..c6bba004602 Binary files /dev/null and b/dockers/docker-platform-monitor/ssd_tools/iSmart differ diff --git a/dockers/docker-platform-monitor/start.sh.j2 b/dockers/docker-platform-monitor/start.sh.j2 new file mode 100644 index 00000000000..44f8f159f61 --- /dev/null +++ b/dockers/docker-platform-monitor/start.sh.j2 @@ -0,0 +1,73 @@ +#!/usr/bin/env bash + +declare -r EXIT_SUCCESS="0" + +mkdir -p /var/sonic +echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +# If this platform has synchronization script, run it +if [ -e /usr/share/sonic/platform/platform_wait ]; then + /usr/share/sonic/platform/platform_wait + EXIT_CODE="$?" + if [ "${EXIT_CODE}" != "${EXIT_SUCCESS}" ]; then + supervisorctl shutdown + exit "${EXIT_CODE}" + fi +fi + +# If this platform has an lm-sensors config file, copy it to it's proper place +# and start lm-sensors +if [ -e /usr/share/sonic/platform/sensors.conf ]; then + mkdir -p /etc/sensors.d + /bin/cp -f /usr/share/sonic/platform/sensors.conf /etc/sensors.d/ + supervisorctl start lm-sensors +fi + +# If this platform has a fancontrol config file, copy it to it's proper place +# and start fancontrol +if [ -e /usr/share/sonic/platform/fancontrol ]; then + # Remove stale pid file if it exists + rm -f /var/run/fancontrol.pid + + /bin/cp -f /usr/share/sonic/platform/fancontrol /etc/ + supervisorctl start fancontrol +fi + + +# If the sonic-platform package is not installed, try to install it +pip show sonic-platform > /dev/null 2>&1 +if [ $? -ne 0 ]; then + SONIC_PLATFORM_WHEEL="/usr/share/sonic/platform/sonic_platform-1.0-py2-none-any.whl" + echo "sonic-platform package not installed, attempting to install..." + if [ -e ${SONIC_PLATFORM_WHEEL} ]; then + pip install ${SONIC_PLATFORM_WHEEL} + if [ $? -eq 0 ]; then + echo "Successfully installed ${SONIC_PLATFORM_WHEEL}" + else + echo "Error: Failed to install ${SONIC_PLATFORM_WHEEL}" + fi + else + echo "Error: Unable to locate ${SONIC_PLATFORM_WHEEL}" + fi +fi + +{% if not skip_ledd %} +supervisorctl start ledd +{% endif %} + +{% if not skip_xcvrd %} +supervisorctl start xcvrd +{% endif %} + +{% if not skip_psud %} +supervisorctl start psud +{% endif %} + +{% if not skip_syseepromd %} +supervisorctl start syseepromd +{% endif %} + diff --git a/dockers/docker-ptf-saithrift/Dockerfile.j2 b/dockers/docker-ptf-saithrift/Dockerfile.j2 new file mode 100644 index 00000000000..3076de4878b --- /dev/null +++ b/dockers/docker-ptf-saithrift/Dockerfile.j2 @@ -0,0 +1,17 @@ +FROM docker-ptf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +COPY \ +{% for deb in docker_ptf_saithrift_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN dpkg -i \ +{% for deb in docker_ptf_saithrift_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +COPY ["*.ini", "/etc/ptf/"] diff --git a/dockers/docker-ptf-saithrift/brcm_interface_to_front_map.ini b/dockers/docker-ptf-saithrift/brcm_interface_to_front_map.ini new file mode 100644 index 00000000000..0db110025b8 --- /dev/null +++ b/dockers/docker-ptf-saithrift/brcm_interface_to_front_map.ini @@ -0,0 +1,33 @@ +# ptf host interface @ switch front port name +0@Ethernet0 +1@Ethernet4 +2@Ethernet8 +3@Ethernet12 +4@Ethernet16 +5@Ethernet20 +6@Ethernet24 +7@Ethernet28 +8@Ethernet32 +9@Ethernet36 +10@Ethernet40 +11@Ethernet44 +12@Ethernet48 +13@Ethernet52 +14@Ethernet56 +15@Ethernet60 +16@Ethernet64 +17@Ethernet68 +18@Ethernet72 +19@Ethernet76 +20@Ethernet80 +21@Ethernet84 +22@Ethernet88 +23@Ethernet92 +24@Ethernet96 +25@Ethernet100 +26@Ethernet104 +27@Ethernet108 +28@Ethernet112 +29@Ethernet116 +30@Ethernet120 +31@Ethernet124 diff --git a/dockers/docker-ptf-saithrift/msn_2700_interface_to_front_map.ini b/dockers/docker-ptf-saithrift/msn_2700_interface_to_front_map.ini new file mode 100644 index 00000000000..4421812aeef --- /dev/null +++ b/dockers/docker-ptf-saithrift/msn_2700_interface_to_front_map.ini @@ -0,0 +1,33 @@ +# ptf host interface @ switch front port name +0@Ethernet1 +1@Ethernet2 +2@Ethernet3 +3@Ethernet4 +4@Ethernet5 +5@Ethernet6 +6@Ethernet7 +7@Ethernet8 +8@Ethernet9 +9@Ethernet10 +10@Ethernet11 +11@Ethernet12 +12@Ethernet13 +13@Ethernet14 +14@Ethernet15 +15@Ethernet16 +16@Ethernet17 +17@Ethernet18 +18@Ethernet19 +19@Ethernet20 +20@Ethernet21 +21@Ethernet22 +22@Ethernet23 +23@Ethernet24 +24@Ethernet25 +25@Ethernet26 +26@Ethernet27 +27@Ethernet28 +28@Ethernet29 +29@Ethernet30 +30@Ethernet31 +31@Ethernet32 diff --git a/dockers/docker-ptf/Dockerfile.j2 b/dockers/docker-ptf/Dockerfile.j2 new file mode 100644 index 00000000000..326df49d976 --- /dev/null +++ b/dockers/docker-ptf/Dockerfile.j2 @@ -0,0 +1,126 @@ +{% if CONFIGURED_ARCH == "armhf" %} +FROM multiarch/debian-debootstrap:armhf-stretch +{% elif CONFIGURED_ARCH == "arm64" %} +FROM multiarch/debian-debootstrap:arm64-stretch +{% else %} +FROM debian:stretch +{% endif %} + +MAINTAINER Pavel Shirshov + +## Remove retired jessie-updates repo +RUN sed -i '/deb http:\/\/deb.debian.org\/debian jessie-updates main/d' /etc/apt/sources.list + +## Copy dependencies +COPY \ +{% for deb in docker_ptf_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +## Set the apt source, update package cache and install necessary packages +RUN sed --in-place 's/httpredir.debian.org/debian-archive.trafficmanager.net/' /etc/apt/sources.list \ + && apt-get update \ + && apt-get upgrade -y \ + && apt-get dist-upgrade -y \ + && apt-get install -y \ + openssh-server \ + vim \ + telnet \ + net-tools \ + traceroute \ + lsof \ + tcpdump \ + ethtool \ + unzip \ + pkg-config \ + binutils \ + net-tools \ + build-essential \ + libssl-dev \ + libffi-dev \ + wget \ + cmake \ + libqt5core5a \ + libqt5network5 \ + libboost-atomic1.62.0 \ + less \ + git \ + iputils-ping \ + hping3 \ + curl \ + tcpdump \ + tmux \ + python \ + python-dev \ + python-libpcap \ + python-scapy \ + python-six + +RUN dpkg -i \ +{% for deb in docker_ptf_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +# Install all python modules from pypi. python-scapy is exception, ptf debian package requires python-scapy +RUN rm -rf /debs \ + && apt-get -y autoclean \ + && apt-get -y autoremove \ + && rm -rf /var/lib/apt/lists/* \ + && wget --https-only https://bootstrap.pypa.io/get-pip.py \ + && python get-pip.py \ + && rm -f get-pip.py \ + && pip install setuptools \ + && pip install supervisor \ + && pip install ipython==5.4.1 \ + && git clone https://github.com/p4lang/scapy-vxlan.git \ + && cd scapy-vxlan \ + && python setup.py install \ + && cd .. \ + && rm -fr scapy-vxlan \ + && wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ + && tar xvfz 1.0.0.tar.gz \ + && cd nanomsg-1.0.0 \ + && mkdir -p build \ + && cd build \ + && cmake .. \ + && make install \ + && ldconfig \ + && cd ../.. \ + && rm -fr nanomsg-1.0.0 \ + && rm -f 1.0.0.tar.gz \ + && pip install cffi \ + && pip install nnpy \ + && pip install dpkt \ + && pip install ipaddress \ + && pip install pysubnettree \ + && pip install paramiko \ + && pip install flask \ + && pip install exabgp==3.4.17\ + && pip install pyaml \ + && mkdir -p /opt \ + && cd /opt \ + && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py + +## Adjust sshd settings +RUN mkdir /var/run/sshd \ + && echo 'root:root' | chpasswd \ + && sed -ri '/^#?PermitRootLogin/c\PermitRootLogin yes' /etc/ssh/sshd_config \ + && sed -ri '/^#?UsePAM/c\UsePAM no' /etc/ssh/sshd_config \ + && sed -ri '/^#?UseDNS/c\UseDNS no' /etc/ssh/sshd_config + +COPY ["supervisord.conf", "/etc/supervisor/"] +COPY ["conf.d/supervisord.conf", "conf.d/sshd.conf", "conf.d/ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] + +# Move tcpdump into /usr/bin Otherwise it's impossible to run tcpdump due to a docker bug +RUN mv /usr/sbin/tcpdump /usr/bin/tcpdump +RUN ln -s /usr/bin/tcpdump /usr/sbin/tcpdump + +RUN mkdir -p /var/log/supervisor + +EXPOSE 22 + +ENTRYPOINT ["/usr/local/bin/supervisord", "-c", "/etc/supervisor/supervisord.conf"] diff --git a/dockers/docker-ptf/conf.d/ptf_nn_agent.conf b/dockers/docker-ptf/conf.d/ptf_nn_agent.conf new file mode 100644 index 00000000000..6fb30d61d7c --- /dev/null +++ b/dockers/docker-ptf/conf.d/ptf_nn_agent.conf @@ -0,0 +1,10 @@ +[program:ptf_nn_agent] +command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 0@tcp://127.0.0.1:10900 -i 0-3@eth3 +process_name=ptf_nn_agent +stdout_logfile=/tmp/ptf_nn_agent.out.log +stderr_logfile=/tmp/ptf_nn_agent.err.log +redirect_stderr=false +autostart=true +autorestart=true +startsecs=1 +numprocs=1 diff --git a/docker-ptf/supervisord.conf b/dockers/docker-ptf/conf.d/sshd.conf similarity index 83% rename from docker-ptf/supervisord.conf rename to dockers/docker-ptf/conf.d/sshd.conf index 94559fd0785..8238e7762fb 100644 --- a/docker-ptf/supervisord.conf +++ b/dockers/docker-ptf/conf.d/sshd.conf @@ -1,6 +1,3 @@ -[supervisord] -nodaemon=true - [program:sshd] command=/usr/sbin/sshd -D process_name=sshd @@ -10,4 +7,4 @@ redirect_stderr=false autostart=true autorestart=true startsecs=1 -numprocs=1 \ No newline at end of file +numprocs=1 diff --git a/dockers/docker-ptf/conf.d/supervisord.conf b/dockers/docker-ptf/conf.d/supervisord.conf new file mode 100644 index 00000000000..54296b8b254 --- /dev/null +++ b/dockers/docker-ptf/conf.d/supervisord.conf @@ -0,0 +1,2 @@ +[supervisord] +nodaemon=true diff --git a/dockers/docker-ptf/supervisord.conf b/dockers/docker-ptf/supervisord.conf new file mode 100644 index 00000000000..be71d20a42d --- /dev/null +++ b/dockers/docker-ptf/supervisord.conf @@ -0,0 +1,28 @@ +; supervisor config file + +[unix_http_server] +file=/var/run/supervisor.sock ; (the path to the socket file) +chmod=0700 ; socket file mode (default 0700) + +[supervisord] +logfile=/var/log/supervisor/supervisord.log ; (main log file;default $CWD/supervisord.log) +pidfile=/var/run/supervisord.pid ; (supervisord pidfile;default supervisord.pid) +childlogdir=/var/log/supervisor ; ('AUTO' child log dir, default $TEMP) + +; the below section must remain in the config file for RPC +; (supervisorctl/web interface) to work, additional interfaces may be +; added by defining them in separate rpcinterface: sections +[rpcinterface:supervisor] +supervisor.rpcinterface_factory = supervisor.rpcinterface:make_main_rpcinterface + +[supervisorctl] +serverurl=unix:///var/run/supervisor.sock ; use a unix:// URL for a unix socket + +; The [include] section can just contain the "files" setting. This +; setting can list multiple files (separated by whitespace or +; newlines). It can also contain wildcards. The filenames are +; interpreted as relative to this file. Included files *cannot* +; include files themselves. + +[include] +files = /etc/supervisor/conf.d/*.conf diff --git a/dockers/docker-router-advertiser/Dockerfile.j2 b/dockers/docker-router-advertiser/Dockerfile.j2 new file mode 100644 index 00000000000..39e7b28effc --- /dev/null +++ b/dockers/docker-router-advertiser/Dockerfile.j2 @@ -0,0 +1,33 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +# Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +# Update apt's cache of available packages +RUN apt-get update + +{% if docker_router_advertiser_debs.strip() -%} +# Copy built Debian packages +{{ copy_files("debs/", docker_router_advertiser_debs.split(' '), "/debs/") }} + +# Install built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_router_advertiser_debs.split(' ')) }} +{%- endif %} + +# Clean up +RUN apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs + +COPY ["start.sh", "/usr/bin/"] +COPY ["docker-router-advertiser.supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["radvd.conf.j2", "wait_for_intf.sh.j2", "/usr/share/sonic/templates/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/dockers/docker-router-advertiser/critical_processes b/dockers/docker-router-advertiser/critical_processes new file mode 100644 index 00000000000..238a0346ac9 --- /dev/null +++ b/dockers/docker-router-advertiser/critical_processes @@ -0,0 +1 @@ +radvd diff --git a/dockers/docker-router-advertiser/docker-router-advertiser.supervisord.conf b/dockers/docker-router-advertiser/docker-router-advertiser.supervisord.conf new file mode 100644 index 00000000000..4ea84ab11c9 --- /dev/null +++ b/dockers/docker-router-advertiser/docker-router-advertiser.supervisord.conf @@ -0,0 +1,35 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-script] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:radvd] +command=/usr/sbin/radvd -n +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/dockers/docker-router-advertiser/radvd.conf.j2 b/dockers/docker-router-advertiser/radvd.conf.j2 new file mode 100644 index 00000000000..bc323977b13 --- /dev/null +++ b/dockers/docker-router-advertiser/radvd.conf.j2 @@ -0,0 +1,37 @@ +{% block banner %} +# =========== Managed by sonic-cfggen -- DO NOT edit manually! ==================== +# Generated by /usr/share/sonic/templates/radvd.conf.j2 using config DB data +# File: /etc/radvd.conf +# +{% endblock banner %} +# Config file for radvd, the router advertisement daemon +# See man page for radvd.conf for descriptions of all available options +# + +{# If our configuration has VLAN interfaces... #} +{% if VLAN_INTERFACE %} +{% for (name, prefix) in VLAN_INTERFACE|pfx_filter %} +{# If this VLAN has an IPv6 address... #} +{% if prefix | ipv6 %} +interface {{ name }} +{ + IgnoreIfMissing on; + AdvSendAdvert on; + MinRtrAdvInterval 200; + MaxRtrAdvInterval 600; + AdvManagedFlag on; + AdvOtherConfigFlag off; + AdvLinkMTU 9100; + AdvHomeAgentFlag off; + prefix {{ prefix | network }}/{{ prefix | prefixlen }} { + AdvOnLink on; + AdvAutonomous off; + AdvRouterAddr off; + AdvValidLifetime infinity; + AdvPreferredLifetime infinity; + }; +}; + +{% endif %} +{% endfor %} +{% endif %} diff --git a/dockers/docker-router-advertiser/start.sh b/dockers/docker-router-advertiser/start.sh new file mode 100755 index 00000000000..8d5f73a8bcb --- /dev/null +++ b/dockers/docker-router-advertiser/start.sh @@ -0,0 +1,32 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +# Router advertiser should only run on ToR (T0) devices +DEVICE_ROLE=$(sonic-cfggen -d -v "DEVICE_METADATA.localhost.type") +if [ "$DEVICE_ROLE" != "ToRRouter" ]; then + echo "Device role is not ToRRouter. Not starting router advertiser process." + exit 0 +fi + +# Generate /etc/radvd.conf config file +sonic-cfggen -d -t /usr/share/sonic/templates/radvd.conf.j2 > /etc/radvd.conf + +# Enusre at least one interface is specified in radvd.conf +NUM_IFACES=$(grep -c "^interface " /etc/radvd.conf) +if [ $NUM_IFACES -eq 0 ]; then + echo "No interfaces specified in radvd.conf. Not starting router advertiser process." + exit 0 +fi + +# Generate the script that waits for pertinent interfaces to come up and make it executable +sonic-cfggen -d -t /usr/share/sonic/templates/wait_for_intf.sh.j2 > /usr/bin/wait_for_intf.sh +chmod +x /usr/bin/wait_for_intf.sh + +# Wait for pertinent interfaces to come up +/usr/bin/wait_for_intf.sh + +# Start the router advertiser +supervisorctl start radvd diff --git a/dockers/docker-router-advertiser/wait_for_intf.sh.j2 b/dockers/docker-router-advertiser/wait_for_intf.sh.j2 new file mode 100644 index 00000000000..a044df0fc99 --- /dev/null +++ b/dockers/docker-router-advertiser/wait_for_intf.sh.j2 @@ -0,0 +1,32 @@ +#!/usr/bin/env bash + +STATE_DB_IDX="6" + +VLAN_TABLE_PREFIX="VLAN_TABLE" + +function wait_until_iface_ready +{ + TABLE_PREFIX=$1 + IFACE=$2 + + echo "Waiting until interface $IFACE is ready..." + + # Wait for the interface to come up + # (i.e., interface is present in STATE_DB and state is "ok") + while true; do + RESULT=$(redis-cli -n ${STATE_DB_IDX} HGET "${TABLE_PREFIX}|${IFACE}" "state" 2> /dev/null) + if [ x"$RESULT" == x"ok" ]; then + break + fi + + sleep 1 + done + + echo "Interface ${IFACE} is ready!" +} + + +# Wait for all interfaces to be up and ready +{% for (name, prefix) in VLAN_INTERFACE|pfx_filter %} +wait_until_iface_ready ${VLAN_TABLE_PREFIX} {{ name }} +{% endfor %} diff --git a/dockers/docker-sflow/Dockerfile.j2 b/dockers/docker-sflow/Dockerfile.j2 new file mode 100644 index 00000000000..75da64e02e4 --- /dev/null +++ b/dockers/docker-sflow/Dockerfile.j2 @@ -0,0 +1,35 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update && \ + apt-get install -f -y \ + dmidecode \ + libmnl0=1.0.4-2 + +{% if docker_sflow_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_sflow_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_sflow_debs.split(' ')) }} +{%- endif %} + +RUN apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs + +RUN sed -ri '/^DAEMON_ARGS=""/c DAEMON_ARGS="-c /var/log/hsflowd.crash"' /etc/init.d/hsflowd + +COPY ["start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/dockers/docker-sflow/base_image_files/psample b/dockers/docker-sflow/base_image_files/psample new file mode 100755 index 00000000000..0269eb6e5d0 --- /dev/null +++ b/dockers/docker-sflow/base_image_files/psample @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS sflow psample "$@" diff --git a/dockers/docker-sflow/base_image_files/sflowtool b/dockers/docker-sflow/base_image_files/sflowtool new file mode 100755 index 00000000000..26e5c7d967c --- /dev/null +++ b/dockers/docker-sflow/base_image_files/sflowtool @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS sflow sflowtool "$@" diff --git a/dockers/docker-sflow/critical_processes b/dockers/docker-sflow/critical_processes new file mode 100644 index 00000000000..5b24e2d8e1d --- /dev/null +++ b/dockers/docker-sflow/critical_processes @@ -0,0 +1 @@ +sflowmgrd diff --git a/dockers/docker-sflow/start.sh b/dockers/docker-sflow/start.sh new file mode 100755 index 00000000000..aaefb4d6d00 --- /dev/null +++ b/dockers/docker-sflow/start.sh @@ -0,0 +1,7 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +supervisorctl start sflowmgrd diff --git a/dockers/docker-sflow/supervisord.conf b/dockers/docker-sflow/supervisord.conf new file mode 100644 index 00000000000..50986f197d8 --- /dev/null +++ b/dockers/docker-sflow/supervisord.conf @@ -0,0 +1,34 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:sflowmgrd] +command=/usr/bin/sflowmgrd +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/dockers/docker-snmp-sv2/Dockerfile.j2 b/dockers/docker-snmp-sv2/Dockerfile.j2 new file mode 100644 index 00000000000..b62ff61eaf9 --- /dev/null +++ b/dockers/docker-snmp-sv2/Dockerfile.j2 @@ -0,0 +1,93 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +# Enable -O for all Python calls +ENV PYTHONOPTIMIZE 1 + +# Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +# Update apt's cache of available packages +# Install curl so we can download and install pip later +# Also install major root CA certificates for curl to reference +# Install gcc which is required for installing hiredis +# Install libdpkg-perl which is required for python3.6-3.6.0 as one of its specs i.e. no-pie-compile.specs +# The file referenced (`/usr/share/dpkg/no-pie-compile.specs`) is in the `libdpkg-perl` package on Debian +RUN apt-get update && \ + apt-get install -y \ + curl \ + ca-certificates \ + gcc \ + make \ + libdpkg-perl \ + ipmitool + +{% if docker_snmp_sv2_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_snmp_sv2_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_snmp_sv2_debs.split(' ')) }} +{%- endif %} + +# Fix for hiredis compilation issues for ARM +# python will throw for missing locale +RUN apt-get install -y locales +RUN locale-gen "en_US.UTF-8" +RUN dpkg-reconfigure --frontend noninteractive locales +ENV LC_CTYPE=en_US.UTF-8 +RUN sed -i '/^#.* en_US.* /s/^#//' /etc/locale.gen +RUN locale-gen + +# Install up-to-date version of pip +RUN curl https://bootstrap.pypa.io/get-pip.py | python3.6 + +# Install pyyaml dependency for use by some plugins +# Install smbus dependency for use by some plugins +RUN python3.6 -m pip install --no-cache-dir \ + hiredis \ + pyyaml \ + smbus + +{% if docker_snmp_sv2_whls.strip() -%} +# Copy locally-built Python wheel dependencies +{{ copy_files("python-wheels/", docker_snmp_sv2_whls.split(' '), "/python-wheels/") }} + +# Install locally-built Python wheel dependencies +{{ install_python_wheels(docker_snmp_sv2_whls.split(' ')) }} +{% endif %} + +RUN python3.6 -m sonic_ax_impl install + +# Clean up +RUN apt-get -y purge \ + libpython3.6-dev \ + libpython3.6 \ + curl \ + gcc \ + make \ + libdpkg-perl \ + # Note: these packages should be removed with autoremove but actually not, so explicitly purged + libldap-2.4-2 \ + libsasl2-2 \ + libsasl2-modules \ + libsasl2-modules-db && \ + apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y --purge && \ + find / | grep -E "__pycache__" | xargs rm -rf && \ + rm -rf /debs /python-wheels ~/.cache + +COPY ["start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["*.j2", "/usr/share/sonic/templates/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor"] + +# Although exposing ports is not needed for host net mode, keep it for possible bridge mode +EXPOSE 161/udp 162/udp + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/dockers/docker-snmp-sv2/critical_processes b/dockers/docker-snmp-sv2/critical_processes new file mode 100644 index 00000000000..e6039c5b984 --- /dev/null +++ b/dockers/docker-snmp-sv2/critical_processes @@ -0,0 +1,2 @@ +snmpd +snmp-subagent diff --git a/dockers/docker-snmp-sv2/snmpd.conf.j2 b/dockers/docker-snmp-sv2/snmpd.conf.j2 new file mode 100644 index 00000000000..16d7e5bff79 --- /dev/null +++ b/dockers/docker-snmp-sv2/snmpd.conf.j2 @@ -0,0 +1,161 @@ +############################################################################### +# Managed by sonic-config-engine +############################################################################### +# +# EXAMPLE.conf: +# An example configuration file for configuring the Net-SNMP agent ('snmpd') +# See the 'snmpd.conf(5)' man page for details +# +# Some entries are deliberately commented out, and will need to be explicitly activated +# +############################################################################### +# +# AGENT BEHAVIOUR +# + +# Listen for connections on all ip addresses, including eth0, ipv4 lo +# +{% if snmp_agent_address_1 or snmp_agent_address_2 or snmp_agent_address_3 %} +{% if snmp_agent_address_1 %} +agentAddress {{ snmp_agent_address_1 }} +{% endif %} +{% if snmp_agent_address_2 %} +agentAddress {{ snmp_agent_address_2 }} +{% endif %} +{% if snmp_agent_address_3 %} +agentAddress {{ snmp_agent_address_3 }} +{% endif %} +{% else %} +agentAddress udp:161 +agentAddress udp6:161 +{% endif %} + +############################################################################### +# +# ACCESS CONTROL +# + + # system + hrSystem groups only +view systemonly included .1.3.6.1.2.1.1 +view systemonly included .1.3.6.1.2.1.25.1 + + # Default access to basic system info +{% if snmp_rocommunities %} +{% for community in snmp_rocommunities %} +rocommunity {{ community }} +rocommunity6 {{ community }} +{% endfor %} +{% else %} +rocommunity {{ snmp_rocommunity }} +rocommunity6 {{ snmp_rocommunity }} +{% endif %} + +############################################################################### +# +# SYSTEM INFORMATION +# + +# Note that setting these values here, results in the corresponding MIB objects being 'read-only' +# See snmpd.conf(5) for more details +sysLocation {{ snmp_location }} +sysContact Azure Cloud Switch vteam + # Application + End-to-End layers +sysServices 72 + + +# +# Process Monitoring +# +# todo: should we enable snmp based monitoring of sswsyncd and other processes? + +# At least one 'sendmail' process, but no more than 10 +#proc sendmail 10 1 + +# Walk the UCD-SNMP-MIB::prTable to see the resulting output +# Note that this table will be empty if there are no "proc" entries in the snmpd.conf file + + +# +# Disk Monitoring +# + # 10MBs required on root disk, 5% free on /var, 10% free on all other disks +disk / 10000 +disk /var 5% +includeAllDisks 10% + +# Walk the UCD-SNMP-MIB::dskTable to see the resulting output +# Note that this table will be empty if there are no "disk" entries in the snmpd.conf file + + +# +# System Load +# + # Unacceptable 1-, 5-, and 15-minute load averages +load 12 10 5 + +# Walk the UCD-SNMP-MIB::laTable to see the resulting output +# Note that this table *will* be populated, even without a "load" entry in the snmpd.conf file + + + +############################################################################### +# +# ACTIVE MONITORING +# +# Note: disabled snmp traps due to side effect of causing snmpd to listen on all ports (0.0.0.0) +# +# send SNMPv1 traps +{%if v1_trap_dest and v1_trap_dest != 'NotConfigured' %} +trapsink {{ v1_trap_dest }} +{% else %} +#trapsink localhost public +{% endif %} +# send SNMPv2c traps +{%if v2_trap_dest and v2_trap_dest != 'NotConfigured' %} +trap2sink {{ v2_trap_dest }} +{% else %} +#trap2sink localhost public +{% endif %} +# send SNMPv2c INFORMs +{%if v3_trap_dest and v3_trap_dest != 'NotConfigured' %} +informsink {{ v3_trap_dest }} +{% else %} +#informsink localhost public +{% endif %} + +# Note that you typically only want *one* of these three lines +# Uncommenting two (or all three) will result in multiple copies of each notification. + + +# +# Event MIB - automatically generate alerts +# +# Remember to activate the 'createUser' lines above +#iquerySecName internalUser +#rouser internalUser +# generate traps on UCD error conditions +#defaultMonitors yes +#note, this release of snmpd does not support linkUpDownNotifications +# generate traps on linkUp/Down +#linkUpDownNotifications yes + + +# +# AgentX Sub-agents +# + # Run as an AgentX master agent +master agentx +# internal socket to allow extension to other docker containers +# Currently the other container using this is docker-fpm-frr +# make sure this line matches bgp:/etc/snmp/frr.conf +# please see testing procedure in the same file to verify this works +# to verify the SNMP docker side look for the following string in the log file: +# INFO snmp-subagent [ax_interface] INFO: Using agentx socket type tcp with path tcp:localhost:3161 +# INFO supervisord snmp-subagent INFO:ax_interface:Using agentx socket type tcp with path tcp:localhost:3161 +agentxsocket tcp:localhost:3161 + +# +# SysDescription pass-through +# + +pass -p 10 .1.3.6.1.2.1.1.1 /usr/share/snmp/sysDescr_pass.py diff --git a/dockers/docker-snmp-sv2/start.sh b/dockers/docker-snmp-sv2/start.sh new file mode 100755 index 00000000000..786968cf9d9 --- /dev/null +++ b/dockers/docker-snmp-sv2/start.sh @@ -0,0 +1,27 @@ +#!/usr/bin/env bash + +mkdir -p /etc/ssw +sonic-cfggen -d -y /etc/sonic/sonic_version.yml -t /usr/share/sonic/templates/sysDescription.j2 > /etc/ssw/sysDescription + +mkdir -p /etc/snmp +sonic-cfggen -d -y /etc/sonic/snmp.yml -t /usr/share/sonic/templates/snmpd.conf.j2 > /etc/snmp/snmpd.conf + +mkdir -p /var/sonic +echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status + +CURRENT_HOSTNAME=`hostname` +HOSTNAME=`sonic-cfggen -d -v DEVICE_METADATA[\'localhost\'][\'hostname\']` + +if [ "$?" == "0" ] && [ "$HOSTNAME" != "" ]; then + echo $HOSTNAME > /etc/hostname + hostname -F /etc/hostname + + sed -i "/\s$CURRENT_HOSTNAME$/d" /etc/hosts + echo "127.0.0.1 $HOSTNAME" >> /etc/hosts +fi + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd +supervisorctl start snmpd +supervisorctl start snmp-subagent diff --git a/dockers/docker-snmp-sv2/supervisord.conf b/dockers/docker-snmp-sv2/supervisord.conf new file mode 100644 index 00000000000..7fd16eec5bb --- /dev/null +++ b/dockers/docker-snmp-sv2/supervisord.conf @@ -0,0 +1,42 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=unexpected +stdout_logfile=syslog +stderr_logfile=syslog + +[program:snmpd] +command=/usr/sbin/snmpd -f -LS4d -u Debian-snmp -g Debian-snmp -I -smux,mteTrigger,mteTriggerConf,ifTable,ifXTable,inetCidrRouteTable,ipCidrRouteTable,ip,disk_hw -p /run/snmpd.pid +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:snmp-subagent] +command=/usr/bin/env python3.6 -m sonic_ax_impl +priority=4 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/dockers/docker-snmp-sv2/sysDescription.j2 b/dockers/docker-snmp-sv2/sysDescription.j2 new file mode 100644 index 00000000000..207a8bf7de9 --- /dev/null +++ b/dockers/docker-snmp-sv2/sysDescription.j2 @@ -0,0 +1 @@ +SONiC Software Version: SONiC.{{ build_version }} - HwSku: {{ DEVICE_METADATA['localhost']['hwsku'] }} - Distribution: Debian {{ debian_version }} - Kernel: {{ kernel_version }} diff --git a/dockers/docker-sonic-mgmt/Dockerfile.j2 b/dockers/docker-sonic-mgmt/Dockerfile.j2 new file mode 100644 index 00000000000..d24df1ca5d7 --- /dev/null +++ b/dockers/docker-sonic-mgmt/Dockerfile.j2 @@ -0,0 +1,133 @@ +FROM ubuntu:16.04 + +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update +RUN apt-get install -y \ + openssh-server \ + gcc \ + vim \ + make \ + git \ + sudo \ + python \ + python-dev \ + python-cffi \ + libffi-dev \ + libssl-dev \ + sshpass \ + libxml2 \ + libxslt1-dev \ + python-setuptools \ + build-essential \ + curl \ + cmake \ + tcpdump \ + python-dev \ + python-scapy + +# For JNLP launcher +RUN apt-get install -y default-jre + +# For syslog test +RUN apt-get install -y rsyslog psmisc + +# Remove cffi 1.5.2, will install 1.10.0 by pip later +RUN apt-get purge -y python-cffi python-cffi-backend +# Remove pycparser 2.14, will install >=2.17 by pip later +RUN apt-get purge -y python-ply python-pycparser + +RUN easy_install pip + +RUN pip install ipaddr \ + lxml \ + netaddr \ + natsort \ + six \ + pexpect \ + pyasn1==0.1.9 \ + pysnmp==4.2.5 \ + jinja2==2.7.2 \ + cffi==1.10.0 \ + paramiko==2.1.2 \ + passlib \ + ipython==5.4.1 \ + && git clone https://github.com/p4lang/scapy-vxlan.git \ + && cd scapy-vxlan \ + && python setup.py install \ + && cd .. \ + && rm -fr scapy-vxlan \ + && wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ + && tar xvfz 1.0.0.tar.gz \ + && cd nanomsg-1.0.0 \ + && mkdir -p build \ + && cd build \ + && cmake .. \ + && make install \ + && ldconfig \ + && cd ../.. \ + && rm -fr nanomsg-1.0.0 \ + && rm -f 1.0.0.tar.gz \ + && pip install nnpy \ + && pip install dpkt + +# Install Microsoft Azure Kusto Library for Python +RUN pip install azure-kusto-data==0.0.13 \ + azure-kusto-ingest==0.0.13 + +# Install pytest-ansible module +RUN pip install pytest-ansible==2.2.2 + +## Copy and install sonic-mgmt docker dependencies +COPY \ +{% for deb in docker_sonic_mgmt_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN dpkg -i \ +{% for deb in docker_sonic_mgmt_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +RUN pip install ansible==2.8.7 + +RUN mkdir /var/run/sshd +EXPOSE 22 + +# Add user +ARG user +ARG uid +ARG guid +ARG hostname + +ENV BUILD_HOSTNAME $hostname +ENV USER $user + +RUN groupadd -f -r -g $guid g$user + +RUN useradd $user -l -u $uid -g $guid -d /var/$user -m -s /bin/bash + +COPY sonic-jenkins.pub /var/$user/.ssh/authorized_keys2 + +RUN echo "Host *\n\tStrictHostKeyChecking no\n" > /var/$user/.ssh/config +RUN chown $user /var/$user/.ssh -R +RUN chmod go= /var/$user/.ssh -R + +# Add user to sudoers +RUN echo "$user ALL=(ALL) NOPASSWD:ALL" >>/etc/sudoers + +USER $user + +# Install Azure CLI +WORKDIR /var/$user +RUN curl -L https://aka.ms/InstallAzureCliBundled -o azure-cli_bundle.tar.gz +RUN tar -xvzf azure-cli_bundle.tar.gz +RUN azure-cli_bundle_*/installer + +# Known bug: azure keyvault cannot work behind a proxy +# Temporary fix: upgrade the azure-keyvault package within az cli +# TODO: if azure-cli contains newer version azure-keyvault, remove this +RUN ~/lib/azure-cli/bin/python -m pip install azure-keyvault==0.3.7 -U + +RUN git clone https://github.com/Azure/sonic-mgmt diff --git a/dockers/docker-sonic-mgmt/sonic-jenkins.pub b/dockers/docker-sonic-mgmt/sonic-jenkins.pub new file mode 100644 index 00000000000..8cbd97ce8c5 --- /dev/null +++ b/dockers/docker-sonic-mgmt/sonic-jenkins.pub @@ -0,0 +1 @@ +ssh-rsa AAAAB3NzaC1yc2EAAAADAQABAAABAQDEJhhzQtlgNkBWxWXNm/qxZC26pFC16uOdGMx7BfMP9KxpKB46sFO5nkZXh8CiyjHitks2BYjbrK2IYubiyQhHaKh+4mnCnO58GLRRAiCUzeaC1jSrmqseBN8ZN7UV7gZUWQOxHErUHVhTbujUR0eZLymwPV0bNO9/bAWR5a+l5l/kf3VMREHF5Z6KyIuA9fT9XUJz8wLEUZCC8Id9RGwmKHS4FYuwtvcYm1MKb+ULXlri5o25G/X3I1pBpU/xUPBDUu+g3cIavrl7wVVGbIXYcYoH5qrTycMY0Y3rLBxu9SECUCqIxhnKQsiv+iXZSibnUXT4r6HcLMej5e+o1Jx3 lgh@jenkins-master-phx diff --git a/dockers/docker-sonic-telemetry/Dockerfile.j2 b/dockers/docker-sonic-telemetry/Dockerfile.j2 new file mode 100644 index 00000000000..3a5716001ca --- /dev/null +++ b/dockers/docker-sonic-telemetry/Dockerfile.j2 @@ -0,0 +1,41 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update && \ + apt-get install -f -y \ + libdbus-1-3 \ + libdaemon0 \ + libjansson4 \ + # Install redis-tools dependencies + # TODO: implicitly install dependencies + libatomic1 \ + libjemalloc1 \ + liblua5.1-0 \ + lua-bitop \ + lua-cjson + +{% if docker_sonic_telemetry_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_sonic_telemetry_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_sonic_telemetry_debs.split(' ')) }} +{%- endif %} + +RUN apt-get clean -y && \ + apt-get autoclean - && \ + apt-get autoremove -y && \ + rm -rf /debs + +COPY ["start.sh", "telemetry.sh", "dialout.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/dockers/docker-sonic-telemetry/critical_processes b/dockers/docker-sonic-telemetry/critical_processes new file mode 100644 index 00000000000..d6953dd0c88 --- /dev/null +++ b/dockers/docker-sonic-telemetry/critical_processes @@ -0,0 +1,2 @@ +telemetry +dialout diff --git a/dockers/docker-sonic-telemetry/dialout.sh b/dockers/docker-sonic-telemetry/dialout.sh new file mode 100755 index 00000000000..8683e8edae8 --- /dev/null +++ b/dockers/docker-sonic-telemetry/dialout.sh @@ -0,0 +1,6 @@ +#!/usr/bin/env bash + +# Start with default config + +exec /usr/sbin/dialout_client_cli -insecure -logtostderr -v 2 + diff --git a/dockers/docker-sonic-telemetry/start.sh b/dockers/docker-sonic-telemetry/start.sh new file mode 100755 index 00000000000..b307e387d55 --- /dev/null +++ b/dockers/docker-sonic-telemetry/start.sh @@ -0,0 +1,11 @@ +#!/usr/bin/env bash + +mkdir -p /var/sonic +echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +supervisorctl start telemetry +supervisorctl start dialout diff --git a/dockers/docker-sonic-telemetry/supervisord.conf b/dockers/docker-sonic-telemetry/supervisord.conf new file mode 100644 index 00000000000..b6a01de58a7 --- /dev/null +++ b/dockers/docker-sonic-telemetry/supervisord.conf @@ -0,0 +1,42 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=always +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=true +stdout_logfile=syslog +stderr_logfile=syslog + +[program:telemetry] +command=/usr/bin/telemetry.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:dialout] +command=/usr/bin/dialout.sh +priority=4 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/dockers/docker-sonic-telemetry/telemetry.sh b/dockers/docker-sonic-telemetry/telemetry.sh new file mode 100755 index 00000000000..8cfd8a531cc --- /dev/null +++ b/dockers/docker-sonic-telemetry/telemetry.sh @@ -0,0 +1,49 @@ +#!/usr/bin/env bash + +# Try to read telemetry and x509 config from ConfigDB. +# Use default value if no valid config exists +X509=`sonic-cfggen -d -v "DEVICE_METADATA['x509']"` +TELEMETRY=`sonic-cfggen -d -v 'TELEMETRY.keys() | join(" ") if TELEMETRY'` + +TELEMETRY_ARGS=" -logtostderr" + +if [ -n "$X509" ]; then + SERVER_CRT=`sonic-cfggen -d -v "DEVICE_METADATA['x509']['server_crt']"` + SERVER_KEY=`sonic-cfggen -d -v "DEVICE_METADATA['x509']['server_key']"` + if [ -z $SERVER_CRT ] || [ -z $SERVER_KEY ]; then + TELEMETRY_ARGS+=" --insecure" + else + TELEMETRY_ARGS+=" --server_crt $SERVER_CRT --server_key $SERVER_KEY " + fi +else + TELEMETRY_ARGS+=" --insecure" +fi + +if [ -n "$X509" ]; then + CA_CRT=`sonic-cfggen -d -v "DEVICE_METADATA['x509']['ca_crt']"` + if [ ! -z $CA_CRT ]; then + TELEMETRY_ARGS+=" --ca_crt $CA_CRT" + fi +fi + +# If no configuration entry exists for TELEMETRY, create one default port +if [ -z $TELEMETRY ]; then + redis-cli -n 4 hset "TELEMETRY|gnmi" port 8080 +fi + +PORT=`sonic-cfggen -d -v "TELEMETRY['gnmi']['port']"` +TELEMETRY_ARGS+=" --port $PORT" + +CLIENT_AUTH=`sonic-cfggen -d -v "TELEMETRY['gnmi']['client_auth']"` +if [ -z $CLIENT_AUTH ] || [ $CLIENT_AUTH == "false" ]; then + TELEMETRY_ARGS+=" --allow_no_client_auth" +fi + +LOG_LEVEL=`sonic-cfggen -d -v "TELEMETRY['gnmi']['log_level']"` +if [ ! -z $LOG_LEVEL ]; then + TELEMETRY_ARGS+=" -v=$LOG_LEVEL" +else + TELEMETRY_ARGS+=" -v=2" +fi + +exec /usr/sbin/telemetry ${TELEMETRY_ARGS} diff --git a/dockers/docker-teamd/Dockerfile.j2 b/dockers/docker-teamd/Dockerfile.j2 new file mode 100644 index 00000000000..fc8626e7722 --- /dev/null +++ b/dockers/docker-teamd/Dockerfile.j2 @@ -0,0 +1,42 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update && \ + apt-get install -f -y \ + libdbus-1-3 \ + libdaemon0 \ + libjansson4 \ + libpython2.7 \ + # Install redis-tools dependencies + # TODO: implicitly install dependencies + libatomic1 \ + libjemalloc1 \ + liblua5.1-0 \ + lua-bitop \ + lua-cjson + +{% if docker_teamd_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_teamd_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_teamd_debs.split(' ')) }} +{%- endif %} + +RUN apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs + +COPY ["start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/dockers/docker-teamd/base_image_files/teamdctl b/dockers/docker-teamd/base_image_files/teamdctl new file mode 100755 index 00000000000..615bc3d953f --- /dev/null +++ b/dockers/docker-teamd/base_image_files/teamdctl @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS teamd teamdctl "$@" diff --git a/dockers/docker-teamd/critical_processes b/dockers/docker-teamd/critical_processes new file mode 100644 index 00000000000..b5c543df050 --- /dev/null +++ b/dockers/docker-teamd/critical_processes @@ -0,0 +1,2 @@ +teammgrd +teamsyncd diff --git a/dockers/docker-teamd/start.sh b/dockers/docker-teamd/start.sh new file mode 100755 index 00000000000..4cbc65ab0cc --- /dev/null +++ b/dockers/docker-teamd/start.sh @@ -0,0 +1,12 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid +rm -f /var/run/teamd/* + +mkdir -p /var/warmboot/teamd + +supervisorctl start rsyslogd + +supervisorctl start teammgrd + +supervisorctl start teamsyncd diff --git a/dockers/docker-teamd/supervisord.conf b/dockers/docker-teamd/supervisord.conf new file mode 100644 index 00000000000..3a420e0fcdc --- /dev/null +++ b/dockers/docker-teamd/supervisord.conf @@ -0,0 +1,42 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=unexpected +stdout_logfile=syslog +stderr_logfile=syslog + +[program:teammgrd] +command=/usr/bin/teammgrd +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:teamsyncd] +command=/usr/bin/teamsyncd +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/dockers/dockerfile-macros.j2 b/dockers/dockerfile-macros.j2 new file mode 100644 index 00000000000..408ee9fec62 --- /dev/null +++ b/dockers/dockerfile-macros.j2 @@ -0,0 +1,18 @@ +{% macro install_debian_packages(packages) -%} +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; \ + {%- for deb in packages %} + dpkg_apt /debs/{{ deb }} {%- if not loop.last %} && \ {%- endif %} + {%- endfor %} +{%- endmacro %} + +{% macro install_python_wheels(packages) -%} +RUN cd /python-wheels/ && pip install {{ packages | join(' ') }} +{%- endmacro %} + +{% macro copy_files(prefix, files, dest) -%} +COPY \ + {%- for file in files %} + {{ prefix }}/{{ file }} \ + {%- endfor %} + {{ dest }} +{%- endmacro %} diff --git a/files/Aboot/boot0 b/files/Aboot/boot0 deleted file mode 100644 index 98522bdfe64..00000000000 --- a/files/Aboot/boot0 +++ /dev/null @@ -1,55 +0,0 @@ -# Copyright (C) 2016 Arista Networks, Inc. -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . - -# Aboot stage 0 boot - -set -x - -bootconfigvars="SWI SWI_COPY POST_LEVEL CONSOLESPEED PASSWORD NETDEV NETAUTO NETIP NETMASK NETGW NETDOMAIN NETDNS NETHW memtest" - -parseenvironmentconfig() { - for n in ${bootconfigvars}; do - eval v="\$$n" - if [ "$v" ]; then - echo "$n=$v" - fi - done -} - -kernel=boot/vmlinuz-3.16.0-4-amd64 -initrd=boot/initrd.img-3.16.0-4-amd64 - -TARGET_PATH=/mnt/flash -if [ -d "${swipath}" ]; then - # Not expect a directory name for swipath - exit 1 -fi - -## Determine whether installing by hash file in the image -GIT_REVISION=$(unzip -p ${swipath} .imagehash) -LOCAL_IMAGEHASH=$(cat $TARGET_PATH/.imagehash 2>/dev/null || true) -if [ "$GIT_REVISION" != "$LOCAL_IMAGEHASH" ]; then - unzip -oq ${swipath} -x boot0 -d ${TARGET_PATH} -fi - -echo "${append}" >/tmp/append -parseenvironmentconfig >>/tmp/append -cat /etc/cmdline | sed "/^\(${bootconfigvars// /\|}\|crashkernel\|loglevel\|ignore_loglevel\)\(\$\|=\)/d;/^\$/d" >>/tmp/append - -echo "root=/dev/sda1 rw loop=fs.squashfs loopfstype=squashfs apparmor=1 security=apparmor quiet" >>/tmp/append - -kexec --load --initrd=${TARGET_PATH}/${initrd} --append="$(tr '\n' ' ' . + +# Aboot stage 0 boot script +# +# This boot0 script can be used in different scenario +# - Installation and boot from Aboot (manual or reboot on a new image) +# - EOS to SONiC fast-reboot (installation and kexec in EOS) +# - SONiC to SONiC fast-reboot (installation and kexec in SONiC) +# +# Use it this way: +# - swipath=path/to/swi install=true boot0 +# - swipath=path/to/swi install=true force=true boot0 +# - swipath=path/to/swi kexec=true boot0 +# +# The logic defaults to the first scenario but providing extra environment variable +# will affect the behavior of the script. +# The list of variables is maintained here +# - KERNEL : relative path to the kernel to execute +# - INITRD : relative path to the initrd to load +# - CMDLINE : place to find the default kernel cmdline to use for the platform +# - VERBOSE : setting it to 1 will enable debug traces +# +# By default the boot0 script will behave for an Aboot based behavior. +# Options can be provided to only run some features of this script. +# +# Extra kernel parameters can be provided at runtime by the user by adding them +# into a kernel-params file. + +image_name="image-%%IMAGE_VERSION%%" +dockerfs="{{ FILESYSTEM_DOCKERFS }}" + +do_not_clean="do-not-clean" +kernel_params="kernel-params" + +aboot_machine="arista_unknown" + +info() { printf "%04.2f: $@\n" "$(cut -f1 -d' ' /proc/uptime)"; } +err() { info "Error: $@"; } +warn() { info "Warning: $@"; } + +# extract mount point from the swi path, e.g., /mnt/flash/sonic.swi --> /mnt/flash +if [ -z "$target_path" ]; then + if [ -z "$swipath" ]; then + err "target_path= is required when swipath= is not provided" + exit 1 + fi + target_path=$(df "$swipath" | tail -1 | tr -s " " | cut -d ' ' -f6) +fi +image_path="$target_path/$image_name" +hook_path="$image_path/platform/hooks" +data_path="$image_path/platform/data" + +cmdline_base="$target_path/kernel-params-base" +cmdline_image="$image_path/kernel-cmdline" +boot_config="$target_path/boot-config" + +swi_tmpfs="/tmp/tmp-swi" + +bootconfigvars="KERNEL INITRD CONSOLESPEED PASSWORD NETDEV NETAUTO NETIP NETMASK NETGW NETDOMAIN NETDNS NETHW memtest" +flash_re=" /mnt/flash| /host" + +# for backward compatibility with the sonic_upgrade= behavior +install="${install:-${sonic_upgrade:-}}" + +parse_environment_config() { + for n in ${bootconfigvars}; do + eval v="\$$n" + if [ "$v" ]; then + echo "$n=$v" + fi + done +} + +clean_flash() { + ## Remove all the other unnecssary files except swi file, boot-config + for f in $(ls -A $target_path); do + if [ $f != "${swipath##*/}" ] && + [ $f != "boot-config" ] && + [ $f != "$kernel_params" ] && + [ $f != "$cmdline_base" ] && + [ $f != "aquota.user" ] && + [ $f != "old_config" ] && + [ $f != "minigraph.xml" ] && + [ $f != "snmp.yml" ] && + [ $f != "acl.json" ] + then + rm -rf "$target_path/$f" + fi + done +} + +update_boot_config() { + local key="$1" + local value="$2" + + if grep "$key" "$boot_config" 2>&1 > /dev/null; then + sed -i "s#^$key=.*\$#$key=$value#" "$boot_config" + else + echo "$key=$value" >> "$boot_config" + fi +} + +get_boot_config() { + local key="$1" + + sed -n "s#^$key=##p" "$boot_config" || : +} + +update_next_boot() { + local default="$(get_boot_config SWI_DEFAULT)" + + if [ -z "$default" ]; then + warn "boot-config has no variable SWI_DEFAULT" + else + update_boot_config SWI "$default" + fi +} + +move_swi_to_tmpfs() { + local oldswi="$1" + local newswi="$swi_tmpfs/$(basename $oldswi)" + + mkdir -p "$swi_tmpfs" + if ! $in_aboot && ! mount | grep -q ' /tmp type tmpfs'; then + # mount a real tmpfs on /tmp/tmp-swi if /tmp is not one already. + mount -t tmpfs tmp-swi "$swi_tmpfs" + fi + + mv "$oldswi" "$newswi" + echo "$newswi" +} + +cleanup_swi_tmpfs() { + rm -f "$swipath" + if mount | grep -q "$swi_tmpfs"; then + umount "$swi_tmpfs" || : + fi +} + +extract_image() { + mkdir -p "$image_path" + + info "Moving swi to a tmpfs" + ## Avoid problematic flash usage spike on older systems, also improves I/O + swipath="$(move_swi_to_tmpfs $swipath)" + + info "Extracting swi content" + ## Unzip the image except boot0 and dockerfs archive + unzip -oq "$swipath" -x boot0 "$dockerfs" -d "$image_path" + + ## detect rootfs type + rootfs_type=`grep " $target_path " /proc/mounts | cut -d' ' -f3` + + info "Extracting $dockerfs from swi" + ## Unpacking dockerfs delayed + ## 1. when disk is vfat as it does not support symbolic link + ## 2. when disk is small, expand it into ramfs during initrd + if [ "$rootfs_type" != "vfat" -a x"$docker_inram" != x"on" ]; then + mkdir -p "$image_path/{{ DOCKERFS_DIR }}" + + if [ -n "$install" ]; then + TAR_EXTRA_OPTION="--numeric-owner --warning=no-timestamp" + fi + + ## extract docker archive + unzip -oqp "$swipath" "$dockerfs" | tar xzf - -C "$image_path/{{ DOCKERFS_DIR }}" $TAR_EXTRA_OPTION + else + ## save dockerfs archive in the image directory + unzip -oq "$swipath" "$dockerfs" -d "$image_path" + info "Unpacking $dockerfs delayed to initrd because $target_path is $rootfs_type or docker_inram is on" + fi + + ## remove installer since it's not needed anymore + info "Remove installer" + cleanup_swi_tmpfs + + ## use new reduced-size boot swi + local swi_boot_path="flash:$image_name/{{ ABOOT_BOOT_IMAGE }}" + update_boot_config SWI "$swi_boot_path" + update_boot_config SWI_DEFAULT "$swi_boot_path" + + ## sync disk operations + sync +} + +write_machine_config() { + ## Detect SKU and create a hardware description file + aboot_version=$(grep ^Aboot "$cmdline_base" | sed 's/^.*norcal.-//' | tail -n 1) + if [ -x /bin/sysinit ]; then + aboot_build_date=$(stat -c %y /bin/sysinit | sed 's/ /T/') + else + aboot_build_date="unknown" + fi + cat < ${target_path}/machine.conf +aboot_version=$aboot_version +aboot_vendor=arista +aboot_platform=x86_64-$aboot_machine +aboot_machine=$aboot_machine +aboot_arch=x86_64 +aboot_build_date=$aboot_build_date +EOF + chmod a+r "${target_path}/machine.conf" +} + +platform_specific() { + local platform="$(grep -Eo 'platform=[^ ]+' "$cmdline_base" | cut -f2 -d=)" + local sid="$(grep -Eo 'sid=[^ ]+' "$cmdline_base" | cut -f2 -d=)" + + # set varlog size to 100MB + local varlog_size=100 + + # detect the size of the flash partition from name in Aboot/EOS/SONiC + local flash_size=$(($(df | grep -E "$flash_re" | tr -s ' ' | cut -f2 -d' ') / 1000)) + + if [ "$platform" = "raven" ]; then + aboot_machine=arista_7050_qx32 + flash_size=2000 + docker_inram=on + echo "modprobe.blacklist=radeon,sp5100_tco acpi=off docker_inram=on" >>/tmp/append + fi + if [ "$platform" = "crow" ]; then + aboot_machine=arista_7050_qx32s + flash_size=3700 + echo "modprobe.blacklist=radeon,sp5100_tco" >>/tmp/append + fi + if [ "$sid" = "Upperlake" ] || [ "$sid" = "UpperlakeES" ] || + [ "$sid" = "UpperlakeSsd" ]; then + aboot_machine=arista_7060_cx32s + flash_size=3700 + echo "amd_iommu=off" >> /tmp/append + fi + if [ "$sid" = "Gardena" ] || [ "$sid" = "GardenaSsd" ]; then + aboot_machine=arista_7260cx3_64 + flash_size=28000 + fi + if [ "$sid" = "Alhambra" ] || [ "$sid" = "AlhambraSsd" ]; then + aboot_machine=arista_7170_64c + flash_size=28000 + echo "hugepages=128" >> /tmp/append + fi + if [ "$sid" = "BlackhawkO" ]; then + aboot_machine=arista_7060px4_32 + flash_size=28000 + fi + if [ "$sid" = "BlackhawkDD" ]; then + aboot_machine=arista_7060dx4_32 + flash_size=28000 + fi + if [ "$sid" = "Smartsville" ] || [ "$sid" = "SmartsvilleSsd" ]; then + aboot_machine=arista_7280cr3_32p4 + flash_size=7382 + fi + if [ "$sid" = "SmartsvilleBK" ] || [ "$sid" = "SmartsvilleBKSsd" ]; then + aboot_machine=arista_7280cr3k_32p4 + flash_size=7382 + fi + if [ "$sid" = "SmartsvilleDD" ] || [ "$sid" = "SmartsvilleDDSsd" ]; then + aboot_machine=arista_7280cr3_32d4 + flash_size=7382 + fi + if [ "$platform" = "rook" ] || [ "$platform" = "magpie" ] || + [ "$platform" = "woodpecker" ]; then + echo "tsc=reliable pcie_ports=native" >>/tmp/append + echo "rhash_entries=1 usb-storage.delay_use=0" >>/tmp/append + if [ -x /bin/readprefdl ]; then + readprefdl -f /tmp/.system-prefdl -d > /mnt/flash/.system-prefdl + elif [ -f /etc/prefdl ]; then + cp /etc/prefdl /mnt/flash/.system-prefdl + chmod a+r /mnt/flash/.system-prefdl + fi + echo "reassign_prefmem" >> /tmp/append + fi + if [ "$platform" = "rook" ] || [ "$platform" = "magpie" ]; then + echo "iommu=on intel_iommu=on" >>/tmp/append + fi + if [ "$platform" = "woodpecker" ]; then + echo "amd_iommu=off modprobe.blacklist=snd_hda_intel,hdaudio" >> /tmp/append + fi + + if [ $flash_size -ge 28000 ]; then + varlog_size=4096 + elif [ $flash_size -ge 3700 ]; then + varlog_size=400 + fi + + echo "varlog_size=$varlog_size" >>/tmp/append + # disable deterministic interface naming + echo "net.ifnames=0" >>/tmp/append +} + +get_uuid_for() { + local dev="$1" + + if type lsblk 2>&1 > /dev/null; then + lsblk "$dev" -n --output UUID + elif type blkid 2>&1 > /dev/null; then + blkid | grep "^$dev" | sed -n "s/^.* UUID=\"//p" | grep -Eo '[^"]+' + fi +} + +write_boot_configs() { + if $in_aboot; then + # generate the default kernel parameters for the platform + echo "$append" > $cmdline_base + cat /etc/cmdline | sed "/^\(${bootconfigvars// /\|}\|crashkernel\|loglevel\|ignore_loglevel\)\(\$\|=\)/d;/^\$/d" >> $cmdline_base + parse_environment_config >> $cmdline_base + elif [ ! -f "$cmdline_base" ]; then + # some systems were started with other versions of this script and therefore + # do not have the $cmdline_base file. we assume that we are on Sonic or EOS. + cat /proc/cmdline | sed -E 's/^(.*) rw .*$/\1/' | tr ' ' '\n' > $cmdline_base + fi + + cp $cmdline_base /tmp/append + + platform_specific + echo "rw loop=$image_name/fs.squashfs loopfstype=squashfs apparmor=1 security=apparmor quiet" >> /tmp/append + + # Pass the MAC address to the new kernel as a command line parameter. This makes it + # possible to restore the MAC address in the new kernel without requiring driver modifications. + if [ -f /sys/class/net/ma1/address ]; then + echo "hwaddr_ma1=$(cat /sys/class/net/ma1/address)" >> /tmp/append + elif [ -f /sys/class/net/eth0/address ]; then + echo "hwaddr_ma1=$(cat /sys/class/net/eth0/address)" >> /tmp/append + else + err "Management port not found." + fi + + # use extra parameters from kernel-params hook if the file exists + if [ -f "$target_path/$kernel_params" ]; then + cat "$target_path/$kernel_params" >> /tmp/append + fi + + # setting root partition if not overridden by kernel-params + if ! grep -q "root=" /tmp/append; then + rootdev="$(mount | grep -E "$flash_re" | cut -f1 -d' ')" + rootfstype="$(mount | grep -E "$flash_re" | cut -f5 -d' ')" + rootuuid="$(get_uuid_for $rootdev)" + if [ -z "$rootuuid" ] || [ "$rootfstype" = "vfat" ] ; then + echo "root=$rootdev" >> /tmp/append + else + echo "root=UUID=$rootuuid" >> /tmp/append + fi + fi + + mkdir -p "$image_path" + cat /tmp/append > $cmdline_image + [ -e ${target_path}/machine.conf ] || write_machine_config +} + +run_kexec() { + local cmdline="$(cat $cmdline_image | tr '\n' ' ')" + local kernel="${KERNEL:-$(find $image_path/boot -name 'vmlinuz-*' -type f | head -n 1)}" + local initrd="${INITRD:-$(find $image_path/boot -name 'initrd.img-*' -type f | head -n 1)}" + + if $verbose; then + # show systemd showdown sequence when verbose is set + cmdline="$cmdline systemd.show_status=true" + else + # Start showing systemd information from the first failing unit if any. + # systemd.show_status=false or quiet can be used to silence systemd entierly + cmdline="$cmdline systemd.show_status=auto" + fi + + kexec --load --initrd="$initrd" --append="$cmdline" "$kernel" + + [ -z "$testonly" ] || exit 0 + info "Kexecing..." + kexec --exec +} + +get_sorted_hooks() { + echo $(find "$1" -name '[0-9][0-9]-*' -type f) +} + +run_hooks() { + if [ -d "$hook_path/$1" ]; then + for hook in $(get_sorted_hooks "$hook_path/$1"); do + if [ ! -z "$hook" ]; then + info "Running hook $(basename $hook)" + . "$hook" + fi + done + fi +} + +# In Aboot no option will be provided therefore these are the default values to use +in_aboot=true +do_clean=true +do_install=true +do_kexec=true + +# prevent the flash from being cleaned if the do-not-clean file exists +if [ -f "$target_path/$do_not_clean" ]; then + do_clean=false +fi + +# Parse the cmdline options (used from EOS or from SONiC) +if [ ! -z "$install" ]; then + # install from SONiC or EOS + in_aboot=false + do_clean=false + do_kexec=false +elif [ ! -z "$kexec" ]; then + # kexec from SONiC or EOS + in_aboot=false + do_install=false + do_clean=false +elif [ $# -ne 0 ]; then + echo "usage: $0 (see code)" + exit 1 +fi + +# Verbosity can be defined by the caller, default to false otherwise +verbose=${verbose:-false} +if [ -f "$target_path/verbose-boot" ] || + [ "$(get_boot_config VERBOSE)" = "1" ] || + ! $in_aboot; then + verbose=true +fi + +# enable shell debug mode to get the most verbosity +if $verbose; then + set -x +fi + +# install the image if newer +if $do_install; then + # we expect the swi to install to be a non empty file + if [ ! -s "$swipath" ]; then + err "The swipath= environment variable does not point to a valid SWI" + exit 1 + fi + + # check the hash file in the image, and determine to install or just skip + GIT_REVISION=$(unzip -p "$swipath" .imagehash) + LOCAL_IMAGEHASH=$(cat $image_path/.imagehash 2>/dev/null || true) + + if [ "$GIT_REVISION" != "$LOCAL_IMAGEHASH" ] || [ ! -z "$force" ]; then + if $do_clean; then + info "Cleaning flash content $target_path" + clean_flash + fi + + info "Generating boot-config, machine.conf and cmdline" + write_boot_configs + + info "Installing image under $image_path" + extract_image + + run_hooks post-install + else + info "Using previously installed image" + fi +fi + +# chainloading using kexec +if $do_kexec; then + run_hooks pre-kexec + update_next_boot + run_kexec +fi diff --git a/files/apt/apt.conf.d/81norecommends b/files/apt/apt.conf.d/81norecommends new file mode 100644 index 00000000000..d868eb45e22 --- /dev/null +++ b/files/apt/apt.conf.d/81norecommends @@ -0,0 +1,3 @@ +APT::Install-Recommends "false"; +APT::AutoRemove::RecommendsImportant "false"; +APT::AutoRemove::SuggestsImportant "false"; diff --git a/files/apt/apt.conf.d/apt-clean b/files/apt/apt.conf.d/apt-clean new file mode 100644 index 00000000000..886c6d829a3 --- /dev/null +++ b/files/apt/apt.conf.d/apt-clean @@ -0,0 +1,19 @@ +# Since for most Docker users, package installs happen in "docker build" steps, +# they essentially become individual layers due to the way Docker handles +# layering, especially using CoW filesystems. What this means for us is that +# the caches that APT keeps end up just wasting space in those layers, making +# our layers unnecessarily large (especially since we'll normally never use +# these caches again and will instead just "docker build" again and make a brand +# new image). + +# Ideally, these would just be invoking "apt-get clean", but in our testing, +# that ended up being cyclic and we got stuck on APT's lock, so we get this fun +# creation that's essentially just "apt-get clean". +DPkg::Post-Invoke { "rm -f /var/cache/apt/archives/*.deb /var/cache/apt/archives/partial/*.deb /var/cache/apt/*.bin || true"; }; +APT::Update::Post-Invoke { "rm -f /var/cache/apt/archives/*.deb /var/cache/apt/archives/partial/*.deb /var/cache/apt/*.bin || true"; }; + +Dir::Cache::pkgcache ""; +Dir::Cache::srcpkgcache ""; + +# Note that we do realize this isn't the ideal way to do this, and are always +# open to better suggestions (https://github.com/docker/docker/issues). diff --git a/files/apt/apt.conf.d/apt-gzip-indexes b/files/apt/apt.conf.d/apt-gzip-indexes new file mode 100644 index 00000000000..6d29ac4474d --- /dev/null +++ b/files/apt/apt.conf.d/apt-gzip-indexes @@ -0,0 +1,11 @@ +# Since Docker users using "RUN apt-get update && apt-get install -y ..." in +# their Dockerfiles don't go delete the lists files afterwards, we want them to +# be as small as possible on-disk, so we explicitly request "gz" versions and +# tell Apt to keep them gzipped on-disk. + +# For comparison, an "apt-get update" layer without this on a pristine +# "debian:wheezy" base image was "29.88 MB", where with this it was only +# "8.273 MB". + +Acquire::GzipIndexes "true"; +Acquire::CompressionTypes::Order:: "gz"; diff --git a/files/apt/apt.conf.d/apt-no-languages b/files/apt/apt.conf.d/apt-no-languages new file mode 100644 index 00000000000..964d83d6c5b --- /dev/null +++ b/files/apt/apt.conf.d/apt-no-languages @@ -0,0 +1,5 @@ +# In Docker, we don't often need the "Translations" files, so we're just wasting +# time and space by downloading them, and this inhibits that. For users that do +# need them, it's a simple matter to delete this file and "apt-get update". :) + +Acquire::Languages "none"; diff --git a/files/apt/sources.list.amd64 b/files/apt/sources.list.amd64 new file mode 100644 index 00000000000..752b1bb4fc6 --- /dev/null +++ b/files/apt/sources.list.amd64 @@ -0,0 +1,8 @@ +## Debian mirror on Microsoft Azure +## Ref: http://debian-archive.trafficmanager.net/ + +deb [arch=amd64] http://debian-archive.trafficmanager.net/debian/ stretch main contrib non-free +deb-src [arch=amd64] http://debian-archive.trafficmanager.net/debian/ stretch main contrib non-free +deb [arch=amd64] http://debian-archive.trafficmanager.net/debian-security/ stretch/updates main contrib non-free +deb-src [arch=amd64] http://debian-archive.trafficmanager.net/debian-security/ stretch/updates main contrib non-free +deb [arch=amd64] http://debian-archive.trafficmanager.net/debian/ stretch-backports main contrib non-free diff --git a/files/apt/sources.list.arm64 b/files/apt/sources.list.arm64 new file mode 100644 index 00000000000..bbe8fe2e940 --- /dev/null +++ b/files/apt/sources.list.arm64 @@ -0,0 +1,8 @@ +## Debian mirror for ARM +## Not the repo mirror site can change in future, and needs to be updated to be in sync + +deb [arch=arm64] http://deb.debian.org/debian stretch main contrib non-free +deb-src [arch=arm64] http://deb.debian.org/debian stretch main contrib non-free +deb [arch=arm64] http://deb.debian.org/debian stretch-updates main contrib non-free +deb-src [arch=arm64] http://deb.debian.org/debian stretch-updates main contrib non-free +deb [arch=arm64] http://ftp.debian.org/debian stretch-backports main diff --git a/files/apt/sources.list.armhf b/files/apt/sources.list.armhf new file mode 100644 index 00000000000..5dd0c306724 --- /dev/null +++ b/files/apt/sources.list.armhf @@ -0,0 +1,8 @@ +## Debian mirror for ARM +## Not the repo mirror site can change in future, and needs to be updated to be in sync + +deb [arch=armhf] http://deb.debian.org/debian stretch main contrib non-free +deb-src [arch=armhf] http://deb.debian.org/debian stretch main contrib non-free +deb [arch=armhf] http://deb.debian.org/debian stretch-updates main contrib non-free +deb-src [arch=armhf] http://deb.debian.org/debian stretch-updates main contrib non-free +deb [arch=armhf] http://ftp.debian.org/debian stretch-backports main diff --git a/files/broadcom-binary/libsaibcm-dbg_4.1.1.7-1_amd64.deb b/files/broadcom-binary/libsaibcm-dbg_4.1.1.7-1_amd64.deb new file mode 100644 index 00000000000..f8c14f618a9 Binary files /dev/null and b/files/broadcom-binary/libsaibcm-dbg_4.1.1.7-1_amd64.deb differ diff --git a/files/broadcom-binary/libsaibcm-dev_4.1.1.7-1_amd64.deb b/files/broadcom-binary/libsaibcm-dev_4.1.1.7-1_amd64.deb new file mode 100644 index 00000000000..f0001c745e9 Binary files /dev/null and b/files/broadcom-binary/libsaibcm-dev_4.1.1.7-1_amd64.deb differ diff --git a/files/broadcom-binary/libsaibcm-modules-4.9.0-9-2-amd64_4.1.1.7-1_amd64.deb b/files/broadcom-binary/libsaibcm-modules-4.9.0-9-2-amd64_4.1.1.7-1_amd64.deb new file mode 100644 index 00000000000..9b98344af11 Binary files /dev/null and b/files/broadcom-binary/libsaibcm-modules-4.9.0-9-2-amd64_4.1.1.7-1_amd64.deb differ diff --git a/files/broadcom-binary/libsaibcm_4.1.1.7-1_amd64.deb b/files/broadcom-binary/libsaibcm_4.1.1.7-1_amd64.deb new file mode 100644 index 00000000000..ffc75b79b18 Binary files /dev/null and b/files/broadcom-binary/libsaibcm_4.1.1.7-1_amd64.deb differ diff --git a/files/broadcom-binary/saibcm-modules-invsai_4.1.1.7-1_amd64.deb b/files/broadcom-binary/saibcm-modules-invsai_4.1.1.7-1_amd64.deb new file mode 100644 index 00000000000..f8eeb579b82 Binary files /dev/null and b/files/broadcom-binary/saibcm-modules-invsai_4.1.1.7-1_amd64.deb differ diff --git a/files/build_scripts/generate_asic_config_checksum.py b/files/build_scripts/generate_asic_config_checksum.py new file mode 100644 index 00000000000..ca83f4f26a6 --- /dev/null +++ b/files/build_scripts/generate_asic_config_checksum.py @@ -0,0 +1,67 @@ +#!/usr/bin/env python + +import syslog +import os +import hashlib + +SYSLOG_IDENTIFIER = 'asic_config_checksum' + +CHUNK_SIZE = 8192 + +CONFIG_FILES = { + os.path.abspath('./src/sonic-swss/swssconfig/sample/'): ['netbouncer.json', '00-copp.config.json'] +} + +OUTPUT_FILE = os.path.abspath('./asic_config_checksum') + +def log_info(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_INFO, msg) + syslog.closelog() + +def log_error(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_ERR, msg) + syslog.closelog() + +def get_config_files(config_file_map): + ''' + Generates a list of absolute paths to ASIC config files. + ''' + config_files = [] + for path, files in config_file_map.items(): + for config_file in files: + config_files.append(os.path.join(path, config_file)) + return config_files + +def generate_checksum(checksum_files): + ''' + Generates a checksum for a given list of files. Returns None if an error + occurs while reading the files. + + NOTE: The checksum is performed in the order provided. This function does + NOT do any re-ordering of the files before creating the checksum. + ''' + checksum = hashlib.sha1() + for checksum_file in checksum_files: + try: + with open(checksum_file, 'r') as f: + for chunk in iter(lambda: f.read(CHUNK_SIZE), b""): + checksum.update(chunk) + except IOError as e: + log_error('Error processing ASIC config file ' + checksum_file + ':' + e.strerror) + return None + + return checksum.hexdigest() + +def main(): + config_files = sorted(get_config_files(CONFIG_FILES)) + checksum = generate_checksum(config_files) + if checksum == None: + exit(1) + + with open(OUTPUT_FILE, 'w') as output: + output.write(checksum + '\n') + +if __name__ == '__main__': + main() diff --git a/files/build_templates/bgp.service.j2 b/files/build_templates/bgp.service.j2 new file mode 100644 index 00000000000..7200a0e3ecf --- /dev/null +++ b/files/build_templates/bgp.service.j2 @@ -0,0 +1,14 @@ +[Unit] +Description=BGP container +Requires=updategraph.service +After=updategraph.service +Before=ntp-config.service + +[Service] +User={{ sonicadmin_user }} +ExecStartPre=/usr/bin/{{docker_container_name}}.sh start +ExecStart=/usr/bin/{{docker_container_name}}.sh wait +ExecStop=/usr/bin/{{docker_container_name}}.sh stop + +[Install] +WantedBy=multi-user.target diff --git a/files/build_templates/buffers_config.j2 b/files/build_templates/buffers_config.j2 new file mode 100644 index 00000000000..a5212d979fc --- /dev/null +++ b/files/build_templates/buffers_config.j2 @@ -0,0 +1,165 @@ +{%- macro set_default_topology() %} +{%- if default_topo is defined %} +{{ default_topo }} +{%- else %} +def +{%- endif %} +{%- endmacro -%} + +{# Determine device topology and filename postfix #} +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- if switch_role.lower() == 'torrouter' %} +{%- set filename_postfix = 't0' %} +{%- elif switch_role.lower() == 'leafrouter' %} +{%- set filename_postfix = 't1' %} +{%- else %} +{%- set filename_postfix = set_default_topology() %} +{%- endif %} +{%- else %} +{%- set filename_postfix = set_default_topology() %} +{%- set switch_role = '' %} +{%- endif -%} + +{# Import default values from device HWSKU folder #} +{%- import 'buffers_defaults_%s.j2' % filename_postfix as defs %} + +{%- set default_cable = defs.default_cable -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{%- if defs.ports2cable is defined %} + {%- set ports2cable = defs.ports2cable %} +{%- else %} + {%- set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } + -%} +{%- endif %} + +{%- macro cable_length(port_name) %} + {%- set cable_len = [] %} + {%- for local_port in DEVICE_NEIGHBOR %} + {%- if local_port == port_name %} + {%- if DEVICE_NEIGHBOR_METADATA is defined and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] %} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] %} + {%- set neighbor_role = neighbor.type %} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role %} + {%- set roles1 = roles1 | lower %} + {%- set roles2 = roles2 | lower %} + {%- if roles1 in ports2cable %} + {%- if cable_len.append(ports2cable[roles1]) %}{% endif %} + {%- elif roles2 in ports2cable %} + {%- if cable_len.append(ports2cable[roles2]) %}{% endif %} + {%- endif %} + {%- endif %} + {%- endif %} + {%- endfor %} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else %} + {%- if switch_role.lower() == 'torrouter' %} + {%- for local_port in VLAN_MEMBER %} + {%- if local_port[1] == port_name %} + {%- set roles3 = switch_role + '_' + 'server' %} + {%- set roles3 = roles3 | lower %} + {%- if roles3 in ports2cable %} + {%- if cable_len.append(ports2cable[roles3]) %}{% endif %} + {%- endif %} + {%- endif %} + {%- endfor %} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif %} + {%- else -%} + {{ default_cable }} + {%- endif %} + {%- endif %} +{%- endmacro %} + +{%- set PORT_ALL = [] %} + +{%- if PORT is not defined %} + {%- if defs.generate_port_lists(PORT_ALL) %} {% endif %} +{%- else %} + {%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') %} + +{ + "CABLE_LENGTH": { + "AZURE": { + {% for port in PORT_ALL %} + {%- set cable = cable_length(port) %} + "{{ port }}": "{{ cable }}"{%- if not loop.last %},{% endif %} + + {% endfor %} + } + }, + +{% if defs.generate_buffer_pool_and_profiles is defined %} +{{ defs.generate_buffer_pool_and_profiles() }} +{% endif %} + +{%- if defs.generate_profile_lists is defined %} +{{ defs.generate_profile_lists(port_names_active) }}, +{% endif %} + +{%- if defs.generate_pg_profils is defined %} +{{ defs.generate_pg_profils(port_names_active) }} +{% else %} + "BUFFER_PG": { +{% for port in PORT_ACTIVE %} + "{{ port }}|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{% endif %} + +{% if defs.generate_queue_buffers is defined %} +{{ defs.generate_queue_buffers(port_names_active) }} +{% else %} + "BUFFER_QUEUE": { +{% for port in PORT_ACTIVE %} + "{{ port }}|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{% endif %} +} diff --git a/files/build_templates/database.service.j2 b/files/build_templates/database.service.j2 new file mode 100644 index 00000000000..472b9d328b7 --- /dev/null +++ b/files/build_templates/database.service.j2 @@ -0,0 +1,14 @@ +[Unit] +Description=Database container +Requires=docker.service +After=docker.service +After=rc-local.service + +[Service] +User=root +ExecStartPre=/usr/bin/{{docker_container_name}}.sh start +ExecStart=/usr/bin/{{docker_container_name}}.sh wait +ExecStop=/usr/bin/{{docker_container_name}}.sh stop + +[Install] +WantedBy=multi-user.target diff --git a/files/build_templates/dhcp_relay.service.j2 b/files/build_templates/dhcp_relay.service.j2 new file mode 100644 index 00000000000..d501a663feb --- /dev/null +++ b/files/build_templates/dhcp_relay.service.j2 @@ -0,0 +1,18 @@ +[Unit] +Description=DHCP relay container +Requires=updategraph.service +After=updategraph.service swss.service syncd.service teamd.service +Before=ntp-config.service +StartLimitIntervalSec=1200 +StartLimitBurst=3 + +[Service] +User={{ sonicadmin_user }} +ExecStartPre=/usr/bin/{{ docker_container_name }}.sh start +ExecStart=/usr/bin/{{ docker_container_name }}.sh wait +ExecStop=/usr/bin/{{ docker_container_name }}.sh stop +Restart=always +RestartSec=30 + +[Install] +WantedBy=multi-user.target diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2 new file mode 100644 index 00000000000..c485254647b --- /dev/null +++ b/files/build_templates/docker_image_ctl.j2 @@ -0,0 +1,302 @@ +#!/bin/bash + +function getMountPoint() +{ + echo $1 | python -c "import sys, json, os; mnts = [x for x in json.load(sys.stdin)[0]['Mounts'] if x['Destination'] == '/usr/share/sonic/hwsku']; print '' if len(mnts) == 0 else os.path.basename(mnts[0]['Source'])" 2>/dev/null +} + +function updateHostName() +{ + HOSTS=/etc/hosts + HOSTS_TMP=/etc/hosts.tmp + + EXEC="docker exec -i {{docker_container_name}} bash -c" + + NEW_HOSTNAME="$1" + HOSTNAME=`$EXEC "hostname"` + if ! [[ $HOSTNAME =~ ^[a-zA-Z0-9.\-]*$ ]]; then + HOSTNAME=`hostname` + fi + + # copy HOSTS to HOSTS_TMP + $EXEC "cp $HOSTS $HOSTS_TMP" + # remove entry with hostname + $EXEC "sed -i \"/$HOSTNAME$/d\" $HOSTS_TMP" + # add entry with new hostname + $EXEC "echo -e \"127.0.0.1\t$NEW_HOSTNAME\" >> $HOSTS_TMP" + + echo "Set hostname in {{docker_container_name}} container" + $EXEC "hostname '$NEW_HOSTNAME'" + $EXEC "cat $HOSTS_TMP > $HOSTS" + $EXEC "rm -f $HOSTS_TMP" +} + +function getBootType() +{ + # same code snippet in files/scripts/syncd.sh + case "$(cat /proc/cmdline)" in + *SONIC_BOOT_TYPE=warm*) + TYPE='warm' + ;; + *SONIC_BOOT_TYPE=fastfast*) + TYPE='fastfast' + ;; + *SONIC_BOOT_TYPE=fast*|*fast-reboot*) + TYPE='fast' + ;; + *) + TYPE='cold' + esac + echo "${TYPE}" +} + +function preStartAction() +{ +{%- if docker_container_name == "database" %} + WARM_DIR=/host/warmboot + if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast") && -f $WARM_DIR/dump.rdb ]]; then + # Load redis content from /host/warmboot/dump.rdb + docker cp $WARM_DIR/dump.rdb database:/var/lib/redis/dump.rdb + else + # Create an emtpy file and overwrite any RDB if already there + echo -n > /tmp/dump.rdb + docker cp /tmp/dump.rdb database:/var/lib/redis/ + fi +{%- elif docker_container_name == "snmp" %} + docker exec -i database redis-cli -n 6 HSET 'DEVICE_METADATA|localhost' chassis_serial_number $(decode-syseeprom -s) + vrfenabled=`/usr/bin/redis-cli -n 4 hget "MGMT_VRF_CONFIG|vrf_global" mgmtVrfEnabled` + v1SnmpTrapIp=`/usr/bin/redis-cli -n 4 hget "SNMP_TRAP_CONFIG|v1TrapDest" DestIp` + v1SnmpTrapPort=`/usr/bin/redis-cli -n 4 hget "SNMP_TRAP_CONFIG|v1TrapDest" DestPort` + v1Vrf=`/usr/bin/redis-cli -n 4 hget "SNMP_TRAP_CONFIG|v1TrapDest" vrf` + v1Comm=`/usr/bin/redis-cli -n 4 hget "SNMP_TRAP_CONFIG|v1TrapDest" Community` + v2SnmpTrapIp=`/usr/bin/redis-cli -n 4 hget "SNMP_TRAP_CONFIG|v2TrapDest" DestIp` + v2SnmpTrapPort=`/usr/bin/redis-cli -n 4 hget "SNMP_TRAP_CONFIG|v2TrapDest" DestPort` + v2Vrf=`/usr/bin/redis-cli -n 4 hget "SNMP_TRAP_CONFIG|v2TrapDest" vrf` + v2Comm=`/usr/bin/redis-cli -n 4 hget "SNMP_TRAP_CONFIG|v2TrapDest" Community` + v3SnmpTrapIp=`/usr/bin/redis-cli -n 4 hget "SNMP_TRAP_CONFIG|v3TrapDest" DestIp` + v3SnmpTrapPort=`/usr/bin/redis-cli -n 4 hget "SNMP_TRAP_CONFIG|v3TrapDest" DestPort` + v3Vrf=`/usr/bin/redis-cli -n 4 hget "SNMP_TRAP_CONFIG|v3TrapDest" vrf` + v3Comm=`/usr/bin/redis-cli -n 4 hget "SNMP_TRAP_CONFIG|v3TrapDest" Community` + + if [ "${v1SnmpTrapIp}" != "" ] + then + if [ "${v1Vrf}" != "None" ] + then + sed -i "s/v1_trap_dest:.*/v1_trap_dest: ${v1SnmpTrapIp}:${v1SnmpTrapPort}%${v1Vrf} ${v1Comm}/" "/etc/sonic/snmp.yml" + else + sed -i "s/v1_trap_dest:.*/v1_trap_dest: ${v1SnmpTrapIp}:${v1SnmpTrapPort} ${v1Comm}/" "/etc/sonic/snmp.yml" + fi + else + sed -i "s/v1_trap_dest:.*/v1_trap_dest: NotConfigured/" "/etc/sonic/snmp.yml" + fi + if [ "${v2SnmpTrapIp}" != "" ] + then + if [ "${v2Vrf}" != "None" ] + then + sed -i "s/v2_trap_dest:.*/v2_trap_dest: ${v2SnmpTrapIp}:${v2SnmpTrapPort}%${v2Vrf} ${v2Comm}/" "/etc/sonic/snmp.yml" + else + sed -i "s/v2_trap_dest:.*/v2_trap_dest: ${v2SnmpTrapIp}:${v2SnmpTrapPort} ${v2Comm}/" "/etc/sonic/snmp.yml" + fi + else + sed -i "s/v2_trap_dest:.*/v2_trap_dest: NotConfigured/" "/etc/sonic/snmp.yml" + fi + if [ "${v3SnmpTrapIp}" != "" ] + then + if [ "${v3Vrf}" != "None" ] + then + sed -i "s/v3_trap_dest:.*/v3_trap_dest: ${v3SnmpTrapIp}:${v3SnmpTrapPort}%${v3Vrf} ${v3Comm}/" "/etc/sonic/snmp.yml" + else + sed -i "s/v3_trap_dest:.*/v3_trap_dest: ${v3SnmpTrapIp}:${v3SnmpTrapPort} ${v3Comm}/" "/etc/sonic/snmp.yml" + fi + else + sed -i "s/v3_trap_dest:.*/v3_trap_dest: NotConfigured/" "/etc/sonic/snmp.yml" + fi + + echo -n "" > /tmp/snmpagentaddr.yml + keys=`/usr/bin/redis-cli -n 4 keys "SNMP_AGENT_ADDRESS_CONFIG|*"` + count=1 + for key in $keys;do + ip=`echo $key|cut -d "|" -f2` + echo -n "snmp_agent_address_$count: $ip" >> /tmp/snmpagentaddr.yml + port=`echo $key|cut -d "|" -f3` + if [ -n "$port" ]; then + echo -n ":$port" >> /tmp/snmpagentaddr.yml + fi + vrf=`echo $key|cut -d "|" -f4` + if [ -n "$vrf" ]; then + echo -n "%$vrf" >> /tmp/snmpagentaddr.yml + fi + echo "" >> /tmp/snmpagentaddr.yml + count=$((count+1)) + done + sed -i '/snmp_agent_address_*/d' /etc/sonic/snmp.yml + cat /tmp/snmpagentaddr.yml >> /etc/sonic/snmp.yml +{%- else %} + : # nothing +{%- endif %} +} + +function postStartAction() +{ +{%- if docker_container_name == "database" %} + # Wait until redis starts + /usr/bin/docker exec database ping_pong_db_insts + if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast") && -f $WARM_DIR/dump.rdb ]]; then + rm -f $WARM_DIR/dump.rdb + else + # If there is a config db dump file, load it + if [ -r /etc/sonic/config_db.json ]; then + sonic-cfggen -j /etc/sonic/config_db.json --write-to-db + fi + + redis-cli -n 4 SET "CONFIG_DB_INITIALIZED" "1" + fi + + if [[ -x /usr/bin/db_migrator.py ]]; then + # Migrate the DB to the latest schema version if needed + /usr/bin/db_migrator.py -o migrate + fi +{%- elif docker_container_name == "swss" %} + docker exec swss rm -f /ready # remove cruft + if [[ "$BOOT_TYPE" == "fast" ]] && [[ -d /host/fast-reboot ]]; then + test -e /host/fast-reboot/fdb.json && docker cp /host/fast-reboot/fdb.json swss:/ + test -e /host/fast-reboot/arp.json && docker cp /host/fast-reboot/arp.json swss:/ + test -e /host/fast-reboot/default_routes.json && docker cp /host/fast-reboot/default_routes.json swss:/ + rm -fr /host/fast-reboot + fi + docker exec swss touch /ready # signal swssconfig.sh to go +{%- elif docker_container_name == "pmon" %} + + DEVPATH="/usr/share/sonic/device" + REBOOT="platform_reboot" + PSENSOR="/usr/local/bin/platform_sensors.py" + if [ -d ${DEVPATH}/${PLATFORM} ] && [ -f $PSENSOR ]; then + exist=`docker exec -i pmon ls /usr/bin/platform_sensors.py "$@" 2>/dev/null` + if [ -z "$exist" ]; then + docker cp $PSENSOR pmon:/usr/bin/ + fi + fi +{%- else %} + : # nothing +{%- endif %} +} + +start() { + # Obtain boot type from kernel arguments + BOOT_TYPE=`getBootType` + + # Obtain our platform as we will mount directories with these names in each docker + PLATFORM=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform` + + {%- if docker_container_name == "database" %} + # Don't mount HWSKU in {{docker_container_name}} container. + HWSKU="" + {%- else %} + # Obtain our HWSKU as we will mount directories with these names in each docker + HWSKU=`sonic-cfggen -d -v 'DEVICE_METADATA["localhost"]["hwsku"]'` + HOSTNAME=`sonic-cfggen -d -v 'DEVICE_METADATA["localhost"]["hostname"]'` + {%- endif %} + if [ -z "$HOSTNAME" ] || ! [[ $HOSTNAME =~ ^[a-zA-Z0-9.\-]*$ ]]; then + HOSTNAME=`hostname` + fi + + DOCKERCHECK=`docker inspect --type container {{docker_container_name}} 2>/dev/null` + if [ "$?" -eq "0" ]; then + {%- if docker_container_name == "database" %} + DOCKERMOUNT="" + {%- else %} + DOCKERMOUNT=`getMountPoint "$DOCKERCHECK"` + {%- endif %} + if [ x"$DOCKERMOUNT" == x"$HWSKU" ]; then + {%- if docker_container_name == "database" %} + echo "Starting existing {{docker_container_name}} container" + {%- else %} + echo "Starting existing {{docker_container_name}} container with HWSKU $HWSKU" + {%- endif %} + preStartAction + docker start {{docker_container_name}} + CURRENT_HOSTNAME="$(docker exec {{docker_container_name}} hostname)" + if [ x"$HOSTNAME" != x"$CURRENT_HOSTNAME" ]; then + updateHostName "$HOSTNAME" + fi + postStartAction + exit $? + fi + + # docker created with a different HWSKU, remove and recreate + echo "Removing obsolete {{docker_container_name}} container with HWSKU $DOCKERMOUNT" + docker rm -f {{docker_container_name}} + fi + +{%- if docker_container_name == "database" %} + echo "Creating new {{docker_container_name}} container" + # if database_config exists in old_config, use it; otherwise use the default one in new image + if [ -f /etc/sonic/old_config/database_config.json ]; then + echo "Use database_config.json from old system..." + mv /etc/sonic/old_config/database_config.json /etc/sonic/ + fi +{%- else %} + echo "Creating new {{docker_container_name}} container with HWSKU $HWSKU" +{%- endif %} +{%- if sonic_asic_platform == "mellanox" %} + # TODO: Mellanox will remove the --tmpfs exception after SDK socket path changed in new SDK version +{%- endif %} + docker create {{docker_image_run_opt}} \ +{%- if install_debug_image == "y" %} + -v /src:/src:ro -v /debug:/debug:rw \ +{%- endif %} +{%- if '--log-driver=json-file' in docker_image_run_opt or '--log-driver' not in docker_image_run_opt %} + --log-opt max-size=2M --log-opt max-file=5 \ +{%- endif %} +{%- if sonic_asic_platform == "mellanox" %} +{%- if docker_container_name == "syncd" %} + -v /var/log/mellanox/sniffer:/var/log/mellanox/sniffer:rw \ + -v mlnx_sdk_socket:/tmp \ + -v /dev/shm:/dev/shm:rw \ +{%- elif docker_container_name == "pmon" %} + -v /var/run/hw-management:/var/run/hw-management:rw \ + -v mlnx_sdk_socket:/tmp \ + -v /dev/shm:/dev/shm:rw \ +{%- else %} + --tmpfs /tmp \ +{%- endif %} +{%- endif %} + -v /var/run/redis:/var/run/redis:rw \ + -v /usr/share/sonic/device/$PLATFORM:/usr/share/sonic/platform:ro \ +{%- if docker_container_name != "database" %} + -v /usr/share/sonic/device/$PLATFORM/$HWSKU:/usr/share/sonic/hwsku:ro \ +{%- endif %} +{%- if sonic_asic_platform != "mellanox" %} + --tmpfs /tmp \ +{%- endif %} + --tmpfs /var/tmp \ + --hostname "$HOSTNAME" \ + --name={{docker_container_name}} {{docker_image_name}}:latest || { + echo "Failed to docker run" >&1 + exit 4 + } + + preStartAction + docker start {{docker_container_name}} + postStartAction +} + +wait() { + docker wait {{docker_container_name}} +} + +stop() { + docker stop {{docker_container_name}} +} + +case "$1" in + start|wait|stop|updateHostName) + cmd=$1 + shift + $cmd $@ + ;; + *) + echo "Usage: $0 {start|wait|stop|updateHostName new_hostname}" + exit 1 + ;; +esac diff --git a/files/build_templates/lldp.service.j2 b/files/build_templates/lldp.service.j2 new file mode 100644 index 00000000000..2599fc5c5bd --- /dev/null +++ b/files/build_templates/lldp.service.j2 @@ -0,0 +1,18 @@ +[Unit] +Description=LLDP container +Requires=updategraph.service +After=updategraph.service swss.service syncd.service +Before=ntp-config.service +StartLimitIntervalSec=1200 +StartLimitBurst=3 + +[Service] +User={{ sonicadmin_user }} +ExecStartPre=/usr/bin/{{docker_container_name}}.sh start +ExecStart=/usr/bin/{{docker_container_name}}.sh wait +ExecStop=/usr/bin/{{docker_container_name}}.sh stop +Restart=always +RestartSec=30 + +[Install] +WantedBy=multi-user.target diff --git a/files/build_templates/organization_extensions.sh b/files/build_templates/organization_extensions.sh new file mode 100755 index 00000000000..db05a4e3f59 --- /dev/null +++ b/files/build_templates/organization_extensions.sh @@ -0,0 +1,52 @@ +#!/bin/bash +######################################################################### +## This script is to automate Orignaization specific extensions # +## such as Configuration & Scripts for features like AAA, ZTP, etc. # +## to include in ONIE installer image # +## # +## USAGE: # +## ./organization_extensions.sh -f -n # +## ./organization_extensions.sh \ # +## --fsroot \ # +## --hostname # +## PARAMETERS: # +## -f FILESYSTEM_ROOT # +## The location of the root file system # +## -h HOSTNAME # +## The hostname of the target system # +######################################################################### + +## Initialize the arguments to default values. +## The values get updated to user provided value, if supplied +FILESYSTEM_ROOT=./fsroot +HOSTNAME=sonic + +# read the options +TEMP=`getopt -o f:h: --long fsroot:,hostname: -- "$@"` +eval set -- "$TEMP" + +# extract options and their arguments into variables. +while true ; do + case "$1" in + -f|--fsroot) + case "$2" in + "") shift 2 ;; + *) FILESYSTEM_ROOT=$2 ; shift 2 ;; + esac ;; + -h|--hostname) + case "$2" in + "") shift 2 ;; + *) HOSTNAME=$2 ; shift 2 ;; + esac ;; + --) shift ; break ;; + *) echo "Internal error!" ; exit 1 ;; + esac +done + +echo "Executing SONIC Organization Extensions" + +## Place your Organization specific code / scipts here ... + + +echo "SONIC Organization Extensions - Done" + diff --git a/files/build_templates/pmon.service.j2 b/files/build_templates/pmon.service.j2 new file mode 100644 index 00000000000..11dea5d1278 --- /dev/null +++ b/files/build_templates/pmon.service.j2 @@ -0,0 +1,21 @@ +[Unit] +Description=Platform monitor container +Requires=updategraph.service +After=updategraph.service +{% if sonic_asic_platform == 'mellanox' %} +After=syncd.service +{% endif %} +Before=ntp-config.service +StartLimitIntervalSec=1200 +StartLimitBurst=3 + +[Service] +User={{ sonicadmin_user }} +ExecStartPre=/usr/bin/{{docker_container_name}}.sh start +ExecStart=/usr/bin/{{docker_container_name}}.sh wait +ExecStop=/usr/bin/{{docker_container_name}}.sh stop +Restart=always +RestartSec=30 + +[Install] +WantedBy=multi-user.target diff --git a/files/build_templates/qos_config.j2 b/files/build_templates/qos_config.j2 new file mode 100644 index 00000000000..2a9a5be8d83 --- /dev/null +++ b/files/build_templates/qos_config.j2 @@ -0,0 +1,253 @@ +{%- set PORT_ALL = [] %} +{%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{% endif %} +{%- endfor %} +{%- if PORT_ALL | sort_by_port_index %}{% endif %} + +{%- set port_names_list_all = [] %} +{%- for port in PORT_ALL %} + {%- if port_names_list_all.append(port) %}{% endif %} +{%- endfor %} +{%- set port_names_all = port_names_list_all | join(',') -%} + + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} +{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') -%} + + +{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%} +{%- set backend_device_types = ['BackEndToRRouter', 'BackEndLeafRouter'] -%} + + +{ +{% if generate_tc_to_pg_map is defined %} + {{- generate_tc_to_pg_map() }} +{% else %} + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "3", + "4": "4", + "5": "0", + "6": "0", + "7": "7" + } + }, +{% endif %} + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, +{% if 'type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type'] in backend_device_types %} + "DOT1P_TO_TC_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, +{% else %} + "DSCP_TO_TC_MAP": { + "AZURE": { + "0" : "1", + "1" : "1", + "2" : "1", + "3" : "3", + "4" : "4", + "5" : "2", + "6" : "1", + "7" : "1", + "8" : "0", + "9" : "1", + "10": "1", + "11": "1", + "12": "1", + "13": "1", + "14": "1", + "15": "1", + "16": "1", + "17": "1", + "18": "1", + "19": "1", + "20": "1", + "21": "1", + "22": "1", + "23": "1", + "24": "1", + "25": "1", + "26": "1", + "27": "1", + "28": "1", + "29": "1", + "30": "1", + "31": "1", + "32": "1", + "33": "1", + "34": "1", + "35": "1", + "36": "1", + "37": "1", + "38": "1", + "39": "1", + "40": "1", + "41": "1", + "42": "1", + "43": "1", + "44": "1", + "45": "1", + "46": "5", + "47": "1", + "48": "6", + "49": "1", + "50": "1", + "51": "1", + "52": "1", + "53": "1", + "54": "1", + "55": "1", + "56": "1", + "57": "1", + "58": "1", + "59": "1", + "60": "1", + "61": "1", + "62": "1", + "63": "1" + } + }, +{% endif %} + "SCHEDULER": { + "scheduler.0": { + "type" : "DWRR", + "weight": "14" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "15" + } + }, +{% if asic_type in pfc_to_pg_map_supported_asics %} + "PFC_PRIORITY_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "3": "3", + "4": "4" + } + }, +{% endif %} + "PORT_QOS_MAP": { +{% for port in PORT_ACTIVE %} + "{{ port }}": { +{% if 'type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type'] in backend_device_types %} + "dot1p_to_tc_map" : "[DOT1P_TO_TC_MAP|AZURE]", +{% else %} + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", +{% endif %} + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", +{% if asic_type in pfc_to_pg_map_supported_asics %} + "pfc_to_pg_map" : "[PFC_PRIORITY_TO_PRIORITY_GROUP_MAP|AZURE]", +{% endif %} + "pfc_enable" : "3,4" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable" : "true", + "wred_yellow_enable" : "true", + "wred_red_enable" : "true", + "ecn" : "ecn_all", + "green_max_threshold" : "2097152", + "green_min_threshold" : "1048576", + "yellow_max_threshold" : "2097152", + "yellow_min_threshold" : "1048576", + "red_max_threshold" : "2097152", + "red_min_threshold" : "1048576", + "green_drop_probability" : "5", + "yellow_drop_probability": "5", + "red_drop_probability" : "5" + } + }, + "QUEUE": { +{% for port in PORT_ACTIVE %} + "{{ port }}|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, +{% endfor %} +{% for port in PORT_ACTIVE %} + "{{ port }}|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +} diff --git a/files/build_templates/radv.service.j2 b/files/build_templates/radv.service.j2 new file mode 100644 index 00000000000..b3dd3a8d8bc --- /dev/null +++ b/files/build_templates/radv.service.j2 @@ -0,0 +1,18 @@ +[Unit] +Description=Router advertiser container +Requires=updategraph.service +After=updategraph.service swss.service syncd.service +Before=ntp-config.service +StartLimitIntervalSec=1200 +StartLimitBurst=3 + +[Service] +User={{ sonicadmin_user }} +ExecStartPre=/usr/bin/{{ docker_container_name }}.sh start +ExecStart=/usr/bin/{{ docker_container_name }}.sh wait +ExecStop=/usr/bin/{{ docker_container_name }}.sh stop +Restart=always +RestartSec=30 + +[Install] +WantedBy=multi-user.target diff --git a/files/build_templates/sflow.service.j2 b/files/build_templates/sflow.service.j2 new file mode 100644 index 00000000000..de08f027adf --- /dev/null +++ b/files/build_templates/sflow.service.j2 @@ -0,0 +1,18 @@ +[Unit] +Description=sFlow container +Requires=swss.service +After=swss.service syncd.service +Before=ntp-config.service +StartLimitIntervalSec=1200 +StartLimitBurst=3 + +[Service] +User={{ sonicadmin_user }} +ExecStartPre=/usr/bin/{{docker_container_name}}.sh start +ExecStart=/usr/bin/{{docker_container_name}}.sh wait +ExecStop=/usr/bin/{{docker_container_name}}.sh stop +Restart=always +RestartSec=30 + +[Install] +WantedBy=multi-user.target diff --git a/files/build_templates/snmp.service.j2 b/files/build_templates/snmp.service.j2 new file mode 100644 index 00000000000..310048e68be --- /dev/null +++ b/files/build_templates/snmp.service.j2 @@ -0,0 +1,18 @@ +[Unit] +Description=SNMP container +Requires=updategraph.service +Requisite=swss.service +After=updategraph.service swss.service syncd.service +Before=ntp-config.service +StartLimitIntervalSec=1200 +StartLimitBurst=3 + +[Service] +ExecStartPre=/usr/bin/{{docker_container_name}}.sh start +ExecStart=/usr/bin/{{docker_container_name}}.sh wait +ExecStop=/usr/bin/{{docker_container_name}}.sh stop +Restart=always +RestartSec=30 + +[Install] +WantedBy=multi-user.target swss.service diff --git a/files/build_templates/snmp.timer b/files/build_templates/snmp.timer new file mode 100644 index 00000000000..464cf01459b --- /dev/null +++ b/files/build_templates/snmp.timer @@ -0,0 +1,9 @@ +[Unit] +Description=Delays snmp container until SONiC has started + +[Timer] +OnBootSec=3min 30 sec +Unit=snmp.service + +[Install] +WantedBy=timers.target diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2 new file mode 100644 index 00000000000..f62ef44f0fc --- /dev/null +++ b/files/build_templates/sonic_debian_extension.j2 @@ -0,0 +1,413 @@ +#!/bin/bash +## This script is to automate loading of vendor specific docker images +## and instalation of configuration files and vendor specific packages +## to debian file system. +## +## USAGE: +## ./sonic_debian_extension.sh FILESYSTEM_ROOT PLATFORM_DIR +## PARAMETERS: +## FILESYSTEM_ROOT +## Path to debian file system root directory + +FILESYSTEM_ROOT=$1 +[ -n "$FILESYSTEM_ROOT" ] || { + echo "Error: no or empty FILESYSTEM_ROOT argument" + exit 1 +} + +PLATFORM_DIR=$2 +[ -n "$PLATFORM_DIR" ] || { + echo "Error: no or empty PLATFORM_DIR argument" + exit 1 +} + +## Enable debug output for script +set -x -e + +CONFIGURED_ARCH=$([ -f .arch ] && cat .arch || echo amd64) + +. functions.sh +BUILD_TEMPLATES=files/build_templates +IMAGE_CONFIGS=files/image_config +SCRIPTS_DIR=files/scripts + +# Define target fold macro +FILESYSTEM_ROOT_USR="$FILESYSTEM_ROOT/usr" +FILESYSTEM_ROOT_USR_SHARE="$FILESYSTEM_ROOT_USR/share" +FILESYSTEM_ROOT_USR_SHARE_SONIC="$FILESYSTEM_ROOT_USR_SHARE/sonic" +FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES="$FILESYSTEM_ROOT_USR_SHARE_SONIC/templates" + +GENERATED_SERVICE_FILE="$FILESYSTEM_ROOT/etc/sonic/generated_services.conf" + +clean_sys() { + sudo umount $FILESYSTEM_ROOT/sys/fs/cgroup/* \ + $FILESYSTEM_ROOT/sys/fs/cgroup \ + $FILESYSTEM_ROOT/sys || true +} +trap_push clean_sys +sudo LANG=C chroot $FILESYSTEM_ROOT mount sysfs /sys -t sysfs + +sudo bash -c "echo \"DOCKER_OPTS=\"--storage-driver=overlay2\"\" >> $FILESYSTEM_ROOT/etc/default/docker" +sudo cp files/docker/docker $FILESYSTEM_ROOT/etc/init.d/ +if [[ $CONFIGURED_ARCH == armhf || $CONFIGURED_ARCH == arm64 ]]; then + SONIC_NATIVE_DOCKERD_FOR_DOCKERFS=" -H unix:///dockerfs/var/run/docker.sock " + SONIC_NATIVE_DOCKERD_FOR_DOCKERFS_PID="cat `pwd`/dockerfs/var/run/docker.pid" +else + sudo chroot $FILESYSTEM_ROOT service docker start +fi + +# Apply apt configuration files +sudo cp $IMAGE_CONFIGS/apt/sources.list $FILESYSTEM_ROOT/etc/apt/ +sudo mkdir -p $FILESYSTEM_ROOT/etc/apt/sources.list.d/ +sudo cp -R $IMAGE_CONFIGS/apt/sources.list.d/${CONFIGURED_ARCH}/* $FILESYSTEM_ROOT/etc/apt/sources.list.d/ +cat $IMAGE_CONFIGS/apt/sonic-dev.gpg.key | sudo LANG=C chroot $FILESYSTEM_ROOT apt-key add - + +# Update apt's snapshot of its repos +sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get update + +# Apply environtment configuration files +sudo cp $IMAGE_CONFIGS/environment/environment $FILESYSTEM_ROOT/etc/ +sudo cp $IMAGE_CONFIGS/environment/motd $FILESYSTEM_ROOT/etc/ + +# Create all needed directories +sudo mkdir -p $FILESYSTEM_ROOT/etc/sonic/ +sudo mkdir -p $FILESYSTEM_ROOT/etc/modprobe.d/ +sudo mkdir -p $FILESYSTEM_ROOT/var/cache/sonic/ +sudo mkdir -p $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/ + +# Install a more recent version of ifupdown2 (and its dependencies via 'apt-get -y install -f') +sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/ifupdown2_*.deb || \ + sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f + +# Install dependencies for SONiC config engine +sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install \ + python-dev \ + python-lxml \ + python-yaml \ + python-bitarray + +# Install SONiC config engine Python package +CONFIG_ENGINE_WHEEL_NAME=$(basename {{config_engine_wheel_path}}) +sudo cp {{config_engine_wheel_path}} $FILESYSTEM_ROOT/$CONFIG_ENGINE_WHEEL_NAME +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install $CONFIG_ENGINE_WHEEL_NAME +sudo rm -rf $FILESYSTEM_ROOT/$CONFIG_ENGINE_WHEEL_NAME + +# Install Python client for Redis +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install "redis==2.10.6" + +# Install redis-dump-load Python 2 package +REDIS_DUMP_LOAD_PY2_WHEEL_NAME=$(basename {{redis_dump_load_py2_wheel_path}}) +sudo cp {{redis_dump_load_py2_wheel_path}} $FILESYSTEM_ROOT/$REDIS_DUMP_LOAD_PY2_WHEEL_NAME +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install $REDIS_DUMP_LOAD_PY2_WHEEL_NAME +sudo rm -rf $FILESYSTEM_ROOT/$REDIS_DUMP_LOAD_PY2_WHEEL_NAME + +# Install Python module for ipaddress +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install ipaddress + +# Install SwSS SDK Python 2 package +SWSSSDK_PY2_WHEEL_NAME=$(basename {{swsssdk_py2_wheel_path}}) +sudo cp {{swsssdk_py2_wheel_path}} $FILESYSTEM_ROOT/$SWSSSDK_PY2_WHEEL_NAME +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install $SWSSSDK_PY2_WHEEL_NAME +sudo rm -rf $FILESYSTEM_ROOT/$SWSSSDK_PY2_WHEEL_NAME + +# Install sonic-platform-common Python 2 package +PLATFORM_COMMON_PY2_WHEEL_NAME=$(basename {{platform_common_py2_wheel_path}}) +sudo cp {{platform_common_py2_wheel_path}} $FILESYSTEM_ROOT/$PLATFORM_COMMON_PY2_WHEEL_NAME +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install $PLATFORM_COMMON_PY2_WHEEL_NAME +sudo rm -rf $FILESYSTEM_ROOT/$PLATFORM_COMMON_PY2_WHEEL_NAME + +# Install sonic-daemon-base Python 2 package +DAEMON_BASE_PY2_WHEEL_NAME=$(basename {{daemon_base_py2_wheel_path}}) +sudo cp {{daemon_base_py2_wheel_path}} $FILESYSTEM_ROOT/$DAEMON_BASE_PY2_WHEEL_NAME +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install $DAEMON_BASE_PY2_WHEEL_NAME +sudo rm -rf $FILESYSTEM_ROOT/$DAEMON_BASE_PY2_WHEEL_NAME + +# Install built Python Click package (and its dependencies via 'apt-get -y install -f') +# Do this before installing sonic-utilities so that it doesn't attempt to install +# an older version as part of its dependencies +sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/python-click*_all.deb || \ + sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f + +# Install python pexpect used by sonic-utilities consutil +# using pip install instead to get a more recent version than is available through debian +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install pexpect +# Install python click-default-group by sonic-utilities +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install click-default-group==1.2 + +# Install tabulate >= 0.8.1 via pip in order to support multi-line row output for sonic-utilities +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install tabulate==0.8.2 + +# Install SONiC Utilities (and its dependencies via 'apt-get -y install -f') +sudo dpkg --root=$FILESYSTEM_ROOT -i $python_debs_path/python-sonic-utilities_*.deb || \ + sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f + +# SONiC utilities installs bash-completion as a dependency. However, it is disabled by default +# in bash.bashrc, so we copy a version of the file with it enabled here. +sudo cp -f $IMAGE_CONFIGS/bash/bash.bashrc $FILESYSTEM_ROOT/etc/ + +# Install SONiC Device Data (and its dependencies via 'apt-get -y install -f') +sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-device-data_*.deb || \ + sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f + +# Install pam-tacplus and nss-tacplus +sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/libtac2_*.deb || \ + sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f +sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/libpam-tacplus_*.deb || \ + sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f +sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/libnss-tacplus_*.deb || \ + sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f +# Disable tacplus by default +sudo LANG=C chroot $FILESYSTEM_ROOT pam-auth-update --remove tacplus +sudo sed -i -e '/^passwd/s/ tacplus//' $FILESYSTEM_ROOT/etc/nsswitch.conf + +# Install a custom version of kdump-tools (and its dependencies via 'apt-get -y install -f') +sudo DEBIAN_FRONTEND=noninteractive dpkg --root=$FILESYSTEM_ROOT -i $debs_path/kdump-tools_*.deb || \ + sudo LANG=C DEBIAN_FRONTEND=noninteractive DEBCONF_NONINTERACTIVE_SEEN=truechroot $FILESYSTEM_ROOT apt-get -q --no-install-suggests --no-install-recommends --force-no install + +# Copy crontabs +sudo cp -f $IMAGE_CONFIGS/cron.d/* $FILESYSTEM_ROOT/etc/cron.d/ + +# Copy NTP configuration files and templates +sudo cp $IMAGE_CONFIGS/ntp/ntp-config.service $FILESYSTEM_ROOT/etc/systemd/system/ +echo "ntp-config.service" | sudo tee -a $GENERATED_SERVICE_FILE +sudo cp $IMAGE_CONFIGS/ntp/ntp-config.sh $FILESYSTEM_ROOT/usr/bin/ +sudo cp $IMAGE_CONFIGS/ntp/ntp.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/ + +# Copy warmboot-finalizer files +sudo LANG=C cp $IMAGE_CONFIGS/warmboot-finalizer/finalize-warmboot.sh $FILESYSTEM_ROOT/usr/local/bin/finalize-warmboot.sh +sudo LANG=C cp $IMAGE_CONFIGS/warmboot-finalizer/warmboot-finalizer.service $FILESYSTEM_ROOT/etc/systemd/system/ +echo "warmboot-finalizer.service" | sudo tee -a $GENERATED_SERVICE_FILE + +# Copy rsyslog configuration files and templates +sudo cp $IMAGE_CONFIGS/rsyslog/rsyslog-config.service $FILESYSTEM_ROOT/etc/systemd/system/ +sudo cp $IMAGE_CONFIGS/rsyslog/rsyslog-config.sh $FILESYSTEM_ROOT/usr/bin/ +sudo cp $IMAGE_CONFIGS/rsyslog/rsyslog.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/ +sudo cp $IMAGE_CONFIGS/rsyslog/rsyslog.d/* $FILESYSTEM_ROOT/etc/rsyslog.d/ +echo "rsyslog-config.service" | sudo tee -a $GENERATED_SERVICE_FILE + +# Copy logrotate.d configuration files +sudo cp -f $IMAGE_CONFIGS/logrotate/logrotate.d/* $FILESYSTEM_ROOT/etc/logrotate.d/ + +# Copy systemd-journald configuration files +sudo cp -f $IMAGE_CONFIGS/systemd/journald.conf $FILESYSTEM_ROOT/etc/systemd/ + +# Copy interfaces configuration files and templates +sudo cp $IMAGE_CONFIGS/interfaces/interfaces-config.service $FILESYSTEM_ROOT/etc/systemd/system/ +sudo cp $IMAGE_CONFIGS/interfaces/interfaces-config.sh $FILESYSTEM_ROOT/usr/bin/ +sudo cp $IMAGE_CONFIGS/interfaces/*.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/ +echo "interfaces-config.service" | sudo tee -a $GENERATED_SERVICE_FILE + +# Copy initial interfaces configuration file, will be overwritten on first boot +sudo cp $IMAGE_CONFIGS/interfaces/init_interfaces $FILESYSTEM_ROOT/etc/network/interfaces +sudo mkdir -p $FILESYSTEM_ROOT/etc/network/interfaces.d + +# Copy hostcfgd files +sudo cp $IMAGE_CONFIGS/hostcfgd/hostcfgd.service $FILESYSTEM_ROOT/etc/systemd/system/ +echo "hostcfgd.service" | sudo tee -a $GENERATED_SERVICE_FILE +sudo cp $IMAGE_CONFIGS/hostcfgd/hostcfgd $FILESYSTEM_ROOT/usr/bin/ +sudo cp $IMAGE_CONFIGS/hostcfgd/*.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/ + +# Copy the buffer configuration template +sudo cp $BUILD_TEMPLATES/buffers_config.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/ + +# Copy the qos configuration template +sudo cp $BUILD_TEMPLATES/qos_config.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/ + +# Copy hostname configuration scripts +sudo cp $IMAGE_CONFIGS/hostname/hostname-config.service $FILESYSTEM_ROOT/etc/systemd/system/ +echo "hostname-config.service" | sudo tee -a $GENERATED_SERVICE_FILE +sudo cp $IMAGE_CONFIGS/hostname/hostname-config.sh $FILESYSTEM_ROOT/usr/bin/ + +# Copy miscellaneous scripts +sudo cp $IMAGE_CONFIGS/misc/docker-wait-any $FILESYSTEM_ROOT/usr/bin/ + +# Copy updategraph script and service file +j2 files/build_templates/updategraph.service.j2 | sudo tee $FILESYSTEM_ROOT/etc/systemd/system/updategraph.service +sudo cp $IMAGE_CONFIGS/updategraph/updategraph $FILESYSTEM_ROOT/usr/bin/ +echo "updategraph.service" | sudo tee -a $GENERATED_SERVICE_FILE +{% if enable_dhcp_graph_service == "y" %} +sudo bash -c "echo enabled=true > $FILESYSTEM_ROOT/etc/sonic/updategraph.conf" +sudo bash -c "echo src=dhcp >> $FILESYSTEM_ROOT/etc/sonic/updategraph.conf" +sudo bash -c "echo dhcp_as_static=true >> $FILESYSTEM_ROOT/etc/sonic/updategraph.conf" +{% else %} +sudo bash -c "echo enabled=false > $FILESYSTEM_ROOT/etc/sonic/updategraph.conf" +{% endif %} +sudo bash -c "echo '{ \"DEVICE_METADATA\": { \"localhost\": { \"default_bgp_status\": {% if shutdown_bgp_on_start == "y" %}\"down\"{% else %}\"up\"{% endif %}, \"default_pfcwd_status\": {% if enable_pfcwd_on_start == "y" %}\"enable\"{% else %}\"disable\"{% endif %} } }, +{%- print ' \\"CRM\\": { \\"Config\\": { \\"polling_interval\\": \\"300\\", ' %} +{%- for crm_res in ["ipv4_route", "ipv6_route", "ipv4_nexthop", "ipv6_nexthop", "ipv4_neighbor", "ipv6_neighbor", "nexthop_group_member", "nexthop_group", "acl_table", "acl_group", "acl_entry", "acl_counter", "fdb_entry"] -%} +\"{{crm_res}}_threshold_type\": \"percentage\", \"{{crm_res}}_low_threshold\": \"70\", \"{{crm_res}}_high_threshold\": \"85\"{% if not loop.last %}, {% endif %} +{%- endfor %} } } }' >> $FILESYSTEM_ROOT/etc/sonic/init_cfg.json" + +# Copy SNMP configuration files +sudo cp $IMAGE_CONFIGS/snmp/snmp.yml $FILESYSTEM_ROOT/etc/sonic/ + +# Copy ASN configuration files +sudo cp $IMAGE_CONFIGS/constants/constants.yml $FILESYSTEM_ROOT/etc/sonic/ + +# Copy sudoers configuration file +sudo cp $IMAGE_CONFIGS/sudoers/sudoers $FILESYSTEM_ROOT/etc/ +sudo cp $IMAGE_CONFIGS/sudoers/sudoers.lecture $FILESYSTEM_ROOT/etc/ + +# Copy control plane ACL management daemon files +sudo cp $IMAGE_CONFIGS/caclmgrd/caclmgrd.service $FILESYSTEM_ROOT/etc/systemd/system/ +echo "caclmgrd.service" | sudo tee -a $GENERATED_SERVICE_FILE +sudo cp $IMAGE_CONFIGS/caclmgrd/caclmgrd $FILESYSTEM_ROOT/usr/bin/ + +# Copy process/docker cpu/memory utilization data export daemon +sudo cp $IMAGE_CONFIGS/procdockerstatsd/procdockerstatsd.service $FILESYSTEM_ROOT/etc/systemd/system/ +echo "procdockerstatsd.service" | sudo tee -a $GENERATED_SERVICE_FILE +sudo cp $IMAGE_CONFIGS/procdockerstatsd/procdockerstatsd $FILESYSTEM_ROOT/usr/bin/ + +# Copy process-reboot-cause service files +sudo cp $IMAGE_CONFIGS/process-reboot-cause/process-reboot-cause.service $FILESYSTEM_ROOT/etc/systemd/system/ +echo "process-reboot-cause.service" | sudo tee -a $GENERATED_SERVICE_FILE +sudo cp $IMAGE_CONFIGS/process-reboot-cause/process-reboot-cause $FILESYSTEM_ROOT/usr/bin/ + +## Install package without starting service +## ref: https://wiki.debian.org/chroot +sudo tee -a $FILESYSTEM_ROOT/usr/sbin/policy-rc.d > /dev/null < /dev/null < /tmp/dhcp_graph_url + else + echo "N/A" > /tmp/dhcp_graph_url + fi + if [ -n "$new_acl_url" ]; then + echo $new_acl_url > /tmp/dhcp_acl_url + fi + ;; +esac diff --git a/files/dhcp/rfc3442-classless-routes b/files/dhcp/rfc3442-classless-routes new file mode 100644 index 00000000000..64e24192816 --- /dev/null +++ b/files/dhcp/rfc3442-classless-routes @@ -0,0 +1,63 @@ +# set classless routes based on the format specified in RFC3442 +# e.g.: +# new_rfc3442_classless_static_routes='24 192 168 10 192 168 1 1 8 10 10 17 66 41' +# specifies the routes: +# 192.168.10.0/24 via 192.168.1.1 +# 10.0.0.0/8 via 10.10.17.66.41 + +RUN="yes" + + +if [ "$RUN" = "yes" ]; then + if [ -n "$new_rfc3442_classless_static_routes" ]; then + if [ "$reason" = "BOUND" ] || [ "$reason" = "REBOOT" ]; then + + set -- $new_rfc3442_classless_static_routes + + while [ $# -gt 0 ]; do + net_length=$1 + via_arg='' + + case $net_length in + 32|31|30|29|28|27|26|25) + net_address="${2}.${3}.${4}.${5}" + gateway="${6}.${7}.${8}.${9}" + shift 9 + ;; + 24|23|22|21|20|19|18|17) + net_address="${2}.${3}.${4}.0" + gateway="${5}.${6}.${7}.${8}" + shift 8 + ;; + 16|15|14|13|12|11|10|9) + net_address="${2}.${3}.0.0" + gateway="${4}.${5}.${6}.${7}" + shift 7 + ;; + 8|7|6|5|4|3|2|1) + net_address="${2}.0.0.0" + gateway="${3}.${4}.${5}.${6}" + shift 6 + ;; + 0) # default route + net_address="0.0.0.0" + gateway="${2}.${3}.${4}.${5}" + shift 5 + ;; + *) # error + return 1 + ;; + esac + + # take care of link-local routes + if [ "${gateway}" != '0.0.0.0' ]; then + via_arg="via ${gateway}" + fi + + # set route (ip detects host routes automatically) + ip -4 route add "${net_address}/${net_length}" \ + ${via_arg} dev "${interface}" table default >/dev/null 2>&1 + done + fi + fi +fi diff --git a/files/dhcp/sethostname b/files/dhcp/sethostname new file mode 100644 index 00000000000..8cef7323945 --- /dev/null +++ b/files/dhcp/sethostname @@ -0,0 +1,12 @@ +case $reason in + BOUND|RENEW|REBIND|REBOOT) + current_host_name=`hostname -s` + if [ "$current_host_name" != "$new_host_name" ] && [ -n "$new_host_name" ] + then + echo $new_host_name > /etc/hostname + hostname -F /etc/hostname + sed -i "/\s$current_host_name$/d" /etc/hosts + echo "127.0.0.1 $new_host_name" >> /etc/hosts + fi + ;; +esac diff --git a/files/dhcp/snmpcommunity b/files/dhcp/snmpcommunity new file mode 100644 index 00000000000..63924e01fc5 --- /dev/null +++ b/files/dhcp/snmpcommunity @@ -0,0 +1,11 @@ +case $reason in + BOUND|RENEW|REBIND|REBOOT) + if [ -n "${new_snmp_community}" ]; then + if [ -f /etc/sonic/snmp.yml ]; then + sed -i "s/^snmp_rocommunity:.*/snmp_rocommunity: $new_snmp_community/g" /etc/sonic/snmp.yml + else + echo "snmp_rocommunity: "$new_snmp_community > /etc/sonic/snmp.yml + fi + fi + ;; +esac diff --git a/files/dhcp/vrf b/files/dhcp/vrf new file mode 100644 index 00000000000..b64a57c2b2c --- /dev/null +++ b/files/dhcp/vrf @@ -0,0 +1,234 @@ +# +# DHCLIENT exit hook for vrf support. +# +# Code ported from https://github.com/CumulusNetworks/vrf under GPLv2 license +# (see https://github.com/CumulusNetworks/vrf/blob/master/debian/copyright). +# + +# Get table_id for device enslaved to a vrf. +vrf_get_table_dev() +{ + local table_id + + # If vrf_slave is not in the output, device is not enslaved. + table_id=$(ip -o -d link show dev ${1} 2>/dev/null |\ + egrep ' vrf_slave table [0-9]*' |\ + sed -e 's/.*vrf_slave table \([0-9]*\) .*/\1/') + + [ -z "${table_id}" ] && return 1 + + echo ${table_id} + + return 0 +} + +# Get table_id for vrf device. +vrf_get_table() +{ + local table_id + + table_id=$(ip -o -d link show dev ${1} 2>/dev/null |\ + egrep ' vrf table [0-9]*' |\ + sed -e 's/.*vrf table \([0-9]*\) .*/\1/') + + [ -z "${table_id}" ] && return 1 + + echo ${table_id} + + return 0 +} + +vrf_exists() +{ + local vrf=${1} + local n + + [ "$vrf" = "default" ] && return 0 + + # ip link show dev type vrf happily returns 0 even though + # is not of type vrf. Hence the wc -l. + n=$(ip -br link show dev ${vrf} type vrf 2>/dev/null | wc -l) + [ ${n} -eq 1 ] && return 0 + + return $? +} + +# Check vrf device contains only alphanumeric characters. +get_vrf_arg() +{ + local vrf + + vrf=$(echo $1 | tr -cd [:alnum:]) + if [ "$vrf" != "$1" ]; then + echo "Invalid VRF" >&2 + return 1 + fi + + echo $vrf +} + +vrf_table() +{ + local table_id + local vrf + + vrf=$(get_vrf_arg ${1}) + [ $? -ne 0 ] && return 1 + + vrf_exists $vrf + if [ $? -eq 0 ]; then + vrf_get_table $vrf + return 0 + fi + + # Maybe this is a device, not a vrf. + table_id=$(vrf_get_table_dev $vrf) + if [ $? -eq 0 ]; then + echo ${table_id} + return 0 + fi + + return 1 +} + +table_id=$(vrf_table ${interface}) + +if [ -n "${table_id}" ]; then + +case "$reason" in + BOUND|RENEW|REBIND|REBOOT) + if [ -z "$old_ip_address" ] || + [ "$old_ip_address" != "$new_ip_address" ] || + [ "$reason" = "BOUND" ] || [ "$reason" = "REBOOT" ]; then + # If we have $new_rfc3442_classless_static_routes then we have to + # ignore $new_routers entirely. + if [ ! "$new_rfc3442_classless_static_routes" ]; then + # Set if_metric if IF_METRIC is set or there's more than one router. + if_metric="$IF_METRIC" + if [ "${new_routers%% *}" != "${new_routers}" ]; then + if_metric=${if_metric:-1} + fi + + for router in $new_routers; do + if [ "$new_subnet_mask" = "255.255.255.255" ]; then + # Set explicit route for p2p connection. + ip -4 route add table ${table_id} ${router} dev $interface >/dev/null 2>&1 + fi + + # Remove old default route should it remain from dhclient-script. + ip -4 route del default via ${router} dev ${interface} \ + ${if_metric:+metric $if_metric} >/dev/null 2>&1 + + # Set default route. + ip -4 route add table ${table_id} default via ${router} dev ${interface} \ + ${if_metric:+metric $if_metric} >/dev/null 2>&1 + + if [ -n "$if_metric" ]; then + if_metric=$((if_metric+1)) + fi + done + else + set -- $new_rfc3442_classless_static_routes + + while [ $# -gt 0 ]; do + net_length=$1 + via_arg='' + + case $net_length in + 32|31|30|29|28|27|26|25) + if [ $# -lt 9 ]; then + return 1 + fi + net_address="${2}.${3}.${4}.${5}" + gateway="${6}.${7}.${8}.${9}" + shift 9 + ;; + 24|23|22|21|20|19|18|17) + if [ $# -lt 8 ]; then + return 1 + fi + net_address="${2}.${3}.${4}.0" + gateway="${5}.${6}.${7}.${8}" + shift 8 + ;; + 16|15|14|13|12|11|10|9) + if [ $# -lt 7 ]; then + return 1 + fi + net_address="${2}.${3}.0.0" + gateway="${4}.${5}.${6}.${7}" + shift 7 + ;; + 8|7|6|5|4|3|2|1) + if [ $# -lt 6 ]; then + return 1 + fi + net_address="${2}.0.0.0" + gateway="${3}.${4}.${5}.${6}" + shift 6 + ;; + 0) # default route + if [ $# -lt 5 ]; then + return 1 + fi + net_address="0.0.0.0" + gateway="${2}.${3}.${4}.${5}" + shift 5 + ;; + *) # error + return 1 + ;; + esac + + # Take care of link-local routes. + if [ "${gateway}" != '0.0.0.0' ]; then + via_arg="via ${gateway}" + fi + + # Set route (ip detects host routes automatically). + ip -4 route add table ${table_id} "${net_address}/${net_length}" \ + ${via_arg} dev "${interface}" >/dev/null 2>&1 + done + fi + fi + + if [ -n "$alias_ip_address" ] && + [ "$new_ip_address" != "$alias_ip_address" ]; then + ip -4 route add table ${table_id} ${alias_ip_address} dev ${interface} >/dev/null 2>&1 + fi + ;; + + EXPIRE|FAIL|RELEASE|STOP) + if [ -n "$alias_ip_address" ]; then + ip -4 route add table ${table_id} ${alias_ip_address} dev ${interface} >/dev/null 2>&1 + fi + + ;; + + TIMEOUT) + # If there is no router recorded in the lease or the 1st router answers pings. + if [ -z "$new_routers" ] || ping -q -c 1 "${new_routers%% *}"; then + # If we have $new_rfc3442_classless_static_routes then we have to + # ignore $new_routers entirely. + if [ ! "$new_rfc3442_classless_static_routes" ]; then + if [ -n "$alias_ip_address" ] && + [ "$new_ip_address" != "$alias_ip_address" ]; then + ip -4 route add table ${table_id} ${alias_ip_address} dev ${interface} >/dev/null 2>&1 + fi + + # Set default route. + for router in $new_routers; do + ip -4 route add table ${table_id} default via ${router} dev ${interface} \ + ${if_metric:+metric $if_metric} >/dev/null 2>&1 + + if [ -n "$if_metric" ]; then + if_metric=$((if_metric+1)) + fi + done + fi + fi + + ;; +esac + +fi diff --git a/files/docker/README b/files/docker/README new file mode 100644 index 00000000000..d6a1ef008c2 --- /dev/null +++ b/files/docker/README @@ -0,0 +1,2 @@ +docker file is extracted from docker-ce 17.03.0~ce-0~debian-stretch to +enable 'service docker start' in the build chroot env. diff --git a/files/docker/docker b/files/docker/docker new file mode 100755 index 00000000000..4f9d38dda5c --- /dev/null +++ b/files/docker/docker @@ -0,0 +1,152 @@ +#!/bin/sh +set -e + +### BEGIN INIT INFO +# Provides: docker +# Required-Start: $syslog $remote_fs +# Required-Stop: $syslog $remote_fs +# Should-Start: cgroupfs-mount cgroup-lite +# Should-Stop: cgroupfs-mount cgroup-lite +# Default-Start: 2 3 4 5 +# Default-Stop: 0 1 6 +# Short-Description: Create lightweight, portable, self-sufficient containers. +# Description: +# Docker is an open-source project to easily create lightweight, portable, +# self-sufficient containers from any application. The same container that a +# developer builds and tests on a laptop can run at scale, in production, on +# VMs, bare metal, OpenStack clusters, public clouds and more. +### END INIT INFO + +export PATH=/sbin:/bin:/usr/sbin:/usr/bin:/usr/local/sbin:/usr/local/bin + +BASE=docker + +# modify these in /etc/default/$BASE (/etc/default/docker) +DOCKERD=/usr/bin/dockerd +# This is the pid file managed by docker itself +DOCKER_PIDFILE=/var/run/$BASE.pid +# This is the pid file created/managed by start-stop-daemon +DOCKER_SSD_PIDFILE=/var/run/$BASE-ssd.pid +DOCKER_LOGFILE=/var/log/$BASE.log +DOCKER_OPTS= +DOCKER_DESC="Docker" + +# Get lsb functions +. /lib/lsb/init-functions + +if [ -f /etc/default/$BASE ]; then + . /etc/default/$BASE +fi + +# Check docker is present +if [ ! -x $DOCKERD ]; then + log_failure_msg "$DOCKERD not present or not executable" + exit 1 +fi + +check_init() { + # see also init_is_upstart in /lib/lsb/init-functions (which isn't available in Ubuntu 12.04, or we'd use it directly) + if [ -x /sbin/initctl ] && /sbin/initctl version 2>/dev/null | grep -q upstart; then + log_failure_msg "$DOCKER_DESC is managed via upstart, try using service $BASE $1" + exit 1 + fi +} + +fail_unless_root() { + if [ "$(id -u)" != '0' ]; then + log_failure_msg "$DOCKER_DESC must be run as root" + exit 1 + fi +} + +cgroupfs_mount() { + # see also https://github.com/tianon/cgroupfs-mount/blob/master/cgroupfs-mount + if grep -v '^#' /etc/fstab | grep -q cgroup \ + || [ ! -e /proc/cgroups ] \ + || [ ! -d /sys/fs/cgroup ]; then + return + fi + if ! mountpoint -q /sys/fs/cgroup; then + mount -t tmpfs -o uid=0,gid=0,mode=0755 cgroup /sys/fs/cgroup + fi + ( + cd /sys/fs/cgroup + for sys in $(awk '!/^#/ { if ($4 == 1) print $1 }' /proc/cgroups); do + mkdir -p $sys + if ! mountpoint -q $sys; then + if ! mount -n -t cgroup -o $sys cgroup $sys; then + rmdir $sys || true + fi + fi + done + ) +} + +case "$1" in + start) + check_init + + fail_unless_root + + cgroupfs_mount + + touch "$DOCKER_LOGFILE" + chgrp docker "$DOCKER_LOGFILE" + + ulimit -n 1048576 + + # Having non-zero limits causes performance problems due to accounting overhead + # in the kernel. We recommend using cgroups to do container-local accounting. + if [ "$BASH" ]; then + ulimit -u unlimited + else + ulimit -p unlimited + fi + + log_begin_msg "Starting $DOCKER_DESC: $BASE" + start-stop-daemon --start --background \ + --no-close \ + --exec "$DOCKERD" \ + --pidfile "$DOCKER_SSD_PIDFILE" \ + --make-pidfile \ + -- \ + -p "$DOCKER_PIDFILE" \ + $DOCKER_OPTS \ + >> "$DOCKER_LOGFILE" 2>&1 + log_end_msg $? + ;; + + stop) + check_init + fail_unless_root + log_begin_msg "Stopping $DOCKER_DESC: $BASE" + start-stop-daemon --stop --pidfile "$DOCKER_SSD_PIDFILE" --retry 10 + log_end_msg $? + ;; + + restart) + check_init + fail_unless_root + docker_pid=`cat "$DOCKER_SSD_PIDFILE" 2>/dev/null` + [ -n "$docker_pid" ] \ + && ps -p $docker_pid > /dev/null 2>&1 \ + && $0 stop + $0 start + ;; + + force-reload) + check_init + fail_unless_root + $0 restart + ;; + + status) + check_init + status_of_proc -p "$DOCKER_SSD_PIDFILE" "$DOCKERD" "$DOCKER_DESC" + ;; + + *) + echo "Usage: service docker {start|stop|restart|status}" + exit 1 + ;; +esac diff --git a/files/docker/docker.service.conf b/files/docker/docker.service.conf index 2d6d3cfaa6f..e9ba55c8afa 100644 --- a/files/docker/docker.service.conf +++ b/files/docker/docker.service.conf @@ -1,3 +1,3 @@ [Service] ExecStart= -ExecStart=/usr/bin/docker daemon -H fd:// --storage-driver=aufs +ExecStart=/usr/bin/dockerd -H unix:// --storage-driver=overlay2 --bip=240.127.1.1/24 --iptables=false diff --git a/files/image_config/apt/sonic-dev.gpg.key b/files/image_config/apt/sonic-dev.gpg.key new file mode 100644 index 00000000000..fb9a37901bc --- /dev/null +++ b/files/image_config/apt/sonic-dev.gpg.key @@ -0,0 +1,30 @@ +-----BEGIN PGP PUBLIC KEY BLOCK----- +Version: GnuPG v1 + +mQENBFQ1bTIBCAC7oGfkv/ck0XsLuG8cdcSB2ISqxFAcBvH9BitEtxmpW2uhykKk +xY4rVD/4Uys1s3PF1/64QfPR+hYcewueOwz0ZAcLyFXXk4McICXaPq3NrLiWYKKX +UZLnrPzcrGZoW/kHDDp4OmBiDmT1PGvZlpuimwkMCusUzIr7Cbbp2dIy8MERL5tA +LcgLu3KL6clJ+aTW2jgepI1D7sTepOeGd7eRSb5njKg2M7k/93v/7MipZxiVtyXH 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http://debian-archive.trafficmanager.net/debian/ stretch main contrib non-free +deb [arch=amd64] http://debian-archive.trafficmanager.net/debian-security/ stretch/updates main contrib non-free +deb [arch=amd64] http://debian-archive.trafficmanager.net/debian/ stretch-backports main contrib non-free diff --git a/files/image_config/apt/sources.list.d/amd64/packages_microsoft_com_repos_sonic_dev.list b/files/image_config/apt/sources.list.d/amd64/packages_microsoft_com_repos_sonic_dev.list new file mode 100644 index 00000000000..468dcccc6ee --- /dev/null +++ b/files/image_config/apt/sources.list.d/amd64/packages_microsoft_com_repos_sonic_dev.list @@ -0,0 +1 @@ +deb [arch=amd64] http://packages.microsoft.com/repos/sonic-dev/ jessie main diff --git a/files/image_config/apt/sources.list.d/arm64/debian_mirror_arm64.list b/files/image_config/apt/sources.list.d/arm64/debian_mirror_arm64.list new file mode 100644 index 00000000000..773f58882ae --- /dev/null +++ b/files/image_config/apt/sources.list.d/arm64/debian_mirror_arm64.list @@ -0,0 +1,9 @@ +deb [arch=arm64] http://deb.debian.org/debian stretch main contrib non-free +deb-src [arch=arm64] http://deb.debian.org/debian stretch main contrib non-free +deb [arch=arm64] http://deb.debian.org/debian stretch-updates main contrib non-free +deb-src [arch=arm64] http://deb.debian.org/debian stretch-updates main contrib non-free +deb [arch=arm64] http://security.debian.org stretch/updates main contrib non-free +deb-src [arch=arm64] http://security.debian.org stretch/updates main contrib non-free +deb [arch=arm64] https://download.docker.com/linux/debian stretch stable +deb [arch=arm64] http://ftp.debian.org/debian stretch-backports main + diff --git a/files/image_config/apt/sources.list.d/armhf/debian_mirror_armhf.list b/files/image_config/apt/sources.list.d/armhf/debian_mirror_armhf.list new file mode 100644 index 00000000000..501419c6735 --- /dev/null +++ b/files/image_config/apt/sources.list.d/armhf/debian_mirror_armhf.list @@ -0,0 +1,9 @@ +deb [arch=armhf] http://deb.debian.org/debian stretch main contrib non-free +deb-src [arch=armhf] http://deb.debian.org/debian stretch main contrib non-free +deb [arch=armhf] http://deb.debian.org/debian stretch-updates main contrib non-free +deb-src [arch=armhf] http://deb.debian.org/debian stretch-updates main contrib non-free +deb [arch=armhf] http://security.debian.org stretch/updates main contrib non-free +deb-src [arch=armhf] http://security.debian.org stretch/updates main contrib non-free +deb [arch=armhf] https://download.docker.com/linux/debian stretch stable +deb [arch=armhf] http://ftp.debian.org/debian stretch-backports main + diff --git a/files/image_config/bash/bash.bashrc b/files/image_config/bash/bash.bashrc new file mode 100644 index 00000000000..6651a51ceed --- /dev/null +++ b/files/image_config/bash/bash.bashrc @@ -0,0 +1,58 @@ +# System-wide .bashrc file for interactive bash(1) shells. + +# To enable the settings / commands in this file for login shells as well, +# this file has to be sourced in /etc/profile. + +# If not running interactively, don't do anything +[ -z "$PS1" ] && return + +# check the window size after each command and, if necessary, +# update the values of LINES and COLUMNS. +shopt -s checkwinsize + +# set variable identifying the chroot you work in (used in the prompt below) +if [ -z "${debian_chroot:-}" ] && [ -r /etc/debian_chroot ]; then + debian_chroot=$(cat /etc/debian_chroot) +fi + +# set a fancy prompt (non-color, overwrite the one in /etc/profile) +PS1='${debian_chroot:+($debian_chroot)}\u@\h:\w\$ ' + +# Commented out, don't overwrite xterm -T "title" -n "icontitle" by default. +# If this is an xterm set the title to user@host:dir +#case "$TERM" in +#xterm*|rxvt*) +# PROMPT_COMMAND='echo -ne "\033]0;${USER}@${HOSTNAME}: ${PWD}\007"' +# ;; +#*) +# ;; +#esac + +# enable bash completion in interactive shells +if ! shopt -oq posix; then + if [ -f /usr/share/bash-completion/bash_completion ]; then + . /usr/share/bash-completion/bash_completion + elif [ -f /etc/bash_completion ]; then + . /etc/bash_completion + fi +fi + +# if the command-not-found package is installed, use it +if [ -x /usr/lib/command-not-found -o -x /usr/share/command-not-found/command-not-found ]; then + function command_not_found_handle { + # check because c-n-f could've been removed in the meantime + if [ -x /usr/lib/command-not-found ]; then + /usr/lib/command-not-found -- "$1" + return $? + elif [ -x /usr/share/command-not-found/command-not-found ]; then + /usr/share/command-not-found/command-not-found -- "$1" + return $? + else + printf "%s: command not found\n" "$1" >&2 + return 127 + fi + } +fi + +# Automatically log out console ttyS* sessions after 15 minutes of inactivity +tty | grep ttyS >/dev/null && TMOUT=900 diff --git a/files/image_config/caclmgrd/caclmgrd b/files/image_config/caclmgrd/caclmgrd new file mode 100755 index 00000000000..5e8d83074de --- /dev/null +++ b/files/image_config/caclmgrd/caclmgrd @@ -0,0 +1,297 @@ +#!/usr/bin/env python +# +# caclmgrd +# +# Control plane ACL manager daemon for SONiC +# +# Upon starting, this daemon reads control plane ACL tables and rules from +# Config DB, converts the rules into iptables rules and installs the iptables +# rules. The daemon then indefintely listens for notifications from Config DB +# and updates iptables rules if control plane ACL configuration has changed. +# + +try: + import ipaddr as ipaddress + import os + import subprocess + import sys + import syslog + from swsssdk import ConfigDBConnector +except ImportError as err: + raise ImportError("%s - required module not found" % str(err)) + +VERSION = "1.0" + +SYSLOG_IDENTIFIER = "caclmgrd" + + +# ========================== Syslog wrappers ========================== + +def log_info(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_INFO, msg) + syslog.closelog() + + +def log_warning(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_WARNING, msg) + syslog.closelog() + + +def log_error(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_ERR, msg) + syslog.closelog() + + +# ============================== Classes ============================== + +class ControlPlaneAclManager(object): + """ + Class which reads control plane ACL tables and rules from Config DB, + translates them into equivalent iptables commands and runs those + commands in order to apply the control plane ACLs. + + Attributes: + config_db: Handle to Config Redis database via SwSS SDK + """ + ACL_TABLE = "ACL_TABLE" + ACL_RULE = "ACL_RULE" + + ACL_TABLE_TYPE_CTRLPLANE = "CTRLPLANE" + + # To specify a port range, use iptables format: separate start and end + # ports with a colon, e.g., "1000:2000" + ACL_SERVICES = { + "NTP": {"ip_protocols": ["udp"], "dst_ports": ["123"]}, + "SNMP": {"ip_protocols": ["tcp", "udp"], "dst_ports": ["161"]}, + "SSH": {"ip_protocols": ["tcp"], "dst_ports": ["22"]} + } + + def __init__(self): + # Open a handle to the Config database + self.config_db = ConfigDBConnector() + self.config_db.connect() + + def run_commands(self, commands): + """ + Given a list of shell commands, run them in order + + Args: + commands: List of strings, each string is a shell command + """ + for cmd in commands: + proc = subprocess.Popen(cmd, shell=True) + + (stdout, stderr) = proc.communicate() + + if proc.returncode != 0: + log_error("Error running command '{}'".format(cmd)) + + def parse_int_to_tcp_flags(self, hex_value): + tcp_flags_str = "" + if hex_value & 0x01: + tcp_flags_str += "FIN," + if hex_value & 0x02: + tcp_flags_str += "SYN," + if hex_value & 0x04: + tcp_flags_str += "RST," + if hex_value & 0x08: + tcp_flags_str += "PSH," + if hex_value & 0x10: + tcp_flags_str += "ACK," + if hex_value & 0x20: + tcp_flags_str += "URG," + # iptables doesn't handle the flags below now. It has some special keys for it: + # --ecn-tcp-cwr This matches if the TCP ECN CWR (Congestion Window Received) bit is set. + # --ecn-tcp-ece This matches if the TCP ECN ECE (ECN Echo) bit is set. + # if hex_value & 0x40: + # tcp_flags_str += "ECE," + # if hex_value & 0x80: + # tcp_flags_str += "CWR," + + # Delete the trailing comma + tcp_flags_str = tcp_flags_str[:-1] + return tcp_flags_str + + def get_acl_rules_and_translate_to_iptables_commands(self): + """ + Retrieves current ACL tables and rules from Config DB, translates + control plane ACLs into a list of iptables commands that can be run + in order to install ACL rules. + + Returns: + A list of strings, each string is an iptables shell command + + """ + iptables_cmds = [] + + # First, add iptables commands to set default policies to accept all + # traffic. In case we are connected remotely, the connection will not + # drop when we flush the current rules + iptables_cmds.append("iptables -P INPUT ACCEPT") + iptables_cmds.append("iptables -P FORWARD ACCEPT") + iptables_cmds.append("iptables -P OUTPUT ACCEPT") + + # Add iptables command to flush the current rules + iptables_cmds.append("iptables -F") + + # Add iptables command to delete all non-default chains + iptables_cmds.append("iptables -X") + + # Add same set of commands for ip6tables + iptables_cmds.append("ip6tables -P INPUT ACCEPT") + iptables_cmds.append("ip6tables -P FORWARD ACCEPT") + iptables_cmds.append("ip6tables -P OUTPUT ACCEPT") + iptables_cmds.append("ip6tables -F") + iptables_cmds.append("ip6tables -X") + + # Add iptables commands to allow all IPv4 and IPv6 traffic from localhost + iptables_cmds.append("iptables -A INPUT -s 127.0.0.1 -i lo -j ACCEPT") + iptables_cmds.append("ip6tables -A INPUT -s ::1 -i lo -j ACCEPT") + + # Get current ACL tables and rules from Config DB + self._tables_db_info = self.config_db.get_table(self.ACL_TABLE) + self._rules_db_info = self.config_db.get_table(self.ACL_RULE) + + # Walk the ACL tables + for (table_name, table_data) in self._tables_db_info.iteritems(): + + table_ip_version = None + + # Ignore non-control-plane ACL tables + if table_data["type"] != self.ACL_TABLE_TYPE_CTRLPLANE: + continue + + acl_services = table_data["services"] + + for acl_service in acl_services: + if acl_service not in self.ACL_SERVICES: + log_warning("Ignoring control plane ACL '{}' with unrecognized service '{}'" + .format(table_name, acl_service)) + continue + + log_info("Translating ACL rules for control plane ACL '{}' (service: '{}')" + .format(table_name, acl_service)) + + # Obtain default IP protocol(s) and destination port(s) for this service + ip_protocols = self.ACL_SERVICES[acl_service]["ip_protocols"] + dst_ports = self.ACL_SERVICES[acl_service]["dst_ports"] + + acl_rules = {} + + for ((rule_table_name, rule_id), rule_props) in self._rules_db_info.iteritems(): + if rule_table_name == table_name: + if not rule_props: + log_warning("rule_props for rule_id {} empty or null!".format(rule_id)) + continue + + try: + acl_rules[rule_props["PRIORITY"]] = rule_props + except KeyError: + log_error("rule_props for rule_id {} does not have key 'PRIORITY'!".format(rule_id)) + continue + + # If we haven't determined the IP version for this ACL table yet, + # try to do it now. We determine heuristically based on whether the + # src IP is an IPv4 or IPv6 address. + if not table_ip_version and "SRC_IP" in rule_props and rule_props["SRC_IP"]: + ip_addr = ipaddress.IPAddress(rule_props["SRC_IP"].split("/")[0]) + if isinstance(ip_addr, ipaddress.IPv6Address): + table_ip_version = 6 + elif isinstance(ip_addr, ipaddress.IPv4Address): + table_ip_version = 4 + + # If we were unable to determine whether this ACL table contains + # IPv4 or IPv6 rules, log a message and skip processing this table. + if not table_ip_version: + log_warning("Unable to determine if ACL table '{}' contains IPv4 or IPv6 rules. Skipping table..." + .format(table_name)) + continue + + # For each ACL rule in this table (in descending order of priority) + for priority in sorted(acl_rules.iterkeys(), reverse=True): + rule_props = acl_rules[priority] + + if "PACKET_ACTION" not in rule_props: + log_error("ACL rule does not contain PACKET_ACTION property") + continue + + # Apply the rule to the default protocol(s) for this ACL service + for ip_protocol in ip_protocols: + for dst_port in dst_ports: + rule_cmd = "ip6tables" if table_ip_version == 6 else "iptables" + rule_cmd += " -A INPUT -p {}".format(ip_protocol) + + if "SRC_IP" in rule_props and rule_props["SRC_IP"]: + rule_cmd += " -s {}".format(rule_props["SRC_IP"]) + + rule_cmd += " --dport {}".format(dst_port) + + # If there are TCP flags present and ip protocol is TCP, append them + if ip_protocol == "tcp" and "TCP_FLAGS" in rule_props and rule_props["TCP_FLAGS"]: + tcp_flags, tcp_flags_mask = rule_props["TCP_FLAGS"].split("/") + + tcp_flags = int(tcp_flags, 16) + tcp_flags_mask = int(tcp_flags_mask, 16) + + if tcp_flags_mask > 0: + rule_cmd += " --tcp-flags {mask} {flags}".format(mask = self.parse_int_to_tcp_flags(tcp_flags_mask), flags = self.parse_int_to_tcp_flags(tcp_flags)) + + # Append the packet action as the jump target + rule_cmd += " -j {}".format(rule_props["PACKET_ACTION"]) + + iptables_cmds.append(rule_cmd) + + return iptables_cmds + + def update_control_plane_acls(self): + """ + Convenience wrapper which retrieves current ACL tables and rules from + Config DB, translates control plane ACLs into a list of iptables + commands and runs them. + """ + iptables_cmds = self.get_acl_rules_and_translate_to_iptables_commands() + + log_info("Issuing the following iptables commands:") + for cmd in iptables_cmds: + log_info(" " + cmd) + + self.run_commands(iptables_cmds) + + def notification_handler(self, key, data): + log_info("ACL configuration changed. Updating iptables rules for control plane ACLs...") + self.update_control_plane_acls() + + def run(self): + # Unconditionally update control plane ACLs once at start + self.update_control_plane_acls() + + # Subscribe to notifications when ACL tables or rules change + self.config_db.subscribe(self.ACL_TABLE, + lambda table, key, data: self.notification_handler(key, data)) + self.config_db.subscribe(self.ACL_RULE, + lambda table, key, data: self.notification_handler(key, data)) + + # Indefinitely listen for Config DB notifications + self.config_db.listen() + + +# ============================= Functions ============================= + +def main(): + log_info("Starting up...") + + if not os.geteuid() == 0: + log_error("Must be root to run this daemon") + print "Error: Must be root to run this daemon" + sys.exit(1) + + # Instantiate a ControlPlaneAclManager object + caclmgr = ControlPlaneAclManager() + caclmgr.run() + + +if __name__ == "__main__": + main() diff --git a/files/image_config/caclmgrd/caclmgrd.service b/files/image_config/caclmgrd/caclmgrd.service new file mode 100644 index 00000000000..f385384375c --- /dev/null +++ b/files/image_config/caclmgrd/caclmgrd.service @@ -0,0 +1,11 @@ +[Unit] +Description=Control Plane ACL configuration daemon +Requires=updategraph.service +After=updategraph.service + +[Service] +Type=simple +ExecStart=/usr/bin/caclmgrd + +[Install] +WantedBy=multi-user.target diff --git a/files/image_config/constants/constants.yml b/files/image_config/constants/constants.yml new file mode 100644 index 00000000000..3834717a8bf --- /dev/null +++ b/files/image_config/constants/constants.yml @@ -0,0 +1,4 @@ +constants: + deployment_id_asn_map: + "1" : 65432 + traffic_shift_community: 12345:12345 diff --git a/files/image_config/cron.d/core_cleanup b/files/image_config/cron.d/core_cleanup new file mode 100644 index 00000000000..8db064ea57d --- /dev/null +++ b/files/image_config/cron.d/core_cleanup @@ -0,0 +1,3 @@ +# Attempts to clean up core files every 2 hours +0 */2 * * * root /usr/bin/core_cleanup.py > /dev/null 2>&1 + diff --git a/files/image_config/cron.d/logrotate b/files/image_config/cron.d/logrotate new file mode 100644 index 00000000000..173a2abe2bd --- /dev/null +++ b/files/image_config/cron.d/logrotate @@ -0,0 +1,3 @@ +# Attempt to rotate system logs once every 10 minutes. +# First kill any logrotate process(es) if they are still running, as they're most likely hung +*/10 * * * * root /usr/bin/pkill -9 logrotate > /dev/null 2>&1; /usr/sbin/logrotate /etc/logrotate.conf > /dev/null 2>&1 diff --git a/files/image_config/ebtables/ebtables.filter b/files/image_config/ebtables/ebtables.filter new file mode 100644 index 00000000000..4faad1f5f4b Binary files /dev/null and b/files/image_config/ebtables/ebtables.filter differ diff --git a/files/image_config/environment/environment b/files/image_config/environment/environment new file mode 100644 index 00000000000..6c85276371b --- /dev/null +++ b/files/image_config/environment/environment @@ -0,0 +1 @@ +VTYSH_PAGER=more diff --git a/files/image_config/environment/motd b/files/image_config/environment/motd new file mode 100644 index 00000000000..8562e330fe2 --- /dev/null +++ b/files/image_config/environment/motd @@ -0,0 +1,14 @@ +You are on + ____ ___ _ _ _ ____ + / ___| / _ \| \ | (_)/ ___| + \___ \| | | | \| | | | + ___) | |_| | |\ | | |___ + |____/ \___/|_| \_|_|\____| + +-- Software for Open Networking in the Cloud -- + +Unauthorized access and/or use are prohibited. +All access and/or use are subject to monitoring. + +Help: http://azure.github.io/SONiC/ + diff --git a/files/image_config/fstrim/fstrim.service b/files/image_config/fstrim/fstrim.service new file mode 100644 index 00000000000..cf740d3af34 --- /dev/null +++ b/files/image_config/fstrim/fstrim.service @@ -0,0 +1,6 @@ +[Unit] +Description=Discard unused blocks + +[Service] +Type=oneshot +ExecStart=/sbin/fstrim -av diff --git a/files/image_config/fstrim/fstrim.timer b/files/image_config/fstrim/fstrim.timer new file mode 100644 index 00000000000..c6142dd9482 --- /dev/null +++ b/files/image_config/fstrim/fstrim.timer @@ -0,0 +1,12 @@ +[Unit] +Description=Discard unused blocks once a week +Documentation=man:fstrim + +[Timer] +OnCalendar=weekly +OnBootSec=10min +AccuracySec=1h +Persistent=true + +[Install] +WantedBy=multi-user.target diff --git a/files/image_config/hostcfgd/common-auth-sonic.j2 b/files/image_config/hostcfgd/common-auth-sonic.j2 new file mode 100644 index 00000000000..e609296d4e0 --- /dev/null +++ b/files/image_config/hostcfgd/common-auth-sonic.j2 @@ -0,0 +1,43 @@ +#THIS IS AN AUTO-GENERATED FILE +# +# /etc/pam.d/common-auth- authentication settings common to all services +# This file is included from other service-specific PAM config files, +# and should contain a list of the authentication modules that define +# the central authentication scheme for use on the system +# (e.g., /etc/shadow, LDAP, Kerberos, etc.). The default is to use the +# traditional Unix authentication mechanisms. +# +# here are the per-package modules (the "Primary" block) + +{% if auth['login'] == 'local' %} +auth [success=1 default=ignore] pam_unix.so nullok try_first_pass + +{% elif auth['login'] == 'local,tacacs+' %} +auth [success=done new_authtok_reqd=done default=ignore{{ ' auth_err=die' if not auth['failthrough'] }}] pam_unix.so nullok try_first_pass +{% for server in servers | sub(0, -1) %} +auth [success=done new_authtok_reqd=done default=ignore{{ ' auth_err=die' if not auth['failthrough'] }}] pam_tacplus.so server={{ server.ip }}:{{ server.tcp_port }} secret={{ server.passkey }} login={{ server.auth_type }} timeout={{ server.timeout }} {% if server.vrf %} vrf={{ server.vrf }} {% endif %} try_first_pass +{% endfor %} +{% if servers | count %} +{% set last_server = servers | last %} +auth [success=1 default=ignore] pam_tacplus.so server={{ last_server.ip }}:{{ last_server.tcp_port }} secret={{ last_server.passkey }} login={{ last_server.auth_type }} timeout={{ last_server.timeout }} {% if last_server.vrf %} vrf={{ last_server.vrf }} {% endif %} try_first_pass + +{% endif %} +{% elif auth['login'] == 'tacacs+' or auth['login'] == 'tacacs+,local' %} +{% for server in servers %} +auth [success=done new_authtok_reqd=done default=ignore{{ ' auth_err=die' if not auth['failthrough'] }}] pam_tacplus.so server={{ server.ip }}:{{ server.tcp_port }} secret={{ server.passkey }} login={{ server.auth_type }} timeout={{ server.timeout }} {%if server.vrf %} vrf={{ server.vrf }} {% endif %} try_first_pass +{% endfor %} +auth [success=1 default=ignore] pam_unix.so nullok try_first_pass + +{% else %} +auth [success=1 default=ignore] pam_unix.so nullok try_first_pass + +{% endif %} +# +# here's the fallback if no module succeeds +auth requisite pam_deny.so +# prime the stack with a positive return value if there isn't one already; +# this avoids us returning an error just because nothing sets a success code +# since the modules above will each just jump around +auth required pam_permit.so +# and here are more per-package modules (the "Additional" block) + diff --git a/files/image_config/hostcfgd/hostcfgd b/files/image_config/hostcfgd/hostcfgd new file mode 100755 index 00000000000..7fa8ed2ba20 --- /dev/null +++ b/files/image_config/hostcfgd/hostcfgd @@ -0,0 +1,363 @@ +#!/usr/bin/python -u +# -*- coding: utf-8 -*- + +import os +import re +import sys +import subprocess +import syslog +import copy +import jinja2 +import ipaddr as ipaddress +from swsssdk import ConfigDBConnector + +# FILE +PAM_AUTH_CONF = "/etc/pam.d/common-auth-sonic" +PAM_AUTH_CONF_TEMPLATE = "/usr/share/sonic/templates/common-auth-sonic.j2" +NSS_TACPLUS_CONF = "/etc/tacplus_nss.conf" +NSS_TACPLUS_CONF_TEMPLATE = "/usr/share/sonic/templates/tacplus_nss.conf.j2" +NSS_CONF = "/etc/nsswitch.conf" + +# TACACS+ +TACPLUS_SERVER_PASSKEY_DEFAULT = "" +TACPLUS_SERVER_TIMEOUT_DEFAULT = "5" +TACPLUS_SERVER_AUTH_TYPE_DEFAULT = "pap" + + +def is_valid_hostname(hostname): + if hostname[-1] == "." or len(hostname) > 253: + return False + allowed = re.compile("(?!-)[A-Z\d-]{1,63}(? /etc/hostname +hostname -F /etc/hostname + +# Remove the old hostname entry from hosts file. +# But, 'localhost' entry is used by multiple applications. Don't remove it altogether. +# Edit contents of /etc/hosts and put in /etc/hosts.new +if [ $CURRENT_HOSTNAME != "localhost" ] || [ $CURRENT_HOSTNAME == $HOSTNAME ] ; then + sed "/\s$CURRENT_HOSTNAME$/d" /etc/hosts > /etc/hosts.new +else + cp -f /etc/hosts /etc/hosts.new +fi + +echo "127.0.0.1 $HOSTNAME" >> /etc/hosts.new + +# Swap file: hosts.new and hosts +mv -f /etc/hosts /etc/hosts.old +mv -f /etc/hosts.new /etc/hosts diff --git a/files/image_config/interfaces/init_interfaces b/files/image_config/interfaces/init_interfaces new file mode 100644 index 00000000000..9d251045b5e --- /dev/null +++ b/files/image_config/interfaces/init_interfaces @@ -0,0 +1,8 @@ +# Initial /etc/network/interface file for first boot +# Will be overwritten based on minigraph information by interfaces-config service + +# The loopback network interface +auto lo +iface lo inet loopback +# +# Disable the management network interface during boot up diff --git a/files/image_config/interfaces/interfaces-config.service b/files/image_config/interfaces/interfaces-config.service new file mode 100644 index 00000000000..71178affdee --- /dev/null +++ b/files/image_config/interfaces/interfaces-config.service @@ -0,0 +1,11 @@ +[Unit] +Description=Update interfaces configuration +Requires=updategraph.service +After=updategraph.service + +[Service] +Type=oneshot +ExecStart=/usr/bin/interfaces-config.sh + +[Install] +WantedBy=multi-user.target diff --git a/files/image_config/interfaces/interfaces-config.sh b/files/image_config/interfaces/interfaces-config.sh new file mode 100755 index 00000000000..a702917419c --- /dev/null +++ b/files/image_config/interfaces/interfaces-config.sh @@ -0,0 +1,11 @@ +#!/bin/bash + +ifdown --force eth0 + +sonic-cfggen -d -t /usr/share/sonic/templates/interfaces.j2 > /etc/network/interfaces + +[ -f /var/run/dhclient.eth0.pid ] && kill `cat /var/run/dhclient.eth0.pid` && rm -f /var/run/dhclient.eth0.pid + +systemctl restart networking + +ifdown lo && ifup lo diff --git a/files/image_config/interfaces/interfaces.j2 b/files/image_config/interfaces/interfaces.j2 new file mode 100644 index 00000000000..91be4437fc0 --- /dev/null +++ b/files/image_config/interfaces/interfaces.j2 @@ -0,0 +1,77 @@ +# +{% block banner %} +# =============== Managed by SONiC Config Engine DO NOT EDIT! =============== +# generated from /usr/share/sonic/templates/interfaces.j2 using sonic-cfggen +# file: /etc/network/interfaces +# +{% endblock banner %} +{% if (MGMT_VRF_CONFIG) and (MGMT_VRF_CONFIG['vrf_global']['mgmtVrfEnabled'] == "true") %} +auto mgmt +iface mgmt + vrf-table 5000 +{% endif %} +{% block loopback %} +# The loopback network interface +auto lo +iface lo inet loopback +{% if (MGMT_VRF_CONFIG) and (MGMT_VRF_CONFIG['vrf_global']['mgmtVrfEnabled'] == "true") %} +# The loopback network interface for mgmt VRF that is required for applications like NTP + up ip link add lo-m type dummy + up ip addr add 127.0.0.1/8 dev lo-m + up ip link set lo-m up + up ip link set dev lo-m master mgmt + down ip link delete dev lo-m +{% endif %} +{% endblock loopback %} +{% block mgmt_interface %} + +# The management network interface +auto eth0 +{% if MGMT_INTERFACE %} +{% for (name, prefix) in MGMT_INTERFACE|pfx_filter %} +iface eth0 {{ 'inet' if prefix | ipv4 else 'inet6' }} static + address {{ prefix | ip }} + netmask {{ prefix | netmask if prefix | ipv4 else prefix | prefixlen }} +{% set vrf_table = 'default' %} +{% if (MGMT_VRF_CONFIG) and (MGMT_VRF_CONFIG['vrf_global']['mgmtVrfEnabled'] == "true") %} +{% set vrf_table = '5000' %} + vrf mgmt +{% endif %} + ########## management network policy routing rules + # management port up rules + up ip {{ '-4' if prefix | ipv4 else '-6' }} route add default via {{ MGMT_INTERFACE[(name, prefix)]['gwaddr'] }} dev eth0 table {{ vrf_table }} metric 201 + up ip {{ '-4' if prefix | ipv4 else '-6' }} route add {{ prefix | network }}/{{ prefix | prefixlen }} dev eth0 table {{ vrf_table }} + up ip {{ '-4' if prefix | ipv4 else '-6' }} rule add from {{ prefix | ip }}/{{ '32' if prefix | ipv4 else '128' }} table {{ vrf_table }} +{% if (MGMT_VRF_CONFIG) and (MGMT_VRF_CONFIG['vrf_global']['mgmtVrfEnabled'] == "true") %} + up cgcreate -g l3mdev:mgmt + up cgset -r l3mdev.master-device=mgmt mgmt +{% endif %} +{% for route in MGMT_INTERFACE[(name, prefix)]['forced_mgmt_routes'] %} + up ip rule add to {{ route }} table {{ vrf_table }} +{% endfor %} + # management port down rules + down ip {{ '-4' if prefix | ipv4 else '-6' }} route delete default via {{ MGMT_INTERFACE[(name, prefix)]['gwaddr'] }} dev eth0 table {{ vrf_table }} + down ip {{ '-4' if prefix | ipv4 else '-6' }} route delete {{ prefix | network }}/{{ prefix | prefixlen }} dev eth0 table {{ vrf_table }} + down ip {{ '-4' if prefix | ipv4 else '-6' }} rule delete from {{ prefix | ip }}/{{ '32' if prefix | ipv4 else '128' }} table {{ vrf_table }} +{% if (MGMT_VRF_CONFIG) and (MGMT_VRF_CONFIG['vrf_global']['mgmtVrfEnabled'] == "true") %} + down cgdelete -g l3mdev:mgmt +{% endif %} +{% for route in MGMT_INTERFACE[(name, prefix)]['forced_mgmt_routes'] %} + down ip rule delete to {{ route }} table {{ vrf_table }} +{% endfor %} +{# TODO: COPP policy type rules #} +{% endfor %} +{% else %} +iface eth0 inet dhcp + metric 202 +{% if (MGMT_VRF_CONFIG) and (MGMT_VRF_CONFIG['vrf_global']['mgmtVrfEnabled'] == "true") %} + vrf mgmt + up cgcreate -g l3mdev:mgmt + up cgset -r l3mdev.master-device=mgmt mgmt + down cgdelete -g l3mdev:mgmt +{% endif %} +{% endif %} +# +source /etc/network/interfaces.d/* +# +{% endblock mgmt_interface %} diff --git a/files/image_config/logrotate/logrotate.conf b/files/image_config/logrotate/logrotate.conf new file mode 100644 index 00000000000..6f107e20983 --- /dev/null +++ b/files/image_config/logrotate/logrotate.conf @@ -0,0 +1,32 @@ +# see "man logrotate" for details +# Rotate log files daily by default +daily + +# Keep 4 days worth of backlogs by default +rotate 4 + +# create new (empty) log files after rotating old ones +create + +# uncomment this if you want your log files compressed +#compress + +# packages drop log rotation information into this directory +include /etc/logrotate.d + +# no packages own wtmp, or btmp -- we'll rotate them here +/var/log/wtmp { + missingok + size 100k + create 0664 root utmp + rotate 1 +} + +/var/log/btmp { + missingok + size 100k + create 0660 root utmp + rotate 1 +} + +# system-specific logs may be configured here diff --git a/files/image_config/logrotate/logrotate.d/apt b/files/image_config/logrotate/logrotate.d/apt new file mode 100644 index 00000000000..7584dcacc88 --- /dev/null +++ b/files/image_config/logrotate/logrotate.d/apt @@ -0,0 +1,15 @@ +/var/log/apt/term.log { + size 100k + rotate 1 + compress + missingok + notifempty +} + +/var/log/apt/history.log { + size 100k + rotate 1 + compress + missingok + notifempty +} diff --git a/files/image_config/logrotate/logrotate.d/dpkg b/files/image_config/logrotate/logrotate.d/dpkg new file mode 100644 index 00000000000..5e24c7ed74e --- /dev/null +++ b/files/image_config/logrotate/logrotate.d/dpkg @@ -0,0 +1,18 @@ +/var/log/dpkg.log { + size 100k + rotate 1 + compress + delaycompress + missingok + notifempty + create 644 root root +} +/var/log/alternatives.log { + size 100k + rotate 1 + compress + delaycompress + missingok + notifempty + create 644 root root +} diff --git a/files/image_config/logrotate/logrotate.d/monit b/files/image_config/logrotate/logrotate.d/monit new file mode 100644 index 00000000000..7846dfadb77 --- /dev/null +++ b/files/image_config/logrotate/logrotate.d/monit @@ -0,0 +1,12 @@ +/var/log/monit.log { + size 100k + rotate 1 + missingok + create 640 root adm + notifempty + compress + delaycompress + postrotate + invoke-rc.d monit reload > /dev/null + endscript +} diff --git a/files/image_config/logrotate/logrotate.d/rsyslog b/files/image_config/logrotate/logrotate.d/rsyslog new file mode 100644 index 00000000000..76737ba1442 --- /dev/null +++ b/files/image_config/logrotate/logrotate.d/rsyslog @@ -0,0 +1,93 @@ +# These logs should no longer get created. However, in case they do get created, +# we should keep them to a small size and rotate them also. +/var/log/mail.info +/var/log/mail.warn +/var/log/mail.err +/var/log/mail.log +/var/log/daemon.log +/var/log/kern.log +/var/log/user.log +/var/log/lpr.log +/var/log/debug +/var/log/messages +{ + size 10k + rotate 1 + missingok + notifempty + compress + delaycompress + sharedscripts + postrotate + /bin/kill -HUP $(cat /var/run/rsyslogd.pid) + endscript +} + +/var/log/auth.log +/var/log/cron.log +/var/log/syslog +/var/log/teamd.log +/var/log/telemetry.log +/var/log/quagga/bgpd.log +/var/log/quagga/zebra.log +/var/log/swss/sairedis.rec +/var/log/swss/swss.rec +{ + size 1M + rotate 5000 + missingok + notifempty + compress + delaycompress + nosharedscripts + firstaction + # Adjust NUM_LOGS_TO_ROTATE to reflect number of log files that trigger this block specified above + NUM_LOGS_TO_ROTATE=8 + + # Adjust LOG_FILE_ROTATE_SIZE_KB to reflect the "size" parameter specified above, in kB + LOG_FILE_ROTATE_SIZE_KB=1024 + + # Reserve space for btmp, wtmp, dpkg.log, monit.log, etc., as well as logs that + # should be disabled, just in case they get created and rotated + RESERVED_SPACE_KB=4096 + + VAR_LOG_SIZE_KB=$(df -k /var/log | sed -n 2p | awk '{ print $2 }') + + # Limit usable space to 90% of the partition minus the reserved space for other logs + USABLE_SPACE_KB=$(( (VAR_LOG_SIZE_KB * 90 / 100) - RESERVED_SPACE_KB)) + + # Set our threshold so as to maintain enough space to write all logs from empty to full + # Most likely, some logs will have non-zero size when this is called, so this errs on the side + # of caution, giving us a bit of a cushion if a log grows quickly and passes its rotation size + THRESHOLD_KB=$((USABLE_SPACE_KB - (NUM_LOGS_TO_ROTATE * LOG_FILE_ROTATE_SIZE_KB * 2))) + + # First, delete any *.1.gz files that might be left around from a prior incomplete + # logrotate execution, otherwise logrotate will fail to do its job + find /var/log/ -name '*.1.gz' -type f -exec rm -f {} + + + while true; do + USED_KB=$(du -s /var/log | awk '{ print $1; }') + + if [ $USED_KB -lt $THRESHOLD_KB ]; then + break + else + OLDEST_ARCHIVE_FILE=$(find /var/log -type f -printf '%T+ %p\n' | grep -E '.+\.[0-9]+(\.gz)?$' | sort | head -n 1 | awk '{ print $2; }') + + if [ -z "$OLDEST_ARCHIVE_FILE" ]; then + logger -p syslog.err -t "logrotate" "No archive file to delete -- potential for filling up /var/log partition!" + break + fi + + logger -p syslog.info -t "logrotate" "Deleting archive file $OLDEST_ARCHIVE_FILE to free up space" + rm -rf "$OLDEST_ARCHIVE_FILE" + fi + done + endscript + postrotate + if [ $(echo $1 | grep -c "/var/log/swss/") -gt 0 ]; then + pgrep -x orchagent | xargs /bin/kill -HUP 2>/dev/null || true + else + /bin/kill -HUP $(cat /var/run/rsyslogd.pid) + fi + endscript +} diff --git a/files/image_config/misc/docker-wait-any b/files/image_config/misc/docker-wait-any new file mode 100755 index 00000000000..3988a9fbdf5 --- /dev/null +++ b/files/image_config/misc/docker-wait-any @@ -0,0 +1,62 @@ +#!/usr/bin/env python + +""" + docker-wait-any + This script takes one or more Docker container names as arguments, + and it will block indefinitely while all of the specified containers + are running. If any of the specified containers stop, the script will + exit. + This script was created because the 'docker wait' command is lacking + this functionality. It will block until ALL specified containers have + stopped running. Here, we spawn multiple threads and wait on one + container per thread. If any of the threads exit, the entire + application will exit. + NOTE: This script is written against docker-py version 1.6.0. Newer + versions of docker-py have a different API. +""" + +import sys +import threading +from docker import Client + +# Instantiate a global event to share among our threads +g_thread_exit_event = threading.Event() + + +def usage(): + print("Usage: {} [ ...]".format(sys.argv[0])) + sys.exit(1) + + +def wait_for_container(docker_client, container_name): + docker_client.wait(container_name) + + print("No longer waiting on container '{}'".format(container_name)) + + # Signal the main thread to exit + g_thread_exit_event.set() + + +def main(): + thread_list = [] + + docker_client = Client(base_url='unix://var/run/docker.sock') + + # Ensure we were passed at least one argument + if len(sys.argv) < 2: + usage() + + container_names = sys.argv[1:] + + for container_name in container_names: + t = threading.Thread(target=wait_for_container, args=[docker_client, container_name]) + t.daemon = True + t.start() + thread_list.append(t) + + # Wait until we receive an event signifying one of the containers has stopped + g_thread_exit_event.wait() + sys.exit(0) + +if __name__ == '__main__': + main() diff --git a/files/image_config/monit/monitrc b/files/image_config/monit/monitrc new file mode 100644 index 00000000000..f9350733fa4 --- /dev/null +++ b/files/image_config/monit/monitrc @@ -0,0 +1,308 @@ +############################################################################### +## Monit control file +############################################################################### +## +## Comments begin with a '#' and extend through the end of the line. Keywords +## are case insensitive. All path's MUST BE FULLY QUALIFIED, starting with '/'. +## +## Below you will find examples of some frequently used statements. For +## information about the control file and a complete list of statements and +## options, please have a look in the Monit manual. +## +## +############################################################################### +## Global section +############################################################################### +## +## Start Monit in the background (run as a daemon): +# + set daemon 120 # check services at 2-minute intervals +# with start delay 240 # optional: delay the first check by 4-minutes (by +# # default Monit check immediately after Monit start) +# +# +## Set syslog logging. If you want to log to a standalone log file instead, +## specify the full path to the log file +# +# set logfile /var/log/monit.log +set logfile syslog +# +# +## Set the location of the Monit lock file which stores the process id of the +## running Monit instance. By default this file is stored in $HOME/.monit.pid +# +# set pidfile /var/run/monit.pid +# +## Set the location of the Monit id file which stores the unique id for the +## Monit instance. The id is generated and stored on first Monit start. By +## default the file is placed in $HOME/.monit.id. +# +# set idfile /var/.monit.id + set idfile /var/lib/monit/id +# +## Set the location of the Monit state file which saves monitoring states +## on each cycle. By default the file is placed in $HOME/.monit.state. If +## the state file is stored on a persistent filesystem, Monit will recover +## the monitoring state across reboots. If it is on temporary filesystem, the +## state will be lost on reboot which may be convenient in some situations. +# + set statefile /var/lib/monit/state +# +# + +## Set limits for various tests. The following example shows the default values: +## +# set limits { +# programOutput: 512 B, # check program's output truncate limit +# sendExpectBuffer: 256 B, # limit for send/expect protocol test +# fileContentBuffer: 512 B, # limit for file content test +# httpContentBuffer: 1 MB, # limit for HTTP content test +# networkTimeout: 5 seconds # timeout for network I/O +# programTimeout: 300 seconds # timeout for check program +# stopTimeout: 30 seconds # timeout for service stop +# startTimeout: 30 seconds # timeout for service start +# restartTimeout: 30 seconds # timeout for service restart +# } + +## Set global SSL options (just most common options showed, see manual for +## full list). +# +# set ssl { +# verify : enable, # verify SSL certificates (disabled by default but STRONGLY RECOMMENDED) +# selfsigned : allow # allow self signed SSL certificates (reject by default) +# } +# +# +## Set the list of mail servers for alert delivery. Multiple servers may be +## specified using a comma separator. If the first mail server fails, Monit +# will use the second mail server in the list and so on. By default Monit uses +# port 25 - it is possible to override this with the PORT option. +# +# set mailserver mail.bar.baz, # primary mailserver +# backup.bar.baz port 10025, # backup mailserver on port 10025 +# localhost # fallback relay +# +# +## By default Monit will drop alert events if no mail servers are available. +## If you want to keep the alerts for later delivery retry, you can use the +## EVENTQUEUE statement. The base directory where undelivered alerts will be +## stored is specified by the BASEDIR option. You can limit the queue size +## by using the SLOTS option (if omitted, the queue is limited by space +## available in the back end filesystem). +# + set eventqueue + basedir /var/lib/monit/events # set the base directory where events will be stored + slots 100 # optionally limit the queue size +# +# +## Send status and events to M/Monit (for more informations about M/Monit +## see https://mmonit.com/). By default Monit registers credentials with +## M/Monit so M/Monit can smoothly communicate back to Monit and you don't +## have to register Monit credentials manually in M/Monit. It is possible to +## disable credential registration using the commented out option below. +## Though, if safety is a concern we recommend instead using https when +## communicating with M/Monit and send credentials encrypted. The password +## should be URL encoded if it contains URL-significant characters like +## ":", "?", "@". +# +# set mmonit http://monit:monit@192.168.1.10:8080/collector +# # and register without credentials # Don't register credentials +# +# +## Monit by default uses the following format for alerts if the the mail-format +## statement is missing:: +## --8<-- +## set mail-format { +## from: Monit +## subject: monit alert -- $EVENT $SERVICE +## message: $EVENT Service $SERVICE +## Date: $DATE +## Action: $ACTION +## Host: $HOST +## Description: $DESCRIPTION +## +## Your faithful employee, +## Monit +## } +## --8<-- +## +## You can override this message format or parts of it, such as subject +## or sender using the MAIL-FORMAT statement. Macros such as $DATE, etc. +## are expanded at runtime. For example, to override the sender, use: +# +# set mail-format { from: monit@foo.bar } +# +# +## You can set alert recipients whom will receive alerts if/when a +## service defined in this file has errors. Alerts may be restricted on +## events by using a filter as in the second example below. +# +# set alert sysadm@foo.bar # receive all alerts +# +## Do not alert when Monit starts, stops or performs a user initiated action. +## This filter is recommended to avoid getting alerts for trivial cases. +# +# set alert your-name@your.domain not on { instance, action } +# +# +## Monit has an embedded HTTP interface which can be used to view status of +## services monitored and manage services from a web interface. The HTTP +## interface is also required if you want to issue Monit commands from the +## command line, such as 'monit status' or 'monit restart service' The reason +## for this is that the Monit client uses the HTTP interface to send these +## commands to a running Monit daemon. See the Monit Wiki if you want to +## enable SSL for the HTTP interface. +# +set httpd unixsocket /var/run/monit.sock and + allow localhost # allow localhost to connect to the server and +# +############################################################################### +## Services +############################################################################### +## +## Check general system resources such as load average, cpu and memory +## usage. Each test specifies a resource, conditions and the action to be +## performed should a test fail. +# +# check system $HOST +# if loadavg (1min) > 4 then alert +# if loadavg (5min) > 2 then alert +# if cpu usage > 95% for 10 cycles then alert +# if memory usage > 75% then alert +# if swap usage > 25% then alert +# +# +## Check if a file exists, checksum, permissions, uid and gid. In addition +## to alert recipients in the global section, customized alert can be sent to +## additional recipients by specifying a local alert handler. The service may +## be grouped using the GROUP option. More than one group can be specified by +## repeating the 'group name' statement. +# +# check file apache_bin with path /usr/local/apache/bin/httpd +# if failed checksum and +# expect the sum 8f7f419955cefa0b33a2ba316cba3659 then unmonitor +# if failed permission 755 then unmonitor +# if failed uid root then unmonitor +# if failed gid root then unmonitor +# alert security@foo.bar on { +# checksum, permission, uid, gid, unmonitor +# } with the mail-format { subject: Alarm! } +# group server +# +# +## Check that a process is running, in this case Apache, and that it respond +## to HTTP and HTTPS requests. Check its resource usage such as cpu and memory, +## and number of children. If the process is not running, Monit will restart +## it by default. In case the service is restarted very often and the +## problem remains, it is possible to disable monitoring using the TIMEOUT +## statement. This service depends on another service (apache_bin) which +## is defined above. +# +# check process apache with pidfile /usr/local/apache/logs/httpd.pid +# start program = "/etc/init.d/httpd start" with timeout 60 seconds +# stop program = "/etc/init.d/httpd stop" +# if cpu > 60% for 2 cycles then alert +# if cpu > 80% for 5 cycles then restart +# if totalmem > 200.0 MB for 5 cycles then restart +# if children > 250 then restart +# if loadavg(5min) greater than 10 for 8 cycles then stop +# if failed host www.tildeslash.com port 80 protocol http +# and request "/somefile.html" +# then restart +# if failed port 443 protocol https with timeout 15 seconds then restart +# if 3 restarts within 5 cycles then unmonitor +# depends on apache_bin +# group server +# +# +## Check filesystem permissions, uid, gid, space and inode usage. Other services, +## such as databases, may depend on this resource and an automatically graceful +## stop may be cascaded to them before the filesystem will become full and data +## lost. +# +# check filesystem datafs with path /dev/sdb1 +# start program = "/bin/mount /data" +# stop program = "/bin/umount /data" +# if failed permission 660 then unmonitor +# if failed uid root then unmonitor +# if failed gid disk then unmonitor +# if space usage > 80% for 5 times within 15 cycles then alert +# if space usage > 99% then stop +# if inode usage > 30000 then alert +# if inode usage > 99% then stop +# group server +# +# +## Check a file's timestamp. In this example, we test if a file is older +## than 15 minutes and assume something is wrong if its not updated. Also, +## if the file size exceed a given limit, execute a script +# +# check file database with path /data/mydatabase.db +# if failed permission 700 then alert +# if failed uid data then alert +# if failed gid data then alert +# if timestamp > 15 minutes then alert +# if size > 100 MB then exec "/my/cleanup/script" as uid dba and gid dba +# +# +## Check directory permission, uid and gid. An event is triggered if the +## directory does not belong to the user with uid 0 and gid 0. In addition, +## the permissions have to match the octal description of 755 (see chmod(1)). +# +# check directory bin with path /bin +# if failed permission 755 then unmonitor +# if failed uid 0 then unmonitor +# if failed gid 0 then unmonitor +# +# +## Check a remote host availability by issuing a ping test and check the +## content of a response from a web server. Up to three pings are sent and +## connection to a port and an application level network check is performed. +# +# check host myserver with address 192.168.1.1 +# if failed ping then alert +# if failed port 3306 protocol mysql with timeout 15 seconds then alert +# if failed port 80 protocol http +# and request /some/path with content = "a string" +# then alert +# +# +## Check a network link status (up/down), link capacity changes, saturation +## and bandwidth usage. +# +# check network public with interface eth0 +# if failed link then alert +# if changed link then alert +# if saturation > 90% then alert +# if download > 10 MB/s then alert +# if total uploaded > 1 GB in last hour then alert +# +# +## Check custom program status output. +# +# check program myscript with path /usr/local/bin/myscript.sh +# if status != 0 then alert +# +# +############################################################################### +## Includes +############################################################################### +## +## It is possible to include additional configuration parts from other files or +## directories. +# + include /etc/monit/conf.d/* + include /etc/monit/conf-enabled/* +# +check filesystem root-overlay with path / + if space usage > 90% for 5 times within 10 cycles then alert +check filesystem var-log with path /var/log + if space usage > 90% for 5 times within 10 cycles then alert +check system $HOST + if memory usage > 90% for 5 times within 10 cycles then alert + if cpu usage (user) > 90% for 5 times within 10 cycles then alert + if cpu usage (system) > 90% for 5 times within 10 cycles then alert +check process rsyslog with pidfile /var/run/rsyslogd.pid + start program = "/bin/systemctl start rsyslog.service" + stop program = "/bin/systemctl stop rsyslog.service" + if totalmem > 800 MB for 5 times within 10 cycles then restart diff --git a/files/image_config/ntp/ntp b/files/image_config/ntp/ntp new file mode 100755 index 00000000000..ecf0e508907 --- /dev/null +++ b/files/image_config/ntp/ntp @@ -0,0 +1,91 @@ +#!/bin/sh + +# This file was originally created automatically as part of default NTP application installation from debian package. +# This is now manually modified for supporting NTP in management VRF. +# When management VRF is enabled, the NTP application should be started using "cgexec -g l3mdev:mgmt". +# Check has been added to verify the management VRF enabled status and use cgexec when it is enabled. +# This file will be copied on top of the etc/init.d/ntp file that gets created during build process. + +### BEGIN INIT INFO +# Provides: ntp +# Required-Start: $network $remote_fs $syslog +# Required-Stop: $network $remote_fs $syslog +# Default-Start: 2 3 4 5 +# Default-Stop: +# Short-Description: Start NTP daemon +### END INIT INFO + +PATH=/sbin:/bin:/usr/sbin:/usr/bin + +. /lib/lsb/init-functions + +DAEMON=/usr/sbin/ntpd +PIDFILE=/var/run/ntpd.pid + +test -x $DAEMON || exit 5 + +if [ -r /etc/default/ntp ]; then + . /etc/default/ntp +fi + +if [ -e /run/ntp.conf.dhcp ]; then + NTPD_OPTS="$NTPD_OPTS -c /run/ntp.conf.dhcp" +fi + + +LOCKFILE=/run/lock/ntpdate + +RUNASUSER=ntp +UGID=$(getent passwd $RUNASUSER | cut -f 3,4 -d:) || true +if test "$(uname -s)" = "Linux"; then + NTPD_OPTS="$NTPD_OPTS -u $UGID" +fi + +case $1 in + start) + log_daemon_msg "Starting NTP server" "ntpd" + if [ -z "$UGID" ]; then + log_failure_msg "user \"$RUNASUSER\" does not exist" + exit 1 + fi + ( + flock -w 180 9 + vrfEnabled=$(/usr/local/bin/sonic-cfggen -d -v 'MGMT_VRF_CONFIG["vrf_global"]["mgmtVrfEnabled"]' 2> /dev/null) + if [ "$vrfEnabled" = "true" ] + then + log_daemon_msg "Starting NTP server in mgmt-vrf" "ntpd" + cgexec -g l3mdev:mgmt start-stop-daemon --start --quiet --oknodo --pidfile $PIDFILE --startas $DAEMON -- -p $PIDFILE $NTPD_OPTS + else + log_daemon_msg "Starting NTP server in default-vrf" "ntpd" + start-stop-daemon --start --quiet --oknodo --pidfile $PIDFILE --startas $DAEMON -- -p $PIDFILE $NTPD_OPTS + fi + ) 9>$LOCKFILE + log_end_msg $? + ;; + stop) + log_daemon_msg "Stopping NTP server" "ntpd" + start-stop-daemon --stop --quiet --oknodo --pidfile $PIDFILE --retry=TERM/30/KILL/5 --exec $DAEMON + log_end_msg $? + rm -f $PIDFILE + ;; + restart|force-reload) + $0 stop && sleep 2 && $0 start + ;; + try-restart) + if $0 status >/dev/null; then + $0 restart + else + exit 0 + fi + ;; + reload) + exit 3 + ;; + status) + status_of_proc $DAEMON "NTP server" + ;; + *) + echo "Usage: $0 {start|stop|restart|try-restart|force-reload|status}" + exit 2 + ;; +esac diff --git a/files/image_config/ntp/ntp-config.service b/files/image_config/ntp/ntp-config.service new file mode 100644 index 00000000000..c86710e3d20 --- /dev/null +++ b/files/image_config/ntp/ntp-config.service @@ -0,0 +1,11 @@ +[Unit] +Description=Update NTP configuration +Requires=updategraph.service +After=updategraph.service + +[Service] +Type=oneshot +ExecStart=/usr/bin/ntp-config.sh + +[Install] +WantedBy=multi-user.target diff --git a/files/image_config/ntp/ntp-config.sh b/files/image_config/ntp/ntp-config.sh new file mode 100755 index 00000000000..601b7bd421f --- /dev/null +++ b/files/image_config/ntp/ntp-config.sh @@ -0,0 +1,5 @@ +#!/bin/bash + +sonic-cfggen -d -t /usr/share/sonic/templates/ntp.conf.j2 >/etc/ntp.conf + +systemctl restart ntp diff --git a/files/image_config/ntp/ntp.conf.j2 b/files/image_config/ntp/ntp.conf.j2 new file mode 100644 index 00000000000..cef6527fc28 --- /dev/null +++ b/files/image_config/ntp/ntp.conf.j2 @@ -0,0 +1,76 @@ +############################################################################### +# Managed by Ansible +# file: ansible/roles/acs/templates/ntp.conf.j2 +############################################################################### + +# /etc/ntp.conf, configuration for ntpd; see ntp.conf(5) for help + +driftfile /var/lib/ntp/ntp.drift + + +# Enable this if you want statistics to be logged. +#statsdir /var/log/ntpstats/ + +statistics loopstats peerstats clockstats +filegen loopstats file loopstats type day enable +filegen peerstats file peerstats type day enable +filegen clockstats file clockstats type day enable + + +# You do need to talk to an NTP server or two (or three). +#server ntp.your-provider.example + +# pool.ntp.org maps to about 1000 low-stratum NTP servers. Your server will +# pick a different set every time it starts up. Please consider joining the +# pool: +{% for ntp_server in NTP_SERVER %} +server {{ ntp_server }} iburst +{% endfor %} + +#only listen on MGMT_INTERFACE, LOOPBACK_INTERFACE ip when MGMT_INTERFACE is not defined, or eth0 +# if we don't have both of them (default is to listen on all ip addresses) +interface ignore wildcard +{% if MGMT_INTERFACE %} +{% for (mgmt_intf, mgmt_prefix) in MGMT_INTERFACE|pfx_filter %} +interface listen {{ mgmt_prefix | ip }} +{% endfor %} +{% elif LOOPBACK_INTERFACE %} +{% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} +{% if prefix | ipv4 and name == 'Loopback0' %} +interface listen {{ prefix | ip }} +{% endif %} +{% endfor %} +{% else %} +interface listen eth0 +{% endif %} +interface listen 127.0.0.1 + +# Access control configuration; see /usr/share/doc/ntp-doc/html/accopt.html for +# details. The web page +# might also be helpful. +# +# Note that "restrict" applies to both servers and clients, so a configuration +# that might be intended to block requests from certain clients could also end +# up blocking replies from your own upstream servers. + +# By default, exchange time with everybody, but don't allow configuration. +restrict -4 default kod notrap nomodify nopeer noquery +restrict -6 default kod notrap nomodify nopeer noquery + +# Local users may interrogate the ntp server more closely. +restrict 127.0.0.1 +restrict ::1 + +# Clients from this (example!) subnet have unlimited access, but only if +# cryptographically authenticated. +#restrict 192.168.123.0 mask 255.255.255.0 notrust + + +# If you want to provide time to your local subnet, change the next line. +# (Again, the address is an example only.) +#broadcast 192.168.123.255 + +# If you want to listen to time broadcasts on your local subnet, de-comment the +# next lines. Please do this only if you trust everybody on the network! +#disable auth +#broadcastclient diff --git a/files/image_config/platform/linux_kernel_bde.conf b/files/image_config/platform/linux_kernel_bde.conf new file mode 100644 index 00000000000..5f2b1c4e644 --- /dev/null +++ b/files/image_config/platform/linux_kernel_bde.conf @@ -0,0 +1 @@ +blacklist linux_kernel_bde diff --git a/files/image_config/platform/rc.local b/files/image_config/platform/rc.local new file mode 100755 index 00000000000..b74e9f40c4b --- /dev/null +++ b/files/image_config/platform/rc.local @@ -0,0 +1,334 @@ +#!/bin/sh -x +# +# rc.local +# +# This script is executed at the end of each multiuser runlevel. +# Make sure that the script will "exit 0" on success or any other +# value on error. +# +# In order to enable or disable this script just change the execution +# bits. +# +# By default this script does nothing. + +SONIC_VERSION=$(sonic-cfggen -y /etc/sonic/sonic_version.yml -v build_version) +FIRST_BOOT_FILE="/host/image-${SONIC_VERSION}/platform/firsttime" + +# In case the unit is migrating from another NOS, save the logs +log_migration() { + echo $1 >> /host/migration/migration.log +} + +# Import files from another NOS's partition onto SONiC +nos_migration_import() { + [ -f $1 ] && cp $1 $2 || log_migration "ERROR: $1 not found!" +} + +# While migrating form another NOS, we need to preserve the MAC addresses +# of eth0 (and eventually switchports). +# Update the eth0 mac and also the EEPROM using ethtool so that subsequent +# reboots use the NOS's mac. +# Input : mgmt_interface.cfg file imported from the previous NOS. +update_mgmt_interface_macaddr() { + mgmt_config=$1 + if [ ! -f "$mgmt_config" ]; then + log_migration "ERROR : unable update eth0 MAC : $mgmt_config not found!" + return + fi + + # Save the previous NOS's mac + old_mac=`ip link show eth0 | grep ether | awk '{print $2}'` + [ -z "$old_mac" ] && log_migration "Unable to retrieve old mac address !" && return + + # Extract, validate and set the eth0's mac address for the current session + new_mac=$(grep "macaddr" $mgmt_config | awk -F'=' '{print $2}') + log_migration "Setting eth0 mac as $new_mac." + if [ `echo $new_mac | egrep "^([0-9a-fA-F]{2}:){5}[0-9a-fA-F]{2}$"` ]; then + ip link set eth0 down + ip link set eth0 address $new_mac + ip link set eth0 up + else + log_migration "ERROR: mac imported from NOS is invalid : $new_mac !" + return + fi + + # Get the ethtool magic and offset for changing the mac address in the EEPROM + ethtool_magic=$(grep "ethtool_magic" $mgmt_config | awk -F'=' '{print $2}') + ethtool_offset=$(grep "ethtool_offset" $mgmt_config | awk -F'=' '{print $2}') + if [ -z "$ethtool_magic" ] || [ -z "$ethtool_offset" ]; then + log_migration "Unable to retrieve ethtool params ($ethtool_magic,$ethtool_offset)" + return + fi + + log_migration "eth0 mac in EEPROM before update:" + ethtool -e eth0 offset $ethtool_offset length 6 >> /host/migration/migration.log + + # Update the mac address in the EEPROM for subsequent reboots + # Write only changed octets + for i in 1 2 3 4 5 6; do + offset=$(($ethtool_offset+$i-1)) + old_mac_octet="$(echo $old_mac | cut -d":" -f$i)" + new_mac_octet="$(echo $new_mac | cut -d":" -f$i)" + + if [ "$old_mac_octet" != "$new_mac_octet" ]; then + ethtool -E eth0 magic $ethtool_magic offset $offset value 0x$new_mac_octet + if [ $? != 0 ]; then + log_migration "ERROR: unable to update eth0 EEPROM!" + log_migration "index $i, magic $ethtool_magic offset $offset, value $new_mac_octet" + return + fi + fi + done + + log_migration "eth0 mac in EEPROM after update:" + ethtool -e eth0 offset $ethtool_offset length 6 >> /host/migration/migration.log + + # Update the 70-persistent-net.rules with the new mac for eth0 + log_migration "/etc/udev/rules.d/70-persistent-net.rules : replacing $old_mac with $new_mac for eth0" + sed -i "/eth0/ s/ATTR{address}==\"$old_mac\"/ATTR{address}==\"$new_mac\"/g" /etc/udev/rules.d/70-persistent-net.rules +} + +firsttime_exit() { + rm -rf $FIRST_BOOT_FILE + exit 0 +} + +# Given a string of tuples of the form field=value, extract the value for a field +# In : $string, $field +# Out: $value +value_extract() { + set -- $string + for x in "$@"; do + case "$x" in + $field=*) + value="${x#$field=}" + esac + done +} + +program_console_speed() +{ + speed=$(cat /proc/cmdline | grep -Eo 'console=ttyS[0-9]+,[0-9]+' | cut -d "," -f2) + if [ -z "$speed" ]; then + CONSOLE_SPEED=9600 + else + CONSOLE_SPEED=$speed + fi + + sed -i "s|\-\-keep\-baud .* %I| $CONSOLE_SPEED %I|g" /lib/systemd/system/serial-getty@.service + systemctl daemon-reload +} + +#### Begin Main Body #### + +logger "SONiC version ${SONIC_VERSION} starting up..." + +# If the machine.conf is absent, it indicates that the unit booted +# into SONiC from another NOS. Extract the machine.conf from ONIE. +if [ ! -e /host/machine.conf ]; then + mkdir -p /host/migration + + onie_dev=$(blkid | grep ONIE-BOOT | head -n 1 | awk '{print $1}' | sed -e 's/:.*$//') + mkdir -p /mnt/onie-boot + mount $onie_dev /mnt/onie-boot + onie_grub_cfg=/mnt/onie-boot/onie/grub/grub-machine.cfg + + if [ ! -e $onie_grub_cfg ]; then + log_migration "$onie_grub_cfg not found" + else + . ./$onie_grub_cfg + grep = $onie_grub_cfg | sed -e 's/onie_//' -e 's/=.*$//' | while read var ; do + eval val='$'onie_$var + echo "onie_${var}=${val}" >> /host/machine.conf + done + fi + + # Extract the previous NOS's partition that contains the migration artifacts + set -- $(cat /proc/cmdline) + for x in "$@"; do + case "$x" in + nos-config-part=*) + nos_val="${x#nos-config-part=}" + ;; + esac + done + + if [ -n "$nos_val" ]; then + nos_dev=$(findfs $nos_val) + if [ $? != 0 ]; then + log_migration "ERROR: nos_dev not found. Check grub parameters" + fi + else + log_migration "ERROR: nos_val not found. Check grub parameters" + fi + + if [ -n "$nos_dev" ]; then + # Mount the previous NOS's partition + NOS_DIR=/mnt/nos_migration + MG_GZFILE=$NOS_DIR/minigraph.xml.gz.base64.txt + MG_FILE=$NOS_DIR/minigraph.xml + ACL_GZFILE=$NOS_DIR/acl.json.gz.base64.txt + ACL_FILE=$NOS_DIR/acl.json + SNMP_FILE=$NOS_DIR/snmp.yml + mkdir -p $NOS_DIR + mount $nos_dev $NOS_DIR + mkdir -p /host/fast-reboot + + # decode & unzip minigraph.xml.gz.base64.txt + [ -f $MG_GZFILE ] && /usr/bin/base64 -d $MG_GZFILE | /bin/gunzip > $MG_FILE + [ -f $ACL_GZFILE ] && /usr/bin/base64 -d $ACL_GZFILE | /bin/gunzip > $ACL_FILE + + # Copy relevant files + nos_migration_import $NOS_DIR/mgmt_interface.cfg /host/migration + nos_migration_import $MG_FILE /host/migration + nos_migration_import $ACL_FILE /host/migration + nos_migration_import $SNMP_FILE /host/migration + nos_migration_import $NOS_DIR/arp.json /host/fast-reboot + nos_migration_import $NOS_DIR/fdb.json /host/fast-reboot + nos_migration_import $NOS_DIR/default_routes.json /host/fast-reboot + + umount $NOS_DIR + rmdir $NOS_DIR + fi + + update_mgmt_interface_macaddr /host/migration/mgmt_interface.cfg + + migration="TRUE" + umount /mnt/onie-boot +fi + +. /host/machine.conf + +program_console_speed + +if [ -f $FIRST_BOOT_FILE ]; then + + echo "First boot detected. Performing first boot tasks..." + + if [ -n "$aboot_platform" ]; then + platform=$aboot_platform + elif [ -n "$onie_platform" ]; then + platform=$onie_platform + else + echo "Unknown SONiC platform" + firsttime_exit + fi + + # Try to take old configuration saved during installation + # and create a flag in /tmp/ to let updategraph service know + if [ -d /host/old_config ]; then + mv -f /host/old_config /etc/sonic/ + rm -rf /etc/sonic/old_config/old_config + touch /tmp/pending_config_migration + elif [ -f /host/minigraph.xml ]; then + mkdir -p /etc/sonic/old_config + mv /host/minigraph.xml /etc/sonic/old_config/ + [ -f /host/acl.json ] && mv /host/acl.json /etc/sonic/old_config/ + [ -f /host/snmp.yml ] && mv /host/snmp.yml /etc/sonic/old_config/ + touch /tmp/pending_config_migration + elif [ -n "$migration" ] && [ -f /host/migration/minigraph.xml ]; then + mkdir -p /etc/sonic/old_config + mv /host/migration/minigraph.xml /etc/sonic/old_config/ + [ -f /host/migration/acl.json ] && mv /host/migration/acl.json /etc/sonic/old_config/ + [ -f /host/migration/snmp.yml ] && mv /host/migration/snmp.yml /etc/sonic/old_config/ + touch /tmp/pending_config_migration + [ -f /etc/sonic/updategraph.conf ] && sed -i -e "s/enabled=false/enabled=true/g" /etc/sonic/updategraph.conf + else + touch /tmp/pending_config_initialization + fi + + # Notify firstboot to Platform, to use it for reboot-cause + touch /tmp/notify_firstboot_to_platform + + if [ -d /host/image-$SONIC_VERSION/platform/$platform ]; then + dpkg -i /host/image-$SONIC_VERSION/platform/$platform/*.deb + fi + + sync + + # If the unit booted into SONiC from another NOS's grub, + # we now install a grub for SONiC. + if [ -n "$onie_platform" ] && [ -n "$migration" ]; then + + grub_bin=$(ls /host/image-$SONIC_VERSION/platform/x86_64-grub/grub-pc-bin*.deb 2> /dev/null) + if [ -z "$grub_bin" ]; then + log_migration "Unable to locate grub package !" + firsttime_exit + fi + + dpkg -i $grub_bin > /dev/null 2>&1 + if [ $? != 0 ]; then + log_migration "Unable to install grub package !" + firsttime_exit + fi + + # Determine the block device to install grub + sonic_dev=$(blkid | grep SONiC-OS | head -n 1 | awk '{print $1}' | sed -e 's/[0-9]:.*$//') + if [ -z "$sonic_dev" ]; then + log_migration "Unable to determine sonic partition !" + firsttime_exit + fi + + grub-install --boot-directory=/host --recheck $sonic_dev 2>/dev/null + if [ $? != 0 ]; then + log_migration "grub install failed !" + firsttime_exit + fi + + # The SONiC "raw" build mode has already generated a proto grub.cfg + # as part of the migration. Platform specific constants need to be + # retrieved from installer.conf (if present) and assigned. + . /usr/share/sonic/device/$platform/installer.conf + + if [ ! -z "$CONSOLE_PORT" ]; then + field="\-\-port" + string=$(grep $field /host/grub.cfg) + value_extract $string $field + console_port=$value + if [ ! -z "$console_port" ] && [ "$console_port" != "$CONSOLE_PORT" ]; then + sed -i -e "s/\-\-port=$console_port/\-\-port=$CONSOLE_PORT/g" /host/grub.cfg + fi + log_migration "grub.cfg console port=$console_port & installer.conf CONSOLE_PORT=$CONSOLE_PORT" + fi + + if [ ! -z "$CONSOLE_DEV" ]; then + field="console" + string=$(grep $field /host/grub.cfg) + value_extract $string $field + console_dev_name=$(echo $value | sed -e "s/^.*=//" -e "s/,.*//") + console_dev="${console_dev_name#ttyS}" + if [ "$console_dev" != "$CONSOLE_DEV" ]; then + sed -i -e "s/console=ttyS$console_dev/console=ttyS$CONSOLE_DEV/g" /host/grub.cfg + fi + log_migration "grub.cfg console dev=$console_dev & installer.conf CONSOLE_DEV=$CONSOLE_DEV" + fi + + if [ ! -z "$VAR_LOG_SIZE" ]; then + field="var_log_size" + string=$(grep $field /host/grub.cfg) + value_extract $string $field + var_log_size=$value + if [ ! -z "$var_log_size" ] && [ "$var_log_size" != "$VAR_LOG_SIZE" ]; then + sed -i -e "s/var_log_size=$var_log_size/var_log_size=$VAR_LOG_SIZE/g" /host/grub.cfg + fi + log_migration "grub.cfg var_log_size=$var_log_size & installer.conf VAR_LOG_SIZE=$VAR_LOG_SIZE" + fi + + # Set the root based on the label + sonic_root=$(blkid | grep SONiC-OS | head -n 1 | awk '{print $1}' | sed -e 's/:.*$//') + sonic_root=$(echo "$sonic_root" | sed 's/\//\\\//g') + sed -i -e "s/%%SONIC_ROOT%%/$sonic_root/g" /host/grub.cfg + + # Add the Diag and ONIE entries + mount $onie_dev /mnt/onie-boot + . /mnt/onie-boot/onie/grub.d/50_onie_grub >> /host/grub.cfg + umount /mnt/onie-boot + + # Initialize the SONiC's grub config + mv /host/grub.cfg /host/grub/grub.cfg + fi + + firsttime_exit +fi + +exit 0 diff --git a/files/image_config/procdockerstatsd/procdockerstatsd b/files/image_config/procdockerstatsd/procdockerstatsd new file mode 100644 index 00000000000..66d2d45009d --- /dev/null +++ b/files/image_config/procdockerstatsd/procdockerstatsd @@ -0,0 +1,214 @@ +# !/usr/bin/env python +''' +procdockerstatsd +Daemon which periodically gathers process and docker statistics and pushes the data to STATE_DB +''' + +import os +import re +import subprocess +import sys +import syslog +import time +from datetime import datetime + +import swsssdk + +VERSION = '1.0' + +SYSLOG_IDENTIFIER = "procdockerstatsd" + +REDIS_HOSTIP = "127.0.0.1" + +# ========================== Syslog wrappers ========================== +def log_info(msg, also_print_to_console=False): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_INFO, msg) + syslog.closelog() + +def log_warning(msg, also_print_to_console=False): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_WARNING, msg) + syslog.closelog() + +def log_error(msg, also_print_to_console=False): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_ERR, msg) + syslog.closelog() + +# ========================== ProcessDocker class ========================== +class ProcDockerStats: + + def __init__(self): + self.state_db = swsssdk.SonicV2Connector(host=REDIS_HOSTIP) + self.state_db.connect("STATE_DB") + + def run_command(self, cmd): + proc = subprocess.Popen(cmd, shell=True, stdout=subprocess.PIPE) + (stdout, stderr) = proc.communicate() + if proc.returncode != 0: + log_error("Error running command '{}'".format(cmd)) + return None + else: + return stdout + + def format_docker_cmd_output(self, cmdout): + lines = re.split("\n", cmdout) + keys = re.split(" +", lines[0]) + docker_data = dict() + docker_data_list = [] + for item in lines[1:]: + values1 = re.split(" +", item) + docker_data = dict(zip(keys, values1)) + docker_data_list.append(docker_data) + formatted_dict = self.create_docker_dict(docker_data_list) + return formatted_dict + + def format_process_cmd_output(self, cmdout): + lines = re.split("\n", cmdout) + keys = re.split(" +", lines[0]) + keylist = list(filter(None, keys)) + process_data = dict() + process_data_list = [] + for item in lines[1:]: + values1 = re.split(" +", str(item)) + # To remove extra space before UID + val = list(filter(None, values1)) + # Merging extra columns created due to space in cmd ouput + val[8:] = [''.join(val[8:])] + process_data = dict(zip(keylist, val)) + process_data_list.append(process_data) + return process_data_list + + def convert_to_bytes(self, value): + unit_value = re.search('[a-zA-Z]+', value) + value_to_convert = float(filter(str.isdigit, value)) + unit = unit_value.group(0) + UNITS_B = 'B' + UNITS_KB = 'KB' + UNITS_MB = 'MB' + UNITS_MiB = 'MiB' + UNITS_GiB = 'GiB' + if unit.lower() == UNITS_B.lower(): + return int(round(value_to_convert)) + elif unit.lower() == UNITS_KB.lower(): + value_converted = value_to_convert * 1000 + return int(round(value_converted)) + elif unit.lower() == UNITS_MB.lower(): + value_converted = value_to_convert * 1000 * 1000 + return int(round(value_converted)) + elif unit.lower() == UNITS_MiB.lower(): + value_converted = value_to_convert * 1024 * 1024 + return int(round(value_converted)) + elif unit.lower() == UNITS_GiB.lower(): + value_converted = value_to_convert * 1024 * 1024 * 1024 + return int(round(value_converted)) + + def create_docker_dict(self, dict_list): + dockerdict = {} + for row in dict_list[0:]: + cid = row.get('CONTAINER ID') + if cid: + key = 'DOCKER_STATS|' + str(cid) + dockerdict[key] = {} + dockerdict[key]['NAME'] = row.get('NAME') + + splitcol = row.get('CPU %') + cpu = re.split("%", str(splitcol)) + dockerdict[key]['CPU%'] = str(cpu[0]) + + splitcol = row.get('MEM USAGE / LIMIT') + memuse = re.split(" / ", str(splitcol)) + # converting MiB and GiB to bytes + dockerdict[key]['MEM_BYTES'] = str(self.convert_to_bytes(memuse[0])) + dockerdict[key]['MEM_LIMIT_BYTES'] = str(self.convert_to_bytes(memuse[1])) + + splitcol = row.get('MEM %') + mem = re.split("%", str(splitcol)) + dockerdict[key]['MEM%'] = str(mem[0]) + + splitcol = row.get('NET I/O') + netio = re.split(" / ", str(splitcol)) + dockerdict[key]['NET_IN_BYTES'] = str(self.convert_to_bytes(netio[0])) + dockerdict[key]['NET_OUT_BYTES'] = str(self.convert_to_bytes(netio[1])) + + splitcol = row.get('BLOCK I/O') + blockio = re.split(" / ", str(splitcol)) + dockerdict[key]['BLOCK_IN_BYTES'] = str(self.convert_to_bytes(blockio[0])) + dockerdict[key]['BLOCK_OUT_BYTES'] = str(self.convert_to_bytes(blockio[1])) + + dockerdict[key]['PIDS'] = row.get('PIDS') + return dockerdict + + def update_dockerstats_command(self): + cmd = "docker stats --no-stream -a" + data = self.run_command(cmd) + if not data: + log_error("'{}' returned null output".format(cmd)) + return False + dockerdata = self.format_docker_cmd_output(data) + if not dockerdata: + log_error("formatting for docker output failed") + return False + # wipe out all data from state_db before updating + self.state_db.delete_all_by_pattern('STATE_DB', 'DOCKER_STATS|*') + for k1,v1 in dockerdata.iteritems(): + for k2,v2 in v1.iteritems(): + self.update_state_db(k1, k2, v2) + return True + + def update_processstats_command(self): + data = self.run_command("ps -eo uid,pid,ppid,%mem,%cpu,stime,tty,time,cmd --sort -%cpu | head -1024") + processdata = self.format_process_cmd_output(data) + value = "" + # wipe out all data before updating with new values + self.state_db.delete_all_by_pattern('STATE_DB', 'PROCESS_STATS|*') + for row in processdata[0:]: + cid = row.get('PID') + if cid: + value = 'PROCESS_STATS|' + str(cid) + uid = row.get('UID') + self.update_state_db(value, 'UID', uid) + ppid = row.get('PPID') + self.update_state_db(value, 'PPID', ppid) + cpu = row.get('%CPU') + self.update_state_db(value, '%CPU', str(cpu)) + mem = row.get('%MEM') + self.update_state_db(value, '%MEM', str(mem)) + stime = row.get('STIME') + self.update_state_db(value, 'STIME', stime) + tty = row.get('TT') + self.update_state_db(value, 'TT', tty) + time = row.get('TIME') + self.update_state_db(value, 'TIME', time) + cmd = row.get('CMD') + self.update_state_db(value, 'CMD', cmd) + + def update_state_db(self, key1, key2, value2): + self.state_db.set('STATE_DB', key1, key2, value2) + + def run(self): + self.update_dockerstats_command() + datetimeobj = datetime.now() + # Adding key to store latest update time. + self.update_state_db('DOCKER_STATS|LastUpdateTime', 'lastupdate', datetimeobj) + self.update_processstats_command() + self.update_state_db('PROCESS_STATS|LastUpdateTime', 'lastupdate', datetimeobj) + +# main start +def main(): + log_info("process-docker stats daemon starting up..") + if not os.getuid() == 0: + log_error("Must be root to run process-docker daemon") + print "Error: Must be root to run process-docker daemon" + sys.exit(1) + pd = ProcDockerStats() + # Data need to be updated every 2 mins. hence adding delay of 120 seconds + while True: + pd.run() + time.sleep(120) + log_info("process-docker stats daemon exited") + +if __name__ == '__main__': + main() + diff --git a/files/image_config/procdockerstatsd/procdockerstatsd.service b/files/image_config/procdockerstatsd/procdockerstatsd.service new file mode 100644 index 00000000000..4e38c350a57 --- /dev/null +++ b/files/image_config/procdockerstatsd/procdockerstatsd.service @@ -0,0 +1,13 @@ +[Unit] +Description=Process and docker CPU/memory utilization data export daemon +Requires=database.service updategraph.service +After=database.service updategraph.service + +[Service] +Type=simple +ExecStart=/usr/bin/procdockerstatsd +Restart=Always + +[Install] +WantedBy=multi-user.target + diff --git a/files/image_config/process-reboot-cause/process-reboot-cause b/files/image_config/process-reboot-cause/process-reboot-cause new file mode 100755 index 00000000000..49cfa752641 --- /dev/null +++ b/files/image_config/process-reboot-cause/process-reboot-cause @@ -0,0 +1,136 @@ +#!/usr/bin/env python +# +# process-reboot-cause +# +# Program designed to run once, soon after system boot which will +# determine the cause of the previous reboot and store it to the disk, +# + +try: + import os + import pwd + import sys + import syslog +except ImportError as err: + raise ImportError("%s - required module not found" % str(err)) + +VERSION = "1.0" + +SYSLOG_IDENTIFIER = "process-reboot-cause" + +REBOOT_CAUSE_DIR = "/host/reboot-cause/" +REBOOT_CAUSE_FILE = REBOOT_CAUSE_DIR + "reboot-cause.txt" +PREVIOUS_REBOOT_CAUSE_FILE = REBOOT_CAUSE_DIR + "previous-reboot-cause.txt" +FIRST_BOOT_PLATFORM_FILE = "/tmp/notify_firstboot_to_platform" + +UNKNOWN_REBOOT_CAUSE = "Unknown" + + +# ========================== Syslog wrappers ========================== + +def log_info(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_INFO, msg) + syslog.closelog() + + +def log_warning(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_WARNING, msg) + syslog.closelog() + + +def log_error(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_ERR, msg) + syslog.closelog() + + +# ============================= Functions ============================= + +def main(): + log_info("Starting up...") + + if not os.geteuid() == 0: + log_error("User {} does not have permission to execute".format(pwd.getpwuid(os.getuid()).pw_name)) + sys.exit("This utility must be run as root") + + # Create REBOOT_CAUSE_DIR if it doesn't exist + if not os.path.exists(REBOOT_CAUSE_DIR): + os.makedirs(REBOOT_CAUSE_DIR) + + # Remove stale PREVIOUS_REBOOT_CAUSE_FILE if it exists + if os.path.exists(PREVIOUS_REBOOT_CAUSE_FILE): + os.remove(PREVIOUS_REBOOT_CAUSE_FILE) + + + # Set a default previous reboot cause + previous_reboot_cause = UNKNOWN_REBOOT_CAUSE + + # Until all platform vendors have provided sonic_platform packages, + # if there is no sonic_platform package installed, we only provide + # software-related reboot causes. + try: + import sonic_platform + + # Check if the previous reboot was caused by hardware + platform = sonic_platform.platform.Platform() + + chassis = platform.get_chassis() + + hardware_reboot_cause, optional_details = chassis.get_reboot_cause() + + if hardware_reboot_cause == chassis.REBOOT_CAUSE_NON_HARDWARE: + # The reboot was not caused by hardware. If there is a REBOOT_CAUSE_FILE, it will + # contain any software-related reboot info. We will use it as the previous cause. + if os.path.isfile(REBOOT_CAUSE_FILE): + cause_file = open(REBOOT_CAUSE_FILE, "r") + previous_reboot_cause = cause_file.readline().rstrip('\n') + cause_file.close() + # If it is FirstTime Boot and previous_reboot_cause is unknown + # and hardware_reboot cause is non_hardware then + # Update the reboot cause as required + if os.path.isfile(FIRST_BOOT_PLATFORM_FILE): + if (previous_reboot_cause == UNKNOWN_REBOOT_CAUSE): + previous_reboot_cause = UNKNOWN_REBOOT_CAUSE + os.remove(FIRST_BOOT_PLATFORM_FILE) + elif hardware_reboot_cause == chassis.REBOOT_CAUSE_HARDWARE_OTHER: + previous_reboot_cause = "{} ({})".format(hardware_reboot_cause, optional_details) + else: + previous_reboot_cause = hardware_reboot_cause + except ImportError as err: + log_warning("sonic_platform package not installed. Unable to detect hardware reboot causes.") + + # If there is a REBOOT_CAUSE_FILE, it will contain any software-related + # reboot info. We will use it as the previous cause. + if os.path.isfile(REBOOT_CAUSE_FILE): + cause_file = open(REBOOT_CAUSE_FILE, "r") + previous_reboot_cause = cause_file.readline().rstrip('\n') + cause_file.close() + + # If it is FirstTime Boot and previous_reboot_cause is unknown + # Update the reboot cause as required + if os.path.isfile(FIRST_BOOT_PLATFORM_FILE): + if (previous_reboot_cause == UNKNOWN_REBOOT_CAUSE): + previous_reboot_cause = UNKNOWN_REBOOT_CAUSE + os.remove(FIRST_BOOT_PLATFORM_FILE) + # Write the previous reboot cause to PREVIOUS_REBOOT_CAUSE_FILE + prev_cause_file = open(PREVIOUS_REBOOT_CAUSE_FILE, "w") + prev_cause_file.write(previous_reboot_cause) + prev_cause_file.close() + + # Also log the previous reboot cause to the syslog + log_info("Previous reboot cause: {}".format(previous_reboot_cause)) + + # Remove the old REBOOT_CAUSE_FILE + if os.path.exists(REBOOT_CAUSE_FILE): + os.remove(REBOOT_CAUSE_FILE) + + # Write a new default reboot cause file for the next reboot + cause_file = open(REBOOT_CAUSE_FILE, "w") + cause_file.write(UNKNOWN_REBOOT_CAUSE) + cause_file.close() + + +if __name__ == "__main__": + main() diff --git a/files/image_config/process-reboot-cause/process-reboot-cause.service b/files/image_config/process-reboot-cause/process-reboot-cause.service new file mode 100644 index 00000000000..a429339dbe5 --- /dev/null +++ b/files/image_config/process-reboot-cause/process-reboot-cause.service @@ -0,0 +1,10 @@ +[Unit] +Description=Reboot cause determination service +After=rc-local.service + +[Service] +Type=simple +ExecStart=/usr/bin/process-reboot-cause + +[Install] +WantedBy=multi-user.target diff --git a/files/image_config/rsyslog/rsyslog-config.service b/files/image_config/rsyslog/rsyslog-config.service new file mode 100644 index 00000000000..ee62a36ccf2 --- /dev/null +++ b/files/image_config/rsyslog/rsyslog-config.service @@ -0,0 +1,11 @@ +[Unit] +Description=Update rsyslog configuration +Requires=updategraph.service +After=updategraph.service + +[Service] +Type=oneshot +ExecStart=/usr/bin/rsyslog-config.sh + +[Install] +WantedBy=multi-user.target diff --git a/files/image_config/rsyslog/rsyslog-config.sh b/files/image_config/rsyslog/rsyslog-config.sh new file mode 100755 index 00000000000..c8ba7b99453 --- /dev/null +++ b/files/image_config/rsyslog/rsyslog-config.sh @@ -0,0 +1,4 @@ +#!/bin/bash + +sonic-cfggen -d -t /usr/share/sonic/templates/rsyslog.conf.j2 >/etc/rsyslog.conf +systemctl restart rsyslog diff --git a/files/image_config/rsyslog/rsyslog.conf.j2 b/files/image_config/rsyslog/rsyslog.conf.j2 new file mode 100644 index 00000000000..fbf8bf20160 --- /dev/null +++ b/files/image_config/rsyslog/rsyslog.conf.j2 @@ -0,0 +1,74 @@ +############################################################################### +# Managed by Ansible +# file: ansible/roles/acs/templates/rsyslog.conf.j2 +############################################################################### +# +# /etc/rsyslog.conf Configuration file for rsyslog. +# +# For more information see +# /usr/share/doc/rsyslog-doc/html/rsyslog_conf.html + + +################# +#### MODULES #### +################# + +$ModLoad imuxsock # provides support for local system logging +$ModLoad imklog # provides kernel logging support +#$ModLoad immark # provides --MARK-- message capability + +# provides UDP syslog reception +$ModLoad imudp +$UDPServerAddress 127.0.0.1 # bind to localhost before udp server run +$UDPServerRun 514 + +# provides TCP syslog reception +#$ModLoad imtcp +#$InputTCPServerRun 514 + + +########################### +#### GLOBAL DIRECTIVES #### +########################### +# +# Use traditional timestamp format. +# To enable high precision timestamps, comment out the following line. +# +#$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat + +# Define a custom template +$template SONiCFileFormat,"%timegenerated%.%timegenerated:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" +$ActionFileDefaultTemplate SONiCFileFormat + +#Set remote syslog server +{% for server in SYSLOG_SERVER %} +*.* @[{{ server }}]:514;SONiCFileFormat +{% endfor %} + +# +# Set the default permissions for all log files. +# +$FileOwner root +$FileGroup adm +$FileCreateMode 0640 +$DirCreateMode 0755 +$Umask 0022 + +# +# Where to place spool and state files +# +$WorkDirectory /var/spool/rsyslog + +# +# Include all config files in /etc/rsyslog.d/ +# +$IncludeConfig /etc/rsyslog.d/*.conf + +# +# Suppress duplicate messages and report "message repeated n times" +# +$RepeatedMsgReduction on + +############### +#### RULES #### +############### diff --git a/files/image_config/rsyslog/rsyslog.d/00-sonic.conf b/files/image_config/rsyslog/rsyslog.d/00-sonic.conf new file mode 100644 index 00000000000..455fe89fd2b --- /dev/null +++ b/files/image_config/rsyslog/rsyslog.d/00-sonic.conf @@ -0,0 +1,27 @@ +## Quagga rules + +if $programname == ["bgp#quagga", + "bgp#watchquagga", + "bgp#zebra"] + then { + /var/log/quagga/zebra.log + stop +} + +if $programname == "bgp#bgpd" then { + /var/log/quagga/bgpd.log + stop +} + +## Teamd rules + +if $programname contains "teamd_" then { + /var/log/teamd.log + stop +} + +## telemetry rules +if $msg startswith " telemetry" or ($msg startswith " dialout" )then { + /var/log/telemetry.log + stop +} diff --git a/files/image_config/rsyslog/rsyslog.d/99-default.conf b/files/image_config/rsyslog/rsyslog.d/99-default.conf new file mode 100644 index 00000000000..77609410c57 --- /dev/null +++ b/files/image_config/rsyslog/rsyslog.d/99-default.conf @@ -0,0 +1,27 @@ +# +# First some standard log files. Log by facility. +# + +# Log all facilities to /var/log/syslog except cron, auth +# and authpriv. They are noisy - log them to their own files +*.*;cron,auth,authpriv.none -/var/log/syslog +auth,authpriv.* /var/log/auth.log +cron.* /var/log/cron.log + +# +# Emergencies are sent to everybody logged in. +# +*.emerg :omusrmsg:* + +# The named pipe /dev/xconsole is for the `xconsole' utility. To use it, +# you must invoke `xconsole' with the `-file' option: +# +# $ xconsole -file /dev/xconsole [...] +# +# NOTE: adjust the list below, or you'll go crazy if you have a reasonably +# busy site.. +# +#daemon.*;mail.*;\ +# news.err;\ +# *.=debug;*.=info;\ +# *.=notice;*.=warn |/dev/xconsole diff --git a/files/image_config/snmp/snmp.yml b/files/image_config/snmp/snmp.yml new file mode 100644 index 00000000000..b200670f0d9 --- /dev/null +++ b/files/image_config/snmp/snmp.yml @@ -0,0 +1,5 @@ +snmp_rocommunity: public +snmp_location: public +v1_trap_dest: NotConfigured +v2_trap_dest: NotConfigured +v3_trap_dest: NotConfigured diff --git a/files/image_config/sudoers/sudoers b/files/image_config/sudoers/sudoers new file mode 100644 index 00000000000..45b943846cb --- /dev/null +++ b/files/image_config/sudoers/sudoers @@ -0,0 +1,58 @@ +# +# This file MUST be edited with the 'visudo' command as root. +# +# Please consider adding local content in /etc/sudoers.d/ instead of +# directly modifying this file. +# +# See the man page for details on how to write a sudoers file. +# +Defaults env_reset +#Defaults mail_badpass +Defaults secure_path="/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin" +Defaults env_keep += "SONIC_CLI_IFACE_MODE" +Defaults env_keep += "VTYSH_PAGER" +Defaults lecture_file = /etc/sudoers.lecture + +# Host alias specification + +# User alias specification + +# Cmnd alias specification +# Note: bcmcmd is dangerous for users in read only netgroups because it may operate ASIC +Cmnd_Alias READ_ONLY_CMDS = /sbin/brctl show, \ + /usr/bin/decode-syseeprom, \ + /usr/bin/docker images *, \ + /usr/bin/docker exec snmp cat /etc/snmp/snmpd.conf, \ + /usr/bin/docker exec bgp cat /etc/quagga/bgpd.conf, \ + /usr/bin/docker exec * ps aux, \ + /usr/bin/docker ps*, \ + /usr/bin/generate_dump, \ + /usr/bin/lldpctl, \ + /usr/bin/lldpshow, \ + /usr/bin/psuutil *, \ + /usr/bin/sensors, \ + /usr/bin/sfputil show *, \ + /usr/bin/teamshow, \ + /usr/bin/vtysh -c show *, \ + /bin/cat /var/log/syslog*, \ + /usr/bin/tail -F /var/log/syslog + +Cmnd_Alias PASSWD_CMDS = /usr/bin/config tacacs passkey *, \ + /usr/sbin/chpasswd * + +# User privilege specification +root ALL=(ALL:ALL) ALL + +# Allow all users to execute read only commands +ALL ALL=NOPASSWD: READ_ONLY_CMDS + +# Allow members of group sudo to execute any command +%sudo ALL=(ALL:ALL) NOPASSWD: ALL + +# Prevent password related command into syslog +Defaults!PASSWD_CMDS !syslog + +# See sudoers(5) for more information on "#include" directives: + +#includedir /etc/sudoers.d + diff --git a/files/image_config/sudoers/sudoers.lecture b/files/image_config/sudoers/sudoers.lecture new file mode 100644 index 00000000000..e89340092c7 --- /dev/null +++ b/files/image_config/sudoers/sudoers.lecture @@ -0,0 +1,4 @@ + +Make sure your account has RW permission to current device. +Otherwise sudo requests will be rejected. + diff --git a/files/image_config/systemd/journald.conf b/files/image_config/systemd/journald.conf new file mode 100644 index 00000000000..214bd099a28 --- /dev/null +++ b/files/image_config/systemd/journald.conf @@ -0,0 +1,35 @@ +# This file is part of systemd. +# +# systemd is free software; you can redistribute it and/or modify it +# under the terms of the GNU Lesser General Public License as published by +# the Free Software Foundation; either version 2.1 of the License, or +# (at your option) any later version. +# +# See journald.conf(5) for details + +[Journal] +#Storage=auto +#Compress=yes +#Seal=yes +#SplitMode=uid +#SyncIntervalSec=5m +#RateLimitIntervalSec=30s +#RateLimitBurst=1000 +SystemMaxUse=50M +#SystemKeepFree= +#SystemMaxFileSize= +RuntimeMaxUse=50M +#RuntimeKeepFree= +#RuntimeMaxFileSize= +#MaxRetentionSec= +#MaxFileSec=1month +#ForwardToSyslog=yes +#ForwardToKMsg=no +#ForwardToConsole=no +#ForwardToWall=yes +#TTYPath=/dev/console +#MaxLevelStore=debug +#MaxLevelSyslog=debug +#MaxLevelKMsg=notice +#MaxLevelConsole=info +#MaxLevelWall=emerg diff --git a/files/image_config/updategraph/updategraph b/files/image_config/updategraph/updategraph new file mode 100755 index 00000000000..2eb510afa4e --- /dev/null +++ b/files/image_config/updategraph/updategraph @@ -0,0 +1,211 @@ +#!/bin/bash + +CONFIG_DB_INDEX=4 + +reload_minigraph() +{ + echo "Reloading minigraph..." + if [ ! -f /etc/sonic/init_cfg.json ]; then + echo "{}" > /etc/sonic/init_cfg.json + fi + redis-cli -n $CONFIG_DB_INDEX FLUSHDB + sonic-cfggen -H -m -j /etc/sonic/init_cfg.json --write-to-db + redis-cli -n $CONFIG_DB_INDEX SET "CONFIG_DB_INITIALIZED" "1" + if [ -f /etc/sonic/acl.json ]; then + acl-loader update full /etc/sonic/acl.json + fi + config qos reload + DEVICE_TYPE=`sonic-cfggen -m -v DEVICE_METADATA.localhost.type` + if [ "${DEVICE_TYPE}" != "MgmtToRRouter" ]; then + pfcwd start_default + fi + + if [[ -x /usr/bin/db_migrator.py ]]; then + # Set latest version number + /usr/bin/db_migrator.py -o set_version + fi +} + +function copy_config_files_and_directories() +{ + for file_dir in $@; do + if [ -f /etc/sonic/old_config/${file_dir} ] || [ -d /etc/sonic/old_config/${file_dir} ]; then + logger "Copying SONiC configuration ${file_dir} ..." + cp -ar /etc/sonic/old_config/${file_dir} /etc/sonic/ + else + logger "Missing SONiC configuration ${file_dir} ..." + fi + done + + sync +} + +function check_system_warm_boot() +{ + SYSTEM_WARM_START=`/usr/bin/redis-cli -n 6 hget "WARM_RESTART_ENABLE_TABLE|system" enable` + # SYSTEM_WARM_START could be empty, always make WARM_BOOT meaningful. + if [[ x"$SYSTEM_WARM_START" == x"true" ]]; then + WARM_BOOT="true" + else + WARM_BOOT="false" + fi +} + + +if [ ! -f /etc/sonic/updategraph.conf ]; then + echo "No updategraph.conf found, generating a default one." + echo "enabled=false" >/etc/sonic/updategraph.conf +fi + +. /etc/sonic/updategraph.conf + +check_system_warm_boot +copy_list="minigraph.xml snmp.yml acl.json config_db.json frr" +if [ -f /tmp/pending_config_migration ]; then + copy_config_files_and_directories $copy_list + if [ x"${WARM_BOOT}" == x"true" ]; then + echo "Warm reboot detected..." + elif [ -r /etc/sonic/config_db.json ]; then + echo "Use config_db.json from old system..." + sonic-cfggen -j /etc/sonic/config_db.json --write-to-db + + if [[ -x /usr/bin/db_migrator.py ]]; then + # Migrate the DB to the latest schema version if needed + /usr/bin/db_migrator.py -o migrate + fi + elif [ -r /etc/sonic/minigraph.xml ]; then + echo "Use minigraph.xml from old system..." + reload_minigraph + sonic-cfggen -d --print-data > /etc/sonic/config_db.json + else + echo "Didn't found neither config_db.json nor minigraph.xml ..." + fi + rm -f /tmp/pending_config_migration + sed -i "/enabled=/d" /etc/sonic/updategraph.conf + echo "enabled=false" >> /etc/sonic/updategraph.conf + exit 0 +fi + +if [ -f /tmp/pending_config_initialization ]; then + rm -f /tmp/pending_config_initialization + if [ "$enabled" != "true" ]; then + PLATFORM=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform` + PRESET=(`head -n 1 /usr/share/sonic/device/$PLATFORM/default_sku`) + sonic-cfggen -H -k ${PRESET[0]} --preset ${PRESET[1]} > /etc/sonic/config_db.json + redis-cli -n $CONFIG_DB_INDEX FLUSHDB + sonic-cfggen -j /etc/sonic/config_db.json --write-to-db + redis-cli -n $CONFIG_DB_INDEX SET "CONFIG_DB_INITIALIZED" "1" + exit 0 + fi +fi + +if [ "$enabled" = "reload_only" ]; then + reload_minigraph + sed -i "/enabled=/d" /etc/sonic/updategraph.conf + echo "enabled=false" >> /etc/sonic/updategraph.conf + exit 0 +fi + +if [ "$enabled" != "true" ]; then + echo "Disabled in updategraph.conf. Skipping graph update." + exit 0 +fi + +ACL_URL=$acl_src + +if [ "$src" = "dhcp" ]; then + # Enable dhcp client on management port eth0 + /sbin/dhclient -4 -v -pf /run/dhclient.eth0.pid -lf /var/lib/dhcp/dhclient.eth0.leases -I -df /var/lib/dhcp/dhclient6.eth0.leases eth0 & + disown + + while [ ! -f /tmp/dhcp_graph_url ]; do + echo "Waiting for DHCP response..." + sleep 1 + done + + if [ "`cat /tmp/dhcp_graph_url`" = "N/A" ]; then + echo "No graph_url option in DHCP response. Skipping graph update and generating an empty configuration." + PLATFORM=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform` + if [ -f /etc/sonic/minigraph.xml ]; then + sonic-cfggen -H -m /etc/sonic/minigraph.xml --preset empty > /tmp/device_meta.json + else + PRESET=(`head -n 1 /usr/share/sonic/device/$PLATFORM/default_sku`) + sonic-cfggen -H -k ${PRESET[0]} --preset empty > /tmp/device_meta.json + fi + if [ -f /etc/sonic/init_cfg.json ]; then + sonic-cfggen -j /tmp/device_meta.json -j /etc/sonic/init_cfg.json --print-data > /etc/sonic/config_db.json + else + cp -f /tmp/device_meta.json /etc/sonic/config_db.json + fi + redis-cli -n $CONFIG_DB_INDEX FLUSHDB + sonic-cfggen -j /etc/sonic/config_db.json --write-to-db + redis-cli -n $CONFIG_DB_INDEX SET "CONFIG_DB_INITIALIZED" "1" + if [ "$dhcp_as_static" = "true" ]; then + sed -i "/enabled=/d" /etc/sonic/updategraph.conf + echo "enabled=false" >> /etc/sonic/updategraph.conf + fi + exit 0 + fi + + + HOSTNAME=`hostname -s` + GRAPH_URL=`sonic-cfggen -t /tmp/dhcp_graph_url -a "{\"hostname\": \"$HOSTNAME\"}"` + URL_REGEX='^(https?|ftp|file)://[-A-Za-z0-9\+&@#/%?=~_|!:,.;]*[-A-Za-z0-9\+&@#/%=~_|]$' + if [[ ! $GRAPH_URL =~ $URL_REGEX ]]; then + echo "\"$GRAPH_URL\" is not a valid url. Skipping graph update." + exit 0 + fi + if [ "$dhcp_as_static" = "true" ]; then + sed -i "/src=/d" /etc/sonic/updategraph.conf + echo "src=\"$GRAPH_URL\"" >> /etc/sonic/updategraph.conf + fi + + if [ -f /tmp/dhcp_acl_url ]; then + ACL_URL=`sonic-cfggen -t /tmp/dhcp_acl_url -a "{\"hostname\": \"$HOSTNAME\"}"` + if [[ ! $ACL_URL =~ $URL_REGEX ]]; then + echo "\"$ACL_URL\" is not a valid url. Skipping acl update." + ACL_URL="" + fi + if [ "$dhcp_as_static" = "true" ]; then + sed -i "/acl_src=/d" /etc/sonic/updategraph.conf + echo "acl_src=\"$ACL_URL\"" >> /etc/sonic/updategraph.conf + fi + fi +else + GRAPH_URL=$src +fi + +if [ -f /etc/sonic/minigraph.xml ]; then + echo "Renaming minigraph.xml to minigraph.old" + mv /etc/sonic/minigraph.xml /etc/sonic/minigraph.old +fi + +echo "Getting minigraph from $GRAPH_URL" + +while true; do + curl -f $GRAPH_URL -o /etc/sonic/minigraph.xml --connect-timeout 15 && break + sleep 5 +done + +if [ -n "$ACL_URL" ]; then + if [ -f /etc/sonic/acl.json ]; then + echo "Renaming acl.json to acl.json.old" + mv /etc/sonic/acl.json /etc/sonic/acl.json.old + fi + echo "Getting ACL config from $ACL_URL" + + while true; do + curl -f $ACL_URL -o /etc/sonic/acl.json --connect-timeout 15 && break + sleep 5 + done +else + echo "Skip ACL config download." +fi + +reload_minigraph +sonic-cfggen -d --print-data > /etc/sonic/config_db.json + +# Mark as disabled after graph is successfully downloaded +sed -i "/enabled=/d" /etc/sonic/updategraph.conf +echo "enabled=false" >> /etc/sonic/updategraph.conf + diff --git a/files/image_config/warmboot-finalizer/finalize-warmboot.sh b/files/image_config/warmboot-finalizer/finalize-warmboot.sh new file mode 100755 index 00000000000..32c9c8444cc --- /dev/null +++ b/files/image_config/warmboot-finalizer/finalize-warmboot.sh @@ -0,0 +1,110 @@ +#! /bin/bash + +VERBOSE=no + +# Check components +COMP_LIST="orchagent neighsyncd bgp" +EXP_STATE="reconciled" + +ASSISTANT_SCRIPT="/usr/bin/neighbor_advertiser" + + +function debug() +{ + /usr/bin/logger "WARMBOOT_FINALIZER : $1" + if [[ x"${VERBOSE}" == x"yes" ]]; then + echo `date` "- $1" + fi +} + + +function check_warm_boot() +{ + WARM_BOOT=`/usr/bin/redis-cli -n 6 hget "WARM_RESTART_ENABLE_TABLE|system" enable` +} + + +function wait_for_database_service() +{ + debug "Wait for database to become ready..." + + # Wait for redis server start before database clean + until [[ $(/usr/bin/docker exec database redis-cli ping | grep -c PONG) -gt 0 ]]; + do sleep 1; + done + + # Wait for configDB initialization + until [[ $(/usr/bin/docker exec database redis-cli -n 4 GET "CONFIG_DB_INITIALIZED") ]]; + do sleep 1; + done + + debug "Database is ready..." +} + + +function get_component_state() +{ + /usr/bin/redis-cli -n 6 hget "WARM_RESTART_TABLE|$1" state +} + + +function check_list() +{ + RET_LIST='' + for comp in $@; do + state=`get_component_state ${comp}` + if [[ x"${state}" != x"${EXP_STATE}" ]]; then + RET_LIST="${RET_LIST} ${comp}" + fi + done + + echo ${RET_LIST} +} + + +function finalize_warm_boot() +{ + debug "Finalizing warmboot..." + sudo config warm_restart disable +} + +function stop_control_plane_assistant() +{ + if [[ -x ${ASSISTANT_SCRIPT} ]]; then + debug "Tearing down control plane assistant ..." + ${ASSISTANT_SCRIPT} -m reset + fi +} + + +wait_for_database_service + +check_warm_boot + +if [[ x"${WARM_BOOT}" != x"true" ]]; then + debug "warmboot is not enabled ..." + exit 0 +fi + +list=${COMP_LIST} + +# Wait up to 5 minutes +for i in `seq 60`; do + list=`check_list ${list}` + if [[ -z "${list}" ]]; then + break + fi + sleep 5 +done + +stop_control_plane_assistant + +# Save DB after stopped control plane assistant to avoid extra entries +debug "Save in-memory database after warm reboot ..." +config save -y + +if [[ -n "${list}" ]]; then + debug "Some components didn't finish reconcile: ${list} ..." +fi + +finalize_warm_boot diff --git a/files/image_config/warmboot-finalizer/warmboot-finalizer.service b/files/image_config/warmboot-finalizer/warmboot-finalizer.service new file mode 100644 index 00000000000..72cc6e33898 --- /dev/null +++ b/files/image_config/warmboot-finalizer/warmboot-finalizer.service @@ -0,0 +1,11 @@ +[Unit] +Description=Monitor warm recovery and disable warmboot when done +Requires=database.service +After=database.service + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/finalize-warmboot.sh + +[Install] +WantedBy=multi-user.target diff --git a/files/initramfs-tools/arista-convertfs.j2 b/files/initramfs-tools/arista-convertfs.j2 new file mode 100644 index 00000000000..535bb441f11 --- /dev/null +++ b/files/initramfs-tools/arista-convertfs.j2 @@ -0,0 +1,237 @@ +#!/bin/sh + +case $1 in + prereqs) + exit 0 + ;; +esac + +set -e +# set -x +total_mem=$(free | awk '/^Mem:/{print $2}') +tmpfs_size=$(( $total_mem / 20 * 17 )) +free_mem_thres=$(( $total_mem / 20 * 18 )) +tmp_mnt='/mnt/ramdisk-convfs' +root_mnt='/mnt/root-convfs' +root_dev='' +flash_dev='' +block_flash='' +aboot_flag='' +backup_file='' + +# Wait until get the fullpath of flash device, e.g., /dev/sda +wait_get_flash_dev() { + local try_rounds=30 + while [ $try_rounds -gt 0 ]; do + for dev in $(ls /sys/block); do + local is_mmc=$(echo "$dev" | grep 'mmcblk.*boot.*' | cat) + if [ -n "$is_mmc" ]; then + continue + fi + local devid=$(realpath "/sys/block/$dev/device") + local is_device=$(echo "$devid" | grep '^/sys/devices/' | cat) + local is_flash=$(echo "$devid" | grep "$block_flash" | cat) + if [ -n "$is_device" -a -n "$is_flash" ]; then + flash_dev="/dev/$dev" + return 0 + fi + done + sleep 1 + try_rounds=$(( $try_rounds - 1 )) + done + return 1 +} + +# Wait for root_dev to be ready +wait_for_root_dev() { + local try_rounds=30 + while [ $try_rounds -gt 0 ]; do + if blkid | sed 's/"//g' | grep -q "$root_dev"; then + return 0 + fi + if [ -e "$root_dev" ]; then + return 0 + fi + sleep 1 + try_rounds=$(( $try_rounds - 1 )) + done + return 1 +} + +# Alway run cleanup before exit +cleanup() { + if grep -q "$root_mnt" /proc/mounts; then + umount "$root_mnt" + fi + if grep -q "$tmp_mnt" /proc/mounts; then + umount "$tmp_mnt" + fi + [ -e "$root_mnt" ] && rmdir "$root_mnt" + [ -e "$tmp_mnt" ] && rmdir "$tmp_mnt" +} +trap cleanup EXIT + +notification() { +cat << EOF +A failure happend in modifying the root file system which stopped the upgrade. Manual interventions are needed to fix the issue. Note that: +1) files in the old root file system may have been lost and the old partition table may have been corrupted; +2) The files in the old root file system were copied to $tmp_mnt; +3) The old partition table was dumped to the file $tmp_mnt/$backup_file by sfdisk; +4) Quitting the current shell will lose all files mentioned above permanently. +EOF +} + +run_cmd() { + if ! eval "$1"; then + echo "$2" + notification + sh + exit 1 + fi +} + +fixup_flash_permissions() { + # properly set flash permissions for others + # this allows the sonic admin user to have read access on the flash + local flash_mnt="$1" + chmod o+rx "$flash_mnt" + + # remove all the filesystem acls from the flash + setfacl -Rb "$flash_mnt" +} + +# Update ROOT device referring to the path under block_flash +# This is for the occasional name swap between /dev/sda and /dev/sdb +update_root() { + # Check that root=/dev/*, ignoring any cases like root=UUID=* + [ "${ROOT#/dev}" = "${ROOT}" ] && return 0 + + # Replace the beginning chars of ROOT by the ones of flash_dev with same index +{% raw %} + prefix_length="${#flash_dev}" +{% endraw %} + part_id="${ROOT:$prefix_length}" + ROOT="$flash_dev$part_id" + + echo "ROOT=$ROOT" > /conf/param.conf +} + +# Extract kernel parameters +set -- $(cat /proc/cmdline) +for x in "$@"; do + case "$x" in + block_flash=*) + block_flash="${x#block_flash=}" + ;; + Aboot=*) + aboot_flag="${x#Aboot=}" + ;; + loop=*) + x1="${x#loop=}" + image_dir="${x1%/*}" + ;; + docker_inram=*) + docker_inram="${x#docker_inram=}" + ;; + SONIC_BOOT_TYPE=warm*|SONIC_BOOT_TYPE=fast*) + # Skip this script for warm-reboot and fast-reboot + exit 0 + ;; + esac +done + +# Check aboot +[ -z "$aboot_flag" ] && exit 0 + +# Get flash dev name +if [ -z "$block_flash" ]; then + echo "Error: flash device info is not provided" + exit 1 +fi +if ! wait_get_flash_dev; then + echo "Error: flash device is not found" + exit 1 +fi + +# If root=/dev/*, update ROOT to the device under block_flash +update_root + +root_dev="$ROOT" +if [ -z "$root_dev" ]; then + echo "Error: root device name is not provided" + exit 1 +fi +if ! wait_for_root_dev; then + echo "Error: timeout in waiting for $root_dev" + exit 1 +fi + +# exit when the root is ext4 +if ! blkid | grep "$root_dev.*vfat" -q; then + mkdir -p "$root_mnt" + mount -t ext4 "$root_dev" "$root_mnt" + fixup_flash_permissions "$root_mnt" + umount "$root_mnt" + rmdir "$root_mnt" + exit 0 +fi + +# Check memory size for tmpfs +free_mem=$(free | awk '/^Mem:/{print $4}') +if [ "$free_mem" -lt "$free_mem_thres" ]; then + echo "Error: memory is not enough" + exit 1 +fi + +# Backup partition table +mkdir -p "$root_mnt" +mount "$root_dev" "$root_mnt" +backup_file=backup.$(date +%Y-%m-%d.%H-%M-%S) +sfdisk -d "$flash_dev" > "$root_mnt/$backup_file" + +# Check total size of files in root +total_file_size=$(du -s "$root_mnt" | awk '{print $1}') +if [ "$total_file_size" -gt "$tmpfs_size" ]; then + echo "Error: total file size is too large" + exit 1 +fi + +# Create tmpfs, and copy files to tmpfs +mkdir -p "$tmp_mnt" +mount -t tmpfs -o size="${tmpfs_size}k" tmpfs "$tmp_mnt" +cp -a "$root_mnt/." "$tmp_mnt/" +umount "$root_mnt" + +#### Lines below will modify the root file system, so any failure will be trapped to shell for manual interventions. + +if [ $(echo -n "$root_dev" | tail -c 1) == "1" ]; then + # Create a new partition table (content in flash_dev will be deleted) + err_msg="Error: repartitioning $flash_dev failed" + cmd="echo '2048' | sfdisk $flash_dev || (sleep 3; blockdev --rereadpt $flash_dev && fdisk -l $flash_dev | grep -q ${root_dev}.*Linux)" + run_cmd "$cmd" "$err_msg" +fi + +sleep 2 +err_msg="Error: timeout in waiting for $root_dev after repartition" +cmd="wait_for_root_dev" +run_cmd "$cmd" "$err_msg" + +err_msg="Error: formatting to ext4 failed" +cmd="mke2fs -t ext4 -F -O '^huge_file,^metadata_csum' $root_dev" +run_cmd "$cmd" "$err_msg" + +err_msg="Error: mounting $root_dev to $root_mnt failed" +cmd="mount -t ext4 $root_dev $root_mnt" +run_cmd "$cmd" "$err_msg" + +if [ x"$docker_inram" != x"on" ]; then + err_msg="Error: extract docker directory" + cmd="[ -f $tmp_mnt/$image_dir/{{ FILESYSTEM_DOCKERFS }} ] && rm -rf $root_mnt/$image_dir/{{ DOCKERFS_DIR }} && mkdir -p $root_mnt/$image_dir/{{ DOCKERFS_DIR }} && tar xzf $tmp_mnt/$image_dir/{{ FILESYSTEM_DOCKERFS }} -C $root_mnt/$image_dir/{{ DOCKERFS_DIR }} && rm -f $tmp_mnt/$image_dir/{{ FILESYSTEM_DOCKERFS }}" + run_cmd "$cmd" "$err_msg" +fi + +err_msg="Error: copying files form $tmp_mnt to $root_mnt failed" +cmd="cp -a $tmp_mnt/. $root_mnt/" +run_cmd "$cmd" "$err_msg" + +fixup_flash_permissions "$root_mnt" diff --git a/files/initramfs-tools/arista-hook b/files/initramfs-tools/arista-hook new file mode 100644 index 00000000000..521e38435b3 --- /dev/null +++ b/files/initramfs-tools/arista-hook @@ -0,0 +1,78 @@ +#!/bin/sh + +PREREQS="arista-convertfs" + +prereqs() { echo "$PREREQS"; } + +case $1 in + prereqs) + prereqs + exit 0 + ;; +esac + +info() { printf "%04.2f: $@\n" "$(cut -f1 -d' ' /proc/uptime)"; } +err() { info "Error: $@"; } +warn() { info "Warning: $@"; } + +set -e + +root_mnt='/mnt/arista-firmware' +root_dev='' +aboot_flag='' + +# Alway run cleanup before exit +cleanup() { + if grep -q "$root_mnt" /proc/mounts; then + umount "$root_mnt" + fi + [ -e "$root_mnt" ] && rmdir "$root_mnt" +} +trap cleanup EXIT + +# Extract kernel parameters +set -- $(cat /proc/cmdline) +for x in "$@"; do + case "$x" in + Aboot=*) + aboot_flag="${x#Aboot=}" + ;; + loop=*) + x1="${x#loop=}" + image_dir="${x1%/*}" + ;; + SONIC_BOOT_TYPE=warm*|SONIC_BOOT_TYPE=fast*) + # Skip this script for warm-reboot and fast-reboot + exit 0 + ;; + esac +done + +[ -z "$aboot_flag" ] && exit 0 + +root_dev="$ROOT" +if [ -z "$root_dev" ]; then + err "Error: root device name is not provided" + exit 1 +fi + +mkdir -p "$root_mnt" +mount -t ext4 "$root_dev" "$root_mnt" + +get_sorted_hooks() { + echo $(find "$1" -name '[0-9][0-9]-*' -type f | sort) +} + +if [ -d "$root_mnt/$image_dir/platform/hooks/boot1" ]; then + for hook in $(get_sorted_hooks "$root_mnt/$image_dir/platform/hooks/boot1"); do + if [ ! -z "$hook" ]; then + cp "$hook" /tmp/ + hook="/tmp/`basename $hook`" + info "Running hook $(basename $hook)" + . "$hook" + fi + done +fi + +umount "$root_mnt" +rmdir "$root_mnt" diff --git a/files/initramfs-tools/arista-net b/files/initramfs-tools/arista-net new file mode 100644 index 00000000000..8759746458d --- /dev/null +++ b/files/initramfs-tools/arista-net @@ -0,0 +1,113 @@ +#!/bin/sh + +case $1 in + prereqs) + exit 0 + ;; +esac + +set -e + +# Extract kernel parameters +set -- $(cat /proc/cmdline) +items="" +for x in "$@"; do + case "$x" in + Aboot=*) + aboot_flag="${x#Aboot=}" + ;; + net_*) + item="${x#net_}" + items="$items $item" + ;; + platform=*) + platform_flag="${x#platform=}" + ;; + esac +done + +random() { + echo $(od -vAn -N1 -tu1 < /dev/urandom) +} + +arista_net_devname() { + local pciaddr="$1" + local devname_prefix="$2" + for path in $(ls -d /sys/class/net/${devname_prefix}* 2>/dev/null); do + local devid="$(realpath "$path/device")" + if echo "$devid" | grep -q "$pciaddr"; then + echo "${path##*/}" + return + fi + done +} + +arista_net_rename() { + local device_path="$1" + local new_name="$2" + local from_name="$3" + devname=$(arista_net_devname "$device_path" "$from_name") + [ -n "$devname" ] && ip link set "$devname" name "$new_name" +} + +# Sets the MAC address to the value passed by Aboot through /proc/cmdline +tg3fixhwaddr() +{ + local default_tg3_hwaddr="00:10:18:00:00:00" + local pciaddr="$1" + local hwaddr="$2" + + devname=$(arista_net_devname "$pciaddr") + if [ -z "$devname" ]; then + return + fi + + driver=$(basename $(readlink "/sys/class/net/$devname/device/driver")) + if [ "$driver" != "tg3" ]; then + return 0 + fi + + if [ "$hwaddr" = "$default_tg3_hwaddr" ]; then + hwaddr=$(cat /sys/class/net/$devname/address) + fi + + if [ "$hwaddr" = "$default_tg3_hwaddr" ]; then + hwaddr=$(printf "%02x" "$(($(random) & 0xfe | 0x02))") + for i in 1 2 3 4 5; do + hwaddr=$(printf "$hwaddr:%02x" "$(($(random) & 0xfe | 0x02))") + done + fi + + ip link set dev "$devname" addr "$hwaddr" +} + +if [ -n "$aboot_flag" ]; then + for item in $items; do + key="${item%=*}" + value="${item#*=}" + hwaddr=$(eval echo \${hwaddr_${key}}) + if [ -n "$hwaddr" ]; then + tg3fixhwaddr "$value" "$hwaddr" + fi + done +fi + +# Iterate over all the net_maX items found in the cmdline two times. +# First time renaming the interfaces to maX. +# The second time renaming them to their final name ethX. +if [ -n "$aboot_flag" -a "$platform_flag" == 'rook' ]; then + for item in $items; do + key="${item%=*}" + value="${item#*=}" + arista_net_rename "$value" "$key" eth + done + for item in $items; do + key="${item%=*}" + value="${item#*=}" + index="${key#ma}" + index="$(( $index - 1 ))" + newKey="eth$index" + arista_net_rename "$value" "$newKey" ma + done +fi + diff --git a/files/initramfs-tools/mke2fs b/files/initramfs-tools/mke2fs new file mode 100644 index 00000000000..52933d644a8 --- /dev/null +++ b/files/initramfs-tools/mke2fs @@ -0,0 +1,52 @@ +#!/bin/sh +#Part of the code is revised based on initramfs-tools/hooks/fsck and initramfs-tool is under GPL v2. + +PREREQ="" + +prereqs() +{ + echo "$PREREQ" +} + +case $1 in +prereqs) + prereqs + exit 0 + ;; +esac + +. /usr/share/initramfs-tools/hook-functions + +copy_exec /sbin/mke2fs +copy_exec /sbin/sfdisk +copy_exec /sbin/fdisk +copy_exec /sbin/resize2fs +copy_exec /sbin/findfs + +fstypes="ext4 ext3" + +for type in $fstypes; do + prog="/sbin/mkfs.${type}" + if [ -h "$prog" ]; then + link=$(readlink -f "$prog") + copy_exec "$link" + ln -s "$link" "${DESTDIR}/$prog" + elif [ -x "$prog" ] ; then + copy_exec "$prog" + else + echo "Warning: /sbin/mkfs.${type} doesn't exist, can't install to initramfs, ignoring." + fi +done + +for type in $fstypes; do + prog="/sbin/fsck.${type}" + if [ -h "$prog" ]; then + link=$(readlink -f "$prog") + copy_exec "$link" + ln -s "$link" "${DESTDIR}/$prog" + elif [ -x "$prog" ] ; then + copy_exec "$prog" + else + echo "Warning: /sbin/fsck.${type} doesn't exist, can't install to initramfs, ignoring." + fi +done diff --git a/files/initramfs-tools/modules b/files/initramfs-tools/modules index 86a1fcf20bd..e7fcbef870d 100644 --- a/files/initramfs-tools/modules +++ b/files/initramfs-tools/modules @@ -1,2 +1,6 @@ squashfs -aufs +overlay +vfat +nls_ascii +nls_cp437 +nls_utf8 diff --git a/files/initramfs-tools/resize-rootfs b/files/initramfs-tools/resize-rootfs new file mode 100644 index 00000000000..17ffcb94e69 --- /dev/null +++ b/files/initramfs-tools/resize-rootfs @@ -0,0 +1,39 @@ +#!/bin/sh + +case $1 in + prereqs) + exit 0 + ;; +esac + +# Extract kernel parameters +set -- $(cat /proc/cmdline) +for x in "$@"; do + case "$x" in + root=*) + root_val="${x#root=}" + ;; + resize-rootfs) + need_resize=1 + ;; + esac +done + +if [ -n "$need_resize" ]; then + if [ -z "$root_val" ]; then + echo "ERROR: resize required but unable to get root location from command line" + exit 1 + fi + + root_dev=$(findfs $root_val) + if [ $? != 0 ]; then + echo "ERROR: resize required but findfs failed" + exit 1 + fi + + resize2fs -f $root_dev + if [ $? != 0 ]; then + echo "ERROR: Unable to resize the root file system. Manual intervention needed to fix the issue." + exit 1 + fi +fi diff --git a/files/initramfs-tools/setfacl b/files/initramfs-tools/setfacl new file mode 100644 index 00000000000..96564e06b24 --- /dev/null +++ b/files/initramfs-tools/setfacl @@ -0,0 +1,20 @@ +#!/bin/sh +#Part of the code is revised based on initramfs-tools/hooks/fsck and initramfs-tool is under GPL v2. + +PREREQ="" + +prereqs() +{ + echo "$PREREQ" +} + +case $1 in +prereqs) + prereqs + exit 0 + ;; +esac + +. /usr/share/initramfs-tools/hook-functions + +copy_exec /usr/bin/setfacl /sbin/setfacl diff --git a/files/initramfs-tools/udev.patch b/files/initramfs-tools/udev.patch new file mode 100644 index 00000000000..38c43dc27d6 --- /dev/null +++ b/files/initramfs-tools/udev.patch @@ -0,0 +1,10 @@ +--- a/udev 2017-09-02 23:13:45.078773236 +0000 ++++ b/udev 2017-09-02 22:40:08.502773236 +0000 +@@ -1,6 +1,6 @@ + #!/bin/sh -e + +-PREREQS="" ++PREREQS="union-mount" + + prereqs() { echo "$PREREQS"; } + diff --git a/files/initramfs-tools/union-mount b/files/initramfs-tools/union-mount deleted file mode 100644 index 85fba9df3a0..00000000000 --- a/files/initramfs-tools/union-mount +++ /dev/null @@ -1,13 +0,0 @@ -#!/bin/sh -e -case $1 in - prereqs) - exit 0 - ;; -esac -mkdir -p ${rootmnt}/host/rw -mount -n -o dirs=${rootmnt}/host/rw:${rootmnt}=ro -t aufs root-aufs ${rootmnt} -mount ${ROOT} ${rootmnt}/host -mkdir -p /root/var/lib/docker -mount --bind /root/host/var/lib/docker /root/var/lib/docker -mkdir -p /root/boot -mount --bind /root/host/boot /root/boot diff --git a/files/initramfs-tools/union-mount.j2 b/files/initramfs-tools/union-mount.j2 new file mode 100644 index 00000000000..f6f1deff422 --- /dev/null +++ b/files/initramfs-tools/union-mount.j2 @@ -0,0 +1,77 @@ +#!/bin/sh -e + +PREREQS="varlog" + +prereqs() { echo "$PREREQS"; } + +case $1 in + prereqs) + prereqs + exit 0 + ;; +esac + +set_tmpfs_log_partition_size() +{ + varlogsize=128 + + # NOTE: certain platforms, when reaching initramfs stage, have a small + # limit of mounting tmpfs partition, potentially due to amount + # of RAM available in this stage. e.g. Arista 7050-qx32[s] and 7060-cx32s + [ X"$aboot_platform" = X"x86_64-arista_7050_qx32" ] && return + [ X"$aboot_platform" = X"x86_64-arista_7050_qx32s" ] && return + [ X"$aboot_platform" = X"x86_64-arista_7060_cx32s" ] && return + + # set varlogsize to existing var-log.ext4 size + if [ -f ${rootmnt}/host/disk-img/var-log.ext4 ]; then + varlogsize=$(ls -l ${rootmnt}/host/disk-img/var-log.ext4 | awk '{print $5}') + varlogsize=$(($varlogsize/1024/1024)) + fi + + # make sure varlogsize is between 5% to 10% of total memory size + memkb=$(grep MemTotal /proc/meminfo | awk '{print $2}') + memmb=$(($memkb/1024)) + minsize=$(($memmb*5/100)) + maxsize=$(($memmb*10/100)) + + [ $minsize -ge $varlogsize ] && varlogsize=$minsize + [ $maxsize -le $varlogsize ] && varlogsize=$maxsize +} + +## Mount the overlay file system: rw layer over squashfs +image_dir=$(cat /proc/cmdline | sed -e 's/.*loop=\(\S*\)\/.*/\1/') +mkdir -p ${rootmnt}/host/$image_dir/rw +mkdir -p ${rootmnt}/host/$image_dir/work +mount -n -o lowerdir=${rootmnt},upperdir=${rootmnt}/host/$image_dir/rw,workdir=${rootmnt}/host/$image_dir/work -t overlay root-overlay ${rootmnt} +## Check if the root block device is still there +[ -b ${ROOT} ] || mdev -s +## Mount the raw partition again +mount ${ROOT} ${rootmnt}/host + +mkdir -p ${rootmnt}/var/lib/docker +if [ -f ${rootmnt}/host/$image_dir/{{ FILESYSTEM_DOCKERFS }} ]; then + ## mount tmpfs and extract docker into it + mount -t tmpfs -o rw,nodev,size={{ DOCKER_RAMFS_SIZE }} tmpfs ${rootmnt}/var/lib/docker + tar xz --numeric-owner -f ${rootmnt}/host/$image_dir/{{ FILESYSTEM_DOCKERFS }} -C ${rootmnt}/var/lib/docker +else + ## Mount the working directory of docker engine in the raw partition, bypass the overlay + mount --bind ${rootmnt}/host/$image_dir/{{ DOCKERFS_DIR }} ${rootmnt}/var/lib/docker +fi + +## Mount the boot directory in the raw partition, bypass the overlay +mkdir -p ${rootmnt}/boot +mount --bind ${rootmnt}/host/$image_dir/boot ${rootmnt}/boot +## Mount loop device or tmpfs for /var/log +onie_platform="" +aboot_platform="" +. ${rootmnt}/host/machine.conf +if [ X"$aboot_platform" = X"x86_64-arista_7050_qx32" ] || + [ X"$aboot_platform" = X"x86_64-arista_7050_qx32s" ] || + [ X"$aboot_platform" = X"x86_64-arista_7060_cx32s" ] +then + set_tmpfs_log_partition_size + mount -t tmpfs -o rw,nosuid,nodev,size=${varlogsize}M tmpfs ${rootmnt}/var/log + [ -f ${rootmnt}/host/disk-img/var-log.ext4 ] && rm -rf ${rootmnt}/host/disk-img/var-log.ext4 +else + [ -f ${rootmnt}/host/disk-img/var-log.ext4 ] && mount -t ext4 -o loop,rw ${rootmnt}/host/disk-img/var-log.ext4 ${rootmnt}/var/log +fi diff --git a/files/initramfs-tools/varlog b/files/initramfs-tools/varlog new file mode 100644 index 00000000000..d1340eaa9d8 --- /dev/null +++ b/files/initramfs-tools/varlog @@ -0,0 +1,36 @@ +#!/bin/sh -e + +PREREQS="" + +prereqs() { echo "$PREREQS"; } + +case $1 in + prereqs) + prereqs + exit 0 + ;; +esac + +# Extract kernel parameters +set -- $(cat /proc/cmdline) +for x in "$@"; do + case "$x" in + varlog_size=*) + varlog_size="${x#varlog_size=}" + esac +done + +[ -z "$varlog_size" ] && exit 0 + +# exit when the var_log.ext4 exists and the size matches +if [ -e "${rootmnt}/host/disk-img/var-log.ext4" ]; then + cur_varlog_size=$(ls -l ${rootmnt}/host/disk-img/var-log.ext4 | awk '{print $5}') + if [ $cur_varlog_size == $((1024*1024*$varlog_size)) ]; then + exit 0 + else + rm -rf ${rootmnt}/host/disk-img + fi +fi + +# create varlog disk +mkdir -p ${rootmnt}/host/disk-img && ${rootmnt}/usr/bin/fallocate -l "$varlog_size"M ${rootmnt}/host/disk-img/var-log.ext4 && mkfs.ext4 -q -F ${rootmnt}/host/disk-img/var-log.ext4 diff --git a/files/scripts/arp_update b/files/scripts/arp_update new file mode 100755 index 00000000000..055aa98baf5 --- /dev/null +++ b/files/scripts/arp_update @@ -0,0 +1,50 @@ +#!/bin/bash +# +# usage: +# arp_update: +# Send ipv6 multicast pings to all "UP" L3 interfaces including vlan interfaces to +# refresh link-local addresses from neighbors. +# Send gratuitous ARP/NDP requests to VLAN member neighbors to refresh +# the ipv4/ipv6 neighbors state. + +while /bin/true; do + # find L3 interfaces which are UP, send ipv6 multicast pings + echo "{% for (name, prefix) in INTERFACE|pfx_filter %} {{name}} {% endfor %}" > /tmp/intf_tmp.j2 + INTERFACE=`sonic-cfggen -d -t /tmp/intf_tmp.j2` + echo "{% for (name, prefix) in PORTCHANNEL_INTERFACE|pfx_filter %} {{name}} {% endfor %}" > /tmp/pc_intf_tmp.j2 + PC_INTERFACE=`sonic-cfggen -d -t /tmp/pc_intf_tmp.j2` + + ALL_INTERFACE="$INTERFACE $PC_INTERFACE" + for intf in $ALL_INTERFACE; do + ping6cmd="ping6 -I $intf -n -q -i 0 -c 1 -W 0 ff02::1 >/dev/null" + intf_up=$(ip link show $intf | grep "state UP") + if [[ -n "$intf_up" ]]; then + eval $ping6cmd + fi + done + + VLAN=`sonic-cfggen -d -v 'VLAN.keys() | join(" ") if VLAN'` + for vlan in $VLAN; do + # generate a list of arping commands: + # arping -q -w 0 -c 1 -i ; + # arping -q -w 0 -c 1 -i ; + # ... + arpingcmd="sed -e 's/ / -i /' -e 's/^/arping -q -w 0 -c 1 /' -e 's/$/;/'" + ipcmd="ip -4 neigh show | grep $vlan | cut -d ' ' -f 1,3 | $arpingcmd" + + eval `eval $ipcmd` + + # send ipv6 multicast pings to Vlan interfaces to get/refresh link-local addrs + ping6cmd="ping6 -I $vlan -n -q -i 0 -c 1 -W 0 ff02::1 >/dev/null" + eval $ping6cmd + + # generate a list of ndisc6 commands (exclude link-local addrs since it is done above): + # ndisc6 -q -w 0 -1 ; + # ndisc6 -q -w 0 -1 ; + # ... + ndisc6cmd="sed -e 's/^/ndisc6 -q -w 0 -1 /' -e 's/$/;/'" + ip6cmd="ip -6 neigh show | grep -v fe80 | grep $vlan | cut -d ' ' -f 1,3 | $ndisc6cmd" + eval `eval $ip6cmd` + done + sleep 300 +done diff --git a/files/scripts/configdb-load.sh b/files/scripts/configdb-load.sh new file mode 100755 index 00000000000..5ba2e0e0bc7 --- /dev/null +++ b/files/scripts/configdb-load.sh @@ -0,0 +1,13 @@ +#!/usr/bin/env bash + +# Wait until redis starts +until [[ $(redis-cli ping | grep -c PONG) -gt 0 ]]; do + sleep 1; +done + +# If there is a config db dump file, load it +if [ -r /etc/sonic/config_db.json ]; then + sonic-cfggen -j /etc/sonic/config_db.json --write-to-db +fi + +redis-cli -n 4 SET "CONFIG_DB_INITIALIZED" "1" diff --git a/files/scripts/core_cleanup.py b/files/scripts/core_cleanup.py new file mode 100755 index 00000000000..67620b2397d --- /dev/null +++ b/files/scripts/core_cleanup.py @@ -0,0 +1,51 @@ +#!/usr/bin/env python + +import syslog +import os + +from collections import defaultdict +from datetime import datetime + +SYSLOG_IDENTIFIER = 'core_cleanup.py' +CORE_FILE_DIR = os.path.basename(__file__) +MAX_CORE_FILES = 4 + +def log_info(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_INFO, msg) + syslog.closelog() + +def log_error(msg): + syslog.openlog(SYSLOG_IDENTIFIER) + syslog.syslog(syslog.LOG_ERR, msg) + syslog.closelog() + +def main(): + if os.getuid() != 0: + log_error('Root required to clean up core files') + return + + log_info('Cleaning up core files') + core_files = [f for f in os.listdir(CORE_FILE_DIR) if os.path.isfile(os.path.join(CORE_FILE_DIR, f))] + + core_files_by_process = defaultdict(list) + for f in core_files: + process = f.split('.')[0] + curr_files = core_files_by_process[process] + curr_files.append(f) + + if len(curr_files) > MAX_CORE_FILES: + curr_files.sort(reverse = True, key = lambda x: datetime.utcfromtimestamp(int(x.split('.')[1]))) + oldest_core = curr_files[MAX_CORE_FILES] + log_info('Deleting {}'.format(oldest_core)) + try: + os.remove(os.path.join(CORE_FILE_DIR, oldest_core)) + except: + log_error('Unexpected error occured trying to delete {}'.format(oldest_core)) + core_files_by_process[process] = curr_files[0:MAX_CORE_FILES] + + log_info('Finished cleaning up core files') + +if __name__ == '__main__': + main() + diff --git a/files/scripts/supervisor-proc-exit-listener b/files/scripts/supervisor-proc-exit-listener new file mode 100755 index 00000000000..8d1735cd2b0 --- /dev/null +++ b/files/scripts/supervisor-proc-exit-listener @@ -0,0 +1,46 @@ +#!/usr/bin/env python + +import os +import signal +import sys +import syslog + +from supervisor import childutils + +# Contents of file should be the names of critical processes (as defined in +# supervisor.conf file), one per line +CRITICAL_PROCESSES_FILE = '/etc/supervisor/critical_processes' + +def main(): + # Read the list of critical processes from a file + with open(CRITICAL_PROCESSES_FILE, 'r') as f: + critical_processes = [line.rstrip('\n') for line in f] + + while True: + # Transition from ACKNOWLEDGED to READY + childutils.listener.ready() + + line = sys.stdin.readline() + headers = childutils.get_headers(line) + payload = sys.stdin.read(int(headers['len'])) + + # Transition from READY to ACKNOWLEDGED + childutils.listener.ok() + + # We only care about PROCESS_STATE_EXITED events + if headers['eventname'] == 'PROCESS_STATE_EXITED': + payload_headers, payload_data = childutils.eventdata(payload + '\n') + + expected = int(payload_headers['expected']) + processname = payload_headers['processname'] + groupname = payload_headers['groupname'] + + # If a critical process exited unexpectedly, terminate supervisor + if expected == 0 and processname in critical_processes or groupname in critical_processes: + MSG_FORMAT_STR = "Process {} exited unxepectedly. Terminating supervisor..." + msg = MSG_FORMAT_STR.format(payload_headers['processname']) + syslog.syslog(syslog.LOG_INFO, msg) + os.kill(os.getppid(), signal.SIGTERM) + +if __name__ == "__main__": + main() diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh new file mode 100755 index 00000000000..416075d8b33 --- /dev/null +++ b/files/scripts/swss.sh @@ -0,0 +1,180 @@ +#!/bin/bash + +SERVICE="swss" +PEER="syncd" +DEPENDENT="teamd radv dhcp_relay" +DEBUGLOG="/tmp/swss-syncd-debug.log" +LOCKFILE="/tmp/swss-syncd-lock" + +function debug() +{ + /usr/bin/logger $1 + /bin/echo `date` "- $1" >> ${DEBUGLOG} +} + +function lock_service_state_change() +{ + debug "Locking ${LOCKFILE} from ${SERVICE} service" + + exec {LOCKFD}>${LOCKFILE} + /usr/bin/flock -x ${LOCKFD} + trap "/usr/bin/flock -u ${LOCKFD}" 0 2 3 15 + + debug "Locked ${LOCKFILE} (${LOCKFD}) from ${SERVICE} service" +} + +function unlock_service_state_change() +{ + debug "Unlocking ${LOCKFILE} (${LOCKFD}) from ${SERVICE} service" + /usr/bin/flock -u ${LOCKFD} +} + +function check_warm_boot() +{ + SYSTEM_WARM_START=`/usr/bin/redis-cli -n 6 hget "WARM_RESTART_ENABLE_TABLE|system" enable` + SERVICE_WARM_START=`/usr/bin/redis-cli -n 6 hget "WARM_RESTART_ENABLE_TABLE|${SERVICE}" enable` + if [[ x"$SYSTEM_WARM_START" == x"true" ]] || [[ x"$SERVICE_WARM_START" == x"true" ]]; then + WARM_BOOT="true" + else + WARM_BOOT="false" + fi +} + +function validate_restore_count() +{ + if [[ x"$WARM_BOOT" == x"true" ]]; then + RESTORE_COUNT=`/usr/bin/redis-cli -n 6 hget "WARM_RESTART_TABLE|orchagent" restore_count` + # We have to make sure db data has not been flushed. + if [[ -z "$RESTORE_COUNT" ]]; then + WARM_BOOT="false" + fi + fi +} + +function wait_for_database_service() +{ + # Wait for redis server start before database clean + until [[ $(/usr/bin/docker exec database redis-cli ping | grep -c PONG) -gt 0 ]]; + do sleep 1; + done + + # Wait for configDB initialization + until [[ $(/usr/bin/docker exec database redis-cli -n 4 GET "CONFIG_DB_INITIALIZED") ]]; + do sleep 1; + done +} + +# This function cleans up the tables with specific prefixes from the database +# $1 the index of the database +# $2 the string of a list of table prefixes +function clean_up_tables() +{ + redis-cli -n $1 EVAL " + local tables = {$2} + for i = 1, table.getn(tables) do + local matches = redis.call('KEYS', tables[i]) + for j,name in ipairs(matches) do + redis.call('DEL', name) + end + end" 0 +} + +start_peer_and_dependent_services() { + check_warm_boot + + if [[ x"$WARM_BOOT" != x"true" ]]; then + /bin/systemctl start ${PEER} + for dep in ${DEPENDENT}; do + # Here we call `systemctl restart` on each dependent service instead of `systemctl start` to + # ensure the services actually get stopped and started in case they were not previously stopped. + /bin/systemctl restart ${dep} + done + fi +} + +stop_peer_and_dependent_services() { + # if warm start enabled or peer lock exists, don't stop peer service docker + if [[ x"$WARM_BOOT" != x"true" ]]; then + /bin/systemctl stop ${PEER} + for dep in ${DEPENDENT}; do + /bin/systemctl stop ${dep} + done + fi +} + +start() { + debug "Starting ${SERVICE} service..." + + lock_service_state_change + + wait_for_database_service + check_warm_boot + validate_restore_count + + debug "Warm boot flag: ${SERVICE} ${WARM_BOOT}." + + # Don't flush DB during warm boot + if [[ x"$WARM_BOOT" != x"true" ]]; then + debug "Flushing APP, ASIC, COUNTER, CONFIG, and partial STATE databases ..." + /usr/bin/docker exec database redis-cli -n 0 FLUSHDB + /usr/bin/docker exec database redis-cli -n 1 FLUSHDB + /usr/bin/docker exec database redis-cli -n 2 FLUSHDB + /usr/bin/docker exec database redis-cli -n 5 FLUSHDB + clean_up_tables 6 "'PORT_TABLE*', 'MGMT_PORT_TABLE*', 'VLAN_TABLE*', 'VLAN_MEMBER_TABLE*', 'LAG_TABLE*', 'LAG_MEMBER_TABLE*', 'INTERFACE_TABLE*', 'MIRROR_SESSION*', 'VRF_TABLE*', 'FDB_TABLE*'" + fi + + # start service docker + /usr/bin/${SERVICE}.sh start + debug "Started ${SERVICE} service..." + + # Unlock has to happen before reaching out to peer service + unlock_service_state_change +} + +wait() { + start_peer_and_dependent_services + + # Allow some time for peer container to start + # NOTE: This assumes Docker containers share the same names as their + # corresponding services + for SECS in {1..60}; do + RUNNING=$(docker inspect -f '{{.State.Running}}' ${PEER}) + if [[ x"$RUNNING" == x"true" ]]; then + break + else + sleep 1 + fi + done + + # NOTE: This assumes Docker containers share the same names as their + # corresponding services + /usr/bin/docker-wait-any ${SERVICE} ${PEER} +} + +stop() { + debug "Stopping ${SERVICE} service..." + + [[ -f ${LOCKFILE} ]] || /usr/bin/touch ${LOCKFILE} + + lock_service_state_change + check_warm_boot + debug "Warm boot flag: ${SERVICE} ${WARM_BOOT}." + + /usr/bin/${SERVICE}.sh stop + debug "Stopped ${SERVICE} service..." + + # Unlock has to happen before reaching out to peer service + unlock_service_state_change + + stop_peer_and_dependent_services +} + +case "$1" in + start|wait|stop) + $1 + ;; + *) + echo "Usage: $0 {start|wait|stop}" + exit 1 + ;; +esac diff --git a/files/scripts/syncd.sh b/files/scripts/syncd.sh new file mode 100755 index 00000000000..2b7c76263d8 --- /dev/null +++ b/files/scripts/syncd.sh @@ -0,0 +1,201 @@ +#!/bin/bash + +SERVICE="syncd" +PEER="swss" +DEBUGLOG="/tmp/swss-syncd-debug.log" +LOCKFILE="/tmp/swss-syncd-lock" + +function debug() +{ + /usr/bin/logger $1 + /bin/echo `date` "- $1" >> ${DEBUGLOG} +} + +function lock_service_state_change() +{ + debug "Locking ${LOCKFILE} from ${SERVICE} service" + + exec {LOCKFD}>${LOCKFILE} + /usr/bin/flock -x ${LOCKFD} + trap "/usr/bin/flock -u ${LOCKFD}" 0 2 3 15 + + debug "Locked ${LOCKFILE} (${LOCKFD}) from ${SERVICE} service" +} + +function unlock_service_state_change() +{ + debug "Unlocking ${LOCKFILE} (${LOCKFD}) from ${SERVICE} service" + /usr/bin/flock -u ${LOCKFD} +} + +function check_warm_boot() +{ + SYSTEM_WARM_START=`/usr/bin/redis-cli -n 6 hget "WARM_RESTART_ENABLE_TABLE|system" enable` + SERVICE_WARM_START=`/usr/bin/redis-cli -n 6 hget "WARM_RESTART_ENABLE_TABLE|${SERVICE}" enable` + # SYSTEM_WARM_START could be empty, always make WARM_BOOT meaningful. + if [[ x"$SYSTEM_WARM_START" == x"true" ]] || [[ x"$SERVICE_WARM_START" == x"true" ]]; then + WARM_BOOT="true" + else + WARM_BOOT="false" + fi +} + +function wait_for_database_service() +{ + # Wait for redis server start before database clean + until [[ $(/usr/bin/docker exec database redis-cli ping | grep -c PONG) -gt 0 ]]; + do sleep 1; + done + + # Wait for configDB initialization + until [[ $(/usr/bin/docker exec database redis-cli -n 4 GET "CONFIG_DB_INITIALIZED") ]]; + do sleep 1; + done +} + +function getBootType() +{ + # same code snippet in files/build_templates/docker_image_ctl.j2 + case "$(cat /proc/cmdline)" in + *SONIC_BOOT_TYPE=warm*) + TYPE='warm' + ;; + *SONIC_BOOT_TYPE=fastfast*) + TYPE='fastfast' + ;; + *SONIC_BOOT_TYPE=fast*|*fast-reboot*) + TYPE=$(awk '{ if ($1 <= 180) print "fast"; else print "cold" }' /proc/uptime) + ;; + *) + TYPE='cold' + esac + echo "${TYPE}" +} + +start() { + debug "Starting ${SERVICE} service..." + + lock_service_state_change + + mkdir -p /host/warmboot + + wait_for_database_service + check_warm_boot + + debug "Warm boot flag: ${SERVICE} ${WARM_BOOT}." + + if [[ x"$WARM_BOOT" == x"true" ]]; then + # Leave a mark for syncd scripts running inside docker. + touch /host/warmboot/warm-starting + else + rm -f /host/warmboot/warm-starting + fi + + # platform specific tasks + + # start mellanox drivers regardless of + # boot type + if [[ x"$sonic_asic_platform" == x"mellanox" ]]; then + BOOT_TYPE=`getBootType` + if [[ x"$WARM_BOOT" == x"true" || x"$BOOT_TYPE" == x"fast" ]]; then + export FAST_BOOT=1 + fi + + if [[ x"$WARM_BOOT" != x"true" ]]; then + if [[ x"$(/bin/systemctl is-active pmon)" == x"active" ]]; then + /bin/systemctl stop pmon + debug "pmon is active while syncd starting, stop it first" + fi + /usr/bin/hw-management.sh chipdown + fi + + if [[ x"$BOOT_TYPE" == x"fast" ]]; then + /usr/bin/hw-management.sh chipupdis + fi + + /usr/bin/mst start + /usr/bin/mlnx-fw-upgrade.sh + /etc/init.d/sxdkernel start + fi + + if [[ x"$WARM_BOOT" != x"true" ]]; then + if [ x$sonic_asic_platform == x'cavium' ]; then + /etc/init.d/xpnet.sh start + fi + fi + + # start service docker + /usr/bin/${SERVICE}.sh start + debug "Started ${SERVICE} service..." + + unlock_service_state_change +} + +wait() { + if [[ x"$sonic_asic_platform" == x"mellanox" ]]; then + debug "Starting pmon service..." + /bin/systemctl start pmon + debug "Started pmon service" + fi + /usr/bin/${SERVICE}.sh wait +} + +stop() { + debug "Stopping ${SERVICE} service..." + + lock_service_state_change + check_warm_boot + debug "Warm boot flag: ${SERVICE} ${WARM_BOOT}." + + if [[ x"$WARM_BOOT" == x"true" ]]; then + TYPE=warm + else + TYPE=cold + fi + + if [[ x$sonic_asic_platform == x"mellanox" ]] && [[ x$TYPE == x"cold" ]]; then + debug "Stopping pmon service ahead of syncd..." + /bin/systemctl stop pmon + debug "Stopped pmon service" + fi + + if [[ x$sonic_asic_platform != x"mellanox" ]] || [[ x$TYPE != x"cold" ]]; then + debug "${TYPE} shutdown syncd process ..." + /usr/bin/docker exec -i syncd /usr/bin/syncd_request_shutdown --${TYPE} + + # wait until syncd quits gracefully + while docker top syncd | grep -q /usr/bin/syncd; do + sleep 0.1 + done + + /usr/bin/docker exec -i syncd /bin/sync + debug "Finished ${TYPE} shutdown syncd process ..." + fi + + /usr/bin/${SERVICE}.sh stop + debug "Stopped ${SERVICE} service..." + + # platform specific tasks + + if [[ x"$WARM_BOOT" != x"true" ]]; then + if [ x$sonic_asic_platform == x'mellanox' ]; then + /etc/init.d/sxdkernel stop + /usr/bin/mst stop + elif [ x$sonic_asic_platform == x'cavium' ]; then + /etc/init.d/xpnet.sh stop + /etc/init.d/xpnet.sh start + fi + fi + + unlock_service_state_change +} + +case "$1" in + start|wait|stop) + $1 + ;; + *) + echo "Usage: $0 {start|wait|stop}" + exit 1 + ;; +esac diff --git a/files/sources.list b/files/sources.list deleted file mode 100644 index d2aaf4251bb..00000000000 --- a/files/sources.list +++ /dev/null @@ -1,8 +0,0 @@ -deb http://httpredir.debian.org/debian jessie main contrib non-free -deb-src http://httpredir.debian.org/debian jessie main contrib non-free - -deb http://httpredir.debian.org/debian jessie-updates main contrib non-free -deb-src http://httpredir.debian.org/debian jessie-updates main contrib non-free - -deb http://security.debian.org/ jessie/updates main contrib non-free -deb-src http://security.debian.org/ jessie/updates main contrib non-free diff --git a/files/sshd/host-ssh-keygen.sh b/files/sshd/host-ssh-keygen.sh new file mode 100755 index 00000000000..d4ea5bd431c --- /dev/null +++ b/files/sshd/host-ssh-keygen.sh @@ -0,0 +1,8 @@ +#!/bin/bash + +set -e + +[ -r /etc/ssh/ssh_host_rsa_key ] || { + rm -f /etc/ssh/ssh_host_*_key* + /usr/bin/ssh-keygen -t rsa -N '' -f /etc/ssh/ssh_host_rsa_key +} diff --git a/files/sshd/sshd.service b/files/sshd/sshd.service new file mode 100644 index 00000000000..d79c574da51 --- /dev/null +++ b/files/sshd/sshd.service @@ -0,0 +1,16 @@ +[Unit] +Description=OpenBSD Secure Shell server +After=network.target auditd.service +ConditionPathExists=!/etc/ssh/sshd_not_to_be_run + +[Service] +EnvironmentFile=-/etc/default/ssh +ExecStartPre=-/usr/local/bin/host-ssh-keygen.sh +ExecStart=/usr/sbin/sshd -D $SSHD_OPTS +ExecReload=/bin/kill -HUP $MAINPID +KillMode=process +Restart=on-failure + +[Install] +WantedBy=multi-user.target +Alias=sshd.service diff --git a/functions.sh b/functions.sh index b9e7ee0b55e..6015704d58d 100644 --- a/functions.sh +++ b/functions.sh @@ -36,3 +36,33 @@ die() { warn "$message" exit 1 } + +docker_try_rmi() { + local image_name="$1" + ## Note: inspect output has quotation characters, so sed to remove it as an argument + local image_id=$(docker inspect --format="{{json .Id}}" $image_name | sed -e 's/^"//' -e 's/"$//') + [ -z "$image_id" ] || { + ## Remove all the exited containers from this image + docker ps -a -q -f "status=exited" -f "ancestor=$1" | xargs --no-run-if-empty docker rm + ## Note: If there are running containers from this image, the build system is in an + ## unexpected state. The 'rmi' will fail and we need investigate the build environment. + docker rmi $image_name + } +} + +sonic_get_version() { + local describe=$(git describe --tags) + local latest_tag=$(git describe --tags --abbrev=0) + local branch_name=$(git rev-parse --abbrev-ref HEAD) + if [ -n "$(git status --untracked-files=no -s --ignore-submodules)" ]; then + local dirty="-dirty-$BUILD_TIMESTAMP" + fi + BUILD_NUMBER=${BUILD_NUMBER:-0} + ## Check if we are on tagged commit + ## Note: escape the version string by sed: / -> _ + if [ -n "$latest_tag" ] && [ "$describe" == "$latest_tag" ]; then + echo "${latest_tag}${dirty}" | sed 's/\//_/g' + else + echo "${branch_name}.${BUILD_NUMBER}${dirty:--$(git rev-parse --short HEAD)}" | sed 's/\//_/g' + fi +} diff --git a/get_deps.sh b/get_deps.sh deleted file mode 100755 index 145caf620af..00000000000 --- a/get_deps.sh +++ /dev/null @@ -1,19 +0,0 @@ -#!/bin/bash -## This script is to build the dependencies of an ONIE installer image -## -## USAGE: -## ./get_deps.sh - -# Obtaining the initramfs-tools -rm -rf deps/initramfs-tools -git clone --branch v0.120 https://anonscm.debian.org/git/kernel/initramfs-tools.git deps/initramfs-tools - -# Patch -pushd deps/initramfs-tools -patch -p1 < $OLDPWD/patch/initramfs-tools/loopback-file-system-support.patch - -# Build the package -fakeroot debian/rules clean -fakeroot debian/rules binary - -popd diff --git a/get_docker-base.sh b/get_docker-base.sh new file mode 100755 index 00000000000..ff2bdeaff02 --- /dev/null +++ b/get_docker-base.sh @@ -0,0 +1,21 @@ +#!/bin/bash +## This script is to retrieve and import the docker-base image from +## local folder where the image is built on the local machine +## +## USAGE: +## ./get_docker-base.sh + +set -x -e + +. ./functions.sh + +TARGET_PATH=$(sed -n 's/TARGET_PATH\s*=\s*//p' slave.mk) + +## [SuppressMessage("Microsoft.Security", "CS002:SecretInNextLine", Justification="Read-only link of Azure Blob storage with shared access signature (SAS)")] +BASE_URL="https://sonicstorage.blob.core.windows.net/packages/docker-base.ea507753d98b0769e2a15be13003331f8ad38d1c15b40a683e05fc53b1463b10.gz?sv=2015-04-05&sr=b&sig=YNN6eYVMEFndUaiHIRnqcZFdDZwIG%2BaAuVj0IoyDWPw%3D&se=2026-10-27T20%3A46%3A18Z&sp=r" + +base_image_name=docker-base +docker_try_rmi $base_image_name +mkdir -p $TARGET_PATH +wget --no-use-server-timestamps -O $TARGET_PATH/$base_image_name.gz "$BASE_URL" +docker load < $TARGET_PATH/$base_image_name.gz diff --git a/installer/arm64/install.sh b/installer/arm64/install.sh new file mode 100644 index 00000000000..e4a24214da3 --- /dev/null +++ b/installer/arm64/install.sh @@ -0,0 +1,66 @@ +#!/bin/sh + +# Copyright (C) 2014,2015 Curt Brune +# Copyright (C) 2015 david_yang +# +# SPDX-License-Identifier: GPL-2.0 + +set -e + +if [ -d "/etc/sonic" ]; then + echo "Installing SONiC in SONiC" + install_env="sonic" +elif grep -Fxqs "DISTRIB_ID=onie" /etc/lsb-release > /dev/null +then + echo "Installing SONiC in ONIE" + install_env="onie" +else + echo "Installing SONiC in BUILD" + install_env="build" +fi + +cd $(dirname $0) +if [ -r ./machine.conf ]; then + . ./machine.conf +fi + +if [ -r ./onie-image-arm64.conf ]; then + . ./onie-image-arm64.conf +fi + + +echo "Installer: platform: $platform" + +install_uimage() { + echo "Copying uImage to NOR flash:" + flashcp -v demo-${platform}.itb $mtd_dev +} + +hw_load() { + echo "cp.b $img_start \$loadaddr $img_sz" +} + +. ./platform.conf + +install_uimage + +hw_load_str="$(hw_load)" + +echo "Updating U-Boot environment variables" +(cat < /tmp/env.txt + +fw_setenv -f -s /tmp/env.txt + +cd / + +# Set NOS mode if available. For manufacturing diag installers, you +# probably want to skip this step so that the system remains in ONIE +# "installer" mode for installing a true NOS later. +if [ -x /bin/onie-nos-mode ] ; then + /bin/onie-nos-mode -s +fi diff --git a/installer/armhf/install.sh b/installer/armhf/install.sh new file mode 100755 index 00000000000..bfd7eeef9e4 --- /dev/null +++ b/installer/armhf/install.sh @@ -0,0 +1,56 @@ +#!/bin/sh + +# Copyright (C) Marvell Inc +# + +set -e + +if [ -d "/etc/sonic" ]; then + echo "Installing SONiC in SONiC" + install_env="sonic" +elif grep -Fxqs "DISTRIB_ID=onie" /etc/lsb-release > /dev/null +then + echo "Installing SONiC in ONIE" + install_env="onie" +else + echo "Installing SONiC in BUILD" + install_env="build" +fi + +cd $(dirname $0) +if [ -r ./machine.conf ]; then + . ./machine.conf +fi + +if [ -r ./onie-image-armhf.conf ]; then + . ./onie-image-armhf.conf +fi + + +echo "Installer: platform: $platform" + +# install_uimage will be overriden from platform.conf as it is non generic +install_uimage() { + echo "Copying uImage to NOR flash:" + flashcp -v demo-${platform}.itb $mtd_dev +} + +# hw_load will be overriden from platform.conf as it is non generic +hw_load() { + echo "cp.b $img_start \$loadaddr $img_sz" +} + +. ./platform.conf + +install_uimage + +hw_load_str="$(hw_load)" + +cd / + +# Set NOS mode if available. For manufacturing diag installers, you +# probably want to skip this step so that the system remains in ONIE +# "installer" mode for installing a true NOS later. +if [ -x /bin/onie-nos-mode ] ; then + /bin/onie-nos-mode -s +fi diff --git a/installer/sharch_body.sh b/installer/sharch_body.sh index 8260d0fd00e..d22fe26b699 100644 --- a/installer/sharch_body.sh +++ b/installer/sharch_body.sh @@ -27,6 +27,7 @@ echo " OK." # Untar and launch install script in a tmpfs cur_wd=$(pwd) +export cur_wd archive_path=$(realpath "$0") tmp_dir=$(mktemp -d) if [ "$(id -u)" = "0" ] ; then diff --git a/installer/x86_64/install.sh b/installer/x86_64/install.sh index 528c1472728..2cd579e28b2 100755 --- a/installer/x86_64/install.sh +++ b/installer/x86_64/install.sh @@ -5,10 +5,6 @@ # # SPDX-License-Identifier: GPL-2.0 -# Function definitions -# wc -l -line_count() { return $(echo $1 | wc -l); } - # Appends a command to a trap, which is needed because default trap behavior is to replace # previous trap for the same signal # - 1st arg: code to add @@ -28,8 +24,25 @@ _trap_push true set -e cd $(dirname $0) +if [ -d "/etc/sonic" ]; then + echo "Installing SONiC in SONiC" + install_env="sonic" +elif grep -Fxqs "DISTRIB_ID=onie" /etc/lsb-release > /dev/null +then + echo "Installing SONiC in ONIE" + install_env="onie" +else + echo "Installing SONiC in BUILD" + install_env="build" +fi + +if [ -r ./machine.conf ]; then . ./machine.conf +fi + +if [ -r ./onie-image.conf ]; then . ./onie-image.conf +fi echo "ONIE Installer: platform: $platform" @@ -39,59 +52,90 @@ if [ $(id -u) -ne 0 ] exit 1 fi -# Install demo on same block device as ONIE -onie_dev=$(blkid | grep ONIE-BOOT | head -n 1 | awk '{print $1}' | sed -e 's/:.*$//') -blk_dev=$(echo $onie_dev | sed -e 's/[1-9][0-9]*$//' | sed -e 's/\([0-9]\)\(p\)/\1/') -# Note: ONIE has no mount setting for / with device node, so below will be empty string -cur_part=$(cat /proc/mounts | awk "{ if(\$2==\"/\") print \$1 }" | grep $blk_dev || true) - -[ -b "$blk_dev" ] || { - echo "Error: Unable to determine block device of ONIE install" +# get running machine from conf file +if [ -r /etc/machine.conf ]; then + . /etc/machine.conf +elif [ -r /host/machine.conf ]; then + . /host/machine.conf +elif [ "$install_env" != "build" ]; then + echo "cannot find machine.conf" exit 1 -} +fi + +echo "onie_platform: $onie_platform" + +# Get platform specific linux kernel command line arguments +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="" + +# Default var/log device size in MB +VAR_LOG_SIZE=4096 + +[ -r platforms/$onie_platform ] && . platforms/$onie_platform + +# Pick up console port and speed from install enviroment if not defined yet. +# Console port and speed setting in cmdline is like "console=ttyS0,9600n", +# so we can use pattern 'console=ttyS[0-9]+,[0-9]+' to match it. +# If failed to get the speed and ttyS from cmdline then set them to default: ttyS0 and 9600 +if [ -z "$CONSOLE_PORT" ]; then + console_ttys=$(cat /proc/cmdline | grep -Eo 'console=ttyS[0-9]+' | cut -d "=" -f2) + if [ -z "$console_ttys" -o "$console_ttys" = "ttyS0" ]; then + CONSOLE_PORT=0x3f8 + CONSOLE_DEV=0 + elif [ "$console_ttys" = "ttyS1" ]; then + CONSOLE_PORT=0x2f8 + CONSOLE_DEV=1 + elif [ "$console_ttys" = "ttyS2" ]; then + CONSOLE_PORT=0x3e8 + CONSOLE_DEV=2 + elif [ "$console_ttys" = "ttyS3" ]; then + CONSOLE_PORT=0x2e8 + CONSOLE_DEV=3 + fi +fi + +if [ -z "$CONSOLE_SPEED" ]; then + speed=$(cat /proc/cmdline | grep -Eo 'console=ttyS[0-9]+,[0-9]+' | cut -d "," -f2) + if [ -z "$speed" ]; then + CONSOLE_SPEED=9600 + else + CONSOLE_SPEED=$speed + fi +fi + +# Install demo on same block device as ONIE +if [ "$install_env" != "build" ]; then + onie_dev=$(blkid | grep ONIE-BOOT | head -n 1 | awk '{print $1}' | sed -e 's/:.*$//') + blk_dev=$(echo $onie_dev | sed -e 's/[1-9][0-9]*$//' | sed -e 's/\([0-9]\)\(p\)/\1/') + # Note: ONIE has no mount setting for / with device node, so below will be empty string + cur_part=$(cat /proc/mounts | awk "{ if(\$2==\"/\") print \$1 }" | grep $blk_dev || true) + + [ -b "$blk_dev" ] || { + echo "Error: Unable to determine block device of ONIE install" + exit 1 + } +fi # If running in ONIE -if [ "$onie_dev" = "$cur_part" ] || [ -z "$cur_part" ]; then +if [ "$install_env" = "onie" ]; then # The onie bin tool prefix onie_bin= # The persistent ONIE directory location onie_root_dir=/mnt/onie-boot/onie # The onie file system root onie_initrd_tmp=/ -# Else running in normal Linux -else - # Mount ONIE-BOOT partition - onie_mnt=$(mktemp -d) || { - echo "Error: Unable to create file system mount point" - exit 1 - } - trap_push "fuser -km $onie_mnt || umount $onie_mnt || rmdir $onie_mnt || true" - mount $onie_dev $onie_mnt - onie_root_dir=$onie_mnt/onie - - # Mount initrd inside ONIE-BOOT partition - onie_initrd_tmp=$(mktemp -d) || { - echo "Error: Unable to create file system mount point" - exit 1 - } - trap_push "rm -rf $onie_initrd_tmp || true" - cd $onie_initrd_tmp - # Note: use wildcard in filename below to prevent hard-code version - cat $onie_mnt/onie/initrd.img-*-onie | unxz | cpio -id - cd - - onie_bin="chroot $onie_initrd_tmp" fi # The build system prepares this script by replacing %%DEMO-TYPE%% # with "OS" or "DIAG". demo_type="%%DEMO_TYPE%%" -# The build system prepares this script by replacing %%GIT_REVISION%% +# The build system prepares this script by replacing %%IMAGE_VERSION%% # with git revision hash as a version identifier -git_revision="%%GIT_REVISION%%" +image_version="%%IMAGE_VERSION%%" +timestamp="$(date -u +%Y%m%d)" -demo_volume_label="ACS-${demo_type}" -demo_volume_revision_label="ACS-${demo_type}-${git_revision}" +demo_volume_label="SONiC-${demo_type}" +demo_volume_revision_label="SONiC-${demo_type}-${image_version}" # auto-detect whether BIOS or UEFI if [ -d "/sys/firmware/efi/efivars" ] ; then @@ -100,27 +144,31 @@ else firmware="bios" fi -# determine ONIE partition type -onie_partition_type=$(${onie_bin} onie-sysinfo -t) -# demo partition size in MB -demo_part_size="%%ONIE_IMAGE_PART_SIZE%%" -if [ "$firmware" = "uefi" ] ; then - create_demo_partition="create_demo_uefi_partition" -elif [ "$onie_partition_type" = "gpt" ] ; then - create_demo_partition="create_demo_gpt_partition" -elif [ "$onie_partition_type" = "msdos" ] ; then - create_demo_partition="create_demo_msdos_partition" -else - echo "ERROR: Unsupported partition type: $onie_partition_type" - exit 1 +if [ "$install_env" = "onie" ]; then + # determine ONIE partition type + onie_partition_type=$(${onie_bin} onie-sysinfo -t) + # demo partition size in MB + demo_part_size="%%ONIE_IMAGE_PART_SIZE%%" + if [ "$firmware" = "uefi" ] ; then + create_demo_partition="create_demo_uefi_partition" + elif [ "$onie_partition_type" = "gpt" ] ; then + create_demo_partition="create_demo_gpt_partition" + elif [ "$onie_partition_type" = "msdos" ] ; then + create_demo_partition="create_demo_msdos_partition" + else + echo "ERROR: Unsupported partition type: $onie_partition_type" + exit 1 + fi fi # Creates a new partition for the DEMO OS. -# +# # arg $1 -- base block device # # Returns the created partition number in $demo_part demo_part="" +# TODO: remove reference to "ACS-OS" after all baseimages are upgraded +legacy_volume_label="ACS-OS" create_demo_gpt_partition() { blk_dev="$1" @@ -129,9 +177,9 @@ create_demo_gpt_partition() tmpfifo=$(mktemp -u) trap_push "rm $tmpfifo || true" mkfifo -m 600 "$tmpfifo" - + # See if demo partition already exists - demo_part=$(sgdisk -p $blk_dev | grep "$demo_volume_label" | awk '{print $1}') + demo_part=$(sgdisk -p $blk_dev | grep -e "$demo_volume_label" -e "$legacy_volume_label" | awk '{print $1}') if [ -n "$demo_part" ] ; then # delete existing partitions # if there are multiple partitions matched, we should delete each one, except the current OS's @@ -140,11 +188,21 @@ create_demo_gpt_partition() while read -r part_index; do if [ "$blk_dev$part_index" = "$cur_part" ]; then continue; fi echo "deleting partition $part_index ..." + # if the partition is already mounted, umount first + df $blk_dev$part_index 2>/dev/null && { + umount $blk_dev$part_index || { + echo "Error: Unable to umount $blk_dev$part_index" + exit 1 + } + } sgdisk -d $part_index $blk_dev || { echo "Error: Unable to delete partition $part_index on $blk_dev" exit 1 } - partprobe + partprobe || { + echo "Error: Unable to partprobe" + exit 1 + } done < $tmpfifo fi @@ -178,13 +236,14 @@ create_demo_gpt_partition() fi sgdisk --new=${demo_part}::+${demo_part_size}MB \ --attributes=${demo_part}:=:$attr_bitmask \ - --change-name=${demo_part}:$demo_volume_revision_label $blk_dev \ + --change-name=${demo_part}:$demo_volume_label $blk_dev \ || { + echo "Warning: The first trial of creating partition failed, trying the largest aligned available block of sectors on the disk" begin=$(sgdisk -F $blk_dev) end=$(sgdisk -E $blk_dev) sgdisk --new=${demo_part}:$begin:$end \ --attributes=${demo_part}:=:$attr_bitmask \ - --change-name=${demo_part}:$demo_volume_revision_label $blk_dev + --change-name=${demo_part}:$demo_volume_label $blk_dev } || { echo "Error: Unable to create partition $demo_part on $blk_dev" exit 1 @@ -202,7 +261,7 @@ create_demo_msdos_partition() # See if demo partition already exists -- look for the filesystem # label. - part_info="$(blkid | grep $demo_volume_label | awk -F: '{print $1}')" + part_info="$(blkid | grep -e "$demo_volume_label" -e "$legacy_volume_label" | awk -F: '{print $1}')" if [ -n "$part_info" ] ; then # delete existing partition demo_part="$(echo -n $part_info | sed -e s#${blk_dev}##)" @@ -245,7 +304,7 @@ create_demo_uefi_partition() create_demo_gpt_partition "$1" # erase any related EFI BootOrder variables from NVRAM. - for b in $(efibootmgr | grep "$demo_volume_label" | awk '{ print $1 }') ; do + for b in $(efibootmgr | grep -e "$demo_volume_label" -e "$legacy_volume_label" | awk '{ print $1 }') ; do local num=${b#Boot} # Remove trailing '*' num=${num%\*} @@ -297,6 +356,7 @@ demo_install_grub() cat $grub_install_log && rm -f $grub_install_log exit 1 } + rm -f $grub_install_log # restore immutable flag on the core.img file as discussed @@ -336,7 +396,7 @@ demo_install_uefi_grub() grub_install_log=$(mktemp) grub-install \ --no-nvram \ - --bootloader-id="$onie_initrd_tmp/$demo_volume_label" \ + --bootloader-id="$demo_volume_label" \ --efi-directory="/boot/efi" \ --boot-directory="$demo_mnt" \ --recheck \ @@ -359,35 +419,102 @@ demo_install_uefi_grub() } -eval $create_demo_partition $blk_dev -demo_dev=$(echo $blk_dev | sed -e 's/\(mmcblk[0-9]\)/\1p/')$demo_part +image_dir="image-$image_version" -# Make filesystem -mkfs.ext4 -L $demo_volume_revision_label $demo_dev +if [ "$install_env" = "onie" ]; then + eval $create_demo_partition $blk_dev + demo_dev=$(echo $blk_dev | sed -e 's/\(mmcblk[0-9]\)/\1p/')$demo_part -# Mount demo filesystem -demo_mnt=$(${onie_bin} mktemp -d) || { - echo "Error: Unable to create file system mount point" - exit 1 -} -trap_push "${onie_bin} fuser -km $demo_mnt || ${onie_bin} umount $demo_mnt || ${onie_bin} rmdir $demo_mnt || true" -${onie_bin} mount -t ext4 -o defaults,rw $demo_dev $demo_mnt || { - echo "Error: Unable to mount $demo_dev on $demo_mnt" - exit 1 -} + # Make filesystem + mkfs.ext4 -L $demo_volume_label $demo_dev -# Decompress the file for the file system directly to the partition -unzip $ONIE_INSTALLER_PAYLOAD -d $demo_mnt + # Mount demo filesystem + demo_mnt=$(${onie_bin} mktemp -d) || { + echo "Error: Unable to create file system mount point" + exit 1 + } + trap_push "${onie_bin} fuser -km $demo_mnt || ${onie_bin} umount $demo_mnt || ${onie_bin} rmdir $demo_mnt || true" + ${onie_bin} mount -t ext4 -o defaults,rw $demo_dev $demo_mnt || { + echo "Error: Unable to mount $demo_dev on $demo_mnt" + exit 1 + } + +elif [ "$install_env" = "sonic" ]; then + demo_mnt="/host" + eval running_sonic_revision=$(cat /etc/sonic/sonic_version.yml | grep build_version | cut -f2 -d" ") + # Prevent installing existing SONiC if it is running + if [ "$image_dir" = "image-$running_sonic_revision" ]; then + echo "Not installing SONiC version $running_sonic_revision, as current running SONiC has the same version" + exit 0 + fi + # Remove extra SONiC images if any + for f in $demo_mnt/image-* ; do + if [ -d $f ] && [ "$f" != "$demo_mnt/image-$running_sonic_revision" ] && [ "$f" != "$demo_mnt/$image_dir" ]; then + echo "Removing old SONiC installation $f" + rm -rf $f + fi + done +else + demo_mnt="build_raw_image_mnt" + demo_dev=$cur_wd/"%%OUTPUT_RAW_IMAGE%%" -# store installation log in demo file system -rm -f $onie_initrd_tmp/tmp/onie-support.tar.bz2 -${onie_bin} onie-support /tmp -mv $onie_initrd_tmp/tmp/onie-support.tar.bz2 $demo_mnt + mkfs.ext4 -L $demo_volume_label $demo_dev -if [ "$firmware" = "uefi" ] ; then - demo_install_uefi_grub "$demo_mnt" "$blk_dev" + echo "Mounting $demo_dev on $demo_mnt..." + mkdir $demo_mnt + mount -t auto -o loop $demo_dev $demo_mnt +fi + +echo "Installing SONiC to $demo_mnt/$image_dir" + +# Create target directory or clean it up if exists +if [ -d $demo_mnt/$image_dir ]; then + echo "Directory $demo_mnt/$image_dir/ already exists. Cleaning up..." + rm -rf $demo_mnt/$image_dir/* else - demo_install_grub "$demo_mnt" "$blk_dev" + mkdir $demo_mnt/$image_dir || { + echo "Error: Unable to create SONiC directory" + exit 1 + } +fi + +# Decompress the file for the file system directly to the partition +if [ x"$docker_inram" = x"on" ]; then + # when disk is small, keep dockerfs.tar.gz in disk, expand it into ramfs during initrd + unzip -o $ONIE_INSTALLER_PAYLOAD -d $demo_mnt/$image_dir +else + unzip -o $ONIE_INSTALLER_PAYLOAD -x "$FILESYSTEM_DOCKERFS" -d $demo_mnt/$image_dir + + if [ "$install_env" = "onie" ]; then + TAR_EXTRA_OPTION="--numeric-owner" + else + TAR_EXTRA_OPTION="--numeric-owner --warning=no-timestamp" + fi + mkdir -p $demo_mnt/$image_dir/$DOCKERFS_DIR + unzip -op $ONIE_INSTALLER_PAYLOAD "$FILESYSTEM_DOCKERFS" | tar xz $TAR_EXTRA_OPTION -f - -C $demo_mnt/$image_dir/$DOCKERFS_DIR +fi + +if [ "$install_env" = "onie" ]; then + # Store machine description in target file system + if [ -f /etc/machine-build.conf ]; then + # onie_ variable are generate at runtime. + # they are no longer hardcoded in /etc/machine.conf + # also remove single quotes around the value + set | grep ^onie | sed -e "s/='/=/" -e "s/'$//" > $demo_mnt/machine.conf + else + cp /etc/machine.conf $demo_mnt + fi + + # Store installation log in target file system + rm -f $onie_initrd_tmp/tmp/onie-support*.tar.bz2 + ${onie_bin} onie-support /tmp + mv $onie_initrd_tmp/tmp/onie-support*.tar.bz2 $demo_mnt/$image_dir/ + + if [ "$firmware" = "uefi" ] ; then + demo_install_uefi_grub "$demo_mnt" "$blk_dev" + else + demo_install_grub "$demo_mnt" "$blk_dev" + fi fi # Create a minimal grub.cfg that allows for: @@ -408,8 +535,8 @@ trap_push "rm $grub_cfg || true" [ -r ./platform.conf ] && . ./platform.conf -DEFAULT_GRUB_SERIAL_COMMAND="serial --port=%%CONSOLE_PORT%% --speed=%%CONSOLE_SPEED%% --word=8 --parity=no --stop=1" -DEFAULT_GRUB_CMDLINE_LINUX="console=tty0 console=ttyS%%CONSOLE_DEV%%,%%CONSOLE_SPEED%%n8 quiet" +DEFAULT_GRUB_SERIAL_COMMAND="serial --port=${CONSOLE_PORT} --speed=${CONSOLE_SPEED} --word=8 --parity=no --stop=1" +DEFAULT_GRUB_CMDLINE_LINUX="console=tty0 console=ttyS${CONSOLE_DEV},${CONSOLE_SPEED}n8 quiet" GRUB_SERIAL_COMMAND=${GRUB_SERIAL_COMMAND:-"$DEFAULT_GRUB_SERIAL_COMMAND"} GRUB_CMDLINE_LINUX=${GRUB_CMDLINE_LINUX:-"$DEFAULT_GRUB_CMDLINE_LINUX"} export GRUB_SERIAL_COMMAND @@ -425,11 +552,14 @@ set timeout=5 EOF -# Add the logic to support grub-reboot +# Add the logic to support grub-reboot and grub-set-default cat <> $grub_cfg if [ -s \$prefix/grubenv ]; then load_env fi +if [ "\${saved_entry}" ] ; then + set default="\${saved_entry}" +fi if [ "\${next_entry}" ] ; then set default="\${next_entry}" set next_entry= @@ -450,27 +580,54 @@ fi # Add a menu entry for the DEMO OS # Note: assume that apparmor is supported in the kernel demo_grub_entry="$demo_volume_revision_label" +if [ "$install_env" = "sonic" ]; then + old_sonic_menuentry=$(cat /host/grub/grub.cfg | sed "/$running_sonic_revision/,/}/!d") + demo_dev=$(echo $old_sonic_menuentry | sed -e "s/.*root\=\(.*\)rw.*/\1/") + onie_menuentry=$(cat /host/grub/grub.cfg | sed "/menuentry ONIE/,/}/!d") +fi + +if [ "$install_env" = "build" ]; then + grub_cfg_root=%%SONIC_ROOT%% +else + grub_cfg_root=$demo_dev +fi + cat <> $grub_cfg menuentry '$demo_grub_entry' { - search --no-floppy --label --set=root $demo_volume_revision_label - echo 'Loading $demo_volume_revision_label $demo_type kernel ...' + search --no-floppy --label --set=root $demo_volume_label + echo 'Loading $demo_volume_label $demo_type kernel ...' insmod gzio if [ x$grub_platform = xxen ]; then insmod xzio; insmod lzopio; fi insmod part_msdos insmod ext2 - linux /boot/vmlinuz-3.16.0-4-amd64 root=$demo_dev rw $GRUB_CMDLINE_LINUX \ - loop=$FILESYSTEM_SQUASHFS loopfstype=squashfs \ - apparmor=1 security=apparmor - echo 'Loading $demo_volume_revision_label $demo_type initial ramdisk ...' - initrd /boot/initrd.img-3.16.0-4-amd64 + linux /$image_dir/boot/vmlinuz-4.9.0-9-2-amd64 root=$grub_cfg_root rw $GRUB_CMDLINE_LINUX \ + net.ifnames=0 biosdevname=0 \ + loop=$image_dir/$FILESYSTEM_SQUASHFS loopfstype=squashfs \ + apparmor=1 security=apparmor varlog_size=$VAR_LOG_SIZE usbcore.autosuspend=-1 $ONIE_PLATFORM_EXTRA_CMDLINE_LINUX + echo 'Loading $demo_volume_label $demo_type initial ramdisk ...' + initrd /$image_dir/boot/initrd.img-4.9.0-9-2-amd64 } EOF -# Add menu entries for ONIE -- use the grub fragment provided by the -# ONIE distribution. -$onie_root_dir/grub.d/50_onie_grub >> $grub_cfg +if [ "$install_env" = "onie" ]; then + # Add menu entries for ONIE -- use the grub fragment provided by the + # ONIE distribution. + $onie_root_dir/grub.d/50_onie_grub >> $grub_cfg + mkdir -p $onie_initrd_tmp/$demo_mnt/grub +else +cat <> $grub_cfg +$old_sonic_menuentry +$onie_menuentry +EOF +fi -mkdir -p $onie_initrd_tmp/$demo_mnt/grub -cp $grub_cfg $onie_initrd_tmp/$demo_mnt/grub/grub.cfg +if [ "$install_env" = "build" ]; then + cp $grub_cfg $demo_mnt/grub.cfg + umount $demo_mnt +else + cp $grub_cfg $onie_initrd_tmp/$demo_mnt/grub/grub.cfg +fi cd / + +echo "Installed SONiC base image $demo_volume_label successfully" diff --git a/inv_build/apply_patch.sh b/inv_build/apply_patch.sh new file mode 100755 index 00000000000..cedceae770e --- /dev/null +++ b/inv_build/apply_patch.sh @@ -0,0 +1,89 @@ +#!/bin/bash +## This script is to apply inventec own patch to SONiC + +BASE_PATH=$(pwd) +INV_PATCH_DIR=$BASE_PATH/inv_build/patch_files + +if [ ! -d ${INV_PATCH_DIR}/* ]; then + exit 0 +fi + +# Find each submodule need to patch +echo "[INFO] start to apply patch in different module" +for entry in $INV_PATCH_DIR/* +do + if [ ! -d $entry ]; then + continue + fi + + SUB_MODULE="$(basename $entry)" + + if [ "$SUB_MODULE" = "README" ]; then + continue + elif [ "$SUB_MODULE" = "sonic-buildimage" ]; then + echo + echo "=== apply patch to $SUB_MODULE ===" + seriesfile="${INV_PATCH_DIR}/${SUB_MODULE}/series" + exec < ${seriesfile} + + while read line + do + content=$(echo $line | awk /#/'{print $1}') + if [ "$content" = "#" ]; then + continue + fi + + content=$(echo $line | awk /CodeBase/'{print $1}') + if [ "$content" = "[CodeBase]" ]; then + content=$(echo $line | awk '{print $NF}') + continue + fi + + content=$(echo $line | awk /order/'{print $1}') + if [ "$content" = "[order]" ]; then + continue + fi + + git am --whitespace=nowarn ${INV_PATCH_DIR}/${SUB_MODULE}/$line + echo $line + + done + echo + else + cd src/$SUB_MODULE + echo "=== apply patch to ${SUB_MODULE} ===" + CURRENT_HEAD="$(git rev-parse HEAD)" + seriesfile="${INV_PATCH_DIR}/${SUB_MODULE}/series" + exec < ${seriesfile} + + while read line + do + content=$(echo $line | awk /#/'{print $1}') + if [ "$content" = "#" ]; then + continue + fi + + content=$(echo $line | awk /CodeBase/'{print $1}') + if [ "$content" = "[CodeBase]" ]; then + TARGET_VERSION=$(echo $line | awk '{print $NF}') + if [ "$CURRENT_HEAD" != "$TARGET_VERSION" ]; then + echo "error --> $SUB_MODULE:Target version $TARGET_VERSION not match current $CURRENT_HEAD" + break + fi + continue + fi + + content=$(echo $line | awk /order/'{print $1}') + if [ "$content" = "[order]" ]; then + continue + fi + + git am --whitespace=nowarn ${INV_PATCH_DIR}/${SUB_MODULE}/$line + + done + echo + fi + + cd $BASE_PATH + echo "already executed make init and patched files" > ${INV_PATCH_DIR}/already_patched +done diff --git a/inv_build/patch_files/sonic-platform-daemons/[sonic-platform-daemons]xcvrd-retrieve-DOM-info-using-platform-API.patch b/inv_build/patch_files/sonic-platform-daemons/[sonic-platform-daemons]xcvrd-retrieve-DOM-info-using-platform-API.patch new file mode 100644 index 00000000000..49645145000 --- /dev/null +++ b/inv_build/patch_files/sonic-platform-daemons/[sonic-platform-daemons]xcvrd-retrieve-DOM-info-using-platform-API.patch @@ -0,0 +1,30 @@ +From 8fcfd356b0bbfd81329e4b7a0aea5d6196cc4349 Mon Sep 17 00:00:00 2001 +From: James Huang +Date: Fri, 6 Mar 2020 15:27:00 +0800 +Subject: [PATCH] [xcvrd] Retrieve DOM info using platform API 2.0 if + implemented #48 + +--- + sonic-xcvrd/scripts/xcvrd | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/sonic-xcvrd/scripts/xcvrd b/sonic-xcvrd/scripts/xcvrd +index c491375..0347c65 100644 +--- a/sonic-xcvrd/scripts/xcvrd ++++ b/sonic-xcvrd/scripts/xcvrd +@@ -143,8 +143,10 @@ def _wrapper_get_transceiver_dom_info(physical_port): + + def _wrapper_get_transceiver_dom_threshold_info(physical_port): + if platform_chassis is not None: +- return None +- ++ try: ++ return platform_chassis.get_sfp(physical_port).get_transceiver_threshold_info() ++ except NotImplementedError: ++ pass + return platform_sfputil.get_transceiver_dom_threshold_info_dict(physical_port) + + def _wrapper_get_transceiver_change_event(timeout): +-- +2.7.4 + diff --git a/inv_build/patch_files/sonic-platform-daemons/series b/inv_build/patch_files/sonic-platform-daemons/series new file mode 100644 index 00000000000..b5834e52134 --- /dev/null +++ b/inv_build/patch_files/sonic-platform-daemons/series @@ -0,0 +1,4 @@ +# This series applies to sonic-platform-daemons GIT commit +[CodeBase] a34ba131f618a8df6beec1f548aa08f9cedc48db +[order] +[sonic-platform-daemons]xcvrd-retrieve-DOM-info-using-platform-API.patch diff --git a/onie-image-arm64.conf b/onie-image-arm64.conf new file mode 100644 index 00000000000..f14e5602c21 --- /dev/null +++ b/onie-image-arm64.conf @@ -0,0 +1,46 @@ +## DESCRIPTION: +## config for ONIE image +## + +## Partition size in MB +## The default size is 32GB +: ${ONIE_IMAGE_PART_SIZE:=32768} + +## Target hardware information +: ${TARGET_PLATFORM:=arm64} +: ${TARGET_MACHINE:=generic} + +ONIEIMAGE_VERSION=r0 + +## Filename for squashfs file system +FILESYSTEM_SQUASHFS=fs.squashfs + +## Filename for onie installer payload, will be the main part of onie installer +ONIE_INSTALLER_PAYLOAD=fs.zip + +## Filename for docker file system +FILESYSTEM_DOCKERFS=dockerfs.tar.gz + +## docker directory on the root filesystem +DOCKERFS_DIR=docker + +## Output file name for onie installer +OUTPUT_ONIE_IMAGE=target/sonic-$TARGET_MACHINE.bin + +## Output file name for raw image +OUTPUT_RAW_IMAGE=target/sonic-$TARGET_MACHINE.raw + +## Raw image size in MB +RAW_IMAGE_DISK_SIZE=2048 + +## Output file name for kvm image +OUTPUT_KVM_IMAGE=target/sonic-$TARGET_MACHINE.img + +## Kvm image size in GB +KVM_IMAGE_DISK_SIZE=16 + +## Output file name for aboot installer +OUTPUT_ABOOT_IMAGE=target/sonic-aboot-$TARGET_MACHINE.swi + +## Aboot boot image name +ABOOT_BOOT_IMAGE=.sonic-boot.swi diff --git a/onie-image-armhf.conf b/onie-image-armhf.conf new file mode 100644 index 00000000000..0d816e4a898 --- /dev/null +++ b/onie-image-armhf.conf @@ -0,0 +1,46 @@ +## DESCRIPTION: +## config for ONIE image +## + +## Partition size in MB +## The default size is 32GB +: ${ONIE_IMAGE_PART_SIZE:=32768} + +## Target hardware information +: ${TARGET_PLATFORM:=armhf} +: ${TARGET_MACHINE:=generic} + +ONIEIMAGE_VERSION=r0 + +## Filename for squashfs file system +FILESYSTEM_SQUASHFS=fs.squashfs + +## Filename for onie installer payload, will be the main part of onie installer +ONIE_INSTALLER_PAYLOAD=fs.zip + +## Filename for docker file system +FILESYSTEM_DOCKERFS=dockerfs.tar.gz + +## docker directory on the root filesystem +DOCKERFS_DIR=docker + +## Output file name for onie installer +OUTPUT_ONIE_IMAGE=target/sonic-$TARGET_MACHINE.bin + +## Output file name for raw image +OUTPUT_RAW_IMAGE=target/sonic-$TARGET_MACHINE.raw + +## Raw image size in MB +RAW_IMAGE_DISK_SIZE=2048 + +## Output file name for kvm image +OUTPUT_KVM_IMAGE=target/sonic-$TARGET_MACHINE.img + +## Kvm image size in GB +KVM_IMAGE_DISK_SIZE=16 + +## Output file name for aboot installer +OUTPUT_ABOOT_IMAGE=target/sonic-aboot-$TARGET_MACHINE.swi + +## Aboot boot image name +ABOOT_BOOT_IMAGE=.sonic-boot.swi diff --git a/onie-image.conf b/onie-image.conf index 25c631563cd..2ca0a68484e 100644 --- a/onie-image.conf +++ b/onie-image.conf @@ -1,5 +1,5 @@ ## DESCRIPTION: -## partition related config +## config for ONIE image ## ## Partition size in MB @@ -18,5 +18,32 @@ FILESYSTEM_SQUASHFS=fs.squashfs ## Filename for onie installer payload, will be the main part of onie installer ONIE_INSTALLER_PAYLOAD=fs.zip +## Filename for docker file system +FILESYSTEM_DOCKERFS=dockerfs.tar.gz + +## docker directory on the root filesystem +DOCKERFS_DIR=docker + +## docker ramfs disk space +DOCKER_RAMFS_SIZE=900M + ## Output file name for onie installer -OUTPUT_ONIE_IMAGE=acs-$TARGET_MACHINE.bin +OUTPUT_ONIE_IMAGE=target/sonic-$TARGET_MACHINE.bin + +## Output file name for raw image +OUTPUT_RAW_IMAGE=target/sonic-$TARGET_MACHINE.raw + +## Raw image size in MB +RAW_IMAGE_DISK_SIZE=2048 + +## Output file name for kvm image +OUTPUT_KVM_IMAGE=target/sonic-$TARGET_MACHINE.img + +## Kvm image size in GB +KVM_IMAGE_DISK_SIZE=16 + +## Output file name for aboot installer +OUTPUT_ABOOT_IMAGE=target/sonic-aboot-$TARGET_MACHINE.swi + +## Aboot boot image name +ABOOT_BOOT_IMAGE=.sonic-boot.swi diff --git a/onie-mk-demo.sh b/onie-mk-demo.sh index 3dd81b876fd..845348d860f 100755 --- a/onie-mk-demo.sh +++ b/onie-mk-demo.sh @@ -12,7 +12,7 @@ installer_dir=$4 platform_conf=$5 output_file=$6 demo_type=$7 -git_revision=$8 +image_version=$8 onie_image_part_size=$9 shift 9 @@ -29,7 +29,7 @@ if [ ! -d $installer_dir/$arch ] || \ exit 1 fi -[ -n "$git_revision" ] || { +[ -n "$image_version" ] || { echo "Error: Invalid git revisions" exit 1 } @@ -39,11 +39,6 @@ fi exit 1 } -[ -n "$CONSOLE_SPEED" ] || { - echo "Error: Invalid CONSOLE_SPEED" - exit 1 -} - [ -r "$platform_conf" ] || { echo "Error: Unable to read installer platform configuration file: $platform_conf" exit 1 @@ -81,22 +76,24 @@ tmp_dir=$(mktemp --directory) tmp_installdir="$tmp_dir/installer" mkdir $tmp_installdir || clean_up 1 -cp $installer_dir/$arch/install.sh $tmp_installdir || clean_up 1 +cp -r $installer_dir/$arch/* $tmp_installdir || clean_up 1 cp onie-image.conf $tmp_installdir +cp onie-image-*.conf $tmp_installdir # Escape special chars in the user provide kernel cmdline string for use in # sed. Special chars are: \ / & EXTRA_CMDLINE_LINUX=`echo $EXTRA_CMDLINE_LINUX | sed -e 's/[\/&]/\\\&/g'` +output_raw_image=$(cat onie-image.conf | grep OUTPUT_RAW_IMAGE | cut -f2 -d"=") +[ -z "$TARGET_MACHINE" ] && output_raw_image=$(echo $output_raw_image | sed -e 's/$TARGET_MACHINE/$machine/g') +output_raw_image=$(eval echo $output_raw_image) + # Tailor the demo installer for OS mode or DIAG mode sed -i -e "s/%%DEMO_TYPE%%/$demo_type/g" \ - -e "s/%%GIT_REVISION%%/$git_revision/g" \ + -e "s/%%IMAGE_VERSION%%/$image_version/g" \ -e "s/%%ONIE_IMAGE_PART_SIZE%%/$onie_image_part_size/" \ - -e "s/%%CONSOLE_SPEED%%/$CONSOLE_SPEED/g" \ - -e "s/%%CONSOLE_DEV%%/$CONSOLE_DEV/g" \ - -e "s/%%CONSOLE_FLAG%%/$CONSOLE_FLAG/g" \ - -e "s/%%CONSOLE_PORT%%/$CONSOLE_PORT/g" \ -e "s/%%EXTRA_CMDLINE_LINUX%%/$EXTRA_CMDLINE_LINUX/" \ + -e "s@%%OUTPUT_RAW_IMAGE%%@$output_raw_image@" \ $tmp_installdir/install.sh || clean_up 1 echo -n "." cp -r $* $tmp_installdir || clean_up 1 diff --git a/platform/barefoot/bfn-modules.mk b/platform/barefoot/bfn-modules.mk new file mode 100644 index 00000000000..67b7fa924da --- /dev/null +++ b/platform/barefoot/bfn-modules.mk @@ -0,0 +1,10 @@ +# BFN Platform modules + +VERSION = 1.0 + +BFN_MODULE = bfn-modules_$(VERSION)_amd64.deb +$(BFN_MODULE)_SRC_PATH = $(PLATFORM_PATH)/bfn-modules +$(BFN_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +SONIC_DPKG_DEBS += $(BFN_MODULE) + +SONIC_STRETCH_DEBS += $(BFN_MODULE) diff --git a/platform/barefoot/bfn-modules/LICENSE b/platform/barefoot/bfn-modules/LICENSE new file mode 100644 index 00000000000..e9d73a1c63c --- /dev/null +++ b/platform/barefoot/bfn-modules/LICENSE @@ -0,0 +1,37 @@ +BAREFOOT NETWORKS CONFIDENTIAL & PROPRIETARY + + Copyright (c) 2015-2016 Barefoot Networks, Inc. + + All Rights Reserved. + + NOTICE: All information contained herein is, and remains the property of + Barefoot Networks, Inc. and its suppliers, if any. The intellectual and + technical concepts contained herein are proprietary to Barefoot Networks, + Inc. + and its suppliers and may be covered by U.S. and Foreign Patents, patents in + process, and are protected by trade secret or copyright law. + Dissemination of this information or reproduction of this material is + strictly forbidden unless prior written permission is obtained from + Barefoot Networks, Inc. + + No warranty, explicit or implicit is provided, unless granted under a + written agreement with Barefoot Networks, Inc. + + +GPL LICENSE SUMMARY + + Copyright(c) 2015 Barefoot Networks. All rights reserved. + + This program is free software; you can redistribute it and/or modify + it under the terms of version 2 of the GNU General Public License as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the... + + diff --git a/platform/barefoot/bfn-modules/MAINTAINERS b/platform/barefoot/bfn-modules/MAINTAINERS new file mode 100644 index 00000000000..b9c62ce0154 --- /dev/null +++ b/platform/barefoot/bfn-modules/MAINTAINERS @@ -0,0 +1,4 @@ +# This file describes the maintainers for sonic-platform-modules-bfn +# See the SONiC project governance document for more information + +Mailinglist = sonicproject@googlegroups.com diff --git a/platform/barefoot/bfn-modules/README.md b/platform/barefoot/bfn-modules/README.md new file mode 100644 index 00000000000..6c47cbed2a5 --- /dev/null +++ b/platform/barefoot/bfn-modules/README.md @@ -0,0 +1,2 @@ +# bfn-modules +Device drivers for support of BFN platform for the SONiC project diff --git a/platform/barefoot/bfn-modules/debian/changelog b/platform/barefoot/bfn-modules/debian/changelog new file mode 100644 index 00000000000..85ab933da30 --- /dev/null +++ b/platform/barefoot/bfn-modules/debian/changelog @@ -0,0 +1,5 @@ +bfn-modules (1.0) unstable; urgency=low + + * Initial release + + -- Support Mon, 22 Oct 2018 11:11:11 -0800 diff --git a/platform/barefoot/bfn-modules/debian/compat b/platform/barefoot/bfn-modules/debian/compat new file mode 100644 index 00000000000..45a4fb75db8 --- /dev/null +++ b/platform/barefoot/bfn-modules/debian/compat @@ -0,0 +1 @@ +8 diff --git a/platform/barefoot/bfn-modules/debian/control b/platform/barefoot/bfn-modules/debian/control new file mode 100644 index 00000000000..c9a53ec1d08 --- /dev/null +++ b/platform/barefoot/bfn-modules/debian/control @@ -0,0 +1,12 @@ +Source: bfn-modules +Section: main +Priority: extra +Maintainer: support +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: bfn-modules +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for bfn asic for mmap + diff --git a/platform/barefoot/bfn-modules/debian/copyright b/platform/barefoot/bfn-modules/debian/copyright new file mode 100644 index 00000000000..ade42b7aa75 --- /dev/null +++ b/platform/barefoot/bfn-modules/debian/copyright @@ -0,0 +1,15 @@ +Provides linux kernel driver for BF PCIe devices + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/barefoot/bfn-modules/debian/files b/platform/barefoot/bfn-modules/debian/files new file mode 100644 index 00000000000..cffeb8a7d9c --- /dev/null +++ b/platform/barefoot/bfn-modules/debian/files @@ -0,0 +1 @@ +bfn-modules_1.0_amd64.deb main extra diff --git a/platform/barefoot/bfn-modules/debian/rules b/platform/barefoot/bfn-modules/debian/rules new file mode 100755 index 00000000000..c588b075e5e --- /dev/null +++ b/platform/barefoot/bfn-modules/debian/rules @@ -0,0 +1,30 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +PACKAGE_NAME := bfn-modules +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MODULE_SRC := $(shell pwd)/modules + +%: + dh $@ + +override_dh_auto_build: + make -C $(KERNEL_SRC)/build M=$(MODULE_SRC) + +override_dh_auto_install: + dh_installdirs -p$(PACKAGE_NAME) $(KERNEL_SRC)/$(INSTALL_MOD_DIR) + cp $(MODULE_SRC)/*.ko debian/$(PACKAGE_NAME)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) + dh_installdirs -p$(PACKAGE_NAME) usr/local/bin + +override_dh_usrlocal: + +override_dh_pysupport: + +override_dh_clean: + dh_clean + rm -f $(MODULE_SRC)/*.o $(MODULE_SRC)/*.ko $(MODULE_SRC)/*.mod.c $(MODULE_SRC)/.*.cmd + rm -f $(MODULE_SRC)/Module.markers $(MODULE_SRC)/Module.symvers $(MODULE_SRC)/modules.order + rm -rf $(MODULE_SRC)/.tmp_versions + diff --git a/platform/barefoot/bfn-modules/modules/Makefile b/platform/barefoot/bfn-modules/modules/Makefile new file mode 100644 index 00000000000..d180b29f6ae --- /dev/null +++ b/platform/barefoot/bfn-modules/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := bf_kdrv.o +obj-m += bf_tun.o diff --git a/platform/barefoot/bfn-modules/modules/bf_ioctl.h b/platform/barefoot/bfn-modules/modules/bf_ioctl.h new file mode 100644 index 00000000000..e14716f50fa --- /dev/null +++ b/platform/barefoot/bfn-modules/modules/bf_ioctl.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * BAREFOOT NETWORKS CONFIDENTIAL & PROPRIETARY + * + * Copyright (c) 2018-2018 Barefoot Networks, Inc. + * + * NOTICE: All information contained herein is, and remains the property of + * Barefoot Networks, Inc. and its suppliers, if any. The intellectual and + * technical concepts contained herein are proprietary to Barefoot Networks, + * Inc. + * and its suppliers and may be covered by U.S. and Foreign Patents, patents in + * process, and are protected by trade secret or copyright law. + * Dissemination of this information or reproduction of this material is + * strictly forbidden unless prior written permission is obtained from + * Barefoot Networks, Inc. + * + * No warranty, explicit or implicit is provided, unless granted under a + * written agreement with Barefoot Networks, Inc. + * + * $Id: $ + * + ******************************************************************************/ + +#ifndef _BF_IOCTL_H_ +#define _BF_IOCTL_H_ + +#ifdef __KERNEL__ +#include +#else +#include + +#ifndef phys_addr_t +typedef uint64_t phys_addr_t; +#endif + +#endif /* __KERNEL__ */ + +#define BF_IOC_MAGIC 'b' + +typedef struct bf_dma_bus_map_s +{ + phys_addr_t phy_addr; + void *dma_addr; + size_t size; +} bf_dma_bus_map_t; + +#define BF_IOCMAPDMAADDR _IOWR(BF_IOC_MAGIC, 0, bf_dma_bus_map_t) +#define BF_IOCUNMAPDMAADDR _IOW(BF_IOC_MAGIC, 0, bf_dma_bus_map_t) + +#endif /* _BF_IOCTL_H_ */ diff --git a/platform/barefoot/bfn-modules/modules/bf_kdrv.c b/platform/barefoot/bfn-modules/modules/bf_kdrv.c new file mode 100644 index 00000000000..a9e8e65f968 --- /dev/null +++ b/platform/barefoot/bfn-modules/modules/bf_kdrv.c @@ -0,0 +1,1382 @@ +/******************************************************************************* + * BAREFOOT NETWORKS CONFIDENTIAL & PROPRIETARY + * + * Copyright (c) 2015-2016 Barefoot Networks, Inc. + + * All Rights Reserved. + * + * NOTICE: All information contained herein is, and remains the property of + * Barefoot Networks, Inc. and its suppliers, if any. The intellectual and + * technical concepts contained herein are proprietary to Barefoot Networks, + * Inc. + * and its suppliers and may be covered by U.S. and Foreign Patents, patents in + * process, and are protected by trade secret or copyright law. + * Dissemination of this information or reproduction of this material is + * strictly forbidden unless prior written permission is obtained from + * Barefoot Networks, Inc. + * + * No warranty, explicit or implicit is provided, unless granted under a + * written agreement with Barefoot Networks, Inc. + * + * $Id: $ + * + ******************************************************************************/ +/** + * + * GPL LICENSE SUMMARY + * + * Copyright(c) 2015 Barefoot Networks. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the... + * + **/ + +/* bf_drv kernel module + * + * This is kernel mode driver for Tofino chip. + * Provides user space mmap service and user space "wait for interrupt" + * and "enable interrupt" services. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "bf_ioctl.h" + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0) + #include +#else + #include +#endif + +#include +#include +#include + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 16, 0) +//#error unsupported linux kernel version +#endif + +/* TBD: Need to build with CONFIG_PCI_MSI */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0) +extern int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec); +extern int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec); +#else +extern int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec); +extern int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, int minvec, int maxvec); +#endif + +#define PCI_VENDOR_ID_BF 0x1d1c +#define TOFINO_DEV_ID_A0 0x01 +#define TOFINO_DEV_ID_B0 0x10 +#define TOFINO2_DEV_ID_A0 0x0100 + +#ifndef PCI_MSIX_ENTRY_SIZE +#define PCI_MSIX_ENTRY_SIZE 16 +#define PCI_MSIX_ENTRY_LOWER_ADDR 0 +#define PCI_MSIX_ENTRY_UPPER_ADDR 4 +#define PCI_MSIX_ENTRY_DATA 8 +#define PCI_MSIX_ENTRY_VECTOR_CTRL 12 +#define PCI_MSIX_ENTRY_CTRL_MASKBIT 1 +#endif + +#define BF_CLASS_NAME "bf" +#define BF_MAX_DEVICE_CNT 256 +#define BF_INTR_MODE_NONE_NAME "none" +#define BF_INTR_MODE_LEGACY_NAME "legacy" +#define BF_INTR_MODE_MSI_NAME "msi" +#define BF_INTR_MODE_MSIX_NAME "msix" +#define BF_MAX_BAR_MAPS 6 +#define BF_MSIX_ENTRY_CNT 128 /* TBD make it 512 */ +#define BF_MSI_ENTRY_CNT 2 + +/* interrupt mode */ +enum bf_intr_mode { + BF_INTR_MODE_NONE = 0, + BF_INTR_MODE_LEGACY, + BF_INTR_MODE_MSI, + BF_INTR_MODE_MSIX +}; + +/* device memory */ +struct bf_dev_mem { + const char *name; + phys_addr_t addr; + resource_size_t size; + void __iomem *internal_addr; +}; + +struct bf_listener { + struct bf_pci_dev *bfdev; + s32 event_count[BF_MSIX_ENTRY_CNT]; + int minor; + struct bf_listener *next; +}; + +/* device information */ +struct bf_dev_info { + struct module *owner; + struct device *dev; + int minor; + atomic_t event[BF_MSIX_ENTRY_CNT]; + wait_queue_head_t wait; + const char *version; + struct bf_dev_mem mem[BF_MAX_BAR_MAPS]; + struct msix_entry *msix_entries; + long irq; /* first irq vector */ + int num_irq; /* number of irq vectors */ + unsigned long irq_flags;/* sharable ?? */ + int pci_error_state; /* was there a pci bus error */ +}; + +/* cookie to be passed to IRQ handler, useful especially with MSIX */ +struct bf_int_vector { + struct bf_pci_dev *bf_dev; + int int_vec_offset; +}; + + +/** + * A structure describing the private information for a BF pcie device. + */ +struct bf_pci_dev { + struct bf_dev_info info; + struct pci_dev *pdev; + enum bf_intr_mode mode; + u8 instance; + char name[16]; + struct bf_int_vector bf_int_vec[BF_MSIX_ENTRY_CNT]; + struct bf_listener *listener_head; /* head of a singly linked list of + listeners */ +}; + +/* Keep any global information here that must survive even after the + * bf_pci_dev is free-ed up. + */ +struct bf_global { + struct bf_pci_dev *bfdev ; + struct cdev *bf_cdev; + struct fasync_struct *async_queue; +}; + +static int bf_major; +static int bf_minor[BF_MAX_DEVICE_CNT] = {0}; +static struct class *bf_class = NULL; +static char *intr_mode = NULL; +static enum bf_intr_mode bf_intr_mode_default = BF_INTR_MODE_MSI; +static spinlock_t bf_nonisr_lock; +/* dev->minor should index into this array */ +static struct bf_global bf_global[BF_MAX_DEVICE_CNT]; + +static void bf_add_listener(struct bf_pci_dev *bfdev, + struct bf_listener *listener) +{ + struct bf_listener **cur_listener = &bfdev->listener_head; + + if (!listener) { + return; + } + spin_lock(&bf_nonisr_lock); + + while (*cur_listener) { + cur_listener = &((*cur_listener)->next); + } + *cur_listener = listener; + listener->next = NULL; + + spin_unlock(&bf_nonisr_lock); +} + +static void bf_remove_listener(struct bf_pci_dev *bfdev, + struct bf_listener *listener) +{ + struct bf_listener **cur_listener = &bfdev->listener_head; + + /* in case of certain error conditions, this function might be called after bf_pci_remove() + */ + if (!bfdev || !listener) { + return; + } + spin_lock(&bf_nonisr_lock); + + if (*cur_listener == listener) { + *cur_listener = listener->next; + } else { + while (*cur_listener) { + if ((*cur_listener)->next == listener) { + (*cur_listener)->next = listener->next; + break; + } + cur_listener = &((*cur_listener)->next); + } + listener->next = NULL; + } + + spin_unlock(&bf_nonisr_lock); +} + +/* a pool of minor numbers is maintained */ +/* return the first available minor number */ +static int bf_get_next_minor_no(int *minor) +{ + int i; + + spin_lock(&bf_nonisr_lock); + for(i = 0; i < BF_MAX_DEVICE_CNT; i++) { + if (bf_minor[i] == 0) { + *minor = i; + bf_minor[i] = 1; /* mark it as taken */ + spin_unlock(&bf_nonisr_lock); + return 0; + } + } + *minor = -1; + spin_unlock(&bf_nonisr_lock); + return -1; +} + +/* return a minor number back to the pool for recycling */ +static int bf_return_minor_no(int minor) +{ + int err; + + spin_lock(&bf_nonisr_lock); + if (bf_minor[minor] == 0) { /* was already returned */ + err = -1; /* don't change anything, but return error */ + } else { + bf_minor[minor] = 0; /* mark it as available */ + err = 0; + } + spin_unlock(&bf_nonisr_lock); + return err; +} + +static inline struct bf_pci_dev *bf_get_pci_dev(struct bf_dev_info *info) +{ + return container_of(info, struct bf_pci_dev, info); +} + +/* + * It masks the msix on/off of generating MSI-X messages. + */ +static void +bf_msix_mask_irq(struct msi_desc *desc, int32_t state) +{ + u32 mask_bits = desc->masked; + unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + + PCI_MSIX_ENTRY_VECTOR_CTRL; + + if (state != 0) + mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; + else + mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT; + + if (mask_bits != desc->masked) { + writel(mask_bits, desc->mask_base + offset); + readl(desc->mask_base); + desc->masked = mask_bits; + } +} + +/** + * irqcontrol can be used to disable/enable interrupt from user space processes. + * + * @param bf_dev + * pointer to bf_pci_dev + * @param irq_state + * state value. 1 to enable interrupt, 0 to disable interrupt. + * + * @return + * - On success, 0. + * - On failure, a negative value. + */ +static int +bf_pci_irqcontrol(struct bf_pci_dev *bfdev, s32 irq_state) +{ + struct pci_dev *pdev = bfdev->pdev; + + pci_cfg_access_lock(pdev); + if (bfdev->mode == BF_INTR_MODE_LEGACY) + pci_intx(pdev, !!irq_state); + + else if (bfdev->mode == BF_INTR_MODE_MSIX) { + struct msi_desc *desc; +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,2,0) + list_for_each_entry(desc, &pdev->msi_list, list) + bf_msix_mask_irq(desc, irq_state); +#else + for_each_pci_msi_entry(desc, pdev) + bf_msix_mask_irq(desc, irq_state); +#endif + } + pci_cfg_access_unlock(pdev); + + return 0; +} + +/** + * interrupt handler which will check if the interrupt is from the right + * device. If so, disable it here and will be enabled later. + */ +static irqreturn_t bf_pci_irqhandler(int irq, struct bf_pci_dev *bfdev) +{ + /* Legacy mode need to mask in hardware */ + if (bfdev->mode == BF_INTR_MODE_LEGACY && + !pci_check_and_mask_intx(bfdev->pdev)) + return IRQ_NONE; + + /* NOTE : if bfdev->info.pci_error_state == 1, then do not access the + * device and return IRQ_NOTHANDLED. + */ + /* Message signal mode, no share IRQ and automasked */ + return IRQ_HANDLED; +} + +/* Remap pci resources described by bar #pci_bar */ +static int +bf_pci_setup_iomem(struct pci_dev *dev, struct bf_dev_info *info, + int n, int pci_bar, const char *name) +{ + unsigned long addr, len; + void *internal_addr; + + if (sizeof(info->mem) / sizeof(info->mem[0]) <= n) + return -EINVAL; + + addr = pci_resource_start(dev, pci_bar); + len = pci_resource_len(dev, pci_bar); + if (addr == 0 || len == 0) + return -1; + internal_addr = pci_ioremap_bar(dev, pci_bar); + if (internal_addr == NULL) + return -1; + info->mem[n].name = name; + info->mem[n].addr = addr; + info->mem[n].internal_addr = internal_addr; + info->mem[n].size = len; + return 0; +} + +/* Unmap previously ioremap'd resources */ +static void +bf_pci_release_iomem(struct bf_dev_info *info) +{ + int i; + + for (i = 0; i < BF_MAX_BAR_MAPS; i++) { + if (info->mem[i].internal_addr) + iounmap(info->mem[i].internal_addr); + } +} + +static int +bf_setup_bars(struct pci_dev *dev, struct bf_dev_info *info) +{ + int i, iom, ret; + unsigned long flags; + static const char *bar_names[BF_MAX_BAR_MAPS] = { + "BAR0", "BAR1", "BAR2", "BAR3", "BAR4", "BAR5", + }; + + iom = 0; + + for (i = 0; i < BF_MAX_BAR_MAPS; i++) { + if (pci_resource_len(dev, i) != 0 && + pci_resource_start(dev, i) != 0) { + flags = pci_resource_flags(dev, i); + if (flags & IORESOURCE_MEM) { + ret = bf_pci_setup_iomem(dev, info, iom, i, bar_names[i]); + if (ret != 0) + return ret; + iom++; + } + } + } + return (iom != 0) ? ret : -ENOENT; +} + +static irqreturn_t bf_interrupt(int irq, void *bfdev_id) +{ + struct bf_pci_dev *bfdev = ((struct bf_int_vector *)bfdev_id)->bf_dev; + int vect_off = ((struct bf_int_vector *)bfdev_id)->int_vec_offset; + + irqreturn_t ret = bf_pci_irqhandler(irq, bfdev); + + if (ret == IRQ_HANDLED) + atomic_inc(&(bfdev->info.event[vect_off])); + + return ret; +} + +static unsigned int bf_poll(struct file *filep, poll_table *wait) +{ + struct bf_listener *listener = (struct bf_listener *)filep->private_data; + struct bf_pci_dev *bfdev = listener->bfdev; + int i; + + if (!bfdev) { + return -ENODEV; + } + if (!bfdev->info.irq) + return -EIO; + + poll_wait(filep, &bfdev->info.wait, wait); + + for (i = 0; i < BF_MSIX_ENTRY_CNT; i++) + if (listener->event_count[i] != atomic_read(&bfdev->info.event[i])) + return POLLIN | POLLRDNORM; + return 0; +} + +static int bf_find_mem_index(struct vm_area_struct *vma) +{ + struct bf_pci_dev *bfdev = vma->vm_private_data; + if (vma->vm_pgoff < BF_MAX_BAR_MAPS) { + if (bfdev->info.mem[vma->vm_pgoff].size == 0) + return -1; + return (int)vma->vm_pgoff; + } + return -1; +} + +static const struct vm_operations_struct bf_physical_vm_ops = { +#ifdef CONFIG_HAVE_IOREMAP_PROT + .access = generic_access_phys, +#endif +}; + +static int bf_mmap_physical(struct vm_area_struct *vma) +{ + struct bf_pci_dev *bfdev = vma->vm_private_data; + int bar = bf_find_mem_index(vma); + struct bf_dev_mem *mem; + if (bar < 0) + return -EINVAL; + + mem = bfdev->info.mem + bar; + + if (mem->addr & ~PAGE_MASK) + return -ENODEV; + if (vma->vm_end - vma->vm_start > mem->size) + return -EINVAL; + + vma->vm_ops = &bf_physical_vm_ops; + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + /* + * We cannot use the vm_iomap_memory() helper here, + * because vma->vm_pgoff is the map index we looked + * up above in bf_find_mem_index(), rather than an + * actual page offset into the mmap. + * + * So we just do the physical mmap without a page + * offset. + */ + return remap_pfn_range(vma, vma->vm_start, mem->addr >> PAGE_SHIFT, + vma->vm_end - vma->vm_start, vma->vm_page_prot); +} + +static int bf_mmap(struct file *filep, struct vm_area_struct *vma) +{ + struct bf_listener *listener = filep->private_data; + struct bf_pci_dev *bfdev = listener->bfdev; + int bar; + unsigned long requested_pages, actual_pages; + + if (!bfdev) { + return -ENODEV; + } + if (vma->vm_end < vma->vm_start) + return -EINVAL; + + vma->vm_private_data = bfdev; + + bar = bf_find_mem_index(vma); + if (bar < 0) + return -EINVAL; + + requested_pages = vma_pages(vma); + actual_pages = ((bfdev->info.mem[bar].addr & ~PAGE_MASK) + + bfdev->info.mem[bar].size + PAGE_SIZE -1) >> PAGE_SHIFT; + if (requested_pages > actual_pages) + return -EINVAL; + + return bf_mmap_physical(vma); +} + +static int bf_fasync(int fd, struct file *filep, int mode) +{ + int minor; + + if (!filep->private_data) { + return (-EINVAL); + } + minor = ((struct bf_listener *)filep->private_data)->minor; + if (minor >= BF_MAX_DEVICE_CNT) { + return (-EINVAL); + } + if (mode == 0 && &bf_global[minor].async_queue == NULL) { + return 0; /* nothing to do */ + } + return (fasync_helper(fd, filep, mode, &bf_global[minor].async_queue)); +} + +static int bf_open(struct inode *inode, struct file *filep) +{ + struct bf_pci_dev *bfdev; + struct bf_listener *listener; + int i; + + bfdev = bf_global[iminor(inode)].bfdev; + listener = kmalloc(sizeof(*listener), GFP_KERNEL); + if (listener) { + listener->bfdev = bfdev; + listener->minor = bfdev->info.minor; + listener->next = NULL; + bf_add_listener(bfdev, listener); + for (i = 0; i < BF_MSIX_ENTRY_CNT; i++) + listener->event_count[i] = atomic_read(&bfdev->info.event[i]); + filep->private_data = listener; + return 0; + } else { + return(-ENOMEM); + } +} + +static int bf_release(struct inode *inode, struct file *filep) +{ + struct bf_listener *listener = filep->private_data; + + bf_fasync(-1, filep, 0); /* empty any process id in the notification list */ + if (listener->bfdev) { + bf_remove_listener(listener->bfdev, listener); + } + kfree(listener); + return 0; +} + +/* user space support: make read() system call after poll() of select() */ +static ssize_t bf_read(struct file *filep, char __user *buf, + size_t count, loff_t *ppos) +{ + struct bf_listener *listener = filep->private_data; + struct bf_pci_dev *bfdev = listener->bfdev; + int retval, event_count[BF_MSIX_ENTRY_CNT]; + int i, mismatch_found = 0; /* OR of per vector mismatch */ + unsigned char cnt_match[BF_MSIX_ENTRY_CNT]; /* per vector mismatch */ + + if (!bfdev) { + return -ENODEV; + } + /* irq must be setup for read() to work */ + if (!bfdev->info.irq) + return -EIO; + + /* ensure that there is enough space on user buffer for the given interrupt + * mode */ + if (bfdev->mode == BF_INTR_MODE_MSIX) { + if (count < sizeof(s32)*BF_MSIX_ENTRY_CNT) + return -EINVAL; + count = sizeof(s32)*BF_MSIX_ENTRY_CNT; + } else if (bfdev->mode == BF_INTR_MODE_MSI) { + if (count < sizeof(s32)*BF_MSI_ENTRY_CNT) + return -EINVAL; + count = sizeof(s32)*BF_MSI_ENTRY_CNT; + } else { + if (count < sizeof(s32)) + return -EINVAL; + count = sizeof(s32); + } + + do { + set_current_state(TASK_INTERRUPTIBLE); + + for (i = 0; i < (count/sizeof(s32)); i++) { + event_count[i] = atomic_read(&(bfdev->info.event[i])); + if (event_count[i] != listener->event_count[i]) { + mismatch_found |= 1; + cnt_match[i] = 1; + } else { + event_count[i] = 0; + cnt_match[i] = 0; + } + } + if (mismatch_found) { + __set_current_state(TASK_RUNNING); + if (copy_to_user(buf, &event_count, count)) + retval = -EFAULT; + else { /* adjust the listener->event_count; */ + for (i = 0 ; i < (count/sizeof(s32)); i++) { + if (cnt_match[i]) { + listener->event_count[i] = event_count[i]; + } + } + retval = count; + } + break; + } + + if (filep->f_flags & O_NONBLOCK) { + retval = -EAGAIN; + break; + } + + if (signal_pending(current)) { + retval = -ERESTARTSYS; + break; + } + schedule(); + } while (1); + + __set_current_state(TASK_RUNNING); + + return retval; +} + +/* user space is supposed to call this after it is done with interrupt + * processing + */ +static ssize_t bf_write(struct file *filep, const char __user *buf, + size_t count, loff_t *ppos) +{ + struct bf_listener *listener = filep->private_data; + struct bf_pci_dev *bfdev = listener->bfdev; + ssize_t ret; + s32 int_en; + + if (!bfdev || !bfdev->info.irq) + return -EIO; + + if (count != sizeof(s32)) + return -EINVAL; + + if (copy_from_user(&int_en, buf, count)) + return -EFAULT; + + /* clear pci_error_state */ + bfdev->info.pci_error_state = 0; + + ret = bf_pci_irqcontrol(bfdev, int_en); + + return ret ? ret : sizeof(s32); +} + +static long bf_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) +{ + struct bf_listener *listener = filep->private_data; + struct bf_pci_dev *bfdev = listener->bfdev; + bf_dma_bus_map_t dma_map; + void *addr = (void __user *)arg; + dma_addr_t dma_hndl; + + if (!bfdev || !addr) { + return EFAULT; + } + switch(cmd) { + case BF_IOCMAPDMAADDR: + if (access_ok(VERIFY_WRITE, addr, sizeof(bf_dma_bus_map_t))) { + if (copy_from_user(&dma_map, addr, sizeof(bf_dma_bus_map_t))) { + return EFAULT; + } + if (!dma_map.phy_addr || !dma_map.size) { + return EFAULT; + } + dma_hndl = dma_map_single(&bfdev->pdev->dev, phys_to_virt(dma_map.phy_addr), dma_map.size, DMA_BIDIRECTIONAL); + if (dma_mapping_error(&bfdev->pdev->dev, dma_hndl)) { + return EFAULT; + } + dma_map.dma_addr = (void *)dma_hndl; + if (copy_to_user(addr, &dma_map, sizeof(bf_dma_bus_map_t))) { + return EFAULT; + } + } else { + return EFAULT; + } + break; + case BF_IOCUNMAPDMAADDR: + if (access_ok(VERIFY_READ, addr, sizeof(bf_dma_bus_map_t))) { + if (copy_from_user(&dma_map, addr, sizeof(bf_dma_bus_map_t))) { + return EFAULT; + } + if (!dma_map.dma_addr || !dma_map.size) { + return EFAULT; + } + dma_unmap_single(&bfdev->pdev->dev, (dma_addr_t)dma_map.dma_addr, dma_map.size, DMA_BIDIRECTIONAL); + } else { + return EFAULT; + } + break; + default: + return EINVAL; + } + return 0; +} + +static const struct file_operations bf_fops = { + .owner = THIS_MODULE, + .open = bf_open, + .release = bf_release, + .unlocked_ioctl = bf_ioctl, + .read = bf_read, + .write = bf_write, + .mmap = bf_mmap, + .poll = bf_poll, + .fasync = bf_fasync, +}; + +static int bf_major_init(struct bf_pci_dev *bfdev, int minor) +{ + struct cdev *cdev; + static const char name[] = "bf"; + dev_t bf_dev = 0; + int result; + + result = alloc_chrdev_region(&bf_dev, 0, BF_MAX_DEVICE_CNT, name); + if (result) + return result; + + result = -ENOMEM; + cdev = cdev_alloc(); + if (!cdev) { + goto fail_dev_add; + } + cdev->ops = &bf_fops; + cdev->owner = THIS_MODULE; + kobject_set_name(&cdev->kobj, "%s", name); + result = cdev_add(cdev, bf_dev, BF_MAX_DEVICE_CNT); + + if (result) + goto fail_dev_add; + + bf_major = MAJOR(bf_dev); + bf_global[minor].bf_cdev = cdev; + return 0; + +fail_dev_add: + unregister_chrdev_region(bf_dev, BF_MAX_DEVICE_CNT); + return result; +} + +static void bf_major_cleanup(struct bf_pci_dev *bfdev, int minor) +{ + unregister_chrdev_region(MKDEV(bf_major, 0), BF_MAX_DEVICE_CNT); + cdev_del(bf_global[minor].bf_cdev); +} + +static int bf_init_cdev(struct bf_pci_dev *bfdev, int minor) +{ + int ret; + ret = bf_major_init(bfdev, minor); + if (ret) + return ret; + + bf_class = class_create(THIS_MODULE, BF_CLASS_NAME); + if (!bf_class) { + printk(KERN_ERR "create_class failed for bf_dev\n"); + ret = -ENODEV; + goto err_class_register; + } + return 0; + +err_class_register: + bf_major_cleanup(bfdev, minor); + return ret; +} + +static void bf_remove_cdev(struct bf_pci_dev *bfdev) +{ + class_destroy(bf_class); + bf_major_cleanup(bfdev, bfdev->info.minor); +} + + +/** + * bf_register_device - register a new userspace mem device + * @parent: parent device + * @bfdev: bf pci device + * + * returns zero on success or a negative error code. + */ +int bf_register_device(struct device *parent, struct bf_pci_dev *bfdev) +{ + struct bf_dev_info *info = &bfdev->info; + int i, j, ret = 0; + int minor; + + if (!parent || !info || !info->version) + return -EINVAL; + + init_waitqueue_head(&info->wait); + + for (i = 0; i < BF_MSIX_ENTRY_CNT; i++) { + atomic_set(&info->event[i], 0); + } + + if (bf_get_next_minor_no(&minor)) { + return -EINVAL; + } + + ret = bf_init_cdev(bfdev, minor); + if (ret) { + printk(KERN_ERR "BF: device cdev creation failed\n"); + return ret; + } + + info->dev = device_create(bf_class, parent, + MKDEV(bf_major, minor), bfdev, + "bf%d", minor); + if (!info->dev) { + printk(KERN_ERR "BF: device creation failed\n"); + return -ENODEV; + } + + info->minor = minor; + + /* bind ISRs and request interrupts */ + if (info->irq && (bfdev->mode != BF_INTR_MODE_NONE)) { + /* + * Note that we deliberately don't use devm_request_irq + * here. The parent module can unregister the UIO device + * and call pci_disable_msi, which requires that this + * irq has been freed. However, the device may have open + * FDs at the time of unregister and therefore may not be + * freed until they are released. + */ + if (bfdev->mode == BF_INTR_MODE_LEGACY) { + ret = request_irq(info->irq, bf_interrupt, + info->irq_flags, bfdev->name, + (void *)&(bfdev->bf_int_vec[0])); + if (ret) { + printk(KERN_ERR "bf failed to request legacy irq %ld error %d\n", + info->irq, ret); + return ret; + } + printk(KERN_NOTICE "BF allocating legacy int vector %ld\n", info->irq); + } else if (bfdev->mode == BF_INTR_MODE_MSIX) { + for (i = 0; i < info->num_irq; i++) { + ret = request_irq(info->msix_entries[i].vector, bf_interrupt, + info->irq_flags, bfdev->name, + (void *)&(bfdev->bf_int_vec[i])); + if (ret) { + /* undo all other previous bindings */ + printk(KERN_ERR "bf failed to request MSIX ret %d itr %d\n", ret, i); + for (j = i - 1; j >= 0; j--) { + free_irq(info->msix_entries[j].vector, + (void *)&(bfdev->bf_int_vec[j])); + } + return ret; + } + } + printk(KERN_NOTICE "BF allocating %d MSIx vectors from %ld\n", + info->num_irq, info->irq); + } else if (bfdev->mode == BF_INTR_MODE_MSI) { + for (i = 0; i < info->num_irq; i++) { + ret = request_irq(info->irq + i, bf_interrupt, + info->irq_flags, bfdev->name, + (void *)&(bfdev->bf_int_vec[i])); + if (ret) { + /* undo all other previous bindings */ + printk(KERN_ERR "bf failed to request MSI ret %d itr %d\n", ret, i); + for (j = i - 1; j >= 0; j--) { + free_irq(info->irq + j, (void *)&(bfdev->bf_int_vec[j])); + } + return ret; + } + } + printk(KERN_NOTICE "BF allocating %d MSI vectors from %ld\n", + info->num_irq, info->irq); + } + } + return 0; +} + +/** + * bf_unregister_device - register a new userspace mem device + * @bfdev: bf pci device + * + * returns none + */ +void bf_unregister_device(struct bf_pci_dev *bfdev) +{ + struct bf_dev_info *info = &bfdev->info; + int i; + + if (info->irq) { + if (bfdev->mode == BF_INTR_MODE_LEGACY) { + free_irq(info->irq, (void *)&(bfdev->bf_int_vec[0])); + } else if (bfdev->mode == BF_INTR_MODE_MSIX) { + for (i = 0; i < info->num_irq; i++) { + free_irq(info->msix_entries[i].vector, (void *)&(bfdev->bf_int_vec[i])); + } + } else if (bfdev->mode == BF_INTR_MODE_MSI) { + for (i = 0; i < info->num_irq; i++) { + free_irq(info->irq + i, (void *)&(bfdev->bf_int_vec[i])); + } + } + } + device_destroy(bf_class, MKDEV(bf_major, info->minor)); + bf_remove_cdev(bfdev); + bf_return_minor_no(info->minor); + return; +} + +static inline struct device *pci_dev_to_dev(struct pci_dev *pdev) +{ + return &pdev->dev; +} + +static void bf_disable_int_dma(struct bf_pci_dev *bfdev) { + u8 *bf_base_addr, i; + u32 *bf_addr; + volatile u32 val; + + /* maskinterrupts and DMA */ + bf_base_addr = (bfdev->info.mem[0].internal_addr); + /* return if called before mmap */ + if (!bf_base_addr) { + return; + } + /* mask interrupt at shadow level */ + bf_addr = (u32 *)((u8 *)bf_base_addr + 0xc0); + for (i = 0; i < 16; i++) { + *bf_addr = 0xffffffff; + bf_addr++; + } + /* mask DMA */ + bf_addr = (u32 *)((u8 *)bf_base_addr + 0x14); + val = *bf_addr; + val &= 0xfffffffeUL; + *bf_addr = val; +} + +static int +bf_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) +{ + struct bf_pci_dev *bfdev; + int err; + int i, num_irq; + + memset(bf_global, 0, sizeof(bf_global)); + + bfdev = kzalloc(sizeof(struct bf_pci_dev), GFP_KERNEL); + if (!bfdev) + return -ENOMEM; + + /* init the cookies to be passed to ISRs */ + for (i = 0; i < BF_MSIX_ENTRY_CNT; i++) { + bfdev->bf_int_vec[i].int_vec_offset = i; + bfdev->bf_int_vec[i].bf_dev = bfdev; + } + + /* initialize intr_mode to none */ + bfdev->mode = BF_INTR_MODE_NONE; + + /* clear pci_error_state */ + bfdev->info.pci_error_state = 0; + + /* + * enable device + */ + err = pci_enable_device(pdev); + if (err != 0) { + dev_err(&pdev->dev, "Cannot enable PCI device\n"); + goto fail_free; + } + + /* + * reserve device's PCI memory regions for use by this + * module + */ + err = pci_request_regions(pdev, "bf_umem"); + if (err != 0) { + dev_err(&pdev->dev, "Cannot request regions\n"); + goto fail_pci_disable; + } + /* remap IO memory */ + err = bf_setup_bars(pdev, &bfdev->info); + if (err != 0) + goto fail_release_iomem; + + if (!dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64)) && + !dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64))) { + } else { + err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32)); + if (err) { + err = dma_set_coherent_mask(pci_dev_to_dev(pdev), + DMA_BIT_MASK(32)); + if (err) { + dev_err(pci_dev_to_dev(pdev), "No usable DMA " + "configuration, aborting\n"); + goto fail_release_iomem; + } + } + } + + /* enable pci error reporting */ + /* for the current kernel version, kernel config must have set the followings: + * CONFIG_PCIEPORTBUS=y and CONFIG_PCIEAER = y + * we have pci_error_handlers defined that gets invoked by kernel AER module + * upon detecting the pcie error on this device's addresses. + * However, there seems no way that AER would pass the offending addresses + * to the callback functions. AER logs the error messages on the console. + * This driver's calback function send the SIGIO signal to the user space + * to indicate the error condition. + */ + pci_enable_pcie_error_reporting(pdev); + + bf_disable_int_dma(bfdev); + + /* enable bus mastering on the device */ + pci_set_master(pdev); + + /* fill in bfdev info */ + bfdev->info.version = "0.2"; + bfdev->info.owner = THIS_MODULE; + bfdev->pdev = pdev; + + switch (bf_intr_mode_default) { +#ifdef CONFIG_PCI_MSI + case BF_INTR_MODE_MSIX: + /* Only 1 msi-x vector needed */ + bfdev->info.msix_entries = kcalloc(BF_MSIX_ENTRY_CNT, + sizeof(struct msix_entry), GFP_KERNEL); + if (!bfdev->info.msix_entries) { + err = -ENOMEM; + goto fail_clear_pci_master; + } + for (i = 0; i < BF_MSIX_ENTRY_CNT; i++) { + bfdev->info.msix_entries[i].entry= i; + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0) + num_irq = pci_enable_msix(pdev, bfdev->info.msix_entries, + BF_MSIX_ENTRY_CNT); + if (num_irq == 0) { + dev_dbg(&pdev->dev, "using MSI-X"); + bfdev->info.num_irq = BF_MSIX_ENTRY_CNT; + bfdev->info.irq = bfdev->info.msix_entries[0].vector; + bfdev->mode = BF_INTR_MODE_MSIX; + printk(KERN_DEBUG "bf using %d MSIX irq from %ld\n", num_irq, + bfdev->info.irq); + break; + } +#else + num_irq = pci_enable_msix_range(pdev, bfdev->info.msix_entries, + BF_MSIX_ENTRY_CNT, BF_MSIX_ENTRY_CNT); + if (num_irq == BF_MSIX_ENTRY_CNT) { + dev_dbg(&pdev->dev, "using MSI-X"); + bfdev->info.num_irq = num_irq; + bfdev->info.irq = bfdev->info.msix_entries[0].vector; + bfdev->mode = BF_INTR_MODE_MSIX; + printk(KERN_DEBUG "bf using %d MSIX irq from %ld\n", num_irq, + bfdev->info.irq); + break; + } else { + if (num_irq) + pci_disable_msix(pdev); + kfree(bfdev->info.msix_entries); + bfdev->info.msix_entries = NULL; + printk(KERN_ERR "bf error allocating MSIX vectors. Trying MSI...\n"); + /* and, fall back to MSI */ + } +#endif /* LINUX_VERSION_CODE */ + /* ** intentional no-break */ + case BF_INTR_MODE_MSI: +#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0) + num_irq = pci_enable_msi_block(pdev, BF_MSI_ENTRY_CNT); + /* we must get requested number of MSI vectors enabled */ + if (num_irq == 0) { + dev_dbg(&pdev->dev, "using MSI"); + bfdev->info.num_irq = BF_MSI_ENTRY_CNT; + bfdev->info.irq = pdev->irq; + bfdev->mode = BF_INTR_MODE_MSI; + printk(KERN_DEBUG "bf using %d MSI irq from %ld\n", bfdev->info.num_irq, + bfdev->info.irq); + break; + } +#elif LINUX_VERSION_CODE < KERNEL_VERSION(4, 10, 0) + num_irq = pci_enable_msi_range(pdev, BF_MSI_ENTRY_CNT, BF_MSI_ENTRY_CNT); + if (num_irq > 0) { + dev_dbg(&pdev->dev, "using MSI"); + bfdev->info.num_irq = num_irq; + bfdev->info.irq = pdev->irq; + bfdev->mode = BF_INTR_MODE_MSI; + printk(KERN_DEBUG "bf using %d MSI irq from %ld\n", bfdev->info.num_irq, + bfdev->info.irq); + break; + } +#else + num_irq = pci_alloc_irq_vectors_affinity(pdev, BF_MSI_ENTRY_CNT, + BF_MSI_ENTRY_CNT, PCI_IRQ_MSI | PCI_IRQ_AFFINITY, NULL); + if (num_irq > 0) { + dev_dbg(&pdev->dev, "using MSI"); + bfdev->info.num_irq = num_irq; + bfdev->info.irq = pci_irq_vector(pdev, 0); + bfdev->mode = BF_INTR_MODE_MSI; + printk(KERN_DEBUG "bf using %d MSI irq from %ld\n", bfdev->info.num_irq, + bfdev->info.irq); + break; + } +#endif /* LINUX_VERSION_CODE */ +#endif /* CONFIG_PCI_MSI */ + /* fall back to Legacy Interrupt, intentional no-break */ + + case BF_INTR_MODE_LEGACY: + if (pci_intx_mask_supported(pdev)) { + dev_dbg(&pdev->dev, "using INTX"); + bfdev->info.irq_flags = IRQF_SHARED; + bfdev->info.irq = pdev->irq; + bfdev->mode = BF_INTR_MODE_LEGACY; + printk(KERN_DEBUG "bf using LEGACY irq %ld\n", bfdev->info.irq); + break; + } + dev_notice(&pdev->dev, "PCI INTx mask not supported\n"); + /* fall back to no Interrupt, intentional no-break */ + case BF_INTR_MODE_NONE: + bfdev->info.irq = 0; + bfdev->info.num_irq = 0; + bfdev->mode = BF_INTR_MODE_NONE; + break; + + default: + dev_err(&pdev->dev, "invalid IRQ mode %u", bf_intr_mode_default); + err = -EINVAL; + goto fail_clear_pci_master; + } + + pci_set_drvdata(pdev, bfdev); + sprintf(bfdev->name, "bf_%d", bfdev->info.minor); + /* register bf driver */ + err = bf_register_device(&pdev->dev, bfdev); + if (err != 0) + goto fail_release_irq; + + bf_global[bfdev->info.minor].async_queue = NULL; + bf_global[bfdev->info.minor].bfdev = bfdev; + + dev_info(&pdev->dev, "bf device %d registered with irq %ld\n", + bfdev->instance, bfdev->info.irq); + printk(KERN_ALERT "bf probe ok\n"); + return 0; + +fail_release_irq: + pci_set_drvdata(pdev, NULL); + if (bfdev->mode == BF_INTR_MODE_MSIX) { + pci_disable_msix(bfdev->pdev); + kfree(bfdev->info.msix_entries); + bfdev->info.msix_entries = NULL; + } + else if (bfdev->mode == BF_INTR_MODE_MSI) + pci_disable_msi(bfdev->pdev); +fail_clear_pci_master: + pci_clear_master(pdev); +fail_release_iomem: + bf_pci_release_iomem(&bfdev->info); + pci_release_regions(pdev); +fail_pci_disable: + pci_disable_device(pdev); +fail_free: + kfree(bfdev); + + printk(KERN_ERR "bf probe not ok\n"); + return err; +} + + +static void +bf_pci_remove(struct pci_dev *pdev) +{ + struct bf_pci_dev *bfdev = pci_get_drvdata(pdev); + struct bf_listener *cur_listener; + + bf_disable_int_dma(bfdev); + bf_unregister_device(bfdev); + if (bfdev->mode == BF_INTR_MODE_MSIX) { + pci_disable_msix(pdev); + kfree(bfdev->info.msix_entries); + bfdev->info.msix_entries = NULL; + } + else if (bfdev->mode == BF_INTR_MODE_MSI) + pci_disable_msi(pdev); + pci_clear_master(pdev); + bf_pci_release_iomem(&bfdev->info); + pci_release_regions(pdev); + pci_disable_pcie_error_reporting(pdev); + pci_disable_device(pdev); + pci_set_drvdata(pdev, NULL); + bf_global[bfdev->info.minor].bfdev = NULL; + /* existing filep structures in open file(s) must be informed that + * bf_pci_dev is no longer valid */ + spin_lock(&bf_nonisr_lock); + cur_listener = bfdev->listener_head; + while (cur_listener) { + cur_listener->bfdev = NULL; + cur_listener = cur_listener->next; + } + spin_unlock(&bf_nonisr_lock); + kfree(bfdev); +} + +/** + * bf_pci_error_detected - called when PCI error is detected + * @pdev: Pointer to PCI device + * @state: The current pci connection state + * + * called when root complex detects pci error associated with the device + */ +static pci_ers_result_t bf_pci_error_detected(struct pci_dev *pdev, + pci_channel_state_t state) +{ + struct bf_pci_dev *bfdev = pci_get_drvdata(pdev); + int minor; + + if (!bfdev) { + return PCI_ERS_RESULT_NONE; + } + printk(KERN_ERR "pci_err_detected state %d\n", state); + if (state == pci_channel_io_perm_failure || state == pci_channel_io_frozen) { + bfdev->info.pci_error_state = 1; + /* send a signal to the user space program of the error */ + minor = bfdev->info.minor; + if (minor < BF_MAX_DEVICE_CNT && bf_global[minor].async_queue) { + kill_fasync(&bf_global[minor].async_queue, SIGIO, POLL_ERR); + } + return PCI_ERS_RESULT_DISCONNECT; + } else { + return PCI_ERS_RESULT_NONE; + } +} + +/** + * bf_pci_slot_reset - called after the pci bus has been reset. + * @pdev: Pointer to PCI device + * + * Restart the card from scratch, as if from a cold-boot. + */ +static pci_ers_result_t bf_pci_slot_reset(struct pci_dev *pdev) +{ + /* nothing to do for now as we do not expect to get backto normal after + * a pcie link reset + * TBD: fill in this function if tofino can recover after an error + */ + return PCI_ERS_RESULT_DISCONNECT; +} + +/** + * bf_pci_resume - called when kernel thinks the device is up on PCIe. + * @pdev: Pointer to PCI device + * + * This callback is called when the error recovery driver tells us that + * its OK to resume normal operation. + */ +static void bf_pci_resume(struct pci_dev *pdev) +{ + /* this function should never be called for Tofinoi */ + struct bf_pci_dev *bfdev = pci_get_drvdata(pdev); + + printk(KERN_ERR "BF io_resume invoked after pci error\n"); + if (bfdev) { + bfdev->info.pci_error_state = 0; + } +} + +static int +bf_config_intr_mode(char *intr_str) +{ + if (!intr_str) { + pr_info("Use MSIX interrupt by default\n"); + return 0; + } + + if (!strcmp(intr_str, BF_INTR_MODE_MSIX_NAME)) { + bf_intr_mode_default = BF_INTR_MODE_MSIX; + pr_info("Use MSIX interrupt\n"); + } else if (!strcmp(intr_str, BF_INTR_MODE_MSI_NAME)) { + bf_intr_mode_default = BF_INTR_MODE_MSI; + pr_info("Use MSI interrupt\n"); + } else if (!strcmp(intr_str, BF_INTR_MODE_LEGACY_NAME)) { + bf_intr_mode_default = BF_INTR_MODE_LEGACY; + pr_info("Use legacy interrupt\n"); + } else { + bf_intr_mode_default = BF_INTR_MODE_NONE; + pr_info(" No Interrupt \n"); + } + + + return 0; +} + +static const struct pci_device_id bf_pci_tbl[] = { + {PCI_VDEVICE(BF, TOFINO_DEV_ID_A0), 0}, + {PCI_VDEVICE(BF, TOFINO_DEV_ID_B0), 0}, + {PCI_VDEVICE(BF, TOFINO2_DEV_ID_A0), 0}, + /* required last entry */ + { .device = 0 } +}; + +/* PCI bus error handlers */ +static struct pci_error_handlers bf_pci_err_handler = { + .error_detected = bf_pci_error_detected, + .slot_reset = bf_pci_slot_reset, + .resume = bf_pci_resume, +}; + +static struct pci_driver bf_pci_driver = { + .name = "bf", + .id_table = bf_pci_tbl, + .probe = bf_pci_probe, + .remove = bf_pci_remove, + .err_handler = &bf_pci_err_handler +}; + +static int __init +bfdrv_init(void) +{ + int ret; + + ret = bf_config_intr_mode(intr_mode); + if (ret < 0) + return ret; + + spin_lock_init(&bf_nonisr_lock); + return pci_register_driver(&bf_pci_driver); +} + +static void __exit +bfdrv_exit(void) +{ + pci_unregister_driver(&bf_pci_driver); +} + +module_init(bfdrv_init); +module_exit(bfdrv_exit); + +module_param(intr_mode, charp, S_IRUGO); +MODULE_PARM_DESC(intr_mode, +"bf interrupt mode (default=msix):\n" +" " BF_INTR_MODE_MSIX_NAME " Use MSIX interrupt\n" +" " BF_INTR_MODE_MSI_NAME " Use MSI interrupt\n" +" " BF_INTR_MODE_LEGACY_NAME " Use Legacy interrupt\n" +"\n"); + +MODULE_DEVICE_TABLE(pci, bf_pci_tbl); +MODULE_DESCRIPTION("Barefoot Tofino PCI device"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Barefoot Networks"); diff --git a/platform/barefoot/bfn-modules/modules/bf_tun.c b/platform/barefoot/bfn-modules/modules/bf_tun.c new file mode 100644 index 00000000000..45913a681a9 --- /dev/null +++ b/platform/barefoot/bfn-modules/modules/bf_tun.c @@ -0,0 +1,2617 @@ +/* + * TUN - Universal TUN/TAP device driver. + * Copyright (C) 1999-2002 Maxim Krasnyansky + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * $Id: tun.c,v 1.15 2002/03/01 02:44:24 maxk Exp $ + */ + +/* + * Changes: + * + * Mike Kershaw 2005/08/14 + * Add TUNSETLINK ioctl to set the link encapsulation + * + * Mark Smith + * Use eth_random_addr() for tap MAC address. + * + * Harald Roelle 2004/04/20 + * Fixes in packet dropping, queue length setting and queue wakeup. + * Increased default tx queue length. + * Added ethtool API. + * Minor cleanups + * + * Daniel Podlejski + * Modifications for 2.3.99-pre5 kernel. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#define DRV_NAME "bf_tun" +#define DRV_VERSION "1.6" +#define DRV_DESCRIPTION "Universal TUN/TAP device driver" +#define DRV_COPYRIGHT "(C) 1999-2004 Max Krasnyansky " + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define TUN_MINOR1 201 + +/* Uncomment to enable debugging */ +/* #define TUN_DEBUG 1 */ + +#ifdef TUN_DEBUG +static int debug; + +#define tun_debug(level, tun, fmt, args...) \ +do { \ + if (tun->debug) \ + netdev_printk(level, tun->dev, fmt, ##args); \ +} while (0) +#define DBG1(level, fmt, args...) \ +do { \ + if (debug == 2) \ + printk(level fmt, ##args); \ +} while (0) +#else +#define tun_debug(level, tun, fmt, args...) \ +do { \ + if (0) \ + netdev_printk(level, tun->dev, fmt, ##args); \ +} while (0) +#define DBG1(level, fmt, args...) \ +do { \ + if (0) \ + printk(level fmt, ##args); \ +} while (0) +#endif + +/* TUN device flags */ + +/* IFF_ATTACH_QUEUE is never stored in device flags, + * overload it to mean fasync when stored there. + */ +#define TUN_FASYNC IFF_ATTACH_QUEUE +/* High bits in flags field are unused. */ +#define TUN_VNET_LE 0x80000000 +#define TUN_VNET_BE 0x40000000 + +#define TUN_FEATURES (IFF_NO_PI | IFF_ONE_QUEUE | IFF_VNET_HDR | \ + IFF_MULTI_QUEUE) +#define GOODCOPY_LEN 128 + +#define FLT_EXACT_COUNT 8 +struct tap_filter { + unsigned int count; /* Number of addrs. Zero means disabled */ + u32 mask[2]; /* Mask of the hashed addrs */ + unsigned char addr[FLT_EXACT_COUNT][ETH_ALEN]; +}; + +/* MAX_TAP_QUEUES 256 is chosen to allow rx/tx queues to be equal + * to max number of VCPUs in guest. */ +#define MAX_TAP_QUEUES 256 +#define MAX_TAP_FLOWS 4096 + +#define TUN_FLOW_EXPIRE (3 * HZ) + +struct tun_pcpu_stats { + u64 rx_packets; + u64 rx_bytes; + u64 tx_packets; + u64 tx_bytes; + struct u64_stats_sync syncp; + u32 rx_dropped; + u32 tx_dropped; + u32 rx_frame_errors; +}; + +/* A tun_file connects an open character device to a tuntap netdevice. It + * also contains all socket related structures (except sock_fprog and tap_filter) + * to serve as one transmit queue for tuntap device. The sock_fprog and + * tap_filter were kept in tun_struct since they were used for filtering for the + * netdevice not for a specific queue (at least I didn't see the requirement for + * this). + * + * RCU usage: + * The tun_file and tun_struct are loosely coupled, the pointer from one to the + * other can only be read while rcu_read_lock or rtnl_lock is held. + */ +struct tun_file { + struct sock sk; + struct socket socket; + struct socket_wq wq; + struct tun_struct __rcu *tun; + struct fasync_struct *fasync; + /* only used for fasnyc */ + unsigned int flags; + union { + u16 queue_index; + unsigned int ifindex; + }; + struct list_head next; + struct tun_struct *detached; + struct skb_array tx_array; +}; + +struct tun_flow_entry { + struct hlist_node hash_link; + struct rcu_head rcu; + struct tun_struct *tun; + + u32 rxhash; + u32 rps_rxhash; + int queue_index; + unsigned long updated; +}; + +#define TUN_NUM_FLOW_ENTRIES 1024 + +/* Since the socket were moved to tun_file, to preserve the behavior of persist + * device, socket filter, sndbuf and vnet header size were restore when the + * file were attached to a persist device. + */ +struct tun_struct { + struct tun_file __rcu *tfiles[MAX_TAP_QUEUES]; + unsigned int numqueues; + unsigned int flags; + kuid_t owner; + kgid_t group; + + struct net_device *dev; + netdev_features_t set_features; +#define TUN_USER_FEATURES (NETIF_F_HW_CSUM|NETIF_F_TSO_ECN|NETIF_F_TSO| \ + NETIF_F_TSO6|NETIF_F_UFO) + + int align; + int vnet_hdr_sz; + int sndbuf; + struct tap_filter txflt; + struct sock_fprog fprog; + /* protected by rtnl lock */ + bool filter_attached; +#ifdef TUN_DEBUG + int debug; +#endif + spinlock_t lock; + struct hlist_head flows[TUN_NUM_FLOW_ENTRIES]; + struct timer_list flow_gc_timer; + unsigned long ageing_time; + unsigned int numdisabled; + struct list_head disabled; + void *security; + u32 flow_count; + struct tun_pcpu_stats __percpu *pcpu_stats; +}; + +#ifdef CONFIG_TUN_VNET_CROSS_LE +static inline bool tun_legacy_is_little_endian(struct tun_struct *tun) +{ + return tun->flags & TUN_VNET_BE ? false : + virtio_legacy_is_little_endian(); +} + +static long tun_get_vnet_be(struct tun_struct *tun, int __user *argp) +{ + int be = !!(tun->flags & TUN_VNET_BE); + + if (put_user(be, argp)) + return -EFAULT; + + return 0; +} + +static long tun_set_vnet_be(struct tun_struct *tun, int __user *argp) +{ + int be; + + if (get_user(be, argp)) + return -EFAULT; + + if (be) + tun->flags |= TUN_VNET_BE; + else + tun->flags &= ~TUN_VNET_BE; + + return 0; +} +#else +static inline bool tun_legacy_is_little_endian(struct tun_struct *tun) +{ + return virtio_legacy_is_little_endian(); +} + +static long tun_get_vnet_be(struct tun_struct *tun, int __user *argp) +{ + return -EINVAL; +} + +static long tun_set_vnet_be(struct tun_struct *tun, int __user *argp) +{ + return -EINVAL; +} +#endif /* CONFIG_TUN_VNET_CROSS_LE */ + +static inline bool tun_is_little_endian(struct tun_struct *tun) +{ + return tun->flags & TUN_VNET_LE || + tun_legacy_is_little_endian(tun); +} + +static inline u16 tun16_to_cpu(struct tun_struct *tun, __virtio16 val) +{ + return __virtio16_to_cpu(tun_is_little_endian(tun), val); +} + +static inline __virtio16 cpu_to_tun16(struct tun_struct *tun, u16 val) +{ + return __cpu_to_virtio16(tun_is_little_endian(tun), val); +} + +static inline u32 tun_hashfn(u32 rxhash) +{ + return rxhash & 0x3ff; +} + +static struct tun_flow_entry *tun_flow_find(struct hlist_head *head, u32 rxhash) +{ + struct tun_flow_entry *e; + + hlist_for_each_entry_rcu(e, head, hash_link) { + if (e->rxhash == rxhash) + return e; + } + return NULL; +} + +static struct tun_flow_entry *tun_flow_create(struct tun_struct *tun, + struct hlist_head *head, + u32 rxhash, u16 queue_index) +{ + struct tun_flow_entry *e = kmalloc(sizeof(*e), GFP_ATOMIC); + + if (e) { + tun_debug(KERN_INFO, tun, "create flow: hash %u index %u\n", + rxhash, queue_index); + e->updated = jiffies; + e->rxhash = rxhash; + e->rps_rxhash = 0; + e->queue_index = queue_index; + e->tun = tun; + hlist_add_head_rcu(&e->hash_link, head); + ++tun->flow_count; + } + return e; +} + +static void tun_flow_delete(struct tun_struct *tun, struct tun_flow_entry *e) +{ + tun_debug(KERN_INFO, tun, "delete flow: hash %u index %u\n", + e->rxhash, e->queue_index); + hlist_del_rcu(&e->hash_link); + kfree_rcu(e, rcu); + --tun->flow_count; +} + +static void tun_flow_flush(struct tun_struct *tun) +{ + int i; + + spin_lock_bh(&tun->lock); + for (i = 0; i < TUN_NUM_FLOW_ENTRIES; i++) { + struct tun_flow_entry *e; + struct hlist_node *n; + + hlist_for_each_entry_safe(e, n, &tun->flows[i], hash_link) + tun_flow_delete(tun, e); + } + spin_unlock_bh(&tun->lock); +} + +static void tun_flow_delete_by_queue(struct tun_struct *tun, u16 queue_index) +{ + int i; + + spin_lock_bh(&tun->lock); + for (i = 0; i < TUN_NUM_FLOW_ENTRIES; i++) { + struct tun_flow_entry *e; + struct hlist_node *n; + + hlist_for_each_entry_safe(e, n, &tun->flows[i], hash_link) { + if (e->queue_index == queue_index) + tun_flow_delete(tun, e); + } + } + spin_unlock_bh(&tun->lock); +} + +static void tun_flow_cleanup(unsigned long data) +{ + struct tun_struct *tun = (struct tun_struct *)data; + unsigned long delay = tun->ageing_time; + unsigned long next_timer = jiffies + delay; + unsigned long count = 0; + int i; + + tun_debug(KERN_INFO, tun, "tun_flow_cleanup\n"); + + spin_lock_bh(&tun->lock); + for (i = 0; i < TUN_NUM_FLOW_ENTRIES; i++) { + struct tun_flow_entry *e; + struct hlist_node *n; + + hlist_for_each_entry_safe(e, n, &tun->flows[i], hash_link) { + unsigned long this_timer; + count++; + this_timer = e->updated + delay; + if (time_before_eq(this_timer, jiffies)) + tun_flow_delete(tun, e); + else if (time_before(this_timer, next_timer)) + next_timer = this_timer; + } + } + + if (count) + mod_timer(&tun->flow_gc_timer, round_jiffies_up(next_timer)); + spin_unlock_bh(&tun->lock); +} + +static void tun_flow_update(struct tun_struct *tun, u32 rxhash, + struct tun_file *tfile) +{ + struct hlist_head *head; + struct tun_flow_entry *e; + unsigned long delay = tun->ageing_time; + u16 queue_index = tfile->queue_index; + + if (!rxhash) + return; + else + head = &tun->flows[tun_hashfn(rxhash)]; + + rcu_read_lock(); + + /* We may get a very small possibility of OOO during switching, not + * worth to optimize.*/ + if (tun->numqueues == 1 || tfile->detached) + goto unlock; + + e = tun_flow_find(head, rxhash); + if (likely(e)) { + /* TODO: keep queueing to old queue until it's empty? */ + e->queue_index = queue_index; + e->updated = jiffies; + sock_rps_record_flow_hash(e->rps_rxhash); + } else { + spin_lock_bh(&tun->lock); + if (!tun_flow_find(head, rxhash) && + tun->flow_count < MAX_TAP_FLOWS) + tun_flow_create(tun, head, rxhash, queue_index); + + if (!timer_pending(&tun->flow_gc_timer)) + mod_timer(&tun->flow_gc_timer, + round_jiffies_up(jiffies + delay)); + spin_unlock_bh(&tun->lock); + } + +unlock: + rcu_read_unlock(); +} + +/** + * Save the hash received in the stack receive path and update the + * flow_hash table accordingly. + */ +static inline void tun_flow_save_rps_rxhash(struct tun_flow_entry *e, u32 hash) +{ + if (unlikely(e->rps_rxhash != hash)) + e->rps_rxhash = hash; +} + +/* We try to identify a flow through its rxhash first. The reason that + * we do not check rxq no. is because some cards(e.g 82599), chooses + * the rxq based on the txq where the last packet of the flow comes. As + * the userspace application move between processors, we may get a + * different rxq no. here. If we could not get rxhash, then we would + * hope the rxq no. may help here. + */ +static u16 tun_select_queue(struct net_device *dev, struct sk_buff *skb, + void *accel_priv, select_queue_fallback_t fallback) +{ + struct tun_struct *tun = netdev_priv(dev); + struct tun_flow_entry *e; + u32 txq = 0; + u32 numqueues = 0; + + rcu_read_lock(); + numqueues = ACCESS_ONCE(tun->numqueues); + + txq = skb_get_hash(skb); + if (txq) { + e = tun_flow_find(&tun->flows[tun_hashfn(txq)], txq); + if (e) { + tun_flow_save_rps_rxhash(e, txq); + txq = e->queue_index; + } else + /* use multiply and shift instead of expensive divide */ + txq = ((u64)txq * numqueues) >> 32; + } else if (likely(skb_rx_queue_recorded(skb))) { + txq = skb_get_rx_queue(skb); + while (unlikely(txq >= numqueues)) + txq -= numqueues; + } + + rcu_read_unlock(); + return txq; +} + +static inline bool tun_not_capable(struct tun_struct *tun) +{ + const struct cred *cred = current_cred(); + struct net *net = dev_net(tun->dev); + + return ((uid_valid(tun->owner) && !uid_eq(cred->euid, tun->owner)) || + (gid_valid(tun->group) && !in_egroup_p(tun->group))) && + !ns_capable(net->user_ns, CAP_NET_ADMIN); +} + +static void tun_set_real_num_queues(struct tun_struct *tun) +{ + netif_set_real_num_tx_queues(tun->dev, tun->numqueues); + netif_set_real_num_rx_queues(tun->dev, tun->numqueues); +} + +static void tun_disable_queue(struct tun_struct *tun, struct tun_file *tfile) +{ + tfile->detached = tun; + list_add_tail(&tfile->next, &tun->disabled); + ++tun->numdisabled; +} + +static struct tun_struct *tun_enable_queue(struct tun_file *tfile) +{ + struct tun_struct *tun = tfile->detached; + + tfile->detached = NULL; + list_del_init(&tfile->next); + --tun->numdisabled; + return tun; +} + +static void tun_queue_purge(struct tun_file *tfile) +{ + struct sk_buff *skb; + + while ((skb = skb_array_consume(&tfile->tx_array)) != NULL) + kfree_skb(skb); + + skb_queue_purge(&tfile->sk.sk_error_queue); +} + +static void tun_cleanup_tx_array(struct tun_file *tfile) +{ + if (tfile->tx_array.ring.queue) { + skb_array_cleanup(&tfile->tx_array); + memset(&tfile->tx_array, 0, sizeof(tfile->tx_array)); + } +} + +static void __tun_detach(struct tun_file *tfile, bool clean) +{ + struct tun_file *ntfile; + struct tun_struct *tun; + + tun = rtnl_dereference(tfile->tun); + + if (tun && !tfile->detached) { + u16 index = tfile->queue_index; + BUG_ON(index >= tun->numqueues); + + rcu_assign_pointer(tun->tfiles[index], + tun->tfiles[tun->numqueues - 1]); + ntfile = rtnl_dereference(tun->tfiles[index]); + ntfile->queue_index = index; + + --tun->numqueues; + if (clean) { + RCU_INIT_POINTER(tfile->tun, NULL); + sock_put(&tfile->sk); + } else + tun_disable_queue(tun, tfile); + + synchronize_net(); + tun_flow_delete_by_queue(tun, tun->numqueues + 1); + /* Drop read queue */ + tun_queue_purge(tfile); + tun_set_real_num_queues(tun); + } else if (tfile->detached && clean) { + tun = tun_enable_queue(tfile); + sock_put(&tfile->sk); + } + + if (clean) { + if (tun && tun->numqueues == 0 && tun->numdisabled == 0) { + netif_carrier_off(tun->dev); + + if (!(tun->flags & IFF_PERSIST) && + tun->dev->reg_state == NETREG_REGISTERED) + unregister_netdevice(tun->dev); + } + tun_cleanup_tx_array(tfile); + sock_put(&tfile->sk); + } +} + +static void tun_detach(struct tun_file *tfile, bool clean) +{ + rtnl_lock(); + __tun_detach(tfile, clean); + rtnl_unlock(); +} + +static void tun_detach_all(struct net_device *dev) +{ + struct tun_struct *tun = netdev_priv(dev); + struct tun_file *tfile, *tmp; + int i, n = tun->numqueues; + + for (i = 0; i < n; i++) { + tfile = rtnl_dereference(tun->tfiles[i]); + BUG_ON(!tfile); + tfile->socket.sk->sk_shutdown = RCV_SHUTDOWN; + tfile->socket.sk->sk_data_ready(tfile->socket.sk); + RCU_INIT_POINTER(tfile->tun, NULL); + --tun->numqueues; + } + list_for_each_entry(tfile, &tun->disabled, next) { + tfile->socket.sk->sk_shutdown = RCV_SHUTDOWN; + tfile->socket.sk->sk_data_ready(tfile->socket.sk); + RCU_INIT_POINTER(tfile->tun, NULL); + } + BUG_ON(tun->numqueues != 0); + + synchronize_net(); + for (i = 0; i < n; i++) { + tfile = rtnl_dereference(tun->tfiles[i]); + /* Drop read queue */ + tun_queue_purge(tfile); + sock_put(&tfile->sk); + tun_cleanup_tx_array(tfile); + } + list_for_each_entry_safe(tfile, tmp, &tun->disabled, next) { + tun_enable_queue(tfile); + tun_queue_purge(tfile); + sock_put(&tfile->sk); + tun_cleanup_tx_array(tfile); + } + BUG_ON(tun->numdisabled != 0); + + if (tun->flags & IFF_PERSIST) + module_put(THIS_MODULE); +} + +static int tun_attach(struct tun_struct *tun, struct file *file, bool skip_filter) +{ + struct tun_file *tfile = file->private_data; + struct net_device *dev = tun->dev; + int err; + + err = security_tun_dev_attach(tfile->socket.sk, tun->security); + if (err < 0) + goto out; + + err = -EINVAL; + if (rtnl_dereference(tfile->tun) && !tfile->detached) + goto out; + + err = -EBUSY; + if (!(tun->flags & IFF_MULTI_QUEUE) && tun->numqueues == 1) + goto out; + + err = -E2BIG; + if (!tfile->detached && + tun->numqueues + tun->numdisabled == MAX_TAP_QUEUES) + goto out; + + err = 0; + + /* Re-attach the filter to persist device */ + if (!skip_filter && (tun->filter_attached == true)) { + lock_sock(tfile->socket.sk); + err = sk_attach_filter(&tun->fprog, tfile->socket.sk); + release_sock(tfile->socket.sk); + if (!err) + goto out; + } + + if (!tfile->detached && + skb_array_init(&tfile->tx_array, dev->tx_queue_len, GFP_KERNEL)) { + err = -ENOMEM; + goto out; + } + + tfile->queue_index = tun->numqueues; + tfile->socket.sk->sk_shutdown &= ~RCV_SHUTDOWN; + rcu_assign_pointer(tfile->tun, tun); + rcu_assign_pointer(tun->tfiles[tun->numqueues], tfile); + tun->numqueues++; + + if (tfile->detached) + tun_enable_queue(tfile); + else + sock_hold(&tfile->sk); + + tun_set_real_num_queues(tun); + + /* device is allowed to go away first, so no need to hold extra + * refcnt. + */ + +out: + return err; +} + +static struct tun_struct *__tun_get(struct tun_file *tfile) +{ + struct tun_struct *tun; + + rcu_read_lock(); + tun = rcu_dereference(tfile->tun); + if (tun) + dev_hold(tun->dev); + rcu_read_unlock(); + + return tun; +} + +static struct tun_struct *tun_get(struct file *file) +{ + return __tun_get(file->private_data); +} + +static void tun_put(struct tun_struct *tun) +{ + dev_put(tun->dev); +} + +/* TAP filtering */ +static void addr_hash_set(u32 *mask, const u8 *addr) +{ + int n = ether_crc(ETH_ALEN, addr) >> 26; + mask[n >> 5] |= (1 << (n & 31)); +} + +static unsigned int addr_hash_test(const u32 *mask, const u8 *addr) +{ + int n = ether_crc(ETH_ALEN, addr) >> 26; + return mask[n >> 5] & (1 << (n & 31)); +} + +static int update_filter(struct tap_filter *filter, void __user *arg) +{ + struct { u8 u[ETH_ALEN]; } *addr; + struct tun_filter uf; + int err, alen, n, nexact; + + if (copy_from_user(&uf, arg, sizeof(uf))) + return -EFAULT; + + if (!uf.count) { + /* Disabled */ + filter->count = 0; + return 0; + } + + alen = ETH_ALEN * uf.count; + addr = memdup_user(arg + sizeof(uf), alen); + if (IS_ERR(addr)) + return PTR_ERR(addr); + + /* The filter is updated without holding any locks. Which is + * perfectly safe. We disable it first and in the worst + * case we'll accept a few undesired packets. */ + filter->count = 0; + wmb(); + + /* Use first set of addresses as an exact filter */ + for (n = 0; n < uf.count && n < FLT_EXACT_COUNT; n++) + memcpy(filter->addr[n], addr[n].u, ETH_ALEN); + + nexact = n; + + /* Remaining multicast addresses are hashed, + * unicast will leave the filter disabled. */ + memset(filter->mask, 0, sizeof(filter->mask)); + for (; n < uf.count; n++) { + if (!is_multicast_ether_addr(addr[n].u)) { + err = 0; /* no filter */ + goto free_addr; + } + addr_hash_set(filter->mask, addr[n].u); + } + + /* For ALLMULTI just set the mask to all ones. + * This overrides the mask populated above. */ + if ((uf.flags & TUN_FLT_ALLMULTI)) + memset(filter->mask, ~0, sizeof(filter->mask)); + + /* Now enable the filter */ + wmb(); + filter->count = nexact; + + /* Return the number of exact filters */ + err = nexact; +free_addr: + kfree(addr); + return err; +} + +/* Returns: 0 - drop, !=0 - accept */ +static int run_filter(struct tap_filter *filter, const struct sk_buff *skb) +{ + /* Cannot use eth_hdr(skb) here because skb_mac_hdr() is incorrect + * at this point. */ + struct ethhdr *eh = (struct ethhdr *) skb->data; + int i; + + /* Exact match */ + for (i = 0; i < filter->count; i++) + if (ether_addr_equal(eh->h_dest, filter->addr[i])) + return 1; + + /* Inexact match (multicast only) */ + if (is_multicast_ether_addr(eh->h_dest)) + return addr_hash_test(filter->mask, eh->h_dest); + + return 0; +} + +/* + * Checks whether the packet is accepted or not. + * Returns: 0 - drop, !=0 - accept + */ +static int check_filter(struct tap_filter *filter, const struct sk_buff *skb) +{ + if (!filter->count) + return 1; + + return run_filter(filter, skb); +} + +/* Network device part of the driver */ + +static const struct ethtool_ops tun_ethtool_ops; + +/* Net device detach from fd. */ +static void tun_net_uninit(struct net_device *dev) +{ + tun_detach_all(dev); +} + +/* Net device open. */ +static int tun_net_open(struct net_device *dev) +{ + struct tun_struct *tun = netdev_priv(dev); + int i; + + netif_tx_start_all_queues(dev); + + for (i = 0; i < tun->numqueues; i++) { + struct tun_file *tfile; + + tfile = rtnl_dereference(tun->tfiles[i]); + tfile->socket.sk->sk_write_space(tfile->socket.sk); + } + + return 0; +} + +/* Net device close. */ +static int tun_net_close(struct net_device *dev) +{ + netif_tx_stop_all_queues(dev); + return 0; +} + +/* Net device start xmit */ +static netdev_tx_t tun_net_xmit(struct sk_buff *skb, struct net_device *dev) +{ + struct tun_struct *tun = netdev_priv(dev); + int txq = skb->queue_mapping; + struct tun_file *tfile; + u32 numqueues = 0; + + rcu_read_lock(); + tfile = rcu_dereference(tun->tfiles[txq]); + numqueues = ACCESS_ONCE(tun->numqueues); + + /* Drop packet if interface is not attached */ + if (txq >= numqueues) + goto drop; + +#ifdef CONFIG_RPS + if (numqueues == 1 && static_key_false(&rps_needed)) { + /* Select queue was not called for the skbuff, so we extract the + * RPS hash and save it into the flow_table here. + */ + __u32 rxhash; + + rxhash = skb_get_hash(skb); + if (rxhash) { + struct tun_flow_entry *e; + e = tun_flow_find(&tun->flows[tun_hashfn(rxhash)], + rxhash); + if (e) + tun_flow_save_rps_rxhash(e, rxhash); + } + } +#endif + + tun_debug(KERN_INFO, tun, "tun_net_xmit %d\n", skb->len); + + BUG_ON(!tfile); + + /* Drop if the filter does not like it. + * This is a noop if the filter is disabled. + * Filter can be enabled only for the TAP devices. */ + if (!check_filter(&tun->txflt, skb)) + goto drop; + + if (tfile->socket.sk->sk_filter && + sk_filter(tfile->socket.sk, skb)) + goto drop; + + /* Limit the number of packets queued by dividing txq length with the + * number of queues. + */ + if (skb_queue_len(&tfile->socket.sk->sk_receive_queue) * numqueues + >= dev->tx_queue_len) + goto drop; + + if (unlikely(skb_orphan_frags(skb, GFP_ATOMIC))) + goto drop; + + skb_tx_timestamp(skb); + + /* Orphan the skb - required as we might hang on to it + * for indefinite time. + */ + skb_orphan(skb); + + nf_reset(skb); + + if (skb_array_produce(&tfile->tx_array, skb)) + goto drop; + + /* Notify and wake up reader process */ + if (tfile->flags & TUN_FASYNC) + kill_fasync(&tfile->fasync, SIGIO, POLL_IN); + tfile->socket.sk->sk_data_ready(tfile->socket.sk); + + rcu_read_unlock(); + return NETDEV_TX_OK; + +drop: + this_cpu_inc(tun->pcpu_stats->tx_dropped); + skb_tx_error(skb); + kfree_skb(skb); + rcu_read_unlock(); + return NET_XMIT_DROP; +} + +static void tun_net_mclist(struct net_device *dev) +{ + /* + * This callback is supposed to deal with mc filter in + * _rx_ path and has nothing to do with the _tx_ path. + * In rx path we always accept everything userspace gives us. + */ +} + +#define MIN_MTU 68 +#define MAX_MTU 65535 + +static int +tun_net_change_mtu(struct net_device *dev, int new_mtu) +{ + if (new_mtu < MIN_MTU || new_mtu + dev->hard_header_len > MAX_MTU) + return -EINVAL; + dev->mtu = new_mtu; + return 0; +} + +static netdev_features_t tun_net_fix_features(struct net_device *dev, + netdev_features_t features) +{ + struct tun_struct *tun = netdev_priv(dev); + + return (features & tun->set_features) | (features & ~TUN_USER_FEATURES); +} +#ifdef CONFIG_NET_POLL_CONTROLLER +static void tun_poll_controller(struct net_device *dev) +{ + /* + * Tun only receives frames when: + * 1) the char device endpoint gets data from user space + * 2) the tun socket gets a sendmsg call from user space + * Since both of those are synchronous operations, we are guaranteed + * never to have pending data when we poll for it + * so there is nothing to do here but return. + * We need this though so netpoll recognizes us as an interface that + * supports polling, which enables bridge devices in virt setups to + * still use netconsole + */ + return; +} +#endif + +static void tun_set_headroom(struct net_device *dev, int new_hr) +{ + struct tun_struct *tun = netdev_priv(dev); + + if (new_hr < NET_SKB_PAD) + new_hr = NET_SKB_PAD; + + tun->align = new_hr; +} + +static struct rtnl_link_stats64 * +tun_net_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats) +{ + u32 rx_dropped = 0, tx_dropped = 0, rx_frame_errors = 0; + struct tun_struct *tun = netdev_priv(dev); + struct tun_pcpu_stats *p; + int i; + + for_each_possible_cpu(i) { + u64 rxpackets, rxbytes, txpackets, txbytes; + unsigned int start; + + p = per_cpu_ptr(tun->pcpu_stats, i); + do { + start = u64_stats_fetch_begin(&p->syncp); + rxpackets = p->rx_packets; + rxbytes = p->rx_bytes; + txpackets = p->tx_packets; + txbytes = p->tx_bytes; + } while (u64_stats_fetch_retry(&p->syncp, start)); + + stats->rx_packets += rxpackets; + stats->rx_bytes += rxbytes; + stats->tx_packets += txpackets; + stats->tx_bytes += txbytes; + + /* u32 counters */ + rx_dropped += p->rx_dropped; + rx_frame_errors += p->rx_frame_errors; + tx_dropped += p->tx_dropped; + } + stats->rx_dropped = rx_dropped; + stats->rx_frame_errors = rx_frame_errors; + stats->tx_dropped = tx_dropped; + return stats; +} + +static int +tun_change_carrier(struct net_device *dev, bool new_carrier) { + if (new_carrier) + netif_carrier_on(dev); + else + netif_carrier_off(dev); + return 0; +} + +static const struct net_device_ops tun_netdev_ops = { + .ndo_uninit = tun_net_uninit, + .ndo_open = tun_net_open, + .ndo_stop = tun_net_close, + .ndo_start_xmit = tun_net_xmit, + .ndo_change_mtu = tun_net_change_mtu, + .ndo_fix_features = tun_net_fix_features, + .ndo_select_queue = tun_select_queue, +#ifdef CONFIG_NET_POLL_CONTROLLER + .ndo_poll_controller = tun_poll_controller, +#endif + .ndo_set_rx_headroom = tun_set_headroom, + .ndo_get_stats64 = tun_net_get_stats64, + .ndo_change_carrier = tun_change_carrier, +}; + +static const struct net_device_ops tap_netdev_ops = { + .ndo_uninit = tun_net_uninit, + .ndo_open = tun_net_open, + .ndo_stop = tun_net_close, + .ndo_start_xmit = tun_net_xmit, + .ndo_change_mtu = tun_net_change_mtu, + .ndo_fix_features = tun_net_fix_features, + .ndo_set_rx_mode = tun_net_mclist, + .ndo_set_mac_address = eth_mac_addr, + .ndo_validate_addr = eth_validate_addr, + .ndo_select_queue = tun_select_queue, +#ifdef CONFIG_NET_POLL_CONTROLLER + .ndo_poll_controller = tun_poll_controller, +#endif + .ndo_features_check = passthru_features_check, + .ndo_set_rx_headroom = tun_set_headroom, + .ndo_get_stats64 = tun_net_get_stats64, + .ndo_change_carrier = tun_change_carrier, +}; + +static void tun_flow_init(struct tun_struct *tun) +{ + int i; + + for (i = 0; i < TUN_NUM_FLOW_ENTRIES; i++) + INIT_HLIST_HEAD(&tun->flows[i]); + + tun->ageing_time = TUN_FLOW_EXPIRE; + setup_timer(&tun->flow_gc_timer, tun_flow_cleanup, (unsigned long)tun); + mod_timer(&tun->flow_gc_timer, + round_jiffies_up(jiffies + tun->ageing_time)); +} + +static void tun_flow_uninit(struct tun_struct *tun) +{ + del_timer_sync(&tun->flow_gc_timer); + tun_flow_flush(tun); +} + +/* Initialize net device. */ +static void tun_net_init(struct net_device *dev) +{ + struct tun_struct *tun = netdev_priv(dev); + + switch (tun->flags & TUN_TYPE_MASK) { + case IFF_TUN: + dev->netdev_ops = &tun_netdev_ops; + + /* Point-to-Point TUN Device */ + dev->hard_header_len = 0; + dev->addr_len = 0; + dev->mtu = 1500; + + /* Zero header length */ + dev->type = ARPHRD_NONE; + dev->flags = IFF_POINTOPOINT | IFF_NOARP | IFF_MULTICAST; + break; + + case IFF_TAP: + dev->netdev_ops = &tap_netdev_ops; + /* Ethernet TAP Device */ + ether_setup(dev); + dev->priv_flags &= ~IFF_TX_SKB_SHARING; + dev->priv_flags |= IFF_LIVE_ADDR_CHANGE; + + eth_hw_addr_random(dev); + + break; + } +} + +/* Character device part */ + +/* Poll */ +static unsigned int tun_chr_poll(struct file *file, poll_table *wait) +{ + struct tun_file *tfile = file->private_data; + struct tun_struct *tun = __tun_get(tfile); + struct sock *sk; + unsigned int mask = 0; + + if (!tun) + return POLLERR; + + sk = tfile->socket.sk; + + tun_debug(KERN_INFO, tun, "tun_chr_poll\n"); + + poll_wait(file, sk_sleep(sk), wait); + + if (!skb_array_empty(&tfile->tx_array)) + mask |= POLLIN | POLLRDNORM; + + if (tun->dev->flags & IFF_UP && + (sock_writeable(sk) || + (!test_and_set_bit(SOCKWQ_ASYNC_NOSPACE, &sk->sk_socket->flags) && + sock_writeable(sk)))) + mask |= POLLOUT | POLLWRNORM; + + if (tun->dev->reg_state != NETREG_REGISTERED) + mask = POLLERR; + + tun_put(tun); + return mask; +} + +/* prepad is the amount to reserve at front. len is length after that. + * linear is a hint as to how much to copy (usually headers). */ +static struct sk_buff *tun_alloc_skb(struct tun_file *tfile, + size_t prepad, size_t len, + size_t linear, int noblock) +{ + struct sock *sk = tfile->socket.sk; + struct sk_buff *skb; + int err; + + /* Under a page? Don't bother with paged skb. */ + if (prepad + len < PAGE_SIZE || !linear) + linear = len; + + skb = sock_alloc_send_pskb(sk, prepad + linear, len - linear, noblock, + &err, 0); + if (!skb) + return ERR_PTR(err); + + skb_reserve(skb, prepad); + skb_put(skb, linear); + skb->data_len = len - linear; + skb->len += len - linear; + + return skb; +} + +/* Get packet from user space buffer */ +static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile, + void *msg_control, struct iov_iter *from, + int noblock) +{ + struct tun_pi pi = { 0, cpu_to_be16(ETH_P_IP) }; + struct sk_buff *skb; + size_t total_len = iov_iter_count(from); + size_t len = total_len, align = tun->align, linear; + struct virtio_net_hdr gso = { 0 }; + struct tun_pcpu_stats *stats; + int good_linear; + int copylen; + bool zerocopy = false; + int err; + u32 rxhash; + ssize_t n; + + if (!(tun->dev->flags & IFF_UP)) + return -EIO; + + if (!(tun->flags & IFF_NO_PI)) { + if (len < sizeof(pi)) + return -EINVAL; + len -= sizeof(pi); + + n = copy_from_iter(&pi, sizeof(pi), from); + if (n != sizeof(pi)) + return -EFAULT; + } + + if (tun->flags & IFF_VNET_HDR) { + int vnet_hdr_sz = READ_ONCE(tun->vnet_hdr_sz); + + if (len < vnet_hdr_sz) + return -EINVAL; + len -= vnet_hdr_sz; + + n = copy_from_iter(&gso, sizeof(gso), from); + if (n != sizeof(gso)) + return -EFAULT; + + if ((gso.flags & VIRTIO_NET_HDR_F_NEEDS_CSUM) && + tun16_to_cpu(tun, gso.csum_start) + tun16_to_cpu(tun, gso.csum_offset) + 2 > tun16_to_cpu(tun, gso.hdr_len)) + gso.hdr_len = cpu_to_tun16(tun, tun16_to_cpu(tun, gso.csum_start) + tun16_to_cpu(tun, gso.csum_offset) + 2); + + if (tun16_to_cpu(tun, gso.hdr_len) > len) + return -EINVAL; + iov_iter_advance(from, vnet_hdr_sz - sizeof(gso)); + } + + if ((tun->flags & TUN_TYPE_MASK) == IFF_TAP) { + align += NET_IP_ALIGN; + if (unlikely(len < ETH_HLEN || + (gso.hdr_len && tun16_to_cpu(tun, gso.hdr_len) < ETH_HLEN))) + return -EINVAL; + } + + good_linear = SKB_MAX_HEAD(align); + + if (msg_control) { + struct iov_iter i = *from; + + /* There are 256 bytes to be copied in skb, so there is + * enough room for skb expand head in case it is used. + * The rest of the buffer is mapped from userspace. + */ + copylen = gso.hdr_len ? tun16_to_cpu(tun, gso.hdr_len) : GOODCOPY_LEN; + if (copylen > good_linear) + copylen = good_linear; + linear = copylen; + iov_iter_advance(&i, copylen); + if (iov_iter_npages(&i, INT_MAX) <= MAX_SKB_FRAGS) + zerocopy = true; + } + + if (!zerocopy) { + copylen = len; + if (tun16_to_cpu(tun, gso.hdr_len) > good_linear) + linear = good_linear; + else + linear = tun16_to_cpu(tun, gso.hdr_len); + } + + skb = tun_alloc_skb(tfile, align, copylen, linear, noblock); + if (IS_ERR(skb)) { + if (PTR_ERR(skb) != -EAGAIN) + this_cpu_inc(tun->pcpu_stats->rx_dropped); + return PTR_ERR(skb); + } + + if (zerocopy) + err = zerocopy_sg_from_iter(skb, from); + else + err = skb_copy_datagram_from_iter(skb, 0, from, len); + + if (err) { + this_cpu_inc(tun->pcpu_stats->rx_dropped); + kfree_skb(skb); + return -EFAULT; + } + + err = virtio_net_hdr_to_skb(skb, &gso, tun_is_little_endian(tun)); + if (err) { + this_cpu_inc(tun->pcpu_stats->rx_frame_errors); + kfree_skb(skb); + return -EINVAL; + } + + switch (tun->flags & TUN_TYPE_MASK) { + case IFF_TUN: + if (tun->flags & IFF_NO_PI) { + u8 ip_version = skb->len ? (skb->data[0] >> 4) : 0; + + switch (ip_version) { + case 4: + pi.proto = htons(ETH_P_IP); + break; + case 6: + pi.proto = htons(ETH_P_IPV6); + break; + default: + this_cpu_inc(tun->pcpu_stats->rx_dropped); + kfree_skb(skb); + return -EINVAL; + } + } + + skb_reset_mac_header(skb); + skb->protocol = pi.proto; + skb->dev = tun->dev; + break; + case IFF_TAP: + skb->protocol = eth_type_trans(skb, tun->dev); + break; + } + + /* copy skb_ubuf_info for callback when skb has no error */ + if (zerocopy) { + skb_shinfo(skb)->destructor_arg = msg_control; + skb_shinfo(skb)->tx_flags |= SKBTX_DEV_ZEROCOPY; + skb_shinfo(skb)->tx_flags |= SKBTX_SHARED_FRAG; + } else if (msg_control) { + struct ubuf_info *uarg = msg_control; + uarg->callback(uarg, false); + } + + skb_reset_network_header(skb); + skb_probe_transport_header(skb, 0); + + rxhash = skb_get_hash(skb); + netif_rx_ni(skb); + + stats = get_cpu_ptr(tun->pcpu_stats); + u64_stats_update_begin(&stats->syncp); + stats->rx_packets++; + stats->rx_bytes += len; + u64_stats_update_end(&stats->syncp); + put_cpu_ptr(stats); + + tun_flow_update(tun, rxhash, tfile); + return total_len; +} + +static ssize_t tun_chr_write_iter(struct kiocb *iocb, struct iov_iter *from) +{ + struct file *file = iocb->ki_filp; + struct tun_struct *tun = tun_get(file); + struct tun_file *tfile = file->private_data; + ssize_t result; + + if (!tun) + return -EBADFD; + + result = tun_get_user(tun, tfile, NULL, from, file->f_flags & O_NONBLOCK); + + tun_put(tun); + return result; +} + +/* Put packet to the user space buffer */ +static ssize_t tun_put_user(struct tun_struct *tun, + struct tun_file *tfile, + struct sk_buff *skb, + struct iov_iter *iter) +{ + struct tun_pi pi = { 0, skb->protocol }; + struct tun_pcpu_stats *stats; + ssize_t total; + int vlan_offset = 0; + int vlan_hlen = 0; + int vnet_hdr_sz = 0; + + if (skb_vlan_tag_present(skb)) + vlan_hlen = VLAN_HLEN; + + if (tun->flags & IFF_VNET_HDR) + vnet_hdr_sz = READ_ONCE(tun->vnet_hdr_sz); + + total = skb->len + vlan_hlen + vnet_hdr_sz; + + if (!(tun->flags & IFF_NO_PI)) { + if (iov_iter_count(iter) < sizeof(pi)) + return -EINVAL; + + total += sizeof(pi); + if (iov_iter_count(iter) < total) { + /* Packet will be striped */ + pi.flags |= TUN_PKT_STRIP; + } + + if (copy_to_iter(&pi, sizeof(pi), iter) != sizeof(pi)) + return -EFAULT; + } + + if (vnet_hdr_sz) { + struct virtio_net_hdr gso = { 0 }; /* no info leak */ + int ret; + + if (iov_iter_count(iter) < vnet_hdr_sz) + return -EINVAL; + + ret = virtio_net_hdr_from_skb(skb, &gso, + tun_is_little_endian(tun), true); + if (ret) { + struct skb_shared_info *sinfo = skb_shinfo(skb); + pr_err("unexpected GSO type: " + "0x%x, gso_size %d, hdr_len %d\n", + sinfo->gso_type, tun16_to_cpu(tun, gso.gso_size), + tun16_to_cpu(tun, gso.hdr_len)); + print_hex_dump(KERN_ERR, "tun: ", + DUMP_PREFIX_NONE, + 16, 1, skb->head, + min((int)tun16_to_cpu(tun, gso.hdr_len), 64), true); + WARN_ON_ONCE(1); + return -EINVAL; + } + + if (copy_to_iter(&gso, sizeof(gso), iter) != sizeof(gso)) + return -EFAULT; + + iov_iter_advance(iter, vnet_hdr_sz - sizeof(gso)); + } + + if (vlan_hlen) { + int ret; + struct { + __be16 h_vlan_proto; + __be16 h_vlan_TCI; + } veth; + + veth.h_vlan_proto = skb->vlan_proto; + veth.h_vlan_TCI = htons(skb_vlan_tag_get(skb)); + + vlan_offset = offsetof(struct vlan_ethhdr, h_vlan_proto); + + ret = skb_copy_datagram_iter(skb, 0, iter, vlan_offset); + if (ret || !iov_iter_count(iter)) + goto done; + + ret = copy_to_iter(&veth, sizeof(veth), iter); + if (ret != sizeof(veth) || !iov_iter_count(iter)) + goto done; + } + + skb_copy_datagram_iter(skb, vlan_offset, iter, skb->len - vlan_offset); + +done: + /* caller is in process context, */ + stats = get_cpu_ptr(tun->pcpu_stats); + u64_stats_update_begin(&stats->syncp); + stats->tx_packets++; + stats->tx_bytes += skb->len + vlan_hlen; + u64_stats_update_end(&stats->syncp); + put_cpu_ptr(tun->pcpu_stats); + + return total; +} + +static struct sk_buff *tun_ring_recv(struct tun_file *tfile, int noblock, + int *err) +{ + DECLARE_WAITQUEUE(wait, current); + struct sk_buff *skb = NULL; + int error = 0; + + skb = skb_array_consume(&tfile->tx_array); + if (skb) + goto out; + if (noblock) { + error = -EAGAIN; + goto out; + } + + add_wait_queue(&tfile->wq.wait, &wait); + current->state = TASK_INTERRUPTIBLE; + + while (1) { + skb = skb_array_consume(&tfile->tx_array); + if (skb) + break; + if (signal_pending(current)) { + error = -ERESTARTSYS; + break; + } + if (tfile->socket.sk->sk_shutdown & RCV_SHUTDOWN) { + error = -EFAULT; + break; + } + + schedule(); + } + + current->state = TASK_RUNNING; + remove_wait_queue(&tfile->wq.wait, &wait); + +out: + *err = error; + return skb; +} + +static ssize_t tun_do_read(struct tun_struct *tun, struct tun_file *tfile, + struct iov_iter *to, + int noblock) +{ + struct sk_buff *skb; + ssize_t ret; + int err; + + tun_debug(KERN_INFO, tun, "tun_do_read\n"); + + if (!iov_iter_count(to)) + return 0; + + /* Read frames from ring */ + skb = tun_ring_recv(tfile, noblock, &err); + if (!skb) + return err; + + ret = tun_put_user(tun, tfile, skb, to); + if (unlikely(ret < 0)) + kfree_skb(skb); + else + consume_skb(skb); + + return ret; +} + +static ssize_t tun_chr_read_iter(struct kiocb *iocb, struct iov_iter *to) +{ + struct file *file = iocb->ki_filp; + struct tun_file *tfile = file->private_data; + struct tun_struct *tun = __tun_get(tfile); + ssize_t len = iov_iter_count(to), ret; + + if (!tun) + return -EBADFD; + ret = tun_do_read(tun, tfile, to, file->f_flags & O_NONBLOCK); + ret = min_t(ssize_t, ret, len); + if (ret > 0) + iocb->ki_pos = ret; + tun_put(tun); + return ret; +} + +static void tun_free_netdev(struct net_device *dev) +{ + struct tun_struct *tun = netdev_priv(dev); + + BUG_ON(!(list_empty(&tun->disabled))); + free_percpu(tun->pcpu_stats); + tun_flow_uninit(tun); + security_tun_dev_free_security(tun->security); + free_netdev(dev); +} + +static void tun_setup(struct net_device *dev) +{ + struct tun_struct *tun = netdev_priv(dev); + + tun->owner = INVALID_UID; + tun->group = INVALID_GID; + + dev->ethtool_ops = &tun_ethtool_ops; + dev->destructor = tun_free_netdev; + /* We prefer our own queue length */ + dev->tx_queue_len = TUN_READQ_SIZE; +} + +/* Trivial set of netlink ops to allow deleting tun or tap + * device with netlink. + */ +static int tun_validate(struct nlattr *tb[], struct nlattr *data[]) +{ + return -EINVAL; +} + +static struct rtnl_link_ops tun_link_ops __read_mostly = { + .kind = DRV_NAME, + .priv_size = sizeof(struct tun_struct), + .setup = tun_setup, + .validate = tun_validate, +}; + +static void tun_sock_write_space(struct sock *sk) +{ + struct tun_file *tfile; + wait_queue_head_t *wqueue; + + if (!sock_writeable(sk)) + return; + + if (!test_and_clear_bit(SOCKWQ_ASYNC_NOSPACE, &sk->sk_socket->flags)) + return; + + wqueue = sk_sleep(sk); + if (wqueue && waitqueue_active(wqueue)) + wake_up_interruptible_sync_poll(wqueue, POLLOUT | + POLLWRNORM | POLLWRBAND); + + tfile = container_of(sk, struct tun_file, sk); + kill_fasync(&tfile->fasync, SIGIO, POLL_OUT); +} + +static int tun_sendmsg(struct socket *sock, struct msghdr *m, size_t total_len) +{ + int ret; + struct tun_file *tfile = container_of(sock, struct tun_file, socket); + struct tun_struct *tun = __tun_get(tfile); + + if (!tun) + return -EBADFD; + + ret = tun_get_user(tun, tfile, m->msg_control, &m->msg_iter, + m->msg_flags & MSG_DONTWAIT); + tun_put(tun); + return ret; +} + +static int tun_recvmsg(struct socket *sock, struct msghdr *m, size_t total_len, + int flags) +{ + struct tun_file *tfile = container_of(sock, struct tun_file, socket); + struct tun_struct *tun = __tun_get(tfile); + int ret; + + if (!tun) + return -EBADFD; + + if (flags & ~(MSG_DONTWAIT|MSG_TRUNC|MSG_ERRQUEUE)) { + ret = -EINVAL; + goto out; + } + if (flags & MSG_ERRQUEUE) { + ret = sock_recv_errqueue(sock->sk, m, total_len, + SOL_PACKET, TUN_TX_TIMESTAMP); + goto out; + } + ret = tun_do_read(tun, tfile, &m->msg_iter, flags & MSG_DONTWAIT); + if (ret > (ssize_t)total_len) { + m->msg_flags |= MSG_TRUNC; + ret = flags & MSG_TRUNC ? ret : total_len; + } +out: + tun_put(tun); + return ret; +} + +static int tun_peek_len(struct socket *sock) +{ + struct tun_file *tfile = container_of(sock, struct tun_file, socket); + struct tun_struct *tun; + int ret = 0; + + tun = __tun_get(tfile); + if (!tun) + return 0; + + ret = skb_array_peek_len(&tfile->tx_array); + tun_put(tun); + + return ret; +} + +/* Ops structure to mimic raw sockets with tun */ +static const struct proto_ops tun_socket_ops = { + .peek_len = tun_peek_len, + .sendmsg = tun_sendmsg, + .recvmsg = tun_recvmsg, +}; + +static struct proto tun_proto = { + .name = "tun", + .owner = THIS_MODULE, + .obj_size = sizeof(struct tun_file), +}; + +static int tun_flags(struct tun_struct *tun) +{ + return tun->flags & (TUN_FEATURES | IFF_PERSIST | IFF_TUN | IFF_TAP); +} + +static ssize_t tun_show_flags(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct tun_struct *tun = netdev_priv(to_net_dev(dev)); + return sprintf(buf, "0x%x\n", tun_flags(tun)); +} + +static ssize_t tun_show_owner(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct tun_struct *tun = netdev_priv(to_net_dev(dev)); + return uid_valid(tun->owner)? + sprintf(buf, "%u\n", + from_kuid_munged(current_user_ns(), tun->owner)): + sprintf(buf, "-1\n"); +} + +static ssize_t tun_show_group(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct tun_struct *tun = netdev_priv(to_net_dev(dev)); + return gid_valid(tun->group) ? + sprintf(buf, "%u\n", + from_kgid_munged(current_user_ns(), tun->group)): + sprintf(buf, "-1\n"); +} + +static DEVICE_ATTR(tun_flags, 0444, tun_show_flags, NULL); +static DEVICE_ATTR(owner, 0444, tun_show_owner, NULL); +static DEVICE_ATTR(group, 0444, tun_show_group, NULL); + +static struct attribute *tun_dev_attrs[] = { + &dev_attr_tun_flags.attr, + &dev_attr_owner.attr, + &dev_attr_group.attr, + NULL +}; + +static const struct attribute_group tun_attr_group = { + .attrs = tun_dev_attrs +}; + +static int tun_set_iff(struct net *net, struct file *file, struct ifreq *ifr) +{ + struct tun_struct *tun; + struct tun_file *tfile = file->private_data; + struct net_device *dev; + int err; + + if (tfile->detached) + return -EINVAL; + + dev = __dev_get_by_name(net, ifr->ifr_name); + if (dev) { + if (ifr->ifr_flags & IFF_TUN_EXCL) + return -EBUSY; + if ((ifr->ifr_flags & IFF_TUN) && dev->netdev_ops == &tun_netdev_ops) + tun = netdev_priv(dev); + else if ((ifr->ifr_flags & IFF_TAP) && dev->netdev_ops == &tap_netdev_ops) + tun = netdev_priv(dev); + else + return -EINVAL; + + if (!!(ifr->ifr_flags & IFF_MULTI_QUEUE) != + !!(tun->flags & IFF_MULTI_QUEUE)) + return -EINVAL; + + if (tun_not_capable(tun)) + return -EPERM; + err = security_tun_dev_open(tun->security); + if (err < 0) + return err; + + err = tun_attach(tun, file, ifr->ifr_flags & IFF_NOFILTER); + if (err < 0) + return err; + + if (tun->flags & IFF_MULTI_QUEUE && + (tun->numqueues + tun->numdisabled > 1)) { + /* One or more queue has already been attached, no need + * to initialize the device again. + */ + return 0; + } + } + else { + char *name; + unsigned long flags = 0; + int queues = ifr->ifr_flags & IFF_MULTI_QUEUE ? + MAX_TAP_QUEUES : 1; + + if (!ns_capable(net->user_ns, CAP_NET_ADMIN)) + return -EPERM; + err = security_tun_dev_create(); + if (err < 0) + return err; + + /* Set dev type */ + if (ifr->ifr_flags & IFF_TUN) { + /* TUN device */ + flags |= IFF_TUN; + name = "tun%d"; + } else if (ifr->ifr_flags & IFF_TAP) { + /* TAP device */ + flags |= IFF_TAP; + name = "tap%d"; + } else + return -EINVAL; + + if (*ifr->ifr_name) + name = ifr->ifr_name; + + dev = alloc_netdev_mqs(sizeof(struct tun_struct), name, + NET_NAME_UNKNOWN, tun_setup, queues, + queues); + + if (!dev) + return -ENOMEM; +#if 0 + err = dev_get_valid_name(net, dev, name); + if (err < 0) + goto err_free_dev; +#endif + dev_net_set(dev, net); + dev->rtnl_link_ops = &tun_link_ops; + dev->ifindex = tfile->ifindex; + dev->sysfs_groups[0] = &tun_attr_group; + + tun = netdev_priv(dev); + tun->dev = dev; + tun->flags = flags; + tun->txflt.count = 0; + tun->vnet_hdr_sz = sizeof(struct virtio_net_hdr); + + tun->align = NET_SKB_PAD; + tun->filter_attached = false; + tun->sndbuf = tfile->socket.sk->sk_sndbuf; + + tun->pcpu_stats = netdev_alloc_pcpu_stats(struct tun_pcpu_stats); + if (!tun->pcpu_stats) { + err = -ENOMEM; + goto err_free_dev; + } + + spin_lock_init(&tun->lock); + + err = security_tun_dev_alloc_security(&tun->security); + if (err < 0) + goto err_free_stat; + + tun_net_init(dev); + tun_flow_init(tun); + + dev->hw_features = NETIF_F_SG | NETIF_F_FRAGLIST | + TUN_USER_FEATURES | NETIF_F_HW_VLAN_CTAG_TX | + NETIF_F_HW_VLAN_STAG_TX; + dev->features = dev->hw_features | NETIF_F_LLTX; + dev->vlan_features = dev->features & + ~(NETIF_F_HW_VLAN_CTAG_TX | + NETIF_F_HW_VLAN_STAG_TX); + + INIT_LIST_HEAD(&tun->disabled); + err = tun_attach(tun, file, false); + if (err < 0) + goto err_free_flow; + + err = register_netdevice(tun->dev); + if (err < 0) + goto err_detach; + } + + netif_carrier_on(tun->dev); + + tun_debug(KERN_INFO, tun, "tun_set_iff\n"); + + tun->flags = (tun->flags & ~TUN_FEATURES) | + (ifr->ifr_flags & TUN_FEATURES); + + /* Make sure persistent devices do not get stuck in + * xoff state. + */ + if (netif_running(tun->dev)) + netif_tx_wake_all_queues(tun->dev); + + strcpy(ifr->ifr_name, tun->dev->name); + return 0; + +err_detach: + tun_detach_all(dev); +err_free_flow: + tun_flow_uninit(tun); + security_tun_dev_free_security(tun->security); +err_free_stat: + free_percpu(tun->pcpu_stats); +err_free_dev: + free_netdev(dev); + return err; +} + +static void tun_get_iff(struct net *net, struct tun_struct *tun, + struct ifreq *ifr) +{ + tun_debug(KERN_INFO, tun, "tun_get_iff\n"); + + strcpy(ifr->ifr_name, tun->dev->name); + + ifr->ifr_flags = tun_flags(tun); + +} + +/* This is like a cut-down ethtool ops, except done via tun fd so no + * privs required. */ +static int set_offload(struct tun_struct *tun, unsigned long arg) +{ + netdev_features_t features = 0; + + if (arg & TUN_F_CSUM) { + features |= NETIF_F_HW_CSUM; + arg &= ~TUN_F_CSUM; + + if (arg & (TUN_F_TSO4|TUN_F_TSO6)) { + if (arg & TUN_F_TSO_ECN) { + features |= NETIF_F_TSO_ECN; + arg &= ~TUN_F_TSO_ECN; + } + if (arg & TUN_F_TSO4) + features |= NETIF_F_TSO; + if (arg & TUN_F_TSO6) + features |= NETIF_F_TSO6; + arg &= ~(TUN_F_TSO4|TUN_F_TSO6); + } + + if (arg & TUN_F_UFO) { + features |= NETIF_F_UFO; + arg &= ~TUN_F_UFO; + } + } + + /* This gives the user a way to test for new features in future by + * trying to set them. */ + if (arg) + return -EINVAL; + + tun->set_features = features; + netdev_update_features(tun->dev); + + return 0; +} + +static void tun_detach_filter(struct tun_struct *tun, int n) +{ + int i; + struct tun_file *tfile; + + for (i = 0; i < n; i++) { + tfile = rtnl_dereference(tun->tfiles[i]); + lock_sock(tfile->socket.sk); + sk_detach_filter(tfile->socket.sk); + release_sock(tfile->socket.sk); + } + + tun->filter_attached = false; +} + +static int tun_attach_filter(struct tun_struct *tun) +{ + int i, ret = 0; + struct tun_file *tfile; + + for (i = 0; i < tun->numqueues; i++) { + tfile = rtnl_dereference(tun->tfiles[i]); + lock_sock(tfile->socket.sk); + ret = sk_attach_filter(&tun->fprog, tfile->socket.sk); + release_sock(tfile->socket.sk); + if (ret) { + tun_detach_filter(tun, i); + return ret; + } + } + + tun->filter_attached = true; + return ret; +} + +static void tun_set_sndbuf(struct tun_struct *tun) +{ + struct tun_file *tfile; + int i; + + for (i = 0; i < tun->numqueues; i++) { + tfile = rtnl_dereference(tun->tfiles[i]); + tfile->socket.sk->sk_sndbuf = tun->sndbuf; + } +} + +static int tun_set_queue(struct file *file, struct ifreq *ifr) +{ + struct tun_file *tfile = file->private_data; + struct tun_struct *tun; + int ret = 0; + + rtnl_lock(); + + if (ifr->ifr_flags & IFF_ATTACH_QUEUE) { + tun = tfile->detached; + if (!tun) { + ret = -EINVAL; + goto unlock; + } + ret = security_tun_dev_attach_queue(tun->security); + if (ret < 0) + goto unlock; + ret = tun_attach(tun, file, false); + } else if (ifr->ifr_flags & IFF_DETACH_QUEUE) { + tun = rtnl_dereference(tfile->tun); + if (!tun || !(tun->flags & IFF_MULTI_QUEUE) || tfile->detached) + ret = -EINVAL; + else + __tun_detach(tfile, false); + } else + ret = -EINVAL; + +unlock: + rtnl_unlock(); + return ret; +} + +static long __tun_chr_ioctl(struct file *file, unsigned int cmd, + unsigned long arg, int ifreq_len) +{ + struct tun_file *tfile = file->private_data; + struct tun_struct *tun; + void __user* argp = (void __user*)arg; + struct ifreq ifr; + kuid_t owner; + kgid_t group; + int sndbuf; + int vnet_hdr_sz; + unsigned int ifindex; + int le; + int ret; + + if (cmd == TUNSETIFF || cmd == TUNSETQUEUE || _IOC_TYPE(cmd) == 0x89) { + if (copy_from_user(&ifr, argp, ifreq_len)) + return -EFAULT; + } else { + memset(&ifr, 0, sizeof(ifr)); + } + if (cmd == TUNGETFEATURES) { + /* Currently this just means: "what IFF flags are valid?". + * This is needed because we never checked for invalid flags on + * TUNSETIFF. + */ + return put_user(IFF_TUN | IFF_TAP | TUN_FEATURES, + (unsigned int __user*)argp); + } else if (cmd == TUNSETQUEUE) + return tun_set_queue(file, &ifr); + + ret = 0; + rtnl_lock(); + + tun = __tun_get(tfile); + if (cmd == TUNSETIFF && !tun) { + ifr.ifr_name[IFNAMSIZ-1] = '\0'; + + ret = tun_set_iff(sock_net(&tfile->sk), file, &ifr); + + if (ret) + goto unlock; + + if (copy_to_user(argp, &ifr, ifreq_len)) + ret = -EFAULT; + goto unlock; + } + if (cmd == TUNSETIFINDEX) { + ret = -EPERM; + if (tun) + goto unlock; + + ret = -EFAULT; + if (copy_from_user(&ifindex, argp, sizeof(ifindex))) + goto unlock; + + ret = 0; + tfile->ifindex = ifindex; + goto unlock; + } + + ret = -EBADFD; + if (!tun) + goto unlock; + + tun_debug(KERN_INFO, tun, "tun_chr_ioctl cmd %u\n", cmd); + + ret = 0; + switch (cmd) { + case TUNGETIFF: + tun_get_iff(current->nsproxy->net_ns, tun, &ifr); + + if (tfile->detached) + ifr.ifr_flags |= IFF_DETACH_QUEUE; + if (!tfile->socket.sk->sk_filter) + ifr.ifr_flags |= IFF_NOFILTER; + + if (copy_to_user(argp, &ifr, ifreq_len)) + ret = -EFAULT; + break; + + case TUNSETNOCSUM: + /* Disable/Enable checksum */ + + /* [unimplemented] */ + tun_debug(KERN_INFO, tun, "ignored: set checksum %s\n", + arg ? "disabled" : "enabled"); + break; + + case TUNSETPERSIST: + /* Disable/Enable persist mode. Keep an extra reference to the + * module to prevent the module being unprobed. + */ + if (arg && !(tun->flags & IFF_PERSIST)) { + tun->flags |= IFF_PERSIST; + __module_get(THIS_MODULE); + } + if (!arg && (tun->flags & IFF_PERSIST)) { + tun->flags &= ~IFF_PERSIST; + module_put(THIS_MODULE); + } + + tun_debug(KERN_INFO, tun, "persist %s\n", + arg ? "enabled" : "disabled"); + break; + + case TUNSETOWNER: + /* Set owner of the device */ + owner = make_kuid(current_user_ns(), arg); + if (!uid_valid(owner)) { + ret = -EINVAL; + break; + } + tun->owner = owner; + tun_debug(KERN_INFO, tun, "owner set to %u\n", + from_kuid(&init_user_ns, tun->owner)); + break; + + case TUNSETGROUP: + /* Set group of the device */ + group = make_kgid(current_user_ns(), arg); + if (!gid_valid(group)) { + ret = -EINVAL; + break; + } + tun->group = group; + tun_debug(KERN_INFO, tun, "group set to %u\n", + from_kgid(&init_user_ns, tun->group)); + break; + + case TUNSETLINK: + /* Only allow setting the type when the interface is down */ + if (tun->dev->flags & IFF_UP) { + tun_debug(KERN_INFO, tun, + "Linktype set failed because interface is up\n"); + ret = -EBUSY; + } else { + tun->dev->type = (int) arg; + tun_debug(KERN_INFO, tun, "linktype set to %d\n", + tun->dev->type); + ret = 0; + } + break; + +#ifdef TUN_DEBUG + case TUNSETDEBUG: + tun->debug = arg; + break; +#endif + case TUNSETOFFLOAD: + ret = set_offload(tun, arg); + break; + + case TUNSETTXFILTER: + /* Can be set only for TAPs */ + ret = -EINVAL; + if ((tun->flags & TUN_TYPE_MASK) != IFF_TAP) + break; + ret = update_filter(&tun->txflt, (void __user *)arg); + break; + + case SIOCGIFHWADDR: + /* Get hw address */ + memcpy(ifr.ifr_hwaddr.sa_data, tun->dev->dev_addr, ETH_ALEN); + ifr.ifr_hwaddr.sa_family = tun->dev->type; + if (copy_to_user(argp, &ifr, ifreq_len)) + ret = -EFAULT; + break; + + case SIOCSIFHWADDR: + /* Set hw address */ + tun_debug(KERN_DEBUG, tun, "set hw address: %pM\n", + ifr.ifr_hwaddr.sa_data); + + ret = dev_set_mac_address(tun->dev, &ifr.ifr_hwaddr); + break; + + case TUNGETSNDBUF: + sndbuf = tfile->socket.sk->sk_sndbuf; + if (copy_to_user(argp, &sndbuf, sizeof(sndbuf))) + ret = -EFAULT; + break; + + case TUNSETSNDBUF: + if (copy_from_user(&sndbuf, argp, sizeof(sndbuf))) { + ret = -EFAULT; + break; + } + if (sndbuf <= 0) { + ret = -EINVAL; + break; + } + + tun->sndbuf = sndbuf; + tun_set_sndbuf(tun); + break; + + case TUNGETVNETHDRSZ: + vnet_hdr_sz = tun->vnet_hdr_sz; + if (copy_to_user(argp, &vnet_hdr_sz, sizeof(vnet_hdr_sz))) + ret = -EFAULT; + break; + + case TUNSETVNETHDRSZ: + if (copy_from_user(&vnet_hdr_sz, argp, sizeof(vnet_hdr_sz))) { + ret = -EFAULT; + break; + } + if (vnet_hdr_sz < (int)sizeof(struct virtio_net_hdr)) { + ret = -EINVAL; + break; + } + + tun->vnet_hdr_sz = vnet_hdr_sz; + break; + + case TUNGETVNETLE: + le = !!(tun->flags & TUN_VNET_LE); + if (put_user(le, (int __user *)argp)) + ret = -EFAULT; + break; + + case TUNSETVNETLE: + if (get_user(le, (int __user *)argp)) { + ret = -EFAULT; + break; + } + if (le) + tun->flags |= TUN_VNET_LE; + else + tun->flags &= ~TUN_VNET_LE; + break; + + case TUNGETVNETBE: + ret = tun_get_vnet_be(tun, argp); + break; + + case TUNSETVNETBE: + ret = tun_set_vnet_be(tun, argp); + break; + + case TUNATTACHFILTER: + /* Can be set only for TAPs */ + ret = -EINVAL; + if ((tun->flags & TUN_TYPE_MASK) != IFF_TAP) + break; + ret = -EFAULT; + if (copy_from_user(&tun->fprog, argp, sizeof(tun->fprog))) + break; + + ret = tun_attach_filter(tun); + break; + + case TUNDETACHFILTER: + /* Can be set only for TAPs */ + ret = -EINVAL; + if ((tun->flags & TUN_TYPE_MASK) != IFF_TAP) + break; + ret = 0; + tun_detach_filter(tun, tun->numqueues); + break; + + case TUNGETFILTER: + ret = -EINVAL; + if ((tun->flags & TUN_TYPE_MASK) != IFF_TAP) + break; + ret = -EFAULT; + if (copy_to_user(argp, &tun->fprog, sizeof(tun->fprog))) + break; + ret = 0; + break; + + default: + ret = -EINVAL; + break; + } + +unlock: + rtnl_unlock(); + if (tun) + tun_put(tun); + return ret; +} + +static long tun_chr_ioctl(struct file *file, + unsigned int cmd, unsigned long arg) +{ + return __tun_chr_ioctl(file, cmd, arg, sizeof (struct ifreq)); +} + +#ifdef CONFIG_COMPAT +static long tun_chr_compat_ioctl(struct file *file, + unsigned int cmd, unsigned long arg) +{ + switch (cmd) { + case TUNSETIFF: + case TUNGETIFF: + case TUNSETTXFILTER: + case TUNGETSNDBUF: + case TUNSETSNDBUF: + case SIOCGIFHWADDR: + case SIOCSIFHWADDR: + arg = (unsigned long)compat_ptr(arg); + break; + default: + arg = (compat_ulong_t)arg; + break; + } + + /* + * compat_ifreq is shorter than ifreq, so we must not access beyond + * the end of that structure. All fields that are used in this + * driver are compatible though, we don't need to convert the + * contents. + */ + return __tun_chr_ioctl(file, cmd, arg, sizeof(struct compat_ifreq)); +} +#endif /* CONFIG_COMPAT */ + +static int tun_chr_fasync(int fd, struct file *file, int on) +{ + struct tun_file *tfile = file->private_data; + int ret; + + if ((ret = fasync_helper(fd, file, on, &tfile->fasync)) < 0) + goto out; + + if (on) { + __f_setown(file, task_pid(current), PIDTYPE_PID, 0); + tfile->flags |= TUN_FASYNC; + } else + tfile->flags &= ~TUN_FASYNC; + ret = 0; +out: + return ret; +} + +static int tun_chr_open(struct inode *inode, struct file * file) +{ + struct net *net = current->nsproxy->net_ns; + struct tun_file *tfile; + + DBG1(KERN_INFO, "tunX: tun_chr_open\n"); + + tfile = (struct tun_file *)sk_alloc(net, AF_UNSPEC, GFP_KERNEL, + &tun_proto, 0); + if (!tfile) + return -ENOMEM; + RCU_INIT_POINTER(tfile->tun, NULL); + tfile->flags = 0; + tfile->ifindex = 0; + + init_waitqueue_head(&tfile->wq.wait); + RCU_INIT_POINTER(tfile->socket.wq, &tfile->wq); + + tfile->socket.file = file; + tfile->socket.ops = &tun_socket_ops; + + sock_init_data(&tfile->socket, &tfile->sk); + + tfile->sk.sk_write_space = tun_sock_write_space; + tfile->sk.sk_sndbuf = INT_MAX; + + file->private_data = tfile; + INIT_LIST_HEAD(&tfile->next); + + sock_set_flag(&tfile->sk, SOCK_ZEROCOPY); + + memset(&tfile->tx_array, 0, sizeof(tfile->tx_array)); + + return 0; +} + +static int tun_chr_close(struct inode *inode, struct file *file) +{ + struct tun_file *tfile = file->private_data; + + tun_detach(tfile, true); + + return 0; +} + +#ifdef CONFIG_PROC_FS +static void tun_chr_show_fdinfo(struct seq_file *m, struct file *f) +{ + struct tun_struct *tun; + struct ifreq ifr; + + memset(&ifr, 0, sizeof(ifr)); + + rtnl_lock(); + tun = tun_get(f); + if (tun) + tun_get_iff(current->nsproxy->net_ns, tun, &ifr); + rtnl_unlock(); + + if (tun) + tun_put(tun); + + seq_printf(m, "iff:\t%s\n", ifr.ifr_name); +} +#endif + +static const struct file_operations tun_fops = { + .owner = THIS_MODULE, + .llseek = no_llseek, + .read_iter = tun_chr_read_iter, + .write_iter = tun_chr_write_iter, + .poll = tun_chr_poll, + .unlocked_ioctl = tun_chr_ioctl, +#ifdef CONFIG_COMPAT + .compat_ioctl = tun_chr_compat_ioctl, +#endif + .open = tun_chr_open, + .release = tun_chr_close, + .fasync = tun_chr_fasync, +#ifdef CONFIG_PROC_FS + .show_fdinfo = tun_chr_show_fdinfo, +#endif +}; + +static struct miscdevice tun_miscdev = { + .minor = TUN_MINOR1, + .name = "bf_tun", + .nodename = "net/bf_tun", + .fops = &tun_fops, +}; + +/* ethtool interface */ + +static int tun_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) +{ + cmd->supported = 0; + cmd->advertising = 0; + ethtool_cmd_speed_set(cmd, SPEED_10); + cmd->duplex = DUPLEX_FULL; + cmd->port = PORT_TP; + cmd->phy_address = 0; + cmd->transceiver = XCVR_INTERNAL; + cmd->autoneg = AUTONEG_DISABLE; + cmd->maxtxpkt = 0; + cmd->maxrxpkt = 0; + return 0; +} + +static void tun_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) +{ + struct tun_struct *tun = netdev_priv(dev); + + strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); + strlcpy(info->version, DRV_VERSION, sizeof(info->version)); + + switch (tun->flags & TUN_TYPE_MASK) { + case IFF_TUN: + strlcpy(info->bus_info, "tun", sizeof(info->bus_info)); + break; + case IFF_TAP: + strlcpy(info->bus_info, "tap", sizeof(info->bus_info)); + break; + } +} + +static u32 tun_get_msglevel(struct net_device *dev) +{ +#ifdef TUN_DEBUG + struct tun_struct *tun = netdev_priv(dev); + return tun->debug; +#else + return -EOPNOTSUPP; +#endif +} + +static void tun_set_msglevel(struct net_device *dev, u32 value) +{ +#ifdef TUN_DEBUG + struct tun_struct *tun = netdev_priv(dev); + tun->debug = value; +#endif +} + +static const struct ethtool_ops tun_ethtool_ops = { + .get_settings = tun_get_settings, + .get_drvinfo = tun_get_drvinfo, + .get_msglevel = tun_get_msglevel, + .set_msglevel = tun_set_msglevel, + .get_link = ethtool_op_get_link, + .get_ts_info = ethtool_op_get_ts_info, +}; + +static int tun_queue_resize(struct tun_struct *tun) +{ + struct net_device *dev = tun->dev; + struct tun_file *tfile; + struct skb_array **arrays; + int n = tun->numqueues + tun->numdisabled; + int ret, i; + + arrays = kmalloc(sizeof *arrays * n, GFP_KERNEL); + if (!arrays) + return -ENOMEM; + + for (i = 0; i < tun->numqueues; i++) { + tfile = rtnl_dereference(tun->tfiles[i]); + arrays[i] = &tfile->tx_array; + } + list_for_each_entry(tfile, &tun->disabled, next) + arrays[i++] = &tfile->tx_array; + + ret = skb_array_resize_multiple(arrays, n, + dev->tx_queue_len, GFP_KERNEL); + + kfree(arrays); + return ret; +} + +static int tun_device_event(struct notifier_block *unused, + unsigned long event, void *ptr) +{ + struct net_device *dev = netdev_notifier_info_to_dev(ptr); + struct tun_struct *tun = netdev_priv(dev); + + if (dev->rtnl_link_ops != &tun_link_ops) + return NOTIFY_DONE; + + switch (event) { + case NETDEV_CHANGE_TX_QUEUE_LEN: + if (tun_queue_resize(tun)) + return NOTIFY_BAD; + break; + default: + break; + } + + return NOTIFY_DONE; +} + +static struct notifier_block tun_notifier_block __read_mostly = { + .notifier_call = tun_device_event, +}; + +static int __init tun_init(void) +{ + int ret = 0; + + pr_info("%s, %s\n", DRV_DESCRIPTION, DRV_VERSION); + pr_info("%s\n", DRV_COPYRIGHT); + + ret = rtnl_link_register(&tun_link_ops); + if (ret) { + pr_err("Can't register link_ops\n"); + goto err_linkops; + } + + ret = misc_register(&tun_miscdev); + if (ret) { + pr_err("Can't register misc device %d\n", TUN_MINOR1); + goto err_misc; + } + + register_netdevice_notifier(&tun_notifier_block); + return 0; +err_misc: + rtnl_link_unregister(&tun_link_ops); +err_linkops: + return ret; +} + +static void tun_cleanup(void) +{ + misc_deregister(&tun_miscdev); + rtnl_link_unregister(&tun_link_ops); + unregister_netdevice_notifier(&tun_notifier_block); +} + +/* Get an underlying socket object from tun file. Returns error unless file is + * attached to a device. The returned object works like a packet socket, it + * can be used for sock_sendmsg/sock_recvmsg. The caller is responsible for + * holding a reference to the file for as long as the socket is in use. */ +struct socket *tun_get_socket(struct file *file) +{ + struct tun_file *tfile; + if (file->f_op != &tun_fops) + return ERR_PTR(-EINVAL); + tfile = file->private_data; + if (!tfile) + return ERR_PTR(-EBADFD); + return &tfile->socket; +} +EXPORT_SYMBOL_GPL(tun_get_socket); + +module_init(tun_init); +module_exit(tun_cleanup); +MODULE_DESCRIPTION(DRV_DESCRIPTION); +MODULE_AUTHOR(DRV_COPYRIGHT); +MODULE_LICENSE("GPL"); +MODULE_ALIAS_MISCDEV(TUN_MINOR1); +MODULE_ALIAS("devname:net/bf_tun"); diff --git a/platform/barefoot/bfn-platform-ingrasys.mk b/platform/barefoot/bfn-platform-ingrasys.mk new file mode 100644 index 00000000000..20dc5f866f3 --- /dev/null +++ b/platform/barefoot/bfn-platform-ingrasys.mk @@ -0,0 +1,5 @@ +BFN_INGRASYS_PLATFORM = bfnplatform-ingrasys_8.2.0_amd64.deb +$(BFN_INGRASYS_PLATFORM)_URL = "https://github.com/Ingrasys-sonic/packages/raw/master/lib/bfnplatform-ingrasys_8.4.0_8.5.0_amd64.deb" + +SONIC_ONLINE_DEBS += $(BFN_INGRASYS_PLATFORM) # $(BFN_SAI_DEV) +$(BFN_SAI_DEV)_DEPENDS += $(BFN_INGRASYS_PLATFORM) diff --git a/platform/barefoot/bfn-platform-wnc.mk b/platform/barefoot/bfn-platform-wnc.mk new file mode 100644 index 00000000000..e2f45d35b2b --- /dev/null +++ b/platform/barefoot/bfn-platform-wnc.mk @@ -0,0 +1,5 @@ +WNC_OSW1800_PLATFORM = bfnplatformwnc_1.0.0_amd64.deb +$(WNC_OSW1800_PLATFORM)_URL = "https://github.com/YaoTien/download/raw/master/sonic/sde/7_0_0_18/bfnplatformwnc_1.0.0_amd64.deb" + +SONIC_ONLINE_DEBS += $(WNC_OSW1800_PLATFORM) # $(BFN_SAI_DEV) +$(BFN_SAI_DEV)_DEPENDS += $(WNC_OSW1800_PLATFORM) diff --git a/platform/barefoot/bfn-platform.mk b/platform/barefoot/bfn-platform.mk new file mode 100644 index 00000000000..854026b5294 --- /dev/null +++ b/platform/barefoot/bfn-platform.mk @@ -0,0 +1,5 @@ +BFN_PLATFORM = bfnplatform_20191115_deb9.deb +$(BFN_PLATFORM)_URL = "https://github.com/barefootnetworks/sonic-release-pkgs/raw/dev/bfnplatform_20191115_deb9.deb" + +SONIC_ONLINE_DEBS += $(BFN_PLATFORM) +$(BFN_SAI_DEV)_DEPENDS += $(BFN_PLATFORM) diff --git a/platform/barefoot/bfn-sai.mk b/platform/barefoot/bfn-sai.mk new file mode 100644 index 00000000000..6f413d50c11 --- /dev/null +++ b/platform/barefoot/bfn-sai.mk @@ -0,0 +1,5 @@ +BFN_SAI = bfnsdk_20191115_deb9.deb +$(BFN_SAI)_URL = "https://github.com/barefootnetworks/sonic-release-pkgs/raw/dev/bfnsdk_20191115_deb9.deb" + +SONIC_ONLINE_DEBS += $(BFN_SAI) +$(BFN_SAI_DEV)_DEPENDS += $(BFN_SAI) diff --git a/platform/barefoot/docker-ptf-bfn.mk b/platform/barefoot/docker-ptf-bfn.mk new file mode 100644 index 00000000000..573e9cd9cff --- /dev/null +++ b/platform/barefoot/docker-ptf-bfn.mk @@ -0,0 +1,5 @@ +# docker image for docker-ptf + +DOCKER_PTF_BFN = docker-ptf-bfn.gz +$(DOCKER_PTF_BFN)_PATH = $(DOCKERS_PATH)/docker-ptf-saithrift +$(DOCKER_PTF_BFN)_LOAD_DOCKERS += $(DOCKER_PTF) diff --git a/platform/barefoot/docker-saiserver-bfn/Dockerfile b/platform/barefoot/docker-saiserver-bfn/Dockerfile new file mode 100755 index 00000000000..427a551e009 --- /dev/null +++ b/platform/barefoot/docker-saiserver-bfn/Dockerfile @@ -0,0 +1,38 @@ +FROM docker-base + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +COPY ["deps/applibs_*.deb", "/deps/applibs-dev_*.deb", "/deps/sx-complib_*.deb", "/deps/sxd-libs_*.deb", "/deps/sx-scew_*.deb", "/deps/sx-examples_*.deb", "/deps/sx-gen-utils_*.deb", "/deps/python-sdk-api_*.deb", "/deps/iproute2_*.deb", "/deps/mlnx-sai_*.deb", "/deps/libthrift-0.9.3_*.deb", "/deps/libnl-3-200_*.deb", "/deps/libnl-genl-3-200_*.deb", "/deps/libnl-route-3-200_*.deb", "/deps/"] + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; \ + dpkg_apt /deps/applibs_*.deb \ + && dpkg_apt /deps/applibs-dev_*.deb \ + && dpkg_apt /deps/sx-complib_*.deb \ + && dpkg_apt /deps/sxd-libs_*.deb \ + && dpkg_apt /deps/sx-scew_*.deb \ + && dpkg_apt /deps/sx-examples_*.deb \ + && dpkg_apt /deps/sx-gen-utils_*.deb \ + && dpkg_apt /deps/python-sdk-api_*.deb \ + && dpkg_apt /deps/iproute2_*.deb \ + && dpkg_apt /deps/mlnx-sai_*.deb \ + && dpkg_apt /deps/libthrift-0.9.3_*.deb \ + && dpkg_apt /deps/libnl-3-200_*.deb \ + && dpkg_apt /deps/libnl-genl-3-200_*.deb \ + && dpkg_apt /deps/libnl-route-3-200_*.deb + +COPY ["deps/saiserver", "start.sh", "/usr/bin/"] + +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] + +COPY ["profile.ini", "portmap.ini", "/etc/sai/"] + + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /deps + +ENTRYPOINT ["/usr/bin/supervisord"] + diff --git a/platform/barefoot/docker-saiserver-bfn/portmap.ini b/platform/barefoot/docker-saiserver-bfn/portmap.ini new file mode 100644 index 00000000000..4d3be08ce5f --- /dev/null +++ b/platform/barefoot/docker-saiserver-bfn/portmap.ini @@ -0,0 +1,33 @@ +# alias lanes +Ethernet1 0,1,2,3 +Ethernet2 4,5,6,7 +Ethernet3 8,9,10,11 +Ethernet4 12,13,14,15 +Ethernet5 16,17,18,19 +Ethernet6 20,21,22,23 +Ethernet7 24,25,26,27 +Ethernet8 28,29,30,31 +Ethernet9 32,33,34,35 +Ethernet10 36,37,38,39 +Ethernet11 40,41,42,43 +Ethernet12 44,45,46,47 +Ethernet13 48,49,50,51 +Ethernet14 52,53,54,55 +Ethernet15 56,57,58,59 +Ethernet16 60,61,62,63 +Ethernet17 64,65,66,67 +Ethernet18 68,69,70,71 +Ethernet19 72,73,74,75 +Ethernet20 76,77,78,79 +Ethernet21 80,81,82,83 +Ethernet22 84,85,86,87 +Ethernet23 88,89,90,91 +Ethernet24 92,93,94,95 +Ethernet25 96,97,98,99 +Ethernet26 100,101,102,103 +Ethernet27 104,105,106,107 +Ethernet28 108,109,110,111 +Ethernet29 112,113,114,115 +Ethernet30 116,117,118,119 +Ethernet31 120,121,122,123 +Ethernet32 124,125,126,127 \ No newline at end of file diff --git a/platform/barefoot/docker-saiserver-bfn/profile.ini b/platform/barefoot/docker-saiserver-bfn/profile.ini new file mode 100644 index 00000000000..b20b2c6f0e0 --- /dev/null +++ b/platform/barefoot/docker-saiserver-bfn/profile.ini @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sai_tofino.xml diff --git a/platform/barefoot/docker-saiserver-bfn/sai_tofino.xml b/platform/barefoot/docker-saiserver-bfn/sai_tofino.xml new file mode 100644 index 00000000000..139597f9cb0 --- /dev/null +++ b/platform/barefoot/docker-saiserver-bfn/sai_tofino.xml @@ -0,0 +1,2 @@ + + diff --git a/platform/barefoot/docker-saiserver-bfn/start.sh b/platform/barefoot/docker-saiserver-bfn/start.sh new file mode 100755 index 00000000000..16457d13e03 --- /dev/null +++ b/platform/barefoot/docker-saiserver-bfn/start.sh @@ -0,0 +1,8 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +supervisorctl start saiserver + diff --git a/platform/barefoot/docker-saiserver-bfn/supervisord.conf b/platform/barefoot/docker-saiserver-bfn/supervisord.conf new file mode 100644 index 00000000000..e09ac3cbb44 --- /dev/null +++ b/platform/barefoot/docker-saiserver-bfn/supervisord.conf @@ -0,0 +1,29 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:saiserver] +command=/usr/bin/saiserver -p /etc/sai/profile.ini -f /etc/sai/portmap.ini +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + diff --git a/platform/barefoot/docker-syncd-bfn-rpc.mk b/platform/barefoot/docker-syncd-bfn-rpc.mk new file mode 100644 index 00000000000..d9cb0b5d617 --- /dev/null +++ b/platform/barefoot/docker-syncd-bfn-rpc.mk @@ -0,0 +1,24 @@ +# docker image for syncd with rpc + +DOCKER_SYNCD_BFN_RPC = docker-syncd-bfn-rpc.gz +$(DOCKER_SYNCD_BFN_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-bfn-rpc +$(DOCKER_SYNCD_BFN_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) +$(DOCKER_SYNCD_BFN_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) +ifeq ($(INSTALL_DEBUG_TOOLS), y) +$(DOCKER_SYNCD_BFN_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) +endif +$(DOCKER_SYNCD_BFN_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_BFN_RPC) +SONIC_STRETCH_DOCKERS += $(DOCKER_SYNCD_BFN_RPC) +ifeq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_BFN_RPC) +endif + +$(DOCKER_SYNCD_BFN_RPC)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_BFN_RPC)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SYNCD_BFN_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_BFN_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SYNCD_BFN_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/barefoot/docker-syncd-bfn-rpc/Dockerfile.j2 b/platform/barefoot/docker-syncd-bfn-rpc/Dockerfile.j2 new file mode 100644 index 00000000000..f10eb7fb526 --- /dev/null +++ b/platform/barefoot/docker-syncd-bfn-rpc/Dockerfile.j2 @@ -0,0 +1,53 @@ +FROM docker-syncd-bfn + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +COPY \ +{% for deb in docker_syncd_bfn_rpc_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get purge -y syncd + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ +{% for deb in docker_syncd_bfn_rpc_debs.split(' ') -%} +dpkg_apt debs/{{ deb }}{{'; '}} +{%- endfor %} + +## Pre-install the fundamental packages +RUN apt-get update \ + && apt-get -y install \ + net-tools \ + python-pip \ + build-essential \ + libssl-dev \ + libffi-dev \ + python-dev \ + wget \ + cmake \ + libpython3.4 \ + && wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ + && tar xvfz 1.0.0.tar.gz \ + && cd nanomsg-1.0.0 \ + && mkdir -p build \ + && cmake . \ + && make install \ + && ldconfig \ + && cd .. \ + && rm -fr nanomsg-1.0.0 \ + && rm -f 1.0.0.tar.gz \ + && pip install cffi==1.7.0 \ + && pip install --upgrade cffi==1.7.0 \ + && pip install nnpy \ + && mkdir -p /opt \ + && cd /opt \ + && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ + && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \ + && rm -rf /root/deps + +COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] + +ENTRYPOINT ["/usr/bin/supervisord"] + diff --git a/platform/barefoot/docker-syncd-bfn-rpc/ptf_nn_agent.conf b/platform/barefoot/docker-syncd-bfn-rpc/ptf_nn_agent.conf new file mode 100644 index 00000000000..fa1ed0eb162 --- /dev/null +++ b/platform/barefoot/docker-syncd-bfn-rpc/ptf_nn_agent.conf @@ -0,0 +1,10 @@ +[program:ptf_nn_agent] +command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-iface-rcv-buffer=109430400 +process_name=ptf_nn_agent +stdout_logfile=/tmp/ptf_nn_agent.out.log +stderr_logfile=/tmp/ptf_nn_agent.err.log +redirect_stderr=false +autostart=true +autorestart=true +startsecs=1 +numprocs=1 diff --git a/platform/barefoot/docker-syncd-bfn.mk b/platform/barefoot/docker-syncd-bfn.mk new file mode 100644 index 00000000000..6f3ed59ad28 --- /dev/null +++ b/platform/barefoot/docker-syncd-bfn.mk @@ -0,0 +1,14 @@ +# docker image for syncd + +DOCKER_SYNCD_PLATFORM_CODE = bfn +include $(PLATFORM_PATH)/../template/docker-syncd-base.mk + +$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) + +$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) + +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot + diff --git a/platform/barefoot/docker-syncd-bfn/Dockerfile.j2 b/platform/barefoot/docker-syncd-bfn/Dockerfile.j2 new file mode 100755 index 00000000000..c12c36b1260 --- /dev/null +++ b/platform/barefoot/docker-syncd-bfn/Dockerfile.j2 @@ -0,0 +1,40 @@ +FROM docker-config-engine-stretch + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +COPY \ +{% for deb in docker_syncd_bfn_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get install -y \ + libxml2 \ + libpcap-dev \ + libusb-1.0-0-dev \ + libcurl3 \ + libcurl4-gnutls-dev \ + libunwind8-dev \ + libpython3.4 \ + libc-ares2 \ + libgoogle-perftools4 + +RUN dpkg -i \ +{% for deb in docker_syncd_bfn_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +COPY ["start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor/"] + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +ENTRYPOINT ["/usr/bin/supervisord"] + diff --git a/platform/barefoot/docker-syncd-bfn/critical_processes b/platform/barefoot/docker-syncd-bfn/critical_processes new file mode 100644 index 00000000000..6082f242b87 --- /dev/null +++ b/platform/barefoot/docker-syncd-bfn/critical_processes @@ -0,0 +1 @@ +syncd diff --git a/platform/barefoot/docker-syncd-bfn/start.sh b/platform/barefoot/docker-syncd-bfn/start.sh new file mode 100755 index 00000000000..1a39db4a9d8 --- /dev/null +++ b/platform/barefoot/docker-syncd-bfn/start.sh @@ -0,0 +1,9 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +. /opt/bfn/install/bin/dma_setup.sh +# . /opt/bfn/install/bin/bf_kdrv_mod_load /opt/bfn/install +LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/opt/bfn/install/lib supervisorctl start syncd diff --git a/platform/barefoot/docker-syncd-bfn/supervisord.conf b/platform/barefoot/docker-syncd-bfn/supervisord.conf new file mode 100644 index 00000000000..1e015fef931 --- /dev/null +++ b/platform/barefoot/docker-syncd-bfn/supervisord.conf @@ -0,0 +1,29 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + diff --git a/platform/barefoot/libsaithrift-dev.mk b/platform/barefoot/libsaithrift-dev.mk new file mode 100644 index 00000000000..0289a41b291 --- /dev/null +++ b/platform/barefoot/libsaithrift-dev.mk @@ -0,0 +1,20 @@ +# libsaithrift-dev package + +SAI_VER = 0.9.4 + +LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_amd64.deb +$(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI +$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(BFN_SAI) $(BFN_SAI_DEV) +$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) $(BFN_SAI) +SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV) + +PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_amd64.deb +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT))) + +SAISERVER = saiserver_$(SAI_VER)_amd64.deb +$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(BRCM_SAI) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER))) + +SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_amd64.deb +$(SAISERVER_DBG)_RDEPENDS += $(SAISERVER) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER_DBG))) diff --git a/platform/barefoot/one-aboot.mk b/platform/barefoot/one-aboot.mk new file mode 100644 index 00000000000..4e5e808d2ab --- /dev/null +++ b/platform/barefoot/one-aboot.mk @@ -0,0 +1,15 @@ +# sonic one aboot installer + +SONIC_ONE_ABOOT_IMAGE = sonic-aboot-barefoot.swi +$(SONIC_ONE_ABOOT_IMAGE)_MACHINE = barefoot +$(SONIC_ONE_ABOOT_IMAGE)_IMAGE_TYPE = aboot +$(SONIC_ONE_ABOOT_IMAGE)_INSTALLS += $(BFN_MODULE) +$(SONIC_ONE_ABOOT_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_ONE_ABOOT_IMAGE)_LAZY_INSTALLS += $(BFN_PLATFORM_MODULE) +$(SONIC_ONE_ABOOT_IMAGE)_LAZY_INSTALLS += $(BFN_MONTARA_PLATFORM_MODULE) +$(SONIC_ONE_ABOOT_IMAGE)_INSTALLS += $(ARISTA_PLATFORM_MODULE_DRIVERS) \ + $(ARISTA_PLATFORM_MODULE_PYTHON2) \ + $(ARISTA_PLATFORM_MODULE_PYTHON3) \ + $(ARISTA_PLATFORM_MODULE) +$(SONIC_ONE_ABOOT_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_IMAGES) +SONIC_INSTALLERS += $(SONIC_ONE_ABOOT_IMAGE) diff --git a/platform/barefoot/one-image.mk b/platform/barefoot/one-image.mk new file mode 100644 index 00000000000..0147b62d00a --- /dev/null +++ b/platform/barefoot/one-image.mk @@ -0,0 +1,20 @@ +# sonic one image installer + +SONIC_ONE_IMAGE = sonic-barefoot.bin +$(SONIC_ONE_IMAGE)_MACHINE = barefoot +$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie +$(SONIC_ONE_IMAGE)_INSTALLS += $(BFN_MODULE) $(PYTHON_THRIFT) +$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(BFN_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(BFN_MONTARA_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(BFN_NEWPORT_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(WNC_OSW1800_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(INGRASYS_S9180_32X_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(INGRASYS_S9280_64X_PLATFORM_MODULE) +ifeq ($(INSTALL_DEBUG_TOOLS),y) +$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) +$(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) +else +$(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES) +endif +SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/barefoot/platform-modules-arista.mk b/platform/barefoot/platform-modules-arista.mk new file mode 100644 index 00000000000..480aa0cf839 --- /dev/null +++ b/platform/barefoot/platform-modules-arista.mk @@ -0,0 +1,25 @@ +# Arista Platform modules + +ARISTA_PLATFORM_MODULE_VERSION = 1.0 + +export ARISTA_PLATFORM_MODULE_VERSION + +ARISTA_PLATFORM_MODULE = sonic-platform-arista_$(ARISTA_PLATFORM_MODULE_VERSION)_amd64.deb +$(ARISTA_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-arista +$(ARISTA_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +SONIC_MAKE_DEBS += $(ARISTA_PLATFORM_MODULE) + +ARISTA_PLATFORM_MODULE_PYTHON2 = python-sonic-platform-arista_$(ARISTA_PLATFORM_MODULE_VERSION)_all.deb +$(eval $(call add_extra_package,$(ARISTA_PLATFORM_MODULE),$(ARISTA_PLATFORM_MODULE_PYTHON2))) + +ARISTA_PLATFORM_MODULE_PYTHON3 = python3-sonic-platform-arista_$(ARISTA_PLATFORM_MODULE_VERSION)_all.deb +$(eval $(call add_extra_package,$(ARISTA_PLATFORM_MODULE),$(ARISTA_PLATFORM_MODULE_PYTHON3))) + +ARISTA_PLATFORM_MODULE_DRIVERS = drivers-sonic-platform-arista_$(ARISTA_PLATFORM_MODULE_VERSION)_amd64.deb +$(eval $(call add_extra_package,$(ARISTA_PLATFORM_MODULE),$(ARISTA_PLATFORM_MODULE_DRIVERS))) + +export ARISTA_PLATFORM_MODULE ARISTA_PLATFORM_MODULE_PYTHON2 ARISTA_PLATFORM_MODULE_PYTHON3 ARISTA_PLATFORM_MODULE_DRIVERS + +export ARISTA_SCD_DRIVER_CONFIG=m + +SONIC_STRETCH_DEBS += $(ARISTA_PLATFORM_MODULE) diff --git a/platform/barefoot/platform-modules-bfn-montara.mk b/platform/barefoot/platform-modules-bfn-montara.mk new file mode 100644 index 00000000000..d089218c945 --- /dev/null +++ b/platform/barefoot/platform-modules-bfn-montara.mk @@ -0,0 +1,13 @@ +# BFN Platform modules + +BFN_MONTARA_PLATFORM_MODULE_VERSION = 1.1 + +export BFN_MONTARA_PLATFORM_MODULE_VERSION + +BFN_MONTARA_PLATFORM_MODULE = sonic-platform-modules-bfn-montara_$(BFN_MONTARA_PLATFORM_MODULE_VERSION)_amd64.deb +$(BFN_MONTARA_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-bfn-montara +$(BFN_MONTARA_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(BFN_MONTARA_PLATFORM_MODULE)_PLATFORM = x86_64-accton_wedge100bf_32x-r0 +SONIC_DPKG_DEBS += $(BFN_MONTARA_PLATFORM_MODULE) + +SONIC_STRETCH_DEBS += $(BFN_MONTARA_PLATFORM_MODULE) diff --git a/platform/barefoot/platform-modules-bfn-newport.mk b/platform/barefoot/platform-modules-bfn-newport.mk new file mode 100644 index 00000000000..ff251ed1ddd --- /dev/null +++ b/platform/barefoot/platform-modules-bfn-newport.mk @@ -0,0 +1,13 @@ +# BFN Platform modules + +BFN_NEWPORT_PLATFORM_MODULE_VERSION = 1.0 + +export BFN_NEWPORT_PLATFORM_MODULE_VERSION + +BFN_NEWPORT_PLATFORM_MODULE = sonic-platform-modules-bfn-newport_$(BFN_NEWPORT_PLATFORM_MODULE_VERSION)_amd64.deb +$(BFN_NEWPORT_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-bfn-newport +$(BFN_NEWPORT_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(BFN_NEWPORT_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as9516bf_32d-r0 +SONIC_DPKG_DEBS += $(BFN_NEWPORT_PLATFORM_MODULE) + +SONIC_STRETCH_DEBS += $(BFN_NEWPORT_PLATFORM_MODULE) diff --git a/platform/barefoot/platform-modules-bfn.mk b/platform/barefoot/platform-modules-bfn.mk new file mode 100644 index 00000000000..1caa92c8f2b --- /dev/null +++ b/platform/barefoot/platform-modules-bfn.mk @@ -0,0 +1,13 @@ +# BFN Platform modules + +BFN_PLATFORM_MODULE_VERSION = 1.1 + +export BFN_PLATFORM_MODULE_VERSION + +BFN_PLATFORM_MODULE = sonic-platform-modules-bfn_$(BFN_PLATFORM_MODULE_VERSION)_amd64.deb +$(BFN_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-bfn +$(BFN_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(BFN_PLATFORM_MODULE)_PLATFORM = x86_64-accton_wedge100bf_65x-r0 +SONIC_DPKG_DEBS += $(BFN_PLATFORM_MODULE) + +SONIC_STRETCH_DEBS += $(BFN_PLATFORM_MODULE) diff --git a/platform/barefoot/platform-modules-ingrasys.mk b/platform/barefoot/platform-modules-ingrasys.mk new file mode 100644 index 00000000000..ea8f68c003f --- /dev/null +++ b/platform/barefoot/platform-modules-ingrasys.mk @@ -0,0 +1,20 @@ +# Ingrasys S9180-32X Platform modules + +INGRASYS_S9180_32X_PLATFORM_MODULE_VERSION = 1.1.0 +INGRASYS_S9280_64X_PLATFORM_MODULE_VERSION = 1.1.0 + +export INGRASYS_S9180_32X_PLATFORM_MODULE_VERSION +export INGRASYS_S9280_64X_PLATFORM_MODULE_VERSION + +INGRASYS_S9180_32X_PLATFORM_MODULE = sonic-platform-ingrasys-s9180-32x_$(INGRASYS_S9180_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(INGRASYS_S9180_32X_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-ingrasys +$(INGRASYS_S9180_32X_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(INGRASYS_S9180_32X_PLATFORM_MODULE)_PLATFORM = x86_64-ingrasys_s9180_32x-r0 +SONIC_DPKG_DEBS += $(INGRASYS_S9180_32X_PLATFORM_MODULE) + +INGRASYS_S9280_64X_PLATFORM_MODULE = sonic-platform-ingrasys-s9280-64x_$(INGRASYS_S9280_64X_PLATFORM_MODULE_VERSION)_amd64.deb +$(INGRASYS_S9280_64X_PLATFORM_MODULE)_PLATFORM = x86_64-ingrasys_s9280_64x-r0 + +$(eval $(call add_extra_package,$(INGRASYS_S9180_32X_PLATFORM_MODULE),$(INGRASYS_S9280_64X_PLATFORM_MODULE))) + +SONIC_STRETCH_DEBS += $(INGRASYS_S9180_32X_PLATFORM_MODULE) diff --git a/platform/barefoot/platform-modules-wnc-osw1800.mk b/platform/barefoot/platform-modules-wnc-osw1800.mk new file mode 100644 index 00000000000..5703d069c97 --- /dev/null +++ b/platform/barefoot/platform-modules-wnc-osw1800.mk @@ -0,0 +1,13 @@ +# BFN Platform modules + +WNC_OSW1800_PLATFORM_MODULE_VERSION = 1.0 + +export WNC_OSW1800_PLATFORM_MODULE_VERSION + +WNC_OSW1800_PLATFORM_MODULE = platform-modules-wnc-osw1800_$(WNC_OSW1800_PLATFORM_MODULE_VERSION)_amd64.deb +$(WNC_OSW1800_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-wnc-osw1800 +$(WNC_OSW1800_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(WNC_OSW1800_PLATFORM_MODULE)_PLATFORM = x86_64-wnc_osw1800-r0 +SONIC_DPKG_DEBS += $(WNC_OSW1800_PLATFORM_MODULE) + +SONIC_STRETCH_DEBS += $(WNC_OSW1800_PLATFORM_MODULE) diff --git a/platform/barefoot/platform.conf b/platform/barefoot/platform.conf new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/barefoot/rules.mk b/platform/barefoot/rules.mk new file mode 100644 index 00000000000..8a218b3ff16 --- /dev/null +++ b/platform/barefoot/rules.mk @@ -0,0 +1,26 @@ +include $(PLATFORM_PATH)/platform-modules-arista.mk +include $(PLATFORM_PATH)/platform-modules-bfn.mk +include $(PLATFORM_PATH)/platform-modules-bfn-montara.mk +include $(PLATFORM_PATH)/platform-modules-bfn-newport.mk +include $(PLATFORM_PATH)/platform-modules-wnc-osw1800.mk +include $(PLATFORM_PATH)/platform-modules-ingrasys.mk +include $(PLATFORM_PATH)/bfn-sai.mk +include $(PLATFORM_PATH)/docker-syncd-bfn.mk +include $(PLATFORM_PATH)/docker-syncd-bfn-rpc.mk +include $(PLATFORM_PATH)/one-aboot.mk +include $(PLATFORM_PATH)/one-image.mk +include $(PLATFORM_PATH)/libsaithrift-dev.mk +include $(PLATFORM_PATH)/docker-ptf-bfn.mk +include $(PLATFORM_PATH)/bfn-platform.mk +#include $(PLATFORM_PATH)/bfn-platform-wnc.mk +#include $(PLATFORM_PATH)/bfn-platform-ingrasys.mk +include $(PLATFORM_PATH)/bfn-modules.mk + +SONIC_ALL += $(SONIC_ONE_IMAGE) $(SONIC_ONE_ABOOT) \ + $(DOCKER_FPM) + +# Inject sai into sairedis +$(LIBSAIREDIS)_DEPENDS += $(BFN_SAI) $(WNC_OSW1800_PLATFORM) $(BFN_INGRASYS_PLATFORM) $(BFN_PLATFORM) #$(LIBSAITHRIFT_DEV_BFN) + +# Runtime dependency on sai is set only for syncd +$(SYNCD)_RDEPENDS += $(BFN_SAI) $(WNC_OSW1800_PLATFORM) $(BFN_INGRASYS_PLATFORM) $(BFN_PLATFORM) diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista new file mode 160000 index 00000000000..10750325b6c --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-arista @@ -0,0 +1 @@ +Subproject commit 10750325b6cfc7a1dc1a8b0734008bde1bb3ac06 diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/LICENSE b/platform/barefoot/sonic-platform-modules-bfn-montara/LICENSE new file mode 100644 index 00000000000..676cdeec726 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/LICENSE @@ -0,0 +1,15 @@ +Copyright (C) 2016 Microsoft, Inc + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/MAINTAINERS b/platform/barefoot/sonic-platform-modules-bfn-montara/MAINTAINERS new file mode 100644 index 00000000000..6396065f4ab --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/MAINTAINERS @@ -0,0 +1,3 @@ +# This file describes the maintainers for sonic-platform-modules-bfn-montara +# See the SONiC project governance document for more information +Mailinglist = sonicproject@googlegroups.com diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/README.md b/platform/barefoot/sonic-platform-modules-bfn-montara/README.md new file mode 100644 index 00000000000..ac1fffb7dc4 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/README.md @@ -0,0 +1,2 @@ +# sonic-platform-modules-bfn-montara +Device drivers for support of BFN platform for the SONiC project diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/configs/network/interfaces.d/usb0 b/platform/barefoot/sonic-platform-modules-bfn-montara/configs/network/interfaces.d/usb0 new file mode 100644 index 00000000000..f1dd054cc6f --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/configs/network/interfaces.d/usb0 @@ -0,0 +1,5 @@ +# BMC interface +auto usb0 +allow-hotplug usb0 +iface usb0 inet6 +up ifconfig usb0 txqueuelen 64 diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/debian/changelog b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/changelog new file mode 100644 index 00000000000..07fbc708141 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/changelog @@ -0,0 +1,11 @@ +sonic-platform-modules-bfn-montara (1.1) unstable; urgency=low + + * Remove bfn asic kernel modules from platform package + + -- Support Mon, 22 Oct 2018 15:40:00 -0800 + +sonic-platform-modules-bfn-montara (1.0) unstable; urgency=low + + * Initial release + + -- Support Mon, 11 Nov 2015 11:11:11 -0800 diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/debian/compat b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/compat new file mode 100644 index 00000000000..45a4fb75db8 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/compat @@ -0,0 +1 @@ +8 diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control new file mode 100644 index 00000000000..192da9dab95 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control @@ -0,0 +1,12 @@ +Source: sonic-platform-modules-bfn-montara +Section: main +Priority: extra +Maintainer: Support +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: sonic-platform-modules-bfn-montara +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/debian/copyright b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/copyright new file mode 100644 index 00000000000..ade42b7aa75 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/copyright @@ -0,0 +1,15 @@ +Provides linux kernel driver for BF PCIe devices + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/debian/rules b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/rules new file mode 100755 index 00000000000..972f49ff91d --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/rules @@ -0,0 +1,22 @@ +#!/usr/bin/make -f + +PACKAGE_NAME := sonic-platform-modules-bfn-montara +SCRIPT_SRC := $(shell pwd)/scripts +CONFIGS_SRC := $(shell pwd)/configs + +%: + dh $@ + +override_dh_auto_install: + dh_installdirs -p$(PACKAGE_NAME) usr/local/bin + cp -r $(SCRIPT_SRC)/* debian/$(PACKAGE_NAME)/usr/local/bin + dh_installdirs -p$(PACKAGE_NAME) etc/network/interfaces.d/ + cp -r $(CONFIGS_SRC)/network/interfaces.d/* debian/$(PACKAGE_NAME)/etc/network/interfaces.d/ + +override_dh_usrlocal: + +override_dh_pysupport: + +override_dh_clean: + dh_clean + diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/bf-sfputil b/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/bf-sfputil new file mode 100755 index 00000000000..3df67614e49 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/bf-sfputil @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd sfputil "$@" diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/eeprom b/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/eeprom new file mode 100755 index 00000000000..07d98556cbb --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/eeprom @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd eeprom "$@" diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/fancontrol b/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/fancontrol new file mode 100755 index 00000000000..515fcbdd69d --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/fancontrol @@ -0,0 +1,11 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd fancontrol "$@" + diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/ps_info b/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/ps_info new file mode 100755 index 00000000000..38c9d333041 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/ps_info @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd ps_info "$@" diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/sensors b/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/sensors new file mode 100755 index 00000000000..07af6955321 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/sensors @@ -0,0 +1,12 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd sensors "$@" + + diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/test b/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/test new file mode 100755 index 00000000000..38327722c91 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/scripts/test @@ -0,0 +1 @@ +echo "test" diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/LICENSE b/platform/barefoot/sonic-platform-modules-bfn-newport/LICENSE new file mode 100644 index 00000000000..676cdeec726 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/LICENSE @@ -0,0 +1,15 @@ +Copyright (C) 2016 Microsoft, Inc + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/MAINTAINERS b/platform/barefoot/sonic-platform-modules-bfn-newport/MAINTAINERS new file mode 100644 index 00000000000..85aa0cd77d7 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/MAINTAINERS @@ -0,0 +1,3 @@ +# This file describes the maintainers for sonic-platform-modules-bfn-newport +# See the SONiC project governance document for more information +Mailinglist = sonicproject@googlegroups.com diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/README.md b/platform/barefoot/sonic-platform-modules-bfn-newport/README.md new file mode 100644 index 00000000000..028adef715f --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/README.md @@ -0,0 +1,2 @@ +# sonic-platform-modules-bfn-newport +Device drivers for support of BFN platform for the SONiC project diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/configs/network/interfaces.d/eth2 b/platform/barefoot/sonic-platform-modules-bfn-newport/configs/network/interfaces.d/eth2 new file mode 100644 index 00000000000..725bc89e0eb --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/configs/network/interfaces.d/eth2 @@ -0,0 +1,4 @@ +# eth cpu port +auto eth2 +iface eth2 inet +up ifconfig eth2 promisc mtu 9000 diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/configs/network/interfaces.d/usb0 b/platform/barefoot/sonic-platform-modules-bfn-newport/configs/network/interfaces.d/usb0 new file mode 100644 index 00000000000..f1dd054cc6f --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/configs/network/interfaces.d/usb0 @@ -0,0 +1,5 @@ +# BMC interface +auto usb0 +allow-hotplug usb0 +iface usb0 inet6 +up ifconfig usb0 txqueuelen 64 diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/configs/systemd/system/bfn-newport.service b/platform/barefoot/sonic-platform-modules-bfn-newport/configs/systemd/system/bfn-newport.service new file mode 100644 index 00000000000..9d6ca1271e8 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/configs/systemd/system/bfn-newport.service @@ -0,0 +1,14 @@ +[Unit] +Description=Barefoot Newport FPGA driver +Before=syncd.service + +[Service] +User=root +ExecStartPre=/sbin/depmod -a +ExecStart=/sbin/modprobe bf_fpga +ExecStartPost=/sbin/modprobe bf_tun +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target + diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/changelog b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/changelog new file mode 100644 index 00000000000..98ecad42ac9 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/changelog @@ -0,0 +1,5 @@ +sonic-platform-modules-bfn-newport (1.0) unstable; urgency=low + + * Initial release + + -- Support Mon, 27 Sep 2019 18:00:00 -0800 diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/compat b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/compat new file mode 100644 index 00000000000..45a4fb75db8 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/compat @@ -0,0 +1 @@ +8 diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control new file mode 100644 index 00000000000..edbc5b890c5 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control @@ -0,0 +1,12 @@ +Source: sonic-platform-modules-bfn-newport +Section: main +Priority: extra +Maintainer: Support +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: sonic-platform-modules-bfn-newport +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel module for bfn platform fpga and scripts for the devices such as fan, led, sfp + diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/copyright b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/copyright new file mode 100644 index 00000000000..ade42b7aa75 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/copyright @@ -0,0 +1,15 @@ +Provides linux kernel driver for BF PCIe devices + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/install b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/install new file mode 100644 index 00000000000..7cb6ed7fe33 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/install @@ -0,0 +1 @@ +configs/systemd/system/bfn-newport.service etc/systemd/system diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/postinst b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/postinst new file mode 100644 index 00000000000..a89ac4f4f5b --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/postinst @@ -0,0 +1,6 @@ +#!/bin/sh +set -e +depmod -a +systemctl enable bfn-newport.service +systemctl start bfn-newport.service +#DEBHELPER# diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/rules b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/rules new file mode 100755 index 00000000000..951069a6016 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/rules @@ -0,0 +1,35 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +PACKAGE_NAME := sonic-platform-modules-bfn-newport +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MODULE_SRC := $(shell pwd)/modules +SCRIPT_SRC := $(shell pwd)/scripts +CONFIGS_SRC := $(shell pwd)/configs + +%: + dh $@ + +override_dh_auto_build: + make -C $(KERNEL_SRC)/build M=$(MODULE_SRC) + +override_dh_auto_install: + dh_installdirs -p$(PACKAGE_NAME) $(KERNEL_SRC)/$(INSTALL_MOD_DIR) + cp $(MODULE_SRC)/*.ko debian/$(PACKAGE_NAME)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) + dh_installdirs -p$(PACKAGE_NAME) usr/local/bin + cp -r $(SCRIPT_SRC)/* debian/$(PACKAGE_NAME)/usr/local/bin + dh_installdirs -p$(PACKAGE_NAME) etc/network/interfaces.d/ + cp -r $(CONFIGS_SRC)/network/interfaces.d/* debian/$(PACKAGE_NAME)/etc/network/interfaces.d/ + +override_dh_usrlocal: + +override_dh_pysupport: + +override_dh_clean: + dh_clean + rm -f $(MODULE_SRC)/*.o $(MODULE_SRC)/*.ko $(MODULE_SRC)/*.mod.c $(MODULE_SRC)/.*.cmd + rm -f $(MODULE_SRC)/Module.markers $(MODULE_SRC)/Module.symvers $(MODULE_SRC)/modules.order + rm -rf $(MODULE_SRC)/.tmp_versions + diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/modules/Makefile b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/Makefile new file mode 100644 index 00000000000..732ffb1f3f6 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := bf_fpga.o +bf_fpga-y := bf_fpga_main.o bf_fpga_ioctl.o bf_fpga_sysfs.o i2c/bf_fpga_i2c.o i2c/bf_fpga_i2c_ctrl.o i2c/bf_fpga_i2c_porting.o diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_ioctl.c b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_ioctl.c new file mode 100644 index 00000000000..b0792556caf --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_ioctl.c @@ -0,0 +1,196 @@ +/******************************************************************************* + Barefoot Networks FPGA Linux driver + Copyright(c) 2018 - 2019 Barefoot Networks, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms and conditions of the GNU General Public License, + version 2, as published by the Free Software Foundation. + + This program is distributed in the hope it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + + The full GNU General Public License is included in this distribution in + the file called "COPYING". + + Contact Information: + info@barefootnetworks.com + Barefoot Networks, 4750 Patrick Henry Drive, Santa Clara CA 95054 + +*******************************************************************************/ +#include +#include +#include +#include +#include +#include +#include "bf_fpga_priv.h" +#include "bf_fpga_ioctl.h" +#include "i2c/bf_fpga_i2c.h" + +int bf_fpga_ioctl(struct bf_pci_dev *bfdev, + unsigned int cmd, + unsigned long arg) { + void *addr = (void __user *)arg; + int ret = -1; + + if (!bfdev || !addr) { + return -EFAULT; + } + + switch (cmd) { + case BF_FPGA_IOCTL_I2C_CTL: { + bf_fpga_i2c_ctl_t i2c_ctl; + bool busy; + + if (copy_from_user(&i2c_ctl, addr, sizeof(bf_fpga_i2c_ctl_t))) { + return -EFAULT; + } + switch (i2c_ctl.control_type) { + case BF_FPGA_I2C_START: + ret = fpga_i2c_start(i2c_ctl.inst_hndl.bus_id); + break; + case BF_FPGA_I2C_STOP: + ret = fpga_i2c_stop(i2c_ctl.inst_hndl.bus_id); + break; + case BF_FPGA_I2C_RESET: + ret = fpga_i2c_reset(i2c_ctl.inst_hndl.bus_id); + break; + case BF_FPGA_I2C_BUSY: + ret = fpga_i2c_is_busy(i2c_ctl.inst_hndl.bus_id, &busy); + if (ret == 0) { + if (copy_to_user(&(((bf_fpga_i2c_ctl_t *)addr)->is_busy), + &busy, + sizeof(busy))) { + return -EFAULT; + } + } + break; + case BF_FPGA_I2C_INST_EN: + ret = fpga_i2c_inst_en( + i2c_ctl.inst_hndl.bus_id, i2c_ctl.inst_hndl.inst_id, true); + break; + case BF_FPGA_I2C_INST_DIS: + ret = fpga_i2c_inst_en( + i2c_ctl.inst_hndl.bus_id, i2c_ctl.inst_hndl.inst_id, false); + break; + case BF_FPGA_I2C_INST_PMT: + break; + case BF_FPGA_I2C_INST_STOP_ON_ERR: + break; + case BF_FPGA_I2C_INST_INT_EN: + break; + default: + break; + } + break; + } + case BF_FPGA_IOCTL_I2C_SET_CLK: { + bf_fpga_i2c_set_clk_t i2c_clk; + if (copy_from_user(&i2c_clk, addr, sizeof(bf_fpga_i2c_set_clk_t))) { + return -EFAULT; + } + ret = fpga_i2c_set_clk(i2c_clk.bus_id, i2c_clk.clock_div); + break; + } + case BF_FPGA_IOCTL_I2C_ONETIME: { + bf_fpga_i2c_t i2c_op; + int i; + + if (copy_from_user(&i2c_op, addr, sizeof(bf_fpga_i2c_t))) { + return -EFAULT; + } + ret = fpga_i2c_oneshot(&i2c_op); + if (ret == 0) { + /* copy read data to user area */ + for (i = 0; i < i2c_op.num_i2c; i++) { + if (i2c_op.i2c_inst[i].rd_cnt) { + if (copy_to_user(&(((bf_fpga_i2c_t *)addr)->i2c_inst[i].rd_buf), + &i2c_op.i2c_inst[i].rd_buf, + i2c_op.i2c_inst[i].rd_cnt)) { + return -EFAULT; + } + } + } + } else { + printk(KERN_ERR + "fpga i2c ioctl oneshot bus %d error %d i2c_addr 0x%hhx:0x%hhx " + "i2c_status 0x%hhx:0x%hhx\n", + i2c_op.inst_hndl.bus_id, + ret, + i2c_op.i2c_inst[0].i2c_addr, + i2c_op.i2c_inst[1].i2c_addr, + i2c_op.i2c_inst[0].status, + i2c_op.i2c_inst[1].status); + } + break; + } + case BF_FPGA_IOCTL_I2C_ADD_PR: { + bf_fpga_i2c_t i2c_op; + if (copy_from_user(&i2c_op, addr, sizeof(bf_fpga_i2c_t))) { + return -EFAULT; + } + ret = fpga_i2c_pr_add(&i2c_op); + if (ret == 0) { + /* copy read data to user area */ + if (copy_to_user(&((bf_fpga_i2c_t *)addr)->inst_hndl.inst_id, + &i2c_op.inst_hndl.inst_id, + sizeof(i2c_op.inst_hndl.inst_id))) { + return -EFAULT; + } + } else { + printk(KERN_ERR "fpga i2c ioctl add-pr error %d on bus %d\n", + ret, + i2c_op.inst_hndl.bus_id); + } + break; + } + case BF_FPGA_IOCTL_I2C_DEL_PR: { + bf_fpga_i2c_t i2c_op; + if (copy_from_user(&i2c_op, addr, sizeof(bf_fpga_i2c_t))) { + return -EFAULT; + } + ret = fpga_i2c_del(&i2c_op); + if (ret != 0) { + printk(KERN_ERR "fpga i2c ioctl del-pr error %d on bus %d\n", + ret, + i2c_op.inst_hndl.bus_id); + } + break; + } + case BF_FPGA_IOCTL_I2C_RD_DATA: { + bf_fpga_i2c_rd_data_t i2c_rd_data; + /* get user supplied offset and rd_cnt */ + if (copy_from_user( + &i2c_rd_data, addr, offsetof(bf_fpga_i2c_rd_data_t, rd_buf))) { + return -EFAULT; + } + ret = fpga_i2c_data_read(i2c_rd_data.inst_hndl.bus_id, + i2c_rd_data.inst_hndl.inst_id, + i2c_rd_data.offset, + i2c_rd_data.rd_cnt, + i2c_rd_data.rd_buf); + if (ret == 0) { + if (copy_to_user(&(((bf_fpga_i2c_rd_data_t *)addr)->rd_buf), + &i2c_rd_data.rd_buf, + i2c_rd_data.rd_cnt)) { + return -EFAULT; + } + } else { + printk(KERN_ERR "fpga i2c ioctl rd-data error %d on bus %d inst %d\n", + ret, + i2c_rd_data.inst_hndl.bus_id, + i2c_rd_data.inst_hndl.inst_id); + } + break; + } + default: + return -EINVAL; + } + return ret; +} diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_ioctl.h b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_ioctl.h new file mode 100644 index 00000000000..4c5eb7bf038 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_ioctl.h @@ -0,0 +1,131 @@ +/******************************************************************************* + Barefoot Networks FPGA Linux driver + Copyright(c) 2018 - 2019 Barefoot Networks, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms and conditions of the GNU General Public License, + version 2, as published by the Free Software Foundation. + + This program is distributed in the hope it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + + The full GNU General Public License is included in this distribution in + the file called "COPYING". + + Contact Information: + info@barefootnetworks.com + Barefoot Networks, 4750 Patrick Henry Drive, Santa Clara CA 95054 + +*******************************************************************************/ +#ifndef _BF_FPGA_IOCTL_H_ +#define _BF_FPGA_IOCTL_H_ + +#ifdef __KERNEL__ +#include +#else +#include + +#endif /* __KERNEL__ */ + +#define BF_FPGA_IOC_MAGIC 'f' +#define BF_I2C_FPGA_NUM_CTRL 34 +#define BF_FPGA_MAX_I2C_RD_DATA 128 +#define BF_FPGA_MAX_I2C_WR_DATA 129 + +/* i2c control types */ +#define BF_FPGA_I2C_START 1 +#define BF_FPGA_I2C_STOP 2 +#define BF_FPGA_I2C_BUSY 3 +#define BF_FPGA_I2C_INST_EN 4 +#define BF_FPGA_I2C_INST_DIS 5 +#define BF_FPGA_I2C_INST_PMT 6 +#define BF_FPGA_I2C_INST_STOP_ON_ERR 7 +#define BF_FPGA_I2C_INST_INT_EN 8 +#define BF_FPGA_I2C_RESET 9 + +/* i2c operation types */ +#define BF_FPGA_I2C_NOP 0 +#define BF_FPGA_I2C_WRITE \ + 1 /* / ..[max 129 bytes] */ +#define BF_FPGA_I2C_READ \ + 2 /* / ..[max 128 bytes] */ +#define BF_FPGA_I2C_ADDR_READ \ + 3 /* / / \ + */ + +#define FPGA_I2c_ONESHOT_BEGIN_INDEX 0 +#define FPGA_I2C_ONESHOT_NUM_INST 15 +#define FPGA_I2C_PERIODIC_BEGIN_INDEX (FPGA_I2C_ONESHOT_NUM_INST) +#define FPGA_I2C_PERIODIC_NUM_INST 16 +#define FPGA_I2C_NUM_INST \ + (FPGA_I2C_ONESHOT_NUM_INST + FPGA_I2C_PERIODIC_NUM_INST) +/* maximum i2c instructions that can be handled in one system call */ +#define BF_FPGA_I2C_MAX_NUM_INST 3 + +typedef struct bf_fpga_i2c_set_clk_s { + /* 0:100k, 1:400k, 2:1M, or: 125e6//3 */ + int clock_div; /* clock divider */ + unsigned char bus_id; /* controller index */ +} bf_fpga_i2c_set_clk_t; + +typedef struct bf_fpga_inst_hndl_s { + int inst_id; /* instruction index within the controller memory space */ + unsigned char bus_id; /* controller index */ + unsigned char status; +} bf_fpga_inst_hndl_t; + +typedef struct bf_fpga_i2c_inst_s { + bool preemt; + bool en; + unsigned char i2c_addr; /* i2c device address in 7 bit format */ + unsigned char i2c_type; /* type of i2c cycle */ + unsigned char delay; /* delay in TBD - microseconds before i2c transaction */ + unsigned char ctrl; + unsigned char wr_cnt; /* number of bytes to write (after i2c address) */ + unsigned char rd_cnt; /* number of bytes to read */ + union { + unsigned char + wr_buf[BF_FPGA_MAX_I2C_WR_DATA]; /* write data source buffer */ + unsigned char rd_buf[BF_FPGA_MAX_I2C_RD_DATA]; /* read data dest buffer */ + }; + unsigned char status; + unsigned char retry_cnt; /* if fpga maintains retry count */ + unsigned char mux; /* if fpga maintains internal MUX */ +} bf_fpga_i2c_inst_t; + +typedef struct bf_fpga_i2c_s { + unsigned char num_i2c; /* number of i2c operations */ + unsigned char one_time; /* one time or periodic */ + bf_fpga_inst_hndl_t inst_hndl; + bf_fpga_i2c_inst_t i2c_inst[BF_FPGA_I2C_MAX_NUM_INST]; +} bf_fpga_i2c_t; + +typedef struct bf_fpga_i2c_rd_data_s { + bf_fpga_inst_hndl_t inst_hndl; + unsigned char offset; + unsigned char rd_cnt; + unsigned char rd_buf[BF_FPGA_MAX_I2C_RD_DATA]; +} bf_fpga_i2c_rd_data_t; + +typedef struct bf_fpga_i2c_ctl_s { + bf_fpga_inst_hndl_t inst_hndl; + unsigned char control_type; /* start, stop, reset, enable, disable or busy */ + bool is_busy; +} bf_fpga_i2c_ctl_t; + +#define BF_FPGA_IOCTL_I2C_CTL _IOWR(BF_FPGA_IOC_MAGIC, 0, bf_fpga_i2c_ctl_t) +#define BF_FPGA_IOCTL_I2C_ONETIME _IOWR(BF_FPGA_IOC_MAGIC, 1, bf_fpga_i2c_t) +#define BF_FPGA_IOCTL_I2C_ADD_PR _IOWR(BF_FPGA_IOC_MAGIC, 2, bf_fpga_i2c_t) +#define BF_FPGA_IOCTL_I2C_DEL_PR _IOWR(BF_FPGA_IOC_MAGIC, 3, bf_fpga_i2c_t) +#define BF_FPGA_IOCTL_I2C_RD_DATA \ + _IOWR(BF_FPGA_IOC_MAGIC, 4, bf_fpga_i2c_rd_data_t) +#define BF_FPGA_IOCTL_I2C_SET_CLK \ + _IOW(BF_FPGA_IOC_MAGIC, 5, bf_fpga_i2c_set_clk_t) + +#endif /* _BF_FPGA_IOCTL_H_ */ diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_main.c b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_main.c new file mode 100644 index 00000000000..563cc5120df --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_main.c @@ -0,0 +1,1294 @@ +/******************************************************************************* + Barefoot Networks FPGA Linux driver + Copyright(c) 2018 - 2019 Barefoot Networks, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms and conditions of the GNU General Public License, + version 2, as published by the Free Software Foundation. + + This program is distributed in the hope it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + + The full GNU General Public License is included in this distribution in + the file called "COPYING". + + Contact Information: + info@barefootnetworks.com + Barefoot Networks, 4750 Patrick Henry Drive, Santa Clara CA 95054 + +*******************************************************************************/ +/* bf_fpga kernel module + * + * This is kernel mode driver for BF FPGA chip. + * Provides user space mmap service and user space "wait for interrupt", + * "enable interrupt" and i2c services + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "bf_fpga_ioctl.h" + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0) +#include +#else +#include +#endif +#include +#include +#include +#include "bf_fpga_priv.h" +#include "i2c/bf_fpga_i2c_reg.h" +#include "i2c/bf_fpga_i2c.h" + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 16, 0) +//#error unsupported linux kernel version +#endif + +/* TBD: Need to build with CONFIG_PCI_MSI */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0) +#if defined(RHEL_RELEASE_CODE) +#else +extern int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec); +#endif /* defined(RHEL_RELEASE_CODE) */ +extern int pci_enable_msix(struct pci_dev *dev, + struct msix_entry *entries, + int nvec); +#else +extern int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec); +extern int pci_enable_msix_range(struct pci_dev *dev, + struct msix_entry *entries, + int minvec, + int maxvec); +#endif + +/* Keep any global information here that must survive even after the + * bf_pci_dev is free-ed up. + */ +struct bf_global { + struct bf_pci_dev *bfdev; + struct cdev *bf_cdev; + struct fasync_struct *async_queue; +}; + +static int bf_major; +static int bf_minor[BF_FPGA_MAX_DEVICE_CNT] = {0}; +static struct class *bf_class = NULL; +static char *intr_mode = NULL; + +static enum bf_intr_mode bf_intr_mode_default = BF_INTR_MODE_NONE; +static spinlock_t bf_nonisr_lock; + +/* dev->minor should index into this array */ +static struct bf_global bf_global[BF_FPGA_MAX_DEVICE_CNT]; + +static void bf_add_listener(struct bf_pci_dev *bfdev, + struct bf_listener *listener) { + struct bf_listener **cur_listener = &bfdev->listener_head; + + if (!listener) { + return; + } + spin_lock(&bf_nonisr_lock); + + while (*cur_listener) { + cur_listener = &((*cur_listener)->next); + } + *cur_listener = listener; + listener->next = NULL; + + spin_unlock(&bf_nonisr_lock); +} + +static void bf_remove_listener(struct bf_pci_dev *bfdev, + struct bf_listener *listener) { + struct bf_listener **cur_listener = &bfdev->listener_head; + + /* in case of certain error conditions, this function might be called after + * bf_pci_remove() + */ + if (!bfdev || !listener) { + return; + } + spin_lock(&bf_nonisr_lock); + + if (*cur_listener == listener) { + *cur_listener = listener->next; + } else { + while (*cur_listener) { + if ((*cur_listener)->next == listener) { + (*cur_listener)->next = listener->next; + break; + } + cur_listener = &((*cur_listener)->next); + } + listener->next = NULL; + } + + spin_unlock(&bf_nonisr_lock); +} + +/* a pool of minor numbers is maintained */ +/* return the first available minor number */ +static int bf_get_next_minor_no(int *minor) { + int i; + + spin_lock(&bf_nonisr_lock); + for (i = 0; i < BF_FPGA_MAX_DEVICE_CNT; i++) { + if (bf_minor[i] == 0) { + *minor = i; + bf_minor[i] = 1; /* mark it as taken */ + spin_unlock(&bf_nonisr_lock); + return 0; + } + } + *minor = -1; + spin_unlock(&bf_nonisr_lock); + return -1; +} + +/* return a minor number back to the pool for recycling */ +static int bf_return_minor_no(int minor) { + int err; + + spin_lock(&bf_nonisr_lock); + if (bf_minor[minor] == 0) { /* was already returned */ + err = -1; /* don't change anything, but return error */ + } else { + bf_minor[minor] = 0; /* mark it as available */ + err = 0; + } + spin_unlock(&bf_nonisr_lock); + return err; +} + +static inline struct bf_pci_dev *bf_get_pci_dev(struct bf_dev_info *info) { + return container_of(info, struct bf_pci_dev, info); +} + +/* + * It masks the msix on/off of generating MSI-X messages. + */ +static void bf_msix_mask_irq(struct msi_desc *desc, int32_t state) { + u32 mask_bits = desc->masked; + unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + + PCI_MSIX_ENTRY_VECTOR_CTRL; + + if (state != 0) { + mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; + } else { + mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT; + } + + if (mask_bits != desc->masked) { + writel(mask_bits, desc->mask_base + offset); + readl(desc->mask_base); + desc->masked = mask_bits; + } +} + +/** + * irqcontrol can be used to disable/enable interrupt from user space processes. + * + * @param bf_dev + * pointer to bf_pci_dev + * @param irq_state + * state value. 1 to enable interrupt, 0 to disable interrupt. + * + * @return + * - On success, 0. + * - On failure, a negative value. + */ +static int bf_pci_irqcontrol(struct bf_pci_dev *bfdev, s32 irq_state) { + struct pci_dev *pdev = bfdev->pdev; + + pci_cfg_access_lock(pdev); + if (bfdev->mode == BF_INTR_MODE_LEGACY) { + pci_intx(pdev, !!irq_state); + } else if (bfdev->mode == BF_INTR_MODE_MSIX) { + struct msi_desc *desc; +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 2, 0) + list_for_each_entry(desc, &pdev->msi_list, list) + bf_msix_mask_irq(desc, irq_state); +#else + for_each_pci_msi_entry(desc, pdev) bf_msix_mask_irq(desc, irq_state); +#endif + } + pci_cfg_access_unlock(pdev); + + return 0; +} + +/** + * interrupt handler which will check if the interrupt is from the right + * device. If so, disable it here and will be enabled later. + */ +static irqreturn_t bf_pci_irqhandler(int irq, struct bf_pci_dev *bfdev) { + /* Legacy mode need to mask in hardware */ + if (bfdev->mode == BF_INTR_MODE_LEGACY && + !pci_check_and_mask_intx(bfdev->pdev)) { + return IRQ_NONE; + } + + /* NOTE : if bfdev->info.pci_error_state == 1, then do not access the + * device and return IRQ_NOTHANDLED. + */ + return IRQ_HANDLED; +} + +/* Remap pci resources described by bar #pci_bar */ +static int bf_pci_setup_iomem(struct pci_dev *dev, + struct bf_dev_info *info, + int n, + int pci_bar, + const char *name) { + unsigned long addr, len; + void *internal_addr; + + if (sizeof(info->mem) / sizeof(info->mem[0]) <= n) { + return -EINVAL; + } + + addr = pci_resource_start(dev, pci_bar); + len = pci_resource_len(dev, pci_bar); + if (addr == 0 || len == 0) { + return -1; + } + internal_addr = pci_ioremap_bar(dev, pci_bar); + if (internal_addr == NULL) { + return -1; + } + info->mem[n].name = name; + info->mem[n].addr = addr; + info->mem[n].internal_addr = internal_addr; + info->mem[n].size = len; + return 0; +} + +/* Unmap previously ioremap'd resources */ +static void bf_pci_release_iomem(struct bf_dev_info *info) { + int i; + + for (i = 0; i < BF_MAX_BAR_MAPS; i++) { + if (info->mem[i].internal_addr) { + iounmap(info->mem[i].internal_addr); + } + } +} + +static int bf_setup_bars(struct pci_dev *dev, struct bf_dev_info *info) { + int i, iom, ret; + unsigned long flags; + static const char *bar_names[BF_MAX_BAR_MAPS] = { + "BAR0", "BAR1", "BAR2", "BAR3", "BAR4", "BAR5", + }; + + iom = 0; + + for (i = 0; i < BF_MAX_BAR_MAPS; i++) { + if (pci_resource_len(dev, i) != 0 && pci_resource_start(dev, i) != 0) { + flags = pci_resource_flags(dev, i); + if (flags & IORESOURCE_MEM) { + ret = bf_pci_setup_iomem(dev, info, iom, i, bar_names[i]); + if (ret != 0) { + return ret; + } + iom++; + } + } + } + return (iom != 0) ? ret : -ENOENT; +} + +static irqreturn_t bf_interrupt(int irq, void *bfdev_id) { + struct bf_pci_dev *bfdev = ((struct bf_int_vector *)bfdev_id)->bf_dev; + int vect_off = ((struct bf_int_vector *)bfdev_id)->int_vec_offset; + + irqreturn_t ret = bf_pci_irqhandler(irq, bfdev); + + if (ret == IRQ_HANDLED) { + atomic_inc(&(bfdev->info.event[vect_off])); + } + return ret; +} + +static unsigned int bf_poll(struct file *filep, poll_table *wait) { + struct bf_listener *listener = (struct bf_listener *)filep->private_data; + struct bf_pci_dev *bfdev = listener->bfdev; + int i; + + if (!bfdev) { + return -ENODEV; + } + if (!bfdev->info.irq) { + return -EIO; + } + + poll_wait(filep, &bfdev->info.wait, wait); + + for (i = 0; i < BF_MSIX_ENTRY_CNT; i++) { + if (listener->event_count[i] != atomic_read(&bfdev->info.event[i])) { + return POLLIN | POLLRDNORM; + } + } + return 0; +} + +static int bf_find_mem_index(struct vm_area_struct *vma) { + struct bf_pci_dev *bfdev = vma->vm_private_data; + if (vma->vm_pgoff < BF_MAX_BAR_MAPS) { + if (bfdev->info.mem[vma->vm_pgoff].size == 0) { + return -1; + } + return (int)vma->vm_pgoff; + } + return -1; +} + +static const struct vm_operations_struct bf_physical_vm_ops = { +#ifdef CONFIG_HAVE_IOREMAP_PROT + .access = generic_access_phys, +#endif +}; + +static int bf_mmap_physical(struct vm_area_struct *vma) { + struct bf_pci_dev *bfdev = vma->vm_private_data; + int bar = bf_find_mem_index(vma); + struct bf_dev_mem *mem; + if (bar < 0) { + return -EINVAL; + } + + mem = bfdev->info.mem + bar; + + if (mem->addr & ~PAGE_MASK) { + return -ENODEV; + } + if (vma->vm_end - vma->vm_start > mem->size) { + return -EINVAL; + } + + vma->vm_ops = &bf_physical_vm_ops; + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + /* + * We cannot use the vm_iomap_memory() helper here, + * because vma->vm_pgoff is the map index we looked + * up above in bf_find_mem_index(), rather than an + * actual page offset into the mmap. + * + * So we just do the physical mmap without a page + * offset. + */ + return remap_pfn_range(vma, + vma->vm_start, + mem->addr >> PAGE_SHIFT, + vma->vm_end - vma->vm_start, + vma->vm_page_prot); +} + +static int bf_mmap(struct file *filep, struct vm_area_struct *vma) { + struct bf_listener *listener = filep->private_data; + struct bf_pci_dev *bfdev = listener->bfdev; + int bar; + unsigned long requested_pages, actual_pages; + + if (!bfdev) { + return -ENODEV; + } + if (vma->vm_end < vma->vm_start) { + return -EINVAL; + } + + vma->vm_private_data = bfdev; + + bar = bf_find_mem_index(vma); + if (bar < 0) { + return -EINVAL; + } + + requested_pages = vma_pages(vma); + actual_pages = ((bfdev->info.mem[bar].addr & ~PAGE_MASK) + + bfdev->info.mem[bar].size + PAGE_SIZE - 1) >> + PAGE_SHIFT; + if (requested_pages > actual_pages) { + return -EINVAL; + } + + return bf_mmap_physical(vma); +} + +static int bf_fasync(int fd, struct file *filep, int mode) { + int minor; + + if (!filep->private_data) { + return (-EINVAL); + } + minor = ((struct bf_listener *)filep->private_data)->minor; + if (minor >= BF_FPGA_MAX_DEVICE_CNT) { + return (-EINVAL); + } + if (mode == 0 && &bf_global[minor].async_queue == NULL) { + return 0; /* nothing to do */ + } + return (fasync_helper(fd, filep, mode, &bf_global[minor].async_queue)); +} + +static int bf_open(struct inode *inode, struct file *filep) { + struct bf_pci_dev *bfdev; + struct bf_listener *listener; + int i; + + bfdev = bf_global[iminor(inode)].bfdev; + listener = kmalloc(sizeof(*listener), GFP_KERNEL); + if (listener) { + listener->bfdev = bfdev; + listener->minor = bfdev->info.minor; + listener->next = NULL; + bf_add_listener(bfdev, listener); + for (i = 0; i < BF_MSIX_ENTRY_CNT; i++) { + listener->event_count[i] = atomic_read(&bfdev->info.event[i]); + } + filep->private_data = listener; + return 0; + } else { + return (-ENOMEM); + } +} + +static int bf_release(struct inode *inode, struct file *filep) { + struct bf_listener *listener = filep->private_data; + + bf_fasync(-1, filep, 0); /* empty any process id in the notification list */ + if (listener->bfdev) { + bf_remove_listener(listener->bfdev, listener); + } + kfree(listener); + return 0; +} + +/* user space support: make read() system call after poll() of select() */ +static ssize_t bf_read(struct file *filep, + char __user *buf, + size_t count, + loff_t *ppos) { + struct bf_listener *listener = filep->private_data; + struct bf_pci_dev *bfdev = listener->bfdev; + int retval, event_count[BF_MSIX_ENTRY_CNT]; + int i, mismatch_found = 0; /* OR of per vector mismatch */ + unsigned char cnt_match[BF_MSIX_ENTRY_CNT]; /* per vector mismatch */ + + if (!bfdev) { + return -ENODEV; + } + /* irq must be setup for read() to work */ + if (!bfdev->info.irq) { + return -EIO; + } + + /* ensure that there is enough space on user buffer for the given interrupt + * mode */ + if (bfdev->mode == BF_INTR_MODE_MSIX) { + if (count < sizeof(s32) * BF_MSIX_ENTRY_CNT) { + return -EINVAL; + } + count = sizeof(s32) * BF_MSIX_ENTRY_CNT; + } else if (bfdev->mode == BF_INTR_MODE_MSI) { + if (count < sizeof(s32) * BF_MSI_ENTRY_CNT) { + return -EINVAL; + } + count = sizeof(s32) * BF_MSI_ENTRY_CNT; + } else { + if (count < sizeof(s32)) { + return -EINVAL; + } + count = sizeof(s32); + } + + do { + set_current_state(TASK_INTERRUPTIBLE); + + for (i = 0; i < (count / sizeof(s32)); i++) { + event_count[i] = atomic_read(&(bfdev->info.event[i])); + if (event_count[i] != listener->event_count[i]) { + mismatch_found |= 1; + cnt_match[i] = 1; + } else { + event_count[i] = 0; + cnt_match[i] = 0; + } + } + if (mismatch_found) { + __set_current_state(TASK_RUNNING); + if (copy_to_user(buf, &event_count, count)) { + retval = -EFAULT; + } else { /* adjust the listener->event_count; */ + for (i = 0; i < (count / sizeof(s32)); i++) { + if (cnt_match[i]) { + listener->event_count[i] = event_count[i]; + } + } + retval = count; + } + break; + } + + if (filep->f_flags & O_NONBLOCK) { + retval = -EAGAIN; + break; + } + + if (signal_pending(current)) { + retval = -ERESTARTSYS; + break; + } + schedule(); + } while (1); + + __set_current_state(TASK_RUNNING); + + return retval; +} + +/* user space is supposed to call this after it is done with interrupt + * processing + */ +static ssize_t bf_write(struct file *filep, + const char __user *buf, + size_t count, + loff_t *ppos) { + struct bf_listener *listener = filep->private_data; + struct bf_pci_dev *bfdev = listener->bfdev; + ssize_t ret; + s32 int_en; + + if (!bfdev || !bfdev->info.irq) { + return -EIO; + } + + if (count != sizeof(s32)) { + return -EINVAL; + } + + if (copy_from_user(&int_en, buf, count)) { + return -EFAULT; + } + + /* clear pci_error_state */ + bfdev->info.pci_error_state = 0; + + ret = bf_pci_irqcontrol(bfdev, int_en); + + return ret ? ret : sizeof(s32); +} + +static long bf_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) { + struct bf_listener *listener = filep->private_data; + struct bf_pci_dev *bfdev = listener->bfdev; + + return (bf_fpga_ioctl(bfdev, cmd, arg)); +} + +static const struct file_operations bf_fops = { + .owner = THIS_MODULE, + .open = bf_open, + .release = bf_release, + .unlocked_ioctl = bf_ioctl, + .read = bf_read, + .write = bf_write, + .mmap = bf_mmap, + .poll = bf_poll, + .fasync = bf_fasync, +}; + +static int bf_major_init(struct bf_pci_dev *bfdev, int minor) { + struct cdev *cdev; + static const char name[] = "bf_fpga"; + dev_t bf_dev = 0; + int result; + + result = alloc_chrdev_region(&bf_dev, 0, BF_FPGA_MAX_DEVICE_CNT, name); + if (result) { + return result; + } + + result = -ENOMEM; + cdev = cdev_alloc(); + if (!cdev) { + goto fail_dev_add; + } + cdev->ops = &bf_fops; + cdev->owner = THIS_MODULE; + kobject_set_name(&cdev->kobj, "%s", name); + result = cdev_add(cdev, bf_dev, BF_FPGA_MAX_DEVICE_CNT); + + if (result) { + goto fail_dev_add; + } + + bf_major = MAJOR(bf_dev); + bf_global[minor].bf_cdev = cdev; + return 0; + +fail_dev_add: + unregister_chrdev_region(bf_dev, BF_FPGA_MAX_DEVICE_CNT); + return result; +} + +static void bf_major_cleanup(struct bf_pci_dev *bfdev, int minor) { + unregister_chrdev_region(MKDEV(bf_major, 0), BF_FPGA_MAX_DEVICE_CNT); + cdev_del(bf_global[minor].bf_cdev); +} + +static int bf_init_cdev(struct bf_pci_dev *bfdev, int minor) { + int ret; + ret = bf_major_init(bfdev, minor); + if (ret) return ret; + + bf_class = class_create(THIS_MODULE, BF_CLASS_NAME); + if (!bf_class) { + printk(KERN_ERR "create_class failed for bf_fpga_dev\n"); + ret = -ENODEV; + goto err_class_register; + } + return 0; + +err_class_register: + bf_major_cleanup(bfdev, minor); + return ret; +} + +static void bf_remove_cdev(struct bf_pci_dev *bfdev) { + class_destroy(bf_class); + bf_major_cleanup(bfdev, bfdev->info.minor); +} + +/** + * bf_register_device - register a new userspace mem device + * @parent: parent device + * @bfdev: bf pci device + * + * returns zero on success or a negative error code. + */ +int bf_register_device(struct device *parent, struct bf_pci_dev *bfdev) { + struct bf_dev_info *info = &bfdev->info; + int i, j, ret = 0; + int minor; + + if (!parent || !info || !info->version) { + return -EINVAL; + } + + init_waitqueue_head(&info->wait); + + for (i = 0; i < BF_MSIX_ENTRY_CNT; i++) { + atomic_set(&info->event[i], 0); + } + + if (bf_get_next_minor_no(&minor)) { + return -EINVAL; + } + + ret = bf_init_cdev(bfdev, minor); + if (ret) { + printk(KERN_ERR "BFi_FPGA: device cdev creation failed\n"); + return ret; + } + + info->dev = device_create( + bf_class, parent, MKDEV(bf_major, minor), bfdev, "bf_fpga_%d", minor); + if (!info->dev) { + printk(KERN_ERR "BF_FPGA: device creation failed\n"); + return -ENODEV; + } + + info->minor = minor; + + /* bind ISRs and request interrupts */ + if (info->irq && (bfdev->mode != BF_INTR_MODE_NONE)) { + /* + * Note that we deliberately don't use devm_request_irq + * here. The parent module can unregister the UIO device + * and call pci_disable_msi, which requires that this + * irq has been freed. However, the device may have open + * FDs at the time of unregister and therefore may not be + * freed until they are released. + */ + if (bfdev->mode == BF_INTR_MODE_LEGACY) { + ret = request_irq(info->irq, + bf_interrupt, + info->irq_flags, + bfdev->name, + (void *)&(bfdev->bf_int_vec[0])); + if (ret) { + printk(KERN_ERR "bf_fpga failed to request legacy irq %ld error %d\n", + info->irq, + ret); + return ret; + } + printk(KERN_NOTICE "BF_FPGA allocating legacy int vector %ld\n", + info->irq); + } else if (bfdev->mode == BF_INTR_MODE_MSIX) { + for (i = 0; i < info->num_irq; i++) { + ret = request_irq(info->msix_entries[i].vector, + bf_interrupt, + info->irq_flags, + bfdev->name, + (void *)&(bfdev->bf_int_vec[i])); + if (ret) { + /* undo all other previous bindings */ + printk(KERN_ERR "bf_fpga failed to request MSIX ret %d itr %d\n", + ret, + i); + for (j = i - 1; j >= 0; j--) { + free_irq(info->msix_entries[j].vector, + (void *)&(bfdev->bf_int_vec[j])); + } + return ret; + } + } + printk(KERN_NOTICE "BF_FPGA allocating %d MSIx vectors from %ld\n", + info->num_irq, + info->irq); + } else if (bfdev->mode == BF_INTR_MODE_MSI) { + for (i = 0; i < info->num_irq; i++) { + ret = request_irq(info->irq + i, + bf_interrupt, + info->irq_flags, + bfdev->name, + (void *)&(bfdev->bf_int_vec[i])); + if (ret) { + /* undo all other previous bindings */ + printk( + KERN_ERR "bf_fpga failed to request MSI ret %d itr %d\n", ret, i); + for (j = i - 1; j >= 0; j--) { + free_irq(info->irq + j, (void *)&(bfdev->bf_int_vec[j])); + } + return ret; + } + } + printk(KERN_NOTICE "BF_FPGA allocating %d MSI vectors from %ld\n", + info->num_irq, + info->irq); + } + } + return 0; +} + +/** + * bf_unregister_device - register a new userspace mem device + * @bfdev: bf pci device + * + * returns none + */ +void bf_unregister_device(struct bf_pci_dev *bfdev) { + struct bf_dev_info *info = &bfdev->info; + int i; + + if (info->irq) { + if (bfdev->mode == BF_INTR_MODE_LEGACY) { + free_irq(info->irq, (void *)&(bfdev->bf_int_vec[0])); + } else if (bfdev->mode == BF_INTR_MODE_MSIX) { + for (i = 0; i < info->num_irq; i++) { + free_irq(info->msix_entries[i].vector, (void *)&(bfdev->bf_int_vec[i])); + } + } else if (bfdev->mode == BF_INTR_MODE_MSI) { + for (i = 0; i < info->num_irq; i++) { + free_irq(info->irq + i, (void *)&(bfdev->bf_int_vec[i])); + } + } + } + device_destroy(bf_class, MKDEV(bf_major, info->minor)); + bf_remove_cdev(bfdev); + bf_return_minor_no(info->minor); + return; +} + +static inline struct device *pci_dev_to_dev(struct pci_dev *pdev) { + return &pdev->dev; +} + +static void bf_fpga_disable_int_dma(struct bf_pci_dev *bfdev) { + u8 *bf_base_addr; + + /* maskinterrupts and DMA */ + bf_base_addr = (bfdev->info.mem[0].internal_addr); + /* return if called before mmap */ + if (!bf_base_addr) { + return; + } + /* mask interrupt at shadow level */ + /* TBD */ +} + +static void fpga_print_build_date(u32 build_date) { + char day, month, year, hr, min, sec; + + sec = (char)(build_date & 0x3f); + build_date >>= 6; + min = (char)(build_date & 0x3f); + build_date >>= 6; + hr = (char)(build_date & 0x1f); + build_date >>= 5; + year = (char)(build_date & 0x3f); + build_date >>= 6; + month = (char)(build_date & 0x0f); + build_date >>= 4; + day = (char)(build_date & 0x1f); + printk(KERN_ALERT "fpga version %02d/%02d/%2d %02d:%02d:%02d", + month, + day, + year, + hr, + min, + sec); +} + +static int bf_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { + struct bf_pci_dev *bfdev; + int err, pci_use_highmem; + int i, num_irq; + u32 build_date, build_ver; + + memset(bf_global, 0, sizeof(bf_global)); + + bfdev = kzalloc(sizeof(struct bf_pci_dev), GFP_KERNEL); + if (!bfdev) { + return -ENOMEM; + } + + /* init the cookies to be passed to ISRs */ + for (i = 0; i < BF_MSIX_ENTRY_CNT; i++) { + bfdev->bf_int_vec[i].int_vec_offset = i; + bfdev->bf_int_vec[i].bf_dev = bfdev; + } + + /* initialize intr_mode to none */ + bfdev->mode = BF_INTR_MODE_NONE; + + /* clear pci_error_state */ + bfdev->info.pci_error_state = 0; + + /* + * enable device + */ + err = pci_enable_device(pdev); + if (err != 0) { + printk(KERN_ERR "bf_fpga cannot enable PCI device\n"); + goto fail_free; + } + + /* + * reserve device's PCI memory regions for use by this + * module + */ + err = pci_request_regions(pdev, "bf_fpga_umem"); + if (err != 0) { + printk(KERN_ERR "bf_fpga Cannot request regions\n"); + goto fail_pci_disable; + } + /* remap IO memory */ + err = bf_setup_bars(pdev, &bfdev->info); + if (err != 0) { + printk(KERN_ERR "bf_fpga Cannot setup BARs\n"); + goto fail_release_iomem; + } + + if (!dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64)) && + !dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64))) { + pci_use_highmem = 1; + } else { + err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32)); + if (err) { + err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32)); + if (err) { + printk(KERN_ERR "bf_fpga no usable DMA configuration, aborting\n"); + goto fail_release_iomem; + } + } + pci_use_highmem = 0; + } + + /* enable pci error reporting */ + /* for the current kernel version, kernel config must have set the followings: + * CONFIG_PCIEPORTBUS=y and CONFIG_PCIEAER = y + * we have pci_error_handlers defined that gets invoked by kernel AER module + * upon detecting the pcie error on this device's addresses. + * However, there seems no way that AER would pass the offending addresses + * to the callback functions. AER logs the error messages on the console. + * This driver's calback function send the SIGIO signal to the user space + * to indicate the error condition. + */ + pci_enable_pcie_error_reporting(pdev); + + bf_fpga_disable_int_dma(bfdev); + + /* enable bus mastering on the device */ + pci_set_master(pdev); + + /* fill in bfdev info */ + bfdev->info.version = "0.1"; + bfdev->info.owner = THIS_MODULE; + bfdev->pdev = pdev; + + switch (bf_intr_mode_default) { +#ifdef CONFIG_PCI_MSI + case BF_INTR_MODE_MSIX: + /* Only 1 msi-x vector needed */ + bfdev->info.msix_entries = + kcalloc(BF_MSIX_ENTRY_CNT, sizeof(struct msix_entry), GFP_KERNEL); + if (!bfdev->info.msix_entries) { + err = -ENOMEM; + goto fail_clear_pci_master; + } + for (i = 0; i < BF_MSIX_ENTRY_CNT; i++) { + bfdev->info.msix_entries[i].entry = i; + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0) + num_irq = + pci_enable_msix(pdev, bfdev->info.msix_entries, BF_MSIX_ENTRY_CNT); + if (num_irq == 0) { + bfdev->info.num_irq = BF_MSIX_ENTRY_CNT; + bfdev->info.irq = bfdev->info.msix_entries[0].vector; + bfdev->mode = BF_INTR_MODE_MSIX; + printk(KERN_DEBUG "bf_fpga using %d MSIX irq from %ld\n", + num_irq, + bfdev->info.irq); + break; + } +#else + num_irq = pci_enable_msix_range( + pdev, bfdev->info.msix_entries, BF_MSIX_ENTRY_CNT, BF_MSIX_ENTRY_CNT); + if (num_irq == BF_MSIX_ENTRY_CNT) { + bfdev->info.num_irq = num_irq; + bfdev->info.irq = bfdev->info.msix_entries[0].vector; + bfdev->mode = BF_INTR_MODE_MSIX; + printk(KERN_DEBUG "bf_fpga using %d MSIX irq from %ld\n", + num_irq, + bfdev->info.irq); + break; + } else { + if (num_irq) pci_disable_msix(pdev); + kfree(bfdev->info.msix_entries); + bfdev->info.msix_entries = NULL; + printk(KERN_ERR + "bf_fpga error allocating MSIX vectors. Trying MSI...\n"); + /* and, fall back to MSI */ + } +#endif /* LINUX_VERSION_CODE */ + /* ** intentional no-break */ + case BF_INTR_MODE_MSI: +#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0) + num_irq = pci_enable_msi_block(pdev, BF_MSI_ENTRY_CNT); + /* we must get requested number of MSI vectors enabled */ + if (num_irq == 0) { + bfdev->info.num_irq = BF_MSI_ENTRY_CNT; + bfdev->info.irq = pdev->irq; + bfdev->mode = BF_INTR_MODE_MSI; + printk(KERN_DEBUG "bf_fpga using %d MSI irq from %ld\n", + bfdev->info.num_irq, + bfdev->info.irq); + break; + } +#elif LINUX_VERSION_CODE < KERNEL_VERSION(4, 10, 0) + num_irq = pci_enable_msi_range(pdev, BF_MSI_ENTRY_CNT, BF_MSI_ENTRY_CNT); + if (num_irq > 0) { + bfdev->info.num_irq = num_irq; + bfdev->info.irq = pdev->irq; + bfdev->mode = BF_INTR_MODE_MSI; + printk(KERN_DEBUG "bf_fpga using %d MSI irq from %ld\n", + bfdev->info.num_irq, + bfdev->info.irq); + break; + } +#else + num_irq = pci_alloc_irq_vectors_affinity(pdev, + BF_MSI_ENTRY_CNT, + BF_MSI_ENTRY_CNT, + PCI_IRQ_MSI | PCI_IRQ_AFFINITY, + NULL); + if (num_irq > 0) { + bfdev->info.num_irq = num_irq; + bfdev->info.irq = pci_irq_vector(pdev, 0); + bfdev->mode = BF_INTR_MODE_MSI; + printk(KERN_DEBUG "bf_fpga using %d MSI irq from %ld\n", + bfdev->info.num_irq, + bfdev->info.irq); + break; + } +#endif /* LINUX_VERSION_CODE */ +#endif /* CONFIG_PCI_MSI */ + /* fall back to Legacy Interrupt, intentional no-break */ + + case BF_INTR_MODE_LEGACY: + if (pci_intx_mask_supported(pdev)) { + bfdev->info.irq_flags = IRQF_SHARED; + bfdev->info.irq = pdev->irq; + bfdev->mode = BF_INTR_MODE_LEGACY; + printk(KERN_DEBUG "bf_fpga using LEGACY irq %ld\n", bfdev->info.irq); + break; + } + printk(KERN_NOTICE "bf_fpga PCI INTx mask not supported\n"); + /* fall back to no Interrupt, intentional no-break */ + case BF_INTR_MODE_NONE: + bfdev->info.irq = 0; + bfdev->info.num_irq = 0; + bfdev->mode = BF_INTR_MODE_NONE; + break; + + default: + printk(KERN_DEBUG "bf_fpga invalid IRQ mode %u", bf_intr_mode_default); + err = -EINVAL; + goto fail_clear_pci_master; + } + + pci_set_drvdata(pdev, bfdev); + sprintf(bfdev->name, "bf_fpga%d", bfdev->info.minor); + /* register bf driver */ + err = bf_register_device(&pdev->dev, bfdev); + if (err != 0) { + goto fail_release_irq; + } + + bf_global[bfdev->info.minor].async_queue = NULL; + bf_global[bfdev->info.minor].bfdev = bfdev; + + dev_info(&pdev->dev, + "bf_fpga device %d registered with irq %ld\n", + bfdev->instance, + bfdev->info.irq); + if (fpga_i2c_init(bfdev->info.mem[0].internal_addr)) { + printk(KERN_ERR "bf_fpga i2c initialization failed\n"); + goto fail_register_device; + } + if (bf_fpga_sysfs_add(bfdev)) { + printk(KERN_ERR "bf_fpga stsfs initialization failed\n"); + goto fail_i2c_init; + } + build_ver = + *((u32 *)(bfdev->info.mem[0].internal_addr) + (BF_FPGA_VER_REG / 4)); + build_date = + *((u32 *)(bfdev->info.mem[0].internal_addr) + (BF_FPGA_BUILD_DATE / 4)); + fpga_print_build_date(build_date); + printk(KERN_ALERT "bf_fpga version %hu:%hu probe ok\n", + (u16)(build_ver >> 16), + (u16)(build_ver)); + return 0; + +fail_i2c_init: + fpga_i2c_deinit(); +fail_register_device: + bf_unregister_device(bfdev); +fail_release_irq: + pci_set_drvdata(pdev, NULL); + if (bfdev->mode == BF_INTR_MODE_MSIX) { + pci_disable_msix(bfdev->pdev); + kfree(bfdev->info.msix_entries); + bfdev->info.msix_entries = NULL; + } else if (bfdev->mode == BF_INTR_MODE_MSI) { + pci_disable_msi(bfdev->pdev); + } +fail_clear_pci_master: + pci_clear_master(pdev); +fail_release_iomem: + bf_pci_release_iomem(&bfdev->info); + pci_release_regions(pdev); +fail_pci_disable: + pci_disable_device(pdev); +fail_free: + kfree(bfdev); + + printk(KERN_ERR "bf_fpga probe failed\n"); + return err; +} + +static void bf_pci_remove(struct pci_dev *pdev) { + struct bf_pci_dev *bfdev = pci_get_drvdata(pdev); + struct bf_listener *cur_listener; + + bf_fpga_disable_int_dma(bfdev); + bf_fpga_sysfs_del(bfdev); + fpga_i2c_deinit(); + bf_unregister_device(bfdev); + if (bfdev->mode == BF_INTR_MODE_MSIX) { + pci_disable_msix(pdev); + kfree(bfdev->info.msix_entries); + bfdev->info.msix_entries = NULL; + } else if (bfdev->mode == BF_INTR_MODE_MSI) { + pci_disable_msi(pdev); + } + pci_clear_master(pdev); + bf_pci_release_iomem(&bfdev->info); + pci_release_regions(pdev); + pci_disable_pcie_error_reporting(pdev); + pci_disable_device(pdev); + pci_set_drvdata(pdev, NULL); + bf_global[bfdev->info.minor].bfdev = NULL; + /* existing filep structures in open file(s) must be informed that + * bf_pci_dev is no longer valid */ + spin_lock(&bf_nonisr_lock); + cur_listener = bfdev->listener_head; + while (cur_listener) { + cur_listener->bfdev = NULL; + cur_listener = cur_listener->next; + } + spin_unlock(&bf_nonisr_lock); + kfree(bfdev); + printk(KERN_ALERT "bf_fpga removed\n"); +} + +/** + * bf_pci_error_detected - called when PCI error is detected + * @pdev: Pointer to PCI device + * @state: The current pci connection state + * + * called when root complex detects pci error associated with the device + */ +static pci_ers_result_t bf_pci_error_detected(struct pci_dev *pdev, + pci_channel_state_t state) { + struct bf_pci_dev *bfdev = pci_get_drvdata(pdev); + int minor; + + if (!bfdev) { + return PCI_ERS_RESULT_NONE; + } + printk(KERN_ERR "bf_fpga pci_err_detected state %d\n", state); + if (state == pci_channel_io_perm_failure || state == pci_channel_io_frozen) { + bfdev->info.pci_error_state = 1; + /* send a signal to the user space program of the error */ + minor = bfdev->info.minor; + if (minor < BF_FPGA_MAX_DEVICE_CNT && bf_global[minor].async_queue) { + kill_fasync(&bf_global[minor].async_queue, SIGIO, POLL_ERR); + } + return PCI_ERS_RESULT_DISCONNECT; + } else { + return PCI_ERS_RESULT_NONE; + } +} + +/** + * bf_pci_slot_reset - called after the pci bus has been reset. + * @pdev: Pointer to PCI device + * + * Restart the card from scratch, as if from a cold-boot. + */ +static pci_ers_result_t bf_pci_slot_reset(struct pci_dev *pdev) { + /* nothing to do for now as we do not expect to get backto normal after + * a pcie link reset + * TBD: fill in this function if tofino can recover after an error + */ + return PCI_ERS_RESULT_DISCONNECT; +} + +/** + * bf_pci_resume - called when kernel thinks the device is up on PCIe. + * @pdev: Pointer to PCI device + * + * This callback is called when the error recovery driver tells us that + * its OK to resume normal operation. + */ +static void bf_pci_resume(struct pci_dev *pdev) { + /* this function should never be called for BF FPGA */ + struct bf_pci_dev *bfdev = pci_get_drvdata(pdev); + + printk(KERN_ERR "BF_FPGA io_resume invoked after pci error\n"); + if (bfdev) { + bfdev->info.pci_error_state = 0; + } +} + +static int bf_config_intr_mode(char *intr_str) { + if (!intr_str) { + pr_info("BF_FPGA Use MSI interrupt by default\n"); + return 0; + } + + if (!strcmp(intr_str, BF_INTR_MODE_MSIX_NAME)) { + bf_intr_mode_default = BF_INTR_MODE_MSIX; + pr_info("BF_FPGA Use MSIX interrupt\n"); + } else if (!strcmp(intr_str, BF_INTR_MODE_MSI_NAME)) { + bf_intr_mode_default = BF_INTR_MODE_MSI; + pr_info("BF_FPGA Use MSI interrupt\n"); + } else if (!strcmp(intr_str, BF_INTR_MODE_LEGACY_NAME)) { + bf_intr_mode_default = BF_INTR_MODE_LEGACY; + pr_info("BF_FPGA Use legacy interrupt\n"); + } else if (!strcmp(intr_str, BF_INTR_MODE_NONE_NAME)) { + bf_intr_mode_default = BF_INTR_MODE_NONE; + pr_info("BF_FPGA interrupt disabled\n"); + } else { + pr_info("Error: BF_FPGA bad intr_mode parameter - %s\n", intr_str); + return -EINVAL; + } + + return 0; +} + +static const struct pci_device_id bf_pci_tbl[] = { + {PCI_VDEVICE(BF, BF_FPGA_DEV_ID_JBAY_0), 0}, + /* required last entry */ + {.device = 0}}; + +/* PCI bus error handlers */ +static struct pci_error_handlers bf_pci_err_handler = { + .error_detected = bf_pci_error_detected, + .slot_reset = bf_pci_slot_reset, + .resume = bf_pci_resume, +}; + +static struct pci_driver bf_pci_driver = {.name = "bf_fpga", + .id_table = bf_pci_tbl, + .probe = bf_pci_probe, + .remove = bf_pci_remove, + .err_handler = &bf_pci_err_handler}; + +static int __init bfdrv_init(void) { + int ret; + + ret = bf_config_intr_mode(intr_mode); + if (ret < 0) { + return ret; + } + spin_lock_init(&bf_nonisr_lock); + return pci_register_driver(&bf_pci_driver); +} + +static void __exit bfdrv_exit(void) { + pci_unregister_driver(&bf_pci_driver); + intr_mode = NULL; +} + +module_init(bfdrv_init); +module_exit(bfdrv_exit); + +module_param(intr_mode, charp, S_IRUGO); +MODULE_PARM_DESC(intr_mode, + "bf-fpga interrupt mode (default=none):\n" + " " BF_INTR_MODE_MSIX_NAME + " Use MSIX interrupt\n" + " " BF_INTR_MODE_MSI_NAME + " Use MSI interrupt\n" + " " BF_INTR_MODE_LEGACY_NAME + " Use Legacy interrupt\n" + " " BF_INTR_MODE_NONE_NAME + " Use no interrupt\n" + "\n"); + +MODULE_DEVICE_TABLE(pci, bf_pci_tbl); +MODULE_DESCRIPTION("Barefoot FPGA PCI-I2C device"); +MODULE_LICENSE("GPL v2"); +MODULE_VERSION("0.1"); +MODULE_AUTHOR("Barefoot Networks"); diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_priv.h b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_priv.h new file mode 100644 index 00000000000..7515bde7458 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_priv.h @@ -0,0 +1,141 @@ +/******************************************************************************* + Barefoot Networks FPGA Linux driver + Copyright(c) 2018 - 2019 Barefoot Networks, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms and conditions of the GNU General Public License, + version 2, as published by the Free Software Foundation. + + This program is distributed in the hope it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + + The full GNU General Public License is included in this distribution in + the file called "COPYING". + + Contact Information: + info@barefootnetworks.com + Barefoot Networks, 4750 Patrick Henry Drive, Santa Clara CA 95054 + +*******************************************************************************/ +#ifndef _BF_FPGA_H_ +#define _BF_FPGA_H_ + +#define PCI_VENDOR_ID_BF 0x1d1c +#define BF_FPGA_DEV_ID_JBAY_0 0x01F0 + +#ifndef PCI_MSIX_ENTRY_SIZE +#define PCI_MSIX_ENTRY_SIZE 16 +#define PCI_MSIX_ENTRY_LOWER_ADDR 0 +#define PCI_MSIX_ENTRY_UPPER_ADDR 4 +#define PCI_MSIX_ENTRY_DATA 8 +#define PCI_MSIX_ENTRY_VECTOR_CTRL 12 +#define PCI_MSIX_ENTRY_CTRL_MASKBIT 1 +#endif + +#define BF_CLASS_NAME "bf_fpga" +#define BF_FPGA_MAX_DEVICE_CNT 1 +#define BF_INTR_MODE_NONE_NAME "none" +#define BF_INTR_MODE_LEGACY_NAME "legacy" +#define BF_INTR_MODE_MSI_NAME "msi" +#define BF_INTR_MODE_MSIX_NAME "msix" +#define BF_MAX_BAR_MAPS 6 +#define BF_MSIX_ENTRY_CNT 1 +#define BF_MSI_ENTRY_CNT 1 + +/* sysfs codes */ +#define BF_SYSFS_NEW_DEVICE 1 +#define BF_SYSFS_RM_DEVICE 0 +#define BF_SYSFS_I2C_START 2 + +/* interrupt mode */ +enum bf_intr_mode { + BF_INTR_MODE_NONE = 0, + BF_INTR_MODE_LEGACY, + BF_INTR_MODE_MSI, + BF_INTR_MODE_MSIX +}; + +/* device memory */ +struct bf_dev_mem { + const char *name; + phys_addr_t addr; + resource_size_t size; + void __iomem *internal_addr; +}; + +struct bf_listener { + struct bf_pci_dev *bfdev; + s32 event_count[BF_MSIX_ENTRY_CNT]; + int minor; + struct bf_listener *next; +}; + +/* device information */ +struct bf_dev_info { + struct module *owner; + struct device *dev; + int minor; + atomic_t event[BF_MSIX_ENTRY_CNT]; + wait_queue_head_t wait; + const char *version; + struct bf_dev_mem mem[BF_MAX_BAR_MAPS]; + struct msix_entry *msix_entries; + long irq; /* first irq vector */ + int num_irq; /* number of irq vectors */ + unsigned long irq_flags; /* sharable ?? */ + int pci_error_state; /* was there a pci bus error */ +}; + +/* cookie to be passed to IRQ handler, useful especially with MSIX */ +struct bf_int_vector { + struct bf_pci_dev *bf_dev; + int int_vec_offset; +}; + +/* sysfs related structs */ +#define BF_FPGA_SYSFS_CNT 64 +#define BF_FPGA_SYSFS_NAME_SIZE 32 + +struct bf_fpga_sysfs_buff { + struct device_attribute dev_attr; + char name[BF_FPGA_SYSFS_NAME_SIZE]; + int bus_id; + unsigned char i2c_addr; + size_t i2c_rd_size; /* bytes to read from the device */ + int sysfs_code; /* unique code for each sysfs file */ + struct bf_pci_dev *fpgadev; /* back pointer */ + bool in_use; +}; + +/** + * structure describing the private information for a BF pcie device. + */ +struct bf_pci_dev { + struct bf_dev_info info; + struct pci_dev *pdev; + enum bf_intr_mode mode; + u8 instance; + char name[16]; + struct bf_int_vector bf_int_vec[BF_MSIX_ENTRY_CNT]; + struct bf_listener * + listener_head; /* head of a singly linked list of listeners */ + struct bf_fpga_sysfs_buff fpga_sysfs_buff[BF_FPGA_SYSFS_CNT]; + struct bf_fpga_sysfs_buff fpga_sysfs_new_device; + struct bf_fpga_sysfs_buff fpga_sysfs_rm_device; + struct bf_fpga_sysfs_buff fpga_sysfs_st_i2c; + spinlock_t sysfs_slock; +}; + +int bf_fpga_ioctl(struct bf_pci_dev *bfdev, + unsigned int cmd, + unsigned long arg); +int bf_fpga_sysfs_add(struct bf_pci_dev *fpgadev); +void bf_fpga_sysfs_del(struct bf_pci_dev *fpgadev); + +#endif /* _BF_FPGA_H_ */ diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_sysfs.c b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_sysfs.c new file mode 100644 index 00000000000..6970a7a9598 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/bf_fpga_sysfs.c @@ -0,0 +1,335 @@ +/******************************************************************************* + Barefoot Networks FPGA Linux driver + Copyright(c) 2018 - 2019 Barefoot Networks, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms and conditions of the GNU General Public License, + version 2, as published by the Free Software Foundation. + + This program is distributed in the hope it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + + The full GNU General Public License is included in this distribution in + the file called "COPYING". + + Contact Information: + info@barefootnetworks.com + Barefoot Networks, 4750 Patrick Henry Drive, Santa Clara CA 95054 + +*******************************************************************************/ +#include +#include +#include +#include +#include +#include "bf_fpga_priv.h" +#include "bf_fpga_ioctl.h" +#include "i2c/bf_fpga_i2c.h" + +/* reads 1 byte from the i2c device */ +static ssize_t bf_fpga_sysfs_i2c_get(struct device *dev, + struct device_attribute *attr, + char *buf) { + bf_fpga_i2c_t i2c_op; + ssize_t size, cur_size; + struct bf_fpga_sysfs_buff *sysfs_buf = + container_of(attr, struct bf_fpga_sysfs_buff, dev_attr); + + if (!sysfs_buf) { + printk(KERN_ERR "fpga-i2c bad attr pointer in sysfs_read\n"); + return -ENXIO; /* something not quite right here; but, don't panic */ + } + i2c_op.num_i2c = 1; + i2c_op.one_time = 1; + i2c_op.inst_hndl.bus_id = sysfs_buf->bus_id; + i2c_op.i2c_inst[0].preemt = false; + i2c_op.i2c_inst[0].en = true; + i2c_op.i2c_inst[0].i2c_addr = sysfs_buf->i2c_addr; + i2c_op.i2c_inst[0].i2c_type = BF_FPGA_I2C_READ; + i2c_op.i2c_inst[0].delay = 0; + i2c_op.i2c_inst[0].wr_cnt = 0; + cur_size = sysfs_buf->i2c_rd_size; + /* limit to PAGE_SIZE per the sysfs contract */ + if (cur_size >= PAGE_SIZE) { + cur_size = PAGE_SIZE; + } + size = 0; + while (cur_size > 0) { + unsigned char cur_cnt; + if (cur_size > 64) { + cur_cnt = 64; + } else { + cur_cnt = (unsigned char)cur_size; + } + i2c_op.i2c_inst[0].rd_cnt = cur_cnt; + if (fpga_i2c_oneshot(&i2c_op)) { + printk(KERN_ERR + "fpga-i2c read one-shot error bus %d addr 0x%hhx status 0x%hhx\n", + i2c_op.inst_hndl.bus_id, + i2c_op.i2c_inst[0].i2c_addr, + i2c_op.i2c_inst[0].status); + return -EIO; + } + memcpy(buf, i2c_op.i2c_inst[0].rd_buf, cur_cnt); + buf += cur_cnt; + size += cur_cnt; + cur_size -= cur_cnt; + } + return size; +} + +/* write the number of bytes supplied to the i2c device, 1st byte has to be + the count(max 8) */ +static ssize_t bf_fpga_sysfs_i2c_set(struct device *dev, + struct device_attribute *attr, + const char *buf, + size_t count) { + bf_fpga_i2c_t i2c_op; + size_t size, cur_cnt; + struct bf_fpga_sysfs_buff *sysfs_buf = + container_of(attr, struct bf_fpga_sysfs_buff, dev_attr); + + if (!sysfs_buf || (count == 0)) { + printk(KERN_ERR "fpga-i2c bad attr pointer in sysfs_write\n"); + return -ENXIO; /* something not quite right here; but, don't panic */ + } + size = 0; + while (count > 0) { + if (count > 64) { + cur_cnt = 64; + } else { + cur_cnt = count; + } + i2c_op.i2c_inst[0].wr_cnt = cur_cnt; + i2c_op.i2c_inst[0].rd_cnt = 0; + memcpy(i2c_op.i2c_inst[0].wr_buf, buf, cur_cnt); + i2c_op.num_i2c = 1; + i2c_op.one_time = 1; + i2c_op.inst_hndl.bus_id = sysfs_buf->bus_id; + i2c_op.i2c_inst[0].preemt = false; + i2c_op.i2c_inst[0].en = true; + i2c_op.i2c_inst[0].i2c_addr = sysfs_buf->i2c_addr; + i2c_op.i2c_inst[0].i2c_type = BF_FPGA_I2C_WRITE; + i2c_op.i2c_inst[0].delay = 0; + if (fpga_i2c_oneshot(&i2c_op)) { + printk( + KERN_ERR + "fpga-i2c write one-shot error bus %d addr 0x%hhx status 0x%hhx\n", + i2c_op.inst_hndl.bus_id, + i2c_op.i2c_inst[0].i2c_addr, + i2c_op.i2c_inst[0].status); + return -EIO; + } + buf += cur_cnt; + size += cur_cnt; + count -= cur_cnt; + } + return size; +} + +static int find_matching_sysfs_buf(struct bf_pci_dev *fpgadev, + int bus_id, + unsigned char i2c_addr) { + int i; + + /* check if a sysfs entry already exists */ + for (i = 0; i < BF_FPGA_SYSFS_CNT; i++) { + if (fpgadev->fpga_sysfs_buff[i].bus_id == bus_id && + fpgadev->fpga_sysfs_buff[i].i2c_addr == i2c_addr) { + return i; + } + } + /* could not find a matching sysfs buffer */ + return -1; +} + +static ssize_t bf_fpga_sysfs_fixed_get(struct device *dev, + struct device_attribute *attr, + char *buf) { + (void)dev; + (void)attr; + (void)buf; + return -ENOSYS; +} + +static ssize_t bf_fpga_sysfs_fixed_set(struct device *dev, + struct device_attribute *attr, + const char *buf, + size_t count) { + struct bf_pci_dev *fpgadev; + int i, en, bus_id, ret, rd_size; + char fname[BF_FPGA_SYSFS_NAME_SIZE]; + unsigned char i2c_addr; + struct bf_fpga_sysfs_buff *new_buf; + struct bf_fpga_sysfs_buff *sysfs_buf = + container_of(attr, struct bf_fpga_sysfs_buff, dev_attr); + + if (!sysfs_buf || (count == 0)) { + printk(KERN_ERR "fpga i2c bad attr pointer in fixed_sysfs_write\n"); + return -ENXIO; /* something not quite right here; but, don't panic */ + } + fpgadev = sysfs_buf->fpgadev; + + switch (sysfs_buf->sysfs_code) { + case BF_SYSFS_NEW_DEVICE: /* new_device request */ + ret = sscanf(buf, "%s %d %hhx %d", fname, &bus_id, &i2c_addr, &rd_size); + /* default rd_size to 1 if not supplied or invalid */ + if (ret < 3) { + return -EINVAL; + } + if (ret < 4 || rd_size > PAGE_SIZE) { + rd_size = 1; + } + if (bus_id >= BF_I2C_FPGA_NUM_CTRL || i2c_addr >= 0x80) { + return -EINVAL; + } + /* find out the free sysfs_buffer to use */ + spin_lock(&fpgadev->sysfs_slock); + if (find_matching_sysfs_buf(fpgadev, bus_id, i2c_addr) != -1) { + /* there is already an matching entry */ + spin_unlock(&fpgadev->sysfs_slock); + return -ENOSPC; + } + for (i = 0; i < BF_FPGA_SYSFS_CNT; i++) { + if (!fpgadev->fpga_sysfs_buff[i].in_use) { + fpgadev->fpga_sysfs_buff[i].in_use = true; + new_buf = &fpgadev->fpga_sysfs_buff[i]; + new_buf->i2c_addr = i2c_addr; + new_buf->i2c_rd_size = (size_t)rd_size; + new_buf->bus_id = bus_id; + break; + } + } + spin_unlock(&fpgadev->sysfs_slock); + if (i >= BF_FPGA_SYSFS_CNT) { + /* no free buffer available, return with ERROR */ + return -ENOSPC; + } + /* create a new sysfs entry now */ + new_buf->dev_attr.show = bf_fpga_sysfs_i2c_get; + new_buf->dev_attr.store = bf_fpga_sysfs_i2c_set; + new_buf->fpgadev = fpgadev; + new_buf->dev_attr.attr.mode = S_IWUSR | S_IRUGO; + new_buf->sysfs_code = 0; + snprintf(new_buf->name, BF_FPGA_SYSFS_NAME_SIZE, "%s", fname); + new_buf->dev_attr.attr.name = new_buf->name; + ret = device_create_file(&(fpgadev->pdev->dev), &new_buf->dev_attr); + break; + + case BF_SYSFS_RM_DEVICE: /* remove device request */ + ret = sscanf(buf, "%d %hhx", &bus_id, &i2c_addr); + if (ret < 2) { + return -EINVAL; + } + if (bus_id >= BF_I2C_FPGA_NUM_CTRL || i2c_addr >= 0x80) { + return -EINVAL; + } + /* delete the sysfs file corresponding to the i2c address */ + spin_lock(&fpgadev->sysfs_slock); + i = find_matching_sysfs_buf(fpgadev, bus_id, i2c_addr); + if (i == -1) { + /* there is no matching entry */ + spin_unlock(&fpgadev->sysfs_slock); + return -EINVAL; + } + /* must invalidate bus_id and i2c_addr when marking the buffer + * not-in-use + */ + new_buf = &fpgadev->fpga_sysfs_buff[i]; + new_buf->i2c_addr = 0xff; + new_buf->bus_id = -1; + fpgadev->fpga_sysfs_buff[i].in_use = false; + spin_unlock(&fpgadev->sysfs_slock); + device_remove_file(&fpgadev->pdev->dev, &new_buf->dev_attr); + new_buf->name[0] = 0; /* nullify the name */ + ret = 0; + break; + + case BF_SYSFS_I2C_START: /* start-stop i2c request */ + ret = sscanf(buf, "%d %d", &bus_id, &en); + if (ret < 2) { + return -EINVAL; + } + if (bus_id >= BF_I2C_FPGA_NUM_CTRL) { + return -EINVAL; + } + if (en) { + ret = fpga_i2c_start(bus_id); + } else { + ret = fpga_i2c_stop(bus_id); + } + break; + + default: + ret = -EINVAL; + } + return ((ret == 0) ? count : ret); +} + +int bf_fpga_sysfs_add(struct bf_pci_dev *fpgadev) { + int rc = 0; + u8 *name; + + spin_lock_init(&fpgadev->sysfs_slock); + /* Add two sysfs files statically, new_device and remove_device. + * Handlers of these two fles can dynamically add more sysfs + * files (or remove files) based on the platform. + */ + fpgadev->fpga_sysfs_new_device.dev_attr.show = bf_fpga_sysfs_fixed_get; + fpgadev->fpga_sysfs_new_device.dev_attr.store = bf_fpga_sysfs_fixed_set; + fpgadev->fpga_sysfs_new_device.fpgadev = fpgadev; + fpgadev->fpga_sysfs_new_device.dev_attr.attr.mode = S_IWUSR | S_IRUGO; + fpgadev->fpga_sysfs_new_device.sysfs_code = BF_SYSFS_NEW_DEVICE; + name = fpgadev->fpga_sysfs_new_device.name; + snprintf(name, BF_FPGA_SYSFS_NAME_SIZE, "new_device"); + fpgadev->fpga_sysfs_new_device.dev_attr.attr.name = name; + rc |= device_create_file(&(fpgadev->pdev->dev), + &fpgadev->fpga_sysfs_new_device.dev_attr); + + fpgadev->fpga_sysfs_rm_device.dev_attr.show = bf_fpga_sysfs_fixed_get; + fpgadev->fpga_sysfs_rm_device.dev_attr.store = bf_fpga_sysfs_fixed_set; + fpgadev->fpga_sysfs_rm_device.fpgadev = fpgadev; + fpgadev->fpga_sysfs_rm_device.dev_attr.attr.mode = S_IWUSR | S_IRUGO; + fpgadev->fpga_sysfs_rm_device.sysfs_code = BF_SYSFS_RM_DEVICE; + name = fpgadev->fpga_sysfs_rm_device.name; + snprintf(name, BF_FPGA_SYSFS_NAME_SIZE, "remove_device"); + fpgadev->fpga_sysfs_rm_device.dev_attr.attr.name = name; + rc |= device_create_file(&(fpgadev->pdev->dev), + &fpgadev->fpga_sysfs_rm_device.dev_attr); + + /* sysfs for i2c start-stop control */ + fpgadev->fpga_sysfs_st_i2c.dev_attr.show = bf_fpga_sysfs_fixed_get; + fpgadev->fpga_sysfs_st_i2c.dev_attr.store = bf_fpga_sysfs_fixed_set; + fpgadev->fpga_sysfs_st_i2c.fpgadev = fpgadev; + fpgadev->fpga_sysfs_st_i2c.dev_attr.attr.mode = S_IWUSR | S_IRUGO; + fpgadev->fpga_sysfs_st_i2c.sysfs_code = BF_SYSFS_I2C_START; + name = fpgadev->fpga_sysfs_st_i2c.name; + snprintf(name, BF_FPGA_SYSFS_NAME_SIZE, "i2c_start"); + fpgadev->fpga_sysfs_st_i2c.dev_attr.attr.name = name; + rc |= device_create_file(&(fpgadev->pdev->dev), + &fpgadev->fpga_sysfs_st_i2c.dev_attr); + + return rc; +} + +void bf_fpga_sysfs_del(struct bf_pci_dev *fpgadev) { + int i; + + device_remove_file(&fpgadev->pdev->dev, + &fpgadev->fpga_sysfs_new_device.dev_attr); + device_remove_file(&fpgadev->pdev->dev, + &fpgadev->fpga_sysfs_rm_device.dev_attr); + device_remove_file(&fpgadev->pdev->dev, &fpgadev->fpga_sysfs_st_i2c.dev_attr); + for (i = 0; i < BF_FPGA_SYSFS_CNT; i++) { + if (fpgadev->fpga_sysfs_buff[i].in_use) { + device_remove_file(&fpgadev->pdev->dev, + &fpgadev->fpga_sysfs_buff[i].dev_attr); + } + } +} diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c.c b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c.c new file mode 100644 index 00000000000..1a622e5392d --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c.c @@ -0,0 +1,516 @@ +/******************************************************************************* + Barefoot Networks FPGA Linux driver + Copyright(c) 2018 - 2019 Barefoot Networks, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms and conditions of the GNU General Public License, + version 2, as published by the Free Software Foundation. + + This program is distributed in the hope it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + + The full GNU General Public License is included in this distribution in + the file called "COPYING". + + Contact Information: + info@barefootnetworks.com + Barefoot Networks, 4750 Patrick Henry Drive, Santa Clara CA 95054 + +*******************************************************************************/ +#include +#include "bf_fpga_i2c_priv_porting.h" +#include +#include "bf_fpga_i2c_priv.h" +#include "bf_fpga_i2c.h" +#include "bf_fpga_i2c_reg.h" + +/* allocate find physically contiguous free blocks of instructions in one time + * or periodic area and mark them "in-use" */ +static int get_next_free_index(fpga_i2c_controller_t *i2c_ctrl, + int cnt, + bool pr) { + int i, j, begin, end; + + if (pr) { + begin = FPGA_I2C_PERIODIC_BEGIN_INDEX; + end = FPGA_I2C_NUM_INST; + } else { + begin = FPGA_I2c_ONESHOT_BEGIN_INDEX; + end = FPGA_I2C_ONESHOT_NUM_INST; + } + + bf_fpga_fast_lock(&i2c_ctrl->spinlock); + for (i = begin; i < end;) { + /* check if there are cnt number of free slots here */ + for (j = 0; j < cnt; j++) { + if (i2c_ctrl->i2c_inst[i + j].in_use) { + break; + } + } + if (j == cnt) { + /* we found enough free slots, so, return i */ + break; + } else { + /* we did not find enough free slots, continue searching */ + i += (j + 1); + continue; + } + } + if (i < end) { + for (j = 0; j < cnt; j++) { + i2c_ctrl->i2c_inst[i + j].in_use = true; + } + } else { + i = -1; + } + bf_fpga_fast_unlock(&i2c_ctrl->spinlock); + return i; +} + +/* free physically contiguous in-use blocks of instructions */ +static void release_index(fpga_i2c_controller_t *i2c_ctrl, + int inst_id, + int cnt) { + int i; + + if (inst_id < 0 || (inst_id + cnt) >= FPGA_I2C_NUM_INST) { + return; /* invalid id */ + } + bf_fpga_fast_lock(&i2c_ctrl->spinlock); + for (i = inst_id; i < (inst_id + cnt); i++) { + i2c_ctrl->i2c_inst[i].in_use = false; + } + bf_fpga_fast_unlock(&i2c_ctrl->spinlock); +} + +/* convert miroseconds to i2c-instruction delay parameter */ +static int us_to_fpga_delay(int microsec) { + int delay; + + if (microsec < 10) { + delay = 0; + } else if (microsec < 100) { + delay = 1; + } else if (microsec < 1000) { + delay = 2; + } else if (microsec < 10000) { + delay = 3; + } else if (microsec < 100000) { + delay = 4; + } else if (microsec < 1000000) { + delay = 5; + } else { + delay = 6; + } + return delay; +} + +/* populate single i2c_instruction at the given instruction slot */ +static int fpga_i2c_enqueue(int bus_id, + int inst_id, + bf_fpga_i2c_inst_t *i2c_inst) { + fpga_i2c_controller_t *i2c_ctrl = fpga_i2c_ctrl_get(bus_id); + int delay = us_to_fpga_delay(i2c_inst->delay); + uint32_t wd0 = 0, wd1 = 0; + uint32_t i2c_data[2]; + uint8_t i2c_addr, num_wr, num_rd; + + i2c_addr = i2c_inst->i2c_addr; + num_wr = i2c_inst->wr_cnt; + num_rd = i2c_inst->rd_cnt; + if (i2c_addr > 0x7F || num_wr > 129 || num_rd > 128) { + return BF_FPGA_EINVAL; + } + if (i2c_inst->preemt) { + wd0 |= I2C_INST_PMT; + } + if (i2c_inst->en) { + wd0 |= I2C_INST_EN; + } + i2c_data[0] = i2c_data[1] = 0; /* clear on init */ + switch (i2c_inst->i2c_type) { + case BF_FPGA_I2C_NOP: + /* add delay + enable */ + wd0 |= (I2C_NOP | (delay << I2C_DELAY_SHF)); + break; + case BF_FPGA_I2C_WRITE: + if (num_wr == 0) { + return BF_FPGA_EINVAL; + } + wd0 |= (I2C_WR_ADDR_DATA | (delay << I2C_DELAY_SHF)); + wd1 |= (i2c_inst->i2c_addr << I2C_DEV_ADDR_SHF); + /* copy the first byte into register address */ + wd1 |= ((i2c_inst->wr_buf[0]) << I2C_CMD_OFFSET); + wd1 |= ((num_wr - 1) << I2C_WR_CNT_SHF); + if (num_wr <= 9) { + /* copy data into instruction area */ + memcpy(i2c_data, &i2c_inst->wr_buf[1], (num_wr - 1)); + bf_fpga_i2c_reg_write32( + i2c_ctrl, Bf_FPGA_I2C_INST_DATA_LO(inst_id), i2c_data[0]); + bf_fpga_i2c_reg_write32( + i2c_ctrl, Bf_FPGA_I2C_INST_DATA_HI(inst_id), i2c_data[1]); + } else { + /* copy the data in data area */ + int len = num_wr - 1; + uint32_t addr; + uint8_t *val = (uint8_t *)(&i2c_inst->wr_buf[1]); + /* store the data pointer Note the indexing required by FPGA specs */ + i2c_data[0] = BF_FPGA_I2C_DATA_AREA(inst_id); + addr = i2c_data[0]; + bf_fpga_i2c_reg_write32( + i2c_ctrl, Bf_FPGA_I2C_INST_DATA_LO(inst_id), i2c_data[0] / 4); + /* do byte write to avoid endianness mismatch */ + while (len--) { + bf_fpga_i2c_reg_write8(i2c_ctrl, addr, *val); + addr++; + val++; + } + } + break; + case BF_FPGA_I2C_READ: + if (num_rd == 0) { + return BF_FPGA_EINVAL; + } + wd0 |= (I2C_RD_DATA | (delay << I2C_DELAY_SHF)); + wd1 |= (i2c_inst->i2c_addr << I2C_DEV_ADDR_SHF); + wd1 |= ((num_rd) << I2C_RD_CNT_SHF); + if (num_rd > 8) { + /* store the data area pointer */ + i2c_data[0] = BF_FPGA_I2C_DATA_AREA(inst_id); + bf_fpga_i2c_reg_write32( + i2c_ctrl, Bf_FPGA_I2C_INST_DATA_LO(inst_id), i2c_data[0] / 4); + } + break; + case BF_FPGA_I2C_ADDR_READ: + if (num_wr == 0 || num_rd == 0) { + return BF_FPGA_EINVAL; + } + wd0 |= (I2C_RD_ADDR_DATA_BURST | (delay << I2C_DELAY_SHF)); + wd1 |= (i2c_inst->i2c_addr << I2C_DEV_ADDR_SHF); + /* 1st byte of the write buf goes into "register address" field */ + wd1 |= ((num_wr - 1) << I2C_WR_CNT_SHF); + wd1 |= ((i2c_inst->wr_buf[0]) << I2C_CMD_OFFSET); + wd1 |= ((num_rd) << I2C_RD_CNT_SHF); + /* less than 8 bytes data goes to the instruction area */ + if ((num_wr - 1 + num_rd) <= 8) { + memcpy(i2c_data, &i2c_inst->wr_buf[1], (num_wr - 1)); + bf_fpga_i2c_reg_write32( + i2c_ctrl, Bf_FPGA_I2C_INST_DATA_LO(inst_id), i2c_data[0]); + bf_fpga_i2c_reg_write32( + i2c_ctrl, Bf_FPGA_I2C_INST_DATA_HI(inst_id), i2c_data[1]); + } else { + int len = num_wr - 1; + uint32_t addr; + uint8_t *val = (uint8_t *)(&i2c_inst->wr_buf[1]); + /* store the data area pointer */ + i2c_data[0] = BF_FPGA_I2C_DATA_AREA(inst_id); + addr = i2c_data[0]; + bf_fpga_i2c_reg_write32( + i2c_ctrl, Bf_FPGA_I2C_INST_DATA_LO(inst_id), i2c_data[0] / 4); + /* copy the data in data area */ + while (len--) { + bf_fpga_i2c_reg_write8(i2c_ctrl, addr, *val); + addr++; + val++; + } + } + break; + default: + return BF_FPGA_EINVAL; + } + bf_fpga_i2c_reg_write32(i2c_ctrl, Bf_FPGA_I2C_INST_PARAM(inst_id), wd1); + bf_fpga_i2c_reg_write32(i2c_ctrl, Bf_FPGA_I2C_INST_CTRL(inst_id), wd0); + return BF_FPGA_OK; +} + +/* get the i2c completion status of a particular instruction */ +static uint32_t fpga_i2c_get_status(int bus_id, int inst_id) { + fpga_i2c_controller_t *i2c_ctrl = fpga_i2c_ctrl_get(bus_id); + uint32_t addr = Bf_FPGA_I2C_INST_CTRL(inst_id); + return (bf_fpga_i2c_reg_read32(i2c_ctrl, addr) & I2C_STATUS_MASK); +} + +/** FPGA I2C data read (assumes locked by caller and no need to stop i2c) + * + * read the data following a read type i2c operation + * + * @param bus_id + * i2c controller id + * @param inst_id + * instruction id within this controller space + * @param offset + * offset in the data-area where read-data is available + * @param num_rd + * number of bytes to read + * @param rd_buf + * buffer to read into + * @return + * 0 on success and <0 on error + */ +static int fpga_i2c_data_read_locked(fpga_i2c_controller_t *i2c_ctrl, + int inst_id, + uint8_t offset, + uint8_t num_rd, + uint8_t *rd_buf) { + uint8_t i; + uint32_t addr, data_cnt; + + if (!i2c_ctrl || !rd_buf || !num_rd || inst_id < 0 || + inst_id >= FPGA_I2C_NUM_INST) { + return BF_FPGA_EINVAL; + } + /* find out the wr_cnt + rd_cnt from the already executed instruction field */ + data_cnt = bf_fpga_i2c_reg_read32(i2c_ctrl, Bf_FPGA_I2C_INST_PARAM(inst_id)); + /* point to data area if the (wr_cnt + rd_cnt) > 8 */ + data_cnt &= 0xffff; /* retain only the length fields */ + if (((data_cnt & 0xff) + (data_cnt >> 8)) <= 8) { + addr = Bf_FPGA_I2C_INST_DATA_LO(inst_id) + offset; + } else { + addr = BF_FPGA_I2C_DATA_AREA(inst_id) + offset; + } + for (i = 0; i < num_rd; i++) { + *rd_buf = bf_fpga_i2c_reg_read8(i2c_ctrl, addr); + addr++; + rd_buf++; + } + return BF_FPGA_OK; +} + +/** FPGA I2C data read + * + * read the data following a read type i2c operation + * + * @param bus_id + * i2c controller id + * @param inst_id + * instruction id within this controller space + * @param offset + * offset in the data-area where read-data is available + * @param num_rd + * number of bytes to read + * @param rd_buf + * buffer to read into + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_data_read( + int bus_id, int inst_id, uint8_t offset, uint8_t num_rd, uint8_t *rd_buf) { + fpga_i2c_controller_t *i2c_ctrl = fpga_i2c_ctrl_get(bus_id); + int ret; + bool i2c_running; + uint8_t val; + + if (!i2c_ctrl || !rd_buf || !num_rd || inst_id < 0 || + inst_id >= FPGA_I2C_NUM_INST) { + return BF_FPGA_EINVAL; + } + + /* aligned (upto) 4 bytes can be read without stopping the ongoing i2c, + * this is guaranteed by FPGA design. i2c has to be stopped, in all other + * cases, to read a consistent set of read-data. + */ + if ((offset % 4 == 0) && (num_rd <= 4)) { + return ( + fpga_i2c_data_read_locked(i2c_ctrl, inst_id, offset, num_rd, rd_buf)); + } + + /* non-aligned case; stop i2c if running, read data and restart i2c */ + if (bf_fpga_i2c_lock(i2c_ctrl)) { + return BF_FPGA_EAGAIN; + } + /* check if i2c_controller is running */ + val = bf_fpga_i2c_reg_read8(i2c_ctrl, Bf_FPGA_TOP_I2C_STATUS); + i2c_running = ((val & I2C_STS_BUSY) ? true : false); + if (i2c_running) { + /* stop ongoing i2c operations */ + fpga_i2c_stop_locked(i2c_ctrl); + } + ret = fpga_i2c_data_read_locked(i2c_ctrl, inst_id, offset, num_rd, rd_buf); + if (i2c_running) { + /* restart ongoing i2c operations */ + fpga_i2c_start_locked(i2c_ctrl); + } + bf_fpga_i2c_unlock(i2c_ctrl); + return ret; +} + +/** FPGA I2C onetime i2c operation + * + * @param i2c_op + * bf_fpga_i2c_t parameters * + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_oneshot(bf_fpga_i2c_t *i2c_op) { + int i, ret; + uint32_t val; + int bus_id; + fpga_i2c_controller_t *i2c_ctrl; + + if (!i2c_op) { + return BF_FPGA_EINVAL; + } + + bus_id = i2c_op->inst_hndl.bus_id; + i2c_ctrl = fpga_i2c_ctrl_get(bus_id); + + if (i2c_op->num_i2c == 0 || i2c_op->num_i2c >= FPGA_I2C_ONESHOT_NUM_INST || + i2c_op->one_time == 0 || bus_id >= BF_I2C_FPGA_NUM_CTRL || !i2c_ctrl) { + return BF_FPGA_EINVAL; + } + if (bf_fpga_i2c_lock(i2c_ctrl)) { + return BF_FPGA_EAGAIN; + } + /* stop ongoing i2c operations */ + ret = fpga_i2c_stop_locked(i2c_ctrl); + if (ret) { + bf_fpga_i2c_unlock(i2c_ctrl); + return ret; + } + /* populate one time i2c operation instruction(s) from offset zero */ + for (i = 0; i < i2c_op->num_i2c; i++) { + ret = fpga_i2c_enqueue(bus_id, i, &i2c_op->i2c_inst[i]); + if (ret) { + goto oneshot_error_exit; + } + } + /* start i2c operations */ + ret = fpga_i2c_start_locked(i2c_ctrl); + if (ret) { + goto oneshot_error_exit; + } + + /* wait until complete and read the data if necessary */ + for (i = 0; i < i2c_op->num_i2c; i++) { + int cnt; + val = 0; + /* cnt is roughly the number of bytes of this i2c cycle + * overhead of 100 bytes for for worst case timeout, one + * should not hit that in normal working case + */ + cnt = i2c_op->i2c_inst[i].wr_cnt + i2c_op->i2c_inst[i].rd_cnt; + /* bump up the cnt for an i2c transaction containing some data + * for computing worst case timeout */ + if (cnt > 0) { + cnt = cnt + 100; + } + while (!(val & I2C_STATUS_COMPLETED) && (cnt-- > 0)) { + /* 1 byte ~= 10 bits takes 25 microsec on i2c cycle at 400khz */ + bf_fpga_us_delay(50); + val = fpga_i2c_get_status(bus_id, i); + } + i2c_op->i2c_inst[i].status = val; /* store the h/w status */ + if (val & I2C_STATUS_ERR_MASK) { + ret = BF_FPGA_EIO; + goto oneshot_error_exit; + } + if (i2c_op->i2c_inst[i].rd_cnt) { + uint8_t offset = 0; + if (i2c_op->i2c_inst[i].wr_cnt > 1) { + offset = i2c_op->i2c_inst[i].wr_cnt - 1; + } + if (fpga_i2c_data_read_locked(i2c_ctrl, + i, + offset, + i2c_op->i2c_inst[i].rd_cnt, + i2c_op->i2c_inst[i].rd_buf)) { + ret = BF_FPGA_EIO; + goto oneshot_error_exit; + } + } + } + ret = BF_FPGA_OK; + +oneshot_error_exit: + for (i = 0; i < i2c_op->num_i2c; i++) { + /* cleanup the enable bit */ + val = bf_fpga_i2c_reg_read32(i2c_ctrl, Bf_FPGA_I2C_INST_CTRL(i)); + val &= (~I2C_INST_EN); + bf_fpga_i2c_reg_write32(i2c_ctrl, Bf_FPGA_I2C_INST_CTRL(i), val); + } + bf_fpga_i2c_unlock(i2c_ctrl); + return ret; +} + +/** FPGA I2C insert periodic i2c operation + * + * @param i2c_op + * bf_fpga_i2c_t parameters * + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_pr_add(bf_fpga_i2c_t *i2c_op) { + fpga_i2c_controller_t *i2c_ctrl; + int i, ret, next_id; + bool preemt; + + if (!i2c_op) { + return BF_FPGA_EINVAL; + } + i2c_ctrl = fpga_i2c_ctrl_get(i2c_op->inst_hndl.bus_id); + if (!i2c_ctrl) { + return BF_FPGA_EINVAL; + } + if (bf_fpga_i2c_lock(i2c_ctrl)) { + return BF_FPGA_EAGAIN; + } + /* get the next available free slot */ + next_id = get_next_free_index(i2c_ctrl, i2c_op->num_i2c, true); + if (next_id < 0) { + bf_fpga_i2c_unlock(i2c_ctrl); + return BF_FPGA_EBUSY; + } + /* populate periodic i2c operation instruction(s) */ + for (i = 0; i < i2c_op->num_i2c; i++) { + preemt = ((i == (i2c_op->num_i2c - 1)) ? false : true); + i2c_op->i2c_inst[i].preemt = preemt; + ret = fpga_i2c_enqueue( + i2c_op->inst_hndl.bus_id, next_id + i, &i2c_op->i2c_inst[i]); + + if (ret) { + bf_fpga_i2c_unlock(i2c_ctrl); + return ret; + } + } + bf_fpga_i2c_unlock(i2c_ctrl); + i2c_op->inst_hndl.inst_id = next_id; + return BF_FPGA_OK; +} + +/** FPGA I2C remove periodic i2c operation(s) from instruction memory + * + * @param i2c_op + * bf_fpga_i2c_t parameters * + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_del(bf_fpga_i2c_t *i2c_op) { + fpga_i2c_controller_t *i2c_ctrl; + int i, inst_id; + + if (!i2c_op) { + return BF_FPGA_EINVAL; + } + i2c_ctrl = fpga_i2c_ctrl_get(i2c_op->inst_hndl.bus_id); + if (!i2c_ctrl) { + return BF_FPGA_EINVAL; + } + inst_id = i2c_op->inst_hndl.inst_id; + if (bf_fpga_i2c_lock(i2c_ctrl)) { + return BF_FPGA_EAGAIN; + } + for (i = 0; i < i2c_op->num_i2c; i++) { + /* nullify the instruction */ + bf_fpga_i2c_reg_write32(i2c_ctrl, Bf_FPGA_I2C_INST_CTRL(inst_id + i), 0); + } + /* reset the in_use flag */ + release_index(i2c_ctrl, inst_id, i2c_op->num_i2c); + bf_fpga_i2c_unlock(i2c_ctrl); + return BF_FPGA_OK; +} diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c.h b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c.h new file mode 100644 index 00000000000..6f56ed270bd --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c.h @@ -0,0 +1,55 @@ +/******************************************************************************* + Barefoot Networks FPGA Linux driver + Copyright(c) 2018 - 2019 Barefoot Networks, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms and conditions of the GNU General Public License, + version 2, as published by the Free Software Foundation. + + This program is distributed in the hope it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + + The full GNU General Public License is included in this distribution in + the file called "COPYING". + + Contact Information: + info@barefootnetworks.com + Barefoot Networks, 4750 Patrick Henry Drive, Santa Clara CA 95054 + +*******************************************************************************/ +#ifndef _BF_FPGA_I2C_H +#define _BF_FPGA_I2C_H + +/* Allow the use in C++ code. */ +#ifdef __cplusplus +extern "C" { +#endif + +int fpga_i2c_start(int bus_id); +int fpga_i2c_stop(int bus_id); +int fpga_i2c_reset(int bus_id); +int fpga_i2c_is_busy(int bus_id, bool *is_busy); +int fpga_i2c_inst_en(int bus_id, int inst_id, bool en); +int fpga_i2c_set_clk(int bus_id, int clock_div); +int fpga_i2c_controller_init(int bus_id); +int fpga_i2c_controller_cleanup(int bus_id); +int fpga_i2c_init(uint8_t *base_addr); +void fpga_i2c_deinit(void); +int fpga_i2c_oneshot(bf_fpga_i2c_t *i2c_op); +int fpga_i2c_pr_add(bf_fpga_i2c_t *i2c_op); +int fpga_i2c_del(bf_fpga_i2c_t *i2c_op); +int fpga_i2c_data_read( + int bus_id, int inst_id, uint8_t offset, uint8_t len, uint8_t *buf); +bool fpga_i2c_is_inited(void); + +#ifdef __cplusplus +} +#endif /* C++ */ + +#endif /* _BF_FPGA_I2C_H */ diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_ctrl.c b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_ctrl.c new file mode 100644 index 00000000000..a8837ba3b60 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_ctrl.c @@ -0,0 +1,397 @@ +/******************************************************************************* + Barefoot Networks FPGA Linux driver + Copyright(c) 2018 - 2019 Barefoot Networks, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms and conditions of the GNU General Public License, + version 2, as published by the Free Software Foundation. + + This program is distributed in the hope it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + + The full GNU General Public License is included in this distribution in + the file called "COPYING". + + Contact Information: + info@barefootnetworks.com + Barefoot Networks, 4750 Patrick Henry Drive, Santa Clara CA 95054 + +*******************************************************************************/ +#include +#include "bf_fpga_i2c_priv_porting.h" +#include +#include "bf_fpga_i2c.h" +#include "bf_fpga_i2c_priv.h" +#include "bf_fpga_i2c_reg.h" + +/* static i2c controller contents */ +static fpga_i2c_controller_t fpga_i2c_ctrl[BF_I2C_FPGA_NUM_CTRL]; +static bool fpga_i2c_inited = false; + +/* fpga memory space access APIs */ +/* 32 bit write into fpga BAR0 */ +void bf_fpga_reg_write(fpga_i2c_controller_t *i2c_ctrl, + uint32_t offset, + uint32_t val) { + uint8_t *ptr = i2c_ctrl->fpga_base_addr + offset; + bf_fpga_write32(ptr, val); +} + +/* 32 bit read into fpga BAR0 */ +uint32_t bf_fpga_reg_read(fpga_i2c_controller_t *i2c_ctrl, uint32_t offset) { + uint8_t *ptr = i2c_ctrl->fpga_base_addr + offset; + return (bf_fpga_read32(ptr)); +} + +/* 32 bit write into fpga i2c space */ +void bf_fpga_i2c_reg_write32(fpga_i2c_controller_t *i2c_ctrl, + uint32_t offset, + uint32_t val) { + uint8_t *ptr = i2c_ctrl->i2c_base_addr + offset; + bf_fpga_write32(ptr, val); +} + +/* 32 bit read into fpga i2c space */ +uint32_t bf_fpga_i2c_reg_read32(fpga_i2c_controller_t *i2c_ctrl, + uint32_t offset) { + uint8_t *ptr = i2c_ctrl->i2c_base_addr + offset; + return (bf_fpga_read32(ptr)); +} + +/* 8 bit write into fpga i2c space */ +void bf_fpga_i2c_reg_write8(fpga_i2c_controller_t *i2c_ctrl, + uint32_t offset, + uint8_t val) { + uint8_t *ptr = i2c_ctrl->i2c_base_addr + offset; + bf_fpga_write8(ptr, val); +} + +/* 8 bit read into fpga i2c space */ +uint8_t bf_fpga_i2c_reg_read8(fpga_i2c_controller_t *i2c_ctrl, + uint32_t offset) { + uint8_t *ptr = i2c_ctrl->i2c_base_addr + offset; + return (bf_fpga_read8(ptr)); +} + +int bf_fpga_i2c_lock(fpga_i2c_controller_t *i2c_ctrl) { + return (bf_fpga_cr_enter(&i2c_ctrl->fpga_ctrl_lock)); +} + +void bf_fpga_i2c_unlock(fpga_i2c_controller_t *i2c_ctrl) { + return (bf_fpga_cr_leave(&i2c_ctrl->fpga_ctrl_lock)); +} + +/** FPGA return pointer to i2c_controller struct + * + * @param bus_id + * i2c controller id + * @return + * pointer to i2c_controller struct of + */ +fpga_i2c_controller_t *fpga_i2c_ctrl_get(int bus_id) { + if (bus_id >= BF_I2C_FPGA_NUM_CTRL) { + return NULL; + } else { + return &fpga_i2c_ctrl[bus_id]; + } +} + +/* is fpga module is soft inited */ +bool fpga_i2c_is_inited() { return fpga_i2c_inited; } + +/** FPGA I2C set clock: sets clock of i2c operations + * + * controller must be stopped before, if applicable. + * + * @param bus_id + * i2c controller id + * @param clk_div + * clock divider value as per fpga specs + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_set_clk(int bus_id, int clk_div) { + uint32_t val; + fpga_i2c_controller_t *i2c_ctrl; + + if (bus_id >= BF_I2C_FPGA_NUM_CTRL) { + return BF_FPGA_EINVAL; + } + i2c_ctrl = fpga_i2c_ctrl_get(bus_id); + if (bf_fpga_i2c_lock(i2c_ctrl)) { + return BF_FPGA_EAGAIN; + } + clk_div = (clk_div & I2C_CTRL_CLK_DIV_MASK) << I2C_CTRL_CLK_DIV_SHF; + val = bf_fpga_i2c_reg_read32(i2c_ctrl, Bf_FPGA_I2C_CTRL_TOP); + val &= ~(I2C_CTRL_CLK_DIV_MASK << I2C_CTRL_CLK_DIV_SHF); + val |= clk_div; + bf_fpga_i2c_reg_write32(i2c_ctrl, Bf_FPGA_I2C_CTRL_TOP, val); + bf_fpga_i2c_unlock(i2c_ctrl); + return BF_FPGA_OK; +} + +/** FPGA I2C stop : stops ongoing i2c operations without mutex locking + * + * internal function + * + * @param bus_id + * i2c controller struct + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_stop_locked(fpga_i2c_controller_t *i2c_ctrl) { + int to_ms, ret; + uint8_t val; + + val = bf_fpga_i2c_reg_read8(i2c_ctrl, Bf_FPGA_I2C_CTRL_TOP); + val &= ~I2C_CTRL_START; + bf_fpga_i2c_reg_write8(i2c_ctrl, Bf_FPGA_I2C_CTRL_TOP, val); + + to_ms = 100; /* 5 msec converted to multiple of 50 micro sec */ + val = bf_fpga_i2c_reg_read8(i2c_ctrl, Bf_FPGA_TOP_I2C_STATUS); + while ((val & I2C_STS_BUSY) && to_ms) { + bf_fpga_us_delay(50); + to_ms--; + val = bf_fpga_i2c_reg_read8(i2c_ctrl, Bf_FPGA_TOP_I2C_STATUS); + } + if (to_ms > 0) { + ret = BF_FPGA_OK; + } else { + ret = BF_FPGA_EIO; + } + return ret; +} + +/** FPGA I2C start : starts i2c operations without mutex locking + * + * internal function + * + * @param bus_id + * i2c controller struct + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_start_locked(fpga_i2c_controller_t *i2c_ctrl) { + uint8_t val; + val = bf_fpga_i2c_reg_read8(i2c_ctrl, Bf_FPGA_I2C_CTRL_TOP); + bf_fpga_i2c_reg_write8(i2c_ctrl, Bf_FPGA_I2C_CTRL_TOP, val | I2C_CTRL_START); + return BF_FPGA_OK; +} + +/** FPGA I2C stop : stops ongoing i2c operations + * + * @param bus_id + * i2c controller id + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_stop(int bus_id) { + fpga_i2c_controller_t *i2c_ctrl; + int ret; + + if (bus_id >= BF_I2C_FPGA_NUM_CTRL || !fpga_i2c_is_inited()) { + return BF_FPGA_EINVAL; + } + i2c_ctrl = fpga_i2c_ctrl_get(bus_id); + if (bf_fpga_i2c_lock(i2c_ctrl)) { + return BF_FPGA_EAGAIN; + } + ret = fpga_i2c_stop_locked(i2c_ctrl); + bf_fpga_i2c_unlock(i2c_ctrl); + return ret; +} + +/** FPGA I2C start : starts i2c operations + * + * @param bus_id + * i2c controller id + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_start(int bus_id) { + fpga_i2c_controller_t *i2c_ctrl; + int ret; + + if (bus_id >= BF_I2C_FPGA_NUM_CTRL || !fpga_i2c_is_inited()) { + return BF_FPGA_EINVAL; + } + i2c_ctrl = fpga_i2c_ctrl_get(bus_id); + if (bf_fpga_i2c_lock(i2c_ctrl)) { + return BF_FPGA_EAGAIN; + } + ret = fpga_i2c_start_locked(i2c_ctrl); + bf_fpga_i2c_unlock(i2c_ctrl); + return ret; +} + +/** FPGA I2C reset: reset i2c by issuing 9 clocks in a specific way + * + * @param bus_id + * i2c controller id + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_reset(int bus_id) { + fpga_i2c_controller_t *i2c_ctrl; + + if (bus_id >= BF_I2C_FPGA_NUM_CTRL || !fpga_i2c_is_inited()) { + return BF_FPGA_EINVAL; + } + i2c_ctrl = fpga_i2c_ctrl_get(bus_id); + if (bf_fpga_i2c_lock(i2c_ctrl)) { + return BF_FPGA_EAGAIN; + } + bf_fpga_i2c_reg_write8(i2c_ctrl, Bf_FPGA_I2C_CTRL_TOP, I2C_CTRL_RESET); + bf_fpga_i2c_unlock(i2c_ctrl); + return BF_FPGA_OK; +} + +/** FPGA I2C is running? + * + * @param bus_id + * i2c controller id + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_is_busy(int bus_id, bool *busy) { + uint8_t val; + fpga_i2c_controller_t *i2c_ctrl; + + if (bus_id >= BF_I2C_FPGA_NUM_CTRL || !fpga_i2c_is_inited()) { + return BF_FPGA_EINVAL; + } + i2c_ctrl = fpga_i2c_ctrl_get(bus_id); + if (bf_fpga_i2c_lock(i2c_ctrl)) { + return BF_FPGA_EAGAIN; + } + val = bf_fpga_i2c_reg_read8(i2c_ctrl, Bf_FPGA_TOP_I2C_STATUS); + *busy = ((val & I2C_STS_BUSY) ? true : false); + bf_fpga_i2c_unlock(i2c_ctrl); + return BF_FPGA_OK; +} + +/** FPGA I2C instruction enable/disable + * + * enable or disable a particular instruction in i2c instruction memory + * @param bus_id + * i2c controller id + * @param inst_id + * instruction id within this controller space + * @param en + * true for enable, false for disable + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_inst_en(int bus_id, int inst_id, bool en) { + uint32_t val; + fpga_i2c_controller_t *i2c_ctrl; + + if (bus_id >= BF_I2C_FPGA_NUM_CTRL || !fpga_i2c_is_inited()) { + return BF_FPGA_EINVAL; + } + if (inst_id < 0 || inst_id >= FPGA_I2C_NUM_INST) { + return BF_FPGA_EINVAL; + } + i2c_ctrl = fpga_i2c_ctrl_get(bus_id); + if (bf_fpga_i2c_lock(i2c_ctrl)) { + return BF_FPGA_EAGAIN; + } + val = bf_fpga_i2c_reg_read32(i2c_ctrl, Bf_FPGA_I2C_INST_CTRL(inst_id)); + if (en) { + val |= I2C_INST_EN; + } else { + val &= ~I2C_INST_EN; + } + bf_fpga_i2c_reg_write32(i2c_ctrl, Bf_FPGA_I2C_INST_CTRL(inst_id), val); + fpga_i2c_ctrl[bus_id].i2c_inst[inst_id].en = en; + bf_fpga_i2c_unlock(i2c_ctrl); + return BF_FPGA_OK; +} + +/** FPGA I2C controller initialization + * + * @param bus_id + * i2c controller id + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_controller_init(int bus_id) { + fpga_i2c_controller_t *i2c_ctrl; + int i, ret; + + if (bus_id >= BF_I2C_FPGA_NUM_CTRL) { + return BF_FPGA_EINVAL; + } + i2c_ctrl = fpga_i2c_ctrl_get(bus_id); + if (!i2c_ctrl) { + return BF_FPGA_EINVAL; + } + bf_fpga_fast_lock_init(&i2c_ctrl->spinlock, 0); + bf_fpga_cr_init(&i2c_ctrl->fpga_ctrl_lock); + bf_fpga_cr_enter(&i2c_ctrl->fpga_ctrl_lock); + for (i = 0; i < FPGA_I2C_NUM_INST; i++) { + fpga_i2c_ctrl[bus_id].i2c_inst[i].inst = (uint32_t)i; + bf_fpga_i2c_reg_write32(i2c_ctrl, Bf_FPGA_I2C_INST_CTRL(i), 0); + } + bf_fpga_cr_leave(&i2c_ctrl->fpga_ctrl_lock); + ret = fpga_i2c_set_clk(bus_id, 1); /* 400 khz default */ + ret |= fpga_i2c_stop(bus_id); /* just in case */ + return ret; +} + +/** FPGA I2C controller de initialization + * + * @param bus_id + * i2c controller id + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_controller_cleanup(int bus_id) { + int i; + + fpga_i2c_stop(bus_id); + for (i = 0; i < FPGA_I2C_NUM_INST; i++) { + fpga_i2c_ctrl[bus_id].i2c_inst[i].en = false; + } + bf_fpga_cr_destroy(&fpga_i2c_ctrl[bus_id].fpga_ctrl_lock); + bf_fpga_fast_lock_destroy(&fpga_i2c_ctrl[bus_id].spinlock); + return BF_FPGA_OK; +} + +/** FPGA I2C global initialization + * + * @param base_addr + * virtual address of i2c memory relative to BAR0 base + * @return + * 0 on success and <0 on error + */ +int fpga_i2c_init(uint8_t *base_addr) { + int i; + + memset(fpga_i2c_ctrl, 0, sizeof(fpga_i2c_ctrl)); + for (i = 0; i < BF_I2C_FPGA_NUM_CTRL; i++) { + fpga_i2c_ctrl[i].i2c_base_addr = base_addr + BF_FPGA_I2C_CTRL_BASE_ADDR(i); + fpga_i2c_ctrl[i].fpga_base_addr = base_addr; + fpga_i2c_controller_init(i); + } + fpga_i2c_inited = true; + return BF_FPGA_OK; +} + +/** FPGA I2C global de initialization + * + */ +void fpga_i2c_deinit(void) { + int i; + + for (i = 0; i < BF_I2C_FPGA_NUM_CTRL; i++) { + fpga_i2c_controller_cleanup(i); + } + fpga_i2c_inited = false; +} diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_porting.c b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_porting.c new file mode 100644 index 00000000000..8b126c2e6dc --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_porting.c @@ -0,0 +1,150 @@ +/******************************************************************************* + Barefoot Networks FPGA Linux driver + Copyright(c) 2018 - 2019 Barefoot Networks, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms and conditions of the GNU General Public License, + version 2, as published by the Free Software Foundation. + + This program is distributed in the hope it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + + The full GNU General Public License is included in this distribution in + the file called "COPYING". + + Contact Information: + info@barefootnetworks.com + Barefoot Networks, 4750 Patrick Henry Drive, Santa Clara CA 95054 + +*******************************************************************************/ +#include +#include +#include +#include +#include +#include "bf_fpga_i2c_priv_porting.h" +#include +#include "bf_fpga_i2c.h" +#include "bf_fpga_i2c_priv.h" + +/* This file contains OS and system specific porting functions for i2c APIs. + * Implementation in this file is for porting to linux kernel. + */ +/* mutex APIs are for mutual exclusion with capability to sleep while in + * exclusion mode + */ + +/* sleepable virtual exclusion region */ +typedef struct { + atomic_t lock_state; /* 1: in exclusion mode, 0: not in exclusion mode */ +} sleepable_v_mutex_t; + +int bf_fpga_cr_init(bf_fpga_mutex_t *lock) { + sleepable_v_mutex_t *mtx; + + if (!lock) { + return -1; + } + mtx = vzalloc(sizeof(sleepable_v_mutex_t)); + + if (mtx) { + atomic_set(&mtx->lock_state, 0); + *lock = (bf_fpga_mutex_t *)mtx; + return 0; + } else { + *lock = NULL; + return -1; + } +} + +void bf_fpga_cr_destroy(bf_fpga_mutex_t *lock) { + if (lock && *lock) { + vfree(*lock); + *lock = NULL; + } +} + +void bf_fpga_cr_leave(bf_fpga_mutex_t *lock) { + sleepable_v_mutex_t *mtx; + + if (lock && *lock) { + mtx = (sleepable_v_mutex_t *)*lock; + atomic_xchg(&mtx->lock_state, 0); + } +} + +int bf_fpga_cr_enter(bf_fpga_mutex_t *lock) { + sleepable_v_mutex_t *mtx; + + /* All we do here is: test and set */ + if (lock && *lock) { + int cnt = 10000; /* This will provide maximum of 500-1000 ms timeout */ + mtx = (sleepable_v_mutex_t *)*lock; + while (atomic_cmpxchg(&mtx->lock_state, 0, 1) != 0) { + if (cnt-- <= 0) { + return -1; /* this is a worst case timeout situation */ + } + usleep_range(50, 100); /* 50 us = about 2 bytes at 400Kbs i2c */ + } + return 0; + } else { + return -1; + } +} + +/* **** not implemented in current mode of locking */ +int bf_fpga_mutex_trylock(bf_fpga_mutex_t *lock) { + if (lock && *lock) { + return -1; + } else { + return -1; + } +} + +/* fast lock is a non-blocking busy lock, implemented with spinlock */ +int bf_fpga_fast_lock_init(bf_fpga_fast_lock_t *sl, unsigned int initial) { + spinlock_t *slock; + + (void)initial; + if (!sl) { + return -1; + } + slock = vzalloc(sizeof(spinlock_t)); + + if (slock) { + spin_lock_init(slock); + *sl = (bf_fpga_fast_lock_t *)slock; + return 0; + } else { + *sl = NULL; + return -1; + } +} + +void bf_fpga_fast_lock_destroy(bf_fpga_fast_lock_t *sl) { + if (sl && *sl) { + vfree(*sl); + *sl = NULL; + } +} + +int bf_fpga_fast_lock(bf_fpga_fast_lock_t *sl) { + if (sl && *sl) { + spin_lock(*sl); + return 0; + } else { + return -1; + } +} + +void bf_fpga_fast_unlock(bf_fpga_fast_lock_t *sl) { + if (sl && *sl) { + spin_unlock(*sl); + } +} diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_priv.h b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_priv.h new file mode 100644 index 00000000000..0b3b1e47b01 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_priv.h @@ -0,0 +1,104 @@ +/******************************************************************************* + Barefoot Networks FPGA Linux driver + Copyright(c) 2018 - 2019 Barefoot Networks, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms and conditions of the GNU General Public License, + version 2, as published by the Free Software Foundation. + + This program is distributed in the hope it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + + The full GNU General Public License is included in this distribution in + the file called "COPYING". + + Contact Information: + info@barefootnetworks.com + Barefoot Networks, 4750 Patrick Henry Drive, Santa Clara CA 95054 + +*******************************************************************************/ +#ifndef _BF_FPGA_I2C_PRIV_H +#define _BF_FPGA_I2C_PRIV_H + +/* Allow the use in C++ code. */ +#ifdef __cplusplus +extern "C" { +#endif + +#define FPGA_I2C_INST_OFFSET(idx) (0x10 + (16 * idx)) + +typedef enum { + FGPA_I2C_NOP = 0x0, + FGPA_I2C_WR_ADDR_DATA = 0x1, /* wr: reg_addr, wr: data */ + FGPA_I2C_WR_ADDR_RD_DATA = 0x2, /* wr: reg_addrss, r/s, rd: data */ + FGPA_I2C_WR_ADDR = 0x3, /* wr: reg_addr */ + FGPA_I2C_RD_DATA = 0x4, /* rd: data */ + FGPA_I2C_MULTI_WR_RD = 0x5 /* wr: n bytes, r/s, rd: m bytes */ +} i2c_cmd_type; + +/* contents of each instruction instance */ +typedef struct i2c_inst_cmd_s { + i2c_cmd_type i2c_cmd; /* i2x cycle type */ + uint32_t data_lo; /* lower 4 bytes of data associated with this inst */ + uint32_t data_hi; /* upper 4 bytes of data associated with this inst */ + uint32_t us_delay; /* delay before i2c cycle */ + uint8_t i2c_addr; /* i2c device address, in 7 bit format */ + uint8_t reg_addr; /* 1st write byte, if present in i2c cycle */ + uint8_t num_read; /* number of bytes to write excluding reg_addr */ + uint8_t num_write; /* number of bytes to read */ +} i2c_inst_cmd_t; + +/* attributes of each instruction instance */ +typedef struct i2c_inst_s { + uint32_t inst; /* index of the instruction within the controller memory */ + bool en; /* is instruction enabled */ + bool preemt; /* atomically execute next instruction */ + bool int_en; /* enable interrupt after execution */ + bool in_use; /* is this instruction currently used */ +} i2c_inst_t; + +typedef struct fpga_i2c_controller_s { + bf_fpga_mutex_t fpga_ctrl_lock; + bf_fpga_fast_lock_t spinlock; + uint8_t *fpga_base_addr; /* virtual address of start of fpga memory */ + uint8_t *i2c_base_addr; /* virtual address of i2c controller memory */ + uint32_t start; /* offset of start of i2c instruction memory */ + uint32_t len; /* number of i2c instructions belonging to this i2c engine */ + uint32_t clk_div; /* clock divider used by this i2c engine */ + bool int_en; + i2c_inst_t i2c_inst[FPGA_I2C_NUM_INST]; +} fpga_i2c_controller_t; + +fpga_i2c_controller_t *fpga_i2c_ctrl_get(int bus_id); +void bf_fpga_reg_write(fpga_i2c_controller_t *i2c_ctrl, + uint32_t offset, + uint32_t val); +uint32_t bf_fpga_reg_read(fpga_i2c_controller_t *i2c_ctrl, uint32_t offset); +void bf_fpga_i2c_reg_write32(fpga_i2c_controller_t *i2c_ctrl, + uint32_t offset, + uint32_t val); +uint32_t bf_fpga_i2c_reg_read32(fpga_i2c_controller_t *i2c_ctrl, + uint32_t offset); +void bf_fpga_i2c_reg_write8(fpga_i2c_controller_t *i2c_ctrl, + uint32_t offset, + uint8_t val); +uint8_t bf_fpga_i2c_reg_read8(fpga_i2c_controller_t *i2c_ctrl, uint32_t offset); + +int bf_fpga_i2c_lock(fpga_i2c_controller_t *i2c_ctrl); + +void bf_fpga_i2c_unlock(fpga_i2c_controller_t *i2c_ctrl); + +int fpga_i2c_start_locked(fpga_i2c_controller_t *i2c_ctrl); +int fpga_i2c_stop_locked(fpga_i2c_controller_t *i2c_ctrl); + +#ifdef __cplusplus +} +#endif /* C++ */ + +#endif /* _BF_FPGA_I2C_PRIV_H */ diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_priv_porting.h b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_priv_porting.h new file mode 100644 index 00000000000..adea5c9311f --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_priv_porting.h @@ -0,0 +1,93 @@ +/******************************************************************************* + Barefoot Networks FPGA Linux driver + Copyright(c) 2018 - 2019 Barefoot Networks, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms and conditions of the GNU General Public License, + version 2, as published by the Free Software Foundation. + + This program is distributed in the hope it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + + The full GNU General Public License is included in this distribution in + the file called "COPYING". + + Contact Information: + info@barefootnetworks.com + Barefoot Networks, 4750 Patrick Henry Drive, Santa Clara CA 95054 + +*******************************************************************************/ +#ifndef _BF_FPGA_I2C_PRIV_PORTING_H +#define _BF_FPGA_I2C_PRIV_PORTING_H + +/* Allow the use in C++ code. */ +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include + +/* This file contains OS and system specific porting functions declarations. + */ +/* return status compliant with linux system calls */ +#define BF_FPGA_OK 0 +#define BF_FPGA_EINVAL (-EINVAL) +#define BF_FPGA_EIO (-EIO) +#define BF_FPGA_EBUSY (-EBUSY) +#define BF_FPGA_EAGAIN (-EAGAIN) + +/* pci memory access functions */ +static inline void bf_fpga_write32(uint8_t *addr, uint32_t val) { + u8 __iomem *reg_addr = addr; + writel(val, reg_addr); +} + +static inline uint32_t bf_fpga_read32(uint8_t *addr) { + u8 __iomem *reg_addr = addr; + return (readl(reg_addr)); +} + +static inline void bf_fpga_write8(uint8_t *addr, uint8_t val) { + u8 __iomem *reg_addr = addr; + writeb(val, reg_addr); +} + +static inline uint8_t bf_fpga_read8(uint8_t *addr) { + u8 __iomem *reg_addr = addr; + return (readb(reg_addr)); +} + +static inline void bf_fpga_us_delay(unsigned long usecs) { + usleep_range(usecs, usecs + 10); +} + +/* general purpose mutual exclusion lock */ +typedef void *bf_fpga_mutex_t; + +/* fast_lock for locking only non-blocking and quick operations */ +typedef void *bf_fpga_fast_lock_t; + +/* APIs to init/enter/leave critical (exclusive access) regions */ +int bf_fpga_cr_init(bf_fpga_mutex_t *lock); +void bf_fpga_cr_destroy(bf_fpga_mutex_t *lock); +int bf_fpga_cr_enter(bf_fpga_mutex_t *lock); +void bf_fpga_cr_leave(bf_fpga_mutex_t *lock); + +int bf_fpga_fast_lock_init(bf_fpga_fast_lock_t *sl, unsigned int initial); +void bf_fpga_fast_lock_destroy(bf_fpga_fast_lock_t *sl); +int bf_fpga_fast_lock(bf_fpga_fast_lock_t *sl); +void bf_fpga_fast_unlock(bf_fpga_fast_lock_t *sl); + +#ifdef __cplusplus +} +#endif /* C++ */ + +#endif /* _BF_FPGA_I2C_PRIV_PORTING_H */ diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_reg.h b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_reg.h new file mode 100644 index 00000000000..9ad9b31b3b3 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/modules/i2c/bf_fpga_i2c_reg.h @@ -0,0 +1,116 @@ +/******************************************************************************* + Barefoot Networks FPGA Linux driver + Copyright(c) 2018 - 2019 Barefoot Networks, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms and conditions of the GNU General Public License, + version 2, as published by the Free Software Foundation. + + This program is distributed in the hope it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + + The full GNU General Public License is included in this distribution in + the file called "COPYING". + + Contact Information: + info@barefootnetworks.com + Barefoot Networks, 4750 Patrick Henry Drive, Santa Clara CA 95054 + +*******************************************************************************/ +#ifndef _BF_FPGA_I2C_REG_H +#define _BF_FPGA_I2C_REG_H + +/* Allow the use in C++ code. */ +#ifdef __cplusplus +extern "C" { +#endif + +/* registers outsize of all i2c controller register space */ +#define BF_FPGA_I2C_BASE_ADDR 0x0 +#define BF_FPGA_I2C_CTRL_BASE_ADDR(i) (BF_FPGA_I2C_BASE_ADDR + (i * 4096)) + +/* per i2c controller register offset relative to BF_FPGA_I2C_CTRL_BASE_ADDR */ +#define Bf_FPGA_I2C_CTRL_TOP 0 +#define I2C_CTRL_START (1 << 0) +#define I2C_CTRL_RESET (1 << 1) +#define I2C_CTRL_CLK_DIV_SHF (8) +#define I2C_CTRL_CLK_DIV_MASK (0x1FF) + +#define Bf_FPGA_TOP_I2C_STATUS 4 +#define I2C_STS_BUSY (1 << 0) +#define I2C_STS_ERR (1 << 3) + +#define Bf_FPGA_I2C_INST_CTRL(i) (0x10 + (16 * i)) +#define I2C_INST_EN (1 << 31) +#define I2C_INST_PMT (1 << 30) +#define I2C_TYPE_SHF (26) +#define I2C_DELAY_SHF (23) +#define I2C_STOP_ON_ERROR (22) +/* various status values */ +#define I2C_STATUS_MASK 0x3F +#define I2C_STATUS_ERR_MASK 0x3C +#define I2C_STATUS_RUNNING 0x1 +#define I2C_STATUS_COMPLETED 0x2 +#define I2C_STATUS_NACK_ADDR 0x4 +#define I2C_STATUS_NACK_CMD 0x8 +#define I2C_STATUS_NACK_WR_DATA 0x10 +#define I2C_STATUS_TOUT 0x20 + +/* i2c instruction types */ +#define I2C_WR_ADDR_DATA (0 << I2C_TYPE_SHF) +#define I2C_RD_DATA (3 << I2C_TYPE_SHF) +#define I2C_WR_ADDR (2 << I2C_TYPE_SHF) +#define I2C_RD_ADDR_DATA (1 << I2C_TYPE_SHF) +#define I2C_RD_ADDR_DATA_BURST (4 << I2C_TYPE_SHF) +#define I2C_NOP (6 << I2C_TYPE_SHF) + +#define Bf_FPGA_I2C_INST_PARAM(i) (0x14 + (16 * i)) +#define I2C_DEV_ADDR_SHF (24) +#define I2C_CMD_OFFSET (16) +#define I2C_WR_CNT_SHF (8) +#define I2C_RD_CNT_SHF (0) + +#define Bf_FPGA_I2C_INST_DATA_LO(i) (0x18 + (16 * i)) +#define Bf_FPGA_I2C_INST_DATA_HI(i) (0x1C + (16 * i)) +/****************** +#define Bf_FPGA_I2C_PR_CTRL(i) (0x100 + (16 * i)) +#define Bf_FPGA_I2C_PR_PARM(i) (0x104 + (16 * i)) +#define Bf_FPGA_I2C_PR_LO(i) (0x108 + (16 * i)) +#define Bf_FPGA_I2C_PR_HI(i) (0x10C + (16 * i)) +******************/ + +/* data area pointers */ +/* the driver makes fixed static allocation of the available memory + * on per instruction basis + * allocate 128 bytes per one time instruction = total 0x780 bytes + * allocate 64 bytes per one periodic instruction = total 0x400 bytes + * FPGA_I2C_ONESHOT_NUM_INST -> comes from a header file that must be included + * before this file. + */ +#define BF_FPGA_ONE_MAX_BURST 128 +#define BF_FPGA_PR_MAX_BURST 64 +#define BF_FPGA_I2C_DATA_AREA(i) \ + ((i < FPGA_I2C_ONESHOT_NUM_INST) \ + ? (0x200 + (i * BF_FPGA_ONE_MAX_BURST)) \ + : (0x980 + ((i - FPGA_I2C_ONESHOT_NUM_INST) * BF_FPGA_PR_MAX_BURST))) + +#if BF_FPGA_I2C_DATA_AREA(FPGA_I2C_PERIODIC_NUM_INST) > 0x1000 +#error erroneous allocation of FPGA memory to i2c data area. Fix it! +#endif + +#define BF_FPGA_VER_REG 0x3F000 +#define BF_FPGA_BUILD_DATE 0x3F004 +#define BF_FPGA_RESET_CTRL_1 0x3F008 +#define BF_FPGA_RESET_CTRL_2 0x3F00C + +#ifdef __cplusplus +} +#endif /* C++ */ + +#endif /* _BF_FPGA_I2C_REG_H */ diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/bf-sfputil b/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/bf-sfputil new file mode 100755 index 00000000000..3df67614e49 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/bf-sfputil @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd sfputil "$@" diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/eeprom b/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/eeprom new file mode 100755 index 00000000000..07d98556cbb --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/eeprom @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd eeprom "$@" diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/fancontrol b/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/fancontrol new file mode 100755 index 00000000000..515fcbdd69d --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/fancontrol @@ -0,0 +1,11 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd fancontrol "$@" + diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/ps_info b/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/ps_info new file mode 100755 index 00000000000..38c9d333041 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/ps_info @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd ps_info "$@" diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/sensors b/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/sensors new file mode 100755 index 00000000000..07af6955321 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/sensors @@ -0,0 +1,12 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd sensors "$@" + + diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/test b/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/test new file mode 100755 index 00000000000..38327722c91 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/scripts/test @@ -0,0 +1 @@ +echo "test" diff --git a/platform/barefoot/sonic-platform-modules-bfn/LICENSE b/platform/barefoot/sonic-platform-modules-bfn/LICENSE new file mode 100644 index 00000000000..676cdeec726 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/LICENSE @@ -0,0 +1,15 @@ +Copyright (C) 2016 Microsoft, Inc + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/barefoot/sonic-platform-modules-bfn/MAINTAINERS b/platform/barefoot/sonic-platform-modules-bfn/MAINTAINERS new file mode 100644 index 00000000000..b9c62ce0154 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/MAINTAINERS @@ -0,0 +1,4 @@ +# This file describes the maintainers for sonic-platform-modules-bfn +# See the SONiC project governance document for more information + +Mailinglist = sonicproject@googlegroups.com diff --git a/platform/barefoot/sonic-platform-modules-bfn/README.md b/platform/barefoot/sonic-platform-modules-bfn/README.md new file mode 100644 index 00000000000..5dc055a1d9c --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/README.md @@ -0,0 +1,2 @@ +# sonic-platform-modules-bfn +Device drivers for support of BFN platform for the SONiC project diff --git a/platform/barefoot/sonic-platform-modules-bfn/configs/network/interfaces.d/usb0 b/platform/barefoot/sonic-platform-modules-bfn/configs/network/interfaces.d/usb0 new file mode 100644 index 00000000000..f1dd054cc6f --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/configs/network/interfaces.d/usb0 @@ -0,0 +1,5 @@ +# BMC interface +auto usb0 +allow-hotplug usb0 +iface usb0 inet6 +up ifconfig usb0 txqueuelen 64 diff --git a/platform/barefoot/sonic-platform-modules-bfn/debian/changelog b/platform/barefoot/sonic-platform-modules-bfn/debian/changelog new file mode 100644 index 00000000000..984cc0dbfb6 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/debian/changelog @@ -0,0 +1,11 @@ +sonic-platform-modules-bfn (1.1) unstable; urgency=low + + * Remove bfn asic kernel modules from platform package + + -- Support Mon, 22 Oct 2018 15:40:00 -0800 + +sonic-platform-modules-bfn (1.0) unstable; urgency=low + + * Initial release + + -- Support Mon, 11 Nov 2015 11:11:11 -0800 diff --git a/platform/barefoot/sonic-platform-modules-bfn/debian/compat b/platform/barefoot/sonic-platform-modules-bfn/debian/compat new file mode 100644 index 00000000000..45a4fb75db8 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/debian/compat @@ -0,0 +1 @@ +8 diff --git a/platform/barefoot/sonic-platform-modules-bfn/debian/control b/platform/barefoot/sonic-platform-modules-bfn/debian/control new file mode 100644 index 00000000000..04d4c598e9d --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/debian/control @@ -0,0 +1,12 @@ +Source: sonic-platform-modules-bfn +Section: main +Priority: extra +Maintainer: support +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: sonic-platform-modules-bfn +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + diff --git a/platform/barefoot/sonic-platform-modules-bfn/debian/copyright b/platform/barefoot/sonic-platform-modules-bfn/debian/copyright new file mode 100644 index 00000000000..ade42b7aa75 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/debian/copyright @@ -0,0 +1,15 @@ +Provides linux kernel driver for BF PCIe devices + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/barefoot/sonic-platform-modules-bfn/debian/files b/platform/barefoot/sonic-platform-modules-bfn/debian/files new file mode 100644 index 00000000000..1cfb92c60ae --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/debian/files @@ -0,0 +1 @@ +platform-modules-bfn_1.0_amd64.deb main extra diff --git a/platform/barefoot/sonic-platform-modules-bfn/debian/rules b/platform/barefoot/sonic-platform-modules-bfn/debian/rules new file mode 100755 index 00000000000..83cdefe640b --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/debian/rules @@ -0,0 +1,22 @@ +#!/usr/bin/make -f + +PACKAGE_NAME := sonic-platform-modules-bfn +SCRIPT_SRC := $(shell pwd)/scripts +CONFIGS_SRC := $(shell pwd)/configs + +%: + dh $@ + +override_dh_auto_install: + dh_installdirs -p$(PACKAGE_NAME) usr/local/bin + cp -r $(SCRIPT_SRC)/* debian/$(PACKAGE_NAME)/usr/local/bin + dh_installdirs -p$(PACKAGE_NAME) etc/network/interfaces.d/ + cp -r $(CONFIGS_SRC)/network/interfaces.d/* debian/$(PACKAGE_NAME)/etc/network/interfaces.d/ + +override_dh_usrlocal: + +override_dh_pysupport: + +override_dh_clean: + dh_clean + diff --git a/platform/barefoot/sonic-platform-modules-bfn/scripts/bf-sfputil b/platform/barefoot/sonic-platform-modules-bfn/scripts/bf-sfputil new file mode 100755 index 00000000000..3df67614e49 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/scripts/bf-sfputil @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd sfputil "$@" diff --git a/platform/barefoot/sonic-platform-modules-bfn/scripts/eeprom b/platform/barefoot/sonic-platform-modules-bfn/scripts/eeprom new file mode 100755 index 00000000000..07d98556cbb --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/scripts/eeprom @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd eeprom "$@" diff --git a/platform/barefoot/sonic-platform-modules-bfn/scripts/fancontrol b/platform/barefoot/sonic-platform-modules-bfn/scripts/fancontrol new file mode 100755 index 00000000000..515fcbdd69d --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/scripts/fancontrol @@ -0,0 +1,11 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd fancontrol "$@" + diff --git a/platform/barefoot/sonic-platform-modules-bfn/scripts/ps_info b/platform/barefoot/sonic-platform-modules-bfn/scripts/ps_info new file mode 100755 index 00000000000..38c9d333041 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/scripts/ps_info @@ -0,0 +1,10 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd ps_info "$@" diff --git a/platform/barefoot/sonic-platform-modules-bfn/scripts/sensors b/platform/barefoot/sonic-platform-modules-bfn/scripts/sensors new file mode 100755 index 00000000000..07af6955321 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/scripts/sensors @@ -0,0 +1,12 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS syncd sensors "$@" + + diff --git a/platform/barefoot/sonic-platform-modules-bfn/scripts/test b/platform/barefoot/sonic-platform-modules-bfn/scripts/test new file mode 100755 index 00000000000..38327722c91 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-bfn/scripts/test @@ -0,0 +1 @@ +echo "test" diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/.gitignore b/platform/barefoot/sonic-platform-modules-ingrasys/.gitignore new file mode 100644 index 00000000000..c6127b38c1a --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/.gitignore @@ -0,0 +1,52 @@ +# Prerequisites +*.d + +# Object files +*.o +*.ko +*.obj +*.elf + +# Linker output +*.ilk +*.map +*.exp + +# Precompiled Headers +*.gch +*.pch + +# Libraries +*.lib +*.a +*.la +*.lo + +# Shared objects (inc. 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Of course, your program's commands +might be different; for a GUI interface, you would use an "about box". + + You should also get your employer (if you work as a programmer) or school, +if any, to sign a "copyright disclaimer" for the program, if necessary. +For more information on this, and how to apply and follow the GNU GPL, see +. + + The GNU General Public License does not permit incorporating your program +into proprietary programs. If your program is a subroutine library, you +may consider it more useful to permit linking proprietary applications with +the library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. But first, please read +. diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/debian/changelog b/platform/barefoot/sonic-platform-modules-ingrasys/debian/changelog new file mode 100644 index 00000000000..cfbeb17d018 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/debian/changelog @@ -0,0 +1,11 @@ +platform-driver (1.1.0) unstable; urgency=low + + * Add support for s9180-32x s9280-64x + + -- developer Fri, 26 May 2017 11:00:00 +0800 + +platform-driver (1.0.0) unstable; urgency=low + + * Initial release (Closes: #nnnn) + + -- developer Wed, 05 Oct 2016 16:30:45 +0800 diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/debian/compat b/platform/barefoot/sonic-platform-modules-ingrasys/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/debian/control b/platform/barefoot/sonic-platform-modules-ingrasys/debian/control new file mode 100644 index 00000000000..a912ed8ace2 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/debian/control @@ -0,0 +1,14 @@ +Source: platform-driver +Section: unknown +Priority: optional +Maintainer: Wade He +Build-Depends: debhelper (>= 9), dh-systemd +Standards-Version: 1.0.0 + +Package: sonic-platform-ingrasys-s9180-32x +Architecture: amd64 +Description: This package contains S9180-32X platform driver utility for SONiC project. + +Package: sonic-platform-ingrasys-s9280-64x +Architecture: amd64 +Description: This package contains S9280-64X platform driver utility for SONiC project. diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/debian/rules b/platform/barefoot/sonic-platform-modules-ingrasys/debian/rules new file mode 100755 index 00000000000..428b4731eb7 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/debian/rules @@ -0,0 +1,42 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +PACKAGE_PRE_NAME := sonic-platform-ingrasys +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= s9180-32x s9280-64x +MODULE_DIR := modules +UTILS_DIR := utils +SERVICE_DIR := service +CONF_DIR := conf + +%: + dh $@ --with systemd + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} \ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko \ + debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} usr/sbin; \ + cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/*.sh \ + debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/sbin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} lib/systemd/system; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service \ + debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system; \ + done) + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) + diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9180-32x.init b/platform/barefoot/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9180-32x.init new file mode 100644 index 00000000000..9479fa35494 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9180-32x.init @@ -0,0 +1,41 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup S9180-32X board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + + echo "done." + ;; + +stop) + + i2c_utils.sh i2c_deinit + + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/sonic-platform-ingrasys-s9180-32x.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9280-64x.init b/platform/barefoot/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9280-64x.init new file mode 100644 index 00000000000..545ec8e9987 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9280-64x.init @@ -0,0 +1,41 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup S9280-64X board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + + echo "done." + ;; + +stop) + + i2c_utils i2c_deinit + + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/sonic-platform-ingrasys-s9280-64x.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/README.md b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/README.md new file mode 100644 index 00000000000..fa3760ab9ab --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/README.md @@ -0,0 +1,185 @@ +# Ingrasys S9180-32X Platform Driver for SONiC + +Copyright (C) 2016 Ingrasys, Inc. + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + + +## Licensing terms + +The Licensing terms of the files within this project is split 2 parts. +The Linux kernel is released under the GNU General Public License version 2. +All other code is released under the GNU General Public License version 3. +Please see the LICENSE file for copies of both licenses. + +## Contents of this package + + - service/ + > Service config files for platform initialization and monitoring + - utils/ + > Scripts useful during platform bringup and sysfs function + - conf/ + > Platform configure files. + +## Kernel modules and drivers + +The driver for interacting with Ingrasys S9180-32X is contained in the I2C +kernel module and initialization script. The initialization script loads +the modules in the correct order. It has been built and tested against +the Linux 3.16 kernel. + +The initialization script will modprobe the needed modules, navigate to the +module's device directory in sysfs, and write configuration data to +the kernel module. + +### IGB + +This is OOB Ports on front panel for management plane. + +The IGB module must be loaded first on Ingrasys S9180-32X platform. + +### I2C i801 + +The I2C i801 on Ingrasys S9180-32X can be found in +`/sys/bus/i2c/devices/i2c-0/` + +This is I2C bus for Clock Gen, DIMM channel and digital potentiometers. + +The i801 module must be loaded second on Ingrasys S9180-32X. + +### I2C iSMT + +The I2C iSMT module on S9180-32X can be found in +`/sys/bus/i2c/devices/i2c-1/` + +This is I2C bus for CPLD, HWM, power controller and I2C Switches. + +The i801 module must be loaded third on Ingrasys S9180-32X. + +### I2C PCA9548 +The PCA9548 module on S9180-32X can be found in +`/sys/bus/i2c/devices/i2c-2/` , `/sys/bus/i2c/devices/i2c-3/`, +`/sys/bus/i2c/devices/i2c-4/`, `/sys/bus/i2c/devices/i2c-5/`, +`/sys/bus/i2c/devices/i2c-6/`, `/sys/bus/i2c/devices/i2c-7/`, +`/sys/bus/i2c/devices/i2c-8/`, `/sys/bus/i2c/devices/i2c-9/`. + +The pca9548 module for zQSFP module get/set functions, PSU information, +fan status and EEPROM. + +## Hardware components + +The hardware components are initialized in the init script on S9180-32X. +The following describes manual initialization as well as interaction. +The examples below are just for Ingrasys S9180-32X platform. + +### Hardware initialization + +When the sonic-platform-ingrasys-s9180 package is installed on the S9180-32X, +it is automatically initialized. If you want to manual initialization, the +utility command usage as follows: +``` + i2c_utils.sh i2c_init +``` + +### EEPROM + +The EEPROM is including the board SKU, model name, vendor name, serial number, +and other information can be accessed with the specific eeprom kernel module. +After using `modprobe eeprom_mb` to detect the eeprom, it will show up in sysfs. + +The hexdump utility can be used to decode the raw output of the EEPROM. +For example, +``` + bash# echo "mb_eeprom 0x54" > /sys/bus/i2c/devices/i2c-9/new_device + bash# cat /sys/bus/i2c/drivers/mb_eeprom/9-0054/eeprom | hexdump -C +``` + +### Front panel LEDs + +LEDs can be setup on/off by using i2c utility `/usr/sbin/i2c_utils.sh`. +Utility function command usage as follows: + +``` +Status LED: + i2c_utils.sh i2c_sys_led green|amber on|off + +Fan status LED: + i2c_utils.sh i2c_fan_led green|amber on|off + +PSU1 status LED: + i2c_utils.sh i2c_psu1_led green|amber on|off + +PSU2 status LED: + i2c_utils.sh i2c_psu2_led green|amber on|off + +``` +QSFP Module Port LEDs control by ASIC library. + + +### Fan speed + +Fan speed are controlled by the w83795 kernel module. +It can be found in `/sys/class/hwmon/hwmon3/device/`. +If they were compiled as modules, you will need to modprobe w83795 for +their sysfs entries to show up. Each fan has an `fan_input` file +for reading the fan speed. And `pwm1` setting fan1 to fan4, +`pwm2` setting fan5 to fan8. + +There is docker-platform-monitor container installed fancontrol package that can +automatic control platform fan speed. + + +### Temperature sensors + +Temperature sensors are controlled by the w83795 kernel +module. It can be found in `/sys/class/hwmon/hwmon3/device/`. +If they were compiled as modules, then you will need to modprobe w83795 for +their sysfs entries to show up. +`temp1_input` is front MAC temperature sensor. `temp2_input` is rear MAC +temperature sensor. + +There is docker-platform-monitor container installed lm-sensors package that can +monitor platform temperature. And `sensors` command can show each +temperature sensors status. + +### Power supplies + +Power supplies status and its EEPROM info can be used i2c utility +`/usr/sbin/i2c_utils.sh` to get. +The usage as follows: +``` +PSU EEPROM: + i2c_utils.sh i2c_psu_eeprom_get + hexdump -C psu0.rom + hexdump -C psu1.rom + +PSU Status: + i2c_utils.sh i2c_psu_status +``` + +### QSFPs +QSFP modules are managed by the pca9548 kernel driver. +The i2c utility `/usr/sbin/i2c_utils.sh` can be used to get status and +module EEPROM informations. +The usage as follows: +``` +QSFP EEPROM: + i2c_utils.sh i2c_qsfp_eeprom_get [1-32] + +QSFP Insert Event: + i2c_utils.sh i2c_qsfp_eeprom_get [1-32] + 0 => not insert + 1 => inserted +``` + diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/modules/Makefile b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/modules/Makefile new file mode 100644 index 00000000000..df7bfd3e770 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/modules/Makefile @@ -0,0 +1,3 @@ +obj-m := eeprom_mb.o +obj-m+= cpld_wdt.o + diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/modules/cpld_wdt.c b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/modules/cpld_wdt.c new file mode 100644 index 00000000000..4cf70b4b80a --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/modules/cpld_wdt.c @@ -0,0 +1,296 @@ +/* + * CPLD Watchdog Driver + * + * Copyright (c) 2018 Ingrasys Corp. + * + * Author: Wade He + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +/* + * Includes, defines, variables, module parameters, ... + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +/* Module and version information */ +#define DRV_NAME "cpld_wdt" +#define DRV_VERSION "1.0" + +/* Includes */ +#include /* For module specific items */ +#include /* For new moduleparam's */ +#include /* For standard types (like size_t) */ +#include /* For the -ENODEV/... values */ +#include /* For printk/panic/... */ +#include /* For the watchdog specific items */ +#include /* For __init/__exit/... */ +#include /* For file operations */ +#include /* For platform_driver framework */ +#include /* For pci functions */ +#include /* For io-port access */ +#include /* For spin_lock/spin_unlock/... */ +#include /* For copy_to_user/put_user/... */ +#include /* For inb/outb/... */ +#include +#include +#include +#include + + +/* Address definitions for the CPLD */ +/* CPLD base address */ +#define TCOBASE 0x600 +/* SMI Control and Enable Register */ + +#define TCO_RLD (TCOBASE + 0x00) /* TCO Timer Reload and Curr. Value */ +#define TCOv1_TMR (TCOBASE + 0x01) /* TCOv1 Timer Initial Value */ +#define TCO_DAT_IN (TCOBASE + 0x02) /* TCO Data In Register */ +#define TCO_DAT_OUT (TCOBASE + 0x03) /* TCO Data Out Register */ +#define TCO1_STS (TCOBASE + 0x04) /* Control Watchdog Register */ +#define TCO2_STS (TCOBASE + 0x06) /* TCO2 Status Register */ +#define TCO1_CNT (TCOBASE + 0x08) /* TCO1 Control Register */ +#define TCO2_CNT (TCOBASE + 0x0a) /* TCO2 Control Register */ +#define TCOv2_TMR (TCOBASE + 0x12) /* TCOv2 Timer Initial Value */ + +#define DEBUG +#ifdef DEBUG + #define DEBUG_PRINT(fmt, args...) \ + printk (KERN_INFO "%s[%d]: " fmt "\r\n", \ + __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +#define ERROR_MSG(fmt, args...) \ + printk(KERN_ERR "%s[%d]: " fmt "\r\n", \ + __FUNCTION__, __LINE__, ##args) + + + +/* internal variables */ +static struct { /* this is private data for the cpld_wdt device */ + /* the lock for io operations */ + spinlock_t io_lock; + struct platform_device *dev; +} cpld_wdt_private; + +static struct task_struct *cpld_wdt_tsk; +static int data; + +static void device_release(struct device *dev) +{ + return; +} + +static struct platform_device cpld_wdt = { + .name = DRV_NAME, + .id = 0, + .dev = { + .platform_data = NULL, + .release = device_release + }, +}; + +/* module parameters */ +#define WATCHDOG_TIMEOUT 15 /* 15 sec default heartbeat */ +static int heartbeat = WATCHDOG_TIMEOUT; /* in seconds */ +module_param(heartbeat, int, 0); +MODULE_PARM_DESC(heartbeat, "Watchdog ping period in seconds. " + "5..20, default=" + __MODULE_STRING(WATCHDOG_TIMEOUT) ")"); + +static bool nowayout = WATCHDOG_NOWAYOUT; +module_param(nowayout, bool, 0); +MODULE_PARM_DESC(nowayout, + "Watchdog cannot be stopped once started (default=" + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); + + +static int cpld_wdt_check_timeout_range(unsigned int tmrval) +{ + if (tmrval < 5 || tmrval > 20) { + DEBUG_PRINT("heartbeat out of range, using default=%d\n", WATCHDOG_TIMEOUT); + heartbeat = WATCHDOG_TIMEOUT; + } else { + DEBUG_PRINT("heartbeat using %d seconds\n", heartbeat); + } + + return 0; +} + +/* + * Some TCO specific functions + */ + +static int cpld_wdt_stop(void *arg) +{ + + spin_lock(&cpld_wdt_private.io_lock); + + outb(0x1, TCO1_STS); + + DEBUG_PRINT("cpld_wdt_stop done"); + + spin_unlock(&cpld_wdt_private.io_lock); + + return 0; +} + +static int cpld_wdt_ping(void *arg) +{ + spin_lock(&cpld_wdt_private.io_lock); + + /* Reload the timer by writing to the TCO Timer Counter register */ + outb(0x1, TCO1_STS); /* write 1 to clear bit */ + udelay(100); + outb(0x3, TCO1_STS); + + DEBUG_PRINT("cpld_wdt_ping done"); + + spin_unlock(&cpld_wdt_private.io_lock); + return 0; +} + +static int kthread_wdt_ping_loop(void *arg) +{ + int i; + + set_current_state(TASK_INTERRUPTIBLE); + + while(!kthread_should_stop()) { + DEBUG_PRINT("ping start"); + cpld_wdt_ping(NULL); + set_current_state(TASK_INTERRUPTIBLE); + for (i=0;i"); +MODULE_DESCRIPTION("CPLD Watchdog Timer Kernel Driver"); +MODULE_VERSION(DRV_VERSION); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" DRV_NAME); diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/modules/eeprom_mb.c b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/modules/eeprom_mb.c new file mode 100644 index 00000000000..61f0caf9613 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/modules/eeprom_mb.c @@ -0,0 +1,211 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void mb_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t mb_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + mb_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute mb_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = mb_eeprom_read, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int mb_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x50. So decline + attaching to addresses >= 0x51 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x51) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int mb_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &mb_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int mb_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &mb_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id mb_eeprom_id[] = { + { "mb_eeprom", 0 }, + { } +}; + +static struct i2c_driver mb_eeprom_driver = { + .driver = { + .name = "mb_eeprom", + }, + .probe = mb_eeprom_probe, + .remove = mb_eeprom_remove, + .id_table = mb_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = mb_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(mb_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("Ingrasys Mother Borad EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/service/qsfp-monitor.service b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/service/qsfp-monitor.service new file mode 100644 index 00000000000..fde9dcf9f50 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/service/qsfp-monitor.service @@ -0,0 +1,15 @@ +[Unit] +Description= This QSFP Monitor service is to setup QSFP SI. +Requires=s9180-32x-monitor.service +After=s9180-32x-monitor.service + +[Service] +ExecStart=/usr/sbin/qsfp_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/service/s9180-32x-monitor.service b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/service/s9180-32x-monitor.service new file mode 100644 index 00000000000..884284b241a --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/service/s9180-32x-monitor.service @@ -0,0 +1,19 @@ +[Unit] +Description= This Platform Monitor service is to initialize platform and monitor platform. +Before=platform-monitor.service +After=sysinit.target +Wants=fancontrol.service +Wants=qsfp-monitor.service +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/sbin/i2c_utils.sh i2c_init +ExecStart=/usr/sbin/s9180_32x_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/utils/i2c_utils.sh b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/utils/i2c_utils.sh new file mode 100755 index 00000000000..d8e5778f4b0 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/utils/i2c_utils.sh @@ -0,0 +1,1721 @@ +#!/bin/bash + +# Copyright (C) 2017 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# trun on for more debug output +#DEBUG="on" + +VERSION="1.1.0" +TRUE=200 +FALSE=404 + +EXEC_FUNC=${1} +QSFP_PORT=${2} +QSFP_ACTION=${2} +MB_EEPROM_ACTION=${2} +COLOR_PORT_LED=${3} +ONOFF_LED=${3} +COLOR_SYS_LED=${2} +BLINK_LED=${4} +FAN_TRAY=${4} + +############################################################ +# Distributor ID: Debian +# Description: Debian GNU/Linux 8.6 (jessie) +# Release: 8.6 +# Codename: jessie +# Linux debian 3.16.0-4-amd64 #1 +# SMP Debian 3.16.36-1+deb8u1 (2016-09-03) x86_64 GNU/Linux +############################################################ + +# Color Definition +COLOR_TITLE="\e[1;32m" ### Green ### +COLOR_WARNING="\e[1;33m" ### Yellow ### +COLOR_ERROR="\e[1;31m" ### Red ### +COLOR_END="\e[0m" ### END ### + +NUM_I801_DEVICE=0 # Main I2C +NUM_MUX1_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 1 )) # zQSFP I/O 0-7 +NUM_MUX1_CHAN1_DEVICE=$(( ${NUM_MUX1_CHAN0_DEVICE} + 1 )) # zQSFP I/O 8-15 +NUM_MUX1_CHAN2_DEVICE=$(( ${NUM_MUX1_CHAN1_DEVICE} + 1 )) # zQSFP I/O 16-23 +NUM_MUX1_CHAN3_DEVICE=$(( ${NUM_MUX1_CHAN2_DEVICE} + 1 )) # zQSFP I/O 24-31 +NUM_MUX1_CHAN4_DEVICE=$(( ${NUM_MUX1_CHAN3_DEVICE} + 1 )) # zQSFP I/O ABS#, INT +NUM_MUX1_CHAN5_DEVICE=$(( ${NUM_MUX1_CHAN4_DEVICE} + 1 )) # zQSFP I/O LPMODE, RST, MODSEL +NUM_MUX1_CHAN6_DEVICE=$(( ${NUM_MUX1_CHAN5_DEVICE} + 1 )) # MAC CLK CPLD +NUM_MUX1_CHAN7_DEVICE=$(( ${NUM_MUX1_CHAN6_DEVICE} + 1 )) # P1V0 PWR +NUM_MUX3_CHAN0_DEVICE=$(( ${NUM_MUX1_CHAN7_DEVICE} + 1 )) # zQSFP I/O 0-7 +NUM_MUX4_CHAN0_DEVICE=$(( ${NUM_MUX3_CHAN0_DEVICE} + 8 )) # zQSFP I/O 8-15 +NUM_MUX5_CHAN0_DEVICE=$(( ${NUM_MUX4_CHAN0_DEVICE} + 8 )) # zQSFP I/O 16-23 +NUM_MUX6_CHAN0_DEVICE=$(( ${NUM_MUX5_CHAN0_DEVICE} + 8 )) # zQSFP I/O 24-31 +NUM_MUX7_CHAN0_DEVICE=$(( ${NUM_MUX6_CHAN0_DEVICE} + 8 )) # Temp Sensor 0x48-0x4D +NUM_MAIN_MUX_CHAN0_DEVICE=$(( ${NUM_MUX7_CHAN0_DEVICE} + 8 )) # System LED HWMON +NUM_MAIN_MUX_CHAN1_DEVICE=$(( ${NUM_MAIN_MUX_CHAN0_DEVICE} + 1 )) # System LED +NUM_MAIN_MUX_CHAN2_DEVICE=$(( ${NUM_MAIN_MUX_CHAN0_DEVICE} + 2 )) # Board ID +NUM_MAIN_MUX_CHAN3_DEVICE=$(( ${NUM_MAIN_MUX_CHAN0_DEVICE} + 3 )) # MAX_Slave +NUM_MAIN_MUX_CHAN4_DEVICE=$(( ${NUM_MAIN_MUX_CHAN0_DEVICE} + 4 )) # TEMP Sensor +NUM_MAIN_MUX_CHAN5_DEVICE=$(( ${NUM_MAIN_MUX_CHAN0_DEVICE} + 5 )) # CLK GEN +NUM_MAIN_MUX_CHAN6_DEVICE=$(( ${NUM_MAIN_MUX_CHAN0_DEVICE} + 6 )) # VDD CORE +NUM_MAIN_MUX_CHAN7_DEVICE=$(( ${NUM_MAIN_MUX_CHAN0_DEVICE} + 7 )) # HWMON +NUM_FRU_MUX_CHAN0_DEVICE=$(( ${NUM_MAIN_MUX_CHAN0_DEVICE} + 8 )) # PSU2 +NUM_FRU_MUX_CHAN1_DEVICE=$(( ${NUM_FRU_MUX_CHAN0_DEVICE} + 1 )) # PSU1 +NUM_FRU_MUX_CHAN2_DEVICE=$(( ${NUM_FRU_MUX_CHAN0_DEVICE} + 2 )) # FAN +NUM_CPLD_DEVICE=$(( ${NUM_MUX7_CHAN0_DEVICE} + 3 )) # CPLD +NUM_SFP1_DEVICE=$(( ${NUM_MUX7_CHAN0_DEVICE} + 4 )) # CPLD +NUM_SFP2_DEVICE=$(( ${NUM_MUX7_CHAN0_DEVICE} + 5 )) # CPLD +NUM_ROV_DEVICE=${NUM_MAIN_MUX_CHAN6_DEVICE} + +PATH_SYS_I2C_DEVICES="/sys/bus/i2c/devices" +PATH_HWMON_ROOT_DEVICES="/sys/class/hwmon" +PATH_HWMON_W83795_DEVICE="${PATH_HWMON_ROOT_DEVICES}/hwmon1" +PATH_I801_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_I801_DEVICE}" +PATH_ISMT_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_ISMT_DEVICE}" +PATH_MUX_CHAN0_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN0_DEVICE}" +PATH_MUX_CHAN1_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN1_DEVICE}" +PATH_MUX_CHAN2_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN2_DEVICE}" +PATH_MUX_CHAN3_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN3_DEVICE}" +PATH_MUX_CHAN4_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN4_DEVICE}" +PATH_MUX_CHAN5_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN5_DEVICE}" +PATH_MUX_CHAN6_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN6_DEVICE}" +PATH_MUX_CHAN7_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN7_DEVICE}" +PATH_MUX7_CHAN0_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX7_CHAN0_DEVICE}" +PATH_MAIN_MUX_CHAN0_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MAIN_MUX_CHAN0_DEVICE}" + +# i2c address for deviecs +CPLD_I2C_ADDR=0x33 +ROV_I2C_ADDR=0x22 + +#Power Supply Status +PSU_DC_ON=1 +PSU_DC_OFF=0 +PSU_EXIST=1 +PSU_NOT_EXIST=0 + +# vdd value for mac +rov_val_array=( 0.85 0.82 0.77 0.87 0.74 0.84 0.79 0.89 ) +rov_reg_array=( 0x24 0x21 0x1c 0x26 0x19 0x23 0x1e 0x28 ) + +#GPIO Offset +GPIO_OFFSET=0 + +# Help usage function +function _help { + echo "=========================================================" + echo "# Description: Help Function" + echo "# Version : ${VERSION}" + echo "=========================================================" + echo "----------------------------------------------------" + echo "EX : ${0} help" + echo " : ${0} i2c_init" + echo " : ${0} i2c_deinit" + echo " : ${0} i2c_temp_init" + echo " : ${0} i2c_fan_init" + echo " : ${0} i2c_volmon_init" + echo " : ${0} i2c_io_exp_init" + echo " : ${0} i2c_gpio_init" + echo " : ${0} i2c_gpio_deinit" + + echo " : ${0} i2c_psu_eeprom_get" + echo " : ${0} i2c_mb_eeprom_get" + echo " : ${0} i2c_cpu_eeprom_get" + echo " : ${0} i2c_qsfp_eeprom_get [1-34]" + echo " : ${0} i2c_qsfp_eeprom_init new|delete" + echo " : ${0} i2c_sfp_eeprom_init new|delete" + echo " : ${0} i2c_mb_eeprom_init new|delete" + echo " : ${0} i2c_psu_eeprom_init new|delete" + echo " : ${0} i2c_qsfp_status_get [1-34]" + echo " : ${0} i2c_qsfp_type_get [1-34]" + echo " : ${0} i2c_qsfp_ddm_get [1-34]" + echo " : ${0} i2c_board_type_get" + echo " : ${0} i2c_psu_status" + echo " : ${0} i2c_led_psu_status_set" + echo " : ${0} i2c_led_fan_status_set" + echo " : ${0} i2c_led_fan_tray_status_set" + echo " : ${0} i2c_cpld_version" + echo " : ${0} i2c_port_led_set [1-34] green|yellow|off blink|noblink" + echo " : ${0} i2c_test_all" + echo " : ${0} i2c_sys_led green|amber" + echo " : ${0} i2c_fan_led green|amber on|off" + echo " : ${0} i2c_psu1_led green|amber" + echo " : ${0} i2c_psu2_led green|amber" + echo " : ${0} i2c_fan_tray_led green|amber on|off [1-4]" + echo "----------------------------------------------------" +} + +#Pause function +function _pause { + read -p "$*" +} + +#Retry command function +function _retry { + local i + for i in {1..5}; + do + eval "${*}" && break || echo "retry"; sleep 1; + done +} + +#I2C Init +function _i2c_init { + echo "=========================================================" + echo "# Description: I2C Init" + echo "=========================================================" + + rmmod eeprom + rmmod i2c_i801 + modprobe i2c_i801 + modprobe i2c_dev + modprobe i2c_mux_pca954x force_deselect_on_exit=1 + #modprobe cpld_wdt + + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x70' > ${PATH_I801_DEVICE}/new_device" + else + echo "${PATH_I801_DEVICE} 0x70 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX3_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x71' > ${PATH_MUX_CHAN0_DEVICE}/new_device" + else + echo "${PATH_MUX_CHAN0_DEVICE} 0x71 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX4_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x71' > ${PATH_MUX_CHAN1_DEVICE}/new_device" + else + echo "${PATH_MUX_CHAN1_DEVICE} 0x71 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX5_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x71' > ${PATH_MUX_CHAN2_DEVICE}/new_device" + else + echo "${PATH_MUX_CHAN2_DEVICE} 0x71 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX6_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x71' > ${PATH_MUX_CHAN3_DEVICE}/new_device" + else + echo "${PATH_MUX_CHAN3_DEVICE} 0x71 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX7_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x71' > ${PATH_MUX_CHAN6_DEVICE}/new_device" + else + echo "${PATH_MUX_CHAN6_DEVICE} 0x71 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MAIN_MUX_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x76' > ${PATH_I801_DEVICE}/new_device" + else + echo "${PATH_MAIN_MUX_CHAN0_DEVICE} 0x76 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_FRU_MUX_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9545 0x72' > ${PATH_I801_DEVICE}/new_device" + else + echo "${PATH_MAIN_MUX_CHAN0_DEVICE} 0x72 already init." + fi + + rmmod coretemp + rmmod jc42 + rmmod w83795 + rmmod lm75 + rmmod lm90 + rmmod eeprom + modprobe coretemp + modprobe w83795 + modprobe lm75 + modprobe lm90 + modprobe eeprom_mb + modprobe gpio-pca953x + _i2c_io_exp_init + _i2c_fan_init + _i2c_volmon_init + _i2c_fan_speed_init + _i2c_temp_init + modprobe jc42 + rmmod gpio_ich + _i2c_gpio_init + modprobe gpio_ich + _i2c_mb_eeprom_init "new" + _i2c_qsfp_eeprom_init "new" + _i2c_sfp_eeprom_init "new" + _i2c_psu_eeprom_init "new" + _i2c_led_psu_status_set + _i2c_led_fan_status_set + _i2c_led_fan_tray_status_set + + # rov for mac init + _mac_vdd_init + + #SYS LED set green + COLOR_SYS_LED="green" + _i2c_sys_led + +} + +function _mac_vdd_init { + # read mac vid register value from CPLD + val=`i2cget -y ${NUM_CPLD_DEVICE} ${CPLD_I2C_ADDR} 0x42 2>/dev/null` + + # get vid form register value [0:2] + vid=$(($val & 0x7)) + + # get rov val and reg according to vid + rov_val=${rov_val_array[$vid]} + rov_reg=${rov_reg_array[$vid]} + echo "vid=${vid}, rov_val=${rov_val}, rov_reg=${rov_reg}" + + # write the rov reg to rov + i2cset -y -r ${NUM_ROV_DEVICE} ${ROV_I2C_ADDR} 0x21 ${rov_reg} w + + if [ $? -eq 0 ]; then + echo "set ROV for mac vdd done" + else + echo "set ROV for mac vdd fail" + fi +} + +#I2C Deinit +function _i2c_deinit { + _i2c_gpio_deinit + for mod in coretemp jc42 w83795 lm75 lm90 eeprom eeprom_mb gpio-pca953x i2c_mux_pca954x i2c_ismt i2c_i801; + do + [ "$(lsmod | grep "^$mod ")" != "" ] && rmmod $mod + done +} + +#FAN Init +function _i2c_fan_speed_init { + echo -n "FAN INIT..." + if [ -e "${PATH_HWMON_W83795_DEVICE}" ]; then + echo 120 > ${PATH_HWMON_W83795_DEVICE}/device/pwm1 + echo 120 > ${PATH_HWMON_W83795_DEVICE}/device/pwm2 + echo "SUCCESS" + else + echo "FAIL" + fi + +} + +#VOLMON Init +function _i2c_volmon_init { + echo "VOLMON INIT..." + i2cset -y -r ${NUM_MAIN_MUX_CHAN7_DEVICE} 0x2F 0x00 0x80 + i2cset -y -r ${NUM_MAIN_MUX_CHAN7_DEVICE} 0x2F 0x01 0x1C + i2cset -y -r ${NUM_MAIN_MUX_CHAN7_DEVICE} 0x2F 0x00 0x80 + i2cset -y -r ${NUM_MAIN_MUX_CHAN7_DEVICE} 0x2F 0x02 0xFF + i2cset -y -r ${NUM_MAIN_MUX_CHAN7_DEVICE} 0x2F 0x03 0x50 + i2cset -y -r ${NUM_MAIN_MUX_CHAN7_DEVICE} 0x2F 0x04 0x0A + i2cset -y -r ${NUM_MAIN_MUX_CHAN7_DEVICE} 0x2F 0x00 0x80 + i2cset -y -r ${NUM_MAIN_MUX_CHAN7_DEVICE} 0x2F 0x01 0x1D + + # add w83795 to sysfs + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MAIN_MUX_CHAN7_DEVICE}-0x2f" + if ! [ -L ${dev_path} ]; then + echo "w83795adg 0x2f" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MAIN_MUX_CHAN7_DEVICE}/new_device #hwmon + else + echo "${dev_path} already exist" + fi + echo "Done" +} + +#IO Expander Init +function _i2c_io_exp_init { + echo "=========================================================" + echo "# Description: I2C IO Expender Init" + echo "=========================================================" + + #Golden Finger to active CPLD + i2cget -y ${NUM_CPLD_DEVICE} 0x74 2 + #BMC dummy board reset + echo "BMC dummy board reset" + i2cset -y -r ${NUM_I801_DEVICE} 0x26 4 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x26 5 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x26 2 0x3F + i2cset -y -r ${NUM_I801_DEVICE} 0x26 3 0x1F + i2cset -y -r ${NUM_I801_DEVICE} 0x26 6 0xD0 + i2cset -y -r ${NUM_I801_DEVICE} 0x26 7 0x00 + + #CPU Baord + i2cset -y -r ${NUM_I801_DEVICE} 0x77 6 0xFF + i2cset -y -r ${NUM_I801_DEVICE} 0x77 7 0xFF + + #SMBUS1 + #ABS + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x20 6 0xFF + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x20 7 0xFF + + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x21 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x21 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x21 6 0xFF + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x21 7 0xFF + + #Transcevior INT + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 6 0xFF + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 7 0xFF + + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x23 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x23 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x23 2 0xCF + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x23 3 0xF0 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x23 6 0xCF + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x23 7 0xF0 + + #SFP+ PRES, TX FAULT, TX DIS, RX LOS, RS, TS + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x27 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x27 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x27 2 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x27 3 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x27 6 0xCF + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x27 7 0xF0 + + + echo "Init ZQSFP IO Expender" + echo "set ZQSFP LP_MODE = 0" + #set ZQSFP LP_MODE = 0 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 2 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 3 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 6 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 7 0x00 + + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x21 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x21 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x21 2 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x21 3 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x21 6 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x21 7 0x00 + + echo "set ZQSFP RST = 1" + #set ZQSFP RST = 1 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x22 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x22 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x22 2 0xFF + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x22 3 0xFF + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x22 6 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x22 7 0x00 + + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x23 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x23 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x23 2 0xFF + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x23 3 0xFF + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x23 6 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x23 7 0x00 + + #0.0: TH_RST_L - 0:Reset + #0.1: TH_PCIE_RST_L - 0:Reset + #0.2: LED_CLR - 0: Off, 1:On + #0.3: Host to BMC + #0.4: UART_SEL - 0:Host + #0.5: USB_SEL - 0: Host + #0.[7:6]: TH_CLK_FSEL (00) + #1.0: TH_INT_L + #1.1: QSFP0_INT_L - 0:Interrupt + #1.2: QSFP1_INT_L - 0:Interrupt + #1.3: QSFP2_INT_L - 0:Interrupt + #1.4: QSFP3_INT_L - 0:Interrupt + #1.5: TH_CLK_SEL (0) + #1.6: I210_RST_L - 0:Reset + #1.6: I210_PE_RST_L - 0:Reset + echo "Init HOST GPIO" + i2cset -y -r ${NUM_I801_DEVICE} 0x74 4 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x74 5 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x74 2 0x0F + i2cset -y -r ${NUM_I801_DEVICE} 0x74 3 0xDF + i2cset -y -r ${NUM_I801_DEVICE} 0x74 6 0x08 + i2cset -y -r ${NUM_I801_DEVICE} 0x74 7 0x1F + + + #LED board after PVT (BAREFOOT_IO_EXP_LED_ID) + echo "Init LED IO Expender" + echo "LED_CHANNEL=${NUM_MAIN_MUX_CHAN1_DEVICE}" + i2cset -y -r ${NUM_MAIN_MUX_CHAN1_DEVICE} 0x75 4 0x00 + i2cset -y -r ${NUM_MAIN_MUX_CHAN1_DEVICE} 0x75 5 0x00 + i2cset -y -r ${NUM_MAIN_MUX_CHAN1_DEVICE} 0x75 6 0x00 + i2cset -y -r ${NUM_MAIN_MUX_CHAN1_DEVICE} 0x75 7 0xFF + + #Board ID + echo "Init Board ID" + i2cset -y -r ${NUM_MAIN_MUX_CHAN2_DEVICE} 0x27 4 0x00 + i2cset -y -r ${NUM_MAIN_MUX_CHAN2_DEVICE} 0x27 5 0x00 + i2cset -y -r ${NUM_MAIN_MUX_CHAN2_DEVICE} 0x27 6 0xFF + i2cset -y -r ${NUM_MAIN_MUX_CHAN2_DEVICE} 0x27 7 0xFF + + #Board ID of dummy card + echo "Init Board ID of dummy card" + i2cset -y -r ${NUM_I801_DEVICE} 0x24 4 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x24 5 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x24 6 0xFF + i2cset -y -r ${NUM_I801_DEVICE} 0x24 7 0xFF + + #PSU I/O (BAREFOOT_IO_EXP_PSU_ID) + echo "Init PSU IO Expender" + i2cset -y -r ${NUM_I801_DEVICE} 0x25 4 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x25 5 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x25 2 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x25 3 0x1D + i2cset -y -r ${NUM_I801_DEVICE} 0x25 6 0xDB + i2cset -y -r ${NUM_I801_DEVICE} 0x25 7 0x03 + + #FAN I/O (BAREFOOT_IO_EXP_FAN_ID) + echo "Init FAN IO Expender" + i2cset -y -r ${NUM_FRU_MUX_CHAN2_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_FRU_MUX_CHAN2_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_FRU_MUX_CHAN2_DEVICE} 0x20 2 0x11 + i2cset -y -r ${NUM_FRU_MUX_CHAN2_DEVICE} 0x20 3 0x11 + i2cset -y -r ${NUM_FRU_MUX_CHAN2_DEVICE} 0x20 6 0xCC + i2cset -y -r ${NUM_FRU_MUX_CHAN2_DEVICE} 0x20 7 0xCC + +} + +#FANIN Init +function _i2c_fan_init { + echo "FANIN INIT..." + # enable fan monitor on w83795 + # 4 fantray with 8 FANIN + # select bank0 + i2cset -y -r ${NUM_MAIN_MUX_CHAN7_DEVICE} 0x2F 0x00 0x80 + # enable FANIN1~8 + i2cset -y -r ${NUM_MAIN_MUX_CHAN7_DEVICE} 0x2F 0x06 0xFF + # disable FANIN9~14 + i2cset -y -r ${NUM_MAIN_MUX_CHAN7_DEVICE} 0x2F 0x07 0x00 + + # select bank 2 + i2cset -y -r ${NUM_MAIN_MUX_CHAN7_DEVICE} 0x2F 0x00 0x82 + # set PWM mode in FOMC + i2cset -y -r ${NUM_MAIN_MUX_CHAN7_DEVICE} 0x2F 0x0F 0x00 + + echo "Done" +} + +# To set the global variable GPIO_OFFSET +function _set_gpio_offset { + GPIO_OFFSET=0 + for d in `ls /sys/class/gpio/ | grep gpiochip` + do + gpiochip_no=${d##gpiochip} + if [ $gpiochip_no -gt 255 ]; then + GPIO_OFFSET=256 + break + fi + done + #echo "set GPIO_OFFSET=${GPIO_OFFSET}" +} + +#GPIO Init +function _i2c_gpio_init { + local i=0 + #ABS Port 0-15 + echo "pca9535 0x20" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/new_device + _set_gpio_offset + #for i in {240..255}; + for((i=${GPIO_OFFSET}+240;i<=${GPIO_OFFSET}+255;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + done + + #ABS Port 16-31 + echo "pca9535 0x21" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/new_device + #for i in {224..239}; + for((i=${GPIO_OFFSET}+224;i<=${GPIO_OFFSET}+239;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + done + + #INT Port 0-15 + echo "pca9535 0x22" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/new_device + #for i in {208..223}; + for((i=${GPIO_OFFSET}+208;i<=${GPIO_OFFSET}+223;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + done + + #INT Port 16-31 + echo "pca9535 0x23" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/new_device + #for i in {192..207}; + for((i=${GPIO_OFFSET}+192;i<=${GPIO_OFFSET}+207;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + done + + #SFP+ + echo "pca9535 0x27" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/new_device + #for i in {176..191}; + for((i=${GPIO_OFFSET}+176;i<=${GPIO_OFFSET}+191;i++)); + do + echo $i > /sys/class/gpio/export + case ${i} in + #176|177|178|179|182|183|188|189|190|191) + $((${GPIO_OFFSET}+176)) | \ + $((${GPIO_OFFSET}+177)) | \ + $((${GPIO_OFFSET}+178)) | \ + $((${GPIO_OFFSET}+179)) | \ + $((${GPIO_OFFSET}+182)) | \ + $((${GPIO_OFFSET}+183)) | \ + $((${GPIO_OFFSET}+188)) | \ + $((${GPIO_OFFSET}+189)) | \ + $((${GPIO_OFFSET}+190)) | \ + $((${GPIO_OFFSET}+191)) ) + echo 1 > /sys/class/gpio/gpio${i}/active_low + ;; + #180|181|184|185|186|187) + $((${GPIO_OFFSET}+180)) | \ + $((${GPIO_OFFSET}+181)) | \ + $((${GPIO_OFFSET}+184)) | \ + $((${GPIO_OFFSET}+185)) | \ + $((${GPIO_OFFSET}+186)) | \ + $((${GPIO_OFFSET}+187)) ) + echo out > /sys/class/gpio/gpio${i}/direction + ;; + esac + + done + #echo 176 > /sys/class/gpio/export + #echo 177 > /sys/class/gpio/export + #echo 178 > /sys/class/gpio/export + #echo 179 > /sys/class/gpio/export + #echo 180 > /sys/class/gpio/export + #echo 181 > /sys/class/gpio/export + #echo 182 > /sys/class/gpio/export + #echo 183 > /sys/class/gpio/export + #echo 184 > /sys/class/gpio/export + #echo 185 > /sys/class/gpio/export + #echo 186 > /sys/class/gpio/export + #echo 187 > /sys/class/gpio/export + #echo 188 > /sys/class/gpio/export + #echo 189 > /sys/class/gpio/export + #echo 190 > /sys/class/gpio/export + #echo 191 > /sys/class/gpio/export + #echo 1 > /sys/class/gpio/gpio176/active_low #SFP+0 ABS + #echo 1 > /sys/class/gpio/gpio177/active_low #SFP+1 ABS + #echo 1 > /sys/class/gpio/gpio178/active_low #SFP+0 TX_FAULT + #echo 1 > /sys/class/gpio/gpio179/active_low #SFP+1 TX_FAULT + #echo out > /sys/class/gpio/gpio180/direction #SFP+0 TX_DIS + #echo out > /sys/class/gpio/gpio181/direction #SFP+1 TX_DIS + #echo 1 > /sys/class/gpio/gpio182/active_low #SFP+0 RX_LOS + #echo 1 > /sys/class/gpio/gpio183/active_low #SFP+1 RX_LOS + #echo out > /sys/class/gpio/gpio184/direction #SFP+0 RS + #echo out > /sys/class/gpio/gpio185/direction #SFP+1 RS + #echo out > /sys/class/gpio/gpio186/direction #SFP+0 TS + #echo out > /sys/class/gpio/gpio187/direction #SFP+1 TS + #echo 1 > /sys/class/gpio/gpio188/active_low #N/A + #echo 1 > /sys/class/gpio/gpio189/active_low #N/A + #echo 1 > /sys/class/gpio/gpio190/active_low #N/A + #echo 1 > /sys/class/gpio/gpio191/active_low #N/A + + #LP Mode Port 0-15 + echo "pca9535 0x20" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/new_device + #for i in {160..175}; + for((i=${GPIO_OFFSET}+160;i<=${GPIO_OFFSET}+175;i++)); + do + echo $i > /sys/class/gpio/export + echo out > /sys/class/gpio/gpio${i}/direction + done + + #LP Mode Port 16-31 + echo "pca9535 0x21" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/new_device + #for i in {144..159}; + for((i=${GPIO_OFFSET}+144;i<=${GPIO_OFFSET}+159;i++)); + do + echo $i > /sys/class/gpio/export + echo out > /sys/class/gpio/gpio${i}/direction + done + + #RST Port 0-15 + echo "pca9535 0x22" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/new_device + #for i in {128..143}; + for((i=${GPIO_OFFSET}+128;i<=${GPIO_OFFSET}+143;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + echo low > /sys/class/gpio/gpio${i}/direction + #echo out > /sys/class/gpio/gpio${i}/direction + #echo 0 > /sys/class/gpio/gpio${i}/value + done + + #RST Port 16-31 + echo "pca9535 0x23" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/new_device + #for i in {112..127}; + for((i=${GPIO_OFFSET}+112;i<=${GPIO_OFFSET}+127;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + echo low > /sys/class/gpio/gpio${i}/direction + #echo out > /sys/class/gpio/gpio${i}/direction + #echo 0 > /sys/class/gpio/gpio${i}/value + done + + #PSU I/O on Dummy Board 0x25 + echo "pca9535 0x25" > /sys/bus/i2c/devices/i2c-${NUM_I801_DEVICE}/new_device + #for i in {96..111}; + for((i=${GPIO_OFFSET}+96;i<=${GPIO_OFFSET}+111;i++)); + do + echo $i > /sys/class/gpio/export + case ${i} in + #97|98|100|101|102|105|106|108) + $((${GPIO_OFFSET}+97)) | \ + $((${GPIO_OFFSET}+98)) | \ + $((${GPIO_OFFSET}+100)) | \ + $((${GPIO_OFFSET}+101)) | \ + $((${GPIO_OFFSET}+102)) | \ + $((${GPIO_OFFSET}+105)) | \ + $((${GPIO_OFFSET}+106)) | \ + $((${GPIO_OFFSET}+108)) ) + echo 1 > /sys/class/gpio/gpio${i}/active_low + ;; + #98|101|106|107|108) + $((${GPIO_OFFSET}+98)) | \ + $((${GPIO_OFFSET}+101)) | \ + $((${GPIO_OFFSET}+106)) | \ + $((${GPIO_OFFSET}+107)) | \ + $((${GPIO_OFFSET}+108)) ) + echo out > /sys/class/gpio/gpio${i}/direction + ;; + esac + done +} + +#GPIO DeInit +function _i2c_gpio_deinit { + for((i=${GPIO_OFFSET}+96;i<=${GPIO_OFFSET}+255;i++)); + do + if [ -e "/sys/class/gpio/gpio${i}" ]; then + echo ${i} > /sys/class/gpio/unexport + fi + done + echo "0x20" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/delete_device + echo "0x21" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/delete_device + echo "0x22" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/delete_device + echo "0x23" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/delete_device + echo "0x27" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/delete_device + echo "0x20" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/delete_device + echo "0x21" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/delete_device + echo "0x22" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/delete_device + echo "0x23" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/delete_device + echo "0x25" > /sys/bus/i2c/devices/i2c-${NUM_I801_DEVICE}/delete_device +} + +#TMP75 Init +function _i2c_temp_init { + echo "lm86 0x4c" > ${PATH_MUX7_CHAN0_DEVICE}/new_device # ASIC Coretemp and Front MAC + echo "tmp75 0x4f" > ${PATH_I801_DEVICE}/new_device #CPU Board + echo "tmp75 0x48" > ${PATH_MUX7_CHAN0_DEVICE}/new_device # Near PSU1 + echo "tmp75 0x4a" > ${PATH_MUX7_CHAN0_DEVICE}/new_device # Rear MAC + echo "tmp75 0x4b" > ${PATH_MUX7_CHAN0_DEVICE}/new_device # Near Port 32 + echo "tmp75 0x4d" > ${PATH_MUX7_CHAN0_DEVICE}/new_device # Near PSU2 +} + +#Set FAN Tray LED +function _i2c_led_fan_tray_status_set { + echo "FAN Tray Status Setup" + #FAN Status get + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN2_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan2_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN4_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan4_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN6_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan6_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + FAN8_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan8_alarm` + + # check if io expander for fan tray exist + #i2cset -m $mask -y -r ${NUM_FRU_MUX_CHAN2_DEVICE} $i2cAddr $ioPort 0x33 + result=`i2cget -y ${NUM_FRU_MUX_CHAN2_DEVICE} 0x20 0 2>/dev/null` + err_code=$? + if [ "$err_code" != "0" ]; then + echo "fan tray not exist!" + return + fi + + if [ "${FAN1_ALARM}" == "0" ] && [ "${FAN2_ALARM}" == "0" ]; then + FAN_TRAY=1 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_SYS_LED="green" + ONOFF_LED="on" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_SYS_LED="amber" + ONOFF_LED="off" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=1 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_SYS_LED="green" + ONOFF_LED="off" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_SYS_LED="amber" + ONOFF_LED="on" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + if [ "${FAN3_ALARM}" == "0" ] && [ "${FAN4_ALARM}" == "0" ]; then + FAN_TRAY=2 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_SYS_LED="green" + ONOFF_LED="on" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_SYS_LED="amber" + ONOFF_LED="off" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=2 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_SYS_LED="green" + ONOFF_LED="off" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_SYS_LED="amber" + ONOFF_LED="on" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + if [ "${FAN5_ALARM}" == "0" ] && [ "${FAN6_ALARM}" == "0" ]; then + FAN_TRAY=3 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_SYS_LED="green" + ONOFF_LED="on" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_SYS_LED="amber" + ONOFF_LED="off" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=3 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_SYS_LED="green" + ONOFF_LED="off" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_SYS_LED="amber" + ONOFF_LED="on" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + if [ "${FAN7_ALARM}" == "0" ] && [ "${FAN8_ALARM}" == "0" ]; then + FAN_TRAY=4 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_SYS_LED="green" + ONOFF_LED="on" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_SYS_LED="amber" + ONOFF_LED="off" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=4 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_SYS_LED="green" + ONOFF_LED="off" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_SYS_LED="amber" + ONOFF_LED="on" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi +} + +#Set FAN LED +function _i2c_led_fan_status_set { + echo "FAN Status Setup" + #PSU Status set + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN2_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan2_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN4_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan4_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN6_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan6_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + FAN8_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan8_alarm` + + echo "led_fan setup..." + # all fan ok + if [ "${FAN1_ALARM}" == "0" ] && [ "${FAN2_ALARM}" == "0" ] \ + && [ "${FAN3_ALARM}" == "0" ] && [ "${FAN4_ALARM}" == "0" ] \ + && [ "${FAN5_ALARM}" == "0" ] && [ "${FAN6_ALARM}" == "0" ] \ + && [ "${FAN7_ALARM}" == "0" ] && [ "${FAN8_ALARM}" == "0" ]; then + COLOR_SYS_LED="green" + ONOFF_LED="on" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_led + # all fan fail + elif [ "${FAN1_ALARM}" == "1" ] && [ "${FAN2_ALARM}" == "1" ] \ + && [ "${FAN3_ALARM}" == "1" ] && [ "${FAN4_ALARM}" == "1" ] \ + && [ "${FAN5_ALARM}" == "1" ] && [ "${FAN6_ALARM}" == "1" ] \ + && [ "${FAN7_ALARM}" == "1" ] && [ "${FAN8_ALARM}" == "1" ]; then + COLOR_SYS_LED="green" + ONOFF_LED="off" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_led + # partial fan fail + else + COLOR_SYS_LED="amber" + ONOFF_LED="on" + echo "${COLOR_SYS_LED} ${ONOFF_LED}" + _i2c_fan_led + fi +} + +#Set QSFP Port variable +function _qsfp_port_i2c_var_set { + local port=$1 + case ${port} in + 1|2|3|4|5|6|7|8) + i2cbus=${NUM_MUX1_CHAN4_DEVICE} + regAddr=0x20 + dataAddr=0 + eeprombusbase=${NUM_MUX3_CHAN0_DEVICE} + gpioBase=$((${GPIO_OFFSET}+240)) + #gpioBase=240 + ;; + 9|10|11|12|13|14|15|16) + i2cbus=${NUM_MUX1_CHAN4_DEVICE} + regAddr=0x20 + dataAddr=1 + eeprombusbase=${NUM_MUX4_CHAN0_DEVICE} + gpioBase=$((${GPIO_OFFSET}+240)) + #gpioBase=240 + ;; + 17|18|19|20|21|22|23|24) + i2cbus=${NUM_MUX1_CHAN4_DEVICE} + regAddr=0x21 + dataAddr=0 + eeprombusbase=${NUM_MUX5_CHAN0_DEVICE} + gpioBase=$((${GPIO_OFFSET}+224-16)) + #gpioBase=$((224 - 16)) + ;; + 25|26|27|28|29|30|31|32) + i2cbus=${NUM_MUX1_CHAN4_DEVICE} + regAddr=0x21 + dataAddr=1 + eeprombusbase=${NUM_MUX6_CHAN0_DEVICE} + gpioBase=$((${GPIO_OFFSET}+224-16)) + #gpioBase=$((224 - 16)) + ;; + 33) + i2cbus=${NUM_MUX1_CHAN7_DEVICE} + regAddr=0x27 + dataAddr=0 + gpioBase=$((${GPIO_OFFSET}+145)) + #gpioBase=145 + ;; + 34) + i2cbus=${NUM_MUX1_CHAN7_DEVICE} + regAddr=0x27 + dataAddr=1 + gpioBase=$((${GPIO_OFFSET}+143)) + #gpioBase=143 + ;; + *) + echo "Please input 1~34" + exit + ;; + esac +} + +#Set QSFP Port variable +function _qsfp_eeprom_var_set { + local port=$1 + if [ ${port} -lt 33 ]; then + eeprombusidx=$(( ${port} % 8)) + case $eeprombusidx in + 1) + eeprombus=$(( $eeprombusbase + 1 )) + eepromAddr=0x50 + ;; + 2) + eeprombus=$(( $eeprombusbase + 0 )) + eepromAddr=0x50 + ;; + 3) + eeprombus=$(( $eeprombusbase + 3 )) + eepromAddr=0x50 + ;; + 4) + eeprombus=$(( $eeprombusbase + 2 )) + eepromAddr=0x50 + ;; + 5) + eeprombus=$(( $eeprombusbase + 5 )) + eepromAddr=0x50 + ;; + 6) + eeprombus=$(( $eeprombusbase + 4 )) + eepromAddr=0x50 + ;; + 7) + eeprombus=$(( $eeprombusbase + 7 )) + eepromAddr=0x50 + ;; + 0) + eeprombus=$(( $eeprombusbase + 6 )) + eepromAddr=0x50 + ;; + esac + else + case $port in + 33) + eeprombus=${NUM_SFP1_DEVICE} + eepromAddr=0x50 + ;; + 34) + eeprombus=${NUM_SFP2_DEVICE} + eepromAddr=0x50 + ;; + esac + fi +} + +#Get QSFP EEPROM Information +function _i2c_qsfp_eeprom_get { + + _qsfp_port_i2c_var_set ${QSFP_PORT} + + #status: 0 -> Down, 1 -> Up + status=`cat /sys/class/gpio/gpio$(( $(($gpioBase + (${QSFP_PORT} - 1) ^ 1)) ))/value` + echo $status + + if [ $status = 0 ]; then + exit + fi + + _qsfp_eeprom_var_set ${QSFP_PORT} + + cat ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/eeprom | hexdump -C +} + +#Init QSFP EEPROM +function _i2c_qsfp_eeprom_init { + echo -n "QSFP EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init 1-32 ports EEPROM + local i + for i in {1..32}; + do + _qsfp_port_i2c_var_set ${i} + + _qsfp_eeprom_var_set ${i} + + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr) ]; then + echo "optoe1 $eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eeprombus/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr) ]; then + echo "$eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eeprombus/delete_device + fi + done + echo "DONE" +} + +#Init Main Board EEPROM +function _i2c_mb_eeprom_init { + echo -n "Main Board EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init CPU EEPROM + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/${NUM_I801_DEVICE}-0051 ]; then + echo "mb_eeprom 0x51" > ${PATH_I801_DEVICE}/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/${NUM_I801_DEVICE}-0051 ]; then + echo "0x51" > ${PATH_I801_DEVICE}/delete_device + fi + #Init MB EEPROM + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/${NUM_I801_DEVICE}-0055 ]; then + echo "mb_eeprom 0x55" > ${PATH_I801_DEVICE}/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/${NUM_I801_DEVICE}-0055 ]; then + echo "0x55" > ${PATH_I801_DEVICE}/delete_device + fi + echo "DONE" +} + +#Init PSU EEPROM +function _i2c_psu_eeprom_init { + echo -n "PSU EEPROM INIT..." + + ## modprobe eeprom + modprobe eeprom + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init PSU EEPROM + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/${NUM_FRU_MUX_CHAN1_DEVICE}-0050 ] || \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/${NUM_FRU_MUX_CHAN0_DEVICE}-0050 ]; then + ## PUS(0) EEPROM + echo "eeprom 0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_FRU_MUX_CHAN1_DEVICE}/new_device + ## PUS(1) EEPROM + echo "eeprom 0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_FRU_MUX_CHAN0_DEVICE}/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/${NUM_FRU_MUX_CHAN1_DEVICE}-0050 ] || \ + [ -L ${PATH_SYS_I2C_DEVICES}/${NUM_FRU_MUX_CHAN0_DEVICE}-0050 ]; then + ## PUS(0) EEPROM + echo "0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_FRU_MUX_CHAN1_DEVICE}/delete_device + ## PUS(1) EEPROM + echo "0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_FRU_MUX_CHAN0_DEVICE}/delete_device + fi + echo "DONE" +} + +#Init SFP EEPROM +function _i2c_sfp_eeprom_init { + echo -n "SFP EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init 33-34 ports EEPROM + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/${NUM_SFP1_DEVICE}-0050 ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/${NUM_SFP2_DEVICE}-0050 ]; then + #echo "sff8436 0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_SFP1_DEVICE}/new_device + #echo "sff8436 0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_SFP2_DEVICE}/new_device + echo "optoe1 0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_SFP1_DEVICE}/new_device + echo "optoe1 0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_SFP2_DEVICE}/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/${NUM_SFP1_DEVICE}-0050 ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/${NUM_SFP2_DEVICE}-0050 ]; then + echo "0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_SFP1_DEVICE}/delete_device + echo "0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_SFP2_DEVICE}/delete_device + fi + echo "DONE" +} + +#Get MotherBoard EEPROM Information +function _i2c_mb_eeprom_get { + echo "=========================================================" + echo "# Description: I2C MB EEPROM Get..." + echo "=========================================================" + + ## MB EEPROM + cat ${PATH_SYS_I2C_DEVICES}/${NUM_I801_DEVICE}-0055/eeprom | hexdump -C + echo "done..." +} + +#Get CPU EEPROM Information +function _i2c_cpu_eeprom_get { + echo "=========================================================" + echo "# Description: I2C MB EEPROM Get..." + echo "=========================================================" + + ## MB EEPROM + cat ${PATH_SYS_I2C_DEVICES}/${NUM_I801_DEVICE}-0051/eeprom | hexdump -C + echo "done..." +} + +#get QSFP Status +function _i2c_qsfp_status_get { + + _qsfp_port_i2c_var_set ${QSFP_PORT} + + #status: 0 -> Down, 1 -> Up + status=`cat /sys/class/gpio/gpio$(( $(($gpioBase + (${QSFP_PORT} - 1) ^ 1)) ))/value` + echo "status=$status" +} + +#get QSFP Type +function _i2c_qsfp_type_get { + + _qsfp_port_i2c_var_set ${QSFP_PORT} + + _qsfp_eeprom_var_set ${QSFP_PORT} + + #Get QSFP EEPROM info + local size=255 + eeprom_path="${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/eeprom" + #echo "get ${eeprom_path}" + qsfp_info=$(dd if=${eeprom_path} bs=${size} count=1 2>/dev/null | base64) + + identifier=$(echo $qsfp_info | base64 -d -i | hexdump -s 128 -n 1 -e '"%x"') + connector=$(echo $qsfp_info | base64 -d -i | hexdump -s 130 -n 1 -e '"%x"') + transceiver=$(echo $qsfp_info | base64 -d -i | hexdump -s 131 -n 1 -e '"%x"') + + echo "identifier=$identifier" + echo "connector=$connector" + echo "transceiver=$transceiver" +} + +#Get Board Version and Type +function _i2c_board_type_get { + boardType=`i2cget -y ${NUM_CPLD_DEVICE} 0x33 0x00` + boardBuildRev=$((($boardType) & 0x03)) + boardHwRev=$((($boardType) >> 2 & 0x03)) + boardId=$((($boardType) >> 4)) + printf "BOARD_ID is 0x%02x, HW Rev %d, Build Rev %d\n" $boardId $boardHwRev $boardBuildRev + +} + +#Get CPLD Version +function _i2c_cpld_version { + cpldRev=`i2cget -y ${NUM_CPLD_DEVICE} 0x33 0x01` + cpldRelease=$((($cpldRev) >> 6 & 0x01)) + cpldVersion=$((($cpldRev) & 0x3F)) + printf "CPLD is %s version(0:RD 1:Release), Revision is 0x%02x\n" $cpldRelease $cpldVersion + +} + +#Set Port LED behavior +function _i2c_port_led_set { + local gy_offset=0x0 + local bl_offset=0x0 + local mask=0x0 + if [ "${QSFP_PORT}" == "" ]; then + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + case ${QSFP_PORT} in + 1|2|3|4) + gy_offset=0x80 + bl_offset=0x90 + ;; + 5|6|7|8) + gy_offset=0x81 + bl_offset=0x90 + ;; + 9|10|11|12) + gy_offset=0x82 + bl_offset=0x91 + ;; + 13|14|15|16) + gy_offset=0x83 + bl_offset=0x91 + ;; + 17|18|19|20) + gy_offset=0x84 + bl_offset=0x92 + ;; + 21|22|23|24) + gy_offset=0x85 + bl_offset=0x92 + ;; + 25|26|27|28) + gy_offset=0x86 + bl_offset=0x93 + ;; + 29|30|31|32) + gy_offset=0x87 + bl_offset=0x93 + ;; + 33) + gy_offset=0x88 + bl_offset=0x94 + mask=0x01 + ;; + 34) + gy_offset=0x88 + bl_offset=0x94 + mask=0x02 + ;; + *) + echo "Please input 1~34" + exit + ;; + esac + + #Set green/yellow/off + if [ ${QSFP_PORT} -lt 33 ]; then + mask=$(( 0x3 << $(( $((${QSFP_PORT} - 0x1)) % 0x4 )) * 0x2 )) + elif [ ${QSFP_PORT} = 33 ]; then + value=1 + elif [ ${QSFP_PORT} = 34 ]; then + value=2 + fi + + if [ ${QSFP_PORT} -lt 33 ]; then + if [ "${COLOR_PORT_LED}" == "green" ]; then + i2cset -m $mask -y -r ${NUM_CPLD_DEVICE} 0x33 ${gy_offset} 0x55 + elif [ "${COLOR_PORT_LED}" == "yellow" ]; then + i2cset -m $mask -y -r ${NUM_CPLD_DEVICE} 0x33 ${gy_offset} 0xaa + elif [ "${COLOR_PORT_LED}" == "off" ]; then + i2cset -m $mask -y -r ${NUM_CPLD_DEVICE} 0x33 ${gy_offset} 0x00 + return + fi + elif [ ${QSFP_PORT} -ge 33 ]; then + if [ "${COLOR_PORT_LED}" == "green" ] || + [ "${COLOR_PORT_LED}" == "yellow" ]; then + i2cset -m $mask -y -r ${NUM_CPLD_DEVICE} 0x33 ${gy_offset} $value + elif [ "${COLOR_PORT_LED}" == "off" ]; then + i2cset -m $mask -y -r ${NUM_CPLD_DEVICE} 0x33 ${gy_offset} $((! ${value} )) + return + fi + fi + + #Set Blink/Unblink + if [ ${QSFP_PORT} -lt 33 ]; then + mask=$(( 0x1 << $(( $((${QSFP_PORT} - 0x1)) % 0x8 )) )) + elif [ ${QSFP_PORT} = 33 ]; then + value=1 + elif [ ${QSFP_PORT} = 34 ]; then + value=2 + fi + + if [ "${BLINK_LED}" == "blink" ]; then + i2cset -m $mask -y -r ${NUM_CPLD_DEVICE} 0x33 ${bl_offset} 0x00 + elif [ "${BLINK_LED}" == "noblink" ]; then + i2cset -m $mask -y -r ${NUM_CPLD_DEVICE} 0x33 ${bl_offset} 0xff + fi + +} + +#Get PSU EEPROM Information +function _i2c_psu_eeprom_get { + echo "=========================================================" + echo "# Description: I2C PSU EEPROM Get..." + echo "=========================================================" + + ## PUS(0) EEPROM + echo "========PSU1=========" + cat ${PATH_SYS_I2C_DEVICES}/${NUM_FRU_MUX_CHAN1_DEVICE}-0050/eeprom | hexdump -C + + ## PUS(1) EEPROM + echo "========PSU2=========" + cat ${PATH_SYS_I2C_DEVICES}/${NUM_FRU_MUX_CHAN0_DEVICE}-0050/eeprom | hexdump -C + + echo "done..." +} + +#Set System Status LED +function _i2c_sys_led { + + if [ "${COLOR_SYS_LED}" == "green" ]; then + # set sys_led_g (0.0) = 1 + output_reg=2 + mask=0x01 + value=0x01 + elif [ "${COLOR_SYS_LED}" == "amber" ]; then + # set sys_led_g (0.0) = 0 + output_reg=2 + mask=0x01 + value=0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + #apply to io expander + i2cset -m ${mask} -y ${NUM_MAIN_MUX_CHAN1_DEVICE} 0x75 2 ${value} + echo "Done" + +} + +#Set FAN Tray LED +function _i2c_fan_tray_led { + case ${FAN_TRAY} in + 1) + i2cAddr=0x20 + ioPort=2 + if [ "${COLOR_SYS_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_SYS_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 2) + i2cAddr=0x20 + ioPort=2 + if [ "${COLOR_SYS_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_SYS_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + 3) + i2cAddr=0x20 + ioPort=3 + if [ "${COLOR_SYS_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_SYS_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 4) + i2cAddr=0x20 + ioPort=3 + if [ "${COLOR_SYS_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_SYS_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + *) + echo "Please input 1~4" + exit + ;; + esac + + if [ "${COLOR_SYS_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m $mask -y -r ${NUM_FRU_MUX_CHAN2_DEVICE} $i2cAddr $ioPort 0x33 + elif [ "${COLOR_SYS_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m $mask -y -r ${NUM_FRU_MUX_CHAN2_DEVICE} $i2cAddr $ioPort 0x00 + elif [ "${COLOR_SYS_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m $mask -y -r ${NUM_FRU_MUX_CHAN2_DEVICE} $i2cAddr $ioPort 0x33 + elif [ "${COLOR_SYS_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m $mask -y -r ${NUM_FRU_MUX_CHAN2_DEVICE} $i2cAddr $ioPort 0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Set FAN LED +function _i2c_fan_led { + if [ "${COLOR_SYS_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x06 -y -r ${NUM_MAIN_MUX_CHAN1_DEVICE} 0x75 2 0x02 + elif [ "${COLOR_SYS_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x06 -y -r ${NUM_MAIN_MUX_CHAN1_DEVICE} 0x75 2 0x00 + elif [ "${COLOR_SYS_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x06 -y -r ${NUM_MAIN_MUX_CHAN1_DEVICE} 0x75 2 0x06 + elif [ "${COLOR_SYS_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x06 -y -r ${NUM_MAIN_MUX_CHAN1_DEVICE} 0x75 2 0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Set PSU1 LED +function _i2c_psu1_led { + local value=0 + local mask=8 + + if [ "${COLOR_SYS_LED}" == "green" ]; then + value=0x00 + elif [ "${COLOR_SYS_LED}" == "amber" ]; then + value=0xFF + else + echo "Invalid Parameters ${COLOR_SYS_LED}, Exit!!!" + _help + exit ${FALSE} + fi + + i2cset -m ${mask} -y -r ${NUM_MAIN_MUX_CHAN1_DEVICE} 0x75 2 ${value} +} + +#Set PSU2 LED +function _i2c_psu2_led { + local value=0 + local mask=16 + + if [ "${COLOR_SYS_LED}" == "green" ]; then + value=0x00 + elif [ "${COLOR_SYS_LED}" == "amber" ]; then + value=0xFF + else + echo "Invalid Parameters ${COLOR_SYS_LED}, Exit!!!" + _help + exit ${FALSE} + fi + + i2cset -m ${mask} -y -r ${NUM_MAIN_MUX_CHAN1_DEVICE} 0x75 2 ${value} +} + +#Get PSU Status +function _i2c_psu_status { + psu1_pwgood_gpio=$((${GPIO_OFFSET}+99)) + psu1_exist_gpio=$((${GPIO_OFFSET}+100)) + psu2_pwdgood_gpio=$((${GPIO_OFFSET}+96)) + psu2_exist_gpio=$((${GPIO_OFFSET}+97)) + + psu2PwGood=`cat /sys/class/gpio/gpio${psu2_pwdgood_gpio}/value` # PSU0_PWROK (0.0) + psu2Exist=`cat /sys/class/gpio/gpio${psu2_exist_gpio}/value` # PSU0_PRSNT_L (0.1) + + psu1PwGood=`cat /sys/class/gpio/gpio${psu1_pwgood_gpio}/value` # PSU1_PWROK (0.3) + psu1Exist=`cat /sys/class/gpio/gpio${psu1_exist_gpio}/value` # PSU1_PRSNT_L (0.4) + printf "PSU1 Exist:%d PSU1 PW Good:%d\n" $psu1Exist $psu1PwGood + printf "PSU2 Exist:%d PSU2 PW Good:%d\n" $psu2Exist $psu2PwGood +} + +# util function to get logx value +function logx { + v=$1 + n=$2 + logx_res=$(echo "${v} ${n}" | awk '{printf "%f\n",log($1)/log($2)}') +} + +#Set PSU LED on LED Board +function _i2c_led_psu_status_set { + + echo "=========================================================" + echo "# Description: PSU LED Status Setup" + echo "=========================================================" + + #Get PSU Status + _i2c_psu_status + + #PSU1 Status + echo "------------------------------" + if [ "${psu1Exist}" == ${PSU_EXIST} ]; then + if [ "${psu1PwGood}" == ${PSU_DC_ON} ]; then + COLOR_SYS_LED="green" + _i2c_psu1_led + else + COLOR_SYS_LED="amber" + _i2c_psu1_led + fi + else + COLOR_SYS_LED="amber" + _i2c_psu1_led + fi + echo "set [PSU1 LED] = ${COLOR_SYS_LED}" + + #PSU2 Status + echo "------------------------------" + if [ "${psu2Exist}" == ${PSU_EXIST} ]; then + if [ "${psu2PwGood}" == ${PSU_DC_ON} ]; then + COLOR_SYS_LED="green" + _i2c_psu2_led + else + COLOR_SYS_LED="amber" + #ONOFF_LED="on" + _i2c_psu2_led + fi + else + COLOR_SYS_LED="amber" + _i2c_psu2_led + fi + echo "set [PSU2 LED] = ${COLOR_SYS_LED}" +} + +# get qsfp ddm data +function _i2c_qsfp_ddm_get { + + _qsfp_port_i2c_var_set ${QSFP_PORT} + + # check if port presence + #status: 0 -> Down, 1 -> Up + status=`cat /sys/class/gpio/gpio$(( $(($gpioBase + (${QSFP_PORT} - 1) ^ 1)) ))/value` + if [ "${status}" == "0" ]; then + echo "port ${QSFP_PORT} not presence" + return + fi + + _qsfp_eeprom_var_set ${QSFP_PORT} + + # Get QSFP EEPROM info + # only need first 128 bytes (page0) for ddm parsing + local size=128 + eeprom_path="${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/eeprom" + #echo "get ${eeprom_path}" + qsfp_info=$(dd if=${eeprom_path} bs=${size} count=1 2>/dev/null | base64) + + # temperature + temp_val1=$(echo $qsfp_info | base64 -d -i | hexdump -s 22 -n 1 -e '"%d"') + temp_val2=$(echo $qsfp_info | base64 -d -i | hexdump -s 23 -n 1 -e '"%d"') + temp=$(echo "$temp_val1 $temp_val2" | awk '{printf "%f\n", $1 + $2/256.0}') + #temp=$(( ${temp_val1} + ${temp_val2}/256.0 )) + echo "temp=$temp" + # voltage + volt_val1=$(echo $qsfp_info | base64 -d -i | hexdump -s 26 -n 1 -e '"%d"') + volt_val2=$(echo $qsfp_info | base64 -d -i | hexdump -s 27 -n 1 -e '"%d"') + #volt=$(((($volt_val1 << 8) | volt_val2) / 10000)) + volt_val3=$(( ($volt_val1 << 8) | $volt_val2 )) + volt=$(echo "$volt_val3" | awk '{printf "%f\n", $1/10000.0}') + echo "volt=$volt" + + # 4 channels + for i in {0..3}; + do + echo "channel $i:" + # txBias + offset=$(( 42 + $i*2 )) + txBias_val1=$(echo $qsfp_info | base64 -d -i | hexdump -s $offset -n 1 -e '"%d"') + offset=$(( 43 + $i*2 )) + txBias_val2=$(echo $qsfp_info | base64 -d -i | hexdump -s $offset -n 1 -e '"%d"') + txBias_val3=$(( ($txBias_val1 << 8) | $txBias_val2 )) + txBias=$(echo "$txBias_val3" | awk '{printf "%f\n", (131.0*$1)/65535}') + echo " txBias=$txBias" + # txPower + offset=$(( 50 + $i*2 )) + txPower_val1=$(echo $qsfp_info | base64 -d -i | hexdump -s $offset -n 1 -e '"%d"') + offset=$(( 51 + $i*2 )) + txPower_val2=$(echo $qsfp_info | base64 -d -i | hexdump -s $offset -n 1 -e '"%d"') + txPower_val3=$(( ($txPower_val1 << 8) | $txPower_val2 )) + txPower_val4=$(echo "$txPower_val3" | awk '{printf "%f\n", $1*0.0001}') + logx $txPower_val4 10 + txPower=$(echo "$logx_res" | awk '{printf "%f\n", $1*10}') + echo " txPower=$txPower" + # rxPower + offset=$(( 34 + $i*2 )) + rxPower_val1=$(echo $qsfp_info | base64 -d -i | hexdump -s $offset -n 1 -e '"%d"') + offset=$(( 35 + $i*2 )) + rxPower_val2=$(echo $qsfp_info | base64 -d -i | hexdump -s $offset -n 1 -e '"%d"') + rxPower_val3=$(( ($rxPower_val1 << 8) | $rxPower_val2 )) + rxPower_val4=$(echo "$rxPower_val3" | awk '{printf "%f\n", $1*0.0001}') + logx $rxPower_val4 10 + rxPower=$(echo "$logx_res" | awk '{printf "%f\n", $1*10}') + echo " rxPower=$rxPower" + done +} + +#Main Function +function _main { + start_time_str=`date` + start_time_sec=$(date +%s) + + _set_gpio_offset + if [ "${EXEC_FUNC}" == "help" ]; then + _help + elif [ "${EXEC_FUNC}" == "i2c_init" ]; then + _i2c_init + elif [ "${EXEC_FUNC}" == "i2c_deinit" ]; then + _i2c_deinit + elif [ "${EXEC_FUNC}" == "i2c_temp_init" ]; then + _i2c_temp_init + elif [ "${EXEC_FUNC}" == "i2c_fan_init" ]; then + _i2c_fan_init + elif [ "${EXEC_FUNC}" == "i2c_volmon_init" ]; then + _i2c_volmon_init + elif [ "${EXEC_FUNC}" == "i2c_io_exp_init" ]; then + _i2c_io_exp_init + elif [ "${EXEC_FUNC}" == "i2c_gpio_init" ]; then + _i2c_gpio_init + elif [ "${EXEC_FUNC}" == "i2c_gpio_deinit" ]; then + _i2c_gpio_deinit + elif [ "${EXEC_FUNC}" == "i2c_temp_init" ]; then + _i2c_temp_init + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_get" ]; then + _i2c_mb_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_cpu_eeprom_get" ]; then + _i2c_cpu_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_psu_eeprom_get" ]; then + _i2c_psu_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_get" ]; then + _i2c_qsfp_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_init" ]; then + _i2c_qsfp_eeprom_init ${QSFP_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_sfp_eeprom_init" ]; then + _i2c_sfp_eeprom_init ${QSFP_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_init" ]; then + _i2c_mb_eeprom_init ${MB_EEPROM_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_psu_eeprom_init" ]; then + _i2c_psu_eeprom_init ${MB_EEPROM_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_qsfp_status_get" ]; then + _i2c_qsfp_status_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_type_get" ]; then + _i2c_qsfp_type_get + elif [ "${EXEC_FUNC}" == "i2c_led_psu_status_set" ]; then + _i2c_led_psu_status_set + elif [ "${EXEC_FUNC}" == "i2c_qsfp_ddm_get" ]; then + _i2c_qsfp_ddm_get + elif [ "${EXEC_FUNC}" == "i2c_led_fan_status_set" ]; then + _i2c_led_fan_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_tray_status_set" ]; then + _i2c_led_fan_tray_status_set + elif [ "${EXEC_FUNC}" == "i2c_sys_led" ]; then + _i2c_sys_led + elif [ "${EXEC_FUNC}" == "i2c_fan_led" ]; then + _i2c_fan_led + elif [ "${EXEC_FUNC}" == "i2c_fan_tray_led" ]; then + _i2c_fan_tray_led + elif [ "${EXEC_FUNC}" == "i2c_psu1_led" ]; then + _i2c_psu1_led + elif [ "${EXEC_FUNC}" == "i2c_psu2_led" ]; then + _i2c_psu2_led + elif [ "${EXEC_FUNC}" == "i2c_board_type_get" ]; then + _i2c_board_type_get + elif [ "${EXEC_FUNC}" == "i2c_cpld_version" ]; then + _i2c_cpld_version + elif [ "${EXEC_FUNC}" == "i2c_psu_status" ]; then + _i2c_psu_status + elif [ "${EXEC_FUNC}" == "i2c_port_led_set" ]; then + _i2c_port_led_set + elif [ "${EXEC_FUNC}" == "i2c_test_all" ]; then + _i2c_init + _i2c_temp_init + _i2c_fan_init + _i2c_io_exp_init + _i2c_psu_eeprom_get + _i2c_mb_eeprom_get + _i2c_cpu_eeprom_get + _i2c_board_type_get + _i2c_cpld_version + _i2c_psu_status + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + if [ "$DEBUG" == "on" ]; then + echo "-----------------------------------------------------" + end_time_str=`date` + end_time_sec=$(date +%s) + diff_time=$[ ${end_time_sec} - ${start_time_sec} ] + echo "Start Time: ${start_time_str} (${start_time_sec})" + echo "End Time : ${end_time_str} (${end_time_sec})" + echo "Total Execution Time: ${diff_time} sec" + + echo "done!!!" + fi +} + +_main diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/utils/qsfp_monitor.sh b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/utils/qsfp_monitor.sh new file mode 100755 index 00000000000..249f179216a --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/utils/qsfp_monitor.sh @@ -0,0 +1,104 @@ +#!/bin/bash +# Copyright (C) 2017 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=3 +I2C_UTILS="/usr/sbin/i2c_utils.sh" +QSFP_SI_SCRIPT="/usr/sbin/qsfp_si_cfg.sh" +QSFP_ARRAY=(0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + +#QSFP SI monitor +function _qsfp_si_monitor { + local i + local status + for i in {0..31}; + do + status=`${I2C_UTILS} i2c_qsfp_status_get $(expr $i + 1) | egrep '^status=.*$' | sed -e 's/status=//g'` + if [ "${status}" == "1" ]; then + _qsfp_type_check $i + fi + done +} + +#QSFP type +function _qsfp_type_check { + local port=$1 + local qsfp_type=`${I2C_UTILS} i2c_qsfp_type_get $(expr $port + 1)` + local identifier=`echo "$qsfp_type" | grep '^identifier=.*$' | sed -e 's/identifier=//g'` + if [ "${identifier}" == "11" ]; then + connector=`echo "$qsfp_type" | grep '^connector=.*$' | sed -e 's/connector=//g'` + case ${connector} in + 21|23) + #DAC + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to DAC" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} dac $port >/dev/null + fi + ;; + *) + #Optical + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to Optical" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} optical $port >/dev/null + fi + ;; + esac + fi +} + +#Docker exist check +function _docker_swss_check { + while true + do + # Check if syncd starts + result=`docker exec -i swss bash -c "echo -en \"SELECT 1\\nHLEN HIDDEN\" | redis-cli | sed -n 2p"` #TBD FIX ME + if [ "$result" == "3" ]; then + return + fi + sleep $INTERVAL + done +} + +#Docker exist check +function _qsfp_si_cfg_script_check { + + if [ -f ${QSFP_SI_SCRIPT} ] && [ -x ${QSFP_SI_SCRIPT} ]; then + echo "SI Script exists. Start monitor." + return + else + echo "SI Script not exist. Exit monitor." + exit + fi +} + +# main function +function _main { + #Check SI Script + _qsfp_si_cfg_script_check + #Check docker swss is running + _docker_swss_check + while true + do + _qsfp_si_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main + diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/utils/s9180_32x_monitor.sh b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/utils/s9180_32x_monitor.sh new file mode 100755 index 00000000000..eedf685b290 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9180-32x/utils/s9180_32x_monitor.sh @@ -0,0 +1,42 @@ +#!/bin/bash +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=5 +I2C_UTILS="/usr/sbin/i2c_utils.sh" + + +# TBD: LED status monitor +function _led_monitor { + ${I2C_UTILS} i2c_led_fan_status_set >/dev/null + ${I2C_UTILS} i2c_led_psu_status_set >/dev/null + ${I2C_UTILS} i2c_led_fan_tray_status_set >/dev/null +} + +# main function +function _main { + while true + do + #PSU controlled by dummy board, + #but fan LED and fan tray LED must controlled by this service + _led_monitor + + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/README.md b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/README.md new file mode 100644 index 00000000000..7411603ba60 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/README.md @@ -0,0 +1,175 @@ +# Ingrasys S9280-64X Platform Driver for SONiC + +Copyright (C) 2016 Ingrasys, Inc. + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + + +## Licensing terms + +The Licensing terms of the files within this project is split 2 parts. +The Linux kernel is released under the GNU General Public License version 2. +All other code is released under the GNU General Public License version 3. +Please see the LICENSE file for copies of both licenses. + +## Contents of this package + + - service/ + > Service config files for platform initialization and monitoring + - utils/ + > Scripts useful during platform bringup and sysfs function + - conf/ + > Platform configure files. + +## Kernel modules and drivers + +The driver for interacting with Ingrasys S9280-64X is contained in the I2C +kernel module and initialization script. The initialization script loads +the modules in the correct order. It has been built and tested against +the Linux 3.16 kernel. + +The initialization script will modprobe the needed modules, navigate to the +module's device directory in sysfs, and write configuration data to +the kernel module. + +### IGB + +This is OOB Ports on front panel for management plane. + +The IGB module must be loaded first on Ingrasys S9280-64X platform. + +### I2C i801 + +The I2C i801 on Ingrasys S9280-64X can be found in +`/sys/bus/i2c/devices/i2c-0/` + +This is I2C bus for Clock Gen, DIMM channel and digital potentiometers. + +The i801 module must be loaded second on Ingrasys S9280-64X. + +### I2C PCA9548 +The PCA9548 module on S9280-64X can be found in +`/sys/bus/i2c/devices/i2c-0/` , `/sys/bus/i2c/devices/i2c-17/`, +`/sys/bus/i2c/devices/i2c-18/` , `/sys/bus/i2c/devices/i2c-19/`, +`/sys/bus/i2c/devices/i2c-20/`, `/sys/bus/i2c/devices/i2c-21/`, +`/sys/bus/i2c/devices/i2c-22/`, `/sys/bus/i2c/devices/i2c-23/`, +`/sys/bus/i2c/devices/i2c-24/`. + +The pca9548 module for zQSFP module get/set functions, PSU information, +fan status and EEPROM. + +## Hardware components + +The hardware components are initialized in the init script on S9280-64X. +The following describes manual initialization as well as interaction. +The examples below are just for Ingrasys S9280-64X platform. + +### Hardware initialization + +When the sonic-platform-ingrasys-s9280 package is installed on the S9280-64X, +it is automatically initialized. If you want to manual initialization, the +utility command usage as follows: +``` + i2c_utils.sh i2c_init +``` + +### EEPROM + +The EEPROM is including the board SKU, model name, vendor name, serial number, +and other information can be accessed with the specific eeprom kernel module. +After using `modprobe eeprom_mb` to detect the eeprom, it will show up in sysfs. + +The hexdump utility can be used to decode the raw output of the EEPROM. +For example, +``` + bash# echo "mb_eeprom 0x55" > /sys/bus/i2c/devices/i2c-0/new_device + bash# cat /sys/bus/i2c/drivers/mb_eeprom/0-0055/eeprom | hexdump -C +``` + +### Front panel LEDs + +LEDs can be setup on/off by using i2c utility `/usr/sbin/i2c_utils.sh`. +Utility function command usage as follows: + +``` +Status LED: + i2c_utils.sh i2c_sys_led green|amber on|off + +Fan status LED: + i2c_utils.sh i2c_fan_led green|amber on|off + +PSU1 status LED: + i2c_utils.sh i2c_psu1_led green|amber on|off + +PSU2 status LED: + i2c_utils.sh i2c_psu2_led green|amber on|off + +``` +QSFP Module Port LEDs control by ASIC library. + + +### Fan speed + +Fan speed are controlled by the w83795 kernel module. +It can be found in `/sys/class/hwmon/hwmon2/device/`. +If they were compiled as modules, you will need to modprobe w83795 for +their sysfs entries to show up. Each fan has an `fan_input` file +for reading the fan speed. And `pwm1` setting fan1 to fan4, +`pwm2` setting fan5 to fan8. + +There is docker-platform-monitor container installed fancontrol package that can +automatic control platform fan speed. + + +### Temperature sensors + +Temperature sensors are controlled by the w83795 kernel +module. It can be found in `/sys/class/hwmon/hwmon3/device/`. +If they were compiled as modules, then you will need to modprobe w83795 for +their sysfs entries to show up. +`temp1_input` is front MAC temperature sensor. `temp2_input` is rear MAC +temperature sensor. + +There is docker-platform-monitor container installed lm-sensors package that can +monitor platform temperature. And `sensors` command can show each +temperature sensors status. + +### Power supplies + +Power supplies status and its EEPROM info can be used i2c utility +`/usr/sbin/i2c_utils.sh` to get. +The usage as follows: +``` +PSU EEPROM: + i2c_utils.sh i2c_psu_eeprom_get + +PSU Status: + i2c_utils.sh i2c_psu_status +``` + +### QSFPs +QSFP modules are managed by the pca9548 kernel driver. +The i2c utility `/usr/sbin/i2c_utils.sh` can be used to get status and +module EEPROM informations. +The usage as follows: +``` +QSFP EEPROM: + i2c_utils.sh i2c_qsfp_eeprom_get [1-64] + +QSFP Insert Event: + i2c_utils.sh i2c_qsfp_status_get [1-64] + 0 => not insert + 1 => inserted +``` + diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/Makefile b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/Makefile new file mode 100644 index 00000000000..af1a5abe1d1 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/Makefile @@ -0,0 +1,3 @@ +obj-m := eeprom_mb.o +obj-m += ingrasys_s9280_64x_i2c_cpld.o +obj-m += ingrasys_s9280_64x_psu.o diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/eeprom_mb.c b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/eeprom_mb.c new file mode 100644 index 00000000000..528864d9338 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/eeprom_mb.c @@ -0,0 +1,267 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void mb_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t mb_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + mb_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t mb_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "mb_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute mb_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = mb_eeprom_read, + .write = mb_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int mb_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int mb_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &mb_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int mb_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &mb_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id mb_eeprom_id[] = { + { "mb_eeprom", 0 }, + { } +}; + +static struct i2c_driver mb_eeprom_driver = { + .driver = { + .name = "mb_eeprom", + }, + .probe = mb_eeprom_probe, + .remove = mb_eeprom_remove, + .id_table = mb_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = mb_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(mb_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("Ingrasys Mother Borad EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/ingrasys_s9280_64x_i2c_cpld.c b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/ingrasys_s9280_64x_i2c_cpld.c new file mode 100644 index 00000000000..912060cc93e --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/ingrasys_s9280_64x_i2c_cpld.c @@ -0,0 +1,1618 @@ +/* + * A i2c cpld driver for the ingrasys_s9280_64x + * + * Copyright (C) 2017 Ingrasys Technology Corporation. + * Leo Lin + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "ingrasys_s9280_64x_i2c_cpld.h" + +#ifdef DEBUG +#define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ +} +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ +} + +/* CPLD sysfs attributes index */ +enum s9280_64x_cpld_sysfs_attributes { + CPLD_ACCESS_REG, + CPLD_REGISTER_VAL, + CPLD_PORT_START, + CPLD_PORTS, + CPLD_VERSION, + CPLD_ID, + CPLD_BOARD_TYPE, + CPLD_EXT_BOARD_TYPE, + CPLD_QSFP_PORT_STATUS_1, + CPLD_QSFP_PORT_STATUS_2, + CPLD_QSFP_PORT_STATUS_3, + CPLD_QSFP_PORT_STATUS_4, + CPLD_QSFP_PORT_STATUS_5, + CPLD_QSFP_PORT_STATUS_6, + CPLD_QSFP_PORT_STATUS_7, + CPLD_QSFP_PORT_STATUS_8, + CPLD_QSFP_PORT_STATUS_9, + CPLD_QSFP_PORT_STATUS_10, + CPLD_QSFP_PORT_STATUS_11, + CPLD_QSFP_PORT_STATUS_12, + CPLD_QSFP_PORT_STATUS_13, + CPLD_QSFP_PORT_CONFIG_1, + CPLD_QSFP_PORT_CONFIG_2, + CPLD_QSFP_PORT_CONFIG_3, + CPLD_QSFP_PORT_CONFIG_4, + CPLD_QSFP_PORT_CONFIG_5, + CPLD_QSFP_PORT_CONFIG_6, + CPLD_QSFP_PORT_CONFIG_7, + CPLD_QSFP_PORT_CONFIG_8, + CPLD_QSFP_PORT_CONFIG_9, + CPLD_QSFP_PORT_CONFIG_10, + CPLD_QSFP_PORT_CONFIG_11, + CPLD_QSFP_PORT_CONFIG_12, + CPLD_QSFP_PORT_CONFIG_13, + CPLD_QSFP_PORT_INTERRUPT, + CPLD_SFP_PORT_STATUS, + CPLD_SFP_PORT_CONFIG, + CPLD_10GMUX_CONFIG, + CPLD_BMC_STATUS, + CPLD_BMC_WATCHDOG, + CPLD_USB_STATUS, + CPLD_RESET_CONTROL, + CPLD_SFP_LED, + CPLD_SFP_LED_BLINK, + CPLD_QSFP_LED_1, + CPLD_QSFP_LED_2, + CPLD_QSFP_LED_3, + CPLD_QSFP_LED_4, + CPLD_QSFP_LED_5, + CPLD_QSFP_LED_6, + CPLD_QSFP_LED_7, + CPLD_QSFP_LED_8, + CPLD_QSFP_LED_9, + CPLD_QSFP_LED_10, + CPLD_QSFP_LED_11, + CPLD_QSFP_LED_12, + CPLD_QSFP_LED_13, + CPLD_QSFP_LED_14, + CPLD_QSFP_LED_15, + CPLD_QSFP_LED_16, + CPLD_QSFP_LED_BLINK, + CPLD_RTMR_RESET, + CPLD_ROV_STATUS, + +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t get_qsfp_port_start(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t get_qsfp_ports(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_version(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_id(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_board_type(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_ext_board_type(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_qsfp_port_status(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_qsfp_port_config(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_qsfp_port_config(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_qsfp_port_interrupt(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_sfp_port_status(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_sfp_port_config(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_sfp_port_config(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_10gmux_config(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_10gmux_config(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_bmc_status(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_bmc_watchdog(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_bmc_watchdog(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_usb_status(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_reset_control(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_reset_control(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_sfp_led(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_sfp_led(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_sfp_led_blink(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_sfp_led_blink(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_qsfp_led(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_qsfp_led(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_qsfp_led_blink(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_qsfp_led_blink(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_rtmr_reset(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_rtmr_reset(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_rov_status(struct device *dev, + struct device_attribute *da, char *buf); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +/* CPLD device id and data */ +static const struct i2c_device_id ingrasys_i2c_cpld_id[] = { + { "ingrasys_cpld1", cpld1 }, + { "ingrasys_cpld2", cpld2 }, + { "ingrasys_cpld3", cpld3 }, + { "ingrasys_cpld4", cpld4 }, + { "ingrasys_cpld5", cpld5 }, + {} +}; + +/* Addresses scanned for ingrasys_i2c_cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x33, I2C_CLIENT_END }; + +/* define all support register access of cpld in attribute */ +static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, + read_access_register, write_access_register, CPLD_ACCESS_REG); +static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, + read_register_value, write_register_value, CPLD_REGISTER_VAL); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_start, S_IRUGO, + get_qsfp_port_start, NULL, CPLD_PORT_START); +static SENSOR_DEVICE_ATTR(cpld_qsfp_ports, S_IRUGO, + get_qsfp_ports, NULL, CPLD_PORTS); +static SENSOR_DEVICE_ATTR(cpld_version, S_IRUGO, + read_cpld_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(cpld_id, S_IRUGO, read_cpld_id, NULL, CPLD_ID); +static SENSOR_DEVICE_ATTR(cpld_board_type, S_IRUGO, + read_board_type, NULL, CPLD_BOARD_TYPE); +static SENSOR_DEVICE_ATTR(cpld_ext_board_type, S_IRUGO, + read_ext_board_type, NULL, CPLD_EXT_BOARD_TYPE); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_1, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_1); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_2, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_2); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_3, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_3); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_4, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_4); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_5, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_5); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_6, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_6); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_7, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_7); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_8, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_8); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_9, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_9); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_10, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_10); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_11, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_11); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_12, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_12); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_13, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_13); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_1, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_1); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_2, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_2); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_3, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_3); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_4, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_4); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_5, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_5); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_6, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_6); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_7, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_7); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_8, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_8); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_9, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_9); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_10, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_10); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_11, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_11); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_12, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_12); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_13, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_13); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_interrupt, S_IRUGO, + read_qsfp_port_interrupt, NULL, CPLD_QSFP_PORT_INTERRUPT); +static SENSOR_DEVICE_ATTR(cpld_sfp_port_status, S_IRUGO, + read_sfp_port_status, NULL, CPLD_SFP_PORT_STATUS); +static SENSOR_DEVICE_ATTR(cpld_sfp_port_config, S_IWUSR | S_IRUGO, + read_sfp_port_config, write_sfp_port_config, CPLD_SFP_PORT_CONFIG); +static SENSOR_DEVICE_ATTR(cpld_10gmux_config, S_IWUSR | S_IRUGO, + read_10gmux_config, write_10gmux_config, + CPLD_10GMUX_CONFIG); +static SENSOR_DEVICE_ATTR(cpld_bmc_status, S_IRUGO, + read_bmc_status, NULL, CPLD_BMC_STATUS); +static SENSOR_DEVICE_ATTR(cpld_bmc_watchdog, S_IWUSR | S_IRUGO, + read_bmc_watchdog, write_bmc_watchdog, + CPLD_BMC_WATCHDOG); +static SENSOR_DEVICE_ATTR(cpld_usb_status, S_IRUGO, + read_usb_status, NULL, CPLD_USB_STATUS); +static SENSOR_DEVICE_ATTR(cpld_reset_control, S_IWUSR | S_IRUGO, + read_reset_control, write_reset_control, + CPLD_BMC_WATCHDOG); +static SENSOR_DEVICE_ATTR(cpld_sfp_led, S_IWUSR | S_IRUGO, + read_sfp_led, write_sfp_led, CPLD_SFP_LED); +static SENSOR_DEVICE_ATTR(cpld_sfp_led_blink, S_IWUSR | S_IRUGO, + read_sfp_led_blink, write_sfp_led_blink, CPLD_SFP_LED_BLINK); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_1, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_1); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_2, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_2); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_3, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_3); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_4, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_4); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_5, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_5); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_6, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_6); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_7, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_7); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_8, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_8); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_9, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_9); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_10, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_10); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_11, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_11); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_12, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_12); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_13, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_13); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_14, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_14); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_15, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_15); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_16, S_IWUSR | S_IRUGO, + read_qsfp_led, write_qsfp_led, CPLD_QSFP_LED_16); +static SENSOR_DEVICE_ATTR(cpld_qsfp_led_blink, S_IWUSR | S_IRUGO, + read_qsfp_led_blink, write_qsfp_led_blink, CPLD_QSFP_LED_BLINK); +static SENSOR_DEVICE_ATTR(cpld_rtmr_reset, S_IWUSR | S_IRUGO, + read_rtmr_reset, write_rtmr_reset, CPLD_RTMR_RESET); +static SENSOR_DEVICE_ATTR(cpld_rov_status, S_IRUGO, + read_rov_status, NULL, CPLD_ROV_STATUS); + +/* define support attributes of cpldx , total 5 */ +/* cpld 1 */ +static struct attribute *s9280_64x_cpld1_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_start.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_ports.dev_attr.attr, + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_board_type.dev_attr.attr, + &sensor_dev_attr_cpld_ext_board_type.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_4.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_5.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_6.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_7.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_8.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_9.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_10.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_11.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_12.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_4.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_5.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_6.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_7.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_8.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_9.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_10.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_11.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_12.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_interrupt.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_port_status.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_port_config.dev_attr.attr, + &sensor_dev_attr_cpld_10gmux_config.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_status.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_watchdog.dev_attr.attr, + &sensor_dev_attr_cpld_usb_status.dev_attr.attr, + &sensor_dev_attr_cpld_reset_control.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_led.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_led_blink.dev_attr.attr, + &sensor_dev_attr_cpld_rtmr_reset.dev_attr.attr, + &sensor_dev_attr_cpld_rov_status.dev_attr.attr, + NULL +}; + +/* cpld 2 / cpld 3 / cpld 4 / cpld 5 */ +static struct attribute *s9280_64x_cpld2345_attributes[] = { +&sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_start.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_ports.dev_attr.attr, + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_4.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_5.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_6.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_7.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_8.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_9.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_10.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_11.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_12.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_13.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_4.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_5.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_6.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_7.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_8.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_9.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_10.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_11.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_12.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_13.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_interrupt.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_4.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_5.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_6.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_7.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_8.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_9.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_10.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_11.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_12.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_13.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_14.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_15.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_16.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_led_blink.dev_attr.attr, + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group s9280_64x_cpld1_group = { + .attrs = s9280_64x_cpld1_attributes, +}; +/* cpld 2/3/4/5 attributes group */ +static const struct attribute_group s9280_64x_cpld2345_group = { + .attrs = s9280_64x_cpld2345_attributes, +}; + +/* read access register from cpld data */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + + return sprintf(buf, "0x%x\n", reg); +} + +/* write access register to cpld data */ +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + + if (kstrtou8(buf, 0, ®) < 0) + return -EINVAL; + + data->access_reg = reg; + return count; +} + +/* read the value of access register in cpld data */ +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (reg_val < 0) + return -1; + + return sprintf(buf, "0x%x\n", reg_val); +} + +/* wrtie the value to access register in cpld data */ +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int ret = -EIO; + u8 reg = data->access_reg; + u8 reg_val; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val); + + return count; +} + +/* get qsfp port start number of the cpld device */ +/* the start number use to tranlate qsfp port to cpld port */ +/* the cpld port use to access the qsfp port register in cpld */ +static ssize_t get_qsfp_port_start(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int port_base_num; + + if (attr->index == CPLD_PORT_START) { + if (data->index == cpld1) { + port_base_num = 1; + } else { + port_base_num = CPLD_1_PORT_NUM + + CPLD_2_PORT_NUM*(data->index - 1) + 1; + } + return sprintf(buf, "%d\n", port_base_num); + } + return -1; +} + +/* get total qsfp port which contain register in the cpld device */ +static ssize_t get_qsfp_ports(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int ports; + + if (attr->index == CPLD_PORTS) { + if (data->index == cpld1) + ports = CPLD_1_PORT_NUM; + else + ports = CPLD_2_PORT_NUM; + return sprintf(buf, "%d\n", ports); + } + return -1; +} + +/* get cpdl version register value */ +static ssize_t read_cpld_version(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_VERSION) { + reg = CPLD_VERSION_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get cpdl id register value */ +static ssize_t read_cpld_id(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_ID) { + reg = CPLD_ID_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get board type register value */ +static ssize_t read_board_type(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_BOARD_TYPE) { + reg = CPLD_BOARD_TYPE_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get extend board type register value */ +static ssize_t read_ext_board_type(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_EXT_BOARD_TYPE) { + reg = CPLD_EXT_BOARD_TYPE_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get qsfp port status register value */ +static ssize_t read_qsfp_port_status(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index >= CPLD_QSFP_PORT_STATUS_1 && + attr->index <= CPLD_QSFP_PORT_STATUS_13) { + reg = CPLD_QSFP_PORT_STATUS_BASE_REG + + (attr->index - CPLD_QSFP_PORT_STATUS_1); + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get qsfp port config register value */ +static ssize_t read_qsfp_port_config(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index >= CPLD_QSFP_PORT_CONFIG_1 && + attr->index <= CPLD_QSFP_PORT_CONFIG_13) { + reg = CPLD_QSFP_PORT_CONFIG_BASE_REG + + (attr->index - CPLD_QSFP_PORT_CONFIG_1); + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* set value to qsfp port config register */ +static ssize_t write_qsfp_port_config(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg, reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + if (attr->index >= CPLD_QSFP_PORT_CONFIG_1 && + attr->index <= CPLD_QSFP_PORT_CONFIG_13) { + reg = CPLD_QSFP_PORT_CONFIG_BASE_REG + + (attr->index - CPLD_QSFP_PORT_CONFIG_1); + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + } + return count; +} + +/* get qsfp port interrupt register value */ +static ssize_t read_qsfp_port_interrupt(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_QSFP_PORT_INTERRUPT) { + reg = CPLD_QSFP_PORT_INTERRUPT_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get sfp port status register value */ +static ssize_t read_sfp_port_status(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_SFP_PORT_STATUS) { + reg = CPLD_SFP_PORT_STATUS_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get sfp port config register value */ +static ssize_t read_sfp_port_config(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_SFP_PORT_CONFIG) { + reg = CPLD_SFP_PORT_CONFIG_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* set value to sfp port config register */ +static ssize_t write_sfp_port_config(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg, reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + if (attr->index == CPLD_SFP_PORT_CONFIG) { + reg = CPLD_SFP_PORT_CONFIG_REG; + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + } + return count; +} + +/* get 10g mux config register value */ +static ssize_t read_10gmux_config(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_10GMUX_CONFIG) { + reg = CPLD_10GMUX_CONFIG_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* set value to 10g mux config register */ +static ssize_t write_10gmux_config(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg, reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + if (attr->index == CPLD_10GMUX_CONFIG) { + reg = CPLD_10GMUX_CONFIG_REG; + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + } + return count; +} + +/* get bmc status register value */ +static ssize_t read_bmc_status(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_BMC_STATUS) { + reg = CPLD_BMC_STATUS_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get bmc watchdog register value */ +static ssize_t read_bmc_watchdog(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_BMC_WATCHDOG) { + reg = CPLD_BMC_WATCHDOG_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* set value to bmc watchdog register */ +static ssize_t write_bmc_watchdog(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg, reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + if (attr->index == CPLD_BMC_WATCHDOG) { + reg = CPLD_BMC_WATCHDOG_REG; + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + } + return count; +} + +/* get usb status register value */ +static ssize_t read_usb_status(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_USB_STATUS) { + reg = CPLD_USB_STATUS_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get reset control register value */ +static ssize_t read_reset_control(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_RESET_CONTROL) { + reg = CPLD_RESET_CONTROL_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* set value to reset control register */ +static ssize_t write_reset_control(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg, reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + if (attr->index == CPLD_RESET_CONTROL) { + reg = CPLD_RESET_CONTROL_REG; + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + } + return count; +} + +/* get sfp port 0/1 led register */ +static ssize_t read_sfp_led(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_SFP_LED) { + reg = CPLD_SFP_LED_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* set value to sfp 0/1 port led register */ +static ssize_t write_sfp_led(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg, reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + if (attr->index == CPLD_SFP_LED) { + reg = CPLD_SFP_LED_REG; + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + } + return count; +} + +/* get sfp port 0/1 led blink register */ +static ssize_t read_sfp_led_blink(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_SFP_LED_BLINK) { + reg = CPLD_SFP_LED_BLINK_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* set value to sfp port 0/1 led blink register */ +static ssize_t write_sfp_led_blink(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg, reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + if (attr->index == CPLD_SFP_LED_BLINK) { + reg = CPLD_SFP_LED_BLINK_REG; + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + } + return count; +} + +/* get qsfp port led register */ +static ssize_t read_qsfp_led(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index >= CPLD_QSFP_LED_1 && + attr->index <= CPLD_QSFP_LED_16) { + reg = CPLD_QSFP_LED_BASE_REG + (attr->index - CPLD_QSFP_LED_1); + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* set value to qsfp port led register */ +static ssize_t write_qsfp_led(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg, reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + if (attr->index >= CPLD_QSFP_LED_1 && + attr->index <= CPLD_QSFP_LED_16) { + reg = CPLD_QSFP_LED_BASE_REG + (attr->index - CPLD_QSFP_LED_1); + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + } + return count; +} + +/* get qsfp 16 port led blink register value in 64 bit map */ +/* + each register for 2 port, each port has 4 channel for led blink + bit 64 56 48 40 32 24 16 8 0 + port 16/15 14/13 12/11 10/9 8/7 6/5 4/3 2/1 + */ +static ssize_t read_qsfp_led_blink(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val, i; + u64 bitmap = 0; + + if (attr->index == CPLD_QSFP_LED_BLINK) { + for (i = 0; i <= 7; i++) { + reg = CPLD_QSFP_LED_BLINK_BASE_REG + i; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + reg_val = reg_val & 0xff; + bitmap = bitmap | (reg_val<<(i*8)); + } + return sprintf(buf, "0x%llx\n", bitmap); + } + return -1; +} + +/* set 64 bit map value to qsfp port led blink register */ +/* + each register for 2 port, each port has 4 channel for led blink + bit 63 56 48 40 32 24 16 8 0 + port 16/15 14/13 12/11 10/9 8/7 6/5 4/3 2/1 + */ +static ssize_t write_qsfp_led_blink(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg, reg_val, i; + int ret; + u64 bitmap = 0; + + if (kstrtou64(buf, 0, &bitmap) < 0) + return -EINVAL; + + if (attr->index == CPLD_QSFP_LED_BLINK) { + for (i = 0; i <= 7; i++) { + reg = CPLD_QSFP_LED_BLINK_BASE_REG + i; + reg_val = (u8)((bitmap >> i*8) & 0xFF); + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + } + } + return count; +} + +/* get retimer reset register */ +static ssize_t read_rtmr_reset(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_RTMR_RESET) { + reg = CPLD_RTMR_RESET_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* set value to retimer reset register */ +static ssize_t write_rtmr_reset(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg, reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + if (attr->index == CPLD_RTMR_RESET) { + reg = CPLD_RTMR_RESET_REG; + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + } + return count; +} + +/* get rov status register */ +static ssize_t read_rov_status(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_ROV_STATUS) { + reg = CPLD_ROV_STATUS_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* add valid cpld client to list */ +static void ingrasys_i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void ingrasys_i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int ingrasys_i2c_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + int ret = -EPERM; + int idx; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + /* get cpld id from device */ + ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); + + if (ret < 0) { + dev_info(&client->dev, + "fail to get cpld id (0x%x) at addr (0x%x)\n", + CPLD_ID_REG, client->addr); + status = -EIO; + goto exit; + } + + CPLD_ID_ID_GET(ret, idx); + + if (INVALID(idx, cpld1, cpld5)) { + dev_info(&client->dev, + "cpld id %d(device) not valid\n", idx); + //status = -EPERM; + //goto exit; + } + +#if 0 + /* change client name for each cpld with index */ + snprintf(client->name, sizeof(client->name), "%s_%d", client->name, + data->index); +#endif + + data->index = dev_id->driver_data; + + /* register sysfs hooks for different cpld group */ + dev_info(&client->dev, "probe cpld with index %d\n", data->index); + switch (data->index) { + case cpld1: + status = sysfs_create_group(&client->dev.kobj, + &s9280_64x_cpld1_group); + break; + case cpld2: + case cpld3: + case cpld4: + case cpld5: + status = sysfs_create_group(&client->dev.kobj, + &s9280_64x_cpld2345_group); + break; + default: + status = -EINVAL; + } + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + ingrasys_i2c_cpld_add_client(client); + + return 0; +exit: + sysfs_remove_group(&client->dev.kobj, &s9280_64x_cpld2345_group); + return status; +} + +/* cpld drvier remove */ +static int ingrasys_i2c_cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &s9280_64x_cpld1_group); + break; + case cpld2: + case cpld3: + case cpld4: + case cpld5: + sysfs_remove_group(&client->dev.kobj, + &s9280_64x_cpld2345_group); + break; + } + + ingrasys_i2c_cpld_remove_client(client); + return 0; +} + +MODULE_DEVICE_TABLE(i2c, ingrasys_i2c_cpld_id); + +static struct i2c_driver ingrasys_i2c_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "ingrasys_i2c_cpld", + }, + .probe = ingrasys_i2c_cpld_probe, + .remove = ingrasys_i2c_cpld_remove, + .id_table = ingrasys_i2c_cpld_id, + .address_list = cpld_i2c_addr, +}; + +/* provid cpld register read */ +/* cpld_idx indicate the index of cpld device */ +int ingrasys_i2c_cpld_read(u8 cpld_idx, + u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + if (data->index == cpld_idx) { + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x", + cpld_idx, reg); + I2C_READ_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, reg); + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x = 0x%02x", + cpld_idx, reg, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_read); + +/* provid cpld register write */ +/* cpld_idx indicate the index of cpld device */ +int ingrasys_i2c_cpld_write(u8 cpld_idx, + u8 reg, + u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + + if (data->index == cpld_idx) { + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, + reg, value); + DEBUG_PRINT("cpld_idx=%d, write reg 0x%02x val 0x%02x, ret=%d", + cpld_idx, reg, value, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_write); + +/* provid qsfp port status register read */ +/* port_num indicate the front panel qsfp port number */ +int ingrasys_i2c_cpld_get_qsfp_port_status_val(u8 port_num) +{ + u8 cpld_idx, cpld_port, reg; + int reg_val; + + if (INVALID(port_num, QSFP_MIN_PORT_NUM, QSFP_MAX_PORT_NUM)) { + DEBUG_PRINT("invalid input value %d", port_num); + return -1; + } + QSFP_TO_CPLD_IDX(port_num, cpld_idx, cpld_port); + reg = QSFP_PORT_STATUS_REG(cpld_port); + DEBUG_PRINT("port_num=%d, cpld_idx=%d, cpld_port=%d, reg=0x%x", + port_num, cpld_idx, cpld_port, reg); + reg_val = ingrasys_i2c_cpld_read(cpld_idx, reg); + return reg_val; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_get_qsfp_port_status_val); + +/* provid qsfp port config register read */ +/* port_num indicate the front panel qsfp port number */ +int ingrasys_i2c_cpld_get_qsfp_port_config_val(u8 port_num) +{ + u8 cpld_idx, cpld_port, reg; + int reg_val; + + if (INVALID(port_num, QSFP_MIN_PORT_NUM, QSFP_MAX_PORT_NUM)) { + DEBUG_PRINT("invalid input value %d", port_num); + return -1; + } + QSFP_TO_CPLD_IDX(port_num, cpld_idx, cpld_port); + reg = QSFP_PORT_CONFIG_REG(cpld_port); + DEBUG_PRINT("port_num=%d, cpld_idx=%d, cpld_port=%d, reg=0x%x", + port_num, cpld_idx, cpld_port, reg); + reg_val = ingrasys_i2c_cpld_read(cpld_idx, reg); + return reg_val; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_get_qsfp_port_config_val); + +/* provid qsfp port config register write */ +/* port_num indicate the front panel qsfp port number */ +int ingrasys_i2c_cpld_set_qsfp_port_config_val(u8 port_num, + u8 reg_val) +{ + u8 cpld_idx, cpld_port, reg, ret; + + if (INVALID(port_num, QSFP_MIN_PORT_NUM, QSFP_MAX_PORT_NUM)) { + DEBUG_PRINT("invalid input value %d", port_num); + return -1; + } + QSFP_TO_CPLD_IDX(port_num, cpld_idx, cpld_port); + reg = QSFP_PORT_CONFIG_REG(cpld_port); + DEBUG_PRINT("port_num=%d, cpld_idx=%d, cpld_port=%d, reg=0x%x", + port_num, cpld_idx, cpld_port, reg); + ret = ingrasys_i2c_cpld_write(cpld_idx, reg, reg_val); + return ret; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_set_qsfp_port_config_val); + +/* provid sfp port 0/1 status register read */ +int ingrasys_i2c_cpld_get_sfp_port_status_val(void) +{ + u8 cpld_idx, reg; + int reg_val; + + cpld_idx = cpld1; + reg = CPLD_SFP_PORT_STATUS_REG; + DEBUG_PRINT("cpld_idx=%d, reg=0x%x", + cpld_idx, reg); + reg_val = ingrasys_i2c_cpld_read(cpld_idx, reg); + return reg_val; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_get_sfp_port_status_val); + +/* provid qsfp port config register read */ +/* port_num indicate the front panel qsfp port number */ +int ingrasys_i2c_cpld_get_sfp_port_config_val(void) +{ + u8 cpld_idx, reg; + int reg_val; + + cpld_idx = cpld1; + reg = CPLD_SFP_PORT_CONFIG_REG; + DEBUG_PRINT("cpld_idx=%d, reg=0x%x", + cpld_idx, reg); + reg_val = ingrasys_i2c_cpld_read(cpld_idx, reg); + return reg_val; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_get_sfp_port_config_val); + +/* provid qsfp port config register write */ +/* port_num indicate the front panel qsfp port number */ +int ingrasys_i2c_cpld_set_sfp_port_config_val(u8 reg_val) +{ + u8 cpld_idx, reg, ret; + + cpld_idx = cpld1; + reg = CPLD_SFP_PORT_CONFIG_REG; + DEBUG_PRINT("cpld_idx=%d, reg=0x%x", + cpld_idx, reg); + ret = ingrasys_i2c_cpld_write(cpld_idx, reg, reg_val); + return ret; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_set_sfp_port_config_val); + +static int __init ingrasys_i2c_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&ingrasys_i2c_cpld_driver); +} + +static void __exit ingrasys_i2c_cpld_exit(void) +{ + i2c_del_driver(&ingrasys_i2c_cpld_driver); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("ingrasys_i2c_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(ingrasys_i2c_cpld_init); +module_exit(ingrasys_i2c_cpld_exit); + diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/ingrasys_s9280_64x_i2c_cpld.h b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/ingrasys_s9280_64x_i2c_cpld.h new file mode 100644 index 00000000000..8d1df5dee49 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/ingrasys_s9280_64x_i2c_cpld.h @@ -0,0 +1,338 @@ +/* header file for i2c cpld driver of ingrasys_s9280_64x + * + * Copyright (C) 2017 Ingrasys Technology Corporation. + * Leo Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef INGRASYS_S9280_64X_I2C_CPLD_H +#define INGRASYS_S9280_64X_I2C_CPLD_H + +/* CPLD device index value */ +enum cpld_id { + cpld1, + cpld2, + cpld3, + cpld4, + cpld5 +}; + +enum LED_BLINK { + BLINK, + NOBLINK, +}; + +enum LED_YELLOW { + YELLOW_OFF, + YELLOW_ON, +}; + +enum LED_GREEN { + GREEN_OFF, + GREEN_ON, +}; + +/* port number on CPLD */ +#define CPLD_1_PORT_NUM 12 +#define CPLD_2_PORT_NUM 13 + +/* QSFP port number */ +#define QSFP_MAX_PORT_NUM 64 +#define QSFP_MIN_PORT_NUM 1 + +/* SFP+ port number */ +#define SFP_MAX_PORT_NUM 2 +#define SFP_MIN_PORT_NUM 1 + + +/* CPLD registers */ +#define CPLD_BOARD_TYPE_REG 0x0 +#define CPLD_EXT_BOARD_TYPE_REG 0x7 +#define CPLD_VERSION_REG 0x1 +#define CPLD_ID_REG 0x2 +#define CPLD_QSFP_PORT_STATUS_BASE_REG 0x20 +#define CPLD_QSFP_PORT_CONFIG_BASE_REG 0x30 +#define CPLD_QSFP_PORT_INTERRUPT_REG 0x40 +#define CPLD_SFP_PORT_STATUS_REG 0x2F +#define CPLD_SFP_PORT_CONFIG_REG 0x3F +#define CPLD_QSFP_PORT_INTERRUPT_REG 0x40 +#define CPLD_10GMUX_CONFIG_REG 0x41 +#define CPLD_BMC_STATUS_REG 0x42 +#define CPLD_BMC_WATCHDOG_REG 0x43 +#define CPLD_USB_STATUS_REG 0x44 +#define CPLD_RESET_CONTROL_REG 0x4A +#define CPLD_SFP_LED_REG 0x80 +#define CPLD_SFP_LED_BLINK_REG 0x90 +#define CPLD_QSFP_LED_BASE_REG 0x80 +#define CPLD_QSFP_LED_BLINK_BASE_REG 0x90 +#define CPLD_RTMR_RESET_REG 0x4B +#define CPLD_ROV_STATUS_REG 0x4C + +/* bit definition for register value */ +enum CPLD_QSFP_PORT_STATUS_BITS { + CPLD_QSFP_PORT_STATUS_INT_BIT, + CPLD_QSFP_PORT_STATUS_ABS_BIT, +}; +enum CPLD_QSFP_PORT_CONFIG_BITS { + CPLD_QSFP_PORT_CONFIG_RESET_BIT, + CPLD_QSFP_PORT_CONFIG_RESERVE_BIT, + CPLD_QSFP_PORT_CONFIG_LPMODE_BIT, +}; +enum CPLD_SFP_PORT_STATUS_BITS { + CPLD_SFP0_PORT_STATUS_PRESENT_BIT, + CPLD_SFP0_PORT_STATUS_TXFAULT_BIT, + CPLD_SFP0_PORT_STATUS_RXLOS_BIT, + CPLD_SFP_PORT_STATUS_DUMMY, + CPLD_SFP1_PORT_STATUS_PRESENT_BIT, + CPLD_SFP1_PORT_STATUS_TXFAULT_BIT, + CPLD_SFP1_PORT_STATUS_RXLOS_BIT, +}; +enum CPLD_SFP_PORT_CONFIG_BITS { + CPLD_SFP0_PORT_CONFIG_TXDIS_BIT, + CPLD_SFP0_PORT_CONFIG_RS_BIT, + CPLD_SFP0_PORT_CONFIG_TS_BIT, + CPLD_SFP_PORT_CONFIG_DUMMY, + CPLD_SFP1_PORT_CONFIG_TXDIS_BIT, + CPLD_SFP1_PORT_CONFIG_RS_BIT, + CPLD_SFP1_PORT_CONFIG_TS_BIT, + +}; +enum CPLD_10GMUX_CONFIG_BITS { + CPLD_10GMUX_CONFIG_ENSMB_BIT, + CPLD_10GMUX_CONFIG_ENINPUT_BIT, + CPLD_10GMUX_CONFIG_SEL1_BIT, + CPLD_10GMUX_CONFIG_SEL0_BIT, +}; +enum CPLD_BMC_WATCHDOG_BITS { + CPLD_10GMUX_CONFIG_ENTIMER_BIT, + CPLD_10GMUX_CONFIG_TIMEOUT_BIT, +}; +enum CPLD_RESET_CONTROL_BITS { + CPLD_RESET_CONTROL_SWRST_BIT, + CPLD_RESET_CONTROL_CP2104RST_BIT, + CPLD_RESET_CONTROL_82P33814RST_BIT, + CPLD_RESET_CONTROL_BMCRST_BIT, +}; +enum CPLD_SFP_LED_BITS { + CPLD_SFP_LED_SFP0_GREEN_BIT, + CPLD_SFP_LED_SFP0_YELLOW_BIT, + CPLD_SFP_LED_SFP1_GREEN_BIT, + CPLD_SFP_LED_SFP1_YELLOW_BIT, +}; +enum CPLD_SFP_LED_BLINK_BITS { + CPLD_SFP_LED_BLINK_SFP0_BIT, + CPLD_SFP_LED_BLINK_SFP1_BIT, +}; +enum CPLD_QSFP_LED_BITS { + CPLD_QSFP_LED_CHAN_0_GREEN_BIT, + CPLD_QSFP_LED_CHAN_0_YELLOW_BIT, + CPLD_QSFP_LED_CHAN_1_GREEN_BIT, + CPLD_QSFP_LED_CHAN_1_YELLOW_BIT, + CPLD_QSFP_LED_CHAN_2_GREEN_BIT, + CPLD_QSFP_LED_CHAN_2_YELLOW_BIT, + CPLD_QSFP_LED_CHAN_3_GREEN_BIT, + CPLD_QSFP_LED_CHAN_3_YELLOW_BIT, + +}; +enum CPLD_QSFP_LED_BLINK_BITS { + CPLD_QSFP_LED_BLINK_X_CHAN0_BIT, + CPLD_QSFP_LED_BLINK_X_CHAN1_BIT, + CPLD_QSFP_LED_BLINK_X_CHAN2_BIT, + CPLD_QSFP_LED_BLINK_X_CHAN3_BIT, + CPLD_QSFP_LED_BLINK_XPLUS_CHAN0_BIT, + CPLD_QSFP_LED_BLINK_XPLUS_CHAN1_BIT, + CPLD_QSFP_LED_BLINK_XPLUS_CHAN2_BIT, + CPLD_QSFP_LED_BLINK_XPLUS_CHAN3_BIT, +}; + +/* bit field structure for register value */ +struct cpld_reg_board_type_t { + u8 build_rev:2; + u8 hw_rev:2; + u8 board_id:4; +}; + +struct cpld_reg_version_t { + u8 revision:6; + u8 release:1; + u8 reserve:1; +}; + +struct cpld_reg_id_t { + u8 id:3; + u8 release:5; +}; + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) +#define READ_BIT(val, bit) ((0u == (val & (1<bf_name) +#define READ_BF_1(bf_struct, val, bf_name, bf_value) \ + bf_struct bf; \ + bf.data = val; \ + bf_value = bf.bf_name +#define BOARD_TYPE_BUILD_REV_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, build_rev, res) +#define BOARD_TYPE_HW_REV_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, hw_rev, res) +#define BOARD_TYPE_BOARD_ID_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, board_id, res) +#define CPLD_VERSION_REV_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, revision, res) +#define CPLD_VERSION_REL_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, release, res) +#define CPLD_ID_ID_GET(val, res) \ + READ_BF(cpld_reg_id_t, val, id, res) +#define CPLD_ID_REL_GET(val, res) \ + READ_BF(cpld_reg_id_t, val, release, res) +/* SFP/QSFP port led registers manipulation */ +#define SFP_LED_TO_CPLD_IDX(sfp_port) cpld1 +#define SFP_LED_REG(sfp_port) CPLD_SFP_LED_REG +#define SFP_LED_BLINK_REG(sfp_port) CPLD_SFP_LED_BLINK_REG +#define QSFP_LED_TO_CPLD_IDX(qsfp_port) \ + ((qsfp_port - 1) / 16 + 2) +#define QSFP_LED_REG(qsfp_port) \ + ((qsfp_port - 1) % 16 + CPLD_QSFP_LED_BASE_REG) +#define QSFP_LED_BLINK_REG(qsfp_port) \ + (((qsfp_port - 1) % 16) / 2 + CPLD_QSFP_LED_BLINK_BASE_REG) +/* QSFP/SFP port status registers manipulation */ +#define QSFP_TO_CPLD_IDX(qsfp_port, cpld_index, cpld_port) \ +{ \ + if (QSFP_MIN_PORT_NUM <= qsfp_port && qsfp_port <= CPLD_1_PORT_NUM) { \ + cpld_index = cpld1; \ + cpld_port = qsfp_port - 1; \ + } else if (CPLD_1_PORT_NUM < qsfp_port \ + && qsfp_port <= QSFP_MAX_PORT_NUM) { \ + cpld_index = cpld2 + (qsfp_port - 1 - CPLD_1_PORT_NUM) \ + / CPLD_2_PORT_NUM; \ + cpld_port = (qsfp_port - 1 - CPLD_1_PORT_NUM) % \ + CPLD_2_PORT_NUM; \ + } else { \ + cpld_index = 0; \ + cpld_port = 0; \ + } \ +} +#define QSFP_PORT_STATUS_REG(cpld_port) \ + (CPLD_QSFP_PORT_STATUS_BASE_REG + cpld_port) +#define QSFP_PORT_CONFIG_REG(cpld_port) \ + (CPLD_QSFP_PORT_CONFIG_BASE_REG + cpld_port) +#define QSFP_PORT_INT_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_QSFP_PORT_STATUS_INT_BIT) +#define QSFP_PORT_ABS_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_QSFP_PORT_STATUS_ABS_BIT) +#define QSFP_PORT_RESET_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_LPMODE_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define QSFP_PORT_RESET_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_RESET_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_LPMODE_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define QSFP_PORT_LPMODE_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define SFP_PORT_PRESENT_BIT_GET(sfp_port, port_status_value) \ + if (sfp_port == SFP_MIN_PORT_NUM) { \ + READ_BIT(port_status_value, CPLD_SFP0_PORT_STATUS_PRESENT_BIT); \ + } else { \ + READ_BIT(port_status_value, CPLD_SFP1_PORT_STATUS_PRESENT_BIT); \ + } +#define SFP_PORT_TXFAULT_BIT_GET(sfp_port, port_status_value) \ + if (sfp_port == SFP_MIN_PORT_NUM) { \ + READ_BIT(port_status_value, CPLD_SFP0_PORT_STATUS_TXFAULT_BIT); \ + } else { \ + READ_BIT(port_status_value, CPLD_SFP1_PORT_STATUS_TXFAULT_BIT); \ + } +#define SFP_PORT_RXLOS_BIT_GET(sfp_port, port_status_value) \ + if (sfp_port == SFP_MIN_PORT_NUM) { \ + READ_BIT(port_status_value, CPLD_SFP0_PORT_STATUS_RXLOS_BIT); \ + } else { \ + READ_BIT(port_status_value, CPLD_SFP1_PORT_STATUS_RXLOS_BIT); \ + } +#define SFP_PORT_TXDIS_BIT_GET(sfp_port, port_config_value) \ + if (sfp_port == SFP_MIN_PORT_NUM) { \ + READ_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_TXDIS_BIT); \ + } else { \ + READ_BIT(port_config_value, CPLD_SFP1_PORT_STATUS_RXLOS_BIT); \ + } +#define SFP_PORT_RS_BIT_GET(sfp_port, port_config_value) \ + if (sfp_port == SFP_MIN_PORT_NUM) { \ + READ_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_RS_BIT); \ + } else { \ + READ_BIT(port_config_value, CPLD_SFP1_PORT_CONFIG_RS_BIT); \ + } +#define SFP_PORT_TS_BIT_GET(sfp_port, port_config_value) \ + if (sfp_port == SFP_MIN_PORT_NUM) { \ + READ_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_TS_BIT); \ + } else { \ + READ_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_TS_BIT); \ + } +#define SFP_PORT_TXDIS_BIT_SET(sfp_port, port_config_value) \ + if (sfp_port == SFP_MIN_PORT_NUM) { \ + SET_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_TXDIS_BIT); \ + } else { \ + SET_BIT(port_config_value, CPLD_SFP1_PORT_CONFIG_TXDIS_BIT); \ + } +#define SFP_PORT_TXDIS_BIT_CLEAR(sfp_port, port_config_value) \ + if (sfp_port == SFP_MIN_PORT_NUM) { \ + CLEAR_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_TXDIS_BIT); \ + } else { \ + CLEAR_BIT(port_config_value, CPLD_SFP1_PORT_CONFIG_TXDIS_BIT); \ + } +#define SFP_PORT_RS_BIT_SET(sfp_port, port_config_value) \ + if (sfp_port == SFP_MIN_PORT_NUM) { \ + SET_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_RS_BIT); \ + } else { \ + SET_BIT(port_config_value, CPLD_SFP1_PORT_CONFIG_RS_BIT); \ + } +#define SFP_PORT_RS_BIT_CLEAR(sfp_port, port_config_value) \ + if (sfp_port == SFP_MIN_PORT_NUM) { \ + CLEAR_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_RS_BIT); \ + } else { \ + CLEAR_BIT(port_config_value, CPLD_SFP1_PORT_CONFIG_RS_BIT); \ + } +#define SFP_PORT_TS_BIT_SET(sfp_port, port_config_value) \ + if (sfp_port == SFP_MIN_PORT_NUM) { \ + SET_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_TS_BIT); \ + } else { \ + SET_BIT(port_config_value, CPLD_SFP1_PORT_CONFIG_TS_BIT); \ + } +#define SFP_PORT_TS_BIT_CLEAR(sfp_port, port_config_value) \ + if (sfp_port == SFP_MIN_PORT_NUM) { \ + CLEAR_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_TS_BIT); \ + } else { \ + CLEAR_BIT(port_config_value, CPLD_SFP1_PORT_CONFIG_TS_BIT); \ + } + +/* CPLD access functions */ +extern int ingrasys_i2c_cpld_get_qsfp_port_status_val(u8 port_num); +extern int ingrasys_i2c_cpld_get_qsfp_port_config_val(u8 port_num); +extern int ingrasys_i2c_cpld_set_qsfp_port_config_val(u8 port_num, u8 reg_val); +extern int ingrasys_i2c_cpld_get_sfp_port_status_val(void); +extern int ingrasys_i2c_cpld_get_sfp_port_config_val(void); +extern int ingrasys_i2c_cpld_set_sfp_port_config_val(u8 reg_val); +extern u8 fp_port_to_phy_port(u8 fp_port); +#endif + diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/ingrasys_s9280_64x_platform.h b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/ingrasys_s9280_64x_platform.h new file mode 100644 index 00000000000..08f14c0bd96 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/ingrasys_s9280_64x_platform.h @@ -0,0 +1,158 @@ +#ifndef _S9230_64X_PLATFORM_H +#define _S9230_64X_PLATFORM_H + +#include + +// remove debug before release +#define DEBUG + +enum bus_order { + I2C_BUS_MAIN, + MUX_9548_0_CH0, + MUX_9548_0_CH1, + MUX_9548_0_CH2, + MUX_9548_0_CH3, + MUX_9548_0_CH4, + MUX_9548_0_CH5, + MUX_9548_0_CH6, + MUX_9548_0_CH7, + MUX_9548_1_CH0, + MUX_9548_1_CH1, + MUX_9548_1_CH2, + MUX_9548_1_CH3, + MUX_9548_1_CH4, + MUX_9548_1_CH5, + MUX_9548_1_CH6, + MUX_9548_1_CH7, + MUX_9548_2_CH0, + MUX_9548_2_CH1, + MUX_9548_2_CH2, + MUX_9548_2_CH3, + MUX_9548_2_CH4, + MUX_9548_2_CH5, + MUX_9548_2_CH6, + MUX_9548_2_CH7, + MUX_9546_0_CH0, + MUX_9546_0_CH1, + MUX_9546_0_CH2, + MUX_9546_0_CH3, + MUX_9546_1_CH0, + MUX_9546_1_CH1, + MUX_9546_1_CH2, + MUX_9546_1_CH3, + MUX_9548_11_CH0, + MUX_9548_11_CH1, + MUX_9548_11_CH2, + MUX_9548_11_CH3, + MUX_9548_11_CH4, + MUX_9548_11_CH5, + MUX_9548_11_CH6, + MUX_9548_11_CH7, + MUX_9548_3_CH0, + MUX_9548_3_CH1, + MUX_9548_3_CH2, + MUX_9548_3_CH3, + MUX_9548_3_CH4, + MUX_9548_3_CH5, + MUX_9548_3_CH6, + MUX_9548_3_CH7, + MUX_9548_4_CH0, + MUX_9548_4_CH1, + MUX_9548_4_CH2, + MUX_9548_4_CH3, + MUX_9548_4_CH4, + MUX_9548_4_CH5, + MUX_9548_4_CH6, + MUX_9548_4_CH7, + MUX_9548_5_CH0, + MUX_9548_5_CH1, + MUX_9548_5_CH2, + MUX_9548_5_CH3, + MUX_9548_5_CH4, + MUX_9548_5_CH5, + MUX_9548_5_CH6, + MUX_9548_5_CH7, + MUX_9548_6_CH0, + MUX_9548_6_CH1, + MUX_9548_6_CH2, + MUX_9548_6_CH3, + MUX_9548_6_CH4, + MUX_9548_6_CH5, + MUX_9548_6_CH6, + MUX_9548_6_CH7, + MUX_9548_7_CH0, + MUX_9548_7_CH1, + MUX_9548_7_CH2, + MUX_9548_7_CH3, + MUX_9548_7_CH4, + MUX_9548_7_CH5, + MUX_9548_7_CH6, + MUX_9548_7_CH7, + MUX_9548_8_CH0, + MUX_9548_8_CH1, + MUX_9548_8_CH2, + MUX_9548_8_CH3, + MUX_9548_8_CH4, + MUX_9548_8_CH5, + MUX_9548_8_CH6, + MUX_9548_8_CH7, + MUX_9548_9_CH0, + MUX_9548_9_CH1, + MUX_9548_9_CH2, + MUX_9548_9_CH3, + MUX_9548_9_CH4, + MUX_9548_9_CH5, + MUX_9548_9_CH6, + MUX_9548_9_CH7, + MUX_9548_10_CH0, + MUX_9548_10_CH1, + MUX_9548_10_CH2, + MUX_9548_10_CH3, + MUX_9548_10_CH4, + MUX_9548_10_CH5, + MUX_9548_10_CH6, + MUX_9548_10_CH7, +}; + +#define I2C_ADDR_MUX_9555_0 (0x20) +#define I2C_ADDR_MUX_9555_1 (0x24) +#define I2C_ADDR_MUX_9555_2 (0x25) +#define I2C_ADDR_MUX_9555_3 (0x26) +#define I2C_ADDR_MUX_9539_0 (0x76) +#define I2C_ADDR_MUX_9539_1 (0x76) +#define I2C_BUS_FAN_STATUS (I2C_BUS_MAIN) +#define I2C_BUS_SYS_LED (MUX_9548_1_CH1) +#define I2C_BUS_PSU_STATUS (I2C_BUS_MAIN) +#define I2C_ADDR_PSU_STATUS (I2C_ADDR_MUX_9555_2) + +#define NUM_OF_I2C_MUX (11) +#define NUM_OF_CPLD (5) +#define NUM_OF_QSFP_PORT (64) +#define NUM_OF_SFP_PORT (2) +#define QSFP_EEPROM_I2C_ADDR (0x50) + +enum gpio_reg { + REG_PORT0_IN, + REG_PORT1_IN, + REG_PORT0_OUT, + REG_PORT1_OUT, + REG_PORT0_POL, + REG_PORT1_POL, + REG_PORT0_DIR, + REG_PORT1_DIR, +}; + +struct ing_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +struct i2c_init_data { + __u16 ch; + __u16 addr; + __u8 reg; + __u8 value; +}; + +#endif diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/ingrasys_s9280_64x_psu.c b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/ingrasys_s9280_64x_psu.c new file mode 100644 index 00000000000..c2537bf4085 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/modules/ingrasys_s9280_64x_psu.c @@ -0,0 +1,394 @@ +/* + * S9280-64x PSU driver + * + * Copyright (C) 2017 Ingrasys, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "ingrasys_s9280_64x_platform.h" + +static ssize_t show_psu_eeprom(struct device *dev, + struct device_attribute *da, + char *buf); +static struct s9280_psu_data *s9280_psu_update_status(struct device *dev); +static struct s9280_psu_data *s9280_psu_update_eeprom(struct device *dev); +static int s9280_psu_read_block(struct i2c_client *client, + u8 command, + u8 *data, + int data_len); + + +#define DRIVER_NAME "psu" + +// Addresses scanned +static const unsigned short normal_i2c[] = { 0x50, I2C_CLIENT_END }; + +/* PSU EEPROM SIZE */ +#define EEPROM_SZ 256 +#define READ_EEPROM 1 +#define NREAD_EEPROM 0 + +static struct i2c_client pca9555_client; + +/* pca9555 gpio pin mapping */ +#define PSU2_PWROK 0 +#define PSU2_PRSNT_L 1 +#define PSU2_PWRON_L 2 +#define PSU1_PWROK 3 +#define PSU1_PRSNT_L 4 +#define PSU1_PWRON_L 5 +#define TMP_75_INT_L 6 + +/* Driver Private Data */ +struct s9280_psu_data { + struct mutex lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + s32 status; /* IO expander value */ + char eeprom[EEPROM_SZ]; /* psu eeprom data */ + char psuABS; /* PSU absent */ + char psuPG; /* PSU power good */ +}; + +enum psu_index +{ + s9280_psu1, + s9280_psu2 +}; + +/* + * display power good attribute + */ +static ssize_t +show_psu_pg(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct s9280_psu_data *data = s9280_psu_update_status(dev); + unsigned int value; + + mutex_lock(&data->lock); + value = data->psuPG; + mutex_unlock(&data->lock); + + return sprintf(buf, "%d\n", value); +} + +/* + * display power absent attribute + */ +static ssize_t +show_psu_abs(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct s9280_psu_data *data = s9280_psu_update_status(dev); + unsigned int value; + + mutex_lock(&data->lock); + value = data->psuABS; + mutex_unlock(&data->lock); + + return sprintf(buf, "%d\n", value); +} + + +/* + * sysfs attributes for psu + */ +static DEVICE_ATTR(psu_pg, S_IRUGO, show_psu_pg, NULL); +static DEVICE_ATTR(psu_abs, S_IRUGO, show_psu_abs, NULL); +static DEVICE_ATTR(psu_eeprom, S_IRUGO, show_psu_eeprom, NULL); + +static struct attribute *s9280_psu_attributes[] = { + &dev_attr_psu_pg.attr, + &dev_attr_psu_abs.attr, + &dev_attr_psu_eeprom.attr, + NULL +}; + +/* + * display psu eeprom content + */ +static ssize_t +show_psu_eeprom(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct s9280_psu_data *data = s9280_psu_update_eeprom(dev); + + memcpy(buf, (char *)data->eeprom, EEPROM_SZ); + return EEPROM_SZ; +} + +static const struct attribute_group s9280_psu_group = { + .attrs = s9280_psu_attributes, +}; + +/* + * check gpio expander is accessible + */ +static int +pca9555_detect(struct i2c_client *client) +{ + if (i2c_smbus_read_byte_data(client, REG_PORT0_DIR) < 0) { + return -ENODEV; + } + + return 0; +} + +/* + * client init + */ +static void +i2c_devices_client_address_init(struct i2c_client *client) +{ + pca9555_client = *client; + + /* get i2c adapter for the target */ + pca9555_client.adapter = i2c_get_adapter(I2C_BUS_PSU_STATUS); + + /* get the i2c addr for the target */ + pca9555_client.addr = I2C_ADDR_PSU_STATUS; +} + +static int +s9280_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct s9280_psu_data *data; + int status, err; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct s9280_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + memset(data, 0, sizeof(struct s9280_psu_data)); + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->lock); + + i2c_devices_client_address_init(client); + + err = pca9555_detect(&pca9555_client); + if (err) { + return err; + } + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &s9280_psu_group); + if (status) { + goto exit_free; + } + + return 0; + +exit_free: + kfree(data); +exit: + + return status; +} + +static int +s9280_psu_remove(struct i2c_client *client) +{ + struct s9280_psu_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &s9280_psu_group); + kfree(data); + + /* free i2c adapter */ + i2c_put_adapter(pca9555_client.adapter); + + return 0; +} + + +/* + * psu eeprom read utility + */ +static int +s9280_psu_read_block(struct i2c_client *client, + u8 command, + u8 *data, + int data_len) +{ + int i=0, ret=0; + int blk_max = 32; //max block read size + + /* read eeprom, 32 * 8 = 256 bytes */ + for (i=0; i < EEPROM_SZ/blk_max; i++) { + ret = i2c_smbus_read_i2c_block_data(client, (i*blk_max), blk_max, + data + (i*blk_max)); + if (ret < 0) { + return ret; + } + } + return ret; +} + +/* + * update eeprom content + */ +static struct s9280_psu_data +*s9280_psu_update_eeprom(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct s9280_psu_data *data = i2c_get_clientdata(client); + s32 status = 0; + int psu_pwrok = 0; + int psu_prsnt_l = 0; + + mutex_lock(&data->lock); + + if (time_after(jiffies, data->last_updated + 300 * HZ) + || !data->valid) { + + /* Read psu status */ + + status = i2c_smbus_read_word_data(&(pca9555_client), REG_PORT0_IN); + data->status = status; + + /*read psu status from io expander*/ + + if (data->index == s9280_psu1) { + psu_pwrok = PSU1_PWROK; + psu_prsnt_l = PSU1_PRSNT_L; + } else { + psu_pwrok = PSU2_PWROK; + psu_prsnt_l = PSU2_PRSNT_L; + } + data->psuPG = (status >> psu_pwrok) & 0x1; + data->psuABS = (status >> psu_prsnt_l) & 0x1; + + /* Read eeprom */ + if (!data->psuABS) { + //clear local eeprom data + memset(data->eeprom, 0, EEPROM_SZ); + + //read eeprom + status = s9280_psu_read_block(client, 0, data->eeprom, + ARRAY_SIZE(data->eeprom)); + + if (status < 0) { + memset(data->eeprom, 0, EEPROM_SZ); + dev_err(&client->dev, "Read eeprom failed, status=(%d)\n", status); + } else { + data->valid = 1; + } + } else { + memset(data->eeprom, 0, EEPROM_SZ); + } + data->last_updated = jiffies; + } + + mutex_unlock(&data->lock); + + return data; +} + +/* + * update psu status + */ +static struct s9280_psu_data +*s9280_psu_update_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct s9280_psu_data *data = i2c_get_clientdata(client); + s32 status = 0; + int psu_pwrok = 0; + int psu_prsnt_l = 0; + + mutex_lock(&data->lock); + + /* Read psu status */ + + status = i2c_smbus_read_word_data(&(pca9555_client), REG_PORT0_IN); + data->status = status; + + /*read psu status from io expander*/ + + if (data->index == s9280_psu1) { + psu_pwrok = PSU1_PWROK; + psu_prsnt_l = PSU1_PRSNT_L; + } else { + psu_pwrok = PSU2_PWROK; + psu_prsnt_l = PSU2_PRSNT_L; + } + data->psuPG = (status >> psu_pwrok) & 0x1; + data->psuABS = (status >> psu_prsnt_l) & 0x1; + + mutex_unlock(&data->lock); + + return data; +} + +static const struct i2c_device_id s9280_psu_id[] = { + { "psu1", s9280_psu1 }, + { "psu2", s9280_psu2 }, + {} +}; + +MODULE_DEVICE_TABLE(i2c, s9280_psu_id); + +static struct i2c_driver s9280_psu_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = s9280_psu_probe, + .remove = s9280_psu_remove, + .id_table = s9280_psu_id, + .address_list = normal_i2c, +}; + +static int __init s9280_psu_init(void) +{ + return i2c_add_driver(&s9280_psu_driver); +} + +static void __exit s9280_psu_exit(void) +{ + i2c_del_driver(&s9280_psu_driver); +} + +module_init(s9280_psu_init); +module_exit(s9280_psu_exit); + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("S9280-64X psu driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/service/qsfp-monitor.service b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/service/qsfp-monitor.service new file mode 100644 index 00000000000..c801ad68966 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/service/qsfp-monitor.service @@ -0,0 +1,15 @@ +[Unit] +Description= This QSFP Monitor service is to setup QSFP SI. +Requires=s9280-64x-monitor.service +After=s9280-64x-monitor.service + +[Service] +ExecStart=/usr/sbin/qsfp_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/service/s9280-64x-monitor.service b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/service/s9280-64x-monitor.service new file mode 100644 index 00000000000..5f22b6164dd --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/service/s9280-64x-monitor.service @@ -0,0 +1,19 @@ +[Unit] +Description= This Platform Monitor service is to initialize platform and monitor platform. +Before=platform-monitor.service +After=sysinit.target +Wants=fancontrol.service +Wants=qsfp-monitor.service +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/sbin/i2c_utils.sh i2c_init +ExecStart=/usr/sbin/s9280_64x_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/utils/i2c_utils.sh b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/utils/i2c_utils.sh new file mode 100755 index 00000000000..dcd7bf71733 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/utils/i2c_utils.sh @@ -0,0 +1,1928 @@ +#!/bin/bash + +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# trun on for more debug output +#DEBUG="on" + +VERSION="1.0.0" +TRUE=200 +FALSE=404 + +EXEC_FUNC=${1} +COLOR_LED=${2} +QSFP_PORT=${2} +SFP_PORT=${2} +QSFP_ACTION=${2} +SFP_ACTION=${2} +MB_EEPROM_ACTION=${2} +ONOFF_LED=${3} +FAN_TRAY=${4} + +############################################################ +# Distributor ID: Debian +# Description: Debian GNU/Linux 8.6 (jessie) +# Release: 8.6 +# Codename: jessie +# Linux debian 3.16.0-4-amd64 #1 +# SMP Debian 3.16.36-1+deb8u1 (2016-09-03) x86_64 GNU/Linux +############################################################ + +# Color Definition +COLOR_TITLE="\e[1;32m" ### Green ### +COLOR_WARNING="\e[1;33m" ### Yellow ### +COLOR_ERROR="\e[1;31m" ### Red ### +COLOR_END="\e[0m" ### END ### + +NUM_I801_DEVICE=0 + +# PCA9548#0 0x70 +NUM_MUX_9548_0_CH0=$(( ${NUM_I801_DEVICE} + 1 )) # CPLD1 +NUM_MUX_9548_0_CH1=$(( ${NUM_I801_DEVICE} + 2 )) # CPLD2 +NUM_MUX_9548_0_CH2=$(( ${NUM_I801_DEVICE} + 3 )) # CPLD3 +NUM_MUX_9548_0_CH3=$(( ${NUM_I801_DEVICE} + 4 )) # CPLD4 +NUM_MUX_9548_0_CH4=$(( ${NUM_I801_DEVICE} + 5 )) # CPLD5 +NUM_MUX_9548_0_CH5=$(( ${NUM_I801_DEVICE} + 6 )) # LM75_1 LM75_2 LM86 +NUM_MUX_9548_0_CH6=$(( ${NUM_I801_DEVICE} + 7 )) # LM75_3 LM75_4 + +# PCA9548#1 0x73 +NUM_MUX_9548_1_CH0=$(( ${NUM_I801_DEVICE} + 9 )) # UCD9090 +NUM_MUX_9548_1_CH1=$(( ${NUM_I801_DEVICE} + 10 )) # PCA9539#0 0x76 for FP LED & HW ID +NUM_MUX_9548_1_CH2=$(( ${NUM_I801_DEVICE} + 11 )) # NONE +NUM_MUX_9548_1_CH3=$(( ${NUM_I801_DEVICE} + 12 )) # EEPROM for debug 0x57 +#NUM_MUX_9548_1_CH4=$(( ${NUM_I801_DEVICE} + 13 )) # NONE +NUM_MUX_9548_1_CH5=$(( ${NUM_I801_DEVICE} + 14 )) # CLK gen +NUM_MUX_9548_1_CH6=$(( ${NUM_I801_DEVICE} + 15 )) # ROV +NUM_MUX_9548_1_CH7=$(( ${NUM_I801_DEVICE} + 16 )) # HWM on BMC + +# PCA9546#0 0X72 +NUM_MUX_9546_0_CH0=$(( ${NUM_I801_DEVICE} + 17 )) # PSU1 0x58 +NUM_MUX_9546_0_CH1=$(( ${NUM_I801_DEVICE} + 18 )) # PSU2 0x58 +NUM_MUX_9546_0_CH2=$(( ${NUM_I801_DEVICE} + 19 )) # NONE +NUM_MUX_9546_0_CH3=$(( ${NUM_I801_DEVICE} + 20 )) # NONE + +# PCA9548#2 0X71 +NUM_MUX_9548_2_CH0=$(( ${NUM_I801_DEVICE} + 21 )) # PCA9548#3 0x74 +NUM_MUX_9548_2_CH1=$(( ${NUM_I801_DEVICE} + 22 )) # PCA9548#4 0x74 +NUM_MUX_9548_2_CH2=$(( ${NUM_I801_DEVICE} + 23 )) # PCA9548#5 0x74 +NUM_MUX_9548_2_CH3=$(( ${NUM_I801_DEVICE} + 24 )) # PCA9548#6 0x74 +NUM_MUX_9548_2_CH4=$(( ${NUM_I801_DEVICE} + 25 )) # PCA9548#7 0x74 +NUM_MUX_9548_2_CH5=$(( ${NUM_I801_DEVICE} + 26 )) # PCA9548#8 0x74 +NUM_MUX_9548_2_CH6=$(( ${NUM_I801_DEVICE} + 27 )) # PCA9548#9 0x74 +NUM_MUX_9548_2_CH7=$(( ${NUM_I801_DEVICE} + 28 )) # PCA9548#10 0x74 + + + +# PCA9546#1 0X77 +NUM_MUX_9546_1_CH0=$(( ${NUM_I801_DEVICE} + 29 )) # SFP0 EEPROM 0x50 +NUM_MUX_9546_1_CH1=$(( ${NUM_I801_DEVICE} + 30 )) # SFP1 EEPROM 0x50 +NUM_MUX_9546_1_CH2=$(( ${NUM_I801_DEVICE} + 31 )) # NONE +NUM_MUX_9546_1_CH3=$(( ${NUM_I801_DEVICE} + 32 )) # PCA9539#1 0x76 for sys control + +# PCA9548#11 0X75 +NUM_MUX_9548_11_CH0=$(( ${NUM_I801_DEVICE} + 33 )) # SW upgrade for CPLD1 +NUM_MUX_9548_11_CH1=$(( ${NUM_I801_DEVICE} + 34 )) # SW upgrade for CPLD2 +NUM_MUX_9548_11_CH2=$(( ${NUM_I801_DEVICE} + 35 )) # SW upgrade for CPLD3 +NUM_MUX_9548_11_CH3=$(( ${NUM_I801_DEVICE} + 36 )) # SW upgrade for CPLD4 +NUM_MUX_9548_11_CH4=$(( ${NUM_I801_DEVICE} + 37 )) # SW upgrade for CPLD5 +NUM_MUX_9548_11_CH5=$(( ${NUM_I801_DEVICE} + 38 )) # EEPROM for debug 0x57 +NUM_MUX_9548_11_CH6=$(( ${NUM_I801_DEVICE} + 39 )) # Retimer#0~3 +NUM_MUX_9548_11_CH7=$(( ${NUM_I801_DEVICE} + 40 )) # Retimer#4~7 + +# PCA9548#3~10 0X74 +NUM_MUX_9548_3_CH0=$(( ${NUM_I801_DEVICE} + 41 )) # QSFP 0 EEPROM +NUM_MUX_9548_4_CH0=$(( ${NUM_I801_DEVICE} + 49 )) # QSFP 8 EEPROM +NUM_MUX_9548_5_CH0=$(( ${NUM_I801_DEVICE} + 57 )) # QSFP 16 EEPROM +NUM_MUX_9548_6_CH0=$(( ${NUM_I801_DEVICE} + 65 )) # QSFP 24 EEPROM +NUM_MUX_9548_7_CH0=$(( ${NUM_I801_DEVICE} + 73 )) # QSFP 32 EEPROM +NUM_MUX_9548_8_CH0=$(( ${NUM_I801_DEVICE} + 81 )) # QSFP 40 EEPROM +NUM_MUX_9548_9_CH0=$(( ${NUM_I801_DEVICE} + 89 )) # QSFP 48 EEPROM +NUM_MUX_9548_10_CH0=$(( ${NUM_I801_DEVICE} + 97 )) # QSFP 56 EEPROM + +# MUX Alias +I2C_BUS_MAIN=${NUM_I801_DEVICE} +I2C_BUS_HWM=${NUM_MUX_9548_1_CH7} +I2C_BUS_FAN_STATUS=${I2C_BUS_MAIN} +I2C_BUS_SYS_LED=${NUM_MUX_9548_1_CH1} +I2C_BUS_HW_ID=${NUM_MUX_9548_1_CH1} +I2C_BUS_BMC_HW_ID=${I2C_BUS_MAIN} +I2C_BUS_PSU_STAT=${I2C_BUS_MAIN} +I2C_BUS_FANTRAY_LED=${I2C_BUS_MAIN} +I2C_BUS_MB_EEPROM=${I2C_BUS_MAIN} +I2C_BUS_CB_EEPROM=${I2C_BUS_MAIN} +# TODO: check i2c channel of PSU1/PSU2, it swap in s9230 +I2C_BUS_PSU1_EEPROM=${NUM_MUX_9546_0_CH1} +I2C_BUS_PSU2_EEPROM=${NUM_MUX_9546_0_CH0} +I2C_BUS_CPLD1=${NUM_MUX_9548_0_CH0} +I2C_BUS_CPLD2=${NUM_MUX_9548_0_CH1} +I2C_BUS_CPLD3=${NUM_MUX_9548_0_CH2} +I2C_BUS_CPLD4=${NUM_MUX_9548_0_CH3} +I2C_BUS_CPLD5=${NUM_MUX_9548_0_CH4} +I2C_BUS_ROV=${NUM_MUX_9548_1_CH6} + +# I2C BUS path +PATH_SYS_I2C_DEVICES="/sys/bus/i2c/devices" +PATH_HWMON_ROOT_DEVICES="/sys/class/hwmon" +# TODO: need to verify HWM deivce path after board ready +PATH_HWMON_W83795_DEVICE="${PATH_HWMON_ROOT_DEVICES}/hwmon1" +PATH_I801_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_I801_DEVICE}" +PATH_MUX_9548_0_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH0}" +PATH_MUX_9548_0_CH1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH1}" +PATH_MUX_9548_0_CH2="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH2}" +PATH_MUX_9548_0_CH3="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH3}" +PATH_MUX_9548_0_CH4="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH4}" +PATH_MUX_9548_0_CH5="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH5}" +PATH_MUX_9548_0_CH6="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH6}" +PATH_MUX_9548_0_CH7="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH7}" +PATH_MUX_9548_1_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CH0}" +PATH_MUX_9548_1_CH1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CH1}" +PATH_MUX_9548_1_CH2="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CH2}" +PATH_MUX_9548_1_CH3="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CH3}" +PATH_MUX_9548_1_CH4="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CH4}" +PATH_MUX_9548_1_CH5="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CH5}" +PATH_MUX_9548_1_CH6="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CH6}" +PATH_MUX_9548_1_CH7="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CH7}" +PATH_MUX_9548_2_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH0}" +PATH_MUX_9548_2_CH1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH1}" +PATH_MUX_9548_2_CH2="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH2}" +PATH_MUX_9548_2_CH3="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH3}" +PATH_MUX_9548_2_CH4="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH4}" +PATH_MUX_9548_2_CH5="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH5}" +PATH_MUX_9548_2_CH6="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH6}" +PATH_MUX_9548_2_CH7="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH7}" +PATH_MUX_9546_0_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9546_0_CH0}" +PATH_MUX_9546_0_CH1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9546_0_CH1}" +PATH_MUX_9546_0_CH2="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9546_0_CH2}" +PATH_MUX_9546_0_CH3="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9546_0_CH3}" +PATH_MUX_9546_1_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9546_1_CH0}" +PATH_MUX_9546_1_CH1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9546_1_CH1}" +PATH_MUX_9546_1_CH2="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9546_1_CH2}" +PATH_MUX_9546_1_CH3="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9546_1_CH3}" +PATH_MUX_9548_11_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_11_CH0}" +PATH_MUX_9548_3_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_3_CH0}" +PATH_MUX_9548_4_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_4_CH0}" +PATH_MUX_9548_5_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_5_CH0}" +PATH_MUX_9548_6_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_6_CH0}" +PATH_MUX_9548_7_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_7_CH0}" +PATH_MUX_9548_8_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_8_CH0}" +PATH_MUX_9548_9_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_9_CH0}" +PATH_MUX_9548_10_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_10_CH0}" +PATH_CPLD1_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CPLD1}" +PATH_CPLD2_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CPLD2}" +PATH_CPLD3_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CPLD3}" +PATH_CPLD4_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CPLD4}" +PATH_CPLD5_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CPLD5}" + + +# I2C Address +### I2C MUX +I2C_ADDR_MUX_9548_0=0x70 +I2C_ADDR_MUX_9548_1=0x73 +I2C_ADDR_MUX_9548_2=0x71 +I2C_ADDR_MUX_9546_0=0x72 +I2C_ADDR_MUX_9546_1=0x71 +I2C_ADDR_MUX_9548_11=0x75 +I2C_ADDR_MUX_9548_3=0x74 +I2C_ADDR_MUX_9548_4=0x74 +I2C_ADDR_MUX_9548_5=0x74 +I2C_ADDR_MUX_9548_6=0x74 +I2C_ADDR_MUX_9548_7=0x74 +I2C_ADDR_MUX_9548_8=0x74 +I2C_ADDR_MUX_9548_9=0x74 +I2C_ADDR_MUX_9548_10=0x74 + +### GPIO Expander +I2C_ADDR_MUX_9539_0=0x76 # LED & HW ID +I2C_ADDR_MUX_9539_1=0x76 # SYS config +I2C_ADDR_MUX_9539_2=0x76 # on CPU board, STATUS and ERR from CPLD +I2C_ADDR_MUX_9555_0=0x20 # on FAN board, fan status and led config +I2C_ADDR_MUX_9555_1=0x24 # on BMC board, INT and HW ID +I2C_ADDR_MUX_9555_2=0x25 # on BMC board, PSU status +I2C_ADDR_MUX_9555_3=0x26 # on BMC board, RST and SEL + + +### peripheral +I2C_ADDR_MB_EEPROM=0x55 # on main board +I2C_ADDR_CB_EEPROM=0x51 # on cpu board +I2C_ADDR_UCD9090=0x34 +I2C_ADDR_W83795=0x2F +I2C_ADDR_PSU1_EEPROM=0x50 +I2C_ADDR_PSU2_EEPROM=0x50 +I2C_ADDR_LM75_1=0x4D # Rear Panel +I2C_ADDR_LM75_2=0x4E # Rear MAC +I2C_ADDR_LM86=0x4C # TBD +I2C_ADDR_LM75_3=0x4D # Front Panel +I2C_ADDR_LM75_4=0x4E # Front MAC +I2C_ADDR_TMP75_CB=0x4F # on cpu board +I2C_ADDR_TMP75_BB=0x4A # on bmc board +I2C_ADDR_QSFP_EEPROM=0x50 +I2C_ADDR_SFP_EEPROM=0x50 +I2C_ADDR_CPLD=0x33 +I2C_ADDR_ROV=0x76 + +#sysfs +PATH_SYSFS_PSU1="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_PSU1_EEPROM}-$(printf "%04x" $I2C_ADDR_PSU1_EEPROM)" +PATH_SYSFS_PSU2="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_PSU2_EEPROM}-$(printf "%04x" $I2C_ADDR_PSU2_EEPROM)" + +#ACTIVE LOW enable flag +ACTIVE_LOW_EN=1 +ACTIVE_HIGH_EN=0 +#GPIO Direction In/Out +DIR_IN=in +DIR_OUT=out + +#Power Supply Status +PSU_DC_ON=1 +PSU_DC_OFF=0 +PSU_EXIST=1 +PSU_NOT_EXIST=0 + +# IO expander register +# direction +REG_PORT0_DIR=6 +REG_PORT1_DIR=7 +# polarity +REG_PORT0_POL=4 +REG_PORT1_POL=5 +# output +REG_PORT0_OUT=2 +REG_PORT1_OUT=3 +# input +REG_PORT0_IN=0 +REG_PORT1_IN=1 + +# qsfp port number range +MIN_QSFP_PORT_NUM=1 +MAX_QSFP_PORT_NUM=64 + +# sfp+ port number range +MIN_SFP_PORT_NUM=1 +MAX_SFP_PORT_NUM=2 + +# CPLD access +# ROV status +CPLD_ROV_STATUS_KEY=cpld_rov_status +# port status +CPLD_QSFP_STATUS_KEY=cpld_qsfp_port_status +CPLD_SFP_STATUS_KEY=cpld_sfp_port_status +# bit define +CPLD_QSFP_STATUS_ABS_BIT=1 +CPLD_SFP0_STATUS_PRES_BIT=0 +CPLD_SFP1_STATUS_PRES_BIT=4 + +# fp port to phy port mapping +fp2phy_array=( 0 1 4 5 8 9 12 13 16 17 20 21 24 25 28 29 + 32 33 36 37 40 41 44 45 48 49 52 53 56 57 60 61 + 2 3 6 7 10 11 14 15 18 19 22 23 26 27 30 31 + 34 35 38 39 42 43 46 47 50 51 54 55 58 59 62 63) +# fp port to led port mapping +fp2led_array=( 1 2 5 6 9 10 13 14 1 2 5 6 9 10 13 14 + 1 2 5 6 9 10 13 14 1 2 5 6 9 10 13 14 + 3 4 7 8 11 12 15 16 3 4 7 8 11 12 15 16 + 3 4 7 8 11 12 15 16 3 4 7 8 11 12 15 16) +# vdd value for mac +rov_val_array=( 0.85 0.82 0.77 0.87 0.74 0.84 0.79 0.89 ) +rov_reg_array=( 0x79 0x73 0x69 0x7D 0x63 0x77 0x6D 0x81 ) + +# Help usage function +function _help { + echo "=========================================================" + echo "# Description: Help Function" + echo "=========================================================" + echo "----------------------------------------------------" + echo "EX : ${0} help" + echo " : ${0} i2c_init" + echo " : ${0} i2c_deinit" + echo " : ${0} i2c_fan_speed_init" + echo " : ${0} i2c_io_exp_init" + echo " : ${0} i2c_led_test" + echo " : ${0} i2c_psu_eeprom_get" + echo " : ${0} i2c_mb_eeprom_get" + echo " : ${0} i2c_cb_eeprom_get" + echo " : ${0} i2c_qsfp_eeprom_get [${MIN_QSFP_PORT_NUM}-${MAX_QSFP_PORT_NUM}]" + echo " : ${0} i2c_sfp_eeprom_get [${MIN_SFP_PORT_NUM}-${MAX_SFP_PORT_NUM}]" + echo " : ${0} i2c_qsfp_eeprom_init new|delete" + echo " : ${0} i2c_sfp_eeprom_init new|delete" + echo " : ${0} i2c_mb_eeprom_init new|delete" + echo " : ${0} i2c_cb_eeprom_init new|delete" + echo " : ${0} i2c_qsfp_status_get [${MIN_QSFP_PORT_NUM}-${MAX_QSFP_PORT_NUM}]" + echo " : ${0} i2c_sfp_status_get [${MIN_SFP_PORT_NUM}-${MAX_SFP_PORT_NUM}]" + echo " : ${0} i2c_qsfp_type_get [${MIN_QSFP_PORT_NUM}-${MAX_QSFP_PORT_NUM}]" + echo " : ${0} i2c_sfp_type_get [${MIN_SFP_PORT_NUM}-${MAX_SFP_PORT_NUM}]" + echo " : ${0} i2c_qsfp_ddm_get [${MIN_QSFP_PORT_NUM}-${MAX_QSFP_PORT_NUM}]" + echo " : ${0} i2c_board_type_get" + echo " : ${0} i2c_bmc_board_type_get" + echo " : ${0} i2c_cpld_version" + echo " : ${0} i2c_psu_status" + echo " : ${0} i2c_led_psu_status_set" + echo " : ${0} i2c_led_fan_status_set" + echo " : ${0} i2c_led_fan_tray_status_set" + echo " : ${0} i2c_test_all" + echo " : ${0} i2c_sys_led green|amber" + echo " : ${0} i2c_fan_led green|amber|off" + echo " : ${0} i2c_psu1_led green|amber|off" + echo " : ${0} i2c_psu2_led green|amber|off" + echo " : ${0} i2c_fan_tray_led green|amber on|off [1-4]" + echo "----------------------------------------------------" +} + +#Pause function +function _pause { + read -p "$*" +} + +#Retry command function +function _retry { + local i + for i in {1..5}; + do + echo "${*}" + eval "${*}" && break || echo "retry"; sleep 1; + done +} + +# front panel port to physical port mapping +function _port_fp2phy { + + local fp_port=$1 + local phy_port=0 + local index=$((${fp_port} - 1)) + # change to 1 base index for internal use + phy_port=$((${fp2phy_array[$index]} + 1)) + #phy_port=${fp2phy_array[$index]} + + echo $phy_port +} + +#front panel port to led port mapping +function _port_fp2led { + + local logic_port=$1 + local led_port=0 + led_port=${fp2led_array[$logic_port]} + + echo $led_port +} + +#I2C Init +function _i2c_init { + echo "=========================================================" + echo "# Description: I2C Init" + echo "=========================================================" + + #remove optoe module + rmmod optoe + + #rmmod i2c_ismt + _util_rmmod i2c_i801 + modprobe i2c_i801 + modprobe i2c_dev + modprobe i2c_mux_pca954x force_deselect_on_exit=1 + + # add MUX PCA9548#0 on I801, assume to be i2c-1~8 + if [ ! -e ${PATH_MUX_9548_0_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_0}' > ${PATH_I801_DEVICE}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_0} already init." + fi + + # add MUX PCA9548#1 on I801, assume to be i2c-9~16 + if [ ! -e ${PATH_MUX_9548_1_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_1}' > ${PATH_I801_DEVICE}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_1} already init." + fi + + # add MUX PCA9546#0 on I801, assume to be i2c-17~20 + if [ ! -e ${PATH_MUX_9546_0_CH0} ]; then + _retry "echo 'pca9546 ${I2C_ADDR_MUX_9546_0}' > ${PATH_I801_DEVICE}/new_device" + else + echo "pca9546 ${I2C_ADDR_MUX_9546_0} already init." + fi + + # add MUX PCA9548#2 on I801, assume to be i2c-21~28 + if [ ! -e ${PATH_MUX_9548_2_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_2}' > ${PATH_MUX_9546_0_CH2}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_2} already init." + fi + + # add MUX PCA9546#1 on I801, assume to be i2c-29~32 + if [ ! -e ${PATH_MUX_9546_1_CH0} ]; then + _retry "echo 'pca9546 ${I2C_ADDR_MUX_9546_1}' > ${PATH_MUX_9546_0_CH3}/new_device" + else + echo "pca9546 ${I2C_ADDR_MUX_9546_1} already init." + fi + + # add MUX PCA9548#11 on I801, assume to be i2c-33~40 + if [ ! -e ${PATH_MUX_9548_11_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_11}' > ${PATH_I801_DEVICE}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_11} already init." + fi + + # add MUX PCA9548#3 on PCA9548#2 CH0, assume to be i2c-41~48 + if [ ! -e ${PATH_MUX_9548_3_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_3}' > ${PATH_MUX_9548_2_CH0}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_4} already init." + fi + + # add MUX PCA9548#4 on PCA9548#2 CH1, assume to be i2c-49~56 + if [ ! -e ${PATH_MUX_9548_4_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_4}' > ${PATH_MUX_9548_2_CH1}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_4} already init." + fi + + # add MUX PCA9548#5 on PCA9548#2 CH2, assume to be i2c-57~64 + if [ ! -e ${PATH_MUX_9548_5_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_5}' > ${PATH_MUX_9548_2_CH2}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_5} already init." + fi + + # add MUX PCA9548#6 on PCA9548#2 CH3, assume to be i2c-65~72 + if [ ! -e ${PATH_MUX_9548_6_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_6}' > ${PATH_MUX_9548_2_CH3}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_6} already init." + fi + + # add MUX PCA9548#7 on PCA9548#2 CH4, assume to be i2c-73~80 + if [ ! -e ${PATH_MUX_9548_7_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_7}' > ${PATH_MUX_9548_2_CH4}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_7} already init." + fi + + # add MUX PCA9548#8 on PCA9548#2 CH5, assume to be i2c-81~88 + if [ ! -e ${PATH_MUX_9548_8_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_8}' > ${PATH_MUX_9548_2_CH5}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_8} already init." + fi + + # add MUX PCA9548#9 on PCA9548#2 CH6, assume to be i2c-89~96 + if [ ! -e ${PATH_MUX_9548_9_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_9}' > ${PATH_MUX_9548_2_CH6}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_9} already init." + fi + + # add MUX PCA9548#10 on PCA9548#2 CH7, assume to be i2c-97~104 + if [ ! -e ${PATH_MUX_9548_10_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_10}' > ${PATH_MUX_9548_2_CH7}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_10} already init." + fi + + _i2c_hwm_init + _util_rmmod eeprom + modprobe eeprom_mb + modprobe gpio-pca953x + _i2c_io_exp_init + _i2c_sensors_init + _i2c_cpld_init + _i2c_psu_init + + _i2c_qsfp_eeprom_init "new" + _i2c_sfp_eeprom_init "new" + _i2c_mb_eeprom_init "new" + _i2c_cb_eeprom_init "new" + _i2c_fan_speed_init + _i2c_led_psu_status_set + _i2c_led_fan_status_set + + # clear port led + _util_port_led_clear + + # rov for mac init + _mac_vdd_init + + # trun on sys led + echo "led_sys setup..." + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_sys_led + + _config_rmem +} + +function _mac_vdd_init { + # read mac vid register value from CPLD + cpld_index=1 + _i2c_cpld_reg_read ${cpld_index} ${CPLD_ROV_STATUS_KEY} + # get vid form register value [0:2] + vid=$(($cpld_reg_val & 0x7)) + # get rov val and reg according to vid + rov_val=${rov_val_array[$vid]} + rov_reg=${rov_reg_array[$vid]} + echo "vid=${vid}, rov_val=${rov_val}, rov_reg=${rov_reg}" + + # write the rov reg to rov + i2cset -y -r ${I2C_BUS_ROV} ${I2C_ADDR_ROV} 0x21 ${rov_reg} w + + if [ $? -eq 0 ]; then + echo "set ROV for mac vdd done" + else + echo "set ROV for mac vdd fail" + fi +} + +#I2C Deinit +function _i2c_deinit { + echo "i2c deinit..." + for mod in coretemp jc42 w83795 ingrasys_s9280_64x_psu ingrasys_s9280_64x_i2c_cpld eeprom eeprom_mb gpio-pca953x i2c_mux_pca954x i2c_i801; + do + _util_rmmod $mod + done + echo "Done" +} + +function _i2c_cpld_init { + echo "CPLD init..." + _util_rmmod ingrasys_s9280_64x_i2c_cpld + modprobe ingrasys_s9280_64x_i2c_cpld + + # add cpld 1~5 to sysfs + for i in {1..5}; + do + local cpld_bus="I2C_BUS_CPLD${i}" + local cpld_path="PATH_CPLD${i}_DEVICE" + dev_path="${PATH_SYS_I2C_DEVICES}/${!cpld_bus}-$(printf "%04x" ${I2C_ADDR_CPLD})" + if ! [ -L ${dev_path} ]; then + echo "ingrasys_cpld${i} ${I2C_ADDR_CPLD}" > ${!cpld_path}/new_device + else + echo "${dev_path} already exist" + fi + done + + echo "Done" +} + +function _i2c_sensors_init { + echo "SENSORS init..." + local dev_path + # to make sure hwmon index in sysfs as expected, + # need to remove kernel module and then probe them in expected order + # remove all sensors kernel module + _util_rmmod coretemp + _util_rmmod jc42 + _util_rmmod w83795 + # probe coretemp kernel module + modprobe coretemp #hwmon0 + # probe hwmon kernel module + modprobe w83795 + # add w83795 to sysfs + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_1_CH7}-$(printf "%04x" ${I2C_ADDR_W83795})" + if ! [ -L ${dev_path} ]; then + echo "w83795adg ${I2C_ADDR_W83795}" > ${PATH_MUX_9548_1_CH7}/new_device #hwmon1 + sleep 0.1 + else + echo "${dev_path} already exist" + fi + # add lm75/lm86 to sysfs + ####Main board thermal + ####lm75_1 + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_0_CH5}-$(printf "%04x" ${I2C_ADDR_LM75_1})" + if ! [ -L ${dev_path} ]; then + echo "lm75 ${I2C_ADDR_LM75_1}" > ${PATH_MUX_9548_0_CH5}/new_device # hwmon2 + sleep 0.1 + else + echo "${dev_path} already exist" + fi + ####lm75_2 + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_0_CH5}-$(printf "%04x" ${I2C_ADDR_LM75_2})" + if ! [ -L ${dev_path} ]; then + echo "lm75 ${I2C_ADDR_LM75_2}" > ${PATH_MUX_9548_0_CH5}/new_device #hwmon3 + sleep 0.1 + else + echo "${dev_path} already exist" + fi + ####lm86 + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_0_CH5}-$(printf "%04x" ${I2C_ADDR_LM86})" + if ! [ -L ${dev_path} ]; then + echo "lm86 ${I2C_ADDR_LM86}" > ${PATH_MUX_9548_0_CH5}/new_device #hwmon4 + sleep 0.1 + else + echo "${dev_path} already exist" + fi + ####lm75_3 + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_0_CH6}-$(printf "%04x" ${I2C_ADDR_LM75_3})" + if ! [ -L ${dev_path} ]; then + echo "lm75 ${I2C_ADDR_LM75_3}" > ${PATH_MUX_9548_0_CH6}/new_device # hwmon5 + sleep 0.1 + else + echo "${dev_path} already exist" + fi + ####lm75_4 + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_0_CH6}-$(printf "%04x" ${I2C_ADDR_LM75_4})" + if ! [ -L ${dev_path} ]; then + echo "lm75 ${I2C_ADDR_LM75_4}" > ${PATH_MUX_9548_0_CH6}/new_device #hwmon6 + sleep 0.1 + else + echo "${dev_path} already exist" + fi + ####BMC board thermal + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_1_CH7}-$(printf "%04x" ${I2C_ADDR_TMP75_BB})" + if ! [ -L ${dev_path} ]; then + echo "tmp75 ${I2C_ADDR_TMP75_BB}" > ${PATH_MUX_9548_1_CH7}/new_device #hwmon7 + sleep 0.1 + else + echo "${dev_path} already exist" + fi + ####CPU board thermal + dev_path="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MAIN}-$(printf "%04x" ${I2C_ADDR_TMP75_CB})" + if ! [ -L ${dev_path} ]; then + echo "tmp75 ${I2C_ADDR_TMP75_CB}" > ${PATH_I801_DEVICE}/new_device #hwmon8 + sleep 0.1 + else + echo "${dev_path} already exist" + fi + + # probe jc42 kernel module + modprobe jc42 #hwmon9 + + echo "Done" +} + +#FAN Speed Init +function _i2c_fan_speed_init { + echo -n "FAN SPEED INIT..." + if [ -e "${PATH_HWMON_W83795_DEVICE}" ]; then + # init fan speed + echo 120 > ${PATH_HWMON_W83795_DEVICE}/device/pwm2 + echo "SUCCESS" + else + echo "FAIL" + fi +} + +# HWM init +function _i2c_hwm_init { + echo "HWM INIT..." + # select bank0 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x00 0x80 + # SW reset, Disable monitor + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x01 0x9C + # disable TR5/TR6 DTS + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x04 0x0 + # enable FANIN1~8 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x06 0xFF + # disable FANIN9~14 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x07 0x00 + # CLKIN clock frequency set as 48Mhz + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x01 0x1C + # select bank 2 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x00 0x82 + # set PWM mode in FOMC + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x0F 0x00 + # set 25KHz fan output frequency in F1OPFP&F2OPFP + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x18 0x84 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x19 0x84 +} + +#IO Expander Init +function _i2c_io_exp_init { + echo "=========================================================" + echo "# Description: I2C IO Expender Init" + echo "=========================================================" + + # need to init BMC io expander first due to some io expander are reset default + echo "Init BMC INT & HW ID IO Expander" + # all input + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_1} ${REG_PORT0_DIR} 0xFF + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_1} ${REG_PORT1_DIR} 0xFF + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_1} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_1} ${REG_PORT1_POL} 0x00 + + echo "Init BMC PSU status IO Expander" + # PWRON default 0 (ACTIVE_LOW) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_2} ${REG_PORT0_OUT} 0x00 + # default 0 (ACTIVE_LOW) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_2} ${REG_PORT1_OUT} 0x00 + # I/O 0.2 0.5 output(PWRON), rest input + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_2} ${REG_PORT0_DIR} 0xDB + # I/O 1.0~1.1 input, 1.2~1.4 output (1.5~1.7 not enable) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_2} ${REG_PORT1_DIR} 0xE3 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_2} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_2} ${REG_PORT1_POL} 0x00 + + echo "Init BMC RST and SEL IO Expander" + # RST default is 1 (ACTIVE_LOW) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_3} ${REG_PORT0_OUT} 0x3F + # SEL default is 0 (HOST), EN default is 1 (ACTIVE_HIGH) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_3} ${REG_PORT1_OUT} 0x1F + # I/O 0.0~0.5 output, 0.6~0.7 not use + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_3} ${REG_PORT0_DIR} 0xD0 + # all output + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_3} ${REG_PORT1_DIR} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_3} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_3} ${REG_PORT1_POL} 0x00 + + echo "Init System LED & HW ID IO Expander" + # I/O_0.x for System LED default 0, I/O_1.x for HW ID + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT0_OUT} 0x00 + # System LED => all output + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT0_DIR} 0x00 + # HW ID => all input + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT1_DIR} 0xFF + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT1_POL} 0x00 + + echo "Init FAN Board Status IO Expander" + # LED_G_H set to 1, LED_Y_G set to 0 (ACTIVE_HIGH) + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9555_0} ${REG_PORT0_OUT} 0x11 + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9555_0} ${REG_PORT1_OUT} 0x11 + # DIR/ABS is input, LED_Y/LED_G is output + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9555_0} ${REG_PORT0_DIR} 0xCC + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9555_0} ${REG_PORT1_DIR} 0xCC + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9555_0} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9555_0} ${REG_PORT1_POL} 0x00 + + echo "Init System SEL and RST IO Expander" + # default 0 (ACTIVE high) + # 0.4~0.5 SEL set to value 0 (host) + # 0.2 LED_CLR set to 0 will clear all switch LED bitmap, set to 1 here + _util_i2cset -y -r ${NUM_MUX_9546_1_CH3} ${I2C_ADDR_MUX_9539_2} ${REG_PORT0_OUT} 0x04 + # RST 1.6~1.7 default 1 (ACTIVE low), INT 1.0~1.4 default 1 (ACTIVE low) + _util_i2cset -y -r ${NUM_MUX_9546_1_CH3} ${I2C_ADDR_MUX_9539_2} ${REG_PORT1_OUT} 0xDF + # all output, but ISO_TF_CORE_RST_N 0.0 need to set as input to prevent reboot issue + _util_i2cset -y -r ${NUM_MUX_9546_1_CH3} ${I2C_ADDR_MUX_9539_2} ${REG_PORT0_DIR} 0x09 + # RST 1.6~1.7 output, rest are input + _util_i2cset -y -r ${NUM_MUX_9546_1_CH3} ${I2C_ADDR_MUX_9539_2} ${REG_PORT1_DIR} 0x3F + _util_i2cset -y -r ${NUM_MUX_9546_1_CH3} ${I2C_ADDR_MUX_9539_2} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${NUM_MUX_9546_1_CH3} ${I2C_ADDR_MUX_9539_2} ${REG_PORT1_POL} 0x00 + + echo "Init CPU CPLD IO Expander (FIXME)" + # all input + #echo "NUM_MUX_9546_1_CH3=${NUM_MUX_9546_1_CH3}, I2C_ADDR_MUX_9539_2=${I2C_ADDR_MUX_9539_2}" + #_util_i2cset -y -r ${NUM_MUX_9546_1_CH3} ${I2C_ADDR_MUX_9539_2} ${REG_PORT0_DIR} 0xFF + # all input + #_util_i2cset -y -r ${NUM_MUX_9546_1_CH3} ${I2C_ADDR_MUX_9539_2} ${REG_PORT1_DIR} 0xFF + #_util_i2cset -y -r ${NUM_MUX_9546_1_CH3} ${I2C_ADDR_MUX_9539_2} ${REG_PORT0_POL} 0x00 + #_util_i2cset -y -r ${NUM_MUX_9546_1_CH3} ${I2C_ADDR_MUX_9539_2} ${REG_PORT1_POL} 0x00 +} + +#Set FAN Tray LED +function _i2c_led_fan_tray_status_set { + echo "FAN Tray Status Setup" + #FAN Status get + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN2_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN4_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + + # check if io expander for fan tray exist + result=`i2cget -y ${I2C_BUS_FANTRAY_LED} ${I2C_ADDR_MUX_9555_0} ${REG_PORT0_IN} 2>/dev/null` + err_code=$? + if [ "$err_code" != "0" ]; then + echo "fan tray not exist!" + return + fi + + for FAN_TRAY in {1..4}; + do + FAN_ALARM="FAN${FAN_TRAY}_ALARM" + if [ "${!FAN_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + _i2c_fan_tray_led + + COLOR_LED="amber" + ONOFF_LED="off" + _i2c_fan_tray_led + + echo "set [FAN TRAY ${FAN_TRAY}] [Green]=on [Amber]=off" + else + COLOR_LED="green" + ONOFF_LED="off" + _i2c_fan_tray_led + + COLOR_LED="amber" + ONOFF_LED="on" + _i2c_fan_tray_led + + echo "set [FAN TRAY ${FAN_TRAY}] [Green]=off [Amber]=on" + fi + done +} + +#Set FAN LED +function _i2c_led_fan_status_set { + echo "FAN Status Setup" + #PSU Status set + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + + echo "led_fan setup..." + # all fan ok + if [ "${FAN1_ALARM}" == "0" ] \ + && [ "${FAN3_ALARM}" == "0" ] \ + && [ "${FAN5_ALARM}" == "0" ] \ + && [ "${FAN7_ALARM}" == "0" ]; then + COLOR_LED="green" + echo "${COLOR_LED}" + _i2c_fan_led + # all fan fail + elif [ "${FAN1_ALARM}" == "1" ] \ + && [ "${FAN3_ALARM}" == "1" ] \ + && [ "${FAN5_ALARM}" == "1" ] \ + && [ "${FAN7_ALARM}" == "1" ] ; then + COLOR_LED="amber" + echo "${COLOR_LED}" + _i2c_fan_led + # partial fan fail + else + COLOR_LED="amber" + echo "${COLOR_LED}" + _i2c_fan_led + fi + # if fan not present, no led need to be set +} + +#Set Power Supply LED +function _i2c_led_psu_status_set { + echo "PSU LED Status Setup" + + #PSU Status set + _i2c_psu_status + + #PSU1 Status + echo "led_psu1 setup..." + if [ "${psu1Exist}" == ${PSU_EXIST} ]; then + if [ "${psu1PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + echo "${COLOR_LED}" + _i2c_psu1_led + else + COLOR_LED="amber" + echo "${COLOR_LED}" + _i2c_psu1_led + fi + else + COLOR_LED="off" + echo "${COLOR_LED}" + _i2c_psu1_led + fi + + #PSU2 Status + echo "led_psu2 setup..." + if [ "${psu2Exist}" == ${PSU_EXIST} ]; then + if [ "${psu2PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + echo "${COLOR_LED}" + _i2c_psu2_led + else + COLOR_LED="amber" + echo "${COLOR_LED}" + _i2c_psu2_led + fi + else + COLOR_LED="off" + echo "${COLOR_LED}" + _i2c_psu2_led + fi +} + +#LED Test +function _i2c_led_test { + echo "=========================================================" + echo "# Description: I2C SYSTEM LED TEST..." + echo "=========================================================" + + #sys led (green) + COLOR_LED="green" + _i2c_sys_led + _pause 'Check SYS LED green light and Press [Enter] key to continue...' + #sys led (amber) + COLOR_LED="amber" + _i2c_sys_led + _pause 'Check SYS LED amber light and Press [Enter] key to continue...' + + #FAN led (green) + COLOR_LED="green" + _i2c_fan_led + _pause 'Check FAN LED green light and Press [Enter] key to continue...' + #FAN led (amber) + COLOR_LED="amber" + _i2c_fan_led + _pause 'Check FAN LED amber light and Press [Enter] key to continue...' + + #PSU1 led (green) + COLOR_LED="green" + _i2c_psu1_led + _pause 'Check PSU1 LED green light and Press [Enter] key to continue...' + #PSU1 led (amber) + COLOR_LED="amber" + _i2c_psu1_led + _pause 'Check PSU1 LED amber light and Press [Enter] key to continue...' + + #PSU2 led (green) + COLOR_LED="green" + _i2c_psu2_led + _pause 'Check PSU2 LED green light and Press [Enter] key to continue...' + #PSU2 led (amber) + COLOR_LED="amber" + _i2c_psu2_led + _pause 'Check PSU2 LED amber light and Press [Enter] key to continue...' + + #Turn OFF All LED (can't trun off system led) + COLOR_LED="off" + #_i2c_sys_led + _i2c_fan_led + _i2c_psu1_led + _i2c_psu2_led + _pause 'Check turn off all LEDs (exclude SYS LED) and Press [Enter] key to continue...' + + # restore sys led + COLOR_LED="green" + _i2c_sys_led +} + +#Set QSFP Port cpld variable +function _qsfp_cpld_var_set { + local port=$1 + local reg_port_base + local reg_port_shift + + if [[ $1 -le 12 && $1 -ge 1 ]]; then + cpld_index=1 + reg_port_base=0 + elif [[ $1 -le 25 && $1 -ge 13 ]]; then + cpld_index=2 + reg_port_base=12 + elif [[ $1 -le 38 && $1 -ge 26 ]]; then + cpld_index=3 + reg_port_base=25 + elif [[ $1 -le 51 && $1 -ge 39 ]]; then + cpld_index=4 + reg_port_base=38 + elif [[ $1 -le 64 && $1 -ge 52 ]]; then + cpld_index=5 + reg_port_base=51 + else + echo "invalid port number" + fi + + cpld_port_index=$(( $port - $reg_port_base )) +} + +#Set QSFP Port eeporm variable +function _qsfp_eeprom_var_set { + local port=$1 + local eeprombusbase + local eeprombusshift + # port 1 => zqsfp0 + # port 2 => zqsfp1 + # ... + local port_group=$(( ($port - 1) / 8 )) + + case ${port_group} in + 0) + eeprombusbase=${NUM_MUX_9548_3_CH0} + ;; + 1) + eeprombusbase=${NUM_MUX_9548_4_CH0} + ;; + 2) + eeprombusbase=${NUM_MUX_9548_5_CH0} + ;; + 3) + eeprombusbase=${NUM_MUX_9548_6_CH0} + ;; + 4) + eeprombusbase=${NUM_MUX_9548_7_CH0} + ;; + 5) + eeprombusbase=${NUM_MUX_9548_8_CH0} + ;; + 6) + eeprombusbase=${NUM_MUX_9548_9_CH0} + ;; + 7) + eeprombusbase=${NUM_MUX_9548_10_CH0} + ;; + *) + ;; + esac + + eeprombusshift=$(( (${port} - 1) % 8)) + eepromBus=$(( ${eeprombusbase} + ${eeprombusshift} )) + eepromAddr=${I2C_ADDR_QSFP_EEPROM} +} + + +#Set SFP Port cpld variable +function _sfp_cpld_var_set { + local port=$1 + case ${port} in + 1) + cpld_index=1 + ;; + 2) + cpld_index=1 + ;; + *) + ;; + esac +} + +#Set QSFP Port eeporm variable +function _sfp_eeprom_var_set { + local port=$1 + + case ${port} in + 1) + eepromBus=${NUM_MUX_9546_1_CH0} + ;; + 2) + eepromBus=${NUM_MUX_9546_1_CH1} + ;; + *) + ;; + esac + + eepromAddr=${I2C_ADDR_SFP_EEPROM} +} + +#Get QSFP EEPROM Information +function _i2c_qsfp_eeprom_get { + local phy_port=0 + + # input parameter validation + _util_input_check "${QSFP_PORT}" "${MIN_QSFP_PORT_NUM}" "${MAX_QSFP_PORT_NUM}" + + #get physical port + phy_port=$(_port_fp2phy $QSFP_PORT) + + _qsfp_eeprom_var_set ${phy_port} + + _util_get_qsfp_abs + + if [ $status = 0 ]; then + exit + fi + + # debug + echo "${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf '%04x' $eepromAddr)/eeprom | hexdump -C" + cat ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr)/eeprom | hexdump -C +} + +#Init QSFP EEPROM +function _i2c_qsfp_eeprom_init { + echo "QSFP EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init 1-64 ports EEPROM + local i + for i in {1..64}; + do + + #get physical port + phy_port=$(_port_fp2phy $i) + + _qsfp_eeprom_var_set ${phy_port} + + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr) ]; then + #echo "sff8436 $eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eepromBus/new_device + echo "optoe1 $eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eepromBus/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr) ]; then + echo "$eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eepromBus/delete_device + fi + done + echo "Done" +} + +#Get SFP EEPROM Information +function _i2c_sfp_eeprom_get { + + # input parameter validation + _util_input_check "${SFP_PORT}" "${MIN_SFP_PORT_NUM}" "${MAX_SFP_PORT_NUM}" + _util_get_sfp_pres + + if [ $status = 0 ]; then + exit + fi + + _sfp_eeprom_var_set ${SFP_PORT} + + cat ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr)/eeprom | hexdump -C +} + +#Init SFP EEPROM +function _i2c_sfp_eeprom_init { + echo "SFP EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init 1-2 sfp+ EEPROM + local i + for i in {1..2}; + do + _sfp_eeprom_var_set ${i} + + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr) ]; then + #echo "sff8436 $eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eepromBus/new_device + echo "optoe1 $eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eepromBus/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr) ]; then + echo "$eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eepromBus/delete_device + fi + done + echo "Done" +} + +#Init Main Board EEPROM +function _i2c_mb_eeprom_init { + echo -n "Main Board EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init mb EEPROM + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM) ]; then + echo "mb_eeprom ${I2C_ADDR_MB_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_MB_EEPROM}/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM) ]; then + echo "$I2C_ADDR_MB_EEPROM" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_MB_EEPROM}/delete_device + fi + echo "Done" +} + +#Init CPU Board EEPROM +function _i2c_cb_eeprom_init { + echo -n "CPU Board EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init cpu EEPROM + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_CB_EEPROM}-$(printf "%04x" $I2C_ADDR_CB_EEPROM) ]; then + echo "mb_eeprom ${I2C_ADDR_CB_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CB_EEPROM}/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_CB_EEPROM}-$(printf "%04x" $I2C_ADDR_CB_EEPROM) ]; then + echo "$I2C_ADDR_CB_EEPROM" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CB_EEPROM}/delete_device + fi + echo "Done" +} + +#Init PSU Kernel Module +function _i2c_psu_init { + echo "=========================================================" + echo "# Description: I2C PSU Init" + echo "=========================================================" + modprobe ingrasys_s9280_64x_psu + + echo "psu1 ${I2C_ADDR_PSU1_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU1_EEPROM}/new_device + echo "psu2 ${I2C_ADDR_PSU2_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU2_EEPROM}/new_device +} + +#Deinit PSU Kernel Module +function _i2c_psu_deinit { + echo "${I2C_ADDR_PSU1_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU1_EEPROM}/delete_device + echo "${I2C_ADDR_PSU2_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU2_EEPROM}/delete_device + _util_rmmod ingrasys_s9280_64x_psu +} + +#get QSFP Status +function _i2c_qsfp_status_get { + + # input parameter validation + _util_input_check "${QSFP_PORT}" "${MIN_QSFP_PORT_NUM}" "${MAX_QSFP_PORT_NUM}" + + local stat + _util_get_qsfp_abs + echo "status=$status" +} + +#get QSFP Type +function _i2c_qsfp_type_get { + local phy_port=0 + + phy_port=$(_port_fp2phy ${QSFP_PORT}) + + # input parameter validation + _util_input_check "${QSFP_PORT}" "${MIN_QSFP_PORT_NUM}" "${MAX_QSFP_PORT_NUM}" + + _qsfp_eeprom_var_set ${phy_port} + + #Get QSFP EEPROM info + local size=255 + eeprom_path="${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr)/eeprom" + #echo "get ${eeprom_path}" + qsfp_info=$(dd if=${eeprom_path} bs=${size} count=1 2>/dev/null | base64) + + identifier=$(echo $qsfp_info | base64 -d -i | hexdump -s 128 -n 1 -e '"%x"') + connector=$(echo $qsfp_info | base64 -d -i | hexdump -s 130 -n 1 -e '"%x"') + transceiver=$(echo $qsfp_info | base64 -d -i | hexdump -s 131 -n 1 -e '"%x"') + + echo "identifier=$identifier" + echo "connector=$connector" + echo "transceiver=$transceiver" +} + +function _i2c_sfp_status_get { + + # input parameter validation + _util_input_check "${SFP_PORT}" "${MIN_SFP_PORT_NUM}" "${MAX_SFP_PORT_NUM}" + + local stat + _util_get_sfp_pres + #status: 0 -> Down, 1 -> Up + if [ $status = 0 ]; then + stat="down" + else + stat="up" + fi + echo "status is $stat" +} + +#get SFP Type +function _i2c_sfp_type_get { + + # input parameter validation + _util_input_check "${SFP_PORT}" "${MIN_SFP_PORT_NUM}" "${MAX_SFP_PORT_NUM}" + + _sfp_eeprom_var_set ${SFP_PORT} + + #Get QSFP EEPROM info + sfp_info=$(base64 ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr)/eeprom) + + identifier=$(echo $sfp_info | base64 -d -i | hexdump -s 128 -n 1 -e '"%x"') + connector=$(echo $sfp_info | base64 -d -i | hexdump -s 130 -n 1 -e '"%x"') + transceiver=$(echo $sfp_info | base64 -d -i | hexdump -s 131 -n 1 -e '"%x"') + + echo "identifier=$identifier" + echo "connector=$connector" + echo "transceiver=$transceiver" +} + +#Get PSU EEPROM Information +function _i2c_psu_eeprom_get { + local eeprom_psu1="" + local eeprom_psu2="" + + echo "=========================================================" + echo "# Description: I2C PSU EEPROM Get..." + echo "=========================================================" + + eeprom_psu1="${PATH_SYSFS_PSU1}/psu_eeprom" + cat ${eeprom_psu1} | hexdump -C + + eeprom_psu2="${PATH_SYSFS_PSU2}/psu_eeprom" + cat ${eeprom_psu2} | hexdump -C +} + +#Get Main Board EEPROM Information +function _i2c_mb_eeprom_get { + echo "=========================================================" + echo "# Description: I2C MB EEPROM Get..." + echo "=========================================================" + _i2c_sys_eeprom_get mb +} + +#Get CPU Board EEPROM Information +function _i2c_cb_eeprom_get { + echo "=========================================================" + echo "# Description: I2C CB EEPROM Get..." + echo "=========================================================" + _i2c_sys_eeprom_get cb +} + +#Get system EEPROM Information +##input: "cb" for cpu board, "mb" for main board +function _i2c_sys_eeprom_get { + local eeprom_dev + + if [ "$1" == "cb" ]; then + eeprom_dev="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_CB_EEPROM}-$(printf "%04x" $I2C_ADDR_CB_EEPROM)/eeprom" + elif [ "$1" == "mb" ]; then + eeprom_dev="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM)/eeprom" + else + echo "wrong eeprom type" + return + fi + + # check if eeprom device exist in sysfs + if [ ! -f ${eeprom_dev} ]; then + echo "eeprom device not init" + return + fi + + cat ${eeprom_dev} | hexdump -C + echo "Done" +} + +#sync eeprom content between mb and cb eeprom +function _i2c_eeprom_sync { + echo "=========================================================" + echo "# Description: EEPROM sync..." + echo "=========================================================" + + local mb_eeprom_dev="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM)/eeprom" + local cb_eeprom_dev="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_CB_EEPROM}-$(printf "%04x" $I2C_ADDR_CB_EEPROM)/eeprom" + + # check if eeprom device exist in sysfs + if [[ ! -f ${mb_eeprom_dev} || ! -f ${cb_eeprom_dev} ]]; then + echo "eeprom device not init" + return + fi + + ## check if MB eeprom is empty + if [ ! -z "$(cat ${mb_eeprom_dev} | hexdump -n2 | grep ffff)" ]; then + echo "copy cb eeprom to mb eeprom..." + cat ${cb_eeprom_dev} > ${mb_eeprom_dev} + else + echo "no need to sync" + fi + + echo "Done" +} + +#Set System Status LED +function _i2c_sys_led { + # only green/amber, on/off can't control + if [ "${COLOR_LED}" == "green" ]; then + # set sys_led_g (0.7) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x80 + value=0x80 + elif [ "${COLOR_LED}" == "amber" ]; then + # set sys_led_g (0.7) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x80 + value=0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + #apply to io expander + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + echo "Done" +} + +#Set FAN LED +function _i2c_fan_led { + if [ "${COLOR_LED}" == "green" ]; then + # set fan_led_en (0.6) = 1 & fan_led_y (0.5) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x60 + value=0x40 + elif [ "${COLOR_LED}" == "amber" ]; then + # set fan_led_en (0.6) = 1 & fan_led_y (0.5) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x60 + value=0x60 + elif [ "${COLOR_LED}" == "off" ]; then + # set fan_led_en (0.6) = 0 & fan_led_y (0.5) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x60 + value=0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + #apply to io expander + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + echo "Done" +} + +#Set PSU1 LED +function _i2c_psu1_led { + if [ "${COLOR_LED}" == "green" ]; then + # set psu1_pwr_ok_oe (0.4) = 1 & psu1_led_y (0.3) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x18 + value=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + # set psu1_pwr_ok_oe (0.4) = 1 & psu1_led_y (0.3) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x18 + value=0x18 + elif [ "${COLOR_LED}" == "off" ]; then + # set psu1_pwr_ok_oe (0.4) = 0 & psu1_led_y (0.3) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x18 + value=0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + #apply to io expander + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + echo "Done" +} + +#Set PSU2 LED +function _i2c_psu2_led { + if [ "${COLOR_LED}" == "green" ]; then + # set psu0_pwr_ok_oe (0.2) = 1 & psu0_led_y (0.1) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x06 + value=0x04 + elif [ "${COLOR_LED}" == "amber" ]; then + # set psu0_pwr_ok_oe (0.2) = 1 & psu0_led_y (0.1) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x06 + value=0x06 + elif [ "${COLOR_LED}" == "off" ]; then + # set psu0_pwr_ok_oe (0.2) = 0 & psu0_led_y (0.1) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x06 + value=0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + #apply to io expander + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + echo "Done" +} + +#Set FAN Tray LED +function _i2c_fan_tray_led { + + i2cAddr=${I2C_ADDR_MUX_9555_0} + output_reg=${REG_PORT0_OUT} + + case ${FAN_TRAY} in + 1) + output_reg=${REG_PORT0_OUT} + if [ "${COLOR_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 2) + output_reg=${REG_PORT0_OUT} + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + 3) + output_reg=${REG_PORT1_OUT} + if [ "${COLOR_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 4) + output_reg=${REG_PORT1_OUT} + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + *) + echo "Please input 1~4" + exit + ;; + esac + + # LED PIN value is ACTIVE HIGH + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + _util_i2cset -m $mask -y -r ${I2C_BUS_FANTRAY_LED} $i2cAddr ${output_reg} 0xff + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + _util_i2cset -m $mask -y -r ${I2C_BUS_FANTRAY_LED} $i2cAddr ${output_reg} 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + _util_i2cset -m $mask -y -r ${I2C_BUS_FANTRAY_LED} $i2cAddr ${output_reg} 0xff + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + _util_i2cset -m $mask -y -r ${I2C_BUS_FANTRAY_LED} $i2cAddr ${output_reg} 0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "Done" +} + +#Get Board Version and Type +function _i2c_board_type_get { + # read input port 1 value from io expander + input_reg=${REG_PORT1_IN} + boardType=`i2cget -y ${I2C_BUS_HW_ID} ${I2C_ADDR_MUX_9539_0} ${input_reg}` + boardBuildRev=$((($boardType) & 0x03)) + boardHwRev=$((($boardType) >> 2 & 0x03)) + boardId=$((($boardType) >> 4)) + printf "MAIN_BOARD BOARD_ID is 0x%02x, HW Rev 0x%02x, Build Rev 0x%02x\n" $boardId $boardHwRev $boardBuildRev +} + +#Get BMC Board Version and Type +function _i2c_bmc_board_type_get { + # read input port 1 value from io expander + input_reg=${REG_PORT1_IN} + boardType=`i2cget -y ${I2C_BUS_BMC_HW_ID} ${I2C_ADDR_MUX_9555_1} ${input_reg}` + boardBuildRev=$((($boardType) & 0x03)) + boardHwRev=$((($boardType) >> 2 & 0x03)) + boardId=$((($boardType) >> 4)) + printf "BMC_BOARD BOARD_ID is 0x%02x, HW Rev 0x%02x, Build Rev 0x%02x\n" $boardId $boardHwRev $boardBuildRev +} + +#Get CPLD Version +function _i2c_cpld_version { + echo "=========================================================" + echo "# Description: CPLD Version" + echo "=========================================================" + + for i in {1..5}; + do + local cpld_bus="I2C_BUS_CPLD${i}" + local cpld_path="PATH_CPLD${i}_DEVICE" + local file_path="${PATH_SYS_I2C_DEVICES}/${!cpld_bus}-$(printf "%04x" ${I2C_ADDR_CPLD})/cpld_version" + printf "[CPLD %d] %s\n" ${i} $(cat ${file_path}) + done +} + +#Get PSU Status +function _i2c_psu_status { + local psu_abs="" + + psu1PwGood=`cat ${PATH_SYSFS_PSU1}/psu_pg` + psu_abs=`cat ${PATH_SYSFS_PSU1}/psu_abs` + if [ "$psu_abs" == "0" ]; then + psu1Exist=1 + else + psu1Exist=0 + fi + + psu2PwGood=`cat ${PATH_SYSFS_PSU2}/psu_pg` + psu_abs=`cat ${PATH_SYSFS_PSU2}/psu_abs` + if [ "$psu_abs" == "0" ]; then + psu2Exist=1 + else + psu2Exist=0 + fi + + printf "PSU1 Exist:%x PSU1 PW Good:%d\n" $psu1Exist $psu1PwGood + printf "PSU2 Exist:%d PSU2 PW Good:%d\n" $psu2Exist $psu2PwGood +} + +#Get register value from CPLD +function _i2c_cpld_reg_read { + local idx=$1 + local file_name=$2 + local cpld_i2c_addr=${I2C_ADDR_CPLD} + local reg_file_path + + case ${idx} in + 1) + cpld_i2c_bus=${I2C_BUS_CPLD1} + ;; + 2) + cpld_i2c_bus=${I2C_BUS_CPLD2} + ;; + 3) + cpld_i2c_bus=${I2C_BUS_CPLD3} + ;; + 4) + cpld_i2c_bus=${I2C_BUS_CPLD4} + ;; + 5) + cpld_i2c_bus=${I2C_BUS_CPLD5} + ;; + *) + echo "invalid cpld index" + exit + ;; + esac + + reg_file_path="${PATH_SYS_I2C_DEVICES}/${cpld_i2c_bus}-$(printf "%04x" ${cpld_i2c_addr})/${file_name}" + cpld_reg_val=`cat ${reg_file_path}` +} + +#util functions +function _util_i2cset { + if [ "$DEBUG" == "on" ]; then + i2cset $@ + else + i2cset $@ 1>/dev/null + fi +} + +function _i2c_set { + local i2c_bus=$1 + local i2c_addr=$2 + local reg=$3 + local mask=$4 + local value=$5 + + echo `i2cset -m $mask -y -r ${i2c_bus} ${i2c_addr} ${reg} ${value}` +} + +function _util_rmmod { + local mod=$1 + [ "$(lsmod | grep "^$mod ")" != "" ] && rmmod $mod +} + +# get qsfp presence +function _util_get_qsfp_abs { + local phy_port=0 + + #get physical port + phy_port=$(_port_fp2phy $QSFP_PORT) + + # read status from cpld + _qsfp_cpld_var_set ${phy_port} + cpld_reg_file_name="${CPLD_QSFP_STATUS_KEY}_${cpld_port_index}" + _i2c_cpld_reg_read ${cpld_index} ${cpld_reg_file_name} + #status: 0 -> Down, 1 -> Up (ACTIVE_LOW in ABS_BIT) + status=$(( $(( $((${cpld_reg_val})) & (1 << ($CPLD_QSFP_STATUS_ABS_BIT)) ))?0:1 )) +} + +# get sfp presence +function _util_get_sfp_pres { + local pres_bit + # read status from cpld + _sfp_cpld_var_set ${SFP_PORT} + cpld_reg_file_name="${CPLD_SFP_STATUS_KEY}" + _i2c_cpld_reg_read ${cpld_index} ${cpld_reg_file_name} + if [ "${SFP_PORT}" == "1" ]; then + pres_bit=${CPLD_SFP0_STATUS_PRES_BIT} + else + pres_bit=${CPLD_SFP1_STATUS_PRES_BIT} + fi + #status: 0 -> Down, 1 -> Up (ACTIVE_LOW in PRES_BIT) + status=$(( $(( $((${cpld_reg_val})) & (1 << ($pres_bit)) ))?0:1 )) +} + +# valid input number +function _util_input_check { + # input parameter validation + if [[ $1 -lt $2 || $1 -gt $3 ]]; then + echo "Please input number $2~$3" + exit + fi +} + +# clear all switch port led bitmap +function _util_port_led_clear { + echo "port led clear..." + # gpio pin on GPIO MUX PCA9539#1 I/O 0.2 + # pull low to reset bitamp + output_reg=${REG_PORT0_OUT} + mask=0x04 + value=0x00 + _util_i2cset -m ${mask} -y ${NUM_MUX_9546_1_CH3} ${I2C_ADDR_MUX_9539_1} ${output_reg} ${value} + sleep 1 + # pull high to out of reset + value=0xFF + _util_i2cset -m ${mask} -y ${NUM_MUX_9546_1_CH3} ${I2C_ADDR_MUX_9539_1} ${output_reg} ${value} + echo "Done" +} + +#Increase read socket buffer for CoPP Test +function _config_rmem { + echo "109430400" > /proc/sys/net/core/rmem_max +} + +# util function to get logx value +function logx { + v=$1 + n=$2 + logx_res=$(echo "${v} ${n}" | awk '{printf "%f\n",log($1)/log($2)}') +} + +# get qsfp ddm data +function _i2c_qsfp_ddm_get { + local phy_port=0 + + phy_port=$(_port_fp2phy ${QSFP_PORT}) + + # input parameter validation + _util_input_check "${QSFP_PORT}" "${MIN_QSFP_PORT_NUM}" "${MAX_QSFP_PORT_NUM}" + + # check if port presence + #status: 0 -> Down, 1 -> Up + _util_get_qsfp_abs + if [ "${status}" == "0" ]; then + echo "port ${QSFP_PORT} not presence" + return + fi + + _qsfp_eeprom_var_set ${phy_port} + + # Get QSFP EEPROM info + # only need first 128 bytes (page0) for ddm parsing + local size=128 + eeprom_path="${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr)/eeprom" + #echo "get ${eeprom_path}" + qsfp_info=$(dd if=${eeprom_path} bs=${size} count=1 2>/dev/null | base64) + + # temperature + temp_val1=$(echo $qsfp_info | base64 -d -i | hexdump -s 22 -n 1 -e '"%d"') + temp_val2=$(echo $qsfp_info | base64 -d -i | hexdump -s 23 -n 1 -e '"%d"') + temp=$(echo "$temp_val1 $temp_val2" | awk '{printf "%f\n", $1 + $2/256.0}') + #temp=$(( ${temp_val1} + ${temp_val2}/256.0 )) + echo "temp=$temp" + # voltage + volt_val1=$(echo $qsfp_info | base64 -d -i | hexdump -s 26 -n 1 -e '"%d"') + volt_val2=$(echo $qsfp_info | base64 -d -i | hexdump -s 27 -n 1 -e '"%d"') + #volt=$(((($volt_val1 << 8) | volt_val2) / 10000)) + volt_val3=$(( ($volt_val1 << 8) | $volt_val2 )) + volt=$(echo "$volt_val3" | awk '{printf "%f\n", $1/10000.0}') + echo "volt=$volt" + + # 4 channels + for i in {0..3}; + do + echo "channel $i:" + # txBias + offset=$(( 42 + $i*2 )) + txBias_val1=$(echo $qsfp_info | base64 -d -i | hexdump -s $offset -n 1 -e '"%d"') + offset=$(( 43 + $i*2 )) + txBias_val2=$(echo $qsfp_info | base64 -d -i | hexdump -s $offset -n 1 -e '"%d"') + txBias_val3=$(( ($txBias_val1 << 8) | $txBias_val2 )) + txBias=$(echo "$txBias_val3" | awk '{printf "%f\n", (131.0*$1)/65535}') + echo " txBias=$txBias" + # txPower + offset=$(( 50 + $i*2 )) + txPower_val1=$(echo $qsfp_info | base64 -d -i | hexdump -s $offset -n 1 -e '"%d"') + offset=$(( 51 + $i*2 )) + txPower_val2=$(echo $qsfp_info | base64 -d -i | hexdump -s $offset -n 1 -e '"%d"') + txPower_val3=$(( ($txPower_val1 << 8) | $txPower_val2 )) + txPower_val4=$(echo "$txPower_val3" | awk '{printf "%f\n", $1*0.0001}') + logx $txPower_val4 10 + txPower=$(echo "$logx_res" | awk '{printf "%f\n", $1*10}') + echo " txPower=$txPower" + # rxPower + offset=$(( 34 + $i*2 )) + rxPower_val1=$(echo $qsfp_info | base64 -d -i | hexdump -s $offset -n 1 -e '"%d"') + offset=$(( 35 + $i*2 )) + rxPower_val2=$(echo $qsfp_info | base64 -d -i | hexdump -s $offset -n 1 -e '"%d"') + rxPower_val3=$(( ($rxPower_val1 << 8) | $rxPower_val2 )) + rxPower_val4=$(echo "$rxPower_val3" | awk '{printf "%f\n", $1*0.0001}') + logx $rxPower_val4 10 + rxPower=$(echo "$logx_res" | awk '{printf "%f\n", $1*10}') + echo " rxPower=$rxPower" + done +} + +#Main Function +function _main { + tart_time_str=`date` + start_time_sec=$(date +%s) + + if [ "${EXEC_FUNC}" == "help" ]; then + _help + elif [ "${EXEC_FUNC}" == "i2c_init" ]; then + _i2c_init + elif [ "${EXEC_FUNC}" == "i2c_deinit" ]; then + _i2c_deinit + elif [ "${EXEC_FUNC}" == "i2c_fan_speed_init" ]; then + _i2c_fan_speed_init + elif [ "${EXEC_FUNC}" == "i2c_io_exp_init" ]; then + _i2c_io_exp_init + elif [ "${EXEC_FUNC}" == "i2c_led_test" ]; then + _i2c_led_test + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_get" ]; then + _i2c_mb_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_cb_eeprom_get" ]; then + _i2c_cb_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_eeprom_sync" ]; then + _i2c_eeprom_sync + elif [ "${EXEC_FUNC}" == "i2c_psu_eeprom_get" ]; then + _i2c_psu_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_get" ]; then + _i2c_qsfp_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_sfp_eeprom_get" ]; then + _i2c_sfp_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_init" ]; then + _i2c_qsfp_eeprom_init ${QSFP_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_sfp_eeprom_init" ]; then + _i2c_sfp_eeprom_init ${SFP_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_init" ]; then + _i2c_mb_eeprom_init ${MB_EEPROM_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_cb_eeprom_init" ]; then + _i2c_cb_eeprom_init ${MB_EEPROM_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_qsfp_status_get" ]; then + _i2c_qsfp_status_get + elif [ "${EXEC_FUNC}" == "i2c_sfp_status_get" ]; then + _i2c_sfp_status_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_type_get" ]; then + _i2c_qsfp_type_get + elif [ "${EXEC_FUNC}" == "i2c_sfp_type_get" ]; then + _i2c_sfp_type_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_ddm_get" ]; then + _i2c_qsfp_ddm_get + elif [ "${EXEC_FUNC}" == "i2c_led_psu_status_set" ]; then + _i2c_led_psu_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_status_set" ]; then + _i2c_led_fan_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_tray_status_set" ]; then + _i2c_led_fan_tray_status_set + elif [ "${EXEC_FUNC}" == "i2c_sys_led" ]; then + _i2c_sys_led + elif [ "${EXEC_FUNC}" == "i2c_fan_led" ]; then + _i2c_fan_led + elif [ "${EXEC_FUNC}" == "i2c_fan_tray_led" ]; then + _i2c_fan_tray_led + elif [ "${EXEC_FUNC}" == "i2c_psu1_led" ]; then + _i2c_psu1_led + elif [ "${EXEC_FUNC}" == "i2c_psu2_led" ]; then + _i2c_psu2_led + elif [ "${EXEC_FUNC}" == "i2c_board_type_get" ]; then + _i2c_board_type_get + elif [ "${EXEC_FUNC}" == "i2c_bmc_board_type_get" ]; then + _i2c_bmc_board_type_get + elif [ "${EXEC_FUNC}" == "i2c_cpld_version" ]; then + _i2c_cpld_version + elif [ "${EXEC_FUNC}" == "i2c_psu_status" ]; then + _i2c_psu_status + elif [ "${EXEC_FUNC}" == "i2c_test_all" ]; then + _i2c_init + _i2c_led_test + _i2c_psu_eeprom_get + _i2c_mb_eeprom_get + _i2c_cb_eeprom_get + _i2c_board_type_get + _i2c_bmc_board_type_get + _i2c_cpld_version + _i2c_psu_status + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + if [ "$DEBUG" == "on" ]; then + echo "-----------------------------------------------------" + end_time_str=`date` + end_time_sec=$(date +%s) + diff_time=$[ ${end_time_sec} - ${start_time_sec} ] + echo "Start Time: ${start_time_str} (${start_time_sec})" + echo "End Time : ${end_time_str} (${end_time_sec})" + echo "Total Execution Time: ${diff_time} sec" + + echo "done!!!" + fi +} + +_main diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/utils/qsfp_monitor.sh b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/utils/qsfp_monitor.sh new file mode 100755 index 00000000000..23a3fd066be --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/utils/qsfp_monitor.sh @@ -0,0 +1,105 @@ +#!/bin/bash +# Copyright (C) 2017 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=3 +I2C_UTILS="/usr/sbin/i2c_utils.sh" +QSFP_SI_SCRIPT="/usr/sbin/qsfp_si_cfg.sh" +QSFP_ARRAY=(0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 \ + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + +#QSFP SI monitor +function _qsfp_si_monitor { + local i + local status + for i in {0..63}; + do + status=`${I2C_UTILS} i2c_qsfp_status_get $(expr $i + 1) | egrep '^status=.*$' | sed -e 's/status=//g'` + if [ "${status}" == "1" ]; then + _qsfp_type_check $i + fi + done +} + +#QSFP type +function _qsfp_type_check { + local port=$1 + local qsfp_type=`${I2C_UTILS} i2c_qsfp_type_get $(expr $port + 1)` + local identifier=`echo "$qsfp_type" | grep '^identifier=.*$' | sed -e 's/identifier=//g'` + if [ "${identifier}" == "11" ]; then + connector=`echo "$qsfp_type" | grep '^connector=.*$' | sed -e 's/connector=//g'` + case ${connector} in + 21|23) + #DAC + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to DAC" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} dac $port >/dev/null + fi + ;; + *) + #Optical + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to Optical" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} optical $port >/dev/null + fi + ;; + esac + fi +} + +#Docker exist check +function _docker_swss_check { + while true + do + # Check if syncd starts + result=`docker exec -i swss bash -c "echo -en \"SELECT 1\\nHLEN HIDDEN\" | redis-cli | sed -n 2p"` #TBD FIX ME + if [ "$result" == "3" ]; then + return + fi + sleep $INTERVAL + done +} + +#Docker exist check +function _qsfp_si_cfg_script_check { + + if [ -f ${QSFP_SI_SCRIPT} ] && [ -x ${QSFP_SI_SCRIPT} ]; then + echo "SI Script exists. Start monitor." + return + else + echo "SI Script not exist. Exit monitor." + exit + fi +} + +# main function +function _main { + #Check SI Script + _qsfp_si_cfg_script_check + #Check docker swss is running + _docker_swss_check + while true + do + _qsfp_si_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main + diff --git a/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/utils/s9280_64x_monitor.sh b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/utils/s9280_64x_monitor.sh new file mode 100755 index 00000000000..eedf685b290 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ingrasys/s9280-64x/utils/s9280_64x_monitor.sh @@ -0,0 +1,42 @@ +#!/bin/bash +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=5 +I2C_UTILS="/usr/sbin/i2c_utils.sh" + + +# TBD: LED status monitor +function _led_monitor { + ${I2C_UTILS} i2c_led_fan_status_set >/dev/null + ${I2C_UTILS} i2c_led_psu_status_set >/dev/null + ${I2C_UTILS} i2c_led_fan_tray_status_set >/dev/null +} + +# main function +function _main { + while true + do + #PSU controlled by dummy board, + #but fan LED and fan tray LED must controlled by this service + _led_monitor + + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/LICENSE b/platform/barefoot/sonic-platform-modules-wnc-osw1800/LICENSE new file mode 100644 index 00000000000..676cdeec726 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/LICENSE @@ -0,0 +1,15 @@ +Copyright (C) 2016 Microsoft, Inc + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/MAINTAINERS b/platform/barefoot/sonic-platform-modules-wnc-osw1800/MAINTAINERS new file mode 100644 index 00000000000..a578b60e24d --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/MAINTAINERS @@ -0,0 +1,7 @@ +# This file describes the maintainers for sonic-platform-modules-wnc-osw1800 +# See the SONiC project governance document for more information + +Name = "WNC" +Email = "wnc@wnc.com.tw" +Github = barefootnetworks +Mailinglist = wnc@wnc.com.tw diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/README.md b/platform/barefoot/sonic-platform-modules-wnc-osw1800/README.md new file mode 100644 index 00000000000..707c1068d6e --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/README.md @@ -0,0 +1,2 @@ +# sonic-platform-modules-wnc-osw1800 +Device drivers for support of BFN platform for the SONiC project diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/changelog b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/changelog new file mode 100644 index 00000000000..466378b892d --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/changelog @@ -0,0 +1,5 @@ +platform-modules-wnc-osw1800 (1.0) unstable; urgency=low + + * Initial release + + -- WNC Mon, 11 Nov 2015 11:11:11 -0800 diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/compat b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/compat new file mode 100644 index 00000000000..45a4fb75db8 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/compat @@ -0,0 +1 @@ +8 diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control new file mode 100644 index 00000000000..6070cf9ad1f --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control @@ -0,0 +1,12 @@ +Source: platform-modules-wnc-osw1800 +Section: main +Priority: extra +Maintainer: WNC +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: platform-modules-wnc-osw1800 +Architecture: amd64 +Depends: linux-image-3.16.0-5-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/copyright b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/copyright new file mode 100644 index 00000000000..ade42b7aa75 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/copyright @@ -0,0 +1,15 @@ +Provides linux kernel driver for BF PCIe devices + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/rules b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/rules new file mode 100755 index 00000000000..644ab1ade43 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/rules @@ -0,0 +1,38 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +PACKAGE_NAME := platform-modules-wnc-osw1800 +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MODULE_SRC := $(shell pwd)/modules +SCRIPT_SRC := $(shell pwd)/scripts +SERVICE_SRC := $(shell pwd)/service + +%: + dh $@ + +override_dh_auto_build: + make -C $(KERNEL_SRC)/build M=$(MODULE_SRC) + +override_dh_auto_install: + dh_installdirs -p$(PACKAGE_NAME) $(KERNEL_SRC)/$(INSTALL_MOD_DIR) + cp $(MODULE_SRC)/*.ko debian/$(PACKAGE_NAME)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) + dh_installdirs -p$(PACKAGE_NAME) usr/local/bin + cp -r $(SCRIPT_SRC)/* debian/$(PACKAGE_NAME)/usr/local/bin + dh_installdirs -p$(PACKAGE_NAME) /etc/systemd/system + cp -r $(SERVICE_SRC)/* debian/$(PACKAGE_NAME)/etc/systemd/system + dh_installdirs -p$(PACKAGE_NAME) /etc/systemd/system/multi-user.target.wants + ln -s ../device_node.service debian/$(PACKAGE_NAME)/etc/systemd/system/multi-user.target.wants/device_node.service + ln -s ../driver_load.service debian/$(PACKAGE_NAME)/etc/systemd/system/multi-user.target.wants/driver_load.service + +override_dh_usrlocal: + +override_dh_pysupport: + +override_dh_clean: + dh_clean + rm -f $(MODULE_SRC)/*.o $(MODULE_SRC)/*.ko $(MODULE_SRC)/*.mod.c $(MODULE_SRC)/.*.cmd + rm -f $(MODULE_SRC)/Module.markers $(MODULE_SRC)/Module.symvers $(MODULE_SRC)/modules.order + rm -rf $(MODULE_SRC)/.tmp_versions + diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/Makefile b/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/Makefile new file mode 100644 index 00000000000..f01694d73ea --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/Makefile @@ -0,0 +1,4 @@ +obj-m += i2c-mcp2221.o +obj-m += wnc_cpld.o +obj-m += wnc_cpld3.o +obj-m += wnc_eeprom.o diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/i2c-mcp2221.c b/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/i2c-mcp2221.c new file mode 100644 index 00000000000..fcaa57fbafa --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/i2c-mcp2221.c @@ -0,0 +1,611 @@ +/* + * i2c bus driver for MCP2221 + * + * Derived from: + * i2c-tiny-usb.c + * i2c-diolan-u2c.c + * usb-serial.c + * onetouch.c + * usb-skeleton.c + * + * Copyright (C) 2014 Microchip Technology Inc. + * + * Author: Bogdan Bolocan http://www.microchip.com/support + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + * + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "i2c-mcp2221" + +#define USB_VENDOR_ID_MCP2221 0x04d8 +#define USB_DEVICE_ID_MCP2221 0x00dd + +#define MCP2221_OUTBUF_LEN 64 /* USB write packet length */ +#define MCP2221_INBUF_LEN 64 /* USB read packet length */ + +#define MCP2221_MAX_I2C_DATA_LEN 60 + +//#define MCP2221_FREQ_STD 100000 +#define MCP2221_FREQ_STD 400000 +//#define MCP2221_FREQ_STD 50000 +#define MCP2221_FREQ_MAX 500000 + +#define MCP2221_RETRY_MAX 50 +#define MCP2221_STD_DELAY_MS 1 +//#define MCP2221_STD_DELAY_MS 2 + +#define RESP_ERR_NOERR 0x00 +#define RESP_ADDR_NACK 0x25 +#define RESP_READ_ERR 0x7F +#define RESP_READ_COMPL 0x55 +#define RESP_I2C_IDLE 0x00 +#define RESP_I2C_START_TOUT 0x12 +#define RESP_I2C_RSTART_TOUT 0x17 +#define RESP_I2C_WRADDRL_TOUT 0x23 +#define RESP_I2C_WRADDRL_WSEND 0x21 +#define RESP_I2C_WRADDRL_NACK 0x25 +#define RESP_I2C_WRDATA_TOUT 0x44 +#define RESP_I2C_RDDATA_TOUT 0x52 +#define RESP_I2C_STOP_TOUT 0x62 + +#define CMD_MCP2221_STATUS 0x10 +#define SUBCMD_STATUS_CANCEL 0x10 +#define SUBCMD_STATUS_SPEED 0x20 +#define MASK_ADDR_NACK 0x40 + +#define CMD_MCP2221_RDDATA7 0x91 +#define CMD_MCP2221_GET_RDDATA 0x40 + +#define CMD_MCP2221_WRDATA7 0x90 + +/* Structure to hold all of our device specific stuff */ +struct i2c_mcp2221 { + u8 obuffer[MCP2221_OUTBUF_LEN]; /* USB write buffer */ + u8 ibuffer[MCP2221_INBUF_LEN]; /* USB read buffer */ + /* I2C/SMBus data buffer */ + u8 user_data_buffer[MCP2221_MAX_I2C_DATA_LEN]; + int ep_in, ep_out; /* Endpoints */ + struct usb_device *usb_dev; /* the usb device for this device */ + struct usb_interface *interface;/* the interface for this device */ + struct i2c_adapter adapter; /* i2c related things */ + uint frequency; /* I2C/SMBus communication frequency */ + /* Mutex for low-level USB transactions */ + struct mutex mcp2221_usb_op_lock; + /* wq to wait for an ongoing read/write */ + wait_queue_head_t usb_urb_completion_wait; + bool ongoing_usb_ll_op; /* a ll is in progress */ + + struct urb *interrupt_in_urb; + struct urb *interrupt_out_urb; +}; + +static uint frequency = MCP2221_FREQ_STD; /* I2C clock frequency in Hz */ + +module_param(frequency, uint, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(frequency, "I2C clock frequency in hertz"); + +/* usb layer */ + + +/* + * Return list of supported functionality. + */ +static u32 mcp2221_usb_func(struct i2c_adapter *a) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | + I2C_FUNC_SMBUS_READ_BLOCK_DATA | I2C_FUNC_SMBUS_BLOCK_PROC_CALL; +} + +static void mcp2221_usb_cmpl_cbk(struct urb *urb) +{ + struct i2c_mcp2221 *dev = urb->context; + int status = urb->status; + int retval; + + switch (status) { + case 0: /* success */ + break; + case -ECONNRESET: /* unlink */ + case -ENOENT: + case -ESHUTDOWN: + return; + /* -EPIPE: should clear the halt */ + default: /* error */ + goto resubmit; + } + + /* wake up the waitting function + modify the flag indicating the ll status */ + dev->ongoing_usb_ll_op = 0; + wake_up_interruptible(&dev->usb_urb_completion_wait); + return; + +resubmit: + retval = usb_submit_urb(urb, GFP_ATOMIC); + if (retval) { + dev_err(&dev->interface->dev, + "mcp2221(irq): can't resubmit intrerrupt urb, retval %d\n", + retval); + } +} + +static int mcp2221_ll_cmd(struct i2c_mcp2221 *dev) +{ + int rv; + + /* tell everybody to leave the URB alone */ + dev->ongoing_usb_ll_op = 1; + + /* submit the interrupt out ep packet */ + if (usb_submit_urb(dev->interrupt_out_urb, GFP_KERNEL)) { + dev_err(&dev->interface->dev, + "mcp2221(ll): usb_submit_urb intr out failed\n"); + dev->ongoing_usb_ll_op = 0; + return -EIO; + } + + /* wait for its completion */ + rv = wait_event_interruptible(dev->usb_urb_completion_wait, + (!dev->ongoing_usb_ll_op)); + if (rv < 0) { + dev_err(&dev->interface->dev, "mcp2221(ll): wait interrupted\n"); + goto ll_exit_clear_flag; + } + + /* tell everybody to leave the URB alone */ + dev->ongoing_usb_ll_op = 1; + + /* submit the interrupt in ep packet */ + if (usb_submit_urb(dev->interrupt_in_urb, GFP_KERNEL)) { + dev_err(&dev->interface->dev, "mcp2221(ll): usb_submit_urb intr in failed\n"); + dev->ongoing_usb_ll_op = 0; + return -EIO; + } + + /* wait for its completion */ + rv = wait_event_interruptible(dev->usb_urb_completion_wait, + (!dev->ongoing_usb_ll_op)); + if (rv < 0) { + dev_err(&dev->interface->dev, "mcp2221(ll): wait interrupted\n"); + goto ll_exit_clear_flag; + } + +ll_exit_clear_flag: + dev->ongoing_usb_ll_op = 0; + return rv; +} + +static int mcp2221_init(struct i2c_mcp2221 *dev) +{ + int ret; + + ret = 0; + if (frequency > MCP2221_FREQ_MAX) + frequency = MCP2221_FREQ_MAX; + + /* initialize the MCP2221 and bring it to "idle/ready" state */ + dev_info(&dev->interface->dev, + "MCP2221 at USB bus %03d address %03d Freq=%dKhz-- mcp2221_init()\n", + dev->usb_dev->bus->busnum, dev->usb_dev->devnum, frequency/1000); + + /* initialize unlocked mutex */ + mutex_init(&dev->mcp2221_usb_op_lock); + + dev->interrupt_out_urb = usb_alloc_urb(0, GFP_KERNEL); + if (!dev->interrupt_out_urb) + goto init_error; + + usb_fill_int_urb(dev->interrupt_out_urb, dev->usb_dev, + usb_sndintpipe(dev->usb_dev, + dev->ep_out), + (void *)&dev->obuffer, MCP2221_OUTBUF_LEN, + mcp2221_usb_cmpl_cbk, dev, + 1); + + dev->interrupt_in_urb = usb_alloc_urb(0, GFP_KERNEL); + if (!dev->interrupt_in_urb) + goto init_error; + + usb_fill_int_urb(dev->interrupt_in_urb, dev->usb_dev, + usb_rcvintpipe(dev->usb_dev, + dev->ep_in), + (void *)&dev->ibuffer, MCP2221_INBUF_LEN, + mcp2221_usb_cmpl_cbk, dev, + 1); + ret = 0; + goto init_no_error; + +init_error: + dev_err(&dev->interface->dev, "mcp2221_init: Error = %d\n", ret); + ret = -ENODEV; + +init_no_error: + dev_info(&dev->interface->dev, "mcp2221_init: Success\n"); + return ret; +} + +static int mcp2221_i2c_readwrite(struct i2c_mcp2221 *dev, + struct i2c_msg *pmsg) +{ + u8 ucI2cDiv, ucCancelXfer, ucXferLen; + int rv, retries; + unsigned int sleepCmd; + u8 *pSrc, *pDst, usbCmdStatus; + + retries = 0; + ucCancelXfer = 0; + /* clock divider for I2C operations */ + ucI2cDiv = (u8)((12000000/frequency) - 3); + + /* determine the best delay value here */ + /* (MCP2221_STD_DELAY_MS * MCP2221_FREQ_MAX)/frequency; */ + sleepCmd = MCP2221_STD_DELAY_MS; + + if (pmsg->len > MCP2221_MAX_I2C_DATA_LEN) + return -EINVAL; + +readwrite_reinit: + dev->obuffer[0] = CMD_MCP2221_STATUS; /* code for STATUS cmd */ + dev->obuffer[1] = 0x00; + dev->obuffer[2] = ucCancelXfer; /* cancel subcmd */ + dev->obuffer[3] = SUBCMD_STATUS_SPEED; /* set the xfer speed */ + dev->obuffer[4] = ucI2cDiv; + dev->obuffer[5] = 0x00; + dev->obuffer[6] = 0x00; + dev->obuffer[7] = 0x00; + + rv = mcp2221_ll_cmd(dev); + if (rv < 0) + return -EFAULT; + + if (dev->ibuffer[1] != RESP_ERR_NOERR) + return -EFAULT; + + if (dev->ibuffer[3] != SUBCMD_STATUS_SPEED) { + /* the speed could not be set - wait a while and retry */ + if (retries < MCP2221_RETRY_MAX) { + /* wait a while and retry the operation */ + retries++; + msleep(MCP2221_STD_DELAY_MS); + ucCancelXfer = SUBCMD_STATUS_CANCEL; + goto readwrite_reinit; + } else { + /* max number of retries was reached - return error */ + dev_err(&dev->interface->dev, + "mcp2221 CANCEL ERROR:retries = %d\n", retries); + return -EFAULT; + } + } + + if (pmsg->flags & I2C_M_RD) { + /* I2C read */ + ucXferLen = (u8)pmsg->len; + dev->obuffer[0] = CMD_MCP2221_RDDATA7; + dev->obuffer[1] = ucXferLen; /* LSB of the xfer length */ + dev->obuffer[2] = 0; /* no MSB for the xfer length */ + /* address in 8-bit format */ + dev->obuffer[3] = (u8)((pmsg->addr) << 1); + + rv = mcp2221_ll_cmd(dev); + if (rv < 0) + return -EFAULT; + + if (dev->ibuffer[1] != RESP_ERR_NOERR) + return -EFAULT; + + retries = 0; + dev->obuffer[0] = CMD_MCP2221_GET_RDDATA; + dev->obuffer[1] = 0x00; + dev->obuffer[2] = 0x00; + dev->obuffer[3] = 0x00; + + while (retries < MCP2221_RETRY_MAX) { + msleep(sleepCmd); + + rv = mcp2221_ll_cmd(dev); + if (rv < 0) + return -EFAULT; + + if (dev->ibuffer[1] != RESP_ERR_NOERR) + return -EFAULT; + + if (dev->ibuffer[2] == RESP_ADDR_NACK) + return -EFAULT; + + /* break the loop - cmd ended ok - used for bus scan */ + if ((dev->ibuffer[3] == 0x00) && + (dev->ibuffer[2] == 0x00)) + break; + + if (dev->ibuffer[3] == RESP_READ_ERR) { + retries++; + continue; + } + + if ((dev->ibuffer[2] == RESP_READ_COMPL) && + (dev->ibuffer[3] == ucXferLen)) { + /* we got the data - copy it */ + pSrc = (u8 *)&dev->ibuffer[4]; + pDst = (u8 *)&pmsg->buf[0]; + memcpy(pDst, pSrc, ucXferLen); + + if (pmsg->flags & I2C_M_RECV_LEN) + pmsg->len = ucXferLen; + + break; + } + + } + if (retries >= MCP2221_RETRY_MAX) + return -EFAULT; + } else { + /* I2C write */ + ucXferLen = (u8)pmsg->len; + dev->obuffer[0] = CMD_MCP2221_WRDATA7; + dev->obuffer[1] = ucXferLen; /* LSB of the xfer length */ + dev->obuffer[2] = 0; /* no MSB for the xfer length */ + /* address in 8-bit format */ + dev->obuffer[3] = (u8)((pmsg->addr) << 1); + /* copy the data we've read back */ + pSrc = (u8 *)&pmsg->buf[0]; + pDst = (u8 *)&dev->obuffer[4]; + memcpy(pDst, pSrc, ucXferLen); + + retries = 0; + + while (retries < MCP2221_RETRY_MAX) { + rv = mcp2221_ll_cmd(dev); + if (rv < 0) + return -EFAULT; + + if (dev->ibuffer[1] != RESP_ERR_NOERR) { + usbCmdStatus = dev->ibuffer[2]; + if (usbCmdStatus == RESP_I2C_START_TOUT) + return -EFAULT; + + if (usbCmdStatus == RESP_I2C_WRADDRL_TOUT) + return -EFAULT; + + if (usbCmdStatus == RESP_I2C_WRADDRL_NACK) + return -EFAULT; + + if (usbCmdStatus == RESP_I2C_WRDATA_TOUT) + return -EFAULT; + + if (usbCmdStatus == RESP_I2C_STOP_TOUT) + return -EFAULT; + + msleep(sleepCmd); + retries++; + continue; + } else { /* command completed successfully */ + break; + } + } + if (retries >= MCP2221_RETRY_MAX) + return -EFAULT; + + /* now, prepare for the STATUS stage */ + retries = 0; + dev->obuffer[0] = CMD_MCP2221_STATUS; /* code for STATUS cmd */ + dev->obuffer[1] = 0x00; + dev->obuffer[2] = 0x00; + dev->obuffer[3] = 0x00; + dev->obuffer[4] = 0x00; + dev->obuffer[5] = 0x00; + dev->obuffer[6] = 0x00; + dev->obuffer[7] = 0x00; + + while (retries < MCP2221_RETRY_MAX) { + rv = mcp2221_ll_cmd(dev); + if (rv < 0) + return -EFAULT; + + if (dev->ibuffer[1] != RESP_ERR_NOERR) + return -EFAULT; + + /* i2c slave address was nack-ed */ + if (dev->ibuffer[20] & MASK_ADDR_NACK) + return -EFAULT; + + usbCmdStatus = dev->ibuffer[8]; + if (usbCmdStatus == RESP_I2C_IDLE) + break; + + if (usbCmdStatus == RESP_I2C_START_TOUT) + return -EFAULT; + + if (usbCmdStatus == RESP_I2C_WRADDRL_TOUT) + return -EFAULT; + + if (usbCmdStatus == RESP_I2C_WRADDRL_WSEND) + return -EFAULT; + + if (usbCmdStatus == RESP_I2C_WRADDRL_NACK) + return -EFAULT; + + if (usbCmdStatus == RESP_I2C_WRDATA_TOUT) + return -EFAULT; + + if (usbCmdStatus == RESP_I2C_STOP_TOUT) + return -EFAULT; + + msleep(sleepCmd); + retries++; + } + if (retries >= MCP2221_RETRY_MAX) + return -EFAULT; + } + + return 0; +} + +/* device layer */ +static int mcp2221_usb_i2c_xfer(struct i2c_adapter *adap, + struct i2c_msg *msgs, int num) +{ + struct i2c_mcp2221 *dev = i2c_get_adapdata(adap); + struct i2c_msg *pmsg; + int ret, count; + + for (count = 0; count < num; count++) { + pmsg = &msgs[count]; + /* no concurrent users of the mcp2221 i2c xfer */ + ret = mutex_lock_interruptible(&dev->mcp2221_usb_op_lock); + if (ret < 0) + goto abort; + + ret = mcp2221_i2c_readwrite(dev, pmsg); + mutex_unlock(&dev->mcp2221_usb_op_lock); + if (ret < 0) + goto abort; + } + + /* if all the messages were transferred ok, return "num" */ + ret = num; + +abort: + return ret; +} + +static const struct i2c_algorithm mcp2221_usb_algorithm = { + .master_xfer = mcp2221_usb_i2c_xfer, + .functionality = mcp2221_usb_func, +}; + +static const struct usb_device_id mcp2221_table[] = { + { USB_DEVICE(USB_VENDOR_ID_MCP2221, USB_DEVICE_ID_MCP2221) }, + { } +}; + +MODULE_DEVICE_TABLE(usb, mcp2221_table); + +static void mcp2221_free(struct i2c_mcp2221 *dev) +{ + usb_put_dev(dev->usb_dev); + kfree(dev); +} + +static int mcp2221_probe(struct usb_interface *interface, + const struct usb_device_id *id) +{ + struct usb_host_interface *hostif = interface->cur_altsetting; + struct i2c_mcp2221 *dev; + int ret; + + if ((hostif->desc.bInterfaceNumber != 2) + || (hostif->desc.bInterfaceClass != 3)) { + pr_info("i2c-mcp2221(probe): Interface doesn't match the MCP2221 HID\n"); + return -ENODEV; + } + + /* allocate memory for our device state and initialize it */ + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (dev == NULL) { + pr_info("i2c-mcp2221(probe): no memory for device state\n"); + ret = -ENOMEM; + goto error; + } + + dev->ep_in = hostif->endpoint[0].desc.bEndpointAddress; + dev->ep_out = hostif->endpoint[1].desc.bEndpointAddress; + + dev->usb_dev = usb_get_dev(interface_to_usbdev(interface)); + dev->interface = interface; + + init_waitqueue_head(&dev->usb_urb_completion_wait); + + /* save our data pointer in this interface device */ + usb_set_intfdata(interface, dev); + + /* setup i2c adapter description */ + dev->adapter.owner = THIS_MODULE; + dev->adapter.class = I2C_CLASS_HWMON; + dev->adapter.algo = &mcp2221_usb_algorithm; + i2c_set_adapdata(&dev->adapter, dev); + + snprintf(dev->adapter.name, sizeof(dev->adapter.name), + DRIVER_NAME " at bus %03d device %03d", + dev->usb_dev->bus->busnum, dev->usb_dev->devnum); + + dev->adapter.dev.parent = &dev->interface->dev; + + /* initialize mcp2221 i2c interface */ + ret = mcp2221_init(dev); + if (ret < 0) { + dev_err(&interface->dev, "failed to initialize adapter\n"); + goto error_free; + } + + /* and finally attach to i2c layer */ + ret = i2c_add_adapter(&dev->adapter); + if (ret < 0) { + dev_err(&interface->dev, "failed to add I2C adapter\n"); + goto error_free; + } + + dev_info(&dev->interface->dev, + "mcp2221_probe() -> chip connected -> Success\n"); + return 0; + +error_free: + usb_set_intfdata(interface, NULL); + mcp2221_free(dev); +error: + return ret; +} + +static void mcp2221_disconnect(struct usb_interface *interface) +{ + struct i2c_mcp2221 *dev = usb_get_intfdata(interface); + + i2c_del_adapter(&dev->adapter); + + usb_kill_urb(dev->interrupt_in_urb); + usb_kill_urb(dev->interrupt_out_urb); + usb_free_urb(dev->interrupt_in_urb); + usb_free_urb(dev->interrupt_out_urb); + + usb_set_intfdata(interface, NULL); + mcp2221_free(dev); + + pr_info("i2c-mcp2221(disconnect) -> chip disconnected"); +} + +static struct usb_driver mcp2221_driver = { + .name = DRIVER_NAME, + .probe = mcp2221_probe, + .disconnect = mcp2221_disconnect, + .id_table = mcp2221_table, +}; + +module_usb_driver(mcp2221_driver); + +MODULE_AUTHOR("Bogdan Bolocan"); +MODULE_DESCRIPTION(DRIVER_NAME "I2C MCP2221"); +MODULE_LICENSE("GPL v2"); diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/wnc_cpld.c b/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/wnc_cpld.c new file mode 100644 index 00000000000..3a7d40ba917 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/wnc_cpld.c @@ -0,0 +1,198 @@ +/* + * wnc_cpld.c - A driver for control wnc_cpld base on lm75.c + * + * Copyright (c) 1998, 1999 Frodo Looijaard + * Copyright (c) 2017 WNC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Addresses scanned */ +static const unsigned short normal_i2c[] = { 0x31, 0x32, I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define CPLD_SIZE 3 + +/* Each client has this additional data */ +struct cpld_data { + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 data[CPLD_SIZE]; /* Register value */ +}; + +static ssize_t show_value(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + data->data[0] = i2c_smbus_read_byte_data(client, attr->index); + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%02x\n", data->data[0]); +} + +static ssize_t set_value(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 temp; + int error; + + error = kstrtou8(buf, 10, &temp); + if (error) + return error; + + mutex_lock(&data->update_lock); + i2c_smbus_write_byte_data(client, attr->index, temp); + mutex_unlock(&data->update_lock); + + return count; +} + +static SENSOR_DEVICE_ATTR(reset_control, S_IWUSR | S_IRUGO, show_value, set_value, 2); +static SENSOR_DEVICE_ATTR(sfp_mod_abs1, S_IRUGO, show_value, NULL, 3); +static SENSOR_DEVICE_ATTR(sfp_mod_abs2, S_IRUGO, show_value, NULL, 4); +static SENSOR_DEVICE_ATTR(sfp_mod_abs3, S_IRUGO, show_value, NULL, 5); +static SENSOR_DEVICE_ATTR(sfp_mod_abs4, S_IRUGO, show_value, NULL, 6); +static SENSOR_DEVICE_ATTR(qsfp_modprs, S_IRUGO, show_value, NULL, 22); +static SENSOR_DEVICE_ATTR(qsfp_lpmode, S_IWUSR | S_IRUGO, show_value, set_value, 24); + +static struct attribute *cpld2_attributes[] = { + &sensor_dev_attr_reset_control.dev_attr.attr, + &sensor_dev_attr_sfp_mod_abs1.dev_attr.attr, + &sensor_dev_attr_sfp_mod_abs2.dev_attr.attr, + &sensor_dev_attr_sfp_mod_abs3.dev_attr.attr, + &sensor_dev_attr_qsfp_modprs.dev_attr.attr, + &sensor_dev_attr_qsfp_lpmode.dev_attr.attr, + NULL +}; + +static struct attribute *cpld1_attributes[] = { + &sensor_dev_attr_sfp_mod_abs1.dev_attr.attr, + &sensor_dev_attr_sfp_mod_abs2.dev_attr.attr, + &sensor_dev_attr_sfp_mod_abs3.dev_attr.attr, + &sensor_dev_attr_sfp_mod_abs4.dev_attr.attr, + NULL +}; + +static const struct attribute_group cpld2_group = { + .attrs = cpld2_attributes, +}; + +static const struct attribute_group cpld1_group = { + .attrs = cpld1_attributes, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int cpld_detect(struct i2c_client *new_client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = new_client->adapter; + int conf; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA)) + return -ENODEV; + + /* Unused bits */ + conf = i2c_smbus_read_byte_data(new_client, 0); + if (!conf) + return -ENODEV; + + return 0; +} + + +static int cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct cpld_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) + return -EIO; +#if 1 + data = devm_kzalloc(&client->dev, sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); +#endif + + if (client->addr == 49) /* 0x31 */ + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &cpld1_group); + else if (client->addr == 50) /* 0x32 */ + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &cpld2_group); + else + status = 1; + + if (status) + return status; + + dev_info(&client->dev, "cpld 0x%x found\n", client->addr); + + return 0; +} + +static int cpld_remove(struct i2c_client *client) +{ + if (client->addr == 49) /* 0x31 */ + sysfs_remove_group(&client->dev.kobj, &cpld1_group); + else if (client->addr == 50) /* 0x32 */ + sysfs_remove_group(&client->dev.kobj, &cpld2_group); + else + return 1; + + return 0; +} + +static const struct i2c_device_id cpld_id[] = { + { "wnc_cpld", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "wnc_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, + .detect = cpld_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(cpld_driver); + +MODULE_AUTHOR("WNC "); +MODULE_DESCRIPTION("WNC CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/wnc_cpld3.c b/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/wnc_cpld3.c new file mode 100644 index 00000000000..a24698aa9ce --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/wnc_cpld3.c @@ -0,0 +1,200 @@ +/* + * wnc_cpld.c - A driver for control wnc_cpld3 base on lm75.c + * + * Copyright (c) 1998, 1999 Frodo Looijaard + * Copyright (c) 2017 WNC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Addresses scanned */ +static const unsigned short normal_i2c[] = { 0x33, I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define CPLD_SIZE 3 + +/* Each client has this additional data */ +struct cpld_data { + struct i2c_client *client; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 data[CPLD_SIZE]; /* Register value */ +}; + +static ssize_t show_hwmon_value(struct device *dev, struct device_attribute *da, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int index = to_sensor_dev_attr_2(da)->index; + + mutex_lock(&data->update_lock); + data->data[0] = i2c_smbus_read_byte_data(client, index); + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", data->data[0]); +} + +static ssize_t show_sysfs_value(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + data->data[0] = i2c_smbus_read_byte_data(client, attr->index); + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%02x\n", data->data[0]); +} + +static ssize_t set_hwmon_value(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int index = to_sensor_dev_attr_2(da)->index; + u8 temp; + int error; + + error = kstrtou8(buf, 10, &temp); + if (error) + return error; + + mutex_lock(&data->update_lock); + i2c_smbus_write_byte_data(client, index, temp); + mutex_unlock(&data->update_lock); + + return count; +} + +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_hwmon_value, NULL, 6); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_hwmon_value, NULL, 7); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_hwmon_value, NULL, 8); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_hwmon_value, NULL, 9); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_hwmon_value, NULL, 10); +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_hwmon_value, set_hwmon_value, 6); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR | S_IRUGO, show_hwmon_value, set_hwmon_value, 7); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR | S_IRUGO, show_hwmon_value, set_hwmon_value, 8); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR | S_IRUGO, show_hwmon_value, set_hwmon_value, 9); +static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR | S_IRUGO, show_hwmon_value, set_hwmon_value, 10); + +static struct attribute *cpld3_hwmon_attrs[] = { + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, + &sensor_dev_attr_pwm5.dev_attr.attr, + NULL +}; + +ATTRIBUTE_GROUPS(cpld3_hwmon); + +static SENSOR_DEVICE_ATTR(cpld_version, S_IRUGO, show_sysfs_value, NULL, 1); +static SENSOR_DEVICE_ATTR(power_good, S_IRUGO, show_sysfs_value, NULL, 4); + +static struct attribute *cpld3_sysfs_attrs[] = { + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_power_good.dev_attr.attr, + NULL +}; + +static const struct attribute_group cpld3_sysfs_group = { + .attrs = cpld3_sysfs_attrs, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int cpld_detect(struct i2c_client *new_client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = new_client->adapter; + int conf; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA)) + return -ENODEV; + + /* Unused bits */ + conf = i2c_smbus_read_byte_data(new_client, 0); + if (!conf) + return -ENODEV; + + return 0; +} + + +static int cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct device *hwmon_dev; + struct cpld_data *data; + int status; + + data = devm_kzalloc(&client->dev, sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->client = client; + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + status = sysfs_create_group(&client->dev.kobj, &cpld3_sysfs_group); + hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev, client->name, data, cpld3_hwmon_groups); + + return PTR_ERR_OR_ZERO(hwmon_dev); +} + +static int cpld_remove(struct i2c_client *client) +{ + devm_hwmon_device_unregister(&client->dev); + sysfs_remove_group(&client->dev.kobj, &cpld3_sysfs_group); + return 0; +} + +static const struct i2c_device_id cpld_id[] = { + { "wnc_cpld3", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "wnc_cpld3", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, + .detect = cpld_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(cpld_driver); + +MODULE_AUTHOR("WNC "); +MODULE_DESCRIPTION("WNC CPLD3 driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/wnc_eeprom.c b/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/wnc_eeprom.c new file mode 100644 index 00000000000..8ddf1f2af27 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/modules/wnc_eeprom.c @@ -0,0 +1,286 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57, I2C_CLIENT_END }; + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +/* possible types of eeprom devices */ +enum eeprom_nature { + UNKNOWN, + VAIO, +}; + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[8]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ + enum eeprom_nature nature; +}; + + +static void eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { + //for (i = slice << 5; i < (slice + 1) << 5; i += 32) + for (i = slice << 5; i < (slice + 1) << 5; i += 24) + if (i2c_smbus_read_i2c_block_data(client, i, + 24, data->data + i) + != 24) + goto exit; + } else { + for (i = slice << 5; i < (slice + 1) << 5; i += 2) { + int word = i2c_smbus_read_word_data(client, i); + if (word < 0) + goto exit; + data->data[i] = word & 0xff; + data->data[i + 1] = word >> 8; + } + } + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + data->valid = 0; + + if (off > EEPROM_SIZE) + return 0; + if (off + count > EEPROM_SIZE) + count = EEPROM_SIZE - off; + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> 5; slice <= (off + count - 1) >> 5; slice++) + eeprom_update_client(client, slice); + + /* Hide Vaio private settings to regular users: + - BIOS passwords: bytes 0x00 to 0x0f + - UUID: bytes 0x10 to 0x1f + - Serial number: 0xc0 to 0xdf */ + if (data->nature == VAIO && !capable(CAP_SYS_ADMIN)) { + int i; + + for (i = 0; i < count; i++) { + if ((off + i <= 0x1f) || + (off + i >= 0xc0 && off + i <= 0xdf)) + buf[i] = 0; + else + buf[i] = data->data[off + i]; + } + } else { + memcpy(buf, &data->data[off], count); + } + + return count; +} + +static ssize_t eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 temp; + int error, reg; + + mutex_lock(&data->update_lock); + + error = kstrtou8(buf, 10, &temp); + if (error) + return error; + + if (client->addr == 0x51) { /* SFP AOC cable, page selection byte is 126 */ + reg = 126; + } + else if (client->addr == 0x50) { /* QSFP, page selection byte is 127 */ + data->data[0] = i2c_smbus_read_byte_data(client, 0); + + /* Base on SFF-8024, determine this module is SFP or QSFP by byte 0 (Identifier) */ + switch (data->data[0]){ + case 12: + case 13: + case 17: + case 24: + reg = 127; + break; + + default: + goto exit; + } + } + else + goto exit; + + i2c_smbus_write_byte_data(client, reg, temp); + +exit: + mutex_unlock(&data->update_lock); + + return count; +} + +static struct bin_attribute eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IWUSR | S_IRUGO | S_IWGRP | S_IWOTH, + }, + .size = EEPROM_SIZE, + .read = eeprom_read, + .write = eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x50. So decline + attaching to addresses >= 0x51 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x51) + return -ENODEV; + + /* There are four ways we can read the EEPROM data: + (1) I2C block reads (faster, but unsupported by most adapters) + (2) Word reads (128% overhead) + (3) Consecutive byte reads (88% overhead, unsafe) + (4) Regular byte data reads (265% overhead) + The third and fourth methods are not implemented by this driver + because all known adapters support one of the first two. */ + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_WORD_DATA) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_I2C_BLOCK)) + return -ENODEV; + + strlcpy(info->type, "wnc_eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adapter = client->adapter; + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->nature = UNKNOWN; + + /* Detect the Vaio nature of EEPROMs. + We use the "PCG-" or "VGN-" prefix as the signature. */ + if (client->addr == 0x57 + && i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE_DATA)) { + char name[4]; + + name[0] = i2c_smbus_read_byte_data(client, 0x80); + name[1] = i2c_smbus_read_byte_data(client, 0x81); + name[2] = i2c_smbus_read_byte_data(client, 0x82); + name[3] = i2c_smbus_read_byte_data(client, 0x83); + + if (!memcmp(name, "PCG-", 4) || !memcmp(name, "VGN-", 4)) { + dev_info(&client->dev, "Vaio EEPROM detected, " + "enabling privacy protection\n"); + data->nature = VAIO; + } + } + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &eeprom_attr); + if (err) + goto exit_kfree; + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id eeprom_id[] = { + { "wnc_eeprom", 0 }, + { } +}; + +static struct i2c_driver eeprom_driver = { + .driver = { + .name = "wnc_eeprom", + }, + .probe = eeprom_probe, + .remove = eeprom_remove, + .id_table = eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(eeprom_driver); + +MODULE_AUTHOR("Frodo Looijaard and " + "Philip Edelbrock and " + "Greg Kroah-Hartman "); +MODULE_DESCRIPTION("I2C EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/scripts/device_node.sh b/platform/barefoot/sonic-platform-modules-wnc-osw1800/scripts/device_node.sh new file mode 100644 index 00000000000..7e1c7c45a72 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/scripts/device_node.sh @@ -0,0 +1,91 @@ +#!/bin/bash + +SEARCH_I2C_BUS=$(ls /sys/bus/i2c/devices) +I2C_BUS=-1 + +for i in $SEARCH_I2C_BUS +do + if [[ -n $(cat /sys/bus/i2c/devices/$i/name | grep i2c-mcp2221) ]]; then + I2C_BUS=$(echo $i | sed 's/i2c-//g') + break + fi +done + +if [[ $I2C_BUS == -1 ]]; then + echo "Can't find i2c-mcp2221" + exit +fi + +TOTAL_MUX=8 +START_NODE_NUM=$((I2C_BUS+1)) + +modprobe i2c_mux_pca954x force_deselect_on_exit=1 + +echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-$I2C_BUS/new_device +echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-$I2C_BUS/new_device +echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-$I2C_BUS/new_device +echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-$I2C_BUS/new_device +echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-$I2C_BUS/new_device +echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-$I2C_BUS/new_device +echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-$I2C_BUS/new_device +echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-$I2C_BUS/new_device + +sleep 5 + +/sbin/modprobe wnc_cpld +/sbin/modprobe wnc_cpld3 +/sbin/modprobe wnc_eeprom +/sbin/modprobe eeprom + +# MUX0: i2c-3~i2c-10 +# MUX1: i2c-11~i2c-18 +# MUX2: i2c-19~i2c-26 +# MUX3: i2c-27~i2c-34 +# MUX4: i2c-35~i2c-42 +# MUX5: i2c-43~i2c-50 +# MUX6: i2c-51~i2c-58 +# MUX7: i2c-59~i2c-66 + +# MUX0 channel0 +CHANNEL=0 +echo wnc_cpld 0x31 > /sys/bus/i2c/devices/i2c-$(($START_NODE_NUM+$CHANNEL))/new_device + +# MUX0 channel1 +CHANNEL=1 +echo wnc_cpld 0x32 > /sys/bus/i2c/devices/i2c-$(($START_NODE_NUM+$CHANNEL))/new_device + +# MUX0 channel2 +CHANNEL=2 +echo wnc_cpld3 0x33 > /sys/bus/i2c/devices/i2c-$(($START_NODE_NUM+$CHANNEL))/new_device +echo wnc_eeprom 0x53 > /sys/bus/i2c/devices/i2c-$(($START_NODE_NUM+$CHANNEL))/new_device + +# MUX0 channel3 +CHANNEL=3 +echo wnc_eeprom 0x50 > /sys/bus/i2c/devices/i2c-$(($START_NODE_NUM+$CHANNEL))/new_device +echo wnc_eeprom 0x51 > /sys/bus/i2c/devices/i2c-$(($START_NODE_NUM+$CHANNEL))/new_device + +# MUX0 channel4 +CHANNEL=4 +echo wnc_eeprom 0x54 > /sys/bus/i2c/devices/i2c-$(($START_NODE_NUM+$CHANNEL))/new_device +echo tmp421 0x1E > /sys/bus/i2c/devices/i2c-$(($START_NODE_NUM+$CHANNEL))/new_device +sleep 1 +echo tmp75 0x4E > /sys/bus/i2c/devices/i2c-$(($START_NODE_NUM+$CHANNEL))/new_device +sleep 1 +echo tmp421 0x4F > /sys/bus/i2c/devices/i2c-$(($START_NODE_NUM+$CHANNEL))/new_device + +# MUX0 channel5 +CHANNEL=5 +echo wnc_eeprom 0x52 > /sys/bus/i2c/devices/i2c-$(($START_NODE_NUM+$CHANNEL))/new_device + +# MUX0 channel7 +CHANNEL=7 +#echo wnc_eeprom 0x5B > /sys/bus/i2c/devices/i2c-$(($START_NODE_NUM+$CHANNEL))/new_device + +START_PORT_NUM=$((START_NODE_NUM+8)) +END_PORT_NUM=$((TOTAL_MUX*8+1)) + +for i in $(seq $START_PORT_NUM $END_PORT_NUM) +do + echo wnc_eeprom 0x50 > /sys/bus/i2c/devices/i2c-$i/new_device + echo wnc_eeprom 0x51 > /sys/bus/i2c/devices/i2c-$i/new_device +done diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/scripts/driver_load.sh b/platform/barefoot/sonic-platform-modules-wnc-osw1800/scripts/driver_load.sh new file mode 100644 index 00000000000..81cee0383ff --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/scripts/driver_load.sh @@ -0,0 +1,50 @@ +#!/bin/bash + +vid=04d8 +pid=00dd + +#check to see if sysfs is mounted +sysfs_path=`awk '/^sysfs/{ print $2 }' < /proc/mounts` +curr_path=`pwd` + +#if variable is empty, we should exit. No SYSFS found +if [[ -z $sysfs_path ]]; then + echo "No sysfs in this system! Exiting..." + exit 1 +fi + +function load_drivers +{ + modprobe i2c-dev + if [[ $? -ne 0 ]]; then + echo "Cannot load the \"i2c-dev\" driver! Exiting..." + exit 1 + fi + modprobe i2c-mcp2221 + if [[ $? -ne 0 ]]; then + echo "Cannot load the \"i2c-mcp2221\" driver! Exiting..." + exit 1 + fi + echo "I2C related drivers are loaded" +} + +usb_device_path=${sysfs_path}/bus/usb/devices + +cd $usb_device_path + +for usbdev in *; do + idvendor=${usb_device_path}/${usbdev}/idVendor + idproduct=${usb_device_path}/${usbdev}/idProduct + usb_driver=${usb_device_path}/${usbdev}/${usbdev}:1.2/driver + if [[ -f $idvendor ]]; then + dev_vid=`grep -i $vid < $idvendor` + dev_pid=`grep -i $pid < $idproduct` + if [[ -n $dev_vid ]] && [[ -n $dev_pid ]]; then + echo "I found the requested VID/PID: $dev_vid, $dev_pid" + load_drivers + echo -n "${usbdev}:1.2" > ${usb_driver}/unbind + echo -n "${usbdev}:1.2" > ${sysfs_path}/bus/usb/drivers/i2c-mcp2221/bind + fi + fi +done + diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/scripts/test b/platform/barefoot/sonic-platform-modules-wnc-osw1800/scripts/test new file mode 100644 index 00000000000..38327722c91 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/scripts/test @@ -0,0 +1 @@ +echo "test" diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/service/device_node.service b/platform/barefoot/sonic-platform-modules-wnc-osw1800/service/device_node.service new file mode 100644 index 00000000000..fd1bd9b1564 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/service/device_node.service @@ -0,0 +1,11 @@ +[Unit] +Description=Create device nodes for i2c devices. +Requires=driver_load.service +After=driver_load.service + +[Service] +Type=oneshot +ExecStart=/bin/bash /usr/local/bin/device_node.sh + +[Install] +WantedBy=multi-user.target diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/service/driver_load.service b/platform/barefoot/sonic-platform-modules-wnc-osw1800/service/driver_load.service new file mode 100644 index 00000000000..52ce4d2f444 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/service/driver_load.service @@ -0,0 +1,10 @@ +[Unit] +Description=Initialize i2c-mcp2221 driver. +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=/bin/bash /usr/local/bin/driver_load.sh + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/docker-ptf-brcm.mk b/platform/broadcom/docker-ptf-brcm.mk new file mode 100644 index 00000000000..510f21e8a43 --- /dev/null +++ b/platform/broadcom/docker-ptf-brcm.mk @@ -0,0 +1,7 @@ +# docker image for docker-ptf-brcm + +DOCKER_PTF_BRCM = docker-ptf-brcm.gz +$(DOCKER_PTF_BRCM)_PATH = $(DOCKERS_PATH)/docker-ptf-saithrift +$(DOCKER_PTF_BRCM)_DEPENDS += $(PYTHON_SAITHRIFT) +$(DOCKER_PTF_BRCM)_LOAD_DOCKERS += $(DOCKER_PTF) +SONIC_DOCKER_IMAGES += $(DOCKER_PTF_BRCM) diff --git a/platform/broadcom/docker-saiserver-brcm.mk b/platform/broadcom/docker-saiserver-brcm.mk new file mode 100644 index 00000000000..b754ab67988 --- /dev/null +++ b/platform/broadcom/docker-saiserver-brcm.mk @@ -0,0 +1,18 @@ +# docker image for brcm saiserver + +DOCKER_SAISERVER_BRCM = docker-saiserver-brcm.gz +$(DOCKER_SAISERVER_BRCM)_PATH = $(PLATFORM_PATH)/docker-saiserver-brcm +$(DOCKER_SAISERVER_BRCM)_DEPENDS += $(SAISERVER) +$(DOCKER_SAISERVER_BRCM)_FILES += $(DSSERVE) $(BCMCMD) +$(DOCKER_SAISERVER_BRCM)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) +SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_BRCM) + +$(DOCKER_SAISERVER_BRCM)_CONTAINER_NAME = saiserver +$(DOCKER_SAISERVER_BRCM)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SAISERVER_BRCM)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SAISERVER_BRCM)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd +$(DOCKER_SAISERVER_BRCM)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SAISERVER_BRCM)_RUN_OPT += -v /host/warmboot:/var/warmboot + +$(DOCKER_SAISERVER_BRCM)_BASE_IMAGE_FILES += bcmcmd:/usr/bin/bcmcmd +$(DOCKER_SAISERVER_BRCM)_BASE_IMAGE_FILES += bcmsh:/usr/bin/bcmsh diff --git a/platform/broadcom/docker-saiserver-brcm/Dockerfile.j2 b/platform/broadcom/docker-saiserver-brcm/Dockerfile.j2 new file mode 100644 index 00000000000..79dccf8f37a --- /dev/null +++ b/platform/broadcom/docker-saiserver-brcm/Dockerfile.j2 @@ -0,0 +1,36 @@ +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +COPY \ +{% for deb in docker_saiserver_brcm_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ +{% for deb in docker_saiserver_brcm_debs.split(' ') -%} +dpkg_apt debs/{{ deb }}{{'; '}} +{%- endfor %} + +## TODO: add kmod into Depends +RUN apt-get install -yf kmod + +COPY ["files/dsserve", "files/bcmcmd", "start.sh", "bcmsh", "/usr/bin/"] +RUN chmod +x /usr/bin/dsserve /usr/bin/bcmcmd + +COPY ["profile.ini", "portmap.ini", "/etc/sai/"] + +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/broadcom/docker-saiserver-brcm/bcmsh b/platform/broadcom/docker-saiserver-brcm/bcmsh new file mode 100755 index 00000000000..7488e63c64f --- /dev/null +++ b/platform/broadcom/docker-saiserver-brcm/bcmsh @@ -0,0 +1,40 @@ +#!/bin/bash +usage="$(basename "$0") [-h] [-q] [-t timeout] -- interactive shell for bcm service + +where: + -h show this help text + -t inactivity timeout in seconds (default 300 seconds, 0 for no timeout) + -q quite, no banner (default: verbose)" + +banner="Press Enter to show prompt. +Press Ctrl+C to exit. +NOTICE: Only one bcmsh or bcmcmd can connect to the shell at same time. +" + +# Default verbose +quiet=false +timeout=300 + +while getopts 'hqt:' option; do + case "$option" in + h) echo "$usage" + exit + ;; + q) quiet=true + ;; + t) timeout=$OPTARG + ;; + \?) printf "illegal option: -%s\n" "$OPTARG" >&2 + echo "$usage" >&2 + exit 1 + ;; + esac +done +shift $((OPTIND - 1)) + +if [ "$quiet" = false ]; then + echo "$banner" +fi + +/usr/bin/socat -T$timeout readline UNIX-CONNECT:/var/run/sswsyncd/sswsyncd.socket + diff --git a/platform/broadcom/docker-saiserver-brcm/portmap.ini b/platform/broadcom/docker-saiserver-brcm/portmap.ini new file mode 100644 index 00000000000..7161416e4d4 --- /dev/null +++ b/platform/broadcom/docker-saiserver-brcm/portmap.ini @@ -0,0 +1,33 @@ +# alias lanes +Ethernet0 29,30,31,32 +Ethernet4 25,26,27,28 +Ethernet8 37,38,39,40 +Ethernet12 33,34,35,36 +Ethernet16 41,42,43,44 +Ethernet20 45,46,47,48 +Ethernet24 5,6,7,8 +Ethernet28 1,2,3,4 +Ethernet32 9,10,11,12 +Ethernet36 13,14,15,16 +Ethernet40 21,22,23,24 +Ethernet44 17,18,19,20 +Ethernet48 49,50,51,52 +Ethernet52 53,54,55,56 +Ethernet56 61,62,63,64 +Ethernet60 57,58,59,60 +Ethernet64 65,66,67,68 +Ethernet68 69,70,71,72 +Ethernet72 77,78,79,80 +Ethernet76 73,74,75,76 +Ethernet80 105,106,107,108 +Ethernet84 109,110,111,112 +Ethernet88 117,118,119,120 +Ethernet92 113,114,115,116 +Ethernet96 121,122,123,124 +Ethernet100 125,126,127,128 +Ethernet104 85,86,87,88 +Ethernet108 81,82,83,84 +Ethernet112 89,90,91,92 +Ethernet116 93,94,95,96 +Ethernet120 97,98,99,100 +Ethernet124 101,102,103,104 diff --git a/platform/broadcom/docker-saiserver-brcm/profile.ini b/platform/broadcom/docker-saiserver-brcm/profile.ini new file mode 100644 index 00000000000..b64d997fb45 --- /dev/null +++ b/platform/broadcom/docker-saiserver-brcm/profile.ini @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/etc/bcm/td2-s6000-32x40G.config.bcm diff --git a/platform/broadcom/docker-saiserver-brcm/start.sh b/platform/broadcom/docker-saiserver-brcm/start.sh new file mode 100755 index 00000000000..494c0e9126c --- /dev/null +++ b/platform/broadcom/docker-saiserver-brcm/start.sh @@ -0,0 +1,17 @@ +#!/usr/bin/env bash + +start_bcm() +{ + [ -e /dev/linux-bcm-knet ] || mknod /dev/linux-bcm-knet c 122 0 + [ -e /dev/linux-user-bde ] || mknod /dev/linux-user-bde c 126 0 + [ -e /dev/linux-kernel-bde ] || mknod /dev/linux-kernel-bde c 127 0 +} + + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +start_bcm + +supervisorctl start saiserver diff --git a/platform/broadcom/docker-saiserver-brcm/supervisord.conf b/platform/broadcom/docker-saiserver-brcm/supervisord.conf new file mode 100644 index 00000000000..cb67a0fc9a4 --- /dev/null +++ b/platform/broadcom/docker-saiserver-brcm/supervisord.conf @@ -0,0 +1,28 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:saiserver] +command=/usr/bin/saiserver -p /etc/sai/profile.ini -f /etc/sai/portmap.ini +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/broadcom/docker-syncd-brcm-rpc.mk b/platform/broadcom/docker-syncd-brcm-rpc.mk new file mode 100644 index 00000000000..bd2ef01c5ee --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-rpc.mk @@ -0,0 +1,29 @@ +# docker image for brcm syncd with rpc + +DOCKER_SYNCD_BRCM_RPC = docker-syncd-brcm-rpc.gz +$(DOCKER_SYNCD_BRCM_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-brcm-rpc +$(DOCKER_SYNCD_BRCM_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) +ifeq ($(INSTALL_DEBUG_TOOLS), y) +$(DOCKER_SYNCD_BRCM_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) +endif +$(DOCKER_SYNCD_BRCM_RPC)_FILES += $(DSSERVE) $(BCMCMD) $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) +$(DOCKER_SYNCD_BRCM_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_BRCM_RPC) +SONIC_STRETCH_DOCKERS += $(DOCKER_SYNCD_BRCM_RPC) +ifeq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_BRCM_RPC) +endif + +$(DOCKER_SYNCD_BRCM_RPC)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot +$(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd +$(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro + +$(DOCKER_SYNCD_BRCM_RPC)_BASE_IMAGE_FILES += bcmcmd:/usr/bin/bcmcmd +$(DOCKER_SYNCD_BRCM_RPC)_BASE_IMAGE_FILES += bcmsh:/usr/bin/bcmsh + diff --git a/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2 new file mode 100644 index 00000000000..5b4f71144c2 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2 @@ -0,0 +1,51 @@ +FROM docker-syncd-brcm + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +COPY \ +{% for deb in docker_syncd_brcm_rpc_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get purge -y syncd + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ +{% for deb in docker_syncd_brcm_rpc_debs.split(' ') -%} +dpkg_apt debs/{{ deb }}{{'; '}} +{%- endfor %} + +## Pre-install the fundamental packages +RUN apt-get update \ + && apt-get -y install \ + net-tools \ + python-pip \ + build-essential \ + libssl-dev \ + libffi-dev \ + python-dev \ + wget \ + cmake \ + && wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ + && tar xvfz 1.0.0.tar.gz \ + && cd nanomsg-1.0.0 \ + && mkdir -p build \ + && cmake . \ + && make install \ + && ldconfig \ + && cd .. \ + && rm -fr nanomsg-1.0.0 \ + && rm -f 1.0.0.tar.gz \ + && pip install cffi==1.7.0 \ + && pip install --upgrade cffi==1.7.0 \ + && pip install nnpy \ + && mkdir -p /opt \ + && cd /opt \ + && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ + && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \ + && rm -rf /root/deps + +COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/broadcom/docker-syncd-brcm-rpc/base_image_files/bcmcmd b/platform/broadcom/docker-syncd-brcm-rpc/base_image_files/bcmcmd new file mode 100755 index 00000000000..7903db6ed6a --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-rpc/base_image_files/bcmcmd @@ -0,0 +1,3 @@ +#!/bin/bash + +docker exec -i syncd bcmcmd "$@" diff --git a/platform/broadcom/docker-syncd-brcm-rpc/base_image_files/bcmsh b/platform/broadcom/docker-syncd-brcm-rpc/base_image_files/bcmsh new file mode 100755 index 00000000000..3bb78b0da79 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-rpc/base_image_files/bcmsh @@ -0,0 +1,3 @@ +#!/bin/bash + +docker exec -it syncd bcmsh "$@" diff --git a/platform/broadcom/docker-syncd-brcm-rpc/ptf_nn_agent.conf b/platform/broadcom/docker-syncd-brcm-rpc/ptf_nn_agent.conf new file mode 100644 index 00000000000..fa1ed0eb162 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-rpc/ptf_nn_agent.conf @@ -0,0 +1,10 @@ +[program:ptf_nn_agent] +command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-iface-rcv-buffer=109430400 +process_name=ptf_nn_agent +stdout_logfile=/tmp/ptf_nn_agent.out.log +stderr_logfile=/tmp/ptf_nn_agent.err.log +redirect_stderr=false +autostart=true +autorestart=true +startsecs=1 +numprocs=1 diff --git a/platform/broadcom/docker-syncd-brcm.mk b/platform/broadcom/docker-syncd-brcm.mk new file mode 100644 index 00000000000..29727dbb226 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm.mk @@ -0,0 +1,18 @@ +# docker image for brcm syncd + +DOCKER_SYNCD_PLATFORM_CODE = brcm +include $(PLATFORM_PATH)/../template/docker-syncd-base.mk + +$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) +$(DOCKER_SYNCD_BASE)_FILES += $(DSSERVE) $(BCMCMD) + +$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) + +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd + +$(DOCKER_SYNCD_BASE)_BASE_IMAGE_FILES += bcmcmd:/usr/bin/bcmcmd +$(DOCKER_SYNCD_BASE)_BASE_IMAGE_FILES += bcmsh:/usr/bin/bcmsh diff --git a/platform/broadcom/docker-syncd-brcm/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm/Dockerfile.j2 new file mode 100755 index 00000000000..b20e353f842 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm/Dockerfile.j2 @@ -0,0 +1,36 @@ +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +COPY \ +{% for deb in docker_syncd_brcm_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN dpkg -i \ +{% for deb in docker_syncd_brcm_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +## TODO: add kmod into Depends +RUN apt-get install -yf kmod + +COPY ["files/dsserve", "files/bcmcmd", "start.sh", "bcmsh", "/usr/bin/"] +RUN chmod +x /usr/bin/dsserve /usr/bin/bcmcmd + +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor/"] + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/broadcom/docker-syncd-brcm/base_image_files/bcmcmd b/platform/broadcom/docker-syncd-brcm/base_image_files/bcmcmd new file mode 100755 index 00000000000..7903db6ed6a --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm/base_image_files/bcmcmd @@ -0,0 +1,3 @@ +#!/bin/bash + +docker exec -i syncd bcmcmd "$@" diff --git a/platform/broadcom/docker-syncd-brcm/base_image_files/bcmsh b/platform/broadcom/docker-syncd-brcm/base_image_files/bcmsh new file mode 100755 index 00000000000..3bb78b0da79 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm/base_image_files/bcmsh @@ -0,0 +1,3 @@ +#!/bin/bash + +docker exec -it syncd bcmsh "$@" diff --git a/platform/broadcom/docker-syncd-brcm/bcmsh b/platform/broadcom/docker-syncd-brcm/bcmsh new file mode 100755 index 00000000000..7488e63c64f --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm/bcmsh @@ -0,0 +1,40 @@ +#!/bin/bash +usage="$(basename "$0") [-h] [-q] [-t timeout] -- interactive shell for bcm service + +where: + -h show this help text + -t inactivity timeout in seconds (default 300 seconds, 0 for no timeout) + -q quite, no banner (default: verbose)" + +banner="Press Enter to show prompt. +Press Ctrl+C to exit. +NOTICE: Only one bcmsh or bcmcmd can connect to the shell at same time. +" + +# Default verbose +quiet=false +timeout=300 + +while getopts 'hqt:' option; do + case "$option" in + h) echo "$usage" + exit + ;; + q) quiet=true + ;; + t) timeout=$OPTARG + ;; + \?) printf "illegal option: -%s\n" "$OPTARG" >&2 + echo "$usage" >&2 + exit 1 + ;; + esac +done +shift $((OPTIND - 1)) + +if [ "$quiet" = false ]; then + echo "$banner" +fi + +/usr/bin/socat -T$timeout readline UNIX-CONNECT:/var/run/sswsyncd/sswsyncd.socket + diff --git a/platform/broadcom/docker-syncd-brcm/critical_processes b/platform/broadcom/docker-syncd-brcm/critical_processes new file mode 100644 index 00000000000..489668a89e0 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm/critical_processes @@ -0,0 +1,2 @@ +dsserve +syncd diff --git a/platform/broadcom/docker-syncd-brcm/start.sh b/platform/broadcom/docker-syncd-brcm/start.sh new file mode 100755 index 00000000000..146b2efa740 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm/start.sh @@ -0,0 +1,58 @@ +#!/usr/bin/env bash + +PLATFORM_DIR=/usr/share/sonic/platform +HWSKU_DIR=/usr/share/sonic/hwsku + +SYNCD_SOCKET_FILE=/var/run/sswsyncd/sswsyncd.socket + +# Function: wait until syncd has created the socket for bcmcmd to connect to +wait_syncd() { + while true; do + if [ -e ${SYNCD_SOCKET_FILE} ]; then + break + fi + sleep 1 + done + + # wait until bcm sdk is ready to get a request + counter=0 + while true; do + /usr/bin/bcmcmd -t 1 "show unit" | grep BCM >/dev/null 2>&1 + rv=$? + if [ $rv -eq 0 ]; then + break + fi + counter=$((counter+1)) + if [ $counter -ge 60 ]; then + echo "syncd is not ready to take commands after $counter re-tries; Exiting!" + break + fi + sleep 1 + done +} + + +# Remove stale files if they exist +rm -f /var/run/rsyslogd.pid +rm -f ${SYNCD_SOCKET_FILE} + +supervisorctl start rsyslogd + +mkdir -p /etc/sai.d/ + +# Create/Copy the sai.profile to /etc/sai.d/sai.profile +if [ -f $HWSKU_DIR/sai.profile.j2 ]; then + sonic-cfggen -d -t $HWSKU_DIR/sai.profile.j2 > /etc/sai.d/sai.profile +else + if [ -f $HWSKU_DIR/sai.profile ]; then + cp $HWSKU_DIR/sai.profile /etc/sai.d/sai.profile + fi +fi + +supervisorctl start syncd + +# If this platform has an initialization file for the Broadcom LED microprocessor, load it +if [[ -r ${PLATFORM_DIR}/led_proc_init.soc && ! -f /var/warmboot/warm-starting ]]; then + wait_syncd + supervisorctl start ledinit +fi diff --git a/platform/broadcom/docker-syncd-brcm/supervisord.conf b/platform/broadcom/docker-syncd-brcm/supervisord.conf new file mode 100644 index 00000000000..cd6712acbf2 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm/supervisord.conf @@ -0,0 +1,43 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=unexpected +stdout_logfile=syslog +stderr_logfile=syslog + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:ledinit] +command=/usr/bin/bcmcmd -t 60 "rcload /usr/share/sonic/platform/led_proc_init.soc" +priority=4 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/broadcom/libsaithrift-dev.mk b/platform/broadcom/libsaithrift-dev.mk new file mode 100644 index 00000000000..543ea63e7f4 --- /dev/null +++ b/platform/broadcom/libsaithrift-dev.mk @@ -0,0 +1,20 @@ +# libsaithrift-dev package + +SAI_VER = 0.9.4 + +LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_amd64.deb +$(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI +$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(BRCM_SAI) $(BRCM_SAI_DEV) +$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) $(BRCM_SAI) +SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV) + +PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_amd64.deb +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT))) + +SAISERVER = saiserver_$(SAI_VER)_amd64.deb +$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(BRCM_SAI) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER))) + +SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_amd64.deb +$(SAISERVER_DBG)_RDEPENDS += $(SAISERVER) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER_DBG))) diff --git a/platform/broadcom/one-aboot.mk b/platform/broadcom/one-aboot.mk new file mode 100644 index 00000000000..66f3ca8797f --- /dev/null +++ b/platform/broadcom/one-aboot.mk @@ -0,0 +1,9 @@ +# sonic broadcom one image installer + +SONIC_ONE_ABOOT_IMAGE = sonic-aboot-broadcom.swi +$(SONIC_ONE_ABOOT_IMAGE)_MACHINE = broadcom +$(SONIC_ONE_ABOOT_IMAGE)_IMAGE_TYPE = aboot +$(SONIC_ONE_ABOOT_IMAGE)_INSTALLS += $(BRCM_OPENNSL_KERNEL) $(ARISTA_PLATFORM_MODULE_DRIVERS) $(ARISTA_PLATFORM_MODULE_PYTHON2) $(ARISTA_PLATFORM_MODULE_PYTHON3) $(ARISTA_PLATFORM_MODULE) +$(SONIC_ONE_ABOOT_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_ONE_ABOOT_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_IMAGES) +SONIC_INSTALLERS += $(SONIC_ONE_ABOOT_IMAGE) diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk new file mode 100644 index 00000000000..92aee58fac7 --- /dev/null +++ b/platform/broadcom/one-image.mk @@ -0,0 +1,68 @@ +# sonic broadcom one image installer + +SONIC_ONE_IMAGE = sonic-broadcom.bin +$(SONIC_ONE_IMAGE)_MACHINE = broadcom +$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie +$(SONIC_ONE_IMAGE)_INSTALLS += $(BRCM_OPENNSL_KERNEL) +$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ + $(DELL_Z9264F_PLATFORM_MODULE) \ + $(DELL_S5232F_PLATFORM_MODULE) \ + $(DELL_S5248F_PLATFORM_MODULE) \ + $(DELL_Z9100_PLATFORM_MODULE) \ + $(DELL_S6100_PLATFORM_MODULE) \ + $(INGRASYS_S8900_54XC_PLATFORM_MODULE) \ + $(INGRASYS_S8900_64XC_PLATFORM_MODULE) \ + $(INGRASYS_S9100_PLATFORM_MODULE) \ + $(INGRASYS_S8810_32Q_PLATFORM_MODULE) \ + $(INGRASYS_S9200_64X_PLATFORM_MODULE) \ + $(ACCTON_AS7712_32X_PLATFORM_MODULE) \ + $(ACCTON_AS5712_54X_PLATFORM_MODULE) \ + $(ACCTON_AS7816_64X_PLATFORM_MODULE) \ + $(ACCTON_AS7716_32X_PLATFORM_MODULE) \ + $(ACCTON_AS7312_54X_PLATFORM_MODULE) \ + $(ACCTON_AS7326_56X_PLATFORM_MODULE) \ + $(ACCTON_AS7716_32XB_PLATFORM_MODULE) \ + $(ACCTON_AS6712_32X_PLATFORM_MODULE) \ + $(ACCTON_AS7726_32X_PLATFORM_MODULE) \ + $(ACCTON_AS4630_54PE_PLATFORM_MODULE) \ + $(ACCTON_MINIPACK_PLATFORM_MODULE) \ + $(ACCTON_AS5812_54X_PLATFORM_MODULE) \ + $(ACCTON_AS5812_54T_PLATFORM_MODULE) \ + $(ACCTON_AS5835_54X_PLATFORM_MODULE) \ + $(ACCTON_AS9716_32D_PLATFORM_MODULE) \ + $(ACCTON_AS5835_54T_PLATFORM_MODULE) \ + $(ACCTON_AS7312_54XS_PLATFORM_MODULE) \ + $(ACCTON_AS7315_27XB_PLATFORM_MODULE) \ + $(INVENTEC_D7032Q28B_PLATFORM_MODULE) \ + $(INVENTEC_D7054Q28B_PLATFORM_MODULE) \ + $(INVENTEC_D7264Q28B_PLATFORM_MODULE) \ + $(INVENTEC_D7264_PLATFORM_MODULE) \ + $(INVENTEC_D6356_PLATFORM_MODULE) \ + $(INVENTEC_D6356J_PLATFORM_MODULE) \ + $(CEL_DX010_PLATFORM_MODULE) \ + $(CEL_HALIBURTON_PLATFORM_MODULE) \ + $(DELTA_AG9032V1_PLATFORM_MODULE) \ + $(DELTA_AG9064_PLATFORM_MODULE) \ + $(DELTA_AG5648_PLATFORM_MODULE) \ + $(DELTA_ET6248BRB_PLATFORM_MODULE) \ + $(QUANTA_IX1B_32X_PLATFORM_MODULE) \ + $(QUANTA_IX7_32X_PLATFORM_MODULE) \ + $(QUANTA_IX8_56X_PLATFORM_MODULE) \ + $(QUANTA_IX8C_56X_PLATFORM_MODULE) \ + $(QUANTA_IX9_32X_PLATFORM_MODULE) \ + $(MITAC_LY1200_32X_PLATFORM_MODULE) \ + $(ALPHANETWORKS_SNH60A0_320FV2_PLATFORM_MODULE) \ + $(ALPHANETWORKS_SNH60B0_640F_PLATFORM_MODULE) \ + $(BRCM_XLR_GTS_PLATFORM_MODULE) \ + $(DELTA_AG9032V2A_PLATFORM_MODULE) \ + $(JUNIPER_QFX5210_PLATFORM_MODULE) \ + $(CEL_SILVERSTONE_PLATFORM_MODULE) +ifeq ($(INSTALL_DEBUG_TOOLS),y) +$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) +$(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) +else +$(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES) +endif + +SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/broadcom/platform-modules-accton.mk b/platform/broadcom/platform-modules-accton.mk new file mode 100755 index 00000000000..bab9c5ef9fe --- /dev/null +++ b/platform/broadcom/platform-modules-accton.mk @@ -0,0 +1,115 @@ +# Accton Platform modules + +ACCTON_AS7712_32X_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS5712_54X_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS7816_64X_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS7716_32X_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS7312_54X_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS7326_56X_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS7716_32XB_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS6712_32X_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS7726_32X_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS4630_54PE_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_MINIPACK_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS5812_54X_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS5812_54T_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS5835_54X_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS9716_32D_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS5835_54T_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS7312_54XS_PLATFORM_MODULE_VERSION = 1.1 +ACCTON_AS7315_27XB_PLATFORM_MODULE_VERSION = 1.1 + +export ACCTON_AS7712_32X_PLATFORM_MODULE_VERSION +export ACCTON_AS5712_54X_PLATFORM_MODULE_VERSION +export ACCTON_AS7816_64X_PLATFORM_MODULE_VERSION +export ACCTON_AS7716_32X_PLATFORM_MODULE_VERSION +export ACCTON_AS7312_54X_PLATFORM_MODULE_VERSION +export ACCTON_AS7326_56X_PLATFORM_MODULE_VERSION +export ACCTON_AS7716_32XB_PLATFORM_MODULE_VERSION +export ACCTON_AS6712_32X_PLATFORM_MODULE_VERSION +export ACCTON_AS7726_32X_PLATFORM_MODULE_VERSION +export ACCTON_AS4630_54PE_PLATFORM_MODULE_VERSION +export ACCTON_MINIPACK_PLATFORM_MODULE_VERSION +export ACCTON_AS5812_54X_PLATFORM_MODULE_VERSION +export ACCTON_AS5812_54T_PLATFORM_MODULE_VERSION +export ACCTON_AS5835_54X_PLATFORM_MODULE_VERSION +export ACCTON_AS9716_32D_PLATFORM_MODULE_VERSION +export ACCTON_AS5835_54T_PLATFORM_MODULE_VERSION +export ACCTON_AS7312_54XS_PLATFORM_MODULE_VERSION +export ACCTON_AS7315_27XB_PLATFORM_MODULE_VERSION + +ACCTON_AS7712_32X_PLATFORM_MODULE = sonic-platform-accton-as7712-32x_$(ACCTON_AS7712_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS7712_32X_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-accton +$(ACCTON_AS7712_32X_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(ACCTON_AS7712_32X_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as7712_32x-r0 +SONIC_DPKG_DEBS += $(ACCTON_AS7712_32X_PLATFORM_MODULE) + +ACCTON_AS5712_54X_PLATFORM_MODULE = sonic-platform-accton-as5712-54x_$(ACCTON_AS5712_54X_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS5712_54X_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as5712_54x-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS5712_54X_PLATFORM_MODULE))) + +ACCTON_AS7816_64X_PLATFORM_MODULE = sonic-platform-accton-as7816-64x_$(ACCTON_AS7816_64X_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS7816_64X_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as7816_64x-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS7816_64X_PLATFORM_MODULE))) + +ACCTON_AS7716_32X_PLATFORM_MODULE = sonic-platform-accton-as7716-32x_$(ACCTON_AS7716_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS7716_32X_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as7716_32x-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS7716_32X_PLATFORM_MODULE))) + +ACCTON_AS7312_54X_PLATFORM_MODULE = sonic-platform-accton-as7312-54x_$(ACCTON_AS7312_54X_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS7312_54X_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as7312_54x-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS7312_54X_PLATFORM_MODULE))) + +ACCTON_AS7312_54XS_PLATFORM_MODULE = sonic-platform-accton-as7312-54xs_$(ACCTON_AS7312_54XS_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS7312_54XS_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as7312_54xs-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS7312_54XS_PLATFORM_MODULE))) + +ACCTON_AS7326_56X_PLATFORM_MODULE = sonic-platform-accton-as7326-56x_$(ACCTON_AS7326_56X_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS7326_56X_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as7326_56x-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS7326_56X_PLATFORM_MODULE))) + +ACCTON_AS7716_32XB_PLATFORM_MODULE = sonic-platform-accton-as7716-32xb_$(ACCTON_AS7716_32XB_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS7716_32XB_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as7716_32xb-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS7716_32XB_PLATFORM_MODULE))) + +ACCTON_AS6712_32X_PLATFORM_MODULE = sonic-platform-accton-as6712-32x_$(ACCTON_AS6712_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS6712_32X_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as6712_32x-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS6712_32X_PLATFORM_MODULE))) + +ACCTON_AS7726_32X_PLATFORM_MODULE = sonic-platform-accton-as7726-32x_$(ACCTON_AS7726_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS7726_32X_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as7726_32x-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS7726_32X_PLATFORM_MODULE))) + +ACCTON_AS4630_54PE_PLATFORM_MODULE = sonic-platform-accton-as4630-54pe_$(ACCTON_AS4630_54PE_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS4630_54PE_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as4630_54pe-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS4630_54PE_PLATFORM_MODULE))) + +ACCTON_MINIPACK_PLATFORM_MODULE = sonic-platform-accton-minipack_$(ACCTON_MINIPACK_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_MINIPACK_PLATFORM_MODULE)_PLATFORM = x86_64-accton_minipack-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_MINIPACK_PLATFORM_MODULE))) + +ACCTON_AS5812_54X_PLATFORM_MODULE = sonic-platform-accton-as5812-54x_$(ACCTON_AS5812_54X_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS5812_54X_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as5812_54x-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS5812_54X_PLATFORM_MODULE))) + +ACCTON_AS5812_54T_PLATFORM_MODULE = sonic-platform-accton-as5812-54t_$(ACCTON_AS5812_54T_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS5812_54T_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as5812_54t-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS5812_54T_PLATFORM_MODULE))) + +ACCTON_AS5835_54X_PLATFORM_MODULE = sonic-platform-accton-as5835-54x_$(ACCTON_AS5835_54X_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS5835_54X_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as5835_54x-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS5835_54X_PLATFORM_MODULE))) + +ACCTON_AS9716_32D_PLATFORM_MODULE = sonic-platform-accton-as9716-32d_$(ACCTON_AS9716_32D_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS9716_32D_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as9716_32d-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS9716_32D_PLATFORM_MODULE))) + +ACCTON_AS5835_54T_PLATFORM_MODULE = sonic-platform-accton-as5835-54t_$(ACCTON_AS5835_54T_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS5835_54T_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as5835_54t-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS5835_54T_PLATFORM_MODULE))) + +ACCTON_AS7315_27XB_PLATFORM_MODULE = sonic-platform-accton-as7315-27xb_$(ACCTON_AS7315_27XB_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS7315_27XB_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as7315_27xb-r0 +$(eval $(call add_extra_package,$(ACCTON_AS7712_32X_PLATFORM_MODULE),$(ACCTON_AS7315_27XB_PLATFORM_MODULE))) + +SONIC_STRETCH_DEBS += $(ACCTON_AS7712_32X_PLATFORM_MODULE) diff --git a/platform/broadcom/platform-modules-alphanetworks.mk b/platform/broadcom/platform-modules-alphanetworks.mk new file mode 100644 index 00000000000..425656e0665 --- /dev/null +++ b/platform/broadcom/platform-modules-alphanetworks.mk @@ -0,0 +1,21 @@ +# Alphanetworks Platform modules + +ALPHANETWORKS_SNH60A0_320FV2_PLATFORM_MODULE_VERSION = 1.0 +ALPHANETWORKS_SNH60B0_640F_PLATFORM_MODULE_VERSION = 1.0 + +export ALPHANETWORKS_SNH60A0_320FV2_PLATFORM_MODULE_VERSION +export ALPHANETWORKS_SNH60B0_640F_PLATFORM_MODULE_VERSION + +ALPHANETWORKS_SNH60A0_320FV2_PLATFORM_MODULE = sonic-platform-alphanetworks-snh60a0-320fv2_$(ALPHANETWORKS_SNH60A0_320FV2_PLATFORM_MODULE_VERSION)_amd64.deb +$(ALPHANETWORKS_SNH60A0_320FV2_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-alphanetworks +$(ALPHANETWORKS_SNH60A0_320FV2_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(ALPHANETWORKS_SNH60A0_320FV2_PLATFORM_MODULE)_PLATFORM = x86_64-alphanetworks_snh60a0_320fv2-r0 +SONIC_DPKG_DEBS += $(ALPHANETWORKS_SNH60A0_320FV2_PLATFORM_MODULE) + +ALPHANETWORKS_SNH60B0_640F_PLATFORM_MODULE = sonic-platform-alphanetworks-snh60b0-640f_$(ALPHANETWORKS_SNH60B0_640F_PLATFORM_MODULE_VERSION)_amd64.deb +$(ALPHANETWORKS_SNH60B0_640F_PLATFORM_MODULE)_PLATFORM = x86_64-alphanetworks_snh60b0_640f-r0 +$(eval $(call add_extra_package,$(ALPHANETWORKS_SNH60A0_320FV2_PLATFORM_MODULE),$(ALPHANETWORKS_SNH60B0_640F_PLATFORM_MODULE))) + +SONIC_STRETCH_DEBS += $(ALPHANETWORKS_SNH60A0_320FV2_PLATFORM_MODULE) + + diff --git a/platform/broadcom/platform-modules-arista.mk b/platform/broadcom/platform-modules-arista.mk new file mode 100644 index 00000000000..480aa0cf839 --- /dev/null +++ b/platform/broadcom/platform-modules-arista.mk @@ -0,0 +1,25 @@ +# Arista Platform modules + +ARISTA_PLATFORM_MODULE_VERSION = 1.0 + +export ARISTA_PLATFORM_MODULE_VERSION + +ARISTA_PLATFORM_MODULE = sonic-platform-arista_$(ARISTA_PLATFORM_MODULE_VERSION)_amd64.deb +$(ARISTA_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-arista +$(ARISTA_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +SONIC_MAKE_DEBS += $(ARISTA_PLATFORM_MODULE) + +ARISTA_PLATFORM_MODULE_PYTHON2 = python-sonic-platform-arista_$(ARISTA_PLATFORM_MODULE_VERSION)_all.deb +$(eval $(call add_extra_package,$(ARISTA_PLATFORM_MODULE),$(ARISTA_PLATFORM_MODULE_PYTHON2))) + +ARISTA_PLATFORM_MODULE_PYTHON3 = python3-sonic-platform-arista_$(ARISTA_PLATFORM_MODULE_VERSION)_all.deb +$(eval $(call add_extra_package,$(ARISTA_PLATFORM_MODULE),$(ARISTA_PLATFORM_MODULE_PYTHON3))) + +ARISTA_PLATFORM_MODULE_DRIVERS = drivers-sonic-platform-arista_$(ARISTA_PLATFORM_MODULE_VERSION)_amd64.deb +$(eval $(call add_extra_package,$(ARISTA_PLATFORM_MODULE),$(ARISTA_PLATFORM_MODULE_DRIVERS))) + +export ARISTA_PLATFORM_MODULE ARISTA_PLATFORM_MODULE_PYTHON2 ARISTA_PLATFORM_MODULE_PYTHON3 ARISTA_PLATFORM_MODULE_DRIVERS + +export ARISTA_SCD_DRIVER_CONFIG=m + +SONIC_STRETCH_DEBS += $(ARISTA_PLATFORM_MODULE) diff --git a/platform/broadcom/platform-modules-brcm-xlr-gts.mk b/platform/broadcom/platform-modules-brcm-xlr-gts.mk new file mode 100644 index 00000000000..c35609c3947 --- /dev/null +++ b/platform/broadcom/platform-modules-brcm-xlr-gts.mk @@ -0,0 +1,15 @@ +# Broadcom XLR/GTS Platform modules + +BRCM_XLR_GTS_PLATFORM_MODULE_VERSION = 1.0 + +export BRCM_XLR_GTS_PLATFORM_MODULE_VERSION + +BRCM_XLR_GTS_PLATFORM_MODULE = sonic-platform-brcm-xlr-gts_$(BRCM_XLR_GTS_PLATFORM_MODULE_VERSION)_amd64.deb +$(BRCM_XLR_GTS_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-brcm-xlr-gts +$(BRCM_XLR_GTS_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(BRCM_XLR_GTS_PLATFORM_MODULE)_PLATFORM = x86_64-bcm_xlr-r0 +SONIC_MAKE_DEBS += $(BRCM_XLR_GTS_PLATFORM_MODULE) + +export BRCM_XLR_GTS_PLATFORM_MODULE + +SONIC_STRETCH_DEBS += $(BRCM_XLR_GTS_PLATFORM_MODULE) diff --git a/platform/broadcom/platform-modules-cel.mk b/platform/broadcom/platform-modules-cel.mk new file mode 100644 index 00000000000..b7371e3282d --- /dev/null +++ b/platform/broadcom/platform-modules-cel.mk @@ -0,0 +1,25 @@ +# Celestica DX010 and Haliburton Platform modules + +CEL_DX010_PLATFORM_MODULE_VERSION = 0.9 +CEL_HALIBURTON_PLATFORM_MODULE_VERSION = 0.9 +CEL_SILVERSTONE_PLATFORM_MODULE_VERSION = 0.9 + +export CEL_DX010_PLATFORM_MODULE_VERSION +export CEL_HALIBURTON_PLATFORM_MODULE_VERSION +export CEL_SILVERSTONE_PLATFORM_MODULE_VERSION + +CEL_DX010_PLATFORM_MODULE = platform-modules-dx010_$(CEL_DX010_PLATFORM_MODULE_VERSION)_amd64.deb +$(CEL_DX010_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-cel +$(CEL_DX010_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(CEL_DX010_PLATFORM_MODULE)_PLATFORM = x86_64-cel_seastone-r0 +SONIC_DPKG_DEBS += $(CEL_DX010_PLATFORM_MODULE) + +CEL_HALIBURTON_PLATFORM_MODULE = platform-modules-haliburton_$(CEL_HALIBURTON_PLATFORM_MODULE_VERSION)_amd64.deb +$(CEL_HALIBURTON_PLATFORM_MODULE)_PLATFORM = x86_64-cel_e1031-r0 +$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_HALIBURTON_PLATFORM_MODULE))) + +CEL_SILVERSTONE_PLATFORM_MODULE = platform-modules-silverstone_$(CEL_SILVERSTONE_PLATFORM_MODULE_VERSION)_amd64.deb +$(CEL_SILVERSTONE_PLATFORM_MODULE)_PLATFORM = x86_64-cel_silverstone-r0 +$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_SILVERSTONE_PLATFORM_MODULE))) + +SONIC_STRETCH_DEBS += $(CEL_DX010_PLATFORM_MODULE) diff --git a/platform/broadcom/platform-modules-dell.mk b/platform/broadcom/platform-modules-dell.mk new file mode 100644 index 00000000000..583f74f72d8 --- /dev/null +++ b/platform/broadcom/platform-modules-dell.mk @@ -0,0 +1,46 @@ +# Dell S6000,Z9100, S6100, Z9264F , S5232 Platform modules + +DELL_S6000_PLATFORM_MODULE_VERSION = 1.1 +DELL_Z9100_PLATFORM_MODULE_VERSION = 1.1 +DELL_S6100_PLATFORM_MODULE_VERSION = 1.1 +DELL_Z9264F_PLATFORM_MODULE_VERSION = 1.1 +DELL_S5232F_PLATFORM_MODULE_VERSION = 1.1 +DELL_S5248F_PLATFORM_MODULE_VERSION = 1.1 + +export DELL_S6000_PLATFORM_MODULE_VERSION +export DELL_Z9100_PLATFORM_MODULE_VERSION +export DELL_S6100_PLATFORM_MODULE_VERSION +export DELL_Z9264F_PLATFORM_MODULE_VERSION +export DELL_S5232F_PLATFORM_MODULE_VERSION +export DELL_S5248F_PLATFORM_MODULE_VERSION + +DELL_Z9100_PLATFORM_MODULE = platform-modules-z9100_$(DELL_Z9100_PLATFORM_MODULE_VERSION)_amd64.deb +$(DELL_Z9100_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-dell +$(DELL_Z9100_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(DELL_Z9100_PLATFORM_MODULE)_PLATFORM = x86_64-dell_z9100_c2538-r0 +SONIC_DPKG_DEBS += $(DELL_Z9100_PLATFORM_MODULE) + +DELL_S6100_PLATFORM_MODULE = platform-modules-s6100_$(DELL_S6100_PLATFORM_MODULE_VERSION)_amd64.deb +$(DELL_S6100_PLATFORM_MODULE)_PLATFORM = x86_64-dell_s6100_c2538-r0 +$(eval $(call add_extra_package,$(DELL_Z9100_PLATFORM_MODULE),$(DELL_S6100_PLATFORM_MODULE))) + +DELL_Z9264F_PLATFORM_MODULE = platform-modules-z9264f_$(DELL_Z9264F_PLATFORM_MODULE_VERSION)_amd64.deb +$(DELL_Z9264F_PLATFORM_MODULE)_PLATFORM = x86_64-dellemc_z9264f_c3538-r0 +$(eval $(call add_extra_package,$(DELL_Z9100_PLATFORM_MODULE),$(DELL_Z9264F_PLATFORM_MODULE))) + +# Dell S6000 Platform modules +DELL_S6000_PLATFORM_MODULE = platform-modules-s6000_$(DELL_S6000_PLATFORM_MODULE_VERSION)_amd64.deb +$(DELL_S6000_PLATFORM_MODULE)_PLATFORM = x86_64-dell_s6000_s1220-r0 +$(eval $(call add_extra_package,$(DELL_Z9100_PLATFORM_MODULE),$(DELL_S6000_PLATFORM_MODULE))) + +DELL_S5232F_PLATFORM_MODULE = platform-modules-s5232f_$(DELL_S5232F_PLATFORM_MODULE_VERSION)_amd64.deb +$(DELL_S5232F_PLATFORM_MODULE)_PLATFORM = x86_64-dellemc_s5232f_c3538-r0 +$(eval $(call add_extra_package,$(DELL_Z9100_PLATFORM_MODULE),$(DELL_S5232F_PLATFORM_MODULE))) + +DELL_S5248F_PLATFORM_MODULE = platform-modules-s5248f_$(DELL_S5248F_PLATFORM_MODULE_VERSION)_amd64.deb +$(DELL_S5248F_PLATFORM_MODULE)_PLATFORM = x86_64-dellemc_s5248f_c3538-r0 +$(eval $(call add_extra_package,$(DELL_Z9100_PLATFORM_MODULE),$(DELL_S5248F_PLATFORM_MODULE))) +SONIC_STRETCH_DEBS += $(DELL_Z9100_PLATFORM_MODULE) + +#flashrom tool +$(shell ./$(PLATFORM_PATH)/sonic-platform-modules-dell/tools/flashrom.sh > /dev/null 2>&1) diff --git a/platform/broadcom/platform-modules-delta.mk b/platform/broadcom/platform-modules-delta.mk new file mode 100644 index 00000000000..17746488e02 --- /dev/null +++ b/platform/broadcom/platform-modules-delta.mk @@ -0,0 +1,37 @@ +# Delta AG9032v1 Platform modules + +DELTA_AG9032V1_PLATFORM_MODULE_VERSION = 1.1 +DELTA_AG9064_PLATFORM_MODULE_VERSION = 1.1 +DELTA_AG5648_PLATFORM_MODULE_VERSION = 1.1 +DELTA_ET6248BRB_PLATFORM_MODULE_VERSION = 1.1 +DELTA_AG9032V2A_PLATFORM_MODULE_VERSION = 1.1 + +export DELTA_AG9032V1_PLATFORM_MODULE_VERSION +export DELTA_AG9064_PLATFORM_MODULE_VERSION +export DELTA_AG5648_PLATFORM_MODULE_VERSION +export DELTA_ET6248BRB_PLATFORM_MODULE_VERSION +export DELTA_AG9032V2A_PLATFORM_MODULE_VERSION + +DELTA_AG9032V1_PLATFORM_MODULE = platform-modules-ag9032v1_$(DELTA_AG9032V1_PLATFORM_MODULE_VERSION)_amd64.deb +$(DELTA_AG9032V1_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-delta +$(DELTA_AG9032V1_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(DELTA_AG9032V1_PLATFORM_MODULE)_PLATFORM = x86_64-delta_ag9032v1-r0 +SONIC_DPKG_DEBS += $(DELTA_AG9032V1_PLATFORM_MODULE) + +DELTA_AG9064_PLATFORM_MODULE = platform-modules-ag9064_$(DELTA_AG9064_PLATFORM_MODULE_VERSION)_amd64.deb +$(DELTA_AG9064_PLATFORM_MODULE)_PLATFORM = x86_64-delta_ag9064-r0 +$(eval $(call add_extra_package,$(DELTA_AG9032V1_PLATFORM_MODULE),$(DELTA_AG9064_PLATFORM_MODULE))) + +DELTA_AG5648_PLATFORM_MODULE = platform-modules-ag5648_$(DELTA_AG5648_PLATFORM_MODULE_VERSION)_amd64.deb +$(DELTA_AG5648_PLATFORM_MODULE)_PLATFORM = x86_64-delta_ag5648-r0 +$(eval $(call add_extra_package,$(DELTA_AG9032V1_PLATFORM_MODULE),$(DELTA_AG5648_PLATFORM_MODULE))) + +DELTA_ET6248BRB_PLATFORM_MODULE = platform-modules-et-6248brb_$(DELTA_ET6248BRB_PLATFORM_MODULE_VERSION)_amd64.deb +$(DELTA_ET6248BRB_PLATFORM_MODULE)_PLATFORM = x86_64-delta_et-6248brb-r0 +$(eval $(call add_extra_package,$(DELTA_AG9032V1_PLATFORM_MODULE),$(DELTA_ET6248BRB_PLATFORM_MODULE))) + +DELTA_AG9032V2A_PLATFORM_MODULE = platform-modules-ag9032v2a_$(DELTA_AG9032V2A_PLATFORM_MODULE_VERSION)_amd64.deb +$(DELTA_AG9032V2A_PLATFORM_MODULE)_PLATFORM = x86_64-delta_ag9032v2a-r0 +$(eval $(call add_extra_package,$(DELTA_AG9032V1_PLATFORM_MODULE),$(DELTA_AG9032V2A_PLATFORM_MODULE))) + +SONIC_STRETCH_DEBS += $(DELTA_AG9032V1_PLATFORM_MODULE) diff --git a/platform/broadcom/platform-modules-ingrasys.mk b/platform/broadcom/platform-modules-ingrasys.mk new file mode 100644 index 00000000000..b6195698a1f --- /dev/null +++ b/platform/broadcom/platform-modules-ingrasys.mk @@ -0,0 +1,38 @@ +# Ingrasys S9100, S8900-64XC, S8900-54XC and S8810-32Q Platform modules + +INGRASYS_S9100_PLATFORM_MODULE_VERSION = 1.1.0 +INGRASYS_S8900_64XC_PLATFORM_MODULE_VERSION = 1.1.0 +INGRASYS_S8900_54XC_PLATFORM_MODULE_VERSION = 1.1.0 +INGRASYS_S8810_32Q_PLATFORM_MODULE_VERSION = 1.1.0 +INGRASYS_S9200_64X_PLATFORM_MODULE_VERSION = 1.1.0 + +export INGRASYS_S9100_PLATFORM_MODULE_VERSION +export INGRASYS_S8900_64XC_PLATFORM_MODULE_VERSION +export INGRASYS_S8900_54XC_PLATFORM_MODULE_VERSION +export INGRASYS_S8810_32Q_PLATFORM_MODULE_VERSION +export INGRASYS_S9200_64X_PLATFORM_MODULE_VERSION + +INGRASYS_S9100_PLATFORM_MODULE = sonic-platform-ingrasys-s9100_$(INGRASYS_S9100_PLATFORM_MODULE_VERSION)_amd64.deb +$(INGRASYS_S9100_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-ingrasys +$(INGRASYS_S9100_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(INGRASYS_S9100_PLATFORM_MODULE)_PLATFORM = x86_64-ingrasys_s9100-r0 +SONIC_DPKG_DEBS += $(INGRASYS_S9100_PLATFORM_MODULE) + +INGRASYS_S8900_64XC_PLATFORM_MODULE = sonic-platform-ingrasys-s8900-64xc_$(INGRASYS_S8900_64XC_PLATFORM_MODULE_VERSION)_amd64.deb +$(INGRASYS_S8900_64XC_PLATFORM_MODULE)_PLATFORM = x86_64-ingrasys_s8900_64xc-r0 + +INGRASYS_S8900_54XC_PLATFORM_MODULE = sonic-platform-ingrasys-s8900-54xc_$(INGRASYS_S8900_54XC_PLATFORM_MODULE_VERSION)_amd64.deb +$(INGRASYS_S8900_54XC_PLATFORM_MODULE)_PLATFORM = x86_64-ingrasys_s8900_54xc-r0 + +INGRASYS_S8810_32Q_PLATFORM_MODULE = sonic-platform-ingrasys-s8810-32q_$(INGRASYS_S8810_32Q_PLATFORM_MODULE_VERSION)_amd64.deb +$(INGRASYS_S8810_32Q_PLATFORM_MODULE)_PLATFORM = x86_64-ingrasys_s8810_32q-r0 + +INGRASYS_S9200_64X_PLATFORM_MODULE = sonic-platform-ingrasys-s9200-64x_$(INGRASYS_S9200_64X_PLATFORM_MODULE_VERSION)_amd64.deb +$(INGRASYS_S9200_64X_PLATFORM_MODULE)_PLATFORM = x86_64-ingrasys_s9200_64x-r0 + +$(eval $(call add_extra_package,$(INGRASYS_S9100_PLATFORM_MODULE),$(INGRASYS_S8900_64XC_PLATFORM_MODULE))) +$(eval $(call add_extra_package,$(INGRASYS_S9100_PLATFORM_MODULE),$(INGRASYS_S8900_54XC_PLATFORM_MODULE))) +$(eval $(call add_extra_package,$(INGRASYS_S9100_PLATFORM_MODULE),$(INGRASYS_S8810_32Q_PLATFORM_MODULE))) +$(eval $(call add_extra_package,$(INGRASYS_S9100_PLATFORM_MODULE),$(INGRASYS_S9200_64X_PLATFORM_MODULE))) + +SONIC_STRETCH_DEBS += $(INGRASYS_S9100_PLATFORM_MODULE) diff --git a/platform/broadcom/platform-modules-inventec.mk b/platform/broadcom/platform-modules-inventec.mk new file mode 100644 index 00000000000..3ad9b4b29dc --- /dev/null +++ b/platform/broadcom/platform-modules-inventec.mk @@ -0,0 +1,55 @@ +# Inventec platform modules + +INVENTEC_D7032Q28B_PLATFORM_MODULE_VERSION = 1.1.0 +INVENTEC_D7054Q28B_PLATFORM_MODULE_VERSION = 1.1.0 +INVENTEC_D6254QS_PLATFORM_MODULE_VERSION = 1.1.0 +INVENTEC_D6556_PLATFORM_MODULE_VERSION = 1.1.0 +INVENTEC_D6356_PLATFORM_MODULE_VERSION = 1.1.0 +INVENTEC_D6356J_PLATFORM_MODULE_VERSION = 1.1.0 +INVENTEC_D7264Q28B_PLATFORM_MODULE_VERSION = 1.1.0 +INVENTEC_D7264_PLATFORM_MODULE_VERSION = 1.1.0 + +export INVENTEC_D7032Q28B_PLATFORM_MODULE_VERSION +export INVENTEC_D7054Q28B_PLATFORM_MODULE_VERSION +export INVENTEC_D6254QS_PLATFORM_MODULE_VERSION +export INVENTEC_D6556_PLATFORM_MODULE_VERSION +export INVENTEC_D6356_PLATFORM_MODULE_VERSION +export INVENTEC_D6356J_PLATFORM_MODULE_VERSION +export INVENTEC_D7264Q28B_PLATFORM_MODULE_VERSION +export INVENTEC_D7264_PLATFORM_MODULE_VERSION + +INVENTEC_D7032Q28B_PLATFORM_MODULE = platform-modules-d7032q28b_$(INVENTEC_D7032Q28B_PLATFORM_MODULE_VERSION)_amd64.deb +$(INVENTEC_D7032Q28B_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-inventec +$(INVENTEC_D7032Q28B_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(INVENTEC_D7032Q28B_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d7032q28b-r0 +SONIC_DPKG_DEBS += $(INVENTEC_D7032Q28B_PLATFORM_MODULE) + +INVENTEC_D7054Q28B_PLATFORM_MODULE = platform-modules-d7054q28b_$(INVENTEC_D7054Q28B_PLATFORM_MODULE_VERSION)_amd64.deb +$(INVENTEC_D7054Q28B_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d7054q28b-r0 +$(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D7054Q28B_PLATFORM_MODULE))) + +INVENTEC_D6254QS_PLATFORM_MODULE = platform-modules-d6254qs_$(INVENTEC_D6254QS_PLATFORM_MODULE_VERSION)_amd64.deb +$(INVENTEC_D6254QS_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d6254qs-r0 +$(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D6254QS_PLATFORM_MODULE))) + +INVENTEC_D6556_PLATFORM_MODULE = platform-modules-d6556_$(INVENTEC_D6556_PLATFORM_MODULE_VERSION)_amd64.deb +$(INVENTEC_D6556_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d6556-r0 +$(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D6556_PLATFORM_MODULE))) + +INVENTEC_D6356_PLATFORM_MODULE = platform-modules-d6356_$(INVENTEC_D6356_PLATFORM_MODULE_VERSION)_amd64.deb +$(INVENTEC_D6356_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d6356-r0 +$(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D6356_PLATFORM_MODULE))) + +INVENTEC_D6356J_PLATFORM_MODULE = platform-modules-d6356j_$(INVENTEC_D6356J_PLATFORM_MODULE_VERSION)_amd64.deb +$(INVENTEC_D6356J_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d6356j-r0 +$(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D6356J_PLATFORM_MODULE))) + +INVENTEC_D7264Q28B_PLATFORM_MODULE = platform-modules-d7264q28b_$(INVENTEC_D7264Q28B_PLATFORM_MODULE_VERSION)_amd64.deb +$(INVENTEC_D7264Q28B_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d7264q28b-r0 +$(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D7264Q28B_PLATFORM_MODULE))) + +INVENTEC_D7264_PLATFORM_MODULE = platform-modules-d7264_$(INVENTEC_D7264_PLATFORM_MODULE_VERSION)_amd64.deb +$(INVENTEC_D7264_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d7264-r0 +$(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D7264_PLATFORM_MODULE))) + +SONIC_STRETCH_DEBS += $(INVENTEC_D7032Q28B_PLATFORM_MODULE) diff --git a/platform/broadcom/platform-modules-juniper.mk b/platform/broadcom/platform-modules-juniper.mk new file mode 100755 index 00000000000..083dabda6d9 --- /dev/null +++ b/platform/broadcom/platform-modules-juniper.mk @@ -0,0 +1,13 @@ +# Juniper Platform modules + +JUNIPER_QFX5210_PLATFORM_MODULE_VERSION = 1.1 + +export JUNIPER_QFX5210_PLATFORM_MODULE_VERSION + +JUNIPER_QFX5210_PLATFORM_MODULE = sonic-platform-juniper-qfx5210_$(JUNIPER_QFX5210_PLATFORM_MODULE_VERSION)_amd64.deb +$(JUNIPER_QFX5210_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-juniper +$(JUNIPER_QFX5210_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(JUNIPER_QFX5210_PLATFORM_MODULE)_PLATFORM = x86_64-juniper_qfx5210-r0 +SONIC_DPKG_DEBS += $(JUNIPER_QFX5210_PLATFORM_MODULE) + +SONIC_STRETCH_DEBS += $(JUNIPER_QFX5210_PLATFORM_MODULE) diff --git a/platform/broadcom/platform-modules-mitac.mk b/platform/broadcom/platform-modules-mitac.mk new file mode 100644 index 00000000000..6e7e05bf6c5 --- /dev/null +++ b/platform/broadcom/platform-modules-mitac.mk @@ -0,0 +1,13 @@ +# MiTAC Platform modules + +MITAC_LY1200_32X_PLATFORM_MODULE_VERSION = 1.0 + +export MITAC_LY1200_32X_PLATFORM_MODULE_VERSION + +MITAC_LY1200_32X_PLATFORM_MODULE = sonic-platform-mitac-ly1200-32x_$(MITAC_LY1200_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(MITAC_LY1200_32X_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-mitac +$(MITAC_LY1200_32X_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(MITAC_LY1200_32X_PLATFORM_MODULE)_PLATFORM = x86_64-mitac_ly1200_b32h0_c3-r0 +SONIC_DPKG_DEBS += $(MITAC_LY1200_32X_PLATFORM_MODULE) + +SONIC_STRETCH_DEBS += $(MITAC_LY1200_32X_PLATFORM_MODULE) diff --git a/platform/broadcom/platform-modules-quanta.mk b/platform/broadcom/platform-modules-quanta.mk new file mode 100644 index 00000000000..456af3019e3 --- /dev/null +++ b/platform/broadcom/platform-modules-quanta.mk @@ -0,0 +1,37 @@ +# Quanta Platform modules + +QUANTA_IX1B_32X_PLATFORM_MODULE_VERSION = 1.0 +QUANTA_IX7_32X_PLATFORM_MODULE_VERSION = 1.0 +QUANTA_IX8_56X_PLATFORM_MODULE_VERSION = 1.0 +QUANTA_IX8C_56X_PLATFORM_MODULE_VERSION = 1.0 +QUANTA_IX9_32X_PLATFORM_MODULE_VERSION = 1.0 + +export QUANTA_IX1B_32X_PLATFORM_MODULE_VERSION +export QUANTA_IX7_32X_PLATFORM_MODULE_VERSION +export QUANTA_IX8_56X_PLATFORM_MODULE_VERSION +export QUANTA_IX8C_56X_PLATFORM_MODULE_VERSION +export QUANTA_IX9_32X_PLATFORM_MODULE_VERSION + +QUANTA_IX1B_32X_PLATFORM_MODULE = sonic-platform-quanta-ix1b-32x_$(QUANTA_IX1B_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(QUANTA_IX1B_32X_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-quanta +$(QUANTA_IX1B_32X_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(QUANTA_IX1B_32X_PLATFORM_MODULE)_PLATFORM = x86_64-quanta_ix1b_rglbmc-r0 +SONIC_DPKG_DEBS += $(QUANTA_IX1B_32X_PLATFORM_MODULE) + +QUANTA_IX7_32X_PLATFORM_MODULE = sonic-platform-quanta-ix7-32x_$(QUANTA_IX7_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(QUANTA_IX7_32X_PLATFORM_MODULE)_PLATFORM = x86_64-quanta_ix7_rglbmc-r0 +$(eval $(call add_extra_package,$(QUANTA_IX1B_32X_PLATFORM_MODULE),$(QUANTA_IX7_32X_PLATFORM_MODULE))) + +QUANTA_IX8_56X_PLATFORM_MODULE = sonic-platform-quanta-ix8-56x_$(QUANTA_IX8_56X_PLATFORM_MODULE_VERSION)_amd64.deb +$(QUANTA_IX8_56X_PLATFORM_MODULE)_PLATFORM = x86_64-quanta_ix8_rglbmc-r0 +$(eval $(call add_extra_package,$(QUANTA_IX1B_32X_PLATFORM_MODULE),$(QUANTA_IX8_56X_PLATFORM_MODULE))) + +QUANTA_IX8C_56X_PLATFORM_MODULE = sonic-platform-quanta-ix8c-56x_$(QUANTA_IX8C_56X_PLATFORM_MODULE_VERSION)_amd64.deb +$(QUANTA_IX8C_56X_PLATFORM_MODULE)_PLATFORM = x86_64-quanta_ix8c_bwde-r0 +$(eval $(call add_extra_package,$(QUANTA_IX1B_32X_PLATFORM_MODULE),$(QUANTA_IX8C_56X_PLATFORM_MODULE))) + +QUANTA_IX9_32X_PLATFORM_MODULE = sonic-platform-quanta-ix9-32x_$(QUANTA_IX9_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(QUANTA_IX9_32X_PLATFORM_MODULE)_PLATFORM = x86_64-quanta_ix9_bwde-r0 +$(eval $(call add_extra_package,$(QUANTA_IX1B_32X_PLATFORM_MODULE),$(QUANTA_IX9_32X_PLATFORM_MODULE))) + +SONIC_STRETCH_DEBS += $(QUANTA_IX1B_32X_PLATFORM_MODULE) diff --git a/platform/broadcom/platform.conf b/platform/broadcom/platform.conf new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/raw-image.mk b/platform/broadcom/raw-image.mk new file mode 100644 index 00000000000..15534e89393 --- /dev/null +++ b/platform/broadcom/raw-image.mk @@ -0,0 +1,10 @@ +# sonic broadcom raw image installer + +SONIC_RAW_IMAGE = sonic-broadcom.raw +$(SONIC_RAW_IMAGE)_MACHINE = broadcom +$(SONIC_RAW_IMAGE)_IMAGE_TYPE = raw +$(SONIC_RAW_IMAGE)_INSTALLS += $(BRCM_OPENNSL_KERNEL) +$(SONIC_RAW_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_RAW_IMAGE)_LAZY_INSTALLS += $($(SONIC_ONE_IMAGE)_LAZY_INSTALLS) +$(SONIC_RAW_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_IMAGES) +SONIC_INSTALLERS += $(SONIC_RAW_IMAGE) diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk new file mode 100644 index 00000000000..8dd7b2c8cbb --- /dev/null +++ b/platform/broadcom/rules.mk @@ -0,0 +1,42 @@ +include $(PLATFORM_PATH)/sai-modules.mk +include $(PLATFORM_PATH)/sai.mk +include $(PLATFORM_PATH)/platform-modules-dell.mk +include $(PLATFORM_PATH)/platform-modules-arista.mk +include $(PLATFORM_PATH)/platform-modules-ingrasys.mk +include $(PLATFORM_PATH)/platform-modules-accton.mk +include $(PLATFORM_PATH)/platform-modules-alphanetworks.mk +include $(PLATFORM_PATH)/platform-modules-inventec.mk +include $(PLATFORM_PATH)/platform-modules-cel.mk +include $(PLATFORM_PATH)/platform-modules-delta.mk +include $(PLATFORM_PATH)/platform-modules-quanta.mk +#include $(PLATFORM_PATH)/platform-modules-mitac.mk +include $(PLATFORM_PATH)/platform-modules-juniper.mk +include $(PLATFORM_PATH)/platform-modules-brcm-xlr-gts.mk +include $(PLATFORM_PATH)/docker-syncd-brcm.mk +include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.mk +include $(PLATFORM_PATH)/docker-saiserver-brcm.mk +include $(PLATFORM_PATH)/one-image.mk +include $(PLATFORM_PATH)/raw-image.mk +include $(PLATFORM_PATH)/one-aboot.mk +include $(PLATFORM_PATH)/libsaithrift-dev.mk +include $(PLATFORM_PATH)/docker-ptf-brcm.mk + +BCMCMD = bcmcmd +$(BCMCMD)_URL = "https://sonicstorage.blob.core.windows.net/packages/20190307/bcmcmd?sv=2015-04-05&sr=b&sig=sUdbU7oVbh5exbXXHVL5TDFBTWDDBASHeJ8Cp0B0TIc%3D&se=2038-05-06T22%3A34%3A19Z&sp=r" + +DSSERVE = dsserve +$(DSSERVE)_URL = "https://sonicstorage.blob.core.windows.net/packages/20190307/dsserve?sv=2015-04-05&sr=b&sig=lk7BH3DtW%2F5ehc0Rkqfga%2BUCABI0UzQmDamBsZH9K6w%3D&se=2038-05-06T22%3A34%3A45Z&sp=r" + +SONIC_ONLINE_FILES += $(BCMCMD) $(DSSERVE) + +SONIC_ALL += $(SONIC_ONE_IMAGE) $(SONIC_ONE_ABOOT_IMAGE) \ + $(DOCKER_FPM) + +# Inject brcm sai into sairedis +$(LIBSAIREDIS)_DEPENDS += $(BRCM_SAI) $(BRCM_SAI_DEV) +ifeq ($(ENABLE_SYNCD_RPC),y) +$(LIBSAIREDIS)_DEPENDS += $(LIBSAITHRIFT_DEV) +endif + +# Runtime dependency on brcm sai is set only for syncd +$(SYNCD)_RDEPENDS += $(BRCM_SAI) diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk new file mode 100644 index 00000000000..9797fc02d50 --- /dev/null +++ b/platform/broadcom/sai-modules.mk @@ -0,0 +1,11 @@ +# Broadcom SAI modules + +KVERSION = 4.9.0-9-2-amd64 +BRCM_OPENNSL_KERNEL_VERSION = 3.4.1.11-1 + +BRCM_OPENNSL_KERNEL = opennsl-modules_$(BRCM_OPENNSL_KERNEL_VERSION)_amd64.deb +$(BRCM_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-invsai +$(BRCM_OPENNSL_KERNEL)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +SONIC_DPKG_DEBS += $(BRCM_OPENNSL_KERNEL) + +SONIC_STRETCH_DEBS += $(BRCM_OPENNSL_KERNEL) diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk new file mode 100644 index 00000000000..61a79e9b11b --- /dev/null +++ b/platform/broadcom/sai.mk @@ -0,0 +1,12 @@ +BRCM_SAI_VERSION = 4.1.1.7-1 + +export BRCM_SAI_VERSION + +BRCM_SAI = libsaibcm_$(BRCM_SAI_VERSION)_amd64.deb +$(BRCM_SAI)_PATH = files/broadcom-binary + +BRCM_SAI_DEV = libsaibcm-dev_$(BRCM_SAI_VERSION)_amd64.deb +$(BRCM_SAI_DEV)_PATH = files/broadcom-binary + +SONIC_COPY_DEBS += $(BRCM_SAI) $(BRCM_SAI_DEV) +$(BRCM_SAI_DEV)_DEPENDS += $(BRCM_SAI) \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules-invsai/.gitignore b/platform/broadcom/saibcm-modules-invsai/.gitignore new file mode 100644 index 00000000000..338005f50ce --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/.gitignore @@ -0,0 +1,4 @@ +*.debhelper.log +*.debhelper +*.substvars +*.ko diff --git a/platform/broadcom/saibcm-modules-invsai/debian/changelog b/platform/broadcom/saibcm-modules-invsai/debian/changelog new file mode 100644 index 00000000000..5ea7b289ee6 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/debian/changelog @@ -0,0 +1,48 @@ +opennsl (3.4.1.11-1) unstable; urgency=medium + + * Port Broadcom SAI 3.4.1.11 + * Cherry-pick change from master branch, 3.4.1.11-1 + + -- Ying Xie Fri, 05 Jan 2018 23:21:47 +0000 + +opennsl (3.4.1.10-1) unstable; urgency=medium + + * Upgrade to 3.4.1.10-1 + + -- Ying Xie Tue, 19 Dec 2017 21:33:48 +0000 + +opennsl (3.4.1.9-1) unstable; urgency=medium + + * Upgrade to 3.4.1.9-1 + + -- Ying Xie Thu, 14 Dec 2017 22:04:11 +0000 + +opennsl (3.4.1.7-2) unstable; urgency=medium + + * Add Arista 7260cx3 Rev2 hardware support + + -- Ying Xie Mon, 27 Nov 2017 18:13:50 +0000 + +opennsl (3.4.1.7-1) unstable; urgency=medium + + * Importing opennsl 3.4.1.7 + + -- Ying Xie Mon, 23 Oct 2017 23:47:25 +0000 + +opennsl (3.4.1.5-2) unstable; urgency=medium + + * Importing TD2 changes from opennsl 3.2.2.2 + + -- Ying Xie Tue, 26 Sep 2017 01:28:44 +0000 + +opennsl (3.4.1.5-1) unstable; urgency=medium + + * Importing opennsl 3.4.1.5 + + -- Ying Xie Wed, 20 Sep 2017 16:42:12 +0000 + +opennsl (3.4.1.3-1) unstable; urgency=low + + * Initial release + + -- Guohan Lu Fri, 17 Jul 2015 04:46:01 -0700 diff --git a/platform/broadcom/saibcm-modules-invsai/debian/compat b/platform/broadcom/saibcm-modules-invsai/debian/compat new file mode 100644 index 00000000000..45a4fb75db8 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/debian/compat @@ -0,0 +1 @@ +8 diff --git a/platform/broadcom/saibcm-modules-invsai/debian/control b/platform/broadcom/saibcm-modules-invsai/debian/control new file mode 100644 index 00000000000..75b77c8a2f0 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/debian/control @@ -0,0 +1,14 @@ +Source: opennsl +Section: main +Priority: extra +Maintainer: Guohan Lu +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 +#Vcs-Git: git://git.debian.org/collab-maint/bcmsdk.git +#Vcs-Browser: http://git.debian.org/?p=collab-maint/bcmsdk.git;a=summary + +Package: opennsl-modules +Architecture: amd64 +Section: main +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for broadcom SAI diff --git a/platform/broadcom/saibcm-modules-invsai/debian/opennsl-modules.dirs b/platform/broadcom/saibcm-modules-invsai/debian/opennsl-modules.dirs new file mode 100644 index 00000000000..38af58a5c5e --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/debian/opennsl-modules.dirs @@ -0,0 +1 @@ +lib/modules/4.9.0-9-2-amd64/extra diff --git a/platform/broadcom/saibcm-modules-invsai/debian/opennsl-modules.init b/platform/broadcom/saibcm-modules-invsai/debian/opennsl-modules.init new file mode 100755 index 00000000000..1aaa91bb2d8 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/debian/opennsl-modules.init @@ -0,0 +1,78 @@ +#!/bin/bash +# This script load/unload opennsl kernel modules + +### BEGIN INIT INFO +# Provides: load-opennsl-modules +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Load OpenNSL kernel modules +### END INIT INFO + +function create_devices() +{ + rm -f /dev/linux-knet-cb + rm -f /dev/linux-bcm-knet + rm -f /dev/linux-bcm-bde + rm -f /dev/linux-kernel-bde + + mknod /dev/linux-knet-cb c 121 0 + mknod /dev/linux-bcm-knet c 122 0 + mknod /dev/linux-bcm-bde c 126 0 + mknod /dev/linux-kernel-bde c 127 0 +} + +# linux-kernel-bde debug=4 ==> Verbose level debug +# dma_debug=1 ==> Enable DMA debug +# linux-bcm-knet debug=0x5020 ==> Enable KNET Warning(0x1000), +# Events(0x20) and Instance(0x4000) +# level logs +function load_kernel_modules() +{ + modprobe linux-kernel-bde dmasize=32M maxpayload=128 debug=4 dma_debug=1 + modprobe linux-user-bde + modprobe linux-bcm-knet use_rx_skb=1 rx_buffer_size=9238 debug=0x5020 + modprobe linux-knet-cb +} + +function remove_kernel_modules() +{ + rmmod linux-knet-cb + rmmod linux-bcm-knet + rmmod linux-user-bde + rmmod linux-kernel-bde +} + +case "$1" in +start) + echo -n "Load OpenNSL kernel modules... " + + create_devices + load_kernel_modules + + echo "done." + ;; + +stop) + echo -n "Unload OpenNSL kernel modules... " + + remove_kernel_modules + + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/opennsl-modules.init {start|stop}" + exit 1 + ;; +esac + +exit 0 + diff --git a/platform/broadcom/saibcm-modules-invsai/debian/opennsl-modules.install b/platform/broadcom/saibcm-modules-invsai/debian/opennsl-modules.install new file mode 100644 index 00000000000..11b100d37f3 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/debian/opennsl-modules.install @@ -0,0 +1,5 @@ +systems/linux/user/x86-smp_generic_64-2_6/linux-bcm-knet.ko lib/modules/4.9.0-9-2-amd64/extra +systems/linux/user/x86-smp_generic_64-2_6/linux-kernel-bde.ko lib/modules/4.9.0-9-2-amd64/extra +systems/linux/user/x86-smp_generic_64-2_6/linux-user-bde.ko lib/modules/4.9.0-9-2-amd64/extra +systems/linux/user/x86-smp_generic_64-2_6/linux-knet-cb.ko lib/modules/4.9.0-9-2-amd64/extra +systemd/opennsl-modules.service lib/systemd/system diff --git a/platform/broadcom/saibcm-modules-invsai/debian/rules b/platform/broadcom/saibcm-modules-invsai/debian/rules new file mode 100755 index 00000000000..33abe645d44 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/debian/rules @@ -0,0 +1,183 @@ +#!/usr/bin/make -f +# -*- makefile -*- +# Sample debian/rules that uses debhelper. +# This file was originally written by Joey Hess and Craig Small. +# As a special exception, when this file is copied by dh-make into a +# dh-make output file, you may use that output file without restriction. +# This special exception was added by Craig Small in version 0.37 of dh-make. +# +# This version is for a hypothetical package that can build a kernel modules +# architecture-dependant package via make-kpkg, as well as an +# architecture-independent module source package, and other packages +# either dep/indep for things like common files or userspace components +# needed for the kernel modules. + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + + + + +# some default definitions, important! +# +# Name of the source package +psource:=opennsl-source + +# The short upstream name, used for the module source directory +sname:=opennsl + +### KERNEL SETUP +### Setup the stuff needed for making kernel module packages +### taken from /usr/share/kernel-package/sample.module.rules + +# prefix of the target package name +PACKAGE=opennsl-modules +# modifieable for experiments or debugging m-a +MA_DIR ?= /usr/share/modass +# load generic variable handling +-include $(MA_DIR)/include/generic.make +# load default rules, including kdist, kdist_image, ... +-include $(MA_DIR)/include/common-rules.make + + + +# module assistant calculates all needed things for us and sets +# following variables: +# KSRC (kernel source directory), KVERS (kernel version string), KDREV +# (revision of the Debian kernel-image package), CC (the correct +# compiler), VERSION (the final package version string), PKGNAME (full +# package name with KVERS included), DEB_DESTDIR (path to store DEBs) + +# The kdist_config target is called by make-kpkg modules_config and +# by kdist* rules by dependency. It should configure the module so it is +# ready for compilation (mostly useful for calling configure). +# prep-deb-files from module-assistant creates the neccessary debian/ files +kdist_config: prep-deb-files + +# the kdist_clean target is called by make-kpkg modules_clean and from +# kdist* rules. It is responsible for cleaning up any changes that have +# been made by the other kdist_commands (except for the .deb files created) +kdist_clean: clean + dh_testdir + dh_clean + SDK=$(realpath .) LINUX_UAPI_SPLIT=1 DEBIAN_LINUX_HEADER=1 BUILD_KNET_CB=1 KERNDIR=/usr/src/linux-headers-4.9.0-9-2-amd64 KERNEL_SRC=/usr/src/linux-headers-4.9.0-9-2-amd64 $(MAKE) -C systems/linux/user/x86-smp_generic_64-2_6 clean +# rm -f driver/*.o driver/*.ko +# +### end KERNEL SETUP + +configure: configure-stamp +configure-stamp: + dh_testdir + # Add here commands to configure the package. + + touch configure-stamp + + +build-arch: configure-stamp build-arch-stamp +build-arch-stamp: + dh_testdir + + # Add here command to compile/build the package. + SDK=$(realpath .) LINUX_UAPI_SPLIT=1 DEBIAN_LINUX_HEADER=1 BUILD_KNET_CB=1 KERNDIR=/usr/src/linux-headers-4.9.0-9-2-amd64 KERNEL_SRC=/usr/src/linux-headers-4.9.0-9-2-amd64 $(MAKE) -C systems/linux/user/x86-smp_generic_64-2_6 + + touch $@ + +#k = $(shell echo $(KVERS) | grep -q ^2.6 && echo k) + +build-indep: configure-stamp build-indep-stamp +build-indep-stamp: + dh_testdir + + # Add here command to compile/build the arch indep package. + # It's ok not to do anything here, if you don't need to build + # anything for this package. + #docbook-to-man debian/opennsl.sgml > opennsl.1 + + touch $@ + +build: build-arch + +clean: + dh_testdir + #dh_testroot + rm -f build-arch-stamp build-indep-stamp configure-stamp + + # Add here commands to clean up after the build process. + SDK=$(realpath .) LINUX_UAPI_SPLIT=1 DEBIAN_LINUX_HEADER=1 BUILD_KNET_CB=1 KERNDIR=/usr/src/linux-headers-4.9.0-9-2-amd64 KERNEL_SRC=/usr/src/linux-headers-4.9.0-9-2-amd64 $(MAKE) -C systems/linux/user/x86-smp_generic_64-2_6 clean + + dh_clean + +install: DH_OPTIONS= +install: build + dh_testdir + dh_testroot + dh_prep + dh_installdirs + dh_install + +# Build architecture-independent files here. +# Pass -i to all debhelper commands in this target to reduce clutter. +binary-indep: build install + dh_testdir -i + dh_testroot -i + dh_installchangelogs -i + dh_installdocs -i + dh_installexamples -i +# dh_install -i +# dh_installmenu -i +# dh_installdebconf -i +# dh_installlogrotate -i +# dh_installemacsen -i +# dh_installpam -i +# dh_installmime -i +# dh_installinit -i +# dh_installcron -i +# dh_installinfo -i + dh_installman -i + dh_link -i + dh_compress -i + dh_fixperms -i + dh_installdeb -i +# dh_perl -i +# dh_makeshlibs -i + dh_installdeb -i + dh_shlibdeps -i + dh_gencontrol -i + dh_md5sums -i + dh_builddeb -i + +# Build architecture-dependent files here. +binary-arch: build install + dh_testdir -s + dh_testroot -s +# dh_installdebconf -s + + dh_installdocs -s + dh_installexamples -s + dh_installmenu -s +# dh_installlogrotate -s +# dh_installemacsen -s +# dh_installpam -s +# dh_installmime -s + dh_installmodules -s + dh_systemd_enable -s + dh_installinit -s + dh_systemd_start -s + dh_installcron -s +# dh_installman -s + dh_installinfo -s + dh_installchangelogs -s + dh_strip -s + dh_link -s + dh_compress -s + dh_fixperms -s + dh_makeshlibs -s + dh_installdeb -s +# dh_perl -s + dh_shlibdeps -s + dh_gencontrol -s + dh_md5sums -s + dh_builddeb -s + +binary: binary-indep binary-arch +.PHONY: build clean binary-indep binary-arch binary install configure binary-modules kdist kdist_configure kdist_image kdist_clean diff --git a/platform/broadcom/saibcm-modules-invsai/include/ibde.h b/platform/broadcom/saibcm-modules-invsai/include/ibde.h new file mode 100644 index 00000000000..5b68f147bcd --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/include/ibde.h @@ -0,0 +1,157 @@ +/* + * $Id: ibde.h,v 1.27 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + */ + +#ifndef __IBDE_H__ +#define __IBDE_H__ + +#include + +/* + * Represents a collection of devices + */ + +typedef struct ibde_dev_s { + uint16 device; + uint8 rev; + sal_vaddr_t base_address; + sal_vaddr_t base_address1; + sal_vaddr_t base_address2; +} ibde_dev_t; + + +typedef struct ibde_s { + + const char *(*name)(void); + + /* Returns the number of devices available */ + /* Each device is is accessed through a handle */ + /* Handles are assumed to index the array of devices */ + + /* Support SWITCH or ETHERNET or CPU devices */ + int (*num_devices)(int type); +#define BDE_ALL_DEVICES 0 +#define BDE_SWITCH_DEVICES 1 +#define BDE_ETHER_DEVICES 2 +#define BDE_CPU_DEVICES 3 + + const ibde_dev_t *(*get_dev)(int d); + + /* + * Get types of underlaying devices. + * A combination of bus type and functional type is returned. + * In case of bus type, support PCI and SPI device types. + * In case of functional type, specify if underlaying device is + * a switching or ethernet device. + */ + uint32 (*get_dev_type)(int d); +#define BDE_PCI_DEV_TYPE SAL_PCI_DEV_TYPE /* PCI device */ +#define BDE_SPI_DEV_TYPE SAL_SPI_DEV_TYPE /* SPI device */ +#define BDE_EB_DEV_TYPE SAL_EB_DEV_TYPE /* EB device */ +#define BDE_ICS_DEV_TYPE SAL_ICS_DEV_TYPE /* ICS device */ +#define BDE_MII_DEV_TYPE SAL_MII_DEV_TYPE /* MII device */ +#define BDE_I2C_DEV_TYPE SAL_I2C_DEV_TYPE /* I2C device */ +#define BDE_AXI_DEV_TYPE SAL_AXI_DEV_TYPE /* AXI device */ +#define BDE_EMMI_DEV_TYPE SAL_EMMI_DEV_TYPE /* EMMI device */ +#define BDE_DEV_BUS_ALT SAL_DEV_BUS_ALT /* Alternate Access */ +#define BDE_DEV_BUS_MSI SAL_DEV_BUS_MSI /* Message-signaled interrupts */ + +#define BDE_DEV_BUS_TYPE_MASK SAL_DEV_BUS_TYPE_MASK + +#define BDE_SWITCH_DEV_TYPE SAL_SWITCH_DEV_TYPE /* Switch device */ +#define BDE_ETHER_DEV_TYPE SAL_ETHER_DEV_TYPE /* Ethernet device */ +#define BDE_CPU_DEV_TYPE SAL_CPU_DEV_TYPE /* CPU device */ + +#define BDE_BYTE_SWAP 0x01000000 /* SW byte swap */ +#define BDE_NO_IPROC 0x02000000 /* Device uses two BARs, but is not iProc */ + +#define BDE_8MB_REG_SPACE 0x10000000 /* 8MB sized CMIC BAR */ +#define BDE_256K_REG_SPACE 0x20000000 /* Map 256K (v 64K) */ +#define BDE_128K_REG_SPACE 0x40000000 /* Map 128K (v 64K) */ +#define BDE_320K_REG_SPACE 0x80000000 /* Map 256K+64K */ + +/* Bus supports only 16bit reads */ +#define BDE_DEV_BUS_RD_16BIT SAL_DEV_BUS_RD_16BIT + +/* Bus supports only 16bit writes */ +#define BDE_DEV_BUS_WR_16BIT SAL_DEV_BUS_WR_16BIT + +/* Backward compatibility */ +#define BDE_ET_DEV_TYPE BDE_MII_DEV_TYPE + +#define BDE_DEV_MEM_MAPPED(_d) \ + ((_d) & (BDE_PCI_DEV_TYPE | BDE_ICS_DEV_TYPE | BDE_EB_DEV_TYPE |\ + BDE_EMMI_DEV_TYPE | BDE_AXI_DEV_TYPE)) + + /* + * PCI Bus Access + */ + uint32 (*pci_conf_read)(int d, uint32 addr); + int (*pci_conf_write)(int d, uint32 addr, uint32 data); + void (*pci_bus_features)(int d, int *be_pio, int *be_packet, + int *be_other); + + uint32 (*read)(int d, uint32 addr); + int (*write)(int d, uint32 addr, uint32 data); + + uint32* (*salloc)(int d, int size, const char *name); + void (*sfree)(int d, void *ptr); + int (*sflush)(int d, void *addr, int length); + int (*sinval)(int d, void *addr, int length); + + int (*interrupt_connect)(int d, void (*)(void*), void *data); + int (*interrupt_disconnect)(int d); + + sal_paddr_t (*l2p)(int d, void *laddr); + void* (*p2l)(int d, sal_paddr_t paddr); + + /* + * SPI Access via SMP + */ + int (*spi_read)(int d, uint32 addr, uint8 *buf, int len); + int (*spi_write)(int d, uint32 addr, uint8 *buf, int len); + /* Special SPI access addresses */ +#define BDE_DEV_OP_EMMI_INIT SAL_DEV_OP_EMMI_INIT + + /* + * iProc register access + */ + uint32 (*iproc_read)(int d, uint32 addr); + int (*iproc_write)(int d, uint32 addr, uint32 data); + + /* + * Shared memory access + */ + uint32 (*shmem_read)(int dev, uint32 addr, uint8 *buf, uint32 len); + void (*shmem_write)(int dev, uint32 addr, uint8 *buf, uint32 len); + sal_vaddr_t (*shmem_map)(int dev, uint32 addr, uint32 size); + + /* + * cmic + */ + int (*get_cmic_ver)(int d, uint32 *ver); + + /* + * I2C operations on the Device, assuming it is connected by I2C to the CPU. + */ + /* Read from the internal device Address space using I2C */ + int (*i2c_device_read)( + int dev, /* The device ID to access */ + uint32 addr, /* The address to access in the internal device address space */ + uint32 *value);/* the value to be read. */ + /* Write to the internal device Address space using I2C */ + int (*i2c_device_write)( + int dev, /* The device ID to access */ + uint32 addr, /* The address to access in the internal device address space */ + uint32 value); /* the value to be written. */ + +} ibde_t; + + +/* System BDE */ +extern ibde_t *bde; + + +#endif /* __IBDE_H__ */ diff --git a/platform/broadcom/saibcm-modules-invsai/include/kcom.h b/platform/broadcom/saibcm-modules-invsai/include/kcom.h new file mode 100755 index 00000000000..40750af0f19 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/include/kcom.h @@ -0,0 +1,554 @@ +/* + * $Id: kcom.h,v 1.9 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + * File: kcom.h + * Purpose: User/Kernel message definitions + */ + +#ifndef _KCOM_H +#define _KCOM_H + +#include + +#define KCOM_CHAN_KNET "KCOM_KNET" + +/* + * Message types + */ +#define KCOM_MSG_TYPE_CMD 1 /* Command */ +#define KCOM_MSG_TYPE_RSP 2 /* Command response */ +#define KCOM_MSG_TYPE_EVT 3 /* Unsolicited event */ + +/* + * Message opcodes + */ +#define KCOM_M_NONE 0 /* Should not be used */ +#define KCOM_M_VERSION 1 /* Protocol version */ +#define KCOM_M_STRING 2 /* For debug messages */ +#define KCOM_M_HW_RESET 3 /* H/W not ready */ +#define KCOM_M_HW_INIT 4 /* H/W initialized */ +#define KCOM_M_ETH_HW_CONFIG 5 /* ETH HW config*/ +#define KCOM_M_DETACH 6 /* Detach kernel module */ +#define KCOM_M_REPROBE 7 /* Reprobe device */ +#define KCOM_M_NETIF_CREATE 11 /* Create network interface */ +#define KCOM_M_NETIF_DESTROY 12 /* Destroy network interface */ +#define KCOM_M_NETIF_LIST 13 /* Get list of network interface IDs */ +#define KCOM_M_NETIF_GET 14 /* Get network interface info */ +#define KCOM_M_FILTER_CREATE 21 /* Create Rx filter */ +#define KCOM_M_FILTER_DESTROY 22 /* Destroy Rx filter */ +#define KCOM_M_FILTER_LIST 23 /* Get list of Rx filter IDs */ +#define KCOM_M_FILTER_GET 24 /* Get Rx filter info */ +#define KCOM_M_DMA_INFO 31 /* Tx/Rx DMA info */ +#define KCOM_M_DBGPKT_SET 41 /* Enbale debug packet function */ +#define KCOM_M_DBGPKT_GET 42 /* Get debug packet function info */ +#define KCOM_M_WB_CLEANUP 51 /* Clean up for warmbooting */ + +#define KCOM_VERSION 10 /* Protocol version */ + +/* + * Message status codes + */ +#define KCOM_E_NONE 0 /* No errors */ +#define KCOM_E_PARAM 1 /* Invalid/unsupported parameter */ +#define KCOM_E_RESOURCE 2 /* Out of memory or other resource */ +#define KCOM_E_NOT_FOUND 3 /* Requested object not found */ + +typedef struct kcom_msg_hdr_s { + uint8 type; + uint8 opcode; + uint8 seqno; + uint8 status; + uint8 unit; + uint8 reserved; + uint16 id; +} kcom_msg_hdr_t; + +/* + * Object types + */ + +/* + * System network interface + * + * Network interface types: + * + * KCOM_NETIF_T_VLAN + * Transmits to this interface will go to ingress PIPE of switch + * CPU port using specified VLAN ID. Packet will be switched. + * + * KCOM_NETIF_T_PORT + * Transmits to this interface will go to unmodified to specified + * physical switch port. All switching logic is bypassed. + * + * KCOM_NETIF_T_META + * Transmits to this interface will be done using raw meta data + * as DMA descriptors. Currently used for RCPU mode only. + * + * Network interface flags: + * + * KCOM_NETIF_F_ADD_TAG + * Add VLAN tag to packets sent directly to physical port. + * + * KCOM_NETIF_F_RCPU_ENCAP + * Use RCPU encapsulation for packets that enter and exit this + * interface. + */ +#define KCOM_NETIF_T_VLAN 0 +#define KCOM_NETIF_T_PORT 1 +#define KCOM_NETIF_T_META 2 + +#define KCOM_NETIF_F_ADD_TAG (1U << 0) +#define KCOM_NETIF_F_RCPU_ENCAP (1U << 1) +/* If a netif has this flag, the packet sent to the netif can't be stripped tag or added tag */ +#define KCOM_NETIF_F_KEEP_RX_TAG (1U << 2) + +#define KCOM_NETIF_NAME_MAX 16 + +/* + * Max size of Sand System Headers + * For DNX, Module Header(20B) + PTCH(2B) + ITMH(5B) + * For DPP, PTCH(2B) + ITMH(4B) + */ +#define KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX 27 + +typedef struct kcom_netif_s { + uint16 id; + uint8 type; + uint8 flags; + uint32 cb_user_data; + uint8 port; + uint8 reserved; + uint16 vlan; + uint16 qnum; + uint8 macaddr[6]; + uint8 system_headers[KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX]; + uint8 system_headers_size; + char name[KCOM_NETIF_NAME_MAX]; +} kcom_netif_t; + +/* + * Packet filters + * + * Filters work like software TCAMs where a mask is applied to the + * source data, and the result is then compared to the filter data. + * + * Filters are checked in priority order with the lowest priority + * values being checked first (i.e. 0 is the highest priority). + * + * Filter types: + * + * KCOM_FILTER_T_RX_PKT + * Filter data and mask are applied to the Rx DMA control block + * as well as to the Rx packet contents. + * + * Destination types: + * + * KCOM_DEST_T_NULL + * Packet is dropped. + * + * KCOM_DEST_T_NETIF + * Packet is sent to network interface with ID . + * + * KCOM_DEST_T_API + * Packet is sent to Rx API through queue . + * + * KCOM_DEST_T_CB + * Packet destination is obtained from kernel call-back function. + * + * Filter flags: + * + * KCOM_FILTER_F_ANY_DATA + * When this flags is set the filter will match any packet on + * the associated unit. + * + * KCOM_FILTER_F_STRIP_TAG + * Strip VLAN tag before packet is sent to destination. + * This flag only applies to KCOM_DEST_T_NETIF. + * + */ +#define KCOM_FILTER_BYTES_MAX 256 +#define KCOM_FILTER_WORDS_MAX BYTES2WORDS(KCOM_FILTER_BYTES_MAX) + +#define KCOM_FILTER_T_RX_PKT 1 + +#define KCOM_DEST_T_NULL 0 +#define KCOM_DEST_T_NETIF 1 +#define KCOM_DEST_T_API 2 +#define KCOM_DEST_T_CB 3 + +#define KCOM_FILTER_F_ANY_DATA (1U << 0) +#define KCOM_FILTER_F_STRIP_TAG (1U << 1) + +#define KCOM_FILTER_DESC_MAX 32 + +typedef struct kcom_filter_s { + uint16 id; + uint8 type; + uint8 priority; + char desc[KCOM_FILTER_DESC_MAX]; + uint32 flags; + uint32 cb_user_data; + uint16 dest_type; + uint16 dest_id; + uint16 dest_proto; + uint16 mirror_type; + uint16 mirror_id; + uint16 mirror_proto; + uint16 oob_data_offset; + uint16 oob_data_size; + uint16 pkt_data_offset; + uint16 pkt_data_size; + union { + uint8 b[KCOM_FILTER_BYTES_MAX]; + uint32 w[KCOM_FILTER_WORDS_MAX]; + } data; + union { + uint8 b[KCOM_FILTER_BYTES_MAX]; + uint32 w[KCOM_FILTER_WORDS_MAX]; + } mask; + /** Information to parse Dune system headers */ + uint32 ftmh_lb_key_ext_size; + uint32 ftmh_stacking_ext_size; + uint32 pph_base_size; + uint32 pph_lif_ext_size[8]; + uint8 udh_enable; + uint32 udh_length_type[4]; + /** Mark to match source modid and modport */ + uint8 is_src_modport; + uint8 spa_unit; +} kcom_filter_t; + +/* + * DMA buffer information + * + * Cookie field is reserved use by application (32/64-bit pointer). + * + * For Tx operation the application will submit the start address of + * the Tx DCB chain which is queued for transfer by the kernel module. + * Once DMA is done a DMA event is returned to the application with an + * optional sequence number. + * + * For Rx operation the application will submit the start address of + * the Rx DCB chain which should be use for packet reception by the + * kernel module. Once DMA is done a DMA event is returned to the + * application with an optional sequence number. + * + * Cookie field is reserved use by application (32/64-bit pointer). + * + * Packet info types: + * + * KCOM_DMA_INFO_T_TX_DCB + * Data is physical start address of Tx DCB chain. + * + * KCOM_DMA_INFO_T_RX_DCB + * Data is physical start address of Rx DCB chain. + * + * Packet info flags: + * + * KCOM_DMA_INFO_F_TX_DONE + * This flag is set by the kernel module and means that one or more + * packets have been sent. + * + * KCOM_DMA_INFO_F_RX_DONE + * This flag is set by the kernel module and means that one or more + * Rx buffers contain valid packet data. + */ +#define KCOM_DMA_INFO_T_TX_DCB 1 +#define KCOM_DMA_INFO_T_RX_DCB 2 + +#define KCOM_DMA_INFO_F_TX_DONE (1U << 0) +#define KCOM_DMA_INFO_F_RX_DONE (1U << 1) + +typedef struct kcom_dma_info_s { + uint8 type; + uint8 cnt; + uint16 size; + uint16 chan; + uint16 flags; + union { + uint64 dcb_start; + struct { + uint32 tx; + uint32 rx; + } seqno; + } data; + union { + void *p; + uint8 b[8]; + } cookie; + } kcom_dma_info_t; + +/* Default channel configuration */ +#define KCOM_DMA_TX_CHAN 0 +#define KCOM_DMA_RX_CHAN 1 + + +#define KCOM_ETH_HW_T_RESET 1 +#define KCOM_ETH_HW_T_INIT 2 +#define KCOM_ETH_HW_T_OTHER 3 + +#define KCOM_ETH_HW_C_ALL 0xff + +#define KCOM_ETH_HW_RESET_F_TX (1U << 0) +#define KCOM_ETH_HW_RESET_F_RX (1U << 1) +#define KCOM_ETH_HW_RESET_F_TX_RECLAIM (1U << 2) +#define KCOM_ETH_HW_RESET_F_RX_RECLAIM (1U << 3) + +#define KCOM_ETH_HW_INIT_F_TX (1U << 0) +#define KCOM_ETH_HW_INIT_F_RX (1U << 1) +#define KCOM_ETH_HW_INIT_F_RX_FILL (1U << 2) + +#define KCOM_ETH_HW_OTHER_F_FIFO_LOOPBACK (1U << 0) +#define KCOM_ETH_HW_OTHER_F_INTERRUPT (1U << 1) + +typedef struct kcom_eth_hw_config_s { + uint8 type; + uint8 chan; + uint32 flags; + uint32 value; +} kcom_eth_hw_config_t; + +/* + * Message types + */ + +/* + * Request KCOM interface version of kernel module. + */ +typedef struct kcom_msg_version_s { + kcom_msg_hdr_t hdr; + uint32 version; + uint32 netif_max; + uint32 filter_max; +} kcom_msg_version_t; + +/* + * Send literal string to/from kernel module. + * Mainly for debugging purposes. + */ +#define KCOM_MSG_STRING_MAX 128 + +typedef struct kcom_msg_string_s { + kcom_msg_hdr_t hdr; + uint32 len; + char val[KCOM_MSG_STRING_MAX]; +} kcom_msg_string_t; + +/* + * Indicate that eth hardware is about to be reset. Active + * DMA operations should be aborted and DMA and interrupts + * should be disabled. + */ +/* + * Indicate that eth hardware has been properly initialized + * for DMA operation to commence. + */ +typedef struct kcom_msg_eth_hw_config_s { + kcom_msg_hdr_t hdr; + kcom_eth_hw_config_t config; +} kcom_msg_eth_hw_config_t; + +/* + * Indicate that switch hardware is about to be reset. Active + * DMA operations should be aborted and DMA and interrupts + * should be disabled. + */ +typedef struct kcom_msg_hw_reset_s { + kcom_msg_hdr_t hdr; + uint32 channels; +} kcom_msg_hw_reset_t; + +/* + * Indicate that switch hardware has been properly initialized + * for DMA operation to commence. + */ +typedef struct kcom_msg_hw_init_s { + kcom_msg_hdr_t hdr; + uint8 cmic_type; + uint8 dcb_type; + uint8 dcb_size; + uint8 pkt_hdr_size; + uint32 dma_hi; + uint32 cdma_channels; +} kcom_msg_hw_init_t; + +/* + * Release blocked IOCTL threads and clean up as necessary. + */ +typedef struct kcom_msg_detach_s { + kcom_msg_hdr_t hdr; + uint32 flags; +} kcom_msg_detach_t; + +/* + * Reprobe switch device. + */ +typedef struct kcom_msg_reprobe_s { + kcom_msg_hdr_t hdr; + uint32 flags; +} kcom_msg_reprobe_t; + +/* + * Enable/Disable debugging packet function. + */ +typedef struct kcom_msg_dbg_pkt_set_s { + kcom_msg_hdr_t hdr; + int enable; +} kcom_msg_dbg_pkt_set_t; + +/* + * Get debugging packet function info. + */ +typedef struct kcom_msg_dbg_pkt_get_s { + kcom_msg_hdr_t hdr; + int value; +} kcom_msg_dbg_pkt_get_t; + +/* + * Clean up warmboot-related resources. + */ +typedef struct kcom_msg_wb_cleanup_s { + kcom_msg_hdr_t hdr; + uint32 flags; +} kcom_msg_wb_cleanup_t; + +/* + * Create new system network interface. The network interface will + * be associated with the specified switch unit number. + * The interface id and name will be assigned by the kernel module. + */ +typedef struct kcom_msg_netif_create_s { + kcom_msg_hdr_t hdr; + kcom_netif_t netif; +} kcom_msg_netif_create_t; + +/* + * Destroy system network interface. + */ +typedef struct kcom_msg_netif_destroy_s { + kcom_msg_hdr_t hdr; +} kcom_msg_netif_destroy_t; + +/* + * Get list of currently defined system network interfaces. + */ +#ifndef KCOM_NETIF_MAX +#define KCOM_NETIF_MAX 128 +#endif + +typedef struct kcom_msg_netif_list_s { + kcom_msg_hdr_t hdr; + uint32 ifcnt; + uint16 id[KCOM_NETIF_MAX]; +} kcom_msg_netif_list_t; + +/* + * Get detailed network interface information. + */ +typedef struct kcom_msg_netif_get_s { + kcom_msg_hdr_t hdr; + kcom_netif_t netif; +} kcom_msg_netif_get_t; + +/* + * Create new packet filter. + * The filter id will be assigned by the kernel module. + */ +typedef struct kcom_msg_filter_create_s { + kcom_msg_hdr_t hdr; + kcom_filter_t filter; +} kcom_msg_filter_create_t; + +/* + * Destroy packet filter. + */ +typedef struct kcom_msg_filter_destroy_s { + kcom_msg_hdr_t hdr; +} kcom_msg_filter_destroy_t; + +/* + * Get list of currently defined packet filters. + */ +#ifndef KCOM_FILTER_MAX +/* SAI_FIXUP - Increased the filters to 1024 from 128 */ +#define KCOM_FILTER_MAX 1024 +#endif + +typedef struct kcom_msg_filter_list_s { + kcom_msg_hdr_t hdr; + uint32 fcnt; + uint16 id[KCOM_FILTER_MAX]; +} kcom_msg_filter_list_t; + +/* + * Get detailed packet filter information. + */ +typedef struct kcom_msg_filter_get_s { + kcom_msg_hdr_t hdr; + kcom_filter_t filter; +} kcom_msg_filter_get_t; + +/* + * DMA info + */ +typedef struct kcom_msg_dma_info_s { + kcom_msg_hdr_t hdr; + kcom_dma_info_t dma_info; +} kcom_msg_dma_info_t; + +/* + * All messages (e.g. for generic receive) + */ +typedef union kcom_msg_s { + kcom_msg_hdr_t hdr; + kcom_msg_version_t version; + kcom_msg_string_t string; + kcom_msg_hw_reset_t hw_reset; + kcom_msg_hw_init_t hw_init; + kcom_msg_eth_hw_config_t eth_hw_config; + kcom_msg_detach_t detach; + kcom_msg_reprobe_t reprobe; + kcom_msg_netif_create_t netif_create; + kcom_msg_netif_destroy_t netif_destroy; + kcom_msg_netif_list_t netif_list; + kcom_msg_netif_get_t netif_get; + kcom_msg_filter_create_t filter_create; + kcom_msg_filter_destroy_t filter_destroy; + kcom_msg_filter_list_t filter_list; + kcom_msg_filter_get_t filter_get; + kcom_msg_dma_info_t dma_info; + kcom_msg_dbg_pkt_set_t dbg_pkt_set; + kcom_msg_dbg_pkt_get_t dbg_pkt_get; + kcom_msg_wb_cleanup_t wb_cleanup; +} kcom_msg_t; + +/* + * KCOM communication channel vectors + * + * open + * Open KCOM channel. + * + * close + * Close KCOM channel. + * + * send + * Send KCOM message. If bufsz is non-zero, a synchronous send will be + * performed (if supported) and the function will return the number of + * bytes in the response. + * + * recv + * Receive KCOM message. This function is used t oreceive unsolicited + * messages from the kernel. If synchronous send is not supported, this + * function is also used to retrieve responses to command messages. + */ + +typedef struct kcom_chan_s { + void *(*open)(char *name); + int (*close)(void *handle); + int (*send)(void *handle, void *msg, unsigned int len, unsigned int bufsz); + int (*recv)(void *handle, void *msg, unsigned int bufsz); +} kcom_chan_t; + +#endif /* _KCOM_H */ diff --git a/platform/broadcom/saibcm-modules-invsai/include/sal/core/sync.h b/platform/broadcom/saibcm-modules-invsai/include/sal/core/sync.h new file mode 100755 index 00000000000..734d95b204a --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/include/sal/core/sync.h @@ -0,0 +1,104 @@ +/* + * $Id: sync.h,v 1.9 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + * File: sync.h + * Purpose: SAL thread definitions + * + * Note: the SAL mutex abstraction is required to allow the same mutex + * to be taken recursively by the same thread without deadlock. + */ + +#ifndef _SAL_SYNC_H +#define _SAL_SYNC_H + +typedef struct sal_mutex_s{ + char mutex_opaque_type; +} *sal_mutex_t; + +typedef struct sal_sem_s{ + char sal_opaque_type; +} *sal_sem_t; + +typedef struct sal_spinlock_s { + char spinlock_opaque_type; +} *sal_spinlock_t; + +#define sal_mutex_FOREVER (-1) +#define sal_mutex_NOWAIT 0 + +#define sal_sem_FOREVER (-1) +#define sal_sem_BINARY 1 +#define sal_sem_COUNTING 0 + +extern sal_mutex_t sal_mutex_create(char *desc); +extern void sal_mutex_destroy(sal_mutex_t m); + +/*#define BROADCOM_DEBUG_MUTEX*/ + +#ifndef BROADCOM_DEBUG_MUTEX +extern int sal_mutex_take(sal_mutex_t m, int usec); +extern int sal_mutex_give(sal_mutex_t m); +#endif + +extern sal_sem_t sal_sem_create(char *desc, int binary, int initial_count); +extern void sal_sem_destroy(sal_sem_t b); +extern int sal_sem_take(sal_sem_t b, int usec); +extern int sal_sem_give(sal_sem_t b); +#ifdef BROADCOM_DEBUG +#ifdef INCLUDE_BCM_SAL_PROFILE +extern void +sal_sem_resource_usage_get(unsigned int *sem_curr, unsigned int *sem_max); +extern void +sal_mutex_resource_usage_get(unsigned int *mutex_curr, unsigned int *mutex_max); +#endif +#endif + + + +#ifdef BROADCOM_DEBUG_MUTEX +extern void sal_mutex_dbg_dump(void); + +extern int sal_mutex_take_bcm_debug(sal_mutex_t m, int usec, const char *take_loc, int line); +extern int sal_mutex_give_bcm_debug(sal_mutex_t m, const char *give_loc, int line); + + +#define sal_mutex_take(MUTEX, WAIT_TIME) sal_mutex_take_bcm_debug(MUTEX, WAIT_TIME, __FILE__, __LINE__) +#define sal_mutex_give(MUTEX) sal_mutex_give_bcm_debug(MUTEX, __FILE__ , __LINE__) + + +/* +extern int sal_mutex_take_bcm_debug(sal_mutex_t m, int usec, const char *take_loc); +extern int sal_mutex_give_bcm_debug(sal_mutex_t m, const char *); + + +#define sal_mutex_take(MUTEX, WAIT_TIME) sal_mtx_take_bcm_debug(MUTEX, WAIT_TIME, __FILE__) + +#define sal_mutex_give(MUTEX) sal_mutex_give_bcm_debug(MUTEX, __LINE__ ) +*/ + +#endif + +/* SAL Global Lock - SDK internal use only */ +extern sal_mutex_t sal_global_lock; +int sal_global_lock_init(void); +#define SAL_GLOBAL_LOCK \ + do { \ + if (sal_global_lock) { \ + sal_mutex_take(sal_global_lock, sal_mutex_FOREVER);\ + } \ + } while (0) +#define SAL_GLOBAL_UNLOCK \ + do { \ + if (sal_global_lock) { \ + sal_mutex_give(sal_global_lock);\ + } \ + } while (0) + +extern sal_spinlock_t sal_spinlock_create(char *desc); +extern int sal_spinlock_destroy(sal_spinlock_t lock); +extern int sal_spinlock_lock(sal_spinlock_t lock); +extern int sal_spinlock_unlock(sal_spinlock_t lock); + +#endif /* !_SAL_SYNC_H */ diff --git a/platform/broadcom/saibcm-modules-invsai/include/sal/core/thread.h b/platform/broadcom/saibcm-modules-invsai/include/sal/core/thread.h new file mode 100644 index 00000000000..b7ecb722489 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/include/sal/core/thread.h @@ -0,0 +1,30 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: thread.h,v 1.1 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + */ + +#ifndef _SAL_THREAD_H +#define _SAL_THREAD_H + +#include + +void sal_usleep(uint32 usec); +void sal_udelay(uint32 usec); + +#endif /* !_SAL_THREAD_H */ diff --git a/platform/broadcom/saibcm-modules-invsai/include/sal/types.h b/platform/broadcom/saibcm-modules-invsai/include/sal/types.h new file mode 100644 index 00000000000..b6b40f76293 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/include/sal/types.h @@ -0,0 +1,155 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: types.h,v 1.3 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + * + * File: types.h + * Purpose: SAL type definitions + */ + +#ifndef _SAL_TYPES_H +#define _SAL_TYPES_H + +/* + * Define platform-independent types + */ + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +#ifndef NULL +#define NULL 0 +#endif + +#ifndef DONT_CARE +#define DONT_CARE 0 +#endif + +#define VOL volatile + +/* + * 64-bit type + */ + +#ifdef LONGS_ARE_64BITS + +#define COMPILER_64BIT +#define COMPILER_UINT64 unsigned long +#define u64_H(v) (((uint32 *) &(v))[u64_MSW]) +#define u64_L(v) (((uint32 *) &(v))[u64_LSW]) + +#else /* !LONGS_ARE_64BITS */ + +#define COMPILER_64BIT +#define COMPILER_UINT64 unsigned long long +#define u64_H(v) (((uint32 *) &(v))[u64_MSW]) +#define u64_L(v) (((uint32 *) &(v))[u64_LSW]) + +#endif /* LONGS_ARE_64BITS */ + +/* + * Define unsigned and signed integers with guaranteed sizes. + * Adjust if your compiler uses different sizes for short or int. + */ + +typedef unsigned char uint8; /* 8-bit quantity */ +typedef unsigned short uint16; /* 16-bit quantity */ +typedef unsigned int uint32; /* 32-bit quantity */ +typedef COMPILER_UINT64 uint64; /* 64-bit quantity */ + +typedef signed char int8; /* 8-bit quantity */ +typedef signed short int16; /* 16-bit quantity */ +typedef signed int int32; /* 32-bit quantity */ + +#define BITS2BYTES(x) (((x) + 7) / 8) +#define BITS2WORDS(x) (((x) + 31) / 32) + +#define BYTES2BITS(x) ((x) * 8) +#define BYTES2WORDS(x) (((x) + 3) / 4) + +#define WORDS2BITS(x) ((x) * 32) +#define WORDS2BYTES(x) ((x) * 4) + +#define COUNTOF(ary) ((int) (sizeof (ary) / sizeof ((ary)[0]))) + +typedef uint32 sal_paddr_t; /* Physical address (PCI address) */ + +#ifdef PTRS_ARE_64BITS +typedef uint64 sal_vaddr_t; /* Virtual address (Host address) */ +#define PTR_TO_INT(x) ((uint32)(((sal_vaddr_t)(x))&0xFFFFFFFF)) +#else +typedef uint32 sal_vaddr_t; /* Virtual address (Host address) */ +#define PTR_TO_INT(x) ((uint32)(x)) +#endif + +#define INT_TO_PTR(x) ((void *)((sal_vaddr_t)(x))) + +#define PTR_TO_UINTPTR(x) ((sal_vaddr_t)(x)) +#define UINTPTR_TO_PTR(x) ((void *)(x)) + +typedef union +{ + uint8 u8; + uint16 u16; + uint32 u32; + uint64 u64; + sal_paddr_t paddr; + sal_vaddr_t vaddr; + void *ptr; +} any_t; + +/* Device bus types */ +#define SAL_PCI_DEV_TYPE 0x00001 /* PCI device */ +#define SAL_SPI_DEV_TYPE 0x00002 /* SPI device */ +#define SAL_EB_DEV_TYPE 0x00004 /* EB device */ +#define SAL_ICS_DEV_TYPE 0x00008 /* ICS device */ +#define SAL_MII_DEV_TYPE 0x00010 /* MII device */ +#define SAL_RCPU_DEV_TYPE 0x00020 /* RCPU device */ +#define SAL_I2C_DEV_TYPE 0x00040 /* I2C device */ +#define SAL_AXI_DEV_TYPE 0x00080 /* AXI device */ +#define SAL_EMMI_DEV_TYPE 0x10000 /* EMMI device */ +#define SAL_DEV_BUS_TYPE_MASK 0xf00ff /* Odd for historical reasons */ + +/* Device types */ +#define SAL_SWITCH_DEV_TYPE 0x00100 /* Switch device */ +#define SAL_ETHER_DEV_TYPE 0x00200 /* Ethernet device */ +#define SAL_CPU_DEV_TYPE 0x00400 /* CPU device */ +#define SAL_DEV_TYPE_MASK 0x00f00 + +/* Access types */ +#define SAL_DEV_BUS_RD_16BIT 0x01000 /* 16 bit reads on bus */ +#define SAL_DEV_BUS_WR_16BIT 0x02000 /* 16 bit writes on bus */ +#define SAL_DEV_BUS_ALT 0x04000 /* Alternate access */ +#define SAL_DEV_BUS_MSI 0x08000 /* Message-signaled interrupts */ +#define SAL_DEV_FLAG_MASK 0x0f000 + +/* BDE reserved mask (cannot be used by SAL) */ +#define SAL_DEV_BDE_MASK 0xff000000 + +/* Backward compatibility */ +#define SAL_ET_DEV_TYPE SAL_MII_DEV_TYPE + +/* Special access addresses */ +#define SAL_DEV_OP_EMMI_INIT 0x0fff1000 + +#endif /* !_SAL_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules-invsai/include/sdk_config.h b/platform/broadcom/saibcm-modules-invsai/include/sdk_config.h new file mode 100644 index 00000000000..75dd7f67bce --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/include/sdk_config.h @@ -0,0 +1,30 @@ +/* + * $Id: sdk_config.h,v 1.5 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + * + */ + +#ifndef __SDK_CONFIG_H__ +#define __SDK_CONFIG_H__ + +/* + * Include custom overrides + */ +#ifdef SDK_INCLUDE_CUSTOM_CONFIG +#include +#endif + + +/* + * Memory Barrier operation if required. + * Defaults to nothing. + */ +#ifndef SDK_CONFIG_MEMORY_BARRIER +#define SDK_CONFIG_MEMORY_BARRIER +#endif + + + +#endif /* __SDK_CONFIG_H__ */ diff --git a/platform/broadcom/saibcm-modules-invsai/include/soc/cmic.h b/platform/broadcom/saibcm-modules-invsai/include/soc/cmic.h new file mode 100644 index 00000000000..5bf6130237a --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/include/soc/cmic.h @@ -0,0 +1,37 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: cmic.h,v 1.1 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + * + * File: cmic.h + * Purpose: Maps out structures used for CMIC operations and + * exports routines and constants. + */ + +#ifndef _SOC_CMIC_H +#define _SOC_CMIC_H + +/* IRQ Register (RO) */ +#define CMIC_IRQ_STAT 0x00000144 + +/* IRQ Mask Registers (R/W) */ +#define CMIC_IRQ_MASK 0x00000148 +#define CMIC_IRQ_MASK_1 0x0000006C +#define CMIC_IRQ_MASK_2 0x00000070 + +#endif /* !_SOC_CMIC_H */ diff --git a/platform/broadcom/saibcm-modules-invsai/include/soc/devids.h b/platform/broadcom/saibcm-modules-invsai/include/soc/devids.h new file mode 100644 index 00000000000..8b9fee23129 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/include/soc/devids.h @@ -0,0 +1,2017 @@ +/* + * $Id: devids.h,v 1.309 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + */ + +#ifndef _SOC_DEVIDS_H +#define _SOC_DEVIDS_H + +/* + * Defines PCI device and revision ID for every recognized device. + * All driver routines refer to this ID only. + */ + +#define BROADCOM_VENDOR_ID 0x14e4 + +/* Draco */ +#define BCM5690_DEVICE_ID 0x5690 +#define BCM5690_A0_REV_ID 1 +#define BCM5690_A1_REV_ID 2 +#define BCM5690_A2_REV_ID 3 + +/* Draco without HG (Medusa) */ +#define BCM5691_DEVICE_ID 0x5691 +#define BCM5691_A0_REV_ID 1 +#define BCM5691_A1_REV_ID 2 +#define BCM5691_A2_REV_ID 3 + +/* Draco without L3 */ +#define BCM5692_DEVICE_ID 0x5692 +#define BCM5692_A0_REV_ID 1 +#define BCM5692_A1_REV_ID 2 +#define BCM5692_A2_REV_ID 3 + +/* Draco without HG or L3 */ +#define BCM5693_DEVICE_ID 0x5693 +#define BCM5693_A0_REV_ID 1 +#define BCM5693_A1_REV_ID 2 +#define BCM5693_A2_REV_ID 3 + +/* Draco 1.5 */ +#define BCM5695_DEVICE_ID 0x5695 +#define BCM5695_A0_REV_ID 1 +#define BCM5695_A1_REV_ID 2 +#define BCM5695_B0_REV_ID 0x11 + +/* Draco 1.5 without HG */ +#define BCM5696_DEVICE_ID 0x5696 +#define BCM5696_A0_REV_ID 1 +#define BCM5696_A1_REV_ID 2 +#define BCM5696_B0_REV_ID 0x11 + +/* Draco 1.5 without L3 */ +#define BCM5697_DEVICE_ID 0x5697 +#define BCM5697_A0_REV_ID 1 +#define BCM5697_A1_REV_ID 2 +#define BCM5697_B0_REV_ID 0x11 + +/* Draco 1.5 without HG or L3 */ +#define BCM5698_DEVICE_ID 0x5698 +#define BCM5698_A0_REV_ID 1 +#define BCM5698_A1_REV_ID 2 +#define BCM5698_B0_REV_ID 0x11 + +/* Hercules with 8 ports */ +#define BCM5670_DEVICE_ID 0x5670 +#define BCM5670_A0_REV_ID 1 +#define BCM5670_A1_REV_ID 2 + +/* Hercules with 4 ports */ +#define BCM5671_DEVICE_ID 0x5671 +#define BCM5671_A0_REV_ID 1 +#define BCM5671_A1_REV_ID 2 +#define BCM5671_A2_REV_ID 3 /* Maxxus */ + +/* Hercules 1.5 with 8 ports */ +#define BCM5675_DEVICE_ID 0x5675 +#define BCM5675_A0_REV_ID 1 +#define BCM5675_A1_REV_ID 2 + +/* Hercules 1.5 with 4 ports */ +#define BCM5676_DEVICE_ID 0x5676 +#define BCM5676_A0_REV_ID 1 +#define BCM5676_A1_REV_ID 2 + +/* Lynx */ +#define BCM5673_DEVICE_ID 0x5673 +#define BCM5673_A0_REV_ID 1 +#define BCM5673_A1_REV_ID 2 +#define BCM5673_A2_REV_ID 3 + +/* Lynx 1.5 */ +#define BCM5674_DEVICE_ID 0x5674 +#define BCM5674_A0_REV_ID 1 + +/* Felix */ +#define BCM56100_DEVICE_ID 0xb100 +#define BCM56100_A0_REV_ID 1 +#define BCM56100_A1_REV_ID 2 +#define BCM56101_DEVICE_ID 0xb101 +#define BCM56101_A0_REV_ID 1 +#define BCM56101_A1_REV_ID 2 +#define BCM56102_DEVICE_ID 0xb102 +#define BCM56102_A0_REV_ID 1 +#define BCM56102_A1_REV_ID 2 +#define BCM56105_DEVICE_ID 0xb105 +#define BCM56105_A0_REV_ID 1 +#define BCM56105_A1_REV_ID 2 +#define BCM56106_DEVICE_ID 0xb106 +#define BCM56106_A0_REV_ID 1 +#define BCM56106_A1_REV_ID 2 +#define BCM56107_DEVICE_ID 0xb107 +#define BCM56107_A0_REV_ID 1 +#define BCM56107_A1_REV_ID 2 + +/* Felix 1.5 */ +#define BCM56110_DEVICE_ID 0xb110 +#define BCM56110_A0_REV_ID 1 +#define BCM56111_DEVICE_ID 0xb111 +#define BCM56111_A0_REV_ID 1 +#define BCM56112_DEVICE_ID 0xb112 +#define BCM56112_A0_REV_ID 1 +#define BCM56115_DEVICE_ID 0xb115 +#define BCM56115_A0_REV_ID 1 +#define BCM56116_DEVICE_ID 0xb116 +#define BCM56116_A0_REV_ID 1 +#define BCM56117_DEVICE_ID 0xb117 +#define BCM56117_A0_REV_ID 1 + +/* Helix */ +#define BCM56300_DEVICE_ID 0xb300 +#define BCM56300_A0_REV_ID 1 +#define BCM56300_A1_REV_ID 2 +#define BCM56300_B0_REV_ID 0x11 +#define BCM56300_B1_REV_ID 0x12 +#define BCM56301_DEVICE_ID 0xb301 +#define BCM56301_A0_REV_ID 1 +#define BCM56301_A1_REV_ID 2 +#define BCM56301_B0_REV_ID 0x11 +#define BCM56301_B1_REV_ID 0x12 +#define BCM56302_DEVICE_ID 0xb302 +#define BCM56302_A0_REV_ID 1 +#define BCM56302_A1_REV_ID 2 +#define BCM56302_B0_REV_ID 0x11 +#define BCM56302_B1_REV_ID 0x12 +#define BCM56303_DEVICE_ID 0xb303 +#define BCM56303_A1_REV_ID 2 +#define BCM56303_A0_REV_ID 1 +#define BCM56303_B0_REV_ID 0x11 +#define BCM56303_B1_REV_ID 0x12 +#define BCM56304_DEVICE_ID 0xb304 +#define BCM56304_A0_REV_ID 1 +#define BCM56304_A1_REV_ID 2 +#define BCM56304_B0_REV_ID 0x11 +#define BCM56304_B1_REV_ID 0x12 +#define BCM56404_DEVICE_ID 0xb404 +#define BCM56404_A0_REV_ID 1 +#define BCM56404_A1_REV_ID 2 +#define BCM56305_DEVICE_ID 0xb305 +#define BCM56305_A0_REV_ID 1 +#define BCM56305_A1_REV_ID 2 +#define BCM56305_B0_REV_ID 0x11 +#define BCM56305_B1_REV_ID 0x12 +#define BCM56306_DEVICE_ID 0xb306 +#define BCM56306_A0_REV_ID 1 +#define BCM56306_A1_REV_ID 2 +#define BCM56306_B0_REV_ID 0x11 +#define BCM56306_B1_REV_ID 0x12 +#define BCM56307_DEVICE_ID 0xb307 +#define BCM56307_A0_REV_ID 1 +#define BCM56307_A1_REV_ID 2 +#define BCM56307_B0_REV_ID 0x11 +#define BCM56307_B1_REV_ID 0x12 +#define BCM56308_DEVICE_ID 0xb308 +#define BCM56308_A0_REV_ID 1 +#define BCM56308_A1_REV_ID 2 +#define BCM56308_B0_REV_ID 0x11 +#define BCM56308_B1_REV_ID 0x12 +#define BCM56309_DEVICE_ID 0xb309 +#define BCM56309_A0_REV_ID 1 +#define BCM56309_A1_REV_ID 2 +#define BCM56309_B0_REV_ID 0x11 +#define BCM56309_B1_REV_ID 0x12 + +/* Helix 1.5 */ +#define BCM56310_DEVICE_ID 0xb310 +#define BCM56310_A0_REV_ID 1 +#define BCM56311_DEVICE_ID 0xb311 +#define BCM56311_A0_REV_ID 1 +#define BCM56312_DEVICE_ID 0xb312 +#define BCM56312_A0_REV_ID 1 +#define BCM56313_DEVICE_ID 0xb313 +#define BCM56313_A0_REV_ID 1 +#define BCM56314_DEVICE_ID 0xb314 +#define BCM56314_A0_REV_ID 1 +#define BCM56315_DEVICE_ID 0xb315 +#define BCM56315_A0_REV_ID 1 +#define BCM56316_DEVICE_ID 0xb316 +#define BCM56316_A0_REV_ID 1 +#define BCM56317_DEVICE_ID 0xb317 +#define BCM56317_A0_REV_ID 1 +#define BCM56318_DEVICE_ID 0xb318 +#define BCM56318_A0_REV_ID 1 +#define BCM56319_DEVICE_ID 0xb319 +#define BCM56319_A0_REV_ID 1 + +#ifndef EXCLUDE_BCM56324 +/* Helix 2 */ +#define BCM56322_DEVICE_ID 0xb322 +#define BCM56322_A0_REV_ID 1 +#define BCM56324_DEVICE_ID 0xb324 +#define BCM56324_A0_REV_ID 1 +#endif /* EXCLUDE_BCM56324 */ + +#define BCM53300_DEVICE_ID 0xb006 +#define BCM53300_A0_REV_ID 0x11 +#define BCM53300_A1_REV_ID 0x12 +#define BCM53301_DEVICE_ID 0xb206 +#define BCM53301_A0_REV_ID 0x11 +#define BCM53301_A1_REV_ID 0x12 +#define BCM53302_DEVICE_ID 0xb008 +#define BCM53302_A0_REV_ID 0x11 +#define BCM53302_A1_REV_ID 0x12 + +/* Firebolt */ +#define BCM56500_DEVICE_ID 0xb500 +#define BCM56500_A0_REV_ID 1 +#define BCM56500_A1_REV_ID 2 +#define BCM56500_B0_REV_ID 0x11 +#define BCM56500_B1_REV_ID 0x12 +#define BCM56500_B2_REV_ID 0x13 +#define BCM56501_DEVICE_ID 0xb501 +#define BCM56501_A0_REV_ID 1 +#define BCM56501_A1_REV_ID 2 +#define BCM56501_B0_REV_ID 0x11 +#define BCM56501_B1_REV_ID 0x12 +#define BCM56501_B2_REV_ID 0x13 +#define BCM56502_DEVICE_ID 0xb502 +#define BCM56502_A0_REV_ID 1 +#define BCM56502_A1_REV_ID 2 +#define BCM56502_B0_REV_ID 0x11 +#define BCM56502_B1_REV_ID 0x12 +#define BCM56502_B2_REV_ID 0x13 +#define BCM56503_DEVICE_ID 0xb503 +#define BCM56503_A0_REV_ID 1 +#define BCM56503_A1_REV_ID 2 +#define BCM56503_B0_REV_ID 0x11 +#define BCM56503_B1_REV_ID 0x12 +#define BCM56503_B2_REV_ID 0x13 +#define BCM56504_DEVICE_ID 0xb504 +#define BCM56504_A0_REV_ID 1 +#define BCM56504_A1_REV_ID 2 +#define BCM56504_B0_REV_ID 0x11 +#define BCM56504_B1_REV_ID 0x12 +#define BCM56504_B2_REV_ID 0x13 +#define BCM56505_DEVICE_ID 0xb505 +#define BCM56505_A0_REV_ID 1 +#define BCM56505_A1_REV_ID 2 +#define BCM56505_B0_REV_ID 0x11 +#define BCM56505_B1_REV_ID 0x12 +#define BCM56505_B2_REV_ID 0x13 +#define BCM56506_DEVICE_ID 0xb506 +#define BCM56506_A0_REV_ID 1 +#define BCM56506_A1_REV_ID 2 +#define BCM56506_B0_REV_ID 0x11 +#define BCM56506_B1_REV_ID 0x12 +#define BCM56506_B2_REV_ID 0x13 +#define BCM56507_DEVICE_ID 0xb507 +#define BCM56507_A0_REV_ID 1 +#define BCM56507_A1_REV_ID 2 +#define BCM56507_B0_REV_ID 0x11 +#define BCM56507_B1_REV_ID 0x12 +#define BCM56507_B2_REV_ID 0x13 +#define BCM56508_DEVICE_ID 0xb508 +#define BCM56508_A0_REV_ID 1 +#define BCM56508_A1_REV_ID 2 +#define BCM56508_B0_REV_ID 0x11 +#define BCM56508_B1_REV_ID 0x12 +#define BCM56508_B2_REV_ID 0x13 +#define BCM56509_DEVICE_ID 0xb509 +#define BCM56509_A0_REV_ID 1 +#define BCM56509_A1_REV_ID 2 +#define BCM56509_B0_REV_ID 0x11 +#define BCM56509_B1_REV_ID 0x12 +#define BCM56509_B2_REV_ID 0x13 + +/* Easyrider */ +#define BCM56600_DEVICE_ID 0xb600 +#define BCM56600_A0_REV_ID 1 +#define BCM56600_B0_REV_ID 0x11 +#define BCM56600_C0_REV_ID 0x21 +#define BCM56601_DEVICE_ID 0xb601 +#define BCM56601_A0_REV_ID 1 +#define BCM56601_B0_REV_ID 0x11 +#define BCM56601_C0_REV_ID 0x21 +#define BCM56602_DEVICE_ID 0xb602 +#define BCM56602_A0_REV_ID 1 +#define BCM56602_B0_REV_ID 0x11 +#define BCM56602_C0_REV_ID 0x21 +#define BCM56603_DEVICE_ID 0xb603 +#define BCM56603_A0_REV_ID 1 +#define BCM56603_B0_REV_ID 0x11 +#define BCM56603_C0_REV_ID 0x21 +#define BCM56605_DEVICE_ID 0xb605 +#define BCM56605_A0_REV_ID 1 +#define BCM56605_B0_REV_ID 0x11 +#define BCM56605_C0_REV_ID 0x21 +#define BCM56606_DEVICE_ID 0xb606 +#define BCM56606_A0_REV_ID 1 +#define BCM56606_B0_REV_ID 0x11 +#define BCM56606_C0_REV_ID 0x21 +#define BCM56607_DEVICE_ID 0xb607 +#define BCM56607_A0_REV_ID 1 +#define BCM56607_B0_REV_ID 0x11 +#define BCM56607_C0_REV_ID 0x21 +#define BCM56608_DEVICE_ID 0xb608 +#define BCM56608_A0_REV_ID 1 +#define BCM56608_B0_REV_ID 0x11 +#define BCM56608_C0_REV_ID 0x21 + +/* Goldwing */ +#define BCM56580_DEVICE_ID 0xb580 +#define BCM56580_A0_REV_ID 1 + +/* HUMV */ +#define BCM56700_DEVICE_ID 0xb700 +#define BCM56700_A0_REV_ID 1 +#define BCM56701_DEVICE_ID 0xb701 +#define BCM56701_A0_REV_ID 1 + +/* Bradley */ +#define BCM56800_DEVICE_ID 0xb800 +#define BCM56800_A0_REV_ID 1 +#define BCM56801_DEVICE_ID 0xb801 +#define BCM56801_A0_REV_ID 1 +#define BCM56802_DEVICE_ID 0xb802 +#define BCM56802_A0_REV_ID 1 +#define BCM56803_DEVICE_ID 0xb803 +#define BCM56803_A0_REV_ID 1 + +/* Raven */ +#define BCM56224_DEVICE_ID 0xb224 +#define BCM56224_A0_REV_ID 1 +#define BCM56224_B0_REV_ID 0x11 +#define BCM56225_DEVICE_ID 0xb225 +#define BCM56225_A0_REV_ID 1 +#define BCM56225_B0_REV_ID 0x11 +#define BCM56226_DEVICE_ID 0xb226 +#define BCM56226_A0_REV_ID 1 +#define BCM56226_B0_REV_ID 0x11 +#define BCM56227_DEVICE_ID 0xb227 +#define BCM56227_A0_REV_ID 1 +#define BCM56227_B0_REV_ID 0x11 +#define BCM56228_DEVICE_ID 0xb228 +#define BCM56228_A0_REV_ID 1 +#define BCM56228_B0_REV_ID 0x11 +#define BCM56229_DEVICE_ID 0xb229 +#define BCM56229_A0_REV_ID 1 +#define BCM56229_B0_REV_ID 0x11 +#define BCM56024_DEVICE_ID 0xb024 +#define BCM56024_A0_REV_ID 1 +#define BCM56024_B0_REV_ID 0x11 +#define BCM56025_DEVICE_ID 0xb025 +#define BCM56025_A0_REV_ID 1 +#define BCM56025_B0_REV_ID 0x11 +#define BCM53724_DEVICE_ID 0xc724 +#define BCM53724_A0_REV_ID 1 +#define BCM53724_B0_REV_ID 0x11 +#define BCM53726_DEVICE_ID 0xc726 +#define BCM53726_A0_REV_ID 1 +#define BCM53726_B0_REV_ID 0x11 + +/* Hawkeye */ +#define BCM53312_DEVICE_ID 0xc312 +#define BCM53312_A0_REV_ID 1 +#define BCM53312_B0_REV_ID 0x11 +#define BCM53313_DEVICE_ID 0xc313 +#define BCM53313_A0_REV_ID 1 +#define BCM53313_B0_REV_ID 0x11 +#define BCM53314_DEVICE_ID 0xc314 +#define BCM53314_A0_REV_ID 1 +#define BCM53314_B0_REV_ID 0x11 + +/* Hawkeye EEE */ +#define BCM53322_DEVICE_ID 0xc322 +#define BCM53322_A0_REV_ID 1 +#define BCM53323_DEVICE_ID 0xc323 +#define BCM53323_A0_REV_ID 1 +#define BCM53324_DEVICE_ID 0xc324 +#define BCM53324_A0_REV_ID 1 + + +/* Raptor */ +#define BCM56218_DEVICE_ID 0xB218 +#define BCM56218_A0_REV_ID 1 +#define BCM56218_A1_REV_ID 2 +#define BCM56218_A2_REV_ID 3 +#define BCM56218X_DEVICE_ID 0xc710 +#define BCM56218X_A0_REV_ID 1 +#define BCM56218X_A1_REV_ID 2 +#define BCM56218X_A2_REV_ID 3 +#define BCM56219_DEVICE_ID 0xB219 +#define BCM56219_A0_REV_ID 1 +#define BCM56219_A1_REV_ID 2 +#define BCM56219_A2_REV_ID 3 +#define BCM56218R_DEVICE_ID 0xB21A +#define BCM56218R_A0_REV_ID 1 +#define BCM56218R_A1_REV_ID 2 +#define BCM56218R_A2_REV_ID 3 +#define BCM56219R_DEVICE_ID 0xB21B +#define BCM56219R_A0_REV_ID 1 +#define BCM56219R_A1_REV_ID 2 +#define BCM56219R_A2_REV_ID 3 +#define BCM56214_DEVICE_ID 0xB214 +#define BCM56214_A0_REV_ID 1 +#define BCM56214_A1_REV_ID 2 +#define BCM56214_A2_REV_ID 3 +#define BCM56215_DEVICE_ID 0xB215 +#define BCM56215_A0_REV_ID 1 +#define BCM56215_A1_REV_ID 2 +#define BCM56215_A2_REV_ID 3 +#define BCM56214R_DEVICE_ID 0xB21C +#define BCM56214R_A0_REV_ID 1 +#define BCM56214R_A1_REV_ID 2 +#define BCM56214R_A2_REV_ID 3 +#define BCM56215R_DEVICE_ID 0xB21D +#define BCM56215R_A0_REV_ID 1 +#define BCM56215R_A1_REV_ID 2 +#define BCM56215R_A2_REV_ID 3 +#define BCM56216_DEVICE_ID 0xB216 +#define BCM56216_A0_REV_ID 1 +#define BCM56216_A1_REV_ID 2 +#define BCM56216_A2_REV_ID 3 +#define BCM56217_DEVICE_ID 0xB217 +#define BCM56217_A0_REV_ID 1 +#define BCM56217_A1_REV_ID 2 +#define BCM56217_A2_REV_ID 3 +#define BCM56212_DEVICE_ID 0xB212 +#define BCM56212_A0_REV_ID 1 +#define BCM56212_A1_REV_ID 2 +#define BCM56212_A2_REV_ID 3 +#define BCM56213_DEVICE_ID 0xB213 +#define BCM56213_A0_REV_ID 1 +#define BCM56213_A1_REV_ID 2 +#define BCM56213_A2_REV_ID 3 +#define BCM53718_DEVICE_ID 0xC71A +#define BCM53718_A0_REV_ID 1 +#define BCM53718_A1_REV_ID 2 +#define BCM53718_A2_REV_ID 3 +#define BCM53714_DEVICE_ID 0xC71B +#define BCM53714_A0_REV_ID 1 +#define BCM53714_A1_REV_ID 2 +#define BCM53714_A2_REV_ID 3 +#define BCM53716_DEVICE_ID 0xC716 +#define BCM53716_A0_REV_ID 1 +#define BCM53716_A1_REV_ID 2 +#define BCM53716_A2_REV_ID 3 +#define BCM56018_DEVICE_ID 0xB018 +#define BCM56018_A0_REV_ID 1 +#define BCM56018_A1_REV_ID 2 +#define BCM56018_A2_REV_ID 3 +#define BCM56014_DEVICE_ID 0xB014 +#define BCM56014_A0_REV_ID 1 +#define BCM56014_A1_REV_ID 2 +#define BCM56014_A2_REV_ID 3 + +/* Firebolt2 */ +#define BCM56510_DEVICE_ID 0xb510 +#define BCM56510_A0_REV_ID 1 +#define BCM56511_DEVICE_ID 0xb511 +#define BCM56511_A0_REV_ID 1 +#define BCM56512_DEVICE_ID 0xb512 +#define BCM56512_A0_REV_ID 1 +#define BCM56513_DEVICE_ID 0xb513 +#define BCM56513_A0_REV_ID 1 +#define BCM56514_DEVICE_ID 0xb514 +#define BCM56514_A0_REV_ID 1 +#define BCM56516_DEVICE_ID 0xb516 +#define BCM56516_A0_REV_ID 1 +#define BCM56517_DEVICE_ID 0xb517 +#define BCM56517_A0_REV_ID 1 +#define BCM56518_DEVICE_ID 0xb518 +#define BCM56518_A0_REV_ID 1 +#define BCM56519_DEVICE_ID 0xb519 +#define BCM56519_A0_REV_ID 1 + +/* Triumph */ +#define BCM56620_DEVICE_ID 0xb620 +#define BCM56620_A0_REV_ID 1 +#define BCM56620_A1_REV_ID 2 +#define BCM56620_B0_REV_ID 0x11 +#define BCM56620_B1_REV_ID 0x12 +#define BCM56620_B2_REV_ID 0x13 +#define BCM56624_DEVICE_ID 0xb624 +#define BCM56624_A0_REV_ID 1 +#define BCM56624_A1_REV_ID 2 +#define BCM56624_B0_REV_ID 0x11 +#define BCM56624_B1_REV_ID 0x12 +#define BCM56624_B2_REV_ID 0x13 +#define BCM56626_DEVICE_ID 0xb626 +#define BCM56626_A0_REV_ID 1 +#define BCM56626_A1_REV_ID 2 +#define BCM56626_B0_REV_ID 0x11 +#define BCM56626_B1_REV_ID 0x12 +#define BCM56626_B2_REV_ID 0x13 +#define BCM56628_DEVICE_ID 0xb628 +#define BCM56628_A0_REV_ID 1 +#define BCM56628_A1_REV_ID 2 +#define BCM56628_B0_REV_ID 0x11 +#define BCM56628_B1_REV_ID 0x12 +#define BCM56628_B2_REV_ID 0x13 +#define BCM56629_DEVICE_ID 0xb629 +#define BCM56629_A0_REV_ID 1 +#define BCM56629_A1_REV_ID 2 +#define BCM56629_B0_REV_ID 0x11 +#define BCM56629_B1_REV_ID 0x12 +#define BCM56629_B2_REV_ID 0x13 + +/* Valkyrie */ +#define BCM56680_DEVICE_ID 0xb680 +#define BCM56680_A0_REV_ID 1 +#define BCM56680_A1_REV_ID 2 +#define BCM56680_B0_REV_ID 0x11 +#define BCM56680_B1_REV_ID 0x12 +#define BCM56680_B2_REV_ID 0x13 +#define BCM56684_DEVICE_ID 0xb684 +#define BCM56684_A0_REV_ID 1 +#define BCM56684_A1_REV_ID 2 +#define BCM56684_B0_REV_ID 0x11 +#define BCM56684_B1_REV_ID 0x12 +#define BCM56684_B2_REV_ID 0x13 +#define BCM56686_DEVICE_ID 0xb686 +#define BCM56686_B0_REV_ID 0x11 +#define BCM56686_B1_REV_ID 0x12 +#define BCM56686_B2_REV_ID 0x13 + +/* Scorpion */ +#define BCM56820_DEVICE_ID 0xb820 +#define BCM56820_A0_REV_ID 1 +#define BCM56820_B0_REV_ID 0x11 +#define BCM56821_DEVICE_ID 0xb821 +#define BCM56821_A0_REV_ID 1 +#define BCM56821_B0_REV_ID 0x11 +#define BCM56822_DEVICE_ID 0xb822 +#define BCM56822_A0_REV_ID 1 +#define BCM56822_B0_REV_ID 0x11 +#define BCM56823_DEVICE_ID 0xb823 +#define BCM56823_A0_REV_ID 1 +#define BCM56823_B0_REV_ID 0x11 +#define BCM56825_DEVICE_ID 0xb825 +#define BCM56825_B0_REV_ID 0x11 + +/* HUMV Plus */ +#define BCM56720_DEVICE_ID 0xb720 +#define BCM56720_A0_REV_ID 1 +#define BCM56720_B0_REV_ID 0x11 +#define BCM56721_DEVICE_ID 0xb721 +#define BCM56721_A0_REV_ID 1 +#define BCM56721_B0_REV_ID 0x11 + +/* Conqueror */ +#define BCM56725_DEVICE_ID 0xb725 +#define BCM56725_A0_REV_ID 1 +#define BCM56725_B0_REV_ID 0x11 + +/* Triumph2 */ +#define BCM56630_DEVICE_ID 0xb630 +#define BCM56630_A0_REV_ID 1 +#define BCM56630_B0_REV_ID 0x11 +#define BCM56634_DEVICE_ID 0xb634 +#define BCM56634_A0_REV_ID 1 +#define BCM56634_B0_REV_ID 0x11 +#define BCM56636_DEVICE_ID 0xb636 +#define BCM56636_A0_REV_ID 1 +#define BCM56636_B0_REV_ID 0x11 +#define BCM56638_DEVICE_ID 0xb638 +#define BCM56638_A0_REV_ID 1 +#define BCM56638_B0_REV_ID 0x11 +#define BCM56639_DEVICE_ID 0xb639 +#define BCM56639_A0_REV_ID 1 +#define BCM56639_B0_REV_ID 0x11 + +/* Valkyrie2 */ +#define BCM56685_DEVICE_ID 0xb685 +#define BCM56685_A0_REV_ID 1 +#define BCM56685_B0_REV_ID 0x11 +#define BCM56689_DEVICE_ID 0xb689 +#define BCM56689_A0_REV_ID 1 +#define BCM56689_B0_REV_ID 0x11 + +/* Apollo */ +#define BCM56520_DEVICE_ID 0xb520 +#define BCM56520_A0_REV_ID 1 +#define BCM56520_B0_REV_ID 0x11 +#define BCM56521_DEVICE_ID 0xb521 +#define BCM56521_A0_REV_ID 1 +#define BCM56521_B0_REV_ID 0x11 +#define BCM56522_DEVICE_ID 0xb522 +#define BCM56522_A0_REV_ID 1 +#define BCM56522_B0_REV_ID 0x11 +#define BCM56524_DEVICE_ID 0xb524 +#define BCM56524_A0_REV_ID 1 +#define BCM56524_B0_REV_ID 0x11 +#define BCM56526_DEVICE_ID 0xb526 +#define BCM56526_A0_REV_ID 1 +#define BCM56526_B0_REV_ID 0x11 + +/* Firebolt 3 */ +#define BCM56534_DEVICE_ID 0xb534 +#define BCM56534_B0_REV_ID 0x11 +#define BCM56538_DEVICE_ID 0xb538 +#define BCM56538_B0_REV_ID 0x11 + +/* Enduro */ +#define BCM56331_DEVICE_ID 0xb331 +#define BCM56331_A0_REV_ID 1 +#define BCM56331_B0_REV_ID 0x11 +#define BCM56331_B1_REV_ID 0x12 +#define BCM56333_DEVICE_ID 0xb333 +#define BCM56333_A0_REV_ID 1 +#define BCM56333_B0_REV_ID 0x11 +#define BCM56333_B1_REV_ID 0x12 +#define BCM56334_DEVICE_ID 0xb334 +#define BCM56334_A0_REV_ID 1 +#define BCM56334_B0_REV_ID 0x11 +#define BCM56334_B1_REV_ID 0x12 +#define BCM56338_DEVICE_ID 0xb338 +#define BCM56338_A0_REV_ID 1 +#define BCM56338_B0_REV_ID 0x11 +#define BCM56338_B1_REV_ID 0x12 + +/* Helix 3 */ +#define BCM56320_DEVICE_ID 0xb320 +#define BCM56320_A0_REV_ID 1 +#define BCM56320_B0_REV_ID 0x11 +#define BCM56320_B1_REV_ID 0x12 +#define BCM56321_DEVICE_ID 0xb321 +#define BCM56321_A0_REV_ID 1 +#define BCM56321_B0_REV_ID 0x11 +#define BCM56321_B1_REV_ID 0x12 + + +/* FireScout */ +#define BCM56548H_DEVICE_ID 0xB54A +#define BCM56548H_A0_REV_ID 1 +#define BCM56548_DEVICE_ID 0xb548 +#define BCM56548_A0_REV_ID 1 +#define BCM56547_DEVICE_ID 0xb547 +#define BCM56547_A0_REV_ID 1 + +/* Helix 4 */ +#define BCM56346_DEVICE_ID 0xb346 +#define BCM56346_A0_REV_ID 1 +#define BCM56345_DEVICE_ID 0xb345 +#define BCM56345_A0_REV_ID 1 +#define BCM56344_DEVICE_ID 0xb344 +#define BCM56344_A0_REV_ID 1 +#define BCM56342_DEVICE_ID 0xb342 +#define BCM56342_A0_REV_ID 1 +#define BCM56340_DEVICE_ID 0xb340 +#define BCM56340_A0_REV_ID 1 + +/* Spiral */ +#define BCM56049_DEVICE_ID 0xb049 +#define BCM56049_A0_REV_ID 1 +#define BCM56048_DEVICE_ID 0xb048 +#define BCM56048_A0_REV_ID 1 +#define BCM56047_DEVICE_ID 0xb047 +#define BCM56047_A0_REV_ID 1 + +/* Ranger */ +#define BCM56042_DEVICE_ID 0xb042 +#define BCM56042_A0_REV_ID 1 +#define BCM56041_DEVICE_ID 0xb041 +#define BCM56041_A0_REV_ID 1 +#define BCM56040_DEVICE_ID 0xb040 +#define BCM56040_A0_REV_ID 1 + +/* Stardust */ +#define BCM56132_DEVICE_ID 0xb132 +#define BCM56132_A0_REV_ID 1 +#define BCM56132_B0_REV_ID 0x11 +#define BCM56132_B1_REV_ID 0x12 +#define BCM56134_DEVICE_ID 0xb134 +#define BCM56134_A0_REV_ID 1 +#define BCM56134_B0_REV_ID 0x11 +#define BCM56134_B1_REV_ID 0x12 + +/* Dagger */ +#define BCM56230_DEVICE_ID 0xb230 +#define BCM56230_B1_REV_ID 0x12 +#define BCM56231_DEVICE_ID 0xb231 +#define BCM56231_B1_REV_ID 0x12 + +/* Hurricane */ +#define BCM56140_DEVICE_ID 0xb140 +#define BCM56140_A0_REV_ID 1 +#define BCM56142_DEVICE_ID 0xb142 +#define BCM56142_A0_REV_ID 1 +#define BCM56143_DEVICE_ID 0xb143 +#define BCM56143_A0_REV_ID 1 +#define BCM56144_DEVICE_ID 0xb144 +#define BCM56144_A0_REV_ID 1 +#define BCM56146_DEVICE_ID 0xb146 +#define BCM56146_A0_REV_ID 1 +#define BCM56147_DEVICE_ID 0xb147 +#define BCM56147_A0_REV_ID 1 +#define BCM56149_DEVICE_ID 0xb149 +#define BCM56149_A0_REV_ID 1 + +/* Trident */ +#define BCM56840_DEVICE_ID 0xb840 +#define BCM56840_A0_REV_ID 1 +#define BCM56840_A1_REV_ID 2 +#define BCM56840_A2_REV_ID 3 +#define BCM56840_A3_REV_ID 4 +#define BCM56840_A4_REV_ID 5 +#define BCM56840_B0_REV_ID 0x11 +#define BCM56840_B1_REV_ID 0x12 +#define BCM56841_DEVICE_ID 0xb841 +#define BCM56841_A0_REV_ID 1 +#define BCM56841_A1_REV_ID 2 +#define BCM56841_A2_REV_ID 3 +#define BCM56841_A3_REV_ID 4 +#define BCM56841_A4_REV_ID 5 +#define BCM56841_B0_REV_ID 0x11 +#define BCM56841_B1_REV_ID 0x12 +#define BCM56843_DEVICE_ID 0xb843 +#define BCM56843_A0_REV_ID 1 +#define BCM56843_A1_REV_ID 2 +#define BCM56843_A2_REV_ID 3 +#define BCM56843_A3_REV_ID 4 +#define BCM56843_A4_REV_ID 5 +#define BCM56843_B0_REV_ID 0x11 +#define BCM56843_B1_REV_ID 0x12 +#define BCM56845_DEVICE_ID 0xb845 +#define BCM56845_A0_REV_ID 1 +#define BCM56845_A1_REV_ID 2 +#define BCM56845_A2_REV_ID 3 +#define BCM56845_A3_REV_ID 4 +#define BCM56845_A4_REV_ID 5 +#define BCM56845_B0_REV_ID 0x11 +#define BCM56845_B1_REV_ID 0x12 + +/* Titan */ +#define BCM56743_DEVICE_ID 0xb743 +#define BCM56743_A0_REV_ID 1 +#define BCM56743_A1_REV_ID 2 +#define BCM56743_A2_REV_ID 3 +#define BCM56743_A3_REV_ID 4 +#define BCM56743_A4_REV_ID 5 +#define BCM56743_B0_REV_ID 0x11 +#define BCM56743_B1_REV_ID 0x12 +#define BCM56745_DEVICE_ID 0xb745 +#define BCM56745_A0_REV_ID 1 +#define BCM56745_A1_REV_ID 2 +#define BCM56745_A2_REV_ID 3 +#define BCM56745_A3_REV_ID 4 +#define BCM56745_A4_REV_ID 5 +#define BCM56745_B0_REV_ID 0x11 +#define BCM56745_B1_REV_ID 0x12 + +/* Saber 2 */ +#define BCM56260_DEVICE_ID 0xb260 +#define BCM56260_A0_REV_ID 1 +#define BCM56260_B0_REV_ID 0x11 +#define BCM56261_DEVICE_ID 0xb261 +#define BCM56261_A0_REV_ID 1 +#define BCM56261_B0_REV_ID 0x11 +#define BCM56262_DEVICE_ID 0xb262 +#define BCM56262_A0_REV_ID 1 +#define BCM56262_B0_REV_ID 0x11 +#define BCM56263_DEVICE_ID 0xb263 +#define BCM56263_A0_REV_ID 1 +#define BCM56263_B0_REV_ID 0x11 + +#define BCM56265_DEVICE_ID 0xb265 +#define BCM56265_A0_REV_ID 1 +#define BCM56265_B0_REV_ID 0x11 +#define BCM56266_DEVICE_ID 0xb266 +#define BCM56266_A0_REV_ID 1 +#define BCM56266_B0_REV_ID 0x11 +#define BCM56267_DEVICE_ID 0xb267 +#define BCM56267_A0_REV_ID 1 +#define BCM56267_B0_REV_ID 0x11 +#define BCM56268_DEVICE_ID 0xb268 +#define BCM56268_A0_REV_ID 1 +#define BCM56268_B0_REV_ID 0x11 + +/*Dagger 2*/ +#define BCM56233_DEVICE_ID 0xb233 +#define BCM56233_B0_REV_ID 0x11 + +#define BCM56460_DEVICE_ID 0xb460 +#define BCM56460_A0_REV_ID 1 +#define BCM56460_B0_REV_ID 0x11 +#define BCM56461_DEVICE_ID 0xb461 +#define BCM56461_A0_REV_ID 1 +#define BCM56461_B0_REV_ID 0x11 +#define BCM56462_DEVICE_ID 0xb462 +#define BCM56462_A0_REV_ID 1 +#define BCM56462_B0_REV_ID 0x11 +#define BCM56463_DEVICE_ID 0xb463 +#define BCM56463_A0_REV_ID 1 +#define BCM56463_B0_REV_ID 0x11 + +#define BCM56465_DEVICE_ID 0xb465 +#define BCM56465_A0_REV_ID 1 +#define BCM56465_B0_REV_ID 0x11 +#define BCM56466_DEVICE_ID 0xb466 +#define BCM56466_A0_REV_ID 1 +#define BCM56466_B0_REV_ID 0x11 +#define BCM56467_DEVICE_ID 0xb467 +#define BCM56467_A0_REV_ID 1 +#define BCM56467_B0_REV_ID 0x11 +#define BCM56468_DEVICE_ID 0xb468 +#define BCM56468_A0_REV_ID 1 +#define BCM56468_B0_REV_ID 0x11 + +/* Metrolite */ +#define BCM56270_DEVICE_ID 0xb270 +#define BCM56270_A0_REV_ID 1 +#define BCM56271_DEVICE_ID 0xb271 +#define BCM56271_A0_REV_ID 1 +#define BCM56272_DEVICE_ID 0xb272 +#define BCM56272_A0_REV_ID 1 + +/* Beagle */ +#define BCM53460_DEVICE_ID 0x8460 +#define BCM53460_A0_REV_ID 1 +#define BCM53461_DEVICE_ID 0x8461 +#define BCM53461_A0_REV_ID 1 + +/* Trident Plus */ +#define BCM56842_DEVICE_ID 0xb842 +#define BCM56842_A0_REV_ID 1 +#define BCM56842_A1_REV_ID 2 +#define BCM56844_DEVICE_ID 0xb844 +#define BCM56844_A0_REV_ID 1 +#define BCM56844_A1_REV_ID 2 +#define BCM56846_DEVICE_ID 0xb846 +#define BCM56846_A0_REV_ID 1 +#define BCM56846_A1_REV_ID 2 +#define BCM56549_DEVICE_ID 0xb549 +#define BCM56549_A0_REV_ID 1 +#define BCM56549_A1_REV_ID 2 +#define BCM56053_DEVICE_ID 0xb053 +#define BCM56053_A0_REV_ID 1 +#define BCM56053_A1_REV_ID 2 +#define BCM56831_DEVICE_ID 0xb831 +#define BCM56831_A0_REV_ID 1 +#define BCM56831_A1_REV_ID 2 +#define BCM56835_DEVICE_ID 0xb835 +#define BCM56835_A0_REV_ID 1 +#define BCM56835_A1_REV_ID 2 +#define BCM56838_DEVICE_ID 0xb838 +#define BCM56838_A0_REV_ID 1 +#define BCM56838_A1_REV_ID 2 +#define BCM56847_DEVICE_ID 0xb847 +#define BCM56847_A0_REV_ID 1 +#define BCM56847_A1_REV_ID 2 +#define BCM56847_A2_REV_ID 3 +#define BCM56847_A3_REV_ID 4 +#define BCM56847_A4_REV_ID 5 +#define BCM56847_B0_REV_ID 0x11 +#define BCM56847_B1_REV_ID 0x12 +#define BCM56849_DEVICE_ID 0xb849 +#define BCM56849_A0_REV_ID 1 +#define BCM56849_A1_REV_ID 2 + +/* Titan Plus */ +#define BCM56742_DEVICE_ID 0xb742 +#define BCM56742_A0_REV_ID 1 +#define BCM56742_A1_REV_ID 2 +#define BCM56742_A2_REV_ID 3 +#define BCM56744_DEVICE_ID 0xb744 +#define BCM56744_A0_REV_ID 1 +#define BCM56744_A1_REV_ID 2 +#define BCM56746_DEVICE_ID 0xb746 +#define BCM56746_A0_REV_ID 1 +#define BCM56746_A1_REV_ID 2 + +/* Shadow */ +#define BCM88732_DEVICE_ID 0x0732 +#define BCM88732_A0_REV_ID 1 +#define BCM88732_A1_REV_ID 2 +#define BCM88732_A2_REV_ID 4 +#define BCM88732_B0_REV_ID 0x11 +#define BCM88732_B1_REV_ID 0x12 +#define BCM88732_B2_REV_ID 0x13 + +/* Triumph 3 */ +#define BCM56640_DEVICE_ID 0xb640 +#define BCM56640_A0_REV_ID 1 +#define BCM56640_A1_REV_ID 2 +#define BCM56640_B0_REV_ID 0x11 +#define BCM56643_DEVICE_ID 0xb643 +#define BCM56643_A0_REV_ID 1 +#define BCM56643_A1_REV_ID 2 +#define BCM56643_B0_REV_ID 0x11 +#define BCM56644_DEVICE_ID 0xb644 +#define BCM56644_A0_REV_ID 1 +#define BCM56644_A1_REV_ID 2 +#define BCM56644_B0_REV_ID 0x11 +#define BCM56648_DEVICE_ID 0xb648 +#define BCM56648_A0_REV_ID 1 +#define BCM56648_A1_REV_ID 2 +#define BCM56648_B0_REV_ID 0x11 +#define BCM56649_DEVICE_ID 0xb649 +#define BCM56649_A0_REV_ID 1 +#define BCM56649_A1_REV_ID 2 +#define BCM56649_B0_REV_ID 0x11 + +/* Apollo 2 */ +#define BCM56540_DEVICE_ID 0xb540 +#define BCM56540_A0_REV_ID 1 +#define BCM56540_A1_REV_ID 2 +#define BCM56540_B0_REV_ID 0x11 +#define BCM56541_DEVICE_ID 0xb541 +#define BCM56541_A0_REV_ID 1 +#define BCM56541_A1_REV_ID 2 +#define BCM56541_B0_REV_ID 0x11 +#define BCM56542_DEVICE_ID 0xb542 +#define BCM56542_A0_REV_ID 1 +#define BCM56542_A1_REV_ID 2 +#define BCM56542_B0_REV_ID 0x11 +#define BCM56543_DEVICE_ID 0xb543 +#define BCM56543_A0_REV_ID 1 +#define BCM56543_A1_REV_ID 2 +#define BCM56543_B0_REV_ID 0x11 +#define BCM56544_DEVICE_ID 0xb544 +#define BCM56544_A0_REV_ID 1 +#define BCM56544_A1_REV_ID 2 +#define BCM56544_B0_REV_ID 0x11 + +/* Firebolt 4 */ +#define BCM56545_DEVICE_ID 0xb545 +#define BCM56545_A0_REV_ID 1 +#define BCM56545_A1_REV_ID 2 +#define BCM56545_B0_REV_ID 0x11 +#define BCM56546_DEVICE_ID 0xb546 +#define BCM56546_A0_REV_ID 1 +#define BCM56546_A1_REV_ID 2 +#define BCM56546_B0_REV_ID 0x11 + +/* Ranger plus */ +#define BCM56044_DEVICE_ID 0xb044 +#define BCM56044_B0_REV_ID 0x11 +#define BCM56045_DEVICE_ID 0xb045 +#define BCM56045_A0_REV_ID 1 +#define BCM56045_A1_REV_ID 2 +#define BCM56045_B0_REV_ID 0x11 +#define BCM56046_DEVICE_ID 0xb046 +#define BCM56046_A0_REV_ID 1 +#define BCM56046_A1_REV_ID 2 +#define BCM56046_B0_REV_ID 0x11 + + +/* Katana */ +#define BCM56440_DEVICE_ID 0xb440 +#define BCM56440_A0_REV_ID 1 +#define BCM56440_B0_REV_ID 0x11 +#define BCM56441_DEVICE_ID 0xb441 +#define BCM56441_A0_REV_ID 1 +#define BCM56441_B0_REV_ID 0x11 +#define BCM56442_DEVICE_ID 0xb442 +#define BCM56442_A0_REV_ID 1 +#define BCM56442_B0_REV_ID 0x11 +#define BCM56443_DEVICE_ID 0xb443 +#define BCM56443_A0_REV_ID 1 +#define BCM56443_B0_REV_ID 0x11 +#define BCM56445_DEVICE_ID 0xb445 +#define BCM56445_A0_REV_ID 1 +#define BCM56445_B0_REV_ID 0x11 +#define BCM56446_DEVICE_ID 0xb446 +#define BCM56446_A0_REV_ID 1 +#define BCM56446_B0_REV_ID 0x11 +#define BCM56447_DEVICE_ID 0xb447 +#define BCM56447_A0_REV_ID 1 +#define BCM56447_B0_REV_ID 0x11 +#define BCM56448_DEVICE_ID 0xb448 +#define BCM56448_A0_REV_ID 1 +#define BCM56448_B0_REV_ID 0x11 +#define BCM56449_DEVICE_ID 0xb449 +#define BCM56449_A0_REV_ID 1 +#define BCM56449_B0_REV_ID 0x11 +#define BCM56240_DEVICE_ID 0xb240 +#define BCM56240_A0_REV_ID 1 +#define BCM56240_B0_REV_ID 0x11 +#define BCM56241_DEVICE_ID 0xb241 +#define BCM56241_A0_REV_ID 1 +#define BCM56241_B0_REV_ID 0x11 +#define BCM56242_DEVICE_ID 0xb242 +#define BCM56242_A0_REV_ID 1 +#define BCM56242_B0_REV_ID 0x11 +#define BCM56243_DEVICE_ID 0xb243 +#define BCM56243_A0_REV_ID 1 +#define BCM56243_B0_REV_ID 0x11 +#define BCM56245_DEVICE_ID 0xb245 +#define BCM56245_A0_REV_ID 1 +#define BCM56245_B0_REV_ID 0x11 +#define BCM56246_DEVICE_ID 0xb246 +#define BCM56246_A0_REV_ID 1 +#define BCM56246_B0_REV_ID 0x11 +#define BCM55440_DEVICE_ID 0xa440 +#define BCM55440_A0_REV_ID 1 +#define BCM55440_B0_REV_ID 0x11 +#define BCM55441_DEVICE_ID 0xa441 +#define BCM55441_A0_REV_ID 1 +#define BCM55441_B0_REV_ID 0x11 + +/* Katana 2 */ +#define BCM55450_DEVICE_ID 0xa450 +#define BCM55450_A0_REV_ID 1 +#define BCM55450_B0_REV_ID 0x11 +#define BCM55450_B1_REV_ID 0x12 + +#define BCM55455_DEVICE_ID 0xa455 +#define BCM55455_A0_REV_ID 1 +#define BCM55455_B0_REV_ID 0x11 +#define BCM55455_B1_REV_ID 0x12 + +#define BCM56248_DEVICE_ID 0xb248 +#define BCM56248_A0_REV_ID 1 +#define BCM56248_B0_REV_ID 0x11 +#define BCM56248_B1_REV_ID 0x12 + +#define BCM56450_DEVICE_ID 0xb450 +#define BCM56450_A0_REV_ID 1 +#define BCM56450_B0_REV_ID 0x11 +#define BCM56450_B1_REV_ID 0x12 + +#define BCM56452_DEVICE_ID 0xb452 +#define BCM56452_A0_REV_ID 1 +#define BCM56452_B0_REV_ID 0x11 +#define BCM56452_B1_REV_ID 0x12 + +#define BCM56454_DEVICE_ID 0xb454 +#define BCM56454_A0_REV_ID 1 +#define BCM56454_B0_REV_ID 0x11 +#define BCM56454_B1_REV_ID 0x12 + +#define BCM56455_DEVICE_ID 0xb455 +#define BCM56455_A0_REV_ID 1 +#define BCM56455_B0_REV_ID 0x11 +#define BCM56455_B1_REV_ID 0x12 + +#define BCM56456_DEVICE_ID 0xb456 +#define BCM56456_A0_REV_ID 1 +#define BCM56456_B0_REV_ID 0x11 +#define BCM56456_B1_REV_ID 0x12 + +#define BCM56457_DEVICE_ID 0xb457 +#define BCM56457_A0_REV_ID 1 +#define BCM56457_B0_REV_ID 0x11 +#define BCM56457_B1_REV_ID 0x12 + +#define BCM56458_DEVICE_ID 0xb458 +#define BCM56458_A0_REV_ID 1 +#define BCM56458_B0_REV_ID 0x11 +#define BCM56458_B1_REV_ID 0x12 + +/* Trident 2 */ +#define BCM56850_DEVICE_ID 0xb850 +#define BCM56850_A0_REV_ID 1 +#define BCM56850_A1_REV_ID 2 +#define BCM56850_A2_REV_ID 3 +#define BCM56851_DEVICE_ID 0xb851 +#define BCM56851_A0_REV_ID 1 +#define BCM56851_A1_REV_ID 2 +#define BCM56851_A2_REV_ID 3 +#define BCM56852_DEVICE_ID 0xb852 +#define BCM56852_A0_REV_ID 1 +#define BCM56852_A1_REV_ID 2 +#define BCM56852_A2_REV_ID 3 +#define BCM56853_DEVICE_ID 0xb853 +#define BCM56853_A0_REV_ID 1 +#define BCM56853_A1_REV_ID 2 +#define BCM56853_A2_REV_ID 3 +#define BCM56854_DEVICE_ID 0xb854 +#define BCM56854_A0_REV_ID 1 +#define BCM56854_A1_REV_ID 2 +#define BCM56854_A2_REV_ID 3 +#define BCM56855_DEVICE_ID 0xb855 +#define BCM56855_A0_REV_ID 1 +#define BCM56855_A1_REV_ID 2 +#define BCM56855_A2_REV_ID 3 +#define BCM56834_DEVICE_ID 0xb834 +#define BCM56834_A0_REV_ID 1 +#define BCM56834_A1_REV_ID 2 +#define BCM56834_A2_REV_ID 3 + +/* Trident 2+ */ +#define BCM56860_DEVICE_ID 0xb860 +#define BCM56860_A0_REV_ID 1 +#define BCM56860_A1_REV_ID 2 +#define BCM56861_DEVICE_ID 0xb861 +#define BCM56861_A0_REV_ID 1 +#define BCM56861_A1_REV_ID 2 +#define BCM56862_DEVICE_ID 0xb862 +#define BCM56862_A0_REV_ID 1 +#define BCM56862_A1_REV_ID 2 +#define BCM56864_DEVICE_ID 0xb864 +#define BCM56864_A0_REV_ID 1 +#define BCM56864_A1_REV_ID 2 +#define BCM56865_DEVICE_ID 0xb865 +#define BCM56865_A0_REV_ID 1 +#define BCM56865_A1_REV_ID 2 +#define BCM56866_DEVICE_ID 0xb866 +#define BCM56866_A0_REV_ID 1 +#define BCM56866_A1_REV_ID 2 +#define BCM56867_DEVICE_ID 0xb867 +#define BCM56867_A0_REV_ID 1 +#define BCM56867_A1_REV_ID 2 +#define BCM56868_DEVICE_ID 0xb868 +#define BCM56868_A0_REV_ID 1 +#define BCM56868_A1_REV_ID 2 +#define BCM56832_DEVICE_ID 0xb832 +#define BCM56832_A0_REV_ID 1 +#define BCM56832_A1_REV_ID 2 +#define BCM56833_DEVICE_ID 0xb833 +#define BCM56833_A0_REV_ID 1 +#define BCM56833_A1_REV_ID 2 +#define BCM56836_DEVICE_ID 0xb836 +#define BCM56836_A0_REV_ID 1 +#define BCM56836_A1_REV_ID 2 + + +/* Titan 2 */ +#define BCM56750_DEVICE_ID 0xb750 +#define BCM56750_A0_REV_ID 1 +#define BCM56750_A1_REV_ID 2 +#define BCM56750_A2_REV_ID 3 + +/* Scorpion 960 */ +#define BCM56830_DEVICE_ID 0xb830 +#define BCM56830_A0_REV_ID 1 +#define BCM56830_A1_REV_ID 2 +#define BCM56830_A2_REV_ID 3 + +/* Hurricane 2*/ +#define BCM56150_DEVICE_ID 0xb150 +#define BCM56150_A0_REV_ID 1 +#define BCM56151_DEVICE_ID 0xb151 +#define BCM56151_A0_REV_ID 1 +#define BCM56152_DEVICE_ID 0xb152 +#define BCM56152_A0_REV_ID 1 + +/* Wolfhound*/ +#define BCM53342_DEVICE_ID 0x8342 +#define BCM53342_A0_REV_ID 1 +#define BCM53343_DEVICE_ID 0x8343 +#define BCM53343_A0_REV_ID 1 +#define BCM53344_DEVICE_ID 0x8344 +#define BCM53344_A0_REV_ID 1 +#define BCM53346_DEVICE_ID 0x8346 +#define BCM53346_A0_REV_ID 1 +#define BCM53347_DEVICE_ID 0x8347 +#define BCM53347_A0_REV_ID 1 + +/* Foxhound*/ +#define BCM53333_DEVICE_ID 0x8333 +#define BCM53333_A0_REV_ID 1 +#define BCM53334_DEVICE_ID 0x8334 +#define BCM53334_A0_REV_ID 1 + +/* Deerhound*/ +#define BCM53393_DEVICE_ID 0x8393 +#define BCM53393_A0_REV_ID 1 +#define BCM53394_DEVICE_ID 0x8394 +#define BCM53394_A0_REV_ID 1 + +/* Greyhound , Ranger 2 */ +#define BCM53400_DEVICE_ID 0x8400 +#define BCM53400_A0_REV_ID 1 +#define BCM56060_DEVICE_ID 0xb060 +#define BCM56060_A0_REV_ID 1 +#define BCM56062_DEVICE_ID 0xb062 +#define BCM56062_A0_REV_ID 1 +#define BCM56063_DEVICE_ID 0xb063 +#define BCM56063_A0_REV_ID 1 +#define BCM56064_DEVICE_ID 0xb064 +#define BCM56064_A0_REV_ID 1 +#define BCM56065_DEVICE_ID 0xb065 +#define BCM56065_A0_REV_ID 1 +#define BCM56066_DEVICE_ID 0xb066 +#define BCM56066_A0_REV_ID 1 +#define BCM53401_DEVICE_ID 0x8401 +#define BCM53411_DEVICE_ID 0x8411 +#define BCM53401_A0_REV_ID 1 +#define BCM53402_DEVICE_ID 0x8402 +#define BCM53412_DEVICE_ID 0x8412 +#define BCM53402_A0_REV_ID 1 +#define BCM53403_DEVICE_ID 0x8403 +#define BCM53413_DEVICE_ID 0x8413 +#define BCM53403_A0_REV_ID 1 +#define BCM53404_DEVICE_ID 0x8404 +#define BCM53414_DEVICE_ID 0x8414 +#define BCM53404_A0_REV_ID 1 +#define BCM53405_DEVICE_ID 0x8405 +#define BCM53415_DEVICE_ID 0x8415 +#define BCM53405_A0_REV_ID 1 +#define BCM53406_DEVICE_ID 0x8406 +#define BCM53416_DEVICE_ID 0x8416 +#define BCM53406_A0_REV_ID 1 +#define BCM53408_DEVICE_ID 0x8408 +#define BCM53418_DEVICE_ID 0x8418 +#define BCM53408_A0_REV_ID 1 +#define BCM53365_DEVICE_ID 0x8365 +#define BCM53365_A0_REV_ID 1 +#define BCM53369_DEVICE_ID 0x8369 +#define BCM53369_A0_REV_ID 1 + +/* Elkhound */ +#define BCM53454_DEVICE_ID 0x8454 +#define BCM53455_DEVICE_ID 0x8455 +#define BCM53454_A0_REV_ID 1 +#define BCM53456_DEVICE_ID 0x8456 +#define BCM53457_DEVICE_ID 0x8457 +#define BCM53456_A0_REV_ID 1 + +/* Bloodhound */ +#define BCM53422_DEVICE_ID 0x8422 +#define BCM53422_A0_REV_ID 1 +#define BCM53424_DEVICE_ID 0x8424 +#define BCM53424_A0_REV_ID 1 +#define BCM53426_DEVICE_ID 0x8426 +#define BCM53426_A0_REV_ID 1 + +/* Tomahawk */ +#define BCM56960_DEVICE_ID 0xb960 +#define BCM56960_A0_REV_ID 1 +#define BCM56960_B0_REV_ID 0x11 +#define BCM56960_B1_REV_ID 0x12 +#define BCM56961_DEVICE_ID 0xb961 +#define BCM56961_A0_REV_ID 1 +#define BCM56961_B0_REV_ID 0x11 +#define BCM56961_B1_REV_ID 0x12 +#define BCM56962_DEVICE_ID 0xb962 +#define BCM56962_A0_REV_ID 1 +#define BCM56962_B0_REV_ID 0x11 +#define BCM56962_B1_REV_ID 0x12 +#define BCM56963_DEVICE_ID 0xb963 +#define BCM56963_A0_REV_ID 1 +#define BCM56963_B0_REV_ID 0x11 +#define BCM56963_B1_REV_ID 0x12 +#define BCM56930_DEVICE_ID 0xb930 +#define BCM56930_A0_REV_ID 1 +#define BCM56930_B0_REV_ID 0x11 +#define BCM56930_B1_REV_ID 0x12 +#define BCM56930_C0_REV_ID 0x21 +#define BCM56931_DEVICE_ID 0xb931 +#define BCM56931_A0_REV_ID 1 +#define BCM56931_B0_REV_ID 0x11 +#define BCM56931_C0_REV_ID 0x21 +#define BCM56935_DEVICE_ID 0xb935 +#define BCM56935_A0_REV_ID 1 +#define BCM56935_B0_REV_ID 0x11 +#define BCM56935_C0_REV_ID 0x21 +#define BCM56936_DEVICE_ID 0xb936 +#define BCM56936_A0_REV_ID 1 +#define BCM56936_B0_REV_ID 0x11 +#define BCM56936_C0_REV_ID 0x21 +#define BCM56939_DEVICE_ID 0xb939 +#define BCM56939_A0_REV_ID 1 +#define BCM56939_B0_REV_ID 0x11 +#define BCM56939_C0_REV_ID 0x21 + +/* Ranger3+ */ +#define BCM56168_DEVICE_ID 0xb168 +#define BCM56168_A0_REV_ID 1 +#define BCM56168_B0_REV_ID 0x11 +#define BCM56168_B1_REV_ID 0x12 +#define BCM56169_DEVICE_ID 0xb169 +#define BCM56169_A0_REV_ID 1 +#define BCM56169_B0_REV_ID 0x11 +#define BCM56169_B1_REV_ID 0x12 + +/* Tomahawk 3 */ +#define BCM56980_DEVICE_ID_MASK 0xFFF0 +#define BCM56980_DEVICE_ID 0xb980 +#define BCM56980_A0_REV_ID 1 +#define BCM56980_B0_REV_ID 0x11 +#define BCM56981_DEVICE_ID 0xb981 +#define BCM56981_A0_REV_ID 1 +#define BCM56981_B0_REV_ID 0x11 +#define BCM56982_DEVICE_ID 0xb982 +#define BCM56982_A0_REV_ID 1 +#define BCM56982_B0_REV_ID 0x11 +#define BCM56983_DEVICE_ID 0xb983 +#define BCM56983_A0_REV_ID 1 +#define BCM56983_B0_REV_ID 0x11 +#define BCM56984_DEVICE_ID 0xb984 +#define BCM56984_A0_REV_ID 1 +#define BCM56984_B0_REV_ID 0x11 + +/* Titanhawk */ +#define BCM56968_DEVICE_ID 0xb968 +#define BCM56968_A0_REV_ID 1 +#define BCM56968_B0_REV_ID 0x11 +#define BCM56968_B1_REV_ID 0x12 + +/* Hurricane 3 */ +#define BCM56160_DEVICE_ID 0xb160 +#define BCM56160_A0_REV_ID 1 +#define BCM56160_B0_REV_ID 0x11 +#define BCM56162_DEVICE_ID 0xb162 +#define BCM56162_A0_REV_ID 1 +#define BCM56162_B0_REV_ID 0x11 + +/* Hurricane3 Lite */ +#define BCM56163_DEVICE_ID 0xb163 +#define BCM56163_A0_REV_ID 1 +#define BCM56163_B0_REV_ID 0x11 +#define BCM56164_DEVICE_ID 0xb164 +#define BCM56164_A0_REV_ID 1 +#define BCM56164_B0_REV_ID 0x11 +#define BCM56166_DEVICE_ID 0xb166 +#define BCM56166_A0_REV_ID 1 +#define BCM56166_B0_REV_ID 0x11 + +/* Hurricane4 */ +#define BCM56273_DEVICE_ID 0xb273 +#define BCM56273_A0_REV_ID 1 + +#define BCM56274_DEVICE_ID 0xb274 +#define BCM56274_A0_REV_ID 1 + +#define BCM56275_DEVICE_ID 0xb275 +#define BCM56275_A0_REV_ID 1 + +#define BCM56276_DEVICE_ID 0xb276 +#define BCM56276_A0_REV_ID 1 + +#define BCM56277_DEVICE_ID 0xb277 +#define BCM56277_A0_REV_ID 1 + +#define BCM56278_DEVICE_ID 0xb278 +#define BCM56278_A0_REV_ID 1 + +/* Buckhound */ +#define BCM53440_DEVICE_ID 0x8440 +#define BCM53440_A0_REV_ID 1 +#define BCM53440_B0_REV_ID 0x11 +#define BCM53442_DEVICE_ID 0x8442 +#define BCM53442_A0_REV_ID 1 +#define BCM53442_B0_REV_ID 0x11 +#define BCM53443_DEVICE_ID 0x8443 +#define BCM53443_A0_REV_ID 1 +#define BCM53443_B0_REV_ID 0x11 + +/* Foxhound2 */ +#define BCM53434_DEVICE_ID 0x8434 +#define BCM53434_A0_REV_ID 1 +#define BCM53434_B0_REV_ID 0x11 + +/* Apache */ +#define BCM56560_DEVICE_ID 0xb560 +#define BCM56560_A0_REV_ID 1 +#define BCM56560_B0_REV_ID 0x11 + +#define BCM56561_DEVICE_ID 0xb561 +#define BCM56561_A0_REV_ID 1 +#define BCM56561_B0_REV_ID 0x11 + +#define BCM56562_DEVICE_ID 0xb562 +#define BCM56562_A0_REV_ID 1 +#define BCM56562_B0_REV_ID 0x11 + +/* MONTEREY */ +#define BCM56670_DEVICE_ID 0xb670 +#define BCM56670_A0_REV_ID 1 +#define BCM56670_B0_REV_ID 0x11 +#define BCM56670_C0_REV_ID 0x21 + + +#define BCM56671_DEVICE_ID 0xb671 +#define BCM56671_A0_REV_ID 1 +#define BCM56671_B0_REV_ID 0x11 +#define BCM56671_C0_REV_ID 0x21 + +#define BCM56672_DEVICE_ID 0xb672 +#define BCM56672_A0_REV_ID 1 +#define BCM56672_B0_REV_ID 0x11 +#define BCM56672_C0_REV_ID 0x21 + +#define BCM56675_DEVICE_ID 0xb675 +#define BCM56675_A0_REV_ID 1 +#define BCM56675_B0_REV_ID 0x11 +#define BCM56675_C0_REV_ID 0x21 + + +/* Firebolt-5 */ +#define BCM56565_DEVICE_ID 0xb565 +#define BCM56565_A0_REV_ID 1 +#define BCM56565_B0_REV_ID 0x11 + +#define BCM56566_DEVICE_ID 0xb566 +#define BCM56566_A0_REV_ID 1 +#define BCM56566_B0_REV_ID 0x11 + +#define BCM56567_DEVICE_ID 0xb567 +#define BCM56567_A0_REV_ID 1 +#define BCM56567_B0_REV_ID 0x11 + +#define BCM56568_DEVICE_ID 0xb568 +#define BCM56568_A0_REV_ID 1 +#define BCM56568_B0_REV_ID 0x11 + +/* Maverick */ +#define BCM56760_DEVICE_ID 0xb760 +#define BCM56760_A0_REV_ID 1 +#define BCM56760_A1_REV_ID 2 +#define BCM56760_B0_REV_ID 0x11 + + +#define BCM56761_DEVICE_ID 0xb761 +#define BCM56761_A0_REV_ID 1 +#define BCM56761_A1_REV_ID 2 +#define BCM56761_B0_REV_ID 0x11 +#define BCM56761_B1_REV_ID 0x12 + +#define BCM56762_DEVICE_ID 0xb762 +#define BCM56762_A0_REV_ID 1 +#define BCM56762_B0_REV_ID 0x11 + +#define BCM56764_DEVICE_ID 0xb764 +#define BCM56764_A0_REV_ID 1 +#define BCM56764_B0_REV_ID 0x11 + +#define BCM56765_DEVICE_ID 0xb765 +#define BCM56765_A0_REV_ID 1 +#define BCM56765_B0_REV_ID 0x11 + +#define BCM56766_DEVICE_ID 0xb766 +#define BCM56766_A0_REV_ID 1 +#define BCM56766_B0_REV_ID 0x11 + +#define BCM56768_DEVICE_ID 0xb768 +#define BCM56768_A0_REV_ID 1 +#define BCM56768_B0_REV_ID 0x11 + +/* Ranger 2+ */ +#define BCM56068_DEVICE_ID 0xb068 +#define BCM56068_A0_REV_ID 1 +#define BCM56068_B0_REV_ID 0x11 + +#define BCM56068_DEVICE_ID 0xb068 +#define BCM56068_A0_REV_ID 1 +#define BCM56068_B0_REV_ID 0x11 +#define BCM56068_B1_REV_ID 0x12 + +#define BCM56069_DEVICE_ID 0xb069 +#define BCM56069_A0_REV_ID 1 +#define BCM56069_B0_REV_ID 0x11 + +/* Hurricane3-MG */ +#define BCM56170_DEVICE_ID 0xb170 +#define BCM56170_A0_REV_ID 1 +#define BCM56170_B0_REV_ID 0x11 +#define BCM56172_DEVICE_ID 0xb172 +#define BCM56172_A0_REV_ID 1 +#define BCM56172_B0_REV_ID 0x11 +#define BCM56174_DEVICE_ID 0xb174 +#define BCM56174_A0_REV_ID 1 +#define BCM56174_B0_REV_ID 0x11 + +/* Quartz, Greyhound 2 */ +#define BCM53570_DEVICE_ID 0x8570 +#define BCM53570_A0_REV_ID 1 +#define BCM53570_B0_REV_ID 0x11 +#define BCM53575_DEVICE_ID 0x8575 +#define BCM53575_A0_REV_ID 1 +#define BCM53575_B0_REV_ID 0x11 + + +/* Tomahawk+ */ +#define BCM56965_DEVICE_ID 0xb965 +#define BCM56965_A0_REV_ID 1 +#define BCM56965_A1_REV_ID 2 +#define BCM56969_DEVICE_ID 0xb969 /* Corresponds to TH 56961 */ +#define BCM56969_A0_REV_ID 1 +#define BCM56966_DEVICE_ID 0xb966 /* Corresponds to TH 56962 */ +#define BCM56966_A0_REV_ID 1 +#define BCM56967_DEVICE_ID 0xb967 /* Corresponds to TH 56963 */ +#define BCM56967_A0_REV_ID 1 + +/* Tomahawk 2 */ +#define BCM56970_DEVICE_ID 0xb970 +#define BCM56970_A0_REV_ID 1 +#define BCM56970_B0_REV_ID 0x11 +#define BCM56971_DEVICE_ID 0xb971 +#define BCM56971_A0_REV_ID 1 +#define BCM56971_B0_REV_ID 0x11 +#define BCM56972_DEVICE_ID 0xb972 +#define BCM56972_A0_REV_ID 1 +#define BCM56972_B0_REV_ID 0x11 +#define BCM56974_DEVICE_ID 0xb974 +#define BCM56974_A0_REV_ID 1 +#define BCM56974_B0_REV_ID 0x11 +#define BCM56975_DEVICE_ID 0xb975 +#define BCM56975_A0_REV_ID 1 +#define BCM56975_B0_REV_ID 0x11 + +/* Trident3 */ +#define BCM56870_DEVICE_ID 0xb870 +#define BCM56870_A0_REV_ID 1 +#define BCM56873_DEVICE_ID 0xb873 +#define BCM56873_A0_REV_ID 1 + +/* Helix5 */ +#define BCM56370_DEVICE_ID 0xb370 +#define BCM56370_A0_REV_ID 1 +#define BCM56370_A1_REV_ID 0x02 +#define BCM56370_A2_REV_ID 0x03 + +#define BCM56371_DEVICE_ID 0xb371 +#define BCM56371_A0_REV_ID 1 +#define BCM56371_A1_REV_ID 0x02 +#define BCM56371_A2_REV_ID 0x03 + +#define BCM56372_DEVICE_ID 0xb372 +#define BCM56372_A0_REV_ID 1 +#define BCM56372_A1_REV_ID 0x02 +#define BCM56372_A2_REV_ID 0x03 + +#define BCM56374_DEVICE_ID 0xb374 +#define BCM56374_A0_REV_ID 1 +#define BCM56374_A1_REV_ID 0x02 +#define BCM56374_A2_REV_ID 0x03 + +#define BCM56375_DEVICE_ID 0xb375 +#define BCM56375_A0_REV_ID 1 +#define BCM56375_A1_REV_ID 0x02 +#define BCM56375_A2_REV_ID 0x03 + +#define BCM56376_DEVICE_ID 0xb376 +#define BCM56376_A0_REV_ID 1 +#define BCM56376_A1_REV_ID 0x02 +#define BCM56376_A2_REV_ID 0x03 + +#define BCM56377_DEVICE_ID 0xb377 +#define BCM56377_A0_REV_ID 1 +#define BCM56377_A1_REV_ID 0x02 +#define BCM56377_A2_REV_ID 0x03 + +#define BCM56577_DEVICE_ID 0xb577 +#define BCM56577_A0_REV_ID 1 +#define BCM56577_A1_REV_ID 0x02 +#define BCM56577_A2_REV_ID 0x03 + +#define BCM56578_DEVICE_ID 0xb578 +#define BCM56578_A0_REV_ID 1 +#define BCM56578_A1_REV_ID 0x02 +#define BCM56578_A2_REV_ID 0x03 + +#define BCM56579_DEVICE_ID 0xb579 +#define BCM56579_A0_REV_ID 1 +#define BCM56579_A1_REV_ID 0x02 +#define BCM56579_A2_REV_ID 0x03 + +/* Maverick2 */ +#define BCM56770_DEVICE_ID 0xb770 +#define BCM56770_A0_REV_ID 1 + +#define BCM56771_DEVICE_ID 0xb771 +#define BCM56771_A0_REV_ID 1 + +/* Wolfhound2 (Hurricane3-CR)*/ +#define BCM53540_DEVICE_ID 0x8540 +#define BCM53540_A0_REV_ID 1 +#define BCM53547_DEVICE_ID 0x8547 +#define BCM53547_A0_REV_ID 1 +#define BCM53548_DEVICE_ID 0x8548 +#define BCM53548_A0_REV_ID 1 +#define BCM53549_DEVICE_ID 0x8549 +#define BCM53549_A0_REV_ID 1 + +/* + * BCM5665: Tucana48 (48+4+1) + * BCM5665L: Tucana24 (24+4+1) + * BCM5666: Tucana48 (48+4+1) without L3 + * BCM5666L: Tucana24 (24+4+1) without L3 + * + * The device ID is 0x5665 for all of these parts. For BCM5665L and + * BCM5666L, the pbmp_valid property must be set to invalidate fe24-fe47 + * (see $SDK/rc/config.bcm). + */ +#define BCM5665_DEVICE_ID 0x5665 +#define BCM5665_A0_REV_ID 1 +#define BCM5665_B0_REV_ID 0x11 + + +/* + * BCM5655: Titanium48 (48+4) + * BCM5656: Titanium48 (48+4) without L3 + * + * The device ID is 0x5655 for both parts. + */ +#define BCM5655_DEVICE_ID 0x5655 +#define BCM5655_A0_REV_ID 1 +#define BCM5655_B0_REV_ID 0x11 + + +/* + * BCM5650: Titanium-II (24+4) + * BCM5651: Titanium-II (24+4) without L3 + * + * The device ID is 0x5650 for both parts. + * BCM5650C0 is the first spin of a real 24+4 cost-reduced chip. + */ +#define BCM5650_DEVICE_ID 0x5650 +#define BCM5650_A0_REV_ID 1 +#define BCM5650_B0_REV_ID 0x11 +#define BCM5650_C0_REV_ID 0x21 + +#define BROADCOM_PHYID_HIGH 0x0040 + +/* Define Dune device IDs */ +#define GEDI_DEVICE_ID 0xa100 /* 0xfa100 really */ +#define GEDI_REV_ID 0x0001 +#define ARAD_DEVICE_ID 0x8650 +#define ARAD_A0_REV_ID 0x0000 +#define ARAD_B0_REV_ID 0x0011 +#define ARAD_B1_REV_ID 0x0012 +#define BCM88650_DEVICE_ID ARAD_DEVICE_ID +#define BCM88650_A0_REV_ID ARAD_A0_REV_ID +#define BCM88650_B0_REV_ID ARAD_B0_REV_ID +#define BCM88650_B1_REV_ID ARAD_B1_REV_ID +#define BCM88750_DEVICE_ID 0x8750 +#define BCM88750_A0_REV_ID 0x0000 +#define BCM88750_B0_REV_ID 0x0011 +#define BCM88753_DEVICE_ID 0x8753 +#define BCM88753_A0_REV_ID 0x0000 +#define BCM88753_B0_REV_ID 0x0011 +#define BCM88754_DEVICE_ID 0x8754 +#define BCM88754_A0_REV_ID 0x0000 +#define BCM88754_ORIGINAL_VENDOR_ID 0x16FC +#define BCM88754_ORIGINAL_DEVICE_ID 0x020F +#define BCM88754_A0_ORIGINAL_REV_ID 0x0001 +#define BCM88755_DEVICE_ID 0x8755 +#define BCM88755_B0_REV_ID 0x0011 +#define BCM88770_DEVICE_ID 0x8770 +#define BCM88770_A1_REV_ID 0x0002 +#define BCM88773_DEVICE_ID 0x8773 +#define BCM88773_A1_REV_ID 0x0002 +#define BCM88774_DEVICE_ID 0x8774 +#define BCM88774_A1_REV_ID 0x0002 +#define BCM88775_DEVICE_ID 0x8775 +#define BCM88775_A1_REV_ID 0x0002 +#define BCM88776_DEVICE_ID 0x8776 +#define BCM88776_A1_REV_ID 0x0002 +#define BCM88777_DEVICE_ID 0x8777 +#define BCM88777_A1_REV_ID 0x0002 +#define BCM88950_DEVICE_ID 0x8950 +#define BCM88950_A0_REV_ID 0x0001 +#define BCM88950_A1_REV_ID 0x0002 +#define BCM88953_DEVICE_ID 0x8953 +#define BCM88953_A1_REV_ID 0x0002 +#define BCM88954_DEVICE_ID 0x8954 +#define BCM88954_A1_REV_ID 0x0002 +#define BCM88955_DEVICE_ID 0x8955 +#define BCM88955_A1_REV_ID 0x0002 +#define BCM88956_DEVICE_ID 0x8956 +#define BCM88956_A1_REV_ID 0x0002 +#define DNXC_A0_REV_ID 0x0001 +#define DNXC_A1_REV_ID 0x0002 +#define DNXC_B0_REV_ID 0x0011 +#define DNXC_B1_REV_ID 0x0012 +#define DNXC_DEVID_FAMILY_MASK 0xfff0 +#define BCM88790_DEVICE_ID 0x8790 +#define BCM88790_A0_REV_ID DNXC_A0_REV_ID +#define BCM88790_B0_REV_ID DNXC_B0_REV_ID +#define BCM88791_DEVICE_ID 0x8791 +#define BCM88792_DEVICE_ID 0x8792 +#define BCM88793_DEVICE_ID 0x8793 +#define BCM88794_DEVICE_ID 0x8794 +#define BCM88795_DEVICE_ID 0x8795 +#define BCM88796_DEVICE_ID 0x8796 +#define BCM88797_DEVICE_ID 0x8797 +#define BCM88798_DEVICE_ID 0x8798 +#define BCM88799_DEVICE_ID 0x8799 +#define BCM8879A_DEVICE_ID 0x879A +#define BCM8879B_DEVICE_ID 0x879B +#define BCM8879C_DEVICE_ID 0x879C +#define BCM8879D_DEVICE_ID 0x879D +#define BCM8879E_DEVICE_ID 0x879E +#define BCM8879F_DEVICE_ID 0x879F +#define ARADPLUS_DEVICE_ID 0x8660 +#define ARADPLUS_A0_REV_ID 0x0001 +#define BCM88660_DEVICE_ID ARADPLUS_DEVICE_ID +#define BCM88660_A0_REV_ID ARADPLUS_A0_REV_ID +/* Jericho */ +#define JERICHO_DEVICE_ID 0x8675 +#define JERICHO_A0_REV_ID 0x0001 +#define JERICHO_B0_REV_ID 0x0011 +#define JERICHO_A1_REV_ID 0x0002 +/* Jericho SKUs */ +#define BCM88670_DEVICE_ID 0x8670 +#define BCM88670_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88670_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88671_DEVICE_ID 0x8671 +#define BCM88671_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88671_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88671M_DEVICE_ID 0x867A +#define BCM88671M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88671M_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88670_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88671_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88671M_B0_REV_ID JERICHO_B0_REV_ID + +#define BCM88672_DEVICE_ID 0x8672 +#define BCM88672_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88672_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88672_B0_REV_ID JERICHO_B0_REV_ID + +#define BCM88673_DEVICE_ID 0x8673 +#define BCM88673_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88673_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88674_DEVICE_ID 0x8674 +#define BCM88674_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88674_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88675_DEVICE_ID JERICHO_DEVICE_ID +#define BCM88675_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88675_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88675M_DEVICE_ID 0x867B +#define BCM88675M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88675M_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88676_DEVICE_ID 0x8676 +#define BCM88676_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88676_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88676M_DEVICE_ID 0x867C +#define BCM88676M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88676M_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88677_DEVICE_ID 0x8677 +#define BCM88677_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88677_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88678_DEVICE_ID 0x8678 +#define BCM88678_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88678_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88679_DEVICE_ID 0x8679 +#define BCM88679_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88679_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88673_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88674_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88675_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88675M_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88676_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88676M_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88677_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88678_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88679_B0_REV_ID JERICHO_B0_REV_ID +/* Qumran MX */ +#define QMX_DEVICE_ID 0x8375 +#define QMX_A0_REV_ID 0x0001 +#define QMX_B0_REV_ID 0x0011 +#define QMX_A1_REV_ID 0x0002 +/* Qumran MX SKUs*/ +#define BCM88370_DEVICE_ID 0x8370 +#define BCM88370_A0_REV_ID QMX_A0_REV_ID +#define BCM88370_A1_REV_ID QMX_A1_REV_ID +#define BCM88371_DEVICE_ID 0x8371 +#define BCM88371_A0_REV_ID QMX_A0_REV_ID +#define BCM88371_A1_REV_ID QMX_A1_REV_ID +#define BCM88371M_DEVICE_ID 0x837A +#define BCM88371M_A0_REV_ID QMX_A0_REV_ID +#define BCM88371M_A1_REV_ID QMX_A1_REV_ID +#define BCM88375_DEVICE_ID QMX_DEVICE_ID +#define BCM88375_A0_REV_ID QMX_A0_REV_ID +#define BCM88375_A1_REV_ID QMX_A1_REV_ID +#define BCM88376_DEVICE_ID 0x8376 +#define BCM88376_A0_REV_ID QMX_A0_REV_ID +#define BCM88376_A1_REV_ID QMX_A1_REV_ID +#define BCM88376M_DEVICE_ID 0x837B +#define BCM88376M_A0_REV_ID QMX_A0_REV_ID +#define BCM88376M_A1_REV_ID QMX_A1_REV_ID +#define BCM88377_DEVICE_ID 0x8377 +#define BCM88377_A0_REV_ID QMX_A0_REV_ID +#define BCM88377_A1_REV_ID QMX_A1_REV_ID +#define BCM88378_DEVICE_ID 0x8378 +#define BCM88378_A0_REV_ID QMX_A0_REV_ID +#define BCM88378_A1_REV_ID QMX_A1_REV_ID +#define BCM88379_DEVICE_ID 0x8379 +#define BCM88379_A0_REV_ID QMX_A0_REV_ID +#define BCM88379_A1_REV_ID QMX_A1_REV_ID + +#define BCM88370_B0_REV_ID QMX_B0_REV_ID +#define BCM88371_B0_REV_ID QMX_B0_REV_ID +#define BCM88371M_B0_REV_ID QMX_B0_REV_ID +#define BCM88375_B0_REV_ID QMX_B0_REV_ID +#define BCM88376_B0_REV_ID QMX_B0_REV_ID +#define BCM88376M_B0_REV_ID QMX_B0_REV_ID +#define BCM88377_B0_REV_ID QMX_B0_REV_ID +#define BCM88378_B0_REV_ID QMX_B0_REV_ID +#define BCM88379_B0_REV_ID QMX_B0_REV_ID + + +#define JERICHO_PLUS_DEVICE_ID 0x8680 +#define JERICHO_PLUS_A0_REV_ID 0x0001 +#define BCM88680_DEVICE_ID JERICHO_PLUS_DEVICE_ID +#define BCM88680_A0_REV_ID JERICHO_PLUS_A0_REV_ID +#define BCM88680_A1_REV_ID 0x0002 + + +#define BCM88681_DEVICE_ID 0x8681 +#define BCM88681_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88682_DEVICE_ID 0x8682 +#define BCM88682_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88683_DEVICE_ID 0x8683 +#define BCM88683_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88684_DEVICE_ID 0x8684 +#define BCM88684_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88685_DEVICE_ID 0x8685 +#define BCM88685_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88687_DEVICE_ID 0x8687 +#define BCM88687_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88380_DEVICE_ID 0x8380 +#define BCM88380_A0_REV_ID JERICHO_PLUS_A0_REV_ID +#define BCM88381_DEVICE_ID 0x8381 +#define BCM88381_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define JERICHO_2_DEVICE_ID 0x8690 +#define JERICHO_2_A0_REV_ID DNXC_A0_REV_ID +#define JERICHO_2_B0_REV_ID DNXC_B0_REV_ID +#define JERICHO_2_B1_REV_ID DNXC_B1_REV_ID +#define BCM88690_DEVICE_ID JERICHO_2_DEVICE_ID +#define BCM88690_A0_REV_ID JERICHO_2_A0_REV_ID +#define BCM88690_B0_REV_ID JERICHO_2_B0_REV_ID +#define BCM88690_B1_REV_ID JERICHO_2_B1_REV_ID +#define BCM88691_DEVICE_ID 0x8691 +#define BCM88692_DEVICE_ID 0x8692 +#define BCM88693_DEVICE_ID 0x8693 +#define BCM88694_DEVICE_ID 0x8694 +#define BCM88695_DEVICE_ID 0x8695 +#define BCM88696_DEVICE_ID 0x8696 +#define BCM88697_DEVICE_ID 0x8697 +#define BCM88698_DEVICE_ID 0x8698 +#define BCM88699_DEVICE_ID 0x8699 +#define BCM8869A_DEVICE_ID 0x869A +#define BCM8869B_DEVICE_ID 0x869B +#define BCM8869C_DEVICE_ID 0x869C +#define BCM8869D_DEVICE_ID 0x869D +#define BCM8869E_DEVICE_ID 0x869E +#define BCM8869F_DEVICE_ID 0x869F + +#define J2C_DEVICE_ID 0x8800 +#define J2C_2ND_DEVICE_ID 0x8820 +#define J2C_DEVID_FAMILY_MASK 0xffd0 +#define J2C_A0_REV_ID DNXC_A0_REV_ID +#define BCM88800_DEVICE_ID J2C_DEVICE_ID +#define BCM88820_DEVICE_ID J2C_2ND_DEVICE_ID +#define BCM88800_A0_REV_ID J2C_A0_REV_ID +#define BCM88821_DEVICE_ID 0x8821 +#define BCM88826_DEVICE_ID 0x8826 +#define BCM88802_DEVICE_ID 0x8802 +#define BCM88803_DEVICE_ID 0x8803 +#define BCM88804_DEVICE_ID 0x8804 +#define BCM88822_DEVICE_ID 0x8822 +#define BCM88823_DEVICE_ID 0x8823 +#define BCM88824_DEVICE_ID 0x8824 +#define BCM88825_DEVICE_ID 0x8825 + +#define J2P_DEVICE_ID 0x8850 +#define J2P_A0_REV_ID DNXC_A0_REV_ID +#define BCM88850_DEVICE_ID J2P_DEVICE_ID +#define BCM88850_A0_REV_ID J2P_A0_REV_ID + +#define Q2A_DEVICE_ID 0x8480 +#define Q2A_A0_REV_ID DNXC_A0_REV_ID +#define Q2A_B0_REV_ID DNXC_B0_REV_ID +#define BCM88480_DEVICE_ID Q2A_DEVICE_ID +#define BCM88480_A0_REV_ID Q2A_A0_REV_ID +#define BCM88480_B0_REV_ID Q2A_B0_REV_ID +#define BCM88481_DEVICE_ID 0x8481 +#define BCM88482_DEVICE_ID 0x8482 +#define BCM88483_DEVICE_ID 0x8483 +#define BCM88484_DEVICE_ID 0x8484 +#define BCM88485_DEVICE_ID 0x8485 +#define BCM88486_DEVICE_ID 0x8486 +#define BCM88487_DEVICE_ID 0x8487 +#define BCM88488_DEVICE_ID 0x8488 +#define BCM88489_DEVICE_ID 0x8489 +#define BCM8848A_DEVICE_ID 0x848A +#define BCM8848B_DEVICE_ID 0x848B +#define BCM8848C_DEVICE_ID 0x848C +#define BCM8848D_DEVICE_ID 0x848D +#define BCM8848E_DEVICE_ID 0x848E +#define BCM8848F_DEVICE_ID 0x848F + +#define QAX_DEVICE_ID 0x8470 +#define QAX_A0_REV_ID 0x0001 +#define QAX_B0_REV_ID 0x0011 +#define BCM88470_DEVICE_ID QAX_DEVICE_ID +#define BCM88470_B0_REV_ID QAX_B0_REV_ID +#define BCM88470P_DEVICE_ID 0x847C +#define BCM88471_DEVICE_ID 0x8471 +#define BCM88473_DEVICE_ID 0x8473 +#define BCM88474_DEVICE_ID 0x8474 +#define BCM88474H_DEVICE_ID 0x847B +#define BCM88476_DEVICE_ID 0x8476 +#define BCM88477_DEVICE_ID 0x8477 + + + + +#define BCM88470_A0_REV_ID QAX_A0_REV_ID + +#define QUX_DEVICE_ID 0x8270 +#define QUX_A0_REV_ID 0x0001 +#define QUX_A1_REV_ID 0x0002 +#define QUX_B0_REV_ID 0x0011 +#define BCM88270_DEVICE_ID QUX_DEVICE_ID +#define BCM88270_A0_REV_ID QUX_A0_REV_ID +#define BCM88270_A1_REV_ID QUX_A1_REV_ID +#define BCM88272_DEVICE_ID 0x8272 +#define BCM88273_DEVICE_ID 0x8273 +#define BCM88274_DEVICE_ID 0x8274 +#define BCM88278_DEVICE_ID 0x8278 +#define BCM88279_DEVICE_ID 0x8279 + +#define FLAIR_DEVICE_ID 0xF000 +#define FLAIR_A0_REV_ID 0x0001 +#define BCM8206_DEVICE_ID FLAIR_DEVICE_ID +#define BCM8206_A0_REV_ID FLAIR_A0_REV_ID + +#define ARDON_DEVICE_ID 0x8202 +#define ARDON_A0_REV_ID 0x0000 +#define BCM88202_DEVICE_ID ARDON_DEVICE_ID +#define BCM88202_A0_REV_ID ARDON_A0_REV_ID +#define ARDON_A1_REV_ID 0x0001 +#define BCM88202_A1_REV_ID ARDON_A1_REV_ID +#define ARDON_A2_REV_ID 0x0002 +#define BCM88202_A2_REV_ID ARDON_A2_REV_ID +#define BCM2801PM_DEVICE_ID 0x2801 +#define BCM2801PM_A0_REV_ID 0x0000 +#define BCM88360_DEVICE_ID 0x8360 +#define BCM88360_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88361_DEVICE_ID 0x8361 +#define BCM88361_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88363_DEVICE_ID 0x8363 +#define BCM88363_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88460_DEVICE_ID 0x8460 +#define BCM88460_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88461_DEVICE_ID 0x8461 +#define BCM88461_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88560_DEVICE_ID 0x8560 +#define BCM88560_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88561_DEVICE_ID 0x8561 +#define BCM88561_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88562_DEVICE_ID 0x8562 +#define BCM88562_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88661_DEVICE_ID 0x8661 +#define BCM88661_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88664_DEVICE_ID 0x8664 +#define BCM88664_A0_REV_ID ARADPLUS_A0_REV_ID + + +#define BCM88350_DEVICE_ID 0x8350 +#define BCM88350_B1_REV_ID ARAD_B1_REV_ID +#define BCM88351_DEVICE_ID 0x8351 +#define BCM88351_B1_REV_ID ARAD_B1_REV_ID +#define BCM88450_DEVICE_ID 0x8450 +#define BCM88450_B1_REV_ID ARAD_B1_REV_ID +#define BCM88451_DEVICE_ID 0x8451 +#define BCM88451_B1_REV_ID ARAD_B1_REV_ID +#define BCM88550_DEVICE_ID 0x8550 +#define BCM88550_B1_REV_ID ARAD_B0_REV_ID +#define BCM88551_DEVICE_ID 0x8551 +#define BCM88551_B1_REV_ID ARAD_B1_REV_ID +#define BCM88552_DEVICE_ID 0x8552 +#define BCM88552_B1_REV_ID ARAD_B1_REV_ID +#define BCM88651_DEVICE_ID 0x8651 +#define BCM88651_B1_REV_ID ARAD_B1_REV_ID +#define BCM88654_DEVICE_ID 0x8654 +#define BCM88654_B1_REV_ID ARAD_B1_REV_ID + +#define BCM88772_DEVICE_ID 0x8772 +#define BCM88952_DEVICE_ID 0x8952 +#define BCM88772_A1_REV_ID 0x0002 +#define BCM88952_A0_REV_ID 0x0001 +#define BCM88952_A1_REV_ID 0x0002 + +#define BCM88752_DEVICE_ID 0x8752 +#define BCM88752_A0_REV_ID 0x0000 +#define BCM88752_B0_REV_ID 0x0011 + + +#define BCM83207_DEVICE_ID 0x3207 +#define BCM83208_DEVICE_ID 0x3208 +#define BCM83207_A0_REV_ID 0x0001 +#define BCM83208_A0_REV_ID 1 + +#define PCP_PCI_VENDOR_ID 0x1172 +#define PCP_PCI_DEVICE_ID 0x4 + +#define ACP_PCI_VENDOR_ID 0x10ee +#define ACP_PCI_DEVICE_ID 0x7011 +#define ACP_PCI_REV_ID 0x0001 + +#define PLX9056_DEVICE_ID 0x9056 /* needed for DNX_TEST_BOARD */ + +#ifdef BCM_LTSW_SUPPORT +/* Trident4 */ +#define BCM56880_DEVICE_ID 0xb880 +#define BCM56880_A0_REV_ID 0x0001 +#endif /* BCM_LTSW_SUPPORT */ +#endif /* !_SOC_DEVIDS_H */ + diff --git a/platform/broadcom/saibcm-modules-invsai/make/Make.config b/platform/broadcom/saibcm-modules-invsai/make/Make.config new file mode 100644 index 00000000000..b8fa17bda11 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Make.config @@ -0,0 +1,365 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Make.config,v 1.3 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# + +ifneq ($(strip $(override-target)),) +override TARGET=$(override-target) +endif + +export TARGET + +# +# Set up the target name, and the target base variables. +# +# target = The full name of the target such as vxworks-bmw +# targetbase = 1st part of target (e.g. vxworks) +# targetplat = 2nd part of target (e.g. x86) if any; otherwise same as 1st +# +target = ${TARGET} +targetsplt = $(subst -, , ${target}) # change hyphens to spaces +targetbase = $(word 1,${targetsplt}) +targetplat = $(subst ${targetbase}-,,${TARGET}) + +# +# Common configuration for all platforms +# (Additional platform-dependent configurations are in Makefile.xxx) +# + +# +# THIS FILE SHOULD NOT BE MODIFIED LOCALLY, to override, add a file +# $SDK/make/Make.local that sets your local settings, and/or provide +# a path to your settings using the MAKE_LOCAL variable. If +# either of these files exists, their values will override those in this makefile. +# +ifdef MAKE_LOCAL +-include ${MAKE_LOCAL} +endif + +-include ${SDK}/make/Make.local + +ifdef ALL_CHIPS + ROBO_CHIPS = 1 + ESW_CHIPS = 1 +else + ifndef ROBO_CHIPS + ESW_CHIPS = 1 + endif +endif # ALL_CHIPS + +# +# By default, turn off the "changing directory" message. +# +MAKEFLAGS += --no-print-directory + +# +# Use gmake by default +# + +include ${SDK}/make/Make.tools +include ${SDK}/make/Makefile.${target} + +# use QUIET=1 to control printing of compilation lines +ifdef QUIET +Q:=@ +else +Q:= +endif + +# +# Suffix to add to the "target" files to allow local builds with different +# flags. Set "target_suffix" to XXX to cause the build to put built objects +# in ${target}${target_suffix}. This allows things like building a debug +# version with different flags. This may also be set in another Makefile. +# + +#target_suffix := + +# +# Optional suffix to add to the build directory and output binary files +# to allow multiple builds to co-exist for various reasons. +# +#chip_suffix := -$(shell echo $(CHIP) | tr A-Z a-z) + +# +# Combined suffixes +# +all_suffix = ${chip_suffix}${target_suffix} + +# +# Default location to place binaries and make depend files for building +# purposes. +# +ifeq "$(HOSTTYPE)" "Windows2000PC" +BLDROOTWITHDRIVE = ${SDK}/build/${target}${all_suffix}${bldroot_suffix} +BLDROOT = ${SDK_NO_DRIVE_NAME}/build/${target}${all_suffix}${bldroot_suffix} +else # ifeq "$(HOSTTYPE)" "Windows2000PC" + +ifndef SDKBUILD +SDKBUILD :=build +endif + +BLDROOT = ${SDK}/${SDKBUILD}/$(if ${BLDCONFIG},${BLDCONFIG}/)${target}${all_suffix}${bldroot_suffix} + +endif # ifeq "$(HOSTTYPE)" "Windows2000PC" + +# This is needed because we cannot include Make.vxworks before Make.config +ifndef DEST_DIR_SUFFIX +export DEST_DIR_SUFFIX :=$(subst $(realpath $(SDK))/systems,,$(realpath $(CURDIR)/$(dir ($(firstword $(MAKEFILE_LIST)))))) +ifeq ($(MAKELEVEL),0) +endif +endif + +ifeq ($(DEST_DIR),) +export DEST_DIR :=${SDK}/${SDKBUILD}$(if ${BLDCONFIG},/${BLDCONFIG})$(DEST_DIR_SUFFIX) +endif + +ifdef LOCALDIR +BLDDIR = ${BLDROOT}/${LOCALDIR} +ifeq "$(HOSTTYPE)" "Windows2000PC" +BLDDIRWITHDRIVE = ${BLDROOTWITHDRIVE}/${LOCALDIR} +endif +else # ifdef LOCALDIR +BLDDIR = ${BLDROOT} +ifeq "$(HOSTTYPE)" "Windows2000PC" +BLDDIRWITHDRIVE = ${BLDROOTWITHDRIVE} +endif +endif # ifdef LOCALDIR + +LIBDIR = ${BLDROOT} + +# +# Export directory, where build objects used by the outside world are +# placed (exported header files, libs, bins) +# +EXPDIR = ${SDK}/export/${target}${all_suffix} + +# +# Standard include paths +# +INCDIR = ${SDK}/include + +# +# Compilation Flags +# +# Flags may be added to (see below) +# + +INCFLAGS = -I${INCDIR} -I${SDK}/systems + +CFLAGS += ${INCFLAGS} +CXXFLAGS += ${INCFLAGS} +CPPFLAGS += ${INCFLAGS} + +CFLAGS += -DSAI_FIXUP -DBCM_PORT_DEFAULT_DISABLE -DBCM_VLAN_NO_DEFAULT_ETHER -DBCM_VLAN_NO_DEFAULT_CPU -DBCM_WARM_BOOT_SUPPORT -DSAL_CONFIG_FILE_DISABLE -DSAL_THREAD_NAME_PRINT_DISABLE -UKCOM_FILTER_MAX -DKCOM_FILTER_MAX=256 -DALPM_ENABLE -DOPENNSL_PHY_ROUTINES -DTH2_CPU_POOL_SETUP -DINCLUDE_L3 -DSAI_ONLY -DPRINT_TO_SYSLOG -D_SHR_PBMP_WIDTH=256 -DINCLUDE_DIAG_SHELL -DSTATIC=static -DLOG_TEST -DLOG_SAI -D_GNU_SOURCE + +# +# Debug #ifdef control +# +# Compiling out #ifdef DEBUG code saves about 1.3% on executable size. +# It is recommended to leave debug enabled when developing applications. +# +ifndef DEBUG_IFDEFS +DEBUG_IFDEFS=TRUE +endif + +ifeq ($(DEBUG_IFDEFS),TRUE) +CFLAGS += -DBROADCOM_DEBUG +CXXFLAGS += -DBROADCOM_DEBUG +CPPFLAGS += -DBROADCOM_DEBUG +endif + +# +# Debug symbol information control +# +ifndef DEBUG_SYMBOLS +DEBUG_SYMBOLS=TRUE +endif + +ifeq ($(DEBUG_SYMBOLS),TRUE) +CFLAGS += -g +CXXFLAGS += -g +CPPFLAGS += -g +endif + +# +# If DEBUG_CFLAGS is set, add its contents to CFLAGS. +# May be useful for setting on the command line or adding to Make.local. +# Example: gmake DEBUG_CFLAGS=-save-temps system.c +# + +ifneq ($(DEBUG_CFLAGS),) +CFLAGS += $(DEBUG_CFLAGS) +CXXFLAGS += $(DEBUG_CFLAGS) +CPPFLAGS += $(DEBUG_CFLAGS) +endif + +# +# Optimization level +# +# Set DEBUG_OPTIMIZE to TRUE (default) to use a normal optimization +# determined by OPTFLAGS_DEFAULT in the platform Makefile. +# Set DEBUG_OPTIMIZE to FALSE to use no optimization, +# strongly recommended when using any debugger. +# Set DEBUG_OPTIMIZE to any other option string to request specific +# optimization flags (for example -O2). +# +ifndef DEBUG_OPTIMIZE +DEBUG_OPTIMIZE=TRUE +endif + +ifeq ($(DEBUG_OPTIMIZE),TRUE) +OPTFLAGS += $(OPTFLAGS_DEFAULT) +else +ifneq ($(DEBUG_OPTIMIZE),FALSE) +OPTFLAGS += $(DEBUG_OPTIMIZE) +endif +endif + +# +# Debug assertion control. +# +# Compiling out assert() saves about 1.1% on executable size, +# however doing so is VERY MUCH discouraged. +# +ifndef DEBUG_ASSERTS +DEBUG_ASSERTS=TRUE +endif + +ifeq ($(DEBUG_ASSERTS),FALSE) +CFLAGS += -DNDEBUG +CXXFLAGS += -DNDEBUG +CPPFLAGS += -DNDEBUG +endif + +# +# GCC pedantic mode. +# +ifeq ($(DEBUG_PEDANTIC),TRUE) +CFGFLAGS += -D__PEDANTIC__ +CFLAGS += --pedantic +CXXFLAGS += --pedantic +endif + +# +# In each directory, build a list of local sources, objects, and headers +# +LSRCS = $(wildcard *.c *.cpp *.s *.cc *.C) +LOBJS = $(addsuffix .o, $(basename ${LSRCS})) +BOBJS = $(addprefix ${BLDDIR}/,${LOBJS}) +LHDRS = $(wildcard *.h *.H) +LDOTIS = $(wildcard *.i) + + +# +# Rule to create object file (build) directory +# + +.PHONY: all install clean distclean + +.PRECIOUS: ${BLDDIR}/.tree + +%/.tree: + @$(ECHO) 'Creating build directory $(dir $@)' + @$(MKDIR) $(dir $@) + @$(ECHO) "Build Directory for ${LOCALDIR} Created" > $@ + +# Rule allowing build through CPP only, creates .E file from .c file. + +%.E: %.c + $Q${CC} -E ${CFLAGS} $< | sed -e '/^ *$$/d' -e p -e d > $@ + +# Rule allowing build through source only, creates .s file from .c file. + +%.s: %.c + $Q${CC} -S ${CFLAGS} $< + +# +# Default Build rules for .c --> .o, leaving the binary in BLDDIR/X.o, +# even if file not built from directory of source. +# +ifeq ($(FAST),1) +${BLDDIR}/%.o: %.c +else +ifdef GENERATE_C_FILES +${BLDDIR}/%.o: %.c +else +${BLDDIR}/%.o: %.c +endif +endif +ifdef QUIET + @${ECHO} Compiling ${LOCALDIR}/$< +endif +ifdef LOCAL_D_FILE + $Q$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -o $@ -c $< --write-user-dependencies + -@/bin/cp $*.d $(BLDDIR)/$*.d + -@/bin/rm -f $*.d +else + $Q$(CC) -MD -MF $(BLDDIR)/$*.d $(CFLAGS) $(EXTRA_CFLAGS) -o $@ -c $< +endif + @/bin/cp $(BLDDIR)/$*.d $(BLDDIR)/$*.tmp;\ + /bin/sed -e 's/#.*//' -e 's/^[^:]*: *//' -e 's/ *\\$$//' \ + -e '/^$$/ d' -e 's/$$/ :/' \ + < $(BLDDIR)/$*.d >> $(BLDDIR)/$*.tmp; \ + /bin/sed \ + -e 's| \([0-9a-zA-Z]\)| '$(SDK)/$(LOCALDIR)'\/\1|g' \ + -e 's|^\([0-9a-zA-Z]\)|'$(SDK)/$(LOCALDIR)'/\1|g' \ + -e 's| \(\.\.\/\)| '$(SDK)/$(LOCALDIR)'\/\1|g' \ + -e 's|'$(SDK)'|'$$\{SDK\}'|g' \ + -e 's/\w*\/\.\.\/*//g' \ + -e 's/\w*\/\.\.\/*//g' \ + -e 's/\w*\/\.\.\/*//g' \ + < $(BLDDIR)/$*.tmp > $(BLDDIR)/$*.P; \ + /bin/rm -f $(BLDDIR)/$*.d $(BLDDIR)/$*.tmp + +${BLDDIR}/%.o: %.s +ifdef QUIET + @${ECHO} Assembling ${LOCALDIR}/$< +endif + $Q${CC} ${CFLAGS} ${EXTRA_CFLAGS} -c $< -o $@ + +${BLDDIR}/%.o: %.cpp +ifdef QUIET + @${ECHO} Compiling ${LOCALDIR}/$< +endif + $Q${CXX} -c ${CXXFLAGS} -c $< -o $@ + +${BLDDIR}/%.o: %.cc ${BLDDIR}/.tree +ifdef QUIET + @${ECHO} Compiling ${LOCALDIR}/$< +endif + $Q${CXX} -c ${CXXFLAGS} -c $< -o $@ + +# +# Cause "make foo.o" in any subdirectory to put the object in the build +# directory instead of the local directory. +# +%.o: ${BLDDIR}/%.o + @ + +# +# List of directories where built objects live. +# (we are not making the export directories for now) +# +#DIRS = ${BLDDIR} ${EXPDIR}/lib ${EXPDIR}/bin ${EXPDIR}/include +DIRS = ${BLDDIR} + +ifeq (C_COMPILER,$(MAKECMDGOALS)) +C_COMPILER: + @echo $(CC) +endif diff --git a/platform/broadcom/saibcm-modules-invsai/make/Make.depend b/platform/broadcom/saibcm-modules-invsai/make/Make.depend new file mode 100644 index 00000000000..de709938766 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Make.depend @@ -0,0 +1,108 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Make.depend,v 1.14 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +# Default rule to build dependencies. This builds a x.d file for each +# x.c file that describes the dependencies. We then conditionally include +# the generated .d files. +# + +# +# If making 'clean', do not include any .d files. If they are included, +# gmake intrinsically tries to remake them all. +# +ifeq (,$(findstring clean,$(MAKECMDGOALS))) + +ZFS :=$(wildcard *.zf) +ZFC := $(ZFS:.zf=.c) + +ifdef GENERATE_C_FILES +ifndef GEN_INCS +$(error "GEN_INCS was not defined") +endif + +ZF_GEN = ${SDK}/tools/zFrameCodeGen.pl + +# 1=.zf +define ZFS_RULE +$(1:.zf=Console.c) : $(1:.zf=.c) + @echo updated $$@ from $$? + +$(1:.zf=.c) : $(1) $(ZF_GEN) + @$(PERL) $(ZF_GEN) -s -z . -p . -g $1 -t c + @echo generated ${LOCALDIR}/$$@ from $(1) + @mv $$(*F).cx $$@ + @if [ -e $$(*F)Console.cx ] ; then \ + mv $$(*F)Console.cx $$(*F)Console.c; \ + echo Created $$(*F)Console.c ;\ + fi + @if [ -e $$(*F)Console.hx ] ; then \ + echo Created $(GEN_INCS)/$$(*F)Console.hx ;\ + mv $$(*F)Console.hx $(GEN_INCS)/ ; \ + fi + @mv $$(*F).hx $(GEN_INCS)/ +endef + +$(foreach zf,$(ZFS),$(eval $(call ZFS_RULE,$(zf)))) + +${BLDDIR}/%.P : ${BLDDIR}/.tree %.c + +.PHONY: GENFILES +GENFILES: $(ZFC) + +$(BOBJS) : $(ZFC) + +else +# +# Attempt to build the depend files. If it fails, the depend file is +# removed so that it is not included in later builds. +# +${BLDDIR}/%.P : %.c ${BLDDIR}/.tree + @$(ECHO) Dependencies for ${LOCALDIR}/$< + +${BLDDIR}/%.P : %.cc ${BLDDIR}/.tree + @$(ECHO) Dependencies for ${LOCALDIR}/$< + +endif + +# +# If there are C or C++ files in this directory, include the +# depend files for them. +# + +ifeq ($(findstring _COMPILER,$(MAKECMDGOALS))$(findstring variable,$(MAKECMDGOALS)),) +ifneq ($(strip ${LSRCS}),) +ifneq (,$(findstring .o,$(MAKECMDGOALS))) +-include $(addprefix ${BLDDIR}/,$(MAKECMDGOALS:.o=.P)) $(addprefix ${BLDDIR}/,$(MAKECMDGOALS:.o=.sig)) +else +-include $(addprefix ${BLDDIR}/,$(addsuffix .P,$(basename $(LSRCS)))) $(addprefix ${BLDDIR}/,$(addsuffix .sig,$(basename $(LSRCS)))) +endif +endif +endif + +endif # !CLEANING + +clean_d:: +ifdef QUIET + @$(ECHO) Cleaning dependencies for ${LOCALDIR} +endif +ifdef GENERATE_C_FILES + $Q$(RM) $(ZFC:%=$(SDK)/$(LOCALDIR)/%) $(ZFC:%.c=$(SDK)/$(LOCALDIR)/%Console.c) +endif + +clean:: clean_d diff --git a/platform/broadcom/saibcm-modules-invsai/make/Make.kernlib b/platform/broadcom/saibcm-modules-invsai/make/Make.kernlib new file mode 100644 index 00000000000..6ec8a1c8df7 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Make.kernlib @@ -0,0 +1,69 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Make.kernlib,v 1.7 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +# Make rules/targets for handling libraries + +.SECONDARY:: ${BOBJS} + +targetlibsoname = ${lib}.so.${SHAREDLIBVER} +targetlibrealname = ${targetlibsoname} +targetlibso = ${LIBDIR}/${targetlibrealname} + +ifeq ($(TOOLS),Borland) + +LIBSUFFIX=lib + +${LIBDIR}/%.lib: ${BORLAND_BOBJS} + $(RM) $@ + $(FOREACH) -subdir "$(LIBDIR)" \ + "tlib $@ $(foreach obj, $(BORLAND_LOBJS), +-$(obj))" + +else # !Borland + +LIBSUFFIX=a + +${LIBDIR}/%.a: ${BOBJS} +ifdef QUIET + @$(ECHO) Building library $(notdir $@) +endif + $Q$(RM) $@ + $Q$(AR) ${ARFLAGS} $@ $(sort ${BOBJS}) +ifeq ($(LINUX_MAKE_SHARED_LIB),1) +ifeq ($(targetbase),unix) + $(CC) -shared -Wl,-soname,${targetlibsoname} -o ${targetlibso} ${BOBJS} -lc +endif +endif # LINUX_MAKE_SHARED_LIB # +endif # !Borland + +targetlib = ${LIBDIR}/${lib}.${LIBSUFFIX} + +all:: ${BLDDIR}/.tree ${targetlib} + +install:: all + +clean:: +ifdef QUIET + @$(ECHO) Cleaning objects for ${LOCALDIR} and ${lib} +endif + $Q$(RM) ${BOBJS} + $Q$(RM) ${targetlib} + $Q$(RM) ${targetlibso} + +distclean:: clean + diff --git a/platform/broadcom/saibcm-modules-invsai/make/Make.lib b/platform/broadcom/saibcm-modules-invsai/make/Make.lib new file mode 100644 index 00000000000..d67325c5dd2 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Make.lib @@ -0,0 +1,80 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Make.lib,v 1.14 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +# Make rules/targets for handling libraries + +.SECONDARY:: ${BOBJS} + +BOBJS_FAST = ${BOBJS} +BOBJS_MAKE_CMD = + +ifeq ($(FAST),1) + ifneq ($(strip $(BOBJS)),) + BOBJS_FAST = + BOBJS_ARGS = -j9 + BOBJS_MAKE_CMD = pwd && make LSRUN=$(SDK)/tools/lsrun.pl $(BOBJS_ARGS) ${BOBJS} + endif +endif + +ifeq ($(TOOLS),Borland) + +LIBSUFFIX=lib + +${LIBDIR}/%.lib: ${BORLAND_BOBJS} + $(RM) $@ + $(FOREACH) -subdir "$(LIBDIR)" \ + "tlib $@ $(foreach obj, $(BORLAND_LOBJS), +-$(obj))" + +else # !Borland + +ifeq ($(LINUX_MAKE_SHARED_LIB),1) +LIBSUFFIX=so.${SHAREDLIBVER} +else +LIBSUFFIX=a +endif + +targetlib = ${LIBDIR}/${lib}.${LIBSUFFIX} + +all:: ${BLDDIR}/.tree ${targetlib} + +${LIBDIR}/%.${LIBSUFFIX}: ${BOBJS_FAST} + $(BOBJS_MAKE_CMD) +ifdef QUIET + @$(ECHO) Building library $(notdir $@) +endif + $Q$(RM) $@ +ifeq ($(LINUX_MAKE_SHARED_LIB),1) + $(CC) -shared -Wl,-soname,${lib}.${LIBSUFFIX}${EXTRA_LIB_LDFLAGS} -o ${targetlib} ${BOBJS} -lc +else + ${Q}cd $(dir $(word 1,${BOBJS}));$(AR) ${ARFLAGS} $@ $(sort $(notdir ${BOBJS})) +endif + +endif # !Borland + + +install:: all + +clean:: +ifdef QUIET + @$(ECHO) Cleaning objects for ${LOCALDIR} and ${lib} +endif + $Q$(RM) ${BOBJS} + $Q$(RM) ${targetlib} + +distclean:: clean diff --git a/platform/broadcom/saibcm-modules-invsai/make/Make.linux b/platform/broadcom/saibcm-modules-invsai/make/Make.linux new file mode 100644 index 00000000000..bd86ca351b6 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Make.linux @@ -0,0 +1,97 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# $Id: Make.linux,v 1.18 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +# Common make targets for Linux user and kernel builds included by top +# level Linux makefiles +# +# Variables referenced: +# +# LINUX_MAKE_FLAGS +# Additional flags passed to Make +# +# LINUX_MAKE_USER +# Defined: user build +# Undefined: kernel build +# +# LINUX_MAKE_DIR +# Common makefile location, if it is not ../common +# +# + +export DEST_DIR_SUFFIX :=$(subst $(realpath $(SDK))/systems,,$(realpath $(CURDIR)/$(dir ($(firstword $(MAKEFILE_LIST)))))) + +ifeq (,$(kernel_version)) +kernel_version=2_4 +endif + +ifndef LINUX_MAKE_SHARED_LIB +LINUX_MAKE_SHARED_LIB=0 +endif + +ifeq (,$(SHAREDLIBVER)) +SHAREDLIBVER=1 +endif + +ifndef LINUX_MAKE_DIR +ifdef LINUX_MAKE_USER +LINUX_MAKE_DIR := $(SDK)/systems/linux/user/common +else +LINUX_MAKE_DIR := $(SDK)/systems/linux/kernel/common +endif +endif + +ifdef LINUX_MAKE_USER + CMD = $(LINUX_MAKE_FLAGS) -C $(LINUX_MAKE_DIR) \ + platform=$(platform) bldroot_suffix=/$(platform) kernel_version=$(kernel_version) \ + LINUX_MAKE_SHARED_LIB=$(LINUX_MAKE_SHARED_LIB) SHAREDLIBVER=$(SHAREDLIBVER) +else + export LINUX_MAKE_KERNEL := 1 + CMD = $(LINUX_MAKE_FLAGS) -C $(LINUX_MAKE_DIR) \ + platform=$(platform) kernel_version=$(kernel_version) +endif + +ifneq (,$(MIPS_TOOLS_DIR)) + CMD += MIPS_TOOLS_DIR=$(MIPS_TOOLS_DIR) +endif + +ifneq (,$(MIPS_CROSS_COMPILE)) + CMD += MIPS_CROSS_COMPILE=$(MIPS_CROSS_COMPILE) +endif + +ifneq (,$(LINUX_INCLUDE)) + CMD += LINUX_INCLUDE=$(LINUX_INCLUDE) +endif + +# gmake does not understand $(CMD) to be a submake +# options are to +$(CMD) or $(MAKE) $(CMD) +# trying the latter +build: + $(MAKE) $(CMD) + +DELIVER clean C_COMPILER CXX_COMPILER variable mod bcm user: + $(MAKE) $(CMD) $@ + +clean_d: clean + +distclean: + $(MAKE) $(CMD) $@ + +.PHONY: build clean distclean clean_d DELIVER variable mod bcm user + diff --git a/platform/broadcom/saibcm-modules-invsai/make/Make.subdirs b/platform/broadcom/saibcm-modules-invsai/make/Make.subdirs new file mode 100644 index 00000000000..1033e296c0a --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Make.subdirs @@ -0,0 +1,44 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Make.subdirs,v 1.8 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +# Make rules/targets for handling subdirectories + +.PHONY: ${subdirs} + +all:: ${subdirs} +ifdef QUIET + @$(ECHO) Subdirectory build for ${subdirs} +endif + +${subdirs}:: + $Q$(MAKE) -C $@ kernel_version=$(kernel_version) LINUX_MAKE_SHARED_LIB=${LINUX_MAKE_SHARED_LIB} SHAREDLIBVER=${SHAREDLIBVER} + +ifeq "$(HOSTTYPE)" "Windows2000PC" +clean clean_d install distclean:: +ifdef QUIET + @$(ECHO) Subdirectory $@ for ${subdirs} +endif + $Q$(FOREACH) "$(subdirs)" "${MAKE} -C ## $@" +else +clean clean_d install distclean:: +ifdef QUIET + @$(ECHO) Subdirectory $@ for ${subdirs} +endif + @(for name in $(subdirs); do $(MAKE) -C $$name $@; done) +endif diff --git a/platform/broadcom/saibcm-modules-invsai/make/Make.tools b/platform/broadcom/saibcm-modules-invsai/make/Make.tools new file mode 100644 index 00000000000..8ed77727fef --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Make.tools @@ -0,0 +1,38 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Make.tools,v 1.2 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +SYSNAME := $(shell uname -s) +HCC ?=/usr/bin/gcc +SED = /bin/sed +COMPRESS = /usr/bin/compress +PERL = /usr/bin/perl +LN = /bin/ln +HOSTTYPE= i386-linux + +# +# Platform Independent +# +MKTOOL = $(PERL) ${SDK}/tools/mktool.pl +RM = $(MKTOOL) -rm +MKDIR = $(MKTOOL) -md +FOREACH = $(MKTOOL) -foreach +CP = $(MKTOOL) -cp +MAKEDEP = $(MKTOOL) -dep +ECHO = $(MKTOOL) -echo +MKBEEP = ${MKTOOL} -beep diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-bmw-2_6 b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-bmw-2_6 new file mode 100644 index 00000000000..6fa170fb75e --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-bmw-2_6 @@ -0,0 +1,122 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-bmw-2_6,v 1.20 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Look for custom tools +ifneq (,$(PPC_TOOLS_DIR)) +ifneq (,$(PPC_CROSS_COMPILE)) +override PATH := $(PPC_TOOLS_DIR):$(PATH) +override CROSS_COMPILE := $(PPC_CROSS_COMPILE) +endif +endif + +# Default tools +ifeq (,$(WRS_LINUX_VERSION)) +WRS_LINUX_VERSION=2.0 +endif + +# Default Linux Kernel directory +ifeq (,$(KERNDIR)) + +ifeq (1.4,$(WRS_LINUX_VERSION)) + +KERNDIR := /projects/ntsw-tools/linux/wrslinux_1.4/bcm98245cpci/build/linux-2.6.14-cgl + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE = powerpc-wrs-linux-gnu-603e-glibc_std- +endif + +WRLINUX_BASE=/tools/windriver/linux_ed/1.4/Linux +export WIND_LIC_PROXY = $(WRLINUX_BASE)/setup/x86-linux2/bin +override PATH := $(WRLINUX_BASE)/gnu/3.4.4-wrlinux-1.4/x86-linux2/bin:$(PATH) + +WRS_SYSROOT_PATH := $(WRLINUX_GNU_PATH)/../lib/gcc/powerpc-wrs-linux-gnu/3.4.4/include +else + +ifeq (2.0,$(WRS_LINUX_VERSION)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE = powerpc-wrs-linux-gnu-ppc_603e-glibc_std- +endif + +KERNDIR:= /projects/ntsw-tools/linux/wrslinux_2.0/bmw/glibc_std/build/linux-2.6.21-standard + +WRLINUX_BASE=/tools/windriver/linux_ed/2.0_GA/Linux + +TOOLCHAIN_EXEC_PREFIX=$(WRLINUX_BASE)/gnu/4.1-wrlinux-2.0/x86-linux2 +TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_EXEC_PREFIX) +WIND_LIC_PROXY=$(WRLINUX_BASE)/setup/x86-linux2/bin + +WRLINUX_GNU_PATH = $(WRLINUX_BASE)/gnu/4.1-wrlinux-2.0/x86-linux2/bin + +override PATH := $(TOOLCHAIN_EXEC_PREFIX):$(KERNDIR)/../../host-cross/bin:$(KERNDIR)/../../host-cross/powerpc-wrs-linux-gnu/bin:$(WRLINUX_GNU_PATH):$(PATH) + +export TOOLCHAIN_EXEC_PREFIX TOOLCHAIN_BIN_DIR WIND_LIC_PROXY + +WRS_SYSROOT_PATH := $(WRLINUX_GNU_PATH)/../lib/gcc/powerpc-wrs-linux-gnu/4.1.2/include + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") +endif +endif +endif + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"BMW_MPC8245/PPC603e\" + +ARCH = ppc +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + +ifeq (1.4,$(WRS_LINUX_VERSION)) +# From linux/arch/ppc/Makefile + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -fomit-frame-pointer -fsigned-char -msoft-float -pipe -ffixed-r2 -Wno-uninitialized -mmultiple -mstring +endif + +else +ifeq (2.0,$(WRS_LINUX_VERSION)) + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -m32 -nostdinc -isystem $(WRS_SYSROOT_PATH) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/linux/autoconf.h -I$(KERNDIR)/arch/ppc -I$(KERNDIR)/arch/ppc/include -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -msoft-float -pipe -ffixed-r2 -mmultiple -mno-altivec -mstring -fomit-frame-pointer -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign +endif + +endif +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-gto b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-gto new file mode 100644 index 00000000000..947c20e74f9 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-gto @@ -0,0 +1,118 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-gto-4_4,v 1.42 Broadcom SDK $ +# $Copyright: (c) 2015 Broadcom Corp. +# All Rights Reserved.$ + +# User must select one platform from below. +ifeq (,$(BUILD_PLATFORM)) +BUILD_PLATFORM=POWERPC_LINUX +endif + +# TOOLCHAIN_BASE_DIR Toolchain base directory for GTO devices +# TARGET_ARCHITECTURE Compiler for target architecture +# KERNDIR Kernel directory for iPROC-CMICd devices +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/gto +TARGET_ARCHITECTURE := powerpc-broadcom-linux-gnuspe +KERNDIR ?= $(TOOLCHAIN_BASE_DIR)/kernel/current + + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := $(TARGET_ARCHITECTURE)- +endif + + +# GTO toolchain +TOOLCHAIN_BIN_DIR := $(TOOLCHAIN_BASE_DIR)/toolchain/host/usr/bin +override PATH := $(TOOLCHAIN_BIN_DIR)/../$(TARGET_ARCHITECTURE)/bin:$(TOOLCHAIN_BIN_DIR):$(PATH) +export TOOLCHAIN_BIN_DIR + + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"GTO_MPC8548\" +CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +ARCH = powerpc +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + + +# From linux/arch/ppc/Makefile +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +KFLAG_INCLD = $(TOOLCHAIN_BIN_DIR)/../lib/gcc/$(TARGET_ARCHITECTURE)/4.6.4/include + +ifdef BROADCOM_SVK +ifdef BCM_BME3200_B0 +PLX_PCI2LBUS=1 +endif +ifdef BCM_BM9600_B0 +PLX_PCI2LBUS=1 +endif +ifeq ($PLX_PCI2LBUS, 1) +CFLAGS += -DBCM_PLX9656_LOCAL_BUS -DBDE_LINUX_NON_INTERRUPTIBLE +endif +endif + +ifdef DPP_CHIPS +CFLAGS += -DDUNE_BCM -D__DUNE_LINUX_BCM_CPU_PCP_DMA__ +CFGFLAGS += -DSOC_CM_FUNCTION +endif + +ifdef DFE_CHIPS +CFLAGS += -DDUNE_BCM +CFGFLAGS += -DSOC_CM_FUNCTION +endif + +ifdef SAND_CHIPS +CFLAGS += -D__DUNE_GTO_BCM_CPU__ -D__DUNE_LINUX_BCM_CPU_PCIE__ +endif + +ifdef SHADOW_PLX +CFLAGS += -DBCM_PLX9656_LOCAL_BUS -DBDE_LINUX_NON_INTERRUPTIBLE -DSHADOW_SVK +endif + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -m32 -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/uapi/linux/version.h -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/powerpc -I$(KERNDIR)/arch/powerpc/include -I$(KERNDIR)/include/asm-powerpc -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -msoft-float -pipe -ffixed-r2 -mmultiple -mno-altivec -funit-at-a-time -Wa,-me500 -fomit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign +endif + +ifneq (,$(findstring TCL,$(FEATURE_LIST))) +#LINK_STATIC = 0 +#export LINK_STATIC +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-4_4 +endif + diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-gto-2_6 b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-gto-2_6 new file mode 100644 index 00000000000..4caa4902421 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-gto-2_6 @@ -0,0 +1,276 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-gto-2_6,v 1.42 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# User must select one platform from below.By default WR_LINUX is selected. . +ifeq (,$(BUILD_PLATFORM)) +#BUILD_PLATFORM=ELDK +BUILD_PLATFORM=WR_LINUX +endif + +# Specify the ELDK version you want to use for building SDK. +ifeq (,$(ELDK_VERSION)) +ifeq (ELDK,$(BUILD_PLATFORM)) +ELDK_VERSION=4.0 +endif +endif + +# Specify the KERNEL VERSION you want to use for building SDK. +ifeq (,$(KERN_VER)) +ifeq (ELDK,$(BUILD_PLATFORM)) +KERN_VER=2.6.21.7 +endif +endif + + +# Specify the Windriver Linux version here.For example '2.0' as shown below. +ifeq (WR_LINUX,$(BUILD_PLATFORM)) +ifeq (,$(WRS_LINUX_VERSION)) +WRS_LINUX_VERSION=2.0 +endif +endif + + +#glibc_small and glibc_std have their own cross-compilation tools and and path for these tools are different as implemented below. To enable glibc_small build, line given below should be uncommented. + +#WRL_GLIBC_SMALL=TRUE + +ifeq (2.0,$(WRS_LINUX_VERSION)) +ifeq ($(WRL_GLIBC_SMALL),TRUE) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := powerpc-wrs-linux-gnu-ppc_e500v2-glibc_small- +endif + +KERNDIR ?=/projects/ntsw-tools/linux/wrslinux_2.0/gto/glibc_small/build/linux-2.6.21-standard + +else + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := powerpc-wrs-linux-gnu-ppc_e500v2-glibc_std- +endif + +KERNDIR ?= /projects/ntsw-tools/linux/wrslinux_2.0/gto/glibc_std/build/linux-2.6.21-standard + +endif + +export WRL_GLIBC_SMALL + +# After this point glibc_std and glibc_small share these flags + +WRLINUX_BASE ?=/tools/windriver/linux_ed/2.0_GA/Linux +TOOLCHAIN_EXEC_PREFIX=$(WRLINUX_BASE)/gnu/4.1-wrlinux-2.0/x86-linux2 +TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_EXEC_PREFIX) +WIND_LIC_PROXY=$(WRLINUX_BASE)/setup/x86-linux2/bin +WRLINUX_GNU_PATH = $(WRLINUX_BASE)/gnu/4.1-wrlinux-2.0/x86-linux2/bin +override PATH := $(TOOLCHAIN_EXEC_PREFIX):$(KERNDIR)/../../host-cross/bin:$(KERNDIR)/../../host-cross/powerpc-wrs-linux-gnu/bin:$(WRLINUX_GNU_PATH):$(PATH) +export TOOLCHAIN_EXEC_PREFIX TOOLCHAIN_BIN_DIR WIND_LIC_PROXY +endif + + +ifeq (3.0,$(WRS_LINUX_VERSION)) +ifeq ($(WRL_GLIBC_SMALL),TRUE) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := powerpc-wrs-linux-gnu-ppc_e500v2-glibc_small- +endif + +KERNDIR ?=/projects/ntsw-tools/linux/wrslinux_3.0/gto/bcm98548xmc_30_glibc_small/build/linux-broadcom_bcm98548xmc-standard-build +KERNDIR_STD ?=/projects/ntsw-tools/linux/wrslinux_3.0/gto/bcm98548xmc_30_glibc_small/build/linux + +else + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := powerpc-wrs-linux-gnu-ppc_e500v2-glibc_std- +endif + +KERNDIR ?=/projects/ntsw-tools/linux/wrslinux_3.0/gto/bcm98548xmc_30_glibc_std_debug/build/linux-broadcom_bcm98548xmc-standard-build +KERNDIR_STD ?=/projects/ntsw-tools/linux/wrslinux_3.0/gto/bcm98548xmc_30_glibc_std_debug/build/linux + +endif + +export WRL_GLIBC_SMALL + +# After this point glibc_std and glibc_small share these flags + +WRLINUX_BASE ?=/tools/windriver/linux_ed/3.0/Linux +TOOLCHAIN_EXEC_PREFIX=$(WRLINUX_BASE)/wrlinux-3.0/layers/wrll-toolchain-4.3-85/powerpc/toolchain/x86-linux2 +TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_EXEC_PREFIX) +WIND_LIC_PROXY=$(WRLINUX_BASE)/setup/x86-linux2/bin +WRLINUX_GNU_PATH = $(WRLINUX_BASE)/wrlinux-3.0/layers/wrll-toolchain-4.3-85/powerpc/toolchain/x86-linux2/bin +override PATH := $(TOOLCHAIN_EXEC_PREFIX):$(KERNDIR_STD)/../../host-cross/bin:$(KERNDIR_STD)/../../host-cross/powerpc-wrs-linux-gnu/bin:$(WRLINUX_GNU_PATH):$(PATH) +export TOOLCHAIN_EXEC_PREFIX TOOLCHAIN_BIN_DIR WIND_LIC_PROXY + +LINUX_INCLUDE_STD := $(KERNDIR_STD)/include + +endif + +ifeq (ELDK,$(BUILD_PLATFORM)) +ifeq (2.6.21.7, $(KERN_VER)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := ppc_85xx- +endif + +ifeq (4.0, $(ELDK_VERSION)) +override PATH := /tools/eldk/4.0/usr/bin:$(PATH) +else +override PATH := /tools/eldk/4.1/usr/bin:$(PATH) +endif +KERNDIR ?= /projects/ntsw-tools/linux/eldk/gto_eldk/linux-2.6.21.7 +endif +endif + +ifeq (ELDK,$(BUILD_PLATFORM)) +ifeq (2.6.24.4, $(KERN_VER)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := ppc_85xx- +endif + +ifeq (4.0, $(ELDK_VERSION)) +override PATH := /tools/eldk/4.0/usr/bin:$(PATH) +else +override PATH := /tools/eldk/4.1/usr/bin:$(PATH) +endif +KERNDIR ?= /projects/ntsw-tools/linux/eldk/gto_eldk/linux-2.6.24.4 +endif +endif + + +ifeq (ELDK,$(BUILD_PLATFORM)) +ifeq (2.6.25, $(KERN_VER)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := ppc_85xx- +endif + +ifeq (4.0, $(ELDK_VERSION)) +override PATH := /tools/eldk/4.0/usr/bin:$(PATH) +else +override PATH := /tools/eldk/4.1/usr/bin:$(PATH) +endif +KERNDIR ?= /projects/ntsw-tools/linux/eldk/gto_eldk/linux-2.6.25 +endif +endif + + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"GTO_MPC8548\" +CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +ARCH = powerpc +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + + +# From linux/arch/ppc/Makefile +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + + +ifeq (,$(KFLAG_INCLD)) +ifeq (4.0,$(ELDK_VERSION)) +ifeq (ELDK,$(BUILD_PLATFORM)) +KFLAG_INCLD = /tools/eldk/4.0/usr/lib/gcc/powerpc-linux/4.0.0/include +endif +endif + +ifeq (4.1,$(ELDK_VERSION)) +ifeq (ELDK,$(BUILD_PLATFORM)) +KFLAG_INCLD = /tools/eldk/4.1/usr/lib/gcc/powerpc-linux/4.0.0/include +endif +endif + +ifeq (2.0,$(WRS_LINUX_VERSION)) +KFLAG_INCLD = $(WRLINUX_GNU_PATH)/../lib/gcc/powerpc-wrs-linux-gnu/4.1.2/include +endif + +ifeq (3.0,$(WRS_LINUX_VERSION)) +KFLAG_INCLD = $(WRLINUX_GNU_PATH)/../lib/gcc/powerpc-wrs-linux-gnu/4.3.2/include +endif +endif + +ifdef BROADCOM_SVK +ifdef BCM_BME3200_B0 +PLX_PCI2LBUS=1 +endif +ifdef BCM_BM9600_B0 +PLX_PCI2LBUS=1 +endif +ifeq ($PLX_PCI2LBUS, 1) +CFLAGS += -DBCM_PLX9656_LOCAL_BUS -DBDE_LINUX_NON_INTERRUPTIBLE +endif +endif + +ifdef DPP_CHIPS +CFLAGS += -DDUNE_BCM -D__DUNE_LINUX_BCM_CPU_PCP_DMA__ +CFGFLAGS += -DSOC_CM_FUNCTION +endif + +ifdef DFE_CHIPS +CFLAGS += -DDUNE_BCM +CFGFLAGS += -DSOC_CM_FUNCTION +endif + +ifdef SAND_CHIPS +CFLAGS += -D__DUNE_GTO_BCM_CPU__ -D__DUNE_LINUX_BCM_CPU_PCIE__ +endif + +ifdef SHADOW_PLX +CFLAGS += -DBCM_PLX9656_LOCAL_BUS -DBDE_LINUX_NON_INTERRUPTIBLE -DSHADOW_SVK +endif + +ifeq (,$(KFLAGS)) +#autoconf.h was moved in later kernels +LINUX_AUTOCONF = $(LINUX_INCLUDE)/generated/autoconf.h +ifeq (,$(shell ls $(LINUX_AUTOCONF) 2>/dev/null)) +LINUX_AUTOCONF = $(LINUX_INCLUDE)/linux/autoconf.h +endif + +KFLAGS := -D__KERNEL__ -m32 -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/linux/version.h -include $(LINUX_AUTOCONF) -I$(KERNDIR)/arch/powerpc -I$(KERNDIR)/arch/powerpc -I$(KERNDIR)/arch/powerpc/include -I$(KERNDIR)/include/asm-powerpc -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -msoft-float -pipe -ffixed-r2 -mmultiple -mno-altivec -funit-at-a-time -Wa,-me500 -fomit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign +endif + +#Wind river Linux 3.0 needs addtional flags +ifeq (3.0,$(WRS_LINUX_VERSION)) + +# Use MSI interrupts if kernel is compiled with MSI support. +#CFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT +KFLAGS += -I$(LINUX_INCLUDE_STD) -I$(KERNDIR_STD)/arch/powerpc -I$(KERNDIR_STD)/arch/powerpc/include -I$(KERNDIR_STD)/include.asm-powerpc -mno-spe +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-iproc b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-iproc new file mode 100644 index 00000000000..7c0f9411f5e --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-iproc @@ -0,0 +1,92 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-iproc Exp $ +# $Copyright: (c) 2007 Broadcom Corp. +# All Rights Reserved.$ +# Makefile for iproc-CMICd + +# User must select one platform from below.By default ARM_LINUX is selected. . +ifeq (,$(BUILD_PLATFORM)) +BUILD_PLATFORM=ARM_LINUX +endif + +# TOOLCHAIN_BASE_DIR Toolchain base directory for iPROC-CMICd devices +# TARGET_ARCHITECTURE Compiler for target architecture +# KERNDIR Kernel directory for iPROC-CMICd devices +ifeq (BE,$(ENDIAN_MODE)) +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/iproc-be/XLDK +TARGET_ARCHITECTURE:=armeb-broadcom-linux-uclibcgnueabi +KERNDIR ?= $(TOOLCHAIN_BASE_DIR)/kernel/linux +else +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/iproc/XLDK +TARGET_ARCHITECTURE:= arm-broadcom-linux-uclibcgnueabi +KERNDIR ?= $(TOOLCHAIN_BASE_DIR)/kernel/linux +endif + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE:= $(TARGET_ARCHITECTURE)- +endif + +# arm9tools +TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/bin +override PATH:=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/$(TARGET_ARCHITECTURE)/bin:$(TOOLCHAIN_BIN_DIR):$(PATH) +LD_LIBRARY_PATH=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/lib + +export TOOLCHAIN_BIN_DIR LD_LIBRARY_PATH + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +ifeq (BE,$(ENDIAN_MODE)) +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +else +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 +ENDIAN = LE_HOST=1 +endif + +CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD +CFGFLAGS += -DBCM_PLATFORM_STRING=\"IPROC_CMICD\" + +ARCH = arm +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +KFLAG_INCLD ?= $(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/lib/gcc/$(TARGET_ARCHITECTURE)/4.9.3/include + +ifeq (,$(KFLAGS)) +KFLAGS := -D__LINUX_ARM_ARCH__=7 -D__KERNEL__ -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm/include -I$(KERNDIR)/arch/arm/include/generated -I$(KERNDIR)/arch/arm/mach-iproc/include -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -marm -mabi=aapcs-linux -fno-pic -pipe -msoft-float -ffreestanding -march=armv7-a -mfpu=vfp -mfloat-abi=softfp -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls +KFLAGS += -I$(LINUX_INCLUDE)/uapi -I$(LINUX_INCLUDE)/generated/uapi -I$(KERNDIR)/arch/arm/include/uapi -I$(KERNDIR)/arch/arm/include/generated/uapi +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-3_6 +endif diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-iproc-3_14 b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-iproc-3_14 new file mode 100644 index 00000000000..723fea6c73c --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-iproc-3_14 @@ -0,0 +1,103 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-iproc-3_6,v 1.1 Broadcom SDK $ +# $Copyright: (c) 2007 Broadcom Corp. +# All Rights Reserved.$ +# Makefile for iproc-CMICd + +# User must select one platform from below.By default ARM_LINUX is selected. . +ifeq (,$(BUILD_PLATFORM)) +BUILD_PLATFORM=ARM_LINUX +endif + +# TOOLCHAIN_BASE_DIR Toolchain base directory for iPROC-CMICd devices +# TARGET_ARCHITECTURE Compiler for target architecture +# KERNDIR Kernel directory for iPROC-CMICd devices +ifeq (BE,$(ENDIAN_MODE)) +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk37-be/buildroot-2013.11-gcc48-opt-broadcom +TARGET_ARCHITECTURE:=armeb-buildroot-linux-gnueabi +KERNDIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk37-be/XLDK/kernel/linux +else +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk37/XLDK +TARGET_ARCHITECTURE:= arm-broadcom-linux-uclibcgnueabi +KERNDIR ?= $(TOOLCHAIN_BASE_DIR)/kernel/linux +endif + + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE:= $(TARGET_ARCHITECTURE)- +endif + +# arm9tools +ifeq (BE,$(ENDIAN_MODE)) +TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_BASE_DIR)/host/usr/bin +override PATH:=$(TOOLCHAIN_BASE_DIR)/host/usr/$(TARGET_ARCHITECTURE)/bin:$(TOOLCHAIN_BIN_DIR):$(PATH) +LD_LIBRARY_PATH=$(TOOLCHAIN_BASE_DIR)/host/usr/lib +else +TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_BASE_DIR)/buildroot/usr/bin +override PATH:=$(TOOLCHAIN_BASE_DIR)/buildroot/usr/$(TARGET_ARCHITECTURE)/bin:$(TOOLCHAIN_BIN_DIR):$(PATH) +LD_LIBRARY_PATH=$(TOOLCHAIN_BASE_DIR)/buildroot/usr/lib +endif + +export TOOLCHAIN_BIN_DIR LD_LIBRARY_PATH + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +ifeq (BE,$(ENDIAN_MODE)) +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +else +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 +ENDIAN = LE_HOST=1 +endif + +CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD +CFGFLAGS += -DBCM_PLATFORM_STRING=\"IPROC_CMICD\" + +ARCH = arm +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +ifeq (BE,$(ENDIAN_MODE)) +KFLAG_INCLD ?= $(TOOLCHAIN_BASE_DIR)/host/usr/lib/gcc/$(TARGET_ARCHITECTURE)/4.8.2/include +else +KFLAG_INCLD ?= $(TOOLCHAIN_BASE_DIR)/buildroot/usr/lib/gcc/$(TARGET_ARCHITECTURE)/4.7.2/include +endif + +ifeq (,$(KFLAGS)) +KFLAGS := -D__LINUX_ARM_ARCH__=7 -D__KERNEL__ -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm/include -I$(KERNDIR)/arch/arm/include/generated -I$(KERNDIR)/arch/arm/mach-northstar/include -I$(KERNDIR)/arch/arm/plat-iproc/include -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -marm -mabi=aapcs-linux -fno-pic -pipe -msoft-float -ffreestanding -march=armv7-a -mfpu=vfp -mfloat-abi=softfp -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls +KFLAGS += -I$(LINUX_INCLUDE)/uapi -I$(LINUX_INCLUDE)/generated/uapi -I$(KERNDIR)/arch/arm/include/uapi -I$(KERNDIR)/arch/arm/include/generated/uapi +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-3_6 +endif diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-jag-2_6 b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-jag-2_6 new file mode 100644 index 00000000000..1e89cdab243 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-jag-2_6 @@ -0,0 +1,166 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-jag-2_6,v 1.20 Broadcom SDK $ +# $Copyright: (c) 2007 Broadcom Corp. +# All Rights Reserved.$ + + +# User must select one platform from below.By default WR_LINUX is selected. . +ifeq (,$(BUILD_PLATFORM)) +#BUILD_PLATFORM=ELDK +BUILD_PLATFORM=WR_LINUX +endif + + +# Specify the KERNEL VERSION you want to use for building SDK. +ifeq (ELDK,$(BUILD_PLATFORM)) +ifeq (,$(KERN_VER)) +KERN_VER=2.6.21.7 +endif +endif + +# Specify the Windriver Linux version here.For example '2.0' as shown below. +ifeq (WR_LINUX,$(BUILD_PLATFORM)) +ifeq (,$(WRS_LINUX_VERSION)) +WRS_LINUX_VERSION=2.0 +endif +endif + +ifeq (WR_LINUX,$(BUILD_PLATFORM)) +ifeq (1.4,$(WRS_LINUX_VERSION)) + +KERNDIR := /projects/ntsw-tools/linux/wrslinux_1.4/broadcom_bcm95836cpci_be/build/linux-2.6.14-small + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips-wrs-linux-gnu- +endif + +export WIND_LIC_PROXY = /projects/ntsw-tools/wrs/wrs_linux/GPP_LE_1.4_PPR/setup/x86-linux2/bin + +override PATH := /projects/ntsw-tools/wrs/wrs_linux/GPP_LE_1.4_PPR/gnu/3.4.4-wrlinux-1.4/x86-linux2/bin:$(PATH) +endif + +ifeq (2.0,$(WRS_LINUX_VERSION)) + +#CROSS_COMPILE = mips-wrs-linux-gnu- + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips-wrs-linux-gnu-mips_softfp-glibc_std- +endif + +KERNDIR:= /projects/ntsw-tools/linux/wrslinux_2.0/jag/glibc_std/build/linux-2.6.21-standard + +endif + +WRLINUX_BASE=/tools/windriver/linux_ed/2.0_GA/Linux + +TOOLCHAIN_BIN_DIR=$(KERNDIR)/../../host-cross/mips-wrs-linux-gnu/bin +WIND_LIC_PROXY=$(WRLINUX_BASE)/setup/x86-linux2/bin + +WRLINUX_GNU_PATH=$(WRLINUX_BASE)/gnu/4.1-wrlinux-2.0/x86-linux2/bin + +override PATH:=$(KERNDIR)/../../host-cross/bin:$(KERNDIR)/../../host-cross/mips-wrs-linux-gnu/bin:$(WRLINUX_GNU_PATH):$(PATH) + +WRS_SYSROOT_PATH := $(WRLINUX_GNU_PATH)/../lib/gcc/mips-wrs-linux-gnu/4.1.2/include + +export TOOLCHAIN_BIN_DIR WIND_LIC_PROXY +endif + +ifeq (ELDK,$(BUILD_PLATFORM)) +ifeq (2.6.21.7, $(KERN_VER)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips_4KC- +endif + +override PATH := /tools/eldk/4.1/usr/bin:$(PATH) +KERNDIR ?= /projects/ntsw-tools/linux/eldk/jag-ntswics-eldk/linux-2.6.21.7 +endif +endif + + + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=1 -DSYS_BE_OTHER=0 +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"JAG_BCM4704\" + +ARCH = mips +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + +ifeq (ELDK,$(BUILD_PLATFORM)) +KFLAG_INCLD = /tools/eldk/4.1/usr/lib/gcc/mips-linux/4.0.0/include/ +endif + +ifeq (1.4,$(WRS_LINUX_VERSION)) +# From linux/arch/mips/Makefile + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -Wall -Wno-trigraphs -fno-strict-aliasing -fno-common -ffreestanding -O2 -fomit-frame-pointer -g -G 0 -mno-abicalls -fno-pic -pipe -march=mips32 -Wa,-mips32 -Wa,--trap -funit-at-a-time -mlong-calls -Wundef -finline-limit=100000 -mabi=32 +endif + +#-Wdeclaration-after-statement -Wstrict-prototypes +else + +ifeq (2.0,$(WRS_LINUX_VERSION)) + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -nostdinc -isystem $(WRS_SYSROOT_PATH) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/linux/autoconf.h -I$(KERNDIR)/arch/mips -I$(KERNDIR)/arch/mips -I$(KERNDIR)/arch/mips/include -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -mabi=32 -G 0 -mno-abicalls -fno-pic -pipe -msoft-float -ffreestanding -march=mips32 -Wa,-mips32 -Wa,--trap -Iinclude/asm-mips/mach-bcm947xx -Iinclude/asm-mips/mach-generic -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls +endif + +endif +endif + +ifeq (ELDK,$(BUILD_PLATFORM)) + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/linux/autoconf.h -I$(KERNDIR)/arch/mips -I$(KERNDIR)/arch/mips -I$(KERNDIR)/arch/mips/include -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -mabi=32 -G 0 -mno-abicalls -fno-pic -pipe -msoft-float -ffreestanding -march=mips32 -Wa,-mips32 -Wa,--trap -Iinclude/asm-mips/mach-bcm947xx -Iinclude/asm-mips/mach-generic -fomit-frame-pointer -g -Wdeclaration-after-statement -mlong-calls +endif + +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif + +ifneq (,$(findstring TCL,$(FEATURE_LIST))) +LINK_STATIC=0 +export LINK_STATIC +endif + + + + diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kernel b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kernel new file mode 100644 index 00000000000..7cbf8451f91 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kernel @@ -0,0 +1,112 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-kernel,v 1.27 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Configuration Flags + +# Filter out features that cannot or should not be supported in kernel mode +_FEATURE_EXCLUDE_LIST += EDITLINE TCL OOB_RCPU CINT APIMODE DUNE_UI C_UNIT +FEATURE_EXCLUDE_LIST = $(sort $(_FEATURE_EXCLUDE_LIST)) +# Tools + +CC = $(CROSS_COMPILE)gcc +CXX = $(CROSS_COMPILE)g++ +LD = $(CROSS_COMPILE)ld +AR = $(CROSS_COMPILE)ar +ARFLAGS = -rc +STRIP = $(CROSS_COMPILE)strip +RANLIB = $(CROSS_COMPILE)ranlib +OBJCOPY = $(CROSS_COMPILE)objcopy + +# Handle differences between gcc 2.x and gcc 3.x +gcc-tune-flag = $(shell if ${CC} -dumpspecs | grep mcpu >/dev/null; then echo cpu; else echo tune; fi) + +# Configuration Variables + +# OSType Defines: This defines the type of RTOS or microkernel which you +# are compiling the SAL (and its associated driver) for. New platforms +# can be created by porting the routines (system.c) to your platform and +# adding the define in this Makefile. + +OSTYPE = LINUX + +# +# ORIGIN is used to Optionally select different CFLAGS. It is used to import +# source from other vendors. If SOURCE=Broadcom, then the BCM_ flags are added +# to those passed to the compiler. If SOURCE != Broadcom, BCM_ flags are NOT +# added. +# +# Default specifies Broadcom +# +ifndef ORIGIN + ORIGIN = Broadcom +endif + +# +# STD_{C|CPP|CXX}FLAGS - Standard flags used by ALL compilations +# BCM_{C|CPP|CXX}FLAGS - Flags used for Broadcom source files +# OPT_{C|CPP|CXX}FLAGS - Defined in local make files BEFORE inclusion of +# this Makefile, to define local "Extra" flags. +# + +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) + +CFGFLAGS += -DNO_FILEIO -DNO_CTRL_C -DNO_MEMTUNE + +CFGFLAGS += -D$(OSTYPE) + +# No user sal for the linux kernel +# NO_SAL_APPL=1 + +STD_CFLAGS = $(KFLAGS) $(CFGFLAGS) + + +STD_CPPFLAGS = ${STD_CFLAGS} +STD_CXXFLAGS = ${STD_CFLAGS} + +BCM_CFLAGS = -Wall -Werror +BCM_CPPFLAGS = ${BCM_CFLAGS} +BCM_CXXFLAGS = ${BCM_CFLAGS} + +ifeq (${ORIGIN}, Broadcom) + CFLAGS += ${STD_CFLAGS} ${BCM_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${BCM_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${BCM_CXXFLAGS} ${OPT_CXXFLAGS} +else + CFLAGS += ${STD_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${OPT_CXXFLAGS} +endif + +# +# Ignore pedantic flag for kernel modules +# +ifdef DEBUG_PEDANTIC +DEBUG_PEDANTIC = FALSE +endif + +# +# DEPEND is used as a command to generate the list of dependencies. +# The format of the output must be +# "file.o : file.c a/b/c.h d/e/f.h ...", +# if it is on multiple lines, each line must end in a backslash. +# The output MUST be on standard out. +# +DEPEND = ${CC} -M $(CFLAGS) $< diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kernel-2_6 b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kernel-2_6 new file mode 100644 index 00000000000..559f2ae5e5e --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kernel-2_6 @@ -0,0 +1,148 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-kernel-2_6,v 1.40 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Configuration Flags + +# Filter out features that cannot or should not be supported in kernel mode + +_FEATURE_EXCLUDE_LIST += EDITLINE TCL OOB_RCPU CINT APIMODE DUNE_UI C_UNIT +FEATURE_EXCLUDE_LIST = $(sort $(_FEATURE_EXCLUDE_LIST)) + +# Tools + +# Conditionally Replaces DEFAULT var +ifeq ($(origin CC),default) +CC = $(LSRUN) $(CROSS_COMPILE)gcc +endif + +ifeq ($(origin CXX),default) +CXX = $(CROSS_COMPILE)g++ +endif + +ifeq ($(origin LD),default) +LD = $(CROSS_COMPILE)ld +endif + +ifeq ($(origin AR),default) +AR = $(CROSS_COMPILE)ar +endif + +ifeq ($(origin AS),default) +AS = $(CROSS_COMPILE)as +endif + +ifeq ($(origin ARFLAGS),default) + ARFLAGS = -rc +endif + +STRIP = $(CROSS_COMPILE)strip +RANLIB = $(CROSS_COMPILE)ranlib +OBJCOPY = $(CROSS_COMPILE)objcopy +NM = $(CROSS_COMPILE)nm + +# Handle differences between gcc 2.x and gcc 3.x +gcc-tune-flag = $(shell if ${CC} -dumpspecs | grep mcpu >/dev/null; then echo cpu; else echo tune; fi) + +# Configuration Variables + +# OSType Defines: This defines the type of RTOS or microkernel which you +# are compiling the SAL (and its associated driver) for. New platforms +# can be created by porting the routines (system.c) to your platform and +# adding the define in this Makefile. + +OSTYPE = LINUX + +# +# ORIGIN is used to Optionally select different CFLAGS. It is used to import +# source from other vendors. If SOURCE=Broadcom, then the BCM_ flags are added +# to those passed to the compiler. If SOURCE != Broadcom, BCM_ flags are NOT +# added. +# +# Default specifies Broadcom +# +ifndef ORIGIN + ORIGIN = Broadcom +endif + +# +# STD_{C|CPP|CXX}FLAGS - Standard flags used by ALL compilations +# BCM_{C|CPP|CXX}FLAGS - Flags used for Broadcom source files +# OPT_{C|CPP|CXX}FLAGS - Defined in local make files BEFORE inclusion of +# this Makefile, to define local "Extra" flags. +# + +ifdef IPROC_BUILD +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) \ + -I$(KERNDIR)/arch/$(ARCH) +else +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) \ + -I$(LINUX_INCLUDE)/asm/gcc \ + -I$(LINUX_INCLUDE)/asm/mach-generic \ + -I$(KERNDIR)/arch/$(ARCH) +endif + +CFGFLAGS += -DNO_FILEIO -DNO_CTRL_C -DNO_MEMTUNE + +CFGFLAGS += -D$(OSTYPE) + +# No user sal for the linux kernel +# NO_SAL_APPL=1 + +STD_CFLAGS = $(KFLAGS) $(CFGFLAGS) + + +STD_CPPFLAGS = ${STD_CFLAGS} +STD_CXXFLAGS = ${STD_CFLAGS} + +ifndef BCM_CFLAGS +BCM_CFLAGS = -Wall -Werror +endif + +BCM_CPPFLAGS = ${BCM_CFLAGS} +BCM_CXXFLAGS = ${BCM_CFLAGS} + +ifeq (${ORIGIN}, Broadcom) + CFLAGS += ${STD_CFLAGS} ${BCM_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${BCM_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${BCM_CXXFLAGS} ${OPT_CXXFLAGS} +else + CFLAGS += ${STD_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${OPT_CXXFLAGS} +endif + +# +# Ignore pedantic flag for kernel modules +# +ifdef DEBUG_PEDANTIC +DEBUG_PEDANTIC = FALSE +endif + +# +# DEPEND is used as a command to generate the list of dependencies. +# The format of the output must be +# "file.o : file.c a/b/c.h d/e/f.h ...", +# if it is on multiple lines, each line must end in a backslash. +# The output MUST be on standard out. +# +DEPEND = ${CC} -M $(CFLAGS) $< diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kernel-3_6 b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kernel-3_6 new file mode 100644 index 00000000000..0d54c4474fc --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kernel-3_6 @@ -0,0 +1,148 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-kernel-3_6,v 1.2 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Configuration Flags + +# Filter out features that cannot or should not be supported in kernel mode + +_FEATURE_EXCLUDE_LIST += EDITLINE TCL OOB_RCPU CINT APIMODE DUNE_UI +FEATURE_EXCLUDE_LIST = $(sort $(_FEATURE_EXCLUDE_LIST)) + +# Tools + +# Conditionally Replaces DEFAULT var +ifeq ($(origin CC),default) +CC = $(LSRUN) $(CROSS_COMPILE)gcc +endif + +ifeq ($(origin CXX),default) +CXX = $(CROSS_COMPILE)g++ +endif + +ifeq ($(origin LD),default) +LD = $(CROSS_COMPILE)ld +endif + +ifeq ($(origin AR),default) +AR = $(CROSS_COMPILE)ar +endif + +ifeq ($(origin AS),default) +AS = $(CROSS_COMPILE)as +endif + +ifeq ($(origin ARFLAGS),default) + ARFLAGS = -rc +endif + +STRIP = $(CROSS_COMPILE)strip +RANLIB = $(CROSS_COMPILE)ranlib +OBJCOPY = $(CROSS_COMPILE)objcopy +NM = $(CROSS_COMPILE)nm + +# Handle differences between gcc 2.x and gcc 3.x +gcc-tune-flag = $(shell if ${CC} -dumpspecs | grep mcpu >/dev/null; then echo cpu; else echo tune; fi) + +# Configuration Variables + +# OSType Defines: This defines the type of RTOS or microkernel which you +# are compiling the SAL (and its associated driver) for. New platforms +# can be created by porting the routines (system.c) to your platform and +# adding the define in this Makefile. + +OSTYPE = LINUX + +# +# ORIGIN is used to Optionally select different CFLAGS. It is used to import +# source from other vendors. If SOURCE=Broadcom, then the BCM_ flags are added +# to those passed to the compiler. If SOURCE != Broadcom, BCM_ flags are NOT +# added. +# +# Default specifies Broadcom +# +ifndef ORIGIN + ORIGIN = Broadcom +endif + +# +# STD_{C|CPP|CXX}FLAGS - Standard flags used by ALL compilations +# BCM_{C|CPP|CXX}FLAGS - Flags used for Broadcom source files +# OPT_{C|CPP|CXX}FLAGS - Defined in local make files BEFORE inclusion of +# this Makefile, to define local "Extra" flags. +# + +ifdef IPROC_BUILD +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) \ + -I$(KERNDIR)/arch/$(ARCH) +else +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) \ + -I$(LINUX_INCLUDE)/asm/gcc \ + -I$(LINUX_INCLUDE)/asm/mach-generic \ + -I$(KERNDIR)/arch/$(ARCH) +endif + +CFGFLAGS += -DNO_FILEIO -DNO_CTRL_C -DNO_MEMTUNE + +CFGFLAGS += -D$(OSTYPE) + +# No user sal for the linux kernel +# NO_SAL_APPL=1 + +STD_CFLAGS = $(KFLAGS) $(CFGFLAGS) + + +STD_CPPFLAGS = ${STD_CFLAGS} +STD_CXXFLAGS = ${STD_CFLAGS} + +ifndef BCM_CFLAGS +BCM_CFLAGS = -Wall -Werror +endif + +BCM_CPPFLAGS = ${BCM_CFLAGS} +BCM_CXXFLAGS = ${BCM_CFLAGS} + +ifeq (${ORIGIN}, Broadcom) + CFLAGS += ${STD_CFLAGS} ${BCM_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${BCM_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${BCM_CXXFLAGS} ${OPT_CXXFLAGS} +else + CFLAGS += ${STD_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${OPT_CXXFLAGS} +endif + +# +# Ignore pedantic flag for kernel modules +# +ifdef DEBUG_PEDANTIC +DEBUG_PEDANTIC = FALSE +endif + +# +# DEPEND is used as a command to generate the list of dependencies. +# The format of the output must be +# "file.o : file.c a/b/c.h d/e/f.h ...", +# if it is on multiple lines, each line must end in a backslash. +# The output MUST be on standard out. +# +DEPEND = ${CC} -M $(CFLAGS) $< diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kernel-4_4 b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kernel-4_4 new file mode 100644 index 00000000000..0e8e22e1b32 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kernel-4_4 @@ -0,0 +1,157 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-kernel-2_6,v 1.40 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Configuration Flags + +# Filter out features that cannot or should not be supported in kernel mode + +_FEATURE_EXCLUDE_LIST += EDITLINE TCL OOB_RCPU CINT APIMODE DUNE_UI C_UNIT +FEATURE_EXCLUDE_LIST = $(sort $(_FEATURE_EXCLUDE_LIST)) + +# Tools + +# Conditionally Replaces DEFAULT var +ifeq ($(origin CC),default) +CC = $(LSRUN) $(CROSS_COMPILE)gcc +endif + +ifeq ($(origin CXX),default) +CXX = $(CROSS_COMPILE)g++ +endif + +ifeq ($(origin LD),default) +LD = $(CROSS_COMPILE)ld +endif + +ifeq ($(origin AR),default) +AR = $(CROSS_COMPILE)ar +endif + +ifeq ($(origin AS),default) +AS = $(CROSS_COMPILE)as +endif + +ifeq ($(origin ARFLAGS),default) + ARFLAGS = -rc +endif + +STRIP = $(CROSS_COMPILE)strip +RANLIB = $(CROSS_COMPILE)ranlib +OBJCOPY = $(CROSS_COMPILE)objcopy +NM = $(CROSS_COMPILE)nm + +# Handle differences between gcc 2.x and gcc 3.x +gcc-tune-flag = $(shell if ${CC} -dumpspecs | grep mcpu >/dev/null; then echo cpu; else echo tune; fi) + +# Configuration Variables + +# OSType Defines: This defines the type of RTOS or microkernel which you +# are compiling the SAL (and its associated driver) for. New platforms +# can be created by porting the routines (system.c) to your platform and +# adding the define in this Makefile. +OSTYPE = LINUX + +# +# ORIGIN is used to Optionally select different CFLAGS. It is used to import +# source from other vendors. If SOURCE=Broadcom, then the BCM_ flags are added +# to those passed to the compiler. If SOURCE != Broadcom, BCM_ flags are NOT +# added. +# +# Default specifies Broadcom +# +ifndef ORIGIN + ORIGIN = Broadcom +endif + +# +# STD_{C|CPP|CXX}FLAGS - Standard flags used by ALL compilations +# BCM_{C|CPP|CXX}FLAGS - Flags used for Broadcom source files +# OPT_{C|CPP|CXX}FLAGS - Defined in local make files BEFORE inclusion of +# this Makefile, to define local "Extra" flags. +# +ifdef IPROC_BUILD +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) \ + -I$(LINUX_INCLUDE)/uapi \ + -I$(LINUX_INCLUDE)/generated/uapi \ + -I$(KERNDIR)/arch/$(ARCH) \ + -I$(KERNDIR)/arch/$(ARCH)/include/uapi \ + -I$(KERNDIR)/arch/$(ARCH)/include/generated \ + -I$(KERNDIR)/arch/$(ARCH)/include/generated/uapi +else +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) \ + -I$(LINUX_INCLUDE)/asm/gcc \ + -I$(LINUX_INCLUDE)/asm/mach-generic \ + -I$(LINUX_INCLUDE)/uapi \ + -I$(LINUX_INCLUDE)/generated/uapi \ + -I$(KERNDIR)/arch/$(ARCH) \ + -I$(KERNDIR)/arch/$(ARCH)/include/uapi \ + -I$(KERNDIR)/arch/$(ARCH)/include/generated \ + -I$(KERNDIR)/arch/$(ARCH)/include/generated/uapi +endif + +CFGFLAGS += -DNO_FILEIO -DNO_CTRL_C -DNO_MEMTUNE + +CFGFLAGS += -D$(OSTYPE) + +# No user sal for the linux kernel +# NO_SAL_APPL=1 + +STD_CFLAGS = $(KFLAGS) $(CFGFLAGS) + + +STD_CPPFLAGS = ${STD_CFLAGS} +STD_CXXFLAGS = ${STD_CFLAGS} + +ifndef BCM_CFLAGS +BCM_CFLAGS = -Wall -Werror +endif + +BCM_CPPFLAGS = ${BCM_CFLAGS} +BCM_CXXFLAGS = ${BCM_CFLAGS} + +ifeq (${ORIGIN}, Broadcom) + CFLAGS += ${STD_CFLAGS} ${BCM_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${BCM_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${BCM_CXXFLAGS} ${OPT_CXXFLAGS} +else + CFLAGS += ${STD_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${OPT_CXXFLAGS} +endif + +# +# Ignore pedantic flag for kernel modules +# +ifdef DEBUG_PEDANTIC +DEBUG_PEDANTIC = FALSE +endif + +# +# DEPEND is used as a command to generate the list of dependencies. +# The format of the output must be +# "file.o : file.c a/b/c.h d/e/f.h ...", +# if it is on multiple lines, each line must end in a backslash. +# The output MUST be on standard out. +# +DEPEND = ${CC} -M $(CFLAGS) $< + diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kmodule b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kmodule new file mode 100644 index 00000000000..3ad11d169c6 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-kmodule @@ -0,0 +1,81 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-kmodule-3_6,v 1.2 Broadcom SDK $ +# $Copyright: (c) 2006 Broadcom Corp. +# All Rights Reserved.$ + +# Due to the extensive use of driver libraries, the SDK usually builds +# kernel modules from a precompiled object. To avoid various warnings +# and conflicts, the pre-compiled object must be named differently +# from the target module, and the object file itself should be +# appended with "_shipped". + +# If a module exports any symbols, then the exporting source file must +# be compiled within the kernel source tree for correct generation of +# module symbol versions. The symbol source file should be passed to +# this Makefile via the MODULE_SYM variable. + +MODULE := $(MOD_NAME).o +KMODULE := $(MOD_NAME).ko +PRE_COMPILED_OBJ := obj_$(MOD_NAME).o + +obj-m := $(MODULE) +$(MOD_NAME)-y := $(MODULE_SYM) $(PRE_COMPILED_OBJ) + + +ifeq (,$(CROSS_COMPILE)) + +export CROSS_COMPILE + +endif + +SAVE_CFLAGS := ${CFLAGS} + +include $(SDK)/make/Make.config + +PWD := $(shell pwd) + +ifneq ($(ARCH),) +# ELDK does not seem to `automatically' define ARCH where other gccs may +A := ARCH=$(ARCH) +export ARCH +endif + +# Provide an option in case kernel was built in separate directory +KERNBLDDIR ?= $(KERNDIR) + +# Standard SDK include path for building source files that export +# kernel symbols. + +override EXTRA_CFLAGS = -I${SDK}/include -I${SDK}/systems/linux/kernel/modules/include -I${SDK}/systems/bde/linux/include + +# The precopiled object needs a dummy command file to avoid warnings +# from the Kbuild scripts (modpost stage). +# Kernels before 2.6.17 do not support external module symbols files, +# so we create a dummy to prevent build failures. + +$(KMODULE): + rm -f *.o *.ko .*.cmd + rm -fr .tmp_versions + ln -s $(LIBDIR)/$(MODULE) $(PRE_COMPILED_OBJ)_shipped + echo "suppress warning" > .$(PRE_COMPILED_OBJ).cmd + $(MAKE) -C $(KERNBLDDIR) CROSS_COMPILE=$(CROSS_COMPILE) M=$(PWD) modules + if [ ! -f Module.symvers ]; then echo "old kernel (pre-2.6.17)" > Module.symvers; fi + cp -f $(KMODULE) $(LIBDIR) + rm -f $(PRE_COMPILED_OBJ)_shipped + +EXTRA_CFLAGS = $(CFLAGS) +CFLAGS := ${SAVE_CFLAGS} diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-nsx-2_6 b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-nsx-2_6 new file mode 100644 index 00000000000..785619f31fd --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-nsx-2_6 @@ -0,0 +1,56 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-nsx-2_6,v 1.9 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Look for custom tools +ifneq (,$(MIPS_TOOLS_DIR)) +override PATH := $(MIPS_TOOLS_DIR):$(PATH) +endif +ifneq (,$(MIPS_CROSS_COMPILE)) +override CROSS_COMPILE := $(MIPS_CROSS_COMPILE) +endif + +# Default tools +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips2_fp_be- +override PATH := $(PATH):/projects/ntsw-tools/linux/mvista/mvista-4.0/pro/devkit/mips/mips2_fp_be/bin +endif + +# Default Linux Kernel directory +ifeq (,$(KERNDIR)) +KERNDIR := /projects/ntsw-tools/linux/mvista/mvista-4.0-nsx/linux-2.6.10_dev +endif +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"NSX_BCM1125\" + +# From linux/arch/mips/Makefile + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -O2 -fomit-frame-pointer -fno-strict-aliasing -G 0 -mno-abicalls -fno-pic -mips64 -mtune=sb1 -Wa,--trap -pipe -mlong-calls +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-nsx64 b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-nsx64 new file mode 100644 index 00000000000..c4f71995be5 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-nsx64 @@ -0,0 +1,54 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-nsx64,v 1.9 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Look for custom tools +ifneq (,$(MIPS_TOOLS_DIR)) +override PATH := $(MIPS_TOOLS_DIR):$(PATH) +endif +ifneq (,$(MIPS_CROSS_COMPILE)) +override CROSS_COMPILE := $(MIPS_CROSS_COMPILE) +endif + +# Default tools +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips64_fp_be- +override PATH := $(PATH):/projects/ntsw-tools/linux/mvista/mips64_be_tools-3.1/bin +endif + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE = /projects/ntsw-tools/linux/headers/mvl-3.1-nsx64/include +endif + +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) -Wa,-xgot -mips64 -mabi=64 -fno-strict-aliasing -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS +CFGFLAGS += -DBCM_PLATFORM_STRING=\"NSX_BCM1125\" + +# From linux/arch/mips/Makefile + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -O2 -fomit-frame-pointer -fno-strict-aliasing -G 0 -mno-abicalls -fno-pic -mips64 -mabi=64 -mtune=sb1 -Wa,--trap -pipe -mlong-calls +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel +endif + +MODULE_LDFLAGS += -m elf64btsmip diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-nsx_wrl-2_6 b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-nsx_wrl-2_6 new file mode 100644 index 00000000000..7b549038fd2 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-nsx_wrl-2_6 @@ -0,0 +1,127 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-nsx_wrl-2_6,v 1.15 Broadcom SDK $ +# $Copyright: (c) 2007 Broadcom Corp. +# All Rights Reserved.$ + +ifeq (,$(WRS_LINUX_VERSION)) +WRS_LINUX_VERSION=2.0 +endif + +# Look for custom tools +ifneq (,$(MIPS_TOOLS_DIR)) +ifneq (,$(MIPS_CROSS_COMPILE)) +override PATH := $(MIPS_TOOLS_DIR):$(PATH) +override CROSS_COMPILE := $(MIPS_CROSS_COMPILE) +endif +endif + +# Default Linux Kernel directory +ifeq (,$(KERNDIR)) + +ifeq (1.4,$(WRS_LINUX_VERSION)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips-wrs-linux-gnu- +endif + +KERNDIR := /projects/ntsw-tools/linux/wrslinux_1.4/broadcom_bcm91125cpci_32_be_glibc_std/build/linux-2.6.14-cgl + +export WIND_LIC_PROXY = /projects/ntsw-tools/wrs/wrs_linux/GPP_LE_1.4_PPR/setup/x86-linux2/bin +override PATH := /projects/ntsw-tools/wrs/wrs_linux/GPP_LE_1.4_PPR/gnu/3.4.4-wrlinux-1.4/x86-linux2/bin:$(PATH) +else + +ifeq (2.0,$(WRS_LINUX_VERSION)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips-wrs-linux-gnu-mips-glibc_std- +endif + +KERNDIR:= /projects/ntsw-tools/linux/wrslinux_2.0/nsx/glibc_std/build/linux-2.6.21-standard + +WRLINUX_BASE=/tools/windriver/linux_ed/2.0_GA/Linux + +TOOLCHAIN_BIN_DIR=$(KERNDIR)/../../host-cross/mips-wrs-linux-gnu/bin +WIND_LIC_PROXY=$(WRLINUX_BASE)/setup/x86-linux2/bin + +WRLINUX_GNU_PATH=$(WRLINUX_BASE)/gnu/4.1-wrlinux-2.0/x86-linux2/bin +override PATH:=$(KERNDIR)/../../host-cross/bin:$(KERNDIR)/../../host-cross/mips-wrs-linux-gnu/bin:$(WRLINUX_GNU_PATH):$(PATH) + +WRS_SYSROOT_PATH := $(WRLINUX_GNU_PATH)/../lib/gcc/mips-wrs-linux-gnu/4.1.2/include + +export TOOLCHAIN_BIN_DIR WIND_LIC_PROXY + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +endif +endif +endif + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"NSX_BCM1125\" + +ARCH = mips +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + +ifeq (1.4,$(WRS_LINUX_VERSION)) +# From Linux Kbuild output + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -Iinclude -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -ffreestanding -O2 -fomit-frame-pointer -g -G 0 -mno-abicalls -fno-pic -pipe -finline-limit=100000 -mabi=32 -march=sb1 -Wa,-32 -Wa,-march=sb1 -Wa,-mips64 -Wa,--trap -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL -mlong-calls +#-Wdeclaration-after-statement +endif + +else + +ifeq (2.0,$(WRS_LINUX_VERSION)) + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -nostdinc -isystem $(WRS_SYSROOT_PATH) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/linux/autoconf.h -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -mabi=32 -G 0 -mno-abicalls -fno-pic -pipe -msoft-float -ffreestanding -march=sb1 -Wa,--trap -Iinclude/asm-mips/mach-sibyte -Iinclude/asm-mips/mach-generic -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls +endif + +endif +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif + + +ifneq (,$(findstring TCL,$(FEATURE_LIST))) +LINK_STATIC=0 +export LINK_STATIC +endif + + diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-raptor b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-raptor new file mode 100644 index 00000000000..80c51e782be --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-raptor @@ -0,0 +1,53 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-raptor,v 1.6 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Look for custom tools +ifneq (,$(MIPS_TOOLS_DIR)) +override PATH := $(MIPS_TOOLS_DIR):$(PATH) +endif +ifneq (,$(MIPS_CROSS_COMPILE)) +override CROSS_COMPILE := $(MIPS_CROSS_COMPILE) +endif + +# Default tools +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips_fp_be- +override PATH := $(PATH):/projects/ntsw-tools/linux/mvista/mvista-3.1/pro/devkit/mips/fp_be/bin +endif + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE = /projects/ntsw-tools/linux/headers/mvl-3.1-raptor/include +endif + +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=1 -DSYS_BE_OTHER=0 -DBCM_ICS +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"Raptor_BCM56218\" + + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel +endif + +# From linux/arch/mips/Makefile + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe -m$(gcc-tune-flag)=r4600 -mips2 -Wa,--trap -mlong-calls +endif diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-raptor-2_6 b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-raptor-2_6 new file mode 100644 index 00000000000..0bebdf9564c --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-raptor-2_6 @@ -0,0 +1,172 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-raptor-2_6,v 1.21 Broadcom SDK $ +# $Copyright: (c) 2007 Broadcom Corp. +# All Rights Reserved.$ + + +# User must select one platform from below.By default WR_LINUX is selected. . +ifeq (,$(BUILD_PLATFORM)) +#BUILD_PLATFORM=ELDK +BUILD_PLATFORM=WR_LINUX +endif + + +# Specify the KERNEL VERSION you want to use for building SDK. +ifeq (ELDK,$(BUILD_PLATFORM)) +ifeq (,$(KERN_VER)) +KERN_VER=2.6.21.7 +endif +endif + +# Specify the Windriver Linux version here.For example '2.0' as shown below. +ifeq (WR_LINUX,$(BUILD_PLATFORM)) +ifeq (,$(WRS_LINUX_VERSION)) +WRS_LINUX_VERSION=2.0 +endif +endif + + +# Default Linux Kernel directory +ifeq (WR_LINUX,$(BUILD_PLATFORM)) +ifeq (1.4,$(WRS_LINUX_VERSION)) + +KERNDIR ?= /projects/ntsw-tools/linux/wrslinux_1.4/broadcom_bcm95621x_be/build/linux-2.6.14-small + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips-wrs-linux-gnu- +endif + +export WIND_LIC_PROXY = /projects/ntsw-tools/wrs/wrs_linux/GPP_LE_1.4_PPR/setup/x86-linux2/bin + +override PATH := /projects/ntsw-tools/wrs/wrs_linux/GPP_LE_1.4_PPR/gnu/3.4.4-wrlinux-1.4/x86-linux2/bin:$(PATH) +endif + +ifeq (2.0,$(WRS_LINUX_VERSION)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips-wrs-linux-gnu-mips_softfp-glibc_std- +endif + +KERNDIR ?= /projects/ntsw-tools/linux/wrslinux_2.0/ntswics/glibc_std/build/linux-2.6.21-standard +override PATH:=$(KERNDIR)/../../host-cross/bin:$(KERNDIR)/../../host-cross/mips-wrs-linux-gnu/bin:$(WRLINUX_GNU_PATH):$(PATH) + +endif + +WRLINUX_BASE=/tools/windriver/linux_ed/2.0_GA/Linux + +TOOLCHAIN_BIN_DIR=$(KERNDIR)/../../host-cross/mips-wrs-linux-gnu/bin +WIND_LIC_PROXY=$(WRLINUX_BASE)/setup/x86-linux2/bin + +WRLINUX_GNU_PATH=$(WRLINUX_BASE)/gnu/4.1-wrlinux-2.0/x86-linux2/bin + +override PATH:=$(KERNDIR)/../../host-cross/bin:$(KERNDIR)/../../host-cross/mips-wrs-linux-gnu/bin:$(WRLINUX_GNU_PATH):$(PATH) + +WRS_SYSROOT_PATH := $(WRLINUX_GNU_PATH)/../lib/gcc/mips-wrs-linux-gnu/4.1.2/include + +export TOOLCHAIN_BIN_DIR WIND_LIC_PROXY + +endif + +ifeq (ELDK,$(BUILD_PLATFORM)) +ifeq (2.6.21.7, $(KERN_VER)) +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips_4KC- +endif +override PATH := /tools/eldk/4.1/usr/bin:$(PATH) +KERNDIR ?= /projects/ntsw-tools/linux/eldk/raptor_eldk/linux-2.6.21.7 +endif +endif + + + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=1 -DSYS_BE_OTHER=0 -DBCM_ICS +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) -DRAPTOR +CFGFLAGS += -DBCM_PLATFORM_STRING=\"Raptor_BCM56218\" + + +ARCH = mips +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + + +ifeq (ELDK,$(BUILD_PLATFORM)) +KFLAG_INCLD = /tools/eldk/4.1/usr/lib/gcc/mips-linux/4.0.0/include +endif + + +# From linux/arch/mips/Makefile +ifeq (WR_LINUX,$(BUILD_PLATFORM)) +ifeq (1.4,$(WRS_LINUX_VERSION)) + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -Wall -Wno-trigraphs -fno-strict-aliasing -fno-common -ffreestanding -O2 -fomit-frame-pointer -g -G 0 -mno-abicalls -fno-pic -pipe -march=mips32 -Wa,-mips32 -Wa,--trap -funit-at-a-time -mlong-calls -Wundef -finline-limit=100000 -mabi=32 +endif + +endif + +ifeq (2.0,$(WRS_LINUX_VERSION)) + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -nostdinc -isystem $(WRS_SYSROOT_PATH) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/linux/autoconf.h -I$(KERNDIR)/arch/mips/mach-bcm56218 -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -mabi=32 -G 0 -mno-abicalls -fno-pic -pipe -msoft-float -ffreestanding -march=mips32 -Wa,-mips32 -Wa,--trap -Iinclude/asm-mips/mach-bcm56218 -Iinclude/asm-mips/mach-generic -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls +endif + +endif +endif + +ifeq (ELDK,$(BUILD_PLATFORM)) + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/linux/autoconf.h -I$(KERNDIR)/arch/mips/mach-bcm56218 -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -mabi=32 -G 0 -mno-abicalls -fno-pic -pipe -msoft-float -ffreestanding -march=mips32 -Wa,-mips32 -Wa,--trap -Iinclude/asm-mips/mach-bcm56218 -Iinclude/asm-mips/mach-generic -fomit-frame-pointer -g -Wdeclaration-after-statement -mlong-calls +endif + + +endif + + + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif + +ifneq (,$(findstring TCL,$(FEATURE_LIST))) +LINK_STATIC=0 +export LINK_STATIC +endif + + + + + diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-x86-common-2_6 b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-x86-common-2_6 new file mode 100644 index 00000000000..07af2afcc93 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-x86-common-2_6 @@ -0,0 +1,44 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-x86-common-2_6,v 1.13 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 +ENDIAN = LE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"X86\" +ifeq (,$(findstring -DSAL_BDE_DMA_MEM_DEFAULT,$(CFGFLAGS))) +CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 +endif + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ +-D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +ifneq ($(targetplat),user) +# By default we exclude -Werror from x86 kernel builds +BCM_CFLAGS = -Wall +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-x86-generic-common-2_6 b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-x86-generic-common-2_6 new file mode 100644 index 00000000000..ab342c12d21 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-x86-generic-common-2_6 @@ -0,0 +1,51 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-x86-generic-common-2_6,v 1.2 Broadcom SDK $ +# $Copyright: (c) 2008 Broadcom Corp. +# All Rights Reserved.$ + +# Default kernel source directory +ifeq (,$(KERNDIR)) +KERNDIR := /lib/modules/$(shell uname -r)/build +export KERNDIR +endif + +# Default architecture +ifeq (,$(ARCH)) +ARCH = $(shell uname -p) +ifneq (x86_64,$(ARCH)) +ARCH = i386 +endif +endif + +# Noisy kernel build +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE KERNDIR + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +# autoconf.h was moved in later kernels +AUTOCONF = $(KERNDIR)/include/generated/autoconf.h +ifeq (,$(shell ls $(AUTOCONF) 2>/dev/null)) +AUTOCONF = $(KERNDIR)/include/linux/autoconf.h +endif + +# gcc system include path +SYSINC = $(shell gcc -print-search-dirs | grep install | cut -c 10-)include diff --git a/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-x86-smp_generic_64-2_6 b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-x86-smp_generic_64-2_6 new file mode 100644 index 00000000000..bb0bbea536a --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/make/Makefile.linux-x86-smp_generic_64-2_6 @@ -0,0 +1,46 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-x86-smp_generic_64-2_6,v 1.5 Broadcom SDK $ +# $Copyright: (c) 2008 Broadcom Corp. +# All Rights Reserved.$ + +CFGFLAGS += -DLONGS_ARE_64BITS +CFGFLAGS += -DPTRS_ARE_64BITS +CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS +CFGFLAGS += -DSAL_SPL_LOCK_ON_IRQ + +include ${SDK}/make/Makefile.linux-x86-generic-common-2_6 + +ifeq (,$(KFLAGS)) +KFLAGS := -nostdinc -isystem $(SYSINC) -I$(KERNDIR)/include -I$(KERNDIR)/arch/x86/include -include $(AUTOCONF) -D__KERNEL__ -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -Wno-format-security -fno-delete-null-pointer-checks -Os -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -funit-at-a-time -maccumulate-outgoing-args -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -fno-stack-protector -fomit-frame-pointer -g -Wdeclaration-after-statement -Wno-pointer-sign +endif + +ifeq ($(LINUX_MAKE_SHARED_LIB), 1) +KFLAGS += -fPIC -mcmodel=small +else +KFLAGS += -fno-pie -mcmodel=kernel +endif + +LINUX_UAPI = $(LINUX_INCLUDE)/uapi +KFLAGS += -I$(LINUX_INCLUDE)/uapi -I$(LINUX_INCLUDE)/generated/uapi -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/arch/x86/include/generated/uapi + +ifeq (1,$(DEBIAN_LINUX_HEADER)) +KERNDIR_COMMON := $(subst amd64,common,$(KERNDIR)) +KFLAGS += -I$(KERNDIR_COMMON)/include -I$(KERNDIR_COMMON)/include/uapi -I$(KERNDIR_COMMON)/arch/x86/include -I$(KERNDIR_COMMON)/arch/x86/include/uapi +endif + +include ${SDK}/make/Makefile.linux-x86-common-2_6 + diff --git a/platform/broadcom/saibcm-modules-invsai/systemd/opennsl-modules.service b/platform/broadcom/saibcm-modules-invsai/systemd/opennsl-modules.service new file mode 100644 index 00000000000..a83f4200dba --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systemd/opennsl-modules.service @@ -0,0 +1,18 @@ +[Unit] +Description=Opennsl kernel modules init +After=local-fs.target +Before=syncd.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/opennsl-modules start +# Don't remove opennsl driver when stopping service. Because +# removing knet drivers takes ~30 seconds to delete netdevs. +# This delay cuts too deep into warm reboot time budget. +# We could skip this step because we don't expect stopping +# opennsl service in any context other than rebooting. +# ExecStop=-/etc/init.d/opennsl-modules stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/include/linux-bde.h b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/include/linux-bde.h new file mode 100755 index 00000000000..9221812c973 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/include/linux-bde.h @@ -0,0 +1,263 @@ +/*********************************************************************** + * + * $Id: linux-bde.h,v 1.24 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + * Linux Broadcom Device Enumerators + * + * + * There are two Linux BDEs: + * + * 1. Linux Kernel BDE + * + * This is a kernel module implementing a BDE + * for the driver running as part of the kernel. + * + * It manages the devices through the linux PCI interfaces, + * and manages a chunk of contiguous, boot-time allocated + * DMA memory. This is all that is needed if the BCM driver + * is run as part of the kernel (in another module). + * + * 2. Linux User BDE + * + * This is a kernel module and userland library which implement + * a complete BDE for applications running in userland. + * + * The kernel module relies upon the real kernel bde, + * and allows a user space application (through the user library) + * to talk directly to the devices. It also virtualized the device + * interrupts, so the entire driver can be run as a userspace + * application. + * + * While this causes a significant degradation in performance, + * because the system runs as a user application, the development + * and debugging process is about a gillion times easier. + * After the core logic is debugged, it can be retargeted using + * only the kernel bde and run in the kernel. + * + * + **********************************************************************/ + +#ifndef __LINUX_BDE_H__ +#define __LINUX_BDE_H__ + +#include + +#include + + +/* + * Device Major Numbers + * + * The kernel and user bdes need unique major numbers + * on systems that do not use devfs. + * + * They are defined here, along with the module names, + * to document them if you need to mknod them (or open) them, + * and to keep them unique. + * + */ + +#include + +#ifdef __KERNEL__ +#include +/* Key stone and Raptor has 2.6.21 but don't have definition */ +#if defined(KEYSTONE) || defined(RAPTOR) +#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)) + #ifdef PHYS_ADDRS_ARE_64BITS + typedef u64 phys_addr_t; + #else + typedef u32 phys_addr_t; + #endif + #endif +#endif +#endif + + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15)) +#define LINUX_BDE_DMA_DEVICE_SUPPORT +#endif + +#define LINUX_KERNEL_BDE_NAME "linux-kernel-bde" +#define LINUX_KERNEL_BDE_MAJOR 127 + +#define LINUX_USER_BDE_NAME "linux-user-bde" +#define LINUX_USER_BDE_MAJOR 126 + + +/* Max devices */ +/* 16 switch chips + 2 out-of-band Ethernet + 2 CPUs */ +#define LINUX_BDE_MAX_SWITCH_DEVICES 16 +#define LINUX_BDE_MAX_ETHER_DEVICES 2 +#define LINUX_BDE_MAX_CPU_DEVICES 2 +#define LINUX_BDE_MAX_DEVICES (LINUX_BDE_MAX_SWITCH_DEVICES + \ + LINUX_BDE_MAX_ETHER_DEVICES + \ + LINUX_BDE_MAX_CPU_DEVICES) + +/* + * PCI devices will be initialized by the Linux Kernel, + * regardless of architecture. + * + * You need only provide bus endian settings. + */ + +typedef struct linux_bde_bus_s { + int be_pio; + int be_packet; + int be_other; +} linux_bde_bus_t; + + + +/* Device state used for PCI hot swap case. */ +/* + * BDE_DEV_STATE_NORMAL : A device is probed normally. Or when the device + * resource has been updated after "CHANGED", the state will move back to + * "NORMAL". + */ +#define BDE_DEV_STATE_NORMAL (0) +/* + * BDE_DEV_STATE_REMOVED : A previous probed device was removed. + * We will avoid any device access while the device is in this state. + * The state will be moved to "CHANGED" if the device is re-inserted + * and re-probed. + */ +#define BDE_DEV_STATE_REMOVED (1) +/* + * BDE_DEV_STATE_CHANGED : The device is re-probed after having been removed. + * The resouces assigned to the device might have been changed after + * re-probing, so we need to re-initialize our resource database accordingly. + * The state will change to "NORMAL" when the resource have been updated. + */ +#define BDE_DEV_STATE_CHANGED (2) + +extern int linux_bde_create(linux_bde_bus_t* bus, ibde_t** bde); +extern int linux_bde_destroy(ibde_t* bde); +#ifdef BCM_INSTANCE_SUPPORT +extern int linux_bde_instance_attach(unsigned int dev_mask,unsigned int dma_size); +#endif + +#ifdef __KERNEL__ + +/* + * Backdoors provided by the kernel bde + * + */ + +/* + * The user bde needs to get cpu physical address for + * the userland code to mmap. + * And the second address is bus address, it is either + * identical to cpu physical address or another address + * (IOVA) translated by IOMMU. + */ +extern int lkbde_get_dma_info(phys_addr_t *cpu_pbase, phys_addr_t *dma_pbase, ssize_t *size); +extern uint32 lkbde_get_dev_phys(int d); +extern uint32 lkbde_get_dev_phys_hi(int d); + +/* + * Virtual device address needed by kernel space + * interrupt handler. + */ +extern void *lkbde_get_dev_virt(int d); + +/* + * The user bde needs to get some physical addresses for + * the userland code to mmap. The following functions + * supports multiple resources for a single device. + */ +extern int lkbde_get_dev_resource(int d, int rsrc, uint32 *flags, + uint32 *phys_lo, uint32 *phys_hi); + +/* + * Backdoor to retrieve OS device structure to be used for + * DMA operations. + */ +extern void *lkbde_get_dma_dev(int d); + +/* + * Backdoor to retrieve original hardware/OS device. + */ +extern void *lkbde_get_hw_dev(int d); + +/* + * Backdoor to retrieve number of switch devices probed. + */ +extern int lkbde_get_num_devices(int type); + +/* + * Retrive the device state from Kernel BDE. + * Used for KNET and User BDE for pci hot swap case. + */ +extern int lkbde_dev_state_get(int d, uint32 *state); +extern int lkbde_dev_state_set(int d, uint32 state); + +/* + * Retrive the mapping between emulated HW device and instance id + */ +extern int lkbde_dev_instid_get(int d, uint32 *instid); +extern int lkbde_dev_instid_set(int d, uint32 instid); + +/* + * Functions that allow an interrupt handler in user mode to + * coexist with interrupt handler in kernel module. + */ +extern int lkbde_irq_mask_set(int d, uint32 addr, uint32 mask, uint32 fmask); +extern int lkbde_irq_mask_get(int d, uint32 *mask, uint32 *fmask); + +#ifdef BCM_SAND_SUPPORT +extern int lkbde_cpu_write(int d, uint32 addr, uint32 *buf); +extern int lkbde_cpu_read(int d, uint32 addr, uint32 *buf); +extern int lkbde_cpu_pci_register(int d); +#endif + +/* + * This flag must be OR'ed onto the device number when calling + * interrupt_connect/disconnect and irq_mask_set functions from + * a secondary device driver. + */ +#define LKBDE_ISR2_DEV 0x8000 +/* + * This flag should be OR'ed onto the device number when calling + * irq_mask_set functions from a secondary device driver if the + * mask register is iProc register. + */ +#define LKBDE_IPROC_REG 0x4000 + +#ifdef BCM_SAND_SUPPORT +#include +#if defined(__DUNE_LINUX_BCM_CPU_PCIE__) && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) +#ifndef _SIMPLE_MEMORY_ALLOCATION_ +#define _SIMPLE_MEMORY_ALLOCATION_ 1 +#endif +#endif +#endif + +#if defined(IPROC_CMICD) && defined(CONFIG_CMA) +#ifndef _SIMPLE_MEMORY_ALLOCATION_ +#define _SIMPLE_MEMORY_ALLOCATION_ 1 +#endif +#endif + +/* Don't use _SIMPLE_MEMORY_ALLOCATION_ method for newer kernel than 3.10.0 */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)) +#ifndef _SIMPLE_MEMORY_ALLOCATION_ +#define _SIMPLE_MEMORY_ALLOCATION_ 0 +#endif +#endif + +/* Allocation via dma_alloc_coherent is turned off by default */ +#ifndef _SIMPLE_MEMORY_ALLOCATION_ +#define _SIMPLE_MEMORY_ALLOCATION_ 9 /* compile in the allocation method, but do not use it by default */ +#endif + +/* By default we use our private mmap for DMA pool */ +#ifndef USE_LINUX_BDE_MMAP +#define USE_LINUX_BDE_MMAP 1 +#endif + +#endif /* __KERNEL__ */ + +#endif /* __LINUX_BDE_H__ */ diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/include/linux_dma.h b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/include/linux_dma.h new file mode 100755 index 00000000000..101784a86b4 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/include/linux_dma.h @@ -0,0 +1,60 @@ +/*********************************************************************** + * + * $Id: linux_dma.h,v 1.24 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + **********************************************************************/ + +#ifndef __LINUX_DMA_H__ +#define __LINUX_DMA_H__ + +#include + +#ifdef __KERNEL__ + +#ifdef SAL_BDE_XLP +#define KMALLOC(size, flags) __kmalloc(size, flags) +#else +#define KMALLOC(size, flags) kmalloc(size, flags) +#endif + +#if defined(CONFIG_IDT_79EB334) || defined(CONFIG_BCM4702) +/* ioremap is broken in kernel */ +#define IOREMAP(addr, size) ((void *)KSEG1ADDR(addr)) +#else +#define IOREMAP(addr, size) ioremap_nocache(addr, size) +#endif + +#if defined (__mips__) +#if defined(CONFIG_NONCOHERENT_IO) || defined(CONFIG_DMA_NONCOHERENT) +/* Use flush/invalidate for cached memory */ +#define NONCOHERENT_DMA_MEMORY +/* Remap virtual DMA addresses to non-cached segment */ +#define REMAP_DMA_NONCACHED +#endif /* CONFIG_NONCOHERENT_IO || CONFIG_DMA_NONCOHERENT */ +#endif /* __mips__ */ + +#if defined(BCM958525) && (LINUX_VERSION_CODE <= KERNEL_VERSION(3,6,5)) +#define REMAP_DMA_NONCACHED +#endif + +#ifndef DMA_BIT_MASK +#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) +#endif + +extern void _dma_init(int dev_index); +extern int _dma_cleanup(void); +extern void _dma_pprint(void); +extern uint32_t *_salloc(int d, int size, const char *name); +extern void _sfree(int d, void *ptr); +extern int _sinval(int d, void *ptr, int length); +extern int _sflush(int d, void *ptr, int length); +extern sal_paddr_t _l2p(int d, void *vaddr); +extern void *_p2l(int d, sal_paddr_t paddr); +extern int _dma_pool_allocated(void); +extern int _dma_mmap(struct file *filp, struct vm_area_struct *vma); + +#endif /* __KERNEL__ */ + +#endif /* __LINUX_DMA_H__ */ diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/include/mpool.h b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/include/mpool.h new file mode 100644 index 00000000000..9bae2cad2ae --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/include/mpool.h @@ -0,0 +1,21 @@ +/* + * $Id: mpool.h,v 1.2 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + */ + +#ifndef __MPOOL_H__ +#define __MPOOL_H__ + +struct mpool_mem_s; +typedef struct mpool_mem_s* mpool_handle_t; + +extern int mpool_init(void); +extern mpool_handle_t mpool_create(void* base_address, int size); +extern void* mpool_alloc(mpool_handle_t pool, int size); +extern void mpool_free(mpool_handle_t pool, void* ptr); +extern int mpool_destroy(mpool_handle_t pool); + +extern int mpool_usage(mpool_handle_t pool); + +#endif /* __MPOOL_H__ */ diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/Makefile new file mode 100644 index 00000000000..3d504a5665f --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/Makefile @@ -0,0 +1,114 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.18 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +# Makefile for Linux kernel BDE +# +LOCALDIR = systems/bde/linux/kernel + +# Make sure we build for the kernel if this is a user-mode build +ifneq ($(platform), ) +override-target=linux-$(platform) +endif + +include $(SDK)/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +BDE = linux-kernel-bde.o + +ifdef ROBO_CHIPS +CFLAGS += -I$(ET_ROBO) -I${SDK}/include/shared/et +ET_ROBO = ${SDK}/systems/drv/et +endif + +# need to add vpath sources +VPATH = ../shared $(ET_ROBO) + +# Add the srcs to be found by vpath +LSRCS += mpool.c +ifdef ROBO_CHIPS +platformsplt = $(subst -, , ${platform}) # change hyphens to spaces +platformbase = $(word 1,${platformsplt}) + +ifeq ($(platformbase), keystone) + LSRCS += etc_robo_spi.c aiutils.c +else + ifeq ($(platformbase), keystone_le) + LSRCS += etc_robo_spi.c aiutils.c + else + ifeq ($(platformbase), iproc) + LSRCS += robo_srab.c robo_spi.c aiutils.c + endif + endif +endif # platformbase + +endif # ROBO_CHIPS + +# Add shared BDE sources +VPATH += ../../shared +LSRCS += shbde_pci.c shbde_iproc.c shbde_mdio.c +CFLAGS += -I../../shared/include + +LHDRS += mpool.h +LOBJS = $(addsuffix .o, $(basename $(LSRCS))) +BOBJS = $(addprefix $(BLDDIR)/,$(LOBJS)) + +ifneq ($(kernel_version),2_4) +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-kernel-bde +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +build: kernel_libs $(MODULE) $(KMODULE) +else +MODULE = $(LIBDIR)/linux-kernel-bde.o + +build: kernel_libs $(MODULE) +endif + +$(MODULE): $(BLDDIR)/.tree kernel_libs $(BOBJS) + mkdir -p $(@D) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ +ifneq ($(kernel_version),2_4) +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko +endif + +kernel_libs: + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared + +include $(SDK)/make/Make.depend + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +clean:: + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared $@ + $(RM) $(BOBJS) $(MODULE) + $(RM) $(BLDDIR)/$(KERNEL_MODULE_DIR) + +distclean:: + +ifneq ($(kernel_version),2_4) +.PHONY: build kernel_libs +endif diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/linux-kernel-bde.c b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/linux-kernel-bde.c new file mode 100644 index 00000000000..524d695d096 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/linux-kernel-bde.c @@ -0,0 +1,4461 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ + +/* + * Linux Kernel BDE + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "linux_shbde.h" + +#ifdef __GNUC__ +#if __GNUC__ == 8 +/* + * Prevent gcc 8.1.10 using a compiler inline memcpy even if using -fno-builtin or + * -fno-builtin-memcpy . + * __inline_memcpy and __memcpy are kernel functions that may be used instead, + * for either an inline or non-inline implementations of the function + */ +#define MEMCPY __inline_memcpy +#else +#define MEMCPY memcpy +#endif /* __GNUC__ == 8 */ +#else /* ifdef __GNUC__ */ +#define MEMCPY memcpy +#endif /* ifdef __GNUC__ */ + +#define PCI_USE_INT_NONE (-1) +#define PCI_USE_INT_INTX (0) +#define PCI_USE_INT_MSI (1) +#define PCI_USE_INT_MSIX (2) +#ifdef CONFIG_PCI_MSI +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,110)) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) +#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) +#endif +#define msi_control_reg(base) (base + PCI_MSI_FLAGS) +#endif +#endif +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("Kernel BDE"); +MODULE_LICENSE("GPL"); + +/* PCIe max payload */ +int maxpayload = 256; +LKM_MOD_PARAM(maxpayload, "i", int, 0); +MODULE_PARM_DESC(maxpayload, +"Limit maximum payload size and request size on PCIe devices"); + +/* Use MSI or MSIX interrupts */ +int usemsi = -1; +LKM_MOD_PARAM(usemsi, "i", int, 0); +MODULE_PARM_DESC(usemsi, +"Use MSI/ MSIX interrupts if supported by kernel"); + +/* Ignore all recognized devices (for debug purposes) */ +int nodevices; +LKM_MOD_PARAM(nodevices, "i", int, 0); +MODULE_PARM_DESC(nodevices, +"Ignore all recognized devices (default no)"); + +int msixcnt = 1; + +/* + * This usually is defined at /usr/include/linux/pci_ids.h + * But this ID is newer. + */ +#ifndef PCI_DEVICE_ID_PLX_9656 +#define PCI_DEVICE_ID_PLX_9656 0x9656 +#endif + +#ifndef PCI_DEVICE_ID_PLX_9056 +#define PCI_DEVICE_ID_PLX_9056 0x9056 +#endif + +/* For 2.4.x kernel support */ +#ifndef IRQF_SHARED +#define IRQF_SHARED SA_SHIRQ +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) +typedef unsigned long resource_size_t; +#endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) */ + +#ifdef BCM_ICS +#define BCM_ICS_CMIC_BASE 0x08000000 +#else + +/* Force interrupt line */ +static int forceirq = -1; +static uint32_t forceirqubm = 0xffffffff; +LKM_MOD_PARAM(forceirq, "i", int, 0); +LKM_MOD_PARAM(forceirqubm, "i", uint, 0); +MODULE_PARM_DESC(forceirq, +"Override IRQ line assigned by boot loader"); +MODULE_PARM_DESC(forceirqubm, +"Bitmap for overriding the IRQ line assigned by boot loader for given units"); + +/* Create SPI slave device (cannot be probed) */ +static uint32_t spi_devid = 0; +LKM_MOD_PARAM(spi_devid, "i", uint, 0); +MODULE_PARM_DESC(spi_devid, +"Create SPI slave device using this device ID"); + +/* Select SPI device revision (cannot be probed) */ +static uint32_t spi_revid = 1; +LKM_MOD_PARAM(spi_revid, "i", uint, 0); +MODULE_PARM_DESC(spi_revid, +"Select device revision for SPI slave device"); + +#endif /* BCM_ICS */ + +/* Debug output */ +static int debug; +LKM_MOD_PARAM(debug, "i", int, 0); +MODULE_PARM_DESC(debug, +"Set debug level (default 0"); +/* Use high memory for DMA */ + +/* module param for probing EB devices. */ +static char *eb_bus; +LKM_MOD_PARAM(eb_bus, "s", charp, 0); +MODULE_PARM_DESC(eb_bus, +"List of EB devices on platform. Input format (BA=%x IRQ=%d RD16=%d WR16=%d"); + +#ifdef KEYSTONE +/* Force SPI Frequency */ +static int spifreq = 0; +LKM_MOD_PARAM(spifreq, "i", int, 0); +MODULE_PARM_DESC(spifreq, +"Force SPI Frequency for Keystone CPU (0 for default frequency)"); +#endif + + +/* Compatibility */ +#ifdef LKM_2_4 +#define _ISR_RET void +#define _ISR_PARAMS(_i,_d,_r) int _i, void *_d, struct pt_regs *_r +#define IRQ_NONE +#define IRQ_HANDLED +#define SYNC_IRQ(_i) synchronize_irq() +#else /* LKM_2_6 */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30)) +#define _ISR_RET irqreturn_t +#else +#define _ISR_RET int +#endif +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)) +#define _ISR_PARAMS(_i,_d,_r) int _i, void *_d +#else +#define _ISR_PARAMS(_i,_d,_r) int _i, void *_d, struct pt_regs *_r +typedef irqreturn_t (*irq_handler_t)(int _i, void *_d, struct pt_regs *_r); +#endif +#define SYNC_IRQ(_i) synchronize_irq(_i) +char * ___strtok; +char * strtok(char * s,const char * ct) +{ + char *sbegin, *send; + sbegin = s ? s : ___strtok; + if (!sbegin) { + return NULL; + } + sbegin += strspn(sbegin,ct); + if (*sbegin == '\0') { + ___strtok = NULL; + return( NULL ); + } + send = strpbrk( sbegin, ct); + if (send && *send != '\0') + *send++ = '\0'; + ___strtok = send; + return (sbegin); +} +LKM_EXPORT_SYM(___strtok); +LKM_EXPORT_SYM(strtok); +#endif /* LKM_2_x */ + +/* PCIe capabilities */ +#ifndef PCI_CAP_ID_EXP +#define PCI_CAP_ID_EXP 0x10 +#endif +#ifndef PCI_EXP_DEVCAP +#define PCI_EXP_DEVCAP 4 +#endif +#ifndef PCI_EXP_DEVCTL +#define PCI_EXP_DEVCTL 8 +#endif +#ifndef PCI_EXT_CAP_START +#define PCI_EXT_CAP_START 0x100 +#endif +#ifndef PCI_EXT_CAP_ID +#define PCI_EXT_CAP_ID(_hdr) (_hdr & 0x0000ffff) +#endif +#ifndef PCI_EXT_CAP_VER +#define PCI_EXT_CAP_VER(_hdr) ((_hdr >> 16) & 0xf) +#endif +#ifndef PCI_EXT_CAP_NEXT +#define PCI_EXT_CAP_NEXT(_hdr) ((_hdr >> 20) & 0xffc) +#endif +#ifndef PCI_EXT_CAP_ID_VNDR +#define PCI_EXT_CAP_ID_VNDR 0x0b +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +#define PCI_FIND_DEV(_d, _v, _fr) pci_find_device(_d, _v, _fr) +#else +#define PCI_FIND_DEV(_d, _v, _fr) pci_get_device(_d, _v, _fr) +#endif + +#if defined(CONFIG_RESOURCES_64BIT) || defined(CONFIG_PHYS_ADDR_T_64BIT) +#define PHYS_ADDR_IS_64BIT +#endif + +/* Structure of private SPI device */ +struct spi_dev { + uint8 cid; /* Chip ID */ + uint32 part; /* Part number of the chip */ + uint8 rev; /* Revision of the chip */ + void *robo; /* ptr to robo info required to access SPI */ + unsigned short phyid_high; /* PHYID HIGH in MII regs of detected chip */ + unsigned short phyid_low; /* PHYID LOW in MII regs of detected chip */ +}; + +struct bde_spi_device_id { + unsigned short phyid_high; /* PHYID HIGH in MII regs of detected chip */ + unsigned short phyid_low; /* PHYID LOW in MII regs of detected chip */ + uint32 model_info; + uint32 rev_info; + uint32 spifreq; +}; + +/* Maximum number of I/O windows supported per device. */ +#define BDE_NUM_IOWIN_MAX 3 + +/* I/O memory window definition. */ +struct memwin_s { + + /* Physical address of I/O window. */ + resource_size_t addr; + + /* Size of I/O window (in bytes). */ + resource_size_t size; +}; + +/* Control Data */ +typedef struct bde_ctrl_s { + struct list_head list; + + /* Specify the type of device, pci, spi, switch, ether ... */ + uint32 dev_type; + + int domain_no; + int bus_no; + int be_pio; + int use_msi; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + struct msix_entry *entries; +#endif + int msix_cnt; + union { + /* Linux PCI device pointer */ + struct pci_dev* _pci_dev; + + /* SPI device pointer */ + struct spi_dev* _spi_dev; + } dev; +#define pci_device dev._pci_dev +#define spi_device dev._spi_dev + +#ifdef LINUX_BDE_DMA_DEVICE_SUPPORT + struct device *dma_dev; +#endif + + struct memwin_s iowin[BDE_NUM_IOWIN_MAX]; + + /* Secondary mapped base address */ + sal_vaddr_t alt_base_addr; + + /* BDE device description */ + ibde_dev_t bde_dev; + + /* Interrupt Handling */ + int iLine; /* Interrupt line */ + void (*isr)(void *); + void *isr_data; + + /* + * Controls to allow two drivers to share a single set of + * hardware registers. Typically a kernel driver will handle + * a subset of hardware interrupts and a user mode driver + * will handle the remaining interrupts. + */ + void (*isr2)(void *); + void *isr2_data; + uint32_t fmask; /* Interrupts controlled by secondary handler */ + uint32_t imask; /* Enabled interrupts for primary handler */ + uint32_t imask2; /* Enabled interrupts for secondary handler */ + spinlock_t lock; /* Lock for IRQ mask synchronization */ + + /* Hardware abstraction for shared BDE functions */ + shbde_hal_t shbde; + + /* Device state : BDE_DEV_STATE_REMOVED/CHANGED */ + uint32 dev_state; + + /* inst_id */ + uint32 inst_id; +} bde_ctrl_t; + +static bde_ctrl_t _devices[LINUX_BDE_MAX_DEVICES]; +static int _ndevices = 0; +static int _switch_ndevices = 0; +static int _ether_ndevices = 0; +static int _cpu_ndevices = 0; + +#define VALID_DEVICE(_n) ((_n >= 0) && (_n < _ndevices)) + +#if defined(IPROC_CMICD) && defined(CONFIG_OF) +#define ICFG_CHIP_ID_REG 0x10236000 +#define IHOST_CMICX_MAX_INTRS 128 +static uint32 iproc_cmicx_irqs[IHOST_CMICX_MAX_INTRS]; +#endif + +/* CPU MMIO area used with CPU cards provided on demo boards */ +#if defined(BCM_SAND_SUPPORT) && (defined(__DUNE_WRX_BCM_CPU__) || defined(__DUNE_GTO_BCM_CPU__)) +static void *cpu_address = NULL; +#endif + + +/* Broadcom BCM4704 */ +#define BCM4704_VENDOR_ID 0x14E4 +#define BCM4704_DEVICE_ID 0x4704 + +/* SiByte PCI Host */ +#define SIBYTE_PCI_VENDOR_ID 0x166D +#define SIBYTE_PCI_DEVICE_ID 0x0001 + +/* Intel 21150 PCI-PCI Bridge */ +#define DC21150_VENDOR_ID 0x1011 +#define DC21150_DEVICE_ID 0x0022 + +/* HiNT HB4 PCI-PCI Bridge (21150 clone) */ +#define HINT_HB4_VENDOR_ID 0x3388 +#define HINT_HB4_DEVICE_ID 0x0022 + +/* Pericom PI7C8150 PCI-PCI Bridge (21150 clone) */ +#define PI7C8150_VENDOR_ID 0x12D8 +#define PI7C8150_DEVICE_ID 0x8150 + +/* Pericom PI7C9X130 PCI-PCIE Bridge */ +#define PCI_VNDID_PERICOM 0x12D8 +#define PCI_DEVID_PI7C9X130 0xE130 +#define DEV_CTRL_REG 0xb8 + +#define MAX_PAYLOAD_256B (1 << 5) +#define MAX_PAYLOAD_512B (2 << 5) +#define MAX_READ_REQ_256B (1 << 12) + + +/* Freescale 8548 PCI-E host Bridge */ +#define FSL_VENDOR_ID 0x1957 +#define FSL8548PCIE_DEVICE_ID 0x0013 +#define FSL2020EPCIE_DEVICE_ID 0x0070 +#define FSL8548PCIE_DEV_CTRL_REG 0x54 + +/* 4716 PCI-E host Bridge */ +#define BCM4716_VENDOR_ID 0x14e4 +#define BCM4716PCIE_DEVICE_ID 0x4716 +#define BCM4716PCIE_DEV_CAP_REG 0xd4 +#define BCM4716PCIE_DEV_CTRL_REG 0xd8 +#define BCM53000_VENDOR_ID 0x14e4 +#define BCM53000PCIE_DEVICE_ID 0x5300 + +#define BCM53000PCIE_DEV(port) ((port == 0) ? pcie0 : pcie1) +#define BCM53000PCIE_BASE(port) ((port == 0) ? 0xb8005000 : 0xb800e000) +#define BCM53000PCIE_FUNC0_COFIG_SPACE 0x400 +#define BCM53000PCIE_SROM_SPACE 0x800 +#define BCM53000PCIE_DEV_CAP_REG 0xd4 +#define BCM53000PCIE_DEV_CTRL_REG 0xd8 +#define BCM53000PCIE_MAX_PAYLOAD_MASK 0x7 +#define BCM53000PCIE_CAP_MAX_PAYLOAD_256B (1 << 0) +#define BCM53000PCIE_DEFAULT_STATUS 0x00100146 + +/* 16bit wide register. offset 14, 14*2 = 0x1c */ +#define BCM53000PCIE_SPROM_OFFSET 0x1c +/* bit 15:13 spromData.MaxPayloadSize. 1: 256 bytes */ +#define BCM53000PCIE_SPROM_MAX_PAYLOAD_MASK 0xe000 +#define BCM53000PCIE_SPROM_MAX_PAYLOAD_256B (1 << 13) + + +/* Intel 21150, HiNT HB4 and other 21150-compatible */ +#define PCI_CFG_DEC21150_SEC_CLK 0x68 + +#define BCM4704_ENUM_BASE 0x18000000 +#define BCM4704_MEMC_BASE (BCM4704_ENUM_BASE+0x8000) +#define BCM4704_MEMC_PRIORINV 0x18 + +/* PLX PCI-E Switch */ +#define PLX_PEX8608_DEV_ID 0x8608 +#define PLX_PEX8617_DEV_ID 0x8617 +#define PLX_PEX86XX_DEV_CTRL_REG 0x70 + +/* Broadcom BCM58525 */ +#define BCM58525_PCI_VENDOR_ID 0x14E4 +#define BCM58525_PCI_DEVICE_ID 0x8025 +#define BCM58522_PCI_DEVICE_ID 0x8022 + +/* Broadcom BCM58712 */ +#define BCM58712_PCI_VENDOR_ID 0x14E4 +#define BCM58712_PCI_DEVICE_ID 0x168E + +/* Default gicd address if not available in DTB */ +#define IHOST_GICD_REG_ADDR 0x10781100 +#define IHOST_GICD_REG_REMAP_LEN 0x100 + +#define IHOST_GICD_REG_ADDR_VALID(d, addr) \ + (_devices[d].bde_dev.base_address1 && \ + (addr & 0xFFFFFF00) == _devices[d].iowin[1].addr) + +#define IHOST_GICD_REG_ADDR_REMAP(d, addr) \ + (void *)(_devices[d].bde_dev.base_address1 + (addr - _devices[d].iowin[1].addr)) + +static uint32_t _read(int d, uint32_t addr); + +#ifdef BCM_ICS +#else +/* Used to determine overall memory limits across all devices */ +static uint32_t _pci_mem_start = 0xFFFFFFFF; +static uint32_t _pci_mem_end = 0; + +/* Used to control MSI interrupts */ +static int use_msi = 0; +#endif + +#ifdef BCM_PLX9656_LOCAL_BUS + +#define CPLD_OFFSET 0x00800000 +#define CPLD_REVISION_REG 0x0000 +#define CPLD_REVISION_MASK 0xffff +#define CPLD_RESET_REG 0x0004 +#define CPLD_RESET_NONE 0x0000 + +#define PL0_OFFSET 0x00800000 +#define PL0_SIZE 0x00040000 +#define PL0_REVISION_REG 0x0000 + +/* Assume there's only one PLX PCI-to-Local bus bridge if any */ +static bde_ctrl_t plx_ctrl; +static int num_plx = 0; + +#endif /* BCM_PLX9656_LOCAL_BUS */ + +static spinlock_t bus_lock; + +static int +_parse_eb_args(char *str, char * format, ...) + __attribute__ ((format (scanf, 2, 3))); + +static int +_parse_eb_args(char *str, char * format, ...) +{ + va_list args; + + va_start(args, format); + vsscanf(str, format, args); + va_end(args); + + return 0; +} + +static void +_bde_add_device(void) +{ + int add_switch_device = 0; + if (_devices[_ndevices].dev_type & BDE_SWITCH_DEV_TYPE) { + _switch_ndevices++; + add_switch_device = 1; + } else if (_devices[_ndevices].dev_type & BDE_ETHER_DEV_TYPE) { + _ether_ndevices++; + } else if (_devices[_ndevices].dev_type & BDE_CPU_DEV_TYPE) { + _cpu_ndevices++; + } else { + return; + } + _ndevices++; + + /* + * In order to be backward compatible with the user mode BDE + * (specifically the interrupt IOCTLs) and the CM, switch devices + * *must* come first. If this is not the case (due to the probing + * order), we let the non-switch device(s) drop down to the end of + * the device array. + */ + if (add_switch_device) { + bde_ctrl_t tmp_dev; + int i, s = 0; + + while (s < _switch_ndevices) { + if (_devices[s].dev_type & BDE_SWITCH_DEV_TYPE) { + s++; + continue; + } + tmp_dev = _devices[s]; + for (i = s; i < _ndevices - 1; i++) { + _devices[i] = _devices[i+1]; + } + _devices[i] = tmp_dev; + } + + _dma_init(_switch_ndevices-1); + } + + /* Initialize device locks */ + spin_lock_init(&_devices[_ndevices-1].lock); +} + +static int +_eb_device_create(resource_size_t paddr, int irq, int rd_hw, int wr_hw) +{ + bde_ctrl_t *ctrl; + uint32 dev_rev_id = 0x0, dev_id; + + dev_id = _ndevices; + + ctrl = _devices + _ndevices; + + ctrl->dev_type |= BDE_EB_DEV_TYPE | BDE_SWITCH_DEV_TYPE; + ctrl->pci_device = NULL; /* No PCI bus */ + + if(rd_hw) { + ctrl->dev_type |= BDE_DEV_BUS_RD_16BIT; + } + + if (wr_hw) { + ctrl->dev_type |= BDE_DEV_BUS_WR_16BIT; + } + + /* Map in the device */ + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(paddr, 0x10000); + ctrl->iowin[0].addr = paddr; + ctrl->iowin[0].size = 0x10000; + + dev_rev_id = _read(dev_id, 0x178); /* CMIC_DEV_REV_ID */ + + ctrl->bde_dev.device = dev_rev_id & 0xFFFF; + ctrl->bde_dev.rev = (dev_rev_id >> 16) & 0xFF; + + ctrl->iLine = irq; + ctrl->isr = NULL; + ctrl->isr_data = NULL; + + gprintk("Created EB device at BA=%x IRQ=%d RD16=%d WR16=%d device=0x%x\n", + (unsigned int)paddr, irq, rd_hw, wr_hw, ctrl->bde_dev.device); + + _bde_add_device(); + + return 0; +} + +#ifdef BCM_SAND_SUPPORT + +#include + +static int +sand_device_create(void) +{ + bde_ctrl_t* ctrl; + + ctrl = _devices; + +#ifndef __DUNE_LINUX_BCM_CPU_PCIE__ + ctrl->dev_type |= BDE_PCI_DEV_TYPE | BDE_SWITCH_DEV_TYPE; + ctrl->pci_device = NULL; /* No PCI bus */ + + /* Map in the device */ + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(0x40000000, 0x100000); + ctrl->iowin[0].addr = 0x40000000; + ctrl->iowin[0].size = 0x100000; + + ctrl->iLine = 0; + ctrl->isr = NULL; + ctrl->isr_data = NULL; + + ctrl->bde_dev.device = BCM88950_DEVICE_ID; + ctrl->bde_dev.rev = BCM88950_A0_REV_ID; +#endif + + /* Map CPU regs */ +#ifdef __DUNE_WRX_BCM_CPU__ + cpu_address = IOREMAP(0x18000000, 0x4000000); +#elif defined(__DUNE_GTO_BCM_CPU__) + cpu_address = IOREMAP(0xe0000000, 0x100000); +#endif + + if ((ctrl->bde_dev.device == PCP_PCI_DEVICE_ID)) { + ctrl->bde_dev.device = GEDI_DEVICE_ID; + ctrl->bde_dev.rev = GEDI_REV_ID; + } + + if ((ctrl->bde_dev.device == ACP_PCI_DEVICE_ID)) { + ctrl->dev_type |= BDE_PCI_DEV_TYPE | BDE_SWITCH_DEV_TYPE; + } + +#ifndef __DUNE_LINUX_BCM_CPU_PCIE__ + _bde_add_device(); +#endif + + return 0; +} +#endif /* BCM_SAND_SUPPORT */ + +#ifdef IPROC_CMICD +static void +iproc_cmicd_get_irqres(ibde_dev_t bde_dev, struct resource *res_irq) +{ + shbde_iproc_config_t iproc_config, *icfg = &iproc_config; + + /* iProc configuration parameters */ + memset(icfg, 0, sizeof(*icfg)); + shbde_iproc_config_init(icfg, bde_dev.device, bde_dev.rev); + + if ((icfg->iproc_ver == 0) && (debug >= 1)) { + gprintk("Unable to determine iProc version\n"); + } + + if (icfg->iproc_ver == 7) { + res_irq->start = 221; + } else if (icfg->iproc_ver == 10) { + res_irq->start = 184; + } + +} + +#include +#include + +extern int iproc_platform_driver_register(struct platform_driver *drv); +extern void iproc_platform_driver_unregister(struct platform_driver *drv); +extern int iproc_platform_device_register(struct platform_device *drv); +extern void iproc_platform_device_unregister(struct platform_device *drv); + +extern struct resource * +iproc_platform_get_resource(struct platform_device *dev, unsigned int type, + unsigned int num); + +#define IPROC_CHIPCOMMONA_BASE 0x18000000 +#define IPROC_CMICD_BASE 0x48000000 +#define IPROC_CMICD_SIZE 0x40000 +#define IPROC_CMICD_INT 194 + +#define IPROC_CMICD_COMPATIBLE "brcm,iproc-cmicd" +#define IPROC_CMICX_COMPATIBLE "brcm,iproc-cmicx" + +static int +iproc_cmicd_probe(struct platform_device *pldev) +{ + bde_ctrl_t *ctrl; + uint32 size, dev_rev_id; + struct resource *memres, *irqres; +#ifdef CONFIG_OF + if (debug >= 1) { + gprintk("iproc_cmicd_probe %s\n", pldev->dev.of_node ? "with device node":""); + } +#endif + memres = iproc_platform_get_resource(pldev, IORESOURCE_MEM, 0); + if (memres == NULL) { + gprintk("Unable to retrieve iProc CMIC resources"); + return -1; + } + size = memres->end - memres->start + 1; + + ctrl = _devices + _ndevices; + + ctrl->dev_type = BDE_AXI_DEV_TYPE | BDE_SWITCH_DEV_TYPE | BDE_256K_REG_SPACE; + ctrl->pci_device = NULL; /* No PCI bus */ + + /* Map CMIC block in the AXI memory space into CPU address space */ + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(memres->start, size); + if (!ctrl->bde_dev.base_address) { + gprintk("Error mapping iProc CMIC registers"); + return -1; + } + ctrl->iowin[0].addr = memres->start; + ctrl->iowin[0].size = size; + +#ifdef CONFIG_OF + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + uint32 *icfg_chip_id; + icfg_chip_id = (uint32 *)IOREMAP(ICFG_CHIP_ID_REG, 2 * sizeof(uint32)); + if (icfg_chip_id == NULL) { + gprintk("Error mapping ICFG_CHIP_ID_REG\n"); + return -1; + } + ctrl->bde_dev.device = readl(icfg_chip_id) & 0xffff; + ctrl->bde_dev.rev = readl(icfg_chip_id+1) & 0xff; + iounmap(icfg_chip_id); + /* Map GICD block in the AXI memory space into CPU address space */ + memres = iproc_platform_get_resource(pldev, IORESOURCE_MEM, 1); + if (memres) { + ctrl->bde_dev.base_address1 = (sal_vaddr_t)IOREMAP(memres->start, memres->end - memres->start + 1); + ctrl->iowin[1].addr = memres->start; + ctrl->iowin[1].size = memres->end - memres->start + 1; + } else { + /* Use default address if not available in DTB */ + ctrl->bde_dev.base_address1 = (sal_vaddr_t)IOREMAP(IHOST_GICD_REG_ADDR, IHOST_GICD_REG_REMAP_LEN); + ctrl->iowin[1].addr = IHOST_GICD_REG_ADDR; + ctrl->iowin[1].size = IHOST_GICD_REG_REMAP_LEN; + } + if (ctrl->bde_dev.base_address1) { + if (debug >= 1) { + gprintk("base_address1:0x%lx phys_address1:0x%lx\n", + (unsigned long)ctrl->bde_dev.base_address1, (unsigned long)ctrl->iowin[1].addr); + } + } else { + gprintk("Error mapping ihost GICD registers\n"); + } + } else +#endif + { + /* Read switch device ID from CMIC */ + dev_rev_id = *((uint32 *)(ctrl->bde_dev.base_address + 0x10224)); +#if defined(BCM_CMICM_SUPPORT) && defined(BE_HOST) + ctrl->bde_dev.device = ( (((dev_rev_id >> 16) & 0xff) << 8) | + ((dev_rev_id >> 24) & 0xff)); + ctrl->bde_dev.rev = (dev_rev_id >> 8) & 0xff ; +#else + ctrl->bde_dev.device = dev_rev_id & 0xffff; + ctrl->bde_dev.rev = (dev_rev_id >> 16) & 0xff; +#endif + ctrl->bde_dev.base_address1 = 0; + } + +#ifdef CONFIG_OF + if (!pldev->dev.of_node) +#endif + { + /* Assign locally if not available from device node */ + iproc_cmicd_get_irqres(ctrl->bde_dev, &pldev->resource[0]); + } + +#ifdef CONFIG_OF + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + int i; + for (i = 0; i < IHOST_CMICX_MAX_INTRS; i++) { + irqres = iproc_platform_get_resource(pldev, IORESOURCE_IRQ, i); + iproc_cmicx_irqs[i] = irqres->start; + if (debug >= 1) { + gprintk("iproc_cmicx_irqs[%d] = %d\n", i, iproc_cmicx_irqs[i]); + } + } + ctrl->iLine = iproc_cmicx_irqs[0]; + } else +#endif + { + irqres = iproc_platform_get_resource(pldev, IORESOURCE_IRQ, 0); + ctrl->iLine = irqres->start; + } + + ctrl->isr = NULL; + ctrl ->isr_data = NULL; + +#ifdef LINUX_BDE_DMA_DEVICE_SUPPORT + ctrl->dma_dev = &pldev->dev; +#endif + + /* Let's boogie */ + _bde_add_device(); + return 0; +} + +static int +iproc_cmicd_remove(struct platform_device *pldev) +{ + return 0; +} +#ifdef CONFIG_OF +static const struct of_device_id iproc_cmicd_of_match[] = { + { .compatible = IPROC_CMICD_COMPATIBLE }, + { .compatible = IPROC_CMICX_COMPATIBLE }, + {}, +}; +MODULE_DEVICE_TABLE(of, iproc_cmicd_of_match); +#endif +static char iproc_cmicd_string[] = "bcmiproc-cmicd"; + +static struct platform_driver iproc_cmicd_driver = +{ + .probe = iproc_cmicd_probe, + .remove = iproc_cmicd_remove, + .driver = + { + .name = iproc_cmicd_string, + .owner = THIS_MODULE, +#ifdef CONFIG_OF + .of_match_table = iproc_cmicd_of_match, +#endif + }, +}; + +typedef enum { + IPROC_CMICD_RES_INTR = 0, + IPROC_CMICD_RES_MEM +} IPROC_CMICD_RES_E; + +static struct resource iproc_cmicd_resources[] = { + [IPROC_CMICD_RES_INTR] = { + .flags = IORESOURCE_IRQ, + .start = IPROC_CMICD_INT, + }, + [IPROC_CMICD_RES_MEM] = { + .flags = IORESOURCE_MEM, + .start = IPROC_CMICD_BASE, + .end = IPROC_CMICD_BASE+IPROC_CMICD_SIZE-1, + }, +}; + +static void +iproc_cmicd_release(struct device *dev) +{ +} + +static u64 iproc_cmicd_dmamask = DMA_BIT_MASK(32); + +static struct platform_device iproc_cmicd_pdev = { + .name = iproc_cmicd_string, + .id = 0, + .dev = { + .release = iproc_cmicd_release, + .init_name = iproc_cmicd_string, + .dma_mask = &iproc_cmicd_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = iproc_cmicd_resources, + .num_resources = ARRAY_SIZE(iproc_cmicd_resources), +}; + +static int +iproc_has_cmicd(void) +{ + void *iproc_cca_base; + uint32 cca_cid; + + /* Read ChipcommonA chip id register to identify current SOC */ + iproc_cca_base = IOREMAP(IPROC_CHIPCOMMONA_BASE, 0x3000); + if (iproc_cca_base == NULL) { + gprintk("iproc_has_cmicd: ioremap of ChipcommonA registers failed"); + return 0; + } + cca_cid = readl((uint32 *)iproc_cca_base); + cca_cid &= 0xffff; + iounmap(iproc_cca_base); + + /* Only allowed accessing CMICD module if the SOC has it */ + switch (cca_cid) { + default: + break; + } + + /* Device has CMIC */ + return 1; +} + +#define IPROC_CHIPCOMMONA_EROM_PTR_OFFSET (0x180000fc) +#define EROM_MAX_SIZE (0x1000) +#define EROM_PARTNUM_CMICD (0x14) + +#define EROM_DESC_COMPIDENT (0x1) +#define EROM_DESC_MASTER (0x3) +#define EROM_DESC_ADDR (0x5) +#define EROM_DESC_END (0xF) +#define EROM_DESC_EMPTY (0) + +#define EROM_IS_DESC_COMPIDENT(x) ((x & 0x7) == EROM_DESC_COMPIDENT) +#define EROM_IS_DESC_MASTER(x) ((x & 0x7) == EROM_DESC_MASTER) +#define EROM_IS_DESC_ADDR(x) ((x & 0x7) == EROM_DESC_ADDR) +#define EROM_IS_DESC_END(x) ((x & 0xF) == EROM_DESC_END) + +#define EROM_GET_PARTNUM(x) ((x >> 8) & (0xFFF)) /* Bit 8~19 */ +#define EROM_GET_ADDRESS(x) ((x >> 12) & (0xFFFFF)) /* Bit 12~31 */ +#define EROM_GET_SIZETYPE(x) ((x >> 4) & (0x3)) /* Bit 4~5 */ +#define EROM_GET_AG32(x) ((x >> 3) & (0x1)) /* Bit 3 */ +#define EROM_GET_SIZE(x) ((x >> 12) & (0xFFFFF)) /* Bit 12~31 */ +#define EROM_GET_SG32(x) ((x >> 3) & (0x1)) /* Bit 3 */ + +#define EROM_ADDR_SIZETYPE_4K (0) +#define EROM_ADDR_SIZETYPE_8K (1) +#define EROM_ADDR_SIZETYPE_16K (2) +#define EROM_ADDR_SIZETYPE_MORE (3) + +#define EROM_ADDR_FLAG_AG32 (1) /* Address space greater than 32 bit */ +#define EROM_ADDR_FLAG_SIZE (2) /* Addition size descriptor */ +#define EROM_ADDR_FLAG_SG32 (4) /* Size descriptor greater than 32 bit */ + +static void +iproc_cmicd_get_memregion(struct resource *res_mem) +{ + void *erom_ptr_oft; + uint32_t erom_phy_addr; + uint32_t *erom_base; + uint32_t i = 0; + uint32_t word = 0; + uint8_t more_addr_word = 0; /* bit 0: AG32; bit 1: SIZE; bit 2: SG32 */ + uint8_t found_cmicd_dev = 0; + uint8_t size_type = 0; + bool is_compident_a = 1; /* 1: CompidentA; o/w: CompidentB */ + + erom_ptr_oft = IOREMAP(IPROC_CHIPCOMMONA_EROM_PTR_OFFSET, 0x100); + + erom_phy_addr = readl((uint32 *)(erom_ptr_oft)); + iounmap(erom_ptr_oft); + + erom_base = IOREMAP(erom_phy_addr, EROM_MAX_SIZE); + + while (1) { + word = readl((uint32 *)(erom_base + i)); + + if (EROM_IS_DESC_ADDR(word) || more_addr_word) { + if (more_addr_word == 0) { /* Normal Addr Desc */ + if (EROM_GET_AG32(word) == 1) { + more_addr_word |= EROM_ADDR_FLAG_AG32; + } + + size_type = EROM_GET_SIZETYPE(word); + if (size_type == EROM_ADDR_SIZETYPE_MORE) { + more_addr_word |= EROM_ADDR_FLAG_SIZE; + } + + if (found_cmicd_dev == 1) { + res_mem->start = EROM_GET_ADDRESS(word) << 12; + if (size_type < EROM_ADDR_SIZETYPE_MORE) { + res_mem->end = res_mem->start + 4096 * (1 << size_type) - 1; + } + } + } + else if (more_addr_word & EROM_ADDR_FLAG_AG32) { /* UpperAddr Desc */ + more_addr_word &= ~EROM_ADDR_FLAG_AG32; + + if (found_cmicd_dev == 1) { + /* res_mem->start |= word << 32; */ + gprintk("Expect cmicd address to be 32-bit\n"); + } + } + else if (more_addr_word & EROM_ADDR_FLAG_SIZE) { /* Size Desc */ + if (EROM_GET_SG32(word) == 1) { + more_addr_word |= EROM_ADDR_FLAG_SG32; + } + + more_addr_word &= ~EROM_ADDR_FLAG_SIZE; + + if (found_cmicd_dev == 1) { + res_mem->end = res_mem->start + (EROM_GET_SIZE(word) << 12) - 1; + } + } + else if (more_addr_word & EROM_ADDR_FLAG_SG32) { /* UpperSize Desc */ + more_addr_word &= ~EROM_ADDR_FLAG_SG32; + + if (found_cmicd_dev == 1) { + /* res_mem->end += (word) << 32; */ + gprintk("Expect cmicd size to be 32-bit\n"); + } + } + + if (found_cmicd_dev == 1 && more_addr_word == 0) { + break; /* We have gotten all necessary information, exit the loop */ + } + } + else if (EROM_IS_DESC_COMPIDENT(word)) { + if (is_compident_a == 1) { + if (EROM_GET_PARTNUM(word) == EROM_PARTNUM_CMICD) { + found_cmicd_dev = 1; + } + } + + is_compident_a = 1 - is_compident_a; + } + else if (EROM_IS_DESC_END(word)) { + break; + } + + i++; + } + iounmap(erom_base); + + if (debug >= 1) { + gprintk("CMICD info by %s: cmicd_mem.start=%lx, cmicd_mem.end=%lx\n", + found_cmicd_dev ? "EROM" : "Default", + (unsigned long)iproc_cmicd_resources[IPROC_CMICD_RES_MEM].start, + (unsigned long)iproc_cmicd_resources[IPROC_CMICD_RES_MEM].end); + } +} +#endif /* IPROC_CMICD */ + +#ifdef BCM_ICS +static int +_ics_bde_create(void) +{ + bde_ctrl_t *ctrl; + uint32 dev_rev_id = 0x0; + resource_size_t paddr; + + if (_ndevices == 0) { + ctrl = _devices + _ndevices; + + ctrl->dev_type |= BDE_ICS_DEV_TYPE | BDE_SWITCH_DEV_TYPE; + ctrl->pci_device = NULL; /* No PCI bus */ + + /* Map in the device */ + paddr = BCM_ICS_CMIC_BASE; + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(paddr, 0x10000); + ctrl->iowin[0].addr = paddr; + ctrl->iowin[0].size = 0x10000; + + dev_rev_id = *((unsigned int *)(KSEG1ADDR(paddr + 0x178))); + + ctrl->bde_dev.device = dev_rev_id & 0xFFFF; + ctrl->bde_dev.rev = (dev_rev_id >> 16) & 0xFF; + + ctrl->iLine = 5; /* From raptor linux BSP */ + + ctrl->isr = NULL; + ctrl->isr_data = NULL; + printk("Created ICS device ..%x\n", ctrl->bde_dev.base_address); + _bde_add_device(); + } + + return 0; +} + +#else /* !BCM_ICS */ + +extern struct pci_bus *pci_find_bus(int domain, int busnr); + +/* + * PCI device table. + * Populated from the include/soc/devids.h file. + */ + +static const struct pci_device_id _id_table[] = { + { BROADCOM_VENDOR_ID, BCM5675_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM5676_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56218X_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56218_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56219_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56218R_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56219R_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56214_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56215_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56214R_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56215R_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56216_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56217_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56212_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56213_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56230_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56231_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53718_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53714_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53716_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56018_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56014_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56224_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56225_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56226_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56227_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56228_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56229_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56024_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56025_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53724_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53726_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56100_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56101_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56102_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56105_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56106_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56107_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56110_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56111_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56112_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56115_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56116_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56117_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56300_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56301_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56302_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56303_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56304_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56404_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56305_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56306_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56307_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56308_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56309_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56310_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56311_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56312_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56313_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56314_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56315_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56316_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56317_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56318_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56319_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#ifndef EXCLUDE_BCM56324 + { BROADCOM_VENDOR_ID, BCM56322_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56324_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#endif /* EXCLUDE_BCM56324 */ + { BROADCOM_VENDOR_ID, BCM53312_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53313_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53314_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53324_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53333_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53334_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53342_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53343_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53344_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53346_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53347_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53393_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53394_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53300_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53301_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53302_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56500_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56501_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56502_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56503_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56504_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56505_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56506_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56507_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56508_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56509_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56510_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56511_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56512_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56513_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56514_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56516_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56517_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56518_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56519_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56580_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56620_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56624_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56626_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56628_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56629_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56680_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56684_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56700_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56701_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56720_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56721_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56725_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56800_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56801_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56802_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56803_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56820_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56821_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56822_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56823_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56825_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56630_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56634_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56636_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56638_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56639_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56538_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56520_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56521_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56522_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56524_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56526_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56534_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56685_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56689_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56331_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56333_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56334_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56338_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56320_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56321_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56132_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56134_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88732_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56140_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56142_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56143_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56144_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56146_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56147_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56149_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56150_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56151_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56152_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56930_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56931_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56935_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56936_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56939_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56840_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56841_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56842_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56843_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56844_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56845_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56846_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56847_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56549_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56053_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56838_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56831_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56835_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56849_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56742_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56743_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56744_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56745_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56746_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56640_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56548_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56547_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56346_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56345_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56344_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56342_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56340_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56049_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56048_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56047_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56042_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56041_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56040_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56643_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56644_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56648_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56649_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56540_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56541_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56542_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56543_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56544_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56545_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56546_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56044_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56045_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56046_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM55440_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56440_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56441_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56442_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56443_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56445_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56446_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56447_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56448_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56449_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56240_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56241_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56242_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56243_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56245_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56246_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM55450_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM55455_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56260_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56270_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56271_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56272_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53460_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53461_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56261_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56262_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56263_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56265_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56266_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56267_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56268_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56233_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56460_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56461_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56462_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56463_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56465_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56466_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56467_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56468_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56246_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56248_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56450_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56452_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56454_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56455_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56456_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56457_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56458_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56850_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56851_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56852_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56853_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56854_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56855_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56834_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56750_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56830_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM55440_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM55441_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56060_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56062_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56063_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56064_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56065_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56066_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53401_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53411_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53402_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53412_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53403_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53413_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53404_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53414_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53405_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53415_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53406_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53416_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53408_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53418_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53454_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53455_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53456_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53457_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53422_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53424_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53426_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53365_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53369_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56960_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56961_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56962_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56963_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56930_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56968_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56970_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56971_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56972_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56974_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56975_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56168_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56169_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56560_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56561_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56562_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56565_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56566_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56567_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56670_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56671_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56672_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56675_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56568_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56670_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56760_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56761_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56762_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56764_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56765_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56766_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56768_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56069_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56068_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56160_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56162_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56163_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56164_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56166_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53440_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53443_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53442_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53434_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56965_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56969_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56966_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56967_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56170_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56172_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56174_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53570_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53575_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9656, PCI_ANY_ID, PCI_ANY_ID }, + { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9056, PCI_ANY_ID, PCI_ANY_ID }, + { BCM53000_VENDOR_ID, BCM53000PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#ifdef BCM_PETRA_SUPPORT + { BROADCOM_VENDOR_ID, BCM88650_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88350_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88351_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88450_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88451_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88550_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88551_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88552_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88651_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88654_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { PCP_PCI_VENDOR_ID, PCP_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { ACP_PCI_VENDOR_ID, ACP_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88660_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88670_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88671_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88671M_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88672_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88673_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88674_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88675_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88675M_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88676_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88676M_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88677_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88678_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88679_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88370_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88371_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88371M_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88375_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88470_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88470P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88471_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88473_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88474_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88474H_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88476_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88477_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + + + { BROADCOM_VENDOR_ID, BCM88270_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88272_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88273_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88274_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88278_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88279_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + + { BROADCOM_VENDOR_ID, BCM8206_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + + { BROADCOM_VENDOR_ID, BCM88376_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88376M_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88377_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88378_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88379_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88680_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88681_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88682_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88683_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88684_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88685_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88687_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88380_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88381_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88202_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88360_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88361_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88363_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88460_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88461_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88560_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88561_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88562_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88661_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88664_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#endif +#ifdef BCM_DNX_SUPPORT + { BROADCOM_VENDOR_ID, BCM88690_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88690_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88691_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88692_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88693_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88694_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88695_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88696_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88697_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88698_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88699_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8869A_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8869B_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8869C_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8869D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8869E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8869F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88800_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88821_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88826_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88802_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88803_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88804_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88822_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88823_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88824_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88825_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88480_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88481_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88482_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88483_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88484_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88485_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88486_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88487_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88488_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88489_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8848A_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8848B_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8848C_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8848D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8848E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8848F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88850_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#endif /* BCM_DNX_SUPPORT */ +#ifdef BCM_DFE_SUPPORT + { BROADCOM_VENDOR_ID, BCM88750_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88753_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88755_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88770_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88773_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88774_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88775_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88776_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88777_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#ifndef DNX_IGNORE_FE3200 + { BROADCOM_VENDOR_ID, BCM88950_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#endif + { BROADCOM_VENDOR_ID, BCM88953_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88954_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88955_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88956_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88752_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88772_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88952_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#endif +#ifdef BCM_DNXF_SUPPORT + { BROADCOM_VENDOR_ID, BCM88790_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88791_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88792_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88793_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88794_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88795_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88796_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88797_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88798_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88799_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8879A_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8879B_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8879C_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8879D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8879F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#endif + { BROADCOM_VENDOR_ID, BCM56860_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56861_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56862_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56864_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56865_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56866_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56867_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56868_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56833_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56832_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56836_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56870_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56273_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56274_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56275_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56276_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56277_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56278_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56370_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56371_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56372_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56374_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56375_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56376_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56377_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56577_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56578_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56579_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56873_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56770_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56771_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56980_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56981_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56982_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56983_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56984_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53540_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53547_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53548_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53549_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { 0, 0, 0, 0 } +};; + +MODULE_DEVICE_TABLE(pci, _id_table); + +#define pci_bus_b(n) list_entry(n, struct pci_bus, node) +#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list) +#define MAX_RC_NUM 4 + +static struct pci_bus * +pci_do_bus_find(struct pci_bus* bus, int rc, int vendor, int device) +{ + struct list_head *tmp; + struct pci_dev *dev; + struct pci_bus *sub_bus; + int func = 0; + + if (unlikely(list_empty(&bus->children))) { + return NULL; + } + list_for_each(tmp, &bus->children) { + sub_bus = pci_bus_b(tmp); + dev = sub_bus->self; + func = dev->devfn & 0x7; + if (dev->vendor == vendor && dev->device == device && rc == func) { + if (debug >= 1) { + gprintk("pci_do_bus_find: dev->vendor = 0x%x, dev->device = 0x%x on rc(%d)\n", + dev->vendor, dev->device, rc); + } + return sub_bus; + } + } + return NULL; +} + +static struct pci_dev * +_pci_do_bus_dev_find(struct pci_bus* bus, unsigned int vendor, unsigned int device) +{ + struct list_head *tmp; + struct pci_dev *dev; + + if (unlikely(list_empty(&bus->devices))) { + return NULL; + } + list_for_each(tmp, &bus->devices) { + dev = pci_dev_b(tmp); + if (dev->vendor == vendor && (device == PCI_ANY_ID || dev->device == device)) { + if (debug >= 1) { + gprintk("_pci_do_rc_dev_find: vendor = %x, device = %x\n", vendor, device); + } + return dev; + } + } + return NULL; +} + +static struct pci_dev * +pci_do_rc_dev_find(int rc) +{ + struct pci_bus *root_bus = pci_find_bus(0,0); + struct pci_bus *bus_rc = NULL; + struct pci_dev *dev_on_rc = NULL; + unsigned int pci_dev_id = 0; + + if(NULL == root_bus) { + if (debug >= 1) gprintk("Not find root bus\n"); + return NULL; + } + bus_rc = pci_do_bus_find(root_bus, rc, 0x184e, 0x1004); + if (NULL == bus_rc) { + if (debug >= 1) { + gprintk("Not find vendor(0x184e) device(0x1004) bus\n"); + } + return NULL; + } + for(pci_dev_id = 0; pci_dev_id < sizeof(_id_table)/sizeof(struct pci_device_id); pci_dev_id++) { + dev_on_rc = _pci_do_bus_dev_find(bus_rc, _id_table[pci_dev_id].vendor, _id_table[pci_dev_id].device); + if (NULL != dev_on_rc) { + return dev_on_rc; + } + } + if (debug >= 1) { + gprintk("Not find device at rc(%d)\n", rc); + } + return NULL; +} + +/* + * Function: p2p_bridge + * + * Purpose: + * Finalize initialization secondary PCI-PCI bridge. + * Parameters: + * membase - start of memory address space for secondary PCI bus + * Returns: + * 0 + * Notes: + * The membase depends on the processor architecture, and is + * derived from the memory space addresses set up by the kernel. + */ +static int +p2p_bridge(void) +{ + struct pci_dev *dev, *dev_on_rc; + uint16 cmd; + uint16 mem_base; + uint16 mem_limit; + uint8 bridge_ctrl; + uint8 rc_index; + + if ((dev = PCI_FIND_DEV(DC21150_VENDOR_ID, DC21150_DEVICE_ID, NULL)) != NULL || + (dev = PCI_FIND_DEV(HINT_HB4_VENDOR_ID, HINT_HB4_DEVICE_ID, NULL)) != NULL || + (dev = PCI_FIND_DEV(PI7C8150_VENDOR_ID, PI7C8150_DEVICE_ID, NULL)) != NULL) { + + if (debug >= 1) gprintk("fixing up PCI-to-PCI bridge\n"); + /* Adjust command register */ + pci_read_config_word(dev, PCI_COMMAND, &cmd); + cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; + /* Disable device */ + pci_write_config_word(dev, PCI_COMMAND, 0); + /* Initialize non-prefetchable memory window if needed */ + pci_read_config_word(dev, PCI_MEMORY_BASE, &mem_base); + if (mem_base == 0) { + mem_base = (uint16)((_pci_mem_start & 0xFFF00000) >> 16); + mem_limit = (uint16)((_pci_mem_end & 0xFFF00000) >> 16); + pci_write_config_word(dev, PCI_MEMORY_BASE, mem_base); + pci_write_config_word(dev, PCI_MEMORY_LIMIT, mem_limit); + } + /* Enable PCI clocks on remote end */ + pci_write_config_word(dev, PCI_CFG_DEC21150_SEC_CLK, 0); + /* Re-enable config space */ + pci_write_config_word(dev, PCI_COMMAND, cmd); + + /* Avoid DMA data corruption */ + if (dev->vendor == HINT_HB4_VENDOR_ID) { + /* Fix for HiNT bridge and BCM4704 DMA problem */ + if ((dev = PCI_FIND_DEV(BCM4704_VENDOR_ID, BCM4704_DEVICE_ID, NULL)) != NULL) { + /* Reset PrefetchEn (PE) */ + pci_write_config_dword(dev, 0x8c, 1); + if (debug >= 1) { + gprintk("reset PrefetchEn on BCM4704 when HiNT bridge is present\n"); + } + } + } + } + /* Enable fast back-to-back read/write */ + if ((dev = PCI_FIND_DEV(PI7C8150_VENDOR_ID, PI7C8150_DEVICE_ID, NULL)) != NULL) { + pci_read_config_word(dev, PCI_COMMAND, &cmd); + cmd |= PCI_COMMAND_FAST_BACK; + pci_read_config_byte(dev, PCI_BRIDGE_CONTROL, &bridge_ctrl); + bridge_ctrl |= PCI_BRIDGE_CTL_FAST_BACK; + pci_write_config_word(dev, PCI_COMMAND, 0); + pci_write_config_byte(dev, PCI_BRIDGE_CONTROL, bridge_ctrl); + pci_write_config_word(dev, PCI_COMMAND, cmd); + } + /* Netlogic XLP CPU */ + for(rc_index = 0; rc_index < MAX_RC_NUM; rc_index++) { + dev_on_rc = pci_do_rc_dev_find(rc_index); + if (dev_on_rc != NULL ) { + dev = PCI_FIND_DEV(0x184e, 0x1004, NULL); + if (dev != NULL ) { + pci_write_config_dword(dev,0x78,MAX_PAYLOAD_256B | + MAX_READ_REQ_256B); + } + } + } + if ((dev = PCI_FIND_DEV(0x14e4, 0xb634, NULL)) != NULL) { + pci_write_config_dword(dev,0x78,MAX_PAYLOAD_256B | + MAX_READ_REQ_256B); + } + + if ((dev = PCI_FIND_DEV(PCI_VNDID_PERICOM, PCI_DEVID_PI7C9X130, NULL)) != NULL) { + /* + * Configure the PCIE cap: Max payload size: 256, Max Read + * Request size: 256, disabling relax ordering. + * Writes to the PCIE capability device control register + */ + pci_write_config_dword(dev, DEV_CTRL_REG, + MAX_PAYLOAD_256B | MAX_READ_REQ_256B); + } + + if ((dev = PCI_FIND_DEV(FSL_VENDOR_ID, FSL8548PCIE_DEVICE_ID, NULL)) != NULL || + (dev = PCI_FIND_DEV(FSL_VENDOR_ID, FSL2020EPCIE_DEVICE_ID, NULL)) != NULL) { + /* + * Configure the PCIE cap: Max payload size: 256, Max Read + * Request size: 256, disabling relax ordering. + * Writes to the PCIE capability device control register + */ + pci_write_config_dword(dev, FSL8548PCIE_DEV_CTRL_REG, + MAX_PAYLOAD_256B | MAX_READ_REQ_256B); + } + if ((dev = PCI_FIND_DEV(BCM4716_VENDOR_ID, BCM4716PCIE_DEVICE_ID, NULL)) != NULL || + (dev = PCI_FIND_DEV(BCM53000_VENDOR_ID, BCM53000PCIE_DEVICE_ID, NULL)) != NULL) { + uint32 tmp, maxpayld, device_bmp=0, mask; + unsigned long addr; + uint16 tmp16, tmp161; + int i, bus0 = -1, bus1 = -1, port; + struct pci_dev *pcie0, *pcie1; + + pcie0 = dev; + bus0 = dev->bus->number; + if ((pcie1 = PCI_FIND_DEV(BCM53000_VENDOR_ID, BCM53000PCIE_DEVICE_ID, pcie0)) != NULL) { + bus1 = pcie1->bus->number; + } + + for(i = 0; i < _ndevices; i++) { + bde_ctrl_t *ctrl = _devices + i; + + mask = BDE_SWITCH_DEV_TYPE | BDE_PCI_DEV_TYPE; + if ((ctrl->dev_type & mask) == mask) { + if (ctrl->pci_device->bus->number == bus0) { + device_bmp |= 1 << 0; + } + if (ctrl->pci_device->bus->number == bus1) { + device_bmp |= 1 << 1; + } + } + } + + /* configure the PCIE cap: Max payload size: 256, Max Read + * Request size: 256, disabling relax ordering. + * Writes to the PCIE capability device control register + */ + + i = 0; + while(device_bmp) { + if (device_bmp & (1 << i)){ + port = i ; + pci_read_config_dword(BCM53000PCIE_DEV(port), + BCM53000PCIE_DEV_CAP_REG, &tmp); + maxpayld = (tmp & BCM53000PCIE_MAX_PAYLOAD_MASK); + if (debug >= 1) { + gprintk("port %d\n",port); + gprintk("DevCap (@%x): 0x%x%c\n", BCM53000PCIE_DEV_CAP_REG, tmp, + (maxpayld != BCM53000PCIE_CAP_MAX_PAYLOAD_256B) ? ' ':'\n'); + } + if (maxpayld != BCM53000PCIE_CAP_MAX_PAYLOAD_256B) { + addr = BCM53000PCIE_BASE(port); + addr |= (BCM53000PCIE_SROM_SPACE | BCM53000PCIE_SPROM_OFFSET); + tmp16 = *((uint16 *)addr); + if (debug >= 1){ + gprintk("addr %lx spromData.MaxPayloadSize: 0x%x\n", addr, tmp16); + } + mask = BCM53000PCIE_SPROM_MAX_PAYLOAD_MASK; + if ((tmp16 & mask) != BCM53000PCIE_SPROM_MAX_PAYLOAD_256B) { + tmp161 = (tmp16 & ~mask) | BCM53000PCIE_SPROM_MAX_PAYLOAD_256B; + *((uint16 *)addr) = tmp161; + if (debug >= 1) { + tmp16 = 0; + tmp16 = *((uint16 *)addr); + gprintk("Enable spromData.MaxPayloadSize to 1 (256 bytes): " + "0x%x (%s w/ 0x%x)\n", tmp161, + ((tmp16 & mask) == BCM53000PCIE_SPROM_MAX_PAYLOAD_256B) ? + "Success":"Fail", + tmp16); + } + } + pci_read_config_dword(BCM53000PCIE_DEV(port), + BCM53000PCIE_DEV_CAP_REG, &tmp); + if (debug >= 1){ + gprintk("DevCap (@%x): now is 0x%x\n\n", + BCM53000PCIE_DEV_CAP_REG, tmp); + } + } + + addr = BCM53000PCIE_BASE(port); + addr |= (BCM53000PCIE_FUNC0_COFIG_SPACE | BCM53000PCIE_DEV_CTRL_REG); + tmp16 = *((uint16 *)addr); + if (debug >= 1) { + gprintk("DevControl (@%x): 0x%x\n", BCM53000PCIE_DEV_CTRL_REG, tmp16); + } + if (!(tmp16 & MAX_PAYLOAD_256B) || !(tmp16 & MAX_READ_REQ_256B)) { + tmp161 = tmp16 | MAX_PAYLOAD_256B | MAX_READ_REQ_256B; + *((uint16 *)addr) = tmp161; + if (debug >= 1) { + tmp16 = 0; + tmp16 = *((uint16 *)addr); + gprintk("addr %lx Enable DevControl MaxPayloadSize to 1 (256 bytes): " + "0x%x (%s w/ 0x%x)\n", addr, tmp161, + (tmp16 & MAX_PAYLOAD_256B) ? "Success":"Fail", + tmp16); + gprintk("Enable DevControl MaxReadRequestSize to 1 (256 bytes): " + "0x%x (%s w/ 0x%x)\n\n", tmp161, + (tmp16 & MAX_READ_REQ_256B) ? "Success":"Fail", + tmp16); + } + } + device_bmp &= ~(1 << i); + } + i++; + } + } + + /* + * Configure max payload to 512 on all ports in the PLX8608/PLX8617. + * The device supports 128, 512, and 1024 max payload sizes. + */ + dev = NULL; + while ((dev = PCI_FIND_DEV(PCI_VENDOR_ID_PLX, PCI_ANY_ID, dev)) != NULL) { + if ((dev->device == PLX_PEX8608_DEV_ID) || + (dev->device == PLX_PEX8617_DEV_ID)) { + uint16 ctrl_reg; + pci_read_config_word(dev, PLX_PEX86XX_DEV_CTRL_REG, &ctrl_reg); + ctrl_reg = (ctrl_reg & ~(7<<5)) | MAX_PAYLOAD_512B; + pci_write_config_word(dev, PLX_PEX86XX_DEV_CTRL_REG, ctrl_reg); + } + } + return 0; +} + +#ifdef BCM_PLX9656_LOCAL_BUS + +#define PLX_LAS0_BA 0x00000004 /* LAS0 Local Base Address Remap */ +#define PLX_LAS1_BA 0x000000f4 /* LAS1 Local Base Address Remap */ +#define PLX_LAS_EN 0x00000001 /* Space Enable bit */ + +#define PLX_MMAP_PCIBAR0 0 /* Memory-Mapped Config (PCIBAR0) */ +#define PLX_LAS0_PCIBAR2 2 /* Local Address Space 0 (PCIBAR2) */ +#define PLX_LAS1_PCIBAR3 3 /* Local Address Space 1 (PCIBAR3) */ + +STATIC int +_plx_las_bar_get(struct pci_dev *dev) +{ + void *local_config_addr; + int bar = -1; + + local_config_addr = IOREMAP(pci_resource_start(dev, PLX_MMAP_PCIBAR0), + pci_resource_len(dev, PLX_MMAP_PCIBAR0)); + if (local_config_addr) { + uint32 las_remap_reg; + /* + * Make sure LAS0BA or LAS1BA is enabled before returning + * BAR that will be used to access the Local Bus + */ + las_remap_reg = ioread32(local_config_addr + PLX_LAS0_BA); + if (las_remap_reg & PLX_LAS_EN) { + bar = PLX_LAS0_PCIBAR2; + } else { + las_remap_reg = ioread32(local_config_addr + PLX_LAS1_BA); + if (las_remap_reg & PLX_LAS_EN) { + bar = PLX_LAS1_PCIBAR3; + } + } + } + iounmap(local_config_addr); + return bar; +} +#endif /* BCM_PLX9656_LOCAL_BUS */ + +static void +_shbde_log_func(int level, const char *str, int param) +{ + level = (level >= SHBDE_DBG) ? 1 : 0; + if (debug >= level) { + gprintk("%s (%d)\n", str, param); + } +} +/* + * Function: _device_rescan_validate + * + * Purpose: + * Check if the device is ever probed or not. + * Parameters: + * dev - Linux PCI device structure + * Returns: + * >= 0 : dev is ever probed + * reutrn value is the index point to the _devices[] + * -1 : dev is not probed before. + */ +static int +_device_rescan_validate(struct pci_dev *dev) +{ + bde_ctrl_t *ctrl; + int i; + + if (PCI_FUNC(dev->devfn) > 0) { + return -1; + } + ctrl = NULL; + for (i = 0; i < _ndevices; i ++) { + ctrl = _devices + i; + /* check the device id */ + if (dev->device == ctrl->bde_dev.device) { + /* check the bus number */ + if ((dev->bus)) { + if ((dev->bus->number == ctrl->bus_no) && + (pci_domain_nr(dev->bus) == ctrl->domain_no)) { + return i; + } + } + } + } + return -1; +} + +#ifdef CONFIG_PCI_MSI + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) +/** + * _pci_msix_table_size - return the number of device's MSI-X table entries + * @dev: pointer to the pci_dev data structure of MSI-X device function + */ +static int +_pci_msix_table_size(struct pci_dev *dev) +{ + int nr_entries = 0; + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,110)) + u16 control; + int pos; + + pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); + if (pos) { + pci_read_config_word(dev, msi_control_reg(pos), &control); + nr_entries = msix_table_size(control); + } +#else +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)) +{ + /* Pass large entry value to enable MSIX to get # of entires */ + struct msix_entry *entries; + entries = kmalloc(sizeof(struct msix_entry) * + PCI_MSIX_FLAGS_QSIZE, GFP_KERNEL); + if (entries != NULL) { + nr_entries = pci_enable_msix(dev, + entries, PCI_MSIX_FLAGS_QSIZE); + if (nr_entries < 0) { + nr_entries = 0; + } + pci_disable_msix(dev); + kfree(entries); + } +} +#else + nr_entries = pci_msix_vec_count(dev); +#endif +#endif + + return nr_entries; +} +#endif + +static int +_msi_connect(bde_ctrl_t *ctrl) +{ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + int ret; + if (ctrl->use_msi == PCI_USE_INT_MSIX) { + int i; + + ret = _pci_msix_table_size(ctrl->pci_device); + if (ret == 0) { + /* MSI-X failed */ + gprintk("MSI-X not supported.\n"); + goto er_intx; + } + ctrl->entries = kcalloc(ret, sizeof(struct msix_entry), GFP_KERNEL); + + if (!ctrl->entries) { + goto er_intx; + } + /* Only one vector is mapped by default */ + /* May be more in future, can be controlled using module param */ + ctrl->msix_cnt = msixcnt; + if (unlikely(debug > 1)) + gprintk("MSIX Table size = %d\n", ctrl->msix_cnt); + for (i = 0; i < ctrl->msix_cnt; i++) + ctrl->entries[i].entry = i; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0) + ret = pci_enable_msix_range(ctrl->pci_device, + ctrl->entries, ctrl->msix_cnt, ctrl->msix_cnt); +#else + ret = pci_enable_msix(ctrl->pci_device, + ctrl->entries, ctrl->msix_cnt); + if (ret > 0) { + /* Not enough vectors available , Retry MSI-X */ + gprintk("Retrying with MSI-X interrupts = %d\n", ret); + ctrl->msix_cnt = ret; + msixcnt = ret; + ret = pci_enable_msix(ctrl->pci_device, + ctrl->entries, ctrl->msix_cnt); + if (ret != 0) + goto er_intx_free; + } +#endif + if (ret < 0) { + /* Error */ + goto er_intx_free; + } else { + gprintk("Enabled MSI-X interrupts = %d\n", ctrl->msix_cnt); + return 0; + } + } +#endif + + if (ctrl->use_msi == PCI_USE_INT_MSI) { + if (pci_enable_msi(ctrl->pci_device) == 0) { + ctrl->iLine = ctrl->pci_device->irq; + } else { + /* MSI failed */ + gprintk("Failed to initialize MSI interrupts.\n"); + goto er_intx; + } + } else { + /* failed */ + gprintk("Not MSI/MSIX interrupt.\n"); + goto er_intx; + } + return 0; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) +er_intx_free: + gprintk("Failed to enable MSI-X interrupts = %d\n", ret); + kfree(ctrl->entries); +#endif +er_intx: + return -1; + +} + +static int +_msi_disconnect(bde_ctrl_t *ctrl) +{ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + if (ctrl->use_msi == PCI_USE_INT_MSIX) { + if (ctrl->msix_cnt) { + pci_disable_msix(ctrl->pci_device); + kfree(ctrl->entries); + ctrl->entries = NULL; + ctrl->msix_cnt = 0; + } + } +#endif + if (ctrl->use_msi == PCI_USE_INT_MSI) { + pci_disable_msi(ctrl->pci_device); + } else { + gprintk("MSI not used\n"); + } + return 0; +} + +#endif + + +static void +config_pci_intr_type(struct pci_dev *dev, bde_ctrl_t *ctrl, int iproc) +{ +#ifdef CONFIG_PCI_MSI + int ret; + shbde_iproc_config_t icfg; + + /* Each device follows global policy by default */ + ctrl->use_msi = use_msi; + + if (unlikely(debug > 1)) + gprintk("%s: msi = %d\n", __func__, ctrl->use_msi); + + /* Check IPROC version for MSIX support */ + if (iproc && ctrl->bde_dev.base_address1 && + (ctrl->use_msi == PCI_USE_INT_MSIX)) { + if (shbde_pci_iproc_version_get(&ctrl->shbde, dev, &icfg.iproc_ver, + &icfg.cmic_ver, &icfg.cmic_rev)) { + if (icfg.iproc_ver < 0xe) { + gprintk("%s: MSI-X not supported, using MSI.\n", __func__); + ctrl->use_msi = PCI_USE_INT_MSI; + } + } + } + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + if (ctrl->use_msi == PCI_USE_INT_MSIX) { + /* check for support MSIX vector */ + ret = _pci_msix_table_size(ctrl->pci_device); + if (ret == 0) { + gprintk("%s: Zero MSIX table size\n", __func__); + ctrl->use_msi = PCI_USE_INT_MSI; + } + } +#endif + + if (ctrl->use_msi == PCI_USE_INT_MSI) { + /* check for support MSI vector */ + ret = pci_enable_msi(ctrl->pci_device); + if (ret < 0) { + ctrl->use_msi = PCI_USE_INT_INTX; + gprintk("%s: Failed to enable MSI, using INTx.\n", __func__); + } else { + pci_disable_msi(ctrl->pci_device); + } + } +#else + ctrl->use_msi = PCI_USE_INT_INTX; +#endif +} + +/* + * Function: _pci_probe + * + * Purpose: + * Device initialization callback used by the Linux PCI + * subsystem. Called as a result of pci_register_driver(). + * Parameters: + * dev - Linux PCI device structure + * Returns: + * 0 + */ +static int +_pci_probe(struct pci_dev *dev, const struct pci_device_id *ent) +{ + bde_ctrl_t *ctrl; + resource_size_t paddr; + uint16 cmd = 0; + uint32 bar_len; + int i, cmic_bar; + int baroff = 0; + int iproc = 0; + int plx_dev = 0; + int eth_dev = 0; + int cpu_dev = 0; + int update_devid = 0; + int paxb_core = 0; + int add_dev = 0, rescan = 0, rescan_idx = -1; + shbde_hal_t shared_bde, *shbde = &shared_bde; + + if (debug >= 4) {gprintk("probing: vendor_id=0x%x, device_id=0x%x\n", dev->vendor, dev->device);} + if (nodevices == 1) { + return 0; + } + + /* Initialize Linux hardware abstraction for shared BDE functions */ + linux_shbde_hal_init(shbde, _shbde_log_func); + + /* + * If an AXI-based switch device has been found already, then it means + * that the AXI bus has been probed, and that we should ignore devices + * found on PCI bus zero. + */ + +#if defined(IPROC_CMICD) + if ((dev->bus) && (dev->bus->number == 0)) { + int i; + uint32 mask = BDE_SWITCH_DEV_TYPE | BDE_AXI_DEV_TYPE; + + for (i = 0; i < _ndevices; i++) { + ctrl = _devices + i; + + if ((ctrl->dev_type & mask) == mask) { + return 0; + } + } + } +#endif /* IPROC_CMICD */ + + /* + * Note that a few supported devices have a non-Broadcom PCI vendor ID, + * but since none of their associated PCI device IDs collide with the + * Broadcom device IDs, the probe code below only checks the device ID. + */ + + switch (dev->device) { + case PCI_DEVICE_ID_PLX_9056: +#ifdef DNX_TEST_BOARD + break; /* a PCIe bridge to a non PCIe device should be treated as the device */ +#endif /* DNX_TEST_BOARD */ + case PCI_DEVICE_ID_PLX_9656: + plx_dev = 1; + break; + case BCM53000PCIE_DEVICE_ID: + cpu_dev = 1; + break; + /* + * The device ID for 56500, 56100 and 56300 family of devices may + * be incorrect just after a PCI HW reset. It needs to be read + * again after stabilization. + */ + case BCM56102_DEVICE_ID: + case BCM56504_DEVICE_ID: + case BCM56304_DEVICE_ID: + case BCM56314_DEVICE_ID: + case BCM56112_DEVICE_ID: + update_devid = 1; + break; + default: + break; + } + + /* Check if the device is ever probed. */ + rescan_idx = _device_rescan_validate(dev); + if (rescan_idx != -1) { + rescan = 1; + } + + ctrl = NULL; + if (plx_dev) { +#if defined(BCM_PLX9656_LOCAL_BUS) + /* PLX chip itself won't be part of _devices[]. */ + baroff = _plx_las_bar_get(dev); + if (baroff == -1) { + gprintk("No Local Address Space enabled in PLX\n"); + return 0; + } + ctrl = &plx_ctrl; + num_plx++; +#endif + } else if (eth_dev) { + if (_ether_ndevices >= LINUX_BDE_MAX_ETHER_DEVICES) { + return 0;; + } + ctrl = _devices + _ndevices; + ctrl->dev_type |= BDE_ETHER_DEV_TYPE; + ctrl->iLine = dev->irq; + add_dev = 1; + if (debug >= 1) + gprintk("Found PCI device %04x:%04x as Ethernet device\n", + dev->vendor, dev->device); + } else if (cpu_dev) { + if (_cpu_ndevices >= LINUX_BDE_MAX_CPU_DEVICES) { + return 0;; + } + ctrl = _devices + _ndevices; + ctrl->dev_type |= BDE_CPU_DEV_TYPE; + add_dev = 1; + if (debug >= 1) + gprintk("Found PCI device %04x:%04x as CPU device\n", + dev->vendor, dev->device); + } else { + if (PCI_FUNC(dev->devfn) > 0) { + return 0; + } + if (_switch_ndevices >= LINUX_BDE_MAX_SWITCH_DEVICES) { + return 0; + } + + if (rescan) { + if (debug >= 1) { + gprintk("PCI device %04x:%04x is re-probed \n", + dev->vendor, dev->device); + } + ctrl = _devices + rescan_idx; + ctrl->dev_state = BDE_DEV_STATE_CHANGED; + } else { + ctrl = _devices + _ndevices; + ctrl->dev_type |= BDE_SWITCH_DEV_TYPE; + ctrl->domain_no = pci_domain_nr(dev->bus); + ctrl->bus_no = dev->bus->number; + ctrl->dev_state = BDE_DEV_STATE_NORMAL; + add_dev = 1; + } + + /* Save shared BDE HAL in device structure */ + MEMCPY(&ctrl->shbde, shbde, sizeof(ctrl->shbde)); + + if (update_devid) { + /* Re-read the device ID */ + pci_read_config_word(dev, + PCI_DEVICE_ID, + &ctrl->bde_dev.device); + dev->device = ctrl->bde_dev.device; + } + + if (debug >= 4) {gprintk("Enabling PCI device : vendor_id=0x%x, device_id=0x%x\n", dev->vendor, dev->device);} + if (pci_enable_device(dev)) { + gprintk("Cannot enable PCI device : vendor_id = %x, device_id = %x\n", + dev->vendor, dev->device); + } + + + /* + * These are workarounds to get around some existing + * kernel problems :( + */ + + /* + * While probing we determine the overall limits for the PCI + * memory windows across all devices. These limits are used + * later on by the PCI-PCI bridge code. + */ + if (pci_resource_start(dev, baroff) < _pci_mem_start) { + _pci_mem_start = pci_resource_start(dev, baroff); + } + if (pci_resource_end(dev, baroff) > _pci_mem_end) { + _pci_mem_end = pci_resource_end(dev, baroff); + } + +#ifdef CONFIG_SANDPOINT + /* + * Something wrong with the PCI subsystem in the mousse kernel. + * The device is programmed correctly, but the irq in the pci + * structure is hosed. This checks for the hosed-ness and fixes it. + */ + if (dev->irq > 100) { + dev->irq = 2; + gprintk("irq problem: setting irq = %d\n", dev->irq); + } +#endif + +#ifdef CONFIG_BMW + /* + * PCI subsystem does not always program the system correctly. + */ + if (dev->irq < 16 && dev->irq != 2) { + dev->irq = 2; + gprintk("irq problem: setting irq = %d\n", dev->irq); + } +#endif + +#ifdef CONFIG_IDT_79EB334 + /* + * IDT kernel is not currently mapping interrupts correctly + * Hardwired to core mips interrupt, irq 3 for kernel 2.4.18 + */ + if (dev->irq != 3) { + dev->irq = 3; + gprintk("irq problem: setting irq = %d\n", dev->irq); + } +#endif + +#ifdef CONFIG_BCM94702_CPCI + /* + * Hardwired to core mips interrupt irq 6 on MBZ + */ + if (dev->irq != 6) { + dev->irq = 6; + gprintk("irq problem: setting irq = %d\n", dev->irq); + } +#endif + + if ((PCI_FIND_DEV(BCM4704_VENDOR_ID, BCM4704_DEVICE_ID, NULL)) != NULL) { + /* + * Decrease the PCI bus priority for the CPU for better overall + * system performance. This change significantly reduces the + * number of PCI retries from other devices on the PCI bus. + */ + void * _mc_vbase = IOREMAP(BCM4704_MEMC_BASE, 0x1000); + int priorinv = 0x80; + static int done = 0; + if (!done) { + done = 1; + writel(priorinv, _mc_vbase + BCM4704_MEMC_PRIORINV); + if (debug >= 1) + gprintk("set BCM4704 PriorInvTim register to 0x%x\n", priorinv); + iounmap(_mc_vbase); + } + } + + if ((PCI_FIND_DEV(SIBYTE_PCI_VENDOR_ID, SIBYTE_PCI_DEVICE_ID, NULL)) != NULL) { + /* + * The BCM91125CPCI CPU boards with a PCI-PCI bridge use the same + * interrupt line for all switch ships behind the bridge. + */ + if (PCI_FIND_DEV(DC21150_VENDOR_ID, DC21150_DEVICE_ID, NULL) || + PCI_FIND_DEV(HINT_HB4_VENDOR_ID, HINT_HB4_DEVICE_ID, NULL) || + PCI_FIND_DEV(PI7C8150_VENDOR_ID, PI7C8150_DEVICE_ID, NULL)) { + /* + * By default we try to guess the correct IRQ based on the design. + * For now we only look at the bridge vendor, but it may be necessary + * to look at the switch chip configuration as well. + */ + if (forceirq == -1) { + if ((PCI_FIND_DEV(HINT_HB4_VENDOR_ID, HINT_HB4_DEVICE_ID, NULL)) || + ((dev->device == BCM5674_DEVICE_ID) && + (PCI_FIND_DEV(PI7C8150_VENDOR_ID, PI7C8150_DEVICE_ID, NULL)))) { + forceirq = 58; + } else { + forceirq = 56; + } + } + } + } + + if (((PCI_FIND_DEV(BCM58525_PCI_VENDOR_ID, BCM58525_PCI_DEVICE_ID, NULL)) != NULL) || + ((PCI_FIND_DEV(BCM58525_PCI_VENDOR_ID, BCM58522_PCI_DEVICE_ID, NULL)) != NULL) || + ((PCI_FIND_DEV(BCM58712_PCI_VENDOR_ID, BCM58712_PCI_DEVICE_ID, NULL)) != NULL) ) { + /* BCM58525/BCM58712 CPU boards support 128 Max payload size */ + if (maxpayload) { + maxpayload = 128; + if (debug >= 1) gprintk("force max payload size to 128\n"); + } + } + + if (forceirq > 0 && dev->irq != (uint32) forceirq) { + if (forceirqubm & (1U << (_ndevices - 1))) { + dev->irq = forceirq; + if (debug >= 1) gprintk("force irq to %d\n", forceirq); + } + } else if (debug >= 1) gprintk("found irq %d\n", dev->irq); + + ctrl->iLine = dev->irq; + if (unlikely(debug > 1)) + gprintk("%s:irq = %d\n",__func__, ctrl->iLine); + + if (shbde_pci_is_pcie(shbde, dev)) { + /* Set PCIe max payload */ + shbde_pci_max_payload_set(shbde, dev, maxpayload); + } else { + /* Set PCI retry to infinite on non-PCIe switch device */ + pci_write_config_word(dev, 0x40, 0x0080); + if (debug >= 1) gprintk("set DMA retry to infinite on switch device\n"); + } + } + +#if defined(BCM_DFE_SUPPORT) + switch (dev->device) { + case BCM88750_DEVICE_ID: + case BCM88753_DEVICE_ID: + case BCM88755_DEVICE_ID: + case BCM88770_DEVICE_ID: + case BCM88773_DEVICE_ID: + case BCM88774_DEVICE_ID: + case BCM88775_DEVICE_ID: + case BCM88776_DEVICE_ID: + case BCM88777_DEVICE_ID: + case BCM88950_DEVICE_ID: + case BCM88953_DEVICE_ID: + case BCM88954_DEVICE_ID: + case BCM88955_DEVICE_ID: + case BCM88956_DEVICE_ID: + case BCM88752_DEVICE_ID: + case BCM88772_DEVICE_ID: + case BCM88952_DEVICE_ID: + + /* + * For DMA transactions - set Max_Payload_Size and + * Max_Read_Request_Size to 128 bytes. + */ + pci_write_config_byte(dev, 0xb5, 0x0c); + pci_write_config_byte(dev, 0xb4, 0x0); + break; + default: + break; + } +#endif /* BCM_DFE_SUPPORT */ + + /* Prevent compiler warning */ + if (ctrl == NULL) { + return 0; + } + + ctrl->be_pio = 0; + ctrl->dev_type |= BDE_PCI_DEV_TYPE; + ctrl->pci_device = dev; + pci_set_drvdata(dev, ctrl); + + /* Check for iProc device */ + if (shbde_pci_is_iproc(shbde, dev, &cmic_bar)) { + iproc = 1; + if (cmic_bar >= 0) { + baroff = cmic_bar; + } + } +#ifdef DNX_TEST_BOARD + else if (dev->device == PLX9056_DEVICE_ID && baroff == 0) { + baroff = 2; + ctrl->dev_type |= BDE_NO_IPROC/* | BDE_BYTE_SWAP*/; + } +#endif /* DNX_TEST_BOARD */ + + /* Get the device revision */ + pci_read_config_byte(dev, PCI_REVISION_ID, &ctrl->bde_dev.rev); + + /* Map in the device */ + ctrl->bde_dev.device = dev->device; + paddr = pci_resource_start(dev, baroff); + + switch (dev->device) { +#if defined(BCM_PETRA_SUPPORT) && defined(__DUNE_LINUX_BCM_CPU_PCIE__) + case GEDI_DEVICE_ID: + case PCP_PCI_DEVICE_ID: + bar_len = 0x1000000; + break; +#endif + default: + bar_len = pci_resource_len(dev, baroff); + break; + } + + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(paddr, bar_len); + ctrl->iowin[0].addr = paddr; + ctrl->iowin[0].size = bar_len; + + if (debug >= 3) { + gprintk("BAR %d: kernel addr:0x%lx phys addr:0x%lx length:%lx\n", + baroff, (unsigned long)ctrl->bde_dev.base_address, (unsigned long)paddr, (unsigned long)bar_len); + } + + /* Map secondary address spaces */ + for (i = 1; i < BDE_NUM_IOWIN_MAX; i++) { + ctrl->iowin[i].addr = 0; + ctrl->iowin[i].size = 0; + } + ctrl->bde_dev.base_address1 = 0; + + if (iproc +#ifdef DNX_TEST_BOARD + || (dev->device == PLX9056_DEVICE_ID && baroff == 2) +#endif /* DNX_TEST_BOARD */ + ) { + paddr = pci_resource_start(dev, 0); + bar_len = pci_resource_len(dev, 0); + ctrl->bde_dev.base_address1 = (sal_vaddr_t)IOREMAP(paddr, bar_len); + ctrl->iowin[1].addr = paddr; + ctrl->iowin[1].size = bar_len; + if (debug >= 3) { + gprintk("BAR 0: kernel addr:0x%lx phys addr:0x%lx length:%lx\n", + (unsigned long)ctrl->bde_dev.base_address1, (unsigned long)paddr, (unsigned long)bar_len); + } + } + + /* configure interrupt type */ + config_pci_intr_type(dev, ctrl, iproc); + + /* Configure iProc PCI-AXI bridge */ + if (iproc && ctrl->bde_dev.base_address1) { + void *iproc_regs; + shbde_iproc_config_t *icfg = &shbde->icfg; + + /* Mapped iProc regs in PCI BAR 0 */ + iproc_regs = (void *)ctrl->bde_dev.base_address1; + + /* iProc configuration parameters */ + (void)shbde_pci_iproc_version_get(shbde, dev, &icfg->iproc_ver, + &icfg->cmic_ver, &icfg->cmic_rev); + shbde_iproc_config_init(icfg, ctrl->bde_dev.device, ctrl->bde_dev.rev); + + if (debug >= 2) { + gprintk("iproc version = %x dma_hi_bits = %x\n", icfg->iproc_ver, icfg->dma_hi_bits); + } + icfg->use_msi = ctrl->use_msi; + + /* Call shared function */ + paxb_core = shbde_iproc_paxb_init(shbde, iproc_regs, icfg); + + /* Save PCI core information for CMIC */ + if (paxb_core == 1) { + ctrl->dev_type |= BDE_DEV_BUS_ALT; + } + + /* Save MSI enable state information */ + if (ctrl->use_msi) { + ctrl->dev_type |= BDE_DEV_BUS_MSI; + } + + /* iProc PCIe preemphasis */ + shbde_iproc_pcie_preemphasis_set(shbde, iproc_regs, icfg, dev); + } + + /* Save shared BDE HAL in device structure */ + MEMCPY(&ctrl->shbde, shbde, sizeof(ctrl->shbde)); + + + ctrl->isr = NULL; + ctrl->isr_data = NULL; + + pci_read_config_word(dev, PCI_COMMAND, &cmd); + if (!(cmd & PCI_COMMAND_MEMORY) || !(cmd & PCI_COMMAND_MASTER)) { + cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; + pci_write_config_word(dev, PCI_COMMAND, cmd); + if (debug >= 1) gprintk("enable PCI resources 0x%x (PCI_COMMAND)\n", cmd); + } + + /* Check if we need 256 KB memory window (default is 64 KB) */ + bar_len = pci_resource_len(dev, baroff); + if (bar_len == 0x40000) { + ctrl->dev_type |= BDE_256K_REG_SPACE; + if (debug >= 1) gprintk("PCI resource len 256K\n"); + } else if (bar_len == 0x800000) { + ctrl->dev_type |= BDE_256K_REG_SPACE | BDE_8MB_REG_SPACE; + if (debug >= 1) gprintk("PCI resource len 8MB\n"); + } + + +#ifdef LINUX_BDE_DMA_DEVICE_SUPPORT + ctrl->dma_dev = &dev->dev; +#endif + + if (debug >= 2) { + gprintk("_pci_probe: configured dev:0x%x rev:0x%x with base_addresses: 0x%lx 0x%lx\n", + (unsigned)ctrl->bde_dev.device, (unsigned)ctrl->bde_dev.rev, + (unsigned long)ctrl->bde_dev.base_address, (unsigned long)ctrl->bde_dev.base_address1); + } + + if (add_dev) { + _bde_add_device(); + } + /* Let's boogie */ + return 0; +} + +/* + * Function: _pci_remove + * + * Purpose: + * Detach driver from device. Called from pci_unregister_driver(). + * Parameters: + * dev - Linux PCI device structure + * Returns: + * 0 + */ +static void +_pci_remove(struct pci_dev* dev) +{ + bde_ctrl_t *ctrl; + + if (nodevices == 1) { + return; + } + +#if defined(BCM_DFE_SUPPORT) + if (dev->device == PCI_DEVICE_ID_PLX_9056) { + return; + } +#endif + + ctrl = (bde_ctrl_t *) pci_get_drvdata(dev); + + if (ctrl == NULL) { + /* Unused device */ + return; + } + ctrl->dev_state = BDE_DEV_STATE_REMOVED; + if (debug >= 1) { + gprintk("PCI device %04x:%04x is removed. \n", + dev->vendor, dev->device); + } + if (ctrl->bde_dev.base_address1) { + iounmap((void *)ctrl->bde_dev.base_address1); + } + if (ctrl->bde_dev.base_address) { + iounmap((void *)ctrl->bde_dev.base_address); + } + + /* Free our interrupt handler, if we have one */ + if (ctrl->isr || ctrl->isr2) { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + if (ctrl->use_msi >= PCI_USE_INT_MSIX) { + int i; + for (i = 0; i < ctrl->msix_cnt; i++) + free_irq(ctrl->entries[i].vector, ctrl); + } + else +#endif + { + free_irq(ctrl->iLine, ctrl); + } + } +#ifdef CONFIG_PCI_MSI + _msi_disconnect(ctrl); +#endif + ctrl->isr = NULL; + ctrl->isr_data = NULL; + ctrl->isr2 = NULL; + ctrl->isr2_data = NULL; +} + +static struct pci_driver _device_driver = { + probe: _pci_probe, + remove: _pci_remove, + id_table: _id_table, + /* The rest are dynamic */ +}; + +static void +_spi_device_setup(void) { + bde_ctrl_t *ctrl; + ctrl = _devices + _ndevices; + ctrl->dev_type |= BDE_SWITCH_DEV_TYPE; + ctrl->iLine = 0xa3; + ctrl->be_pio = 0; + ctrl->dev_type |= BDE_SPI_DEV_TYPE; + ctrl->bde_dev.device = spi_devid; + ctrl->bde_dev.rev = spi_revid; + if (debug >= 1) { + gprintk("SPI Slave Mode: force ctrl->bde_dev.device=0x%x\n",ctrl->bde_dev.device); + gprintk("SPI Slave Mode: force ctrl->bde_dev.rev=0x%x\n",ctrl->bde_dev.rev); + gprintk("SPI Slave Mode: force ctrl->dev_type=0x%x\n",ctrl->dev_type); + } + _bde_add_device(); +} +#endif /* BCM_ICS */ + + + + +#if defined(BCM_METROCORE_LOCAL_BUS) +static bde_ctrl_t* +map_local_bus(uint64_t addr, uint32_t size) +{ + bde_ctrl_t *ctrl; + + ctrl = _devices + _ndevices; + + /* + * For now: use EB type as `local bus' + * (memory mapped, no DMA, no interrupts) + * metrocore local bus supports interrupts, but we don't use them. + */ + ctrl->dev_type |= BDE_EB_DEV_TYPE | BDE_SWITCH_DEV_TYPE + | (size > 64 * 1024 ? BDE_128K_REG_SPACE : 0); + ctrl->pci_device = NULL; /* No PCI bus */ + + /* Map in the device */ + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(addr, size); + ctrl->iowin[0].addr = addr; + ctrl->iowin[0].size = size; + + _bde_add_device(); + return(ctrl); +} + +#define BME_REVISION_OFFSET (0x0) + +#endif + +#ifdef BCM_PLX9656_LOCAL_BUS + +#if 1 +#define DEV_REG_BASE_OFFSET PL0_OFFSET /* Polaris register base */ +#define DEV_REG_DEVID 0 /* Device ID is first register */ +#endif + +/* + * The difference at map_local_bus2: + * + * The PLX9656 PCI-to-LOCAL bridge chip already has been iomapped the + * whole address space. So the devices off local bus don't need to be + * mapped again. They only need to claim their own sub-space. + */ +static bde_ctrl_t * +map_local_bus2(bde_ctrl_t *plx_ctrl, uint32_t dev_base, uint32_t size) +{ + uint32_t dev_rev_id; + uint8_t *addr; + bde_ctrl_t *ctrl; + + ctrl = _devices + _ndevices; + + /* + * For now: use EB type as `local bus' + * (memory mapped, no DMA, no interrupts) + * metrocore local bus supports interrupts, but we don't use them. + */ + ctrl->dev_type |= BDE_EB_DEV_TYPE | BDE_SWITCH_DEV_TYPE; + ctrl->dev_type |= BDE_320K_REG_SPACE; /* Polaris 18 bits address + FPGA */ + ctrl->pci_device = NULL; /* No PCI bus */ + + /* Map in the device */ + ctrl->bde_dev.base_address = plx_ctrl->bde_dev.base_address + dev_base; + ctrl->iowin[0].addr = plx_ctrl->iowin[0].addr + (resource_size_t)dev_base; + ctrl->iowin[0].size = size; + +#if 1 + addr = (uint8_t *)ctrl->bde_dev.base_address + PL0_REVISION_REG; +#endif + dev_rev_id = readl(addr); + ctrl->bde_dev.device = dev_rev_id >> 16; + ctrl->bde_dev.rev = (dev_rev_id & 0xFF); + + + _bde_add_device(); + + switch (ctrl->bde_dev.device) { + default: + return 0; + } + return(ctrl); +} + +static int +probe_plx_local_bus(void) +{ + bde_ctrl_t *ctrl; + uint32_t val; + uint8_t *addr; + char addr_hi_str[16]; + + if (num_plx > 1) { + printk(KERN_ERR "There's more than one PLX 9656/9056 chip\n"); + return -1; + } + addr_hi_str[0] = 0; +#ifdef PHYS_ADDR_IS_64BIT + sprintf(addr_hi_str, "%08x", (uint32_t)(plx_ctrl.iowin[0].addr >> 32)); +#endif + printk(KERN_ERR "Found PLX %04x:%04x vir: 0x%08x phy: 0x%s%08x\n", + plx_ctrl.bde_dev.device, plx_ctrl.bde_dev.rev, + plx_ctrl.bde_dev.base_address, addr_hi_str, + (uint32_t)(plx_ctrl.iowin[0].addr)); + + addr = (uint8_t *)plx_ctrl.bde_dev.base_address + CPLD_OFFSET + CPLD_REVISION_REG; + val = readl(addr); + printk(KERN_ERR "plx: CPLD revision %d\n", val & CPLD_REVISION_MASK); +#if 000 + addr = (uint8_t *)plx_ctrl.bde_dev.base_address + CPLD_OFFSET + CPLD_RESET_REG; + writel(CPLD_RESET_NONE, addr); +#endif +#if 1 + ctrl = map_local_bus2(&plx_ctrl, PL0_OFFSET, PL0_SIZE); +#endif + if (ctrl == 0) + return -1; + + /* Uses PLX IRQ for Polaris LC */ + ctrl->iLine = 48; + ctrl->isr = NULL; + ctrl->isr_data = NULL; + + return 0; +} + +#endif /* BCM_PLX9656_LOCAL_BUS */ + + + + +/* + * Generic module functions + */ + +/* + * Function: _init + * + * Purpose: + * Module initialization. + * Attaches to kernel BDE. + * Parameters: + * None + * Returns: + * 0 on success, < 0 on error. + */ +static int +_init(void) +{ +#ifdef IPROC_CMICD +#ifdef CONFIG_OF + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + iproc_platform_driver_register(&iproc_cmicd_driver); + } else +#endif + if (iproc_has_cmicd()) { + iproc_cmicd_get_memregion(&iproc_cmicd_resources[IPROC_CMICD_RES_MEM]); + iproc_platform_driver_register(&iproc_cmicd_driver); +#ifdef CONFIG_OF + if (!of_find_compatible_node(NULL, NULL, IPROC_CMICD_COMPATIBLE)) +#endif + { + /* Register platform device if no device node in dtb */ + iproc_platform_device_register(&iproc_cmicd_pdev); + } + } +#endif /* IPROC_CMICD */ + +#ifdef BCM_ICS + _ics_bde_create(); +#else /* PCI */ + /* Register our goodies */ + _device_driver.name = LINUX_KERNEL_BDE_NAME; + + + /* Configure MSI interrupt support */ + use_msi = usemsi; + +#ifdef CONFIG_PCI_MSI + if (use_msi == PCI_USE_INT_NONE) { + /* Compilation flag determines default value */ +#ifdef BDE_LINUX_USE_MSIX_INTERRUPT +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + use_msi = PCI_USE_INT_MSIX; +#else + use_msi = PCI_USE_INT_MSI; +#endif +#elif defined(BDE_LINUX_USE_MSI_INTERRUPT) + use_msi = PCI_USE_INT_MSI; +#else + use_msi = PCI_USE_INT_INTX; +#endif + } +#else + if (use_msi > PCI_USE_INT_INTX) { + /* Warn if invalid configuration */ + gprintk("MSI interrupts not supported by kernel\n"); + } + use_msi = PCI_USE_INT_INTX; +#endif /* CONFIG_PCI_MSI */ + + if (unlikely(debug >= 1)) + gprintk("%s(%d):use_msi = %d\n", __func__, __LINE__, use_msi); + if (spi_devid) { + _spi_device_setup(); + } else { + if (pci_register_driver(&_device_driver) < 0) { + return -ENODEV; + } + } + + /* Note: PCI-PCI bridge uses results from pci_register_driver */ + p2p_bridge(); + +#ifdef BCM_METROCORE_LOCAL_BUS + if (probe_metrocore_local_bus()) { + return -1; + } +#endif +#ifdef BCM_PLX9656_LOCAL_BUS + if (num_plx > 0) { + probe_plx_local_bus(); + } +#endif +#endif /* BCM_ICS */ + + +#ifdef BCM_SAND_SUPPORT + sand_device_create(); +#endif + + /* + * Probe for EB Bus devices. + */ + if (eb_bus) { + char *tok; + uint irq = -1, eb_rd16bit=0, eb_wr16bit =0; + unsigned int eb_ba = 0x0; + + gprintk("EB bus info: %s\n", eb_bus); + tok = strtok(eb_bus,","); + while (tok) { + _parse_eb_args(tok, "BA=%x IRQ=%d RD16=%d WR16=%d", + &eb_ba, &irq, &eb_rd16bit, &eb_wr16bit); + _eb_device_create(eb_ba, irq, eb_rd16bit, eb_wr16bit); + tok = strtok(NULL,","); + } + } + + return 0; +} + +/* + * Function: _cleanup + * + * Purpose: + * Module cleanup function. + * Parameters: + * None + * Returns: + * Always 0 + */ +static int +_cleanup(void) +{ + int i; + + _dma_cleanup(); + +#ifdef IPROC_CMICD +#ifdef CONFIG_OF + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + iproc_platform_driver_unregister(&iproc_cmicd_driver); + } else +#endif + if (iproc_has_cmicd()) { +#ifdef CONFIG_OF + if (!of_find_compatible_node(NULL, NULL, IPROC_CMICD_COMPATIBLE)) +#endif + { + iproc_platform_device_unregister(&iproc_cmicd_pdev); + } + iproc_platform_driver_unregister(&iproc_cmicd_driver); + } +#endif + + for (i = 0; i < _ndevices; i++) { + bde_ctrl_t *ctrl = _devices + i; + + /* free allocated kernel space memory */ + if (ctrl->dev_type & BDE_SPI_DEV_TYPE) { + if (ctrl->spi_device) { + kfree(ctrl->spi_device); + } + } + } +#if defined(BCM_SAND_SUPPORT) && (defined(__DUNE_WRX_BCM_CPU__) || defined(__DUNE_GTO_BCM_CPU__)) + if (cpu_address) { /* unmap CPU card MMIO */ + iounmap(cpu_address); + cpu_address = NULL; + } +#endif + +#ifdef BCM_ICS +#else + pci_unregister_driver(&_device_driver); +#endif /* BCM_ICS */ + return 0; +} + +/* + * Function: _pprint + * + * Purpose: + * Print proc filesystem information. + * Parameters: + * None + * Returns: + * Always 0 + */ +static int +_pprint(void) +{ + int i = 0; + + pprintf("Broadcom Device Enumerator (%s)\n", LINUX_KERNEL_BDE_NAME); + + pprintf("Module parameters:\n"); + pprintf("\tmaxpayload=%d\n", maxpayload); + pprintf("\tusemsi=%d\n", usemsi); + + _dma_pprint(); + + if (_ndevices == 0) { + pprintf("No devices found\n"); + } else { + pprintf("Devices:\n"); + } + for (i = 0; i < _ndevices; i++) { + bde_ctrl_t *ctrl = _devices + i; + + if (ctrl->dev_type & BDE_SWITCH_DEV_TYPE) { + pprintf("\t%d (swi) : ", i); + } else if (ctrl->dev_type & BDE_ETHER_DEV_TYPE) { + pprintf("\t%d (eth) : ", i); + } else if (ctrl->dev_type & BDE_CPU_DEV_TYPE) { + pprintf("\t%d (cpu) : ", i); + } else { + pprintf("\t%d (?) : ", i); + } + + if (ctrl->dev_state == BDE_DEV_STATE_REMOVED) { + pprintf("PCI device 0x%x:0x%x:%d REMOVED\n", + ctrl->pci_device->vendor, + ctrl->pci_device->device, + ctrl->bde_dev.rev); + continue; + } + if (ctrl->dev_type & BDE_PCI_DEV_TYPE) { + pprintf("PCI device %02x:%02x.%x 0x%x:0x%x:%d:0x%.8lx:0x%.8lx:%d%s\n", + (unsigned int)ctrl->pci_device->bus->number, + PCI_SLOT(ctrl->pci_device->devfn), + PCI_FUNC(ctrl->pci_device->devfn), + ctrl->pci_device->vendor, + ctrl->pci_device->device, + ctrl->bde_dev.rev, + (unsigned long)pci_resource_start(ctrl->pci_device, 0), + (unsigned long)pci_resource_start(ctrl->pci_device, 2), + ctrl->pci_device->irq, + ctrl->use_msi ? " (MSI)" : ""); + } else if (ctrl->dev_type & BDE_SPI_DEV_TYPE) { + pprintf("SPI Device %d:%x:%x:0x%x:0x%x:%d\n", + ctrl->spi_device->cid, + ctrl->spi_device->part, + ctrl->spi_device->rev, + ctrl->spi_device->phyid_high, + ctrl->spi_device->phyid_low, + ctrl->bde_dev.rev); + } else if (ctrl->dev_type & BDE_ICS_DEV_TYPE) { + pprintf("ICS Device 0x%x:0x%x\n", + ctrl->bde_dev.device, + ctrl->bde_dev.rev); + } else if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + pprintf("AXI Device 0x%x:0x%x:0x%.8lx:%d\n", + ctrl->bde_dev.device, + ctrl->bde_dev.rev, + (unsigned long)ctrl->iowin[0].addr, + ctrl->iLine); + } else if (ctrl->dev_type & BDE_EB_DEV_TYPE) { + pprintf("EB Bus Device 0x%x:0x%x\n", + ctrl->bde_dev.device, + ctrl->bde_dev.rev); + } + if (debug >= 1) { + pprintf("\t\timask:imask2:fmask 0x%x:0x%x:0x%x\n", + ctrl->imask, + ctrl->imask2, + ctrl->fmask); + } + } + return 0; +} +/* + * Some kernels are configured to prevent mapping of kernel RAM memory + * into user space via the /dev/mem device. + * + * The function below provides a backdoor to map IO and DMA memory to + * user space via the BDE device file. + */ +static int +_bde_mmap(struct file *filp, struct vm_area_struct *vma) +{ + unsigned long paddr = vma->vm_pgoff << PAGE_SHIFT; + unsigned long size = vma->vm_end - vma->vm_start; + int i, j, pio_range_valid = 0; + + for(i = 0; i < _ndevices; i++) { + bde_ctrl_t *ctrl = _devices + i; + if (ctrl->dev_type & BDE_SWITCH_DEV_TYPE) { + for (j = 0; j < BDE_NUM_IOWIN_MAX; j++) { + if (paddr >= (unsigned long)ctrl->iowin[j].addr && + (paddr + size) <= (unsigned long)(ctrl->iowin[j].addr + ctrl->iowin[j].size)) { + pio_range_valid = 1; + break; + } + if ((ctrl->dev_type & BDE_AXI_DEV_TYPE) && (paddr == ctrl->iowin[j].addr)) { + pio_range_valid = 1; + break; + } + } + } + } + + if (pio_range_valid) { + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + if (remap_pfn_range(vma, + vma->vm_start, + vma->vm_pgoff, + size, + vma->vm_page_prot)) { + gprintk("Failed to mmap phys range 0x%lx-0x%lx to 0x%lx-0x%lx\n", + paddr, paddr + size, vma->vm_start,vma->vm_end); + return -EAGAIN; + } + return 0; + } + + return _dma_mmap(filp, vma); +} + +/* Workaround for broken Busybox/PPC insmod */ +static char _modname[] = LINUX_KERNEL_BDE_NAME; + +static gmodule_t _gmodule = { + name: LINUX_KERNEL_BDE_NAME, + major: LINUX_KERNEL_BDE_MAJOR, + init: _init, + cleanup: _cleanup, + pprint: _pprint, + mmap: _bde_mmap, +}; + +gmodule_t * +gmodule_get(void) +{ + _gmodule.name = _modname; + return &_gmodule; +} + + +/* + * BDE Interface + */ + +static const char * +_name(void) +{ + return LINUX_KERNEL_BDE_NAME; +} + +static int +_num_devices(int type) +{ + switch (type) { + case BDE_ALL_DEVICES: + return _ndevices; + case BDE_SWITCH_DEVICES: + return _switch_ndevices; + case BDE_ETHER_DEVICES: + return _ether_ndevices; + case BDE_CPU_DEVICES: + return _cpu_ndevices; + } + + return 0; +} + +static const ibde_dev_t * +_get_dev(int d) +{ + if (!VALID_DEVICE(d)) { + gprintk("_get_dev: Invalid device index %d\n", d); + return NULL; + } + + return &_devices[d].bde_dev; +} + +static uint32 +_get_dev_type(int d) +{ + if (!VALID_DEVICE(d)) { + gprintk("_get_dev: Invalid device index %d\n", d); + return 0; + } + + return _devices[d].dev_type; +} + +static uint32 +_pci_conf_read(int d, uint32 addr) +{ +#ifdef BCM_ICS + return 0xFFFFFFFF; +#else + uint32 rc = 0; + + if (!VALID_DEVICE(d)) { + gprintk("_pci_conf_read: Invalid device index %d\n", d); + return 0xFFFFFFFF; + } + + if (!(_devices[d].dev_type & BDE_PCI_DEV_TYPE)) { + gprintk("_pci_conf_read: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return 0xFFFFFFFF; + } + + pci_read_config_dword(_devices[d].pci_device, addr, &rc); + return rc; +#endif /* BCM_ICS */ +} + +static int +_pci_conf_write(int d, uint32 addr, uint32 data) +{ +#ifdef BCM_ICS + return -1; +#else + if (!VALID_DEVICE(d)) { + gprintk("_pci_conf_write: Invalid device index %d\n", d); + return -1; + } + + if (!(_devices[d].dev_type & BDE_PCI_DEV_TYPE)) { + gprintk("_pci_conf_write: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return -1; + } + + pci_write_config_dword(_devices[d].pci_device, addr, data); + return 0; +#endif /* BCM_ICS */ +} + +/* Initialized when the bde is created */ +static linux_bde_bus_t _bus; + +static void +_pci_bus_features(int unit, int *be_pio, int *be_packet, int *be_other) +{ + if ((_devices[unit].bde_dev.device & 0xFF00) != 0x5600 && + (_devices[unit].bde_dev.device & 0xF000) != 0xc000 && + (_devices[unit].bde_dev.device & 0xF000) != 0xb000 && + (_devices[unit].bde_dev.device & 0xF000) != 0x8000 && + (_devices[unit].bde_dev.device & 0xFFF0) != 0x0230 && + (_devices[unit].bde_dev.device & 0xFFF0) != 0xa440) { + if (be_pio) *be_pio = 0; + if (be_packet) *be_packet = 0; + if (be_other) *be_other = 0; + } else { + if (be_pio) *be_pio = _bus.be_pio; + if (be_packet) *be_packet = _bus.be_packet; + if (be_other) *be_other = _bus.be_other; + } +#if defined(BCM_METROCORE_LOCAL_BUS) + if (_devices[unit].dev_type & BDE_EB_DEV_TYPE && be_pio) { + *be_pio = 1; + } +#endif + +} + +static uint32_t +_read(int d, uint32_t addr) +{ + unsigned long flags; + volatile uint16 msb, lsb; + uint32 sl_addr, data; + + if (!VALID_DEVICE(d)) { + return -1; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + return -1; + } + + if (_devices[d].dev_type & BDE_DEV_BUS_RD_16BIT) { + /* + * Adjust the address presented to Eb slave. Move A15:A0 to A16:A1. + */ + sl_addr = (addr & 0xffff0000) | ((addr & 0xffff) << 1); + /* Disable interrupts */ + spin_lock_irqsave(&bus_lock, flags); + + lsb = *((uint16 *)(_devices[d].bde_dev.base_address + sl_addr)); + msb = *((uint16 *)(_devices[d].bde_dev.base_address + sl_addr)); + spin_unlock_irqrestore(&bus_lock, flags); + + return (msb << 16) | lsb; + } else { + data = ((VOL uint32_t *)_devices[d].bde_dev.base_address)[addr / 4]; +#if defined(CMIC_SOFT_BYTE_SWAP) + data = CMIC_SWAP32(data); +#endif + return data; + } +} + +static int +_write(int d, uint32_t addr, uint32_t data) +{ + unsigned long flags; + uint32 sl_addr; + + if (!VALID_DEVICE(d)) { + return -1; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + return -1; + } + + if (_devices[d].dev_type & BDE_DEV_BUS_WR_16BIT) { + /* + * Adjust the address presented to Eb slave. Move A15:A0 to A16:A1. + */ + sl_addr = (addr & 0xffff0000) | ((addr & 0xffff) << 1); + + /* Disable interrupts */ + spin_lock_irqsave(&bus_lock, flags); + + *((VOL uint16 *)(_devices[d].bde_dev.base_address + sl_addr)) = + data & 0xffff; + *((VOL uint16 *)(_devices[d].bde_dev.base_address + sl_addr)) = + (data >> 16) & 0xffff; + spin_unlock_irqrestore(&bus_lock, flags); + } else { +#if defined(CMIC_SOFT_BYTE_SWAP) + data = CMIC_SWAP32(data); +#endif + ((VOL uint32_t *)_devices[d].bde_dev.base_address)[addr / 4] = data; +#ifdef KEYSTONE + /* Enforce PCIe transaction ordering. Commit the write transaction */ + __asm__ __volatile__("sync"); +#endif + } + return 0; + +} + +static _ISR_RET +_isr(_ISR_PARAMS(irq, dev_id, iregs)) +{ + bde_ctrl_t *ctrl = (bde_ctrl_t *) dev_id; + + if (ctrl && ctrl->isr) { + ctrl->isr(ctrl->isr_data); + } + if (ctrl && ctrl->isr2) { + ctrl->isr2(ctrl->isr2_data); + } + return IRQ_HANDLED; +} + +static int +_interrupt_connect(int d, + void (*isr)(void *), + void *isr_data) +{ + bde_ctrl_t *ctrl; + unsigned long irq_flags; + int isr2_dev; + int isr_active; + int ret = 0; + + isr2_dev = d & LKBDE_ISR2_DEV; + d &= ~LKBDE_ISR2_DEV; + + if (!VALID_DEVICE(d)) { + gprintk("_interrupt_connect: Invalid device index %d\n", d); + return -1; + } + if (debug >= 1) { + gprintk("_interrupt_connect d %d\n", d); + } + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + gprintk("_interrupt_connect: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return -1; + } + + ctrl = _devices + d; + + isr_active = (ctrl->isr || ctrl->isr2) ? 1 : 0; + + if (unlikely(debug > 1)) + gprintk("%s:isr_active = %d\n", __func__, isr_active); + + if (isr2_dev) { + if (debug >= 1) { + gprintk("connect secondary isr\n"); + } + ctrl->isr2_data = isr_data; + ctrl->isr2 = isr; + if (isr_active) { + /* Main handler (_isr) already installed */ + return 0; + } + } else { + if (debug >= 1) { + gprintk("connect primary isr\n"); + } + ctrl->isr = isr; + ctrl->isr_data = isr_data; + if (isr_active) { + /* Main handler (_isr) already installed */ + return 0; + } + } + + if (ctrl->iLine != -1) { + irq_flags = IRQF_SHARED; +#ifdef CONFIG_PCI_MSI + if (ctrl->use_msi >= PCI_USE_INT_MSI) { + ret = _msi_connect(ctrl); + if(ret != 0) + goto msi_exit; + } +#endif +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + if (ctrl->use_msi == PCI_USE_INT_MSIX) { + int i; + for (i = 0; i < ctrl->msix_cnt; i++) { + if (unlikely(debug >= 1)) { + gprintk("%s(%d):device# = %d, irq = %d\n", + __func__, __LINE__, d, ctrl->entries[i].vector); + } + ret = request_irq(ctrl->entries[i].vector, (irq_handler_t)_isr, 0, + LINUX_KERNEL_BDE_NAME, ctrl); + if (ret < 0) + break; + } + if (ret < 0) { + while (i >= 0) + free_irq(ctrl->entries[i--].vector, ctrl); + + goto err_disable_msi; + } + } + else +#endif + { +#if defined(IPROC_CMICD) && defined(CONFIG_OF) + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + int i, j; + for (i = 0; i < IHOST_CMICX_MAX_INTRS; i++) { + if (unlikely(debug >= 1)) + gprintk("%s(%d):device# = %d, request_irq(%d)\n", + __func__, __LINE__, d, iproc_cmicx_irqs[i]); + ret = request_irq(iproc_cmicx_irqs[i], (irq_handler_t)_isr, + irq_flags, LINUX_KERNEL_BDE_NAME, ctrl); + if (ret < 0) { + gprintk("request_irq(%d) failed(%d)\n", iproc_cmicx_irqs[i], ret); + break; + } + } + if (ret < 0) { + for (j = 0; j < i; j++) { + free_irq(iproc_cmicx_irqs[j], ctrl); + } + goto err_disable_msi; + } + } else +#endif + { + ret = request_irq(ctrl->iLine, _isr, irq_flags, + LINUX_KERNEL_BDE_NAME, ctrl); + if (ret < 0) + goto err_disable_msi; + + if (unlikely(debug >= 1)) + gprintk("%s(%d):device# = %d, irq_flags = %lu, irq = %d\n", + __func__, __LINE__, d, + irq_flags, ctrl->pci_device ? ctrl->pci_device->irq : ctrl->iLine); + } + } + } + return 0; + +err_disable_msi: +#ifdef CONFIG_PCI_MSI + _msi_disconnect(ctrl); + +msi_exit: +#endif + gprintk("could not request IRQ\n"); + ctrl->isr = NULL; + ctrl->isr_data = NULL; + ctrl->isr2 = NULL; + ctrl->isr2_data = NULL; + + return -1; +} + +static int +_interrupt_disconnect(int d) +{ + bde_ctrl_t *ctrl; + int isr2_dev; + int isr_active; + + isr2_dev = d & LKBDE_ISR2_DEV; + d &= ~LKBDE_ISR2_DEV; + + if (!VALID_DEVICE(d)) { + return -1; + } + + if (debug >= 1) { + gprintk("_interrupt_disconnect d %d\n", d); + } + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + gprintk("_interrupt_disconnect: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return -1; + } + + ctrl = _devices + d; + + isr_active = (ctrl->isr || ctrl->isr2) ? 1 : 0; + + if (unlikely(debug > 1)) + gprintk("%s: isr_active = %d\n", __func__, isr_active); + + if (isr2_dev) { + if (debug >= 1) { + gprintk("disconnect secondary isr\n"); + } + ctrl->isr2 = NULL; + ctrl->isr2_data = NULL; + ctrl->fmask = 0; + if (ctrl->isr) { + /* Primary handler still active */ + SYNC_IRQ(ctrl->iLine); + return 0; + } + } else { + if (debug >= 1) { + gprintk("disconnect primary isr\n"); + } + ctrl->isr = NULL; + ctrl->isr_data = NULL; + if (ctrl->isr2) { + /* Secondary handler still active */ + SYNC_IRQ(ctrl->iLine); + return 0; + } + } + + if (isr_active) { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + if (ctrl->use_msi >= PCI_USE_INT_MSIX) { + int i; + for (i = 0; i < ctrl->msix_cnt; i++) { + if (unlikely(debug > 1)) { + gprintk("%s(%d):device# = %d, irq = %d\n", + __func__, __LINE__, d, ctrl->entries[i].vector); + } + free_irq(ctrl->entries[i].vector, ctrl); + } + } + else +#endif +#if defined(IPROC_CMICD) && defined(CONFIG_OF) + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + int i; + for (i = 0; i < IHOST_CMICX_MAX_INTRS; i++) { + if (unlikely(debug > 1)) { + gprintk("%s(%d):device# = %d, free_irq(%d)\n", + __func__, __LINE__, d, iproc_cmicx_irqs[i]); + } + free_irq(iproc_cmicx_irqs[i], ctrl); + } + } else +#endif + { + free_irq(ctrl->iLine, ctrl); + } +#ifdef CONFIG_PCI_MSI + if (ctrl->use_msi >= PCI_USE_INT_MSI) { + _msi_disconnect(ctrl); + } +#endif + } + + return 0; +} + +static uint32_t +_iproc_ihost_read(int d, uint32_t addr) +{ + uint32_t *mapaddr; + uint32_t reg_val; + mapaddr = IOREMAP(addr, sizeof(uint32_t)); + if (mapaddr == NULL) { + return -1; + } + reg_val = readl(mapaddr); + iounmap(mapaddr); + return reg_val; +} + +static int +_iproc_ihost_write(int d, uint32_t addr, uint32_t data) +{ + uint32_t *mapaddr; + mapaddr = IOREMAP(addr, sizeof(uint32_t)); + if (mapaddr == NULL) { + return -1; + } + writel(data, mapaddr); + iounmap(mapaddr); + return 0; +} + +static uint32_t +_iproc_read(int d, uint32_t addr) +{ + if (!VALID_DEVICE(d)) { + return -1; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + return -1; + } + + if (_devices[d].dev_type & BDE_AXI_DEV_TYPE) { + if (IHOST_GICD_REG_ADDR_VALID(d, addr)) { + return readl(IHOST_GICD_REG_ADDR_REMAP(d, addr)); + } + return _iproc_ihost_read(d, addr); + } + + return shbde_iproc_pci_read(&_devices[d].shbde, + (void *)_devices[d].bde_dev.base_address1, + addr); +} + +static int +_iproc_write(int d, uint32_t addr, uint32_t data) +{ + if (!VALID_DEVICE(d)) { + return -1; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + return -1; + } + + if (_devices[d].dev_type & BDE_AXI_DEV_TYPE) { + if (IHOST_GICD_REG_ADDR_VALID(d, addr)) { + writel(data, IHOST_GICD_REG_ADDR_REMAP(d, addr)); + return 0; + } + return _iproc_ihost_write(d, addr, data); + } + + shbde_iproc_pci_write(&_devices[d].shbde, + (void *)_devices[d].bde_dev.base_address1, + addr, data); + + return 0; +} + +static int +_get_cmic_ver(int d , uint32_t *ver) +{ + + unsigned int cap_base; + uint32_t rval = 0; + + if (!VALID_DEVICE(d)) { + gprintk("%s: Invalid device index %d\n", __func__, d); + return -1; + } + + if (!(_devices[d].dev_type & BDE_PCI_DEV_TYPE)) { + gprintk("%s: Not PCI device %d, type %x\n", __func__, + d, _devices[d].dev_type); + return -1; + } + + /* Look for PCIe vendor-specific extended capability (VSEC) */ + cap_base = PCI_EXT_CAP_START; + while (cap_base) { + pci_read_config_dword(_devices[d].pci_device, cap_base, &rval); + if (rval == 0xffffffff) { + /* Assume PCI HW read error */ + gprintk("%s: PCI HW read error\n", __func__); + return -1; + } + + if (PCI_EXT_CAP_ID(rval) == PCI_EXT_CAP_ID_VNDR) { + break; + } + cap_base = PCI_EXT_CAP_NEXT(rval); + } + if (cap_base) { + /* + * VSEC layout: + * + * 0x00: PCI Express Extended Capability Header + * 0x04: Vendor-Specific Header + * 0x08: Vendor-Specific Register 1 + * 0x0c: Vendor-Specific Register 2 + * ... + * 0x24: Vendor-Specific Register 8 + */ + pci_read_config_dword(_devices[d].pci_device, cap_base + 8, &rval); + if (unlikely(debug > 1)) + gprintk("%s:Found VSEC = %u\n", __func__, rval); + + /* Determine if CMICX */ + rval = ((rval >> 12) & 0xf); + *ver = rval; + + return 0; + } else { + gprintk("%s:VSEC not found\n", __func__); + } + + return -1; +} + +#ifdef BCM_SAND_SUPPORT +int +lkbde_cpu_write(int d, uint32 addr, uint32 *buf) +{ +#if defined(__DUNE_WRX_BCM_CPU__) || defined(__DUNE_GTO_BCM_CPU__) + *((uint32_t*)((uint8_t*)cpu_address + addr)) = *buf; +#endif + + return 0; +} + +int +lkbde_cpu_read(int d, uint32 addr, uint32 *buf) +{ +#if defined(__DUNE_WRX_BCM_CPU__) || defined(__DUNE_GTO_BCM_CPU__) + *buf = *((uint32_t*)((uint8_t*)cpu_address + addr)); +#else + *buf = (uint32_t)(-1); +#endif + + return 0; +} + +int +lkbde_cpu_pci_register(int d) +{ + bde_ctrl_t* ctrl; + uint16 cmd = 0; + + if (!VALID_DEVICE(d)) { + return -1; + } + + ctrl = &_devices[d]; + + /* enable device */ + if (pci_enable_device(ctrl->pci_device)) { + gprintk("Cannot enable pci device : vendor_id = %x, device_id = %x\n", + ctrl->pci_device->vendor, ctrl->pci_device->device); + } + + /* Add PCI_COMMAND_MEMORY and PCI_COMMAND_MASTER */ + pci_read_config_word(ctrl->pci_device, PCI_COMMAND, &cmd); + if (!(cmd & PCI_COMMAND_MEMORY) || !(cmd & PCI_COMMAND_MASTER)) { + cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; + pci_write_config_word(ctrl->pci_device, PCI_COMMAND, cmd); + } + + switch (ctrl->bde_dev.device) { + case GEDI_DEVICE_ID: + /* Fix bar 0 address */ + pci_write_config_byte(ctrl->pci_device, 0x13, 0x60); + + /* Fix Max payload size */ + pci_write_config_byte(ctrl->pci_device, 0x88, 0x2f); + pci_write_config_byte(ctrl->pci_device, 0x89, 0x10); + break; + case BCM88750_DEVICE_ID: + case BCM88753_DEVICE_ID: + case BCM88755_DEVICE_ID: + case BCM88770_DEVICE_ID: + case BCM88773_DEVICE_ID: + case BCM88774_DEVICE_ID: + case BCM88775_DEVICE_ID: + case BCM88776_DEVICE_ID: + case BCM88777_DEVICE_ID: + case BCM88950_DEVICE_ID: + case BCM88953_DEVICE_ID: + case BCM88954_DEVICE_ID: + case BCM88955_DEVICE_ID: + case BCM88956_DEVICE_ID: + case BCM88752_DEVICE_ID: + case BCM88772_DEVICE_ID: + case BCM88952_DEVICE_ID: + case ACP_PCI_DEVICE_ID: + case BCM88650_DEVICE_ID: + + case BCM88670_DEVICE_ID: + case BCM88671_DEVICE_ID: + case BCM88671M_DEVICE_ID: + case BCM88672_DEVICE_ID: + case BCM88673_DEVICE_ID: + case BCM88674_DEVICE_ID: + case BCM88675_DEVICE_ID: + case BCM88675M_DEVICE_ID: + case BCM88676_DEVICE_ID: + case BCM88676M_DEVICE_ID: + case BCM88677_DEVICE_ID: + case BCM88678_DEVICE_ID: + case BCM88679_DEVICE_ID: + + case BCM88370_DEVICE_ID: + case BCM88371_DEVICE_ID: + case BCM88371M_DEVICE_ID: + case BCM88375_DEVICE_ID: + case BCM88376_DEVICE_ID: + case BCM88376M_DEVICE_ID: + case BCM88377_DEVICE_ID: + case BCM88378_DEVICE_ID: + case BCM88379_DEVICE_ID: + case BCM88681_DEVICE_ID: + case BCM88682_DEVICE_ID: + case BCM88683_DEVICE_ID: + case BCM88684_DEVICE_ID: + case BCM88685_DEVICE_ID: + case BCM88687_DEVICE_ID: + case BCM88380_DEVICE_ID: + case BCM88381_DEVICE_ID: + case BCM88680_DEVICE_ID: + case BCM88470_DEVICE_ID: + case BCM88470P_DEVICE_ID: + case BCM88471_DEVICE_ID: + case BCM88473_DEVICE_ID: + case BCM88474_DEVICE_ID: + case BCM88474H_DEVICE_ID: + case BCM88476_DEVICE_ID: + case BCM88477_DEVICE_ID: + case BCM88270_DEVICE_ID: + case BCM88272_DEVICE_ID: + case BCM88273_DEVICE_ID: + case BCM88274_DEVICE_ID: + case BCM88278_DEVICE_ID: + case BCM8206_DEVICE_ID: + case BCM88350_DEVICE_ID: + case BCM88351_DEVICE_ID: + case BCM88450_DEVICE_ID: + case BCM88451_DEVICE_ID: + case BCM88550_DEVICE_ID: + case BCM88551_DEVICE_ID: + case BCM88552_DEVICE_ID: + case BCM88651_DEVICE_ID: + case BCM88654_DEVICE_ID: + case BCM88660_DEVICE_ID: + case BCM88360_DEVICE_ID: + case BCM88361_DEVICE_ID: + case BCM88363_DEVICE_ID: + case BCM88460_DEVICE_ID: + case BCM88461_DEVICE_ID: + case BCM88560_DEVICE_ID: + case BCM88561_DEVICE_ID: + case BCM88562_DEVICE_ID: + case BCM88661_DEVICE_ID: + case BCM88664_DEVICE_ID: + /* Fix bar 0 address */ + pci_write_config_byte(ctrl->pci_device, 0x12, 0x10); + pci_write_config_byte(ctrl->pci_device, 0x13, 0x60); + + /* + * For DMA transactions - set Max_Payload_Size and + * Max_Read_Request_Size to 128 bytes. + */ + pci_write_config_byte(ctrl->pci_device, 0xb5, 0x0c); + pci_write_config_byte(ctrl->pci_device, 0xb4, 0x0); + break; + default: + break; + } + + /* configure iproc >=14 devices by device family */ +#if defined(BCM_DNXF_SUPPORT) || defined(BCM_DNX_SUPPORT) + switch (ctrl->bde_dev.device & DNXC_DEVID_FAMILY_MASK) { +#ifdef BCM_DNX_SUPPORT + case JERICHO_2_DEVICE_ID: + case J2C_DEVICE_ID: + case J2C_2ND_DEVICE_ID: + case Q2A_DEVICE_ID: + case J2P_DEVICE_ID: +#endif +#ifdef BCM_DNXF_SUPPORT + case BCM88790_DEVICE_ID: +#endif + /* + * For DMA transactions - set Max_Payload_Size and + * Max_Read_Request_Size to 128 bytes. + */ + pci_write_config_byte(ctrl->pci_device, 0xb5, 0x0c); + pci_write_config_byte(ctrl->pci_device, 0xb4, 0x0); + break; + } +#endif /* defined(BCM_DNXF_SUPPORT) || defined(BCM_DNX_SUPPORT) */ + + /* Redo ioremap */ + if (ctrl->bde_dev.base_address) { + iounmap((void *)ctrl->bde_dev.base_address); + } + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(ctrl->iowin[0].addr, 0x1000000); + + if (debug >= 1) { + gprintk("%s, %s(): info:\n", __FILE__, __FUNCTION__); + gprintk("_ndevices=%d, _switch_ndevices=%d\n", + _ndevices, _switch_ndevices); + gprintk("ctrl->dev_type=0x%x, ctrl->phys_address=0x%lx\n", + ctrl->dev_type, (unsigned long)ctrl->iowin[0].addr); + gprintk("ctrl->bde_dev.device=0x%x, ctrl->bde_dev.rev=0x%x, " + "ctrl->bde_dev.base_address=0x%lx\n", + ctrl->bde_dev.device, ctrl->bde_dev.rev, + (unsigned long)ctrl->bde_dev.base_address); + } + + return 0; +} + +/* + * Export Low level access function - currently for PCP DMA Kernel module. + */ +int +lkbde_mem_write(int d, uint32 addr, uint32 *buf) +{ + bde_ctrl_t* ctrl; + void *full_addr; + + if (!VALID_DEVICE(d)) return -1; + ctrl = &_devices[d]; + + full_addr = (void *)ctrl->bde_dev.base_address + addr; + *((uint32_t*)full_addr) = *buf; + return 0; +} +LKM_EXPORT_SYM(lkbde_mem_write); + +int +lkbde_mem_read(int d, uint32 addr, uint32 *buf) +{ + bde_ctrl_t* ctrl; + void *full_addr; + + if (!VALID_DEVICE(d)) return -1; + ctrl = &_devices[d]; + + full_addr = (void *)ctrl->bde_dev.base_address + addr; + *buf = *((uint32_t*)full_addr); + return 0; +} +LKM_EXPORT_SYM(lkbde_mem_read); +#endif /* BCM_SAND_SUPPORT */ + +static ibde_t _ibde = { + name: _name, + num_devices: _num_devices, + get_dev: _get_dev, + get_dev_type: _get_dev_type, + pci_conf_read: _pci_conf_read, + pci_conf_write: _pci_conf_write, + pci_bus_features: _pci_bus_features, + read: _read, + write: _write, + salloc: _salloc, + sfree: _sfree, + sinval: _sinval, + sflush: _sflush, + interrupt_connect: _interrupt_connect, + interrupt_disconnect: _interrupt_disconnect, + l2p: _l2p, + p2l: _p2l, + + NULL, + NULL, + iproc_read: _iproc_read, + iproc_write: _iproc_write, + get_cmic_ver: _get_cmic_ver, +}; + +/* + * Function: linux_bde_create + * + * Purpose: + * Creator function for this BDE interface. + * Parameters: + * bus - pointer to the bus features structure you want this + * bde to export. Depends on the system. + * ibde - pointer to a location to recieve the bde interface pointer. + * Returns: + * 0 on success + * -1 on failure. + * Notes: + * This is the main BDE create function for this interface. + * Used by the external system initialization code. + */ +int +linux_bde_create(linux_bde_bus_t *bus, ibde_t **ibde) +{ + + memset(&_bus, 0, sizeof(_bus)); + + if (bus) { + _bus = *bus; + } +#ifdef NONCOHERENT_DMA_MEMORY +#ifdef REMAP_DMA_NONCACHED + /* + * If we have a non-cached DMA memory pool + * there is no need to flush and invalidate. + */ + if (_dma_pool_allocated()) { + _ibde.sinval = NULL; + _ibde.sflush = NULL; + } +#endif +#else + _ibde.sinval = NULL; + _ibde.sflush = NULL; +#endif + *ibde = &_ibde; + return 0; +} + +/* + * Function: linux_bde_destroy + * + * Purpose: + * destroy this bde + * Parameters: + * BDE interface pointer + * Returns: + * 0 on success, < 0 on error. + */ +int +linux_bde_destroy(ibde_t *ibde) +{ + /* nothing */ + return 0; +} + +/* + * Backdoors provided by the kernel bde + */ + +uint32_t +lkbde_get_dev_phys(int d) +{ + if (!VALID_DEVICE(d)) { + return -1; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + gprintk("lkbde_get_dev_phys: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return 0; + } + return _devices[d].iowin[0].addr; +} + +uint32_t +lkbde_get_dev_phys_hi(int d) +{ + if (!VALID_DEVICE(d)) { + return -1; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + gprintk("lkbde_get_dev_phys: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return 0; + } +#ifdef PHYS_ADDR_IS_64BIT + return (uint32_t)(_devices[d].iowin[0].addr >> 32); +#else + return 0; +#endif +} + +void * +lkbde_get_dev_virt(int d) +{ + if (!VALID_DEVICE(d)) { + return NULL; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + gprintk("lkbde_get_dev_virt: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return 0; + } + + if (_devices[d].alt_base_addr) { + return (void *)_devices[d].alt_base_addr; + } + + return (void *)_devices[d].bde_dev.base_address; +} + +int +lkbde_get_dev_resource(int d, int rsrc, uint32_t *flags, + uint32_t *phys_lo, uint32_t *phys_hi) +{ + if (!VALID_DEVICE(d)) { + return -1; + } + + *flags = 0; + *phys_lo = 0; + *phys_hi = 0; + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + gprintk("lkbde_get_dev_phys: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return 0; + } + + switch (rsrc) { + case 0: + *phys_lo = (uint32_t)(_devices[d].iowin[0].addr); +#ifdef PHYS_ADDR_IS_64BIT + *phys_hi = (uint32_t)(_devices[d].iowin[0].addr >> 32); +#endif + break; + case 1: + *phys_lo = (uint32_t)(_devices[d].iowin[1].addr); +#ifdef PHYS_ADDR_IS_64BIT + *phys_hi = (uint32_t)(_devices[d].iowin[1].addr >> 32); +#endif + break; + default: + break; + } + + return 0; +} + +void * +lkbde_get_dma_dev(int d) +{ + if (!VALID_DEVICE(d)) { + return NULL; + } + +#ifdef LINUX_BDE_DMA_DEVICE_SUPPORT + return (void *)_devices[d].dma_dev; +#else + return (void *)_devices[d].pci_device; +#endif +} + +void * +lkbde_get_hw_dev(int d) +{ + if (!VALID_DEVICE(d)) { + return NULL; + } + + return (void *)_devices[d].pci_device; +} + +int +lkbde_dev_state_set(int d, uint32 state) +{ + bde_ctrl_t *ctrl; + + if (!VALID_DEVICE(d)) { + return -1; + } + ctrl = _devices + d; + ctrl->dev_state = state; + return 0; +} + +int +lkbde_dev_state_get(int d, uint32 *state) +{ + bde_ctrl_t *ctrl; + if (!VALID_DEVICE(d)) { + gprintk("_get_dev: Invalid device index %d\n", d); + return -1; + } + ctrl = _devices + d; + + *state = ctrl->dev_state; + return 0; +} + +int +lkbde_dev_instid_set(int d, uint32 instid) +{ + bde_ctrl_t *ctrl; + + if (!VALID_DEVICE(d)) { + return -1; + } + ctrl = _devices + d; + ctrl->inst_id = instid; + + return 0; +} + +int +lkbde_dev_instid_get(int d, uint32 *instid) +{ + bde_ctrl_t *ctrl; + + if (!VALID_DEVICE(d)) { + return -1; + } + ctrl = _devices + d; + *instid = ctrl->inst_id; + + return 0; +} +/* + * When a secondary interrupt handler is installed this function + * is used for synchronizing hardware access to the IRQ mask + * register. The secondary driver will supply a non-zero fmask + * (filter mask) to indicate which interrupt bits it controls. + * The fmask is ignored for the primary driver. + */ +int +lkbde_irq_mask_set(int d, uint32_t addr, uint32_t mask, uint32_t fmask) +{ + bde_ctrl_t *ctrl; + int isr2_dev, iproc_reg; + unsigned long flags; + + isr2_dev = d & LKBDE_ISR2_DEV; + iproc_reg = d & LKBDE_IPROC_REG; + d &= ~(LKBDE_ISR2_DEV | LKBDE_IPROC_REG); + + if (!VALID_DEVICE(d)) { + return -1; + } + + ctrl = _devices + d; + + /* Lock is required to synchronize access from user space */ + spin_lock_irqsave(&ctrl->lock, flags); + + if (isr2_dev) { + /* This is the secondary interrupt handler */ + ctrl->fmask = fmask; + ctrl->imask2 = mask & ctrl->fmask; + } else { + /* This is the primary interrupt handler */ + ctrl->imask = mask & ~ctrl->fmask; + } + + if (iproc_reg) { + _iproc_write(d, addr, ctrl->imask | ctrl->imask2); + } else { + _write(d, addr, ctrl->imask | ctrl->imask2); + } + + spin_unlock_irqrestore(&ctrl->lock, flags); + + return 0; +} + +/* + * When a secondary interrupt handler is installed, this function + * is used to avoid activating the user mode interrupt handler + * thread if all pending interrupts are handled in kernel space. + * + * The mask returned is the mask of all interrupts, it can be used + * to do a logical AND with fmask, the result will tell you if + * the user mode interrupt handler needs to be invoked. + * + * Note that if no secondary handler is installed, the value of + * "mask & fmask" will be zero, and hence there will be no need to read the + * current interrupt status from hardware (from kernel space). + */ +int +lkbde_irq_mask_get(int d, uint32_t *mask, uint32_t *fmask) +{ + bde_ctrl_t *ctrl; + + d &= ~(LKBDE_ISR2_DEV | LKBDE_IPROC_REG); + + if (!VALID_DEVICE(d)) { + return -1; + } + + if (mask == NULL || fmask == NULL) { + return -1; + } + + ctrl = _devices + d; + + *fmask = ctrl->fmask; + *mask = ctrl->imask | ctrl->imask2; + + return 0; +} + +int +lkbde_get_num_devices(int type) +{ + return _num_devices(type); +} + +/* + * Export functions + */ +LKM_EXPORT_SYM(linux_bde_create); +LKM_EXPORT_SYM(linux_bde_destroy); +LKM_EXPORT_SYM(lkbde_get_dev_phys); +LKM_EXPORT_SYM(lkbde_get_dev_virt); +LKM_EXPORT_SYM(lkbde_get_dev_resource); +LKM_EXPORT_SYM(lkbde_get_hw_dev); +LKM_EXPORT_SYM(lkbde_get_dma_dev); +LKM_EXPORT_SYM(lkbde_irq_mask_set); +LKM_EXPORT_SYM(lkbde_irq_mask_get); +LKM_EXPORT_SYM(lkbde_get_dev_phys_hi); +LKM_EXPORT_SYM(lkbde_dev_state_set); +LKM_EXPORT_SYM(lkbde_dev_state_get); +LKM_EXPORT_SYM(lkbde_dev_instid_set); +LKM_EXPORT_SYM(lkbde_dev_instid_get); +#ifdef BCM_SAND_SUPPORT +LKM_EXPORT_SYM(lkbde_cpu_write); +LKM_EXPORT_SYM(lkbde_cpu_read); +LKM_EXPORT_SYM(lkbde_cpu_pci_register); +#endif diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/linux_dma.c b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/linux_dma.c new file mode 100644 index 00000000000..a332a7647ba --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/linux_dma.c @@ -0,0 +1,995 @@ +/* + * $Id: linux_dma.c,v 1.414 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + * Linux Kernel BDE DMA memory allocation + * + * + * DMA memory allocation modes + * =========================== + * + * 1. Using private pool in kernel memory + * -------------------------------------- + * In this mode the BDE module will try to assemble a physically contiguous + * of memory using the kernel page allocator. This memory block is then + * administered by the mpool allocation functions. Note that once a system + * has been running for a while, the memory fragmentation may prevent the + * allocator from assembling a contiguous memory block, however, if the + * module is loaded shortly after system startup, it is very unlikely to + * fail. + * + * This allocation method is used by default. + * + * 2. Using private pool in high memory + * ------------------------------------ + * In this mode the BDE module will assume that unused physical memory is + * present at the high_memory address, i.e. memory not managed by the Linux + * memory manager. This memory block is mapped into kernel space and + * administered by the mpool allocation functions. High memory must be + * reserved using either the mem=xxx kernel parameter (recommended), or by + * hardcoding the memory limit in the kernel image. + * + * The module parameter himem=1 enables this allocation mode. + * + * 3. Using kernel allocators (kmalloc, __get_free_pages) + * ------------------------------------------------------ + * In this mode all DMA memory is allocated from the kernel on the fly, i.e. + * no private DMA memory pool will be created. If large memory blocks are + * only allocated at system startup (or not at all), this allocation method + * is the most flexible and memory-efficient, however, it is not recommended + * for non-coherent memory platforms due to an overall system performance + * degradation arising from the use of cache flush/invalidate instructions. + * + * The module parameter dmasize=0M enables this allocation mode, however if + * DMA memory is requested from a user mode application, a private memory + * pool will be created and used irrespectively. + */ + +#include +#include +#include +#include +#include + +#ifdef BCM_PLX9656_LOCAL_BUS +#include +#endif + +/* allocation types/methods for the DMA memory pool */ +#define ALLOC_TYPE_CHUNK 0 /* use small allocations and join them */ +#define ALLOC_TYPE_API 1 /* use one allocation */ +#if _SIMPLE_MEMORY_ALLOCATION_ +#include +#if defined(IPROC_CMICD) && defined(CONFIG_CMA) && defined(CONFIG_CMA_SIZE_MBYTES) +#define DMA_MAX_ALLOC_SIZE (CONFIG_CMA_SIZE_MBYTES * 1024 * 1024) +#else +#define DMA_MAX_ALLOC_SIZE (1 << (MAX_ORDER - 1 + PAGE_SHIFT)) /* Maximum size the kernel can allocate in one allocation */ +#endif +#endif /* _SIMPLE_MEMORY_ALLOCATION_ */ + +#if _SIMPLE_MEMORY_ALLOCATION_ == 1 +#define ALLOC_METHOD_DEFAULT ALLOC_TYPE_API +#if defined(__arm__) +#define USE_DMA_MMAP_COHERENT +#define _PGPROT_NONCACHED(x) x = pgprot_noncached((x)) +#elif defined(__aarch64__ ) +#define USE_DMA_MMAP_COHERENT +#define _PGPROT_NONCACHED(x) x = pgprot_writecombine((x)) +#endif +#else +#define ALLOC_METHOD_DEFAULT ALLOC_TYPE_CHUNK +#endif + +#ifndef _PGPROT_NONCACHED +#ifdef REMAP_DMA_NONCACHED +#define _PGPROT_NONCACHED(x) x = pgprot_noncached((x)) +#else +#define _PGPROT_NONCACHED(x) +#endif +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)) +#include +#define virt_to_bus virt_to_phys +#define bus_to_virt phys_to_virt +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) +#define VIRT_TO_PAGE(p) virt_to_page((void*)(p)) +#else +#define VIRT_TO_PAGE(p) virt_to_page((p)) +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) +#define DMA_MAPPING_ERROR(d, p) dma_mapping_error((d),(p)) +#else +#define DMA_MAPPING_ERROR(d, p) dma_mapping_error((p)) +#endif + +#ifndef KMALLOC_MAX_SIZE +#define KMALLOC_MAX_SIZE (1UL << (MAX_ORDER - 1 + PAGE_SHIFT)) +#endif + +/* Compatibility */ +#ifdef LKM_2_4 +#define MEM_MAP_RESERVE mem_map_reserve +#define MEM_MAP_UNRESERVE mem_map_unreserve +#else /* LKM_2_6 */ +#define MEM_MAP_RESERVE SetPageReserved +#define MEM_MAP_UNRESERVE ClearPageReserved +#endif /* LKM_2_x */ + +#ifndef GFP_DMA32 +#define GFP_DMA32 0 +#endif + +/* Flags for memory allocations */ +#ifdef SAL_BDE_XLP +static int mem_flags = GFP_ATOMIC | GFP_KERNEL | GFP_DMA; +#else +#if defined(CONFIG_ZONE_DMA32) +static int mem_flags = GFP_ATOMIC | GFP_DMA32; +#else +static int mem_flags = GFP_ATOMIC | GFP_DMA; +#endif +#endif + +/* Debug output */ +static int dma_debug = 0; +module_param(dma_debug, int, 0); +MODULE_PARM_DESC(dma_debug, +"DMA debug output enable (default 0)."); + +/* DMA memory pool size */ +static char *dmasize; +LKM_MOD_PARAM(dmasize, "s", charp, 0); +MODULE_PARM_DESC(dmasize, +"Specify DMA memory size (default 4MB)"); + +/* Select DMA memory pool allocation method */ +static int dmaalloc = ALLOC_METHOD_DEFAULT; +LKM_MOD_PARAM(dmaalloc, "i", int, 0); +MODULE_PARM_DESC(dmaalloc, "Select DMA memory allocation method"); + +/* Use high memory for DMA */ +static char *himem; +LKM_MOD_PARAM(himem, "s", charp, 0); +MODULE_PARM_DESC(himem, +"Use high memory for DMA (default no)"); + +/* Physical high memory address to use for DMA */ +static char *himemaddr = 0; +LKM_MOD_PARAM(himemaddr, "s", charp, 0); +MODULE_PARM_DESC(himemaddr, +"Physical address to use for high memory DMA"); + +/* DMA memory allocation */ + +#define ONE_KB 1024 +#define ONE_MB (1024*1024) +#define ONE_GB (1024*1024*1024) + +/* Default DMA memory size */ +#ifdef SAL_BDE_DMA_MEM_DEFAULT +#define DMA_MEM_DEFAULT (SAL_BDE_DMA_MEM_DEFAULT * ONE_MB) +#else +#define DMA_MEM_DEFAULT (8 * ONE_MB) +#endif + +/* We try to assemble a contiguous segment from chunks of this size */ +#define DMA_BLOCK_SIZE (512 * ONE_KB) + +typedef struct _dma_segment { + struct list_head list; + unsigned long req_size; /* Requested DMA segment size */ + unsigned long blk_size; /* DMA block size */ + unsigned long blk_order; /* DMA block size in alternate format */ + unsigned long seg_size; /* Current DMA segment size */ + unsigned long seg_begin; /* Logical address of segment */ + unsigned long seg_end; /* Logical end address of segment */ + unsigned long *blk_ptr; /* Array of logical DMA block addresses */ + int blk_cnt_max; /* Maximum number of block to allocate */ + int blk_cnt; /* Current number of blocks allocated */ +} dma_segment_t; + +static unsigned int _dma_mem_size = DMA_MEM_DEFAULT; +static mpool_handle_t _dma_pool = NULL; +static void __iomem *_dma_vbase = NULL; +/* cpu physical address for mmap */ +static phys_addr_t _cpu_pbase = 0; +/* + * DMA bus address, it is either identical to cpu physical address + * or another address(IOVA) translated by IOMMU. + */ +static phys_addr_t _dma_pbase = 0; +static int _use_himem = 0; +static unsigned long _himemaddr = 0; +static int _use_dma_mapping = 0; +static LIST_HEAD(_dma_seg); + +#define DMA_DEV_INDEX 0 /* Device index to allocate memory pool */ +#define DMA_DEV(n) lkbde_get_dma_dev(n) +#define BDE_NUM_DEVICES(t) lkbde_get_num_devices(t) + +/* + * Function: _find_largest_segment + * + * Purpose: + * Find largest contiguous segment from a pool of DMA blocks. + * Parameters: + * dseg - DMA segment descriptor + * Returns: + * 0 on success, < 0 on error. + * Notes: + * Assembly stops if a segment of the requested segment size + * has been obtained. + * + * Lower address bits of the DMA blocks are used as follows: + * 0: Untagged + * 1: Discarded block + * 2: Part of largest contiguous segment + * 3: Part of current contiguous segment + */ +static int +_find_largest_segment(dma_segment_t *dseg) +{ + int i, j, blks, found; + unsigned long b, e, a; + + blks = dseg->blk_cnt; + /* Clear all block tags */ + for (i = 0; i < blks; i++) { + dseg->blk_ptr[i] &= ~3; + } + for (i = 0; i < blks && dseg->seg_size < dseg->req_size; i++) { + /* First block must be an untagged block */ + if ((dseg->blk_ptr[i] & 3) == 0) { + /* Initial segment size is the block size */ + b = dseg->blk_ptr[i]; + e = b + dseg->blk_size; + dseg->blk_ptr[i] |= 3; + /* Loop looking for adjacent blocks */ + do { + found = 0; + for (j = i + 1; j < blks && (e - b) < dseg->req_size; j++) { + a = dseg->blk_ptr[j]; + /* Check untagged blocks only */ + if ((a & 3) == 0) { + if (a == (b - dseg->blk_size)) { + /* Found adjacent block below current segment */ + dseg->blk_ptr[j] |= 3; + b = a; + found = 1; + } else if (a == e) { + /* Found adjacent block above current segment */ + dseg->blk_ptr[j] |= 3; + e += dseg->blk_size; + found = 1; + } + } + } + } while (found); + if ((e - b) > dseg->seg_size) { + /* The current block is largest so far */ + dseg->seg_begin = b; + dseg->seg_end = e; + dseg->seg_size = e - b; + /* Re-tag current and previous largest segment */ + for (j = 0; j < blks; j++) { + if ((dseg->blk_ptr[j] & 3) == 3) { + /* Tag current segment as the largest */ + dseg->blk_ptr[j] &= ~1; + } else if ((dseg->blk_ptr[j] & 3) == 2) { + /* Discard previous largest segment */ + dseg->blk_ptr[j] ^= 3; + } + } + } else { + /* Discard all blocks in current segment */ + for (j = 0; j < blks; j++) { + if ((dseg->blk_ptr[j] & 3) == 3) { + dseg->blk_ptr[j] &= ~2; + } + } + } + } + } + return 0; +} + +/* + * Function: _alloc_dma_blocks + * + * Purpose: + * Allocate DMA blocks and add them to the pool. + * Parameters: + * dseg - DMA segment descriptor + * blks - number of DMA blocks to allocate + * Returns: + * 0 on success, < 0 on error. + * Notes: + * DMA blocks are allocated using the page allocator. + */ +static int +_alloc_dma_blocks(dma_segment_t *dseg, int blks) +{ + int i, start; + unsigned long addr; + + if (dseg->blk_cnt + blks > dseg->blk_cnt_max) { + gprintk("No more DMA blocks\n"); + return -1; + } + start = dseg->blk_cnt; + for (i = 0; i < blks; i++) { + /* + * Note that we cannot use pci_alloc_consistent when we + * want to be able to map DMA memory to user space. + * + * The GFP_DMA flag is omitted as this imposes the ISA + * addressing limitations on x86 platforms. As long as + * we have less than 1GB of memory, we can do PCI DMA + * to all physical RAM locations. + */ + addr = __get_free_pages(mem_flags, dseg->blk_order); + if (addr) { + dseg->blk_ptr[start + i] = addr; + ++dseg->blk_cnt; + } else { + gprintk("DMA allocation failed: allocated %d of %d " + "requested blocks\n", i, blks); + return -1; + } + } + return 0; +} + +/* + * Function: _dma_segment_alloc + * + * Purpose: + * Allocate large physically contiguous DMA segment. + * Parameters: + * size - requested DMA segment size + * blk_size - assemble segment from blocks of this size + * Returns: + * DMA segment descriptor. + * Notes: + * Since we cannot allocate large blocks of contiguous + * memory from the kernel, we simply keep allocating + * smaller chunks until we can assemble a contiguous + * block of the desired size. + * + * When system allowed maximum bytes of memory has been allocated + * without a successful assembly of a contiguous DMA + * segment, the allocation function will return the + * largest contiguous segment found so far. It is up + * to the calling function to decide whether this + * amount is sufficient to proceed. + */ +static dma_segment_t * +_dma_segment_alloc(size_t size, size_t blk_size) +{ + dma_segment_t *dseg; + int i, blk_ptr_size; + unsigned long page_addr; + struct sysinfo si; + + /* Sanity check */ + if (size == 0 || blk_size == 0) { + return NULL; + } + /* Allocate an initialize DMA segment descriptor */ + if ((dseg = kmalloc(sizeof(dma_segment_t), GFP_KERNEL)) == NULL) { + return NULL; + } + memset(dseg, 0, sizeof(dma_segment_t)); + dseg->req_size = size; + dseg->blk_size = PAGE_ALIGN(blk_size); + while ((PAGE_SIZE << dseg->blk_order) < dseg->blk_size) { + dseg->blk_order++; + } + + si_meminfo(&si); + dseg->blk_cnt_max = (si.totalram << PAGE_SHIFT) / dseg->blk_size; + blk_ptr_size = dseg->blk_cnt_max * sizeof(unsigned long); + if (blk_ptr_size > KMALLOC_MAX_SIZE) { + blk_ptr_size = KMALLOC_MAX_SIZE; + dseg->blk_cnt_max = KMALLOC_MAX_SIZE / sizeof(unsigned long); + } + /* Allocate an initialize DMA block pool */ + dseg->blk_ptr = KMALLOC(blk_ptr_size, GFP_KERNEL); + if (dseg->blk_ptr == NULL) { + kfree(dseg); + return NULL; + } + memset(dseg->blk_ptr, 0, blk_ptr_size); + /* Allocate minimum number of blocks */ + if (_alloc_dma_blocks(dseg, dseg->req_size / dseg->blk_size) != 0) { + gprintk("Failed to allocate minimum number of DMA blocks\n"); + /* + * _alloc_dma_blocks() returns -1 if it fails to allocate the requested + * number of blocks, but it may still have allocated something. Fall + * through and return dseg filled in with as much memory as we could + * allocate. + */ + } + /* Allocate more blocks until we have a complete segment */ + do { + _find_largest_segment(dseg); + if (dseg->seg_size >= dseg->req_size) { + break; + } + } while (_alloc_dma_blocks(dseg, 8) == 0); + /* Reserve all pages in the DMA segment and free unused blocks */ + for (i = 0; i < dseg->blk_cnt; i++) { + if ((dseg->blk_ptr[i] & 3) == 2) { + dseg->blk_ptr[i] &= ~3; + for (page_addr = dseg->blk_ptr[i]; + page_addr < dseg->blk_ptr[i] + dseg->blk_size; + page_addr += PAGE_SIZE) { + MEM_MAP_RESERVE(VIRT_TO_PAGE(page_addr)); + } + } else if (dseg->blk_ptr[i]) { + dseg->blk_ptr[i] &= ~3; + free_pages(dseg->blk_ptr[i], dseg->blk_order); + dseg->blk_ptr[i] = 0; + } + } + return dseg; +} + +/* + * Function: _dma_segment_free + * + * Purpose: + * Release resources used by DMA segment. + * Parameters: + * dseg - DMA segment descriptor + * Returns: + * Nothing. + */ +static void +_dma_segment_free(dma_segment_t *dseg) +{ + int i; + unsigned long page_addr; + + if (dseg->blk_ptr) { + for (i = 0; i < dseg->blk_cnt; i++) { + if (dseg->blk_ptr[i]) { + for (page_addr = dseg->blk_ptr[i]; + page_addr < dseg->blk_ptr[i] + dseg->blk_size; + page_addr += PAGE_SIZE) { + MEM_MAP_UNRESERVE(VIRT_TO_PAGE(page_addr)); + } + free_pages(dseg->blk_ptr[i], dseg->blk_order); + } + } + kfree(dseg->blk_ptr); + kfree(dseg); + } +} + +/* + * Function: _pgalloc + * + * Purpose: + * Allocate DMA memory using page allocator + * Parameters: + * size - number of bytes to allocate + * Returns: + * Pointer to allocated DMA memory or NULL if failure. + * Notes: + * For any sizes less than DMA_BLOCK_SIZE, we ask the page + * allocator for the entire memory block, otherwise we try + * to assemble a contiguous segment ourselves. + */ +static void * +_pgalloc(size_t size) +{ + dma_segment_t *dseg; + size_t blk_size; + + blk_size = (size < DMA_BLOCK_SIZE) ? size : DMA_BLOCK_SIZE; + if ((dseg = _dma_segment_alloc(size, blk_size)) == NULL) { + return NULL; + } + if (dseg->seg_size < size) { + /* If we didn't get the full size then forget it */ + gprintk("_pgalloc() failed to get requested size %zu: " + "only got %lu contiguous across %d blocks\n", + size, dseg->seg_size, dseg->blk_cnt); + _dma_segment_free(dseg); + return NULL; + } + list_add(&dseg->list, &_dma_seg); + return (void *)dseg->seg_begin; +} + +/* + * Function: _pgfree + * + * Purpose: + * Free memory allocated by _pgalloc + * Parameters: + * ptr - pointer returned by _pgalloc + * Returns: + * 0 if succesfully freed, otherwise -1. + */ +static int +_pgfree(void *ptr) +{ + struct list_head *pos; + list_for_each(pos, &_dma_seg) { + dma_segment_t *dseg = list_entry(pos, dma_segment_t, list); + if (ptr == (void *)dseg->seg_begin) { + list_del(&dseg->list); + _dma_segment_free(dseg); + return 0; + } + } + return -1; +} + +/* + * Function: _pgcleanup + * + * Purpose: + * Free all memory allocated by _pgalloc + * Parameters: + * None + * Returns: + * Nothing. + */ +static void +_pgcleanup(void) +{ + switch (dmaalloc) { +#if _SIMPLE_MEMORY_ALLOCATION_ + case ALLOC_TYPE_API: + if (_dma_vbase) { + if (dma_debug >= 1) gprintk("freeing v=%p p=0x%lx size=0x%lx\n", _dma_vbase,(unsigned long) _dma_pbase, (unsigned long)_dma_mem_size); + dma_free_coherent(DMA_DEV(DMA_DEV_INDEX), _dma_mem_size, _dma_vbase, _dma_pbase); + } + break; +#endif /* _SIMPLE_MEMORY_ALLOCATION_ */ + + case ALLOC_TYPE_CHUNK: { + struct list_head *pos, *tmp; + int i, ndevices; + if (_use_dma_mapping) { + ndevices = BDE_NUM_DEVICES(BDE_SWITCH_DEVICES); + for (i = 0; i < ndevices && DMA_DEV(i); i ++) { + dma_unmap_single(DMA_DEV(i), (dma_addr_t)_dma_pbase, _dma_mem_size, DMA_BIDIRECTIONAL); + } + _use_dma_mapping = 0; + } + list_for_each_safe(pos, tmp, &_dma_seg) { + dma_segment_t *dseg = list_entry(pos, dma_segment_t, list); + list_del(&dseg->list); + _dma_segment_free(dseg); + } + break; + } + + default: + gprintk("DMA memory allocation method dmaalloc=%d is not supported\n", dmaalloc); + } +} + +/* + * Function: _alloc_mpool + * + * Purpose: + * Allocate DMA memory pool + * Parameters: + * size - size of DMA memory pool + * Returns: + * Nothing. + * Notes: + * If set up to use high memory, we simply map the memory into + * kernel space. + * It is assumed there is only one pool. + */ +static void +_alloc_mpool(size_t size) +{ + unsigned long pbase = 0; +#if defined(__arm__) && !defined(CONFIG_HIGHMEM) + if (_use_himem) { + gprintk("DMA in high memory requires CONFIG_HIGHMEM on ARM CPUs.\n"); + return; + } +#endif + + if (_use_himem) { + /* Use high memory for DMA */ + if (_himemaddr) { + pbase = _himemaddr; + } else { + pbase = virt_to_bus(high_memory); + } + if (((pbase + (size - 1)) >> 16) > DMA_BIT_MASK(16)) { + gprintk("DMA in high memory at 0x%lx size 0x%lx is beyond the 4GB limit and not supported.\n", pbase, (unsigned long)size); + return; + } + _cpu_pbase = _dma_pbase = pbase; + _dma_vbase = IOREMAP(_dma_pbase, size); + } else { + /* Get DMA memory from kernel */ + if (dma_debug >= 1) { + gprintk("Allocating DMA memory using method dmaalloc=%d\n", dmaalloc); + } + switch (dmaalloc) { +#if _SIMPLE_MEMORY_ALLOCATION_ + case ALLOC_TYPE_API: { + size_t alloc_size = size; /* size of memory allocated in current iteration */ + if (alloc_size > DMA_MAX_ALLOC_SIZE) { + alloc_size = DMA_MAX_ALLOC_SIZE; + } + /* get a memory allocation from the kernel */ + { + dma_addr_t dma_handle; + if (!(_dma_vbase = dma_alloc_coherent(DMA_DEV(DMA_DEV_INDEX), + alloc_size, &dma_handle, GFP_KERNEL)) || !dma_handle) { + gprintk("Failed to allocate coherent memory pool of size 0x%lx\n", (unsigned long)alloc_size); + return; + } + _cpu_pbase = pbase = dma_handle; + } + + if (alloc_size != size) { + gprintk("allocated 0x%lx bytes instead of 0x%lx bytes.\n", + (unsigned long)alloc_size, (unsigned long)size); + } + size = _dma_mem_size = alloc_size; + break; + } +#endif /* _SIMPLE_MEMORY_ALLOCATION_ */ + + case ALLOC_TYPE_CHUNK: + _dma_vbase = _pgalloc(size); + if (!_dma_vbase) { + gprintk("Failed to allocate memory pool of size 0x%lx\n", (unsigned long)size); + return; + } + _cpu_pbase = virt_to_bus(_dma_vbase); + /* Use dma_map_single to obtain DMA bus address or IOVA if iommu is present. */ + if (DMA_DEV(DMA_DEV_INDEX)) { + pbase = dma_map_single(DMA_DEV(DMA_DEV_INDEX), _dma_vbase, size, DMA_BIDIRECTIONAL); + if (DMA_MAPPING_ERROR(DMA_DEV(DMA_DEV_INDEX), pbase)) { + gprintk("Failed to map memory at %p\n", _dma_vbase); + _pgcleanup(); + _dma_vbase = NULL; + return; + } + _use_dma_mapping = 1; + } else { + pbase = _cpu_pbase; + } + break; + default: + _dma_vbase = NULL; + gprintk("DMA memory allocation method dmaalloc=%d is not supported\n", dmaalloc); + return; + } + + if (((pbase + (size - 1)) >> 16) > DMA_BIT_MASK(16)) { + gprintk("DMA memory allocated at 0x%lx size 0x%lx is beyond the 4GB limit and not supported.\n", pbase, (unsigned long)size); + _pgcleanup(); + _dma_vbase = NULL; + _dma_pbase = 0; + return; + } + + _dma_pbase = pbase; +#ifdef REMAP_DMA_NONCACHED + _dma_vbase = IOREMAP(_dma_pbase, size); +#endif + if (dma_debug >= 1) { + gprintk("_use_dma_mapping:%d _dma_vbase:%p _dma_pbase:%lx _cpu_pbase:%lx allocated:%lx dmaalloc:%d\n", + _use_dma_mapping, _dma_vbase, (unsigned long)_dma_pbase, + (unsigned long)_cpu_pbase, (unsigned long)size, dmaalloc); + } + } +} + +/* + * Function: _dma_cleanup + * + * Purpose: + * DMA cleanup function. + * Parameters: + * None + * Returns: + * Always 0 + */ +int +_dma_cleanup(void) +{ + if (_dma_vbase) { + mpool_destroy(_dma_pool); + if (_use_himem) { + iounmap(_dma_vbase); + } else { +#ifdef REMAP_DMA_NONCACHED + iounmap(_dma_vbase); +#endif + _pgcleanup(); + } + _dma_vbase = NULL; + _dma_pbase = 0; + _cpu_pbase = 0; + } + return 0; +} + +void _dma_init(int dev_index) +{ + unsigned long pbase; + + if (dev_index > DMA_DEV_INDEX) { + if (_use_dma_mapping && DMA_DEV(dev_index) && _dma_vbase) { + pbase = dma_map_single(DMA_DEV(dev_index), _dma_vbase, _dma_mem_size, DMA_BIDIRECTIONAL); + if (DMA_MAPPING_ERROR(DMA_DEV(dev_index), pbase)) { + gprintk("Failed to map memory for device %d at %p\n", dev_index, _dma_vbase); + return; + } + if (pbase != (unsigned long)_dma_pbase) { + /* Bus address/IOVA must be identical for all devices. */ + gprintk("Device %d has different pbase: %lx (should be %lx)\n", + dev_index, pbase, (unsigned long)_dma_pbase); + } + } + return; + } + + /* DMA Setup */ + if (dmasize) { + if ((dmasize[strlen(dmasize)-1] & ~0x20) == 'M') { + _dma_mem_size = simple_strtoul(dmasize, NULL, 0); + _dma_mem_size *= ONE_MB; + } else { + gprintk("DMA memory size must be specified as e.g. dmasize=8M\n"); + } + if (_dma_mem_size & (_dma_mem_size-1)) { + gprintk("dmasize must be a power of 2 (1M, 2M, 4M, 8M etc.)\n"); + _dma_mem_size = 0; + } + } + + if (himem) { + if ((himem[0] & ~0x20) == 'Y' || himem[0] == '1') { + _use_himem = 1; + } else if ((himem[0] & ~0x20) == 'N' || himem[0] == '0') { + _use_himem = 0; + } + } + + if (himemaddr && strlen(himemaddr) > 0) { + char suffix = (himemaddr[strlen(himemaddr)-1] & ~0x20); + _himemaddr = simple_strtoul(himemaddr, NULL, 0); + if (suffix == 'M') { + _himemaddr *= ONE_MB; + } else if (suffix == 'G') { + _himemaddr *= ONE_GB; + } else { + gprintk("DMA high memory address must be specified as e.g. himemaddr=8[MG]\n"); + } + } + + if (_dma_mem_size) { + _alloc_mpool(_dma_mem_size); + if (_dma_vbase == NULL) { + gprintk("no DMA memory available\n"); + } else { + mpool_init(); + _dma_pool = mpool_create(_dma_vbase, _dma_mem_size); + } + } +} + +/* + * Some kernels are configured to prevent mapping of kernel RAM memory + * into user space via the /dev/mem device. + * + * The function below provides a backdoor to mapping the DMA pool to + * user space via the BDE device file. + */ +int _dma_mmap(struct file *filp, struct vm_area_struct *vma) +{ + unsigned long phys_addr = vma->vm_pgoff << PAGE_SHIFT; + unsigned long size = vma->vm_end - vma->vm_start; + + if (phys_addr < (unsigned long )_cpu_pbase || + (phys_addr + size) > ((unsigned long )_cpu_pbase + _dma_mem_size)) { + gprintk("range 0x%lx-0x%lx outside DMA pool 0x%lx-0x%lx\n", + phys_addr, phys_addr + size, (unsigned long )_cpu_pbase, + (unsigned long )_cpu_pbase + _dma_mem_size); + return -EINVAL; + } + +#ifdef USE_DMA_MMAP_COHERENT + if (dmaalloc == ALLOC_TYPE_API) { + vma->vm_pgoff = 0; + return dma_mmap_coherent(DMA_DEV(DMA_DEV_INDEX), vma, (void *)_dma_vbase, phys_addr, size); + } +#endif + + _PGPROT_NONCACHED(vma->vm_page_prot); + + if (remap_pfn_range(vma, + vma->vm_start, + vma->vm_pgoff, + size, + vma->vm_page_prot)) { + gprintk("Failed to mmap phys range 0x%lx-0x%lx to 0x%lx-0x%lx\n", + phys_addr, phys_addr + size, vma->vm_start,vma->vm_end); + return -EAGAIN; + } + return 0; +} + +/* + * Function: _dma_pool_allocated + * + * Purpose: + * Check if DMA pool has been allocated. + * Parameters: + * None + * Returns: + * 0 : not allocated + * 1 : allocated + */ +int +_dma_pool_allocated(void) +{ + return (_dma_vbase) ? 1 : 0; +} + +sal_paddr_t +_l2p(int d, void *vaddr) +{ + if (_dma_mem_size) { + /* dma memory is a contiguous block */ + if (vaddr) { + return _dma_pbase + (PTR_TO_UINTPTR(vaddr) - PTR_TO_UINTPTR(_dma_vbase)); + } + return 0; + } + return ((sal_paddr_t)virt_to_bus(vaddr)); +} + +void * +_p2l(int d, sal_paddr_t paddr) +{ + sal_vaddr_t vaddr = (sal_vaddr_t)_dma_vbase; + + if (_dma_mem_size) { + /* DMA memory is a contiguous block */ + if (paddr == 0) { + return NULL; + } + return (void *)(vaddr + (sal_vaddr_t)(paddr - _dma_pbase)); + } + return bus_to_virt(paddr); +} + +/* + * Some of the driver malloc's are too large for + * kmalloc(), so 'sal_alloc' and 'sal_free' in the + * linux kernel sal cannot be implemented with kmalloc(). + * + * Instead, they expect someone to provide an allocator + * that can handle the gimongous size of some of the + * allocations, and we provide it here, by allocating + * this memory out of the boot-time dma pool. + * + * These are the functions in question: + */ + +void* kmalloc_giant(int sz) +{ + return mpool_alloc(_dma_pool, sz); +} + +void kfree_giant(void* ptr) +{ + return mpool_free(_dma_pool, ptr); +} + +uint32_t * +_salloc(int d, int size, const char *name) +{ + void *ptr; + + if (_dma_mem_size) { + return mpool_alloc(_dma_pool, size); + } + if ((ptr = kmalloc(size, mem_flags)) == NULL) { + ptr = _pgalloc(size); + } + return ptr; +} + +void +_sfree(int d, void *ptr) +{ + if (_dma_mem_size) { + return mpool_free(_dma_pool, ptr); + } + if (_pgfree(ptr) < 0) { + kfree(ptr); + } +} + +int +_sinval(int d, void *ptr, int length) +{ +#if defined(dma_cache_wback_inv) + dma_cache_wback_inv((unsigned long)ptr, length); +#else +#if defined(IPROC_CMICD) || defined(BCM958525) + + dma_sync_single_for_cpu(NULL, (unsigned long)ptr, length, DMA_BIDIRECTIONAL); +#else + dma_cache_sync(NULL, ptr, length, DMA_BIDIRECTIONAL); +#endif +#endif + return 0; +} + +int +_sflush(int d, void *ptr, int length) +{ +#if defined(dma_cache_wback_inv) + dma_cache_wback_inv((unsigned long)ptr, length); +#else +#if defined(IPROC_CMICD) || defined(BCM958525) + + dma_sync_single_for_cpu(NULL, (unsigned long)ptr, length, DMA_BIDIRECTIONAL); +#else + dma_cache_sync(NULL, ptr, length, DMA_BIDIRECTIONAL); +#endif +#endif + + return 0; +} + +int +lkbde_get_dma_info(phys_addr_t* cpu_pbase, phys_addr_t* dma_pbase, ssize_t* size) +{ + if (_dma_vbase == NULL) { + if (_dma_mem_size == 0) { + _dma_mem_size = DMA_MEM_DEFAULT; + } + _alloc_mpool(_dma_mem_size); + } + *cpu_pbase = _cpu_pbase; + *dma_pbase = _dma_pbase; + *size = (_dma_vbase) ? _dma_mem_size : 0; + return 0; +} + +void +_dma_pprint(void) +{ + pprintf("\tdmasize=%s\n", dmasize); + pprintf("\thimem=%s\n", himem); + pprintf("\thimemaddr=%s\n", himemaddr); + pprintf("DMA Memory (%s): %d bytes, %d used, %d free%s\n", + (_use_himem) ? "high" : "kernel", + (_dma_vbase) ? _dma_mem_size : 0, + (_dma_vbase) ? mpool_usage(_dma_pool) : 0, + (_dma_vbase) ? _dma_mem_size - mpool_usage(_dma_pool) : 0, + USE_LINUX_BDE_MMAP ? ", local mmap" : ""); +} + +/* + * Export functions + */ +LKM_EXPORT_SYM(kmalloc_giant); +LKM_EXPORT_SYM(kfree_giant); +LKM_EXPORT_SYM(lkbde_get_dma_info); diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/linux_shbde.c b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/linux_shbde.c new file mode 100755 index 00000000000..0d928134363 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/linux_shbde.c @@ -0,0 +1,105 @@ +/* + * $Id: $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + */ + +#include +#include +#include +#include "linux_shbde.h" + +/* Hardware abstractions for shared BDE functions */ + +static unsigned short +linux_pcic16_read(void *pci_dev, unsigned int addr) +{ + u16 data = 0; + + pci_read_config_word((struct pci_dev *)pci_dev, addr, &data); + + return data; +} + +static void +linux_pcic16_write(void *pci_dev, unsigned int addr, unsigned short data) +{ + pci_write_config_word((struct pci_dev *)pci_dev, addr, (u16)data); +} + +static unsigned int +linux_pcic32_read(void *pci_dev, unsigned int addr) +{ + u32 data = 0; + + pci_read_config_dword((struct pci_dev *)pci_dev, addr, &data); + + return data; +} + +static void +linux_pcic32_write(void *pci_dev, unsigned int addr, unsigned int data) +{ + pci_write_config_dword((struct pci_dev *)pci_dev, addr, (u32)data); +} + +static unsigned int +linux_io32_read(void *addr) +{ + return *((volatile u32 *)addr); +} + +static void +linux_io32_write(void *addr, unsigned int data) +{ + *((volatile u32 *)addr) = data; +} + +static void +linux_usleep(int usec) +{ + udelay(usec); +} + + +/* To get the PCI parent device under linux, from only the device pointer */ +static void * +linux_pci_parent_device_get(void *pci_dev) +{ + return (void *)(((struct pci_dev *)pci_dev)->bus->self); +} + + +/* + * Function: + * linux_shbde_hal_init + * Purpose: + * Initialize hardware abstraction module for Linux kernel. + * Parameters: + * shbde - pointer to uninitialized hardware abstraction module + * log_func - optional log output function + * Returns: + * Always 0 + */ +int +linux_shbde_hal_init(shbde_hal_t *shbde, shbde_log_func_t log_func) +{ + memset(shbde, 0, sizeof(*shbde)); + + shbde->log_func = log_func; + + shbde->pcic16_read = linux_pcic16_read; + shbde->pcic16_write = linux_pcic16_write; + shbde->pcic32_read = linux_pcic32_read; + shbde->pcic32_write = linux_pcic32_write; + + shbde->io32_read = linux_io32_read; + shbde->io32_write = linux_io32_write; + + shbde->usleep = linux_usleep; + + shbde->pci_parent_device_get = linux_pci_parent_device_get; + + return 0; +} diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/linux_shbde.h b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/linux_shbde.h new file mode 100644 index 00000000000..e53d050a118 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/kernel/linux_shbde.h @@ -0,0 +1,18 @@ +/* + * $Id: $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + */ + +#ifndef __LINUX_SHBDE_H__ +#define __LINUX_SHBDE_H__ + +#include +#include +#include + +extern int +linux_shbde_hal_init(shbde_hal_t *shbde, shbde_log_func_t log_func); + +#endif /* __LINUX_SHBDE_H__ */ diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/shared/mpool.c b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/shared/mpool.c new file mode 100644 index 00000000000..3de144b34d3 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/shared/mpool.c @@ -0,0 +1,340 @@ +/* + * $Id: mpool.c,v 1.18 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + */ + +#include + +#ifdef __KERNEL__ + +/* + * Abstractions used when compiling for Linux kernel mode. + */ + +#include + +/* + * We cannot use the linux kernel SAL for MALLOC/FREE because + * the current implementation of sal_alloc() allocates memory + * out of an mpool created by this module... + */ +#define MALLOC(x) kmalloc(x, GFP_ATOMIC) +#define FREE(x) kfree(x) + +static spinlock_t _mpool_lock; +#define MPOOL_LOCK_INIT() spin_lock_init(&_mpool_lock) +#define MPOOL_LOCK() unsigned long flags; spin_lock_irqsave(&_mpool_lock, flags) +#define MPOOL_UNLOCK() spin_unlock_irqrestore(&_mpool_lock, flags) + +#else /* !__KERNEL__*/ + +/* + * Abstractions used when compiling for Linux user mode. + */ + +#include +#include + +#define MALLOC(x) malloc(x) +#define FREE(x) free(x) + +static sal_sem_t _mpool_lock; +#define MPOOL_LOCK_INIT() _mpool_lock = sal_sem_create("mpool_lock", 1, 1) +#define MPOOL_LOCK() sal_sem_take(_mpool_lock, sal_sem_FOREVER) +#define MPOOL_UNLOCK() sal_sem_give(_mpool_lock) + +#endif /* __KERNEL__ */ + +/* Allow external override for system cache line size */ +#ifndef BCM_CACHE_LINE_BYTES +#ifdef L1_CACHE_BYTES +#define BCM_CACHE_LINE_BYTES L1_CACHE_BYTES +#else +#define BCM_CACHE_LINE_BYTES 128 /* Should be fine on most platforms */ +#endif +#endif + +#define MPOOL_BUF_SIZE 1024 +#define MPOOL_BUF_ALLOC_COUNT_MAX 16 + +typedef struct mpool_mem_s { + unsigned char *address; + int size; + struct mpool_mem_s *prev; + struct mpool_mem_s *next; +} mpool_mem_t; + +static int _buf_alloc_count; +static mpool_mem_t *mpool_buf[MPOOL_BUF_ALLOC_COUNT_MAX]; +static mpool_mem_t *free_list; + +#define ALLOC_INIT_MPOOL_BUF(ptr) \ + ptr = MALLOC((sizeof(mpool_mem_t) * MPOOL_BUF_SIZE)); \ + if (ptr) { \ + int i; \ + for (i = 0; i < MPOOL_BUF_SIZE - 1; i++) { \ + ptr[i].next = &ptr[i+1]; \ + } \ + ptr[MPOOL_BUF_SIZE - 1].next = NULL; \ + free_list = &ptr[0]; \ + } + +/* + * Function: mpool_init + * + * Purpose: + * Initialize mpool lock. + * Parameters: + * None + * Returns: + * Always 0 + */ +int +mpool_init(void) +{ + MPOOL_LOCK_INIT(); + return 0; +} + +#ifdef TRACK_DMA_USAGE +static int _dma_mem_used = 0; +#endif + +/* + * Function: mpool_alloc + * + * Purpose: + * Allocate memory block from mpool. + * Parameters: + * pool - mpool handle (from mpool_create) + * size - size of memory block to allocate + * Returns: + * Pointer to allocated memory block or NULL if allocation fails. + */ +void * +mpool_alloc(mpool_handle_t pool, int size) +{ + mpool_mem_t *ptr = pool, *newptr = NULL; + int mod; + + MPOOL_LOCK(); + + if (size < BCM_CACHE_LINE_BYTES) { + size = BCM_CACHE_LINE_BYTES; + } + + mod = size & (BCM_CACHE_LINE_BYTES - 1); + if (mod != 0 ) { + size += (BCM_CACHE_LINE_BYTES - mod); + } + while (ptr && ptr->next) { + if (ptr->next->address - (ptr->address + ptr->size) >= size) { + break; + } + ptr = ptr->next; + } + + if (!(ptr && ptr->next)) { + MPOOL_UNLOCK(); + return NULL; + } + + if (!free_list) { + if (_buf_alloc_count == MPOOL_BUF_ALLOC_COUNT_MAX) { + MPOOL_UNLOCK(); + return NULL; + } + + ALLOC_INIT_MPOOL_BUF(mpool_buf[_buf_alloc_count]); + + if (mpool_buf[_buf_alloc_count] == NULL) { + MPOOL_UNLOCK(); + return NULL; + } + + _buf_alloc_count++; + } + + newptr = free_list; + free_list = free_list->next; + + newptr->address = ptr->address + ptr->size; + newptr->size = size; + newptr->next = ptr->next; + newptr->prev = ptr; + ptr->next->prev = newptr; + ptr->next = newptr; +#ifdef TRACK_DMA_USAGE + _dma_mem_used += size; +#endif + + MPOOL_UNLOCK(); + return newptr->address; +} + + +/* + * Function: mpool_free + * + * Purpose: + * Free memory block allocated from mpool.. + * Parameters: + * pool - mpool handle (from mpool_create) + * addr - address of memory block to free + * Returns: + * Nothing + */ +void +mpool_free(mpool_handle_t pool, void *addr) +{ + unsigned char *address = (unsigned char *)addr; + mpool_mem_t *head = pool, *ptr = NULL; + + MPOOL_LOCK(); + + if (!(head && head->prev)) { + MPOOL_UNLOCK(); + return; + } + + ptr = head->prev->prev; + + while (ptr && (ptr != head)) { + if (ptr->address == address) { +#ifdef TRACK_DMA_USAGE + _dma_mem_used -= ptr->size; +#endif + ptr->prev->next = ptr->next; + ptr->next->prev = ptr->prev; + ptr->next = free_list; + free_list = ptr; + break; + } + ptr = ptr->prev; + } + + MPOOL_UNLOCK(); +} + +/* + * Function: mpool_create + * + * Purpose: + * Create and initialize mpool control structures. + * Parameters: + * base_ptr - pointer to mpool memory block + * size - total size of mpool memory block + * Returns: + * mpool handle + * Notes + * The mpool handle returned must be used for subsequent + * memory allocations from the mpool. + */ +mpool_handle_t +mpool_create(void *base_ptr, int size) +{ + mpool_mem_t *head, *tail; + int mod = (int)(((unsigned long)base_ptr) & (BCM_CACHE_LINE_BYTES - 1)); + int i; + + MPOOL_LOCK(); + + for (i = 0; i < MPOOL_BUF_ALLOC_COUNT_MAX; i++) { + mpool_buf[i] = NULL; + } + + _buf_alloc_count = 0; + + ALLOC_INIT_MPOOL_BUF(mpool_buf[_buf_alloc_count]); + + if (mpool_buf[_buf_alloc_count] == NULL) { + MPOOL_UNLOCK(); + return NULL; + } + + _buf_alloc_count++; + + if (mod) { + base_ptr = (char*)base_ptr + (BCM_CACHE_LINE_BYTES - mod); + size -= (BCM_CACHE_LINE_BYTES - mod); + } + size &= ~(BCM_CACHE_LINE_BYTES - 1); + + head = free_list; + free_list = free_list->next; + tail = free_list; + free_list = free_list->next; + + head->size = tail->size = 0; + head->address = base_ptr; + tail->address = head->address + size; + head->prev = tail; + head->next = tail; + tail->prev = head; + tail->next = NULL; + + MPOOL_UNLOCK(); + return head; +} + +/* + * Function: mpool_destroy + * + * Purpose: + * Free mpool control structures. + * Parameters: + * pool - mpool handle (from mpool_create) + * Returns: + * Always 0 + */ +int +mpool_destroy(mpool_handle_t pool) +{ + int i; + + MPOOL_LOCK(); + + if ((mpool_mem_t *)pool != mpool_buf[0]) { + MPOOL_UNLOCK(); + return 0; + } + + for (i = 0; i < MPOOL_BUF_ALLOC_COUNT_MAX; i++) { + if (mpool_buf[i]) { + FREE(mpool_buf[i]); + mpool_buf[i] = NULL; + } + } + + MPOOL_UNLOCK(); + + return 0; +} + +/* + * Function: mpool_usage + * + * Purpose: + * Report total sum of allocated mpool memory. + * Parameters: + * pool - mpool handle (from mpool_create) + * Returns: + * Number of bytes currently allocated using mpool_alloc. + */ +int +mpool_usage(mpool_handle_t pool) +{ + int usage = 0; + mpool_mem_t *ptr; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = ptr->next) { + usage += ptr->size; + } + + MPOOL_UNLOCK(); + + return usage; +} diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/user/kernel/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/user/kernel/Makefile new file mode 100644 index 00000000000..424f2fe24be --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/user/kernel/Makefile @@ -0,0 +1,70 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.1 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +LOCALDIR = systems/bde/linux/user/kernel + +# Make sure we build for the kernel if this is a user-mode build +ifneq ($(platform), ) +override-target=linux-$(platform) +endif + +include $(SDK)/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +ifneq ($(kernel_version),2_4) +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-user-bde +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +build: kernel_libs $(MODULE) $(KMODULE) +else +MODULE = $(LIBDIR)/linux-user-bde.o + +build: kernel_libs $(MODULE) +endif + +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../kernel/kernel_module/Module.symvers + +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ +ifneq ($(kernel_version),2_4) +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko +endif + +kernel_libs: + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared + +include $(SDK)/make/Make.depend + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +clean:: + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared $@ + $(RM) $(BOBJS) $(MODULE) + +.PHONY: build kernel_libs diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/user/kernel/linux-user-bde.c b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/user/kernel/linux-user-bde.c new file mode 100644 index 00000000000..662d41c8ab8 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/user/kernel/linux-user-bde.c @@ -0,0 +1,1512 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ + +/* + * Linux User BDE Helper Module + */ +#include +#include +#include + +#include +#include +#include + +#include "linux-user-bde.h" + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0) +#include +#endif + + +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("User BDE Helper Module"); +MODULE_LICENSE("GPL"); + +/* CMIC/CMICe defines */ +#define CMIC_IRQ_STAT 0x00000144 +#define CMIC_IRQ_MASK 0x00000148 +#define CMIC_IRQ_MASK_1 0x0000006C +#define CMIC_IRQ_MASK_2 0x00000070 + +/* CMICm defines */ +#define CMIC_CMCx_IRQ_STAT0_OFFSET(x) (0x31400 + (0x1000 * x)) +#define CMIC_CMCx_IRQ_STAT1_OFFSET(x) (0x31404 + (0x1000 * x)) +#define CMIC_CMCx_IRQ_STAT2_OFFSET(x) (0x31408 + (0x1000 * x)) +#define CMIC_CMCx_IRQ_STAT3_OFFSET(x) (0x3140c + (0x1000 * x)) +#define CMIC_CMCx_IRQ_STAT4_OFFSET(x) (0x31410 + (0x1000 * x)) + +#define CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(x) (0x31414 + (0x1000 * x)) +#define CMIC_CMCx_PCIE_IRQ_MASK1_OFFSET(x) (0x31418 + (0x1000 * x)) +#define CMIC_CMCx_PCIE_IRQ_MASK2_OFFSET(x) (0x3141c + (0x1000 * x)) +#define CMIC_CMCx_PCIE_IRQ_MASK3_OFFSET(x) (0x31420 + (0x1000 * x)) +#define CMIC_CMCx_PCIE_IRQ_MASK4_OFFSET(x) (0x31424 + (0x1000 * x)) + +/* CMICd defines */ +#define CMIC_CMCx_IRQ_STAT5_OFFSET(x) (0x314b0 + (0x1000 * x)) +#define CMIC_CMCx_IRQ_STAT6_OFFSET(x) (0x314b4 + (0x1000 * x)) +#define CMIC_CMCx_PCIE_IRQ_MASK5_OFFSET(x) (0x314b8 + (0x1000 * x)) +#define CMIC_CMCx_PCIE_IRQ_MASK6_OFFSET(x) (0x314bc + (0x1000 * x)) +#define CMIC_CMCx_UC0_IRQ_MASK5_OFFSET(x) (0x314c0 + (0x1000 * x)) +#define CMIC_CMCx_UC0_IRQ_MASK6_OFFSET(x) (0x314c4 + (0x1000 * x)) + +#define CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(x) (0x31428 + (0x1000 * x)) +#define CMIC_CMCx_UC0_IRQ_MASK1_OFFSET(x) (0x3142c + (0x1000 * x)) +#define CMIC_CMCx_UC0_IRQ_MASK2_OFFSET(x) (0x31430 + (0x1000 * x)) +#define CMIC_CMCx_UC0_IRQ_MASK3_OFFSET(x) (0x31434 + (0x1000 * x)) +#define CMIC_CMCx_UC0_IRQ_MASK4_OFFSET(x) (0x31438 + (0x1000 * x)) + +/* CMICX defines */ +#define INTC_INTR_REG_NUM (8) + + +#define PAXB_0_PAXB_IC_INTRCLR_0 (0x180123a0) +#define PAXB_0_PAXB_IC_INTRCLR_1 (0x180123a4) + +#define PAXB_0_PAXB_IC_INTRCLR_MODE_0 (0x180123a8) +#define PAXB_0_PAXB_IC_INTRCLR_MODE_1 (0x180123ac) + +#define HX5_PAXB_0_PAXB_IC_INTRCLR_0 (0x102303a0) +#define HX5_PAXB_0_PAXB_IC_INTRCLR_1 (0x102303a4) + +#define HX5_PAXB_0_PAXB_IC_INTRCLR_MODE_0 (0x102303a8) +#define HX5_PAXB_0_PAXB_IC_INTRCLR_MODE_1 (0x102303ac) + +#define INTC_INTR_ENABLE_REG0 (0x180130f0) +#define INTC_INTR_STATUS_REG0 (0x18013190) +#define INTC_INTR_RAW_STATUS_REG0 (0x18013140) + +#define INTC_INTR_ENABLE_BASE (INTC_INTR_ENABLE_REG0) +#define INTC_INTR_STATUS_BASE (INTC_INTR_STATUS_REG0) +#define INTC_INTR_RAW_STATUS_BASE (INTC_INTR_RAW_STATUS_REG0) + +#define HX5_INTC_INTR_ENABLE_REG0 (0x102310f0) +#define HX5_INTC_INTR_STATUS_REG0 (0x10231190) +#define HX5_INTC_INTR_RAW_STATUS_REG0 (0x10231140) + +#define HX5_INTC_INTR_ENABLE_BASE (HX5_INTC_INTR_ENABLE_REG0) +#define HX5_INTC_INTR_STATUS_BASE (HX5_INTC_INTR_STATUS_REG0) +#define HX5_INTC_INTR_RAW_STATUS_BASE (HX5_INTC_INTR_RAW_STATUS_REG0) + +#define IOREMAP(addr, size) ioremap_nocache(addr, size) + +#define HX5_IHOST_GICD_ISENABLERN_0 (0x10781100) +#define HX5_IHOST_GICD_ISENABLERN_1 (0x10781104) +#define HX5_IHOST_GICD_ICENABLERN_1 (0x10781184) +#define HX5_IHOST_GICD_ICENABLERN_8 (0x107811a0) +/* Offset between ISENABLERN_1 and ICENABLERN_1 in 4-bytes */ +#define HX5_IHOST_IRQ_MASK_OFFSET 0x20 +#define HX5_IHOST_INTR_MAP_NUM (HX5_IHOST_GICD_ICENABLERN_8 - HX5_IHOST_GICD_ISENABLERN_0) +#define HX5_IHOST_INTR_STATUS_MAP_NUM (INTC_INTR_REG_NUM * (sizeof(uint32))) +#define IRQ_BIT(intr) (intr % (sizeof(uint32)*8)) +#define IRQ_MASK_INDEX(intr) (intr / (sizeof(uint32)*8)) +#define HX5_CHIP_INTR_LOW_PRIORITY 119 +#define INTR_LOW_PRIORITY_BITPOS (1 << IRQ_BIT(HX5_CHIP_INTR_LOW_PRIORITY)) +#define INTC_LOW_PRIORITY_INTR_REG_IND IRQ_MASK_INDEX(HX5_CHIP_INTR_LOW_PRIORITY) +#define INTC_PDMA_INTR_REG_IND 4 + +#define READ_INTC_INTR(d, reg, v) \ + (v = user_bde->iproc_read(d, reg)) +#define WRITE_INTC_INTR(d, reg, v) \ + (user_bde->iproc_write(d, reg, v)) + +#define IHOST_READ_INTR(d, reg, v) \ + (v = readl((reg))) +#define IHOST_WRITE_INTR(d, reg, v) \ + (writel((v), (reg))) + +/* Allow override of default CMICm CMC */ +#ifndef BDE_CMICM_PCIE_CMC +#define BDE_CMICM_PCIE_CMC 0 +#endif + +/* Allow override of default CMICm CMC */ +#ifndef BDE_CMICD_PCIE_CMC +#define BDE_CMICD_PCIE_CMC 0 +#endif + +/* Defines used to distinguish CMICe from CMICm */ +#define CMICE_DEV_REV_ID (0x178 / sizeof(uint32)) + +static uint32 *ihost_intr_status_base = NULL; +static uint32 *ihost_intr_enable_base = NULL; + +static ibde_t *user_bde = NULL; + +typedef void (*isr_f)(void *); + +typedef struct _intr_regs_s { + uint32 intc_intr_status_base; + uint32 intc_intr_enable_base; + uint32 intc_intr_clear_0; + uint32 intc_intr_clear_1; + uint32 intc_intr_clear_mode_0; + uint32 intc_intr_clear_mode_1; +} _intr_regs_t; + +typedef struct bde_ctrl_s { + uint32 dev_type; + int irq; + int enabled; + int devid; + isr_f isr; + uint32 *ba; + int inst; /* associate to _bde_inst_resource[] */ + _intr_regs_t intr_regs; +} bde_ctrl_t; + +#define VALID_DEVICE(_n) (_n < LINUX_BDE_MAX_DEVICES) + +static bde_ctrl_t _devices[LINUX_BDE_MAX_DEVICES]; + +static wait_queue_head_t _ether_interrupt_wq; +static atomic_t _ether_interrupt_has_taken_place = ATOMIC_INIT(0); + +/* + * Multiple instance resource data structure. + * To keep the DMA resource per instance. + * And track the DMA pool usage. + */ +static int _bde_multi_inst = 0; + +typedef struct { + unsigned int inst_id; + unsigned int dma_offset; + unsigned int dma_size; + wait_queue_head_t intr_wq; + atomic_t intr; +} bde_inst_resource_t; + +static bde_inst_resource_t _bde_inst_resource[LINUX_BDE_MAX_DEVICES]; + +typedef struct { + phys_addr_t cpu_pbase; /* CPU physical base address of the DMA pool */ + phys_addr_t dma_pbase; /* Bus base address of the DMA pool */ + uint32 total_size; /* Total size of the pool in MB */ + uint32 offset; /* Current offset of the pool in MB */ +}_dma_pool_t; + +static _dma_pool_t _dma_pool; + +#define ONE_MB (1024 * 1024) + +#ifdef KEYSTONE +/* + * Enforce PCIE transaction ordering. Commit the write transaction. + */ + +#define SSOC_WRITEL(val, addr) \ + do { \ + writel((val), (addr)); \ + __asm__ __volatile__("sync"); \ + } while(0) + +#else + +#define SSOC_WRITEL(val, addr) \ + writel((val), (addr)) + +#endif +/* + * Function: _interrupt + * + * Purpose: + * Interrupt Handler. + * Mask all interrupts on device and wake up interrupt + * thread. It is assumed that the interrupt thread unmasks + * interrupts again when interrupt handling is complete. + * Parameters: + * ctrl - BDE control structure for this device. + * Returns: + * Nothing + */ +static void +_cmic_interrupt(bde_ctrl_t *ctrl) +{ + int d; + uint32_t mask = 0, stat, imask = 0, fmask = 0; + bde_inst_resource_t *res; + + d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t)); + res = &_bde_inst_resource[ctrl->inst]; + + /* Check for secondary interrupt handler */ + if (lkbde_irq_mask_get(d, &mask, &fmask) < 0) { + fmask = 0; + } + + if (fmask != 0) { + imask = mask & ~fmask; + /* Check for pending user mode interrupts */ + stat = user_bde->read(d, CMIC_IRQ_STAT); + if ((stat & imask) == 0) { + /* All handled in kernel mode */ + lkbde_irq_mask_set(d, CMIC_IRQ_MASK, imask, 0); + return; + } + } + + lkbde_irq_mask_set(d, CMIC_IRQ_MASK, 0, 0); + + atomic_set(&res->intr, 1); + +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +static void +_cmicx_interrupt(bde_ctrl_t *ctrl) +{ + int d, ind; + uint32 stat, iena, mask, fmask; + bde_inst_resource_t *res; + + d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t)); + + if (ctrl->dev_type & BDE_PCI_DEV_TYPE) { + /* Clear MSI interrupts immediately to prevent spurious interrupts */ + WRITE_INTC_INTR(d, ctrl->intr_regs.intc_intr_clear_0, 0xFFFFFFFF); + WRITE_INTC_INTR(d, ctrl->intr_regs.intc_intr_clear_1, 0xFFFFFFFF); + } + + res = &_bde_inst_resource[ctrl->inst]; + + lkbde_irq_mask_get(d, &mask, &fmask); + + if (fmask) { + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + IHOST_READ_INTR(d, ihost_intr_status_base + INTC_PDMA_INTR_REG_IND, stat); + IHOST_READ_INTR(d, ihost_intr_enable_base + INTC_PDMA_INTR_REG_IND, iena); + } else { + READ_INTC_INTR(d, ctrl->intr_regs.intc_intr_status_base + 4 * INTC_PDMA_INTR_REG_IND, stat); + READ_INTC_INTR(d, ctrl->intr_regs.intc_intr_enable_base + 4 * INTC_PDMA_INTR_REG_IND, iena); + } + if (stat & iena) { + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + IHOST_WRITE_INTR(d, ihost_intr_enable_base + INTC_PDMA_INTR_REG_IND + + HX5_IHOST_IRQ_MASK_OFFSET, ~0); + } else { + WRITE_INTC_INTR(d, ctrl->intr_regs.intc_intr_enable_base + 4 * INTC_PDMA_INTR_REG_IND, 0); + } + + for (ind = 0; ind < INTC_INTR_REG_NUM; ind++) { + if (ind == INTC_PDMA_INTR_REG_IND) { + continue; + } + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + if (ind < INTC_LOW_PRIORITY_INTR_REG_IND) { + continue; + } + IHOST_READ_INTR(d, ihost_intr_status_base + ind, stat); + IHOST_READ_INTR(d, ihost_intr_enable_base + ind, iena); + if (ind == INTC_LOW_PRIORITY_INTR_REG_IND) { + stat &= INTR_LOW_PRIORITY_BITPOS; + } + } else { + READ_INTC_INTR(d, ctrl->intr_regs.intc_intr_status_base + 4 * ind, stat); + READ_INTC_INTR(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena); + } + if (stat & iena) { + break; + } + } + + if (ind >= INTC_INTR_REG_NUM) { + return; + } + } + } + + /* Disable all interrupts.. Re-enable unserviced interrupts later + * So as to avoid getting new interrupts until the user level driver + * enumerates the interrupts to be serviced + */ + for (ind = 0; ind < INTC_INTR_REG_NUM; ind++) { + if (fmask && ind == INTC_PDMA_INTR_REG_IND) { + continue; + } + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + if (ind < INTC_LOW_PRIORITY_INTR_REG_IND) { + continue; + } + if (ind == INTC_LOW_PRIORITY_INTR_REG_IND) { + IHOST_WRITE_INTR(d, ihost_intr_enable_base + INTC_LOW_PRIORITY_INTR_REG_IND + + HX5_IHOST_IRQ_MASK_OFFSET, INTR_LOW_PRIORITY_BITPOS); + } else { + IHOST_WRITE_INTR(d, ihost_intr_enable_base + ind + + HX5_IHOST_IRQ_MASK_OFFSET, ~0); + } + } else { + WRITE_INTC_INTR(d, ctrl->intr_regs.intc_intr_enable_base + 4*ind, 0); + } + } + + /* Notify */ + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +static void +_cmicm_interrupt(bde_ctrl_t *ctrl) +{ + int d; + int cmc = BDE_CMICM_PCIE_CMC; + uint32 stat, mask = 0, fmask = 0, imask = 0; + bde_inst_resource_t *res; + + d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t)); + res = &_bde_inst_resource[ctrl->inst]; + + lkbde_irq_mask_get(d, &mask, &fmask); + + while (fmask) { + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT0_OFFSET(cmc)); + imask = mask & ~fmask; + if (stat & imask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT1_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK1_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK1_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT2_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK2_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK2_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT3_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK3_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK3_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT4_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK4_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK4_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + return; + } + + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + lkbde_irq_mask_set(d, CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(cmc), 0, 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK1_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK2_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK3_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK4_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(1), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(2), 0); + } + else { + lkbde_irq_mask_set(d, CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(cmc), 0, 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK1_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK2_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK3_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK4_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(1), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(2), 0); + } + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +/* some device has cmc0 only */ +static void +_cmicd_cmc0_interrupt(bde_ctrl_t *ctrl) +{ + int d; + int cmc = 0; + uint32 stat, mask = 0, fmask = 0, imask = 0; + bde_inst_resource_t *res; + + d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t)); + res = &_bde_inst_resource[ctrl->inst]; + lkbde_irq_mask_get(d, &mask, &fmask); + + while (fmask) { + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT0_OFFSET(cmc)); + imask = mask & ~fmask; + if (stat & imask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT1_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK1_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK1_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT2_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK2_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK2_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT3_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK3_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK3_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT4_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK4_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK4_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT5_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK5_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK5_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT6_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK6_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK6_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + return; + } + + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + lkbde_irq_mask_set(d, CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(cmc), 0, 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK1_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK2_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK3_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK4_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK5_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK6_OFFSET(cmc), 0); + } else { + lkbde_irq_mask_set(d, CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(cmc), 0, 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK1_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK2_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK3_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK4_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK5_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK6_OFFSET(cmc), 0); + } + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +static void +_cmicd_interrupt(bde_ctrl_t *ctrl) +{ + int d; + int cmc = BDE_CMICD_PCIE_CMC; + uint32 stat, mask = 0, fmask = 0, imask = 0; + bde_inst_resource_t *res; + + d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t)); + res = &_bde_inst_resource[ctrl->inst]; + lkbde_irq_mask_get(d, &mask, &fmask); + + while (fmask) { + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT0_OFFSET(cmc)); + imask = mask & ~fmask; + if (stat & imask) { + break; + } + /** Check if there are interrupts other than PacketIO interrupts on CMC1 */ + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT0_OFFSET(1)); + imask = mask & ~fmask; + if (stat & imask) { + break; + } + /** Check if there are interrupts other than PacketIO interrupts on CMC2 */ + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT0_OFFSET(2)); + imask = mask & ~fmask; + if (stat & imask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT1_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK1_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK1_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT2_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK2_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK2_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT3_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK3_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK3_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT4_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK4_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK4_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT5_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK5_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK5_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT6_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK6_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK6_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + return; + } + + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + lkbde_irq_mask_set(d, CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(cmc), 0, 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK1_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK2_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK3_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK4_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK5_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK6_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(1), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(2), 0); + } else { + lkbde_irq_mask_set(d, CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(cmc), 0, 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK1_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK2_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK3_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK4_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK5_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK6_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(1), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(2), 0); + } + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +static void +_bcm88750_interrupt(bde_ctrl_t *ctrl) +{ + int d; + bde_inst_resource_t *res; + + d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t)); + res = &_bde_inst_resource[ctrl->inst]; + lkbde_irq_mask_set(d, CMIC_IRQ_MASK, 0, 0); + + lkbde_irq_mask_set(d, CMIC_IRQ_MASK_1, 0, 0); + lkbde_irq_mask_set(d, CMIC_IRQ_MASK_2, 0, 0); + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +/* The actual interrupt handler of ethernet devices */ +static void +_ether_interrupt(bde_ctrl_t *ctrl) +{ + SSOC_WRITEL(0, ctrl->ba + 0x024/4); + + atomic_set(&_ether_interrupt_has_taken_place, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&_ether_interrupt_wq); +#else + wake_up_interruptible(&_ether_interrupt_wq); +#endif +} + + +static struct _intr_mode_s { + isr_f isr; + const char *name; +} _intr_mode[] = { + { (isr_f)_cmic_interrupt, "CMIC/CMICe" }, + { (isr_f)_cmicm_interrupt, "CMICm" }, + { (isr_f)_cmicd_interrupt, "CMICd" }, + { (isr_f)_cmicd_cmc0_interrupt, "CMICd CMC0" }, + { (isr_f)_bcm88750_interrupt, "BCM88750" }, + { (isr_f)_cmicx_interrupt, "CMICx" }, + { NULL, NULL } +}; + +static const char * +_intr_mode_str(void *isr) +{ + int imx; + + imx = 0; + while (_intr_mode[imx].isr != NULL) { + if (isr == _intr_mode[imx].isr) { + return _intr_mode[imx].name; + } + imx++; + } + return NULL; +} + +static void +_intr_regs_init(bde_ctrl_t *ctrl, int hx5_intr) +{ + if (hx5_intr) { + ctrl->intr_regs.intc_intr_status_base = HX5_INTC_INTR_STATUS_BASE; + ctrl->intr_regs.intc_intr_enable_base = HX5_INTC_INTR_ENABLE_BASE; + ctrl->intr_regs.intc_intr_clear_0 = HX5_PAXB_0_PAXB_IC_INTRCLR_0; + ctrl->intr_regs.intc_intr_clear_1 = HX5_PAXB_0_PAXB_IC_INTRCLR_1; + ctrl->intr_regs.intc_intr_clear_mode_0 = HX5_PAXB_0_PAXB_IC_INTRCLR_MODE_0; + ctrl->intr_regs.intc_intr_clear_mode_1 = HX5_PAXB_0_PAXB_IC_INTRCLR_MODE_1; + } else { + ctrl->intr_regs.intc_intr_status_base = INTC_INTR_STATUS_BASE; + ctrl->intr_regs.intc_intr_enable_base = INTC_INTR_ENABLE_BASE; + ctrl->intr_regs.intc_intr_clear_0 = PAXB_0_PAXB_IC_INTRCLR_0; + ctrl->intr_regs.intc_intr_clear_1 = PAXB_0_PAXB_IC_INTRCLR_1; + ctrl->intr_regs.intc_intr_clear_mode_0 = PAXB_0_PAXB_IC_INTRCLR_MODE_0; + ctrl->intr_regs.intc_intr_clear_mode_1 = PAXB_0_PAXB_IC_INTRCLR_MODE_1; + } +} + +static void +_devices_init(int d) +{ + bde_ctrl_t *ctrl; + uint32 ver; + uint16 device_id_mask = 0xFFF0; + uint16 device_id; + uint32 state = 0; + + (void)lkbde_dev_state_get(d, &state); + if (state == BDE_DEV_STATE_REMOVED) { + return; + } + + ctrl = &_devices[d]; + /* Initialize our control info */ + ctrl->dev_type = user_bde->get_dev_type(d); + ctrl->devid = user_bde->get_dev(d)->device; + ctrl->inst = 0; + + if (BDE_DEV_MEM_MAPPED(ctrl->dev_type)) { + ctrl->enabled = 0; + ctrl->ba = lkbde_get_dev_virt(d); + } + if (ctrl->dev_type & BDE_SWITCH_DEV_TYPE) { + switch (user_bde->get_dev(d)->device) { + case BCM88750_DEVICE_ID: + case BCM88753_DEVICE_ID: + case BCM88754_DEVICE_ID: + case BCM88755_DEVICE_ID: + case BCM88752_DEVICE_ID: + ctrl->isr = (isr_f)_bcm88750_interrupt; + break; + case BCM53540_DEVICE_ID: + case BCM53547_DEVICE_ID: + case BCM53548_DEVICE_ID: + case BCM53549_DEVICE_ID: + ctrl->isr = (isr_f)_cmicd_cmc0_interrupt; + break; + case BCM88670_DEVICE_ID: + case BCM88671_DEVICE_ID: + case BCM88671M_DEVICE_ID: + case BCM88672_DEVICE_ID: + case BCM88673_DEVICE_ID: + case BCM88674_DEVICE_ID: + case BCM88675_DEVICE_ID: + case BCM88675M_DEVICE_ID: + case BCM88676_DEVICE_ID: + case BCM88676M_DEVICE_ID: + case BCM88677_DEVICE_ID: + case BCM88678_DEVICE_ID: + case BCM88679_DEVICE_ID: + case BCM88370_DEVICE_ID: + case BCM88371_DEVICE_ID: + case BCM88371M_DEVICE_ID: + case BCM88375_DEVICE_ID: + case BCM88376_DEVICE_ID: + case BCM88376M_DEVICE_ID: + case BCM88377_DEVICE_ID: + case BCM88378_DEVICE_ID: + case BCM88379_DEVICE_ID: + case BCM88681_DEVICE_ID: + case BCM88682_DEVICE_ID: + case BCM88683_DEVICE_ID: + case BCM88684_DEVICE_ID: + case BCM88685_DEVICE_ID: + case BCM88687_DEVICE_ID: + case BCM88380_DEVICE_ID: + case BCM88381_DEVICE_ID: + case BCM88680_DEVICE_ID: + case BCM88770_DEVICE_ID: + case BCM88773_DEVICE_ID: + case BCM88774_DEVICE_ID: + case BCM88775_DEVICE_ID: + case BCM88776_DEVICE_ID: + case BCM88777_DEVICE_ID: + case BCM88470_DEVICE_ID: + case BCM88470P_DEVICE_ID: + case BCM88471_DEVICE_ID: + case BCM88473_DEVICE_ID: + case BCM88474_DEVICE_ID: + case BCM88474H_DEVICE_ID: + case BCM88476_DEVICE_ID: + case BCM88477_DEVICE_ID: + case BCM88270_DEVICE_ID: + case BCM88272_DEVICE_ID: + case BCM88273_DEVICE_ID: + case BCM88274_DEVICE_ID: + case BCM88278_DEVICE_ID: + case BCM88279_DEVICE_ID: + case BCM8206_DEVICE_ID: + case BCM88950_DEVICE_ID: + case BCM88953_DEVICE_ID: + case BCM88954_DEVICE_ID: + case BCM88955_DEVICE_ID: + case BCM88956_DEVICE_ID: + case BCM88772_DEVICE_ID: + case BCM88952_DEVICE_ID: + ctrl->isr = (isr_f)_cmicd_interrupt; + break; + case BCM56370_DEVICE_ID: + case BCM56371_DEVICE_ID: + case BCM56372_DEVICE_ID: + case BCM56374_DEVICE_ID: + case BCM56375_DEVICE_ID: + case BCM56376_DEVICE_ID: + case BCM56377_DEVICE_ID: + case BCM56577_DEVICE_ID: + case BCM56578_DEVICE_ID: + case BCM56579_DEVICE_ID: + case BCM56273_DEVICE_ID: + case BCM56274_DEVICE_ID: + case BCM56275_DEVICE_ID: + case BCM56276_DEVICE_ID: + case BCM56277_DEVICE_ID: + case BCM56278_DEVICE_ID: + ctrl->isr = (isr_f)_cmicx_interrupt; + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + if (!ihost_intr_enable_base) { + ihost_intr_enable_base = (uint32_t *)IOREMAP(HX5_IHOST_GICD_ISENABLERN_1, + HX5_IHOST_INTR_MAP_NUM); + } + if (!ihost_intr_status_base) { + ihost_intr_status_base = (uint32_t *)IOREMAP(HX5_INTC_INTR_RAW_STATUS_REG0, + HX5_IHOST_INTR_STATUS_MAP_NUM); + } + } + _intr_regs_init(ctrl, 1); + break; + default: + /* Get CMIC version */ + if (user_bde->get_cmic_ver(d, &ver) != 0) { + ver = -1; + } + device_id = ctrl->devid & device_id_mask; + /* TH/TH+/TH2 should use cmicd interrupt handler */ + if (BCM56960_DEVICE_ID == device_id || + BCM56930_DEVICE_ID == device_id || + BCM56970_DEVICE_ID == device_id) { + ctrl->isr = (isr_f)_cmicd_interrupt; + } + /* check if version is CMICX */ + else if (ver == 0x04) { + ctrl->isr = (isr_f)_cmicx_interrupt; + _intr_regs_init(ctrl, 0); + } else { + ctrl->isr = (isr_f)_cmic_interrupt; + if ((ctrl->dev_type & BDE_256K_REG_SPACE) && +#ifdef BCM_PETRA_SUPPORT + ctrl->devid != 0x1234 && +#endif + readl(ctrl->ba + CMICE_DEV_REV_ID) == 0) { + ctrl->isr = (isr_f)_cmicm_interrupt; + } + } + break; + } + + /* configure interrupts for DNX devices using iproc >=14 */ +#if defined(BCM_DNXF_SUPPORT) || defined(BCM_DNX_SUPPORT) + switch (user_bde->get_dev(d)->device & DNXC_DEVID_FAMILY_MASK) { +#ifdef BCM_DNX_SUPPORT + case JERICHO_2_DEVICE_ID: + case J2C_DEVICE_ID: + case J2C_2ND_DEVICE_ID: + case Q2A_DEVICE_ID: + case J2P_DEVICE_ID: +#endif +#ifdef BCM_DNXF_SUPPORT + case BCM88790_DEVICE_ID: +#endif + ctrl->isr = (isr_f)_cmicx_interrupt; + _intr_regs_init(ctrl, 0); + break; + } +#endif /* defined(BCM_DNXF_SUPPORT) || defined(BCM_DNX_SUPPORT) */ + + if (_intr_mode_str(ctrl->isr) == NULL) { + gprintk("Warning: Unknown interrupt mode\n"); + } + } +} +/* + * Function: _init + * + * Purpose: + * Module initialization. + * Attaches to kernel BDE. + * Parameters: + * None + * Returns: + * Always 0 + */ +static int +_init(void) +{ + int i; + phys_addr_t cpu_pbase, dma_pbase; + ssize_t dmasize; + bde_inst_resource_t *res; + + /* Connect to the kernel bde */ + if ((linux_bde_create(NULL, &user_bde) < 0) || user_bde == NULL) { + return -ENODEV; + } + + init_waitqueue_head(&_ether_interrupt_wq); + + lkbde_get_dma_info(&cpu_pbase, &dma_pbase, &dmasize); + + memset(&_dma_pool, 0, sizeof(_dma_pool)); + _dma_pool.cpu_pbase = cpu_pbase; + _dma_pool.dma_pbase = dma_pbase; + _dma_pool.total_size = dmasize / ONE_MB; + + memset(_devices, 0, sizeof(_devices)); + + /* Use _bde_inst_resource[0] as the default resource */ + memset(_bde_inst_resource, 0, sizeof(_bde_inst_resource)); + res = &_bde_inst_resource[0]; + res->dma_offset = 0; + res->dma_size = _dma_pool.total_size; + init_waitqueue_head(&res->intr_wq); + atomic_set(&res->intr, 0); + + ihost_intr_enable_base = NULL; + ihost_intr_status_base = NULL; + + for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { + res->inst_id |= (1 << i); + _devices_init(i); + } + + return 0; +} + +/* + * Function: _cleanup + * + * Purpose: + * Module cleanup function. + * Parameters: + * None + * Returns: + * Always 0 + */ +static int +_cleanup(void) +{ + int i; + + if (user_bde) { + for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { + if (_devices[i].enabled && + BDE_DEV_MEM_MAPPED(_devices[i].dev_type)) { + user_bde->interrupt_disconnect(i); + } + lkbde_dev_instid_set(i, 0); + } + linux_bde_destroy(user_bde); + user_bde = NULL; + } + + if (ihost_intr_enable_base) { + iounmap(ihost_intr_enable_base); + ihost_intr_enable_base = NULL; + } + if (ihost_intr_status_base) { + iounmap(ihost_intr_status_base); + ihost_intr_status_base = NULL; + } + + return 0; +} + +/* + * Function: _pprint + * + * Purpose: + * Print proc filesystem information. + * Parameters: + * None + * Returns: + * Always 0 + */ +static int +_pprint(void) +{ + int idx; + const char *name; + bde_inst_resource_t *res; + uint32 state, instid; + + pprintf("Broadcom Device Enumerator (%s)\n", LINUX_USER_BDE_NAME); + for (idx = 0; idx < user_bde->num_devices(BDE_ALL_DEVICES); idx++) { + name = _intr_mode_str(_devices[idx].isr); + if (name == NULL) { + name = "unknown"; + } + pprintf("\t%d: Interrupt mode %s ",idx, name); + (void)lkbde_dev_state_get(idx, &state); + if (state == BDE_DEV_STATE_REMOVED) { + pprintf(" Device REMOVED ! \n"); + } else { + (void)lkbde_dev_instid_get(idx, &instid); + if (instid) { + pprintf("Inst id 0x%x\n",instid); + } else { + pprintf("\n"); + } + } + } + pprintf("Instance resource \n"); + + for (idx = 0; idx < user_bde->num_devices(BDE_ALL_DEVICES); idx++) { + res = &_bde_inst_resource[idx]; + if (res->inst_id) { + pprintf("\tDev mask 0x%x : " + "DMA offset %d size %d MB\n", + res->inst_id, + res->dma_offset, + res->dma_size); + } + } + + return 0; +} + +/* + * Allocate the DMA resource from DMA pool + * Parameter : + * dma_size (IN): allocate dma_size in MB + * dma_offset (OUT): dma offset in MB + */ +static int +_dma_resource_alloc(unsigned int dma_size, unsigned int *dma_offset) +{ + uint32 left; + + left = _dma_pool.total_size - _dma_pool.offset; + if (dma_size > left) { + gprintk("ERROR: Run out the dma resource!\n"); + return -1; + } + *dma_offset = _dma_pool.offset; + _dma_pool.offset += dma_size; + return 0; +} + +static int +_dma_resource_get(int inst_id, phys_addr_t *cpu_pbase, phys_addr_t *dma_pbase, ssize_t* size) +{ + int i; + unsigned int dma_size = 0, dma_offset = 0; + bde_inst_resource_t *res; + + for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { + res = &_bde_inst_resource[i]; + if (res->inst_id == inst_id) { + dma_size = res->dma_size; + dma_offset = res->dma_offset; + break; + } + } + + *cpu_pbase = _dma_pool.cpu_pbase + dma_offset * ONE_MB; + *dma_pbase = _dma_pool.dma_pbase + dma_offset * ONE_MB; + *size = dma_size * ONE_MB; + + return 0; +} + +static int +_instance_validate(unsigned int inst_id, unsigned int dmasize) +{ + int i; + bde_inst_resource_t *res; + + for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { + res = &_bde_inst_resource[i]; + if (res->inst_id == inst_id) { + if (res->dma_size != dmasize) { + if(_devices[i].inst == 0){ + /* Skip _instance_validate (not init yet) */ + return LUBDE_SUCCESS; + } + gprintk("ERROR: dma_size mismatch\n"); + return LUBDE_FAIL; + } + return (1); + } + } + return LUBDE_SUCCESS; +} + +static int +_device_reprobe(void) +{ + int i; + + for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { + if (_devices[i].devid == 0) { + _devices_init(i); + } + } + return 0; +} + +static int +_instance_attach(unsigned int inst_id, unsigned int dma_size) +{ + unsigned int dma_offset; + int i, exist; + bde_inst_resource_t *res; + int inst_idx = -1; + uint32 instid; + + /* Reprobe the system for hot-plugged device */ + _device_reprobe(); + + /* Validate the resource with inst_id */ + exist = _instance_validate(inst_id, dma_size); + if (exist < 0) { + return LUBDE_FAIL; + } + if (exist > 0) { + return LUBDE_SUCCESS; + } + if (_dma_resource_alloc(dma_size, &dma_offset) < 0) { + return LUBDE_FAIL; + } + for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { + res = &_bde_inst_resource[i]; + if ((_bde_multi_inst == 0) || (res->inst_id == 0)) { + res->inst_id = inst_id; + res->dma_offset = dma_offset; + res->dma_size = dma_size; + _bde_multi_inst++; + inst_idx = i; + init_waitqueue_head(&res->intr_wq); + atomic_set(&res->intr, 0); + break; + } + } + + for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { + if (inst_id & (1 << i)) { + _devices[i].inst = inst_idx; + /* Pass the instid to the kernel BDE */ + if (lkbde_dev_instid_get(i, &instid) == 0) { + if (!instid) { + lkbde_dev_instid_set(i, inst_id); + } + } + } + } + + return LUBDE_SUCCESS; +} + +/* + * Function: _ioctl + * + * Purpose: + * Handle IOCTL commands from user mode. + * Parameters: + * cmd - IOCTL cmd + * arg - IOCTL parameters + * Returns: + * 0 on success, <0 on error + */ +static int +_ioctl(unsigned int cmd, unsigned long arg) +{ + lubde_ioctl_t io; + phys_addr_t cpu_pbase, dma_pbase; + ssize_t size; + const ibde_dev_t *bde_dev; + int inst_id; + bde_inst_resource_t *res; + uint32_t *mapaddr; + + if (copy_from_user(&io, (void *)arg, sizeof(io))) { + return -EFAULT; + } + + io.rc = LUBDE_SUCCESS; + + switch(cmd) { + case LUBDE_VERSION: + io.d0 = KBDE_VERSION; + break; + case LUBDE_GET_NUM_DEVICES: + io.d0 = user_bde->num_devices(io.dev); + break; + case LUBDE_GET_DEVICE: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + bde_dev = user_bde->get_dev(io.dev); + if (bde_dev) { + io.d0 = bde_dev->device; + io.d1 = bde_dev->rev; + if (BDE_DEV_MEM_MAPPED(_devices[io.dev].dev_type)) { + /* Get physical address to map */ + io.d2 = lkbde_get_dev_phys(io.dev); + io.d3 = lkbde_get_dev_phys_hi(io.dev); + } + } else { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_GET_DEVICE_TYPE: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + io.d0 = _devices[io.dev].dev_type; + break; + case LUBDE_GET_BUS_FEATURES: + user_bde->pci_bus_features(io.dev, (int *) &io.d0, (int *) &io.d1, + (int *) &io.d2); + break; + case LUBDE_PCI_CONFIG_PUT32: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + if (_devices[io.dev].dev_type & BDE_PCI_DEV_TYPE) { + user_bde->pci_conf_write(io.dev, io.d0, io.d1); + } else { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_PCI_CONFIG_GET32: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + if (_devices[io.dev].dev_type & BDE_PCI_DEV_TYPE) { + io.d0 = user_bde->pci_conf_read(io.dev, io.d0); + } else { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_GET_DMA_INFO: + inst_id = io.dev; + if (_bde_multi_inst){ + _dma_resource_get(inst_id, &cpu_pbase, &dma_pbase, &size); + } else { + lkbde_get_dma_info(&cpu_pbase, &dma_pbase, &size); + } + io.d0 = dma_pbase; + io.d1 = size; + /* Optionally enable DMA mmap via /dev/linux-kernel-bde */ + io.d2 = USE_LINUX_BDE_MMAP; + /* Get physical address for mmap */ + io.dx.dw[0] = cpu_pbase; +#ifdef PHYS_ADDRS_ARE_64BITS + io.dx.dw[1] = cpu_pbase >> 32; +#else + io.dx.dw[1] = 0; +#endif + break; + case LUBDE_ENABLE_INTERRUPTS: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + if (_devices[io.dev].dev_type & BDE_SWITCH_DEV_TYPE) { + if (_devices[io.dev].isr && !_devices[io.dev].enabled) { + bde_ctrl_t *ctrl; + ctrl = &_devices[io.dev]; + if ((ctrl->isr == (isr_f)_cmicx_interrupt) && + (ctrl->dev_type & BDE_PCI_DEV_TYPE)) { + /* Set MSI mode to SW clear vs auto clear */ + WRITE_INTC_INTR(io.dev, ctrl->intr_regs.intc_intr_clear_mode_0, 0x0); + WRITE_INTC_INTR(io.dev, ctrl->intr_regs.intc_intr_clear_mode_1, 0x0); + } + user_bde->interrupt_connect(io.dev, + _devices[io.dev].isr, + _devices+io.dev); + _devices[io.dev].enabled = 1; + } + } else { + /* Process ethernet device interrupt */ + + if (!_devices[io.dev].enabled) { + user_bde->interrupt_connect(io.dev, + (void(*)(void *))_ether_interrupt, + _devices+io.dev); + _devices[io.dev].enabled = 1; + } + } + break; + case LUBDE_DISABLE_INTERRUPTS: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + if (_devices[io.dev].enabled) { + user_bde->interrupt_disconnect(io.dev); + _devices[io.dev].enabled = 0; + } + break; + case LUBDE_WAIT_FOR_INTERRUPT: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + if (_devices[io.dev].dev_type & BDE_SWITCH_DEV_TYPE) { + res = &_bde_inst_resource[_devices[io.dev].inst]; +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wait_event_timeout(res->intr_wq, + atomic_read(&res->intr) != 0, 100); + +#else + wait_event_interruptible(res->intr_wq, + atomic_read(&res->intr) != 0); +#endif + /* + * Even if we get multiple interrupts, we + * only run the interrupt handler once. + */ + atomic_set(&res->intr, 0); + } else { +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wait_event_timeout(_ether_interrupt_wq, + atomic_read(&_ether_interrupt_has_taken_place) != 0, 100); +#else + wait_event_interruptible(_ether_interrupt_wq, + atomic_read(&_ether_interrupt_has_taken_place) != 0); +#endif + /* + * Even if we get multiple interrupts, we + * only run the interrupt handler once. + */ + atomic_set(&_ether_interrupt_has_taken_place, 0); + } + break; + case LUBDE_USLEEP: + case LUBDE_UDELAY: + case LUBDE_SEM_OP: + return -EINVAL; + case LUBDE_WRITE_IRQ_MASK: + io.rc = lkbde_irq_mask_set(io.dev, io.d0, io.d1, 0); + break; + case LUBDE_SPI_READ_REG: + if (user_bde->spi_read(io.dev, io.d0, io.dx.buf, io.d1) == -1) { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_SPI_WRITE_REG: + if (user_bde->spi_write(io.dev, io.d0, io.dx.buf, io.d1) == -1) { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_READ_REG_16BIT_BUS: + io.d1 = user_bde->read(io.dev, io.d0); + break; + case LUBDE_WRITE_REG_16BIT_BUS: + io.rc = user_bde->write(io.dev, io.d0, io.d1); + break; +#ifdef BCM_SAND_SUPPORT + case LUBDE_CPU_WRITE_REG: + { + if (lkbde_cpu_write(io.dev, io.d0, (uint32*)io.dx.buf) == -1) { + io.rc = LUBDE_FAIL; + } + break; + } + case LUBDE_CPU_READ_REG: + { + if (lkbde_cpu_read(io.dev, io.d0, (uint32*)io.dx.buf) == -1) { + io.rc = LUBDE_FAIL; + } + break; + } + case LUBDE_CPU_PCI_REGISTER: + { + if (lkbde_cpu_pci_register(io.dev) == -1) { + io.rc = LUBDE_FAIL; + } + break; + } +#endif + case LUBDE_DEV_RESOURCE: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + bde_dev = user_bde->get_dev(io.dev); + if (bde_dev) { + if (BDE_DEV_MEM_MAPPED(_devices[io.dev].dev_type)) { + /* Get physical address to map */ + io.rc = lkbde_get_dev_resource(io.dev, io.d0, + &io.d1, &io.d2, &io.d3); + } + } else { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_IPROC_READ_REG: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + if (_devices[io.dev].dev_type & BDE_AXI_DEV_TYPE) { + mapaddr = IOREMAP(io.d0, sizeof(uint32_t)); + if (mapaddr == NULL) { + io.rc = LUBDE_FAIL; + return -1; + } + io.d1 = readl(mapaddr); + iounmap(mapaddr); + } else { + io.d1 = user_bde->iproc_read(io.dev, io.d0); + if (io.d1 == -1) { + io.rc = LUBDE_FAIL; + } + } + break; + case LUBDE_IPROC_WRITE_REG: + if (user_bde->iproc_write(io.dev, io.d0, io.d1) == -1) { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_ATTACH_INSTANCE: + io.rc = _instance_attach(io.d0, io.d1); + break; + case LUBDE_GET_DEVICE_STATE: + io.rc = lkbde_dev_state_get(io.dev, &io.d0); + break; + case LUBDE_REPROBE: + io.rc = _device_reprobe(); + break; + default: + gprintk("Error: Invalid ioctl (%08x)\n", cmd); + io.rc = LUBDE_FAIL; + break; + } + + if (copy_to_user((void *)arg, &io, sizeof(io))) { + return -EFAULT; + } + + return 0; +} + +/* Workaround for broken Busybox/PPC insmod */ +static char _modname[] = LINUX_USER_BDE_NAME; + +static gmodule_t _gmodule = +{ + name: LINUX_USER_BDE_NAME, + major: LINUX_USER_BDE_MAJOR, + init: _init, + cleanup: _cleanup, + pprint: _pprint, + ioctl: _ioctl, +}; + +gmodule_t* +gmodule_get(void) +{ + _gmodule.name = _modname; + return &_gmodule; +} diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/user/kernel/linux-user-bde.h b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/user/kernel/linux-user-bde.h new file mode 100755 index 00000000000..ac3af60042c --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/linux/user/kernel/linux-user-bde.h @@ -0,0 +1,99 @@ +/* + * $Id: linux-user-bde.h,v 1.23 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + */ + +#ifndef __LINUX_USER_BDE_H__ +#define __LINUX_USER_BDE_H__ + +#include +#include +#include +#ifndef __KERNEL__ +#include +#endif + +#if defined(SAL_BDE_32BIT_USER_64BIT_KERNEL) || defined(PTRS_ARE_64BITS) +typedef uint64_t bde_kernel_addr_t; +#else +typedef uint32_t bde_kernel_addr_t; +#endif + +/* Ioctl control structure */ +typedef struct { + unsigned int dev; /* Device ID */ + unsigned int rc; /* Operation Return Code */ + unsigned int d0; /* Operation specific data */ + unsigned int d1; + unsigned int d2; + unsigned int d3; + bde_kernel_addr_t p0; + union { + unsigned int dw[2]; + unsigned char buf[64]; + } dx; +} lubde_ioctl_t; + + +/* LUBDE ioctls */ +#define LUBDE_MAGIC 'L' + +#define LUBDE_VERSION _IO(LUBDE_MAGIC, 0) +#define LUBDE_GET_NUM_DEVICES _IO(LUBDE_MAGIC, 1) +#define LUBDE_GET_DEVICE _IO(LUBDE_MAGIC, 2) +#define LUBDE_PCI_CONFIG_PUT32 _IO(LUBDE_MAGIC, 3) +#define LUBDE_PCI_CONFIG_GET32 _IO(LUBDE_MAGIC, 4) +#define LUBDE_GET_DMA_INFO _IO(LUBDE_MAGIC, 5) +#define LUBDE_ENABLE_INTERRUPTS _IO(LUBDE_MAGIC, 6) +#define LUBDE_DISABLE_INTERRUPTS _IO(LUBDE_MAGIC, 7) +#define LUBDE_USLEEP _IO(LUBDE_MAGIC, 8) +#define LUBDE_WAIT_FOR_INTERRUPT _IO(LUBDE_MAGIC, 9) +#define LUBDE_SEM_OP _IO(LUBDE_MAGIC, 10) +#define LUBDE_UDELAY _IO(LUBDE_MAGIC, 11) +#define LUBDE_GET_DEVICE_TYPE _IO(LUBDE_MAGIC, 12) +#define LUBDE_SPI_READ_REG _IO(LUBDE_MAGIC, 13) +#define LUBDE_SPI_WRITE_REG _IO(LUBDE_MAGIC, 14) +#define LUBDE_READ_REG_16BIT_BUS _IO(LUBDE_MAGIC, 19) +#define LUBDE_WRITE_REG_16BIT_BUS _IO(LUBDE_MAGIC, 20) +#define LUBDE_GET_BUS_FEATURES _IO(LUBDE_MAGIC, 21) +#define LUBDE_WRITE_IRQ_MASK _IO(LUBDE_MAGIC, 22) +#define LUBDE_CPU_WRITE_REG _IO(LUBDE_MAGIC, 23) +#define LUBDE_CPU_READ_REG _IO(LUBDE_MAGIC, 24) +#define LUBDE_CPU_PCI_REGISTER _IO(LUBDE_MAGIC, 25) +#define LUBDE_DEV_RESOURCE _IO(LUBDE_MAGIC, 26) +#define LUBDE_IPROC_READ_REG _IO(LUBDE_MAGIC, 27) +#define LUBDE_IPROC_WRITE_REG _IO(LUBDE_MAGIC, 28) +#define LUBDE_ATTACH_INSTANCE _IO(LUBDE_MAGIC, 29) +#define LUBDE_GET_DEVICE_STATE _IO(LUBDE_MAGIC, 30) +#define LUBDE_REPROBE _IO(LUBDE_MAGIC, 31) + +#define LUBDE_SEM_OP_CREATE 1 +#define LUBDE_SEM_OP_DESTROY 2 +#define LUBDE_SEM_OP_TAKE 3 +#define LUBDE_SEM_OP_GIVE 4 + +#define LUBDE_SUCCESS 0 +#define LUBDE_FAIL ((unsigned int)-1) + + +/* + * Version history + * 1: add LUBDE_GET_DEVICE_STATE to support PCI hot plug + * 2: add LUBDE_REPROBE to support reprobe available devices + */ +#define KBDE_VERSION 2 + + +/* This is the signal that will be used + * when an interrupt occurs + */ + +#ifndef __KERNEL__ +#include +#endif + +#define LUBDE_INTERRUPT_SIGNAL SIGUSR1 +#define LUBDE_ETHER_INTERRUPT_SIGNAL SIGUSR2 + +#endif /* __LUBDE_H__ */ diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/include/shbde.h b/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/include/shbde.h new file mode 100644 index 00000000000..2dfd0215f52 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/include/shbde.h @@ -0,0 +1,61 @@ +/* + * $Id: $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + */ + +#ifndef __SHBDE_H__ +#define __SHBDE_H__ + +typedef void (*shbde_log_func_t)(int level, const char *str, int param); + +#define SHBDE_ERR 0 +#define SHBDE_WARN 1 +#define SHBDE_DBG 2 + +/* iProc configuration (primarily used for PCI-AXI bridge) */ +typedef struct shbde_iproc_config_s { + unsigned int dev_id; + unsigned int dev_rev; + unsigned int use_msi; + unsigned int iproc_ver; + unsigned int cmic_ver; + unsigned int cmic_rev; + unsigned int dma_hi_bits; + unsigned int mdio_base_addr; + unsigned int pcie_phy_addr; + unsigned int adjust_pcie_preemphasis; +} shbde_iproc_config_t; + +/* Hardware abstraction functions */ +typedef struct shbde_hal_s { + + /* Optional log output interface */ + shbde_log_func_t log_func; + + /* PCI configuration access */ + unsigned char (*pcic8_read)(void *pci_dev, unsigned int reg); + void (*pcic8_write)(void *pci_dev, unsigned int reg, unsigned char data); + unsigned short (*pcic16_read)(void *pci_dev, unsigned int reg); + void (*pcic16_write)(void *pci_dev, unsigned int reg, unsigned short data); + unsigned int (*pcic32_read)(void *pci_dev, unsigned int reg); + void (*pcic32_write)(void *pci_dev, unsigned int reg, unsigned int data); + + /* iProc register access */ + unsigned int (*io32_read)(void *addr); + void (*io32_write)(void *addr, unsigned int); + + /* usleep function (optional) */ + void (*usleep)(int usec); + + /* PCI parent device access */ + void *(*pci_parent_device_get)(void *pci_dev); + + /* iProc configuration */ + shbde_iproc_config_t icfg; + +} shbde_hal_t; + + +#endif /* __SHBDE_H__ */ diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/include/shbde_iproc.h b/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/include/shbde_iproc.h new file mode 100644 index 00000000000..589d6ba894f --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/include/shbde_iproc.h @@ -0,0 +1,33 @@ +/* + * $Id: $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + */ + +#ifndef __SHBDE_IPROC_H__ +#define __SHBDE_IPROC_H__ + +#include + +extern int +shbde_iproc_config_init(shbde_iproc_config_t *icfg, + unsigned int dev_id, unsigned int dev_rev); + +extern int +shbde_iproc_paxb_init(shbde_hal_t *shbde, void *iproc_regs, + shbde_iproc_config_t *icfg); + +extern unsigned int +shbde_iproc_pci_read(shbde_hal_t *shbde, void *iproc_regs, + unsigned int addr); + +extern void +shbde_iproc_pci_write(shbde_hal_t *shbde, void *iproc_regs, + unsigned int addr, unsigned int data); + +extern int +shbde_iproc_pcie_preemphasis_set(shbde_hal_t *shbde, void *iproc_regs, + shbde_iproc_config_t *icfg, void *pci_dev); + +#endif /* __SHBDE_IPROC_H__ */ diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/include/shbde_mdio.h b/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/include/shbde_mdio.h new file mode 100644 index 00000000000..e0d3e3b389d --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/include/shbde_mdio.h @@ -0,0 +1,44 @@ +/* + * $Id: $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + */ + +#ifndef __SHBDE_MDIO_H__ +#define __SHBDE_MDIO_H__ + +#include + +typedef struct shbde_mdio_ctrl_s { + + /* Primary HAL*/ + shbde_hal_t *shbde; + + /* Context for iProc MDIO register access */ + void *regs; + + /* Base address for MDIO registers */ + unsigned int base_addr; + + /* iProc MDIO register access */ + unsigned int (*io32_read)(shbde_hal_t *shbde, void *iproc_regs, + unsigned int addr); + void (*io32_write)(shbde_hal_t *shbde, void *iproc_regs, + unsigned int addr, unsigned int data); + +} shbde_mdio_ctrl_t; + + +extern int +shbde_iproc_mdio_init(shbde_mdio_ctrl_t *smc); + +extern int +shbde_iproc_mdio_read(shbde_mdio_ctrl_t *smc, unsigned int phy_addr, + unsigned int reg, unsigned int *val); + +extern int +shbde_iproc_mdio_write(shbde_mdio_ctrl_t *smc, unsigned int phy_addr, + unsigned int reg, unsigned int val); + +#endif /* __SHBDE_MDIO_H__ */ diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/include/shbde_pci.h b/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/include/shbde_pci.h new file mode 100644 index 00000000000..8a03b8764e2 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/include/shbde_pci.h @@ -0,0 +1,31 @@ +/* + * $Id: $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + */ + +#ifndef __SHBDE_PCI_H__ +#define __SHBDE_PCI_H__ + +#include + +extern unsigned int +shbde_pci_pcie_cap(shbde_hal_t *shbde, void *pci_dev); + +extern int +shbde_pci_is_pcie(shbde_hal_t *shbde, void *pci_dev); + +extern int +shbde_pci_is_iproc(shbde_hal_t *shbde, void *pci_dev, int *cmic_bar); + +extern int +shbde_pci_max_payload_set(shbde_hal_t *shbde, void *pci_dev, int maxpayload); + +extern int +shbde_pci_iproc_version_get(shbde_hal_t *shbde, void *pci_dev, + unsigned int *iproc_ver, + unsigned int *cmic_ver, + unsigned int *cmic_rev); + +#endif /* __SHBDE_PCI_H__ */ diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/shbde_iproc.c b/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/shbde_iproc.c new file mode 100644 index 00000000000..479397e5bba --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/shbde_iproc.c @@ -0,0 +1,487 @@ +/* + * $Id: $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + */ + +#include +#include +#include + +/* PAXB register offsets within PCI BAR0 window */ +#define BAR0_PAXB_ENDIANESS 0x2030 +#define BAR0_PAXB_PCIE_EP_AXI_CONFIG 0x2104 +#define BAR0_PAXB_CONFIG_IND_ADDR 0x2120 +#define BAR0_PAXB_CONFIG_IND_DATA 0x2124 + +#define PAXB_0_CMICD_TO_PCIE_INTR_EN 0x2380 + +#define BAR0_PAXB_IMAP0_0 (0x2c00) +#define BAR0_PAXB_IMAP0_1 (0x2c04) +#define BAR0_PAXB_IMAP0_2 (0x2c08) +#define BAR0_PAXB_IMAP0_7 (0x2c1c) + +#define BAR0_PAXB_OARR_FUNC0_MSI_PAGE 0x2d34 +#define BAR0_PAXB_OARR_2 0x2d60 +#define BAR0_PAXB_OARR_2_UPPER 0x2d64 +#define BAR0_DMU_PCU_PCIE_SLAVE_RESET_MODE 0x7024 + +#define PAXB_0_FUNC0_IMAP1_3 0x2d88 + +/* Force byte pointer for offset adjustments */ +#define ROFFS(_ptr, _offset) ((unsigned char*)(_ptr) + (_offset)) + +#define PAXB_CONFIG_IND_ADDRr_PROTOCOL_LAYERf_SHFT 11 +#define PAXB_CONFIG_IND_ADDRr_PROTOCOL_LAYERf_MASK 0x3 +#define PAXB_CONFIG_IND_ADDRr_ADDRESSf_SHFT 0 +#define PAXB_CONFIG_IND_ADDRr_ADDRESSf_MASK 0x7ff +#define PAXB_0_FUNC0_IMAP1_3_ADDR_SHIFT 20 + +/* Register value set/get by field */ +#define REG_FIELD_SET(_r, _f, _r_val, _f_val) \ + _r_val = ((_r_val) & ~(_r##_##_f##_MASK << _r##_##_f##_SHFT)) | \ + (((_f_val) & _r##_##_f##_MASK) << _r##_##_f##_SHFT) +#define REG_FIELD_GET(_r, _f, _r_val) \ + (((_r_val) >> _r##_##_f##_SHFT) & _r##_##_f##_MASK) + +/* PCIe capabilities definition */ +#ifndef PCI_EXP_LNKSTA +#define PCI_EXP_LNKSTA 0x12 +#endif +/* Current Link Speed 5.0GT/s */ +#ifndef PCI_EXP_LNKSTA_CLS_5_0GB +#define PCI_EXP_LNKSTA_CLS_5_0GB 2 +#endif +#ifndef PCI_EXP_LNKSTA2 +#define PCI_EXP_LNKSTA2 0x32 +#endif +/* Current Deemphasis Level -3.5 dB */ +#ifndef PCI_EXP_LNKSTA2_CDL_3_5DB +#define PCI_EXP_LNKSTA2_CDL_3_5DB 0x1 +#endif + +static unsigned int +iproc32_read(shbde_hal_t *shbde, void *addr) +{ + if (!shbde || !shbde->io32_read) { + return 0; + } + return shbde->io32_read(addr); +} + +static void +iproc32_write(shbde_hal_t *shbde, void *addr, unsigned int data) +{ + if (!shbde || !shbde->io32_write) { + return; + } + shbde->io32_write(addr, data); +} + +static void +wait_usec(shbde_hal_t *shbde, int usec) +{ + if (shbde && shbde->usleep) { + shbde->usleep(usec); + } else { + int idx; + volatile int count; + for (idx = 0; idx < usec; idx++) { + for (count = 0; count < 100; count++); + } + } +} + +/* + * Function: + * shbde_iproc_config_init + * Purpose: + * Initialize iProc configuration parameters + * Parameters: + * icfg - pointer to empty iProc configuration structure + * Returns: + * -1 if error, otherwise 0 + */ +int +shbde_iproc_config_init(shbde_iproc_config_t *icfg, + unsigned int dev_id, unsigned int dev_rev) +{ + if (!icfg) { + return -1; + } + + /* Save device ID and revision */ + icfg->dev_id = dev_id; + icfg->dev_rev = dev_rev; + + /* Check device families first */ + switch (icfg->dev_id & 0xfff0) { + case 0x8400: /* Greyhound Lite */ + case 0x8410: /* Greyhound */ + case 0x8420: /* Bloodhound */ + case 0x8450: /* Elkhound */ + case 0xb060: /* Ranger2(Greyhound) */ + case 0x8360: /* Greyhound 53365 & 53369 */ + case 0xb260: /* saber2 */ + case 0xb460: /* saber2+ */ + case 0xb170: /* Hurricane3-MG */ + case 0x8570: /* Greyhound2 */ + case 0xb070: /* Greyhound2(emulation) */ + case 0x8580: /* Greyhound2(emulation) */ + case 0xb230: /* Dagger2 */ + icfg->iproc_ver = 7; + icfg->dma_hi_bits = 0x2; + break; + case 0xb560: /* Apache */ + case 0xb670: /* MO */ + case 0xb760: /* Maverick */ + icfg->iproc_ver = 0xB; + break; + case 0xb160: /* Hurricane3 */ + case 0x8440: /* Buckhound2 */ + case 0x8430: /* Foxhound2 */ + case 0x8540: /* Wolfhound2 */ + icfg->iproc_ver = 10; + icfg->dma_hi_bits = 0x2; + break; + default: + break; + } + + /* Check for exceptions */ + switch (icfg->dev_id) { + case 0xb069: + case 0xb068: + icfg->iproc_ver = 0xB; /*Ranger2+ Apache Family */ + icfg->dma_hi_bits = 0; + break; + case 0xb168: /* Ranger3+ */ + case 0xb169: + icfg->iproc_ver = 0; + icfg->dma_hi_bits = 0; + break; + default: + break; + } + /* Check for PCIe PHY address that needs PCIe preemphasis and + * assign the MDIO base address + */ + switch (icfg->dev_id & 0xfff0) { + case 0xb150: /* Hurricane2 */ + case 0x8340: /* Wolfhound */ + case 0x8330: /* Foxhound */ + case 0x8390: /* Dearhound */ + icfg->mdio_base_addr = 0x18032000; + icfg->pcie_phy_addr = 0x2; + break; + case 0xb340: /* Helilx4 */ + case 0xb540: /* FireScout */ + case 0xb040: /* Spiral, Ranger */ + icfg->mdio_base_addr = 0x18032000; + icfg->pcie_phy_addr = 0x5; + icfg->adjust_pcie_preemphasis = 1; + break; + case 0xa450: /* Katana2 */ + case 0xb240: + case 0xb450: + icfg->mdio_base_addr = 0x18032000; + icfg->pcie_phy_addr = 0x5; + icfg->adjust_pcie_preemphasis = 1; + break; + default: + break; + } + + /* Check for exceptions */ + switch (icfg->dev_id) { + default: + break; + } + + return 0; +} + +/* + * Function: + * shbde_iproc_paxb_init + * Purpose: + * Initialize iProc PCI-AXI bridge for CMIC access + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * iproc_regs - memory mapped iProc registers in PCI BAR + * icfg - iProc configuration parameters + * Returns: + * -1 if error, otherwise 0 + */ +int +shbde_iproc_paxb_init(shbde_hal_t *shbde, void *iproc_regs, + shbde_iproc_config_t *icfg) +{ + void *reg; + unsigned int data; + int pci_num; + + if (!iproc_regs || !icfg) { + return -1; + } + + /* + * The following code attempts to auto-detect the correct + * iProc PCI endianess configuration by reading a well-known + * register (the endianess configuration register itself). + * Note that the PCI endianess may be different for different + * big endian host processors. + */ + reg = ROFFS(iproc_regs, BAR0_PAXB_ENDIANESS); + /* Select big endian */ + iproc32_write(shbde, reg, 0x01010101); + /* Check if endianess register itself is correct endian */ + if (iproc32_read(shbde, reg) != 1) { + /* If not, then assume little endian */ + iproc32_write(shbde, reg, 0x0); + } + + /* Select which PCI core to use */ + pci_num = 0; + reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_2); + data = iproc32_read(shbde, reg); + if (data & 0x1000) { + /* PAXB_1 is mapped to sub-window 2 */ + pci_num = 1; + } + + /* Default DMA mapping if uninitialized */ + if (icfg->dma_hi_bits == 0) { + icfg->dma_hi_bits = 0x1; + if (pci_num == 1) { + icfg->dma_hi_bits = 0x2; + } + } + + /* Enable iProc DMA to external host memory */ + reg = ROFFS(iproc_regs, BAR0_PAXB_PCIE_EP_AXI_CONFIG); + iproc32_write(shbde, reg, 0x0); + if(icfg->cmic_ver < 4) { /* Non-CMICX */ + reg = ROFFS(iproc_regs, BAR0_PAXB_OARR_2); + iproc32_write(shbde, reg, 0x1); + reg = ROFFS(iproc_regs, BAR0_PAXB_OARR_2_UPPER); + iproc32_write(shbde, reg, icfg->dma_hi_bits); + /* Configure MSI interrupt page */ + if (icfg->use_msi) { + reg = ROFFS(iproc_regs, BAR0_PAXB_OARR_FUNC0_MSI_PAGE); + data = iproc32_read(shbde, reg); + iproc32_write(shbde, reg, data | 0x1); + } + } + + /* Configure MSIX interrupt page, only need for iproc ver == 0x10 */ + if ((icfg->use_msi == 2) && (icfg->iproc_ver == 0x10)) { + unsigned int mask = (0x1 << PAXB_0_FUNC0_IMAP1_3_ADDR_SHIFT) - 1; + reg = ROFFS(iproc_regs, PAXB_0_FUNC0_IMAP1_3); + data = iproc32_read(shbde, reg); + data &= mask; + data |= 0x410 << PAXB_0_FUNC0_IMAP1_3_ADDR_SHIFT; + iproc32_write(shbde, reg, data); + } + + /* Disable INTx interrupt if MSI/MSIX is selected */ + reg = ROFFS(iproc_regs, PAXB_0_CMICD_TO_PCIE_INTR_EN); + data = iproc32_read(shbde, reg); + if (icfg->use_msi) { + data &= ~0x1; + } else { + data |= 0x1; + } + iproc32_write(shbde, reg, data); + + return pci_num; +} + +/* + * Function: + * shbde_iproc_pci_read + * Purpose: + * Read iProc register through PCI BAR 0 + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * iproc_regs - memory mapped iProc registers in PCI BAR + * addr - iProc register address in AXI memory space + * Returns: + * Register value + */ +unsigned int +shbde_iproc_pci_read(shbde_hal_t *shbde, void *iproc_regs, + unsigned int addr) +{ + unsigned int subwin_base; + void *reg; + shbde_iproc_config_t *icfg = &shbde->icfg; + + if (!iproc_regs) { + return -1; + } + + /* Sub-window size is 0x1000 (4K) */ + subwin_base = (addr & ~0xfff); + + if((icfg->cmic_ver >= 4) && + ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) { + /* Route the PAXB register through IMAP0_2 */ + reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff)); + } else if((icfg->cmic_ver >= 4) && + ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) { + /* Route the INTC block access through IMAP0_6 */ + reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + } else { + /* Update base address for sub-window 7 */ + subwin_base |= 1; /* Valid bit */ + reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_7); + iproc32_write(shbde, reg, subwin_base); + /* Read it to make sure the write actually goes through */ + subwin_base = iproc32_read(shbde, reg); + + /* Read register through sub-window 7 */ + reg = ROFFS(iproc_regs, 0x7000 + (addr & 0xfff)); + } + + return iproc32_read(shbde, reg); +} + +/* + * Function: + * shbde_iproc_pci_write + * Purpose: + * Write iProc register through PCI BAR 0 + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * iproc_regs - memory mapped iProc registers in PCI BAR + * addr - iProc register address in AXI memory space + * data - data to write to iProc register + * Returns: + * Register value + */ +void +shbde_iproc_pci_write(shbde_hal_t *shbde, void *iproc_regs, + unsigned int addr, unsigned int data) +{ + unsigned int subwin_base; + void *reg; + shbde_iproc_config_t *icfg = &shbde->icfg; + + if (!iproc_regs) { + return; + } + + /* Sub-window size is 0x1000 (4K) */ + subwin_base = (addr & ~0xfff); + + if((icfg->cmic_ver >= 4) && + ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) { + /* Route the PAXB register through IMAP0_2 */ + reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff)); + } else if((icfg->cmic_ver >= 4) && + ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) { + /* Route the INTC block access through IMAP0_6 */ + reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + } else { + /* Update base address for sub-window 7 */ + subwin_base |= 1; /* Valid bit */ + reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_7); + iproc32_write(shbde, reg, subwin_base); + /* Read it to make sure the write actually goes through */ + subwin_base = iproc32_read(shbde, reg); + + /* Read register through sub-window 7 */ + reg = ROFFS(iproc_regs, 0x7000 + (addr & 0xfff)); + } + + iproc32_write(shbde, reg, data); +} + +int +shbde_iproc_pcie_preemphasis_set(shbde_hal_t *shbde, void *iproc_regs, + shbde_iproc_config_t *icfg, void *pci_dev) +{ + shbde_mdio_ctrl_t mdio_ctrl, *smc = &mdio_ctrl; + unsigned int phy_addr, data; + void *reg; + unsigned int pcie_cap_base; + unsigned short link_stat, link_stat2; + + if (!icfg) { + return -1; + } + + /* PHY address for PCIe link */ + phy_addr = icfg->pcie_phy_addr; + if (phy_addr == 0 || icfg->mdio_base_addr == 0) { + return 0; + } + + /* Initialize MDIO control */ + smc->shbde = shbde; + smc->regs = iproc_regs; + smc->base_addr = icfg->mdio_base_addr; + smc->io32_read = shbde_iproc_pci_read; + smc->io32_write = shbde_iproc_pci_write; + shbde_iproc_mdio_init(smc); + + /* PCIe SerDes Gen1/Gen2 CDR Track Bandwidth Adjustment + * for Better Jitter Tolerance + */ + shbde_iproc_mdio_write(smc, phy_addr, 0x1f, 0x8630); + shbde_iproc_mdio_write(smc, phy_addr, 0x13, 0x190); + shbde_iproc_mdio_write(smc, phy_addr, 0x19, 0x191); + + if (!icfg->adjust_pcie_preemphasis) { + return 0; + } + + /* Check to see if the PCIe SerDes deemphasis needs to be changed + * based on the advertisement from the root complex + */ + /* Find PCIe capability base */ + if (!shbde || !shbde->pcic16_read || !pci_dev) { + return -1; + } + pcie_cap_base = shbde_pci_pcie_cap(shbde, pci_dev); + if (pcie_cap_base) { + link_stat = shbde->pcic16_read(pci_dev, + pcie_cap_base + PCI_EXP_LNKSTA); + link_stat2 = shbde->pcic16_read(pci_dev, + pcie_cap_base + PCI_EXP_LNKSTA2); + if (((link_stat & 0xf) == PCI_EXP_LNKSTA_CLS_5_0GB) && + (link_stat2 & PCI_EXP_LNKSTA2_CDL_3_5DB)) { + /* Device is operating at Gen2 speeds and RC requested -3.5dB */ + /* Change the transmitter setting */ + shbde_iproc_mdio_write(smc, phy_addr, 0x1f, 0x8610); + shbde_iproc_mdio_read(smc, phy_addr, 0x17, &data); + data &= ~0xf00; + data |= 0x700; + shbde_iproc_mdio_write(smc, phy_addr, 0x17, data); + + /* Force the PCIe link to retrain */ + data = 0; + REG_FIELD_SET(PAXB_CONFIG_IND_ADDRr, PROTOCOL_LAYERf, data, 0x2); + REG_FIELD_SET(PAXB_CONFIG_IND_ADDRr, ADDRESSf, data, 0x4); + reg = ROFFS(iproc_regs, BAR0_PAXB_CONFIG_IND_ADDR); + iproc32_write(shbde, reg, data); + + reg = ROFFS(iproc_regs, BAR0_PAXB_CONFIG_IND_DATA); + data = iproc32_read(shbde, reg); + data &= ~0x4000; + iproc32_write(shbde, reg, data); + data |= 0x4000; + iproc32_write(shbde, reg, data); + data &= ~0x4000; + iproc32_write(shbde, reg, data); + + /* Wait a short while for the retraining to complete */ + wait_usec(shbde, 1000); + } + } + + return 0; +} + diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/shbde_mdio.c b/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/shbde_mdio.c new file mode 100644 index 00000000000..df37171049e --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/shbde_mdio.c @@ -0,0 +1,171 @@ +/* + * $Id: $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + */ + +#include + +/* iProc MDIO register offset */ +#define MII_MGMT_CTRL 0x0 +#define MII_MGMT_CMD_DATA 0x4 + +/* iProc MII register with fields definition */ +#define MII_MGMT_CTRLr_MDCDIVf_SHFT 0 +#define MII_MGMT_CTRLr_MDCDIVf_MASK 0x7f +#define MII_MGMT_CTRLr_BSYf_SHFT 8 +#define MII_MGMT_CTRLr_BSYf_MASK 0x1 + +#define MII_MGMT_CMD_DATAr_DATAf_SHFT 0 +#define MII_MGMT_CMD_DATAr_DATAf_MASK 0xffff +#define MII_MGMT_CMD_DATAr_TAf_SHFT 16 +#define MII_MGMT_CMD_DATAr_TAf_MASK 0x3 +#define MII_MGMT_CMD_DATAr_RAf_SHFT 18 +#define MII_MGMT_CMD_DATAr_RAf_MASK 0x1f +#define MII_MGMT_CMD_DATAr_PAf_SHFT 23 +#define MII_MGMT_CMD_DATAr_PAf_MASK 0x1f +#define MII_MGMT_CMD_DATAr_OPf_SHFT 28 +#define MII_MGMT_CMD_DATAr_OPf_MASK 0x3 +#define MII_MGMT_CMD_DATAr_SBf_SHFT 30 +#define MII_MGMT_CMD_DATAr_SBf_MASK 0x3 + +/* Register field value set/get */ +#define REG_FIELD_SET(_r, _f, _r_val, _f_val) \ + _r_val = ((_r_val) & ~(_r##_##_f##_MASK << _r##_##_f##_SHFT)) | \ + (((_f_val) & _r##_##_f##_MASK) << _r##_##_f##_SHFT) +#define REG_FIELD_GET(_r, _f, _r_val) \ + (((_r_val) >> _r##_##_f##_SHFT) & _r##_##_f##_MASK) + +#define LOG_OUT(_shbde, _lvl, _str, _prm) \ + if ((_shbde)->log_func) { \ + (_shbde)->log_func(_lvl, _str, _prm); \ + } +#define LOG_ERR(_shbde, _str, _prm) LOG_OUT(_shbde, SHBDE_ERR, _str, _prm) +#define LOG_WARN(_shbde, _str, _prm) LOG_OUT(_shbde, SHBDE_WARN, _str, _prm) +#define LOG_DBG(_shbde, _str, _prm) LOG_OUT(_shbde, SHBDE_DBG, _str, _prm) + +static unsigned int +mdio32_read(shbde_mdio_ctrl_t *smc, unsigned int offset) +{ + if (!smc || !smc->io32_read) { + return 0; + } + return smc->io32_read(smc->shbde, smc->regs, smc->base_addr + offset); +} + +static void +mdio32_write(shbde_mdio_ctrl_t *smc, unsigned int offset, unsigned int data) +{ + if (!smc || !smc->io32_read) { + return; + } + smc->io32_write(smc->shbde, smc->regs, smc->base_addr + offset, data); +} + +static void +wait_usec(shbde_mdio_ctrl_t *smc, int usec) +{ + shbde_hal_t *shbde = smc->shbde; + + if (shbde && shbde->usleep) { + shbde->usleep(usec); + } else { + int idx; + volatile int count; + for (idx = 0; idx < usec; idx++) { + for (count = 0; count < 100; count++); + } + } +} + +static int +iproc_mdio_wait_for_busy(shbde_mdio_ctrl_t *smc) +{ + int mii_busy; + unsigned int reg_val; + int count = 1000; + + /* Wait until MII is not busy */ + do { + reg_val = mdio32_read(smc, MII_MGMT_CTRL); + mii_busy = REG_FIELD_GET(MII_MGMT_CTRLr, BSYf, reg_val); + if (!mii_busy) { + break; + } + wait_usec(smc, 10); + count --; + } while (count > 0); + + return mii_busy; +} + +int +shbde_iproc_mdio_init(shbde_mdio_ctrl_t *smc) +{ + shbde_hal_t *shbde = smc->shbde; + unsigned int reg_val = 0; + + /* Enable the iProc internal MDIO interface */ + REG_FIELD_SET(MII_MGMT_CTRLr, MDCDIVf, reg_val, 0x7f); + mdio32_write(smc, MII_MGMT_CTRL, reg_val); + + if (shbde && !shbde->usleep) { + LOG_DBG(shbde, "shbde_mdio: no registration of usleep vector", 0); + } + + wait_usec(smc, 100); + + return 0; +} + +int +shbde_iproc_mdio_read(shbde_mdio_ctrl_t *smc, unsigned int phy_addr, + unsigned int reg, unsigned int *val) +{ + unsigned int reg_val = 0; + + REG_FIELD_SET(MII_MGMT_CMD_DATAr, SBf, reg_val, 0x1); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, TAf, reg_val, 0x2); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, OPf, reg_val, 0x2); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, PAf, reg_val, phy_addr); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, RAf, reg_val, reg); + mdio32_write(smc, MII_MGMT_CMD_DATA, reg_val); + + if (iproc_mdio_wait_for_busy(smc)) { + *val = 0; + LOG_DBG(smc->shbde, "shbde_iproc_mdio_read busy", reg); + return -1; + } + + reg_val = mdio32_read(smc, MII_MGMT_CMD_DATA); + *val = REG_FIELD_GET(MII_MGMT_CMD_DATAr, DATAf, reg_val); + + return 0; +} + +int +shbde_iproc_mdio_write(shbde_mdio_ctrl_t *smc, unsigned int phy_addr, + unsigned int reg, unsigned int val) +{ + unsigned int reg_val = 0; + + REG_FIELD_SET(MII_MGMT_CMD_DATAr, SBf, reg_val, 0x1); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, TAf, reg_val, 0x2); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, OPf, reg_val, 0x1); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, PAf, reg_val, phy_addr); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, RAf, reg_val, reg); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, DATAf, reg_val, val); + mdio32_write(smc, MII_MGMT_CMD_DATA, reg_val); + + if (iproc_mdio_wait_for_busy(smc)) { + LOG_DBG(smc->shbde, "shbde_iproc_mdio_write busy", reg); + return -1; + } + + /* Wait for some time for the write to take effect */ + wait_usec(smc, 100); + + return 0; +} + diff --git a/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/shbde_pci.c b/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/shbde_pci.c new file mode 100755 index 00000000000..040c48a3978 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/bde/shared/shbde_pci.c @@ -0,0 +1,377 @@ +/* + * $Id: $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + */ + +#include + +/* PCIe capabilities */ +#ifndef PCI_CAPABILITY_LIST +#define PCI_CAPABILITY_LIST 0x34 +#endif +#ifndef PCI_CAP_ID_EXP +#define PCI_CAP_ID_EXP 0x10 +#endif +#ifndef PCI_EXP_DEVCAP +#define PCI_EXP_DEVCAP 4 +#endif +#ifndef PCI_EXP_DEVCTL +#define PCI_EXP_DEVCTL 8 +#endif +#ifndef PCI_EXT_CAP_START +#define PCI_EXT_CAP_START 0x100 +#endif +#ifndef PCI_EXT_CAP_ID +#define PCI_EXT_CAP_ID(_hdr) (_hdr & 0x0000ffff) +#endif +#ifndef PCI_EXT_CAP_VER +#define PCI_EXT_CAP_VER(_hdr) ((_hdr >> 16) & 0xf) +#endif +#ifndef PCI_EXT_CAP_NEXT +#define PCI_EXT_CAP_NEXT(_hdr) ((_hdr >> 20) & 0xffc) +#endif +#ifndef PCI_EXT_CAP_ID_VNDR +#define PCI_EXT_CAP_ID_VNDR 0x0b +#endif + +#define LOG_OUT(_shbde, _lvl, _str, _prm) \ + if ((_shbde)->log_func) { \ + (_shbde)->log_func(_lvl, _str, _prm); \ + } +#define LOG_ERR(_shbde, _str, _prm) LOG_OUT(_shbde, SHBDE_ERR, _str, _prm) +#define LOG_WARN(_shbde, _str, _prm) LOG_OUT(_shbde, SHBDE_WARN, _str, _prm) +#define LOG_DBG(_shbde, _str, _prm) LOG_OUT(_shbde, SHBDE_DBG, _str, _prm) + +#ifndef NULL +#define NULL (void *)0 +#endif + +/* + * Warpper functions with null-pointer checks. + */ +static unsigned int +pcic16_read(shbde_hal_t *shbde, void *pci_dev, + unsigned int addr) +{ + if (!shbde || !shbde->pcic16_read) { + return 0; + } + return shbde->pcic16_read(pci_dev, addr); +} + +static void +pcic16_write(shbde_hal_t *shbde, void *pci_dev, + unsigned int addr, unsigned int data) +{ + if (!shbde || !shbde->pcic16_write) { + return; + } + shbde->pcic16_write(pci_dev, addr, data); +} + +static unsigned int +pcic32_read(shbde_hal_t *shbde, void *pci_dev, + unsigned int addr) +{ + if (!shbde || !shbde->pcic32_read) { + return 0; + } + return shbde->pcic32_read(pci_dev, addr); +} + +static void * +pci_parent_device_get(shbde_hal_t *shbde, void *pci_dev) +{ + if (!shbde || !shbde->pci_parent_device_get) { + return NULL; + } + return shbde->pci_parent_device_get(pci_dev); +} + +/* + * Function: + * shbde_pci_pcie_cap + * Purpose: + * Return offset of PCIe capabilities in PCI configuration space + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * dev - PCI device handle (passed back to PCI HAL functions) + * Returns: + * PCI_CAP_ID_EXP offset in PCI configuration space if PCIe, otherwise 0 + */ +unsigned int +shbde_pci_pcie_cap(shbde_hal_t *shbde, void *pci_dev) +{ + unsigned int cap_base, rval; + + cap_base = pcic16_read(shbde, pci_dev, PCI_CAPABILITY_LIST); + while (cap_base) { + rval = pcic16_read(shbde, pci_dev, cap_base); + if ((rval & 0xff) == PCI_CAP_ID_EXP) { + break; + } + cap_base = (rval >> 8) & 0xff; + } + + return cap_base; +} + +/* + * Function: + * shbde_pci_is_pcie + * Purpose: + * Check if PCI device is PCIe device + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * dev - PCI device handle (passed back to PCI HAL functions) + * Returns: + * 1 if PCIe, otherwise 0 + */ +int +shbde_pci_is_pcie(shbde_hal_t *shbde, void *pci_dev) +{ + return shbde_pci_pcie_cap(shbde, pci_dev) ? 1 : 0; +} + +/* + * Function: + * shbde_pci_is_iproc + * Purpose: + * Check if PCI device is iProc-based + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * dev - PCI device handle (passed back to PCI HAL functions) + * cmic_bar - (OUT) PCI BAR which contains switch CMIC registers + * Returns: + * 1 if iProc-based, otherwise 0 + */ +int +shbde_pci_is_iproc(shbde_hal_t *shbde, void *pci_dev, int *cmic_bar) +{ + unsigned int cap_base, rval; + + if (!shbde_pci_is_pcie(shbde, pci_dev)) { + return 0; + } + + /* Look for PCIe vendor-specific extended capability (VSEC) */ + cap_base = PCI_EXT_CAP_START; + while (cap_base) { + rval = pcic32_read(shbde, pci_dev, cap_base); + if (rval == 0xffffffff) { + /* Assume PCI HW read error */ + return 0; + } + + if (PCI_EXT_CAP_ID(rval) == PCI_EXT_CAP_ID_VNDR) { + break; + } + cap_base = PCI_EXT_CAP_NEXT(rval); + } + if (cap_base) { + /* + * VSEC layout: + * + * 0x00: PCI Express Extended Capability Header + * 0x04: Vendor-Specific Header + * 0x08: Vendor-Specific Register 1 + * 0x0c: Vendor-Specific Register 2 + * ... + * 0x24: Vendor-Specific Register 8 + */ + /* 32'b // 31:12=0 Reserved; 11:08=CMIC BAR; 07:00=iProc Configuration ID */ + rval = pcic32_read(shbde, pci_dev, cap_base + 8); + LOG_DBG(shbde, "Found VSEC", rval); + + /* Determine PCI BAR of CMIC */ + *cmic_bar = 0; + if ((rval & 0x100) == 0x100) { + *cmic_bar = 2; + } + /* Assume iProc device */ + return 1; + } + + return 0; +} + +/* + * Function: + * shbde_pci_iproc_version_get + * Purpose: + * Get iproc, cmic versions and revisions + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * dev - PCI device handle (passed back to PCI HAL functions) + * iproc_ver - (OUT) iProc version + * cmic_ver - (OUT) CMIC version + * cmic_rev - (OUT) CMIC revision + * Returns: + * 1 for no error, otherwise 0 + */ +int +shbde_pci_iproc_version_get(shbde_hal_t *shbde, void *pci_dev, + unsigned int *iproc_ver, + unsigned int *cmic_ver, + unsigned int *cmic_rev) +{ + unsigned int cap_base, rval; + + if (!shbde_pci_is_pcie(shbde, pci_dev)) { + return 0; + } + + /* Look for PCIe vendor-specific extended capability (VSEC) */ + cap_base = PCI_EXT_CAP_START; + while (cap_base) { + rval = pcic32_read(shbde, pci_dev, cap_base); + if (rval == 0xffffffff) { + /* Assume PCI HW read error */ + return 0; + } + + if (PCI_EXT_CAP_ID(rval) == PCI_EXT_CAP_ID_VNDR) { + break; + } + cap_base = PCI_EXT_CAP_NEXT(rval); + } + if (cap_base) { + /* + * VSEC layout: + * + * 0x00: PCI Express Extended Capability Header + * 0x04: Vendor-Specific Header + * 0x08: Vendor-Specific Register 1 + * 0x0c: Vendor-Specific Register 2 + * ... + * 0x24: Vendor-Specific Register 8 + */ + + /* Read PCIe Vendor Specific Register 1 */ + /* VENODR REG FORMAT + * [7:0] iProc Rev = 8'h0E (for P14) + * [11:8] CMIC BAR = 4'h1 (BAR64-1) + * [15:12] CMIC Version = 4'h4 + * [19:16] CMIC Rev = 4'h1 + * [22:20] SBUS Version = 4'h4 + */ + + rval = pcic32_read(shbde, pci_dev, cap_base + 8); + LOG_DBG(shbde, "Found VSEC", rval); + + /* Determine PCI BAR of CMIC */ + *iproc_ver = rval & 0xff; + *cmic_ver = (rval >> 12) & 0xf; + *cmic_rev = (rval >> 16) & 0xf; + return 1; + } + + return 0; +} + +/* + * Function: + * shbde_pci_max_payload_set + * Purpose: + * Set PCIe maximum payload + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * dev - PCI device handle (passed back to PCI HAL functions) + * maxpayload - maximum payload (in byte) + * Returns: + * -1 if error, otherwise 0 + * Notes: + * If not PCIe device, set the PCI retry count to infinte instead. + */ +int +shbde_pci_max_payload_set(shbde_hal_t *shbde, void *pci_dev, int maxpayload) +{ + unsigned int cap_base, parent_cap_base; + unsigned int devcap, devctl, parent_devctl; + int max_val, max_cap, parent_max_val; + void *parent_pci_dev; + + cap_base = shbde_pci_pcie_cap(shbde, pci_dev); + + if (cap_base == 0) { + /* Not PCIe */ + return 0; + } + + /* Get current device control settings */ + devctl = pcic16_read(shbde, pci_dev, cap_base + PCI_EXP_DEVCTL); + + /* Get current max payload setting */ + max_val = (devctl >> 5) & 0x7; + + if (maxpayload) { + /* Get encoding from byte value */ + max_val = 0; + while ((1 << (max_val + 7)) < maxpayload) { + max_val++; + } + LOG_DBG(shbde, "Set max payload size", maxpayload); + LOG_DBG(shbde, "Set max payload val", max_val); + + /* Get max supported payload size */ + devcap = pcic16_read(shbde, pci_dev, cap_base + PCI_EXP_DEVCAP); + max_cap = (devcap & 0x7); + + /* Do not exceed device capabilities */ + if (max_val > max_cap) { + max_val = max_cap; + LOG_DBG(shbde, + "Payload size exceeds device capability", + maxpayload); + } + + /* Get currently set max payload size for the parent device + * in the PCI tree (if it exists). + */ + parent_pci_dev = pci_parent_device_get(shbde, pci_dev); + if (parent_pci_dev != NULL) { + parent_cap_base = shbde_pci_pcie_cap(shbde, parent_pci_dev); + parent_devctl = pcic16_read(shbde, + parent_pci_dev, + parent_cap_base + PCI_EXP_DEVCTL); + parent_max_val = (parent_devctl >> 5) & 0x7; + + /* Do not exceed current parent max payload setting (our device + * should have an MPS setting <= current parent MPS setting in + * the tree of PCIe devices). + */ + if (max_val > parent_max_val) { + max_val = parent_max_val; + LOG_DBG(shbde, + "Payload size exceeds current parent device setting", + maxpayload); + } + } + + /* Update max payload size */ + devctl &= ~(0x7 << 5); + devctl |= (max_val) << 5; + + /* Update max request size */ + devctl &= ~(0x7 << 12); + devctl |= (max_val << 12); + } + + /* Always disable relaxed ordering */ + devctl &= ~(1 << 4); + + /* Update device control settings */ + pcic16_write(shbde, pci_dev, cap_base + PCI_EXP_DEVCTL, devctl); + + /* Warn if non-default setting is used */ + if (max_val > 0) { + LOG_WARN(shbde, + "Selected payload size may not be supported by all " + "PCIe bridges by default.", + (1 << (max_val + 7))); + } + + return 0; +} diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/Makefile new file mode 100644 index 00000000000..84c677758ca --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/Makefile @@ -0,0 +1,31 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.10 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +# Makefile for SOC SAL support +# +LOCALDIR = systems/linux/kernel/modules + +include ${SDK}/make/Make.config + +subdirs=shared uk-proxy bcm-diag-full bcm-core bcm-net bcm-diag + +include ${SDK}/make/Make.subdirs + +include ${SDK}/make/Make.depend diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/bcm-knet/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/bcm-knet/Makefile new file mode 100644 index 00000000000..ed1a5000e3c --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/bcm-knet/Makefile @@ -0,0 +1,67 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +LOCALDIR = systems/linux/kernel/modules/bcm-knet + +include ${SDK}/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +ifeq ($(kernel_version),2_4) +MODULE = $(LIBDIR)/linux-bcm-knet.o +else +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-bcm-knet +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +build: $(MODULE) $(KMODULE) +endif + +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../../../bde/linux/kernel/kernel_module/Module.symvers +ifeq (,$(findstring -DPROXY_SUPPORT=0,$(CFLAGS))) +KBUILD_EXTRA_SYMBOLS += ${BLDDIR}/../uk-proxy/kernel_module/Module.symvers +endif + +# BCM Network Device + +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ +ifneq ($(kernel_version),2_4) +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko +endif + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +include ${SDK}/make/Make.depend + +clean:: + $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o + $(RM) $(BOBJS) $(MODULE) + +ifneq ($(kernel_version),2_4) +.PHONY: build +endif diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/bcm-knet/bcm-knet.c b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/bcm-knet/bcm-knet.c new file mode 100755 index 00000000000..4c678239727 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/bcm-knet/bcm-knet.c @@ -0,0 +1,8551 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ + +/* + * This module implements a Linux network driver for Broadcom + * XGS switch devices. The driver simultaneously serves a + * number of vitual Linux network devices and a Tx/Rx API + * implemented in user space. + * + * Packets received from the switch device are sent to either + * a virtual Linux network device or the user mode Rx API + * based on a set of packet filters.susp + * + * Packets from the virtual Linux network devices and the user + * mode Tx API are multiplexed with priority given to the Tx API. + * + * A message-based IOCTL interface is used for managing packet + * filters and virtual Linux network interfaces. + * + * A virtual network interface can be configured to work in RCPU + * mode, which means that packets from the switch device will + * be encasulated with a RCPU header and a block of meta data + * that basically contains the core DCB information. Likewise, + * packets received from the Linux network stack are assumed to + * be RCPU encapsulated when going out on an interface in RCPU + * mode. + * + * The module implements basic Rx DMA rate control. The rate is + * specified in packets per second, and different Rx DMA channels + * can be configured to use different maximum packet rates. + * The packet rate can be configure as a module parameter, and + * it can also be changed dynamically through the proc file + * system (syntax is described in function header comment). + * + * To support multiple instance, each instance has its event queue. + * + * To support pci hot-plug in this module, the resource update + * should be handled when the PCI device is re-plugged. + * NOTE: the KNET detach should be invoked befere removing the + * device. + * + * For a list of supported module parameters, please see below. + */ + +#include /* Must be included first */ +#include +#include +#include + +#include +#include +#include +#include +#include +#include + + +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("Network Device Driver for Broadcom BCM TxRx API"); +MODULE_LICENSE("GPL"); + +static int debug; +LKM_MOD_PARAM(debug, "i", int, 0); +MODULE_PARM_DESC(debug, +"Debug level (default 0)"); + +static char *mac_addr = NULL; +LKM_MOD_PARAM(mac_addr, "s", charp, 0); +MODULE_PARM_DESC(mac_addr, +"Ethernet MAC address (default 02:10:18:xx:xx:xx)"); + +static int rx_buffer_size = 9216; +LKM_MOD_PARAM(rx_buffer_size, "i", int, 0); +MODULE_PARM_DESC(rx_buffer_size, +"Size of RX packet buffers (default 9216)"); + +static int default_mtu = 1500; +LKM_MOD_PARAM(default_mtu, "i", int, 0); +MODULE_PARM_DESC(default_mtu, +"Default MTU for KNET network interfaces (default 1500)"); + +static int rx_sync_retry = 1000; +LKM_MOD_PARAM(rx_sync_retry, "i", int, 0); +MODULE_PARM_DESC(rx_sync_retry, +"Retries if chain is incomplete on interrupt (default 10)"); + +static char *base_dev_name = NULL; +LKM_MOD_PARAM(base_dev_name, "s", charp, 0); +MODULE_PARM_DESC(base_dev_name, +"Base device name (default bcm0, bcm1, etc.)"); + +static int rcpu_mode = 0; +LKM_MOD_PARAM(rcpu_mode, "i", int, 0); +MODULE_PARM_DESC(rcpu_mode, +"Enable RCPU encapsulation (default 0)"); + +static char *rcpu_dmac = NULL; +LKM_MOD_PARAM(rcpu_dmac, "s", charp, 0); +MODULE_PARM_DESC(rcpu_dmac, +"RCPU destination MAC address (by default use L2 destination MAC address)"); + +static char *rcpu_smac = NULL; +LKM_MOD_PARAM(rcpu_smac, "s", charp, 0); +MODULE_PARM_DESC(rcpu_smac, +"RCPU source MAC address (by default use L2 source MAC address)"); + +static int rcpu_ethertype = 0xde08; +LKM_MOD_PARAM(rcpu_ethertype, "i", int, 0); +MODULE_PARM_DESC(rcpu_ethertype, +"RCPU EtherType (default DE08h)"); + +static int rcpu_signature = 0; +LKM_MOD_PARAM(rcpu_signature, "i", int, 0); +MODULE_PARM_DESC(rcpu_signature, +"RCPU Signature (default is PCI device ID)"); + +static int rcpu_vlan = 1; +LKM_MOD_PARAM(rcpu_vlan, "i", int, 0); +MODULE_PARM_DESC(rcpu_vlan, +"RCPU VLAN ID (default 1)"); + +static int use_rx_skb = 0; +LKM_MOD_PARAM(use_rx_skb, "i", int, 0); +MODULE_PARM_DESC(use_rx_skb, +"Use socket buffers for receive operation (default 0)"); + +static int num_rx_prio = 1; +LKM_MOD_PARAM(num_rx_prio, "i", int, 0); +MODULE_PARM_DESC(num_rx_prio, +"Number of filter priorities per Rx DMA channel"); + +static int rx_rate[8] = { 100000, 100000, 100000, 100000, 100000, 100000, 100000, 0 }; +LKM_MOD_PARAM_ARRAY(rx_rate, "1-4i", int, NULL, 0); +MODULE_PARM_DESC(rx_rate, +"Rx rate in packets per second (default 100000)"); + +static int rx_burst[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; +LKM_MOD_PARAM_ARRAY(rx_burst, "1-4i", int, NULL, 0); +MODULE_PARM_DESC(rx_burst, +"Rx rate burst maximum in packets (default rx_rate/10)"); + +static int check_rcpu_signature = 0; +LKM_MOD_PARAM(check_rcpu_signature, "i", int, 0); +MODULE_PARM_DESC(check_rcpu_signature, +"Check RCPU Signature for Tx packets from RCPU interfaces"); + +static int basedev_suspend = 0; +LKM_MOD_PARAM(basedev_suspend, "i", int, 0); +MODULE_PARM_DESC(basedev_suspend, +"Pause traffic till base device is up (enabled by default in NAPI mode)"); + +/* Debug levels */ +#define DBG_LVL_VERB 0x1 +#define DBG_LVL_DCB 0x2 +#define DBG_LVL_PKT 0x4 +#define DBG_LVL_SKB 0x8 +#define DBG_LVL_CMD 0x10 +#define DBG_LVL_EVT 0x20 +#define DBG_LVL_IRQ 0x40 +#define DBG_LVL_NAPI 0x80 +#define DBG_LVL_PDMP 0x100 +#define DBG_LVL_FLTR 0x200 +#define DBG_LVL_KCOM 0x400 +#define DBG_LVL_RCPU 0x800 +#define DBG_LVL_WARN 0x1000 +#define DBG_LVL_NDEV 0x2000 +#define DBG_LVL_INST 0x4000 +/* Level to output Dune internal headers Parsing */ +#define DBG_LVL_DUNE 0x8000 +#define DBG_LVL_DCB_TX 0x10000 +#define DBG_LVL_DCB_RX 0x20000 +#define DBG_LVL_PDMP_TX 0x40000 +#define DBG_LVL_PDMP_RX 0x80000 + +#define DBG_VERB(_s) do { if (debug & DBG_LVL_VERB) gprintk _s; } while (0) +#define DBG_PKT(_s) do { if (debug & DBG_LVL_PKT) gprintk _s; } while (0) +#define DBG_SKB(_s) do { if (debug & DBG_LVL_SKB) gprintk _s; } while (0) +#define DBG_CMD(_s) do { if (debug & DBG_LVL_CMD) gprintk _s; } while (0) +#define DBG_EVT(_s) do { if (debug & DBG_LVL_EVT) gprintk _s; } while (0) +#define DBG_IRQ(_s) do { if (debug & DBG_LVL_IRQ) gprintk _s; } while (0) +#define DBG_NAPI(_s) do { if (debug & DBG_LVL_NAPI) gprintk _s; } while (0) +#define DBG_PDMP(_s) do { if (debug & DBG_LVL_PDMP) gprintk _s; } while (0) +#define DBG_FLTR(_s) do { if (debug & DBG_LVL_FLTR) gprintk _s; } while (0) +#define DBG_KCOM(_s) do { if (debug & DBG_LVL_KCOM) gprintk _s; } while (0) +#define DBG_RCPU(_s) do { if (debug & DBG_LVL_RCPU) gprintk _s; } while (0) +#define DBG_WARN(_s) do { if (debug & DBG_LVL_WARN) gprintk _s; } while (0) +#define DBG_NDEV(_s) do { if (debug & DBG_LVL_NDEV) gprintk _s; } while (0) +#define DBG_INST(_s) do { if (debug & DBG_LVL_INST) gprintk _s; } while (0) +#define DBG_DUNE(_s) do { if (debug & DBG_LVL_DUNE) gprintk _s; } while (0) +#define DBG_DCB_TX(_s) do { if (debug & (DBG_LVL_DCB|DBG_LVL_DCB_TX)) \ + gprintk _s; } while (0) +#define DBG_DCB_RX(_s) do { if (debug & (DBG_LVL_DCB|DBG_LVL_DCB_RX)) \ + gprintk _s; } while (0) +#define DBG_DCB(_s) do { if (debug & (DBG_LVL_DCB|DBG_LVL_DCB_TX| \ + DBG_LVL_DCB_RX)) \ + gprintk _s; } while (0) + + +/* This flag is used to indicate if debugging packet function is open or closed */ +static int dbg_pkt_enable = 0; + +/* Module Information */ +#define MODULE_MAJOR 122 +#define MODULE_NAME "linux-bcm-knet" + +#ifndef NAPI_SUPPORT +#define NAPI_SUPPORT 1 +#endif + +#if NAPI_SUPPORT + +static int use_napi = 0; +LKM_MOD_PARAM(use_napi, "i", int, 0); +MODULE_PARM_DESC(use_napi, +"Use NAPI interface (default 0)"); + +static int napi_weight = 64; +LKM_MOD_PARAM(napi_weight, "i", int, 0); +MODULE_PARM_DESC(napi_weight, +"Weight of NAPI interfaces (default 64)"); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) +#define bkn_napi_enable(_dev, _napi) netif_poll_enable(_dev) +#define bkn_napi_disable(_dev, _napi) netif_poll_disable(_dev) +#define bkn_napi_schedule(_dev, _napi) netif_rx_schedule(_dev) +#define bkn_napi_schedule_prep(_dev, _napi) netif_rx_schedule_prep(_dev) +#define __bkn_napi_schedule(_dev, _napi) __netif_rx_schedule(_dev) +#define bkn_napi_complete(_dev, _napi) netif_rx_complete(_dev) +#else +#define bkn_napi_enable(_dev, _napi) napi_enable(_napi) +#define bkn_napi_disable(_dev, _napi) napi_disable(_napi) +#define bkn_napi_schedule(_dev, _napi) napi_schedule(_napi) +#define bkn_napi_schedule_prep(_dev, _napi) napi_schedule_prep(_napi) +#define __bkn_napi_schedule(_dev, _napi) __napi_schedule(_napi) +#define bkn_napi_complete(_dev, _napi) napi_complete(_napi) +#endif + +#else + +static int use_napi = 0; +static int napi_weight = 0; + +#define bkn_napi_enable(_dev, _napi) +#define bkn_napi_disable(_dev, _napi) +#define bkn_napi_schedule(_dev, _napi) +#define bkn_napi_schedule_prep(_dev, _napi) (0) +#define __bkn_napi_schedule(_dev, _napi) +#define bkn_napi_complete(_dev, _napi) + +#endif + +/* Compatibility */ + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)) +#define NETDEV_UPDATE_TRANS_START_TIME(dev) dev->trans_start = jiffies +#else +#define NETDEV_UPDATE_TRANS_START_TIME(dev) netif_trans_update(dev) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) +#define skb_copy_to_linear_data(_skb, _pkt, _len) \ + eth_copy_and_sum(_skb, _pkt, _len, 0) +struct napi_struct { int not_used; }; +#define netif_napi_add(_dev, _napi, _poll, _weight) do { \ + (_dev)->poll = _poll; \ + (_dev)->weight = _weight; \ +} while(0) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) +#define SKB_PADTO(_skb,_len) (((_skb = skb_padto(_skb,_len)) == NULL) ? -1 : 0) +#else +#define SKB_PADTO(_skb,_len) skb_padto(_skb,_len) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,12)) +#define skb_header_cloned(_skb) \ + skb_cloned(_skb) +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27) +static inline void *netdev_priv(struct net_device *dev) +{ + return dev->priv; +} +#endif /* KERNEL_VERSION(2,4,27) */ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,23) +/* Special check for MontaVista 2.4.20 MIPS */ +#if !(defined(MAX_USER_RT_PRIO) && defined(CONFIG_MIPS)) +static inline void free_netdev(struct net_device *dev) +{ + kfree(dev); +} +#endif +static inline void netif_poll_disable(struct net_device *dev) +{ + while (test_and_set_bit(__LINK_STATE_RX_SCHED, &dev->state)) { + /* No hurry. */ + current->state = TASK_INTERRUPTIBLE; + schedule_timeout(1); + } +} +static inline void netif_poll_enable(struct net_device *dev) +{ + clear_bit(__LINK_STATE_RX_SCHED, &dev->state); +} +#endif /* KERNEL_VERSION(2,4,23) */ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,21) +static struct sk_buff *skb_pad(struct sk_buff *skb, int pad) +{ + struct sk_buff *nskb; + + /* If the skbuff is non linear tailroom is always zero.. */ + if(skb_tailroom(skb) >= pad) + { + memset(skb->data+skb->len, 0, pad); + return skb; + } + + nskb = skb_copy_expand(skb, skb_headroom(skb), skb_tailroom(skb) + pad, GFP_ATOMIC); + kfree_skb(skb); + if(nskb) + memset(nskb->data+nskb->len, 0, pad); + return nskb; +} +static inline struct sk_buff *skb_padto(struct sk_buff *skb, unsigned int len) +{ + unsigned int size = skb->len; + if(likely(size >= len)) + return skb; + return skb_pad(skb, len-size); +} +#endif /* KERNEL_VERSION(2,4,21) */ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) +#define bkn_vlan_hwaccel_put_tag(_skb, _proto, _tci) \ + __vlan_hwaccel_put_tag(_skb, _tci) +#else +#define bkn_vlan_hwaccel_put_tag(_skb, _proto, _tci) \ + __vlan_hwaccel_put_tag(_skb, htons(_proto), _tci) +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27) +#define bkn_dma_mapping_error(d, a) \ + dma_mapping_error(a) +#define bkn_pci_dma_mapping_error(d, a) \ + pci_dma_mapping_error(a) +#else +#define bkn_dma_mapping_error(d, a) \ + dma_mapping_error(d, a) +#define bkn_pci_dma_mapping_error(d, a) \ + pci_dma_mapping_error(d, a) +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) +enum { + SKBTX_HW_TSTAMP = 1 << 0, + SKBTX_SW_TSTAMP = 1 << 1, + SKBTX_IN_PROGRESS = 1 << 2, +}; +struct skb_shared_hwtstamps { + ktime_t hwtstamp; + ktime_t syststamp; +}; +struct bkn_skb_shared_info { + uint8_t tx_flags; + struct skb_shared_hwtstamps hwtstamps; +}; +#define bkn_skb_shinfo(_skb) ((struct bkn_skb_shared_info *)(unsigned char *)_skb->end) +#define bkn_skb_tx_flags(_skb) bkn_skb_shinfo(_skb)->tx_flags +static inline struct skb_shared_hwtstamps *skb_hwtstamps(struct sk_buff *skb) +{ + return &bkn_skb_shinfo(skb)->hwtstamps; +} +void skb_tstamp_tx(struct sk_buff *orig_skb, struct skb_shared_hwtstamps *hwtstamps) +{ +} +static inline void bkn_skb_tx_timestamp(struct sk_buff *skb) +{ +} +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26) +static inline ktime_t ns_to_ktime(u64 ns) +{ + static const ktime_t ktime; + return ktime; +} +#endif +#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37) +#include +enum { + SKBTX_HW_TSTAMP = 1 << 0, + SKBTX_SW_TSTAMP = 1 << 1, + SKBTX_IN_PROGRESS = 1 << 2, +}; +#define bkn_skb_tx_flags(_skb) skb_shinfo(_skb)->tx_flags.flags +static inline void bkn_skb_tx_timestamp(struct sk_buff *skb) +{ +} +#else +#include +#define bkn_skb_tx_flags(_skb) skb_shinfo(_skb)->tx_flags +static inline void bkn_skb_tx_timestamp(struct sk_buff *skb) +{ + return skb_tx_timestamp(skb); +} +#endif + +#ifdef LINUX_BDE_DMA_DEVICE_SUPPORT +#define DMA_DEV device +#define DMA_FROMDEV DMA_FROM_DEVICE +#define DMA_TODEV DMA_TO_DEVICE +#define DMA_MAP_SINGLE(d,p,s,r) dma_map_single(d,p,s,r) +#define DMA_UNMAP_SINGLE(d,a,s,r) dma_unmap_single(d,a,s,r) +#define DMA_ALLOC_COHERENT(d,s,h) dma_alloc_coherent(d,s,h,GFP_ATOMIC|GFP_DMA32) +#define DMA_FREE_COHERENT(d,s,a,h) dma_free_coherent(d,s,a,h) +#define DMA_MAPPING_ERROR(d,a) bkn_dma_mapping_error(d,a) +#else +#define DMA_DEV pci_dev +#define DMA_FROMDEV PCI_DMA_FROMDEVICE +#define DMA_TODEV PCI_DMA_TODEVICE +#define DMA_MAP_SINGLE(d,p,s,r) pci_map_single(d,p,s,r) +#define DMA_UNMAP_SINGLE(d,a,s,r) pci_unmap_single(d,a,s,r) +#define DMA_ALLOC_COHERENT(d,s,h) pci_alloc_consistent(d,s,h) +#define DMA_FREE_COHERENT(d,s,a,h) pci_free_consistent(d,s,a,h) +#define DMA_MAPPING_ERROR(d,a) bkn_pci_dma_mapping_error(d,a) +#endif + +/* RCPU operations */ +#define RCPU_OPCODE_RX 0x10 +#define RCPU_OPCODE_TX 0x20 + +/* RCPU flags */ +#define RCPU_F_MODHDR 0x4 + +/* RCPU encapsulation */ +#define RCPU_HDR_SIZE 32 +#define RCPU_TX_META_SIZE 32 +#define RCPU_TX_ENCAP_SIZE (RCPU_HDR_SIZE + RCPU_TX_META_SIZE) +#define RCPU_RX_META_SIZE 64 +#define RCPU_RX_ENCAP_SIZE (RCPU_HDR_SIZE + RCPU_RX_META_SIZE) + +#define PKT_TX_HDR_SIZE 16 + +static volatile int module_initialized; + +static ibde_t *kernel_bde = NULL; + +/* Descriptor info */ +typedef struct bkn_desc_info_s { + uint32_t *dcb_mem; + uint64_t dcb_dma; + struct sk_buff *skb; + uint64_t skb_dma; + uint32_t dma_size; +} bkn_desc_info_t; + +/* DCB chain info */ +typedef struct bkn_dcb_chain_s { + struct list_head list; + int dcb_cnt; + int dcb_cur; + uint32_t *dcb_mem; + uint64_t dcb_dma; +} bkn_dcb_chain_t; + +#define MAX_TX_DCBS 64 +#define MAX_RX_DCBS 64 + +#define NUM_DMA_CHAN 8 +#define NUM_RX_CHAN 7 +#define NUM_CMICX_RX_CHAN 7 +#define NUM_CMICM_RX_CHAN 3 + +#define FCS_SZ 4 +#define TAG_SZ 4 + +/* Device control info */ +typedef struct bkn_switch_info_s { + struct list_head list; + struct list_head ndev_list; /* Associated virtual Ethernet interfaces */ + struct net_device **ndevs; /* Indexed array of ndev_list */ + int ndev_max; /* Size of indexed array */ + struct list_head rxpf_list; /* Associated Rx packet filters */ + volatile void *base_addr; /* Base address for PCI register access */ + struct DMA_DEV *dma_dev; /* Required for DMA memory control */ + struct pci_dev *pdev; /* Required for DMA memory control */ + struct net_device *dev; /* Base network device */ + struct napi_struct napi; /* New NAPI */ + struct timer_list timer; /* Retry/resource timer */ + int timer_queued; /* Flag indicating queued timer function */ + uint32_t timer_runs; /* Timer function runs (debug only) */ + struct timer_list rxtick; /* Rx rate control timer */ + uint32_t rxticks_per_sec; /* Rx rate control update frequency */ + uint32_t rxtick_jiffies; /* Time between updates (in jiffies) */ + uint32_t rxticks; /* Rx rate control debug counter */ + uint32_t interrupts; /* Total number of interrupts */ + spinlock_t lock; /* Main lock for device */ + int dev_no; /* Device number (from BDE) */ + int cpu_no; /* Cpu number. 1 for iHost(AXI),0 for others */ + int dcb_type; /* DCB type */ + int dcb_wsize; /* DCB size (in 32-bit words) */ + int pkt_hdr_size; /* Packet header size */ + uint32_t ftmh_lb_key_ext_size; /* FTMH LB-Key Extension existence/size */ + uint32_t ftmh_stacking_ext_size; /* FTMH Stacking extension existence/size */ + uint32_t pph_base_size; /* Size of PPH base */ + uint32_t pph_lif_ext_size[8]; /* Size of PPH Lif extension header */ + uint8_t udh_enable; /* Indicates UDH existence */ + uint32_t udh_length_type[4]; /* Size of UDH header per type */ + int rx_chans; /* Number of Rx channels */ + uint32_t dma_hi; /* DMA higher address */ + uint32_t cmic_type; /* CMIC type (CMICe or CMICm) */ + uint32_t irq_mask; /* Active IRQs for DMA control */ + uint32_t napi_poll_mode; /* NAPI is in polling mode */ + uint32_t napi_not_done; /* NAPI poll did not process all packets */ + uint32_t napi_poll_again; /* Used if DCB chain is restarted */ + uint32_t tx_yield; /* Tx schedule for Continuous DMA and Non-NAPI mode */ + void *dcb_mem; /* Logical pointer to DCB memory */ + uint64_t dcb_dma; /* Physical bus address for DCB memory */ + int dcb_mem_size; /* Total size of allocated DCB memory */ + uint32_t dma_events; /* DMA events pending for BCM API */ + uint32_t rcpu_sig; /* RCPU signature */ + uint64_t halt_addr[NUM_DMA_CHAN]; /* DMA halt address */ + uint32_t cdma_channels; /* Active channels for Continuous DMA mode */ + uint32_t poll_channels; /* Channels for polling */ + uint32_t inst_id; /* Instance id of this device */ + int evt_idx; /* Event queue index for this device*/ + int basedev_suspended; /* Base device suspended */ + int tx_hwts; /* HW timestamp for Tx */ + int rx_hwts; /* HW timestamp for Rx */ + struct sk_buff_head tx_ptp_queue; /* Tx PTP skb queue */ + struct work_struct tx_ptp_work; /* Tx PTP work */ + struct { + bkn_desc_info_t desc[MAX_TX_DCBS+1]; + int free; /* Number of free Tx DCBs */ + int cur; /* Index of current Tx DCB */ + int dirty; /* Index of next Tx DCB to complete */ + int api_active; /* BCM Tx API is in progress */ + int suspends; /* Calls to netif_stop_queue (debug only) */ + struct list_head api_dcb_list; /* Tx DCB chains from BCM Tx API */ + bkn_dcb_chain_t *api_dcb_chain; /* Current Tx DCB chain */ + bkn_dcb_chain_t *api_dcb_chain_end; /* Tx DCB chain end */ + uint32_t pkts; /* Tx packet counter */ + uint32_t pkts_d_no_skb; /* Tx drop - skb allocation failed */ + uint32_t pkts_d_rcpu_encap; /* Tx drop - bad RCPU encapsulation */ + uint32_t pkts_d_rcpu_sig; /* Tx drop - bad RCPU signature */ + uint32_t pkts_d_rcpu_meta; /* Tx drop - bad RCPU meta data */ + uint32_t pkts_d_pad_fail; /* Tx drop - pad to minimum size failed */ + uint32_t pkts_d_dma_resrc; /* Tx drop - no DMA resources */ + uint32_t pkts_d_callback; /* Tx drop - consumed by call-back */ + uint32_t pkts_d_no_link; /* Tx drop - software link down */ + uint32_t pkts_d_over_limit; /* Tx drop - length is out of range */ + } tx; + struct { + bkn_desc_info_t desc[MAX_RX_DCBS+1]; + int free; /* Number of free Rx DCBs */ + int cur; /* Index of current Rx DCB */ + int dirty; /* Index of next Rx DCB to complete */ + int running; /* Rx DMA is active */ + int api_active; /* BCM Rx API is active */ + int chain_complete; /* All DCBs in chain processed */ + int sync_err; /* Chain done with incomplete DCBs (debug) */ + int sync_retry; /* Total retry times for sync error (debug) */ + int sync_maxloop; /* Max loop times once in recovering sync (debug) */ + int use_rx_skb; /* Use SKBs for DMA */ + uint32_t rate_max; /* Rx rate in packets/sec */ + uint32_t burst_max; /* Rx burst size in number of packets */ + uint32_t tokens; /* Tokens for Rx rate control */ + uint32_t rate; /* Current packet rate */ + unsigned long tok_jif; /* Jiffies at last token update */ + unsigned long rate_jif; /* Jiffies at last rate update */ + struct list_head api_dcb_list; /* Rx DCB chains from BCM Rx API */ + bkn_dcb_chain_t *api_dcb_chain; /* Current Rx DCB chain */ + bkn_dcb_chain_t *api_dcb_chain_end; /* Rx DCB chain end */ + uint32_t pkts; /* Rx packet counter */ + uint32_t pkts_ref; /* Rx packet count for rate calculation */ + uint32_t pkts_f_api; /* Rx packets filtered to API */ + uint32_t pkts_f_netif; /* Rx packets filtered to net interface */ + uint32_t pkts_m_api; /* Rx packets mirrored to API */ + uint32_t pkts_m_netif; /* Rx packets mirrored to net interface */ + uint32_t pkts_d_no_skb; /* Rx drop - skb allocation failed */ + uint32_t pkts_d_no_match; /* Rx drop - no matching filters */ + uint32_t pkts_d_unkn_netif; /* Rx drop - unknown net interface ID */ + uint32_t pkts_d_unkn_dest; /* Rx drop - unknown destination type */ + uint32_t pkts_d_callback; /* Rx drop - consumed by call-back */ + uint32_t pkts_d_no_link; /* Rx drop - software link down */ + uint32_t pkts_d_no_api_buf; /* Rx drop - no API buffers */ + } rx[NUM_RX_CHAN]; +} bkn_switch_info_t; + +/* PTCH_2 */ +#define BKN_DNX_PTCH_2_SIZE 2 +/* ITMH */ +#define BKN_DNX_ITMH_SIZE 5 +/* Modlue Header */ +#define BKN_DNX_MODULE_HEADER_SIZE 20 +/* FTMH */ +#define BKN_DNX_FTMH_SRC_SYS_PORT_AGGREGATE_MSB 17 +#define BKN_DNX_FTMH_SRC_SYS_PORT_AGGREGATE_NOF_BITS 16 +#define BKN_DNX_FTMH_PP_DSP_MSB 33 +#define BKN_DNX_FTMH_PP_DSP_NOF_BITS 8 +#define BKN_DNX_FTMH_ACTION_TYPE_MSB 43 +#define BKN_DNX_FTMH_ACTION_TYPE_NOF_BITS 2 +#define BKN_DNX_FTMH_PPH_TYPE_IS_TSH_EN_MSB 73 +#define BKN_DNX_FTMH_PPH_TYPE_IS_TSH_EN_NOF_BITS 1 +#define BKN_DNX_FTMH_PPH_TYPE_IS_PPH_EN_MSB 74 +#define BKN_DNX_FTMH_PPH_TYPE_IS_PPH_EN_NOF_BITS 1 +#define BKN_DNX_FTMH_TM_DST_EXT_PRESENT_MSB 75 +#define BKN_DNX_FTMH_TM_DST_EXT_PRESENT_NOF_BITS 1 +#define BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE_MSB 76 +#define BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE_NOF_BITS 1 +#define BKN_DNX_FTMH_FLOW_ID_EXT_SIZE_MSB 77 +#define BKN_DNX_FTMH_FLOW_ID_EXT_SIZE_NOF_BITS 1 +#define BKN_DNX_FTMH_BIER_BFR_EXT_SIZE_MSB 78 +#define BKN_DNX_FTMH_BIER_BFR_EXT_SIZE_NOF_BITS 1 +/* Fix Length for FTMH and Extension headers */ +#define BKN_DNX_FTMH_BASE_SIZE 10 +#define BKN_DNX_FTMH_BIER_BFR_EXT_SIZE 2 +#define BKN_DNX_FTMH_TM_DST_EXT_SIZE 3 +#define BKN_DNX_FTMH_FLOW_ID_EXT_SIZE 3 +#define BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE 6 +/* TSH */ +#define BKN_DNX_TSH_SIZE 4 +/* PPH */ +#define BKN_DNX_PPH_BASE_TYPE_9 9 +#define BKN_DNX_PPH_BASE_TYPE_10 10 +#define BKN_DNX_PPH_BASE_TYPE_12 12 +#define BKN_DNX_PPH_9_FORWARD_DOMAIN_MSB 5 +#define BKN_DNX_PPH_9_FORWARD_DOMAIN_NOF_BITS 16 +#define BKN_DNX_PPH_9_LEARN_EXT_PRESENT_MSB 53 +#define BKN_DNX_PPH_9_LEARN_EXT_PRESENT_NOF_BITS 1 +#define BKN_DNX_PPH_9_FHEI_SIZE_MSB 54 +#define BKN_DNX_PPH_9_FHEI_SIZE_NOF_BITS 2 +#define BKN_DNX_PPH_9_LIF_EXT_TYPE_MSB 56 +#define BKN_DNX_PPH_9_LIF_EXT_TYPE_NOF_BITS 3 +#define BKN_DNX_PPH_10_FORWARD_DOMAIN_MSB 9 +#define BKN_DNX_PPH_10_FORWARD_DOMAIN_NOF_BITS 16 +#define BKN_DNX_PPH_10_LEARN_EXT_PRESENT_MSB 61 +#define BKN_DNX_PPH_10_LEARN_EXT_PRESENT_NOF_BITS 1 +#define BKN_DNX_PPH_10_FHEI_SIZE_MSB 62 +#define BKN_DNX_PPH_10_FHEI_SIZE_NOF_BITS 2 +#define BKN_DNX_PPH_10_LIF_EXT_TYPE_MSB 64 +#define BKN_DNX_PPH_10_LIF_EXT_TYPE_NOF_BITS 3 +#define BKN_DNX_PPH_12_FORWARD_DOMAIN_MSB 21 +#define BKN_DNX_PPH_12_FORWARD_DOMAIN_NOF_BITS 18 +#define BKN_DNX_PPH_12_LEARN_EXT_PRESENT_MSB 77 +#define BKN_DNX_PPH_12_LEARN_EXT_PRESENT_NOF_BITS 1 +#define BKN_DNX_PPH_12_FHEI_SIZE_MSB 78 +#define BKN_DNX_PPH_12_FHEI_SIZE_NOF_BITS 2 +#define BKN_DNX_PPH_12_LIF_EXT_TYPE_MSB 80 +#define BKN_DNX_PPH_12_LIF_EXT_TYPE_NOF_BITS 3 +/* PPH.FHEI_TYPE */ +#define BKN_DNX_PPH_FHEI_TYPE_SZ0 1 +#define BKN_DNX_PPH_FHEI_TYPE_SZ1 2 +#define BKN_DNX_PPH_FHEI_TYPE_SZ2 3 +/* FHEI */ +#define BKN_DNX_PPH_FHEI_SZ0_SIZE 3 +#define BKN_DNX_PPH_FHEI_SZ1_SIZE 5 +#define BKN_DNX_PPH_FHEI_SZ2_SIZE 8 +#define BKN_DNX_PPH_FHEI_TRAP_5B_QUALIFIER_MSB 0 +#define BKN_DNX_PPH_FHEI_TRAP_5B_QUALIFIER_NOF_BITS 27 +#define BKN_DNX_PPH_FHEI_TRAP_5B_CODE_MSB 27 +#define BKN_DNX_PPH_FHEI_TRAP_5B_CODE_NOF_BITS 9 +#define BKN_DNX_PPH_FHEI_TRAP_5B_TYPE_MSB 36 +#define BKN_DNX_PPH_FHEI_TRAP_5B_TYPE_NOF_BITS 4 +/* PPH Extension */ +#define BKN_DNX_PPH_LEARN_EXT_SIZE 19 +/* UDH */ +#define BKN_DNX_UDH_DATA_TYPE_0_MSB 0 +#define BKN_DNX_UDH_DATA_TYPE_0_NOF_BITS 2 +#define BKN_DNX_UDH_DATA_TYPE_1_MSB 2 +#define BKN_DNX_UDH_DATA_TYPE_1_NOF_BITS 2 +#define BKN_DNX_UDH_DATA_TYPE_2_MSB 4 +#define BKN_DNX_UDH_DATA_TYPE_2_NOF_BITS 2 +#define BKN_DNX_UDH_DATA_TYPE_3_MSB 6 +#define BKN_DNX_UDH_DATA_TYPE_3_NOF_BITS 2 +#define BKN_DNX_UDH_BASE_SIZE 1 + +#define BKN_DPP_HDR_MAX_SIZE 40 +/* PTCH_2 */ +#define BKN_DPP_PTCH_2_SIZE 2 +/* ITMH */ +#define BKN_DPP_ITMH_SIZE 4 +/* FTMH */ +#define BKN_DPP_FTMH_LB_EXT_EN 0x1 +#define BKN_DPP_FTMH_STACKING_EXT_EN 0x2 +#define BKN_DPP_FTMH_SIZE_BYTE 9 +#define BKN_DPP_FTMH_LB_EXT_SIZE_BYTE 1 +#define BKN_DPP_FTMH_STACKING_SIZE_BYTE 2 +#define BKN_DPP_FTMH_DEST_EXT_SIZE_BYTE 2 +#define BKN_DPP_FTMH_LB_EXT_SIZE_BYTE 1 +#define BKN_DPP_FTMH_PKT_SIZE_MSB 0 +#define BKN_DPP_FTMH_PKT_SIZE_NOF_BITS 14 +#define BKN_DPP_FTMH_TC_MSB 14 +#define BKN_DPP_FTMH_TC_NOF_BITS 3 +#define BKN_DPP_FTMH_SRC_SYS_PORT_MSB 17 +#define BKN_DPP_FTMH_SRC_SYS_PORT_NOF_BITS 16 +#define BKN_DPP_FTMH_EXT_DSP_EXIST_MSB 68 +#define BKN_DPP_FTMH_EXT_DSP_EXIST_NOF_BITS 1 +#define BKN_DPP_FTMH_EXT_MSB 45 +#define BKN_DPP_FTMH_EXT_NOF_BITS 2 +#define BKN_DPP_FTMH_FIRST_EXT_MSB 72 +#define BKN_DPP_FTMH_ACTION_TYPE_MSB 43 +#define BKN_DPP_FTMH_ACTION_TYPE_NOF_BITS 2 +#define BKN_DPP_FTMH_PPH_TYPE_MSB 45 +#define BKN_DPP_FTMH_PPH_TYPE_NOF_BITS 2 + +/* PPH */ +#define BKN_DPP_PPH_SIZE_BYTE 7 +#define BKN_DPP_PPH_EEI_EXTENSION_PRESENT_MSB 0 +#define BKN_DPP_PPH_EEI_EXTENSION_PRESENT_NOF_BITS 1 +#define BKN_DPP_PPH_LEARN_EXENSION_PRESENT_MSB 1 +#define BKN_DPP_PPH_LEARN_EXENSION_PRESENT_NOF_BITS 1 +#define BKN_DPP_PPH_FHEI_SIZE_MSB 2 +#define BKN_DPP_PPH_FHEI_SIZE_NOF_BITS 2 +#define BKN_DPP_PPH_FORWARD_CODE_MSB 4 +#define BKN_DPP_PPH_FORWARD_CODE_NOF_BITS 4 +#define BKN_DPP_PPH_VSI_MSB 22 +#define BKN_DPP_PPH_VSI_NOF_BITS 16 +/* FHEI TRAP/SNOOP 3B */ +#define BKN_DPP_PPH_FHEI_3B_SIZE_BYTE 3 +#define BKN_DPP_PPH_FHEI_5B_SIZE_BYTE 5 +#define BKN_DPP_PPH_FHEI_8B_SIZE_BYTE 8 +#define BKN_DPP_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_QUALIFIER_MSB 0 +#define BKN_DPP_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_QUALIFIER_NOF_BITS 16 +#define BKN_DPP_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_MSB 16 +#define BKN_DPP_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_NOF_BITS 8 +/* PPH extension */ +#define BKN_DPP_PPH_EXPLICIT_EDITING_INFOMATION_EXTENSION_SIZE_BYTE 3 +#define BKN_DPP_PPH_LEARN_EXTENSION_SIZE_BYTE 5 + +/* ftmh action type. */ +typedef enum bkn_dpp_ftmh_action_type_e { + BKN_DPP_FTMH_ACTION_TYPE_FORWARD = 0, /* TM action is forward */ + BKN_DPP_FTMH_ACTION_TYPE_SNOOP = 1, /* TM action is snoop */ + BKN_DPP_FTMH_ACTION_TYPE_INBOUND_MIRROR = 2, /* TM action is inbound mirror. */ + BKN_DPP_FTMH_ACTION_TYPE_OUTBOUND_MIRROR = 3 /* TM action is outbound mirror. */ +}bkn_dpp_ftmh_action_type_t; + +/* ftmh dest extension. */ +typedef struct bkn_dpp_ftmh_dest_extension_s { + uint8 valid; /* Set if the extension is present */ + uint32_t dst_sys_port; /* Destination System Port */ +} bkn_dpp_ftmh_dest_extension_t; + +/* dnx packet */ +typedef struct bkn_dune_system_header_info_s { + uint32_t system_header_size; + struct { + uint32_t packet_size; /* Packet size in bytes */ + uint32_t action_type; /* Indicates if the copy is one of the Forward Snoop or Mirror packet copies */ + uint32_t pph_type; + uint32_t source_sys_port_aggregate; /* Source System port*/ + } ftmh; + struct { + uint32_t forward_domain; + uint32_t trap_qualifier; + uint32_t trap_id; + } internal; +} bkn_dune_system_header_info_t; + +#define PREV_IDX(_cur, _max) (((_cur) == 0) ? (_max) - 1 : (_cur) - 1) + +#if defined(CMIC_SOFT_BYTE_SWAP) + +#define CMIC_SWAP32(_x) ((((_x) & 0xff000000) >> 24) \ + | (((_x) & 0x00ff0000) >> 8) \ + | (((_x) & 0x0000ff00) << 8) \ + | (((_x) & 0x000000ff) << 24)) + +#define DEV_READ32(_d, _a, _p) \ + do { \ + uint32_t _data; \ + _data = (((volatile uint32_t *)(_d)->base_addr)[(_a)/4]); \ + *(_p) = CMIC_SWAP32(_data); \ + } while(0) + +#define DEV_WRITE32(_d, _a, _v) \ + do { \ + uint32_t _data = CMIC_SWAP32(_v); \ + ((volatile uint32_t *)(_d)->base_addr)[(_a)/4] = (_data); \ + } while(0) + +#else + +#define DEV_READ32(_d, _a, _p) \ + do { \ + *(_p) = (((volatile uint32_t *)(_d)->base_addr)[(_a)/4]); \ + } while(0) + +#define DEV_WRITE32(_d, _a, _v) \ + do { \ + ((volatile uint32_t *)(_d)->base_addr)[(_a)/4] = (_v); \ + } while(0) + +#endif /* defined(CMIC_SOFT_BYTE_SWAP) */ + +#define MEMORY_BARRIER smp_mb() + +/* Default random MAC address has Broadcom OUI with local admin bit set */ +static u8 bkn_dev_mac[6] = { 0x02, 0x10, 0x18, 0x00, 0x00, 0x00 }; + +static u8 bkn_rcpu_dmac[6]; +static u8 bkn_rcpu_smac[6]; + +/* Driver Proc Entry root */ +static struct proc_dir_entry *bkn_proc_root = NULL; + +typedef struct bkn_priv_s { + struct list_head list; + struct net_device_stats stats; + struct net_device *dev; + bkn_switch_info_t *sinfo; + int id; + int type; + int port; + int qnum; + uint32_t vlan; + uint32_t flags; + uint32_t cb_user_data; + uint8_t system_headers[27]; + uint32_t system_headers_size; +} bkn_priv_t; + +typedef struct bkn_filter_s { + struct list_head list; + int dev_no; + unsigned long hits; + kcom_filter_t kf; +} bkn_filter_t; + + +/* + * Multiple instance support in KNET + */ +static int _bkn_multi_inst = 0; +typedef struct { + wait_queue_head_t evt_wq; + int evt_wq_put; + int evt_wq_get; + uint32_t inst_id; +} bkn_evt_resource_t; + +static bkn_evt_resource_t _bkn_evt[LINUX_BDE_MAX_DEVICES]; + +static int bkn_knet_dev_init(int d); +static int bkn_knet_dev_reinit(int d); + +/* IOCTL debug counters */ +static int ioctl_cmd; +static int ioctl_evt; + +/* Switch devices */ +LIST_HEAD(_sinfo_list); + +/* Reallocation chunk size for netif array */ +#define NDEVS_CHUNK 64 + +/* User call-backs */ +static knet_skb_cb_f knet_rx_cb = NULL; +static knet_skb_cb_f knet_tx_cb = NULL; +static knet_filter_cb_f knet_filter_cb = NULL; +static knet_hw_tstamp_enable_cb_f knet_hw_tstamp_enable_cb = NULL; +static knet_hw_tstamp_enable_cb_f knet_hw_tstamp_disable_cb = NULL; +static knet_hw_tstamp_tx_time_get_cb_f knet_hw_tstamp_tx_time_get_cb = NULL; +static knet_hw_tstamp_tx_meta_get_cb_f knet_hw_tstamp_tx_meta_get_cb = NULL; +static knet_hw_tstamp_ptp_clock_index_cb_f knet_hw_tstamp_ptp_clock_index_cb = NULL; +static knet_hw_tstamp_rx_time_upscale_cb_f knet_hw_tstamp_rx_time_upscale_cb = NULL; + +/* + * Thread management + */ + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)) +static void +bkn_sleep(int clicks) +{ + wait_queue_head_t wq; + + init_waitqueue_head(&wq); + sleep_on_timeout(&wq, clicks); +} +#else +static void +bkn_sleep(int clicks) +{ + wait_queue_head_t wq; + + init_waitqueue_head(&wq); + wait_event_timeout(wq, 0, clicks); +} +#endif + +/* + * On XGS devices bit 15 fo the Transferred Bytes field in + * the DCBs is used to indicate that kernel processing is + * complete. Using this bit reduces the theoretically maximum + * supported packet size from 64K to 32K, but this is still + * adequate for 16K jumbo packets. + */ +#define SOC_DCB_KNET_DONE 0x8000 +#define SOC_DCB_KNET_COUNT_MASK 0x7fff +#define SOC_DCB_META_OFFSET 2 + +/* Default channel configuration */ +#define XGS_DMA_TX_CHAN 0 +#define XGS_DMA_RX_CHAN 1 + +/* CMIC registers */ +#define CMIC_DMA_CTRLr 0x00000100 +#define CMIC_DMA_STATr 0x00000104 +#define CMIC_DMA_DESC0r 0x00000110 +#define CMIC_IRQ_STATr 0x00000144 +#define CMIC_IRQ_MASKr 0x00000148 +#define CMIC_DEV_REV_IDr 0x00000178 + +/* CMIC interrupts reserved for kernel handler */ +#define CMIC_TXRX_IRQ_MASK 0x7f80 + +/* CMICm registers */ +#define CMICM_CMC_BASE 0x00031000 +#define CMICM_DMA_CTRLr (CMICM_CMC_BASE + 0x00000140) +#define CMICM_DMA_STATr (CMICM_CMC_BASE + 0x00000150) +#define CMICM_DMA_STAT_CLRr (CMICM_CMC_BASE + 0x000001a4) +#define CMICM_DMA_DESC0r (CMICM_CMC_BASE + 0x00000158) +#define CMICM_DMA_HALT_ADDRr (CMICM_CMC_BASE + 0x00000120) +#define CMICM_IRQ_STATr (CMICM_CMC_BASE + 0x00000400) +#define CMICM_IRQ_PCI_MASKr (CMICM_CMC_BASE + 0x00000414) +#define CMICM_IRQ_UC0_MASKr (CMICM_CMC_BASE + 0x00000428) +#define CMICM_DEV_REV_IDr 0x00010224 + +/* CMICm interrupts reserved for kernel handler */ +#define CMICM_TXRX_IRQ_MASK 0xff00 + +/* CMICd increased interrupts reserved for kernel handler */ +#define CMICD_CTRLD_IRQ_MASK 0x78000000 + +/* CMICx registers */ +#define CMICX_CMC_BASE 0x00000000 +#define CMICX_DMA_CTRLr (CMICX_CMC_BASE + 0x00002100) +#define CMICX_DMA_STATr (CMICX_CMC_BASE + 0x00002114) +#define CMICX_DMA_DESC_HIr (CMICX_CMC_BASE + 0x00002108) +#define CMICX_DMA_DESC_LOr (CMICX_CMC_BASE + 0x00002104) +#define CMICX_DMA_HALT_HIr (CMICX_CMC_BASE + 0x00002110) +#define CMICX_DMA_HALT_LOr (CMICX_CMC_BASE + 0x0000210c) +#define CMICX_IRQ_STATr (CMICX_CMC_BASE + 0x0000106c) +#define CMICX_IRQ_STAT_CLRr (CMICX_CMC_BASE + 0x00001074) +#define CMICX_IRQ_ENABr 0x18013100 +#define IHOST_GIC_GIC400_GICD_ISENABLERN_5r 0x10781114 +#define IHOST_GIC_GIC400_GICD_ICENABLERN_5r 0x10781194 + +/* CMICx interrupts reserved for kernel handler */ +#define CMICX_TXRX_IRQ_MASK 0xffffffff + +#define DEV_IS_CMICX(_sinfo) ((_sinfo)->cmic_type == 'x') +#define DEV_IS_CMICM(_sinfo) ((_sinfo)->cmic_type == 'm') +#define CDMA_CH(_d, _ch) ((_d)->cdma_channels & (1 << (_ch))) + +/* + * DMA_STAT: control bits + * + * xxx_SET and xxx_CLR can be WRITTEN to CMIC_DMA_STAT + * xxx_TST can be masked against values read from CMIC_DMA_STAT. + * Argument required: 0 <= ch <= 3 + */ +#define DS_DMA_ACTIVE(ch) (0x00040000 << (ch)) +#define DS_DMA_EN_SET(ch) (0x80|(ch)) +#define DS_DMA_EN_CLR(ch) (0x00|(ch)) +#define DS_DMA_EN_TST(ch) (0x00000001 << (ch)) + +#define DS_CHAIN_DONE_SET(ch) (0x80|(4+(ch))) +#define DS_CHAIN_DONE_CLR(ch) (0x00|(4+(ch))) +#define DS_CHAIN_DONE_TST(ch) (0x00000010 << (ch)) + +#define DS_DESC_DONE_SET(ch) (0x80|(8+(ch))) +#define DS_DESC_DONE_CLR(ch) (0x00|(8+(ch))) +#define DS_DESC_DONE_TST(ch) (0x00000100 << (ch)) + +#define DC_ABORT_DMA(ch) (0x04 << (8 * (ch))) + +#define DS_CMC_DESCRD_CMPLT_CLR(ch) (0x00000001 << (ch)) +#define DS_CMC_CTRLD_INT_CLR(ch) (0x00000100 << (ch)) +#define DS_CMC_DMA_ACTIVE(ch) (0x00000100 << (ch)) + +#define CMICX_DS_CMC_DESC_DONE(ch) (0x00000001 << ((ch) * 4)) +#define CMICX_DS_CMC_CHAIN_DONE(ch) (0x00000002 << ((ch) * 4)) +#define CMICX_DS_CMC_CTRLD_INT(ch) (0x00000008 << ((ch) * 4)) +#define CMICX_DS_CMC_DMA_CHAIN_DONE (0x00000001) +#define CMICX_DS_CMC_DMA_ACTIVE (0x00000002) + +#define DMA_TO_BUS_HI(dma) ((dma) | sinfo->dma_hi) +#define BUS_TO_DMA_HI(bus) ((bus) & ~sinfo->dma_hi) + +/* + * DMA_CTRL: control bits + */ +#define DC_CMC_DIRECTION (0x00000001) +#define DC_CMC_ENABLE (0x00000002) +#define DC_CMC_ABORT (0x00000004) +#define DC_CMC_CTRLD_INT (0x00000100) +#define DC_CMC_CONTINUOUS (0x00000200) + +#define CMICX_DC_CMC_DIRECTION (0x00000001) +#define CMICX_DC_CMC_ENABLE (0x00000002) +#define CMICX_DC_CMC_ABORT (0x00000004) +#define CMICX_DC_CMC_CTRLD_INT (0x00000080) +#define CMICX_DC_CMC_CONTINUOUS (0x00000100) + +/* + * Per-channel operations. + * These are the basis for the TX/RX functions + */ + +static inline void +xgs_dma_chain_clear(bkn_switch_info_t *sinfo, int chan) +{ + DBG_IRQ(("Clear chain on device %d chan %d\n", + sinfo->dev_no, chan)); + DEV_WRITE32(sinfo, CMIC_DMA_STATr, DS_DMA_EN_CLR(chan)); + DEV_WRITE32(sinfo, CMIC_DMA_STATr, DS_CHAIN_DONE_CLR(chan)); + + MEMORY_BARRIER; +} + +static inline void +xgs_dma_desc_clear(bkn_switch_info_t *sinfo, int chan) +{ + uint32_t val; + + DBG_IRQ(("Clear desc on device %d chan %d\n", + sinfo->dev_no, chan)); + DEV_WRITE32(sinfo, CMIC_DMA_STATr, DS_DESC_DONE_CLR(chan)); + + MEMORY_BARRIER; + + /* Flush write buffer */ + DEV_READ32(sinfo, CMIC_DMA_STATr, &val); + + MEMORY_BARRIER; +} + +static int +xgs_dma_chan_clear(bkn_switch_info_t *sinfo, int chan) +{ + xgs_dma_chain_clear(sinfo, chan); + xgs_dma_desc_clear(sinfo, chan); + + return 0; +} + +static int +xgs_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir) +{ + uint32_t cdc; + + DEV_READ32(sinfo, CMIC_DMA_CTRLr, &cdc); + + cdc &= ~(0x9 << (8 * chan)); + if (dir) { + cdc |= 0x1 << (8 * chan); + } else { + cdc |= 0x8 << (8 * chan); + } + + DEV_WRITE32(sinfo, CMIC_DMA_CTRLr, cdc); + + return 0; +} + +static int +xgs_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) +{ + /* Write the DCB address to the DESC address for this channel */ + DEV_WRITE32(sinfo, CMIC_DMA_DESC0r + 4 * chan, dcb); + + MEMORY_BARRIER; + + /* Kick it off */ + DEV_WRITE32(sinfo, CMIC_DMA_STATr, DS_DMA_EN_SET(chan)); + + MEMORY_BARRIER; + + return 0; +} + +static int +xgs_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls) +{ + uint32_t ctrl, dma_stat; + int p; + + /* Clear enable */ + DEV_WRITE32(sinfo, CMIC_DMA_STATr, DS_DMA_EN_CLR(chan)); + + MEMORY_BARRIER; + + /* Abort the channel */ + DEV_READ32(sinfo, CMIC_DMA_CTRLr, &ctrl); + DEV_WRITE32(sinfo, CMIC_DMA_CTRLr, ctrl | DC_ABORT_DMA(chan)); + + MEMORY_BARRIER; + + /* Poll for abort completion */ + for (p = 0; p < polls; p++) { + DEV_READ32(sinfo, CMIC_DMA_STATr, &dma_stat); + if (!(dma_stat & DS_DMA_ACTIVE(chan))) { + /* Restore previous control value */ + DEV_WRITE32(sinfo, CMIC_DMA_CTRLr, ctrl); + + MEMORY_BARRIER; + + /* Clear up channel */ + xgs_dma_chan_clear(sinfo, chan); + + return polls; + } + } + DBG_WARN(("DMA channel %d abort failed\n", chan)); + + return -1; +} + +static inline void +xgs_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) +{ + if (sinfo->napi_poll_mode) { + mask = 0; + } + lkbde_irq_mask_set(sinfo->dev_no | LKBDE_ISR2_DEV, CMIC_IRQ_MASKr, + mask, CMIC_TXRX_IRQ_MASK); +} + +static inline void +xgs_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t mask; + + if (chan == XGS_DMA_TX_CHAN) { + mask = 0x100; + } else { + mask = 0x180 << (2 * chan); + } + + sinfo->irq_mask |= mask; + + if (update_hw) { + xgs_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + +static inline void +xgs_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t mask; + + if (chan == XGS_DMA_TX_CHAN) { + mask = 0x100; + } else { + mask = 0x180 << (2 * chan); + } + + sinfo->irq_mask &= ~mask; + + if (update_hw) { + xgs_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + +static inline void +xgsm_dma_chain_clear(bkn_switch_info_t *sinfo, int chan) +{ + uint32_t cdc; + + /* Disabing DMA clears chain done */ + DEV_READ32(sinfo, CMICM_DMA_CTRLr + 4 * chan, &cdc); + cdc &= ~(DC_CMC_ENABLE | DC_CMC_ABORT); + DEV_WRITE32(sinfo, CMICM_DMA_CTRLr + 4 * chan, cdc); + + MEMORY_BARRIER; +} + +static inline void +xgsm_dma_desc_clear(bkn_switch_info_t *sinfo, int chan) +{ + uint32_t val; + + val = DS_CMC_DESCRD_CMPLT_CLR(chan); + if (CDMA_CH(sinfo, chan)) { + val |= DS_CMC_CTRLD_INT_CLR(chan); + } + DEV_WRITE32(sinfo, CMICM_DMA_STAT_CLRr, val); + + MEMORY_BARRIER; + + /* Flush write buffer */ + DEV_READ32(sinfo, CMICM_DMA_STAT_CLRr, &val); + + MEMORY_BARRIER; +} + +static int +xgsm_dma_chan_clear(bkn_switch_info_t *sinfo, int chan) +{ + xgsm_dma_chain_clear(sinfo, chan); + xgsm_dma_desc_clear(sinfo, chan); + + return 0; +} + +static inline void +xgsm_cdma_halt_set(bkn_switch_info_t *sinfo, int chan) +{ + DEV_WRITE32(sinfo, CMICM_DMA_HALT_ADDRr + 4 * chan, + sinfo->halt_addr[chan]); + + MEMORY_BARRIER; +} + +static int +xgsm_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir) +{ + uint32_t cdc; + + DEV_READ32(sinfo, CMICM_DMA_CTRLr + 4 * chan, &cdc); + cdc &= ~DC_CMC_DIRECTION; + if (dir) { + cdc |= DC_CMC_DIRECTION; + } + if (CDMA_CH(sinfo, chan)) { + cdc |= DC_CMC_CONTINUOUS | DC_CMC_CTRLD_INT; + xgsm_cdma_halt_set(sinfo, chan); + } + DEV_WRITE32(sinfo, CMICM_DMA_CTRLr + 4 * chan, cdc); + + return 0; +} + +static int +xgsm_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) +{ + uint32_t cdc; + + /* Write the DCB address to the DESC address for this channel */ + DEV_WRITE32(sinfo, CMICM_DMA_DESC0r + 4 * chan, dcb); + + MEMORY_BARRIER; + + /* Kick it off */ + DEV_READ32(sinfo, CMICM_DMA_CTRLr + 4 * chan, &cdc); + cdc |= DC_CMC_ENABLE; + DEV_WRITE32(sinfo, CMICM_DMA_CTRLr + 4 * chan, cdc); + + MEMORY_BARRIER; + + return 0; +} + +static int +xgsm_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls) +{ + uint32_t ctrl, dma_stat; + int p; + + /* Skip abort sequence if channel is not active */ + DEV_READ32(sinfo, CMICM_DMA_STATr, &dma_stat); + if (!(dma_stat & DS_CMC_DMA_ACTIVE(chan))) { + return 0; + } + + /* Abort the channel */ + DEV_READ32(sinfo, CMICM_DMA_CTRLr + 4 * chan, &ctrl); + ctrl |= (DC_CMC_ENABLE | DC_CMC_ABORT); + DEV_WRITE32(sinfo, CMICM_DMA_CTRLr + 4 * chan, ctrl); + + MEMORY_BARRIER; + + /* Poll for abort completion */ + for (p = 0; p < polls; p++) { + DEV_READ32(sinfo, CMICM_DMA_STATr, &dma_stat); + if (!(dma_stat & DS_CMC_DMA_ACTIVE(chan))) { + /* Clear up channel */ + xgsm_dma_chan_clear(sinfo, chan); + return polls; + } + } + DBG_WARN(("DMA channel %d abort failed\n", chan)); + + return -1; +} + +static inline void +xgsm_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) +{ + uint32_t irq_mask_reg = CMICM_IRQ_PCI_MASKr; + uint32_t ctrld_mask = 0; + + if (sinfo->napi_poll_mode) { + mask = 0; + } + if (sinfo->cpu_no == 1) { + irq_mask_reg = CMICM_IRQ_UC0_MASKr; + } + + /* Get the Controlled Interrupts mask for Continuous DMA mode */ + ctrld_mask |= (sinfo->cdma_channels << 27) & CMICD_CTRLD_IRQ_MASK; + + lkbde_irq_mask_set(sinfo->dev_no | LKBDE_ISR2_DEV, irq_mask_reg, + mask, CMICM_TXRX_IRQ_MASK | ctrld_mask); +} + +static inline void +xgsm_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t mask; + + if (CDMA_CH(sinfo, chan)) { + mask = 0x08000000 << chan; + } else { + if (chan == XGS_DMA_TX_CHAN) { + mask = 0x8000; + } else { + mask = 0xc000 >> (2 * chan); + } + } + + sinfo->irq_mask |= mask; + + if (update_hw) { + xgsm_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + +static inline void +xgsm_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t mask; + + if (CDMA_CH(sinfo, chan)) { + mask = 0x08000000 << chan; + } else { + if (chan == XGS_DMA_TX_CHAN) { + mask = 0x8000; + } else { + mask = 0xc000 >> (2 * chan); + } + } + + sinfo->irq_mask &= ~mask; + + if (update_hw) { + xgsm_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + +static inline void +xgsx_dma_chain_clear(bkn_switch_info_t *sinfo, int chan) +{ + uint32_t ctrl, stat; + + /* Disabing DMA clears chain done */ + DEV_READ32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl &= ~(CMICX_DC_CMC_ENABLE | CMICX_DC_CMC_ABORT); + DEV_WRITE32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, ctrl); + + stat = CMICX_DS_CMC_CHAIN_DONE(chan); + DEV_WRITE32(sinfo, CMICX_IRQ_STAT_CLRr, stat); + + MEMORY_BARRIER; + + /* Flush write buffer */ + DEV_READ32(sinfo, CMICX_IRQ_STAT_CLRr, &stat); + + MEMORY_BARRIER; +} + +static inline void +xgsx_dma_desc_clear(bkn_switch_info_t *sinfo, int chan) +{ + uint32_t stat; + + if (CDMA_CH(sinfo, chan)) { + stat = CMICX_DS_CMC_CTRLD_INT(chan); + } else { + stat = CMICX_DS_CMC_DESC_DONE(chan); + } + DEV_WRITE32(sinfo, CMICX_IRQ_STAT_CLRr, stat); + + MEMORY_BARRIER; + + /* Flush write buffer */ + DEV_READ32(sinfo, CMICX_IRQ_STAT_CLRr, &stat); + + MEMORY_BARRIER; +} + +static int +xgsx_dma_chan_clear(bkn_switch_info_t *sinfo, int chan) +{ + xgsx_dma_chain_clear(sinfo, chan); + xgsx_dma_desc_clear(sinfo, chan); + + return 0; +} + +static inline void +xgsx_cdma_halt_set(bkn_switch_info_t *sinfo, int chan) +{ + DEV_WRITE32(sinfo, CMICX_DMA_HALT_LOr + 0x80 * chan, + sinfo->halt_addr[chan]); + DEV_WRITE32(sinfo, CMICX_DMA_HALT_HIr + 0x80 * chan, + DMA_TO_BUS_HI(sinfo->halt_addr[chan] >> 32)); + + MEMORY_BARRIER; +} + +static int +xgsx_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir) +{ + uint32_t ctrl; + + DEV_READ32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl &= ~CMICX_DC_CMC_DIRECTION; + if (dir) { + ctrl |= CMICX_DC_CMC_DIRECTION; + } + if (CDMA_CH(sinfo, chan)) { + ctrl |= CMICX_DC_CMC_CONTINUOUS | CMICX_DC_CMC_CTRLD_INT; + xgsx_cdma_halt_set(sinfo, chan); + } + DEV_WRITE32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, ctrl); + + MEMORY_BARRIER; + + return 0; +} + +static int +xgsx_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) +{ + uint32_t ctrl; + + /* Write the DCB address to the DESC address for this channel */ + DEV_WRITE32(sinfo, CMICX_DMA_DESC_LOr + 0x80 * chan, dcb); + DEV_WRITE32(sinfo, CMICX_DMA_DESC_HIr + 0x80 * chan, DMA_TO_BUS_HI(dcb >> 32)); + + MEMORY_BARRIER; + + /* Kick it off */ + DEV_READ32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl |= CMICX_DC_CMC_ENABLE; + DEV_WRITE32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, ctrl); + + MEMORY_BARRIER; + + return 0; +} + +static int +xgsx_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls) +{ + uint32_t ctrl, stat; + int p; + + /* Skip abort sequence if channel is not active */ + DEV_READ32(sinfo, CMICX_DMA_STATr + 0x80 * chan, &stat); + if (!(stat & CMICX_DS_CMC_DMA_ACTIVE)) { + return 0; + } + + /* Abort the channel */ + DEV_READ32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl |= CMICX_DC_CMC_ENABLE | CMICX_DC_CMC_ABORT; + DEV_WRITE32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, ctrl); + + MEMORY_BARRIER; + + /* Poll for abort completion */ + for (p = 0; p < polls; p++) { + DEV_READ32(sinfo, CMICX_DMA_STATr + 0x80 * chan, &stat); + if (!(stat & CMICX_DS_CMC_DMA_ACTIVE)) { + /* Clear up channel */ + xgsx_dma_chan_clear(sinfo, chan); + return polls; + } + } + + DBG_WARN(("DMA channel %d abort failed\n", chan)); + + return -1; +} + +static inline void +xgsx_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) +{ + uint32_t irq_mask_reg = CMICX_IRQ_ENABr; + uint32_t irq_mask, irq_fmask, disable_mask; + + if (sinfo->napi_poll_mode) { + mask = 0; + } + + if (sinfo->cpu_no == 1) { + lkbde_irq_mask_get(sinfo->dev_no, &irq_mask, &irq_fmask); + disable_mask = ~mask & (irq_mask & irq_fmask); + if (disable_mask) { + lkbde_irq_mask_set(sinfo->dev_no | LKBDE_ISR2_DEV | LKBDE_IPROC_REG, + IHOST_GIC_GIC400_GICD_ICENABLERN_5r, disable_mask, CMICX_TXRX_IRQ_MASK); + } + irq_mask_reg = IHOST_GIC_GIC400_GICD_ISENABLERN_5r; + } + + lkbde_irq_mask_set(sinfo->dev_no | LKBDE_ISR2_DEV | LKBDE_IPROC_REG, + irq_mask_reg, mask, CMICX_TXRX_IRQ_MASK); +} + +static inline void +xgsx_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t mask; + + if (CDMA_CH(sinfo, chan)) { + mask = CMICX_DS_CMC_CTRLD_INT(chan); + } else { + if (chan == XGS_DMA_TX_CHAN) { + mask = CMICX_DS_CMC_CHAIN_DONE(chan); + } else { + mask = CMICX_DS_CMC_DESC_DONE(chan) | + CMICX_DS_CMC_CHAIN_DONE(chan); + } + } + + sinfo->irq_mask |= mask; + + if (update_hw) { + xgsx_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + +static inline void +xgsx_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t mask; + + if (CDMA_CH(sinfo, chan)) { + mask = CMICX_DS_CMC_CTRLD_INT(chan); + } else { + if (chan == XGS_DMA_TX_CHAN) { + mask = CMICX_DS_CMC_CHAIN_DONE(chan); + } else { + mask = CMICX_DS_CMC_DESC_DONE(chan) | + CMICX_DS_CMC_CHAIN_DONE(chan); + } + } + + sinfo->irq_mask &= ~mask; + + if (update_hw) { + xgsx_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + +static inline void +dev_dma_chain_clear(bkn_switch_info_t *sinfo, int chan) +{ + if (DEV_IS_CMICX(sinfo)) { + xgsx_dma_chain_clear(sinfo, chan); + } else if (DEV_IS_CMICM(sinfo)) { + xgsm_dma_chain_clear(sinfo, chan); + } else { + xgs_dma_chain_clear(sinfo, chan); + } +} + +static inline void +dev_dma_desc_clear(bkn_switch_info_t *sinfo, int chan) +{ + if (DEV_IS_CMICX(sinfo)) { + xgsx_dma_desc_clear(sinfo, chan); + } else if (DEV_IS_CMICM(sinfo)) { + xgsm_dma_desc_clear(sinfo, chan); + } else { + xgs_dma_desc_clear(sinfo, chan); + } +} + +static int +dev_dma_chan_clear(bkn_switch_info_t *sinfo, int chan) +{ + if (DEV_IS_CMICX(sinfo)) { + return xgsx_dma_chan_clear(sinfo, chan); + } else if (DEV_IS_CMICM(sinfo)) { + return xgsm_dma_chan_clear(sinfo, chan); + } else { + return xgs_dma_chan_clear(sinfo, chan); + } +} + +static void +dev_cdma_halt_set(bkn_switch_info_t *sinfo, int chan) +{ + if (DEV_IS_CMICX(sinfo)) { + xgsx_cdma_halt_set(sinfo, chan); + } else if (DEV_IS_CMICM(sinfo)) { + xgsm_cdma_halt_set(sinfo, chan); + } +} + +static int +dev_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir) +{ + if (DEV_IS_CMICX(sinfo)) { + return xgsx_dma_chan_init(sinfo, chan, dir); + } else if (DEV_IS_CMICM(sinfo)) { + return xgsm_dma_chan_init(sinfo, chan, dir); + } else { + return xgs_dma_chan_init(sinfo, chan, dir); + } +} + +static int +dev_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) +{ + if (DEV_IS_CMICX(sinfo)) { + return xgsx_dma_chan_start(sinfo, chan, dcb); + } else if (DEV_IS_CMICM(sinfo)) { + return xgsm_dma_chan_start(sinfo, chan, dcb); + } else { + return xgs_dma_chan_start(sinfo, chan, dcb); + } +} + +static int +dev_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls) +{ + if (DEV_IS_CMICX(sinfo)) { + return xgsx_dma_chan_abort(sinfo, chan, polls); + } else if (DEV_IS_CMICM(sinfo)) { + return xgsm_dma_chan_abort(sinfo, chan, polls); + } else { + return xgs_dma_chan_abort(sinfo, chan, polls); + } +} + +static inline void +dev_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) +{ + if (DEV_IS_CMICX(sinfo)) { + xgsx_irq_mask_set(sinfo, mask); + } else if (DEV_IS_CMICM(sinfo)) { + xgsm_irq_mask_set(sinfo, mask); + } else { + xgs_irq_mask_set(sinfo, mask); + } +} + +static inline void +dev_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + if (DEV_IS_CMICX(sinfo)) { + xgsx_irq_mask_enable(sinfo, chan, update_hw); + } else if (DEV_IS_CMICM(sinfo)) { + xgsm_irq_mask_enable(sinfo, chan, update_hw); + } else { + xgs_irq_mask_enable(sinfo, chan, update_hw); + } +} + +static void +dev_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + if (DEV_IS_CMICX(sinfo)) { + xgsx_irq_mask_disable(sinfo, chan, update_hw); + } else if (DEV_IS_CMICM(sinfo)) { + xgsm_irq_mask_disable(sinfo, chan, update_hw); + } else { + xgs_irq_mask_disable(sinfo, chan, update_hw); + } +} + +static int +bkn_alloc_dcbs(bkn_switch_info_t *sinfo) +{ + int dcb_size; + int tx_ring_size, rx_ring_size; + dma_addr_t dcb_dma = 0; + + dcb_size = sinfo->dcb_wsize * sizeof(uint32_t); + tx_ring_size = dcb_size * (MAX_TX_DCBS + 1); + rx_ring_size = dcb_size * (MAX_RX_DCBS + 1); + sinfo->dcb_mem_size = tx_ring_size + rx_ring_size * sinfo->rx_chans; + + sinfo->dcb_mem = DMA_ALLOC_COHERENT(sinfo->dma_dev, + sinfo->dcb_mem_size, + &dcb_dma); + if (sinfo->dcb_mem == NULL) { + gprintk("DCB memory allocation (%d bytes) failed.\n", + sinfo->dcb_mem_size); + return -ENOMEM; + } + sinfo->dcb_dma = (uint64_t)dcb_dma; + + return 0; +} + +static void +bkn_free_dcbs(bkn_switch_info_t *sinfo) +{ + if (sinfo->dcb_mem != NULL) { + DMA_FREE_COHERENT(sinfo->dma_dev, sinfo->dcb_mem_size, + sinfo->dcb_mem, (dma_addr_t)sinfo->dcb_dma); + sinfo->dcb_mem = NULL; + } +} + +static void +bkn_clean_tx_dcbs(bkn_switch_info_t *sinfo) +{ + bkn_desc_info_t *desc; + + DBG_DCB_TX(("Cleaning Tx DCBs (%d %d).\n", + sinfo->tx.cur, sinfo->tx.dirty)); + while (sinfo->tx.free < MAX_TX_DCBS) { + desc = &sinfo->tx.desc[sinfo->tx.dirty]; + if (desc->skb != NULL) { + DBG_SKB(("Cleaning Tx SKB from DCB %d.\n", + sinfo->tx.dirty)); + DMA_UNMAP_SINGLE(sinfo->dma_dev, + desc->skb_dma, desc->dma_size, + DMA_TODEV); + desc->skb_dma = 0; + dev_kfree_skb_any(desc->skb); + desc->skb = NULL; + } + if (++sinfo->tx.dirty >= MAX_TX_DCBS) { + sinfo->tx.dirty = 0; + } + sinfo->tx.free++; + } + sinfo->tx.api_active = 0; + DBG_DCB_TX(("Cleaned Tx DCBs (%d %d).\n", + sinfo->tx.cur, sinfo->tx.dirty)); +} + +static void +bkn_clean_rx_dcbs(bkn_switch_info_t *sinfo, int chan) +{ + bkn_desc_info_t *desc; + + DBG_DCB_RX(("Cleaning Rx%d DCBs (%d %d).\n", + chan, sinfo->rx[chan].cur, sinfo->rx[chan].dirty)); + while (sinfo->rx[chan].free) { + desc = &sinfo->rx[chan].desc[sinfo->rx[chan].dirty]; + if (desc->skb != NULL) { + DBG_SKB(("Cleaning Rx%d SKB from DCB %d.\n", + chan, sinfo->rx[chan].dirty)); + DMA_UNMAP_SINGLE(sinfo->dma_dev, + desc->skb_dma, desc->dma_size, + DMA_FROMDEV); + desc->skb_dma = 0; + dev_kfree_skb_any(desc->skb); + desc->skb = NULL; + } + if (++sinfo->rx[chan].dirty >= MAX_RX_DCBS) { + sinfo->rx[chan].dirty = 0; + } + sinfo->rx[chan].free--; + } + sinfo->rx[chan].running = 0; + sinfo->rx[chan].api_active = 0; + DBG_DCB_RX(("Cleaned Rx%d DCBs (%d %d).\n", + chan, sinfo->rx[chan].cur, sinfo->rx[chan].dirty)); +} + +static void +bkn_clean_dcbs(bkn_switch_info_t *sinfo) +{ + int chan; + + bkn_clean_tx_dcbs(sinfo); + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + bkn_clean_rx_dcbs(sinfo, chan); + } +} + +static void +bkn_init_dcbs(bkn_switch_info_t *sinfo) +{ + int dcb_size; + uint32_t *dcb_mem; + uint64_t dcb_dma; + bkn_desc_info_t *desc; + int idx; + int chan; + + memset(sinfo->dcb_mem, 0, sinfo->dcb_mem_size); + + dcb_size = sinfo->dcb_wsize * sizeof(uint32_t); + dcb_mem = sinfo->dcb_mem; + dcb_dma = sinfo->dcb_dma; + + for (idx = 0; idx < (MAX_TX_DCBS + 1); idx++) { + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + if (sinfo->cmic_type == 'x') { + dcb_mem[2] |= 1 << 24 | 1 << 16; + } else { + dcb_mem[1] |= 1 << 24 | 1 << 16; + } + if (idx == MAX_TX_DCBS) { + if (sinfo->cmic_type == 'x') { + dcb_mem[0] = sinfo->tx.desc[0].dcb_dma; + dcb_mem[1] = DMA_TO_BUS_HI(sinfo->tx.desc[0].dcb_dma >> 32); + dcb_mem[2] |= 1 << 18; + } else { + dcb_mem[0] = sinfo->tx.desc[0].dcb_dma; + dcb_mem[1] |= 1 << 18; + } + } + } + desc = &sinfo->tx.desc[idx]; + desc->dcb_mem = dcb_mem; + desc->dcb_dma = dcb_dma; + dcb_mem += sinfo->dcb_wsize; + dcb_dma += dcb_size; + } + sinfo->halt_addr[XGS_DMA_TX_CHAN] = sinfo->tx.desc[0].dcb_dma; + sinfo->tx.free = MAX_TX_DCBS; + sinfo->tx.cur = 0; + sinfo->tx.dirty = 0; + + DBG_DCB_TX(("Tx DCBs @ 0x%08x.\n", + (uint32_t)sinfo->tx.desc[0].dcb_dma)); + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + for (idx = 0; idx < (MAX_RX_DCBS + 1); idx++) { + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + if (sinfo->cmic_type == 'x') { + dcb_mem[2] |= 1 << 24 | 1 << 16; + } else { + dcb_mem[1] |= 1 << 24 | 1 << 16; + } + if (idx == MAX_RX_DCBS) { + if (sinfo->cmic_type == 'x') { + dcb_mem[0] = sinfo->rx[chan].desc[0].dcb_dma; + dcb_mem[1] = DMA_TO_BUS_HI(sinfo->rx[chan].desc[0].dcb_dma >> 32); + dcb_mem[2] |= 1 << 18; + } else { + dcb_mem[0] = sinfo->rx[chan].desc[0].dcb_dma; + dcb_mem[1] |= 1 << 18; + } + } + } + desc = &sinfo->rx[chan].desc[idx]; + desc->dcb_mem = dcb_mem; + desc->dcb_dma = dcb_dma; + dcb_mem += sinfo->dcb_wsize; + dcb_dma += dcb_size; + } + sinfo->halt_addr[XGS_DMA_RX_CHAN + chan] = sinfo->rx[chan].desc[MAX_RX_DCBS].dcb_dma; + sinfo->rx[chan].free = 0; + sinfo->rx[chan].cur = 0; + sinfo->rx[chan].dirty = 0; + + DBG_DCB_RX(("Rx%d DCBs @ 0x%08x.\n", + chan, (uint32_t)sinfo->rx[chan].desc[0].dcb_dma)); + } +} + +static void +bkn_dump_dcb(char *prefix, uint32_t *dcb, int wsize, int txrx) +{ + if (XGS_DMA_TX_CHAN == txrx) { + if (wsize > 4) { + DBG_DCB_TX(("%s: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x ... 0x%08x\n", + prefix, dcb[0], dcb[1], dcb[2], dcb[3], dcb[4], dcb[5], + dcb[wsize - 1])); + } else { + DBG_DCB_TX(("%s: 0x%08x 0x%08x 0x%08x 0x%08x\n", + prefix, dcb[0], dcb[1], dcb[2], dcb[3])); + } + } else { + if (wsize > 4) { + DBG_DCB_RX(("%s: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x ... 0x%08x\n", + prefix, dcb[0], dcb[1], dcb[2], dcb[3], dcb[4], dcb[5], + dcb[wsize - 1])); + } else { + DBG_DCB_RX(("%s: 0x%08x 0x%08x 0x%08x 0x%08x\n", + prefix, dcb[0], dcb[1], dcb[2], dcb[3])); + } + } +} + +static void +bkn_dump_pkt(uint8_t *data, int size, int txrx) +{ + int idx; + char str[128]; + + if (!(debug & DBG_LVL_PDMP) && + !(txrx == XGS_DMA_TX_CHAN && debug & DBG_LVL_PDMP_TX) && + !(txrx == XGS_DMA_RX_CHAN && debug & DBG_LVL_PDMP_RX)) { + return; + } + + for (idx = 0; idx < size; idx++) { + if ((idx & 0xf) == 0) { + sprintf(str, "%04x: ", idx); + } + if ((idx & 0xf) == 8) { + sprintf(&str[strlen(str)], "- "); + } + sprintf(&str[strlen(str)], "%02x ", data[idx]); + if ((idx & 0xf) == 0xf) { + sprintf(&str[strlen(str)], "\n"); + gprintk(str); + } + } + if ((idx & 0xf) != 0) { + sprintf(&str[strlen(str)], "\n"); + gprintk(str); + } +} + +static bkn_switch_info_t * +bkn_sinfo_from_unit(int unit) +{ + struct list_head *list; + bkn_switch_info_t *sinfo; + + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + if (sinfo->dev_no == unit || unit == -1) { + return sinfo; + } + } + return NULL; +} + +static void +bkn_cdma_goto(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) +{ + if (sinfo->basedev_suspended) { + return; + } + + /* Set the new halt location */ + sinfo->halt_addr[chan] = dcb; + dev_cdma_halt_set(sinfo, chan); +} + +static void +bkn_api_rx_restart(bkn_switch_info_t *sinfo, int chan) +{ + bkn_dcb_chain_t *dcb_chain; + int start_dma; + + if (sinfo->basedev_suspended) { + return; + } + + /* If resume from basedev suspended, there could be a suspended chain */ + if (sinfo->rx[chan].api_dcb_chain) { + return; + } + + /* Assume that driver lock is held */ + if (!list_empty(&sinfo->rx[chan].api_dcb_list)) { + dcb_chain = list_entry(sinfo->rx[chan].api_dcb_list.next, + bkn_dcb_chain_t, list); + start_dma = 0; + if (sinfo->rx[chan].use_rx_skb == 0) { + sinfo->rx[chan].chain_complete = 0; + start_dma = 1; + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan) && + sinfo->rx[chan].api_active) { + /* HW is running already, so we just move to the next chain */ + start_dma = 0; + } + } + sinfo->rx[chan].api_dcb_chain = dcb_chain; + sinfo->rx[chan].api_active = 1; + if (start_dma) { + DBG_DCB_RX(("Start API Rx DMA, first DCB @ 0x%08x (%d DCBs).\n", + (uint32_t)dcb_chain->dcb_dma, dcb_chain->dcb_cnt)); + dev_dma_chan_clear(sinfo, XGS_DMA_RX_CHAN + chan); + dev_irq_mask_enable(sinfo, XGS_DMA_RX_CHAN + chan, 1); + dev_dma_chan_start(sinfo, XGS_DMA_RX_CHAN + chan, dcb_chain->dcb_dma); + } + + list_del(&dcb_chain->list); + } +} + +static void +bkn_api_rx_chain_done(bkn_switch_info_t *sinfo, int chan) +{ + DBG_DCB_RX(("API Rx DMA chain done\n")); + + if (!CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + sinfo->rx[chan].api_active = 0; + } + if (sinfo->rx[chan].api_dcb_chain) { + kfree(sinfo->rx[chan].api_dcb_chain); + sinfo->rx[chan].api_dcb_chain = NULL; + } + bkn_api_rx_restart(sinfo, chan); +} + +static int +bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo, + int chan, bkn_desc_info_t *desc) +{ + bkn_dcb_chain_t *dcb_chain; + uint32_t *dcb; + uint32_t dcb_stat; + uint8_t *pkt; + uint64_t pkt_dma; + int pktlen; + int i; + bkn_evt_resource_t *evt; + + dcb_stat = desc->dcb_mem[sinfo->dcb_wsize-1]; + pktlen = dcb_stat & SOC_DCB_KNET_COUNT_MASK; + + dcb_chain = sinfo->rx[chan].api_dcb_chain; + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan) && dcb_chain == NULL) { + /* Last chain done, try to get a new one */ + bkn_api_rx_chain_done(sinfo, chan); + dcb_chain = sinfo->rx[chan].api_dcb_chain; + } + if (dcb_chain == NULL) { + DBG_WARN(("No Rx API buffers\n")); + sinfo->rx[chan].pkts_d_no_api_buf++; + return -1; + } + dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize]; + if ((sinfo->cmic_type == 'x' && (dcb[2] & 0xffff) < pktlen) || + (sinfo->cmic_type != 'x' && (dcb[1] & 0xffff) < pktlen)) { + DBG_WARN(("Rx API buffer too small\n")); + return -1; + } + if (sinfo->cmic_type == 'x') { + pkt_dma = BUS_TO_DMA_HI(dcb[1]); + pkt_dma = pkt_dma << 32 | dcb[0]; + } else { + pkt_dma = dcb[0]; + } + pkt = (uint8_t *)kernel_bde->p2l(sinfo->dev_no, (sal_paddr_t)pkt_dma); + if (pkt == NULL) { + DBG_WARN(("Invalid Rx API buffer\n")); + return -1; + } + + /* Copy packet data */ + memcpy(pkt, desc->skb->data, pktlen); + + /* Copy packet metadata and mark as done */ + if (sinfo->cmic_type != 'x') { + for (i = SOC_DCB_META_OFFSET; i < sinfo->dcb_wsize; i++) { + dcb[i] = desc->dcb_mem[i]; + } + } + dcb[sinfo->dcb_wsize-1] = dcb_stat | SOC_DCB_KNET_DONE; + MEMORY_BARRIER; + + dcb_chain->dcb_cur++; + + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize]; + if ((sinfo->cmic_type == 'x' && dcb[2] & (1 << 18)) || + (sinfo->cmic_type != 'x' && dcb[1] & (1 << 18))) { + /* Get the next chain if reload done */ + dcb[sinfo->dcb_wsize-1] |= 1 << 31 | SOC_DCB_KNET_DONE; + MEMORY_BARRIER; + bkn_api_rx_chain_done(sinfo, chan); + dcb_chain = sinfo->rx[chan].api_dcb_chain; + if (dcb_chain == NULL) { + sinfo->rx[chan].api_dcb_chain_end = NULL; + } + } + } else { + if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) || + (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) { + bkn_api_rx_chain_done(sinfo, chan); + } + } + + sinfo->dma_events |= KCOM_DMA_INFO_F_RX_DONE; + + evt = &_bkn_evt[sinfo->evt_idx]; + evt->evt_wq_put++; + wake_up_interruptible(&evt->evt_wq); + + return 0; +} + +static void +bkn_rx_refill(bkn_switch_info_t *sinfo, int chan) +{ + struct sk_buff *skb; + bkn_desc_info_t *desc; + uint32_t *dcb; + uint32_t resv_size = sinfo->cmic_type == 'x' ? RCPU_HDR_SIZE : RCPU_RX_ENCAP_SIZE; + uint32_t meta_size = sinfo->cmic_type == 'x' ? RCPU_RX_META_SIZE : 0; + int prev; + + if (sinfo->rx[chan].use_rx_skb == 0) { + /* Rx buffers are provided by BCM Rx API */ + return; + } + + if (!CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan) && + sinfo->rx[chan].tokens < MAX_RX_DCBS) { + /* Pause DMA for now */ + return; + } + + while (sinfo->rx[chan].free < MAX_RX_DCBS) { + desc = &sinfo->rx[chan].desc[sinfo->rx[chan].cur]; + if (desc->skb == NULL) { + skb = dev_alloc_skb(rx_buffer_size + RCPU_RX_ENCAP_SIZE); + if (skb == NULL) { + break; + } + skb_reserve(skb, resv_size); + desc->skb = skb; + } else { + DBG_DCB_RX(("Refill Rx%d SKB in DCB %d recycled.\n", + chan, sinfo->rx[chan].cur)); + } + skb = desc->skb; + desc->dma_size = rx_buffer_size + meta_size; +#ifdef KNET_NO_AXI_DMA_INVAL + + /* + * Cache invalidate may corrupt DMA memory on some iProc-based devices + * if the kernel is mapped to ACP memory. + */ + if (sinfo->pdev == NULL) { + desc->dma_size = 0; + } +#endif + desc->skb_dma = DMA_MAP_SINGLE(sinfo->dma_dev, + skb->data, desc->dma_size, + DMA_FROMDEV); + if (DMA_MAPPING_ERROR(sinfo->dma_dev, desc->skb_dma)) { + dev_kfree_skb_any(skb); + desc->skb = NULL; + break; + } + DBG_DCB_RX(("Refill Rx%d DCB %d (0x%08x).\n", + chan, sinfo->rx[chan].cur, (uint32_t)desc->skb_dma)); + dcb = desc->dcb_mem; + dcb[0] = desc->skb_dma; + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + if (sinfo->cmic_type == 'x') { + dcb[2] |= 1 << 24 | 1 << 16; + } else { + dcb[1] |= 1 << 24 | 1 << 16; + } + } else { + prev = PREV_IDX(sinfo->rx[chan].cur, MAX_RX_DCBS); + if (prev < (MAX_RX_DCBS - 1)) { + if (sinfo->cmic_type == 'x') { + sinfo->rx[chan].desc[prev].dcb_mem[2] |= 1 << 16; + } else { + sinfo->rx[chan].desc[prev].dcb_mem[1] |= 1 << 16; + } + } + } + if (sinfo->cmic_type == 'x') { + dcb[1] = DMA_TO_BUS_HI(desc->skb_dma >> 32); + dcb[2] |= rx_buffer_size + meta_size; + } else { + dcb[1] |= rx_buffer_size; + } + + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan) && + sinfo->rx[chan].tokens > MAX_RX_DCBS) { + /* DMA run to the new halt location */ + bkn_cdma_goto(sinfo, XGS_DMA_RX_CHAN + chan, desc->dcb_dma); + } + + if (++sinfo->rx[chan].cur >= MAX_RX_DCBS) { + sinfo->rx[chan].cur = 0; + } + sinfo->rx[chan].free++; + sinfo->rx[chan].tokens--; + } +} + +static int +bkn_rx_restart(bkn_switch_info_t *sinfo, int chan) +{ + bkn_desc_info_t *desc; + + if (sinfo->basedev_suspended) { + return 0; + } + + if (sinfo->rx[chan].running) { + return 0; + } + + if (sinfo->rx[chan].free < MAX_RX_DCBS) { + return 1; + } + + desc = &sinfo->rx[chan].desc[sinfo->rx[chan].dirty]; + sinfo->rx[chan].chain_complete = 0; + DBG_DCB_RX(("Restart Rx%d DMA, DCB @ 0x%08x (%d).\n", + chan, (uint32_t)desc->dcb_dma, sinfo->rx[chan].dirty)); + dev_dma_chan_clear(sinfo, XGS_DMA_RX_CHAN + chan); + dev_irq_mask_enable(sinfo, XGS_DMA_RX_CHAN + chan, 1); + dev_dma_chan_start(sinfo, XGS_DMA_RX_CHAN + chan, desc->dcb_dma); + sinfo->rx[chan].running = 1; + + /* Request one extra poll if chain was restarted during poll */ + if (sinfo->napi_poll_mode) { + sinfo->napi_poll_again = 1; + } + + return 0; +} + +static int +bkn_tx_dma_start(bkn_switch_info_t *sinfo) +{ + bkn_desc_info_t *desc; + + desc = &sinfo->tx.desc[sinfo->tx.cur]; + if (sinfo->tx.free == MAX_TX_DCBS) { + if (!sinfo->tx.api_active) { + DBG_DCB_TX(("Start Tx DMA, DCB @ 0x%08x (%d).\n", + (uint32_t)desc->dcb_dma, sinfo->tx.cur)); + dev_dma_chan_clear(sinfo, XGS_DMA_TX_CHAN); + dev_irq_mask_enable(sinfo, XGS_DMA_TX_CHAN, 1); + dev_dma_chan_start(sinfo, XGS_DMA_TX_CHAN, desc->dcb_dma); + } + } + + return 0; +} + +static int +bkn_dma_init(bkn_switch_info_t *sinfo) +{ + int chan; + + dev_dma_chan_init(sinfo, XGS_DMA_TX_CHAN, 1); + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + bkn_tx_dma_start(sinfo); + } + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + dev_dma_chan_init(sinfo, XGS_DMA_RX_CHAN + chan, 0); + bkn_rx_refill(sinfo, chan); + bkn_rx_restart(sinfo, chan); + } + + return 0; +} + +static int +bkn_dma_abort_tx(bkn_switch_info_t *sinfo) +{ + bkn_dcb_chain_t *dcb_chain; + + DBG_VERB(("Aborting Tx DMA.\n")); + + dev_irq_mask_disable(sinfo, XGS_DMA_TX_CHAN, 1); + + dev_dma_chan_abort(sinfo, XGS_DMA_TX_CHAN, 10000); + + if (sinfo->tx.api_dcb_chain) { + DBG_DCB_TX(("Freeing active Tx DCB chain.\n")); + kfree(sinfo->tx.api_dcb_chain); + sinfo->tx.api_dcb_chain = NULL; + } + while (!list_empty(&sinfo->tx.api_dcb_list)) { + dcb_chain = list_entry(sinfo->tx.api_dcb_list.next, + bkn_dcb_chain_t, list); + list_del(&dcb_chain->list); + DBG_DCB_TX(("Freeing Tx DCB chain.\n")); + kfree(dcb_chain); + } + sinfo->tx.api_dcb_chain_end = NULL; + + return 0; +} + +static int +bkn_dma_abort_rx(bkn_switch_info_t *sinfo, int chan) +{ + bkn_dcb_chain_t *dcb_chain; + + DBG_VERB(("Aborting Rx%d DMA.\n", chan)); + + dev_irq_mask_disable(sinfo, XGS_DMA_RX_CHAN + chan, 1); + + dev_dma_chan_abort(sinfo, XGS_DMA_RX_CHAN + chan, 10000); + + if (sinfo->rx[chan].api_dcb_chain) { + DBG_DCB_RX(("Freeing active Rx%d DCB chain.\n", chan)); + kfree(sinfo->rx[chan].api_dcb_chain); + sinfo->rx[chan].api_dcb_chain = NULL; + } + while (!list_empty(&sinfo->rx[chan].api_dcb_list)) { + dcb_chain = list_entry(sinfo->rx[chan].api_dcb_list.next, + bkn_dcb_chain_t, list); + list_del(&dcb_chain->list); + DBG_DCB_RX(("Freeing Rx%d DCB chain.\n", chan)); + kfree(dcb_chain); + } + sinfo->rx[chan].api_dcb_chain_end = NULL; + + return 0; +} + +static int +bkn_dma_abort(bkn_switch_info_t *sinfo) +{ + int chan; + + bkn_dma_abort_tx(sinfo); + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + bkn_dma_abort_rx(sinfo, chan); + } + + return 0; +} + +static int +device_is_dpp(bkn_switch_info_t *sinfo) +{ + int is_dpp = 0; + + is_dpp = (sinfo->dcb_type == 28) ? 1 : 0; + return is_dpp; +} + +static int +device_is_dnx(bkn_switch_info_t *sinfo) +{ + int is_dnx = 0; + + is_dnx = (sinfo->dcb_type == 39) ? 1 : 0; + return is_dnx; +} + +/* is DPP or is DNX*/ +static int +device_is_sand(bkn_switch_info_t *sinfo) +{ + int is_sand = 0; + + if (device_is_dpp(sinfo) || device_is_dnx(sinfo)) { + is_sand = 1; + } + return is_sand; +} + +static bkn_filter_t * +bkn_match_rx_pkt(bkn_switch_info_t *sinfo, uint8_t *pkt, int pktlen, + void *meta, int chan, bkn_filter_t *cbf) +{ + struct list_head *list; + bkn_filter_t *filter; + kcom_filter_t scratch, *kf; + uint8_t *oob = (uint8_t *)meta; + int size, wsize; + int idx, match; + + list_for_each(list, &sinfo->rxpf_list) { + filter = (bkn_filter_t *)list; + kf = &filter->kf; + memcpy(&scratch.data.b[0], + &oob[kf->oob_data_offset], kf->oob_data_size); + memcpy(&scratch.data.b[kf->oob_data_size], + &pkt[kf->pkt_data_offset], kf->pkt_data_size); + size = kf->oob_data_size + kf->pkt_data_size; + wsize = BYTES2WORDS(size); + DBG_VERB(("Filter: size = %d (%d), data = 0x%08x, mask = 0x%08x\n", + size, wsize, kf->data.w[0], kf->mask.w[0])); + + if (device_is_sand(sinfo)) { + DBG_DUNE(("Filter: size = %d (wsize %d)\n", size, wsize)); + for (idx = 0; idx < wsize; idx++) + { + DBG_DUNE(("OOB[%d]: 0x%08x [0x%08x]\n", idx, kf->data.w[idx], kf->mask.w[idx])); + } + DBG_DUNE(("Meta Data [+ Selected Raw packet data]\n")); + for (idx = 0; idx < wsize; idx++) + { + DBG_DUNE(("Scratch[%d]: 0x%08x\n", idx, scratch.data.w[idx])); + } + } + + match = 1; + if (match) { + if (device_is_dnx(sinfo)) + { + /* + * Mutliple RX channels are enabled on JR2 and above devices + * Bind between priority 0 and RX channel 0 is not checked, then all enabled RX channels can receive packets. + */ + if (kf->priority && (kf->priority < (num_rx_prio * sinfo->rx_chans))) { + if (kf->priority < (num_rx_prio * chan) || + kf->priority >= (num_rx_prio * (chan + 1))) { + match = 0; + } + } + } + else { + if (kf->priority < (num_rx_prio * sinfo->rx_chans)) { + if (kf->priority < (num_rx_prio * chan) || + kf->priority >= (num_rx_prio * (chan + 1))) { + match = 0; + } + } + } + } + if (match) { + for (idx = 0; idx < wsize; idx++) { + scratch.data.w[idx] &= kf->mask.w[idx]; + if (scratch.data.w[idx] != kf->data.w[idx]) { + match = 0; + break; + } + } + } + if (match) { + if (kf->dest_type == KCOM_DEST_T_CB) { + /* Check for custom filters */ + if (knet_filter_cb != NULL && cbf != NULL) { + memset(cbf, 0, sizeof(*cbf)); + memcpy(&cbf->kf, kf, sizeof(cbf->kf)); + if (knet_filter_cb(pkt, pktlen, sinfo->dev_no, + meta, chan, &cbf->kf)) { + filter->hits++; + return cbf; + } + } else { + DBG_FLTR(("Match, but not filter callback\n")); + } + } else { + filter->hits++; + return filter; + } + } + } + + return NULL; +} + +static bkn_priv_t * +bkn_netif_lookup(bkn_switch_info_t *sinfo, int id) +{ + struct list_head *list; + bkn_priv_t *priv; + int found; + + /* Fast path */ + if (id < sinfo->ndev_max) { + if (sinfo->ndevs[id] != NULL) { + DBG_NDEV(("Look up netif ID %d successful\n", id)); + return netdev_priv(sinfo->ndevs[id]); + } + } + + /* Slow path - should normally not get here */ + found = 0; + priv = NULL; + list_for_each(list, &sinfo->ndev_list) { + priv = (bkn_priv_t *)list; + if (priv->id == id) { + found = 1; + break; + } + } + if (found && priv != NULL) { + return priv; + } + return NULL; +} + +static int +bkn_hw_tstamp_rx_set(bkn_switch_info_t *sinfo, struct sk_buff *skb, uint32 *meta) +{ + struct skb_shared_hwtstamps *shhwtstamps = skb_hwtstamps(skb); + uint32_t *md = meta; + uint64_t ts = 0; + + switch (sinfo->dcb_type) { + case 26: + case 32: + case 33: + ts = md[14]; + ts = ts << 32 | md[12]; + break; + case 36: + ts = md[10]; + break; + case 38: + ts = md[4] & 0xffff; + ts = ts << 32 | md[5]; + break; + default: + return -1; + } + + if (knet_hw_tstamp_rx_time_upscale_cb) { + if (knet_hw_tstamp_rx_time_upscale_cb(sinfo->dev_no, &ts) < 0) { + return -1; + } + } + + memset(shhwtstamps, 0, sizeof(*shhwtstamps)); + shhwtstamps->hwtstamp = ns_to_ktime(be64_to_cpu(ts)); + + return 0; +} + +static int +bkn_add_rcpu_encap(bkn_switch_info_t *sinfo, struct sk_buff *skb, void *meta) +{ + int pktlen = skb->len; + uint32_t *dmeta, *smeta, wsize, psize; + int idx; + + /* Add and clear RCPU encapsulation */ + if (sinfo->cmic_type == 'x') { + psize = RCPU_HDR_SIZE + sinfo->pkt_hdr_size; + skb_push(skb, psize); + memset(skb->data, 0, RCPU_HDR_SIZE); + } else { + psize = RCPU_RX_ENCAP_SIZE; + skb_push(skb, psize); + memset(skb->data, 0, RCPU_RX_ENCAP_SIZE); + } + + /* RCPU Header */ + memcpy(skb->data, &skb->data[psize], 12); + if (rcpu_dmac != NULL) { + memcpy(skb->data, bkn_rcpu_dmac, 6); + } + if (rcpu_smac != NULL) { + memcpy(&skb->data[6], bkn_rcpu_smac, 6); + } + skb->data[12] = 0x81; + skb->data[14] = rcpu_vlan >> 8; + skb->data[15] = rcpu_vlan & 0xff; + skb->data[16] = rcpu_ethertype >> 8; + skb->data[17] = rcpu_ethertype & 0xff; + skb->data[18] = sinfo->rcpu_sig >> 8; + skb->data[19] = sinfo->rcpu_sig & 0xff; + skb->data[20] = RCPU_OPCODE_RX; + skb->data[21] = RCPU_F_MODHDR; + skb->data[24] = pktlen >> 8; + skb->data[25] = pktlen & 0xff; + + /* Meta data */ + dmeta = (uint32_t *)&skb->data[RCPU_HDR_SIZE]; + smeta = sinfo->cmic_type == 'x' ? (uint32_t *)meta : (uint32_t *)meta + 2; + wsize = sinfo->cmic_type == 'x' ? sinfo->pkt_hdr_size / 4 : sinfo->dcb_wsize - 3; + for (idx = 0; idx < wsize; idx++) { + dmeta[idx] = htonl(smeta[idx]); + } + + return 0; +} + +static void +bkn_eth_type_update(struct sk_buff *skb, int ethertype) +{ +#if defined(PM_ETH_TYPE) && defined(PM_FC_TYPE) + /* Optionally override standard protocol */ + skb->protocol = PM_ETH_TYPE; + if (ethertype == ETH_P_FCOE) { + skb->protocol = PM_FC_TYPE; + } +#endif +} + +#define BKN_DNX_BIT(x) (1<<(x)) +#define BKN_DNX_RBIT(x) (~(1<<(x))) +#ifdef __LITTLE_ENDIAN +#define BKN_DNX_BYTE_SWAP(x) (x) +#else +#define BKN_DNX_BYTE_SWAP(x) ((((x) << 24)) | (((x) & 0xff00) << 8) | (((x) & 0xff0000) >> 8) | (((x) >> 24))) +#endif + +static int +packet_is_untagged(uint16_t tpid) +{ + int is_untagged = 0; + + /* 0x8100 is used in 802.1Q */ + /* 0x8848 is used in 802.11ad, the dtag tpid can be set to anything besides 0x8848, 0x9100 is a typical value, but couldn't cover all scenarios. */ + is_untagged = ((tpid != 0x8100) && (tpid != 0x8848) && (tpid != 0x9100)); + return is_untagged; +} + +static void +bkn_bitstream_set_field(uint32_t *input_buffer, uint32_t start_bit, uint32_t nof_bits, uint32_t field) +{ + uint32_t place; + uint32_t field_bit_i; + uint32_t bit_indicator; + + if( nof_bits > 32) + { + return; + } + + for( place=start_bit, field_bit_i = 0; field_bit_i< nof_bits; ++place, ++field_bit_i) + { + bit_indicator = field & BKN_DNX_BIT(nof_bits-field_bit_i-1); + if(bit_indicator) + { + input_buffer[place>>5] |= (0x80000000 >> (place & 0x0000001F)); + } + else + { + input_buffer[place>>5] &= ~(0x80000000 >> (place & 0x0000001F)); + } + } + return; +} + +static void +bkn_bitstream_get_field(uint8_t *input_buffer, uint32_t start_bit, uint32_t nof_bits, uint32_t *output_value) +{ + uint32_t idx; + uint32_t buf_sizes=0; + uint32_t tmp_output_value[2]={0}; + uint32_t first_byte_ndx; + uint32_t last_byte_ndx; + uint32_t place; + uint32_t field_bit_i; + uint8_t *tmp_output_value_u8_ptr = (uint8_t*)&tmp_output_value; + uint32_t bit_indicator; + + if (nof_bits > 32) + { + return; + } + + first_byte_ndx = start_bit / 8; + last_byte_ndx = ((start_bit + nof_bits - 1) / 8); + *output_value=0; + + /* get 32 bit value, MSB */ + for (idx = first_byte_ndx; idx <= last_byte_ndx; ++idx) + { + tmp_output_value_u8_ptr[last_byte_ndx - idx] = input_buffer[idx]; + buf_sizes += 8; + } + tmp_output_value[0] = BKN_DNX_BYTE_SWAP(tmp_output_value[0]); + if (last_byte_ndx > 4) + { + tmp_output_value[1] = BKN_DNX_BYTE_SWAP(tmp_output_value[1]); + } + + place = buf_sizes - (start_bit % 8 + nof_bits); + for (field_bit_i = 0; field_bit_i< nof_bits; ++place, ++field_bit_i) + { + uint32_t result; + result = tmp_output_value[place>>5] & BKN_DNX_BIT(place & 0x0000001F); + if (result) + { + bit_indicator = 1; + } else { + bit_indicator = 0; + } + *output_value |= bit_indicator << field_bit_i; + } + return; +} + +static void +bkn_dpp_packet_parse_ftmh(bkn_switch_info_t *sinfo, uint8_t hdr_buff[], bkn_dune_system_header_info_t *packet_info) +{ + uint32_t header_ptr = 0; + uint32_t dsp_ext_exist=0; + uint32_t fld_val; + + header_ptr = packet_info->system_header_size; + + /* Packet-size */ + bkn_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DPP_FTMH_PKT_SIZE_MSB, + BKN_DPP_FTMH_PKT_SIZE_NOF_BITS, + &fld_val); + packet_info->ftmh.packet_size = fld_val; + /* Source-system-port-aggregate */ + bkn_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DPP_FTMH_SRC_SYS_PORT_MSB, + BKN_DPP_FTMH_SRC_SYS_PORT_NOF_BITS, + &fld_val); + packet_info->ftmh.source_sys_port_aggregate = fld_val; + /* TM-action-type */ + bkn_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DPP_FTMH_ACTION_TYPE_MSB, + BKN_DPP_FTMH_ACTION_TYPE_NOF_BITS, + &fld_val); + packet_info->ftmh.action_type = fld_val; + /* PPH-type */ + bkn_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DPP_FTMH_PPH_TYPE_MSB, + BKN_DPP_FTMH_PPH_TYPE_NOF_BITS, + &fld_val); + packet_info->ftmh.pph_type = fld_val; + + packet_info->system_header_size += BKN_DPP_FTMH_SIZE_BYTE; + DBG_DUNE(("FTMH(%d) Packet-size %d Action-type %d PPH-type %d Source-system-port 0x%x\n", + packet_info->system_header_size, packet_info->ftmh.packet_size, packet_info->ftmh.action_type, + packet_info->ftmh.pph_type, packet_info->ftmh.source_sys_port_aggregate)); + + /* LB-Key ext */ + if ((sinfo->pkt_hdr_size & BKN_DPP_FTMH_LB_EXT_EN) == BKN_DPP_FTMH_LB_EXT_EN) + { + packet_info->system_header_size += BKN_DPP_FTMH_LB_EXT_SIZE_BYTE; + DBG_DUNE(("FTMH(%d) FTMH LB-Key Extension is present\n", packet_info->system_header_size)); + } + /* DSP ext*/ + fld_val = 0; + bkn_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DPP_FTMH_EXT_DSP_EXIST_MSB, + BKN_DPP_FTMH_EXT_DSP_EXIST_NOF_BITS, + &dsp_ext_exist); + if (dsp_ext_exist) + { + packet_info->system_header_size += BKN_DPP_FTMH_DEST_EXT_SIZE_BYTE; + DBG_DUNE(("FTMH(%d) DSP-extension-present 1\n", packet_info->system_header_size)); + } + + /* stacking ext */ + if ((sinfo->pkt_hdr_size & BKN_DPP_FTMH_STACKING_EXT_EN) == BKN_DPP_FTMH_STACKING_EXT_EN) + { + packet_info->system_header_size += BKN_DPP_FTMH_STACKING_SIZE_BYTE; + DBG_DUNE(("FTMH(%d) FTMH Stacking Extension is present\n", packet_info->system_header_size)); + } + return; +} + +static void +bkn_dpp_packet_parse_internal(bkn_switch_info_t *sinfo, uint8_t hdr_buff[], bkn_dune_system_header_info_t *packet_info) +{ + uint32_t header_ptr = 0; + uint32_t fld_val; + uint32_t eei_extension_present = 0; + uint32_t learn_extension_present = 0; + uint32_t fhei_size = 0; + uint32_t forward_code; + uint8_t is_trapped = 0; + + header_ptr = packet_info->system_header_size; + + bkn_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DPP_PPH_EEI_EXTENSION_PRESENT_MSB, + BKN_DPP_PPH_EEI_EXTENSION_PRESENT_NOF_BITS, + &eei_extension_present); + bkn_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DPP_PPH_LEARN_EXENSION_PRESENT_MSB, + BKN_DPP_PPH_LEARN_EXENSION_PRESENT_NOF_BITS, + &learn_extension_present); + bkn_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DPP_PPH_FHEI_SIZE_MSB, + BKN_DPP_PPH_FHEI_SIZE_NOF_BITS, + &fhei_size); + bkn_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DPP_PPH_FORWARD_CODE_MSB, + BKN_DPP_PPH_FORWARD_CODE_NOF_BITS, + &forward_code); + /* 7: CPU-Trap */ + is_trapped = (uint8_t)(forward_code == 7); + + bkn_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DPP_PPH_VSI_MSB, + BKN_DPP_PPH_VSI_NOF_BITS, + &fld_val); + packet_info->internal.forward_domain = fld_val; + + /* size of PPH base is 7 */ + packet_info->system_header_size += BKN_DPP_PPH_SIZE_BYTE; + header_ptr = packet_info->system_header_size; + + DBG_DUNE(("PPH(%d) Forward-Code %d EEI-Extension %d Learn-Extension %d VSI %d FHEI-size %d\n", packet_info->system_header_size, + forward_code, eei_extension_present, learn_extension_present, packet_info->internal.forward_domain, fhei_size)); + + /* PPH extension */ + if (is_trapped && (fhei_size == 1)) + { + /* CPU trap code qualifier */ + bkn_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DPP_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_QUALIFIER_MSB, + BKN_DPP_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_QUALIFIER_NOF_BITS, + &fld_val); + packet_info->internal.trap_qualifier = fld_val; + /* CPU trap code */ + bkn_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DPP_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_MSB, + BKN_DPP_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_NOF_BITS, + &fld_val); + packet_info->internal.trap_id = fld_val; + } + switch(fhei_size) { + case 1: + packet_info->system_header_size += BKN_DPP_PPH_FHEI_3B_SIZE_BYTE; + break; + case 2: + packet_info->system_header_size += BKN_DPP_PPH_FHEI_5B_SIZE_BYTE; + break; + case 3: + packet_info->system_header_size += BKN_DPP_PPH_FHEI_8B_SIZE_BYTE; + break; + default: + break; + } + if (eei_extension_present) { + packet_info->system_header_size += BKN_DPP_PPH_EXPLICIT_EDITING_INFOMATION_EXTENSION_SIZE_BYTE; + } + if (learn_extension_present) { + packet_info->system_header_size += BKN_DPP_PPH_LEARN_EXTENSION_SIZE_BYTE; + } + + DBG_DUNE(("FHEI(%d) trap_qualifier 0x%x trap_id 0x%x\n", packet_info->system_header_size, packet_info->internal.trap_qualifier, packet_info->internal.trap_id)); + return; +} + +static int +bkn_dpp_packet_header_parse(bkn_switch_info_t *sinfo, uint8 *buff, uint32_t buff_len, bkn_dune_system_header_info_t *packet_info) +{ + uint8_t hdr_buff[BKN_DPP_HDR_MAX_SIZE]; + uint32_t hdr_size; + uint8_t has_internal = 0; + + if ((buff == NULL) || (packet_info == NULL)) { + return -1; + } + hdr_size = buff_len < BKN_DPP_HDR_MAX_SIZE ? buff_len: BKN_DPP_HDR_MAX_SIZE; + memcpy(hdr_buff, buff, hdr_size); + + /* FTMH */ + bkn_dpp_packet_parse_ftmh(sinfo, hdr_buff, packet_info); + if (packet_info->ftmh.packet_size != (buff_len + 2)) { + DBG_DUNE(("FTMH packet size verfication failed, %d-%d\n", packet_info->ftmh.packet_size, buff_len)); + memset(packet_info, 0, sizeof(bkn_dune_system_header_info_t)); + return -1; + } + switch (packet_info->ftmh.pph_type) { + case 0: + has_internal = 0; + break; + case 1: + has_internal = 1; + break; + case 2: /* PPH OAM-TS only */ + case 3: /* PPH Base + OAM-TS */ + /* OTSH immediately follows the FTMH when present */ + packet_info->system_header_size += 6; + DBG_DUNE(("FTMH + OAM-TS(%d)\n", packet_info->system_header_size)); + has_internal = 1; + break; + default: + break; + } + + if (has_internal) { + bkn_dpp_packet_parse_internal(sinfo, &hdr_buff[0], packet_info); + } + + /* ignore packets with a double set of FTMH,internals */ + /* ignore the user header size */ + return 0; +} + +static int +bkn_dnx_packet_header_parse(bkn_switch_info_t *sinfo, uint8 *buf, uint32_t buf_len, bkn_dune_system_header_info_t *packet_info) +{ + uint32_t fld_val; + uint32_t hdr_size = 0; + uint8_t tm_dst_ext_present = 0; + uint8_t app_specific_ext_size = 0; + uint8_t flow_id_ext_size = 0; + uint8_t bier_bfr_ext_size = 0; + uint8_t is_pph_en = 0; + uint8_t is_tsh_en = 0; + + if ((buf == NULL) || (packet_info == NULL)) { + return -1; + } + + /* FTMH: Source-System-Port-Aggregate */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_FTMH_SRC_SYS_PORT_AGGREGATE_MSB, + BKN_DNX_FTMH_SRC_SYS_PORT_AGGREGATE_NOF_BITS, + &fld_val); + packet_info->ftmh.source_sys_port_aggregate = fld_val; + /* FTMH: Action-Type */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_FTMH_ACTION_TYPE_MSB, + BKN_DNX_FTMH_ACTION_TYPE_NOF_BITS, + &fld_val); + packet_info->ftmh.action_type = fld_val; + /* FTMH: PPH-Type TSH */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_FTMH_PPH_TYPE_IS_TSH_EN_MSB, + BKN_DNX_FTMH_PPH_TYPE_IS_TSH_EN_NOF_BITS, + &fld_val); + is_tsh_en = fld_val; + /* FTMH: PPH-Type PPH base */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_FTMH_PPH_TYPE_IS_PPH_EN_MSB, + BKN_DNX_FTMH_PPH_TYPE_IS_PPH_EN_NOF_BITS, + &fld_val); + is_pph_en = fld_val; + /* FTMH: TM-Destination-Extension-Present */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_FTMH_TM_DST_EXT_PRESENT_MSB, + BKN_DNX_FTMH_TM_DST_EXT_PRESENT_NOF_BITS, + &fld_val); + tm_dst_ext_present = fld_val; + /* FTMH: Application-Specific-Extension-Size */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE_MSB, + BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE_NOF_BITS, + &fld_val); + app_specific_ext_size = fld_val; + /* FTMH: Flow-ID-Extension-Size */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_FTMH_FLOW_ID_EXT_SIZE_MSB, + BKN_DNX_FTMH_FLOW_ID_EXT_SIZE_NOF_BITS, + &fld_val); + flow_id_ext_size = fld_val; + /* FTMH: BIER-BFR-Extension-Size */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_FTMH_BIER_BFR_EXT_SIZE_MSB, + BKN_DNX_FTMH_BIER_BFR_EXT_SIZE_NOF_BITS, + &fld_val); + bier_bfr_ext_size = fld_val; + + hdr_size = BKN_DNX_FTMH_BASE_SIZE; + + DBG_DUNE(("FTMH(%d) source-system-port 0x%x action_type %d is_tsh_en %d is_pph_en %d\n", + hdr_size, packet_info->ftmh.source_sys_port_aggregate, packet_info->ftmh.action_type, is_tsh_en, is_pph_en)); + + /* FTMH LB-Key Extension */ + if (sinfo->ftmh_lb_key_ext_size > 0) + { + hdr_size += sinfo->ftmh_lb_key_ext_size; + DBG_DUNE(("FTMH LB-Key Extension(%d) is present\n", sinfo->ftmh_lb_key_ext_size)); + } + /* FTMH Stacking Extension */ + if (sinfo->ftmh_stacking_ext_size > 0) + { + hdr_size += sinfo->ftmh_stacking_ext_size; + DBG_DUNE(("FTMH Stacking Extension(%d) is present\n", sinfo->ftmh_stacking_ext_size)); + } + /* FTMH BIER BFR Extension */ + if (bier_bfr_ext_size > 0) + { + hdr_size += BKN_DNX_FTMH_BIER_BFR_EXT_SIZE; + DBG_DUNE(("FTMH BIER BFR Extension(2) is present\n")); + } + /* FTMH TM Destination Extension */ + if (tm_dst_ext_present > 0) + { + hdr_size += BKN_DNX_FTMH_TM_DST_EXT_SIZE; + DBG_DUNE(("FTMH TM Destination Extension(3) is present\n")); + } + /* FTMH Application Specific Extension */ + if (app_specific_ext_size > 0) + { + hdr_size += BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE; + DBG_DUNE(("FTMH Application Specific Extension(6) is present\n")); + } + /* FTMH Flow-ID Extension */ + if (flow_id_ext_size > 0) + { + hdr_size += BKN_DNX_FTMH_FLOW_ID_EXT_SIZE; + DBG_DUNE(("FTMH Flow-ID Extension(3) is present\n")); + } + + /* Given the packet is trapped to CPU */ + + /* Time-Stamp Header */ + if (is_tsh_en == TRUE) + { + hdr_size += BKN_DNX_TSH_SIZE; + DBG_DUNE(("Time-Stamp Header(4) is present\n")); + } + + /* Packet Processing Header */ + if (is_pph_en) + { + uint8_t learn_ext_present; + uint8_t fhei_size; + uint8_t lif_ext_type; + + switch (sinfo->pph_base_size) + { + case BKN_DNX_PPH_BASE_TYPE_9: + /* FTMH: Forward-Domain */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_9_FORWARD_DOMAIN_MSB, + BKN_DNX_PPH_9_FORWARD_DOMAIN_NOF_BITS, + &fld_val); + packet_info->internal.forward_domain = fld_val; + /* FTMH: Learn-Extension-Present */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_9_LEARN_EXT_PRESENT_MSB, + BKN_DNX_PPH_9_LEARN_EXT_PRESENT_NOF_BITS, + &fld_val); + learn_ext_present = fld_val; + /* FTMH: FHEI-Size */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_9_FHEI_SIZE_MSB, + BKN_DNX_PPH_9_FHEI_SIZE_NOF_BITS, + &fld_val); + fhei_size = fld_val; + /* FTMH: LIF-Extension-Type */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_9_LIF_EXT_TYPE_MSB, + BKN_DNX_PPH_9_LIF_EXT_TYPE_NOF_BITS, + &fld_val); + lif_ext_type = fld_val; + + hdr_size += BKN_DNX_PPH_BASE_TYPE_9; + DBG_DUNE(("PPH(10) FWD_DOMAIN %d, LEARN_EXT %d, FHEI_SIZE %d, LIF_EXT %d \n", + packet_info->internal.forward_domain, learn_ext_present, fhei_size, lif_ext_type)); + break; + case BKN_DNX_PPH_BASE_TYPE_10: + /* FTMH: Forward-Domain */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_10_FORWARD_DOMAIN_MSB, + BKN_DNX_PPH_10_FORWARD_DOMAIN_NOF_BITS, + &fld_val); + packet_info->internal.forward_domain = fld_val; + /* FTMH: Learn-Extension-Present */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_10_LEARN_EXT_PRESENT_MSB, + BKN_DNX_PPH_10_LEARN_EXT_PRESENT_NOF_BITS, + &fld_val); + learn_ext_present = fld_val; + /* FTMH: FHEI-Size */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_10_FHEI_SIZE_MSB, + BKN_DNX_PPH_10_FHEI_SIZE_NOF_BITS, + &fld_val); + fhei_size = fld_val; + /* FTMH: LIF-Extension-Type */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_10_LIF_EXT_TYPE_MSB, + BKN_DNX_PPH_10_LIF_EXT_TYPE_NOF_BITS, + &fld_val); + lif_ext_type = fld_val; + + hdr_size += BKN_DNX_PPH_BASE_TYPE_10; + DBG_DUNE(("PPH(10) FWD_DOMAIN %d, LEARN_EXT %d, FHEI_SIZE %d, LIF_EXT %d \n", + packet_info->internal.forward_domain, learn_ext_present, fhei_size, lif_ext_type)); + break; + case BKN_DNX_PPH_BASE_TYPE_12: + /* FTMH: Forward-Domain */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_12_FORWARD_DOMAIN_MSB, + BKN_DNX_PPH_12_FORWARD_DOMAIN_NOF_BITS, + &fld_val); + packet_info->internal.forward_domain = fld_val; + /* FTMH: Learn-Extension-Present */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_12_LEARN_EXT_PRESENT_MSB, + BKN_DNX_PPH_12_LEARN_EXT_PRESENT_NOF_BITS, + &fld_val); + learn_ext_present = fld_val; + /* FTMH: FHEI-Size */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_12_FHEI_SIZE_MSB, + BKN_DNX_PPH_12_FHEI_SIZE_NOF_BITS, + &fld_val); + fhei_size = fld_val; + /* FTMH: LIF-Extension-Type */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_12_LIF_EXT_TYPE_MSB, + BKN_DNX_PPH_12_LIF_EXT_TYPE_NOF_BITS, + &fld_val); + lif_ext_type = fld_val; + + hdr_size += BKN_DNX_PPH_BASE_TYPE_12; + DBG_DUNE(("PPH(12) FWD_DOMAIN %d, LEARN_EXT %d, FHEI_SIZE %d, LIF_EXT %d \n", + packet_info->internal.forward_domain, learn_ext_present, fhei_size, lif_ext_type)); + break; + default: + fhei_size = 0; + lif_ext_type = 0; + learn_ext_present = 0; + break; + } + if (fhei_size) + { + switch (fhei_size) + { + case BKN_DNX_PPH_FHEI_TYPE_SZ0: + hdr_size += BKN_DNX_PPH_FHEI_SZ0_SIZE; + DBG_DUNE(("FHEI(3) is present\n")); + break; + case BKN_DNX_PPH_FHEI_TYPE_SZ1: + /* FHEI: Type */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_FHEI_TRAP_5B_TYPE_MSB, + BKN_DNX_PPH_FHEI_TRAP_5B_TYPE_NOF_BITS, + &fld_val); + /* FHEI-Size == 5B, FHEI-Type == Trap/Sniff */ + if (fld_val == 0x5) + { + /* FHEI: Qualifier */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_FHEI_TRAP_5B_QUALIFIER_MSB, + BKN_DNX_PPH_FHEI_TRAP_5B_QUALIFIER_NOF_BITS, + &fld_val); + packet_info->internal.trap_qualifier = fld_val; + /* FHEI: Code */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_PPH_FHEI_TRAP_5B_CODE_MSB, + BKN_DNX_PPH_FHEI_TRAP_5B_CODE_NOF_BITS, + &fld_val); + packet_info->internal.trap_id= fld_val; + } + hdr_size += BKN_DNX_PPH_FHEI_SZ1_SIZE; + DBG_DUNE(("FHEI(5) is present code 0x%x qualifier 0x%x\n", packet_info->internal.trap_id, packet_info->internal.trap_qualifier)); + break; + case BKN_DNX_PPH_FHEI_TYPE_SZ2: + hdr_size += BKN_DNX_PPH_FHEI_SZ1_SIZE; + DBG_DUNE(("FHEI(8) is present\n")); + break; + } + } + + /* PPH LIF Extension */ + if (lif_ext_type) + { + hdr_size += sinfo->pph_lif_ext_size[lif_ext_type]; + DBG_DUNE(("PPH LIF Extension(%d) is present\n", sinfo->pph_lif_ext_size[lif_ext_type])); + } + + /* PPH Learn Extension */ + if (learn_ext_present) + { + hdr_size += BKN_DNX_PPH_LEARN_EXT_SIZE; + DBG_DUNE(("PPH Learn Extension(19) is present\n")); + } + + /* UDH Header */ + if (sinfo->udh_enable) + { + uint8 data_type_0; + uint8 data_type_1; + uint8 data_type_2; + uint8 data_type_3; + + DBG_DUNE(("UDH base(1) is present\n")); + + /* UDH: UDH-Data-Type[0] */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_UDH_DATA_TYPE_0_MSB, + BKN_DNX_UDH_DATA_TYPE_0_NOF_BITS, + &fld_val); + data_type_0 = fld_val; + hdr_size += sinfo->udh_length_type[data_type_0]; + /* UDH: UDH-Data-Type[1] */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_UDH_DATA_TYPE_1_MSB, + BKN_DNX_UDH_DATA_TYPE_1_NOF_BITS, + &fld_val); + data_type_1 = fld_val; + hdr_size += sinfo->udh_length_type[data_type_1]; + /* UDH: UDH-Data-Type[2] */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_UDH_DATA_TYPE_2_MSB, + BKN_DNX_UDH_DATA_TYPE_2_NOF_BITS, + &fld_val); + data_type_2 = fld_val; + hdr_size += sinfo->udh_length_type[data_type_2]; + /* UDH: UDH-Data-Type[3] */ + bkn_bitstream_get_field( + &buf[hdr_size], + BKN_DNX_UDH_DATA_TYPE_3_MSB, + BKN_DNX_UDH_DATA_TYPE_3_NOF_BITS, + &fld_val); + data_type_3 = fld_val; + hdr_size += sinfo->udh_length_type[data_type_3]; + hdr_size += BKN_DNX_UDH_BASE_SIZE; + } + } + + /* Done for ingress trapped packets */ + packet_info->system_header_size = hdr_size; + DBG_DUNE(("Total Size of Headers is %d\n", packet_info->system_header_size)); + return 0; +} + +static int +bkn_packet_header_parse(bkn_switch_info_t *sinfo, uint8 *buf, uint32_t buf_len, bkn_dune_system_header_info_t *packet_info) +{ + if (device_is_dpp(sinfo)) { + bkn_dpp_packet_header_parse(sinfo, buf, buf_len, packet_info); + } else if (device_is_dnx(sinfo)){ + bkn_dnx_packet_header_parse(sinfo, buf, buf_len, packet_info); + } + return 0; +} + +static int +bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) +{ + bkn_priv_t *priv; + bkn_dcb_chain_t *dcb_chain; + struct sk_buff *skb; + bkn_filter_t cbf; + bkn_filter_t *filter; + uint32_t err_woff; + uint32_t *dcb, *meta; + uint8_t *pkt; + uint64_t pkt_dma; + int drop_api; + int ethertype; + int pktlen; + int idx; + int dcbs_done = 0; + bkn_dune_system_header_info_t packet_info = {0}; + uint32_t sand_meta_data[4] = {0}; + + dcb_chain = sinfo->rx[chan].api_dcb_chain; + if (dcb_chain == NULL) { + /* No active chains */ + return 0; + } + + while (dcb_chain->dcb_cur < dcb_chain->dcb_cnt) { + dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize]; + DBG_VERB(("DCB %2d: 0x%08x\n", + dcb_chain->dcb_cur, dcb[sinfo->dcb_wsize-1])); + if ((dcb[sinfo->dcb_wsize-1] & (1 << 31)) == 0) { + break; + } + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + /* Handle for Continuous DMA mode */ + if (dcbs_done >= budget) { + break; + } + if ((sinfo->cmic_type == 'x' && dcb[2] & (1 << 18)) || + (sinfo->cmic_type != 'x' && dcb[1] & (1 << 18))) { + dcb[sinfo->dcb_wsize-1] |= SOC_DCB_KNET_DONE; + bkn_api_rx_chain_done(sinfo, chan); + dcb_chain = sinfo->rx[chan].api_dcb_chain; + if (dcb_chain == NULL) { + break; + } + continue; + } + } + if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) || + (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) { + sinfo->rx[chan].chain_complete = 1; + } + sinfo->rx[chan].pkts++; + if (sinfo->cmic_type == 'x') { + pkt_dma = BUS_TO_DMA_HI(dcb[1]); + pkt_dma = pkt_dma << 32 | dcb[0]; + } else { + pkt_dma = dcb[0]; + } + pkt = (uint8_t *)kernel_bde->p2l(sinfo->dev_no, (sal_paddr_t)pkt_dma); + + if (device_is_sand(sinfo)) { + meta = &sand_meta_data[0]; + /* get error bit from last DCB words */ + err_woff = 3; + meta[err_woff] = dcb[sinfo->dcb_wsize-1]; + } + else { + if (sinfo->cmic_type == 'x') { + meta = (uint32_t *)pkt; + err_woff = sinfo->pkt_hdr_size / sizeof(uint32_t) - 1; + meta[err_woff] = dcb[sinfo->dcb_wsize-1]; + } + else { + meta = dcb; + err_woff = sinfo->dcb_wsize - 1; + } + } + + pktlen = dcb[sinfo->dcb_wsize-1] & SOC_DCB_KNET_COUNT_MASK; + bkn_dump_pkt(pkt, pktlen, XGS_DMA_RX_CHAN); + + if (device_is_sand(sinfo)) { + int res = -1; + + memset(&packet_info, 0, sizeof(bkn_dune_system_header_info_t)); + res = bkn_packet_header_parse(sinfo, pkt, (uint32_t)pktlen, &packet_info); + if (res == 0) { + uint16_t tpid = 0; + + bkn_bitstream_set_field(meta, 0, 16, packet_info.internal.trap_id); + bkn_bitstream_set_field(meta, 16, 16, packet_info.internal.trap_qualifier); + bkn_bitstream_set_field(meta, 32, 16, packet_info.ftmh.source_sys_port_aggregate); + bkn_bitstream_set_field(meta, 48, 16, (packet_info.internal.forward_domain & 0xffff)); + bkn_bitstream_set_field(meta, 64, 2, (packet_info.ftmh.action_type & 0x3)); + pkt += packet_info.system_header_size; + pktlen -= packet_info.system_header_size; + bkn_dump_pkt(pkt, 32, XGS_DMA_RX_CHAN); + /* check if vlan tag exists */ + + tpid = (uint16_t)((pkt[12] << 8) | pkt[13]); + if (packet_is_untagged(tpid)) { + uint16_t vid = 0; + + if ((pktlen + 4) < rx_buffer_size) { + DBG_DUNE(("add vlan tag (%d) to untagged packets\n", vid)); + for (idx = (pktlen-1); idx >= 12; idx--) { + pkt[idx+4] = pkt[idx]; + } + vid = (uint16_t)(packet_info.internal.forward_domain & 0xfff); + pkt[12] = 0x81; + pkt[13] = 0x00; + pkt[14] = (vid >> 8); + pkt[15] = (vid & 0xff); + /* reset packet length in DCB */ + pktlen += 4; + dcb[sinfo->dcb_wsize-1] &= ~SOC_DCB_KNET_COUNT_MASK; + dcb[sinfo->dcb_wsize-1] |= ((pktlen + packet_info.system_header_size) & SOC_DCB_KNET_COUNT_MASK); + bkn_dump_pkt(pkt, 32, XGS_DMA_RX_CHAN); + } + } + + } + } + + if (device_is_sand(sinfo)) { + filter = bkn_match_rx_pkt(sinfo, pkt, pktlen, meta, chan, &cbf); + } else { + filter = bkn_match_rx_pkt(sinfo, pkt + sinfo->pkt_hdr_size, + pktlen - sinfo->pkt_hdr_size, meta, chan, &cbf); + } + if ((dcb[sinfo->dcb_wsize-1] & 0xf0000) != 0x30000) { + /* Fragment or error */ + if (filter && filter->kf.mask.w[err_woff] == 0) { + /* Drop unless DCB status is part of filter */ + filter = NULL; + } + } + drop_api = 1; + if (filter) { + DBG_FLTR(("Match filter ID %d\n", filter->kf.id)); + switch (filter->kf.dest_type) { + case KCOM_DEST_T_API: + DBG_FLTR(("Send to Rx API\n")); + sinfo->rx[chan].pkts_f_api++; + drop_api = 0; + break; + case KCOM_DEST_T_NETIF: + priv = bkn_netif_lookup(sinfo, filter->kf.dest_id); + if (priv) { + /* Check that software link is up */ + if (!netif_carrier_ok(priv->dev)) { + sinfo->rx[chan].pkts_d_no_link++; + break; + } + + if (sinfo->cmic_type == 'x') { + pkt += sinfo->pkt_hdr_size; + pktlen -= sinfo->pkt_hdr_size; + } + + /* Add 2 bytes for IP header alignment (see below) */ + skb = dev_alloc_skb(pktlen + RCPU_RX_ENCAP_SIZE + 2); + if (skb == NULL) { + sinfo->rx[chan].pkts_d_no_skb++; + break; + } + skb_reserve(skb, RCPU_RX_ENCAP_SIZE); + + DBG_FLTR(("Send to netif %d (%s)\n", + priv->id, priv->dev->name)); + sinfo->rx[chan].pkts_f_netif++; + skb->dev = priv->dev; + skb_reserve(skb, 2); /* 16 byte align the IP fields. */ + + /* Save for RCPU before stripping tag */ + ethertype = (pkt[16] << 8) | pkt[17]; + if ((priv->flags & KCOM_NETIF_F_KEEP_RX_TAG) == 0) { + if (filter->kf.flags & KCOM_FILTER_F_STRIP_TAG) { + /* Strip the VLAN tag */ + uint16_t vlan_proto = (uint16_t)((pkt[12] << 8) | pkt[13]); + if (vlan_proto == 0x8100 || vlan_proto == 0x88a8) { + DBG_FLTR(("Strip VLAN tag\n")); + for (idx = 11; idx >= 0; idx--) { + pkt[idx+4] = pkt[idx]; + } + pktlen -= 4; + pkt += 4; + } + } else { + /* + * Mark packet as VLAN-tagged, otherwise newer + * kernels will strip the tag. + */ + uint16_t tci = (pkt[14] << 8) | pkt[15]; + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_vlan_hwaccel_put_tag(skb, ETH_P_8021Q, tci); + } else { + bkn_vlan_hwaccel_put_tag(skb, + ((skb->data[12] << 8) | skb->data[13]), tci); + } + } + } + + skb_copy_to_linear_data(skb, pkt, pktlen); + if (device_is_sand(sinfo)) { + /* CRC has been stripped */ + skb_put(skb, pktlen); + } else { + skb_put(skb, pktlen - 4); /* Strip CRC */ + } + priv->stats.rx_packets++; + priv->stats.rx_bytes += skb->len; + + /* Optional SKB updates */ + if (knet_rx_cb != NULL) { + KNET_SKB_CB(skb)->netif_user_data = priv->cb_user_data; + KNET_SKB_CB(skb)->filter_user_data = filter->kf.cb_user_data; + KNET_SKB_CB(skb)->dcb_type = sinfo->dcb_type & 0xFFFF; + skb = knet_rx_cb(skb, sinfo->dev_no, meta); + if (skb == NULL) { + /* Consumed by call-back */ + sinfo->rx[chan].pkts_d_callback++; + break; + } + } + + /* Do Rx timestamping */ + if (sinfo->rx_hwts) { + bkn_hw_tstamp_rx_set(sinfo, skb, meta); + } + + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_add_rcpu_encap(sinfo, skb, meta); + DBG_PDMP(("After add RCPU ENCAP\n")); + bkn_dump_pkt(skb->data, pktlen + RCPU_RX_ENCAP_SIZE, XGS_DMA_RX_CHAN); + } + skb->protocol = eth_type_trans(skb, skb->dev); + if (filter->kf.dest_proto) { + skb->protocol = filter->kf.dest_proto; + } + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_eth_type_update(skb, ethertype); + } + DBG_DUNE(("skb protocol 0x%04x\n",skb->protocol)); + + /* Unlock while calling up network stack */ + spin_unlock(&sinfo->lock); + if (use_napi) { + netif_receive_skb(skb); + } else { + netif_rx(skb); + } + spin_lock(&sinfo->lock); + + if (filter->kf.mirror_type == KCOM_DEST_T_API || + dbg_pkt_enable) { + DBG_FLTR(("Mirror to Rx API\n")); + sinfo->rx[chan].pkts_m_api++; + drop_api = 0; + } + } else { + DBG_FLTR(("Unknown netif %d\n", + filter->kf.dest_id)); + sinfo->rx[chan].pkts_d_unkn_netif++; + } + break; + default: + /* Drop packet */ + DBG_FLTR(("Unknown dest type %d\n", + filter->kf.dest_type)); + sinfo->rx[chan].pkts_d_unkn_dest++; + break; + } + } else { + DBG_PKT(("Rx packet dropped.\n")); + sinfo->rx[chan].pkts_d_no_match++; + } + if (drop_api) { + /* If count is zero, the DCB will just be recycled */ + dcb[sinfo->dcb_wsize-1] &= ~SOC_DCB_KNET_COUNT_MASK; + } + dcb[sinfo->dcb_wsize-1] |= SOC_DCB_KNET_DONE; + dcb_chain->dcb_cur++; + dcbs_done++; + } + + return dcbs_done; +} + +static int +bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) +{ + bkn_priv_t *priv; + bkn_desc_info_t *desc; + struct sk_buff *skb; + bkn_filter_t cbf; + bkn_filter_t *filter; + uint32_t err_woff; + uint32_t *dcb, *meta; + int ethertype; + int pktlen; + int idx; + int dcbs_done = 0; + bkn_dune_system_header_info_t packet_info = {0}; + uint32_t sand_meta_data[4] = {0}; + + if (!sinfo->rx[chan].running) { + /* Rx not ready */ + return 0; + } + + while (dcbs_done < budget) { + char str[32]; + sprintf(str, "Rx DCB (%d)", sinfo->rx[chan].dirty); + desc = &sinfo->rx[chan].desc[sinfo->rx[chan].dirty]; + dcb = desc->dcb_mem; + bkn_dump_dcb(str, dcb, sinfo->dcb_wsize, XGS_DMA_RX_CHAN); + if ((dcb[sinfo->dcb_wsize-1] & (1 << 31)) == 0) { + break; + } + if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) || + (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) { + sinfo->rx[chan].chain_complete = 1; + /* Request one extra poll to check for chain done interrupt */ + if (sinfo->napi_poll_mode) { + sinfo->napi_poll_again = 1; + } + } + sinfo->rx[chan].pkts++; + skb = desc->skb; + + if (device_is_sand(sinfo)) { + meta = &sand_meta_data[0]; + /* get error bit from last DCB words */ + err_woff = 3; + meta[err_woff] = dcb[sinfo->dcb_wsize-1]; + } + else { + if (sinfo->cmic_type == 'x') { + meta = (uint32_t *)skb->data; + err_woff = sinfo->pkt_hdr_size / sizeof(uint32_t) - 1; + meta[err_woff] = dcb[sinfo->dcb_wsize-1]; + } else { + meta = dcb; + err_woff = sinfo->dcb_wsize - 1; + } + } + + pktlen = dcb[sinfo->dcb_wsize-1] & 0xffff; + priv = netdev_priv(sinfo->dev); + DBG_DCB_RX(("Rx%d SKB DMA done (%d).\n", chan, sinfo->rx[chan].dirty)); + DMA_UNMAP_SINGLE(sinfo->dma_dev, + desc->skb_dma, desc->dma_size, + DMA_FROMDEV); + desc->skb_dma = 0; + bkn_dump_pkt(skb->data, pktlen, XGS_DMA_RX_CHAN); + + if (device_is_sand(sinfo)) { + uint8_t *pkt = skb->data; + int res = 0; + + memset(&packet_info, 0, sizeof(bkn_dune_system_header_info_t)); + res = bkn_packet_header_parse(sinfo, pkt, (uint32_t)pktlen, &packet_info); + if (res == 0) { + uint16_t tpid = 0; + bkn_bitstream_set_field(meta, 0, 16, packet_info.internal.trap_id); + bkn_bitstream_set_field(meta, 16, 16, packet_info.internal.trap_qualifier); + bkn_bitstream_set_field(meta, 32, 16, packet_info.ftmh.source_sys_port_aggregate); + bkn_bitstream_set_field(meta, 48, 16, (packet_info.internal.forward_domain & 0xffff)); + bkn_bitstream_set_field(meta, 64, 2, (packet_info.ftmh.action_type & 0x3)); + pkt = skb->data + packet_info.system_header_size; + /* check if vlan tag exists */ + tpid = (uint16_t)((pkt[12] << 8) | pkt[13]); + if (packet_is_untagged(tpid)) { + if ((pktlen + 4) < rx_buffer_size) { + uint16_t vid = 0; + DBG_DUNE(("add vlan tag to untagged packets\n")); + for (idx = (pktlen-packet_info.system_header_size-1); idx >= 12; idx--) { + pkt[idx+4] = pkt[idx]; + } + vid = (uint16_t)(packet_info.internal.forward_domain & 0xfff); + pkt[12] = 0x81; + pkt[13] = 0x00; + pkt[14] = (vid >> 8); + pkt[15] = (vid & 0xff); + pktlen += 4; + /* reset packet length in DCB */ + dcb[sinfo->dcb_wsize-1] &= ~SOC_DCB_KNET_COUNT_MASK; + dcb[sinfo->dcb_wsize-1] |= (pktlen & SOC_DCB_KNET_COUNT_MASK); + bkn_dump_pkt(pkt, 32, XGS_DMA_RX_CHAN); + } + } + } + } + + if (device_is_sand(sinfo)) { + filter = bkn_match_rx_pkt(sinfo, skb->data + packet_info.system_header_size, + pktlen - packet_info.system_header_size, meta, chan, &cbf); + } else { + filter = bkn_match_rx_pkt(sinfo, skb->data + sinfo->pkt_hdr_size, + pktlen - sinfo->pkt_hdr_size, meta, chan, &cbf); + } + if ((dcb[sinfo->dcb_wsize-1] & 0xf0000) != 0x30000) { + /* Fragment or error */ + priv->stats.rx_errors++; + if (filter && filter->kf.mask.w[err_woff] == 0) { + /* Drop unless DCB status is part of filter */ + filter = NULL; + } + } + DBG_PKT(("Rx packet (%d bytes).\n", pktlen)); + if (filter) { + DBG_FLTR(("Match filter ID %d\n", filter->kf.id)); + switch (filter->kf.dest_type) { + case KCOM_DEST_T_API: + DBG_FLTR(("Send to Rx API\n")); + sinfo->rx[chan].pkts_f_api++; + bkn_api_rx_copy_from_skb(sinfo, chan, desc); + break; + case KCOM_DEST_T_NETIF: + priv = bkn_netif_lookup(sinfo, filter->kf.dest_id); + if (priv) { + /* Check that software link is up */ + if (!netif_carrier_ok(priv->dev)) { + sinfo->rx[chan].pkts_d_no_link++; + break; + } + DBG_FLTR(("Send to netif %d (%s)\n", + priv->id, priv->dev->name)); + sinfo->rx[chan].pkts_f_netif++; + + if (((filter->kf.mirror_type == KCOM_DEST_T_API) && + (!device_is_sand(sinfo))) || dbg_pkt_enable) { + sinfo->rx[chan].pkts_m_api++; + bkn_api_rx_copy_from_skb(sinfo, chan, desc); + } + + if (device_is_sand(sinfo)) { + if (filter->kf.mirror_type == KCOM_DEST_T_API) { + sinfo->rx[chan].pkts_m_api++; + bkn_api_rx_copy_from_skb(sinfo, chan, desc); + } + /* Strip Dune headers */ + skb->data += packet_info.system_header_size; + pktlen -= packet_info.system_header_size; + bkn_dump_pkt(skb->data, 32, XGS_DMA_RX_CHAN); + /* CRC has been stripped on Dune*/ + skb_put(skb, pktlen); + } else { + skb_put(skb, pktlen - 4); /* Strip CRC */ + } + + if (sinfo->cmic_type == 'x' && !device_is_dnx(sinfo)) { + skb_pull(skb, sinfo->pkt_hdr_size); + } + + /* Save for RCPU before stripping tag */ + ethertype = (skb->data[16] << 8) | skb->data[17]; + if ((priv->flags & KCOM_NETIF_F_KEEP_RX_TAG) == 0) { + if (filter->kf.flags & KCOM_FILTER_F_STRIP_TAG) { + /* Strip VLAN tag */ + uint16_t vlan_proto = (uint16_t)((skb->data[12] << 8) | skb->data[13]); + if (vlan_proto == 0x8100 || vlan_proto == 0x88a8) { + DBG_FLTR(("Strip VLAN tag\n")); + ((u32*)skb->data)[3] = ((u32*)skb->data)[2]; + ((u32*)skb->data)[2] = ((u32*)skb->data)[1]; + ((u32*)skb->data)[1] = ((u32*)skb->data)[0]; + skb_pull(skb, 4); + if (sinfo->cmic_type == 'x' && !device_is_dnx(sinfo)) { + for (idx = sinfo->pkt_hdr_size / sizeof(uint32_t); idx; idx--) { + meta[idx] = meta[idx - 1]; + } + meta++; + } + } + } else { + /* + * Mark packet as VLAN-tagged, otherwise newer + * kernels will strip the tag. + */ + uint16_t tci = (skb->data[14] << 8) | skb->data[15]; + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_vlan_hwaccel_put_tag(skb, ETH_P_8021Q, tci); + } else { + bkn_vlan_hwaccel_put_tag(skb, + ((skb->data[12] << 8) | skb->data[13]), tci); + } + } + } + priv->stats.rx_packets++; + priv->stats.rx_bytes += skb->len; + skb->dev = priv->dev; + + /* Optional SKB updates */ + if (knet_rx_cb != NULL) { + KNET_SKB_CB(skb)->netif_user_data = priv->cb_user_data; + KNET_SKB_CB(skb)->filter_user_data = filter->kf.cb_user_data; + KNET_SKB_CB(skb)->dcb_type = sinfo->dcb_type & 0xFFFF; + skb = knet_rx_cb(skb, sinfo->dev_no, meta); + if (skb == NULL) { + /* Consumed by call-back */ + sinfo->rx[chan].pkts_d_callback++; + priv->stats.rx_dropped++; + desc->skb = NULL; + break; + } + } + + /* Do Rx timestamping */ + if (sinfo->rx_hwts) { + bkn_hw_tstamp_rx_set(sinfo, skb, meta); + } + + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_add_rcpu_encap(sinfo, skb, meta); + DBG_PDMP(("After add RCPU ENCAP\n")); + bkn_dump_pkt(skb->data, pktlen + RCPU_RX_ENCAP_SIZE, XGS_DMA_RX_CHAN); + } + skb->protocol = eth_type_trans(skb, skb->dev); + if (filter->kf.dest_proto) { + skb->protocol = filter->kf.dest_proto; + } + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_eth_type_update(skb, ethertype); + } + DBG_DUNE(("skb protocol 0x%04x\n",skb->protocol)); + + if (filter->kf.mirror_type == KCOM_DEST_T_NETIF) { + bkn_priv_t *mpriv; + struct sk_buff *mskb; + mpriv = bkn_netif_lookup(sinfo, filter->kf.mirror_id); + if (mpriv && netif_carrier_ok(mpriv->dev)) { + mskb = skb_clone(skb, GFP_ATOMIC); + if (mskb == NULL) { + sinfo->rx[chan].pkts_d_no_skb++; + } else { + sinfo->rx[chan].pkts_m_netif++; + mpriv->stats.rx_packets++; + mpriv->stats.rx_bytes += mskb->len; + skb->dev = mpriv->dev; + if (filter->kf.mirror_proto) { + skb->protocol = filter->kf.mirror_proto; + } + /* Unlock while calling up network stack */ + spin_unlock(&sinfo->lock); + if (use_napi) { + netif_receive_skb(mskb); + } else { + netif_rx(mskb); + } + spin_lock(&sinfo->lock); + } + } + } + + /* Unlock while calling up network stack */ + spin_unlock(&sinfo->lock); + if (use_napi) { + netif_receive_skb(skb); + } else { + netif_rx(skb); + } + spin_lock(&sinfo->lock); + + /* Ensure that we reallocate SKB for this DCB */ + desc->skb = NULL; + } else { + DBG_FLTR(("Unknown netif %d\n", + filter->kf.dest_id)); + sinfo->rx[chan].pkts_d_unkn_netif++; + } + break; + default: + /* Drop packet */ + DBG_FLTR(("Unknown dest type %d\n", + filter->kf.dest_type)); + sinfo->rx[chan].pkts_d_unkn_dest++; + break; + } + } else { + DBG_PKT(("Rx packet dropped.\n")); + sinfo->rx[chan].pkts_d_no_match++; + priv->stats.rx_dropped++; + } + dcb[sinfo->dcb_wsize-1] &= ~(1 << 31); + if (++sinfo->rx[chan].dirty >= MAX_RX_DCBS) { + sinfo->rx[chan].dirty = 0; + } + sinfo->rx[chan].free--; + dcbs_done++; + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + /* Right now refill for Continuous DMA mode */ + bkn_rx_refill(sinfo, chan); + } + } + + return dcbs_done; +} + +static int +bkn_do_rx(bkn_switch_info_t *sinfo, int chan, int budget) +{ + if (sinfo->rx[chan].use_rx_skb == 0) { + /* Rx buffers are provided by BCM Rx API */ + return bkn_do_api_rx(sinfo, chan, budget); + } else { + /* Rx buffers are provided by Linux kernel */ + return bkn_do_skb_rx(sinfo, chan, budget); + } +} + +static void +bkn_rx_desc_done(bkn_switch_info_t *sinfo, int chan) +{ + bkn_evt_resource_t *evt; + evt = &_bkn_evt[sinfo->evt_idx]; + DBG_IRQ(("Rx%d desc done\n", chan)); + + if (sinfo->rx[chan].use_rx_skb == 0) { + sinfo->dma_events |= KCOM_DMA_INFO_F_RX_DONE; + evt->evt_wq_put++; + wake_up_interruptible(&evt->evt_wq); + } +} + +static void +bkn_rx_chain_done(bkn_switch_info_t *sinfo, int chan) +{ + DBG_IRQ(("Rx%d chain done\n", chan)); + + if (sinfo->rx[chan].chain_complete == 0) { + /* + * In certain environments the DCB memory is updated after + * the corresponding interrupt has been received. + * The following code will ensure that this situation is + * handled properly. + */ + int maxloop = 0; + while (sinfo->rx[chan].chain_complete == 0) { + sinfo->rx[chan].sync_retry++; + if (maxloop == 0) { + sinfo->rx[chan].sync_err++; + } + if (maxloop > sinfo->rx[chan].sync_maxloop) { + sinfo->rx[chan].sync_maxloop = maxloop; + } + if (bkn_do_rx(sinfo, chan, MAX_RX_DCBS) > 0) { + bkn_rx_desc_done(sinfo, chan); + } + if (++maxloop > rx_sync_retry) { + gprintk("Fatal error: Incomplete chain\n"); + sinfo->rx[chan].chain_complete = 1; + break; + } + } + } + + sinfo->rx[chan].running = 0; + + if (sinfo->rx[chan].use_rx_skb == 0) { + bkn_api_rx_chain_done(sinfo, chan); + } else { + bkn_rx_refill(sinfo, chan); + + if (bkn_rx_restart(sinfo, chan) != 0) { + /* Presumably out of resources */ + sinfo->timer.expires = jiffies + 1; + if (!sinfo->timer_queued) { + sinfo->timer_queued = 1; + add_timer(&sinfo->timer); + } + } + } +} + +static void +bkn_suspend_tx(bkn_switch_info_t *sinfo) +{ + struct list_head *list; + bkn_priv_t *priv = netdev_priv(sinfo->dev); + + /* Stop main device */ + netif_stop_queue(priv->dev); + sinfo->tx.suspends++; + /* Stop associated virtual devices */ + list_for_each(list, &sinfo->ndev_list) { + priv = (bkn_priv_t *)list; + netif_stop_queue(priv->dev); + } +} + +static void +bkn_resume_tx(bkn_switch_info_t *sinfo) +{ + struct list_head *list; + bkn_priv_t *priv = netdev_priv(sinfo->dev); + + /* Check main device */ + if (netif_queue_stopped(priv->dev) && sinfo->tx.free > 1) { + netif_wake_queue(priv->dev); + } + /* Check associated virtual devices */ + list_for_each(list, &sinfo->ndev_list) { + priv = (bkn_priv_t *)list; + if (netif_queue_stopped(priv->dev) && sinfo->tx.free > 1) { + netif_wake_queue(priv->dev); + } + } +} + +static int +bkn_hw_tstamp_tx_set(bkn_switch_info_t *sinfo, struct sk_buff *skb) +{ + struct skb_shared_hwtstamps shhwtstamps; + uint64_t ts = 0; + uint32_t hdrlen = sinfo->cmic_type == 'x' ? PKT_TX_HDR_SIZE : 0; + int port; + + if (!knet_hw_tstamp_tx_time_get_cb) { + return -1; + } + + port = KNET_SKB_CB(skb)->port; + if (knet_hw_tstamp_tx_time_get_cb(sinfo->dev_no, port, skb->data + hdrlen, &ts) < 0) { + return -1; + } + + memset(&shhwtstamps, 0, sizeof(shhwtstamps)); + shhwtstamps.hwtstamp = ns_to_ktime(be64_to_cpu(ts)); + skb_tstamp_tx(skb, &shhwtstamps); + + return 0; +} + +static void +bkn_hw_tstamp_tx_work(struct work_struct *work) +{ + bkn_switch_info_t *sinfo = container_of(work, bkn_switch_info_t, tx_ptp_work); + struct sk_buff *skb; + + while (skb_queue_len(&sinfo->tx_ptp_queue)) { + skb = skb_dequeue(&sinfo->tx_ptp_queue); + if (bkn_hw_tstamp_tx_set(sinfo, skb) < 0) { + gprintk("Timestamp has not been taken for the current skb.\n"); + } + dev_kfree_skb_any(skb); + } +} + +static int +bkn_do_tx(bkn_switch_info_t *sinfo) +{ + bkn_desc_info_t *desc; + int dcbs_done = 0; + + if (!CDMA_CH(sinfo, XGS_DMA_TX_CHAN) && sinfo->tx.api_active) { + return dcbs_done; + } + + while (dcbs_done < MAX_TX_DCBS) { + char str[32]; + if (sinfo->tx.free == MAX_TX_DCBS) { + break; + } + sprintf(str, "Tx DCB (%d)", sinfo->tx.dirty); + desc = &sinfo->tx.desc[sinfo->tx.dirty]; + bkn_dump_dcb(str, desc->dcb_mem, sinfo->dcb_wsize, XGS_DMA_TX_CHAN); + if ((desc->dcb_mem[sinfo->dcb_wsize-1] & (1 << 31)) == 0) { + break; + } + if (desc->skb) { + DBG_DCB_TX(("Tx SKB DMA done (%d).\n", sinfo->tx.dirty)); + DMA_UNMAP_SINGLE(sinfo->dma_dev, + desc->skb_dma, desc->dma_size, + DMA_TODEV); + if (bkn_skb_tx_flags(desc->skb) & SKBTX_IN_PROGRESS) { + skb_queue_tail(&sinfo->tx_ptp_queue, desc->skb); + schedule_work(&sinfo->tx_ptp_work); + } else { + dev_kfree_skb_any(desc->skb); + } + desc->skb = NULL; + desc->skb_dma = 0; + } + desc->dcb_mem[sinfo->dcb_wsize-1] &= ~(1 << 31); + if (++sinfo->tx.dirty >= MAX_TX_DCBS) { + sinfo->tx.dirty = 0; + } + if (++sinfo->tx.free > MAX_TX_DCBS) { + gprintk("Too many free Tx DCBs(%d).\n", sinfo->tx.free); + } + dcbs_done++; + } + + return dcbs_done; +} + +static void +bkn_tx_cdma_chain_switch(bkn_switch_info_t *sinfo) +{ + bkn_dcb_chain_t *dcb_chain = sinfo->tx.api_dcb_chain; + uint32_t *dcb_mem; + uint64_t dcb_dma; + int woffset; + + /* Switch between SKB Tx and API Tx for Continuous DMA mode */ + if (!sinfo->tx.api_active) { + /* + * Set the current SKB DCB as reload DCB and the last DCB of + * the pending API chain as the new halt location. + */ + sinfo->tx.api_active = 1; + dcb_mem = sinfo->tx.desc[sinfo->tx.cur].dcb_mem; + memset(dcb_mem, 0, sinfo->dcb_wsize * sizeof(uint32_t)); + dcb_mem[0] = dcb_chain->dcb_dma; + if (sinfo->cmic_type == 'x') { + dcb_mem[1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); + dcb_mem[2] |= 1 << 24 | 1 << 18 | 1 << 16; + } else { + dcb_mem[1] |= 1 << 24 | 1 << 18 | 1 << 16; + } + if (++sinfo->tx.cur >= MAX_TX_DCBS) { + sinfo->tx.cur = 0; + } + sinfo->tx.free--; + woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize; + dcb_dma = dcb_chain->dcb_dma + woffset * sizeof(uint32_t); + /* DMA run to the new halt location */ + bkn_cdma_goto(sinfo, XGS_DMA_TX_CHAN, dcb_dma); + } else { + /* Only need to set the current SKB DCB as the new halt location */ + sinfo->tx.api_active = 0; + woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize; + dcb_mem = &dcb_chain->dcb_mem[woffset]; + dcb_mem[0] = sinfo->tx.desc[sinfo->tx.dirty].dcb_dma; + if (sinfo->cmic_type == 'x') { + dcb_mem[1] = DMA_TO_BUS_HI(sinfo->tx.desc[sinfo->tx.dirty].dcb_dma >> 32); + } + dcb_dma = sinfo->tx.desc[sinfo->tx.cur].dcb_dma; + /* DMA run to the new halt location */ + bkn_cdma_goto(sinfo, XGS_DMA_TX_CHAN, dcb_dma); + } +} + +static void +bkn_skb_tx(bkn_switch_info_t *sinfo) +{ + if (sinfo->tx.api_active) { + /* Switch from API Tx to SKB Tx */ + bkn_tx_cdma_chain_switch(sinfo); + } +} + +static void +bkn_api_tx(bkn_switch_info_t *sinfo) +{ + bkn_dcb_chain_t *dcb_chain; + uint64_t pkt_dma; + unsigned char *pktdata; + int pktlen; + int i; + + /* Assume that driver lock is held */ + if (list_empty(&sinfo->tx.api_dcb_list)) { + sinfo->tx.api_active = 0; + } else { + sinfo->tx.pkts++; + dcb_chain = list_entry(sinfo->tx.api_dcb_list.next, + bkn_dcb_chain_t, list); + DBG_DCB_TX(("Start API Tx DMA, first DCB @ 0x%08x (%d DCBs).\n", + (uint32_t)dcb_chain->dcb_dma, dcb_chain->dcb_cnt)); + for (i = 0; i < dcb_chain->dcb_cnt && debug & DBG_LVL_PDMP; i++) { + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN) && i == dcb_chain->dcb_cnt - 1) { + break; + } + if (sinfo->cmic_type == 'x') { + pkt_dma = BUS_TO_DMA_HI(dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 1]); + pkt_dma = pkt_dma << 32 | dcb_chain->dcb_mem[sinfo->dcb_wsize * i]; + } else { + pkt_dma = dcb_chain->dcb_mem[sinfo->dcb_wsize * i]; + } + pktdata = kernel_bde->p2l(sinfo->dev_no, pkt_dma); + if (sinfo->cmic_type == 'x') { + pktlen = dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 2] & 0xffff; + } else { + pktlen = dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 1] & 0xffff; + } + bkn_dump_pkt(pktdata, pktlen, XGS_DMA_TX_CHAN); + } + + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + sinfo->tx.api_dcb_chain = dcb_chain; + if (!sinfo->tx.api_active) { + /* Switch from SKB Tx to API Tx */ + bkn_tx_cdma_chain_switch(sinfo); + } + list_del(&dcb_chain->list); + } else { + sinfo->tx.api_active = 1; + dev_dma_chan_clear(sinfo, XGS_DMA_TX_CHAN); + dev_irq_mask_enable(sinfo, XGS_DMA_TX_CHAN, 1); + dev_dma_chan_start(sinfo, XGS_DMA_TX_CHAN, dcb_chain->dcb_dma); + list_del(&dcb_chain->list); + kfree(dcb_chain); + } + } +} + +static void +bkn_tx_cdma_chain_done(bkn_switch_info_t *sinfo, int done) +{ + int woffset; + int dcbs_done = 0; + bkn_evt_resource_t *evt; + + DBG_IRQ(("Tx CDMA chain done \n")); + + evt = &_bkn_evt[sinfo->evt_idx]; + + if (sinfo->tx.api_active) { + /* Drain API Tx chains */ + while (sinfo->tx.api_dcb_chain != sinfo->tx.api_dcb_chain_end) { + woffset = sinfo->tx.api_dcb_chain->dcb_cnt * sinfo->dcb_wsize - 1; + if (!(sinfo->tx.api_dcb_chain->dcb_mem[woffset] & (1 << 31))) { + return; + } + sinfo->tx.api_dcb_chain->dcb_mem[woffset - sinfo->dcb_wsize] |= SOC_DCB_KNET_DONE; + sinfo->dma_events |= KCOM_DMA_INFO_F_TX_DONE; + evt->evt_wq_put++; + wake_up_interruptible(&evt->evt_wq); + kfree(sinfo->tx.api_dcb_chain); + sinfo->tx.api_dcb_chain = NULL; + bkn_api_tx(sinfo); + if ((++dcbs_done + done) >= MAX_TX_DCBS) { + if (sinfo->napi_poll_mode) { + /* Request one extra poll to reschedule Tx */ + sinfo->napi_poll_again = 1; + } else { + /* Request to yield for Continuous DMA mode */ + sinfo->tx_yield = 1; + } + return; + } + } + woffset = (sinfo->tx.api_dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize - 1; + if (!(sinfo->tx.api_dcb_chain->dcb_mem[woffset] & (1 << 31))) { + return; + } + sinfo->tx.api_dcb_chain->dcb_mem[woffset] |= SOC_DCB_KNET_DONE; + /* Try and park at SKB Tx if API Tx done */ + bkn_skb_tx(sinfo); + sinfo->dma_events |= KCOM_DMA_INFO_F_TX_DONE; + evt->evt_wq_put++; + wake_up_interruptible(&evt->evt_wq); + kfree(sinfo->tx.api_dcb_chain); + sinfo->tx.api_dcb_chain = NULL; + sinfo->tx.api_dcb_chain_end = NULL; + if (!sinfo->napi_poll_mode) { + /* Not need to yield for Continuous DMA mode */ + sinfo->tx_yield = 0; + } + } else { + if (sinfo->tx.free == MAX_TX_DCBS) { + /* Try API Tx if SKB Tx done */ + bkn_api_tx(sinfo); + if (sinfo->tx.api_active) { + return; + } + } + } + + /* Resume if netif Tx resources available and API Tx not active */ + bkn_resume_tx(sinfo); +} + +static void +bkn_tx_chain_done(bkn_switch_info_t *sinfo, int done) +{ + bkn_desc_info_t *desc; + int idx, pending; + bkn_evt_resource_t *evt; + + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + return bkn_tx_cdma_chain_done(sinfo, done); + } + + DBG_IRQ(("Tx chain done (%d/%d)\n", sinfo->tx.cur, sinfo->tx.dirty)); + + dev_irq_mask_disable(sinfo, XGS_DMA_TX_CHAN, 0); + + evt = &_bkn_evt[sinfo->evt_idx]; + + if (sinfo->tx.api_active) { + sinfo->dma_events |= KCOM_DMA_INFO_F_TX_DONE; + evt->evt_wq_put++; + wake_up_interruptible(&evt->evt_wq); + /* Check if BCM API has more to send */ + bkn_api_tx(sinfo); + if (sinfo->tx.api_active) { + return; + } + } + + if (sinfo->tx.free == MAX_TX_DCBS) { + /* If netif Tx is idle then allow BCM API to send */ + bkn_api_tx(sinfo); + if (sinfo->tx.api_active) { + return; + } + } else { + /* If two or more DCBs are pending, chain them */ + pending = MAX_TX_DCBS - sinfo->tx.free; + idx = sinfo->tx.dirty; + while (--pending && idx < (MAX_TX_DCBS - 1)) { + if (sinfo->cmic_type == 'x') { + sinfo->tx.desc[idx++].dcb_mem[2] |= 1 << 16; + } else { + sinfo->tx.desc[idx++].dcb_mem[1] |= 1 << 16; + } + DBG_DCB_TX(("Chain Tx DCB %d (%d)\n", idx, pending)); + } + /* Restart DMA from where we stopped */ + desc = &sinfo->tx.desc[sinfo->tx.dirty]; + DBG_DCB_TX(("Restart Tx DMA, DCB @ 0x%08x (%d).\n", + (uint32_t)desc->dcb_dma, sinfo->tx.dirty)); + dev_dma_chan_clear(sinfo, XGS_DMA_TX_CHAN); + dev_irq_mask_enable(sinfo, XGS_DMA_TX_CHAN, 0); + dev_dma_chan_start(sinfo, XGS_DMA_TX_CHAN, desc->dcb_dma); + } + + /* Resume if netif Tx resources available and API Tx not active */ + bkn_resume_tx(sinfo); +} + +static void +bkn_schedule_napi_poll(bkn_switch_info_t *sinfo) +{ + /* Schedule NAPI poll */ + DBG_NAPI(("Schedule NAPI poll on %s.\n", sinfo->dev->name)); + /* Disable interrupts until poll job is complete */ + sinfo->napi_poll_mode = 1; + /* Unlock while calling up network stack */ + spin_unlock(&sinfo->lock); + if (bkn_napi_schedule_prep(sinfo->dev, &sinfo->napi)) { + __bkn_napi_schedule(sinfo->dev, &sinfo->napi); + DBG_NAPI(("Schedule prep OK on %s.\n", sinfo->dev->name)); + } else { + /* Most likely the base device is has not been opened */ + gprintk("Warning: Unable to schedule NAPI - base device not up?\n"); + } + spin_lock(&sinfo->lock); +} + +static void +bkn_napi_poll_complete(bkn_switch_info_t *sinfo) +{ + /* Unlock while calling up network stack */ + spin_unlock(&sinfo->lock); + bkn_napi_complete(sinfo->dev, &sinfo->napi); + spin_lock(&sinfo->lock); + /* Re-enable interrupts */ + sinfo->napi_poll_mode = 0; + dev_irq_mask_set(sinfo, sinfo->irq_mask); +} + +static int +xgs_do_dma(bkn_switch_info_t *sinfo, int budget) +{ + int rx_dcbs_done = 0, tx_dcbs_done = 0; + int chan_done, budget_chans = 0; + uint32_t dma_stat; + int chan; + + DEV_READ32(sinfo, CMIC_DMA_STATr, &dma_stat); + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (dma_stat & DS_DESC_DONE_TST(XGS_DMA_RX_CHAN + chan)) { + xgs_dma_desc_clear(sinfo, XGS_DMA_RX_CHAN + chan); + sinfo->poll_channels |= 1 << chan; + } + } + if (!sinfo->poll_channels) { + sinfo->poll_channels = (uint32_t)(1 << sinfo->rx_chans) - 1; + budget_chans = budget / sinfo->rx_chans; + } else { + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + budget_chans++; + } + } + budget_chans = budget / budget_chans; + } + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + chan_done = bkn_do_rx(sinfo, chan, budget_chans); + rx_dcbs_done += chan_done; + if (chan_done < budget_chans) { + sinfo->poll_channels &= ~(1 << chan); + } + bkn_rx_desc_done(sinfo, chan); + } + + if (dma_stat & DS_CHAIN_DONE_TST(XGS_DMA_RX_CHAN + chan)) { + xgs_dma_chain_clear(sinfo, XGS_DMA_RX_CHAN + chan); + bkn_rx_chain_done(sinfo, chan); + } + } + + if (dma_stat & DS_CHAIN_DONE_TST(XGS_DMA_TX_CHAN)) { + xgs_dma_chain_clear(sinfo, XGS_DMA_TX_CHAN); + tx_dcbs_done = bkn_do_tx(sinfo); + bkn_tx_chain_done(sinfo, tx_dcbs_done); + } + + return sinfo->poll_channels ? budget : rx_dcbs_done; +} + +static int +xgsm_do_dma(bkn_switch_info_t *sinfo, int budget) +{ + int rx_dcbs_done = 0, tx_dcbs_done = 0; + int chan_done, budget_chans = 0; + uint32_t dma_stat, irq_stat = 0; + int chan; + + /* Get Controlled interrupt states for Continuous DMA mode */ + if (sinfo->cdma_channels) { + DEV_READ32(sinfo, CMICM_IRQ_STATr, &irq_stat); + } + + DEV_READ32(sinfo, CMICM_DMA_STATr, &dma_stat); + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (dma_stat & (0x10 << (XGS_DMA_RX_CHAN + chan)) || + irq_stat & (0x08000000 << (XGS_DMA_RX_CHAN + chan))) { + xgsm_dma_desc_clear(sinfo, XGS_DMA_RX_CHAN + chan); + sinfo->poll_channels |= 1 << chan; + } + } + if (!sinfo->poll_channels) { + sinfo->poll_channels = (uint32_t)(1 << sinfo->rx_chans) - 1; + budget_chans = budget / sinfo->rx_chans; + } else { + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + budget_chans++; + } + } + budget_chans = budget / budget_chans; + } + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + chan_done = bkn_do_rx(sinfo, chan, budget_chans); + rx_dcbs_done += chan_done; + if (chan_done < budget_chans) { + sinfo->poll_channels &= ~(1 << chan); + } + bkn_rx_desc_done(sinfo, chan); + } + + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + continue; + } + + if (dma_stat & (0x1 << (XGS_DMA_RX_CHAN + chan))) { + xgsm_dma_chain_clear(sinfo, XGS_DMA_RX_CHAN + chan); + bkn_rx_chain_done(sinfo, chan); + } + } + + if (dma_stat & (0x1 << XGS_DMA_TX_CHAN) || + irq_stat & (0x08000000 << XGS_DMA_TX_CHAN)) { + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + xgsm_dma_desc_clear(sinfo, XGS_DMA_TX_CHAN); + } else { + xgsm_dma_chain_clear(sinfo, XGS_DMA_TX_CHAN); + } + tx_dcbs_done = bkn_do_tx(sinfo); + bkn_tx_chain_done(sinfo, tx_dcbs_done); + } + + return sinfo->poll_channels ? budget : rx_dcbs_done; +} + +static int +xgsx_do_dma(bkn_switch_info_t *sinfo, int budget) +{ + int rx_dcbs_done = 0, tx_dcbs_done = 0; + int chan_done, budget_chans = 0; + uint32_t irq_stat, tx_dma_stat, rx_dma_stat[NUM_CMICX_RX_CHAN]; + int chan; + + DEV_READ32(sinfo, CMICX_IRQ_STATr, &irq_stat); + DEV_READ32(sinfo, CMICX_DMA_STATr + 0x80 * XGS_DMA_TX_CHAN, &tx_dma_stat); + for (chan = 0; chan < sinfo->rx_chans; chan++) { + DEV_READ32(sinfo, + CMICX_DMA_STATr + 0x80 * (XGS_DMA_RX_CHAN + chan), + &rx_dma_stat[chan]); + } + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if ((irq_stat & CMICX_DS_CMC_CTRLD_INT(XGS_DMA_RX_CHAN + chan)) || + (irq_stat & CMICX_DS_CMC_DESC_DONE(XGS_DMA_RX_CHAN + chan))) { + xgsx_dma_desc_clear(sinfo, XGS_DMA_RX_CHAN + chan); + sinfo->poll_channels |= 1 << chan; + } + } + if (!sinfo->poll_channels) { + sinfo->poll_channels = (uint32_t)(1 << sinfo->rx_chans) - 1; + budget_chans = budget / sinfo->rx_chans; + } else { + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + budget_chans++; + } + } + budget_chans = budget / budget_chans; + } + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + chan_done = bkn_do_rx(sinfo, chan, budget_chans); + rx_dcbs_done += chan_done; + if (chan_done < budget_chans) { + sinfo->poll_channels &= ~(1 << chan); + } + bkn_rx_desc_done(sinfo, chan); + } + + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + continue; + } + + if (rx_dma_stat[chan] & CMICX_DS_CMC_DMA_CHAIN_DONE) { + xgsx_dma_chain_clear(sinfo, XGS_DMA_RX_CHAN + chan); + bkn_rx_chain_done(sinfo, chan); + } + } + + if ((irq_stat & CMICX_DS_CMC_CTRLD_INT(XGS_DMA_TX_CHAN)) || + (tx_dma_stat & CMICX_DS_CMC_DMA_CHAIN_DONE)) { + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + xgsx_dma_desc_clear(sinfo, XGS_DMA_TX_CHAN); + } else { + xgsx_dma_chain_clear(sinfo, XGS_DMA_TX_CHAN); + } + tx_dcbs_done = bkn_do_tx(sinfo); + bkn_tx_chain_done(sinfo, tx_dcbs_done); + } + + return sinfo->poll_channels ? budget : rx_dcbs_done; +} + +static int +dev_do_dma(bkn_switch_info_t *sinfo, int budget) +{ + if (DEV_IS_CMICX(sinfo)) { + return xgsx_do_dma(sinfo, budget); + } else if (DEV_IS_CMICM(sinfo)) { + return xgsm_do_dma(sinfo, budget); + } else { + return xgs_do_dma(sinfo, budget); + } +} + +static void +xgs_isr(bkn_switch_info_t *sinfo) +{ + uint32_t irq_stat; + int rx_dcbs_done; + + DEV_READ32(sinfo, CMIC_IRQ_STATr, &irq_stat); + if ((irq_stat & sinfo->irq_mask) == 0) { + /* Not ours */ + return; + } + sinfo->interrupts++; + + DBG_IRQ(("Got interrupt on device %d (0x%08x)\n", + sinfo->dev_no, irq_stat)); + + if (use_napi) { + bkn_schedule_napi_poll(sinfo); + } else { + xgs_irq_mask_set(sinfo, 0); + do { + rx_dcbs_done = xgs_do_dma(sinfo, MAX_RX_DCBS); + } while (rx_dcbs_done); + } + + xgs_irq_mask_set(sinfo, sinfo->irq_mask); +} + +static void +xgsm_isr(bkn_switch_info_t *sinfo) +{ + uint32_t irq_stat; + int rx_dcbs_done; + + DEV_READ32(sinfo, CMICM_IRQ_STATr, &irq_stat); + if ((irq_stat & sinfo->irq_mask) == 0) { + /* Not ours */ + return; + } + sinfo->interrupts++; + + DBG_IRQ(("Got interrupt on device %d (0x%08x)\n", + sinfo->dev_no, irq_stat)); + + if (use_napi) { + bkn_schedule_napi_poll(sinfo); + } else { + xgsm_irq_mask_set(sinfo, 0); + do { + rx_dcbs_done = xgsm_do_dma(sinfo, MAX_RX_DCBS); + if (sinfo->cdma_channels) { + if (rx_dcbs_done >= MAX_RX_DCBS || sinfo->tx_yield) { + /* Continuous DMA mode requires to yield timely */ + break; + } + } + } while (rx_dcbs_done); + } + + xgsm_irq_mask_set(sinfo, sinfo->irq_mask); +} + +static void +xgsx_isr(bkn_switch_info_t *sinfo) +{ + uint32_t irq_stat; + int rx_dcbs_done; + + DEV_READ32(sinfo, CMICX_IRQ_STATr, &irq_stat); + if ((irq_stat & sinfo->irq_mask) == 0) { + /* Not ours */ + return; + } + sinfo->interrupts++; + + DBG_IRQ(("Got interrupt on device %d (0x%08x)\n", + sinfo->dev_no, irq_stat)); + + if (use_napi) { + bkn_schedule_napi_poll(sinfo); + } else { + xgsx_irq_mask_set(sinfo, 0); + do { + rx_dcbs_done = xgsx_do_dma(sinfo, MAX_RX_DCBS); + if (sinfo->cdma_channels) { + if (rx_dcbs_done >= MAX_RX_DCBS || sinfo->tx_yield) { + /* Continuous DMA mode requires to yield timely */ + break; + } + } + } while (rx_dcbs_done); + } + + xgsx_irq_mask_set(sinfo, sinfo->irq_mask); +} + +static void +bkn_isr(void *isr_data) +{ + bkn_switch_info_t *sinfo = isr_data; + + /* Safe exit on SMP systems */ + if (!module_initialized) { + return; + } + + /* Ensure that we do not touch registers during device reset */ + if (sinfo->irq_mask == 0) { + /* Not ours */ + return; + } + + spin_lock(&sinfo->lock); + + if (sinfo->napi_poll_mode) { + /* Not ours */ + spin_unlock(&sinfo->lock); + return; + } + + if (DEV_IS_CMICX(sinfo)) { + xgsx_isr(sinfo); + } else if (DEV_IS_CMICM(sinfo)) { + xgsm_isr(sinfo); + } else { + xgs_isr(sinfo); + } + + spin_unlock(&sinfo->lock); +} + +#ifdef CONFIG_NET_POLL_CONTROLLER +static void +bkn_poll_controller(struct net_device *dev) +{ + bkn_priv_t *priv = netdev_priv(dev); + + disable_irq(dev->irq); + bkn_isr(priv->sinfo); + enable_irq(dev->irq); +} +#endif + +static void +bkn_resume_rx(bkn_switch_info_t *sinfo) +{ + bkn_desc_info_t *desc; + bkn_dcb_chain_t *dcb_chain; + uint64_t cur_halt, last_dcb, dcb_dma; + int woffset, chan, cdma_running; + + /* Resume Rx DMA on all channels */ + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (sinfo->rx[chan].use_rx_skb) { + cdma_running = 0; + bkn_api_rx_restart(sinfo, chan); + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + cur_halt = sinfo->halt_addr[XGS_DMA_RX_CHAN + chan]; + last_dcb = sinfo->rx[chan].desc[MAX_RX_DCBS].dcb_dma; + if (cur_halt != last_dcb) { + desc = &sinfo->rx[chan].desc[sinfo->rx[chan].dirty + 1]; + bkn_cdma_goto(sinfo, XGS_DMA_RX_CHAN + chan, desc->dcb_dma); + cdma_running = 1; + } + } + if (!cdma_running) { + bkn_rx_restart(sinfo, chan); + } + } else { + cdma_running = 0; + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + if (sinfo->rx[chan].api_active) { + dcb_chain = sinfo->rx[chan].api_dcb_chain_end; + woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize; + dcb_dma = dcb_chain->dcb_dma + woffset * sizeof(uint32_t); + bkn_cdma_goto(sinfo, XGS_DMA_RX_CHAN + chan, dcb_dma); + cdma_running = 1; + } + } + if (!cdma_running) { + bkn_api_rx_restart(sinfo, chan); + } + } + } +} + +static int +bkn_open(struct net_device *dev) +{ + bkn_priv_t *priv = netdev_priv(dev); + bkn_switch_info_t *sinfo = priv->sinfo; + unsigned long flags; + + /* Check if base device */ + if (priv->id <= 0) { + /* NAPI used only on base device */ + if (use_napi) { + bkn_napi_enable(dev, &sinfo->napi); + } + + /* Start DMA when base device is started */ + if (sinfo->basedev_suspended) { + spin_lock_irqsave(&sinfo->lock, flags); + dev_do_dma(sinfo, MAX_RX_DCBS); + sinfo->basedev_suspended = 0; + bkn_api_tx(sinfo); + if (!sinfo->tx.api_active) { + bkn_resume_tx(sinfo); + } + bkn_resume_rx(sinfo); + spin_unlock_irqrestore(&sinfo->lock, flags); + } + } + + if (!sinfo->basedev_suspended) { + netif_start_queue(dev); + } + + return 0; +} + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)) +static int +bkn_set_mac_address(struct net_device *dev, void *addr) +{ + if (!is_valid_ether_addr(((struct sockaddr *)addr)->sa_data)) { + return -EINVAL; + } + memcpy(dev->dev_addr, ((struct sockaddr *)addr)->sa_data, dev->addr_len); + return 0; +} +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)) +static int +bkn_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) +{ + bkn_priv_t *priv = netdev_priv(dev); + bkn_switch_info_t *sinfo = priv->sinfo; + struct hwtstamp_config config; + + if (cmd == SIOCSHWTSTAMP) { + if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) { + return -EFAULT; + } + + if (!knet_hw_tstamp_enable_cb || !knet_hw_tstamp_disable_cb || + priv->type != KCOM_NETIF_T_PORT) { + return -ERANGE; + } + + switch (config.tx_type) { + case HWTSTAMP_TX_OFF: + knet_hw_tstamp_disable_cb(sinfo->dev_no, priv->port); + sinfo->tx_hwts = 0; + break; + case HWTSTAMP_TX_ON: + knet_hw_tstamp_enable_cb(sinfo->dev_no, priv->port); + sinfo->tx_hwts = 1; + break; + default: + return -ERANGE; + } + + switch (config.rx_filter) { + case HWTSTAMP_FILTER_NONE: + if (sinfo->rx_hwts) { + knet_hw_tstamp_disable_cb(sinfo->dev_no, priv->port); + sinfo->rx_hwts = 0; + } + break; + default: + if (!sinfo->rx_hwts) { + knet_hw_tstamp_enable_cb(sinfo->dev_no, priv->port); + sinfo->rx_hwts = 1; + } + config.rx_filter = HWTSTAMP_FILTER_ALL; + break; + } + + return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ? -EFAULT : 0; + } + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)) + if (cmd == SIOCGHWTSTAMP) { + config.flags = 0; + config.tx_type = sinfo->tx_hwts ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; + config.rx_filter = sinfo->rx_hwts ? HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE; + + return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ? -EFAULT : 0; + } +#endif + + return -EINVAL; +} +#endif + +static int +bkn_change_mtu(struct net_device *dev, int new_mtu) +{ + int max_size = new_mtu + ETH_HLEN + VLAN_HLEN + 4; + + if (new_mtu < 68 || max_size > rx_buffer_size) { + return -EINVAL; + } + dev->mtu = new_mtu; + return 0; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) +static int +bkn_poll(struct net_device *dev, int *budget) +{ + bkn_priv_t *priv = netdev_priv(dev); + bkn_switch_info_t *sinfo = priv->sinfo; + int cur_budget = *budget; + int poll_again = 0; + int rx_dcbs_done; + unsigned long flags; + + spin_lock_irqsave(&sinfo->lock, flags); + + DBG_NAPI(("NAPI poll on %s.\n", dev->name)); + + sinfo->napi_poll_again = 0; + + if (cur_budget > dev->quota) { + cur_budget = dev->quota; + } + + rx_dcbs_done = dev_do_dma(sinfo, cur_budget); + + *budget -= rx_dcbs_done; + cur_budget -= rx_dcbs_done; + dev->quota -= rx_dcbs_done; + + if (sinfo->napi_poll_again || cur_budget <= 0) { + poll_again = 1; + sinfo->napi_not_done++; + } else { + bkn_napi_poll_complete(sinfo); + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return poll_again; +} +#else +static int +bkn_poll(struct napi_struct *napi, int budget) +{ + bkn_switch_info_t *sinfo = container_of(napi, bkn_switch_info_t, napi); + int rx_dcbs_done; + unsigned long flags; + + spin_lock_irqsave(&sinfo->lock, flags); + + DBG_NAPI(("NAPI poll on %s.\n", sinfo->dev->name)); + + sinfo->napi_poll_again = 0; + + rx_dcbs_done = dev_do_dma(sinfo, budget); + + if (sinfo->napi_poll_again || rx_dcbs_done >= budget) { + /* Force poll again */ + rx_dcbs_done = budget; + sinfo->napi_not_done++; + } else { + bkn_napi_poll_complete(sinfo); + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return rx_dcbs_done; +} +#endif + +static int +bkn_stop(struct net_device *dev) +{ + bkn_priv_t *priv = netdev_priv(dev); + bkn_switch_info_t *sinfo = priv->sinfo; + unsigned long flags; + + netif_stop_queue(dev); + + /* Check if base device */ + if (priv->id <= 0) { + /* NAPI used only on base device */ + if (use_napi) { + bkn_napi_disable(dev, &sinfo->napi); + } + /* Suspend all devices if base device is stopped */ + if (basedev_suspend) { + spin_lock_irqsave(&sinfo->lock, flags); + bkn_suspend_tx(sinfo); + sinfo->basedev_suspended = 1; + spin_unlock_irqrestore(&sinfo->lock, flags); + } + } + + return 0; +} + +/* + * Network Device Statistics. + * Cleared at init time. + */ +static struct net_device_stats * +bkn_get_stats(struct net_device *dev) +{ + bkn_priv_t *priv = netdev_priv(dev); + + return &priv->stats; +} + +/* Fake multicast ability */ +static void +bkn_set_multicast_list(struct net_device *dev) +{ +} + +static int +bkn_hw_tstamp_tx_config(bkn_switch_info_t *sinfo, struct sk_buff *skb, uint32_t *meta) +{ + uint32_t *md = NULL; + + if (!knet_hw_tstamp_tx_meta_get_cb) { + return -1; + } + + KNET_SKB_CB(skb)->dcb_type = sinfo->dcb_type & 0xFFFF; + knet_hw_tstamp_tx_meta_get_cb(sinfo->dev_no, skb, &md); + if (!md) { + return -1; + } + + switch (sinfo->dcb_type) { + case 26: + case 32: + case 33: + meta[2] |= md[0]; + meta[3] |= md[1]; + meta[4] |= md[2]; + meta[5] |= md[3]; + break; + case 36: + case 38: + meta[0] |= md[0]; + meta[1] |= md[1]; + meta[2] |= md[2]; + meta[3] |= md[3]; + break; + default: + return -1; + } + + return 0; +} + +static int +bkn_tx(struct sk_buff *skb, struct net_device *dev) +{ + bkn_priv_t *priv = netdev_priv(dev); + bkn_switch_info_t *sinfo = priv->sinfo; + struct sk_buff *new_skb = NULL; + unsigned char *pktdata; + int pktlen, hdrlen, taglen, rcpulen, metalen; + int sop, idx; + uint16_t tpid; + uint32_t *metadata; + unsigned long flags; + + DBG_VERB(("Netif Tx: Len=%d\n", skb->len)); + + if (priv->id <= 0) { + /* Do not transmit on base device */ + priv->stats.tx_dropped++; + dev_kfree_skb_any(skb); + return 0; + } + + if (!netif_carrier_ok(dev)) { + DBG_WARN(("Tx drop: Netif link is down.\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_no_link++; + dev_kfree_skb_any(skb); + return 0; + } + + spin_lock_irqsave(&sinfo->lock, flags); + + if (sinfo->tx.free > 1) { + bkn_desc_info_t *desc = &sinfo->tx.desc[sinfo->tx.cur]; + uint32_t *dcb, *meta; + + pktdata = skb->data; + pktlen = skb->len; + + if (device_is_sand(sinfo)) { + hdrlen = priv->system_headers_size; + } + else { + hdrlen = (sinfo->cmic_type == 'x' ) ? PKT_TX_HDR_SIZE : 0; + } + rcpulen = 0; + sop = 0; + + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + rcpulen = RCPU_HDR_SIZE; + if (skb->len < (rcpulen + 14)) { + DBG_WARN(("Tx drop: Invalid RCPU encapsulation\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_rcpu_encap++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + if (check_rcpu_signature && + ((skb->data[18] << 8) | skb->data[19]) != sinfo->rcpu_sig) { + DBG_WARN(("Tx drop: Invalid RCPU signature\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_rcpu_sig++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + if (skb->data[21] & RCPU_F_MODHDR) { + sop = skb->data[RCPU_HDR_SIZE]; + switch (sop) { + case 0xff: + case 0x81: + case 0xfb: + case 0xfc: + break; + default: + DBG_WARN(("Tx drop: Invalid RCPU meta data\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_rcpu_meta++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + if (sinfo->cmic_type != 'x') { + rcpulen += RCPU_TX_META_SIZE; + } + } + /* Skip over RCPU encapsulation */ + pktdata = &skb->data[rcpulen]; + pktlen -= rcpulen; + + /* CPU packets require tag */ + if (sop == 0) { + hdrlen = 0; + tpid = (pktdata[12] << 8) | pktdata[13]; + if (tpid != 0x8100) { + if (skb_header_cloned(skb)) { + /* Current SKB cannot be modified */ + DBG_SKB(("Realloc Tx SKB\n")); + new_skb = dev_alloc_skb(pktlen + TAG_SZ + FCS_SZ); + if (new_skb == NULL) { + DBG_WARN(("Tx drop: No SKB memory\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_no_skb++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + memcpy(new_skb->data, pktdata, 12); + memcpy(&new_skb->data[16], &pktdata[12], pktlen - 12); + skb_put(new_skb, pktlen + TAG_SZ); + dev_kfree_skb_any(skb); + skb = new_skb; + pktdata = skb->data; + rcpulen = 0; + } else { + /* Add tag to RCPU header space */ + DBG_SKB(("Expand into unused RCPU header\n")); + rcpulen -= TAG_SZ; + pktdata = &skb->data[rcpulen]; + for (idx = 0; idx < 12; idx++) { + pktdata[idx] = pktdata[idx + TAG_SZ]; + } + } + pktdata[12] = 0x81; + pktdata[13] = 0x00; + pktdata[14] = (priv->vlan >> 8) & 0xf; + pktdata[15] = priv->vlan & 0xff; + pktlen += TAG_SZ; + } + } + } else { + if ((sinfo->cmic_type == 'x' && priv->port >= 0) || device_is_sand(sinfo)) { + if (skb_header_cloned(skb) || skb_headroom(skb) < hdrlen + 4) { + /* Current SKB cannot be modified */ + DBG_SKB(("Realloc Tx SKB\n")); + new_skb = dev_alloc_skb(pktlen + hdrlen + 4 + FCS_SZ); + if (new_skb == NULL) { + DBG_WARN(("Tx drop: No SKB memory\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_no_skb++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + if (!device_is_sand(sinfo)) + { + skb_reserve(new_skb, 4); + } + memcpy(new_skb->data + hdrlen, skb->data, pktlen); + skb_put(new_skb, pktlen + hdrlen); + dev_kfree_skb_any(skb); + skb = new_skb; + } else { + DBG_SKB(("Expand Tx SKB\n")); + skb_push(skb, hdrlen); + } + memset(skb->data, 0, hdrlen); + pktdata = skb->data; + pktlen += hdrlen; + } else { + hdrlen = 0; + } + + if (priv->port < 0 || (priv->flags & KCOM_NETIF_F_ADD_TAG)) { + DBG_DUNE(("ADD VLAN TAG\n")); + /* Need to add VLAN tag if packet is untagged */ + tpid = (skb->data[hdrlen + 12] << 8) | skb->data[hdrlen + 13]; + if (tpid != 0x8100) { + if (skb_header_cloned(skb) || skb_headroom(skb) < 4) { + /* Current SKB cannot be modified */ + DBG_SKB(("Realloc Tx SKB\n")); + new_skb = dev_alloc_skb(pktlen + TAG_SZ + FCS_SZ); + if (new_skb == NULL) { + DBG_WARN(("Tx drop: No SKB memory\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_no_skb++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + memcpy(new_skb->data, skb->data, hdrlen + 12); + memcpy(&new_skb->data[hdrlen + 16], &skb->data[hdrlen + 12], + pktlen - hdrlen - 12); + skb_put(new_skb, pktlen + TAG_SZ); + dev_kfree_skb_any(skb); + skb = new_skb; + } else { + /* Add tag to existing buffer */ + DBG_SKB(("Expand Tx SKB\n")); + skb_push(skb, TAG_SZ); + for (idx = 0; idx < hdrlen + 12; idx++) { + skb->data[idx] = skb->data[idx + TAG_SZ]; + } + } + pktdata = skb->data; + pktdata[hdrlen + 12] = 0x81; + pktdata[hdrlen + 13] = 0x00; + pktdata[hdrlen + 14] = (priv->vlan >> 8) & 0xf; + pktdata[hdrlen + 15] = priv->vlan & 0xff; + pktlen += TAG_SZ; + } + } + } + + /* Pad packet if needed */ + taglen = 0; + tpid = (pktdata[hdrlen + 12] << 8) | pktdata[hdrlen + 13]; + if (tpid == 0x8100) { + taglen = 4; + } + if (pktlen < (60 + taglen + hdrlen)) { + pktlen = (60 + taglen + hdrlen); + if (SKB_PADTO(skb, pktlen) != 0) { + DBG_WARN(("Tx drop: skb_padto failed\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_pad_fail++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + /* skb_padto may update the skb->data pointer */ + pktdata = &skb->data[rcpulen]; + } + + if ((pktlen + FCS_SZ) > SOC_DCB_KNET_COUNT_MASK) { + DBG_WARN(("Tx drop: size of pkt (%d) is out of range(%d)\n", + (pktlen + FCS_SZ), SOC_DCB_KNET_COUNT_MASK)); + sinfo->tx.pkts_d_over_limit++; + priv->stats.tx_dropped++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + + dcb = desc->dcb_mem; + meta = (sinfo->cmic_type == 'x') ? (uint32_t *)pktdata : dcb; + memset(dcb, 0, sinfo->dcb_wsize * sizeof(uint32_t)); + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + /* If module header SOP is non-zero, use RCPU meta data */ + if (sop != 0) { + if (sinfo->cmic_type == 'x') { + dcb[2] |= 1 << 19; + } else { + metalen = (sinfo->dcb_wsize - 3) * sizeof(uint32_t); + if (metalen > RCPU_TX_META_SIZE) { + metalen = RCPU_TX_META_SIZE; + } + metadata = (uint32_t *)&skb->data[RCPU_HDR_SIZE]; + for (idx = 0; idx < BYTES2WORDS(metalen); idx++) { + dcb[idx + 2] = ntohl(metadata[idx]); + } + dcb[1] |= 1 << 19; + } + } + } else if (priv->port >= 0) { + /* Send to physical port */ + if (sinfo->cmic_type == 'x') { + dcb[2] |= 1 << 19; + } else { + dcb[1] |= 1 << 19; + } + switch (sinfo->dcb_type) { + case 23: + case 26: + case 30: + case 31: + case 34: + case 37: + dcb[2] = 0x81000000; + dcb[3] = priv->port; + dcb[3] |= (priv->qnum & 0xc00) << 20; + dcb[4] = 0x00040000; + dcb[4] |= (priv->qnum & 0x3ff) << 8; + break; + case 24: + dcb[2] = 0xff000000; + dcb[3] = 0x00000100; + dcb[4] = priv->port; + dcb[4] |= (priv->qnum & 0xfff) << 14; + break; + case 28: + /* + * if KCOM_NETIF_T_PORT, add PTCH+ITMH header + * if KCOM_NETIF_T_VLAN, add PTCH+header + */ + pktdata = skb->data; + memcpy(&pktdata[0], priv->system_headers, priv->system_headers_size); + dcb[2] = ((priv->qnum & 0xff) << 24); + break; + case 29: + dcb[2] = 0x81000000; + dcb[3] = priv->port; + dcb[4] = 0x00100000; + dcb[4] |= (priv->qnum & 0xfff) << 8; + break; + case 32: + dcb[2] = 0x81000000; + dcb[3] = priv->port; + dcb[4] = 0x00004000; + dcb[4] |= (priv->qnum & 0x3f) << 8; + break; + case 33: + dcb[2] = 0x81000000; + dcb[3] = (priv->port) << 2; + dcb[4] = 0x00100000; + dcb[4] |= (priv->qnum & 0xfff) << 8; + break; + case 35: + dcb[2] = 0x81000000; + dcb[3] = (priv->port) << 4; + dcb[4] = 0x00400000; + dcb[4] |= (priv->qnum & 0x3fff) << 8; + break; + case 36: + if (sinfo->cmic_type == 'x') { + meta[0] = htonl(0x81000000); + meta[1] = htonl(priv->port); + meta[2] = htonl(0x00008000 | (priv->qnum & 0x3f) << 9); + } else { + dcb[2] = 0x81000000; + dcb[3] = priv->port; + dcb[4] = 0x00008000; + dcb[4] |= (priv->qnum & 0x3f) << 9; + } + break; + case 38: + if (sinfo->cmic_type == 'x') { + meta[0] = htonl(0x81000000); + meta[1] = htonl(priv->port); + meta[2] = htonl(0x00004000 | (priv->qnum & 0x3f) << 8); + } else { + dcb[2] = 0x81000000; + dcb[3] = priv->port; + dcb[4] = 0x00004000; + dcb[4] |= (priv->qnum & 0x3f) << 8; + } + break; + case 39: + if (device_is_dnx(sinfo)) { + /* + * if KCOM_NETIF_T_PORT, add MH+PTCH+ITMH header + * if KCOM_NETIF_T_VLAN, add MH+PTCH+header + */ + pktdata = skb->data; + memcpy(&pktdata[0], priv->system_headers, priv->system_headers_size); + } + break; + default: + dcb[2] = 0xff000000; + dcb[3] = 0x00000100; + dcb[4] = priv->port; + break; + } + } + + /* Optional SKB updates */ + if (knet_tx_cb != NULL) { + KNET_SKB_CB(skb)->netif_user_data = priv->cb_user_data; + KNET_SKB_CB(skb)->dcb_type = sinfo->dcb_type & 0xFFFF; + skb = knet_tx_cb(skb, sinfo->dev_no, meta); + if (skb == NULL) { + /* Consumed by call-back */ + DBG_WARN(("Tx drop: Consumed by call-back\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_callback++; + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + /* Restore (possibly) altered packet variables + * bit0 -bit15 of dcb[1] is used to save requested byte count + */ + if ((skb->len + FCS_SZ) <= SOC_DCB_KNET_COUNT_MASK) { + pktlen = skb->len; + if (pktlen < (60 + taglen + hdrlen)) { + pktlen = (60 + taglen + hdrlen); + if (SKB_PADTO(skb, pktlen) != 0) { + DBG_WARN(("Tx drop: skb_padto failed\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_pad_fail++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + DBG_SKB(("Packet padded to %d bytes after tx callback\n", pktlen)); + } + pktdata = skb->data; + if (sinfo->cmic_type == 'x') { + meta = (uint32_t *)pktdata; + } + } else { + DBG_WARN(("Tx drop: size of pkt (%d) is out of range(%d)\n", + (pktlen + FCS_SZ), SOC_DCB_KNET_COUNT_MASK)); + sinfo->tx.pkts_d_over_limit++; + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_callback++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + } + + /* Do Tx timestamping */ + if (priv->port >= 0) { + if (bkn_skb_tx_flags(skb) & SKBTX_HW_TSTAMP && sinfo->tx_hwts) { + KNET_SKB_CB(skb)->port = priv->port; + bkn_hw_tstamp_tx_config(sinfo, skb, meta); + bkn_skb_tx_flags(skb) |= SKBTX_IN_PROGRESS; + } + bkn_skb_tx_timestamp(skb); + } + + /* Prepare for DMA */ + desc->skb = skb; + /* Add FCS bytes */ + pktlen = pktlen + FCS_SZ; + desc->dma_size = pktlen; + desc->skb_dma = DMA_MAP_SINGLE(sinfo->dma_dev, + pktdata, desc->dma_size, + DMA_TODEV); + if (DMA_MAPPING_ERROR(sinfo->dma_dev, desc->skb_dma)) { + priv->stats.tx_dropped++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + dcb[0] = desc->skb_dma; + if (sinfo->cmic_type == 'x') { + dcb[1] = DMA_TO_BUS_HI(desc->skb_dma >> 32); + dcb[2] &= ~SOC_DCB_KNET_COUNT_MASK; + dcb[2] |= pktlen; + } else { + dcb[1] &= ~SOC_DCB_KNET_COUNT_MASK; + dcb[1] |= pktlen; + } + + bkn_dump_dcb("Tx RCPU", dcb, sinfo->dcb_wsize, XGS_DMA_TX_CHAN); + DBG_DCB_TX(("Add Tx DCB @ 0x%08x (%d) [%d free] (%d bytes).\n", + (uint32_t)desc->dcb_dma, sinfo->tx.cur, + sinfo->tx.free, pktlen)); + bkn_dump_pkt(pktdata, pktlen, XGS_DMA_TX_CHAN); + + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + if (sinfo->cmic_type == 'x') { + dcb[2] |= 1 << 24 | 1 << 16; + } else { + dcb[1] |= 1 << 24 | 1 << 16; + } + } else { + bkn_tx_dma_start(sinfo); + } + if (++sinfo->tx.cur >= MAX_TX_DCBS) { + sinfo->tx.cur = 0; + } + sinfo->tx.free--; + + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN) && !sinfo->tx.api_active) { + /* DMA run to the new halt location */ + bkn_cdma_goto(sinfo, XGS_DMA_TX_CHAN, + sinfo->tx.desc[sinfo->tx.cur].dcb_dma); + } + + priv->stats.tx_packets++; + priv->stats.tx_bytes += pktlen; + sinfo->tx.pkts++; + } else { + DBG_WARN(("Tx drop: No DMA resources\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_dma_resrc++; + dev_kfree_skb_any(skb); + } + + /* Check our Tx resources */ + if (sinfo->tx.free <= 1) { + bkn_suspend_tx(sinfo); + } + + NETDEV_UPDATE_TRANS_START_TIME(dev); + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return 0; +} + +static void +bkn_timer_func(bkn_switch_info_t *sinfo) +{ + unsigned long flags; + int chan; + int restart_timer; + + spin_lock_irqsave(&sinfo->lock, flags); + + sinfo->timer_runs++; + + restart_timer = 0; + for (chan = 0; chan < sinfo->rx_chans; chan++) { + /* Restart channel if not running */ + if (sinfo->rx[chan].running == 0) { + bkn_rx_refill(sinfo, chan); + if (bkn_rx_restart(sinfo, chan) != 0) { + restart_timer = 1; + } + } + } + + if (restart_timer) { + /* Presumably still out of memory */ + sinfo->timer.expires = jiffies + 1; + add_timer(&sinfo->timer); + } else { + sinfo->timer_queued = 0; + } + + spin_unlock_irqrestore(&sinfo->lock, flags); +} + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0)) +static void +bkn_timer(unsigned long context) +{ + bkn_switch_info_t *sinfo = (bkn_switch_info_t *)context; + return bkn_timer_func(sinfo); +} +#else +static void +bkn_timer(struct timer_list *t) +{ + bkn_switch_info_t *sinfo = from_timer(sinfo, t, timer); + return bkn_timer_func(sinfo); +} +#endif + +static void +bkn_rx_add_tokens(bkn_switch_info_t *sinfo, int chan) +{ + unsigned long cur_jif, ticks; + uint32_t tokens_per_tick; + bkn_desc_info_t *desc; + + tokens_per_tick = sinfo->rx[chan].rate_max / HZ; + cur_jif = jiffies; + ticks = cur_jif - sinfo->rx[chan].tok_jif; + sinfo->rx[chan].tokens += ticks * tokens_per_tick; + sinfo->rx[chan].tok_jif = cur_jif; + if (sinfo->rx[chan].tokens > sinfo->rx[chan].burst_max) { + sinfo->rx[chan].tokens = sinfo->rx[chan].burst_max; + } + + /* Restart channel if Rx is suppressed */ + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + bkn_rx_refill(sinfo, chan); + desc = &sinfo->rx[chan].desc[sinfo->rx[chan].dirty]; + if (desc->dcb_dma == sinfo->halt_addr[XGS_DMA_RX_CHAN + chan]) { + desc = &sinfo->rx[chan].desc[MAX_RX_DCBS]; + bkn_cdma_goto(sinfo, XGS_DMA_RX_CHAN + chan, desc->dcb_dma); + } + } else { + if (sinfo->rx[chan].running == 0) { + bkn_rx_refill(sinfo, chan); + bkn_rx_restart(sinfo, chan); + } + } +} + +static void +bkn_rxtick_func(bkn_switch_info_t *sinfo) +{ + unsigned long flags; + unsigned long cur_jif, ticks; + uint32_t pkt_diff; + int chan; + + spin_lock_irqsave(&sinfo->lock, flags); + + sinfo->rxtick.expires = jiffies + sinfo->rxtick_jiffies; + + /* For debug purposes we maintain a rough actual packet rate */ + if (++sinfo->rxticks >= sinfo->rxticks_per_sec) { + for (chan = 0; chan < sinfo->rx_chans; chan++) { + pkt_diff = sinfo->rx[chan].pkts - sinfo->rx[chan].pkts_ref; + cur_jif = jiffies; + ticks = cur_jif - sinfo->rx[chan].rate_jif; + sinfo->rx[chan].rate = (pkt_diff * HZ) / ticks; + sinfo->rx[chan].rate_jif = cur_jif; + sinfo->rx[chan].pkts_ref = sinfo->rx[chan].pkts; + } + sinfo->rxticks = 0; + } + + /* Update tokens for Rx rate control */ + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (sinfo->rx[chan].tokens < sinfo->rx[chan].burst_max) { + bkn_rx_add_tokens(sinfo, chan); + } + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + + add_timer(&sinfo->rxtick); +} + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0)) +static void +bkn_rxtick(unsigned long context) +{ + bkn_switch_info_t *sinfo = (bkn_switch_info_t *)context; + return bkn_rxtick_func(sinfo); +} +#else +static void +bkn_rxtick(struct timer_list *t) +{ + bkn_switch_info_t *sinfo = from_timer(sinfo, t, rxtick); + return bkn_rxtick_func(sinfo); +} +#endif + +static void +bkn_rx_rate_config(bkn_switch_info_t *sinfo) +{ + unsigned long flags; + int chan; + uint32_t rxticks_per_sec, rps; + uint32_t jiffies_per_rxtick; + uint32_t tokens_per_rxtick; + + spin_lock_irqsave(&sinfo->lock, flags); + + /* Calculate the minimum update frequency across all channels */ + rxticks_per_sec = 1; + for (chan = 0; chan < NUM_RX_CHAN; chan++) { + if (sinfo->rx[chan].burst_max == 0) { + sinfo->rx[chan].burst_max = sinfo->rx[chan].rate_max / 10; + } + rps = sinfo->rx[chan].rate_max / sinfo->rx[chan].burst_max; + if (rxticks_per_sec < rps) { + rxticks_per_sec = rps; + } + } + + /* Convert update frequency to system ticks */ + jiffies_per_rxtick = HZ / rxticks_per_sec; + if (jiffies_per_rxtick == 0) { + jiffies_per_rxtick = 1; + } + rxticks_per_sec = HZ / jiffies_per_rxtick; + + for (chan = 0; chan < NUM_RX_CHAN; chan++) { + /* Ensure that burst size satifies overall rate */ + tokens_per_rxtick = sinfo->rx[chan].rate_max / rxticks_per_sec; + if (sinfo->rx[chan].burst_max < tokens_per_rxtick) { + sinfo->rx[chan].burst_max = tokens_per_rxtick; + } + /* Ensure that rate has a sane value */ + if (sinfo->rx[chan].rate_max != 0) { + if (sinfo->rx[chan].rate_max < rxticks_per_sec) { + sinfo->rx[chan].rate_max = rxticks_per_sec; + } + } + sinfo->rx[chan].tokens = sinfo->rx[chan].burst_max; + } + + /* Update timer controls */ + sinfo->rxticks_per_sec = rxticks_per_sec; + sinfo->rxtick_jiffies = jiffies_per_rxtick; + + spin_unlock_irqrestore(&sinfo->lock, flags); +} + +static void +bkn_destroy_sinfo(bkn_switch_info_t *sinfo) +{ + list_del(&sinfo->list); + bkn_free_dcbs(sinfo); + kfree(sinfo); +} + +static bkn_switch_info_t * +bkn_create_sinfo(int dev_no) +{ + bkn_switch_info_t *sinfo; + int chan; + + if ((sinfo = kmalloc(sizeof(*sinfo), GFP_KERNEL)) == NULL) { + return NULL; + } + memset(sinfo, 0, sizeof(*sinfo)); + INIT_LIST_HEAD(&sinfo->ndev_list); + INIT_LIST_HEAD(&sinfo->rxpf_list); + sinfo->base_addr = lkbde_get_dev_virt(dev_no); + sinfo->dma_dev = lkbde_get_dma_dev(dev_no); + sinfo->pdev = lkbde_get_hw_dev(dev_no); + sinfo->dev_no = dev_no; + sinfo->evt_idx = -1; + + spin_lock_init(&sinfo->lock); + skb_queue_head_init(&sinfo->tx_ptp_queue); + INIT_WORK(&sinfo->tx_ptp_work, bkn_hw_tstamp_tx_work); + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0)) + init_timer(&sinfo->timer); + sinfo->timer.data = (unsigned long)sinfo; + sinfo->timer.function = bkn_timer; +#else + timer_setup(&sinfo->timer, bkn_timer, 0); +#endif + sinfo->timer.expires = jiffies + 1; + + INIT_LIST_HEAD(&sinfo->tx.api_dcb_list); + + for (chan = 0; chan < NUM_RX_CHAN; chan++) { + INIT_LIST_HEAD(&sinfo->rx[chan].api_dcb_list); + sinfo->rx[chan].use_rx_skb = use_rx_skb; + } + + /* + * Check for dual DMA mode where Rx DMA channel 0 uses DMA buffers + * provided by the BCM API, and the remaining Rx DMA channel(s) + * use socket buffers (SKB) provided by the Linux kernel. + */ + if (use_rx_skb == 2) { + sinfo->rx[0].use_rx_skb = 0; + } + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0)) + init_timer(&sinfo->rxtick); + sinfo->rxtick.data = (unsigned long)sinfo; + sinfo->rxtick.function = bkn_rxtick; +#else + timer_setup(&sinfo->rxtick, bkn_rxtick, 0); +#endif + sinfo->rxtick.expires = jiffies + 1; + + for (chan = 0; chan < NUM_RX_CHAN; chan++) { + sinfo->rx[chan].rate_max = rx_rate[chan]; + sinfo->rx[chan].burst_max = rx_burst[chan]; + } + bkn_rx_rate_config(sinfo); + + add_timer(&sinfo->rxtick); + + list_add_tail(&sinfo->list, &_sinfo_list); + + return sinfo; +} + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)) +static const struct net_device_ops bkn_netdev_ops = { + .ndo_open = bkn_open, + .ndo_stop = bkn_stop, + .ndo_start_xmit = bkn_tx, + .ndo_get_stats = bkn_get_stats, + .ndo_validate_addr = eth_validate_addr, + .ndo_set_rx_mode = bkn_set_multicast_list, + .ndo_set_mac_address = bkn_set_mac_address, + .ndo_do_ioctl = bkn_ioctl, + .ndo_tx_timeout = NULL, + .ndo_change_mtu = bkn_change_mtu, +#ifdef CONFIG_NET_POLL_CONTROLLER + .ndo_poll_controller = bkn_poll_controller, +#endif +}; +#endif + +static void +bkn_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo) +{ + strlcpy(drvinfo->driver, "bcm-knet", sizeof(drvinfo->driver)); + snprintf(drvinfo->version, sizeof(drvinfo->version), "%d", KCOM_VERSION); + strlcpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version)); + strlcpy(drvinfo->bus_info, "N/A", sizeof(drvinfo->bus_info)); +} + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)) +static int +bkn_get_ts_info(struct net_device *dev, struct ethtool_ts_info *info) +{ + bkn_priv_t *priv = netdev_priv(dev); + bkn_switch_info_t *sinfo = priv->sinfo; + + switch (sinfo->dcb_type) { + case 26: + case 32: + case 33: + case 36: + case 38: + info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE | + SOF_TIMESTAMPING_TX_SOFTWARE | + SOF_TIMESTAMPING_RX_HARDWARE | + SOF_TIMESTAMPING_RX_SOFTWARE | + SOF_TIMESTAMPING_SOFTWARE | + SOF_TIMESTAMPING_RAW_HARDWARE; + info->tx_types = 1 << HWTSTAMP_TX_OFF | 1 << HWTSTAMP_TX_ON; + info->rx_filters = 1 << HWTSTAMP_FILTER_NONE | 1 << HWTSTAMP_FILTER_ALL; + if (knet_hw_tstamp_ptp_clock_index_cb) { + info->phc_index = knet_hw_tstamp_ptp_clock_index_cb(sinfo->dev_no); + } else { + info->phc_index = -1; + } + break; + default: + info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | + SOF_TIMESTAMPING_RX_SOFTWARE | + SOF_TIMESTAMPING_SOFTWARE; + info->phc_index = -1; + break; + } + + return 0; +} +#endif + +static const struct ethtool_ops bkn_ethtool_ops = { + .get_drvinfo = bkn_get_drvinfo, +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)) + .get_ts_info = bkn_get_ts_info, +#endif +}; + +static struct net_device * +bkn_init_ndev(u8 *mac, char *name) +{ + struct net_device *dev; + + /* Create Ethernet device */ + dev = alloc_etherdev(sizeof(bkn_priv_t)); + + if (dev == NULL) { + DBG_WARN(("Error allocating Ethernet device.\n")); + return NULL; + } +#ifdef SET_MODULE_OWNER + SET_MODULE_OWNER(dev); +#endif + + /* Set the device MAC address */ + memcpy(dev->dev_addr, mac, 6); + + /* Device information -- not available right now */ + dev->irq = 0; + dev->base_addr = 0; + + /* Default MTU should not exceed MTU of switch front-panel ports */ + dev->mtu = default_mtu; + if (dev->mtu == 0) { + dev->mtu = rx_buffer_size; + } + + /* Device vectors */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)) + dev->netdev_ops = &bkn_netdev_ops; +#else + dev->open = bkn_open; + dev->hard_start_xmit = bkn_tx; + dev->stop = bkn_stop; + dev->set_multicast_list = bkn_set_multicast_list; + dev->do_ioctl = NULL; + dev->get_stats = bkn_get_stats; + dev->change_mtu = bkn_change_mtu; +#ifdef CONFIG_NET_POLL_CONTROLLER + dev->poll_controller = bkn_poll_controller; +#endif +#endif + dev->ethtool_ops = &bkn_ethtool_ops; + if (name && *name) { + strncpy(dev->name, name, IFNAMSIZ-1); + } + + /* Register the kernel Ethernet device */ + if (register_netdev(dev)) { + DBG_WARN(("Error registering Ethernet device.\n")); + free_netdev(dev); + return NULL; + } + DBG_VERB(("Created Ethernet device %s.\n", dev->name)); + + return dev; +} + +/* + * Device Link Control Proc Read Entry + */ +static int +bkn_proc_link_show(struct seq_file *m, void *v) +{ + struct list_head *slist, *dlist; + struct net_device *dev; + bkn_priv_t *priv; + bkn_switch_info_t *sinfo; + unsigned long flags; + + seq_printf(m, "Software link status:\n"); + list_for_each(slist, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)slist; + spin_lock_irqsave(&sinfo->lock, flags); + list_for_each(dlist, &sinfo->ndev_list) { + priv = (bkn_priv_t *)dlist; + dev = priv->dev; + if (dev) { + seq_printf(m, " %-14s %s\n", dev->name, + netif_carrier_ok(dev) ? "up" : "down"); + } + } + spin_unlock_irqrestore(&sinfo->lock, flags); + } + return 0; +} + +static int +bkn_proc_link_open(struct inode * inode, struct file * file) +{ + return single_open(file, bkn_proc_link_show, NULL); +} + +/* + * Device Link Control Proc Write Entry + * + * Syntax: + * =up|down + * + * Where is a virtual network interface name. + * + * Examples: + * eth4=up + * eth4=down + */ +static ssize_t +bkn_proc_link_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + struct list_head *slist, *dlist; + struct net_device *dev; + bkn_priv_t *priv; + bkn_switch_info_t *sinfo; + unsigned long flags; + char link_str[40]; + char *ptr; + char *newline; + + if (count > sizeof(link_str)) { + count = sizeof(link_str) - 1; + link_str[count] = '\0'; + } + if (copy_from_user(link_str, buf, count)) { + return -EFAULT; + } + link_str[count] = 0; + newline = strchr(link_str, '\n'); + if (newline) { + /* Chop off the trailing newline */ + *newline = '\0'; + } + + if ((ptr = strchr(link_str, '=')) == NULL && + (ptr = strchr(link_str, ':')) == NULL) { + gprintk("Error: link syntax not recognized: '%s'\n", link_str); + return count; + } + *ptr++ = 0; + + dev = NULL; + list_for_each(slist, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)slist; + spin_lock_irqsave(&sinfo->lock, flags); + list_for_each(dlist, &sinfo->ndev_list) { + priv = (bkn_priv_t *)dlist; + if (priv->dev) { + if (strcmp(priv->dev->name, link_str) == 0) { + dev = priv->dev; + break; + } + } + } + if (dev) { + if (strcmp(ptr, "up") == 0) { + netif_carrier_on(dev); + } else if (strcmp(ptr, "down") == 0) { + netif_carrier_off(dev); + } else { + gprintk("Warning: unknown link state setting: '%s'\n", ptr); + } + spin_unlock_irqrestore(&sinfo->lock, flags); + return count; + } + spin_unlock_irqrestore(&sinfo->lock, flags); + } + + gprintk("Warning: unknown network interface: '%s'\n", link_str); + + return count; +} + +struct file_operations bkn_proc_link_file_ops = { + owner: THIS_MODULE, + open: bkn_proc_link_open, + read: seq_read, + llseek: seq_lseek, + write: bkn_proc_link_write, + release: single_release, +}; + +/* + * Device Rate Control Proc Read Entry + */ +static int +bkn_proc_rate_show(struct seq_file *m, void *v) +{ + int unit = 0; + struct list_head *list; + bkn_switch_info_t *sinfo; + int chan; + + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + + seq_printf(m, "Rate control (unit %d):\n", unit); + for (chan = 0; chan < sinfo->rx_chans; chan++) { + seq_printf(m, " Rx%d max rate %8u\n", + chan, sinfo->rx[chan].rate_max); + seq_printf(m, " Rx%d max burst %8u\n", + chan, sinfo->rx[chan].burst_max); + seq_printf(m, " Rx%d rate %8u\n", + chan, sinfo->rx[chan].rate); + seq_printf(m, " Rx%d tokens %8u\n", + chan, sinfo->rx[chan].tokens); + } + + unit++; + } + return 0; +} + +static int +bkn_proc_rate_open(struct inode * inode, struct file * file) +{ + return single_open(file, bkn_proc_rate_show, NULL); +} + +/* + * Device Rate Control Proc Write Entry + * + * Syntax: + * [:]rx_rate=[,[, is packets/sec for the first Rx DMA channel, + * is packets/sec for the second Rx DMA channel, etc. + * + * Examples: + * rx_rate=5000 + * 0:rx_rate=10000,10000 + * 1:rx_rate=10000,5000 + */ +static ssize_t +bkn_proc_rate_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + bkn_switch_info_t *sinfo; + char rate_str[80]; + char *ptr; + int unit, chan; + + if (count > sizeof(rate_str)) { + count = sizeof(rate_str) - 1; + rate_str[count] = '\0'; + } + if (copy_from_user(rate_str, buf, count)) { + return -EFAULT; + } + + unit = simple_strtol(rate_str, NULL, 10); + sinfo = bkn_sinfo_from_unit(unit); + if (sinfo == NULL) { + gprintk("Warning: unknown unit: %d\n", unit); + return count; + } + + if ((ptr = strstr(rate_str, "rx_rate=")) != NULL) { + ptr += 7; + chan = 0; + do { + ptr++; + sinfo->rx[chan].rate_max = simple_strtol(ptr, NULL, 10); + } while ((ptr = strchr(ptr, ',')) != NULL && ++chan < sinfo->rx_chans); + bkn_rx_rate_config(sinfo); + } else if ((ptr = strstr(rate_str, "rx_burst=")) != NULL) { + ptr += 8; + chan = 0; + do { + ptr++; + sinfo->rx[chan].burst_max = simple_strtol(ptr, NULL, 10); + } while ((ptr = strchr(ptr, ',')) != NULL && ++chan < sinfo->rx_chans); + bkn_rx_rate_config(sinfo); + } else { + gprintk("Warning: unknown configuration setting\n"); + } + + return count; +} + +struct file_operations bkn_proc_rate_file_ops = { + owner: THIS_MODULE, + open: bkn_proc_rate_open, + read: seq_read, + llseek: seq_lseek, + write: bkn_proc_rate_write, + release: single_release, +}; + +/* + * Driver DMA Proc Entry + * + * This output can be rather large (> PAGE_SIZE) so we use the + * seq_file interface to do the output. Special header records + * are indicated by a negative DCB index. + */ +typedef struct { + int dev_no; /* Current unit */ + int rx_dma; /* 0: Tx DMA, 1: Rx DMA*/ + int ch_no; /* DMA channel no. (Rx only) */ + int idx; /* DCB index */ +} bkn_seq_dma_iter_t; + +/* From current record, move forward 'pos' records */ +static int +bkn_seq_dma_next_pos(bkn_seq_dma_iter_t *iter, loff_t pos) +{ + bkn_switch_info_t *sinfo; + + sinfo = bkn_sinfo_from_unit(iter->dev_no); + while (pos) { + if (iter->rx_dma) { + if (++iter->idx >= MAX_RX_DCBS + 1) { + iter->idx = -1; + if (++iter->ch_no >= sinfo->rx_chans) { + iter->rx_dma = 0; + iter->ch_no = 0; + iter->dev_no++; + if ((sinfo = bkn_sinfo_from_unit(iter->dev_no)) == NULL) { + return -1; + } + } + } + } else { + if (++iter->idx >= MAX_TX_DCBS + 1) { + iter->idx = -1; + iter->rx_dma = 1; + } + } + pos--; + } + return 0; +} + +/* Initialize private data and move to requested start record */ +static void * +bkn_seq_dma_start(struct seq_file *s, loff_t *pos) +{ + bkn_seq_dma_iter_t *iter; + + iter = kmalloc(sizeof(bkn_seq_dma_iter_t), GFP_KERNEL); + if (!iter) { + return NULL; + } + memset(iter, 0, sizeof(*iter)); + iter->idx = -2; + if (bkn_seq_dma_next_pos(iter, *pos) < 0) { + kfree(iter); + return NULL; + } + return iter; +} + +/* Move to next record */ +static void * +bkn_seq_dma_next(struct seq_file *s, void *v, loff_t *pos) +{ + bkn_seq_dma_iter_t *iter = (bkn_seq_dma_iter_t *)v; + void *rv = iter; + + if (bkn_seq_dma_next_pos(iter, 1) < 0) { + return NULL; + } + (*pos)++; + return rv; +} + +/* Release private data */ +static void +bkn_seq_dma_stop(struct seq_file *s, void *v) +{ + if (v) { + kfree(v); + } +} + +/* Print current record */ +static int +bkn_seq_dma_show(struct seq_file *s, void *v) +{ + bkn_seq_dma_iter_t *iter = (bkn_seq_dma_iter_t *)v; + bkn_switch_info_t *sinfo; + uint32_t *dcb = NULL; + bkn_dcb_chain_t *dcb_chain = NULL; + struct list_head *curr, *next; + unsigned long flags; + int chan, cnt; + + sinfo = bkn_sinfo_from_unit(iter->dev_no); + if (sinfo == NULL) { + /* Should not happen */ + return 0; + } + + if (iter->rx_dma == 0) { + if (iter->idx == -2) { + seq_printf(s, "Pending events: 0x%x\n", sinfo->dma_events); + } else if (iter->idx == -1) { + spin_lock_irqsave(&sinfo->lock, flags); + curr = &sinfo->tx.api_dcb_list; + dcb_chain = sinfo->tx.api_dcb_chain; + while (dcb_chain) { + seq_printf(s, " [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma); + for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) { + dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt]; + if (sinfo->cmic_type == 'x') { + seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, + dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); + } else { + seq_printf(s, " DCB %2d: 0x%08x 0x%08x ... 0x%08x\n", cnt, + dcb[0], dcb[1], dcb[sinfo->dcb_wsize-1]); + } + } + next = curr->next; + if (next != &sinfo->tx.api_dcb_list) { + dcb_chain = list_entry(next, bkn_dcb_chain_t, list); + curr = next; + } else { + dcb_chain = NULL; + } + } + dcb = NULL; + spin_unlock_irqrestore(&sinfo->lock, flags); + seq_printf(s, + "Tx DCB info (unit %d):\n" + " api: %d\n" + " dirty: %d\n" + " cur: %d\n" + " free: %d\n" + " pause: %s\n", + iter->dev_no, + sinfo->tx.api_active, + sinfo->tx.dirty, + sinfo->tx.cur, + sinfo->tx.free, + netif_queue_stopped(sinfo->dev) ? "yes" : "no"); + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + bkn_desc_info_t *desc = &sinfo->tx.desc[0]; + uint64_t halt = sinfo->halt_addr[XGS_DMA_TX_CHAN]; + seq_printf(s, + " halt: %d\n", + (int)((uint32_t)(halt - desc->dcb_dma) / (sinfo->dcb_wsize * sizeof(uint32_t)))); + } + } else { + dcb = sinfo->tx.desc[iter->idx].dcb_mem; + if (iter->idx == 0) { + seq_printf(s, " [0x%08lx]--->\n", (unsigned long)sinfo->tx.desc[0].dcb_dma); + } + } + } else { + if (iter->idx == -1) { + chan = iter->ch_no; + seq_printf(s, + "Rx%d DCB info (unit %d):\n" + " api: %d\n" + " dirty: %d\n" + " cur: %d\n" + " free: %d\n" + " run: %d\n", + chan, iter->dev_no, + sinfo->rx[chan].api_active, + sinfo->rx[chan].dirty, + sinfo->rx[chan].cur, + sinfo->rx[chan].free, + sinfo->rx[chan].running); + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan) && sinfo->rx[chan].use_rx_skb) { + bkn_desc_info_t *desc = &sinfo->rx[chan].desc[0]; + uint64_t halt = sinfo->halt_addr[XGS_DMA_RX_CHAN + chan]; + seq_printf(s, + " halt: %d\n", + (int)((uint32_t)(halt - desc->dcb_dma) / (sinfo->dcb_wsize * sizeof(uint32_t)))); + } + } else if (sinfo->rx[iter->ch_no].use_rx_skb) { + dcb = sinfo->rx[iter->ch_no].desc[iter->idx].dcb_mem; + if (iter->idx == 0) { + seq_printf(s, " [0x%08lx]--->\n", (unsigned long)sinfo->rx[iter->ch_no].desc[0].dcb_dma); + } + } else if (!sinfo->rx[iter->ch_no].use_rx_skb && iter->idx == 0) { + spin_lock_irqsave(&sinfo->lock, flags); + curr = &sinfo->rx[iter->ch_no].api_dcb_list; + dcb_chain = sinfo->rx[iter->ch_no].api_dcb_chain; + while (dcb_chain) { + seq_printf(s, " [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma); + for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) { + dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt]; + if (sinfo->cmic_type == 'x') { + seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, + dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); + } else { + seq_printf(s, " DCB %2d: 0x%08x 0x%08x ... 0x%08x\n", cnt, + dcb[0], dcb[1], dcb[sinfo->dcb_wsize-1]); + } + } + next = curr->next; + if (next != &sinfo->rx[iter->ch_no].api_dcb_list) { + dcb_chain = list_entry(next, bkn_dcb_chain_t, list); + curr = next; + } else { + dcb_chain = NULL; + } + } + dcb = NULL; + spin_unlock_irqrestore(&sinfo->lock, flags); + } + } + if (dcb) { + if (sinfo->cmic_type == 'x') { + seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", iter->idx, + dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); + } else { + seq_printf(s, " DCB %2d: 0x%08x 0x%08x ... 0x%08x\n", iter->idx, + dcb[0], dcb[1], dcb[sinfo->dcb_wsize-1]); + } + } + return 0; +} + +static struct seq_operations bkn_seq_dma_ops = { + .start = bkn_seq_dma_start, + .next = bkn_seq_dma_next, + .stop = bkn_seq_dma_stop, + .show = bkn_seq_dma_show +}; + +static int +bkn_seq_dma_open(struct inode *inode, struct file *file) +{ + return seq_open(file, &bkn_seq_dma_ops); +}; + +static struct file_operations bkn_seq_dma_file_ops = { + .owner = THIS_MODULE, + .open = bkn_seq_dma_open, + .read = seq_read, + .llseek = seq_lseek, + .release = seq_release +}; + +/* + * Device Debug Control Proc Write Entry + * + * Syntax: + * [:]debug= + * + * Where corresponds to the debug module parameter. + * + * Examples: + * debug=0xffff + * 0:debug-0x2000 + */ +static ssize_t +bkn_proc_debug_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + bkn_switch_info_t *sinfo; + char debug_str[40]; + char *ptr; + int unit; + + if (count > sizeof(debug_str)) { + count = sizeof(debug_str) - 1; + debug_str[count] = '\0'; + } + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + unit = simple_strtol(debug_str, NULL, 10); + sinfo = bkn_sinfo_from_unit(unit); + if (sinfo == NULL) { + gprintk("Warning: unknown unit: %d\n", unit); + return count; + } + + if ((ptr = strstr(debug_str, "debug=")) != NULL) { + ptr += 6; + debug = simple_strtol(ptr, NULL, 0); + } else { + gprintk("Warning: unknown configuration setting\n"); + } + + return count; +} + +/* + * Driver Debug Proc Entry + */ +static int +bkn_proc_debug_show(struct seq_file *m, void *v) +{ + int unit = 0; + struct list_head *list; + bkn_switch_info_t *sinfo; + + seq_printf(m, "Configuration:\n"); + seq_printf(m, " debug: 0x%x\n", debug); + seq_printf(m, " mac_addr: %02x:%02x:%02x:%02x:%02x:%02x\n", + bkn_dev_mac[0], bkn_dev_mac[1], bkn_dev_mac[2], + bkn_dev_mac[3], bkn_dev_mac[4], bkn_dev_mac[5]); + seq_printf(m, " rx_buffer_size: %d (0x%x)\n", + rx_buffer_size, rx_buffer_size); + seq_printf(m, " rcpu_mode: %d\n", rcpu_mode); + seq_printf(m, " rcpu_dmac: %02x:%02x:%02x:%02x:%02x:%02x\n", + bkn_rcpu_dmac[0], bkn_rcpu_dmac[1], bkn_rcpu_dmac[2], + bkn_rcpu_dmac[3], bkn_rcpu_dmac[4], bkn_rcpu_dmac[5]); + seq_printf(m, " rcpu_smac: %02x:%02x:%02x:%02x:%02x:%02x\n", + bkn_rcpu_smac[0], bkn_rcpu_smac[1], bkn_rcpu_smac[2], + bkn_rcpu_smac[3], bkn_rcpu_smac[4], bkn_rcpu_smac[5]); + seq_printf(m, " rcpu_ethertype: 0x%x\n", rcpu_ethertype); + seq_printf(m, " rcpu_signature: 0x%x\n", rcpu_signature); + seq_printf(m, " rcpu_vlan: %d\n", rcpu_vlan); + seq_printf(m, " use_rx_skb: %d\n", use_rx_skb); + seq_printf(m, " num_rx_prio: %d\n", num_rx_prio); + seq_printf(m, " check_rcpu_sig: %d\n", check_rcpu_signature); + seq_printf(m, " default_mtu: %d\n", default_mtu); + seq_printf(m, " rx_sync_retry: %d\n", rx_sync_retry); + seq_printf(m, " use_napi: %d\n", use_napi); + seq_printf(m, " napi_weight: %d\n", napi_weight); + seq_printf(m, " basedev_susp: %d\n", basedev_suspend); + seq_printf(m, "Active IOCTLs:\n"); + seq_printf(m, " Command: %d\n", ioctl_cmd); + seq_printf(m, " Event: %d\n", ioctl_evt); + + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + + seq_printf(m, "Device %d:\n", unit); + seq_printf(m, " base_addr: 0x%p\n", sinfo->base_addr); + seq_printf(m, " dev_no: %d\n", sinfo->dev_no); + seq_printf(m, " cmic_type: %c\n", sinfo->cmic_type); + seq_printf(m, " dcb_type: %d\n", sinfo->dcb_type); + seq_printf(m, " dcb_wsize: %d\n", sinfo->dcb_wsize); + seq_printf(m, " pkt_hdr_size: %d\n", sinfo->pkt_hdr_size); + seq_printf(m, " rx_chans: %d\n", sinfo->rx_chans); + seq_printf(m, " cdma_chans: 0x%x\n", sinfo->cdma_channels); + seq_printf(m, " irq_mask: 0x%x\n", sinfo->irq_mask); + seq_printf(m, " dma_events: 0x%x\n", sinfo->dma_events); + seq_printf(m, " dcb_dma: 0x%p\n", (void *)(sal_paddr_t)sinfo->dcb_dma); + seq_printf(m, " dcb_mem_size: 0x%x\n", sinfo->dcb_mem_size); + seq_printf(m, " rcpu_sig: 0x%x\n", sinfo->rcpu_sig); + seq_printf(m, " napi_poll_mode: %d\n", sinfo->napi_poll_mode); + seq_printf(m, " inst_id: 0x%x\n", sinfo->inst_id); + seq_printf(m, " evt_queue: %d\n", sinfo->evt_idx); + + unit++; + } + + return 0; +} + +static int bkn_proc_debug_open(struct inode * inode, struct file * file) +{ + return single_open(file, bkn_proc_debug_show, NULL); +} + +struct file_operations bkn_proc_debug_file_ops = { + owner: THIS_MODULE, + open: bkn_proc_debug_open, + read: seq_read, + llseek: seq_lseek, + write: bkn_proc_debug_write, + release: single_release, +}; + +/* + * Device Statistics Proc Entry + */ +static int +bkn_proc_stats_show(struct seq_file *m, void *v) +{ + int unit = 0; + struct list_head *list, *flist; + bkn_switch_info_t *sinfo; + bkn_filter_t *filter; + int chan; + + + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + + seq_printf(m, "Device stats (unit %d):\n", unit); + seq_printf(m, " Interrupts %10u\n", sinfo->interrupts); + seq_printf(m, " Tx packets %10u\n", sinfo->tx.pkts); + for (chan = 0; chan < sinfo->rx_chans; chan++) { + seq_printf(m, " Rx%d packets %10u\n", chan, sinfo->rx[chan].pkts); + } + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (sinfo->interrupts == 0) { + /* Avoid divide-by-zero */ + seq_printf(m, " Rx%d pkts/intr -\n", chan); + } else { + seq_printf(m, " Rx%d pkts/intr %8u\n", + chan, sinfo->rx[chan].pkts / sinfo->interrupts); + } + } + seq_printf(m, " Timer runs %10u\n", sinfo->timer_runs); + seq_printf(m, " NAPI reruns %10u\n", sinfo->napi_not_done); + + list_for_each(flist, &sinfo->rxpf_list) { + filter = (bkn_filter_t *)flist; + + seq_printf(m, " Filter %d stats:\n", filter->kf.id); + seq_printf(m, " Hits %10lu\n", filter->hits); + } + + unit++; + } + return 0; +} + +static int bkn_proc_stats_open(struct inode * inode, struct file * file) +{ + return single_open(file, bkn_proc_stats_show, NULL); +} + +/* + * Device Statistics Proc Write Entry + * + * Syntax: + * [:]clear[=all] + * + * Where corresponds to the debug module parameter. + * + * Examples: + * clear + * 0:clear=all + */ +static ssize_t +bkn_proc_stats_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + bkn_switch_info_t *sinfo; + struct list_head *flist; + bkn_filter_t *filter; + char debug_str[40]; + char *ptr; + int unit; + int clear_mask; + int chan; + + if (count > sizeof(debug_str)) { + count = sizeof(debug_str) - 1; + debug_str[count] = '\0'; + } + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + unit = simple_strtol(debug_str, NULL, 10); + sinfo = bkn_sinfo_from_unit(unit); + if (sinfo == NULL) { + gprintk("Warning: unknown unit: %d\n", unit); + return count; + } + + clear_mask = 0; + if ((ptr = strstr(debug_str, "clear=")) != NULL) { + ptr += 6; + if (strncmp(ptr, "all", 3) == 0) { + clear_mask = ~0; + } + } else if ((ptr = strstr(debug_str, "clear")) != NULL) { + clear_mask = ~0; + } else { + gprintk("Warning: unknown configuration setting\n"); + } + + if (clear_mask) { + sinfo->tx.pkts = 0; + for (chan = 0; chan < sinfo->rx_chans; chan++) { + sinfo->rx[chan].pkts = 0; + } + sinfo->interrupts = 0; + sinfo->timer_runs = 0; + sinfo->napi_not_done = 0; + list_for_each(flist, &sinfo->rxpf_list) { + filter = (bkn_filter_t *)flist; + filter->hits = 0; + } + } + + return count; +} + +struct file_operations bkn_proc_stats_file_ops = { + owner: THIS_MODULE, + open: bkn_proc_stats_open, + read: seq_read, + llseek: seq_lseek, + write: bkn_proc_stats_write, + release: single_release, +}; + +/* + * Device Debug Statistics Proc Entry + */ +static int +bkn_proc_dstats_show(struct seq_file *m, void *v) +{ + int unit = 0; + struct list_head *list; + bkn_switch_info_t *sinfo; + int chan; + + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + + seq_printf(m, "Device debug stats (unit %d):\n", unit); + seq_printf(m, " Tx drop no skb %10u\n", + sinfo->tx.pkts_d_no_skb); + seq_printf(m, " Tx drop rcpu encap %10u\n", + sinfo->tx.pkts_d_rcpu_encap); + seq_printf(m, " Tx drop rcpu sig %10u\n", + sinfo->tx.pkts_d_rcpu_sig); + seq_printf(m, " Tx drop rcpu meta %10u\n", + sinfo->tx.pkts_d_rcpu_meta); + seq_printf(m, " Tx drop pad failed %10u\n", + sinfo->tx.pkts_d_pad_fail); + seq_printf(m, " Tx drop no resource %10u\n", + sinfo->tx.pkts_d_dma_resrc); + seq_printf(m, " Tx drop callback %10u\n", + sinfo->tx.pkts_d_callback); + seq_printf(m, " Tx drop no link %10u\n", + sinfo->tx.pkts_d_no_link); + seq_printf(m, " Tx drop oversized %10u\n", + sinfo->tx.pkts_d_over_limit); + seq_printf(m, " Tx suspends %10u\n", + sinfo->tx.suspends); + for (chan = 0; chan < sinfo->rx_chans; chan++) { + seq_printf(m, " Rx%d filter to api %10u\n", + chan, sinfo->rx[chan].pkts_f_api); + seq_printf(m, " Rx%d filter to netif %10u\n", + chan, sinfo->rx[chan].pkts_f_netif); + seq_printf(m, " Rx%d mirror to api %10u\n", + chan, sinfo->rx[chan].pkts_m_api); + seq_printf(m, " Rx%d mirror to netif %10u\n", + chan, sinfo->rx[chan].pkts_m_netif); + seq_printf(m, " Rx%d drop no skb %10u\n", + chan, sinfo->rx[chan].pkts_d_no_skb); + seq_printf(m, " Rx%d drop no match %10u\n", + chan, sinfo->rx[chan].pkts_d_no_match); + seq_printf(m, " Rx%d drop unkn netif %10u\n", + chan, sinfo->rx[chan].pkts_d_unkn_netif); + seq_printf(m, " Rx%d drop unkn dest %10u\n", + chan, sinfo->rx[chan].pkts_d_unkn_dest); + seq_printf(m, " Rx%d drop callback %10u\n", + chan, sinfo->rx[chan].pkts_d_callback); + seq_printf(m, " Rx%d drop no link %10u\n", + chan, sinfo->rx[chan].pkts_d_no_link); + seq_printf(m, " Rx%d sync error %10u\n", + chan, sinfo->rx[chan].sync_err); + seq_printf(m, " Rx%d sync retry %10u\n", + chan, sinfo->rx[chan].sync_retry); + seq_printf(m, " Rx%d sync maxloop %10u\n", + chan, sinfo->rx[chan].sync_maxloop); + seq_printf(m, " Rx%d drop no buffer %10u\n", + chan, sinfo->rx[chan].pkts_d_no_api_buf); + } + unit++; + } + return 0; +} + +static int bkn_proc_dstats_open(struct inode * inode, struct file * file) +{ + return single_open(file, bkn_proc_dstats_show, NULL); +} + +/* + * Device Debug Statistics Proc Write Entry + * + * Syntax: + * [:]clear[=all|tx|rx[]] + * + * Where corresponds to the debug module parameter. + * + * Examples: + * clear + * 0:clear=rx1 + */ +static ssize_t +bkn_proc_dstats_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + bkn_switch_info_t *sinfo; + char debug_str[40]; + char *ptr; + int unit; + int clear_mask; + int chan; + + if (count > sizeof(debug_str)) { + count = sizeof(debug_str) - 1; + debug_str[count] = '\0'; + } + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + unit = simple_strtol(debug_str, NULL, 10); + sinfo = bkn_sinfo_from_unit(unit); + if (sinfo == NULL) { + gprintk("Warning: unknown unit: %d\n", unit); + return count; + } + + clear_mask = 0; + if ((ptr = strstr(debug_str, "clear=")) != NULL) { + ptr += 6; + if (strncmp(ptr, "all", 3) == 0) { + clear_mask = ~0; + } else if (strncmp(ptr, "dev", 3) == 0) { + clear_mask = 0x20; + } else if (strncmp(ptr, "tx", 2) == 0) { + clear_mask = 0x10; + } else if (strncmp(ptr, "rx0", 3) == 0) { + clear_mask = (1 << 0); + } else if (strncmp(ptr, "rx1", 3) == 0) { + clear_mask = (1 << 1); + } else if (strncmp(ptr, "rx", 2) == 0) { + clear_mask = 0xf; + } + } else if ((ptr = strstr(debug_str, "clear")) != NULL) { + clear_mask = ~0; + } else { + gprintk("Warning: unknown configuration setting\n"); + } + + /* Tx counters */ + if (clear_mask & 0x10) { + sinfo->tx.pkts_d_no_skb = 0; + sinfo->tx.pkts_d_rcpu_encap = 0; + sinfo->tx.pkts_d_rcpu_sig = 0; + sinfo->tx.pkts_d_rcpu_meta = 0; + sinfo->tx.pkts_d_pad_fail = 0; + sinfo->tx.pkts_d_over_limit = 0; + sinfo->tx.pkts_d_dma_resrc = 0; + sinfo->tx.suspends = 0; + } + /* Rx counters */ + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (clear_mask & (1 << chan)) { + sinfo->rx[chan].pkts_f_api = 0; + sinfo->rx[chan].pkts_f_netif = 0; + sinfo->rx[chan].pkts_m_api = 0; + sinfo->rx[chan].pkts_m_netif = 0; + sinfo->rx[chan].pkts_d_no_skb = 0; + sinfo->rx[chan].pkts_d_no_match = 0; + sinfo->rx[chan].pkts_d_unkn_netif = 0; + sinfo->rx[chan].pkts_d_unkn_dest = 0; + sinfo->rx[chan].pkts_d_no_api_buf = 0; + sinfo->rx[chan].sync_err = 0; + sinfo->rx[chan].sync_retry = 0; + sinfo->rx[chan].sync_maxloop = 0; + } + } + + return count; +} + +struct file_operations bkn_proc_dstats_file_ops = { + owner: THIS_MODULE, + open: bkn_proc_dstats_open, + read: seq_read, + llseek: seq_lseek, + write: bkn_proc_dstats_write, + release: single_release, +}; + +static int +bkn_proc_init(void) +{ + struct proc_dir_entry *entry; + + PROC_CREATE(entry, "link", 0666, bkn_proc_root, &bkn_proc_link_file_ops); + if (entry == NULL) { + return -1; + } + PROC_CREATE(entry, "rate", 0666, bkn_proc_root, &bkn_proc_rate_file_ops); + if (entry == NULL) { + return -1; + } + PROC_CREATE(entry, "dma", 0, bkn_proc_root, &bkn_seq_dma_file_ops); + if (entry == NULL) { + return -1; + } + PROC_CREATE(entry, "debug", 0666, bkn_proc_root, &bkn_proc_debug_file_ops); + if (entry == NULL) { + return -1; + } + PROC_CREATE(entry, "stats", 0666, bkn_proc_root, &bkn_proc_stats_file_ops); + if (entry == NULL) { + return -1; + } + PROC_CREATE(entry, "dstats", 0666, bkn_proc_root, &bkn_proc_dstats_file_ops); + if (entry == NULL) { + return -1; + } + + return 0; +} + +static int +bkn_proc_cleanup(void) +{ + remove_proc_entry("link", bkn_proc_root); + remove_proc_entry("rate", bkn_proc_root); + remove_proc_entry("dma", bkn_proc_root); + remove_proc_entry("debug", bkn_proc_root); + remove_proc_entry("stats", bkn_proc_root); + remove_proc_entry("dstats", bkn_proc_root); + return 0; +} + +/* + * Generic module functions + */ + +static int +_pprint(void) +{ + pprintf("Broadcom BCM KNET Linux Network Driver\n"); + + return 0; +} + +static int +bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + bkn_dcb_chain_t *dcb_chain, *dcb_chain_end; + unsigned long flags; + int chan; + uint64_t dcb_dma; + int woffset; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + dcb_chain = kmalloc(sizeof(*dcb_chain), GFP_KERNEL); + if (dcb_chain == NULL) { + gprintk("Fatal error: No memory for dcb_chain\n"); + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } + memset(dcb_chain, 0, sizeof(*dcb_chain)); + dcb_chain->dcb_cnt = kmsg->dma_info.cnt; + dcb_chain->dcb_dma = kmsg->dma_info.data.dcb_start; + dcb_chain->dcb_mem = kernel_bde->p2l(sinfo->dev_no, + (sal_paddr_t)dcb_chain->dcb_dma); + + if (kmsg->dma_info.type == KCOM_DMA_INFO_T_TX_DCB) { + spin_lock_irqsave(&sinfo->lock, flags); + + /* Hold back packets from kernel */ + bkn_suspend_tx(sinfo); + + list_add_tail(&dcb_chain->list, &sinfo->tx.api_dcb_list); + + /* Handle for Continuous DMA mode */ + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize + 1; + if (sinfo->cmic_type == 'x') { + woffset += 1; + } + if ((dcb_chain->dcb_mem[woffset] & ((1 << 18) | (1 << 16))) != 0x50000) { + gprintk("Not suitable API DCB chain for Continuous DMA mode\n"); + list_del(&dcb_chain->list); + kfree(dcb_chain); + kmsg->hdr.status = KCOM_E_PARAM; + spin_unlock_irqrestore(&sinfo->lock, flags); + return sizeof(kcom_msg_hdr_t); + } + dcb_chain_end = sinfo->tx.api_dcb_chain_end; + if (dcb_chain_end != NULL) { + /* Stitch this chain */ + woffset = (dcb_chain_end->dcb_cnt - 1) * sinfo->dcb_wsize; + dcb_chain_end->dcb_mem[woffset] = dcb_chain->dcb_dma; + if (sinfo->cmic_type == 'x') { + dcb_chain_end->dcb_mem[woffset + 1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); + } + MEMORY_BARRIER; + } + sinfo->tx.api_dcb_chain_end = dcb_chain; + if (sinfo->tx.api_active) { + /* Set new halt location */ + woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize; + dcb_dma = dcb_chain->dcb_dma + woffset * sizeof(uint32_t); + /* DMA run to the new halt location */ + bkn_cdma_goto(sinfo, XGS_DMA_TX_CHAN, dcb_dma); + } + } + + if (sinfo->tx.free == MAX_TX_DCBS && + !sinfo->tx.api_active && + !sinfo->basedev_suspended) { + bkn_api_tx(sinfo); + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + } else if (kmsg->dma_info.type == KCOM_DMA_INFO_T_RX_DCB) { + spin_lock_irqsave(&sinfo->lock, flags); + + chan = kmsg->dma_info.chan - 1; + if ((chan < 0) || (chan > sinfo->rx_chans)) { + gprintk("Invalid RX DMA channel specified: %d\n", + kmsg->dma_info.chan); + kmsg->hdr.status = KCOM_E_PARAM; + spin_unlock_irqrestore(&sinfo->lock, flags); + return sizeof(kcom_msg_hdr_t); + } + + list_add_tail(&dcb_chain->list, &sinfo->rx[chan].api_dcb_list); + + /* Handle for Continuous DMA mode */ + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize + 1; + if (sinfo->cmic_type == 'x') { + woffset += 1; + } + if ((dcb_chain->dcb_mem[woffset] & ((1 << 18) | (1 << 16))) != 0x50000) { + gprintk("Not suitable API DCB chain for Continuous DMA mode\n"); + list_del(&dcb_chain->list); + kfree(dcb_chain); + kmsg->hdr.status = KCOM_E_PARAM; + spin_unlock_irqrestore(&sinfo->lock, flags); + return sizeof(kcom_msg_hdr_t); + } + dcb_chain_end = sinfo->rx[chan].api_dcb_chain_end; + if (dcb_chain_end != NULL) { + /* Stitch this chain */ + woffset = (dcb_chain_end->dcb_cnt - 1) * sinfo->dcb_wsize; + dcb_chain_end->dcb_mem[woffset] = dcb_chain->dcb_dma; + if (sinfo->cmic_type == 'x') { + dcb_chain_end->dcb_mem[woffset + 1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); + } + MEMORY_BARRIER; + } + sinfo->rx[chan].api_dcb_chain_end = dcb_chain; + if (!sinfo->rx[chan].use_rx_skb) { + /* Set new halt location */ + woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize; + dcb_dma = dcb_chain->dcb_dma + woffset * sizeof(uint32_t); + /* DMA run to the new halt location */ + bkn_cdma_goto(sinfo, XGS_DMA_RX_CHAN + chan, dcb_dma); + } + } + + if (sinfo->rx[chan].api_active == 0) { + bkn_api_rx_restart(sinfo, chan); + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + } else { + DBG_DCB(("Unknown DCB_INFO type (%d).\n", kmsg->dma_info.type)); + kfree(dcb_chain); + kmsg->hdr.status = KCOM_E_PARAM; + } + + return sizeof(kcom_msg_hdr_t); +} + +static int +bkn_create_inst(uint32 inst_id) +{ + bkn_switch_info_t *sinfo; + bkn_evt_resource_t *evt; + unsigned long flags; + int i, evt_idx = -1; + + /* multiple instance mode */ + for (i = 0; i < kernel_bde->num_devices(BDE_ALL_DEVICES); i++) { + evt = &_bkn_evt[i]; + if (evt->inst_id == inst_id) { + evt_idx = i; + DBG_INST(("%s evt_idx %d inst_id 0x%x\n",__FUNCTION__, i, inst_id)); + break; + } + if ((_bkn_multi_inst == 0) || (evt->inst_id == 0)) { + _bkn_multi_inst ++; + evt_idx = i; + init_waitqueue_head(&evt->evt_wq); + evt->inst_id = inst_id; + DBG_INST(("%s evt_idx %d inst_id 0x%x\n",__FUNCTION__, i, inst_id)); + break; + } + } + + if (evt_idx == -1) { + DBG_WARN(("Run out the event queue resource !\n")); + return -1; + } + for (i = 0; i < kernel_bde->num_devices(BDE_ALL_DEVICES); i++) { + if (inst_id & (1 << i)) { + sinfo = bkn_sinfo_from_unit(i); + spin_lock_irqsave(&sinfo->lock, flags); + sinfo->evt_idx = evt_idx; + spin_unlock_irqrestore(&sinfo->lock, flags); + DBG_INST(("%s d(%d) evt_idx %d \n",__FUNCTION__, i, evt_idx)); + } + } + return 0; +} + +/* + * Device reprobe driven by application to check if new device is probed or + * existed device is changed after inserting KNET module. + */ +static int +bkn_knet_dev_reprobe(void) +{ + bkn_switch_info_t *sinfo; + int i; + + for (i = 0; i < kernel_bde->num_devices(BDE_ALL_DEVICES); i++) { + sinfo = bkn_sinfo_from_unit(i); + if (sinfo == NULL) { + /* New device found after re-probe. */ + if (bkn_knet_dev_init(i) < 0) { + return -1; + } + } else { + /* Existed device reinit after re-probe. */ + if (bkn_knet_dev_reinit(i) < 0) { + return -1; + } + } + } + return 0; +} + +/* Assign the inst_id and evt_idx */ +static int +bkn_knet_dev_inst_set(kcom_msg_reprobe_t *kmsg) +{ + bkn_switch_info_t *sinfo; + int d = kmsg->hdr.unit; + uint32 inst = 0; + unsigned long flags; + struct list_head *list; + + sinfo = bkn_sinfo_from_unit(d); + lkbde_dev_instid_get(d, &inst); + + spin_lock_irqsave(&sinfo->lock, flags); + if (sinfo->inst_id != inst) { + /* Instance database changed, reinit the inst_id */ + sinfo->inst_id = 0; + sinfo->evt_idx = -1; + } + spin_unlock_irqrestore(&sinfo->lock, flags); + + if (inst) { + if (sinfo->inst_id == 0) { + if (bkn_create_inst(inst) != 0) { + return -1; + } + } + spin_lock_irqsave(&sinfo->lock, flags); + sinfo->inst_id = inst; + spin_unlock_irqrestore(&sinfo->lock, flags); + } else { + /* legacy mode */ + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + spin_lock_irqsave(&sinfo->lock, flags); + sinfo->evt_idx = 0; + sinfo->inst_id = 0; + spin_unlock_irqrestore(&sinfo->lock, flags); + } + } + return 0; +} + +static int +bkn_knet_version(kcom_msg_version_t *kmsg, int len) +{ + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + kmsg->version = KCOM_VERSION; + kmsg->netif_max = KCOM_NETIF_MAX; + kmsg->filter_max = KCOM_FILTER_MAX; + + return sizeof(kcom_msg_version_t); +} + +static int +bkn_knet_hw_reset(kcom_msg_hw_reset_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + unsigned long flags; + int chan; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + if (kmsg->channels == 0) { + /* Clean all if no channels specified */ + bkn_dma_abort(sinfo); + bkn_clean_dcbs(sinfo); + skb_queue_purge(&sinfo->tx_ptp_queue); + } else { + if (kmsg->channels & (1 << XGS_DMA_TX_CHAN)) { + bkn_dma_abort_tx(sinfo); + bkn_clean_tx_dcbs(sinfo); + skb_queue_purge(&sinfo->tx_ptp_queue); + } + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (kmsg->channels & (1 << (XGS_DMA_RX_CHAN + chan))) { + bkn_dma_abort_rx(sinfo, chan); + bkn_clean_rx_dcbs(sinfo, chan); + } + } + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return sizeof(kcom_msg_hdr_t); +} + +static int +bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + uint32_t dev_type; + unsigned long flags; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + DBG_DCB(("DCB size %d, type %d\n", kmsg->dcb_size, kmsg->dcb_type)); + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + sinfo->cmic_type = kmsg->cmic_type; + sinfo->dcb_type = kmsg->dcb_type; + sinfo->dcb_wsize = BYTES2WORDS(kmsg->dcb_size); + sinfo->pkt_hdr_size = kmsg->pkt_hdr_size; + sinfo->dma_hi = kmsg->dma_hi; + sinfo->rx_chans = sinfo->cmic_type == 'x' ? NUM_CMICX_RX_CHAN : NUM_CMICM_RX_CHAN; + if (sinfo->rx_chans > NUM_RX_CHAN) { + sinfo->rx_chans = NUM_RX_CHAN; + } + + DBG_DUNE(("CMIC:%c DCB:%d WSIZE:%d DMA HI: 0x%08x HDR size: %d\n", + sinfo->cmic_type, sinfo->dcb_type, sinfo->dcb_wsize, + sinfo->dma_hi, sinfo->pkt_hdr_size)); + + /* Config Continuous DMA mode */ + sinfo->cdma_channels = kmsg->cdma_channels & ~(~0 << (sinfo->rx_chans + 1)); + + /* Ensure 32-bit PCI DMA is mapped properly on 64-bit platforms */ + dev_type = kernel_bde->get_dev_type(sinfo->dev_no); + if (dev_type & BDE_PCI_DEV_TYPE && sinfo->cmic_type != 'x') { + if (pci_set_dma_mask(sinfo->pdev, 0xffffffff)) { + spin_unlock_irqrestore(&sinfo->lock, flags); + gprintk("No suitable DMA available for SKBs\n"); + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } + } + + /* First time called we need to allocate DCBs */ + if (sinfo->dcb_mem == NULL) { + if (bkn_alloc_dcbs(sinfo) < 0) { + spin_unlock_irqrestore(&sinfo->lock, flags); + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } + } + + /* Ensure that we restart properly */ + bkn_dma_abort(sinfo); + bkn_clean_dcbs(sinfo); + + if (basedev_suspend) { + if (!netif_running(sinfo->dev)) { + sinfo->basedev_suspended = 1; + } + } + + /* Ensure all interrupts are disabled, e.g. if warmbooting */ + dev_irq_mask_set(sinfo, 0); + + /* Register interrupt handler */ + kernel_bde->interrupt_connect(sinfo->dev_no | LKBDE_ISR2_DEV, + bkn_isr, sinfo); + + /* Init DCBs */ + bkn_init_dcbs(sinfo); + + bkn_dma_init(sinfo); + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return sizeof(kcom_msg_hdr_t); +} + +static int +bkn_knet_detach(kcom_msg_detach_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + unsigned long flags; + bkn_evt_resource_t *evt; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + /* Create dummy event to unblock pending IOCTL */ + sinfo->dma_events |= KCOM_DMA_INFO_F_TX_DONE; + evt = &_bkn_evt[sinfo->evt_idx]; + evt->evt_wq_put++; + wake_up_interruptible(&evt->evt_wq); + + spin_unlock_irqrestore(&sinfo->lock, flags); + + /* Ensure that we return a valid unit number */ + kmsg->hdr.unit = sinfo->dev_no; + + return sizeof(kcom_msg_detach_t); +} + +static int +bkn_knet_reprobe(kcom_msg_reprobe_t *kmsg, int len) +{ + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + /* Support pci hot plug and multiple instance */ + if ((bkn_knet_dev_reprobe() < 0) || + (bkn_knet_dev_inst_set(kmsg) < 0)) { + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_reprobe_t); + } + + return sizeof(kcom_msg_reprobe_t); +} + +static int +bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + struct net_device *dev; + struct list_head *list; + bkn_priv_t *priv, *lpriv; + unsigned long flags; + int found, id; + uint8 *ma; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + switch (kmsg->netif.type) { + case KCOM_NETIF_T_VLAN: + case KCOM_NETIF_T_PORT: + case KCOM_NETIF_T_META: + break; + default: + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + ma = kmsg->netif.macaddr; + if ((ma[0] | ma[1] | ma[2] | ma[3] | ma[4] | ma[5]) == 0) { + bkn_dev_mac[5]++; + ma = bkn_dev_mac; + } + if ((dev = bkn_init_ndev(ma, kmsg->netif.name)) == NULL) { + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } + priv = netdev_priv(dev); + priv->dev = dev; + priv->sinfo = sinfo; + priv->type = kmsg->netif.type; + priv->vlan = kmsg->netif.vlan; + /* System headers are mandatory for DNX devices */ + if (device_is_sand(sinfo)) { + memcpy(priv->system_headers, kmsg->netif.system_headers, kmsg->netif.system_headers_size); + priv->system_headers_size = kmsg->netif.system_headers_size; + } + if (priv->type == KCOM_NETIF_T_PORT) { + priv->port = kmsg->netif.port; + priv->qnum = kmsg->netif.qnum; + } else { + if (device_is_sand(sinfo)) { + priv->port = kmsg->netif.port; + priv->qnum = kmsg->netif.qnum; + } + else { + priv->port = -1; + } + } + priv->flags = kmsg->netif.flags; + priv->cb_user_data = kmsg->netif.cb_user_data; + + /* Force RCPU encapsulation if rcpu_mode */ + if (rcpu_mode) { + priv->flags |= KCOM_NETIF_F_RCPU_ENCAP; + DBG_RCPU(("RCPU auto-enabled\n")); + } + + /* Prevent (incorrect) compiler warning */ + lpriv = NULL; + + spin_lock_irqsave(&sinfo->lock, flags); + + /* + * We insert network interfaces sorted by ID. + * In case an interface is destroyed, we reuse the ID + * the next time an interface is created. + */ + found = 0; + id = 1; + list_for_each(list, &sinfo->ndev_list) { + lpriv = (bkn_priv_t *)list; + if (id < lpriv->id) { + found = 1; + break; + } + id = lpriv->id + 1; + } + priv->id = id; + if (found) { + /* Replace previously removed interface */ + list_add_tail(&priv->list, &lpriv->list); + } else { + /* No holes - add to end of list */ + list_add_tail(&priv->list, &sinfo->ndev_list); + } + + if (id < sinfo->ndev_max) { + DBG_NDEV(("Add netif ID %d to table\n", id)); + sinfo->ndevs[id] = dev; + } else { + int ndev_max = sinfo->ndev_max + NDEVS_CHUNK; + int size = ndev_max * sizeof(struct net_device *); + void *ndevs = kmalloc(size, GFP_ATOMIC); + if (ndevs != NULL) { + DBG_NDEV(("Reallocate netif table for ID %d\n", id)); + memset(ndevs, 0, size); + if (sinfo->ndevs != NULL) { + size = sinfo->ndev_max * sizeof(struct net_device *); + memcpy(ndevs, sinfo->ndevs, size); + kfree(sinfo->ndevs); + } + sinfo->ndevs = ndevs; + sinfo->ndev_max = ndev_max; + sinfo->ndevs[id] = dev; + } + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + + DBG_VERB(("Assigned ID %d to Ethernet device %s\n", + priv->id, dev->name)); + + kmsg->netif.id = priv->id; + memcpy(kmsg->netif.macaddr, dev->dev_addr, 6); + memcpy(kmsg->netif.name, dev->name, KCOM_NETIF_NAME_MAX - 1); + + if (device_is_sand(sinfo)) { + int idx = 0; + for (idx = 0; idx < priv->system_headers_size; idx++) { + DBG_DUNE(("System Header[%d]: 0x%02x\n", idx, priv->system_headers[idx])); + } + } + + return sizeof(*kmsg); +} + +static int +bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + struct net_device *dev; + bkn_priv_t *priv; + struct list_head *list; + unsigned long flags; + int found; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + found = 0; + list_for_each(list, &sinfo->ndev_list) { + priv = (bkn_priv_t *)list; + if (kmsg->hdr.id == priv->id) { + found = 1; + break; + } + } + + if (!found) { + spin_unlock_irqrestore(&sinfo->lock, flags); + kmsg->hdr.status = KCOM_E_NOT_FOUND; + return sizeof(kcom_msg_hdr_t); + } + + list_del(&priv->list); + + if (priv->id < sinfo->ndev_max) { + sinfo->ndevs[priv->id] = NULL; + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + + dev = priv->dev; + DBG_VERB(("Removing virtual Ethernet device %s (%d).\n", + dev->name, priv->id)); + unregister_netdev(dev); + free_netdev(dev); + + return sizeof(kcom_msg_hdr_t); +} + +static int +bkn_knet_netif_list(kcom_msg_netif_list_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + bkn_priv_t *priv; + struct list_head *list; + unsigned long flags; + int idx; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + idx = 0; + list_for_each(list, &sinfo->ndev_list) { + if (idx >= KCOM_NETIF_MAX) { + DBG_WARN(("Too many network interfaces to list (max %d).\n", + KCOM_NETIF_MAX)); + break; + } + priv = (bkn_priv_t *)list; + kmsg->id[idx] = priv->id; + idx++; + } + kmsg->ifcnt = idx; + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return sizeof(*kmsg) - sizeof(kmsg->id) + (idx * sizeof(kmsg->id[0])); +} + +static int +bkn_knet_netif_get(kcom_msg_netif_get_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + bkn_priv_t *priv; + unsigned long flags; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + priv = bkn_netif_lookup(sinfo, kmsg->hdr.id); + + if (priv == NULL) { + spin_unlock_irqrestore(&sinfo->lock, flags); + kmsg->hdr.status = KCOM_E_NOT_FOUND; + return sizeof(kcom_msg_hdr_t); + } + + memcpy(kmsg->netif.macaddr, priv->dev->dev_addr, 6); + memcpy(kmsg->netif.name, priv->dev->name, KCOM_NETIF_NAME_MAX - 1); + kmsg->netif.vlan = priv->vlan; + kmsg->netif.type = priv->type; + kmsg->netif.id = priv->id; + kmsg->netif.flags = priv->flags; + + if (priv->port < 0) { + kmsg->netif.port = 0; + } else { + kmsg->netif.port = priv->port; + } + kmsg->netif.qnum = priv->qnum; + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return sizeof(*kmsg); +} + +static int +bkn_knet_filter_create(kcom_msg_filter_create_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + struct list_head *list; + bkn_filter_t *filter, *lfilter; + unsigned long flags; + int found, id; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + switch (kmsg->filter.type) { + case KCOM_FILTER_T_RX_PKT: + break; + default: + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + /* + * Find available ID + */ + found = 1; + id = 0; + while (found && ++id < KCOM_FILTER_MAX) { + found = 0; + list_for_each(list, &sinfo->rxpf_list) { + lfilter = (bkn_filter_t *)list; + if (id == lfilter->kf.id) { + found = 1; + break; + } + } + } + if (found) { + /* Too many filters */ + spin_unlock_irqrestore(&sinfo->lock, flags); + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } + filter = kmalloc(sizeof(*filter), GFP_ATOMIC); + if (filter == NULL) { + spin_unlock_irqrestore(&sinfo->lock, flags); + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + memset(filter, 0, sizeof(*filter)); + memcpy(&filter->kf, &kmsg->filter, sizeof(filter->kf)); + + if (device_is_dnx(sinfo)) { + /* Information to parser Dune system headers */ + sinfo->ftmh_lb_key_ext_size = kmsg->filter.ftmh_lb_key_ext_size; + sinfo->ftmh_stacking_ext_size = kmsg->filter.ftmh_stacking_ext_size; + sinfo->pph_base_size = kmsg->filter.pph_base_size; + memcpy(sinfo->pph_lif_ext_size, kmsg->filter.pph_lif_ext_size, sizeof(sinfo->pph_lif_ext_size)); + sinfo->udh_enable = kmsg->filter.udh_enable; + memcpy(sinfo->udh_length_type, kmsg->filter.udh_length_type, sizeof(sinfo->udh_length_type)); + } + filter->kf.id = id; + + /* Add according to priority */ + found = 0; + list_for_each(list, &sinfo->rxpf_list) { + lfilter = (bkn_filter_t *)list; + if (filter->kf.priority < lfilter->kf.priority) { + list_add_tail(&filter->list, &lfilter->list); + found = 1; + break; + } + } + if (!found) { + list_add_tail(&filter->list, &sinfo->rxpf_list); + } + + kmsg->filter.id = filter->kf.id; + + spin_unlock_irqrestore(&sinfo->lock, flags); + + DBG_VERB(("Created filter ID %d (%s).\n", + filter->kf.id, filter->kf.desc)); + if (device_is_sand(sinfo)) { + int idx, wsize; + wsize = BYTES2WORDS(filter->kf.oob_data_size + filter->kf.pkt_data_size); + DBG_DUNE(("Filter: oob_data_size = %d pkt_data_size=%d wsize %d\n", filter->kf.oob_data_size, filter->kf.pkt_data_size, wsize)); + for (idx = 0; idx < wsize; idx++) + { + DBG_DUNE(("OOB[%d]: 0x%08x [0x%08x]\n", idx, filter->kf.data.w[idx], filter->kf.mask.w[idx])); + } + DBG_DUNE(("DNX system headers parameters:LB_KEY_EXT %d, STK_EXT %d, PPH_BASE %d, LIF_EXT %d %d %d, UDH_ENA %d, %d %d %d %d\n", + sinfo->ftmh_lb_key_ext_size, sinfo->ftmh_stacking_ext_size, sinfo->pph_base_size, + sinfo->pph_lif_ext_size[1],sinfo->pph_lif_ext_size[2], sinfo->pph_lif_ext_size[3], + sinfo->udh_enable, sinfo->udh_length_type[0], sinfo->udh_length_type[1], sinfo->udh_length_type[2], sinfo->udh_length_type[3])); + } + return len; +} + +static int +bkn_knet_filter_destroy(kcom_msg_filter_destroy_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + bkn_filter_t *filter; + struct list_head *list; + unsigned long flags; + int found; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + found = 0; + list_for_each(list, &sinfo->rxpf_list) { + filter = (bkn_filter_t *)list; + if (kmsg->hdr.id == filter->kf.id) { + found = 1; + break; + } + } + + if (!found) { + spin_unlock_irqrestore(&sinfo->lock, flags); + kmsg->hdr.status = KCOM_E_NOT_FOUND; + return sizeof(kcom_msg_hdr_t); + } + + list_del(&filter->list); + + spin_unlock_irqrestore(&sinfo->lock, flags); + + DBG_VERB(("Removing filter ID %d.\n", filter->kf.id)); + kfree(filter); + + return sizeof(kcom_msg_hdr_t); +} + +static int +bkn_knet_filter_list(kcom_msg_filter_list_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + bkn_filter_t *filter; + struct list_head *list; + unsigned long flags; + int idx; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + idx = 0; + list_for_each(list, &sinfo->rxpf_list) { + if (idx >= KCOM_FILTER_MAX) { + DBG_WARN(("Too many filters to list (max %d).\n", + KCOM_FILTER_MAX)); + break; + } + filter = (bkn_filter_t *)list; + kmsg->id[idx] = filter->kf.id; + idx++; + } + kmsg->fcnt = idx; + + spin_unlock_irqrestore(&sinfo->lock, flags); + return sizeof(*kmsg) - sizeof(kmsg->id) + (idx * sizeof(kmsg->id[0])); +} + +static int +bkn_knet_filter_get(kcom_msg_filter_get_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + bkn_filter_t *filter; + struct list_head *list; + unsigned long flags; + int found; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + found = 0; + list_for_each(list, &sinfo->rxpf_list) { + filter = (bkn_filter_t *)list; + if (kmsg->hdr.id == filter->kf.id) { + found = 1; + break; + } + } + + if (!found) { + spin_unlock_irqrestore(&sinfo->lock, flags); + kmsg->hdr.status = KCOM_E_NOT_FOUND; + return sizeof(kcom_msg_hdr_t); + } + + memcpy(&kmsg->filter, &filter->kf, sizeof(kmsg->filter)); + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return sizeof(*kmsg); +} + +static int +bkn_knet_dbg_pkt_set(kcom_msg_dbg_pkt_set_t *kmsg, int len) +{ + dbg_pkt_enable = kmsg->enable; + return sizeof(kcom_msg_dbg_pkt_set_t); +} + +static int +bkn_knet_dbg_pkt_get(kcom_msg_dbg_pkt_get_t *kmsg, int len) +{ + kmsg->value = dbg_pkt_enable; + return sizeof(kcom_msg_dbg_pkt_get_t); +} + +static int +bkn_knet_wb_cleanup(kcom_msg_wb_cleanup_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + bkn_dcb_chain_t *dcb_chain; + unsigned long flags; + int chan; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (sinfo->rx[chan].api_dcb_chain) { + DBG_DCB_RX(("Freeing active Rx%d DCB chain.\n", chan)); + kfree(sinfo->rx[chan].api_dcb_chain); + sinfo->rx[chan].api_dcb_chain = NULL; + } + while (!list_empty(&sinfo->rx[chan].api_dcb_list)) { + dcb_chain = list_entry(sinfo->rx[chan].api_dcb_list.next, + bkn_dcb_chain_t, list); + list_del(&dcb_chain->list); + DBG_DCB_RX(("Freeing Rx%d DCB chain.\n", chan)); + kfree(dcb_chain); + } + sinfo->rx[chan].api_dcb_chain_end = NULL; + sinfo->rx[chan].api_active = 0; + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return sizeof(kcom_msg_hdr_t); +} + +static int +bkn_handle_cmd_req(kcom_msg_t *kmsg, int len) +{ + /* Silently drop events and unrecognized message types */ + if (kmsg->hdr.type != KCOM_MSG_TYPE_CMD) { + if (kmsg->hdr.opcode == KCOM_M_STRING) { + DBG_VERB(("Debug string: '%s'\n", kmsg->string.val)); + return 0; + } + DBG_WARN(("Unsupported message (type=%d, opcode=%d)\n", + kmsg->hdr.type, kmsg->hdr.opcode)); + return 0; + } + + switch (kmsg->hdr.opcode) { + case KCOM_M_DMA_INFO: + DBG_CMD(("KCOM_M_DMA_INFO\n")); + /* Packet buffer */ + len = bkn_knet_dma_info(&kmsg->dma_info, len); + break; + case KCOM_M_VERSION: + DBG_CMD(("KCOM_M_VERSION\n")); + /* Return procotol version */ + len = bkn_knet_version(&kmsg->version, len); + break; + case KCOM_M_HW_RESET: + DBG_CMD(("KCOM_M_HW_RESET\n")); + /* Shut down DMA and release buffers */ + len = bkn_knet_hw_reset(&kmsg->hw_reset, len); + break; + case KCOM_M_HW_INIT: + DBG_CMD(("KCOM_M_HW_INIT\n")); + /* Initialize DMA */ + len = bkn_knet_hw_init(&kmsg->hw_init, len); + break; + case KCOM_M_DETACH: + DBG_CMD(("KCOM_M_DETACH\n")); + /* Detach kernel module */ + len = bkn_knet_detach(&kmsg->detach, len); + break; + case KCOM_M_REPROBE: + DBG_CMD(("KCOM_M_REPROBE\n")); + /* Reprobe device */ + len = bkn_knet_reprobe(&kmsg->reprobe, len); + break; + case KCOM_M_NETIF_CREATE: + DBG_CMD(("KCOM_M_NETIF_CREATE\n")); + /* Create network interface */ + len = bkn_knet_netif_create(&kmsg->netif_create, len); + break; + case KCOM_M_NETIF_DESTROY: + DBG_CMD(("KCOM_M_NETIF_DESTROY\n")); + /* Destroy network interface */ + len = bkn_knet_netif_destroy(&kmsg->netif_destroy, len); + break; + case KCOM_M_NETIF_LIST: + DBG_CMD(("KCOM_M_NETIF_LIST\n")); + /* Return list of IDs of installed network interfaces */ + len = bkn_knet_netif_list(&kmsg->netif_list, len); + break; + case KCOM_M_NETIF_GET: + DBG_CMD(("KCOM_M_NETIF_GET\n")); + /* Return network interface info */ + len = bkn_knet_netif_get(&kmsg->netif_get, len); + break; + case KCOM_M_FILTER_CREATE: + DBG_CMD(("KCOM_M_FILTER_CREATE\n")); + /* Create packet filter */ + len = bkn_knet_filter_create(&kmsg->filter_create, len); + break; + case KCOM_M_FILTER_DESTROY: + DBG_CMD(("KCOM_M_FILTER_DESTROY\n")); + /* Destroy packet filter */ + len = bkn_knet_filter_destroy(&kmsg->filter_destroy, len); + break; + case KCOM_M_FILTER_LIST: + DBG_CMD(("KCOM_M_FILTER_LIST\n")); + /* Return list of IDs of installed packet filters */ + len = bkn_knet_filter_list(&kmsg->filter_list, len); + break; + case KCOM_M_FILTER_GET: + DBG_CMD(("KCOM_M_FILTER_GET\n")); + /* Return packet filter info */ + len = bkn_knet_filter_get(&kmsg->filter_get, len); + break; + case KCOM_M_DBGPKT_SET: + DBG_CMD(("KCOM_M_DBGPKT_SET\n")); + /* Set debugging packet function */ + len = bkn_knet_dbg_pkt_set(&kmsg->dbg_pkt_set, len); + break; + case KCOM_M_DBGPKT_GET: + DBG_CMD(("KCOM_M_DBGPKT_GET\n")); + /* Get debugging packet function info */ + len = bkn_knet_dbg_pkt_get(&kmsg->dbg_pkt_get, len); + break; + case KCOM_M_WB_CLEANUP: + DBG_CMD(("KCOM_M_WB_CLEANUP\n")); + /* Clean up for warmbooting */ + len = bkn_knet_wb_cleanup(&kmsg->wb_cleanup, len); + break; + default: + DBG_WARN(("Unsupported command (type=%d, opcode=%d)\n", + kmsg->hdr.type, kmsg->hdr.opcode)); + kmsg->hdr.opcode = 0; + len = sizeof(kcom_msg_hdr_t); + break; + } + return len; +} + +static int +bkn_get_next_dma_event(kcom_msg_dma_info_t *kmsg) +{ + static int last_dev_no = 0; + bkn_switch_info_t *sinfo; + unsigned long flags; + int dev_no, dev_evt; + bkn_evt_resource_t *evt; + + dev_evt = kmsg->hdr.unit; + sinfo = bkn_sinfo_from_unit(dev_evt); + if (sinfo == NULL) { + /* The device is not probed or initialized yet.*/ + return 0; + } + if (sinfo->evt_idx == -1) { + /* Event queue is not ready yet */ + return 0; + } + + DBG_INST(("%s dev %d evt_idx %d\n",__FUNCTION__, dev_evt, sinfo->evt_idx)); + dev_no = last_dev_no; + while (1) { + dev_no++; + sinfo = bkn_sinfo_from_unit(dev_no); + if (sinfo == NULL) { + dev_no = 0; + sinfo = bkn_sinfo_from_unit(dev_no); + } + + if (sinfo && (sinfo->inst_id != 0) && + ((sinfo->inst_id & (1 << dev_evt)) == 0)) { + DBG_INST((" %s skip dev(%d)\n",__FUNCTION__,dev_evt)); + continue; + } + + if (sinfo && sinfo->dma_events) { + DBG_EVT(("Next DMA events (0x%08x)\n", sinfo->dma_events)); + kmsg->hdr.unit = sinfo->dev_no; + + spin_lock_irqsave(&sinfo->lock, flags); + kmsg->dma_info.flags = sinfo->dma_events; + sinfo->dma_events = 0; + spin_unlock_irqrestore(&sinfo->lock, flags); + + last_dev_no = dev_no; + break; + } + + if (dev_no == last_dev_no) { + evt = &_bkn_evt[sinfo->evt_idx]; + DBG_INST(("wait queue index %d\n",sinfo->evt_idx)); + wait_event_interruptible(evt->evt_wq, + evt->evt_wq_get != evt->evt_wq_put); + DBG_VERB(("Event thread wakeup\n")); + + /* Thread interrupted */ + if (signal_pending(current)) { + return 0; + } + + evt->evt_wq_get = evt->evt_wq_put; + } + } + return sizeof(*kmsg); +} + +static int +_cleanup(void) +{ + struct list_head *list; + struct net_device *dev; + bkn_filter_t *filter; + bkn_priv_t *priv; + bkn_switch_info_t *sinfo; + unsigned long flags; + + /* Inidicate that we are shutting down */ + module_initialized = 0; + + bkn_proc_cleanup(); + remove_proc_entry("bcm/knet", NULL); + remove_proc_entry("bcm", NULL); + + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + + del_timer_sync(&sinfo->timer); + del_timer_sync(&sinfo->rxtick); + + spin_lock_irqsave(&sinfo->lock, flags); + bkn_dma_abort(sinfo); + dev_irq_mask_set(sinfo, 0); + spin_unlock_irqrestore(&sinfo->lock, flags); + + DBG_IRQ(("Unregister ISR.\n")); + kernel_bde->interrupt_disconnect(sinfo->dev_no | LKBDE_ISR2_DEV); + + if (use_napi) { + while (sinfo->napi_poll_mode) { + bkn_sleep(1); + } + } + + spin_lock_irqsave(&sinfo->lock, flags); + bkn_clean_dcbs(sinfo); + skb_queue_purge(&sinfo->tx_ptp_queue); + spin_unlock_irqrestore(&sinfo->lock, flags); + } + + /* Destroy all switch devices */ + while (!list_empty(&_sinfo_list)) { + sinfo = list_entry(_sinfo_list.next, bkn_switch_info_t, list); + + /* Destroy all associated Rx packet filters */ + while (!list_empty(&sinfo->rxpf_list)) { + filter = list_entry(sinfo->rxpf_list.next, bkn_filter_t, list); + list_del(&filter->list); + DBG_VERB(("Removing filter ID %d.\n", filter->kf.id)); + kfree(filter); + } + + /* Destroy all associated virtual net devices */ + while (!list_empty(&sinfo->ndev_list)) { + priv = list_entry(sinfo->ndev_list.next, bkn_priv_t, list); + list_del(&priv->list); + dev = priv->dev; + DBG_VERB(("Removing virtual Ethernet device %s.\n", dev->name)); + unregister_netdev(dev); + free_netdev(dev); + } + if (sinfo->ndevs != NULL) { + kfree(sinfo->ndevs); + } + + /* Destroy base net device */ + if (sinfo->dev) { + DBG_VERB(("Removing Ethernet device %s.\n", sinfo->dev->name)); + unregister_netdev(sinfo->dev); + free_netdev(sinfo->dev); + } + + DBG_VERB(("Removing switch device.\n")); + bkn_destroy_sinfo(sinfo); + } + + return 0; +} + +static int +bkn_knet_dev_reinit(int d) +{ + bkn_switch_info_t *sinfo; + uint32 dev_state; + unsigned long flags; + + if (lkbde_dev_state_get(d, &dev_state) < 0) { + return -1; + } + DBG_VERB(("%s dev %d dev_state %d\n",__FUNCTION__, d, dev_state)); + if (dev_state == BDE_DEV_STATE_CHANGED) { + sinfo = bkn_sinfo_from_unit(d); + spin_lock_irqsave(&sinfo->lock, flags); + sinfo->base_addr = lkbde_get_dev_virt(d); + sinfo->dma_dev = lkbde_get_dma_dev(d); + sinfo->pdev = lkbde_get_hw_dev(d); + spin_unlock_irqrestore(&sinfo->lock, flags); + + dev_state = 0; + lkbde_dev_state_set(d, dev_state); + } + return 0; +} + +static int +bkn_knet_dev_init(int d) +{ + uint32_t dev_type; + struct net_device *dev; + bkn_switch_info_t *sinfo; + bkn_priv_t *priv; + char *bdev_name; + const ibde_dev_t *bde_dev; + + DBG_VERB(("%s dev %d\n",__FUNCTION__, d)); + /* Base network device name */ + bdev_name = "bcm%d"; + if (base_dev_name) { + if (strlen(base_dev_name) < IFNAMSIZ) { + bdev_name = base_dev_name; + } else { + DBG_WARN(("Base device name too long\n")); + } + } + + dev_type = kernel_bde->get_dev_type(d); + DBG_VERB(("Found device type 0x%x\n", dev_type)); + if ((dev_type & BDE_SWITCH_DEV_TYPE) == 0) { + DBG_WARN(("Not switch device - skipping\n")); + return 0; + } + switch (dev_type & BDE_DEV_BUS_TYPE_MASK) { + case BDE_PCI_DEV_TYPE: + case BDE_ICS_DEV_TYPE: + case BDE_AXI_DEV_TYPE: + break; + default: + DBG_WARN(("Not PCI/ICS/AXI device - skipping\n")); + return 0; + } + + if ((sinfo = bkn_create_sinfo(d)) == NULL) { + _cleanup(); + return -ENOMEM; + } + + /* Initialize the cpu_no.*/ + if (dev_type & BDE_AXI_DEV_TYPE) { + /* AXI device type implies the activated iProc iHost */ + sinfo->cpu_no = 1; + } + /* Initialize default RCPU signature */ + if ((bde_dev = kernel_bde->get_dev(d)) != NULL) { + sinfo->rcpu_sig = bde_dev->device & ~0xf; + } + /* Check for override */ + if (rcpu_signature) { + sinfo->rcpu_sig = rcpu_signature; + } + + /* Create base virtual net device */ + bkn_dev_mac[5]++; + if ((dev = bkn_init_ndev(bkn_dev_mac, bdev_name)) == NULL) { + _cleanup(); + return -ENOMEM; + } else { + sinfo->dev = dev; + priv = netdev_priv(dev); + priv->dev = dev; + priv->sinfo = sinfo; + priv->vlan = 1; + priv->port = -1; + priv->id = -1; + } + + if (use_napi) { + netif_napi_add(dev, &sinfo->napi, bkn_poll, napi_weight); + } + return 0; +} + +static int +_init(void) +{ + int idx; + int num_dev; + int rv; + bkn_evt_resource_t *evt; + + /* Connect to the kernel bde */ + if ((linux_bde_create(NULL, &kernel_bde) < 0) || kernel_bde == NULL) { + return -ENODEV; + } + + /* Randomize Lower 3 bytes of the MAC address (TESTING ONLY) */ + get_random_bytes(&bkn_dev_mac[3], 3); + + /* Check for user-supplied MAC address (recommended) */ + if (mac_addr != NULL && strlen(mac_addr) == 17) { + for (idx = 0; idx < 6; idx++) { + bkn_dev_mac[idx] = simple_strtoul(&mac_addr[idx*3], NULL, 16); + } + /* Do not allow multicast address */ + bkn_dev_mac[0] &= ~0x01; + } + + /* Optional RCPU MAC addresses */ + if (rcpu_dmac != NULL && strlen(rcpu_dmac) == 17) { + for (idx = 0; idx < 6; idx++) { + bkn_rcpu_dmac[idx] = simple_strtoul(&rcpu_dmac[idx*3], NULL, 16); + } + } + if (rcpu_smac != NULL && strlen(rcpu_smac) == 17) { + for (idx = 0; idx < 6; idx++) { + bkn_rcpu_smac[idx] = simple_strtoul(&rcpu_smac[idx*3], NULL, 16); + } + } + + /* NAPI implies that base device must be up before we can pass traffic */ + if (use_napi) { + basedev_suspend = 1; + } + + num_dev = kernel_bde->num_devices(BDE_ALL_DEVICES); + for (idx = 0; idx < num_dev; idx++) { + rv = bkn_knet_dev_init(idx); + if (rv) { + return rv; + } + } + + /* Initialize proc files */ + proc_mkdir("bcm", NULL); + bkn_proc_root = proc_mkdir("bcm/knet", NULL); + + bkn_proc_init(); + + /* Initialize event queue */ + for (idx = 0; idx < LINUX_BDE_MAX_DEVICES; idx++) { + memset(&_bkn_evt[idx], 0, sizeof(bkn_evt_resource_t)); + } + evt = &_bkn_evt[0]; + init_waitqueue_head(&evt->evt_wq); + + module_initialized = 1; + + return 0; +} + +static int +_ioctl(unsigned int cmd, unsigned long arg) +{ + bkn_ioctl_t io; + kcom_msg_t kmsg; + + if (!module_initialized) { + return -EFAULT; + } + + if (copy_from_user(&io, (void*)arg, sizeof(io))) { + return -EFAULT; + } + + if (io.len > sizeof(kmsg)) { + return -EINVAL; + } + + io.rc = 0; + + switch(cmd) { + case 0: + if (io.len > 0) { + if (copy_from_user(&kmsg, (void *)(unsigned long)io.buf, io.len)) { + return -EFAULT; + } + ioctl_cmd++; + io.len = bkn_handle_cmd_req(&kmsg, io.len); + ioctl_cmd--; + } else { + memset(&kmsg, 0, sizeof(kcom_msg_dma_info_t)); + /* + * Retrive the kmsg.hdr.unit from user space. The dma event queue + * selection is based the instance derived from unit. + */ + if (copy_from_user(&kmsg, (void *)(unsigned long)io.buf, sizeof(kmsg))) { + return -EFAULT; + } + kmsg.hdr.type = KCOM_MSG_TYPE_EVT; + kmsg.hdr.opcode = KCOM_M_DMA_INFO; + ioctl_evt++; + io.len = bkn_get_next_dma_event((kcom_msg_dma_info_t *)&kmsg); + ioctl_evt--; + } + if (io.len > 0) { + if (copy_to_user((void *)(unsigned long)io.buf, &kmsg, io.len)) { + return -EFAULT; + } + } + break; + default: + gprintk("Invalid IOCTL"); + io.rc = -1; + break; + } + + if (copy_to_user((void*)arg, &io, sizeof(io))) { + return -EFAULT; + } + + return 0; +} + +static gmodule_t _gmodule = { + name: MODULE_NAME, + major: MODULE_MAJOR, + init: _init, + cleanup: _cleanup, + pprint: _pprint, + ioctl: _ioctl, + open: NULL, + close: NULL, +}; + +gmodule_t * +gmodule_get(void) +{ + EXPORT_NO_SYMBOLS; + return &_gmodule; +} + +/* + * Call-back interfaces for other Linux kernel drivers. + * + * The Rx call-back allows an external module to modify SKB contents + * before it is handed off to the Linux network stack. + * + * The Tx call-back allows an external module to modify SKB contents + * before it is injected inot the switch. + * + * The HW timestamp callbacks invoke an external module to enable, disable + * HW timestamp on a specific port which is indicated while the netif is + * created through KNET API. KNET can also get device-specific SOBMH and + * timestamp for a Tx PTP packet through these callbacks. + */ + +int +bkn_rx_skb_cb_register(knet_skb_cb_f rx_cb) +{ + if (knet_rx_cb != NULL) { + return -1; + } + knet_rx_cb = rx_cb; + return 0; +} + +int +bkn_rx_skb_cb_unregister(knet_skb_cb_f rx_cb) +{ + if (rx_cb != NULL && knet_rx_cb != rx_cb) { + return -1; + } + knet_rx_cb = NULL; + return 0; +} + +int +bkn_tx_skb_cb_register(knet_skb_cb_f tx_cb) +{ + if (knet_tx_cb != NULL) { + return -1; + } + knet_tx_cb = tx_cb; + return 0; +} + +int +bkn_tx_skb_cb_unregister(knet_skb_cb_f tx_cb) +{ + if (tx_cb != NULL && knet_tx_cb != tx_cb) { + return -1; + } + knet_tx_cb = NULL; + return 0; +} + +int +bkn_filter_cb_register(knet_filter_cb_f filter_cb) +{ + if (knet_filter_cb != NULL) { + return -1; + } + knet_filter_cb = filter_cb; + return 0; +} + +int +bkn_filter_cb_unregister(knet_filter_cb_f filter_cb) +{ + if (filter_cb != NULL && knet_filter_cb != filter_cb) { + return -1; + } + knet_filter_cb = NULL; + return 0; +} + +int +bkn_hw_tstamp_enable_cb_register(knet_hw_tstamp_enable_cb_f hw_tstamp_enable_cb) +{ + if (knet_hw_tstamp_enable_cb != NULL) { + return -1; + } + knet_hw_tstamp_enable_cb = hw_tstamp_enable_cb; + return 0; +} + +int +bkn_hw_tstamp_enable_cb_unregister(knet_hw_tstamp_enable_cb_f hw_tstamp_enable_cb) +{ + if (hw_tstamp_enable_cb == NULL || + knet_hw_tstamp_enable_cb != hw_tstamp_enable_cb) { + return -1; + } + knet_hw_tstamp_enable_cb = NULL; + return 0; +} + +int +bkn_hw_tstamp_disable_cb_register(knet_hw_tstamp_enable_cb_f hw_tstamp_disable_cb) +{ + if (knet_hw_tstamp_disable_cb != NULL) { + return -1; + } + knet_hw_tstamp_disable_cb = hw_tstamp_disable_cb; + return 0; +} + +int +bkn_hw_tstamp_disable_cb_unregister(knet_hw_tstamp_enable_cb_f hw_tstamp_disable_cb) +{ + if (hw_tstamp_disable_cb == NULL || + knet_hw_tstamp_disable_cb != hw_tstamp_disable_cb) { + return -1; + } + knet_hw_tstamp_disable_cb = NULL; + return 0; +} + +int +bkn_hw_tstamp_tx_time_get_cb_register(knet_hw_tstamp_tx_time_get_cb_f hw_tstamp_tx_time_get_cb) +{ + if (knet_hw_tstamp_tx_time_get_cb != NULL) { + return -1; + } + knet_hw_tstamp_tx_time_get_cb = hw_tstamp_tx_time_get_cb; + return 0; +} + +int +bkn_hw_tstamp_tx_time_get_cb_unregister(knet_hw_tstamp_tx_time_get_cb_f hw_tstamp_tx_time_get_cb) +{ + if (hw_tstamp_tx_time_get_cb == NULL || + knet_hw_tstamp_tx_time_get_cb != hw_tstamp_tx_time_get_cb) { + return -1; + } + knet_hw_tstamp_tx_time_get_cb = NULL; + return 0; +} + +int +bkn_hw_tstamp_tx_meta_get_cb_register(knet_hw_tstamp_tx_meta_get_cb_f hw_tstamp_tx_meta_get_cb) +{ + if (knet_hw_tstamp_tx_meta_get_cb != NULL) { + return -1; + } + knet_hw_tstamp_tx_meta_get_cb = hw_tstamp_tx_meta_get_cb; + return 0; +} + +int +bkn_hw_tstamp_tx_meta_get_cb_unregister(knet_hw_tstamp_tx_meta_get_cb_f hw_tstamp_tx_meta_get_cb) +{ + if (hw_tstamp_tx_meta_get_cb == NULL || + knet_hw_tstamp_tx_meta_get_cb != hw_tstamp_tx_meta_get_cb) { + return -1; + } + knet_hw_tstamp_tx_meta_get_cb = NULL; + return 0; +} + +int +bkn_hw_tstamp_ptp_clock_index_cb_register(knet_hw_tstamp_ptp_clock_index_cb_f hw_tstamp_ptp_clock_index_cb) +{ + if (knet_hw_tstamp_ptp_clock_index_cb != NULL) { + return -1; + } + knet_hw_tstamp_ptp_clock_index_cb = hw_tstamp_ptp_clock_index_cb; + return 0; +} + +int +bkn_hw_tstamp_ptp_clock_index_cb_unregister(knet_hw_tstamp_ptp_clock_index_cb_f hw_tstamp_ptp_clock_index_cb) +{ + if (hw_tstamp_ptp_clock_index_cb == NULL || + knet_hw_tstamp_ptp_clock_index_cb != hw_tstamp_ptp_clock_index_cb) { + return -1; + } + knet_hw_tstamp_ptp_clock_index_cb = NULL; + return 0; +} + +int +bkn_hw_tstamp_rx_time_upscale_cb_register(knet_hw_tstamp_rx_time_upscale_cb_f hw_tstamp_rx_time_upscale_cb) +{ + if (knet_hw_tstamp_rx_time_upscale_cb != NULL) { + return -1; + } + knet_hw_tstamp_rx_time_upscale_cb = hw_tstamp_rx_time_upscale_cb; + return 0; +} + +int +bkn_hw_tstamp_rx_time_upscale_cb_unregister(knet_hw_tstamp_rx_time_upscale_cb_f hw_tstamp_rx_time_upscale_cb) +{ + if (hw_tstamp_rx_time_upscale_cb == NULL || + knet_hw_tstamp_rx_time_upscale_cb != hw_tstamp_rx_time_upscale_cb) { + return -1; + } + knet_hw_tstamp_rx_time_upscale_cb = NULL; + return 0; +} + +LKM_EXPORT_SYM(bkn_rx_skb_cb_register); +LKM_EXPORT_SYM(bkn_rx_skb_cb_unregister); +LKM_EXPORT_SYM(bkn_tx_skb_cb_register); +LKM_EXPORT_SYM(bkn_tx_skb_cb_unregister); +LKM_EXPORT_SYM(bkn_filter_cb_register); +LKM_EXPORT_SYM(bkn_filter_cb_unregister); +LKM_EXPORT_SYM(bkn_hw_tstamp_enable_cb_register); +LKM_EXPORT_SYM(bkn_hw_tstamp_enable_cb_unregister); +LKM_EXPORT_SYM(bkn_hw_tstamp_disable_cb_register); +LKM_EXPORT_SYM(bkn_hw_tstamp_disable_cb_unregister); +LKM_EXPORT_SYM(bkn_hw_tstamp_tx_time_get_cb_register); +LKM_EXPORT_SYM(bkn_hw_tstamp_tx_time_get_cb_unregister); +LKM_EXPORT_SYM(bkn_hw_tstamp_tx_meta_get_cb_register); +LKM_EXPORT_SYM(bkn_hw_tstamp_tx_meta_get_cb_unregister); +LKM_EXPORT_SYM(bkn_hw_tstamp_ptp_clock_index_cb_register); +LKM_EXPORT_SYM(bkn_hw_tstamp_ptp_clock_index_cb_unregister); +LKM_EXPORT_SYM(bkn_hw_tstamp_rx_time_upscale_cb_register); +LKM_EXPORT_SYM(bkn_hw_tstamp_rx_time_upscale_cb_unregister); diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/include/bcm-knet.h b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/include/bcm-knet.h new file mode 100644 index 00000000000..bbf1c9d0496 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/include/bcm-knet.h @@ -0,0 +1,115 @@ +/* + * $Id: bcm-knet.h,v 1.4 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + */ +#ifndef __LINUX_BCM_KNET_H__ +#define __LINUX_BCM_KNET_H__ + +#ifndef __KERNEL__ +#include +#endif + +typedef struct { + int rc; + int len; + int bufsz; + int reserved; + uint64_t buf; +} bkn_ioctl_t; + +#ifdef __KERNEL__ + +/* + * Call-back interfaces for other Linux kernel drivers. + */ +#include + +typedef struct { + uint32 netif_user_data; + uint32 filter_user_data; + uint16 dcb_type; + int port; +} knet_skb_cb_t; + +#define KNET_SKB_CB(_skb) ((knet_skb_cb_t *)_skb->cb) + +typedef struct sk_buff * +(*knet_skb_cb_f)(struct sk_buff *skb, int dev_no, void *meta); + +typedef int +(*knet_filter_cb_f)(uint8_t *pkt, int size, int dev_no, void *meta, + int chan, kcom_filter_t *filter); + +typedef int +(*knet_hw_tstamp_enable_cb_f)(int dev_no, int port); + +typedef int +(*knet_hw_tstamp_tx_time_get_cb_f)(int dev_no, int port, uint8_t *pkt, uint64_t *ts); + +typedef int +(*knet_hw_tstamp_tx_meta_get_cb_f)(int dev_no, struct sk_buff *skb, uint32_t **md); + +typedef int +(*knet_hw_tstamp_ptp_clock_index_cb_f)(int dev_no); + +typedef int +(*knet_hw_tstamp_rx_time_upscale_cb_f)(int dev_no, uint64_t *ts); + +extern int +bkn_rx_skb_cb_register(knet_skb_cb_f rx_cb); + +extern int +bkn_rx_skb_cb_unregister(knet_skb_cb_f rx_cb); + +extern int +bkn_tx_skb_cb_register(knet_skb_cb_f tx_cb); + +extern int +bkn_tx_skb_cb_unregister(knet_skb_cb_f tx_cb); + +extern int +bkn_filter_cb_register(knet_filter_cb_f filter_cb); + +extern int +bkn_filter_cb_unregister(knet_filter_cb_f filter_cb); + +extern int +bkn_hw_tstamp_enable_cb_register(knet_hw_tstamp_enable_cb_f hw_tstamp_enable_cb); + +extern int +bkn_hw_tstamp_enable_cb_unregister(knet_hw_tstamp_enable_cb_f hw_tstamp_enable_cb); + +extern int +bkn_hw_tstamp_disable_cb_register(knet_hw_tstamp_enable_cb_f hw_tstamp_disable_cb); + +extern int +bkn_hw_tstamp_disable_cb_unregister(knet_hw_tstamp_enable_cb_f hw_tstamp_disable_cb); + +extern int +bkn_hw_tstamp_tx_time_get_cb_register(knet_hw_tstamp_tx_time_get_cb_f hw_tstamp_tx_time_get_cb); + +extern int +bkn_hw_tstamp_tx_time_get_cb_unregister(knet_hw_tstamp_tx_time_get_cb_f hw_tstamp_tx_time_get_cb); + +extern int +bkn_hw_tstamp_tx_meta_get_cb_register(knet_hw_tstamp_tx_meta_get_cb_f hw_tstamp_tx_meta_get_cb); + +extern int +bkn_hw_tstamp_tx_meta_get_cb_unregister(knet_hw_tstamp_tx_meta_get_cb_f hw_tstamp_tx_meta_get_cb); + +extern int +bkn_hw_tstamp_ptp_clock_index_cb_register(knet_hw_tstamp_ptp_clock_index_cb_f hw_tstamp_ptp_clock_index_cb); + +extern int +bkn_hw_tstamp_ptp_clock_index_cb_unregister(knet_hw_tstamp_ptp_clock_index_cb_f hw_tstamp_ptp_clock_index_cb); + +extern int +bkn_hw_tstamp_rx_time_upscale_cb_register(knet_hw_tstamp_rx_time_upscale_cb_f hw_tstamp_rx_time_upscale_cb); + +extern int +bkn_hw_tstamp_rx_time_upscale_cb_unregister(knet_hw_tstamp_rx_time_upscale_cb_f hw_tstamp_rx_time_upscale_cb); + +#endif + +#endif /* __LINUX_BCM_KNET_H__ */ diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/include/gmodule.h b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/include/gmodule.h new file mode 100644 index 00000000000..5a2b84d87a2 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/include/gmodule.h @@ -0,0 +1,50 @@ +/* + * $Id: gmodule.h,v 1.9 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + */ + +#ifndef __COMMON_LINUX_KRN_GMODULE_H__ +#define __COMMON_LINUX_KRN_GMODULE_H__ + +#include + +typedef struct gmodule_s { + + const char* name; + int major; + int minor; + + int (*init)(void); + int (*cleanup)(void); + + int (*pprint)(void); + + int (*open)(void); + int (*ioctl)(unsigned int cmd, unsigned long arg); + int (*close)(void); + int (*mmap) (struct file *filp, struct vm_area_struct *vma); + +} gmodule_t; + + +/* The framework will ask for your module definition */ +extern gmodule_t* gmodule_get(void); + + +/* Proc Filesystem information */ +extern int pprintf(const char* fmt, ...) + __attribute__ ((format (printf, 1, 2))); +extern int gmodule_vpprintf(char** page, const char* fmt, va_list args) + __attribute__ ((format (printf, 2, 0))); +extern int gmodule_pprintf(char** page, const char* fmt, ...) + __attribute__ ((format (printf, 2, 3))); + +extern int gprintk(const char* fmt, ...) + __attribute__ ((format (printf, 1, 2))); + +extern int gdbg(const char* fmt, ...) + __attribute__ ((format (printf, 1, 2))); +#define GDBG gdbg + +#endif /* __COMMON_LINUX_KRN_GMODULE_H__ */ diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/include/lkm.h b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/include/lkm.h new file mode 100644 index 00000000000..6e890551781 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/include/lkm.h @@ -0,0 +1,167 @@ +/* + * $Id: lkm.h,v 1.22 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + */ + +#ifndef __COMMON_LINUX_KRN_LKM_H__ +#define __COMMON_LINUX_KRN_LKM_H__ + +#ifndef __KERNEL__ +# define __KERNEL__ +#endif +#ifndef MODULE +# define MODULE +#endif + +#include +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) +#include +#endif +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,1,0) +#include +#endif +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) +#include +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39) +#include +#endif +#include + +/* Helper defines for multi-version kernel support */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) +#define LKM_2_4 +#else +#define LKM_2_6 +#endif + +#include /* printk() */ +#include /* everything... */ +#include /* error codes */ +#include /* size_t */ +#include +#include /* O_ACCMODE */ +#include +#include +#include +#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,11,0) +#include +#endif +#include + +#include +#include +#include + +#ifdef CONFIG_DEVFS_FS +#include +#endif + +#define PROC_INTERFACE_KERN_VER_3_10 (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)) + +/* Compatibility Macros */ + +#ifdef LKM_2_4 + +#include +#include +#define LKM_MOD_PARAM(n,ot,nt,d) MODULE_PARM(n,ot) +#define LKM_MOD_PARAM_ARRAY(n,ot,nt,c,d) MODULE_PARM(n,ot) +#define LKM_EXPORT_SYM(s) +#define _free_netdev kfree + +#else /* LKM_2_6 */ + +#define LKM_MOD_PARAM(n,ot,nt,d) module_param(n,nt,d) +#define LKM_MOD_PARAM_ARRAY(n,ot,nt,c,d) module_param_array(n,nt,c,d) +#define LKM_EXPORT_SYM(s) EXPORT_SYMBOL(s) +#define _free_netdev free_netdev + +#endif /* LKM_2_x */ + +#ifndef list_for_each_safe +#define list_for_each_safe(l,t,i) t = 0; list_for_each((l),(i)) +#endif + +#ifndef reparent_to_init +#define reparent_to_init() +#endif + +#ifndef MODULE_LICENSE +#define MODULE_LICENSE(str) +#endif + +#ifndef EXPORT_NO_SYMBOLS +#define EXPORT_NO_SYMBOLS +#endif + +#ifndef DEFINE_SPINLOCK +#define DEFINE_SPINLOCK(_lock) spinlock_t _lock = SPIN_LOCK_UNLOCKED +#endif + +#ifndef __SPIN_LOCK_UNLOCKED +#define __SPIN_LOCK_UNLOCKED(_lock) SPIN_LOCK_UNLOCKED +#endif + +#ifndef lock_kernel +#ifdef preempt_disable +#define lock_kernel() preempt_disable() +#else +#define lock_kernel() +#endif +#endif + +#ifndef unlock_kernel +#ifdef preempt_enable +#define unlock_kernel() preempt_enable() +#else +#define unlock_kernel() +#endif +#endif + +#ifndef init_MUTEX_LOCKED +#define init_MUTEX_LOCKED(_sem) sema_init(_sem, 0) +#endif + +#ifdef CONFIG_BCM98245 +#define CONFIG_BMW +#endif + +#if PROC_INTERFACE_KERN_VER_3_10 +#define PROC_CREATE(_entry, _name, _acc, _path, _fops) \ + do { \ + _entry = proc_create(_name, _acc, _path, _fops); \ + } while (0) + +#define PROC_CREATE_DATA(_entry, _name, _acc, _path, _fops, _data) \ + do { \ + _entry = proc_create_data(_name, _acc, _path, _fops, _data); \ + } while (0) + +#define PROC_PDE_DATA(_node) PDE_DATA(_node) + +#else +#define PROC_CREATE(_entry, _name, _acc, _path, _fops) \ + do { \ + _entry = create_proc_entry(_name, _acc, _path); \ + if (_entry) { \ + _entry->proc_fops = _fops; \ + } \ + } while (0) + +#define PROC_CREATE_DATA(_entry, _name, _acc, _path, _fops, _data) \ + do { \ + _entry = create_proc_entry(_name, _acc, _path); \ + if (_entry) { \ + _entry->proc_fops = _fops; \ + _entry->data=_data; \ + } \ + } while (0) + +#define PROC_PDE_DATA(_node) PROC_I(_node)->pde->data +#endif + +#endif /* __COMMON_LINUX_KRN_LKM_H__ */ diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/knet-cb/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/knet-cb/Makefile new file mode 100644 index 00000000000..d7ca56cd570 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/knet-cb/Makefile @@ -0,0 +1,64 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +LOCALDIR = systems/linux/kernel/modules/knet-cb + +include ${SDK}/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +ifeq ($(kernel_version),2_4) +MODULE = $(LIBDIR)/linux-knet-cb.o +else +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-knet-cb +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +build: $(MODULE) $(KMODULE) +endif + +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../bcm-knet/kernel_module/Module.symvers + +# BCM Network Device + +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ +ifneq ($(kernel_version),2_4) +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko +endif + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +include ${SDK}/make/Make.depend + +clean:: + $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o + $(RM) $(BOBJS) $(MODULE) + +ifneq ($(kernel_version),2_4) +.PHONY: build +endif diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/knet-cb/knet-cb.c b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/knet-cb/knet-cb.c new file mode 100644 index 00000000000..0893a61edd7 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/knet-cb/knet-cb.c @@ -0,0 +1,333 @@ +/* + * Copyright 2017-2019 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: $ + * $Copyright: (c) 2017 Broadcom Corp. + * All Rights Reserved.$ + */ + +/* + * Driver for call-back functions for Linux KNET driver. + * + * This is sample code that demonstrates how to selectively strip VLAN tags + * from an incoming packet based on tag information in the DMA control block + * (DCB). The switch will automatically add a VLAN tag to packets that ingress + * without an outer VLAN tag. Outer tagged and double tagged packets are + * not modified. The call back defined here determines which packets have + * had tags added by those and strips only those tags from the packet. + * + * This is sample code, the customer is responsible for maintaining and + * modifying this code as necessary. + * + * The module can be built from the standard Linux user mode target + * directories using the following command (assuming bash), e.g. + * + * cd $SDK/systems/linux/user/ + * make BUILD_KNET_CB=1 + * + */ + +#include /* Must be included first */ +#include +#include +#include + +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("Broadcom Linux KNET Call-Back Driver"); +MODULE_LICENSE("GPL"); + + +static int debug; +LKM_MOD_PARAM(debug, "i", int, 0); +MODULE_PARM_DESC(debug, +"Debug level (default 0)"); + + +/* Module Information */ +#define MODULE_MAJOR 121 +#define MODULE_NAME "linux-knet-cb" + +/* set KNET_CB_DEBUG for debug info */ +#define KNET_CB_DEBUG + +/* These below need to match incoming enum values */ +#define FILTER_TAG_STRIP 0 +#define FILTER_TAG_KEEP 1 +#define FILTER_TAG_ORIGINAL 2 + +/* Maintain tag strip statistics */ +struct strip_stats_s { + unsigned long stripped; /* Number of packets that have been stripped */ + unsigned long checked; + unsigned long skipped; +}; + +static struct strip_stats_s strip_stats; + +/* Local function prototypes */ +static void strip_vlan_tag(struct sk_buff *skb); +static int get_tag_status(int dcb_type, void *meta); +static struct sk_buff *strip_tag_rx_cb(struct sk_buff *skb, int dev_no, void *meta); +static struct sk_buff *strip_tag_tx_cb(struct sk_buff *skb, int dev_no, void *meta); +static int strip_tag_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta, + int chan, kcom_filter_t * kf); +static int _pprint(void); +static int _cleanup(void); +static int _init(void); + +/* Remove VLAN tag for select TPIDs */ +static void +strip_vlan_tag(struct sk_buff *skb) +{ + uint16_t vlan_proto = (uint16_t) ((skb->data[12] << 8) | skb->data[13]); + if ((vlan_proto == 0x8100) || (vlan_proto == 0x88a8) || (vlan_proto == 0x9100)) { + /* Move first 12 bytes of packet back by 4 */ + ((u32 *) skb->data)[3] = ((u32 *) skb->data)[2]; + ((u32 *) skb->data)[2] = ((u32 *) skb->data)[1]; + ((u32 *) skb->data)[1] = ((u32 *) skb->data)[0]; + skb_pull(skb, 4); /* Remove 4 bytes from start of buffer */ + } +} + +/* + * Location of tagging status in select DCB types found below: + * + * DCB type 14: word 12, bits 10.11 + * DCB type 19, 20, 21, 22, 30: word 12, bits 10..11 + * DCB type 23, 29: word 13, bits 0..1 + * DCB type 31, 34, 37: word 13, bits 0..1 + * DCB type 26, 32, 33, 35: word 13, bits 0..1 + * + * The function get_tag_status() returns the tag status for known DCB types. + * 0 = Untagged + * 1 = Single inner-tag + * 2 = Single outer-tag + * 3 = Double tagged. + * -1 = Unsupported DCB type + */ +static int +get_tag_status(int dcb_type, void *meta) +{ + uint32 *dcb = (uint32 *) meta; + int tag_status; + switch (dcb_type) { + case 14: + case 19: + case 20: + case 21: + case 22: + case 30: + tag_status = (dcb[12] > 10) & 0x3; + break; + case 23: + case 29: + case 31: + case 34: + case 37: + case 26: + case 32: + case 33: + case 35: + tag_status = dcb[13] & 0x3; + break; + case 36: + /* TD3 */ + tag_status = ((dcb[13] >> 9) & 0x3); + break; + break; + case 38: + { + /* untested */ + /* TH3 only parses outer tag. */ + const int tag_map[4] = { 0, 2, -1, -1 }; + tag_status = tag_map[(dcb[9] >> 13) & 0x3]; + } + break; + default: + tag_status = -1; + break; + } +#ifdef KNET_CB_DEBUG + if (debug & 0x1) { + gprintk("%s; DCB Type: %d; tag status: %d\n", __func__, dcb_type, tag_status); + } +#endif + return tag_status; +} + +/* Rx packet callback function */ +static struct sk_buff * +strip_tag_rx_cb(struct sk_buff *skb, int dev_no, void *meta) +{ + unsigned netif_flags = KNET_SKB_CB(skb)->netif_user_data; + unsigned filter_flags = KNET_SKB_CB(skb)->filter_user_data; + unsigned dcb_type; + int tag_status; + unsigned int strip_tag = 0; + /* Currently not using filter flags: + * unsigned filter_flags = KNET_SKB_CB(skb)->filter_user_data; + */ + +#ifdef KNET_CB_DEBUG + if (debug & 0x1) { + gprintk("%s Enter; netif Flags: %08X filter_flags %08X \n", + __func__, netif_flags, filter_flags); + } +#endif + + /* KNET implements this already */ + if (filter_flags == FILTER_TAG_KEEP) + { + strip_stats.skipped++; + return skb; + } + + /* SAI strip implies always strip. If the packet is untagged or + inner taged, SDK adds a .1q tag, so we need to strip tag + anyway */ + if (filter_flags == FILTER_TAG_STRIP) + { + strip_tag = 1; + } + + /* Get DCB type for this packet, passed by KNET driver */ + dcb_type = KNET_SKB_CB(skb)->dcb_type; + + /* Get tag status from DCB */ + tag_status = get_tag_status(dcb_type, meta); +#ifdef KNET_CB_DEBUG + if (debug & 0x1) { + gprintk("%s; DCB Type: %d; tag status: %d\n", __func__, dcb_type, tag_status); + } +#endif + if (tag_status < 0) { + /* Unsupported DCB type */ + return skb; + } + + if (filter_flags == FILTER_TAG_ORIGINAL) + { + /* If untagged or single inner, strip the extra tag that knet + keep tag will add. */ + if (tag_status < 2) + { + strip_tag = 1; + } + } + + strip_stats.checked++; + + if (strip_tag) { +#ifdef KNET_CB_DEBUG + if (debug & 0x1) { + gprintk("%s; Stripping VLAN tag\n", __func__); + } +#endif + strip_stats.stripped++; + strip_vlan_tag(skb); + } +#ifdef KNET_CB_DEBUG + else { + if (debug & 0x1) { + gprintk("%s; Keeping VLAN tag\n", __func__); + } + } +#endif + + return skb; +} + +/* Tx callback not used */ +static struct sk_buff * +strip_tag_tx_cb(struct sk_buff *skb, int dev_no, void *meta) +{ + /* Pass through for now */ + return skb; +} + +/* Filter callback not used */ +static int +strip_tag_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta, + int chan, kcom_filter_t *kf) +{ + /* Pass through for now */ + return 0; +} + +/* + * Get statistics. + * % cat /proc/linux-knet-cb + */ +static int +_pprint(void) +{ + pprintf("Broadcom Linux KNET Call-Back: Untagged VLAN Stripper\n"); + pprintf(" %lu stripped packets\n", strip_stats.stripped); + pprintf(" %lu packets checked\n", strip_stats.checked); + pprintf(" %lu packets skipped\n", strip_stats.skipped); + + return 0; +} + +static int +_cleanup(void) +{ + bkn_rx_skb_cb_unregister(strip_tag_rx_cb); + /* strip_tag_tx_cb is currently a noop, so + * no need to unregister. + */ + if (0) + { + bkn_tx_skb_cb_unregister(strip_tag_tx_cb); + } + bkn_filter_cb_unregister(strip_tag_filter_cb); + + return 0; +} + +static int +_init(void) +{ + bkn_rx_skb_cb_register(strip_tag_rx_cb); + /* strip_tag_tx_cb is currently a noop, so + * no need to register. + */ + if (0) + { + bkn_tx_skb_cb_register(strip_tag_tx_cb); + } + bkn_filter_cb_register(strip_tag_filter_cb); + + return 0; +} + +static gmodule_t _gmodule = { + name: MODULE_NAME, + major: MODULE_MAJOR, + init: _init, + cleanup: _cleanup, + pprint: _pprint, + ioctl: NULL, + open: NULL, + close: NULL, +}; + +gmodule_t* +gmodule_get(void) +{ + EXPORT_NO_SYMBOLS; + return &_gmodule; +} diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/shared/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/shared/Makefile new file mode 100644 index 00000000000..5e97a3a3212 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/shared/Makefile @@ -0,0 +1,29 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.2 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +LOCALDIR = systems/linux/kernel/modules/shared + +include ${SDK}/make/Make.config + +lib = libkern + +include ${SDK}/make/Make.kernlib + +include ${SDK}/make/Make.depend diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/shared/gmodule.c b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/shared/gmodule.c new file mode 100644 index 00000000000..ad932690450 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/shared/gmodule.c @@ -0,0 +1,412 @@ +/* + * $Id: gmodule.c,v 1.20 Broadcom SDK $ + * $Copyright: (c) 2019 Broadcom. + * Broadcom Proprietary and Confidential. All rights reserved.$ + * + * Generic Linux Module Framework + * + * Hooks up your driver to the kernel + */ + +#include +#include +#include +#include + +/* Module Vector Table */ +static gmodule_t* _gmodule = NULL; + + +/* Allow DEVFS Support on 2.4 Kernels */ +#if defined(LKM_2_4) && defined(CONFIG_DEVFS_FS) +#define GMODULE_CONFIG_DEVFS_FS +#endif + + +#ifdef GMODULE_CONFIG_DEVFS_FS +devfs_handle_t devfs_handle = NULL; +#endif + + + +static int _dbg_enable = 0; + +static int +gvprintk(const char* fmt, va_list args) + __attribute__ ((format (printf, 1, 0))); + +static int +gvprintk(const char* fmt, va_list args) +{ + static char _buf[256]; + + strcpy(_buf, ""); + sprintf(_buf, "%s (%d): ", _gmodule->name, current->pid); + vsprintf(_buf+strlen(_buf), fmt, args); + printk("%s",_buf); + + return 0; +} + +int +gprintk(const char* fmt, ...) +{ + int rv; + + va_list args; + va_start(args, fmt); + rv = gvprintk(fmt, args); + va_end(args); + return rv; +} + +int +gdbg(const char* fmt, ...) +{ + int rv = 0; + + va_list args; + va_start(args, fmt); + if(_dbg_enable) { + rv = gvprintk(fmt, args); + } + va_end(args); + return rv; +} + + +/* + * Proc FS Utilities + */ +#if PROC_INTERFACE_KERN_VER_3_10 +static struct seq_file* _proc_buf = NULL; + +int +pprintf(const char* fmt, ...) +{ + va_list args; + va_start(args, fmt); + seq_vprintf(_proc_buf, fmt, args); + va_end(args); + return 0; +} + +static int _gmodule_proc_show(struct seq_file *m, void *v){ + _proc_buf = m; + _gmodule->pprint(); + return 0; +} + +static int +_gmodule_proc_open(struct inode * inode, struct file * file) { + if(_gmodule->open) { + _gmodule->open(); + } + + return single_open(file, _gmodule_proc_show, NULL); +} + +static ssize_t +_gmodule_proc_write(struct file *file, const char *buffer, + size_t count, loff_t *loff) +{ + /* Workaround to toggle debugging */ + if(count > 2) { + if(buffer[0] == 'd') { + _dbg_enable = buffer[1] - '0'; + GDBG("Debugging Enabled"); + } + } + return count; +} + +static int _gmodule_proc_release(struct inode * inode, struct file * file) { + if(_gmodule->close) { + _gmodule->close(); + } + + return single_release(inode, file); +} + +struct file_operations _gmodule_proc_fops = { + owner: THIS_MODULE, + open: _gmodule_proc_open, + read: seq_read, + llseek: seq_lseek, + write: _gmodule_proc_write, + release: _gmodule_proc_release, +}; +#else +int +gmodule_vpprintf(char** page_ptr, const char* fmt, va_list args) +{ + *page_ptr += vsprintf(*page_ptr, fmt, args); + return 0; +} + +int +gmodule_pprintf(char** page_ptr, const char* fmt, ...) +{ + int rv; + + va_list args; + va_start(args, fmt); + rv = gmodule_vpprintf(page_ptr, fmt, args); + va_end(args); + return rv; +} + +static char* _proc_buf = NULL; + +int +pprintf(const char* fmt, ...) +{ + int rv; + + va_list args; + va_start(args, fmt); + rv = gmodule_vpprintf(&_proc_buf, fmt, args); + va_end(args); + return rv; +} + +#define PSTART(b) _proc_buf = b +#define PPRINT proc_print +#define PEND(b) (_proc_buf-b) + +static int +_gmodule_pprint(char* buf) +{ + PSTART(buf); + _gmodule->pprint(); + return PEND(buf); +} + +static int +_gmodule_read_proc(char *page, char **start, off_t off, + int count, int *eof, void *data) +{ + *eof = 1; + return _gmodule_pprint(page); +} + +static int +_gmodule_write_proc(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + /* Workaround to toggle debugging */ + if(count > 2) { + if(buffer[0] == 'd') { + _dbg_enable = buffer[1] - '0'; + GDBG("Debugging Enabled"); + } + } + return count; +} +#endif + +static int +_gmodule_create_proc(void) +{ + struct proc_dir_entry* ent; +#if PROC_INTERFACE_KERN_VER_3_10 + if((ent = proc_create(_gmodule->name, + S_IRUGO | S_IWUGO, + NULL, + &_gmodule_proc_fops)) != NULL) { + return 0; + } +#else + if((ent = create_proc_entry(_gmodule->name, S_IRUGO | S_IWUGO, NULL)) != NULL) { + ent->read_proc = _gmodule_read_proc; + ent->write_proc = _gmodule_write_proc; + return 0; + } +#endif + return -1; +} + +static void +_gmodule_remove_proc(void) +{ + remove_proc_entry(_gmodule->name, NULL); +} + +static int +_gmodule_open(struct inode *inode, struct file *filp) +{ + if(_gmodule->open) { + _gmodule->open(); + } + return 0; +} + +static int +_gmodule_release(struct inode *inode, struct file *filp) +{ + if(_gmodule->close) { + _gmodule->close(); + } + return 0; +} + +#ifdef HAVE_UNLOCKED_IOCTL +static long +_gmodule_unlocked_ioctl(struct file *filp, + unsigned int cmd, unsigned long arg) +{ + if(_gmodule->ioctl) { + return _gmodule->ioctl(cmd, arg); + } else { + return -1; + } +} +#else +static int +_gmodule_ioctl(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + if(_gmodule->ioctl) { + return _gmodule->ioctl(cmd, arg); + } else { + return -1; + } +} +#endif + +#ifdef HAVE_COMPAT_IOCTL +static long +_gmodule_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + if(_gmodule->ioctl) { + return _gmodule->ioctl(cmd, arg); + } else { + return -1; + } +} +#endif + + +static int +_gmodule_mmap(struct file *filp, struct vm_area_struct *vma) +{ + if (_gmodule->mmap) { + return _gmodule->mmap(filp, vma); + } +#ifdef BCM_PLX9656_LOCAL_BUS + vma->vm_flags |= VM_RESERVED | VM_IO; + pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE | _PAGE_GUARDED; + + if (io_remap_pfn_range( vma, + vma->vm_start, + vma->vm_pgoff, + vma->vm_end - vma->vm_start, + vma->vm_page_prot)) { + return (-EAGAIN); + } + return (0); +#else/* BCM_PLX9656_LOCAL_BUS */ + return -EPERM; +#endif/* BCM_PLX9656_LOCAL_BUS */ +} + +/* FILE OPERATIONS */ + +struct file_operations _gmodule_fops = { +#ifdef HAVE_UNLOCKED_IOCTL + unlocked_ioctl: _gmodule_unlocked_ioctl, +#else + ioctl: _gmodule_ioctl, +#endif + open: _gmodule_open, + release: _gmodule_release, + mmap: _gmodule_mmap, +#ifdef HAVE_COMPAT_IOCTL + compat_ioctl: _gmodule_compat_ioctl, +#endif +}; + + +void __exit +cleanup_module(void) +{ + if(!_gmodule) return; + + /* Specific Cleanup */ + if(_gmodule->cleanup) { + _gmodule->cleanup(); + } + + /* Remove any proc entries */ + if(_gmodule->pprint) { + _gmodule_remove_proc(); + } + + /* Finally, remove ourselves from the universe */ +#ifdef GMODULE_CONFIG_DEVFS_FS + if(devfs_handle) devfs_unregister(devfs_handle); +#else + unregister_chrdev(_gmodule->major, _gmodule->name); +#endif +} + +int __init +init_module(void) +{ + int rc; + + /* Get our definition */ + _gmodule = gmodule_get(); + if(!_gmodule) return -ENODEV; + + + /* Register ourselves */ +#ifdef GMODULE_CONFIG_DEVFS_FS + devfs_handle = devfs_register(NULL, + _gmodule->name, + DEVFS_FL_NONE, + _gmodule->major, + _gmodule->minor, + S_IFCHR | S_IRUGO | S_IWUGO, + &_gmodule_fops, + NULL); + if(!devfs_handle) { + printk(KERN_WARNING "%s: can't register device with devfs", + _gmodule->name); + } + rc = 0; +#else + rc = register_chrdev(_gmodule->major, + _gmodule->name, + &_gmodule_fops); + if (rc < 0) { + printk(KERN_WARNING "%s: can't get major %d", + _gmodule->name, _gmodule->major); + return rc; + } + + if(_gmodule->major == 0) { + _gmodule->major = rc; + } +#endif + + /* Specific module Initialization */ + if(_gmodule->init) { + int rc; + if((rc = _gmodule->init()) < 0) { +#ifdef GMODULE_CONFIG_DEVFS_FS + if(devfs_handle) devfs_unregister(devfs_handle); +#else + unregister_chrdev(_gmodule->major, _gmodule->name); +#endif + return rc; + } + } + + /* Add a /proc entry, if valid */ + if(_gmodule->pprint) { + _gmodule_create_proc(); + } + + return 0; /* succeed */ +} diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/shared/ksal.c b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/shared/ksal.c new file mode 100644 index 00000000000..d1caf871f0e --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/kernel/modules/shared/ksal.c @@ -0,0 +1,249 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: ksal.c,v 1.1 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + */ + +#include +#include + +#include "lkm.h" +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) +#include +#else +#include +#endif +#include +#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,9,0) +#include +#endif +#include + +#ifdef MAX_USER_RT_PRIO +/* Assume 2.6 scheduler */ +#define SAL_YIELD(task) \ + yield() +#else +/* Assume 2.4 scheduler */ +#define SAL_YIELD(task) \ +do { \ + task->policy |= SCHED_YIELD; \ + schedule(); \ +} while (0) +#endif + +#define SECOND_USEC (1000000) +#define USECS_PER_JIFFY (SECOND_USEC / HZ) +#define USEC_TO_JIFFIES(usec) ((usec + (USECS_PER_JIFFY - 1)) / USECS_PER_JIFFY) + +#define sal_alloc(size, desc) kmalloc(size, GFP_KERNEL) +#define sal_free(ptr) kfree(ptr) + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12) +#define WQ_SLEEP(a, b) wait_event_interruptible_timeout(a, NULL, b) +#else +#define WQ_SLEEP(a, b) interruptible_sleep_on_timeout(&(a), b) +#endif +/* + * sem_ctrl_t + * + * The semaphore control type uses the binary property to implement + * timed semaphores with improved performance using wait queues. + */ + +typedef struct sem_ctrl_s { + struct semaphore sem; + int binary; + int cnt; + wait_queue_head_t wq; +} sem_ctrl_t; + +sal_sem_t +sal_sem_create(char *desc, int binary, int initial_count) +{ + sem_ctrl_t *s; + + if ((s = sal_alloc(sizeof(*s), desc)) != 0) { + sema_init(&s->sem, initial_count); + s->binary = binary; + if (s->binary) { + init_waitqueue_head(&s->wq); + } + } + + return (sal_sem_t) s; +} + +void +sal_sem_destroy(sal_sem_t b) +{ + sem_ctrl_t *s = (sem_ctrl_t *) b; + + if (s == NULL) { + return; + } + + /* + * the linux kernel does not have a sema_destroy(s) + */ + sal_free(s); +} + +int +sal_sem_take(sal_sem_t b, int usec) +{ + sem_ctrl_t *s = (sem_ctrl_t *) b; + int err; + + if (usec == sal_sem_FOREVER && !in_interrupt()) { + err = down_interruptible(&s->sem); + } else { + int time_wait = 1; + int cnt = s->cnt; + + for (;;) { + if (down_trylock(&s->sem) == 0) { + err = 0; + break; + } + + if (s->binary) { + + /* Wait for event or timeout */ + + if (time_wait > 1) { + err = 1; + break; + } + err = wait_event_interruptible_timeout(s->wq, cnt != s->cnt, + USEC_TO_JIFFIES(usec)); + if (err < 0) { + break; + } + time_wait++; + + } else { + + /* Retry algorithm with exponential backoff */ + + if (time_wait > usec) { + time_wait = usec; + } + + sal_usleep(time_wait); + + usec -= time_wait; + + if (usec == 0) { + err = ETIMEDOUT; + break; + } + + if ((time_wait *= 2) > 100000) { + time_wait = 100000; + } + } + } + } + return err ? -1 : 0; +} + +int +sal_sem_give(sal_sem_t b) +{ + sem_ctrl_t *s = (sem_ctrl_t *) b; + + up(&s->sem); + if (s->binary) { + s->cnt++; + wake_up_interruptible(&s->wq); + } + return 0; +} + +uint32 +sal_time_usecs(void) +{ + struct timeval ltv; + do_gettimeofday(<v); + return (ltv.tv_sec * SECOND_USEC + ltv.tv_usec); +} + +void +sal_usleep(uint32 usec) +{ + uint32 start_usec; + wait_queue_head_t queue; + + if (usec <= SECOND_USEC / HZ) { + start_usec = sal_time_usecs(); + do { + SAL_YIELD(current); + } while ((sal_time_usecs() - start_usec) < usec); + } else { + init_waitqueue_head(&queue); + WQ_SLEEP(queue, USEC_TO_JIFFIES(usec)); + } +} + +void +sal_udelay(uint32 usec) +{ + static volatile int _sal_udelay_counter; + static int loops = 0; + int ix, iy; + + if (loops == 0 || usec == 0) { /* Need calibration? */ + int max_loops; + int start = 0, stop = 0; + int mpt = USECS_PER_JIFFY; /* usec/tick */ + + for (loops = 1; loops < 0x1000 && stop == start; loops <<= 1) { + /* Wait for clock turn over */ + for (stop = start = jiffies; start == stop; start = jiffies) { + /* Empty */ + } + sal_udelay(mpt); /* Single recursion */ + stop = jiffies; + } + + max_loops = loops / 2; /* Loop above overshoots */ + + start = stop = 0; + + if (loops < 4) { + loops = 4; + } + + for (loops /= 4; loops < max_loops && stop == start; loops++) { + /* Wait for clock turn over */ + for (stop = start = jiffies; start == stop; start = jiffies) { + /* Empty */ + } + sal_udelay(mpt); /* Single recursion */ + stop = jiffies; + } + } + + for (iy = 0; iy < usec; iy++) { + for (ix = 0; ix < loops; ix++) { + _sal_udelay_counter++; /* Prevent optimizations */ + } + } +} diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/user/bmw-2_6/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/bmw-2_6/Makefile new file mode 100644 index 00000000000..899c7b40537 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/bmw-2_6/Makefile @@ -0,0 +1,63 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.4 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# PPC_TOOLS_DIR - path to build tools (if not in PATH already) +# PPC_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=bmw-$(kernel_version) + +# Windriver linux version +#WRS_LINUX_VERSION=1.4 +#WRS_LINUX_VERSION=2.0 + +LINUX_MAKE_USER=1 +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/user/common/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/common/Makefile new file mode 100644 index 00000000000..0e622654433 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/common/Makefile @@ -0,0 +1,235 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.4 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override-target=linux-$(platform) + +ifeq ($(LINUX_MAKE_SHARED_LIB),1) +libext = so.$(SHAREDLIBVER) +else +libext = a +endif + +ifeq (,$(platform)) +$(error Internal error: platform variable is not set) +endif + +include $(SDK)/make/Make.config +LOCALDIR=systems/linux/user/common +include $(SDK)/make/Make.depend +kernel-override=linux-$(platform) +ifdef BLDCONFIG +KERN_BLDROOT=${SDK}/${SDKBUILD}/${BLDCONFIG}/$(kernel-override)$(bldroot_suffix) +else +KERN_BLDROOT=${SDK}/${SDKBUILD}/$(kernel-override)$(bldroot_suffix) +endif + +ifeq (,$(kernel_version)) +kernel_version=2_4 +endif + +ifeq ($(kernel_version),2_6) +KOBJ=ko +else +KOBJ=o +endif + +ifneq (,$(TOOLS_DIR)) +override PATH := $(TOOLS_DIR):$(PATH) +endif + +ifeq ($(DEST_DIR),) +DEST_DIR=${BLDDIR} +endif + +KERNEL_BDE_LOCAL :=linux-kernel-bde.$(KOBJ) +KERNEL_BDE :=$(DEST_DIR)/$(KERNEL_BDE_LOCAL) + +USER_BDE_LOCAL :=linux-user-bde.$(KOBJ) +USER_BDE=$(DEST_DIR)/$(USER_BDE_LOCAL) + +KNET_CB_LOCAL := linux-knet-cb.$(KOBJ) +KNET_CB := $(DEST_DIR)/$(KNET_CB_LOCAL) + +BCM_KNET_LOCAL :=linux-bcm-knet.$(KOBJ) +BCM_KNET=$(DEST_DIR)/$(BCM_KNET_LOCAL) + +ifeq (,$(findstring DELIVER,$(MAKECMDGOALS))) +.DEFAULT_GOAL := all +all_targets := kernel_modules $(KERNEL_BDE) $(USER_BDE) + +LOCAL_TARGETS := + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,$(realpath ..)/$(platform)/%,$(KERNEL_BDE_LOCAL) $(USER_BDE_LOCAL)) + +all_targets +=$(LOCAL_TARGETS) +endif + +# Build all by default +ifndef BUILD_KNET +BUILD_KNET = 1 +endif + +ifeq ($(BUILD_KNET),1) +# Kernel network support +all_targets += $(BCM_KNET) + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(BCM_KNET_LOCAL)) +all_targets +=$(LOCAL_TARGETS) +endif + +ifdef BUILD_KNET_CB +all_targets += $(KNET_CB) + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(KNET_CB_LOCAL)) +all_targets +=$(LOCAL_TARGETS) +endif +endif + +ADD_TO_CFLAGS += -I$(SDK)/systems/linux/kernel/modules/include +COND_KNET_LIBS = libuser.$(libext) +endif + +#SAI_FIXUP +.NOTPARALLEL: + +all: $(BLDDIR)/.tree $(all_targets) + +ifeq ($(NO_LOCAL_TARGETS),) +define LOCAL_TARGET_DEF +$(1) : $(DEST_DIR)/$(notdir $(1)) + cp $$? $$@ +endef +endif + +# User BDE libraries +ADD_TO_CFLAGS += -I$(SDK)/systems/bde/linux/include + +# Use raw IOCTL for KNET +ADD_TO_CFLAGS += -DPROXY_SUPPORT=0 + +CFLAGS += $(ADD_TO_CFLAGS) +#SAI_FIXUP +CFLAGS:=$(filter-out -fPIC, $(CFLAGS)) + + +kernel_modules: + $(MAKE) -C $(SDK)/systems/bde/linux/kernel kernel_version=$(kernel_version) + $(MAKE) -C $(SDK)/systems/bde/linux/user/kernel kernel_version=$(kernel_version) +ifeq ($(BUILD_KNET),1) + $(MAKE) -j1 -C $(SDK)/systems/linux/kernel/modules kernel_version=$(kernel_version) \ + subdirs="shared bcm-knet" override-target=linux-$(platform) CFLAGS="$(CFLAGS)" +ifdef BUILD_KNET_CB + $(MAKE) -j1 -C $(SDK)/systems/linux/kernel/modules kernel_version=$(kernel_version) \ + subdirs="knet-cb" override-target=linux-$(platform) CFLAGS="$(CFLAGS)" +endif +endif + +$(KERNEL_BDE): $(KERN_BLDROOT)/linux-kernel-bde.$(KOBJ) + mkdir -p $(@D) + $(OBJCOPY) --strip-debug $< $@ + +$(USER_BDE): $(KERN_BLDROOT)/linux-user-bde.$(KOBJ) + $(OBJCOPY) --strip-debug $< $@ + +$(BCM_KNET): $(KERN_BLDROOT)/linux-bcm-knet.$(KOBJ) + $(OBJCOPY) --strip-debug $< $@ + +$(KNET_CB): $(KERN_BLDROOT)/linux-knet-cb.$(KOBJ) + $(OBJCOPY) --strip-debug $< $@ + +ifeq ($(NO_LOCAL_TARGETS),) +$(foreach targ,$(LOCAL_TARGETS),$(eval $(call LOCAL_TARGET_DEF,$(targ)))) +endif + +clean:: + $(MAKE) -C $(SDK)/systems/bde/linux/kernel $@ + $(MAKE) -C $(SDK)/systems/bde/linux/user/kernel $@ + $(MAKE) -C $(SDK)/systems/linux/kernel/modules \ + subdirs="shared bcm-knet knet-cb" \ + override-target=linux-$(platform) $@ + $(RM) $(KERNEL_BDE) $(USER_BDE) + $(RM) $(BCM_KNET) $(KNET_CB) + $(RM) $(KERN_BLDROOT)/linux-kernel-bde.$(KOBJ) + $(RM) $(KERN_BLDROOT)/linux-user-bde.$(KOBJ) + $(RM) $(KERN_BLDROOT)/linux-bcm-knet.$(KOBJ) + $(RM) $(KERN_BLDROOT)/linux-knet-cb.$(KOBJ) + $(RM) $(LOCAL_TARGETS) + +distclean:: clean + +.PHONY: variable + +# +# Echo variable values used for configuration +# usage: make VAR=CC variable +# +variable:: + @echo $($(VAR)) + +else +ifndef DELIVERY +$(error DELIVERY required) +endif + +DELIVERABLES := $(KERNEL_BDE) $(USER_BDE) +# 1= source +define DELIVERY_RULE +_DEL_TARG += $(DELIVERY)/$(notdir $(1)) +$(DELIVERY)/$(notdir $(1)) : $(1) + @mkdir -p $(DELIVERY) +ifeq ($(filter $(notdir $(BCM)) $(notdir $(BCM).dbg),$(notdir $1)),) + $(OBJCOPY) --strip-debug $$< $$@ +else + $(CP) -p $$< $$@ +endif +endef + +$(foreach f,$(DELIVERABLES),$(eval $(call DELIVERY_RULE,$(f)))) + +DELIVER: $(_DEL_TARG) +endif + +# Make.config defines remaining phony targets +.PHONY: build kernel_modules DELIVER + diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/user/gto-2_6/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/gto-2_6/Makefile new file mode 100644 index 00000000000..c157f9ff35f --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/gto-2_6/Makefile @@ -0,0 +1,84 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.9 Broadcom SDK $ +# $Copyright: (c) 2007 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# PPC_TOOLS_DIR - path to build tools (if not in PATH already) +# PPC_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=gto-$(kernel_version) +LINUX_MAKE_USER=1 +export LINKER_RELAX=1 + +# Select the build environment +#BUILD_PLATFORM=ELDK +#BUILD_PLATFORM=WR_LINUX + +#Select the LINUX KERNEL VERSION +#KERN_VER = 2.6.21.7 +#KERN_VER = 2.6.24.4 +#KERN_VER = 2.6.25 + + +# Select the ELDK version +#ELDK_VERSION=4.1 +#ELDK_VERSION=4.0 + +#Select WRS Linux version +#WRS_LINUX_VERSION=2.0 +#WRS_LINUX_VERSION=3.0 + + +export KERN_VER +export ELDK_VERSION +export BUILD_PLATFORM +export WRS_LINUX_VERSION + +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/user/gto/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/gto/Makefile new file mode 100644 index 00000000000..fd98f6d2f96 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/gto/Makefile @@ -0,0 +1,60 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.9 Broadcom SDK $ +# $Copyright: (c) 2015 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# PPC_TOOLS_DIR - path to build tools (if not in PATH already) +# PPC_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=4_4 +platform=gto +LINUX_MAKE_USER=1 +export LINKER_RELAX=1 + +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/user/iproc-3_14/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/iproc-3_14/Makefile new file mode 100644 index 00000000000..c9f538802f6 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/iproc-3_14/Makefile @@ -0,0 +1,65 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.7 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=3_14 +platform=iproc-$(kernel_version) + +IPROC_BUILD=1 +export IPROC_BUILD +export BUILD_PLATFORM +export ARM_LINUX_VERSION + +LINUX_MAKE_USER=1 +export ADD_TO_CFLAGS + +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/user/iproc/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/iproc/Makefile new file mode 100644 index 00000000000..7a8b4a8b0c4 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/iproc/Makefile @@ -0,0 +1,59 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.7 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=4_4 +platform=iproc + +IPROC_BUILD=1 +export IPROC_BUILD +export BUILD_PLATFORM +export ARM_LINUX_VERSION + +LINUX_MAKE_USER=1 +export ADD_TO_CFLAGS +export BR_NO_CCACHE + +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/user/jag-2_6/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/jag-2_6/Makefile new file mode 100644 index 00000000000..26a7f520f2d --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/jag-2_6/Makefile @@ -0,0 +1,79 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.4 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=jag-$(kernel_version) + +# Select the build environment +#BUILD_PLATFORM=ELDK +#BUILD_PLATFORM=WR_LINUX + +#Select the LINUX KERNEL VERSION +#KERN_VER = 2.6.21.7 + + +# Select the ELDK version +#ELDK_VERSION=4.1 + +# Windriver linux version +#WRS_LINUX_VERSION=1.4 +#WRS_LINUX_VERSION=2.0 + +export KERN_VER +export ELDK_VERSION +export BUILD_PLATFORM +export WRS_LINUX_VERSION + +LINUX_MAKE_USER=1 +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/user/nsx-2_6/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/nsx-2_6/Makefile new file mode 100644 index 00000000000..881ec34c2d3 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/nsx-2_6/Makefile @@ -0,0 +1,58 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.4 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=nsx-$(kernel_version) +LINUX_MAKE_USER=1 +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/user/nsx64/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/nsx64/Makefile new file mode 100644 index 00000000000..9e79d90fa99 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/nsx64/Makefile @@ -0,0 +1,57 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +platform=nsx64 +LINUX_MAKE_USER=1 +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/user/nsx_wrl-2_6/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/nsx_wrl-2_6/Makefile new file mode 100644 index 00000000000..4e86843cdc7 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/nsx_wrl-2_6/Makefile @@ -0,0 +1,65 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=nsx_wrl-$(kernel_version) + +# Windriver linux version +#WRS_LINUX_VERSION=1.4 +#WRS_LINUX_VERSION=2.0 + +export WRS_LINUX_VERSION + +LINUX_MAKE_USER=1 +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/user/raptor-2_6/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/raptor-2_6/Makefile new file mode 100644 index 00000000000..10ab1a1cc25 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/raptor-2_6/Makefile @@ -0,0 +1,79 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.5 Broadcom SDK $ +# $Copyright: (c) 2007 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=raptor-$(kernel_version) + +# Select the build environment +#BUILD_PLATFORM=ELDK +#BUILD_PLATFORM=WR_LINUX + +#Select the LINUX KERNEL VERSION +#KERN_VER = 2.6.21.7 + + +# Select the ELDK version +#ELDK_VERSION=4.1 + +# Windriver linux version +#WRS_LINUX_VERSION=1.4 +#WRS_LINUX_VERSION=2.0 + +export KERN_VER +export ELDK_VERSION +export BUILD_PLATFORM +export WRS_LINUX_VERSION + +LINUX_MAKE_USER=1 +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/user/raptor/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/raptor/Makefile new file mode 100644 index 00000000000..df8800a1a78 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/raptor/Makefile @@ -0,0 +1,58 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.1 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +platform=raptor +LINUX_MAKE_USER=1 +CFGFLAGS += -DBCM_ICS +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules-invsai/systems/linux/user/x86-smp_generic_64-2_6/Makefile b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/x86-smp_generic_64-2_6/Makefile new file mode 100644 index 00000000000..29717b3af42 --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/systems/linux/user/x86-smp_generic_64-2_6/Makefile @@ -0,0 +1,45 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.2 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=x86-smp_generic_64-$(kernel_version) + +LINUX_MAKE_USER=1 +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules-invsai/tools/mktool.pl b/platform/broadcom/saibcm-modules-invsai/tools/mktool.pl new file mode 100644 index 00000000000..8800c00613d --- /dev/null +++ b/platform/broadcom/saibcm-modules-invsai/tools/mktool.pl @@ -0,0 +1,292 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# mktool.pl +# +# $Id: mktool.pl,v 1.5 Broadcom SDK $ +# +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved. $ + +use File::Path; +use File::Find; +use File::Copy; +use Cwd; + +($prog = $0) =~ s/.*\///; + +SWITCH: +{ + $op = shift; + + if ($op eq "-rm") { mktool_rm(@ARGV); last SWITCH; } + if ($op eq "-cp") { mktool_cp(@ARGV); last SWITCH; } + if ($op eq "-md") { mktool_md(@ARGV); last SWITCH; } + if ($op eq "-ln") { mktool_ln(@ARGV); last SWITCH; } + if ($op eq "-foreach") { mktool_foreach(@ARGV); last SWITCH; } + if ($op eq "-dep") { mktool_makedep(@ARGV); last SWITCH; } + if ($op eq "-echo") { mktool_echo(@ARGV); last SWITCH; } + if ($op eq "-beep") { mktool_beep(@ARGV); last SWITCH; } + die("$prog: unknown option '$op'\n"); +} + +exit 0; + + + + +# +# mktool_execute +# +# Executes a command, returns exist status. +# Performs token special translation before execution. +# + +sub mktool_execute +{ + my $token = shift; + my @cmds = @_; + +# printf("mktool_execute: token = '$token'\n"); + foreach $cmd (@cmds) + { + #printf("mktool_execute: cmd = '$cmd'\n"); + $cmd =~ s/\#\#/$token/g; + if($cmd =~ /^-p/) + { + $cmd =~ s/^-p//; + printf("$cmd\n"); + } + else + { + system($cmd); + my $excode = ($? >> 8); + exit $excode if $excode; + } + } +} + + +$find_regexp = ""; +@find_cmd; + +# +# mktool_foreach +# +sub mktool_foreach +{ + if($_[0] eq "-find") + { + shift; + $find_dir = shift; + $find_regexp = shift; + @find_cmds = @_; + + if(!($find_dir =~ /^\//)) + { + $find_dir = cwd() . "/" . $find_dir; + } + find(\&_mktool_foreach_find_wanted, $find_dir); + } + else + { + my $subdir = 0; + if($_[0] eq "-subdir") + { + $subdir = 1; + shift; + } + + my @thingies = split(' ', shift); + + foreach $thingy (@thingies) + { + chdir $thingy unless $subdir == 0; + mktool_execute($thingy, @_); + chdir ".." unless $subdir == 0; + } + } +} + + + +sub _mktool_foreach_find_wanted +{ + my $expr = "\$File::Find::name =~ /\^$find_regexp\$/"; + + if(eval($expr)) + { + mktool_execute($File::Find::name, @find_cmds); + exit $excode if $excode; + } +} + + +# +# rm +# +# Removes a list of objects +# +sub mktool_rm +{ + my($f); + + foreach $f (@_) { + eval { rmtree($f) }; + if ($@) { + die "$prog $op: failed to remove $f: $@\n"; + } + } +} + +# +# md +# +# Makes a list of directories +# +sub mktool_md +{ + my($dir); + + foreach $dir (@_) { + $dir =~ s!/+$!!; + eval { mkpath($dir) }; + if ($@) { + die "$prog $op: failed to make directory $dir: $@\n"; + } + } +} + + +sub mktool_cp +{ + my($from, $to) = @_; + + if (@_ != 2) { + die "$prog $op: must have two arguments\n"; + } + copy($from, $to) || + die "$prog $op: failed to copy $from to $to: $!\n"; +} + +sub mktool_ln +{ + my($old, $new) = @_; + + if (@_ != 2) { + die "$prog $op: must have two arguments\n"; + } + link ($old, $new) || + die "$prog $op: failed to link $new to $old: $!\n"; +} + + +# @echo "$@ \\" > ${BLDDIR}/$(notdir $@) +# @if ($(DEPEND)) >> $(BLDDIR)/$(notdir $@); then \ +# exit 0; \ +# else \ +# rm -f ${BLDDIR}/$(notdir $@); \ +# exit 1; \ +# fi + +# $(MAKEDEP) "$@" "$(BLDDIR)/$(notdir $@)" "$(DEPEND)" + +sub mktool_makedep +{ + my ($source, $target, $cmd, $curdir) = @_; + my @result = `$cmd`; + my $sdk = $ENV{'SDK'}; + my $count; + my $tmp; + local $resultant; + +## Comman $cmd +#Command $cmd +print <-1) & ($count < 20) ) + { + $line=~s/\/\w+\/\.\.//; + # if we hit a major recursion, revert the line, report + # this to the output and drop out of the loop, but do + # continue, this should not halt generation + if($count++>19) + { + print "mktool.pl: could not process $line \n\n"; + print ":: curdir $curdir\n"; + print ":: target $target\n"; + print ":: cmd $cmd\n"; + $line=$tmp; + } + } + + # set all the paths to use the $SDK variable + $line =~ s/$ENV{'SDK'}/\$\{SDK\}/g; + $resultant=$resultant . $line; + } + + # some compilers return extra newlines + $resultant=~s/\n//g; + + # now clean up the result + $resultant=~s/\\/\\\n/g; + + mktool_md($dirName) unless (-d $dirName); + open (TARGET, ">$target") || + die("$prog $op: cannot open '$target' for writing: $!\n"); + print TARGET "$resultant\n"; + close(TARGET); + } +} + +sub mktool_echo +{ + print "@_\n"; +} + +sub mktool_beep +{ + -t STDOUT && defined $ENV{MAKEBEEP} && print "\007"; +} diff --git a/platform/broadcom/saibcm-modules/.gitignore b/platform/broadcom/saibcm-modules/.gitignore new file mode 100644 index 00000000000..338005f50ce --- /dev/null +++ b/platform/broadcom/saibcm-modules/.gitignore @@ -0,0 +1,4 @@ +*.debhelper.log +*.debhelper +*.substvars +*.ko diff --git a/platform/broadcom/saibcm-modules/debian/changelog b/platform/broadcom/saibcm-modules/debian/changelog new file mode 100644 index 00000000000..5ea7b289ee6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/debian/changelog @@ -0,0 +1,48 @@ +opennsl (3.4.1.11-1) unstable; urgency=medium + + * Port Broadcom SAI 3.4.1.11 + * Cherry-pick change from master branch, 3.4.1.11-1 + + -- Ying Xie Fri, 05 Jan 2018 23:21:47 +0000 + +opennsl (3.4.1.10-1) unstable; urgency=medium + + * Upgrade to 3.4.1.10-1 + + -- Ying Xie Tue, 19 Dec 2017 21:33:48 +0000 + +opennsl (3.4.1.9-1) unstable; urgency=medium + + * Upgrade to 3.4.1.9-1 + + -- Ying Xie Thu, 14 Dec 2017 22:04:11 +0000 + +opennsl (3.4.1.7-2) unstable; urgency=medium + + * Add Arista 7260cx3 Rev2 hardware support + + -- Ying Xie Mon, 27 Nov 2017 18:13:50 +0000 + +opennsl (3.4.1.7-1) unstable; urgency=medium + + * Importing opennsl 3.4.1.7 + + -- Ying Xie Mon, 23 Oct 2017 23:47:25 +0000 + +opennsl (3.4.1.5-2) unstable; urgency=medium + + * Importing TD2 changes from opennsl 3.2.2.2 + + -- Ying Xie Tue, 26 Sep 2017 01:28:44 +0000 + +opennsl (3.4.1.5-1) unstable; urgency=medium + + * Importing opennsl 3.4.1.5 + + -- Ying Xie Wed, 20 Sep 2017 16:42:12 +0000 + +opennsl (3.4.1.3-1) unstable; urgency=low + + * Initial release + + -- Guohan Lu Fri, 17 Jul 2015 04:46:01 -0700 diff --git a/platform/broadcom/saibcm-modules/debian/compat b/platform/broadcom/saibcm-modules/debian/compat new file mode 100644 index 00000000000..45a4fb75db8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/debian/compat @@ -0,0 +1 @@ +8 diff --git a/platform/broadcom/saibcm-modules/debian/control b/platform/broadcom/saibcm-modules/debian/control new file mode 100644 index 00000000000..75b77c8a2f0 --- /dev/null +++ b/platform/broadcom/saibcm-modules/debian/control @@ -0,0 +1,14 @@ +Source: opennsl +Section: main +Priority: extra +Maintainer: Guohan Lu +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 +#Vcs-Git: git://git.debian.org/collab-maint/bcmsdk.git +#Vcs-Browser: http://git.debian.org/?p=collab-maint/bcmsdk.git;a=summary + +Package: opennsl-modules +Architecture: amd64 +Section: main +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for broadcom SAI diff --git a/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs b/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs new file mode 100644 index 00000000000..38af58a5c5e --- /dev/null +++ b/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs @@ -0,0 +1 @@ +lib/modules/4.9.0-9-2-amd64/extra diff --git a/platform/broadcom/saibcm-modules/debian/opennsl-modules.init b/platform/broadcom/saibcm-modules/debian/opennsl-modules.init new file mode 100755 index 00000000000..1aaa91bb2d8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/debian/opennsl-modules.init @@ -0,0 +1,78 @@ +#!/bin/bash +# This script load/unload opennsl kernel modules + +### BEGIN INIT INFO +# Provides: load-opennsl-modules +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Load OpenNSL kernel modules +### END INIT INFO + +function create_devices() +{ + rm -f /dev/linux-knet-cb + rm -f /dev/linux-bcm-knet + rm -f /dev/linux-bcm-bde + rm -f /dev/linux-kernel-bde + + mknod /dev/linux-knet-cb c 121 0 + mknod /dev/linux-bcm-knet c 122 0 + mknod /dev/linux-bcm-bde c 126 0 + mknod /dev/linux-kernel-bde c 127 0 +} + +# linux-kernel-bde debug=4 ==> Verbose level debug +# dma_debug=1 ==> Enable DMA debug +# linux-bcm-knet debug=0x5020 ==> Enable KNET Warning(0x1000), +# Events(0x20) and Instance(0x4000) +# level logs +function load_kernel_modules() +{ + modprobe linux-kernel-bde dmasize=32M maxpayload=128 debug=4 dma_debug=1 + modprobe linux-user-bde + modprobe linux-bcm-knet use_rx_skb=1 rx_buffer_size=9238 debug=0x5020 + modprobe linux-knet-cb +} + +function remove_kernel_modules() +{ + rmmod linux-knet-cb + rmmod linux-bcm-knet + rmmod linux-user-bde + rmmod linux-kernel-bde +} + +case "$1" in +start) + echo -n "Load OpenNSL kernel modules... " + + create_devices + load_kernel_modules + + echo "done." + ;; + +stop) + echo -n "Unload OpenNSL kernel modules... " + + remove_kernel_modules + + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/opennsl-modules.init {start|stop}" + exit 1 + ;; +esac + +exit 0 + diff --git a/platform/broadcom/saibcm-modules/debian/opennsl-modules.install b/platform/broadcom/saibcm-modules/debian/opennsl-modules.install new file mode 100644 index 00000000000..11b100d37f3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/debian/opennsl-modules.install @@ -0,0 +1,5 @@ +systems/linux/user/x86-smp_generic_64-2_6/linux-bcm-knet.ko lib/modules/4.9.0-9-2-amd64/extra +systems/linux/user/x86-smp_generic_64-2_6/linux-kernel-bde.ko lib/modules/4.9.0-9-2-amd64/extra +systems/linux/user/x86-smp_generic_64-2_6/linux-user-bde.ko lib/modules/4.9.0-9-2-amd64/extra +systems/linux/user/x86-smp_generic_64-2_6/linux-knet-cb.ko lib/modules/4.9.0-9-2-amd64/extra +systemd/opennsl-modules.service lib/systemd/system diff --git a/platform/broadcom/saibcm-modules/debian/rules b/platform/broadcom/saibcm-modules/debian/rules new file mode 100755 index 00000000000..33abe645d44 --- /dev/null +++ b/platform/broadcom/saibcm-modules/debian/rules @@ -0,0 +1,183 @@ +#!/usr/bin/make -f +# -*- makefile -*- +# Sample debian/rules that uses debhelper. +# This file was originally written by Joey Hess and Craig Small. +# As a special exception, when this file is copied by dh-make into a +# dh-make output file, you may use that output file without restriction. +# This special exception was added by Craig Small in version 0.37 of dh-make. +# +# This version is for a hypothetical package that can build a kernel modules +# architecture-dependant package via make-kpkg, as well as an +# architecture-independent module source package, and other packages +# either dep/indep for things like common files or userspace components +# needed for the kernel modules. + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + + + + +# some default definitions, important! +# +# Name of the source package +psource:=opennsl-source + +# The short upstream name, used for the module source directory +sname:=opennsl + +### KERNEL SETUP +### Setup the stuff needed for making kernel module packages +### taken from /usr/share/kernel-package/sample.module.rules + +# prefix of the target package name +PACKAGE=opennsl-modules +# modifieable for experiments or debugging m-a +MA_DIR ?= /usr/share/modass +# load generic variable handling +-include $(MA_DIR)/include/generic.make +# load default rules, including kdist, kdist_image, ... +-include $(MA_DIR)/include/common-rules.make + + + +# module assistant calculates all needed things for us and sets +# following variables: +# KSRC (kernel source directory), KVERS (kernel version string), KDREV +# (revision of the Debian kernel-image package), CC (the correct +# compiler), VERSION (the final package version string), PKGNAME (full +# package name with KVERS included), DEB_DESTDIR (path to store DEBs) + +# The kdist_config target is called by make-kpkg modules_config and +# by kdist* rules by dependency. It should configure the module so it is +# ready for compilation (mostly useful for calling configure). +# prep-deb-files from module-assistant creates the neccessary debian/ files +kdist_config: prep-deb-files + +# the kdist_clean target is called by make-kpkg modules_clean and from +# kdist* rules. It is responsible for cleaning up any changes that have +# been made by the other kdist_commands (except for the .deb files created) +kdist_clean: clean + dh_testdir + dh_clean + SDK=$(realpath .) LINUX_UAPI_SPLIT=1 DEBIAN_LINUX_HEADER=1 BUILD_KNET_CB=1 KERNDIR=/usr/src/linux-headers-4.9.0-9-2-amd64 KERNEL_SRC=/usr/src/linux-headers-4.9.0-9-2-amd64 $(MAKE) -C systems/linux/user/x86-smp_generic_64-2_6 clean +# rm -f driver/*.o driver/*.ko +# +### end KERNEL SETUP + +configure: configure-stamp +configure-stamp: + dh_testdir + # Add here commands to configure the package. + + touch configure-stamp + + +build-arch: configure-stamp build-arch-stamp +build-arch-stamp: + dh_testdir + + # Add here command to compile/build the package. + SDK=$(realpath .) LINUX_UAPI_SPLIT=1 DEBIAN_LINUX_HEADER=1 BUILD_KNET_CB=1 KERNDIR=/usr/src/linux-headers-4.9.0-9-2-amd64 KERNEL_SRC=/usr/src/linux-headers-4.9.0-9-2-amd64 $(MAKE) -C systems/linux/user/x86-smp_generic_64-2_6 + + touch $@ + +#k = $(shell echo $(KVERS) | grep -q ^2.6 && echo k) + +build-indep: configure-stamp build-indep-stamp +build-indep-stamp: + dh_testdir + + # Add here command to compile/build the arch indep package. + # It's ok not to do anything here, if you don't need to build + # anything for this package. + #docbook-to-man debian/opennsl.sgml > opennsl.1 + + touch $@ + +build: build-arch + +clean: + dh_testdir + #dh_testroot + rm -f build-arch-stamp build-indep-stamp configure-stamp + + # Add here commands to clean up after the build process. + SDK=$(realpath .) LINUX_UAPI_SPLIT=1 DEBIAN_LINUX_HEADER=1 BUILD_KNET_CB=1 KERNDIR=/usr/src/linux-headers-4.9.0-9-2-amd64 KERNEL_SRC=/usr/src/linux-headers-4.9.0-9-2-amd64 $(MAKE) -C systems/linux/user/x86-smp_generic_64-2_6 clean + + dh_clean + +install: DH_OPTIONS= +install: build + dh_testdir + dh_testroot + dh_prep + dh_installdirs + dh_install + +# Build architecture-independent files here. +# Pass -i to all debhelper commands in this target to reduce clutter. +binary-indep: build install + dh_testdir -i + dh_testroot -i + dh_installchangelogs -i + dh_installdocs -i + dh_installexamples -i +# dh_install -i +# dh_installmenu -i +# dh_installdebconf -i +# dh_installlogrotate -i +# dh_installemacsen -i +# dh_installpam -i +# dh_installmime -i +# dh_installinit -i +# dh_installcron -i +# dh_installinfo -i + dh_installman -i + dh_link -i + dh_compress -i + dh_fixperms -i + dh_installdeb -i +# dh_perl -i +# dh_makeshlibs -i + dh_installdeb -i + dh_shlibdeps -i + dh_gencontrol -i + dh_md5sums -i + dh_builddeb -i + +# Build architecture-dependent files here. +binary-arch: build install + dh_testdir -s + dh_testroot -s +# dh_installdebconf -s + + dh_installdocs -s + dh_installexamples -s + dh_installmenu -s +# dh_installlogrotate -s +# dh_installemacsen -s +# dh_installpam -s +# dh_installmime -s + dh_installmodules -s + dh_systemd_enable -s + dh_installinit -s + dh_systemd_start -s + dh_installcron -s +# dh_installman -s + dh_installinfo -s + dh_installchangelogs -s + dh_strip -s + dh_link -s + dh_compress -s + dh_fixperms -s + dh_makeshlibs -s + dh_installdeb -s +# dh_perl -s + dh_shlibdeps -s + dh_gencontrol -s + dh_md5sums -s + dh_builddeb -s + +binary: binary-indep binary-arch +.PHONY: build clean binary-indep binary-arch binary install configure binary-modules kdist kdist_configure kdist_image kdist_clean diff --git a/platform/broadcom/saibcm-modules/include/ibde.h b/platform/broadcom/saibcm-modules/include/ibde.h new file mode 100644 index 00000000000..9c8956f5e3e --- /dev/null +++ b/platform/broadcom/saibcm-modules/include/ibde.h @@ -0,0 +1,180 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: ibde.h,v 1.27 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + */ + +#ifndef __IBDE_H__ +#define __IBDE_H__ + +#include + +/* + * Represents a collection of devices + */ + +typedef struct ibde_dev_s { + uint16 device; + uint8 rev; + sal_vaddr_t base_address; + sal_vaddr_t base_address1; + sal_vaddr_t base_address2; +} ibde_dev_t; + + +typedef struct ibde_s { + + const char *(*name)(void); + + /* Returns the number of devices available */ + /* Each device is is accessed through a handle */ + /* Handles are assumed to index the array of devices */ + + /* Support SWITCH or ETHERNET or CPU devices */ + int (*num_devices)(int type); +#define BDE_ALL_DEVICES 0 +#define BDE_SWITCH_DEVICES 1 +#define BDE_ETHER_DEVICES 2 +#define BDE_CPU_DEVICES 3 + + const ibde_dev_t *(*get_dev)(int d); + + /* + * Get types of underlaying devices. + * A combination of bus type and functional type is returned. + * In case of bus type, support PCI and SPI device types. + * In case of functional type, specify if underlaying device is + * a switching or ethernet device. + */ + uint32 (*get_dev_type)(int d); +#define BDE_PCI_DEV_TYPE SAL_PCI_DEV_TYPE /* PCI device */ +#define BDE_SPI_DEV_TYPE SAL_SPI_DEV_TYPE /* SPI device */ +#define BDE_EB_DEV_TYPE SAL_EB_DEV_TYPE /* EB device */ +#define BDE_ICS_DEV_TYPE SAL_ICS_DEV_TYPE /* ICS device */ +#define BDE_MII_DEV_TYPE SAL_MII_DEV_TYPE /* MII device */ +#define BDE_I2C_DEV_TYPE SAL_I2C_DEV_TYPE /* I2C device */ +#define BDE_AXI_DEV_TYPE SAL_AXI_DEV_TYPE /* AXI device */ +#define BDE_EMMI_DEV_TYPE SAL_EMMI_DEV_TYPE /* EMMI device */ +#define BDE_DEV_BUS_ALT SAL_DEV_BUS_ALT /* Alternate Access */ +#define BDE_DEV_BUS_MSI SAL_DEV_BUS_MSI /* Message-signaled interrupts */ + +#define BDE_DEV_BUS_TYPE_MASK SAL_DEV_BUS_TYPE_MASK + +#define BDE_SWITCH_DEV_TYPE SAL_SWITCH_DEV_TYPE /* Switch device */ +#define BDE_ETHER_DEV_TYPE SAL_ETHER_DEV_TYPE /* Ethernet device */ +#define BDE_CPU_DEV_TYPE SAL_CPU_DEV_TYPE /* CPU device */ + +#define BDE_BYTE_SWAP 0x01000000 /* SW byte swap */ +#define BDE_NO_IPROC 0x02000000 /* Device uses two BARs, but is not iProc */ + +#define BDE_8MB_REG_SPACE 0x10000000 /* 8MB sized CMIC BAR */ +#define BDE_256K_REG_SPACE 0x20000000 /* Map 256K (v 64K) */ +#define BDE_128K_REG_SPACE 0x40000000 /* Map 128K (v 64K) */ +#define BDE_320K_REG_SPACE 0x80000000 /* Map 256K+64K */ + +/* Bus supports only 16bit reads */ +#define BDE_DEV_BUS_RD_16BIT SAL_DEV_BUS_RD_16BIT + +/* Bus supports only 16bit writes */ +#define BDE_DEV_BUS_WR_16BIT SAL_DEV_BUS_WR_16BIT + +/* Backward compatibility */ +#define BDE_ET_DEV_TYPE BDE_MII_DEV_TYPE + +#define BDE_DEV_MEM_MAPPED(_d) \ + ((_d) & (BDE_PCI_DEV_TYPE | BDE_ICS_DEV_TYPE | BDE_EB_DEV_TYPE |\ + BDE_EMMI_DEV_TYPE | BDE_AXI_DEV_TYPE)) + + /* + * PCI Bus Access + */ + uint32 (*pci_conf_read)(int d, uint32 addr); + int (*pci_conf_write)(int d, uint32 addr, uint32 data); + void (*pci_bus_features)(int d, int *be_pio, int *be_packet, + int *be_other); + + uint32 (*read)(int d, uint32 addr); + int (*write)(int d, uint32 addr, uint32 data); + + uint32* (*salloc)(int d, int size, const char *name); + void (*sfree)(int d, void *ptr); + int (*sflush)(int d, void *addr, int length); + int (*sinval)(int d, void *addr, int length); + + int (*interrupt_connect)(int d, void (*)(void*), void *data); + int (*interrupt_disconnect)(int d); + + sal_paddr_t (*l2p)(int d, void *laddr); + void* (*p2l)(int d, sal_paddr_t paddr); + + /* + * SPI Access via SMP + */ + int (*spi_read)(int d, uint32 addr, uint8 *buf, int len); + int (*spi_write)(int d, uint32 addr, uint8 *buf, int len); + /* Special SPI access addresses */ +#define BDE_DEV_OP_EMMI_INIT SAL_DEV_OP_EMMI_INIT + + /* + * iProc register access + */ + uint32 (*iproc_read)(int d, uint32 addr); + int (*iproc_write)(int d, uint32 addr, uint32 data); + + /* + * Shared memory access + */ + uint32 (*shmem_read)(int dev, uint32 addr, uint8 *buf, uint32 len); + void (*shmem_write)(int dev, uint32 addr, uint8 *buf, uint32 len); + sal_vaddr_t (*shmem_map)(int dev, uint32 addr, uint32 size); + + /* + * cmic + */ + int (*get_cmic_ver)(int d, uint32 *ver); + + /* + * Probe available devices. + * Return value : + * 0: success to probe available devices + * -1: error happens during probe + */ + int (*probe)(void); + + /* + * I2C operations on the Device, assuming it is connected by I2C to the CPU. + */ + /* Read from the internal device Address space using I2C */ + int (*i2c_device_read)( + int dev, /* The device ID to access */ + uint32 addr, /* The address to access in the internal device address space */ + uint32 *value);/* the value to be read. */ + /* Write to the internal device Address space using I2C */ + int (*i2c_device_write)( + int dev, /* The device ID to access */ + uint32 addr, /* The address to access in the internal device address space */ + uint32 value); /* the value to be written. */ + +} ibde_t; + + +/* System BDE */ +extern ibde_t *bde; + + +#endif /* __IBDE_H__ */ diff --git a/platform/broadcom/saibcm-modules/include/kcom.h b/platform/broadcom/saibcm-modules/include/kcom.h new file mode 100644 index 00000000000..76f3e47a8de --- /dev/null +++ b/platform/broadcom/saibcm-modules/include/kcom.h @@ -0,0 +1,552 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: kcom.h,v 1.9 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + * + * File: kcom.h + * Purpose: User/Kernel message definitions + */ + +#ifndef _KCOM_H +#define _KCOM_H + +#include + +#define KCOM_CHAN_KNET "KCOM_KNET" + +/* + * Message types + */ +#define KCOM_MSG_TYPE_CMD 1 /* Command */ +#define KCOM_MSG_TYPE_RSP 2 /* Command response */ +#define KCOM_MSG_TYPE_EVT 3 /* Unsolicited event */ + +/* + * Message opcodes + */ +#define KCOM_M_NONE 0 /* Should not be used */ +#define KCOM_M_VERSION 1 /* Protocol version */ +#define KCOM_M_STRING 2 /* For debug messages */ +#define KCOM_M_HW_RESET 3 /* H/W not ready */ +#define KCOM_M_HW_INIT 4 /* H/W initialized */ +#define KCOM_M_ETH_HW_CONFIG 5 /* ETH HW config*/ +#define KCOM_M_DETACH 6 /* Detach kernel module */ +#define KCOM_M_REPROBE 7 /* Reprobe device */ +#define KCOM_M_NETIF_CREATE 11 /* Create network interface */ +#define KCOM_M_NETIF_DESTROY 12 /* Destroy network interface */ +#define KCOM_M_NETIF_LIST 13 /* Get list of network interface IDs */ +#define KCOM_M_NETIF_GET 14 /* Get network interface info */ +#define KCOM_M_FILTER_CREATE 21 /* Create Rx filter */ +#define KCOM_M_FILTER_DESTROY 22 /* Destroy Rx filter */ +#define KCOM_M_FILTER_LIST 23 /* Get list of Rx filter IDs */ +#define KCOM_M_FILTER_GET 24 /* Get Rx filter info */ +#define KCOM_M_DMA_INFO 31 /* Tx/Rx DMA info */ +#define KCOM_M_DBGPKT_SET 41 /* Enbale debug packet function */ +#define KCOM_M_DBGPKT_GET 42 /* Get debug packet function info */ +#define KCOM_M_WB_CLEANUP 51 /* Clean up for warmbooting */ + +#define KCOM_VERSION 10 /* Protocol version */ + +/* + * Message status codes + */ +#define KCOM_E_NONE 0 /* No errors */ +#define KCOM_E_PARAM 1 /* Invalid/unsupported parameter */ +#define KCOM_E_RESOURCE 2 /* Out of memory or other resource */ +#define KCOM_E_NOT_FOUND 3 /* Requested object not found */ + +typedef struct kcom_msg_hdr_s { + uint8 type; + uint8 opcode; + uint8 seqno; + uint8 status; + uint8 unit; + uint8 reserved; + uint16 id; +} kcom_msg_hdr_t; + +/* + * Object types + */ + +/* + * System network interface + * + * Network interface types: + * + * KCOM_NETIF_T_VLAN + * Transmits to this interface will go to ingress PIPE of switch + * CPU port using specified VLAN ID. Packet will be switched. + * + * KCOM_NETIF_T_PORT + * Transmits to this interface will go to unmodified to specified + * physical switch port. All switching logic is bypassed. + * + * KCOM_NETIF_T_META + * Transmits to this interface will be done using raw meta data + * as DMA descriptors. Currently used for RCPU mode only. + * + * Network interface flags: + * + * KCOM_NETIF_F_ADD_TAG + * Add VLAN tag to packets sent directly to physical port. + * + * KCOM_NETIF_F_RCPU_ENCAP + * Use RCPU encapsulation for packets that enter and exit this + * interface. + */ +#define KCOM_NETIF_T_VLAN 0 +#define KCOM_NETIF_T_PORT 1 +#define KCOM_NETIF_T_META 2 + +#define KCOM_NETIF_F_ADD_TAG (1U << 0) +#define KCOM_NETIF_F_RCPU_ENCAP (1U << 1) +/* If a netif has this flag, the packet sent to the netif can't be stripped tag or added tag */ +#define KCOM_NETIF_F_KEEP_RX_TAG (1U << 2) + +#define KCOM_NETIF_NAME_MAX 16 + +typedef struct kcom_netif_s { + uint16 id; + uint8 type; + uint8 flags; + uint32 cb_user_data; + uint8 port; + uint8 reserved; + uint16 vlan; + uint16 qnum; + uint8 macaddr[6]; + uint8 ptch[2]; + uint8 itmh[4]; + char name[KCOM_NETIF_NAME_MAX]; +} kcom_netif_t; + +/* + * Packet filters + * + * Filters work like software TCAMs where a mask is applied to the + * source data, and the result is then compared to the filter data. + * + * Filters are checked in priority order with the lowest priority + * values being checked first (i.e. 0 is the highest priority). + * + * Filter types: + * + * KCOM_FILTER_T_RX_PKT + * Filter data and mask are applied to the Rx DMA control block + * as well as to the Rx packet contents. + * + * Destination types: + * + * KCOM_DEST_T_NULL + * Packet is dropped. + * + * KCOM_DEST_T_NETIF + * Packet is sent to network interface with ID . + * + * KCOM_DEST_T_API + * Packet is sent to Rx API through queue . + * + * KCOM_DEST_T_CB + * Packet destination is obtained from kernel call-back function. + * + * Filter flags: + * + * KCOM_FILTER_F_ANY_DATA + * When this flags is set the filter will match any packet on + * the associated unit. + * + * KCOM_FILTER_F_STRIP_TAG + * Strip VLAN tag before packet is sent to destination. + * This flag only applies to KCOM_DEST_T_NETIF. + * + */ +#define KCOM_FILTER_BYTES_MAX 256 +#define KCOM_FILTER_WORDS_MAX BYTES2WORDS(KCOM_FILTER_BYTES_MAX) + +#define KCOM_FILTER_T_RX_PKT 1 + +#define KCOM_DEST_T_NULL 0 +#define KCOM_DEST_T_NETIF 1 +#define KCOM_DEST_T_API 2 +#define KCOM_DEST_T_CB 3 + +#define KCOM_FILTER_F_ANY_DATA (1U << 0) +#define KCOM_FILTER_F_STRIP_TAG (1U << 1) + +#define KCOM_FILTER_DESC_MAX 32 + +typedef struct kcom_filter_s { + uint16 id; + uint8 type; + uint8 priority; + char desc[KCOM_FILTER_DESC_MAX]; + uint32 flags; + uint32 cb_user_data; + uint16 dest_type; + uint16 dest_id; + uint16 dest_proto; + uint16 mirror_type; + uint16 mirror_id; + uint16 mirror_proto; + uint16 oob_data_offset; + uint16 oob_data_size; + uint16 pkt_data_offset; + uint16 pkt_data_size; + union { + uint8 b[KCOM_FILTER_BYTES_MAX]; + uint32 w[KCOM_FILTER_WORDS_MAX]; + } data; + union { + uint8 b[KCOM_FILTER_BYTES_MAX]; + uint32 w[KCOM_FILTER_WORDS_MAX]; + } mask; +} kcom_filter_t; + +/* + * DMA buffer information + * + * Cookie field is reserved use by application (32/64-bit pointer). + * + * For Tx operation the application will submit the start address of + * the Tx DCB chain which is queued for transfer by the kernel module. + * Once DMA is done a DMA event is returned to the application with an + * optional sequence number. + * + * For Rx operation the application will submit the start address of + * the Rx DCB chain which should be use for packet reception by the + * kernel module. Once DMA is done a DMA event is returned to the + * application with an optional sequence number. + * + * Cookie field is reserved use by application (32/64-bit pointer). + * + * Packet info types: + * + * KCOM_DMA_INFO_T_TX_DCB + * Data is physical start address of Tx DCB chain. + * + * KCOM_DMA_INFO_T_RX_DCB + * Data is physical start address of Rx DCB chain. + * + * Packet info flags: + * + * KCOM_DMA_INFO_F_TX_DONE + * This flag is set by the kernel module and means that one or more + * packets have been sent. + * + * KCOM_DMA_INFO_F_RX_DONE + * This flag is set by the kernel module and means that one or more + * Rx buffers contain valid packet data. + */ +#define KCOM_DMA_INFO_T_TX_DCB 1 +#define KCOM_DMA_INFO_T_RX_DCB 2 + +#define KCOM_DMA_INFO_F_TX_DONE (1U << 0) +#define KCOM_DMA_INFO_F_RX_DONE (1U << 1) + +typedef struct kcom_dma_info_s { + uint8 type; + uint8 cnt; + uint16 size; + uint16 chan; + uint16 flags; + union { + uint64 dcb_start; + struct { + uint32 tx; + uint32 rx; + } seqno; + } data; + union { + void *p; + uint8 b[8]; + } cookie; + } kcom_dma_info_t; + +/* Default channel configuration */ +#define KCOM_DMA_TX_CHAN 0 +#define KCOM_DMA_RX_CHAN 1 + + +#define KCOM_ETH_HW_T_RESET 1 +#define KCOM_ETH_HW_T_INIT 2 +#define KCOM_ETH_HW_T_OTHER 3 + +#define KCOM_ETH_HW_C_ALL 0xff + +#define KCOM_ETH_HW_RESET_F_TX (1U << 0) +#define KCOM_ETH_HW_RESET_F_RX (1U << 1) +#define KCOM_ETH_HW_RESET_F_TX_RECLAIM (1U << 2) +#define KCOM_ETH_HW_RESET_F_RX_RECLAIM (1U << 3) + +#define KCOM_ETH_HW_INIT_F_TX (1U << 0) +#define KCOM_ETH_HW_INIT_F_RX (1U << 1) +#define KCOM_ETH_HW_INIT_F_RX_FILL (1U << 2) + +#define KCOM_ETH_HW_OTHER_F_FIFO_LOOPBACK (1U << 0) +#define KCOM_ETH_HW_OTHER_F_INTERRUPT (1U << 1) + +typedef struct kcom_eth_hw_config_s { + uint8 type; + uint8 chan; + uint32 flags; + uint32 value; +} kcom_eth_hw_config_t; + +/* + * Message types + */ + +/* + * Request KCOM interface version of kernel module. + */ +typedef struct kcom_msg_version_s { + kcom_msg_hdr_t hdr; + uint32 version; + uint32 netif_max; + uint32 filter_max; +} kcom_msg_version_t; + +/* + * Send literal string to/from kernel module. + * Mainly for debugging purposes. + */ +#define KCOM_MSG_STRING_MAX 128 + +typedef struct kcom_msg_string_s { + kcom_msg_hdr_t hdr; + uint32 len; + char val[KCOM_MSG_STRING_MAX]; +} kcom_msg_string_t; + +/* + * Indicate that eth hardware is about to be reset. Active + * DMA operations should be aborted and DMA and interrupts + * should be disabled. + */ +/* + * Indicate that eth hardware has been properly initialized + * for DMA operation to commence. + */ +typedef struct kcom_msg_eth_hw_config_s { + kcom_msg_hdr_t hdr; + kcom_eth_hw_config_t config; +} kcom_msg_eth_hw_config_t; + +/* + * Indicate that switch hardware is about to be reset. Active + * DMA operations should be aborted and DMA and interrupts + * should be disabled. + */ +typedef struct kcom_msg_hw_reset_s { + kcom_msg_hdr_t hdr; + uint32 channels; +} kcom_msg_hw_reset_t; + +/* + * Indicate that switch hardware has been properly initialized + * for DMA operation to commence. + */ +typedef struct kcom_msg_hw_init_s { + kcom_msg_hdr_t hdr; + uint8 cmic_type; + uint8 dcb_type; + uint8 dcb_size; + uint8 pkt_hdr_size; + uint32 dma_hi; + uint32 cdma_channels; +} kcom_msg_hw_init_t; + +/* + * Release blocked IOCTL threads and clean up as necessary. + */ +typedef struct kcom_msg_detach_s { + kcom_msg_hdr_t hdr; + uint32 flags; +} kcom_msg_detach_t; + +/* + * Reprobe switch device. + */ +typedef struct kcom_msg_reprobe_s { + kcom_msg_hdr_t hdr; + uint32 flags; +} kcom_msg_reprobe_t; + +/* + * Enable/Disable debugging packet function. + */ +typedef struct kcom_msg_dbg_pkt_set_s { + kcom_msg_hdr_t hdr; + int enable; +} kcom_msg_dbg_pkt_set_t; + +/* + * Get debugging packet function info. + */ +typedef struct kcom_msg_dbg_pkt_get_s { + kcom_msg_hdr_t hdr; + int value; +} kcom_msg_dbg_pkt_get_t; + +/* + * Clean up warmboot-related resources. + */ +typedef struct kcom_msg_wb_cleanup_s { + kcom_msg_hdr_t hdr; + uint32 flags; +} kcom_msg_wb_cleanup_t; + +/* + * Create new system network interface. The network interface will + * be associated with the specified switch unit number. + * The interface id and name will be assigned by the kernel module. + */ +typedef struct kcom_msg_netif_create_s { + kcom_msg_hdr_t hdr; + kcom_netif_t netif; +} kcom_msg_netif_create_t; + +/* + * Destroy system network interface. + */ +typedef struct kcom_msg_netif_destroy_s { + kcom_msg_hdr_t hdr; +} kcom_msg_netif_destroy_t; + +/* + * Get list of currently defined system network interfaces. + */ +#ifndef KCOM_NETIF_MAX +#define KCOM_NETIF_MAX 128 +#endif + +typedef struct kcom_msg_netif_list_s { + kcom_msg_hdr_t hdr; + uint32 ifcnt; + uint16 id[KCOM_NETIF_MAX]; +} kcom_msg_netif_list_t; + +/* + * Get detailed network interface information. + */ +typedef struct kcom_msg_netif_get_s { + kcom_msg_hdr_t hdr; + kcom_netif_t netif; +} kcom_msg_netif_get_t; + +/* + * Create new packet filter. + * The filter id will be assigned by the kernel module. + */ +typedef struct kcom_msg_filter_create_s { + kcom_msg_hdr_t hdr; + kcom_filter_t filter; +} kcom_msg_filter_create_t; + +/* + * Destroy packet filter. + */ +typedef struct kcom_msg_filter_destroy_s { + kcom_msg_hdr_t hdr; +} kcom_msg_filter_destroy_t; + +/* + * Get list of currently defined packet filters. + */ +#ifndef KCOM_FILTER_MAX +/* SAI_FIXUP - Increased the filters to 1024 from 128 */ +#define KCOM_FILTER_MAX 1024 +#endif + +typedef struct kcom_msg_filter_list_s { + kcom_msg_hdr_t hdr; + uint32 fcnt; + uint16 id[KCOM_FILTER_MAX]; +} kcom_msg_filter_list_t; + +/* + * Get detailed packet filter information. + */ +typedef struct kcom_msg_filter_get_s { + kcom_msg_hdr_t hdr; + kcom_filter_t filter; +} kcom_msg_filter_get_t; + +/* + * DMA info + */ +typedef struct kcom_msg_dma_info_s { + kcom_msg_hdr_t hdr; + kcom_dma_info_t dma_info; +} kcom_msg_dma_info_t; + +/* + * All messages (e.g. for generic receive) + */ +typedef union kcom_msg_s { + kcom_msg_hdr_t hdr; + kcom_msg_version_t version; + kcom_msg_string_t string; + kcom_msg_hw_reset_t hw_reset; + kcom_msg_hw_init_t hw_init; + kcom_msg_eth_hw_config_t eth_hw_config; + kcom_msg_detach_t detach; + kcom_msg_reprobe_t reprobe; + kcom_msg_netif_create_t netif_create; + kcom_msg_netif_destroy_t netif_destroy; + kcom_msg_netif_list_t netif_list; + kcom_msg_netif_get_t netif_get; + kcom_msg_filter_create_t filter_create; + kcom_msg_filter_destroy_t filter_destroy; + kcom_msg_filter_list_t filter_list; + kcom_msg_filter_get_t filter_get; + kcom_msg_dma_info_t dma_info; + kcom_msg_dbg_pkt_set_t dbg_pkt_set; + kcom_msg_dbg_pkt_get_t dbg_pkt_get; + kcom_msg_wb_cleanup_t wb_cleanup; +} kcom_msg_t; + +/* + * KCOM communication channel vectors + * + * open + * Open KCOM channel. + * + * close + * Close KCOM channel. + * + * send + * Send KCOM message. If bufsz is non-zero, a synchronous send will be + * performed (if supported) and the function will return the number of + * bytes in the response. + * + * recv + * Receive KCOM message. This function is used t oreceive unsolicited + * messages from the kernel. If synchronous send is not supported, this + * function is also used to retrieve responses to command messages. + */ + +typedef struct kcom_chan_s { + void *(*open)(char *name); + int (*close)(void *handle); + int (*send)(void *handle, void *msg, unsigned int len, unsigned int bufsz); + int (*recv)(void *handle, void *msg, unsigned int bufsz); +} kcom_chan_t; + +#endif /* _KCOM_H */ diff --git a/platform/broadcom/saibcm-modules/include/sal/core/sync.h b/platform/broadcom/saibcm-modules/include/sal/core/sync.h new file mode 100644 index 00000000000..75dd6ce6831 --- /dev/null +++ b/platform/broadcom/saibcm-modules/include/sal/core/sync.h @@ -0,0 +1,38 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: sync.h,v 1.1 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + */ + +#ifndef _SAL_SYNC_H +#define _SAL_SYNC_H + +typedef struct sal_sem_s{ + char sal_opaque_type; +} *sal_sem_t; + +#define sal_sem_FOREVER (-1) +#define sal_sem_BINARY 1 +#define sal_sem_COUNTING 0 + +sal_sem_t sal_sem_create(char *desc, int binary, int initial_count); +void sal_sem_destroy(sal_sem_t b); +int sal_sem_take(sal_sem_t b, int usec); +int sal_sem_give(sal_sem_t b); + +#endif /* !_SAL_SYNC_H */ diff --git a/platform/broadcom/saibcm-modules/include/sal/core/thread.h b/platform/broadcom/saibcm-modules/include/sal/core/thread.h new file mode 100644 index 00000000000..b7ecb722489 --- /dev/null +++ b/platform/broadcom/saibcm-modules/include/sal/core/thread.h @@ -0,0 +1,30 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: thread.h,v 1.1 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + */ + +#ifndef _SAL_THREAD_H +#define _SAL_THREAD_H + +#include + +void sal_usleep(uint32 usec); +void sal_udelay(uint32 usec); + +#endif /* !_SAL_THREAD_H */ diff --git a/platform/broadcom/saibcm-modules/include/sal/types.h b/platform/broadcom/saibcm-modules/include/sal/types.h new file mode 100644 index 00000000000..b6b40f76293 --- /dev/null +++ b/platform/broadcom/saibcm-modules/include/sal/types.h @@ -0,0 +1,155 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: types.h,v 1.3 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + * + * File: types.h + * Purpose: SAL type definitions + */ + +#ifndef _SAL_TYPES_H +#define _SAL_TYPES_H + +/* + * Define platform-independent types + */ + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +#ifndef NULL +#define NULL 0 +#endif + +#ifndef DONT_CARE +#define DONT_CARE 0 +#endif + +#define VOL volatile + +/* + * 64-bit type + */ + +#ifdef LONGS_ARE_64BITS + +#define COMPILER_64BIT +#define COMPILER_UINT64 unsigned long +#define u64_H(v) (((uint32 *) &(v))[u64_MSW]) +#define u64_L(v) (((uint32 *) &(v))[u64_LSW]) + +#else /* !LONGS_ARE_64BITS */ + +#define COMPILER_64BIT +#define COMPILER_UINT64 unsigned long long +#define u64_H(v) (((uint32 *) &(v))[u64_MSW]) +#define u64_L(v) (((uint32 *) &(v))[u64_LSW]) + +#endif /* LONGS_ARE_64BITS */ + +/* + * Define unsigned and signed integers with guaranteed sizes. + * Adjust if your compiler uses different sizes for short or int. + */ + +typedef unsigned char uint8; /* 8-bit quantity */ +typedef unsigned short uint16; /* 16-bit quantity */ +typedef unsigned int uint32; /* 32-bit quantity */ +typedef COMPILER_UINT64 uint64; /* 64-bit quantity */ + +typedef signed char int8; /* 8-bit quantity */ +typedef signed short int16; /* 16-bit quantity */ +typedef signed int int32; /* 32-bit quantity */ + +#define BITS2BYTES(x) (((x) + 7) / 8) +#define BITS2WORDS(x) (((x) + 31) / 32) + +#define BYTES2BITS(x) ((x) * 8) +#define BYTES2WORDS(x) (((x) + 3) / 4) + +#define WORDS2BITS(x) ((x) * 32) +#define WORDS2BYTES(x) ((x) * 4) + +#define COUNTOF(ary) ((int) (sizeof (ary) / sizeof ((ary)[0]))) + +typedef uint32 sal_paddr_t; /* Physical address (PCI address) */ + +#ifdef PTRS_ARE_64BITS +typedef uint64 sal_vaddr_t; /* Virtual address (Host address) */ +#define PTR_TO_INT(x) ((uint32)(((sal_vaddr_t)(x))&0xFFFFFFFF)) +#else +typedef uint32 sal_vaddr_t; /* Virtual address (Host address) */ +#define PTR_TO_INT(x) ((uint32)(x)) +#endif + +#define INT_TO_PTR(x) ((void *)((sal_vaddr_t)(x))) + +#define PTR_TO_UINTPTR(x) ((sal_vaddr_t)(x)) +#define UINTPTR_TO_PTR(x) ((void *)(x)) + +typedef union +{ + uint8 u8; + uint16 u16; + uint32 u32; + uint64 u64; + sal_paddr_t paddr; + sal_vaddr_t vaddr; + void *ptr; +} any_t; + +/* Device bus types */ +#define SAL_PCI_DEV_TYPE 0x00001 /* PCI device */ +#define SAL_SPI_DEV_TYPE 0x00002 /* SPI device */ +#define SAL_EB_DEV_TYPE 0x00004 /* EB device */ +#define SAL_ICS_DEV_TYPE 0x00008 /* ICS device */ +#define SAL_MII_DEV_TYPE 0x00010 /* MII device */ +#define SAL_RCPU_DEV_TYPE 0x00020 /* RCPU device */ +#define SAL_I2C_DEV_TYPE 0x00040 /* I2C device */ +#define SAL_AXI_DEV_TYPE 0x00080 /* AXI device */ +#define SAL_EMMI_DEV_TYPE 0x10000 /* EMMI device */ +#define SAL_DEV_BUS_TYPE_MASK 0xf00ff /* Odd for historical reasons */ + +/* Device types */ +#define SAL_SWITCH_DEV_TYPE 0x00100 /* Switch device */ +#define SAL_ETHER_DEV_TYPE 0x00200 /* Ethernet device */ +#define SAL_CPU_DEV_TYPE 0x00400 /* CPU device */ +#define SAL_DEV_TYPE_MASK 0x00f00 + +/* Access types */ +#define SAL_DEV_BUS_RD_16BIT 0x01000 /* 16 bit reads on bus */ +#define SAL_DEV_BUS_WR_16BIT 0x02000 /* 16 bit writes on bus */ +#define SAL_DEV_BUS_ALT 0x04000 /* Alternate access */ +#define SAL_DEV_BUS_MSI 0x08000 /* Message-signaled interrupts */ +#define SAL_DEV_FLAG_MASK 0x0f000 + +/* BDE reserved mask (cannot be used by SAL) */ +#define SAL_DEV_BDE_MASK 0xff000000 + +/* Backward compatibility */ +#define SAL_ET_DEV_TYPE SAL_MII_DEV_TYPE + +/* Special access addresses */ +#define SAL_DEV_OP_EMMI_INIT 0x0fff1000 + +#endif /* !_SAL_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules/include/sdk_config.h b/platform/broadcom/saibcm-modules/include/sdk_config.h new file mode 100644 index 00000000000..9d781114bdf --- /dev/null +++ b/platform/broadcom/saibcm-modules/include/sdk_config.h @@ -0,0 +1,45 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: sdk_config.h,v 1.5 Broadcom SDK $ + * $Copyright: (c) 2006 Broadcom Corp. + * All Rights Reserved.$ + * + * + */ + +#ifndef __SDK_CONFIG_H__ +#define __SDK_CONFIG_H__ + +/* + * Include custom overrides + */ +#ifdef SDK_INCLUDE_CUSTOM_CONFIG +#include +#endif + + +/* + * Memory Barrier operation if required. + * Defaults to nothing. + */ +#ifndef SDK_CONFIG_MEMORY_BARRIER +#define SDK_CONFIG_MEMORY_BARRIER +#endif + + + +#endif /* __SDK_CONFIG_H__ */ diff --git a/platform/broadcom/saibcm-modules/include/soc/cmic.h b/platform/broadcom/saibcm-modules/include/soc/cmic.h new file mode 100644 index 00000000000..5bf6130237a --- /dev/null +++ b/platform/broadcom/saibcm-modules/include/soc/cmic.h @@ -0,0 +1,37 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: cmic.h,v 1.1 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + * + * File: cmic.h + * Purpose: Maps out structures used for CMIC operations and + * exports routines and constants. + */ + +#ifndef _SOC_CMIC_H +#define _SOC_CMIC_H + +/* IRQ Register (RO) */ +#define CMIC_IRQ_STAT 0x00000144 + +/* IRQ Mask Registers (R/W) */ +#define CMIC_IRQ_MASK 0x00000148 +#define CMIC_IRQ_MASK_1 0x0000006C +#define CMIC_IRQ_MASK_2 0x00000070 + +#endif /* !_SOC_CMIC_H */ diff --git a/platform/broadcom/saibcm-modules/include/soc/devids.h b/platform/broadcom/saibcm-modules/include/soc/devids.h new file mode 100644 index 00000000000..cb072a78cbd --- /dev/null +++ b/platform/broadcom/saibcm-modules/include/soc/devids.h @@ -0,0 +1,2049 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * Copyright: (c) 2018 Broadcom. + * All Rights Reserved. + */ + +#ifndef _SOC_DEVIDS_H +#define _SOC_DEVIDS_H + + +#define BROADCOM_VENDOR_ID 0x14e4 + +#define BCM5690_DEVICE_ID 0x5690 +#define BCM5690_A0_REV_ID 1 +#define BCM5690_A1_REV_ID 2 +#define BCM5690_A2_REV_ID 3 + +#define BCM5691_DEVICE_ID 0x5691 +#define BCM5691_A0_REV_ID 1 +#define BCM5691_A1_REV_ID 2 +#define BCM5691_A2_REV_ID 3 + +#define BCM5692_DEVICE_ID 0x5692 +#define BCM5692_A0_REV_ID 1 +#define BCM5692_A1_REV_ID 2 +#define BCM5692_A2_REV_ID 3 + +#define BCM5693_DEVICE_ID 0x5693 +#define BCM5693_A0_REV_ID 1 +#define BCM5693_A1_REV_ID 2 +#define BCM5693_A2_REV_ID 3 + +#define BCM5695_DEVICE_ID 0x5695 +#define BCM5695_A0_REV_ID 1 +#define BCM5695_A1_REV_ID 2 +#define BCM5695_B0_REV_ID 0x11 + +#define BCM5696_DEVICE_ID 0x5696 +#define BCM5696_A0_REV_ID 1 +#define BCM5696_A1_REV_ID 2 +#define BCM5696_B0_REV_ID 0x11 + +#define BCM5697_DEVICE_ID 0x5697 +#define BCM5697_A0_REV_ID 1 +#define BCM5697_A1_REV_ID 2 +#define BCM5697_B0_REV_ID 0x11 + +#define BCM5698_DEVICE_ID 0x5698 +#define BCM5698_A0_REV_ID 1 +#define BCM5698_A1_REV_ID 2 +#define BCM5698_B0_REV_ID 0x11 + +#define BCM5670_DEVICE_ID 0x5670 +#define BCM5670_A0_REV_ID 1 +#define BCM5670_A1_REV_ID 2 + +#define BCM5671_DEVICE_ID 0x5671 +#define BCM5671_A0_REV_ID 1 +#define BCM5671_A1_REV_ID 2 +#define BCM5671_A2_REV_ID 3 + +#define BCM5675_DEVICE_ID 0x5675 +#define BCM5675_A0_REV_ID 1 +#define BCM5675_A1_REV_ID 2 + +#define BCM5676_DEVICE_ID 0x5676 +#define BCM5676_A0_REV_ID 1 +#define BCM5676_A1_REV_ID 2 + +#define BCM5673_DEVICE_ID 0x5673 +#define BCM5673_A0_REV_ID 1 +#define BCM5673_A1_REV_ID 2 +#define BCM5673_A2_REV_ID 3 + +#define BCM5674_DEVICE_ID 0x5674 +#define BCM5674_A0_REV_ID 1 + +#define BCM56100_DEVICE_ID 0xb100 +#define BCM56100_A0_REV_ID 1 +#define BCM56100_A1_REV_ID 2 +#define BCM56101_DEVICE_ID 0xb101 +#define BCM56101_A0_REV_ID 1 +#define BCM56101_A1_REV_ID 2 +#define BCM56102_DEVICE_ID 0xb102 +#define BCM56102_A0_REV_ID 1 +#define BCM56102_A1_REV_ID 2 +#define BCM56105_DEVICE_ID 0xb105 +#define BCM56105_A0_REV_ID 1 +#define BCM56105_A1_REV_ID 2 +#define BCM56106_DEVICE_ID 0xb106 +#define BCM56106_A0_REV_ID 1 +#define BCM56106_A1_REV_ID 2 +#define BCM56107_DEVICE_ID 0xb107 +#define BCM56107_A0_REV_ID 1 +#define BCM56107_A1_REV_ID 2 + +#define BCM56110_DEVICE_ID 0xb110 +#define BCM56110_A0_REV_ID 1 +#define BCM56111_DEVICE_ID 0xb111 +#define BCM56111_A0_REV_ID 1 +#define BCM56112_DEVICE_ID 0xb112 +#define BCM56112_A0_REV_ID 1 +#define BCM56115_DEVICE_ID 0xb115 +#define BCM56115_A0_REV_ID 1 +#define BCM56116_DEVICE_ID 0xb116 +#define BCM56116_A0_REV_ID 1 +#define BCM56117_DEVICE_ID 0xb117 +#define BCM56117_A0_REV_ID 1 + +#define BCM56300_DEVICE_ID 0xb300 +#define BCM56300_A0_REV_ID 1 +#define BCM56300_A1_REV_ID 2 +#define BCM56300_B0_REV_ID 0x11 +#define BCM56300_B1_REV_ID 0x12 +#define BCM56301_DEVICE_ID 0xb301 +#define BCM56301_A0_REV_ID 1 +#define BCM56301_A1_REV_ID 2 +#define BCM56301_B0_REV_ID 0x11 +#define BCM56301_B1_REV_ID 0x12 +#define BCM56302_DEVICE_ID 0xb302 +#define BCM56302_A0_REV_ID 1 +#define BCM56302_A1_REV_ID 2 +#define BCM56302_B0_REV_ID 0x11 +#define BCM56302_B1_REV_ID 0x12 +#define BCM56303_DEVICE_ID 0xb303 +#define BCM56303_A1_REV_ID 2 +#define BCM56303_A0_REV_ID 1 +#define BCM56303_B0_REV_ID 0x11 +#define BCM56303_B1_REV_ID 0x12 +#define BCM56304_DEVICE_ID 0xb304 +#define BCM56304_A0_REV_ID 1 +#define BCM56304_A1_REV_ID 2 +#define BCM56304_B0_REV_ID 0x11 +#define BCM56304_B1_REV_ID 0x12 +#define BCM56404_DEVICE_ID 0xb404 +#define BCM56404_A0_REV_ID 1 +#define BCM56404_A1_REV_ID 2 +#define BCM56305_DEVICE_ID 0xb305 +#define BCM56305_A0_REV_ID 1 +#define BCM56305_A1_REV_ID 2 +#define BCM56305_B0_REV_ID 0x11 +#define BCM56305_B1_REV_ID 0x12 +#define BCM56306_DEVICE_ID 0xb306 +#define BCM56306_A0_REV_ID 1 +#define BCM56306_A1_REV_ID 2 +#define BCM56306_B0_REV_ID 0x11 +#define BCM56306_B1_REV_ID 0x12 +#define BCM56307_DEVICE_ID 0xb307 +#define BCM56307_A0_REV_ID 1 +#define BCM56307_A1_REV_ID 2 +#define BCM56307_B0_REV_ID 0x11 +#define BCM56307_B1_REV_ID 0x12 +#define BCM56308_DEVICE_ID 0xb308 +#define BCM56308_A0_REV_ID 1 +#define BCM56308_A1_REV_ID 2 +#define BCM56308_B0_REV_ID 0x11 +#define BCM56308_B1_REV_ID 0x12 +#define BCM56309_DEVICE_ID 0xb309 +#define BCM56309_A0_REV_ID 1 +#define BCM56309_A1_REV_ID 2 +#define BCM56309_B0_REV_ID 0x11 +#define BCM56309_B1_REV_ID 0x12 + +#define BCM56310_DEVICE_ID 0xb310 +#define BCM56310_A0_REV_ID 1 +#define BCM56311_DEVICE_ID 0xb311 +#define BCM56311_A0_REV_ID 1 +#define BCM56312_DEVICE_ID 0xb312 +#define BCM56312_A0_REV_ID 1 +#define BCM56313_DEVICE_ID 0xb313 +#define BCM56313_A0_REV_ID 1 +#define BCM56314_DEVICE_ID 0xb314 +#define BCM56314_A0_REV_ID 1 +#define BCM56315_DEVICE_ID 0xb315 +#define BCM56315_A0_REV_ID 1 +#define BCM56316_DEVICE_ID 0xb316 +#define BCM56316_A0_REV_ID 1 +#define BCM56317_DEVICE_ID 0xb317 +#define BCM56317_A0_REV_ID 1 +#define BCM56318_DEVICE_ID 0xb318 +#define BCM56318_A0_REV_ID 1 +#define BCM56319_DEVICE_ID 0xb319 +#define BCM56319_A0_REV_ID 1 + +#ifndef EXCLUDE_BCM56324 +#define BCM56322_DEVICE_ID 0xb322 +#define BCM56322_A0_REV_ID 1 +#define BCM56324_DEVICE_ID 0xb324 +#define BCM56324_A0_REV_ID 1 +#endif + +#define BCM53300_DEVICE_ID 0xb006 +#define BCM53300_A0_REV_ID 0x11 +#define BCM53300_A1_REV_ID 0x12 +#define BCM53301_DEVICE_ID 0xb206 +#define BCM53301_A0_REV_ID 0x11 +#define BCM53301_A1_REV_ID 0x12 +#define BCM53302_DEVICE_ID 0xb008 +#define BCM53302_A0_REV_ID 0x11 +#define BCM53302_A1_REV_ID 0x12 + +#define BCM56500_DEVICE_ID 0xb500 +#define BCM56500_A0_REV_ID 1 +#define BCM56500_A1_REV_ID 2 +#define BCM56500_B0_REV_ID 0x11 +#define BCM56500_B1_REV_ID 0x12 +#define BCM56500_B2_REV_ID 0x13 +#define BCM56501_DEVICE_ID 0xb501 +#define BCM56501_A0_REV_ID 1 +#define BCM56501_A1_REV_ID 2 +#define BCM56501_B0_REV_ID 0x11 +#define BCM56501_B1_REV_ID 0x12 +#define BCM56501_B2_REV_ID 0x13 +#define BCM56502_DEVICE_ID 0xb502 +#define BCM56502_A0_REV_ID 1 +#define BCM56502_A1_REV_ID 2 +#define BCM56502_B0_REV_ID 0x11 +#define BCM56502_B1_REV_ID 0x12 +#define BCM56502_B2_REV_ID 0x13 +#define BCM56503_DEVICE_ID 0xb503 +#define BCM56503_A0_REV_ID 1 +#define BCM56503_A1_REV_ID 2 +#define BCM56503_B0_REV_ID 0x11 +#define BCM56503_B1_REV_ID 0x12 +#define BCM56503_B2_REV_ID 0x13 +#define BCM56504_DEVICE_ID 0xb504 +#define BCM56504_A0_REV_ID 1 +#define BCM56504_A1_REV_ID 2 +#define BCM56504_B0_REV_ID 0x11 +#define BCM56504_B1_REV_ID 0x12 +#define BCM56504_B2_REV_ID 0x13 +#define BCM56505_DEVICE_ID 0xb505 +#define BCM56505_A0_REV_ID 1 +#define BCM56505_A1_REV_ID 2 +#define BCM56505_B0_REV_ID 0x11 +#define BCM56505_B1_REV_ID 0x12 +#define BCM56505_B2_REV_ID 0x13 +#define BCM56506_DEVICE_ID 0xb506 +#define BCM56506_A0_REV_ID 1 +#define BCM56506_A1_REV_ID 2 +#define BCM56506_B0_REV_ID 0x11 +#define BCM56506_B1_REV_ID 0x12 +#define BCM56506_B2_REV_ID 0x13 +#define BCM56507_DEVICE_ID 0xb507 +#define BCM56507_A0_REV_ID 1 +#define BCM56507_A1_REV_ID 2 +#define BCM56507_B0_REV_ID 0x11 +#define BCM56507_B1_REV_ID 0x12 +#define BCM56507_B2_REV_ID 0x13 +#define BCM56508_DEVICE_ID 0xb508 +#define BCM56508_A0_REV_ID 1 +#define BCM56508_A1_REV_ID 2 +#define BCM56508_B0_REV_ID 0x11 +#define BCM56508_B1_REV_ID 0x12 +#define BCM56508_B2_REV_ID 0x13 +#define BCM56509_DEVICE_ID 0xb509 +#define BCM56509_A0_REV_ID 1 +#define BCM56509_A1_REV_ID 2 +#define BCM56509_B0_REV_ID 0x11 +#define BCM56509_B1_REV_ID 0x12 +#define BCM56509_B2_REV_ID 0x13 + +#define BCM56600_DEVICE_ID 0xb600 +#define BCM56600_A0_REV_ID 1 +#define BCM56600_B0_REV_ID 0x11 +#define BCM56600_C0_REV_ID 0x21 +#define BCM56601_DEVICE_ID 0xb601 +#define BCM56601_A0_REV_ID 1 +#define BCM56601_B0_REV_ID 0x11 +#define BCM56601_C0_REV_ID 0x21 +#define BCM56602_DEVICE_ID 0xb602 +#define BCM56602_A0_REV_ID 1 +#define BCM56602_B0_REV_ID 0x11 +#define BCM56602_C0_REV_ID 0x21 +#define BCM56603_DEVICE_ID 0xb603 +#define BCM56603_A0_REV_ID 1 +#define BCM56603_B0_REV_ID 0x11 +#define BCM56603_C0_REV_ID 0x21 +#define BCM56605_DEVICE_ID 0xb605 +#define BCM56605_A0_REV_ID 1 +#define BCM56605_B0_REV_ID 0x11 +#define BCM56605_C0_REV_ID 0x21 +#define BCM56606_DEVICE_ID 0xb606 +#define BCM56606_A0_REV_ID 1 +#define BCM56606_B0_REV_ID 0x11 +#define BCM56606_C0_REV_ID 0x21 +#define BCM56607_DEVICE_ID 0xb607 +#define BCM56607_A0_REV_ID 1 +#define BCM56607_B0_REV_ID 0x11 +#define BCM56607_C0_REV_ID 0x21 +#define BCM56608_DEVICE_ID 0xb608 +#define BCM56608_A0_REV_ID 1 +#define BCM56608_B0_REV_ID 0x11 +#define BCM56608_C0_REV_ID 0x21 + +#define BCM56580_DEVICE_ID 0xb580 +#define BCM56580_A0_REV_ID 1 + +#define BCM56700_DEVICE_ID 0xb700 +#define BCM56700_A0_REV_ID 1 +#define BCM56701_DEVICE_ID 0xb701 +#define BCM56701_A0_REV_ID 1 + +#define BCM56800_DEVICE_ID 0xb800 +#define BCM56800_A0_REV_ID 1 +#define BCM56801_DEVICE_ID 0xb801 +#define BCM56801_A0_REV_ID 1 +#define BCM56802_DEVICE_ID 0xb802 +#define BCM56802_A0_REV_ID 1 +#define BCM56803_DEVICE_ID 0xb803 +#define BCM56803_A0_REV_ID 1 + +#define BCM56224_DEVICE_ID 0xb224 +#define BCM56224_A0_REV_ID 1 +#define BCM56224_B0_REV_ID 0x11 +#define BCM56225_DEVICE_ID 0xb225 +#define BCM56225_A0_REV_ID 1 +#define BCM56225_B0_REV_ID 0x11 +#define BCM56226_DEVICE_ID 0xb226 +#define BCM56226_A0_REV_ID 1 +#define BCM56226_B0_REV_ID 0x11 +#define BCM56227_DEVICE_ID 0xb227 +#define BCM56227_A0_REV_ID 1 +#define BCM56227_B0_REV_ID 0x11 +#define BCM56228_DEVICE_ID 0xb228 +#define BCM56228_A0_REV_ID 1 +#define BCM56228_B0_REV_ID 0x11 +#define BCM56229_DEVICE_ID 0xb229 +#define BCM56229_A0_REV_ID 1 +#define BCM56229_B0_REV_ID 0x11 +#define BCM56024_DEVICE_ID 0xb024 +#define BCM56024_A0_REV_ID 1 +#define BCM56024_B0_REV_ID 0x11 +#define BCM56025_DEVICE_ID 0xb025 +#define BCM56025_A0_REV_ID 1 +#define BCM56025_B0_REV_ID 0x11 +#define BCM53724_DEVICE_ID 0xc724 +#define BCM53724_A0_REV_ID 1 +#define BCM53724_B0_REV_ID 0x11 +#define BCM53726_DEVICE_ID 0xc726 +#define BCM53726_A0_REV_ID 1 +#define BCM53726_B0_REV_ID 0x11 + +#define BCM53312_DEVICE_ID 0xc312 +#define BCM53312_A0_REV_ID 1 +#define BCM53312_B0_REV_ID 0x11 +#define BCM53313_DEVICE_ID 0xc313 +#define BCM53313_A0_REV_ID 1 +#define BCM53313_B0_REV_ID 0x11 +#define BCM53314_DEVICE_ID 0xc314 +#define BCM53314_A0_REV_ID 1 +#define BCM53314_B0_REV_ID 0x11 + +#define BCM53322_DEVICE_ID 0xc322 +#define BCM53322_A0_REV_ID 1 +#define BCM53323_DEVICE_ID 0xc323 +#define BCM53323_A0_REV_ID 1 +#define BCM53324_DEVICE_ID 0xc324 +#define BCM53324_A0_REV_ID 1 + + +#define BCM56218_DEVICE_ID 0xB218 +#define BCM56218_A0_REV_ID 1 +#define BCM56218_A1_REV_ID 2 +#define BCM56218_A2_REV_ID 3 +#define BCM56218X_DEVICE_ID 0xc710 +#define BCM56218X_A0_REV_ID 1 +#define BCM56218X_A1_REV_ID 2 +#define BCM56218X_A2_REV_ID 3 +#define BCM56219_DEVICE_ID 0xB219 +#define BCM56219_A0_REV_ID 1 +#define BCM56219_A1_REV_ID 2 +#define BCM56219_A2_REV_ID 3 +#define BCM56218R_DEVICE_ID 0xB21A +#define BCM56218R_A0_REV_ID 1 +#define BCM56218R_A1_REV_ID 2 +#define BCM56218R_A2_REV_ID 3 +#define BCM56219R_DEVICE_ID 0xB21B +#define BCM56219R_A0_REV_ID 1 +#define BCM56219R_A1_REV_ID 2 +#define BCM56219R_A2_REV_ID 3 +#define BCM56214_DEVICE_ID 0xB214 +#define BCM56214_A0_REV_ID 1 +#define BCM56214_A1_REV_ID 2 +#define BCM56214_A2_REV_ID 3 +#define BCM56215_DEVICE_ID 0xB215 +#define BCM56215_A0_REV_ID 1 +#define BCM56215_A1_REV_ID 2 +#define BCM56215_A2_REV_ID 3 +#define BCM56214R_DEVICE_ID 0xB21C +#define BCM56214R_A0_REV_ID 1 +#define BCM56214R_A1_REV_ID 2 +#define BCM56214R_A2_REV_ID 3 +#define BCM56215R_DEVICE_ID 0xB21D +#define BCM56215R_A0_REV_ID 1 +#define BCM56215R_A1_REV_ID 2 +#define BCM56215R_A2_REV_ID 3 +#define BCM56216_DEVICE_ID 0xB216 +#define BCM56216_A0_REV_ID 1 +#define BCM56216_A1_REV_ID 2 +#define BCM56216_A2_REV_ID 3 +#define BCM56217_DEVICE_ID 0xB217 +#define BCM56217_A0_REV_ID 1 +#define BCM56217_A1_REV_ID 2 +#define BCM56217_A2_REV_ID 3 +#define BCM56212_DEVICE_ID 0xB212 +#define BCM56212_A0_REV_ID 1 +#define BCM56212_A1_REV_ID 2 +#define BCM56212_A2_REV_ID 3 +#define BCM56213_DEVICE_ID 0xB213 +#define BCM56213_A0_REV_ID 1 +#define BCM56213_A1_REV_ID 2 +#define BCM56213_A2_REV_ID 3 +#define BCM53718_DEVICE_ID 0xC71A +#define BCM53718_A0_REV_ID 1 +#define BCM53718_A1_REV_ID 2 +#define BCM53718_A2_REV_ID 3 +#define BCM53714_DEVICE_ID 0xC71B +#define BCM53714_A0_REV_ID 1 +#define BCM53714_A1_REV_ID 2 +#define BCM53714_A2_REV_ID 3 +#define BCM53716_DEVICE_ID 0xC716 +#define BCM53716_A0_REV_ID 1 +#define BCM53716_A1_REV_ID 2 +#define BCM53716_A2_REV_ID 3 +#define BCM56018_DEVICE_ID 0xB018 +#define BCM56018_A0_REV_ID 1 +#define BCM56018_A1_REV_ID 2 +#define BCM56018_A2_REV_ID 3 +#define BCM56014_DEVICE_ID 0xB014 +#define BCM56014_A0_REV_ID 1 +#define BCM56014_A1_REV_ID 2 +#define BCM56014_A2_REV_ID 3 + +#define BCM56510_DEVICE_ID 0xb510 +#define BCM56510_A0_REV_ID 1 +#define BCM56511_DEVICE_ID 0xb511 +#define BCM56511_A0_REV_ID 1 +#define BCM56512_DEVICE_ID 0xb512 +#define BCM56512_A0_REV_ID 1 +#define BCM56513_DEVICE_ID 0xb513 +#define BCM56513_A0_REV_ID 1 +#define BCM56514_DEVICE_ID 0xb514 +#define BCM56514_A0_REV_ID 1 +#define BCM56516_DEVICE_ID 0xb516 +#define BCM56516_A0_REV_ID 1 +#define BCM56517_DEVICE_ID 0xb517 +#define BCM56517_A0_REV_ID 1 +#define BCM56518_DEVICE_ID 0xb518 +#define BCM56518_A0_REV_ID 1 +#define BCM56519_DEVICE_ID 0xb519 +#define BCM56519_A0_REV_ID 1 + +#define BCM56620_DEVICE_ID 0xb620 +#define BCM56620_A0_REV_ID 1 +#define BCM56620_A1_REV_ID 2 +#define BCM56620_B0_REV_ID 0x11 +#define BCM56620_B1_REV_ID 0x12 +#define BCM56620_B2_REV_ID 0x13 +#define BCM56624_DEVICE_ID 0xb624 +#define BCM56624_A0_REV_ID 1 +#define BCM56624_A1_REV_ID 2 +#define BCM56624_B0_REV_ID 0x11 +#define BCM56624_B1_REV_ID 0x12 +#define BCM56624_B2_REV_ID 0x13 +#define BCM56626_DEVICE_ID 0xb626 +#define BCM56626_A0_REV_ID 1 +#define BCM56626_A1_REV_ID 2 +#define BCM56626_B0_REV_ID 0x11 +#define BCM56626_B1_REV_ID 0x12 +#define BCM56626_B2_REV_ID 0x13 +#define BCM56628_DEVICE_ID 0xb628 +#define BCM56628_A0_REV_ID 1 +#define BCM56628_A1_REV_ID 2 +#define BCM56628_B0_REV_ID 0x11 +#define BCM56628_B1_REV_ID 0x12 +#define BCM56628_B2_REV_ID 0x13 +#define BCM56629_DEVICE_ID 0xb629 +#define BCM56629_A0_REV_ID 1 +#define BCM56629_A1_REV_ID 2 +#define BCM56629_B0_REV_ID 0x11 +#define BCM56629_B1_REV_ID 0x12 +#define BCM56629_B2_REV_ID 0x13 + +#define BCM56680_DEVICE_ID 0xb680 +#define BCM56680_A0_REV_ID 1 +#define BCM56680_A1_REV_ID 2 +#define BCM56680_B0_REV_ID 0x11 +#define BCM56680_B1_REV_ID 0x12 +#define BCM56680_B2_REV_ID 0x13 +#define BCM56684_DEVICE_ID 0xb684 +#define BCM56684_A0_REV_ID 1 +#define BCM56684_A1_REV_ID 2 +#define BCM56684_B0_REV_ID 0x11 +#define BCM56684_B1_REV_ID 0x12 +#define BCM56684_B2_REV_ID 0x13 +#define BCM56686_DEVICE_ID 0xb686 +#define BCM56686_B0_REV_ID 0x11 +#define BCM56686_B1_REV_ID 0x12 +#define BCM56686_B2_REV_ID 0x13 + +#define BCM56820_DEVICE_ID 0xb820 +#define BCM56820_A0_REV_ID 1 +#define BCM56820_B0_REV_ID 0x11 +#define BCM56821_DEVICE_ID 0xb821 +#define BCM56821_A0_REV_ID 1 +#define BCM56821_B0_REV_ID 0x11 +#define BCM56822_DEVICE_ID 0xb822 +#define BCM56822_A0_REV_ID 1 +#define BCM56822_B0_REV_ID 0x11 +#define BCM56823_DEVICE_ID 0xb823 +#define BCM56823_A0_REV_ID 1 +#define BCM56823_B0_REV_ID 0x11 +#define BCM56825_DEVICE_ID 0xb825 +#define BCM56825_B0_REV_ID 0x11 + +#define BCM56720_DEVICE_ID 0xb720 +#define BCM56720_A0_REV_ID 1 +#define BCM56720_B0_REV_ID 0x11 +#define BCM56721_DEVICE_ID 0xb721 +#define BCM56721_A0_REV_ID 1 +#define BCM56721_B0_REV_ID 0x11 + +#define BCM56725_DEVICE_ID 0xb725 +#define BCM56725_A0_REV_ID 1 +#define BCM56725_B0_REV_ID 0x11 + +#define BCM56630_DEVICE_ID 0xb630 +#define BCM56630_A0_REV_ID 1 +#define BCM56630_B0_REV_ID 0x11 +#define BCM56634_DEVICE_ID 0xb634 +#define BCM56634_A0_REV_ID 1 +#define BCM56634_B0_REV_ID 0x11 +#define BCM56636_DEVICE_ID 0xb636 +#define BCM56636_A0_REV_ID 1 +#define BCM56636_B0_REV_ID 0x11 +#define BCM56638_DEVICE_ID 0xb638 +#define BCM56638_A0_REV_ID 1 +#define BCM56638_B0_REV_ID 0x11 +#define BCM56639_DEVICE_ID 0xb639 +#define BCM56639_A0_REV_ID 1 +#define BCM56639_B0_REV_ID 0x11 + +#define BCM56685_DEVICE_ID 0xb685 +#define BCM56685_A0_REV_ID 1 +#define BCM56685_B0_REV_ID 0x11 +#define BCM56689_DEVICE_ID 0xb689 +#define BCM56689_A0_REV_ID 1 +#define BCM56689_B0_REV_ID 0x11 + +#define BCM56520_DEVICE_ID 0xb520 +#define BCM56520_A0_REV_ID 1 +#define BCM56520_B0_REV_ID 0x11 +#define BCM56521_DEVICE_ID 0xb521 +#define BCM56521_A0_REV_ID 1 +#define BCM56521_B0_REV_ID 0x11 +#define BCM56522_DEVICE_ID 0xb522 +#define BCM56522_A0_REV_ID 1 +#define BCM56522_B0_REV_ID 0x11 +#define BCM56524_DEVICE_ID 0xb524 +#define BCM56524_A0_REV_ID 1 +#define BCM56524_B0_REV_ID 0x11 +#define BCM56526_DEVICE_ID 0xb526 +#define BCM56526_A0_REV_ID 1 +#define BCM56526_B0_REV_ID 0x11 + +#define BCM56534_DEVICE_ID 0xb534 +#define BCM56534_B0_REV_ID 0x11 +#define BCM56538_DEVICE_ID 0xb538 +#define BCM56538_B0_REV_ID 0x11 + +#define BCM56331_DEVICE_ID 0xb331 +#define BCM56331_A0_REV_ID 1 +#define BCM56331_B0_REV_ID 0x11 +#define BCM56331_B1_REV_ID 0x12 +#define BCM56333_DEVICE_ID 0xb333 +#define BCM56333_A0_REV_ID 1 +#define BCM56333_B0_REV_ID 0x11 +#define BCM56333_B1_REV_ID 0x12 +#define BCM56334_DEVICE_ID 0xb334 +#define BCM56334_A0_REV_ID 1 +#define BCM56334_B0_REV_ID 0x11 +#define BCM56334_B1_REV_ID 0x12 +#define BCM56338_DEVICE_ID 0xb338 +#define BCM56338_A0_REV_ID 1 +#define BCM56338_B0_REV_ID 0x11 +#define BCM56338_B1_REV_ID 0x12 + +#define BCM56320_DEVICE_ID 0xb320 +#define BCM56320_A0_REV_ID 1 +#define BCM56320_B0_REV_ID 0x11 +#define BCM56320_B1_REV_ID 0x12 +#define BCM56321_DEVICE_ID 0xb321 +#define BCM56321_A0_REV_ID 1 +#define BCM56321_B0_REV_ID 0x11 +#define BCM56321_B1_REV_ID 0x12 + + +#define BCM56548H_DEVICE_ID 0xB54A +#define BCM56548H_A0_REV_ID 1 +#define BCM56548_DEVICE_ID 0xb548 +#define BCM56548_A0_REV_ID 1 +#define BCM56547_DEVICE_ID 0xb547 +#define BCM56547_A0_REV_ID 1 + +#define BCM56346_DEVICE_ID 0xb346 +#define BCM56346_A0_REV_ID 1 +#define BCM56345_DEVICE_ID 0xb345 +#define BCM56345_A0_REV_ID 1 +#define BCM56344_DEVICE_ID 0xb344 +#define BCM56344_A0_REV_ID 1 +#define BCM56342_DEVICE_ID 0xb342 +#define BCM56342_A0_REV_ID 1 +#define BCM56340_DEVICE_ID 0xb340 +#define BCM56340_A0_REV_ID 1 + +#define BCM56049_DEVICE_ID 0xb049 +#define BCM56049_A0_REV_ID 1 +#define BCM56048_DEVICE_ID 0xb048 +#define BCM56048_A0_REV_ID 1 +#define BCM56047_DEVICE_ID 0xb047 +#define BCM56047_A0_REV_ID 1 + +#define BCM56042_DEVICE_ID 0xb042 +#define BCM56042_A0_REV_ID 1 +#define BCM56041_DEVICE_ID 0xb041 +#define BCM56041_A0_REV_ID 1 +#define BCM56040_DEVICE_ID 0xb040 +#define BCM56040_A0_REV_ID 1 + +#define BCM56132_DEVICE_ID 0xb132 +#define BCM56132_A0_REV_ID 1 +#define BCM56132_B0_REV_ID 0x11 +#define BCM56132_B1_REV_ID 0x12 +#define BCM56134_DEVICE_ID 0xb134 +#define BCM56134_A0_REV_ID 1 +#define BCM56134_B0_REV_ID 0x11 +#define BCM56134_B1_REV_ID 0x12 + +#define BCM56230_DEVICE_ID 0xb230 +#define BCM56230_B1_REV_ID 0x12 +#define BCM56231_DEVICE_ID 0xb231 +#define BCM56231_B1_REV_ID 0x12 + +#define BCM56140_DEVICE_ID 0xb140 +#define BCM56140_A0_REV_ID 1 +#define BCM56142_DEVICE_ID 0xb142 +#define BCM56142_A0_REV_ID 1 +#define BCM56143_DEVICE_ID 0xb143 +#define BCM56143_A0_REV_ID 1 +#define BCM56144_DEVICE_ID 0xb144 +#define BCM56144_A0_REV_ID 1 +#define BCM56146_DEVICE_ID 0xb146 +#define BCM56146_A0_REV_ID 1 +#define BCM56147_DEVICE_ID 0xb147 +#define BCM56147_A0_REV_ID 1 +#define BCM56149_DEVICE_ID 0xb149 +#define BCM56149_A0_REV_ID 1 + +#define BCM56840_DEVICE_ID 0xb840 +#define BCM56840_A0_REV_ID 1 +#define BCM56840_A1_REV_ID 2 +#define BCM56840_A2_REV_ID 3 +#define BCM56840_A3_REV_ID 4 +#define BCM56840_A4_REV_ID 5 +#define BCM56840_B0_REV_ID 0x11 +#define BCM56840_B1_REV_ID 0x12 +#define BCM56841_DEVICE_ID 0xb841 +#define BCM56841_A0_REV_ID 1 +#define BCM56841_A1_REV_ID 2 +#define BCM56841_A2_REV_ID 3 +#define BCM56841_A3_REV_ID 4 +#define BCM56841_A4_REV_ID 5 +#define BCM56841_B0_REV_ID 0x11 +#define BCM56841_B1_REV_ID 0x12 +#define BCM56843_DEVICE_ID 0xb843 +#define BCM56843_A0_REV_ID 1 +#define BCM56843_A1_REV_ID 2 +#define BCM56843_A2_REV_ID 3 +#define BCM56843_A3_REV_ID 4 +#define BCM56843_A4_REV_ID 5 +#define BCM56843_B0_REV_ID 0x11 +#define BCM56843_B1_REV_ID 0x12 +#define BCM56845_DEVICE_ID 0xb845 +#define BCM56845_A0_REV_ID 1 +#define BCM56845_A1_REV_ID 2 +#define BCM56845_A2_REV_ID 3 +#define BCM56845_A3_REV_ID 4 +#define BCM56845_A4_REV_ID 5 +#define BCM56845_B0_REV_ID 0x11 +#define BCM56845_B1_REV_ID 0x12 + +#define BCM56743_DEVICE_ID 0xb743 +#define BCM56743_A0_REV_ID 1 +#define BCM56743_A1_REV_ID 2 +#define BCM56743_A2_REV_ID 3 +#define BCM56743_A3_REV_ID 4 +#define BCM56743_A4_REV_ID 5 +#define BCM56743_B0_REV_ID 0x11 +#define BCM56743_B1_REV_ID 0x12 +#define BCM56745_DEVICE_ID 0xb745 +#define BCM56745_A0_REV_ID 1 +#define BCM56745_A1_REV_ID 2 +#define BCM56745_A2_REV_ID 3 +#define BCM56745_A3_REV_ID 4 +#define BCM56745_A4_REV_ID 5 +#define BCM56745_B0_REV_ID 0x11 +#define BCM56745_B1_REV_ID 0x12 + +#define BCM56260_DEVICE_ID 0xb260 +#define BCM56260_A0_REV_ID 1 +#define BCM56260_B0_REV_ID 0x11 +#define BCM56261_DEVICE_ID 0xb261 +#define BCM56261_A0_REV_ID 1 +#define BCM56261_B0_REV_ID 0x11 +#define BCM56262_DEVICE_ID 0xb262 +#define BCM56262_A0_REV_ID 1 +#define BCM56262_B0_REV_ID 0x11 +#define BCM56263_DEVICE_ID 0xb263 +#define BCM56263_A0_REV_ID 1 +#define BCM56263_B0_REV_ID 0x11 + +#define BCM56265_DEVICE_ID 0xb265 +#define BCM56265_A0_REV_ID 1 +#define BCM56265_B0_REV_ID 0x11 +#define BCM56266_DEVICE_ID 0xb266 +#define BCM56266_A0_REV_ID 1 +#define BCM56266_B0_REV_ID 0x11 +#define BCM56267_DEVICE_ID 0xb267 +#define BCM56267_A0_REV_ID 1 +#define BCM56267_B0_REV_ID 0x11 +#define BCM56268_DEVICE_ID 0xb268 +#define BCM56268_A0_REV_ID 1 +#define BCM56268_B0_REV_ID 0x11 + +#define BCM56233_DEVICE_ID 0xb233 +#define BCM56233_B0_REV_ID 0x11 + +#define BCM56460_DEVICE_ID 0xb460 +#define BCM56460_A0_REV_ID 1 +#define BCM56460_B0_REV_ID 0x11 +#define BCM56461_DEVICE_ID 0xb461 +#define BCM56461_A0_REV_ID 1 +#define BCM56461_B0_REV_ID 0x11 +#define BCM56462_DEVICE_ID 0xb462 +#define BCM56462_A0_REV_ID 1 +#define BCM56462_B0_REV_ID 0x11 +#define BCM56463_DEVICE_ID 0xb463 +#define BCM56463_A0_REV_ID 1 +#define BCM56463_B0_REV_ID 0x11 + +#define BCM56465_DEVICE_ID 0xb465 +#define BCM56465_A0_REV_ID 1 +#define BCM56465_B0_REV_ID 0x11 +#define BCM56466_DEVICE_ID 0xb466 +#define BCM56466_A0_REV_ID 1 +#define BCM56466_B0_REV_ID 0x11 +#define BCM56467_DEVICE_ID 0xb467 +#define BCM56467_A0_REV_ID 1 +#define BCM56467_B0_REV_ID 0x11 +#define BCM56468_DEVICE_ID 0xb468 +#define BCM56468_A0_REV_ID 1 +#define BCM56468_B0_REV_ID 0x11 + +#define BCM56270_DEVICE_ID 0xb270 +#define BCM56270_A0_REV_ID 1 +#define BCM56271_DEVICE_ID 0xb271 +#define BCM56271_A0_REV_ID 1 +#define BCM56272_DEVICE_ID 0xb272 +#define BCM56272_A0_REV_ID 1 + +#define BCM53460_DEVICE_ID 0x8460 +#define BCM53460_A0_REV_ID 1 +#define BCM53461_DEVICE_ID 0x8461 +#define BCM53461_A0_REV_ID 1 + +#define BCM56842_DEVICE_ID 0xb842 +#define BCM56842_A0_REV_ID 1 +#define BCM56842_A1_REV_ID 2 +#define BCM56844_DEVICE_ID 0xb844 +#define BCM56844_A0_REV_ID 1 +#define BCM56844_A1_REV_ID 2 +#define BCM56846_DEVICE_ID 0xb846 +#define BCM56846_A0_REV_ID 1 +#define BCM56846_A1_REV_ID 2 +#define BCM56549_DEVICE_ID 0xb549 +#define BCM56549_A0_REV_ID 1 +#define BCM56549_A1_REV_ID 2 +#define BCM56053_DEVICE_ID 0xb053 +#define BCM56053_A0_REV_ID 1 +#define BCM56053_A1_REV_ID 2 +#define BCM56831_DEVICE_ID 0xb831 +#define BCM56831_A0_REV_ID 1 +#define BCM56831_A1_REV_ID 2 +#define BCM56835_DEVICE_ID 0xb835 +#define BCM56835_A0_REV_ID 1 +#define BCM56835_A1_REV_ID 2 +#define BCM56838_DEVICE_ID 0xb838 +#define BCM56838_A0_REV_ID 1 +#define BCM56838_A1_REV_ID 2 +#define BCM56847_DEVICE_ID 0xb847 +#define BCM56847_A0_REV_ID 1 +#define BCM56847_A1_REV_ID 2 +#define BCM56847_A2_REV_ID 3 +#define BCM56847_A3_REV_ID 4 +#define BCM56847_A4_REV_ID 5 +#define BCM56847_B0_REV_ID 0x11 +#define BCM56847_B1_REV_ID 0x12 +#define BCM56849_DEVICE_ID 0xb849 +#define BCM56849_A0_REV_ID 1 +#define BCM56849_A1_REV_ID 2 + +#define BCM56742_DEVICE_ID 0xb742 +#define BCM56742_A0_REV_ID 1 +#define BCM56742_A1_REV_ID 2 +#define BCM56742_A2_REV_ID 3 +#define BCM56744_DEVICE_ID 0xb744 +#define BCM56744_A0_REV_ID 1 +#define BCM56744_A1_REV_ID 2 +#define BCM56746_DEVICE_ID 0xb746 +#define BCM56746_A0_REV_ID 1 +#define BCM56746_A1_REV_ID 2 + +#define BCM88230_DEVICE_ID 0x0230 +#define BCM88230_A0_REV_ID 1 +#define BCM88230_B0_REV_ID 0x11 +#define BCM88230_C0_REV_ID 0x21 +#define BCM88231_DEVICE_ID 0x0231 +#define BCM88231_A0_REV_ID 1 +#define BCM88231_B0_REV_ID 0x11 +#define BCM88231_C0_REV_ID 0x21 +#define BCM88235_DEVICE_ID 0x0235 +#define BCM88235_A0_REV_ID 1 +#define BCM88235_B0_REV_ID 0x11 +#define BCM88235_C0_REV_ID 0x21 +#define BCM88236_DEVICE_ID 0x0236 +#define BCM88236_A0_REV_ID 1 +#define BCM88236_B0_REV_ID 0x11 +#define BCM88236_C0_REV_ID 0x21 +#define BCM88239_DEVICE_ID 0x0239 +#define BCM88239_A0_REV_ID 1 +#define BCM88239_B0_REV_ID 0x11 +#define BCM88239_C0_REV_ID 0x21 +#define BCM56613_DEVICE_ID 0xb613 +#define BCM56613_A0_REV_ID 1 +#define BCM56613_B0_REV_ID 0x11 +#define BCM56613_C0_REV_ID 0x21 + +#define BCM88732_DEVICE_ID 0x0732 +#define BCM88732_A0_REV_ID 1 +#define BCM88732_A1_REV_ID 2 +#define BCM88732_A2_REV_ID 4 +#define BCM88732_B0_REV_ID 0x11 +#define BCM88732_B1_REV_ID 0x12 +#define BCM88732_B2_REV_ID 0x13 + +#define BCM56640_DEVICE_ID 0xb640 +#define BCM56640_A0_REV_ID 1 +#define BCM56640_A1_REV_ID 2 +#define BCM56640_B0_REV_ID 0x11 +#define BCM56643_DEVICE_ID 0xb643 +#define BCM56643_A0_REV_ID 1 +#define BCM56643_A1_REV_ID 2 +#define BCM56643_B0_REV_ID 0x11 +#define BCM56644_DEVICE_ID 0xb644 +#define BCM56644_A0_REV_ID 1 +#define BCM56644_A1_REV_ID 2 +#define BCM56644_B0_REV_ID 0x11 +#define BCM56648_DEVICE_ID 0xb648 +#define BCM56648_A0_REV_ID 1 +#define BCM56648_A1_REV_ID 2 +#define BCM56648_B0_REV_ID 0x11 +#define BCM56649_DEVICE_ID 0xb649 +#define BCM56649_A0_REV_ID 1 +#define BCM56649_A1_REV_ID 2 +#define BCM56649_B0_REV_ID 0x11 + +#define BCM56540_DEVICE_ID 0xb540 +#define BCM56540_A0_REV_ID 1 +#define BCM56540_A1_REV_ID 2 +#define BCM56540_B0_REV_ID 0x11 +#define BCM56541_DEVICE_ID 0xb541 +#define BCM56541_A0_REV_ID 1 +#define BCM56541_A1_REV_ID 2 +#define BCM56541_B0_REV_ID 0x11 +#define BCM56542_DEVICE_ID 0xb542 +#define BCM56542_A0_REV_ID 1 +#define BCM56542_A1_REV_ID 2 +#define BCM56542_B0_REV_ID 0x11 +#define BCM56543_DEVICE_ID 0xb543 +#define BCM56543_A0_REV_ID 1 +#define BCM56543_A1_REV_ID 2 +#define BCM56543_B0_REV_ID 0x11 +#define BCM56544_DEVICE_ID 0xb544 +#define BCM56544_A0_REV_ID 1 +#define BCM56544_A1_REV_ID 2 +#define BCM56544_B0_REV_ID 0x11 + +#define BCM56545_DEVICE_ID 0xb545 +#define BCM56545_A0_REV_ID 1 +#define BCM56545_A1_REV_ID 2 +#define BCM56545_B0_REV_ID 0x11 +#define BCM56546_DEVICE_ID 0xb546 +#define BCM56546_A0_REV_ID 1 +#define BCM56546_A1_REV_ID 2 +#define BCM56546_B0_REV_ID 0x11 + +#define BCM56044_DEVICE_ID 0xb044 +#define BCM56044_B0_REV_ID 0x11 +#define BCM56045_DEVICE_ID 0xb045 +#define BCM56045_A0_REV_ID 1 +#define BCM56045_A1_REV_ID 2 +#define BCM56045_B0_REV_ID 0x11 +#define BCM56046_DEVICE_ID 0xb046 +#define BCM56046_A0_REV_ID 1 +#define BCM56046_A1_REV_ID 2 +#define BCM56046_B0_REV_ID 0x11 + + +#define BCM56440_DEVICE_ID 0xb440 +#define BCM56440_A0_REV_ID 1 +#define BCM56440_B0_REV_ID 0x11 +#define BCM56441_DEVICE_ID 0xb441 +#define BCM56441_A0_REV_ID 1 +#define BCM56441_B0_REV_ID 0x11 +#define BCM56442_DEVICE_ID 0xb442 +#define BCM56442_A0_REV_ID 1 +#define BCM56442_B0_REV_ID 0x11 +#define BCM56443_DEVICE_ID 0xb443 +#define BCM56443_A0_REV_ID 1 +#define BCM56443_B0_REV_ID 0x11 +#define BCM56445_DEVICE_ID 0xb445 +#define BCM56445_A0_REV_ID 1 +#define BCM56445_B0_REV_ID 0x11 +#define BCM56446_DEVICE_ID 0xb446 +#define BCM56446_A0_REV_ID 1 +#define BCM56446_B0_REV_ID 0x11 +#define BCM56447_DEVICE_ID 0xb447 +#define BCM56447_A0_REV_ID 1 +#define BCM56447_B0_REV_ID 0x11 +#define BCM56448_DEVICE_ID 0xb448 +#define BCM56448_A0_REV_ID 1 +#define BCM56448_B0_REV_ID 0x11 +#define BCM56449_DEVICE_ID 0xb449 +#define BCM56449_A0_REV_ID 1 +#define BCM56449_B0_REV_ID 0x11 +#define BCM56240_DEVICE_ID 0xb240 +#define BCM56240_A0_REV_ID 1 +#define BCM56240_B0_REV_ID 0x11 +#define BCM56241_DEVICE_ID 0xb241 +#define BCM56241_A0_REV_ID 1 +#define BCM56241_B0_REV_ID 0x11 +#define BCM56242_DEVICE_ID 0xb242 +#define BCM56242_A0_REV_ID 1 +#define BCM56242_B0_REV_ID 0x11 +#define BCM56243_DEVICE_ID 0xb243 +#define BCM56243_A0_REV_ID 1 +#define BCM56243_B0_REV_ID 0x11 +#define BCM56245_DEVICE_ID 0xb245 +#define BCM56245_A0_REV_ID 1 +#define BCM56245_B0_REV_ID 0x11 +#define BCM56246_DEVICE_ID 0xb246 +#define BCM56246_A0_REV_ID 1 +#define BCM56246_B0_REV_ID 0x11 +#define BCM55440_DEVICE_ID 0xa440 +#define BCM55440_A0_REV_ID 1 +#define BCM55440_B0_REV_ID 0x11 +#define BCM55441_DEVICE_ID 0xa441 +#define BCM55441_A0_REV_ID 1 +#define BCM55441_B0_REV_ID 0x11 + +#define BCM55450_DEVICE_ID 0xa450 +#define BCM55450_A0_REV_ID 1 +#define BCM55450_B0_REV_ID 0x11 +#define BCM55450_B1_REV_ID 0x12 + +#define BCM55455_DEVICE_ID 0xa455 +#define BCM55455_A0_REV_ID 1 +#define BCM55455_B0_REV_ID 0x11 +#define BCM55455_B1_REV_ID 0x12 + +#define BCM56248_DEVICE_ID 0xb248 +#define BCM56248_A0_REV_ID 1 +#define BCM56248_B0_REV_ID 0x11 +#define BCM56248_B1_REV_ID 0x12 + +#define BCM56450_DEVICE_ID 0xb450 +#define BCM56450_A0_REV_ID 1 +#define BCM56450_B0_REV_ID 0x11 +#define BCM56450_B1_REV_ID 0x12 + +#define BCM56452_DEVICE_ID 0xb452 +#define BCM56452_A0_REV_ID 1 +#define BCM56452_B0_REV_ID 0x11 +#define BCM56452_B1_REV_ID 0x12 + +#define BCM56454_DEVICE_ID 0xb454 +#define BCM56454_A0_REV_ID 1 +#define BCM56454_B0_REV_ID 0x11 +#define BCM56454_B1_REV_ID 0x12 + +#define BCM56455_DEVICE_ID 0xb455 +#define BCM56455_A0_REV_ID 1 +#define BCM56455_B0_REV_ID 0x11 +#define BCM56455_B1_REV_ID 0x12 + +#define BCM56456_DEVICE_ID 0xb456 +#define BCM56456_A0_REV_ID 1 +#define BCM56456_B0_REV_ID 0x11 +#define BCM56456_B1_REV_ID 0x12 + +#define BCM56457_DEVICE_ID 0xb457 +#define BCM56457_A0_REV_ID 1 +#define BCM56457_B0_REV_ID 0x11 +#define BCM56457_B1_REV_ID 0x12 + +#define BCM56458_DEVICE_ID 0xb458 +#define BCM56458_A0_REV_ID 1 +#define BCM56458_B0_REV_ID 0x11 +#define BCM56458_B1_REV_ID 0x12 + +#define BCM56850_DEVICE_ID 0xb850 +#define BCM56850_A0_REV_ID 1 +#define BCM56850_A1_REV_ID 2 +#define BCM56850_A2_REV_ID 3 +#define BCM56851_DEVICE_ID 0xb851 +#define BCM56851_A0_REV_ID 1 +#define BCM56851_A1_REV_ID 2 +#define BCM56851_A2_REV_ID 3 +#define BCM56852_DEVICE_ID 0xb852 +#define BCM56852_A0_REV_ID 1 +#define BCM56852_A1_REV_ID 2 +#define BCM56852_A2_REV_ID 3 +#define BCM56853_DEVICE_ID 0xb853 +#define BCM56853_A0_REV_ID 1 +#define BCM56853_A1_REV_ID 2 +#define BCM56853_A2_REV_ID 3 +#define BCM56854_DEVICE_ID 0xb854 +#define BCM56854_A0_REV_ID 1 +#define BCM56854_A1_REV_ID 2 +#define BCM56854_A2_REV_ID 3 +#define BCM56855_DEVICE_ID 0xb855 +#define BCM56855_A0_REV_ID 1 +#define BCM56855_A1_REV_ID 2 +#define BCM56855_A2_REV_ID 3 +#define BCM56834_DEVICE_ID 0xb834 +#define BCM56834_A0_REV_ID 1 +#define BCM56834_A1_REV_ID 2 +#define BCM56834_A2_REV_ID 3 + +#define BCM56860_DEVICE_ID 0xb860 +#define BCM56860_A0_REV_ID 1 +#define BCM56860_A1_REV_ID 2 +#define BCM56861_DEVICE_ID 0xb861 +#define BCM56861_A0_REV_ID 1 +#define BCM56861_A1_REV_ID 2 +#define BCM56862_DEVICE_ID 0xb862 +#define BCM56862_A0_REV_ID 1 +#define BCM56862_A1_REV_ID 2 +#define BCM56864_DEVICE_ID 0xb864 +#define BCM56864_A0_REV_ID 1 +#define BCM56864_A1_REV_ID 2 +#define BCM56865_DEVICE_ID 0xb865 +#define BCM56865_A0_REV_ID 1 +#define BCM56865_A1_REV_ID 2 +#define BCM56866_DEVICE_ID 0xb866 +#define BCM56866_A0_REV_ID 1 +#define BCM56866_A1_REV_ID 2 +#define BCM56867_DEVICE_ID 0xb867 +#define BCM56867_A0_REV_ID 1 +#define BCM56867_A1_REV_ID 2 +#define BCM56868_DEVICE_ID 0xb868 +#define BCM56868_A0_REV_ID 1 +#define BCM56868_A1_REV_ID 2 +#define BCM56832_DEVICE_ID 0xb832 +#define BCM56832_A0_REV_ID 1 +#define BCM56832_A1_REV_ID 2 +#define BCM56833_DEVICE_ID 0xb833 +#define BCM56833_A0_REV_ID 1 +#define BCM56833_A1_REV_ID 2 +#define BCM56836_DEVICE_ID 0xb836 +#define BCM56836_A0_REV_ID 1 +#define BCM56836_A1_REV_ID 2 + + +#define BCM56750_DEVICE_ID 0xb750 +#define BCM56750_A0_REV_ID 1 +#define BCM56750_A1_REV_ID 2 +#define BCM56750_A2_REV_ID 3 + +#define BCM56830_DEVICE_ID 0xb830 +#define BCM56830_A0_REV_ID 1 +#define BCM56830_A1_REV_ID 2 +#define BCM56830_A2_REV_ID 3 + +#define BCM56150_DEVICE_ID 0xb150 +#define BCM56150_A0_REV_ID 1 +#define BCM56151_DEVICE_ID 0xb151 +#define BCM56151_A0_REV_ID 1 +#define BCM56152_DEVICE_ID 0xb152 +#define BCM56152_A0_REV_ID 1 + +#define BCM53342_DEVICE_ID 0x8342 +#define BCM53342_A0_REV_ID 1 +#define BCM53343_DEVICE_ID 0x8343 +#define BCM53343_A0_REV_ID 1 +#define BCM53344_DEVICE_ID 0x8344 +#define BCM53344_A0_REV_ID 1 +#define BCM53346_DEVICE_ID 0x8346 +#define BCM53346_A0_REV_ID 1 +#define BCM53347_DEVICE_ID 0x8347 +#define BCM53347_A0_REV_ID 1 + +#define BCM53333_DEVICE_ID 0x8333 +#define BCM53333_A0_REV_ID 1 +#define BCM53334_DEVICE_ID 0x8334 +#define BCM53334_A0_REV_ID 1 + +#define BCM53393_DEVICE_ID 0x8393 +#define BCM53393_A0_REV_ID 1 +#define BCM53394_DEVICE_ID 0x8394 +#define BCM53394_A0_REV_ID 1 + +#define BCM53400_DEVICE_ID 0x8400 +#define BCM53400_A0_REV_ID 1 +#define BCM56060_DEVICE_ID 0xb060 +#define BCM56060_A0_REV_ID 1 +#define BCM56062_DEVICE_ID 0xb062 +#define BCM56062_A0_REV_ID 1 +#define BCM56063_DEVICE_ID 0xb063 +#define BCM56063_A0_REV_ID 1 +#define BCM56064_DEVICE_ID 0xb064 +#define BCM56064_A0_REV_ID 1 +#define BCM56065_DEVICE_ID 0xb065 +#define BCM56065_A0_REV_ID 1 +#define BCM56066_DEVICE_ID 0xb066 +#define BCM56066_A0_REV_ID 1 +#define BCM53401_DEVICE_ID 0x8401 +#define BCM53411_DEVICE_ID 0x8411 +#define BCM53401_A0_REV_ID 1 +#define BCM53402_DEVICE_ID 0x8402 +#define BCM53412_DEVICE_ID 0x8412 +#define BCM53402_A0_REV_ID 1 +#define BCM53403_DEVICE_ID 0x8403 +#define BCM53413_DEVICE_ID 0x8413 +#define BCM53403_A0_REV_ID 1 +#define BCM53404_DEVICE_ID 0x8404 +#define BCM53414_DEVICE_ID 0x8414 +#define BCM53404_A0_REV_ID 1 +#define BCM53405_DEVICE_ID 0x8405 +#define BCM53415_DEVICE_ID 0x8415 +#define BCM53405_A0_REV_ID 1 +#define BCM53406_DEVICE_ID 0x8406 +#define BCM53416_DEVICE_ID 0x8416 +#define BCM53406_A0_REV_ID 1 +#define BCM53408_DEVICE_ID 0x8408 +#define BCM53418_DEVICE_ID 0x8418 +#define BCM53408_A0_REV_ID 1 +#define BCM53365_DEVICE_ID 0x8365 +#define BCM53365_A0_REV_ID 1 +#define BCM53369_DEVICE_ID 0x8369 +#define BCM53369_A0_REV_ID 1 + +#define BCM53454_DEVICE_ID 0x8454 +#define BCM53455_DEVICE_ID 0x8455 +#define BCM53454_A0_REV_ID 1 +#define BCM53456_DEVICE_ID 0x8456 +#define BCM53457_DEVICE_ID 0x8457 +#define BCM53456_A0_REV_ID 1 + +#define BCM53422_DEVICE_ID 0x8422 +#define BCM53422_A0_REV_ID 1 +#define BCM53424_DEVICE_ID 0x8424 +#define BCM53424_A0_REV_ID 1 +#define BCM53426_DEVICE_ID 0x8426 +#define BCM53426_A0_REV_ID 1 + +#define BCM56960_DEVICE_ID 0xb960 +#define BCM56960_A0_REV_ID 1 +#define BCM56960_B0_REV_ID 0x11 +#define BCM56960_B1_REV_ID 0x12 +#define BCM56961_DEVICE_ID 0xb961 +#define BCM56961_A0_REV_ID 1 +#define BCM56961_B0_REV_ID 0x11 +#define BCM56961_B1_REV_ID 0x12 +#define BCM56962_DEVICE_ID 0xb962 +#define BCM56962_A0_REV_ID 1 +#define BCM56962_B0_REV_ID 0x11 +#define BCM56962_B1_REV_ID 0x12 +#define BCM56963_DEVICE_ID 0xb963 +#define BCM56963_A0_REV_ID 1 +#define BCM56963_B0_REV_ID 0x11 +#define BCM56963_B1_REV_ID 0x12 +#define BCM56930_DEVICE_ID 0xb930 +#define BCM56930_A0_REV_ID 1 +#define BCM56930_B0_REV_ID 0x11 +#define BCM56930_B1_REV_ID 0x12 +#define BCM56930_C0_REV_ID 0x21 +#define BCM56931_DEVICE_ID 0xb931 +#define BCM56931_A0_REV_ID 1 +#define BCM56931_B0_REV_ID 0x11 +#define BCM56931_C0_REV_ID 0x21 +#define BCM56935_DEVICE_ID 0xb935 +#define BCM56935_A0_REV_ID 1 +#define BCM56935_B0_REV_ID 0x11 +#define BCM56935_C0_REV_ID 0x21 +#define BCM56936_DEVICE_ID 0xb936 +#define BCM56936_A0_REV_ID 1 +#define BCM56936_B0_REV_ID 0x11 +#define BCM56936_C0_REV_ID 0x21 +#define BCM56939_DEVICE_ID 0xb939 +#define BCM56939_A0_REV_ID 1 +#define BCM56939_B0_REV_ID 0x11 +#define BCM56939_C0_REV_ID 0x21 + +#define BCM56168_DEVICE_ID 0xb168 +#define BCM56168_A0_REV_ID 1 +#define BCM56168_B0_REV_ID 0x11 +#define BCM56168_B1_REV_ID 0x12 +#define BCM56169_DEVICE_ID 0xb169 +#define BCM56169_A0_REV_ID 1 +#define BCM56169_B0_REV_ID 0x11 +#define BCM56169_B1_REV_ID 0x12 + +#define BCM56980_DEVICE_ID 0xb980 +#define BCM56980_A0_REV_ID 1 +#define BCM56980_B0_REV_ID 0x11 +#define BCM56981_DEVICE_ID 0xb981 +#define BCM56981_A0_REV_ID 1 +#define BCM56982_DEVICE_ID 0xb982 +#define BCM56982_A0_REV_ID 1 +#define BCM56983_DEVICE_ID 0xb983 +#define BCM56983_A0_REV_ID 1 +#define BCM56984_DEVICE_ID 0xb984 +#define BCM56984_A0_REV_ID 1 + +#define BCM56968_DEVICE_ID 0xb968 +#define BCM56968_A0_REV_ID 1 +#define BCM56968_B0_REV_ID 0x11 +#define BCM56968_B1_REV_ID 0x12 + +#define BCM56160_DEVICE_ID 0xb160 +#define BCM56160_A0_REV_ID 1 +#define BCM56160_B0_REV_ID 0x11 +#define BCM56162_DEVICE_ID 0xb162 +#define BCM56162_A0_REV_ID 1 +#define BCM56162_B0_REV_ID 0x11 + +#define BCM56163_DEVICE_ID 0xb163 +#define BCM56163_A0_REV_ID 1 +#define BCM56163_B0_REV_ID 0x11 +#define BCM56164_DEVICE_ID 0xb164 +#define BCM56164_A0_REV_ID 1 +#define BCM56164_B0_REV_ID 0x11 +#define BCM56166_DEVICE_ID 0xb166 +#define BCM56166_A0_REV_ID 1 +#define BCM56166_B0_REV_ID 0x11 + +#define BCM53440_DEVICE_ID 0x8440 +#define BCM53440_A0_REV_ID 1 +#define BCM53440_B0_REV_ID 0x11 +#define BCM53442_DEVICE_ID 0x8442 +#define BCM53442_A0_REV_ID 1 +#define BCM53442_B0_REV_ID 0x11 +#define BCM53443_DEVICE_ID 0x8443 +#define BCM53443_A0_REV_ID 1 +#define BCM53443_B0_REV_ID 0x11 + +#define BCM53434_DEVICE_ID 0x8434 +#define BCM53434_A0_REV_ID 1 +#define BCM53434_B0_REV_ID 0x11 + +#define BCM56560_DEVICE_ID 0xb560 +#define BCM56560_A0_REV_ID 1 +#define BCM56560_B0_REV_ID 0x11 + +#define BCM56561_DEVICE_ID 0xb561 +#define BCM56561_A0_REV_ID 1 +#define BCM56561_B0_REV_ID 0x11 + +#define BCM56562_DEVICE_ID 0xb562 +#define BCM56562_A0_REV_ID 1 +#define BCM56562_B0_REV_ID 0x11 + +#define BCM56670_DEVICE_ID 0xb670 +#define BCM56670_A0_REV_ID 1 +#define BCM56670_B0_REV_ID 0x11 + +#define BCM56671_DEVICE_ID 0xb671 +#define BCM56671_A0_REV_ID 1 +#define BCM56671_B0_REV_ID 0x11 + +#define BCM56672_DEVICE_ID 0xb672 +#define BCM56672_A0_REV_ID 1 +#define BCM56672_B0_REV_ID 0x11 + +#define BCM56675_DEVICE_ID 0xb675 +#define BCM56675_A0_REV_ID 1 +#define BCM56675_B0_REV_ID 0x11 + + +#define BCM56565_DEVICE_ID 0xb565 +#define BCM56565_A0_REV_ID 1 +#define BCM56565_B0_REV_ID 0x11 + +#define BCM56566_DEVICE_ID 0xb566 +#define BCM56566_A0_REV_ID 1 +#define BCM56566_B0_REV_ID 0x11 + +#define BCM56567_DEVICE_ID 0xb567 +#define BCM56567_A0_REV_ID 1 +#define BCM56567_B0_REV_ID 0x11 + +#define BCM56568_DEVICE_ID 0xb568 +#define BCM56568_A0_REV_ID 1 +#define BCM56568_B0_REV_ID 0x11 + +#define BCM56760_DEVICE_ID 0xb760 +#define BCM56760_A0_REV_ID 1 +#define BCM56760_A1_REV_ID 2 +#define BCM56760_B0_REV_ID 0x11 + +#define BCM56761_DEVICE_ID 0xb761 +#define BCM56761_A0_REV_ID 1 +#define BCM56761_B0_REV_ID 0x11 + +#define BCM56761_DEVICE_ID 0xb761 +#define BCM56761_A0_REV_ID 1 +#define BCM56761_A1_REV_ID 2 +#define BCM56761_B0_REV_ID 0x11 +#define BCM56761_B1_REV_ID 0x12 + +#define BCM56762_DEVICE_ID 0xb762 +#define BCM56762_A0_REV_ID 1 +#define BCM56762_B0_REV_ID 0x11 + +#define BCM56764_DEVICE_ID 0xb764 +#define BCM56764_A0_REV_ID 1 +#define BCM56764_B0_REV_ID 0x11 + +#define BCM56765_DEVICE_ID 0xb765 +#define BCM56765_A0_REV_ID 1 +#define BCM56765_B0_REV_ID 0x11 + +#define BCM56766_DEVICE_ID 0xb766 +#define BCM56766_A0_REV_ID 1 +#define BCM56766_B0_REV_ID 0x11 + +#define BCM56768_DEVICE_ID 0xb768 +#define BCM56768_A0_REV_ID 1 +#define BCM56768_B0_REV_ID 0x11 + +#define BCM56068_DEVICE_ID 0xb068 +#define BCM56068_A0_REV_ID 1 +#define BCM56068_B0_REV_ID 0x11 + +#define BCM56068_DEVICE_ID 0xb068 +#define BCM56068_A0_REV_ID 1 +#define BCM56068_B0_REV_ID 0x11 +#define BCM56068_B1_REV_ID 0x12 + +#define BCM56069_DEVICE_ID 0xb069 +#define BCM56069_A0_REV_ID 1 +#define BCM56069_B0_REV_ID 0x11 + +#define BCM56170_DEVICE_ID 0xb170 +#define BCM56170_A0_REV_ID 1 +#define BCM56170_B0_REV_ID 0x11 +#define BCM56172_DEVICE_ID 0xb172 +#define BCM56172_A0_REV_ID 1 +#define BCM56172_B0_REV_ID 0x11 +#define BCM56174_DEVICE_ID 0xb174 +#define BCM56174_A0_REV_ID 1 +#define BCM56174_B0_REV_ID 0x11 + +#define BCM53570_DEVICE_ID 0x8570 +#define BCM53570_A0_REV_ID 1 +#define BCM53570_B0_REV_ID 0x11 +#define BCM53575_DEVICE_ID 0x8575 +#define BCM53575_A0_REV_ID 1 +#define BCM53575_B0_REV_ID 0x11 + + +#define BCM56965_DEVICE_ID 0xb965 +#define BCM56965_A0_REV_ID 1 +#define BCM56965_A1_REV_ID 2 +#define BCM56969_DEVICE_ID 0xb969 +#define BCM56969_A0_REV_ID 1 +#define BCM56966_DEVICE_ID 0xb966 +#define BCM56966_A0_REV_ID 1 +#define BCM56967_DEVICE_ID 0xb967 +#define BCM56967_A0_REV_ID 1 + +#define BCM56970_DEVICE_ID 0xb970 +#define BCM56970_A0_REV_ID 1 +#define BCM56970_B0_REV_ID 0x11 +#define BCM56971_DEVICE_ID 0xb971 +#define BCM56971_A0_REV_ID 1 +#define BCM56971_B0_REV_ID 0x11 +#define BCM56972_DEVICE_ID 0xb972 +#define BCM56972_A0_REV_ID 1 +#define BCM56972_B0_REV_ID 0x11 +#define BCM56974_DEVICE_ID 0xb974 +#define BCM56974_A0_REV_ID 1 +#define BCM56974_B0_REV_ID 0x11 +#define BCM56975_DEVICE_ID 0xb975 +#define BCM56975_A0_REV_ID 1 +#define BCM56975_B0_REV_ID 0x11 + +#define BCM56870_DEVICE_ID 0xb870 +#define BCM56870_A0_REV_ID 1 +#define BCM56873_DEVICE_ID 0xb873 +#define BCM56873_A0_REV_ID 1 + +#define BCM56370_DEVICE_ID 0xb370 +#define BCM56370_A0_REV_ID 1 + +#define BCM56371_DEVICE_ID 0xb371 +#define BCM56371_A0_REV_ID 1 + +#define BCM56372_DEVICE_ID 0xb372 +#define BCM56372_A0_REV_ID 1 + +#define BCM56374_DEVICE_ID 0xb374 +#define BCM56374_A0_REV_ID 1 + +#define BCM56375_DEVICE_ID 0xb375 +#define BCM56375_A0_REV_ID 1 + +#define BCM56376_DEVICE_ID 0xb376 +#define BCM56376_A0_REV_ID 1 + +#define BCM56377_DEVICE_ID 0xb377 +#define BCM56377_A0_REV_ID 1 + +#define BCM56577_DEVICE_ID 0xb577 +#define BCM56577_A0_REV_ID 1 + +#define BCM56578_DEVICE_ID 0xb578 +#define BCM56578_A0_REV_ID 1 + +#define BCM56579_DEVICE_ID 0xb579 +#define BCM56579_A0_REV_ID 1 + +#define BCM56770_DEVICE_ID 0xb770 +#define BCM56770_A0_REV_ID 1 + +#define BCM56771_DEVICE_ID 0xb771 +#define BCM56771_A0_REV_ID 1 + +#define BCM53540_DEVICE_ID 0x8540 +#define BCM53540_A0_REV_ID 1 +#define BCM53547_DEVICE_ID 0x8547 +#define BCM53547_A0_REV_ID 1 +#define BCM53548_DEVICE_ID 0x8548 +#define BCM53548_A0_REV_ID 1 +#define BCM53549_DEVICE_ID 0x8549 +#define BCM53549_A0_REV_ID 1 + +#define BCM5665_DEVICE_ID 0x5665 +#define BCM5665_A0_REV_ID 1 +#define BCM5665_B0_REV_ID 0x11 + + +#define BCM5655_DEVICE_ID 0x5655 +#define BCM5655_A0_REV_ID 1 +#define BCM5655_B0_REV_ID 0x11 + + +#define BCM5650_DEVICE_ID 0x5650 +#define BCM5650_A0_REV_ID 1 +#define BCM5650_B0_REV_ID 0x11 +#define BCM5650_C0_REV_ID 0x21 + +#define BROADCOM_PHYID_HIGH 0x0040 + +#define BCM5338_PHYID_LOW 0x62b0 +#define BCM5338_A0_REV_ID 0 +#define BCM5338_A1_REV_ID 1 +#define BCM5338_B0_REV_ID 3 + +#define BCM5324_PHYID_LOW 0xbc20 +#define BCM5324_PHYID_HIGH 0x143 +#define BCM5324_A1_PHYID_HIGH 0x153 +#define BCM5324_DEVICE_ID 0xbc20 +#define BCM5324_A0_REV_ID 0 +#define BCM5324_A1_REV_ID 1 +#define BCM5324_A2_REV_ID 2 + +#define BCM5380_PHYID_LOW 0x6250 +#define BCM5380_A0_REV_ID 0 + +#define BCM5388_PHYID_LOW 0x6288 +#define BCM5388_A0_REV_ID 0 + +#define BCM5396_PHYID_LOW 0xbd70 +#define BCM5396_PHYID_HIGH 0x143 +#define BCM5396_DEVICE_ID 0x96 +#define BCM5396_A0_REV_ID 0 + +#define BCM5389_PHYID_LOW 0xbd70 +#define BCM5389_PHYID_HIGH 0x143 +#define BCM5389_DEVICE_ID 0x89 +#define BCM5389_A0_REV_ID 0 +#define BCM5389_A1_DEVICE_ID 0x86 +#define BCM5389_A1_REV_ID 1 + +#define BCM5398_PHYID_LOW 0xbcd0 +#define BCM5398_PHYID_HIGH 0x0143 +#define BCM5398_DEVICE_ID 0x98 +#define BCM5398_A0_REV_ID 0 + +#define BCM5325_PHYID_LOW 0xbc30 +#define BCM5325_PHYID_HIGH 0x143 +#define BCM5325_DEVICE_ID 0xbc30 +#define BCM5325_A0_REV_ID 0 +#define BCM5325_A1_REV_ID 1 + +#define BCM5348_PHYID_LOW 0xbe40 +#define BCM5348_PHYID_HIGH 0x0143 +#define BCM5348_DEVICE_ID 0x48 +#define BCM5348_A0_REV_ID 0 +#define BCM5348_A1_REV_ID 1 + +#define BCM5397_PHYID_LOW 0xbcd0 +#define BCM5397_PHYID_HIGH 0x0143 +#define BCM5397_DEVICE_ID 0x97 +#define BCM5397_A0_REV_ID 0 + +#define BCM5347_PHYID_LOW 0xbe40 +#define BCM5347_PHYID_HIGH 0x0143 +#define BCM5347_DEVICE_ID 0x47 +#define BCM5347_A0_REV_ID 0 + +#define BCM5395_PHYID_LOW 0xbcf0 +#define BCM5395_PHYID_HIGH 0x0143 +#define BCM5395_DEVICE_ID 0xbcf0 +#define BCM5395_A0_REV_ID 0 + +#define BCM53242_PHYID_LOW 0xbf10 +#define BCM53242_PHYID_HIGH 0x0143 +#define BCM53242_DEVICE_ID 0xbf10 +#define BCM53242_A0_REV_ID 0 +#define BCM53242_B0_REV_ID 4 +#define BCM53242_B1_REV_ID 5 + +#define BCM53262_PHYID_LOW 0xbf20 +#define BCM53262_PHYID_HIGH 0x0143 +#define BCM53262_DEVICE_ID 0xbf20 +#define BCM53262_A0_REV_ID 0 +#define BCM53262_B0_REV_ID 4 +#define BCM53262_B1_REV_ID 5 + +#define BCM53115_PHYID_LOW 0xbf80 +#define BCM53115_PHYID_HIGH 0x0143 +#define BCM53115_DEVICE_ID 0xbf80 +#define BCM53115_A0_REV_ID 0 +#define BCM53115_A1_REV_ID 1 +#define BCM53115_B0_REV_ID 2 +#define BCM53115_B1_REV_ID 3 +#define BCM53115_C0_REV_ID 8 + +#define BCM53118_PHYID_LOW 0xbfe0 +#define BCM53118_PHYID_HIGH 0x0143 +#define BCM53118_DEVICE_ID 0xbfe0 +#define BCM53118_A0_REV_ID 0 + +#define BCM53118_B0_REV_ID 4 +#define BCM53118_B1_REV_ID 5 + +#define BCM53280_PHYID_LOW 0x5e90 +#define BCM53280_PHYID_HIGH 0x0362 +#define BCM53280_DEVICE_ID (0x4 | BCM53280_PHYID_LOW) +#define BCM53280_A0_REV_ID 0 +#define BCM53280_B0_REV_ID 0x4 +#define BCM53280_B1_REV_ID 0x5 +#define BCM53280_B2_REV_ID 0x6 +#define BCM53286_DEVICE_ID (0x4 | BCM53280_PHYID_LOW) +#define BCM53288_DEVICE_ID (0xc | BCM53280_PHYID_LOW) +#define BCM53284_DEVICE_ID (0x7 | BCM53280_PHYID_LOW) +#define BCM53283_DEVICE_ID (0x6 | BCM53280_PHYID_LOW) +#define BCM53282_DEVICE_ID (0x5 | BCM53280_PHYID_LOW) +#define BCM53101_PHYID_LOW 0x5ed0 +#define BCM53101_PHYID_HIGH 0x0362 +#define BCM53101_DEVICE_ID 0x5ed0 +#define BCM53101_A0_REV_ID 0 +#define BCM53101_B0_REV_ID 4 + +#define BCM53125_PHYID_LOW 0x5f20 +#define BCM53125_PHYID_HIGH 0x0362 +#define BCM53125_DEVICE_ID 0x5f20 +#define BCM53125_A0_REV_ID 0 +#define BCM53125_B0_REV_ID 0x4 +#define BCM53125_MODEL_ID 0x53125 + +#define BCM53134_PHYID_LOW 0x5350 +#define BCM53134_PHYID_HIGH 0xAE02 +#define BCM53134_DEVICE_ID 0x5350 +#define BCM53134_A0_REV_ID 0x0 +#define BCM53134_B0_REV_ID 0x1 +#define BCM53134_B1_REV_ID 0x2 +#define BCM53134_A0_MODEL_ID 0x5035 +#define BCM53134_B0_MODEL_ID 0x5075 + +#define BCM53128_PHYID_LOW 0x5e10 +#define BCM53128_PHYID_HIGH 0x0362 +#define BCM53128_DEVICE_ID 0x5e10 +#define BCM53128_A0_REV_ID 0 +#define BCM53128_B0_REV_ID 0x4 +#define BCM53128_MODEL_ID 0x53128 + +#define BCM53600_PHYID_LOW 0x5f40 +#define BCM53600_PHYID_HIGH 0x0362 +#define BCM53600_DEVICE_ID (0x3 | BCM53600_PHYID_LOW) +#define BCM53600_A0_REV_ID 0 +#define BCM53602_DEVICE_ID (0x1 | BCM53600_PHYID_LOW) +#define BCM53603_DEVICE_ID (0x2 | BCM53600_PHYID_LOW) +#define BCM53604_DEVICE_ID (0x3 | BCM53600_PHYID_LOW) +#define BCM53606_DEVICE_ID (0x7 | BCM53600_PHYID_LOW) + +#define BCM89500_PHYID_LOW 0x5d30 +#define BCM89500_PHYID_HIGH 0x0362 +#define BCM89500_DEVICE_ID 0x9500 +#define BCM89501_DEVICE_ID 0x9501 +#define BCM89200_DEVICE_ID 0x9200 +#define BCM89500_A0_REV_ID 0 +#define BCM89500_B0_REV_ID 0x4 +#define BCM89500_MODEL_ID 0x89500 + +#define BCM53010_PHYID_LOW 0x8760 +#define BCM53010_PHYID_HIGH 0x600d +#define BCM53010_DEVICE_ID 0x3010 +#define BCM53011_DEVICE_ID 0x3011 +#define BCM53012_DEVICE_ID 0x3012 +#define BCM53010_A0_REV_ID 0 +#define BCM53010_A2_REV_ID 0x2 +#define BCM53010_MODEL_ID 0x53010 + +#define BCM53018_PHYID_LOW 0x87c0 +#define BCM53018_PHYID_HIGH 0x600d +#define BCM53017_DEVICE_ID 0x3016 +#define BCM53018_DEVICE_ID 0x3018 +#define BCM53019_DEVICE_ID 0x3019 +#define BCM53018_A0_REV_ID 0 +#define BCM53018_MODEL_ID 0x53016 + +#define BCM53020_PHYID_LOW 0x87f0 +#define BCM53020_PHYID_HIGH 0x600d +#define BCM53020_DEVICE_ID 0x8022 +#define BCM53022_DEVICE_ID 0x8022 +#define BCM53023_DEVICE_ID 0x8023 +#define BCM53025_DEVICE_ID 0x8025 +#define BCM58625_DEVICE_ID 0x8625 +#define BCM58622_DEVICE_ID 0x8622 +#define BCM58623_DEVICE_ID 0x8623 +#define BCM58525_DEVICE_ID 0x8525 +#define BCM58522_DEVICE_ID 0x8522 +#define BCM53020_A0_REV_ID 0 +#define BCM53020_MODEL_ID 0x3025 + +#define BCM4713_DEVICE_ID 0x4713 +#define BCM4713_A0_REV_ID 0 +#define BCM4713_A9_REV_ID 9 + +#define BCM53000_GMAC_DEVICE_ID 0x4715 +#define BCM53000_A0_REV_ID 0 + +#define BCM53010_GMAC_DEVICE_ID 0x4715 + +#define BCM53000PCIE_DEVICE_ID 0x5300 + +#define SANDBURST_VENDOR_ID 0x17ba +#define BME3200_DEVICE_ID 0x0280 +#define BME3200_A0_REV_ID 0x0000 +#define BME3200_B0_REV_ID 0x0001 +#define BM9600_DEVICE_ID 0x0480 +#define BM9600_A0_REV_ID 0x0000 +#define BM9600_B0_REV_ID 0x0010 +#define QE2000_DEVICE_ID 0x0300 +#define QE2000_A1_REV_ID 0x0001 +#define QE2000_A2_REV_ID 0x0002 +#define QE2000_A3_REV_ID 0x0003 +#define QE2000_A4_REV_ID 0x0004 +#define BCM88020_DEVICE_ID 0x0380 +#define BCM88020_A0_REV_ID 0x0000 +#define BCM88020_A1_REV_ID 0x0001 +#define BCM88020_A2_REV_ID 0x0002 +#define BCM88025_DEVICE_ID 0x0580 +#define BCM88025_A0_REV_ID 0x0000 +#define BCM88030_DEVICE_ID 0x0038 +#define BCM88030_A0_REV_ID 0x0001 +#define BCM88030_A1_REV_ID 0x0002 +#define BCM88030_B0_REV_ID 0x0011 +#define BCM88030_B1_REV_ID 0x0012 +#define BCM88034_DEVICE_ID 0x0034 +#define BCM88034_A0_REV_ID (BCM88030_A0_REV_ID) +#define BCM88034_A1_REV_ID (BCM88030_A1_REV_ID) +#define BCM88034_B0_REV_ID (BCM88030_B0_REV_ID) +#define BCM88034_B1_REV_ID (BCM88030_B1_REV_ID) +#define BCM88039_DEVICE_ID 0x0039 +#define BCM88039_A0_REV_ID (BCM88030_A0_REV_ID) +#define BCM88039_A1_REV_ID (BCM88030_A1_REV_ID) +#define BCM88039_B0_REV_ID (BCM88030_B0_REV_ID) +#define BCM88039_B1_REV_ID (BCM88030_B1_REV_ID) +#define BCM88130_DEVICE_ID 0x0480 +#define BCM88130_A0_REV_ID 0x0000 +#define BCM88130_A1_REV_ID 0x0001 +#define BCM88130_B0_REV_ID 0x0010 +#define PLX_VENDOR_ID 0x10b5 +#define PLX9656_DEVICE_ID 0x9656 +#define PLX9656_REV_ID 0x0000 +#define PLX9056_DEVICE_ID 0x9056 +#define PLX9056_REV_ID 0x0000 + +#define TK371X_DEVICE_ID 0x8600 +#define TK371X_A0_REV_ID 0x0 + +#define GEDI_DEVICE_ID 0xa100 +#define GEDI_REV_ID 0x0001 +#define ARAD_DEVICE_ID 0x8650 +#define ARAD_A0_REV_ID 0x0000 +#define ARAD_B0_REV_ID 0x0011 +#define ARAD_B1_REV_ID 0x0012 +#define BCM88650_DEVICE_ID ARAD_DEVICE_ID +#define BCM88650_A0_REV_ID ARAD_A0_REV_ID +#define BCM88650_B0_REV_ID ARAD_B0_REV_ID +#define BCM88650_B1_REV_ID ARAD_B1_REV_ID +#define BCM88750_DEVICE_ID 0x8750 +#define BCM88750_A0_REV_ID 0x0000 +#define BCM88750_B0_REV_ID 0x0011 +#define BCM88753_DEVICE_ID 0x8753 +#define BCM88753_A0_REV_ID 0x0000 +#define BCM88753_B0_REV_ID 0x0011 +#define BCM88754_DEVICE_ID 0x8754 +#define BCM88754_A0_REV_ID 0x0000 +#define BCM88754_ORIGINAL_VENDOR_ID 0x16FC +#define BCM88754_ORIGINAL_DEVICE_ID 0x020F +#define BCM88754_A0_ORIGINAL_REV_ID 0x0001 +#define BCM88755_DEVICE_ID 0x8755 +#define BCM88755_B0_REV_ID 0x0011 +#define BCM88770_DEVICE_ID 0x8770 +#define BCM88770_A1_REV_ID 0x0002 +#define BCM88773_DEVICE_ID 0x8773 +#define BCM88773_A1_REV_ID 0x0002 +#define BCM88774_DEVICE_ID 0x8774 +#define BCM88774_A1_REV_ID 0x0002 +#define BCM88775_DEVICE_ID 0x8775 +#define BCM88775_A1_REV_ID 0x0002 +#define BCM88776_DEVICE_ID 0x8776 +#define BCM88776_A1_REV_ID 0x0002 +#define BCM88777_DEVICE_ID 0x8777 +#define BCM88777_A1_REV_ID 0x0002 +#define BCM88950_DEVICE_ID 0x8950 +#define BCM88950_A0_REV_ID 0x0001 +#define BCM88950_A1_REV_ID 0x0002 +#define BCM88953_DEVICE_ID 0x8953 +#define BCM88953_A1_REV_ID 0x0002 +#define BCM88954_DEVICE_ID 0x8954 +#define BCM88954_A1_REV_ID 0x0002 +#define BCM88955_DEVICE_ID 0x8955 +#define BCM88955_A1_REV_ID 0x0002 +#define BCM88956_DEVICE_ID 0x8956 +#define BCM88956_A1_REV_ID 0x0002 +#define DNXC_A0_REV_ID 0x0001 +#define DNXC_A1_REV_ID 0x0002 +#define DNXC_B0_REV_ID 0x0011 +#define BCM88790_DEVICE_ID 0x8790 +#define BCM88790_A0_REV_ID DNXC_A0_REV_ID +#define BCM88790_B0_REV_ID DNXC_B0_REV_ID +#define BCM88791_DEVICE_ID 0x8791 +#define BCM88792_DEVICE_ID 0x8792 +#define BCM88793_DEVICE_ID 0x8793 +#define BCM88794_DEVICE_ID 0x8794 +#define BCM88795_DEVICE_ID 0x8795 +#define BCM88796_DEVICE_ID 0x8796 +#define BCM88797_DEVICE_ID 0x8797 +#define BCM88798_DEVICE_ID 0x8798 +#define BCM88799_DEVICE_ID 0x8799 +#define BCM8879A_DEVICE_ID 0x879A +#define BCM8879B_DEVICE_ID 0x879B +#define BCM8879C_DEVICE_ID 0x879C +#define BCM8879D_DEVICE_ID 0x879D +#define BCM8879E_DEVICE_ID 0x879E +#define BCM8879F_DEVICE_ID 0x879F +#define BCM_DNXF_DEVID_MASK 0xFFF0 +#define ARADPLUS_DEVICE_ID 0x8660 +#define ARADPLUS_A0_REV_ID 0x0001 +#define BCM88660_DEVICE_ID ARADPLUS_DEVICE_ID +#define BCM88660_A0_REV_ID ARADPLUS_A0_REV_ID +#define JERICHO_DEVICE_ID 0x8675 +#define JERICHO_A0_REV_ID 0x0001 +#define JERICHO_B0_REV_ID 0x0011 +#define JERICHO_A1_REV_ID 0x0002 +#define BCM88670_DEVICE_ID 0x8670 +#define BCM88670_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88670_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88671_DEVICE_ID 0x8671 +#define BCM88671_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88671_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88671M_DEVICE_ID 0x867A +#define BCM88671M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88671M_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88670_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88671_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88671M_B0_REV_ID JERICHO_B0_REV_ID + +#define BCM88672_DEVICE_ID 0x8672 +#define BCM88672_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88672_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88672_B0_REV_ID JERICHO_B0_REV_ID + +#define BCM88673_DEVICE_ID 0x8673 +#define BCM88673_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88673_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88674_DEVICE_ID 0x8674 +#define BCM88674_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88674_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88675_DEVICE_ID JERICHO_DEVICE_ID +#define BCM88675_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88675_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88675M_DEVICE_ID 0x867B +#define BCM88675M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88675M_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88676_DEVICE_ID 0x8676 +#define BCM88676_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88676_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88676M_DEVICE_ID 0x867C +#define BCM88676M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88676M_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88677_DEVICE_ID 0x8677 +#define BCM88677_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88677_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88678_DEVICE_ID 0x8678 +#define BCM88678_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88678_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88679_DEVICE_ID 0x8679 +#define BCM88679_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88679_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88673_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88674_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88675_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88675M_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88676_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88676M_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88677_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88678_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88679_B0_REV_ID JERICHO_B0_REV_ID +#define QMX_DEVICE_ID 0x8375 +#define QMX_A0_REV_ID 0x0001 +#define QMX_B0_REV_ID 0x0011 +#define QMX_A1_REV_ID 0x0002 +#define BCM88370_DEVICE_ID 0x8370 +#define BCM88370_A0_REV_ID QMX_A0_REV_ID +#define BCM88370_A1_REV_ID QMX_A1_REV_ID +#define BCM88371_DEVICE_ID 0x8371 +#define BCM88371_A0_REV_ID QMX_A0_REV_ID +#define BCM88371_A1_REV_ID QMX_A1_REV_ID +#define BCM88371M_DEVICE_ID 0x837A +#define BCM88371M_A0_REV_ID QMX_A0_REV_ID +#define BCM88371M_A1_REV_ID QMX_A1_REV_ID +#define BCM88375_DEVICE_ID QMX_DEVICE_ID +#define BCM88375_A0_REV_ID QMX_A0_REV_ID +#define BCM88375_A1_REV_ID QMX_A1_REV_ID +#define BCM88376_DEVICE_ID 0x8376 +#define BCM88376_A0_REV_ID QMX_A0_REV_ID +#define BCM88376_A1_REV_ID QMX_A1_REV_ID +#define BCM88376M_DEVICE_ID 0x837B +#define BCM88376M_A0_REV_ID QMX_A0_REV_ID +#define BCM88376M_A1_REV_ID QMX_A1_REV_ID +#define BCM88377_DEVICE_ID 0x8377 +#define BCM88377_A0_REV_ID QMX_A0_REV_ID +#define BCM88377_A1_REV_ID QMX_A1_REV_ID +#define BCM88378_DEVICE_ID 0x8378 +#define BCM88378_A0_REV_ID QMX_A0_REV_ID +#define BCM88378_A1_REV_ID QMX_A1_REV_ID +#define BCM88379_DEVICE_ID 0x8379 +#define BCM88379_A0_REV_ID QMX_A0_REV_ID +#define BCM88379_A1_REV_ID QMX_A1_REV_ID + +#define BCM88370_B0_REV_ID QMX_B0_REV_ID +#define BCM88371_B0_REV_ID QMX_B0_REV_ID +#define BCM88371M_B0_REV_ID QMX_B0_REV_ID +#define BCM88375_B0_REV_ID QMX_B0_REV_ID +#define BCM88376_B0_REV_ID QMX_B0_REV_ID +#define BCM88376M_B0_REV_ID QMX_B0_REV_ID +#define BCM88377_B0_REV_ID QMX_B0_REV_ID +#define BCM88378_B0_REV_ID QMX_B0_REV_ID +#define BCM88379_B0_REV_ID QMX_B0_REV_ID + + +#define JERICHO_PLUS_DEVICE_ID 0x8680 +#define JERICHO_PLUS_A0_REV_ID 0x0001 +#define BCM88680_DEVICE_ID JERICHO_PLUS_DEVICE_ID +#define BCM88680_A0_REV_ID JERICHO_PLUS_A0_REV_ID +#define BCM88680_A1_REV_ID 0x0002 + + +#define BCM88681_DEVICE_ID 0x8681 +#define BCM88681_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88682_DEVICE_ID 0x8682 +#define BCM88682_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88683_DEVICE_ID 0x8683 +#define BCM88683_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88684_DEVICE_ID 0x8684 +#define BCM88684_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88685_DEVICE_ID 0x8685 +#define BCM88685_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88380_DEVICE_ID 0x8380 +#define BCM88380_A0_REV_ID JERICHO_PLUS_A0_REV_ID +#define BCM88381_DEVICE_ID 0x8381 +#define BCM88381_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define JERICHO_2_DEVICE_ID 0x8690 +#define JERICHO_2_A0_REV_ID 0x0001 +#define BCM88690_DEVICE_ID JERICHO_2_DEVICE_ID +#define BCM88690_A0_REV_ID JERICHO_2_A0_REV_ID + +#define QAX_DEVICE_ID 0x8470 +#define QAX_A0_REV_ID 0x0001 +#define QAX_B0_REV_ID 0x0011 +#define BCM88470_DEVICE_ID QAX_DEVICE_ID +#define BCM88470_B0_REV_ID QAX_B0_REV_ID +#define BCM88470P_DEVICE_ID 0x847C +#define BCM88471_DEVICE_ID 0x8471 +#define BCM88473_DEVICE_ID 0x8473 +#define BCM88474_DEVICE_ID 0x8474 +#define BCM88474H_DEVICE_ID 0x847B +#define BCM88476_DEVICE_ID 0x8476 +#define BCM88477_DEVICE_ID 0x8477 + + + + +#define BCM88470_A0_REV_ID QAX_A0_REV_ID + +#define QUX_DEVICE_ID 0x8270 +#define QUX_A0_REV_ID 0x0001 +#define QUX_A1_REV_ID 0x0002 +#define QUX_B0_REV_ID 0x0011 +#define BCM88270_DEVICE_ID QUX_DEVICE_ID +#define BCM88270_A0_REV_ID QUX_A0_REV_ID +#define BCM88270_A1_REV_ID QUX_A1_REV_ID +#define BCM88272_DEVICE_ID 0x8272 +#define BCM88273_DEVICE_ID 0x8273 +#define BCM88278_DEVICE_ID 0x8278 +#define BCM88279_DEVICE_ID 0x8279 + +#define FLAIR_DEVICE_ID 0xF000 +#define FLAIR_A0_REV_ID 0x0001 +#define BCM8206_DEVICE_ID FLAIR_DEVICE_ID +#define BCM8206_A0_REV_ID FLAIR_A0_REV_ID + +#define ARDON_DEVICE_ID 0x8202 +#define ARDON_A0_REV_ID 0x0000 +#define BCM88202_DEVICE_ID ARDON_DEVICE_ID +#define BCM88202_A0_REV_ID ARDON_A0_REV_ID +#define ARDON_A1_REV_ID 0x0001 +#define BCM88202_A1_REV_ID ARDON_A1_REV_ID +#define ARDON_A2_REV_ID 0x0002 +#define BCM88202_A2_REV_ID ARDON_A2_REV_ID +#define BCM2801PM_DEVICE_ID 0x2801 +#define BCM2801PM_A0_REV_ID 0x0000 +#define BCM88360_DEVICE_ID 0x8360 +#define BCM88360_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88361_DEVICE_ID 0x8361 +#define BCM88361_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88363_DEVICE_ID 0x8363 +#define BCM88363_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88460_DEVICE_ID 0x8460 +#define BCM88460_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88461_DEVICE_ID 0x8461 +#define BCM88461_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88560_DEVICE_ID 0x8560 +#define BCM88560_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88561_DEVICE_ID 0x8561 +#define BCM88561_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88562_DEVICE_ID 0x8562 +#define BCM88562_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88661_DEVICE_ID 0x8661 +#define BCM88661_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88664_DEVICE_ID 0x8664 +#define BCM88664_A0_REV_ID ARADPLUS_A0_REV_ID + + +#define BCM88350_DEVICE_ID 0x8350 +#define BCM88350_B1_REV_ID ARAD_B1_REV_ID +#define BCM88351_DEVICE_ID 0x8351 +#define BCM88351_B1_REV_ID ARAD_B1_REV_ID +#define BCM88450_DEVICE_ID 0x8450 +#define BCM88450_B1_REV_ID ARAD_B1_REV_ID +#define BCM88451_DEVICE_ID 0x8451 +#define BCM88451_B1_REV_ID ARAD_B1_REV_ID +#define BCM88550_DEVICE_ID 0x8550 +#define BCM88550_B1_REV_ID ARAD_B0_REV_ID +#define BCM88551_DEVICE_ID 0x8551 +#define BCM88551_B1_REV_ID ARAD_B1_REV_ID +#define BCM88552_DEVICE_ID 0x8552 +#define BCM88552_B1_REV_ID ARAD_B1_REV_ID +#define BCM88651_DEVICE_ID 0x8651 +#define BCM88651_B1_REV_ID ARAD_B1_REV_ID +#define BCM88654_DEVICE_ID 0x8654 +#define BCM88654_B1_REV_ID ARAD_B1_REV_ID + +#define BCM88772_DEVICE_ID 0x8772 +#define BCM88952_DEVICE_ID 0x8952 +#define BCM88772_A1_REV_ID 0x0002 +#define BCM88952_A0_REV_ID 0x0001 +#define BCM88952_A1_REV_ID 0x0002 + +#define BCM88752_DEVICE_ID 0x8752 +#define BCM88752_A0_REV_ID 0x0000 +#define BCM88752_B0_REV_ID 0x0011 + + +#define BCM83207_DEVICE_ID 0x3207 +#define BCM83208_DEVICE_ID 0x3208 +#define BCM83207_A0_REV_ID 0x0001 +#define BCM83208_A0_REV_ID 1 + +#define PCP_PCI_VENDOR_ID 0x1172 +#define PCP_PCI_DEVICE_ID 0x4 + +#define ACP_PCI_VENDOR_ID 0x10ee +#define ACP_PCI_DEVICE_ID 0x7011 +#define ACP_PCI_REV_ID 0x0001 +#endif + diff --git a/platform/broadcom/saibcm-modules/make/Make.config b/platform/broadcom/saibcm-modules/make/Make.config new file mode 100644 index 00000000000..b8fa17bda11 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Make.config @@ -0,0 +1,365 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Make.config,v 1.3 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# + +ifneq ($(strip $(override-target)),) +override TARGET=$(override-target) +endif + +export TARGET + +# +# Set up the target name, and the target base variables. +# +# target = The full name of the target such as vxworks-bmw +# targetbase = 1st part of target (e.g. vxworks) +# targetplat = 2nd part of target (e.g. x86) if any; otherwise same as 1st +# +target = ${TARGET} +targetsplt = $(subst -, , ${target}) # change hyphens to spaces +targetbase = $(word 1,${targetsplt}) +targetplat = $(subst ${targetbase}-,,${TARGET}) + +# +# Common configuration for all platforms +# (Additional platform-dependent configurations are in Makefile.xxx) +# + +# +# THIS FILE SHOULD NOT BE MODIFIED LOCALLY, to override, add a file +# $SDK/make/Make.local that sets your local settings, and/or provide +# a path to your settings using the MAKE_LOCAL variable. If +# either of these files exists, their values will override those in this makefile. +# +ifdef MAKE_LOCAL +-include ${MAKE_LOCAL} +endif + +-include ${SDK}/make/Make.local + +ifdef ALL_CHIPS + ROBO_CHIPS = 1 + ESW_CHIPS = 1 +else + ifndef ROBO_CHIPS + ESW_CHIPS = 1 + endif +endif # ALL_CHIPS + +# +# By default, turn off the "changing directory" message. +# +MAKEFLAGS += --no-print-directory + +# +# Use gmake by default +# + +include ${SDK}/make/Make.tools +include ${SDK}/make/Makefile.${target} + +# use QUIET=1 to control printing of compilation lines +ifdef QUIET +Q:=@ +else +Q:= +endif + +# +# Suffix to add to the "target" files to allow local builds with different +# flags. Set "target_suffix" to XXX to cause the build to put built objects +# in ${target}${target_suffix}. This allows things like building a debug +# version with different flags. This may also be set in another Makefile. +# + +#target_suffix := + +# +# Optional suffix to add to the build directory and output binary files +# to allow multiple builds to co-exist for various reasons. +# +#chip_suffix := -$(shell echo $(CHIP) | tr A-Z a-z) + +# +# Combined suffixes +# +all_suffix = ${chip_suffix}${target_suffix} + +# +# Default location to place binaries and make depend files for building +# purposes. +# +ifeq "$(HOSTTYPE)" "Windows2000PC" +BLDROOTWITHDRIVE = ${SDK}/build/${target}${all_suffix}${bldroot_suffix} +BLDROOT = ${SDK_NO_DRIVE_NAME}/build/${target}${all_suffix}${bldroot_suffix} +else # ifeq "$(HOSTTYPE)" "Windows2000PC" + +ifndef SDKBUILD +SDKBUILD :=build +endif + +BLDROOT = ${SDK}/${SDKBUILD}/$(if ${BLDCONFIG},${BLDCONFIG}/)${target}${all_suffix}${bldroot_suffix} + +endif # ifeq "$(HOSTTYPE)" "Windows2000PC" + +# This is needed because we cannot include Make.vxworks before Make.config +ifndef DEST_DIR_SUFFIX +export DEST_DIR_SUFFIX :=$(subst $(realpath $(SDK))/systems,,$(realpath $(CURDIR)/$(dir ($(firstword $(MAKEFILE_LIST)))))) +ifeq ($(MAKELEVEL),0) +endif +endif + +ifeq ($(DEST_DIR),) +export DEST_DIR :=${SDK}/${SDKBUILD}$(if ${BLDCONFIG},/${BLDCONFIG})$(DEST_DIR_SUFFIX) +endif + +ifdef LOCALDIR +BLDDIR = ${BLDROOT}/${LOCALDIR} +ifeq "$(HOSTTYPE)" "Windows2000PC" +BLDDIRWITHDRIVE = ${BLDROOTWITHDRIVE}/${LOCALDIR} +endif +else # ifdef LOCALDIR +BLDDIR = ${BLDROOT} +ifeq "$(HOSTTYPE)" "Windows2000PC" +BLDDIRWITHDRIVE = ${BLDROOTWITHDRIVE} +endif +endif # ifdef LOCALDIR + +LIBDIR = ${BLDROOT} + +# +# Export directory, where build objects used by the outside world are +# placed (exported header files, libs, bins) +# +EXPDIR = ${SDK}/export/${target}${all_suffix} + +# +# Standard include paths +# +INCDIR = ${SDK}/include + +# +# Compilation Flags +# +# Flags may be added to (see below) +# + +INCFLAGS = -I${INCDIR} -I${SDK}/systems + +CFLAGS += ${INCFLAGS} +CXXFLAGS += ${INCFLAGS} +CPPFLAGS += ${INCFLAGS} + +CFLAGS += -DSAI_FIXUP -DBCM_PORT_DEFAULT_DISABLE -DBCM_VLAN_NO_DEFAULT_ETHER -DBCM_VLAN_NO_DEFAULT_CPU -DBCM_WARM_BOOT_SUPPORT -DSAL_CONFIG_FILE_DISABLE -DSAL_THREAD_NAME_PRINT_DISABLE -UKCOM_FILTER_MAX -DKCOM_FILTER_MAX=256 -DALPM_ENABLE -DOPENNSL_PHY_ROUTINES -DTH2_CPU_POOL_SETUP -DINCLUDE_L3 -DSAI_ONLY -DPRINT_TO_SYSLOG -D_SHR_PBMP_WIDTH=256 -DINCLUDE_DIAG_SHELL -DSTATIC=static -DLOG_TEST -DLOG_SAI -D_GNU_SOURCE + +# +# Debug #ifdef control +# +# Compiling out #ifdef DEBUG code saves about 1.3% on executable size. +# It is recommended to leave debug enabled when developing applications. +# +ifndef DEBUG_IFDEFS +DEBUG_IFDEFS=TRUE +endif + +ifeq ($(DEBUG_IFDEFS),TRUE) +CFLAGS += -DBROADCOM_DEBUG +CXXFLAGS += -DBROADCOM_DEBUG +CPPFLAGS += -DBROADCOM_DEBUG +endif + +# +# Debug symbol information control +# +ifndef DEBUG_SYMBOLS +DEBUG_SYMBOLS=TRUE +endif + +ifeq ($(DEBUG_SYMBOLS),TRUE) +CFLAGS += -g +CXXFLAGS += -g +CPPFLAGS += -g +endif + +# +# If DEBUG_CFLAGS is set, add its contents to CFLAGS. +# May be useful for setting on the command line or adding to Make.local. +# Example: gmake DEBUG_CFLAGS=-save-temps system.c +# + +ifneq ($(DEBUG_CFLAGS),) +CFLAGS += $(DEBUG_CFLAGS) +CXXFLAGS += $(DEBUG_CFLAGS) +CPPFLAGS += $(DEBUG_CFLAGS) +endif + +# +# Optimization level +# +# Set DEBUG_OPTIMIZE to TRUE (default) to use a normal optimization +# determined by OPTFLAGS_DEFAULT in the platform Makefile. +# Set DEBUG_OPTIMIZE to FALSE to use no optimization, +# strongly recommended when using any debugger. +# Set DEBUG_OPTIMIZE to any other option string to request specific +# optimization flags (for example -O2). +# +ifndef DEBUG_OPTIMIZE +DEBUG_OPTIMIZE=TRUE +endif + +ifeq ($(DEBUG_OPTIMIZE),TRUE) +OPTFLAGS += $(OPTFLAGS_DEFAULT) +else +ifneq ($(DEBUG_OPTIMIZE),FALSE) +OPTFLAGS += $(DEBUG_OPTIMIZE) +endif +endif + +# +# Debug assertion control. +# +# Compiling out assert() saves about 1.1% on executable size, +# however doing so is VERY MUCH discouraged. +# +ifndef DEBUG_ASSERTS +DEBUG_ASSERTS=TRUE +endif + +ifeq ($(DEBUG_ASSERTS),FALSE) +CFLAGS += -DNDEBUG +CXXFLAGS += -DNDEBUG +CPPFLAGS += -DNDEBUG +endif + +# +# GCC pedantic mode. +# +ifeq ($(DEBUG_PEDANTIC),TRUE) +CFGFLAGS += -D__PEDANTIC__ +CFLAGS += --pedantic +CXXFLAGS += --pedantic +endif + +# +# In each directory, build a list of local sources, objects, and headers +# +LSRCS = $(wildcard *.c *.cpp *.s *.cc *.C) +LOBJS = $(addsuffix .o, $(basename ${LSRCS})) +BOBJS = $(addprefix ${BLDDIR}/,${LOBJS}) +LHDRS = $(wildcard *.h *.H) +LDOTIS = $(wildcard *.i) + + +# +# Rule to create object file (build) directory +# + +.PHONY: all install clean distclean + +.PRECIOUS: ${BLDDIR}/.tree + +%/.tree: + @$(ECHO) 'Creating build directory $(dir $@)' + @$(MKDIR) $(dir $@) + @$(ECHO) "Build Directory for ${LOCALDIR} Created" > $@ + +# Rule allowing build through CPP only, creates .E file from .c file. + +%.E: %.c + $Q${CC} -E ${CFLAGS} $< | sed -e '/^ *$$/d' -e p -e d > $@ + +# Rule allowing build through source only, creates .s file from .c file. + +%.s: %.c + $Q${CC} -S ${CFLAGS} $< + +# +# Default Build rules for .c --> .o, leaving the binary in BLDDIR/X.o, +# even if file not built from directory of source. +# +ifeq ($(FAST),1) +${BLDDIR}/%.o: %.c +else +ifdef GENERATE_C_FILES +${BLDDIR}/%.o: %.c +else +${BLDDIR}/%.o: %.c +endif +endif +ifdef QUIET + @${ECHO} Compiling ${LOCALDIR}/$< +endif +ifdef LOCAL_D_FILE + $Q$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -o $@ -c $< --write-user-dependencies + -@/bin/cp $*.d $(BLDDIR)/$*.d + -@/bin/rm -f $*.d +else + $Q$(CC) -MD -MF $(BLDDIR)/$*.d $(CFLAGS) $(EXTRA_CFLAGS) -o $@ -c $< +endif + @/bin/cp $(BLDDIR)/$*.d $(BLDDIR)/$*.tmp;\ + /bin/sed -e 's/#.*//' -e 's/^[^:]*: *//' -e 's/ *\\$$//' \ + -e '/^$$/ d' -e 's/$$/ :/' \ + < $(BLDDIR)/$*.d >> $(BLDDIR)/$*.tmp; \ + /bin/sed \ + -e 's| \([0-9a-zA-Z]\)| '$(SDK)/$(LOCALDIR)'\/\1|g' \ + -e 's|^\([0-9a-zA-Z]\)|'$(SDK)/$(LOCALDIR)'/\1|g' \ + -e 's| \(\.\.\/\)| '$(SDK)/$(LOCALDIR)'\/\1|g' \ + -e 's|'$(SDK)'|'$$\{SDK\}'|g' \ + -e 's/\w*\/\.\.\/*//g' \ + -e 's/\w*\/\.\.\/*//g' \ + -e 's/\w*\/\.\.\/*//g' \ + < $(BLDDIR)/$*.tmp > $(BLDDIR)/$*.P; \ + /bin/rm -f $(BLDDIR)/$*.d $(BLDDIR)/$*.tmp + +${BLDDIR}/%.o: %.s +ifdef QUIET + @${ECHO} Assembling ${LOCALDIR}/$< +endif + $Q${CC} ${CFLAGS} ${EXTRA_CFLAGS} -c $< -o $@ + +${BLDDIR}/%.o: %.cpp +ifdef QUIET + @${ECHO} Compiling ${LOCALDIR}/$< +endif + $Q${CXX} -c ${CXXFLAGS} -c $< -o $@ + +${BLDDIR}/%.o: %.cc ${BLDDIR}/.tree +ifdef QUIET + @${ECHO} Compiling ${LOCALDIR}/$< +endif + $Q${CXX} -c ${CXXFLAGS} -c $< -o $@ + +# +# Cause "make foo.o" in any subdirectory to put the object in the build +# directory instead of the local directory. +# +%.o: ${BLDDIR}/%.o + @ + +# +# List of directories where built objects live. +# (we are not making the export directories for now) +# +#DIRS = ${BLDDIR} ${EXPDIR}/lib ${EXPDIR}/bin ${EXPDIR}/include +DIRS = ${BLDDIR} + +ifeq (C_COMPILER,$(MAKECMDGOALS)) +C_COMPILER: + @echo $(CC) +endif diff --git a/platform/broadcom/saibcm-modules/make/Make.depend b/platform/broadcom/saibcm-modules/make/Make.depend new file mode 100644 index 00000000000..de709938766 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Make.depend @@ -0,0 +1,108 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Make.depend,v 1.14 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +# Default rule to build dependencies. This builds a x.d file for each +# x.c file that describes the dependencies. We then conditionally include +# the generated .d files. +# + +# +# If making 'clean', do not include any .d files. If they are included, +# gmake intrinsically tries to remake them all. +# +ifeq (,$(findstring clean,$(MAKECMDGOALS))) + +ZFS :=$(wildcard *.zf) +ZFC := $(ZFS:.zf=.c) + +ifdef GENERATE_C_FILES +ifndef GEN_INCS +$(error "GEN_INCS was not defined") +endif + +ZF_GEN = ${SDK}/tools/zFrameCodeGen.pl + +# 1=.zf +define ZFS_RULE +$(1:.zf=Console.c) : $(1:.zf=.c) + @echo updated $$@ from $$? + +$(1:.zf=.c) : $(1) $(ZF_GEN) + @$(PERL) $(ZF_GEN) -s -z . -p . -g $1 -t c + @echo generated ${LOCALDIR}/$$@ from $(1) + @mv $$(*F).cx $$@ + @if [ -e $$(*F)Console.cx ] ; then \ + mv $$(*F)Console.cx $$(*F)Console.c; \ + echo Created $$(*F)Console.c ;\ + fi + @if [ -e $$(*F)Console.hx ] ; then \ + echo Created $(GEN_INCS)/$$(*F)Console.hx ;\ + mv $$(*F)Console.hx $(GEN_INCS)/ ; \ + fi + @mv $$(*F).hx $(GEN_INCS)/ +endef + +$(foreach zf,$(ZFS),$(eval $(call ZFS_RULE,$(zf)))) + +${BLDDIR}/%.P : ${BLDDIR}/.tree %.c + +.PHONY: GENFILES +GENFILES: $(ZFC) + +$(BOBJS) : $(ZFC) + +else +# +# Attempt to build the depend files. If it fails, the depend file is +# removed so that it is not included in later builds. +# +${BLDDIR}/%.P : %.c ${BLDDIR}/.tree + @$(ECHO) Dependencies for ${LOCALDIR}/$< + +${BLDDIR}/%.P : %.cc ${BLDDIR}/.tree + @$(ECHO) Dependencies for ${LOCALDIR}/$< + +endif + +# +# If there are C or C++ files in this directory, include the +# depend files for them. +# + +ifeq ($(findstring _COMPILER,$(MAKECMDGOALS))$(findstring variable,$(MAKECMDGOALS)),) +ifneq ($(strip ${LSRCS}),) +ifneq (,$(findstring .o,$(MAKECMDGOALS))) +-include $(addprefix ${BLDDIR}/,$(MAKECMDGOALS:.o=.P)) $(addprefix ${BLDDIR}/,$(MAKECMDGOALS:.o=.sig)) +else +-include $(addprefix ${BLDDIR}/,$(addsuffix .P,$(basename $(LSRCS)))) $(addprefix ${BLDDIR}/,$(addsuffix .sig,$(basename $(LSRCS)))) +endif +endif +endif + +endif # !CLEANING + +clean_d:: +ifdef QUIET + @$(ECHO) Cleaning dependencies for ${LOCALDIR} +endif +ifdef GENERATE_C_FILES + $Q$(RM) $(ZFC:%=$(SDK)/$(LOCALDIR)/%) $(ZFC:%.c=$(SDK)/$(LOCALDIR)/%Console.c) +endif + +clean:: clean_d diff --git a/platform/broadcom/saibcm-modules/make/Make.kernlib b/platform/broadcom/saibcm-modules/make/Make.kernlib new file mode 100644 index 00000000000..6ec8a1c8df7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Make.kernlib @@ -0,0 +1,69 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Make.kernlib,v 1.7 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +# Make rules/targets for handling libraries + +.SECONDARY:: ${BOBJS} + +targetlibsoname = ${lib}.so.${SHAREDLIBVER} +targetlibrealname = ${targetlibsoname} +targetlibso = ${LIBDIR}/${targetlibrealname} + +ifeq ($(TOOLS),Borland) + +LIBSUFFIX=lib + +${LIBDIR}/%.lib: ${BORLAND_BOBJS} + $(RM) $@ + $(FOREACH) -subdir "$(LIBDIR)" \ + "tlib $@ $(foreach obj, $(BORLAND_LOBJS), +-$(obj))" + +else # !Borland + +LIBSUFFIX=a + +${LIBDIR}/%.a: ${BOBJS} +ifdef QUIET + @$(ECHO) Building library $(notdir $@) +endif + $Q$(RM) $@ + $Q$(AR) ${ARFLAGS} $@ $(sort ${BOBJS}) +ifeq ($(LINUX_MAKE_SHARED_LIB),1) +ifeq ($(targetbase),unix) + $(CC) -shared -Wl,-soname,${targetlibsoname} -o ${targetlibso} ${BOBJS} -lc +endif +endif # LINUX_MAKE_SHARED_LIB # +endif # !Borland + +targetlib = ${LIBDIR}/${lib}.${LIBSUFFIX} + +all:: ${BLDDIR}/.tree ${targetlib} + +install:: all + +clean:: +ifdef QUIET + @$(ECHO) Cleaning objects for ${LOCALDIR} and ${lib} +endif + $Q$(RM) ${BOBJS} + $Q$(RM) ${targetlib} + $Q$(RM) ${targetlibso} + +distclean:: clean + diff --git a/platform/broadcom/saibcm-modules/make/Make.lib b/platform/broadcom/saibcm-modules/make/Make.lib new file mode 100644 index 00000000000..d67325c5dd2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Make.lib @@ -0,0 +1,80 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Make.lib,v 1.14 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +# Make rules/targets for handling libraries + +.SECONDARY:: ${BOBJS} + +BOBJS_FAST = ${BOBJS} +BOBJS_MAKE_CMD = + +ifeq ($(FAST),1) + ifneq ($(strip $(BOBJS)),) + BOBJS_FAST = + BOBJS_ARGS = -j9 + BOBJS_MAKE_CMD = pwd && make LSRUN=$(SDK)/tools/lsrun.pl $(BOBJS_ARGS) ${BOBJS} + endif +endif + +ifeq ($(TOOLS),Borland) + +LIBSUFFIX=lib + +${LIBDIR}/%.lib: ${BORLAND_BOBJS} + $(RM) $@ + $(FOREACH) -subdir "$(LIBDIR)" \ + "tlib $@ $(foreach obj, $(BORLAND_LOBJS), +-$(obj))" + +else # !Borland + +ifeq ($(LINUX_MAKE_SHARED_LIB),1) +LIBSUFFIX=so.${SHAREDLIBVER} +else +LIBSUFFIX=a +endif + +targetlib = ${LIBDIR}/${lib}.${LIBSUFFIX} + +all:: ${BLDDIR}/.tree ${targetlib} + +${LIBDIR}/%.${LIBSUFFIX}: ${BOBJS_FAST} + $(BOBJS_MAKE_CMD) +ifdef QUIET + @$(ECHO) Building library $(notdir $@) +endif + $Q$(RM) $@ +ifeq ($(LINUX_MAKE_SHARED_LIB),1) + $(CC) -shared -Wl,-soname,${lib}.${LIBSUFFIX}${EXTRA_LIB_LDFLAGS} -o ${targetlib} ${BOBJS} -lc +else + ${Q}cd $(dir $(word 1,${BOBJS}));$(AR) ${ARFLAGS} $@ $(sort $(notdir ${BOBJS})) +endif + +endif # !Borland + + +install:: all + +clean:: +ifdef QUIET + @$(ECHO) Cleaning objects for ${LOCALDIR} and ${lib} +endif + $Q$(RM) ${BOBJS} + $Q$(RM) ${targetlib} + +distclean:: clean diff --git a/platform/broadcom/saibcm-modules/make/Make.linux b/platform/broadcom/saibcm-modules/make/Make.linux new file mode 100644 index 00000000000..bd86ca351b6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Make.linux @@ -0,0 +1,97 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# $Id: Make.linux,v 1.18 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +# Common make targets for Linux user and kernel builds included by top +# level Linux makefiles +# +# Variables referenced: +# +# LINUX_MAKE_FLAGS +# Additional flags passed to Make +# +# LINUX_MAKE_USER +# Defined: user build +# Undefined: kernel build +# +# LINUX_MAKE_DIR +# Common makefile location, if it is not ../common +# +# + +export DEST_DIR_SUFFIX :=$(subst $(realpath $(SDK))/systems,,$(realpath $(CURDIR)/$(dir ($(firstword $(MAKEFILE_LIST)))))) + +ifeq (,$(kernel_version)) +kernel_version=2_4 +endif + +ifndef LINUX_MAKE_SHARED_LIB +LINUX_MAKE_SHARED_LIB=0 +endif + +ifeq (,$(SHAREDLIBVER)) +SHAREDLIBVER=1 +endif + +ifndef LINUX_MAKE_DIR +ifdef LINUX_MAKE_USER +LINUX_MAKE_DIR := $(SDK)/systems/linux/user/common +else +LINUX_MAKE_DIR := $(SDK)/systems/linux/kernel/common +endif +endif + +ifdef LINUX_MAKE_USER + CMD = $(LINUX_MAKE_FLAGS) -C $(LINUX_MAKE_DIR) \ + platform=$(platform) bldroot_suffix=/$(platform) kernel_version=$(kernel_version) \ + LINUX_MAKE_SHARED_LIB=$(LINUX_MAKE_SHARED_LIB) SHAREDLIBVER=$(SHAREDLIBVER) +else + export LINUX_MAKE_KERNEL := 1 + CMD = $(LINUX_MAKE_FLAGS) -C $(LINUX_MAKE_DIR) \ + platform=$(platform) kernel_version=$(kernel_version) +endif + +ifneq (,$(MIPS_TOOLS_DIR)) + CMD += MIPS_TOOLS_DIR=$(MIPS_TOOLS_DIR) +endif + +ifneq (,$(MIPS_CROSS_COMPILE)) + CMD += MIPS_CROSS_COMPILE=$(MIPS_CROSS_COMPILE) +endif + +ifneq (,$(LINUX_INCLUDE)) + CMD += LINUX_INCLUDE=$(LINUX_INCLUDE) +endif + +# gmake does not understand $(CMD) to be a submake +# options are to +$(CMD) or $(MAKE) $(CMD) +# trying the latter +build: + $(MAKE) $(CMD) + +DELIVER clean C_COMPILER CXX_COMPILER variable mod bcm user: + $(MAKE) $(CMD) $@ + +clean_d: clean + +distclean: + $(MAKE) $(CMD) $@ + +.PHONY: build clean distclean clean_d DELIVER variable mod bcm user + diff --git a/platform/broadcom/saibcm-modules/make/Make.subdirs b/platform/broadcom/saibcm-modules/make/Make.subdirs new file mode 100644 index 00000000000..1033e296c0a --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Make.subdirs @@ -0,0 +1,44 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Make.subdirs,v 1.8 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +# Make rules/targets for handling subdirectories + +.PHONY: ${subdirs} + +all:: ${subdirs} +ifdef QUIET + @$(ECHO) Subdirectory build for ${subdirs} +endif + +${subdirs}:: + $Q$(MAKE) -C $@ kernel_version=$(kernel_version) LINUX_MAKE_SHARED_LIB=${LINUX_MAKE_SHARED_LIB} SHAREDLIBVER=${SHAREDLIBVER} + +ifeq "$(HOSTTYPE)" "Windows2000PC" +clean clean_d install distclean:: +ifdef QUIET + @$(ECHO) Subdirectory $@ for ${subdirs} +endif + $Q$(FOREACH) "$(subdirs)" "${MAKE} -C ## $@" +else +clean clean_d install distclean:: +ifdef QUIET + @$(ECHO) Subdirectory $@ for ${subdirs} +endif + @(for name in $(subdirs); do $(MAKE) -C $$name $@; done) +endif diff --git a/platform/broadcom/saibcm-modules/make/Make.tools b/platform/broadcom/saibcm-modules/make/Make.tools new file mode 100644 index 00000000000..8ed77727fef --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Make.tools @@ -0,0 +1,38 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Make.tools,v 1.2 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +SYSNAME := $(shell uname -s) +HCC ?=/usr/bin/gcc +SED = /bin/sed +COMPRESS = /usr/bin/compress +PERL = /usr/bin/perl +LN = /bin/ln +HOSTTYPE= i386-linux + +# +# Platform Independent +# +MKTOOL = $(PERL) ${SDK}/tools/mktool.pl +RM = $(MKTOOL) -rm +MKDIR = $(MKTOOL) -md +FOREACH = $(MKTOOL) -foreach +CP = $(MKTOOL) -cp +MAKEDEP = $(MKTOOL) -dep +ECHO = $(MKTOOL) -echo +MKBEEP = ${MKTOOL} -beep diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-bmw-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-bmw-2_6 new file mode 100644 index 00000000000..6fa170fb75e --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-bmw-2_6 @@ -0,0 +1,122 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-bmw-2_6,v 1.20 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Look for custom tools +ifneq (,$(PPC_TOOLS_DIR)) +ifneq (,$(PPC_CROSS_COMPILE)) +override PATH := $(PPC_TOOLS_DIR):$(PATH) +override CROSS_COMPILE := $(PPC_CROSS_COMPILE) +endif +endif + +# Default tools +ifeq (,$(WRS_LINUX_VERSION)) +WRS_LINUX_VERSION=2.0 +endif + +# Default Linux Kernel directory +ifeq (,$(KERNDIR)) + +ifeq (1.4,$(WRS_LINUX_VERSION)) + +KERNDIR := /projects/ntsw-tools/linux/wrslinux_1.4/bcm98245cpci/build/linux-2.6.14-cgl + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE = powerpc-wrs-linux-gnu-603e-glibc_std- +endif + +WRLINUX_BASE=/tools/windriver/linux_ed/1.4/Linux +export WIND_LIC_PROXY = $(WRLINUX_BASE)/setup/x86-linux2/bin +override PATH := $(WRLINUX_BASE)/gnu/3.4.4-wrlinux-1.4/x86-linux2/bin:$(PATH) + +WRS_SYSROOT_PATH := $(WRLINUX_GNU_PATH)/../lib/gcc/powerpc-wrs-linux-gnu/3.4.4/include +else + +ifeq (2.0,$(WRS_LINUX_VERSION)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE = powerpc-wrs-linux-gnu-ppc_603e-glibc_std- +endif + +KERNDIR:= /projects/ntsw-tools/linux/wrslinux_2.0/bmw/glibc_std/build/linux-2.6.21-standard + +WRLINUX_BASE=/tools/windriver/linux_ed/2.0_GA/Linux + +TOOLCHAIN_EXEC_PREFIX=$(WRLINUX_BASE)/gnu/4.1-wrlinux-2.0/x86-linux2 +TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_EXEC_PREFIX) +WIND_LIC_PROXY=$(WRLINUX_BASE)/setup/x86-linux2/bin + +WRLINUX_GNU_PATH = $(WRLINUX_BASE)/gnu/4.1-wrlinux-2.0/x86-linux2/bin + +override PATH := $(TOOLCHAIN_EXEC_PREFIX):$(KERNDIR)/../../host-cross/bin:$(KERNDIR)/../../host-cross/powerpc-wrs-linux-gnu/bin:$(WRLINUX_GNU_PATH):$(PATH) + +export TOOLCHAIN_EXEC_PREFIX TOOLCHAIN_BIN_DIR WIND_LIC_PROXY + +WRS_SYSROOT_PATH := $(WRLINUX_GNU_PATH)/../lib/gcc/powerpc-wrs-linux-gnu/4.1.2/include + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") +endif +endif +endif + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"BMW_MPC8245/PPC603e\" + +ARCH = ppc +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + +ifeq (1.4,$(WRS_LINUX_VERSION)) +# From linux/arch/ppc/Makefile + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -fomit-frame-pointer -fsigned-char -msoft-float -pipe -ffixed-r2 -Wno-uninitialized -mmultiple -mstring +endif + +else +ifeq (2.0,$(WRS_LINUX_VERSION)) + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -m32 -nostdinc -isystem $(WRS_SYSROOT_PATH) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/linux/autoconf.h -I$(KERNDIR)/arch/ppc -I$(KERNDIR)/arch/ppc/include -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -msoft-float -pipe -ffixed-r2 -mmultiple -mno-altivec -mstring -fomit-frame-pointer -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign +endif + +endif +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-gto b/platform/broadcom/saibcm-modules/make/Makefile.linux-gto new file mode 100644 index 00000000000..947c20e74f9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-gto @@ -0,0 +1,118 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-gto-4_4,v 1.42 Broadcom SDK $ +# $Copyright: (c) 2015 Broadcom Corp. +# All Rights Reserved.$ + +# User must select one platform from below. +ifeq (,$(BUILD_PLATFORM)) +BUILD_PLATFORM=POWERPC_LINUX +endif + +# TOOLCHAIN_BASE_DIR Toolchain base directory for GTO devices +# TARGET_ARCHITECTURE Compiler for target architecture +# KERNDIR Kernel directory for iPROC-CMICd devices +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/gto +TARGET_ARCHITECTURE := powerpc-broadcom-linux-gnuspe +KERNDIR ?= $(TOOLCHAIN_BASE_DIR)/kernel/current + + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := $(TARGET_ARCHITECTURE)- +endif + + +# GTO toolchain +TOOLCHAIN_BIN_DIR := $(TOOLCHAIN_BASE_DIR)/toolchain/host/usr/bin +override PATH := $(TOOLCHAIN_BIN_DIR)/../$(TARGET_ARCHITECTURE)/bin:$(TOOLCHAIN_BIN_DIR):$(PATH) +export TOOLCHAIN_BIN_DIR + + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"GTO_MPC8548\" +CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +ARCH = powerpc +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + + +# From linux/arch/ppc/Makefile +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +KFLAG_INCLD = $(TOOLCHAIN_BIN_DIR)/../lib/gcc/$(TARGET_ARCHITECTURE)/4.6.4/include + +ifdef BROADCOM_SVK +ifdef BCM_BME3200_B0 +PLX_PCI2LBUS=1 +endif +ifdef BCM_BM9600_B0 +PLX_PCI2LBUS=1 +endif +ifeq ($PLX_PCI2LBUS, 1) +CFLAGS += -DBCM_PLX9656_LOCAL_BUS -DBDE_LINUX_NON_INTERRUPTIBLE +endif +endif + +ifdef DPP_CHIPS +CFLAGS += -DDUNE_BCM -D__DUNE_LINUX_BCM_CPU_PCP_DMA__ +CFGFLAGS += -DSOC_CM_FUNCTION +endif + +ifdef DFE_CHIPS +CFLAGS += -DDUNE_BCM +CFGFLAGS += -DSOC_CM_FUNCTION +endif + +ifdef SAND_CHIPS +CFLAGS += -D__DUNE_GTO_BCM_CPU__ -D__DUNE_LINUX_BCM_CPU_PCIE__ +endif + +ifdef SHADOW_PLX +CFLAGS += -DBCM_PLX9656_LOCAL_BUS -DBDE_LINUX_NON_INTERRUPTIBLE -DSHADOW_SVK +endif + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -m32 -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/uapi/linux/version.h -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/powerpc -I$(KERNDIR)/arch/powerpc/include -I$(KERNDIR)/include/asm-powerpc -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -msoft-float -pipe -ffixed-r2 -mmultiple -mno-altivec -funit-at-a-time -Wa,-me500 -fomit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign +endif + +ifneq (,$(findstring TCL,$(FEATURE_LIST))) +#LINK_STATIC = 0 +#export LINK_STATIC +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-4_4 +endif + diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-gto-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-gto-2_6 new file mode 100644 index 00000000000..4caa4902421 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-gto-2_6 @@ -0,0 +1,276 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-gto-2_6,v 1.42 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# User must select one platform from below.By default WR_LINUX is selected. . +ifeq (,$(BUILD_PLATFORM)) +#BUILD_PLATFORM=ELDK +BUILD_PLATFORM=WR_LINUX +endif + +# Specify the ELDK version you want to use for building SDK. +ifeq (,$(ELDK_VERSION)) +ifeq (ELDK,$(BUILD_PLATFORM)) +ELDK_VERSION=4.0 +endif +endif + +# Specify the KERNEL VERSION you want to use for building SDK. +ifeq (,$(KERN_VER)) +ifeq (ELDK,$(BUILD_PLATFORM)) +KERN_VER=2.6.21.7 +endif +endif + + +# Specify the Windriver Linux version here.For example '2.0' as shown below. +ifeq (WR_LINUX,$(BUILD_PLATFORM)) +ifeq (,$(WRS_LINUX_VERSION)) +WRS_LINUX_VERSION=2.0 +endif +endif + + +#glibc_small and glibc_std have their own cross-compilation tools and and path for these tools are different as implemented below. To enable glibc_small build, line given below should be uncommented. + +#WRL_GLIBC_SMALL=TRUE + +ifeq (2.0,$(WRS_LINUX_VERSION)) +ifeq ($(WRL_GLIBC_SMALL),TRUE) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := powerpc-wrs-linux-gnu-ppc_e500v2-glibc_small- +endif + +KERNDIR ?=/projects/ntsw-tools/linux/wrslinux_2.0/gto/glibc_small/build/linux-2.6.21-standard + +else + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := powerpc-wrs-linux-gnu-ppc_e500v2-glibc_std- +endif + +KERNDIR ?= /projects/ntsw-tools/linux/wrslinux_2.0/gto/glibc_std/build/linux-2.6.21-standard + +endif + +export WRL_GLIBC_SMALL + +# After this point glibc_std and glibc_small share these flags + +WRLINUX_BASE ?=/tools/windriver/linux_ed/2.0_GA/Linux +TOOLCHAIN_EXEC_PREFIX=$(WRLINUX_BASE)/gnu/4.1-wrlinux-2.0/x86-linux2 +TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_EXEC_PREFIX) +WIND_LIC_PROXY=$(WRLINUX_BASE)/setup/x86-linux2/bin +WRLINUX_GNU_PATH = $(WRLINUX_BASE)/gnu/4.1-wrlinux-2.0/x86-linux2/bin +override PATH := $(TOOLCHAIN_EXEC_PREFIX):$(KERNDIR)/../../host-cross/bin:$(KERNDIR)/../../host-cross/powerpc-wrs-linux-gnu/bin:$(WRLINUX_GNU_PATH):$(PATH) +export TOOLCHAIN_EXEC_PREFIX TOOLCHAIN_BIN_DIR WIND_LIC_PROXY +endif + + +ifeq (3.0,$(WRS_LINUX_VERSION)) +ifeq ($(WRL_GLIBC_SMALL),TRUE) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := powerpc-wrs-linux-gnu-ppc_e500v2-glibc_small- +endif + +KERNDIR ?=/projects/ntsw-tools/linux/wrslinux_3.0/gto/bcm98548xmc_30_glibc_small/build/linux-broadcom_bcm98548xmc-standard-build +KERNDIR_STD ?=/projects/ntsw-tools/linux/wrslinux_3.0/gto/bcm98548xmc_30_glibc_small/build/linux + +else + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := powerpc-wrs-linux-gnu-ppc_e500v2-glibc_std- +endif + +KERNDIR ?=/projects/ntsw-tools/linux/wrslinux_3.0/gto/bcm98548xmc_30_glibc_std_debug/build/linux-broadcom_bcm98548xmc-standard-build +KERNDIR_STD ?=/projects/ntsw-tools/linux/wrslinux_3.0/gto/bcm98548xmc_30_glibc_std_debug/build/linux + +endif + +export WRL_GLIBC_SMALL + +# After this point glibc_std and glibc_small share these flags + +WRLINUX_BASE ?=/tools/windriver/linux_ed/3.0/Linux +TOOLCHAIN_EXEC_PREFIX=$(WRLINUX_BASE)/wrlinux-3.0/layers/wrll-toolchain-4.3-85/powerpc/toolchain/x86-linux2 +TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_EXEC_PREFIX) +WIND_LIC_PROXY=$(WRLINUX_BASE)/setup/x86-linux2/bin +WRLINUX_GNU_PATH = $(WRLINUX_BASE)/wrlinux-3.0/layers/wrll-toolchain-4.3-85/powerpc/toolchain/x86-linux2/bin +override PATH := $(TOOLCHAIN_EXEC_PREFIX):$(KERNDIR_STD)/../../host-cross/bin:$(KERNDIR_STD)/../../host-cross/powerpc-wrs-linux-gnu/bin:$(WRLINUX_GNU_PATH):$(PATH) +export TOOLCHAIN_EXEC_PREFIX TOOLCHAIN_BIN_DIR WIND_LIC_PROXY + +LINUX_INCLUDE_STD := $(KERNDIR_STD)/include + +endif + +ifeq (ELDK,$(BUILD_PLATFORM)) +ifeq (2.6.21.7, $(KERN_VER)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := ppc_85xx- +endif + +ifeq (4.0, $(ELDK_VERSION)) +override PATH := /tools/eldk/4.0/usr/bin:$(PATH) +else +override PATH := /tools/eldk/4.1/usr/bin:$(PATH) +endif +KERNDIR ?= /projects/ntsw-tools/linux/eldk/gto_eldk/linux-2.6.21.7 +endif +endif + +ifeq (ELDK,$(BUILD_PLATFORM)) +ifeq (2.6.24.4, $(KERN_VER)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := ppc_85xx- +endif + +ifeq (4.0, $(ELDK_VERSION)) +override PATH := /tools/eldk/4.0/usr/bin:$(PATH) +else +override PATH := /tools/eldk/4.1/usr/bin:$(PATH) +endif +KERNDIR ?= /projects/ntsw-tools/linux/eldk/gto_eldk/linux-2.6.24.4 +endif +endif + + +ifeq (ELDK,$(BUILD_PLATFORM)) +ifeq (2.6.25, $(KERN_VER)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := ppc_85xx- +endif + +ifeq (4.0, $(ELDK_VERSION)) +override PATH := /tools/eldk/4.0/usr/bin:$(PATH) +else +override PATH := /tools/eldk/4.1/usr/bin:$(PATH) +endif +KERNDIR ?= /projects/ntsw-tools/linux/eldk/gto_eldk/linux-2.6.25 +endif +endif + + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"GTO_MPC8548\" +CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +ARCH = powerpc +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + + +# From linux/arch/ppc/Makefile +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + + +ifeq (,$(KFLAG_INCLD)) +ifeq (4.0,$(ELDK_VERSION)) +ifeq (ELDK,$(BUILD_PLATFORM)) +KFLAG_INCLD = /tools/eldk/4.0/usr/lib/gcc/powerpc-linux/4.0.0/include +endif +endif + +ifeq (4.1,$(ELDK_VERSION)) +ifeq (ELDK,$(BUILD_PLATFORM)) +KFLAG_INCLD = /tools/eldk/4.1/usr/lib/gcc/powerpc-linux/4.0.0/include +endif +endif + +ifeq (2.0,$(WRS_LINUX_VERSION)) +KFLAG_INCLD = $(WRLINUX_GNU_PATH)/../lib/gcc/powerpc-wrs-linux-gnu/4.1.2/include +endif + +ifeq (3.0,$(WRS_LINUX_VERSION)) +KFLAG_INCLD = $(WRLINUX_GNU_PATH)/../lib/gcc/powerpc-wrs-linux-gnu/4.3.2/include +endif +endif + +ifdef BROADCOM_SVK +ifdef BCM_BME3200_B0 +PLX_PCI2LBUS=1 +endif +ifdef BCM_BM9600_B0 +PLX_PCI2LBUS=1 +endif +ifeq ($PLX_PCI2LBUS, 1) +CFLAGS += -DBCM_PLX9656_LOCAL_BUS -DBDE_LINUX_NON_INTERRUPTIBLE +endif +endif + +ifdef DPP_CHIPS +CFLAGS += -DDUNE_BCM -D__DUNE_LINUX_BCM_CPU_PCP_DMA__ +CFGFLAGS += -DSOC_CM_FUNCTION +endif + +ifdef DFE_CHIPS +CFLAGS += -DDUNE_BCM +CFGFLAGS += -DSOC_CM_FUNCTION +endif + +ifdef SAND_CHIPS +CFLAGS += -D__DUNE_GTO_BCM_CPU__ -D__DUNE_LINUX_BCM_CPU_PCIE__ +endif + +ifdef SHADOW_PLX +CFLAGS += -DBCM_PLX9656_LOCAL_BUS -DBDE_LINUX_NON_INTERRUPTIBLE -DSHADOW_SVK +endif + +ifeq (,$(KFLAGS)) +#autoconf.h was moved in later kernels +LINUX_AUTOCONF = $(LINUX_INCLUDE)/generated/autoconf.h +ifeq (,$(shell ls $(LINUX_AUTOCONF) 2>/dev/null)) +LINUX_AUTOCONF = $(LINUX_INCLUDE)/linux/autoconf.h +endif + +KFLAGS := -D__KERNEL__ -m32 -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/linux/version.h -include $(LINUX_AUTOCONF) -I$(KERNDIR)/arch/powerpc -I$(KERNDIR)/arch/powerpc -I$(KERNDIR)/arch/powerpc/include -I$(KERNDIR)/include/asm-powerpc -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -msoft-float -pipe -ffixed-r2 -mmultiple -mno-altivec -funit-at-a-time -Wa,-me500 -fomit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign +endif + +#Wind river Linux 3.0 needs addtional flags +ifeq (3.0,$(WRS_LINUX_VERSION)) + +# Use MSI interrupts if kernel is compiled with MSI support. +#CFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT +KFLAGS += -I$(LINUX_INCLUDE_STD) -I$(KERNDIR_STD)/arch/powerpc -I$(KERNDIR_STD)/arch/powerpc/include -I$(KERNDIR_STD)/include.asm-powerpc -mno-spe +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc new file mode 100644 index 00000000000..7c0f9411f5e --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc @@ -0,0 +1,92 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-iproc Exp $ +# $Copyright: (c) 2007 Broadcom Corp. +# All Rights Reserved.$ +# Makefile for iproc-CMICd + +# User must select one platform from below.By default ARM_LINUX is selected. . +ifeq (,$(BUILD_PLATFORM)) +BUILD_PLATFORM=ARM_LINUX +endif + +# TOOLCHAIN_BASE_DIR Toolchain base directory for iPROC-CMICd devices +# TARGET_ARCHITECTURE Compiler for target architecture +# KERNDIR Kernel directory for iPROC-CMICd devices +ifeq (BE,$(ENDIAN_MODE)) +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/iproc-be/XLDK +TARGET_ARCHITECTURE:=armeb-broadcom-linux-uclibcgnueabi +KERNDIR ?= $(TOOLCHAIN_BASE_DIR)/kernel/linux +else +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/iproc/XLDK +TARGET_ARCHITECTURE:= arm-broadcom-linux-uclibcgnueabi +KERNDIR ?= $(TOOLCHAIN_BASE_DIR)/kernel/linux +endif + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE:= $(TARGET_ARCHITECTURE)- +endif + +# arm9tools +TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/bin +override PATH:=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/$(TARGET_ARCHITECTURE)/bin:$(TOOLCHAIN_BIN_DIR):$(PATH) +LD_LIBRARY_PATH=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/lib + +export TOOLCHAIN_BIN_DIR LD_LIBRARY_PATH + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +ifeq (BE,$(ENDIAN_MODE)) +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +else +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 +ENDIAN = LE_HOST=1 +endif + +CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD +CFGFLAGS += -DBCM_PLATFORM_STRING=\"IPROC_CMICD\" + +ARCH = arm +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +KFLAG_INCLD ?= $(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/lib/gcc/$(TARGET_ARCHITECTURE)/4.9.3/include + +ifeq (,$(KFLAGS)) +KFLAGS := -D__LINUX_ARM_ARCH__=7 -D__KERNEL__ -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm/include -I$(KERNDIR)/arch/arm/include/generated -I$(KERNDIR)/arch/arm/mach-iproc/include -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -marm -mabi=aapcs-linux -fno-pic -pipe -msoft-float -ffreestanding -march=armv7-a -mfpu=vfp -mfloat-abi=softfp -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls +KFLAGS += -I$(LINUX_INCLUDE)/uapi -I$(LINUX_INCLUDE)/generated/uapi -I$(KERNDIR)/arch/arm/include/uapi -I$(KERNDIR)/arch/arm/include/generated/uapi +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-3_6 +endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 new file mode 100644 index 00000000000..723fea6c73c --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 @@ -0,0 +1,103 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-iproc-3_6,v 1.1 Broadcom SDK $ +# $Copyright: (c) 2007 Broadcom Corp. +# All Rights Reserved.$ +# Makefile for iproc-CMICd + +# User must select one platform from below.By default ARM_LINUX is selected. . +ifeq (,$(BUILD_PLATFORM)) +BUILD_PLATFORM=ARM_LINUX +endif + +# TOOLCHAIN_BASE_DIR Toolchain base directory for iPROC-CMICd devices +# TARGET_ARCHITECTURE Compiler for target architecture +# KERNDIR Kernel directory for iPROC-CMICd devices +ifeq (BE,$(ENDIAN_MODE)) +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk37-be/buildroot-2013.11-gcc48-opt-broadcom +TARGET_ARCHITECTURE:=armeb-buildroot-linux-gnueabi +KERNDIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk37-be/XLDK/kernel/linux +else +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk37/XLDK +TARGET_ARCHITECTURE:= arm-broadcom-linux-uclibcgnueabi +KERNDIR ?= $(TOOLCHAIN_BASE_DIR)/kernel/linux +endif + + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE:= $(TARGET_ARCHITECTURE)- +endif + +# arm9tools +ifeq (BE,$(ENDIAN_MODE)) +TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_BASE_DIR)/host/usr/bin +override PATH:=$(TOOLCHAIN_BASE_DIR)/host/usr/$(TARGET_ARCHITECTURE)/bin:$(TOOLCHAIN_BIN_DIR):$(PATH) +LD_LIBRARY_PATH=$(TOOLCHAIN_BASE_DIR)/host/usr/lib +else +TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_BASE_DIR)/buildroot/usr/bin +override PATH:=$(TOOLCHAIN_BASE_DIR)/buildroot/usr/$(TARGET_ARCHITECTURE)/bin:$(TOOLCHAIN_BIN_DIR):$(PATH) +LD_LIBRARY_PATH=$(TOOLCHAIN_BASE_DIR)/buildroot/usr/lib +endif + +export TOOLCHAIN_BIN_DIR LD_LIBRARY_PATH + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +ifeq (BE,$(ENDIAN_MODE)) +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +else +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 +ENDIAN = LE_HOST=1 +endif + +CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD +CFGFLAGS += -DBCM_PLATFORM_STRING=\"IPROC_CMICD\" + +ARCH = arm +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +ifeq (BE,$(ENDIAN_MODE)) +KFLAG_INCLD ?= $(TOOLCHAIN_BASE_DIR)/host/usr/lib/gcc/$(TARGET_ARCHITECTURE)/4.8.2/include +else +KFLAG_INCLD ?= $(TOOLCHAIN_BASE_DIR)/buildroot/usr/lib/gcc/$(TARGET_ARCHITECTURE)/4.7.2/include +endif + +ifeq (,$(KFLAGS)) +KFLAGS := -D__LINUX_ARM_ARCH__=7 -D__KERNEL__ -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm/include -I$(KERNDIR)/arch/arm/include/generated -I$(KERNDIR)/arch/arm/mach-northstar/include -I$(KERNDIR)/arch/arm/plat-iproc/include -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -marm -mabi=aapcs-linux -fno-pic -pipe -msoft-float -ffreestanding -march=armv7-a -mfpu=vfp -mfloat-abi=softfp -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls +KFLAGS += -I$(LINUX_INCLUDE)/uapi -I$(LINUX_INCLUDE)/generated/uapi -I$(KERNDIR)/arch/arm/include/uapi -I$(KERNDIR)/arch/arm/include/generated/uapi +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-3_6 +endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-jag-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-jag-2_6 new file mode 100644 index 00000000000..1e89cdab243 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-jag-2_6 @@ -0,0 +1,166 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-jag-2_6,v 1.20 Broadcom SDK $ +# $Copyright: (c) 2007 Broadcom Corp. +# All Rights Reserved.$ + + +# User must select one platform from below.By default WR_LINUX is selected. . +ifeq (,$(BUILD_PLATFORM)) +#BUILD_PLATFORM=ELDK +BUILD_PLATFORM=WR_LINUX +endif + + +# Specify the KERNEL VERSION you want to use for building SDK. +ifeq (ELDK,$(BUILD_PLATFORM)) +ifeq (,$(KERN_VER)) +KERN_VER=2.6.21.7 +endif +endif + +# Specify the Windriver Linux version here.For example '2.0' as shown below. +ifeq (WR_LINUX,$(BUILD_PLATFORM)) +ifeq (,$(WRS_LINUX_VERSION)) +WRS_LINUX_VERSION=2.0 +endif +endif + +ifeq (WR_LINUX,$(BUILD_PLATFORM)) +ifeq (1.4,$(WRS_LINUX_VERSION)) + +KERNDIR := /projects/ntsw-tools/linux/wrslinux_1.4/broadcom_bcm95836cpci_be/build/linux-2.6.14-small + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips-wrs-linux-gnu- +endif + +export WIND_LIC_PROXY = /projects/ntsw-tools/wrs/wrs_linux/GPP_LE_1.4_PPR/setup/x86-linux2/bin + +override PATH := /projects/ntsw-tools/wrs/wrs_linux/GPP_LE_1.4_PPR/gnu/3.4.4-wrlinux-1.4/x86-linux2/bin:$(PATH) +endif + +ifeq (2.0,$(WRS_LINUX_VERSION)) + +#CROSS_COMPILE = mips-wrs-linux-gnu- + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips-wrs-linux-gnu-mips_softfp-glibc_std- +endif + +KERNDIR:= /projects/ntsw-tools/linux/wrslinux_2.0/jag/glibc_std/build/linux-2.6.21-standard + +endif + +WRLINUX_BASE=/tools/windriver/linux_ed/2.0_GA/Linux + +TOOLCHAIN_BIN_DIR=$(KERNDIR)/../../host-cross/mips-wrs-linux-gnu/bin +WIND_LIC_PROXY=$(WRLINUX_BASE)/setup/x86-linux2/bin + +WRLINUX_GNU_PATH=$(WRLINUX_BASE)/gnu/4.1-wrlinux-2.0/x86-linux2/bin + +override PATH:=$(KERNDIR)/../../host-cross/bin:$(KERNDIR)/../../host-cross/mips-wrs-linux-gnu/bin:$(WRLINUX_GNU_PATH):$(PATH) + +WRS_SYSROOT_PATH := $(WRLINUX_GNU_PATH)/../lib/gcc/mips-wrs-linux-gnu/4.1.2/include + +export TOOLCHAIN_BIN_DIR WIND_LIC_PROXY +endif + +ifeq (ELDK,$(BUILD_PLATFORM)) +ifeq (2.6.21.7, $(KERN_VER)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips_4KC- +endif + +override PATH := /tools/eldk/4.1/usr/bin:$(PATH) +KERNDIR ?= /projects/ntsw-tools/linux/eldk/jag-ntswics-eldk/linux-2.6.21.7 +endif +endif + + + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=1 -DSYS_BE_OTHER=0 +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"JAG_BCM4704\" + +ARCH = mips +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + +ifeq (ELDK,$(BUILD_PLATFORM)) +KFLAG_INCLD = /tools/eldk/4.1/usr/lib/gcc/mips-linux/4.0.0/include/ +endif + +ifeq (1.4,$(WRS_LINUX_VERSION)) +# From linux/arch/mips/Makefile + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -Wall -Wno-trigraphs -fno-strict-aliasing -fno-common -ffreestanding -O2 -fomit-frame-pointer -g -G 0 -mno-abicalls -fno-pic -pipe -march=mips32 -Wa,-mips32 -Wa,--trap -funit-at-a-time -mlong-calls -Wundef -finline-limit=100000 -mabi=32 +endif + +#-Wdeclaration-after-statement -Wstrict-prototypes +else + +ifeq (2.0,$(WRS_LINUX_VERSION)) + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -nostdinc -isystem $(WRS_SYSROOT_PATH) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/linux/autoconf.h -I$(KERNDIR)/arch/mips -I$(KERNDIR)/arch/mips -I$(KERNDIR)/arch/mips/include -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -mabi=32 -G 0 -mno-abicalls -fno-pic -pipe -msoft-float -ffreestanding -march=mips32 -Wa,-mips32 -Wa,--trap -Iinclude/asm-mips/mach-bcm947xx -Iinclude/asm-mips/mach-generic -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls +endif + +endif +endif + +ifeq (ELDK,$(BUILD_PLATFORM)) + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/linux/autoconf.h -I$(KERNDIR)/arch/mips -I$(KERNDIR)/arch/mips -I$(KERNDIR)/arch/mips/include -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -mabi=32 -G 0 -mno-abicalls -fno-pic -pipe -msoft-float -ffreestanding -march=mips32 -Wa,-mips32 -Wa,--trap -Iinclude/asm-mips/mach-bcm947xx -Iinclude/asm-mips/mach-generic -fomit-frame-pointer -g -Wdeclaration-after-statement -mlong-calls +endif + +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif + +ifneq (,$(findstring TCL,$(FEATURE_LIST))) +LINK_STATIC=0 +export LINK_STATIC +endif + + + + diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel new file mode 100644 index 00000000000..7cbf8451f91 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel @@ -0,0 +1,112 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-kernel,v 1.27 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Configuration Flags + +# Filter out features that cannot or should not be supported in kernel mode +_FEATURE_EXCLUDE_LIST += EDITLINE TCL OOB_RCPU CINT APIMODE DUNE_UI C_UNIT +FEATURE_EXCLUDE_LIST = $(sort $(_FEATURE_EXCLUDE_LIST)) +# Tools + +CC = $(CROSS_COMPILE)gcc +CXX = $(CROSS_COMPILE)g++ +LD = $(CROSS_COMPILE)ld +AR = $(CROSS_COMPILE)ar +ARFLAGS = -rc +STRIP = $(CROSS_COMPILE)strip +RANLIB = $(CROSS_COMPILE)ranlib +OBJCOPY = $(CROSS_COMPILE)objcopy + +# Handle differences between gcc 2.x and gcc 3.x +gcc-tune-flag = $(shell if ${CC} -dumpspecs | grep mcpu >/dev/null; then echo cpu; else echo tune; fi) + +# Configuration Variables + +# OSType Defines: This defines the type of RTOS or microkernel which you +# are compiling the SAL (and its associated driver) for. New platforms +# can be created by porting the routines (system.c) to your platform and +# adding the define in this Makefile. + +OSTYPE = LINUX + +# +# ORIGIN is used to Optionally select different CFLAGS. It is used to import +# source from other vendors. If SOURCE=Broadcom, then the BCM_ flags are added +# to those passed to the compiler. If SOURCE != Broadcom, BCM_ flags are NOT +# added. +# +# Default specifies Broadcom +# +ifndef ORIGIN + ORIGIN = Broadcom +endif + +# +# STD_{C|CPP|CXX}FLAGS - Standard flags used by ALL compilations +# BCM_{C|CPP|CXX}FLAGS - Flags used for Broadcom source files +# OPT_{C|CPP|CXX}FLAGS - Defined in local make files BEFORE inclusion of +# this Makefile, to define local "Extra" flags. +# + +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) + +CFGFLAGS += -DNO_FILEIO -DNO_CTRL_C -DNO_MEMTUNE + +CFGFLAGS += -D$(OSTYPE) + +# No user sal for the linux kernel +# NO_SAL_APPL=1 + +STD_CFLAGS = $(KFLAGS) $(CFGFLAGS) + + +STD_CPPFLAGS = ${STD_CFLAGS} +STD_CXXFLAGS = ${STD_CFLAGS} + +BCM_CFLAGS = -Wall -Werror +BCM_CPPFLAGS = ${BCM_CFLAGS} +BCM_CXXFLAGS = ${BCM_CFLAGS} + +ifeq (${ORIGIN}, Broadcom) + CFLAGS += ${STD_CFLAGS} ${BCM_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${BCM_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${BCM_CXXFLAGS} ${OPT_CXXFLAGS} +else + CFLAGS += ${STD_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${OPT_CXXFLAGS} +endif + +# +# Ignore pedantic flag for kernel modules +# +ifdef DEBUG_PEDANTIC +DEBUG_PEDANTIC = FALSE +endif + +# +# DEPEND is used as a command to generate the list of dependencies. +# The format of the output must be +# "file.o : file.c a/b/c.h d/e/f.h ...", +# if it is on multiple lines, each line must end in a backslash. +# The output MUST be on standard out. +# +DEPEND = ${CC} -M $(CFLAGS) $< diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 new file mode 100644 index 00000000000..559f2ae5e5e --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 @@ -0,0 +1,148 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-kernel-2_6,v 1.40 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Configuration Flags + +# Filter out features that cannot or should not be supported in kernel mode + +_FEATURE_EXCLUDE_LIST += EDITLINE TCL OOB_RCPU CINT APIMODE DUNE_UI C_UNIT +FEATURE_EXCLUDE_LIST = $(sort $(_FEATURE_EXCLUDE_LIST)) + +# Tools + +# Conditionally Replaces DEFAULT var +ifeq ($(origin CC),default) +CC = $(LSRUN) $(CROSS_COMPILE)gcc +endif + +ifeq ($(origin CXX),default) +CXX = $(CROSS_COMPILE)g++ +endif + +ifeq ($(origin LD),default) +LD = $(CROSS_COMPILE)ld +endif + +ifeq ($(origin AR),default) +AR = $(CROSS_COMPILE)ar +endif + +ifeq ($(origin AS),default) +AS = $(CROSS_COMPILE)as +endif + +ifeq ($(origin ARFLAGS),default) + ARFLAGS = -rc +endif + +STRIP = $(CROSS_COMPILE)strip +RANLIB = $(CROSS_COMPILE)ranlib +OBJCOPY = $(CROSS_COMPILE)objcopy +NM = $(CROSS_COMPILE)nm + +# Handle differences between gcc 2.x and gcc 3.x +gcc-tune-flag = $(shell if ${CC} -dumpspecs | grep mcpu >/dev/null; then echo cpu; else echo tune; fi) + +# Configuration Variables + +# OSType Defines: This defines the type of RTOS or microkernel which you +# are compiling the SAL (and its associated driver) for. New platforms +# can be created by porting the routines (system.c) to your platform and +# adding the define in this Makefile. + +OSTYPE = LINUX + +# +# ORIGIN is used to Optionally select different CFLAGS. It is used to import +# source from other vendors. If SOURCE=Broadcom, then the BCM_ flags are added +# to those passed to the compiler. If SOURCE != Broadcom, BCM_ flags are NOT +# added. +# +# Default specifies Broadcom +# +ifndef ORIGIN + ORIGIN = Broadcom +endif + +# +# STD_{C|CPP|CXX}FLAGS - Standard flags used by ALL compilations +# BCM_{C|CPP|CXX}FLAGS - Flags used for Broadcom source files +# OPT_{C|CPP|CXX}FLAGS - Defined in local make files BEFORE inclusion of +# this Makefile, to define local "Extra" flags. +# + +ifdef IPROC_BUILD +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) \ + -I$(KERNDIR)/arch/$(ARCH) +else +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) \ + -I$(LINUX_INCLUDE)/asm/gcc \ + -I$(LINUX_INCLUDE)/asm/mach-generic \ + -I$(KERNDIR)/arch/$(ARCH) +endif + +CFGFLAGS += -DNO_FILEIO -DNO_CTRL_C -DNO_MEMTUNE + +CFGFLAGS += -D$(OSTYPE) + +# No user sal for the linux kernel +# NO_SAL_APPL=1 + +STD_CFLAGS = $(KFLAGS) $(CFGFLAGS) + + +STD_CPPFLAGS = ${STD_CFLAGS} +STD_CXXFLAGS = ${STD_CFLAGS} + +ifndef BCM_CFLAGS +BCM_CFLAGS = -Wall -Werror +endif + +BCM_CPPFLAGS = ${BCM_CFLAGS} +BCM_CXXFLAGS = ${BCM_CFLAGS} + +ifeq (${ORIGIN}, Broadcom) + CFLAGS += ${STD_CFLAGS} ${BCM_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${BCM_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${BCM_CXXFLAGS} ${OPT_CXXFLAGS} +else + CFLAGS += ${STD_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${OPT_CXXFLAGS} +endif + +# +# Ignore pedantic flag for kernel modules +# +ifdef DEBUG_PEDANTIC +DEBUG_PEDANTIC = FALSE +endif + +# +# DEPEND is used as a command to generate the list of dependencies. +# The format of the output must be +# "file.o : file.c a/b/c.h d/e/f.h ...", +# if it is on multiple lines, each line must end in a backslash. +# The output MUST be on standard out. +# +DEPEND = ${CC} -M $(CFLAGS) $< diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 new file mode 100644 index 00000000000..0d54c4474fc --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 @@ -0,0 +1,148 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-kernel-3_6,v 1.2 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Configuration Flags + +# Filter out features that cannot or should not be supported in kernel mode + +_FEATURE_EXCLUDE_LIST += EDITLINE TCL OOB_RCPU CINT APIMODE DUNE_UI +FEATURE_EXCLUDE_LIST = $(sort $(_FEATURE_EXCLUDE_LIST)) + +# Tools + +# Conditionally Replaces DEFAULT var +ifeq ($(origin CC),default) +CC = $(LSRUN) $(CROSS_COMPILE)gcc +endif + +ifeq ($(origin CXX),default) +CXX = $(CROSS_COMPILE)g++ +endif + +ifeq ($(origin LD),default) +LD = $(CROSS_COMPILE)ld +endif + +ifeq ($(origin AR),default) +AR = $(CROSS_COMPILE)ar +endif + +ifeq ($(origin AS),default) +AS = $(CROSS_COMPILE)as +endif + +ifeq ($(origin ARFLAGS),default) + ARFLAGS = -rc +endif + +STRIP = $(CROSS_COMPILE)strip +RANLIB = $(CROSS_COMPILE)ranlib +OBJCOPY = $(CROSS_COMPILE)objcopy +NM = $(CROSS_COMPILE)nm + +# Handle differences between gcc 2.x and gcc 3.x +gcc-tune-flag = $(shell if ${CC} -dumpspecs | grep mcpu >/dev/null; then echo cpu; else echo tune; fi) + +# Configuration Variables + +# OSType Defines: This defines the type of RTOS or microkernel which you +# are compiling the SAL (and its associated driver) for. New platforms +# can be created by porting the routines (system.c) to your platform and +# adding the define in this Makefile. + +OSTYPE = LINUX + +# +# ORIGIN is used to Optionally select different CFLAGS. It is used to import +# source from other vendors. If SOURCE=Broadcom, then the BCM_ flags are added +# to those passed to the compiler. If SOURCE != Broadcom, BCM_ flags are NOT +# added. +# +# Default specifies Broadcom +# +ifndef ORIGIN + ORIGIN = Broadcom +endif + +# +# STD_{C|CPP|CXX}FLAGS - Standard flags used by ALL compilations +# BCM_{C|CPP|CXX}FLAGS - Flags used for Broadcom source files +# OPT_{C|CPP|CXX}FLAGS - Defined in local make files BEFORE inclusion of +# this Makefile, to define local "Extra" flags. +# + +ifdef IPROC_BUILD +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) \ + -I$(KERNDIR)/arch/$(ARCH) +else +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) \ + -I$(LINUX_INCLUDE)/asm/gcc \ + -I$(LINUX_INCLUDE)/asm/mach-generic \ + -I$(KERNDIR)/arch/$(ARCH) +endif + +CFGFLAGS += -DNO_FILEIO -DNO_CTRL_C -DNO_MEMTUNE + +CFGFLAGS += -D$(OSTYPE) + +# No user sal for the linux kernel +# NO_SAL_APPL=1 + +STD_CFLAGS = $(KFLAGS) $(CFGFLAGS) + + +STD_CPPFLAGS = ${STD_CFLAGS} +STD_CXXFLAGS = ${STD_CFLAGS} + +ifndef BCM_CFLAGS +BCM_CFLAGS = -Wall -Werror +endif + +BCM_CPPFLAGS = ${BCM_CFLAGS} +BCM_CXXFLAGS = ${BCM_CFLAGS} + +ifeq (${ORIGIN}, Broadcom) + CFLAGS += ${STD_CFLAGS} ${BCM_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${BCM_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${BCM_CXXFLAGS} ${OPT_CXXFLAGS} +else + CFLAGS += ${STD_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${OPT_CXXFLAGS} +endif + +# +# Ignore pedantic flag for kernel modules +# +ifdef DEBUG_PEDANTIC +DEBUG_PEDANTIC = FALSE +endif + +# +# DEPEND is used as a command to generate the list of dependencies. +# The format of the output must be +# "file.o : file.c a/b/c.h d/e/f.h ...", +# if it is on multiple lines, each line must end in a backslash. +# The output MUST be on standard out. +# +DEPEND = ${CC} -M $(CFLAGS) $< diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 new file mode 100644 index 00000000000..0e8e22e1b32 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 @@ -0,0 +1,157 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-kernel-2_6,v 1.40 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Configuration Flags + +# Filter out features that cannot or should not be supported in kernel mode + +_FEATURE_EXCLUDE_LIST += EDITLINE TCL OOB_RCPU CINT APIMODE DUNE_UI C_UNIT +FEATURE_EXCLUDE_LIST = $(sort $(_FEATURE_EXCLUDE_LIST)) + +# Tools + +# Conditionally Replaces DEFAULT var +ifeq ($(origin CC),default) +CC = $(LSRUN) $(CROSS_COMPILE)gcc +endif + +ifeq ($(origin CXX),default) +CXX = $(CROSS_COMPILE)g++ +endif + +ifeq ($(origin LD),default) +LD = $(CROSS_COMPILE)ld +endif + +ifeq ($(origin AR),default) +AR = $(CROSS_COMPILE)ar +endif + +ifeq ($(origin AS),default) +AS = $(CROSS_COMPILE)as +endif + +ifeq ($(origin ARFLAGS),default) + ARFLAGS = -rc +endif + +STRIP = $(CROSS_COMPILE)strip +RANLIB = $(CROSS_COMPILE)ranlib +OBJCOPY = $(CROSS_COMPILE)objcopy +NM = $(CROSS_COMPILE)nm + +# Handle differences between gcc 2.x and gcc 3.x +gcc-tune-flag = $(shell if ${CC} -dumpspecs | grep mcpu >/dev/null; then echo cpu; else echo tune; fi) + +# Configuration Variables + +# OSType Defines: This defines the type of RTOS or microkernel which you +# are compiling the SAL (and its associated driver) for. New platforms +# can be created by porting the routines (system.c) to your platform and +# adding the define in this Makefile. +OSTYPE = LINUX + +# +# ORIGIN is used to Optionally select different CFLAGS. It is used to import +# source from other vendors. If SOURCE=Broadcom, then the BCM_ flags are added +# to those passed to the compiler. If SOURCE != Broadcom, BCM_ flags are NOT +# added. +# +# Default specifies Broadcom +# +ifndef ORIGIN + ORIGIN = Broadcom +endif + +# +# STD_{C|CPP|CXX}FLAGS - Standard flags used by ALL compilations +# BCM_{C|CPP|CXX}FLAGS - Flags used for Broadcom source files +# OPT_{C|CPP|CXX}FLAGS - Defined in local make files BEFORE inclusion of +# this Makefile, to define local "Extra" flags. +# +ifdef IPROC_BUILD +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) \ + -I$(LINUX_INCLUDE)/uapi \ + -I$(LINUX_INCLUDE)/generated/uapi \ + -I$(KERNDIR)/arch/$(ARCH) \ + -I$(KERNDIR)/arch/$(ARCH)/include/uapi \ + -I$(KERNDIR)/arch/$(ARCH)/include/generated \ + -I$(KERNDIR)/arch/$(ARCH)/include/generated/uapi +else +CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \ + -I$(SDK)/systems/bde/linux/include \ + -I$(LINUX_INCLUDE) \ + -I$(LINUX_INCLUDE)/asm/gcc \ + -I$(LINUX_INCLUDE)/asm/mach-generic \ + -I$(LINUX_INCLUDE)/uapi \ + -I$(LINUX_INCLUDE)/generated/uapi \ + -I$(KERNDIR)/arch/$(ARCH) \ + -I$(KERNDIR)/arch/$(ARCH)/include/uapi \ + -I$(KERNDIR)/arch/$(ARCH)/include/generated \ + -I$(KERNDIR)/arch/$(ARCH)/include/generated/uapi +endif + +CFGFLAGS += -DNO_FILEIO -DNO_CTRL_C -DNO_MEMTUNE + +CFGFLAGS += -D$(OSTYPE) + +# No user sal for the linux kernel +# NO_SAL_APPL=1 + +STD_CFLAGS = $(KFLAGS) $(CFGFLAGS) + + +STD_CPPFLAGS = ${STD_CFLAGS} +STD_CXXFLAGS = ${STD_CFLAGS} + +ifndef BCM_CFLAGS +BCM_CFLAGS = -Wall -Werror +endif + +BCM_CPPFLAGS = ${BCM_CFLAGS} +BCM_CXXFLAGS = ${BCM_CFLAGS} + +ifeq (${ORIGIN}, Broadcom) + CFLAGS += ${STD_CFLAGS} ${BCM_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${BCM_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${BCM_CXXFLAGS} ${OPT_CXXFLAGS} +else + CFLAGS += ${STD_CFLAGS} ${OPT_CFLAGS} + CPPFLAGS += ${STD_CPPFLAGS} ${OPT_CPPFLAGS} + CXXFLAGS += ${STD_CXXFLAGS} ${OPT_CXXFLAGS} +endif + +# +# Ignore pedantic flag for kernel modules +# +ifdef DEBUG_PEDANTIC +DEBUG_PEDANTIC = FALSE +endif + +# +# DEPEND is used as a command to generate the list of dependencies. +# The format of the output must be +# "file.o : file.c a/b/c.h d/e/f.h ...", +# if it is on multiple lines, each line must end in a backslash. +# The output MUST be on standard out. +# +DEPEND = ${CC} -M $(CFLAGS) $< + diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule b/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule new file mode 100644 index 00000000000..3ad11d169c6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule @@ -0,0 +1,81 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-kmodule-3_6,v 1.2 Broadcom SDK $ +# $Copyright: (c) 2006 Broadcom Corp. +# All Rights Reserved.$ + +# Due to the extensive use of driver libraries, the SDK usually builds +# kernel modules from a precompiled object. To avoid various warnings +# and conflicts, the pre-compiled object must be named differently +# from the target module, and the object file itself should be +# appended with "_shipped". + +# If a module exports any symbols, then the exporting source file must +# be compiled within the kernel source tree for correct generation of +# module symbol versions. The symbol source file should be passed to +# this Makefile via the MODULE_SYM variable. + +MODULE := $(MOD_NAME).o +KMODULE := $(MOD_NAME).ko +PRE_COMPILED_OBJ := obj_$(MOD_NAME).o + +obj-m := $(MODULE) +$(MOD_NAME)-y := $(MODULE_SYM) $(PRE_COMPILED_OBJ) + + +ifeq (,$(CROSS_COMPILE)) + +export CROSS_COMPILE + +endif + +SAVE_CFLAGS := ${CFLAGS} + +include $(SDK)/make/Make.config + +PWD := $(shell pwd) + +ifneq ($(ARCH),) +# ELDK does not seem to `automatically' define ARCH where other gccs may +A := ARCH=$(ARCH) +export ARCH +endif + +# Provide an option in case kernel was built in separate directory +KERNBLDDIR ?= $(KERNDIR) + +# Standard SDK include path for building source files that export +# kernel symbols. + +override EXTRA_CFLAGS = -I${SDK}/include -I${SDK}/systems/linux/kernel/modules/include -I${SDK}/systems/bde/linux/include + +# The precopiled object needs a dummy command file to avoid warnings +# from the Kbuild scripts (modpost stage). +# Kernels before 2.6.17 do not support external module symbols files, +# so we create a dummy to prevent build failures. + +$(KMODULE): + rm -f *.o *.ko .*.cmd + rm -fr .tmp_versions + ln -s $(LIBDIR)/$(MODULE) $(PRE_COMPILED_OBJ)_shipped + echo "suppress warning" > .$(PRE_COMPILED_OBJ).cmd + $(MAKE) -C $(KERNBLDDIR) CROSS_COMPILE=$(CROSS_COMPILE) M=$(PWD) modules + if [ ! -f Module.symvers ]; then echo "old kernel (pre-2.6.17)" > Module.symvers; fi + cp -f $(KMODULE) $(LIBDIR) + rm -f $(PRE_COMPILED_OBJ)_shipped + +EXTRA_CFLAGS = $(CFLAGS) +CFLAGS := ${SAVE_CFLAGS} diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-nsx-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-nsx-2_6 new file mode 100644 index 00000000000..785619f31fd --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-nsx-2_6 @@ -0,0 +1,56 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-nsx-2_6,v 1.9 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Look for custom tools +ifneq (,$(MIPS_TOOLS_DIR)) +override PATH := $(MIPS_TOOLS_DIR):$(PATH) +endif +ifneq (,$(MIPS_CROSS_COMPILE)) +override CROSS_COMPILE := $(MIPS_CROSS_COMPILE) +endif + +# Default tools +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips2_fp_be- +override PATH := $(PATH):/projects/ntsw-tools/linux/mvista/mvista-4.0/pro/devkit/mips/mips2_fp_be/bin +endif + +# Default Linux Kernel directory +ifeq (,$(KERNDIR)) +KERNDIR := /projects/ntsw-tools/linux/mvista/mvista-4.0-nsx/linux-2.6.10_dev +endif +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"NSX_BCM1125\" + +# From linux/arch/mips/Makefile + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -O2 -fomit-frame-pointer -fno-strict-aliasing -G 0 -mno-abicalls -fno-pic -mips64 -mtune=sb1 -Wa,--trap -pipe -mlong-calls +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-nsx64 b/platform/broadcom/saibcm-modules/make/Makefile.linux-nsx64 new file mode 100644 index 00000000000..c4f71995be5 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-nsx64 @@ -0,0 +1,54 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-nsx64,v 1.9 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Look for custom tools +ifneq (,$(MIPS_TOOLS_DIR)) +override PATH := $(MIPS_TOOLS_DIR):$(PATH) +endif +ifneq (,$(MIPS_CROSS_COMPILE)) +override CROSS_COMPILE := $(MIPS_CROSS_COMPILE) +endif + +# Default tools +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips64_fp_be- +override PATH := $(PATH):/projects/ntsw-tools/linux/mvista/mips64_be_tools-3.1/bin +endif + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE = /projects/ntsw-tools/linux/headers/mvl-3.1-nsx64/include +endif + +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) -Wa,-xgot -mips64 -mabi=64 -fno-strict-aliasing -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS +CFGFLAGS += -DBCM_PLATFORM_STRING=\"NSX_BCM1125\" + +# From linux/arch/mips/Makefile + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -O2 -fomit-frame-pointer -fno-strict-aliasing -G 0 -mno-abicalls -fno-pic -mips64 -mabi=64 -mtune=sb1 -Wa,--trap -pipe -mlong-calls +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel +endif + +MODULE_LDFLAGS += -m elf64btsmip diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-nsx_wrl-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-nsx_wrl-2_6 new file mode 100644 index 00000000000..7b549038fd2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-nsx_wrl-2_6 @@ -0,0 +1,127 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-nsx_wrl-2_6,v 1.15 Broadcom SDK $ +# $Copyright: (c) 2007 Broadcom Corp. +# All Rights Reserved.$ + +ifeq (,$(WRS_LINUX_VERSION)) +WRS_LINUX_VERSION=2.0 +endif + +# Look for custom tools +ifneq (,$(MIPS_TOOLS_DIR)) +ifneq (,$(MIPS_CROSS_COMPILE)) +override PATH := $(MIPS_TOOLS_DIR):$(PATH) +override CROSS_COMPILE := $(MIPS_CROSS_COMPILE) +endif +endif + +# Default Linux Kernel directory +ifeq (,$(KERNDIR)) + +ifeq (1.4,$(WRS_LINUX_VERSION)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips-wrs-linux-gnu- +endif + +KERNDIR := /projects/ntsw-tools/linux/wrslinux_1.4/broadcom_bcm91125cpci_32_be_glibc_std/build/linux-2.6.14-cgl + +export WIND_LIC_PROXY = /projects/ntsw-tools/wrs/wrs_linux/GPP_LE_1.4_PPR/setup/x86-linux2/bin +override PATH := /projects/ntsw-tools/wrs/wrs_linux/GPP_LE_1.4_PPR/gnu/3.4.4-wrlinux-1.4/x86-linux2/bin:$(PATH) +else + +ifeq (2.0,$(WRS_LINUX_VERSION)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips-wrs-linux-gnu-mips-glibc_std- +endif + +KERNDIR:= /projects/ntsw-tools/linux/wrslinux_2.0/nsx/glibc_std/build/linux-2.6.21-standard + +WRLINUX_BASE=/tools/windriver/linux_ed/2.0_GA/Linux + +TOOLCHAIN_BIN_DIR=$(KERNDIR)/../../host-cross/mips-wrs-linux-gnu/bin +WIND_LIC_PROXY=$(WRLINUX_BASE)/setup/x86-linux2/bin + +WRLINUX_GNU_PATH=$(WRLINUX_BASE)/gnu/4.1-wrlinux-2.0/x86-linux2/bin +override PATH:=$(KERNDIR)/../../host-cross/bin:$(KERNDIR)/../../host-cross/mips-wrs-linux-gnu/bin:$(WRLINUX_GNU_PATH):$(PATH) + +WRS_SYSROOT_PATH := $(WRLINUX_GNU_PATH)/../lib/gcc/mips-wrs-linux-gnu/4.1.2/include + +export TOOLCHAIN_BIN_DIR WIND_LIC_PROXY + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +endif +endif +endif + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"NSX_BCM1125\" + +ARCH = mips +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + +ifeq (1.4,$(WRS_LINUX_VERSION)) +# From Linux Kbuild output + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -Iinclude -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -ffreestanding -O2 -fomit-frame-pointer -g -G 0 -mno-abicalls -fno-pic -pipe -finline-limit=100000 -mabi=32 -march=sb1 -Wa,-32 -Wa,-march=sb1 -Wa,-mips64 -Wa,--trap -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL -mlong-calls +#-Wdeclaration-after-statement +endif + +else + +ifeq (2.0,$(WRS_LINUX_VERSION)) + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -nostdinc -isystem $(WRS_SYSROOT_PATH) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/linux/autoconf.h -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -mabi=32 -G 0 -mno-abicalls -fno-pic -pipe -msoft-float -ffreestanding -march=sb1 -Wa,--trap -Iinclude/asm-mips/mach-sibyte -Iinclude/asm-mips/mach-generic -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls +endif + +endif +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif + + +ifneq (,$(findstring TCL,$(FEATURE_LIST))) +LINK_STATIC=0 +export LINK_STATIC +endif + + diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-raptor b/platform/broadcom/saibcm-modules/make/Makefile.linux-raptor new file mode 100644 index 00000000000..80c51e782be --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-raptor @@ -0,0 +1,53 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-raptor,v 1.6 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# Look for custom tools +ifneq (,$(MIPS_TOOLS_DIR)) +override PATH := $(MIPS_TOOLS_DIR):$(PATH) +endif +ifneq (,$(MIPS_CROSS_COMPILE)) +override CROSS_COMPILE := $(MIPS_CROSS_COMPILE) +endif + +# Default tools +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips_fp_be- +override PATH := $(PATH):/projects/ntsw-tools/linux/mvista/mvista-3.1/pro/devkit/mips/fp_be/bin +endif + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE = /projects/ntsw-tools/linux/headers/mvl-3.1-raptor/include +endif + +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=1 -DSYS_BE_OTHER=0 -DBCM_ICS +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"Raptor_BCM56218\" + + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel +endif + +# From linux/arch/mips/Makefile + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe -m$(gcc-tune-flag)=r4600 -mips2 -Wa,--trap -mlong-calls +endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-raptor-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-raptor-2_6 new file mode 100644 index 00000000000..0bebdf9564c --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-raptor-2_6 @@ -0,0 +1,172 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-raptor-2_6,v 1.21 Broadcom SDK $ +# $Copyright: (c) 2007 Broadcom Corp. +# All Rights Reserved.$ + + +# User must select one platform from below.By default WR_LINUX is selected. . +ifeq (,$(BUILD_PLATFORM)) +#BUILD_PLATFORM=ELDK +BUILD_PLATFORM=WR_LINUX +endif + + +# Specify the KERNEL VERSION you want to use for building SDK. +ifeq (ELDK,$(BUILD_PLATFORM)) +ifeq (,$(KERN_VER)) +KERN_VER=2.6.21.7 +endif +endif + +# Specify the Windriver Linux version here.For example '2.0' as shown below. +ifeq (WR_LINUX,$(BUILD_PLATFORM)) +ifeq (,$(WRS_LINUX_VERSION)) +WRS_LINUX_VERSION=2.0 +endif +endif + + +# Default Linux Kernel directory +ifeq (WR_LINUX,$(BUILD_PLATFORM)) +ifeq (1.4,$(WRS_LINUX_VERSION)) + +KERNDIR ?= /projects/ntsw-tools/linux/wrslinux_1.4/broadcom_bcm95621x_be/build/linux-2.6.14-small + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips-wrs-linux-gnu- +endif + +export WIND_LIC_PROXY = /projects/ntsw-tools/wrs/wrs_linux/GPP_LE_1.4_PPR/setup/x86-linux2/bin + +override PATH := /projects/ntsw-tools/wrs/wrs_linux/GPP_LE_1.4_PPR/gnu/3.4.4-wrlinux-1.4/x86-linux2/bin:$(PATH) +endif + +ifeq (2.0,$(WRS_LINUX_VERSION)) + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips-wrs-linux-gnu-mips_softfp-glibc_std- +endif + +KERNDIR ?= /projects/ntsw-tools/linux/wrslinux_2.0/ntswics/glibc_std/build/linux-2.6.21-standard +override PATH:=$(KERNDIR)/../../host-cross/bin:$(KERNDIR)/../../host-cross/mips-wrs-linux-gnu/bin:$(WRLINUX_GNU_PATH):$(PATH) + +endif + +WRLINUX_BASE=/tools/windriver/linux_ed/2.0_GA/Linux + +TOOLCHAIN_BIN_DIR=$(KERNDIR)/../../host-cross/mips-wrs-linux-gnu/bin +WIND_LIC_PROXY=$(WRLINUX_BASE)/setup/x86-linux2/bin + +WRLINUX_GNU_PATH=$(WRLINUX_BASE)/gnu/4.1-wrlinux-2.0/x86-linux2/bin + +override PATH:=$(KERNDIR)/../../host-cross/bin:$(KERNDIR)/../../host-cross/mips-wrs-linux-gnu/bin:$(WRLINUX_GNU_PATH):$(PATH) + +WRS_SYSROOT_PATH := $(WRLINUX_GNU_PATH)/../lib/gcc/mips-wrs-linux-gnu/4.1.2/include + +export TOOLCHAIN_BIN_DIR WIND_LIC_PROXY + +endif + +ifeq (ELDK,$(BUILD_PLATFORM)) +ifeq (2.6.21.7, $(KERN_VER)) +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE := mips_4KC- +endif +override PATH := /tools/eldk/4.1/usr/bin:$(PATH) +KERNDIR ?= /projects/ntsw-tools/linux/eldk/raptor_eldk/linux-2.6.21.7 +endif +endif + + + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=1 -DSYS_BE_OTHER=0 -DBCM_ICS +ENDIAN = BE_HOST=1 +CFGFLAGS += -D$(ENDIAN) -DRAPTOR +CFGFLAGS += -DBCM_PLATFORM_STRING=\"Raptor_BCM56218\" + + +ARCH = mips +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + + +ifeq (ELDK,$(BUILD_PLATFORM)) +KFLAG_INCLD = /tools/eldk/4.1/usr/lib/gcc/mips-linux/4.0.0/include +endif + + +# From linux/arch/mips/Makefile +ifeq (WR_LINUX,$(BUILD_PLATFORM)) +ifeq (1.4,$(WRS_LINUX_VERSION)) + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -Wall -Wno-trigraphs -fno-strict-aliasing -fno-common -ffreestanding -O2 -fomit-frame-pointer -g -G 0 -mno-abicalls -fno-pic -pipe -march=mips32 -Wa,-mips32 -Wa,--trap -funit-at-a-time -mlong-calls -Wundef -finline-limit=100000 -mabi=32 +endif + +endif + +ifeq (2.0,$(WRS_LINUX_VERSION)) + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -nostdinc -isystem $(WRS_SYSROOT_PATH) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/linux/autoconf.h -I$(KERNDIR)/arch/mips/mach-bcm56218 -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -mabi=32 -G 0 -mno-abicalls -fno-pic -pipe -msoft-float -ffreestanding -march=mips32 -Wa,-mips32 -Wa,--trap -Iinclude/asm-mips/mach-bcm56218 -Iinclude/asm-mips/mach-generic -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls +endif + +endif +endif + +ifeq (ELDK,$(BUILD_PLATFORM)) + +ifeq (,$(KFLAGS)) +KFLAGS := -D__KERNEL__ -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/linux/autoconf.h -I$(KERNDIR)/arch/mips/mach-bcm56218 -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -mabi=32 -G 0 -mno-abicalls -fno-pic -pipe -msoft-float -ffreestanding -march=mips32 -Wa,-mips32 -Wa,--trap -Iinclude/asm-mips/mach-bcm56218 -Iinclude/asm-mips/mach-generic -fomit-frame-pointer -g -Wdeclaration-after-statement -mlong-calls +endif + + +endif + + + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif + +ifneq (,$(findstring TCL,$(FEATURE_LIST))) +LINK_STATIC=0 +export LINK_STATIC +endif + + + + + diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 new file mode 100644 index 00000000000..07af2afcc93 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 @@ -0,0 +1,44 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-x86-common-2_6,v 1.13 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 +ENDIAN = LE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"X86\" +ifeq (,$(findstring -DSAL_BDE_DMA_MEM_DEFAULT,$(CFGFLAGS))) +CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 +endif + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ +-D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +ifneq ($(targetplat),user) +# By default we exclude -Werror from x86 kernel builds +BCM_CFLAGS = -Wall +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 new file mode 100644 index 00000000000..ab342c12d21 --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 @@ -0,0 +1,51 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-x86-generic-common-2_6,v 1.2 Broadcom SDK $ +# $Copyright: (c) 2008 Broadcom Corp. +# All Rights Reserved.$ + +# Default kernel source directory +ifeq (,$(KERNDIR)) +KERNDIR := /lib/modules/$(shell uname -r)/build +export KERNDIR +endif + +# Default architecture +ifeq (,$(ARCH)) +ARCH = $(shell uname -p) +ifneq (x86_64,$(ARCH)) +ARCH = i386 +endif +endif + +# Noisy kernel build +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE KERNDIR + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +# autoconf.h was moved in later kernels +AUTOCONF = $(KERNDIR)/include/generated/autoconf.h +ifeq (,$(shell ls $(AUTOCONF) 2>/dev/null)) +AUTOCONF = $(KERNDIR)/include/linux/autoconf.h +endif + +# gcc system include path +SYSINC = $(shell gcc -print-search-dirs | grep install | cut -c 10-)include diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 new file mode 100644 index 00000000000..bb0bbea536a --- /dev/null +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 @@ -0,0 +1,46 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# $Id: Makefile.linux-x86-smp_generic_64-2_6,v 1.5 Broadcom SDK $ +# $Copyright: (c) 2008 Broadcom Corp. +# All Rights Reserved.$ + +CFGFLAGS += -DLONGS_ARE_64BITS +CFGFLAGS += -DPTRS_ARE_64BITS +CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS +CFGFLAGS += -DSAL_SPL_LOCK_ON_IRQ + +include ${SDK}/make/Makefile.linux-x86-generic-common-2_6 + +ifeq (,$(KFLAGS)) +KFLAGS := -nostdinc -isystem $(SYSINC) -I$(KERNDIR)/include -I$(KERNDIR)/arch/x86/include -include $(AUTOCONF) -D__KERNEL__ -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -Wno-format-security -fno-delete-null-pointer-checks -Os -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -funit-at-a-time -maccumulate-outgoing-args -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -fno-stack-protector -fomit-frame-pointer -g -Wdeclaration-after-statement -Wno-pointer-sign +endif + +ifeq ($(LINUX_MAKE_SHARED_LIB), 1) +KFLAGS += -fPIC -mcmodel=small +else +KFLAGS += -fno-pie -mcmodel=kernel +endif + +LINUX_UAPI = $(LINUX_INCLUDE)/uapi +KFLAGS += -I$(LINUX_INCLUDE)/uapi -I$(LINUX_INCLUDE)/generated/uapi -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/arch/x86/include/generated/uapi + +ifeq (1,$(DEBIAN_LINUX_HEADER)) +KERNDIR_COMMON := $(subst amd64,common,$(KERNDIR)) +KFLAGS += -I$(KERNDIR_COMMON)/include -I$(KERNDIR_COMMON)/include/uapi -I$(KERNDIR_COMMON)/arch/x86/include -I$(KERNDIR_COMMON)/arch/x86/include/uapi +endif + +include ${SDK}/make/Makefile.linux-x86-common-2_6 + diff --git a/platform/broadcom/saibcm-modules/systemd/opennsl-modules.service b/platform/broadcom/saibcm-modules/systemd/opennsl-modules.service new file mode 100644 index 00000000000..a83f4200dba --- /dev/null +++ b/platform/broadcom/saibcm-modules/systemd/opennsl-modules.service @@ -0,0 +1,18 @@ +[Unit] +Description=Opennsl kernel modules init +After=local-fs.target +Before=syncd.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/opennsl-modules start +# Don't remove opennsl driver when stopping service. Because +# removing knet drivers takes ~30 seconds to delete netdevs. +# This delay cuts too deep into warm reboot time budget. +# We could skip this step because we don't expect stopping +# opennsl service in any context other than rebooting. +# ExecStop=-/etc/init.d/opennsl-modules stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h new file mode 100644 index 00000000000..927201bc1fd --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h @@ -0,0 +1,285 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/*********************************************************************** + * + * $Id: linux-bde.h,v 1.24 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + * + * Linux Broadcom Device Enumerators + * + * + * There are two Linux BDEs: + * + * 1. Linux Kernel BDE + * + * This is a kernel module implementing a BDE + * for the driver running as part of the kernel. + * + * It manages the devices through the linux PCI interfaces, + * and manages a chunk of contiguous, boot-time allocated + * DMA memory. This is all that is needed if the BCM driver + * is run as part of the kernel (in another module). + * + * 2. Linux User BDE + * + * This is a kernel module and userland library which implement + * a complete BDE for applications running in userland. + * + * The kernel module relies upon the real kernel bde, + * and allows a user space application (through the user library) + * to talk directly to the devices. It also virtualized the device + * interrupts, so the entire driver can be run as a userspace + * application. + * + * While this causes a significant degradation in performance, + * because the system runs as a user application, the development + * and debugging process is about a gillion times easier. + * After the core logic is debugged, it can be retargeted using + * only the kernel bde and run in the kernel. + * + * + **********************************************************************/ + +#ifndef __LINUX_BDE_H__ +#define __LINUX_BDE_H__ + +#include + +#include + + +/* + * Device Major Numbers + * + * The kernel and user bdes need unique major numbers + * on systems that do not use devfs. + * + * They are defined here, along with the module names, + * to document them if you need to mknod them (or open) them, + * and to keep them unique. + * + */ + +#include + +#ifdef __KERNEL__ +#include +/* Key stone and Raptor has 2.6.21 but don't have definition */ +#if defined(KEYSTONE) || defined(RAPTOR) +#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)) + #ifdef PHYS_ADDRS_ARE_64BITS + typedef u64 phys_addr_t; + #else + typedef u32 phys_addr_t; + #endif + #endif +#endif +#endif + + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15)) +#define LINUX_BDE_DMA_DEVICE_SUPPORT +#endif + +#define LINUX_KERNEL_BDE_NAME "linux-kernel-bde" +#define LINUX_KERNEL_BDE_MAJOR 127 + +#define LINUX_USER_BDE_NAME "linux-user-bde" +#define LINUX_USER_BDE_MAJOR 126 + + +/* Max devices */ +/* 16 switch chips + 2 out-of-band Ethernet + 2 CPUs */ +#define LINUX_BDE_MAX_SWITCH_DEVICES 16 +#define LINUX_BDE_MAX_ETHER_DEVICES 2 +#define LINUX_BDE_MAX_CPU_DEVICES 2 +#define LINUX_BDE_MAX_DEVICES (LINUX_BDE_MAX_SWITCH_DEVICES + \ + LINUX_BDE_MAX_ETHER_DEVICES + \ + LINUX_BDE_MAX_CPU_DEVICES) + +/* + * PCI devices will be initialized by the Linux Kernel, + * regardless of architecture. + * + * You need only provide bus endian settings. + */ + +typedef struct linux_bde_bus_s { + int be_pio; + int be_packet; + int be_other; +} linux_bde_bus_t; + + + +/* Device state used for PCI hot swap case. */ +/* + * BDE_DEV_STATE_NORMAL : A device is probed normally. Or when the device + * resource has been updated after "CHANGED", the state will move back to + * "NORMAL". + */ +#define BDE_DEV_STATE_NORMAL (0) +/* + * BDE_DEV_STATE_REMOVED : A previous probed device was removed. + * We will avoid any device access while the device is in this state. + * The state will be moved to "CHANGED" if the device is re-inserted + * and re-probed. + */ +#define BDE_DEV_STATE_REMOVED (1) +/* + * BDE_DEV_STATE_CHANGED : The device is re-probed after having been removed. + * The resouces assigned to the device might have been changed after + * re-probing, so we need to re-initialize our resource database accordingly. + * The state will change to "NORMAL" when the resource have been updated. + */ +#define BDE_DEV_STATE_CHANGED (2) + +extern int linux_bde_create(linux_bde_bus_t* bus, ibde_t** bde); +extern int linux_bde_destroy(ibde_t* bde); +#ifdef BCM_INSTANCE_SUPPORT +extern int linux_bde_instance_attach(unsigned int dev_mask,unsigned int dma_size); +#endif + +#ifdef __KERNEL__ + +/* + * Backdoors provided by the kernel bde + * + */ + +/* + * The user bde needs to get cpu physical address for + * the userland code to mmap. + * And the second address is bus address, it is either + * identical to cpu physical address or another address + * (IOVA) translated by IOMMU. + */ +extern int lkbde_get_dma_info(phys_addr_t *cpu_pbase, phys_addr_t *dma_pbase, ssize_t *size); +extern uint32 lkbde_get_dev_phys(int d); +extern uint32 lkbde_get_dev_phys_hi(int d); + +/* + * Virtual device address needed by kernel space + * interrupt handler. + */ +extern void *lkbde_get_dev_virt(int d); + +/* + * The user bde needs to get some physical addresses for + * the userland code to mmap. The following functions + * supports multiple resources for a single device. + */ +extern int lkbde_get_dev_resource(int d, int rsrc, uint32 *flags, + uint32 *phys_lo, uint32 *phys_hi); + +/* + * Backdoor to retrieve OS device structure to be used for + * DMA operations. + */ +extern void *lkbde_get_dma_dev(int d); + +/* + * Backdoor to retrieve original hardware/OS device. + */ +extern void *lkbde_get_hw_dev(int d); + +/* + * Backdoor to retrieve number of switch devices probed. + */ +extern int lkbde_get_num_devices(int type); + +/* + * Retrive the device state from Kernel BDE. + * Used for KNET and User BDE for pci hot swap case. + */ +extern int lkbde_dev_state_get(int d, uint32 *state); +extern int lkbde_dev_state_set(int d, uint32 state); + +/* + * Retrive the mapping between emulated HW device and instance id + */ +extern int lkbde_dev_instid_get(int d, uint32 *instid); +extern int lkbde_dev_instid_set(int d, uint32 instid); + +/* + * Functions that allow an interrupt handler in user mode to + * coexist with interrupt handler in kernel module. + */ +extern int lkbde_irq_mask_set(int d, uint32 addr, uint32 mask, uint32 fmask); +extern int lkbde_irq_mask_get(int d, uint32 *mask, uint32 *fmask); + +#if (defined(BCM_PETRA_SUPPORT) || defined(BCM_DFE_SUPPORT)) +extern int lkbde_cpu_write(int d, uint32 addr, uint32 *buf); +extern int lkbde_cpu_read(int d, uint32 addr, uint32 *buf); +extern int lkbde_cpu_pci_register(int d); +#endif + +/* + * This flag must be OR'ed onto the device number when calling + * interrupt_connect/disconnect and irq_mask_set functions from + * a secondary device driver. + */ +#define LKBDE_ISR2_DEV 0x8000 +/* + * This flag should be OR'ed onto the device number when calling + * irq_mask_set functions from a secondary device driver if the + * mask register is iProc register. + */ +#define LKBDE_IPROC_REG 0x4000 + +#if defined(BCM_PETRA_SUPPORT) || defined(BCM_DFE_SUPPORT) +#include +#if defined(__DUNE_LINUX_BCM_CPU_PCIE__) && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) +#ifndef _SIMPLE_MEMORY_ALLOCATION_ +#define _SIMPLE_MEMORY_ALLOCATION_ 1 +#endif +#ifndef USE_LINUX_BDE_MMAP +#define USE_LINUX_BDE_MMAP 1 +#endif +#endif +#endif + +#if defined(IPROC_CMICD) && defined(CONFIG_CMA) +#ifndef _SIMPLE_MEMORY_ALLOCATION_ +#define _SIMPLE_MEMORY_ALLOCATION_ 1 +#endif +#endif + +/* Don't use _SIMPLE_MEMORY_ALLOCATION_ method for newer kernel than 3.10.0 */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)) +#ifndef _SIMPLE_MEMORY_ALLOCATION_ +#define _SIMPLE_MEMORY_ALLOCATION_ 0 +#endif +#endif + +/* Allocation via dma_alloc_coherent is turned off by default */ +#ifndef _SIMPLE_MEMORY_ALLOCATION_ +#define _SIMPLE_MEMORY_ALLOCATION_ 9 /* compile in the allocation method, but do not use it by default */ +#endif + +/* By default we use our private mmap only if /dev/mem mmap has restrictions */ +#ifndef USE_LINUX_BDE_MMAP +#ifdef CONFIG_STRICT_DEVMEM +#define USE_LINUX_BDE_MMAP 1 +#else +#define USE_LINUX_BDE_MMAP 0 +#endif +#endif + +#endif /* __KERNEL__ */ + +#endif /* __LINUX_BDE_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h new file mode 100644 index 00000000000..bfbbceb2d8e --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h @@ -0,0 +1,75 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/*********************************************************************** + * + * $Id: linux_dma.h,v 1.24 Broadcom SDK $ + * $Copyright: (c) 2016 Broadcom Corp. + * All Rights Reserved.$ + * + **********************************************************************/ + +#ifndef __LINUX_DMA_H__ +#define __LINUX_DMA_H__ + +#include + +#ifdef __KERNEL__ + +#ifdef SAL_BDE_XLP +#define KMALLOC(size, flags) __kmalloc(size, flags) +#else +#define KMALLOC(size, flags) kmalloc(size, flags) +#endif + +#if defined(CONFIG_IDT_79EB334) || defined(CONFIG_BCM4702) +/* ioremap is broken in kernel */ +#define IOREMAP(addr, size) ((void *)KSEG1ADDR(addr)) +#else +#define IOREMAP(addr, size) ioremap_nocache(addr, size) +#endif + +#if defined (__mips__) +#if defined(CONFIG_NONCOHERENT_IO) || defined(CONFIG_DMA_NONCOHERENT) +/* Use flush/invalidate for cached memory */ +#define NONCOHERENT_DMA_MEMORY +/* Remap virtual DMA addresses to non-cached segment */ +#define REMAP_DMA_NONCACHED +#endif /* CONFIG_NONCOHERENT_IO || CONFIG_DMA_NONCOHERENT */ +#endif /* __mips__ */ + +#if defined(BCM958525) && (LINUX_VERSION_CODE <= KERNEL_VERSION(3,6,5)) +#define REMAP_DMA_NONCACHED +#endif + +#ifndef DMA_BIT_MASK +#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) +#endif + +extern void _dma_init(int robo_switch, int dev_index); +extern int _dma_cleanup(void); +extern void _dma_pprint(void); +extern uint32_t *_salloc(int d, int size, const char *name); +extern void _sfree(int d, void *ptr); +extern int _sinval(int d, void *ptr, int length); +extern int _sflush(int d, void *ptr, int length); +extern sal_paddr_t _l2p(int d, void *vaddr); +extern void *_p2l(int d, sal_paddr_t paddr); +extern int _dma_pool_allocated(void); +extern int _dma_range_valid(unsigned long phys_addr, unsigned long size); + +#endif /* __KERNEL__ */ + +#endif /* __LINUX_DMA_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h new file mode 100644 index 00000000000..be4d436f8da --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h @@ -0,0 +1,36 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: mpool.h,v 1.2 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + */ + +#ifndef __MPOOL_H__ +#define __MPOOL_H__ + +struct mpool_mem_s; +typedef struct mpool_mem_s* mpool_handle_t; + +extern int mpool_init(void); +extern mpool_handle_t mpool_create(void* base_address, int size); +extern void* mpool_alloc(mpool_handle_t pool, int size); +extern void mpool_free(mpool_handle_t pool, void* ptr); +extern int mpool_destroy(mpool_handle_t pool); + +extern int mpool_usage(mpool_handle_t pool); + +#endif /* __MPOOL_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile new file mode 100644 index 00000000000..3d504a5665f --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile @@ -0,0 +1,114 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.18 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +# Makefile for Linux kernel BDE +# +LOCALDIR = systems/bde/linux/kernel + +# Make sure we build for the kernel if this is a user-mode build +ifneq ($(platform), ) +override-target=linux-$(platform) +endif + +include $(SDK)/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +BDE = linux-kernel-bde.o + +ifdef ROBO_CHIPS +CFLAGS += -I$(ET_ROBO) -I${SDK}/include/shared/et +ET_ROBO = ${SDK}/systems/drv/et +endif + +# need to add vpath sources +VPATH = ../shared $(ET_ROBO) + +# Add the srcs to be found by vpath +LSRCS += mpool.c +ifdef ROBO_CHIPS +platformsplt = $(subst -, , ${platform}) # change hyphens to spaces +platformbase = $(word 1,${platformsplt}) + +ifeq ($(platformbase), keystone) + LSRCS += etc_robo_spi.c aiutils.c +else + ifeq ($(platformbase), keystone_le) + LSRCS += etc_robo_spi.c aiutils.c + else + ifeq ($(platformbase), iproc) + LSRCS += robo_srab.c robo_spi.c aiutils.c + endif + endif +endif # platformbase + +endif # ROBO_CHIPS + +# Add shared BDE sources +VPATH += ../../shared +LSRCS += shbde_pci.c shbde_iproc.c shbde_mdio.c +CFLAGS += -I../../shared/include + +LHDRS += mpool.h +LOBJS = $(addsuffix .o, $(basename $(LSRCS))) +BOBJS = $(addprefix $(BLDDIR)/,$(LOBJS)) + +ifneq ($(kernel_version),2_4) +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-kernel-bde +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +build: kernel_libs $(MODULE) $(KMODULE) +else +MODULE = $(LIBDIR)/linux-kernel-bde.o + +build: kernel_libs $(MODULE) +endif + +$(MODULE): $(BLDDIR)/.tree kernel_libs $(BOBJS) + mkdir -p $(@D) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ +ifneq ($(kernel_version),2_4) +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko +endif + +kernel_libs: + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared + +include $(SDK)/make/Make.depend + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +clean:: + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared $@ + $(RM) $(BOBJS) $(MODULE) + $(RM) $(BLDDIR)/$(KERNEL_MODULE_DIR) + +distclean:: + +ifneq ($(kernel_version),2_4) +.PHONY: build kernel_libs +endif diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c new file mode 100644 index 00000000000..1a04b2b52e9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c @@ -0,0 +1,5335 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: linux-kernel-bde.c,v 1.414 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + * + * Linux Kernel BDE + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "linux_shbde.h" + +#ifdef BCM_ROBO_SUPPORT +/* robo/et related header files */ +#include + +#include + +#if defined(KEYSTONE) +#include +#include +#include +#include +#elif defined(IPROC_CMICD) +#include +#include +#ifdef BCM_STARFIGHTER3_SUPPORT +#include +#endif +#include +#include +#else /* BCM4704 */ +#include +#include +#endif +#endif /* BCM_ROBO_SUPPORT */ + +#define PCI_USE_INT_NONE (-1) +#define PCI_USE_INT_INTX (0) +#define PCI_USE_INT_MSI (1) +#define PCI_USE_INT_MSIX (2) +#ifdef CONFIG_PCI_MSI +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,110)) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) +#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) +#endif +#define msi_control_reg(base) (base + PCI_MSI_FLAGS) +#endif +#endif +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("Kernel BDE"); +MODULE_LICENSE("GPL"); + +/* PCIe max payload */ +int maxpayload = 256; +LKM_MOD_PARAM(maxpayload, "i", int, 0); +MODULE_PARM_DESC(maxpayload, +"Limit maximum payload size and request size on PCIe devices"); + +/* Use MSI or MSIX interrupts */ +int usemsi = -1; +LKM_MOD_PARAM(usemsi, "i", int, 0); +MODULE_PARM_DESC(usemsi, +"Use MSI/ MSIX interrupts if supported by kernel"); + +/* Ignore all recognized devices (for debug purposes) */ +int nodevices; +LKM_MOD_PARAM(nodevices, "i", int, 0); +MODULE_PARM_DESC(nodevices, +"Ignore all recognized devices (default no)"); + +int msixcnt = 1; + +/* + * This usually is defined at /usr/include/linux/pci_ids.h + * But this ID is newer. + */ +#ifndef PCI_DEVICE_ID_PLX_9656 +#define PCI_DEVICE_ID_PLX_9656 0x9656 +#endif + +#ifndef PCI_DEVICE_ID_PLX_9056 +#define PCI_DEVICE_ID_PLX_9056 0x9056 +#endif + +/* local defined device IDs, refer to bcmdevs.h */ +#ifndef BCM53000_GMAC_ID +#define BCM53000_GMAC_ID 0x4715 /* 53003 gmac id */ +#endif +#ifndef BCM53010_GMAC_ID +#define BCM53010_GMAC_ID 0x4715 /* 5301x gmac id */ +#endif +#ifndef BCM47XX_ENET_ID +#define BCM47XX_ENET_ID 0x4713 /* 4710 enet */ +#endif +#ifndef BCM53010_CHIP_ID +#define BCM53010_CHIP_ID 0xcf12 /* 53010 chipcommon chipid */ +#endif +#ifndef BCM53018_CHIP_ID +#define BCM53018_CHIP_ID 0xcf1a /* 53018 chipcommon chipid */ +#endif +#ifndef BCM53020_CHIP_ID +#define BCM53020_CHIP_ID 0xcf1e /* 53020 chipcommon chipid */ +#endif + +/* For 2.4.x kernel support */ +#ifndef IRQF_SHARED +#define IRQF_SHARED SA_SHIRQ +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) +typedef unsigned long resource_size_t; +#endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) */ + +#ifdef BCM_ICS +#define BCM_ICS_CMIC_BASE 0x08000000 +#else + +/* Force interrupt line */ +static int forceirq = -1; +static uint32_t forceirqubm = 0xffffffff; +LKM_MOD_PARAM(forceirq, "i", int, 0); +LKM_MOD_PARAM(forceirqubm, "i", uint, 0); +MODULE_PARM_DESC(forceirq, +"Override IRQ line assigned by boot loader"); +MODULE_PARM_DESC(forceirqubm, +"Bitmap for overriding the IRQ line assigned by boot loader for given units"); + +/* Create SPI slave device (cannot be probed) */ +static uint32_t spi_devid = 0; +LKM_MOD_PARAM(spi_devid, "i", uint, 0); +MODULE_PARM_DESC(spi_devid, +"Create SPI slave device using this device ID"); + +/* Select SPI device revision (cannot be probed) */ +static uint32_t spi_revid = 1; +LKM_MOD_PARAM(spi_revid, "i", uint, 0); +MODULE_PARM_DESC(spi_revid, +"Select device revision for SPI slave device"); + +#endif /* BCM_ICS */ + +/* Debug output */ +static int debug; +LKM_MOD_PARAM(debug, "i", int, 0); +MODULE_PARM_DESC(debug, +"Set debug level (default 0"); +/* Use high memory for DMA */ + +/* module param for probing EB devices. */ +static char *eb_bus; +LKM_MOD_PARAM(eb_bus, "s", charp, 0); +MODULE_PARM_DESC(eb_bus, +"List of EB devices on platform. Input format (BA=%x IRQ=%d RD16=%d WR16=%d"); + +#ifdef KEYSTONE +/* Force SPI Frequency */ +static int spifreq = 0; +LKM_MOD_PARAM(spifreq, "i", int, 0); +MODULE_PARM_DESC(spifreq, +"Force SPI Frequency for Keystone CPU (0 for default frequency)"); +#endif + +#if defined(BCM_EA_SUPPORT) +#if defined(BCM_TK371X_SUPPORT) +static int eadevices; +LKM_MOD_PARAM(eadevices, "i", int, 0); +MODULE_PARM_DESC(eadevices, +"Number of TK371X devices"); +#endif /* */ +#endif /* BCM_EA_SUPPORT */ + +/* Compatibility */ +#ifdef LKM_2_4 +#define _ISR_RET void +#define _ISR_PARAMS(_i,_d,_r) int _i, void *_d, struct pt_regs *_r +#define IRQ_NONE +#define IRQ_HANDLED +#define SYNC_IRQ(_i) synchronize_irq() +#else /* LKM_2_6 */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)) +#define _ISR_RET irqreturn_t +#else +#define _ISR_RET int +#endif +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)) +#define _ISR_PARAMS(_i,_d,_r) int _i, void *_d +#else +#define _ISR_PARAMS(_i,_d,_r) int _i, void *_d, struct pt_regs *_r +#endif +#define SYNC_IRQ(_i) synchronize_irq(_i) +char * ___strtok; +char * strtok(char * s,const char * ct) +{ + char *sbegin, *send; + sbegin = s ? s : ___strtok; + if (!sbegin) { + return NULL; + } + sbegin += strspn(sbegin,ct); + if (*sbegin == '\0') { + ___strtok = NULL; + return( NULL ); + } + send = strpbrk( sbegin, ct); + if (send && *send != '\0') + *send++ = '\0'; + ___strtok = send; + return (sbegin); +} +LKM_EXPORT_SYM(___strtok); +LKM_EXPORT_SYM(strtok); +#endif /* LKM_2_x */ + +/* PCIe capabilities */ +#ifndef PCI_CAP_ID_EXP +#define PCI_CAP_ID_EXP 0x10 +#endif +#ifndef PCI_EXP_DEVCAP +#define PCI_EXP_DEVCAP 4 +#endif +#ifndef PCI_EXP_DEVCTL +#define PCI_EXP_DEVCTL 8 +#endif +#ifndef PCI_EXT_CAP_START +#define PCI_EXT_CAP_START 0x100 +#endif +#ifndef PCI_EXT_CAP_ID +#define PCI_EXT_CAP_ID(_hdr) (_hdr & 0x0000ffff) +#endif +#ifndef PCI_EXT_CAP_VER +#define PCI_EXT_CAP_VER(_hdr) ((_hdr >> 16) & 0xf) +#endif +#ifndef PCI_EXT_CAP_NEXT +#define PCI_EXT_CAP_NEXT(_hdr) ((_hdr >> 20) & 0xffc) +#endif +#ifndef PCI_EXT_CAP_ID_VNDR +#define PCI_EXT_CAP_ID_VNDR 0x0b +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +#define PCI_FIND_DEV(_d, _v, _fr) pci_find_device(_d, _v, _fr) +#else +#define PCI_FIND_DEV(_d, _v, _fr) pci_get_device(_d, _v, _fr) +#endif + +#if defined(CONFIG_RESOURCES_64BIT) || defined(CONFIG_PHYS_ADDR_T_64BIT) +#define PHYS_ADDR_IS_64BIT +#endif + +/* Structure of private SPI device */ +struct spi_dev { + uint8 cid; /* Chip ID */ + uint32 part; /* Part number of the chip */ + uint8 rev; /* Revision of the chip */ + void *robo; /* ptr to robo info required to access SPI */ + unsigned short phyid_high; /* PHYID HIGH in MII regs of detected chip */ + unsigned short phyid_low; /* PHYID LOW in MII regs of detected chip */ +}; + +struct bde_spi_device_id { + unsigned short phyid_high; /* PHYID HIGH in MII regs of detected chip */ + unsigned short phyid_low; /* PHYID LOW in MII regs of detected chip */ + uint32 model_info; + uint32 rev_info; + uint32 spifreq; +}; + +/* Control Data */ +typedef struct bde_ctrl_s { + struct list_head list; + + /* Specify the type of device, pci, spi, switch, ether ... */ + uint32 dev_type; + + int domain_no; + int bus_no; + int be_pio; + int use_msi; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + struct msix_entry *entries; +#endif + int msix_cnt; + union { + /* Linux PCI device pointer */ + struct pci_dev* _pci_dev; + + /* SPI device pointer */ + struct spi_dev* _spi_dev; + } dev; +#define pci_device dev._pci_dev +#define spi_device dev._spi_dev + +#ifdef LINUX_BDE_DMA_DEVICE_SUPPORT + struct device *dma_dev; +#endif + + /* Physical addresses */ + resource_size_t phys_address; + resource_size_t phys_address1; + resource_size_t phys_address2; + + /* Secondary mapped base address */ + sal_vaddr_t alt_base_addr; + + /* BDE device description */ + ibde_dev_t bde_dev; + + /* Interrupt Handling */ + int iLine; /* Interrupt line */ + void (*isr)(void *); + void *isr_data; + + /* + * Controls to allow two drivers to share a single set of + * hardware registers. Typically a kernel driver will handle + * a subset of hardware interrupts and a user mode driver + * will handle the remaining interrupts. + */ + void (*isr2)(void *); + void *isr2_data; + uint32_t fmask; /* Interrupts controlled by secondary handler */ + uint32_t imask; /* Enabled interrupts for primary handler */ + uint32_t imask2; /* Enabled interrupts for secondary handler */ + spinlock_t lock; /* Lock for IRQ mask synchronization */ + + /* Hardware abstraction for shared BDE functions */ + shbde_hal_t shbde; + + /* Device state : BDE_DEV_STATE_REMOVED/CHANGED */ + uint32 dev_state; + + /* inst_id */ + uint32 inst_id; +} bde_ctrl_t; + +static bde_ctrl_t _devices[LINUX_BDE_MAX_DEVICES]; +static int _ndevices = 0; +static int _switch_ndevices = 0; +static int _ether_ndevices = 0; +static int _cpu_ndevices = 0; +static int robo_switch = 0; + +#define VALID_DEVICE(_n) ((_n >= 0) && (_n < _ndevices)) + +#if defined(IPROC_CMICD) && defined(CONFIG_OF) +#define ICFG_CHIP_ID_REG 0x10236000 +#define IHOST_CMICX_MAX_INTRS 128 +static uint32 iproc_cmicx_irqs[IHOST_CMICX_MAX_INTRS]; +#endif + +/* CPU MMIO area used with CPU cards provided on demo boards */ +#if (defined(BCM_PETRA_SUPPORT) || defined(BCM_DFE_SUPPORT) || defined(BCM_DNX_SUPPORT) || defined(BCM_DNXF_SUPPORT)) && (defined(__DUNE_WRX_BCM_CPU__) || defined(__DUNE_GTO_BCM_CPU__)) +static void *cpu_address = NULL; +#endif + +#ifdef BCM_ROBO_SUPPORT + +/* for SPI access via bcm4710 core */ +static void *robo = NULL; +static void *sbh = NULL; + +#ifdef ALTA_ROBO_SPI + +extern void *alta_eth_spi_ctrl; + +extern int +robo_spi_read(void *cookie, uint16_t reg, uint8_t *buf, int len); + +extern int +robo_spi_write(void *cookie, uint16_t reg, uint8_t *buf, int len); + +#define ROBO_RREG(_robo, _dev, _page, _reg, _buf, _len) \ + robo_spi_read(_dev ? NULL : alta_eth_spi_ctrl, \ + (_page << 8) | (_reg), _buf, _len) +#define ROBO_WREG(_robo, _dev, _page, _reg, _buf, _len) \ + robo_spi_write(_dev ? NULL : alta_eth_spi_ctrl, \ + (_page << 8) | (_reg), _buf, _len) + +#else /* !ALTA_ROBO_SPI */ + +#if defined(KEYSTONE) || defined(IPROC_CMICD) +#define ROBO_RREG(_robo, _dev, _page, _reg, _buf, _len) \ + robo_rreg(_robo, _dev, _page, _reg, _buf, _len) +#define ROBO_WREG(_robo, _dev, _page, _reg, _buf, _len) \ + robo_wreg(_robo, _dev, _page, _reg, _buf, _len) +#else +#define ROBO_RREG(_robo, _dev, _page, _reg, _buf, _len) +#define ROBO_WREG(_robo, _dev, _page, _reg, _buf, _len) +#endif + +#endif /* ALTA_ROBO_SPI */ + +#endif /* BCM_ROBO_SUPPORT */ + +/* Broadcom BCM4704 */ +#define BCM4704_VENDOR_ID 0x14E4 +#define BCM4704_DEVICE_ID 0x4704 + +/* SiByte PCI Host */ +#define SIBYTE_PCI_VENDOR_ID 0x166D +#define SIBYTE_PCI_DEVICE_ID 0x0001 + +/* Intel 21150 PCI-PCI Bridge */ +#define DC21150_VENDOR_ID 0x1011 +#define DC21150_DEVICE_ID 0x0022 + +/* HiNT HB4 PCI-PCI Bridge (21150 clone) */ +#define HINT_HB4_VENDOR_ID 0x3388 +#define HINT_HB4_DEVICE_ID 0x0022 + +/* Pericom PI7C8150 PCI-PCI Bridge (21150 clone) */ +#define PI7C8150_VENDOR_ID 0x12D8 +#define PI7C8150_DEVICE_ID 0x8150 + +/* Pericom PI7C9X130 PCI-PCIE Bridge */ +#define PCI_VNDID_PERICOM 0x12D8 +#define PCI_DEVID_PI7C9X130 0xE130 +#define DEV_CTRL_REG 0xb8 + +#define MAX_PAYLOAD_256B (1 << 5) +#define MAX_PAYLOAD_512B (2 << 5) +#define MAX_READ_REQ_256B (1 << 12) + + +/* Freescale 8548 PCI-E host Bridge */ +#define FSL_VENDOR_ID 0x1957 +#define FSL8548PCIE_DEVICE_ID 0x0013 +#define FSL2020EPCIE_DEVICE_ID 0x0070 +#define FSL8548PCIE_DEV_CTRL_REG 0x54 + +/* 4716 PCI-E host Bridge */ +#define BCM4716_VENDOR_ID 0x14e4 +#define BCM4716PCIE_DEVICE_ID 0x4716 +#define BCM4716PCIE_DEV_CAP_REG 0xd4 +#define BCM4716PCIE_DEV_CTRL_REG 0xd8 +#define BCM53000_VENDOR_ID 0x14e4 +#define BCM53000PCIE_DEVICE_ID 0x5300 + +#define BCM53000PCIE_DEV(port) ((port == 0) ? pcie0 : pcie1) +#define BCM53000PCIE_BASE(port) ((port == 0) ? 0xb8005000 : 0xb800e000) +#define BCM53000PCIE_FUNC0_COFIG_SPACE 0x400 +#define BCM53000PCIE_SROM_SPACE 0x800 +#define BCM53000PCIE_DEV_CAP_REG 0xd4 +#define BCM53000PCIE_DEV_CTRL_REG 0xd8 +#define BCM53000PCIE_MAX_PAYLOAD_MASK 0x7 +#define BCM53000PCIE_CAP_MAX_PAYLOAD_256B (1 << 0) +#define BCM53000PCIE_DEFAULT_STATUS 0x00100146 + +/* 16bit wide register. offset 14, 14*2 = 0x1c */ +#define BCM53000PCIE_SPROM_OFFSET 0x1c +/* bit 15:13 spromData.MaxPayloadSize. 1: 256 bytes */ +#define BCM53000PCIE_SPROM_MAX_PAYLOAD_MASK 0xe000 +#define BCM53000PCIE_SPROM_MAX_PAYLOAD_256B (1 << 13) + + +/* Intel 21150, HiNT HB4 and other 21150-compatible */ +#define PCI_CFG_DEC21150_SEC_CLK 0x68 + +#define BCM4704_ENUM_BASE 0x18000000 +#define BCM4704_MEMC_BASE (BCM4704_ENUM_BASE+0x8000) +#define BCM4704_MEMC_PRIORINV 0x18 + +/* PLX PCI-E Switch */ +#define PLX_PEX8608_DEV_ID 0x8608 +#define PLX_PEX8617_DEV_ID 0x8617 +#define PLX_PEX86XX_DEV_CTRL_REG 0x70 + +/* Broadcom BCM58525 */ +#define BCM58525_PCI_VENDOR_ID 0x14E4 +#define BCM58525_PCI_DEVICE_ID 0x8025 +#define BCM58522_PCI_DEVICE_ID 0x8022 + +/* Broadcom BCM58712 */ +#define BCM58712_PCI_VENDOR_ID 0x14E4 +#define BCM58712_PCI_DEVICE_ID 0x168E + +static uint32_t _read(int d, uint32_t addr); + +#ifdef BCM_ICS +#else +/* Used to determine overall memory limits across all devices */ +static uint32_t _pci_mem_start = 0xFFFFFFFF; +static uint32_t _pci_mem_end = 0; + +/* Used to control MSI interrupts */ +static int use_msi = 0; +#endif + +#ifdef BCM_PLX9656_LOCAL_BUS + +#define CPLD_OFFSET 0x00800000 +#define CPLD_REVISION_REG 0x0000 +#define CPLD_REVISION_MASK 0xffff +#define CPLD_RESET_REG 0x0004 +#define CPLD_RESET_NONE 0x0000 + +#define PL0_OFFSET 0x00800000 +#define PL0_SIZE 0x00040000 +#define PL0_REVISION_REG 0x0000 + +/* Assume there's only one PLX PCI-to-Local bus bridge if any */ +static bde_ctrl_t plx_ctrl; +static int num_plx = 0; + +#endif /* BCM_PLX9656_LOCAL_BUS */ + +static spinlock_t bus_lock; + +static int +_parse_eb_args(char *str, char * format, ...) + __attribute__ ((format (scanf, 2, 3))); + +static int +_parse_eb_args(char *str, char * format, ...) +{ + va_list args; + + va_start(args, format); + vsscanf(str, format, args); + va_end(args); + + return 0; +} + +static void +_bde_add_device(void) +{ + /* + * In order to be backward compatible with the user mode BDE + * (specifically the interrupt IOCTLs) and the CM, switch devices + * *must* come first. If this is not the case (due to the probing + * order), we let the non-switch device(s) drop down to the end of + * the device array. + */ + if (_switch_ndevices > 0) { + bde_ctrl_t tmp_dev; + int i, s = 0; + + while (s < _switch_ndevices) { + if (_devices[s].dev_type & BDE_SWITCH_DEV_TYPE) { + s++; + continue; + } + tmp_dev = _devices[s]; + for (i = s; i < _ndevices - 1; i++) { + _devices[i] = _devices[i+1]; + } + _devices[i] = tmp_dev; + } + } + + /* Initialize device locks and dma */ + if (_ndevices > 0) { + spin_lock_init(&_devices[_ndevices-1].lock); + _dma_init(robo_switch, _ndevices-1); + } +} + +static int +_eb_device_create(resource_size_t paddr, int irq, int rd_hw, int wr_hw) +{ + bde_ctrl_t *ctrl; + uint32 dev_rev_id = 0x0, dev_id; + + dev_id = _ndevices; + + ctrl = _devices + _ndevices++; + _switch_ndevices++; + + ctrl->dev_type |= BDE_EB_DEV_TYPE | BDE_SWITCH_DEV_TYPE; + ctrl->pci_device = NULL; /* No PCI bus */ + + if(rd_hw) { + ctrl->dev_type |= BDE_DEV_BUS_RD_16BIT; + } + + if (wr_hw) { + ctrl->dev_type |= BDE_DEV_BUS_WR_16BIT; + } + + /* Map in the device */ + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(paddr, 0x10000); + ctrl->phys_address = paddr; + + dev_rev_id = _read(dev_id, 0x178); /* CMIC_DEV_REV_ID */ + + ctrl->bde_dev.device = dev_rev_id & 0xFFFF; + ctrl->bde_dev.rev = (dev_rev_id >> 16) & 0xFF; + + ctrl->iLine = irq; + ctrl->isr = NULL; + ctrl->isr_data = NULL; + + _bde_add_device(); + + gprintk("Created EB device at BA=%x IRQ=%d RD16=%d WR16=%d device=0x%x\n", + (unsigned int)paddr, irq, rd_hw, wr_hw, ctrl->bde_dev.device); + + return 0; +} + +#if defined(BCM_PETRA_SUPPORT) || defined(BCM_DFE_SUPPORT) || defined(BCM_DNX_SUPPORT) || defined(BCM_DNXF_SUPPORT) + +#include + +static int +sand_device_create(void) +{ + bde_ctrl_t* ctrl; + + ctrl = _devices; /* FIX_ME: on petra, take first device */ + +#ifndef __DUNE_LINUX_BCM_CPU_PCIE__ + _switch_ndevices++; + _ndevices++; + + ctrl->dev_type |= BDE_PCI_DEV_TYPE | BDE_SWITCH_DEV_TYPE; + ctrl->pci_device = NULL; /* No PCI bus */ + + /* Map in the device */ /* FIX_ME: not realy map anything */ + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(0x40000000, 0x100000); + ctrl->phys_address = 0x40000000; + + ctrl->iLine = 0; + ctrl->isr = NULL; + ctrl->isr_data = NULL; + + ctrl->bde_dev.device = BCM88950_DEVICE_ID; + ctrl->bde_dev.rev = BCM88950_A0_REV_ID; +#endif + + /* Map CPU regs */ +#ifdef __DUNE_WRX_BCM_CPU__ + cpu_address = IOREMAP(0x18000000, 0x4000000); +#elif defined(__DUNE_GTO_BCM_CPU__) + cpu_address = IOREMAP(0xe0000000, 0x100000); +#endif + + if ((ctrl->bde_dev.device == PCP_PCI_DEVICE_ID)) { + ctrl->bde_dev.device = GEDI_DEVICE_ID; + ctrl->bde_dev.rev = GEDI_REV_ID; + } + + if ((ctrl->bde_dev.device == ACP_PCI_DEVICE_ID)) { + ctrl->dev_type |= BDE_PCI_DEV_TYPE | BDE_SWITCH_DEV_TYPE; + } + +#ifndef __DUNE_LINUX_BCM_CPU_PCIE__ + _bde_add_device(); +#endif + + return 0; +} +#endif + +#ifdef IPROC_CMICD +static void +iproc_cmicd_get_irqres(ibde_dev_t bde_dev, struct resource *res_irq) +{ + shbde_iproc_config_t iproc_config, *icfg = &iproc_config; + + /* iProc configuration parameters */ + memset(icfg, 0, sizeof(*icfg)); + shbde_iproc_config_init(icfg, bde_dev.device, bde_dev.rev); + + if ((icfg->iproc_ver == 0) && (debug >= 1)) { + gprintk("Unable to determine iProc version\n"); + } + + if (icfg->iproc_ver == 7) { + res_irq->start = 221; + } else if (icfg->iproc_ver == 10) { + res_irq->start = 184; + } + +} + +#include +#include + +extern int iproc_platform_driver_register(struct platform_driver *drv); +extern void iproc_platform_driver_unregister(struct platform_driver *drv); +extern int iproc_platform_device_register(struct platform_device *drv); +extern void iproc_platform_device_unregister(struct platform_device *drv); + +extern struct resource * +iproc_platform_get_resource(struct platform_device *dev, unsigned int type, + unsigned int num); + +#define IPROC_CHIPCOMMONA_BASE 0x18000000 +#define IPROC_CMICD_BASE 0x48000000 +#define IPROC_CMICD_SIZE 0x40000 +#define IPROC_CMICD_INT 194 + +#define IPROC_CMICD_COMPATIBLE "brcm,iproc-cmicd" +#define IPROC_CMICX_COMPATIBLE "brcm,iproc-cmicx" + +static int +iproc_cmicd_probe(struct platform_device *pldev) +{ + bde_ctrl_t *ctrl; + uint32 size, dev_rev_id; + struct resource *memres, *irqres; +#ifdef CONFIG_OF + if (debug >= 1) { + gprintk("iproc_cmicd_probe %s\n", pldev->dev.of_node ? "with device node":""); + } +#endif + memres = iproc_platform_get_resource(pldev, IORESOURCE_MEM, 0); + if (memres == NULL) { + gprintk("Unable to retrieve iProc CMIC resources"); + return -1; + } + size = memres->end - memres->start + 1; + + ctrl = _devices + _ndevices++; + _switch_ndevices++; + + ctrl->dev_type = BDE_AXI_DEV_TYPE | BDE_SWITCH_DEV_TYPE | BDE_256K_REG_SPACE; + ctrl->pci_device = NULL; /* No PCI bus */ + + /* Map CMIC block in the AXI memory space into CPU address space */ + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(memres->start, size); + if (!ctrl->bde_dev.base_address) { + gprintk("Error mapping iProc CMIC registers"); + return -1; + } + ctrl->phys_address = memres->start; + +#ifdef CONFIG_OF + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + uint32 *icfg_chip_id; + icfg_chip_id = (uint32 *)IOREMAP(ICFG_CHIP_ID_REG, 2 * sizeof(uint32)); + if (icfg_chip_id == NULL) { + gprintk("Error mapping ICFG_CHIP_ID_REG\n"); + return -1; + } + ctrl->bde_dev.device = readl(icfg_chip_id) & 0xffff; + ctrl->bde_dev.rev = readl(icfg_chip_id+1) & 0xff; + iounmap(icfg_chip_id); + } else +#endif + { + /* Read switch device ID from CMIC */ + dev_rev_id = *((uint32 *)(ctrl->bde_dev.base_address + 0x10224)); +#if defined(BCM_CMICM_SUPPORT) && defined(BE_HOST) + ctrl->bde_dev.device = ( (((dev_rev_id >> 16) & 0xff) << 8) | + ((dev_rev_id >> 24) & 0xff)); + ctrl->bde_dev.rev = (dev_rev_id >> 8) & 0xff ; +#else + ctrl->bde_dev.device = dev_rev_id & 0xffff; + ctrl->bde_dev.rev = (dev_rev_id >> 16) & 0xff; +#endif + } + +#ifdef CONFIG_OF + if (!pldev->dev.of_node) +#endif + { + /* Assign locally if not available from device node */ + iproc_cmicd_get_irqres(ctrl->bde_dev, &pldev->resource[0]); + } + +#ifdef CONFIG_OF + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + int i; + for (i = 0; i < IHOST_CMICX_MAX_INTRS; i++) { + irqres = iproc_platform_get_resource(pldev, IORESOURCE_IRQ, i); + iproc_cmicx_irqs[i] = irqres->start; + if (debug >= 1) { + gprintk("iproc_cmicx_irqs[%d] = %d\n", i, iproc_cmicx_irqs[i]); + } + } + ctrl->iLine = iproc_cmicx_irqs[0]; + } else +#endif + { + irqres = iproc_platform_get_resource(pldev, IORESOURCE_IRQ, 0); + ctrl->iLine = irqres->start; + } + + ctrl->isr = NULL; + ctrl ->isr_data = NULL; + +#ifdef LINUX_BDE_DMA_DEVICE_SUPPORT + ctrl->dma_dev = &pldev->dev; +#endif + + /* Let's boogie */ + _bde_add_device(); + return 0; +} + +static int +iproc_cmicd_remove(struct platform_device *pldev) +{ + return 0; +} +#ifdef CONFIG_OF +static const struct of_device_id iproc_cmicd_of_match[] = { + { .compatible = IPROC_CMICD_COMPATIBLE }, + { .compatible = IPROC_CMICX_COMPATIBLE }, + {}, +}; +MODULE_DEVICE_TABLE(of, iproc_cmicd_of_match); +#endif +static char iproc_cmicd_string[] = "bcmiproc-cmicd"; + +static struct platform_driver iproc_cmicd_driver = +{ + .probe = iproc_cmicd_probe, + .remove = iproc_cmicd_remove, + .driver = + { + .name = iproc_cmicd_string, + .owner = THIS_MODULE, +#ifdef CONFIG_OF + .of_match_table = iproc_cmicd_of_match, +#endif + }, +}; + +typedef enum { + IPROC_CMICD_RES_INTR = 0, + IPROC_CMICD_RES_MEM +} IPROC_CMICD_RES_E; + +static struct resource iproc_cmicd_resources[] = { + [IPROC_CMICD_RES_INTR] = { + .flags = IORESOURCE_IRQ, + .start = IPROC_CMICD_INT, + }, + [IPROC_CMICD_RES_MEM] = { + .flags = IORESOURCE_MEM, + .start = IPROC_CMICD_BASE, + .end = IPROC_CMICD_BASE+IPROC_CMICD_SIZE-1, + }, +}; + +static void +iproc_cmicd_release(struct device *dev) +{ +} + +static u64 iproc_cmicd_dmamask = DMA_BIT_MASK(32); + +static struct platform_device iproc_cmicd_pdev = { + .name = iproc_cmicd_string, + .id = 0, + .dev = { + .release = iproc_cmicd_release, + .init_name = iproc_cmicd_string, + .dma_mask = &iproc_cmicd_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = iproc_cmicd_resources, + .num_resources = ARRAY_SIZE(iproc_cmicd_resources), +}; + +static int +iproc_has_cmicd(void) +{ + void *iproc_cca_base; + uint32 cca_cid; + + /* Read ChipcommonA chip id register to identify current SOC */ + iproc_cca_base = IOREMAP(IPROC_CHIPCOMMONA_BASE, 0x3000); + if (iproc_cca_base == NULL) { + gprintk("iproc_has_cmicd: ioremap of ChipcommonA registers failed"); + return 0; + } + cca_cid = readl((uint32 *)iproc_cca_base); + cca_cid &= 0xffff; + iounmap(iproc_cca_base); + + /* Only allowed accessing CMICD module if the SOC has it */ + switch (cca_cid) { + case BCM53010_CHIP_ID: + case BCM53018_CHIP_ID: + case BCM53020_CHIP_ID: + return 0; + default: + break; + } + + /* Device has CMIC */ + return 1; +} + +#define IPROC_CHIPCOMMONA_EROM_PTR_OFFSET (0x180000fc) +#define EROM_MAX_SIZE (0x1000) +#define EROM_PARTNUM_CMICD (0x14) + +#define EROM_DESC_COMPIDENT (0x1) +#define EROM_DESC_MASTER (0x3) +#define EROM_DESC_ADDR (0x5) +#define EROM_DESC_END (0xF) +#define EROM_DESC_EMPTY (0) + +#define EROM_IS_DESC_COMPIDENT(x) ((x & 0x7) == EROM_DESC_COMPIDENT) +#define EROM_IS_DESC_MASTER(x) ((x & 0x7) == EROM_DESC_MASTER) +#define EROM_IS_DESC_ADDR(x) ((x & 0x7) == EROM_DESC_ADDR) +#define EROM_IS_DESC_END(x) ((x & 0xF) == EROM_DESC_END) + +#define EROM_GET_PARTNUM(x) ((x >> 8) & (0xFFF)) /* Bit 8~19 */ +#define EROM_GET_ADDRESS(x) ((x >> 12) & (0xFFFFF)) /* Bit 12~31 */ +#define EROM_GET_SIZETYPE(x) ((x >> 4) & (0x3)) /* Bit 4~5 */ +#define EROM_GET_AG32(x) ((x >> 3) & (0x1)) /* Bit 3 */ +#define EROM_GET_SIZE(x) ((x >> 12) & (0xFFFFF)) /* Bit 12~31 */ +#define EROM_GET_SG32(x) ((x >> 3) & (0x1)) /* Bit 3 */ + +#define EROM_ADDR_SIZETYPE_4K (0) +#define EROM_ADDR_SIZETYPE_8K (1) +#define EROM_ADDR_SIZETYPE_16K (2) +#define EROM_ADDR_SIZETYPE_MORE (3) + +#define EROM_ADDR_FLAG_AG32 (1) /* Address space greater than 32 bit */ +#define EROM_ADDR_FLAG_SIZE (2) /* Addition size descriptor */ +#define EROM_ADDR_FLAG_SG32 (4) /* Size descriptor greater than 32 bit */ + +static void +iproc_cmicd_get_memregion(struct resource *res_mem) +{ + void *erom_ptr_oft; + uint32_t erom_phy_addr; + uint32_t *erom_base; + uint32_t i = 0; + uint32_t word = 0; + uint8_t more_addr_word = 0; /* bit 0: AG32; bit 1: SIZE; bit 2: SG32 */ + uint8_t found_cmicd_dev = 0; + uint8_t size_type = 0; + bool is_compident_a = 1; /* 1: CompidentA; o/w: CompidentB */ + + erom_ptr_oft = IOREMAP(IPROC_CHIPCOMMONA_EROM_PTR_OFFSET, 0x100); + + erom_phy_addr = readl((uint32 *)(erom_ptr_oft)); + iounmap(erom_ptr_oft); + + erom_base = IOREMAP(erom_phy_addr, EROM_MAX_SIZE); + + while (1) { + word = readl((uint32 *)(erom_base + i)); + + if (EROM_IS_DESC_ADDR(word) || more_addr_word) { + if (more_addr_word == 0) { /* Normal Addr Desc */ + if (EROM_GET_AG32(word) == 1) { + more_addr_word |= EROM_ADDR_FLAG_AG32; + } + + size_type = EROM_GET_SIZETYPE(word); + if (size_type == EROM_ADDR_SIZETYPE_MORE) { + more_addr_word |= EROM_ADDR_FLAG_SIZE; + } + + if (found_cmicd_dev == 1) { + res_mem->start = EROM_GET_ADDRESS(word) << 12; + if (size_type < EROM_ADDR_SIZETYPE_MORE) { + res_mem->end = res_mem->start + 4096 * (1 << size_type) - 1; + } + } + } + else if (more_addr_word & EROM_ADDR_FLAG_AG32) { /* UpperAddr Desc */ + more_addr_word &= ~EROM_ADDR_FLAG_AG32; + + if (found_cmicd_dev == 1) { + /* res_mem->start |= word << 32; */ + gprintk("Expect cmicd address to be 32-bit\n"); + } + } + else if (more_addr_word & EROM_ADDR_FLAG_SIZE) { /* Size Desc */ + if (EROM_GET_SG32(word) == 1) { + more_addr_word |= EROM_ADDR_FLAG_SG32; + } + + more_addr_word &= ~EROM_ADDR_FLAG_SIZE; + + if (found_cmicd_dev == 1) { + res_mem->end = res_mem->start + (EROM_GET_SIZE(word) << 12) - 1; + } + } + else if (more_addr_word & EROM_ADDR_FLAG_SG32) { /* UpperSize Desc */ + more_addr_word &= ~EROM_ADDR_FLAG_SG32; + + if (found_cmicd_dev == 1) { + /* res_mem->end += (word) << 32; */ + gprintk("Expect cmicd size to be 32-bit\n"); + } + } + + if (found_cmicd_dev == 1 && more_addr_word == 0) { + break; /* We have gotten all necessary information, exit the loop */ + } + } + else if (EROM_IS_DESC_COMPIDENT(word)) { + if (is_compident_a == 1) { + if (EROM_GET_PARTNUM(word) == EROM_PARTNUM_CMICD) { + found_cmicd_dev = 1; + } + } + + is_compident_a = 1 - is_compident_a; + } + else if (EROM_IS_DESC_END(word)) { + break; + } + + i++; + } + iounmap(erom_base); + + if (debug >= 1) { + gprintk("CMICD info by %s: cmicd_mem.start=%lx, cmicd_mem.end=%lx\n", + found_cmicd_dev ? "EROM" : "Default", + (unsigned long)iproc_cmicd_resources[IPROC_CMICD_RES_MEM].start, + (unsigned long)iproc_cmicd_resources[IPROC_CMICD_RES_MEM].end); + } +} +#endif /* IPROC_CMICD */ + +#ifdef BCM_ICS +static int +_ics_bde_create(void) +{ + bde_ctrl_t *ctrl; + uint32 dev_rev_id = 0x0; + resource_size_t paddr; + + if (_ndevices == 0) { + ctrl = _devices + _ndevices++; + _switch_ndevices++; + + ctrl->dev_type |= BDE_ICS_DEV_TYPE | BDE_SWITCH_DEV_TYPE; + ctrl->pci_device = NULL; /* No PCI bus */ + + /* Map in the device */ + paddr = BCM_ICS_CMIC_BASE; + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(paddr, 0x10000); + ctrl->phys_address = paddr; + + dev_rev_id = *((unsigned int *)(KSEG1ADDR(paddr + 0x178))); + + ctrl->bde_dev.device = dev_rev_id & 0xFFFF; + ctrl->bde_dev.rev = (dev_rev_id >> 16) & 0xFF; + + ctrl->iLine = 5; /* From raptor linux BSP */ + + ctrl->isr = NULL; + ctrl->isr_data = NULL; + _bde_add_device(); + printk("Created ICS device ..%x\n", ctrl->bde_dev.base_address); + } + + return 0; +} + +#else /* !BCM_ICS */ + +extern struct pci_bus *pci_find_bus(int domain, int busnr); + +/* + * PCI device table. + * Populated from the include/soc/devids.h file. + */ + +static const struct pci_device_id _id_table[] = { + { BROADCOM_VENDOR_ID, BCM5675_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM5676_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56218X_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56218_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56219_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56218R_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56219R_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56214_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56215_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56214R_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56215R_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56216_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56217_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56212_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56213_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56230_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56231_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53718_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53714_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53716_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56018_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56014_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56224_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56225_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56226_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56227_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56228_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56229_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56024_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56025_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53724_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53726_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56100_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56101_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56102_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56105_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56106_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56107_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56110_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56111_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56112_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56115_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56116_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56117_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56300_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56301_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56302_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56303_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56304_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56404_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56305_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56306_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56307_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56308_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56309_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56310_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56311_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56312_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56313_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56314_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56315_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56316_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56317_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56318_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56319_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#ifndef EXCLUDE_BCM56324 + { BROADCOM_VENDOR_ID, BCM56322_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56324_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#endif /* EXCLUDE_BCM56324 */ + { BROADCOM_VENDOR_ID, BCM53312_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53313_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53314_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53324_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53333_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53334_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53342_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53343_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53344_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53346_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53347_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53393_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53394_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53300_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53301_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53302_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56500_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56501_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56502_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56503_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56504_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56505_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56506_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56507_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56508_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56509_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56510_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56511_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56512_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56513_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56514_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56516_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56517_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56518_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56519_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56580_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56620_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56624_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56626_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56628_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56629_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56680_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56684_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56700_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56701_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56720_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56721_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56725_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56800_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56801_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56802_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56803_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56820_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56821_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56822_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56823_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56825_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56630_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56634_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56636_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56638_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56639_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56538_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56520_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56521_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56522_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56524_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56526_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56534_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56685_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56689_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56331_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56333_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56334_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56338_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56320_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56321_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56132_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56134_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88732_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56140_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56142_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56143_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56144_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56146_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56147_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56149_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56150_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56151_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56152_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56613_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56930_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56931_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56935_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56936_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56939_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56840_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56841_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56842_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56843_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56844_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56845_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56846_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56847_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56549_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56053_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56838_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56831_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56835_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56849_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56742_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56743_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56744_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56745_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56746_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56640_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56548_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56547_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56346_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56345_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56344_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56342_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56340_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56049_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56048_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56047_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56042_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56041_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56040_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56643_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56644_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56648_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56649_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56540_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56541_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56542_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56543_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56544_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56545_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56546_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56044_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56045_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56046_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88230_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88030_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88034_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88039_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88231_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88235_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88236_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88239_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM55440_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56440_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56441_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56442_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56443_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56445_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56446_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56447_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56448_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56449_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56240_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56241_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56242_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56243_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56245_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56246_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM55450_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM55455_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56260_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56270_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56271_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56272_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53460_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53461_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56261_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56262_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56263_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56265_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56266_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56267_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56268_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56233_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56460_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56461_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56462_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56463_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56465_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56466_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56467_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56468_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56246_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56248_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56450_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56452_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56454_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56455_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56456_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56457_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56458_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56850_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56851_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56852_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56853_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56854_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56855_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56834_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56750_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56830_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM55440_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM55441_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56060_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56062_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56063_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56064_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56065_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56066_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53401_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53411_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53402_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53412_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53403_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53413_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53404_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53414_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53405_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53415_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53406_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53416_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53408_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53418_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53454_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53455_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53456_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53457_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53422_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53424_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53426_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53365_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53369_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56960_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56961_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56962_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56963_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56930_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56968_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56970_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56971_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56972_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56974_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56975_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56168_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56169_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56560_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56561_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56562_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56565_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56566_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56567_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56670_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56671_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56672_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56675_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56568_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56670_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56760_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56761_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56762_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56764_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56765_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56766_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56768_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56069_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56068_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56160_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56162_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56163_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56164_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56166_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53440_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53443_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53442_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53434_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56965_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56969_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56966_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56967_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56170_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56172_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56174_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53570_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53575_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#ifdef BCM_ROBO_SUPPORT + { BROADCOM_VENDOR_ID, BCM47XX_ENET_ID, PCI_ANY_ID, PCI_ANY_ID }, +#ifdef KEYSTONE + { BROADCOM_VENDOR_ID, BCM53000_GMAC_ID, PCI_ANY_ID, PCI_ANY_ID }, +#endif +#endif + { SANDBURST_VENDOR_ID, QE2000_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { SANDBURST_VENDOR_ID, BCM88020_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { SANDBURST_VENDOR_ID, BCM88025_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9656, PCI_ANY_ID, PCI_ANY_ID }, + { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9056, PCI_ANY_ID, PCI_ANY_ID }, + { BCM53000_VENDOR_ID, BCM53000PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#ifdef BCM_PETRA_SUPPORT + { BROADCOM_VENDOR_ID, BCM88650_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88350_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88351_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88450_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88451_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88550_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88551_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88552_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88651_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88654_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { PCP_PCI_VENDOR_ID, PCP_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { ACP_PCI_VENDOR_ID, ACP_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88660_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88670_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88671_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88671M_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88672_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88673_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88674_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88675_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88675M_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88676_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88676M_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88677_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88678_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88679_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88370_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88371_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88371M_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88375_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88470_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88470P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88471_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88473_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88474_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88474H_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88476_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88477_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + + + { BROADCOM_VENDOR_ID, BCM88270_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88272_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88273_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88278_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88279_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + + { BROADCOM_VENDOR_ID, BCM8206_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + + { BROADCOM_VENDOR_ID, BCM88376_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88376M_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88377_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88378_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88379_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88680_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88681_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88682_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88683_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88684_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88685_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88380_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88381_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88690_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88202_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88360_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88361_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88363_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88460_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88461_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88560_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88561_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88562_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88661_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88664_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#endif +#ifdef BCM_DFE_SUPPORT + { BROADCOM_VENDOR_ID, BCM88750_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88753_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88755_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88770_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88773_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88774_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88775_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88776_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88777_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#ifndef DNX_IGNORE_FE3200 + { BROADCOM_VENDOR_ID, BCM88950_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#endif + { BROADCOM_VENDOR_ID, BCM88953_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88954_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88955_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88956_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88752_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88772_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88952_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#endif +#ifdef BCM_DNXF_SUPPORT + { BROADCOM_VENDOR_ID, BCM88790_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88791_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88792_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88793_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88794_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88795_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88796_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88797_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88798_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM88799_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8879A_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8879B_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8879C_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8879D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM8879F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, +#endif + { BROADCOM_VENDOR_ID, BCM56860_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56861_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56862_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56864_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56865_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56866_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56867_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56868_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56833_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56832_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56836_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56870_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56370_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56371_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56372_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56374_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56375_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56376_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56377_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56577_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56578_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56579_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56873_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56770_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56771_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56980_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56981_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56982_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56983_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56984_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53540_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53547_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53548_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53549_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { 0, 0, 0, 0 } +};; + +MODULE_DEVICE_TABLE(pci, _id_table); + +#define pci_bus_b(n) list_entry(n, struct pci_bus, node) +#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list) +#define MAX_RC_NUM 4 + +static struct pci_bus * +pci_do_bus_find(struct pci_bus* bus, int rc, int vendor, int device) +{ + struct list_head *tmp; + struct pci_dev *dev; + struct pci_bus *sub_bus; + int func = 0; + + if (unlikely(list_empty(&bus->children))) { + return NULL; + } + list_for_each(tmp, &bus->children) { + sub_bus = pci_bus_b(tmp); + dev = sub_bus->self; + func = dev->devfn & 0x7; + if (dev->vendor == vendor && dev->device == device && rc == func) { + if (debug >= 1) { + gprintk("pci_do_bus_find: dev->vendor = 0x%x, dev->device = 0x%x on rc(%d)\n", + dev->vendor, dev->device, rc); + } + return sub_bus; + } + } + return NULL; +} + +static struct pci_dev * +_pci_do_bus_dev_find(struct pci_bus* bus, unsigned int vendor, unsigned int device) +{ + struct list_head *tmp; + struct pci_dev *dev; + + if (unlikely(list_empty(&bus->devices))) { + return NULL; + } + list_for_each(tmp, &bus->devices) { + dev = pci_dev_b(tmp); + if (dev->vendor == vendor && (device == PCI_ANY_ID || dev->device == device)) { + if (debug >= 1) { + gprintk("_pci_do_rc_dev_find: vendor = %x, device = %x\n", vendor, device); + } + return dev; + } + } + return NULL; +} + +static struct pci_dev * +pci_do_rc_dev_find(int rc) +{ + struct pci_bus *root_bus = pci_find_bus(0,0); + struct pci_bus *bus_rc = NULL; + struct pci_dev *dev_on_rc = NULL; + unsigned int pci_dev_id = 0; + + if(NULL == root_bus) { + if (debug >= 1) gprintk("Not find root bus\n"); + return NULL; + } + bus_rc = pci_do_bus_find(root_bus, rc, 0x184e, 0x1004); + if (NULL == bus_rc) { + if (debug >= 1) { + gprintk("Not find vendor(0x184e) device(0x1004) bus\n"); + } + return NULL; + } + for(pci_dev_id = 0; pci_dev_id < sizeof(_id_table)/sizeof(struct pci_device_id); pci_dev_id++) { + dev_on_rc = _pci_do_bus_dev_find(bus_rc, _id_table[pci_dev_id].vendor, _id_table[pci_dev_id].device); + if (NULL != dev_on_rc) { + return dev_on_rc; + } + } + if (debug >= 1) { + gprintk("Not find device at rc(%d)\n", rc); + } + return NULL; +} + +/* + * Function: p2p_bridge + * + * Purpose: + * Finalize initialization secondary PCI-PCI bridge. + * Parameters: + * membase - start of memory address space for secondary PCI bus + * Returns: + * 0 + * Notes: + * The membase depends on the processor architecture, and is + * derived from the memory space addresses set up by the kernel. + */ +static int +p2p_bridge(void) +{ + struct pci_dev *dev, *dev_on_rc; + uint16 cmd; + uint16 mem_base; + uint16 mem_limit; + uint8 bridge_ctrl; + uint8 rc_index; + + if ((dev = PCI_FIND_DEV(DC21150_VENDOR_ID, DC21150_DEVICE_ID, NULL)) != NULL || + (dev = PCI_FIND_DEV(HINT_HB4_VENDOR_ID, HINT_HB4_DEVICE_ID, NULL)) != NULL || + (dev = PCI_FIND_DEV(PI7C8150_VENDOR_ID, PI7C8150_DEVICE_ID, NULL)) != NULL) { + + if (debug >= 1) gprintk("fixing up PCI-to-PCI bridge\n"); + /* Adjust command register */ + pci_read_config_word(dev, PCI_COMMAND, &cmd); + cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; + /* Disable device */ + pci_write_config_word(dev, PCI_COMMAND, 0); + /* Initialize non-prefetchable memory window if needed */ + pci_read_config_word(dev, PCI_MEMORY_BASE, &mem_base); + if (mem_base == 0) { + mem_base = (uint16)((_pci_mem_start & 0xFFF00000) >> 16); + mem_limit = (uint16)((_pci_mem_end & 0xFFF00000) >> 16); + pci_write_config_word(dev, PCI_MEMORY_BASE, mem_base); + pci_write_config_word(dev, PCI_MEMORY_LIMIT, mem_limit); + } + /* Enable PCI clocks on remote end */ + pci_write_config_word(dev, PCI_CFG_DEC21150_SEC_CLK, 0); + /* Re-enable config space */ + pci_write_config_word(dev, PCI_COMMAND, cmd); + + /* Avoid DMA data corruption */ + if (dev->vendor == HINT_HB4_VENDOR_ID) { + /* Fix for HiNT bridge and BCM4704 DMA problem */ + if ((dev = PCI_FIND_DEV(BCM4704_VENDOR_ID, BCM4704_DEVICE_ID, NULL)) != NULL) { + /* Reset PrefetchEn (PE) */ + pci_write_config_dword(dev, 0x8c, 1); + if (debug >= 1) { + gprintk("reset PrefetchEn on BCM4704 when HiNT bridge is present\n"); + } + } + } + } + /* Enable fast back-to-back read/write */ + if ((dev = PCI_FIND_DEV(PI7C8150_VENDOR_ID, PI7C8150_DEVICE_ID, NULL)) != NULL) { + pci_read_config_word(dev, PCI_COMMAND, &cmd); + cmd |= PCI_COMMAND_FAST_BACK; + pci_read_config_byte(dev, PCI_BRIDGE_CONTROL, &bridge_ctrl); + bridge_ctrl |= PCI_BRIDGE_CTL_FAST_BACK; + pci_write_config_word(dev, PCI_COMMAND, 0); + pci_write_config_byte(dev, PCI_BRIDGE_CONTROL, bridge_ctrl); + pci_write_config_word(dev, PCI_COMMAND, cmd); + } + /* Netlogic XLP CPU */ + for(rc_index = 0; rc_index < MAX_RC_NUM; rc_index++) { + dev_on_rc = pci_do_rc_dev_find(rc_index); + if (dev_on_rc != NULL ) { + dev = PCI_FIND_DEV(0x184e, 0x1004, NULL); + if (dev != NULL ) { + pci_write_config_dword(dev,0x78,MAX_PAYLOAD_256B | + MAX_READ_REQ_256B); + } + } + } + if ((dev = PCI_FIND_DEV(0x14e4, 0xb634, NULL)) != NULL) { + pci_write_config_dword(dev,0x78,MAX_PAYLOAD_256B | + MAX_READ_REQ_256B); + } + + if ((dev = PCI_FIND_DEV(PCI_VNDID_PERICOM, PCI_DEVID_PI7C9X130, NULL)) != NULL) { + /* + * Configure the PCIE cap: Max payload size: 256, Max Read + * Request size: 256, disabling relax ordering. + * Writes to the PCIE capability device control register + */ + pci_write_config_dword(dev, DEV_CTRL_REG, + MAX_PAYLOAD_256B | MAX_READ_REQ_256B); + } + + if ((dev = PCI_FIND_DEV(FSL_VENDOR_ID, FSL8548PCIE_DEVICE_ID, NULL)) != NULL || + (dev = PCI_FIND_DEV(FSL_VENDOR_ID, FSL2020EPCIE_DEVICE_ID, NULL)) != NULL) { + /* + * Configure the PCIE cap: Max payload size: 256, Max Read + * Request size: 256, disabling relax ordering. + * Writes to the PCIE capability device control register + */ + pci_write_config_dword(dev, FSL8548PCIE_DEV_CTRL_REG, + MAX_PAYLOAD_256B | MAX_READ_REQ_256B); + } + if ((dev = PCI_FIND_DEV(BCM4716_VENDOR_ID, BCM4716PCIE_DEVICE_ID, NULL)) != NULL || + (dev = PCI_FIND_DEV(BCM53000_VENDOR_ID, BCM53000PCIE_DEVICE_ID, NULL)) != NULL) { + uint32 tmp, maxpayld, device_bmp=0, mask; + unsigned long addr; + uint16 tmp16, tmp161; + int i, bus0 = -1, bus1 = -1, port; + struct pci_dev *pcie0, *pcie1; + + pcie0 = dev; + bus0 = dev->bus->number; + if ((pcie1 = PCI_FIND_DEV(BCM53000_VENDOR_ID, BCM53000PCIE_DEVICE_ID, pcie0)) != NULL) { + bus1 = pcie1->bus->number; + } + + for(i = 0; i < _ndevices; i++) { + bde_ctrl_t *ctrl = _devices + i; + + mask = BDE_SWITCH_DEV_TYPE | BDE_PCI_DEV_TYPE; + if ((ctrl->dev_type & mask) == mask) { + if (ctrl->pci_device->bus->number == bus0) { + device_bmp |= 1 << 0; + } + if (ctrl->pci_device->bus->number == bus1) { + device_bmp |= 1 << 1; + } + } + } + + /* configure the PCIE cap: Max payload size: 256, Max Read + * Request size: 256, disabling relax ordering. + * Writes to the PCIE capability device control register + */ + + i = 0; + while(device_bmp) { + if (device_bmp & (1 << i)){ + port = i ; + pci_read_config_dword(BCM53000PCIE_DEV(port), + BCM53000PCIE_DEV_CAP_REG, &tmp); + maxpayld = (tmp & BCM53000PCIE_MAX_PAYLOAD_MASK); + if (debug >= 1) { + gprintk("port %d\n",port); + gprintk("DevCap (@%x): 0x%x%c\n", BCM53000PCIE_DEV_CAP_REG, tmp, + (maxpayld != BCM53000PCIE_CAP_MAX_PAYLOAD_256B) ? ' ':'\n'); + } + if (maxpayld != BCM53000PCIE_CAP_MAX_PAYLOAD_256B) { + addr = BCM53000PCIE_BASE(port); + addr |= (BCM53000PCIE_SROM_SPACE | BCM53000PCIE_SPROM_OFFSET); + tmp16 = *((uint16 *)addr); + if (debug >= 1){ + gprintk("addr %lx spromData.MaxPayloadSize: 0x%x\n", addr, tmp16); + } + mask = BCM53000PCIE_SPROM_MAX_PAYLOAD_MASK; + if ((tmp16 & mask) != BCM53000PCIE_SPROM_MAX_PAYLOAD_256B) { + tmp161 = (tmp16 & ~mask) | BCM53000PCIE_SPROM_MAX_PAYLOAD_256B; + *((uint16 *)addr) = tmp161; + if (debug >= 1) { + tmp16 = 0; + tmp16 = *((uint16 *)addr); + gprintk("Enable spromData.MaxPayloadSize to 1 (256 bytes): " + "0x%x (%s w/ 0x%x)\n", tmp161, + ((tmp16 & mask) == BCM53000PCIE_SPROM_MAX_PAYLOAD_256B) ? + "Success":"Fail", + tmp16); + } + } + pci_read_config_dword(BCM53000PCIE_DEV(port), + BCM53000PCIE_DEV_CAP_REG, &tmp); + if (debug >= 1){ + gprintk("DevCap (@%x): now is 0x%x\n\n", + BCM53000PCIE_DEV_CAP_REG, tmp); + } + } + + addr = BCM53000PCIE_BASE(port); + addr |= (BCM53000PCIE_FUNC0_COFIG_SPACE | BCM53000PCIE_DEV_CTRL_REG); + tmp16 = *((uint16 *)addr); + if (debug >= 1) { + gprintk("DevControl (@%x): 0x%x\n", BCM53000PCIE_DEV_CTRL_REG, tmp16); + } + if (!(tmp16 & MAX_PAYLOAD_256B) || !(tmp16 & MAX_READ_REQ_256B)) { + tmp161 = tmp16 | MAX_PAYLOAD_256B | MAX_READ_REQ_256B; + *((uint16 *)addr) = tmp161; + if (debug >= 1) { + tmp16 = 0; + tmp16 = *((uint16 *)addr); + gprintk("addr %lx Enable DevControl MaxPayloadSize to 1 (256 bytes): " + "0x%x (%s w/ 0x%x)\n", addr, tmp161, + (tmp16 & MAX_PAYLOAD_256B) ? "Success":"Fail", + tmp16); + gprintk("Enable DevControl MaxReadRequestSize to 1 (256 bytes): " + "0x%x (%s w/ 0x%x)\n\n", tmp161, + (tmp16 & MAX_READ_REQ_256B) ? "Success":"Fail", + tmp16); + } + } + device_bmp &= ~(1 << i); + } + i++; + } + } + + /* + * Configure max payload to 512 on all ports in the PLX8608/PLX8617. + * The device supports 128, 512, and 1024 max payload sizes. + */ + dev = NULL; + while ((dev = PCI_FIND_DEV(PCI_VENDOR_ID_PLX, PCI_ANY_ID, dev)) != NULL) { + if ((dev->device == PLX_PEX8608_DEV_ID) || + (dev->device == PLX_PEX8617_DEV_ID)) { + uint16 ctrl_reg; + pci_read_config_word(dev, PLX_PEX86XX_DEV_CTRL_REG, &ctrl_reg); + ctrl_reg = (ctrl_reg & ~(7<<5)) | MAX_PAYLOAD_512B; + pci_write_config_word(dev, PLX_PEX86XX_DEV_CTRL_REG, ctrl_reg); + } + } + return 0; +} + +#ifdef BCM_PLX9656_LOCAL_BUS + +#define PLX_LAS0_BA 0x00000004 /* LAS0 Local Base Address Remap */ +#define PLX_LAS1_BA 0x000000f4 /* LAS1 Local Base Address Remap */ +#define PLX_LAS_EN 0x00000001 /* Space Enable bit */ + +#define PLX_MMAP_PCIBAR0 0 /* Memory-Mapped Config (PCIBAR0) */ +#define PLX_LAS0_PCIBAR2 2 /* Local Address Space 0 (PCIBAR2) */ +#define PLX_LAS1_PCIBAR3 3 /* Local Address Space 1 (PCIBAR3) */ + +STATIC int +_plx_las_bar_get(struct pci_dev *dev) +{ + void *local_config_addr; + int bar = -1; + + local_config_addr = IOREMAP(pci_resource_start(dev, PLX_MMAP_PCIBAR0), + pci_resource_len(dev, PLX_MMAP_PCIBAR0)); + if (local_config_addr) { + uint32 las_remap_reg; + /* + * Make sure LAS0BA or LAS1BA is enabled before returning + * BAR that will be used to access the Local Bus + */ + las_remap_reg = ioread32(local_config_addr + PLX_LAS0_BA); + if (las_remap_reg & PLX_LAS_EN) { + bar = PLX_LAS0_PCIBAR2; + } else { + las_remap_reg = ioread32(local_config_addr + PLX_LAS1_BA); + if (las_remap_reg & PLX_LAS_EN) { + bar = PLX_LAS1_PCIBAR3; + } + } + } + iounmap(local_config_addr); + return bar; +} +#endif /* BCM_PLX9656_LOCAL_BUS */ + +static void +_shbde_log_func(int level, const char *str, int param) +{ + level = (level >= SHBDE_DBG) ? 1 : 0; + if (debug >= level) { + gprintk("%s (%d)\n", str, param); + } +} +/* + * Function: _device_rescan_validate + * + * Purpose: + * Check if the device is ever probed or not. + * Parameters: + * dev - Linux PCI device structure + * Returns: + * >= 0 : dev is ever probed + * reutrn value is the index point to the _devices[] + * -1 : dev is not probed before. + */ +static int +_device_rescan_validate(struct pci_dev *dev) +{ + bde_ctrl_t *ctrl; + int i; + + if (PCI_FUNC(dev->devfn) > 0) { + return -1; + } + ctrl = NULL; + for (i = 0; i < _ndevices; i ++) { + ctrl = _devices + i; + /* check the device id */ + if (dev->device == ctrl->bde_dev.device) { + /* check the bus number */ + if ((dev->bus)) { + if ((dev->bus->number == ctrl->bus_no) && + (pci_domain_nr(dev->bus) == ctrl->domain_no)) { + return i; + } + } + } + } + return -1; +} + +#ifdef CONFIG_PCI_MSI + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) +/** + * _pci_msix_table_size - return the number of device's MSI-X table entries + * @dev: pointer to the pci_dev data structure of MSI-X device function + */ +static int +_pci_msix_table_size(struct pci_dev *dev) +{ + int nr_entries = 0; + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,110)) + u16 control; + int pos; + + pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); + if (pos) { + pci_read_config_word(dev, msi_control_reg(pos), &control); + nr_entries = msix_table_size(control); + } +#else +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)) +{ + /* Pass large entry value to enable MSIX to get # of entires */ + struct msix_entry *entries; + entries = kmalloc(sizeof(struct msix_entry) * + PCI_MSIX_FLAGS_QSIZE, GFP_KERNEL); + if (entries != NULL) { + nr_entries = pci_enable_msix(dev, + entries, PCI_MSIX_FLAGS_QSIZE); + if (nr_entries < 0) { + nr_entries = 0; + } + pci_disable_msix(dev); + kfree(entries); + } +} +#else + nr_entries = pci_msix_vec_count(dev); +#endif +#endif + + return nr_entries; +} +#endif + +static int +_msi_connect(bde_ctrl_t *ctrl) +{ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + int ret; + if (ctrl->use_msi == PCI_USE_INT_MSIX) { + int i; + + ret = _pci_msix_table_size(ctrl->pci_device); + if (ret == 0) { + /* MSI-X failed */ + gprintk("MSI-X not supported.\n"); + goto er_intx; + } + ctrl->entries = kcalloc(ret, sizeof(struct msix_entry), GFP_KERNEL); + + if (!ctrl->entries) { + goto er_intx; + } + /* Only one vector is mapped by default */ + /* May be more in future, can be controlled using module param */ + ctrl->msix_cnt = msixcnt; + if (unlikely(debug > 1)) + gprintk("MSIX Table size = %d\n", ctrl->msix_cnt); + for (i = 0; i < ctrl->msix_cnt; i++) + ctrl->entries[i].entry = i; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0) + ret = pci_enable_msix_range(ctrl->pci_device, + ctrl->entries, ctrl->msix_cnt, ctrl->msix_cnt); +#else + ret = pci_enable_msix(ctrl->pci_device, + ctrl->entries, ctrl->msix_cnt); +#endif + if (ret > 0) { + /* Not enough vectors available , Retry MSI-X */ + gprintk("Retrying with MSI-X interrupts = %d\n", ret); + ctrl->msix_cnt = ret; + msixcnt = ret; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0) + ret = pci_enable_msix_range(ctrl->pci_device, + ctrl->entries, ctrl->msix_cnt, ctrl->msix_cnt); +#else + ret = pci_enable_msix(ctrl->pci_device, + ctrl->entries, ctrl->msix_cnt); +#endif + if (ret != 0) + goto er_intx_free; + } else if (ret < 0) { + /* Error */ + goto er_intx_free; + } else { + gprintk("Enabled MSI-X interrupts = %d\n", ctrl->msix_cnt); + return 0; + } + } +#endif + + if (ctrl->use_msi == PCI_USE_INT_MSI) { + if (pci_enable_msi(ctrl->pci_device) == 0) { + ctrl->iLine = ctrl->pci_device->irq; + } else { + /* MSI failed */ + gprintk("Failed to initialize MSI interrupts.\n"); + goto er_intx; + } + } else { + /* failed */ + gprintk("Not MSI/MSIX interrupt.\n"); + goto er_intx; + } + return 0; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) +er_intx_free: + gprintk("Failed to enable MSI-X interrupts = %d\n", ret); + kfree(ctrl->entries); +#endif +er_intx: + return -1; + +} + +static int +_msi_disconnect(bde_ctrl_t *ctrl) +{ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + if (ctrl->use_msi == PCI_USE_INT_MSIX) { + if (ctrl->msix_cnt) { + pci_disable_msix(ctrl->pci_device); + kfree(ctrl->entries); + ctrl->entries = NULL; + ctrl->msix_cnt = 0; + } + } +#endif + if (ctrl->use_msi == PCI_USE_INT_MSI) { + pci_disable_msi(ctrl->pci_device); + } else { + gprintk("MSI not used\n"); + } + return 0; +} + +#endif + + +static void +config_pci_intr_type(struct pci_dev *dev, bde_ctrl_t *ctrl, int iproc) +{ +#ifdef CONFIG_PCI_MSI + int ret; + shbde_iproc_config_t icfg; + + /* Each device follows global policy by default */ + ctrl->use_msi = use_msi; + + if (unlikely(debug > 1)) + gprintk("%s: msi = %d\n", __func__, ctrl->use_msi); + + /* Check IPROC version for MSIX support */ + if (iproc && ctrl->bde_dev.base_address1 && + (ctrl->use_msi == PCI_USE_INT_MSIX)) { + if (shbde_pci_iproc_version_get(&ctrl->shbde, dev, &icfg.iproc_ver, + &icfg.cmic_ver, &icfg.cmic_rev)) { + if (icfg.iproc_ver < 0xe) { + gprintk("%s: MSI-X not supported, using MSI.\n", __func__); + ctrl->use_msi = PCI_USE_INT_MSI; + } + } + } + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + if (ctrl->use_msi == PCI_USE_INT_MSIX) { + /* check for support MSIX vector */ + ret = _pci_msix_table_size(ctrl->pci_device); + if (ret == 0) { + gprintk("%s: Zero MSIX table size\n", __func__); + ctrl->use_msi = PCI_USE_INT_MSI; + } + } +#endif + + if (ctrl->use_msi == PCI_USE_INT_MSI) { + /* check for support MSI vector */ + ret = pci_enable_msi(ctrl->pci_device); + if (ret < 0) { + ctrl->use_msi = PCI_USE_INT_INTX; + gprintk("%s: Failed to enable MSI, using INTx.\n", __func__); + } else { + pci_disable_msi(ctrl->pci_device); + } + } +#else + ctrl->use_msi = PCI_USE_INT_INTX; +#endif +} + +/* + * Function: _pci_probe + * + * Purpose: + * Device initialization callback used by the Linux PCI + * subsystem. Called as a result of pci_register_driver(). + * Parameters: + * dev - Linux PCI device structure + * Returns: + * 0 + */ +static int +_pci_probe(struct pci_dev *dev, const struct pci_device_id *ent) +{ + bde_ctrl_t *ctrl; + resource_size_t paddr; + uint16 cmd = 0; + uint32 bar_len; + int cmic_bar; + int baroff = 0; + int iproc = 0; + uint32 gmac_base = 0; + int plx_dev = 0; + int eth_dev = 0; + int cpu_dev = 0; + int update_devid = 0; + int paxb_core = 0; + int rescan = 0, rescan_idx = -1; + shbde_hal_t shared_bde, *shbde = &shared_bde; + + if (debug >= 4) {gprintk("probing: vendor_id=0x%x, device_id=0x%x\n", dev->vendor, dev->device);} + if (nodevices == 1) { + return 0; + } + + /* Initialize Linux hardware abstraction for shared BDE functions */ + linux_shbde_hal_init(shbde, _shbde_log_func); + + /* + * If an AXI-based switch device has been found already, then it means + * that the AXI bus has been probed, and that we should ignore devices + * found on PCI bus zero. + */ + +#if defined(IPROC_CMICD) + if ((dev->bus) && (dev->bus->number == 0)) { + int i; + uint32 mask = BDE_SWITCH_DEV_TYPE | BDE_AXI_DEV_TYPE; + + for (i = 0; i < _ndevices; i++) { + ctrl = _devices + i; + + if ((ctrl->dev_type & mask) == mask) { + return 0; + } + } + } +#endif /* IPROC_CMICD */ + + /* + * Note that a few supported devices have a non-Broadcom PCI vendor ID, + * but since none of their associated PCI device IDs collide with the + * Broadcom device IDs, the probe code below only checks the device ID. + */ + + switch (dev->device) { + case PCI_DEVICE_ID_PLX_9056: +#ifdef DNX_TEST_BOARD + break; /* a PCIe bridge to a non PCIe device should be treated as the device */ +#endif /* DNX_TEST_BOARD */ + case PCI_DEVICE_ID_PLX_9656: + plx_dev = 1; + break; +#if defined (BCM_ROBO_SUPPORT) && defined(KEYSTONE) + case BCM53000_GMAC_ID: + eth_dev = 1; + gmac_base = SB_ENUM_BASE; + break; +#endif +#if defined (BCM_ROBO_SUPPORT) + case BCM47XX_ENET_ID: + eth_dev = 1; + break; +#endif + case BCM53000PCIE_DEVICE_ID: + cpu_dev = 1; + break; + /* + * The device ID for 56500, 56100 and 56300 family of devices may + * be incorrect just after a PCI HW reset. It needs to be read + * again after stabilization. + */ + case BCM56102_DEVICE_ID: + case BCM56504_DEVICE_ID: + case BCM56304_DEVICE_ID: + case BCM56314_DEVICE_ID: + case BCM56112_DEVICE_ID: + update_devid = 1; + break; + default: + break; + } + + /* Check if the device is ever probed. */ + rescan_idx = _device_rescan_validate(dev); + if (rescan_idx != -1) { + rescan = 1; + } + + ctrl = NULL; + if (plx_dev) { +#if defined(BCM_PLX9656_LOCAL_BUS) + /* PLX chip itself won't be part of _devices[]. */ + baroff = _plx_las_bar_get(dev); + if (baroff == -1) { + gprintk("No Local Address Space enabled in PLX\n"); + return 0; + } + ctrl = &plx_ctrl; + num_plx++; +#endif + } else if (eth_dev) { + if (_ether_ndevices >= LINUX_BDE_MAX_ETHER_DEVICES) { + return 0;; + } + ctrl = _devices + _ndevices++; + _ether_ndevices++; + ctrl->dev_type |= BDE_ETHER_DEV_TYPE; + ctrl->iLine = dev->irq; + if (debug >= 1) + gprintk("Found PCI device %04x:%04x as Ethernet device\n", + dev->vendor, dev->device); + } else if (cpu_dev) { + if (_cpu_ndevices >= LINUX_BDE_MAX_CPU_DEVICES) { + return 0;; + } + ctrl = _devices + _ndevices++; + _cpu_ndevices++; + ctrl->dev_type |= BDE_CPU_DEV_TYPE; + if (debug >= 1) + gprintk("Found PCI device %04x:%04x as CPU device\n", + dev->vendor, dev->device); + } else { + if (PCI_FUNC(dev->devfn) > 0) { + return 0; + } + if (_switch_ndevices >= LINUX_BDE_MAX_SWITCH_DEVICES) { + return 0; + } + + if (rescan) { + if (debug >= 1) { + gprintk("PCI device %04x:%04x is re-probed \n", + dev->vendor, dev->device); + } + ctrl = _devices + rescan_idx; + ctrl->dev_state = BDE_DEV_STATE_CHANGED; + } else { + ctrl = _devices + _ndevices++; + _switch_ndevices++; + ctrl->dev_type |= BDE_SWITCH_DEV_TYPE; + ctrl->domain_no = pci_domain_nr(dev->bus); + ctrl->bus_no = dev->bus->number; + ctrl->dev_state = BDE_DEV_STATE_NORMAL; + } + + /* Save shared BDE HAL in device structure */ + memcpy(&ctrl->shbde, shbde, sizeof(ctrl->shbde)); + + if (update_devid) { + /* Re-read the device ID */ + pci_read_config_word(dev, + PCI_DEVICE_ID, + &ctrl->bde_dev.device); + dev->device = ctrl->bde_dev.device; + } + + if (debug >= 4) {gprintk("Enabling PCI device : vendor_id=0x%x, device_id=0x%x\n", dev->vendor, dev->device);} + if (pci_enable_device(dev)) { + gprintk("Cannot enable PCI device : vendor_id = %x, device_id = %x\n", + dev->vendor, dev->device); + } + + /* FIXME: "workarounds" previously called "total h_acks" */ + /* + * These are workarounds to get around some existing + * kernel problems :( + */ + + /* + * While probing we determine the overall limits for the PCI + * memory windows across all devices. These limits are used + * later on by the PCI-PCI bridge code. + */ + if (pci_resource_start(dev, baroff) < _pci_mem_start) { + _pci_mem_start = pci_resource_start(dev, baroff); + } + if (pci_resource_end(dev, baroff) > _pci_mem_end) { + _pci_mem_end = pci_resource_end(dev, baroff); + } + +#ifdef CONFIG_SANDPOINT + /* + * Something wrong with the PCI subsystem in the mousse kernel. + * The device is programmed correctly, but the irq in the pci + * structure is hosed. This checks for the hosed-ness and fixes it. + */ + if (dev->irq > 100) { + dev->irq = 2; + gprintk("irq problem: setting irq = %d\n", dev->irq); + } +#endif + +#ifdef CONFIG_BMW + /* + * PCI subsystem does not always program the system correctly. + */ + if (dev->irq < 16 && dev->irq != 2) { + dev->irq = 2; + gprintk("irq problem: setting irq = %d\n", dev->irq); + } +#endif + +#ifdef CONFIG_IDT_79EB334 + /* + * IDT kernel is not currently mapping interrupts correctly + * Hardwired to core mips interrupt, irq 3 for kernel 2.4.18 + */ + if (dev->irq != 3) { + dev->irq = 3; + gprintk("irq problem: setting irq = %d\n", dev->irq); + } +#endif + +#ifdef CONFIG_BCM94702_CPCI + /* + * Hardwired to core mips interrupt irq 6 on MBZ + */ + if (dev->irq != 6) { + dev->irq = 6; + gprintk("irq problem: setting irq = %d\n", dev->irq); + } +#endif + + if ((PCI_FIND_DEV(BCM4704_VENDOR_ID, BCM4704_DEVICE_ID, NULL)) != NULL) { + /* + * Decrease the PCI bus priority for the CPU for better overall + * system performance. This change significantly reduces the + * number of PCI retries from other devices on the PCI bus. + */ + void * _mc_vbase = IOREMAP(BCM4704_MEMC_BASE, 0x1000); + int priorinv = 0x80; + static int done = 0; + if (!done) { + done = 1; + writel(priorinv, _mc_vbase + BCM4704_MEMC_PRIORINV); + if (debug >= 1) + gprintk("set BCM4704 PriorInvTim register to 0x%x\n", priorinv); + iounmap(_mc_vbase); + } + } + + if ((PCI_FIND_DEV(SIBYTE_PCI_VENDOR_ID, SIBYTE_PCI_DEVICE_ID, NULL)) != NULL) { + /* + * The BCM91125CPCI CPU boards with a PCI-PCI bridge use the same + * interrupt line for all switch ships behind the bridge. + */ + if (PCI_FIND_DEV(DC21150_VENDOR_ID, DC21150_DEVICE_ID, NULL) || + PCI_FIND_DEV(HINT_HB4_VENDOR_ID, HINT_HB4_DEVICE_ID, NULL) || + PCI_FIND_DEV(PI7C8150_VENDOR_ID, PI7C8150_DEVICE_ID, NULL)) { + /* + * By default we try to guess the correct IRQ based on the design. + * For now we only look at the bridge vendor, but it may be necessary + * to look at the switch chip configuration as well. + */ + if (forceirq == -1) { + if ((PCI_FIND_DEV(HINT_HB4_VENDOR_ID, HINT_HB4_DEVICE_ID, NULL)) || + ((dev->device == BCM5674_DEVICE_ID) && + (PCI_FIND_DEV(PI7C8150_VENDOR_ID, PI7C8150_DEVICE_ID, NULL)))) { + forceirq = 58; + } else { + forceirq = 56; + } + } + } + } + + if (((PCI_FIND_DEV(BCM58525_PCI_VENDOR_ID, BCM58525_PCI_DEVICE_ID, NULL)) != NULL) || + ((PCI_FIND_DEV(BCM58525_PCI_VENDOR_ID, BCM58522_PCI_DEVICE_ID, NULL)) != NULL) || + ((PCI_FIND_DEV(BCM58712_PCI_VENDOR_ID, BCM58712_PCI_DEVICE_ID, NULL)) != NULL) ) { + /* BCM58525/BCM58712 CPU boards support 128 Max payload size */ + if (maxpayload) { + maxpayload = 128; + if (debug >= 1) gprintk("force max payload size to 128\n"); + } + } + + if (forceirq > 0 && dev->irq != (uint32) forceirq) { + if (forceirqubm & (1U << (_ndevices - 1))) { + dev->irq = forceirq; + if (debug >= 1) gprintk("force irq to %d\n", forceirq); + } + } else if (debug >= 1) gprintk("found irq %d\n", dev->irq); + + ctrl->iLine = dev->irq; + if (unlikely(debug > 1)) + gprintk("%s:irq = %d\n",__func__, ctrl->iLine); + + if (shbde_pci_is_pcie(shbde, dev)) { + /* Set PCIe max payload */ + shbde_pci_max_payload_set(shbde, dev, maxpayload); + } else { + /* Set PCI retry to infinite on non-PCIe switch device */ + pci_write_config_word(dev, 0x40, 0x0080); + if (debug >= 1) gprintk("set DMA retry to infinite on switch device\n"); + } + } + +#if defined(BCM_DFE_SUPPORT) + switch (dev->device) { + case BCM88750_DEVICE_ID: + case BCM88753_DEVICE_ID: + case BCM88755_DEVICE_ID: + case BCM88770_DEVICE_ID: + case BCM88773_DEVICE_ID: + case BCM88774_DEVICE_ID: + case BCM88775_DEVICE_ID: + case BCM88776_DEVICE_ID: + case BCM88777_DEVICE_ID: + case BCM88950_DEVICE_ID: + case BCM88953_DEVICE_ID: + case BCM88954_DEVICE_ID: + case BCM88955_DEVICE_ID: + case BCM88956_DEVICE_ID: + case BCM88752_DEVICE_ID: + case BCM88772_DEVICE_ID: + case BCM88952_DEVICE_ID: + + /* + * For DMA transactions - set Max_Payload_Size and + * Max_Read_Request_Size to 128 bytes. + */ + pci_write_config_byte(dev, 0xb5, 0x0c); + pci_write_config_byte(dev, 0xb4, 0x0); + break; + default: + break; + } +#endif /* BCM_DFE_SUPPORT */ + +#if defined(BCM_DNXF_SUPPORT) + /*All Ramon devices from 0x8790 to 0x879F*/ + if ((dev->device & BCM_DNXF_DEVID_MASK) == BCM88790_DEVICE_ID) { + /* + * For DMA transactions - set Max_Payload_Size and + * Max_Read_Request_Size to 128 bytes. + */ + pci_write_config_byte(dev, 0xb5, 0x0c); + pci_write_config_byte(dev, 0xb4, 0x0); + + } +#endif + + /* Prevent compiler warning */ + if (ctrl == NULL) { + return 0; + } + + ctrl->be_pio = 0; + ctrl->dev_type |= BDE_PCI_DEV_TYPE; + ctrl->pci_device = dev; + pci_set_drvdata(dev, ctrl); + + /* Check for iProc device */ + if (shbde_pci_is_iproc(shbde, dev, &cmic_bar)) { + iproc = 1; + if (cmic_bar >= 0) { + baroff = cmic_bar; + } + } +#ifdef DNX_TEST_BOARD + else if (dev->device == PLX9056_DEVICE_ID && baroff == 0) { + baroff = 2; + ctrl->dev_type |= BDE_NO_IPROC/* | BDE_BYTE_SWAP*/; + } +#endif /* DNX_TEST_BOARD */ + + /* Get the device revision */ + pci_read_config_byte(dev, PCI_REVISION_ID, &ctrl->bde_dev.rev); + + /* Map in the device */ + ctrl->bde_dev.device = dev->device; + paddr = pci_resource_start(dev, baroff); + + switch (dev->device) { +#if defined(BCM_PETRA_SUPPORT) && defined(__DUNE_LINUX_BCM_CPU_PCIE__) + case GEDI_DEVICE_ID: + case PCP_PCI_DEVICE_ID: + bar_len = 0x1000000; + break; +#endif + default: + bar_len = pci_resource_len(dev, baroff); + break; + } + + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(paddr, bar_len); + ctrl->phys_address = paddr; + if (debug >= 3) { + gprintk("BAR %d: kernel addr:0x%lx phys addr:0x%lx length:%lx\n", + baroff, (unsigned long)ctrl->bde_dev.base_address, (unsigned long)paddr, (unsigned long)bar_len); + } + + /* Map secondary address spaces */ + if (iproc +#ifdef DNX_TEST_BOARD + || (dev->device == PLX9056_DEVICE_ID && baroff == 2) +#endif /* DNX_TEST_BOARD */ + ) { + paddr = pci_resource_start(dev, 0); + bar_len = pci_resource_len(dev, 0); + ctrl->bde_dev.base_address1 = (sal_vaddr_t)IOREMAP(paddr, bar_len); + ctrl->phys_address1 = paddr; + if (debug >= 3) { + gprintk("BAR 0: kernel addr:0x%lx phys addr:0x%lx length:%lx\n", + (unsigned long)ctrl->bde_dev.base_address1, (unsigned long)paddr, (unsigned long)bar_len); + } + } + + /* configure interrupt type */ + config_pci_intr_type(dev, ctrl, iproc); + + /* Configure iProc PCI-AXI bridge */ + if (iproc && ctrl->bde_dev.base_address1) { + void *iproc_regs; + shbde_iproc_config_t *icfg = &shbde->icfg; + + /* Mapped iProc regs in PCI BAR 0 */ + iproc_regs = (void *)ctrl->bde_dev.base_address1; + + /* iProc configuration parameters */ + (void)shbde_pci_iproc_version_get(shbde, dev, &icfg->iproc_ver, + &icfg->cmic_ver, &icfg->cmic_rev); + shbde_iproc_config_init(icfg, ctrl->bde_dev.device, ctrl->bde_dev.rev); + + if (debug >= 2) { + gprintk("iproc version = %x dma_hi_bits = %x\n", icfg->iproc_ver, icfg->dma_hi_bits); + } + icfg->use_msi = ctrl->use_msi; + + /* Call shared function */ + paxb_core = shbde_iproc_paxb_init(shbde, iproc_regs, icfg); + + /* Save PCI core information for CMIC */ + if (paxb_core == 1) { + ctrl->dev_type |= BDE_DEV_BUS_ALT; + } + + /* Save MSI enable state information */ + if (ctrl->use_msi) { + ctrl->dev_type |= BDE_DEV_BUS_MSI; + } + + /* iProc PCIe preemphasis */ + shbde_iproc_pcie_preemphasis_set(shbde, iproc_regs, icfg, dev); + } + + /* Save shared BDE HAL in device structure */ + memcpy(&ctrl->shbde, shbde, sizeof(ctrl->shbde)); + + + /* + * Since the GMAC driver of Robo chips needs access to the + * ChipCommon and Wrapper registers, we set the base address + * as the enumeration base address and its size as 3MB to + * cover all Wrapper register regions. + */ + if (gmac_base) { + uint32_t offset; + + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(gmac_base, 0x300000); + + /* Record the base address of GMAC core */ + offset = ctrl->phys_address - gmac_base; + ctrl->alt_base_addr = ctrl->bde_dev.base_address + offset; + ctrl->phys_address = gmac_base; + } + + /* + * Workaround bug in FE2K A1 part; shows as A0 part in PCI config space, + * read the FE's regs directly to get the true revision + */ + if (ctrl->bde_dev.device == BCM88020_DEVICE_ID && ctrl->bde_dev.rev == 0) { +#define FE2000_REVISION_OFFSET (0x0) + uint32_t fe_rev; + + fe_rev = *((uint32_t*)(ctrl->bde_dev.base_address + FE2000_REVISION_OFFSET)); + if ((fe_rev >> 16) == BCM88020_DEVICE_ID) { + fe_rev &= 0xff; + } else { + fe_rev = (fe_rev >> 24) & 0xff; + } + ctrl->bde_dev.rev = fe_rev; + } + + ctrl->isr = NULL; + ctrl->isr_data = NULL; + + pci_read_config_word(dev, PCI_COMMAND, &cmd); + if (!(cmd & PCI_COMMAND_MEMORY) || !(cmd & PCI_COMMAND_MASTER)) { + cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; + pci_write_config_word(dev, PCI_COMMAND, cmd); + if (debug >= 1) gprintk("enable PCI resources 0x%x (PCI_COMMAND)\n", cmd); + } + + /* Check if we need 256 KB memory window (default is 64 KB) */ + bar_len = pci_resource_len(dev, baroff); + if (bar_len == 0x40000) { + ctrl->dev_type |= BDE_256K_REG_SPACE; + if (debug >= 1) gprintk("PCI resource len 256K\n"); + } else if (bar_len == 0x800000) { + ctrl->dev_type |= BDE_256K_REG_SPACE | BDE_8MB_REG_SPACE; + if (debug >= 1) gprintk("PCI resource len 8MB\n"); + } + +#if defined (BCM_ROBO_SUPPORT) && !defined(ALTA_ROBO_SPI) + /* MDC/MDIO path for pseudo PHY access to ROBO register on BCM5836/4704 */ + if (dev->device == BCM47XX_ENET_ID) { + ((uint32 *)ctrl->bde_dev.base_address)[0x410 / 4] = 0; + } +#endif + +#ifdef LINUX_BDE_DMA_DEVICE_SUPPORT + ctrl->dma_dev = &dev->dev; +#endif + + if (!rescan) { + _bde_add_device(); + } + + if (debug >= 2) { + gprintk("_pci_probe: configured dev:0x%x rev:0x%x with base_addresses: 0x%lx 0x%lx\n", + (unsigned)ctrl->bde_dev.device, (unsigned)ctrl->bde_dev.rev, + (unsigned long)ctrl->bde_dev.base_address, (unsigned long)ctrl->bde_dev.base_address1); + } + /* Let's boogie */ + + return 0; +} + +/* + * Function: _pci_remove + * + * Purpose: + * Detach driver from device. Called from pci_unregister_driver(). + * Parameters: + * dev - Linux PCI device structure + * Returns: + * 0 + */ +static void +_pci_remove(struct pci_dev* dev) +{ + bde_ctrl_t *ctrl; + + if (nodevices == 1) { + return; + } + +#if defined(BCM_DFE_SUPPORT) + if (dev->device == PCI_DEVICE_ID_PLX_9056) { + return; + } +#endif + + ctrl = (bde_ctrl_t *) pci_get_drvdata(dev); + + if (ctrl == NULL) { + /* Unused device */ + return; + } + ctrl->dev_state = BDE_DEV_STATE_REMOVED; + if (debug >= 1) { + gprintk("PCI device %04x:%04x is removed. \n", + dev->vendor, dev->device); + } + if (ctrl->bde_dev.base_address1) { + iounmap((void *)ctrl->bde_dev.base_address1); + } + if (ctrl->bde_dev.base_address) { + iounmap((void *)ctrl->bde_dev.base_address); + } + + /* Free our interrupt handler, if we have one */ + if (ctrl->isr || ctrl->isr2) { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + if (ctrl->use_msi >= PCI_USE_INT_MSIX) { + int i; + for (i = 0; i < ctrl->msix_cnt; i++) + free_irq(ctrl->entries[i].vector, ctrl); + } + else +#endif + { + free_irq(ctrl->iLine, ctrl); + } + } +#ifdef CONFIG_PCI_MSI + _msi_disconnect(ctrl); +#endif + ctrl->isr = NULL; + ctrl->isr_data = NULL; + ctrl->isr2 = NULL; + ctrl->isr2_data = NULL; +} + +static struct pci_driver _device_driver = { + probe: _pci_probe, + remove: _pci_remove, + id_table: _id_table, + /* The rest are dynamic */ +}; + +static void +_spi_device_setup(void) { + bde_ctrl_t *ctrl; + ctrl = _devices + _ndevices++; + _switch_ndevices++; + ctrl->dev_type |= BDE_SWITCH_DEV_TYPE; + ctrl->iLine = 0xa3; + ctrl->be_pio = 0; + ctrl->dev_type |= BDE_SPI_DEV_TYPE; + ctrl->bde_dev.device = spi_devid; + ctrl->bde_dev.rev = spi_revid; + if (debug >= 1) { + gprintk("SPI Slave Mode: force ctrl->bde_dev.device=0x%x\n",ctrl->bde_dev.device); + gprintk("SPI Slave Mode: force ctrl->bde_dev.rev=0x%x\n",ctrl->bde_dev.rev); + gprintk("SPI Slave Mode: force ctrl->dev_type=0x%x\n",ctrl->dev_type); + } +} +#endif /* BCM_ICS */ + + +#ifdef BCM_ROBO_SUPPORT + +#ifdef KEYSTONE +#define DEFAULT_FREQ (SPI_FREQ_DEFAULT) +#define FREQ_20MHZ (SPI_FREQ_20MHZ) +#else /* IPROC_CMICD */ +#define DEFAULT_FREQ (0) +#define FREQ_20MHZ (0) +#endif + + +/* +* The model_info /rev_info for Robo devices is defined like this: +* +* 31 28 27 24 23 20 19 16 15 8 7 0 +* +----+---------+------+-----+---------+--------+ +* | op | reserved| mask |len | page |offset | +* +----+---------+------+-----+---------+--------+ +* +* op: 1:OR phyidl, 2: use PCIE device ID +* mlen: mask len (in bytes) 1:means 0xf,2 means 0xff +* len: Size of model/rev ID register (in bytes) +* page: Page containing model ID and revision registers +* offset: Model/rev ID register offset +*/ +static struct bde_spi_device_id _spi_id_table[] = { + { BCM53242_PHYID_HIGH, BCM53242_PHYID_LOW , 0, 0, DEFAULT_FREQ}, + { BCM53262_PHYID_HIGH, BCM53262_PHYID_LOW , 0, 0, DEFAULT_FREQ}, + { BCM53115_PHYID_HIGH, BCM53115_PHYID_LOW , 0, 0, DEFAULT_FREQ}, + { BCM53118_PHYID_HIGH, BCM53118_PHYID_LOW , 0, 0, DEFAULT_FREQ}, + { BCM53280_PHYID_HIGH, BCM53280_PHYID_LOW , 0x101800e8, 0, FREQ_20MHZ}, + { BCM53101_PHYID_HIGH, BCM53101_PHYID_LOW , 0, 0x110240, FREQ_20MHZ}, + { BCM53125_PHYID_HIGH, BCM53125_PHYID_LOW , 0, 0x110240, FREQ_20MHZ}, + { BCM53128_PHYID_HIGH, BCM53128_PHYID_LOW , 0, 0x110240, FREQ_20MHZ}, + { BCM53600_PHYID_HIGH, BCM53600_PHYID_LOW , 0x101800e8, 0, FREQ_20MHZ}, + { BCM89500_PHYID_HIGH, BCM89500_PHYID_LOW ,0x240230, 0x110240, FREQ_20MHZ}, + { BCM53010_PHYID_HIGH, BCM53010_PHYID_LOW ,0x240230, 0x110240, 0}, + { BCM53018_PHYID_HIGH, BCM53018_PHYID_LOW ,0x240230, 0x110240, 0}, + { BCM5389_PHYID_HIGH, BCM5389_PHYID_LOW, 0x110230, 0x110240, DEFAULT_FREQ}, + { BCM53020_PHYID_HIGH, BCM53020_PHYID_LOW ,0x20240230, 0x110240, 0}, + { BCM5396_PHYID_HIGH , BCM5396_PHYID_LOW, 0x110230, 0x110240, DEFAULT_FREQ}, + { BCM53134_PHYID_HIGH, BCM53134_PHYID_LOW , 0, 0x110240, DEFAULT_FREQ}, + { 0, 0, 0, 0, 0 }, +}; +#endif + +#ifdef BCM_ROBO_SUPPORT + +static int +_spi_device_valid_check(unsigned short phyidh,unsigned short phyidl, uint8 check_flag) +{ + struct bde_spi_device_id *_ids; + int idx, match_idx; + + match_idx = -1; + idx = 0; + + if (check_flag == 0){ + /* check_flag == 0 check phyidh only*/ + for (_ids = _spi_id_table; + _ids->phyid_high && _ids->phyid_low; _ids++){ + if (_ids->phyid_high == phyidh) { + return 0; + } + } + /* No valid SPI devices found */ + return 1; + } else { + while(_spi_id_table[idx].phyid_high){ + if (phyidh == _spi_id_table[idx].phyid_high && + phyidl == _spi_id_table[idx].phyid_low) { + /* Found a match */ + match_idx = idx; + break; + } + idx++; + } + return match_idx; + } +} + +#if defined(IPROC_CMICD) || defined(KEYSTONE) +#define ROBO_ATTACH_AVAIL +#endif + +#ifdef ROBO_ATTACH_AVAIL + +#define SOC_ATTACH(_sc)\ + ai_soc_kattach(_sc) + +#if defined(IPROC_CMICD) +#ifdef BCM_STARFIGHTER3_SUPPORT +#define ROBO_ATTACH_SPI(_sih, _ss)\ + robo_attach_spi(_sih) +#define ROBO_DETACH_SPI(robo)\ + robo_detach_spi(robo) +#define ROBO_SPI_RREG(_robo, _dev, _page, _reg, _buf, _len) \ + robo_spi_rreg(_robo, _dev, _page, _reg, _buf, _len) +#define ROBO_SPI_WREG(_robo, _dev, _page, _reg, _buf, _len) \ + robo_spi_wreg(_robo, _dev, _page, _reg, _buf, _len) +#endif +#define ROBO_ATTACH(_sih, _ss)\ + robo_attach(_sih) +#define MAX_BUSTYPE 1 +#define ROBO_SWITCH_BUS(_robo, _bustype) +#define ROBO_SELECT_DEVICE(_robo, _phyidh, _phyidl) +#else /* KEYSTONE */ +#define ROBO_ATTACH(_sih, _ss)\ + robo_attach(_sih, _ss) +/* bustype 2: ROBO_MDCMDIO_BUS, 1: ROBO_SPI_BUS */ +#define MAX_BUSTYPE 2 +#define ROBO_SWITCH_BUS(_robo, _bustype)\ + robo_switch_bus(_robo, _bustype) + +#define ROBO_SELECT_DEVICE(_robo, _phyidh, _phyidl) \ + robo_select_device(_robo, _phyidh, _phyidl) +#endif + +#else + +#define SOC_ATTACH(_sc) (NULL) +#define ROBO_ATTACH(_sih, _ss) (NULL) +#define MAX_BUSTYPE (0) +#define ROBO_SWITCH_BUS(_robo, _bustype) +#define ROBO_SELECT_DEVICE(_robo, _phyidh, _phyidl) +#endif + + +#if defined(IPROC_CMICD) && defined(BCM_STARFIGHTER3_SUPPORT) +static int +probe_robo_switch_iproc_spi(void) +{ + int dev; + int max_devices, max_bustype; + uint8 buf[8]; + unsigned short phyidh = 0, phyidl = 0; + + + /* Get Robo device handle */ + if (robo == NULL) { + robo = (void *)ROBO_ATTACH_SPI(sbh, 0); + } + if (robo == NULL) { + return -ENODEV; + } + + max_bustype = MAX_BUSTYPE + 1; + + while(_spi_device_valid_check(phyidh, 0, 0)) { + max_bustype --; + if(!max_bustype) + return -ENODEV; + buf[0] = buf[1] = 0; + ROBO_SPI_RREG(robo, 0, 0x10, 0x04, buf, (uint)2); + phyidh = buf[0] | (buf[1] << 8); + /* re-try */ + if ((phyidh == 0x0) || (phyidh == 0xffff)) { + ROBO_SPI_RREG(robo, 0, 0x10, 0x04, buf, (uint)2); + phyidh = buf[0] | (buf[1] << 8); + } + } + + /* For psedo_phy access, only support one robo switch*/ + /* For Northstar, only one switch on SRAB interface */ + max_devices = (max_bustype == MAX_BUSTYPE) ? 1 : LINUX_BDE_MAX_SWITCH_DEVICES; + + for (dev = 0; dev < max_devices; dev++) { + bde_ctrl_t *ctrl; + int match_idx, i; + unsigned short phyidl_nr; /* phyidl with revision stripped */ + uint16 model_id; + uint8 rev_id; + uint32 addr, len; + uint32 mlen; + + if (_switch_ndevices >= LINUX_BDE_MAX_SWITCH_DEVICES) { + break; + } + buf[0] = buf[1] = 0; + ROBO_SPI_RREG(robo, dev, 0x10, 0x04, buf, (uint)2); + phyidh = buf[0] | (buf[1] << 8); + + buf[0] = buf[1] = 0; + ROBO_SPI_RREG(robo, dev, 0x10, 0x06, buf, (uint)2); + phyidl = buf[0] | (buf[1] << 8); + + /* Strip revision */ + phyidl_nr = phyidl & 0xfff0; + + match_idx = _spi_device_valid_check(phyidh, phyidl_nr, 1); + if (match_idx == -1) { + if (debug >= 1) gprintk("found %d robo device(s).\n", robo_switch); + break; + } + + model_id = phyidl_nr; + + if(_spi_id_table[match_idx].rev_info){ + addr = _spi_id_table[match_idx].rev_info & 0xffff; + len = (_spi_id_table[match_idx].rev_info >> 16) & 0xf; + ROBO_SPI_RREG(robo, dev, (addr >> 8), (addr & 0xff), buf, (uint)len); + mlen = (_spi_id_table[match_idx].rev_info >> 20) & 0xf; + rev_id = 0; + for (i = 0; i < mlen; i++) + rev_id |= buf[i] << (i << 3); + } else { + rev_id = phyidl & 0xf; + } + + gprintk("found robo device with %d:%04x:%04x:%04x:%02x\n", + dev, phyidh, phyidl, model_id, rev_id); + + ROBO_SELECT_DEVICE(robo, phyidh, phyidl); + + /* Match supported chips */ + ctrl = _devices + _ndevices++; + _switch_ndevices++; + + if (NULL == (ctrl->spi_device = (struct spi_dev *) + KMALLOC(sizeof(struct spi_dev), GFP_KERNEL))) { + gprintk("no memory available"); + return -ENOMEM; + } + ctrl->dev_type = (BDE_SPI_DEV_TYPE | BDE_SWITCH_DEV_TYPE); + ctrl->spi_device->cid = dev; + ctrl->spi_device->part = model_id; + ctrl->spi_device->rev = rev_id; + ctrl->spi_device->robo = robo; + ctrl->spi_device->phyid_high = phyidh; + ctrl->spi_device->phyid_low = phyidl; + ctrl->bde_dev.device = model_id; + ctrl->bde_dev.rev = rev_id; + ctrl->bde_dev.base_address = (sal_vaddr_t)NULL; + ctrl->isr = NULL; + ctrl->isr_data = NULL; + robo_switch++; + _bde_add_device(); + + } + + return robo_switch; + +} + +int spi_device_found = 0; + +#endif /* IPROC_CMICD || SF3 */ + + +static int +probe_robo_switch(void) +{ + int dev; + int max_devices, max_bustype; + uint8 buf[8]; + unsigned short phyidh = 0, phyidl = 0; +#if defined(KEYSTONE) + uint32 spi_freq = 0; +#endif +#if defined(IPROC_CMICD) + sal_vaddr_t addr_base; + uint32 data_reg; +#endif /* IPROC_CMICD */ + + + spin_lock_init(&bus_lock); + + if (_switch_ndevices) { + /* + * Currently skip probe robo if esw chips were found + * FIX this while combined plateform support. + */ + return robo_switch; + } + + /* Get Robo device handle */ + if (robo == NULL) { + sbh = (void *)SOC_ATTACH(NULL); + if (sbh == NULL) { + return -ENODEV; + } + } + +#if defined(IPROC_CMICD) && defined(BCM_STARFIGHTER3_SUPPORT) + robo_switch = probe_robo_switch_iproc_spi(); + + if (robo_switch > 0) { + /* Robo switch found by SPI probe */ + spi_device_found = 1; + gprintk("SPI device found, Skipping SRAB probe\n"); + return robo_switch; + } else { + gprintk("SPI device NOT found, Probe SRAB probe\n"); + ROBO_DETACH_SPI(robo); + } +#endif + + if (robo == NULL) { + robo = (void *)ROBO_ATTACH(sbh, 0); + } + if (robo == NULL) { + return -ENODEV; + } + + max_bustype = MAX_BUSTYPE + 1; + + while(_spi_device_valid_check(phyidh, 0, 0)) { + max_bustype --; + if(!max_bustype) + return -ENODEV; + ROBO_SWITCH_BUS(robo, max_bustype); + buf[0] = buf[1] = 0; + ROBO_RREG(robo, 0, 0x10, 0x04, buf, (uint)2); + phyidh = buf[0] | (buf[1] << 8); + /* re-try */ + if ((phyidh == 0x0) || (phyidh == 0xffff)) { + ROBO_RREG(robo, 0, 0x10, 0x04, buf, (uint)2); + phyidh = buf[0] | (buf[1] << 8); + } + } + + /* For psedo_phy access, only support one robo switch*/ + /* For Northstar, only one switch on SRAB interface */ + max_devices = (max_bustype == MAX_BUSTYPE) ? 1 : LINUX_BDE_MAX_SWITCH_DEVICES; + + for (dev = 0; dev < max_devices; dev++) { + bde_ctrl_t *ctrl; + int match_idx, i; + unsigned short phyidl_nr; /* phyidl with revision stripped */ + uint16 model_id; + uint8 rev_id; +#if defined(KEYSTONE) || defined(IPROC_CMICD) + uint32 addr, len; +#endif + uint32 mlen, op; + + if (_switch_ndevices >= LINUX_BDE_MAX_SWITCH_DEVICES) { + break; + } + buf[0] = buf[1] = 0; + ROBO_RREG(robo, dev, 0x10, 0x04, buf, (uint)2); + phyidh = buf[0] | (buf[1] << 8); + + buf[0] = buf[1] = 0; + ROBO_RREG(robo, dev, 0x10, 0x06, buf, (uint)2); + phyidl = buf[0] | (buf[1] << 8); + + /* Strip revision */ + phyidl_nr = phyidl & 0xfff0; + + match_idx = _spi_device_valid_check(phyidh, phyidl_nr, 1); + if (match_idx == -1) { + if (debug >= 1) gprintk("found %d robo device(s).\n", robo_switch); + break; + } + + if(_spi_id_table[match_idx].model_info){ +#if defined(KEYSTONE) || defined(IPROC_CMICD) + addr = _spi_id_table[match_idx].model_info & 0xffff; + len = (_spi_id_table[match_idx].model_info >> 16) & 0xf; +#endif + ROBO_RREG(robo, dev, (addr >> 8), (addr & 0xff), buf, (uint)len); + mlen = (_spi_id_table[match_idx].model_info >> 20) & 0xf; + model_id = 0; + for (i = 0; i < mlen; i++) + model_id |= buf[i] << (i << 3); + op = (_spi_id_table[match_idx].model_info >> 28) & 0xf; + if(op == 1) { + model_id |= phyidl_nr; +#if defined(IPROC_CMICD) + } else if (op == 2) { + /* The package id of NS+ is determined by : + * Write 0 to 0x18012120 (PAXB_0_CONFIG_IND_ADDR) + * Read 0x18012124 (PAX_B_CONFIG_IND_DATA), + * bits 31:16 will be the device id from OTP space + */ +#define PAXB_ENUM_BASE (0x18012000) +#define PAXB_CONFIG_IND_ADDR_OFFSET (0x120) +#define PAXB_CONFIG_IND_DATA_OFFSET (0x124) + + addr_base = (sal_vaddr_t)IOREMAP(PAXB_ENUM_BASE, 0x1000); + if (!addr_base) { + gprintk("ioremap of PAXB registers failed\n"); + } else { + writel(0x0, (uint32 *)(addr_base + + PAXB_CONFIG_IND_ADDR_OFFSET)); + data_reg = readl((uint32 *)(addr_base + + PAXB_CONFIG_IND_DATA_OFFSET)); + model_id = (data_reg >> 16); + iounmap((void *)addr_base); + + /* + * Some model ID can't be determined by PCIE device ID + * It needs to refer some OTP values. + */ + robo_model_id_adjust_from_otp(robo, &model_id); + } + +#undef PAXB_ENUM_BASE +#undef PAXB_CONFIG_IND_ADDR_OFFSET +#undef PAXB_CONFIG_IND_DATA_OFFSET +#endif /* IPROC_CMICD */ + } + } else { + model_id = phyidl_nr; + } + if(_spi_id_table[match_idx].rev_info){ +#if defined(KEYSTONE) || defined(IPROC_CMICD) + addr = _spi_id_table[match_idx].rev_info & 0xffff; + len = (_spi_id_table[match_idx].rev_info >> 16) & 0xf; +#endif + ROBO_RREG(robo, dev, (addr >> 8), (addr & 0xff), buf, (uint)len); + mlen = (_spi_id_table[match_idx].rev_info >> 20) & 0xf; + rev_id = 0; + for (i = 0; i < mlen; i++) + rev_id |= buf[i] << (i << 3); + } else { + rev_id = phyidl & 0xf; + } + gprintk("found robo device with %d:%04x:%04x:%04x:%02x\n", + dev, phyidh, phyidl, model_id, rev_id); + + ROBO_SELECT_DEVICE(robo, phyidh, phyidl); + + /* Match supported chips */ + ctrl = _devices + _ndevices++; + _switch_ndevices++; + + if (NULL == (ctrl->spi_device = (struct spi_dev *) + KMALLOC(sizeof(struct spi_dev), GFP_KERNEL))) { + gprintk("no memory available"); + return -ENOMEM; + } + ctrl->dev_type = (BDE_SPI_DEV_TYPE | BDE_SWITCH_DEV_TYPE); + ctrl->spi_device->cid = dev; + ctrl->spi_device->part = model_id; + ctrl->spi_device->rev = rev_id; + ctrl->spi_device->robo = robo; + ctrl->spi_device->phyid_high = phyidh; + ctrl->spi_device->phyid_low = phyidl; + ctrl->bde_dev.device = model_id; + ctrl->bde_dev.rev = rev_id; + ctrl->bde_dev.base_address = (sal_vaddr_t)NULL; + ctrl->isr = NULL; + ctrl->isr_data = NULL; + robo_switch++; + +#if defined(KEYSTONE) + spi_freq = _spi_id_table[match_idx].spifreq; +#endif + _bde_add_device(); + } + +#if defined(KEYSTONE) + /* Override the SPI frequency from user configuration */ + if (spifreq != 0) { + spi_freq = spifreq; + } + if (spi_freq != 0) { + /* + * The underlying chip can support the SPI frequency + * higher than default (2MHz). + */ + if (spi_freq != SPI_FREQ_DEFAULT) { + chipc_spi_set_freq(robo, 0, spi_freq); + } + } +#endif + return robo_switch; + +} + +#endif + +#if defined(BCM_METROCORE_LOCAL_BUS) +static bde_ctrl_t* +map_local_bus(uint64_t addr, uint32_t size) +{ + bde_ctrl_t *ctrl; + + ctrl = _devices + _ndevices++; + _switch_ndevices++; + + /* + * For now: use EB type as `local bus' + * (memory mapped, no DMA, no interrupts) + * metrocore local bus supports interrupts, but we don't use them. + */ + ctrl->dev_type |= BDE_EB_DEV_TYPE | BDE_SWITCH_DEV_TYPE + | (size > 64 * 1024 ? BDE_128K_REG_SPACE : 0); + ctrl->pci_device = NULL; /* No PCI bus */ + + /* Map in the device */ + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(addr, size); + ctrl->phys_address = addr; + + _bde_add_device(); + + return(ctrl); +} + +#define BME_REVISION_OFFSET (0x0) + +#endif + + +#ifdef BCM_METROCORE_LOCAL_BUS + /* + * SBX platform has both PCI- and local bus-attached devices + * The local bus devices have fixed address ranges (and don't + * support or require DMA), but are otherwise the same as PCI devices + */ +#define FPGA_IRQ 37 +#define FPGA_PHYS 0x100E0000 +#define BME_PHYS 0x100C0000 +#define SE_PHYS 0x100D0000 +#define FPGA_SIZE 0x00004000 +#define BME_SIZE 0x00004000 +#define MAC0_PHYS 0x100B0000 +#define MAC1_PHYS 0x100B8000 +#define MAC_SIZE 0x800 + + +/* + * Please refer to "Supervisor Fabric Module (SFM) Specification" + * page 23 for the following registers. + */ +#define FPGA_LC_POWER_DISABLE_OFFSET 0x4 +#define FPGA_LC_POWER_DISABLE_ENABLE_ALL_MASK 0x1e + +#define FPGA_LC_POWER_RESET_OFFSET 0x5 +#define FPGA_LC_POWER_RESET_ENABLE_ALL_MASK 0x1e + +#define FPGA_SW_SFM_MASTER_MODE_OFFSET 0x14 +#define FPGA_SW_SFM_MASTER_MODE_ENABLE_MASK 0x10 + + +static int +probe_metrocore_local_bus(void) { + bde_ctrl_t *ctrl; + uint32_t dev_rev_id; + VOL uint8_t *fpga; + + /* + * Write the FPGA on the fabric card, to let metrocore + * line cards out of reset. We actually don't bother to determine whether + * the card is a line card or a fabric card because when we do + * this on the line cards, it has no effect. + */ + fpga = (uint8_t *) IOREMAP(FPGA_PHYS, FPGA_SIZE); + fpga[FPGA_SW_SFM_MASTER_MODE_OFFSET] + |= FPGA_SW_SFM_MASTER_MODE_ENABLE_MASK; + fpga[FPGA_LC_POWER_DISABLE_OFFSET] + |= FPGA_LC_POWER_DISABLE_ENABLE_ALL_MASK; + fpga[FPGA_LC_POWER_RESET_OFFSET] + |= FPGA_LC_POWER_RESET_ENABLE_ALL_MASK; + + ctrl = map_local_bus(BME_PHYS, BME_SIZE); + + dev_rev_id = + *((uint32_t *) + (((uint8_t *) ctrl->bde_dev.base_address) + BME_REVISION_OFFSET)); + ctrl->bde_dev.device = dev_rev_id >> 16; + ctrl->bde_dev.rev = (dev_rev_id & 0xFF); + + if ((ctrl->bde_dev.device != BME3200_DEVICE_ID) && + (ctrl->bde_dev.device != BCM88130_DEVICE_ID)) { + gprintk("probe_metrocore_local_bus: wrong BME type: " + "0x%x (vs 0x%x or 0x%x)\n", + ctrl->bde_dev.device, BME3200_DEVICE_ID, BCM88130_DEVICE_ID); + return -1; + } + + ctrl->iLine = FPGA_IRQ; + ctrl->isr = NULL; + ctrl->isr_data = NULL; + + /* + * + * We start from SE & include the FPGA, which is 128k + */ + ctrl = map_local_bus(SE_PHYS, 128 * 1024); + + dev_rev_id = + *((uint32_t *) + (((uint8_t *) ctrl->bde_dev.base_address) + BME_REVISION_OFFSET)); + ctrl->bde_dev.device = dev_rev_id >> 16; + ctrl->bde_dev.rev = (dev_rev_id & 0xFF); + + if ((ctrl->bde_dev.device != BME3200_DEVICE_ID) && + (ctrl->bde_dev.device != BCM88130_DEVICE_ID)) { + gprintk("probe_metrocore_local_bus: wrong SE (BME) type: " + "0x%x (vs 0x%x)\n", + ctrl->bde_dev.device, BME3200_DEVICE_ID); + return -1; + } + + ctrl->iLine = FPGA_IRQ; + ctrl->isr = NULL; + ctrl->isr_data = NULL; + + return 0; +} +#endif + +#ifdef BCM_PLX9656_LOCAL_BUS + +#if 1 +#define DEV_REG_BASE_OFFSET PL0_OFFSET /* Polaris register base */ +#define DEV_REG_DEVID 0 /* Device ID is first register */ +#endif + +/* + * The difference at map_local_bus2: + * + * The PLX9656 PCI-to-LOCAL bridge chip already has been iomapped the + * whole address space. So the devices off local bus don't need to be + * mapped again. They only need to claim their own sub-space. + */ +static bde_ctrl_t * +map_local_bus2(bde_ctrl_t *plx_ctrl, uint32_t dev_base, uint32_t size) +{ + uint32_t dev_rev_id; + uint8_t *addr; + bde_ctrl_t *ctrl; + + ctrl = _devices + _ndevices++; + _switch_ndevices++; + + /* + * For now: use EB type as `local bus' + * (memory mapped, no DMA, no interrupts) + * metrocore local bus supports interrupts, but we don't use them. + */ + ctrl->dev_type |= BDE_EB_DEV_TYPE | BDE_SWITCH_DEV_TYPE; + ctrl->dev_type |= BDE_320K_REG_SPACE; /* Polaris 18 bits address + FPGA */ + ctrl->pci_device = NULL; /* No PCI bus */ + + /* Map in the device */ + ctrl->bde_dev.base_address = plx_ctrl->bde_dev.base_address + dev_base; + ctrl->phys_address = plx_ctrl->phys_address + (resource_size_t)dev_base; + +#if 1 + addr = (uint8_t *)ctrl->bde_dev.base_address + PL0_REVISION_REG; +#endif + dev_rev_id = readl(addr); + ctrl->bde_dev.device = dev_rev_id >> 16; + ctrl->bde_dev.rev = (dev_rev_id & 0xFF); + + _bde_add_device(); + + switch (ctrl->bde_dev.device) { + case BCM88130_DEVICE_ID: + case BME3200_DEVICE_ID: + break; + default: + gprintk("wrong BME type: 0x%x (vs 0x%x or 0x%x)\n", + ctrl->bde_dev.device, BME3200_DEVICE_ID, BCM88130_DEVICE_ID); + return 0; + } + return(ctrl); +} + +static int +probe_plx_local_bus(void) +{ + bde_ctrl_t *ctrl; + uint32_t val; + uint8_t *addr; + char addr_hi_str[16]; + + if (num_plx > 1) { + printk(KERN_ERR "There's more than one PLX 9656/9056 chip\n"); + return -1; + } + addr_hi_str[0] = 0; +#ifdef PHYS_ADDR_IS_64BIT + sprintf(addr_hi_str, "%08x", (uint32_t)(plx_ctrl.phys_address >> 32)); +#endif + printk(KERN_ERR "Found PLX %04x:%04x vir: 0x%08x phy: 0x%s%08x\n", + plx_ctrl.bde_dev.device, plx_ctrl.bde_dev.rev, + plx_ctrl.bde_dev.base_address, addr_hi_str, + (uint32_t)(plx_ctrl.phys_address)); + + addr = (uint8_t *)plx_ctrl.bde_dev.base_address + CPLD_OFFSET + CPLD_REVISION_REG; + val = readl(addr); + printk(KERN_ERR "plx: CPLD revision %d\n", val & CPLD_REVISION_MASK); +#if 000 + addr = (uint8_t *)plx_ctrl.bde_dev.base_address + CPLD_OFFSET + CPLD_RESET_REG; + writel(CPLD_RESET_NONE, addr); +#endif +#if 1 + ctrl = map_local_bus2(&plx_ctrl, PL0_OFFSET, PL0_SIZE); +#endif + if (ctrl == 0) + return -1; + + /* Uses PLX IRQ for Polaris LC */ + ctrl->iLine = 48; + ctrl->isr = NULL; + ctrl->isr_data = NULL; + + return 0; +} + +#endif /* BCM_PLX9656_LOCAL_BUS */ + +#if defined(BCM_EA_SUPPORT) +#if defined(BCM_TK371X_SUPPORT) +static void +probe_tk371x_dev(void) +{ + bde_ctrl_t *ctrl; + int ea_uid=0; + + /* eadevices is from the argument of insmod */ + for (ea_uid = 0; ea_uid < eadevices; ea_uid++) { + ctrl = _devices + _ndevices++; + _switch_ndevices++; + ctrl->dev_type = (BDE_MII_DEV_TYPE | BDE_SWITCH_DEV_TYPE); + ctrl->bde_dev.device = TK371X_DEVICE_ID; + ctrl->bde_dev.rev = 0x0; + ctrl->bde_dev.base_address = (sal_vaddr_t)NULL; + ctrl->iLine = 0; + } +} +#endif /* BCM_TK371X_SUPPORT*/ +#endif /* BCM_EA_SUPPORT */ + + +#if defined(BCM_ROBO_SUPPORT) +#if defined(IPROC_CMICD) +struct chip_device_info { + uint32 cc_base; /* Chip-common register base */ + uint32 cc_size; /* Chip-common register limit */ + uint32 cid_reg_off; /* Chip id register offset */ +}; + +static struct chip_device_info _chip_table = { +#if defined(IPROC_CMICD) + 0x18000000, 0x00000300, 0x00000000 +#else + 0,0,0 +#endif +}; + +struct gmac_device_info { + uint32 cid; /* chip id */ + uint32 rid; /* revision id */ + uint32 pid; /* package id */ + + uint32 gmac_dev_id; /* gmac core device id */ + uint32 gmac_base_addr; /* gmac core base address */ + int gmac_irq; /* gmac irq number */ +}; + +static struct gmac_device_info _gmac_table[] = { +#if defined(IPROC_CMICD) + {BCM53010_CHIP_ID, 0, 0, BCM53010_GMAC_ID, 0x18026000, 181}, /* BCM53012 */ + {BCM53010_CHIP_ID, 0, 2, BCM53010_GMAC_ID, 0x18026000, 181}, /* BCM53011 */ + {BCM53010_CHIP_ID, 0, 1, BCM53010_GMAC_ID, 0x18026000, 181}, /* BCM53010 */ + {BCM53018_CHIP_ID, 0, 0, BCM53010_GMAC_ID, 0x18026000, 181}, /* BCM53018 */ + {BCM53018_CHIP_ID, 0, 2, BCM53010_GMAC_ID, 0x18026000, 181}, /* BCM53017 */ + {BCM53018_CHIP_ID, 0, 1, BCM53010_GMAC_ID, 0x18026000, 181}, /* BCM53019 */ + {BCM53020_CHIP_ID, 0, 0, BCM53010_GMAC_ID, 0x18024000, 181}, /* BCM53022 */ + {BCM53020_CHIP_ID, 4, 0, BCM53010_GMAC_ID, 0x18023000, 180}, /* BCM53022 */ +#endif + {0,0,0,0,0,0} +}; + +static sal_vaddr_t _cca_base = 0; + +static int +_gmac_dev_create(void) +{ + bde_ctrl_t *ctrl; + uint32 gmac_base = 0; + uint32 offset = 0; + uint32 cca_cid; + uint32 cid, rid, pid; + int i = 0, found; + + if (_chip_table.cc_base == 0) { + gprintk("Create GMAC device failed. Unable to identify CPU.\n"); + return -1; + } + + /* 1. Determine which CPU/GMAC configuration is now */ + _cca_base = (sal_vaddr_t)IOREMAP(_chip_table.cc_base, _chip_table.cc_size); + cca_cid = readl((uint32 *)(_cca_base + _chip_table.cid_reg_off)); + + cid = cca_cid & CID_ID_MASK; + rid = (cca_cid & CID_REV_MASK) >> CID_REV_SHIFT; + pid = (cca_cid & CID_PKG_MASK) >> CID_PKG_SHIFT; + + found = 0; + for (i = 0; ; i++) { + if (_gmac_table[i].cid == 0) { + /* End of table */ + break; + } + if ((_gmac_table[i].cid == cid) && + (_gmac_table[i].rid == rid) && + (_gmac_table[i].pid == pid)) { + /* found */ + found = 1; + break; + } + } + if (!found) { + gprintk("Create GMAC device failed. Unable to identify GMAC device.\n"); + } + + /* 2. Create GMAC device */ + /* fill-in necessary information depends on the CPU/GMAC configuration */ + if ((cid == BCM53010_CHIP_ID) || (cid == BCM53018_CHIP_ID) || + (cid == BCM53020_CHIP_ID)) { + ctrl = _devices + _ndevices++; + _ether_ndevices++; + + ctrl->dev_type |= BDE_ETHER_DEV_TYPE; + ctrl->dev_type |= BDE_PCI_DEV_TYPE; + + ctrl->iLine = _gmac_table[i].gmac_irq; + + ctrl->be_pio = 0; + + ctrl->bde_dev.rev = _gmac_table[i].rid; + ctrl->bde_dev.device = _gmac_table[i].gmac_dev_id; + + gmac_base = 0x18000000; + offset = _gmac_table[i].gmac_base_addr - gmac_base; + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(gmac_base, 0x300000); + ctrl->alt_base_addr = ctrl->bde_dev.base_address + offset; + ctrl->phys_address = gmac_base; + + ctrl->isr = NULL; + ctrl->isr_data = NULL; + } + + return 0; +} +#endif +#endif + +/* + * Generic module functions + */ + +/* + * Function: _init + * + * Purpose: + * Module initialization. + * Attaches to kernel BDE. + * Parameters: + * None + * Returns: + * 0 on success, < 0 on error. + */ +static int +_init(void) +{ +#ifdef IPROC_CMICD +#ifdef CONFIG_OF + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + iproc_platform_driver_register(&iproc_cmicd_driver); + } else +#endif + if (iproc_has_cmicd()) { + iproc_cmicd_get_memregion(&iproc_cmicd_resources[IPROC_CMICD_RES_MEM]); + iproc_platform_driver_register(&iproc_cmicd_driver); +#ifdef CONFIG_OF + if (!of_find_compatible_node(NULL, NULL, IPROC_CMICD_COMPATIBLE)) +#endif + { + /* Register platform device if no device node in dtb */ + iproc_platform_device_register(&iproc_cmicd_pdev); + } + } +#endif /* IPROC_CMICD */ + +#ifdef BCM_ICS + _ics_bde_create(); +#else /* PCI */ + /* Register our goodies */ + _device_driver.name = LINUX_KERNEL_BDE_NAME; + +#if defined(BCM_ROBO_SUPPORT) +#if defined(IPROC_CMICD) + if (_gmac_dev_create()) { + return -ENODEV; + } +#endif +#endif /* defined (BCM_ROBO_SUPPORT) */ + + /* Configure MSI interrupt support */ + use_msi = usemsi; + +#ifdef CONFIG_PCI_MSI + if (use_msi == PCI_USE_INT_NONE) { + /* Compilation flag determines default value */ +#ifdef BDE_LINUX_USE_MSIX_INTERRUPT +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + use_msi = PCI_USE_INT_MSIX; +#else + use_msi = PCI_USE_INT_MSI; +#endif +#elif defined(BDE_LINUX_USE_MSI_INTERRUPT) + use_msi = PCI_USE_INT_MSI; +#else + use_msi = PCI_USE_INT_INTX; +#endif + } +#else + if (use_msi > PCI_USE_INT_INTX) { + /* Warn if invalid configuration */ + gprintk("MSI interrupts not supported by kernel\n"); + } + use_msi = PCI_USE_INT_INTX; +#endif /* CONFIG_PCI_MSI */ + + if (unlikely(debug >= 1)) + gprintk("%s(%d):use_msi = %d\n", __func__, __LINE__, use_msi); + if (spi_devid) { + _spi_device_setup(); + } else { + if (pci_register_driver(&_device_driver) < 0) { + return -ENODEV; + } + } + + /* Note: PCI-PCI bridge uses results from pci_register_driver */ + p2p_bridge(); + +#ifdef BCM_METROCORE_LOCAL_BUS + if (probe_metrocore_local_bus()) { + return -1; + } +#endif +#ifdef BCM_PLX9656_LOCAL_BUS + if (num_plx > 0) { + probe_plx_local_bus(); + } +#endif +#endif /* BCM_ICS */ + +#ifdef BCM_ROBO_SUPPORT + probe_robo_switch(); +#endif + +#if defined(BCM_PETRA_SUPPORT) || defined(BCM_DFE_SUPPORT) || defined(BCM_DNX_SUPPORT) || defined(BCM_DNXF_SUPPORT) + sand_device_create(); +#endif + +#if defined(BCM_TK371X_SUPPORT) + probe_tk371x_dev(); +#endif + /* + * Probe for EB Bus devices. + */ + if (eb_bus) { + char *tok; + uint irq = -1, eb_rd16bit=0, eb_wr16bit =0; + unsigned int eb_ba = 0x0; + + gprintk("EB bus info: %s\n", eb_bus); + tok = strtok(eb_bus,","); + while (tok) { + _parse_eb_args(tok, "BA=%x IRQ=%d RD16=%d WR16=%d", + &eb_ba, &irq, &eb_rd16bit, &eb_wr16bit); + _eb_device_create(eb_ba, irq, eb_rd16bit, eb_wr16bit); + tok = strtok(NULL,","); + } + } + + return 0; +} + +/* + * Function: _cleanup + * + * Purpose: + * Module cleanup function. + * Parameters: + * None + * Returns: + * Always 0 + */ +static int +_cleanup(void) +{ + int i; + + _dma_cleanup(); + +#ifdef IPROC_CMICD +#ifdef CONFIG_OF + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + iproc_platform_driver_unregister(&iproc_cmicd_driver); + } else +#endif + if (iproc_has_cmicd()) { +#ifdef CONFIG_OF + if (!of_find_compatible_node(NULL, NULL, IPROC_CMICD_COMPATIBLE)) +#endif + { + iproc_platform_device_unregister(&iproc_cmicd_pdev); + } + iproc_platform_driver_unregister(&iproc_cmicd_driver); + } +#endif + +#if defined(BCM_ROBO_SUPPORT) +#if defined(IPROC_CMICD) + if (_cca_base) { + iounmap((void *)_cca_base); + } +#endif + + if (robo) { +#if defined(KEYSTONE) || defined(IPROC_CMICD) + robo_detach(robo); +#endif /* KEYSTONE || IPROC_CMICD */ + } + if (sbh) { +#if defined(KEYSTONE) || defined(IPROC_CMICD) + ai_soc_detach(sbh); +#endif /* KEYSTONE || IPROC_CMICD */ + } +#endif + for (i = 0; i < _ndevices; i++) { + bde_ctrl_t *ctrl = _devices + i; + + /* free allocated kernel space memory */ + if (ctrl->dev_type & BDE_SPI_DEV_TYPE) { + if (ctrl->spi_device) { + kfree(ctrl->spi_device); + } + } + } +#if (defined(BCM_PETRA_SUPPORT) || defined(BCM_DFE_SUPPORT) || defined(BCM_DNX_SUPPORT) || defined(BCM_DNXF_SUPPORT)) && (defined(__DUNE_WRX_BCM_CPU__) || defined(__DUNE_GTO_BCM_CPU__)) + if (cpu_address) { /* unmap CPU card MMIO */ + iounmap(cpu_address); + cpu_address = NULL; + } +#endif + +#ifdef BCM_ICS +#else + pci_unregister_driver(&_device_driver); +#endif /* BCM_ICS */ + return 0; +} + +/* + * Function: _pprint + * + * Purpose: + * Print proc filesystem information. + * Parameters: + * None + * Returns: + * Always 0 + */ +static int +_pprint(void) +{ + int i = 0; + + pprintf("Broadcom Device Enumerator (%s)\n", LINUX_KERNEL_BDE_NAME); + + _dma_pprint(); + + if (_ndevices == 0) { + pprintf("No devices found\n"); + } else { + pprintf("Devices:\n"); + } + for (i = 0; i < _ndevices; i++) { + bde_ctrl_t *ctrl = _devices + i; + + if (ctrl->dev_type & BDE_SWITCH_DEV_TYPE) { + pprintf("\t%d (swi) : ", i); + } else if (ctrl->dev_type & BDE_ETHER_DEV_TYPE) { + pprintf("\t%d (eth) : ", i); + } else if (ctrl->dev_type & BDE_CPU_DEV_TYPE) { + pprintf("\t%d (cpu) : ", i); + } else { + pprintf("\t%d (?) : ", i); + } + + if (ctrl->dev_state == BDE_DEV_STATE_REMOVED) { + pprintf("PCI device 0x%x:0x%x:%d REMOVED\n", + ctrl->pci_device->vendor, + ctrl->pci_device->device, + ctrl->bde_dev.rev); + continue; + } + if (ctrl->dev_type & BDE_PCI_DEV_TYPE) { + pprintf("PCI device 0x%x:0x%x:%d:0x%.8lx:0x%.8lx:%d%s\n", + ctrl->pci_device->vendor, + ctrl->pci_device->device, + ctrl->bde_dev.rev, + (unsigned long)pci_resource_start(ctrl->pci_device, 0), + (unsigned long)pci_resource_start(ctrl->pci_device, 2), + ctrl->pci_device->irq, + ctrl->use_msi ? " (MSI)" : ""); + } else if (ctrl->dev_type & BDE_SPI_DEV_TYPE) { + pprintf("SPI Device %d:%x:%x:0x%x:0x%x:%d\n", + ctrl->spi_device->cid, + ctrl->spi_device->part, + ctrl->spi_device->rev, + ctrl->spi_device->phyid_high, + ctrl->spi_device->phyid_low, + ctrl->bde_dev.rev); + } else if (ctrl->dev_type & BDE_ICS_DEV_TYPE) { + pprintf("ICS Device 0x%x:0x%x\n", + ctrl->bde_dev.device, + ctrl->bde_dev.rev); + } else if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + pprintf("AXI Device 0x%x:0x%x:0x%.8lx:%d\n", + ctrl->bde_dev.device, + ctrl->bde_dev.rev, + (unsigned long)ctrl->phys_address, + ctrl->iLine); + } else if (ctrl->dev_type & BDE_EB_DEV_TYPE) { + pprintf("EB Bus Device 0x%x:0x%x\n", + ctrl->bde_dev.device, + ctrl->bde_dev.rev); + } + if (debug >= 1) { + pprintf("\t\timask:imask2:fmask 0x%x:0x%x:0x%x\n", + ctrl->imask, + ctrl->imask2, + ctrl->fmask); + } + } + return 0; +} + +#if USE_LINUX_BDE_MMAP +/* + * Some kernels (mainly x86) prevent mapping of kernel RAM memory to + * user space via the /dev/mem device. The function below provides a + * backdoor to mapping the DMA pool to user space via the + * /dev/linux-kernel-bde device. + */ +static int _mmap(struct file *filp, struct vm_area_struct *vma) +{ + unsigned long phys_addr = vma->vm_pgoff << PAGE_SHIFT; + unsigned long size = vma->vm_end - vma->vm_start; + + if(!_dma_range_valid(phys_addr, size)) { + return -EINVAL; + } + +#ifdef REMAP_DMA_NONCACHED + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); +#endif + + if (remap_pfn_range(vma, + vma->vm_start, + vma->vm_pgoff, + size, + vma->vm_page_prot)) { + gprintk("Failed to mmap phys range 0x%lx-0x%lx to 0x%lx-0x%lx\n", + phys_addr, phys_addr + size, vma->vm_start,vma->vm_end); + return -EAGAIN; + } + + return 0; +} +#endif /* USE_LINUX_BDE_MMAP */ + +/* Workaround for broken Busybox/PPC insmod */ +static char _modname[] = LINUX_KERNEL_BDE_NAME; + +static gmodule_t _gmodule = { + name: LINUX_KERNEL_BDE_NAME, + major: LINUX_KERNEL_BDE_MAJOR, + init: _init, + cleanup: _cleanup, + pprint: _pprint, +#if USE_LINUX_BDE_MMAP + mmap: _mmap, +#endif +}; + +gmodule_t * +gmodule_get(void) +{ + _gmodule.name = _modname; + return &_gmodule; +} + + +/* + * BDE Interface + */ + +static const char * +_name(void) +{ + return LINUX_KERNEL_BDE_NAME; +} + +static int +_num_devices(int type) +{ + switch (type) { + case BDE_ALL_DEVICES: + return _ndevices; + case BDE_SWITCH_DEVICES: + return _switch_ndevices; + case BDE_ETHER_DEVICES: + return _ether_ndevices; + case BDE_CPU_DEVICES: + return _cpu_ndevices; + } + + return 0; +} + +static const ibde_dev_t * +_get_dev(int d) +{ + if (!VALID_DEVICE(d)) { + gprintk("_get_dev: Invalid device index %d\n", d); + return NULL; + } + + return &_devices[d].bde_dev; +} + +static uint32 +_get_dev_type(int d) +{ + if (!VALID_DEVICE(d)) { + gprintk("_get_dev: Invalid device index %d\n", d); + return 0; + } + + return _devices[d].dev_type; +} + +static uint32 +_pci_conf_read(int d, uint32 addr) +{ +#ifdef BCM_ICS + return 0xFFFFFFFF; +#else + uint32 rc = 0; + + if (!VALID_DEVICE(d)) { + gprintk("_pci_conf_read: Invalid device index %d\n", d); + return 0xFFFFFFFF; + } + + if (!(_devices[d].dev_type & BDE_PCI_DEV_TYPE)) { + gprintk("_pci_conf_read: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return 0xFFFFFFFF; + } + + pci_read_config_dword(_devices[d].pci_device, addr, &rc); + return rc; +#endif /* BCM_ICS */ +} + +static int +_pci_conf_write(int d, uint32 addr, uint32 data) +{ +#ifdef BCM_ICS + return -1; +#else + if (!VALID_DEVICE(d)) { + gprintk("_pci_conf_write: Invalid device index %d\n", d); + return -1; + } + + if (!(_devices[d].dev_type & BDE_PCI_DEV_TYPE)) { + gprintk("_pci_conf_write: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return -1; + } + + pci_write_config_dword(_devices[d].pci_device, addr, data); + return 0; +#endif /* BCM_ICS */ +} + +/* Initialized when the bde is created */ +static linux_bde_bus_t _bus; + +static void +_pci_bus_features(int unit, int *be_pio, int *be_packet, int *be_other) +{ + if ((_devices[unit].bde_dev.device & 0xFF00) != 0x5600 && + (_devices[unit].bde_dev.device & 0xF000) != 0xc000 && + (_devices[unit].bde_dev.device & 0xF000) != 0xb000 && + (_devices[unit].bde_dev.device & 0xF000) != 0x8000 && + (_devices[unit].bde_dev.device & 0xFFF0) != 0x0230 && + (_devices[unit].bde_dev.device & 0xFFF0) != 0xa440) { + if (be_pio) *be_pio = 0; + if (be_packet) *be_packet = 0; + if (be_other) *be_other = 0; + } else { + if (be_pio) *be_pio = _bus.be_pio; + if (be_packet) *be_packet = _bus.be_packet; + if (be_other) *be_other = _bus.be_other; + } +#if defined(BCM_METROCORE_LOCAL_BUS) + if (_devices[unit].dev_type & BDE_EB_DEV_TYPE && be_pio) { + *be_pio = 1; + } +#endif + +} + +static uint32_t +_read(int d, uint32_t addr) +{ + unsigned long flags; + volatile uint16 msb, lsb; + uint32 sl_addr, data; + + if (!VALID_DEVICE(d)) { + return -1; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + return -1; + } + + if (_devices[d].dev_type & BDE_DEV_BUS_RD_16BIT) { + /* + * Adjust the address presented to Eb slave. Move A15:A0 to A16:A1. + */ + sl_addr = (addr & 0xffff0000) | ((addr & 0xffff) << 1); + /* Disable interrupts */ + spin_lock_irqsave(&bus_lock, flags); + + lsb = *((uint16 *)(_devices[d].bde_dev.base_address + sl_addr)); + msb = *((uint16 *)(_devices[d].bde_dev.base_address + sl_addr)); + spin_unlock_irqrestore(&bus_lock, flags); + + return (msb << 16) | lsb; + } else { + data = ((VOL uint32_t *)_devices[d].bde_dev.base_address)[addr / 4]; +#if defined(CMIC_SOFT_BYTE_SWAP) + data = CMIC_SWAP32(data); +#endif + return data; + } +} + +static int +_write(int d, uint32_t addr, uint32_t data) +{ + unsigned long flags; + uint32 sl_addr; + + if (!VALID_DEVICE(d)) { + return -1; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + return -1; + } + + if (_devices[d].dev_type & BDE_DEV_BUS_WR_16BIT) { + /* + * Adjust the address presented to Eb slave. Move A15:A0 to A16:A1. + */ + sl_addr = (addr & 0xffff0000) | ((addr & 0xffff) << 1); + + /* Disable interrupts */ + spin_lock_irqsave(&bus_lock, flags); + + *((VOL uint16 *)(_devices[d].bde_dev.base_address + sl_addr)) = + data & 0xffff; + *((VOL uint16 *)(_devices[d].bde_dev.base_address + sl_addr)) = + (data >> 16) & 0xffff; + spin_unlock_irqrestore(&bus_lock, flags); + } else { +#if defined(CMIC_SOFT_BYTE_SWAP) + data = CMIC_SWAP32(data); +#endif + ((VOL uint32_t *)_devices[d].bde_dev.base_address)[addr / 4] = data; +#ifdef KEYSTONE + /* Enforce PCIe transaction ordering. Commit the write transaction */ + __asm__ __volatile__("sync"); +#endif + } + return 0; + +} + +static _ISR_RET +_isr(_ISR_PARAMS(irq, dev_id, iregs)) +{ + bde_ctrl_t *ctrl = (bde_ctrl_t *) dev_id; + + if (ctrl && ctrl->isr) { + ctrl->isr(ctrl->isr_data); + } + if (ctrl && ctrl->isr2) { + ctrl->isr2(ctrl->isr2_data); + } + return IRQ_HANDLED; +} + +static int +_interrupt_connect(int d, + void (*isr)(void *), + void *isr_data) +{ + bde_ctrl_t *ctrl; + unsigned long irq_flags; + int isr2_dev; + int isr_active; + int ret = 0; + + isr2_dev = d & LKBDE_ISR2_DEV; + d &= ~LKBDE_ISR2_DEV; + + if (!VALID_DEVICE(d)) { + gprintk("_interrupt_connect: Invalid device index %d\n", d); + return -1; + } + if (debug >= 1) { + gprintk("_interrupt_connect d %d\n", d); + } + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + gprintk("_interrupt_connect: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return -1; + } + + ctrl = _devices + d; + + isr_active = (ctrl->isr || ctrl->isr2) ? 1 : 0; + + if (unlikely(debug > 1)) + gprintk("%s:isr_active = %d\n", __func__, isr_active); + + if (isr2_dev) { + if (debug >= 1) { + gprintk("connect secondary isr\n"); + } + ctrl->isr2_data = isr_data; + ctrl->isr2 = isr; + if (isr_active) { + /* Main handler (_isr) already installed */ + return 0; + } + } else { + if (debug >= 1) { + gprintk("connect primary isr\n"); + } + ctrl->isr = isr; + ctrl->isr_data = isr_data; + if (isr_active) { + /* Main handler (_isr) already installed */ + return 0; + } + } + + if (ctrl->iLine != -1) { + irq_flags = IRQF_SHARED; +#ifdef CONFIG_PCI_MSI + if (ctrl->use_msi >= PCI_USE_INT_MSI) { + ret = _msi_connect(ctrl); + if(ret != 0) + goto msi_exit; + } +#endif +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + if (ctrl->use_msi == PCI_USE_INT_MSIX) { + int i; + for (i = 0; i < ctrl->msix_cnt; i++) { + if (unlikely(debug >= 1)) { + gprintk("%s(%d):device# = %d, irq = %d\n", + __func__, __LINE__, d, ctrl->entries[i].vector); + } + ret = request_irq(ctrl->entries[i].vector, _isr, 0, + LINUX_KERNEL_BDE_NAME, ctrl); + if (ret < 0) + break; + } + if (ret < 0) { + while (i >= 0) + free_irq(ctrl->entries[i--].vector, ctrl); + + goto err_disable_msi; + } + } + else +#endif + { +#if defined(IPROC_CMICD) && defined(CONFIG_OF) + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + int i, j; + for (i = 0; i < IHOST_CMICX_MAX_INTRS; i++) { + if (unlikely(debug >= 1)) + gprintk("%s(%d):device# = %d, request_irq(%d)\n", + __func__, __LINE__, d, iproc_cmicx_irqs[i]); + ret = request_irq(iproc_cmicx_irqs[i], _isr, + irq_flags, LINUX_KERNEL_BDE_NAME, ctrl); + if (ret < 0) { + gprintk("request_irq(%d) failed(%d)\n", iproc_cmicx_irqs[i], ret); + break; + } + } + if (ret < 0) { + for (j = 0; j < i; j++) { + free_irq(iproc_cmicx_irqs[j], ctrl); + } + goto err_disable_msi; + } + } else +#endif + { + ret = request_irq(ctrl->iLine, _isr, irq_flags, + LINUX_KERNEL_BDE_NAME, ctrl); + if (ret < 0) + goto err_disable_msi; + + if (unlikely(debug >= 1)) + gprintk("%s(%d):device# = %d, irq_flags = %lu, irq = %d\n", + __func__, __LINE__, d, + irq_flags, ctrl->pci_device ? ctrl->pci_device->irq : ctrl->iLine); + } + } + } + return 0; + +err_disable_msi: +#ifdef CONFIG_PCI_MSI + _msi_disconnect(ctrl); + +msi_exit: +#endif + gprintk("could not request IRQ\n"); + ctrl->isr = NULL; + ctrl->isr_data = NULL; + ctrl->isr2 = NULL; + ctrl->isr2_data = NULL; + + return -1; +} + +static int +_interrupt_disconnect(int d) +{ + bde_ctrl_t *ctrl; + int isr2_dev; + int isr_active; + + isr2_dev = d & LKBDE_ISR2_DEV; + d &= ~LKBDE_ISR2_DEV; + + if (!VALID_DEVICE(d)) { + return -1; + } + + if (debug >= 1) { + gprintk("_interrupt_disconnect d %d\n", d); + } + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + gprintk("_interrupt_disconnect: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return -1; + } + + ctrl = _devices + d; + + isr_active = (ctrl->isr || ctrl->isr2) ? 1 : 0; + + if (unlikely(debug > 1)) + gprintk("%s: isr_active = %d\n", __func__, isr_active); + + if (isr2_dev) { + if (debug >= 1) { + gprintk("disconnect secondary isr\n"); + } + ctrl->isr2 = NULL; + ctrl->isr2_data = NULL; + ctrl->fmask = 0; + if (ctrl->isr) { + /* Primary handler still active */ + SYNC_IRQ(ctrl->iLine); + return 0; + } + } else { + if (debug >= 1) { + gprintk("disconnect primary isr\n"); + } + ctrl->isr = NULL; + ctrl->isr_data = NULL; + if (ctrl->isr2) { + /* Secondary handler still active */ + SYNC_IRQ(ctrl->iLine); + return 0; + } + } + + if (isr_active) { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,84)) + if (ctrl->use_msi >= PCI_USE_INT_MSIX) { + int i; + for (i = 0; i < ctrl->msix_cnt; i++) { + if (unlikely(debug > 1)) { + gprintk("%s(%d):device# = %d, irq = %d\n", + __func__, __LINE__, d, ctrl->entries[i].vector); + } + free_irq(ctrl->entries[i].vector, ctrl); + } + } + else +#endif +#if defined(IPROC_CMICD) && defined(CONFIG_OF) + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + int i; + for (i = 0; i < IHOST_CMICX_MAX_INTRS; i++) { + if (unlikely(debug > 1)) { + gprintk("%s(%d):device# = %d, free_irq(%d)\n", + __func__, __LINE__, d, iproc_cmicx_irqs[i]); + } + free_irq(iproc_cmicx_irqs[i], ctrl); + } + } else +#endif + { + free_irq(ctrl->iLine, ctrl); + } +#ifdef CONFIG_PCI_MSI + if (ctrl->use_msi >= PCI_USE_INT_MSI) { + _msi_disconnect(ctrl); + } +#endif + } + + return 0; +} + +static uint32_t +_iproc_ihost_read(int d, uint32_t addr) +{ + uint32_t *mapaddr; + uint32_t reg_val; + mapaddr = IOREMAP(addr, sizeof(uint32_t)); + if (mapaddr == NULL) { + return -1; + } + reg_val = readl(mapaddr); + iounmap(mapaddr); + return reg_val; +} + +static int +_iproc_ihost_write(int d, uint32_t addr, uint32_t data) +{ + uint32_t *mapaddr; + mapaddr = IOREMAP(addr, sizeof(uint32_t)); + if (mapaddr == NULL) { + return -1; + } + writel(data, mapaddr); + iounmap(mapaddr); + return 0; +} + +static uint32_t +_iproc_read(int d, uint32_t addr) +{ + if (!VALID_DEVICE(d)) { + return -1; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + return -1; + } + + if (_devices[d].dev_type & BDE_AXI_DEV_TYPE) { + return _iproc_ihost_read(d, addr); + } + + return shbde_iproc_pci_read(&_devices[d].shbde, + (void *)_devices[d].bde_dev.base_address1, + addr); +} + +static int +_iproc_write(int d, uint32_t addr, uint32_t data) +{ + if (!VALID_DEVICE(d)) { + return -1; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + return -1; + } + + if (_devices[d].dev_type & BDE_AXI_DEV_TYPE) { + return _iproc_ihost_write(d, addr, data); + } + + shbde_iproc_pci_write(&_devices[d].shbde, + (void *)_devices[d].bde_dev.base_address1, + addr, data); + + return 0; +} + +static int +_get_cmic_ver(int d , uint32_t *ver) +{ + + unsigned int cap_base; + uint32_t rval = 0; + + if (!VALID_DEVICE(d)) { + gprintk("%s: Invalid device index %d\n", __func__, d); + return -1; + } + + if (!(_devices[d].dev_type & BDE_PCI_DEV_TYPE)) { + gprintk("%s: Not PCI device %d, type %x\n", __func__, + d, _devices[d].dev_type); + return -1; + } + + /* Look for PCIe vendor-specific extended capability (VSEC) */ + cap_base = PCI_EXT_CAP_START; + while (cap_base) { + pci_read_config_dword(_devices[d].pci_device, cap_base, &rval); + if (rval == 0xffffffff) { + /* Assume PCI HW read error */ + gprintk("%s: PCI HW read error\n", __func__); + return -1; + } + + if (PCI_EXT_CAP_ID(rval) == PCI_EXT_CAP_ID_VNDR) { + break; + } + cap_base = PCI_EXT_CAP_NEXT(rval); + } + if (cap_base) { + /* + * VSEC layout: + * + * 0x00: PCI Express Extended Capability Header + * 0x04: Vendor-Specific Header + * 0x08: Vendor-Specific Register 1 + * 0x0c: Vendor-Specific Register 2 + * ... + * 0x24: Vendor-Specific Register 8 + */ + pci_read_config_dword(_devices[d].pci_device, cap_base + 8, &rval); + if (unlikely(debug > 1)) + gprintk("%s:Found VSEC = %u\n", __func__, rval); + + /* Determine if CMICX */ + rval = ((rval >> 12) & 0xf); + *ver = rval; + + return 0; + } else { + gprintk("%s:VSEC not found\n", __func__); + } + + return -1; +} + +#ifdef BCM_ROBO_SUPPORT +#define SOC_ROBO_PAGE_BP 8 /* for Robo Chip only */ + +#if defined(IPROC_CMICD) +extern int ccb_mii_read(int dev_type, int phy_addr, int reg_off, uint16 *data); +extern int ccb_mii_write(int dev_type, int phy_addr, int reg_off, uint16 data); + +/* device type */ +#define MII_DEV_LOCAL 0 +#define MII_DEV_EXT 1 +#endif + +static int +_spi_read(int d, uint32 addr, uint8 *buf, int len) +{ +#if defined(KEYSTONE) || defined(IPROC_CMICD) + bde_ctrl_t *ctrl; + uint8 page, offset; +#endif +#if defined(IPROC_CMICD) + int rv = 0; + uint16 value = 0; +#endif + + if (!VALID_DEVICE(d)) { + return -1; + } + + if (!(_devices[d].dev_type & BDE_SPI_DEV_TYPE)) { + gprintk("_spi_read: Not SPI device %d, type %x\n", + d, _devices[d].dev_type); + return -1; + } + +#if defined(KEYSTONE) || defined(IPROC_CMICD) + ctrl = _devices + d; +#endif + +#if defined(IPROC_CMICD) + if (addr & SOC_EXTERNAL_PHY_BUS_CPUMDIO) { + rv = ccb_mii_read(MII_DEV_EXT, (addr >> 8) & 0xff, addr & 0xff, &value); + memcpy(buf, &value, 2); + return rv; + } +#endif + +#if defined(KEYSTONE) || defined(IPROC_CMICD) + page = (addr >> SOC_ROBO_PAGE_BP) & 0xFF; + offset = addr & 0xFF; +#endif + +#if defined(IPROC_CMICD) && defined(BCM_STARFIGHTER3_SUPPORT) + if (spi_device_found) { + ROBO_SPI_RREG(ctrl->spi_device->robo, ctrl->spi_device->cid, + page, offset, buf, (uint)len); + } else +#endif + { + ROBO_RREG(ctrl->spi_device->robo, ctrl->spi_device->cid, + page, offset, buf, (uint)len); + } + + return 0; +} + +static int +_spi_write(int d, uint32 addr, uint8 *buf, int len) +{ +#if defined(KEYSTONE) || defined(IPROC_CMICD) + bde_ctrl_t *ctrl; + uint8 page, offset; +#endif +#if defined(IPROC_CMICD) + int rv = 0; + uint16 value = 0; +#endif + if (!VALID_DEVICE(d)) { + return -1; + } + + if (!(_devices[d].dev_type & BDE_SPI_DEV_TYPE)) { + gprintk("_spi_write: Not SPI device %d, type %x\n", + d, _devices[d].dev_type); + return -1; + } + +#if defined(KEYSTONE) || defined(IPROC_CMICD) + ctrl = _devices + d; +#endif + +#if defined(IPROC_CMICD) + if (addr & SOC_EXTERNAL_PHY_BUS_CPUMDIO) { + memcpy(&value, buf, 2); + rv = ccb_mii_write(MII_DEV_EXT, (addr >> 8) & 0xff, addr & 0xff, value); + return rv; + } +#endif + +#if defined(KEYSTONE) || defined(IPROC_CMICD) + page = (addr >> SOC_ROBO_PAGE_BP) & 0xFF; + offset = addr & 0xFF; +#endif + +#if defined(IPROC_CMICD) && defined(BCM_STARFIGHTER3_SUPPORT) + if (spi_device_found) { + ROBO_SPI_WREG(ctrl->spi_device->robo, ctrl->spi_device->cid, + page, offset, buf, (uint)len); + } else +#endif + { + ROBO_WREG(ctrl->spi_device->robo, ctrl->spi_device->cid, + page, offset, buf, (uint)len); + } + + return 0; +} + +#endif + +#if defined(BCM_PETRA_SUPPORT) || defined(BCM_DFE_SUPPORT) || defined(BCM_DNX_SUPPORT) || defined(BCM_DNXF_SUPPORT) +int +lkbde_cpu_write(int d, uint32 addr, uint32 *buf) +{ +#if defined(__DUNE_WRX_BCM_CPU__) || defined(__DUNE_GTO_BCM_CPU__) + *((uint32_t*)((uint8_t*)cpu_address + addr)) = *buf; +#endif + + return 0; +} + +int +lkbde_cpu_read(int d, uint32 addr, uint32 *buf) +{ +#if defined(__DUNE_WRX_BCM_CPU__) || defined(__DUNE_GTO_BCM_CPU__) + *buf = *((uint32_t*)((uint8_t*)cpu_address + addr)); +#else + *buf = (uint32_t)(-1); +#endif + + return 0; +} + +int +lkbde_cpu_pci_register(int d) +{ + bde_ctrl_t* ctrl; + uint16 cmd = 0; + + if (!VALID_DEVICE(d)) { + return -1; + } + + ctrl = &_devices[d]; + + /* enable device */ + if (pci_enable_device(ctrl->pci_device)) { + gprintk("Cannot enable pci device : vendor_id = %x, device_id = %x\n", + ctrl->pci_device->vendor, ctrl->pci_device->device); + } + + /* Add PCI_COMMAND_MEMORY and PCI_COMMAND_MASTER */ + pci_read_config_word(ctrl->pci_device, PCI_COMMAND, &cmd); + if (!(cmd & PCI_COMMAND_MEMORY) || !(cmd & PCI_COMMAND_MASTER)) { + cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; + pci_write_config_word(ctrl->pci_device, PCI_COMMAND, cmd); + } + + switch (ctrl->bde_dev.device) { + case GEDI_DEVICE_ID: + /* Fix bar 0 address */ /* FIXME: write full phy address */ + pci_write_config_byte(ctrl->pci_device, 0x13, 0x60); + + /* Fix Max payload size */ + pci_write_config_byte(ctrl->pci_device, 0x88, 0x2f); + pci_write_config_byte(ctrl->pci_device, 0x89, 0x10); + break; + case BCM88750_DEVICE_ID: + case BCM88753_DEVICE_ID: + case BCM88755_DEVICE_ID: + case BCM88770_DEVICE_ID: + case BCM88773_DEVICE_ID: + case BCM88774_DEVICE_ID: + case BCM88775_DEVICE_ID: + case BCM88776_DEVICE_ID: + case BCM88777_DEVICE_ID: + case BCM88950_DEVICE_ID: + case BCM88953_DEVICE_ID: + case BCM88954_DEVICE_ID: + case BCM88955_DEVICE_ID: + case BCM88956_DEVICE_ID: + case BCM88752_DEVICE_ID: + case BCM88772_DEVICE_ID: + case BCM88952_DEVICE_ID: + case ACP_PCI_DEVICE_ID: + case BCM88650_DEVICE_ID: + + case BCM88670_DEVICE_ID: + case BCM88671_DEVICE_ID: + case BCM88671M_DEVICE_ID: + case BCM88672_DEVICE_ID: + case BCM88673_DEVICE_ID: + case BCM88674_DEVICE_ID: + case BCM88675_DEVICE_ID: + case BCM88675M_DEVICE_ID: + case BCM88676_DEVICE_ID: + case BCM88676M_DEVICE_ID: + case BCM88677_DEVICE_ID: + case BCM88678_DEVICE_ID: + case BCM88679_DEVICE_ID: + + case BCM88370_DEVICE_ID: + case BCM88371_DEVICE_ID: + case BCM88371M_DEVICE_ID: + case BCM88375_DEVICE_ID: + case BCM88376_DEVICE_ID: + case BCM88376M_DEVICE_ID: + case BCM88377_DEVICE_ID: + case BCM88378_DEVICE_ID: + case BCM88379_DEVICE_ID: + case BCM88681_DEVICE_ID: + case BCM88682_DEVICE_ID: + case BCM88683_DEVICE_ID: + case BCM88684_DEVICE_ID: + case BCM88685_DEVICE_ID: + case BCM88380_DEVICE_ID: + case BCM88381_DEVICE_ID: + case BCM88680_DEVICE_ID: + case BCM88690_DEVICE_ID: + case BCM88470_DEVICE_ID: + case BCM88470P_DEVICE_ID: + case BCM88471_DEVICE_ID: + case BCM88473_DEVICE_ID: + case BCM88474_DEVICE_ID: + case BCM88474H_DEVICE_ID: + case BCM88476_DEVICE_ID: + case BCM88477_DEVICE_ID: + case BCM88270_DEVICE_ID: + case BCM88272_DEVICE_ID: + case BCM88273_DEVICE_ID: + case BCM88278_DEVICE_ID: + case BCM8206_DEVICE_ID: + case BCM88350_DEVICE_ID: + case BCM88351_DEVICE_ID: + case BCM88450_DEVICE_ID: + case BCM88451_DEVICE_ID: + case BCM88550_DEVICE_ID: + case BCM88551_DEVICE_ID: + case BCM88552_DEVICE_ID: + case BCM88651_DEVICE_ID: + case BCM88654_DEVICE_ID: + case BCM88660_DEVICE_ID: + case BCM88360_DEVICE_ID: + case BCM88361_DEVICE_ID: + case BCM88363_DEVICE_ID: + case BCM88460_DEVICE_ID: + case BCM88461_DEVICE_ID: + case BCM88560_DEVICE_ID: + case BCM88561_DEVICE_ID: + case BCM88562_DEVICE_ID: + case BCM88661_DEVICE_ID: + case BCM88664_DEVICE_ID: + /* Fix bar 0 address */ /* FIXME: write full phy address */ + pci_write_config_byte(ctrl->pci_device, 0x12, 0x10); + pci_write_config_byte(ctrl->pci_device, 0x13, 0x60); + + /* + * For DMA transactions - set Max_Payload_Size and + * Max_Read_Request_Size to 128 bytes. + */ + pci_write_config_byte(ctrl->pci_device, 0xb5, 0x0c); + pci_write_config_byte(ctrl->pci_device, 0xb4, 0x0); + break; + default: + break; + } + + /* Redo ioremap */ + if (ctrl->bde_dev.base_address) { + iounmap((void *)ctrl->bde_dev.base_address); + } + ctrl->bde_dev.base_address = (sal_vaddr_t)IOREMAP(ctrl->phys_address, 0x1000000); + + if (debug >= 1) { + gprintk("%s, %s(): info:\n", __FILE__, __FUNCTION__); + gprintk("_ndevices=%d, _switch_ndevices=%d\n", + _ndevices, _switch_ndevices); + gprintk("ctrl->dev_type=0x%x, ctrl->phys_address=0x%lx\n", + ctrl->dev_type, (unsigned long)ctrl->phys_address); + gprintk("ctrl->bde_dev.device=0x%x, ctrl->bde_dev.rev=0x%x, " + "ctrl->bde_dev.base_address=0x%lx\n", + ctrl->bde_dev.device, ctrl->bde_dev.rev, + (unsigned long)ctrl->bde_dev.base_address); + } + + return 0; +} + +/* + * Export Low level access function - currently for PCP DMA Kernel module. + */ +int +lkbde_mem_write(int d, uint32 addr, uint32 *buf) +{ + bde_ctrl_t* ctrl; + void *full_addr; + + if (!VALID_DEVICE(d)) return -1; + ctrl = &_devices[d]; + + full_addr = (void *)ctrl->bde_dev.base_address + addr; + *((uint32_t*)full_addr) = *buf; + return 0; +} +LKM_EXPORT_SYM(lkbde_mem_write); + +int +lkbde_mem_read(int d, uint32 addr, uint32 *buf) +{ + bde_ctrl_t* ctrl; + void *full_addr; + + if (!VALID_DEVICE(d)) return -1; + ctrl = &_devices[d]; + + full_addr = (void *)ctrl->bde_dev.base_address + addr; + *buf = *((uint32_t*)full_addr); + return 0; +} +LKM_EXPORT_SYM(lkbde_mem_read); +#endif /* defined(BCM_PETRA_SUPPORT) */ + +static ibde_t _ibde = { + name: _name, + num_devices: _num_devices, + get_dev: _get_dev, + get_dev_type: _get_dev_type, + pci_conf_read: _pci_conf_read, + pci_conf_write: _pci_conf_write, + pci_bus_features: _pci_bus_features, + read: _read, + write: _write, + salloc: _salloc, + sfree: _sfree, + sinval: _sinval, + sflush: _sflush, + interrupt_connect: _interrupt_connect, + interrupt_disconnect: _interrupt_disconnect, + l2p: _l2p, + p2l: _p2l, +#if defined(BCM_ROBO_SUPPORT) + spi_read: _spi_read, + spi_write: _spi_write, +#else + NULL, + NULL, +#endif /* defined(BCM_ROBO_SUPPORT) */ + iproc_read: _iproc_read, + iproc_write: _iproc_write, + get_cmic_ver: _get_cmic_ver, +}; + +/* + * Function: linux_bde_create + * + * Purpose: + * Creator function for this BDE interface. + * Parameters: + * bus - pointer to the bus features structure you want this + * bde to export. Depends on the system. + * ibde - pointer to a location to recieve the bde interface pointer. + * Returns: + * 0 on success + * -1 on failure. + * Notes: + * This is the main BDE create function for this interface. + * Used by the external system initialization code. + */ +int +linux_bde_create(linux_bde_bus_t *bus, ibde_t **ibde) +{ + + memset(&_bus, 0, sizeof(_bus)); + + if (bus) { + _bus = *bus; + } +#ifdef NONCOHERENT_DMA_MEMORY +#ifdef REMAP_DMA_NONCACHED + /* + * If we have a non-cached DMA memory pool + * there is no need to flush and invalidate. + */ + if (_dma_pool_allocated()) { + _ibde.sinval = NULL; + _ibde.sflush = NULL; + } +#endif +#else + _ibde.sinval = NULL; + _ibde.sflush = NULL; +#endif + *ibde = &_ibde; + return 0; +} + +/* + * Function: linux_bde_destroy + * + * Purpose: + * destroy this bde + * Parameters: + * BDE interface pointer + * Returns: + * 0 on success, < 0 on error. + */ +int +linux_bde_destroy(ibde_t *ibde) +{ + /* nothing */ + return 0; +} + +/* + * Backdoors provided by the kernel bde + */ + +uint32_t +lkbde_get_dev_phys(int d) +{ + if (!VALID_DEVICE(d)) { + return -1; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + gprintk("lkbde_get_dev_phys: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return 0; + } + return _devices[d].phys_address; +} + +uint32_t +lkbde_get_dev_phys_hi(int d) +{ + if (!VALID_DEVICE(d)) { + return -1; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + gprintk("lkbde_get_dev_phys: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return 0; + } +#ifdef PHYS_ADDR_IS_64BIT + return (uint32_t)(_devices[d].phys_address >> 32); +#else + return 0; +#endif +} + +void * +lkbde_get_dev_virt(int d) +{ + if (!VALID_DEVICE(d)) { + return NULL; + } + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + gprintk("lkbde_get_dev_virt: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return 0; + } + + if (_devices[d].alt_base_addr) { + return (void *)_devices[d].alt_base_addr; + } + + return (void *)_devices[d].bde_dev.base_address; +} + +int +lkbde_get_dev_resource(int d, int rsrc, uint32_t *flags, + uint32_t *phys_lo, uint32_t *phys_hi) +{ + if (!VALID_DEVICE(d)) { + return -1; + } + + *flags = 0; + *phys_lo = 0; + *phys_hi = 0; + + if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) { + gprintk("lkbde_get_dev_phys: Not PCI device %d, type %x\n", + d, _devices[d].dev_type); + return 0; + } + + switch (rsrc) { + case 0: + *phys_lo = (uint32_t)(_devices[d].phys_address); +#ifdef PHYS_ADDR_IS_64BIT + *phys_hi = (uint32_t)(_devices[d].phys_address >> 32); +#endif + break; + case 1: + *phys_lo = (uint32_t)(_devices[d].phys_address1); +#ifdef PHYS_ADDR_IS_64BIT + *phys_hi = (uint32_t)(_devices[d].phys_address1 >> 32); +#endif + break; + default: + break; + } + + return 0; +} + +void * +lkbde_get_dma_dev(int d) +{ + if (!VALID_DEVICE(d)) { + return NULL; + } + +#ifdef LINUX_BDE_DMA_DEVICE_SUPPORT + return (void *)_devices[d].dma_dev; +#else + return (void *)_devices[d].pci_device; +#endif +} + +void * +lkbde_get_hw_dev(int d) +{ + if (!VALID_DEVICE(d)) { + return NULL; + } + + return (void *)_devices[d].pci_device; +} + +int +lkbde_dev_state_set(int d, uint32 state) +{ + bde_ctrl_t *ctrl; + + if (!VALID_DEVICE(d)) { + return -1; + } + ctrl = _devices + d; + ctrl->dev_state = state; + return 0; +} + +int +lkbde_dev_state_get(int d, uint32 *state) +{ + bde_ctrl_t *ctrl; + if (!VALID_DEVICE(d)) { + gprintk("_get_dev: Invalid device index %d\n", d); + return -1; + } + ctrl = _devices + d; + + *state = ctrl->dev_state; + return 0; +} + +int +lkbde_dev_instid_set(int d, uint32 instid) +{ + bde_ctrl_t *ctrl; + + if (!VALID_DEVICE(d)) { + return -1; + } + ctrl = _devices + d; + ctrl->inst_id = instid; + + return 0; +} + +int +lkbde_dev_instid_get(int d, uint32 *instid) +{ + bde_ctrl_t *ctrl; + + if (!VALID_DEVICE(d)) { + return -1; + } + ctrl = _devices + d; + *instid = ctrl->inst_id; + + return 0; +} +/* + * When a secondary interrupt handler is installed this function + * is used for synchronizing hardware access to the IRQ mask + * register. The secondary driver will supply a non-zero fmask + * (filter mask) to indicate which interrupt bits it controls. + * The fmask is ignored for the primary driver. + */ +int +lkbde_irq_mask_set(int d, uint32_t addr, uint32_t mask, uint32_t fmask) +{ + bde_ctrl_t *ctrl; + int isr2_dev, iproc_reg; + unsigned long flags; + + isr2_dev = d & LKBDE_ISR2_DEV; + iproc_reg = d & LKBDE_IPROC_REG; + d &= ~(LKBDE_ISR2_DEV | LKBDE_IPROC_REG); + + if (!VALID_DEVICE(d)) { + return -1; + } + + ctrl = _devices + d; + + /* Lock is required to synchronize access from user space */ + spin_lock_irqsave(&ctrl->lock, flags); + + if (isr2_dev) { + /* This is the secondary interrupt handler */ + ctrl->fmask = fmask; + ctrl->imask2 = mask & ctrl->fmask; + } else { + /* This is the primary interrupt handler */ + ctrl->imask = mask & ~ctrl->fmask; + } + + if (iproc_reg) { + _iproc_write(d, addr, ctrl->imask | ctrl->imask2); + } else { + _write(d, addr, ctrl->imask | ctrl->imask2); + } + + spin_unlock_irqrestore(&ctrl->lock, flags); + + return 0; +} + +/* + * When a secondary interrupt handler is installed, this function + * is used to avoid activating the user mode interrupt handler + * thread if all pending interrupts are handled in kernel space. + * + * The mask returned is the mask of all interrupts, it can be used + * to do a logical AND with fmask, the result will tell you if + * the user mode interrupt handler needs to be invoked. + * + * Note that if no secondary handler is installed, the value of + * "mask & fmask" will be zero, and hence there will be no need to read the + * current interrupt status from hardware (from kernel space). + */ +int +lkbde_irq_mask_get(int d, uint32_t *mask, uint32_t *fmask) +{ + bde_ctrl_t *ctrl; + + d &= ~(LKBDE_ISR2_DEV | LKBDE_IPROC_REG); + + if (!VALID_DEVICE(d)) { + return -1; + } + + if (mask == NULL || fmask == NULL) { + return -1; + } + + ctrl = _devices + d; + + *fmask = ctrl->fmask; + *mask = ctrl->imask | ctrl->imask2; + + return 0; +} + +int +lkbde_get_num_devices(int type) +{ + return _num_devices(type); +} + +/* + * Export functions + */ +LKM_EXPORT_SYM(linux_bde_create); +LKM_EXPORT_SYM(linux_bde_destroy); +LKM_EXPORT_SYM(lkbde_get_dev_phys); +LKM_EXPORT_SYM(lkbde_get_dev_virt); +LKM_EXPORT_SYM(lkbde_get_dev_resource); +LKM_EXPORT_SYM(lkbde_get_hw_dev); +LKM_EXPORT_SYM(lkbde_get_dma_dev); +LKM_EXPORT_SYM(lkbde_irq_mask_set); +LKM_EXPORT_SYM(lkbde_irq_mask_get); +LKM_EXPORT_SYM(lkbde_get_dev_phys_hi); +LKM_EXPORT_SYM(lkbde_dev_state_set); +LKM_EXPORT_SYM(lkbde_dev_state_get); +LKM_EXPORT_SYM(lkbde_dev_instid_set); +LKM_EXPORT_SYM(lkbde_dev_instid_get); +#if (defined(BCM_PETRA_SUPPORT) || defined(BCM_DFE_SUPPORT)) +LKM_EXPORT_SYM(lkbde_cpu_write); +LKM_EXPORT_SYM(lkbde_cpu_read); +LKM_EXPORT_SYM(lkbde_cpu_pci_register); +#endif diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c new file mode 100644 index 00000000000..32b769784c2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c @@ -0,0 +1,971 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: linux_dma.c,v 1.414 Broadcom SDK $ + * $Copyright: (c) 2016 Broadcom Corp. + * All Rights Reserved.$ + * + * Linux Kernel BDE DMA memory allocation + * + * + * DMA memory allocation modes + * =========================== + * + * 1. Using private pool in kernel memory + * -------------------------------------- + * In this mode the BDE module will try to assemble a physically contiguous + * of memory using the kernel page allocator. This memory block is then + * administered by the mpool allocation functions. Note that once a system + * has been running for a while, the memory fragmentation may prevent the + * allocator from assembling a contiguous memory block, however, if the + * module is loaded shortly after system startup, it is very unlikely to + * fail. + * + * This allocation method is used by default. + * + * 2. Using private pool in high memory + * ------------------------------------ + * In this mode the BDE module will assume that unused physical memory is + * present at the high_memory address, i.e. memory not managed by the Linux + * memory manager. This memory block is mapped into kernel space and + * administered by the mpool allocation functions. High memory must be + * reserved using either the mem=xxx kernel parameter (recommended), or by + * hardcoding the memory limit in the kernel image. + * + * The module parameter himem=1 enables this allocation mode. + * + * 3. Using kernel allocators (kmalloc, __get_free_pages) + * ------------------------------------------------------ + * In this mode all DMA memory is allocated from the kernel on the fly, i.e. + * no private DMA memory pool will be created. If large memory blocks are + * only allocated at system startup (or not at all), this allocation method + * is the most flexible and memory-efficient, however, it is not recommended + * for non-coherent memory platforms due to an overall system performance + * degradation arising from the use of cache flush/invalidate instructions. + * + * The module parameter dmasize=0M enables this allocation mode, however if + * DMA memory is requested from a user mode application, a private memory + * pool will be created and used irrespectively. + */ + +#include +#include +#include +#include +#include + +#ifdef BCM_PLX9656_LOCAL_BUS +#include +#endif + +/* allocation types/methods for the DMA memory pool */ +#define ALLOC_TYPE_CHUNK 0 /* use small allocations and join them */ +#define ALLOC_TYPE_API 1 /* use one allocation */ +#if _SIMPLE_MEMORY_ALLOCATION_ +#include +#if defined(IPROC_CMICD) && defined(CONFIG_CMA) && defined(CONFIG_CMA_SIZE_MBYTES) +#define DMA_MAX_ALLOC_SIZE (CONFIG_CMA_SIZE_MBYTES * 1024 * 1024) +#else +#define DMA_MAX_ALLOC_SIZE (1 << (MAX_ORDER - 1 + PAGE_SHIFT)) /* Maximum size the kernel can allocate in one allocation */ +#endif +#endif /* _SIMPLE_MEMORY_ALLOCATION_ */ + +#if _SIMPLE_MEMORY_ALLOCATION_ == 1 +#define ALLOC_METHOD_DEFAULT ALLOC_TYPE_API +#else +#define ALLOC_METHOD_DEFAULT ALLOC_TYPE_CHUNK +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)) +#include +#define virt_to_bus virt_to_phys +#define bus_to_virt phys_to_virt +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) +#define VIRT_TO_PAGE(p) virt_to_page((void*)(p)) +#else +#define VIRT_TO_PAGE(p) virt_to_page((p)) +#endif + +#ifndef KMALLOC_MAX_SIZE +#define KMALLOC_MAX_SIZE (1UL << (MAX_ORDER - 1 + PAGE_SHIFT)) +#endif + +/* Compatibility */ +#ifdef LKM_2_4 +#define MEM_MAP_RESERVE mem_map_reserve +#define MEM_MAP_UNRESERVE mem_map_unreserve +#else /* LKM_2_6 */ +#define MEM_MAP_RESERVE SetPageReserved +#define MEM_MAP_UNRESERVE ClearPageReserved +#endif /* LKM_2_x */ + +#ifndef GFP_DMA32 +#define GFP_DMA32 0 +#endif + +/* Flags for memory allocations */ +#ifdef SAL_BDE_XLP +static int mem_flags = GFP_ATOMIC | GFP_KERNEL | GFP_DMA; +#else +#if defined(CONFIG_ZONE_DMA32) +static int mem_flags = GFP_ATOMIC | GFP_DMA32; +#else +static int mem_flags = GFP_ATOMIC | GFP_DMA; +#endif +#endif + +/* Debug output */ +static int dma_debug = 0; +module_param(dma_debug, int, 0); +MODULE_PARM_DESC(dma_debug, +"DMA debug output enable (default 0)."); + +/* DMA memory pool size */ +static char *dmasize; +LKM_MOD_PARAM(dmasize, "s", charp, 0); +MODULE_PARM_DESC(dmasize, +"Specify DMA memory size (default 4MB)"); + +/* Select DMA memory pool allocation method */ +static int dmaalloc = ALLOC_METHOD_DEFAULT; +LKM_MOD_PARAM(dmaalloc, "i", int, 0); +MODULE_PARM_DESC(dmaalloc, "Select DMA memory allocation method"); + +/* Use high memory for DMA */ +static char *himem; +LKM_MOD_PARAM(himem, "s", charp, 0); +MODULE_PARM_DESC(himem, +"Use high memory for DMA (default no)"); + +/* Physical high memory address to use for DMA */ +static char *himemaddr = 0; +LKM_MOD_PARAM(himemaddr, "s", charp, 0); +MODULE_PARM_DESC(himemaddr, +"Physical address to use for high memory DMA"); + +/* DMA memory allocation */ + +#define ONE_KB 1024 +#define ONE_MB (1024*1024) +#define ONE_GB (1024*1024*1024) + +/* Default DMA memory size */ +#ifdef SAL_BDE_DMA_MEM_DEFAULT +#define DMA_MEM_DEFAULT (SAL_BDE_DMA_MEM_DEFAULT * ONE_MB) +#else +#define DMA_MEM_DEFAULT (8 * ONE_MB) +#endif +#define DMA_MEM_DEFAULT_ROBO (4 * ONE_MB) + +/* We try to assemble a contiguous segment from chunks of this size */ +#define DMA_BLOCK_SIZE (512 * ONE_KB) + +typedef struct _dma_segment { + struct list_head list; + unsigned long req_size; /* Requested DMA segment size */ + unsigned long blk_size; /* DMA block size */ + unsigned long blk_order; /* DMA block size in alternate format */ + unsigned long seg_size; /* Current DMA segment size */ + unsigned long seg_begin; /* Logical address of segment */ + unsigned long seg_end; /* Logical end address of segment */ + unsigned long *blk_ptr; /* Array of logical DMA block addresses */ + int blk_cnt_max; /* Maximum number of block to allocate */ + int blk_cnt; /* Current number of blocks allocated */ +} dma_segment_t; + +static unsigned int _dma_mem_size = DMA_MEM_DEFAULT; +static mpool_handle_t _dma_pool = NULL; +static void __iomem *_dma_vbase = NULL; +/* cpu physical address for mmap */ +static phys_addr_t _cpu_pbase = 0; +/* + * DMA bus address, it is either identical to cpu physical address + * or another address(IOVA) translated by IOMMU. + */ +static phys_addr_t _dma_pbase = 0; +static int _use_himem = 0; +static unsigned long _himemaddr = 0; +static int _use_dma_mapping = 0; +static LIST_HEAD(_dma_seg); + +#define DMA_DEV(n) lkbde_get_dma_dev(n) +#define BDE_NUM_DEVICES(t) lkbde_get_num_devices(t) + +/* + * Function: _find_largest_segment + * + * Purpose: + * Find largest contiguous segment from a pool of DMA blocks. + * Parameters: + * dseg - DMA segment descriptor + * Returns: + * 0 on success, < 0 on error. + * Notes: + * Assembly stops if a segment of the requested segment size + * has been obtained. + * + * Lower address bits of the DMA blocks are used as follows: + * 0: Untagged + * 1: Discarded block + * 2: Part of largest contiguous segment + * 3: Part of current contiguous segment + */ +static int +_find_largest_segment(dma_segment_t *dseg) +{ + int i, j, blks, found; + unsigned long b, e, a; + + blks = dseg->blk_cnt; + /* Clear all block tags */ + for (i = 0; i < blks; i++) { + dseg->blk_ptr[i] &= ~3; + } + for (i = 0; i < blks && dseg->seg_size < dseg->req_size; i++) { + /* First block must be an untagged block */ + if ((dseg->blk_ptr[i] & 3) == 0) { + /* Initial segment size is the block size */ + b = dseg->blk_ptr[i]; + e = b + dseg->blk_size; + dseg->blk_ptr[i] |= 3; + /* Loop looking for adjacent blocks */ + do { + found = 0; + for (j = i + 1; j < blks && (e - b) < dseg->req_size; j++) { + a = dseg->blk_ptr[j]; + /* Check untagged blocks only */ + if ((a & 3) == 0) { + if (a == (b - dseg->blk_size)) { + /* Found adjacent block below current segment */ + dseg->blk_ptr[j] |= 3; + b = a; + found = 1; + } else if (a == e) { + /* Found adjacent block above current segment */ + dseg->blk_ptr[j] |= 3; + e += dseg->blk_size; + found = 1; + } + } + } + } while (found); + if ((e - b) > dseg->seg_size) { + /* The current block is largest so far */ + dseg->seg_begin = b; + dseg->seg_end = e; + dseg->seg_size = e - b; + /* Re-tag current and previous largest segment */ + for (j = 0; j < blks; j++) { + if ((dseg->blk_ptr[j] & 3) == 3) { + /* Tag current segment as the largest */ + dseg->blk_ptr[j] &= ~1; + } else if ((dseg->blk_ptr[j] & 3) == 2) { + /* Discard previous largest segment */ + dseg->blk_ptr[j] ^= 3; + } + } + } else { + /* Discard all blocks in current segment */ + for (j = 0; j < blks; j++) { + if ((dseg->blk_ptr[j] & 3) == 3) { + dseg->blk_ptr[j] &= ~2; + } + } + } + } + } + return 0; +} + +/* + * Function: _alloc_dma_blocks + * + * Purpose: + * Allocate DMA blocks and add them to the pool. + * Parameters: + * dseg - DMA segment descriptor + * blks - number of DMA blocks to allocate + * Returns: + * 0 on success, < 0 on error. + * Notes: + * DMA blocks are allocated using the page allocator. + */ +static int +_alloc_dma_blocks(dma_segment_t *dseg, int blks) +{ + int i, start; + unsigned long addr; + + if (dseg->blk_cnt + blks > dseg->blk_cnt_max) { + gprintk("No more DMA blocks\n"); + return -1; + } + start = dseg->blk_cnt; + for (i = 0; i < blks; i++) { + /* + * Note that we cannot use pci_alloc_consistent when we + * want to be able to map DMA memory to user space. + * + * The GFP_DMA flag is omitted as this imposes the ISA + * addressing limitations on x86 platforms. As long as + * we have less than 1GB of memory, we can do PCI DMA + * to all physical RAM locations. + */ + addr = __get_free_pages(mem_flags, dseg->blk_order); + if (addr) { + dseg->blk_ptr[start + i] = addr; + ++dseg->blk_cnt; + } else { + gprintk("DMA allocation failed: allocated %d of %d " + "requested blocks\n", i, blks); + return -1; + } + } + return 0; +} + +/* + * Function: _dma_segment_alloc + * + * Purpose: + * Allocate large physically contiguous DMA segment. + * Parameters: + * size - requested DMA segment size + * blk_size - assemble segment from blocks of this size + * Returns: + * DMA segment descriptor. + * Notes: + * Since we cannot allocate large blocks of contiguous + * memory from the kernel, we simply keep allocating + * smaller chunks until we can assemble a contiguous + * block of the desired size. + * + * When system allowed maximum bytes of memory has been allocated + * without a successful assembly of a contiguous DMA + * segment, the allocation function will return the + * largest contiguous segment found so far. It is up + * to the calling function to decide whether this + * amount is sufficient to proceed. + */ +static dma_segment_t * +_dma_segment_alloc(size_t size, size_t blk_size) +{ + dma_segment_t *dseg; + int i, blk_ptr_size; + unsigned long page_addr; + struct sysinfo si; + + /* Sanity check */ + if (size == 0 || blk_size == 0) { + return NULL; + } + /* Allocate an initialize DMA segment descriptor */ + if ((dseg = kmalloc(sizeof(dma_segment_t), GFP_KERNEL)) == NULL) { + return NULL; + } + memset(dseg, 0, sizeof(dma_segment_t)); + dseg->req_size = size; + dseg->blk_size = PAGE_ALIGN(blk_size); + while ((PAGE_SIZE << dseg->blk_order) < dseg->blk_size) { + dseg->blk_order++; + } + + si_meminfo(&si); + dseg->blk_cnt_max = (si.totalram << PAGE_SHIFT) / dseg->blk_size; + blk_ptr_size = dseg->blk_cnt_max * sizeof(unsigned long); + if (blk_ptr_size > KMALLOC_MAX_SIZE) { + blk_ptr_size = KMALLOC_MAX_SIZE; + dseg->blk_cnt_max = KMALLOC_MAX_SIZE / sizeof(unsigned long); + } + /* Allocate an initialize DMA block pool */ + dseg->blk_ptr = KMALLOC(blk_ptr_size, GFP_KERNEL); + if (dseg->blk_ptr == NULL) { + kfree(dseg); + return NULL; + } + memset(dseg->blk_ptr, 0, blk_ptr_size); + /* Allocate minimum number of blocks */ + if (_alloc_dma_blocks(dseg, dseg->req_size / dseg->blk_size) != 0) { + gprintk("Failed to allocate minimum number of DMA blocks\n"); + /* + * _alloc_dma_blocks() returns -1 if it fails to allocate the requested + * number of blocks, but it may still have allocated something. Fall + * through and return dseg filled in with as much memory as we could + * allocate. + */ + } + /* Allocate more blocks until we have a complete segment */ + do { + _find_largest_segment(dseg); + if (dseg->seg_size >= dseg->req_size) { + break; + } + } while (_alloc_dma_blocks(dseg, 8) == 0); + /* Reserve all pages in the DMA segment and free unused blocks */ + for (i = 0; i < dseg->blk_cnt; i++) { + if ((dseg->blk_ptr[i] & 3) == 2) { + dseg->blk_ptr[i] &= ~3; + for (page_addr = dseg->blk_ptr[i]; + page_addr < dseg->blk_ptr[i] + dseg->blk_size; + page_addr += PAGE_SIZE) { + MEM_MAP_RESERVE(VIRT_TO_PAGE(page_addr)); + } + } else if (dseg->blk_ptr[i]) { + dseg->blk_ptr[i] &= ~3; + free_pages(dseg->blk_ptr[i], dseg->blk_order); + dseg->blk_ptr[i] = 0; + } + } + return dseg; +} + +/* + * Function: _dma_segment_free + * + * Purpose: + * Release resources used by DMA segment. + * Parameters: + * dseg - DMA segment descriptor + * Returns: + * Nothing. + */ +static void +_dma_segment_free(dma_segment_t *dseg) +{ + int i; + unsigned long page_addr; + + if (dseg->blk_ptr) { + for (i = 0; i < dseg->blk_cnt; i++) { + if (dseg->blk_ptr[i]) { + for (page_addr = dseg->blk_ptr[i]; + page_addr < dseg->blk_ptr[i] + dseg->blk_size; + page_addr += PAGE_SIZE) { + MEM_MAP_UNRESERVE(VIRT_TO_PAGE(page_addr)); + } + free_pages(dseg->blk_ptr[i], dseg->blk_order); + } + } + kfree(dseg->blk_ptr); + kfree(dseg); + } +} + +/* + * Function: _pgalloc + * + * Purpose: + * Allocate DMA memory using page allocator + * Parameters: + * size - number of bytes to allocate + * Returns: + * Pointer to allocated DMA memory or NULL if failure. + * Notes: + * For any sizes less than DMA_BLOCK_SIZE, we ask the page + * allocator for the entire memory block, otherwise we try + * to assemble a contiguous segment ourselves. + */ +static void * +_pgalloc(size_t size) +{ + dma_segment_t *dseg; + size_t blk_size; + + blk_size = (size < DMA_BLOCK_SIZE) ? size : DMA_BLOCK_SIZE; + if ((dseg = _dma_segment_alloc(size, blk_size)) == NULL) { + return NULL; + } + if (dseg->seg_size < size) { + /* If we didn't get the full size then forget it */ + gprintk("_pgalloc() failed to get requested size %zu: " + "only got %lu contiguous across %d blocks\n", + size, dseg->seg_size, dseg->blk_cnt); + _dma_segment_free(dseg); + return NULL; + } + list_add(&dseg->list, &_dma_seg); + return (void *)dseg->seg_begin; +} + +/* + * Function: _pgfree + * + * Purpose: + * Free memory allocated by _pgalloc + * Parameters: + * ptr - pointer returned by _pgalloc + * Returns: + * 0 if succesfully freed, otherwise -1. + */ +static int +_pgfree(void *ptr) +{ + struct list_head *pos; + list_for_each(pos, &_dma_seg) { + dma_segment_t *dseg = list_entry(pos, dma_segment_t, list); + if (ptr == (void *)dseg->seg_begin) { + list_del(&dseg->list); + _dma_segment_free(dseg); + return 0; + } + } + return -1; +} + +/* + * Function: _pgcleanup + * + * Purpose: + * Free all memory allocated by _pgalloc + * Parameters: + * None + * Returns: + * Nothing. + */ +static void +_pgcleanup(void) +{ + switch (dmaalloc) { +#if _SIMPLE_MEMORY_ALLOCATION_ + case ALLOC_TYPE_API: + if (_dma_vbase) { + if (dma_debug >= 1) gprintk("freeing v=%p p=0x%lx size=0x%lx\n", _dma_vbase,(unsigned long) _dma_pbase, (unsigned long)_dma_mem_size); + dma_free_coherent(DMA_DEV(0), _dma_mem_size, _dma_vbase, _dma_pbase); + } + break; +#endif /* _SIMPLE_MEMORY_ALLOCATION_ */ + + case ALLOC_TYPE_CHUNK: { + struct list_head *pos, *tmp; + int i, ndevices; + if (_use_dma_mapping) { + ndevices = BDE_NUM_DEVICES(BDE_ALL_DEVICES); + for (i = 0; i < ndevices && DMA_DEV(i); i ++) { + dma_unmap_single(DMA_DEV(i), (dma_addr_t)_dma_pbase, _dma_mem_size, DMA_BIDIRECTIONAL); + } + _use_dma_mapping = 0; + } + list_for_each_safe(pos, tmp, &_dma_seg) { + dma_segment_t *dseg = list_entry(pos, dma_segment_t, list); + list_del(&dseg->list); + _dma_segment_free(dseg); + } + break; + } + + default: + gprintk("DMA memory allocation method dmaalloc=%d is not supported\n", dmaalloc); + } +} + +/* + * Function: _alloc_mpool + * + * Purpose: + * Allocate DMA memory pool + * Parameters: + * size - size of DMA memory pool + * Returns: + * Nothing. + * Notes: + * If set up to use high memory, we simply map the memory into + * kernel space. + * It is assumed there is only one pool. + */ +static void +_alloc_mpool(size_t size) +{ + unsigned long pbase = 0; + +#if defined(__arm__) && !defined(CONFIG_HIGHMEM) + if (_use_himem) { + gprintk("DMA in high memory requires CONFIG_HIGHMEM on ARM CPUs.\n"); + return; + } +#endif + + if (_use_himem) { + /* Use high memory for DMA */ + if (_himemaddr) { + pbase = _himemaddr; + } else { + pbase = virt_to_bus(high_memory); + } + if (((pbase + (size - 1)) >> 16) > DMA_BIT_MASK(16)) { + gprintk("DMA in high memory at 0x%lx size 0x%lx is beyond the 4GB limit and not supported.\n", pbase, (unsigned long)size); + return; + } + _cpu_pbase = _dma_pbase = pbase; + _dma_vbase = IOREMAP(_dma_pbase, size); + } else { + /* Get DMA memory from kernel */ + switch (dmaalloc) { +#if _SIMPLE_MEMORY_ALLOCATION_ + case ALLOC_TYPE_API: { + size_t alloc_size = size; /* size of memory allocated in current iteration */ + if (alloc_size > DMA_MAX_ALLOC_SIZE) { + alloc_size = DMA_MAX_ALLOC_SIZE; + } + /* get a memory allocation from the kernel */ + { + dma_addr_t dma_handle; + if (!(_dma_vbase = dma_alloc_coherent(DMA_DEV(0), alloc_size, &dma_handle, GFP_KERNEL)) || !dma_handle) { + gprintk("failed to allocate the memory pool of size 0x%lx\n", (unsigned long)alloc_size); + return; + } + _cpu_pbase = pbase = dma_handle; + } + + if (alloc_size != size) { + gprintk("allocated 0x%lx bytes instead of 0x%lx bytes.\n", + (unsigned long)alloc_size, (unsigned long)size); + } + size = _dma_mem_size = alloc_size; + break; + } +#endif /* _SIMPLE_MEMORY_ALLOCATION_ */ + + case ALLOC_TYPE_CHUNK: + _dma_vbase = _pgalloc(size); + if (!_dma_vbase) { + gprintk("failed to allocate the memory pool of size 0x%lx\n", (unsigned long)size); + return; + } + _cpu_pbase = virt_to_bus(_dma_vbase); + /* Use dma_map_single to obtain DMA bus address or IOVA if iommu is present. */ + if (DMA_DEV(0)) { + pbase = dma_map_single(DMA_DEV(0), _dma_vbase, size, DMA_BIDIRECTIONAL); + if (dma_mapping_error(DMA_DEV(0), pbase)) { + gprintk("Failed to map memory at %p\n", _dma_vbase); + _pgcleanup(); + _dma_vbase = NULL; + _cpu_pbase = 0; + return; + } + _use_dma_mapping = 1; + } else { + /* Device has not been probed. */ + pbase = _cpu_pbase; + } + break; + default: + _dma_vbase = NULL; + gprintk("DMA memory allocation method dmaalloc=%d is not supported\n", dmaalloc); + return; + } + + if (((pbase + (size - 1)) >> 16) > DMA_BIT_MASK(16)) { + gprintk("DMA memory allocated at 0x%lx size 0x%lx is beyond the 4GB limit and not supported.\n", pbase, (unsigned long)size); + _pgcleanup(); + _dma_vbase = NULL; + _dma_pbase = 0; + return; + } + + _dma_pbase = pbase; +#ifdef REMAP_DMA_NONCACHED + _dma_vbase = IOREMAP(_dma_pbase, size); +#endif + if (dma_debug >= 1) { + gprintk("_use_dma_mapping:%d _dma_vbase:%p _dma_pbase:%lx _cpu_pbase:%lx allocated:%lx dmaalloc:%d\n", + _use_dma_mapping, _dma_vbase, (unsigned long)_dma_pbase, + (unsigned long)_cpu_pbase, (unsigned long)size, dmaalloc); + } + } +} + +/* + * Function: _dma_cleanup + * + * Purpose: + * DMA cleanup function. + * Parameters: + * None + * Returns: + * Always 0 + */ +int +_dma_cleanup(void) +{ + if (_dma_vbase) { + mpool_destroy(_dma_pool); + if (_use_himem) { + iounmap(_dma_vbase); + } else { +#ifdef REMAP_DMA_NONCACHED + iounmap(_dma_vbase); +#endif + _pgcleanup(); + } + _dma_vbase = NULL; + _dma_pbase = 0; + _cpu_pbase = 0; + } + return 0; +} + +void _dma_init(int robo_switch, int dev_index) +{ + unsigned long pbase; + + if (dev_index > 0) { + if ((_use_dma_mapping == 1) && DMA_DEV(dev_index) && _dma_vbase) { + pbase = dma_map_single(DMA_DEV(dev_index), _dma_vbase, _dma_mem_size, DMA_BIDIRECTIONAL); + if (dma_mapping_error(DMA_DEV(dev_index), pbase)) { + gprintk("Failed to map memory for device %d at %p\n", dev_index, _dma_vbase); + } + } + return; + } + + /* DMA Setup */ + if (dmasize) { + if ((dmasize[strlen(dmasize)-1] & ~0x20) == 'M') { + _dma_mem_size = simple_strtoul(dmasize, NULL, 0); + _dma_mem_size *= ONE_MB; + } else { + gprintk("DMA memory size must be specified as e.g. dmasize=8M\n"); + } + if (_dma_mem_size & (_dma_mem_size-1)) { + gprintk("dmasize must be a power of 2 (1M, 2M, 4M, 8M etc.)\n"); + _dma_mem_size = 0; + } + } else { + if(robo_switch){ + _dma_mem_size = DMA_MEM_DEFAULT_ROBO; + } + } + + if (himem) { + if ((himem[0] & ~0x20) == 'Y' || himem[0] == '1') { + _use_himem = 1; + } else if ((himem[0] & ~0x20) == 'N' || himem[0] == '0') { + _use_himem = 0; + } + } + + if (himemaddr && strlen(himemaddr) > 0) { + char suffix = (himemaddr[strlen(himemaddr)-1] & ~0x20); + _himemaddr = simple_strtoul(himemaddr, NULL, 0); + if (suffix == 'M') { + _himemaddr *= ONE_MB; + } else if (suffix == 'G') { + _himemaddr *= ONE_GB; + } else { + gprintk("DMA high memory address must be specified as e.g. himemaddr=8[MG]\n"); + } + } + + if (_dma_mem_size) { + _alloc_mpool(_dma_mem_size); + if (_dma_vbase == NULL) { + gprintk("no DMA memory available\n"); + } + else { + mpool_init(); + _dma_pool = mpool_create(_dma_vbase, _dma_mem_size); + } + } +} + +#if USE_LINUX_BDE_MMAP +/* + * Function: _dma_range_valid + * + * Purpose: + * Check if DMA address range is valid. + * Parameters: + * phys_addr - start physical address + * size - range size + * Returns: + * 0 : not valid + * 1 : valid + */ +int +_dma_range_valid(unsigned long phys_addr, unsigned long size) +{ + unsigned long pool_start = _cpu_pbase; + unsigned long pool_end = pool_start + _dma_mem_size; + + if (phys_addr < pool_start || (phys_addr + size) > pool_end) { + gprintk("range 0x%lx-0x%lx outside DMA pool 0x%lx-0x%lx\n", + phys_addr, phys_addr + size, pool_start, pool_end); + return 0; + } + return 1; +} +#endif + +/* + * Function: _dma_pool_allocated + * + * Purpose: + * Check if DMA pool has been allocated. + * Parameters: + * None + * Returns: + * 0 : not allocated + * 1 : allocated + */ +int +_dma_pool_allocated(void) +{ + return (_dma_vbase) ? 1 : 0; +} + +sal_paddr_t +_l2p(int d, void *vaddr) +{ + if (_dma_mem_size) { + /* dma memory is a contiguous block */ + if (vaddr) { + return _dma_pbase + (PTR_TO_UINTPTR(vaddr) - PTR_TO_UINTPTR(_dma_vbase)); + } + return 0; + } + return ((sal_paddr_t)virt_to_bus(vaddr)); +} + +void * +_p2l(int d, sal_paddr_t paddr) +{ + sal_vaddr_t vaddr = (sal_vaddr_t)_dma_vbase; + + if (_dma_mem_size) { + /* DMA memory is a contiguous block */ + if (paddr == 0) { + return NULL; + } + return (void *)(vaddr + (sal_vaddr_t)(paddr - _dma_pbase)); + } + return bus_to_virt(paddr); +} + +/* + * Some of the driver malloc's are too large for + * kmalloc(), so 'sal_alloc' and 'sal_free' in the + * linux kernel sal cannot be implemented with kmalloc(). + * + * Instead, they expect someone to provide an allocator + * that can handle the gimongous size of some of the + * allocations, and we provide it here, by allocating + * this memory out of the boot-time dma pool. + * + * These are the functions in question: + */ + +void* kmalloc_giant(int sz) +{ + return mpool_alloc(_dma_pool, sz); +} + +void kfree_giant(void* ptr) +{ + return mpool_free(_dma_pool, ptr); +} + +uint32_t * +_salloc(int d, int size, const char *name) +{ + void *ptr; + + if (_dma_mem_size) { + return mpool_alloc(_dma_pool, size); + } + if ((ptr = kmalloc(size, mem_flags)) == NULL) { + ptr = _pgalloc(size); + } + return ptr; +} + +void +_sfree(int d, void *ptr) +{ + if (_dma_mem_size) { + return mpool_free(_dma_pool, ptr); + } + if (_pgfree(ptr) < 0) { + kfree(ptr); + } +} + +int +_sinval(int d, void *ptr, int length) +{ +#if defined(dma_cache_wback_inv) + dma_cache_wback_inv((unsigned long)ptr, length); +#else +#if defined(IPROC_CMICD) || defined(BCM958525) + /* FIXME: need proper function to replace dma_cache_sync */ + dma_sync_single_for_cpu(NULL, (unsigned long)ptr, length, DMA_BIDIRECTIONAL); +#else + dma_cache_sync(NULL, ptr, length, DMA_BIDIRECTIONAL); +#endif +#endif + return 0; +} + +int +_sflush(int d, void *ptr, int length) +{ +#if defined(dma_cache_wback_inv) + dma_cache_wback_inv((unsigned long)ptr, length); +#else +#if defined(IPROC_CMICD) || defined(BCM958525) + /* FIXME: need proper function to replace dma_cache_sync */ + dma_sync_single_for_cpu(NULL, (unsigned long)ptr, length, DMA_BIDIRECTIONAL); +#else + dma_cache_sync(NULL, ptr, length, DMA_BIDIRECTIONAL); +#endif +#endif + + return 0; +} + +int +lkbde_get_dma_info(phys_addr_t* cpu_pbase, phys_addr_t* dma_pbase, ssize_t* size) +{ + if (_dma_vbase == NULL) { + if (_dma_mem_size == 0) { + _dma_mem_size = DMA_MEM_DEFAULT; + } + _alloc_mpool(_dma_mem_size); + } + *cpu_pbase = _cpu_pbase; + *dma_pbase = _dma_pbase; + *size = (_dma_vbase) ? _dma_mem_size : 0; + return 0; +} + +void +_dma_pprint(void) +{ + pprintf("DMA Memory (%s): %d bytes, %d used, %d free%s\n", + (_use_himem) ? "high" : "kernel", + (_dma_vbase) ? _dma_mem_size : 0, + (_dma_vbase) ? mpool_usage(_dma_pool) : 0, + (_dma_vbase) ? _dma_mem_size - mpool_usage(_dma_pool) : 0, + USE_LINUX_BDE_MMAP ? ", local mmap" : ""); +} + +/* + * Export functions + */ +LKM_EXPORT_SYM(kmalloc_giant); +LKM_EXPORT_SYM(kfree_giant); +LKM_EXPORT_SYM(lkbde_get_dma_info); diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c new file mode 100644 index 00000000000..a2d58858a5a --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c @@ -0,0 +1,120 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: $ + * $Copyright: (c) 2014 Broadcom Corp. + * All Rights Reserved.$ + * + */ + +#include +#include +#include +#include "linux_shbde.h" + +/* Hardware abstractions for shared BDE functions */ + +static unsigned short +linux_pcic16_read(void *pci_dev, unsigned int addr) +{ + u16 data = 0; + + pci_read_config_word((struct pci_dev *)pci_dev, addr, &data); + + return data; +} + +static void +linux_pcic16_write(void *pci_dev, unsigned int addr, unsigned short data) +{ + pci_write_config_word((struct pci_dev *)pci_dev, addr, (u16)data); +} + +static unsigned int +linux_pcic32_read(void *pci_dev, unsigned int addr) +{ + u32 data = 0; + + pci_read_config_dword((struct pci_dev *)pci_dev, addr, &data); + + return data; +} + +static void +linux_pcic32_write(void *pci_dev, unsigned int addr, unsigned int data) +{ + pci_write_config_dword((struct pci_dev *)pci_dev, addr, (u32)data); +} + +static unsigned int +linux_io32_read(void *addr) +{ + return *((volatile u32 *)addr); +} + +static void +linux_io32_write(void *addr, unsigned int data) +{ + *((volatile u32 *)addr) = data; +} + +static void +linux_usleep(int usec) +{ + udelay(usec); +} + + +/* To get the PCI parent device under linux, from only the device pointer */ +static void * +linux_pci_parent_device_get(void *pci_dev) +{ + return (void *)(((struct pci_dev *)pci_dev)->bus->self); +} + + +/* + * Function: + * linux_shbde_hal_init + * Purpose: + * Initialize hardware abstraction module for Linux kernel. + * Parameters: + * shbde - pointer to uninitialized hardware abstraction module + * log_func - optional log output function + * Returns: + * Always 0 + */ +int +linux_shbde_hal_init(shbde_hal_t *shbde, shbde_log_func_t log_func) +{ + memset(shbde, 0, sizeof(*shbde)); + + shbde->log_func = log_func; + + shbde->pcic16_read = linux_pcic16_read; + shbde->pcic16_write = linux_pcic16_write; + shbde->pcic32_read = linux_pcic32_read; + shbde->pcic32_write = linux_pcic32_write; + + shbde->io32_read = linux_io32_read; + shbde->io32_write = linux_io32_write; + + shbde->usleep = linux_usleep; + + shbde->pci_parent_device_get = linux_pci_parent_device_get; + + return 0; +} diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h new file mode 100644 index 00000000000..5e8a70119e8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h @@ -0,0 +1,33 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: $ + * $Copyright: (c) 2014 Broadcom Corp. + * All Rights Reserved.$ + * + */ + +#ifndef __LINUX_SHBDE_H__ +#define __LINUX_SHBDE_H__ + +#include +#include +#include + +extern int +linux_shbde_hal_init(shbde_hal_t *shbde, shbde_log_func_t log_func); + +#endif /* __LINUX_SHBDE_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c b/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c new file mode 100644 index 00000000000..7a377cd0078 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c @@ -0,0 +1,294 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: mpool.c,v 1.18 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + */ + +#include + +#ifdef __KERNEL__ + +/* + * Abstractions used when compiling for Linux kernel mode. + */ + +#include + +/* + * We cannot use the linux kernel SAL for MALLOC/FREE because + * the current implementation of sal_alloc() allocates memory + * out of an mpool created by this module... + */ +#define MALLOC(x) kmalloc(x, GFP_ATOMIC) +#define FREE(x) kfree(x) + +static spinlock_t _mpool_lock; +#define MPOOL_LOCK_INIT() spin_lock_init(&_mpool_lock) +#define MPOOL_LOCK() unsigned long flags; spin_lock_irqsave(&_mpool_lock, flags) +#define MPOOL_UNLOCK() spin_unlock_irqrestore(&_mpool_lock, flags) + +#else /* !__KERNEL__*/ + +/* + * Abstractions used when compiling for Linux user mode. + */ + +#include +#include + +#define MALLOC(x) malloc(x) +#define FREE(x) free(x) + +static sal_sem_t _mpool_lock; +#define MPOOL_LOCK_INIT() _mpool_lock = sal_sem_create("mpool_lock", 1, 1) +#define MPOOL_LOCK() sal_sem_take(_mpool_lock, sal_sem_FOREVER) +#define MPOOL_UNLOCK() sal_sem_give(_mpool_lock) + +#endif /* __KERNEL__ */ + +/* Allow external override for system cache line size */ +#ifndef BCM_CACHE_LINE_BYTES +#ifdef L1_CACHE_BYTES +#define BCM_CACHE_LINE_BYTES L1_CACHE_BYTES +#else +#define BCM_CACHE_LINE_BYTES 128 /* Should be fine on most platforms */ +#endif +#endif + +typedef struct mpool_mem_s { + unsigned char *address; + int size; + struct mpool_mem_s *next; +} mpool_mem_t; + +/* + * Function: mpool_init + * + * Purpose: + * Initialize mpool lock. + * Parameters: + * None + * Returns: + * Always 0 + */ +int +mpool_init(void) +{ + MPOOL_LOCK_INIT(); + return 0; +} + +#ifdef TRACK_DMA_USAGE +static int _dma_mem_used = 0; +#endif + +/* + * Function: mpool_alloc + * + * Purpose: + * Allocate memory block from mpool. + * Parameters: + * pool - mpool handle (from mpool_create) + * size - size of memory block to allocate + * Returns: + * Pointer to allocated memory block or NULL if allocation fails. + */ +void * +mpool_alloc(mpool_handle_t pool, int size) +{ + mpool_mem_t *ptr = pool, *newptr = NULL; + int mod; + + MPOOL_LOCK(); + + mod = size & (BCM_CACHE_LINE_BYTES - 1); + if (mod != 0 ) { + size += (BCM_CACHE_LINE_BYTES - mod); + } + while (ptr && ptr->next) { + if (ptr->next->address - (ptr->address + ptr->size) >= size) { + break; + } + ptr = ptr->next; + } + + if (!(ptr && ptr->next)) { + MPOOL_UNLOCK(); + return NULL; + } + newptr = MALLOC(sizeof(mpool_mem_t)); + if (!newptr) { + MPOOL_UNLOCK(); + return NULL; + } + + newptr->address = ptr->address + ptr->size; + newptr->size = size; + newptr->next = ptr->next; + ptr->next = newptr; +#ifdef TRACK_DMA_USAGE + _dma_mem_used += size; +#endif + MPOOL_UNLOCK(); + + return newptr->address; +} + + +/* + * Function: mpool_free + * + * Purpose: + * Free memory block allocated from mpool.. + * Parameters: + * pool - mpool handle (from mpool_create) + * addr - address of memory block to free + * Returns: + * Nothing + */ +void +mpool_free(mpool_handle_t pool, void *addr) +{ + unsigned char *address = (unsigned char *)addr; + mpool_mem_t *ptr = pool, *prev = NULL; + + MPOOL_LOCK(); + + while (ptr && ptr->next) { + if (ptr->next->address == address) { +#ifdef TRACK_DMA_USAGE + _dma_mem_used -= ptr->next->size; +#endif + break; + } + ptr = ptr->next; + } + + if (ptr && ptr->next) { + prev = ptr; + ptr = ptr->next; + prev->next = ptr->next; + FREE(ptr); + } + + MPOOL_UNLOCK(); +} + +/* + * Function: mpool_create + * + * Purpose: + * Create and initialize mpool control structures. + * Parameters: + * base_ptr - pointer to mpool memory block + * size - total size of mpool memory block + * Returns: + * mpool handle + * Notes + * The mpool handle returned must be used for subsequent + * memory allocations from the mpool. + */ +mpool_handle_t +mpool_create(void *base_ptr, int size) +{ + mpool_mem_t *head, *tail; + int mod = (int)(((unsigned long)base_ptr) & (BCM_CACHE_LINE_BYTES - 1)); + + MPOOL_LOCK(); + + if (mod) { + base_ptr = (char*)base_ptr + (BCM_CACHE_LINE_BYTES - mod); + size -= (BCM_CACHE_LINE_BYTES - mod); + } + size &= ~(BCM_CACHE_LINE_BYTES - 1); + + + head = (mpool_mem_t *)MALLOC(sizeof(mpool_mem_t)); + if (head == NULL) { + return NULL; + } + tail = (mpool_mem_t *)MALLOC(sizeof(mpool_mem_t)); + if (tail == NULL) { + FREE(head); + return NULL; + } + + head->size = tail->size = 0; + head->address = base_ptr; + tail->address = head->address + size; + head->next = tail; + tail->next = NULL; + + MPOOL_UNLOCK(); + + return head; +} + +/* + * Function: mpool_destroy + * + * Purpose: + * Free mpool control structures. + * Parameters: + * pool - mpool handle (from mpool_create) + * Returns: + * Always 0 + */ +int +mpool_destroy(mpool_handle_t pool) +{ + mpool_mem_t *ptr, *next; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = next) { + next = ptr->next; + FREE(ptr); + } + + MPOOL_UNLOCK(); + + return 0; +} + +/* + * Function: mpool_usage + * + * Purpose: + * Report total sum of allocated mpool memory. + * Parameters: + * pool - mpool handle (from mpool_create) + * Returns: + * Number of bytes currently allocated using mpool_alloc. + */ +int +mpool_usage(mpool_handle_t pool) +{ + int usage = 0; + mpool_mem_t *ptr; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = ptr->next) { + usage += ptr->size; + } + + MPOOL_UNLOCK(); + + return usage; +} diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile new file mode 100644 index 00000000000..424f2fe24be --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile @@ -0,0 +1,70 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.1 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +LOCALDIR = systems/bde/linux/user/kernel + +# Make sure we build for the kernel if this is a user-mode build +ifneq ($(platform), ) +override-target=linux-$(platform) +endif + +include $(SDK)/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +ifneq ($(kernel_version),2_4) +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-user-bde +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +build: kernel_libs $(MODULE) $(KMODULE) +else +MODULE = $(LIBDIR)/linux-user-bde.o + +build: kernel_libs $(MODULE) +endif + +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../kernel/kernel_module/Module.symvers + +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ +ifneq ($(kernel_version),2_4) +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko +endif + +kernel_libs: + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared + +include $(SDK)/make/Make.depend + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +clean:: + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared $@ + $(RM) $(BOBJS) $(MODULE) + +.PHONY: build kernel_libs diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c new file mode 100644 index 00000000000..6c7c9bb9505 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c @@ -0,0 +1,1604 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: linux-user-bde.c,v 1.80 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + * + * Linux User BDE Helper Module + */ +#include +#include +#include + +#include +#include +#include + +#include "linux-user-bde.h" + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0) +#include +#endif +#ifdef KEYSTONE +#include +#endif + + +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("User BDE Helper Module"); +MODULE_LICENSE("GPL"); + +/* CMIC/CMICe defines */ +#define CMIC_IRQ_STAT 0x00000144 +#define CMIC_IRQ_MASK 0x00000148 +#define CMIC_IRQ_MASK_1 0x0000006C +#define CMIC_IRQ_MASK_2 0x00000070 + +/* CMICm defines */ +#define CMIC_CMCx_IRQ_STAT0_OFFSET(x) (0x31400 + (0x1000 * x)) +#define CMIC_CMCx_IRQ_STAT1_OFFSET(x) (0x31404 + (0x1000 * x)) +#define CMIC_CMCx_IRQ_STAT2_OFFSET(x) (0x31408 + (0x1000 * x)) +#define CMIC_CMCx_IRQ_STAT3_OFFSET(x) (0x3140c + (0x1000 * x)) +#define CMIC_CMCx_IRQ_STAT4_OFFSET(x) (0x31410 + (0x1000 * x)) + +#define CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(x) (0x31414 + (0x1000 * x)) +#define CMIC_CMCx_PCIE_IRQ_MASK1_OFFSET(x) (0x31418 + (0x1000 * x)) +#define CMIC_CMCx_PCIE_IRQ_MASK2_OFFSET(x) (0x3141c + (0x1000 * x)) +#define CMIC_CMCx_PCIE_IRQ_MASK3_OFFSET(x) (0x31420 + (0x1000 * x)) +#define CMIC_CMCx_PCIE_IRQ_MASK4_OFFSET(x) (0x31424 + (0x1000 * x)) + +/* CMICd defines */ +#define CMIC_CMCx_IRQ_STAT5_OFFSET(x) (0x314b0 + (0x1000 * x)) +#define CMIC_CMCx_IRQ_STAT6_OFFSET(x) (0x314b4 + (0x1000 * x)) +#define CMIC_CMCx_PCIE_IRQ_MASK5_OFFSET(x) (0x314b8 + (0x1000 * x)) +#define CMIC_CMCx_PCIE_IRQ_MASK6_OFFSET(x) (0x314bc + (0x1000 * x)) +#define CMIC_CMCx_UC0_IRQ_MASK5_OFFSET(x) (0x314c0 + (0x1000 * x)) +#define CMIC_CMCx_UC0_IRQ_MASK6_OFFSET(x) (0x314c4 + (0x1000 * x)) + +#define CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(x) (0x31428 + (0x1000 * x)) +#define CMIC_CMCx_UC0_IRQ_MASK1_OFFSET(x) (0x3142c + (0x1000 * x)) +#define CMIC_CMCx_UC0_IRQ_MASK2_OFFSET(x) (0x31430 + (0x1000 * x)) +#define CMIC_CMCx_UC0_IRQ_MASK3_OFFSET(x) (0x31434 + (0x1000 * x)) +#define CMIC_CMCx_UC0_IRQ_MASK4_OFFSET(x) (0x31438 + (0x1000 * x)) + +/* CMICX defines */ +#define INTC_INTR_REG_NUM (8) + +/* +TODO:HX5 +The INTR base address values are changed for HX5, +hence making new #defines so runtime decisions can +be made. +*/ + +#define INTC_INTR_ENABLE_REG0 (0x180130f0) +#define INTC_INTR_STATUS_REG0 (0x18013190) +#define INTC_INTR_RAW_STATUS_REG0 (0x18013140) + +#define INTC_INTR_ENABLE_BASE (INTC_INTR_ENABLE_REG0) +#define INTC_INTR_STATUS_BASE (INTC_INTR_STATUS_REG0) +#define INTC_INTR_RAW_STATUS_BASE (INTC_INTR_RAW_STATUS_REG0) + +#define HX5_INTC_INTR_ENABLE_REG0 (0x102310f0) +#define HX5_INTC_INTR_STATUS_REG0 (0x10231190) +#define HX5_INTC_INTR_RAW_STATUS_REG0 (0x10231140) + +#define HX5_INTC_INTR_ENABLE_BASE (HX5_INTC_INTR_ENABLE_REG0) +#define HX5_INTC_INTR_STATUS_BASE (HX5_INTC_INTR_STATUS_REG0) +#define HX5_INTC_INTR_RAW_STATUS_BASE (HX5_INTC_INTR_RAW_STATUS_REG0) + +#define IOREMAP(addr, size) ioremap_nocache(addr, size) + +#define HX5_IHOST_GICD_ISENABLERN_0 (0x10781100) +#define HX5_IHOST_GICD_ISENABLERN_1 (0x10781104) +#define HX5_IHOST_GICD_ICENABLERN_1 (0x10781184) +#define HX5_IHOST_GICD_ICENABLERN_8 (0x107811a0) +/* Offset between ISENABLERN_1 and ICENABLERN_1 in 4-bytes */ +#define HX5_IHOST_IRQ_MASK_OFFSET 0x20 +#define HX5_IHOST_INTR_MAP_NUM (HX5_IHOST_GICD_ICENABLERN_8 - HX5_IHOST_GICD_ISENABLERN_0) +#define HX5_IHOST_INTR_STATUS_MAP_NUM (INTC_INTR_REG_NUM * (sizeof(uint32))) +#define IRQ_BIT(intr) (intr % (sizeof(uint32)*8)) +#define IRQ_MASK_INDEX(intr) (intr / (sizeof(uint32)*8)) +#define HX5_CHIP_INTR_LOW_PRIORITY 119 +#define INTR_LOW_PRIORITY_BITPOS (1 << IRQ_BIT(HX5_CHIP_INTR_LOW_PRIORITY)) +#define INTC_LOW_PRIORITY_INTR_REG_IND IRQ_MASK_INDEX(HX5_CHIP_INTR_LOW_PRIORITY) +#define INTC_PDMA_INTR_REG_IND 4 + +#define READ_INTC_INTR(d, reg, v) \ + (v = user_bde->iproc_read(d, reg)) +#define WRITE_INTC_INTR(d, reg, v) \ + (user_bde->iproc_write(d, reg, v)) + +#define IHOST_READ_INTR(d, reg, v) \ + (v = readl((reg))) +#define IHOST_WRITE_INTR(d, reg, v) \ + (writel((v), (reg))) + +/* Allow override of default CMICm CMC */ +#ifndef BDE_CMICM_PCIE_CMC +#define BDE_CMICM_PCIE_CMC 0 +#endif + +/* Allow override of default CMICm CMC */ +#ifndef BDE_CMICD_PCIE_CMC +#define BDE_CMICD_PCIE_CMC 0 +#endif + +/* Defines used to distinguish CMICe from CMICm */ +#define CMICE_DEV_REV_ID (0x178 / sizeof(uint32)) + +static uint32 *ihost_intr_status_base = NULL; +static uint32 *ihost_intr_enable_base = NULL; + +static ibde_t *user_bde = NULL; + +typedef void (*isr_f)(void *); + +typedef struct bde_ctrl_s { + uint32 dev_type; + int irq; + int enabled; + int devid; + isr_f isr; + uint32 *ba; + int inst; /* associate to _bde_inst_resource[] */ +} bde_ctrl_t; + +#define VALID_DEVICE(_n) (_n < LINUX_BDE_MAX_DEVICES) + +static bde_ctrl_t _devices[LINUX_BDE_MAX_DEVICES]; + +static wait_queue_head_t _ether_interrupt_wq; +static atomic_t _ether_interrupt_has_taken_place = ATOMIC_INIT(0); + +/* + * Multiple instance resource data structure. + * To keep the DMA resource per instance. + * And track the DMA pool usage. + */ +static int _bde_multi_inst = 0; + +typedef struct { + unsigned int inst_id; + unsigned int dma_offset; + unsigned int dma_size; + wait_queue_head_t intr_wq; + atomic_t intr; +} bde_inst_resource_t; + +static bde_inst_resource_t _bde_inst_resource[LINUX_BDE_MAX_DEVICES]; + +typedef struct { + phys_addr_t cpu_pbase; /* CPU physical base address of the DMA pool */ + phys_addr_t dma_pbase; /* Bus base address of the DMA pool */ + uint32 total_size; /* Total size of the pool in MB */ + uint32 offset; /* Current offset of the pool in MB */ +}_dma_pool_t; + +static _dma_pool_t _dma_pool; + +#define ONE_MB (1024 * 1024) + +#ifdef KEYSTONE +/* + * Enforce PCIE transaction ordering. Commit the write transaction. + */ + +#define SSOC_WRITEL(val, addr) \ + do { \ + writel((val), (addr)); \ + __asm__ __volatile__("sync"); \ + } while(0) + +#else + +#define SSOC_WRITEL(val, addr) \ + writel((val), (addr)) + +#endif +/* + * Function: _interrupt + * + * Purpose: + * Interrupt Handler. + * Mask all interrupts on device and wake up interrupt + * thread. It is assumed that the interrupt thread unmasks + * interrupts again when interrupt handling is complete. + * Parameters: + * ctrl - BDE control structure for this device. + * Returns: + * Nothing + */ +static void +_cmic_interrupt(bde_ctrl_t *ctrl) +{ + int d; + uint32_t mask = 0, stat, imask = 0, fmask = 0; + bde_inst_resource_t *res; + + d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t)); + res = &_bde_inst_resource[ctrl->inst]; + + /* Check for secondary interrupt handler */ + if (lkbde_irq_mask_get(d, &mask, &fmask) < 0) { + fmask = 0; + } + + if (fmask != 0) { + imask = mask & ~fmask; + /* Check for pending user mode interrupts */ + stat = user_bde->read(d, CMIC_IRQ_STAT); + if ((stat & imask) == 0) { + /* All handled in kernel mode */ + lkbde_irq_mask_set(d, CMIC_IRQ_MASK, imask, 0); + return; + } + } + + lkbde_irq_mask_set(d, CMIC_IRQ_MASK, 0, 0); + + atomic_set(&res->intr, 1); + +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +static void +_cmicx_interrupt(bde_ctrl_t *ctrl) +{ + int d, ind; + uint32 stat, iena, mask, fmask; + bde_inst_resource_t *res; + uint32 intc_intr_status_base = 0, intc_intr_enable_base = 0; + + d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t)); + res = &_bde_inst_resource[ctrl->inst]; + + lkbde_irq_mask_get(d, &mask, &fmask); + + if ((ctrl->dev_type & BDE_SWITCH_DEV_TYPE) && + ((user_bde->get_dev(d)->device == BCM56370_DEVICE_ID) || + (user_bde->get_dev(d)->device == BCM56371_DEVICE_ID) || + (user_bde->get_dev(d)->device == BCM56372_DEVICE_ID) || + (user_bde->get_dev(d)->device == BCM56374_DEVICE_ID) || + (user_bde->get_dev(d)->device == BCM56375_DEVICE_ID) || + (user_bde->get_dev(d)->device == BCM56376_DEVICE_ID) || + (user_bde->get_dev(d)->device == BCM56377_DEVICE_ID) || + (user_bde->get_dev(d)->device == BCM56577_DEVICE_ID) || + (user_bde->get_dev(d)->device == BCM56578_DEVICE_ID) || + (user_bde->get_dev(d)->device == BCM56579_DEVICE_ID))) { + intc_intr_status_base = HX5_INTC_INTR_STATUS_BASE; + intc_intr_enable_base = HX5_INTC_INTR_ENABLE_BASE; + } else { + intc_intr_status_base = INTC_INTR_STATUS_BASE; + intc_intr_enable_base = INTC_INTR_ENABLE_BASE; + } + if (fmask) { + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + IHOST_READ_INTR(d, ihost_intr_status_base + INTC_PDMA_INTR_REG_IND, stat); + IHOST_READ_INTR(d, ihost_intr_enable_base + INTC_PDMA_INTR_REG_IND, iena); + } else { + READ_INTC_INTR(d, intc_intr_status_base + 4 * INTC_PDMA_INTR_REG_IND, stat); + READ_INTC_INTR(d, intc_intr_enable_base + 4 * INTC_PDMA_INTR_REG_IND, iena); + } + if (stat & iena) { + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + IHOST_WRITE_INTR(d, ihost_intr_enable_base + INTC_PDMA_INTR_REG_IND + + HX5_IHOST_IRQ_MASK_OFFSET, ~0); + } else { + WRITE_INTC_INTR(d, intc_intr_enable_base + 4 * INTC_PDMA_INTR_REG_IND, 0); + } + + for (ind = 0; ind < INTC_INTR_REG_NUM; ind++) { + if (ind == INTC_PDMA_INTR_REG_IND) { + continue; + } + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + if (ind < INTC_LOW_PRIORITY_INTR_REG_IND) { + continue; + } + IHOST_READ_INTR(d, ihost_intr_status_base + ind, stat); + IHOST_READ_INTR(d, ihost_intr_enable_base + ind, iena); + if (ind == INTC_LOW_PRIORITY_INTR_REG_IND) { + stat &= INTR_LOW_PRIORITY_BITPOS; + } + } else { + READ_INTC_INTR(d, intc_intr_status_base + 4 * ind, stat); + READ_INTC_INTR(d, intc_intr_enable_base + 4 * ind, iena); + } + if (stat & iena) { + break; + } + } + + if (ind >= INTC_INTR_REG_NUM) { + return; + } + } + } + + /* Disable all interrupts.. Re-enable unserviced interrupts later + * So as to avoid getting new interrupts until the user level driver + * enumerates the interrupts to be serviced + */ + for (ind = 0; ind < INTC_INTR_REG_NUM; ind++) { + if (fmask && ind == INTC_PDMA_INTR_REG_IND) { + continue; + } + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + if (ind < INTC_LOW_PRIORITY_INTR_REG_IND) { + continue; + } + if (ind == INTC_LOW_PRIORITY_INTR_REG_IND) { + IHOST_WRITE_INTR(d, ihost_intr_enable_base + INTC_LOW_PRIORITY_INTR_REG_IND + + HX5_IHOST_IRQ_MASK_OFFSET, INTR_LOW_PRIORITY_BITPOS); + } else { + IHOST_WRITE_INTR(d, ihost_intr_enable_base + ind + + HX5_IHOST_IRQ_MASK_OFFSET, ~0); + } + } else { + WRITE_INTC_INTR(d, intc_intr_enable_base + 4*ind, 0); + } + } + + /* Notify */ + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +static void +_cmicm_interrupt(bde_ctrl_t *ctrl) +{ + int d; + int cmc = BDE_CMICM_PCIE_CMC; + uint32 stat, mask = 0, fmask = 0, imask = 0; + bde_inst_resource_t *res; + + d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t)); + res = &_bde_inst_resource[ctrl->inst]; + + lkbde_irq_mask_get(d, &mask, &fmask); + + while (fmask) { + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT0_OFFSET(cmc)); + imask = mask & ~fmask; + if (stat & imask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT1_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK1_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK1_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT2_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK2_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK2_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT3_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK3_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK3_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT4_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK4_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK4_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + return; + } + + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + lkbde_irq_mask_set(d, CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(cmc), 0, 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK1_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK2_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK3_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK4_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(1), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(2), 0); + } + else { + lkbde_irq_mask_set(d, CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(cmc), 0, 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK1_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK2_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK3_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK4_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(1), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(2), 0); + } + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +/* some device has cmc0 only */ +static void +_cmicd_cmc0_interrupt(bde_ctrl_t *ctrl) +{ + int d; + int cmc = 0; + uint32 stat, mask = 0, fmask = 0, imask = 0; + bde_inst_resource_t *res; + + d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t)); + res = &_bde_inst_resource[ctrl->inst]; + lkbde_irq_mask_get(d, &mask, &fmask); + + while (fmask) { + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT0_OFFSET(cmc)); + imask = mask & ~fmask; + if (stat & imask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT1_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK1_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK1_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT2_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK2_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK2_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT3_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK3_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK3_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT4_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK4_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK4_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT5_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK5_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK5_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT6_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK6_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK6_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + return; + } + + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + lkbde_irq_mask_set(d, CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(cmc), 0, 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK1_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK2_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK3_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK4_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK5_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK6_OFFSET(cmc), 0); + } else { + lkbde_irq_mask_set(d, CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(cmc), 0, 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK1_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK2_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK3_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK4_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK5_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK6_OFFSET(cmc), 0); + } + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +static void +_cmicd_interrupt(bde_ctrl_t *ctrl) +{ + int d; + int cmc = BDE_CMICD_PCIE_CMC; + uint32 stat, mask = 0, fmask = 0, imask = 0; + bde_inst_resource_t *res; + + d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t)); + res = &_bde_inst_resource[ctrl->inst]; + lkbde_irq_mask_get(d, &mask, &fmask); + + while (fmask) { + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT0_OFFSET(cmc)); + imask = mask & ~fmask; + if (stat & imask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT1_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK1_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK1_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT2_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK2_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK2_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT3_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK3_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK3_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT4_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK4_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK4_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT5_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK5_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK5_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + stat = user_bde->read(d, CMIC_CMCx_IRQ_STAT6_OFFSET(cmc)); + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + mask = user_bde->read(d, CMIC_CMCx_UC0_IRQ_MASK6_OFFSET(cmc)); + } else { + mask = user_bde->read(d, CMIC_CMCx_PCIE_IRQ_MASK6_OFFSET(cmc)); + } + if (stat & mask) { + break; + } + return; + } + + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + lkbde_irq_mask_set(d, CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(cmc), 0, 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK1_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK2_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK3_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK4_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK5_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK6_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(1), 0); + user_bde->write(d, CMIC_CMCx_UC0_IRQ_MASK0_OFFSET(2), 0); + } else { + lkbde_irq_mask_set(d, CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(cmc), 0, 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK1_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK2_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK3_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK4_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK5_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK6_OFFSET(cmc), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(1), 0); + user_bde->write(d, CMIC_CMCx_PCIE_IRQ_MASK0_OFFSET(2), 0); + } + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +static void +_bcm88750_interrupt(bde_ctrl_t *ctrl) +{ + int d; + bde_inst_resource_t *res; + + d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t)); + res = &_bde_inst_resource[ctrl->inst]; + lkbde_irq_mask_set(d, CMIC_IRQ_MASK, 0, 0); + + lkbde_irq_mask_set(d, CMIC_IRQ_MASK_1, 0, 0); + lkbde_irq_mask_set(d, CMIC_IRQ_MASK_2, 0, 0); + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +static void +_qe2k_interrupt(bde_ctrl_t *ctrl) +{ + bde_inst_resource_t *res; + + res = &_bde_inst_resource[ctrl->inst]; + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x20/sizeof(uint32)); + + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +static void +_fe2k_interrupt(bde_ctrl_t *ctrl) +{ + bde_inst_resource_t *res; + + res = &_bde_inst_resource[ctrl->inst]; + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x18/sizeof(uint32)); /* PC_INTERRUPT_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x24/sizeof(uint32)); /* PC_ERROR0_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x2c/sizeof(uint32)); /* PC_ERROR1_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x34/sizeof(uint32)); /* PC_UNIT_MASK */ + + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +static void +_fe2kxt_interrupt(bde_ctrl_t *ctrl) +{ + bde_inst_resource_t *res; + + res = &_bde_inst_resource[ctrl->inst]; + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x2c/sizeof(uint32)); /* PC_INTERRUPT_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x38/sizeof(uint32)); /* PC_ERROR0_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x40/sizeof(uint32)); /* PC_ERROR1_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x50/sizeof(uint32)); /* PC_UNIT_MASK */ + + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + +static void +_bme3200_interrupt(bde_ctrl_t *ctrl) +{ + bde_inst_resource_t *res; + + res = &_bde_inst_resource[ctrl->inst]; + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x54/sizeof(uint32)); /* PI_PT_ERROR0 */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x5c/sizeof(uint32)); /* PI_PT_ERROR1 */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x64/sizeof(uint32)); /* PI_PT_ERROR2 */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x6c/sizeof(uint32)); /* PI_PT_ERROR3 */ + + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + + +static void +_bm9600_interrupt(bde_ctrl_t *ctrl) +{ + bde_inst_resource_t *res; + + res = &_bde_inst_resource[ctrl->inst]; + + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x5c/sizeof(uint32)); /* PI_INTERRUPT_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0xc/sizeof(uint32)); /* PI_UNIT_INTERRUPT0_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x14/sizeof(uint32)); /* PI_UNIT_INTERRUPT1_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x1c/sizeof(uint32)); /* PI_UNIT_INTERRUPT2_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x24/sizeof(uint32)); /* PI_UNIT_INTERRUPT3_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x2c/sizeof(uint32)); /* PI_UNIT_INTERRUPT4_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x34/sizeof(uint32)); /* PI_UNIT_INTERRUPT5_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x3c/sizeof(uint32)); /* PI_UNIT_INTERRUPT6_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x44/sizeof(uint32)); /* PI_UNIT_INTERRUPT7_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x4c/sizeof(uint32)); /* PI_UNIT_INTERRUPT8_MASK */ + SSOC_WRITEL(0xffffffff, ctrl->ba + 0x54/sizeof(uint32)); /* PI_UNIT_INTERRUPT9_MASK */ + + atomic_set(&res->intr, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&res->intr_wq); +#else + wake_up_interruptible(&res->intr_wq); +#endif +} + + + +/* The actual interrupt handler of ethernet devices */ +static void +_ether_interrupt(bde_ctrl_t *ctrl) +{ +#ifdef KEYSTONE + /* + * Since the two GMAC cores are sharing the same IRQ. + * Add the checking to handle the interrupt events. + */ + if ((ctrl->devid == BCM53000_GMAC_ID)) { + if ((readl(ctrl->ba + 0x020/4) & readl(ctrl->ba + 0x024/4)) == 0) { + return; + } + } +#endif + SSOC_WRITEL(0, ctrl->ba + 0x024/4); + + atomic_set(&_ether_interrupt_has_taken_place, 1); +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wake_up(&_ether_interrupt_wq); +#else + wake_up_interruptible(&_ether_interrupt_wq); +#endif +} + + +static struct _intr_mode_s { + isr_f isr; + const char *name; +} _intr_mode[] = { + { (isr_f)_cmic_interrupt, "CMIC/CMICe" }, + { (isr_f)_cmicm_interrupt, "CMICm" }, + { (isr_f)_cmicd_interrupt, "CMICd" }, + { (isr_f)_cmicd_cmc0_interrupt, "CMICd CMC0" }, + { (isr_f)_qe2k_interrupt, "QE2K" }, + { (isr_f)_fe2k_interrupt, "FE2K" }, + { (isr_f)_fe2kxt_interrupt, "FE2KXT" }, + { (isr_f)_bme3200_interrupt, "BME3200" }, + { (isr_f)_bm9600_interrupt, "BM9600" }, + { (isr_f)_bcm88750_interrupt, "BCM88750" }, + { (isr_f)_cmicx_interrupt, "CMICx" }, + { NULL, NULL } +}; + +static const char * +_intr_mode_str(void *isr) +{ + int imx; + + imx = 0; + while (_intr_mode[imx].isr != NULL) { + if (isr == _intr_mode[imx].isr) { + return _intr_mode[imx].name; + } + imx++; + } + return NULL; +} + +static void +_devices_init(int d) +{ + bde_ctrl_t *ctrl; + uint32 ver; + uint16 device_id_mask = 0xFFF0; + uint16 device_id; + int state = 0; + + (void)lkbde_dev_state_get(d, &state); + if (state == BDE_DEV_STATE_REMOVED) { + return; + } + + ctrl = &_devices[d]; + /* Initialize our control info */ + ctrl->dev_type = user_bde->get_dev_type(d); + ctrl->devid = user_bde->get_dev(d)->device; + ctrl->inst = 0; + + if (BDE_DEV_MEM_MAPPED(ctrl->dev_type)) { + ctrl->enabled = 0; + ctrl->ba = lkbde_get_dev_virt(d); + } + if (ctrl->dev_type & BDE_SWITCH_DEV_TYPE) { + switch (user_bde->get_dev(d)->device) { + case QE2000_DEVICE_ID: + ctrl->isr = (isr_f)_qe2k_interrupt; + break; + case BCM88020_DEVICE_ID: + ctrl->isr = (isr_f)_fe2k_interrupt; + break; + case BCM88025_DEVICE_ID: + ctrl->isr = (isr_f)_fe2kxt_interrupt; + break; + case BME3200_DEVICE_ID: + ctrl->isr = (isr_f)_bme3200_interrupt; + break; + case BM9600_DEVICE_ID: + ctrl->isr = (isr_f)_bm9600_interrupt; + break; + case BCM88750_DEVICE_ID: + case BCM88753_DEVICE_ID: + case BCM88754_DEVICE_ID: + case BCM88755_DEVICE_ID: + case BCM88752_DEVICE_ID: + ctrl->isr = (isr_f)_bcm88750_interrupt; + break; + case BCM53540_DEVICE_ID: + case BCM53547_DEVICE_ID: + case BCM53548_DEVICE_ID: + case BCM53549_DEVICE_ID: + case BCM88670_DEVICE_ID: + case BCM88671_DEVICE_ID: + case BCM88671M_DEVICE_ID: + case BCM88672_DEVICE_ID: + case BCM88673_DEVICE_ID: + case BCM88674_DEVICE_ID: + case BCM88675_DEVICE_ID: + case BCM88675M_DEVICE_ID: + case BCM88676_DEVICE_ID: + case BCM88676M_DEVICE_ID: + case BCM88677_DEVICE_ID: + case BCM88678_DEVICE_ID: + case BCM88679_DEVICE_ID: + case BCM88370_DEVICE_ID: + case BCM88371_DEVICE_ID: + case BCM88371M_DEVICE_ID: + case BCM88375_DEVICE_ID: + case BCM88376_DEVICE_ID: + case BCM88376M_DEVICE_ID: + case BCM88377_DEVICE_ID: + case BCM88378_DEVICE_ID: + case BCM88379_DEVICE_ID: + case BCM88681_DEVICE_ID: + case BCM88682_DEVICE_ID: + case BCM88683_DEVICE_ID: + case BCM88684_DEVICE_ID: + case BCM88685_DEVICE_ID: + case BCM88380_DEVICE_ID: + case BCM88381_DEVICE_ID: + case BCM88680_DEVICE_ID: + case BCM88690_DEVICE_ID: + case BCM88770_DEVICE_ID: + case BCM88773_DEVICE_ID: + case BCM88774_DEVICE_ID: + case BCM88775_DEVICE_ID: + case BCM88776_DEVICE_ID: + case BCM88777_DEVICE_ID: + case BCM88470_DEVICE_ID: + case BCM88470P_DEVICE_ID: + case BCM88471_DEVICE_ID: + case BCM88473_DEVICE_ID: + case BCM88474_DEVICE_ID: + case BCM88474H_DEVICE_ID: + case BCM88476_DEVICE_ID: + case BCM88477_DEVICE_ID: + case BCM88270_DEVICE_ID: + case BCM88272_DEVICE_ID: + case BCM88273_DEVICE_ID: + case BCM88278_DEVICE_ID: + case BCM88279_DEVICE_ID: + case BCM8206_DEVICE_ID: + case BCM88950_DEVICE_ID: + case BCM88953_DEVICE_ID: + case BCM88954_DEVICE_ID: + case BCM88955_DEVICE_ID: + case BCM88956_DEVICE_ID: + case BCM88772_DEVICE_ID: + case BCM88952_DEVICE_ID: + ctrl->isr = (isr_f)_cmicd_cmc0_interrupt; + break; + case BCM88790_DEVICE_ID: + ctrl->isr = (isr_f)_cmicx_interrupt; + break; + case BCM56370_DEVICE_ID: + case BCM56371_DEVICE_ID: + case BCM56372_DEVICE_ID: + case BCM56374_DEVICE_ID: + case BCM56375_DEVICE_ID: + case BCM56376_DEVICE_ID: + case BCM56377_DEVICE_ID: + case BCM56577_DEVICE_ID: + case BCM56578_DEVICE_ID: + case BCM56579_DEVICE_ID: + ctrl->isr = (isr_f)_cmicx_interrupt; + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + if (!ihost_intr_enable_base) { + ihost_intr_enable_base = (uint32_t *)IOREMAP(HX5_IHOST_GICD_ISENABLERN_1, + HX5_IHOST_INTR_MAP_NUM); + } + if (!ihost_intr_status_base) { + ihost_intr_status_base = (uint32_t *)IOREMAP(HX5_INTC_INTR_RAW_STATUS_REG0, + HX5_IHOST_INTR_STATUS_MAP_NUM); + } + } + break; + default: + /* Get CMIC version */ + if (user_bde->get_cmic_ver(d, &ver) != 0) { + ver = -1; + } + device_id = ctrl->devid & device_id_mask; + /* TH/TH+/TH2 should use cmicd interrupt handler */ + if (BCM56960_DEVICE_ID == device_id || + BCM56930_DEVICE_ID == device_id || + BCM56970_DEVICE_ID == device_id) { + ctrl->isr = (isr_f)_cmicd_interrupt; + } + /* check if version is CMICX */ + else if (ver == 0x04) { + ctrl->isr = (isr_f)_cmicx_interrupt; + } else { + ctrl->isr = (isr_f)_cmic_interrupt; + if ((ctrl->dev_type & BDE_256K_REG_SPACE) && +#ifdef BCM_PETRA_SUPPORT /* FIXME remove code when hardware design is fixed */ + ctrl->devid != 0x1234 && +#endif + readl(ctrl->ba + CMICE_DEV_REV_ID) == 0) { + ctrl->isr = (isr_f)_cmicm_interrupt; + } + } + break; + } + /* All Ramon devices from 0x8790 to 0x879F */ + if ((user_bde->get_dev(d)->device & BCM88790_DEVICE_ID) == BCM88790_DEVICE_ID) { + ctrl->isr = (isr_f)_cmicx_interrupt; + } + if (_intr_mode_str(ctrl->isr) == NULL) { + gprintk("Warning: Unknown interrupt mode\n"); + } + } +} +/* + * Function: _init + * + * Purpose: + * Module initialization. + * Attaches to kernel BDE. + * Parameters: + * None + * Returns: + * Always 0 + */ +static int +_init(void) +{ + int i; + phys_addr_t cpu_pbase, dma_pbase; + ssize_t dmasize; + bde_inst_resource_t *res; + + /* Connect to the kernel bde */ + if ((linux_bde_create(NULL, &user_bde) < 0) || user_bde == NULL) { + return -ENODEV; + } + + init_waitqueue_head(&_ether_interrupt_wq); + + lkbde_get_dma_info(&cpu_pbase, &dma_pbase, &dmasize); + + memset(&_dma_pool, 0, sizeof(_dma_pool)); + _dma_pool.cpu_pbase = cpu_pbase; + _dma_pool.dma_pbase = dma_pbase; + _dma_pool.total_size = dmasize / ONE_MB; + + memset(_devices, 0, sizeof(_devices)); + + /* Use _bde_inst_resource[0] as the default resource */ + memset(_bde_inst_resource, 0, sizeof(_bde_inst_resource)); + res = &_bde_inst_resource[0]; + res->dma_offset = 0; + res->dma_size = _dma_pool.total_size; + init_waitqueue_head(&res->intr_wq); + atomic_set(&res->intr, 0); + + ihost_intr_enable_base = NULL; + ihost_intr_status_base = NULL; + + for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { + res->inst_id |= (1 << i); + _devices_init(i); + } + + return 0; +} + +/* + * Function: _cleanup + * + * Purpose: + * Module cleanup function. + * Parameters: + * None + * Returns: + * Always 0 + */ +static int +_cleanup(void) +{ + int i; + + if (user_bde) { + for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { + if (_devices[i].enabled && + BDE_DEV_MEM_MAPPED(_devices[i].dev_type)) { + user_bde->interrupt_disconnect(i); + } + lkbde_dev_instid_set(i, 0); + } + linux_bde_destroy(user_bde); + user_bde = NULL; + } + + if (ihost_intr_enable_base) { + iounmap(ihost_intr_enable_base); + ihost_intr_enable_base = NULL; + } + if (ihost_intr_status_base) { + iounmap(ihost_intr_status_base); + ihost_intr_status_base = NULL; + } + + return 0; +} + +/* + * Function: _pprint + * + * Purpose: + * Print proc filesystem information. + * Parameters: + * None + * Returns: + * Always 0 + */ +static int +_pprint(void) +{ + int idx; + const char *name; + bde_inst_resource_t *res; + uint32 state, instid; + + pprintf("Broadcom Device Enumerator (%s)\n", LINUX_USER_BDE_NAME); + for (idx = 0; idx < user_bde->num_devices(BDE_ALL_DEVICES); idx++) { + name = _intr_mode_str(_devices[idx].isr); + if (name == NULL) { + name = "unknown"; + } + pprintf("\t%d: Interrupt mode %s ",idx, name); + (void)lkbde_dev_state_get(idx, &state); + if (state == BDE_DEV_STATE_REMOVED) { + pprintf(" Device REMOVED ! \n"); + } else { + (void)lkbde_dev_instid_get(idx, &instid); + if (instid) { + pprintf("Inst id 0x%x\n",instid); + } else { + pprintf("\n"); + } + } + } + pprintf("Instance resource \n"); + + for (idx = 0; idx < user_bde->num_devices(BDE_ALL_DEVICES); idx++) { + res = &_bde_inst_resource[idx]; + if (res->inst_id) { + pprintf("\tDev mask 0x%x : " + "DMA offset %d size %d MB\n", + res->inst_id, + res->dma_offset, + res->dma_size); + } + } + + return 0; +} + +/* + * Allocate the DMA resource from DMA pool + * Parameter : + * dma_size (IN): allocate dma_size in MB + * dma_offset (OUT): dma offset in MB + */ +static int +_dma_resource_alloc(unsigned int dma_size, unsigned int *dma_offset) +{ + uint32 left; + + left = _dma_pool.total_size - _dma_pool.offset; + if (dma_size > left) { + gprintk("ERROR: Run out the dma resource!\n"); + return -1; + } + *dma_offset = _dma_pool.offset; + _dma_pool.offset += dma_size; + return 0; +} + +static int +_dma_resource_get(int inst_id, phys_addr_t *cpu_pbase, phys_addr_t *dma_pbase, ssize_t* size) +{ + int i; + unsigned int dma_size = 0, dma_offset = 0; + bde_inst_resource_t *res; + + for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { + res = &_bde_inst_resource[i]; + if (res->inst_id == inst_id) { + dma_size = res->dma_size; + dma_offset = res->dma_offset; + break; + } + } + + *cpu_pbase = _dma_pool.cpu_pbase + dma_offset * ONE_MB; + *dma_pbase = _dma_pool.dma_pbase + dma_offset * ONE_MB; + *size = dma_size * ONE_MB; + + return 0; +} + +static int +_instance_validate(unsigned int inst_id, unsigned int dmasize) +{ + int i; + bde_inst_resource_t *res; + + for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { + res = &_bde_inst_resource[i]; + if (res->inst_id == inst_id) { + if (res->dma_size != dmasize) { + if(_devices[i].inst == 0){ + /* Skip _instance_validate (not init yet) */ + return LUBDE_SUCCESS; + } + gprintk("ERROR: dma_size mismatch\n"); + return LUBDE_FAIL; + } + return (1); + } + } + return LUBDE_SUCCESS; +} + +static int +_device_reprobe(void) +{ + int i; + + for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { + if (_devices[i].devid == 0) { + _devices_init(i); + } + } + return 0; +} + +static int +_instance_attach(unsigned int inst_id, unsigned int dma_size) +{ + unsigned int dma_offset; + int i, exist; + bde_inst_resource_t *res; + int inst_idx = -1; + uint32 instid; + + /* Reprobe the system for hot-plugged device */ + _device_reprobe(); + + /* Validate the resource with inst_id */ + exist = _instance_validate(inst_id, dma_size); + if (exist < 0) { + return LUBDE_FAIL; + } + if (exist > 0) { + return LUBDE_SUCCESS; + } + if (_dma_resource_alloc(dma_size, &dma_offset) < 0) { + return LUBDE_FAIL; + } + for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { + res = &_bde_inst_resource[i]; + if ((_bde_multi_inst == 0) || (res->inst_id == 0)) { + res->inst_id = inst_id; + res->dma_offset = dma_offset; + res->dma_size = dma_size; + _bde_multi_inst++; + inst_idx = i; + init_waitqueue_head(&res->intr_wq); + atomic_set(&res->intr, 0); + break; + } + } + + for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { + if (inst_id & (1 << i)) { + _devices[i].inst = inst_idx; + /* Pass the instid to the kernel BDE */ + if (lkbde_dev_instid_get(i, &instid) == 0) { + if (!instid) { + lkbde_dev_instid_set(i, inst_id); + } + } + } + } + + return LUBDE_SUCCESS; +} + +/* + * Function: _ioctl + * + * Purpose: + * Handle IOCTL commands from user mode. + * Parameters: + * cmd - IOCTL cmd + * arg - IOCTL parameters + * Returns: + * 0 on success, <0 on error + */ +static int +_ioctl(unsigned int cmd, unsigned long arg) +{ + lubde_ioctl_t io; + phys_addr_t cpu_pbase, dma_pbase; + ssize_t size; + const ibde_dev_t *bde_dev; + int inst_id; + bde_inst_resource_t *res; + uint32_t *mapaddr; + + if (copy_from_user(&io, (void *)arg, sizeof(io))) { + return -EFAULT; + } + + io.rc = LUBDE_SUCCESS; + + switch(cmd) { + case LUBDE_VERSION: + io.d0 = KBDE_VERSION; + break; + case LUBDE_GET_NUM_DEVICES: + io.d0 = user_bde->num_devices(io.dev); + break; + case LUBDE_GET_DEVICE: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + bde_dev = user_bde->get_dev(io.dev); + if (bde_dev) { + io.d0 = bde_dev->device; + io.d1 = bde_dev->rev; + if (BDE_DEV_MEM_MAPPED(_devices[io.dev].dev_type)) { + /* Get physical address to map */ + io.d2 = lkbde_get_dev_phys(io.dev); + io.d3 = lkbde_get_dev_phys_hi(io.dev); + } + } else { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_GET_DEVICE_TYPE: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + io.d0 = _devices[io.dev].dev_type; + break; + case LUBDE_GET_BUS_FEATURES: + user_bde->pci_bus_features(io.dev, (int *) &io.d0, (int *) &io.d1, + (int *) &io.d2); + break; + case LUBDE_PCI_CONFIG_PUT32: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + if (_devices[io.dev].dev_type & BDE_PCI_DEV_TYPE) { + user_bde->pci_conf_write(io.dev, io.d0, io.d1); + } else { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_PCI_CONFIG_GET32: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + if (_devices[io.dev].dev_type & BDE_PCI_DEV_TYPE) { + io.d0 = user_bde->pci_conf_read(io.dev, io.d0); + } else { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_GET_DMA_INFO: + inst_id = io.dev; + if (_bde_multi_inst){ + _dma_resource_get(inst_id, &cpu_pbase, &dma_pbase, &size); + } else { + lkbde_get_dma_info(&cpu_pbase, &dma_pbase, &size); + } + io.d0 = dma_pbase; + io.d1 = size; + /* Optionally enable DMA mmap via /dev/linux-kernel-bde */ + io.d2 = USE_LINUX_BDE_MMAP; + /* Get physical address for mmap */ + io.dx.dw[0] = cpu_pbase; +#ifdef PHYS_ADDRS_ARE_64BITS + io.dx.dw[1] = cpu_pbase >> 32; +#else + io.dx.dw[1] = 0; +#endif + break; + case LUBDE_ENABLE_INTERRUPTS: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + if (_devices[io.dev].dev_type & BDE_SWITCH_DEV_TYPE) { + if (_devices[io.dev].isr && !_devices[io.dev].enabled) { + user_bde->interrupt_connect(io.dev, + _devices[io.dev].isr, + _devices+io.dev); + _devices[io.dev].enabled = 1; + } + } else { + /* Process ethernet device interrupt */ + /* FIXME: for multiple chips */ + if (!_devices[io.dev].enabled) { + user_bde->interrupt_connect(io.dev, + (void(*)(void *))_ether_interrupt, + _devices+io.dev); + _devices[io.dev].enabled = 1; + } + } + break; + case LUBDE_DISABLE_INTERRUPTS: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + if (_devices[io.dev].enabled) { + user_bde->interrupt_disconnect(io.dev); + _devices[io.dev].enabled = 0; + } + break; + case LUBDE_WAIT_FOR_INTERRUPT: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + if (_devices[io.dev].dev_type & BDE_SWITCH_DEV_TYPE) { + res = &_bde_inst_resource[_devices[io.dev].inst]; +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wait_event_timeout(res->intr_wq, + atomic_read(&res->intr) != 0, 100); + +#else + wait_event_interruptible(res->intr_wq, + atomic_read(&res->intr) != 0); +#endif + /* + * Even if we get multiple interrupts, we + * only run the interrupt handler once. + */ + atomic_set(&res->intr, 0); + } else { +#ifdef BDE_LINUX_NON_INTERRUPTIBLE + wait_event_timeout(_ether_interrupt_wq, + atomic_read(&_ether_interrupt_has_taken_place) != 0, 100); +#else + wait_event_interruptible(_ether_interrupt_wq, + atomic_read(&_ether_interrupt_has_taken_place) != 0); +#endif + /* + * Even if we get multiple interrupts, we + * only run the interrupt handler once. + */ + atomic_set(&_ether_interrupt_has_taken_place, 0); + } + break; + case LUBDE_USLEEP: + sal_usleep(io.d0); + break; + case LUBDE_UDELAY: + sal_udelay(io.d0); + break; + case LUBDE_SEM_OP: + switch (io.d0) { + case LUBDE_SEM_OP_CREATE: + io.p0 = (bde_kernel_addr_t)sal_sem_create("", io.d1, io.d2); + break; + case LUBDE_SEM_OP_DESTROY: + sal_sem_destroy((sal_sem_t)io.p0); + break; + case LUBDE_SEM_OP_TAKE: + io.rc = sal_sem_take((sal_sem_t)io.p0, io.d2); + break; + case LUBDE_SEM_OP_GIVE: + io.rc = sal_sem_give((sal_sem_t)io.p0); + break; + default: + io.rc = LUBDE_FAIL; + break; + } + break; + case LUBDE_WRITE_IRQ_MASK: + io.rc = lkbde_irq_mask_set(io.dev, io.d0, io.d1, 0); + break; + case LUBDE_SPI_READ_REG: + if (user_bde->spi_read(io.dev, io.d0, io.dx.buf, io.d1) == -1) { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_SPI_WRITE_REG: + if (user_bde->spi_write(io.dev, io.d0, io.dx.buf, io.d1) == -1) { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_READ_REG_16BIT_BUS: + io.d1 = user_bde->read(io.dev, io.d0); + break; + case LUBDE_WRITE_REG_16BIT_BUS: + io.rc = user_bde->write(io.dev, io.d0, io.d1); + break; +#if (defined(BCM_PETRA_SUPPORT) || defined(BCM_DFE_SUPPORT)) + case LUBDE_CPU_WRITE_REG: + { + if (lkbde_cpu_write(io.dev, io.d0, (uint32*)io.dx.buf) == -1) { + io.rc = LUBDE_FAIL; + } + break; + } + case LUBDE_CPU_READ_REG: + { + if (lkbde_cpu_read(io.dev, io.d0, (uint32*)io.dx.buf) == -1) { + io.rc = LUBDE_FAIL; + } + break; + } + case LUBDE_CPU_PCI_REGISTER: + { + if (lkbde_cpu_pci_register(io.dev) == -1) { + io.rc = LUBDE_FAIL; + } + break; + } +#endif + case LUBDE_DEV_RESOURCE: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + bde_dev = user_bde->get_dev(io.dev); + if (bde_dev) { + if (BDE_DEV_MEM_MAPPED(_devices[io.dev].dev_type)) { + /* Get physical address to map */ + io.rc = lkbde_get_dev_resource(io.dev, io.d0, + &io.d1, &io.d2, &io.d3); + } + } else { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_IPROC_READ_REG: + if (!VALID_DEVICE(io.dev)) { + return -EINVAL; + } + if (_devices[io.dev].dev_type & BDE_AXI_DEV_TYPE) { + mapaddr = IOREMAP(io.d0, sizeof(uint32_t)); + if (mapaddr == NULL) { + io.rc = LUBDE_FAIL; + return -1; + } + io.d1 = readl(mapaddr); + iounmap(mapaddr); + } else { + io.d1 = user_bde->iproc_read(io.dev, io.d0); + if (io.d1 == -1) { + io.rc = LUBDE_FAIL; + } + } + break; + case LUBDE_IPROC_WRITE_REG: + if (user_bde->iproc_write(io.dev, io.d0, io.d1) == -1) { + io.rc = LUBDE_FAIL; + } + break; + case LUBDE_ATTACH_INSTANCE: + io.rc = _instance_attach(io.d0, io.d1); + break; + case LUBDE_GET_DEVICE_STATE: + io.rc = lkbde_dev_state_get(io.dev, &io.d0); + break; + case LUBDE_REPROBE: + io.rc = _device_reprobe(); + break; + default: + gprintk("Error: Invalid ioctl (%08x)\n", cmd); + io.rc = LUBDE_FAIL; + break; + } + + if (copy_to_user((void *)arg, &io, sizeof(io))) { + return -EFAULT; + } + + return 0; +} + +/* Workaround for broken Busybox/PPC insmod */ +static char _modname[] = LINUX_USER_BDE_NAME; + +static gmodule_t _gmodule = +{ + name: LINUX_USER_BDE_NAME, + major: LINUX_USER_BDE_MAJOR, + init: _init, + cleanup: _cleanup, + pprint: _pprint, + ioctl: _ioctl, +}; + +gmodule_t* +gmodule_get(void) +{ + _gmodule.name = _modname; + return &_gmodule; +} diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h new file mode 100644 index 00000000000..535ccac9fad --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h @@ -0,0 +1,114 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: linux-user-bde.h,v 1.23 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + */ + +#ifndef __LINUX_USER_BDE_H__ +#define __LINUX_USER_BDE_H__ + +#include +#include +#include +#ifndef __KERNEL__ +#include +#endif + +#if defined(SAL_BDE_32BIT_USER_64BIT_KERNEL) || defined(PTRS_ARE_64BITS) +typedef uint64_t bde_kernel_addr_t; +#else +typedef uint32_t bde_kernel_addr_t; +#endif + +/* Ioctl control structure */ +typedef struct { + unsigned int dev; /* Device ID */ + unsigned int rc; /* Operation Return Code */ + unsigned int d0; /* Operation specific data */ + unsigned int d1; + unsigned int d2; + unsigned int d3; + bde_kernel_addr_t p0; + union { + unsigned int dw[2]; + unsigned char buf[64]; + } dx; +} lubde_ioctl_t; + + +/* LUBDE ioctls */ +#define LUBDE_MAGIC 'L' + +#define LUBDE_VERSION _IO(LUBDE_MAGIC, 0) +#define LUBDE_GET_NUM_DEVICES _IO(LUBDE_MAGIC, 1) +#define LUBDE_GET_DEVICE _IO(LUBDE_MAGIC, 2) +#define LUBDE_PCI_CONFIG_PUT32 _IO(LUBDE_MAGIC, 3) +#define LUBDE_PCI_CONFIG_GET32 _IO(LUBDE_MAGIC, 4) +#define LUBDE_GET_DMA_INFO _IO(LUBDE_MAGIC, 5) +#define LUBDE_ENABLE_INTERRUPTS _IO(LUBDE_MAGIC, 6) +#define LUBDE_DISABLE_INTERRUPTS _IO(LUBDE_MAGIC, 7) +#define LUBDE_USLEEP _IO(LUBDE_MAGIC, 8) +#define LUBDE_WAIT_FOR_INTERRUPT _IO(LUBDE_MAGIC, 9) +#define LUBDE_SEM_OP _IO(LUBDE_MAGIC, 10) +#define LUBDE_UDELAY _IO(LUBDE_MAGIC, 11) +#define LUBDE_GET_DEVICE_TYPE _IO(LUBDE_MAGIC, 12) +#define LUBDE_SPI_READ_REG _IO(LUBDE_MAGIC, 13) +#define LUBDE_SPI_WRITE_REG _IO(LUBDE_MAGIC, 14) +#define LUBDE_READ_REG_16BIT_BUS _IO(LUBDE_MAGIC, 19) +#define LUBDE_WRITE_REG_16BIT_BUS _IO(LUBDE_MAGIC, 20) +#define LUBDE_GET_BUS_FEATURES _IO(LUBDE_MAGIC, 21) +#define LUBDE_WRITE_IRQ_MASK _IO(LUBDE_MAGIC, 22) +#define LUBDE_CPU_WRITE_REG _IO(LUBDE_MAGIC, 23) +#define LUBDE_CPU_READ_REG _IO(LUBDE_MAGIC, 24) +#define LUBDE_CPU_PCI_REGISTER _IO(LUBDE_MAGIC, 25) +#define LUBDE_DEV_RESOURCE _IO(LUBDE_MAGIC, 26) +#define LUBDE_IPROC_READ_REG _IO(LUBDE_MAGIC, 27) +#define LUBDE_IPROC_WRITE_REG _IO(LUBDE_MAGIC, 28) +#define LUBDE_ATTACH_INSTANCE _IO(LUBDE_MAGIC, 29) +#define LUBDE_GET_DEVICE_STATE _IO(LUBDE_MAGIC, 30) +#define LUBDE_REPROBE _IO(LUBDE_MAGIC, 31) + +#define LUBDE_SEM_OP_CREATE 1 +#define LUBDE_SEM_OP_DESTROY 2 +#define LUBDE_SEM_OP_TAKE 3 +#define LUBDE_SEM_OP_GIVE 4 + +#define LUBDE_SUCCESS 0 +#define LUBDE_FAIL ((unsigned int)-1) + + +/* + * Version history + * 1: add LUBDE_GET_DEVICE_STATE to support PCI hot plug + * 2: add LUBDE_REPROBE to support reprobe available devices + */ +#define KBDE_VERSION 2 + + +/* This is the signal that will be used + * when an interrupt occurs + */ + +#ifndef __KERNEL__ +#include +#endif + +#define LUBDE_INTERRUPT_SIGNAL SIGUSR1 +#define LUBDE_ETHER_INTERRUPT_SIGNAL SIGUSR2 + +#endif /* __LUBDE_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h new file mode 100644 index 00000000000..53003a40ce5 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h @@ -0,0 +1,76 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: $ + * $Copyright: (c) 2014 Broadcom Corp. + * All Rights Reserved.$ + * + */ + +#ifndef __SHBDE_H__ +#define __SHBDE_H__ + +typedef void (*shbde_log_func_t)(int level, const char *str, int param); + +#define SHBDE_ERR 0 +#define SHBDE_WARN 1 +#define SHBDE_DBG 2 + +/* iProc configuration (primarily used for PCI-AXI bridge) */ +typedef struct shbde_iproc_config_s { + unsigned int dev_id; + unsigned int dev_rev; + unsigned int use_msi; + unsigned int iproc_ver; + unsigned int cmic_ver; + unsigned int cmic_rev; + unsigned int dma_hi_bits; + unsigned int mdio_base_addr; + unsigned int pcie_phy_addr; + unsigned int adjust_pcie_preemphasis; +} shbde_iproc_config_t; + +/* Hardware abstraction functions */ +typedef struct shbde_hal_s { + + /* Optional log output interface */ + shbde_log_func_t log_func; + + /* PCI configuration access */ + unsigned char (*pcic8_read)(void *pci_dev, unsigned int reg); + void (*pcic8_write)(void *pci_dev, unsigned int reg, unsigned char data); + unsigned short (*pcic16_read)(void *pci_dev, unsigned int reg); + void (*pcic16_write)(void *pci_dev, unsigned int reg, unsigned short data); + unsigned int (*pcic32_read)(void *pci_dev, unsigned int reg); + void (*pcic32_write)(void *pci_dev, unsigned int reg, unsigned int data); + + /* iProc register access */ + unsigned int (*io32_read)(void *addr); + void (*io32_write)(void *addr, unsigned int); + + /* usleep function (optional) */ + void (*usleep)(int usec); + + /* PCI parent device access */ + void *(*pci_parent_device_get)(void *pci_dev); + + /* iProc configuration */ + shbde_iproc_config_t icfg; + +} shbde_hal_t; + + +#endif /* __SHBDE_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h new file mode 100644 index 00000000000..4b614ba5313 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h @@ -0,0 +1,48 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: $ + * $Copyright: (c) 2014 Broadcom Corp. + * All Rights Reserved.$ + * + */ + +#ifndef __SHBDE_IPROC_H__ +#define __SHBDE_IPROC_H__ + +#include + +extern int +shbde_iproc_config_init(shbde_iproc_config_t *icfg, + unsigned int dev_id, unsigned int dev_rev); + +extern int +shbde_iproc_paxb_init(shbde_hal_t *shbde, void *iproc_regs, + shbde_iproc_config_t *icfg); + +extern unsigned int +shbde_iproc_pci_read(shbde_hal_t *shbde, void *iproc_regs, + unsigned int addr); + +extern void +shbde_iproc_pci_write(shbde_hal_t *shbde, void *iproc_regs, + unsigned int addr, unsigned int data); + +extern int +shbde_iproc_pcie_preemphasis_set(shbde_hal_t *shbde, void *iproc_regs, + shbde_iproc_config_t *icfg, void *pci_dev); + +#endif /* __SHBDE_IPROC_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h new file mode 100644 index 00000000000..5f8fa63533f --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h @@ -0,0 +1,59 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: $ + * $Copyright: (c) 2015 Broadcom Corp. + * All Rights Reserved.$ + * + */ + +#ifndef __SHBDE_MDIO_H__ +#define __SHBDE_MDIO_H__ + +#include + +typedef struct shbde_mdio_ctrl_s { + + /* Primary HAL*/ + shbde_hal_t *shbde; + + /* Context for iProc MDIO register access */ + void *regs; + + /* Base address for MDIO registers */ + unsigned int base_addr; + + /* iProc MDIO register access */ + unsigned int (*io32_read)(shbde_hal_t *shbde, void *iproc_regs, + unsigned int addr); + void (*io32_write)(shbde_hal_t *shbde, void *iproc_regs, + unsigned int addr, unsigned int data); + +} shbde_mdio_ctrl_t; + + +extern int +shbde_iproc_mdio_init(shbde_mdio_ctrl_t *smc); + +extern int +shbde_iproc_mdio_read(shbde_mdio_ctrl_t *smc, unsigned int phy_addr, + unsigned int reg, unsigned int *val); + +extern int +shbde_iproc_mdio_write(shbde_mdio_ctrl_t *smc, unsigned int phy_addr, + unsigned int reg, unsigned int val); + +#endif /* __SHBDE_MDIO_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h new file mode 100644 index 00000000000..1f045d7b02c --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h @@ -0,0 +1,46 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: $ + * $Copyright: (c) 2014 Broadcom Corp. + * All Rights Reserved.$ + * + */ + +#ifndef __SHBDE_PCI_H__ +#define __SHBDE_PCI_H__ + +#include + +extern unsigned int +shbde_pci_pcie_cap(shbde_hal_t *shbde, void *pci_dev); + +extern int +shbde_pci_is_pcie(shbde_hal_t *shbde, void *pci_dev); + +extern int +shbde_pci_is_iproc(shbde_hal_t *shbde, void *pci_dev, int *cmic_bar); + +extern int +shbde_pci_max_payload_set(shbde_hal_t *shbde, void *pci_dev, int maxpayload); + +extern int +shbde_pci_iproc_version_get(shbde_hal_t *shbde, void *pci_dev, + unsigned int *iproc_ver, + unsigned int *cmic_ver, + unsigned int *cmic_rev); + +#endif /* __SHBDE_PCI_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c new file mode 100644 index 00000000000..e1bdcc4db0d --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c @@ -0,0 +1,480 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: $ + * $Copyright: (c) 2014 Broadcom Corp. + * All Rights Reserved.$ + * + */ + +#include +#include +#include + +/* PAXB register offsets within PCI BAR0 window */ +#define BAR0_PAXB_ENDIANESS 0x2030 +#define BAR0_PAXB_PCIE_EP_AXI_CONFIG 0x2104 +#define BAR0_PAXB_CONFIG_IND_ADDR 0x2120 +#define BAR0_PAXB_CONFIG_IND_DATA 0x2124 + +#define BAR0_PAXB_IMAP0_0 (0x2c00) +#define BAR0_PAXB_IMAP0_1 (0x2c04) +#define BAR0_PAXB_IMAP0_2 (0x2c08) +#define BAR0_PAXB_IMAP0_7 (0x2c1c) + +#define BAR0_PAXB_OARR_FUNC0_MSI_PAGE 0x2d34 +#define BAR0_PAXB_OARR_2 0x2d60 +#define BAR0_PAXB_OARR_2_UPPER 0x2d64 +#define BAR0_DMU_PCU_PCIE_SLAVE_RESET_MODE 0x7024 + +#define PAXB_0_FUNC0_IMAP1_3 0x2d88 + +/* Force byte pointer for offset adjustments */ +#define ROFFS(_ptr, _offset) ((unsigned char*)(_ptr) + (_offset)) + +#define PAXB_CONFIG_IND_ADDRr_PROTOCOL_LAYERf_SHFT 11 +#define PAXB_CONFIG_IND_ADDRr_PROTOCOL_LAYERf_MASK 0x3 +#define PAXB_CONFIG_IND_ADDRr_ADDRESSf_SHFT 0 +#define PAXB_CONFIG_IND_ADDRr_ADDRESSf_MASK 0x7ff +#define PAXB_0_FUNC0_IMAP1_3_ADDR_SHIFT 20 + +/* Register value set/get by field */ +#define REG_FIELD_SET(_r, _f, _r_val, _f_val) \ + _r_val = ((_r_val) & ~(_r##_##_f##_MASK << _r##_##_f##_SHFT)) | \ + (((_f_val) & _r##_##_f##_MASK) << _r##_##_f##_SHFT) +#define REG_FIELD_GET(_r, _f, _r_val) \ + (((_r_val) >> _r##_##_f##_SHFT) & _r##_##_f##_MASK) + +/* PCIe capabilities definition */ +#ifndef PCI_EXP_LNKSTA +#define PCI_EXP_LNKSTA 0x12 +#endif +/* Current Link Speed 5.0GT/s */ +#ifndef PCI_EXP_LNKSTA_CLS_5_0GB +#define PCI_EXP_LNKSTA_CLS_5_0GB 2 +#endif +#ifndef PCI_EXP_LNKSTA2 +#define PCI_EXP_LNKSTA2 0x32 +#endif +/* Current Deemphasis Level -3.5 dB */ +#ifndef PCI_EXP_LNKSTA2_CDL_3_5DB +#define PCI_EXP_LNKSTA2_CDL_3_5DB 0x1 +#endif + +static unsigned int +iproc32_read(shbde_hal_t *shbde, void *addr) +{ + if (!shbde || !shbde->io32_read) { + return 0; + } + return shbde->io32_read(addr); +} + +static void +iproc32_write(shbde_hal_t *shbde, void *addr, unsigned int data) +{ + if (!shbde || !shbde->io32_write) { + return; + } + shbde->io32_write(addr, data); +} + +static void +wait_usec(shbde_hal_t *shbde, int usec) +{ + if (shbde && shbde->usleep) { + shbde->usleep(usec); + } else { + int idx; + volatile int count; + for (idx = 0; idx < usec; idx++) { + for (count = 0; count < 100; count++); + } + } +} + +/* + * Function: + * shbde_iproc_config_init + * Purpose: + * Initialize iProc configuration parameters + * Parameters: + * icfg - pointer to empty iProc configuration structure + * Returns: + * -1 if error, otherwise 0 + */ +int +shbde_iproc_config_init(shbde_iproc_config_t *icfg, + unsigned int dev_id, unsigned int dev_rev) +{ + if (!icfg) { + return -1; + } + + /* Save device ID and revision */ + icfg->dev_id = dev_id; + icfg->dev_rev = dev_rev; + + /* Check device families first */ + switch (icfg->dev_id & 0xfff0) { + case 0x8400: /* Greyhound Lite */ + case 0x8410: /* Greyhound */ + case 0x8420: /* Bloodhound */ + case 0x8450: /* Elkhound */ + case 0xb060: /* Ranger2(Greyhound) */ + case 0x8360: /* Greyhound 53365 & 53369 */ + case 0xb260: /* saber2 */ + case 0xb460: /* saber2+ */ + case 0xb170: /* Hurricane3-MG */ + case 0x8570: /* Greyhound2 */ + case 0xb070: /* Greyhound2(emulation) */ + case 0x8580: /* Greyhound2(emulation) */ + case 0xb230: /* Dagger2 */ + icfg->iproc_ver = 7; + icfg->dma_hi_bits = 0x2; + break; + case 0xb560: /* Apache */ + case 0xb670: /* MO */ + case 0xb760: /* Maverick */ + icfg->iproc_ver = 0xB; + break; + case 0xb160: /* Hurricane3 */ + case 0x8440: /* Buckhound2 */ + case 0x8430: /* Foxhound2 */ + case 0x8540: /* Wolfhound2 */ + icfg->iproc_ver = 10; + icfg->dma_hi_bits = 0x2; + break; + default: + break; + } + + /* Check for exceptions */ + switch (icfg->dev_id) { + case 0xb069: + case 0xb068: + icfg->iproc_ver = 0xB; /*Ranger2+ Apache Family */ + icfg->dma_hi_bits = 0; + break; + case 0xb168: /* Ranger3+ */ + case 0xb169: + icfg->iproc_ver = 0; + icfg->dma_hi_bits = 0; + break; + default: + break; + } + /* Check for PCIe PHY address that needs PCIe preemphasis and + * assign the MDIO base address + */ + switch (icfg->dev_id & 0xfff0) { + case 0xb150: /* Hurricane2 */ + case 0x8340: /* Wolfhound */ + case 0x8330: /* Foxhound */ + case 0x8390: /* Dearhound */ + icfg->mdio_base_addr = 0x18032000; + icfg->pcie_phy_addr = 0x2; + break; + case 0xb340: /* Helilx4 */ + case 0xb540: /* FireScout */ + case 0xb040: /* Spiral, Ranger */ + icfg->mdio_base_addr = 0x18032000; + icfg->pcie_phy_addr = 0x5; + icfg->adjust_pcie_preemphasis = 1; + break; + case 0xa450: /* Katana2 */ + case 0xb240: + case 0xb450: + icfg->mdio_base_addr = 0x18032000; + icfg->pcie_phy_addr = 0x5; + icfg->adjust_pcie_preemphasis = 1; + break; + default: + break; + } + + /* Check for exceptions */ + switch (icfg->dev_id) { + default: + break; + } + + return 0; +} + +/* + * Function: + * shbde_iproc_paxb_init + * Purpose: + * Initialize iProc PCI-AXI bridge for CMIC access + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * iproc_regs - memory mapped iProc registers in PCI BAR + * icfg - iProc configuration parameters + * Returns: + * -1 if error, otherwise 0 + */ +int +shbde_iproc_paxb_init(shbde_hal_t *shbde, void *iproc_regs, + shbde_iproc_config_t *icfg) +{ + void *reg; + unsigned int data; + int pci_num; + + if (!iproc_regs || !icfg) { + return -1; + } + + /* + * The following code attempts to auto-detect the correct + * iProc PCI endianess configuration by reading a well-known + * register (the endianess configuration register itself). + * Note that the PCI endianess may be different for different + * big endian host processors. + */ + reg = ROFFS(iproc_regs, BAR0_PAXB_ENDIANESS); + /* Select big endian */ + iproc32_write(shbde, reg, 0x01010101); + /* Check if endianess register itself is correct endian */ + if (iproc32_read(shbde, reg) != 1) { + /* If not, then assume little endian */ + iproc32_write(shbde, reg, 0x0); + } + + /* Select which PCI core to use */ + pci_num = 0; + reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_2); + data = iproc32_read(shbde, reg); + if (data & 0x1000) { + /* PAXB_1 is mapped to sub-window 2 */ + pci_num = 1; + } + + /* Default DMA mapping if uninitialized */ + if (icfg->dma_hi_bits == 0) { + icfg->dma_hi_bits = 0x1; + if (pci_num == 1) { + icfg->dma_hi_bits = 0x2; + } + } + + /* Enable iProc DMA to external host memory */ + reg = ROFFS(iproc_regs, BAR0_PAXB_PCIE_EP_AXI_CONFIG); + iproc32_write(shbde, reg, 0x0); + if(icfg->cmic_ver < 4) { /* Non-CMICX */ + reg = ROFFS(iproc_regs, BAR0_PAXB_OARR_2); + iproc32_write(shbde, reg, 0x1); + reg = ROFFS(iproc_regs, BAR0_PAXB_OARR_2_UPPER); + iproc32_write(shbde, reg, icfg->dma_hi_bits); + /* Configure MSI interrupt page */ + if (icfg->use_msi) { + reg = ROFFS(iproc_regs, BAR0_PAXB_OARR_FUNC0_MSI_PAGE); + data = iproc32_read(shbde, reg); + iproc32_write(shbde, reg, data | 0x1); + } + } + /* Configure MSIX interrupt page, only need for iproc ver == 0x10 */ + if ((icfg->use_msi == 2) && (icfg->iproc_ver == 0x10)) { + unsigned int mask = (0x1 << PAXB_0_FUNC0_IMAP1_3_ADDR_SHIFT) - 1; + reg = ROFFS(iproc_regs, PAXB_0_FUNC0_IMAP1_3); + data = iproc32_read(shbde, reg); + data &= mask; + data |= 0x410 << PAXB_0_FUNC0_IMAP1_3_ADDR_SHIFT; + iproc32_write(shbde, reg, data); + } + return pci_num; +} + +/* + * Function: + * shbde_iproc_pci_read + * Purpose: + * Read iProc register through PCI BAR 0 + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * iproc_regs - memory mapped iProc registers in PCI BAR + * addr - iProc register address in AXI memory space + * Returns: + * Register value + */ +unsigned int +shbde_iproc_pci_read(shbde_hal_t *shbde, void *iproc_regs, + unsigned int addr) +{ + unsigned int subwin_base; + void *reg; + shbde_iproc_config_t *icfg = &shbde->icfg; + + if (!iproc_regs) { + return -1; + } + + /* Sub-window size is 0x1000 (4K) */ + subwin_base = (addr & ~0xfff); + + if((icfg->cmic_ver >= 4) && + ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) { + /* Route the INTC block access through IMAP0_6 */ + reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + } else { + /* Update base address for sub-window 7 */ + subwin_base |= 1; /* Valid bit */ + reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_7); + iproc32_write(shbde, reg, subwin_base); + /* Read it to make sure the write actually goes through */ + subwin_base = iproc32_read(shbde, reg); + + /* Read register through sub-window 7 */ + reg = ROFFS(iproc_regs, 0x7000 + (addr & 0xfff)); + } + + return iproc32_read(shbde, reg); +} + +/* + * Function: + * shbde_iproc_pci_write + * Purpose: + * Write iProc register through PCI BAR 0 + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * iproc_regs - memory mapped iProc registers in PCI BAR + * addr - iProc register address in AXI memory space + * data - data to write to iProc register + * Returns: + * Register value + */ +void +shbde_iproc_pci_write(shbde_hal_t *shbde, void *iproc_regs, + unsigned int addr, unsigned int data) +{ + unsigned int subwin_base; + void *reg; + shbde_iproc_config_t *icfg = &shbde->icfg; + + if (!iproc_regs) { + return; + } + + /* Sub-window size is 0x1000 (4K) */ + subwin_base = (addr & ~0xfff); + + if((icfg->cmic_ver >= 4) && + ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) { + /* Route the INTC block access through IMAP0_6 */ + reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + } else { + /* Update base address for sub-window 7 */ + subwin_base |= 1; /* Valid bit */ + reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_7); + iproc32_write(shbde, reg, subwin_base); + /* Read it to make sure the write actually goes through */ + subwin_base = iproc32_read(shbde, reg); + + /* Read register through sub-window 7 */ + reg = ROFFS(iproc_regs, 0x7000 + (addr & 0xfff)); + } + + iproc32_write(shbde, reg, data); +} + +int +shbde_iproc_pcie_preemphasis_set(shbde_hal_t *shbde, void *iproc_regs, + shbde_iproc_config_t *icfg, void *pci_dev) +{ + shbde_mdio_ctrl_t mdio_ctrl, *smc = &mdio_ctrl; + unsigned int phy_addr, data; + void *reg; + unsigned int pcie_cap_base; + unsigned short link_stat, link_stat2; + + if (!icfg) { + return -1; + } + + /* PHY address for PCIe link */ + phy_addr = icfg->pcie_phy_addr; + if (phy_addr == 0 || icfg->mdio_base_addr == 0) { + return 0; + } + + /* Initialize MDIO control */ + smc->shbde = shbde; + smc->regs = iproc_regs; + smc->base_addr = icfg->mdio_base_addr; + smc->io32_read = shbde_iproc_pci_read; + smc->io32_write = shbde_iproc_pci_write; + shbde_iproc_mdio_init(smc); + + /* PCIe SerDes Gen1/Gen2 CDR Track Bandwidth Adjustment + * for Better Jitter Tolerance + */ + shbde_iproc_mdio_write(smc, phy_addr, 0x1f, 0x8630); + shbde_iproc_mdio_write(smc, phy_addr, 0x13, 0x190); + shbde_iproc_mdio_write(smc, phy_addr, 0x19, 0x191); + + if (!icfg->adjust_pcie_preemphasis) { + return 0; + } + + /* Check to see if the PCIe SerDes deemphasis needs to be changed + * based on the advertisement from the root complex + */ + /* Find PCIe capability base */ + if (!shbde || !shbde->pcic16_read || !pci_dev) { + return -1; + } + pcie_cap_base = shbde_pci_pcie_cap(shbde, pci_dev); + if (pcie_cap_base) { + link_stat = shbde->pcic16_read(pci_dev, + pcie_cap_base + PCI_EXP_LNKSTA); + link_stat2 = shbde->pcic16_read(pci_dev, + pcie_cap_base + PCI_EXP_LNKSTA2); + if (((link_stat & 0xf) == PCI_EXP_LNKSTA_CLS_5_0GB) && + (link_stat2 & PCI_EXP_LNKSTA2_CDL_3_5DB)) { + /* Device is operating at Gen2 speeds and RC requested -3.5dB */ + /* Change the transmitter setting */ + shbde_iproc_mdio_write(smc, phy_addr, 0x1f, 0x8610); + shbde_iproc_mdio_read(smc, phy_addr, 0x17, &data); + data &= ~0xf00; + data |= 0x700; + shbde_iproc_mdio_write(smc, phy_addr, 0x17, data); + + /* Force the PCIe link to retrain */ + data = 0; + REG_FIELD_SET(PAXB_CONFIG_IND_ADDRr, PROTOCOL_LAYERf, data, 0x2); + REG_FIELD_SET(PAXB_CONFIG_IND_ADDRr, ADDRESSf, data, 0x4); + reg = ROFFS(iproc_regs, BAR0_PAXB_CONFIG_IND_ADDR); + iproc32_write(shbde, reg, data); + + reg = ROFFS(iproc_regs, BAR0_PAXB_CONFIG_IND_DATA); + data = iproc32_read(shbde, reg); + data &= ~0x4000; + iproc32_write(shbde, reg, data); + data |= 0x4000; + iproc32_write(shbde, reg, data); + data &= ~0x4000; + iproc32_write(shbde, reg, data); + + /* Wait a short while for the retraining to complete */ + wait_usec(shbde, 1000); + } + } + + return 0; +} + diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c new file mode 100644 index 00000000000..ef4a72071b3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c @@ -0,0 +1,186 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: $ + * $Copyright: (c) 2015 Broadcom Corp. + * All Rights Reserved.$ + * + */ + +#include + +/* iProc MDIO register offset */ +#define MII_MGMT_CTRL 0x0 +#define MII_MGMT_CMD_DATA 0x4 + +/* iProc MII register with fields definition */ +#define MII_MGMT_CTRLr_MDCDIVf_SHFT 0 +#define MII_MGMT_CTRLr_MDCDIVf_MASK 0x7f +#define MII_MGMT_CTRLr_BSYf_SHFT 8 +#define MII_MGMT_CTRLr_BSYf_MASK 0x1 + +#define MII_MGMT_CMD_DATAr_DATAf_SHFT 0 +#define MII_MGMT_CMD_DATAr_DATAf_MASK 0xffff +#define MII_MGMT_CMD_DATAr_TAf_SHFT 16 +#define MII_MGMT_CMD_DATAr_TAf_MASK 0x3 +#define MII_MGMT_CMD_DATAr_RAf_SHFT 18 +#define MII_MGMT_CMD_DATAr_RAf_MASK 0x1f +#define MII_MGMT_CMD_DATAr_PAf_SHFT 23 +#define MII_MGMT_CMD_DATAr_PAf_MASK 0x1f +#define MII_MGMT_CMD_DATAr_OPf_SHFT 28 +#define MII_MGMT_CMD_DATAr_OPf_MASK 0x3 +#define MII_MGMT_CMD_DATAr_SBf_SHFT 30 +#define MII_MGMT_CMD_DATAr_SBf_MASK 0x3 + +/* Register field value set/get */ +#define REG_FIELD_SET(_r, _f, _r_val, _f_val) \ + _r_val = ((_r_val) & ~(_r##_##_f##_MASK << _r##_##_f##_SHFT)) | \ + (((_f_val) & _r##_##_f##_MASK) << _r##_##_f##_SHFT) +#define REG_FIELD_GET(_r, _f, _r_val) \ + (((_r_val) >> _r##_##_f##_SHFT) & _r##_##_f##_MASK) + +#define LOG_OUT(_shbde, _lvl, _str, _prm) \ + if ((_shbde)->log_func) { \ + (_shbde)->log_func(_lvl, _str, _prm); \ + } +#define LOG_ERR(_shbde, _str, _prm) LOG_OUT(_shbde, SHBDE_ERR, _str, _prm) +#define LOG_WARN(_shbde, _str, _prm) LOG_OUT(_shbde, SHBDE_WARN, _str, _prm) +#define LOG_DBG(_shbde, _str, _prm) LOG_OUT(_shbde, SHBDE_DBG, _str, _prm) + +static unsigned int +mdio32_read(shbde_mdio_ctrl_t *smc, unsigned int offset) +{ + if (!smc || !smc->io32_read) { + return 0; + } + return smc->io32_read(smc->shbde, smc->regs, smc->base_addr + offset); +} + +static void +mdio32_write(shbde_mdio_ctrl_t *smc, unsigned int offset, unsigned int data) +{ + if (!smc || !smc->io32_read) { + return; + } + smc->io32_write(smc->shbde, smc->regs, smc->base_addr + offset, data); +} + +static void +wait_usec(shbde_mdio_ctrl_t *smc, int usec) +{ + shbde_hal_t *shbde = smc->shbde; + + if (shbde && shbde->usleep) { + shbde->usleep(usec); + } else { + int idx; + volatile int count; + for (idx = 0; idx < usec; idx++) { + for (count = 0; count < 100; count++); + } + } +} + +static int +iproc_mdio_wait_for_busy(shbde_mdio_ctrl_t *smc) +{ + int mii_busy; + unsigned int reg_val; + int count = 1000; + + /* Wait until MII is not busy */ + do { + reg_val = mdio32_read(smc, MII_MGMT_CTRL); + mii_busy = REG_FIELD_GET(MII_MGMT_CTRLr, BSYf, reg_val); + if (!mii_busy) { + break; + } + wait_usec(smc, 10); + count --; + } while (count > 0); + + return mii_busy; +} + +int +shbde_iproc_mdio_init(shbde_mdio_ctrl_t *smc) +{ + shbde_hal_t *shbde = smc->shbde; + unsigned int reg_val = 0; + + /* Enable the iProc internal MDIO interface */ + REG_FIELD_SET(MII_MGMT_CTRLr, MDCDIVf, reg_val, 0x7f); + mdio32_write(smc, MII_MGMT_CTRL, reg_val); + + if (shbde && !shbde->usleep) { + LOG_DBG(shbde, "shbde_mdio: no registration of usleep vector", 0); + } + + wait_usec(smc, 100); + + return 0; +} + +int +shbde_iproc_mdio_read(shbde_mdio_ctrl_t *smc, unsigned int phy_addr, + unsigned int reg, unsigned int *val) +{ + unsigned int reg_val = 0; + + REG_FIELD_SET(MII_MGMT_CMD_DATAr, SBf, reg_val, 0x1); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, TAf, reg_val, 0x2); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, OPf, reg_val, 0x2); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, PAf, reg_val, phy_addr); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, RAf, reg_val, reg); + mdio32_write(smc, MII_MGMT_CMD_DATA, reg_val); + + if (iproc_mdio_wait_for_busy(smc)) { + *val = 0; + LOG_DBG(smc->shbde, "shbde_iproc_mdio_read busy", reg); + return -1; + } + + reg_val = mdio32_read(smc, MII_MGMT_CMD_DATA); + *val = REG_FIELD_GET(MII_MGMT_CMD_DATAr, DATAf, reg_val); + + return 0; +} + +int +shbde_iproc_mdio_write(shbde_mdio_ctrl_t *smc, unsigned int phy_addr, + unsigned int reg, unsigned int val) +{ + unsigned int reg_val = 0; + + REG_FIELD_SET(MII_MGMT_CMD_DATAr, SBf, reg_val, 0x1); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, TAf, reg_val, 0x2); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, OPf, reg_val, 0x1); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, PAf, reg_val, phy_addr); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, RAf, reg_val, reg); + REG_FIELD_SET(MII_MGMT_CMD_DATAr, DATAf, reg_val, val); + mdio32_write(smc, MII_MGMT_CMD_DATA, reg_val); + + if (iproc_mdio_wait_for_busy(smc)) { + LOG_DBG(smc->shbde, "shbde_iproc_mdio_write busy", reg); + return -1; + } + + /* Wait for some time for the write to take effect */ + wait_usec(smc, 100); + + return 0; +} + diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c new file mode 100644 index 00000000000..5cc46d0d463 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c @@ -0,0 +1,392 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: $ + * $Copyright: (c) 2014 Broadcom Corp. + * All Rights Reserved.$ + * + */ + +#include + +/* PCIe capabilities */ +#ifndef PCI_CAPABILITY_LIST +#define PCI_CAPABILITY_LIST 0x34 +#endif +#ifndef PCI_CAP_ID_EXP +#define PCI_CAP_ID_EXP 0x10 +#endif +#ifndef PCI_EXP_DEVCAP +#define PCI_EXP_DEVCAP 4 +#endif +#ifndef PCI_EXP_DEVCTL +#define PCI_EXP_DEVCTL 8 +#endif +#ifndef PCI_EXT_CAP_START +#define PCI_EXT_CAP_START 0x100 +#endif +#ifndef PCI_EXT_CAP_ID +#define PCI_EXT_CAP_ID(_hdr) (_hdr & 0x0000ffff) +#endif +#ifndef PCI_EXT_CAP_VER +#define PCI_EXT_CAP_VER(_hdr) ((_hdr >> 16) & 0xf) +#endif +#ifndef PCI_EXT_CAP_NEXT +#define PCI_EXT_CAP_NEXT(_hdr) ((_hdr >> 20) & 0xffc) +#endif +#ifndef PCI_EXT_CAP_ID_VNDR +#define PCI_EXT_CAP_ID_VNDR 0x0b +#endif + +#define LOG_OUT(_shbde, _lvl, _str, _prm) \ + if ((_shbde)->log_func) { \ + (_shbde)->log_func(_lvl, _str, _prm); \ + } +#define LOG_ERR(_shbde, _str, _prm) LOG_OUT(_shbde, SHBDE_ERR, _str, _prm) +#define LOG_WARN(_shbde, _str, _prm) LOG_OUT(_shbde, SHBDE_WARN, _str, _prm) +#define LOG_DBG(_shbde, _str, _prm) LOG_OUT(_shbde, SHBDE_DBG, _str, _prm) + +#ifndef NULL +#define NULL (void *)0 +#endif + +/* + * Warpper functions with null-pointer checks. + */ +static unsigned int +pcic16_read(shbde_hal_t *shbde, void *pci_dev, + unsigned int addr) +{ + if (!shbde || !shbde->pcic16_read) { + return 0; + } + return shbde->pcic16_read(pci_dev, addr); +} + +static void +pcic16_write(shbde_hal_t *shbde, void *pci_dev, + unsigned int addr, unsigned int data) +{ + if (!shbde || !shbde->pcic16_write) { + return; + } + shbde->pcic16_write(pci_dev, addr, data); +} + +static unsigned int +pcic32_read(shbde_hal_t *shbde, void *pci_dev, + unsigned int addr) +{ + if (!shbde || !shbde->pcic32_read) { + return 0; + } + return shbde->pcic32_read(pci_dev, addr); +} + +static void * +pci_parent_device_get(shbde_hal_t *shbde, void *pci_dev) +{ + if (!shbde || !shbde->pci_parent_device_get) { + return NULL; + } + return shbde->pci_parent_device_get(pci_dev); +} + +/* + * Function: + * shbde_pci_pcie_cap + * Purpose: + * Return offset of PCIe capabilities in PCI configuration space + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * dev - PCI device handle (passed back to PCI HAL functions) + * Returns: + * PCI_CAP_ID_EXP offset in PCI configuration space if PCIe, otherwise 0 + */ +unsigned int +shbde_pci_pcie_cap(shbde_hal_t *shbde, void *pci_dev) +{ + unsigned int cap_base, rval; + + cap_base = pcic16_read(shbde, pci_dev, PCI_CAPABILITY_LIST); + while (cap_base) { + rval = pcic16_read(shbde, pci_dev, cap_base); + if ((rval & 0xff) == PCI_CAP_ID_EXP) { + break; + } + cap_base = (rval >> 8) & 0xff; + } + + return cap_base; +} + +/* + * Function: + * shbde_pci_is_pcie + * Purpose: + * Check if PCI device is PCIe device + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * dev - PCI device handle (passed back to PCI HAL functions) + * Returns: + * 1 if PCIe, otherwise 0 + */ +int +shbde_pci_is_pcie(shbde_hal_t *shbde, void *pci_dev) +{ + return shbde_pci_pcie_cap(shbde, pci_dev) ? 1 : 0; +} + +/* + * Function: + * shbde_pci_is_iproc + * Purpose: + * Check if PCI device is iProc-based + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * dev - PCI device handle (passed back to PCI HAL functions) + * cmic_bar - (OUT) PCI BAR which contains switch CMIC registers + * Returns: + * 1 if iProc-based, otherwise 0 + */ +int +shbde_pci_is_iproc(shbde_hal_t *shbde, void *pci_dev, int *cmic_bar) +{ + unsigned int cap_base, rval; + + if (!shbde_pci_is_pcie(shbde, pci_dev)) { + return 0; + } + + /* Look for PCIe vendor-specific extended capability (VSEC) */ + cap_base = PCI_EXT_CAP_START; + while (cap_base) { + rval = pcic32_read(shbde, pci_dev, cap_base); + if (rval == 0xffffffff) { + /* Assume PCI HW read error */ + return 0; + } + + if (PCI_EXT_CAP_ID(rval) == PCI_EXT_CAP_ID_VNDR) { + break; + } + cap_base = PCI_EXT_CAP_NEXT(rval); + } + if (cap_base) { + /* + * VSEC layout: + * + * 0x00: PCI Express Extended Capability Header + * 0x04: Vendor-Specific Header + * 0x08: Vendor-Specific Register 1 + * 0x0c: Vendor-Specific Register 2 + * ... + * 0x24: Vendor-Specific Register 8 + */ + /* 32'b // 31:12=0 Reserved; 11:08=CMIC BAR; 07:00=iProc Configuration ID */ + rval = pcic32_read(shbde, pci_dev, cap_base + 8); + LOG_DBG(shbde, "Found VSEC", rval); + + /* Determine PCI BAR of CMIC */ + *cmic_bar = 0; + if ((rval & 0x100) == 0x100) { + *cmic_bar = 2; + } + /* Assume iProc device */ + return 1; + } + + return 0; +} + +/* + * Function: + * shbde_pci_iproc_version_get + * Purpose: + * Get iproc, cmic versions and revisions + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * dev - PCI device handle (passed back to PCI HAL functions) + * iproc_ver - (OUT) iProc version + * cmic_ver - (OUT) CMIC version + * cmic_rev - (OUT) CMIC revision + * Returns: + * 1 for no error, otherwise 0 + */ +int +shbde_pci_iproc_version_get(shbde_hal_t *shbde, void *pci_dev, + unsigned int *iproc_ver, + unsigned int *cmic_ver, + unsigned int *cmic_rev) +{ + unsigned int cap_base, rval; + + if (!shbde_pci_is_pcie(shbde, pci_dev)) { + return 0; + } + + /* Look for PCIe vendor-specific extended capability (VSEC) */ + cap_base = PCI_EXT_CAP_START; + while (cap_base) { + rval = pcic32_read(shbde, pci_dev, cap_base); + if (rval == 0xffffffff) { + /* Assume PCI HW read error */ + return 0; + } + + if (PCI_EXT_CAP_ID(rval) == PCI_EXT_CAP_ID_VNDR) { + break; + } + cap_base = PCI_EXT_CAP_NEXT(rval); + } + if (cap_base) { + /* + * VSEC layout: + * + * 0x00: PCI Express Extended Capability Header + * 0x04: Vendor-Specific Header + * 0x08: Vendor-Specific Register 1 + * 0x0c: Vendor-Specific Register 2 + * ... + * 0x24: Vendor-Specific Register 8 + */ + + /* Read PCIe Vendor Specific Register 1 */ + /* VENODR REG FORMAT + * [7:0] iProc Rev = 8'h0E (for P14) + * [11:8] CMIC BAR = 4'h1 (BAR64-1) + * [15:12] CMIC Version = 4'h4 + * [19:16] CMIC Rev = 4'h1 + * [22:20] SBUS Version = 4'h4 + */ + + rval = pcic32_read(shbde, pci_dev, cap_base + 8); + LOG_DBG(shbde, "Found VSEC", rval); + + /* Determine PCI BAR of CMIC */ + *iproc_ver = rval & 0xff; + *cmic_ver = (rval >> 12) & 0xf; + *cmic_rev = (rval >> 16) & 0xf; + return 1; + } + + return 0; +} + +/* + * Function: + * shbde_pci_max_payload_set + * Purpose: + * Set PCIe maximum payload + * Parameters: + * shbde - pointer to initialized hardware abstraction module + * dev - PCI device handle (passed back to PCI HAL functions) + * maxpayload - maximum payload (in byte) + * Returns: + * -1 if error, otherwise 0 + * Notes: + * If not PCIe device, set the PCI retry count to infinte instead. + */ +int +shbde_pci_max_payload_set(shbde_hal_t *shbde, void *pci_dev, int maxpayload) +{ + unsigned int cap_base, parent_cap_base; + unsigned int devcap, devctl, parent_devctl; + int max_val, max_cap, parent_max_val; + void *parent_pci_dev; + + cap_base = shbde_pci_pcie_cap(shbde, pci_dev); + + if (cap_base == 0) { + /* Not PCIe */ + return 0; + } + + /* Get current device control settings */ + devctl = pcic16_read(shbde, pci_dev, cap_base + PCI_EXP_DEVCTL); + + /* Get current max payload setting */ + max_val = (devctl >> 5) & 0x7; + + if (maxpayload) { + /* Get encoding from byte value */ + max_val = 0; + while ((1 << (max_val + 7)) < maxpayload) { + max_val++; + } + LOG_DBG(shbde, "Set max payload size", maxpayload); + LOG_DBG(shbde, "Set max payload val", max_val); + + /* Get max supported payload size */ + devcap = pcic16_read(shbde, pci_dev, cap_base + PCI_EXP_DEVCAP); + max_cap = (devcap & 0x7); + + /* Do not exceed device capabilities */ + if (max_val > max_cap) { + max_val = max_cap; + LOG_DBG(shbde, + "Payload size exceeds device capability", + maxpayload); + } + + /* Get currently set max payload size for the parent device + * in the PCI tree (if it exists). + */ + parent_pci_dev = pci_parent_device_get(shbde, pci_dev); + if (parent_pci_dev != NULL) { + parent_cap_base = shbde_pci_pcie_cap(shbde, parent_pci_dev); + parent_devctl = pcic16_read(shbde, + parent_pci_dev, + parent_cap_base + PCI_EXP_DEVCTL); + parent_max_val = (parent_devctl >> 5) & 0x7; + + /* Do not exceed current parent max payload setting (our device + * should have an MPS setting <= current parent MPS setting in + * the tree of PCIe devices). + */ + if (max_val > parent_max_val) { + max_val = parent_max_val; + LOG_DBG(shbde, + "Payload size exceeds current parent device setting", + maxpayload); + } + } + + /* Update max payload size */ + devctl &= ~(0x7 << 5); + devctl |= (max_val) << 5; + + /* Update max request size */ + devctl &= ~(0x7 << 12); + devctl |= (max_val << 12); + } + + /* Always disable relaxed ordering */ + devctl &= ~(1 << 4); + + /* Update device control settings */ + pcic16_write(shbde, pci_dev, cap_base + PCI_EXP_DEVCTL, devctl); + + /* Warn if non-default setting is used */ + if (max_val > 0) { + LOG_WARN(shbde, + "Selected payload size may not be supported by all " + "PCIe bridges by default.", + (1 << (max_val + 7))); + } + + return 0; +} diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile new file mode 100644 index 00000000000..84c677758ca --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile @@ -0,0 +1,31 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.10 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +# Makefile for SOC SAL support +# +LOCALDIR = systems/linux/kernel/modules + +include ${SDK}/make/Make.config + +subdirs=shared uk-proxy bcm-diag-full bcm-core bcm-net bcm-diag + +include ${SDK}/make/Make.subdirs + +include ${SDK}/make/Make.depend diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile new file mode 100644 index 00000000000..ed1a5000e3c --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile @@ -0,0 +1,67 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +LOCALDIR = systems/linux/kernel/modules/bcm-knet + +include ${SDK}/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +ifeq ($(kernel_version),2_4) +MODULE = $(LIBDIR)/linux-bcm-knet.o +else +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-bcm-knet +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +build: $(MODULE) $(KMODULE) +endif + +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../../../bde/linux/kernel/kernel_module/Module.symvers +ifeq (,$(findstring -DPROXY_SUPPORT=0,$(CFLAGS))) +KBUILD_EXTRA_SYMBOLS += ${BLDDIR}/../uk-proxy/kernel_module/Module.symvers +endif + +# BCM Network Device + +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ +ifneq ($(kernel_version),2_4) +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko +endif + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +include ${SDK}/make/Make.depend + +clean:: + $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o + $(RM) $(BOBJS) $(MODULE) + +ifneq ($(kernel_version),2_4) +.PHONY: build +endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c new file mode 100644 index 00000000000..6767090ec7b --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c @@ -0,0 +1,7745 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: bcm-knet.c,v 1.90 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + */ + +/* + * This module implements a Linux network driver for Broadcom + * XGS switch devices. The driver simultaneously serves a + * number of vitual Linux network devices and a Tx/Rx API + * implemented in user space. + * + * Packets received from the switch device are sent to either + * a virtual Linux network device or the user mode Rx API + * based on a set of packet filters.susp + * + * Packets from the virtual Linux network devices and the user + * mode Tx API are multiplexed with priority given to the Tx API. + * + * A message-based IOCTL interface is used for managing packet + * filters and virtual Linux network interfaces. + * + * A virtual network interface can be configured to work in RCPU + * mode, which means that packets from the switch device will + * be encasulated with a RCPU header and a block of meta data + * that basically contains the core DCB information. Likewise, + * packets received from the Linux network stack are assumed to + * be RCPU encapsulated when going out on an interface in RCPU + * mode. + * + * The module implements basic Rx DMA rate control. The rate is + * specified in packets per second, and different Rx DMA channels + * can be configured to use different maximum packet rates. + * The packet rate can be configure as a module parameter, and + * it can also be changed dynamically through the proc file + * system (syntax is described in function header comment). + * + * To support multiple instance, each instance has its event queue. + * + * To support pci hot-plug in this module, the resource update + * should be handled when the PCI device is re-plugged. + * NOTE: the KNET detach should be invoked befere removing the + * device. + * + * For a list of supported module parameters, please see below. + */ + +#include /* Must be included first */ +#include +#include +#include + +#include +#include +#include +#include +#include + + +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("Network Device Driver for Broadcom BCM TxRx API"); +MODULE_LICENSE("GPL"); + +static int debug; +LKM_MOD_PARAM(debug, "i", int, 0); +MODULE_PARM_DESC(debug, +"Debug level (default 0)"); + +static char *mac_addr = NULL; +LKM_MOD_PARAM(mac_addr, "s", charp, 0); +MODULE_PARM_DESC(mac_addr, +"Ethernet MAC address (default 02:10:18:xx:xx:xx)"); + +static int rx_buffer_size = 9216; +LKM_MOD_PARAM(rx_buffer_size, "i", int, 0); +MODULE_PARM_DESC(rx_buffer_size, +"Size of RX packet buffers (default 9216)"); + +static int default_mtu = 1500; +LKM_MOD_PARAM(default_mtu, "i", int, 0); +MODULE_PARM_DESC(default_mtu, +"Default MTU for KNET network interfaces (default 1500)"); + +static int rx_sync_retry = 1000; +LKM_MOD_PARAM(rx_sync_retry, "i", int, 0); +MODULE_PARM_DESC(rx_sync_retry, +"Retries if chain is incomplete on interrupt (default 10)"); + +static char *base_dev_name = NULL; +LKM_MOD_PARAM(base_dev_name, "s", charp, 0); +MODULE_PARM_DESC(base_dev_name, +"Base device name (default bcm0, bcm1, etc.)"); + +static int rcpu_mode = 0; +LKM_MOD_PARAM(rcpu_mode, "i", int, 0); +MODULE_PARM_DESC(rcpu_mode, +"Enable RCPU encapsulation (default 0)"); + +static char *rcpu_dmac = NULL; +LKM_MOD_PARAM(rcpu_dmac, "s", charp, 0); +MODULE_PARM_DESC(rcpu_dmac, +"RCPU destination MAC address (by default use L2 destination MAC address)"); + +static char *rcpu_smac = NULL; +LKM_MOD_PARAM(rcpu_smac, "s", charp, 0); +MODULE_PARM_DESC(rcpu_smac, +"RCPU source MAC address (by default use L2 source MAC address)"); + +static int rcpu_ethertype = 0xde08; +LKM_MOD_PARAM(rcpu_ethertype, "i", int, 0); +MODULE_PARM_DESC(rcpu_ethertype, +"RCPU EtherType (default DE08h)"); + +static int rcpu_signature = 0; +LKM_MOD_PARAM(rcpu_signature, "i", int, 0); +MODULE_PARM_DESC(rcpu_signature, +"RCPU Signature (default is PCI device ID)"); + +static int rcpu_vlan = 1; +LKM_MOD_PARAM(rcpu_vlan, "i", int, 0); +MODULE_PARM_DESC(rcpu_vlan, +"RCPU VLAN ID (default 1)"); + +static int use_rx_skb = 0; +LKM_MOD_PARAM(use_rx_skb, "i", int, 0); +MODULE_PARM_DESC(use_rx_skb, +"Use socket buffers for receive operation (default 0)"); + +static int num_rx_prio = 1; +LKM_MOD_PARAM(num_rx_prio, "i", int, 0); +MODULE_PARM_DESC(num_rx_prio, +"Number of filter priorities per Rx DMA channel"); + +static int rx_rate[8] = { 100000, 100000, 100000, 100000, 100000, 100000, 100000, 0 }; +LKM_MOD_PARAM_ARRAY(rx_rate, "1-4i", int, NULL, 0); +MODULE_PARM_DESC(rx_rate, +"Rx rate in packets per second (default 100000)"); + +static int rx_burst[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; +LKM_MOD_PARAM_ARRAY(rx_burst, "1-4i", int, NULL, 0); +MODULE_PARM_DESC(rx_burst, +"Rx rate burst maximum in packets (default rx_rate/10)"); + +static int check_rcpu_signature = 0; +LKM_MOD_PARAM(check_rcpu_signature, "i", int, 0); +MODULE_PARM_DESC(check_rcpu_signature, +"Check RCPU Signature for Tx packets from RCPU interfaces"); + +static int basedev_suspend = 0; +LKM_MOD_PARAM(basedev_suspend, "i", int, 0); +MODULE_PARM_DESC(basedev_suspend, +"Pause traffic till base device is up (enabled by default in NAPI mode)"); + +/* Debug levels */ +#define DBG_LVL_VERB 0x1 +#define DBG_LVL_DCB 0x2 +#define DBG_LVL_PKT 0x4 +#define DBG_LVL_SKB 0x8 +#define DBG_LVL_CMD 0x10 +#define DBG_LVL_EVT 0x20 +#define DBG_LVL_IRQ 0x40 +#define DBG_LVL_NAPI 0x80 +#define DBG_LVL_PDMP 0x100 +#define DBG_LVL_FLTR 0x200 +#define DBG_LVL_KCOM 0x400 +#define DBG_LVL_RCPU 0x800 +#define DBG_LVL_WARN 0x1000 +#define DBG_LVL_NDEV 0x2000 +#define DBG_LVL_INST 0x4000 +/* Level to output Dune internal headers Parsing */ +#define DBG_LVL_DUNE 0x8000 +#define DBG_LVL_DCB_TX 0x10000 +#define DBG_LVL_DCB_RX 0x20000 +#define DBG_LVL_PDMP_TX 0x40000 +#define DBG_LVL_PDMP_RX 0x80000 + +#define DBG_VERB(_s) do { if (debug & DBG_LVL_VERB) gprintk _s; } while (0) +#define DBG_PKT(_s) do { if (debug & DBG_LVL_PKT) gprintk _s; } while (0) +#define DBG_SKB(_s) do { if (debug & DBG_LVL_SKB) gprintk _s; } while (0) +#define DBG_CMD(_s) do { if (debug & DBG_LVL_CMD) gprintk _s; } while (0) +#define DBG_EVT(_s) do { if (debug & DBG_LVL_EVT) gprintk _s; } while (0) +#define DBG_IRQ(_s) do { if (debug & DBG_LVL_IRQ) gprintk _s; } while (0) +#define DBG_NAPI(_s) do { if (debug & DBG_LVL_NAPI) gprintk _s; } while (0) +#define DBG_PDMP(_s) do { if (debug & DBG_LVL_PDMP) gprintk _s; } while (0) +#define DBG_FLTR(_s) do { if (debug & DBG_LVL_FLTR) gprintk _s; } while (0) +#define DBG_KCOM(_s) do { if (debug & DBG_LVL_KCOM) gprintk _s; } while (0) +#define DBG_RCPU(_s) do { if (debug & DBG_LVL_RCPU) gprintk _s; } while (0) +#define DBG_WARN(_s) do { if (debug & DBG_LVL_WARN) gprintk _s; } while (0) +#define DBG_NDEV(_s) do { if (debug & DBG_LVL_NDEV) gprintk _s; } while (0) +#define DBG_INST(_s) do { if (debug & DBG_LVL_INST) gprintk _s; } while (0) +#define DBG_DUNE(_s) do { if (debug & DBG_LVL_DUNE) gprintk _s; } while (0) +#define DBG_DCB_TX(_s) do { if (debug & (DBG_LVL_DCB|DBG_LVL_DCB_TX)) \ + gprintk _s; } while (0) +#define DBG_DCB_RX(_s) do { if (debug & (DBG_LVL_DCB|DBG_LVL_DCB_RX)) \ + gprintk _s; } while (0) +#define DBG_DCB(_s) do { if (debug & (DBG_LVL_DCB|DBG_LVL_DCB_TX| \ + DBG_LVL_DCB_RX)) \ + gprintk _s; } while (0) + + +/* This flag is used to indicate if debugging packet function is open or closed */ +static int dbg_pkt_enable = 0; + +/* Module Information */ +#define MODULE_MAJOR 122 +#define MODULE_NAME "linux-bcm-knet" + +#ifndef NAPI_SUPPORT +#define NAPI_SUPPORT 1 +#endif + +#if NAPI_SUPPORT + +static int use_napi = 0; +LKM_MOD_PARAM(use_napi, "i", int, 0); +MODULE_PARM_DESC(use_napi, +"Use NAPI interface (default 0)"); + +static int napi_weight = 64; +LKM_MOD_PARAM(napi_weight, "i", int, 0); +MODULE_PARM_DESC(napi_weight, +"Weight of NAPI interfaces (default 64)"); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) +#define bkn_napi_enable(_dev, _napi) netif_poll_enable(_dev) +#define bkn_napi_disable(_dev, _napi) netif_poll_disable(_dev) +#define bkn_napi_schedule(_dev, _napi) netif_rx_schedule(_dev) +#define bkn_napi_schedule_prep(_dev, _napi) netif_rx_schedule_prep(_dev) +#define __bkn_napi_schedule(_dev, _napi) __netif_rx_schedule(_dev) +#define bkn_napi_complete(_dev, _napi) netif_rx_complete(_dev) +#else +#define bkn_napi_enable(_dev, _napi) napi_enable(_napi) +#define bkn_napi_disable(_dev, _napi) napi_disable(_napi) +#define bkn_napi_schedule(_dev, _napi) napi_schedule(_napi) +#define bkn_napi_schedule_prep(_dev, _napi) napi_schedule_prep(_napi) +#define __bkn_napi_schedule(_dev, _napi) __napi_schedule(_napi) +#define bkn_napi_complete(_dev, _napi) napi_complete(_napi) +#endif + +#else + +static int use_napi = 0; +static int napi_weight = 0; + +#define bkn_napi_enable(_dev, _napi) +#define bkn_napi_disable(_dev, _napi) +#define bkn_napi_schedule(_dev, _napi) +#define bkn_napi_schedule_prep(_dev, _napi) (0) +#define __bkn_napi_schedule(_dev, _napi) +#define bkn_napi_complete(_dev, _napi) + +#endif + +/* + * If proxy support is compiled in the module will attempt to use + * the user/kernel message service provided by the linux-uk-proxy + * kernel module, otherwise device IOCTL will be used. + */ +#ifndef PROXY_SUPPORT +#define PROXY_SUPPORT 0 +#endif + +#if PROXY_SUPPORT + +#include + +static int use_proxy = 1; +LKM_MOD_PARAM(use_proxy, "i", int, 0); +MODULE_PARM_DESC(use_proxy, +"Use Linux User/Kernel proxy (default 1)"); + +#define PROXY_SERVICE_CREATE(_s,_q,_f) linux_uk_proxy_service_create(_s,_q,_f) +#define PROXY_SERVICE_DESTROY(_s) linux_uk_proxy_service_destroy(_s); +#define PROXY_SEND(_s,_m,_l) linux_uk_proxy_send(_s,_m,_l) +#define PROXY_RECV(_s,_m,_l) linux_uk_proxy_recv(_s,_m,_l) + +#else + +static int use_proxy = 0; + +#define PROXY_SERVICE_CREATE(_s,_q,_f) +#define PROXY_SERVICE_DESTROY(_s) +#define PROXY_SEND(_s,_m,_l) +#define PROXY_RECV(_s,_m,_l) (-1) + +#endif + +/* Compatibility */ + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)) +#define NETDEV_UPDATE_TRANS_START_TIME(dev) dev->trans_start = jiffies +#else +#define NETDEV_UPDATE_TRANS_START_TIME(dev) netif_trans_update(dev) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) +#define skb_copy_to_linear_data(_skb, _pkt, _len) \ + eth_copy_and_sum(_skb, _pkt, _len, 0) +struct napi_struct { int not_used; }; +#define netif_napi_add(_dev, _napi, _poll, _weight) do { \ + (_dev)->poll = _poll; \ + (_dev)->weight = _weight; \ +} while(0) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) +#define SKB_PADTO(_skb,_len) (((_skb = skb_padto(_skb,_len)) == NULL) ? -1 : 0) +#else +#define SKB_PADTO(_skb,_len) skb_padto(_skb,_len) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,12)) +#define skb_header_cloned(_skb) \ + skb_cloned(_skb) +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27) +static inline void *netdev_priv(struct net_device *dev) +{ + return dev->priv; +} +#endif /* KERNEL_VERSION(2,4,27) */ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,23) +/* Special check for MontaVista 2.4.20 MIPS */ +#if !(defined(MAX_USER_RT_PRIO) && defined(CONFIG_MIPS)) +static inline void free_netdev(struct net_device *dev) +{ + kfree(dev); +} +#endif +static inline void netif_poll_disable(struct net_device *dev) +{ + while (test_and_set_bit(__LINK_STATE_RX_SCHED, &dev->state)) { + /* No hurry. */ + current->state = TASK_INTERRUPTIBLE; + schedule_timeout(1); + } +} +static inline void netif_poll_enable(struct net_device *dev) +{ + clear_bit(__LINK_STATE_RX_SCHED, &dev->state); +} +#endif /* KERNEL_VERSION(2,4,23) */ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,21) +static struct sk_buff *skb_pad(struct sk_buff *skb, int pad) +{ + struct sk_buff *nskb; + + /* If the skbuff is non linear tailroom is always zero.. */ + if(skb_tailroom(skb) >= pad) + { + memset(skb->data+skb->len, 0, pad); + return skb; + } + + nskb = skb_copy_expand(skb, skb_headroom(skb), skb_tailroom(skb) + pad, GFP_ATOMIC); + kfree_skb(skb); + if(nskb) + memset(nskb->data+nskb->len, 0, pad); + return nskb; +} +static inline struct sk_buff *skb_padto(struct sk_buff *skb, unsigned int len) +{ + unsigned int size = skb->len; + if(likely(size >= len)) + return skb; + return skb_pad(skb, len-size); +} +#endif /* KERNEL_VERSION(2,4,21) */ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) +#define bkn_vlan_hwaccel_put_tag(_skb, _proto, _tci) \ + __vlan_hwaccel_put_tag(_skb, _tci) +#else +#define bkn_vlan_hwaccel_put_tag(_skb, _proto, _tci) \ + __vlan_hwaccel_put_tag(_skb, htons(_proto), _tci) +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27) +#define bkn_dma_mapping_error(d, a) \ + dma_mapping_error(a) +#define bkn_pci_dma_mapping_error(d, a) \ + pci_dma_mapping_error(a) +#else +#define bkn_dma_mapping_error(d, a) \ + dma_mapping_error(d, a) +#define bkn_pci_dma_mapping_error(d, a) \ + pci_dma_mapping_error(d, a) +#endif + +#ifdef LINUX_BDE_DMA_DEVICE_SUPPORT +#define DMA_DEV device +#define DMA_FROMDEV DMA_FROM_DEVICE +#define DMA_TODEV DMA_TO_DEVICE +#define DMA_MAP_SINGLE(d,p,s,r) dma_map_single(d,p,s,r) +#define DMA_UNMAP_SINGLE(d,a,s,r) dma_unmap_single(d,a,s,r) +#define DMA_ALLOC_COHERENT(d,s,h) dma_alloc_coherent(d,s,h,GFP_ATOMIC|GFP_DMA32) +#define DMA_FREE_COHERENT(d,s,a,h) dma_free_coherent(d,s,a,h) +#define DMA_MAPPING_ERROR(d,a) bkn_dma_mapping_error(d,a) +#else +#define DMA_DEV pci_dev +#define DMA_FROMDEV PCI_DMA_FROMDEVICE +#define DMA_TODEV PCI_DMA_TODEVICE +#define DMA_MAP_SINGLE(d,p,s,r) pci_map_single(d,p,s,r) +#define DMA_UNMAP_SINGLE(d,a,s,r) pci_unmap_single(d,a,s,r) +#define DMA_ALLOC_COHERENT(d,s,h) pci_alloc_consistent(d,s,h) +#define DMA_FREE_COHERENT(d,s,a,h) pci_free_consistent(d,s,a,h) +#define DMA_MAPPING_ERROR(d,a) bkn_pci_dma_mapping_error(d,a) +#endif + +/* RCPU operations */ +#define RCPU_OPCODE_RX 0x10 +#define RCPU_OPCODE_TX 0x20 + +/* RCPU flags */ +#define RCPU_F_MODHDR 0x4 + +/* RCPU encapsulation */ +#define RCPU_HDR_SIZE 32 +#define RCPU_TX_META_SIZE 32 +#define RCPU_TX_ENCAP_SIZE (RCPU_HDR_SIZE + RCPU_TX_META_SIZE) +#define RCPU_RX_META_SIZE 64 +#define RCPU_RX_ENCAP_SIZE (RCPU_HDR_SIZE + RCPU_RX_META_SIZE) + +#define PKT_TX_HDR_SIZE 16 + +static volatile int module_initialized; + +static ibde_t *kernel_bde = NULL; + +/* Descriptor info */ +typedef struct bkn_desc_info_s { + uint32_t *dcb_mem; + uint64_t dcb_dma; + struct sk_buff *skb; + uint64_t skb_dma; + uint32_t dma_size; +} bkn_desc_info_t; + +/* DCB chain info */ +typedef struct bkn_dcb_chain_s { + struct list_head list; + int dcb_cnt; + int dcb_cur; + uint32_t *dcb_mem; + uint64_t dcb_dma; +} bkn_dcb_chain_t; + +#define MAX_TX_DCBS 64 +#define MAX_RX_DCBS 64 + +#define NUM_DMA_CHAN 8 +#define NUM_RX_CHAN 7 +#define NUM_CMICX_RX_CHAN 7 +#define NUM_CMICM_RX_CHAN 3 + +/* Device control info */ +typedef struct bkn_switch_info_s { + struct list_head list; + struct list_head ndev_list; /* Associated virtual Ethernet interfaces */ + struct net_device **ndevs; /* Indexed array of ndev_list */ + int ndev_max; /* Size of indexed array */ + struct list_head rxpf_list; /* Associated Rx packet filters */ + volatile void *base_addr; /* Base address for PCI register access */ + struct DMA_DEV *dma_dev; /* Required for DMA memory control */ + struct pci_dev *pdev; /* Required for DMA memory control */ + struct net_device *dev; /* Base network device */ + struct napi_struct napi; /* New NAPI */ + struct timer_list timer; /* Retry/resource timer */ + int timer_queued; /* Flag indicating queued timer function */ + uint32_t timer_runs; /* Timer function runs (debug only) */ + struct timer_list rxtick; /* Rx rate control timer */ + uint32_t rxticks_per_sec; /* Rx rate control update frequency */ + uint32_t rxtick_jiffies; /* Time between updates (in jiffies) */ + uint32_t rxticks; /* Rx rate control debug counter */ + uint32_t interrupts; /* Total number of interrupts */ + spinlock_t lock; /* Main lock for device */ + int dev_no; /* Device number (from BDE) */ + int cpu_no; /* Cpu number. 1 for iHost(AXI),0 for others */ + int dcb_type; /* DCB type */ + int dcb_wsize; /* DCB size (in 32-bit words) */ + int pkt_hdr_size; /* Packet header size */ + int rx_chans; /* Number of Rx channels */ + uint32_t dma_hi; /* DMA higher address */ + uint32_t cmic_type; /* CMIC type (CMICe or CMICm) */ + uint32_t irq_mask; /* Active IRQs for DMA control */ + uint32_t napi_poll_mode; /* NAPI is in polling mode */ + uint32_t napi_not_done; /* NAPI poll did not process all packets */ + uint32_t napi_poll_again; /* Used if DCB chain is restarted */ + uint32_t tx_yield; /* Tx schedule for Continuous DMA and Non-NAPI mode */ + void *dcb_mem; /* Logical pointer to DCB memory */ + uint64_t dcb_dma; /* Physical bus address for DCB memory */ + int dcb_mem_size; /* Total size of allocated DCB memory */ + uint32_t dma_events; /* DMA events pending for BCM API */ + uint32_t rcpu_sig; /* RCPU signature */ + uint64_t halt_addr[NUM_DMA_CHAN]; /* DMA halt address */ + uint32_t cdma_channels; /* Active channels for Continuous DMA mode */ + uint32_t poll_channels; /* Channels for polling */ + uint32_t inst_id; /* Instance id of this device */ + int evt_idx; /* Event queue index for this device*/ + int basedev_suspended; /* Base device suspended */ + struct { + bkn_desc_info_t desc[MAX_TX_DCBS+1]; + int free; /* Number of free Tx DCBs */ + int cur; /* Index of current Tx DCB */ + int dirty; /* Index of next Tx DCB to complete */ + int api_active; /* BCM Tx API is in progress */ + int suspends; /* Calls to netif_stop_queue (debug only) */ + struct list_head api_dcb_list; /* Tx DCB chains from BCM Tx API */ + bkn_dcb_chain_t *api_dcb_chain; /* Current Tx DCB chain */ + bkn_dcb_chain_t *api_dcb_chain_end; /* Tx DCB chain end */ + uint32_t pkts; /* Tx packet counter */ + uint32_t pkts_d_no_skb; /* Tx drop - skb allocation failed */ + uint32_t pkts_d_rcpu_encap; /* Tx drop - bad RCPU encapsulation */ + uint32_t pkts_d_rcpu_sig; /* Tx drop - bad RCPU signature */ + uint32_t pkts_d_rcpu_meta; /* Tx drop - bad RCPU meta data */ + uint32_t pkts_d_pad_fail; /* Tx drop - pad to minimum size failed */ + uint32_t pkts_d_dma_resrc; /* Tx drop - no DMA resources */ + uint32_t pkts_d_callback; /* Tx drop - consumed by call-back */ + uint32_t pkts_d_no_link; /* Tx drop - software link down */ + uint32_t pkts_d_over_limit; /* Tx drop - length is out of range */ + } tx; + struct { + bkn_desc_info_t desc[MAX_RX_DCBS+1]; + int free; /* Number of free Rx DCBs */ + int cur; /* Index of current Rx DCB */ + int dirty; /* Index of next Rx DCB to complete */ + int running; /* Rx DMA is active */ + int api_active; /* BCM Rx API is active */ + int chain_complete; /* All DCBs in chain processed */ + int sync_err; /* Chain done with incomplete DCBs (debug) */ + int sync_retry; /* Total retry times for sync error (debug) */ + int sync_maxloop; /* Max loop times once in recovering sync (debug) */ + int use_rx_skb; /* Use SKBs for DMA */ + uint32_t rate_max; /* Rx rate in packets/sec */ + uint32_t burst_max; /* Rx burst size in number of packets */ + uint32_t tokens; /* Tokens for Rx rate control */ + uint32_t rate; /* Current packet rate */ + unsigned long tok_jif; /* Jiffies at last token update */ + unsigned long rate_jif; /* Jiffies at last rate update */ + struct list_head api_dcb_list; /* Rx DCB chains from BCM Rx API */ + bkn_dcb_chain_t *api_dcb_chain; /* Current Rx DCB chain */ + bkn_dcb_chain_t *api_dcb_chain_end; /* Rx DCB chain end */ + uint32_t pkts; /* Rx packet counter */ + uint32_t pkts_ref; /* Rx packet count for rate calculation */ + uint32_t pkts_f_api; /* Rx packets filtered to API */ + uint32_t pkts_f_netif; /* Rx packets filtered to net interface */ + uint32_t pkts_m_api; /* Rx packets mirrored to API */ + uint32_t pkts_m_netif; /* Rx packets mirrored to net interface */ + uint32_t pkts_d_no_skb; /* Rx drop - skb allocation failed */ + uint32_t pkts_d_no_match; /* Rx drop - no matching filters */ + uint32_t pkts_d_unkn_netif; /* Rx drop - unknown net interface ID */ + uint32_t pkts_d_unkn_dest; /* Rx drop - unknown destination type */ + uint32_t pkts_d_callback; /* Rx drop - consumed by call-back */ + uint32_t pkts_d_no_link; /* Rx drop - software link down */ + uint32_t pkts_d_no_api_buf; /* Rx drop - no API buffers */ + } rx[NUM_RX_CHAN]; +} bkn_switch_info_t; + +#define BKN_DNX_HDR_MAX_SIZE 40 +/* FTMH */ +#define BKN_DNX_FTMH_LB_EXT_EN 0x1 +#define BKN_DNX_FTMH_STACKING_EXT_EN 0x2 +#define BKN_DNX_FTMH_SIZE_BYTE 9 +#define BKN_DNX_FTMH_LB_EXT_SIZE_BYTE 1 +#define BKN_DNX_FTMH_STACKING_SIZE_BYTE 2 +#define BKN_DNX_FTMH_DEST_EXT_SIZE_BYTE 2 +#define BKN_DNX_FTMH_LB_EXT_SIZE_BYTE 1 +#define BKN_DNX_FTMH_PKT_SIZE_MSB 0 +#define BKN_DNX_FTMH_PKT_SIZE_NOF_BITS 14 +#define BKN_DNX_FTMH_TC_MSB 14 +#define BKN_DNX_FTMH_TC_NOF_BITS 3 +#define BKN_DNX_FTMH_SRC_SYS_PORT_MSB 17 +#define BKN_DNX_FTMH_SRC_SYS_PORT_NOF_BITS 16 +#define BKN_DNX_FTMH_EXT_DSP_EXIST_MSB 68 +#define BKN_DNX_FTMH_EXT_DSP_EXIST_NOF_BITS 1 +#define BKN_DNX_FTMH_EXT_MSB 45 +#define BKN_DNX_FTMH_EXT_NOF_BITS 2 +#define BKN_DNX_FTMH_FIRST_EXT_MSB 72 +#define BKN_DNX_FTMH_ACTION_TYPE_MSB 43 +#define BKN_DNX_FTMH_ACTION_TYPE_NOF_BITS 2 +#define BKN_DNX_FTMH_PPH_TYPE_MSB 45 +#define BKN_DNX_FTMH_PPH_TYPE_NOF_BITS 2 +/* PPH */ +#define BKN_DNX_PPH_SIZE_BYTE 7 +#define BKN_DNX_PPH_EEI_EXTENSION_PRESENT_MSB 0 +#define BKN_DNX_PPH_EEI_EXTENSION_PRESENT_NOF_BITS 1 +#define BKN_DNX_PPH_LEARN_EXENSION_PRESENT_MSB 1 +#define BKN_DNX_PPH_LEARN_EXENSION_PRESENT_NOF_BITS 1 +#define BKN_DNX_PPH_FHEI_SIZE_MSB 2 +#define BKN_DNX_PPH_FHEI_SIZE_NOF_BITS 2 +#define BKN_DNX_PPH_FORWARD_CODE_MSB 4 +#define BKN_DNX_PPH_FORWARD_CODE_NOF_BITS 4 +#define BKN_DNX_PPH_VSI_MSB 22 +#define BKN_DNX_PPH_VSI_NOF_BITS 16 +/* FHEI TRAP/SNOOP 3B */ +#define BKN_DNX_PPH_FHEI_3B_SIZE_BYTE 3 +#define BKN_DNX_PPH_FHEI_5B_SIZE_BYTE 5 +#define BKN_DNX_PPH_FHEI_8B_SIZE_BYTE 8 +#define BKN_DNX_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_QUALIFIER_MSB 0 +#define BKN_DNX_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_QUALIFIER_NOF_BITS 16 +#define BKN_DNX_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_MSB 16 +#define BKN_DNX_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_NOF_BITS 8 +/* PPH extension */ +#define BKN_DNX_PPH_EXPLICIT_EDITING_INFOMATION_EXTENSION_SIZE_BYTE 3 +#define BKN_DNX_PPH_LEARN_EXTENSION_SIZE_BYTE 5 + + +/* ftmh action type. */ +typedef enum bkn_dnx_ftmh_action_type_e { + BKN_DNX_FTMH_ACTION_TYPE_FORWARD = 0, /* TM action is forward */ + BKN_DNX_FTMH_ACTION_TYPE_SNOOP = 1, /* TM action is snoop */ + BKN_DNX_FTMH_ACTION_TYPE_INBOUND_MIRROR = 2, /* TM action is inbound mirror. */ + BKN_DNX_FTMH_ACTION_TYPE_OUTBOUND_MIRROR = 3 /* TM action is outbound mirror. */ +}bkn_dnx_ftmh_action_type_t; + +/* ftmh dest extension. */ +typedef struct bkn_dnx_ftmh_dest_extension_s { + uint8 valid; /* Set if the extension is present */ + uint32_t dst_sys_port; /* Destination System Port */ +} bkn_dnx_ftmh_dest_extension_t; + +/* dnx packet */ +typedef struct bkn_pkt_dnx_s { + uint32_t ntwrk_header_ptr; + struct { + uint32_t packet_size; /* Packet size in bytes */ + uint32_t action_type; /* Indicates if the copy is one of the Forward Snoop or Mirror packet copies */ + uint32_t pph_type; + uint32_t prio; /* Traffic class */ + uint32_t src_sys_port; /* Source System port*/ + } ftmh; + struct { + uint32_t vsi; + uint32_t trap_qualifier; /* RAW Data */ + uint32_t trap_id; /* RAW Data */ + } internal; +} bkn_dnx_packet_info; + + +#define PREV_IDX(_cur, _max) (((_cur) == 0) ? (_max) - 1 : (_cur) - 1) + +#if defined(CMIC_SOFT_BYTE_SWAP) + +#define CMIC_SWAP32(_x) ((((_x) & 0xff000000) >> 24) \ + | (((_x) & 0x00ff0000) >> 8) \ + | (((_x) & 0x0000ff00) << 8) \ + | (((_x) & 0x000000ff) << 24)) + +#define DEV_READ32(_d, _a, _p) \ + do { \ + uint32_t _data; \ + _data = (((volatile uint32_t *)(_d)->base_addr)[(_a)/4]); \ + *(_p) = CMIC_SWAP32(_data); \ + } while(0) + +#define DEV_WRITE32(_d, _a, _v) \ + do { \ + uint32_t _data = CMIC_SWAP32(_v); \ + ((volatile uint32_t *)(_d)->base_addr)[(_a)/4] = (_data); \ + } while(0) + +#else + +#define DEV_READ32(_d, _a, _p) \ + do { \ + *(_p) = (((volatile uint32_t *)(_d)->base_addr)[(_a)/4]); \ + } while(0) + +#define DEV_WRITE32(_d, _a, _v) \ + do { \ + ((volatile uint32_t *)(_d)->base_addr)[(_a)/4] = (_v); \ + } while(0) + +#endif /* defined(CMIC_SOFT_BYTE_SWAP) */ + +#define MEMORY_BARRIER smp_mb() + +/* Default random MAC address has Broadcom OUI with local admin bit set */ +static u8 bkn_dev_mac[6] = { 0x02, 0x10, 0x18, 0x00, 0x00, 0x00 }; + +static u8 bkn_rcpu_dmac[6]; +static u8 bkn_rcpu_smac[6]; + +/* Driver Proc Entry root */ +static struct proc_dir_entry *bkn_proc_root = NULL; + +typedef struct bkn_priv_s { + struct list_head list; + struct net_device_stats stats; + struct net_device *dev; + bkn_switch_info_t *sinfo; + int id; + int type; + int port; + uint8_t itmh[4]; + int qnum; + uint32_t vlan; + uint32_t flags; + uint32_t cb_user_data; +} bkn_priv_t; + +typedef struct bkn_filter_s { + struct list_head list; + int dev_no; + unsigned long hits; + kcom_filter_t kf; +} bkn_filter_t; + + +/* + * Multiple instance support in KNET + */ +static int _bkn_multi_inst = 0; +typedef struct { + wait_queue_head_t evt_wq; + int evt_wq_put; + int evt_wq_get; + uint32_t inst_id; +} bkn_evt_resource_t; + +static bkn_evt_resource_t _bkn_evt[LINUX_BDE_MAX_DEVICES]; + +static int bkn_knet_dev_init(int d); +static int bkn_knet_dev_reinit(int d); + +/* IOCTL debug counters */ +static int ioctl_cmd; +static int ioctl_evt; + +/* Switch devices */ +LIST_HEAD(_sinfo_list); + +/* Reallocation chunk size for netif array */ +#define NDEVS_CHUNK 64 + +/* User call-backs */ +static knet_skb_cb_f knet_rx_cb = NULL; +static knet_skb_cb_f knet_tx_cb = NULL; +static knet_filter_cb_f knet_filter_cb = NULL; + +/* + * Thread management + */ + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)) +/* + * Old style using kernel_thread() + */ +typedef struct { + const char * name; + volatile int pid; + volatile int run; + struct completion completion; + int state; +} bkn_thread_ctrl_t; + +static int +bkn_thread_start(bkn_thread_ctrl_t *tc, const char *name, + int (*threadfn)(void *)) +{ + if (name == NULL) { + return -1; + } + tc->name = name; + tc->pid = kernel_thread(threadfn, tc, 0); + if (tc->pid < 0) { + tc->pid = 0; + return -1; + } + tc->run = 1; + init_completion(&tc->completion); + return 0; +} + +static int +bkn_thread_stop(bkn_thread_ctrl_t *tc) +{ + if (tc->pid == 0) { + return 0; + } + tc->run = 0; + kill_proc(tc->pid, SIGTERM, 1); + wait_for_completion(&tc->completion); + return 0; +} + +static int +bkn_thread_should_stop(bkn_thread_ctrl_t *tc) +{ + if (tc->run) { + return 0; + } + tc->pid = 0; + return 1; +} + +static void +bkn_thread_boot(bkn_thread_ctrl_t *tc) +{ + siginitsetinv(¤t->blocked, sigmask(SIGTERM) | sigmask(SIGKILL)); +} + +static void +bkn_thread_exit(bkn_thread_ctrl_t *tc) +{ + complete_and_exit(&tc->completion, 0); +} + +static void +bkn_sleep(int clicks) +{ + wait_queue_head_t wq; + + init_waitqueue_head(&wq); + sleep_on_timeout(&wq, clicks); +} +#else +/* + * New style using kthread API + */ +#include +typedef struct { + const char * name; + struct task_struct *task; + int state; +} bkn_thread_ctrl_t; + +static int +bkn_thread_start(bkn_thread_ctrl_t *tc, const char *name, + int (*threadfn)(void *)) +{ + if (name == NULL) { + return -1; + } + tc->name = name; + tc->task = kthread_run(threadfn, tc, name); + if (IS_ERR(tc->task)) { + tc->task = NULL; + return -1; + } + return 0; +} + +static int +bkn_thread_stop(bkn_thread_ctrl_t *tc) +{ + if (tc->task == NULL) { + return 0; + } + send_sig(SIGTERM, tc->task, 0); + return kthread_stop(tc->task); +} + +static int +bkn_thread_should_stop(bkn_thread_ctrl_t *tc) +{ + return kthread_should_stop(); +} + +static void +bkn_thread_boot(bkn_thread_ctrl_t *tc) +{ + allow_signal(SIGTERM); + allow_signal(SIGKILL); +} + +static void +bkn_thread_exit(bkn_thread_ctrl_t *tc) +{ +} + +static void +bkn_sleep(int clicks) +{ + wait_queue_head_t wq; + + init_waitqueue_head(&wq); + wait_event_timeout(wq, 0, clicks); +} +#endif + +static bkn_thread_ctrl_t bkn_cmd_ctrl; +static bkn_thread_ctrl_t bkn_evt_ctrl; + +/* + * On XGS devices bit 15 fo the Transferred Bytes field in + * the DCBs is used to indicate that kernel processing is + * complete. Using this bit reduces the theoretically maximum + * supported packet size from 64K to 32K, but this is still + * adequate for 16K jumbo packets. + */ +#define SOC_DCB_KNET_DONE 0x8000 +#define SOC_DCB_KNET_COUNT_MASK 0x7fff +#define SOC_DCB_META_OFFSET 2 + +/* Default channel configuration */ +#define XGS_DMA_TX_CHAN 0 +#define XGS_DMA_RX_CHAN 1 + +/* CMIC registers */ +#define CMIC_DMA_CTRLr 0x00000100 +#define CMIC_DMA_STATr 0x00000104 +#define CMIC_DMA_DESC0r 0x00000110 +#define CMIC_IRQ_STATr 0x00000144 +#define CMIC_IRQ_MASKr 0x00000148 +#define CMIC_DEV_REV_IDr 0x00000178 + +/* CMIC interrupts reserved for kernel handler */ +#define CMIC_TXRX_IRQ_MASK 0x7f80 + +/* CMICm registers */ +#define CMICM_CMC_BASE 0x00031000 +#define CMICM_DMA_CTRLr (CMICM_CMC_BASE + 0x00000140) +#define CMICM_DMA_STATr (CMICM_CMC_BASE + 0x00000150) +#define CMICM_DMA_STAT_CLRr (CMICM_CMC_BASE + 0x000001a4) +#define CMICM_DMA_DESC0r (CMICM_CMC_BASE + 0x00000158) +#define CMICM_DMA_HALT_ADDRr (CMICM_CMC_BASE + 0x00000120) +#define CMICM_IRQ_STATr (CMICM_CMC_BASE + 0x00000400) +#define CMICM_IRQ_PCI_MASKr (CMICM_CMC_BASE + 0x00000414) +#define CMICM_IRQ_UC0_MASKr (CMICM_CMC_BASE + 0x00000428) +#define CMICM_DEV_REV_IDr 0x00010224 + +/* CMICm interrupts reserved for kernel handler */ +#define CMICM_TXRX_IRQ_MASK 0xff00 + +/* CMICd increased interrupts reserved for kernel handler */ +#define CMICD_CTRLD_IRQ_MASK 0x78000000 + +/* CMICx registers */ +#define CMICX_CMC_BASE 0x00000000 +#define CMICX_DMA_CTRLr (CMICX_CMC_BASE + 0x00002100) +#define CMICX_DMA_STATr (CMICX_CMC_BASE + 0x00002114) +#define CMICX_DMA_DESC_HIr (CMICX_CMC_BASE + 0x00002108) +#define CMICX_DMA_DESC_LOr (CMICX_CMC_BASE + 0x00002104) +#define CMICX_DMA_HALT_HIr (CMICX_CMC_BASE + 0x00002110) +#define CMICX_DMA_HALT_LOr (CMICX_CMC_BASE + 0x0000210c) +#define CMICX_IRQ_STATr (CMICX_CMC_BASE + 0x0000106c) +#define CMICX_IRQ_STAT_CLRr (CMICX_CMC_BASE + 0x00001074) +#define CMICX_IRQ_ENABr 0x18013100 + +/* CMICx interrupts reserved for kernel handler */ +#define CMICX_TXRX_IRQ_MASK 0xffffffff + +#define DEV_IS_CMICX(_sinfo) ((_sinfo)->cmic_type == 'x') +#define DEV_IS_CMICM(_sinfo) ((_sinfo)->cmic_type == 'm') +#define CDMA_CH(_d, _ch) ((_d)->cdma_channels & (1 << (_ch))) + +/* + * DMA_STAT: control bits + * + * xxx_SET and xxx_CLR can be WRITTEN to CMIC_DMA_STAT + * xxx_TST can be masked against values read from CMIC_DMA_STAT. + * Argument required: 0 <= ch <= 3 + */ +#define DS_DMA_ACTIVE(ch) (0x00040000 << (ch)) +#define DS_DMA_EN_SET(ch) (0x80|(ch)) +#define DS_DMA_EN_CLR(ch) (0x00|(ch)) +#define DS_DMA_EN_TST(ch) (0x00000001 << (ch)) + +#define DS_CHAIN_DONE_SET(ch) (0x80|(4+(ch))) +#define DS_CHAIN_DONE_CLR(ch) (0x00|(4+(ch))) +#define DS_CHAIN_DONE_TST(ch) (0x00000010 << (ch)) + +#define DS_DESC_DONE_SET(ch) (0x80|(8+(ch))) +#define DS_DESC_DONE_CLR(ch) (0x00|(8+(ch))) +#define DS_DESC_DONE_TST(ch) (0x00000100 << (ch)) + +#define DC_ABORT_DMA(ch) (0x04 << (8 * (ch))) + +#define DS_CMC_DESCRD_CMPLT_CLR(ch) (0x00000001 << (ch)) +#define DS_CMC_CTRLD_INT_CLR(ch) (0x00000100 << (ch)) +#define DS_CMC_DMA_ACTIVE(ch) (0x00000100 << (ch)) + +#define CMICX_DS_CMC_DESC_DONE(ch) (0x00000001 << ((ch) * 4)) +#define CMICX_DS_CMC_CHAIN_DONE(ch) (0x00000002 << ((ch) * 4)) +#define CMICX_DS_CMC_CTRLD_INT(ch) (0x00000008 << ((ch) * 4)) +#define CMICX_DS_CMC_DMA_ACTIVE (0x00000002) + +#define DMA_TO_BUS_HI(dma) ((dma) | sinfo->dma_hi) +#define BUS_TO_DMA_HI(bus) ((bus) & ~sinfo->dma_hi) + +/* + * DMA_CTRL: control bits + */ +#define DC_CMC_DIRECTION (0x00000001) +#define DC_CMC_ENABLE (0x00000002) +#define DC_CMC_ABORT (0x00000004) +#define DC_CMC_CTRLD_INT (0x00000100) +#define DC_CMC_CONTINUOUS (0x00000200) + +#define CMICX_DC_CMC_DIRECTION (0x00000001) +#define CMICX_DC_CMC_ENABLE (0x00000002) +#define CMICX_DC_CMC_ABORT (0x00000004) +#define CMICX_DC_CMC_CTRLD_INT (0x00000080) +#define CMICX_DC_CMC_CONTINUOUS (0x00000100) + +/* + * Per-channel operations. + * These are the basis for the TX/RX functions + */ + +static inline void +xgs_dma_chain_clear(bkn_switch_info_t *sinfo, int chan) +{ + DBG_IRQ(("Clear chain on device %d chan %d\n", + sinfo->dev_no, chan)); + DEV_WRITE32(sinfo, CMIC_DMA_STATr, DS_DMA_EN_CLR(chan)); + DEV_WRITE32(sinfo, CMIC_DMA_STATr, DS_CHAIN_DONE_CLR(chan)); + + MEMORY_BARRIER; +} + +static inline void +xgs_dma_desc_clear(bkn_switch_info_t *sinfo, int chan) +{ + uint32_t val; + + DBG_IRQ(("Clear desc on device %d chan %d\n", + sinfo->dev_no, chan)); + DEV_WRITE32(sinfo, CMIC_DMA_STATr, DS_DESC_DONE_CLR(chan)); + + MEMORY_BARRIER; + + /* Flush write buffer */ + DEV_READ32(sinfo, CMIC_DMA_STATr, &val); + + MEMORY_BARRIER; +} + +static int +xgs_dma_chan_clear(bkn_switch_info_t *sinfo, int chan) +{ + xgs_dma_chain_clear(sinfo, chan); + xgs_dma_desc_clear(sinfo, chan); + + return 0; +} + +static int +xgs_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir) +{ + uint32_t cdc; + + DEV_READ32(sinfo, CMIC_DMA_CTRLr, &cdc); + + cdc &= ~(0x9 << (8 * chan)); + if (dir) { + cdc |= 0x1 << (8 * chan); + } else { + cdc |= 0x8 << (8 * chan); + } + + DEV_WRITE32(sinfo, CMIC_DMA_CTRLr, cdc); + + return 0; +} + +static int +xgs_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) +{ + /* Write the DCB address to the DESC address for this channel */ + DEV_WRITE32(sinfo, CMIC_DMA_DESC0r + 4 * chan, dcb); + + MEMORY_BARRIER; + + /* Kick it off */ + DEV_WRITE32(sinfo, CMIC_DMA_STATr, DS_DMA_EN_SET(chan)); + + MEMORY_BARRIER; + + return 0; +} + +static int +xgs_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls) +{ + uint32_t ctrl, dma_stat; + int p; + + /* Clear enable */ + DEV_WRITE32(sinfo, CMIC_DMA_STATr, DS_DMA_EN_CLR(chan)); + + MEMORY_BARRIER; + + /* Abort the channel */ + DEV_READ32(sinfo, CMIC_DMA_CTRLr, &ctrl); + DEV_WRITE32(sinfo, CMIC_DMA_CTRLr, ctrl | DC_ABORT_DMA(chan)); + + MEMORY_BARRIER; + + /* Poll for abort completion */ + for (p = 0; p < polls; p++) { + DEV_READ32(sinfo, CMIC_DMA_STATr, &dma_stat); + if (!(dma_stat & DS_DMA_ACTIVE(chan))) { + /* Restore previous control value */ + DEV_WRITE32(sinfo, CMIC_DMA_CTRLr, ctrl); + + MEMORY_BARRIER; + + /* Clear up channel */ + xgs_dma_chan_clear(sinfo, chan); + + return polls; + } + } + DBG_WARN(("DMA channel %d abort failed\n", chan)); + + return -1; +} + +static inline void +xgs_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) +{ + if (sinfo->napi_poll_mode) { + mask = 0; + } + lkbde_irq_mask_set(sinfo->dev_no | LKBDE_ISR2_DEV, CMIC_IRQ_MASKr, + mask, CMIC_TXRX_IRQ_MASK); +} + +static inline void +xgs_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t mask; + + if (chan == XGS_DMA_TX_CHAN) { + mask = 0x100; + } else { + mask = 0x180 << (2 * chan); + } + + sinfo->irq_mask |= mask; + + if (update_hw) { + xgs_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + +static inline void +xgs_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t mask; + + if (chan == XGS_DMA_TX_CHAN) { + mask = 0x100; + } else { + mask = 0x180 << (2 * chan); + } + + sinfo->irq_mask &= ~mask; + + if (update_hw) { + xgs_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + +static inline void +xgsm_dma_chain_clear(bkn_switch_info_t *sinfo, int chan) +{ + uint32_t cdc; + + /* Disabing DMA clears chain done */ + DEV_READ32(sinfo, CMICM_DMA_CTRLr + 4 * chan, &cdc); + cdc &= ~(DC_CMC_ENABLE | DC_CMC_ABORT); + DEV_WRITE32(sinfo, CMICM_DMA_CTRLr + 4 * chan, cdc); + + MEMORY_BARRIER; +} + +static inline void +xgsm_dma_desc_clear(bkn_switch_info_t *sinfo, int chan) +{ + uint32_t val; + + val = DS_CMC_DESCRD_CMPLT_CLR(chan); + if (CDMA_CH(sinfo, chan)) { + val |= DS_CMC_CTRLD_INT_CLR(chan); + } + DEV_WRITE32(sinfo, CMICM_DMA_STAT_CLRr, val); + + MEMORY_BARRIER; + + /* Flush write buffer */ + DEV_READ32(sinfo, CMICM_DMA_STAT_CLRr, &val); + + MEMORY_BARRIER; +} + +static int +xgsm_dma_chan_clear(bkn_switch_info_t *sinfo, int chan) +{ + xgsm_dma_chain_clear(sinfo, chan); + xgsm_dma_desc_clear(sinfo, chan); + + return 0; +} + +static inline void +xgsm_cdma_halt_set(bkn_switch_info_t *sinfo, int chan) +{ + DEV_WRITE32(sinfo, CMICM_DMA_HALT_ADDRr + 4 * chan, + sinfo->halt_addr[chan]); + + MEMORY_BARRIER; +} + +static int +xgsm_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir) +{ + uint32_t cdc; + + DEV_READ32(sinfo, CMICM_DMA_CTRLr + 4 * chan, &cdc); + cdc &= ~DC_CMC_DIRECTION; + if (dir) { + cdc |= DC_CMC_DIRECTION; + } + if (CDMA_CH(sinfo, chan)) { + cdc |= DC_CMC_CONTINUOUS | DC_CMC_CTRLD_INT; + xgsm_cdma_halt_set(sinfo, chan); + } + DEV_WRITE32(sinfo, CMICM_DMA_CTRLr + 4 * chan, cdc); + + return 0; +} + +static int +xgsm_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) +{ + uint32_t cdc; + + /* Write the DCB address to the DESC address for this channel */ + DEV_WRITE32(sinfo, CMICM_DMA_DESC0r + 4 * chan, dcb); + + MEMORY_BARRIER; + + /* Kick it off */ + DEV_READ32(sinfo, CMICM_DMA_CTRLr + 4 * chan, &cdc); + cdc |= DC_CMC_ENABLE; + DEV_WRITE32(sinfo, CMICM_DMA_CTRLr + 4 * chan, cdc); + + MEMORY_BARRIER; + + return 0; +} + +static int +xgsm_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls) +{ + uint32_t ctrl, dma_stat; + int p; + + /* Skip abort sequence if channel is not active */ + DEV_READ32(sinfo, CMICM_DMA_STATr, &dma_stat); + if (!(dma_stat & DS_CMC_DMA_ACTIVE(chan))) { + return 0; + } + + /* Abort the channel */ + DEV_READ32(sinfo, CMICM_DMA_CTRLr + 4 * chan, &ctrl); + ctrl |= (DC_CMC_ENABLE | DC_CMC_ABORT); + DEV_WRITE32(sinfo, CMICM_DMA_CTRLr + 4 * chan, ctrl); + + MEMORY_BARRIER; + + /* Poll for abort completion */ + for (p = 0; p < polls; p++) { + DEV_READ32(sinfo, CMICM_DMA_STATr, &dma_stat); + if (!(dma_stat & DS_CMC_DMA_ACTIVE(chan))) { + /* Clear up channel */ + xgsm_dma_chan_clear(sinfo, chan); + return polls; + } + } + DBG_WARN(("DMA channel %d abort failed\n", chan)); + + return -1; +} + +static inline void +xgsm_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) +{ + uint32_t irq_mask_reg = CMICM_IRQ_PCI_MASKr; + uint32_t ctrld_mask = 0; + + if (sinfo->napi_poll_mode) { + mask = 0; + } + if (sinfo->cpu_no == 1) { + irq_mask_reg = CMICM_IRQ_UC0_MASKr; + } + + /* Get the Controlled Interrupts mask for Continuous DMA mode */ + ctrld_mask |= (sinfo->cdma_channels << 27) & CMICD_CTRLD_IRQ_MASK; + + lkbde_irq_mask_set(sinfo->dev_no | LKBDE_ISR2_DEV, irq_mask_reg, + mask, CMICM_TXRX_IRQ_MASK | ctrld_mask); +} + +static inline void +xgsm_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t mask; + + if (CDMA_CH(sinfo, chan)) { + mask = 0x08000000 << chan; + } else { + if (chan == XGS_DMA_TX_CHAN) { + mask = 0x8000; + } else { + mask = 0xc000 >> (2 * chan); + } + } + + sinfo->irq_mask |= mask; + + if (update_hw) { + xgsm_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + +static inline void +xgsm_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t mask; + + if (CDMA_CH(sinfo, chan)) { + mask = 0x08000000 << chan; + } else { + if (chan == XGS_DMA_TX_CHAN) { + mask = 0x8000; + } else { + mask = 0xc000 >> (2 * chan); + } + } + + sinfo->irq_mask &= ~mask; + + if (update_hw) { + xgsm_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + +static inline void +xgsx_dma_chain_clear(bkn_switch_info_t *sinfo, int chan) +{ + uint32_t ctrl, stat; + + /* Disabing DMA clears chain done */ + DEV_READ32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl &= ~(CMICX_DC_CMC_ENABLE | CMICX_DC_CMC_ABORT); + DEV_WRITE32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, ctrl); + + stat = CMICX_DS_CMC_CHAIN_DONE(chan); + DEV_WRITE32(sinfo, CMICX_IRQ_STAT_CLRr, stat); + + MEMORY_BARRIER; + + /* Flush write buffer */ + DEV_READ32(sinfo, CMICX_IRQ_STAT_CLRr, &stat); + + MEMORY_BARRIER; +} + +static inline void +xgsx_dma_desc_clear(bkn_switch_info_t *sinfo, int chan) +{ + uint32_t stat; + + if (CDMA_CH(sinfo, chan)) { + stat = CMICX_DS_CMC_CTRLD_INT(chan); + } else { + stat = CMICX_DS_CMC_DESC_DONE(chan); + } + DEV_WRITE32(sinfo, CMICX_IRQ_STAT_CLRr, stat); + + MEMORY_BARRIER; + + /* Flush write buffer */ + DEV_READ32(sinfo, CMICX_IRQ_STAT_CLRr, &stat); + + MEMORY_BARRIER; +} + +static int +xgsx_dma_chan_clear(bkn_switch_info_t *sinfo, int chan) +{ + xgsx_dma_chain_clear(sinfo, chan); + xgsx_dma_desc_clear(sinfo, chan); + + return 0; +} + +static inline void +xgsx_cdma_halt_set(bkn_switch_info_t *sinfo, int chan) +{ + DEV_WRITE32(sinfo, CMICX_DMA_HALT_LOr + 0x80 * chan, + sinfo->halt_addr[chan]); + DEV_WRITE32(sinfo, CMICX_DMA_HALT_HIr + 0x80 * chan, + DMA_TO_BUS_HI(sinfo->halt_addr[chan] >> 32)); + + MEMORY_BARRIER; +} + +static int +xgsx_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir) +{ + uint32_t ctrl; + + DEV_READ32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl &= ~CMICX_DC_CMC_DIRECTION; + if (dir) { + ctrl |= CMICX_DC_CMC_DIRECTION; + } + if (CDMA_CH(sinfo, chan)) { + ctrl |= CMICX_DC_CMC_CONTINUOUS | CMICX_DC_CMC_CTRLD_INT; + xgsx_cdma_halt_set(sinfo, chan); + } + DEV_WRITE32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, ctrl); + + MEMORY_BARRIER; + + return 0; +} + +static int +xgsx_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) +{ + uint32_t ctrl; + + /* Write the DCB address to the DESC address for this channel */ + DEV_WRITE32(sinfo, CMICX_DMA_DESC_LOr + 0x80 * chan, dcb); + DEV_WRITE32(sinfo, CMICX_DMA_DESC_HIr + 0x80 * chan, DMA_TO_BUS_HI(dcb >> 32)); + + MEMORY_BARRIER; + + /* Kick it off */ + DEV_READ32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl |= CMICX_DC_CMC_ENABLE; + DEV_WRITE32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, ctrl); + + MEMORY_BARRIER; + + return 0; +} + +static int +xgsx_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls) +{ + uint32_t ctrl, stat; + int p; + + /* Skip abort sequence if channel is not active */ + DEV_READ32(sinfo, CMICX_DMA_STATr + 0x80 * chan, &stat); + if (!(stat & CMICX_DS_CMC_DMA_ACTIVE)) { + return 0; + } + + /* Abort the channel */ + DEV_READ32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl |= CMICX_DC_CMC_ENABLE | CMICX_DC_CMC_ABORT; + DEV_WRITE32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, ctrl); + + MEMORY_BARRIER; + + /* Poll for abort completion */ + for (p = 0; p < polls; p++) { + DEV_READ32(sinfo, CMICX_DMA_STATr + 0x80 * chan, &stat); + if (!(stat & CMICX_DS_CMC_DMA_ACTIVE)) { + /* Clear up channel */ + xgsx_dma_chan_clear(sinfo, chan); + return polls; + } + } + + DBG_WARN(("DMA channel %d abort failed\n", chan)); + + return -1; +} + +static inline void +xgsx_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) +{ + if (sinfo->napi_poll_mode) { + mask = 0; + } + + lkbde_irq_mask_set(sinfo->dev_no | LKBDE_ISR2_DEV | LKBDE_IPROC_REG, + CMICX_IRQ_ENABr, mask, CMICX_TXRX_IRQ_MASK); +} + +static inline void +xgsx_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t mask; + + if (CDMA_CH(sinfo, chan)) { + mask = CMICX_DS_CMC_CTRLD_INT(chan); + } else { + if (chan == XGS_DMA_TX_CHAN) { + mask = CMICX_DS_CMC_CHAIN_DONE(chan); + } else { + mask = CMICX_DS_CMC_DESC_DONE(chan) | + CMICX_DS_CMC_CHAIN_DONE(chan); + } + } + + sinfo->irq_mask |= mask; + + if (update_hw) { + xgsx_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + +static inline void +xgsx_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t mask; + + if (CDMA_CH(sinfo, chan)) { + mask = CMICX_DS_CMC_CTRLD_INT(chan); + } else { + if (chan == XGS_DMA_TX_CHAN) { + mask = CMICX_DS_CMC_CHAIN_DONE(chan); + } else { + mask = CMICX_DS_CMC_DESC_DONE(chan) | + CMICX_DS_CMC_CHAIN_DONE(chan); + } + } + + sinfo->irq_mask &= ~mask; + + if (update_hw) { + xgsx_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + +static inline void +dev_dma_chain_clear(bkn_switch_info_t *sinfo, int chan) +{ + if (DEV_IS_CMICX(sinfo)) { + xgsx_dma_chain_clear(sinfo, chan); + } else if (DEV_IS_CMICM(sinfo)) { + xgsm_dma_chain_clear(sinfo, chan); + } else { + xgs_dma_chain_clear(sinfo, chan); + } +} + +static inline void +dev_dma_desc_clear(bkn_switch_info_t *sinfo, int chan) +{ + if (DEV_IS_CMICX(sinfo)) { + xgsx_dma_desc_clear(sinfo, chan); + } else if (DEV_IS_CMICM(sinfo)) { + xgsm_dma_desc_clear(sinfo, chan); + } else { + xgs_dma_desc_clear(sinfo, chan); + } +} + +static int +dev_dma_chan_clear(bkn_switch_info_t *sinfo, int chan) +{ + if (DEV_IS_CMICX(sinfo)) { + return xgsx_dma_chan_clear(sinfo, chan); + } else if (DEV_IS_CMICM(sinfo)) { + return xgsm_dma_chan_clear(sinfo, chan); + } else { + return xgs_dma_chan_clear(sinfo, chan); + } +} + +static void +dev_cdma_halt_set(bkn_switch_info_t *sinfo, int chan) +{ + if (DEV_IS_CMICX(sinfo)) { + xgsx_cdma_halt_set(sinfo, chan); + } else if (DEV_IS_CMICM(sinfo)) { + xgsm_cdma_halt_set(sinfo, chan); + } +} + +static int +dev_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir) +{ + if (DEV_IS_CMICX(sinfo)) { + return xgsx_dma_chan_init(sinfo, chan, dir); + } else if (DEV_IS_CMICM(sinfo)) { + return xgsm_dma_chan_init(sinfo, chan, dir); + } else { + return xgs_dma_chan_init(sinfo, chan, dir); + } +} + +static int +dev_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) +{ + if (DEV_IS_CMICX(sinfo)) { + return xgsx_dma_chan_start(sinfo, chan, dcb); + } else if (DEV_IS_CMICM(sinfo)) { + return xgsm_dma_chan_start(sinfo, chan, dcb); + } else { + return xgs_dma_chan_start(sinfo, chan, dcb); + } +} + +static int +dev_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls) +{ + if (DEV_IS_CMICX(sinfo)) { + return xgsx_dma_chan_abort(sinfo, chan, polls); + } else if (DEV_IS_CMICM(sinfo)) { + return xgsm_dma_chan_abort(sinfo, chan, polls); + } else { + return xgs_dma_chan_abort(sinfo, chan, polls); + } +} + +static inline void +dev_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) +{ + if (DEV_IS_CMICX(sinfo)) { + xgsx_irq_mask_set(sinfo, mask); + } else if (DEV_IS_CMICM(sinfo)) { + xgsm_irq_mask_set(sinfo, mask); + } else { + xgs_irq_mask_set(sinfo, mask); + } +} + +static inline void +dev_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + if (DEV_IS_CMICX(sinfo)) { + xgsx_irq_mask_enable(sinfo, chan, update_hw); + } else if (DEV_IS_CMICM(sinfo)) { + xgsm_irq_mask_enable(sinfo, chan, update_hw); + } else { + xgs_irq_mask_enable(sinfo, chan, update_hw); + } +} + +static void +dev_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + if (DEV_IS_CMICX(sinfo)) { + xgsx_irq_mask_disable(sinfo, chan, update_hw); + } else if (DEV_IS_CMICM(sinfo)) { + xgsm_irq_mask_disable(sinfo, chan, update_hw); + } else { + xgs_irq_mask_disable(sinfo, chan, update_hw); + } +} + +static int +bkn_alloc_dcbs(bkn_switch_info_t *sinfo) +{ + int dcb_size; + int tx_ring_size, rx_ring_size; + dma_addr_t dcb_dma = 0; + + dcb_size = sinfo->dcb_wsize * sizeof(uint32_t); + tx_ring_size = dcb_size * (MAX_TX_DCBS + 1); + rx_ring_size = dcb_size * (MAX_RX_DCBS + 1); + sinfo->dcb_mem_size = tx_ring_size + rx_ring_size * sinfo->rx_chans; + + sinfo->dcb_mem = DMA_ALLOC_COHERENT(sinfo->dma_dev, + sinfo->dcb_mem_size, + &dcb_dma); + if (sinfo->dcb_mem == NULL) { + gprintk("DCB memory allocation (%d bytes) failed.\n", + sinfo->dcb_mem_size); + return -ENOMEM; + } + sinfo->dcb_dma = (uint64_t)dcb_dma; + + return 0; +} + +static void +bkn_free_dcbs(bkn_switch_info_t *sinfo) +{ + if (sinfo->dcb_mem != NULL) { + DMA_FREE_COHERENT(sinfo->dma_dev, sinfo->dcb_mem_size, + sinfo->dcb_mem, (dma_addr_t)sinfo->dcb_dma); + sinfo->dcb_mem = NULL; + } +} + +static void +bkn_clean_tx_dcbs(bkn_switch_info_t *sinfo) +{ + bkn_desc_info_t *desc; + + DBG_DCB_TX(("Cleaning Tx DCBs (%d %d).\n", + sinfo->tx.cur, sinfo->tx.dirty)); + while (sinfo->tx.free < MAX_TX_DCBS) { + desc = &sinfo->tx.desc[sinfo->tx.dirty]; + if (desc->skb != NULL) { + DBG_SKB(("Cleaning Tx SKB from DCB %d.\n", + sinfo->tx.dirty)); + DMA_UNMAP_SINGLE(sinfo->dma_dev, + desc->skb_dma, desc->dma_size, + DMA_TODEV); + desc->skb_dma = 0; + dev_kfree_skb_any(desc->skb); + desc->skb = NULL; + } + if (++sinfo->tx.dirty >= MAX_TX_DCBS) { + sinfo->tx.dirty = 0; + } + sinfo->tx.free++; + } + sinfo->tx.api_active = 0; + DBG_DCB_TX(("Cleaned Tx DCBs (%d %d).\n", + sinfo->tx.cur, sinfo->tx.dirty)); +} + +static void +bkn_clean_rx_dcbs(bkn_switch_info_t *sinfo, int chan) +{ + bkn_desc_info_t *desc; + + DBG_DCB_RX(("Cleaning Rx%d DCBs (%d %d).\n", + chan, sinfo->rx[chan].cur, sinfo->rx[chan].dirty)); + while (sinfo->rx[chan].free) { + desc = &sinfo->rx[chan].desc[sinfo->rx[chan].dirty]; + if (desc->skb != NULL) { + DBG_SKB(("Cleaning Rx%d SKB from DCB %d.\n", + chan, sinfo->rx[chan].dirty)); + DMA_UNMAP_SINGLE(sinfo->dma_dev, + desc->skb_dma, desc->dma_size, + DMA_FROMDEV); + desc->skb_dma = 0; + dev_kfree_skb_any(desc->skb); + desc->skb = NULL; + } + if (++sinfo->rx[chan].dirty >= MAX_RX_DCBS) { + sinfo->rx[chan].dirty = 0; + } + sinfo->rx[chan].free--; + } + sinfo->rx[chan].running = 0; + sinfo->rx[chan].api_active = 0; + DBG_DCB_RX(("Cleaned Rx%d DCBs (%d %d).\n", + chan, sinfo->rx[chan].cur, sinfo->rx[chan].dirty)); +} + +static void +bkn_clean_dcbs(bkn_switch_info_t *sinfo) +{ + int chan; + + bkn_clean_tx_dcbs(sinfo); + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + bkn_clean_rx_dcbs(sinfo, chan); + } +} + +static void +bkn_init_dcbs(bkn_switch_info_t *sinfo) +{ + int dcb_size; + uint32_t *dcb_mem; + uint64_t dcb_dma; + bkn_desc_info_t *desc; + int idx; + int chan; + + memset(sinfo->dcb_mem, 0, sinfo->dcb_mem_size); + + dcb_size = sinfo->dcb_wsize * sizeof(uint32_t); + dcb_mem = sinfo->dcb_mem; + dcb_dma = sinfo->dcb_dma; + + for (idx = 0; idx < (MAX_TX_DCBS + 1); idx++) { + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + if (sinfo->cmic_type == 'x') { + dcb_mem[2] |= 1 << 24 | 1 << 16; + } else { + dcb_mem[1] |= 1 << 24 | 1 << 16; + } + if (idx == MAX_TX_DCBS) { + if (sinfo->cmic_type == 'x') { + dcb_mem[0] = sinfo->tx.desc[0].dcb_dma; + dcb_mem[1] = DMA_TO_BUS_HI(sinfo->tx.desc[0].dcb_dma >> 32); + dcb_mem[2] |= 1 << 18; + } else { + dcb_mem[0] = sinfo->tx.desc[0].dcb_dma; + dcb_mem[1] |= 1 << 18; + } + } + } + desc = &sinfo->tx.desc[idx]; + desc->dcb_mem = dcb_mem; + desc->dcb_dma = dcb_dma; + dcb_mem += sinfo->dcb_wsize; + dcb_dma += dcb_size; + } + sinfo->halt_addr[XGS_DMA_TX_CHAN] = sinfo->tx.desc[0].dcb_dma; + sinfo->tx.free = MAX_TX_DCBS; + sinfo->tx.cur = 0; + sinfo->tx.dirty = 0; + + DBG_DCB_TX(("Tx DCBs @ 0x%08x.\n", + (uint32_t)sinfo->tx.desc[0].dcb_dma)); + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + for (idx = 0; idx < (MAX_RX_DCBS + 1); idx++) { + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + if (sinfo->cmic_type == 'x') { + dcb_mem[2] |= 1 << 24 | 1 << 16; + } else { + dcb_mem[1] |= 1 << 24 | 1 << 16; + } + if (idx == MAX_RX_DCBS) { + if (sinfo->cmic_type == 'x') { + dcb_mem[0] = sinfo->rx[chan].desc[0].dcb_dma; + dcb_mem[1] = DMA_TO_BUS_HI(sinfo->rx[chan].desc[0].dcb_dma >> 32); + dcb_mem[2] |= 1 << 18; + } else { + dcb_mem[0] = sinfo->rx[chan].desc[0].dcb_dma; + dcb_mem[1] |= 1 << 18; + } + } + } + desc = &sinfo->rx[chan].desc[idx]; + desc->dcb_mem = dcb_mem; + desc->dcb_dma = dcb_dma; + dcb_mem += sinfo->dcb_wsize; + dcb_dma += dcb_size; + } + sinfo->halt_addr[XGS_DMA_RX_CHAN + chan] = sinfo->rx[chan].desc[MAX_RX_DCBS].dcb_dma; + sinfo->rx[chan].free = 0; + sinfo->rx[chan].cur = 0; + sinfo->rx[chan].dirty = 0; + + DBG_DCB_RX(("Rx%d DCBs @ 0x%08x.\n", + chan, (uint32_t)sinfo->rx[chan].desc[0].dcb_dma)); + } +} + +static void +bkn_dump_dcb(char *prefix, uint32_t *dcb, int wsize, int txrx) +{ + if (XGS_DMA_TX_CHAN == txrx) { + if (wsize > 4) { + DBG_DCB_TX(("%s: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x ... 0x%08x\n", + prefix, dcb[0], dcb[1], dcb[2], dcb[3], dcb[4], dcb[5], + dcb[wsize - 1])); + } else { + DBG_DCB_TX(("%s: 0x%08x 0x%08x 0x%08x 0x%08x\n", + prefix, dcb[0], dcb[1], dcb[2], dcb[3])); + } + } else { + if (wsize > 4) { + DBG_DCB_RX(("%s: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x ... 0x%08x\n", + prefix, dcb[0], dcb[1], dcb[2], dcb[3], dcb[4], dcb[5], + dcb[wsize - 1])); + } else { + DBG_DCB_RX(("%s: 0x%08x 0x%08x 0x%08x 0x%08x\n", + prefix, dcb[0], dcb[1], dcb[2], dcb[3])); + } + } +} + +static void +bkn_dump_pkt(uint8_t *data, int size, int txrx) +{ + int idx; + char str[128]; + + if (!(debug & DBG_LVL_PDMP) && + !(txrx == XGS_DMA_TX_CHAN && debug & DBG_LVL_PDMP_TX) && + !(txrx == XGS_DMA_RX_CHAN && debug & DBG_LVL_PDMP_RX)) { + return; + } + + for (idx = 0; idx < size; idx++) { + if ((idx & 0xf) == 0) { + sprintf(str, "%04x: ", idx); + } + if ((idx & 0xf) == 8) { + sprintf(&str[strlen(str)], "- "); + } + sprintf(&str[strlen(str)], "%02x ", data[idx]); + if ((idx & 0xf) == 0xf) { + sprintf(&str[strlen(str)], "\n"); + gprintk(str); + } + } + if ((idx & 0xf) != 0) { + sprintf(&str[strlen(str)], "\n"); + gprintk(str); + } +} + +static bkn_switch_info_t * +bkn_sinfo_from_unit(int unit) +{ + struct list_head *list; + bkn_switch_info_t *sinfo; + + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + if (sinfo->dev_no == unit || unit == -1) { + return sinfo; + } + } + return NULL; +} + +static void +bkn_cdma_goto(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) +{ + if (sinfo->basedev_suspended) { + return; + } + + /* Set the new halt location */ + sinfo->halt_addr[chan] = dcb; + dev_cdma_halt_set(sinfo, chan); +} + +static void +bkn_api_rx_restart(bkn_switch_info_t *sinfo, int chan) +{ + bkn_dcb_chain_t *dcb_chain; + int start_dma; + + if (sinfo->basedev_suspended) { + return; + } + + /* If resume from basedev suspended, there could be a suspended chain */ + if (sinfo->rx[chan].api_dcb_chain) { + return; + } + + /* Assume that driver lock is held */ + if (!list_empty(&sinfo->rx[chan].api_dcb_list)) { + dcb_chain = list_entry(sinfo->rx[chan].api_dcb_list.next, + bkn_dcb_chain_t, list); + start_dma = 0; + if (sinfo->rx[chan].use_rx_skb == 0) { + sinfo->rx[chan].chain_complete = 0; + start_dma = 1; + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan) && + sinfo->rx[chan].api_active) { + /* HW is running already, so we just move to the next chain */ + start_dma = 0; + } + } + sinfo->rx[chan].api_dcb_chain = dcb_chain; + sinfo->rx[chan].api_active = 1; + if (start_dma) { + DBG_DCB_RX(("Start API Rx DMA, first DCB @ 0x%08x (%d DCBs).\n", + (uint32_t)dcb_chain->dcb_dma, dcb_chain->dcb_cnt)); + dev_dma_chan_clear(sinfo, XGS_DMA_RX_CHAN + chan); + dev_irq_mask_enable(sinfo, XGS_DMA_RX_CHAN + chan, 1); + dev_dma_chan_start(sinfo, XGS_DMA_RX_CHAN + chan, dcb_chain->dcb_dma); + } + + list_del(&dcb_chain->list); + } +} + +static void +bkn_api_rx_chain_done(bkn_switch_info_t *sinfo, int chan) +{ + DBG_DCB_RX(("API Rx DMA chain done\n")); + + if (!CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + sinfo->rx[chan].api_active = 0; + } + if (sinfo->rx[chan].api_dcb_chain) { + kfree(sinfo->rx[chan].api_dcb_chain); + sinfo->rx[chan].api_dcb_chain = NULL; + } + bkn_api_rx_restart(sinfo, chan); +} + +static int +bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo, + int chan, bkn_desc_info_t *desc) +{ + bkn_dcb_chain_t *dcb_chain; + uint32_t *dcb; + uint32_t dcb_stat; + uint8_t *pkt; + uint64_t pkt_dma; + int pktlen; + int i; + bkn_evt_resource_t *evt; + + dcb_stat = desc->dcb_mem[sinfo->dcb_wsize-1]; + pktlen = dcb_stat & SOC_DCB_KNET_COUNT_MASK; + + dcb_chain = sinfo->rx[chan].api_dcb_chain; + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan) && dcb_chain == NULL) { + /* Last chain done, try to get a new one */ + bkn_api_rx_chain_done(sinfo, chan); + dcb_chain = sinfo->rx[chan].api_dcb_chain; + } + if (dcb_chain == NULL) { + DBG_WARN(("No Rx API buffers\n")); + sinfo->rx[chan].pkts_d_no_api_buf++; + return -1; + } + dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize]; + if ((sinfo->cmic_type == 'x' && (dcb[2] & 0xffff) < pktlen) || + (sinfo->cmic_type != 'x' && (dcb[1] & 0xffff) < pktlen)) { + DBG_WARN(("Rx API buffer too small\n")); + return -1; + } + if (sinfo->cmic_type == 'x') { + pkt_dma = BUS_TO_DMA_HI(dcb[1]); + pkt_dma = pkt_dma << 32 | dcb[0]; + } else { + pkt_dma = dcb[0]; + } + pkt = (uint8_t *)kernel_bde->p2l(sinfo->dev_no, (sal_paddr_t)pkt_dma); + if (pkt == NULL) { + DBG_WARN(("Invalid Rx API buffer\n")); + return -1; + } + + /* Copy packet data */ + memcpy(pkt, desc->skb->data, pktlen); + + /* Copy packet metadata and mark as done */ + if (sinfo->cmic_type != 'x') { + for (i = SOC_DCB_META_OFFSET; i < sinfo->dcb_wsize; i++) { + dcb[i] = desc->dcb_mem[i]; + } + } + dcb[sinfo->dcb_wsize-1] = dcb_stat | SOC_DCB_KNET_DONE; + MEMORY_BARRIER; + + dcb_chain->dcb_cur++; + + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize]; + if ((sinfo->cmic_type == 'x' && dcb[2] & (1 << 18)) || + (sinfo->cmic_type != 'x' && dcb[1] & (1 << 18))) { + /* Get the next chain if reload done */ + dcb[sinfo->dcb_wsize-1] |= 1 << 31 | SOC_DCB_KNET_DONE; + MEMORY_BARRIER; + bkn_api_rx_chain_done(sinfo, chan); + dcb_chain = sinfo->rx[chan].api_dcb_chain; + if (dcb_chain == NULL) { + sinfo->rx[chan].api_dcb_chain_end = NULL; + } + } + } else { + if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) || + (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) { + bkn_api_rx_chain_done(sinfo, chan); + } + } + + sinfo->dma_events |= KCOM_DMA_INFO_F_RX_DONE; + + evt = &_bkn_evt[sinfo->evt_idx]; + evt->evt_wq_put++; + wake_up_interruptible(&evt->evt_wq); + + return 0; +} + +static void +bkn_rx_refill(bkn_switch_info_t *sinfo, int chan) +{ + struct sk_buff *skb; + bkn_desc_info_t *desc; + uint32_t *dcb; + uint32_t resv_size = sinfo->cmic_type == 'x' ? RCPU_HDR_SIZE : RCPU_RX_ENCAP_SIZE; + int prev; + + if (sinfo->rx[chan].use_rx_skb == 0) { + /* Rx buffers are provided by BCM Rx API */ + return; + } + + if (!CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan) && + sinfo->rx[chan].tokens < MAX_RX_DCBS) { + /* Pause DMA for now */ + return; + } + + while (sinfo->rx[chan].free < MAX_RX_DCBS) { + desc = &sinfo->rx[chan].desc[sinfo->rx[chan].cur]; + if (desc->skb == NULL) { + skb = dev_alloc_skb(rx_buffer_size + RCPU_RX_ENCAP_SIZE); + if (skb == NULL) { + break; + } + skb_reserve(skb, resv_size); + desc->skb = skb; + } else { + DBG_DCB_RX(("Refill Rx%d SKB in DCB %d recycled.\n", + chan, sinfo->rx[chan].cur)); + } + skb = desc->skb; + desc->dma_size = rx_buffer_size; +#ifdef KNET_NO_AXI_DMA_INVAL + /* + * FIXME: Need to retain this code until iProc customers have been + * migrated to updated u-boot. Old u-boot versions are unable to load + * the kernel into non-ACP memory. + */ + /* + * Cache invalidate may corrupt DMA memory on some iProc-based devices + * if the kernel is mapped to ACP memory. + */ + if (sinfo->pdev == NULL) { + desc->dma_size = 0; + } +#endif + desc->skb_dma = DMA_MAP_SINGLE(sinfo->dma_dev, + skb->data, desc->dma_size, + DMA_FROMDEV); + if (DMA_MAPPING_ERROR(sinfo->dma_dev, desc->skb_dma)) { + dev_kfree_skb_any(skb); + desc->skb = NULL; + break; + } + DBG_DCB_RX(("Refill Rx%d DCB %d (0x%08x).\n", + chan, sinfo->rx[chan].cur, (uint32_t)desc->skb_dma)); + dcb = desc->dcb_mem; + dcb[0] = desc->skb_dma; + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + if (sinfo->cmic_type == 'x') { + dcb[2] |= 1 << 24 | 1 << 16; + } else { + dcb[1] |= 1 << 24 | 1 << 16; + } + } else { + prev = PREV_IDX(sinfo->rx[chan].cur, MAX_RX_DCBS); + if (prev < (MAX_RX_DCBS - 1)) { + if (sinfo->cmic_type == 'x') { + sinfo->rx[chan].desc[prev].dcb_mem[2] |= 1 << 16; + } else { + sinfo->rx[chan].desc[prev].dcb_mem[1] |= 1 << 16; + } + } + } + if (sinfo->cmic_type == 'x') { + dcb[1] = DMA_TO_BUS_HI(desc->skb_dma >> 32); + dcb[2] |= rx_buffer_size; + } else { + dcb[1] |= rx_buffer_size; + } + + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan) && + sinfo->rx[chan].tokens > MAX_RX_DCBS) { + /* DMA run to the new halt location */ + bkn_cdma_goto(sinfo, XGS_DMA_RX_CHAN + chan, desc->dcb_dma); + } + + if (++sinfo->rx[chan].cur >= MAX_RX_DCBS) { + sinfo->rx[chan].cur = 0; + } + sinfo->rx[chan].free++; + sinfo->rx[chan].tokens--; + } +} + +static int +bkn_rx_restart(bkn_switch_info_t *sinfo, int chan) +{ + bkn_desc_info_t *desc; + + if (sinfo->basedev_suspended) { + return 0; + } + + if (sinfo->rx[chan].running) { + return 0; + } + + if (sinfo->rx[chan].free < MAX_RX_DCBS) { + return 1; + } + + desc = &sinfo->rx[chan].desc[sinfo->rx[chan].dirty]; + sinfo->rx[chan].chain_complete = 0; + DBG_DCB_RX(("Restart Rx%d DMA, DCB @ 0x%08x (%d).\n", + chan, (uint32_t)desc->dcb_dma, sinfo->rx[chan].dirty)); + dev_dma_chan_clear(sinfo, XGS_DMA_RX_CHAN + chan); + dev_irq_mask_enable(sinfo, XGS_DMA_RX_CHAN + chan, 1); + dev_dma_chan_start(sinfo, XGS_DMA_RX_CHAN + chan, desc->dcb_dma); + sinfo->rx[chan].running = 1; + + /* Request one extra poll if chain was restarted during poll */ + if (sinfo->napi_poll_mode) { + sinfo->napi_poll_again = 1; + } + + return 0; +} + +static int +bkn_tx_dma_start(bkn_switch_info_t *sinfo) +{ + bkn_desc_info_t *desc; + + desc = &sinfo->tx.desc[sinfo->tx.cur]; + if (sinfo->tx.free == MAX_TX_DCBS) { + if (!sinfo->tx.api_active) { + DBG_DCB_TX(("Start Tx DMA, DCB @ 0x%08x (%d).\n", + (uint32_t)desc->dcb_dma, sinfo->tx.cur)); + dev_dma_chan_clear(sinfo, XGS_DMA_TX_CHAN); + dev_irq_mask_enable(sinfo, XGS_DMA_TX_CHAN, 1); + dev_dma_chan_start(sinfo, XGS_DMA_TX_CHAN, desc->dcb_dma); + } + } + + return 0; +} + +static int +bkn_dma_init(bkn_switch_info_t *sinfo) +{ + int chan; + + dev_dma_chan_init(sinfo, XGS_DMA_TX_CHAN, 1); + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + bkn_tx_dma_start(sinfo); + } + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + dev_dma_chan_init(sinfo, XGS_DMA_RX_CHAN + chan, 0); + bkn_rx_refill(sinfo, chan); + bkn_rx_restart(sinfo, chan); + } + + return 0; +} + +static int +bkn_dma_abort_tx(bkn_switch_info_t *sinfo) +{ + bkn_dcb_chain_t *dcb_chain; + + DBG_VERB(("Aborting Tx DMA.\n")); + + dev_irq_mask_disable(sinfo, XGS_DMA_TX_CHAN, 1); + + dev_dma_chan_abort(sinfo, XGS_DMA_TX_CHAN, 10000); + + if (sinfo->tx.api_dcb_chain) { + DBG_DCB_TX(("Freeing active Tx DCB chain.\n")); + kfree(sinfo->tx.api_dcb_chain); + sinfo->tx.api_dcb_chain = NULL; + } + while (!list_empty(&sinfo->tx.api_dcb_list)) { + dcb_chain = list_entry(sinfo->tx.api_dcb_list.next, + bkn_dcb_chain_t, list); + list_del(&dcb_chain->list); + DBG_DCB_TX(("Freeing Tx DCB chain.\n")); + kfree(dcb_chain); + } + sinfo->tx.api_dcb_chain_end = NULL; + + return 0; +} + +static int +bkn_dma_abort_rx(bkn_switch_info_t *sinfo, int chan) +{ + bkn_dcb_chain_t *dcb_chain; + + DBG_VERB(("Aborting Rx%d DMA.\n", chan)); + + dev_irq_mask_disable(sinfo, XGS_DMA_RX_CHAN + chan, 1); + + dev_dma_chan_abort(sinfo, XGS_DMA_RX_CHAN + chan, 10000); + + if (sinfo->rx[chan].api_dcb_chain) { + DBG_DCB_RX(("Freeing active Rx%d DCB chain.\n", chan)); + kfree(sinfo->rx[chan].api_dcb_chain); + sinfo->rx[chan].api_dcb_chain = NULL; + } + while (!list_empty(&sinfo->rx[chan].api_dcb_list)) { + dcb_chain = list_entry(sinfo->rx[chan].api_dcb_list.next, + bkn_dcb_chain_t, list); + list_del(&dcb_chain->list); + DBG_DCB_RX(("Freeing Rx%d DCB chain.\n", chan)); + kfree(dcb_chain); + } + sinfo->rx[chan].api_dcb_chain_end = NULL; + + return 0; +} + +static int +bkn_dma_abort(bkn_switch_info_t *sinfo) +{ + int chan; + + bkn_dma_abort_tx(sinfo); + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + bkn_dma_abort_rx(sinfo, chan); + } + + return 0; +} + +static bkn_filter_t * +bkn_match_rx_pkt(bkn_switch_info_t *sinfo, uint8_t *pkt, int pktlen, + void *meta, int chan, bkn_filter_t *cbf) +{ + struct list_head *list; + bkn_filter_t *filter; + kcom_filter_t scratch, *kf; + uint8_t *oob = (uint8_t *)meta; + int size, wsize; + int idx, match; + + list_for_each(list, &sinfo->rxpf_list) { + filter = (bkn_filter_t *)list; + kf = &filter->kf; + memcpy(&scratch.data.b[0], + &oob[kf->oob_data_offset], kf->oob_data_size); + memcpy(&scratch.data.b[kf->oob_data_size], + &pkt[kf->pkt_data_offset], kf->pkt_data_size); + size = kf->oob_data_size + kf->pkt_data_size; + wsize = BYTES2WORDS(size); + DBG_VERB(("Filter: size = %d (%d), data = 0x%08x, mask = 0x%08x\n", + size, wsize, kf->data.w[0], kf->mask.w[0])); + match = 1; + if (match) { + if (kf->priority < (num_rx_prio * sinfo->rx_chans)) { + if (kf->priority < (num_rx_prio * chan) || + kf->priority >= (num_rx_prio * (chan + 1))) { + match = 0; + } + } + } + if (match) { + for (idx = 0; idx < wsize; idx++) { + scratch.data.w[idx] &= kf->mask.w[idx]; + if (scratch.data.w[idx] != kf->data.w[idx]) { + match = 0; + break; + } + } + } + if (match) { + if (kf->dest_type == KCOM_DEST_T_CB) { + /* Check for custom filters */ + if (knet_filter_cb != NULL && cbf != NULL) { + memset(cbf, 0, sizeof(*cbf)); + memcpy(&cbf->kf, kf, sizeof(cbf->kf)); + if (knet_filter_cb(pkt, pktlen, sinfo->dev_no, + meta, chan, &cbf->kf)) { + filter->hits++; + return cbf; + } + } else { + DBG_FLTR(("Match, but not filter callback\n")); + } + } else { + filter->hits++; + return filter; + } + } + } + + return NULL; +} + +static bkn_priv_t * +bkn_netif_lookup(bkn_switch_info_t *sinfo, int id) +{ + struct list_head *list; + bkn_priv_t *priv; + int found; + + /* Fast path */ + if (id < sinfo->ndev_max) { + if (sinfo->ndevs[id] != NULL) { + DBG_NDEV(("Look up netif ID %d successful\n", id)); + return netdev_priv(sinfo->ndevs[id]); + } + } + + /* Slow path - should normally not get here */ + found = 0; + priv = NULL; + list_for_each(list, &sinfo->ndev_list) { + priv = (bkn_priv_t *)list; + if (priv->id == id) { + found = 1; + break; + } + } + if (found && priv != NULL) { + return priv; + } + return NULL; +} + +static int +bkn_add_rcpu_encap(bkn_switch_info_t *sinfo, struct sk_buff *skb, void *meta) +{ + int pktlen = skb->len; + uint32_t *dmeta, *smeta, wsize, psize; + int idx; + + /* Add and clear RCPU encapsulation */ + if (sinfo->cmic_type == 'x') { + psize = RCPU_HDR_SIZE + sinfo->pkt_hdr_size; + skb_push(skb, psize); + memset(skb->data, 0, RCPU_HDR_SIZE); + } else { + psize = RCPU_RX_ENCAP_SIZE; + skb_push(skb, psize); + memset(skb->data, 0, RCPU_RX_ENCAP_SIZE); + } + + /* RCPU Header */ + memcpy(skb->data, &skb->data[psize], 12); + if (rcpu_dmac != NULL) { + memcpy(skb->data, bkn_rcpu_dmac, 6); + } + if (rcpu_smac != NULL) { + memcpy(&skb->data[6], bkn_rcpu_smac, 6); + } + skb->data[12] = 0x81; + skb->data[14] = rcpu_vlan >> 8; + skb->data[15] = rcpu_vlan & 0xff; + skb->data[16] = rcpu_ethertype >> 8; + skb->data[17] = rcpu_ethertype & 0xff; + skb->data[18] = sinfo->rcpu_sig >> 8; + skb->data[19] = sinfo->rcpu_sig & 0xff; + skb->data[20] = RCPU_OPCODE_RX; + skb->data[21] = RCPU_F_MODHDR; + skb->data[24] = pktlen >> 8; + skb->data[25] = pktlen & 0xff; + + /* Meta data */ + dmeta = (uint32_t *)&skb->data[RCPU_HDR_SIZE]; + smeta = sinfo->cmic_type == 'x' ? (uint32_t *)meta : (uint32_t *)meta + 2; + wsize = sinfo->cmic_type == 'x' ? sinfo->pkt_hdr_size / 4 : sinfo->dcb_wsize - 3; + for (idx = 0; idx < wsize; idx++) { + dmeta[idx] = htonl(smeta[idx]); + } + + return 0; +} + +static void +bkn_eth_type_update(struct sk_buff *skb, int ethertype) +{ +#if defined(PM_ETH_TYPE) && defined(PM_FC_TYPE) + /* Optionally override standard protocol */ + skb->protocol = PM_ETH_TYPE; + if (ethertype == ETH_P_FCOE) { + skb->protocol = PM_FC_TYPE; + } +#endif +} + +#define BKN_DNX_BIT(x) (1<<(x)) +#define BKN_DNX_RBIT(x) (~(1<<(x))) +#ifdef __LITTLE_ENDIAN +#define BKN_DNX_BYTE_SWAP(x) (x) +#else +#define BKN_DNX_BYTE_SWAP(x) ((((x) << 24)) | (((x) & 0xff00) << 8) | (((x) & 0xff0000) >> 8) | (((x) >> 24))) +#endif + +static int +device_is_dune(bkn_switch_info_t *sinfo) +{ + int is_dune = 0; + + is_dune = (sinfo->dcb_type == 28) ? 1 : 0; + return is_dune; +} + +static int +packet_is_untagged(uint16_t tpid) +{ + int is_untagged = 0; + + /* Fixme SDK-111398 */ + /* 0x8100 is used in 802.1Q */ + /* 0x8848 is used in 802.11ad, the dtag tpid can be set to anything besides 0x8848, 0x9100 is a typical value, but couldn't cover all scenarios. */ + is_untagged = ((tpid != 0x8100) && (tpid != 0x8848) && (tpid != 0x9100)); + return is_untagged; +} + +static void +bkn_dnx_bitstream_set_field(uint32_t *input_buffer, uint32_t start_bit, uint32_t nof_bits, uint32_t field) +{ + uint32_t place; + uint32_t field_bit_i; + uint32_t bit_indicator; + + if( nof_bits > 32) + { + return; + } + + for( place=start_bit, field_bit_i = 0; field_bit_i< nof_bits; ++place, ++field_bit_i) + { + bit_indicator = field & BKN_DNX_BIT(nof_bits-field_bit_i-1); + if(bit_indicator) + { + input_buffer[place>>5] |= (0x80000000 >> (place & 0x0000001F)); + } + else + { + input_buffer[place>>5] &= ~(0x80000000 >> (place & 0x0000001F)); + } + } + return; +} + +static void +bkn_dnx_bitstream_get_field(uint8_t *input_buffer, uint32_t start_bit, uint32_t nof_bits, uint32_t *output_value) +{ + uint32_t idx; + uint32_t buf_sizes=0; + uint32_t tmp_output_value[2]={0}; + uint32_t first_byte_ndx; + uint32_t last_byte_ndx; + uint32_t place; + uint32_t field_bit_i; + uint8_t *tmp_output_value_u8_ptr = (uint8_t*)&tmp_output_value; + uint32_t bit_indicator; + + if (nof_bits > 32) + { + return; + } + + first_byte_ndx = start_bit / 8; + last_byte_ndx = ((start_bit + nof_bits - 1) / 8); + *output_value=0; + + /* get 32 bit value, MSB */ + for (idx = first_byte_ndx; idx <= last_byte_ndx; ++idx) + { + tmp_output_value_u8_ptr[last_byte_ndx - idx] = input_buffer[idx]; + buf_sizes += 8; + } + tmp_output_value[0] = BKN_DNX_BYTE_SWAP(tmp_output_value[0]); + if (last_byte_ndx > 4) + { + tmp_output_value[1] = BKN_DNX_BYTE_SWAP(tmp_output_value[1]); + } + + place = buf_sizes - (start_bit % 8 + nof_bits); + for (field_bit_i = 0; field_bit_i< nof_bits; ++place, ++field_bit_i) + { + uint32_t result; + result = tmp_output_value[place>>5] & BKN_DNX_BIT(place & 0x0000001F); + if (result) + { + bit_indicator = 1; + } else { + bit_indicator = 0; + } + *output_value |= bit_indicator << field_bit_i; + } + return; +} + +static void +bkn_dnx_packet_parse_ftmh(bkn_switch_info_t *sinfo, uint8_t hdr_buff[], bkn_dnx_packet_info *packet_info) +{ + uint32_t header_ptr = 0; + uint32_t dsp_ext_exist=0; + uint32_t fld_val; + + header_ptr = packet_info->ntwrk_header_ptr; + + /* Packet-size */ + bkn_dnx_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DNX_FTMH_PKT_SIZE_MSB, + BKN_DNX_FTMH_PKT_SIZE_NOF_BITS, + &fld_val); + packet_info->ftmh.packet_size = fld_val; + /* Traffic-class */ + bkn_dnx_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DNX_FTMH_TC_MSB, + BKN_DNX_FTMH_TC_NOF_BITS, + &fld_val); + packet_info->ftmh.prio = fld_val; + /* Source-system-port-aggregate */ + bkn_dnx_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DNX_FTMH_SRC_SYS_PORT_MSB, + BKN_DNX_FTMH_SRC_SYS_PORT_NOF_BITS, + &fld_val); + packet_info->ftmh.src_sys_port = fld_val; + /* TM-action-type */ + bkn_dnx_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DNX_FTMH_ACTION_TYPE_MSB, + BKN_DNX_FTMH_ACTION_TYPE_NOF_BITS, + &fld_val); + packet_info->ftmh.action_type = fld_val; + /* PPH-type */ + bkn_dnx_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DNX_FTMH_PPH_TYPE_MSB, + BKN_DNX_FTMH_PPH_TYPE_NOF_BITS, + &fld_val); + packet_info->ftmh.pph_type = fld_val; + + packet_info->ntwrk_header_ptr += BKN_DNX_FTMH_SIZE_BYTE; + DBG_DUNE(("FTMH(%d) Packet-size %d Action-type %d PPH-type %d Source-system-port 0x%x Traffic-class %d\n", + packet_info->ntwrk_header_ptr, packet_info->ftmh.packet_size, packet_info->ftmh.action_type, + packet_info->ftmh.pph_type, packet_info->ftmh.src_sys_port, packet_info->ftmh.prio)); + + /* LB-Key ext */ + if ((sinfo->pkt_hdr_size & BKN_DNX_FTMH_LB_EXT_EN) == BKN_DNX_FTMH_LB_EXT_EN) + { + packet_info->ntwrk_header_ptr += BKN_DNX_FTMH_LB_EXT_SIZE_BYTE; + DBG_DUNE(("FTMH(%d) FTMH LB-Key Extension is present\n", packet_info->ntwrk_header_ptr)); + } + /* DSP ext*/ + fld_val = 0; + bkn_dnx_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DNX_FTMH_EXT_DSP_EXIST_MSB, + BKN_DNX_FTMH_EXT_DSP_EXIST_NOF_BITS, + &dsp_ext_exist); + if (dsp_ext_exist) + { + packet_info->ntwrk_header_ptr += BKN_DNX_FTMH_DEST_EXT_SIZE_BYTE; + DBG_DUNE(("FTMH(%d) DSP-extension-present 1\n", packet_info->ntwrk_header_ptr)); + } + + /* stacking ext */ + if ((sinfo->pkt_hdr_size & BKN_DNX_FTMH_STACKING_EXT_EN) == BKN_DNX_FTMH_STACKING_EXT_EN) + { + packet_info->ntwrk_header_ptr += BKN_DNX_FTMH_STACKING_SIZE_BYTE; + DBG_DUNE(("FTMH(%d) FTMH Stacking Extension is present\n", packet_info->ntwrk_header_ptr)); + } + return; +} + +static void +bkn_dnx_packet_parse_internal(bkn_switch_info_t *sinfo, uint8_t hdr_buff[], bkn_dnx_packet_info *packet_info) +{ + uint32_t header_ptr = 0; + uint32_t fld_val; + uint32_t eei_extension_present = 0; + uint32_t learn_extension_present = 0; + uint32_t fhei_size = 0; + uint32_t forward_code; + uint8_t is_trapped = 0; + + header_ptr = packet_info->ntwrk_header_ptr; + + bkn_dnx_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DNX_PPH_EEI_EXTENSION_PRESENT_MSB, + BKN_DNX_PPH_EEI_EXTENSION_PRESENT_NOF_BITS, + &eei_extension_present); + bkn_dnx_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DNX_PPH_LEARN_EXENSION_PRESENT_MSB, + BKN_DNX_PPH_LEARN_EXENSION_PRESENT_NOF_BITS, + &learn_extension_present); + bkn_dnx_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DNX_PPH_FHEI_SIZE_MSB, + BKN_DNX_PPH_FHEI_SIZE_NOF_BITS, + &fhei_size); + bkn_dnx_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DNX_PPH_FORWARD_CODE_MSB, + BKN_DNX_PPH_FORWARD_CODE_NOF_BITS, + &forward_code); + /* 7: CPU-Trap */ + is_trapped = (uint8_t)(forward_code == 7); + + bkn_dnx_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DNX_PPH_VSI_MSB, + BKN_DNX_PPH_VSI_NOF_BITS, + &fld_val); + packet_info->internal.vsi = fld_val; + + /* size of PPH base is 7 */ + packet_info->ntwrk_header_ptr += BKN_DNX_PPH_SIZE_BYTE; + header_ptr = packet_info->ntwrk_header_ptr; + + DBG_DUNE(("PPH(%d) Forward-Code %d EEI-Extension %d Learn-Extension %d VSI %d FHEI-size %d\n", packet_info->ntwrk_header_ptr, + forward_code, eei_extension_present, learn_extension_present, packet_info->internal.vsi, fhei_size)); + + /* PPH extension */ + if (is_trapped && (fhei_size == 1)) + { + /* CPU trap code qualifier */ + bkn_dnx_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DNX_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_QUALIFIER_MSB, + BKN_DNX_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_QUALIFIER_NOF_BITS, + &fld_val); + packet_info->internal.trap_qualifier = fld_val; + /* CPU trap code */ + bkn_dnx_bitstream_get_field( + &hdr_buff[header_ptr], + BKN_DNX_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_MSB, + BKN_DNX_PPH_FHEI_TRAP_SNOOP_3B_CPU_TRAP_CODE_NOF_BITS, + &fld_val); + packet_info->internal.trap_id = fld_val; + } + switch(fhei_size) { + case 1: + packet_info->ntwrk_header_ptr += BKN_DNX_PPH_FHEI_3B_SIZE_BYTE; + break; + case 2: + packet_info->ntwrk_header_ptr += BKN_DNX_PPH_FHEI_5B_SIZE_BYTE; + break; + case 3: + packet_info->ntwrk_header_ptr += BKN_DNX_PPH_FHEI_8B_SIZE_BYTE; + break; + default: + break; + } + if (eei_extension_present) { + packet_info->ntwrk_header_ptr += BKN_DNX_PPH_EXPLICIT_EDITING_INFOMATION_EXTENSION_SIZE_BYTE; + } + if (learn_extension_present) { + packet_info->ntwrk_header_ptr += BKN_DNX_PPH_LEARN_EXTENSION_SIZE_BYTE; + } + + DBG_DUNE(("FHEI(%d) trap_qualifier 0x%x trap_id 0x%x\n", packet_info->ntwrk_header_ptr, packet_info->internal.trap_qualifier, packet_info->internal.trap_id)); + return; +} + +static int +bkn_dnx_packet_header_parse(bkn_switch_info_t *sinfo, uint8 *buff, uint32_t buff_len, bkn_dnx_packet_info *packet_info) +{ + uint8_t hdr_buff[BKN_DNX_HDR_MAX_SIZE]; + uint32_t hdr_size; + uint8_t has_internal = 0; + + if ((buff == NULL) || (packet_info == NULL)) { + return -1; + } + hdr_size = buff_len < BKN_DNX_HDR_MAX_SIZE ? buff_len: BKN_DNX_HDR_MAX_SIZE; + memcpy(hdr_buff, buff, hdr_size); + + /* FTMH */ + bkn_dnx_packet_parse_ftmh(sinfo, hdr_buff, packet_info); + if (packet_info->ftmh.packet_size != (buff_len + 2)) { + DBG_DUNE(("FTMH packet size verfication failed, %d-%d\n", packet_info->ftmh.packet_size, buff_len)); + memset(packet_info, 0, sizeof(bkn_dnx_packet_info)); + return -1; + } + switch (packet_info->ftmh.pph_type) { + case 0: + has_internal = 0; + break; + case 1: + has_internal = 1; + break; + case 2: /* PPH OAM-TS only */ + case 3: /* PPH Base + OAM-TS */ + /* OTSH immediately follows the FTMH when present */ + packet_info->ntwrk_header_ptr += 6; + DBG_DUNE(("FTMH + OAM-TS(%d)\n", packet_info->ntwrk_header_ptr)); + has_internal = 1; + break; + default: + break; + } + + if (has_internal) { + bkn_dnx_packet_parse_internal(sinfo, &hdr_buff[0], packet_info); + } + + /* FIXME: */ + /* ignore packets with a double set of FTMH,internals */ + /* ignore the user header size */ + return 0; +} + +static int +bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) +{ + bkn_priv_t *priv; + bkn_dcb_chain_t *dcb_chain; + struct sk_buff *skb; + bkn_filter_t cbf; + bkn_filter_t *filter; + uint32_t err_woff; + uint32_t *dcb, *meta; + uint8_t *pkt; + uint64_t pkt_dma; + int drop_api; + int ethertype; + int pktlen; + int idx; + int dcbs_done = 0; + bkn_dnx_packet_info packet_info = {0}; + + dcb_chain = sinfo->rx[chan].api_dcb_chain; + if (dcb_chain == NULL) { + /* No active chains */ + return 0; + } + + while (dcb_chain->dcb_cur < dcb_chain->dcb_cnt) { + dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize]; + DBG_VERB(("DCB %2d: 0x%08x\n", + dcb_chain->dcb_cur, dcb[sinfo->dcb_wsize-1])); + if ((dcb[sinfo->dcb_wsize-1] & (1 << 31)) == 0) { + break; + } + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + /* Handle for Continuous DMA mode */ + if (dcbs_done >= budget) { + break; + } + if ((sinfo->cmic_type == 'x' && dcb[2] & (1 << 18)) || + (sinfo->cmic_type != 'x' && dcb[1] & (1 << 18))) { + dcb[sinfo->dcb_wsize-1] |= SOC_DCB_KNET_DONE; + bkn_api_rx_chain_done(sinfo, chan); + dcb_chain = sinfo->rx[chan].api_dcb_chain; + if (dcb_chain == NULL) { + break; + } + continue; + } + } + if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) || + (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) { + sinfo->rx[chan].chain_complete = 1; + } + sinfo->rx[chan].pkts++; + if (sinfo->cmic_type == 'x') { + pkt_dma = BUS_TO_DMA_HI(dcb[1]); + pkt_dma = pkt_dma << 32 | dcb[0]; + } else { + pkt_dma = dcb[0]; + } + pkt = (uint8_t *)kernel_bde->p2l(sinfo->dev_no, (sal_paddr_t)pkt_dma); + if (sinfo->cmic_type == 'x') { + meta = (uint32_t *)pkt; + err_woff = sinfo->pkt_hdr_size / sizeof(uint32_t) - 1; + meta[err_woff] = dcb[sinfo->dcb_wsize-1]; + } else { + meta = dcb; + err_woff = sinfo->dcb_wsize - 1; + } + pktlen = dcb[sinfo->dcb_wsize-1] & SOC_DCB_KNET_COUNT_MASK; + bkn_dump_pkt(pkt, pktlen, XGS_DMA_RX_CHAN); + + if (device_is_dune(sinfo)) { + uint16_t tpid = 0; + uint16_t vid = 0; + int res = -1; + + memset(&packet_info, 0, sizeof(bkn_dnx_packet_info)); + res = bkn_dnx_packet_header_parse(sinfo, pkt, (uint32_t)pktlen, &packet_info); + if (res == 0) { + if (packet_info.ftmh.action_type == 0x2) { + bkn_dnx_bitstream_set_field((uint32_t *)dcb, 192, 32, 0x8); + } else if (packet_info.ftmh.action_type == 0x1) { + bkn_dnx_bitstream_set_field((uint32_t *)dcb, 231, 25, 0x20); + } + bkn_dnx_bitstream_set_field((uint32_t *)dcb, 112, 16, packet_info.ftmh.src_sys_port); + bkn_dnx_bitstream_set_field((uint32_t *)dcb, 296, 12, packet_info.internal.vsi); + bkn_dnx_bitstream_set_field((uint32_t *)dcb, 64, 32, (packet_info.internal.trap_id << 16 | packet_info.internal.trap_qualifier)); + pkt += packet_info.ntwrk_header_ptr; + pktlen -= packet_info.ntwrk_header_ptr; + bkn_dump_pkt(pkt, 32, XGS_DMA_RX_CHAN); + /* check if vlan tag exists */ + tpid = (uint16_t)((pkt[12] << 8) | pkt[13]); + vid = (uint16_t)(packet_info.internal.vsi & 0xfff); + if (packet_is_untagged(tpid)) { + if ((pktlen + 4) < rx_buffer_size) { + DBG_DUNE(("add vlan tag (%d) to untagged packets\n", vid)); + for (idx = (pktlen-1); idx >= 12; idx--) { + pkt[idx+4] = pkt[idx]; + } + pkt[12] = 0x81; + pkt[13] = 0x00; + pkt[14] = (vid >> 8); + pkt[15] = (vid & 0xff); + /* reset packet length in DCB */ + pktlen += 4; + dcb[sinfo->dcb_wsize-1] &= ~SOC_DCB_KNET_COUNT_MASK; + dcb[sinfo->dcb_wsize-1] |= ((pktlen + packet_info.ntwrk_header_ptr) & SOC_DCB_KNET_COUNT_MASK); + bkn_dump_pkt(pkt, 32, XGS_DMA_RX_CHAN); + } + } + } + } + + if (device_is_dune(sinfo)) { + filter = bkn_match_rx_pkt(sinfo, pkt, pktlen + packet_info.ntwrk_header_ptr, + dcb, chan, &cbf); + } else { + filter = bkn_match_rx_pkt(sinfo, pkt + sinfo->pkt_hdr_size, + pktlen - sinfo->pkt_hdr_size, meta, chan, &cbf); + } + if ((dcb[sinfo->dcb_wsize-1] & 0xf0000) != 0x30000) { + /* Fragment or error */ + if (filter && filter->kf.mask.w[err_woff] == 0) { + /* Drop unless DCB status is part of filter */ + filter = NULL; + } + } + drop_api = 1; + if (filter) { + DBG_FLTR(("Match filter ID %d\n", filter->kf.id)); + switch (filter->kf.dest_type) { + case KCOM_DEST_T_API: + DBG_FLTR(("Send to Rx API\n")); + sinfo->rx[chan].pkts_f_api++; + drop_api = 0; + break; + case KCOM_DEST_T_NETIF: + priv = bkn_netif_lookup(sinfo, filter->kf.dest_id); + if (priv) { + /* Check that software link is up */ + if (!netif_carrier_ok(priv->dev)) { + sinfo->rx[chan].pkts_d_no_link++; + break; + } + + if (sinfo->cmic_type == 'x') { + pkt += sinfo->pkt_hdr_size; + pktlen -= sinfo->pkt_hdr_size; + } + + /* Add 2 bytes for IP header alignment (see below) */ + skb = dev_alloc_skb(pktlen + RCPU_RX_ENCAP_SIZE + 2); + if (skb == NULL) { + sinfo->rx[chan].pkts_d_no_skb++; + break; + } + skb_reserve(skb, RCPU_RX_ENCAP_SIZE); + + DBG_FLTR(("Send to netif %d (%s)\n", + priv->id, priv->dev->name)); + sinfo->rx[chan].pkts_f_netif++; + skb->dev = priv->dev; + skb_reserve(skb, 2); /* 16 byte align the IP fields. */ + + /* Save for RCPU before stripping tag */ + ethertype = (pkt[16] << 8) | pkt[17]; + if ((priv->flags & KCOM_NETIF_F_KEEP_RX_TAG) == 0) { + if (filter->kf.flags & KCOM_FILTER_F_STRIP_TAG) { + /* Strip the VLAN tag */ + uint16_t vlan_proto = (uint16_t)((pkt[12] << 8) | pkt[13]); + if (vlan_proto == 0x8100 || vlan_proto == 0x88a8) { + DBG_FLTR(("Strip VLAN tag\n")); + for (idx = 11; idx >= 0; idx--) { + pkt[idx+4] = pkt[idx]; + } + pktlen -= 4; + pkt += 4; + } + } else { + /* + * Mark packet as VLAN-tagged, otherwise newer + * kernels will strip the tag. + */ + uint16_t tci = (pkt[14] << 8) | pkt[15]; + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_vlan_hwaccel_put_tag(skb, ETH_P_8021Q, tci); + } else { + bkn_vlan_hwaccel_put_tag(skb, + ((skb->data[12] << 8) | skb->data[13]), tci); + } + } + } + + skb_copy_to_linear_data(skb, pkt, pktlen); + if (device_is_dune(sinfo)) { + /* CRC has been stripped */ + skb_put(skb, pktlen); + } else { + skb_put(skb, pktlen - 4); /* Strip CRC */ + } + priv->stats.rx_packets++; + priv->stats.rx_bytes += skb->len; + + /* Optional SKB updates */ + if (knet_rx_cb != NULL) { + KNET_SKB_CB(skb)->netif_user_data = priv->cb_user_data; + KNET_SKB_CB(skb)->filter_user_data = filter->kf.cb_user_data; + KNET_SKB_CB(skb)->dcb_type = sinfo->dcb_type & 0xFFFF; + skb = knet_rx_cb(skb, sinfo->dev_no, meta); + if (skb == NULL) { + /* Consumed by call-back */ + sinfo->rx[chan].pkts_d_callback++; + break; + } + } + + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_add_rcpu_encap(sinfo, skb, meta); + DBG_PDMP(("After add RCPU ENCAP\n")); + bkn_dump_pkt(skb->data, pktlen + RCPU_RX_ENCAP_SIZE, XGS_DMA_RX_CHAN); + } + skb->protocol = eth_type_trans(skb, skb->dev); + if (filter->kf.dest_proto) { + skb->protocol = filter->kf.dest_proto; + } + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_eth_type_update(skb, ethertype); + } + DBG_DUNE(("skb protocol 0x%04x\n",skb->protocol)); + + /* Unlock while calling up network stack */ + spin_unlock(&sinfo->lock); + if (use_napi) { + netif_receive_skb(skb); + } else { + netif_rx(skb); + } + spin_lock(&sinfo->lock); + + if (filter->kf.mirror_type == KCOM_DEST_T_API || + dbg_pkt_enable) { + DBG_FLTR(("Mirror to Rx API\n")); + sinfo->rx[chan].pkts_m_api++; + drop_api = 0; + } + } else { + DBG_FLTR(("Unknown netif %d\n", + filter->kf.dest_id)); + sinfo->rx[chan].pkts_d_unkn_netif++; + } + break; + default: + /* Drop packet */ + DBG_FLTR(("Unknown dest type %d\n", + filter->kf.dest_type)); + sinfo->rx[chan].pkts_d_unkn_dest++; + break; + } + } else { + DBG_PKT(("Rx packet dropped.\n")); + sinfo->rx[chan].pkts_d_no_match++; + } + if (drop_api) { + /* If count is zero, the DCB will just be recycled */ + dcb[sinfo->dcb_wsize-1] &= ~SOC_DCB_KNET_COUNT_MASK; + } + dcb[sinfo->dcb_wsize-1] |= SOC_DCB_KNET_DONE; + dcb_chain->dcb_cur++; + dcbs_done++; + } + + return dcbs_done; +} + +static int +bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) +{ + bkn_priv_t *priv; + bkn_desc_info_t *desc; + struct sk_buff *skb; + bkn_filter_t cbf; + bkn_filter_t *filter; + uint32_t err_woff; + uint32_t *dcb, *meta; + int ethertype; + int pktlen; + int idx; + int dcbs_done = 0; + bkn_dnx_packet_info packet_info = {0}; + + if (!sinfo->rx[chan].running) { + /* Rx not ready */ + return 0; + } + + while (dcbs_done < budget) { + char str[32]; + sprintf(str, "Rx DCB (%d)", sinfo->rx[chan].dirty); + desc = &sinfo->rx[chan].desc[sinfo->rx[chan].dirty]; + dcb = desc->dcb_mem; + bkn_dump_dcb(str, dcb, sinfo->dcb_wsize, XGS_DMA_RX_CHAN); + if ((dcb[sinfo->dcb_wsize-1] & (1 << 31)) == 0) { + break; + } + if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) || + (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) { + sinfo->rx[chan].chain_complete = 1; + /* Request one extra poll to check for chain done interrupt */ + if (sinfo->napi_poll_mode) { + sinfo->napi_poll_again = 1; + } + } + sinfo->rx[chan].pkts++; + skb = desc->skb; + if (sinfo->cmic_type == 'x') { + meta = (uint32_t *)skb->data; + err_woff = sinfo->pkt_hdr_size / sizeof(uint32_t) - 1; + meta[err_woff] = dcb[sinfo->dcb_wsize-1]; + } else { + meta = dcb; + err_woff = sinfo->dcb_wsize - 1; + } + pktlen = dcb[sinfo->dcb_wsize-1] & 0xffff; + priv = netdev_priv(sinfo->dev); + DBG_DCB_RX(("Rx%d SKB DMA done (%d).\n", chan, sinfo->rx[chan].dirty)); + DMA_UNMAP_SINGLE(sinfo->dma_dev, + desc->skb_dma, desc->dma_size, + DMA_FROMDEV); + desc->skb_dma = 0; + bkn_dump_pkt(skb->data, pktlen, XGS_DMA_RX_CHAN); + + if (device_is_dune(sinfo)) { + uint16_t tpid = 0; + uint16_t vid = 0; + uint8_t *pkt = skb->data; + int res = 0; + + memset(&packet_info, 0, sizeof(bkn_dnx_packet_info)); + res = bkn_dnx_packet_header_parse(sinfo, pkt, (uint32_t)pktlen, &packet_info); + if (res == 0) { + if (packet_info.ftmh.action_type == 0x2) { + bkn_dnx_bitstream_set_field((uint32_t *)dcb, 192, 32, 0x8); + } else if (packet_info.ftmh.action_type == 0x1) { + bkn_dnx_bitstream_set_field((uint32_t *)dcb, 231, 25, 0x20); + } + bkn_dnx_bitstream_set_field((uint32_t *)dcb, 112, 16, packet_info.ftmh.src_sys_port); + bkn_dnx_bitstream_set_field((uint32_t *)dcb, 296, 12, packet_info.internal.vsi); + bkn_dnx_bitstream_set_field((uint32_t *)dcb, 64, 32, (packet_info.internal.trap_id << 16 | packet_info.internal.trap_qualifier)); + pkt = skb->data + packet_info.ntwrk_header_ptr; + /* check if vlan tag exists */ + tpid = (uint16_t)((pkt[12] << 8) | pkt[13]); + vid = (uint16_t)(packet_info.internal.vsi & 0xfff); + if (packet_is_untagged(tpid)) { + if ((pktlen + 4) < rx_buffer_size) { + DBG_DUNE(("add vlan tag to untagged packets\n")); + for (idx = (pktlen-packet_info.ntwrk_header_ptr-1); idx >= 12; idx--) { + pkt[idx+4] = pkt[idx]; + } + pkt[12] = 0x81; + pkt[13] = 0x00; + pkt[14] = (vid >> 8); + pkt[15] = (vid & 0xff); + pktlen += 4; + /* reset packet length in DCB */ + dcb[sinfo->dcb_wsize-1] &= ~SOC_DCB_KNET_COUNT_MASK; + dcb[sinfo->dcb_wsize-1] |= (pktlen & SOC_DCB_KNET_COUNT_MASK); + bkn_dump_pkt(pkt, 32, XGS_DMA_RX_CHAN); + } + } + } + } + + if (device_is_dune(sinfo)) { + filter = bkn_match_rx_pkt(sinfo, skb->data + packet_info.ntwrk_header_ptr, + pktlen, dcb, chan, &cbf); + } else { + filter = bkn_match_rx_pkt(sinfo, skb->data + sinfo->pkt_hdr_size, + pktlen - sinfo->pkt_hdr_size, meta, chan, &cbf); + } + if ((dcb[sinfo->dcb_wsize-1] & 0xf0000) != 0x30000) { + /* Fragment or error */ + priv->stats.rx_errors++; + if (filter && filter->kf.mask.w[err_woff] == 0) { + /* Drop unless DCB status is part of filter */ + filter = NULL; + } + } + DBG_PKT(("Rx packet (%d bytes).\n", pktlen)); + if (filter) { + DBG_FLTR(("Match filter ID %d\n", filter->kf.id)); + switch (filter->kf.dest_type) { + case KCOM_DEST_T_API: + DBG_FLTR(("Send to Rx API\n")); + sinfo->rx[chan].pkts_f_api++; + bkn_api_rx_copy_from_skb(sinfo, chan, desc); + break; + case KCOM_DEST_T_NETIF: + priv = bkn_netif_lookup(sinfo, filter->kf.dest_id); + if (priv) { + /* Check that software link is up */ + if (!netif_carrier_ok(priv->dev)) { + sinfo->rx[chan].pkts_d_no_link++; + break; + } + DBG_FLTR(("Send to netif %d (%s)\n", + priv->id, priv->dev->name)); + sinfo->rx[chan].pkts_f_netif++; + + if (((filter->kf.mirror_type == KCOM_DEST_T_API) && + (!device_is_dune(sinfo))) || dbg_pkt_enable) { + sinfo->rx[chan].pkts_m_api++; + bkn_api_rx_copy_from_skb(sinfo, chan, desc); + } + + if (device_is_dune(sinfo)) { + if (filter->kf.mirror_type == KCOM_DEST_T_API) { + sinfo->rx[chan].pkts_m_api++; + bkn_api_rx_copy_from_skb(sinfo, chan, desc); + } + /* Strip Dune headers */ + skb->data += packet_info.ntwrk_header_ptr; + pktlen -= packet_info.ntwrk_header_ptr; + bkn_dump_pkt(skb->data, 32, XGS_DMA_RX_CHAN); + /* CRC has been stripped on Dune*/ + skb_put(skb, pktlen); + } else { + skb_put(skb, pktlen - 4); /* Strip CRC */ + } + + if (sinfo->cmic_type == 'x') { + skb_pull(skb, sinfo->pkt_hdr_size); + } + + /* Save for RCPU before stripping tag */ + ethertype = (skb->data[16] << 8) | skb->data[17]; + if ((priv->flags & KCOM_NETIF_F_KEEP_RX_TAG) == 0) { + if (filter->kf.flags & KCOM_FILTER_F_STRIP_TAG) { + /* Strip VLAN tag */ + uint16_t vlan_proto = (uint16_t)((skb->data[12] << 8) | skb->data[13]); + if (vlan_proto == 0x8100 || vlan_proto == 0x88a8) { + DBG_FLTR(("Strip VLAN tag\n")); + ((u32*)skb->data)[3] = ((u32*)skb->data)[2]; + ((u32*)skb->data)[2] = ((u32*)skb->data)[1]; + ((u32*)skb->data)[1] = ((u32*)skb->data)[0]; + skb_pull(skb, 4); + if (sinfo->cmic_type == 'x') { + for (idx = sinfo->pkt_hdr_size / sizeof(uint32_t); idx; idx--) { + meta[idx] = meta[idx - 1]; + } + meta++; + } + } + } else { + /* + * Mark packet as VLAN-tagged, otherwise newer + * kernels will strip the tag. + */ + uint16_t tci = (skb->data[14] << 8) | skb->data[15]; + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_vlan_hwaccel_put_tag(skb, ETH_P_8021Q, tci); + } else { + bkn_vlan_hwaccel_put_tag(skb, + ((skb->data[12] << 8) | skb->data[13]), tci); + } + } + } + priv->stats.rx_packets++; + priv->stats.rx_bytes += skb->len; + skb->dev = priv->dev; + + /* Optional SKB updates */ + if (knet_rx_cb != NULL) { + KNET_SKB_CB(skb)->netif_user_data = priv->cb_user_data; + KNET_SKB_CB(skb)->filter_user_data = filter->kf.cb_user_data; + KNET_SKB_CB(skb)->dcb_type = sinfo->dcb_type & 0xFFFF; + skb = knet_rx_cb(skb, sinfo->dev_no, meta); + if (skb == NULL) { + /* Consumed by call-back */ + sinfo->rx[chan].pkts_d_callback++; + priv->stats.rx_dropped++; + desc->skb = NULL; + break; + } + } + + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_add_rcpu_encap(sinfo, skb, meta); + DBG_PDMP(("After add RCPU ENCAP\n")); + bkn_dump_pkt(skb->data, pktlen + RCPU_RX_ENCAP_SIZE, XGS_DMA_RX_CHAN); + } + skb->protocol = eth_type_trans(skb, skb->dev); + if (filter->kf.dest_proto) { + skb->protocol = filter->kf.dest_proto; + } + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_eth_type_update(skb, ethertype); + } + DBG_DUNE(("skb protocol 0x%04x\n",skb->protocol)); + + if (filter->kf.mirror_type == KCOM_DEST_T_NETIF) { + bkn_priv_t *mpriv; + struct sk_buff *mskb; + mpriv = bkn_netif_lookup(sinfo, filter->kf.mirror_id); + if (mpriv && netif_carrier_ok(mpriv->dev)) { + mskb = skb_clone(skb, GFP_ATOMIC); + if (mskb == NULL) { + sinfo->rx[chan].pkts_d_no_skb++; + } else { + sinfo->rx[chan].pkts_m_netif++; + mpriv->stats.rx_packets++; + mpriv->stats.rx_bytes += mskb->len; + skb->dev = mpriv->dev; + if (filter->kf.mirror_proto) { + skb->protocol = filter->kf.mirror_proto; + } + /* Unlock while calling up network stack */ + spin_unlock(&sinfo->lock); + if (use_napi) { + netif_receive_skb(mskb); + } else { + netif_rx(mskb); + } + spin_lock(&sinfo->lock); + } + } + } + + /* Unlock while calling up network stack */ + spin_unlock(&sinfo->lock); + if (use_napi) { + netif_receive_skb(skb); + } else { + netif_rx(skb); + } + spin_lock(&sinfo->lock); + + /* Ensure that we reallocate SKB for this DCB */ + desc->skb = NULL; + } else { + DBG_FLTR(("Unknown netif %d\n", + filter->kf.dest_id)); + sinfo->rx[chan].pkts_d_unkn_netif++; + } + break; + default: + /* Drop packet */ + DBG_FLTR(("Unknown dest type %d\n", + filter->kf.dest_type)); + sinfo->rx[chan].pkts_d_unkn_dest++; + break; + } + } else { + DBG_PKT(("Rx packet dropped.\n")); + sinfo->rx[chan].pkts_d_no_match++; + priv->stats.rx_dropped++; + } + dcb[sinfo->dcb_wsize-1] &= ~(1 << 31); + if (++sinfo->rx[chan].dirty >= MAX_RX_DCBS) { + sinfo->rx[chan].dirty = 0; + } + sinfo->rx[chan].free--; + dcbs_done++; + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + /* Right now refill for Continuous DMA mode */ + bkn_rx_refill(sinfo, chan); + } + } + + return dcbs_done; +} + +static int +bkn_do_rx(bkn_switch_info_t *sinfo, int chan, int budget) +{ + if (sinfo->rx[chan].use_rx_skb == 0) { + /* Rx buffers are provided by BCM Rx API */ + return bkn_do_api_rx(sinfo, chan, budget); + } else { + /* Rx buffers are provided by Linux kernel */ + return bkn_do_skb_rx(sinfo, chan, budget); + } +} + +static void +bkn_rx_desc_done(bkn_switch_info_t *sinfo, int chan) +{ + bkn_evt_resource_t *evt; + evt = &_bkn_evt[sinfo->evt_idx]; + DBG_IRQ(("Rx%d desc done\n", chan)); + + if (sinfo->rx[chan].use_rx_skb == 0) { + sinfo->dma_events |= KCOM_DMA_INFO_F_RX_DONE; + evt->evt_wq_put++; + wake_up_interruptible(&evt->evt_wq); + } +} + +static void +bkn_rx_chain_done(bkn_switch_info_t *sinfo, int chan) +{ + DBG_IRQ(("Rx%d chain done\n", chan)); + + if (sinfo->rx[chan].chain_complete == 0) { + /* + * In certain environments the DCB memory is updated after + * the corresponding interrupt has been received. + * The following code will ensure that this situation is + * handled properly. + */ + int maxloop = 0; + while (sinfo->rx[chan].chain_complete == 0) { + sinfo->rx[chan].sync_retry++; + if (maxloop == 0) { + sinfo->rx[chan].sync_err++; + } + if (maxloop > sinfo->rx[chan].sync_maxloop) { + sinfo->rx[chan].sync_maxloop = maxloop; + } + if (bkn_do_rx(sinfo, chan, MAX_RX_DCBS) > 0) { + bkn_rx_desc_done(sinfo, chan); + } + if (++maxloop > rx_sync_retry) { + gprintk("Fatal error: Incomplete chain\n"); + sinfo->rx[chan].chain_complete = 1; + break; + } + } + } + + sinfo->rx[chan].running = 0; + + if (sinfo->rx[chan].use_rx_skb == 0) { + bkn_api_rx_chain_done(sinfo, chan); + } else { + bkn_rx_refill(sinfo, chan); + + if (bkn_rx_restart(sinfo, chan) != 0) { + /* Presumably out of resources */ + sinfo->timer.expires = jiffies + 1; + if (!sinfo->timer_queued) { + sinfo->timer_queued = 1; + add_timer(&sinfo->timer); + } + } + } +} + +static void +bkn_suspend_tx(bkn_switch_info_t *sinfo) +{ + struct list_head *list; + bkn_priv_t *priv = netdev_priv(sinfo->dev); + + /* Stop main device */ + netif_stop_queue(priv->dev); + sinfo->tx.suspends++; + /* Stop associated virtual devices */ + list_for_each(list, &sinfo->ndev_list) { + priv = (bkn_priv_t *)list; + netif_stop_queue(priv->dev); + } +} + +static void +bkn_resume_tx(bkn_switch_info_t *sinfo) +{ + struct list_head *list; + bkn_priv_t *priv = netdev_priv(sinfo->dev); + + /* Check main device */ + if (netif_queue_stopped(priv->dev) && sinfo->tx.free > 1) { + netif_wake_queue(priv->dev); + } + /* Check associated virtual devices */ + list_for_each(list, &sinfo->ndev_list) { + priv = (bkn_priv_t *)list; + if (netif_queue_stopped(priv->dev) && sinfo->tx.free > 1) { + netif_wake_queue(priv->dev); + } + } +} + +static int +bkn_do_tx(bkn_switch_info_t *sinfo) +{ + bkn_desc_info_t *desc; + int dcbs_done = 0; + + if (!CDMA_CH(sinfo, XGS_DMA_TX_CHAN) && sinfo->tx.api_active) { + return dcbs_done; + } + + while (dcbs_done < MAX_TX_DCBS) { + char str[32]; + if (sinfo->tx.free == MAX_TX_DCBS) { + break; + } + sprintf(str, "Tx DCB (%d)", sinfo->tx.dirty); + desc = &sinfo->tx.desc[sinfo->tx.dirty]; + bkn_dump_dcb(str, desc->dcb_mem, sinfo->dcb_wsize, XGS_DMA_TX_CHAN); + if ((desc->dcb_mem[sinfo->dcb_wsize-1] & (1 << 31)) == 0) { + break; + } + if (desc->skb) { + DBG_DCB_TX(("Tx SKB DMA done (%d).\n", sinfo->tx.dirty)); + DMA_UNMAP_SINGLE(sinfo->dma_dev, + desc->skb_dma, desc->dma_size, + DMA_TODEV); + dev_kfree_skb_any(desc->skb); + desc->skb = NULL; + desc->skb_dma = 0; + } + desc->dcb_mem[sinfo->dcb_wsize-1] &= ~(1 << 31); + if (++sinfo->tx.dirty >= MAX_TX_DCBS) { + sinfo->tx.dirty = 0; + } + if (++sinfo->tx.free > MAX_TX_DCBS) { + gprintk("Too many free Tx DCBs(%d).\n", sinfo->tx.free); + } + dcbs_done++; + } + + return dcbs_done; +} + +static void +bkn_tx_cdma_chain_switch(bkn_switch_info_t *sinfo) +{ + bkn_dcb_chain_t *dcb_chain = sinfo->tx.api_dcb_chain; + uint32_t *dcb_mem; + uint64_t dcb_dma; + int woffset; + + /* Switch between SKB Tx and API Tx for Continuous DMA mode */ + if (!sinfo->tx.api_active) { + /* + * Set the current SKB DCB as reload DCB and the last DCB of + * the pending API chain as the new halt location. + */ + sinfo->tx.api_active = 1; + dcb_mem = sinfo->tx.desc[sinfo->tx.cur].dcb_mem; + memset(dcb_mem, 0, sinfo->dcb_wsize * sizeof(uint32_t)); + dcb_mem[0] = dcb_chain->dcb_dma; + if (sinfo->cmic_type == 'x') { + dcb_mem[1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); + dcb_mem[2] |= 1 << 24 | 1 << 18 | 1 << 16; + } else { + dcb_mem[1] |= 1 << 24 | 1 << 18 | 1 << 16; + } + if (++sinfo->tx.cur >= MAX_TX_DCBS) { + sinfo->tx.cur = 0; + } + sinfo->tx.free--; + woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize; + dcb_dma = dcb_chain->dcb_dma + woffset * sizeof(uint32_t); + /* DMA run to the new halt location */ + bkn_cdma_goto(sinfo, XGS_DMA_TX_CHAN, dcb_dma); + } else { + /* Only need to set the current SKB DCB as the new halt location */ + sinfo->tx.api_active = 0; + woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize; + dcb_mem = &dcb_chain->dcb_mem[woffset]; + dcb_mem[0] = sinfo->tx.desc[sinfo->tx.dirty].dcb_dma; + if (sinfo->cmic_type == 'x') { + dcb_mem[1] = DMA_TO_BUS_HI(sinfo->tx.desc[sinfo->tx.dirty].dcb_dma >> 32); + } + dcb_dma = sinfo->tx.desc[sinfo->tx.cur].dcb_dma; + /* DMA run to the new halt location */ + bkn_cdma_goto(sinfo, XGS_DMA_TX_CHAN, dcb_dma); + } +} + +static void +bkn_skb_tx(bkn_switch_info_t *sinfo) +{ + if (sinfo->tx.api_active) { + /* Switch from API Tx to SKB Tx */ + bkn_tx_cdma_chain_switch(sinfo); + } +} + +static void +bkn_api_tx(bkn_switch_info_t *sinfo) +{ + bkn_dcb_chain_t *dcb_chain; + uint64_t pkt_dma; + unsigned char *pktdata; + int pktlen; + int i; + + /* Assume that driver lock is held */ + if (list_empty(&sinfo->tx.api_dcb_list)) { + sinfo->tx.api_active = 0; + } else { + sinfo->tx.pkts++; + dcb_chain = list_entry(sinfo->tx.api_dcb_list.next, + bkn_dcb_chain_t, list); + DBG_DCB_TX(("Start API Tx DMA, first DCB @ 0x%08x (%d DCBs).\n", + (uint32_t)dcb_chain->dcb_dma, dcb_chain->dcb_cnt)); + for (i = 0; i < dcb_chain->dcb_cnt && debug & DBG_LVL_PDMP; i++) { + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN) && i == dcb_chain->dcb_cnt - 1) { + break; + } + if (sinfo->cmic_type == 'x') { + pkt_dma = BUS_TO_DMA_HI(dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 1]); + pkt_dma = pkt_dma << 32 | dcb_chain->dcb_mem[sinfo->dcb_wsize * i]; + } else { + pkt_dma = dcb_chain->dcb_mem[sinfo->dcb_wsize * i]; + } + pktdata = kernel_bde->p2l(sinfo->dev_no, pkt_dma); + if (sinfo->cmic_type == 'x') { + pktlen = dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 2] & 0xffff; + } else { + pktlen = dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 1] & 0xffff; + } + bkn_dump_pkt(pktdata, pktlen, XGS_DMA_TX_CHAN); + } + + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + sinfo->tx.api_dcb_chain = dcb_chain; + if (!sinfo->tx.api_active) { + /* Switch from SKB Tx to API Tx */ + bkn_tx_cdma_chain_switch(sinfo); + } + list_del(&dcb_chain->list); + } else { + sinfo->tx.api_active = 1; + dev_dma_chan_clear(sinfo, XGS_DMA_TX_CHAN); + dev_irq_mask_enable(sinfo, XGS_DMA_TX_CHAN, 1); + dev_dma_chan_start(sinfo, XGS_DMA_TX_CHAN, dcb_chain->dcb_dma); + list_del(&dcb_chain->list); + kfree(dcb_chain); + } + } +} + +static void +bkn_tx_cdma_chain_done(bkn_switch_info_t *sinfo, int done) +{ + int woffset; + int dcbs_done = 0; + bkn_evt_resource_t *evt; + + DBG_IRQ(("Tx CDMA chain done \n")); + + evt = &_bkn_evt[sinfo->evt_idx]; + + if (sinfo->tx.api_active) { + /* Drain API Tx chains */ + while (sinfo->tx.api_dcb_chain != sinfo->tx.api_dcb_chain_end) { + woffset = sinfo->tx.api_dcb_chain->dcb_cnt * sinfo->dcb_wsize - 1; + if (!(sinfo->tx.api_dcb_chain->dcb_mem[woffset] & (1 << 31))) { + return; + } + sinfo->tx.api_dcb_chain->dcb_mem[woffset - sinfo->dcb_wsize] |= SOC_DCB_KNET_DONE; + sinfo->dma_events |= KCOM_DMA_INFO_F_TX_DONE; + evt->evt_wq_put++; + wake_up_interruptible(&evt->evt_wq); + kfree(sinfo->tx.api_dcb_chain); + sinfo->tx.api_dcb_chain = NULL; + bkn_api_tx(sinfo); + if ((++dcbs_done + done) >= MAX_TX_DCBS) { + if (sinfo->napi_poll_mode) { + /* Request one extra poll to reschedule Tx */ + sinfo->napi_poll_again = 1; + } else { + /* Request to yield for Continuous DMA mode */ + sinfo->tx_yield = 1; + } + return; + } + } + woffset = (sinfo->tx.api_dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize - 1; + if (!(sinfo->tx.api_dcb_chain->dcb_mem[woffset] & (1 << 31))) { + return; + } + sinfo->tx.api_dcb_chain->dcb_mem[woffset] |= SOC_DCB_KNET_DONE; + /* Try and park at SKB Tx if API Tx done */ + bkn_skb_tx(sinfo); + sinfo->dma_events |= KCOM_DMA_INFO_F_TX_DONE; + evt->evt_wq_put++; + wake_up_interruptible(&evt->evt_wq); + kfree(sinfo->tx.api_dcb_chain); + sinfo->tx.api_dcb_chain = NULL; + sinfo->tx.api_dcb_chain_end = NULL; + if (!sinfo->napi_poll_mode) { + /* Not need to yield for Continuous DMA mode */ + sinfo->tx_yield = 0; + } + } else { + if (sinfo->tx.free == MAX_TX_DCBS) { + /* Try API Tx if SKB Tx done */ + bkn_api_tx(sinfo); + if (sinfo->tx.api_active) { + return; + } + } + } + + /* Resume if netif Tx resources available and API Tx not active */ + bkn_resume_tx(sinfo); +} + +static void +bkn_tx_chain_done(bkn_switch_info_t *sinfo, int done) +{ + bkn_desc_info_t *desc; + int idx, pending; + bkn_evt_resource_t *evt; + + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + return bkn_tx_cdma_chain_done(sinfo, done); + } + + DBG_IRQ(("Tx chain done (%d/%d)\n", sinfo->tx.cur, sinfo->tx.dirty)); + + dev_irq_mask_disable(sinfo, XGS_DMA_TX_CHAN, 0); + + evt = &_bkn_evt[sinfo->evt_idx]; + + if (sinfo->tx.api_active) { + sinfo->dma_events |= KCOM_DMA_INFO_F_TX_DONE; + evt->evt_wq_put++; + wake_up_interruptible(&evt->evt_wq); + /* Check if BCM API has more to send */ + bkn_api_tx(sinfo); + if (sinfo->tx.api_active) { + return; + } + } + + if (sinfo->tx.free == MAX_TX_DCBS) { + /* If netif Tx is idle then allow BCM API to send */ + bkn_api_tx(sinfo); + if (sinfo->tx.api_active) { + return; + } + } else { + /* If two or more DCBs are pending, chain them */ + pending = MAX_TX_DCBS - sinfo->tx.free; + idx = sinfo->tx.dirty; + while (--pending && idx < (MAX_TX_DCBS - 1)) { + if (sinfo->cmic_type == 'x') { + sinfo->tx.desc[idx++].dcb_mem[2] |= 1 << 16; + } else { + sinfo->tx.desc[idx++].dcb_mem[1] |= 1 << 16; + } + DBG_DCB_TX(("Chain Tx DCB %d (%d)\n", idx, pending)); + } + /* Restart DMA from where we stopped */ + desc = &sinfo->tx.desc[sinfo->tx.dirty]; + DBG_DCB_TX(("Restart Tx DMA, DCB @ 0x%08x (%d).\n", + (uint32_t)desc->dcb_dma, sinfo->tx.dirty)); + dev_dma_chan_clear(sinfo, XGS_DMA_TX_CHAN); + dev_irq_mask_enable(sinfo, XGS_DMA_TX_CHAN, 0); + dev_dma_chan_start(sinfo, XGS_DMA_TX_CHAN, desc->dcb_dma); + } + + /* Resume if netif Tx resources available and API Tx not active */ + bkn_resume_tx(sinfo); +} + +static void +bkn_schedule_napi_poll(bkn_switch_info_t *sinfo) +{ + /* Schedule NAPI poll */ + DBG_NAPI(("Schedule NAPI poll on %s.\n", sinfo->dev->name)); + /* Disable interrupts until poll job is complete */ + sinfo->napi_poll_mode = 1; + /* Unlock while calling up network stack */ + spin_unlock(&sinfo->lock); + if (bkn_napi_schedule_prep(sinfo->dev, &sinfo->napi)) { + __bkn_napi_schedule(sinfo->dev, &sinfo->napi); + DBG_NAPI(("Schedule prep OK on %s.\n", sinfo->dev->name)); + } else { + /* Most likely the base device is has not been opened */ + gprintk("Warning: Unable to schedule NAPI - base device not up?\n"); + } + spin_lock(&sinfo->lock); +} + +static void +bkn_napi_poll_complete(bkn_switch_info_t *sinfo) +{ + /* Unlock while calling up network stack */ + spin_unlock(&sinfo->lock); + bkn_napi_complete(sinfo->dev, &sinfo->napi); + spin_lock(&sinfo->lock); + /* Re-enable interrupts */ + sinfo->napi_poll_mode = 0; + dev_irq_mask_set(sinfo, sinfo->irq_mask); +} + +static int +xgs_do_dma(bkn_switch_info_t *sinfo, int budget) +{ + int rx_dcbs_done = 0, tx_dcbs_done = 0; + int chan_done, budget_chans = 0; + uint32_t dma_stat; + int chan; + + DEV_READ32(sinfo, CMIC_DMA_STATr, &dma_stat); + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (dma_stat & DS_DESC_DONE_TST(XGS_DMA_RX_CHAN + chan)) { + xgs_dma_desc_clear(sinfo, XGS_DMA_RX_CHAN + chan); + sinfo->poll_channels |= 1 << chan; + } + } + if (!sinfo->poll_channels) { + sinfo->poll_channels = (uint32_t)(1 << sinfo->rx_chans) - 1; + budget_chans = budget / sinfo->rx_chans; + } else { + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + budget_chans++; + } + } + budget_chans = budget / budget_chans; + } + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + chan_done = bkn_do_rx(sinfo, chan, budget_chans); + rx_dcbs_done += chan_done; + if (chan_done < budget_chans) { + sinfo->poll_channels &= ~(1 << chan); + } + bkn_rx_desc_done(sinfo, chan); + } + + if (dma_stat & DS_CHAIN_DONE_TST(XGS_DMA_RX_CHAN + chan)) { + xgs_dma_chain_clear(sinfo, XGS_DMA_RX_CHAN + chan); + bkn_rx_chain_done(sinfo, chan); + } + } + + if (dma_stat & DS_CHAIN_DONE_TST(XGS_DMA_TX_CHAN)) { + xgs_dma_chain_clear(sinfo, XGS_DMA_TX_CHAN); + tx_dcbs_done = bkn_do_tx(sinfo); + bkn_tx_chain_done(sinfo, tx_dcbs_done); + } + + return sinfo->poll_channels ? budget : rx_dcbs_done; +} + +static int +xgsm_do_dma(bkn_switch_info_t *sinfo, int budget) +{ + int rx_dcbs_done = 0, tx_dcbs_done = 0; + int chan_done, budget_chans = 0; + uint32_t dma_stat, irq_stat = 0; + int chan; + + /* Get Controlled interrupt states for Continuous DMA mode */ + if (sinfo->cdma_channels) { + DEV_READ32(sinfo, CMICM_IRQ_STATr, &irq_stat); + } + + DEV_READ32(sinfo, CMICM_DMA_STATr, &dma_stat); + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (dma_stat & (0x10 << (XGS_DMA_RX_CHAN + chan)) || + irq_stat & (0x08000000 << (XGS_DMA_RX_CHAN + chan))) { + xgsm_dma_desc_clear(sinfo, XGS_DMA_RX_CHAN + chan); + sinfo->poll_channels |= 1 << chan; + } + } + if (!sinfo->poll_channels) { + sinfo->poll_channels = (uint32_t)(1 << sinfo->rx_chans) - 1; + budget_chans = budget / sinfo->rx_chans; + } else { + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + budget_chans++; + } + } + budget_chans = budget / budget_chans; + } + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + chan_done = bkn_do_rx(sinfo, chan, budget_chans); + rx_dcbs_done += chan_done; + if (chan_done < budget_chans) { + sinfo->poll_channels &= ~(1 << chan); + } + bkn_rx_desc_done(sinfo, chan); + } + + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + continue; + } + + if (dma_stat & (0x1 << (XGS_DMA_RX_CHAN + chan))) { + xgsm_dma_chain_clear(sinfo, XGS_DMA_RX_CHAN + chan); + bkn_rx_chain_done(sinfo, chan); + } + } + + if (dma_stat & (0x1 << XGS_DMA_TX_CHAN) || + irq_stat & (0x08000000 << XGS_DMA_TX_CHAN)) { + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + xgsm_dma_desc_clear(sinfo, XGS_DMA_TX_CHAN); + } else { + xgsm_dma_chain_clear(sinfo, XGS_DMA_TX_CHAN); + } + tx_dcbs_done = bkn_do_tx(sinfo); + bkn_tx_chain_done(sinfo, tx_dcbs_done); + } + + return sinfo->poll_channels ? budget : rx_dcbs_done; +} + +static int +xgsx_do_dma(bkn_switch_info_t *sinfo, int budget) +{ + int rx_dcbs_done = 0, tx_dcbs_done = 0; + int chan_done, budget_chans = 0; + uint32_t irq_stat; + int chan; + + DEV_READ32(sinfo, CMICX_IRQ_STATr, &irq_stat); + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if ((irq_stat & CMICX_DS_CMC_CTRLD_INT(XGS_DMA_RX_CHAN + chan)) || + (irq_stat & CMICX_DS_CMC_DESC_DONE(XGS_DMA_RX_CHAN + chan))) { + xgsx_dma_desc_clear(sinfo, XGS_DMA_RX_CHAN + chan); + sinfo->poll_channels |= 1 << chan; + } + } + if (!sinfo->poll_channels) { + sinfo->poll_channels = (uint32_t)(1 << sinfo->rx_chans) - 1; + budget_chans = budget / sinfo->rx_chans; + } else { + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + budget_chans++; + } + } + budget_chans = budget / budget_chans; + } + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + chan_done = bkn_do_rx(sinfo, chan, budget_chans); + rx_dcbs_done += chan_done; + if (chan_done < budget_chans) { + sinfo->poll_channels &= ~(1 << chan); + } + bkn_rx_desc_done(sinfo, chan); + } + + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + continue; + } + + if (irq_stat & CMICX_DS_CMC_CHAIN_DONE(XGS_DMA_RX_CHAN + chan)) { + xgsx_dma_chain_clear(sinfo, XGS_DMA_RX_CHAN + chan); + bkn_rx_chain_done(sinfo, chan); + } + } + + if ((irq_stat & CMICX_DS_CMC_CTRLD_INT(XGS_DMA_TX_CHAN)) || + (irq_stat & CMICX_DS_CMC_CHAIN_DONE(XGS_DMA_TX_CHAN))) { + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + xgsx_dma_desc_clear(sinfo, XGS_DMA_TX_CHAN); + } else { + xgsx_dma_chain_clear(sinfo, XGS_DMA_TX_CHAN); + } + tx_dcbs_done = bkn_do_tx(sinfo); + bkn_tx_chain_done(sinfo, tx_dcbs_done); + } + + return sinfo->poll_channels ? budget : rx_dcbs_done; +} + +static int +dev_do_dma(bkn_switch_info_t *sinfo, int budget) +{ + if (DEV_IS_CMICX(sinfo)) { + return xgsx_do_dma(sinfo, budget); + } else if (DEV_IS_CMICM(sinfo)) { + return xgsm_do_dma(sinfo, budget); + } else { + return xgs_do_dma(sinfo, budget); + } +} + +static void +xgs_isr(bkn_switch_info_t *sinfo) +{ + uint32_t irq_stat; + int rx_dcbs_done; + + DEV_READ32(sinfo, CMIC_IRQ_STATr, &irq_stat); + if ((irq_stat & sinfo->irq_mask) == 0) { + /* Not ours */ + return; + } + sinfo->interrupts++; + + DBG_IRQ(("Got interrupt on device %d (0x%08x)\n", + sinfo->dev_no, irq_stat)); + + if (use_napi) { + bkn_schedule_napi_poll(sinfo); + } else { + xgs_irq_mask_set(sinfo, 0); + do { + rx_dcbs_done = xgs_do_dma(sinfo, MAX_RX_DCBS); + } while (rx_dcbs_done); + } + + xgs_irq_mask_set(sinfo, sinfo->irq_mask); +} + +static void +xgsm_isr(bkn_switch_info_t *sinfo) +{ + uint32_t irq_stat; + int rx_dcbs_done; + + DEV_READ32(sinfo, CMICM_IRQ_STATr, &irq_stat); + if ((irq_stat & sinfo->irq_mask) == 0) { + /* Not ours */ + return; + } + sinfo->interrupts++; + + DBG_IRQ(("Got interrupt on device %d (0x%08x)\n", + sinfo->dev_no, irq_stat)); + + if (use_napi) { + bkn_schedule_napi_poll(sinfo); + } else { + xgsm_irq_mask_set(sinfo, 0); + do { + rx_dcbs_done = xgsm_do_dma(sinfo, MAX_RX_DCBS); + if (sinfo->cdma_channels) { + if (rx_dcbs_done >= MAX_RX_DCBS || sinfo->tx_yield) { + /* Continuous DMA mode requires to yield timely */ + break; + } + } + } while (rx_dcbs_done); + } + + xgsm_irq_mask_set(sinfo, sinfo->irq_mask); +} + +static void +xgsx_isr(bkn_switch_info_t *sinfo) +{ + uint32_t irq_stat; + int rx_dcbs_done; + + DEV_READ32(sinfo, CMICX_IRQ_STATr, &irq_stat); + if ((irq_stat & sinfo->irq_mask) == 0) { + /* Not ours */ + return; + } + sinfo->interrupts++; + + DBG_IRQ(("Got interrupt on device %d (0x%08x)\n", + sinfo->dev_no, irq_stat)); + + if (use_napi) { + bkn_schedule_napi_poll(sinfo); + } else { + xgsx_irq_mask_set(sinfo, 0); + do { + rx_dcbs_done = xgsx_do_dma(sinfo, MAX_RX_DCBS); + if (sinfo->cdma_channels) { + if (rx_dcbs_done >= MAX_RX_DCBS || sinfo->tx_yield) { + /* Continuous DMA mode requires to yield timely */ + break; + } + } + } while (rx_dcbs_done); + } + + xgsx_irq_mask_set(sinfo, sinfo->irq_mask); +} + +static void +bkn_isr(void *isr_data) +{ + bkn_switch_info_t *sinfo = isr_data; + + /* Safe exit on SMP systems */ + if (!module_initialized) { + return; + } + + /* Ensure that we do not touch registers during device reset */ + if (sinfo->irq_mask == 0) { + /* Not ours */ + return; + } + + spin_lock(&sinfo->lock); + + if (sinfo->napi_poll_mode) { + /* Not ours */ + spin_unlock(&sinfo->lock); + return; + } + + if (DEV_IS_CMICX(sinfo)) { + xgsx_isr(sinfo); + } else if (DEV_IS_CMICM(sinfo)) { + xgsm_isr(sinfo); + } else { + xgs_isr(sinfo); + } + + spin_unlock(&sinfo->lock); +} + +#ifdef CONFIG_NET_POLL_CONTROLLER +static void +bkn_poll_controller(struct net_device *dev) +{ + bkn_priv_t *priv = netdev_priv(dev); + + disable_irq(dev->irq); + bkn_isr(priv->sinfo); + enable_irq(dev->irq); +} +#endif + +static void +bkn_resume_rx(bkn_switch_info_t *sinfo) +{ + bkn_desc_info_t *desc; + bkn_dcb_chain_t *dcb_chain; + uint64_t cur_halt, last_dcb, dcb_dma; + int woffset, chan, cdma_running; + + /* Resume Rx DMA on all channels */ + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (sinfo->rx[chan].use_rx_skb) { + cdma_running = 0; + bkn_api_rx_restart(sinfo, chan); + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + cur_halt = sinfo->halt_addr[XGS_DMA_RX_CHAN + chan]; + last_dcb = sinfo->rx[chan].desc[MAX_RX_DCBS].dcb_dma; + if (cur_halt != last_dcb) { + desc = &sinfo->rx[chan].desc[sinfo->rx[chan].dirty + 1]; + bkn_cdma_goto(sinfo, XGS_DMA_RX_CHAN + chan, desc->dcb_dma); + cdma_running = 1; + } + } + if (!cdma_running) { + bkn_rx_restart(sinfo, chan); + } + } else { + cdma_running = 0; + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + if (sinfo->rx[chan].api_active) { + dcb_chain = sinfo->rx[chan].api_dcb_chain_end; + woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize; + dcb_dma = dcb_chain->dcb_dma + woffset * sizeof(uint32_t); + bkn_cdma_goto(sinfo, XGS_DMA_RX_CHAN + chan, dcb_dma); + cdma_running = 1; + } + } + if (!cdma_running) { + bkn_api_rx_restart(sinfo, chan); + } + } + } +} + +static int +bkn_open(struct net_device *dev) +{ + bkn_priv_t *priv = netdev_priv(dev); + bkn_switch_info_t *sinfo = priv->sinfo; + unsigned long flags; + + /* Check if base device */ + if (priv->id <= 0) { + /* NAPI used only on base device */ + if (use_napi) { + bkn_napi_enable(dev, &sinfo->napi); + } + + /* Start DMA when base device is started */ + if (sinfo->basedev_suspended) { + spin_lock_irqsave(&sinfo->lock, flags); + dev_do_dma(sinfo, MAX_RX_DCBS); + sinfo->basedev_suspended = 0; + bkn_api_tx(sinfo); + if (!sinfo->tx.api_active) { + bkn_resume_tx(sinfo); + } + bkn_resume_rx(sinfo); + spin_unlock_irqrestore(&sinfo->lock, flags); + } + } + + if (!sinfo->basedev_suspended) { + netif_start_queue(dev); + } + + return 0; +} + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)) +static int +bkn_set_mac_address(struct net_device *dev, void *addr) +{ + if (!is_valid_ether_addr(((struct sockaddr *)addr)->sa_data)) { + return -EINVAL; + } + memcpy(dev->dev_addr, ((struct sockaddr *)addr)->sa_data, dev->addr_len); + return 0; +} +#endif + +static int +bkn_change_mtu(struct net_device *dev, int new_mtu) +{ + int max_size = new_mtu + ETH_HLEN + VLAN_HLEN + 4; + + if (new_mtu < 68 || max_size > rx_buffer_size) { + return -EINVAL; + } + dev->mtu = new_mtu; + return 0; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) +static int +bkn_poll(struct net_device *dev, int *budget) +{ + bkn_priv_t *priv = netdev_priv(dev); + bkn_switch_info_t *sinfo = priv->sinfo; + int cur_budget = *budget; + int poll_again = 0; + int rx_dcbs_done; + unsigned long flags; + + spin_lock_irqsave(&sinfo->lock, flags); + + DBG_NAPI(("NAPI poll on %s.\n", dev->name)); + + sinfo->napi_poll_again = 0; + + if (cur_budget > dev->quota) { + cur_budget = dev->quota; + } + + rx_dcbs_done = dev_do_dma(sinfo, cur_budget); + + *budget -= rx_dcbs_done; + cur_budget -= rx_dcbs_done; + dev->quota -= rx_dcbs_done; + + if (sinfo->napi_poll_again || cur_budget <= 0) { + poll_again = 1; + sinfo->napi_not_done++; + } else { + bkn_napi_poll_complete(sinfo); + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return poll_again; +} +#else +static int +bkn_poll(struct napi_struct *napi, int budget) +{ + bkn_switch_info_t *sinfo = container_of(napi, bkn_switch_info_t, napi); + int rx_dcbs_done; + unsigned long flags; + + spin_lock_irqsave(&sinfo->lock, flags); + + DBG_NAPI(("NAPI poll on %s.\n", sinfo->dev->name)); + + sinfo->napi_poll_again = 0; + + rx_dcbs_done = dev_do_dma(sinfo, budget); + + if (sinfo->napi_poll_again || rx_dcbs_done >= budget) { + /* Force poll again */ + rx_dcbs_done = budget; + sinfo->napi_not_done++; + } else { + bkn_napi_poll_complete(sinfo); + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return rx_dcbs_done; +} +#endif + +static int +bkn_stop(struct net_device *dev) +{ + bkn_priv_t *priv = netdev_priv(dev); + bkn_switch_info_t *sinfo = priv->sinfo; + unsigned long flags; + + netif_stop_queue(dev); + + /* Check if base device */ + if (priv->id <= 0) { + /* NAPI used only on base device */ + if (use_napi) { + bkn_napi_disable(dev, &sinfo->napi); + } + /* Suspend all devices if base device is stopped */ + if (basedev_suspend) { + spin_lock_irqsave(&sinfo->lock, flags); + bkn_suspend_tx(sinfo); + sinfo->basedev_suspended = 1; + spin_unlock_irqrestore(&sinfo->lock, flags); + } + } + + return 0; +} + +/* + * Network Device Statistics. + * Cleared at init time. + */ +static struct net_device_stats * +bkn_get_stats(struct net_device *dev) +{ + bkn_priv_t *priv = netdev_priv(dev); + + return &priv->stats; +} + +/* Fake multicast ability */ +static void +bkn_set_multicast_list(struct net_device *dev) +{ +} + +static int +bkn_tx(struct sk_buff *skb, struct net_device *dev) +{ + bkn_priv_t *priv = netdev_priv(dev); + bkn_switch_info_t *sinfo = priv->sinfo; + struct sk_buff *new_skb = NULL; + unsigned char *pktdata; + int pktlen, hdrlen, taglen, rcpulen, metalen; + int sop, idx; + uint16_t tpid; + uint32_t *metadata; + unsigned long flags; + + DBG_VERB(("Netif Tx: Len=%d\n", skb->len)); + + if (priv->id <= 0) { + /* Do not transmit on base device */ + priv->stats.tx_dropped++; + dev_kfree_skb_any(skb); + return 0; + } + + if (!netif_carrier_ok(dev)) { + DBG_WARN(("Tx drop: Invalid RCPU encapsulation\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_no_link++; + dev_kfree_skb_any(skb); + return 0; + } + + spin_lock_irqsave(&sinfo->lock, flags); + + if (sinfo->tx.free > 1) { + bkn_desc_info_t *desc = &sinfo->tx.desc[sinfo->tx.cur]; + uint32_t *dcb, *meta; + + pktdata = skb->data; + pktlen = skb->len + 4; + hdrlen = sinfo->cmic_type == 'x' ? PKT_TX_HDR_SIZE : 0; + rcpulen = 0; + sop = 0; + + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + rcpulen = RCPU_HDR_SIZE; + if (skb->len < (rcpulen + 14)) { + DBG_WARN(("Tx drop: Invalid RCPU encapsulation\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_rcpu_encap++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + if (check_rcpu_signature && + ((skb->data[18] << 8) | skb->data[19]) != sinfo->rcpu_sig) { + DBG_WARN(("Tx drop: Invalid RCPU signature\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_rcpu_sig++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + if (skb->data[21] & RCPU_F_MODHDR) { + sop = skb->data[RCPU_HDR_SIZE]; + switch (sop) { + case 0xff: + case 0x81: + case 0xfb: + case 0xfc: + break; + default: + DBG_WARN(("Tx drop: Invalid RCPU meta data\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_rcpu_meta++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + if (sinfo->cmic_type != 'x') { + rcpulen += RCPU_TX_META_SIZE; + } + } + /* Skip over RCPU encapsulation */ + pktdata = &skb->data[rcpulen]; + pktlen -= rcpulen; + + /* CPU packets require tag */ + if (sop == 0) { + hdrlen = 0; + tpid = (pktdata[12] << 8) | pktdata[13]; + if (tpid != 0x8100) { + if (skb_header_cloned(skb)) { + /* Current SKB cannot be modified */ + DBG_SKB(("Realloc Tx SKB\n")); + new_skb = dev_alloc_skb(pktlen + 4); + if (new_skb == NULL) { + DBG_WARN(("Tx drop: No SKB memory\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_no_skb++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + memcpy(new_skb->data, pktdata, 12); + memcpy(&new_skb->data[16], &pktdata[12], pktlen - 12); + skb_put(new_skb, pktlen + 4); + dev_kfree_skb_any(skb); + skb = new_skb; + pktdata = skb->data; + rcpulen = 0; + } else { + /* Add tag to RCPU header space */ + DBG_SKB(("Expand into unused RCPU header\n")); + rcpulen -= 4; + pktdata = &skb->data[rcpulen]; + for (idx = 0; idx < 12; idx++) { + pktdata[idx] = pktdata[idx + 4]; + } + } + pktdata[12] = 0x81; + pktdata[13] = 0x00; + pktdata[14] = (priv->vlan >> 8) & 0xf; + pktdata[15] = priv->vlan & 0xff; + pktlen += 4; + } + } + } else { + if (sinfo->cmic_type == 'x' && priv->port >= 0) { + if (skb_header_cloned(skb) || skb_headroom(skb) < hdrlen + 4 || + (sinfo->dcb_type == 36 && (unsigned long)skb->data % 4)) { + /* Current SKB cannot be modified */ + DBG_SKB(("Realloc Tx SKB\n")); + new_skb = dev_alloc_skb(pktlen + hdrlen + 4); + if (new_skb == NULL) { + DBG_WARN(("Tx drop: No SKB memory\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_no_skb++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + skb_reserve(new_skb, 4); + memcpy(new_skb->data + hdrlen, skb->data, pktlen); + skb_put(new_skb, pktlen + hdrlen); + dev_kfree_skb_any(skb); + skb = new_skb; + } else { + DBG_SKB(("Expand Tx SKB\n")); + skb_push(skb, hdrlen); + } + memset(skb->data, 0, hdrlen); + pktdata = skb->data; + pktlen += hdrlen; + } else { + hdrlen = 0; + } + + if (priv->port < 0 || (priv->flags & KCOM_NETIF_F_ADD_TAG)) { + /* Need to add VLAN tag if packet is untagged */ + tpid = (skb->data[hdrlen + 12] << 8) | skb->data[hdrlen + 13]; + if (tpid != 0x8100) { + if (skb_header_cloned(skb) || skb_headroom(skb) < 4) { + /* Current SKB cannot be modified */ + DBG_SKB(("Realloc Tx SKB\n")); + new_skb = dev_alloc_skb(pktlen + 4); + if (new_skb == NULL) { + DBG_WARN(("Tx drop: No SKB memory\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_no_skb++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + memcpy(new_skb->data, skb->data, hdrlen + 12); + memcpy(&new_skb->data[hdrlen + 16], &skb->data[hdrlen + 12], + pktlen - hdrlen - 12); + skb_put(new_skb, pktlen + 4); + dev_kfree_skb_any(skb); + skb = new_skb; + } else { + /* Add tag to existing buffer */ + DBG_SKB(("Expand Tx SKB\n")); + skb_push(skb, 4); + for (idx = 0; idx < hdrlen + 12; idx++) { + skb->data[idx] = skb->data[idx + 4]; + } + } + pktdata = skb->data; + pktdata[hdrlen + 12] = 0x81; + pktdata[hdrlen + 13] = 0x00; + pktdata[hdrlen + 14] = (priv->vlan >> 8) & 0xf; + pktdata[hdrlen + 15] = priv->vlan & 0xff; + pktlen += 4; + } + } + } + + /* Pad packet if needed */ + taglen = 0; + tpid = (pktdata[hdrlen + 12] << 8) | pktdata[hdrlen + 13]; + if (tpid == 0x8100) { + taglen = 4; + } + if (pktlen < (64 + taglen + hdrlen)) { + pktlen = (64 + taglen + hdrlen); + if (SKB_PADTO(skb, pktlen) != 0) { + DBG_WARN(("Tx drop: skb_padto failed\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_pad_fail++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + /* skb_padto may update the skb->data pointer */ + pktdata = &skb->data[rcpulen]; + DBG_SKB(("Packet padded to %d bytes\n", pktlen)); + } + + if (pktlen > SOC_DCB_KNET_COUNT_MASK) { + DBG_WARN(("Tx drop: size of pkt (%d) is out of range(%d)\n", + pktlen, SOC_DCB_KNET_COUNT_MASK)); + sinfo->tx.pkts_d_over_limit++; + priv->stats.tx_dropped++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + + dcb = desc->dcb_mem; + meta = sinfo->cmic_type == 'x' ? (uint32_t *)pktdata : dcb; + memset(dcb, 0, sinfo->dcb_wsize * sizeof(uint32_t)); + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + /* If module header SOP is non-zero, use RCPU meta data */ + if (sop != 0) { + if (sinfo->cmic_type == 'x') { + dcb[2] |= 1 << 19; + } else { + metalen = (sinfo->dcb_wsize - 3) * sizeof(uint32_t); + if (metalen > RCPU_TX_META_SIZE) { + metalen = RCPU_TX_META_SIZE; + } + metadata = (uint32_t *)&skb->data[RCPU_HDR_SIZE]; + for (idx = 0; idx < BYTES2WORDS(metalen); idx++) { + dcb[idx + 2] = ntohl(metadata[idx]); + } + dcb[1] |= 1 << 19; + } + } + } else if (priv->port >= 0) { + /* Send to physical port */ + if (sinfo->cmic_type == 'x') { + dcb[2] |= 1 << 19; + } else { + dcb[1] |= 1 << 19; + } + switch (sinfo->dcb_type) { + case 23: + case 26: + case 30: + case 31: + case 34: + case 37: + dcb[2] = 0x81000000; + dcb[3] = priv->port; + dcb[3] |= (priv->qnum & 0xc00) << 20; + dcb[4] = 0x00040000; + dcb[4] |= (priv->qnum & 0x3ff) << 8; + break; + case 24: + dcb[2] = 0xff000000; + dcb[3] = 0x00000100; + dcb[4] = priv->port; + dcb[4] |= (priv->qnum & 0xfff) << 14; + break; + case 28: + { + if (priv->type == KCOM_NETIF_T_PORT) { + /* add PTCH ITMH header */ + if (skb_header_cloned(skb) || skb_headroom(skb) < 4) { + /* Current SKB cannot be modified */ + DBG_SKB(("Realloc Tx SKB for DNX ITMH header\n")); + new_skb = dev_alloc_skb(pktlen + 4 + 2); + if (new_skb == NULL) { + DBG_WARN(("Tx drop: No SKB memory for DNX ITMH header\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_no_skb++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + memcpy(&new_skb->data[6], skb->data, pktlen); + skb_put(new_skb, pktlen + 6); + dev_kfree_skb_any(skb); + skb = new_skb; + } else { + /* Add tag to existing buffer */ + DBG_SKB(("Expand Tx SKB for DNX ITMH header\n")); + skb_push(skb, 6); + } + pktdata = skb->data; + pktdata[0] = 0x50; + pktdata[1] = 0x00; + memcpy(&pktdata[2], priv->itmh, 4); + pktlen += 6; + } + else if (priv->type == KCOM_NETIF_T_VLAN) { + /* add PTCH header */ + if (skb_header_cloned(skb) || skb_headroom(skb) < 4) { + /* Current SKB cannot be modified */ + DBG_SKB(("Realloc Tx SKB for DNX header\n")); + new_skb = dev_alloc_skb(pktlen + 2); + if (new_skb == NULL) { + DBG_WARN(("Tx drop: No SKB memory for DNX header\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_no_skb++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + memcpy(&new_skb->data[2], skb->data, pktlen); + skb_put(new_skb, pktlen + 2); + dev_kfree_skb_any(skb); + skb = new_skb; + } else { + /* Add tag to existing buffer */ + DBG_SKB(("Expand Tx SKB for DNX header\n")); + skb_push(skb, 2); + } + pktdata = skb->data; + pktdata[0] = 0xd0; + pktdata[1] = priv->port; + pktlen += 2; + } + dcb[1] = pktlen; + break; + } + case 29: + dcb[2] = 0x81000000; + dcb[3] = priv->port; + dcb[4] = 0x00100000; + dcb[4] |= (priv->qnum & 0xfff) << 8; + break; + case 32: + dcb[2] = 0x81000000; + dcb[3] = priv->port; + dcb[4] = 0x00004000; + dcb[4] |= (priv->qnum & 0x3f) << 8; + break; + case 33: + dcb[2] = 0x81000000; + dcb[3] = (priv->port) << 2; + dcb[4] = 0x00100000; + dcb[4] |= (priv->qnum & 0xfff) << 8; + break; + case 35: + dcb[2] = 0x81000000; + dcb[3] = (priv->port) << 4; + dcb[4] = 0x00400000; + dcb[4] |= (priv->qnum & 0x3fff) << 8; + break; + case 36: + if (sinfo->cmic_type == 'x') { + meta[0] = htonl(0x81000000); + meta[1] = htonl(priv->port); + meta[2] = htonl(0x00008000 | (priv->qnum & 0x3f) << 9); + } else { + dcb[2] = 0x81000000; + dcb[3] = priv->port; + dcb[4] = 0x00008000; + dcb[4] |= (priv->qnum & 0x3f) << 9; + } + break; + case 38: + if (sinfo->cmic_type == 'x') { + meta[0] = htonl(0x81000000); + meta[1] = htonl(priv->port); + meta[2] = htonl(0x00004000 | (priv->qnum & 0x3f) << 8); + } else { + dcb[2] = 0x81000000; + dcb[3] = priv->port; + dcb[4] = 0x00004000; + dcb[4] |= (priv->qnum & 0x3f) << 8; + } + break; + default: + dcb[2] = 0xff000000; + dcb[3] = 0x00000100; + dcb[4] = priv->port; + break; + } + } + + /* Optional SKB updates */ + if (knet_tx_cb != NULL) { + KNET_SKB_CB(skb)->netif_user_data = priv->cb_user_data; + KNET_SKB_CB(skb)->dcb_type = sinfo->dcb_type & 0xFFFF; + skb = knet_tx_cb(skb, sinfo->dev_no, meta); + if (skb == NULL) { + /* Consumed by call-back */ + DBG_WARN(("Tx drop: Consumed by call-back\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_callback++; + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + /* Restore (possibly) altered packet variables + * bit0 -bit15 of dcb[1] is used to save requested byte count + */ + if ((skb->len + 4) <= SOC_DCB_KNET_COUNT_MASK) { + pktlen = skb->len + 4; + if (pktlen < (64 + taglen + hdrlen)) { + pktlen = (64 + taglen + hdrlen); + if (SKB_PADTO(skb, pktlen) != 0) { + DBG_WARN(("Tx drop: skb_padto failed\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_pad_fail++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + DBG_SKB(("Packet padded to %d bytes after tx callback\n", pktlen)); + } + pktdata = skb->data; + } else { + DBG_WARN(("Tx drop: size of pkt (%d) is out of range(%d)\n", + pktlen, SOC_DCB_KNET_COUNT_MASK)); + sinfo->tx.pkts_d_over_limit++; + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_callback++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + } + + /* Prepare for DMA */ + desc->skb = skb; + desc->dma_size = pktlen; + desc->skb_dma = DMA_MAP_SINGLE(sinfo->dma_dev, + pktdata, desc->dma_size, + DMA_TODEV); + if (DMA_MAPPING_ERROR(sinfo->dma_dev, desc->skb_dma)) { + priv->stats.tx_dropped++; + dev_kfree_skb_any(skb); + spin_unlock_irqrestore(&sinfo->lock, flags); + return 0; + } + dcb[0] = desc->skb_dma; + if (sinfo->cmic_type == 'x') { + dcb[1] = DMA_TO_BUS_HI(desc->skb_dma >> 32); + dcb[2] &= ~SOC_DCB_KNET_COUNT_MASK; + dcb[2] |= pktlen; + } else { + dcb[1] &= ~SOC_DCB_KNET_COUNT_MASK; + dcb[1] |= pktlen; + } + + bkn_dump_dcb("Tx RCPU", dcb, sinfo->dcb_wsize, XGS_DMA_TX_CHAN); + DBG_DCB_TX(("Add Tx DCB @ 0x%08x (%d) [%d free] (%d bytes).\n", + (uint32_t)desc->dcb_dma, sinfo->tx.cur, + sinfo->tx.free, pktlen)); + bkn_dump_pkt(pktdata, pktlen, XGS_DMA_TX_CHAN); + + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + if (sinfo->cmic_type == 'x') { + dcb[2] |= 1 << 24 | 1 << 16; + } else { + dcb[1] |= 1 << 24 | 1 << 16; + } + } else { + bkn_tx_dma_start(sinfo); + } + if (++sinfo->tx.cur >= MAX_TX_DCBS) { + sinfo->tx.cur = 0; + } + sinfo->tx.free--; + + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN) && !sinfo->tx.api_active) { + /* DMA run to the new halt location */ + bkn_cdma_goto(sinfo, XGS_DMA_TX_CHAN, + sinfo->tx.desc[sinfo->tx.cur].dcb_dma); + } + + priv->stats.tx_packets++; + priv->stats.tx_bytes += pktlen; + sinfo->tx.pkts++; + } else { + DBG_WARN(("Tx drop: No DMA resources\n")); + priv->stats.tx_dropped++; + sinfo->tx.pkts_d_dma_resrc++; + dev_kfree_skb_any(skb); + } + + /* Check our Tx resources */ + if (sinfo->tx.free <= 1) { + bkn_suspend_tx(sinfo); + } + + NETDEV_UPDATE_TRANS_START_TIME(dev); + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return 0; +} + +static void +bkn_timer(unsigned long context) +{ + bkn_switch_info_t *sinfo = (bkn_switch_info_t *)context; + unsigned long flags; + int chan; + int restart_timer; + + spin_lock_irqsave(&sinfo->lock, flags); + + sinfo->timer_runs++; + + restart_timer = 0; + for (chan = 0; chan < sinfo->rx_chans; chan++) { + /* Restart channel if not running */ + if (sinfo->rx[chan].running == 0) { + bkn_rx_refill(sinfo, chan); + if (bkn_rx_restart(sinfo, chan) != 0) { + restart_timer = 1; + } + } + } + + if (restart_timer) { + /* Presumably still out of memory */ + sinfo->timer.expires = jiffies + 1; + add_timer(&sinfo->timer); + } else { + sinfo->timer_queued = 0; + } + + spin_unlock_irqrestore(&sinfo->lock, flags); +} + +static void +bkn_rx_add_tokens(bkn_switch_info_t *sinfo, int chan) +{ + unsigned long cur_jif, ticks; + uint32_t tokens_per_tick; + bkn_desc_info_t *desc; + + tokens_per_tick = sinfo->rx[chan].rate_max / HZ; + cur_jif = jiffies; + ticks = cur_jif - sinfo->rx[chan].tok_jif; + sinfo->rx[chan].tokens += ticks * tokens_per_tick; + sinfo->rx[chan].tok_jif = cur_jif; + if (sinfo->rx[chan].tokens > sinfo->rx[chan].burst_max) { + sinfo->rx[chan].tokens = sinfo->rx[chan].burst_max; + } + + /* Restart channel if Rx is suppressed */ + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + bkn_rx_refill(sinfo, chan); + desc = &sinfo->rx[chan].desc[sinfo->rx[chan].dirty]; + if (desc->dcb_dma == sinfo->halt_addr[XGS_DMA_RX_CHAN + chan]) { + desc = &sinfo->rx[chan].desc[MAX_RX_DCBS]; + bkn_cdma_goto(sinfo, XGS_DMA_RX_CHAN + chan, desc->dcb_dma); + } + } else { + if (sinfo->rx[chan].running == 0) { + bkn_rx_refill(sinfo, chan); + bkn_rx_restart(sinfo, chan); + } + } +} + +static void +bkn_rxtick(unsigned long context) +{ + bkn_switch_info_t *sinfo = (bkn_switch_info_t *)context; + unsigned long flags; + unsigned long cur_jif, ticks; + uint32_t pkt_diff; + int chan; + + spin_lock_irqsave(&sinfo->lock, flags); + + sinfo->rxtick.expires = jiffies + sinfo->rxtick_jiffies; + + /* For debug purposes we maintain a rough actual packet rate */ + if (++sinfo->rxticks >= sinfo->rxticks_per_sec) { + for (chan = 0; chan < sinfo->rx_chans; chan++) { + pkt_diff = sinfo->rx[chan].pkts - sinfo->rx[chan].pkts_ref; + cur_jif = jiffies; + ticks = cur_jif - sinfo->rx[chan].rate_jif; + sinfo->rx[chan].rate = (pkt_diff * HZ) / ticks; + sinfo->rx[chan].rate_jif = cur_jif; + sinfo->rx[chan].pkts_ref = sinfo->rx[chan].pkts; + } + sinfo->rxticks = 0; + } + + /* Update tokens for Rx rate control */ + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (sinfo->rx[chan].tokens < sinfo->rx[chan].burst_max) { + bkn_rx_add_tokens(sinfo, chan); + } + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + + add_timer(&sinfo->rxtick); +} + +static void +bkn_rx_rate_config(bkn_switch_info_t *sinfo) +{ + unsigned long flags; + int chan; + uint32_t rxticks_per_sec, rps; + uint32_t jiffies_per_rxtick; + uint32_t tokens_per_rxtick; + + spin_lock_irqsave(&sinfo->lock, flags); + + /* Calculate the minimum update frequency across all channels */ + rxticks_per_sec = 1; + for (chan = 0; chan < NUM_RX_CHAN; chan++) { + if (sinfo->rx[chan].burst_max == 0) { + sinfo->rx[chan].burst_max = sinfo->rx[chan].rate_max / 10; + } + rps = sinfo->rx[chan].rate_max / sinfo->rx[chan].burst_max; + if (rxticks_per_sec < rps) { + rxticks_per_sec = rps; + } + } + + /* Convert update frequency to system ticks */ + jiffies_per_rxtick = HZ / rxticks_per_sec; + if (jiffies_per_rxtick == 0) { + jiffies_per_rxtick = 1; + } + rxticks_per_sec = HZ / jiffies_per_rxtick; + + for (chan = 0; chan < NUM_RX_CHAN; chan++) { + /* Ensure that burst size satifies overall rate */ + tokens_per_rxtick = sinfo->rx[chan].rate_max / rxticks_per_sec; + if (sinfo->rx[chan].burst_max < tokens_per_rxtick) { + sinfo->rx[chan].burst_max = tokens_per_rxtick; + } + /* Ensure that rate has a sane value */ + if (sinfo->rx[chan].rate_max != 0) { + if (sinfo->rx[chan].rate_max < rxticks_per_sec) { + sinfo->rx[chan].rate_max = rxticks_per_sec; + } + } + sinfo->rx[chan].tokens = sinfo->rx[chan].burst_max; + } + + /* Update timer controls */ + sinfo->rxticks_per_sec = rxticks_per_sec; + sinfo->rxtick_jiffies = jiffies_per_rxtick; + + spin_unlock_irqrestore(&sinfo->lock, flags); +} + +static void +bkn_destroy_sinfo(bkn_switch_info_t *sinfo) +{ + list_del(&sinfo->list); + bkn_free_dcbs(sinfo); + kfree(sinfo); +} + +static bkn_switch_info_t * +bkn_create_sinfo(int dev_no) +{ + bkn_switch_info_t *sinfo; + int chan; + + if ((sinfo = kmalloc(sizeof(*sinfo), GFP_KERNEL)) == NULL) { + return NULL; + } + memset(sinfo, 0, sizeof(*sinfo)); + INIT_LIST_HEAD(&sinfo->ndev_list); + INIT_LIST_HEAD(&sinfo->rxpf_list); + sinfo->base_addr = lkbde_get_dev_virt(dev_no); + sinfo->dma_dev = lkbde_get_dma_dev(dev_no); + sinfo->pdev = lkbde_get_hw_dev(dev_no); + sinfo->dev_no = dev_no; + sinfo->evt_idx = -1; + + spin_lock_init(&sinfo->lock); + + init_timer(&sinfo->timer); + sinfo->timer.expires = jiffies + 1; + sinfo->timer.data = (unsigned long)sinfo; + sinfo->timer.function = bkn_timer; + + INIT_LIST_HEAD(&sinfo->tx.api_dcb_list); + + for (chan = 0; chan < NUM_RX_CHAN; chan++) { + INIT_LIST_HEAD(&sinfo->rx[chan].api_dcb_list); + sinfo->rx[chan].use_rx_skb = use_rx_skb; + } + + /* + * Check for dual DMA mode where Rx DMA channel 0 uses DMA buffers + * provided by the BCM API, and the remaining Rx DMA channel(s) + * use socket buffers (SKB) provided by the Linux kernel. + */ + if (use_rx_skb == 2) { + sinfo->rx[0].use_rx_skb = 0; + } + + init_timer(&sinfo->rxtick); + sinfo->rxtick.expires = jiffies + 1; + sinfo->rxtick.data = (unsigned long)sinfo; + sinfo->rxtick.function = bkn_rxtick; + + for (chan = 0; chan < NUM_RX_CHAN; chan++) { + sinfo->rx[chan].rate_max = rx_rate[chan]; + sinfo->rx[chan].burst_max = rx_burst[chan]; + } + bkn_rx_rate_config(sinfo); + + add_timer(&sinfo->rxtick); + + list_add_tail(&sinfo->list, &_sinfo_list); + + return sinfo; +} + + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)) +static const struct net_device_ops bkn_netdev_ops = { + .ndo_open = bkn_open, + .ndo_stop = bkn_stop, + .ndo_start_xmit = bkn_tx, + .ndo_get_stats = bkn_get_stats, + .ndo_validate_addr = eth_validate_addr, + .ndo_set_rx_mode = bkn_set_multicast_list, + .ndo_set_mac_address = bkn_set_mac_address, + .ndo_do_ioctl = NULL, + .ndo_tx_timeout = NULL, + .ndo_change_mtu = bkn_change_mtu, +#ifdef CONFIG_NET_POLL_CONTROLLER + .ndo_poll_controller = bkn_poll_controller, +#endif +}; +#endif + +static struct net_device * +bkn_init_ndev(u8 *mac, char *name) +{ + struct net_device *dev; + + /* Create Ethernet device */ + dev = alloc_etherdev(sizeof(bkn_priv_t)); + + if (dev == NULL) { + DBG_WARN(("Error allocating Ethernet device.\n")); + return NULL; + } +#ifdef SET_MODULE_OWNER + SET_MODULE_OWNER(dev); +#endif + + /* Set the device MAC address */ + memcpy(dev->dev_addr, mac, 6); + + /* Device information -- not available right now */ + dev->irq = 0; + dev->base_addr = 0; + + /* Default MTU should not exceed MTU of switch front-panel ports */ + dev->mtu = default_mtu; + if (dev->mtu == 0) { + dev->mtu = rx_buffer_size; + } + + /* Device vectors */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)) + dev->netdev_ops = &bkn_netdev_ops; +#else + dev->open = bkn_open; + dev->hard_start_xmit = bkn_tx; + dev->stop = bkn_stop; + dev->set_multicast_list = bkn_set_multicast_list; + dev->do_ioctl = NULL; + dev->get_stats = bkn_get_stats; + dev->change_mtu = bkn_change_mtu; +#ifdef CONFIG_NET_POLL_CONTROLLER + dev->poll_controller = bkn_poll_controller; +#endif +#endif + if (name && *name) { + strncpy(dev->name, name, IFNAMSIZ-1); + } + + /* Register the kernel Ethernet device */ + if (register_netdev(dev)) { + DBG_WARN(("Error registering Ethernet device.\n")); + free_netdev(dev); + return NULL; + } + DBG_VERB(("Created Ethernet device %s.\n", dev->name)); + + return dev; +} + +/* + * Device Link Control Proc Read Entry + */ +static int +bkn_proc_link_show(struct seq_file *m, void *v) +{ + struct list_head *slist, *dlist; + struct net_device *dev; + bkn_priv_t *priv; + bkn_switch_info_t *sinfo; + unsigned long flags; + + seq_printf(m, "Software link status:\n"); + list_for_each(slist, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)slist; + spin_lock_irqsave(&sinfo->lock, flags); + list_for_each(dlist, &sinfo->ndev_list) { + priv = (bkn_priv_t *)dlist; + dev = priv->dev; + if (dev) { + seq_printf(m, " %-14s %s\n", dev->name, + netif_carrier_ok(dev) ? "up" : "down"); + } + } + spin_unlock_irqrestore(&sinfo->lock, flags); + } + return 0; +} + +static int +bkn_proc_link_open(struct inode * inode, struct file * file) +{ + return single_open(file, bkn_proc_link_show, NULL); +} + +/* + * Device Link Control Proc Write Entry + * + * Syntax: + * =up|down + * + * Where is a virtual network interface name. + * + * Examples: + * eth4=up + * eth4=down + */ +static ssize_t +bkn_proc_link_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + struct list_head *slist, *dlist; + struct net_device *dev; + bkn_priv_t *priv; + bkn_switch_info_t *sinfo; + unsigned long flags; + char link_str[40]; + char *ptr; + char *newline; + + if (count > sizeof(link_str)) { + count = sizeof(link_str) - 1; + link_str[count] = '\0'; + } + if (copy_from_user(link_str, buf, count)) { + return -EFAULT; + } + link_str[count] = 0; + newline = strchr(link_str, '\n'); + if (newline) { + /* Chop off the trailing newline */ + *newline = '\0'; + } + + if ((ptr = strchr(link_str, '=')) == NULL && + (ptr = strchr(link_str, ':')) == NULL) { + gprintk("Error: link syntax not recognized: '%s'\n", link_str); + return count; + } + *ptr++ = 0; + + dev = NULL; + list_for_each(slist, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)slist; + spin_lock_irqsave(&sinfo->lock, flags); + list_for_each(dlist, &sinfo->ndev_list) { + priv = (bkn_priv_t *)dlist; + if (priv->dev) { + if (strcmp(priv->dev->name, link_str) == 0) { + dev = priv->dev; + break; + } + } + } + if (dev) { + if (strcmp(ptr, "up") == 0) { + netif_carrier_on(dev); + } else if (strcmp(ptr, "down") == 0) { + netif_carrier_off(dev); + } else { + gprintk("Warning: unknown link state setting: '%s'\n", ptr); + } + spin_unlock_irqrestore(&sinfo->lock, flags); + return count; + } + spin_unlock_irqrestore(&sinfo->lock, flags); + } + + gprintk("Warning: unknown network interface: '%s'\n", link_str); + + return count; +} + +struct file_operations bkn_proc_link_file_ops = { + owner: THIS_MODULE, + open: bkn_proc_link_open, + read: seq_read, + llseek: seq_lseek, + write: bkn_proc_link_write, + release: single_release, +}; + +/* + * Device Rate Control Proc Read Entry + */ +static int +bkn_proc_rate_show(struct seq_file *m, void *v) +{ + int unit = 0; + struct list_head *list; + bkn_switch_info_t *sinfo; + int chan; + + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + + seq_printf(m, "Rate control (unit %d):\n", unit); + for (chan = 0; chan < sinfo->rx_chans; chan++) { + seq_printf(m, " Rx%d max rate %8u\n", + chan, sinfo->rx[chan].rate_max); + seq_printf(m, " Rx%d max burst %8u\n", + chan, sinfo->rx[chan].burst_max); + seq_printf(m, " Rx%d rate %8u\n", + chan, sinfo->rx[chan].rate); + seq_printf(m, " Rx%d tokens %8u\n", + chan, sinfo->rx[chan].tokens); + } + + unit++; + } + return 0; +} + +static int +bkn_proc_rate_open(struct inode * inode, struct file * file) +{ + return single_open(file, bkn_proc_rate_show, NULL); +} + +/* + * Device Rate Control Proc Write Entry + * + * Syntax: + * [:]rx_rate=[,[, is packets/sec for the first Rx DMA channel, + * is packets/sec for the second Rx DMA channel, etc. + * + * Examples: + * rx_rate=5000 + * 0:rx_rate=10000,10000 + * 1:rx_rate=10000,5000 + */ +static ssize_t +bkn_proc_rate_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + bkn_switch_info_t *sinfo; + char rate_str[80]; + char *ptr; + int unit, chan; + + if (count > sizeof(rate_str)) { + count = sizeof(rate_str) - 1; + rate_str[count] = '\0'; + } + if (copy_from_user(rate_str, buf, count)) { + return -EFAULT; + } + + unit = simple_strtol(rate_str, NULL, 10); + sinfo = bkn_sinfo_from_unit(unit); + if (sinfo == NULL) { + gprintk("Warning: unknown unit: %d\n", unit); + return count; + } + + if ((ptr = strstr(rate_str, "rx_rate=")) != NULL) { + ptr += 7; + chan = 0; + do { + ptr++; + sinfo->rx[chan].rate_max = simple_strtol(ptr, NULL, 10); + } while ((ptr = strchr(ptr, ',')) != NULL && ++chan < sinfo->rx_chans); + bkn_rx_rate_config(sinfo); + } else if ((ptr = strstr(rate_str, "rx_burst=")) != NULL) { + ptr += 8; + chan = 0; + do { + ptr++; + sinfo->rx[chan].burst_max = simple_strtol(ptr, NULL, 10); + } while ((ptr = strchr(ptr, ',')) != NULL && ++chan < sinfo->rx_chans); + bkn_rx_rate_config(sinfo); + } else { + gprintk("Warning: unknown configuration setting\n"); + } + + return count; +} + +struct file_operations bkn_proc_rate_file_ops = { + owner: THIS_MODULE, + open: bkn_proc_rate_open, + read: seq_read, + llseek: seq_lseek, + write: bkn_proc_rate_write, + release: single_release, +}; + +/* + * Driver DMA Proc Entry + * + * This output can be rather large (> PAGE_SIZE) so we use the + * seq_file interface to do the output. Special header records + * are indicated by a negative DCB index. + */ +typedef struct { + int dev_no; /* Current unit */ + int rx_dma; /* 0: Tx DMA, 1: Rx DMA*/ + int ch_no; /* DMA channel no. (Rx only) */ + int idx; /* DCB index */ +} bkn_seq_dma_iter_t; + +/* From current record, move forward 'pos' records */ +static int +bkn_seq_dma_next_pos(bkn_seq_dma_iter_t *iter, loff_t pos) +{ + bkn_switch_info_t *sinfo; + + sinfo = bkn_sinfo_from_unit(iter->dev_no); + while (pos) { + if (iter->rx_dma) { + if (++iter->idx >= MAX_RX_DCBS + 1) { + iter->idx = -1; + if (++iter->ch_no >= sinfo->rx_chans) { + iter->rx_dma = 0; + iter->ch_no = 0; + iter->dev_no++; + if ((sinfo = bkn_sinfo_from_unit(iter->dev_no)) == NULL) { + return -1; + } + } + } + } else { + if (++iter->idx >= MAX_TX_DCBS + 1) { + iter->idx = -1; + iter->rx_dma = 1; + } + } + pos--; + } + return 0; +} + +/* Initialize private data and move to requested start record */ +static void * +bkn_seq_dma_start(struct seq_file *s, loff_t *pos) +{ + bkn_seq_dma_iter_t *iter; + + iter = kmalloc(sizeof(bkn_seq_dma_iter_t), GFP_KERNEL); + if (!iter) { + return NULL; + } + memset(iter, 0, sizeof(*iter)); + iter->idx = -2; + if (bkn_seq_dma_next_pos(iter, *pos) < 0) { + kfree(iter); + return NULL; + } + return iter; +} + +/* Move to next record */ +static void * +bkn_seq_dma_next(struct seq_file *s, void *v, loff_t *pos) +{ + bkn_seq_dma_iter_t *iter = (bkn_seq_dma_iter_t *)v; + void *rv = iter; + + if (bkn_seq_dma_next_pos(iter, 1) < 0) { + return NULL; + } + (*pos)++; + return rv; +} + +/* Release private data */ +static void +bkn_seq_dma_stop(struct seq_file *s, void *v) +{ + if (v) { + kfree(v); + } +} + +/* Print current record */ +static int +bkn_seq_dma_show(struct seq_file *s, void *v) +{ + bkn_seq_dma_iter_t *iter = (bkn_seq_dma_iter_t *)v; + bkn_switch_info_t *sinfo; + uint32_t *dcb = NULL; + bkn_dcb_chain_t *dcb_chain = NULL; + struct list_head *curr, *next; + unsigned long flags; + int chan, cnt; + + sinfo = bkn_sinfo_from_unit(iter->dev_no); + if (sinfo == NULL) { + /* Should not happen */ + return 0; + } + + if (iter->rx_dma == 0) { + if (iter->idx == -2) { + seq_printf(s, "Pending events: 0x%x\n", sinfo->dma_events); + } else if (iter->idx == -1) { + spin_lock_irqsave(&sinfo->lock, flags); + curr = &sinfo->tx.api_dcb_list; + dcb_chain = sinfo->tx.api_dcb_chain; + while (dcb_chain) { + seq_printf(s, " [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma); + for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) { + dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt]; + if (sinfo->cmic_type == 'x') { + seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, + dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); + } else { + seq_printf(s, " DCB %2d: 0x%08x 0x%08x ... 0x%08x\n", cnt, + dcb[0], dcb[1], dcb[sinfo->dcb_wsize-1]); + } + } + next = curr->next; + if (next != &sinfo->tx.api_dcb_list) { + dcb_chain = list_entry(next, bkn_dcb_chain_t, list); + curr = next; + } else { + dcb_chain = NULL; + } + } + dcb = NULL; + spin_unlock_irqrestore(&sinfo->lock, flags); + seq_printf(s, + "Tx DCB info (unit %d):\n" + " api: %d\n" + " dirty: %d\n" + " cur: %d\n" + " free: %d\n" + " pause: %s\n", + iter->dev_no, + sinfo->tx.api_active, + sinfo->tx.dirty, + sinfo->tx.cur, + sinfo->tx.free, + netif_queue_stopped(sinfo->dev) ? "yes" : "no"); + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + bkn_desc_info_t *desc = &sinfo->tx.desc[0]; + uint64_t halt = sinfo->halt_addr[XGS_DMA_TX_CHAN]; + seq_printf(s, + " halt: %d\n", + (int)((uint32_t)(halt - desc->dcb_dma) / (sinfo->dcb_wsize * sizeof(uint32_t)))); + } + } else { + dcb = sinfo->tx.desc[iter->idx].dcb_mem; + if (iter->idx == 0) { + seq_printf(s, " [0x%08lx]--->\n", (unsigned long)sinfo->tx.desc[0].dcb_dma); + } + } + } else { + if (iter->idx == -1) { + chan = iter->ch_no; + seq_printf(s, + "Rx%d DCB info (unit %d):\n" + " api: %d\n" + " dirty: %d\n" + " cur: %d\n" + " free: %d\n" + " run: %d\n", + chan, iter->dev_no, + sinfo->rx[chan].api_active, + sinfo->rx[chan].dirty, + sinfo->rx[chan].cur, + sinfo->rx[chan].free, + sinfo->rx[chan].running); + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan) && sinfo->rx[chan].use_rx_skb) { + bkn_desc_info_t *desc = &sinfo->rx[chan].desc[0]; + uint64_t halt = sinfo->halt_addr[XGS_DMA_RX_CHAN + chan]; + seq_printf(s, + " halt: %d\n", + (int)((uint32_t)(halt - desc->dcb_dma) / (sinfo->dcb_wsize * sizeof(uint32_t)))); + } + } else if (sinfo->rx[iter->ch_no].use_rx_skb) { + dcb = sinfo->rx[iter->ch_no].desc[iter->idx].dcb_mem; + if (iter->idx == 0) { + seq_printf(s, " [0x%08lx]--->\n", (unsigned long)sinfo->rx[iter->ch_no].desc[0].dcb_dma); + } + } else if (!sinfo->rx[iter->ch_no].use_rx_skb && iter->idx == 0) { + spin_lock_irqsave(&sinfo->lock, flags); + curr = &sinfo->rx[iter->ch_no].api_dcb_list; + dcb_chain = sinfo->rx[iter->ch_no].api_dcb_chain; + while (dcb_chain) { + seq_printf(s, " [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma); + for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) { + dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt]; + if (sinfo->cmic_type == 'x') { + seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, + dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); + } else { + seq_printf(s, " DCB %2d: 0x%08x 0x%08x ... 0x%08x\n", cnt, + dcb[0], dcb[1], dcb[sinfo->dcb_wsize-1]); + } + } + next = curr->next; + if (next != &sinfo->rx[iter->ch_no].api_dcb_list) { + dcb_chain = list_entry(next, bkn_dcb_chain_t, list); + curr = next; + } else { + dcb_chain = NULL; + } + } + dcb = NULL; + spin_unlock_irqrestore(&sinfo->lock, flags); + } + } + if (dcb) { + if (sinfo->cmic_type == 'x') { + seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", iter->idx, + dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); + } else { + seq_printf(s, " DCB %2d: 0x%08x 0x%08x ... 0x%08x\n", iter->idx, + dcb[0], dcb[1], dcb[sinfo->dcb_wsize-1]); + } + } + return 0; +} + +static struct seq_operations bkn_seq_dma_ops = { + .start = bkn_seq_dma_start, + .next = bkn_seq_dma_next, + .stop = bkn_seq_dma_stop, + .show = bkn_seq_dma_show +}; + +static int +bkn_seq_dma_open(struct inode *inode, struct file *file) +{ + return seq_open(file, &bkn_seq_dma_ops); +}; + +static struct file_operations bkn_seq_dma_file_ops = { + .owner = THIS_MODULE, + .open = bkn_seq_dma_open, + .read = seq_read, + .llseek = seq_lseek, + .release = seq_release +}; + +/* + * Device Debug Control Proc Write Entry + * + * Syntax: + * [:]debug= + * + * Where corresponds to the debug module parameter. + * + * Examples: + * debug=0xffff + * 0:debug-0x2000 + */ +static ssize_t +bkn_proc_debug_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + bkn_switch_info_t *sinfo; + char debug_str[40]; + char *ptr; + int unit; + + if (count > sizeof(debug_str)) { + count = sizeof(debug_str) - 1; + debug_str[count] = '\0'; + } + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + unit = simple_strtol(debug_str, NULL, 10); + sinfo = bkn_sinfo_from_unit(unit); + if (sinfo == NULL) { + gprintk("Warning: unknown unit: %d\n", unit); + return count; + } + + if ((ptr = strstr(debug_str, "debug=")) != NULL) { + ptr += 6; + debug = simple_strtol(ptr, NULL, 0); + } else { + gprintk("Warning: unknown configuration setting\n"); + } + + return count; +} + +/* + * Driver Debug Proc Entry + */ +static int +bkn_proc_debug_show(struct seq_file *m, void *v) +{ + int unit = 0; + struct list_head *list; + bkn_switch_info_t *sinfo; + + seq_printf(m, "Configuration:\n"); + seq_printf(m, " debug: 0x%x\n", debug); + seq_printf(m, " mac_addr: %02x:%02x:%02x:%02x:%02x:%02x\n", + bkn_dev_mac[0], bkn_dev_mac[1], bkn_dev_mac[2], + bkn_dev_mac[3], bkn_dev_mac[4], bkn_dev_mac[5]); + seq_printf(m, " rx_buffer_size: %d (0x%x)\n", + rx_buffer_size, rx_buffer_size); + seq_printf(m, " rcpu_mode: %d\n", rcpu_mode); + seq_printf(m, " rcpu_dmac: %02x:%02x:%02x:%02x:%02x:%02x\n", + bkn_rcpu_dmac[0], bkn_rcpu_dmac[1], bkn_rcpu_dmac[2], + bkn_rcpu_dmac[3], bkn_rcpu_dmac[4], bkn_rcpu_dmac[5]); + seq_printf(m, " rcpu_smac: %02x:%02x:%02x:%02x:%02x:%02x\n", + bkn_rcpu_smac[0], bkn_rcpu_smac[1], bkn_rcpu_smac[2], + bkn_rcpu_smac[3], bkn_rcpu_smac[4], bkn_rcpu_smac[5]); + seq_printf(m, " rcpu_ethertype: 0x%x\n", rcpu_ethertype); + seq_printf(m, " rcpu_signature: 0x%x\n", rcpu_signature); + seq_printf(m, " rcpu_vlan: %d\n", rcpu_vlan); + seq_printf(m, " use_rx_skb: %d\n", use_rx_skb); + seq_printf(m, " num_rx_prio: %d\n", num_rx_prio); + seq_printf(m, " check_rcpu_sig: %d\n", check_rcpu_signature); + seq_printf(m, " default_mtu: %d\n", default_mtu); + seq_printf(m, " rx_sync_retry: %d\n", rx_sync_retry); + seq_printf(m, " use_napi: %d\n", use_napi); + seq_printf(m, " napi_weight: %d\n", napi_weight); + seq_printf(m, " basedev_susp: %d\n", basedev_suspend); + seq_printf(m, "Thread states:\n"); + seq_printf(m, " Command thread: %d\n", bkn_cmd_ctrl.state); + seq_printf(m, " Event thread: %d\n", bkn_evt_ctrl.state); + seq_printf(m, "Active IOCTLs:\n"); + seq_printf(m, " Command: %d\n", ioctl_cmd); + seq_printf(m, " Event: %d\n", ioctl_evt); + + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + + seq_printf(m, "Device %d:\n", unit); + seq_printf(m, " base_addr: 0x%p\n", sinfo->base_addr); + seq_printf(m, " dev_no: %d\n", sinfo->dev_no); + seq_printf(m, " cmic_type: %c\n", sinfo->cmic_type); + seq_printf(m, " dcb_type: %d\n", sinfo->dcb_type); + seq_printf(m, " dcb_wsize: %d\n", sinfo->dcb_wsize); + seq_printf(m, " pkt_hdr_size: %d\n", sinfo->pkt_hdr_size); + seq_printf(m, " rx_chans: %d\n", sinfo->rx_chans); + seq_printf(m, " cdma_chans: 0x%x\n", sinfo->cdma_channels); + seq_printf(m, " irq_mask: 0x%x\n", sinfo->irq_mask); + seq_printf(m, " dma_events: 0x%x\n", sinfo->dma_events); + seq_printf(m, " dcb_dma: 0x%p\n", (void *)(sal_paddr_t)sinfo->dcb_dma); + seq_printf(m, " dcb_mem_size: 0x%x\n", sinfo->dcb_mem_size); + seq_printf(m, " rcpu_sig: 0x%x\n", sinfo->rcpu_sig); + seq_printf(m, " napi_poll_mode: %d\n", sinfo->napi_poll_mode); + seq_printf(m, " inst_id: 0x%x\n", sinfo->inst_id); + seq_printf(m, " evt_queue: %d\n", sinfo->evt_idx); + + unit++; + } + + return 0; +} + +static int bkn_proc_debug_open(struct inode * inode, struct file * file) +{ + return single_open(file, bkn_proc_debug_show, NULL); +} + +struct file_operations bkn_proc_debug_file_ops = { + owner: THIS_MODULE, + open: bkn_proc_debug_open, + read: seq_read, + llseek: seq_lseek, + write: bkn_proc_debug_write, + release: single_release, +}; + +/* + * Device Statistics Proc Entry + */ +static int +bkn_proc_stats_show(struct seq_file *m, void *v) +{ + int unit = 0; + struct list_head *list, *flist; + bkn_switch_info_t *sinfo; + bkn_filter_t *filter; + int chan; + + + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + + seq_printf(m, "Device stats (unit %d):\n", unit); + seq_printf(m, " Interrupts %10u\n", sinfo->interrupts); + seq_printf(m, " Tx packets %10u\n", sinfo->tx.pkts); + for (chan = 0; chan < sinfo->rx_chans; chan++) { + seq_printf(m, " Rx%d packets %10u\n", chan, sinfo->rx[chan].pkts); + } + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (sinfo->interrupts == 0) { + /* Avoid divide-by-zero */ + seq_printf(m, " Rx%d pkts/intr -\n", chan); + } else { + seq_printf(m, " Rx%d pkts/intr %8u\n", + chan, sinfo->rx[chan].pkts / sinfo->interrupts); + } + } + seq_printf(m, " Timer runs %10u\n", sinfo->timer_runs); + seq_printf(m, " NAPI reruns %10u\n", sinfo->napi_not_done); + + list_for_each(flist, &sinfo->rxpf_list) { + filter = (bkn_filter_t *)flist; + + seq_printf(m, " Filter %d stats:\n", filter->kf.id); + seq_printf(m, " Hits %10lu\n", filter->hits); + } + + unit++; + } + return 0; +} + +static int bkn_proc_stats_open(struct inode * inode, struct file * file) +{ + return single_open(file, bkn_proc_stats_show, NULL); +} + +/* + * Device Statistics Proc Write Entry + * + * Syntax: + * [:]clear[=all] + * + * Where corresponds to the debug module parameter. + * + * Examples: + * clear + * 0:clear=all + */ +static ssize_t +bkn_proc_stats_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + bkn_switch_info_t *sinfo; + struct list_head *flist; + bkn_filter_t *filter; + char debug_str[40]; + char *ptr; + int unit; + int clear_mask; + int chan; + + if (count > sizeof(debug_str)) { + count = sizeof(debug_str) - 1; + debug_str[count] = '\0'; + } + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + unit = simple_strtol(debug_str, NULL, 10); + sinfo = bkn_sinfo_from_unit(unit); + if (sinfo == NULL) { + gprintk("Warning: unknown unit: %d\n", unit); + return count; + } + + clear_mask = 0; + if ((ptr = strstr(debug_str, "clear=")) != NULL) { + ptr += 6; + if (strncmp(ptr, "all", 3) == 0) { + clear_mask = ~0; + } + } else if ((ptr = strstr(debug_str, "clear")) != NULL) { + clear_mask = ~0; + } else { + gprintk("Warning: unknown configuration setting\n"); + } + + if (clear_mask) { + sinfo->tx.pkts = 0; + for (chan = 0; chan < sinfo->rx_chans; chan++) { + sinfo->rx[chan].pkts = 0; + } + sinfo->interrupts = 0; + sinfo->timer_runs = 0; + sinfo->napi_not_done = 0; + list_for_each(flist, &sinfo->rxpf_list) { + filter = (bkn_filter_t *)flist; + filter->hits = 0; + } + } + + return count; +} + +struct file_operations bkn_proc_stats_file_ops = { + owner: THIS_MODULE, + open: bkn_proc_stats_open, + read: seq_read, + llseek: seq_lseek, + write: bkn_proc_stats_write, + release: single_release, +}; + +/* + * Device Debug Statistics Proc Entry + */ +static int +bkn_proc_dstats_show(struct seq_file *m, void *v) +{ + int unit = 0; + struct list_head *list; + bkn_switch_info_t *sinfo; + int chan; + + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + + seq_printf(m, "Device debug stats (unit %d):\n", unit); + seq_printf(m, " Tx drop no skb %10u\n", + sinfo->tx.pkts_d_no_skb); + seq_printf(m, " Tx drop rcpu encap %10u\n", + sinfo->tx.pkts_d_rcpu_encap); + seq_printf(m, " Tx drop rcpu sig %10u\n", + sinfo->tx.pkts_d_rcpu_sig); + seq_printf(m, " Tx drop rcpu meta %10u\n", + sinfo->tx.pkts_d_rcpu_meta); + seq_printf(m, " Tx drop pad failed %10u\n", + sinfo->tx.pkts_d_pad_fail); + seq_printf(m, " Tx drop no resource %10u\n", + sinfo->tx.pkts_d_dma_resrc); + seq_printf(m, " Tx drop callback %10u\n", + sinfo->tx.pkts_d_callback); + seq_printf(m, " Tx drop no link %10u\n", + sinfo->tx.pkts_d_no_link); + seq_printf(m, " Tx drop oversized %10u\n", + sinfo->tx.pkts_d_over_limit); + seq_printf(m, " Tx suspends %10u\n", + sinfo->tx.suspends); + for (chan = 0; chan < sinfo->rx_chans; chan++) { + seq_printf(m, " Rx%d filter to api %10u\n", + chan, sinfo->rx[chan].pkts_f_api); + seq_printf(m, " Rx%d filter to netif %10u\n", + chan, sinfo->rx[chan].pkts_f_netif); + seq_printf(m, " Rx%d mirror to api %10u\n", + chan, sinfo->rx[chan].pkts_m_api); + seq_printf(m, " Rx%d mirror to netif %10u\n", + chan, sinfo->rx[chan].pkts_m_netif); + seq_printf(m, " Rx%d drop no skb %10u\n", + chan, sinfo->rx[chan].pkts_d_no_skb); + seq_printf(m, " Rx%d drop no match %10u\n", + chan, sinfo->rx[chan].pkts_d_no_match); + seq_printf(m, " Rx%d drop unkn netif %10u\n", + chan, sinfo->rx[chan].pkts_d_unkn_netif); + seq_printf(m, " Rx%d drop unkn dest %10u\n", + chan, sinfo->rx[chan].pkts_d_unkn_dest); + seq_printf(m, " Rx%d drop callback %10u\n", + chan, sinfo->rx[chan].pkts_d_callback); + seq_printf(m, " Rx%d drop no link %10u\n", + chan, sinfo->rx[chan].pkts_d_no_link); + seq_printf(m, " Rx%d sync error %10u\n", + chan, sinfo->rx[chan].sync_err); + seq_printf(m, " Rx%d sync retry %10u\n", + chan, sinfo->rx[chan].sync_retry); + seq_printf(m, " Rx%d sync maxloop %10u\n", + chan, sinfo->rx[chan].sync_maxloop); + seq_printf(m, " Rx%d drop no buffer %10u\n", + chan, sinfo->rx[chan].pkts_d_no_api_buf); + } + unit++; + } + return 0; +} + +static int bkn_proc_dstats_open(struct inode * inode, struct file * file) +{ + return single_open(file, bkn_proc_dstats_show, NULL); +} + +/* + * Device Debug Statistics Proc Write Entry + * + * Syntax: + * [:]clear[=all|tx|rx[]] + * + * Where corresponds to the debug module parameter. + * + * Examples: + * clear + * 0:clear=rx1 + */ +static ssize_t +bkn_proc_dstats_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + bkn_switch_info_t *sinfo; + char debug_str[40]; + char *ptr; + int unit; + int clear_mask; + int chan; + + if (count > sizeof(debug_str)) { + count = sizeof(debug_str) - 1; + debug_str[count] = '\0'; + } + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + unit = simple_strtol(debug_str, NULL, 10); + sinfo = bkn_sinfo_from_unit(unit); + if (sinfo == NULL) { + gprintk("Warning: unknown unit: %d\n", unit); + return count; + } + + clear_mask = 0; + if ((ptr = strstr(debug_str, "clear=")) != NULL) { + ptr += 6; + if (strncmp(ptr, "all", 3) == 0) { + clear_mask = ~0; + } else if (strncmp(ptr, "dev", 3) == 0) { + clear_mask = 0x20; + } else if (strncmp(ptr, "tx", 2) == 0) { + clear_mask = 0x10; + } else if (strncmp(ptr, "rx0", 3) == 0) { + clear_mask = (1 << 0); + } else if (strncmp(ptr, "rx1", 3) == 0) { + clear_mask = (1 << 1); + } else if (strncmp(ptr, "rx", 2) == 0) { + clear_mask = 0xf; + } + } else if ((ptr = strstr(debug_str, "clear")) != NULL) { + clear_mask = ~0; + } else { + gprintk("Warning: unknown configuration setting\n"); + } + + /* Tx counters */ + if (clear_mask & 0x10) { + sinfo->tx.pkts_d_no_skb = 0; + sinfo->tx.pkts_d_rcpu_encap = 0; + sinfo->tx.pkts_d_rcpu_sig = 0; + sinfo->tx.pkts_d_rcpu_meta = 0; + sinfo->tx.pkts_d_pad_fail = 0; + sinfo->tx.pkts_d_over_limit = 0; + sinfo->tx.pkts_d_dma_resrc = 0; + sinfo->tx.suspends = 0; + } + /* Rx counters */ + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (clear_mask & (1 << chan)) { + sinfo->rx[chan].pkts_f_api = 0; + sinfo->rx[chan].pkts_f_netif = 0; + sinfo->rx[chan].pkts_m_api = 0; + sinfo->rx[chan].pkts_m_netif = 0; + sinfo->rx[chan].pkts_d_no_skb = 0; + sinfo->rx[chan].pkts_d_no_match = 0; + sinfo->rx[chan].pkts_d_unkn_netif = 0; + sinfo->rx[chan].pkts_d_unkn_dest = 0; + sinfo->rx[chan].pkts_d_no_api_buf = 0; + sinfo->rx[chan].sync_err = 0; + sinfo->rx[chan].sync_retry = 0; + sinfo->rx[chan].sync_maxloop = 0; + } + } + + return count; +} + +struct file_operations bkn_proc_dstats_file_ops = { + owner: THIS_MODULE, + open: bkn_proc_dstats_open, + read: seq_read, + llseek: seq_lseek, + write: bkn_proc_dstats_write, + release: single_release, +}; + +static int +bkn_proc_init(void) +{ + struct proc_dir_entry *entry; + + PROC_CREATE(entry, "link", 0666, bkn_proc_root, &bkn_proc_link_file_ops); + if (entry == NULL) { + return -1; + } + PROC_CREATE(entry, "rate", 0666, bkn_proc_root, &bkn_proc_rate_file_ops); + if (entry == NULL) { + return -1; + } + PROC_CREATE(entry, "dma", 0, bkn_proc_root, &bkn_seq_dma_file_ops); + if (entry == NULL) { + return -1; + } + PROC_CREATE(entry, "debug", 0666, bkn_proc_root, &bkn_proc_debug_file_ops); + if (entry == NULL) { + return -1; + } + PROC_CREATE(entry, "stats", 0666, bkn_proc_root, &bkn_proc_stats_file_ops); + if (entry == NULL) { + return -1; + } + PROC_CREATE(entry, "dstats", 0666, bkn_proc_root, &bkn_proc_dstats_file_ops); + if (entry == NULL) { + return -1; + } + + return 0; +} + +static int +bkn_proc_cleanup(void) +{ + remove_proc_entry("link", bkn_proc_root); + remove_proc_entry("rate", bkn_proc_root); + remove_proc_entry("dma", bkn_proc_root); + remove_proc_entry("debug", bkn_proc_root); + remove_proc_entry("stats", bkn_proc_root); + remove_proc_entry("dstats", bkn_proc_root); + return 0; +} + +/* + * Generic module functions + */ + +static int +_pprint(void) +{ + pprintf("Broadcom BCM KNET Linux Network Driver\n"); + + return 0; +} + +static int +bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + bkn_dcb_chain_t *dcb_chain, *dcb_chain_end; + unsigned long flags; + int chan; + uint64_t dcb_dma; + int woffset; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + dcb_chain = kmalloc(sizeof(*dcb_chain), GFP_KERNEL); + if (dcb_chain == NULL) { + gprintk("Fatal error: No memory for dcb_chain\n"); + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } + memset(dcb_chain, 0, sizeof(*dcb_chain)); + dcb_chain->dcb_cnt = kmsg->dma_info.cnt; + dcb_chain->dcb_dma = kmsg->dma_info.data.dcb_start; + dcb_chain->dcb_mem = kernel_bde->p2l(sinfo->dev_no, + (sal_paddr_t)dcb_chain->dcb_dma); + + if (kmsg->dma_info.type == KCOM_DMA_INFO_T_TX_DCB) { + spin_lock_irqsave(&sinfo->lock, flags); + + /* Hold back packets from kernel */ + bkn_suspend_tx(sinfo); + + list_add_tail(&dcb_chain->list, &sinfo->tx.api_dcb_list); + + /* Handle for Continuous DMA mode */ + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize + 1; + if (sinfo->cmic_type == 'x') { + woffset += 1; + } + if ((dcb_chain->dcb_mem[woffset] & ((1 << 18) | (1 << 16))) != 0x50000) { + gprintk("Not suitable API DCB chain for Continuous DMA mode\n"); + list_del(&dcb_chain->list); + kfree(dcb_chain); + kmsg->hdr.status = KCOM_E_PARAM; + spin_unlock_irqrestore(&sinfo->lock, flags); + return sizeof(kcom_msg_hdr_t); + } + dcb_chain_end = sinfo->tx.api_dcb_chain_end; + if (dcb_chain_end != NULL) { + /* Stitch this chain */ + woffset = (dcb_chain_end->dcb_cnt - 1) * sinfo->dcb_wsize; + dcb_chain_end->dcb_mem[woffset] = dcb_chain->dcb_dma; + if (sinfo->cmic_type == 'x') { + dcb_chain_end->dcb_mem[woffset + 1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); + } + MEMORY_BARRIER; + } + sinfo->tx.api_dcb_chain_end = dcb_chain; + if (sinfo->tx.api_active) { + /* Set new halt location */ + woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize; + dcb_dma = dcb_chain->dcb_dma + woffset * sizeof(uint32_t); + /* DMA run to the new halt location */ + bkn_cdma_goto(sinfo, XGS_DMA_TX_CHAN, dcb_dma); + } + } + + if (sinfo->tx.free == MAX_TX_DCBS && + !sinfo->tx.api_active && + !sinfo->basedev_suspended) { + bkn_api_tx(sinfo); + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + } else if (kmsg->dma_info.type == KCOM_DMA_INFO_T_RX_DCB) { + spin_lock_irqsave(&sinfo->lock, flags); + + chan = kmsg->dma_info.chan - 1; + if ((chan < 0) || (chan > sinfo->rx_chans)) { + gprintk("Invalid RX DMA channel specified: %d\n", + kmsg->dma_info.chan); + kmsg->hdr.status = KCOM_E_PARAM; + spin_unlock_irqrestore(&sinfo->lock, flags); + return sizeof(kcom_msg_hdr_t); + } + + list_add_tail(&dcb_chain->list, &sinfo->rx[chan].api_dcb_list); + + /* Handle for Continuous DMA mode */ + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize + 1; + if (sinfo->cmic_type == 'x') { + woffset += 1; + } + if ((dcb_chain->dcb_mem[woffset] & ((1 << 18) | (1 << 16))) != 0x50000) { + gprintk("Not suitable API DCB chain for Continuous DMA mode\n"); + list_del(&dcb_chain->list); + kfree(dcb_chain); + kmsg->hdr.status = KCOM_E_PARAM; + spin_unlock_irqrestore(&sinfo->lock, flags); + return sizeof(kcom_msg_hdr_t); + } + dcb_chain_end = sinfo->rx[chan].api_dcb_chain_end; + if (dcb_chain_end != NULL) { + /* Stitch this chain */ + woffset = (dcb_chain_end->dcb_cnt - 1) * sinfo->dcb_wsize; + dcb_chain_end->dcb_mem[woffset] = dcb_chain->dcb_dma; + if (sinfo->cmic_type == 'x') { + dcb_chain_end->dcb_mem[woffset + 1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); + } + MEMORY_BARRIER; + } + sinfo->rx[chan].api_dcb_chain_end = dcb_chain; + if (!sinfo->rx[chan].use_rx_skb) { + /* Set new halt location */ + woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize; + dcb_dma = dcb_chain->dcb_dma + woffset * sizeof(uint32_t); + /* DMA run to the new halt location */ + bkn_cdma_goto(sinfo, XGS_DMA_RX_CHAN + chan, dcb_dma); + } + } + + if (sinfo->rx[chan].api_active == 0) { + bkn_api_rx_restart(sinfo, chan); + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + } else { + DBG_DCB(("Unknown DCB_INFO type (%d).\n", kmsg->dma_info.type)); + kfree(dcb_chain); + kmsg->hdr.status = KCOM_E_PARAM; + } + + return sizeof(kcom_msg_hdr_t); +} + +static int +bkn_create_inst(uint32 inst_id) +{ + bkn_switch_info_t *sinfo; + bkn_evt_resource_t *evt; + unsigned long flags; + int i, evt_idx = -1; + + /* multiple instance mode */ + for (i = 0; i < kernel_bde->num_devices(BDE_ALL_DEVICES); i++) { + evt = &_bkn_evt[i]; + if (evt->inst_id == inst_id) { + evt_idx = i; + DBG_INST(("%s evt_idx %d inst_id 0x%x\n",__FUNCTION__, i, inst_id)); + break; + } + if ((_bkn_multi_inst == 0) || (evt->inst_id == 0)) { + _bkn_multi_inst ++; + evt_idx = i; + init_waitqueue_head(&evt->evt_wq); + evt->inst_id = inst_id; + DBG_INST(("%s evt_idx %d inst_id 0x%x\n",__FUNCTION__, i, inst_id)); + break; + } + } + + if (evt_idx == -1) { + DBG_WARN(("Run out the event queue resource !\n")); + return -1; + } + for (i = 0; i < kernel_bde->num_devices(BDE_ALL_DEVICES); i++) { + if (inst_id & (1 << i)) { + sinfo = bkn_sinfo_from_unit(i); + spin_lock_irqsave(&sinfo->lock, flags); + sinfo->evt_idx = evt_idx; + spin_unlock_irqrestore(&sinfo->lock, flags); + DBG_INST(("%s d(%d) evt_idx %d \n",__FUNCTION__, i, evt_idx)); + } + } + return 0; +} + +/* + * Device reprobe driven by application to check if new device is probed or + * existed device is changed after inserting KNET module. + */ +static int +bkn_knet_dev_reprobe(void) +{ + bkn_switch_info_t *sinfo; + int i; + + for (i = 0; i < kernel_bde->num_devices(BDE_ALL_DEVICES); i++) { + sinfo = bkn_sinfo_from_unit(i); + if (sinfo == NULL) { + /* New device found after re-probe. */ + if (bkn_knet_dev_init(i) < 0) { + return -1; + } + } else { + /* Existed device reinit after re-probe. */ + if (bkn_knet_dev_reinit(i) < 0) { + return -1; + } + } + } + return 0; +} + +/* Assign the inst_id and evt_idx */ +static int +bkn_knet_dev_inst_set(kcom_msg_reprobe_t *kmsg) +{ + bkn_switch_info_t *sinfo; + int d = kmsg->hdr.unit; + uint32 inst = 0; + unsigned long flags; + struct list_head *list; + + sinfo = bkn_sinfo_from_unit(d); + lkbde_dev_instid_get(d, &inst); + + spin_lock_irqsave(&sinfo->lock, flags); + if (sinfo->inst_id != inst) { + /* Instance database changed, reinit the inst_id */ + sinfo->inst_id = 0; + sinfo->evt_idx = -1; + } + spin_unlock_irqrestore(&sinfo->lock, flags); + + if (inst) { + if (sinfo->inst_id == 0) { + if (bkn_create_inst(inst) != 0) { + return -1; + } + } + spin_lock_irqsave(&sinfo->lock, flags); + sinfo->inst_id = inst; + spin_unlock_irqrestore(&sinfo->lock, flags); + } else { + /* legacy mode */ + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + spin_lock_irqsave(&sinfo->lock, flags); + sinfo->evt_idx = 0; + sinfo->inst_id = 0; + spin_unlock_irqrestore(&sinfo->lock, flags); + } + } + return 0; +} + +static int +bkn_knet_version(kcom_msg_version_t *kmsg, int len) +{ + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + kmsg->version = KCOM_VERSION; + kmsg->netif_max = KCOM_NETIF_MAX; + kmsg->filter_max = KCOM_FILTER_MAX; + + return sizeof(kcom_msg_version_t); +} + +static int +bkn_knet_hw_reset(kcom_msg_hw_reset_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + unsigned long flags; + int chan; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + if (kmsg->channels == 0) { + /* Clean all if no channels specified */ + bkn_dma_abort(sinfo); + bkn_clean_dcbs(sinfo); + } else { + if (kmsg->channels & (1 << XGS_DMA_TX_CHAN)) { + bkn_dma_abort_tx(sinfo); + bkn_clean_tx_dcbs(sinfo); + } + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (kmsg->channels & (1 << (XGS_DMA_RX_CHAN + chan))) { + bkn_dma_abort_rx(sinfo, chan); + bkn_clean_rx_dcbs(sinfo, chan); + } + } + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return sizeof(kcom_msg_hdr_t); +} + +static int +bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + uint32_t dev_type; + unsigned long flags; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + DBG_DCB(("DCB size %d, type %d\n", kmsg->dcb_size, kmsg->dcb_type)); + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + sinfo->cmic_type = kmsg->cmic_type; + sinfo->dcb_type = kmsg->dcb_type; + sinfo->dcb_wsize = BYTES2WORDS(kmsg->dcb_size); + sinfo->pkt_hdr_size = kmsg->pkt_hdr_size; + sinfo->dma_hi = kmsg->dma_hi; + sinfo->rx_chans = sinfo->cmic_type == 'x' ? NUM_CMICX_RX_CHAN : NUM_CMICM_RX_CHAN; + if (sinfo->rx_chans > NUM_RX_CHAN) { + sinfo->rx_chans = NUM_RX_CHAN; + } + + /* Config Continuous DMA mode */ + sinfo->cdma_channels = kmsg->cdma_channels & ~(~0 << (sinfo->rx_chans + 1)); + + /* Ensure 32-bit PCI DMA is mapped properly on 64-bit platforms */ + dev_type = kernel_bde->get_dev_type(sinfo->dev_no); + if (dev_type & BDE_PCI_DEV_TYPE && sinfo->cmic_type != 'x') { + if (pci_set_dma_mask(sinfo->pdev, 0xffffffff)) { + spin_unlock_irqrestore(&sinfo->lock, flags); + gprintk("No suitable DMA available for SKBs\n"); + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } + } + + /* First time called we need to allocate DCBs */ + if (sinfo->dcb_mem == NULL) { + if (bkn_alloc_dcbs(sinfo) < 0) { + spin_unlock_irqrestore(&sinfo->lock, flags); + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } + } + + /* Ensure that we restart properly */ + bkn_dma_abort(sinfo); + bkn_clean_dcbs(sinfo); + + if (basedev_suspend) { + if (!netif_running(sinfo->dev)) { + sinfo->basedev_suspended = 1; + } + } + + /* Ensure all interrupts are disabled, e.g. if warmbooting */ + dev_irq_mask_set(sinfo, 0); + + /* Register interrupt handler */ + kernel_bde->interrupt_connect(sinfo->dev_no | LKBDE_ISR2_DEV, + bkn_isr, sinfo); + + /* Init DCBs */ + bkn_init_dcbs(sinfo); + + bkn_dma_init(sinfo); + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return sizeof(kcom_msg_hdr_t); +} + +static int +bkn_knet_detach(kcom_msg_detach_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + unsigned long flags; + bkn_evt_resource_t *evt; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + /* Create dummy event to unblock pending IOCTL */ + sinfo->dma_events |= KCOM_DMA_INFO_F_TX_DONE; + evt = &_bkn_evt[sinfo->evt_idx]; + evt->evt_wq_put++; + wake_up_interruptible(&evt->evt_wq); + + spin_unlock_irqrestore(&sinfo->lock, flags); + + /* Ensure that we return a valid unit number */ + kmsg->hdr.unit = sinfo->dev_no; + + return sizeof(kcom_msg_detach_t); +} + +static int +bkn_knet_reprobe(kcom_msg_reprobe_t *kmsg, int len) +{ + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + /* Support pci hot plug and multiple instance */ + if ((bkn_knet_dev_reprobe() < 0) || + (bkn_knet_dev_inst_set(kmsg) < 0)) { + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_reprobe_t); + } + + return sizeof(kcom_msg_reprobe_t); +} + +static int +bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + struct net_device *dev; + struct list_head *list; + bkn_priv_t *priv, *lpriv; + unsigned long flags; + int found, id; + uint8 *ma; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + switch (kmsg->netif.type) { + case KCOM_NETIF_T_VLAN: + case KCOM_NETIF_T_PORT: + case KCOM_NETIF_T_META: + break; + default: + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + ma = kmsg->netif.macaddr; + if ((ma[0] | ma[1] | ma[2] | ma[3] | ma[4] | ma[5]) == 0) { + bkn_dev_mac[5]++; + ma = bkn_dev_mac; + } + if ((dev = bkn_init_ndev(ma, kmsg->netif.name)) == NULL) { + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } + priv = netdev_priv(dev); + priv->dev = dev; + priv->sinfo = sinfo; + priv->type = kmsg->netif.type; + priv->vlan = kmsg->netif.vlan; + if (priv->type == KCOM_NETIF_T_PORT) { + priv->port = kmsg->netif.port; + memcpy(priv->itmh, kmsg->netif.itmh, 4); + priv->qnum = kmsg->netif.qnum; + } else { + if ((device_is_dune(sinfo)) && (priv->type == KCOM_NETIF_T_VLAN)) { + /* set port as SSP to PTCH */ + priv->port = kmsg->netif.port; + priv->qnum = kmsg->netif.qnum; + } + else { + priv->port = -1; + } + } + priv->flags = kmsg->netif.flags; + priv->cb_user_data = kmsg->netif.cb_user_data; + + /* Force RCPU encapsulation if rcpu_mode */ + if (rcpu_mode) { + priv->flags |= KCOM_NETIF_F_RCPU_ENCAP; + DBG_RCPU(("RCPU auto-enabled\n")); + } + + /* Prevent (incorrect) compiler warning */ + lpriv = NULL; + + spin_lock_irqsave(&sinfo->lock, flags); + + /* + * We insert network interfaces sorted by ID. + * In case an interface is destroyed, we reuse the ID + * the next time an interface is created. + */ + found = 0; + id = 1; + list_for_each(list, &sinfo->ndev_list) { + lpriv = (bkn_priv_t *)list; + if (id < lpriv->id) { + found = 1; + break; + } + id = lpriv->id + 1; + } + priv->id = id; + if (found) { + /* Replace previously removed interface */ + list_add_tail(&priv->list, &lpriv->list); + } else { + /* No holes - add to end of list */ + list_add_tail(&priv->list, &sinfo->ndev_list); + } + + if (id < sinfo->ndev_max) { + DBG_NDEV(("Add netif ID %d to table\n", id)); + sinfo->ndevs[id] = dev; + } else { + int ndev_max = sinfo->ndev_max + NDEVS_CHUNK; + int size = ndev_max * sizeof(struct net_device *); + void *ndevs = kmalloc(size, GFP_ATOMIC); + if (ndevs != NULL) { + DBG_NDEV(("Reallocate netif table for ID %d\n", id)); + memset(ndevs, 0, size); + if (sinfo->ndevs != NULL) { + size = sinfo->ndev_max * sizeof(struct net_device *); + memcpy(ndevs, sinfo->ndevs, size); + kfree(sinfo->ndevs); + } + sinfo->ndevs = ndevs; + sinfo->ndev_max = ndev_max; + sinfo->ndevs[id] = dev; + } + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + + DBG_VERB(("Assigned ID %d to Ethernet device %s\n", + priv->id, dev->name)); + + kmsg->netif.id = priv->id; + memcpy(kmsg->netif.macaddr, dev->dev_addr, 6); + memcpy(kmsg->netif.name, dev->name, KCOM_NETIF_NAME_MAX - 1); + + return sizeof(*kmsg); +} + +static int +bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + struct net_device *dev; + bkn_priv_t *priv; + struct list_head *list; + unsigned long flags; + int found; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + found = 0; + list_for_each(list, &sinfo->ndev_list) { + priv = (bkn_priv_t *)list; + if (kmsg->hdr.id == priv->id) { + found = 1; + break; + } + } + + if (!found) { + spin_unlock_irqrestore(&sinfo->lock, flags); + kmsg->hdr.status = KCOM_E_NOT_FOUND; + return sizeof(kcom_msg_hdr_t); + } + + list_del(&priv->list); + + if (priv->id < sinfo->ndev_max) { + sinfo->ndevs[priv->id] = NULL; + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + + dev = priv->dev; + DBG_VERB(("Removing virtual Ethernet device %s (%d).\n", + dev->name, priv->id)); + unregister_netdev(dev); + free_netdev(dev); + + return sizeof(kcom_msg_hdr_t); +} + +static int +bkn_knet_netif_list(kcom_msg_netif_list_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + bkn_priv_t *priv; + struct list_head *list; + unsigned long flags; + int idx; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + idx = 0; + list_for_each(list, &sinfo->ndev_list) { + if (idx >= KCOM_NETIF_MAX) { + DBG_WARN(("Too many network interfaces to list (max %d).\n", + KCOM_NETIF_MAX)); + break; + } + priv = (bkn_priv_t *)list; + kmsg->id[idx] = priv->id; + idx++; + } + kmsg->ifcnt = idx; + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return sizeof(*kmsg) - sizeof(kmsg->id) + (idx * sizeof(kmsg->id[0])); +} + +static int +bkn_knet_netif_get(kcom_msg_netif_get_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + bkn_priv_t *priv; + unsigned long flags; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + priv = bkn_netif_lookup(sinfo, kmsg->hdr.id); + + if (priv == NULL) { + spin_unlock_irqrestore(&sinfo->lock, flags); + kmsg->hdr.status = KCOM_E_NOT_FOUND; + return sizeof(kcom_msg_hdr_t); + } + + memcpy(kmsg->netif.macaddr, priv->dev->dev_addr, 6); + memcpy(kmsg->netif.name, priv->dev->name, KCOM_NETIF_NAME_MAX - 1); + kmsg->netif.vlan = priv->vlan; + kmsg->netif.type = priv->type; + kmsg->netif.id = priv->id; + kmsg->netif.flags = priv->flags; + + if (priv->port < 0) { + kmsg->netif.port = 0; + } else { + kmsg->netif.port = priv->port; + } + kmsg->netif.qnum = priv->qnum; + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return sizeof(*kmsg); +} + +static int +bkn_knet_filter_create(kcom_msg_filter_create_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + struct list_head *list; + bkn_filter_t *filter, *lfilter; + unsigned long flags; + int found, id; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + switch (kmsg->filter.type) { + case KCOM_FILTER_T_RX_PKT: + break; + default: + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + /* + * Find available ID + */ + found = 1; + id = 0; + while (found && ++id < KCOM_FILTER_MAX) { + found = 0; + list_for_each(list, &sinfo->rxpf_list) { + lfilter = (bkn_filter_t *)list; + if (id == lfilter->kf.id) { + found = 1; + break; + } + } + } + if (found) { + /* Too many filters */ + spin_unlock_irqrestore(&sinfo->lock, flags); + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } + + filter = kmalloc(sizeof(*filter), GFP_ATOMIC); + if (filter == NULL) { + spin_unlock_irqrestore(&sinfo->lock, flags); + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + memset(filter, 0, sizeof(*filter)); + memcpy(&filter->kf, &kmsg->filter, sizeof(filter->kf)); + filter->kf.id = id; + + /* Add according to priority */ + found = 0; + list_for_each(list, &sinfo->rxpf_list) { + lfilter = (bkn_filter_t *)list; + if (filter->kf.priority < lfilter->kf.priority) { + list_add_tail(&filter->list, &lfilter->list); + found = 1; + break; + } + } + if (!found) { + list_add_tail(&filter->list, &sinfo->rxpf_list); + } + + kmsg->filter.id = filter->kf.id; + + spin_unlock_irqrestore(&sinfo->lock, flags); + + DBG_VERB(("Created filter ID %d (%s).\n", + filter->kf.id, filter->kf.desc)); + + return len; +} + +static int +bkn_knet_filter_destroy(kcom_msg_filter_destroy_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + bkn_filter_t *filter; + struct list_head *list; + unsigned long flags; + int found; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + found = 0; + list_for_each(list, &sinfo->rxpf_list) { + filter = (bkn_filter_t *)list; + if (kmsg->hdr.id == filter->kf.id) { + found = 1; + break; + } + } + + if (!found) { + spin_unlock_irqrestore(&sinfo->lock, flags); + kmsg->hdr.status = KCOM_E_NOT_FOUND; + return sizeof(kcom_msg_hdr_t); + } + + list_del(&filter->list); + + spin_unlock_irqrestore(&sinfo->lock, flags); + + DBG_VERB(("Removing filter ID %d.\n", filter->kf.id)); + kfree(filter); + + return sizeof(kcom_msg_hdr_t); +} + +static int +bkn_knet_filter_list(kcom_msg_filter_list_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + bkn_filter_t *filter; + struct list_head *list; + unsigned long flags; + int idx; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + idx = 0; + list_for_each(list, &sinfo->rxpf_list) { + if (idx >= KCOM_FILTER_MAX) { + DBG_WARN(("Too many filters to list (max %d).\n", + KCOM_FILTER_MAX)); + break; + } + filter = (bkn_filter_t *)list; + kmsg->id[idx] = filter->kf.id; + idx++; + } + kmsg->fcnt = idx; + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return sizeof(*kmsg) - sizeof(kmsg->id) + (idx * sizeof(kmsg->id[0])); +} + +static int +bkn_knet_filter_get(kcom_msg_filter_get_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + bkn_filter_t *filter; + struct list_head *list; + unsigned long flags; + int found; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + found = 0; + list_for_each(list, &sinfo->rxpf_list) { + filter = (bkn_filter_t *)list; + if (kmsg->hdr.id == filter->kf.id) { + found = 1; + break; + } + } + + if (!found) { + spin_unlock_irqrestore(&sinfo->lock, flags); + kmsg->hdr.status = KCOM_E_NOT_FOUND; + return sizeof(kcom_msg_hdr_t); + } + + memcpy(&kmsg->filter, &filter->kf, sizeof(kmsg->filter)); + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return sizeof(*kmsg); +} + +static int +bkn_knet_dbg_pkt_set(kcom_msg_dbg_pkt_set_t *kmsg, int len) +{ + dbg_pkt_enable = kmsg->enable; + return sizeof(kcom_msg_dbg_pkt_set_t); +} + +static int +bkn_knet_dbg_pkt_get(kcom_msg_dbg_pkt_get_t *kmsg, int len) +{ + kmsg->value = dbg_pkt_enable; + return sizeof(kcom_msg_dbg_pkt_get_t); +} + +static int +bkn_knet_wb_cleanup(kcom_msg_wb_cleanup_t *kmsg, int len) +{ + bkn_switch_info_t *sinfo; + bkn_dcb_chain_t *dcb_chain; + unsigned long flags; + int chan; + + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); + if (sinfo == NULL) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); + } + + spin_lock_irqsave(&sinfo->lock, flags); + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (sinfo->rx[chan].api_dcb_chain) { + DBG_DCB_RX(("Freeing active Rx%d DCB chain.\n", chan)); + kfree(sinfo->rx[chan].api_dcb_chain); + sinfo->rx[chan].api_dcb_chain = NULL; + } + while (!list_empty(&sinfo->rx[chan].api_dcb_list)) { + dcb_chain = list_entry(sinfo->rx[chan].api_dcb_list.next, + bkn_dcb_chain_t, list); + list_del(&dcb_chain->list); + DBG_DCB_RX(("Freeing Rx%d DCB chain.\n", chan)); + kfree(dcb_chain); + } + sinfo->rx[chan].api_dcb_chain_end = NULL; + sinfo->rx[chan].api_active = 0; + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + + return sizeof(kcom_msg_hdr_t); +} + +static int +bkn_handle_cmd_req(kcom_msg_t *kmsg, int len) +{ + /* Silently drop events and unrecognized message types */ + if (kmsg->hdr.type != KCOM_MSG_TYPE_CMD) { + if (kmsg->hdr.opcode == KCOM_M_STRING) { + DBG_VERB(("Debug string: '%s'\n", kmsg->string.val)); + return 0; + } + DBG_WARN(("Unsupported message (type=%d, opcode=%d)\n", + kmsg->hdr.type, kmsg->hdr.opcode)); + return 0; + } + + switch (kmsg->hdr.opcode) { + case KCOM_M_DMA_INFO: + DBG_CMD(("KCOM_M_DMA_INFO\n")); + /* Packet buffer */ + len = bkn_knet_dma_info(&kmsg->dma_info, len); + break; + case KCOM_M_VERSION: + DBG_CMD(("KCOM_M_VERSION\n")); + /* Return procotol version */ + len = bkn_knet_version(&kmsg->version, len); + break; + case KCOM_M_HW_RESET: + DBG_CMD(("KCOM_M_HW_RESET\n")); + /* Shut down DMA and release buffers */ + len = bkn_knet_hw_reset(&kmsg->hw_reset, len); + break; + case KCOM_M_HW_INIT: + DBG_CMD(("KCOM_M_HW_INIT\n")); + /* Initialize DMA */ + len = bkn_knet_hw_init(&kmsg->hw_init, len); + break; + case KCOM_M_DETACH: + DBG_CMD(("KCOM_M_DETACH\n")); + /* Detach kernel module */ + len = bkn_knet_detach(&kmsg->detach, len); + break; + case KCOM_M_REPROBE: + DBG_CMD(("KCOM_M_REPROBE\n")); + /* Reprobe device */ + len = bkn_knet_reprobe(&kmsg->reprobe, len); + break; + case KCOM_M_NETIF_CREATE: + DBG_CMD(("KCOM_M_NETIF_CREATE\n")); + /* Create network interface */ + len = bkn_knet_netif_create(&kmsg->netif_create, len); + break; + case KCOM_M_NETIF_DESTROY: + DBG_CMD(("KCOM_M_NETIF_DESTROY\n")); + /* Destroy network interface */ + len = bkn_knet_netif_destroy(&kmsg->netif_destroy, len); + break; + case KCOM_M_NETIF_LIST: + DBG_CMD(("KCOM_M_NETIF_LIST\n")); + /* Return list of IDs of installed network interfaces */ + len = bkn_knet_netif_list(&kmsg->netif_list, len); + break; + case KCOM_M_NETIF_GET: + DBG_CMD(("KCOM_M_NETIF_GET\n")); + /* Return network interface info */ + len = bkn_knet_netif_get(&kmsg->netif_get, len); + break; + case KCOM_M_FILTER_CREATE: + DBG_CMD(("KCOM_M_FILTER_CREATE\n")); + /* Create packet filter */ + len = bkn_knet_filter_create(&kmsg->filter_create, len); + break; + case KCOM_M_FILTER_DESTROY: + DBG_CMD(("KCOM_M_FILTER_DESTROY\n")); + /* Destroy packet filter */ + len = bkn_knet_filter_destroy(&kmsg->filter_destroy, len); + break; + case KCOM_M_FILTER_LIST: + DBG_CMD(("KCOM_M_FILTER_LIST\n")); + /* Return list of IDs of installed packet filters */ + len = bkn_knet_filter_list(&kmsg->filter_list, len); + break; + case KCOM_M_FILTER_GET: + DBG_CMD(("KCOM_M_FILTER_GET\n")); + /* Return packet filter info */ + len = bkn_knet_filter_get(&kmsg->filter_get, len); + break; + case KCOM_M_DBGPKT_SET: + DBG_CMD(("KCOM_M_DBGPKT_SET\n")); + /* Set debugging packet function */ + len = bkn_knet_dbg_pkt_set(&kmsg->dbg_pkt_set, len); + break; + case KCOM_M_DBGPKT_GET: + DBG_CMD(("KCOM_M_DBGPKT_GET\n")); + /* Get debugging packet function info */ + len = bkn_knet_dbg_pkt_get(&kmsg->dbg_pkt_get, len); + break; + case KCOM_M_WB_CLEANUP: + DBG_CMD(("KCOM_M_WB_CLEANUP\n")); + /* Clean up for warmbooting */ + len = bkn_knet_wb_cleanup(&kmsg->wb_cleanup, len); + break; + default: + DBG_WARN(("Unsupported command (type=%d, opcode=%d)\n", + kmsg->hdr.type, kmsg->hdr.opcode)); + kmsg->hdr.opcode = 0; + len = sizeof(kcom_msg_hdr_t); + break; + } + return len; +} + +static int +bkn_cmd_thread(void *context) +{ + bkn_thread_ctrl_t *tc = (bkn_thread_ctrl_t *)context; + kcom_msg_t kmsg; + unsigned int len, rlen; + + bkn_thread_boot(tc); + + DBG_VERB(("Command thread starting\n")); + tc->state = 1; + while (!bkn_thread_should_stop(tc)) { + len = sizeof(kmsg); + tc->state = 2; + if (PROXY_RECV(KCOM_CHAN_KNET, &kmsg, &len) >= 0) { + DBG_VERB(("Received %d bytes from KCOM_CHAN_CMD\n", len)); + tc->state = 3; + rlen = bkn_handle_cmd_req(&kmsg, len); + tc->state = 4; + if (rlen > 0) { + PROXY_SEND(KCOM_CHAN_KNET, &kmsg, rlen); + } + } else { + /* Thread interrupted */ + bkn_sleep(1); + } + } + DBG_VERB(("Command thread done\n")); + + bkn_thread_exit(tc); + return 0; +} + +static int +bkn_get_next_dma_event(kcom_msg_dma_info_t *kmsg) +{ + static int last_dev_no = 0; + bkn_switch_info_t *sinfo; + unsigned long flags; + int dev_no, dev_evt; + bkn_evt_resource_t *evt; + + dev_evt = kmsg->hdr.unit; + sinfo = bkn_sinfo_from_unit(dev_evt); + if (sinfo == NULL) { + /* The device is not probed or initialized yet.*/ + return 0; + } + if (sinfo->evt_idx == -1) { + /* Event queue is not ready yet */ + return 0; + } + + DBG_INST(("%s dev %d evt_idx %d\n",__FUNCTION__, dev_evt, sinfo->evt_idx)); + dev_no = last_dev_no; + while (1) { + dev_no++; + sinfo = bkn_sinfo_from_unit(dev_no); + if (sinfo == NULL) { + dev_no = 0; + sinfo = bkn_sinfo_from_unit(dev_no); + } + + if (sinfo && (sinfo->inst_id != 0) && + ((sinfo->inst_id & (1 << dev_evt)) == 0)) { + DBG_INST((" %s skip dev(%d)\n",__FUNCTION__,dev_evt)); + continue; + } + + if (sinfo && sinfo->dma_events) { + DBG_EVT(("Next DMA events (0x%08x)\n", sinfo->dma_events)); + kmsg->hdr.unit = sinfo->dev_no; + + spin_lock_irqsave(&sinfo->lock, flags); + kmsg->dma_info.flags = sinfo->dma_events; + sinfo->dma_events = 0; + spin_unlock_irqrestore(&sinfo->lock, flags); + + last_dev_no = dev_no; + break; + } + + if (dev_no == last_dev_no) { + evt = &_bkn_evt[sinfo->evt_idx]; + DBG_INST(("wait queue index %d\n",sinfo->evt_idx)); + wait_event_interruptible(evt->evt_wq, + evt->evt_wq_get != evt->evt_wq_put); + DBG_VERB(("Event thread wakeup\n")); + + /* Thread interrupted */ + if (signal_pending(current)) { + return 0; + } + + evt->evt_wq_get = evt->evt_wq_put; + } + } + return sizeof(*kmsg); +} + +static int +bkn_evt_thread(void *context) +{ + bkn_thread_ctrl_t *tc = (bkn_thread_ctrl_t *)context; + kcom_msg_dma_info_t kmsg; + int len; + + bkn_thread_boot(tc); + + memset(&kmsg, 0, sizeof(kmsg)); + kmsg.hdr.type = KCOM_MSG_TYPE_EVT; + kmsg.hdr.opcode = KCOM_M_DMA_INFO; + + DBG_VERB(("Event thread starting\n")); + tc->state = 1; + while (!bkn_thread_should_stop(tc)) { + tc->state = 2; + len = bkn_get_next_dma_event(&kmsg); + tc->state = 3; + if (len) { + PROXY_SEND(KCOM_CHAN_KNET, &kmsg, len); + } else { + /* Thread interrupted */ + bkn_sleep(1); + } + } + DBG_VERB(("Event thread done\n")); + + bkn_thread_exit(tc); + return 0; +} + +static int +_cleanup(void) +{ + struct list_head *list; + struct net_device *dev; + bkn_filter_t *filter; + bkn_priv_t *priv; + bkn_switch_info_t *sinfo; + unsigned long flags; + + /* Inidicate that we are shutting down */ + module_initialized = 0; + + /* Shut down event thread */ + bkn_thread_stop(&bkn_evt_ctrl); + + /* Shut down command thread */ + bkn_thread_stop(&bkn_cmd_ctrl); + + /* Remove KCOM channel */ + PROXY_SERVICE_DESTROY(KCOM_CHAN_KNET); + + bkn_proc_cleanup(); + remove_proc_entry("bcm/knet", NULL); + remove_proc_entry("bcm", NULL); + + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + + del_timer_sync(&sinfo->timer); + del_timer_sync(&sinfo->rxtick); + + spin_lock_irqsave(&sinfo->lock, flags); + bkn_dma_abort(sinfo); + dev_irq_mask_set(sinfo, 0); + spin_unlock_irqrestore(&sinfo->lock, flags); + + DBG_IRQ(("Unregister ISR.\n")); + kernel_bde->interrupt_disconnect(sinfo->dev_no | LKBDE_ISR2_DEV); + + if (use_napi) { + while (sinfo->napi_poll_mode) { + bkn_sleep(1); + } + } + + spin_lock_irqsave(&sinfo->lock, flags); + bkn_clean_dcbs(sinfo); + spin_unlock_irqrestore(&sinfo->lock, flags); + } + + /* Destroy all switch devices */ + while (!list_empty(&_sinfo_list)) { + sinfo = list_entry(_sinfo_list.next, bkn_switch_info_t, list); + + /* Destroy all associated Rx packet filters */ + while (!list_empty(&sinfo->rxpf_list)) { + filter = list_entry(sinfo->rxpf_list.next, bkn_filter_t, list); + list_del(&filter->list); + DBG_VERB(("Removing filter ID %d.\n", filter->kf.id)); + kfree(filter); + } + + /* Destroy all associated virtual net devices */ + while (!list_empty(&sinfo->ndev_list)) { + priv = list_entry(sinfo->ndev_list.next, bkn_priv_t, list); + list_del(&priv->list); + dev = priv->dev; + DBG_VERB(("Removing virtual Ethernet device %s.\n", dev->name)); + unregister_netdev(dev); + free_netdev(dev); + } + if (sinfo->ndevs != NULL) { + kfree(sinfo->ndevs); + } + + /* Destroy base net device */ + if (sinfo->dev) { + DBG_VERB(("Removing Ethernet device %s.\n", sinfo->dev->name)); + unregister_netdev(sinfo->dev); + free_netdev(sinfo->dev); + } + + DBG_VERB(("Removing switch device.\n")); + bkn_destroy_sinfo(sinfo); + } + + return 0; +} + +static int +bkn_knet_dev_reinit(int d) +{ + bkn_switch_info_t *sinfo; + uint32 dev_state; + unsigned long flags; + + if (lkbde_dev_state_get(d, &dev_state) < 0) { + return -1; + } + DBG_VERB(("%s dev %d dev_state %d\n",__FUNCTION__, d, dev_state)); + if (dev_state == BDE_DEV_STATE_CHANGED) { + sinfo = bkn_sinfo_from_unit(d); + spin_lock_irqsave(&sinfo->lock, flags); + sinfo->base_addr = lkbde_get_dev_virt(d); + sinfo->dma_dev = lkbde_get_dma_dev(d); + sinfo->pdev = lkbde_get_hw_dev(d); + spin_unlock_irqrestore(&sinfo->lock, flags); + + dev_state = 0; + lkbde_dev_state_set(d, dev_state); + } + return 0; +} + +static int +bkn_knet_dev_init(int d) +{ + uint32_t dev_type; + struct net_device *dev; + bkn_switch_info_t *sinfo; + bkn_priv_t *priv; + char *bdev_name; + const ibde_dev_t *bde_dev; + + DBG_VERB(("%s dev %d\n",__FUNCTION__, d)); + /* Base network device name */ + bdev_name = "bcm%d"; + if (base_dev_name) { + if (strlen(base_dev_name) < IFNAMSIZ) { + bdev_name = base_dev_name; + } else { + DBG_WARN(("Base device name too long\n")); + } + } + + dev_type = kernel_bde->get_dev_type(d); + DBG_VERB(("Found device type 0x%x\n", dev_type)); + if ((dev_type & BDE_SWITCH_DEV_TYPE) == 0) { + DBG_WARN(("Not switch device - skipping\n")); + return 0; + } + switch (dev_type & BDE_DEV_BUS_TYPE_MASK) { + case BDE_PCI_DEV_TYPE: + case BDE_ICS_DEV_TYPE: + case BDE_AXI_DEV_TYPE: + break; + default: + DBG_WARN(("Not PCI/ICS/AXI device - skipping\n")); + return 0; + } + + if ((sinfo = bkn_create_sinfo(d)) == NULL) { + _cleanup(); + return -ENOMEM; + } + + /* Initialize the cpu_no.*/ + if (dev_type & BDE_AXI_DEV_TYPE) { + /* AXI device type implies the activated iProc iHost */ + sinfo->cpu_no = 1; + } + /* Initialize default RCPU signature */ + if ((bde_dev = kernel_bde->get_dev(d)) != NULL) { + sinfo->rcpu_sig = bde_dev->device & ~0xf; + } + /* Check for override */ + if (rcpu_signature) { + sinfo->rcpu_sig = rcpu_signature; + } + + /* Create base virtual net device */ + bkn_dev_mac[5]++; + if ((dev = bkn_init_ndev(bkn_dev_mac, bdev_name)) == NULL) { + _cleanup(); + return -ENOMEM; + } else { + sinfo->dev = dev; + priv = netdev_priv(dev); + priv->dev = dev; + priv->sinfo = sinfo; + priv->vlan = 1; + priv->port = -1; + memset(priv->itmh, 0, sizeof(priv->itmh)); + priv->id = -1; + } + + if (use_napi) { + netif_napi_add(dev, &sinfo->napi, bkn_poll, napi_weight); + } + return 0; +} + +static int +_init(void) +{ + int idx; + int num_dev; + int rv; + bkn_evt_resource_t *evt; + + /* Connect to the kernel bde */ + if ((linux_bde_create(NULL, &kernel_bde) < 0) || kernel_bde == NULL) { + return -ENODEV; + } + + /* Randomize Lower 3 bytes of the MAC address (TESTING ONLY) */ + get_random_bytes(&bkn_dev_mac[3], 3); + + /* Check for user-supplied MAC address (recommended) */ + if (mac_addr != NULL && strlen(mac_addr) == 17) { + for (idx = 0; idx < 6; idx++) { + bkn_dev_mac[idx] = simple_strtoul(&mac_addr[idx*3], NULL, 16); + } + /* Do not allow multicast address */ + bkn_dev_mac[0] &= ~0x01; + } + + /* Optional RCPU MAC addresses */ + if (rcpu_dmac != NULL && strlen(rcpu_dmac) == 17) { + for (idx = 0; idx < 6; idx++) { + bkn_rcpu_dmac[idx] = simple_strtoul(&rcpu_dmac[idx*3], NULL, 16); + } + } + if (rcpu_smac != NULL && strlen(rcpu_smac) == 17) { + for (idx = 0; idx < 6; idx++) { + bkn_rcpu_smac[idx] = simple_strtoul(&rcpu_smac[idx*3], NULL, 16); + } + } + + /* NAPI implies that base device must be up before we can pass traffic */ + if (use_napi) { + basedev_suspend = 1; + } + + num_dev = kernel_bde->num_devices(BDE_ALL_DEVICES); + for (idx = 0; idx < num_dev; idx++) { + rv = bkn_knet_dev_init(idx); + if (rv) { + return rv; + } + } + + /* Initialize proc files */ + proc_mkdir("bcm", NULL); + bkn_proc_root = proc_mkdir("bcm/knet", NULL); + + bkn_proc_init(); + + /* Initialize event queue */ + for (idx = 0; idx < LINUX_BDE_MAX_DEVICES; idx++) { + memset(&_bkn_evt[idx], 0, sizeof(bkn_evt_resource_t)); + } + evt = &_bkn_evt[0]; + init_waitqueue_head(&evt->evt_wq); + + if (use_proxy) { + PROXY_SERVICE_CREATE(KCOM_CHAN_KNET, 1, 0); + + DBG_VERB(("Starting command thread\n")); + bkn_thread_start(&bkn_cmd_ctrl, "bkncmd", bkn_cmd_thread); + + DBG_VERB(("Starting event thread\n")); + bkn_thread_start(&bkn_evt_ctrl, "bknevt", bkn_evt_thread); + } + + module_initialized = 1; + + return 0; +} + +static int +_ioctl(unsigned int cmd, unsigned long arg) +{ + bkn_ioctl_t io; + kcom_msg_t kmsg; + + if (!module_initialized) { + return -EFAULT; + } + + if (copy_from_user(&io, (void*)arg, sizeof(io))) { + return -EFAULT; + } + + if (io.len > sizeof(kmsg)) { + return -EINVAL; + } + + io.rc = 0; + + switch(cmd) { + case 0: + if (io.len > 0) { + if (copy_from_user(&kmsg, (void *)(unsigned long)io.buf, io.len)) { + return -EFAULT; + } + ioctl_cmd++; + io.len = bkn_handle_cmd_req(&kmsg, io.len); + ioctl_cmd--; + } else { + memset(&kmsg, 0, sizeof(kcom_msg_dma_info_t)); + /* + * Retrive the kmsg.hdr.unit from user space. The dma event queue + * selection is based the instance derived from unit. + */ + if (copy_from_user(&kmsg, (void *)(unsigned long)io.buf, sizeof(kmsg))) { + return -EFAULT; + } + kmsg.hdr.type = KCOM_MSG_TYPE_EVT; + kmsg.hdr.opcode = KCOM_M_DMA_INFO; + ioctl_evt++; + io.len = bkn_get_next_dma_event((kcom_msg_dma_info_t *)&kmsg); + ioctl_evt--; + } + if (io.len > 0) { + if (copy_to_user((void *)(unsigned long)io.buf, &kmsg, io.len)) { + return -EFAULT; + } + } + break; + default: + gprintk("Invalid IOCTL"); + io.rc = -1; + break; + } + + if (copy_to_user((void*)arg, &io, sizeof(io))) { + return -EFAULT; + } + + return 0; +} + +static gmodule_t _gmodule = { + name: MODULE_NAME, + major: MODULE_MAJOR, + init: _init, + cleanup: _cleanup, + pprint: _pprint, + ioctl: _ioctl, + open: NULL, + close: NULL, +}; + +gmodule_t * +gmodule_get(void) +{ + EXPORT_NO_SYMBOLS; + return &_gmodule; +} + +/* + * Call-back interfaces for other Linux kernel drivers. + * + * The Rx call-back allows an external module to modify SKB contents + * before it is handed off to the Linux network stack. + * + * The Tx call-back allows an external module to modify SKB contents + * before it is injected inot the switch. + */ + +int +bkn_rx_skb_cb_register(knet_skb_cb_f rx_cb) +{ + if (knet_rx_cb != NULL) { + return -1; + } + knet_rx_cb = rx_cb; + return 0; +} + +int +bkn_rx_skb_cb_unregister(knet_skb_cb_f rx_cb) +{ + if (rx_cb != NULL && knet_rx_cb != rx_cb) { + return -1; + } + knet_rx_cb = NULL; + return 0; +} + +int +bkn_tx_skb_cb_register(knet_skb_cb_f tx_cb) +{ + if (knet_tx_cb != NULL) { + return -1; + } + knet_tx_cb = tx_cb; + return 0; +} + +int +bkn_tx_skb_cb_unregister(knet_skb_cb_f tx_cb) +{ + if (tx_cb != NULL && knet_tx_cb != tx_cb) { + return -1; + } + knet_tx_cb = NULL; + return 0; +} + +int +bkn_filter_cb_register(knet_filter_cb_f filter_cb) +{ + if (knet_filter_cb != NULL) { + return -1; + } + knet_filter_cb = filter_cb; + return 0; +} + +int +bkn_filter_cb_unregister(knet_filter_cb_f filter_cb) +{ + if (filter_cb != NULL && knet_filter_cb != filter_cb) { + return -1; + } + knet_filter_cb = NULL; + return 0; +} + +LKM_EXPORT_SYM(bkn_rx_skb_cb_register); +LKM_EXPORT_SYM(bkn_rx_skb_cb_unregister); +LKM_EXPORT_SYM(bkn_tx_skb_cb_register); +LKM_EXPORT_SYM(bkn_tx_skb_cb_unregister); +LKM_EXPORT_SYM(bkn_filter_cb_register); +LKM_EXPORT_SYM(bkn_filter_cb_unregister); diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h new file mode 100644 index 00000000000..760690b3fb9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h @@ -0,0 +1,78 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: bcm-knet.h,v 1.4 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + */ +#ifndef __LINUX_BCM_KNET_H__ +#define __LINUX_BCM_KNET_H__ + +#ifndef __KERNEL__ +#include +#endif + +typedef struct { + int rc; + int len; + int bufsz; + int reserved; + uint64_t buf; +} bkn_ioctl_t; + +#ifdef __KERNEL__ + +/* + * Call-back interfaces for other Linux kernel drivers. + */ +#include + +typedef struct { + uint32 netif_user_data; + uint32 filter_user_data; + uint16 dcb_type; +} knet_skb_cb_t; + +#define KNET_SKB_CB(__skb) ((knet_skb_cb_t *)&((__skb)->cb[0])) + +typedef struct sk_buff * +(*knet_skb_cb_f)(struct sk_buff *skb, int dev_no, void *meta); + +typedef int +(*knet_filter_cb_f)(uint8_t *pkt, int size, int dev_no, void *meta, + int chan, kcom_filter_t *filter); + +extern int +bkn_rx_skb_cb_register(knet_skb_cb_f rx_cb); + +extern int +bkn_rx_skb_cb_unregister(knet_skb_cb_f rx_cb); + +extern int +bkn_tx_skb_cb_register(knet_skb_cb_f tx_cb); + +extern int +bkn_tx_skb_cb_unregister(knet_skb_cb_f tx_cb); + +extern int +bkn_filter_cb_register(knet_filter_cb_f filter_cb); + +extern int +bkn_filter_cb_unregister(knet_filter_cb_f filter_cb); + +#endif + +#endif /* __LINUX_BCM_KNET_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h new file mode 100644 index 00000000000..22cef82a8dd --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h @@ -0,0 +1,65 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: gmodule.h,v 1.9 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + */ + +#ifndef __COMMON_LINUX_KRN_GMODULE_H__ +#define __COMMON_LINUX_KRN_GMODULE_H__ + +#include + +typedef struct gmodule_s { + + const char* name; + int major; + int minor; + + int (*init)(void); + int (*cleanup)(void); + + int (*pprint)(void); + + int (*open)(void); + int (*ioctl)(unsigned int cmd, unsigned long arg); + int (*close)(void); + int (*mmap) (struct file *filp, struct vm_area_struct *vma); + +} gmodule_t; + + +/* The framework will ask for your module definition */ +extern gmodule_t* gmodule_get(void); + + +/* Proc Filesystem information */ +extern int pprintf(const char* fmt, ...) + __attribute__ ((format (printf, 1, 2))); +extern int gmodule_vpprintf(char** page, const char* fmt, va_list args) + __attribute__ ((format (printf, 2, 0))); +extern int gmodule_pprintf(char** page, const char* fmt, ...) + __attribute__ ((format (printf, 2, 3))); + +extern int gprintk(const char* fmt, ...) + __attribute__ ((format (printf, 1, 2))); + +extern int gdbg(const char* fmt, ...) + __attribute__ ((format (printf, 1, 2))); +#define GDBG gdbg + +#endif /* __COMMON_LINUX_KRN_GMODULE_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h new file mode 100644 index 00000000000..a48cb540ada --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h @@ -0,0 +1,182 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: lkm.h,v 1.22 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + */ + +#ifndef __COMMON_LINUX_KRN_LKM_H__ +#define __COMMON_LINUX_KRN_LKM_H__ + +#ifndef __KERNEL__ +# define __KERNEL__ +#endif +#ifndef MODULE +# define MODULE +#endif + +#include +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) +#include +#endif +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,1,0) +#include +#endif +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) +#include +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39) +#include +#endif +#include + +/* Helper defines for multi-version kernel support */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) +#define LKM_2_4 +#else +#define LKM_2_6 +#endif + +#include /* printk() */ +#include /* everything... */ +#include /* error codes */ +#include /* size_t */ +#include +#include /* O_ACCMODE */ +#include +#include +#include +#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,11,0) +#include +#endif +#include + +#include +#include +#include + +#ifdef CONFIG_DEVFS_FS +#include +#endif + +#define PROC_INTERFACE_KERN_VER_3_10 (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)) + +/* Compatibility Macros */ + +#ifdef LKM_2_4 + +#include +#include +#define LKM_MOD_PARAM(n,ot,nt,d) MODULE_PARM(n,ot) +#define LKM_MOD_PARAM_ARRAY(n,ot,nt,c,d) MODULE_PARM(n,ot) +#define LKM_EXPORT_SYM(s) +#define _free_netdev kfree + +#else /* LKM_2_6 */ + +#define LKM_MOD_PARAM(n,ot,nt,d) module_param(n,nt,d) +#define LKM_MOD_PARAM_ARRAY(n,ot,nt,c,d) module_param_array(n,nt,c,d) +#define LKM_EXPORT_SYM(s) EXPORT_SYMBOL(s) +#define _free_netdev free_netdev + +#endif /* LKM_2_x */ + +#ifndef list_for_each_safe +#define list_for_each_safe(l,t,i) t = 0; list_for_each((l),(i)) +#endif + +#ifndef reparent_to_init +#define reparent_to_init() +#endif + +#ifndef MODULE_LICENSE +#define MODULE_LICENSE(str) +#endif + +#ifndef EXPORT_NO_SYMBOLS +#define EXPORT_NO_SYMBOLS +#endif + +#ifndef DEFINE_SPINLOCK +#define DEFINE_SPINLOCK(_lock) spinlock_t _lock = SPIN_LOCK_UNLOCKED +#endif + +#ifndef __SPIN_LOCK_UNLOCKED +#define __SPIN_LOCK_UNLOCKED(_lock) SPIN_LOCK_UNLOCKED +#endif + +#ifndef lock_kernel +#ifdef preempt_disable +#define lock_kernel() preempt_disable() +#else +#define lock_kernel() +#endif +#endif + +#ifndef unlock_kernel +#ifdef preempt_enable +#define unlock_kernel() preempt_enable() +#else +#define unlock_kernel() +#endif +#endif + +#ifndef init_MUTEX_LOCKED +#define init_MUTEX_LOCKED(_sem) sema_init(_sem, 0) +#endif + +#ifdef CONFIG_BCM98245 +#define CONFIG_BMW +#endif + +#if PROC_INTERFACE_KERN_VER_3_10 +#define PROC_CREATE(_entry, _name, _acc, _path, _fops) \ + do { \ + _entry = proc_create(_name, _acc, _path, _fops); \ + } while (0) + +#define PROC_CREATE_DATA(_entry, _name, _acc, _path, _fops, _data) \ + do { \ + _entry = proc_create_data(_name, _acc, _path, _fops, _data); \ + } while (0) + +#define PROC_PDE_DATA(_node) PDE_DATA(_node) + +#else +#define PROC_CREATE(_entry, _name, _acc, _path, _fops) \ + do { \ + _entry = create_proc_entry(_name, _acc, _path); \ + if (_entry) { \ + _entry->proc_fops = _fops; \ + } \ + } while (0) + +#define PROC_CREATE_DATA(_entry, _name, _acc, _path, _fops, _data) \ + do { \ + _entry = create_proc_entry(_name, _acc, _path); \ + if (_entry) { \ + _entry->proc_fops = _fops; \ + _entry->data=_data; \ + } \ + } while (0) + +#define PROC_PDE_DATA(_node) PROC_I(_node)->pde->data +#endif + +#endif /* __COMMON_LINUX_KRN_LKM_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile new file mode 100644 index 00000000000..d7ca56cd570 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile @@ -0,0 +1,64 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +LOCALDIR = systems/linux/kernel/modules/knet-cb + +include ${SDK}/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +ifeq ($(kernel_version),2_4) +MODULE = $(LIBDIR)/linux-knet-cb.o +else +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-knet-cb +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +build: $(MODULE) $(KMODULE) +endif + +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../bcm-knet/kernel_module/Module.symvers + +# BCM Network Device + +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ +ifneq ($(kernel_version),2_4) +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko +endif + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +include ${SDK}/make/Make.depend + +clean:: + $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o + $(RM) $(BOBJS) $(MODULE) + +ifneq ($(kernel_version),2_4) +.PHONY: build +endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c new file mode 100644 index 00000000000..da221f9f453 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c @@ -0,0 +1,310 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: $ + * $Copyright: (c) 2017 Broadcom Corp. + * All Rights Reserved.$ + */ + +/* + * Driver for call-back functions for Linux KNET driver. + * + * This is sample code that demonstrates how to selectively strip VLAN tags + * from an incoming packet based on tag information in the DMA control block + * (DCB). The switch will automatically add a VLAN tag to packets that ingress + * without an outer VLAN tag. Outer tagged and double tagged packets are + * not modified. The call back defined here determines which packets have + * had tags added by those and strips only those tags from the packet. + * + * This is sample code, the customer is responsible for maintaining and + * modifying this code as necessary. + * + * The module can be built from the standard Linux user mode target + * directories using the following command (assuming bash), e.g. + * + * cd $SDK/systems/linux/user/ + * make BUILD_KNET_CB=1 + * + */ + +#include /* Must be included first */ +#include +#include +#include + +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("Broadcom Linux KNET Call-Back Driver"); +MODULE_LICENSE("GPL"); + + +static int debug; +LKM_MOD_PARAM(debug, "i", int, 0); +MODULE_PARM_DESC(debug, +"Debug level (default 0)"); + + +/* Module Information */ +#define MODULE_MAJOR 121 +#define MODULE_NAME "linux-knet-cb" + +/* set KNET_CB_DEBUG for debug info */ +#define KNET_CB_DEBUG + +#define FILTER_TAG_STRIP 0 +#define FILTER_TAG_KEEP 1 + +/* Maintain tag strip statistics */ +struct strip_stats_s { + unsigned long stripped; /* Number of packets that have been stripped */ + unsigned long checked; + unsigned long skipped; +}; + +static struct strip_stats_s strip_stats; + +/* Local function prototypes */ +static void strip_vlan_tag(struct sk_buff *skb); +static int get_tag_status(int dcb_type, void *meta); +static struct sk_buff *strip_tag_rx_cb(struct sk_buff *skb, int dev_no, void *meta); +static struct sk_buff *strip_tag_tx_cb(struct sk_buff *skb, int dev_no, void *meta); +static int strip_tag_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta, + int chan, kcom_filter_t * kf); +static int _pprint(void); +static int _cleanup(void); +static int _init(void); + +/* Remove VLAN tag for select TPIDs */ +static void +strip_vlan_tag(struct sk_buff *skb) +{ + uint16_t vlan_proto = (uint16_t) ((skb->data[12] << 8) | skb->data[13]); + if ((vlan_proto == 0x8100) || (vlan_proto == 0x88a8) || (vlan_proto == 0x9100)) { + /* Move first 12 bytes of packet back by 4 */ + ((u32 *) skb->data)[3] = ((u32 *) skb->data)[2]; + ((u32 *) skb->data)[2] = ((u32 *) skb->data)[1]; + ((u32 *) skb->data)[1] = ((u32 *) skb->data)[0]; + skb_pull(skb, 4); /* Remove 4 bytes from start of buffer */ + } +} + +/* + * Location of tagging status in select DCB types found below: + * + * DCB type 14: word 12, bits 10.11 + * DCB type 19, 20, 21, 22, 30: word 12, bits 10..11 + * DCB type 23, 29: word 13, bits 0..1 + * DCB type 31, 34, 37: word 13, bits 0..1 + * DCB type 26, 32, 33, 35: word 13, bits 0..1 + * + * The function get_tag_status() returns the tag status for known DCB types. + * 0 = Untagged + * 1 = Single inner-tag + * 2 = Single outer-tag + * 3 = Double tagged. + * -1 = Unsupported DCB type + */ +static int +get_tag_status(int dcb_type, void *meta) +{ + uint32 *dcb = (uint32 *) meta; + int tag_status; + switch (dcb_type) { + case 14: + case 19: + case 20: + case 21: + case 22: + case 30: + tag_status = (dcb[12] > 10) & 0x3; + break; + case 23: + case 29: + case 31: + case 34: + case 37: + case 26: + case 32: + case 33: + case 35: + tag_status = dcb[13] & 0x3; + break; + case 36: + /* TD3 */ + tag_status = ((dcb[13] >> 9) & 0x3); + break; + break; + case 38: + { + /* untested */ + /* TH3 only parses outer tag. */ + const int tag_map[4] = { 0, 2, -1, -1 }; + tag_status = tag_map[(dcb[9] >> 13) & 0x3]; + } + break; + default: + tag_status = -1; + break; + } +#ifdef KNET_CB_DEBUG + if (debug & 0x1) { + gprintk("%s; DCB Type: %d; tag status: %d\n", __func__, dcb_type, tag_status); + } +#endif + return tag_status; +} + +/* Rx packet callback function */ +static struct sk_buff * +strip_tag_rx_cb(struct sk_buff *skb, int dev_no, void *meta) +{ + unsigned netif_flags = KNET_SKB_CB(skb)->netif_user_data; + unsigned filter_flags = KNET_SKB_CB(skb)->filter_user_data; + unsigned dcb_type; + int tag_status; + unsigned int strip_tag = 0; + /* Currently not using filter flags: + * unsigned filter_flags = KNET_SKB_CB(skb)->filter_user_data; + */ + +#ifdef KNET_CB_DEBUG + if (debug & 0x1) { + gprintk("%s Enter; netif Flags: %08X filter_flags %08X \n", + __func__, netif_flags, filter_flags); + } +#endif + + /* KNET implements this already */ + if (filter_flags == FILTER_TAG_KEEP) + { + strip_stats.skipped++; + return skb; + } + + /* SAI strip implies always strip. If the packet is untagged or + inner taged, SDK adds a .1q tag, so we need to strip tag + anyway */ + if (filter_flags == FILTER_TAG_STRIP) + { + strip_tag = 1; + } + /* Get DCB type for this packet, passed by KNET driver */ + dcb_type = KNET_SKB_CB(skb)->dcb_type; + + /* Get tag status from DCB */ + tag_status = get_tag_status(dcb_type, meta); + +#ifdef KNET_CB_DEBUG + if (debug & 0x1) { + gprintk("%s; DCB Type: %d; tag status: %d\n", __func__, dcb_type, tag_status); + } +#endif + + if (tag_status < 0) { + /* Unsupported DCB type */ + return skb; + } + + strip_stats.checked++; + + if (strip_tag) { +#ifdef KNET_CB_DEBUG + if (debug & 0x1) { + gprintk("%s; Stripping VLAN\n", __func__); + } +#endif + strip_stats.stripped++; + strip_vlan_tag(skb); + } +#ifdef KNET_CB_DEBUG + else { + if (debug & 0x1) { + gprintk("%s; Preserve VLAN\n", __func__); + } + } +#endif + + return skb; +} + +/* Tx callback not used */ +static struct sk_buff * +strip_tag_tx_cb(struct sk_buff *skb, int dev_no, void *meta) +{ + /* Pass through for now */ + return skb; +} + +/* Filter callback not used */ +static int +strip_tag_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta, + int chan, kcom_filter_t *kf) +{ + /* Pass through for now */ + return 0; +} + +/* + * Get statistics. + * % cat /proc/linux-knet-cb + */ +static int +_pprint(void) +{ + pprintf("Broadcom Linux KNET Call-Back: Untagged VLAN Stripper\n"); + pprintf(" %lu stripped packets\n", strip_stats.stripped); + pprintf(" %lu packets checked\n", strip_stats.checked); + pprintf(" %lu packets skipped\n", strip_stats.skipped); + + return 0; +} + +static int +_cleanup(void) +{ + bkn_rx_skb_cb_unregister(strip_tag_rx_cb); + bkn_tx_skb_cb_unregister(strip_tag_tx_cb); + bkn_filter_cb_unregister(strip_tag_filter_cb); + + return 0; +} + +static int +_init(void) +{ + bkn_rx_skb_cb_register(strip_tag_rx_cb); + bkn_tx_skb_cb_register(strip_tag_tx_cb); + bkn_filter_cb_register(strip_tag_filter_cb); + + return 0; +} + +static gmodule_t _gmodule = { + name: MODULE_NAME, + major: MODULE_MAJOR, + init: _init, + cleanup: _cleanup, + pprint: _pprint, + ioctl: NULL, + open: NULL, + close: NULL, +}; + +gmodule_t* +gmodule_get(void) +{ + EXPORT_NO_SYMBOLS; + return &_gmodule; +} diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile new file mode 100644 index 00000000000..5e97a3a3212 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile @@ -0,0 +1,29 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.2 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +LOCALDIR = systems/linux/kernel/modules/shared + +include ${SDK}/make/Make.config + +lib = libkern + +include ${SDK}/make/Make.kernlib + +include ${SDK}/make/Make.depend diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c new file mode 100644 index 00000000000..cdfaf089674 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c @@ -0,0 +1,427 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: gmodule.c,v 1.20 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + * + * Generic Linux Module Framework + * + * Hooks up your driver to the kernel + */ + +#include +#include +#include +#include + +/* Module Vector Table */ +static gmodule_t* _gmodule = NULL; + + +/* Allow DEVFS Support on 2.4 Kernels */ +#if defined(LKM_2_4) && defined(CONFIG_DEVFS_FS) +#define GMODULE_CONFIG_DEVFS_FS +#endif + + +#ifdef GMODULE_CONFIG_DEVFS_FS +devfs_handle_t devfs_handle = NULL; +#endif + +/* FIXME: support dynamic debugging */ + +static int _dbg_enable = 0; + +static int +gvprintk(const char* fmt, va_list args) + __attribute__ ((format (printf, 1, 0))); + +static int +gvprintk(const char* fmt, va_list args) +{ + static char _buf[256]; + + strcpy(_buf, ""); + sprintf(_buf, "%s (%d): ", _gmodule->name, current->pid); + vsprintf(_buf+strlen(_buf), fmt, args); + printk("%s",_buf); + + return 0; +} + +int +gprintk(const char* fmt, ...) +{ + int rv; + + va_list args; + va_start(args, fmt); + rv = gvprintk(fmt, args); + va_end(args); + return rv; +} + +int +gdbg(const char* fmt, ...) +{ + int rv = 0; + + va_list args; + va_start(args, fmt); + if(_dbg_enable) { + rv = gvprintk(fmt, args); + } + va_end(args); + return rv; +} + + +/* + * Proc FS Utilities + */ +#if PROC_INTERFACE_KERN_VER_3_10 +static struct seq_file* _proc_buf = NULL; + +int +pprintf(const char* fmt, ...) +{ + va_list args; + va_start(args, fmt); + seq_vprintf(_proc_buf, fmt, args); + va_end(args); + return 0; +} + +static int _gmodule_proc_show(struct seq_file *m, void *v){ + _proc_buf = m; + _gmodule->pprint(); + return 0; +} + +static int +_gmodule_proc_open(struct inode * inode, struct file * file) { + if(_gmodule->open) { + _gmodule->open(); + } + + return single_open(file, _gmodule_proc_show, NULL); +} + +static ssize_t +_gmodule_proc_write(struct file *file, const char *buffer, + size_t count, loff_t *loff) +{ + /* Workaround to toggle debugging */ + if(count > 2) { + if(buffer[0] == 'd') { + _dbg_enable = buffer[1] - '0'; + GDBG("Debugging Enabled"); + } + } + return count; +} + +static int _gmodule_proc_release(struct inode * inode, struct file * file) { + if(_gmodule->close) { + _gmodule->close(); + } + + return single_release(inode, file); +} + +struct file_operations _gmodule_proc_fops = { + owner: THIS_MODULE, + open: _gmodule_proc_open, + read: seq_read, + llseek: seq_lseek, + write: _gmodule_proc_write, + release: _gmodule_proc_release, +}; +#else +int +gmodule_vpprintf(char** page_ptr, const char* fmt, va_list args) +{ + *page_ptr += vsprintf(*page_ptr, fmt, args); + return 0; +} + +int +gmodule_pprintf(char** page_ptr, const char* fmt, ...) +{ + int rv; + + va_list args; + va_start(args, fmt); + rv = gmodule_vpprintf(page_ptr, fmt, args); + va_end(args); + return rv; +} + +static char* _proc_buf = NULL; + +int +pprintf(const char* fmt, ...) +{ + int rv; + + va_list args; + va_start(args, fmt); + rv = gmodule_vpprintf(&_proc_buf, fmt, args); + va_end(args); + return rv; +} + +#define PSTART(b) _proc_buf = b +#define PPRINT proc_print +#define PEND(b) (_proc_buf-b) + +static int +_gmodule_pprint(char* buf) +{ + PSTART(buf); + _gmodule->pprint(); + return PEND(buf); +} + +static int +_gmodule_read_proc(char *page, char **start, off_t off, + int count, int *eof, void *data) +{ + *eof = 1; + return _gmodule_pprint(page); +} + +static int +_gmodule_write_proc(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + /* Workaround to toggle debugging */ + if(count > 2) { + if(buffer[0] == 'd') { + _dbg_enable = buffer[1] - '0'; + GDBG("Debugging Enabled"); + } + } + return count; +} +#endif + +static int +_gmodule_create_proc(void) +{ + struct proc_dir_entry* ent; +#if PROC_INTERFACE_KERN_VER_3_10 + if((ent = proc_create(_gmodule->name, + S_IRUGO | S_IWUGO, + NULL, + &_gmodule_proc_fops)) != NULL) { + return 0; + } +#else + if((ent = create_proc_entry(_gmodule->name, S_IRUGO | S_IWUGO, NULL)) != NULL) { + ent->read_proc = _gmodule_read_proc; + ent->write_proc = _gmodule_write_proc; + return 0; + } +#endif + return -1; +} + +static void +_gmodule_remove_proc(void) +{ + remove_proc_entry(_gmodule->name, NULL); +} + +static int +_gmodule_open(struct inode *inode, struct file *filp) +{ + if(_gmodule->open) { + _gmodule->open(); + } + return 0; +} + +static int +_gmodule_release(struct inode *inode, struct file *filp) +{ + if(_gmodule->close) { + _gmodule->close(); + } + return 0; +} + +#ifdef HAVE_UNLOCKED_IOCTL +static long +_gmodule_unlocked_ioctl(struct file *filp, + unsigned int cmd, unsigned long arg) +{ + if(_gmodule->ioctl) { + return _gmodule->ioctl(cmd, arg); + } else { + return -1; + } +} +#else +static int +_gmodule_ioctl(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + if(_gmodule->ioctl) { + return _gmodule->ioctl(cmd, arg); + } else { + return -1; + } +} +#endif + +#ifdef HAVE_COMPAT_IOCTL +static long +_gmodule_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + if(_gmodule->ioctl) { + return _gmodule->ioctl(cmd, arg); + } else { + return -1; + } +} +#endif + + +static int +_gmodule_mmap(struct file *filp, struct vm_area_struct *vma) +{ + if (_gmodule->mmap) { + return _gmodule->mmap(filp, vma); + } +#ifdef BCM_PLX9656_LOCAL_BUS + vma->vm_flags |= VM_RESERVED | VM_IO; + pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE | _PAGE_GUARDED; + + if (io_remap_pfn_range( vma, + vma->vm_start, + vma->vm_pgoff, + vma->vm_end - vma->vm_start, + vma->vm_page_prot)) { + return (-EAGAIN); + } + return (0); +#else/* BCM_PLX9656_LOCAL_BUS */ + return -EPERM; +#endif/* BCM_PLX9656_LOCAL_BUS */ +} + +/* FILE OPERATIONS */ + +struct file_operations _gmodule_fops = { +#ifdef HAVE_UNLOCKED_IOCTL + unlocked_ioctl: _gmodule_unlocked_ioctl, +#else + ioctl: _gmodule_ioctl, +#endif + open: _gmodule_open, + release: _gmodule_release, + mmap: _gmodule_mmap, +#ifdef HAVE_COMPAT_IOCTL + compat_ioctl: _gmodule_compat_ioctl, +#endif +}; + + +void __exit +cleanup_module(void) +{ + if(!_gmodule) return; + + /* Specific Cleanup */ + if(_gmodule->cleanup) { + _gmodule->cleanup(); + } + + /* Remove any proc entries */ + if(_gmodule->pprint) { + _gmodule_remove_proc(); + } + + /* Finally, remove ourselves from the universe */ +#ifdef GMODULE_CONFIG_DEVFS_FS + if(devfs_handle) devfs_unregister(devfs_handle); +#else + unregister_chrdev(_gmodule->major, _gmodule->name); +#endif +} + +int __init +init_module(void) +{ + int rc; + + /* Get our definition */ + _gmodule = gmodule_get(); + if(!_gmodule) return -ENODEV; + + + /* Register ourselves */ +#ifdef GMODULE_CONFIG_DEVFS_FS + devfs_handle = devfs_register(NULL, + _gmodule->name, + DEVFS_FL_NONE, + _gmodule->major, + _gmodule->minor, + S_IFCHR | S_IRUGO | S_IWUGO, + &_gmodule_fops, + NULL); + if(!devfs_handle) { + printk(KERN_WARNING "%s: can't register device with devfs", + _gmodule->name); + } + rc = 0; +#else + rc = register_chrdev(_gmodule->major, + _gmodule->name, + &_gmodule_fops); + if (rc < 0) { + printk(KERN_WARNING "%s: can't get major %d", + _gmodule->name, _gmodule->major); + return rc; + } + + if(_gmodule->major == 0) { + _gmodule->major = rc; + } +#endif + + /* Specific module Initialization */ + if(_gmodule->init) { + int rc; + if((rc = _gmodule->init()) < 0) { +#ifdef GMODULE_CONFIG_DEVFS_FS + if(devfs_handle) devfs_unregister(devfs_handle); +#else + unregister_chrdev(_gmodule->major, _gmodule->name); +#endif + return rc; + } + } + + /* Add a /proc entry, if valid */ + if(_gmodule->pprint) { + _gmodule_create_proc(); + } + + return 0; /* succeed */ +} diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c new file mode 100644 index 00000000000..d1caf871f0e --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c @@ -0,0 +1,249 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ +/* + * $Id: ksal.c,v 1.1 Broadcom SDK $ + * $Copyright: (c) 2005 Broadcom Corp. + * All Rights Reserved.$ + */ + +#include +#include + +#include "lkm.h" +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) +#include +#else +#include +#endif +#include +#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,9,0) +#include +#endif +#include + +#ifdef MAX_USER_RT_PRIO +/* Assume 2.6 scheduler */ +#define SAL_YIELD(task) \ + yield() +#else +/* Assume 2.4 scheduler */ +#define SAL_YIELD(task) \ +do { \ + task->policy |= SCHED_YIELD; \ + schedule(); \ +} while (0) +#endif + +#define SECOND_USEC (1000000) +#define USECS_PER_JIFFY (SECOND_USEC / HZ) +#define USEC_TO_JIFFIES(usec) ((usec + (USECS_PER_JIFFY - 1)) / USECS_PER_JIFFY) + +#define sal_alloc(size, desc) kmalloc(size, GFP_KERNEL) +#define sal_free(ptr) kfree(ptr) + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12) +#define WQ_SLEEP(a, b) wait_event_interruptible_timeout(a, NULL, b) +#else +#define WQ_SLEEP(a, b) interruptible_sleep_on_timeout(&(a), b) +#endif +/* + * sem_ctrl_t + * + * The semaphore control type uses the binary property to implement + * timed semaphores with improved performance using wait queues. + */ + +typedef struct sem_ctrl_s { + struct semaphore sem; + int binary; + int cnt; + wait_queue_head_t wq; +} sem_ctrl_t; + +sal_sem_t +sal_sem_create(char *desc, int binary, int initial_count) +{ + sem_ctrl_t *s; + + if ((s = sal_alloc(sizeof(*s), desc)) != 0) { + sema_init(&s->sem, initial_count); + s->binary = binary; + if (s->binary) { + init_waitqueue_head(&s->wq); + } + } + + return (sal_sem_t) s; +} + +void +sal_sem_destroy(sal_sem_t b) +{ + sem_ctrl_t *s = (sem_ctrl_t *) b; + + if (s == NULL) { + return; + } + + /* + * the linux kernel does not have a sema_destroy(s) + */ + sal_free(s); +} + +int +sal_sem_take(sal_sem_t b, int usec) +{ + sem_ctrl_t *s = (sem_ctrl_t *) b; + int err; + + if (usec == sal_sem_FOREVER && !in_interrupt()) { + err = down_interruptible(&s->sem); + } else { + int time_wait = 1; + int cnt = s->cnt; + + for (;;) { + if (down_trylock(&s->sem) == 0) { + err = 0; + break; + } + + if (s->binary) { + + /* Wait for event or timeout */ + + if (time_wait > 1) { + err = 1; + break; + } + err = wait_event_interruptible_timeout(s->wq, cnt != s->cnt, + USEC_TO_JIFFIES(usec)); + if (err < 0) { + break; + } + time_wait++; + + } else { + + /* Retry algorithm with exponential backoff */ + + if (time_wait > usec) { + time_wait = usec; + } + + sal_usleep(time_wait); + + usec -= time_wait; + + if (usec == 0) { + err = ETIMEDOUT; + break; + } + + if ((time_wait *= 2) > 100000) { + time_wait = 100000; + } + } + } + } + return err ? -1 : 0; +} + +int +sal_sem_give(sal_sem_t b) +{ + sem_ctrl_t *s = (sem_ctrl_t *) b; + + up(&s->sem); + if (s->binary) { + s->cnt++; + wake_up_interruptible(&s->wq); + } + return 0; +} + +uint32 +sal_time_usecs(void) +{ + struct timeval ltv; + do_gettimeofday(<v); + return (ltv.tv_sec * SECOND_USEC + ltv.tv_usec); +} + +void +sal_usleep(uint32 usec) +{ + uint32 start_usec; + wait_queue_head_t queue; + + if (usec <= SECOND_USEC / HZ) { + start_usec = sal_time_usecs(); + do { + SAL_YIELD(current); + } while ((sal_time_usecs() - start_usec) < usec); + } else { + init_waitqueue_head(&queue); + WQ_SLEEP(queue, USEC_TO_JIFFIES(usec)); + } +} + +void +sal_udelay(uint32 usec) +{ + static volatile int _sal_udelay_counter; + static int loops = 0; + int ix, iy; + + if (loops == 0 || usec == 0) { /* Need calibration? */ + int max_loops; + int start = 0, stop = 0; + int mpt = USECS_PER_JIFFY; /* usec/tick */ + + for (loops = 1; loops < 0x1000 && stop == start; loops <<= 1) { + /* Wait for clock turn over */ + for (stop = start = jiffies; start == stop; start = jiffies) { + /* Empty */ + } + sal_udelay(mpt); /* Single recursion */ + stop = jiffies; + } + + max_loops = loops / 2; /* Loop above overshoots */ + + start = stop = 0; + + if (loops < 4) { + loops = 4; + } + + for (loops /= 4; loops < max_loops && stop == start; loops++) { + /* Wait for clock turn over */ + for (stop = start = jiffies; start == stop; start = jiffies) { + /* Empty */ + } + sal_udelay(mpt); /* Single recursion */ + stop = jiffies; + } + } + + for (iy = 0; iy < usec; iy++) { + for (ix = 0; ix < loops; ix++) { + _sal_udelay_counter++; /* Prevent optimizations */ + } + } +} diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/bmw-2_6/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/bmw-2_6/Makefile new file mode 100644 index 00000000000..899c7b40537 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/bmw-2_6/Makefile @@ -0,0 +1,63 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.4 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# PPC_TOOLS_DIR - path to build tools (if not in PATH already) +# PPC_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=bmw-$(kernel_version) + +# Windriver linux version +#WRS_LINUX_VERSION=1.4 +#WRS_LINUX_VERSION=2.0 + +LINUX_MAKE_USER=1 +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile new file mode 100644 index 00000000000..0e622654433 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile @@ -0,0 +1,235 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.4 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override-target=linux-$(platform) + +ifeq ($(LINUX_MAKE_SHARED_LIB),1) +libext = so.$(SHAREDLIBVER) +else +libext = a +endif + +ifeq (,$(platform)) +$(error Internal error: platform variable is not set) +endif + +include $(SDK)/make/Make.config +LOCALDIR=systems/linux/user/common +include $(SDK)/make/Make.depend +kernel-override=linux-$(platform) +ifdef BLDCONFIG +KERN_BLDROOT=${SDK}/${SDKBUILD}/${BLDCONFIG}/$(kernel-override)$(bldroot_suffix) +else +KERN_BLDROOT=${SDK}/${SDKBUILD}/$(kernel-override)$(bldroot_suffix) +endif + +ifeq (,$(kernel_version)) +kernel_version=2_4 +endif + +ifeq ($(kernel_version),2_6) +KOBJ=ko +else +KOBJ=o +endif + +ifneq (,$(TOOLS_DIR)) +override PATH := $(TOOLS_DIR):$(PATH) +endif + +ifeq ($(DEST_DIR),) +DEST_DIR=${BLDDIR} +endif + +KERNEL_BDE_LOCAL :=linux-kernel-bde.$(KOBJ) +KERNEL_BDE :=$(DEST_DIR)/$(KERNEL_BDE_LOCAL) + +USER_BDE_LOCAL :=linux-user-bde.$(KOBJ) +USER_BDE=$(DEST_DIR)/$(USER_BDE_LOCAL) + +KNET_CB_LOCAL := linux-knet-cb.$(KOBJ) +KNET_CB := $(DEST_DIR)/$(KNET_CB_LOCAL) + +BCM_KNET_LOCAL :=linux-bcm-knet.$(KOBJ) +BCM_KNET=$(DEST_DIR)/$(BCM_KNET_LOCAL) + +ifeq (,$(findstring DELIVER,$(MAKECMDGOALS))) +.DEFAULT_GOAL := all +all_targets := kernel_modules $(KERNEL_BDE) $(USER_BDE) + +LOCAL_TARGETS := + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,$(realpath ..)/$(platform)/%,$(KERNEL_BDE_LOCAL) $(USER_BDE_LOCAL)) + +all_targets +=$(LOCAL_TARGETS) +endif + +# Build all by default +ifndef BUILD_KNET +BUILD_KNET = 1 +endif + +ifeq ($(BUILD_KNET),1) +# Kernel network support +all_targets += $(BCM_KNET) + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(BCM_KNET_LOCAL)) +all_targets +=$(LOCAL_TARGETS) +endif + +ifdef BUILD_KNET_CB +all_targets += $(KNET_CB) + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(KNET_CB_LOCAL)) +all_targets +=$(LOCAL_TARGETS) +endif +endif + +ADD_TO_CFLAGS += -I$(SDK)/systems/linux/kernel/modules/include +COND_KNET_LIBS = libuser.$(libext) +endif + +#SAI_FIXUP +.NOTPARALLEL: + +all: $(BLDDIR)/.tree $(all_targets) + +ifeq ($(NO_LOCAL_TARGETS),) +define LOCAL_TARGET_DEF +$(1) : $(DEST_DIR)/$(notdir $(1)) + cp $$? $$@ +endef +endif + +# User BDE libraries +ADD_TO_CFLAGS += -I$(SDK)/systems/bde/linux/include + +# Use raw IOCTL for KNET +ADD_TO_CFLAGS += -DPROXY_SUPPORT=0 + +CFLAGS += $(ADD_TO_CFLAGS) +#SAI_FIXUP +CFLAGS:=$(filter-out -fPIC, $(CFLAGS)) + + +kernel_modules: + $(MAKE) -C $(SDK)/systems/bde/linux/kernel kernel_version=$(kernel_version) + $(MAKE) -C $(SDK)/systems/bde/linux/user/kernel kernel_version=$(kernel_version) +ifeq ($(BUILD_KNET),1) + $(MAKE) -j1 -C $(SDK)/systems/linux/kernel/modules kernel_version=$(kernel_version) \ + subdirs="shared bcm-knet" override-target=linux-$(platform) CFLAGS="$(CFLAGS)" +ifdef BUILD_KNET_CB + $(MAKE) -j1 -C $(SDK)/systems/linux/kernel/modules kernel_version=$(kernel_version) \ + subdirs="knet-cb" override-target=linux-$(platform) CFLAGS="$(CFLAGS)" +endif +endif + +$(KERNEL_BDE): $(KERN_BLDROOT)/linux-kernel-bde.$(KOBJ) + mkdir -p $(@D) + $(OBJCOPY) --strip-debug $< $@ + +$(USER_BDE): $(KERN_BLDROOT)/linux-user-bde.$(KOBJ) + $(OBJCOPY) --strip-debug $< $@ + +$(BCM_KNET): $(KERN_BLDROOT)/linux-bcm-knet.$(KOBJ) + $(OBJCOPY) --strip-debug $< $@ + +$(KNET_CB): $(KERN_BLDROOT)/linux-knet-cb.$(KOBJ) + $(OBJCOPY) --strip-debug $< $@ + +ifeq ($(NO_LOCAL_TARGETS),) +$(foreach targ,$(LOCAL_TARGETS),$(eval $(call LOCAL_TARGET_DEF,$(targ)))) +endif + +clean:: + $(MAKE) -C $(SDK)/systems/bde/linux/kernel $@ + $(MAKE) -C $(SDK)/systems/bde/linux/user/kernel $@ + $(MAKE) -C $(SDK)/systems/linux/kernel/modules \ + subdirs="shared bcm-knet knet-cb" \ + override-target=linux-$(platform) $@ + $(RM) $(KERNEL_BDE) $(USER_BDE) + $(RM) $(BCM_KNET) $(KNET_CB) + $(RM) $(KERN_BLDROOT)/linux-kernel-bde.$(KOBJ) + $(RM) $(KERN_BLDROOT)/linux-user-bde.$(KOBJ) + $(RM) $(KERN_BLDROOT)/linux-bcm-knet.$(KOBJ) + $(RM) $(KERN_BLDROOT)/linux-knet-cb.$(KOBJ) + $(RM) $(LOCAL_TARGETS) + +distclean:: clean + +.PHONY: variable + +# +# Echo variable values used for configuration +# usage: make VAR=CC variable +# +variable:: + @echo $($(VAR)) + +else +ifndef DELIVERY +$(error DELIVERY required) +endif + +DELIVERABLES := $(KERNEL_BDE) $(USER_BDE) +# 1= source +define DELIVERY_RULE +_DEL_TARG += $(DELIVERY)/$(notdir $(1)) +$(DELIVERY)/$(notdir $(1)) : $(1) + @mkdir -p $(DELIVERY) +ifeq ($(filter $(notdir $(BCM)) $(notdir $(BCM).dbg),$(notdir $1)),) + $(OBJCOPY) --strip-debug $$< $$@ +else + $(CP) -p $$< $$@ +endif +endef + +$(foreach f,$(DELIVERABLES),$(eval $(call DELIVERY_RULE,$(f)))) + +DELIVER: $(_DEL_TARG) +endif + +# Make.config defines remaining phony targets +.PHONY: build kernel_modules DELIVER + diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/gto-2_6/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/gto-2_6/Makefile new file mode 100644 index 00000000000..c157f9ff35f --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/gto-2_6/Makefile @@ -0,0 +1,84 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.9 Broadcom SDK $ +# $Copyright: (c) 2007 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# PPC_TOOLS_DIR - path to build tools (if not in PATH already) +# PPC_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=gto-$(kernel_version) +LINUX_MAKE_USER=1 +export LINKER_RELAX=1 + +# Select the build environment +#BUILD_PLATFORM=ELDK +#BUILD_PLATFORM=WR_LINUX + +#Select the LINUX KERNEL VERSION +#KERN_VER = 2.6.21.7 +#KERN_VER = 2.6.24.4 +#KERN_VER = 2.6.25 + + +# Select the ELDK version +#ELDK_VERSION=4.1 +#ELDK_VERSION=4.0 + +#Select WRS Linux version +#WRS_LINUX_VERSION=2.0 +#WRS_LINUX_VERSION=3.0 + + +export KERN_VER +export ELDK_VERSION +export BUILD_PLATFORM +export WRS_LINUX_VERSION + +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/gto/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/gto/Makefile new file mode 100644 index 00000000000..fd98f6d2f96 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/gto/Makefile @@ -0,0 +1,60 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.9 Broadcom SDK $ +# $Copyright: (c) 2015 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# PPC_TOOLS_DIR - path to build tools (if not in PATH already) +# PPC_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=4_4 +platform=gto +LINUX_MAKE_USER=1 +export LINKER_RELAX=1 + +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile new file mode 100644 index 00000000000..c9f538802f6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile @@ -0,0 +1,65 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.7 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=3_14 +platform=iproc-$(kernel_version) + +IPROC_BUILD=1 +export IPROC_BUILD +export BUILD_PLATFORM +export ARM_LINUX_VERSION + +LINUX_MAKE_USER=1 +export ADD_TO_CFLAGS + +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile new file mode 100644 index 00000000000..7a8b4a8b0c4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile @@ -0,0 +1,59 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.7 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=4_4 +platform=iproc + +IPROC_BUILD=1 +export IPROC_BUILD +export BUILD_PLATFORM +export ARM_LINUX_VERSION + +LINUX_MAKE_USER=1 +export ADD_TO_CFLAGS +export BR_NO_CCACHE + +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/jag-2_6/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/jag-2_6/Makefile new file mode 100644 index 00000000000..26a7f520f2d --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/jag-2_6/Makefile @@ -0,0 +1,79 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.4 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=jag-$(kernel_version) + +# Select the build environment +#BUILD_PLATFORM=ELDK +#BUILD_PLATFORM=WR_LINUX + +#Select the LINUX KERNEL VERSION +#KERN_VER = 2.6.21.7 + + +# Select the ELDK version +#ELDK_VERSION=4.1 + +# Windriver linux version +#WRS_LINUX_VERSION=1.4 +#WRS_LINUX_VERSION=2.0 + +export KERN_VER +export ELDK_VERSION +export BUILD_PLATFORM +export WRS_LINUX_VERSION + +LINUX_MAKE_USER=1 +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/nsx-2_6/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/nsx-2_6/Makefile new file mode 100644 index 00000000000..881ec34c2d3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/nsx-2_6/Makefile @@ -0,0 +1,58 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.4 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=nsx-$(kernel_version) +LINUX_MAKE_USER=1 +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/nsx64/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/nsx64/Makefile new file mode 100644 index 00000000000..9e79d90fa99 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/nsx64/Makefile @@ -0,0 +1,57 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +platform=nsx64 +LINUX_MAKE_USER=1 +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/nsx_wrl-2_6/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/nsx_wrl-2_6/Makefile new file mode 100644 index 00000000000..4e86843cdc7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/nsx_wrl-2_6/Makefile @@ -0,0 +1,65 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=nsx_wrl-$(kernel_version) + +# Windriver linux version +#WRS_LINUX_VERSION=1.4 +#WRS_LINUX_VERSION=2.0 + +export WRS_LINUX_VERSION + +LINUX_MAKE_USER=1 +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/raptor-2_6/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/raptor-2_6/Makefile new file mode 100644 index 00000000000..10ab1a1cc25 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/raptor-2_6/Makefile @@ -0,0 +1,79 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.5 Broadcom SDK $ +# $Copyright: (c) 2007 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=raptor-$(kernel_version) + +# Select the build environment +#BUILD_PLATFORM=ELDK +#BUILD_PLATFORM=WR_LINUX + +#Select the LINUX KERNEL VERSION +#KERN_VER = 2.6.21.7 + + +# Select the ELDK version +#ELDK_VERSION=4.1 + +# Windriver linux version +#WRS_LINUX_VERSION=1.4 +#WRS_LINUX_VERSION=2.0 + +export KERN_VER +export ELDK_VERSION +export BUILD_PLATFORM +export WRS_LINUX_VERSION + +LINUX_MAKE_USER=1 +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/raptor/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/raptor/Makefile new file mode 100644 index 00000000000..df8800a1a78 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/raptor/Makefile @@ -0,0 +1,58 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.1 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +platform=raptor +LINUX_MAKE_USER=1 +CFGFLAGS += -DBCM_ICS +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile new file mode 100644 index 00000000000..29717b3af42 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile @@ -0,0 +1,45 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.2 Broadcom SDK $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=x86-smp_generic_64-$(kernel_version) + +LINUX_MAKE_USER=1 +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/tools/mktool.pl b/platform/broadcom/saibcm-modules/tools/mktool.pl new file mode 100644 index 00000000000..8800c00613d --- /dev/null +++ b/platform/broadcom/saibcm-modules/tools/mktool.pl @@ -0,0 +1,292 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# mktool.pl +# +# $Id: mktool.pl,v 1.5 Broadcom SDK $ +# +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved. $ + +use File::Path; +use File::Find; +use File::Copy; +use Cwd; + +($prog = $0) =~ s/.*\///; + +SWITCH: +{ + $op = shift; + + if ($op eq "-rm") { mktool_rm(@ARGV); last SWITCH; } + if ($op eq "-cp") { mktool_cp(@ARGV); last SWITCH; } + if ($op eq "-md") { mktool_md(@ARGV); last SWITCH; } + if ($op eq "-ln") { mktool_ln(@ARGV); last SWITCH; } + if ($op eq "-foreach") { mktool_foreach(@ARGV); last SWITCH; } + if ($op eq "-dep") { mktool_makedep(@ARGV); last SWITCH; } + if ($op eq "-echo") { mktool_echo(@ARGV); last SWITCH; } + if ($op eq "-beep") { mktool_beep(@ARGV); last SWITCH; } + die("$prog: unknown option '$op'\n"); +} + +exit 0; + + + + +# +# mktool_execute +# +# Executes a command, returns exist status. +# Performs token special translation before execution. +# + +sub mktool_execute +{ + my $token = shift; + my @cmds = @_; + +# printf("mktool_execute: token = '$token'\n"); + foreach $cmd (@cmds) + { + #printf("mktool_execute: cmd = '$cmd'\n"); + $cmd =~ s/\#\#/$token/g; + if($cmd =~ /^-p/) + { + $cmd =~ s/^-p//; + printf("$cmd\n"); + } + else + { + system($cmd); + my $excode = ($? >> 8); + exit $excode if $excode; + } + } +} + + +$find_regexp = ""; +@find_cmd; + +# +# mktool_foreach +# +sub mktool_foreach +{ + if($_[0] eq "-find") + { + shift; + $find_dir = shift; + $find_regexp = shift; + @find_cmds = @_; + + if(!($find_dir =~ /^\//)) + { + $find_dir = cwd() . "/" . $find_dir; + } + find(\&_mktool_foreach_find_wanted, $find_dir); + } + else + { + my $subdir = 0; + if($_[0] eq "-subdir") + { + $subdir = 1; + shift; + } + + my @thingies = split(' ', shift); + + foreach $thingy (@thingies) + { + chdir $thingy unless $subdir == 0; + mktool_execute($thingy, @_); + chdir ".." unless $subdir == 0; + } + } +} + + + +sub _mktool_foreach_find_wanted +{ + my $expr = "\$File::Find::name =~ /\^$find_regexp\$/"; + + if(eval($expr)) + { + mktool_execute($File::Find::name, @find_cmds); + exit $excode if $excode; + } +} + + +# +# rm +# +# Removes a list of objects +# +sub mktool_rm +{ + my($f); + + foreach $f (@_) { + eval { rmtree($f) }; + if ($@) { + die "$prog $op: failed to remove $f: $@\n"; + } + } +} + +# +# md +# +# Makes a list of directories +# +sub mktool_md +{ + my($dir); + + foreach $dir (@_) { + $dir =~ s!/+$!!; + eval { mkpath($dir) }; + if ($@) { + die "$prog $op: failed to make directory $dir: $@\n"; + } + } +} + + +sub mktool_cp +{ + my($from, $to) = @_; + + if (@_ != 2) { + die "$prog $op: must have two arguments\n"; + } + copy($from, $to) || + die "$prog $op: failed to copy $from to $to: $!\n"; +} + +sub mktool_ln +{ + my($old, $new) = @_; + + if (@_ != 2) { + die "$prog $op: must have two arguments\n"; + } + link ($old, $new) || + die "$prog $op: failed to link $new to $old: $!\n"; +} + + +# @echo "$@ \\" > ${BLDDIR}/$(notdir $@) +# @if ($(DEPEND)) >> $(BLDDIR)/$(notdir $@); then \ +# exit 0; \ +# else \ +# rm -f ${BLDDIR}/$(notdir $@); \ +# exit 1; \ +# fi + +# $(MAKEDEP) "$@" "$(BLDDIR)/$(notdir $@)" "$(DEPEND)" + +sub mktool_makedep +{ + my ($source, $target, $cmd, $curdir) = @_; + my @result = `$cmd`; + my $sdk = $ENV{'SDK'}; + my $count; + my $tmp; + local $resultant; + +## Comman $cmd +#Command $cmd +print <-1) & ($count < 20) ) + { + $line=~s/\/\w+\/\.\.//; + # if we hit a major recursion, revert the line, report + # this to the output and drop out of the loop, but do + # continue, this should not halt generation + if($count++>19) + { + print "mktool.pl: could not process $line \n\n"; + print ":: curdir $curdir\n"; + print ":: target $target\n"; + print ":: cmd $cmd\n"; + $line=$tmp; + } + } + + # set all the paths to use the $SDK variable + $line =~ s/$ENV{'SDK'}/\$\{SDK\}/g; + $resultant=$resultant . $line; + } + + # some compilers return extra newlines + $resultant=~s/\n//g; + + # now clean up the result + $resultant=~s/\\/\\\n/g; + + mktool_md($dirName) unless (-d $dirName); + open (TARGET, ">$target") || + die("$prog $op: cannot open '$target' for writing: $!\n"); + print TARGET "$resultant\n"; + close(TARGET); + } +} + +sub mktool_echo +{ + print "@_\n"; +} + +sub mktool_beep +{ + -t STDOUT && defined $ENV{MAKEBEEP} && print "\007"; +} diff --git a/platform/broadcom/sonic-platform-modules-accton/.gitignore b/platform/broadcom/sonic-platform-modules-accton/.gitignore new file mode 100644 index 00000000000..7f287d53822 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/.gitignore @@ -0,0 +1,50 @@ +# Object files +*.o +*.ko +*.obj +*.elf + +# Precompiled Headers +*.gch +*.pch + +# Libraries +*.lib +*.a +*.la +*.lo + +# Shared objects (inc. Windows DLLs) +*.dll +*.so +*.so.* +*.dylib + +# Executables +*.exe +*.out +*.app +*.i*86 +*.x86_64 +*.hex + +# Debug files +*.dSYM/ +*.su + +# Kernel Module Compile Results +*.mod* +*.cmd +*.o.d +.tmp_versions/ +modules.order +Module.symvers +Mkfile.old +dkms.conf + +# Debian packaging +*.debhelper.log +*.postinst.debhelper +*.postrm.debhelper +*.prerm.debhelper +*.substvars diff --git a/platform/broadcom/sonic-platform-modules-accton/LICENSE b/platform/broadcom/sonic-platform-modules-accton/LICENSE new file mode 100644 index 00000000000..bc693f7a4c4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/LICENSE @@ -0,0 +1,16 @@ +Copyright (C) 2016 Microsoft, Inc +Copyright (C) 2017 Accton Technology Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/broadcom/sonic-platform-modules-accton/README.md b/platform/broadcom/sonic-platform-modules-accton/README.md new file mode 100644 index 00000000000..0ff20bb2d21 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/README.md @@ -0,0 +1 @@ +platform drivers of Accton products for the SONiC project diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/classes/fanutil.py new file mode 100755 index 00000000000..df2e511adef --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/classes/fanutil.py @@ -0,0 +1,90 @@ +#!/usr/bin/env python +# Copyright (c) 2019 Edgecore Networks Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. +# +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 10/24/2019:Jostar craete for as4630_54pe +# ------------------------------------------------------------------ + +try: + import os + import time + import logging + import glob + import commands + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + THERMAL_NUM_MAX = 4 + THERMAL_NUM_1_IDX = 1 + THERMAL_NUM_2_IDX = 2 + THERMAL_NUM_3_IDX = 3 + THERMAL_NUM_4_IDX = 4 + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + + thermal_sysfspath ={ + THERMAL_NUM_1_IDX: ["/sys/bus/i2c/devices/14-0048/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_2_IDX: ["/sys/bus/i2c/devices/24-004b/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_3_IDX: ["/sys/bus/i2c/devices/25-004a/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_4_IDX: ["/sys/class/hwmon/hwmon1/temp1_input"], + } + + def _get_thermal_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_MAX: + logging.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + content = val_file.readline().rstrip() + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + return 0 + + def get_num_thermals(self): + return self.THERMAL_NUM_MAX + + def get_size_path_map(self): + return len(self.thermal_sysfspath) + + def get_thermal_path(self, thermal_num): + return self.thermal_sysfspath[thermal_num][0] + +def main(): + thermal = ThermalUtil() + +if __name__ == '__main__': + main() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/classes/thermalutil.py new file mode 100755 index 00000000000..bd5530fd903 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/classes/thermalutil.py @@ -0,0 +1,90 @@ +#!/usr/bin/env python +# Copyright (c) 2019 Edgecore Networks Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. +# +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 10/24/2019:Jostar craete for as4630_54pe +# ------------------------------------------------------------------ + +try: + import os + import time + import logging + import glob + import commands + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + THERMAL_NUM_MAX = 4 + THERMAL_NUM_1_IDX = 1 + THERMAL_NUM_2_IDX = 2 + THERMAL_NUM_3_IDX = 3 + THERMAL_NUM_4_IDX = 4 + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + + thermal_sysfspath ={ + THERMAL_NUM_1_IDX: ["/sys/bus/i2c/devices/14-0048/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_2_IDX: ["/sys/bus/i2c/devices/24-004b/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_3_IDX: ["/sys/bus/i2c/devices/25-004a/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_4_IDX: ["/sys/class/hwmon/hwmon1/temp1_input"], + } + + def _get_thermal_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_MAX: + logging.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + content = val_file.readline().rstrip() + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + return 0 + + def get_num_thermals(self): + return self.THERMAL_NUM_MAX + + def get_size_path_map(self): + return len(self.thermal_sysfspath) + + def get_thermal_path(self, thermal_num): + return self.thermal_sysfspath[thermal_num][0] + +def main(): + thermal = ThermalUtil() + +if __name__ == '__main__': + main() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/Makefile new file mode 100755 index 00000000000..f845f2e17d8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/Makefile @@ -0,0 +1,19 @@ +ifneq ($(KERNELRELEASE),) +obj-m:= x86-64-accton-as4630-54pe-cpld.o x86-64-accton-as4630-54pe-psu.o \ + x86-64-accton-as4630-54pe-leds.o ym2651y.o + +else +ifeq (,$(KERNEL_SRC)) +#$(error KERNEL_SRC is not defined) +KVERSION=3.16.0-8-amd64 +KERNEL_DIR = /usr/src/linux-headers-$(KVERSION)/ +KERNELDIR:=$(KERNEL_DIR) +else +KERNELDIR:=$(KERNEL_SRC) +endif +PWD:=$(shell pwd) +default: + $(MAKE) -C $(KERNELDIR) M=$(PWD) modules +clean: + rm -rf *.o *.mod.o *.mod.o *.mod.c *.ko .*cmd .tmp_versions Module.markers Module.symvers modules.order +endif diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-cpld.c b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-cpld.c new file mode 100755 index 00000000000..5e25e824d41 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-cpld.c @@ -0,0 +1,1105 @@ +/* + * Copyright (C) Jostar yang + * + * This module supports the accton cpld that hold the channel select + * mechanism for other i2c slave devices, such as SFP. + * This includes the: + * Accton as4630_54pe CPLD + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ +#define FAN_DUTY_CYCLE_REG_MASK 0x1F +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 114 // R.P.M value = read value x3.79*60/2 + +#define NUM_THERMAL_SENSORS (3) /* Get sum of this number of sensors.*/ +#define THERMAL_SENSORS_DRIVER "lm75" +#define THERMAL_SENSORS_ADDRS {0x48, 0x4a, 0x4b} + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +enum cpld_type { + as4630_54pe_cpld, +}; +enum fan_id { + FAN1_ID, + FAN2_ID, + FAN3_ID, +}; + +static const u8 fan_reg[] = { + 0x87, /* fan status, fan direction */ + 0x1A, /* fan PWM(for fan1 ,fan2) */ + 0x1B, /* fan PWM(for fan1 ,fan2) */ + 0x88, /* front fan1 speed(rpm) */ + 0x89, /* front fan2 speed(rpm) */ + 0x8A, /* front fan3 speed(rpm) */ + 0x20, /*fan fault*/ +}; + +struct as4630_54pe_cpld_data { + enum cpld_type type; + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_fan_val[ARRAY_SIZE(fan_reg)]; /* Register value */ + int system_temp; /*In unit of mini-Celsius*/ + int sensors_found; +}; + + + +static const struct i2c_device_id as4630_54pe_cpld_id[] = { + { "as4630_54pe_cpld", as4630_54pe_cpld}, + { } +}; +MODULE_DEVICE_TABLE(i2c, as4630_54pe_cpld_id); + +#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index +#define TRANSCEIVER_TXDISABLE_ATTR_ID(index) MODULE_TXDISABLE_##index +#define TRANSCEIVER_RXLOS_ATTR_ID(index) MODULE_RXLOS_##index +#define TRANSCEIVER_TXFAULT_ATTR_ID(index) MODULE_TXFAULT_##index +#define FAN_SPEED_RPM_ATTR_ID(index) FAN_SPEED_RPM_##index +#define FAN_DIRECTION_ID(index) FAN_DIRECTION_##index +#define FAN_PRESENT_ATTR_ID(index) FAN_PRESENT_##index +#define FAN_FAULT_ATTR_ID(index) FAN_FAULT_##index + +enum as4630_54pe_cpld_sysfs_attributes { + CPLD_VERSION, + ACCESS, + /* transceiver attributes */ + TRANSCEIVER_RXLOS_ATTR_ID(49), + TRANSCEIVER_RXLOS_ATTR_ID(50), + TRANSCEIVER_RXLOS_ATTR_ID(51), + TRANSCEIVER_RXLOS_ATTR_ID(52), + TRANSCEIVER_TXFAULT_ATTR_ID(49), + TRANSCEIVER_TXFAULT_ATTR_ID(50), + TRANSCEIVER_TXFAULT_ATTR_ID(51), + TRANSCEIVER_TXFAULT_ATTR_ID(52), + TRANSCEIVER_PRESENT_ATTR_ID(49), + TRANSCEIVER_PRESENT_ATTR_ID(50), + TRANSCEIVER_PRESENT_ATTR_ID(51), + TRANSCEIVER_PRESENT_ATTR_ID(52), + TRANSCEIVER_PRESENT_ATTR_ID(53), + TRANSCEIVER_PRESENT_ATTR_ID(54), + TRANSCEIVER_TXDISABLE_ATTR_ID(49), + TRANSCEIVER_TXDISABLE_ATTR_ID(50), + TRANSCEIVER_TXDISABLE_ATTR_ID(51), + TRANSCEIVER_TXDISABLE_ATTR_ID(52), + FAN_PRESENT_ATTR_ID(1), + FAN_PRESENT_ATTR_ID(2), + FAN_PRESENT_ATTR_ID(3), + FAN_SPEED_RPM_ATTR_ID(1), + FAN_SPEED_RPM_ATTR_ID(2), + FAN_SPEED_RPM_ATTR_ID(3), + FAN_DIRECTION_ID(1), + FAN_DIRECTION_ID(2), + FAN_DIRECTION_ID(3), + FAN_FAULT_ATTR_ID(1), + FAN_FAULT_ATTR_ID(2), + FAN_FAULT_ATTR_ID(3), + FAN_DUTY_CYCLE_PERCENTAGE, +}; + +/* sysfs attributes for hwmon + */ +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +static int as4630_54pe_cpld_read_internal(struct i2c_client *client, u8 reg); +static int as4630_54pe_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value); + +/*fan sysfs*/ +static struct as4630_54pe_cpld_data *as4630_54pe_fan_update_device(struct device *dev); +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, char *buf); +//static ssize_t show_power(struct device *dev, struct device_attribute *da, + // char *buf); + + + +/* transceiver attributes */ +#define DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_status, NULL, MODULE_PRESENT_##index); \ + static SENSOR_DEVICE_ATTR(module_tx_disable_##index, S_IRUGO | S_IWUSR, show_status, set_tx_disable, MODULE_TXDISABLE_##index); \ + static SENSOR_DEVICE_ATTR(module_rx_los_##index, S_IRUGO, show_status, NULL, MODULE_RXLOS_##index); \ + static SENSOR_DEVICE_ATTR(module_tx_fault_##index, S_IRUGO, show_status, NULL, MODULE_TXFAULT_##index); + +#define DECLARE_SFP_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_present_##index.dev_attr.attr, \ + &sensor_dev_attr_module_tx_disable_##index.dev_attr.attr, \ + &sensor_dev_attr_module_rx_los_##index.dev_attr.attr, \ + &sensor_dev_attr_module_tx_fault_##index.dev_attr.attr + +#define DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_status, NULL, MODULE_PRESENT_##index); + +#define DECLARE_QSFP_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_present_##index.dev_attr.attr + + +#define DECLARE_FAN_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan_present_##index, S_IRUGO, fan_show_value, NULL, FAN_PRESENT_##index); \ + static SENSOR_DEVICE_ATTR(fan_fault_##index, S_IRUGO, fan_show_value, NULL, FAN_FAULT_##index); \ + static SENSOR_DEVICE_ATTR(fan_speed_rpm_##index, S_IRUGO, fan_show_value, NULL, FAN_SPEED_RPM_##index); \ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN_SPEED_RPM_##index);\ + static SENSOR_DEVICE_ATTR(fan_direction_##index, S_IRUGO, fan_show_value, NULL, FAN_DIRECTION_##index); + +#define DECLARE_FAN_ATTR(index) \ + &sensor_dev_attr_fan_present_##index.dev_attr.attr, \ + &sensor_dev_attr_fan_fault_##index.dev_attr.attr, \ + &sensor_dev_attr_fan_speed_rpm_##index.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_input.dev_attr.attr, \ + &sensor_dev_attr_fan_direction_##index.dev_attr.attr + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE); +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan_duty_cycle_percentage.dev_attr.attr + +#define DECLARE_FAN_SYSTEM_TEMP_SENSOR_DEV_ATTR() \ + static SENSOR_DEVICE_ATTR(sys_temp, S_IRUGO, get_sys_temp, NULL, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_SYSTEM_TEMP_ATTR() &sensor_dev_attr_sys_temp.dev_attr.attr + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS); + + + +/* transceiver attributes */ +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(49); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(50); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(51); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(52); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(53); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(54); +/* fan attributes */ +DECLARE_FAN_SENSOR_DEV_ATTR(1); +DECLARE_FAN_SENSOR_DEV_ATTR(2); +DECLARE_FAN_SENSOR_DEV_ATTR(3); +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(1); + +static struct attribute *as4630_54pe_cpld_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + DECLARE_SFP_TRANSCEIVER_ATTR(49), + DECLARE_SFP_TRANSCEIVER_ATTR(50), + DECLARE_SFP_TRANSCEIVER_ATTR(51), + DECLARE_SFP_TRANSCEIVER_ATTR(52), + DECLARE_QSFP_TRANSCEIVER_ATTR(53), + DECLARE_QSFP_TRANSCEIVER_ATTR(54), + DECLARE_FAN_ATTR(1), + DECLARE_FAN_ATTR(2), + DECLARE_FAN_ATTR(3), + DECLARE_FAN_DUTY_CYCLE_ATTR(1), + NULL +}; + +static const struct attribute_group as4630_54pe_cpld_group = { + .attrs = as4630_54pe_cpld_attributes, +}; + + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as4630_54pe_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0, revert = 0; + + switch (attr->index) + { + case MODULE_RXLOS_49 ... MODULE_RXLOS_50: + reg=0x5; + mask = 0x1<< (attr->index==MODULE_RXLOS_49?4:0); + break; + case MODULE_TXFAULT_49 ... MODULE_TXFAULT_50: + reg=0x5; + mask=0x1 << (attr->index==MODULE_TXFAULT_49?5:1); + break; + case MODULE_PRESENT_49 ... MODULE_PRESENT_50: + reg=0x5; + mask=0x1 << (attr->index==MODULE_PRESENT_49?6:2); + break; + case MODULE_TXDISABLE_49 ... MODULE_TXDISABLE_50: + reg=0x5; + mask=0x1 << (attr->index==MODULE_TXFAULT_49?7:3); + break; + + case MODULE_RXLOS_51 ... MODULE_RXLOS_52: + reg=0x6; + mask = 0x1<< (attr->index==MODULE_RXLOS_51?4:0); + break; + case MODULE_TXFAULT_51 ... MODULE_TXFAULT_52: + reg=0x6; + mask=0x1 << (attr->index==MODULE_TXFAULT_51?5:1); + break; + case MODULE_PRESENT_51 ... MODULE_PRESENT_52: + reg=0x6; + mask=0x1 << (attr->index==MODULE_PRESENT_51?6:2); + break; + case MODULE_TXDISABLE_51 ... MODULE_TXDISABLE_52: + reg=0x6; + mask=0x1 << (attr->index==MODULE_TXFAULT_51?7:3); + break; + case MODULE_PRESENT_53 ... MODULE_PRESENT_54: + reg=0x21; + mask=0x1 << (attr->index==MODULE_PRESENT_53?0:4); + break; + default: + return 0; + } + + if( attr->index >= MODULE_PRESENT_49 && attr->index <= MODULE_PRESENT_54 ) + { + revert = 1; + } + + mutex_lock(&data->update_lock); + status = as4630_54pe_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", revert ? !(status & mask) : !!(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as4630_54pe_cpld_data *data = i2c_get_clientdata(client); + long disable; + int status; + u8 reg = 0, mask = 0; + + status = kstrtol(buf, 10, &disable); + if (status) { + return status; + } + reg = 0x9; + switch (attr->index) + { + case MODULE_TXDISABLE_49 ... MODULE_TXDISABLE_50: + reg=0x5; + mask=0x1 << (attr->index==MODULE_TXFAULT_49?7:3); + break; + case MODULE_TXDISABLE_51 ... MODULE_TXDISABLE_52: + reg=0x6; + mask=0x1 << (attr->index==MODULE_TXFAULT_51?7:3); + break; + + default: + return 0; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as4630_54pe_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + /* Update tx_disable status */ + if (disable) { + status &= ~mask; + } + else { + status |= mask; + } + status = as4630_54pe_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct as4630_54pe_cpld_data *data = i2c_get_clientdata(client); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = as4630_54pe_cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static void as4630_54pe_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as4630_54pe_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, 0x1); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d\n", val); +} + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + reg_val &= FAN_DUTY_CYCLE_REG_MASK; + return ((u32)(reg_val) * 625)/ 100; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + return ((u32)duty_cycle * 100 / 625); +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + struct i2c_client *client = to_i2c_client(dev); + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0 || value > FAN_MAX_DUTY_CYCLE) + return -EINVAL; + + as4630_54pe_cpld_write_internal(client, fan_reg[1], duty_cycle_to_reg_val(value)); + as4630_54pe_cpld_write_internal(client, fan_reg[2], duty_cycle_to_reg_val(value)); + return count; +} + +static u8 reg_val_to_direction(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 1 : 0; +} + +static u8 reg_val_to_is_present(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 0 : 1; +} + +static u8 is_fan_fault(struct as4630_54pe_cpld_data *data, enum fan_id id) +{ + u8 ret = 1; + + if(id > FAN3_ID) + return 1; + /* Check if the speed of front or rear fan is ZERO, + */ + if (reg_val_to_speed_rpm(data->reg_fan_val[id+3])) + { + + ret = 0; + } + + return ret; +} + +/* Due to this struct is declared at lm75.c, it cannot be include + * under Sonic environment. I duplicate it from lm75.c. + */ +struct lm75_data { + struct i2c_client *client; + struct device *hwmon_dev; + struct thermal_zone_device *tz; + struct mutex update_lock; + u8 orig_conf; + u8 resolution; /* In bits, between 9 and 12 */ + u8 resolution_limits; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + unsigned long sample_time; /* In jiffies */ + s16 temp[3]; /* Register values, + 0 = input + 1 = max + 2 = hyst */ +}; + +/*Copied from lm75.c*/ +static inline long lm75_reg_to_mc(s16 temp, u8 resolution) +{ + return ((temp >> (16 - resolution)) * 1000) >> (resolution - 8); +} + +/*Get hwmon_dev from i2c_client, set hwmon_dev = NULL is failed.*/ +static struct device * get_hwmon_dev( + struct i2c_client *client) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + if(data) + { + if( data->valid == 1 && data->hwmon_dev) + { + return data->hwmon_dev; + } + + } + return NULL; +} + +/* To find hwmon index by opening hwmon under that i2c address. + */ +static int find_hwmon_index_by_FileOpen( + int bus_nr, + unsigned short addr, + int *index) +{ +#define MAX_HWMON_DEVICE (10) /* Find hwmon device in 0~10*/ + struct file *sfd; + char client_name[96]; + int i=0; + + do { + snprintf(client_name, sizeof(client_name), + "/sys/bus/i2c/devices/%d-%04x/hwmon/hwmon%d/temp1_input", + bus_nr, addr, i); + + sfd = filp_open(client_name, O_RDONLY, 0); + i++; + } while( IS_ERR(sfd) && i < MAX_HWMON_DEVICE); + + if (IS_ERR(sfd)) { + pr_err("Failed to open file(%s)#%d\r\n", client_name, __LINE__); + return -ENOENT; + } + filp_close(sfd, 0); + *index = i - 1; + return 0; + +#undef MAX_HWMON_DEVICE +} + +static int get_temp_file_path( + int bus_nr, unsigned short addr, + struct device *hwmon_dev + ,char *path, int max_len) +{ + + if(hwmon_dev && strlen(dev_name(hwmon_dev))) + { + snprintf(path, max_len, + "/sys/bus/i2c/devices/%d-%04x/hwmon/%s/temp1_input", + bus_nr, addr, dev_name(hwmon_dev)); + } + else + { + int i=0; + if(find_hwmon_index_by_FileOpen( bus_nr, addr, &i)) + { + return -EIO; + } + snprintf(path, max_len, + "/sys/bus/i2c/devices/%d-%04x/hwmon/hwmon%d/temp1_input", + bus_nr, addr, i); + } + + return 0; +} + +/*File read the dev file at user space.*/ +static int read_devfile_temp1_input( + struct device *dev, + int bus_nr, + unsigned short addr, + struct device *hwmon_dev, + int *miniCelsius) +{ + struct file *sfd; + char buffer[96]; + char devfile[96]; + int rc, status; + int rdlen, value; + mm_segment_t old_fs; + + rc = 0; + get_temp_file_path(bus_nr, addr, hwmon_dev, devfile, sizeof(devfile)); + sfd = filp_open(devfile, O_RDONLY, 0); + if (IS_ERR(sfd)) { + pr_err("Failed to open file(%s)#%d\r\n", devfile, __LINE__); + return -ENOENT; + } + dev_dbg(dev, "Found device:%s\n",devfile); + + if(!(sfd->f_op) || !(sfd->f_op->read) ) { + pr_err("file %s cann't readable ?\n",devfile); + return -ENOENT; + } + + old_fs = get_fs(); + set_fs(KERNEL_DS); + rdlen = sfd->f_op->read(sfd, buffer, sizeof(buffer), &sfd->f_pos); + if (rdlen == 0) { + pr_err( "File(%s) empty!\n", devfile); + rc = -EIO; + goto exit; + } + status = sscanf(buffer, "%d", &value); + if (status != 1) { + rc = -EIO; + goto exit; + } + *miniCelsius = value; + dev_dbg(dev,"found sensors: %d @i2c %d-%04x\n", value, bus_nr, addr); + +exit: + set_fs(old_fs); + filp_close(sfd, 0); + return rc; +} + +static u8 is_lm75_data_due(struct i2c_client *client) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + if (time_after(jiffies, data->last_updated + data->sample_time)) + { + return 1; + } + return 0; +} +static int get_lm75_temp(struct i2c_client *client, int *miniCelsius) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + *miniCelsius = lm75_reg_to_mc(data->temp[0], data->resolution); + + return 0; +} + +static bool lm75_addr_mached(unsigned short addr) +{ + int i; + unsigned short addrs[] = THERMAL_SENSORS_ADDRS; + + for (i = 0; i < ARRAY_SIZE(addrs); i++) + { + if( addr == addrs[i]) + return 1; + } + return 0; +} + +static int _find_lm75_device(struct device *dev, void *data) +{ + struct device_driver *driver; + struct as4630_54pe_cpld_data *prv = data; + char *driver_name = THERMAL_SENSORS_DRIVER; + + driver = dev->driver; + if (driver && driver->name && + strcmp(driver->name, driver_name) == 0) + { + struct i2c_client *client; + client = to_i2c_client(dev); + if (client) + { + /*cannot use "struct i2c_adapter *adap = to_i2c_adapter(dev);"*/ + struct i2c_adapter *adap = client->adapter; + int miniCelsius = 0; + + if (! lm75_addr_mached(client->addr)) + { + return 0; + } + + if (!adap) { + return -ENXIO; + } + + /* If the data is not updated, read them from devfile + to drive them updateing data from chip.*/ + if (is_lm75_data_due(client)) + { + struct device *hwmon_dev; + + hwmon_dev = get_hwmon_dev(client); + if(0 == read_devfile_temp1_input(dev, adap->nr, + client->addr, hwmon_dev, &miniCelsius)) + { + prv->system_temp += miniCelsius; + prv->sensors_found++; + } + + } + else + { + get_lm75_temp(client, &miniCelsius); + prv->system_temp += miniCelsius; + prv->sensors_found++; + + } + } + } + return 0; +} + +/*Find all lm75 devices and return sum of temperatures.*/ +static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + ssize_t ret = 0; + struct as4630_54pe_cpld_data *data = as4630_54pe_fan_update_device(dev); + + data->system_temp=0; + data->sensors_found=0; + i2c_for_each_dev(data, _find_lm75_device); + if (NUM_THERMAL_SENSORS != data->sensors_found) + { + dev_dbg(dev,"only %d of %d temps are found\n", + data->sensors_found, NUM_THERMAL_SENSORS); + data->system_temp = INT_MAX; + } + ret = sprintf(buf, "%d\n",data->system_temp); + return ret; +} + +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 duty_cycle; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as4630_54pe_cpld_data *data = as4630_54pe_fan_update_device(dev); + ssize_t ret = 0; + + if (data->valid) { + switch (attr->index) + { + case FAN_PRESENT_1: + case FAN_PRESENT_2: + case FAN_PRESENT_3: + ret = sprintf(buf, "%d\n", + reg_val_to_is_present(data->reg_fan_val[0], + attr->index - FAN_PRESENT_1)); + break; + case FAN_DUTY_CYCLE_PERCENTAGE: + duty_cycle = reg_val_to_duty_cycle(data->reg_fan_val[1]); + ret = sprintf(buf, "%u\n", duty_cycle); + break; + case FAN_SPEED_RPM_1: + case FAN_SPEED_RPM_2: + case FAN_SPEED_RPM_3: + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_fan_val[attr->index-FAN_SPEED_RPM_1+3])); + break; + case FAN_FAULT_1: + case FAN_FAULT_2: + case FAN_FAULT_3: + ret = sprintf(buf, "%d\n", is_fan_fault(data, attr->index - FAN_FAULT_1)); + break; + case FAN_DIRECTION_1: + case FAN_DIRECTION_2: + case FAN_DIRECTION_3: + ret = sprintf(buf, "%d\n", + reg_val_to_direction(data->reg_fan_val[0], + attr->index - FAN_DIRECTION_1)); + break; + default: + break; + } + } + + return ret; +} + +static struct as4630_54pe_cpld_data *as4630_54pe_fan_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as4630_54pe_cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + dev_dbg(&client->dev, "Starting as4630_54pe_fan update\n"); + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_fan_val); i++) { + int status = as4630_54pe_cpld_read_internal(client, fan_reg[i]); + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + dev_dbg(&client->dev, "reg 0x%x, err %d\n", fan_reg[i], status); + return data; + } + else { + data->reg_fan_val[i] = status & 0xff; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +/* +static ssize_t show_power(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as4630_54pe_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0; + + reg=0xc; + mask=0x2; + mutex_lock(&data->update_lock); + status = as4630_54pe_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", !(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} +*/ +/* + * I2C init/probing/exit functions + */ +static int as4630_54pe_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + struct as4630_54pe_cpld_data *data; + int ret = -ENODEV; +// int status; + const struct attribute_group *group = NULL; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + goto exit; + + data = kzalloc(sizeof(struct as4630_54pe_cpld_data), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->type = id->driver_data; + + /* Register sysfs hooks */ + switch (data->type) + { + case as4630_54pe_cpld: + group = &as4630_54pe_cpld_group; + break; + default: + break; + } + + if (group) + { + ret = sysfs_create_group(&client->dev.kobj, group); + if (ret) { + goto exit_free; + } + } + + as4630_54pe_cpld_add_client(client); + + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + ret = PTR_ERR(data->hwmon_dev); + goto exit_free; + } + + + return 0; + +exit_free: + kfree(data); +exit: + return ret; +} + +static int as4630_54pe_cpld_remove(struct i2c_client *client) +{ + struct as4630_54pe_cpld_data *data = i2c_get_clientdata(client); + const struct attribute_group *group = NULL; + + as4630_54pe_cpld_remove_client(client); + + /* Remove sysfs hooks */ + switch (data->type) + { + case as4630_54pe_cpld: + group = &as4630_54pe_cpld_group; + break; + default: + break; + } + + if (group) { + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, group); + } + + + kfree(data); + + return 0; +} + +static int as4630_54pe_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int as4630_54pe_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +int as4630_54pe_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as4630_54pe_cpld_read_internal(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as4630_54pe_cpld_read); + +int as4630_54pe_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as4630_54pe_cpld_write_internal(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as4630_54pe_cpld_write); + +static struct i2c_driver as4630_54pe_cpld_driver = { + .driver = { + .name = "as4630_54pe_cpld", + .owner = THIS_MODULE, + }, + .probe = as4630_54pe_cpld_probe, + .remove = as4630_54pe_cpld_remove, + .id_table = as4630_54pe_cpld_id, +}; + +static int __init as4630_54pe_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as4630_54pe_cpld_driver); +} + +static void __exit as4630_54pe_cpld_exit(void) +{ + i2c_del_driver(&as4630_54pe_cpld_driver); +} + +MODULE_AUTHOR("Jostar Yang "); +MODULE_DESCRIPTION("Accton I2C CPLD driver"); +MODULE_LICENSE("GPL"); + +module_init(as4630_54pe_cpld_init); +module_exit(as4630_54pe_cpld_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-leds.c b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-leds.c new file mode 100755 index 00000000000..34c22fd82aa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-leds.c @@ -0,0 +1,579 @@ +/* + * A LED driver for the accton_as4630_54pe_led + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +extern int as4630_54pe_cpld_read (unsigned short cpld_addr, u8 reg); +extern int as4630_54pe_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +#define DRVNAME "accton_as4630_54pe_led" + +struct accton_as4630_54pe_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[2]; /* only 1 register*/ +}; + +static struct accton_as4630_54pe_led_data *ledctl = NULL; + +/* LED related data + */ + +#define LED_CNTRLER_I2C_ADDRESS (0x60) + +#define LED_TYPE_DIAG_REG_MASK (0x20|0x40|0x80) +#define LED_MODE_DIAG_GREEN_VALUE (0x20) +#define LED_MODE_DIAG_GREEN_BLINK_VALUE (0x60) +#define LED_MODE_DIAG_AMBER_VALUE (0x80) /*It's yellow actually. Green+Red=Yellow*/ +#define LED_MODE_DIAG_OFF_VALUE (0x0) + +#define LED_TYPE_PRI_REG_MASK (0x8|0x4) +#define LED_MODE_PRI_GREEN_VALUE 0x4 +#define LED_MODE_PRI_AMBER_VALUE 0x8 +#define LED_MODE_PRI_OFF_VALUE 0x0 + +#define LED_TYPE_POE_REG_MASK (0x2|0x1) +#define LED_MODE_POE_GREEN_VALUE 0x1 +#define LED_MODE_POE_AMBER_VALUE 0x2 +#define LED_MODE_POE_OFF_VALUE 0x0 + +#define LED_TYPE_STK1_REG_MASK 0x20 +#define LED_MODE_STK1_GREEN_VALUE 0x0 +#define LED_MODE_STK1_OFF_VALUE 0x20 + +#define LED_TYPE_STK2_REG_MASK 0x10 +#define LED_MODE_STK2_GREEN_VALUE 0x0 +#define LED_MODE_STK2_OFF_VALUE 0x10 + +#define LED_TYPE_FAN_REG_MASK (0x20|0x10) +#define LED_MODE_FAN_AMBER_VALUE 0x20 +#define LED_MODE_FAN_GREEN_VALUE 0x10 +#define LED_MODE_FAN_OFF_VALUE (0x0) + +#define LED_TYPE_PSU2_REG_MASK (0x8|0x4) +#define LED_MODE_PSU2_AMBER_VALUE 0x8 +#define LED_MODE_PSU2_GREEN_VALUE 0x4 +#define LED_MODE_PSU2_OFF_VALUE (0x0) + +#define LED_TYPE_PSU1_REG_MASK (0x2|0x1) +#define LED_MODE_PSU1_AMBER_VALUE 0x2 +#define LED_MODE_PSU1_GREEN_VALUE 0x1 +#define LED_MODE_PSU1_OFF_VALUE (0x0) + +enum led_type { + LED_TYPE_DIAG, + LED_TYPE_PRI, + LED_TYPE_POE, + LED_TYPE_STK1, + LED_TYPE_STK2, + LED_TYPE_FAN, + LED_TYPE_PSU1, + LED_TYPE_PSU2 +}; + +struct led_reg { + u32 types; + u8 reg_addr; +}; + +static const struct led_reg led_reg_map[] = { + {(1<update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as4630_54pe_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = accton_as4630_54pe_led_read_value(led_reg_map[i].reg_addr); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg_map[i].reg_addr, status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as4630_54pe_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + enum led_type type) +{ + int reg_val; + u8 reg ; + mutex_lock(&ledctl->update_lock); + + if( !accton_getLedReg(type, ®)) + { + dev_dbg(&ledctl->pdev->dev, "Not match item for %d.\n", type); + } + + + reg_val = accton_as4630_54pe_led_read_value(reg); + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + + accton_as4630_54pe_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + + +static void accton_as4630_54pe_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as4630_54pe_led_set(led_cdev, led_light_mode, LED_TYPE_DIAG); +} + +static enum led_brightness accton_as4630_54pe_led_diag_get(struct led_classdev *cdev) +{ + accton_as4630_54pe_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void accton_as4630_54pe_led_pri_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as4630_54pe_led_set(led_cdev, led_light_mode, LED_TYPE_PRI); +} + +static enum led_brightness accton_as4630_54pe_led_pri_get(struct led_classdev *cdev) +{ + accton_as4630_54pe_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PRI, ledctl->reg_val[0]); +} + +static void accton_as4630_54pe_led_poe_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as4630_54pe_led_set(led_cdev, led_light_mode, LED_TYPE_POE); +} + +static enum led_brightness accton_as4630_54pe_led_poe_get(struct led_classdev *cdev) +{ + accton_as4630_54pe_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_POE, ledctl->reg_val[1]); +} + + +static void accton_as4630_54pe_led_stk1_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as4630_54pe_led_set(led_cdev, led_light_mode, LED_TYPE_STK1); +} + +static enum led_brightness accton_as4630_54pe_led_stk1_get(struct led_classdev *cdev) +{ + accton_as4630_54pe_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_STK1, ledctl->reg_val[1]); +} + +static void accton_as4630_54pe_led_stk2_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as4630_54pe_led_set(led_cdev, led_light_mode, LED_TYPE_STK2); +} + +static enum led_brightness accton_as4630_54pe_led_stk2_get(struct led_classdev *cdev) +{ + accton_as4630_54pe_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_STK2, ledctl->reg_val[1]); +} + +static void accton_as4630_54pe_led_fan_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as4630_54pe_led_set(led_cdev, led_light_mode, LED_TYPE_FAN); +} + +static enum led_brightness accton_as4630_54pe_led_fan_get(struct led_classdev *cdev) +{ + accton_as4630_54pe_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_FAN, ledctl->reg_val[0]); +} + +static void accton_as4630_54pe_led_psu1_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as4630_54pe_led_set(led_cdev, led_light_mode, LED_TYPE_PSU1); +} + +static enum led_brightness accton_as4630_54pe_led_psu1_get(struct led_classdev *cdev) +{ + accton_as4630_54pe_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU1, ledctl->reg_val[0]); +} + +static void accton_as4630_54pe_led_psu2_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as4630_54pe_led_set(led_cdev, led_light_mode, LED_TYPE_PSU2); +} + +static enum led_brightness accton_as4630_54pe_led_psu2_get(struct led_classdev *cdev) +{ + accton_as4630_54pe_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU2, ledctl->reg_val[0]); +} + +static struct led_classdev accton_as4630_54pe_leds[] = { + [LED_TYPE_DIAG] = { + .name = "diag", + .default_trigger = "unused", + .brightness_set = accton_as4630_54pe_led_diag_set, + .brightness_get = accton_as4630_54pe_led_diag_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_GREEN, + }, + [LED_TYPE_PRI] = { + .name = "pri", + .default_trigger = "unused", + .brightness_set = accton_as4630_54pe_led_pri_set, + .brightness_get = accton_as4630_54pe_led_pri_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AMBER, + }, + [LED_TYPE_POE] = { + .name = "poe", + .default_trigger = "unused", + .brightness_set = accton_as4630_54pe_led_poe_set, + .brightness_get = accton_as4630_54pe_led_poe_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AMBER, + }, + [LED_TYPE_STK1] = { + .name = "stk1", + .default_trigger = "unused", + .brightness_set = accton_as4630_54pe_led_stk1_set, + .brightness_get = accton_as4630_54pe_led_stk1_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_GREEN, + }, + [LED_TYPE_STK2] = { + .name = "stk2", + .default_trigger = "unused", + .brightness_set = accton_as4630_54pe_led_stk2_set, + .brightness_get = accton_as4630_54pe_led_stk2_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_GREEN, + }, + [LED_TYPE_FAN] = { + .name = "fan", + .default_trigger = "unused", + .brightness_set = accton_as4630_54pe_led_fan_set, + .brightness_get = accton_as4630_54pe_led_fan_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU1] = { + .name = "psu1", + .default_trigger = "unused", + .brightness_set = accton_as4630_54pe_led_psu1_set, + .brightness_get = accton_as4630_54pe_led_psu1_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "psu2", + .default_trigger = "unused", + .brightness_set = accton_as4630_54pe_led_psu2_set, + .brightness_get = accton_as4630_54pe_led_psu2_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, +}; + +static int accton_as4630_54pe_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as4630_54pe_leds); i++) { + led_classdev_suspend(&accton_as4630_54pe_leds[i]); + } + + return 0; +} + +static int accton_as4630_54pe_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as4630_54pe_leds); i++) { + led_classdev_resume(&accton_as4630_54pe_leds[i]); + } + + return 0; +} + +static int accton_as4630_54pe_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(accton_as4630_54pe_leds); i++) { + ret = led_classdev_register(&pdev->dev, &accton_as4630_54pe_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(accton_as4630_54pe_leds)) { + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&accton_as4630_54pe_leds[i]); + } + } + + return ret; +} + +static int accton_as4630_54pe_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(accton_as4630_54pe_leds); i++) { + led_classdev_unregister(&accton_as4630_54pe_leds[i]); + } + + return 0; +} + +static struct platform_driver accton_as4630_54pe_led_driver = { + .probe = accton_as4630_54pe_led_probe, + .remove = accton_as4630_54pe_led_remove, + .suspend = accton_as4630_54pe_led_suspend, + .resume = accton_as4630_54pe_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as4630_54pe_led_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as4630_54pe_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct accton_as4630_54pe_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as4630_54pe_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&accton_as4630_54pe_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as4630_54pe_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&accton_as4630_54pe_led_driver); + kfree(ledctl); +} + +module_init(accton_as4630_54pe_led_init); +module_exit(accton_as4630_54pe_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as4630_54pe_led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-psu.c b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-psu.c new file mode 100755 index 00000000000..798a5656410 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-psu.c @@ -0,0 +1,320 @@ +/* + * An hwmon driver for accton as4630_54pe Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_MODEL_NAME 20 +#define MAX_SERIAL_NUMBER 18 + +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_string(struct device *dev, struct device_attribute *da, char *buf); +static int as4630_54pe_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as4630_54pe_cpld_read(unsigned short cpld_addr, u8 reg); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x50, 0x51, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as4630_54pe_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[MAX_MODEL_NAME]; /* Model name, read from eeprom */ + char serial_number[MAX_SERIAL_NUMBER]; +}; + +static struct as4630_54pe_psu_data *as4630_54pe_psu_update_device(struct device *dev); + +enum as4630_54pe_psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD, + PSU_SERIAL_NUMBER +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_string, NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu_serial_number, S_IRUGO, show_string, NULL, PSU_SERIAL_NUMBER); + + +static struct attribute *as4630_54pe_psu_attributes[] = { + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + &sensor_dev_attr_psu_serial_number.dev_attr.attr, + NULL +}; + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as4630_54pe_psu_data *data = as4630_54pe_psu_update_device(dev); + u8 status = 0; + + //printk("data->status=0x%x, attr->index=%d,data->index=%d \n", data->status, attr->index, data->index); + if (attr->index == PSU_PRESENT) { + if(data->index==0) + status = !( (data->status >> 5) & 0x1); + else + status = !( (data->status >> 1) & 0x1); + } + else { /* PSU_POWER_GOOD */ + if(data->index==0) + status = ( (data->status >> 6) & 0x1); + else + status = ( (data->status >> 2) & 0x1); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_string(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as4630_54pe_psu_data *data = as4630_54pe_psu_update_device(dev); + char *ptr = NULL; + + if (!data->valid) { + return -EIO; + } + + switch (attr->index) { + case PSU_MODEL_NAME: + ptr = data->model_name; + break; + case PSU_SERIAL_NUMBER: + ptr = data->serial_number; + break; + default: + return -EINVAL; + } + + return sprintf(buf, "%s\n", ptr); +} + +static const struct attribute_group as4630_54pe_psu_group = { + .attrs = as4630_54pe_psu_attributes, +}; + +static int as4630_54pe_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as4630_54pe_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as4630_54pe_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as4630_54pe_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as4630_54pe_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as4630_54pe_psu_remove(struct i2c_client *client) +{ + struct as4630_54pe_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as4630_54pe_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as4630_54pe_psu1, + as4630_54pe_psu2 +}; + +static const struct i2c_device_id as4630_54pe_psu_id[] = { + { "as4630_54pe_psu1", as4630_54pe_psu1 }, + { "as4630_54pe_psu2", as4630_54pe_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as4630_54pe_psu_id); + +static struct i2c_driver as4630_54pe_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as4630_54pe_psu", + }, + .probe = as4630_54pe_psu_probe, + .remove = as4630_54pe_psu_remove, + .id_table = as4630_54pe_psu_id, + .address_list = normal_i2c, +}; + +static int as4630_54pe_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = 0; + int retry_count = 5; + + while (retry_count) { + retry_count--; + + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) { + msleep(10); + continue; + } + + if (unlikely(result != data_len)) { + result = -EIO; + msleep(10); + continue; + } + + result = 0; + break; + } + + return result; +} + +static struct as4630_54pe_psu_data *as4630_54pe_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as4630_54pe_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status; + int power_good = 0; + + dev_dbg(&client->dev, "Starting as4630_54pe update\n"); + + /* Read psu status */ + status = as4630_54pe_cpld_read(0x60, 0x22); + //printk("status=0x%x in %s\n", status, __FUNCTION__); + if (status < 0) { + dev_dbg(&client->dev, "cpld reg 0x60 err %d\n", status); + } + else { + data->status = status; + } + + /* Read model name */ + memset(data->model_name, 0, sizeof(data->model_name)); + memset(data->serial_number, 0, sizeof(data->serial_number)); + power_good = (data->status >> (3-data->index) & 0x1); + + if (power_good) { + status = as4630_54pe_psu_read_block(client, 0x20, data->model_name, + ARRAY_SIZE(data->model_name)-1); + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x)\n", client->addr); + printk("unable to read model name from (0x%x)\n", client->addr); + } + else { + data->model_name[ARRAY_SIZE(data->model_name)-1] = '\0'; + + } + /* Read from offset 0x2e ~ 0x3d (16 bytes) */ + status = as4630_54pe_psu_read_block(client, 0x35,data->serial_number, MAX_SERIAL_NUMBER); + if (status < 0) + { + data->serial_number[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x) offset(0x2e)\n", client->addr); + printk("unable to read model name from (0x%x) offset(0x2e)\n", client->addr); + } + data->serial_number[MAX_SERIAL_NUMBER-1]='\0'; + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(as4630_54pe_psu_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as4630_54pe_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/ym2651y.c new file mode 120000 index 00000000000..f4d67640ccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/ym2651y.c @@ -0,0 +1 @@ +../../common/modules/ym2651y.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/service/as4630-54pe-platform-monitor-fan.service b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/service/as4630-54pe-platform-monitor-fan.service new file mode 100755 index 00000000000..9f562d2a05e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/service/as4630-54pe-platform-monitor-fan.service @@ -0,0 +1,16 @@ +[Unit] +Description=Accton AS4630-54PE Platform Monitoring FAN service +Before=pmon.service +After=as4630-54pe-platform-monitor.service +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/accton_as4630_54pe_monitor_fan.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/service/as4630-54pe-platform-monitor-psu.service b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/service/as4630-54pe-platform-monitor-psu.service new file mode 100755 index 00000000000..28d6013aa19 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/service/as4630-54pe-platform-monitor-psu.service @@ -0,0 +1,16 @@ +[Unit] +Description=Accton AS4630-54PE Platform Monitoring PSU service +Before=pmon.service +After=as4630-54pe-platform-monitor.service +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/accton_as4630_54pe_monitor_psu.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/service/as4630-54pe-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/service/as4630-54pe-platform-monitor.service new file mode 100755 index 00000000000..8ed60fca95f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/service/as4630-54pe-platform-monitor.service @@ -0,0 +1,17 @@ +[Unit] +Description=Accton AS4630-54PE Platform Monitoring service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/accton_as4630_54pe_util.py install +ExecStart=/usr/local/bin/accton_as4630_54pe_monitor.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/setup.py b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/setup.py new file mode 100755 index 00000000000..34e6bb59de5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as4630_54pe', + version='1.0', + description='Module to initialize Accton AS4630-54PE platforms', + + packages=['as4630_54pe'], + package_dir={'as4630_54pe': 'as4630-54pe/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/README b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/README new file mode 100755 index 00000000000..f656d2b0a85 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/README @@ -0,0 +1,67 @@ +Copyright (C) 2019 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +All Linux kernel code is licensed under the GPLv1. All other code is +licensed under the GPLv3. Please see the LICENSE file for copies of +both licenses. + +The code for integacting with Accton AS4630-54pe has 2 parts, +kernel drivers and operational script. +The kernel drivers of peripherals are under module/ directory. +1. These drivers are at module dir. +2. A operational script, accton_as4630_util.py, for device initializatian and + peripheral accessing should be installed at /usr/bin. + Run "accton_as4630_util.py install" to install drivers. + +To initialize the system, run "accton_as4630_util.py install". +To clean up the drivers & devices, run "accton_as4630_util.py clean". +To dump information of sensors, run "accton_as4630_util.py show". +To dump SFP EEPROM, run "accton_as4630_util.py sff". +To set fan speed, run "accton_as4630_util.py set fan". +To enable/disable SFP emission, run "accton_as4630_util.py set sfp". +To set system LEDs' color, run "accton_as4630_util.py set led" +For more information, run "accton_as4630_util.py --help". + +==================================================================== +Besides applying accton_as4630_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +System LED: + There are 5 system LEDs at the lower-left corner of front panel. + They are loc, diag, fan, ps1, and ps2. + The sysfs interface color mappings are as follows: + Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + But not all colors are available for each LED. + +Fan Control: + There are 10 fans inside 5 fan modules. + All fans share 1 duty setting, ranged from 0~100. + +Thermal sensers: + 3 temperature sensors are controlled by the lm75 kernel modules. + +PSUs: + There 2 power supplies slot at the left/right side of the back. + Once if a PSU is not plugged, the status of it is shown failed. + +There are 48 SFP+ and 6 QSFP modules are equipped. +Before operating on PSU and QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/accton_as4630_54pe_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/accton_as4630_54pe_monitor.py new file mode 100755 index 00000000000..6dbf5c2cc72 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/accton_as4630_54pe_monitor.py @@ -0,0 +1,269 @@ +#!/usr/bin/env python +# -*- coding: utf-8 -* +# Copyright (c) 2019 Edgecore Networks Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. +# +# HISTORY: +# mm/dd/yyyy (A.D.)# +# 10/24/2019:Jostar create for as4630_54pe thermal plan +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time + import traceback + import commands + from tabulate import tabulate + from as4630_54pe.fanutil import FanUtil + from as4630_54pe.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as4630_54pe_monitor' + +global log_file +global log_level + + + + + +# Temperature Policy +# If any fan fail , please set fan speed register to 16 +# The max value of fan speed register is 14 +# LM77(48)+LM75(4B)+LM75(4A) > 140, Set 10 +# LM77(48)+LM75(4B)+LM75(4A) > 150, Set 12 +# LM77(48)+LM75(4B)+LM75(4A) > 160, Set 14 +# LM77(48)+LM75(4B)+LM75(4A) < 140, Set 8 +# LM77(48)+LM75(4B)+LM75(4A) < 150, Set 10 +# LM77(48)+LM75(4B)+LM75(4A) < 160, Set 12 +# Reset DUT:LM77(48)>=70C +# +class switch(object): + def __init__(self, value): + self.value = value + self.fall = False + + def __iter__(self): + """Return the match method once, then stop""" + yield self.match + raise StopIteration + + def match(self, *args): + """Indicate whether or not to enter a case suite""" + if self.fall or not args: + return True + elif self.value in args: # changed for v1.5, see below + self.fall = True + return True + else: + return False + +fan_policy_state=0 +fan_fail=0 +alarm_state = 0 #0->default or clear, 1-->alarm detect +test_temp = 0 +test_temp_list = [0, 0, 0] +temp_test_data=0 +test_temp_revert=0 +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + # static temp var + temp = 0 + new_pwm = 0 + pwm=0 + ori_pwm = 0 + default_pwm=0x4 + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = handler = logging.handlers.SysLogHandler(address = '/dev/log') + sys_handler.setLevel(logging.WARNING) + logging.getLogger('').addHandler(sys_handler) + + def get_state_from_fan_policy(self, temp, policy): + state=0 + for i in range(0, len(policy)): + if (temp > policy[i][2]): #temp_down + if temp <= policy[i][3]: #temp_up + state =i + + return state + + def manage_fans(self): + global fan_policy_state + global fan_fail + global test_temp + global test_temp_list + global alarm_state + global temp_test_data + global test_temp_revert + LEVEL_FAN_MIN=0 + LEVEL_FAN_NORMAL=1 + LEVEL_FAN_MID=2 + LEVEL_FAN_HIGH=3 + LEVEL_TEMP_CRITICAL=4 + fan_policy = { + LEVEL_FAN_MIN: [50, 8, 0, 140000], + LEVEL_FAN_NORMAL: [62, 10, 140000, 150000], + LEVEL_FAN_MID: [75, 12, 150000, 160000], + LEVEL_FAN_HIGH: [88, 14, 160000, 240000], + LEVEL_TEMP_CRITICAL: [100, 16, 240000, 300000], + } + temp = [0, 0 , 0] + temp_fail=0 + thermal = ThermalUtil() + fan = FanUtil() + ori_duty_cycle=fan.get_fan_duty_cycle() + new_duty_cycle=0 + + if test_temp==0: + for i in range(0,3): + temp[i]=thermal._get_thermal_val(i+1) + if temp[i]==0 or temp[i]==None: + temp_fail=1 + logging.warning("Get temp-%d fail", i); + return False + else: + if test_temp_revert==0: + temp_test_data=temp_test_data+2000 + else: + temp_test_data=temp_test_data-2000 + + for i in range(0,3): + temp[i]=test_temp_list[i]+temp_test_data + fan_fail=0 + + temp_val=0 + for i in range(0,3): + if temp[i]==None: + break + temp_val+=temp[i] + + #Check Fan status + for i in range (fan.FAN_NUM_1_IDX, fan.FAN_NUM_ON_MAIN_BROAD+1): + if fan.get_fan_status(i)==0: + new_pwm=100 + logging.warning('Fan_%d fail, set pwm to 100',i) + if test_temp==0: + fan_fail=1 + fan.set_fan_duty_cycle(new_pwm) + break + else: + fan_fail=0 + + ori_state=fan_policy_state + fan_policy_state=self.get_state_from_fan_policy(temp_val, fan_policy) + + if fan_policy_state > LEVEL_TEMP_CRITICAL or fan_policy_state < LEVEL_FAN_MIN: + logging.error("Get error fan current_state\n"); + return 0 + + #Decision : Decide new fan pwm percent. + if fan_fail==0 and ori_duty_cycle!=fan_policy[fan_policy_state][0]: + new_duty_cycle = fan_policy[fan_policy_state][0]; + fan.set_fan_duty_cycle(new_duty_cycle) + + if temp[0] >= 70000: #LM75-48 + #critical case*/ + logging.critical('Alarm-Critical for temperature critical is detected, reset DUT') + cmd_str="i2cset -y -f 3 0x60 0x4 0xE4" + time.sleep(2); + status, output = commands.getstatusoutput(cmd_str) + + #logging.debug('ori_state=%d, current_state=%d, temp_val=%d\n\n',ori_state, fan_policy_state, temp_val) + + if ori_state < LEVEL_FAN_HIGH: + if fan_policy_state >= LEVEL_FAN_HIGH: + if alarm_state==0: + logging.warning('Alarm for temperature high is detected') + alarm_state=1 + + if fan_policy_state < LEVEL_FAN_MID: + if alarm_state==1: + logging.info('Alarm for temperature high is cleared') + alarm_state=0 + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + global test_temp + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdlt:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + if sys.argv[1]== '-t': + if len(sys.argv)!=5: + print "temp test, need input three temp" + return 0 + + i=0 + for x in range(2, 5): + test_temp_list[i]= int(sys.argv[x])*1000 + i=i+1 + test_temp = 1 + log_level = logging.DEBUG + print test_temp_list + + fan = FanUtil() + fan.set_fan_duty_cycle(50) + print "set default fan speed to 50%" + monitor = device_monitor(log_file, log_level) + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(10) #10sec + +if __name__ == '__main__': + main(sys.argv[1:]) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/accton_as4630_54pe_monitor_fan.py b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/accton_as4630_54pe_monitor_fan.py new file mode 100755 index 00000000000..11453818b04 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/accton_as4630_54pe_monitor_fan.py @@ -0,0 +1,191 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 5/15/2019: Jostar create for as4630-54pe +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as4630_54pe_monitor_fan' + +global log_file +global log_level + + +class switch(object): + def __init__(self, value): + self.value = value + self.fall = False + + def __iter__(self): + """Return the match method once, then stop""" + yield self.match + raise StopIteration + + def match(self, *args): + """Indicate whether or not to enter a case suite""" + if self.fall or not args: + return True + elif self.value in args: # changed for v1.5, see below + self.fall = True + return True + else: + return False + + +fan_state=[2, 2, 2, 2] #init state=2, insert=1, remove=0 +fan_status_state=[2, 2, 2, 2] #init state=2, fault=1, normal=0 +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + + def __init__(self, log_file, log_level): + + self.fan_num = 3 + self.fan_path = "/sys/bus/i2c/devices/3-0060/" + self.present = { + 0: "fan_present_1", + 1: "fan_present_2", + 2: "fan_present_3", + } + + self.fault = { + 0: "fan_fault_1", + 1: "fan_fault_2", + 2: "fan_fault_3", + } + + + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(logging.DEBUG) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + #sys_handler.setLevel(logging.WARNING) + sys_handler.setLevel(logging.INFO) + logging.getLogger('').addHandler(sys_handler) + + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_fan(self): + + FAN_STATE_REMOVE = 0 + FAN_STATE_INSERT = 1 + + FAN_STATUS_FAULT = 1 + FAN_STATUS_NORMAL = 0 + + global fan_state + global fan_status_state + + for idx in range (0, self.fan_num): + node = self.fan_path + self.present[idx] + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if fan_state[idx]!=1: + fan_state[idx]=FAN_STATE_INSERT + logging.info("FAN-%d present is detected", idx+1); + else: + if fan_state[idx]!=0: + fan_state[idx]=FAN_STATE_REMOVE + logging.warning("Alarm for FAN-%d absent is detected", idx+1) + + for idx in range (0, self.fan_num): + node = self.fan_path + self.fault[idx] + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if fan_status_state[idx]!=FAN_STATUS_FAULT: + if fan_state[idx] == FAN_STATE_INSERT: + logging.warning("Alarm for FAN-%d failed is detected", idx+1); + fan_status_state[idx]=FAN_STATUS_FAULT + else: + fan_status_state[idx]=FAN_STATUS_NORMAL + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + monitor = device_monitor(log_file, log_level) + while True: + monitor.manage_fan() + time.sleep(3) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/accton_as4630_54pe_monitor_psu.py b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/accton_as4630_54pe_monitor_psu.py new file mode 100755 index 00000000000..8ef700f33ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/accton_as4630_54pe_monitor_psu.py @@ -0,0 +1,169 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 5/15/2019: Jostar create for as4630-54pe +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as4630_54pe_monitor_psu' + +global log_file +global log_level + + +psu_state=[2, 2] +psu_status_state=[2, 2] +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + + def __init__(self, log_file, log_level): + + self.psu_num = 2 + self.psu_path = "/sys/bus/i2c/devices/" + self.presence = "/psu_present" + self.oper_status = "/psu_power_good" + self.mapping = { + 0: "10-0050", + 1: "11-0051", + } + + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + # set up logging to console + + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + #sys_handler.setLevel(logging.WARNING) + sys_handler.setLevel(logging.INFO) + logging.getLogger('').addHandler(sys_handler) + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_psu(self): + + PSU_STATE_REMOVE = 0 + PSU_STATE_INSERT = 1 + + PSU_STATUS_NO_POWER = 0 + PSU_STATUS_POWER_GOOD = 1 + PSU_STATUS_IDLE =2 + + global psu_state + + for idx in range (0, self.psu_num): + node = self.psu_path + self.mapping[idx] + self.presence + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if psu_state[idx]!=1: + psu_state[idx]=PSU_STATE_INSERT + logging.info("PSU-%d present is detected", idx+1); + #psu_status_state[idx]=PSU_STATUS_POWER_GOOD #when insert, assume power is good. If no_power, next code will find it. + else: + if psu_state[idx]!=0: + psu_state[idx]=PSU_STATE_REMOVE + logging.warning("Alarm for PSU-%d absent is detected", idx+1); + psu_status_state[idx]=PSU_STATUS_IDLE + + for idx in range (0, self.psu_num): + node = self.psu_path + self.mapping[idx] + self.oper_status + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "0": + if psu_status_state[idx]!=PSU_STATUS_NO_POWER: + if psu_state[idx]==PSU_STATE_INSERT: + logging.warning("Alarm for PSU-%d failed is detected", idx+1); + psu_status_state[idx]=PSU_STATUS_NO_POWER + else: + if psu_state[idx]==PSU_STATE_INSERT: + if psu_status_state[idx]!=PSU_STATUS_POWER_GOOD: + logging.info("PSU-%d power_good is detected", idx+1); + psu_status_state[idx]=PSU_STATUS_POWER_GOOD + + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + monitor = device_monitor(log_file, log_level) + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_psu() + time.sleep(3) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/accton_as4630_54pe_util.py b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/accton_as4630_54pe_util.py new file mode 100755 index 00000000000..2f73726f846 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/utils/accton_as4630_54pe_util.py @@ -0,0 +1,563 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +PROJECT_NAME = 'as4630_54pe' +version = '0.0.1' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan1':1, 'fan2':1,'fan3':1,'fan4':1,'fan5':1,'thermal':3, 'psu':2, 'sfp':54} + + +led_prefix ='/sys/devices/platform/as4630_54pe_led/leds/accton_'+PROJECT_NAME+'_led::' +fan_prefix ='/sys/devices/platform/as4630_54pe_' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2'], + 'fan1': ['fan'], + 'fan2': ['fan'], + 'fan3': ['fan'], + 'fan4': ['fan'], + 'fan5': ['fan'], + 'fan5': ['fan'], + } +hwmon_nodes = {'led': ['brightness'] , + 'fan1': ['fan_duty_cycle_percentage', 'fan1_fault', 'fan1_speed_rpm', 'fan1_direction', 'fanr1_fault', 'fanr1_speed_rpm'], + 'fan2': ['fan_duty_cycle_percentage','fan2_fault', 'fan2_speed_rpm', 'fan2_direction', 'fanr2_fault', 'fanr2_speed_rpm'], + 'fan3': ['fan_duty_cycle_percentage','fan3_fault', 'fan3_speed_rpm', 'fan3_direction', 'fanr3_fault', 'fanr3_speed_rpm'], + 'fan4': ['fan4_duty_cycle_percentage','fan4_fault', 'fan4_speed_rpm', 'fan4_direction', 'fanr4_fault', 'fanr4_speed_rpm'], + 'fan5': ['fan_duty_cycle_percentage','fan5_fault', 'fan5_speed_rpm', 'fan5_direction', 'fanr5_fault', 'fanr5_speed_rpm'], + } +hwmon_prefix ={'led': led_prefix, + 'fan1': fan_prefix, + 'fan2': fan_prefix, + 'fan3': fan_prefix, + 'fan4': fan_prefix, + 'fan5': fan_prefix, + } + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'fan': ['54-0066'], + 'thermal': ['54-004c', '55-0048','55-0049', '55-004a', '55-004b'] , + 'psu': ['49-0050','50-0053'], + 'sfp': ['-0050']} +i2c_nodes = {'fan': ['present', 'front_speed_rpm', 'rear_speed_rpm'], + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['module_present_ ', 'module_tx_disable_']} + +sfp_map = [18, 19, 20, 21, 22, 23] + +mknod =[ +'echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-3/new_device', + +'echo as4630_54pe_cpld 0x60 > /sys/bus/i2c/devices/i2c-3/new_device', + +'echo lm77 0x48 > /sys/bus/i2c/devices/i2c-14/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-25/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-24/new_device', + + +# PSU-1 +'echo as4630_54pe_psu1 0x50 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo ype1200am 0x58 > /sys/bus/i2c/devices/i2c-10/new_device', + +# PSU-2 +'echo as4630_54pe_psu2 0x51> /sys/bus/i2c/devices/i2c-11/new_device', +'echo ype1200am 0x59 > /sys/bus/i2c/devices/i2c-11/new_device', + +#EERPOM +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-1/new_device', +] + + + +FORCE = 0 +logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + print "TEST" + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-32 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-32 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ACCTON DBG]: "+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status = 1 + output = "" + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log ("cmd:" + cmd) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_inserted(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + +#'modprobe cpr_4011_4mxx', + +kos = [ +'depmod -ae', +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe ym2651y', +'modprobe x86_64_accton_as4630_54pe_cpld', +'modprobe x86_64_accton_as4630_54pe_leds', +'modprobe x86_64_accton_as4630_54pe_psu', +'modprobe optoe'] + +def driver_install(): + global FORCE + + ret=log_os_system("lsmod|grep i2c_ismt",1) + my_log("rmmond i2cismt") + log_os_system("rmmod i2c_ismt", 1) + log_os_system("rmmod i2c_i801", 1) + log_os_system("modprobe i2c-i801", 1) + time.sleep(1) + log_os_system("modprobe i2c-ismt", 1) + + + + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + lst = rm.split(" ") + print "lst=%s"%lst + if len(lst) > 3: + del(lst[3]) + rm = " ".join(lst) + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +def device_install(): + global FORCE + + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(2) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + print("Check SFP") + for i in range(0,len(sfp_map)): + if(i < 4): + opt='optoe2' + else: + opt='optoe1' + status, output =log_os_system("echo " + str(opt) + " 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + + status, output =log_os_system("echo port"+str(i+49) + " > /sys/bus/i2c/devices/"+str(sfp_map[i])+"-0050/port_name", 1) + if status: + print output + if FORCE == 0: + return status + + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/0-0070", 0) + if status==0: + I2C_ORDER=1 + else: + I2C_ORDER=0 + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + nodelist = mknod + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_inserted() == False: + return False + if not device_exist(): + print "not device_exist()" + return False + return True + +def do_install(): + if driver_inserted() == False: + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_inserted()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + print "node=%s"%node + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan1'] ['fan11'][0] + node = node.replace(node.split("/")[-1], 'fan1_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0077", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/classes/fanutil.py new file mode 100755 index 00000000000..c16771e214e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/classes/fanutil.py @@ -0,0 +1,238 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_NUM_ON_MAIN_BROAD = 5 + FAN_NUM_1_IDX = 1 + FAN_NUM_2_IDX = 2 + FAN_NUM_3_IDX = 3 + FAN_NUM_4_IDX = 4 + FAN_NUM_5_IDX = 5 + + FAN_NODE_NUM_OF_MAP = 6 + FAN_NODE_FAULT_IDX_OF_MAP = 1 + FAN_NODE_SPEED_IDX_OF_MAP = 2 + FAN_NODE_DIR_IDX_OF_MAP = 3 + FAN_NODE_DUTY_IDX_OF_MAP = 4 + FANR_NODE_FAULT_IDX_OF_MAP = 5 + FANR_NODE_SPEED_IDX_OF_MAP = 6 + + BASE_VAL_PATH = '/sys/devices/platform/as5712_54x_fan/{0}' + + #logfile = '' + #loglevel = logging.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + _fan_to_device_path_mapping = {} + + _fan_to_device_node_mapping = { + (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault', + (FAN_NUM_1_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan1_speed_rpm', + (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction', + (FAN_NUM_1_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan1_duty_cycle_percentage', + (FAN_NUM_1_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr1_fault', + (FAN_NUM_1_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr1_speed_rpm', + + (FAN_NUM_2_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan2_fault', + (FAN_NUM_2_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan2_speed_rpm', + (FAN_NUM_2_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan2_direction', + (FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage', + (FAN_NUM_2_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr2_fault', + (FAN_NUM_2_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr2_speed_rpm', + + (FAN_NUM_3_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan3_fault', + (FAN_NUM_3_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan3_speed_rpm', + (FAN_NUM_3_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan3_direction', + (FAN_NUM_3_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan3_duty_cycle_percentage', + (FAN_NUM_3_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr3_fault', + (FAN_NUM_3_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr3_speed_rpm', + + (FAN_NUM_4_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan4_fault', + (FAN_NUM_4_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan4_speed_rpm', + (FAN_NUM_4_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan4_direction', + (FAN_NUM_4_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan4_duty_cycle_percentage', + (FAN_NUM_4_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr4_fault', + (FAN_NUM_4_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr4_speed_rpm', + + (FAN_NUM_5_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan5_fault', + (FAN_NUM_5_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan5_speed_rpm', + (FAN_NUM_5_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan5_direction', + (FAN_NUM_5_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan5_duty_cycle_percentage', + (FAN_NUM_5_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr5_fault', + (FAN_NUM_5_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr5_speed_rpm', + } + + def _get_fan_to_device_node(self, fan_num, node_num): + return self._fan_to_device_node_mapping[(fan_num, node_num)] + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + def __init__(self): + fan_path = self.BASE_VAL_PATH + + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_NUM_ON_MAIN_BROAD+1): + for node_num in range(self.FAN_NODE_FAULT_IDX_OF_MAP, self.FAN_NODE_NUM_OF_MAP+1): + self._fan_to_device_path_mapping[(fan_num, node_num)] = fan_path.format( + self._fan_to_device_node_mapping[(fan_num, node_num)]) + + def get_num_fans(self): + return self.FAN_NUM_ON_MAIN_BROAD + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM_OF_MAP + + def get_idx_node_start(self): + return self.FAN_NODE_FAULT_IDX_OF_MAP + + def get_size_node_map(self): + return len(self._fan_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._fan_to_device_path_mapping) + + def get_fan_to_device_path(self, fan_num, node_num): + return self._fan_to_device_path_mapping[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_FAULT_IDX_OF_MAP) + + def get_fan_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_SPEED_IDX_OF_MAP) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DIR_IDX_OF_MAP) + + def get_fan_duty_cycle(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DUTY_IDX_OF_MAP) + + def set_fan_duty_cycle(self, fan_num, val): + return self._set_fan_node_val(fan_num, self.FAN_NODE_DUTY_IDX_OF_MAP, val) + + def get_fanr_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_FAULT_IDX_OF_MAP) + + def get_fanr_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP) + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num, %d', fan_num) + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + logging.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + if self.get_fanr_fault(fan_num) is not None and self.get_fanr_fault(fan_num) > 0: + logging.debug('GET. FANR fault. fan_num, %d', fan_num) + return False + + return True + +#def main(): +# fan = FanUtil() +# +# print 'get_size_node_map : %d' % fan.get_size_node_map() +# print 'get_size_path_map : %d' % fan.get_size_path_map() +# for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): +# for y in range(fan.get_idx_node_start(), fan.get_num_nodes()+1): +# print fan.get_fan_to_device_path(x, y) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/classes/thermalutil.py new file mode 100755 index 00000000000..5b8f890e881 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/classes/thermalutil.py @@ -0,0 +1,121 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# +# ------------------------------------------------------------------ + +try: + import time + import logging + import glob + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + + THERMAL_NUM_ON_MAIN_BROAD = 3 + THERMAL_NUM_1_IDX = 1 # 1_ON_MAIN_BROAD + THERMAL_NUM_2_IDX = 2 # 2_ON_MAIN_BROAD + THERMAL_NUM_3_IDX = 3 # 3_ON_MAIN_BROAD + + BASE_VAL_PATH = '/sys/bus/i2c/devices/{0}-00{1}/hwmon/hwmon*/temp1_input' + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + _thermal_to_device_path_mapping = {} + + _thermal_to_device_node_mapping = { + THERMAL_NUM_1_IDX: ['61', '48'], + THERMAL_NUM_2_IDX: ['62', '49'], + THERMAL_NUM_3_IDX: ['63', '4a'], + } + + def __init__(self): + thermal_path = self.BASE_VAL_PATH + + for x in range(self.THERMAL_NUM_1_IDX, self.THERMAL_NUM_ON_MAIN_BROAD+1): + self._thermal_to_device_path_mapping[x] = thermal_path.format( + self._thermal_to_device_node_mapping[x][0], + self._thermal_to_device_node_mapping[x][1]) + + def _get_thermal_node_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_to_device_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + + def get_num_thermals(self): + return self.THERMAL_NUM_ON_MAIN_BROAD + + def get_idx_thermal_start(self): + return self.THERMAL_NUM_1_IDX + + def get_size_node_map(self): + return len(self._thermal_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._thermal_to_device_path_mapping) + + def get_thermal_to_device_path(self, thermal_num): + return self._thermal_to_device_path_mapping[thermal_num] + + def get_thermal_1_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + + def get_thermal_2_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) + +#def main(): +# thermal = ThermalUtil() +# +# print 'get_size_node_map : %d' % thermal.get_size_node_map() +# print 'get_size_path_map : %d' % thermal.get_size_path_map() +# for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): +# print thermal.get_thermal_to_device_path(x) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/Makefile new file mode 100755 index 00000000000..39fe78bf8ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/Makefile @@ -0,0 +1,17 @@ +ifneq ($(KERNELRELEASE),) +obj-m:= i2c-mux-accton_as5712_54x_cpld.o \ + accton_as5712_54x_fan.o leds-accton_as5712_54x.o accton_as5712_54x_psu.o \ + cpr_4011_4mxx.o ym2651y.o + +else +ifeq (,$(KERNEL_SRC)) +$(error KERNEL_SRC is not defined) +else +KERNELDIR:=$(KERNEL_SRC) +endif +PWD:=$(shell pwd) +default: + $(MAKE) -C $(KERNELDIR) M=$(PWD) modules +clean: + rm -rf *.o *.mod.o *.mod.o *.ko .*cmd .tmp_versions Module.markers Module.symvers modules.order +endif diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/accton_as5712_54x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/accton_as5712_54x_fan.c new file mode 100644 index 00000000000..3f74e3f375a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/accton_as5712_54x_fan.c @@ -0,0 +1,456 @@ +/* + * A hwmon driver for the Accton as5710 54x fan contrl + * + * Copyright (C) 2013 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as5712_54x_fan" + +#define FAN_MAX_NUMBER 5 +#define FAN_SPEED_CPLD_TO_RPM_STEP 150 +#define FAN_SPEED_PRECENT_TO_CPLD_STEP 5 +#define FAN_DUTY_CYCLE_MIN 0 /* 10% ??*/ +#define FAN_DUTY_CYCLE_MAX 100 /* 100% */ + +#define CPLD_REG_FAN_STATUS_OFFSET 0xC +#define CPLD_REG_FANR_STATUS_OFFSET 0x1F +#define CPLD_REG_FAN_DIRECTION_OFFSET 0x1E + +#define CPLD_FAN1_REG_SPEED_OFFSET 0x10 +#define CPLD_FAN2_REG_SPEED_OFFSET 0x11 +#define CPLD_FAN3_REG_SPEED_OFFSET 0x12 +#define CPLD_FAN4_REG_SPEED_OFFSET 0x13 +#define CPLD_FAN5_REG_SPEED_OFFSET 0x14 + +#define CPLD_FANR1_REG_SPEED_OFFSET 0x18 +#define CPLD_FANR2_REG_SPEED_OFFSET 0x19 +#define CPLD_FANR3_REG_SPEED_OFFSET 0x1A +#define CPLD_FANR4_REG_SPEED_OFFSET 0x1B +#define CPLD_FANR5_REG_SPEED_OFFSET 0x1C + +#define CPLD_REG_FAN_PWM_CYCLE_OFFSET 0xD + +#define CPLD_FAN1_INFO_BIT_MASK 0x1 +#define CPLD_FAN2_INFO_BIT_MASK 0x2 +#define CPLD_FAN3_INFO_BIT_MASK 0x4 +#define CPLD_FAN4_INFO_BIT_MASK 0x8 +#define CPLD_FAN5_INFO_BIT_MASK 0x10 + +#define PROJECT_NAME + +#define LOCAL_DEBUG 0 + +static struct accton_as5712_54x_fan *fan_data = NULL; + +struct accton_as5712_54x_fan { + struct platform_device *pdev; + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status[FAN_MAX_NUMBER]; /* inner first fan status */ + u32 speed[FAN_MAX_NUMBER]; /* inner first fan speed */ + u8 direction[FAN_MAX_NUMBER]; /* reconrd the direction of inner first and second fans */ + u32 duty_cycle[FAN_MAX_NUMBER]; /* control the speed of inner first and second fans */ + u8 r_status[FAN_MAX_NUMBER]; /* inner second fan status */ + u32 r_speed[FAN_MAX_NUMBER]; /* inner second fan speed */ +}; + +/*******************/ +#define MAKE_FAN_MASK_OR_REG(name,type) \ + CPLD_FAN##type##1_##name, \ + CPLD_FAN##type##2_##name, \ + CPLD_FAN##type##3_##name, \ + CPLD_FAN##type##4_##name, \ + CPLD_FAN##type##5_##name, + +/* fan related data + */ +static const u8 fan_info_mask[] = { + MAKE_FAN_MASK_OR_REG(INFO_BIT_MASK,) +}; + +static const u8 fan_speed_reg[] = { + MAKE_FAN_MASK_OR_REG(REG_SPEED_OFFSET,) +}; + +static const u8 fanr_speed_reg[] = { + MAKE_FAN_MASK_OR_REG(REG_SPEED_OFFSET,R) +}; + +/*******************/ +#define DEF_FAN_SET(id) \ + FAN##id##_FAULT, \ + FAN##id##_SPEED, \ + FAN##id##_DUTY_CYCLE, \ + FAN##id##_DIRECTION, \ + FANR##id##_FAULT, \ + FANR##id##_SPEED, + +enum sysfs_fan_attributes { + DEF_FAN_SET(1) + DEF_FAN_SET(2) + DEF_FAN_SET(3) + DEF_FAN_SET(4) + DEF_FAN_SET(5) +}; +/*******************/ +static void accton_as5712_54x_fan_update_device(struct device *dev); +static int accton_as5712_54x_fan_read_value(u8 reg); +static int accton_as5712_54x_fan_write_value(u8 reg, u8 value); + +static ssize_t fan_set_duty_cycle(struct device *dev, + struct device_attribute *da,const char *buf, size_t count); +static ssize_t fan_show_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t show_name(struct device *dev, struct device_attribute *da, + char *buf); +extern int as5712_54x_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as5712_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + + +/*******************/ +#define _MAKE_SENSOR_DEVICE_ATTR(prj, id, id2) \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, \ + fan_set_duty_cycle, FAN##id##_DUTY_CYCLE); \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_direction, S_IRUGO, fan_show_value, NULL, FAN##id##_DIRECTION); \ + static SENSOR_DEVICE_ATTR(prj##fanr##id##_fault, S_IRUGO, fan_show_value, NULL, FANR##id##_FAULT); \ + static SENSOR_DEVICE_ATTR(prj##fanr##id##_speed_rpm, S_IRUGO, fan_show_value, NULL, FANR##id##_SPEED);\ + static SENSOR_DEVICE_ATTR(prj##fan##id##_input, S_IRUGO, fan_show_value, NULL, FAN##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id2##_input, S_IRUGO, fan_show_value, NULL, FANR##id##_SPEED);\ + static SENSOR_DEVICE_ATTR(prj##fan##id##_fault, S_IRUGO, fan_show_value, NULL, FAN##id##_FAULT); \ + static SENSOR_DEVICE_ATTR(prj##fan##id2##_fault, S_IRUGO, fan_show_value, NULL, FANR##id##_FAULT); + +#define MAKE_SENSOR_DEVICE_ATTR(prj,id, id2) _MAKE_SENSOR_DEVICE_ATTR(prj,id, id2) + +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 1, 11) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 2, 12) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 3, 13) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 4, 14) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 5, 15) + +static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, 0); +/*******************/ + +#define _MAKE_FAN_ATTR(prj, id, id2) \ + &sensor_dev_attr_##prj##fan##id##_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id##_duty_cycle_percentage.dev_attr.attr,\ + &sensor_dev_attr_##prj##fan##id##_direction.dev_attr.attr, \ + &sensor_dev_attr_##prj##fanr##id##_fault.dev_attr.attr, \ + &sensor_dev_attr_##prj##fanr##id##_speed_rpm.dev_attr.attr,\ + &sensor_dev_attr_##prj##fan##id##_input.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id2##_input.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id##_fault.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id2##_fault.dev_attr.attr, + + +#define MAKE_FAN_ATTR(prj, id, id2) _MAKE_FAN_ATTR(prj, id, id2) + +static struct attribute *accton_as5712_54x_fan_attributes[] = { + /* fan related attributes */ + MAKE_FAN_ATTR(PROJECT_NAME,1, 11) + MAKE_FAN_ATTR(PROJECT_NAME,2, 12) + MAKE_FAN_ATTR(PROJECT_NAME,3, 13) + MAKE_FAN_ATTR(PROJECT_NAME,4, 14) + MAKE_FAN_ATTR(PROJECT_NAME,5, 15) + &sensor_dev_attr_name.dev_attr.attr, + NULL +}; +/*******************/ + +/* fan related functions + */ +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + ssize_t ret = 0; + int data_index, type_index; + + accton_as5712_54x_fan_update_device(dev); + + if (fan_data->valid == 0) { + return ret; + } + + type_index = attr->index%FAN2_FAULT; + data_index = attr->index/FAN2_FAULT; + + switch (type_index) { + case FAN1_FAULT: + ret = sprintf(buf, "%d\n", fan_data->status[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FAN1_SPEED: + ret = sprintf(buf, "%d\n", fan_data->speed[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FAN1_DUTY_CYCLE: + ret = sprintf(buf, "%d\n", fan_data->duty_cycle[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FAN1_DIRECTION: + ret = sprintf(buf, "%d\n", fan_data->direction[data_index]); /* presnet, need to modify*/ + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FANR1_FAULT: + ret = sprintf(buf, "%d\n", fan_data->r_status[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FANR1_SPEED: + ret = sprintf(buf, "%d\n", fan_data->r_speed[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + default: + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d] \n", __FUNCTION__, __LINE__); + break; + } + + return ret; +} + +static ssize_t show_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + return sprintf(buf, "%s\n", DRVNAME); +} +/*******************/ +static ssize_t fan_set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) { + + int error, value; + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < FAN_DUTY_CYCLE_MIN || value > FAN_DUTY_CYCLE_MAX) + return -EINVAL; + + accton_as5712_54x_fan_write_value(CPLD_REG_FAN_PWM_CYCLE_OFFSET, value/FAN_SPEED_PRECENT_TO_CPLD_STEP); + + fan_data->valid = 0; + + return count; +} + +static const struct attribute_group accton_as5712_54x_fan_group = { + .attrs = accton_as5712_54x_fan_attributes, +}; + +static int accton_as5712_54x_fan_read_value(u8 reg) +{ + return as5712_54x_cpld_read(0x60, reg); +} + +static int accton_as5712_54x_fan_write_value(u8 reg, u8 value) +{ + return as5712_54x_cpld_write(0x60, reg, value); +} + +static void accton_as5712_54x_fan_update_device(struct device *dev) +{ + int speed, r_speed, fault, r_fault, ctrl_speed, direction; + int i; + + mutex_lock(&fan_data->update_lock); + + if (LOCAL_DEBUG) + printk ("Starting accton_as5712_54x_fan update \n"); + + if (!(time_after(jiffies, fan_data->last_updated + HZ + HZ / 2) || !fan_data->valid)) { + /* do nothing */ + goto _exit; + } + + fan_data->valid = 0; + + if (LOCAL_DEBUG) + printk ("Starting accton_as5712_54x_fan update 2 \n"); + + fault = accton_as5712_54x_fan_read_value(CPLD_REG_FAN_STATUS_OFFSET); + r_fault = accton_as5712_54x_fan_read_value(CPLD_REG_FANR_STATUS_OFFSET); + direction = accton_as5712_54x_fan_read_value(CPLD_REG_FAN_DIRECTION_OFFSET); + ctrl_speed = accton_as5712_54x_fan_read_value(CPLD_REG_FAN_PWM_CYCLE_OFFSET); + + if ( (fault < 0) || (r_fault < 0) || (direction < 0) || (ctrl_speed < 0) ) + { + if (LOCAL_DEBUG) + printk ("[Error!!][%s][%d] \n", __FUNCTION__, __LINE__); + goto _exit; /* error */ + } + + if (LOCAL_DEBUG) + printk ("[fan:] fault:%d, r_fault=%d, direction=%d, ctrl_speed=%d \n",fault, r_fault, direction, ctrl_speed); + + for (i=0; istatus[i] = (fault & fan_info_mask[i]) >> i; + if (LOCAL_DEBUG) + printk ("[fan%d:] fail=%d \n",i, fan_data->status[i]); + + fan_data->r_status[i] = (r_fault & fan_info_mask[i]) >> i; + fan_data->direction[i] = (direction & fan_info_mask[i]) >> i; + fan_data->duty_cycle[i] = ctrl_speed * FAN_SPEED_PRECENT_TO_CPLD_STEP; + + /* fan speed + */ + speed = accton_as5712_54x_fan_read_value(fan_speed_reg[i]); + r_speed = accton_as5712_54x_fan_read_value(fanr_speed_reg[i]); + if ( (speed < 0) || (r_speed < 0) ) + { + if (LOCAL_DEBUG) + printk ("[Error!!][%s][%d] \n", __FUNCTION__, __LINE__); + goto _exit; /* error */ + } + + if (LOCAL_DEBUG) + printk ("[fan%d:] speed:%d, r_speed=%d \n", i, speed, r_speed); + + fan_data->speed[i] = speed * FAN_SPEED_CPLD_TO_RPM_STEP; + fan_data->r_speed[i] = r_speed * FAN_SPEED_CPLD_TO_RPM_STEP; + } + + /* finish to update */ + fan_data->last_updated = jiffies; + fan_data->valid = 1; + +_exit: + mutex_unlock(&fan_data->update_lock); +} + +static int accton_as5712_54x_fan_probe(struct platform_device *pdev) +{ + int status = -1; + + /* Register sysfs hooks */ + status = sysfs_create_group(&pdev->dev.kobj, &accton_as5712_54x_fan_group); + if (status) { + goto exit; + + } + + fan_data->hwmon_dev = hwmon_device_register(&pdev->dev); + if (IS_ERR(fan_data->hwmon_dev)) { + status = PTR_ERR(fan_data->hwmon_dev); + goto exit_remove; + } + + dev_info(&pdev->dev, "accton_as5712_54x_fan\n"); + + return 0; + +exit_remove: + sysfs_remove_group(&pdev->dev.kobj, &accton_as5712_54x_fan_group); +exit: + return status; +} + +static int accton_as5712_54x_fan_remove(struct platform_device *pdev) +{ + hwmon_device_unregister(fan_data->hwmon_dev); + sysfs_remove_group(&fan_data->pdev->dev.kobj, &accton_as5712_54x_fan_group); + + return 0; +} + + + +static struct platform_driver accton_as5712_54x_fan_driver = { + .probe = accton_as5712_54x_fan_probe, + .remove = accton_as5712_54x_fan_remove, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as5712_54x_fan_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as5712_54x_fan_driver); + if (ret < 0) { + goto exit; + } + + fan_data = kzalloc(sizeof(struct accton_as5712_54x_fan), GFP_KERNEL); + if (!fan_data) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as5712_54x_fan_driver); + goto exit; + } + + mutex_init(&fan_data->update_lock); + fan_data->valid = 0; + + fan_data->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(fan_data->pdev)) { + ret = PTR_ERR(fan_data->pdev); + platform_driver_unregister(&accton_as5712_54x_fan_driver); + kfree(fan_data); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as5712_54x_fan_exit(void) +{ + platform_device_unregister(fan_data->pdev); + platform_driver_unregister(&accton_as5712_54x_fan_driver); + kfree(fan_data); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as5712_54x_fan driver"); +MODULE_LICENSE("GPL"); + +module_init(accton_as5712_54x_fan_init); +module_exit(accton_as5712_54x_fan_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/accton_as5712_54x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/accton_as5712_54x_psu.c new file mode 100755 index 00000000000..9a0d1dae58b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/accton_as5712_54x_psu.c @@ -0,0 +1,371 @@ +/* + * An hwmon driver for accton as5712_54x Power Module + * + * Copyright (C) 2015 Accton Technology Corporation. + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#if 0 +#define DEBUG +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define PSU_STATUS_I2C_ADDR 0x60 +#define PSU_STATUS_I2C_REG_OFFSET 0x2 + +#define IS_POWER_GOOD(id, value) (!!(value & BIT(id*4 + 1))) +#define IS_PRESENT(id, value) (!(value & BIT(id*4))) + +static ssize_t show_index(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); +static int as5712_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as5712_54x_cpld_read(unsigned short cpld_addr, u8 reg); +static int as5712_54x_psu_model_name_get(struct device *dev); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as5712_54x_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[14]; /* Model name, read from eeprom */ +}; + +static struct as5712_54x_psu_data *as5712_54x_psu_update_device(struct device *dev); + +enum as5712_54x_psu_sysfs_attributes { + PSU_INDEX, + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_index, S_IRUGO, show_index, NULL, PSU_INDEX); +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_model_name,NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); + +static struct attribute *as5712_54x_psu_attributes[] = { + &sensor_dev_attr_psu_index.dev_attr.attr, + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + NULL +}; + +static ssize_t show_index(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5712_54x_psu_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->index); +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as5712_54x_psu_data *data = as5712_54x_psu_update_device(dev); + u8 status = 0; + + if (!data->valid) { + return sprintf(buf, "0\n"); + } + + if (attr->index == PSU_PRESENT) { + status = IS_PRESENT(data->index, data->status); + } + else { /* PSU_POWER_GOOD */ + status = IS_POWER_GOOD(data->index, data->status); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as5712_54x_psu_data *data = as5712_54x_psu_update_device(dev); + + if (!data->valid) { + return 0; + } + + if (!IS_PRESENT(data->index, data->status)) { + return 0; + } + + if (as5712_54x_psu_model_name_get(dev) < 0) { + return -ENXIO; + } + + return sprintf(buf, "%s\n", data->model_name); +} + +static const struct attribute_group as5712_54x_psu_group = { + .attrs = as5712_54x_psu_attributes, +}; + +static int as5712_54x_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as5712_54x_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as5712_54x_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as5712_54x_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as5712_54x_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as5712_54x_psu_remove(struct i2c_client *client) +{ + struct as5712_54x_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as5712_54x_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as5712_54x_psu1, + as5712_54x_psu2 +}; + +static const struct i2c_device_id as5712_54x_psu_id[] = { + { "as5712_54x_psu1", as5712_54x_psu1 }, + { "as5712_54x_psu2", as5712_54x_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as5712_54x_psu_id); + +static struct i2c_driver as5712_54x_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as5712_54x_psu", + }, + .probe = as5712_54x_psu_probe, + .remove = as5712_54x_psu_remove, + .id_table = as5712_54x_psu_id, + .address_list = normal_i2c, +}; + +static int as5712_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + result = 0; + +abort: + return result; +} + +enum psu_type { + PSU_YM_2401_JCR, /* AC110V - F2B */ + PSU_YM_2401_JDR, /* AC110V - B2F */ + PSU_CPR_4011_4M11, /* AC110V - F2B */ + PSU_CPR_4011_4M21, /* AC110V - B2F */ + PSU_CPR_6011_2M11, /* AC110V - F2B */ + PSU_CPR_6011_2M21, /* AC110V - B2F */ + PSU_UM400D_01G, /* DC48V - F2B */ + PSU_UM400D01_01G /* DC48V - B2F */ +}; + +struct model_name_info { + enum psu_type type; + u8 offset; + u8 length; + char* model_name; +}; + +struct model_name_info models[] = { +{PSU_YM_2401_JCR, 0x20, 11, "YM-2401JCR"}, +{PSU_YM_2401_JDR, 0x20, 11, "YM-2401JDR"}, +{PSU_CPR_4011_4M11, 0x26, 13, "CPR-4011-4M11"}, +{PSU_CPR_4011_4M21, 0x26, 13, "CPR-4011-4M21"}, +{PSU_CPR_6011_2M11, 0x26, 13, "CPR-6011-2M11"}, +{PSU_CPR_6011_2M21, 0x26, 13, "CPR-6011-2M21"}, +{PSU_UM400D_01G, 0x50, 9, "um400d01G"}, +{PSU_UM400D01_01G, 0x50, 12, "um400d01-01G"}, +}; + +static int as5712_54x_psu_model_name_get(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5712_54x_psu_data *data = i2c_get_clientdata(client); + int i, status; + + for (i = 0; i < ARRAY_SIZE(models); i++) { + memset(data->model_name, 0, sizeof(data->model_name)); + + status = as5712_54x_psu_read_block(client, models[i].offset, + data->model_name, models[i].length); + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x) offset(0x%x)\n", + client->addr, models[i].offset); + return status; + } + else { + data->model_name[models[i].length] = '\0'; + } + + if (i == PSU_YM_2401_JCR || i == PSU_YM_2401_JDR) { + /* Skip the meaningless data byte 8*/ + data->model_name[8] = data->model_name[9]; + data->model_name[9] = data->model_name[10]; + data->model_name[10] = '\0'; + } + + /* Determine if the model name is known, if not, read next index + */ + if (strncmp(data->model_name, models[i].model_name, models[i].length) == 0) { + return 0; + } + else { + data->model_name[0] = '\0'; + } + } + + return -ENODATA; +} + +static struct as5712_54x_psu_data *as5712_54x_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5712_54x_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status = -1; + + dev_dbg(&client->dev, "Starting as5712_54x update\n"); + data->valid = 0; + + + /* Read psu status */ + status = as5712_54x_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg (0x%x) err %d\n", PSU_STATUS_I2C_ADDR, status); + goto exit; + } + else { + data->status = status; + } + + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init as5712_54x_psu_init(void) +{ + return i2c_add_driver(&as5712_54x_psu_driver); +} + +static void __exit as5712_54x_psu_exit(void) +{ + i2c_del_driver(&as5712_54x_psu_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton as5712_54x_psu driver"); +MODULE_LICENSE("GPL"); + +module_init(as5712_54x_psu_init); +module_exit(as5712_54x_psu_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/accton_as5712_54x_sfp.c b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/accton_as5712_54x_sfp.c new file mode 100755 index 00000000000..d236057c4e5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/accton_as5712_54x_sfp.c @@ -0,0 +1,825 @@ +/* + * An hwmon driver for accton as5712_54x sfp + * + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#if 0 +#define DEBUG +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define NUM_OF_SFF_PORT 54 +#define SFP_PORT_MAX 48 +#define I2C_ADDR_CPLD1 0x60 +#define I2C_ADDR_CPLD2 0x61 +#define I2C_ADDR_CPLD3 0x62 +#define CPLD3_OFFSET_QSFP_MOD_RST 0x15 +#define CPLD3_OFFSET_QSFP_LPMODE 0x16 + + +#define BIT_INDEX(i) (1ULL << (i)) + +#if 0 +static ssize_t show_status(struct device *dev, struct device_attribute *da,char *buf); +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_eeprom(struct device *dev, struct device_attribute *da, char *buf); +static int as5712_54x_sfp_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as5712_54x_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as5712_54x_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); +#endif + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x50, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as5712_54x_sfp_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + int port; /* Front port index */ + char eeprom[256]; /* eeprom data */ + u64 status[4]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => is_present + 1 => tx_fail + 2 => tx_disable + 3 => rx_loss */ +}; + +/* The table maps active port to cpld port. + * Array index 0 is for active port 1, + * index 1 for active port 2, and so on. + * The array content implies cpld port index. + */ +static const u8 cpld_to_front_port_table[] = +{ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, + 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, + 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, + 49, 52, 50, 53, 51, 54}; + +#define CPLD_PORT_TO_FRONT_PORT(port) (cpld_to_front_port_table[port]) + +static struct as5712_54x_sfp_data *as5712_54x_sfp_update_device(struct device *dev, int update_eeprom); +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_eeprom(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_lp_mode(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_lp_mode(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_mode_reset(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +extern int as5712_54x_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as5712_54x_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +enum as5712_54x_sfp_sysfs_attributes { + SFP_IS_PRESENT, + SFP_TX_FAULT, + SFP_TX_DISABLE, + SFP_RX_LOSS, + SFP_PORT_NUMBER, + SFP_EEPROM, + SFP_RX_LOS_ALL, + SFP_IS_PRESENT_ALL, + SFP_LP_MODE, + SFP_MOD_RST, +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, show_status, NULL, SFP_IS_PRESENT); +static SENSOR_DEVICE_ATTR(sfp_tx_fault, S_IRUGO, show_status, NULL, SFP_TX_FAULT); +static SENSOR_DEVICE_ATTR(sfp_tx_disable, S_IWUSR | S_IRUGO, show_status, set_tx_disable, SFP_TX_DISABLE); +static SENSOR_DEVICE_ATTR(sfp_rx_loss, S_IRUGO, show_status,NULL, SFP_RX_LOSS); +static SENSOR_DEVICE_ATTR(sfp_port_number, S_IRUGO, show_port_number, NULL, SFP_PORT_NUMBER); +static SENSOR_DEVICE_ATTR(sfp_eeprom, S_IRUGO, show_eeprom, NULL, SFP_EEPROM); +static SENSOR_DEVICE_ATTR(sfp_rx_los_all, S_IRUGO, show_status,NULL, SFP_RX_LOS_ALL); +static SENSOR_DEVICE_ATTR(sfp_is_present_all, S_IRUGO, show_status,NULL, SFP_IS_PRESENT_ALL); +static SENSOR_DEVICE_ATTR(sfp_lp_mode, S_IWUSR | S_IRUGO, get_lp_mode, set_lp_mode, SFP_LP_MODE); +static SENSOR_DEVICE_ATTR(sfp_mod_rst, S_IWUSR | S_IRUGO, get_mode_reset, set_mode_reset, SFP_MOD_RST); + +static struct attribute *as5712_54x_sfp_attributes[] = { + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault.dev_attr.attr, + &sensor_dev_attr_sfp_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp_eeprom.dev_attr.attr, + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los_all.dev_attr.attr, + &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, + &sensor_dev_attr_sfp_lp_mode.dev_attr.attr, + &sensor_dev_attr_sfp_mod_rst.dev_attr.attr, + NULL +}; + +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5712_54x_sfp_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", CPLD_PORT_TO_FRONT_PORT(data->port)); +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as5712_54x_sfp_data *data; + u8 val; + int values[7]; + + /* Error-check the CPLD read results. */ +#define VALIDATED_READ(_buf, _rv, _read_expr, _invert) \ + do { \ + _rv = (_read_expr); \ + if(_rv < 0) { \ + return sprintf(_buf, "READ ERROR\n"); \ + } \ + if(_invert) { \ + _rv = ~_rv; \ + } \ + _rv &= 0xFF; \ + } while(0) + + if(attr->index == SFP_RX_LOS_ALL) { + /* + * Report the RX_LOS status for all ports. + * This does not depend on the currently active SFP selector. + */ + + /* RX_LOS Ports 1-8 */ + VALIDATED_READ(buf, values[0], as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD2, 0x0F), 0); + /* RX_LOS Ports 9-16 */ + VALIDATED_READ(buf, values[1], as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD2, 0x10), 0); + /* RX_LOS Ports 17-24 */ + VALIDATED_READ(buf, values[2], as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD2, 0x11), 0); + /* RX_LOS Ports 25-32 */ + VALIDATED_READ(buf, values[3], as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x0F), 0); + /* RX_LOS Ports 33-40 */ + VALIDATED_READ(buf, values[4], as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x10), 0); + /* RX_LOS Ports 41-48 */ + VALIDATED_READ(buf, values[5], as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x11), 0); + + /** Return values 1 -> 48 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], + values[3], values[4], values[5]); + } + + if(attr->index == SFP_IS_PRESENT_ALL) { + /* + * Report the SFP_PRESENCE status for all ports. + * This does not depend on the currently active SFP selector. + */ + + /* SFP_PRESENT Ports 1-8 */ + VALIDATED_READ(buf, values[0], as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD2, 0x6), 1); + /* SFP_PRESENT Ports 9-16 */ + VALIDATED_READ(buf, values[1], as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD2, 0x7), 1); + /* SFP_PRESENT Ports 17-24 */ + VALIDATED_READ(buf, values[2], as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD2, 0x8), 1); + /* SFP_PRESENT Ports 25-32 */ + VALIDATED_READ(buf, values[3], as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x6), 1); + /* SFP_PRESENT Ports 33-40 */ + VALIDATED_READ(buf, values[4], as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x7), 1); + /* SFP_PRESENT Ports 41-48 */ + VALIDATED_READ(buf, values[5], as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x8), 1); + /* QSFP_PRESENT Ports 49-54 */ + VALIDATED_READ(buf, values[6], as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x14), 1); + + /* Return values 1 -> 54 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], + values[3], values[4], values[5], + values[6] & 0x3F); + } + /* + * The remaining attributes are gathered on a per-selected-sfp basis. + */ + data = as5712_54x_sfp_update_device(dev, 0); + if (attr->index == SFP_IS_PRESENT) { + val = (data->status[attr->index] & BIT_INDEX(data->port)) ? 0 : 1; + } + else { + val = (data->status[attr->index] & BIT_INDEX(data->port)) ? 1 : 0; + } + + return sprintf(buf, "%d", val); +} + +static ssize_t get_lp_mode(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5712_54x_sfp_data *data = i2c_get_clientdata(client); + u8 cpld_val = 0; + int port_bit; + int status = -EINVAL; + + /* Low power mode is not supported for SFP ports(1-48) */ + if (data->port < SFP_PORT_MAX) { + return -EINVAL; + } + mutex_lock(&data->update_lock); + + port_bit = data->port - SFP_PORT_MAX; + cpld_val = as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD3, CPLD3_OFFSET_QSFP_LPMODE); + cpld_val = cpld_val & 0x3F; + cpld_val = cpld_val & BIT_INDEX(port_bit); + status = snprintf(buf, PAGE_SIZE - 1, "%d\r\n", cpld_val>>port_bit); + + mutex_unlock(&data->update_lock); + + return status; +} + +static ssize_t set_lp_mode(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5712_54x_sfp_data *data = i2c_get_clientdata(client); + u8 cpld_val = 0; + long mode; + int error, port_bit; + + /* Tx disable is not supported for QSFP ports(49-54) */ + if (data->port < SFP_PORT_MAX) { + return -EINVAL; + } + port_bit = data->port - SFP_PORT_MAX; + error = kstrtol(buf, 10, &mode); + if (error) { + return error; + } + mutex_lock(&data->update_lock); + + cpld_val = as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD3, CPLD3_OFFSET_QSFP_LPMODE); + /* Update lp_mode status */ + if (mode) + { + cpld_val |= BIT_INDEX(port_bit); + } + else + { + cpld_val &=~BIT_INDEX(port_bit); + } + as5712_54x_i2c_cpld_write(I2C_ADDR_CPLD3, CPLD3_OFFSET_QSFP_LPMODE, cpld_val); + + mutex_unlock(&data->update_lock); + + return count; +} + + +static ssize_t get_mode_reset(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5712_54x_sfp_data *data = i2c_get_clientdata(client); + u8 cpld_val = 0; + int port_bit; + int status = -EINVAL; + + /* Low power mode is not supported for SFP ports(1-48) */ + if (data->port < SFP_PORT_MAX) { + return -EINVAL; + } + mutex_lock(&data->update_lock); + + port_bit = data->port - SFP_PORT_MAX; + cpld_val = as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD3, CPLD3_OFFSET_QSFP_MOD_RST); + cpld_val = cpld_val & 0x3F; + cpld_val = cpld_val & BIT_INDEX(port_bit); + status = snprintf(buf, PAGE_SIZE - 1, "%d\r\n", cpld_val>>port_bit); + + mutex_unlock(&data->update_lock); + + return status; +} + +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5712_54x_sfp_data *data = i2c_get_clientdata(client); + u8 cpld_val = 0; + long reset; + int error, port_bit; + + /* Tx disable is not supported for QSFP ports(49-54) */ + if (data->port < SFP_PORT_MAX) { + return -EINVAL; + } + port_bit = data->port - SFP_PORT_MAX; + error = kstrtol(buf, 10, &reset); + if (error) { + return error; + } + mutex_lock(&data->update_lock); + + cpld_val = as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD3, CPLD3_OFFSET_QSFP_MOD_RST); + /* Update lp_mode status */ + if (reset) + { + cpld_val |= BIT_INDEX(port_bit); + } + else + { + cpld_val &=~BIT_INDEX(port_bit); + } + as5712_54x_i2c_cpld_write(I2C_ADDR_CPLD3, CPLD3_OFFSET_QSFP_MOD_RST, cpld_val); + + mutex_unlock(&data->update_lock); + + return count; +} + + +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5712_54x_sfp_data *data = i2c_get_clientdata(client); + unsigned short cpld_addr = 0; + u8 cpld_reg = 0, cpld_val = 0, cpld_bit = 0; + long disable; + int error; + + /* Tx disable is not supported for QSFP ports(49-54) */ + if (data->port >= SFP_PORT_MAX) { + return -EINVAL; + } + + error = kstrtol(buf, 10, &disable); + if (error) { + return error; + } + + mutex_lock(&data->update_lock); + + if(data->port < 24) { + cpld_addr = I2C_ADDR_CPLD2; + cpld_reg = 0xC + data->port / 8; + cpld_bit = 1 << (data->port % 8); + } + else { + cpld_addr = I2C_ADDR_CPLD3; + cpld_reg = 0xC + (data->port - 24) / 8; + cpld_bit = 1 << (data->port % 8); + } + + cpld_val = as5712_54x_i2c_cpld_read(cpld_addr, cpld_reg); + + /* Update tx_disable status */ + if (disable) { + data->status[SFP_TX_DISABLE] |= BIT_INDEX(data->port); + cpld_val |= cpld_bit; + } + else { + data->status[SFP_TX_DISABLE] &= ~BIT_INDEX(data->port); + cpld_val &= ~cpld_bit; + } + + as5712_54x_i2c_cpld_write(cpld_addr, cpld_reg, cpld_val); + + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_eeprom(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as5712_54x_sfp_data *data = as5712_54x_sfp_update_device(dev, 1); + + if (!data->valid) { + return 0; + } + + if ((data->status[SFP_IS_PRESENT] & BIT_INDEX(data->port)) != 0) { + return 0; + } + + memcpy(buf, data->eeprom, sizeof(data->eeprom)); + + return sizeof(data->eeprom); +} + +static const struct attribute_group as5712_54x_sfp_group = { + .attrs = as5712_54x_sfp_attributes, +}; + +static int as5712_54x_sfp_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as5712_54x_sfp_data *data; + int status; + + extern int platform_accton_as5712_54x(void); + if(!platform_accton_as5712_54x()) { + return -ENODEV; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as5712_54x_sfp_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + mutex_init(&data->update_lock); + data->port = dev_id->driver_data; + i2c_set_clientdata(client, data); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as5712_54x_sfp_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sfp '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as5712_54x_sfp_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as5712_54x_sfp_remove(struct i2c_client *client) +{ + struct as5712_54x_sfp_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as5712_54x_sfp_group); + kfree(data); + + return 0; +} + +enum port_numbers { +as5712_54x_sfp1, as5712_54x_sfp2, as5712_54x_sfp3, as5712_54x_sfp4, +as5712_54x_sfp5, as5712_54x_sfp6, as5712_54x_sfp7, as5712_54x_sfp8, +as5712_54x_sfp9, as5712_54x_sfp10, as5712_54x_sfp11,as5712_54x_sfp12, +as5712_54x_sfp13, as5712_54x_sfp14, as5712_54x_sfp15,as5712_54x_sfp16, +as5712_54x_sfp17, as5712_54x_sfp18, as5712_54x_sfp19,as5712_54x_sfp20, +as5712_54x_sfp21, as5712_54x_sfp22, as5712_54x_sfp23,as5712_54x_sfp24, +as5712_54x_sfp25, as5712_54x_sfp26, as5712_54x_sfp27,as5712_54x_sfp28, +as5712_54x_sfp29, as5712_54x_sfp30, as5712_54x_sfp31,as5712_54x_sfp32, +as5712_54x_sfp33, as5712_54x_sfp34, as5712_54x_sfp35,as5712_54x_sfp36, +as5712_54x_sfp37, as5712_54x_sfp38, as5712_54x_sfp39,as5712_54x_sfp40, +as5712_54x_sfp41, as5712_54x_sfp42, as5712_54x_sfp43,as5712_54x_sfp44, +as5712_54x_sfp45, as5712_54x_sfp46, as5712_54x_sfp47,as5712_54x_sfp48, +as5712_54x_sfp49, as5712_54x_sfp52, as5712_54x_sfp50,as5712_54x_sfp53, +as5712_54x_sfp51, as5712_54x_sfp54 +}; + +static const struct i2c_device_id as5712_54x_sfp_id[] = { +{ "as5712_54x_sfp1", as5712_54x_sfp1 }, { "as5712_54x_sfp2", as5712_54x_sfp2 }, +{ "as5712_54x_sfp3", as5712_54x_sfp3 }, { "as5712_54x_sfp4", as5712_54x_sfp4 }, +{ "as5712_54x_sfp5", as5712_54x_sfp5 }, { "as5712_54x_sfp6", as5712_54x_sfp6 }, +{ "as5712_54x_sfp7", as5712_54x_sfp7 }, { "as5712_54x_sfp8", as5712_54x_sfp8 }, +{ "as5712_54x_sfp9", as5712_54x_sfp9 }, { "as5712_54x_sfp10", as5712_54x_sfp10 }, +{ "as5712_54x_sfp11", as5712_54x_sfp11 }, { "as5712_54x_sfp12", as5712_54x_sfp12 }, +{ "as5712_54x_sfp13", as5712_54x_sfp13 }, { "as5712_54x_sfp14", as5712_54x_sfp14 }, +{ "as5712_54x_sfp15", as5712_54x_sfp15 }, { "as5712_54x_sfp16", as5712_54x_sfp16 }, +{ "as5712_54x_sfp17", as5712_54x_sfp17 }, { "as5712_54x_sfp18", as5712_54x_sfp18 }, +{ "as5712_54x_sfp19", as5712_54x_sfp19 }, { "as5712_54x_sfp20", as5712_54x_sfp20 }, +{ "as5712_54x_sfp21", as5712_54x_sfp21 }, { "as5712_54x_sfp22", as5712_54x_sfp22 }, +{ "as5712_54x_sfp23", as5712_54x_sfp23 }, { "as5712_54x_sfp24", as5712_54x_sfp24 }, +{ "as5712_54x_sfp25", as5712_54x_sfp25 }, { "as5712_54x_sfp26", as5712_54x_sfp26 }, +{ "as5712_54x_sfp27", as5712_54x_sfp27 }, { "as5712_54x_sfp28", as5712_54x_sfp28 }, +{ "as5712_54x_sfp29", as5712_54x_sfp29 }, { "as5712_54x_sfp30", as5712_54x_sfp30 }, +{ "as5712_54x_sfp31", as5712_54x_sfp31 }, { "as5712_54x_sfp32", as5712_54x_sfp32 }, +{ "as5712_54x_sfp33", as5712_54x_sfp33 }, { "as5712_54x_sfp34", as5712_54x_sfp34 }, +{ "as5712_54x_sfp35", as5712_54x_sfp35 }, { "as5712_54x_sfp36", as5712_54x_sfp36 }, +{ "as5712_54x_sfp37", as5712_54x_sfp37 }, { "as5712_54x_sfp38", as5712_54x_sfp38 }, +{ "as5712_54x_sfp39", as5712_54x_sfp39 }, { "as5712_54x_sfp40", as5712_54x_sfp40 }, +{ "as5712_54x_sfp41", as5712_54x_sfp41 }, { "as5712_54x_sfp42", as5712_54x_sfp42 }, +{ "as5712_54x_sfp43", as5712_54x_sfp43 }, { "as5712_54x_sfp44", as5712_54x_sfp44 }, +{ "as5712_54x_sfp45", as5712_54x_sfp45 }, { "as5712_54x_sfp46", as5712_54x_sfp46 }, +{ "as5712_54x_sfp47", as5712_54x_sfp47 }, { "as5712_54x_sfp48", as5712_54x_sfp48 }, +{ "as5712_54x_sfp49", as5712_54x_sfp49 }, { "as5712_54x_sfp50", as5712_54x_sfp50 }, +{ "as5712_54x_sfp51", as5712_54x_sfp51 }, { "as5712_54x_sfp52", as5712_54x_sfp52 }, +{ "as5712_54x_sfp53", as5712_54x_sfp53 }, { "as5712_54x_sfp54", as5712_54x_sfp54 }, + +{} +}; +MODULE_DEVICE_TABLE(i2c, as5712_54x_sfp_id); + +static struct i2c_driver as5712_54x_sfp_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as5712_54x_sfp", + }, + .probe = as5712_54x_sfp_probe, + .remove = as5712_54x_sfp_remove, + .id_table = as5712_54x_sfp_id, + .address_list = normal_i2c, +}; + +static int as5712_54x_sfp_read_byte(struct i2c_client *client, u8 command, u8 *data) +{ + int result = i2c_smbus_read_byte_data(client, command); + + if (unlikely(result < 0)) { + dev_dbg(&client->dev, "sfp read byte data failed, command(0x%2x), data(0x%2x)\r\n", command, result); + goto abort; + } + + *data = (u8)result; + result = 0; + +abort: + return result; +} + +#define ALWAYS_UPDATE_DEVICE 1 + +static struct as5712_54x_sfp_data *as5712_54x_sfp_update_device(struct device *dev, int update_eeprom) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5712_54x_sfp_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (ALWAYS_UPDATE_DEVICE || time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status = -1; + int i = 0, j = 0; + + data->valid = 0; + //dev_dbg(&client->dev, "Starting as5712_54x sfp status update\n"); + memset(data->status, 0, sizeof(data->status)); + + /* Read status of port 1~48(SFP port) */ + for (i = 0; i < 2; i++) { + for (j = 0; j < 12; j++) { + status = as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD2+i, 0x6+j); + + if (status < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", I2C_ADDR_CPLD2+i, 0x6+j, status); + goto exit; + } + + data->status[j/3] |= (u64)status << ((i*24) + (j%3)*8); + } + } + + /* + * Bring QSFPs out of reset, + * This is a temporary fix until the QSFP+_MOD_RST register + * can be exposed through the driver. + */ + as5712_54x_i2c_cpld_write(I2C_ADDR_CPLD3, 0x15, 0x3F); + + /* Read present status of port 49-54(QSFP port) */ + status = as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x14); + + if (status < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", I2C_ADDR_CPLD2+i, 0x6+j, status); + } + else { + data->status[SFP_IS_PRESENT] |= (u64)status << 48; + } + + if (update_eeprom) { + /* Read eeprom data based on port number */ + memset(data->eeprom, 0, sizeof(data->eeprom)); + + /* Check if the port is present */ + if ((data->status[SFP_IS_PRESENT] & BIT_INDEX(data->port)) == 0) { + /* read eeprom */ + for (i = 0; i < sizeof(data->eeprom); i++) { + status = as5712_54x_sfp_read_byte(client, i, data->eeprom + i); + + if (status < 0) { + dev_dbg(&client->dev, "unable to read eeprom from port(%d)\n", + CPLD_PORT_TO_FRONT_PORT(data->port)); + goto exit; + } + } + } + } + + data->valid = 1; + data->last_updated = jiffies; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(as5712_54x_sfp_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton as5712_54x_sfp driver"); +MODULE_LICENSE("GPL"); + +#if 0 + int i = 0, j = 0; + + data->valid = 0; + //dev_dbg(&client->dev, "Starting as5712_54x sfp update\n"); + memset(data->status, 0, sizeof(data->status)); + + /* Read status of port 1~48(SFP port) */ + for (i = 0; i < 2; i++) { + for (j = 0; j < 12; j++) { + status = as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD2+i, 0x6+j); + + if (status < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", I2C_ADDR_CPLD2+i, 0x6+j, status); + continue; + } + + data->status[j/3] |= (u64)status << ((i*24) + (j%3)*8); + } + } + + /* Read present status of port 49-54(QSFP port) */ + status = as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x14); + + if (status < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", I2C_ADDR_CPLD2+i, 0x6+j, status); + } + else { + data->status[SFP_IS_PRESENT] |= (u64)status << 48; + } +#endif + +/* Reserver to prevent from CPLD port mapping is changed + */ +#if 0 +BIT_INDEX(port_present_index[data->port]) +/* The bit index of is_present field read from CPLD + * Array index 0 is for as5712_54x_sfp1, + * index 1 is for as5712_54x_sfp2, and so on. + */ +static const int port_present_index[] = { + 4, 5, 6, 7, 9, 8, 11, 10, + 0, 1, 2, 3, 12, 13, 14, 15, +16, 17, 18, 19, 28, 29, 30, 31, +20, 21, 22, 23, 24, 25, 26, 27 +}; +#endif + +#if 0 +static struct as5712_54x_sfp_data *as5712_54x_sfp_update_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5712_54x_sfp_data *data = i2c_get_clientdata(client); + int status = -1; + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->status_last_updated + HZ + HZ / 2) + || !data->status_valid) { + int status = -1; + int i = 0, j = 0; + + data->status_valid = 0; + //dev_dbg(&client->dev, "Starting as5712_54x sfp status update\n"); + memset(data->status, 0, sizeof(data->status)); + + /* Read status of port 1~48(SFP port) */ + for (i = 0; i < 2; i++) { + for (j = 0; j < 12; j++) { + status = as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD2+i, 0x6+j); + + if (status < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", I2C_ADDR_CPLD2+i, 0x6+j, status); + goto exit; + } + + data->status[j/3] |= (u64)status << ((i*24) + (j%3)*8); + } + } + + /* + * Bring QSFPs out of reset, + * This is a temporary fix until the QSFP+_MOD_RST register + * can be exposed through the driver. + */ + as5712_54x_i2c_cpld_write(I2C_ADDR_CPLD3, 0x15, 0x3F); + + /* Read present status of port 49-54(QSFP port) */ + status = as5712_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x14); + + if (status < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", I2C_ADDR_CPLD2+i, 0x6+j, status); + } + else { + data->status[SFP_IS_PRESENT] |= (u64)status << 48; + } + + data->status_valid = 1; + data->status_last_updated = jiffies; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +static struct as5712_54x_sfp_data *as5712_54x_sfp_update_eeprom(struct device *dev) +{ + struct as5712_54x_sfp_data *data = NULL; + + data = as5712_54x_sfp_update_status(dev); + + if (data == NULL || data->status_valid == 0) { + data->eeprom_valid = 0; + return data; + } + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->eeprom_last_updated + HZ + HZ / 2) + || !data->eeprom_valid) { + int status = -1; + int i = 0; + + /* Read eeprom data based on port number */ + memset(data->eeprom, 0, sizeof(data->eeprom)); + + /* Check if the port is present */ + if ((data->status[SFP_IS_PRESENT] & BIT_INDEX(data->port)) == 0) { + /* read eeprom */ + for (i = 0; i < sizeof(data->eeprom)/I2C_SMBUS_BLOCK_MAX; i++) { + status = as5712_54x_sfp_read_block(client, i*I2C_SMBUS_BLOCK_MAX, + data->eeprom+(i*I2C_SMBUS_BLOCK_MAX), + I2C_SMBUS_BLOCK_MAX); + if (status < 0) { + dev_dbg(&client->dev, "unable to read eeprom from port(%d)\n", + CPLD_PORT_TO_FRONT_PORT(data->port)); + goto exit; + } + } + } + + data->eeprom_last_updated = jiffies; + data->eeprom_valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} +#endif diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/cpr_4011_4mxx.c b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/cpr_4011_4mxx.c new file mode 120000 index 00000000000..fd43cc1f1c7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/cpr_4011_4mxx.c @@ -0,0 +1 @@ +../../common/modules/cpr_4011_4mxx.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/i2c-mux-accton_as5712_54x_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/i2c-mux-accton_as5712_54x_cpld.c new file mode 100755 index 00000000000..9dbac9ca337 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/i2c-mux-accton_as5712_54x_cpld.c @@ -0,0 +1,1421 @@ +/* + * An I2C multiplexer dirver for accton as5712 CPLD + * + * Copyright (C) 2015 Accton Technology Corporation. + * Brandon Chuang + * + * This module supports the accton cpld that hold the channel select + * mechanism for other i2c slave devices, such as SFP. + * This includes the: + * Accton as5712_54x CPLD1/CPLD2/CPLD3 + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +#define NUM_OF_CPLD1_CHANS 0x0 +#define NUM_OF_CPLD2_CHANS 0x18 +#define NUM_OF_CPLD3_CHANS 0x1E +#define CPLD_CHANNEL_SELECT_REG 0x2 +#define CPLD_DESELECT_CHANNEL 0xFF + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +enum cpld_mux_type { + as5712_54x_cpld2, + as5712_54x_cpld3, + as5712_54x_cpld1 +}; + +struct as5712_54x_cpld_data { + enum cpld_mux_type type; + struct i2c_client *client; + u8 last_chan; /* last register value */ + + struct device *hwmon_dev; + struct mutex update_lock; +}; + +struct chip_desc { + u8 nchans; + u8 deselectChan; +}; + +/* Provide specs for the PCA954x types we know about */ +static const struct chip_desc chips[] = { + [as5712_54x_cpld1] = { + .nchans = NUM_OF_CPLD1_CHANS, + .deselectChan = CPLD_DESELECT_CHANNEL, + }, + [as5712_54x_cpld2] = { + .nchans = NUM_OF_CPLD2_CHANS, + .deselectChan = CPLD_DESELECT_CHANNEL, + }, + [as5712_54x_cpld3] = { + .nchans = NUM_OF_CPLD3_CHANS, + .deselectChan = CPLD_DESELECT_CHANNEL, + } +}; + +static const struct i2c_device_id as5712_54x_cpld_mux_id[] = { + { "as5712_54x_cpld1", as5712_54x_cpld1 }, + { "as5712_54x_cpld2", as5712_54x_cpld2 }, + { "as5712_54x_cpld3", as5712_54x_cpld3 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, as5712_54x_cpld_mux_id); + +#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index +#define TRANSCEIVER_TXDISABLE_ATTR_ID(index) MODULE_TXDISABLE_##index +#define TRANSCEIVER_RXLOS_ATTR_ID(index) MODULE_RXLOS_##index +#define TRANSCEIVER_TXFAULT_ATTR_ID(index) MODULE_TXFAULT_##index +#define TRANSCEIVER_LPMODE_ATTR_ID(index) MODULE_LPMODE_##index +#define TRANSCEIVER_RESET_ATTR_ID(index) MODULE_RESET_##index + +enum as5712_54x_cpld1_sysfs_attributes { + CPLD_VERSION, + ACCESS, + MODULE_PRESENT_ALL, + MODULE_RXLOS_ALL, + /* transceiver attributes */ + TRANSCEIVER_PRESENT_ATTR_ID(1), + TRANSCEIVER_PRESENT_ATTR_ID(2), + TRANSCEIVER_PRESENT_ATTR_ID(3), + TRANSCEIVER_PRESENT_ATTR_ID(4), + TRANSCEIVER_PRESENT_ATTR_ID(5), + TRANSCEIVER_PRESENT_ATTR_ID(6), + TRANSCEIVER_PRESENT_ATTR_ID(7), + TRANSCEIVER_PRESENT_ATTR_ID(8), + TRANSCEIVER_PRESENT_ATTR_ID(9), + TRANSCEIVER_PRESENT_ATTR_ID(10), + TRANSCEIVER_PRESENT_ATTR_ID(11), + TRANSCEIVER_PRESENT_ATTR_ID(12), + TRANSCEIVER_PRESENT_ATTR_ID(13), + TRANSCEIVER_PRESENT_ATTR_ID(14), + TRANSCEIVER_PRESENT_ATTR_ID(15), + TRANSCEIVER_PRESENT_ATTR_ID(16), + TRANSCEIVER_PRESENT_ATTR_ID(17), + TRANSCEIVER_PRESENT_ATTR_ID(18), + TRANSCEIVER_PRESENT_ATTR_ID(19), + TRANSCEIVER_PRESENT_ATTR_ID(20), + TRANSCEIVER_PRESENT_ATTR_ID(21), + TRANSCEIVER_PRESENT_ATTR_ID(22), + TRANSCEIVER_PRESENT_ATTR_ID(23), + TRANSCEIVER_PRESENT_ATTR_ID(24), + TRANSCEIVER_PRESENT_ATTR_ID(25), + TRANSCEIVER_PRESENT_ATTR_ID(26), + TRANSCEIVER_PRESENT_ATTR_ID(27), + TRANSCEIVER_PRESENT_ATTR_ID(28), + TRANSCEIVER_PRESENT_ATTR_ID(29), + TRANSCEIVER_PRESENT_ATTR_ID(30), + TRANSCEIVER_PRESENT_ATTR_ID(31), + TRANSCEIVER_PRESENT_ATTR_ID(32), + TRANSCEIVER_PRESENT_ATTR_ID(33), + TRANSCEIVER_PRESENT_ATTR_ID(34), + TRANSCEIVER_PRESENT_ATTR_ID(35), + TRANSCEIVER_PRESENT_ATTR_ID(36), + TRANSCEIVER_PRESENT_ATTR_ID(37), + TRANSCEIVER_PRESENT_ATTR_ID(38), + TRANSCEIVER_PRESENT_ATTR_ID(39), + TRANSCEIVER_PRESENT_ATTR_ID(40), + TRANSCEIVER_PRESENT_ATTR_ID(41), + TRANSCEIVER_PRESENT_ATTR_ID(42), + TRANSCEIVER_PRESENT_ATTR_ID(43), + TRANSCEIVER_PRESENT_ATTR_ID(44), + TRANSCEIVER_PRESENT_ATTR_ID(45), + TRANSCEIVER_PRESENT_ATTR_ID(46), + TRANSCEIVER_PRESENT_ATTR_ID(47), + TRANSCEIVER_PRESENT_ATTR_ID(48), + TRANSCEIVER_PRESENT_ATTR_ID(49), + TRANSCEIVER_PRESENT_ATTR_ID(50), + TRANSCEIVER_PRESENT_ATTR_ID(51), + TRANSCEIVER_PRESENT_ATTR_ID(52), + TRANSCEIVER_PRESENT_ATTR_ID(53), + TRANSCEIVER_PRESENT_ATTR_ID(54), + TRANSCEIVER_TXDISABLE_ATTR_ID(1), + TRANSCEIVER_TXDISABLE_ATTR_ID(2), + TRANSCEIVER_TXDISABLE_ATTR_ID(3), + TRANSCEIVER_TXDISABLE_ATTR_ID(4), + TRANSCEIVER_TXDISABLE_ATTR_ID(5), + TRANSCEIVER_TXDISABLE_ATTR_ID(6), + TRANSCEIVER_TXDISABLE_ATTR_ID(7), + TRANSCEIVER_TXDISABLE_ATTR_ID(8), + TRANSCEIVER_TXDISABLE_ATTR_ID(9), + TRANSCEIVER_TXDISABLE_ATTR_ID(10), + TRANSCEIVER_TXDISABLE_ATTR_ID(11), + TRANSCEIVER_TXDISABLE_ATTR_ID(12), + TRANSCEIVER_TXDISABLE_ATTR_ID(13), + TRANSCEIVER_TXDISABLE_ATTR_ID(14), + TRANSCEIVER_TXDISABLE_ATTR_ID(15), + TRANSCEIVER_TXDISABLE_ATTR_ID(16), + TRANSCEIVER_TXDISABLE_ATTR_ID(17), + TRANSCEIVER_TXDISABLE_ATTR_ID(18), + TRANSCEIVER_TXDISABLE_ATTR_ID(19), + TRANSCEIVER_TXDISABLE_ATTR_ID(20), + TRANSCEIVER_TXDISABLE_ATTR_ID(21), + TRANSCEIVER_TXDISABLE_ATTR_ID(22), + TRANSCEIVER_TXDISABLE_ATTR_ID(23), + TRANSCEIVER_TXDISABLE_ATTR_ID(24), + TRANSCEIVER_TXDISABLE_ATTR_ID(25), + TRANSCEIVER_TXDISABLE_ATTR_ID(26), + TRANSCEIVER_TXDISABLE_ATTR_ID(27), + TRANSCEIVER_TXDISABLE_ATTR_ID(28), + TRANSCEIVER_TXDISABLE_ATTR_ID(29), + TRANSCEIVER_TXDISABLE_ATTR_ID(30), + TRANSCEIVER_TXDISABLE_ATTR_ID(31), + TRANSCEIVER_TXDISABLE_ATTR_ID(32), + TRANSCEIVER_TXDISABLE_ATTR_ID(33), + TRANSCEIVER_TXDISABLE_ATTR_ID(34), + TRANSCEIVER_TXDISABLE_ATTR_ID(35), + TRANSCEIVER_TXDISABLE_ATTR_ID(36), + TRANSCEIVER_TXDISABLE_ATTR_ID(37), + TRANSCEIVER_TXDISABLE_ATTR_ID(38), + TRANSCEIVER_TXDISABLE_ATTR_ID(39), + TRANSCEIVER_TXDISABLE_ATTR_ID(40), + TRANSCEIVER_TXDISABLE_ATTR_ID(41), + TRANSCEIVER_TXDISABLE_ATTR_ID(42), + TRANSCEIVER_TXDISABLE_ATTR_ID(43), + TRANSCEIVER_TXDISABLE_ATTR_ID(44), + TRANSCEIVER_TXDISABLE_ATTR_ID(45), + TRANSCEIVER_TXDISABLE_ATTR_ID(46), + TRANSCEIVER_TXDISABLE_ATTR_ID(47), + TRANSCEIVER_TXDISABLE_ATTR_ID(48), + TRANSCEIVER_RXLOS_ATTR_ID(1), + TRANSCEIVER_RXLOS_ATTR_ID(2), + TRANSCEIVER_RXLOS_ATTR_ID(3), + TRANSCEIVER_RXLOS_ATTR_ID(4), + TRANSCEIVER_RXLOS_ATTR_ID(5), + TRANSCEIVER_RXLOS_ATTR_ID(6), + TRANSCEIVER_RXLOS_ATTR_ID(7), + TRANSCEIVER_RXLOS_ATTR_ID(8), + TRANSCEIVER_RXLOS_ATTR_ID(9), + TRANSCEIVER_RXLOS_ATTR_ID(10), + TRANSCEIVER_RXLOS_ATTR_ID(11), + TRANSCEIVER_RXLOS_ATTR_ID(12), + TRANSCEIVER_RXLOS_ATTR_ID(13), + TRANSCEIVER_RXLOS_ATTR_ID(14), + TRANSCEIVER_RXLOS_ATTR_ID(15), + TRANSCEIVER_RXLOS_ATTR_ID(16), + TRANSCEIVER_RXLOS_ATTR_ID(17), + TRANSCEIVER_RXLOS_ATTR_ID(18), + TRANSCEIVER_RXLOS_ATTR_ID(19), + TRANSCEIVER_RXLOS_ATTR_ID(20), + TRANSCEIVER_RXLOS_ATTR_ID(21), + TRANSCEIVER_RXLOS_ATTR_ID(22), + TRANSCEIVER_RXLOS_ATTR_ID(23), + TRANSCEIVER_RXLOS_ATTR_ID(24), + TRANSCEIVER_RXLOS_ATTR_ID(25), + TRANSCEIVER_RXLOS_ATTR_ID(26), + TRANSCEIVER_RXLOS_ATTR_ID(27), + TRANSCEIVER_RXLOS_ATTR_ID(28), + TRANSCEIVER_RXLOS_ATTR_ID(29), + TRANSCEIVER_RXLOS_ATTR_ID(30), + TRANSCEIVER_RXLOS_ATTR_ID(31), + TRANSCEIVER_RXLOS_ATTR_ID(32), + TRANSCEIVER_RXLOS_ATTR_ID(33), + TRANSCEIVER_RXLOS_ATTR_ID(34), + TRANSCEIVER_RXLOS_ATTR_ID(35), + TRANSCEIVER_RXLOS_ATTR_ID(36), + TRANSCEIVER_RXLOS_ATTR_ID(37), + TRANSCEIVER_RXLOS_ATTR_ID(38), + TRANSCEIVER_RXLOS_ATTR_ID(39), + TRANSCEIVER_RXLOS_ATTR_ID(40), + TRANSCEIVER_RXLOS_ATTR_ID(41), + TRANSCEIVER_RXLOS_ATTR_ID(42), + TRANSCEIVER_RXLOS_ATTR_ID(43), + TRANSCEIVER_RXLOS_ATTR_ID(44), + TRANSCEIVER_RXLOS_ATTR_ID(45), + TRANSCEIVER_RXLOS_ATTR_ID(46), + TRANSCEIVER_RXLOS_ATTR_ID(47), + TRANSCEIVER_RXLOS_ATTR_ID(48), + TRANSCEIVER_TXFAULT_ATTR_ID(1), + TRANSCEIVER_TXFAULT_ATTR_ID(2), + TRANSCEIVER_TXFAULT_ATTR_ID(3), + TRANSCEIVER_TXFAULT_ATTR_ID(4), + TRANSCEIVER_TXFAULT_ATTR_ID(5), + TRANSCEIVER_TXFAULT_ATTR_ID(6), + TRANSCEIVER_TXFAULT_ATTR_ID(7), + TRANSCEIVER_TXFAULT_ATTR_ID(8), + TRANSCEIVER_TXFAULT_ATTR_ID(9), + TRANSCEIVER_TXFAULT_ATTR_ID(10), + TRANSCEIVER_TXFAULT_ATTR_ID(11), + TRANSCEIVER_TXFAULT_ATTR_ID(12), + TRANSCEIVER_TXFAULT_ATTR_ID(13), + TRANSCEIVER_TXFAULT_ATTR_ID(14), + TRANSCEIVER_TXFAULT_ATTR_ID(15), + TRANSCEIVER_TXFAULT_ATTR_ID(16), + TRANSCEIVER_TXFAULT_ATTR_ID(17), + TRANSCEIVER_TXFAULT_ATTR_ID(18), + TRANSCEIVER_TXFAULT_ATTR_ID(19), + TRANSCEIVER_TXFAULT_ATTR_ID(20), + TRANSCEIVER_TXFAULT_ATTR_ID(21), + TRANSCEIVER_TXFAULT_ATTR_ID(22), + TRANSCEIVER_TXFAULT_ATTR_ID(23), + TRANSCEIVER_TXFAULT_ATTR_ID(24), + TRANSCEIVER_TXFAULT_ATTR_ID(25), + TRANSCEIVER_TXFAULT_ATTR_ID(26), + TRANSCEIVER_TXFAULT_ATTR_ID(27), + TRANSCEIVER_TXFAULT_ATTR_ID(28), + TRANSCEIVER_TXFAULT_ATTR_ID(29), + TRANSCEIVER_TXFAULT_ATTR_ID(30), + TRANSCEIVER_TXFAULT_ATTR_ID(31), + TRANSCEIVER_TXFAULT_ATTR_ID(32), + TRANSCEIVER_TXFAULT_ATTR_ID(33), + TRANSCEIVER_TXFAULT_ATTR_ID(34), + TRANSCEIVER_TXFAULT_ATTR_ID(35), + TRANSCEIVER_TXFAULT_ATTR_ID(36), + TRANSCEIVER_TXFAULT_ATTR_ID(37), + TRANSCEIVER_TXFAULT_ATTR_ID(38), + TRANSCEIVER_TXFAULT_ATTR_ID(39), + TRANSCEIVER_TXFAULT_ATTR_ID(40), + TRANSCEIVER_TXFAULT_ATTR_ID(41), + TRANSCEIVER_TXFAULT_ATTR_ID(42), + TRANSCEIVER_TXFAULT_ATTR_ID(43), + TRANSCEIVER_TXFAULT_ATTR_ID(44), + TRANSCEIVER_TXFAULT_ATTR_ID(45), + TRANSCEIVER_TXFAULT_ATTR_ID(46), + TRANSCEIVER_TXFAULT_ATTR_ID(47), + TRANSCEIVER_TXFAULT_ATTR_ID(48), + TRANSCEIVER_LPMODE_ATTR_ID(49), + TRANSCEIVER_LPMODE_ATTR_ID(50), + TRANSCEIVER_LPMODE_ATTR_ID(51), + TRANSCEIVER_LPMODE_ATTR_ID(52), + TRANSCEIVER_LPMODE_ATTR_ID(53), + TRANSCEIVER_LPMODE_ATTR_ID(54), + TRANSCEIVER_RESET_ATTR_ID(49), + TRANSCEIVER_RESET_ATTR_ID(50), + TRANSCEIVER_RESET_ATTR_ID(51), + TRANSCEIVER_RESET_ATTR_ID(52), + TRANSCEIVER_RESET_ATTR_ID(53), + TRANSCEIVER_RESET_ATTR_ID(54), +}; + +/* sysfs attributes for hwmon + */ +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_rxlos_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t set_lp_mode(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +static int as5712_54x_cpld_read_internal(struct i2c_client *client, u8 reg); +static int as5712_54x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value); + +/* transceiver attributes */ +#define DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_status, NULL, MODULE_PRESENT_##index) +#define DECLARE_TRANSCEIVER_PRESENT_ATTR(index) &sensor_dev_attr_module_present_##index.dev_attr.attr + +#define DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_tx_disable_##index, S_IRUGO | S_IWUSR, show_status, set_tx_disable, MODULE_TXDISABLE_##index); \ + static SENSOR_DEVICE_ATTR(module_rx_los_##index, S_IRUGO, show_status, NULL, MODULE_RXLOS_##index); \ + static SENSOR_DEVICE_ATTR(module_tx_fault_##index, S_IRUGO, show_status, NULL, MODULE_TXFAULT_##index) + +#define DECLARE_SFP_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_tx_disable_##index.dev_attr.attr, \ + &sensor_dev_attr_module_rx_los_##index.dev_attr.attr, \ + &sensor_dev_attr_module_tx_fault_##index.dev_attr.attr + +#define DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_lp_mode_##index, S_IRUGO | S_IWUSR, show_status, set_lp_mode, MODULE_LPMODE_##index); \ + static SENSOR_DEVICE_ATTR(module_reset_##index, S_IWUSR | S_IRUGO, show_status, set_mode_reset, MODULE_RESET_##index) + +#define DECLARE_QSFP_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_lp_mode_##index.dev_attr.attr, \ + &sensor_dev_attr_module_reset_##index.dev_attr.attr + + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS); +/* transceiver attributes */ +static SENSOR_DEVICE_ATTR(module_present_all, S_IRUGO, show_present_all, NULL, MODULE_PRESENT_ALL); +static SENSOR_DEVICE_ATTR(module_rx_los_all, S_IRUGO, show_rxlos_all, NULL, MODULE_RXLOS_ALL); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(1); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(2); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(3); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(4); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(5); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(6); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(7); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(8); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(9); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(10); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(11); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(12); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(13); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(14); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(15); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(16); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(17); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(18); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(19); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(20); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(21); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(22); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(23); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(24); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(25); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(26); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(27); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(28); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(29); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(30); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(31); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(32); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(33); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(34); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(35); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(36); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(37); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(38); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(39); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(40); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(41); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(42); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(43); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(44); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(45); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(46); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(47); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(48); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(49); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(50); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(51); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(52); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(53); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(54); + +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(1); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(2); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(3); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(4); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(5); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(6); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(7); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(8); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(9); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(10); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(11); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(12); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(13); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(14); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(15); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(16); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(17); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(18); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(19); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(20); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(21); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(22); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(23); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(24); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(25); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(26); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(27); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(28); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(29); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(30); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(31); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(32); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(33); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(34); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(35); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(36); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(37); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(38); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(39); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(40); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(41); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(42); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(43); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(44); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(45); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(46); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(47); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(48); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(49); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(50); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(51); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(52); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(53); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(54); + +static struct attribute *as5712_54x_cpld1_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + NULL +}; + +static const struct attribute_group as5712_54x_cpld1_group = { + .attrs = as5712_54x_cpld1_attributes, +}; + +static struct attribute *as5712_54x_cpld2_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + &sensor_dev_attr_module_rx_los_all.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(1), + DECLARE_TRANSCEIVER_PRESENT_ATTR(2), + DECLARE_TRANSCEIVER_PRESENT_ATTR(3), + DECLARE_TRANSCEIVER_PRESENT_ATTR(4), + DECLARE_TRANSCEIVER_PRESENT_ATTR(5), + DECLARE_TRANSCEIVER_PRESENT_ATTR(6), + DECLARE_TRANSCEIVER_PRESENT_ATTR(7), + DECLARE_TRANSCEIVER_PRESENT_ATTR(8), + DECLARE_TRANSCEIVER_PRESENT_ATTR(9), + DECLARE_TRANSCEIVER_PRESENT_ATTR(10), + DECLARE_TRANSCEIVER_PRESENT_ATTR(11), + DECLARE_TRANSCEIVER_PRESENT_ATTR(12), + DECLARE_TRANSCEIVER_PRESENT_ATTR(13), + DECLARE_TRANSCEIVER_PRESENT_ATTR(14), + DECLARE_TRANSCEIVER_PRESENT_ATTR(15), + DECLARE_TRANSCEIVER_PRESENT_ATTR(16), + DECLARE_TRANSCEIVER_PRESENT_ATTR(17), + DECLARE_TRANSCEIVER_PRESENT_ATTR(18), + DECLARE_TRANSCEIVER_PRESENT_ATTR(19), + DECLARE_TRANSCEIVER_PRESENT_ATTR(20), + DECLARE_TRANSCEIVER_PRESENT_ATTR(21), + DECLARE_TRANSCEIVER_PRESENT_ATTR(22), + DECLARE_TRANSCEIVER_PRESENT_ATTR(23), + DECLARE_TRANSCEIVER_PRESENT_ATTR(24), + DECLARE_SFP_TRANSCEIVER_ATTR(1), + DECLARE_SFP_TRANSCEIVER_ATTR(2), + DECLARE_SFP_TRANSCEIVER_ATTR(3), + DECLARE_SFP_TRANSCEIVER_ATTR(4), + DECLARE_SFP_TRANSCEIVER_ATTR(5), + DECLARE_SFP_TRANSCEIVER_ATTR(6), + DECLARE_SFP_TRANSCEIVER_ATTR(7), + DECLARE_SFP_TRANSCEIVER_ATTR(8), + DECLARE_SFP_TRANSCEIVER_ATTR(9), + DECLARE_SFP_TRANSCEIVER_ATTR(10), + DECLARE_SFP_TRANSCEIVER_ATTR(11), + DECLARE_SFP_TRANSCEIVER_ATTR(12), + DECLARE_SFP_TRANSCEIVER_ATTR(13), + DECLARE_SFP_TRANSCEIVER_ATTR(14), + DECLARE_SFP_TRANSCEIVER_ATTR(15), + DECLARE_SFP_TRANSCEIVER_ATTR(16), + DECLARE_SFP_TRANSCEIVER_ATTR(17), + DECLARE_SFP_TRANSCEIVER_ATTR(18), + DECLARE_SFP_TRANSCEIVER_ATTR(19), + DECLARE_SFP_TRANSCEIVER_ATTR(20), + DECLARE_SFP_TRANSCEIVER_ATTR(21), + DECLARE_SFP_TRANSCEIVER_ATTR(22), + DECLARE_SFP_TRANSCEIVER_ATTR(23), + DECLARE_SFP_TRANSCEIVER_ATTR(24), + NULL +}; + +static const struct attribute_group as5712_54x_cpld2_group = { + .attrs = as5712_54x_cpld2_attributes, +}; + +static struct attribute *as5712_54x_cpld3_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + &sensor_dev_attr_module_rx_los_all.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(25), + DECLARE_TRANSCEIVER_PRESENT_ATTR(26), + DECLARE_TRANSCEIVER_PRESENT_ATTR(27), + DECLARE_TRANSCEIVER_PRESENT_ATTR(28), + DECLARE_TRANSCEIVER_PRESENT_ATTR(29), + DECLARE_TRANSCEIVER_PRESENT_ATTR(30), + DECLARE_TRANSCEIVER_PRESENT_ATTR(31), + DECLARE_TRANSCEIVER_PRESENT_ATTR(32), + DECLARE_TRANSCEIVER_PRESENT_ATTR(33), + DECLARE_TRANSCEIVER_PRESENT_ATTR(34), + DECLARE_TRANSCEIVER_PRESENT_ATTR(35), + DECLARE_TRANSCEIVER_PRESENT_ATTR(36), + DECLARE_TRANSCEIVER_PRESENT_ATTR(37), + DECLARE_TRANSCEIVER_PRESENT_ATTR(38), + DECLARE_TRANSCEIVER_PRESENT_ATTR(39), + DECLARE_TRANSCEIVER_PRESENT_ATTR(40), + DECLARE_TRANSCEIVER_PRESENT_ATTR(41), + DECLARE_TRANSCEIVER_PRESENT_ATTR(42), + DECLARE_TRANSCEIVER_PRESENT_ATTR(43), + DECLARE_TRANSCEIVER_PRESENT_ATTR(44), + DECLARE_TRANSCEIVER_PRESENT_ATTR(45), + DECLARE_TRANSCEIVER_PRESENT_ATTR(46), + DECLARE_TRANSCEIVER_PRESENT_ATTR(47), + DECLARE_TRANSCEIVER_PRESENT_ATTR(48), + DECLARE_TRANSCEIVER_PRESENT_ATTR(49), + DECLARE_TRANSCEIVER_PRESENT_ATTR(50), + DECLARE_TRANSCEIVER_PRESENT_ATTR(51), + DECLARE_TRANSCEIVER_PRESENT_ATTR(52), + DECLARE_TRANSCEIVER_PRESENT_ATTR(53), + DECLARE_TRANSCEIVER_PRESENT_ATTR(54), + DECLARE_SFP_TRANSCEIVER_ATTR(25), + DECLARE_SFP_TRANSCEIVER_ATTR(26), + DECLARE_SFP_TRANSCEIVER_ATTR(27), + DECLARE_SFP_TRANSCEIVER_ATTR(28), + DECLARE_SFP_TRANSCEIVER_ATTR(29), + DECLARE_SFP_TRANSCEIVER_ATTR(30), + DECLARE_SFP_TRANSCEIVER_ATTR(31), + DECLARE_SFP_TRANSCEIVER_ATTR(32), + DECLARE_SFP_TRANSCEIVER_ATTR(33), + DECLARE_SFP_TRANSCEIVER_ATTR(34), + DECLARE_SFP_TRANSCEIVER_ATTR(35), + DECLARE_SFP_TRANSCEIVER_ATTR(36), + DECLARE_SFP_TRANSCEIVER_ATTR(37), + DECLARE_SFP_TRANSCEIVER_ATTR(38), + DECLARE_SFP_TRANSCEIVER_ATTR(39), + DECLARE_SFP_TRANSCEIVER_ATTR(40), + DECLARE_SFP_TRANSCEIVER_ATTR(41), + DECLARE_SFP_TRANSCEIVER_ATTR(42), + DECLARE_SFP_TRANSCEIVER_ATTR(43), + DECLARE_SFP_TRANSCEIVER_ATTR(44), + DECLARE_SFP_TRANSCEIVER_ATTR(45), + DECLARE_SFP_TRANSCEIVER_ATTR(46), + DECLARE_SFP_TRANSCEIVER_ATTR(47), + DECLARE_SFP_TRANSCEIVER_ATTR(48), + DECLARE_QSFP_TRANSCEIVER_ATTR(49), + DECLARE_QSFP_TRANSCEIVER_ATTR(50), + DECLARE_QSFP_TRANSCEIVER_ATTR(51), + DECLARE_QSFP_TRANSCEIVER_ATTR(52), + DECLARE_QSFP_TRANSCEIVER_ATTR(53), + DECLARE_QSFP_TRANSCEIVER_ATTR(54), + NULL +}; + +static const struct attribute_group as5712_54x_cpld3_group = { + .attrs = as5712_54x_cpld3_attributes, +}; + +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status, num_regs = 0; + u8 values[4] = {0}; + u8 regs[] = {0x6, 0x7, 0x8, 0x14}; + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5712_54x_cpld_data *data = i2c_mux_priv(muxc); + + mutex_lock(&data->update_lock); + + num_regs = (data->type == as5712_54x_cpld2) ? 3 : 4; + + for (i = 0; i < num_regs; i++) { + status = as5712_54x_cpld_read_internal(client, regs[i]); + + if (status < 0) { + goto exit; + } + + values[i] = ~(u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values 1 -> 54 in order */ + if (data->type == as5712_54x_cpld2) { + status = sprintf(buf, "%.2x %.2x %.2x\n", + values[0], values[1], values[2]); + } + else { /* as5712_54x_cpld3 */ + values[3] &= 0x3F; + status = sprintf(buf, "%.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], values[3]); + } + + return status; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_rxlos_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u8 values[3] = {0}; + u8 regs[] = {0xF, 0x10, 0x11}; + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5712_54x_cpld_data *data = i2c_mux_priv(muxc); + + mutex_lock(&data->update_lock); + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = as5712_54x_cpld_read_internal(client, regs[i]); + + if (status < 0) { + goto exit; + } + + values[i] = (u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values 1 -> 24 in order */ + return sprintf(buf, "%.2x %.2x %.2x\n", values[0], values[1], values[2]); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5712_54x_cpld_data *data = i2c_mux_priv(muxc); + int status = 0; + u8 reg = 0, mask = 0, revert = 0; + + switch (attr->index) { + case MODULE_PRESENT_1 ... MODULE_PRESENT_8: + reg = 0x6; + mask = 0x1 << (attr->index - MODULE_PRESENT_1); + break; + case MODULE_PRESENT_9 ... MODULE_PRESENT_16: + reg = 0x7; + mask = 0x1 << (attr->index - MODULE_PRESENT_9); + break; + case MODULE_PRESENT_17 ... MODULE_PRESENT_24: + reg = 0x8; + mask = 0x1 << (attr->index - MODULE_PRESENT_17); + break; + case MODULE_PRESENT_25 ... MODULE_PRESENT_32: + reg = 0x6; + mask = 0x1 << (attr->index - MODULE_PRESENT_25); + break; + case MODULE_PRESENT_33 ... MODULE_PRESENT_40: + reg = 0x7; + mask = 0x1 << (attr->index - MODULE_PRESENT_33); + break; + case MODULE_PRESENT_41 ... MODULE_PRESENT_48: + reg = 0x8; + mask = 0x1 << (attr->index - MODULE_PRESENT_41); + break; + case MODULE_PRESENT_49: + reg = 0x14; + mask = 0x1; + break; + case MODULE_PRESENT_50: + reg = 0x14; + mask = 0x4; + break; + case MODULE_PRESENT_51: + reg = 0x14; + mask = 0x10; + break; + case MODULE_PRESENT_52: + reg = 0x14; + mask = 0x2; + break; + case MODULE_PRESENT_53: + reg = 0x14; + mask = 0x8; + break; + case MODULE_PRESENT_54: + reg = 0x14; + mask = 0x20; + break; + case MODULE_TXFAULT_1 ... MODULE_TXFAULT_8: + reg = 0x9; + mask = 0x1 << (attr->index - MODULE_TXFAULT_1); + break; + case MODULE_TXFAULT_9 ... MODULE_TXFAULT_16: + reg = 0xA; + mask = 0x1 << (attr->index - MODULE_TXFAULT_9); + break; + case MODULE_TXFAULT_17 ... MODULE_TXFAULT_24: + reg = 0xB; + mask = 0x1 << (attr->index - MODULE_TXFAULT_17); + break; + case MODULE_TXFAULT_25 ... MODULE_TXFAULT_32: + reg = 0x9; + mask = 0x1 << (attr->index - MODULE_TXFAULT_25); + break; + case MODULE_TXFAULT_33 ... MODULE_TXFAULT_40: + reg = 0xA; + mask = 0x1 << (attr->index - MODULE_TXFAULT_33); + break; + case MODULE_TXFAULT_41 ... MODULE_TXFAULT_48: + reg = 0xB; + mask = 0x1 << (attr->index - MODULE_TXFAULT_41); + break; + case MODULE_TXDISABLE_1 ... MODULE_TXDISABLE_8: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_1); + break; + case MODULE_TXDISABLE_9 ... MODULE_TXDISABLE_16: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_9); + break; + case MODULE_TXDISABLE_17 ... MODULE_TXDISABLE_24: + reg = 0xE; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_17); + break; + case MODULE_TXDISABLE_25 ... MODULE_TXDISABLE_32: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_25); + break; + case MODULE_TXDISABLE_33 ... MODULE_TXDISABLE_40: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_33); + break; + case MODULE_TXDISABLE_41 ... MODULE_TXDISABLE_48: + reg = 0xE; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_41); + break; + case MODULE_RXLOS_1 ... MODULE_RXLOS_8: + reg = 0xF; + mask = 0x1 << (attr->index - MODULE_RXLOS_1); + break; + case MODULE_RXLOS_9 ... MODULE_RXLOS_16: + reg = 0x10; + mask = 0x1 << (attr->index - MODULE_RXLOS_9); + break; + case MODULE_RXLOS_17 ... MODULE_RXLOS_24: + reg = 0x11; + mask = 0x1 << (attr->index - MODULE_RXLOS_17); + break; + case MODULE_RXLOS_25 ... MODULE_RXLOS_32: + reg = 0xF; + mask = 0x1 << (attr->index - MODULE_RXLOS_25); + break; + case MODULE_RXLOS_33 ... MODULE_RXLOS_40: + reg = 0x10; + mask = 0x1 << (attr->index - MODULE_RXLOS_33); + break; + case MODULE_RXLOS_41 ... MODULE_RXLOS_48: + reg = 0x11; + mask = 0x1 << (attr->index - MODULE_RXLOS_41); + break; + case MODULE_LPMODE_49 ... MODULE_LPMODE_54: + reg = 0x16; + mask = 0x1 << (attr->index - MODULE_LPMODE_49); + break; + case MODULE_RESET_49 ... MODULE_RESET_54: + reg = 0x15; + mask = 0x1 << (attr->index - MODULE_RESET_49); + break; + default: + return 0; + } + + if (attr->index >= MODULE_PRESENT_1 && attr->index <= MODULE_PRESENT_54) { + revert = 1; + } + + mutex_lock(&data->update_lock); + status = as5712_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", revert ? !(status & mask) : !!(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5712_54x_cpld_data *data = i2c_mux_priv(muxc); + long disable; + int status; + u8 reg = 0, mask = 0; + + status = kstrtol(buf, 10, &disable); + if (status) { + return status; + } + + switch (attr->index) { + case MODULE_TXDISABLE_1 ... MODULE_TXDISABLE_8: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_1); + break; + case MODULE_TXDISABLE_9 ... MODULE_TXDISABLE_16: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_9); + break; + case MODULE_TXDISABLE_17 ... MODULE_TXDISABLE_24: + reg = 0xE; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_17); + break; + case MODULE_TXDISABLE_25 ... MODULE_TXDISABLE_32: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_25); + break; + case MODULE_TXDISABLE_33 ... MODULE_TXDISABLE_40: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_33); + break; + case MODULE_TXDISABLE_41 ... MODULE_TXDISABLE_48: + reg = 0xE; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_41); + break; + default: + return 0; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as5712_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update tx_disable status */ + if (disable) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as5712_54x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_lp_mode(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5712_54x_cpld_data *data = i2c_mux_priv(muxc); + + long on; + int status= -ENOENT; + u8 reg = 0x16, mask = 0; + + if(attr->index < MODULE_LPMODE_49 || attr->index > MODULE_LPMODE_54) + return status; + + status = kstrtol(buf, 10, &on); + if (status) { + return status; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as5712_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + mask = 0x1 << (attr->index - MODULE_LPMODE_49); + + /* Update lp_mode status */ + if (on) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as5712_54x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; + +} + +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5712_54x_cpld_data *data = i2c_mux_priv(muxc); + + long on; + int status= -ENOENT; + u8 reg = 0x15, mask = 0; + + if(attr->index < MODULE_RESET_49 || attr->index > MODULE_RESET_54) + return status; + + status = kstrtol(buf, 10, &on); + if (status) { + return status; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as5712_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + mask = 0x1 << (attr->index - MODULE_RESET_49); + + /* Update tx_disable status */ + if (on) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as5712_54x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; + +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5712_54x_cpld_data *data = i2c_mux_priv(muxc); + int status; + u32 addr, val; + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = as5712_54x_cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() + for this as they will try to lock adapter a second time */ +static int as5712_54x_cpld_mux_reg_write(struct i2c_adapter *adap, + struct i2c_client *client, u8 val) +{ + unsigned long orig_jiffies; + unsigned short flags; + union i2c_smbus_data data; + int try; + s32 res = -EIO; + + data.byte = val; + flags = client->flags; + flags &= I2C_M_TEN | I2C_CLIENT_PEC; + + if (adap->algo->smbus_xfer) { + /* Retry automatically on arbitration loss */ + orig_jiffies = jiffies; + for (res = 0, try = 0; try <= adap->retries; try++) { + res = adap->algo->smbus_xfer(adap, client->addr, flags, + I2C_SMBUS_WRITE, CPLD_CHANNEL_SELECT_REG, + I2C_SMBUS_BYTE_DATA, &data); + if (res != -EAGAIN) + break; + if (time_after(jiffies, + orig_jiffies + adap->timeout)) + break; + } + } + + return res; +} + +static int as5712_54x_cpld_mux_select_chan(struct i2c_mux_core *muxc, + u32 chan) +{ + struct as5712_54x_cpld_data *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + u8 regval; + int ret = 0; + + regval = chan; + /* Only select the channel if its different from the last channel */ + if (data->last_chan != regval) { + ret = as5712_54x_cpld_mux_reg_write(muxc->parent, client, regval); + data->last_chan = regval; + } + + return ret; +} + +static int as5712_54x_cpld_mux_deselect_mux(struct i2c_mux_core *muxc, + u32 chan) +{ + struct as5712_54x_cpld_data *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + + /* Deselect active channel */ + data->last_chan = chips[data->type].deselectChan; + + return as5712_54x_cpld_mux_reg_write(muxc->parent, client, data->last_chan); +} + +static void as5712_54x_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as5712_54x_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, 0x1); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d", val); +} + +/* + * I2C init/probing/exit functions + */ +static int as5712_54x_cpld_mux_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + int num, force, class; + struct i2c_mux_core *muxc; + struct as5712_54x_cpld_data *data; + int ret = 0; + const struct attribute_group *group = NULL; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + return -ENODEV; + + muxc = i2c_mux_alloc(adap, &client->dev, + chips[id->driver_data].nchans, sizeof(*data), 0, + as5712_54x_cpld_mux_select_chan, as5712_54x_cpld_mux_deselect_mux); + if (!muxc) + return -ENOMEM; + + i2c_set_clientdata(client, muxc); + data = i2c_mux_priv(muxc); + data->client = client; + data->type = id->driver_data; + data->last_chan = chips[data->type].deselectChan; /* force the first selection */ + mutex_init(&data->update_lock); + + /* Now create an adapter for each channel */ + for (num = 0; num < chips[data->type].nchans; num++) { + force = 0; /* dynamic adap number */ + class = 0; /* no class by default */ + + ret = i2c_mux_add_adapter(muxc, force, num, class); + + if (ret) { + dev_err(&client->dev, + "failed to register multiplexed adapter" + " %d as bus %d\n", num, force); + goto add_mux_failed; + } + } + + /* Register sysfs hooks */ + switch (data->type) { + case as5712_54x_cpld1: + group = &as5712_54x_cpld1_group; + break; + case as5712_54x_cpld2: + group = &as5712_54x_cpld2_group; + break; + case as5712_54x_cpld3: + group = &as5712_54x_cpld3_group; + + /* Bring QSFPs out of reset */ + as5712_54x_cpld_write_internal(client, 0x15, 0x3F); + break; + default: + break; + } + + if (group) { + ret = sysfs_create_group(&client->dev.kobj, group); + if (ret) { + goto add_mux_failed; + } + } + + if (chips[data->type].nchans) { + dev_info(&client->dev, + "registered %d multiplexed busses for I2C %s\n", + num, client->name); + } + else { + dev_info(&client->dev, + "device %s registered\n", client->name); + } + + as5712_54x_cpld_add_client(client); + + return 0; + +add_mux_failed: + i2c_mux_del_adapters(muxc); + return ret; +} + +static int as5712_54x_cpld_mux_remove(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5712_54x_cpld_data *data = i2c_mux_priv(muxc); + const struct attribute_group *group = NULL; + + as5712_54x_cpld_remove_client(client); + + /* Remove sysfs hooks */ + switch (data->type) { + case as5712_54x_cpld1: + group = &as5712_54x_cpld1_group; + break; + case as5712_54x_cpld2: + group = &as5712_54x_cpld2_group; + break; + case as5712_54x_cpld3: + group = &as5712_54x_cpld3_group; + break; + default: + break; + } + + if (group) { + sysfs_remove_group(&client->dev.kobj, group); + } + + i2c_mux_del_adapters(muxc); + + return 0; +} + +static int as5712_54x_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int as5712_54x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +int as5712_54x_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as5712_54x_cpld_read_internal(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as5712_54x_cpld_read); + +int as5712_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as5712_54x_cpld_write_internal(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as5712_54x_cpld_write); + +static struct i2c_driver as5712_54x_cpld_mux_driver = { + .driver = { + .name = "as5712_54x_cpld", + .owner = THIS_MODULE, + }, + .probe = as5712_54x_cpld_mux_probe, + .remove = as5712_54x_cpld_mux_remove, + .id_table = as5712_54x_cpld_mux_id, +}; + +static int __init as5712_54x_cpld_mux_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as5712_54x_cpld_mux_driver); +} + +static void __exit as5712_54x_cpld_mux_exit(void) +{ + i2c_del_driver(&as5712_54x_cpld_mux_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("Accton as5712-54x CPLD driver"); +MODULE_LICENSE("GPL"); + +module_init(as5712_54x_cpld_mux_init); +module_exit(as5712_54x_cpld_mux_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/leds-accton_as5712_54x.c b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/leds-accton_as5712_54x.c new file mode 100755 index 00000000000..cdea927368a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/leds-accton_as5712_54x.c @@ -0,0 +1,594 @@ +/* + * A LED driver for the accton_as5712_54x_led + * + * Copyright (C) 2013 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#if 0 +#define DEBUG +#endif + +#include +#include +#include +#include +#include +#include +#include + +extern int as5712_54x_cpld_read (unsigned short cpld_addr, u8 reg); +extern int as5712_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern void led_classdev_unregister(struct led_classdev *led_cdev); +extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); +extern void led_classdev_resume(struct led_classdev *led_cdev); +extern void led_classdev_suspend(struct led_classdev *led_cdev); + +#define DRVNAME "as5712_54x_led" + +struct accton_as5712_54x_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[4]; /* Register value, 0 = LOC/DIAG/FAN LED + 1 = PSU1/PSU2 LED + 2 = FAN1-4 LED + 3 = FAN5-6 LED */ +}; + +static struct accton_as5712_54x_led_data *ledctl = NULL; + +/* LED related data + */ +#define LED_TYPE_PSU1_REG_MASK 0x03 +#define LED_MODE_PSU1_GREEN_MASK 0x02 +#define LED_MODE_PSU1_AMBER_MASK 0x01 +#define LED_MODE_PSU1_OFF_MASK 0x03 +#define LED_MODE_PSU1_AUTO_MASK 0x00 + +#define LED_TYPE_PSU2_REG_MASK 0x0C +#define LED_MODE_PSU2_GREEN_MASK 0x08 +#define LED_MODE_PSU2_AMBER_MASK 0x04 +#define LED_MODE_PSU2_OFF_MASK 0x0C +#define LED_MODE_PSU2_AUTO_MASK 0x00 + +#define LED_TYPE_DIAG_REG_MASK 0x0C +#define LED_MODE_DIAG_GREEN_MASK 0x08 +#define LED_MODE_DIAG_AMBER_MASK 0x04 +#define LED_MODE_DIAG_OFF_MASK 0x0C + +#define LED_TYPE_FAN_REG_MASK 0x03 +#define LED_MODE_FAN_GREEN_MASK 0x02 +#define LED_MODE_FAN_AMBER_MASK 0x01 +#define LED_MODE_FAN_OFF_MASK 0x03 +#define LED_MODE_FAN_AUTO_MASK 0x00 + +#define LED_TYPE_FAN1_REG_MASK 0x03 +#define LED_TYPE_FAN2_REG_MASK 0x0C +#define LED_TYPE_FAN3_REG_MASK 0x30 +#define LED_TYPE_FAN4_REG_MASK 0xC0 +#define LED_TYPE_FAN5_REG_MASK 0x03 +#define LED_TYPE_FAN6_REG_MASK 0x0C + +#define LED_MODE_FANX_GREEN_MASK 0x01 +#define LED_MODE_FANX_RED_MASK 0x02 +#define LED_MODE_FANX_OFF_MASK 0x00 + +#define LED_TYPE_LOC_REG_MASK 0x30 +#define LED_MODE_LOC_ON_MASK 0x00 +#define LED_MODE_LOC_OFF_MASK 0x10 +#define LED_MODE_LOC_BLINK_MASK 0x20 + +static const u8 led_reg[] = { + 0xA, /* LOC/DIAG/FAN LED*/ + 0xB, /* PSU1/PSU2 LED */ + 0x16, /* FAN1-4 LED */ + 0x17, /* FAN4-6 LED */ +}; + +enum led_type { + LED_TYPE_PSU1, + LED_TYPE_PSU2, + LED_TYPE_DIAG, + LED_TYPE_FAN, + LED_TYPE_FAN1, + LED_TYPE_FAN2, + LED_TYPE_FAN3, + LED_TYPE_FAN4, + LED_TYPE_FAN5, + LED_TYPE_LOC +}; + +enum led_light_mode { + LED_MODE_OFF = 0, + LED_MODE_GREEN, + LED_MODE_AMBER, + LED_MODE_RED, + LED_MODE_GREEN_BLINK, + LED_MODE_AMBER_BLINK, + LED_MODE_RED_BLINK, + LED_MODE_AUTO, +}; + +struct led_type_mode { + enum led_type type; + int type_mask; + enum led_light_mode mode; + int mode_mask; +}; + +static struct led_type_mode led_type_mode_data[] = { +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_GREEN, LED_MODE_PSU1_GREEN_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_AMBER, LED_MODE_PSU1_AMBER_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_AUTO, LED_MODE_PSU1_AUTO_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_OFF, LED_MODE_PSU1_OFF_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_GREEN, LED_MODE_PSU2_GREEN_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_AMBER, LED_MODE_PSU2_AMBER_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_AUTO, LED_MODE_PSU2_AUTO_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_OFF, LED_MODE_PSU2_OFF_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_GREEN, LED_MODE_FAN_GREEN_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_AMBER, LED_MODE_FAN_AMBER_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_AUTO, LED_MODE_FAN_AUTO_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_OFF, LED_MODE_FAN_OFF_MASK}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 0}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 0}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 0}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 2}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 2}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 2}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 4}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 4}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 4}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 6}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 6}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 6}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 0}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 0}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 0}, +{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_GREEN, LED_MODE_DIAG_GREEN_MASK}, +{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_AMBER, LED_MODE_DIAG_AMBER_MASK}, +{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_OFF, LED_MODE_DIAG_OFF_MASK}, +{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_AMBER, LED_MODE_LOC_ON_MASK}, +{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_OFF, LED_MODE_LOC_OFF_MASK}, +{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_AMBER_BLINK, LED_MODE_LOC_BLINK_MASK} +}; + + +struct fanx_info_s { + u8 cname; /* device name */ + enum led_type type; + u8 reg_id; /* map to led_reg & reg_val */ +}; + +static struct fanx_info_s fanx_info[] = { + {'1', LED_TYPE_FAN1, 2}, + {'2', LED_TYPE_FAN2, 2}, + {'3', LED_TYPE_FAN3, 2}, + {'4', LED_TYPE_FAN4, 2}, + {'5', LED_TYPE_FAN5, 3} +}; + +static int led_reg_val_to_light_mode(enum led_type type, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + + if (type != led_type_mode_data[i].type) + continue; + + if ((led_type_mode_data[i].type_mask & reg_val) == + led_type_mode_data[i].mode_mask) + { + return led_type_mode_data[i].mode; + } + } + + return 0; +} + +static u8 led_light_mode_to_reg_val(enum led_type type, + enum led_light_mode mode, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + if (type != led_type_mode_data[i].type) + continue; + + if (mode != led_type_mode_data[i].mode) + continue; + + reg_val = led_type_mode_data[i].mode_mask | + (reg_val & (~led_type_mode_data[i].type_mask)); + } + + return reg_val; +} + +static int accton_as5712_54x_led_read_value(u8 reg) +{ + return as5712_54x_cpld_read(0x60, reg); +} + +static int accton_as5712_54x_led_write_value(u8 reg, u8 value) +{ + return as5712_54x_cpld_write(0x60, reg, value); +} + +static void accton_as5712_54x_led_update(void) +{ + mutex_lock(&ledctl->update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as5712_54x_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = accton_as5712_54x_led_read_value(led_reg[i]); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg[i], status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as5712_54x_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + u8 reg, enum led_type type) +{ + int reg_val; + + mutex_lock(&ledctl->update_lock); + + reg_val = accton_as5712_54x_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + accton_as5712_54x_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as5712_54x_led_psu_1_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5712_54x_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_PSU1); +} + +static enum led_brightness accton_as5712_54x_led_psu_1_get(struct led_classdev *cdev) +{ + accton_as5712_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU1, ledctl->reg_val[1]); +} + +static void accton_as5712_54x_led_psu_2_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5712_54x_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_PSU2); +} + +static enum led_brightness accton_as5712_54x_led_psu_2_get(struct led_classdev *cdev) +{ + accton_as5712_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU2, ledctl->reg_val[1]); +} + +static void accton_as5712_54x_led_fan_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5712_54x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_FAN); +} + +static enum led_brightness accton_as5712_54x_led_fan_get(struct led_classdev *cdev) +{ + accton_as5712_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_FAN, ledctl->reg_val[0]); +} + + +static void accton_as5712_54x_led_fanx_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + enum led_type led_type1; + int reg_id; + int i, nsize; + int ncount = sizeof(fanx_info)/sizeof(struct fanx_info_s); + + for(i=0;iname); + + if (led_cdev->name[nsize-1] == fanx_info[i].cname) + { + led_type1 = fanx_info[i].type; + reg_id = fanx_info[i].reg_id; + accton_as5712_54x_led_set(led_cdev, led_light_mode, led_reg[reg_id], led_type1); + return; + } + } +} + + +static enum led_brightness accton_as5712_54x_led_fanx_get(struct led_classdev *cdev) +{ + enum led_type led_type1; + int reg_id; + int i, nsize; + int ncount = sizeof(fanx_info)/sizeof(struct fanx_info_s); + + for(i=0;iname); + + if (cdev->name[nsize-1] == fanx_info[i].cname) + { + led_type1 = fanx_info[i].type; + reg_id = fanx_info[i].reg_id; + accton_as5712_54x_led_update(); + return led_reg_val_to_light_mode(led_type1, ledctl->reg_val[reg_id]); + } + } + + + return led_reg_val_to_light_mode(LED_TYPE_FAN1, ledctl->reg_val[2]); +} + + +static void accton_as5712_54x_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5712_54x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_DIAG); +} + +static enum led_brightness accton_as5712_54x_led_diag_get(struct led_classdev *cdev) +{ + accton_as5712_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void accton_as5712_54x_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5712_54x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_LOC); +} + +static enum led_brightness accton_as5712_54x_led_loc_get(struct led_classdev *cdev) +{ + accton_as5712_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static struct led_classdev accton_as5712_54x_leds[] = { + [LED_TYPE_PSU1] = { + .name = "accton_as5712_54x_led::psu1", + .default_trigger = "unused", + .brightness_set = accton_as5712_54x_led_psu_1_set, + .brightness_get = accton_as5712_54x_led_psu_1_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "accton_as5712_54x_led::psu2", + .default_trigger = "unused", + .brightness_set = accton_as5712_54x_led_psu_2_set, + .brightness_get = accton_as5712_54x_led_psu_2_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN] = { + .name = "accton_as5712_54x_led::fan", + .default_trigger = "unused", + .brightness_set = accton_as5712_54x_led_fan_set, + .brightness_get = accton_as5712_54x_led_fan_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN1] = { + .name = "accton_as5712_54x_led::fan1", + .default_trigger = "unused", + .brightness_set = accton_as5712_54x_led_fanx_set, + .brightness_get = accton_as5712_54x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN2] = { + .name = "accton_as5712_54x_led::fan2", + .default_trigger = "unused", + .brightness_set = accton_as5712_54x_led_fanx_set, + .brightness_get = accton_as5712_54x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN3] = { + .name = "accton_as5712_54x_led::fan3", + .default_trigger = "unused", + .brightness_set = accton_as5712_54x_led_fanx_set, + .brightness_get = accton_as5712_54x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN4] = { + .name = "accton_as5712_54x_led::fan4", + .default_trigger = "unused", + .brightness_set = accton_as5712_54x_led_fanx_set, + .brightness_get = accton_as5712_54x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN5] = { + .name = "accton_as5712_54x_led::fan5", + .default_trigger = "unused", + .brightness_set = accton_as5712_54x_led_fanx_set, + .brightness_get = accton_as5712_54x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_DIAG] = { + .name = "accton_as5712_54x_led::diag", + .default_trigger = "unused", + .brightness_set = accton_as5712_54x_led_diag_set, + .brightness_get = accton_as5712_54x_led_diag_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_LOC] = { + .name = "accton_as5712_54x_led::loc", + .default_trigger = "unused", + .brightness_set = accton_as5712_54x_led_loc_set, + .brightness_get = accton_as5712_54x_led_loc_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, +}; + +static int accton_as5712_54x_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as5712_54x_leds); i++) { + led_classdev_suspend(&accton_as5712_54x_leds[i]); + } + + return 0; +} + +static int accton_as5712_54x_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as5712_54x_leds); i++) { + led_classdev_resume(&accton_as5712_54x_leds[i]); + } + + return 0; +} + +static int accton_as5712_54x_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(accton_as5712_54x_leds); i++) { + ret = led_classdev_register(&pdev->dev, &accton_as5712_54x_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(accton_as5712_54x_leds)){ + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&accton_as5712_54x_leds[i]); + } + } + + return ret; +} + +static int accton_as5712_54x_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(accton_as5712_54x_leds); i++) { + led_classdev_unregister(&accton_as5712_54x_leds[i]); + } + + return 0; +} + +static struct platform_driver accton_as5712_54x_led_driver = { + .probe = accton_as5712_54x_led_probe, + .remove = accton_as5712_54x_led_remove, + .suspend = accton_as5712_54x_led_suspend, + .resume = accton_as5712_54x_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as5712_54x_led_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as5712_54x_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct accton_as5712_54x_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as5712_54x_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&accton_as5712_54x_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as5712_54x_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&accton_as5712_54x_led_driver); + kfree(ledctl); +} + +module_init(accton_as5712_54x_led_init); +module_exit(accton_as5712_54x_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as5712_54x_led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/ym2651y.c new file mode 120000 index 00000000000..f4d67640ccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/modules/ym2651y.c @@ -0,0 +1 @@ +../../common/modules/ym2651y.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/service/as5712-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/service/as5712-platform-monitor.service new file mode 100755 index 00000000000..da5d283a6d6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/service/as5712-platform-monitor.service @@ -0,0 +1,17 @@ +[Unit] +Description=Accton AS5712-54X Platform Monitoring service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/accton_as5712_util.py install +ExecStart=/usr/local/bin/accton_as5712_monitor.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/setup.py new file mode 100755 index 00000000000..f4cb5f960a4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as5712_54x', + version='1.0', + description='Module to initialize Accton AS5712-54X platforms', + + packages=['as5712_54x'], + package_dir={'as5712_54x': 'as5712-54x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/utils/README b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/utils/README new file mode 100755 index 00000000000..44e03cab5f5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/utils/README @@ -0,0 +1,117 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +Contents of this package: + patch - files under patch/ is for kernel and ONIE installer + for the kernel: + config-accton-as5712_54x.patch + for kernel configuration. + driver-i2c-muxes-pca954x-always-deselect.patch + for i2c_mux deselects after transaction. + driver-patches-for-accton-as5712-fan-psu-cpld.patch + for as5712's fan/psu/cpld/led/sfp drivers. + for ONIE: + onie_installer-accton-AS5712-54X.patch + for console port setting and copy util script o rootfs. + module - Contains source code of as5712 kernel driver modules. + +The late Sonic building scripts, pushed @Dec 5 2016, will automatically +create a docker container and run building process under it. +User is not necessary to handle docker environment creation. + +1. Download sonic-buildimage environment. + - Run "git clone https://github.com/Azure/sonic-buildimage". + - cd to sonic-buildimage and run "git submodule update --init --recursive". +2. Build kernel + - cd ./src/sonic-linux-kernel + - Copy patches and series from patch/kernel of this release to + sonic-linux-kernel/patch. + - Build kernel by "make". + - The built kernel package, linux-image-3.16.0-5-amd64_3.16.51-3+deb8u1_amd64.deb + , is generated. +3. Build installer + - Change directory back to sonic-buildimage/. + - Get onie_installer-accton-AS5712-54X.patch" from patch/installer. + - Change setting for AS5712-54X by patching build_image.sh. + "patch -p1 < onie_installer-accton-AS5712-54X.patch" + !!NOTICE, patching onie_installer-accton-AS5712-54X.patch comments out the + "git status" checking at build_image.sh. + - The account and password of installed OS can be given at rules/config. + The default user and password are "admin" & "YourPaSsWoRd" respectively. + - Run "make configure PLATFORM=broadcom" + - Copy the built kernel debian package to target/debs/. + The file is linux-image-3.16.0-5-amd64_*_amd64.deb under directory + src/sonic-linux-kernel/. + - Run "make target/sonic-generic.bin" + - Get the installer, target/sonic-generic.bin, to target machine and install. + +All Linux kernel code is licensed under the GPLv1. All other code is +licensed under the GPLv3. Please see the LICENSE file for copies of +both licenses. + +The code for integacting with Accton AS5712-54X has 2 parts, +kernel drivers and operational script. +The kernel drivers of peripherals are under module/ directory. +1. These drivers are patched into kernel by + driver-patches-for-accton-as5712-fan-psu-cpld.patch + Or you can build the driver under module/ by setting environment variable, + KERNEL_SRC, to proper linux built directory and run make. + It may be sonic-linux-kernel/linux-3.*/debian/build/build_amd64_none_amd64/. +2. A operational script, accton_as5712_util.py, for device initializatian and + peripheral accessing should be installed at /usr/bin. + This script is generated by onie_installer-accton-AS5712-54X.patch. + It's done by patching onie_installer-accton-AS5712-54X.patch at build-image. + Run "accton_as5712_util.py install" to install drivers. + +To initialize the system, run "accton_as5712_util.py install". +To clean up the drivers & devices, run "accton_as5712_util.py clean". +To dump information of sensors, run "accton_as5712_util.py show". +To dump SFP EEPROM, run "accton_as5712_util.py sff". +To set fan speed, run "accton_as5712_util.py set fan". +To enable/disable SFP emission, run "accton_as5712_util.py set sfp". +To set system LEDs' color, run "accton_as5712_util.py set led" +For more information, run "accton_as5712_util.py --help". + +==================================================================== +Besides applying accton_as5712_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +System LED: + There are 5 system LEDs at the lower-left corner of front panel. + They are loc, diag, fan, ps1, and ps2. + The sysfs interface color mappings are as follows: + Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + But not all colors are available for each LED. + +Fan Control: + There are 10 fans inside 5 fan modules. + All fans share 1 duty setting, ranged from 0~100. + +Thermal sensers: + 3 temperature sensors are controlled by the lm75 kernel modules. + +PSUs: + There 2 power supplies slot at the left/right side of the back. + Once if a PSU is not plugged, the status of it is shown failed. + +There are 48 SFP+ and 6 QSFP modules are equipped. +Before operating on PSU and QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/utils/accton_as5712_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/utils/accton_as5712_monitor.py new file mode 100755 index 00000000000..09b2b9ea96b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/utils/accton_as5712_monitor.py @@ -0,0 +1,204 @@ +#!/usr/bin/env python +# +# Copyright (C) 2019 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 05/08/2019: Roy Lee, changed for as5712-54x. +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import types + import time # this is only being used as part of the example + import traceback + import signal + from tabulate import tabulate + from as5712_54x.fanutil import FanUtil + from as5712_54x.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = 'accton_as5712_monitor' +DUTY_MAX = 100 + +global log_file +global log_level + +# Make a class we can use to capture stdout and sterr in the log +class accton_as5712_monitor(object): + # static temp var + _ori_temp = 0 + _new_perc = 0 + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_fans(self): + FAN_LEV1_UP_TEMP = 57700 # temperature + FAN_LEV1_DOWN_TEMP = 0 # unused + FAN_LEV1_SPEED_PERC = DUTY_MAX # percentage*/ + + FAN_LEV2_UP_TEMP = 53000 + FAN_LEV2_DOWN_TEMP = 52700 + FAN_LEV2_SPEED_PERC = 80 + + FAN_LEV3_UP_TEMP = 49500 + FAN_LEV3_DOWN_TEMP = 47700 + FAN_LEV3_SPEED_PERC = 65 + + FAN_LEV4_UP_TEMP = 0 # unused + FAN_LEV4_DOWN_TEMP = 42700 + FAN_LEV4_SPEED_PERC = 40 + + + thermal = ThermalUtil() + fan = FanUtil() + + temp1 = thermal.get_thermal_1_val() + if temp1 is None: + return False + + temp2 = thermal.get_thermal_2_val() + if temp2 is None: + return False + + new_temp = (temp1 + temp2) / 2 + + for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): + fan_stat = fan.get_fan_status(x) + if fan_stat is None: + return False + if fan_stat is False: + self._new_perc = FAN_LEV1_SPEED_PERC + logging.debug('INFO. SET new_perc to %d (FAN fault. fan_num:%d)', self._new_perc, x) + break + logging.debug('INFO. fan_stat is True (fan_num:%d)', x) + + if fan_stat is not None and fan_stat is not False: + diff = new_temp - self._ori_temp + if diff == 0: + logging.debug('INFO. RETURN. THERMAL temp not changed. %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + return True + else: + if diff >= 0: + is_up = True + logging.debug('INFO. THERMAL temp UP %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + else: + is_up = False + logging.debug('INFO. THERMAL temp DOWN %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + + if is_up is True: + if new_temp >= FAN_LEV1_UP_TEMP: + self._new_perc = FAN_LEV1_SPEED_PERC + elif new_temp >= FAN_LEV2_UP_TEMP: + self._new_perc = FAN_LEV2_SPEED_PERC + elif new_temp >= FAN_LEV3_UP_TEMP: + self._new_perc = FAN_LEV3_SPEED_PERC + else: + self._new_perc = FAN_LEV4_SPEED_PERC + logging.debug('INFO. SET. FAN_SPEED as %d (new THERMAL temp:%d)', self._new_perc, new_temp) + else: + if new_temp <= FAN_LEV4_DOWN_TEMP: + self._new_perc = FAN_LEV4_SPEED_PERC + elif new_temp <= FAN_LEV3_DOWN_TEMP: + self._new_perc = FAN_LEV3_SPEED_PERC + elif new_temp <= FAN_LEV2_DOWN_TEMP: + self._new_perc = FAN_LEV2_SPEED_PERC + else: + self._new_perc = FAN_LEV1_SPEED_PERC + logging.debug('INFO. SET. FAN_SPEED as %d (new THERMAL temp:%d)', self._new_perc, new_temp) + + cur_perc = fan.get_fan_duty_cycle(fan.get_idx_fan_start()) + if cur_perc == self._new_perc: + logging.debug('INFO. RETURN. FAN speed not changed. %d / %d (new_perc / ori_perc)', self._new_perc, cur_perc) + return True + + set_stat = fan.set_fan_duty_cycle(fan.get_idx_fan_start(), self._new_perc) + if set_stat is True: + logging.debug('INFO: PASS. set_fan_duty_cycle (%d)', self._new_perc) + else: + logging.debug('INFO: FAIL. set_fan_duty_cycle (%d)', self._new_perc) + + logging.debug('INFO: GET. ori_perc is %d. ori_temp is %d', cur_perc, self._ori_temp) + self._ori_temp = new_temp + logging.debug('INFO: UPDATE. ori_perc to %d. ori_temp to %d', cur_perc, self._ori_temp) + + return True + +def handler(signum, frame): + fan = FanUtil() + logging.debug('INFO:Cause signal %d, set fan speed max.', signum) + fan.set_fan_duty_cycle(fan.get_idx_fan_start(), DUTY_MAX) + sys.exit(0) + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + signal.signal(signal.SIGINT, handler) + signal.signal(signal.SIGTERM, handler) + monitor = accton_as5712_monitor(log_file, log_level) + + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(10) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/utils/accton_as5712_util.py b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/utils/accton_as5712_util.py new file mode 100755 index 00000000000..100af5bac82 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/utils/accton_as5712_util.py @@ -0,0 +1,694 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +import pickle +from collections import namedtuple + +PROJECT_NAME = 'as5712_54x' +version = '0.2.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan1':1, 'fan2':1,'fan3':1,'fan4':1,'fan5':1,'thermal':3, 'psu':2, 'sfp':54} + + +led_prefix ='/sys/devices/platform/as5712_54x_led/leds/accton_'+PROJECT_NAME+'_led::' +fan_prefix ='/sys/devices/platform/as5712_54x_' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2'], + 'fan1': ['fan'], + 'fan2': ['fan'], + 'fan3': ['fan'], + 'fan4': ['fan'], + 'fan5': ['fan'], + } +hwmon_nodes = {'led': ['brightness'] , + 'fan1': ['fan1_duty_cycle_percentage', 'fan1_fault', 'fan1_speed_rpm', 'fan1_direction', 'fanr1_fault', 'fanr1_speed_rpm'], + 'fan2': ['fan2_duty_cycle_percentage','fan2_fault', 'fan2_speed_rpm', 'fan2_direction', 'fanr2_fault', 'fanr2_speed_rpm'], + 'fan3': ['fan3_duty_cycle_percentage','fan3_fault', 'fan3_speed_rpm', 'fan3_direction', 'fanr3_fault', 'fanr3_speed_rpm'], + 'fan4': ['fan4_duty_cycle_percentage','fan4_fault', 'fan4_speed_rpm', 'fan4_direction', 'fanr4_fault', 'fanr4_speed_rpm'], + 'fan5': ['fan5_duty_cycle_percentage','fan5_fault', 'fan5_speed_rpm', 'fan5_direction', 'fanr5_fault', 'fanr5_speed_rpm'], + } +hwmon_prefix ={'led': led_prefix, + 'fan1': fan_prefix, + 'fan2': fan_prefix, + 'fan3': fan_prefix, + 'fan4': fan_prefix, + 'fan5': fan_prefix, + } + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'thermal': ['61-0048','62-0049', '63-004a'] , + 'psu': ['57-0050','58-0053'], + 'sfp': ['-0050']} +i2c_nodes = { + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['sfp_is_present ', 'sfp_tx_disable']} + +QSFP_START = 48 +I2C_BUS_ORDER = -1 + +sfp_map = [2, 3, 4, 5, 6, 7, 8, 9, 10, + 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, + 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, + 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, + 41, 42, 43, 44, 45, 46, 47, 48, 49, + 50, 52, 54, 51, 53, 55] + +port_cpld_path = [ "/sys/bus/i2c/devices/0-0061/" + ,'/sys/bus/i2c/devices/0-0062/'] + +mknod =[ +'echo as5712_54x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo as5712_54x_cpld2 0x61 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo as5712_54x_cpld3 0x62 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device', + +# PSU-1 +'echo as5712_54x_psu1 0x38 > /sys/bus/i2c/devices/i2c-57/new_device', +'echo cpr_4011_4mxx 0x3c > /sys/bus/i2c/devices/i2c-57/new_device', +'echo as5712_54x_psu1 0x50 > /sys/bus/i2c/devices/i2c-57/new_device', + +# PSU-2 +'echo as5712_54x_psu2 0x3b > /sys/bus/i2c/devices/i2c-58/new_device', +'echo cpr_4011_4mxx 0x3f > /sys/bus/i2c/devices/i2c-58/new_device', +'echo as5712_54x_psu2 0x53 > /sys/bus/i2c/devices/i2c-58/new_device', + +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-61/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-62/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-63/new_device', + +#EERPOM +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-1/new_device', +] + +mknod2 =[ +'echo as5712_54x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo as5712_54x_cpld2 0x61 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo as5712_54x_cpld3 0x62 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-0/new_device', + +# PSU-1 +'echo as5712_54x_psu1 0x38 > /sys/bus/i2c/devices/i2c-57/new_device', +'echo cpr_4011_4mxx 0x3c > /sys/bus/i2c/devices/i2c-57/new_device', +'echo as5712_54x_psu1 0x50 > /sys/bus/i2c/devices/i2c-57/new_device', + +# PSU-2 +'echo as5712_54x_psu2 0x3b > /sys/bus/i2c/devices/i2c-58/new_device', +'echo cpr_4011_4mxx 0x3f > /sys/bus/i2c/devices/i2c-58/new_device', +'echo as5712_54x_psu2 0x53 > /sys/bus/i2c/devices/i2c-58/new_device', + +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-61/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-62/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-63/new_device', + +#EERPOM +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-0/new_device', +] + +FORCE = 0 +logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-48 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-54 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ACCTON DBG]: "+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status = 1 + output = "" + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log ("cmd:" + cmd) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_inserted(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + + + +kos = [ +'depmod -ae', +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe optoe', +'modprobe i2c-mux-accton_as5712_54x_cpld', +'modprobe cpr_4011_4mxx', +'modprobe ym2651y', +'modprobe accton_as5712_54x_fan', +'modprobe leds-accton_as5712_54x', +'modprobe accton_as5712_54x_psu'] + +def driver_install(): + global FORCE + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + #remove parameter if any + rm = kos[-(i+1)] + lst = rm.split(" ") + if len(lst) > 2: + del(lst[2:]) + rm = " ".join(lst) + + #Change to removing commands + rm = rm.replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + + + +def i2c_order_check(): + # i2c bus 0 and 1 might be installed in different order. + # Here check if 0x70 is exist @ i2c-0 + tmp = "echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device" + status, output = log_os_system(tmp, 0) + if not device_exist(): + order = 1 + else: + order = 0 + tmp = "echo 0x70 > /sys/bus/i2c/devices/i2c-1/delete_device" + status, output = log_os_system(tmp, 0) + return order + +def update_i2c_order(): + global I2C_BUS_ORDER + + order = i2c_order_check() + pickle.dump(order, open("/tmp/accton_util.p", "wb")) # save it + I2C_BUS_ORDER = order + print "[%s]Detected I2C_BUS_ORDER:%d" % (os.path.basename(__file__), I2C_BUS_ORDER) + +def get_i2c_order(): + global I2C_BUS_ORDER + if I2C_BUS_ORDER < 0: + if os.path.exists("/tmp/accton_util.p"): + I2C_BUS_ORDER = pickle.load(open("/tmp/accton_util.p", "rb")) + else: + update_i2c_order() + +def device_install(): + global FORCE + global I2C_BUS_ORDER + + update_i2c_order() + order = I2C_BUS_ORDER + # if 0x76 is not exist @i2c-0, use reversed bus order + if order: + for i in range(0,len(mknod2)): + #for pca954x need times to built new i2c buses + if mknod2[i].find('pca954') != -1: + time.sleep(2) + + status, output = log_os_system(mknod2[i], 1) + if status: + print output + if FORCE == 0: + return status + else: + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(2) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(0,len(sfp_map)): + if i < QSFP_START: + status, output =log_os_system("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + else: + status, output =log_os_system("echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + status, output =log_os_system("echo port"+str(i)+" > /sys/bus/i2c/devices/"+str(sfp_map[i])+"-0050/port_name", 1) + if status: + print output + if FORCE == 0: + return status + + return + +def device_uninstall(): + global FORCE + global I2C_BUS_ORDER + + get_i2c_order() + order = I2C_BUS_ORDER + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + if order == 0: + nodelist = mknod + else: + nodelist = mknod2 + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_inserted() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_inserted() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_inserted()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + + +def get_cpld_path(index): + global I2C_BUS_ORDER + + if I2C_BUS_ORDER < 0: + get_i2c_order() + + if I2C_BUS_ORDER !=0 : + return port_cpld_path[index].replace("0-", "1-") + else: + return port_cpld_path[index] + +def cpld_path_of_port(port_index): + if port_index < 1 and port_index > DEVICE_NO['sfp']: + return None + if port_index < 25: + return get_cpld_path(0) + else: + return get_cpld_path(1) + +def get_path_sfp_tx_dis(port_index): + cpld_p = cpld_path_of_port(port_index) + if cpld_p == None: + return False, '' + else: + dev = cpld_p+"module_tx_disable_"+str(port_index) + return True, dev + +def get_path_sfp_presence(port_index): + cpld_p = cpld_path_of_port(port_index) + if cpld_p == None: + return False, '' + else: + dev = cpld_p+"module_present_"+str(port_index) + return True, dev + + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan1'] ['fan11'][0] + node = node.replace(node.split("/")[-1], 'fan1_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + #if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + #There no tx_disable for QSFP port + if int(args[1]) > QSFP_START or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + port_index = int(args[1]) + ret, dev = get_path_sfp_tx_dis(port_index) + if ret == False: + return False + else: + ret, log = log_os_system("echo "+args[2]+" >"+ dev, 1) + return ret + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def print_1_device_traversal(i, j, k): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + return func+"="+log+" " + else: + return func+"="+"X"+" " + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + if i == 'sfp': + port_index = int(filter(str.isdigit, j)) + for k in (ALL_DEVICE[i][j]): + if k.find('tx_disable')!= -1: + ret, k = get_path_sfp_tx_dis(port_index) + if ret == False: + continue + log = print_1_device_traversal(i, j, k) + print log, + if k.find('present')!= -1: + ret, k = get_path_sfp_presence(port_index) + if ret == False: + continue + log = print_1_device_traversal(i, j, k) + print log, + + else: + for k in (ALL_DEVICE[i][j]): + log = print_1_device_traversal(i, j, k) + print log, + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0070", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/classes/fanutil.py new file mode 100755 index 00000000000..223408fb962 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/classes/fanutil.py @@ -0,0 +1,243 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_NUM_ON_MAIN_BROAD = 5 + FAN_NUM_1_IDX = 1 + FAN_NUM_2_IDX = 2 + FAN_NUM_3_IDX = 3 + FAN_NUM_4_IDX = 4 + FAN_NUM_5_IDX = 5 + + FAN_NODE_NUM_OF_MAP = 6 + FAN_NODE_FAULT_IDX_OF_MAP = 1 + FAN_NODE_SPEED_IDX_OF_MAP = 2 + FAN_NODE_DIR_IDX_OF_MAP = 3 + FAN_NODE_DUTY_IDX_OF_MAP = 4 + FANR_NODE_FAULT_IDX_OF_MAP = 5 + FANR_NODE_SPEED_IDX_OF_MAP = 6 + + BASE_VAL_PATH = '/sys/devices/platform/as5812_54t_fan/{0}' + + #logfile = '' + #loglevel = logging.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + _fan_to_device_path_mapping = {} + + _fan_to_device_node_mapping = { + (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault', + (FAN_NUM_1_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan1_speed_rpm', + (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction', + (FAN_NUM_1_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan1_duty_cycle_percentage', + (FAN_NUM_1_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr1_fault', + (FAN_NUM_1_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr1_speed_rpm', + + (FAN_NUM_2_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan2_fault', + (FAN_NUM_2_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan2_speed_rpm', + (FAN_NUM_2_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan2_direction', + (FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage', + (FAN_NUM_2_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr2_fault', + (FAN_NUM_2_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr2_speed_rpm', + + (FAN_NUM_3_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan3_fault', + (FAN_NUM_3_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan3_speed_rpm', + (FAN_NUM_3_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan3_direction', + (FAN_NUM_3_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan3_duty_cycle_percentage', + (FAN_NUM_3_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr3_fault', + (FAN_NUM_3_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr3_speed_rpm', + + (FAN_NUM_4_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan4_fault', + (FAN_NUM_4_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan4_speed_rpm', + (FAN_NUM_4_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan4_direction', + (FAN_NUM_4_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan4_duty_cycle_percentage', + (FAN_NUM_4_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr4_fault', + (FAN_NUM_4_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr4_speed_rpm', + + (FAN_NUM_5_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan5_fault', + (FAN_NUM_5_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan5_speed_rpm', + (FAN_NUM_5_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan5_direction', + (FAN_NUM_5_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan5_duty_cycle_percentage', + (FAN_NUM_5_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr5_fault', + (FAN_NUM_5_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr5_speed_rpm', + } + + logger = logging.getLogger(__name__) + def __init__(self, log_level=logging.DEBUG): + ch = logging.StreamHandler() + ch.setLevel(log_level) + self.logger.addHandler(ch) + + fan_path = self.BASE_VAL_PATH + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_NUM_ON_MAIN_BROAD+1): + for node_num in range(self.FAN_NODE_FAULT_IDX_OF_MAP, self.FAN_NODE_NUM_OF_MAP+1): + self._fan_to_device_path_mapping[(fan_num, node_num)] = fan_path.format( + self._fan_to_device_node_mapping[(fan_num, node_num)]) + + + def _get_fan_to_device_node(self, fan_num, node_num): + return self._fan_to_device_node_mapping[(fan_num, node_num)] + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + self.logger.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + self.logger.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'r') + except IOError as e: + self.logger.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + self.logger.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + self.logger.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + self.logger.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + self.logger.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + self.logger.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + self.logger.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + self.logger.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + def get_num_fans(self): + return self.FAN_NUM_ON_MAIN_BROAD + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM_OF_MAP + + def get_idx_node_start(self): + return self.FAN_NODE_FAULT_IDX_OF_MAP + + def get_size_node_map(self): + return len(self._fan_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._fan_to_device_path_mapping) + + def get_fan_to_device_path(self, fan_num, node_num): + return self._fan_to_device_path_mapping[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_FAULT_IDX_OF_MAP) + + def get_fan_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_SPEED_IDX_OF_MAP) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DIR_IDX_OF_MAP) + + def get_fan_duty_cycle(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DUTY_IDX_OF_MAP) + + def set_fan_duty_cycle(self, fan_num, val): + return self._set_fan_node_val(fan_num, self.FAN_NODE_DUTY_IDX_OF_MAP, val) + + def get_fanr_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_FAULT_IDX_OF_MAP) + + def get_fanr_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP) + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + self.logger.debug('GET. Parameter error. fan_num, %d', fan_num) + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + self.logger.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + if self.get_fanr_fault(fan_num) is not None and self.get_fanr_fault(fan_num) > 0: + self.logger.debug('GET. FANR fault. fan_num, %d', fan_num) + return False + + return True + +#def main(): +# fan = FanUtil() +# +# print 'get_size_node_map : %d' % fan.get_size_node_map() +# print 'get_size_path_map : %d' % fan.get_size_path_map() +# for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): +# for y in range(fan.get_idx_node_start(), fan.get_num_nodes()+1): +# print fan.get_fan_to_device_path(x, y) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/classes/thermalutil.py new file mode 100755 index 00000000000..0095a787102 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/classes/thermalutil.py @@ -0,0 +1,125 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# +# ------------------------------------------------------------------ + +try: + import time + import logging + import glob + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + + THERMAL_NUM_ON_MAIN_BROAD = 3 + THERMAL_NUM_1_IDX = 1 # 1_ON_MAIN_BROAD + THERMAL_NUM_2_IDX = 2 # 2_ON_MAIN_BROAD + THERMAL_NUM_3_IDX = 3 # 3_ON_MAIN_BROAD + + BASE_VAL_PATH = '/sys/bus/i2c/devices/{0}-00{1}/hwmon/hwmon*/temp1_input' + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + _thermal_to_device_path_mapping = {} + + _thermal_to_device_node_mapping = { + THERMAL_NUM_1_IDX: ['15', '48'], + THERMAL_NUM_2_IDX: ['16', '49'], + THERMAL_NUM_3_IDX: ['17', '4a'], + } + + logger = logging.getLogger(__name__) + def __init__(self, log_level=logging.DEBUG): + ch = logging.StreamHandler() + ch.setLevel(log_level) + self.logger.addHandler(ch) + thermal_path = self.BASE_VAL_PATH + + for x in range(self.THERMAL_NUM_1_IDX, self.THERMAL_NUM_ON_MAIN_BROAD+1): + self._thermal_to_device_path_mapping[x] = thermal_path.format( + self._thermal_to_device_node_mapping[x][0], + self._thermal_to_device_node_mapping[x][1]) + + def _get_thermal_node_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_ON_MAIN_BROAD: + self.logger.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_to_device_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + self.logger.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + self.logger.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + self.logger.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + + def get_num_thermals(self): + return self.THERMAL_NUM_ON_MAIN_BROAD + + def get_idx_thermal_start(self): + return self.THERMAL_NUM_1_IDX + + def get_size_node_map(self): + return len(self._thermal_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._thermal_to_device_path_mapping) + + def get_thermal_to_device_path(self, thermal_num): + return self._thermal_to_device_path_mapping[thermal_num] + + def get_thermal_1_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + + def get_thermal_2_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) + +#def main(): +# thermal = ThermalUtil() +# +# print 'get_size_node_map : %d' % thermal.get_size_node_map() +# print 'get_size_path_map : %d' % thermal.get_size_path_map() +# for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): +# print thermal.get_thermal_to_device_path(x) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/Makefile new file mode 100755 index 00000000000..db535d8d677 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/Makefile @@ -0,0 +1,4 @@ +obj-m:= x86-64-accton-as5812-54t-cpld.o x86-64-accton-as5812-54t-fan.o \ + x86-64-accton-as5812-54t-leds.o \ + x86-64-accton-as5812-54t-psu.o ym2651y.o cpr_4011_4mxx.o + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/cpr_4011_4mxx.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/cpr_4011_4mxx.c new file mode 120000 index 00000000000..fd43cc1f1c7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/cpr_4011_4mxx.c @@ -0,0 +1 @@ +../../common/modules/cpr_4011_4mxx.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-cpld.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-cpld.c new file mode 100755 index 00000000000..2d44d5355ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-cpld.c @@ -0,0 +1,544 @@ +/* + * A hwmon driver for the as5812_54t_cpld + * + * Copyright (C) 2013 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +static ssize_t show_bit(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_1bit(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +static int as5812_54t_cpld_read_internal(struct i2c_client *client, u8 reg); +static int as5812_54t_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value); + +struct as5812_54t_cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; +}; + +/* Addresses scanned for as5812_54t_cpld + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + + + +#define _ATTR_CONCAT(name,idx) name##idx + +#define TRANSCEIVER_ATTR_ID(_attr) \ + _ATTR_CONCAT(MODULE_##_attr##_, 49), \ + _ATTR_CONCAT(MODULE_##_attr##_, 50), \ + _ATTR_CONCAT(MODULE_##_attr##_, 51), \ + _ATTR_CONCAT(MODULE_##_attr##_, 52), \ + _ATTR_CONCAT(MODULE_##_attr##_, 53), \ + _ATTR_CONCAT(MODULE_##_attr##_, 54) + + +enum as5812_54t_cpld_sysfs_attributes { + CPLD_VERSION, + ACCESS, + MODULE_PRESENT_ALL, + /* transceiver attributes */ + TRANSCEIVER_ATTR_ID(PRESENT), + TRANSCEIVER_ATTR_ID(LPMODE), + TRANSCEIVER_ATTR_ID(RESET), +}; + +/* sysfs attributes for hwmon + */ + +/* transceiver attributes */ +#define DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_bit, NULL, MODULE_PRESENT_##index);\ + static SENSOR_DEVICE_ATTR(module_lp_mode_##index, S_IRUGO|S_IWUSR, show_bit, set_1bit, MODULE_LPMODE_##index);\ + static SENSOR_DEVICE_ATTR(module_reset_##index, S_IRUGO|S_IWUSR, show_bit, set_1bit, MODULE_RESET_##index) + +#define DECLARE_TRANSCEIVER_ATTR(index) &sensor_dev_attr_module_present_##index.dev_attr.attr, \ + &sensor_dev_attr_module_lp_mode_##index.dev_attr.attr, \ + &sensor_dev_attr_module_reset_##index.dev_attr.attr + + + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS); +/* transceiver attributes */ +static SENSOR_DEVICE_ATTR(module_present_all, S_IRUGO, show_present_all, NULL, MODULE_PRESENT_ALL); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(49); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(50); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(51); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(52); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(53); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(54); + +static struct attribute *as5812_54t_cpld_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + DECLARE_TRANSCEIVER_ATTR(49), + DECLARE_TRANSCEIVER_ATTR(50), + DECLARE_TRANSCEIVER_ATTR(51), + DECLARE_TRANSCEIVER_ATTR(52), + DECLARE_TRANSCEIVER_ATTR(53), + DECLARE_TRANSCEIVER_ATTR(54), + NULL +}; + +static const struct attribute_group as5812_54t_cpld_group = { + .attrs = as5812_54t_cpld_attributes, +}; + +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + u8 value = 0; + u8 reg = 0x22; + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54t_cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + status = as5812_54t_cpld_read_internal(client, reg); + if (status < 0) { + goto exit; + } + + value = ~(u8)status; + value &= 0x3F; + + mutex_unlock(&data->update_lock); + + /* Return values 49 -> 54 in order */ + return sprintf(buf, "%.2x\n", value); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static int get_reg_index(struct sensor_device_attribute *attr, u8 *reg, u8 *index, u8 *revert) { + if (attr->index >= MODULE_RESET_49){ + *reg = 0x23; + *index = attr->index - MODULE_RESET_49; + *revert = 1; + }else if (attr->index >= MODULE_LPMODE_49){ + *reg = 0x24; + *index = attr->index - MODULE_LPMODE_49; + *revert = 0; + } else { + *reg = 0x22; + *index = attr->index - MODULE_PRESENT_49; + *revert = 1; + } + return 0; +} + +static ssize_t set_1bit(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + u8 index, revert; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54t_cpld_data *data = i2c_get_clientdata(client); + int status, value; + u8 reg = 0, mask = 0; + + status = kstrtoint(buf, 10, &value); + if (status) + return status; + + get_reg_index(attr, ®, &index, &revert); + mask = 0x1 << index; + + mutex_lock(&data->update_lock); + status = as5812_54t_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + status &= ~(mask); + value = !value; + if (!revert) + value = !value; + status |= (value << index); /*low-active*/ + status = as5812_54t_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_bit(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 index, revert; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54t_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0; + + get_reg_index(attr, ®, &index, &revert); + mask = 0x1 << index; + + mutex_lock(&data->update_lock); + status = as5812_54t_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + status = !(status & mask); + if (!revert) + status = !status; + + return sprintf(buf, "%d\n", status); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 reg = 0, mask = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54t_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + + switch (attr->index) { + case CPLD_VERSION: + reg = 0x1; + mask = 0xFF; + break; + default: + break; + } + + mutex_lock(&data->update_lock); + status = as5812_54t_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return sprintf(buf, "%d\n", (status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54t_cpld_data *data = i2c_get_clientdata(client); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = as5812_54t_cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static int as5812_54t_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int as5812_54t_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static void as5812_54t_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as5812_54t_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int as5812_54t_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct as5812_54t_cpld_data *data = NULL; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as5812_54t_cpld_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as5812_54t_cpld_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "as5812_54t_cpld", + NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + as5812_54t_cpld_add_client(client); + + /* + * Bring QSFPs out of reset, + * This is a temporary fix until the QSFP+_MOD_RST register + * can be exposed through the driver. + */ + as5812_54t_cpld_write_internal(client, 0x23, 0x3F); + + dev_info(&client->dev, "%s: cpld '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as5812_54t_cpld_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as5812_54t_cpld_remove(struct i2c_client *client) +{ + struct as5812_54t_cpld_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as5812_54t_cpld_group); + kfree(data); + as5812_54t_cpld_remove_client(client); + + return 0; +} + +int as5812_54t_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_read_byte_data(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as5812_54t_cpld_read); + +int as5812_54t_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_write_byte_data(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as5812_54t_cpld_write); + +static const struct i2c_device_id as5812_54t_cpld_id[] = { + { "as5812_54t_cpld", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as5812_54t_cpld_id); + +static struct i2c_driver as5812_54t_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as5812_54t_cpld", + }, + .probe = as5812_54t_cpld_probe, + .remove = as5812_54t_cpld_remove, + .id_table = as5812_54t_cpld_id, + .address_list = normal_i2c, +}; + +static int __init as5812_54t_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as5812_54t_cpld_driver); +} + +static void __exit as5812_54t_cpld_exit(void) +{ + i2c_del_driver(&as5812_54t_cpld_driver); +} + +module_init(as5812_54t_cpld_init); +module_exit(as5812_54t_cpld_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as5812_54t_cpld driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-fan.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-fan.c new file mode 100644 index 00000000000..66370fb37ff --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-fan.c @@ -0,0 +1,458 @@ +/* + * A hwmon driver for the Accton as5812 54t fan + * + * Copyright (C) 2015 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as5812_54t_fan" + +#define FAN_MAX_NUMBER 5 +#define FAN_SPEED_CPLD_TO_RPM_STEP 150 +#define FAN_SPEED_PRECENT_TO_CPLD_STEP 5 +#define FAN_DUTY_CYCLE_MIN 0 +#define FAN_DUTY_CYCLE_MAX 100 /* 100% */ + +#define CPLD_REG_FAN_STATUS_OFFSET 0xC +#define CPLD_REG_FANR_STATUS_OFFSET 0x1F +#define CPLD_REG_FAN_DIRECTION_OFFSET 0x1E + +#define CPLD_FAN1_REG_SPEED_OFFSET 0x10 +#define CPLD_FAN2_REG_SPEED_OFFSET 0x11 +#define CPLD_FAN3_REG_SPEED_OFFSET 0x12 +#define CPLD_FAN4_REG_SPEED_OFFSET 0x13 +#define CPLD_FAN5_REG_SPEED_OFFSET 0x14 + +#define CPLD_FANR1_REG_SPEED_OFFSET 0x18 +#define CPLD_FANR2_REG_SPEED_OFFSET 0x19 +#define CPLD_FANR3_REG_SPEED_OFFSET 0x1A +#define CPLD_FANR4_REG_SPEED_OFFSET 0x1B +#define CPLD_FANR5_REG_SPEED_OFFSET 0x1C + +#define CPLD_REG_FAN_PWM_CYCLE_OFFSET 0xD + +#define CPLD_FAN1_INFO_BIT_MASK 0x1 +#define CPLD_FAN2_INFO_BIT_MASK 0x2 +#define CPLD_FAN3_INFO_BIT_MASK 0x4 +#define CPLD_FAN4_INFO_BIT_MASK 0x8 +#define CPLD_FAN5_INFO_BIT_MASK 0x10 + +#define PROJECT_NAME + +#define LOCAL_DEBUG 0 + +static struct accton_as5812_54t_fan *fan_data = NULL; + +struct accton_as5812_54t_fan { + struct platform_device *pdev; + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status[FAN_MAX_NUMBER]; /* inner first fan status */ + u32 speed[FAN_MAX_NUMBER]; /* inner first fan speed */ + u8 direction[FAN_MAX_NUMBER]; /* reconrd the direction of inner first and second fans */ + u32 duty_cycle[FAN_MAX_NUMBER]; /* control the speed of inner first and second fans */ + u8 r_status[FAN_MAX_NUMBER]; /* inner second fan status */ + u32 r_speed[FAN_MAX_NUMBER]; /* inner second fan speed */ +}; + +/*******************/ +#define MAKE_FAN_MASK_OR_REG(name,type) \ + CPLD_FAN##type##1_##name, \ + CPLD_FAN##type##2_##name, \ + CPLD_FAN##type##3_##name, \ + CPLD_FAN##type##4_##name, \ + CPLD_FAN##type##5_##name, + +/* fan related data + */ +static const u8 fan_info_mask[] = { + MAKE_FAN_MASK_OR_REG(INFO_BIT_MASK,) +}; + +static const u8 fan_speed_reg[] = { + MAKE_FAN_MASK_OR_REG(REG_SPEED_OFFSET,) +}; + +static const u8 fanr_speed_reg[] = { + MAKE_FAN_MASK_OR_REG(REG_SPEED_OFFSET,R) +}; + +/*******************/ +#define DEF_FAN_SET(id) \ + FAN##id##_FAULT, \ + FAN##id##_SPEED, \ + FAN##id##_DUTY_CYCLE, \ + FAN##id##_DIRECTION, \ + FANR##id##_FAULT, \ + FANR##id##_SPEED, + +enum sysfs_fan_attributes { + DEF_FAN_SET(1) + DEF_FAN_SET(2) + DEF_FAN_SET(3) + DEF_FAN_SET(4) + DEF_FAN_SET(5) +}; +/*******************/ +static void accton_as5812_54t_fan_update_device(struct device *dev); +static int accton_as5812_54t_fan_read_value(u8 reg); +static int accton_as5812_54t_fan_write_value(u8 reg, u8 value); + +static ssize_t fan_set_duty_cycle(struct device *dev, + struct device_attribute *da,const char *buf, size_t count); +static ssize_t fan_show_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t show_name(struct device *dev, + struct device_attribute *da, char *buf); + +extern int as5812_54t_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as5812_54t_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + + +/*******************/ +#define _MAKE_SENSOR_DEVICE_ATTR(prj, id, id2) \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, \ + fan_set_duty_cycle, FAN##id##_DUTY_CYCLE); \ + static SENSOR_DEVICE_ATTR(prj##pwm##id, S_IWUSR | S_IRUGO, fan_show_value, \ + fan_set_duty_cycle, FAN##id##_DUTY_CYCLE); \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_direction, S_IRUGO, fan_show_value, NULL, FAN##id##_DIRECTION); \ + static SENSOR_DEVICE_ATTR(prj##fanr##id##_fault, S_IRUGO, fan_show_value, NULL, FANR##id##_FAULT); \ + static SENSOR_DEVICE_ATTR(prj##fanr##id##_speed_rpm, S_IRUGO, fan_show_value, NULL, FANR##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_input, S_IRUGO, fan_show_value, NULL, FAN##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id2##_input, S_IRUGO, fan_show_value, NULL, FANR##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_fault, S_IRUGO, fan_show_value, NULL, FAN##id##_FAULT); \ + static SENSOR_DEVICE_ATTR(prj##fan##id2##_fault, S_IRUGO, fan_show_value, NULL, FAN##id##_FAULT); + +#define MAKE_SENSOR_DEVICE_ATTR(prj,id, id2) _MAKE_SENSOR_DEVICE_ATTR(prj,id, id2) + +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME,1,11) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME,2,12) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME,3,13) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME,4,14) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME,5,15) + +static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, 0); +/*******************/ + +#define _MAKE_FAN_ATTR(prj, id, id2) \ + &sensor_dev_attr_##prj##fan##id##_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id##_duty_cycle_percentage.dev_attr.attr,\ + &sensor_dev_attr_##prj##pwm##id.dev_attr.attr,\ + &sensor_dev_attr_##prj##fan##id##_direction.dev_attr.attr, \ + &sensor_dev_attr_##prj##fanr##id##_fault.dev_attr.attr, \ + &sensor_dev_attr_##prj##fanr##id##_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id##_input.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id2##_input.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id##_fault.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id2##_fault.dev_attr.attr, + + +#define MAKE_FAN_ATTR(prj, id, id2) _MAKE_FAN_ATTR(prj, id, id2) + +static struct attribute *accton_as5812_54t_fan_attributes[] = { + /* fan related attributes */ + MAKE_FAN_ATTR(PROJECT_NAME,1,11) + MAKE_FAN_ATTR(PROJECT_NAME,2,12) + MAKE_FAN_ATTR(PROJECT_NAME,3,13) + MAKE_FAN_ATTR(PROJECT_NAME,4,14) + MAKE_FAN_ATTR(PROJECT_NAME,5,15) + &sensor_dev_attr_name.dev_attr.attr, + NULL +}; +/*******************/ + +/* fan related functions + */ +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + ssize_t ret = 0; + int data_index, type_index; + + accton_as5812_54t_fan_update_device(dev); + + if (fan_data->valid == 0) { + return ret; + } + + type_index = attr->index%FAN2_FAULT; + data_index = attr->index/FAN2_FAULT; + + switch (type_index) { + case FAN1_FAULT: + ret = sprintf(buf, "%d\n", fan_data->status[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FAN1_SPEED: + ret = sprintf(buf, "%d\n", fan_data->speed[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FAN1_DUTY_CYCLE: + ret = sprintf(buf, "%d\n", fan_data->duty_cycle[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FAN1_DIRECTION: + ret = sprintf(buf, "%d\n", fan_data->direction[data_index]); /* presnet, need to modify*/ + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FANR1_FAULT: + ret = sprintf(buf, "%d\n", fan_data->r_status[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FANR1_SPEED: + ret = sprintf(buf, "%d\n", fan_data->r_speed[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + default: + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d] \n", __FUNCTION__, __LINE__); + break; + } + + return ret; +} + +static ssize_t show_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + return sprintf(buf, "%s\n", DRVNAME); +} +/*******************/ +static ssize_t fan_set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) { + + int error, value; + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < FAN_DUTY_CYCLE_MIN || value > FAN_DUTY_CYCLE_MAX) + return -EINVAL; + + accton_as5812_54t_fan_write_value(CPLD_REG_FAN_PWM_CYCLE_OFFSET, value/FAN_SPEED_PRECENT_TO_CPLD_STEP); + + fan_data->valid = 0; + + return count; +} + +static const struct attribute_group accton_as5812_54t_fan_group = { + .attrs = accton_as5812_54t_fan_attributes, +}; + +static int accton_as5812_54t_fan_read_value(u8 reg) +{ + return as5812_54t_cpld_read(0x60, reg); +} + +static int accton_as5812_54t_fan_write_value(u8 reg, u8 value) +{ + return as5812_54t_cpld_write(0x60, reg, value); +} + +static void accton_as5812_54t_fan_update_device(struct device *dev) +{ + int speed, r_speed, fault, r_fault, ctrl_speed, direction; + int i; + + mutex_lock(&fan_data->update_lock); + + if (LOCAL_DEBUG) + printk ("Starting accton_as5812_54t_fan update \n"); + + if (!(time_after(jiffies, fan_data->last_updated + HZ + HZ / 2) || !fan_data->valid)) { + /* do nothing */ + goto _exit; + } + + fan_data->valid = 0; + + if (LOCAL_DEBUG) + printk ("Starting accton_as5812_54t_fan update 2 \n"); + + fault = accton_as5812_54t_fan_read_value(CPLD_REG_FAN_STATUS_OFFSET); + r_fault = accton_as5812_54t_fan_read_value(CPLD_REG_FANR_STATUS_OFFSET); + direction = accton_as5812_54t_fan_read_value(CPLD_REG_FAN_DIRECTION_OFFSET); + ctrl_speed = accton_as5812_54t_fan_read_value(CPLD_REG_FAN_PWM_CYCLE_OFFSET); + + if ( (fault < 0) || (r_fault < 0) || (direction < 0) || (ctrl_speed < 0) ) + { + if (LOCAL_DEBUG) + printk ("[Error!!][%s][%d] \n", __FUNCTION__, __LINE__); + goto _exit; /* error */ + } + + if (LOCAL_DEBUG) + printk ("[fan:] fault:%d, r_fault=%d, direction=%d, ctrl_speed=%d \n",fault, r_fault, direction, ctrl_speed); + + for (i=0; istatus[i] = (fault & fan_info_mask[i]) >> i; + if (LOCAL_DEBUG) + printk ("[fan%d:] fail=%d \n",i, fan_data->status[i]); + + fan_data->r_status[i] = (r_fault & fan_info_mask[i]) >> i; + fan_data->direction[i] = (direction & fan_info_mask[i]) >> i; + fan_data->duty_cycle[i] = ctrl_speed * FAN_SPEED_PRECENT_TO_CPLD_STEP; + + /* fan speed + */ + speed = accton_as5812_54t_fan_read_value(fan_speed_reg[i]); + r_speed = accton_as5812_54t_fan_read_value(fanr_speed_reg[i]); + if ( (speed < 0) || (r_speed < 0) ) + { + if (LOCAL_DEBUG) + printk ("[Error!!][%s][%d] \n", __FUNCTION__, __LINE__); + goto _exit; /* error */ + } + + if (LOCAL_DEBUG) + printk ("[fan%d:] speed:%d, r_speed=%d \n", i, speed, r_speed); + + fan_data->speed[i] = speed * FAN_SPEED_CPLD_TO_RPM_STEP; + fan_data->r_speed[i] = r_speed * FAN_SPEED_CPLD_TO_RPM_STEP; + } + + /* finish to update */ + fan_data->last_updated = jiffies; + fan_data->valid = 1; + +_exit: + mutex_unlock(&fan_data->update_lock); +} + +static int accton_as5812_54t_fan_probe(struct platform_device *pdev) +{ + int status = -1; + + /* Register sysfs hooks */ + status = sysfs_create_group(&pdev->dev.kobj, &accton_as5812_54t_fan_group); + if (status) { + goto exit; + + } + + fan_data->hwmon_dev = hwmon_device_register(&pdev->dev); + if (IS_ERR(fan_data->hwmon_dev)) { + status = PTR_ERR(fan_data->hwmon_dev); + goto exit_remove; + } + + dev_info(&pdev->dev, "accton_as5812_54t_fan\n"); + + return 0; + +exit_remove: + sysfs_remove_group(&pdev->dev.kobj, &accton_as5812_54t_fan_group); +exit: + return status; +} + +static int accton_as5812_54t_fan_remove(struct platform_device *pdev) +{ + hwmon_device_unregister(fan_data->hwmon_dev); + sysfs_remove_group(&fan_data->pdev->dev.kobj, &accton_as5812_54t_fan_group); + + return 0; +} + + +static struct platform_driver accton_as5812_54t_fan_driver = { + .probe = accton_as5812_54t_fan_probe, + .remove = accton_as5812_54t_fan_remove, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as5812_54t_fan_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as5812_54t_fan_driver); + if (ret < 0) { + goto exit; + } + + fan_data = kzalloc(sizeof(struct accton_as5812_54t_fan), GFP_KERNEL); + if (!fan_data) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as5812_54t_fan_driver); + goto exit; + } + + mutex_init(&fan_data->update_lock); + fan_data->valid = 0; + + fan_data->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(fan_data->pdev)) { + ret = PTR_ERR(fan_data->pdev); + platform_driver_unregister(&accton_as5812_54t_fan_driver); + kfree(fan_data); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as5812_54t_fan_exit(void) +{ + platform_device_unregister(fan_data->pdev); + platform_driver_unregister(&accton_as5812_54t_fan_driver); + kfree(fan_data); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as5812_54t_fan driver"); +MODULE_LICENSE("GPL"); + +module_init(accton_as5812_54t_fan_init); +module_exit(accton_as5812_54t_fan_exit); diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-leds.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-leds.c new file mode 100644 index 00000000000..39e553d2f54 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-leds.c @@ -0,0 +1,591 @@ +/* + * A LED driver for the accton_as5812_54t_led + * + * Copyright (C) 2015 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include + +extern int as5812_54t_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as5812_54t_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +#define DRVNAME "as5812_54t_led" + +struct accton_as5812_54t_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[4]; /* Register value, 0 = LOC/DIAG/FAN LED + 1 = PSU1/PSU2 LED + 2 = FAN1-4 LED + 3 = FAN5-6 LED */ +}; + +static struct accton_as5812_54t_led_data *ledctl = NULL; + +/* LED related data + */ +#define LED_TYPE_PSU1_REG_MASK 0x03 +#define LED_MODE_PSU1_GREEN_MASK 0x02 +#define LED_MODE_PSU1_AMBER_MASK 0x01 +#define LED_MODE_PSU1_OFF_MASK 0x03 +#define LED_MODE_PSU1_AUTO_MASK 0x00 + +#define LED_TYPE_PSU2_REG_MASK 0x0C +#define LED_MODE_PSU2_GREEN_MASK 0x08 +#define LED_MODE_PSU2_AMBER_MASK 0x04 +#define LED_MODE_PSU2_OFF_MASK 0x0C +#define LED_MODE_PSU2_AUTO_MASK 0x00 + +#define LED_TYPE_DIAG_REG_MASK 0x0C +#define LED_MODE_DIAG_GREEN_MASK 0x08 +#define LED_MODE_DIAG_AMBER_MASK 0x04 +#define LED_MODE_DIAG_OFF_MASK 0x0C + +#define LED_TYPE_FAN_REG_MASK 0x03 +#define LED_MODE_FAN_GREEN_MASK 0x02 +#define LED_MODE_FAN_AMBER_MASK 0x01 +#define LED_MODE_FAN_OFF_MASK 0x03 +#define LED_MODE_FAN_AUTO_MASK 0x00 + +#define LED_TYPE_FAN1_REG_MASK 0x03 +#define LED_TYPE_FAN2_REG_MASK 0x0C +#define LED_TYPE_FAN3_REG_MASK 0x30 +#define LED_TYPE_FAN4_REG_MASK 0xC0 +#define LED_TYPE_FAN5_REG_MASK 0x03 +#define LED_TYPE_FAN6_REG_MASK 0x0C + +#define LED_MODE_FANX_GREEN_MASK 0x01 +#define LED_MODE_FANX_RED_MASK 0x02 +#define LED_MODE_FANX_OFF_MASK 0x00 + +#define LED_TYPE_LOC_REG_MASK 0x30 +#define LED_MODE_LOC_ON_MASK 0x00 +#define LED_MODE_LOC_OFF_MASK 0x10 +#define LED_MODE_LOC_BLINK_MASK 0x20 + +static const u8 led_reg[] = { + 0xA, /* LOC/DIAG/FAN LED*/ + 0xB, /* PSU1/PSU2 LED */ + 0x16, /* FAN1-4 LED */ + 0x17, /* FAN4-6 LED */ +}; + +enum led_type { + LED_TYPE_PSU1, + LED_TYPE_PSU2, + LED_TYPE_DIAG, + LED_TYPE_FAN, + LED_TYPE_FAN1, + LED_TYPE_FAN2, + LED_TYPE_FAN3, + LED_TYPE_FAN4, + LED_TYPE_FAN5, + LED_TYPE_LOC +}; + +enum led_light_mode { + LED_MODE_OFF = 0, + LED_MODE_GREEN, + LED_MODE_GREEN_BLINK, + LED_MODE_AMBER, + LED_MODE_AMBER_BLINK, + LED_MODE_RED, + LED_MODE_RED_BLINK, + LED_MODE_BLUE, + LED_MODE_BLUE_BLINK, + LED_MODE_AUTO, + LED_MODE_UNKNOWN +}; + +struct led_type_mode { + enum led_type type; + int type_mask; + enum led_light_mode mode; + int mode_mask; +}; + +static struct led_type_mode led_type_mode_data[] = { +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_GREEN, LED_MODE_PSU1_GREEN_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_AMBER, LED_MODE_PSU1_AMBER_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_AUTO, LED_MODE_PSU1_AUTO_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_OFF, LED_MODE_PSU1_OFF_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_GREEN, LED_MODE_PSU2_GREEN_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_AMBER, LED_MODE_PSU2_AMBER_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_AUTO, LED_MODE_PSU2_AUTO_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_OFF, LED_MODE_PSU2_OFF_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_GREEN, LED_MODE_FAN_GREEN_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_AMBER, LED_MODE_FAN_AMBER_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_AUTO, LED_MODE_FAN_AUTO_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_OFF, LED_MODE_FAN_OFF_MASK}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 0}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 0}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 0}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 2}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 2}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 2}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 4}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 4}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 4}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 6}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 6}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 6}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 0}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 0}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 0}, +{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_GREEN, LED_MODE_DIAG_GREEN_MASK}, +{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_AMBER, LED_MODE_DIAG_AMBER_MASK}, +{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_OFF, LED_MODE_DIAG_OFF_MASK}, +{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_AMBER, LED_MODE_LOC_ON_MASK}, +{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_OFF, LED_MODE_LOC_OFF_MASK}, +{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_AMBER_BLINK, LED_MODE_LOC_BLINK_MASK} +}; + + +struct fanx_info_s { + u8 cname; /* device name */ + enum led_type type; + u8 reg_id; /* map to led_reg & reg_val */ +}; + +static struct fanx_info_s fanx_info[] = { + {'1', LED_TYPE_FAN1, 2}, + {'2', LED_TYPE_FAN2, 2}, + {'3', LED_TYPE_FAN3, 2}, + {'4', LED_TYPE_FAN4, 2}, + {'5', LED_TYPE_FAN5, 3} +}; + +static int led_reg_val_to_light_mode(enum led_type type, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + + if (type != led_type_mode_data[i].type) + continue; + + if ((led_type_mode_data[i].type_mask & reg_val) == + led_type_mode_data[i].mode_mask) + { + return led_type_mode_data[i].mode; + } + } + + return LED_MODE_UNKNOWN; +} + +static u8 led_light_mode_to_reg_val(enum led_type type, + enum led_light_mode mode, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + if (type != led_type_mode_data[i].type) + continue; + + if (mode != led_type_mode_data[i].mode) + continue; + + reg_val = led_type_mode_data[i].mode_mask | + (reg_val & (~led_type_mode_data[i].type_mask)); + } + + return reg_val; +} + +static int accton_as5812_54t_led_read_value(u8 reg) +{ + return as5812_54t_cpld_read(0x60, reg); +} + +static int accton_as5812_54t_led_write_value(u8 reg, u8 value) +{ + return as5812_54t_cpld_write(0x60, reg, value); +} + +static void accton_as5812_54t_led_update(void) +{ + mutex_lock(&ledctl->update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as5812_54t_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = accton_as5812_54t_led_read_value(led_reg[i]); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg[i], status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as5812_54t_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + u8 reg, enum led_type type) +{ + int reg_val; + + mutex_lock(&ledctl->update_lock); + + reg_val = accton_as5812_54t_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + accton_as5812_54t_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as5812_54t_led_psu_1_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5812_54t_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_PSU1); +} + +static enum led_brightness accton_as5812_54t_led_psu_1_get(struct led_classdev *cdev) +{ + accton_as5812_54t_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU1, ledctl->reg_val[1]); +} + +static void accton_as5812_54t_led_psu_2_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5812_54t_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_PSU2); +} + +static enum led_brightness accton_as5812_54t_led_psu_2_get(struct led_classdev *cdev) +{ + accton_as5812_54t_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU2, ledctl->reg_val[1]); +} + +static void accton_as5812_54t_led_fan_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5812_54t_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_FAN); +} + +static enum led_brightness accton_as5812_54t_led_fan_get(struct led_classdev *cdev) +{ + accton_as5812_54t_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_FAN, ledctl->reg_val[0]); +} + + +static void accton_as5812_54t_led_fanx_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + enum led_type led_type1; + int reg_id; + int i, nsize; + int ncount = sizeof(fanx_info)/sizeof(struct fanx_info_s); + + for(i=0;iname); + + if (led_cdev->name[nsize-1] == fanx_info[i].cname) + { + led_type1 = fanx_info[i].type; + reg_id = fanx_info[i].reg_id; + accton_as5812_54t_led_set(led_cdev, led_light_mode, led_reg[reg_id], led_type1); + return; + } + } +} + + +static enum led_brightness accton_as5812_54t_led_fanx_get(struct led_classdev *cdev) +{ + enum led_type led_type1; + int reg_id; + int i, nsize; + int ncount = sizeof(fanx_info)/sizeof(struct fanx_info_s); + + for(i=0;iname); + + if (cdev->name[nsize-1] == fanx_info[i].cname) + { + led_type1 = fanx_info[i].type; + reg_id = fanx_info[i].reg_id; + accton_as5812_54t_led_update(); + return led_reg_val_to_light_mode(led_type1, ledctl->reg_val[reg_id]); + } + } + + + return led_reg_val_to_light_mode(LED_TYPE_FAN1, ledctl->reg_val[2]); +} + + +static void accton_as5812_54t_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5812_54t_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_DIAG); +} + +static enum led_brightness accton_as5812_54t_led_diag_get(struct led_classdev *cdev) +{ + accton_as5812_54t_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void accton_as5812_54t_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5812_54t_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_LOC); +} + +static enum led_brightness accton_as5812_54t_led_loc_get(struct led_classdev *cdev) +{ + accton_as5812_54t_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static struct led_classdev accton_as5812_54t_leds[] = { + [LED_TYPE_PSU1] = { + .name = "accton_as5812_54t_led::psu1", + .default_trigger = "unused", + .brightness_set = accton_as5812_54t_led_psu_1_set, + .brightness_get = accton_as5812_54t_led_psu_1_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "accton_as5812_54t_led::psu2", + .default_trigger = "unused", + .brightness_set = accton_as5812_54t_led_psu_2_set, + .brightness_get = accton_as5812_54t_led_psu_2_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN] = { + .name = "accton_as5812_54t_led::fan", + .default_trigger = "unused", + .brightness_set = accton_as5812_54t_led_fan_set, + .brightness_get = accton_as5812_54t_led_fan_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN1] = { + .name = "accton_as5812_54t_led::fan1", + .default_trigger = "unused", + .brightness_set = accton_as5812_54t_led_fanx_set, + .brightness_get = accton_as5812_54t_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN2] = { + .name = "accton_as5812_54t_led::fan2", + .default_trigger = "unused", + .brightness_set = accton_as5812_54t_led_fanx_set, + .brightness_get = accton_as5812_54t_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN3] = { + .name = "accton_as5812_54t_led::fan3", + .default_trigger = "unused", + .brightness_set = accton_as5812_54t_led_fanx_set, + .brightness_get = accton_as5812_54t_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN4] = { + .name = "accton_as5812_54t_led::fan4", + .default_trigger = "unused", + .brightness_set = accton_as5812_54t_led_fanx_set, + .brightness_get = accton_as5812_54t_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN5] = { + .name = "accton_as5812_54t_led::fan5", + .default_trigger = "unused", + .brightness_set = accton_as5812_54t_led_fanx_set, + .brightness_get = accton_as5812_54t_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_DIAG] = { + .name = "accton_as5812_54t_led::diag", + .default_trigger = "unused", + .brightness_set = accton_as5812_54t_led_diag_set, + .brightness_get = accton_as5812_54t_led_diag_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_LOC] = { + .name = "accton_as5812_54t_led::loc", + .default_trigger = "unused", + .brightness_set = accton_as5812_54t_led_loc_set, + .brightness_get = accton_as5812_54t_led_loc_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, +}; + +static int accton_as5812_54t_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as5812_54t_leds); i++) { + led_classdev_suspend(&accton_as5812_54t_leds[i]); + } + + return 0; +} + +static int accton_as5812_54t_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as5812_54t_leds); i++) { + led_classdev_resume(&accton_as5812_54t_leds[i]); + } + + return 0; +} + +static int accton_as5812_54t_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(accton_as5812_54t_leds); i++) { + ret = led_classdev_register(&pdev->dev, &accton_as5812_54t_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(accton_as5812_54t_leds)){ + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&accton_as5812_54t_leds[i]); + } + } + + return ret; +} + +static int accton_as5812_54t_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(accton_as5812_54t_leds); i++) { + led_classdev_unregister(&accton_as5812_54t_leds[i]); + } + + return 0; +} + +static struct platform_driver accton_as5812_54t_led_driver = { + .probe = accton_as5812_54t_led_probe, + .remove = accton_as5812_54t_led_remove, + .suspend = accton_as5812_54t_led_suspend, + .resume = accton_as5812_54t_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as5812_54t_led_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as5812_54t_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct accton_as5812_54t_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as5812_54t_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&accton_as5812_54t_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as5812_54t_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&accton_as5812_54t_led_driver); + kfree(ledctl); +} + +module_init(accton_as5812_54t_led_init); +module_exit(accton_as5812_54t_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as5812_54t_led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-psu.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-psu.c new file mode 100644 index 00000000000..c62998655bc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-psu.c @@ -0,0 +1,357 @@ +/* + * An hwmon driver for accton as5812_54t Power Module + * + * Copyright (C) 2015 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define PSU_STATUS_I2C_ADDR 0x60 +#define PSU_STATUS_I2C_REG_OFFSET 0x2 + +#define IS_POWER_GOOD(id, value) (!!(value & BIT(id*4 + 1))) +#define IS_PRESENT(id, value) (!(value & BIT(id*4))) + +static ssize_t show_index(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); +static int as5812_54t_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as5812_54t_cpld_read(unsigned short cpld_addr, u8 reg); +static int as5812_54t_psu_model_name_get(struct device *dev); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as5812_54t_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[14]; /* Model name, read from eeprom */ +}; + +static struct as5812_54t_psu_data *as5812_54t_psu_update_device(struct device *dev); + +enum as5812_54t_psu_sysfs_attributes { + PSU_INDEX, + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_index, S_IRUGO, show_index, NULL, PSU_INDEX); +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_model_name,NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); + +static struct attribute *as5812_54t_psu_attributes[] = { + &sensor_dev_attr_psu_index.dev_attr.attr, + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + NULL +}; + +static ssize_t show_index(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54t_psu_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->index); +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as5812_54t_psu_data *data = as5812_54t_psu_update_device(dev); + u8 status = 0; + + if (!data->valid) { + return sprintf(buf, "0\n"); + } + + if (attr->index == PSU_PRESENT) { + status = IS_PRESENT(data->index, data->status); + } + else { /* PSU_POWER_GOOD */ + status = IS_POWER_GOOD(data->index, data->status); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as5812_54t_psu_data *data = as5812_54t_psu_update_device(dev); + + if (!data->valid) { + return 0; + } + + if (!IS_PRESENT(data->index, data->status)) { + return 0; + } + + if (as5812_54t_psu_model_name_get(dev) < 0) { + return -ENXIO; + } + + return sprintf(buf, "%s\n", data->model_name); +} + +static const struct attribute_group as5812_54t_psu_group = { + .attrs = as5812_54t_psu_attributes, +}; + +static int as5812_54t_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as5812_54t_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as5812_54t_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as5812_54t_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "as5812_54t_psu", + NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as5812_54t_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as5812_54t_psu_remove(struct i2c_client *client) +{ + struct as5812_54t_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as5812_54t_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as5812_54t_psu1, + as5812_54t_psu2 +}; + +static const struct i2c_device_id as5812_54t_psu_id[] = { + { "as5812_54t_psu1", as5812_54t_psu1 }, + { "as5812_54t_psu2", as5812_54t_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as5812_54t_psu_id); + +static struct i2c_driver as5812_54t_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as5812_54t_psu", + }, + .probe = as5812_54t_psu_probe, + .remove = as5812_54t_psu_remove, + .id_table = as5812_54t_psu_id, + .address_list = normal_i2c, +}; + +static int as5812_54t_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + result = 0; + +abort: + return result; +} + +enum psu_type { + PSU_YM_2401_JCR, /* AC110V - F2B */ + PSU_YM_2401_JDR, /* AC110V - B2F */ + PSU_CPR_4011_4M11, /* AC110V - F2B */ + PSU_CPR_4011_4M21, /* AC110V - B2F */ + PSU_CPR_6011_2M11, /* AC110V - F2B */ + PSU_CPR_6011_2M21, /* AC110V - B2F */ + PSU_UM400D_01G, /* DC48V - F2B */ + PSU_UM400D01_01G /* DC48V - B2F */ +}; + +struct model_name_info { + enum psu_type type; + u8 offset; + u8 length; + char* model_name; +}; + +struct model_name_info models[] = { +{PSU_YM_2401_JCR, 0x20, 11, "YM-2401JCR"}, +{PSU_YM_2401_JDR, 0x20, 11, "YM-2401JDR"}, +{PSU_CPR_4011_4M11, 0x26, 13, "CPR-4011-4M11"}, +{PSU_CPR_4011_4M21, 0x26, 13, "CPR-4011-4M21"}, +{PSU_CPR_6011_2M11, 0x26, 13, "CPR-6011-2M11"}, +{PSU_CPR_6011_2M21, 0x26, 13, "CPR-6011-2M21"}, +{PSU_UM400D_01G, 0x50, 9, "um400d01G"}, +{PSU_UM400D01_01G, 0x50, 12, "um400d01-01G"}, +}; + +static int as5812_54t_psu_model_name_get(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54t_psu_data *data = i2c_get_clientdata(client); + int i, status; + + for (i = 0; i < ARRAY_SIZE(models); i++) { + memset(data->model_name, 0, sizeof(data->model_name)); + + status = as5812_54t_psu_read_block(client, models[i].offset, + data->model_name, models[i].length); + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x) offset(0x%x)\n", + client->addr, models[i].offset); + return status; + } + else { + data->model_name[models[i].length] = '\0'; + } + + if (i == PSU_YM_2401_JCR || i == PSU_YM_2401_JDR) { + /* Skip the meaningless data byte 8*/ + data->model_name[8] = data->model_name[9]; + data->model_name[9] = data->model_name[10]; + data->model_name[10] = '\0'; + } + + /* Determine if the model name is known, if not, read next index + */ + if (strncmp(data->model_name, models[i].model_name, models[i].length) == 0) { + return 0; + } + else { + data->model_name[0] = '\0'; + } + } + + return -ENODATA; +} + +static struct as5812_54t_psu_data *as5812_54t_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54t_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status = -1; + + dev_dbg(&client->dev, "Starting as5812_54t update\n"); + data->valid = 0; + + /* Read psu status */ + status = as5812_54t_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg (0x%x) err %d\n", PSU_STATUS_I2C_ADDR, status); + goto exit; + } + else { + data->status = status; + } + + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(as5812_54t_psu_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton as5812_54t_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/ym2651y.c new file mode 120000 index 00000000000..f4d67640ccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/ym2651y.c @@ -0,0 +1 @@ +../../common/modules/ym2651y.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/service/as5812-platform-init.service b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/service/as5812-platform-init.service new file mode 100755 index 00000000000..91c9adb01cc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/service/as5812-platform-init.service @@ -0,0 +1,17 @@ +[Unit] +Description=Accton AS5812-54X Platform Monitoring service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +Type=simple +ExecStartPre=/usr/local/bin/accton_as5812_util.py install +ExecStart=/usr/local/bin/accton_as5812_monitor.py +#RemainAfterExit=yes + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/setup.py b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/setup.py new file mode 100755 index 00000000000..0af58ba919b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as5812_54t', + version='1.0', + description='Module to initialize Accton AS5812-54X platforms', + + packages=['as5812_54t'], + package_dir={'as5812_54t': 'as5812-54t/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/utils/README b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/utils/README new file mode 100755 index 00000000000..2284eb091fc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/utils/README @@ -0,0 +1,60 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +To initialize the system, run "accton_as5812_54t_util.py install". +To clean up the drivers & devices, run "accton_as5812_54t_util.py clean". +To dump information of sensors, run "accton_as5812_54t_util.py show". +To dump SFP EEPROM, run "accton_as5812_54t_util.py sff". +To set fan speed, run "accton_as5812_54t_util.py set fan". +To enable/disable SFP emission, run "accton_as5812_54t_util.py set sfp". +To set system LEDs' color, run "accton_as5812_54t_util.py set led" +For more information, run "accton_as5812_54t_util.py --help". + +==================================================================== +Besides applying accton_as5812_54t_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +LED controls can be found under /sys/class/leds. The sysfs interface +color mappings are as follows: +Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + +There are 5 system LEDs, loc, diag, fan, ps1, and ps2. +They are lit automatically by CPLD, but the loc and diag. +The loc led has only 1 color, blue. +The diag one has 3 colors: red, amber, and green. + +Fan controls can be found in /sys/bus/i2c/devices/2-0066. +There are 12 fans inside 6 fan modules. +All fans share 1 duty setting, ranged from 0~100. + +Three temperature sensors are controlled by the lm75 kernel modules. +They should already be visible under /sys/bus/i2c/drivers/lm75/. + +Two power supplies are controlled by the CPLD. +Here provide their status under +/sys/bus/i2c/devices/10-0050 and /sys/bus/i2c/devices/11-0053. + +There are 32 QSFP+ modules are equipped. +Apply "accton_as5812_54t_util.py show" to get their status. +Apply "accton_as5812_54t_util.py set sfp" to turn on/off light transmission. +Apply "accton_as5812_54t_util.py sff" to dump EEPROM information. +Before operating on that QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/utils/accton_as5812_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/utils/accton_as5812_monitor.py new file mode 100755 index 00000000000..c8574557b3d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/utils/accton_as5812_monitor.py @@ -0,0 +1,213 @@ +#!/usr/bin/env python +# +# Copyright (C) 2019 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 05/08/2019: Roy Lee, changed for as5812-54t. +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + import signal + from tabulate import tabulate + from as5812_54t.fanutil import FanUtil + from as5812_54t.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = 'accton_as5812_monitor' +DUTY_MAX = 100 + +global log_file +global log_console + +# Make a class we can use to capture stdout and sterr in the log +class accton_as5812_monitor(object): + # static temp var + _ori_temp = 0 + _new_perc = 0 + + llog = logging.getLogger("["+FUNCTION_NAME+"]") + def __init__(self, log_console, log_file): + """Needs a logger and a logger level.""" + + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + sys_handler.setLevel(logging.WARNING) #only fatal for syslog + self.llog.addHandler(sys_handler) + self.llog.setLevel(logging.DEBUG) + + if log_file: + fh = logging.FileHandler(log_file) + fh.setLevel(logging.INFO) + formatter = logging.Formatter('%(asctime)-15s %(name)s %(message)s') + fh.setFormatter(formatter) + self.llog.addHandler(fh) + + # set up logging to console + if log_console: + console = logging.StreamHandler() + console.setLevel(logging.DEBUG) #For debugging + formatter = logging.Formatter('%(asctime)-15s %(name)s %(message)s') + console.setFormatter(formatter) + self.llog.addHandler(console) + + def manage_fans(self): + FAN_LEV1_UP_TEMP = 57700 # temperature + FAN_LEV1_DOWN_TEMP = 0 # unused + FAN_LEV1_SPEED_PERC = DUTY_MAX # percentage*/ + + FAN_LEV2_UP_TEMP = 53000 + FAN_LEV2_DOWN_TEMP = 52700 + FAN_LEV2_SPEED_PERC = 80 + + FAN_LEV3_UP_TEMP = 49500 + FAN_LEV3_DOWN_TEMP = 47700 + FAN_LEV3_SPEED_PERC = 65 + + FAN_LEV4_UP_TEMP = 0 # unused + FAN_LEV4_DOWN_TEMP = 42700 + FAN_LEV4_SPEED_PERC = 40 + + + thermal = ThermalUtil() + fan = FanUtil() + + temp1 = thermal.get_thermal_1_val() + if temp1 is None: + return False + + temp2 = thermal.get_thermal_2_val() + if temp2 is None: + return False + + new_temp = (temp1 + temp2) / 2 + + for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): + fan_stat = fan.get_fan_status(x) + if fan_stat is None or fan_stat is False: + self._new_perc = FAN_LEV1_SPEED_PERC + self.llog.error('SET new_perc to %d (FAN fault. fan_num:%d)', self._new_perc, x) + break + else: + self.llog.debug('fan_stat is True (fan_num:%d)', x) + + if fan_stat is not None and fan_stat is not False: + diff = new_temp - self._ori_temp + if diff == 0: + self.llog.debug('RETURN. THERMAL temp not changed. %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + return True + else: + if diff >= 0: + is_up = True + self.llog.debug('THERMAL temp UP %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + else: + is_up = False + self.llog.debug('THERMAL temp DOWN %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + + if is_up is True: + if new_temp >= FAN_LEV1_UP_TEMP: + self._new_perc = FAN_LEV1_SPEED_PERC + elif new_temp >= FAN_LEV2_UP_TEMP: + self._new_perc = FAN_LEV2_SPEED_PERC + elif new_temp >= FAN_LEV3_UP_TEMP: + self._new_perc = FAN_LEV3_SPEED_PERC + else: + self._new_perc = FAN_LEV4_SPEED_PERC + self.llog.debug('SET. FAN_SPEED as %d (new THERMAL temp:%d)', self._new_perc, new_temp) + else: + if new_temp <= FAN_LEV4_DOWN_TEMP: + self._new_perc = FAN_LEV4_SPEED_PERC + elif new_temp <= FAN_LEV3_DOWN_TEMP: + self._new_perc = FAN_LEV3_SPEED_PERC + elif new_temp <= FAN_LEV2_DOWN_TEMP: + self._new_perc = FAN_LEV2_SPEED_PERC + else: + self._new_perc = FAN_LEV1_SPEED_PERC + self.llog.debug('SET. FAN_SPEED as %d (new THERMAL temp:%d)', self._new_perc, new_temp) + + cur_perc = fan.get_fan_duty_cycle(fan.get_idx_fan_start()) + if cur_perc == self._new_perc: + self.llog.debug('RETURN. FAN speed not changed. %d / %d (new_perc / ori_perc)', self._new_perc, cur_perc) + return True + + set_stat = fan.set_fan_duty_cycle(fan.get_idx_fan_start(), self._new_perc) + if set_stat is True: + self.llog.debug('PASS. set_fan_duty_cycle (%d)', self._new_perc) + else: + self.llog.error('FAIL. set_fan_duty_cycle (%d)', self._new_perc) + + self.llog.debug('GET. ori_perc is %d. ori_temp is %d', cur_perc, self._ori_temp) + self._ori_temp = new_temp + self.llog.info('UPDATE. ori_perc to %d. ori_temp to %d', cur_perc, self._ori_temp) + + return True + +def sig_handler(signum, frame): + fan = FanUtil() + logging.critical('Cause signal %d, set fan speed max.', signum) + fan.set_fan_duty_cycle(fan.get_idx_fan_start(), DUTY_MAX) + sys.exit(0) + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_console = 0 + log_file = "" + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl') + except getopt.GetoptError: + print 'Usage: %s [-d] [-l]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l]' % sys.argv[0] + return 0 + elif opt in ('-d'): + log_console = 1 + elif opt in ('-l'): + log_file = '%s.log' % sys.argv[0] + + signal.signal(signal.SIGINT, sig_handler) + signal.signal(signal.SIGTERM, sig_handler) + monitor = accton_as5812_monitor(log_console, log_file) + + #time.sleep(100) + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(10) + + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/utils/accton_as5812_util.py b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/utils/accton_as5812_util.py new file mode 100755 index 00000000000..cad526e17af --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/utils/accton_as5812_util.py @@ -0,0 +1,563 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + + + + +PROJECT_NAME = 'as5812_54t' +version = '0.1.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan':5,'thermal':3, 'psu':2, 'sfp':6} +FORCE = 0 +logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-6 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-32 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ROY]"+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_check(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + return True + +kos = [ +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe optoe', +'modprobe x86-64-accton-as5812-54t-cpld' , +'modprobe cpr_4011_4mxx' , +'modprobe ym2651y' , +'modprobe x86-64-accton-as5812-54t-psu' , +'modprobe x86-64-accton-as5812-54t-fan' , +'modprobe x86-64-accton-as5812-54t-leds' ] + +def driver_install(): + global FORCE + status, output = log_os_system("depmod", 1) + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + lst = rm.split(" ") + if len(lst) > 3: + del(lst[3]) + rm = " ".join(lst) + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +led_prefix ='/sys/class/leds/accton_'+PROJECT_NAME+'_led::' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2']} +hwmon_nodes = {'led': ['brightness'] } +hwmon_prefix ={'led': led_prefix} + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'fan': ['2-0066'] , + 'thermal': ['15-0048','16-0049', '17-004a'] , + 'psu': ['11-0050','12-0053'], + 'sfp': ['-0050']} +i2c_nodes = {'fan': ['present', 'front_speed_rpm', 'rear_speed_rpm'] , + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['sfp_is_present ', 'sfp_tx_disable_all']} + +sfp_map = [4,6,3,5,7,2] + +sfp_1st_index = 48 + +mknod =[ +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device' , +'echo as5812_54t_cpld 0x60 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-15/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-16/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-17/new_device', +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo as5812_54t_psu1 0x38 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo cpr_4011_4mxx 0x3c > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as5812_54t_psu1 0x50 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo ym2401 0x58 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as5812_54t_psu2 0x3b > /sys/bus/i2c/devices/i2c-12/new_device', +'echo cpr_4011_4mxx 0x3f > /sys/bus/i2c/devices/i2c-12/new_device', +'echo as5812_54t_psu2 0x53 > /sys/bus/i2c/devices/i2c-12/new_device', +'echo ym2401 0x5b > /sys/bus/i2c/devices/i2c-12/new_device'] + +mknod2 =[ +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-0/new_device' , +'echo as5812_54t_cpld 0x60 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-15/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-16/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-17/new_device', +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo as5812_54t_psu1 0x38 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo cpr_4011_4mxx 0x3c > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as5812_54t_psu1 0x50 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo ym2401 0x58 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as5812_54t_psu2 0x3b > /sys/bus/i2c/devices/i2c-12/new_device', +'echo cpr_4011_4mxx 0x3f > /sys/bus/i2c/devices/i2c-12/new_device', +'echo as5812_54t_psu2 0x53 > /sys/bus/i2c/devices/i2c-12/new_device', +'echo ym2401 0x5b > /sys/bus/i2c/devices/i2c-12/new_device'] + + + +def i2c_order_check(): + # i2c bus 0 and 1 might be installed in different order. + # Here check if 0x71 is exist @ i2c-0 + tmp = "echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-0/new_device" + status, output = log_os_system(tmp, 0) + if not device_exist(): + order = 1 + else: + order = 0 + tmp = "echo 0x71 > /sys/bus/i2c/devices/i2c-0/delete_device" + status, output = log_os_system(tmp, 0) + return order + +def device_install(): + global FORCE + + order = i2c_order_check() + + # if 0x71 is not exist @i2c-0, use reversed bus order + if order: + for i in range(0,len(mknod2)): + #for pca954x need times to built new i2c buses + if mknod2[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod2[i], 1) + if status: + print output + if FORCE == 0: + return status + else: + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + for i in range(0,len(sfp_map)): + status, output =log_os_system("echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/1-0071", 0) + if status==0: + I2C_ORDER=1 + else: + I2C_ORDER=0 + + for i in range(sfp_1st_index,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + if I2C_ORDER==0: + nodelist = mknod + else: + nodelist = mknod2 + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_check() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_check() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_check()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(sfp_1st_index,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'sfp_eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan'] ['fan1'][0] + node = node.replace(node.split("/")[-1], 'fan_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0071", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/classes/fanutil.py new file mode 100755 index 00000000000..95a4558622e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/classes/fanutil.py @@ -0,0 +1,243 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_NUM_ON_MAIN_BROAD = 5 + FAN_NUM_1_IDX = 1 + FAN_NUM_2_IDX = 2 + FAN_NUM_3_IDX = 3 + FAN_NUM_4_IDX = 4 + FAN_NUM_5_IDX = 5 + + FAN_NODE_NUM_OF_MAP = 6 + FAN_NODE_FAULT_IDX_OF_MAP = 1 + FAN_NODE_SPEED_IDX_OF_MAP = 2 + FAN_NODE_DIR_IDX_OF_MAP = 3 + FAN_NODE_DUTY_IDX_OF_MAP = 4 + FANR_NODE_FAULT_IDX_OF_MAP = 5 + FANR_NODE_SPEED_IDX_OF_MAP = 6 + + BASE_VAL_PATH = '/sys/devices/platform/as5812_54x_fan/{0}' + + #logfile = '' + #loglevel = logging.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + _fan_to_device_path_mapping = {} + + _fan_to_device_node_mapping = { + (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault', + (FAN_NUM_1_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan1_speed_rpm', + (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction', + (FAN_NUM_1_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan1_duty_cycle_percentage', + (FAN_NUM_1_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr1_fault', + (FAN_NUM_1_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr1_speed_rpm', + + (FAN_NUM_2_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan2_fault', + (FAN_NUM_2_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan2_speed_rpm', + (FAN_NUM_2_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan2_direction', + (FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage', + (FAN_NUM_2_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr2_fault', + (FAN_NUM_2_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr2_speed_rpm', + + (FAN_NUM_3_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan3_fault', + (FAN_NUM_3_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan3_speed_rpm', + (FAN_NUM_3_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan3_direction', + (FAN_NUM_3_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan3_duty_cycle_percentage', + (FAN_NUM_3_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr3_fault', + (FAN_NUM_3_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr3_speed_rpm', + + (FAN_NUM_4_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan4_fault', + (FAN_NUM_4_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan4_speed_rpm', + (FAN_NUM_4_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan4_direction', + (FAN_NUM_4_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan4_duty_cycle_percentage', + (FAN_NUM_4_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr4_fault', + (FAN_NUM_4_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr4_speed_rpm', + + (FAN_NUM_5_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan5_fault', + (FAN_NUM_5_IDX, FAN_NODE_SPEED_IDX_OF_MAP): 'fan5_speed_rpm', + (FAN_NUM_5_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan5_direction', + (FAN_NUM_5_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan5_duty_cycle_percentage', + (FAN_NUM_5_IDX, FANR_NODE_FAULT_IDX_OF_MAP): 'fanr5_fault', + (FAN_NUM_5_IDX, FANR_NODE_SPEED_IDX_OF_MAP): 'fanr5_speed_rpm', + } + + logger = logging.getLogger(__name__) + def __init__(self, log_level=logging.DEBUG): + ch = logging.StreamHandler() + ch.setLevel(log_level) + self.logger.addHandler(ch) + + fan_path = self.BASE_VAL_PATH + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_NUM_ON_MAIN_BROAD+1): + for node_num in range(self.FAN_NODE_FAULT_IDX_OF_MAP, self.FAN_NODE_NUM_OF_MAP+1): + self._fan_to_device_path_mapping[(fan_num, node_num)] = fan_path.format( + self._fan_to_device_node_mapping[(fan_num, node_num)]) + + + def _get_fan_to_device_node(self, fan_num, node_num): + return self._fan_to_device_node_mapping[(fan_num, node_num)] + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + self.logger.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + self.logger.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'r') + except IOError as e: + self.logger.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + self.logger.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + self.logger.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + self.logger.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + self.logger.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + self.logger.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + self.logger.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + self.logger.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + def get_num_fans(self): + return self.FAN_NUM_ON_MAIN_BROAD + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM_OF_MAP + + def get_idx_node_start(self): + return self.FAN_NODE_FAULT_IDX_OF_MAP + + def get_size_node_map(self): + return len(self._fan_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._fan_to_device_path_mapping) + + def get_fan_to_device_path(self, fan_num, node_num): + return self._fan_to_device_path_mapping[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_FAULT_IDX_OF_MAP) + + def get_fan_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_SPEED_IDX_OF_MAP) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DIR_IDX_OF_MAP) + + def get_fan_duty_cycle(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DUTY_IDX_OF_MAP) + + def set_fan_duty_cycle(self, fan_num, val): + return self._set_fan_node_val(fan_num, self.FAN_NODE_DUTY_IDX_OF_MAP, val) + + def get_fanr_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_FAULT_IDX_OF_MAP) + + def get_fanr_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP) + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + self.logger.debug('GET. Parameter error. fan_num, %d', fan_num) + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + self.logger.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + if self.get_fanr_fault(fan_num) is not None and self.get_fanr_fault(fan_num) > 0: + self.logger.debug('GET. FANR fault. fan_num, %d', fan_num) + return False + + return True + +#def main(): +# fan = FanUtil() +# +# print 'get_size_node_map : %d' % fan.get_size_node_map() +# print 'get_size_path_map : %d' % fan.get_size_path_map() +# for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): +# for y in range(fan.get_idx_node_start(), fan.get_num_nodes()+1): +# print fan.get_fan_to_device_path(x, y) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/classes/thermalutil.py new file mode 100755 index 00000000000..7799bb3d53c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/classes/thermalutil.py @@ -0,0 +1,125 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# +# ------------------------------------------------------------------ + +try: + import time + import logging + import glob + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + + THERMAL_NUM_ON_MAIN_BROAD = 3 + THERMAL_NUM_1_IDX = 1 # 1_ON_MAIN_BROAD + THERMAL_NUM_2_IDX = 2 # 2_ON_MAIN_BROAD + THERMAL_NUM_3_IDX = 3 # 3_ON_MAIN_BROAD + + BASE_VAL_PATH = '/sys/bus/i2c/devices/{0}-00{1}/hwmon/hwmon*/temp1_input' + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + _thermal_to_device_path_mapping = {} + + _thermal_to_device_node_mapping = { + THERMAL_NUM_1_IDX: ['61', '48'], + THERMAL_NUM_2_IDX: ['62', '49'], + THERMAL_NUM_3_IDX: ['63', '4a'], + } + + logger = logging.getLogger(__name__) + def __init__(self, log_level=logging.DEBUG): + ch = logging.StreamHandler() + ch.setLevel(log_level) + self.logger.addHandler(ch) + thermal_path = self.BASE_VAL_PATH + + for x in range(self.THERMAL_NUM_1_IDX, self.THERMAL_NUM_ON_MAIN_BROAD+1): + self._thermal_to_device_path_mapping[x] = thermal_path.format( + self._thermal_to_device_node_mapping[x][0], + self._thermal_to_device_node_mapping[x][1]) + + def _get_thermal_node_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_ON_MAIN_BROAD: + self.logger.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_to_device_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + self.logger.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + self.logger.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + self.logger.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + + def get_num_thermals(self): + return self.THERMAL_NUM_ON_MAIN_BROAD + + def get_idx_thermal_start(self): + return self.THERMAL_NUM_1_IDX + + def get_size_node_map(self): + return len(self._thermal_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._thermal_to_device_path_mapping) + + def get_thermal_to_device_path(self, thermal_num): + return self._thermal_to_device_path_mapping[thermal_num] + + def get_thermal_1_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + + def get_thermal_2_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) + +#def main(): +# thermal = ThermalUtil() +# +# print 'get_size_node_map : %d' % thermal.get_size_node_map() +# print 'get_size_path_map : %d' % thermal.get_size_path_map() +# for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): +# print thermal.get_thermal_to_device_path(x) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/Makefile new file mode 100755 index 00000000000..ba91f25f243 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/Makefile @@ -0,0 +1,17 @@ +ifneq ($(KERNELRELEASE),) +obj-m:= i2c-mux-accton_as5812_54x_cpld.o \ + accton_as5812_54x_fan.o leds-accton_as5812_54x.o accton_as5812_54x_psu.o \ + cpr_4011_4mxx.o ym2651y.o + +else +ifeq (,$(KERNEL_SRC)) +$(error KERNEL_SRC is not defined) +else +KERNELDIR:=$(KERNEL_SRC) +endif +PWD:=$(shell pwd) +default: + $(MAKE) -C $(KERNELDIR) M=$(PWD) modules +clean: + rm -rf *.o *.mod.o *.mod.o *.ko .*cmd .tmp_versions Module.markers Module.symvers modules.order +endif diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_fan.c new file mode 100644 index 00000000000..deeabde23b2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_fan.c @@ -0,0 +1,457 @@ +/* + * A hwmon driver for the Accton as5710 54x fan contrl + * + * Copyright (C) 2013 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as5812_54x_fan" + +#define FAN_MAX_NUMBER 5 +#define FAN_SPEED_CPLD_TO_RPM_STEP 150 +#define FAN_SPEED_PRECENT_TO_CPLD_STEP 5 +#define FAN_DUTY_CYCLE_MIN 0 /* 10% ??*/ +#define FAN_DUTY_CYCLE_MAX 100 /* 100% */ + +#define CPLD_REG_FAN_STATUS_OFFSET 0xC +#define CPLD_REG_FANR_STATUS_OFFSET 0x1F +#define CPLD_REG_FAN_DIRECTION_OFFSET 0x1E + +#define CPLD_FAN1_REG_SPEED_OFFSET 0x10 +#define CPLD_FAN2_REG_SPEED_OFFSET 0x11 +#define CPLD_FAN3_REG_SPEED_OFFSET 0x12 +#define CPLD_FAN4_REG_SPEED_OFFSET 0x13 +#define CPLD_FAN5_REG_SPEED_OFFSET 0x14 + +#define CPLD_FANR1_REG_SPEED_OFFSET 0x18 +#define CPLD_FANR2_REG_SPEED_OFFSET 0x19 +#define CPLD_FANR3_REG_SPEED_OFFSET 0x1A +#define CPLD_FANR4_REG_SPEED_OFFSET 0x1B +#define CPLD_FANR5_REG_SPEED_OFFSET 0x1C + +#define CPLD_REG_FAN_PWM_CYCLE_OFFSET 0xD + +#define CPLD_FAN1_INFO_BIT_MASK 0x1 +#define CPLD_FAN2_INFO_BIT_MASK 0x2 +#define CPLD_FAN3_INFO_BIT_MASK 0x4 +#define CPLD_FAN4_INFO_BIT_MASK 0x8 +#define CPLD_FAN5_INFO_BIT_MASK 0x10 + +#define PROJECT_NAME + +#define LOCAL_DEBUG 0 + +static struct accton_as5812_54x_fan *fan_data = NULL; + +struct accton_as5812_54x_fan { + struct platform_device *pdev; + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status[FAN_MAX_NUMBER]; /* inner first fan status */ + u32 speed[FAN_MAX_NUMBER]; /* inner first fan speed */ + u8 direction[FAN_MAX_NUMBER]; /* reconrd the direction of inner first and second fans */ + u32 duty_cycle[FAN_MAX_NUMBER]; /* control the speed of inner first and second fans */ + u8 r_status[FAN_MAX_NUMBER]; /* inner second fan status */ + u32 r_speed[FAN_MAX_NUMBER]; /* inner second fan speed */ +}; + +/*******************/ +#define MAKE_FAN_MASK_OR_REG(name,type) \ + CPLD_FAN##type##1_##name, \ + CPLD_FAN##type##2_##name, \ + CPLD_FAN##type##3_##name, \ + CPLD_FAN##type##4_##name, \ + CPLD_FAN##type##5_##name, + +/* fan related data + */ +static const u8 fan_info_mask[] = { + MAKE_FAN_MASK_OR_REG(INFO_BIT_MASK,) +}; + +static const u8 fan_speed_reg[] = { + MAKE_FAN_MASK_OR_REG(REG_SPEED_OFFSET,) +}; + +static const u8 fanr_speed_reg[] = { + MAKE_FAN_MASK_OR_REG(REG_SPEED_OFFSET,R) +}; + +/*******************/ +#define DEF_FAN_SET(id) \ + FAN##id##_FAULT, \ + FAN##id##_SPEED, \ + FAN##id##_DUTY_CYCLE, \ + FAN##id##_DIRECTION, \ + FANR##id##_FAULT, \ + FANR##id##_SPEED, + +enum sysfs_fan_attributes { + DEF_FAN_SET(1) + DEF_FAN_SET(2) + DEF_FAN_SET(3) + DEF_FAN_SET(4) + DEF_FAN_SET(5) +}; +/*******************/ +static void accton_as5812_54x_fan_update_device(struct device *dev); +static int accton_as5812_54x_fan_read_value(u8 reg); +static int accton_as5812_54x_fan_write_value(u8 reg, u8 value); + +static ssize_t fan_set_duty_cycle(struct device *dev, + struct device_attribute *da,const char *buf, size_t count); +static ssize_t fan_show_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t show_name(struct device *dev, + struct device_attribute *da, char *buf); + +extern int as5812_54x_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as5812_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + + +/*******************/ +#define _MAKE_SENSOR_DEVICE_ATTR(prj, id, id2) \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, \ + fan_set_duty_cycle, FAN##id##_DUTY_CYCLE); \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_direction, S_IRUGO, fan_show_value, NULL, FAN##id##_DIRECTION); \ + static SENSOR_DEVICE_ATTR(prj##fanr##id##_fault, S_IRUGO, fan_show_value, NULL, FANR##id##_FAULT); \ + static SENSOR_DEVICE_ATTR(prj##fanr##id##_speed_rpm, S_IRUGO, fan_show_value, NULL, FANR##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_input, S_IRUGO, fan_show_value, NULL, FAN##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id2##_input, S_IRUGO, fan_show_value, NULL, FANR##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_fault, S_IRUGO, fan_show_value, NULL, FAN##id##_FAULT); \ + static SENSOR_DEVICE_ATTR(prj##fan##id2##_fault, S_IRUGO, fan_show_value, NULL, FAN##id##_FAULT); + +#define MAKE_SENSOR_DEVICE_ATTR(prj,id, id2) _MAKE_SENSOR_DEVICE_ATTR(prj,id, id2) + +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME,1,11) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME,2,12) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME,3,13) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME,4,14) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME,5,15) + +static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, 0); +/*******************/ + +#define _MAKE_FAN_ATTR(prj, id, id2) \ + &sensor_dev_attr_##prj##fan##id##_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id##_duty_cycle_percentage.dev_attr.attr,\ + &sensor_dev_attr_##prj##fan##id##_direction.dev_attr.attr, \ + &sensor_dev_attr_##prj##fanr##id##_fault.dev_attr.attr, \ + &sensor_dev_attr_##prj##fanr##id##_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id##_input.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id2##_input.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id##_fault.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id2##_fault.dev_attr.attr, + + +#define MAKE_FAN_ATTR(prj, id, id2) _MAKE_FAN_ATTR(prj, id, id2) + +static struct attribute *accton_as5812_54x_fan_attributes[] = { + /* fan related attributes */ + MAKE_FAN_ATTR(PROJECT_NAME,1,11) + MAKE_FAN_ATTR(PROJECT_NAME,2,12) + MAKE_FAN_ATTR(PROJECT_NAME,3,13) + MAKE_FAN_ATTR(PROJECT_NAME,4,14) + MAKE_FAN_ATTR(PROJECT_NAME,5,15) + &sensor_dev_attr_name.dev_attr.attr, + NULL +}; +/*******************/ + +/* fan related functions + */ +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + ssize_t ret = 0; + int data_index, type_index; + + accton_as5812_54x_fan_update_device(dev); + + if (fan_data->valid == 0) { + return ret; + } + + type_index = attr->index%FAN2_FAULT; + data_index = attr->index/FAN2_FAULT; + + switch (type_index) { + case FAN1_FAULT: + ret = sprintf(buf, "%d\n", fan_data->status[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FAN1_SPEED: + ret = sprintf(buf, "%d\n", fan_data->speed[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FAN1_DUTY_CYCLE: + ret = sprintf(buf, "%d\n", fan_data->duty_cycle[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FAN1_DIRECTION: + ret = sprintf(buf, "%d\n", fan_data->direction[data_index]); /* presnet, need to modify*/ + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FANR1_FAULT: + ret = sprintf(buf, "%d\n", fan_data->r_status[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FANR1_SPEED: + ret = sprintf(buf, "%d\n", fan_data->r_speed[data_index]); + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + default: + if (LOCAL_DEBUG) + printk ("[Check !!][%s][%d] \n", __FUNCTION__, __LINE__); + break; + } + + return ret; +} + +static ssize_t show_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + return sprintf(buf, "%s\n", DRVNAME); +} +/*******************/ +static ssize_t fan_set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) { + + int error, value; + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < FAN_DUTY_CYCLE_MIN || value > FAN_DUTY_CYCLE_MAX) + return -EINVAL; + + accton_as5812_54x_fan_write_value(CPLD_REG_FAN_PWM_CYCLE_OFFSET, value/FAN_SPEED_PRECENT_TO_CPLD_STEP); + + fan_data->valid = 0; + + return count; +} + +static const struct attribute_group accton_as5812_54x_fan_group = { + .attrs = accton_as5812_54x_fan_attributes, +}; + +static int accton_as5812_54x_fan_read_value(u8 reg) +{ + return as5812_54x_cpld_read(0x60, reg); +} + +static int accton_as5812_54x_fan_write_value(u8 reg, u8 value) +{ + return as5812_54x_cpld_write(0x60, reg, value); +} + +static void accton_as5812_54x_fan_update_device(struct device *dev) +{ + int speed, r_speed, fault, r_fault, ctrl_speed, direction; + int i; + + mutex_lock(&fan_data->update_lock); + + if (LOCAL_DEBUG) + printk ("Starting accton_as5812_54x_fan update \n"); + + if (!(time_after(jiffies, fan_data->last_updated + HZ + HZ / 2) || !fan_data->valid)) { + /* do nothing */ + goto _exit; + } + + fan_data->valid = 0; + + if (LOCAL_DEBUG) + printk ("Starting accton_as5812_54x_fan update 2 \n"); + + fault = accton_as5812_54x_fan_read_value(CPLD_REG_FAN_STATUS_OFFSET); + r_fault = accton_as5812_54x_fan_read_value(CPLD_REG_FANR_STATUS_OFFSET); + direction = accton_as5812_54x_fan_read_value(CPLD_REG_FAN_DIRECTION_OFFSET); + ctrl_speed = accton_as5812_54x_fan_read_value(CPLD_REG_FAN_PWM_CYCLE_OFFSET); + + if ( (fault < 0) || (r_fault < 0) || (direction < 0) || (ctrl_speed < 0) ) + { + if (LOCAL_DEBUG) + printk ("[Error!!][%s][%d] \n", __FUNCTION__, __LINE__); + goto _exit; /* error */ + } + + if (LOCAL_DEBUG) + printk ("[fan:] fault:%d, r_fault=%d, direction=%d, ctrl_speed=%d \n",fault, r_fault, direction, ctrl_speed); + + for (i=0; istatus[i] = (fault & fan_info_mask[i]) >> i; + if (LOCAL_DEBUG) + printk ("[fan%d:] fail=%d \n",i, fan_data->status[i]); + + fan_data->r_status[i] = (r_fault & fan_info_mask[i]) >> i; + fan_data->direction[i] = (direction & fan_info_mask[i]) >> i; + fan_data->duty_cycle[i] = ctrl_speed * FAN_SPEED_PRECENT_TO_CPLD_STEP; + + /* fan speed + */ + speed = accton_as5812_54x_fan_read_value(fan_speed_reg[i]); + r_speed = accton_as5812_54x_fan_read_value(fanr_speed_reg[i]); + if ( (speed < 0) || (r_speed < 0) ) + { + if (LOCAL_DEBUG) + printk ("[Error!!][%s][%d] \n", __FUNCTION__, __LINE__); + goto _exit; /* error */ + } + + if (LOCAL_DEBUG) + printk ("[fan%d:] speed:%d, r_speed=%d \n", i, speed, r_speed); + + fan_data->speed[i] = speed * FAN_SPEED_CPLD_TO_RPM_STEP; + fan_data->r_speed[i] = r_speed * FAN_SPEED_CPLD_TO_RPM_STEP; + } + + /* finish to update */ + fan_data->last_updated = jiffies; + fan_data->valid = 1; + +_exit: + mutex_unlock(&fan_data->update_lock); +} + +static int accton_as5812_54x_fan_probe(struct platform_device *pdev) +{ + int status = -1; + + /* Register sysfs hooks */ + status = sysfs_create_group(&pdev->dev.kobj, &accton_as5812_54x_fan_group); + if (status) { + goto exit; + + } + + fan_data->hwmon_dev = hwmon_device_register(&pdev->dev); + if (IS_ERR(fan_data->hwmon_dev)) { + status = PTR_ERR(fan_data->hwmon_dev); + goto exit_remove; + } + + dev_info(&pdev->dev, "accton_as5812_54x_fan\n"); + + return 0; + +exit_remove: + sysfs_remove_group(&pdev->dev.kobj, &accton_as5812_54x_fan_group); +exit: + return status; +} + +static int accton_as5812_54x_fan_remove(struct platform_device *pdev) +{ + hwmon_device_unregister(fan_data->hwmon_dev); + sysfs_remove_group(&fan_data->pdev->dev.kobj, &accton_as5812_54x_fan_group); + + return 0; +} + + + +static struct platform_driver accton_as5812_54x_fan_driver = { + .probe = accton_as5812_54x_fan_probe, + .remove = accton_as5812_54x_fan_remove, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as5812_54x_fan_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as5812_54x_fan_driver); + if (ret < 0) { + goto exit; + } + + fan_data = kzalloc(sizeof(struct accton_as5812_54x_fan), GFP_KERNEL); + if (!fan_data) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as5812_54x_fan_driver); + goto exit; + } + + mutex_init(&fan_data->update_lock); + fan_data->valid = 0; + + fan_data->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(fan_data->pdev)) { + ret = PTR_ERR(fan_data->pdev); + platform_driver_unregister(&accton_as5812_54x_fan_driver); + kfree(fan_data); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as5812_54x_fan_exit(void) +{ + platform_device_unregister(fan_data->pdev); + platform_driver_unregister(&accton_as5812_54x_fan_driver); + kfree(fan_data); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as5812_54x_fan driver"); +MODULE_LICENSE("GPL"); + +module_init(accton_as5812_54x_fan_init); +module_exit(accton_as5812_54x_fan_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_psu.c new file mode 100755 index 00000000000..2c6b5f492a9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_psu.c @@ -0,0 +1,371 @@ +/* + * An hwmon driver for accton as5812_54x Power Module + * + * Copyright (C) 2015 Accton Technology Corporation. + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#if 0 +#define DEBUG +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define PSU_STATUS_I2C_ADDR 0x60 +#define PSU_STATUS_I2C_REG_OFFSET 0x2 + +#define IS_POWER_GOOD(id, value) (!!(value & BIT(id*4 + 1))) +#define IS_PRESENT(id, value) (!(value & BIT(id*4))) + +static ssize_t show_index(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); +static int as5812_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as5812_54x_cpld_read(unsigned short cpld_addr, u8 reg); +static int as5812_54x_psu_model_name_get(struct device *dev); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as5812_54x_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[14]; /* Model name, read from eeprom */ +}; + +static struct as5812_54x_psu_data *as5812_54x_psu_update_device(struct device *dev); + +enum as5812_54x_psu_sysfs_attributes { + PSU_INDEX, + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_index, S_IRUGO, show_index, NULL, PSU_INDEX); +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_model_name,NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); + +static struct attribute *as5812_54x_psu_attributes[] = { + &sensor_dev_attr_psu_index.dev_attr.attr, + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + NULL +}; + +static ssize_t show_index(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54x_psu_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->index); +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as5812_54x_psu_data *data = as5812_54x_psu_update_device(dev); + u8 status = 0; + + if (!data->valid) { + return sprintf(buf, "0\n"); + } + + if (attr->index == PSU_PRESENT) { + status = IS_PRESENT(data->index, data->status); + } + else { /* PSU_POWER_GOOD */ + status = IS_POWER_GOOD(data->index, data->status); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as5812_54x_psu_data *data = as5812_54x_psu_update_device(dev); + + if (!data->valid) { + return 0; + } + + if (!IS_PRESENT(data->index, data->status)) { + return 0; + } + + if (as5812_54x_psu_model_name_get(dev) < 0) { + return -ENXIO; + } + + return sprintf(buf, "%s\n", data->model_name); +} + +static const struct attribute_group as5812_54x_psu_group = { + .attrs = as5812_54x_psu_attributes, +}; + +static int as5812_54x_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as5812_54x_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as5812_54x_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as5812_54x_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as5812_54x_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as5812_54x_psu_remove(struct i2c_client *client) +{ + struct as5812_54x_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as5812_54x_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as5812_54x_psu1, + as5812_54x_psu2 +}; + +static const struct i2c_device_id as5812_54x_psu_id[] = { + { "as5812_54x_psu1", as5812_54x_psu1 }, + { "as5812_54x_psu2", as5812_54x_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as5812_54x_psu_id); + +static struct i2c_driver as5812_54x_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as5812_54x_psu", + }, + .probe = as5812_54x_psu_probe, + .remove = as5812_54x_psu_remove, + .id_table = as5812_54x_psu_id, + .address_list = normal_i2c, +}; + +static int as5812_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + result = 0; + +abort: + return result; +} + +enum psu_type { + PSU_YM_2401_JCR, /* AC110V - F2B */ + PSU_YM_2401_JDR, /* AC110V - B2F */ + PSU_CPR_4011_4M11, /* AC110V - F2B */ + PSU_CPR_4011_4M21, /* AC110V - B2F */ + PSU_CPR_6011_2M11, /* AC110V - F2B */ + PSU_CPR_6011_2M21, /* AC110V - B2F */ + PSU_UM400D_01G, /* DC48V - F2B */ + PSU_UM400D01_01G /* DC48V - B2F */ +}; + +struct model_name_info { + enum psu_type type; + u8 offset; + u8 length; + char* model_name; +}; + +struct model_name_info models[] = { +{PSU_YM_2401_JCR, 0x20, 11, "YM-2401JCR"}, +{PSU_YM_2401_JDR, 0x20, 11, "YM-2401JDR"}, +{PSU_CPR_4011_4M11, 0x26, 13, "CPR-4011-4M11"}, +{PSU_CPR_4011_4M21, 0x26, 13, "CPR-4011-4M21"}, +{PSU_CPR_6011_2M11, 0x26, 13, "CPR-6011-2M11"}, +{PSU_CPR_6011_2M21, 0x26, 13, "CPR-6011-2M21"}, +{PSU_UM400D_01G, 0x50, 9, "um400d01G"}, +{PSU_UM400D01_01G, 0x50, 12, "um400d01-01G"}, +}; + +static int as5812_54x_psu_model_name_get(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54x_psu_data *data = i2c_get_clientdata(client); + int i, status; + + for (i = 0; i < ARRAY_SIZE(models); i++) { + memset(data->model_name, 0, sizeof(data->model_name)); + + status = as5812_54x_psu_read_block(client, models[i].offset, + data->model_name, models[i].length); + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x) offset(0x%x)\n", + client->addr, models[i].offset); + return status; + } + else { + data->model_name[models[i].length] = '\0'; + } + + if (i == PSU_YM_2401_JCR || i == PSU_YM_2401_JDR) { + /* Skip the meaningless data byte 8*/ + data->model_name[8] = data->model_name[9]; + data->model_name[9] = data->model_name[10]; + data->model_name[10] = '\0'; + } + + /* Determine if the model name is known, if not, read next index + */ + if (strncmp(data->model_name, models[i].model_name, models[i].length) == 0) { + return 0; + } + else { + data->model_name[0] = '\0'; + } + } + + return -ENODATA; +} + +static struct as5812_54x_psu_data *as5812_54x_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54x_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status = -1; + + dev_dbg(&client->dev, "Starting as5812_54x update\n"); + data->valid = 0; + + + /* Read psu status */ + status = as5812_54x_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg (0x%x) err %d\n", PSU_STATUS_I2C_ADDR, status); + goto exit; + } + else { + data->status = status; + } + + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init as5812_54x_psu_init(void) +{ + return i2c_add_driver(&as5812_54x_psu_driver); +} + +static void __exit as5812_54x_psu_exit(void) +{ + i2c_del_driver(&as5812_54x_psu_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton as5812_54x_psu driver"); +MODULE_LICENSE("GPL"); + +module_init(as5812_54x_psu_init); +module_exit(as5812_54x_psu_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_sfp.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_sfp.c new file mode 100755 index 00000000000..10841c1d22e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_sfp.c @@ -0,0 +1,825 @@ +/* + * An hwmon driver for accton as5812_54x sfp + * + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#if 0 +#define DEBUG +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define NUM_OF_SFF_PORT 54 +#define SFP_PORT_MAX 48 +#define I2C_ADDR_CPLD1 0x60 +#define I2C_ADDR_CPLD2 0x61 +#define I2C_ADDR_CPLD3 0x62 +#define CPLD3_OFFSET_QSFP_MOD_RST 0x15 +#define CPLD3_OFFSET_QSFP_LPMODE 0x16 + + +#define BIT_INDEX(i) (1ULL << (i)) + +#if 0 +static ssize_t show_status(struct device *dev, struct device_attribute *da,char *buf); +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_eeprom(struct device *dev, struct device_attribute *da, char *buf); +static int as5812_54x_sfp_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as5812_54x_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as5812_54x_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); +#endif + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x50, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as5812_54x_sfp_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + int port; /* Front port index */ + char eeprom[256]; /* eeprom data */ + u64 status[4]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => is_present + 1 => tx_fail + 2 => tx_disable + 3 => rx_loss */ +}; + +/* The table maps active port to cpld port. + * Array index 0 is for active port 1, + * index 1 for active port 2, and so on. + * The array content implies cpld port index. + */ +static const u8 cpld_to_front_port_table[] = +{ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, + 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, + 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, + 49, 52, 50, 53, 51, 54}; + +#define CPLD_PORT_TO_FRONT_PORT(port) (cpld_to_front_port_table[port]) + +static struct as5812_54x_sfp_data *as5812_54x_sfp_update_device(struct device *dev, int update_eeprom); +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_eeprom(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_lp_mode(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_lp_mode(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_mode_reset(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +extern int as5812_54x_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as5812_54x_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +enum as5812_54x_sfp_sysfs_attributes { + SFP_IS_PRESENT, + SFP_TX_FAULT, + SFP_TX_DISABLE, + SFP_RX_LOSS, + SFP_PORT_NUMBER, + SFP_EEPROM, + SFP_RX_LOS_ALL, + SFP_IS_PRESENT_ALL, + SFP_LP_MODE, + SFP_MOD_RST, +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, show_status, NULL, SFP_IS_PRESENT); +static SENSOR_DEVICE_ATTR(sfp_tx_fault, S_IRUGO, show_status, NULL, SFP_TX_FAULT); +static SENSOR_DEVICE_ATTR(sfp_tx_disable, S_IWUSR | S_IRUGO, show_status, set_tx_disable, SFP_TX_DISABLE); +static SENSOR_DEVICE_ATTR(sfp_rx_loss, S_IRUGO, show_status,NULL, SFP_RX_LOSS); +static SENSOR_DEVICE_ATTR(sfp_port_number, S_IRUGO, show_port_number, NULL, SFP_PORT_NUMBER); +static SENSOR_DEVICE_ATTR(sfp_eeprom, S_IRUGO, show_eeprom, NULL, SFP_EEPROM); +static SENSOR_DEVICE_ATTR(sfp_rx_los_all, S_IRUGO, show_status,NULL, SFP_RX_LOS_ALL); +static SENSOR_DEVICE_ATTR(sfp_is_present_all, S_IRUGO, show_status,NULL, SFP_IS_PRESENT_ALL); +static SENSOR_DEVICE_ATTR(sfp_lp_mode, S_IWUSR | S_IRUGO, get_lp_mode, set_lp_mode, SFP_LP_MODE); +static SENSOR_DEVICE_ATTR(sfp_mod_rst, S_IWUSR | S_IRUGO, get_mode_reset, set_mode_reset, SFP_MOD_RST); + +static struct attribute *as5812_54x_sfp_attributes[] = { + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault.dev_attr.attr, + &sensor_dev_attr_sfp_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp_eeprom.dev_attr.attr, + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los_all.dev_attr.attr, + &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, + &sensor_dev_attr_sfp_lp_mode.dev_attr.attr, + &sensor_dev_attr_sfp_mod_rst.dev_attr.attr, + NULL +}; + +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54x_sfp_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", CPLD_PORT_TO_FRONT_PORT(data->port)); +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as5812_54x_sfp_data *data; + u8 val; + int values[7]; + + /* Error-check the CPLD read results. */ +#define VALIDATED_READ(_buf, _rv, _read_expr, _invert) \ + do { \ + _rv = (_read_expr); \ + if(_rv < 0) { \ + return sprintf(_buf, "READ ERROR\n"); \ + } \ + if(_invert) { \ + _rv = ~_rv; \ + } \ + _rv &= 0xFF; \ + } while(0) + + if(attr->index == SFP_RX_LOS_ALL) { + /* + * Report the RX_LOS status for all ports. + * This does not depend on the currently active SFP selector. + */ + + /* RX_LOS Ports 1-8 */ + VALIDATED_READ(buf, values[0], as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD2, 0x0F), 0); + /* RX_LOS Ports 9-16 */ + VALIDATED_READ(buf, values[1], as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD2, 0x10), 0); + /* RX_LOS Ports 17-24 */ + VALIDATED_READ(buf, values[2], as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD2, 0x11), 0); + /* RX_LOS Ports 25-32 */ + VALIDATED_READ(buf, values[3], as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x0F), 0); + /* RX_LOS Ports 33-40 */ + VALIDATED_READ(buf, values[4], as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x10), 0); + /* RX_LOS Ports 41-48 */ + VALIDATED_READ(buf, values[5], as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x11), 0); + + /** Return values 1 -> 48 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], + values[3], values[4], values[5]); + } + + if(attr->index == SFP_IS_PRESENT_ALL) { + /* + * Report the SFP_PRESENCE status for all ports. + * This does not depend on the currently active SFP selector. + */ + + /* SFP_PRESENT Ports 1-8 */ + VALIDATED_READ(buf, values[0], as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD2, 0x6), 1); + /* SFP_PRESENT Ports 9-16 */ + VALIDATED_READ(buf, values[1], as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD2, 0x7), 1); + /* SFP_PRESENT Ports 17-24 */ + VALIDATED_READ(buf, values[2], as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD2, 0x8), 1); + /* SFP_PRESENT Ports 25-32 */ + VALIDATED_READ(buf, values[3], as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x6), 1); + /* SFP_PRESENT Ports 33-40 */ + VALIDATED_READ(buf, values[4], as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x7), 1); + /* SFP_PRESENT Ports 41-48 */ + VALIDATED_READ(buf, values[5], as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x8), 1); + /* QSFP_PRESENT Ports 49-54 */ + VALIDATED_READ(buf, values[6], as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x14), 1); + + /* Return values 1 -> 54 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], + values[3], values[4], values[5], + values[6] & 0x3F); + } + /* + * The remaining attributes are gathered on a per-selected-sfp basis. + */ + data = as5812_54x_sfp_update_device(dev, 0); + if (attr->index == SFP_IS_PRESENT) { + val = (data->status[attr->index] & BIT_INDEX(data->port)) ? 0 : 1; + } + else { + val = (data->status[attr->index] & BIT_INDEX(data->port)) ? 1 : 0; + } + + return sprintf(buf, "%d", val); +} + +static ssize_t get_lp_mode(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54x_sfp_data *data = i2c_get_clientdata(client); + u8 cpld_val = 0; + int port_bit; + int status = -EINVAL; + + /* Low power mode is not supported for SFP ports(1-48) */ + if (data->port < SFP_PORT_MAX) { + return -EINVAL; + } + mutex_lock(&data->update_lock); + + port_bit = data->port - SFP_PORT_MAX; + cpld_val = as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD3, CPLD3_OFFSET_QSFP_LPMODE); + cpld_val = cpld_val & 0x3F; + cpld_val = cpld_val & BIT_INDEX(port_bit); + status = snprintf(buf, PAGE_SIZE - 1, "%d\r\n", cpld_val>>port_bit); + + mutex_unlock(&data->update_lock); + + return status; +} + +static ssize_t set_lp_mode(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54x_sfp_data *data = i2c_get_clientdata(client); + u8 cpld_val = 0; + long mode; + int error, port_bit; + + /* Tx disable is not supported for QSFP ports(49-54) */ + if (data->port < SFP_PORT_MAX) { + return -EINVAL; + } + port_bit = data->port - SFP_PORT_MAX; + error = kstrtol(buf, 10, &mode); + if (error) { + return error; + } + mutex_lock(&data->update_lock); + + cpld_val = as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD3, CPLD3_OFFSET_QSFP_LPMODE); + /* Update lp_mode status */ + if (mode) + { + cpld_val |= BIT_INDEX(port_bit); + } + else + { + cpld_val &=~BIT_INDEX(port_bit); + } + as5812_54x_i2c_cpld_write(I2C_ADDR_CPLD3, CPLD3_OFFSET_QSFP_LPMODE, cpld_val); + + mutex_unlock(&data->update_lock); + + return count; +} + + +static ssize_t get_mode_reset(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54x_sfp_data *data = i2c_get_clientdata(client); + u8 cpld_val = 0; + int port_bit; + int status = -EINVAL; + + /* Low power mode is not supported for SFP ports(1-48) */ + if (data->port < SFP_PORT_MAX) { + return -EINVAL; + } + mutex_lock(&data->update_lock); + + port_bit = data->port - SFP_PORT_MAX; + cpld_val = as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD3, CPLD3_OFFSET_QSFP_MOD_RST); + cpld_val = cpld_val & 0x3F; + cpld_val = cpld_val & BIT_INDEX(port_bit); + status = snprintf(buf, PAGE_SIZE - 1, "%d\r\n", cpld_val>>port_bit); + + mutex_unlock(&data->update_lock); + + return status; +} + +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54x_sfp_data *data = i2c_get_clientdata(client); + u8 cpld_val = 0; + long reset; + int error, port_bit; + + /* Tx disable is not supported for QSFP ports(49-54) */ + if (data->port < SFP_PORT_MAX) { + return -EINVAL; + } + port_bit = data->port - SFP_PORT_MAX; + error = kstrtol(buf, 10, &reset); + if (error) { + return error; + } + mutex_lock(&data->update_lock); + + cpld_val = as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD3, CPLD3_OFFSET_QSFP_MOD_RST); + /* Update lp_mode status */ + if (reset) + { + cpld_val |= BIT_INDEX(port_bit); + } + else + { + cpld_val &=~BIT_INDEX(port_bit); + } + as5812_54x_i2c_cpld_write(I2C_ADDR_CPLD3, CPLD3_OFFSET_QSFP_MOD_RST, cpld_val); + + mutex_unlock(&data->update_lock); + + return count; +} + + +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54x_sfp_data *data = i2c_get_clientdata(client); + unsigned short cpld_addr = 0; + u8 cpld_reg = 0, cpld_val = 0, cpld_bit = 0; + long disable; + int error; + + /* Tx disable is not supported for QSFP ports(49-54) */ + if (data->port >= SFP_PORT_MAX) { + return -EINVAL; + } + + error = kstrtol(buf, 10, &disable); + if (error) { + return error; + } + + mutex_lock(&data->update_lock); + + if(data->port < 24) { + cpld_addr = I2C_ADDR_CPLD2; + cpld_reg = 0xC + data->port / 8; + cpld_bit = 1 << (data->port % 8); + } + else { + cpld_addr = I2C_ADDR_CPLD3; + cpld_reg = 0xC + (data->port - 24) / 8; + cpld_bit = 1 << (data->port % 8); + } + + cpld_val = as5812_54x_i2c_cpld_read(cpld_addr, cpld_reg); + + /* Update tx_disable status */ + if (disable) { + data->status[SFP_TX_DISABLE] |= BIT_INDEX(data->port); + cpld_val |= cpld_bit; + } + else { + data->status[SFP_TX_DISABLE] &= ~BIT_INDEX(data->port); + cpld_val &= ~cpld_bit; + } + + as5812_54x_i2c_cpld_write(cpld_addr, cpld_reg, cpld_val); + + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_eeprom(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as5812_54x_sfp_data *data = as5812_54x_sfp_update_device(dev, 1); + + if (!data->valid) { + return 0; + } + + if ((data->status[SFP_IS_PRESENT] & BIT_INDEX(data->port)) != 0) { + return 0; + } + + memcpy(buf, data->eeprom, sizeof(data->eeprom)); + + return sizeof(data->eeprom); +} + +static const struct attribute_group as5812_54x_sfp_group = { + .attrs = as5812_54x_sfp_attributes, +}; + +static int as5812_54x_sfp_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as5812_54x_sfp_data *data; + int status; + + extern int platform_accton_as5812_54x(void); + if(!platform_accton_as5812_54x()) { + return -ENODEV; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as5812_54x_sfp_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + mutex_init(&data->update_lock); + data->port = dev_id->driver_data; + i2c_set_clientdata(client, data); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as5812_54x_sfp_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sfp '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as5812_54x_sfp_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as5812_54x_sfp_remove(struct i2c_client *client) +{ + struct as5812_54x_sfp_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as5812_54x_sfp_group); + kfree(data); + + return 0; +} + +enum port_numbers { +as5812_54x_sfp1, as5812_54x_sfp2, as5812_54x_sfp3, as5812_54x_sfp4, +as5812_54x_sfp5, as5812_54x_sfp6, as5812_54x_sfp7, as5812_54x_sfp8, +as5812_54x_sfp9, as5812_54x_sfp10, as5812_54x_sfp11,as5812_54x_sfp12, +as5812_54x_sfp13, as5812_54x_sfp14, as5812_54x_sfp15,as5812_54x_sfp16, +as5812_54x_sfp17, as5812_54x_sfp18, as5812_54x_sfp19,as5812_54x_sfp20, +as5812_54x_sfp21, as5812_54x_sfp22, as5812_54x_sfp23,as5812_54x_sfp24, +as5812_54x_sfp25, as5812_54x_sfp26, as5812_54x_sfp27,as5812_54x_sfp28, +as5812_54x_sfp29, as5812_54x_sfp30, as5812_54x_sfp31,as5812_54x_sfp32, +as5812_54x_sfp33, as5812_54x_sfp34, as5812_54x_sfp35,as5812_54x_sfp36, +as5812_54x_sfp37, as5812_54x_sfp38, as5812_54x_sfp39,as5812_54x_sfp40, +as5812_54x_sfp41, as5812_54x_sfp42, as5812_54x_sfp43,as5812_54x_sfp44, +as5812_54x_sfp45, as5812_54x_sfp46, as5812_54x_sfp47,as5812_54x_sfp48, +as5812_54x_sfp49, as5812_54x_sfp52, as5812_54x_sfp50,as5812_54x_sfp53, +as5812_54x_sfp51, as5812_54x_sfp54 +}; + +static const struct i2c_device_id as5812_54x_sfp_id[] = { +{ "as5812_54x_sfp1", as5812_54x_sfp1 }, { "as5812_54x_sfp2", as5812_54x_sfp2 }, +{ "as5812_54x_sfp3", as5812_54x_sfp3 }, { "as5812_54x_sfp4", as5812_54x_sfp4 }, +{ "as5812_54x_sfp5", as5812_54x_sfp5 }, { "as5812_54x_sfp6", as5812_54x_sfp6 }, +{ "as5812_54x_sfp7", as5812_54x_sfp7 }, { "as5812_54x_sfp8", as5812_54x_sfp8 }, +{ "as5812_54x_sfp9", as5812_54x_sfp9 }, { "as5812_54x_sfp10", as5812_54x_sfp10 }, +{ "as5812_54x_sfp11", as5812_54x_sfp11 }, { "as5812_54x_sfp12", as5812_54x_sfp12 }, +{ "as5812_54x_sfp13", as5812_54x_sfp13 }, { "as5812_54x_sfp14", as5812_54x_sfp14 }, +{ "as5812_54x_sfp15", as5812_54x_sfp15 }, { "as5812_54x_sfp16", as5812_54x_sfp16 }, +{ "as5812_54x_sfp17", as5812_54x_sfp17 }, { "as5812_54x_sfp18", as5812_54x_sfp18 }, +{ "as5812_54x_sfp19", as5812_54x_sfp19 }, { "as5812_54x_sfp20", as5812_54x_sfp20 }, +{ "as5812_54x_sfp21", as5812_54x_sfp21 }, { "as5812_54x_sfp22", as5812_54x_sfp22 }, +{ "as5812_54x_sfp23", as5812_54x_sfp23 }, { "as5812_54x_sfp24", as5812_54x_sfp24 }, +{ "as5812_54x_sfp25", as5812_54x_sfp25 }, { "as5812_54x_sfp26", as5812_54x_sfp26 }, +{ "as5812_54x_sfp27", as5812_54x_sfp27 }, { "as5812_54x_sfp28", as5812_54x_sfp28 }, +{ "as5812_54x_sfp29", as5812_54x_sfp29 }, { "as5812_54x_sfp30", as5812_54x_sfp30 }, +{ "as5812_54x_sfp31", as5812_54x_sfp31 }, { "as5812_54x_sfp32", as5812_54x_sfp32 }, +{ "as5812_54x_sfp33", as5812_54x_sfp33 }, { "as5812_54x_sfp34", as5812_54x_sfp34 }, +{ "as5812_54x_sfp35", as5812_54x_sfp35 }, { "as5812_54x_sfp36", as5812_54x_sfp36 }, +{ "as5812_54x_sfp37", as5812_54x_sfp37 }, { "as5812_54x_sfp38", as5812_54x_sfp38 }, +{ "as5812_54x_sfp39", as5812_54x_sfp39 }, { "as5812_54x_sfp40", as5812_54x_sfp40 }, +{ "as5812_54x_sfp41", as5812_54x_sfp41 }, { "as5812_54x_sfp42", as5812_54x_sfp42 }, +{ "as5812_54x_sfp43", as5812_54x_sfp43 }, { "as5812_54x_sfp44", as5812_54x_sfp44 }, +{ "as5812_54x_sfp45", as5812_54x_sfp45 }, { "as5812_54x_sfp46", as5812_54x_sfp46 }, +{ "as5812_54x_sfp47", as5812_54x_sfp47 }, { "as5812_54x_sfp48", as5812_54x_sfp48 }, +{ "as5812_54x_sfp49", as5812_54x_sfp49 }, { "as5812_54x_sfp50", as5812_54x_sfp50 }, +{ "as5812_54x_sfp51", as5812_54x_sfp51 }, { "as5812_54x_sfp52", as5812_54x_sfp52 }, +{ "as5812_54x_sfp53", as5812_54x_sfp53 }, { "as5812_54x_sfp54", as5812_54x_sfp54 }, + +{} +}; +MODULE_DEVICE_TABLE(i2c, as5812_54x_sfp_id); + +static struct i2c_driver as5812_54x_sfp_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as5812_54x_sfp", + }, + .probe = as5812_54x_sfp_probe, + .remove = as5812_54x_sfp_remove, + .id_table = as5812_54x_sfp_id, + .address_list = normal_i2c, +}; + +static int as5812_54x_sfp_read_byte(struct i2c_client *client, u8 command, u8 *data) +{ + int result = i2c_smbus_read_byte_data(client, command); + + if (unlikely(result < 0)) { + dev_dbg(&client->dev, "sfp read byte data failed, command(0x%2x), data(0x%2x)\r\n", command, result); + goto abort; + } + + *data = (u8)result; + result = 0; + +abort: + return result; +} + +#define ALWAYS_UPDATE_DEVICE 1 + +static struct as5812_54x_sfp_data *as5812_54x_sfp_update_device(struct device *dev, int update_eeprom) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54x_sfp_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (ALWAYS_UPDATE_DEVICE || time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status = -1; + int i = 0, j = 0; + + data->valid = 0; + //dev_dbg(&client->dev, "Starting as5812_54x sfp status update\n"); + memset(data->status, 0, sizeof(data->status)); + + /* Read status of port 1~48(SFP port) */ + for (i = 0; i < 2; i++) { + for (j = 0; j < 12; j++) { + status = as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD2+i, 0x6+j); + + if (status < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", I2C_ADDR_CPLD2+i, 0x6+j, status); + goto exit; + } + + data->status[j/3] |= (u64)status << ((i*24) + (j%3)*8); + } + } + + /* + * Bring QSFPs out of reset, + * This is a temporary fix until the QSFP+_MOD_RST register + * can be exposed through the driver. + */ + as5812_54x_i2c_cpld_write(I2C_ADDR_CPLD3, 0x15, 0x3F); + + /* Read present status of port 49-54(QSFP port) */ + status = as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x14); + + if (status < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", I2C_ADDR_CPLD2+i, 0x6+j, status); + } + else { + data->status[SFP_IS_PRESENT] |= (u64)status << 48; + } + + if (update_eeprom) { + /* Read eeprom data based on port number */ + memset(data->eeprom, 0, sizeof(data->eeprom)); + + /* Check if the port is present */ + if ((data->status[SFP_IS_PRESENT] & BIT_INDEX(data->port)) == 0) { + /* read eeprom */ + for (i = 0; i < sizeof(data->eeprom); i++) { + status = as5812_54x_sfp_read_byte(client, i, data->eeprom + i); + + if (status < 0) { + dev_dbg(&client->dev, "unable to read eeprom from port(%d)\n", + CPLD_PORT_TO_FRONT_PORT(data->port)); + goto exit; + } + } + } + } + + data->valid = 1; + data->last_updated = jiffies; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(as5812_54x_sfp_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton as5812_54x_sfp driver"); +MODULE_LICENSE("GPL"); + +#if 0 + int i = 0, j = 0; + + data->valid = 0; + //dev_dbg(&client->dev, "Starting as5812_54x sfp update\n"); + memset(data->status, 0, sizeof(data->status)); + + /* Read status of port 1~48(SFP port) */ + for (i = 0; i < 2; i++) { + for (j = 0; j < 12; j++) { + status = as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD2+i, 0x6+j); + + if (status < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", I2C_ADDR_CPLD2+i, 0x6+j, status); + continue; + } + + data->status[j/3] |= (u64)status << ((i*24) + (j%3)*8); + } + } + + /* Read present status of port 49-54(QSFP port) */ + status = as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x14); + + if (status < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", I2C_ADDR_CPLD2+i, 0x6+j, status); + } + else { + data->status[SFP_IS_PRESENT] |= (u64)status << 48; + } +#endif + +/* Reserver to prevent from CPLD port mapping is changed + */ +#if 0 +BIT_INDEX(port_present_index[data->port]) +/* The bit index of is_present field read from CPLD + * Array index 0 is for as5812_54x_sfp1, + * index 1 is for as5812_54x_sfp2, and so on. + */ +static const int port_present_index[] = { + 4, 5, 6, 7, 9, 8, 11, 10, + 0, 1, 2, 3, 12, 13, 14, 15, +16, 17, 18, 19, 28, 29, 30, 31, +20, 21, 22, 23, 24, 25, 26, 27 +}; +#endif + +#if 0 +static struct as5812_54x_sfp_data *as5812_54x_sfp_update_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5812_54x_sfp_data *data = i2c_get_clientdata(client); + int status = -1; + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->status_last_updated + HZ + HZ / 2) + || !data->status_valid) { + int status = -1; + int i = 0, j = 0; + + data->status_valid = 0; + //dev_dbg(&client->dev, "Starting as5812_54x sfp status update\n"); + memset(data->status, 0, sizeof(data->status)); + + /* Read status of port 1~48(SFP port) */ + for (i = 0; i < 2; i++) { + for (j = 0; j < 12; j++) { + status = as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD2+i, 0x6+j); + + if (status < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", I2C_ADDR_CPLD2+i, 0x6+j, status); + goto exit; + } + + data->status[j/3] |= (u64)status << ((i*24) + (j%3)*8); + } + } + + /* + * Bring QSFPs out of reset, + * This is a temporary fix until the QSFP+_MOD_RST register + * can be exposed through the driver. + */ + as5812_54x_i2c_cpld_write(I2C_ADDR_CPLD3, 0x15, 0x3F); + + /* Read present status of port 49-54(QSFP port) */ + status = as5812_54x_i2c_cpld_read(I2C_ADDR_CPLD3, 0x14); + + if (status < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", I2C_ADDR_CPLD2+i, 0x6+j, status); + } + else { + data->status[SFP_IS_PRESENT] |= (u64)status << 48; + } + + data->status_valid = 1; + data->status_last_updated = jiffies; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +static struct as5812_54x_sfp_data *as5812_54x_sfp_update_eeprom(struct device *dev) +{ + struct as5812_54x_sfp_data *data = NULL; + + data = as5812_54x_sfp_update_status(dev); + + if (data == NULL || data->status_valid == 0) { + data->eeprom_valid = 0; + return data; + } + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->eeprom_last_updated + HZ + HZ / 2) + || !data->eeprom_valid) { + int status = -1; + int i = 0; + + /* Read eeprom data based on port number */ + memset(data->eeprom, 0, sizeof(data->eeprom)); + + /* Check if the port is present */ + if ((data->status[SFP_IS_PRESENT] & BIT_INDEX(data->port)) == 0) { + /* read eeprom */ + for (i = 0; i < sizeof(data->eeprom)/I2C_SMBUS_BLOCK_MAX; i++) { + status = as5812_54x_sfp_read_block(client, i*I2C_SMBUS_BLOCK_MAX, + data->eeprom+(i*I2C_SMBUS_BLOCK_MAX), + I2C_SMBUS_BLOCK_MAX); + if (status < 0) { + dev_dbg(&client->dev, "unable to read eeprom from port(%d)\n", + CPLD_PORT_TO_FRONT_PORT(data->port)); + goto exit; + } + } + } + + data->eeprom_last_updated = jiffies; + data->eeprom_valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} +#endif diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/cpr_4011_4mxx.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/cpr_4011_4mxx.c new file mode 100755 index 00000000000..30bea914d58 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/cpr_4011_4mxx.c @@ -0,0 +1,400 @@ +/* + * An hwmon driver for the CPR-4011-4Mxx Redundant Power Module + * + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#if 0 +#define DEBUG +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_FAN_DUTY_CYCLE 100 + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x3c, 0x3d, 0x3e, 0x3f, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct cpr_4011_4mxx_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 vout_mode; /* Register value */ + u16 v_in; /* Register value */ + u16 v_out; /* Register value */ + u16 i_in; /* Register value */ + u16 i_out; /* Register value */ + u16 p_in; /* Register value */ + u16 p_out; /* Register value */ + u16 temp_input[2]; /* Register value */ + u8 fan_fault; /* Register value */ + u16 fan_duty_cycle[2]; /* Register value */ + u16 fan_speed[2]; /* Register value */ +}; + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_vout(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +static int cpr_4011_4mxx_write_word(struct i2c_client *client, u8 reg, u16 value); +static struct cpr_4011_4mxx_data *cpr_4011_4mxx_update_device(struct device *dev); + +enum cpr_4011_4mxx_sysfs_attributes { + PSU_V_IN, + PSU_V_OUT, + PSU_I_IN, + PSU_I_OUT, + PSU_P_IN, + PSU_P_OUT, + PSU_TEMP1_INPUT, + PSU_FAN1_FAULT, + PSU_FAN1_DUTY_CYCLE, + PSU_FAN1_SPEED, +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_v_in, S_IRUGO, show_linear, NULL, PSU_V_IN); +static SENSOR_DEVICE_ATTR(psu_v_out, S_IRUGO, show_vout, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(psu_i_in, S_IRUGO, show_linear, NULL, PSU_I_IN); +static SENSOR_DEVICE_ATTR(psu_i_out, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(psu_p_in, S_IRUGO, show_linear, NULL, PSU_P_IN); +static SENSOR_DEVICE_ATTR(psu_p_out, S_IRUGO, show_linear, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(psu_temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, show_linear, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); + +static struct attribute *cpr_4011_4mxx_attributes[] = { + &sensor_dev_attr_psu_v_in.dev_attr.attr, + &sensor_dev_attr_psu_v_out.dev_attr.attr, + &sensor_dev_attr_psu_i_in.dev_attr.attr, + &sensor_dev_attr_psu_i_out.dev_attr.attr, + &sensor_dev_attr_psu_p_in.dev_attr.attr, + &sensor_dev_attr_psu_p_out.dev_attr.attr, + &sensor_dev_attr_psu_temp1_input.dev_attr.attr, + &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, + &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, + &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, + NULL +}; + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); + int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; + long speed; + int error; + + error = kstrtol(buf, 10, &speed); + if (error) + return error; + + if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) + return -EINVAL; + + mutex_lock(&data->update_lock); + data->fan_duty_cycle[nr] = speed; + cpr_4011_4mxx_write_word(client, 0x3B + nr, data->fan_duty_cycle[nr]); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); + + u16 value = 0; + int exponent, mantissa; + int multiplier = 1000; + + switch (attr->index) { + case PSU_V_IN: + value = data->v_in; + break; + case PSU_I_IN: + value = data->i_in; + break; + case PSU_I_OUT: + value = data->i_out; + break; + case PSU_P_IN: + value = data->p_in; + break; + case PSU_P_OUT: + value = data->p_out; + break; + case PSU_TEMP1_INPUT: + value = data->temp_input[0]; + break; + case PSU_FAN1_DUTY_CYCLE: + multiplier = 1; + value = data->fan_duty_cycle[0]; + break; + case PSU_FAN1_SPEED: + multiplier = 1; + value = data->fan_speed[0]; + break; + default: + break; + } + + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + + return (exponent >= 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); + + u8 shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; + + return sprintf(buf, "%d\n", data->fan_fault >> shift); +} + +static ssize_t show_vout(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); + int exponent, mantissa; + int multiplier = 1000; + + exponent = two_complement_to_int(data->vout_mode, 5, 0x1f); + mantissa = data->v_out; + + return (exponent > 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static const struct attribute_group cpr_4011_4mxx_group = { + .attrs = cpr_4011_4mxx_attributes, +}; + +static int cpr_4011_4mxx_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct cpr_4011_4mxx_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct cpr_4011_4mxx_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &cpr_4011_4mxx_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &cpr_4011_4mxx_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int cpr_4011_4mxx_remove(struct i2c_client *client) +{ + struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &cpr_4011_4mxx_group); + kfree(data); + + return 0; +} + +static const struct i2c_device_id cpr_4011_4mxx_id[] = { + { "cpr_4011_4mxx", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, cpr_4011_4mxx_id); + +static struct i2c_driver cpr_4011_4mxx_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "cpr_4011_4mxx", + }, + .probe = cpr_4011_4mxx_probe, + .remove = cpr_4011_4mxx_remove, + .id_table = cpr_4011_4mxx_id, + .address_list = normal_i2c, +}; + +static int cpr_4011_4mxx_read_byte(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int cpr_4011_4mxx_read_word(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_word_data(client, reg); +} + +static int cpr_4011_4mxx_write_word(struct i2c_client *client, u8 reg, u16 value) +{ + return i2c_smbus_write_word_data(client, reg, value); +} + +struct reg_data_byte { + u8 reg; + u8 *value; +}; + +struct reg_data_word { + u8 reg; + u16 *value; +}; + +static struct cpr_4011_4mxx_data *cpr_4011_4mxx_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int i, status; + struct reg_data_byte regs_byte[] = { {0x20, &data->vout_mode}, + {0x81, &data->fan_fault}}; + struct reg_data_word regs_word[] = { {0x88, &data->v_in}, + {0x8b, &data->v_out}, + {0x89, &data->i_in}, + {0x8c, &data->i_out}, + {0x96, &data->p_out}, + {0x97, &data->p_in}, + {0x8d, &(data->temp_input[0])}, + {0x8e, &(data->temp_input[1])}, + {0x3b, &(data->fan_duty_cycle[0])}, + {0x3c, &(data->fan_duty_cycle[1])}, + {0x90, &(data->fan_speed[0])}, + {0x91, &(data->fan_speed[1])}}; + + dev_dbg(&client->dev, "Starting cpr_4011_4mxx update\n"); + + /* Read byte data */ + for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { + status = cpr_4011_4mxx_read_byte(client, regs_byte[i].reg); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_byte[i].reg, status); + } + else { + *(regs_byte[i].value) = status; + } + } + + /* Read word data */ + for (i = 0; i < ARRAY_SIZE(regs_word); i++) { + status = cpr_4011_4mxx_read_word(client, regs_word[i].reg); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_word[i].reg, status); + } + else { + *(regs_word[i].value) = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init cpr_4011_4mxx_init(void) +{ + return i2c_add_driver(&cpr_4011_4mxx_driver); +} + +static void __exit cpr_4011_4mxx_exit(void) +{ + i2c_del_driver(&cpr_4011_4mxx_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("CPR_4011_4MXX driver"); +MODULE_LICENSE("GPL"); + +module_init(cpr_4011_4mxx_init); +module_exit(cpr_4011_4mxx_exit); diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/i2c-mux-accton_as5812_54x_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/i2c-mux-accton_as5812_54x_cpld.c new file mode 100644 index 00000000000..1578d75bdd9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/i2c-mux-accton_as5812_54x_cpld.c @@ -0,0 +1,1421 @@ +/* + * An I2C multiplexer dirver for accton as5812 CPLD + * + * Copyright (C) 2015 Accton Technology Corporation. + * Brandon Chuang + * + * This module supports the accton cpld that hold the channel select + * mechanism for other i2c slave devices, such as SFP. + * This includes the: + * Accton as5812_54x CPLD1/CPLD2/CPLD3 + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +#define NUM_OF_CPLD1_CHANS 0x0 +#define NUM_OF_CPLD2_CHANS 0x18 +#define NUM_OF_CPLD3_CHANS 0x1E +#define CPLD_CHANNEL_SELECT_REG 0x2 +#define CPLD_DESELECT_CHANNEL 0xFF + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +enum cpld_mux_type { + as5812_54x_cpld2, + as5812_54x_cpld3, + as5812_54x_cpld1 +}; + +struct as5812_54x_cpld_data { + enum cpld_mux_type type; + struct i2c_client *client; + u8 last_chan; /* last register value */ + + struct device *hwmon_dev; + struct mutex update_lock; +}; + +struct chip_desc { + u8 nchans; + u8 deselectChan; +}; + +/* Provide specs for the PCA954x types we know about */ +static const struct chip_desc chips[] = { + [as5812_54x_cpld1] = { + .nchans = NUM_OF_CPLD1_CHANS, + .deselectChan = CPLD_DESELECT_CHANNEL, + }, + [as5812_54x_cpld2] = { + .nchans = NUM_OF_CPLD2_CHANS, + .deselectChan = CPLD_DESELECT_CHANNEL, + }, + [as5812_54x_cpld3] = { + .nchans = NUM_OF_CPLD3_CHANS, + .deselectChan = CPLD_DESELECT_CHANNEL, + } +}; + +static const struct i2c_device_id as5812_54x_cpld_mux_id[] = { + { "as5812_54x_cpld1", as5812_54x_cpld1 }, + { "as5812_54x_cpld2", as5812_54x_cpld2 }, + { "as5812_54x_cpld3", as5812_54x_cpld3 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, as5812_54x_cpld_mux_id); + +#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index +#define TRANSCEIVER_TXDISABLE_ATTR_ID(index) MODULE_TXDISABLE_##index +#define TRANSCEIVER_RXLOS_ATTR_ID(index) MODULE_RXLOS_##index +#define TRANSCEIVER_TXFAULT_ATTR_ID(index) MODULE_TXFAULT_##index +#define TRANSCEIVER_LPMODE_ATTR_ID(index) MODULE_LPMODE_##index +#define TRANSCEIVER_RESET_ATTR_ID(index) MODULE_RESET_##index + +enum as5812_54x_cpld1_sysfs_attributes { + CPLD_VERSION, + ACCESS, + MODULE_PRESENT_ALL, + MODULE_RXLOS_ALL, + /* transceiver attributes */ + TRANSCEIVER_PRESENT_ATTR_ID(1), + TRANSCEIVER_PRESENT_ATTR_ID(2), + TRANSCEIVER_PRESENT_ATTR_ID(3), + TRANSCEIVER_PRESENT_ATTR_ID(4), + TRANSCEIVER_PRESENT_ATTR_ID(5), + TRANSCEIVER_PRESENT_ATTR_ID(6), + TRANSCEIVER_PRESENT_ATTR_ID(7), + TRANSCEIVER_PRESENT_ATTR_ID(8), + TRANSCEIVER_PRESENT_ATTR_ID(9), + TRANSCEIVER_PRESENT_ATTR_ID(10), + TRANSCEIVER_PRESENT_ATTR_ID(11), + TRANSCEIVER_PRESENT_ATTR_ID(12), + TRANSCEIVER_PRESENT_ATTR_ID(13), + TRANSCEIVER_PRESENT_ATTR_ID(14), + TRANSCEIVER_PRESENT_ATTR_ID(15), + TRANSCEIVER_PRESENT_ATTR_ID(16), + TRANSCEIVER_PRESENT_ATTR_ID(17), + TRANSCEIVER_PRESENT_ATTR_ID(18), + TRANSCEIVER_PRESENT_ATTR_ID(19), + TRANSCEIVER_PRESENT_ATTR_ID(20), + TRANSCEIVER_PRESENT_ATTR_ID(21), + TRANSCEIVER_PRESENT_ATTR_ID(22), + TRANSCEIVER_PRESENT_ATTR_ID(23), + TRANSCEIVER_PRESENT_ATTR_ID(24), + TRANSCEIVER_PRESENT_ATTR_ID(25), + TRANSCEIVER_PRESENT_ATTR_ID(26), + TRANSCEIVER_PRESENT_ATTR_ID(27), + TRANSCEIVER_PRESENT_ATTR_ID(28), + TRANSCEIVER_PRESENT_ATTR_ID(29), + TRANSCEIVER_PRESENT_ATTR_ID(30), + TRANSCEIVER_PRESENT_ATTR_ID(31), + TRANSCEIVER_PRESENT_ATTR_ID(32), + TRANSCEIVER_PRESENT_ATTR_ID(33), + TRANSCEIVER_PRESENT_ATTR_ID(34), + TRANSCEIVER_PRESENT_ATTR_ID(35), + TRANSCEIVER_PRESENT_ATTR_ID(36), + TRANSCEIVER_PRESENT_ATTR_ID(37), + TRANSCEIVER_PRESENT_ATTR_ID(38), + TRANSCEIVER_PRESENT_ATTR_ID(39), + TRANSCEIVER_PRESENT_ATTR_ID(40), + TRANSCEIVER_PRESENT_ATTR_ID(41), + TRANSCEIVER_PRESENT_ATTR_ID(42), + TRANSCEIVER_PRESENT_ATTR_ID(43), + TRANSCEIVER_PRESENT_ATTR_ID(44), + TRANSCEIVER_PRESENT_ATTR_ID(45), + TRANSCEIVER_PRESENT_ATTR_ID(46), + TRANSCEIVER_PRESENT_ATTR_ID(47), + TRANSCEIVER_PRESENT_ATTR_ID(48), + TRANSCEIVER_PRESENT_ATTR_ID(49), + TRANSCEIVER_PRESENT_ATTR_ID(50), + TRANSCEIVER_PRESENT_ATTR_ID(51), + TRANSCEIVER_PRESENT_ATTR_ID(52), + TRANSCEIVER_PRESENT_ATTR_ID(53), + TRANSCEIVER_PRESENT_ATTR_ID(54), + TRANSCEIVER_TXDISABLE_ATTR_ID(1), + TRANSCEIVER_TXDISABLE_ATTR_ID(2), + TRANSCEIVER_TXDISABLE_ATTR_ID(3), + TRANSCEIVER_TXDISABLE_ATTR_ID(4), + TRANSCEIVER_TXDISABLE_ATTR_ID(5), + TRANSCEIVER_TXDISABLE_ATTR_ID(6), + TRANSCEIVER_TXDISABLE_ATTR_ID(7), + TRANSCEIVER_TXDISABLE_ATTR_ID(8), + TRANSCEIVER_TXDISABLE_ATTR_ID(9), + TRANSCEIVER_TXDISABLE_ATTR_ID(10), + TRANSCEIVER_TXDISABLE_ATTR_ID(11), + TRANSCEIVER_TXDISABLE_ATTR_ID(12), + TRANSCEIVER_TXDISABLE_ATTR_ID(13), + TRANSCEIVER_TXDISABLE_ATTR_ID(14), + TRANSCEIVER_TXDISABLE_ATTR_ID(15), + TRANSCEIVER_TXDISABLE_ATTR_ID(16), + TRANSCEIVER_TXDISABLE_ATTR_ID(17), + TRANSCEIVER_TXDISABLE_ATTR_ID(18), + TRANSCEIVER_TXDISABLE_ATTR_ID(19), + TRANSCEIVER_TXDISABLE_ATTR_ID(20), + TRANSCEIVER_TXDISABLE_ATTR_ID(21), + TRANSCEIVER_TXDISABLE_ATTR_ID(22), + TRANSCEIVER_TXDISABLE_ATTR_ID(23), + TRANSCEIVER_TXDISABLE_ATTR_ID(24), + TRANSCEIVER_TXDISABLE_ATTR_ID(25), + TRANSCEIVER_TXDISABLE_ATTR_ID(26), + TRANSCEIVER_TXDISABLE_ATTR_ID(27), + TRANSCEIVER_TXDISABLE_ATTR_ID(28), + TRANSCEIVER_TXDISABLE_ATTR_ID(29), + TRANSCEIVER_TXDISABLE_ATTR_ID(30), + TRANSCEIVER_TXDISABLE_ATTR_ID(31), + TRANSCEIVER_TXDISABLE_ATTR_ID(32), + TRANSCEIVER_TXDISABLE_ATTR_ID(33), + TRANSCEIVER_TXDISABLE_ATTR_ID(34), + TRANSCEIVER_TXDISABLE_ATTR_ID(35), + TRANSCEIVER_TXDISABLE_ATTR_ID(36), + TRANSCEIVER_TXDISABLE_ATTR_ID(37), + TRANSCEIVER_TXDISABLE_ATTR_ID(38), + TRANSCEIVER_TXDISABLE_ATTR_ID(39), + TRANSCEIVER_TXDISABLE_ATTR_ID(40), + TRANSCEIVER_TXDISABLE_ATTR_ID(41), + TRANSCEIVER_TXDISABLE_ATTR_ID(42), + TRANSCEIVER_TXDISABLE_ATTR_ID(43), + TRANSCEIVER_TXDISABLE_ATTR_ID(44), + TRANSCEIVER_TXDISABLE_ATTR_ID(45), + TRANSCEIVER_TXDISABLE_ATTR_ID(46), + TRANSCEIVER_TXDISABLE_ATTR_ID(47), + TRANSCEIVER_TXDISABLE_ATTR_ID(48), + TRANSCEIVER_RXLOS_ATTR_ID(1), + TRANSCEIVER_RXLOS_ATTR_ID(2), + TRANSCEIVER_RXLOS_ATTR_ID(3), + TRANSCEIVER_RXLOS_ATTR_ID(4), + TRANSCEIVER_RXLOS_ATTR_ID(5), + TRANSCEIVER_RXLOS_ATTR_ID(6), + TRANSCEIVER_RXLOS_ATTR_ID(7), + TRANSCEIVER_RXLOS_ATTR_ID(8), + TRANSCEIVER_RXLOS_ATTR_ID(9), + TRANSCEIVER_RXLOS_ATTR_ID(10), + TRANSCEIVER_RXLOS_ATTR_ID(11), + TRANSCEIVER_RXLOS_ATTR_ID(12), + TRANSCEIVER_RXLOS_ATTR_ID(13), + TRANSCEIVER_RXLOS_ATTR_ID(14), + TRANSCEIVER_RXLOS_ATTR_ID(15), + TRANSCEIVER_RXLOS_ATTR_ID(16), + TRANSCEIVER_RXLOS_ATTR_ID(17), + TRANSCEIVER_RXLOS_ATTR_ID(18), + TRANSCEIVER_RXLOS_ATTR_ID(19), + TRANSCEIVER_RXLOS_ATTR_ID(20), + TRANSCEIVER_RXLOS_ATTR_ID(21), + TRANSCEIVER_RXLOS_ATTR_ID(22), + TRANSCEIVER_RXLOS_ATTR_ID(23), + TRANSCEIVER_RXLOS_ATTR_ID(24), + TRANSCEIVER_RXLOS_ATTR_ID(25), + TRANSCEIVER_RXLOS_ATTR_ID(26), + TRANSCEIVER_RXLOS_ATTR_ID(27), + TRANSCEIVER_RXLOS_ATTR_ID(28), + TRANSCEIVER_RXLOS_ATTR_ID(29), + TRANSCEIVER_RXLOS_ATTR_ID(30), + TRANSCEIVER_RXLOS_ATTR_ID(31), + TRANSCEIVER_RXLOS_ATTR_ID(32), + TRANSCEIVER_RXLOS_ATTR_ID(33), + TRANSCEIVER_RXLOS_ATTR_ID(34), + TRANSCEIVER_RXLOS_ATTR_ID(35), + TRANSCEIVER_RXLOS_ATTR_ID(36), + TRANSCEIVER_RXLOS_ATTR_ID(37), + TRANSCEIVER_RXLOS_ATTR_ID(38), + TRANSCEIVER_RXLOS_ATTR_ID(39), + TRANSCEIVER_RXLOS_ATTR_ID(40), + TRANSCEIVER_RXLOS_ATTR_ID(41), + TRANSCEIVER_RXLOS_ATTR_ID(42), + TRANSCEIVER_RXLOS_ATTR_ID(43), + TRANSCEIVER_RXLOS_ATTR_ID(44), + TRANSCEIVER_RXLOS_ATTR_ID(45), + TRANSCEIVER_RXLOS_ATTR_ID(46), + TRANSCEIVER_RXLOS_ATTR_ID(47), + TRANSCEIVER_RXLOS_ATTR_ID(48), + TRANSCEIVER_TXFAULT_ATTR_ID(1), + TRANSCEIVER_TXFAULT_ATTR_ID(2), + TRANSCEIVER_TXFAULT_ATTR_ID(3), + TRANSCEIVER_TXFAULT_ATTR_ID(4), + TRANSCEIVER_TXFAULT_ATTR_ID(5), + TRANSCEIVER_TXFAULT_ATTR_ID(6), + TRANSCEIVER_TXFAULT_ATTR_ID(7), + TRANSCEIVER_TXFAULT_ATTR_ID(8), + TRANSCEIVER_TXFAULT_ATTR_ID(9), + TRANSCEIVER_TXFAULT_ATTR_ID(10), + TRANSCEIVER_TXFAULT_ATTR_ID(11), + TRANSCEIVER_TXFAULT_ATTR_ID(12), + TRANSCEIVER_TXFAULT_ATTR_ID(13), + TRANSCEIVER_TXFAULT_ATTR_ID(14), + TRANSCEIVER_TXFAULT_ATTR_ID(15), + TRANSCEIVER_TXFAULT_ATTR_ID(16), + TRANSCEIVER_TXFAULT_ATTR_ID(17), + TRANSCEIVER_TXFAULT_ATTR_ID(18), + TRANSCEIVER_TXFAULT_ATTR_ID(19), + TRANSCEIVER_TXFAULT_ATTR_ID(20), + TRANSCEIVER_TXFAULT_ATTR_ID(21), + TRANSCEIVER_TXFAULT_ATTR_ID(22), + TRANSCEIVER_TXFAULT_ATTR_ID(23), + TRANSCEIVER_TXFAULT_ATTR_ID(24), + TRANSCEIVER_TXFAULT_ATTR_ID(25), + TRANSCEIVER_TXFAULT_ATTR_ID(26), + TRANSCEIVER_TXFAULT_ATTR_ID(27), + TRANSCEIVER_TXFAULT_ATTR_ID(28), + TRANSCEIVER_TXFAULT_ATTR_ID(29), + TRANSCEIVER_TXFAULT_ATTR_ID(30), + TRANSCEIVER_TXFAULT_ATTR_ID(31), + TRANSCEIVER_TXFAULT_ATTR_ID(32), + TRANSCEIVER_TXFAULT_ATTR_ID(33), + TRANSCEIVER_TXFAULT_ATTR_ID(34), + TRANSCEIVER_TXFAULT_ATTR_ID(35), + TRANSCEIVER_TXFAULT_ATTR_ID(36), + TRANSCEIVER_TXFAULT_ATTR_ID(37), + TRANSCEIVER_TXFAULT_ATTR_ID(38), + TRANSCEIVER_TXFAULT_ATTR_ID(39), + TRANSCEIVER_TXFAULT_ATTR_ID(40), + TRANSCEIVER_TXFAULT_ATTR_ID(41), + TRANSCEIVER_TXFAULT_ATTR_ID(42), + TRANSCEIVER_TXFAULT_ATTR_ID(43), + TRANSCEIVER_TXFAULT_ATTR_ID(44), + TRANSCEIVER_TXFAULT_ATTR_ID(45), + TRANSCEIVER_TXFAULT_ATTR_ID(46), + TRANSCEIVER_TXFAULT_ATTR_ID(47), + TRANSCEIVER_TXFAULT_ATTR_ID(48), + TRANSCEIVER_LPMODE_ATTR_ID(49), + TRANSCEIVER_LPMODE_ATTR_ID(50), + TRANSCEIVER_LPMODE_ATTR_ID(51), + TRANSCEIVER_LPMODE_ATTR_ID(52), + TRANSCEIVER_LPMODE_ATTR_ID(53), + TRANSCEIVER_LPMODE_ATTR_ID(54), + TRANSCEIVER_RESET_ATTR_ID(49), + TRANSCEIVER_RESET_ATTR_ID(50), + TRANSCEIVER_RESET_ATTR_ID(51), + TRANSCEIVER_RESET_ATTR_ID(52), + TRANSCEIVER_RESET_ATTR_ID(53), + TRANSCEIVER_RESET_ATTR_ID(54), +}; + +/* sysfs attributes for hwmon + */ +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_rxlos_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t set_lp_mode(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +static int as5812_54x_cpld_read_internal(struct i2c_client *client, u8 reg); +static int as5812_54x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value); + +/* transceiver attributes */ +#define DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_status, NULL, MODULE_PRESENT_##index) +#define DECLARE_TRANSCEIVER_PRESENT_ATTR(index) &sensor_dev_attr_module_present_##index.dev_attr.attr + +#define DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_tx_disable_##index, S_IRUGO | S_IWUSR, show_status, set_tx_disable, MODULE_TXDISABLE_##index); \ + static SENSOR_DEVICE_ATTR(module_rx_los_##index, S_IRUGO, show_status, NULL, MODULE_RXLOS_##index); \ + static SENSOR_DEVICE_ATTR(module_tx_fault_##index, S_IRUGO, show_status, NULL, MODULE_TXFAULT_##index) + +#define DECLARE_SFP_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_tx_disable_##index.dev_attr.attr, \ + &sensor_dev_attr_module_rx_los_##index.dev_attr.attr, \ + &sensor_dev_attr_module_tx_fault_##index.dev_attr.attr + +#define DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_lp_mode_##index, S_IRUGO | S_IWUSR, show_status, set_lp_mode, MODULE_LPMODE_##index); \ + static SENSOR_DEVICE_ATTR(module_reset_##index, S_IWUSR | S_IRUGO, show_status, set_mode_reset, MODULE_RESET_##index) + +#define DECLARE_QSFP_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_lp_mode_##index.dev_attr.attr, \ + &sensor_dev_attr_module_reset_##index.dev_attr.attr + + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS); +/* transceiver attributes */ +static SENSOR_DEVICE_ATTR(module_present_all, S_IRUGO, show_present_all, NULL, MODULE_PRESENT_ALL); +static SENSOR_DEVICE_ATTR(module_rx_los_all, S_IRUGO, show_rxlos_all, NULL, MODULE_RXLOS_ALL); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(1); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(2); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(3); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(4); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(5); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(6); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(7); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(8); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(9); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(10); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(11); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(12); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(13); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(14); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(15); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(16); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(17); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(18); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(19); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(20); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(21); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(22); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(23); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(24); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(25); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(26); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(27); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(28); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(29); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(30); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(31); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(32); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(33); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(34); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(35); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(36); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(37); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(38); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(39); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(40); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(41); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(42); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(43); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(44); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(45); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(46); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(47); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(48); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(49); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(50); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(51); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(52); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(53); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(54); + +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(1); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(2); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(3); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(4); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(5); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(6); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(7); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(8); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(9); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(10); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(11); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(12); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(13); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(14); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(15); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(16); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(17); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(18); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(19); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(20); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(21); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(22); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(23); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(24); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(25); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(26); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(27); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(28); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(29); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(30); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(31); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(32); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(33); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(34); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(35); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(36); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(37); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(38); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(39); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(40); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(41); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(42); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(43); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(44); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(45); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(46); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(47); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(48); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(49); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(50); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(51); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(52); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(53); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(54); + +static struct attribute *as5812_54x_cpld1_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + NULL +}; + +static const struct attribute_group as5812_54x_cpld1_group = { + .attrs = as5812_54x_cpld1_attributes, +}; + +static struct attribute *as5812_54x_cpld2_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + &sensor_dev_attr_module_rx_los_all.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(1), + DECLARE_TRANSCEIVER_PRESENT_ATTR(2), + DECLARE_TRANSCEIVER_PRESENT_ATTR(3), + DECLARE_TRANSCEIVER_PRESENT_ATTR(4), + DECLARE_TRANSCEIVER_PRESENT_ATTR(5), + DECLARE_TRANSCEIVER_PRESENT_ATTR(6), + DECLARE_TRANSCEIVER_PRESENT_ATTR(7), + DECLARE_TRANSCEIVER_PRESENT_ATTR(8), + DECLARE_TRANSCEIVER_PRESENT_ATTR(9), + DECLARE_TRANSCEIVER_PRESENT_ATTR(10), + DECLARE_TRANSCEIVER_PRESENT_ATTR(11), + DECLARE_TRANSCEIVER_PRESENT_ATTR(12), + DECLARE_TRANSCEIVER_PRESENT_ATTR(13), + DECLARE_TRANSCEIVER_PRESENT_ATTR(14), + DECLARE_TRANSCEIVER_PRESENT_ATTR(15), + DECLARE_TRANSCEIVER_PRESENT_ATTR(16), + DECLARE_TRANSCEIVER_PRESENT_ATTR(17), + DECLARE_TRANSCEIVER_PRESENT_ATTR(18), + DECLARE_TRANSCEIVER_PRESENT_ATTR(19), + DECLARE_TRANSCEIVER_PRESENT_ATTR(20), + DECLARE_TRANSCEIVER_PRESENT_ATTR(21), + DECLARE_TRANSCEIVER_PRESENT_ATTR(22), + DECLARE_TRANSCEIVER_PRESENT_ATTR(23), + DECLARE_TRANSCEIVER_PRESENT_ATTR(24), + DECLARE_SFP_TRANSCEIVER_ATTR(1), + DECLARE_SFP_TRANSCEIVER_ATTR(2), + DECLARE_SFP_TRANSCEIVER_ATTR(3), + DECLARE_SFP_TRANSCEIVER_ATTR(4), + DECLARE_SFP_TRANSCEIVER_ATTR(5), + DECLARE_SFP_TRANSCEIVER_ATTR(6), + DECLARE_SFP_TRANSCEIVER_ATTR(7), + DECLARE_SFP_TRANSCEIVER_ATTR(8), + DECLARE_SFP_TRANSCEIVER_ATTR(9), + DECLARE_SFP_TRANSCEIVER_ATTR(10), + DECLARE_SFP_TRANSCEIVER_ATTR(11), + DECLARE_SFP_TRANSCEIVER_ATTR(12), + DECLARE_SFP_TRANSCEIVER_ATTR(13), + DECLARE_SFP_TRANSCEIVER_ATTR(14), + DECLARE_SFP_TRANSCEIVER_ATTR(15), + DECLARE_SFP_TRANSCEIVER_ATTR(16), + DECLARE_SFP_TRANSCEIVER_ATTR(17), + DECLARE_SFP_TRANSCEIVER_ATTR(18), + DECLARE_SFP_TRANSCEIVER_ATTR(19), + DECLARE_SFP_TRANSCEIVER_ATTR(20), + DECLARE_SFP_TRANSCEIVER_ATTR(21), + DECLARE_SFP_TRANSCEIVER_ATTR(22), + DECLARE_SFP_TRANSCEIVER_ATTR(23), + DECLARE_SFP_TRANSCEIVER_ATTR(24), + NULL +}; + +static const struct attribute_group as5812_54x_cpld2_group = { + .attrs = as5812_54x_cpld2_attributes, +}; + +static struct attribute *as5812_54x_cpld3_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + &sensor_dev_attr_module_rx_los_all.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(25), + DECLARE_TRANSCEIVER_PRESENT_ATTR(26), + DECLARE_TRANSCEIVER_PRESENT_ATTR(27), + DECLARE_TRANSCEIVER_PRESENT_ATTR(28), + DECLARE_TRANSCEIVER_PRESENT_ATTR(29), + DECLARE_TRANSCEIVER_PRESENT_ATTR(30), + DECLARE_TRANSCEIVER_PRESENT_ATTR(31), + DECLARE_TRANSCEIVER_PRESENT_ATTR(32), + DECLARE_TRANSCEIVER_PRESENT_ATTR(33), + DECLARE_TRANSCEIVER_PRESENT_ATTR(34), + DECLARE_TRANSCEIVER_PRESENT_ATTR(35), + DECLARE_TRANSCEIVER_PRESENT_ATTR(36), + DECLARE_TRANSCEIVER_PRESENT_ATTR(37), + DECLARE_TRANSCEIVER_PRESENT_ATTR(38), + DECLARE_TRANSCEIVER_PRESENT_ATTR(39), + DECLARE_TRANSCEIVER_PRESENT_ATTR(40), + DECLARE_TRANSCEIVER_PRESENT_ATTR(41), + DECLARE_TRANSCEIVER_PRESENT_ATTR(42), + DECLARE_TRANSCEIVER_PRESENT_ATTR(43), + DECLARE_TRANSCEIVER_PRESENT_ATTR(44), + DECLARE_TRANSCEIVER_PRESENT_ATTR(45), + DECLARE_TRANSCEIVER_PRESENT_ATTR(46), + DECLARE_TRANSCEIVER_PRESENT_ATTR(47), + DECLARE_TRANSCEIVER_PRESENT_ATTR(48), + DECLARE_TRANSCEIVER_PRESENT_ATTR(49), + DECLARE_TRANSCEIVER_PRESENT_ATTR(50), + DECLARE_TRANSCEIVER_PRESENT_ATTR(51), + DECLARE_TRANSCEIVER_PRESENT_ATTR(52), + DECLARE_TRANSCEIVER_PRESENT_ATTR(53), + DECLARE_TRANSCEIVER_PRESENT_ATTR(54), + DECLARE_SFP_TRANSCEIVER_ATTR(25), + DECLARE_SFP_TRANSCEIVER_ATTR(26), + DECLARE_SFP_TRANSCEIVER_ATTR(27), + DECLARE_SFP_TRANSCEIVER_ATTR(28), + DECLARE_SFP_TRANSCEIVER_ATTR(29), + DECLARE_SFP_TRANSCEIVER_ATTR(30), + DECLARE_SFP_TRANSCEIVER_ATTR(31), + DECLARE_SFP_TRANSCEIVER_ATTR(32), + DECLARE_SFP_TRANSCEIVER_ATTR(33), + DECLARE_SFP_TRANSCEIVER_ATTR(34), + DECLARE_SFP_TRANSCEIVER_ATTR(35), + DECLARE_SFP_TRANSCEIVER_ATTR(36), + DECLARE_SFP_TRANSCEIVER_ATTR(37), + DECLARE_SFP_TRANSCEIVER_ATTR(38), + DECLARE_SFP_TRANSCEIVER_ATTR(39), + DECLARE_SFP_TRANSCEIVER_ATTR(40), + DECLARE_SFP_TRANSCEIVER_ATTR(41), + DECLARE_SFP_TRANSCEIVER_ATTR(42), + DECLARE_SFP_TRANSCEIVER_ATTR(43), + DECLARE_SFP_TRANSCEIVER_ATTR(44), + DECLARE_SFP_TRANSCEIVER_ATTR(45), + DECLARE_SFP_TRANSCEIVER_ATTR(46), + DECLARE_SFP_TRANSCEIVER_ATTR(47), + DECLARE_SFP_TRANSCEIVER_ATTR(48), + DECLARE_QSFP_TRANSCEIVER_ATTR(49), + DECLARE_QSFP_TRANSCEIVER_ATTR(50), + DECLARE_QSFP_TRANSCEIVER_ATTR(51), + DECLARE_QSFP_TRANSCEIVER_ATTR(52), + DECLARE_QSFP_TRANSCEIVER_ATTR(53), + DECLARE_QSFP_TRANSCEIVER_ATTR(54), + NULL +}; + +static const struct attribute_group as5812_54x_cpld3_group = { + .attrs = as5812_54x_cpld3_attributes, +}; + +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status, num_regs = 0; + u8 values[4] = {0}; + u8 regs[] = {0x6, 0x7, 0x8, 0x14}; + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5812_54x_cpld_data *data = i2c_mux_priv(muxc); + + mutex_lock(&data->update_lock); + + num_regs = (data->type == as5812_54x_cpld2) ? 3 : 4; + + for (i = 0; i < num_regs; i++) { + status = as5812_54x_cpld_read_internal(client, regs[i]); + + if (status < 0) { + goto exit; + } + + values[i] = ~(u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values 1 -> 54 in order */ + if (data->type == as5812_54x_cpld2) { + status = sprintf(buf, "%.2x %.2x %.2x\n", + values[0], values[1], values[2]); + } + else { /* as5812_54x_cpld3 */ + values[3] &= 0x3F; + status = sprintf(buf, "%.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], values[3]); + } + + return status; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_rxlos_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u8 values[3] = {0}; + u8 regs[] = {0xF, 0x10, 0x11}; + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5812_54x_cpld_data *data = i2c_mux_priv(muxc); + + mutex_lock(&data->update_lock); + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = as5812_54x_cpld_read_internal(client, regs[i]); + + if (status < 0) { + goto exit; + } + + values[i] = (u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values 1 -> 24 in order */ + return sprintf(buf, "%.2x %.2x %.2x\n", values[0], values[1], values[2]); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5812_54x_cpld_data *data = i2c_mux_priv(muxc); + int status = 0; + u8 reg = 0, mask = 0, revert = 0; + + switch (attr->index) { + case MODULE_PRESENT_1 ... MODULE_PRESENT_8: + reg = 0x6; + mask = 0x1 << (attr->index - MODULE_PRESENT_1); + break; + case MODULE_PRESENT_9 ... MODULE_PRESENT_16: + reg = 0x7; + mask = 0x1 << (attr->index - MODULE_PRESENT_9); + break; + case MODULE_PRESENT_17 ... MODULE_PRESENT_24: + reg = 0x8; + mask = 0x1 << (attr->index - MODULE_PRESENT_17); + break; + case MODULE_PRESENT_25 ... MODULE_PRESENT_32: + reg = 0x6; + mask = 0x1 << (attr->index - MODULE_PRESENT_25); + break; + case MODULE_PRESENT_33 ... MODULE_PRESENT_40: + reg = 0x7; + mask = 0x1 << (attr->index - MODULE_PRESENT_33); + break; + case MODULE_PRESENT_41 ... MODULE_PRESENT_48: + reg = 0x8; + mask = 0x1 << (attr->index - MODULE_PRESENT_41); + break; + case MODULE_PRESENT_49: + reg = 0x14; + mask = 0x1; + break; + case MODULE_PRESENT_50: + reg = 0x14; + mask = 0x4; + break; + case MODULE_PRESENT_51: + reg = 0x14; + mask = 0x10; + break; + case MODULE_PRESENT_52: + reg = 0x14; + mask = 0x2; + break; + case MODULE_PRESENT_53: + reg = 0x14; + mask = 0x8; + break; + case MODULE_PRESENT_54: + reg = 0x14; + mask = 0x20; + break; + case MODULE_TXFAULT_1 ... MODULE_TXFAULT_8: + reg = 0x9; + mask = 0x1 << (attr->index - MODULE_TXFAULT_1); + break; + case MODULE_TXFAULT_9 ... MODULE_TXFAULT_16: + reg = 0xA; + mask = 0x1 << (attr->index - MODULE_TXFAULT_9); + break; + case MODULE_TXFAULT_17 ... MODULE_TXFAULT_24: + reg = 0xB; + mask = 0x1 << (attr->index - MODULE_TXFAULT_17); + break; + case MODULE_TXFAULT_25 ... MODULE_TXFAULT_32: + reg = 0x9; + mask = 0x1 << (attr->index - MODULE_TXFAULT_25); + break; + case MODULE_TXFAULT_33 ... MODULE_TXFAULT_40: + reg = 0xA; + mask = 0x1 << (attr->index - MODULE_TXFAULT_33); + break; + case MODULE_TXFAULT_41 ... MODULE_TXFAULT_48: + reg = 0xB; + mask = 0x1 << (attr->index - MODULE_TXFAULT_41); + break; + case MODULE_TXDISABLE_1 ... MODULE_TXDISABLE_8: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_1); + break; + case MODULE_TXDISABLE_9 ... MODULE_TXDISABLE_16: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_9); + break; + case MODULE_TXDISABLE_17 ... MODULE_TXDISABLE_24: + reg = 0xE; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_17); + break; + case MODULE_TXDISABLE_25 ... MODULE_TXDISABLE_32: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_25); + break; + case MODULE_TXDISABLE_33 ... MODULE_TXDISABLE_40: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_33); + break; + case MODULE_TXDISABLE_41 ... MODULE_TXDISABLE_48: + reg = 0xE; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_41); + break; + case MODULE_RXLOS_1 ... MODULE_RXLOS_8: + reg = 0xF; + mask = 0x1 << (attr->index - MODULE_RXLOS_1); + break; + case MODULE_RXLOS_9 ... MODULE_RXLOS_16: + reg = 0x10; + mask = 0x1 << (attr->index - MODULE_RXLOS_9); + break; + case MODULE_RXLOS_17 ... MODULE_RXLOS_24: + reg = 0x11; + mask = 0x1 << (attr->index - MODULE_RXLOS_17); + break; + case MODULE_RXLOS_25 ... MODULE_RXLOS_32: + reg = 0xF; + mask = 0x1 << (attr->index - MODULE_RXLOS_25); + break; + case MODULE_RXLOS_33 ... MODULE_RXLOS_40: + reg = 0x10; + mask = 0x1 << (attr->index - MODULE_RXLOS_33); + break; + case MODULE_RXLOS_41 ... MODULE_RXLOS_48: + reg = 0x11; + mask = 0x1 << (attr->index - MODULE_RXLOS_41); + break; + case MODULE_LPMODE_49 ... MODULE_LPMODE_54: + reg = 0x16; + mask = 0x1 << (attr->index - MODULE_LPMODE_49); + break; + case MODULE_RESET_49 ... MODULE_RESET_54: + reg = 0x15; + mask = 0x1 << (attr->index - MODULE_RESET_49); + break; + default: + return 0; + } + + if (attr->index >= MODULE_PRESENT_1 && attr->index <= MODULE_PRESENT_54) { + revert = 1; + } + + mutex_lock(&data->update_lock); + status = as5812_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", revert ? !(status & mask) : !!(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5812_54x_cpld_data *data = i2c_mux_priv(muxc); + long disable; + int status; + u8 reg = 0, mask = 0; + + status = kstrtol(buf, 10, &disable); + if (status) { + return status; + } + + switch (attr->index) { + case MODULE_TXDISABLE_1 ... MODULE_TXDISABLE_8: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_1); + break; + case MODULE_TXDISABLE_9 ... MODULE_TXDISABLE_16: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_9); + break; + case MODULE_TXDISABLE_17 ... MODULE_TXDISABLE_24: + reg = 0xE; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_17); + break; + case MODULE_TXDISABLE_25 ... MODULE_TXDISABLE_32: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_25); + break; + case MODULE_TXDISABLE_33 ... MODULE_TXDISABLE_40: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_33); + break; + case MODULE_TXDISABLE_41 ... MODULE_TXDISABLE_48: + reg = 0xE; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_41); + break; + default: + return 0; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as5812_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update tx_disable status */ + if (disable) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as5812_54x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_lp_mode(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5812_54x_cpld_data *data = i2c_mux_priv(muxc); + + long on; + int status= -ENOENT; + u8 reg = 0x16, mask = 0; + + if(attr->index < MODULE_LPMODE_49 || attr->index > MODULE_LPMODE_54) + return status; + + status = kstrtol(buf, 10, &on); + if (status) { + return status; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as5812_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + mask = 0x1 << (attr->index - MODULE_LPMODE_49); + + /* Update lp_mode status */ + if (on) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as5812_54x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; + +} + +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5812_54x_cpld_data *data = i2c_mux_priv(muxc); + + long on; + int status= -ENOENT; + u8 reg = 0x15, mask = 0; + + if(attr->index < MODULE_RESET_49 || attr->index > MODULE_RESET_54) + return status; + + status = kstrtol(buf, 10, &on); + if (status) { + return status; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as5812_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + mask = 0x1 << (attr->index - MODULE_RESET_49); + + /* Update tx_disable status */ + if (on) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as5812_54x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; + +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5812_54x_cpld_data *data = i2c_mux_priv(muxc); + int status; + u32 addr, val; + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = as5812_54x_cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() + for this as they will try to lock adapter a second time */ +static int as5812_54x_cpld_mux_reg_write(struct i2c_adapter *adap, + struct i2c_client *client, u8 val) +{ + unsigned long orig_jiffies; + unsigned short flags; + union i2c_smbus_data data; + int try; + s32 res = -EIO; + + data.byte = val; + flags = client->flags; + flags &= I2C_M_TEN | I2C_CLIENT_PEC; + + if (adap->algo->smbus_xfer) { + /* Retry automatically on arbitration loss */ + orig_jiffies = jiffies; + for (res = 0, try = 0; try <= adap->retries; try++) { + res = adap->algo->smbus_xfer(adap, client->addr, flags, + I2C_SMBUS_WRITE, CPLD_CHANNEL_SELECT_REG, + I2C_SMBUS_BYTE_DATA, &data); + if (res != -EAGAIN) + break; + if (time_after(jiffies, + orig_jiffies + adap->timeout)) + break; + } + } + + return res; +} + +static int as5812_54x_cpld_mux_select_chan(struct i2c_mux_core *muxc, + u32 chan) +{ + struct as5812_54x_cpld_data *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + u8 regval; + int ret = 0; + + regval = chan; + /* Only select the channel if its different from the last channel */ + if (data->last_chan != regval) { + ret = as5812_54x_cpld_mux_reg_write(muxc->parent, client, regval); + data->last_chan = regval; + } + + return ret; +} + +static int as5812_54x_cpld_mux_deselect_mux(struct i2c_mux_core *muxc, + u32 chan) +{ + struct as5812_54x_cpld_data *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + + /* Deselect active channel */ + data->last_chan = chips[data->type].deselectChan; + + return as5812_54x_cpld_mux_reg_write(muxc->parent, client, data->last_chan); +} + +static void as5812_54x_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as5812_54x_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, 0x1); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d", val); +} + +/* + * I2C init/probing/exit functions + */ +static int as5812_54x_cpld_mux_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + int num, force, class; + struct i2c_mux_core *muxc; + struct as5812_54x_cpld_data *data; + int ret = 0; + const struct attribute_group *group = NULL; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + return -ENODEV; + + muxc = i2c_mux_alloc(adap, &client->dev, + chips[id->driver_data].nchans, sizeof(*data), 0, + as5812_54x_cpld_mux_select_chan, as5812_54x_cpld_mux_deselect_mux); + if (!muxc) + return -ENOMEM; + + i2c_set_clientdata(client, muxc); + data = i2c_mux_priv(muxc); + data->client = client; + data->type = id->driver_data; + data->last_chan = chips[data->type].deselectChan; /* force the first selection */ + mutex_init(&data->update_lock); + + /* Now create an adapter for each channel */ + for (num = 0; num < chips[data->type].nchans; num++) { + force = 0; /* dynamic adap number */ + class = 0; /* no class by default */ + + ret = i2c_mux_add_adapter(muxc, force, num, class); + + if (ret) { + dev_err(&client->dev, + "failed to register multiplexed adapter" + " %d as bus %d\n", num, force); + goto add_mux_failed; + } + } + + /* Register sysfs hooks */ + switch (data->type) { + case as5812_54x_cpld1: + group = &as5812_54x_cpld1_group; + break; + case as5812_54x_cpld2: + group = &as5812_54x_cpld2_group; + break; + case as5812_54x_cpld3: + group = &as5812_54x_cpld3_group; + + /* Bring QSFPs out of reset */ + as5812_54x_cpld_write_internal(client, 0x15, 0x3F); + break; + default: + break; + } + + if (group) { + ret = sysfs_create_group(&client->dev.kobj, group); + if (ret) { + goto add_mux_failed; + } + } + + if (chips[data->type].nchans) { + dev_info(&client->dev, + "registered %d multiplexed busses for I2C %s\n", + num, client->name); + } + else { + dev_info(&client->dev, + "device %s registered\n", client->name); + } + + as5812_54x_cpld_add_client(client); + + return 0; + +add_mux_failed: + i2c_mux_del_adapters(muxc); + return ret; +} + +static int as5812_54x_cpld_mux_remove(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as5812_54x_cpld_data *data = i2c_mux_priv(muxc); + const struct attribute_group *group = NULL; + + as5812_54x_cpld_remove_client(client); + + /* Remove sysfs hooks */ + switch (data->type) { + case as5812_54x_cpld1: + group = &as5812_54x_cpld1_group; + break; + case as5812_54x_cpld2: + group = &as5812_54x_cpld2_group; + break; + case as5812_54x_cpld3: + group = &as5812_54x_cpld3_group; + break; + default: + break; + } + + if (group) { + sysfs_remove_group(&client->dev.kobj, group); + } + + i2c_mux_del_adapters(muxc); + + return 0; +} + +static int as5812_54x_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int as5812_54x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +int as5812_54x_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as5812_54x_cpld_read_internal(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as5812_54x_cpld_read); + +int as5812_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as5812_54x_cpld_write_internal(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as5812_54x_cpld_write); + +static struct i2c_driver as5812_54x_cpld_mux_driver = { + .driver = { + .name = "as5812_54x_cpld", + .owner = THIS_MODULE, + }, + .probe = as5812_54x_cpld_mux_probe, + .remove = as5812_54x_cpld_mux_remove, + .id_table = as5812_54x_cpld_mux_id, +}; + +static int __init as5812_54x_cpld_mux_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as5812_54x_cpld_mux_driver); +} + +static void __exit as5812_54x_cpld_mux_exit(void) +{ + i2c_del_driver(&as5812_54x_cpld_mux_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("Accton as5812-54x CPLD driver"); +MODULE_LICENSE("GPL"); + +module_init(as5812_54x_cpld_mux_init); +module_exit(as5812_54x_cpld_mux_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/leds-accton_as5812_54x.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/leds-accton_as5812_54x.c new file mode 100755 index 00000000000..2ebe948612c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/leds-accton_as5812_54x.c @@ -0,0 +1,594 @@ +/* + * A LED driver for the accton_as5812_54x_led + * + * Copyright (C) 2013 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#if 0 +#define DEBUG +#endif + +#include +#include +#include +#include +#include +#include +#include + +extern int as5812_54x_cpld_read (unsigned short cpld_addr, u8 reg); +extern int as5812_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern void led_classdev_unregister(struct led_classdev *led_cdev); +extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); +extern void led_classdev_resume(struct led_classdev *led_cdev); +extern void led_classdev_suspend(struct led_classdev *led_cdev); + +#define DRVNAME "as5812_54x_led" + +struct accton_as5812_54x_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[4]; /* Register value, 0 = LOC/DIAG/FAN LED + 1 = PSU1/PSU2 LED + 2 = FAN1-4 LED + 3 = FAN5-6 LED */ +}; + +static struct accton_as5812_54x_led_data *ledctl = NULL; + +/* LED related data + */ +#define LED_TYPE_PSU1_REG_MASK 0x03 +#define LED_MODE_PSU1_GREEN_MASK 0x02 +#define LED_MODE_PSU1_AMBER_MASK 0x01 +#define LED_MODE_PSU1_OFF_MASK 0x03 +#define LED_MODE_PSU1_AUTO_MASK 0x00 + +#define LED_TYPE_PSU2_REG_MASK 0x0C +#define LED_MODE_PSU2_GREEN_MASK 0x08 +#define LED_MODE_PSU2_AMBER_MASK 0x04 +#define LED_MODE_PSU2_OFF_MASK 0x0C +#define LED_MODE_PSU2_AUTO_MASK 0x00 + +#define LED_TYPE_DIAG_REG_MASK 0x0C +#define LED_MODE_DIAG_GREEN_MASK 0x08 +#define LED_MODE_DIAG_AMBER_MASK 0x04 +#define LED_MODE_DIAG_OFF_MASK 0x0C + +#define LED_TYPE_FAN_REG_MASK 0x03 +#define LED_MODE_FAN_GREEN_MASK 0x02 +#define LED_MODE_FAN_AMBER_MASK 0x01 +#define LED_MODE_FAN_OFF_MASK 0x03 +#define LED_MODE_FAN_AUTO_MASK 0x00 + +#define LED_TYPE_FAN1_REG_MASK 0x03 +#define LED_TYPE_FAN2_REG_MASK 0x0C +#define LED_TYPE_FAN3_REG_MASK 0x30 +#define LED_TYPE_FAN4_REG_MASK 0xC0 +#define LED_TYPE_FAN5_REG_MASK 0x03 +#define LED_TYPE_FAN6_REG_MASK 0x0C + +#define LED_MODE_FANX_GREEN_MASK 0x01 +#define LED_MODE_FANX_RED_MASK 0x02 +#define LED_MODE_FANX_OFF_MASK 0x00 + +#define LED_TYPE_LOC_REG_MASK 0x30 +#define LED_MODE_LOC_ON_MASK 0x00 +#define LED_MODE_LOC_OFF_MASK 0x10 +#define LED_MODE_LOC_BLINK_MASK 0x20 + +static const u8 led_reg[] = { + 0xA, /* LOC/DIAG/FAN LED*/ + 0xB, /* PSU1/PSU2 LED */ + 0x16, /* FAN1-4 LED */ + 0x17, /* FAN4-6 LED */ +}; + +enum led_type { + LED_TYPE_PSU1, + LED_TYPE_PSU2, + LED_TYPE_DIAG, + LED_TYPE_FAN, + LED_TYPE_FAN1, + LED_TYPE_FAN2, + LED_TYPE_FAN3, + LED_TYPE_FAN4, + LED_TYPE_FAN5, + LED_TYPE_LOC +}; + +enum led_light_mode { + LED_MODE_OFF = 0, + LED_MODE_GREEN, + LED_MODE_AMBER, + LED_MODE_RED, + LED_MODE_GREEN_BLINK, + LED_MODE_AMBER_BLINK, + LED_MODE_RED_BLINK, + LED_MODE_AUTO, +}; + +struct led_type_mode { + enum led_type type; + int type_mask; + enum led_light_mode mode; + int mode_mask; +}; + +static struct led_type_mode led_type_mode_data[] = { +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_GREEN, LED_MODE_PSU1_GREEN_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_AMBER, LED_MODE_PSU1_AMBER_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_AUTO, LED_MODE_PSU1_AUTO_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_OFF, LED_MODE_PSU1_OFF_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_GREEN, LED_MODE_PSU2_GREEN_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_AMBER, LED_MODE_PSU2_AMBER_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_AUTO, LED_MODE_PSU2_AUTO_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_OFF, LED_MODE_PSU2_OFF_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_GREEN, LED_MODE_FAN_GREEN_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_AMBER, LED_MODE_FAN_AMBER_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_AUTO, LED_MODE_FAN_AUTO_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_OFF, LED_MODE_FAN_OFF_MASK}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 0}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 0}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 0}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 2}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 2}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 2}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 4}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 4}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 4}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 6}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 6}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 6}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 0}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 0}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 0}, +{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_GREEN, LED_MODE_DIAG_GREEN_MASK}, +{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_AMBER, LED_MODE_DIAG_AMBER_MASK}, +{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_OFF, LED_MODE_DIAG_OFF_MASK}, +{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_AMBER, LED_MODE_LOC_ON_MASK}, +{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_OFF, LED_MODE_LOC_OFF_MASK}, +{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_AMBER_BLINK, LED_MODE_LOC_BLINK_MASK} +}; + + +struct fanx_info_s { + u8 cname; /* device name */ + enum led_type type; + u8 reg_id; /* map to led_reg & reg_val */ +}; + +static struct fanx_info_s fanx_info[] = { + {'1', LED_TYPE_FAN1, 2}, + {'2', LED_TYPE_FAN2, 2}, + {'3', LED_TYPE_FAN3, 2}, + {'4', LED_TYPE_FAN4, 2}, + {'5', LED_TYPE_FAN5, 3} +}; + +static int led_reg_val_to_light_mode(enum led_type type, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + + if (type != led_type_mode_data[i].type) + continue; + + if ((led_type_mode_data[i].type_mask & reg_val) == + led_type_mode_data[i].mode_mask) + { + return led_type_mode_data[i].mode; + } + } + + return 0; +} + +static u8 led_light_mode_to_reg_val(enum led_type type, + enum led_light_mode mode, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + if (type != led_type_mode_data[i].type) + continue; + + if (mode != led_type_mode_data[i].mode) + continue; + + reg_val = led_type_mode_data[i].mode_mask | + (reg_val & (~led_type_mode_data[i].type_mask)); + } + + return reg_val; +} + +static int accton_as5812_54x_led_read_value(u8 reg) +{ + return as5812_54x_cpld_read(0x60, reg); +} + +static int accton_as5812_54x_led_write_value(u8 reg, u8 value) +{ + return as5812_54x_cpld_write(0x60, reg, value); +} + +static void accton_as5812_54x_led_update(void) +{ + mutex_lock(&ledctl->update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as5812_54x_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = accton_as5812_54x_led_read_value(led_reg[i]); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg[i], status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as5812_54x_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + u8 reg, enum led_type type) +{ + int reg_val; + + mutex_lock(&ledctl->update_lock); + + reg_val = accton_as5812_54x_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + accton_as5812_54x_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as5812_54x_led_psu_1_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5812_54x_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_PSU1); +} + +static enum led_brightness accton_as5812_54x_led_psu_1_get(struct led_classdev *cdev) +{ + accton_as5812_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU1, ledctl->reg_val[1]); +} + +static void accton_as5812_54x_led_psu_2_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5812_54x_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_PSU2); +} + +static enum led_brightness accton_as5812_54x_led_psu_2_get(struct led_classdev *cdev) +{ + accton_as5812_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU2, ledctl->reg_val[1]); +} + +static void accton_as5812_54x_led_fan_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5812_54x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_FAN); +} + +static enum led_brightness accton_as5812_54x_led_fan_get(struct led_classdev *cdev) +{ + accton_as5812_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_FAN, ledctl->reg_val[0]); +} + + +static void accton_as5812_54x_led_fanx_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + enum led_type led_type1; + int reg_id; + int i, nsize; + int ncount = sizeof(fanx_info)/sizeof(struct fanx_info_s); + + for(i=0;iname); + + if (led_cdev->name[nsize-1] == fanx_info[i].cname) + { + led_type1 = fanx_info[i].type; + reg_id = fanx_info[i].reg_id; + accton_as5812_54x_led_set(led_cdev, led_light_mode, led_reg[reg_id], led_type1); + return; + } + } +} + + +static enum led_brightness accton_as5812_54x_led_fanx_get(struct led_classdev *cdev) +{ + enum led_type led_type1; + int reg_id; + int i, nsize; + int ncount = sizeof(fanx_info)/sizeof(struct fanx_info_s); + + for(i=0;iname); + + if (cdev->name[nsize-1] == fanx_info[i].cname) + { + led_type1 = fanx_info[i].type; + reg_id = fanx_info[i].reg_id; + accton_as5812_54x_led_update(); + return led_reg_val_to_light_mode(led_type1, ledctl->reg_val[reg_id]); + } + } + + + return led_reg_val_to_light_mode(LED_TYPE_FAN1, ledctl->reg_val[2]); +} + + +static void accton_as5812_54x_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5812_54x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_DIAG); +} + +static enum led_brightness accton_as5812_54x_led_diag_get(struct led_classdev *cdev) +{ + accton_as5812_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void accton_as5812_54x_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5812_54x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_LOC); +} + +static enum led_brightness accton_as5812_54x_led_loc_get(struct led_classdev *cdev) +{ + accton_as5812_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static struct led_classdev accton_as5812_54x_leds[] = { + [LED_TYPE_PSU1] = { + .name = "accton_as5812_54x_led::psu1", + .default_trigger = "unused", + .brightness_set = accton_as5812_54x_led_psu_1_set, + .brightness_get = accton_as5812_54x_led_psu_1_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "accton_as5812_54x_led::psu2", + .default_trigger = "unused", + .brightness_set = accton_as5812_54x_led_psu_2_set, + .brightness_get = accton_as5812_54x_led_psu_2_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN] = { + .name = "accton_as5812_54x_led::fan", + .default_trigger = "unused", + .brightness_set = accton_as5812_54x_led_fan_set, + .brightness_get = accton_as5812_54x_led_fan_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN1] = { + .name = "accton_as5812_54x_led::fan1", + .default_trigger = "unused", + .brightness_set = accton_as5812_54x_led_fanx_set, + .brightness_get = accton_as5812_54x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN2] = { + .name = "accton_as5812_54x_led::fan2", + .default_trigger = "unused", + .brightness_set = accton_as5812_54x_led_fanx_set, + .brightness_get = accton_as5812_54x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN3] = { + .name = "accton_as5812_54x_led::fan3", + .default_trigger = "unused", + .brightness_set = accton_as5812_54x_led_fanx_set, + .brightness_get = accton_as5812_54x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN4] = { + .name = "accton_as5812_54x_led::fan4", + .default_trigger = "unused", + .brightness_set = accton_as5812_54x_led_fanx_set, + .brightness_get = accton_as5812_54x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN5] = { + .name = "accton_as5812_54x_led::fan5", + .default_trigger = "unused", + .brightness_set = accton_as5812_54x_led_fanx_set, + .brightness_get = accton_as5812_54x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_DIAG] = { + .name = "accton_as5812_54x_led::diag", + .default_trigger = "unused", + .brightness_set = accton_as5812_54x_led_diag_set, + .brightness_get = accton_as5812_54x_led_diag_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_LOC] = { + .name = "accton_as5812_54x_led::loc", + .default_trigger = "unused", + .brightness_set = accton_as5812_54x_led_loc_set, + .brightness_get = accton_as5812_54x_led_loc_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, +}; + +static int accton_as5812_54x_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as5812_54x_leds); i++) { + led_classdev_suspend(&accton_as5812_54x_leds[i]); + } + + return 0; +} + +static int accton_as5812_54x_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as5812_54x_leds); i++) { + led_classdev_resume(&accton_as5812_54x_leds[i]); + } + + return 0; +} + +static int accton_as5812_54x_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(accton_as5812_54x_leds); i++) { + ret = led_classdev_register(&pdev->dev, &accton_as5812_54x_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(accton_as5812_54x_leds)){ + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&accton_as5812_54x_leds[i]); + } + } + + return ret; +} + +static int accton_as5812_54x_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(accton_as5812_54x_leds); i++) { + led_classdev_unregister(&accton_as5812_54x_leds[i]); + } + + return 0; +} + +static struct platform_driver accton_as5812_54x_led_driver = { + .probe = accton_as5812_54x_led_probe, + .remove = accton_as5812_54x_led_remove, + .suspend = accton_as5812_54x_led_suspend, + .resume = accton_as5812_54x_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as5812_54x_led_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as5812_54x_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct accton_as5812_54x_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as5812_54x_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&accton_as5812_54x_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as5812_54x_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&accton_as5812_54x_led_driver); + kfree(ledctl); +} + +module_init(accton_as5812_54x_led_init); +module_exit(accton_as5812_54x_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as5812_54x_led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/ym2651y.c new file mode 100755 index 00000000000..519530387e2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/ym2651y.c @@ -0,0 +1,683 @@ +/* + * An hwmon driver for the 3Y Power YM-2651Y Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#if 0 +#define DEBUG +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_FAN_DUTY_CYCLE 100 + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +enum chips { + YM2651, + YM2401, +}; + +/* Each client has this additional data + */ +struct ym2651y_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 chip; /* chip id */ + u8 capability; /* Register value */ + u16 status_word; /* Register value */ + u8 fan_fault; /* Register value */ + u8 over_temp; /* Register value */ + u16 v_out; /* Register value */ + u16 i_out; /* Register value */ + u16 p_out; /* Register value */ + u8 vout_mode; /* Register value */ + u16 temp; /* Register value */ + u16 fan_speed; /* Register value */ + u16 fan_duty_cycle[2]; /* Register value */ + u8 fan_dir[5]; /* Register value */ + u8 pmbus_revision; /* Register value */ + u8 mfr_id[10]; /* Register value */ + u8 mfr_model[16]; /* Register value */ + u8 mfr_revsion[3]; /* Register value */ + u16 mfr_vin_min; /* Register value */ + u16 mfr_vin_max; /* Register value */ + u16 mfr_iin_max; /* Register value */ + u16 mfr_iout_max; /* Register value */ + u16 mfr_pin_max; /* Register value */ + u16 mfr_pout_max; /* Register value */ + u16 mfr_vout_min; /* Register value */ + u16 mfr_vout_max; /* Register value */ +}; + +static ssize_t show_byte(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_word(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_vout(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_over_temp(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_ascii(struct device *dev, struct device_attribute *da, + char *buf); +static struct ym2651y_data *ym2651y_update_device(struct device *dev); +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static int ym2651y_write_word(struct i2c_client *client, u8 reg, u16 value); + +enum ym2651y_sysfs_attributes { + PSU_POWER_ON = 0, + PSU_TEMP_FAULT, + PSU_POWER_GOOD, + PSU_FAN1_FAULT, + PSU_FAN_DIRECTION, + PSU_OVER_TEMP, + PSU_V_OUT, + PSU_I_OUT, + PSU_P_OUT, + PSU_TEMP1_INPUT, + PSU_FAN1_SPEED, + PSU_FAN1_DUTY_CYCLE, + PSU_PMBUS_REVISION, + PSU_MFR_ID, + PSU_MFR_MODEL, + PSU_MFR_REVISION, + PSU_MFR_VIN_MIN, + PSU_MFR_VIN_MAX, + PSU_MFR_VOUT_MIN, + PSU_MFR_VOUT_MAX, + PSU_MFR_IIN_MAX, + PSU_MFR_IOUT_MAX, + PSU_MFR_PIN_MAX, + PSU_MFR_POUT_MAX +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_power_on, S_IRUGO, show_word, NULL, PSU_POWER_ON); +static SENSOR_DEVICE_ATTR(psu_temp_fault, S_IRUGO, show_word, NULL, PSU_TEMP_FAULT); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_word, NULL, PSU_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(psu_over_temp, S_IRUGO, show_over_temp, NULL, PSU_OVER_TEMP); +static SENSOR_DEVICE_ATTR(psu_v_out, S_IRUGO, show_vout, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(psu_i_out, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(psu_p_out, S_IRUGO, show_linear, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(psu_temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, show_linear, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(psu_fan_dir, S_IRUGO, show_ascii, NULL, PSU_FAN_DIRECTION); +static SENSOR_DEVICE_ATTR(psu_pmbus_revision,S_IRUGO, show_byte, NULL, PSU_PMBUS_REVISION); +static SENSOR_DEVICE_ATTR(psu_mfr_id, S_IRUGO, show_ascii, NULL, PSU_MFR_ID); +static SENSOR_DEVICE_ATTR(psu_mfr_model, S_IRUGO, show_ascii, NULL, PSU_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu_mfr_revision, S_IRUGO, show_ascii, NULL, PSU_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu_mfr_vin_min, S_IRUGO, show_linear, NULL, PSU_MFR_VIN_MIN); +static SENSOR_DEVICE_ATTR(psu_mfr_vin_max, S_IRUGO, show_linear, NULL, PSU_MFR_VIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_vout_min, S_IRUGO, show_linear, NULL, PSU_MFR_VOUT_MIN); +static SENSOR_DEVICE_ATTR(psu_mfr_vout_max, S_IRUGO, show_linear, NULL, PSU_MFR_VOUT_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_iin_max, S_IRUGO, show_linear, NULL, PSU_MFR_IIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_iout_max, S_IRUGO, show_linear, NULL, PSU_MFR_IOUT_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_pin_max, S_IRUGO, show_linear, NULL, PSU_MFR_PIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_pout_max, S_IRUGO, show_linear, NULL, PSU_MFR_POUT_MAX); + +static struct attribute *ym2651y_attributes[] = { + &sensor_dev_attr_psu_power_on.dev_attr.attr, + &sensor_dev_attr_psu_temp_fault.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, + &sensor_dev_attr_psu_over_temp.dev_attr.attr, + &sensor_dev_attr_psu_v_out.dev_attr.attr, + &sensor_dev_attr_psu_i_out.dev_attr.attr, + &sensor_dev_attr_psu_p_out.dev_attr.attr, + &sensor_dev_attr_psu_temp1_input.dev_attr.attr, + &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, + &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, + &sensor_dev_attr_psu_fan_dir.dev_attr.attr, + &sensor_dev_attr_psu_pmbus_revision.dev_attr.attr, + &sensor_dev_attr_psu_mfr_id.dev_attr.attr, + &sensor_dev_attr_psu_mfr_model.dev_attr.attr, + &sensor_dev_attr_psu_mfr_revision.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vin_min.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_pout_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_iin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_pin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vout_min.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vout_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_iout_max.dev_attr.attr, + NULL +}; + +static ssize_t show_byte(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + + if (!data->valid) { + return 0; + } + + return (attr->index == PSU_PMBUS_REVISION) ? sprintf(buf, "%d\n", data->pmbus_revision) : + sprintf(buf, "0\n"); +} + +static ssize_t show_word(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + u16 status = 0; + + if (!data->valid) { + return 0; + } + + switch (attr->index) { + case PSU_POWER_ON: /* psu_power_on, low byte bit 6 of status_word, 0=>ON, 1=>OFF */ + status = (data->status_word & 0x40) ? 0 : 1; + break; + case PSU_TEMP_FAULT: /* psu_temp_fault, low byte bit 2 of status_word, 0=>Normal, 1=>temp fault */ + status = (data->status_word & 0x4) >> 2; + break; + case PSU_POWER_GOOD: /* psu_power_good, high byte bit 3 of status_word, 0=>OK, 1=>FAIL */ + status = (data->status_word & 0x800) ? 0 : 1; + break; + } + + return sprintf(buf, "%d\n", status); +} + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct ym2651y_data *data = i2c_get_clientdata(client); + int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; + long speed; + int error; + + error = kstrtol(buf, 10, &speed); + if (error) + return error; + + if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) + return -EINVAL; + + mutex_lock(&data->update_lock); + data->fan_duty_cycle[nr] = speed; + ym2651y_write_word(client, 0x3B + nr, data->fan_duty_cycle[nr]); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + + u16 value = 0; + int exponent, mantissa; + int multiplier = 1000; + + if (!data->valid) { + return 0; + } + + switch (attr->index) { + case PSU_V_OUT: + value = data->v_out; + break; + case PSU_I_OUT: + value = data->i_out; + break; + case PSU_P_OUT: + value = data->p_out; + break; + case PSU_TEMP1_INPUT: + value = data->temp; + break; + case PSU_FAN1_SPEED: + value = data->fan_speed; + multiplier = 1; + break; + case PSU_FAN1_DUTY_CYCLE: + value = data->fan_duty_cycle[0]; + multiplier = 1; + break; + case PSU_MFR_VIN_MIN: + value = data->mfr_vin_min; + break; + case PSU_MFR_VIN_MAX: + value = data->mfr_vin_max; + break; + case PSU_MFR_VOUT_MIN: + value = data->mfr_vout_min; + break; + case PSU_MFR_VOUT_MAX: + value = data->mfr_vout_max; + break; + case PSU_MFR_PIN_MAX: + value = data->mfr_pin_max; + break; + case PSU_MFR_POUT_MAX: + value = data->mfr_pout_max; + break; + case PSU_MFR_IOUT_MAX: + value = data->mfr_iout_max; + break; + case PSU_MFR_IIN_MAX: + value = data->mfr_iin_max; + break; + } + + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + + return (exponent >= 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + u8 shift; + + if (!data->valid) { + return 0; + } + + shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; + + return sprintf(buf, "%d\n", data->fan_fault >> shift); +} + +static ssize_t show_over_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct ym2651y_data *data = ym2651y_update_device(dev); + + if (!data->valid) { + return 0; + } + + return sprintf(buf, "%d\n", data->over_temp >> 7); +} + +static ssize_t show_ascii(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + u8 *ptr = NULL; + + if (!data->valid) { + return 0; + } + + switch (attr->index) { + case PSU_FAN_DIRECTION: /* psu_fan_dir */ + ptr = data->fan_dir + 1; /* Skip the first byte since it is the length of string. */ + break; + case PSU_MFR_ID: /* psu_mfr_id */ + ptr = data->mfr_id + 1; /* The first byte is the count byte of string. */; + break; + case PSU_MFR_MODEL: /* psu_mfr_model */ + ptr = data->mfr_model + 1; /* The first byte is the count byte of string. */ + break; + case PSU_MFR_REVISION: /* psu_mfr_revision */ + ptr = data->mfr_revsion + 1; /* The first byte is the count byte of string. */ + break; + default: + return 0; + } + + return sprintf(buf, "%s\n", ptr); +} + +static ssize_t show_vout_by_mode(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct ym2651y_data *data = ym2651y_update_device(dev); + int exponent, mantissa; + int multiplier = 1000; + + if (!data->valid) { + return 0; + } + + exponent = two_complement_to_int(data->vout_mode, 5, 0x1f); + mantissa = data->v_out; + + return (exponent > 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t show_vout(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct ym2651y_data *data = i2c_get_clientdata(client); + + if (data->chip == YM2401) { + return show_vout_by_mode(dev, da, buf); + } + + return show_linear(dev, da, buf); +} + +static const struct attribute_group ym2651y_group = { + .attrs = ym2651y_attributes, +}; + +static int ym2651y_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct ym2651y_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct ym2651y_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->chip = dev_id->driver_data; + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &ym2651y_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &ym2651y_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int ym2651y_remove(struct i2c_client *client) +{ + struct ym2651y_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &ym2651y_group); + kfree(data); + + return 0; +} + +static const struct i2c_device_id ym2651y_id[] = { + { "ym2651", YM2651 }, + { "ym2401", YM2401 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, ym2651y_id); + +static struct i2c_driver ym2651y_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "ym2651", + }, + .probe = ym2651y_probe, + .remove = ym2651y_remove, + .id_table = ym2651y_id, + .address_list = normal_i2c, +}; + +static int ym2651y_read_byte(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int ym2651y_read_word(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_word_data(client, reg); +} + +static int ym2651y_write_word(struct i2c_client *client, u8 reg, u16 value) +{ + return i2c_smbus_write_word_data(client, reg, value); +} + +static int ym2651y_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + result = 0; + +abort: + return result; +} + +struct reg_data_byte { + u8 reg; + u8 *value; +}; + +struct reg_data_word { + u8 reg; + u16 *value; +}; + +static struct ym2651y_data *ym2651y_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct ym2651y_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int i, status, length; + u8 command, buf; + struct reg_data_byte regs_byte[] = { {0x19, &data->capability}, + {0x20, &data->vout_mode}, + {0x7d, &data->over_temp}, + {0x81, &data->fan_fault}, + {0x98, &data->pmbus_revision}}; + struct reg_data_word regs_word[] = { {0x79, &data->status_word}, + {0x8b, &data->v_out}, + {0x8c, &data->i_out}, + {0x96, &data->p_out}, + {0x8d, &data->temp}, + {0x3b, &(data->fan_duty_cycle[0])}, + {0x3c, &(data->fan_duty_cycle[1])}, + {0x90, &data->fan_speed}, + {0xa0, &data->mfr_vin_min}, + {0xa1, &data->mfr_vin_max}, + {0xa2, &data->mfr_iin_max}, + {0xa3, &data->mfr_pin_max}, + {0xa4, &data->mfr_vout_min}, + {0xa5, &data->mfr_vout_max}, + {0xa6, &data->mfr_iout_max}, + {0xa7, &data->mfr_pout_max}}; + + dev_dbg(&client->dev, "Starting ym2651 update\n"); + data->valid = 0; + + /* Read byte data */ + for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { + status = ym2651y_read_byte(client, regs_byte[i].reg); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_byte[i].reg, status); + goto exit; + } + else { + *(regs_byte[i].value) = status; + } + } + + /* Read word data */ + for (i = 0; i < ARRAY_SIZE(regs_word); i++) { + status = ym2651y_read_word(client, regs_word[i].reg); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_word[i].reg, status); + goto exit; + } + else { + *(regs_word[i].value) = status; + } + } + + /* Read fan_direction */ + command = 0xC3; + status = ym2651y_read_block(client, command, data->fan_dir, + ARRAY_SIZE(data->fan_dir)-1); + data->fan_dir[ARRAY_SIZE(data->fan_dir)-1] = '\0'; + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + goto exit; + } + + /* Read mfr_id */ + command = 0x99; + status = ym2651y_read_block(client, command, data->mfr_id, + ARRAY_SIZE(data->mfr_id)-1); + data->mfr_id[ARRAY_SIZE(data->mfr_id)-1] = '\0'; + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + goto exit; + } + + /* Read mfr_model */ + command = 0x9a; + length = 1; + + /* Read first byte to determine the length of data */ + status = ym2651y_read_block(client, command, &buf, length); + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + goto exit; + } + + status = ym2651y_read_block(client, command, data->mfr_model, buf+1); + data->mfr_model[buf+1] = '\0'; + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + goto exit; + } + + /* Read mfr_revsion */ + command = 0x9b; + status = ym2651y_read_block(client, command, data->mfr_revsion, + ARRAY_SIZE(data->mfr_revsion)-1); + data->mfr_revsion[ARRAY_SIZE(data->mfr_revsion)-1] = '\0'; + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + goto exit; + } + + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init ym2651y_init(void) +{ + return i2c_add_driver(&ym2651y_driver); +} + +static void __exit ym2651y_exit(void) +{ + i2c_del_driver(&ym2651y_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("3Y Power YM-2651Y driver"); +MODULE_LICENSE("GPL"); + +module_init(ym2651y_init); +module_exit(ym2651y_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/service/as5812-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/service/as5812-platform-monitor.service new file mode 100755 index 00000000000..91c9adb01cc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/service/as5812-platform-monitor.service @@ -0,0 +1,17 @@ +[Unit] +Description=Accton AS5812-54X Platform Monitoring service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +Type=simple +ExecStartPre=/usr/local/bin/accton_as5812_util.py install +ExecStart=/usr/local/bin/accton_as5812_monitor.py +#RemainAfterExit=yes + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/setup.py new file mode 100755 index 00000000000..aa8615fd8a8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as5812_54x', + version='1.0', + description='Module to initialize Accton AS5812-54X platforms', + + packages=['as5812_54x'], + package_dir={'as5812_54x': 'as5812-54x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/utils/README b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/utils/README new file mode 100755 index 00000000000..4ce43d9407d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/utils/README @@ -0,0 +1,117 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +Contents of this package: + patch - files under patch/ is for kernel and ONIE installer + for the kernel: + config-accton-as5812_54x.patch + for kernel configuration. + driver-i2c-muxes-pca954x-always-deselect.patch + for i2c_mux deselects after transaction. + driver-patches-for-accton-as5812-fan-psu-cpld.patch + for as5812's fan/psu/cpld/led/sfp drivers. + for ONIE: + onie_installer-accton-AS5812-54X.patch + for console port setting and copy util script o rootfs. + module - Contains source code of as5812 kernel driver modules. + +The late Sonic building scripts, pushed @Dec 5 2016, will automatically +create a docker container and run building process under it. +User is not necessary to handle docker environment creation. + +1. Download sonic-buildimage environment. + - Run "git clone https://github.com/Azure/sonic-buildimage". + - cd to sonic-buildimage and run "git submodule update --init --recursive". +2. Build kernel + - cd ./src/sonic-linux-kernel + - Copy patches and series from patch/kernel of this release to + sonic-linux-kernel/patch. + - Build kernel by "make". + - The built kernel package, linux-image-3.16.0-5-amd64_3.16.51-3+deb8u1_amd64.deb + , is generated. +3. Build installer + - Change directory back to sonic-buildimage/. + - Get onie_installer-accton-AS5812-54X.patch" from patch/installer. + - Change setting for AS5812-54X by patching build_image.sh. + "patch -p1 < onie_installer-accton-AS5812-54X.patch" + !!NOTICE, patching onie_installer-accton-AS5812-54X.patch comments out the + "git status" checking at build_image.sh. + - The account and password of installed OS can be given at rules/config. + The default user and password are "admin" & "YourPaSsWoRd" respectively. + - Run "make configure PLATFORM=broadcom" + - Copy the built kernel debian package to target/debs/. + The file is linux-image-3.16.0-5-amd64_*_amd64.deb under directory + src/sonic-linux-kernel/. + - Run "make target/sonic-generic.bin" + - Get the installer, target/sonic-generic.bin, to target machine and install. + +All Linux kernel code is licensed under the GPLv1. All other code is +licensed under the GPLv3. Please see the LICENSE file for copies of +both licenses. + +The code for integacting with Accton AS5812-54X has 2 parts, +kernel drivers and operational script. +The kernel drivers of peripherals are under module/ directory. +1. These drivers are patched into kernel by + driver-patches-for-accton-as5812-fan-psu-cpld.patch + Or you can build the driver under module/ by setting environment variable, + KERNEL_SRC, to proper linux built directory and run make. + It may be sonic-linux-kernel/linux-3.*/debian/build/build_amd64_none_amd64/. +2. A operational script, accton_as5812_util.py, for device initializatian and + peripheral accessing should be installed at /usr/bin. + This script is generated by onie_installer-accton-AS5812-54X.patch. + It's done by patching onie_installer-accton-AS5812-54X.patch at build-image. + Run "accton_as5812_util.py install" to install drivers. + +To initialize the system, run "accton_as5812_util.py install". +To clean up the drivers & devices, run "accton_as5812_util.py clean". +To dump information of sensors, run "accton_as5812_util.py show". +To dump SFP EEPROM, run "accton_as5812_util.py sff". +To set fan speed, run "accton_as5812_util.py set fan". +To enable/disable SFP emission, run "accton_as5812_util.py set sfp". +To set system LEDs' color, run "accton_as5812_util.py set led" +For more information, run "accton_as5812_util.py --help". + +==================================================================== +Besides applying accton_as5812_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +System LED: + There are 5 system LEDs at the lower-left corner of front panel. + They are loc, diag, fan, ps1, and ps2. + The sysfs interface color mappings are as follows: + Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + But not all colors are available for each LED. + +Fan Control: + There are 10 fans inside 5 fan modules. + All fans share 1 duty setting, ranged from 0~100. + +Thermal sensers: + 3 temperature sensors are controlled by the lm75 kernel modules. + +PSUs: + There 2 power supplies slot at the left/right side of the back. + Once if a PSU is not plugged, the status of it is shown failed. + +There are 48 SFP+ and 6 QSFP modules are equipped. +Before operating on PSU and QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/utils/accton_as5812_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/utils/accton_as5812_monitor.py new file mode 100755 index 00000000000..8c7303efaa7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/utils/accton_as5812_monitor.py @@ -0,0 +1,213 @@ +#!/usr/bin/env python +# +# Copyright (C) 2019 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 05/08/2019: Roy Lee, changed for as5812-54x. +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + import signal + from tabulate import tabulate + from as5812_54x.fanutil import FanUtil + from as5812_54x.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = 'accton_as5812_monitor' +DUTY_MAX = 100 + +global log_file +global log_console + +# Make a class we can use to capture stdout and sterr in the log +class accton_as5812_monitor(object): + # static temp var + _ori_temp = 0 + _new_perc = 0 + + llog = logging.getLogger("["+FUNCTION_NAME+"]") + def __init__(self, log_console, log_file): + """Needs a logger and a logger level.""" + + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + sys_handler.setLevel(logging.WARNING) #only fatal for syslog + self.llog.addHandler(sys_handler) + self.llog.setLevel(logging.DEBUG) + + if log_file: + fh = logging.FileHandler(log_file) + fh.setLevel(logging.INFO) + formatter = logging.Formatter('%(asctime)-15s %(name)s %(message)s') + fh.setFormatter(formatter) + self.llog.addHandler(fh) + + # set up logging to console + if log_console: + console = logging.StreamHandler() + console.setLevel(logging.DEBUG) #For debugging + formatter = logging.Formatter('%(asctime)-15s %(name)s %(message)s') + console.setFormatter(formatter) + self.llog.addHandler(console) + + def manage_fans(self): + FAN_LEV1_UP_TEMP = 57700 # temperature + FAN_LEV1_DOWN_TEMP = 0 # unused + FAN_LEV1_SPEED_PERC = DUTY_MAX # percentage*/ + + FAN_LEV2_UP_TEMP = 53000 + FAN_LEV2_DOWN_TEMP = 52700 + FAN_LEV2_SPEED_PERC = 80 + + FAN_LEV3_UP_TEMP = 49500 + FAN_LEV3_DOWN_TEMP = 47700 + FAN_LEV3_SPEED_PERC = 65 + + FAN_LEV4_UP_TEMP = 0 # unused + FAN_LEV4_DOWN_TEMP = 42700 + FAN_LEV4_SPEED_PERC = 40 + + + thermal = ThermalUtil() + fan = FanUtil() + + temp1 = thermal.get_thermal_1_val() + if temp1 is None: + return False + + temp2 = thermal.get_thermal_2_val() + if temp2 is None: + return False + + new_temp = (temp1 + temp2) / 2 + + for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): + fan_stat = fan.get_fan_status(x) + if fan_stat is None or fan_stat is False: + self._new_perc = FAN_LEV1_SPEED_PERC + self.llog.error('SET new_perc to %d (FAN fault. fan_num:%d)', self._new_perc, x) + break + else: + self.llog.debug('fan_stat is True (fan_num:%d)', x) + + if fan_stat is not None and fan_stat is not False: + diff = new_temp - self._ori_temp + if diff == 0: + self.llog.debug('RETURN. THERMAL temp not changed. %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + return True + else: + if diff >= 0: + is_up = True + self.llog.debug('THERMAL temp UP %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + else: + is_up = False + self.llog.debug('THERMAL temp DOWN %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + + if is_up is True: + if new_temp >= FAN_LEV1_UP_TEMP: + self._new_perc = FAN_LEV1_SPEED_PERC + elif new_temp >= FAN_LEV2_UP_TEMP: + self._new_perc = FAN_LEV2_SPEED_PERC + elif new_temp >= FAN_LEV3_UP_TEMP: + self._new_perc = FAN_LEV3_SPEED_PERC + else: + self._new_perc = FAN_LEV4_SPEED_PERC + self.llog.debug('SET. FAN_SPEED as %d (new THERMAL temp:%d)', self._new_perc, new_temp) + else: + if new_temp <= FAN_LEV4_DOWN_TEMP: + self._new_perc = FAN_LEV4_SPEED_PERC + elif new_temp <= FAN_LEV3_DOWN_TEMP: + self._new_perc = FAN_LEV3_SPEED_PERC + elif new_temp <= FAN_LEV2_DOWN_TEMP: + self._new_perc = FAN_LEV2_SPEED_PERC + else: + self._new_perc = FAN_LEV1_SPEED_PERC + self.llog.debug('SET. FAN_SPEED as %d (new THERMAL temp:%d)', self._new_perc, new_temp) + + cur_perc = fan.get_fan_duty_cycle(fan.get_idx_fan_start()) + if cur_perc == self._new_perc: + self.llog.debug('RETURN. FAN speed not changed. %d / %d (new_perc / ori_perc)', self._new_perc, cur_perc) + return True + + set_stat = fan.set_fan_duty_cycle(fan.get_idx_fan_start(), self._new_perc) + if set_stat is True: + self.llog.debug('PASS. set_fan_duty_cycle (%d)', self._new_perc) + else: + self.llog.error('FAIL. set_fan_duty_cycle (%d)', self._new_perc) + + self.llog.debug('GET. ori_perc is %d. ori_temp is %d', cur_perc, self._ori_temp) + self._ori_temp = new_temp + self.llog.info('UPDATE. ori_perc to %d. ori_temp to %d', cur_perc, self._ori_temp) + + return True + +def sig_handler(signum, frame): + fan = FanUtil() + logging.critical('Cause signal %d, set fan speed max.', signum) + fan.set_fan_duty_cycle(fan.get_idx_fan_start(), DUTY_MAX) + sys.exit(0) + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_console = 0 + log_file = "" + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl') + except getopt.GetoptError: + print 'Usage: %s [-d] [-l]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l]' % sys.argv[0] + return 0 + elif opt in ('-d'): + log_console = 1 + elif opt in ('-l'): + log_file = '%s.log' % sys.argv[0] + + signal.signal(signal.SIGINT, sig_handler) + signal.signal(signal.SIGTERM, sig_handler) + monitor = accton_as5812_monitor(log_console, log_file) + + #time.sleep(100) + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(10) + + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/utils/accton_as5812_util.py b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/utils/accton_as5812_util.py new file mode 100755 index 00000000000..eb1b22f3ef0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/utils/accton_as5812_util.py @@ -0,0 +1,694 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +import pickle +from collections import namedtuple + +PROJECT_NAME = 'as5812_54x' +version = '0.2.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan1':1, 'fan2':1,'fan3':1,'fan4':1,'fan5':1,'thermal':3, 'psu':2, 'sfp':54} + + +led_prefix ='/sys/devices/platform/as5812_54x_led/leds/accton_'+PROJECT_NAME+'_led::' +fan_prefix ='/sys/devices/platform/as5812_54x_' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2'], + 'fan1': ['fan'], + 'fan2': ['fan'], + 'fan3': ['fan'], + 'fan4': ['fan'], + 'fan5': ['fan'], + } +hwmon_nodes = {'led': ['brightness'] , + 'fan1': ['fan1_duty_cycle_percentage', 'fan1_fault', 'fan1_speed_rpm', 'fan1_direction', 'fanr1_fault', 'fanr1_speed_rpm'], + 'fan2': ['fan2_duty_cycle_percentage','fan2_fault', 'fan2_speed_rpm', 'fan2_direction', 'fanr2_fault', 'fanr2_speed_rpm'], + 'fan3': ['fan3_duty_cycle_percentage','fan3_fault', 'fan3_speed_rpm', 'fan3_direction', 'fanr3_fault', 'fanr3_speed_rpm'], + 'fan4': ['fan4_duty_cycle_percentage','fan4_fault', 'fan4_speed_rpm', 'fan4_direction', 'fanr4_fault', 'fanr4_speed_rpm'], + 'fan5': ['fan5_duty_cycle_percentage','fan5_fault', 'fan5_speed_rpm', 'fan5_direction', 'fanr5_fault', 'fanr5_speed_rpm'], + } +hwmon_prefix ={'led': led_prefix, + 'fan1': fan_prefix, + 'fan2': fan_prefix, + 'fan3': fan_prefix, + 'fan4': fan_prefix, + 'fan5': fan_prefix, + } + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'thermal': ['61-0048','62-0049', '63-004a'] , + 'psu': ['57-0050','58-0053'], + 'sfp': ['-0050']} +i2c_nodes = { + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['sfp_is_present ', 'sfp_tx_disable']} + +QSFP_START = 48 +I2C_BUS_ORDER = -1 + +sfp_map = [2, 3, 4, 5, 6, 7, 8, 9, 10, + 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, + 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, + 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, + 41, 42, 43, 44, 45, 46, 47, 48, 49, + 50, 52, 54, 51, 53, 55] + +port_cpld_path = [ "/sys/bus/i2c/devices/0-0061/" + ,'/sys/bus/i2c/devices/0-0062/'] + +mknod =[ +'echo as5812_54x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo as5812_54x_cpld2 0x61 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo as5812_54x_cpld3 0x62 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device', + +# PSU-1 +'echo as5812_54x_psu1 0x38 > /sys/bus/i2c/devices/i2c-57/new_device', +'echo cpr_4011_4mxx 0x3c > /sys/bus/i2c/devices/i2c-57/new_device', +'echo as5812_54x_psu1 0x50 > /sys/bus/i2c/devices/i2c-57/new_device', + +# PSU-2 +'echo as5812_54x_psu2 0x3b > /sys/bus/i2c/devices/i2c-58/new_device', +'echo cpr_4011_4mxx 0x3f > /sys/bus/i2c/devices/i2c-58/new_device', +'echo as5812_54x_psu2 0x53 > /sys/bus/i2c/devices/i2c-58/new_device', + +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-61/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-62/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-63/new_device', + +#EERPOM +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-1/new_device', +] + +mknod2 =[ +'echo as5812_54x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo as5812_54x_cpld2 0x61 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo as5812_54x_cpld3 0x62 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-0/new_device', + +# PSU-1 +'echo as5812_54x_psu1 0x38 > /sys/bus/i2c/devices/i2c-57/new_device', +'echo cpr_4011_4mxx 0x3c > /sys/bus/i2c/devices/i2c-57/new_device', +'echo as5812_54x_psu1 0x50 > /sys/bus/i2c/devices/i2c-57/new_device', + +# PSU-2 +'echo as5812_54x_psu2 0x3b > /sys/bus/i2c/devices/i2c-58/new_device', +'echo cpr_4011_4mxx 0x3f > /sys/bus/i2c/devices/i2c-58/new_device', +'echo as5812_54x_psu2 0x53 > /sys/bus/i2c/devices/i2c-58/new_device', + +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-61/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-62/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-63/new_device', + +#EERPOM +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-0/new_device', +] + +FORCE = 0 +logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-48 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-54 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ACCTON DBG]: "+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status = 1 + output = "" + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log ("cmd:" + cmd) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_inserted(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + + + +kos = [ +'depmod -ae', +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe optoe', +'modprobe i2c-mux-accton_as5812_54x_cpld', +'modprobe cpr_4011_4mxx', +'modprobe ym2651y', +'modprobe accton_as5812_54x_fan', +'modprobe leds-accton_as5812_54x', +'modprobe accton_as5812_54x_psu'] + +def driver_install(): + global FORCE + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + #remove parameter if any + rm = kos[-(i+1)] + lst = rm.split(" ") + if len(lst) > 2: + del(lst[2:]) + rm = " ".join(lst) + + #Change to removing commands + rm = rm.replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + + + +def i2c_order_check(): + # i2c bus 0 and 1 might be installed in different order. + # Here check if 0x70 is exist @ i2c-0 + tmp = "echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device" + status, output = log_os_system(tmp, 0) + if not device_exist(): + order = 1 + else: + order = 0 + tmp = "echo 0x70 > /sys/bus/i2c/devices/i2c-1/delete_device" + status, output = log_os_system(tmp, 0) + return order + +def update_i2c_order(): + global I2C_BUS_ORDER + + order = i2c_order_check() + pickle.dump(order, open("/tmp/accton_util.p", "wb")) # save it + I2C_BUS_ORDER = order + print "[%s]Detected I2C_BUS_ORDER:%d" % (os.path.basename(__file__), I2C_BUS_ORDER) + +def get_i2c_order(): + global I2C_BUS_ORDER + if I2C_BUS_ORDER < 0: + if os.path.exists("/tmp/accton_util.p"): + I2C_BUS_ORDER = pickle.load(open("/tmp/accton_util.p", "rb")) + else: + update_i2c_order() + +def device_install(): + global FORCE + global I2C_BUS_ORDER + + update_i2c_order() + order = I2C_BUS_ORDER + # if 0x76 is not exist @i2c-0, use reversed bus order + if order: + for i in range(0,len(mknod2)): + #for pca954x need times to built new i2c buses + if mknod2[i].find('pca954') != -1: + time.sleep(2) + + status, output = log_os_system(mknod2[i], 1) + if status: + print output + if FORCE == 0: + return status + else: + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(2) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(0,len(sfp_map)): + if i < QSFP_START: + status, output =log_os_system("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + else: + status, output =log_os_system("echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + status, output =log_os_system("echo port"+str(i)+" > /sys/bus/i2c/devices/"+str(sfp_map[i])+"-0050/port_name", 1) + if status: + print output + if FORCE == 0: + return status + + return + +def device_uninstall(): + global FORCE + global I2C_BUS_ORDER + + get_i2c_order() + order = I2C_BUS_ORDER + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + if order == 0: + nodelist = mknod + else: + nodelist = mknod2 + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_inserted() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_inserted() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_inserted()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + + +def get_cpld_path(index): + global I2C_BUS_ORDER + + if I2C_BUS_ORDER < 0: + get_i2c_order() + + if I2C_BUS_ORDER !=0 : + return port_cpld_path[index].replace("0-", "1-") + else: + return port_cpld_path[index] + +def cpld_path_of_port(port_index): + if port_index < 1 and port_index > DEVICE_NO['sfp']: + return None + if port_index < 25: + return get_cpld_path(0) + else: + return get_cpld_path(1) + +def get_path_sfp_tx_dis(port_index): + cpld_p = cpld_path_of_port(port_index) + if cpld_p == None: + return False, '' + else: + dev = cpld_p+"module_tx_disable_"+str(port_index) + return True, dev + +def get_path_sfp_presence(port_index): + cpld_p = cpld_path_of_port(port_index) + if cpld_p == None: + return False, '' + else: + dev = cpld_p+"module_present_"+str(port_index) + return True, dev + + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan1'] ['fan11'][0] + node = node.replace(node.split("/")[-1], 'fan1_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + #if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + #There no tx_disable for QSFP port + if int(args[1]) > QSFP_START or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + port_index = int(args[1]) + ret, dev = get_path_sfp_tx_dis(port_index) + if ret == False: + return False + else: + ret, log = log_os_system("echo "+args[2]+" >"+ dev, 1) + return ret + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def print_1_device_traversal(i, j, k): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + return func+"="+log+" " + else: + return func+"="+"X"+" " + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + if i == 'sfp': + port_index = int(filter(str.isdigit, j)) + for k in (ALL_DEVICE[i][j]): + if k.find('tx_disable')!= -1: + ret, k = get_path_sfp_tx_dis(port_index) + if ret == False: + continue + log = print_1_device_traversal(i, j, k) + print log, + if k.find('present')!= -1: + ret, k = get_path_sfp_presence(port_index) + if ret == False: + continue + log = print_1_device_traversal(i, j, k) + print log, + + else: + for k in (ALL_DEVICE[i][j]): + log = print_1_device_traversal(i, j, k) + print log, + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0070", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/classes/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/classes/fanutil.py new file mode 100644 index 00000000000..c741ebfd724 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/classes/fanutil.py @@ -0,0 +1,237 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 5/27/2019: Brandon_Chuang create +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_NUM_ON_MAIN_BROAD = 5 + FAN_NUM_1_IDX = 1 + FAN_NUM_2_IDX = 2 + FAN_NUM_3_IDX = 3 + FAN_NUM_4_IDX = 4 + FAN_NUM_5_IDX = 5 + + FAN_NODE_NUM_OF_MAP = 2 + FAN_NODE_FAULT_IDX_OF_MAP = 1 + FAN_NODE_DIR_IDX_OF_MAP = 2 + + BASE_VAL_PATH = '/sys/bus/i2c/devices/3-0063/{0}' + FAN_DUTY_PATH = '/sys/bus/i2c/devices/3-0063/fan_duty_cycle_percentage' + + #logfile = '' + #loglevel = logging.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + _fan_to_device_path_mapping = {} + +#fan1_direction +#fan1_fault +#fan1_present + + #(FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage', + _fan_to_device_node_mapping = { + (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault', + (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction', + + (FAN_NUM_2_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan2_fault', + (FAN_NUM_2_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan2_direction', + + (FAN_NUM_3_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan3_fault', + (FAN_NUM_3_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan3_direction', + + (FAN_NUM_4_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan4_fault', + (FAN_NUM_4_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan4_direction', + + (FAN_NUM_5_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan5_fault', + (FAN_NUM_5_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan5_direction', + } + + def _get_fan_to_device_node(self, fan_num, node_num): + return self._fan_to_device_node_mapping[(fan_num, node_num)] + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + + try: + val_file = open(device_path, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + def __init__(self): + fan_path = self.BASE_VAL_PATH + + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_NUM_ON_MAIN_BROAD+1): + for node_num in range(self.FAN_NODE_FAULT_IDX_OF_MAP, self.FAN_NODE_NUM_OF_MAP+1): + self._fan_to_device_path_mapping[(fan_num, node_num)] = fan_path.format( + self._fan_to_device_node_mapping[(fan_num, node_num)]) + + def get_num_fans(self): + return self.FAN_NUM_ON_MAIN_BROAD + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM_OF_MAP + + def get_idx_node_start(self): + return self.FAN_NODE_FAULT_IDX_OF_MAP + + def get_size_node_map(self): + return len(self._fan_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._fan_to_device_path_mapping) + + def get_fan_to_device_path(self, fan_num, node_num): + return self._fan_to_device_path_mapping[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_FAULT_IDX_OF_MAP) + + #def get_fan_speed(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FAN_NODE_SPEED_IDX_OF_MAP) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DIR_IDX_OF_MAP) + + def get_fan_duty_cycle(self): + #duty_path = self.FAN_DUTY_PATH + try: + val_file = open(self.FAN_DUTY_PATH) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + return int(content) + + def set_fan_duty_cycle(self, val): + try: + fan_file = open(self.FAN_DUTY_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + fan_file.write(str(val)) + fan_file.close() + return True + + #def get_fanr_fault(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FANR_NODE_FAULT_IDX_OF_MAP) + + def get_fanr_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP) + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num, %d', fan_num) + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + logging.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + #if self.get_fanr_fault(fan_num) is not None and self.get_fanr_fault(fan_num) > 0: + # logging.debug('GET. FANR fault. fan_num, %d', fan_num) + # return False + + return True + +#def main(): +# fan = FanUtil() +# +# print 'get_size_node_map : %d' % fan.get_size_node_map() +# print 'get_size_path_map : %d' % fan.get_size_path_map() +# for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): +# for y in range(fan.get_idx_node_start(), fan.get_num_nodes()+1): +# print fan.get_fan_to_device_path(x, y) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/classes/thermalutil.py new file mode 100644 index 00000000000..1dc97cfe276 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/classes/thermalutil.py @@ -0,0 +1,129 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 6/11/2019: Brandon_Chuang create +# ------------------------------------------------------------------ + +try: + import os + import time + import logging + import glob + import commands + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + THERMAL_NUM_MAX = 4 + THERMAL_NUM_1_IDX = 1 # 1_ON_CPU_BROAD. LM75 + THERMAL_NUM_2_IDX = 2 # 2_ON_MAIN_BROAD. LM75 + THERMAL_NUM_3_IDX = 3 # 3_ON_MAIN_BROAD. LM75 + THERMAL_NUM_4_IDX = 4 # 4_ON_MAIN_BROAD. LM75 + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + #_thermal_to_device_path_mapping = {} + + _thermal_to_device_node_mapping = { + THERMAL_NUM_1_IDX: ['18', '4b'], + THERMAL_NUM_2_IDX: ['19', '4c'], + THERMAL_NUM_3_IDX: ['20', '49'], + THERMAL_NUM_4_IDX: ['21', '4a'], + } + thermal_sysfspath ={ + THERMAL_NUM_1_IDX: ["/sys/bus/i2c/devices/18-004b/hwmon/hwmon3/temp1_input"], + THERMAL_NUM_2_IDX: ["/sys/bus/i2c/devices/19-004c/hwmon/hwmon4/temp1_input"], + THERMAL_NUM_3_IDX: ["/sys/bus/i2c/devices/20-0049/hwmon/hwmon5/temp1_input"], + THERMAL_NUM_4_IDX: ["/sys/bus/i2c/devices/21-004a/hwmon/hwmon6/temp1_input"], + } + + #def __init__(self): + def _get_thermal_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_MAX: + logging.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_to_device_path(thermal_num) + if(os.path.isfile(device_path)): + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + content = val_file.readline().rstrip() + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + return int(content) + + else: + print "No such device_path=%s"%device_path + return 0 + + def get_num_thermals(self): + return self.THERMAL_NUM_MAX + + def get_idx_thermal_start(self): + return self.THERMAL_NUM_1_IDX + + def get_size_node_map(self): + return len(self._thermal_to_device_node_mapping) + + def get_size_path_map(self): + return len(self.thermal_sysfspath) + + def get_thermal_to_device_path(self, thermal_num): + return self.thermal_sysfspath[thermal_num][0] + + def get_thermal_1_val(self): + return self._get_thermal_val(self.THERMAL_NUM_1_IDX) + + def get_thermal_2_val(self): + return self._get_thermal_val(self.THERMAL_NUM_2_IDX) + + def get_thermal_3_val(self): + return self._get_thermal_val(self.THERMAL_NUM_3_IDX) + + def get_thermal_temp(self): + return (self._get_thermal_val(self.THERMAL_NUM_1_IDX) + self._get_thermal_val(self.THERMAL_NUM_2_IDX) +self._get_thermal_val(self.THERMAL_NUM_3_IDX)) + +def main(): + thermal = ThermalUtil() + print "termal1=%d" %thermal._get_thermal_val(1) + print "termal2=%d" %thermal._get_thermal_val(2) + print "termal3=%d" %thermal._get_thermal_val(3) + print "termal4=%d" %thermal._get_thermal_val(4) +# +# print 'get_size_node_map : %d' % thermal.get_size_node_map() +# print 'get_size_path_map : %d' % thermal.get_size_path_map() +# for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): +# print thermal.get_thermal_to_device_path(x) +# +if __name__ == '__main__': + main() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/Makefile new file mode 100644 index 00000000000..887ac3189ce --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/Makefile @@ -0,0 +1,17 @@ +ifneq ($(KERNELRELEASE),) +obj-m:= accton_as5835_54t_cpld.o accton_as5835_54t_psu.o \ + accton_as5835_54t_fan.o accton_as5835_54t_leds.o \ + ym2651y.o + +else +ifeq (,$(KERNEL_SRC)) +$(error KERNEL_SRC is not defined) +else +KERNELDIR:=$(KERNEL_SRC) +endif +PWD:=$(shell pwd) +default: + $(MAKE) -C $(KERNELDIR) M=$(PWD) modules +clean: + rm -rf *.o *.mod.o *.mod.o *.ko .*cmd .tmp_versions Module.markers Module.symvers modules.order +endif diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_cpld.c new file mode 100644 index 00000000000..ae773b4d820 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_cpld.c @@ -0,0 +1,603 @@ +/* + * Copyright (C) Brandon Chuang + * + * This module supports the accton cpld that hold the channel select + * mechanism for other i2c slave devices, such as SFP. + * This includes the: + * Accton as5835_54t CPLD1/CPLD2/CPLD3 + * + * Based on: + * pca954t.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954t.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +enum cpld_type { + as5835_54t_cpld1, + as5835_54t_cpld2, + as5835_54t_cpld3 +}; + +struct as5835_54t_cpld_data { + enum cpld_type type; + struct device *hwmon_dev; + struct mutex update_lock; +}; + +static const struct i2c_device_id as5835_54t_cpld_id[] = { + { "as5835_54t_cpld1", as5835_54t_cpld1 }, + { "as5835_54t_cpld2", as5835_54t_cpld2 }, + { "as5835_54t_cpld3", as5835_54t_cpld3 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, as5835_54t_cpld_id); + +#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index +#define TRANSCEIVER_LPMODE_ATTR_ID(index) MODULE_LPMODE_##index +#define TRANSCEIVER_RESET_ATTR_ID(index) MODULE_RESET_##index + +enum as5835_54t_cpld1_sysfs_attributes { + CPLD_VERSION, + ACCESS, + MODULE_PRESENT_ALL, + MODULE_RXLOS_ALL, + /* transceiver attributes */ + TRANSCEIVER_PRESENT_ATTR_ID(49), + TRANSCEIVER_PRESENT_ATTR_ID(50), + TRANSCEIVER_PRESENT_ATTR_ID(51), + TRANSCEIVER_PRESENT_ATTR_ID(52), + TRANSCEIVER_PRESENT_ATTR_ID(53), + TRANSCEIVER_PRESENT_ATTR_ID(54), + TRANSCEIVER_LPMODE_ATTR_ID(49), + TRANSCEIVER_LPMODE_ATTR_ID(50), + TRANSCEIVER_LPMODE_ATTR_ID(51), + TRANSCEIVER_LPMODE_ATTR_ID(52), + TRANSCEIVER_LPMODE_ATTR_ID(53), + TRANSCEIVER_LPMODE_ATTR_ID(54), + TRANSCEIVER_RESET_ATTR_ID(49), + TRANSCEIVER_RESET_ATTR_ID(50), + TRANSCEIVER_RESET_ATTR_ID(51), + TRANSCEIVER_RESET_ATTR_ID(52), + TRANSCEIVER_RESET_ATTR_ID(53), + TRANSCEIVER_RESET_ATTR_ID(54), +}; + +/* sysfs attributes for hwmon + */ +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_control(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +static int as5835_54t_cpld_read_internal(struct i2c_client *client, u8 reg); +static int as5835_54t_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value); + +/* transceiver attributes */ +#define DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_status, NULL, MODULE_PRESENT_##index) +#define DECLARE_TRANSCEIVER_PRESENT_ATTR(index) &sensor_dev_attr_module_present_##index.dev_attr.attr + +#define DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_lpmode_##index, S_IRUGO | S_IWUSR, show_status, set_control, MODULE_LPMODE_##index); \ + static SENSOR_DEVICE_ATTR(module_reset_##index, S_IRUGO | S_IWUSR, show_status, set_control, MODULE_RESET_##index) +#define DECLARE_QSFP_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_lpmode_##index.dev_attr.attr, \ + &sensor_dev_attr_module_reset_##index.dev_attr.attr + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS); +/* transceiver attributes */ +static SENSOR_DEVICE_ATTR(module_present_all, S_IRUGO, show_present_all, NULL, MODULE_PRESENT_ALL); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(49); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(50); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(51); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(52); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(53); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(54); + +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(49); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(50); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(51); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(52); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(53); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(54); + +static struct attribute *as5835_54t_cpld1_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + NULL +}; + +static const struct attribute_group as5835_54t_cpld1_group = { + .attrs = as5835_54t_cpld1_attributes, +}; + +static struct attribute *as5835_54t_cpld2_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + NULL +}; + +static const struct attribute_group as5835_54t_cpld2_group = { + .attrs = as5835_54t_cpld2_attributes, +}; + +static struct attribute *as5835_54t_cpld3_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(49), + DECLARE_TRANSCEIVER_PRESENT_ATTR(50), + DECLARE_TRANSCEIVER_PRESENT_ATTR(51), + DECLARE_TRANSCEIVER_PRESENT_ATTR(52), + DECLARE_TRANSCEIVER_PRESENT_ATTR(53), + DECLARE_TRANSCEIVER_PRESENT_ATTR(54), + DECLARE_QSFP_TRANSCEIVER_ATTR(49), + DECLARE_QSFP_TRANSCEIVER_ATTR(50), + DECLARE_QSFP_TRANSCEIVER_ATTR(51), + DECLARE_QSFP_TRANSCEIVER_ATTR(52), + DECLARE_QSFP_TRANSCEIVER_ATTR(53), + DECLARE_QSFP_TRANSCEIVER_ATTR(54), + NULL +}; + +static const struct attribute_group as5835_54t_cpld3_group = { + .attrs = as5835_54t_cpld3_attributes, +}; + +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u8 values[5] = {0}; + u8 regs_cpld3[] = {0x14}; + u8 *regs[] = {NULL, NULL, regs_cpld3}; + u8 size[] = {0, 0, ARRAY_SIZE(regs_cpld3)}; + struct i2c_client *client = to_i2c_client(dev); + struct as5835_54t_cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + for (i = 0; i < size[data->type]; i++) { + status = as5835_54t_cpld_read_internal(client, regs[data->type][i]); + if (status < 0) { + goto exit; + } + + values[i] = ~(u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values in order */ + values[0] &= 0x3F; + return sprintf(buf, "%.2x\n", values[0]); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as5835_54t_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0, revert = 0; + + switch (attr->index) { + case MODULE_PRESENT_49 ... MODULE_PRESENT_54: + reg = 0x14; + mask = 0x1 << (attr->index - MODULE_PRESENT_49); + break; + case MODULE_LPMODE_49 ... MODULE_LPMODE_54: + reg = 0x16; + mask = 0x1 << (attr->index - MODULE_LPMODE_49); + break; + case MODULE_RESET_49 ... MODULE_RESET_54: + reg = 0x15; + mask = 0x1 << (attr->index - MODULE_RESET_49); + break; + default: + return 0; + } + + if (attr->index >= MODULE_PRESENT_49 && attr->index <= MODULE_PRESENT_54) { + revert = 1; + } + + mutex_lock(&data->update_lock); + status = as5835_54t_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", revert ? !(status & mask) : !!(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_control(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as5835_54t_cpld_data *data = i2c_get_clientdata(client); + long value; + int status; + u8 reg = 0, mask = 0; + + status = kstrtol(buf, 10, &value); + if (status) { + return status; + } + + switch (attr->index) { + case MODULE_LPMODE_49 ... MODULE_LPMODE_54: + reg = 0x16; + mask = 0x1 << (attr->index - MODULE_LPMODE_49); + break; + case MODULE_RESET_49 ... MODULE_RESET_54: + reg = 0x15; + mask = 0x1 << (attr->index - MODULE_RESET_49); + break; + default: + return 0; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as5835_54t_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update tx_disable/lpmode/reset status */ + if (value) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as5835_54t_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct as5835_54t_cpld_data *data = i2c_get_clientdata(client); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = as5835_54t_cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static void as5835_54t_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as5835_54t_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, 0x1); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d\n", val); +} + +/* + * I2C init/probing/exit functions + */ +static int as5835_54t_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + struct as5835_54t_cpld_data *data; + int ret = -ENODEV; + const struct attribute_group *group = NULL; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + goto exit; + + data = kzalloc(sizeof(struct as5835_54t_cpld_data), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->type = id->driver_data; + + /* Register sysfs hooks */ + switch (data->type) { + case as5835_54t_cpld1: + group = &as5835_54t_cpld1_group; + break; + case as5835_54t_cpld2: + group = &as5835_54t_cpld2_group; + break; + case as5835_54t_cpld3: + group = &as5835_54t_cpld3_group; + break; + default: + break; + } + + if (group) { + ret = sysfs_create_group(&client->dev.kobj, group); + if (ret) { + goto exit_free; + } + } + + as5835_54t_cpld_add_client(client); + return 0; + +exit_free: + kfree(data); +exit: + return ret; +} + +static int as5835_54t_cpld_remove(struct i2c_client *client) +{ + struct as5835_54t_cpld_data *data = i2c_get_clientdata(client); + const struct attribute_group *group = NULL; + + as5835_54t_cpld_remove_client(client); + + /* Remove sysfs hooks */ + switch (data->type) { + case as5835_54t_cpld1: + group = &as5835_54t_cpld1_group; + break; + case as5835_54t_cpld2: + group = &as5835_54t_cpld2_group; + break; + case as5835_54t_cpld3: + group = &as5835_54t_cpld3_group; + break; + default: + break; + } + + if (group) { + sysfs_remove_group(&client->dev.kobj, group); + } + + kfree(data); + + return 0; +} + +static int as5835_54t_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int as5835_54t_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +int as5835_54t_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as5835_54t_cpld_read_internal(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as5835_54t_cpld_read); + +int as5835_54t_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as5835_54t_cpld_write_internal(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as5835_54t_cpld_write); + +static struct i2c_driver as5835_54t_cpld_driver = { + .driver = { + .name = "as5835_54t_cpld", + .owner = THIS_MODULE, + }, + .probe = as5835_54t_cpld_probe, + .remove = as5835_54t_cpld_remove, + .id_table = as5835_54t_cpld_id, +}; + +static int __init as5835_54t_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as5835_54t_cpld_driver); +} + +static void __exit as5835_54t_cpld_exit(void) +{ + i2c_del_driver(&as5835_54t_cpld_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("Accton I2C CPLD driver"); +MODULE_LICENSE("GPL"); + +module_init(as5835_54t_cpld_init); +module_exit(as5835_54t_cpld_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_fan.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_fan.c new file mode 100644 index 00000000000..ea6fdb8296c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_fan.c @@ -0,0 +1,484 @@ +/* + * A hwmon driver for the Accton as5835 54t fan + * + * Copyright (C) 2016 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as5835_54t_fan" +#define MAX_FAN_SPEED_RPM 21500 + +static struct as5835_54t_fan_data *as5835_54t_fan_update_device(struct device *dev); +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +extern int as5835_54t_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as5835_54t_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +/* fan related data, the index should match sysfs_fan_attributes + */ +static const u8 fan_reg[] = { + 0x02, /* fan 1-5 present status */ + 0x03, /* fan 1-5 direction(0:F2B 1:B2F) */ + 0x04, /* front fan 1-5 fault status */ + 0x05, /* rear fan 1-5 fault status */ + 0x06, /* fan PWM(for all fan) */ + 0x07, /* front fan 1 speed(rpm) */ + 0x08, /* front fan 2 speed(rpm) */ + 0x09, /* front fan 3 speed(rpm) */ + 0x0A, /* front fan 4 speed(rpm) */ + 0x0B, /* front fan 5 speed(rpm) */ + 0x0C, /* rear fan 1 speed(rpm) */ + 0x0D, /* rear fan 2 speed(rpm) */ + 0x0E, /* rear fan 3 speed(rpm) */ + 0x0F, /* rear fan 4 speed(rpm) */ + 0x10, /* rear fan 5 speed(rpm) */ +}; + +/* fan data */ +struct as5835_54t_fan_data { + struct platform_device *pdev; + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ +}; + +enum fan_id { + FAN1_ID, + FAN2_ID, + FAN3_ID, + FAN4_ID, + FAN5_ID +}; + +enum sysfs_fan_attributes { + FAN_PRESENT_REG, + FAN_DIRECTION_REG, + FAN_FRONT_FAULT_REG, + FAN_REAR_FAULT_REG, + FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ + FAN1_FRONT_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN5_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN5_REAR_SPEED_RPM, + FAN1_DIRECTION, + FAN2_DIRECTION, + FAN3_DIRECTION, + FAN4_DIRECTION, + FAN5_DIRECTION, + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN5_PRESENT, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + FAN5_FAULT, + FAN_MAX_RPM, + CPLD_VERSION +}; + +/* Define attributes + */ +#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT);\ + static SENSOR_DEVICE_ATTR(fan##index2##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT) +#define DECLARE_FAN_FAULT_ATTR(index, index2) &sensor_dev_attr_fan##index##_fault.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_fault.dev_attr.attr +#define DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_direction, S_IRUGO, fan_show_value, NULL, FAN##index##_DIRECTION) +#define DECLARE_FAN_DIRECTION_ATTR(index) &sensor_dev_attr_fan##index##_direction.dev_attr.attr + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN##index##_DUTY_CYCLE_PERCENTAGE) +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan##index##_duty_cycle_percentage.dev_attr.attr + +#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_present, S_IRUGO, fan_show_value, NULL, FAN##index##_PRESENT) +#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr + +#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index2##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM) +#define DECLARE_FAN_SPEED_RPM_ATTR(index, index2) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_input.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_input.dev_attr.attr + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(fan_max_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN_MAX_RPM); +#define DECLARE_FAN_MAX_RPM_ATTR(index) &sensor_dev_attr_fan_max_speed_rpm.dev_attr.attr + + +/* 5 fan fault attributes in this platform */ +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1, 11); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2, 12); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3, 13); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4, 14); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(5, 15); +/* 5 fan speed(rpm) attributes in this platform */ +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1, 11); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2, 12); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3, 13); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4, 14); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(5, 15); +/* 5 fan present attributes in this platform */ +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(5); +/* 5 fan direction attribute in this platform */ +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(1); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(2); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(3); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(4); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(5); +/* 1 fan duty cycle attribute in this platform */ +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(); + +static struct attribute *as5835_54t_fan_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + /* fan related attributes */ + DECLARE_FAN_FAULT_ATTR(1, 11), + DECLARE_FAN_FAULT_ATTR(2, 12), + DECLARE_FAN_FAULT_ATTR(3, 13), + DECLARE_FAN_FAULT_ATTR(4, 14), + DECLARE_FAN_FAULT_ATTR(5, 15), + DECLARE_FAN_SPEED_RPM_ATTR(1, 11), + DECLARE_FAN_SPEED_RPM_ATTR(2, 12), + DECLARE_FAN_SPEED_RPM_ATTR(3, 13), + DECLARE_FAN_SPEED_RPM_ATTR(4, 14), + DECLARE_FAN_SPEED_RPM_ATTR(5, 15), + DECLARE_FAN_PRESENT_ATTR(1), + DECLARE_FAN_PRESENT_ATTR(2), + DECLARE_FAN_PRESENT_ATTR(3), + DECLARE_FAN_PRESENT_ATTR(4), + DECLARE_FAN_PRESENT_ATTR(5), + DECLARE_FAN_DIRECTION_ATTR(1), + DECLARE_FAN_DIRECTION_ATTR(2), + DECLARE_FAN_DIRECTION_ATTR(3), + DECLARE_FAN_DIRECTION_ATTR(4), + DECLARE_FAN_DIRECTION_ATTR(5), + DECLARE_FAN_DUTY_CYCLE_ATTR(), + DECLARE_FAN_MAX_RPM_ATTR(), + NULL +}; + +#define FAN_DUTY_CYCLE_REG_MASK 0x1F +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 150 + +static int as5835_54t_fan_read_value(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int as5835_54t_fan_write_value(struct i2c_client *client, u8 reg, u8 value) +{ + return i2c_smbus_write_byte_data(client, reg, value); +} + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + return (reg_val & FAN_DUTY_CYCLE_REG_MASK) * 5; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + if (duty_cycle > FAN_MAX_DUTY_CYCLE) { + duty_cycle = FAN_MAX_DUTY_CYCLE; + } + + return (duty_cycle / 5); +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static u8 reg_val_to_direction(u8 reg_val, enum fan_id id) +{ + return !!(reg_val & BIT(id)); /* 0: Front to Back, 1: Back to Front*/ +} + +static u8 reg_val_to_is_present(u8 reg_val, enum fan_id id) +{ + return !(reg_val & BIT(id)); +} + +static u8 is_fan_fault(struct as5835_54t_fan_data *data, enum fan_id id) +{ + if ((data->reg_val[FAN_FRONT_FAULT_REG] & BIT(id)) || + (data->reg_val[FAN_REAR_FAULT_REG] & BIT(id))) { + return 1; + } + + return 0; +} + +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + struct i2c_client *client = to_i2c_client(dev); + + error = kstrtoint(buf, 10, &value); + if (error) { + return error; + } + + if (value < 0 || value > FAN_MAX_DUTY_CYCLE) { + return -EINVAL; + } + + as5835_54t_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); + return count; +} + +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as5835_54t_fan_data *data = as5835_54t_fan_update_device(dev); + ssize_t ret = 0; + + if (data->valid) { + switch (attr->index) { + case FAN_DUTY_CYCLE_PERCENTAGE: + { + u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); + ret = sprintf(buf, "%u\n", duty_cycle); + break; + } + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN5_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index])); + break; + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + ret = sprintf(buf, "%d\n", + reg_val_to_is_present(data->reg_val[FAN_PRESENT_REG], + attr->index - FAN1_PRESENT)); + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + ret = sprintf(buf, "%d\n", is_fan_fault(data, attr->index - FAN1_FAULT)); + break; + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + case FAN5_DIRECTION: + ret = sprintf(buf, "%d\n", + reg_val_to_direction(data->reg_val[FAN_DIRECTION_REG], + attr->index - FAN1_DIRECTION)); + break; + case FAN_MAX_RPM: + ret = sprintf(buf, "%d\n", MAX_FAN_SPEED_RPM); + default: + break; + } + } + + return ret; +} + +static const struct attribute_group as5835_54t_fan_group = { + .attrs = as5835_54t_fan_attributes, +}; + +static struct as5835_54t_fan_data *as5835_54t_fan_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5835_54t_fan_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + dev_dbg(&client->dev, "Starting as5835_54t_fan update\n"); + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { + int status = as5835_54t_fan_read_value(client, fan_reg[i]); + + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + dev_dbg(&client->dev, "reg %d, err %d\n", fan_reg[i], status); + return data; + } + else { + data->reg_val[i] = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, 0x1); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d\n", val); +} + +static int as5835_54t_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as5835_54t_fan_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as5835_54t_fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as5835_54t_fan_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "as5835_54t_fan", + NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as5835_54t_fan_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as5835_54t_fan_remove(struct i2c_client *client) +{ + struct as5835_54t_fan_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as5835_54t_fan_group); + + return 0; +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static const struct i2c_device_id as5835_54t_fan_id[] = { + { "as5835_54t_fan", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as5835_54t_fan_id); + +static struct i2c_driver as5835_54t_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = as5835_54t_fan_probe, + .remove = as5835_54t_fan_remove, + .id_table = as5835_54t_fan_id, + .address_list = normal_i2c, +}; + +module_i2c_driver(as5835_54t_fan_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as5835_54t_fan driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_leds.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_leds.c new file mode 100644 index 00000000000..e02930a2f6e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_leds.c @@ -0,0 +1,380 @@ +/* + * A LED driver for the accton_as5822_54t_led + * + * Copyright (C) 2016 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as5835_54t_led" + +#define DEBUG_MODE 0 + +#if (DEBUG_MODE == 1) + #define DEBUG_PRINT(fmt, args...) \ + printk (KERN_INFO "%s:%s[%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +extern int as5835_54t_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as5835_54t_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +struct accton_as5835_54t_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[2]; /* Register value, 0 = RELEASE/DIAG LED, + 1 = FAN/PSU LED, + 2 ~ 4 = SYSTEM LED */ +}; + +static struct accton_as5835_54t_led_data *ledctl = NULL; + +#define LED_CNTRLER_I2C_ADDRESS (0x60) + +#define LED_TYPE_DIAG_REG_MASK (0x0C) +#define LED_MODE_DIAG_GREEN_VALUE (0x08) +#define LED_MODE_DIAG_AMBER_VALUE (0x04) +#define LED_MODE_DIAG_OFF_VALUE (0x0C) +#define LED_MODE_DIAG_AMBER_VALUE1 (0x00) + +#define LED_TYPE_LOC_REG_MASK (0x30) +#define LED_MODE_LOC_AMBER_BLINK_VALUE (0x20) +#define LED_MODE_LOC_OFF_VALUE (0x10) +#define LED_MODE_LOC_AMBER_VALUE (0x00) + +static const u8 led_reg[] = { + 0xA, /* LOC/DIAG/FAN LED */ + 0xB, /* PSU LED */ +}; + +enum led_type { + LED_TYPE_DIAG, + LED_TYPE_LOC, + LED_TYPE_FAN, + LED_TYPE_PSU1, + LED_TYPE_PSU2 +}; + +/* FAN/PSU/DIAG/RELEASE led mode */ +enum led_light_mode { + LED_MODE_OFF = 0, + LED_MODE_GREEN, + LED_MODE_GREEN_BLINK, + LED_MODE_AMBER, + LED_MODE_AMBER_BLINK, + LED_MODE_RED, + LED_MODE_RED_BLINK, + LED_MODE_BLUE, + LED_MODE_BLUE_BLINK, + LED_MODE_AUTO, + LED_MODE_UNKNOWN +}; + +struct led_type_mode { + enum led_type type; + enum led_light_mode mode; + int type_mask; + int mode_value; +}; + +static struct led_type_mode led_type_mode_data[] = { +{LED_TYPE_LOC, LED_MODE_OFF, LED_TYPE_LOC_REG_MASK, LED_MODE_LOC_OFF_VALUE}, +{LED_TYPE_LOC, LED_MODE_AMBER_BLINK, LED_TYPE_LOC_REG_MASK, LED_MODE_LOC_AMBER_BLINK_VALUE}, +{LED_TYPE_LOC, LED_MODE_AMBER, LED_TYPE_LOC_REG_MASK, LED_MODE_LOC_AMBER_VALUE}, +{LED_TYPE_DIAG, LED_MODE_OFF, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_OFF_VALUE}, +{LED_TYPE_DIAG, LED_MODE_GREEN, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_GREEN_VALUE}, +{LED_TYPE_DIAG, LED_MODE_AMBER, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_AMBER_VALUE}, +{LED_TYPE_DIAG, LED_MODE_AMBER, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_AMBER_VALUE1}, +}; + +static int led_reg_val_to_light_mode(enum led_type type, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + if (type != led_type_mode_data[i].type) { + continue; + } + + if ((led_type_mode_data[i].type_mask & reg_val) == + led_type_mode_data[i].mode_value) { + return led_type_mode_data[i].mode; + } + } + + return LED_MODE_UNKNOWN; +} + +static u8 led_light_mode_to_reg_val(enum led_type type, + enum led_light_mode mode, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + int type_mask, mode_value; + + if (type != led_type_mode_data[i].type) + continue; + + if (mode != led_type_mode_data[i].mode) + continue; + + type_mask = led_type_mode_data[i].type_mask; + mode_value = led_type_mode_data[i].mode_value; + reg_val = (reg_val & ~type_mask) | mode_value; + } + + return reg_val; +} + +static int accton_as5835_54t_led_read_value(u8 reg) +{ + return as5835_54t_cpld_read(LED_CNTRLER_I2C_ADDRESS, reg); +} + +static int accton_as5835_54t_led_write_value(u8 reg, u8 value) +{ + return as5835_54t_cpld_write(LED_CNTRLER_I2C_ADDRESS, reg, value); +} + +static void accton_as5835_54t_led_update(void) +{ + mutex_lock(&ledctl->update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as5835_54t_led update\n"); + ledctl->valid = 0; + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = accton_as5835_54t_led_read_value(led_reg[i]); + + if (status < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg[i], status); + goto exit; + } + else + ledctl->reg_val[i] = status; + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as5835_54t_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + u8 reg, enum led_type type) +{ + int reg_val; + + mutex_lock(&ledctl->update_lock); + reg_val = accton_as5835_54t_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + accton_as5835_54t_led_write_value(reg, reg_val); + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as7312_54t_led_auto_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ +} + +static enum led_brightness accton_as7312_54t_led_auto_get(struct led_classdev *cdev) +{ + return LED_MODE_AUTO; +} + +static void accton_as5835_54t_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5835_54t_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_DIAG); +} + +static enum led_brightness accton_as5835_54t_led_diag_get(struct led_classdev *cdev) +{ + accton_as5835_54t_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static enum led_brightness accton_as5835_54t_led_loc_get(struct led_classdev *cdev) +{ + accton_as5835_54t_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static void accton_as5835_54t_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5835_54t_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_LOC); +} + +static struct led_classdev accton_as5835_54t_leds[] = { + [LED_TYPE_LOC] = { + .name = "as5835_54t_led::loc", + .default_trigger = "unused", + .brightness_set = accton_as5835_54t_led_loc_set, + .brightness_get = accton_as5835_54t_led_loc_get, + .max_brightness = LED_MODE_AMBER_BLINK, + }, + [LED_TYPE_DIAG] = { + .name = "as5835_54t_led::diag", + .default_trigger = "unused", + .brightness_set = accton_as5835_54t_led_diag_set, + .brightness_get = accton_as5835_54t_led_diag_get, + .max_brightness = LED_MODE_AMBER, + }, + [LED_TYPE_PSU1] = { + .name = "as5835_54t_led::psu1", + .default_trigger = "unused", + .brightness_set = accton_as7312_54t_led_auto_set, + .brightness_get = accton_as7312_54t_led_auto_get, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "as5835_54t_led::psu2", + .default_trigger = "unused", + .brightness_set = accton_as7312_54t_led_auto_set, + .brightness_get = accton_as7312_54t_led_auto_get, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN] = { + .name = "as5835_54t_led::fan", + .default_trigger = "unused", + .brightness_set = accton_as7312_54t_led_auto_set, + .brightness_get = accton_as7312_54t_led_auto_get, + .max_brightness = LED_MODE_AUTO, + }, +}; + +static int accton_as5835_54t_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(accton_as5835_54t_leds); i++) { + ret = led_classdev_register(&pdev->dev, &accton_as5835_54t_leds[i]); + + if (ret < 0) { + break; + } + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(accton_as5835_54t_leds)){ + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&accton_as5835_54t_leds[i]); + } + } + + return ret; +} + +static int accton_as5835_54t_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(accton_as5835_54t_leds); i++) { + led_classdev_unregister(&accton_as5835_54t_leds[i]); + } + + return 0; +} + +static struct platform_driver accton_as5835_54t_led_driver = { + .probe = accton_as5835_54t_led_probe, + .remove = accton_as5835_54t_led_remove, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as5835_54t_led_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as5835_54t_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct accton_as5835_54t_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + goto exit_driver; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + goto exit_free; + } + + return 0; + +exit_free: + kfree(ledctl); +exit_driver: + platform_driver_unregister(&accton_as5835_54t_led_driver); +exit: + return ret; +} + +static void __exit accton_as5835_54t_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&accton_as5835_54t_led_driver); + kfree(ledctl); +} + +late_initcall(accton_as5835_54t_led_init); +module_exit(accton_as5835_54t_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as5835_54t_led driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_psu.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_psu.c new file mode 100644 index 00000000000..78f0b4298a5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_psu.c @@ -0,0 +1,343 @@ +/* + * An hwmon driver for accton as5835_54t Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define PSU_STATUS_I2C_ADDR 0x60 +#define PSU_STATUS_I2C_REG_OFFSET 0x2 + +#define MODEL_NAME_LEN 8 +#define MODEL_NAME_REG_OFFSET 0x20 + +#define SERIAL_NUM_LEN 18 +#define SERIAL_NUM_REG_OFFSET 0x35 + +#define IS_POWER_GOOD(id, value) (!!(value & BIT(id*4 + 1))) +#define IS_PRESENT(id, value) (!(value & BIT(id*4))) + +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_string(struct device *dev, struct device_attribute *da, char *buf); +extern int as5835_54t_cpld_read(unsigned short cpld_addr, u8 reg); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as5835_54t_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[MODEL_NAME_LEN+1]; /* Model name, read from eeprom */ + char serial[SERIAL_NUM_LEN+1]; /* Serial number, read from eeprom*/ +}; + +static struct as5835_54t_psu_data *as5835_54t_psu_update_device(struct device *dev); + +enum as5835_54t_psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD, + PSU_SERIAL_NUMBER +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_string, NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu_serial_numer, S_IRUGO, show_string, NULL, PSU_SERIAL_NUMBER); + +static struct attribute *as5835_54t_psu_attributes[] = { + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + &sensor_dev_attr_psu_serial_numer.dev_attr.attr, + NULL +}; + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as5835_54t_psu_data *data = as5835_54t_psu_update_device(dev); + u8 status = 0; + + if (!data->valid) { + return sprintf(buf, "0\n"); + } + + if (attr->index == PSU_PRESENT) { + status = IS_PRESENT(data->index, data->status); + } + else { /* PSU_POWER_GOOD */ + status = IS_POWER_GOOD(data->index, data->status); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_string(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as5835_54t_psu_data *data = as5835_54t_psu_update_device(dev); + char *str = NULL; + + if (!data->valid) { + return 0; + } + + if (attr->index == PSU_MODEL_NAME) { + str = data->model_name; + } + else { /* PSU_SERIAL_NUBMER */ + str = data->serial; + } + + return sprintf(buf, "%s\n", str); +} + +static const struct attribute_group as5835_54t_psu_group = { + .attrs = as5835_54t_psu_attributes, +}; + +static int as5835_54t_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as5835_54t_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as5835_54t_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as5835_54t_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "as5835_54t_psu", + NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as5835_54t_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as5835_54t_psu_remove(struct i2c_client *client) +{ + struct as5835_54t_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as5835_54t_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as5835_54t_psu1, + as5835_54t_psu2 +}; + +static const struct i2c_device_id as5835_54t_psu_id[] = { + { "as5835_54t_psu1", as5835_54t_psu1 }, + { "as5835_54t_psu2", as5835_54t_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as5835_54t_psu_id); + +static struct i2c_driver as5835_54t_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as5835_54t_psu", + }, + .probe = as5835_54t_psu_probe, + .remove = as5835_54t_psu_remove, + .id_table = as5835_54t_psu_id, + .address_list = normal_i2c, +}; + +static int as5835_54t_psu_read_byte(struct i2c_client *client, u8 command, u8 *data) +{ + int status = 0; + int retry_count = 5; + + while (retry_count) { + status = i2c_smbus_read_byte_data(client, command); + if (unlikely(status < 0)) { + msleep(10); + retry_count--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "sfp read byte data failed, command(0x%2x), data(0x%2x)\r\n", command, status); + goto abort; + } + + *data = (u8)status; + +abort: + return status; +} + +static int as5835_54t_psu_read_bytes(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int ret = 0; + + while (data_len) { + ssize_t status; + + status = as5835_54t_psu_read_byte(client, command, data); + if (status <= 0) { + ret = status; + break; + } + + data += 1; + command += 1; + data_len -= 1; + } + + return ret; +} + +static struct as5835_54t_psu_data *as5835_54t_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5835_54t_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status; + + dev_dbg(&client->dev, "Starting as5835_54t update\n"); + data->valid = 0; + + /* Read psu status */ + status = as5835_54t_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg (0x%x) err %d\n", PSU_STATUS_I2C_ADDR, status); + goto exit; + } + else { + data->status = status; + } + + + memset(data->model_name, 0, sizeof(data->model_name)); + memset(data->serial, 0, sizeof(data->serial)); + + if (IS_PRESENT(data->index, data->status)) { + /* Read model name */ + status = as5835_54t_psu_read_bytes(client, MODEL_NAME_REG_OFFSET, data->model_name, + ARRAY_SIZE(data->model_name)-1); + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x)\n", client->addr); + goto exit; + } + + /* Read serial number */ + status = as5835_54t_psu_read_bytes(client, SERIAL_NUM_REG_OFFSET, data->serial, + ARRAY_SIZE(data->serial)-1); + if (status < 0) { + data->serial[0] = '\0'; + dev_dbg(&client->dev, "unable to read serial number from (0x%x)\n", client->addr); + goto exit; + } + else { + data->serial[SERIAL_NUM_LEN] = '\0'; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(as5835_54t_psu_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as5835_54t_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/ym2651y.c new file mode 120000 index 00000000000..f4d67640ccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/ym2651y.c @@ -0,0 +1 @@ +../../common/modules/ym2651y.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/service/as5835-54t-platform-monitor-fan.service b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/service/as5835-54t-platform-monitor-fan.service new file mode 100644 index 00000000000..19ad3e51947 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/service/as5835-54t-platform-monitor-fan.service @@ -0,0 +1,16 @@ +[Unit] +Description=Accton AS5835-54T Platform Monitoring FAN service +Before=pmon.service +After=as5835-54t-platform-monitor.service +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/accton_as5835_54t_monitor_fan.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/service/as5835-54t-platform-monitor-psu.service b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/service/as5835-54t-platform-monitor-psu.service new file mode 100644 index 00000000000..f30b13b6bc3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/service/as5835-54t-platform-monitor-psu.service @@ -0,0 +1,16 @@ +[Unit] +Description=Accton AS5835-54T Platform Monitoring PSU service +Before=pmon.service +After=as5835-54t-platform-monitor.service +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/accton_as5835_54t_monitor_psu.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/service/as5835-54t-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/service/as5835-54t-platform-monitor.service new file mode 100644 index 00000000000..9789201034c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/service/as5835-54t-platform-monitor.service @@ -0,0 +1,18 @@ +[Unit] +Description=Accton AS5835-54T Platform Monitoring service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/accton_as5835_54t_util.py install +ExecStart=/usr/local/bin/accton_as5835_54t_monitor.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL +#StandardOutput=tty + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/setup.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/setup.py new file mode 100644 index 00000000000..ac880c41e4e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as5835_54t', + version='1.0', + description='Module to initialize Accton AS5835-54T platforms', + + packages=['as5835_54t'], + package_dir={'as5835_54t': 'as5835-54t/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/README b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/README new file mode 100644 index 00000000000..dc9b838f9f1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/README @@ -0,0 +1,74 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +Contents of this package: + module - Contains source code of as5835 kernel driver modules. + util - operational scripts. + +Sonic creates a docker container and run building process under it. +If user tries to built new drivers, please get into that docker and +dpkg-buildpackage for them. + +All Linux kernel code is licensed under the GPLv1. All other code is +licensed under the GPLv3. Please see the LICENSE file for copies of +both licenses. + +The code for integacting with Accton AS5835-54T has 2 parts, +kernel drivers and operational script. +The kernel drivers of peripherals are under module/ directory. +1. These drivers can be built to individual ko during dpkg-buildpackage. +2. A operational script, accton_as5835_54t_util.py, for device initializatian. + Run "accton_as5835_54t_util.py install" to install drivers. + +To initialize the system, run "accton_as5835_54t_util.py install". +To clean up the drivers & devices, run "accton_as5835_54t_util.py clean". +To dump information of sensors, run "accton_as5835_54t_util.py show". +To dump SFP EEPROM, run "accton_as5835_54t_util.py sff". +To set fan speed, run "accton_as5835_54t_util.py set fan". +To enable/disable SFP emission, run "accton_as5835_54t_util.py set sfp". +To set system LEDs' color, run "accton_as5835_54t_util.py set led" +For more information, run "accton_as5835_54t_util.py --help". + +==================================================================== +Besides applying accton_as5835_54t_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +System LED: + There are 5 system LEDs at the lower-left corner of front panel. + They are loc, diag, fan, ps1, and ps2. + The sysfs interface color mappings are as follows: + Brightness: + 0 => off + 1 => green + 2 => green blinking + 3 => amber + 4 => amber blinking + But not all colors are available for each LED. + +Fan Control: + There are 10 fans inside 5 fan modules. + All fans share 1 duty setting, ranged from 0~100. + +Thermal sensers: + 4 temperature sensors are controlled by the lm75 kernel modules. + +PSUs: + There 2 power supplies slot at the left/right side of the back. + Once if a PSU is not plugged, the status of it is shown failed. + +There are 48 SFP+ and 6 QSFP modules are equipped. +Before operating on PSU and QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/accton_as5835_54t_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/accton_as5835_54t_monitor.py new file mode 100755 index 00000000000..ce2e0d18d4f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/accton_as5835_54t_monitor.py @@ -0,0 +1,206 @@ +#!/usr/bin/env python +# +# Copyright (C) 2019 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 05/08/2019: Roy Lee, changed for as5812-54x. +# 05/29/2019: Brandon Chuang, changed for as5835-54x. +# 06/11/2019: Brandon Chuang, changed for as5835-54t. +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import types + import time # this is only being used as part of the example + import traceback + import signal + from tabulate import tabulate + from as5835_54t.fanutil import FanUtil + from as5835_54t.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = 'accton_as5835_54t_monitor' +DUTY_MAX = 100 + +global log_file +global log_level + +# Make a class we can use to capture stdout and sterr in the log +class accton_as5835_54t_monitor(object): + # static temp var + _ori_temp = 0 + _new_perc = 0 + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_fans(self): + FAN_LEV1_UP_TEMP = 57700 # temperature + FAN_LEV1_DOWN_TEMP = 0 # unused + FAN_LEV1_SPEED_PERC = DUTY_MAX # percentage*/ + + FAN_LEV2_UP_TEMP = 53000 + FAN_LEV2_DOWN_TEMP = 52700 + FAN_LEV2_SPEED_PERC = 80 + + FAN_LEV3_UP_TEMP = 49500 + FAN_LEV3_DOWN_TEMP = 47700 + FAN_LEV3_SPEED_PERC = 65 + + FAN_LEV4_UP_TEMP = 0 # unused + FAN_LEV4_DOWN_TEMP = 42700 + FAN_LEV4_SPEED_PERC = 40 + + + thermal = ThermalUtil() + fan = FanUtil() + + temp2 = thermal.get_thermal_2_val() + if temp2 is None: + return False + + temp3 = thermal.get_thermal_3_val() + if temp3 is None: + return False + + new_temp = (temp2 + temp3) / 2 + + for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): + fan_stat = fan.get_fan_status(x) + if fan_stat is None: + return False + if fan_stat is False: + self._new_perc = FAN_LEV1_SPEED_PERC + logging.debug('INFO. SET new_perc to %d (FAN fault. fan_num:%d)', self._new_perc, x) + break + logging.debug('INFO. fan_stat is True (fan_num:%d)', x) + + if fan_stat is not None and fan_stat is not False: + diff = new_temp - self._ori_temp + if diff == 0: + logging.debug('INFO. RETURN. THERMAL temp not changed. %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + return True + else: + if diff >= 0: + is_up = True + logging.debug('INFO. THERMAL temp UP %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + else: + is_up = False + logging.debug('INFO. THERMAL temp DOWN %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + + if is_up is True: + if new_temp >= FAN_LEV1_UP_TEMP: + self._new_perc = FAN_LEV1_SPEED_PERC + elif new_temp >= FAN_LEV2_UP_TEMP: + self._new_perc = FAN_LEV2_SPEED_PERC + elif new_temp >= FAN_LEV3_UP_TEMP: + self._new_perc = FAN_LEV3_SPEED_PERC + else: + self._new_perc = FAN_LEV4_SPEED_PERC + logging.debug('INFO. SET. FAN_SPEED as %d (new THERMAL temp:%d)', self._new_perc, new_temp) + else: + if new_temp <= FAN_LEV4_DOWN_TEMP: + self._new_perc = FAN_LEV4_SPEED_PERC + elif new_temp <= FAN_LEV3_DOWN_TEMP: + self._new_perc = FAN_LEV3_SPEED_PERC + elif new_temp <= FAN_LEV2_DOWN_TEMP: + self._new_perc = FAN_LEV2_SPEED_PERC + else: + self._new_perc = FAN_LEV1_SPEED_PERC + logging.debug('INFO. SET. FAN_SPEED as %d (new THERMAL temp:%d)', self._new_perc, new_temp) + + cur_perc = fan.get_fan_duty_cycle() + if cur_perc == self._new_perc: + logging.debug('INFO. RETURN. FAN speed not changed. %d / %d (new_perc / ori_perc)', self._new_perc, cur_perc) + return True + + set_stat = fan.set_fan_duty_cycle(self._new_perc) + if set_stat is True: + logging.debug('INFO: PASS. set_fan_duty_cycle (%d)', self._new_perc) + else: + logging.debug('INFO: FAIL. set_fan_duty_cycle (%d)', self._new_perc) + + logging.debug('INFO: GET. ori_perc is %d. ori_temp is %d', cur_perc, self._ori_temp) + self._ori_temp = new_temp + logging.debug('INFO: UPDATE. ori_perc to %d. ori_temp to %d', cur_perc, self._ori_temp) + + return True + +def handler(signum, frame): + fan = FanUtil() + logging.debug('INFO:Cause signal %d, set fan speed max.', signum) + fan.set_fan_duty_cycle(DUTY_MAX) + sys.exit(0) + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + signal.signal(signal.SIGINT, handler) + signal.signal(signal.SIGTERM, handler) + monitor = accton_as5835_54t_monitor(log_file, log_level) + + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(10) + +if __name__ == '__main__': + main(sys.argv[1:]) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/accton_as5835_54t_monitor_fan.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/accton_as5835_54t_monitor_fan.py new file mode 100755 index 00000000000..d1d93d4f8ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/accton_as5835_54t_monitor_fan.py @@ -0,0 +1,198 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 5/27/2019: Brandon_Chuang create +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as5835_54t_monitor_fan' + +global log_file +global log_level + + +class switch(object): + def __init__(self, value): + self.value = value + self.fall = False + + def __iter__(self): + """Return the match method once, then stop""" + yield self.match + raise StopIteration + + def match(self, *args): + """Indicate whether or not to enter a case suite""" + if self.fall or not args: + return True + elif self.value in args: # changed for v1.5, see below + self.fall = True + return True + else: + return False + + +fan_state=[2, 2, 2, 2, 2, 2] #init state=2, insert=1, remove=0 +fan_status_state=[2, 2, 2, 2, 2, 2] #init state=2, fault=1, normal=0 +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + + #/sys/bus/i2c/devices/3-0063 + #fan1_present, fan5_present + + def __init__(self, log_file, log_level): + + self.fan_num = 5 + self.fan_path = "/sys/bus/i2c/devices/3-0063/" + self.present = { + 0: "fan1_present", + 1: "fan2_present", + 2: "fan3_present", + 3: "fan4_present", + 4: "fan5_present", + } + + self.fault = { + 0: "fan1_fault", + 1: "fan2_fault", + 2: "fan3_fault", + 3: "fan4_fault", + 4: "fan5_fault", + } + + + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(logging.DEBUG) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + #sys_handler.setLevel(logging.WARNING) + sys_handler.setLevel(logging.INFO) + logging.getLogger('').addHandler(sys_handler) + + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_fan(self): + + FAN_STATE_REMOVE = 0 + FAN_STATE_INSERT = 1 + + FAN_STATUS_FAULT = 1 + FAN_STATUS_NORMAL = 0 + + global fan_state + global fan_status_state + + for idx in range (0, self.fan_num): + node = self.fan_path + self.present[idx] + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if fan_state[idx]!=1: + fan_state[idx]=FAN_STATE_INSERT + logging.info("FAN-%d present is detected", idx+1); + else: + if fan_state[idx]!=0: + fan_state[idx]=FAN_STATE_REMOVE + logging.warning("Alarm for FAN-%d absent is detected", idx+1) + + for idx in range (0, self.fan_num): + node = self.fan_path + self.fault[idx] + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if fan_status_state[idx]!=FAN_STATUS_FAULT: + if fan_state[idx] == FAN_STATE_INSERT: + logging.warning("Alarm for FAN-%d failed is detected", idx+1); + fan_status_state[idx]=FAN_STATUS_FAULT + else: + fan_status_state[idx]=FAN_STATUS_NORMAL + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + monitor = device_monitor(log_file, log_level) + while True: + monitor.manage_fan() + time.sleep(3) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/accton_as5835_54t_monitor_psu.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/accton_as5835_54t_monitor_psu.py new file mode 100755 index 00000000000..51837c7262b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/accton_as5835_54t_monitor_psu.py @@ -0,0 +1,190 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 7/2/2018: Jostar create for as7326-56x +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as5835_54t_monitor_psu' + +global log_file +global log_level + + +class switch(object): + def __init__(self, value): + self.value = value + self.fall = False + + def __iter__(self): + """Return the match method once, then stop""" + yield self.match + raise StopIteration + + def match(self, *args): + """Indicate whether or not to enter a case suite""" + if self.fall or not args: + return True + elif self.value in args: # changed for v1.5, see below + self.fall = True + return True + else: + return False + + +psu_state=[2, 2] +psu_power_status=[2, 2] +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + + def __init__(self, log_file, log_level): + + self.psu_num = 2 + self.psu_path = "/sys/bus/i2c/devices/" + self.presence = "/psu_present" + self.oper_status = "/psu_power_good" + self.mapping = { + 0: "11-0050", + 1: "12-0053", + } + + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + # set up logging to console + + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + #sys_handler.setLevel(logging.WARNING) + sys_handler.setLevel(logging.INFO) + logging.getLogger('').addHandler(sys_handler) + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_psu(self): + + PSU_STATE_REMOVE = 0 + PSU_STATE_INSERT = 1 + + PSU_STATUS_NO_POWER = 0 + PSU_STATUS_POWER_GOOD = 1 + + global psu_state + global psu_power_status + + for idx in range (0, self.psu_num): + node = self.psu_path + self.mapping[idx] + self.presence + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if psu_state[idx]!=PSU_STATE_INSERT: + psu_state[idx]=PSU_STATE_INSERT + logging.info("PSU-%d present is detected", idx+1); + #psu_power_status[idx]=PSU_STATUS_POWER_GOOD #when insert, assume power is good. If no_power, next code will find it. + else: + if psu_state[idx]!=PSU_STATE_REMOVE: + psu_state[idx]=PSU_STATE_REMOVE + logging.warning("Alarm for PSU-%d absent is detected", idx+1); + psu_power_status[idx]=PSU_STATUS_NO_POWER + + for idx in range (0, self.psu_num): + node = self.psu_path + self.mapping[idx] + self.oper_status + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + #logging.info("content=%s, psu_power_status[%d]=%d", content, idx, psu_power_status[idx]); + if content == "0": + if psu_power_status[idx]!=PSU_STATUS_NO_POWER: + if psu_state[idx]==PSU_STATE_INSERT: + logging.warning("Alarm for PSU-%d fault is detected", idx+1); + psu_power_status[idx]=PSU_STATUS_NO_POWER + else: + if psu_power_status[idx] !=PSU_STATUS_POWER_GOOD: + logging.info("PSU-%d power_good is detected", idx+1); + psu_power_status[idx]=PSU_STATUS_POWER_GOOD + + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + monitor = device_monitor(log_file, log_level) + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_psu() + time.sleep(3) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/accton_as5835_54t_util.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/accton_as5835_54t_util.py new file mode 100755 index 00000000000..a07ab1a1bc7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/utils/accton_as5835_54t_util.py @@ -0,0 +1,576 @@ +#!/usr/bin/env python +# +# Copyright (C) 2019 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + + + + +PROJECT_NAME = 'as5835_54t' +version = '0.1.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan':5,'thermal':4, 'psu':2, 'sfp':6} +FORCE = 0 +#logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +#logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 49-54 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-54 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[Debug]"+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_check(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + return True + + + +kos = [ +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe accton_as5835_54t_cpld' , +'modprobe ym2651y' , +'modprobe accton_as5835_54t_fan' , +'modprobe optoe' , +'modprobe accton_as5835_54t_leds' , +'modprobe accton_as5835_54t_psu' ] + +def driver_install(): + global FORCE + status, output = log_os_system("depmod", 1) + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + lst = rm.split(" ") + if len(lst) > 3: + del(lst[3]) + rm = " ".join(lst) + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +led_prefix ='/sys/class/leds/accton_'+PROJECT_NAME+'_led::' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2']} +hwmon_nodes = {'led': ['brightness'] } +hwmon_prefix ={'led': led_prefix} + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'fan': ['3-0063'] , + 'thermal': ['18-004b','19-004c', '20-0049', '21-004a'] , + 'psu': ['11-0050','12-0053'], + 'sfp': ['-0050']} +i2c_nodes = {'fan': ['present', 'front_speed_rpm', 'rear_speed_rpm'] , + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['module_present_', 'module_tx_disable_']} + +sfp_map = [28,29,26,30,31,27] + +qsfp_start = 48 + +mknod =[ +'echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-2/new_device' , +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-2/new_device' , +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-2/new_device' , +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-1/new_device', + +'echo as5835_54t_fan 0x63 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4c > /sys/bus/i2c/devices/i2c-19/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-20/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-21/new_device', +'echo as5835_54t_psu1 0x50 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo ym2401 0x58 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as5835_54t_psu2 0x53 > /sys/bus/i2c/devices/i2c-12/new_device', +'echo ym2401 0x5b > /sys/bus/i2c/devices/i2c-12/new_device', +'echo as5835_54t_cpld1 0x60 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo as5835_54t_cpld2 0x61 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo as5835_54t_cpld3 0x62 > /sys/bus/i2c/devices/i2c-3/new_device'] + +mknod2 =[ +'echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-2/new_device' , +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-2/new_device' , +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-2/new_device' , +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-0/new_device', + +'echo as5835_54t_fan 0x63 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4c > /sys/bus/i2c/devices/i2c-19/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-20/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-21/new_device', +'echo as5835_54t_psu1 0x50 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo ym2401 0x58 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as5835_54t_psu2 0x53 > /sys/bus/i2c/devices/i2c-12/new_device', +'echo ym2401 0x5b > /sys/bus/i2c/devices/i2c-12/new_device', +'echo as5835_54t_cpld1 0x60 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo as5835_54t_cpld2 0x61 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo as5835_54t_cpld3 0x62 > /sys/bus/i2c/devices/i2c-3/new_device'] + + +def i2c_order_check(): + # i2c bus 0 and 1 might be installed in different order. + # Here check if 0x77 is exist @ i2c-1 + tmp = "echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-1/new_device" + status, output = log_os_system(tmp, 0) + if not device_exist(): + order = 1 + else: + order = 0 + tmp = "echo 0x77 > /sys/bus/i2c/devices/i2c-1/delete_device" + status, output = log_os_system(tmp, 0) + return order + +def device_install(): + global FORCE + + order = i2c_order_check() + + # if 0x77 is not exist @i2c-1, use reversed bus order + if order: + for i in range(0,len(mknod2)): + #for pca954x need times to built new i2c buses + if mknod2[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod2[i], 1) + time.sleep(0.01) + if status: + print output + if FORCE == 0: + return status + else: + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + for i in range(0,len(sfp_map)): + status, output =log_os_system("echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + path = "/sys/bus/i2c/devices/{0}-0050/port_name" + status, output =log_os_system("echo port{0} > ".format(i+49)+path.format(sfp_map[i]), 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/0-0077", 0) + if status==0: + I2C_ORDER=1 + else: + I2C_ORDER=0 + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + if I2C_ORDER==0: + nodelist = mknod + else: + nodelist = mknod2 + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_check() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_check() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_check()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'sfp_eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~5 is all fine, all fan share same setting + node = ALL_DEVICE['fan'] ['fan1'][0] + node = node.replace(node.split("/")[-1], 'fan_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0077", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/classes/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/classes/fanutil.py new file mode 100644 index 00000000000..c741ebfd724 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/classes/fanutil.py @@ -0,0 +1,237 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 5/27/2019: Brandon_Chuang create +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_NUM_ON_MAIN_BROAD = 5 + FAN_NUM_1_IDX = 1 + FAN_NUM_2_IDX = 2 + FAN_NUM_3_IDX = 3 + FAN_NUM_4_IDX = 4 + FAN_NUM_5_IDX = 5 + + FAN_NODE_NUM_OF_MAP = 2 + FAN_NODE_FAULT_IDX_OF_MAP = 1 + FAN_NODE_DIR_IDX_OF_MAP = 2 + + BASE_VAL_PATH = '/sys/bus/i2c/devices/3-0063/{0}' + FAN_DUTY_PATH = '/sys/bus/i2c/devices/3-0063/fan_duty_cycle_percentage' + + #logfile = '' + #loglevel = logging.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + _fan_to_device_path_mapping = {} + +#fan1_direction +#fan1_fault +#fan1_present + + #(FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage', + _fan_to_device_node_mapping = { + (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault', + (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction', + + (FAN_NUM_2_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan2_fault', + (FAN_NUM_2_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan2_direction', + + (FAN_NUM_3_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan3_fault', + (FAN_NUM_3_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan3_direction', + + (FAN_NUM_4_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan4_fault', + (FAN_NUM_4_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan4_direction', + + (FAN_NUM_5_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan5_fault', + (FAN_NUM_5_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan5_direction', + } + + def _get_fan_to_device_node(self, fan_num, node_num): + return self._fan_to_device_node_mapping[(fan_num, node_num)] + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + + try: + val_file = open(device_path, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + def __init__(self): + fan_path = self.BASE_VAL_PATH + + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_NUM_ON_MAIN_BROAD+1): + for node_num in range(self.FAN_NODE_FAULT_IDX_OF_MAP, self.FAN_NODE_NUM_OF_MAP+1): + self._fan_to_device_path_mapping[(fan_num, node_num)] = fan_path.format( + self._fan_to_device_node_mapping[(fan_num, node_num)]) + + def get_num_fans(self): + return self.FAN_NUM_ON_MAIN_BROAD + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM_OF_MAP + + def get_idx_node_start(self): + return self.FAN_NODE_FAULT_IDX_OF_MAP + + def get_size_node_map(self): + return len(self._fan_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._fan_to_device_path_mapping) + + def get_fan_to_device_path(self, fan_num, node_num): + return self._fan_to_device_path_mapping[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_FAULT_IDX_OF_MAP) + + #def get_fan_speed(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FAN_NODE_SPEED_IDX_OF_MAP) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DIR_IDX_OF_MAP) + + def get_fan_duty_cycle(self): + #duty_path = self.FAN_DUTY_PATH + try: + val_file = open(self.FAN_DUTY_PATH) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + return int(content) + + def set_fan_duty_cycle(self, val): + try: + fan_file = open(self.FAN_DUTY_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + fan_file.write(str(val)) + fan_file.close() + return True + + #def get_fanr_fault(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FANR_NODE_FAULT_IDX_OF_MAP) + + def get_fanr_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP) + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num, %d', fan_num) + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + logging.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + #if self.get_fanr_fault(fan_num) is not None and self.get_fanr_fault(fan_num) > 0: + # logging.debug('GET. FANR fault. fan_num, %d', fan_num) + # return False + + return True + +#def main(): +# fan = FanUtil() +# +# print 'get_size_node_map : %d' % fan.get_size_node_map() +# print 'get_size_path_map : %d' % fan.get_size_path_map() +# for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): +# for y in range(fan.get_idx_node_start(), fan.get_num_nodes()+1): +# print fan.get_fan_to_device_path(x, y) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/classes/thermalutil.py new file mode 100644 index 00000000000..ce903db3548 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/classes/thermalutil.py @@ -0,0 +1,129 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 5/27/2019: Brandon_Chuang create +# ------------------------------------------------------------------ + +try: + import os + import time + import logging + import glob + import commands + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + THERMAL_NUM_MAX = 4 + THERMAL_NUM_1_IDX = 1 # 1_ON_CPU_BROAD. LM75 + THERMAL_NUM_2_IDX = 2 # 2_ON_MAIN_BROAD. LM75 + THERMAL_NUM_3_IDX = 3 # 3_ON_MAIN_BROAD. LM75 + THERMAL_NUM_4_IDX = 4 # 4_ON_MAIN_BROAD. LM75 + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + #_thermal_to_device_path_mapping = {} + + _thermal_to_device_node_mapping = { + THERMAL_NUM_1_IDX: ['18', '4b'], + THERMAL_NUM_2_IDX: ['19', '4c'], + THERMAL_NUM_3_IDX: ['20', '49'], + THERMAL_NUM_4_IDX: ['21', '4a'], + } + thermal_sysfspath ={ + THERMAL_NUM_1_IDX: ["/sys/bus/i2c/devices/18-004b/hwmon/hwmon3/temp1_input"], + THERMAL_NUM_2_IDX: ["/sys/bus/i2c/devices/19-004c/hwmon/hwmon4/temp1_input"], + THERMAL_NUM_3_IDX: ["/sys/bus/i2c/devices/20-0049/hwmon/hwmon5/temp1_input"], + THERMAL_NUM_4_IDX: ["/sys/bus/i2c/devices/21-004a/hwmon/hwmon6/temp1_input"], + } + + #def __init__(self): + def _get_thermal_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_MAX: + logging.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_to_device_path(thermal_num) + if(os.path.isfile(device_path)): + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + content = val_file.readline().rstrip() + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + return int(content) + + else: + print "No such device_path=%s"%device_path + return 0 + + def get_num_thermals(self): + return self.THERMAL_NUM_MAX + + def get_idx_thermal_start(self): + return self.THERMAL_NUM_1_IDX + + def get_size_node_map(self): + return len(self._thermal_to_device_node_mapping) + + def get_size_path_map(self): + return len(self.thermal_sysfspath) + + def get_thermal_to_device_path(self, thermal_num): + return self.thermal_sysfspath[thermal_num][0] + + def get_thermal_1_val(self): + return self._get_thermal_val(self.THERMAL_NUM_1_IDX) + + def get_thermal_2_val(self): + return self._get_thermal_val(self.THERMAL_NUM_2_IDX) + + def get_thermal_3_val(self): + return self._get_thermal_val(self.THERMAL_NUM_3_IDX) + + def get_thermal_temp(self): + return (self._get_thermal_val(self.THERMAL_NUM_1_IDX) + self._get_thermal_val(self.THERMAL_NUM_2_IDX) +self._get_thermal_val(self.THERMAL_NUM_3_IDX)) + +def main(): + thermal = ThermalUtil() + print "termal1=%d" %thermal._get_thermal_val(1) + print "termal2=%d" %thermal._get_thermal_val(2) + print "termal3=%d" %thermal._get_thermal_val(3) + print "termal4=%d" %thermal._get_thermal_val(4) +# +# print 'get_size_node_map : %d' % thermal.get_size_node_map() +# print 'get_size_path_map : %d' % thermal.get_size_path_map() +# for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): +# print thermal.get_thermal_to_device_path(x) +# +if __name__ == '__main__': + main() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/Makefile new file mode 100644 index 00000000000..ec29de5fe79 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/Makefile @@ -0,0 +1,17 @@ +ifneq ($(KERNELRELEASE),) +obj-m:= accton_as5835_54x_cpld.o accton_as5835_54x_psu.o \ + accton_as5835_54x_fan.o accton_as5835_54x_leds.o \ + ym2651y.o + +else +ifeq (,$(KERNEL_SRC)) +$(error KERNEL_SRC is not defined) +else +KERNELDIR:=$(KERNEL_SRC) +endif +PWD:=$(shell pwd) +default: + $(MAKE) -C $(KERNELDIR) M=$(PWD) modules +clean: + rm -rf *.o *.mod.o *.mod.o *.ko .*cmd .tmp_versions Module.markers Module.symvers modules.order +endif diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_cpld.c new file mode 100644 index 00000000000..c9d4f1c31e5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_cpld.c @@ -0,0 +1,1196 @@ +/* + * Copyright (C) Brandon Chuang + * + * This module supports the accton cpld that hold the channel select + * mechanism for other i2c slave devices, such as SFP. + * This includes the: + * Accton as5835_54x CPLD1/CPLD2/CPLD3 + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +enum cpld_type { + as5835_54x_cpld1, + as5835_54x_cpld2, + as5835_54x_cpld3 +}; + +struct as5835_54x_cpld_data { + enum cpld_type type; + struct device *hwmon_dev; + struct mutex update_lock; +}; + +static const struct i2c_device_id as5835_54x_cpld_id[] = { + { "as5835_54x_cpld1", as5835_54x_cpld1 }, + { "as5835_54x_cpld2", as5835_54x_cpld2 }, + { "as5835_54x_cpld3", as5835_54x_cpld3 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, as5835_54x_cpld_id); + +#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index +#define TRANSCEIVER_TXDISABLE_ATTR_ID(index) MODULE_TXDISABLE_##index +#define TRANSCEIVER_RXLOS_ATTR_ID(index) MODULE_RXLOS_##index +#define TRANSCEIVER_TXFAULT_ATTR_ID(index) MODULE_TXFAULT_##index +#define TRANSCEIVER_LPMODE_ATTR_ID(index) MODULE_LPMODE_##index +#define TRANSCEIVER_RESET_ATTR_ID(index) MODULE_RESET_##index + +enum as5835_54x_cpld1_sysfs_attributes { + CPLD_VERSION, + ACCESS, + MODULE_PRESENT_ALL, + MODULE_RXLOS_ALL, + /* transceiver attributes */ + TRANSCEIVER_PRESENT_ATTR_ID(1), + TRANSCEIVER_PRESENT_ATTR_ID(2), + TRANSCEIVER_PRESENT_ATTR_ID(3), + TRANSCEIVER_PRESENT_ATTR_ID(4), + TRANSCEIVER_PRESENT_ATTR_ID(5), + TRANSCEIVER_PRESENT_ATTR_ID(6), + TRANSCEIVER_PRESENT_ATTR_ID(7), + TRANSCEIVER_PRESENT_ATTR_ID(8), + TRANSCEIVER_PRESENT_ATTR_ID(9), + TRANSCEIVER_PRESENT_ATTR_ID(10), + TRANSCEIVER_PRESENT_ATTR_ID(11), + TRANSCEIVER_PRESENT_ATTR_ID(12), + TRANSCEIVER_PRESENT_ATTR_ID(13), + TRANSCEIVER_PRESENT_ATTR_ID(14), + TRANSCEIVER_PRESENT_ATTR_ID(15), + TRANSCEIVER_PRESENT_ATTR_ID(16), + TRANSCEIVER_PRESENT_ATTR_ID(17), + TRANSCEIVER_PRESENT_ATTR_ID(18), + TRANSCEIVER_PRESENT_ATTR_ID(19), + TRANSCEIVER_PRESENT_ATTR_ID(20), + TRANSCEIVER_PRESENT_ATTR_ID(21), + TRANSCEIVER_PRESENT_ATTR_ID(22), + TRANSCEIVER_PRESENT_ATTR_ID(23), + TRANSCEIVER_PRESENT_ATTR_ID(24), + TRANSCEIVER_PRESENT_ATTR_ID(25), + TRANSCEIVER_PRESENT_ATTR_ID(26), + TRANSCEIVER_PRESENT_ATTR_ID(27), + TRANSCEIVER_PRESENT_ATTR_ID(28), + TRANSCEIVER_PRESENT_ATTR_ID(29), + TRANSCEIVER_PRESENT_ATTR_ID(30), + TRANSCEIVER_PRESENT_ATTR_ID(31), + TRANSCEIVER_PRESENT_ATTR_ID(32), + TRANSCEIVER_PRESENT_ATTR_ID(33), + TRANSCEIVER_PRESENT_ATTR_ID(34), + TRANSCEIVER_PRESENT_ATTR_ID(35), + TRANSCEIVER_PRESENT_ATTR_ID(36), + TRANSCEIVER_PRESENT_ATTR_ID(37), + TRANSCEIVER_PRESENT_ATTR_ID(38), + TRANSCEIVER_PRESENT_ATTR_ID(39), + TRANSCEIVER_PRESENT_ATTR_ID(40), + TRANSCEIVER_PRESENT_ATTR_ID(41), + TRANSCEIVER_PRESENT_ATTR_ID(42), + TRANSCEIVER_PRESENT_ATTR_ID(43), + TRANSCEIVER_PRESENT_ATTR_ID(44), + TRANSCEIVER_PRESENT_ATTR_ID(45), + TRANSCEIVER_PRESENT_ATTR_ID(46), + TRANSCEIVER_PRESENT_ATTR_ID(47), + TRANSCEIVER_PRESENT_ATTR_ID(48), + TRANSCEIVER_PRESENT_ATTR_ID(49), + TRANSCEIVER_PRESENT_ATTR_ID(50), + TRANSCEIVER_PRESENT_ATTR_ID(51), + TRANSCEIVER_PRESENT_ATTR_ID(52), + TRANSCEIVER_PRESENT_ATTR_ID(53), + TRANSCEIVER_PRESENT_ATTR_ID(54), + TRANSCEIVER_TXDISABLE_ATTR_ID(1), + TRANSCEIVER_TXDISABLE_ATTR_ID(2), + TRANSCEIVER_TXDISABLE_ATTR_ID(3), + TRANSCEIVER_TXDISABLE_ATTR_ID(4), + TRANSCEIVER_TXDISABLE_ATTR_ID(5), + TRANSCEIVER_TXDISABLE_ATTR_ID(6), + TRANSCEIVER_TXDISABLE_ATTR_ID(7), + TRANSCEIVER_TXDISABLE_ATTR_ID(8), + TRANSCEIVER_TXDISABLE_ATTR_ID(9), + TRANSCEIVER_TXDISABLE_ATTR_ID(10), + TRANSCEIVER_TXDISABLE_ATTR_ID(11), + TRANSCEIVER_TXDISABLE_ATTR_ID(12), + TRANSCEIVER_TXDISABLE_ATTR_ID(13), + TRANSCEIVER_TXDISABLE_ATTR_ID(14), + TRANSCEIVER_TXDISABLE_ATTR_ID(15), + TRANSCEIVER_TXDISABLE_ATTR_ID(16), + TRANSCEIVER_TXDISABLE_ATTR_ID(17), + TRANSCEIVER_TXDISABLE_ATTR_ID(18), + TRANSCEIVER_TXDISABLE_ATTR_ID(19), + TRANSCEIVER_TXDISABLE_ATTR_ID(20), + TRANSCEIVER_TXDISABLE_ATTR_ID(21), + TRANSCEIVER_TXDISABLE_ATTR_ID(22), + TRANSCEIVER_TXDISABLE_ATTR_ID(23), + TRANSCEIVER_TXDISABLE_ATTR_ID(24), + TRANSCEIVER_TXDISABLE_ATTR_ID(25), + TRANSCEIVER_TXDISABLE_ATTR_ID(26), + TRANSCEIVER_TXDISABLE_ATTR_ID(27), + TRANSCEIVER_TXDISABLE_ATTR_ID(28), + TRANSCEIVER_TXDISABLE_ATTR_ID(29), + TRANSCEIVER_TXDISABLE_ATTR_ID(30), + TRANSCEIVER_TXDISABLE_ATTR_ID(31), + TRANSCEIVER_TXDISABLE_ATTR_ID(32), + TRANSCEIVER_TXDISABLE_ATTR_ID(33), + TRANSCEIVER_TXDISABLE_ATTR_ID(34), + TRANSCEIVER_TXDISABLE_ATTR_ID(35), + TRANSCEIVER_TXDISABLE_ATTR_ID(36), + TRANSCEIVER_TXDISABLE_ATTR_ID(37), + TRANSCEIVER_TXDISABLE_ATTR_ID(38), + TRANSCEIVER_TXDISABLE_ATTR_ID(39), + TRANSCEIVER_TXDISABLE_ATTR_ID(40), + TRANSCEIVER_TXDISABLE_ATTR_ID(41), + TRANSCEIVER_TXDISABLE_ATTR_ID(42), + TRANSCEIVER_TXDISABLE_ATTR_ID(43), + TRANSCEIVER_TXDISABLE_ATTR_ID(44), + TRANSCEIVER_TXDISABLE_ATTR_ID(45), + TRANSCEIVER_TXDISABLE_ATTR_ID(46), + TRANSCEIVER_TXDISABLE_ATTR_ID(47), + TRANSCEIVER_TXDISABLE_ATTR_ID(48), + TRANSCEIVER_RXLOS_ATTR_ID(1), + TRANSCEIVER_RXLOS_ATTR_ID(2), + TRANSCEIVER_RXLOS_ATTR_ID(3), + TRANSCEIVER_RXLOS_ATTR_ID(4), + TRANSCEIVER_RXLOS_ATTR_ID(5), + TRANSCEIVER_RXLOS_ATTR_ID(6), + TRANSCEIVER_RXLOS_ATTR_ID(7), + TRANSCEIVER_RXLOS_ATTR_ID(8), + TRANSCEIVER_RXLOS_ATTR_ID(9), + TRANSCEIVER_RXLOS_ATTR_ID(10), + TRANSCEIVER_RXLOS_ATTR_ID(11), + TRANSCEIVER_RXLOS_ATTR_ID(12), + TRANSCEIVER_RXLOS_ATTR_ID(13), + TRANSCEIVER_RXLOS_ATTR_ID(14), + TRANSCEIVER_RXLOS_ATTR_ID(15), + TRANSCEIVER_RXLOS_ATTR_ID(16), + TRANSCEIVER_RXLOS_ATTR_ID(17), + TRANSCEIVER_RXLOS_ATTR_ID(18), + TRANSCEIVER_RXLOS_ATTR_ID(19), + TRANSCEIVER_RXLOS_ATTR_ID(20), + TRANSCEIVER_RXLOS_ATTR_ID(21), + TRANSCEIVER_RXLOS_ATTR_ID(22), + TRANSCEIVER_RXLOS_ATTR_ID(23), + TRANSCEIVER_RXLOS_ATTR_ID(24), + TRANSCEIVER_RXLOS_ATTR_ID(25), + TRANSCEIVER_RXLOS_ATTR_ID(26), + TRANSCEIVER_RXLOS_ATTR_ID(27), + TRANSCEIVER_RXLOS_ATTR_ID(28), + TRANSCEIVER_RXLOS_ATTR_ID(29), + TRANSCEIVER_RXLOS_ATTR_ID(30), + TRANSCEIVER_RXLOS_ATTR_ID(31), + TRANSCEIVER_RXLOS_ATTR_ID(32), + TRANSCEIVER_RXLOS_ATTR_ID(33), + TRANSCEIVER_RXLOS_ATTR_ID(34), + TRANSCEIVER_RXLOS_ATTR_ID(35), + TRANSCEIVER_RXLOS_ATTR_ID(36), + TRANSCEIVER_RXLOS_ATTR_ID(37), + TRANSCEIVER_RXLOS_ATTR_ID(38), + TRANSCEIVER_RXLOS_ATTR_ID(39), + TRANSCEIVER_RXLOS_ATTR_ID(40), + TRANSCEIVER_RXLOS_ATTR_ID(41), + TRANSCEIVER_RXLOS_ATTR_ID(42), + TRANSCEIVER_RXLOS_ATTR_ID(43), + TRANSCEIVER_RXLOS_ATTR_ID(44), + TRANSCEIVER_RXLOS_ATTR_ID(45), + TRANSCEIVER_RXLOS_ATTR_ID(46), + TRANSCEIVER_RXLOS_ATTR_ID(47), + TRANSCEIVER_RXLOS_ATTR_ID(48), + TRANSCEIVER_TXFAULT_ATTR_ID(1), + TRANSCEIVER_TXFAULT_ATTR_ID(2), + TRANSCEIVER_TXFAULT_ATTR_ID(3), + TRANSCEIVER_TXFAULT_ATTR_ID(4), + TRANSCEIVER_TXFAULT_ATTR_ID(5), + TRANSCEIVER_TXFAULT_ATTR_ID(6), + TRANSCEIVER_TXFAULT_ATTR_ID(7), + TRANSCEIVER_TXFAULT_ATTR_ID(8), + TRANSCEIVER_TXFAULT_ATTR_ID(9), + TRANSCEIVER_TXFAULT_ATTR_ID(10), + TRANSCEIVER_TXFAULT_ATTR_ID(11), + TRANSCEIVER_TXFAULT_ATTR_ID(12), + TRANSCEIVER_TXFAULT_ATTR_ID(13), + TRANSCEIVER_TXFAULT_ATTR_ID(14), + TRANSCEIVER_TXFAULT_ATTR_ID(15), + TRANSCEIVER_TXFAULT_ATTR_ID(16), + TRANSCEIVER_TXFAULT_ATTR_ID(17), + TRANSCEIVER_TXFAULT_ATTR_ID(18), + TRANSCEIVER_TXFAULT_ATTR_ID(19), + TRANSCEIVER_TXFAULT_ATTR_ID(20), + TRANSCEIVER_TXFAULT_ATTR_ID(21), + TRANSCEIVER_TXFAULT_ATTR_ID(22), + TRANSCEIVER_TXFAULT_ATTR_ID(23), + TRANSCEIVER_TXFAULT_ATTR_ID(24), + TRANSCEIVER_TXFAULT_ATTR_ID(25), + TRANSCEIVER_TXFAULT_ATTR_ID(26), + TRANSCEIVER_TXFAULT_ATTR_ID(27), + TRANSCEIVER_TXFAULT_ATTR_ID(28), + TRANSCEIVER_TXFAULT_ATTR_ID(29), + TRANSCEIVER_TXFAULT_ATTR_ID(30), + TRANSCEIVER_TXFAULT_ATTR_ID(31), + TRANSCEIVER_TXFAULT_ATTR_ID(32), + TRANSCEIVER_TXFAULT_ATTR_ID(33), + TRANSCEIVER_TXFAULT_ATTR_ID(34), + TRANSCEIVER_TXFAULT_ATTR_ID(35), + TRANSCEIVER_TXFAULT_ATTR_ID(36), + TRANSCEIVER_TXFAULT_ATTR_ID(37), + TRANSCEIVER_TXFAULT_ATTR_ID(38), + TRANSCEIVER_TXFAULT_ATTR_ID(39), + TRANSCEIVER_TXFAULT_ATTR_ID(40), + TRANSCEIVER_TXFAULT_ATTR_ID(41), + TRANSCEIVER_TXFAULT_ATTR_ID(42), + TRANSCEIVER_TXFAULT_ATTR_ID(43), + TRANSCEIVER_TXFAULT_ATTR_ID(44), + TRANSCEIVER_TXFAULT_ATTR_ID(45), + TRANSCEIVER_TXFAULT_ATTR_ID(46), + TRANSCEIVER_TXFAULT_ATTR_ID(47), + TRANSCEIVER_TXFAULT_ATTR_ID(48), + TRANSCEIVER_LPMODE_ATTR_ID(49), + TRANSCEIVER_LPMODE_ATTR_ID(50), + TRANSCEIVER_LPMODE_ATTR_ID(51), + TRANSCEIVER_LPMODE_ATTR_ID(52), + TRANSCEIVER_LPMODE_ATTR_ID(53), + TRANSCEIVER_LPMODE_ATTR_ID(54), + TRANSCEIVER_RESET_ATTR_ID(49), + TRANSCEIVER_RESET_ATTR_ID(50), + TRANSCEIVER_RESET_ATTR_ID(51), + TRANSCEIVER_RESET_ATTR_ID(52), + TRANSCEIVER_RESET_ATTR_ID(53), + TRANSCEIVER_RESET_ATTR_ID(54), +}; + +/* sysfs attributes for hwmon + */ +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_rxlos_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_control(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +static int as5835_54x_cpld_read_internal(struct i2c_client *client, u8 reg); +static int as5835_54x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value); + +/* transceiver attributes */ +#define DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_status, NULL, MODULE_PRESENT_##index) +#define DECLARE_TRANSCEIVER_PRESENT_ATTR(index) &sensor_dev_attr_module_present_##index.dev_attr.attr + +#define DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_tx_disable_##index, S_IRUGO | S_IWUSR, show_status, set_control, MODULE_TXDISABLE_##index); \ + static SENSOR_DEVICE_ATTR(module_rx_los_##index, S_IRUGO, show_status, NULL, MODULE_RXLOS_##index); \ + static SENSOR_DEVICE_ATTR(module_tx_fault_##index, S_IRUGO, show_status, NULL, MODULE_TXFAULT_##index) +#define DECLARE_SFP_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_tx_disable_##index.dev_attr.attr, \ + &sensor_dev_attr_module_rx_los_##index.dev_attr.attr, \ + &sensor_dev_attr_module_tx_fault_##index.dev_attr.attr + +#define DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_lpmode_##index, S_IRUGO | S_IWUSR, show_status, set_control, MODULE_LPMODE_##index); \ + static SENSOR_DEVICE_ATTR(module_reset_##index, S_IRUGO | S_IWUSR, show_status, set_control, MODULE_RESET_##index) +#define DECLARE_QSFP_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_lpmode_##index.dev_attr.attr, \ + &sensor_dev_attr_module_reset_##index.dev_attr.attr + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS); +/* transceiver attributes */ +static SENSOR_DEVICE_ATTR(module_present_all, S_IRUGO, show_present_all, NULL, MODULE_PRESENT_ALL); +static SENSOR_DEVICE_ATTR(module_rx_los_all, S_IRUGO, show_rxlos_all, NULL, MODULE_RXLOS_ALL); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(1); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(2); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(3); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(4); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(5); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(6); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(7); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(8); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(9); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(10); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(11); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(12); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(13); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(14); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(15); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(16); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(17); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(18); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(19); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(20); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(21); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(22); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(23); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(24); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(25); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(26); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(27); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(28); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(29); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(30); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(31); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(32); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(33); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(34); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(35); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(36); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(37); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(38); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(39); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(40); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(41); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(42); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(43); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(44); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(45); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(46); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(47); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(48); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(49); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(50); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(51); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(52); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(53); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(54); + +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(1); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(2); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(3); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(4); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(5); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(6); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(7); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(8); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(9); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(10); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(11); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(12); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(13); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(14); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(15); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(16); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(17); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(18); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(19); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(20); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(21); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(22); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(23); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(24); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(25); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(26); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(27); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(28); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(29); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(30); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(31); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(32); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(33); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(34); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(35); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(36); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(37); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(38); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(39); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(40); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(41); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(42); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(43); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(44); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(45); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(46); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(47); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(48); + +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(49); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(50); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(51); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(52); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(53); +DECLARE_QSFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(54); + +static struct attribute *as5835_54x_cpld1_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + NULL +}; + +static const struct attribute_group as5835_54x_cpld1_group = { + .attrs = as5835_54x_cpld1_attributes, +}; + +static struct attribute *as5835_54x_cpld2_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + &sensor_dev_attr_module_rx_los_all.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(1), + DECLARE_TRANSCEIVER_PRESENT_ATTR(2), + DECLARE_TRANSCEIVER_PRESENT_ATTR(3), + DECLARE_TRANSCEIVER_PRESENT_ATTR(4), + DECLARE_TRANSCEIVER_PRESENT_ATTR(5), + DECLARE_TRANSCEIVER_PRESENT_ATTR(6), + DECLARE_TRANSCEIVER_PRESENT_ATTR(7), + DECLARE_TRANSCEIVER_PRESENT_ATTR(8), + DECLARE_TRANSCEIVER_PRESENT_ATTR(9), + DECLARE_TRANSCEIVER_PRESENT_ATTR(10), + DECLARE_TRANSCEIVER_PRESENT_ATTR(11), + DECLARE_TRANSCEIVER_PRESENT_ATTR(12), + DECLARE_TRANSCEIVER_PRESENT_ATTR(13), + DECLARE_TRANSCEIVER_PRESENT_ATTR(14), + DECLARE_TRANSCEIVER_PRESENT_ATTR(15), + DECLARE_TRANSCEIVER_PRESENT_ATTR(16), + DECLARE_TRANSCEIVER_PRESENT_ATTR(17), + DECLARE_TRANSCEIVER_PRESENT_ATTR(18), + DECLARE_TRANSCEIVER_PRESENT_ATTR(19), + DECLARE_TRANSCEIVER_PRESENT_ATTR(20), + DECLARE_TRANSCEIVER_PRESENT_ATTR(21), + DECLARE_TRANSCEIVER_PRESENT_ATTR(22), + DECLARE_TRANSCEIVER_PRESENT_ATTR(23), + DECLARE_TRANSCEIVER_PRESENT_ATTR(24), + DECLARE_TRANSCEIVER_PRESENT_ATTR(25), + DECLARE_TRANSCEIVER_PRESENT_ATTR(26), + DECLARE_TRANSCEIVER_PRESENT_ATTR(27), + DECLARE_TRANSCEIVER_PRESENT_ATTR(28), + DECLARE_TRANSCEIVER_PRESENT_ATTR(29), + DECLARE_TRANSCEIVER_PRESENT_ATTR(30), + DECLARE_TRANSCEIVER_PRESENT_ATTR(31), + DECLARE_TRANSCEIVER_PRESENT_ATTR(32), + DECLARE_TRANSCEIVER_PRESENT_ATTR(33), + DECLARE_TRANSCEIVER_PRESENT_ATTR(34), + DECLARE_TRANSCEIVER_PRESENT_ATTR(35), + DECLARE_TRANSCEIVER_PRESENT_ATTR(36), + DECLARE_TRANSCEIVER_PRESENT_ATTR(37), + DECLARE_TRANSCEIVER_PRESENT_ATTR(38), + DECLARE_SFP_TRANSCEIVER_ATTR(1), + DECLARE_SFP_TRANSCEIVER_ATTR(2), + DECLARE_SFP_TRANSCEIVER_ATTR(3), + DECLARE_SFP_TRANSCEIVER_ATTR(4), + DECLARE_SFP_TRANSCEIVER_ATTR(5), + DECLARE_SFP_TRANSCEIVER_ATTR(6), + DECLARE_SFP_TRANSCEIVER_ATTR(7), + DECLARE_SFP_TRANSCEIVER_ATTR(8), + DECLARE_SFP_TRANSCEIVER_ATTR(9), + DECLARE_SFP_TRANSCEIVER_ATTR(10), + DECLARE_SFP_TRANSCEIVER_ATTR(11), + DECLARE_SFP_TRANSCEIVER_ATTR(12), + DECLARE_SFP_TRANSCEIVER_ATTR(13), + DECLARE_SFP_TRANSCEIVER_ATTR(14), + DECLARE_SFP_TRANSCEIVER_ATTR(15), + DECLARE_SFP_TRANSCEIVER_ATTR(16), + DECLARE_SFP_TRANSCEIVER_ATTR(17), + DECLARE_SFP_TRANSCEIVER_ATTR(18), + DECLARE_SFP_TRANSCEIVER_ATTR(19), + DECLARE_SFP_TRANSCEIVER_ATTR(20), + DECLARE_SFP_TRANSCEIVER_ATTR(21), + DECLARE_SFP_TRANSCEIVER_ATTR(22), + DECLARE_SFP_TRANSCEIVER_ATTR(23), + DECLARE_SFP_TRANSCEIVER_ATTR(24), + DECLARE_SFP_TRANSCEIVER_ATTR(25), + DECLARE_SFP_TRANSCEIVER_ATTR(26), + DECLARE_SFP_TRANSCEIVER_ATTR(27), + DECLARE_SFP_TRANSCEIVER_ATTR(28), + DECLARE_SFP_TRANSCEIVER_ATTR(29), + DECLARE_SFP_TRANSCEIVER_ATTR(30), + DECLARE_SFP_TRANSCEIVER_ATTR(31), + DECLARE_SFP_TRANSCEIVER_ATTR(32), + DECLARE_SFP_TRANSCEIVER_ATTR(33), + DECLARE_SFP_TRANSCEIVER_ATTR(34), + DECLARE_SFP_TRANSCEIVER_ATTR(35), + DECLARE_SFP_TRANSCEIVER_ATTR(36), + DECLARE_SFP_TRANSCEIVER_ATTR(37), + DECLARE_SFP_TRANSCEIVER_ATTR(38), + NULL +}; + +static const struct attribute_group as5835_54x_cpld2_group = { + .attrs = as5835_54x_cpld2_attributes, +}; + +static struct attribute *as5835_54x_cpld3_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + &sensor_dev_attr_module_rx_los_all.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(39), + DECLARE_TRANSCEIVER_PRESENT_ATTR(40), + DECLARE_TRANSCEIVER_PRESENT_ATTR(41), + DECLARE_TRANSCEIVER_PRESENT_ATTR(42), + DECLARE_TRANSCEIVER_PRESENT_ATTR(43), + DECLARE_TRANSCEIVER_PRESENT_ATTR(44), + DECLARE_TRANSCEIVER_PRESENT_ATTR(45), + DECLARE_TRANSCEIVER_PRESENT_ATTR(46), + DECLARE_TRANSCEIVER_PRESENT_ATTR(47), + DECLARE_TRANSCEIVER_PRESENT_ATTR(48), + DECLARE_TRANSCEIVER_PRESENT_ATTR(49), + DECLARE_TRANSCEIVER_PRESENT_ATTR(50), + DECLARE_TRANSCEIVER_PRESENT_ATTR(51), + DECLARE_TRANSCEIVER_PRESENT_ATTR(52), + DECLARE_TRANSCEIVER_PRESENT_ATTR(53), + DECLARE_TRANSCEIVER_PRESENT_ATTR(54), + DECLARE_SFP_TRANSCEIVER_ATTR(39), + DECLARE_SFP_TRANSCEIVER_ATTR(40), + DECLARE_SFP_TRANSCEIVER_ATTR(41), + DECLARE_SFP_TRANSCEIVER_ATTR(42), + DECLARE_SFP_TRANSCEIVER_ATTR(43), + DECLARE_SFP_TRANSCEIVER_ATTR(44), + DECLARE_SFP_TRANSCEIVER_ATTR(45), + DECLARE_SFP_TRANSCEIVER_ATTR(46), + DECLARE_SFP_TRANSCEIVER_ATTR(47), + DECLARE_SFP_TRANSCEIVER_ATTR(48), + DECLARE_QSFP_TRANSCEIVER_ATTR(49), + DECLARE_QSFP_TRANSCEIVER_ATTR(50), + DECLARE_QSFP_TRANSCEIVER_ATTR(51), + DECLARE_QSFP_TRANSCEIVER_ATTR(52), + DECLARE_QSFP_TRANSCEIVER_ATTR(53), + DECLARE_QSFP_TRANSCEIVER_ATTR(54), + NULL +}; + +static const struct attribute_group as5835_54x_cpld3_group = { + .attrs = as5835_54x_cpld3_attributes, +}; + +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u8 values[5] = {0}; + u8 regs_cpld2[] = {0x8, 0x9, 0xA, 0xB, 0xC}; + u8 regs_cpld3[] = {0x6, 0x7, 0x14}; + u8 *regs[] = {NULL, regs_cpld2, regs_cpld3}; + u8 size[] = {0, ARRAY_SIZE(regs_cpld2), ARRAY_SIZE(regs_cpld3)}; + struct i2c_client *client = to_i2c_client(dev); + struct as5835_54x_cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + for (i = 0; i < size[data->type]; i++) { + status = as5835_54x_cpld_read_internal(client, regs[data->type][i]); + if (status < 0) { + goto exit; + } + + values[i] = ~(u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values in order */ + if (data->type == as5835_54x_cpld2) { + values[4] &= 0x3F; + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], values[3], values[4]); + } + else { /* as5835_54x_cpld3 */ + values[1] &= 0x3; + values[1] |= (values[2] & 0x3F) << 2; /* Shift port49-54 to bit2-7 */ + return sprintf(buf, "%.2x %.2x\n", values[0], values[1]); + } + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_rxlos_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u8 values[5] = {0}; + u8 regs_cpld2[] = {0x17, 0x18, 0x19, 0x1A, 0x1B}; + u8 regs_cpld3[] = {0xF, 0x10}; + u8 *regs[] = {NULL, regs_cpld2, regs_cpld3}; + u8 size[] = {0, ARRAY_SIZE(regs_cpld2), ARRAY_SIZE(regs_cpld3)}; + struct i2c_client *client = to_i2c_client(dev); + struct as5835_54x_cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + for (i = 0; i < size[data->type]; i++) { + status = as5835_54x_cpld_read_internal(client, regs[data->type][i]); + if (status < 0) { + goto exit; + } + + values[i] = (u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values in order */ + if (data->type == as5835_54x_cpld2) { + values[4] &= 0x3F; + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], values[3], values[4]); + } + else { /* as5835_54x_cpld3 */ + values[1] &= 0x3; + return sprintf(buf, "%.2x %.2x\n", values[0], values[1]); + } + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as5835_54x_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0, revert = 0; + + switch (attr->index) { + case MODULE_PRESENT_1 ... MODULE_PRESENT_8: + reg = 0x8; + mask = 0x1 << (attr->index - MODULE_PRESENT_1); + break; + case MODULE_PRESENT_9 ... MODULE_PRESENT_16: + reg = 0x9; + mask = 0x1 << (attr->index - MODULE_PRESENT_9); + break; + case MODULE_PRESENT_17 ... MODULE_PRESENT_24: + reg = 0xA; + mask = 0x1 << (attr->index - MODULE_PRESENT_17); + break; + case MODULE_PRESENT_25 ... MODULE_PRESENT_32: + reg = 0xB; + mask = 0x1 << (attr->index - MODULE_PRESENT_25); + break; + case MODULE_PRESENT_33 ... MODULE_PRESENT_38: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_PRESENT_33); + break; + case MODULE_PRESENT_39 ... MODULE_PRESENT_46: + reg = 0x6; + mask = 0x1 << (attr->index - MODULE_PRESENT_39); + break; + case MODULE_PRESENT_47 ... MODULE_PRESENT_48: + reg = 0x7; + mask = 0x1 << (attr->index - MODULE_PRESENT_47); + break; + case MODULE_PRESENT_49 ... MODULE_PRESENT_54: + reg = 0x14; + mask = 0x1 << (attr->index - MODULE_PRESENT_49); + break; + case MODULE_TXFAULT_1 ... MODULE_TXFAULT_8: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXFAULT_1); + break; + case MODULE_TXFAULT_9 ... MODULE_TXFAULT_16: + reg = 0xE; + mask = 0x1 << (attr->index - MODULE_TXFAULT_9); + break; + case MODULE_TXFAULT_17 ... MODULE_TXFAULT_24: + reg = 0xF; + mask = 0x1 << (attr->index - MODULE_TXFAULT_17); + break; + case MODULE_TXFAULT_25 ... MODULE_TXFAULT_32: + reg = 0x10; + mask = 0x1 << (attr->index - MODULE_TXFAULT_25); + break; + case MODULE_TXFAULT_33 ... MODULE_TXFAULT_38: + reg = 0x11; + mask = 0x1 << (attr->index - MODULE_TXFAULT_33); + break; + case MODULE_TXFAULT_39 ... MODULE_TXFAULT_46: + reg = 0x9; + mask = 0x1 << (attr->index - MODULE_TXFAULT_39); + break; + case MODULE_TXFAULT_47 ... MODULE_TXFAULT_48: + reg = 0xA; + mask = 0x1 << (attr->index - MODULE_TXFAULT_47); + break; + case MODULE_TXDISABLE_1 ... MODULE_TXDISABLE_8: + reg = 0x12; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_1); + break; + case MODULE_TXDISABLE_9 ... MODULE_TXDISABLE_16: + reg = 0x13; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_9); + break; + case MODULE_TXDISABLE_17 ... MODULE_TXDISABLE_24: + reg = 0x14; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_17); + break; + case MODULE_TXDISABLE_25 ... MODULE_TXDISABLE_32: + reg = 0x15; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_25); + break; + case MODULE_TXDISABLE_33 ... MODULE_TXDISABLE_38: + reg = 0x16; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_33); + break; + case MODULE_TXDISABLE_39 ... MODULE_TXDISABLE_46: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_39); + break; + case MODULE_TXDISABLE_47 ... MODULE_TXDISABLE_48: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_47); + break; + case MODULE_RXLOS_1 ... MODULE_RXLOS_8: + reg = 0x17; + mask = 0x1 << (attr->index - MODULE_RXLOS_1); + break; + case MODULE_RXLOS_9 ... MODULE_RXLOS_16: + reg = 0x18; + mask = 0x1 << (attr->index - MODULE_RXLOS_9); + break; + case MODULE_RXLOS_17 ... MODULE_RXLOS_24: + reg = 0x19; + mask = 0x1 << (attr->index - MODULE_RXLOS_17); + break; + case MODULE_RXLOS_25 ... MODULE_RXLOS_32: + reg = 0x1A; + mask = 0x1 << (attr->index - MODULE_RXLOS_25); + break; + case MODULE_RXLOS_33 ... MODULE_RXLOS_38: + reg = 0x1B; + mask = 0x1 << (attr->index - MODULE_RXLOS_33); + break; + case MODULE_RXLOS_39 ... MODULE_RXLOS_46: + reg = 0xF; + mask = 0x1 << (attr->index - MODULE_RXLOS_39); + break; + case MODULE_RXLOS_47 ... MODULE_RXLOS_48: + reg = 0x10; + mask = 0x1 << (attr->index - MODULE_RXLOS_47); + break; + case MODULE_LPMODE_49 ... MODULE_LPMODE_54: + reg = 0x16; + mask = 0x1 << (attr->index - MODULE_LPMODE_49); + break; + case MODULE_RESET_49 ... MODULE_RESET_54: + reg = 0x15; + mask = 0x1 << (attr->index - MODULE_RESET_49); + break; + default: + return 0; + } + + if (attr->index >= MODULE_PRESENT_1 && attr->index <= MODULE_PRESENT_54) { + revert = 1; + } + + mutex_lock(&data->update_lock); + status = as5835_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", revert ? !(status & mask) : !!(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_control(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as5835_54x_cpld_data *data = i2c_get_clientdata(client); + long value; + int status; + u8 reg = 0, mask = 0; + + status = kstrtol(buf, 10, &value); + if (status) { + return status; + } + + switch (attr->index) { + case MODULE_TXDISABLE_1 ... MODULE_TXDISABLE_8: + reg = 0x12; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_1); + break; + case MODULE_TXDISABLE_9 ... MODULE_TXDISABLE_16: + reg = 0x13; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_9); + break; + case MODULE_TXDISABLE_17 ... MODULE_TXDISABLE_24: + reg = 0x14; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_17); + break; + case MODULE_TXDISABLE_25 ... MODULE_TXDISABLE_32: + reg = 0x15; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_25); + break; + case MODULE_TXDISABLE_33 ... MODULE_TXDISABLE_38: + reg = 0x16; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_33); + break; + case MODULE_TXDISABLE_39 ... MODULE_TXDISABLE_46: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_39); + break; + case MODULE_TXDISABLE_47 ... MODULE_TXDISABLE_48: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_47); + break; + case MODULE_LPMODE_49 ... MODULE_LPMODE_54: + reg = 0x16; + mask = 0x1 << (attr->index - MODULE_LPMODE_49); + break; + case MODULE_RESET_49 ... MODULE_RESET_54: + reg = 0x15; + mask = 0x1 << (attr->index - MODULE_RESET_49); + break; + default: + return 0; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as5835_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update tx_disable/lpmode/reset status */ + if (value) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as5835_54x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct as5835_54x_cpld_data *data = i2c_get_clientdata(client); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = as5835_54x_cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static void as5835_54x_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as5835_54x_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, 0x1); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d\n", val); +} + +/* + * I2C init/probing/exit functions + */ +static int as5835_54x_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + struct as5835_54x_cpld_data *data; + int ret = -ENODEV; + const struct attribute_group *group = NULL; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + goto exit; + + data = kzalloc(sizeof(struct as5835_54x_cpld_data), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->type = id->driver_data; + + /* Register sysfs hooks */ + switch (data->type) { + case as5835_54x_cpld1: + group = &as5835_54x_cpld1_group; + break; + case as5835_54x_cpld2: + group = &as5835_54x_cpld2_group; + break; + case as5835_54x_cpld3: + group = &as5835_54x_cpld3_group; + break; + default: + break; + } + + if (group) { + ret = sysfs_create_group(&client->dev.kobj, group); + if (ret) { + goto exit_free; + } + } + + as5835_54x_cpld_add_client(client); + return 0; + +exit_free: + kfree(data); +exit: + return ret; +} + +static int as5835_54x_cpld_remove(struct i2c_client *client) +{ + struct as5835_54x_cpld_data *data = i2c_get_clientdata(client); + const struct attribute_group *group = NULL; + + as5835_54x_cpld_remove_client(client); + + /* Remove sysfs hooks */ + switch (data->type) { + case as5835_54x_cpld1: + group = &as5835_54x_cpld1_group; + break; + case as5835_54x_cpld2: + group = &as5835_54x_cpld2_group; + break; + case as5835_54x_cpld3: + group = &as5835_54x_cpld3_group; + break; + default: + break; + } + + if (group) { + sysfs_remove_group(&client->dev.kobj, group); + } + + kfree(data); + + return 0; +} + +static int as5835_54x_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int as5835_54x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +int as5835_54x_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as5835_54x_cpld_read_internal(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as5835_54x_cpld_read); + +int as5835_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as5835_54x_cpld_write_internal(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as5835_54x_cpld_write); + +static struct i2c_driver as5835_54x_cpld_driver = { + .driver = { + .name = "as5835_54x_cpld", + .owner = THIS_MODULE, + }, + .probe = as5835_54x_cpld_probe, + .remove = as5835_54x_cpld_remove, + .id_table = as5835_54x_cpld_id, +}; + +static int __init as5835_54x_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as5835_54x_cpld_driver); +} + +static void __exit as5835_54x_cpld_exit(void) +{ + i2c_del_driver(&as5835_54x_cpld_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("Accton I2C CPLD driver"); +MODULE_LICENSE("GPL"); + +module_init(as5835_54x_cpld_init); +module_exit(as5835_54x_cpld_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_fan.c new file mode 100644 index 00000000000..45b8d0d9840 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_fan.c @@ -0,0 +1,484 @@ +/* + * A hwmon driver for the Accton as5835 54x fan + * + * Copyright (C) 2016 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as5835_54x_fan" +#define MAX_FAN_SPEED_RPM 21500 + +static struct as5835_54x_fan_data *as5835_54x_fan_update_device(struct device *dev); +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +extern int as5835_54x_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as5835_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +/* fan related data, the index should match sysfs_fan_attributes + */ +static const u8 fan_reg[] = { + 0x02, /* fan 1-5 present status */ + 0x03, /* fan 1-5 direction(0:F2B 1:B2F) */ + 0x04, /* front fan 1-5 fault status */ + 0x05, /* rear fan 1-5 fault status */ + 0x06, /* fan PWM(for all fan) */ + 0x07, /* front fan 1 speed(rpm) */ + 0x08, /* front fan 2 speed(rpm) */ + 0x09, /* front fan 3 speed(rpm) */ + 0x0A, /* front fan 4 speed(rpm) */ + 0x0B, /* front fan 5 speed(rpm) */ + 0x0C, /* rear fan 1 speed(rpm) */ + 0x0D, /* rear fan 2 speed(rpm) */ + 0x0E, /* rear fan 3 speed(rpm) */ + 0x0F, /* rear fan 4 speed(rpm) */ + 0x10, /* rear fan 5 speed(rpm) */ +}; + +/* fan data */ +struct as5835_54x_fan_data { + struct platform_device *pdev; + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ +}; + +enum fan_id { + FAN1_ID, + FAN2_ID, + FAN3_ID, + FAN4_ID, + FAN5_ID +}; + +enum sysfs_fan_attributes { + FAN_PRESENT_REG, + FAN_DIRECTION_REG, + FAN_FRONT_FAULT_REG, + FAN_REAR_FAULT_REG, + FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ + FAN1_FRONT_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN5_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN5_REAR_SPEED_RPM, + FAN1_DIRECTION, + FAN2_DIRECTION, + FAN3_DIRECTION, + FAN4_DIRECTION, + FAN5_DIRECTION, + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN5_PRESENT, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + FAN5_FAULT, + FAN_MAX_RPM, + CPLD_VERSION +}; + +/* Define attributes + */ +#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT);\ + static SENSOR_DEVICE_ATTR(fan##index2##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT) +#define DECLARE_FAN_FAULT_ATTR(index, index2) &sensor_dev_attr_fan##index##_fault.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_fault.dev_attr.attr +#define DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_direction, S_IRUGO, fan_show_value, NULL, FAN##index##_DIRECTION) +#define DECLARE_FAN_DIRECTION_ATTR(index) &sensor_dev_attr_fan##index##_direction.dev_attr.attr + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN##index##_DUTY_CYCLE_PERCENTAGE) +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan##index##_duty_cycle_percentage.dev_attr.attr + +#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_present, S_IRUGO, fan_show_value, NULL, FAN##index##_PRESENT) +#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr + +#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index2##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM) +#define DECLARE_FAN_SPEED_RPM_ATTR(index, index2) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_input.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_input.dev_attr.attr + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(fan_max_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN_MAX_RPM); +#define DECLARE_FAN_MAX_RPM_ATTR(index) &sensor_dev_attr_fan_max_speed_rpm.dev_attr.attr + + +/* 5 fan fault attributes in this platform */ +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1, 11); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2, 12); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3, 13); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4, 14); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(5, 15); +/* 5 fan speed(rpm) attributes in this platform */ +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1, 11); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2, 12); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3, 13); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4, 14); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(5, 15); +/* 5 fan present attributes in this platform */ +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(5); +/* 5 fan direction attribute in this platform */ +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(1); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(2); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(3); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(4); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(5); +/* 1 fan duty cycle attribute in this platform */ +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(); + +static struct attribute *as5835_54x_fan_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + /* fan related attributes */ + DECLARE_FAN_FAULT_ATTR(1, 11), + DECLARE_FAN_FAULT_ATTR(2, 12), + DECLARE_FAN_FAULT_ATTR(3, 13), + DECLARE_FAN_FAULT_ATTR(4, 14), + DECLARE_FAN_FAULT_ATTR(5, 15), + DECLARE_FAN_SPEED_RPM_ATTR(1, 11), + DECLARE_FAN_SPEED_RPM_ATTR(2, 12), + DECLARE_FAN_SPEED_RPM_ATTR(3, 13), + DECLARE_FAN_SPEED_RPM_ATTR(4, 14), + DECLARE_FAN_SPEED_RPM_ATTR(5, 15), + DECLARE_FAN_PRESENT_ATTR(1), + DECLARE_FAN_PRESENT_ATTR(2), + DECLARE_FAN_PRESENT_ATTR(3), + DECLARE_FAN_PRESENT_ATTR(4), + DECLARE_FAN_PRESENT_ATTR(5), + DECLARE_FAN_DIRECTION_ATTR(1), + DECLARE_FAN_DIRECTION_ATTR(2), + DECLARE_FAN_DIRECTION_ATTR(3), + DECLARE_FAN_DIRECTION_ATTR(4), + DECLARE_FAN_DIRECTION_ATTR(5), + DECLARE_FAN_DUTY_CYCLE_ATTR(), + DECLARE_FAN_MAX_RPM_ATTR(), + NULL +}; + +#define FAN_DUTY_CYCLE_REG_MASK 0x1F +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 150 + +static int as5835_54x_fan_read_value(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int as5835_54x_fan_write_value(struct i2c_client *client, u8 reg, u8 value) +{ + return i2c_smbus_write_byte_data(client, reg, value); +} + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + return (reg_val & FAN_DUTY_CYCLE_REG_MASK) * 5; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + if (duty_cycle > FAN_MAX_DUTY_CYCLE) { + duty_cycle = FAN_MAX_DUTY_CYCLE; + } + + return (duty_cycle / 5); +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static u8 reg_val_to_direction(u8 reg_val, enum fan_id id) +{ + return !!(reg_val & BIT(id)); /* 0: Front to Back, 1: Back to Front*/ +} + +static u8 reg_val_to_is_present(u8 reg_val, enum fan_id id) +{ + return !(reg_val & BIT(id)); +} + +static u8 is_fan_fault(struct as5835_54x_fan_data *data, enum fan_id id) +{ + if ((data->reg_val[FAN_FRONT_FAULT_REG] & BIT(id)) || + (data->reg_val[FAN_REAR_FAULT_REG] & BIT(id))) { + return 1; + } + + return 0; +} + +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + struct i2c_client *client = to_i2c_client(dev); + + error = kstrtoint(buf, 10, &value); + if (error) { + return error; + } + + if (value < 0 || value > FAN_MAX_DUTY_CYCLE) { + return -EINVAL; + } + + as5835_54x_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); + return count; +} + +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as5835_54x_fan_data *data = as5835_54x_fan_update_device(dev); + ssize_t ret = 0; + + if (data->valid) { + switch (attr->index) { + case FAN_DUTY_CYCLE_PERCENTAGE: + { + u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); + ret = sprintf(buf, "%u\n", duty_cycle); + break; + } + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN5_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index])); + break; + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + ret = sprintf(buf, "%d\n", + reg_val_to_is_present(data->reg_val[FAN_PRESENT_REG], + attr->index - FAN1_PRESENT)); + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + ret = sprintf(buf, "%d\n", is_fan_fault(data, attr->index - FAN1_FAULT)); + break; + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + case FAN5_DIRECTION: + ret = sprintf(buf, "%d\n", + reg_val_to_direction(data->reg_val[FAN_DIRECTION_REG], + attr->index - FAN1_DIRECTION)); + break; + case FAN_MAX_RPM: + ret = sprintf(buf, "%d\n", MAX_FAN_SPEED_RPM); + default: + break; + } + } + + return ret; +} + +static const struct attribute_group as5835_54x_fan_group = { + .attrs = as5835_54x_fan_attributes, +}; + +static struct as5835_54x_fan_data *as5835_54x_fan_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5835_54x_fan_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + dev_dbg(&client->dev, "Starting as5835_54x_fan update\n"); + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { + int status = as5835_54x_fan_read_value(client, fan_reg[i]); + + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + dev_dbg(&client->dev, "reg %d, err %d\n", fan_reg[i], status); + return data; + } + else { + data->reg_val[i] = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, 0x1); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d\n", val); +} + +static int as5835_54x_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as5835_54x_fan_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as5835_54x_fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as5835_54x_fan_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "as5835_54x_fan", + NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as5835_54x_fan_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as5835_54x_fan_remove(struct i2c_client *client) +{ + struct as5835_54x_fan_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as5835_54x_fan_group); + + return 0; +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static const struct i2c_device_id as5835_54x_fan_id[] = { + { "as5835_54x_fan", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as5835_54x_fan_id); + +static struct i2c_driver as5835_54x_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = as5835_54x_fan_probe, + .remove = as5835_54x_fan_remove, + .id_table = as5835_54x_fan_id, + .address_list = normal_i2c, +}; + +module_i2c_driver(as5835_54x_fan_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as5835_54x_fan driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_leds.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_leds.c new file mode 100644 index 00000000000..3b9dce6a4cd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_leds.c @@ -0,0 +1,380 @@ +/* + * A LED driver for the accton_as5822_54x_led + * + * Copyright (C) 2016 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as5835_54x_led" + +#define DEBUG_MODE 0 + +#if (DEBUG_MODE == 1) + #define DEBUG_PRINT(fmt, args...) \ + printk (KERN_INFO "%s:%s[%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +extern int as5835_54x_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as5835_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +struct accton_as5835_54x_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[2]; /* Register value, 0 = RELEASE/DIAG LED, + 1 = FAN/PSU LED, + 2 ~ 4 = SYSTEM LED */ +}; + +static struct accton_as5835_54x_led_data *ledctl = NULL; + +#define LED_CNTRLER_I2C_ADDRESS (0x60) + +#define LED_TYPE_DIAG_REG_MASK (0x0C) +#define LED_MODE_DIAG_GREEN_VALUE (0x08) +#define LED_MODE_DIAG_AMBER_VALUE (0x04) +#define LED_MODE_DIAG_OFF_VALUE (0x0C) +#define LED_MODE_DIAG_AMBER_VALUE1 (0x00) + +#define LED_TYPE_LOC_REG_MASK (0x30) +#define LED_MODE_LOC_AMBER_BLINK_VALUE (0x20) +#define LED_MODE_LOC_OFF_VALUE (0x10) +#define LED_MODE_LOC_AMBER_VALUE (0x00) + +static const u8 led_reg[] = { + 0xA, /* LOC/DIAG/FAN LED */ + 0xB, /* PSU LED */ +}; + +enum led_type { + LED_TYPE_DIAG, + LED_TYPE_LOC, + LED_TYPE_FAN, + LED_TYPE_PSU1, + LED_TYPE_PSU2 +}; + +/* FAN/PSU/DIAG/RELEASE led mode */ +enum led_light_mode { + LED_MODE_OFF = 0, + LED_MODE_GREEN, + LED_MODE_GREEN_BLINK, + LED_MODE_AMBER, + LED_MODE_AMBER_BLINK, + LED_MODE_RED, + LED_MODE_RED_BLINK, + LED_MODE_BLUE, + LED_MODE_BLUE_BLINK, + LED_MODE_AUTO, + LED_MODE_UNKNOWN +}; + +struct led_type_mode { + enum led_type type; + enum led_light_mode mode; + int type_mask; + int mode_value; +}; + +static struct led_type_mode led_type_mode_data[] = { +{LED_TYPE_LOC, LED_MODE_OFF, LED_TYPE_LOC_REG_MASK, LED_MODE_LOC_OFF_VALUE}, +{LED_TYPE_LOC, LED_MODE_AMBER_BLINK, LED_TYPE_LOC_REG_MASK, LED_MODE_LOC_AMBER_BLINK_VALUE}, +{LED_TYPE_LOC, LED_MODE_AMBER, LED_TYPE_LOC_REG_MASK, LED_MODE_LOC_AMBER_VALUE}, +{LED_TYPE_DIAG, LED_MODE_OFF, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_OFF_VALUE}, +{LED_TYPE_DIAG, LED_MODE_GREEN, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_GREEN_VALUE}, +{LED_TYPE_DIAG, LED_MODE_AMBER, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_AMBER_VALUE}, +{LED_TYPE_DIAG, LED_MODE_AMBER, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_AMBER_VALUE1}, +}; + +static int led_reg_val_to_light_mode(enum led_type type, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + if (type != led_type_mode_data[i].type) { + continue; + } + + if ((led_type_mode_data[i].type_mask & reg_val) == + led_type_mode_data[i].mode_value) { + return led_type_mode_data[i].mode; + } + } + + return LED_MODE_UNKNOWN; +} + +static u8 led_light_mode_to_reg_val(enum led_type type, + enum led_light_mode mode, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + int type_mask, mode_value; + + if (type != led_type_mode_data[i].type) + continue; + + if (mode != led_type_mode_data[i].mode) + continue; + + type_mask = led_type_mode_data[i].type_mask; + mode_value = led_type_mode_data[i].mode_value; + reg_val = (reg_val & ~type_mask) | mode_value; + } + + return reg_val; +} + +static int accton_as5835_54x_led_read_value(u8 reg) +{ + return as5835_54x_cpld_read(LED_CNTRLER_I2C_ADDRESS, reg); +} + +static int accton_as5835_54x_led_write_value(u8 reg, u8 value) +{ + return as5835_54x_cpld_write(LED_CNTRLER_I2C_ADDRESS, reg, value); +} + +static void accton_as5835_54x_led_update(void) +{ + mutex_lock(&ledctl->update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as5835_54x_led update\n"); + ledctl->valid = 0; + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = accton_as5835_54x_led_read_value(led_reg[i]); + + if (status < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg[i], status); + goto exit; + } + else + ledctl->reg_val[i] = status; + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as5835_54x_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + u8 reg, enum led_type type) +{ + int reg_val; + + mutex_lock(&ledctl->update_lock); + reg_val = accton_as5835_54x_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + accton_as5835_54x_led_write_value(reg, reg_val); + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as7312_54x_led_auto_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ +} + +static enum led_brightness accton_as7312_54x_led_auto_get(struct led_classdev *cdev) +{ + return LED_MODE_AUTO; +} + +static void accton_as5835_54x_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5835_54x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_DIAG); +} + +static enum led_brightness accton_as5835_54x_led_diag_get(struct led_classdev *cdev) +{ + accton_as5835_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static enum led_brightness accton_as5835_54x_led_loc_get(struct led_classdev *cdev) +{ + accton_as5835_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static void accton_as5835_54x_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as5835_54x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_LOC); +} + +static struct led_classdev accton_as5835_54x_leds[] = { + [LED_TYPE_LOC] = { + .name = "as5835_54x_led::loc", + .default_trigger = "unused", + .brightness_set = accton_as5835_54x_led_loc_set, + .brightness_get = accton_as5835_54x_led_loc_get, + .max_brightness = LED_MODE_AMBER_BLINK, + }, + [LED_TYPE_DIAG] = { + .name = "as5835_54x_led::diag", + .default_trigger = "unused", + .brightness_set = accton_as5835_54x_led_diag_set, + .brightness_get = accton_as5835_54x_led_diag_get, + .max_brightness = LED_MODE_AMBER, + }, + [LED_TYPE_PSU1] = { + .name = "as5835_54x_led::psu1", + .default_trigger = "unused", + .brightness_set = accton_as7312_54x_led_auto_set, + .brightness_get = accton_as7312_54x_led_auto_get, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "as5835_54x_led::psu2", + .default_trigger = "unused", + .brightness_set = accton_as7312_54x_led_auto_set, + .brightness_get = accton_as7312_54x_led_auto_get, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN] = { + .name = "as5835_54x_led::fan", + .default_trigger = "unused", + .brightness_set = accton_as7312_54x_led_auto_set, + .brightness_get = accton_as7312_54x_led_auto_get, + .max_brightness = LED_MODE_AUTO, + }, +}; + +static int accton_as5835_54x_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(accton_as5835_54x_leds); i++) { + ret = led_classdev_register(&pdev->dev, &accton_as5835_54x_leds[i]); + + if (ret < 0) { + break; + } + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(accton_as5835_54x_leds)){ + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&accton_as5835_54x_leds[i]); + } + } + + return ret; +} + +static int accton_as5835_54x_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(accton_as5835_54x_leds); i++) { + led_classdev_unregister(&accton_as5835_54x_leds[i]); + } + + return 0; +} + +static struct platform_driver accton_as5835_54x_led_driver = { + .probe = accton_as5835_54x_led_probe, + .remove = accton_as5835_54x_led_remove, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as5835_54x_led_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as5835_54x_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct accton_as5835_54x_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + goto exit_driver; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + goto exit_free; + } + + return 0; + +exit_free: + kfree(ledctl); +exit_driver: + platform_driver_unregister(&accton_as5835_54x_led_driver); +exit: + return ret; +} + +static void __exit accton_as5835_54x_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&accton_as5835_54x_led_driver); + kfree(ledctl); +} + +late_initcall(accton_as5835_54x_led_init); +module_exit(accton_as5835_54x_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as5835_54x_led driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_psu.c new file mode 100644 index 00000000000..00b43829e32 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_psu.c @@ -0,0 +1,343 @@ +/* + * An hwmon driver for accton as5835_54x Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define PSU_STATUS_I2C_ADDR 0x60 +#define PSU_STATUS_I2C_REG_OFFSET 0x2 + +#define MODEL_NAME_LEN 8 +#define MODEL_NAME_REG_OFFSET 0x20 + +#define SERIAL_NUM_LEN 18 +#define SERIAL_NUM_REG_OFFSET 0x35 + +#define IS_POWER_GOOD(id, value) (!!(value & BIT(id*4 + 1))) +#define IS_PRESENT(id, value) (!(value & BIT(id*4))) + +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_string(struct device *dev, struct device_attribute *da, char *buf); +extern int as5835_54x_cpld_read(unsigned short cpld_addr, u8 reg); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as5835_54x_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[MODEL_NAME_LEN+1]; /* Model name, read from eeprom */ + char serial[SERIAL_NUM_LEN+1]; /* Serial number, read from eeprom*/ +}; + +static struct as5835_54x_psu_data *as5835_54x_psu_update_device(struct device *dev); + +enum as5835_54x_psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD, + PSU_SERIAL_NUMBER +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_string, NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu_serial_numer, S_IRUGO, show_string, NULL, PSU_SERIAL_NUMBER); + +static struct attribute *as5835_54x_psu_attributes[] = { + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + &sensor_dev_attr_psu_serial_numer.dev_attr.attr, + NULL +}; + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as5835_54x_psu_data *data = as5835_54x_psu_update_device(dev); + u8 status = 0; + + if (!data->valid) { + return sprintf(buf, "0\n"); + } + + if (attr->index == PSU_PRESENT) { + status = IS_PRESENT(data->index, data->status); + } + else { /* PSU_POWER_GOOD */ + status = IS_POWER_GOOD(data->index, data->status); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_string(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as5835_54x_psu_data *data = as5835_54x_psu_update_device(dev); + char *str = NULL; + + if (!data->valid) { + return 0; + } + + if (attr->index == PSU_MODEL_NAME) { + str = data->model_name; + } + else { /* PSU_SERIAL_NUBMER */ + str = data->serial; + } + + return sprintf(buf, "%s\n", str); +} + +static const struct attribute_group as5835_54x_psu_group = { + .attrs = as5835_54x_psu_attributes, +}; + +static int as5835_54x_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as5835_54x_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as5835_54x_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as5835_54x_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "as5835_54x_psu", + NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as5835_54x_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as5835_54x_psu_remove(struct i2c_client *client) +{ + struct as5835_54x_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as5835_54x_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as5835_54x_psu1, + as5835_54x_psu2 +}; + +static const struct i2c_device_id as5835_54x_psu_id[] = { + { "as5835_54x_psu1", as5835_54x_psu1 }, + { "as5835_54x_psu2", as5835_54x_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as5835_54x_psu_id); + +static struct i2c_driver as5835_54x_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as5835_54x_psu", + }, + .probe = as5835_54x_psu_probe, + .remove = as5835_54x_psu_remove, + .id_table = as5835_54x_psu_id, + .address_list = normal_i2c, +}; + +static int as5835_54x_psu_read_byte(struct i2c_client *client, u8 command, u8 *data) +{ + int status = 0; + int retry_count = 5; + + while (retry_count) { + status = i2c_smbus_read_byte_data(client, command); + if (unlikely(status < 0)) { + msleep(10); + retry_count--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "sfp read byte data failed, command(0x%2x), data(0x%2x)\r\n", command, status); + goto abort; + } + + *data = (u8)status; + +abort: + return status; +} + +static int as5835_54x_psu_read_bytes(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int ret = 0; + + while (data_len) { + ssize_t status; + + status = as5835_54x_psu_read_byte(client, command, data); + if (status <= 0) { + ret = status; + break; + } + + data += 1; + command += 1; + data_len -= 1; + } + + return ret; +} + +static struct as5835_54x_psu_data *as5835_54x_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as5835_54x_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status; + + dev_dbg(&client->dev, "Starting as5835_54x update\n"); + data->valid = 0; + + /* Read psu status */ + status = as5835_54x_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg (0x%x) err %d\n", PSU_STATUS_I2C_ADDR, status); + goto exit; + } + else { + data->status = status; + } + + + memset(data->model_name, 0, sizeof(data->model_name)); + memset(data->serial, 0, sizeof(data->serial)); + + if (IS_PRESENT(data->index, data->status)) { + /* Read model name */ + status = as5835_54x_psu_read_bytes(client, MODEL_NAME_REG_OFFSET, data->model_name, + ARRAY_SIZE(data->model_name)-1); + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x)\n", client->addr); + goto exit; + } + + /* Read serial number */ + status = as5835_54x_psu_read_bytes(client, SERIAL_NUM_REG_OFFSET, data->serial, + ARRAY_SIZE(data->serial)-1); + if (status < 0) { + data->serial[0] = '\0'; + dev_dbg(&client->dev, "unable to read serial number from (0x%x)\n", client->addr); + goto exit; + } + else { + data->serial[SERIAL_NUM_LEN] = '\0'; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(as5835_54x_psu_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as5835_54x_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/ym2651y.c new file mode 120000 index 00000000000..f4d67640ccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/ym2651y.c @@ -0,0 +1 @@ +../../common/modules/ym2651y.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-platform-monitor-fan.service b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-platform-monitor-fan.service new file mode 100644 index 00000000000..3d7df4e48a6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-platform-monitor-fan.service @@ -0,0 +1,16 @@ +[Unit] +Description=Accton AS5835-54X Platform Monitoring FAN service +Before=pmon.service +After=as5835-54x-platform-monitor.service +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/accton_as5835_54x_monitor_fan.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-platform-monitor-psu.service b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-platform-monitor-psu.service new file mode 100644 index 00000000000..2a9279cc4ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-platform-monitor-psu.service @@ -0,0 +1,16 @@ +[Unit] +Description=Accton AS5835-54X Platform Monitoring PSU service +Before=pmon.service +After=as5835-54x-platform-monitor.service +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/accton_as5835_54x_monitor_psu.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-platform-monitor.service new file mode 100644 index 00000000000..d522a0ca537 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-platform-monitor.service @@ -0,0 +1,18 @@ +[Unit] +Description=Accton AS5835-54X Platform Monitoring service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/accton_as5835_54x_util.py install +ExecStart=/usr/local/bin/accton_as5835_54x_monitor.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL +#StandardOutput=tty + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/setup.py new file mode 100644 index 00000000000..af0320318ea --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as5835_54x', + version='1.0', + description='Module to initialize Accton AS5835-54X platforms', + + packages=['as5835_54x'], + package_dir={'as5835_54x': 'as5835-54x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/README b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/README new file mode 100644 index 00000000000..f75f8e008c7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/README @@ -0,0 +1,74 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +Contents of this package: + module - Contains source code of as7326 kernel driver modules. + util - operational scripts. + +Sonic creates a docker container and run building process under it. +If user tries to built new drivers, please get into that docker and +dpkg-buildpackage for them. + +All Linux kernel code is licensed under the GPLv1. All other code is +licensed under the GPLv3. Please see the LICENSE file for copies of +both licenses. + +The code for integacting with Accton AS5835-54X has 2 parts, +kernel drivers and operational script. +The kernel drivers of peripherals are under module/ directory. +1. These drivers can be built to individual ko during dpkg-buildpackage. +2. A operational script, accton_as7326_util.py, for device initializatian. + Run "accton_as5835_54x_util.py install" to install drivers. + +To initialize the system, run "accton_as5835_54x_util.py install". +To clean up the drivers & devices, run "accton_as5835_54x_util.py clean". +To dump information of sensors, run "accton_as5835_54x_util.py show". +To dump SFP EEPROM, run "accton_as5835_54x_util.py sff". +To set fan speed, run "accton_as5835_54x_util.py set fan". +To enable/disable SFP emission, run "accton_as5835_54x_util.py set sfp". +To set system LEDs' color, run "accton_as5835_54x_util.py set led" +For more information, run "accton_as5835_54x_util.py --help". + +==================================================================== +Besides applying accton_as7326_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +System LED: + There are 5 system LEDs at the lower-left corner of front panel. + They are loc, diag, fan, ps1, and ps2. + The sysfs interface color mappings are as follows: + Brightness: + 0 => off + 1 => green + 2 => green blinking + 3 => amber + 4 => amber blinking + But not all colors are available for each LED. + +Fan Control: + There are 10 fans inside 5 fan modules. + All fans share 1 duty setting, ranged from 0~100. + +Thermal sensers: + 4 temperature sensors are controlled by the lm75 kernel modules. + +PSUs: + There 2 power supplies slot at the left/right side of the back. + Once if a PSU is not plugged, the status of it is shown failed. + +There are 48 SFP+ and 6 QSFP modules are equipped. +Before operating on PSU and QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_monitor.py new file mode 100755 index 00000000000..5789288546b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_monitor.py @@ -0,0 +1,205 @@ +#!/usr/bin/env python +# +# Copyright (C) 2019 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 05/08/2019: Roy Lee, changed for as5812-54x. +# 05/29/2019: Brandon Chuang, changed for as5835-54x. +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import types + import time # this is only being used as part of the example + import traceback + import signal + from tabulate import tabulate + from as5835_54x.fanutil import FanUtil + from as5835_54x.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = 'accton_as5835_54x_monitor' +DUTY_MAX = 100 + +global log_file +global log_level + +# Make a class we can use to capture stdout and sterr in the log +class accton_as5835_54x_monitor(object): + # static temp var + _ori_temp = 0 + _new_perc = 0 + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_fans(self): + FAN_LEV1_UP_TEMP = 57700 # temperature + FAN_LEV1_DOWN_TEMP = 0 # unused + FAN_LEV1_SPEED_PERC = DUTY_MAX # percentage*/ + + FAN_LEV2_UP_TEMP = 53000 + FAN_LEV2_DOWN_TEMP = 52700 + FAN_LEV2_SPEED_PERC = 80 + + FAN_LEV3_UP_TEMP = 49500 + FAN_LEV3_DOWN_TEMP = 47700 + FAN_LEV3_SPEED_PERC = 65 + + FAN_LEV4_UP_TEMP = 0 # unused + FAN_LEV4_DOWN_TEMP = 42700 + FAN_LEV4_SPEED_PERC = 40 + + + thermal = ThermalUtil() + fan = FanUtil() + + temp2 = thermal.get_thermal_2_val() + if temp2 is None: + return False + + temp3 = thermal.get_thermal_3_val() + if temp3 is None: + return False + + new_temp = (temp2 + temp3) / 2 + + for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): + fan_stat = fan.get_fan_status(x) + if fan_stat is None: + return False + if fan_stat is False: + self._new_perc = FAN_LEV1_SPEED_PERC + logging.debug('INFO. SET new_perc to %d (FAN fault. fan_num:%d)', self._new_perc, x) + break + logging.debug('INFO. fan_stat is True (fan_num:%d)', x) + + if fan_stat is not None and fan_stat is not False: + diff = new_temp - self._ori_temp + if diff == 0: + logging.debug('INFO. RETURN. THERMAL temp not changed. %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + return True + else: + if diff >= 0: + is_up = True + logging.debug('INFO. THERMAL temp UP %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + else: + is_up = False + logging.debug('INFO. THERMAL temp DOWN %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp) + + if is_up is True: + if new_temp >= FAN_LEV1_UP_TEMP: + self._new_perc = FAN_LEV1_SPEED_PERC + elif new_temp >= FAN_LEV2_UP_TEMP: + self._new_perc = FAN_LEV2_SPEED_PERC + elif new_temp >= FAN_LEV3_UP_TEMP: + self._new_perc = FAN_LEV3_SPEED_PERC + else: + self._new_perc = FAN_LEV4_SPEED_PERC + logging.debug('INFO. SET. FAN_SPEED as %d (new THERMAL temp:%d)', self._new_perc, new_temp) + else: + if new_temp <= FAN_LEV4_DOWN_TEMP: + self._new_perc = FAN_LEV4_SPEED_PERC + elif new_temp <= FAN_LEV3_DOWN_TEMP: + self._new_perc = FAN_LEV3_SPEED_PERC + elif new_temp <= FAN_LEV2_DOWN_TEMP: + self._new_perc = FAN_LEV2_SPEED_PERC + else: + self._new_perc = FAN_LEV1_SPEED_PERC + logging.debug('INFO. SET. FAN_SPEED as %d (new THERMAL temp:%d)', self._new_perc, new_temp) + + cur_perc = fan.get_fan_duty_cycle() + if cur_perc == self._new_perc: + logging.debug('INFO. RETURN. FAN speed not changed. %d / %d (new_perc / ori_perc)', self._new_perc, cur_perc) + return True + + set_stat = fan.set_fan_duty_cycle(self._new_perc) + if set_stat is True: + logging.debug('INFO: PASS. set_fan_duty_cycle (%d)', self._new_perc) + else: + logging.debug('INFO: FAIL. set_fan_duty_cycle (%d)', self._new_perc) + + logging.debug('INFO: GET. ori_perc is %d. ori_temp is %d', cur_perc, self._ori_temp) + self._ori_temp = new_temp + logging.debug('INFO: UPDATE. ori_perc to %d. ori_temp to %d', cur_perc, self._ori_temp) + + return True + +def handler(signum, frame): + fan = FanUtil() + logging.debug('INFO:Cause signal %d, set fan speed max.', signum) + fan.set_fan_duty_cycle(DUTY_MAX) + sys.exit(0) + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + signal.signal(signal.SIGINT, handler) + signal.signal(signal.SIGTERM, handler) + monitor = accton_as5835_54x_monitor(log_file, log_level) + + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(10) + +if __name__ == '__main__': + main(sys.argv[1:]) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_monitor_fan.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_monitor_fan.py new file mode 100755 index 00000000000..791c80a92b8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_monitor_fan.py @@ -0,0 +1,198 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 5/27/2019: Brandon_Chuang create +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as5835_54x_monitor_fan' + +global log_file +global log_level + + +class switch(object): + def __init__(self, value): + self.value = value + self.fall = False + + def __iter__(self): + """Return the match method once, then stop""" + yield self.match + raise StopIteration + + def match(self, *args): + """Indicate whether or not to enter a case suite""" + if self.fall or not args: + return True + elif self.value in args: # changed for v1.5, see below + self.fall = True + return True + else: + return False + + +fan_state=[2, 2, 2, 2, 2, 2] #init state=2, insert=1, remove=0 +fan_status_state=[2, 2, 2, 2, 2, 2] #init state=2, fault=1, normal=0 +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + + #/sys/bus/i2c/devices/3-0063 + #fan1_present, fan5_present + + def __init__(self, log_file, log_level): + + self.fan_num = 5 + self.fan_path = "/sys/bus/i2c/devices/3-0063/" + self.present = { + 0: "fan1_present", + 1: "fan2_present", + 2: "fan3_present", + 3: "fan4_present", + 4: "fan5_present", + } + + self.fault = { + 0: "fan1_fault", + 1: "fan2_fault", + 2: "fan3_fault", + 3: "fan4_fault", + 4: "fan5_fault", + } + + + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(logging.DEBUG) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + #sys_handler.setLevel(logging.WARNING) + sys_handler.setLevel(logging.INFO) + logging.getLogger('').addHandler(sys_handler) + + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_fan(self): + + FAN_STATE_REMOVE = 0 + FAN_STATE_INSERT = 1 + + FAN_STATUS_FAULT = 1 + FAN_STATUS_NORMAL = 0 + + global fan_state + global fan_status_state + + for idx in range (0, self.fan_num): + node = self.fan_path + self.present[idx] + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if fan_state[idx]!=1: + fan_state[idx]=FAN_STATE_INSERT + logging.info("FAN-%d present is detected", idx+1); + else: + if fan_state[idx]!=0: + fan_state[idx]=FAN_STATE_REMOVE + logging.warning("Alarm for FAN-%d absent is detected", idx+1) + + for idx in range (0, self.fan_num): + node = self.fan_path + self.fault[idx] + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if fan_status_state[idx]!=FAN_STATUS_FAULT: + if fan_state[idx] == FAN_STATE_INSERT: + logging.warning("Alarm for FAN-%d failed is detected", idx+1); + fan_status_state[idx]=FAN_STATUS_FAULT + else: + fan_status_state[idx]=FAN_STATUS_NORMAL + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + monitor = device_monitor(log_file, log_level) + while True: + monitor.manage_fan() + time.sleep(3) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_monitor_psu.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_monitor_psu.py new file mode 100755 index 00000000000..d7bd1a1f251 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_monitor_psu.py @@ -0,0 +1,190 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 7/2/2018: Jostar create for as7326-56x +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as5835_54x_monitor_fan' + +global log_file +global log_level + + +class switch(object): + def __init__(self, value): + self.value = value + self.fall = False + + def __iter__(self): + """Return the match method once, then stop""" + yield self.match + raise StopIteration + + def match(self, *args): + """Indicate whether or not to enter a case suite""" + if self.fall or not args: + return True + elif self.value in args: # changed for v1.5, see below + self.fall = True + return True + else: + return False + + +psu_state=[2, 2] +psu_power_status=[2, 2] +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + + def __init__(self, log_file, log_level): + + self.psu_num = 2 + self.psu_path = "/sys/bus/i2c/devices/" + self.presence = "/psu_present" + self.oper_status = "/psu_power_good" + self.mapping = { + 0: "11-0050", + 1: "12-0053", + } + + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + # set up logging to console + + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + #sys_handler.setLevel(logging.WARNING) + sys_handler.setLevel(logging.INFO) + logging.getLogger('').addHandler(sys_handler) + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_psu(self): + + PSU_STATE_REMOVE = 0 + PSU_STATE_INSERT = 1 + + PSU_STATUS_NO_POWER = 0 + PSU_STATUS_POWER_GOOD = 1 + + global psu_state + global psu_power_status + + for idx in range (0, self.psu_num): + node = self.psu_path + self.mapping[idx] + self.presence + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if psu_state[idx]!=PSU_STATE_INSERT: + psu_state[idx]=PSU_STATE_INSERT + logging.info("PSU-%d present is detected", idx+1); + #psu_power_status[idx]=PSU_STATUS_POWER_GOOD #when insert, assume power is good. If no_power, next code will find it. + else: + if psu_state[idx]!=PSU_STATE_REMOVE: + psu_state[idx]=PSU_STATE_REMOVE + logging.warning("Alarm for PSU-%d absent is detected", idx+1); + psu_power_status[idx]=PSU_STATUS_NO_POWER + + for idx in range (0, self.psu_num): + node = self.psu_path + self.mapping[idx] + self.oper_status + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + #logging.info("content=%s, psu_power_status[%d]=%d", content, idx, psu_power_status[idx]); + if content == "0": + if psu_power_status[idx]!=PSU_STATUS_NO_POWER: + if psu_state[idx]==PSU_STATE_INSERT: + logging.warning("Alarm for PSU-%d fault is detected", idx+1); + psu_power_status[idx]=PSU_STATUS_NO_POWER + else: + if psu_power_status[idx] !=PSU_STATUS_POWER_GOOD: + logging.info("PSU-%d power_good is detected", idx+1); + psu_power_status[idx]=PSU_STATUS_POWER_GOOD + + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + monitor = device_monitor(log_file, log_level) + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_psu() + time.sleep(3) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_util.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_util.py new file mode 100755 index 00000000000..fbe3866ad56 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_util.py @@ -0,0 +1,592 @@ +#!/usr/bin/env python +# +# Copyright (C) 2019 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + + + + +PROJECT_NAME = 'as5835_54x' +version = '0.1.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan':5,'thermal':4, 'psu':2, 'sfp':54} +FORCE = 0 +#logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +#logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-54 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-54 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[Debug]"+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_check(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + return True + + + +kos = [ +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe accton_as5835_54x_cpld' , +'modprobe ym2651y' , +'modprobe accton_as5835_54x_fan' , +'modprobe optoe' , +'modprobe accton_as5835_54x_leds' , +'modprobe accton_as5835_54x_psu' ] + +def driver_install(): + global FORCE + status, output = log_os_system("depmod", 1) + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + lst = rm.split(" ") + if len(lst) > 3: + del(lst[3]) + rm = " ".join(lst) + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +led_prefix ='/sys/class/leds/accton_'+PROJECT_NAME+'_led::' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2']} +hwmon_nodes = {'led': ['brightness'] } +hwmon_prefix ={'led': led_prefix} + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'fan': ['3-0063'] , + 'thermal': ['18-004b','19-004c', '20-0049', '21-004a'] , + 'psu': ['11-0050','12-0053'], + 'sfp': ['-0050']} +i2c_nodes = {'fan': ['present', 'front_speed_rpm', 'rear_speed_rpm'] , + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['module_present_', 'module_tx_disable_']} + +sfp_map = [42,43,44,45,46,47,48,49,50,51, + 52,53,54,55,56,57,58,59,60,61, + 62,63,64,65,66,67,68,69,70,71, + 72,73,74,75,76,77,78,79,80,81, + 82,83,84,85,86,87,88,89,28,29, + 26,30,31,27] + +qsfp_start = 48 + +mknod =[ +'echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-2/new_device' , +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-2/new_device' , +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-2/new_device' , +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-34/new_device', +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-35/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-36/new_device', +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-37/new_device', +'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-38/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-39/new_device', +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-1/new_device', + +'echo as5835_54x_fan 0x63 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4c > /sys/bus/i2c/devices/i2c-19/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-20/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-21/new_device', +'echo as5835_54x_psu1 0x50 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo ym2401 0x58 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as5835_54x_psu2 0x53 > /sys/bus/i2c/devices/i2c-12/new_device', +'echo ym2401 0x5b > /sys/bus/i2c/devices/i2c-12/new_device', +'echo as5835_54x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo as5835_54x_cpld2 0x61 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo as5835_54x_cpld3 0x62 > /sys/bus/i2c/devices/i2c-3/new_device'] + +mknod2 =[ +'echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-2/new_device' , +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-2/new_device' , +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-2/new_device' , +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-34/new_device', +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-35/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-36/new_device', +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-37/new_device', +'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-38/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-39/new_device', +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-0/new_device', + +'echo as5835_54x_fan 0x63 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4c > /sys/bus/i2c/devices/i2c-19/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-20/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-21/new_device', +'echo as5835_54x_psu1 0x50 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo ym2401 0x58 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as5835_54x_psu2 0x53 > /sys/bus/i2c/devices/i2c-12/new_device', +'echo ym2401 0x5b > /sys/bus/i2c/devices/i2c-12/new_device', +'echo as5835_54x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo as5835_54x_cpld2 0x61 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo as5835_54x_cpld3 0x62 > /sys/bus/i2c/devices/i2c-3/new_device'] + + +def i2c_order_check(): + # i2c bus 0 and 1 might be installed in different order. + # Here check if 0x77 is exist @ i2c-1 + tmp = "echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-1/new_device" + status, output = log_os_system(tmp, 0) + if not device_exist(): + order = 1 + else: + order = 0 + tmp = "echo 0x77 > /sys/bus/i2c/devices/i2c-1/delete_device" + status, output = log_os_system(tmp, 0) + return order + +def device_install(): + global FORCE + + order = i2c_order_check() + + # if 0x77 is not exist @i2c-1, use reversed bus order + if order: + for i in range(0,len(mknod2)): + #for pca954x need times to built new i2c buses + if mknod2[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod2[i], 1) + time.sleep(0.01) + if status: + print output + if FORCE == 0: + return status + else: + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + for i in range(0,len(sfp_map)): + if i < qsfp_start: + status, output =log_os_system("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + else: + status, output =log_os_system("echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/0-0077", 0) + if status==0: + I2C_ORDER=1 + else: + I2C_ORDER=0 + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + if I2C_ORDER==0: + nodelist = mknod + else: + nodelist = mknod2 + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_check() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_check() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_check()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'sfp_eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~5 is all fine, all fan share same setting + node = ALL_DEVICE['fan'] ['fan1'][0] + node = node.replace(node.split("/")[-1], 'fan_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0077", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/classes/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/classes/fanutil.py new file mode 100644 index 00000000000..73d020acccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/classes/fanutil.py @@ -0,0 +1,253 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# 3/32/2018: Roy Lee modify for as7326_56x +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_NUM_ON_MAIN_BROAD = 5 + FAN_NUM_1_IDX = 1 + FAN_NUM_2_IDX = 2 + FAN_NUM_3_IDX = 3 + FAN_NUM_4_IDX = 4 + FAN_NUM_5_IDX = 5 + + FAN_NODE_NUM_OF_MAP = 2 + FAN_NODE_FAULT_IDX_OF_MAP = 1 + #FAN_NODE_SPEED_IDX_OF_MAP = 2 + FAN_NODE_DIR_IDX_OF_MAP = 2 + #FAN_NODE_DUTY_IDX_OF_MAP = 4 + #FANR_NODE_FAULT_IDX_OF_MAP = 5 + + #BASE_VAL_PATH = '/sys/bus/i2c/devices/11-0066/{0}' + #FAN_DUTY_PATH = '/sys/bus/i2c/devices/11-0066/fan_duty_cycle_percentage' + BASE_VAL_PATH = '/sys/devices/platform/as6712_32x_fan/{0}' + FAN_DUTY_PATH = '/sys/devices/platform/as6712_32x_fan/fan1_duty_cycle_percentage' + + #logfile = '' + #loglevel = logging.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + _fan_to_device_path_mapping = {} + +#fan1_direction +#fan1_fault +#fan1_present + + #(FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage', + _fan_to_device_node_mapping = { + (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault', + (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction', + + (FAN_NUM_2_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan2_fault', + (FAN_NUM_2_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan2_direction', + + (FAN_NUM_3_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan3_fault', + (FAN_NUM_3_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan3_direction', + + (FAN_NUM_4_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan4_fault', + (FAN_NUM_4_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan4_direction', + + (FAN_NUM_5_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan5_fault', + (FAN_NUM_5_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan5_direction', + + } + + def _get_fan_to_device_node(self, fan_num, node_num): + return self._fan_to_device_node_mapping[(fan_num, node_num)] + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + + try: + val_file = open(device_path, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + def __init__(self): + fan_path = self.BASE_VAL_PATH + + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_NUM_ON_MAIN_BROAD+1): + for node_num in range(self.FAN_NODE_FAULT_IDX_OF_MAP, self.FAN_NODE_NUM_OF_MAP+1): + self._fan_to_device_path_mapping[(fan_num, node_num)] = fan_path.format( + self._fan_to_device_node_mapping[(fan_num, node_num)]) + + def get_num_fans(self): + return self.FAN_NUM_ON_MAIN_BROAD + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM_OF_MAP + + def get_idx_node_start(self): + return self.FAN_NODE_FAULT_IDX_OF_MAP + + def get_size_node_map(self): + return len(self._fan_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._fan_to_device_path_mapping) + + def get_fan_to_device_path(self, fan_num, node_num): + return self._fan_to_device_path_mapping[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_FAULT_IDX_OF_MAP) + + #def get_fan_speed(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FAN_NODE_SPEED_IDX_OF_MAP) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DIR_IDX_OF_MAP) + + def get_fan_duty_cycle(self): + #duty_path = self.FAN_DUTY_PATH + try: + val_file = open(self.FAN_DUTY_PATH) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + return int(content) + #self._get_fan_node_val(fan_num, self.FAN_NODE_DUTY_IDX_OF_MAP) +#static u32 reg_val_to_duty_cycle(u8 reg_val) +#{ +# reg_val &= FAN_DUTY_CYCLE_REG_MASK; +# return ((u32)(reg_val+1) * 625 + 75)/ 100; +#} +# + def set_fan_duty_cycle(self, val): + + try: + fan_file = open(self.FAN_DUTY_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + #val = ((val + 1 ) * 625 +75 ) / 100 + fan_file.write(str(val)) + fan_file.close() + return True + + #def get_fanr_fault(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FANR_NODE_FAULT_IDX_OF_MAP) + + def get_fanr_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP) + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num, %d', fan_num) + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + logging.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + #if self.get_fanr_fault(fan_num) is not None and self.get_fanr_fault(fan_num) > 0: + # logging.debug('GET. FANR fault. fan_num, %d', fan_num) + # return False + + return True + +#def main(): +# fan = FanUtil() +# +# print 'get_size_node_map : %d' % fan.get_size_node_map() +# print 'get_size_path_map : %d' % fan.get_size_path_map() +# for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): +# for y in range(fan.get_idx_node_start(), fan.get_num_nodes()+1): +# print fan.get_fan_to_device_path(x, y) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/classes/thermalutil.py new file mode 100644 index 00000000000..8fdb01ecc56 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/classes/thermalutil.py @@ -0,0 +1,124 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018:Jostar modify for as7716_32x +# 3/23/2018: Roy Lee modify for as7326_56x +# ------------------------------------------------------------------ + +try: + import time + import logging + import glob + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + + THERMAL_NUM_ON_MAIN_BROAD = 3 + THERMAL_NUM_1_IDX = 1 # 1_ON_MAIN_BROAD + THERMAL_NUM_2_IDX = 2 # 2_ON_MAIN_BROAD + THERMAL_NUM_3_IDX = 3 # 3_ON_MAIN_BROAD + + BASE_VAL_PATH = '/sys/bus/i2c/devices/{0}-00{1}/hwmon/hwmon*/temp1_input' + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + _thermal_to_device_path_mapping = {} + + _thermal_to_device_node_mapping = { + THERMAL_NUM_1_IDX: ['38', '48'], + THERMAL_NUM_2_IDX: ['39', '49'], + THERMAL_NUM_3_IDX: ['40', '4a'], + } + + def __init__(self): + thermal_path = self.BASE_VAL_PATH + + for x in range(self.THERMAL_NUM_1_IDX, self.THERMAL_NUM_ON_MAIN_BROAD+1): + self._thermal_to_device_path_mapping[x] = thermal_path.format( + self._thermal_to_device_node_mapping[x][0], + self._thermal_to_device_node_mapping[x][1]) + + def _get_thermal_node_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_to_device_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + + def get_num_thermals(self): + return self.THERMAL_NUM_ON_MAIN_BROAD + + def get_idx_thermal_start(self): + return self.THERMAL_NUM_1_IDX + + def get_size_node_map(self): + return len(self._thermal_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._thermal_to_device_path_mapping) + + def get_thermal_to_device_path(self, thermal_num): + return self._thermal_to_device_path_mapping[thermal_num] + + def get_thermal_1_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + + def get_thermal_2_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) + def get_thermal_temp(self): + return (self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) +self._get_thermal_node_val(self.THERMAL_NUM_3_IDX)) + +#def main(): +# thermal = ThermalUtil() +# +# print 'get_size_node_map : %d' % thermal.get_size_node_map() +# print 'get_size_path_map : %d' % thermal.get_size_path_map() +# for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): +# print thermal.get_thermal_to_device_path(x) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/Makefile new file mode 100644 index 00000000000..d052ddaf04e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/Makefile @@ -0,0 +1,2 @@ +obj-m:= accton_as6712_32x_psu.o accton-as6712-32x-cpld.o \ + accton_as6712_32x_fan.o cpr_4011_4mxx.o leds-accton_as6712_32x.o diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton-as6712-32x-cpld.c b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton-as6712-32x-cpld.c new file mode 100755 index 00000000000..0c86cb94711 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton-as6712-32x-cpld.c @@ -0,0 +1,867 @@ +/* + * I2C multiplexer + * + * Copyright (C) 2014 Accton Technology Corporation. + * + * This module supports the accton cpld that hold the channel select + * mechanism for other i2c slave devices, such as SFP. + * This includes the: + * Accton as6712_32x CPLD1/CPLD2/CPLD3 + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +#define NUM_OF_CPLD1_CHANS 0x0 +#define NUM_OF_CPLD2_CHANS 0x10 +#define NUM_OF_CPLD3_CHANS 0x10 +#define CPLD_CHANNEL_SELECT_REG 0x2 +#define CPLD_DESELECT_CHANNEL 0xFF + +#define ACCTON_I2C_CPLD_MUX_MAX_NCHANS NUM_OF_CPLD3_CHANS + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +enum cpld_mux_type { + as6712_32x_cpld2, + as6712_32x_cpld3, + as6712_32x_cpld1 +}; + +struct as6712_32x_cpld_data { + enum cpld_mux_type type; + struct i2c_client *client; + u8 last_chan; /* last register value */ + struct device *hwmon_dev; + struct mutex update_lock; +}; + +struct chip_desc { + u8 nchans; + u8 deselectChan; +}; + +/* Provide specs for the PCA954x types we know about */ +static const struct chip_desc chips[] = { + [as6712_32x_cpld1] = { + .nchans = NUM_OF_CPLD1_CHANS, + .deselectChan = NUM_OF_CPLD1_CHANS, + }, + [as6712_32x_cpld2] = { + .nchans = NUM_OF_CPLD2_CHANS, + .deselectChan = NUM_OF_CPLD2_CHANS, + }, + [as6712_32x_cpld3] = { + .nchans = NUM_OF_CPLD3_CHANS, + .deselectChan = NUM_OF_CPLD3_CHANS, + } +}; + +static const struct i2c_device_id as6712_32x_cpld_mux_id[] = { + { "as6712_32x_cpld1", as6712_32x_cpld1 }, + { "as6712_32x_cpld2", as6712_32x_cpld2 }, + { "as6712_32x_cpld3", as6712_32x_cpld3 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, as6712_32x_cpld_mux_id); + +#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index +#define TRANSCEIVER_TXDISABLE_ATTR_ID(index) MODULE_TXDISABLE_##index +#define TRANSCEIVER_RXLOS_ATTR_ID(index) MODULE_RXLOS_##index +#define TRANSCEIVER_TXFAULT_ATTR_ID(index) MODULE_TXFAULT_##index +#define TRANSCEIVER_LPMODE_ATTR_ID(index) MODULE_LPMODE_##index +#define TRANSCEIVER_RESET_ATTR_ID(index) MODULE_RESET_##index + +enum as6712_32x_cpld_sysfs_attributes { + CPLD_VERSION, + ACCESS, + MODULE_PRESENT_ALL, + MODULE_RXLOS_ALL, + /* transceiver attributes */ + TRANSCEIVER_PRESENT_ATTR_ID(1), + TRANSCEIVER_PRESENT_ATTR_ID(2), + TRANSCEIVER_PRESENT_ATTR_ID(3), + TRANSCEIVER_PRESENT_ATTR_ID(4), + TRANSCEIVER_PRESENT_ATTR_ID(5), + TRANSCEIVER_PRESENT_ATTR_ID(6), + TRANSCEIVER_PRESENT_ATTR_ID(7), + TRANSCEIVER_PRESENT_ATTR_ID(8), + TRANSCEIVER_PRESENT_ATTR_ID(9), + TRANSCEIVER_PRESENT_ATTR_ID(10), + TRANSCEIVER_PRESENT_ATTR_ID(11), + TRANSCEIVER_PRESENT_ATTR_ID(12), + TRANSCEIVER_PRESENT_ATTR_ID(13), + TRANSCEIVER_PRESENT_ATTR_ID(14), + TRANSCEIVER_PRESENT_ATTR_ID(15), + TRANSCEIVER_PRESENT_ATTR_ID(16), + TRANSCEIVER_PRESENT_ATTR_ID(17), + TRANSCEIVER_PRESENT_ATTR_ID(18), + TRANSCEIVER_PRESENT_ATTR_ID(19), + TRANSCEIVER_PRESENT_ATTR_ID(20), + TRANSCEIVER_PRESENT_ATTR_ID(21), + TRANSCEIVER_PRESENT_ATTR_ID(22), + TRANSCEIVER_PRESENT_ATTR_ID(23), + TRANSCEIVER_PRESENT_ATTR_ID(24), + TRANSCEIVER_PRESENT_ATTR_ID(25), + TRANSCEIVER_PRESENT_ATTR_ID(26), + TRANSCEIVER_PRESENT_ATTR_ID(27), + TRANSCEIVER_PRESENT_ATTR_ID(28), + TRANSCEIVER_PRESENT_ATTR_ID(29), + TRANSCEIVER_PRESENT_ATTR_ID(30), + TRANSCEIVER_PRESENT_ATTR_ID(31), + TRANSCEIVER_PRESENT_ATTR_ID(32), + /*Reset*/ + TRANSCEIVER_RESET_ATTR_ID(1), + TRANSCEIVER_RESET_ATTR_ID(2), + TRANSCEIVER_RESET_ATTR_ID(3), + TRANSCEIVER_RESET_ATTR_ID(4), + TRANSCEIVER_RESET_ATTR_ID(5), + TRANSCEIVER_RESET_ATTR_ID(6), + TRANSCEIVER_RESET_ATTR_ID(7), + TRANSCEIVER_RESET_ATTR_ID(8), + TRANSCEIVER_RESET_ATTR_ID(9), + TRANSCEIVER_RESET_ATTR_ID(10), + TRANSCEIVER_RESET_ATTR_ID(11), + TRANSCEIVER_RESET_ATTR_ID(12), + TRANSCEIVER_RESET_ATTR_ID(13), + TRANSCEIVER_RESET_ATTR_ID(14), + TRANSCEIVER_RESET_ATTR_ID(15), + TRANSCEIVER_RESET_ATTR_ID(16), + TRANSCEIVER_RESET_ATTR_ID(17), + TRANSCEIVER_RESET_ATTR_ID(18), + TRANSCEIVER_RESET_ATTR_ID(19), + TRANSCEIVER_RESET_ATTR_ID(20), + TRANSCEIVER_RESET_ATTR_ID(21), + TRANSCEIVER_RESET_ATTR_ID(22), + TRANSCEIVER_RESET_ATTR_ID(23), + TRANSCEIVER_RESET_ATTR_ID(24), + TRANSCEIVER_RESET_ATTR_ID(25), + TRANSCEIVER_RESET_ATTR_ID(26), + TRANSCEIVER_RESET_ATTR_ID(27), + TRANSCEIVER_RESET_ATTR_ID(28), + TRANSCEIVER_RESET_ATTR_ID(29), + TRANSCEIVER_RESET_ATTR_ID(30), + TRANSCEIVER_RESET_ATTR_ID(31), + TRANSCEIVER_RESET_ATTR_ID(32), + TRANSCEIVER_LPMODE_ATTR_ID(1), + TRANSCEIVER_LPMODE_ATTR_ID(2), + TRANSCEIVER_LPMODE_ATTR_ID(3), + TRANSCEIVER_LPMODE_ATTR_ID(4), + TRANSCEIVER_LPMODE_ATTR_ID(5), + TRANSCEIVER_LPMODE_ATTR_ID(6), + TRANSCEIVER_LPMODE_ATTR_ID(7), + TRANSCEIVER_LPMODE_ATTR_ID(8), + TRANSCEIVER_LPMODE_ATTR_ID(9), + TRANSCEIVER_LPMODE_ATTR_ID(10), + TRANSCEIVER_LPMODE_ATTR_ID(11), + TRANSCEIVER_LPMODE_ATTR_ID(12), + TRANSCEIVER_LPMODE_ATTR_ID(13), + TRANSCEIVER_LPMODE_ATTR_ID(14), + TRANSCEIVER_LPMODE_ATTR_ID(15), + TRANSCEIVER_LPMODE_ATTR_ID(16), + TRANSCEIVER_LPMODE_ATTR_ID(17), + TRANSCEIVER_LPMODE_ATTR_ID(18), + TRANSCEIVER_LPMODE_ATTR_ID(19), + TRANSCEIVER_LPMODE_ATTR_ID(20), + TRANSCEIVER_LPMODE_ATTR_ID(21), + TRANSCEIVER_LPMODE_ATTR_ID(22), + TRANSCEIVER_LPMODE_ATTR_ID(23), + TRANSCEIVER_LPMODE_ATTR_ID(24), + TRANSCEIVER_LPMODE_ATTR_ID(25), + TRANSCEIVER_LPMODE_ATTR_ID(26), + TRANSCEIVER_LPMODE_ATTR_ID(27), + TRANSCEIVER_LPMODE_ATTR_ID(28), + TRANSCEIVER_LPMODE_ATTR_ID(29), + TRANSCEIVER_LPMODE_ATTR_ID(30), + TRANSCEIVER_LPMODE_ATTR_ID(31), + TRANSCEIVER_LPMODE_ATTR_ID(32), +}; + +/* sysfs attributes for hwmon + */ +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_status(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +static int as6712_32x_cpld_read_internal(struct i2c_client *client, u8 reg); +static int as6712_32x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value); + +/* transceiver attributes */ +#define DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_status, NULL, MODULE_PRESENT_##index); \ + static SENSOR_DEVICE_ATTR(module_reset_##index, S_IWUSR|S_IRUGO, show_status, set_status, MODULE_RESET_##index); \ + static SENSOR_DEVICE_ATTR(module_lp_mode_##index, S_IRUGO | S_IWUSR, show_status, set_status, MODULE_LPMODE_##index) +#define DECLARE_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_present_##index.dev_attr.attr, \ + &sensor_dev_attr_module_reset_##index.dev_attr.attr, \ + &sensor_dev_attr_module_lp_mode_##index.dev_attr.attr + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS); +/* transceiver attributes */ +static SENSOR_DEVICE_ATTR(module_present_all, S_IRUGO, show_present_all, NULL, MODULE_PRESENT_ALL); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(1); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(2); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(3); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(4); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(5); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(6); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(7); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(8); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(9); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(10); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(11); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(12); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(13); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(14); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(15); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(16); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(17); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(18); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(19); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(20); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(21); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(22); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(23); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(24); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(25); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(26); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(27); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(28); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(29); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(30); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(31); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(32); + + +static struct attribute *as6712_32x_cpld1_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + NULL +}; + +static const struct attribute_group as6712_32x_cpld1_group = { + .attrs = as6712_32x_cpld1_attributes, +}; + +static struct attribute *as6712_32x_cpld2_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + DECLARE_TRANSCEIVER_ATTR(1), + DECLARE_TRANSCEIVER_ATTR(2), + DECLARE_TRANSCEIVER_ATTR(3), + DECLARE_TRANSCEIVER_ATTR(4), + DECLARE_TRANSCEIVER_ATTR(5), + DECLARE_TRANSCEIVER_ATTR(6), + DECLARE_TRANSCEIVER_ATTR(7), + DECLARE_TRANSCEIVER_ATTR(8), + DECLARE_TRANSCEIVER_ATTR(9), + DECLARE_TRANSCEIVER_ATTR(10), + DECLARE_TRANSCEIVER_ATTR(11), + DECLARE_TRANSCEIVER_ATTR(12), + DECLARE_TRANSCEIVER_ATTR(13), + DECLARE_TRANSCEIVER_ATTR(14), + DECLARE_TRANSCEIVER_ATTR(15), + DECLARE_TRANSCEIVER_ATTR(16), + NULL +}; + +static const struct attribute_group as6712_32x_cpld2_group = { + .attrs = as6712_32x_cpld2_attributes, +}; + +static struct attribute *as6712_32x_cpld3_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + DECLARE_TRANSCEIVER_ATTR(17), + DECLARE_TRANSCEIVER_ATTR(18), + DECLARE_TRANSCEIVER_ATTR(19), + DECLARE_TRANSCEIVER_ATTR(20), + DECLARE_TRANSCEIVER_ATTR(21), + DECLARE_TRANSCEIVER_ATTR(22), + DECLARE_TRANSCEIVER_ATTR(23), + DECLARE_TRANSCEIVER_ATTR(24), + DECLARE_TRANSCEIVER_ATTR(25), + DECLARE_TRANSCEIVER_ATTR(26), + DECLARE_TRANSCEIVER_ATTR(27), + DECLARE_TRANSCEIVER_ATTR(28), + DECLARE_TRANSCEIVER_ATTR(29), + DECLARE_TRANSCEIVER_ATTR(30), + DECLARE_TRANSCEIVER_ATTR(31), + DECLARE_TRANSCEIVER_ATTR(32), + NULL +}; + +static const struct attribute_group as6712_32x_cpld3_group = { + .attrs = as6712_32x_cpld3_attributes, +}; + +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u8 values[2] = {0}; + u8 regs[] = {0xA, 0xB}; + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as6712_32x_cpld_data *data = i2c_mux_priv(muxc); + + mutex_lock(&data->update_lock); + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = as6712_32x_cpld_read_internal(client, regs[i]); + + if (status < 0) { + goto exit; + } + + values[i] = ~(u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values 1 -> 32 in order */ + return sprintf(buf, "%.2x %.2x\n", values[0], values[1]); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_status(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as6712_32x_cpld_data *data = i2c_mux_priv(muxc); + + int status = 0, reverse = 0; + u8 reg = 0, mask = 0; + u32 val, para; + + if (sscanf(buf, "%d", ¶) != 1) { + return -EINVAL; + } + + switch (attr->index) { + case MODULE_RESET_1 ... MODULE_RESET_32: + reg = 0x4 + (((attr->index - MODULE_RESET_1)/8)%2); + mask = 0x1 << ((attr->index - MODULE_RESET_1)%8); + reverse = 1; + break; + case MODULE_LPMODE_1 ... MODULE_LPMODE_32: + reg = 0xC + (((attr->index - MODULE_LPMODE_1)/8)%2); + mask = 0x1 << ((attr->index - MODULE_LPMODE_1)%8); + break; + default: + return 0; + } + + mutex_lock(&data->update_lock); + status = as6712_32x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + val = status & ~mask; + if (!para && reverse) { /*0 means reset*/ + val |= mask; + } + + status = as6712_32x_cpld_write_internal(client, reg, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as6712_32x_cpld_data *data = i2c_mux_priv(muxc); + int status = 0; + u8 reg = 0, mask = 0; + + switch (attr->index) { + case MODULE_PRESENT_1 ... MODULE_PRESENT_8: + reg = 0xA; + mask = 0x1 << (attr->index - MODULE_PRESENT_1); + break; + case MODULE_PRESENT_9 ... MODULE_PRESENT_16: + reg = 0xB; + mask = 0x1 << (attr->index - MODULE_PRESENT_9); + break; + case MODULE_PRESENT_17 ... MODULE_PRESENT_24: + reg = 0xA; + mask = 0x1 << (attr->index - MODULE_PRESENT_17); + break; + case MODULE_PRESENT_25 ... MODULE_PRESENT_32: + reg = 0xB; + mask = 0x1 << (attr->index - MODULE_PRESENT_25); + break; + case MODULE_RESET_1 ... MODULE_RESET_32: + reg = 0x4 + (((attr->index - MODULE_RESET_1)/8)%2); + mask = 0x1 << ((attr->index - MODULE_RESET_1)%8); + break; + case MODULE_LPMODE_1 ... MODULE_LPMODE_32: + reg = 0xC + (((attr->index - MODULE_LPMODE_1)/8)%2); + mask = 0x1 << ((attr->index - MODULE_LPMODE_1)%8); + break; + + default: + return 0; + } + + mutex_lock(&data->update_lock); + status = as6712_32x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", !(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as6712_32x_cpld_data *data = i2c_mux_priv(muxc); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = as6712_32x_cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() + for this as they will try to lock adapter a second time */ +static int as6712_32x_cpld_mux_reg_write(struct i2c_adapter *adap, + struct i2c_client *client, u8 val) +{ + unsigned long orig_jiffies; + unsigned short flags; + union i2c_smbus_data data; + int try; + s32 res = -EIO; + + data.byte = val; + flags = client->flags; + flags &= I2C_M_TEN | I2C_CLIENT_PEC; + + if (adap->algo->smbus_xfer) { + /* Retry automatically on arbitration loss */ + orig_jiffies = jiffies; + for (res = 0, try = 0; try <= adap->retries; try++) { + res = adap->algo->smbus_xfer(adap, client->addr, flags, + I2C_SMBUS_WRITE, CPLD_CHANNEL_SELECT_REG, + I2C_SMBUS_BYTE_DATA, &data); + if (res != -EAGAIN) + break; + if (time_after(jiffies, + orig_jiffies + adap->timeout)) + break; + } + } + + return res; +} + +static int as6712_32x_cpld_mux_select_chan(struct i2c_mux_core *muxc, + u32 chan) +{ + struct as6712_32x_cpld_data *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + u8 regval; + int ret = 0; + regval = chan; + + /* Only select the channel if its different from the last channel */ + if (data->last_chan != regval) { + ret = as6712_32x_cpld_mux_reg_write(muxc->parent, client, regval); + data->last_chan = regval; + } + + return ret; +} + +static int as6712_32x_cpld_mux_deselect_mux(struct i2c_mux_core *muxc, + u32 chan) +{ + struct as6712_32x_cpld_data *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + + /* Deselect active channel */ + data->last_chan = chips[data->type].deselectChan; + + return as6712_32x_cpld_mux_reg_write(muxc->parent, client, data->last_chan); +} + +static void as6712_32x_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as6712_32x_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, 0x1); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d", val); +} + +/* + * I2C init/probing/exit functions + */ +static int as6712_32x_cpld_mux_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + int force, class; + struct i2c_mux_core *muxc; + struct as6712_32x_cpld_data *data; + int chan = 0; + int ret = -ENODEV; + const struct attribute_group *group = NULL; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + return -ENODEV; + + muxc = i2c_mux_alloc(adap, &client->dev, + chips[id->driver_data].nchans, + sizeof(*data), 0, + as6712_32x_cpld_mux_select_chan, + as6712_32x_cpld_mux_deselect_mux); + if (!muxc) + return -ENOMEM; + + i2c_set_clientdata(client, muxc); + data = i2c_mux_priv(muxc); + data->client = client; + mutex_init(&data->update_lock); + + if (data->type == as6712_32x_cpld2 || data->type == as6712_32x_cpld3) { + data->type = id->driver_data; + data->last_chan = chips[data->type].deselectChan; /* force the first selection */ + + /* Now create an adapter for each channel */ + for (chan = 0; chan < chips[data->type].nchans; chan++) { + force = 0; /* dynamic adap number */ + class = 0; /* no class by default */ + + ret = i2c_mux_add_adapter(muxc, force, chan, class); + + if (ret) { + ret = -ENODEV; + dev_err(&client->dev, "failed to register multiplexed adapter %d\n", chan); + goto exit_mux_register; + } + } + + dev_info(&client->dev, "registered %d multiplexed busses for I2C mux %s\n", + chan, client->name); + } + + /* Register sysfs hooks */ + switch (data->type) { + case as6712_32x_cpld1: + group = &as6712_32x_cpld1_group; + break; + case as6712_32x_cpld2: + group = &as6712_32x_cpld2_group; + break; + case as6712_32x_cpld3: + group = &as6712_32x_cpld3_group; + break; + default: + break; + } + + if (group) { + ret = sysfs_create_group(&client->dev.kobj, group); + if (ret) { + goto exit_mux_register; + } + } + + if (chips[data->type].nchans) { + dev_info(&client->dev, + "registered %d multiplexed busses for I2C %s\n", + chan, client->name); + } + else { + dev_info(&client->dev, + "device %s registered\n", client->name); + } + + as6712_32x_cpld_add_client(client); + + return 0; + +exit_mux_register: + i2c_mux_del_adapters(muxc); + kfree(data); + return ret; +} + +static int as6712_32x_cpld_mux_remove(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct as6712_32x_cpld_data *data = i2c_mux_priv(muxc); + const struct attribute_group *group = NULL; + + as6712_32x_cpld_remove_client(client); + + /* Remove sysfs hooks */ + switch (data->type) { + case as6712_32x_cpld1: + group = &as6712_32x_cpld1_group; + break; + case as6712_32x_cpld2: + group = &as6712_32x_cpld2_group; + break; + case as6712_32x_cpld3: + group = &as6712_32x_cpld3_group; + break; + default: + break; + } + + if (group) { + sysfs_remove_group(&client->dev.kobj, group); + } + + i2c_mux_del_adapters(muxc); + + return 0; +} + +static int as6712_32x_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int as6712_32x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +int as6712_32x_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as6712_32x_cpld_read_internal(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as6712_32x_cpld_read); + +int as6712_32x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as6712_32x_cpld_write_internal(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as6712_32x_cpld_write); + +static struct i2c_driver as6712_32x_cpld_mux_driver = { + .driver = { + .name = "as6712_32x_cpld", + .owner = THIS_MODULE, + }, + .probe = as6712_32x_cpld_mux_probe, + .remove = as6712_32x_cpld_mux_remove, + .id_table = as6712_32x_cpld_mux_id, +}; + +static int __init as6712_32x_cpld_mux_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as6712_32x_cpld_mux_driver); +} + +static void __exit as6712_32x_cpld_mux_exit(void) +{ + i2c_del_driver(&as6712_32x_cpld_mux_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("Accton as6712-32x CPLD driver"); +MODULE_LICENSE("GPL"); + +module_init(as6712_32x_cpld_mux_init); +module_exit(as6712_32x_cpld_mux_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton_as6712_32x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton_as6712_32x_fan.c new file mode 100644 index 00000000000..7033d8b7568 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton_as6712_32x_fan.c @@ -0,0 +1,463 @@ +/* + * A hwmon driver for the Accton as6712 32x fan contrl + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as6712_32x_fan" + +#define FAN_MAX_NUMBER 5 +#define FAN_SPEED_CPLD_TO_RPM_STEP 150 +#define FAN_SPEED_PRECENT_TO_CPLD_STEP 5 +#define FAN_DUTY_CYCLE_MIN 0 /* 10% ??*/ +#define FAN_DUTY_CYCLE_MAX 100 /* 100% */ + +#define CPLD_REG_FAN_STATUS_OFFSET 0xC +#define CPLD_REG_FANR_STATUS_OFFSET 0x17 +#define CPLD_REG_FAN_DIRECTION_OFFSET 0x1E + +#define CPLD_FAN1_REG_SPEED_OFFSET 0x10 +#define CPLD_FAN2_REG_SPEED_OFFSET 0x11 +#define CPLD_FAN3_REG_SPEED_OFFSET 0x12 +#define CPLD_FAN4_REG_SPEED_OFFSET 0x13 +#define CPLD_FAN5_REG_SPEED_OFFSET 0x14 + +#define CPLD_FANR1_REG_SPEED_OFFSET 0x18 +#define CPLD_FANR2_REG_SPEED_OFFSET 0x19 +#define CPLD_FANR3_REG_SPEED_OFFSET 0x1A +#define CPLD_FANR4_REG_SPEED_OFFSET 0x1B +#define CPLD_FANR5_REG_SPEED_OFFSET 0x1C + +#define CPLD_REG_FAN_PWM_CYCLE_OFFSET 0xD + +#define CPLD_FAN1_INFO_BIT_MASK 0x1 +#define CPLD_FAN2_INFO_BIT_MASK 0x2 +#define CPLD_FAN3_INFO_BIT_MASK 0x4 +#define CPLD_FAN4_INFO_BIT_MASK 0x8 +#define CPLD_FAN5_INFO_BIT_MASK 0x10 + +#define PROJECT_NAME + +#define DEBUG_MODE 0 + +#if (DEBUG_MODE == 1) + #define DEBUG_PRINT(format, ...) printk(format, __VA_ARGS__) +#else + #define DEBUG_PRINT(format, ...) +#endif + +static struct accton_as6712_32x_fan *fan_data = NULL; + +struct accton_as6712_32x_fan { + struct platform_device *pdev; + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status[FAN_MAX_NUMBER]; /* inner first fan status */ + u32 speed[FAN_MAX_NUMBER]; /* inner first fan speed */ + u8 direction[FAN_MAX_NUMBER]; /* reconrd the direction of inner first and second fans */ + u32 duty_cycle[FAN_MAX_NUMBER]; /* control the speed of inner first and second fans */ + u8 r_status[FAN_MAX_NUMBER]; /* inner second fan status */ + u32 r_speed[FAN_MAX_NUMBER]; /* inner second fan speed */ +}; + +/*******************/ +#define MAKE_FAN_MASK_OR_REG(name,type) \ + CPLD_FAN##type##1_##name, \ + CPLD_FAN##type##2_##name, \ + CPLD_FAN##type##3_##name, \ + CPLD_FAN##type##4_##name, \ + CPLD_FAN##type##5_##name, + +/* fan related data + */ +static const u8 fan_info_mask[] = { + MAKE_FAN_MASK_OR_REG(INFO_BIT_MASK,) +}; + +static const u8 fan_speed_reg[] = { + MAKE_FAN_MASK_OR_REG(REG_SPEED_OFFSET,) +}; + +static const u8 fanr_speed_reg[] = { + MAKE_FAN_MASK_OR_REG(REG_SPEED_OFFSET,R) +}; + +/*******************/ +#define DEF_FAN_SET(id) \ + FAN##id##_FAULT, \ + FAN##id##_SPEED, \ + FAN##id##_DUTY_CYCLE, \ + FAN##id##_DIRECTION, \ + FANR##id##_FAULT, \ + FANR##id##_SPEED, + +enum sysfs_fan_attributes { + DEF_FAN_SET(1) + DEF_FAN_SET(2) + DEF_FAN_SET(3) + DEF_FAN_SET(4) + DEF_FAN_SET(5) +}; +/*******************/ +static void accton_as6712_32x_fan_update_device(struct device *dev); +static int accton_as6712_32x_fan_read_value(u8 reg); +static int accton_as6712_32x_fan_write_value(u8 reg, u8 value); + +static ssize_t fan_set_duty_cycle(struct device *dev, + struct device_attribute *da,const char *buf, size_t count); +static ssize_t fan_show_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t show_name(struct device *dev, + struct device_attribute *da, char *buf); + +extern int as6712_32x_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as6712_32x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + + +/*******************/ +#define _MAKE_SENSOR_DEVICE_ATTR(prj, id, id2) \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, \ + fan_set_duty_cycle, FAN##id##_DUTY_CYCLE); \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_direction, S_IRUGO, fan_show_value, NULL, FAN##id##_DIRECTION); \ + static SENSOR_DEVICE_ATTR(prj##fanr##id##_fault, S_IRUGO, fan_show_value, NULL, FANR##id##_FAULT); \ + static SENSOR_DEVICE_ATTR(prj##fanr##id##_speed_rpm, S_IRUGO, fan_show_value, NULL, FANR##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_input, S_IRUGO, fan_show_value, NULL, FAN##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id2##_input, S_IRUGO, fan_show_value, NULL, FANR##id##_SPEED); \ + static SENSOR_DEVICE_ATTR(prj##fan##id##_fault, S_IRUGO, fan_show_value, NULL, FAN##id##_FAULT); \ + static SENSOR_DEVICE_ATTR(prj##fan##id2##_fault, S_IRUGO, fan_show_value, NULL, FAN##id##_FAULT); + +#define MAKE_SENSOR_DEVICE_ATTR(prj,id, id2) _MAKE_SENSOR_DEVICE_ATTR(prj,id, id2) + +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME ,1 ,11) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME ,2 ,12) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME ,3 ,13) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME ,4 ,14) +MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME ,5 ,15) + +static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, 0); +/*******************/ + +#define _MAKE_FAN_ATTR(prj, id, id2) \ + &sensor_dev_attr_##prj##fan##id##_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id##_duty_cycle_percentage.dev_attr.attr,\ + &sensor_dev_attr_##prj##fan##id##_direction.dev_attr.attr, \ + &sensor_dev_attr_##prj##fanr##id##_fault.dev_attr.attr, \ + &sensor_dev_attr_##prj##fanr##id##_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id##_input.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id2##_input.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id##_fault.dev_attr.attr, \ + &sensor_dev_attr_##prj##fan##id2##_fault.dev_attr.attr, + + +#define MAKE_FAN_ATTR(prj, id, id2) _MAKE_FAN_ATTR(prj, id, id2) + +static struct attribute *accton_as6712_32x_fan_attributes[] = { + /* fan related attributes */ + MAKE_FAN_ATTR(PROJECT_NAME,1 ,11) + MAKE_FAN_ATTR(PROJECT_NAME,2 ,12) + MAKE_FAN_ATTR(PROJECT_NAME,3 ,13) + MAKE_FAN_ATTR(PROJECT_NAME,4 ,14) + MAKE_FAN_ATTR(PROJECT_NAME,5 ,15) + &sensor_dev_attr_name.dev_attr.attr, + NULL +}; +/*******************/ + +/* fan related functions + */ +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + ssize_t ret = 0; + int data_index, type_index; + + accton_as6712_32x_fan_update_device(dev); + + if (fan_data->valid == 0) { + return ret; + } + + type_index = attr->index%FAN2_FAULT; + data_index = attr->index/FAN2_FAULT; + + switch (type_index) { + case FAN1_FAULT: + ret = sprintf(buf, "%d\n", fan_data->status[data_index]); + DEBUG_PRINT("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FAN1_SPEED: + ret = sprintf(buf, "%d\n", fan_data->speed[data_index]); + DEBUG_PRINT("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FAN1_DUTY_CYCLE: + ret = sprintf(buf, "%d\n", fan_data->duty_cycle[data_index]); + DEBUG_PRINT("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FAN1_DIRECTION: + ret = sprintf(buf, "%d\n", fan_data->direction[data_index]); /* presnet, need to modify*/ + DEBUG_PRINT("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FANR1_FAULT: + ret = sprintf(buf, "%d\n", fan_data->r_status[data_index]); + DEBUG_PRINT("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + case FANR1_SPEED: + ret = sprintf(buf, "%d\n", fan_data->r_speed[data_index]); + DEBUG_PRINT("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); + break; + default: + DEBUG_PRINT("[Check !!][%s][%d] \n", __FUNCTION__, __LINE__); + break; + } + + return ret; +} + +static ssize_t show_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + return sprintf(buf, "%s\n", DRVNAME); +} +/*******************/ +static ssize_t fan_set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) { + + int error, value; + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < FAN_DUTY_CYCLE_MIN || value > FAN_DUTY_CYCLE_MAX) + return -EINVAL; + + accton_as6712_32x_fan_write_value(CPLD_REG_FAN_PWM_CYCLE_OFFSET, value/FAN_SPEED_PRECENT_TO_CPLD_STEP); + + fan_data->valid = 0; + + return count; +} + +static const struct attribute_group accton_as6712_32x_fan_group = { + .attrs = accton_as6712_32x_fan_attributes, +}; + +static int accton_as6712_32x_fan_read_value(u8 reg) +{ + return as6712_32x_cpld_read(0x60, reg); +} + +static int accton_as6712_32x_fan_write_value(u8 reg, u8 value) +{ + return as6712_32x_cpld_write(0x60, reg, value); +} + +static void accton_as6712_32x_fan_update_device(struct device *dev) +{ + int speed, r_speed, fault, r_fault, direction, ctrl_speed; + int i; + int retry_count; + + mutex_lock(&fan_data->update_lock); + + DEBUG_PRINT("Starting accton_as6712_32x_fan update \n"); + + if (!(time_after(jiffies, fan_data->last_updated + HZ + HZ / 2) || !fan_data->valid)) { + /* do nothing */ + goto _exit; + } + + fan_data->valid = 0; + + DEBUG_PRINT("Starting accton_as6712_32x_fan update 2 \n"); + + fault = accton_as6712_32x_fan_read_value(CPLD_REG_FAN_STATUS_OFFSET); + r_fault = accton_as6712_32x_fan_read_value(CPLD_REG_FANR_STATUS_OFFSET); + direction = accton_as6712_32x_fan_read_value(CPLD_REG_FAN_DIRECTION_OFFSET); + ctrl_speed = accton_as6712_32x_fan_read_value(CPLD_REG_FAN_PWM_CYCLE_OFFSET); + + if ( (fault < 0) || (r_fault < 0) || (ctrl_speed < 0) ) + { + DEBUG_PRINT("[Error!!][%s][%d] \n", __FUNCTION__, __LINE__); + goto _exit; /* error */ + } + + DEBUG_PRINT("[fan:] fault:%d, r_fault=%d, ctrl_speed=%d \n",fault, r_fault, ctrl_speed); + + for (i = 0; i < FAN_MAX_NUMBER; i++) + { + /* Update fan data + */ + + /* fan fault + * 0: normal, 1:abnormal + * Each FAN-tray module has two fans. + */ + fan_data->status[i] = (fault & fan_info_mask[i]) >> i; + DEBUG_PRINT("[fan%d:] fail=%d \n",i, fan_data->status[i]); + + fan_data->r_status[i] = (r_fault & fan_info_mask[i]) >> i; + fan_data->direction[i] = (direction & fan_info_mask[i]) >> i; + fan_data->duty_cycle[i] = ctrl_speed * FAN_SPEED_PRECENT_TO_CPLD_STEP; + + /* fan speed + */ + speed = 0; + r_speed = 0; + retry_count = 3; + while (retry_count) { + retry_count--; + speed = accton_as6712_32x_fan_read_value(fan_speed_reg[i]); + r_speed = accton_as6712_32x_fan_read_value(fanr_speed_reg[i]); + if ( (speed < 0) || (r_speed < 0) ) + { + DEBUG_PRINT("[Error!!][%s][%d] \n", __FUNCTION__, __LINE__); + goto _exit; /* error */ + } + if ( (speed == 0) || (r_speed == 0) ) + { + msleep(50); + continue; + } + break; + } + + DEBUG_PRINT("[fan%d:] speed:%d, r_speed=%d \n", i, speed, r_speed); + + fan_data->speed[i] = speed * FAN_SPEED_CPLD_TO_RPM_STEP; + fan_data->r_speed[i] = r_speed * FAN_SPEED_CPLD_TO_RPM_STEP; + } + + /* finish to update */ + fan_data->last_updated = jiffies; + fan_data->valid = 1; + +_exit: + mutex_unlock(&fan_data->update_lock); +} + +static int accton_as6712_32x_fan_probe(struct platform_device *pdev) +{ + int status = -1; + + /* Register sysfs hooks */ + status = sysfs_create_group(&pdev->dev.kobj, &accton_as6712_32x_fan_group); + if (status) { + goto exit; + + } + + fan_data->hwmon_dev = hwmon_device_register(&pdev->dev); + if (IS_ERR(fan_data->hwmon_dev)) { + status = PTR_ERR(fan_data->hwmon_dev); + goto exit_remove; + } + + dev_info(&pdev->dev, "accton_as6712_32x_fan\n"); + + return 0; + +exit_remove: + sysfs_remove_group(&pdev->dev.kobj, &accton_as6712_32x_fan_group); +exit: + return status; +} + +static int accton_as6712_32x_fan_remove(struct platform_device *pdev) +{ + hwmon_device_unregister(fan_data->hwmon_dev); + sysfs_remove_group(&fan_data->pdev->dev.kobj, &accton_as6712_32x_fan_group); + + return 0; +} + + + +static struct platform_driver accton_as6712_32x_fan_driver = { + .probe = accton_as6712_32x_fan_probe, + .remove = accton_as6712_32x_fan_remove, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as6712_32x_fan_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as6712_32x_fan_driver); + if (ret < 0) { + goto exit; + } + + fan_data = kzalloc(sizeof(struct accton_as6712_32x_fan), GFP_KERNEL); + if (!fan_data) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as6712_32x_fan_driver); + goto exit; + } + + mutex_init(&fan_data->update_lock); + fan_data->valid = 0; + + fan_data->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(fan_data->pdev)) { + ret = PTR_ERR(fan_data->pdev); + platform_driver_unregister(&accton_as6712_32x_fan_driver); + kfree(fan_data); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as6712_32x_fan_exit(void) +{ + platform_device_unregister(fan_data->pdev); + platform_driver_unregister(&accton_as6712_32x_fan_driver); + kfree(fan_data); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as6712_32x_fan driver"); +MODULE_LICENSE("GPL"); + +module_init(accton_as6712_32x_fan_init); +module_exit(accton_as6712_32x_fan_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton_as6712_32x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton_as6712_32x_psu.c new file mode 100644 index 00000000000..5b9eda26148 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton_as6712_32x_psu.c @@ -0,0 +1,364 @@ +/* + * An hwmon driver for accton as6712_32x Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PSU_STATUS_I2C_ADDR 0x60 +#define PSU_STATUS_I2C_REG_OFFSET 0x2 + +#define IS_POWER_GOOD(id, value) (!!(value & BIT(id*4 + 1))) +#define IS_PRESENT(id, value) (!(value & BIT(id*4))) + +static ssize_t show_index(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); +static int as6712_32x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as6712_32x_cpld_read(unsigned short cpld_addr, u8 reg); +static int as6712_32x_psu_model_name_get(struct device *dev); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as6712_32x_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[14]; /* Model name, read from eeprom */ +}; + +static struct as6712_32x_psu_data *as6712_32x_psu_update_device(struct device *dev); + +enum as6712_32x_psu_sysfs_attributes { + PSU_INDEX, + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_index, S_IRUGO, show_index, NULL, PSU_INDEX); +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_model_name,NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); + +static struct attribute *as6712_32x_psu_attributes[] = { + &sensor_dev_attr_psu_index.dev_attr.attr, + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + NULL +}; + +static ssize_t show_index(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as6712_32x_psu_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->index); +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as6712_32x_psu_data *data = as6712_32x_psu_update_device(dev); + u8 status = 0; + + if (!data->valid) { + return sprintf(buf, "0\n"); + } + + if (attr->index == PSU_PRESENT) { + status = IS_PRESENT(data->index, data->status); + } + else { /* PSU_POWER_GOOD */ + status = IS_POWER_GOOD(data->index, data->status); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as6712_32x_psu_data *data = as6712_32x_psu_update_device(dev); + + if (!data->valid) { + return 0; + } + + if (!IS_PRESENT(data->index, data->status)) { + return 0; + } + + if (as6712_32x_psu_model_name_get(dev) < 0) { + return -ENXIO; + } + return sprintf(buf, "%s\n", data->model_name); +} + +static const struct attribute_group as6712_32x_psu_group = { + .attrs = as6712_32x_psu_attributes, +}; + +static int as6712_32x_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as6712_32x_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as6712_32x_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as6712_32x_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as6712_32x_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as6712_32x_psu_remove(struct i2c_client *client) +{ + struct as6712_32x_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as6712_32x_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as6712_32x_psu1, + as6712_32x_psu2 +}; + +static const struct i2c_device_id as6712_32x_psu_id[] = { + { "as6712_32x_psu1", as6712_32x_psu1 }, + { "as6712_32x_psu2", as6712_32x_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as6712_32x_psu_id); + +static struct i2c_driver as6712_32x_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as6712_32x_psu", + }, + .probe = as6712_32x_psu_probe, + .remove = as6712_32x_psu_remove, + .id_table = as6712_32x_psu_id, + .address_list = normal_i2c, +}; + +static int as6712_32x_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = 0; + int retry_count = 5; + + while (retry_count) { + retry_count--; + + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) { + msleep(10); + continue; + } + + if (unlikely(result != data_len)) { + result = -EIO; + msleep(10); + continue; + } + + result = 0; + break; + } + + return result; +} + +enum psu_type { + PSU_YM_2401_JCR, /* AC110V - F2B */ + PSU_YM_2401_JDR, /* AC110V - B2F */ + PSU_CPR_4011_4M11, /* AC110V - F2B */ + PSU_CPR_4011_4M21, /* AC110V - B2F */ + PSU_CPR_6011_2M11, /* AC110V - F2B */ + PSU_CPR_6011_2M21, /* AC110V - B2F */ + PSU_UM400D_01G, /* DC48V - F2B */ + PSU_UM400D01_01G /* DC48V - B2F */ +}; + +struct model_name_info { + enum psu_type type; + u8 offset; + u8 length; + char* model_name; +}; + +struct model_name_info models[] = { +{PSU_YM_2401_JCR, 0x20, 11, "YM-2401JCR"}, +{PSU_YM_2401_JDR, 0x20, 11, "YM-2401JDR"}, +{PSU_CPR_4011_4M11, 0x26, 13, "CPR-4011-4M11"}, +{PSU_CPR_4011_4M21, 0x26, 13, "CPR-4011-4M21"}, +{PSU_CPR_6011_2M11, 0x26, 13, "CPR-6011-2M11"}, +{PSU_CPR_6011_2M21, 0x26, 13, "CPR-6011-2M21"}, +{PSU_UM400D_01G, 0x50, 9, "um400d01G"}, +{PSU_UM400D01_01G, 0x50, 12, "um400d01-01G"}, +}; + +static int as6712_32x_psu_model_name_get(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as6712_32x_psu_data *data = i2c_get_clientdata(client); + int i, status; + + for (i = 0; i < ARRAY_SIZE(models); i++) { + memset(data->model_name, 0, sizeof(data->model_name)); + + status = as6712_32x_psu_read_block(client, models[i].offset, + data->model_name, models[i].length); + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x) offset(0x%x)\n", + client->addr, models[i].offset); + return status; + } + else { + data->model_name[models[i].length] = '\0'; + } + + if (i == PSU_YM_2401_JCR || i == PSU_YM_2401_JDR) { + /* Skip the meaningless data byte 8*/ + data->model_name[8] = data->model_name[9]; + data->model_name[9] = data->model_name[10]; + data->model_name[10] = '\0'; + } + + /* Determine if the model name is known, if not, read next index + */ + if (strncmp(data->model_name, models[i].model_name, models[i].length) == 0) { + return 0; + } + else { + data->model_name[0] = '\0'; + } + } + + return -ENODATA; +} +static struct as6712_32x_psu_data *as6712_32x_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as6712_32x_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status = -1; + + dev_dbg(&client->dev, "Starting as6812_32x update\n"); + data->valid = 0; + + /* Read psu status */ + status = as6712_32x_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg (0x%x) err %d\n", PSU_STATUS_I2C_ADDR, status); + goto exit; + } + else { + data->status = status; + } + + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(as6712_32x_psu_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as6712_32x_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/cpr_4011_4mxx.c b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/cpr_4011_4mxx.c new file mode 100644 index 00000000000..15cef4ef50d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/cpr_4011_4mxx.c @@ -0,0 +1,439 @@ +/* + * An hwmon driver for the CPR-4011-4Mxx Redundant Power Module + * + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#if 0 +#define DEBUG +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_FAN_DUTY_CYCLE 100 + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x3c, 0x3d, 0x3e, 0x3f, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct cpr_4011_4mxx_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 vout_mode; /* Register value */ + u16 v_in; /* Register value */ + u16 v_out; /* Register value */ + u16 i_in; /* Register value */ + u16 i_out; /* Register value */ + u16 p_in; /* Register value */ + u16 p_out; /* Register value */ + u16 temp_input[2]; /* Register value */ + u8 fan_fault; /* Register value */ + u16 fan_duty_cycle[2]; /* Register value */ + u16 fan_speed[2]; /* Register value */ +}; + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_vout(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +static int cpr_4011_4mxx_write_word(struct i2c_client *client, u8 reg, u16 value); +static struct cpr_4011_4mxx_data *cpr_4011_4mxx_update_device(struct device *dev); + +enum cpr_4011_4mxx_sysfs_attributes { + PSU_V_IN, + PSU_V_OUT, + PSU_I_IN, + PSU_I_OUT, + PSU_P_IN, + PSU_P_OUT, + PSU_P_IN_UV, + PSU_P_OUT_UV, + PSU_TEMP1_INPUT, + PSU_FAN1_FAULT, + PSU_FAN1_DUTY_CYCLE, + PSU_FAN1_SPEED, +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_v_in, S_IRUGO, show_linear, NULL, PSU_V_IN); +static SENSOR_DEVICE_ATTR(psu_v_out, S_IRUGO, show_vout, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(psu_i_in, S_IRUGO, show_linear, NULL, PSU_I_IN); +static SENSOR_DEVICE_ATTR(psu_i_out, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(psu_p_in, S_IRUGO, show_linear, NULL, PSU_P_IN); +static SENSOR_DEVICE_ATTR(psu_p_out, S_IRUGO, show_linear, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(psu_temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, show_linear, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); + +/*Duplicate nodes for lm-sensors. 1 for input, 2 for output.*/ +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_linear, NULL, PSU_V_IN); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_vout, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, show_linear, NULL, PSU_I_IN); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_linear, NULL, PSU_P_IN_UV); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_linear, NULL, PSU_P_OUT_UV); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); + + + + + +static struct attribute *cpr_4011_4mxx_attributes[] = { + &sensor_dev_attr_psu_v_in.dev_attr.attr, + &sensor_dev_attr_psu_v_out.dev_attr.attr, + &sensor_dev_attr_psu_i_in.dev_attr.attr, + &sensor_dev_attr_psu_i_out.dev_attr.attr, + &sensor_dev_attr_psu_p_in.dev_attr.attr, + &sensor_dev_attr_psu_p_out.dev_attr.attr, + &sensor_dev_attr_psu_temp1_input.dev_attr.attr, + &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, + &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, + &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, + /*Duplicate nodes for lm-sensors.*/ + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan1_fault.dev_attr.attr, + NULL +}; + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); + int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; + long speed; + int error; + + error = kstrtol(buf, 10, &speed); + if (error) + return error; + + if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) + return -EINVAL; + + mutex_lock(&data->update_lock); + data->fan_duty_cycle[nr] = speed; + cpr_4011_4mxx_write_word(client, 0x3B + nr, data->fan_duty_cycle[nr]); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); + + u16 value = 0; + int exponent, mantissa; + int multiplier = 1000; + + switch (attr->index) { + case PSU_V_IN: + value = data->v_in; + break; + case PSU_I_IN: + value = data->i_in; + break; + case PSU_I_OUT: + value = data->i_out; + break; + case PSU_P_IN_UV: + multiplier = 1000000; /*For lm-sensors, unit is micro-Volt.*/ + /*Passing through*/ + case PSU_P_IN: + value = data->p_in; + break; + case PSU_P_OUT_UV: + multiplier = 1000000; /*For lm-sensors, unit is micro-Volt.*/ + /*Passing through*/ + case PSU_P_OUT: + value = data->p_out; + break; + case PSU_TEMP1_INPUT: + value = data->temp_input[0]; + break; + case PSU_FAN1_DUTY_CYCLE: + multiplier = 1; + value = data->fan_duty_cycle[0]; + break; + case PSU_FAN1_SPEED: + multiplier = 1; + value = data->fan_speed[0]; + break; + default: + break; + } + + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + + return (exponent >= 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); + + u8 shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; + + return sprintf(buf, "%d\n", data->fan_fault >> shift); +} + +static ssize_t show_vout(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); + int exponent, mantissa; + int multiplier = 1000; + + exponent = two_complement_to_int(data->vout_mode, 5, 0x1f); + mantissa = data->v_out; + + return (exponent > 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static const struct attribute_group cpr_4011_4mxx_group = { + .attrs = cpr_4011_4mxx_attributes, +}; + +static int cpr_4011_4mxx_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct cpr_4011_4mxx_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct cpr_4011_4mxx_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &cpr_4011_4mxx_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &cpr_4011_4mxx_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int cpr_4011_4mxx_remove(struct i2c_client *client) +{ + struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &cpr_4011_4mxx_group); + kfree(data); + + return 0; +} + +static const struct i2c_device_id cpr_4011_4mxx_id[] = { + { "cpr_4011_4mxx", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, cpr_4011_4mxx_id); + +static struct i2c_driver cpr_4011_4mxx_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "cpr_4011_4mxx", + }, + .probe = cpr_4011_4mxx_probe, + .remove = cpr_4011_4mxx_remove, + .id_table = cpr_4011_4mxx_id, + .address_list = normal_i2c, +}; + +static int cpr_4011_4mxx_read_byte(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int cpr_4011_4mxx_read_word(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_word_data(client, reg); +} + +static int cpr_4011_4mxx_write_word(struct i2c_client *client, u8 reg, u16 value) +{ + return i2c_smbus_write_word_data(client, reg, value); +} + +struct reg_data_byte { + u8 reg; + u8 *value; +}; + +struct reg_data_word { + u8 reg; + u16 *value; +}; + +static struct cpr_4011_4mxx_data *cpr_4011_4mxx_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int i, status; + struct reg_data_byte regs_byte[] = { {0x20, &data->vout_mode}, + {0x81, &data->fan_fault}}; + struct reg_data_word regs_word[] = { {0x96, &data->p_out}, /*p_out must be the first one.*/ + {0x97, &data->p_in}, + {0x8b, &data->v_out}, + {0x89, &data->i_in}, + {0x8c, &data->i_out}, + {0x8d, &(data->temp_input[0])}, + {0x8e, &(data->temp_input[1])}, + {0x3b, &(data->fan_duty_cycle[0])}, + {0x3c, &(data->fan_duty_cycle[1])}, + {0x90, &(data->fan_speed[0])}, + {0x91, &(data->fan_speed[1])}}; + + dev_dbg(&client->dev, "Starting cpr_4011_4mxx update\n"); + + /* Read byte data */ + for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { + status = cpr_4011_4mxx_read_byte(client, regs_byte[i].reg); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_byte[i].reg, status); + *(regs_byte[i].value) = 0; + } + else { + *(regs_byte[i].value) = status; + } + } + + /* Read word data */ + for (i = 0; i < ARRAY_SIZE(regs_word); i++) { + status = cpr_4011_4mxx_read_word(client, regs_word[i].reg); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_word[i].reg, status); + *(regs_word[i].value) = 0; + } + else { + *(regs_word[i].value) = status; + } + + /*Elimated false values. so p_out must be updated at first. */ + if (data->p_out == 0) { + *(regs_word[i].value) = 0; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init cpr_4011_4mxx_init(void) +{ + return i2c_add_driver(&cpr_4011_4mxx_driver); +} + +static void __exit cpr_4011_4mxx_exit(void) +{ + i2c_del_driver(&cpr_4011_4mxx_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("CPR_4011_4MXX driver"); +MODULE_LICENSE("GPL"); + +module_init(cpr_4011_4mxx_init); +module_exit(cpr_4011_4mxx_exit); diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/leds-accton_as6712_32x.c b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/leds-accton_as6712_32x.c new file mode 100644 index 00000000000..2b45bc8777c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/leds-accton_as6712_32x.c @@ -0,0 +1,612 @@ +/* + * A LED driver for the accton_as6712_32x_led + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include + +extern int as6712_32x_cpld_read (unsigned short cpld_addr, u8 reg); +extern int as6712_32x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern void led_classdev_unregister(struct led_classdev *led_cdev); +extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); +extern void led_classdev_resume(struct led_classdev *led_cdev); +extern void led_classdev_suspend(struct led_classdev *led_cdev); + +#define DRVNAME "as6712_32x_led" + +struct accton_as6712_32x_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[4]; /* Register value, 0 = LOC/DIAG/FAN LED + 1 = PSU1/PSU2 LED + 2 = FAN1-4 LED + 3 = FAN5-6 LED */ +}; + +static struct accton_as6712_32x_led_data *ledctl = NULL; + +/* LED related data + */ +#define LED_TYPE_PSU1_REG_MASK 0x03 +#define LED_MODE_PSU1_GREEN_MASK 0x02 +#define LED_MODE_PSU1_AMBER_MASK 0x01 +#define LED_MODE_PSU1_OFF_MASK 0x03 +#define LED_MODE_PSU1_AUTO_MASK 0x00 + +#define LED_TYPE_PSU2_REG_MASK 0x0C +#define LED_MODE_PSU2_GREEN_MASK 0x08 +#define LED_MODE_PSU2_AMBER_MASK 0x04 +#define LED_MODE_PSU2_OFF_MASK 0x0C +#define LED_MODE_PSU2_AUTO_MASK 0x00 + +#define LED_TYPE_DIAG_REG_MASK 0x0C +#define LED_MODE_DIAG_GREEN_MASK 0x08 +#define LED_MODE_DIAG_AMBER_MASK 0x04 +#define LED_MODE_DIAG_OFF_MASK 0x0C +#define LED_MODE_DIAG_BLINK_MASK 0x48 + +#define LED_TYPE_FAN_REG_MASK 0x03 +#define LED_MODE_FAN_GREEN_MASK 0x02 +#define LED_MODE_FAN_AMBER_MASK 0x01 +#define LED_MODE_FAN_OFF_MASK 0x03 +#define LED_MODE_FAN_AUTO_MASK 0x00 + +#define LED_TYPE_FAN1_REG_MASK 0x03 +#define LED_TYPE_FAN2_REG_MASK 0xC0 +#define LED_TYPE_FAN3_REG_MASK 0x30 +#define LED_TYPE_FAN4_REG_MASK 0x0C +#define LED_TYPE_FAN5_REG_MASK 0x03 + +#define LED_MODE_FANX_GREEN_MASK 0x01 +#define LED_MODE_FANX_RED_MASK 0x02 +#define LED_MODE_FANX_OFF_MASK 0x00 + +#define LED_TYPE_LOC_REG_MASK 0x30 +#define LED_MODE_LOC_ON_MASK 0x00 +#define LED_MODE_LOC_OFF_MASK 0x10 +#define LED_MODE_LOC_BLINK_MASK 0x20 + +static const u8 led_reg[] = { + 0xA, /* LOC/DIAG/FAN LED*/ + 0xB, /* PSU1/PSU2 LED */ + 0xE, /* FAN2-5 LED */ + 0xF, /* FAN1 LED */ +}; + +enum led_type { + LED_TYPE_PSU1, + LED_TYPE_PSU2, + LED_TYPE_DIAG, + LED_TYPE_FAN, + LED_TYPE_FAN1, + LED_TYPE_FAN2, + LED_TYPE_FAN3, + LED_TYPE_FAN4, + LED_TYPE_FAN5, + LED_TYPE_LOC +}; + +enum led_light_mode { + LED_MODE_OFF = 0, + LED_MODE_GREEN, + LED_MODE_AMBER, + LED_MODE_RED, + LED_MODE_GREEN_BLINK, + LED_MODE_AMBER_BLINK, + LED_MODE_RED_BLINK, + LED_MODE_AUTO, +}; + +struct led_type_mode { + enum led_type type; + int type_mask; + enum led_light_mode mode; + int mode_mask; +}; + +struct led_type_mode led_type_mode_data[] = { +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_GREEN, LED_MODE_PSU1_GREEN_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_AMBER, LED_MODE_PSU1_AMBER_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_AUTO, LED_MODE_PSU1_AUTO_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_OFF, LED_MODE_PSU1_OFF_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_GREEN, LED_MODE_PSU2_GREEN_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_AMBER, LED_MODE_PSU2_AMBER_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_AUTO, LED_MODE_PSU2_AUTO_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_OFF, LED_MODE_PSU2_OFF_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_GREEN, LED_MODE_FAN_GREEN_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_AMBER, LED_MODE_FAN_AMBER_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_AUTO, LED_MODE_FAN_AUTO_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_OFF, LED_MODE_FAN_OFF_MASK}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 0}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 0}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 0}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 6}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 6}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 6}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 4}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 4}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 4}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 2}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 2}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 2}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 0}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 0}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 0}, +{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_GREEN, LED_MODE_DIAG_GREEN_MASK}, +{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_AMBER, LED_MODE_DIAG_AMBER_MASK}, +{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_OFF, LED_MODE_DIAG_OFF_MASK}, +{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_GREEN_BLINK, LED_MODE_DIAG_BLINK_MASK}, +{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_AMBER, LED_MODE_LOC_ON_MASK}, +{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_OFF, LED_MODE_LOC_OFF_MASK}, +{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_AMBER_BLINK, LED_MODE_LOC_BLINK_MASK} +}; + + +struct fanx_info_s { + u8 cname; /* device name */ + enum led_type type; + u8 reg_id; /* map to led_reg & reg_val */ +}; + +static struct fanx_info_s fanx_info[] = { + {'1', LED_TYPE_FAN1, 3}, + {'2', LED_TYPE_FAN2, 2}, + {'3', LED_TYPE_FAN3, 2}, + {'4', LED_TYPE_FAN4, 2}, + {'5', LED_TYPE_FAN5, 2}, +}; + +static int led_reg_val_to_light_mode(enum led_type type, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + + if (type != led_type_mode_data[i].type) + continue; + + if (type == LED_TYPE_DIAG) + { /* special case : bit 6 - meaning blinking */ + if (0x40 & reg_val) + return LED_MODE_GREEN_BLINK; + } + if ((led_type_mode_data[i].type_mask & reg_val) == + led_type_mode_data[i].mode_mask) + { + return led_type_mode_data[i].mode; + } + } + + return 0; +} + +static u8 led_light_mode_to_reg_val(enum led_type type, + enum led_light_mode mode, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + if (type != led_type_mode_data[i].type) + continue; + + if (mode != led_type_mode_data[i].mode) + continue; + + if (type == LED_TYPE_DIAG) + { + if (mode == LED_MODE_GREEN_BLINK) + { /* special case : bit 6 - meaning blinking */ + reg_val = 0x48 | (reg_val & ~0x4C); + break; + } + else + { /* for diag led, other case must cancel bit 6 first */ + reg_val = reg_val & ~0x40; + } + } + reg_val = led_type_mode_data[i].mode_mask | + (reg_val & (~led_type_mode_data[i].type_mask)); + break; + } + + return reg_val; +} + +static int accton_as6712_32x_led_read_value(u8 reg) +{ + return as6712_32x_cpld_read(0x60, reg); +} + +static int accton_as6712_32x_led_write_value(u8 reg, u8 value) +{ + return as6712_32x_cpld_write(0x60, reg, value); +} + +static void accton_as6712_32x_led_update(void) +{ + mutex_lock(&ledctl->update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as6712_32x_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = accton_as6712_32x_led_read_value(led_reg[i]); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg[i], status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as6712_32x_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + u8 reg, enum led_type type) +{ + int reg_val; + + mutex_lock(&ledctl->update_lock); + + reg_val = accton_as6712_32x_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + accton_as6712_32x_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as6712_32x_led_psu_1_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as6712_32x_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_PSU1); +} + +static enum led_brightness accton_as6712_32x_led_psu_1_get(struct led_classdev *cdev) +{ + accton_as6712_32x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU1, ledctl->reg_val[1]); +} + +static void accton_as6712_32x_led_psu_2_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as6712_32x_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_PSU2); +} + +static enum led_brightness accton_as6712_32x_led_psu_2_get(struct led_classdev *cdev) +{ + accton_as6712_32x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU2, ledctl->reg_val[1]); +} + +static void accton_as6712_32x_led_fan_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as6712_32x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_FAN); +} + +static enum led_brightness accton_as6712_32x_led_fan_get(struct led_classdev *cdev) +{ + accton_as6712_32x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_FAN, ledctl->reg_val[0]); +} + + +static void accton_as6712_32x_led_fanx_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + enum led_type led_type1; + int reg_id; + int i, nsize; + int ncount = sizeof(fanx_info)/sizeof(struct fanx_info_s); + + for(i=0;iname); + + if (led_cdev->name[nsize-1] == fanx_info[i].cname) + { + led_type1 = fanx_info[i].type; + reg_id = fanx_info[i].reg_id; + accton_as6712_32x_led_set(led_cdev, led_light_mode, led_reg[reg_id], led_type1); + return; + } + } +} + + +static enum led_brightness accton_as6712_32x_led_fanx_get(struct led_classdev *cdev) +{ + enum led_type led_type1; + int reg_id; + int i, nsize; + int ncount = sizeof(fanx_info)/sizeof(struct fanx_info_s); + + for(i=0;iname); + + if (cdev->name[nsize-1] == fanx_info[i].cname) + { + led_type1 = fanx_info[i].type; + reg_id = fanx_info[i].reg_id; + accton_as6712_32x_led_update(); + return led_reg_val_to_light_mode(led_type1, ledctl->reg_val[reg_id]); + } + } + + + return led_reg_val_to_light_mode(LED_TYPE_FAN1, ledctl->reg_val[2]); +} + + +static void accton_as6712_32x_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as6712_32x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_DIAG); +} + +static enum led_brightness accton_as6712_32x_led_diag_get(struct led_classdev *cdev) +{ + accton_as6712_32x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void accton_as6712_32x_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as6712_32x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_LOC); +} + +static enum led_brightness accton_as6712_32x_led_loc_get(struct led_classdev *cdev) +{ + accton_as6712_32x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static struct led_classdev accton_as6712_32x_leds[] = { + [LED_TYPE_PSU1] = { + .name = "accton_as6712_32x_led::psu1", + .default_trigger = "unused", + .brightness_set = accton_as6712_32x_led_psu_1_set, + .brightness_get = accton_as6712_32x_led_psu_1_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "accton_as6712_32x_led::psu2", + .default_trigger = "unused", + .brightness_set = accton_as6712_32x_led_psu_2_set, + .brightness_get = accton_as6712_32x_led_psu_2_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN] = { + .name = "accton_as6712_32x_led::fan", + .default_trigger = "unused", + .brightness_set = accton_as6712_32x_led_fan_set, + .brightness_get = accton_as6712_32x_led_fan_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN1] = { + .name = "accton_as6712_32x_led::fan1", + .default_trigger = "unused", + .brightness_set = accton_as6712_32x_led_fanx_set, + .brightness_get = accton_as6712_32x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN2] = { + .name = "accton_as6712_32x_led::fan2", + .default_trigger = "unused", + .brightness_set = accton_as6712_32x_led_fanx_set, + .brightness_get = accton_as6712_32x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN3] = { + .name = "accton_as6712_32x_led::fan3", + .default_trigger = "unused", + .brightness_set = accton_as6712_32x_led_fanx_set, + .brightness_get = accton_as6712_32x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN4] = { + .name = "accton_as6712_32x_led::fan4", + .default_trigger = "unused", + .brightness_set = accton_as6712_32x_led_fanx_set, + .brightness_get = accton_as6712_32x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN5] = { + .name = "accton_as6712_32x_led::fan5", + .default_trigger = "unused", + .brightness_set = accton_as6712_32x_led_fanx_set, + .brightness_get = accton_as6712_32x_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_DIAG] = { + .name = "accton_as6712_32x_led::diag", + .default_trigger = "unused", + .brightness_set = accton_as6712_32x_led_diag_set, + .brightness_get = accton_as6712_32x_led_diag_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_LOC] = { + .name = "accton_as6712_32x_led::loc", + .default_trigger = "unused", + .brightness_set = accton_as6712_32x_led_loc_set, + .brightness_get = accton_as6712_32x_led_loc_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, +}; + +static int accton_as6712_32x_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as6712_32x_leds); i++) { + led_classdev_suspend(&accton_as6712_32x_leds[i]); + } + + return 0; +} + +static int accton_as6712_32x_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as6712_32x_leds); i++) { + led_classdev_resume(&accton_as6712_32x_leds[i]); + } + + return 0; +} + +static int accton_as6712_32x_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(accton_as6712_32x_leds); i++) { + ret = led_classdev_register(&pdev->dev, &accton_as6712_32x_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(accton_as6712_32x_leds)){ + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&accton_as6712_32x_leds[i]); + } + } + + return ret; +} + +static int accton_as6712_32x_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(accton_as6712_32x_leds); i++) { + led_classdev_unregister(&accton_as6712_32x_leds[i]); + } + + return 0; +} + +static struct platform_driver accton_as6712_32x_led_driver = { + .probe = accton_as6712_32x_led_probe, + .remove = accton_as6712_32x_led_remove, + .suspend = accton_as6712_32x_led_suspend, + .resume = accton_as6712_32x_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as6712_32x_led_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as6712_32x_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct accton_as6712_32x_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as6712_32x_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&accton_as6712_32x_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as6712_32x_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&accton_as6712_32x_led_driver); + kfree(ledctl); +} + +module_init(accton_as6712_32x_led_init); +module_exit(accton_as6712_32x_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as6712_32x_led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/service/as6712-platform-init.service b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/service/as6712-platform-init.service new file mode 100644 index 00000000000..ffdd6e1cee7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/service/as6712-platform-init.service @@ -0,0 +1,17 @@ +[Unit] +Description=Accton AS6712-32X Platform Monitoring service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/accton_as6712_util.py install +ExecStart=/usr/local/bin/accton_as6712_monitor.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/setup.py new file mode 100644 index 00000000000..114b0837be6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as6712_32x', + version='1.0', + description='Module to initialize Accton AS6712-32X platforms', + + packages=['as6712_32x'], + package_dir={'as6712_32x': 'as6712-32x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/utils/README b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/utils/README new file mode 100644 index 00000000000..bfa90e6b68e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/utils/README @@ -0,0 +1,74 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +Contents of this package: + module - Contains source code of as6712 kernel driver modules. + util - operational scripts. + +Sonic creates a docker container and run building process under it. +If user tries to built new drivers, please get into that docker and +dpkg-buildpackage for them. + +All Linux kernel code is licensed under the GPLv1. All other code is +licensed under the GPLv3. Please see the LICENSE file for copies of +both licenses. + +The code for integacting with Accton AS6712-32X has 2 parts, +kernel drivers and operational script. +The kernel drivers of peripherals are under module/ directory. +1. These drivers can be built to individual ko during dpkg-buildpackage. +2. A operational script, accton_as6712_util.py, for device initializatian. + Run "accton_as6712_util.py install" to install drivers. + +To initialize the system, run "accton_as6712_util.py install". +To clean up the drivers & devices, run "accton_as6712_util.py clean". +To dump information of sensors, run "accton_as6712_util.py show". +To dump SFP EEPROM, run "accton_as6712_util.py sff". +To set fan speed, run "accton_as6712_util.py set fan". +To enable/disable SFP emission, run "accton_as6712_util.py set sfp". +To set system LEDs' color, run "accton_as6712_util.py set led" +For more information, run "accton_as6712_util.py --help". + +==================================================================== +Besides applying accton_as6712_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +System LED: + There are 5 system LEDs at the lower-left corner of front panel. + They are loc, diag, fan, ps1, and ps2. + The sysfs interface color mappings are as follows: + Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + But not all colors are available for each LED. + +Fan Control: + There are 10 fans inside 5 fan modules. + All fans share 1 duty setting, ranged from 0~100. + +Thermal sensers: + 3 temperature sensors are controlled by the lm75 kernel modules. + +PSUs: + There 2 power supplies slot at the left/right side of the back. + Once if a PSU is not plugged, the status of it is shown failed. + +There are 32 QSFP modules are equipped. +Before operating on PSU and QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/utils/accton_as6712_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/utils/accton_as6712_monitor.py new file mode 100755 index 00000000000..fbcc74565d6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/utils/accton_as6712_monitor.py @@ -0,0 +1,208 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# 4/10/2018: Roy Lee modify for as6712_32x +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + from as6712_32x.fanutil import FanUtil + from as6712_32x.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = 'accton_as6712_monitor' + +global log_file +global log_level + +# (LM75_1+ LM75_2+ LM75_3) is LM75 at i2c addresses 0x48, 0x49, and 0x4A. +# TMP = (LM75_1+ LM75_2+ LM75_3)/3 +#1. If TMP < 35, All fans run with duty 30%. +#2. If TMP>=35 or the temperature of any one of fan is higher than 40, +# All fans run with duty 50% +#3. If TMP >= 40 or the temperature of any one of fan is higher than 45, +# All fans run with duty 65%. +#4. If TMP >= 45 or the temperature of any one of fan is higher than 50, +# All fans run with duty 100%. +#5. Any one of 5 fans is fault, set duty = 100%. +#6. Direction factor. If it is B2F direction, duty + 10%. + + # MISC: + # 1.Check single LM75 before applied average. + # 2.If no matched fan speed is found from the policy, + # use FAN_DUTY_CYCLE_MIN as default speed + # Get current temperature + # 4.Decision 3: Decide new fan speed depend on fan direction/current fan speed/temperature + + + + +# Make a class we can use to capture stdout and sterr in the log +class accton_as6712_monitor(object): + # static temp var + _ori_temp = 0 + _new_perc = 0 + _ori_perc = 0 + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_fans(self): + max_duty = 100 + fan_policy_f2b = { + 0: [30, 0, 105000], + 1: [50, 105000, 120000], + 2: [65, 120000, 135000], + 3: [max_duty, 135000, sys.maxsize], + } + fan_policy_b2f = { + 0: [40, 0, 105000], + 1: [60, 105000, 120000], + 2: [75, 120000, 135000], + 3: [max_duty, 135000, sys.maxsize], + } + fan_policy_single = { + 0: 40000, + 1: 45000, + 2: 50000, + } + + thermal = ThermalUtil() + fan = FanUtil() + for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): + fan_status = fan.get_fan_status(x) + if fan_status is None: + logging.debug('INFO. SET new_perc to %d (FAN stauts is None. fan_num:%d)', max_duty, x) + return False + if fan_status is False: + logging.debug('INFO. SET new_perc to %d (FAN fault. fan_num:%d)', max_duty, x) + fan.set_fan_duty_cycle(max_duty) + return True + #logging.debug('INFO. fan_status is True (fan_num:%d)', x) + + fan_dir=fan.get_fan_dir(1) + if fan_dir == 0: + fan_policy = fan_policy_f2b + else: + fan_policy = fan_policy_b2f + + #Decide fan duty by if any of sensors > fan_policy_single. + new_duty_cycle = fan_policy[0][0] + for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): + single_thm = thermal._get_thermal_node_val(x) + for y in range(0, len(fan_policy_single)): + if single_thm > fan_policy_single[y]: + if fan_policy[y+1][0] > new_duty_cycle: + new_duty_cycle = fan_policy[y+1][0] + logging.debug('INFO. Single thermal sensor %d with temp %d > %d , new_duty_cycle=%d', + x, single_thm, fan_policy_single[y], new_duty_cycle) + single_result = new_duty_cycle + + + #Find if current duty matched any of define duty. + #If not, set it to highest one. + cur_duty_cycle = fan.get_fan_duty_cycle() + for x in range(0, len(fan_policy)): + if cur_duty_cycle == fan_policy[x][0]: + break + if x == len(fan_policy) : + fan.set_fan_duty_cycle(fan_policy[0][0]) + cur_duty_cycle = max_duty + + #Decide fan duty by if sum of sensors falls into any of fan_policy{} + get_temp = thermal.get_thermal_temp() + new_duty_cycle = cur_duty_cycle + for x in range(0, len(fan_policy)): + y = len(fan_policy) - x -1 #checked from highest + if get_temp > fan_policy[y][1] and get_temp <= fan_policy[y][2] : + new_duty_cycle= fan_policy[y][0] + logging.debug('INFO. Sum of temp %d > %d , new_duty_cycle=%d', get_temp, fan_policy[y][1], new_duty_cycle) + + sum_result = new_duty_cycle + if (sum_result>single_result): + new_duty_cycle = sum_result; + else: + new_duty_cycle = single_result + + logging.debug('INFO. Final duty_cycle=%d', new_duty_cycle) + if(new_duty_cycle != cur_duty_cycle): + fan.set_fan_duty_cycle(new_duty_cycle) + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + monitor = accton_as6712_monitor(log_file, log_level) + + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(10) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/utils/accton_as6712_util.py b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/utils/accton_as6712_util.py new file mode 100755 index 00000000000..48e957e3125 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/utils/accton_as6712_util.py @@ -0,0 +1,635 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# Description: +# Due to adoption of optoe drivers, sideband signals of SFPs are moved +# into cpld drivers. Add a new dict, cpld_of_module, for mapping this +# attributes to corresponding cpld nodes. +# + + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +PROJECT_NAME = 'as6712_32x' +version = '0.2.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan1':1, 'fan2':1,'fan3':1,'fan4':1,'fan5':1,'thermal':4, 'psu':2, 'sfp':32} + + +led_prefix ='/sys/devices/platform/as6712_32x_led/leds/accton_'+PROJECT_NAME+'_led::' +fan_prefix ='/sys/devices/platform/as6712_32x_' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2'], + 'fan1': ['fan'], + 'fan2': ['fan'], + 'fan3': ['fan'], + 'fan4': ['fan'], + 'fan5': ['fan'], + } +hwmon_nodes = {'led': ['brightness'] , + 'fan1': ['fan1_duty_cycle_percentage', 'fan1_fault', 'fan1_speed_rpm', 'fan1_direction', 'fanr1_fault', 'fanr1_speed_rpm'], + 'fan2': ['fan2_duty_cycle_percentage','fan2_fault', 'fan2_speed_rpm', 'fan2_direction', 'fanr2_fault', 'fanr2_speed_rpm'], + 'fan3': ['fan3_duty_cycle_percentage','fan3_fault', 'fan3_speed_rpm', 'fan3_direction', 'fanr3_fault', 'fanr3_speed_rpm'], + 'fan4': ['fan4_duty_cycle_percentage','fan4_fault', 'fan4_speed_rpm', 'fan4_direction', 'fanr4_fault', 'fanr4_speed_rpm'], + 'fan5': ['fan5_duty_cycle_percentage','fan5_fault', 'fan5_speed_rpm', 'fan5_direction', 'fanr5_fault', 'fanr5_speed_rpm'], + } +hwmon_prefix ={'led': led_prefix, + 'fan1': fan_prefix, + 'fan2': fan_prefix, + 'fan3': fan_prefix, + 'fan4': fan_prefix, + 'fan5': fan_prefix, + } + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'thermal': ['38-0048','39-0049', '40-004a', '41-004b'] , + 'psu': ['35-0038','36-003b'], + 'sfp': ['-0050']} +i2c_nodes = { + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['module_present_', 'sfp_tx_disable']} + +sfp_map = [ 2, 3, 4, 5, 6, 7, 8, 9, + 10, 11, 12, 13, 14, 15, 16, 17, + 18, 19, 20, 21, 22, 23, 24, 25, + 26, 27, 28, 29, 30, 31, 32, 33 + ] + +#For sideband signals of SFP/QSFP modules. +bus_of_cpld = [0, 1] +cpld_of_module = {'-0062': list(range(0,16)), + '-0064': list(range(16,32)) } + + +mknod =[ +'echo as6712_32x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo as6712_32x_cpld2 0x62 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo as6712_32x_cpld3 0x64 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-1/new_device', + +# PSU-1 +'echo as6712_32x_psu1 0x38 > /sys/bus/i2c/devices/i2c-35/new_device', +'echo cpr_4011_4mxx 0x3c > /sys/bus/i2c/devices/i2c-35/new_device', +#'echo as6712_32x_psu1 0x50 > /sys/bus/i2c/devices/i2c-35/new_device', +#'echo ym2401 0x58 > /sys/bus/i2c/devices/i2c-35/new_device', + +# PSU-2 +'echo as6712_32x_psu2 0x3b > /sys/bus/i2c/devices/i2c-36/new_device', +'echo cpr_4011_4mxx 0x3f > /sys/bus/i2c/devices/i2c-36/new_device', +#'echo as6712_32x_psu2 0x53 > /sys/bus/i2c/devices/i2c-36/new_device', +#'echo ym2401 0x5b > /sys/bus/i2c/devices/i2c-36/new_device', + +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-38/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-39/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-40/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-41/new_device', +] + +mknod2 =[ +'echo as6712_32x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo as6712_32x_cpld2 0x62 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo as6712_32x_cpld3 0x64 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-0/new_device', + +# PSU-1 +'echo as6712_32x_psu1 0x38 > /sys/bus/i2c/devices/i2c-35/new_device', +'echo cpr_4011_4mxx 0x3c > /sys/bus/i2c/devices/i2c-35/new_device', +#'echo as6712_32x_psu1 0x50 > /sys/bus/i2c/devices/i2c-35/new_device', +#'echo ym2401 0x58 > /sys/bus/i2c/devices/i2c-35/new_device', + +# PSU-2 +'echo as6712_32x_psu2 0x3b > /sys/bus/i2c/devices/i2c-36/new_device', +'echo cpr_4011_4mxx 0x3f > /sys/bus/i2c/devices/i2c-36/new_device', +#'echo as6712_32x_psu2 0x53 > /sys/bus/i2c/devices/i2c-36/new_device', +#'echo ym2401 0x5b > /sys/bus/i2c/devices/i2c-36/new_device', + +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-38/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-39/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-40/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-41/new_device', +] + +FORCE = 0 + + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-32 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-54 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ACCTON DBG]: "+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status = 1 + output = "" + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log ("cmd:" + cmd) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_inserted(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + + + +kos = [ +'depmod -ae', +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe optoe', +'modprobe accton_as6712_32x_cpld', +'modprobe cpr_4011_4mxx', +#'modprobe ym2651y', +'modprobe accton_as6712_32x_fan', +'modprobe leds-accton_as6712_32x', +'modprobe accton_as6712_32x_psu'] + +def driver_install(): + global FORCE + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + #remove parameter if any + rm = kos[-(i+1)] + lst = rm.split(" ") + if len(lst) > 2: + del(lst[2:]) + rm = " ".join(lst) + + #Change to removing commands + rm = rm.replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +def cpld_bus_check(): + tmp = "i2cget -y -f 0 0x60" + status, output = log_os_system(tmp, 0) + if status: + return 1 + else: + return 0 + +def i2c_order_check(): + # i2c bus 0 and 1 might be installed in different order. + # Here check if 0x70 is exist @ i2c-0 + tmp = "echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device" + status, output = log_os_system(tmp, 0) + if not device_exist(): + order = 1 + else: + order = 0 + tmp = "echo 0x70 > /sys/bus/i2c/devices/i2c-1/delete_device" + status, output = log_os_system(tmp, 0) + return order + +def device_install(): + global FORCE + + order = i2c_order_check() + # if 0x76 is not exist @i2c-0, use reversed bus order + if order: + for i in range(0,len(mknod2)): + #for pca932x need times to built new i2c buses + if mknod2[i].find('pca954') != -1: + time.sleep(2) + + status, output = log_os_system(mknod2[i], 1) + if status: + print output + if FORCE == 0: + return status + else: + for i in range(0,len(mknod)): + #for pca932x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(2) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(0,len(sfp_map)): + status, output =log_os_system("echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + status, output =log_os_system("echo port"+str(i)+" > /sys/bus/i2c/devices/"+str(sfp_map[i])+"-0050/port_name", 1) + if status: + print output + if FORCE == 0: + return status + + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/0-0070", 0) + if status==0: + I2C_ORDER=1 + else: + I2C_ORDER=0 + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + if I2C_ORDER==0: + nodelist = mknod + else: + nodelist = mknod2 + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_inserted() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_inserted() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_inserted()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + order = cpld_bus_check() + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + for lk in cpld_of_module: + if k in cpld_of_module[lk]: + bus = bus_of_cpld[order] + node = key+str(k+1) + path = i2c_prefix + str(bus) + lk + "/"+ nodes[j] + str(k+1) + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan1'] ['fan11'][0] + node = node.replace(node.split("/")[-1], 'fan1_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0070", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/classes/fanutil.py new file mode 100755 index 00000000000..207436c1fc9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/classes/fanutil.py @@ -0,0 +1,255 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# 2/27/2018: Roy Lee modify for as7312_54x +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_NUM_ON_MAIN_BROAD = 6 + FAN_NUM_1_IDX = 1 + FAN_NUM_2_IDX = 2 + FAN_NUM_3_IDX = 3 + FAN_NUM_4_IDX = 4 + FAN_NUM_5_IDX = 5 + FAN_NUM_6_IDX = 6 + + FAN_NODE_NUM_OF_MAP = 2 + FAN_NODE_FAULT_IDX_OF_MAP = 1 + #FAN_NODE_SPEED_IDX_OF_MAP = 2 + FAN_NODE_DIR_IDX_OF_MAP = 2 + #FAN_NODE_DUTY_IDX_OF_MAP = 4 + #FANR_NODE_FAULT_IDX_OF_MAP = 5 + + #BASE_VAL_PATH = '/sys/devices/platform/as5712_54x_fan/{0}' + BASE_VAL_PATH = '/sys/bus/i2c/devices/2-0066/{0}' + FAN_DUTY_PATH = '/sys/bus/i2c/devices/2-0066/fan_duty_cycle_percentage' + + #logfile = '' + #loglevel = logging.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + _fan_to_device_path_mapping = {} + +#fan1_direction +#fan1_fault +#fan1_present + + #(FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage', + _fan_to_device_node_mapping = { + (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault', + (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction', + + (FAN_NUM_2_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan2_fault', + (FAN_NUM_2_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan2_direction', + + (FAN_NUM_3_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan3_fault', + (FAN_NUM_3_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan3_direction', + + (FAN_NUM_4_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan4_fault', + (FAN_NUM_4_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan4_direction', + + (FAN_NUM_5_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan5_fault', + (FAN_NUM_5_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan5_direction', + + (FAN_NUM_6_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan6_fault', + (FAN_NUM_6_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan6_direction', + } + + def _get_fan_to_device_node(self, fan_num, node_num): + return self._fan_to_device_node_mapping[(fan_num, node_num)] + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + + try: + val_file = open(device_path, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + def __init__(self): + fan_path = self.BASE_VAL_PATH + + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_NUM_ON_MAIN_BROAD+1): + for node_num in range(self.FAN_NODE_FAULT_IDX_OF_MAP, self.FAN_NODE_NUM_OF_MAP+1): + self._fan_to_device_path_mapping[(fan_num, node_num)] = fan_path.format( + self._fan_to_device_node_mapping[(fan_num, node_num)]) + + def get_num_fans(self): + return self.FAN_NUM_ON_MAIN_BROAD + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM_OF_MAP + + def get_idx_node_start(self): + return self.FAN_NODE_FAULT_IDX_OF_MAP + + def get_size_node_map(self): + return len(self._fan_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._fan_to_device_path_mapping) + + def get_fan_to_device_path(self, fan_num, node_num): + return self._fan_to_device_path_mapping[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_FAULT_IDX_OF_MAP) + + #def get_fan_speed(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FAN_NODE_SPEED_IDX_OF_MAP) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DIR_IDX_OF_MAP) + + def get_fan_duty_cycle(self): + #duty_path = self.FAN_DUTY_PATH + try: + val_file = open(self.FAN_DUTY_PATH) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + return int(content) + #self._get_fan_node_val(fan_num, self.FAN_NODE_DUTY_IDX_OF_MAP) +#static u32 reg_val_to_duty_cycle(u8 reg_val) +#{ +# reg_val &= FAN_DUTY_CYCLE_REG_MASK; +# return ((u32)(reg_val+1) * 625 + 75)/ 100; +#} +# + def set_fan_duty_cycle(self, val): + + try: + fan_file = open(self.FAN_DUTY_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + #val = ((val + 1 ) * 625 +75 ) / 100 + fan_file.write(str(val)) + fan_file.close() + return True + + #def get_fanr_fault(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FANR_NODE_FAULT_IDX_OF_MAP) + + def get_fanr_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP) + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num, %d', fan_num) + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + logging.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + #if self.get_fanr_fault(fan_num) is not None and self.get_fanr_fault(fan_num) > 0: + # logging.debug('GET. FANR fault. fan_num, %d', fan_num) + # return False + + return True + +#def main(): +# fan = FanUtil() +# +# print 'get_size_node_map : %d' % fan.get_size_node_map() +# print 'get_size_path_map : %d' % fan.get_size_path_map() +# for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): +# for y in range(fan.get_idx_node_start(), fan.get_num_nodes()+1): +# print fan.get_fan_to_device_path(x, y) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/classes/thermalutil.py new file mode 100755 index 00000000000..68f0ef900df --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/classes/thermalutil.py @@ -0,0 +1,124 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018:Jostar modify for as7716_32x +# 2/27/2018: Roy Lee modify for as7312_54x +# ------------------------------------------------------------------ + +try: + import time + import logging + import glob + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + + THERMAL_NUM_ON_MAIN_BROAD = 3 + THERMAL_NUM_1_IDX = 1 # 1_ON_MAIN_BROAD + THERMAL_NUM_2_IDX = 2 # 2_ON_MAIN_BROAD + THERMAL_NUM_3_IDX = 3 # 3_ON_MAIN_BROAD + + BASE_VAL_PATH = '/sys/bus/i2c/devices/{0}-00{1}/hwmon/hwmon*/temp1_input' + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + _thermal_to_device_path_mapping = {} + + _thermal_to_device_node_mapping = { + THERMAL_NUM_1_IDX: ['3', '48'], + THERMAL_NUM_2_IDX: ['3', '49'], + THERMAL_NUM_3_IDX: ['3', '4a'], + } + + def __init__(self): + thermal_path = self.BASE_VAL_PATH + + for x in range(self.THERMAL_NUM_1_IDX, self.THERMAL_NUM_ON_MAIN_BROAD+1): + self._thermal_to_device_path_mapping[x] = thermal_path.format( + self._thermal_to_device_node_mapping[x][0], + self._thermal_to_device_node_mapping[x][1]) + + def _get_thermal_node_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_to_device_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + + def get_num_thermals(self): + return self.THERMAL_NUM_ON_MAIN_BROAD + + def get_idx_thermal_start(self): + return self.THERMAL_NUM_1_IDX + + def get_size_node_map(self): + return len(self._thermal_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._thermal_to_device_path_mapping) + + def get_thermal_to_device_path(self, thermal_num): + return self._thermal_to_device_path_mapping[thermal_num] + + def get_thermal_1_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + + def get_thermal_2_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) + def get_thermal_temp(self): + return (self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) +self._get_thermal_node_val(self.THERMAL_NUM_3_IDX)) + +#def main(): +# thermal = ThermalUtil() +# +# print 'get_size_node_map : %d' % thermal.get_size_node_map() +# print 'get_size_path_map : %d' % thermal.get_size_path_map() +# for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): +# print thermal.get_thermal_to_device_path(x) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/Makefile new file mode 100755 index 00000000000..488fdb321ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/Makefile @@ -0,0 +1,17 @@ +ifneq ($(KERNELRELEASE),) +obj-m:= accton_i2c_cpld.o \ + accton_as7312_54x_fan.o accton_as7312_54x_leds.o \ + accton_as7312_54x_psu.o ym2651y.o + +else +ifeq (,$(KERNEL_SRC)) +$(error KERNEL_SRC is not defined) +else +KERNELDIR:=$(KERNEL_SRC) +endif +PWD:=$(shell pwd) +default: + $(MAKE) -C $(KERNELDIR) M=$(PWD) modules +clean: + rm -rf *.o *.mod.o *.mod.o *.ko .*cmd .tmp_versions Module.markers Module.symvers modules.order +endif diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_fan.c new file mode 100755 index 00000000000..8764ec8a317 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_fan.c @@ -0,0 +1,815 @@ +/* + * A hwmon driver for the Accton as7312 54x fan + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as7312_54x_fan" + +#define NUM_THERMAL_SENSORS (3) /* Get sum of this number of sensors.*/ +#define THERMAL_SENSORS_DRIVER "lm75" +#define THERMAL_SENSORS_ADDRS {0x48, 0x49, 0x4a} + +#define IN +#define OUT + +static struct as7312_54x_fan_data *as7312_54x_fan_update_device(struct device *dev); +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_enable(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, char *buf); +extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +/* fan related data, the index should match sysfs_fan_attributes + */ +static const u8 fan_reg[] = { + 0x0F, /* fan 1-6 present status */ + 0x10, /* fan 1-6 direction(0:F2B 1:B2F) */ + 0x11, /* fan PWM(for all fan) */ + 0x12, /* front fan 1 speed(rpm) */ + 0x13, /* front fan 2 speed(rpm) */ + 0x14, /* front fan 3 speed(rpm) */ + 0x15, /* front fan 4 speed(rpm) */ + 0x16, /* front fan 5 speed(rpm) */ + 0x17, /* front fan 6 speed(rpm) */ + 0x22, /* rear fan 1 speed(rpm) */ + 0x23, /* rear fan 2 speed(rpm) */ + 0x24, /* rear fan 3 speed(rpm) */ + 0x25, /* rear fan 4 speed(rpm) */ + 0x26, /* rear fan 5 speed(rpm) */ + 0x27, /* rear fan 6 speed(rpm) */ +}; + +/* Each client has this additional data */ +struct as7312_54x_fan_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ + u8 enable; + int system_temp; /*In unit of mini-Celsius*/ + int sensors_found; +}; + +enum fan_id { + FAN1_ID, + FAN2_ID, + FAN3_ID, + FAN4_ID, + FAN5_ID, + FAN6_ID +}; + +enum sysfs_fan_attributes { + FAN_PRESENT_REG, + FAN_DIRECTION_REG, + FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ + FAN1_FRONT_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN5_FRONT_SPEED_RPM, + FAN6_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN5_REAR_SPEED_RPM, + FAN6_REAR_SPEED_RPM, + FAN1_DIRECTION, + FAN2_DIRECTION, + FAN3_DIRECTION, + FAN4_DIRECTION, + FAN5_DIRECTION, + FAN6_DIRECTION, + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN5_PRESENT, + FAN6_PRESENT, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + FAN5_FAULT, + FAN6_FAULT +}; + +/* Define attributes + */ +#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT);\ + static SENSOR_DEVICE_ATTR(fan##index2##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT) +#define DECLARE_FAN_FAULT_ATTR(index, index2) &sensor_dev_attr_fan##index##_fault.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_fault.dev_attr.attr + +#define DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_direction, S_IRUGO, fan_show_value, NULL, FAN##index##_DIRECTION) +#define DECLARE_FAN_DIRECTION_ATTR(index) &sensor_dev_attr_fan##index##_direction.dev_attr.attr + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE);\ + static SENSOR_DEVICE_ATTR(pwm##index, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE);\ + static SENSOR_DEVICE_ATTR(pwm##index##_enable, S_IWUSR | S_IRUGO, get_enable, set_enable, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan_duty_cycle_percentage.dev_attr.attr, \ + &sensor_dev_attr_pwm##index.dev_attr.attr, \ + &sensor_dev_attr_pwm##index##_enable.dev_attr.attr + +#define DECLARE_FAN_SYSTEM_TEMP_SENSOR_DEV_ATTR() \ + static SENSOR_DEVICE_ATTR(sys_temp, S_IRUGO, get_sys_temp, NULL, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_SYSTEM_TEMP_ATTR() &sensor_dev_attr_sys_temp.dev_attr.attr + + +#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_present, S_IRUGO, fan_show_value, NULL, FAN##index##_PRESENT) +#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr + +#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index2##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM) +#define DECLARE_FAN_SPEED_RPM_ATTR(index, index2) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_input.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_input.dev_attr.attr + +/* 6 fan fault attributes in this platform */ +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(6,16); +/* 6 fan speed(rpm) attributes in this platform */ +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(6,16); +/* 6 fan present attributes in this platform */ +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(5); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(6); +/* 6 fan direction attribute in this platform */ +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(1); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(2); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(3); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(4); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(5); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(6); +/* 1 fan duty cycle attribute in this platform */ +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(1); +/* System temperature for fancontrol */ +DECLARE_FAN_SYSTEM_TEMP_SENSOR_DEV_ATTR(); + +static struct attribute *as7312_54x_fan_attributes[] = { + /* fan related attributes */ + DECLARE_FAN_FAULT_ATTR(1,11), + DECLARE_FAN_FAULT_ATTR(2,12), + DECLARE_FAN_FAULT_ATTR(3,13), + DECLARE_FAN_FAULT_ATTR(4,14), + DECLARE_FAN_FAULT_ATTR(5,15), + DECLARE_FAN_FAULT_ATTR(6,16), + DECLARE_FAN_SPEED_RPM_ATTR(1,11), + DECLARE_FAN_SPEED_RPM_ATTR(2,12), + DECLARE_FAN_SPEED_RPM_ATTR(3,13), + DECLARE_FAN_SPEED_RPM_ATTR(4,14), + DECLARE_FAN_SPEED_RPM_ATTR(5,15), + DECLARE_FAN_SPEED_RPM_ATTR(6,16), + DECLARE_FAN_PRESENT_ATTR(1), + DECLARE_FAN_PRESENT_ATTR(2), + DECLARE_FAN_PRESENT_ATTR(3), + DECLARE_FAN_PRESENT_ATTR(4), + DECLARE_FAN_PRESENT_ATTR(5), + DECLARE_FAN_PRESENT_ATTR(6), + DECLARE_FAN_DIRECTION_ATTR(1), + DECLARE_FAN_DIRECTION_ATTR(2), + DECLARE_FAN_DIRECTION_ATTR(3), + DECLARE_FAN_DIRECTION_ATTR(4), + DECLARE_FAN_DIRECTION_ATTR(5), + DECLARE_FAN_DIRECTION_ATTR(6), + DECLARE_FAN_DUTY_CYCLE_ATTR(1), + DECLARE_FAN_SYSTEM_TEMP_ATTR(), + NULL +}; + +#define FAN_DUTY_CYCLE_REG_MASK 0xF +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 100 + +static int as7312_54x_fan_read_value(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int as7312_54x_fan_write_value(struct i2c_client *client, u8 reg, u8 value) +{ + return i2c_smbus_write_byte_data(client, reg, value); +} + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + reg_val &= FAN_DUTY_CYCLE_REG_MASK; + return ((u32)(reg_val+1) * 625 + 75)/ 100; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + return ((u32)duty_cycle * 100 / 625) - 1; +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static u8 reg_val_to_direction(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 1 : 0; +} +static u8 reg_val_to_is_present(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 0 : 1; +} + +static u8 is_fan_fault(struct as7312_54x_fan_data *data, enum fan_id id) +{ + u8 ret = 1; + int front_fan_index = FAN1_FRONT_SPEED_RPM + id; + int rear_fan_index = FAN1_REAR_SPEED_RPM + id; + + /* Check if the speed of front or rear fan is ZERO, + */ + if (reg_val_to_speed_rpm(data->reg_val[front_fan_index]) && + reg_val_to_speed_rpm(data->reg_val[rear_fan_index])) { + ret = 0; + } + + return ret; +} + +static ssize_t set_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct as7312_54x_fan_data *data = as7312_54x_fan_update_device(dev); + int error, value; + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0 || value > 1) + return -EINVAL; + + data->enable = value; + if (value == 0) + { + return set_duty_cycle(dev, da, buf, FAN_MAX_DUTY_CYCLE); + } + return count; +} + + +static ssize_t get_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as7312_54x_fan_data *data = as7312_54x_fan_update_device(dev); + + return sprintf(buf, "%u\n", data->enable); +} +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + struct i2c_client *client = to_i2c_client(dev); + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0) + return -EINVAL; + + value = (value > FAN_MAX_DUTY_CYCLE)? FAN_MAX_DUTY_CYCLE : value; + + as7312_54x_fan_write_value(client, 0x33, 0); /* Disable fan speed watch dog */ + as7312_54x_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); + return count; +} + +/* Due to this struct is declared at lm75.c, it cannot be include + * under Sonic environment. I duplicate it from lm75.c. + */ +struct lm75_data { + struct i2c_client *client; + struct device *hwmon_dev; + struct thermal_zone_device *tz; + struct mutex update_lock; + u8 orig_conf; + u8 resolution; /* In bits, between 9 and 12 */ + u8 resolution_limits; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + unsigned long sample_time; /* In jiffies */ + s16 temp[3]; /* Register values, + 0 = input + 1 = max + 2 = hyst */ +}; + +/*Copied from lm75.c*/ +static inline long lm75_reg_to_mc(s16 temp, u8 resolution) +{ + return ((temp >> (16 - resolution)) * 1000) >> (resolution - 8); +} + +/*Get hwmon_dev from i2c_client, set hwmon_dev = NULL is failed.*/ +static struct device * get_hwmon_dev( + struct i2c_client *client) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + if(data) + { + if( data->valid == 1 && data->hwmon_dev) + { + return data->hwmon_dev; + } + + } + return NULL; +} + +/* To find hwmon index by opening hwmon under that i2c address. + */ +static int find_hwmon_index_by_FileOpen( + int bus_nr, + unsigned short addr, + OUT int *index) +{ +#define MAX_HWMON_DEVICE (10) /* Find hwmon device in 0~10*/ + struct file *sfd; + char client_name[96]; + int i=0; + + do { + snprintf(client_name, sizeof(client_name), + "/sys/bus/i2c/devices/%d-%04x/hwmon/hwmon%d/temp1_input", + bus_nr, addr, i); + + sfd = filp_open(client_name, O_RDONLY, 0); + i++; + } while( IS_ERR(sfd) && i < MAX_HWMON_DEVICE); + + if (IS_ERR(sfd)) { + pr_err("Failed to open file(%s)#%d\r\n", client_name, __LINE__); + return -ENOENT; + } + filp_close(sfd, 0); + *index = i - 1; + return 0; + +#undef MAX_HWMON_DEVICE +} + +static int get_temp_file_path( + int bus_nr, unsigned short addr, + struct device *hwmon_dev + ,char *path, int max_len) +{ + + if(hwmon_dev && strlen(dev_name(hwmon_dev))) + { + snprintf(path, max_len, + "/sys/bus/i2c/devices/%d-%04x/hwmon/%s/temp1_input", + bus_nr, addr, dev_name(hwmon_dev)); + } + else + { + int i=0; + if(find_hwmon_index_by_FileOpen( bus_nr, addr, &i)) + { + return -EIO; + } + snprintf(path, max_len, + "/sys/bus/i2c/devices/%d-%04x/hwmon/hwmon%d/temp1_input", + bus_nr, addr, i); + } + return 0; +} + +/*File read the dev file at user space.*/ +static int read_devfile_temp1_input( + struct device *dev, + int bus_nr, + unsigned short addr, + struct device *hwmon_dev, + int *miniCelsius) +{ + struct file *sfd; + char buffer[96]; + char devfile[96]; + int rc, status; + int rdlen, value; + mm_segment_t old_fs; + + rc = 0; + get_temp_file_path(bus_nr, addr, hwmon_dev, devfile, sizeof(devfile)); + sfd = filp_open(devfile, O_RDONLY, 0); + if (IS_ERR(sfd)) { + pr_err("Failed to open file(%s)#%d\r\n", devfile, __LINE__); + return -ENOENT; + } + dev_dbg(dev, "Found device:%s\n",devfile); + + if(!(sfd->f_op) || !(sfd->f_op->read) ) { + pr_err("file %s cann't readable ?\n",devfile); + return -ENOENT; + } + + old_fs = get_fs(); + set_fs(KERNEL_DS); + rdlen = sfd->f_op->read(sfd, buffer, sizeof(buffer), &sfd->f_pos); + if (rdlen == 0) { + pr_err( "File(%s) empty!\n", devfile); + rc = -EIO; + goto exit; + } + status = sscanf(buffer, "%d", &value); + if (status != 1) { + rc = -EIO; + goto exit; + } + *miniCelsius = value; + dev_dbg(dev,"found sensors: %d @i2c %d-%04x\n", value, bus_nr, addr); + +exit: + set_fs(old_fs); + filp_close(sfd, 0); + return rc; +} + +static u8 is_lm75_data_due(struct i2c_client *client) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + if (time_after(jiffies, data->last_updated + data->sample_time)) + { + return 1; + } + return 0; +} +static int get_lm75_temp(struct i2c_client *client, int *miniCelsius) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + *miniCelsius = lm75_reg_to_mc(data->temp[0], data->resolution); + + return 0; +} + +static bool lm75_addr_mached(unsigned short addr) +{ + int i; + unsigned short addrs[] = THERMAL_SENSORS_ADDRS; + + for (i = 0; i < ARRAY_SIZE(addrs); i++) + { + if( addr == addrs[i]) + return 1; + } + return 0; +} + +static int _find_lm75_device(struct device *dev, void *data) +{ + struct device_driver *driver; + struct as7312_54x_fan_data *prv = data; + char *driver_name = THERMAL_SENSORS_DRIVER; + + driver = dev->driver; + if (driver && driver->name && + strcmp(driver->name, driver_name) == 0) + { + struct i2c_client *client; + client = to_i2c_client(dev); + if (client) + { + /*cannot use "struct i2c_adapter *adap = to_i2c_adapter(dev);"*/ + struct i2c_adapter *adap = client->adapter; + int miniCelsius = 0; + + if (! lm75_addr_mached(client->addr)) + { + return 0; + } + + if (!adap) { + return -ENXIO; + } + + /* If the data is not updated, read them from devfile + to drive them updateing data from chip.*/ + if (is_lm75_data_due(client)) + { + struct device *hwmon_dev; + + hwmon_dev = get_hwmon_dev(client); + if(0 == read_devfile_temp1_input(dev, adap->nr, + client->addr, hwmon_dev, &miniCelsius)) + { + prv->system_temp += miniCelsius; + prv->sensors_found++; + } + + } + else + { + get_lm75_temp(client, &miniCelsius); + prv->system_temp += miniCelsius; + prv->sensors_found++; + + } + } + } + return 0; +} + +/*Find all lm75 devices and return sum of temperatures.*/ +static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + ssize_t ret = 0; + struct as7312_54x_fan_data *data = as7312_54x_fan_update_device(dev); + + data->system_temp=0; + data->sensors_found=0; + i2c_for_each_dev(data, _find_lm75_device); + if (NUM_THERMAL_SENSORS != data->sensors_found) + { + dev_dbg(dev,"only %d of %d temps are found\n", + data->sensors_found, NUM_THERMAL_SENSORS); + data->system_temp = INT_MAX; + } + ret = sprintf(buf, "%d\n",data->system_temp); + return ret; +} + +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7312_54x_fan_data *data = as7312_54x_fan_update_device(dev); + ssize_t ret = 0; + + if (data->valid) { + switch (attr->index) { + case FAN_DUTY_CYCLE_PERCENTAGE: + { + u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); + ret = sprintf(buf, "%u\n", duty_cycle); + break; + } + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN5_FRONT_SPEED_RPM: + case FAN6_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: + case FAN6_REAR_SPEED_RPM: + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index])); + break; + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + case FAN6_PRESENT: + ret = sprintf(buf, "%d\n", + reg_val_to_is_present(data->reg_val[FAN_PRESENT_REG], + attr->index - FAN1_PRESENT)); + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + case FAN6_FAULT: + ret = sprintf(buf, "%d\n", is_fan_fault(data, attr->index - FAN1_FAULT)); + break; + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + case FAN5_DIRECTION: + case FAN6_DIRECTION: + ret = sprintf(buf, "%d\n", + reg_val_to_direction(data->reg_val[FAN_DIRECTION_REG], + attr->index - FAN1_DIRECTION)); + break; + default: + break; + } + } + + return ret; +} + +static const struct attribute_group as7312_54x_fan_group = { + .attrs = as7312_54x_fan_attributes, +}; + +static struct as7312_54x_fan_data *as7312_54x_fan_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_fan_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + dev_dbg(&client->dev, "Starting as7312_54x_fan update\n"); + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { + int status = as7312_54x_fan_read_value(client, fan_reg[i]); + + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + dev_dbg(&client->dev, "reg %d, err %d\n", fan_reg[i], status); + return data; + } + else { + data->reg_val[i] = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int as7312_54x_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7312_54x_fan_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7312_54x_fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->enable = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7312_54x_fan_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7312_54x_fan_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7312_54x_fan_remove(struct i2c_client *client) +{ + struct as7312_54x_fan_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7312_54x_fan_group); + + return 0; +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x66, I2C_CLIENT_END }; + +static const struct i2c_device_id as7312_54x_fan_id[] = { + { "as7312_54x_fan", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7312_54x_fan_id); + +static struct i2c_driver as7312_54x_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = as7312_54x_fan_probe, + .remove = as7312_54x_fan_remove, + .id_table = as7312_54x_fan_id, + .address_list = normal_i2c, +}; + +static int __init as7312_54x_fan_init(void) +{ + return i2c_add_driver(&as7312_54x_fan_driver); +} + +static void __exit as7312_54x_fan_exit(void) +{ + i2c_del_driver(&as7312_54x_fan_driver); +} + +module_init(as7312_54x_fan_init); +module_exit(as7312_54x_fan_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7312_54x_fan driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_leds.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_leds.c new file mode 100644 index 00000000000..1d54517c624 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_leds.c @@ -0,0 +1,438 @@ +/* + * A LED driver for the accton_as7312_54x_led + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +extern int as7312_54x_cpld_read (unsigned short cpld_addr, u8 reg); +extern int as7312_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern void led_classdev_unregister(struct led_classdev *led_cdev); +extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); +extern void led_classdev_resume(struct led_classdev *led_cdev); +extern void led_classdev_suspend(struct led_classdev *led_cdev); + +#define DRVNAME "accton_as7312_54x_led" + +struct accton_as7312_54x_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[1]; /* only 1 register*/ +}; + +static struct accton_as7312_54x_led_data *ledctl = NULL; + +/* LED related data + */ + +#define LED_CNTRLER_I2C_ADDRESS (0x60) + +#define LED_TYPE_DIAG_REG_MASK (0x3) +#define LED_MODE_DIAG_GREEN_VALUE (0x02) +#define LED_MODE_DIAG_RED_VALUE (0x01) +#define LED_MODE_DIAG_AMBER_VALUE (0x00) /*It's yellow actually. Green+Red=Yellow*/ +#define LED_MODE_DIAG_OFF_VALUE (0x03) + + +#define LED_TYPE_LOC_REG_MASK (0x80) +#define LED_MODE_LOC_ON_VALUE (0) +#define LED_MODE_LOC_OFF_VALUE (0x80) + +enum led_type { + LED_TYPE_DIAG, + LED_TYPE_LOC, + LED_TYPE_FAN, + LED_TYPE_PSU1, + LED_TYPE_PSU2 +}; + +struct led_reg { + u32 types; + u8 reg_addr; +}; + +static const struct led_reg led_reg_map[] = { + {(1<update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as7312_54x_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = accton_as7312_54x_led_read_value(led_reg_map[i].reg_addr); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg_map[i].reg_addr, status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as7312_54x_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + enum led_type type) +{ + int reg_val; + u8 reg ; + mutex_lock(&ledctl->update_lock); + + if( !accton_getLedReg(type, ®)) + { + dev_dbg(&ledctl->pdev->dev, "Not match item for %d.\n", type); + } + + reg_val = accton_as7312_54x_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + accton_as7312_54x_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + + +static void accton_as7312_54x_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as7312_54x_led_set(led_cdev, led_light_mode, LED_TYPE_DIAG); +} + +static enum led_brightness accton_as7312_54x_led_diag_get(struct led_classdev *cdev) +{ + accton_as7312_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void accton_as7312_54x_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as7312_54x_led_set(led_cdev, led_light_mode, LED_TYPE_LOC); +} + +static enum led_brightness accton_as7312_54x_led_loc_get(struct led_classdev *cdev) +{ + accton_as7312_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static void accton_as7312_54x_led_auto_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ +} + +static enum led_brightness accton_as7312_54x_led_auto_get(struct led_classdev *cdev) +{ + return LED_MODE_AUTO; +} + +static struct led_classdev accton_as7312_54x_leds[] = { + [LED_TYPE_DIAG] = { + .name = "accton_as7312_54x_led::diag", + .default_trigger = "unused", + .brightness_set = accton_as7312_54x_led_diag_set, + .brightness_get = accton_as7312_54x_led_diag_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_RED, + }, + [LED_TYPE_LOC] = { + .name = "accton_as7312_54x_led::loc", + .default_trigger = "unused", + .brightness_set = accton_as7312_54x_led_loc_set, + .brightness_get = accton_as7312_54x_led_loc_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_BLUE, + }, + [LED_TYPE_FAN] = { + .name = "accton_as7312_54x_led::fan", + .default_trigger = "unused", + .brightness_set = accton_as7312_54x_led_auto_set, + .brightness_get = accton_as7312_54x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU1] = { + .name = "accton_as7312_54x_led::psu1", + .default_trigger = "unused", + .brightness_set = accton_as7312_54x_led_auto_set, + .brightness_get = accton_as7312_54x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "accton_as7312_54x_led::psu2", + .default_trigger = "unused", + .brightness_set = accton_as7312_54x_led_auto_set, + .brightness_get = accton_as7312_54x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, +}; + +static int accton_as7312_54x_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as7312_54x_leds); i++) { + led_classdev_suspend(&accton_as7312_54x_leds[i]); + } + + return 0; +} + +static int accton_as7312_54x_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as7312_54x_leds); i++) { + led_classdev_resume(&accton_as7312_54x_leds[i]); + } + + return 0; +} + +static int accton_as7312_54x_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(accton_as7312_54x_leds); i++) { + ret = led_classdev_register(&pdev->dev, &accton_as7312_54x_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(accton_as7312_54x_leds)) { + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&accton_as7312_54x_leds[i]); + } + } + + return ret; +} + +static int accton_as7312_54x_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(accton_as7312_54x_leds); i++) { + led_classdev_unregister(&accton_as7312_54x_leds[i]); + } + + return 0; +} + +static struct platform_driver accton_as7312_54x_led_driver = { + .probe = accton_as7312_54x_led_probe, + .remove = accton_as7312_54x_led_remove, + .suspend = accton_as7312_54x_led_suspend, + .resume = accton_as7312_54x_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as7312_54x_led_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as7312_54x_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct accton_as7312_54x_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as7312_54x_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&accton_as7312_54x_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as7312_54x_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&accton_as7312_54x_led_driver); + kfree(ledctl); +} + +module_init(accton_as7312_54x_led_init); +module_exit(accton_as7312_54x_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as7312_54x_led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_psu.c new file mode 100644 index 00000000000..4646224ef90 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_psu.c @@ -0,0 +1,277 @@ +/* + * An hwmon driver for accton as7312_54x Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); +static int as7312_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as7312_54x_cpld_read(unsigned short cpld_addr, u8 reg); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x50, 0x53, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as7312_54x_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[9]; /* Model name, read from eeprom */ +}; + +static struct as7312_54x_psu_data *as7312_54x_psu_update_device(struct device *dev); + +enum as7312_54x_psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_model_name,NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); + +static struct attribute *as7312_54x_psu_attributes[] = { + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + NULL +}; + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7312_54x_psu_data *data = as7312_54x_psu_update_device(dev); + u8 status = 0; + + if (attr->index == PSU_PRESENT) { + status = !(data->status >> (1-data->index) & 0x1); + } + else { /* PSU_POWER_GOOD */ + status = (data->status >> (3-data->index) & 0x1); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as7312_54x_psu_data *data = as7312_54x_psu_update_device(dev); + + return sprintf(buf, "%s\n", data->model_name); +} + +static const struct attribute_group as7312_54x_psu_group = { + .attrs = as7312_54x_psu_attributes, +}; + +static int as7312_54x_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7312_54x_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7312_54x_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7312_54x_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7312_54x_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7312_54x_psu_remove(struct i2c_client *client) +{ + struct as7312_54x_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7312_54x_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as7312_54x_psu1, + as7312_54x_psu2 +}; + +static const struct i2c_device_id as7312_54x_psu_id[] = { + { "as7312_54x_psu1", as7312_54x_psu1 }, + { "as7312_54x_psu2", as7312_54x_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7312_54x_psu_id); + +static struct i2c_driver as7312_54x_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7312_54x_psu", + }, + .probe = as7312_54x_psu_probe, + .remove = as7312_54x_psu_remove, + .id_table = as7312_54x_psu_id, + .address_list = normal_i2c, +}; + +static int as7312_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = 0; + int retry_count = 5; + + while (retry_count) { + retry_count--; + + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) { + msleep(10); + continue; + } + + if (unlikely(result != data_len)) { + result = -EIO; + msleep(10); + continue; + } + + result = 0; + break; + } + + return result; +} + +static struct as7312_54x_psu_data *as7312_54x_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status; + int power_good = 0; + + dev_dbg(&client->dev, "Starting as7312_54x update\n"); + + /* Read psu status */ + status = as7312_54x_cpld_read(0x60, 0x2); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg 0x60 err %d\n", status); + } + else { + data->status = status; + } + + /* Read model name */ + memset(data->model_name, 0, sizeof(data->model_name)); + power_good = (data->status >> (3-data->index) & 0x1); + + if (power_good) { + status = as7312_54x_psu_read_block(client, 0x20, data->model_name, + ARRAY_SIZE(data->model_name)-1); + + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x)\n", client->addr); + } + else { + data->model_name[ARRAY_SIZE(data->model_name)-1] = '\0'; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(as7312_54x_psu_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7312_54x_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_sfp.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_sfp.c new file mode 100644 index 00000000000..921d9f892ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_sfp.c @@ -0,0 +1,1972 @@ +/* + * SFP driver for accton as7312_54x sfp + * + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "as7312_54x_sfp" /* Platform dependent */ + +#define DEBUG_MODE 0 + +#if (DEBUG_MODE == 1) +#define DEBUG_PRINT(fmt, args...) \ + printk (KERN_INFO "%s:%s[%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define NUM_OF_PORT 54 +#define SFP_PORT_MAX 48 +#define EEPROM_NAME "sfp_eeprom" +#define EEPROM_SIZE 256 /* 256 byte eeprom */ +#define BIT_INDEX(i) (1ULL << (i)) +#define USE_I2C_BLOCK_READ 1 /* Platform dependent */ +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +#define SFP_EEPROM_A0_I2C_ADDR (0xA0 >> 1) + +#define SFF8024_PHYSICAL_DEVICE_ID_ADDR 0x0 +#define SFF8024_DEVICE_ID_SFP 0x3 +#define SFF8024_DEVICE_ID_QSFP 0xC +#define SFF8024_DEVICE_ID_QSFP_PLUS 0xD +#define SFF8024_DEVICE_ID_QSFP28 0x11 + +#define SFF8472_DIAG_MON_TYPE_ADDR 92 +#define SFF8472_DIAG_MON_TYPE_DDM_MASK 0x40 +#define SFF8436_RX_LOS_ADDR 3 +#define SFF8436_TX_FAULT_ADDR 4 +#define SFF8436_TX_DISABLE_ADDR 86 + +#define MULTIPAGE_SUPPORT 1 + +#if (MULTIPAGE_SUPPORT == 1) +/* fundamental unit of addressing for SFF_8472/SFF_8436 */ +#define SFF_8436_PAGE_SIZE 128 +/* + * The current 8436 (QSFP) spec provides for only 4 supported + * pages (pages 0-3). + * This driver is prepared to support more, but needs a register in the + * EEPROM to indicate how many pages are supported before it is safe + * to implement more pages in the driver. + */ +#define SFF_8436_SPECED_PAGES 4 +#define SFF_8436_EEPROM_SIZE ((1 + SFF_8436_SPECED_PAGES) * SFF_8436_PAGE_SIZE) +#define SFF_8436_EEPROM_UNPAGED_SIZE (2 * SFF_8436_PAGE_SIZE) +/* + * The current 8472 (SFP) spec provides for only 3 supported + * pages (pages 0-2). + * This driver is prepared to support more, but needs a register in the + * EEPROM to indicate how many pages are supported before it is safe + * to implement more pages in the driver. + */ +#define SFF_8472_SPECED_PAGES 3 +#define SFF_8472_EEPROM_SIZE ((3 + SFF_8472_SPECED_PAGES) * SFF_8436_PAGE_SIZE) +#define SFF_8472_EEPROM_UNPAGED_SIZE (4 * SFF_8436_PAGE_SIZE) + +/* a few constants to find our way around the EEPROM */ +#define SFF_8436_PAGE_SELECT_REG 0x7F +#define SFF_8436_PAGEABLE_REG 0x02 +#define SFF_8436_NOT_PAGEABLE (1<<2) +#define SFF_8472_PAGEABLE_REG 0x40 +#define SFF_8472_PAGEABLE (1<<4) + +/* + * This parameter is to help this driver avoid blocking other drivers out + * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C + * clock, one 256 byte read takes about 1/43 second which is excessive; + * but the 1/170 second it takes at 400 kHz may be quite reasonable; and + * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. + * + * This value is forced to be a power of two so that writes align on pages. + */ +static unsigned io_limit = SFF_8436_PAGE_SIZE; + +/* + * specs often allow 5 msec for a page write, sometimes 20 msec; + * it's important to recover from write timeouts. + */ +static unsigned write_timeout = 25; + +typedef enum qsfp_opcode { + QSFP_READ_OP = 0, + QSFP_WRITE_OP = 1 +} qsfp_opcode_e; +#endif + +/* Platform dependent +++ */ +#define I2C_ADDR_CPLD1 0x60 +#define I2C_ADDR_CPLD2 0x62 +#define I2C_ADDR_CPLD3 0x64 + +#define CPLD3_OFFSET_QSFP_MOD_RST 0x17 +/* Platform dependent --- */ +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_present(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t sfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t sfp_set_tx_disable(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +static ssize_t qsfp_set_tx_disable(struct device *dev, struct device_attribute *da, const char *buf, size_t count);; +static ssize_t sfp_eeprom_read(struct i2c_client *, u8, u8 *,int); +static ssize_t sfp_eeprom_write(struct i2c_client *, u8 , const char *,int); +static ssize_t get_mode_reset(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); +enum sfp_sysfs_attributes { + PRESENT, + PRESENT_ALL, + PORT_NUMBER, + PORT_TYPE, + DDM_IMPLEMENTED, + TX_FAULT, + TX_FAULT1, + TX_FAULT2, + TX_FAULT3, + TX_FAULT4, + TX_DISABLE, + TX_DISABLE1, + TX_DISABLE2, + TX_DISABLE3, + TX_DISABLE4, + RX_LOS, + RX_LOS1, + RX_LOS2, + RX_LOS3, + RX_LOS4, + RX_LOS_ALL, + SFP_MOD_RST +}; + +/* SFP/QSFP common attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_port_number, S_IRUGO, show_port_number, NULL, PORT_NUMBER); +static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, show_present, NULL, PRESENT); +static SENSOR_DEVICE_ATTR(sfp_is_present_all, S_IRUGO, show_present, NULL, PRESENT_ALL); +static SENSOR_DEVICE_ATTR(sfp_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, RX_LOS); +static SENSOR_DEVICE_ATTR(sfp_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, TX_DISABLE); +static SENSOR_DEVICE_ATTR(sfp_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, TX_FAULT); + +/* QSFP attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_rx_los1, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS1); +static SENSOR_DEVICE_ATTR(sfp_rx_los2, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS2); +static SENSOR_DEVICE_ATTR(sfp_rx_los3, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS3); +static SENSOR_DEVICE_ATTR(sfp_rx_los4, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS4); +static SENSOR_DEVICE_ATTR(sfp_tx_disable1, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE1); +static SENSOR_DEVICE_ATTR(sfp_tx_disable2, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE2); +static SENSOR_DEVICE_ATTR(sfp_tx_disable3, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE3); +static SENSOR_DEVICE_ATTR(sfp_tx_disable4, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE4); +static SENSOR_DEVICE_ATTR(sfp_tx_fault1, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT1); +static SENSOR_DEVICE_ATTR(sfp_tx_fault2, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT2); +static SENSOR_DEVICE_ATTR(sfp_tx_fault3, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT3); +static SENSOR_DEVICE_ATTR(sfp_tx_fault4, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT4); +static SENSOR_DEVICE_ATTR(sfp_mod_rst, S_IWUSR | S_IRUGO, get_mode_reset, set_mode_reset, SFP_MOD_RST); + +static struct attribute *qsfp_attributes[] = { + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los1.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los2.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los3.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los4.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable1.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable2.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable3.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable4.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault1.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault2.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault3.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault4.dev_attr.attr, + &sensor_dev_attr_sfp_mod_rst.dev_attr.attr, + NULL +}; + +/* SFP msa attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_rx_los_all, S_IRUGO, sfp_show_tx_rx_status, NULL, RX_LOS_ALL); +static struct attribute *sfp_msa_attributes[] = { + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los_all.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable.dev_attr.attr, + NULL +}; + +/* Platform dependent +++ */ +#define CPLD_PORT_TO_FRONT_PORT(port) (port+1) + +enum port_numbers { + as7312_54x_port1, as7312_54x_port2, as7312_54x_port3, as7312_54x_port4, + as7312_54x_port5, as7312_54x_port6, as7312_54x_port7, as7312_54x_port8, + as7312_54x_port9, as7312_54x_port10, as7312_54x_port11, as7312_54x_port12, + as7312_54x_port13, as7312_54x_port14, as7312_54x_port15, as7312_54x_port16, + as7312_54x_port17, as7312_54x_port18, as7312_54x_port19, as7312_54x_port20, + as7312_54x_port21, as7312_54x_port22, as7312_54x_port23, as7312_54x_port24, + as7312_54x_port25, as7312_54x_port26, as7312_54x_port27, as7312_54x_port28, + as7312_54x_port29, as7312_54x_port30, as7312_54x_port31, as7312_54x_port32, + as7312_54x_port33, as7312_54x_port34, as7312_54x_port35, as7312_54x_port36, + as7312_54x_port37, as7312_54x_port38, as7312_54x_port39, as7312_54x_port40, + as7312_54x_port41, as7312_54x_port42, as7312_54x_port43, as7312_54x_port44, + as7312_54x_port45, as7312_54x_port46, as7312_54x_port47, as7312_54x_port48, + as7312_54x_port49, as7312_54x_port52, as7312_54x_port50, as7312_54x_port53, + as7312_54x_port51, as7312_54x_port54 +}; + +#define I2C_DEV_ID(x) { #x, x} + +static const struct i2c_device_id sfp_device_id[] = { + I2C_DEV_ID(as7312_54x_port1), + I2C_DEV_ID(as7312_54x_port2), + I2C_DEV_ID(as7312_54x_port3), + I2C_DEV_ID(as7312_54x_port4), + I2C_DEV_ID(as7312_54x_port5), + I2C_DEV_ID(as7312_54x_port6), + I2C_DEV_ID(as7312_54x_port7), + I2C_DEV_ID(as7312_54x_port8), + I2C_DEV_ID(as7312_54x_port9), + I2C_DEV_ID(as7312_54x_port10), + I2C_DEV_ID(as7312_54x_port11), + I2C_DEV_ID(as7312_54x_port12), + I2C_DEV_ID(as7312_54x_port13), + I2C_DEV_ID(as7312_54x_port14), + I2C_DEV_ID(as7312_54x_port15), + I2C_DEV_ID(as7312_54x_port16), + I2C_DEV_ID(as7312_54x_port17), + I2C_DEV_ID(as7312_54x_port18), + I2C_DEV_ID(as7312_54x_port19), + I2C_DEV_ID(as7312_54x_port20), + I2C_DEV_ID(as7312_54x_port21), + I2C_DEV_ID(as7312_54x_port22), + I2C_DEV_ID(as7312_54x_port23), + I2C_DEV_ID(as7312_54x_port24), + I2C_DEV_ID(as7312_54x_port25), + I2C_DEV_ID(as7312_54x_port26), + I2C_DEV_ID(as7312_54x_port27), + I2C_DEV_ID(as7312_54x_port28), + I2C_DEV_ID(as7312_54x_port29), + I2C_DEV_ID(as7312_54x_port30), + I2C_DEV_ID(as7312_54x_port31), + I2C_DEV_ID(as7312_54x_port32), + I2C_DEV_ID(as7312_54x_port33), + I2C_DEV_ID(as7312_54x_port34), + I2C_DEV_ID(as7312_54x_port35), + I2C_DEV_ID(as7312_54x_port36), + I2C_DEV_ID(as7312_54x_port37), + I2C_DEV_ID(as7312_54x_port38), + I2C_DEV_ID(as7312_54x_port39), + I2C_DEV_ID(as7312_54x_port40), + I2C_DEV_ID(as7312_54x_port41), + I2C_DEV_ID(as7312_54x_port42), + I2C_DEV_ID(as7312_54x_port43), + I2C_DEV_ID(as7312_54x_port44), + I2C_DEV_ID(as7312_54x_port45), + I2C_DEV_ID(as7312_54x_port46), + I2C_DEV_ID(as7312_54x_port47), + I2C_DEV_ID(as7312_54x_port48), + I2C_DEV_ID(as7312_54x_port49), + I2C_DEV_ID(as7312_54x_port50), + I2C_DEV_ID(as7312_54x_port51), + I2C_DEV_ID(as7312_54x_port52), + I2C_DEV_ID(as7312_54x_port53), + I2C_DEV_ID(as7312_54x_port54), + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, sfp_device_id); +/* Platform dependent --- */ + +enum driver_type_e { + DRIVER_TYPE_SFP_MSA, + DRIVER_TYPE_QSFP +}; + +/* Each client has this additional data + */ +struct eeprom_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + struct bin_attribute bin; /* eeprom data */ +}; + +struct sfp_msa_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u64 status[6]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss + 3 => device id + 4 => 10G Ethernet Compliance Codes + to distinguish SFP or SFP+ + 5 => DIAGNOSTIC MONITORING TYPE */ + struct eeprom_data eeprom; +#if (MULTIPAGE_SUPPORT == 1) + struct i2c_client *ddm_client; /* dummy client instance for 0xA2 */ +#endif +}; + +struct qsfp_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status[3]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss */ + + u8 device_id; + struct eeprom_data eeprom; +}; + +struct sfp_port_data { + struct mutex update_lock; + enum driver_type_e driver_type; + int port; /* CPLD port index */ + u64 present; /* present status, bit0:port0, bit1:port1 and so on */ + + struct sfp_msa_data *msa; + struct qsfp_data *qsfp; + + struct i2c_client *client; +#if (MULTIPAGE_SUPPORT == 1) + int use_smbus; + u8 *writebuf; + unsigned write_max; +#endif +}; + +#if (MULTIPAGE_SUPPORT == 1) +static ssize_t sfp_port_read_write(struct sfp_port_data *port_data, + char *buf, loff_t off, size_t len, qsfp_opcode_e opcode); +#endif +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + return sprintf(buf, "%d\n", CPLD_PORT_TO_FRONT_PORT(data->port)); +} + +/* Platform dependent +++ */ +static struct sfp_port_data *sfp_update_present(struct i2c_client *client) +{ + int i = 0, j = 0, status = -1; + u8 reg; + unsigned short cpld_addr; + struct sfp_port_data *data = i2c_get_clientdata(client); + + DEBUG_PRINT("Starting sfp present status update"); + mutex_lock(&data->update_lock); + data->present = 0; + + /* Read present status of port 1~48(SFP port) */ + for (i = 0; i < 2; i++) { + for (j = 0; j < 3; j++) { + cpld_addr = I2C_ADDR_CPLD2 + i*2; + reg = 0x9+j; + status = accton_i2c_cpld_read(cpld_addr, reg); + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_addr, reg, status); + goto exit; + } + + DEBUG_PRINT("Present status = 0x%lx\r\n", data->present); + data->present |= (u64)status << ((i*24) + (j%3)*8); + } + } + + /* Read present status of port 49-52(QSFP port) */ + cpld_addr = I2C_ADDR_CPLD2; + reg = 0x18; + status = accton_i2c_cpld_read(cpld_addr, reg); + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_addr, reg, status); + goto exit; + } + else { + data->present |= (u64)(status & 0xF) << SFP_PORT_MAX; + } + + /* Read present status of port 53-54(QSFP port) */ + cpld_addr = I2C_ADDR_CPLD3; + reg = 0x18; + status = accton_i2c_cpld_read(cpld_addr, reg); + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_addr, reg, status); + goto exit; + } + else { + data->present |= (u64)(status & 0x3) << 52; + } + + DEBUG_PRINT("Present status = 0x%lx", data->present); +exit: + mutex_unlock(&data->update_lock); + return (status < 0) ? ERR_PTR(status) : data; +} + +static struct sfp_port_data* sfp_update_tx_rx_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int i = 0, j = 0; + int status = -1; + + if (time_before(jiffies, data->msa->last_updated + HZ + HZ / 2) && data->msa->valid) { + return data; + } + + DEBUG_PRINT("Starting as7312_54x sfp tx rx status update"); + mutex_lock(&data->update_lock); + data->msa->valid = 0; + memset(data->msa->status, 0, sizeof(data->msa->status)); + + /* Read status of port 1~48(SFP port) */ + for (i = 0; i < 2; i++) { + for (j = 0; j < 9; j++) { + u8 reg; + unsigned short cpld_addr; + reg = 0xc+j; + cpld_addr = I2C_ADDR_CPLD2 + i*2; + + status = accton_i2c_cpld_read(cpld_addr, reg); + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_addr, reg, status); + goto exit; + } + + data->msa->status[j/3] |= (u64)status << ((i*24) + (j%3)*8); + } + } + + data->msa->valid = 1; + data->msa->last_updated = jiffies; + +exit: + mutex_unlock(&data->update_lock); + return (status < 0) ? ERR_PTR(status) : data; +} + +static ssize_t sfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + unsigned short cpld_addr = 0; + u8 cpld_reg = 0, cpld_val = 0, cpld_bit = 0; + long disable; + int error; + + if (data->driver_type == DRIVER_TYPE_QSFP) { + return qsfp_set_tx_disable(dev, da, buf, count); + } + + error = kstrtol(buf, 10, &disable); + if (error) { + return error; + } + + mutex_lock(&data->update_lock); + + if(data->port < 24) { + cpld_addr = I2C_ADDR_CPLD2; + cpld_reg = 0xF + data->port / 8; + cpld_bit = 1 << (data->port % 8); + } + else { /* port 24 ~ 48 */ + cpld_addr = I2C_ADDR_CPLD3; + cpld_reg = 0xF + (data->port - 24) / 8; + cpld_bit = 1 << (data->port % 8); + } + + /* Read current status */ + cpld_val = accton_i2c_cpld_read(cpld_addr, cpld_reg); + + /* Update tx_disable status */ + if (disable) { + data->msa->status[1] |= BIT_INDEX(data->port); + cpld_val |= cpld_bit; + } + else { + data->msa->status[1] &= ~BIT_INDEX(data->port); + cpld_val &= ~cpld_bit; + } + + accton_i2c_cpld_write(cpld_addr, cpld_reg, cpld_val); + mutex_unlock(&data->update_lock); + return count; +} + +static int sfp_is_port_present(struct i2c_client *client, int port) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + + data = sfp_update_present(client); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + return (data->present & BIT_INDEX(data->port)) ? 0 : 1; /* Platform dependent */ +} + +/* Platform dependent +++ */ +static ssize_t show_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + + if (PRESENT_ALL == attr->index) { + int i; + u8 values[7] = {0}; + struct sfp_port_data *data = sfp_update_present(client); + + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + for (i = 0; i < ARRAY_SIZE(values); i++) { + values[i] = ~(u8)(data->present >> (i * 8)); + } + + /* Return values 1 -> 54 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], + values[3], values[4], values[5], + values[6] & 0x3F); + } + else { + struct sfp_port_data *data = i2c_get_clientdata(client); + int present = sfp_is_port_present(client, data->port); + + if (IS_ERR_VALUE(present)) { + return present; + } + + /* PRESENT */ + return sprintf(buf, "%d\n", present); + } +} +/* Platform dependent --- */ + +static struct sfp_port_data *qsfp_update_tx_rx_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int i, status = -1; + u8 buf = 0; + u8 reg[] = {SFF8436_TX_FAULT_ADDR, SFF8436_TX_DISABLE_ADDR, SFF8436_RX_LOS_ADDR}; + + if (time_before(jiffies, data->qsfp->last_updated + HZ + HZ / 2) && data->qsfp->valid) { + return data; + } + + DEBUG_PRINT("Starting sfp tx rx status update"); + mutex_lock(&data->update_lock); + data->qsfp->valid = 0; + memset(data->qsfp->status, 0, sizeof(data->qsfp->status)); + + /* Notify device to update tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(client, reg[i], &buf, sizeof(buf)); + if (unlikely(status < 0)) { + goto exit; + } + } + msleep(200); + + /* Read actual tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(client, reg[i], &buf, sizeof(buf)); + if (unlikely(status < 0)) { + goto exit; + } + + DEBUG_PRINT("qsfp reg(0x%x) status = (0x%x)", reg[i], data->qsfp->status[i]); + data->qsfp->status[i] = (buf & 0xF); + } + + data->qsfp->valid = 1; + data->qsfp->last_updated = jiffies; + +exit: + mutex_unlock(&data->update_lock); + return (status < 0) ? ERR_PTR(status) : data; +} + +static ssize_t get_mode_reset(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + u8 cpld_val = 0; + int port_bit; + int status = -EINVAL; + u8 cpld_addr[] = {I2C_ADDR_CPLD2, I2C_ADDR_CPLD3}; + + /* Low power mode is not supported for SFP ports(1-48) */ + if (data->port < SFP_PORT_MAX) { + return -EINVAL; + } + mutex_lock(&data->update_lock); + + port_bit = data->port - SFP_PORT_MAX; + cpld_val = accton_i2c_cpld_read(cpld_addr[port_bit/4], CPLD3_OFFSET_QSFP_MOD_RST); + + pr_err("[ROY]%s#%d, %x from %x\n", __func__, __LINE__, cpld_val, cpld_addr[port_bit/4]); + + cpld_val = cpld_val & 0x0F; + cpld_val = cpld_val & BIT_INDEX(port_bit%4); + + pr_err("[ROY]%s#%d, %x of bit %d\n", __func__, __LINE__, cpld_val, port_bit); + + status = snprintf(buf, PAGE_SIZE - 1, "%d\r\n", cpld_val>>(port_bit%4)); + + mutex_unlock(&data->update_lock); + + return status; +} + +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + u8 cpld_val = 0; + long reset; + int error, port_bit; + u8 cpld_addr[] = {I2C_ADDR_CPLD2, I2C_ADDR_CPLD3}; + + pr_err("[ROY]%s#%d, port:%d\n", __func__, __LINE__, data->port); + + /* Tx disable is not supported for QSFP ports(49-54) */ + if (data->port < SFP_PORT_MAX) { + return -EINVAL; + } + port_bit = data->port - SFP_PORT_MAX; + error = kstrtol(buf, 10, &reset); + + pr_err("[ROY]%s#%d, %s == %d\n", __func__, __LINE__, buf, error); + if (error) { + return error; + } + mutex_lock(&data->update_lock); + + cpld_val = accton_i2c_cpld_read(cpld_addr[port_bit/4], CPLD3_OFFSET_QSFP_MOD_RST); + pr_err("[ROY]%s#%d, %x\n", __func__, __LINE__, cpld_val); + /* Update lp_mode status */ + if (reset) + { + cpld_val |= BIT_INDEX(port_bit%4); + } + else + { + cpld_val &= ~BIT_INDEX(port_bit%4); + } + pr_err("[ROY]%s#%d, %x to %x\n", __func__, __LINE__, cpld_val, cpld_addr[port_bit/4]); + + accton_i2c_cpld_write(cpld_addr[port_bit/4], CPLD3_OFFSET_QSFP_MOD_RST, cpld_val); + + mutex_unlock(&data->update_lock); + + return count; +} +static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + int present; + u8 val = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + present = sfp_is_port_present(client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + if (present == 0) { + /* port is not present */ + return -ENXIO; + } + + data = qsfp_update_tx_rx_status(dev); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + switch (attr->index) { + case TX_FAULT: + val = !!(data->qsfp->status[2] & 0xF); + break; + case TX_FAULT1: + case TX_FAULT2: + case TX_FAULT3: + case TX_FAULT4: + val = !!(data->qsfp->status[2] & BIT_INDEX(attr->index - TX_FAULT1)); + break; + case TX_DISABLE: + val = data->qsfp->status[1] & 0xF; + break; + case TX_DISABLE1: + case TX_DISABLE2: + case TX_DISABLE3: + case TX_DISABLE4: + val = !!(data->qsfp->status[1] & BIT_INDEX(attr->index - TX_DISABLE1)); + break; + case RX_LOS: + val = !!(data->qsfp->status[0] & 0xF); + break; + case RX_LOS1: + case RX_LOS2: + case RX_LOS3: + case RX_LOS4: + val = !!(data->qsfp->status[0] & BIT_INDEX(attr->index - RX_LOS1)); + break; + default: + break; + } + + return sprintf(buf, "%d\n", val); +} + +static ssize_t qsfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + long disable; + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + status = sfp_is_port_present(client, data->port); + if (IS_ERR_VALUE(status)) { + return status; + } + + if (!status) { + /* port is not present */ + return -ENXIO; + } + + status = kstrtol(buf, 10, &disable); + if (status) { + return status; + } + + data = qsfp_update_tx_rx_status(dev); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + mutex_lock(&data->update_lock); + + if (attr->index == TX_DISABLE) { + if (disable) { + data->qsfp->status[1] |= 0xF; + } + else { + data->qsfp->status[1] &= ~0xF; + } + } + else {/* TX_DISABLE1 ~ TX_DISABLE4*/ + if (disable) { + data->qsfp->status[1] |= (1 << (attr->index - TX_DISABLE1)); + } + else { + data->qsfp->status[1] &= ~(1 << (attr->index - TX_DISABLE1)); + } + } + + DEBUG_PRINT("index = (%d), status = (0x%x)", attr->index, data->qsfp->status[1]); + status = sfp_eeprom_write(data->client, SFF8436_TX_DISABLE_ADDR, &data->qsfp->status[1], sizeof(data->qsfp->status[1])); + if (unlikely(status < 0)) { + count = status; + } + + mutex_unlock(&data->update_lock); + return count; +} + +/* Platform dependent +++ */ +static ssize_t sfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 val = 0, index = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + if (data->driver_type == DRIVER_TYPE_QSFP) { + return qsfp_show_tx_rx_status(dev, da, buf); + } + + data = sfp_update_tx_rx_status(dev); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + if(attr->index == RX_LOS_ALL) { + int i = 0; + u8 values[6] = {0}; + + for (i = 0; i < ARRAY_SIZE(values); i++) { + values[i] = (u8)(data->msa->status[2] >> (i * 8)); + } + + /** Return values 1 -> 48 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], + values[3], values[4], values[5]); + } + + switch (attr->index) { + case TX_FAULT: + index = 0; + break; + case TX_DISABLE: + index = 1; + break; + case RX_LOS: + index = 2; + break; + default: + return 0; + } + + val = (data->msa->status[index] & BIT_INDEX(data->port)) ? 1 : 0; + return sprintf(buf, "%d\n", val); +} +/* Platform dependent --- */ +static ssize_t sfp_eeprom_write(struct i2c_client *client, u8 command, const char *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int status, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + status = i2c_smbus_write_i2c_block_data(client, command, data_len, data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + return status; + } + + return data_len; +#else + int status, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, command, *data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + return status; + } + + return 1; +#endif + + +} + +#if (MULTIPAGE_SUPPORT == 0) +static ssize_t sfp_port_write(struct sfp_port_data *data, + const char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + return count; + } + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_write(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; +} +#endif + +static ssize_t sfp_bin_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + int present; + struct sfp_port_data *data; + DEBUG_PRINT("%s(%d) offset = (%d), count = (%d)", off, count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + + present = sfp_is_port_present(data->client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + if (present == 0) { + /* port is not present */ + return -ENODEV; + } + +#if (MULTIPAGE_SUPPORT == 1) + return sfp_port_read_write(data, buf, off, count, QSFP_WRITE_OP); +#else + return sfp_port_write(data, buf, off, count); +#endif +} + +static ssize_t sfp_eeprom_read(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int status, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + status = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + goto abort; + } + if (unlikely(status != data_len)) { + status = -EIO; + goto abort; + } + + //result = data_len; + +abort: + return status; +#else + int status, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, command); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "sfp read byte data failed, command(0x%2x), data(0x%2x)\r\n", command, status); + goto abort; + } + + *data = (u8)status; + status = 1; + +abort: + return status; +#endif +} + +#if (MULTIPAGE_SUPPORT == 1) +/*-------------------------------------------------------------------------*/ +/* + * This routine computes the addressing information to be used for + * a given r/w request. + * + * Task is to calculate the client (0 = i2c addr 50, 1 = i2c addr 51), + * the page, and the offset. + * + * Handles both SFP and QSFP. + * For SFP, offset 0-255 are on client[0], >255 is on client[1] + * Offset 256-383 are on the lower half of client[1] + * Pages are accessible on the upper half of client[1]. + * Offset >383 are in 128 byte pages mapped into the upper half + * + * For QSFP, all offsets are on client[0] + * offset 0-127 are on the lower half of client[0] (no paging) + * Pages are accessible on the upper half of client[1]. + * Offset >127 are in 128 byte pages mapped into the upper half + * + * Callers must not read/write beyond the end of a client or a page + * without recomputing the client/page. Hence offset (within page) + * plus length must be less than or equal to 128. (Note that this + * routine does not have access to the length of the call, hence + * cannot do the validity check.) + * + * Offset within Lower Page 00h and Upper Page 00h are not recomputed + */ +static uint8_t sff_8436_translate_offset(struct sfp_port_data *port_data, + loff_t *offset, struct i2c_client **client) +{ + unsigned page = 0; + + *client = port_data->client; + + /* if SFP style, offset > 255, shift to i2c addr 0x51 */ + if (port_data->driver_type == DRIVER_TYPE_SFP_MSA) { + if (*offset > 255) { + /* like QSFP, but shifted to client[1] */ + *client = port_data->msa->ddm_client; + *offset -= 256; + } + } + + /* + * if offset is in the range 0-128... + * page doesn't matter (using lower half), return 0. + * offset is already correct (don't add 128 to get to paged area) + */ + if (*offset < SFF_8436_PAGE_SIZE) + return page; + + /* note, page will always be positive since *offset >= 128 */ + page = (*offset >> 7)-1; + /* 0x80 places the offset in the top half, offset is last 7 bits */ + *offset = SFF_8436_PAGE_SIZE + (*offset & 0x7f); + + return page; /* note also returning client and offset */ +} + +static ssize_t sff_8436_eeprom_read(struct sfp_port_data *port_data, + struct i2c_client *client, + char *buf, unsigned offset, size_t count) +{ + struct i2c_msg msg[2]; + u8 msgbuf[2]; + unsigned long timeout, read_time; + int status, i; + + memset(msg, 0, sizeof(msg)); + + switch (port_data->use_smbus) { + case I2C_SMBUS_I2C_BLOCK_DATA: + /*smaller eeproms can work given some SMBus extension calls */ + if (count > I2C_SMBUS_BLOCK_MAX) + count = I2C_SMBUS_BLOCK_MAX; + break; + case I2C_SMBUS_WORD_DATA: + /* Check for odd length transaction */ + count = (count == 1) ? 1 : 2; + break; + case I2C_SMBUS_BYTE_DATA: + count = 1; + break; + default: + /* + * When we have a better choice than SMBus calls, use a + * combined I2C message. Write address; then read up to + * io_limit data bytes. msgbuf is u8 and will cast to our + * needs. + */ + i = 0; + msgbuf[i++] = offset; + + msg[0].addr = client->addr; + msg[0].buf = msgbuf; + msg[0].len = i; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + } + + /* + * Reads fail if the previous write didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + read_time = jiffies; + + switch (port_data->use_smbus) { + case I2C_SMBUS_I2C_BLOCK_DATA: + status = i2c_smbus_read_i2c_block_data(client, offset, + count, buf); + break; + case I2C_SMBUS_WORD_DATA: + status = i2c_smbus_read_word_data(client, offset); + if (status >= 0) { + buf[0] = status & 0xff; + if (count == 2) + buf[1] = status >> 8; + status = count; + } + break; + case I2C_SMBUS_BYTE_DATA: + status = i2c_smbus_read_byte_data(client, offset); + if (status >= 0) { + buf[0] = status; + status = count; + } + break; + default: + status = i2c_transfer(client->adapter, msg, 2); + if (status == 2) + status = count; + } + + dev_dbg(&client->dev, "eeprom read %zu@%d --> %d (%ld)\n", + count, offset, status, jiffies); + + if (status == count) /* happy path */ + return count; + + if (status == -ENXIO) /* no module present */ + return status; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(read_time, timeout)); + + return -ETIMEDOUT; +} + +static ssize_t sff_8436_eeprom_write(struct sfp_port_data *port_data, + struct i2c_client *client, + const char *buf, + unsigned offset, size_t count) +{ + struct i2c_msg msg; + ssize_t status; + unsigned long timeout, write_time; + unsigned next_page_start; + int i = 0; + + /* write max is at most a page + * (In this driver, write_max is actually one byte!) + */ + if (count > port_data->write_max) + count = port_data->write_max; + + /* shorten count if necessary to avoid crossing page boundary */ + next_page_start = roundup(offset + 1, SFF_8436_PAGE_SIZE); + if (offset + count > next_page_start) + count = next_page_start - offset; + + switch (port_data->use_smbus) { + case I2C_SMBUS_I2C_BLOCK_DATA: + /*smaller eeproms can work given some SMBus extension calls */ + if (count > I2C_SMBUS_BLOCK_MAX) + count = I2C_SMBUS_BLOCK_MAX; + break; + case I2C_SMBUS_WORD_DATA: + /* Check for odd length transaction */ + count = (count == 1) ? 1 : 2; + break; + case I2C_SMBUS_BYTE_DATA: + count = 1; + break; + default: + /* If we'll use I2C calls for I/O, set up the message */ + msg.addr = client->addr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = port_data->writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + break; + } + + /* + * Reads fail if the previous write didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + write_time = jiffies; + + switch (port_data->use_smbus) { + case I2C_SMBUS_I2C_BLOCK_DATA: + status = i2c_smbus_write_i2c_block_data(client, + offset, count, buf); + if (status == 0) + status = count; + break; + case I2C_SMBUS_WORD_DATA: + if (count == 2) { + status = i2c_smbus_write_word_data(client, + offset, (u16)((buf[0])|(buf[1] << 8))); + } else { + /* count = 1 */ + status = i2c_smbus_write_byte_data(client, + offset, buf[0]); + } + if (status == 0) + status = count; + break; + case I2C_SMBUS_BYTE_DATA: + status = i2c_smbus_write_byte_data(client, offset, + buf[0]); + if (status == 0) + status = count; + break; + default: + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + break; + } + + dev_dbg(&client->dev, "eeprom write %zu@%d --> %ld (%lu)\n", + count, offset, (long int) status, jiffies); + + if (status == count) + return count; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(write_time, timeout)); + + return -ETIMEDOUT; +} + + +static ssize_t sff_8436_eeprom_update_client(struct sfp_port_data *port_data, + char *buf, loff_t off, + size_t count, qsfp_opcode_e opcode) +{ + struct i2c_client *client; + ssize_t retval = 0; + u8 page = 0; + loff_t phy_offset = off; + int ret = 0; + + page = sff_8436_translate_offset(port_data, &phy_offset, &client); + + dev_dbg(&client->dev, + "sff_8436_eeprom_update_client off %lld page:%d phy_offset:%lld, count:%ld, opcode:%d\n", + off, page, phy_offset, (long int) count, opcode); + if (page > 0) { + ret = sff_8436_eeprom_write(port_data, client, &page, + SFF_8436_PAGE_SELECT_REG, 1); + if (ret < 0) { + dev_dbg(&client->dev, + "Write page register for page %d failed ret:%d!\n", + page, ret); + return ret; + } + } + + while (count) { + ssize_t status; + + if (opcode == QSFP_READ_OP) { + status = sff_8436_eeprom_read(port_data, client, + buf, phy_offset, count); + } else { + status = sff_8436_eeprom_write(port_data, client, + buf, phy_offset, count); + } + if (status <= 0) { + if (retval == 0) + retval = status; + break; + } + buf += status; + phy_offset += status; + count -= status; + retval += status; + } + + + if (page > 0) { + /* return the page register to page 0 (why?) */ + page = 0; + ret = sff_8436_eeprom_write(port_data, client, &page, + SFF_8436_PAGE_SELECT_REG, 1); + if (ret < 0) { + dev_err(&client->dev, + "Restore page register to page %d failed ret:%d!\n", + page, ret); + return ret; + } + } + return retval; +} + + +/* + * Figure out if this access is within the range of supported pages. + * Note this is called on every access because we don't know if the + * module has been replaced since the last call. + * If/when modules support more pages, this is the routine to update + * to validate and allow access to additional pages. + * + * Returns updated len for this access: + * - entire access is legal, original len is returned. + * - access begins legal but is too long, len is truncated to fit. + * - initial offset exceeds supported pages, return -EINVAL + */ +static ssize_t sff_8436_page_legal(struct sfp_port_data *port_data, + loff_t off, size_t len) +{ + struct i2c_client *client = port_data->client; + u8 regval; + int status; + size_t maxlen; + + if (off < 0) return -EINVAL; + if (port_data->driver_type == DRIVER_TYPE_SFP_MSA) { + /* SFP case */ + if ((off + len) <= 256) return len; + /* if no pages needed, we're good */ + //if ((off + len) <= SFF_8472_EEPROM_UNPAGED_SIZE) return len; + /* if offset exceeds possible pages, we're not good */ + if (off >= SFF_8472_EEPROM_SIZE) return -EINVAL; + + /* Check if ddm is supported */ + status = sff_8436_eeprom_read(port_data, client, ®val, + SFF8472_DIAG_MON_TYPE_ADDR, 1); + if (status < 0) return status; /* error out (no module?) */ + if (!(regval & SFF8472_DIAG_MON_TYPE_DDM_MASK)) { + if (off >= 256) return -EINVAL; + maxlen = 256 - off; + } + else { + /* in between, are pages supported? */ + status = sff_8436_eeprom_read(port_data, client, ®val, + SFF_8472_PAGEABLE_REG, 1); + if (status < 0) return status; /* error out (no module?) */ + if (regval & SFF_8472_PAGEABLE) { + /* Pages supported, trim len to the end of pages */ + maxlen = SFF_8472_EEPROM_SIZE - off; + } else { + /* pages not supported, trim len to unpaged size */ + if (off >= SFF_8472_EEPROM_UNPAGED_SIZE) return -EINVAL; + maxlen = SFF_8472_EEPROM_UNPAGED_SIZE - off; + } + } + len = (len > maxlen) ? maxlen : len; + dev_dbg(&client->dev, + "page_legal, SFP, off %lld len %ld\n", + off, (long int) len); + } + else if (port_data->driver_type == DRIVER_TYPE_QSFP) { + /* QSFP case */ + /* if no pages needed, we're good */ + if ((off + len) <= SFF_8436_EEPROM_UNPAGED_SIZE) return len; + /* if offset exceeds possible pages, we're not good */ + if (off >= SFF_8436_EEPROM_SIZE) return -EINVAL; + /* in between, are pages supported? */ + status = sff_8436_eeprom_read(port_data, client, ®val, + SFF_8436_PAGEABLE_REG, 1); + if (status < 0) return status; /* error out (no module?) */ + if (regval & SFF_8436_NOT_PAGEABLE) { + /* pages not supported, trim len to unpaged size */ + if (off >= SFF_8436_EEPROM_UNPAGED_SIZE) return -EINVAL; + maxlen = SFF_8436_EEPROM_UNPAGED_SIZE - off; + } else { + /* Pages supported, trim len to the end of pages */ + maxlen = SFF_8436_EEPROM_SIZE - off; + } + len = (len > maxlen) ? maxlen : len; + dev_dbg(&client->dev, + "page_legal, QSFP, off %lld len %ld\n", + off, (long int) len); + } + else { + return -EINVAL; + } + return len; +} + + +static ssize_t sfp_port_read_write(struct sfp_port_data *port_data, + char *buf, loff_t off, size_t len, qsfp_opcode_e opcode) +{ + struct i2c_client *client = port_data->client; + int chunk; + int status = 0; + ssize_t retval; + size_t pending_len = 0, chunk_len = 0; + loff_t chunk_offset = 0, chunk_start_offset = 0; + + if (unlikely(!len)) + return len; + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&port_data->update_lock); + + /* + * Confirm this access fits within the device suppored addr range + */ + len = sff_8436_page_legal(port_data, off, len); + if (len < 0) { + status = len; + goto err; + } + + /* + * For each (128 byte) chunk involved in this request, issue a + * separate call to sff_eeprom_update_client(), to + * ensure that each access recalculates the client/page + * and writes the page register as needed. + * Note that chunk to page mapping is confusing, is different for + * QSFP and SFP, and never needs to be done. Don't try! + */ + pending_len = len; /* amount remaining to transfer */ + retval = 0; /* amount transferred */ + for (chunk = off >> 7; chunk <= (off + len - 1) >> 7; chunk++) { + + /* + * Compute the offset and number of bytes to be read/write + * + * 1. start at offset 0 (within the chunk), and read/write + * the entire chunk + * 2. start at offset 0 (within the chunk) and read/write less + * than entire chunk + * 3. start at an offset not equal to 0 and read/write the rest + * of the chunk + * 4. start at an offset not equal to 0 and read/write less than + * (end of chunk - offset) + */ + chunk_start_offset = chunk * SFF_8436_PAGE_SIZE; + + if (chunk_start_offset < off) { + chunk_offset = off; + if ((off + pending_len) < (chunk_start_offset + + SFF_8436_PAGE_SIZE)) + chunk_len = pending_len; + else + chunk_len = (chunk+1)*SFF_8436_PAGE_SIZE - off;/*SFF_8436_PAGE_SIZE - off;*/ + } else { + chunk_offset = chunk_start_offset; + if (pending_len > SFF_8436_PAGE_SIZE) + chunk_len = SFF_8436_PAGE_SIZE; + else + chunk_len = pending_len; + } + + dev_dbg(&client->dev, + "sff_r/w: off %lld, len %ld, chunk_start_offset %lld, chunk_offset %lld, chunk_len %ld, pending_len %ld\n", + off, (long int) len, chunk_start_offset, chunk_offset, + (long int) chunk_len, (long int) pending_len); + + /* + * note: chunk_offset is from the start of the EEPROM, + * not the start of the chunk + */ + status = sff_8436_eeprom_update_client(port_data, buf, + chunk_offset, chunk_len, opcode); + if (status != chunk_len) { + /* This is another 'no device present' path */ + dev_dbg(&client->dev, + "sff_8436_update_client for chunk %d chunk_offset %lld chunk_len %ld failed %d!\n", + chunk, chunk_offset, (long int) chunk_len, status); + goto err; + } + buf += status; + pending_len -= status; + retval += status; + } + mutex_unlock(&port_data->update_lock); + + return retval; + +err: + mutex_unlock(&port_data->update_lock); + + return status; +} + +#else +static ssize_t sfp_port_read(struct sfp_port_data *data, + char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + DEBUG_PRINT("Count = 0, return"); + return count; + } + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_read(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; + +} +#endif + +static ssize_t sfp_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + int present; + struct sfp_port_data *data; + DEBUG_PRINT("offset = (%d), count = (%d)", off, count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + + present = sfp_is_port_present(data->client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + if (present == 0) { + /* port is not present */ + return -ENODEV; + } + +#if (MULTIPAGE_SUPPORT == 1) + return sfp_port_read_write(data, buf, off, count, QSFP_READ_OP); +#else + return sfp_port_read(data, buf, off, count); +#endif +} + +#if (MULTIPAGE_SUPPORT == 1) +static int sfp_sysfs_eeprom_init(struct kobject *kobj, struct bin_attribute *eeprom, size_t size) +#else +static int sfp_sysfs_eeprom_init(struct kobject *kobj, struct bin_attribute *eeprom) +#endif +{ + int err; + + sysfs_bin_attr_init(eeprom); + eeprom->attr.name = EEPROM_NAME; + eeprom->attr.mode = S_IWUSR | S_IRUGO; + eeprom->read = sfp_bin_read; + eeprom->write = sfp_bin_write; +#if (MULTIPAGE_SUPPORT == 1) + eeprom->size = size; +#else + eeprom->size = EEPROM_SIZE; +#endif + + /* Create eeprom file */ + err = sysfs_create_bin_file(kobj, eeprom); + if (err) { + return err; + } + + return 0; +} + +static int sfp_sysfs_eeprom_cleanup(struct kobject *kobj, struct bin_attribute *eeprom) +{ + sysfs_remove_bin_file(kobj, eeprom); + return 0; +} + + +#if (MULTIPAGE_SUPPORT == 0) +static int sfp_i2c_check_functionality(struct i2c_client *client) +{ +#if USE_I2C_BLOCK_READ + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK); +#else + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA); +#endif +} +#endif + +static const struct attribute_group sfp_msa_group = { + .attrs = sfp_msa_attributes, +}; + +static int sfp_msa_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct sfp_msa_data **data) +{ + int status; + struct sfp_msa_data *msa; + +#if (MULTIPAGE_SUPPORT == 0) + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } +#endif + + msa = kzalloc(sizeof(struct sfp_msa_data), GFP_KERNEL); + if (!msa) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &sfp_msa_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ +#if (MULTIPAGE_SUPPORT == 1) + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &msa->eeprom.bin, SFF_8436_EEPROM_SIZE); +#else + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &msa->eeprom.bin); +#endif + if (status) { + goto exit_remove; + } + +#if (MULTIPAGE_SUPPORT == 1) + msa->ddm_client = i2c_new_dummy(client->adapter, client->addr + 1); + if (!msa->ddm_client) { + dev_err(&client->dev, "address 0x%02x unavailable\n", client->addr + 1); + status = -EADDRINUSE; + goto exit_eeprom; + } +#endif + + *data = msa; + dev_info(&client->dev, "sfp msa '%s'\n", client->name); + + return 0; + +exit_eeprom: + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &msa->eeprom.bin); +exit_remove: + sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); +exit_free: + kfree(msa); +exit: + + return status; +} + +static const struct attribute_group qsfp_group = { + .attrs = qsfp_attributes, +}; + +static int qsfp_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct qsfp_data **data) +{ + int status; + struct qsfp_data *qsfp; + +#if (MULTIPAGE_SUPPORT == 0) + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } +#endif + + qsfp = kzalloc(sizeof(struct qsfp_data), GFP_KERNEL); + if (!qsfp) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &qsfp_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ +#if (MULTIPAGE_SUPPORT == 1) + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &qsfp->eeprom.bin, SFF_8436_EEPROM_SIZE); +#else + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &qsfp->eeprom.bin); +#endif + if (status) { + goto exit_remove; + } + + *data = qsfp; + dev_info(&client->dev, "qsfp '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &qsfp_group); +exit_free: + kfree(qsfp); +exit: + + return status; +} + +/* Platform dependent +++ */ +static int sfp_device_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int ret = 0; + struct sfp_port_data *data = NULL; + + if (client->addr != SFP_EEPROM_A0_I2C_ADDR) { + return -ENODEV; + } + + if (dev_id->driver_data < as7312_54x_port1 || dev_id->driver_data > as7312_54x_port54) { + return -ENXIO; + } + + data = kzalloc(sizeof(struct sfp_port_data), GFP_KERNEL); + if (!data) { + return -ENOMEM; + } + +#if (MULTIPAGE_SUPPORT == 1) + data->use_smbus = 0; + + /* Use I2C operations unless we're stuck with SMBus extensions. */ + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { + if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { + data->use_smbus = I2C_SMBUS_I2C_BLOCK_DATA; + } else if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_WORD_DATA)) { + data->use_smbus = I2C_SMBUS_WORD_DATA; + } else if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_BYTE_DATA)) { + data->use_smbus = I2C_SMBUS_BYTE_DATA; + } else { + ret = -EPFNOSUPPORT; + goto exit_kfree; + } + } + + if (!data->use_smbus || + (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) || + i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_WRITE_WORD_DATA) || + i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + /* + * NOTE: AN-2079 + * Finisar recommends that the host implement 1 byte writes + * only since this module only supports 32 byte page boundaries. + * 2 byte writes are acceptable for PE and Vout changes per + * Application Note AN-2071. + */ + unsigned write_max = 1; + + if (write_max > io_limit) + write_max = io_limit; + if (data->use_smbus && write_max > I2C_SMBUS_BLOCK_MAX) + write_max = I2C_SMBUS_BLOCK_MAX; + data->write_max = write_max; + + /* buffer (data + address at the beginning) */ + data->writebuf = kmalloc(write_max + 2, GFP_KERNEL); + if (!data->writebuf) { + ret = -ENOMEM; + goto exit_kfree; + } + } else { + dev_warn(&client->dev, + "cannot write due to controller restrictions."); + } + + if (data->use_smbus == I2C_SMBUS_WORD_DATA || + data->use_smbus == I2C_SMBUS_BYTE_DATA) { + dev_notice(&client->dev, "Falling back to %s reads, " + "performance will suffer\n", data->use_smbus == + I2C_SMBUS_WORD_DATA ? "word" : "byte"); + } +#endif + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->port = dev_id->driver_data; + data->client = client; + + if (dev_id->driver_data >= as7312_54x_port1 && dev_id->driver_data <= as7312_54x_port48) { + data->driver_type = DRIVER_TYPE_SFP_MSA; + ret = sfp_msa_probe(client, dev_id, &data->msa); + } + else { /* as7312_54x_portsfp49 ~ as7312_54x_portsfp54 */ + data->driver_type = DRIVER_TYPE_QSFP; + ret = qsfp_probe(client, dev_id, &data->qsfp); + } + + if (ret < 0) { + goto exit_kfree_buf; + } + + + return ret; + +exit_kfree_buf: +#if (MULTIPAGE_SUPPORT == 1) + if (data->writebuf) kfree(data->writebuf); +#endif + +exit_kfree: + kfree(data); + return ret; +} +/* Platform dependent --- */ + +static int sfp_msa_remove(struct i2c_client *client, struct sfp_msa_data *data) +{ + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); +#if (MULTIPAGE_SUPPORT == 1) + i2c_unregister_device(data->ddm_client); +#endif + sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); + kfree(data); + return 0; +} + +static int qfp_remove(struct i2c_client *client, struct qsfp_data *data) +{ + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + sysfs_remove_group(&client->dev.kobj, &qsfp_group); + kfree(data); + return 0; +} + +static int sfp_device_remove(struct i2c_client *client) +{ + int ret = 0; + struct sfp_port_data *data = i2c_get_clientdata(client); + + switch (data->driver_type) { + case DRIVER_TYPE_SFP_MSA: + return sfp_msa_remove(client, data->msa); + case DRIVER_TYPE_QSFP: + return qfp_remove(client, data->qsfp); + } + +#if (MULTIPAGE_SUPPORT == 1) + if (data->writebuf) + kfree(data->writebuf); +#endif + kfree(data); + return ret; +} + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static struct i2c_driver sfp_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = sfp_device_probe, + .remove = sfp_device_remove, + .id_table = sfp_device_id, + .address_list = normal_i2c, +}; + +static int __init sfp_init(void) +{ + return i2c_add_driver(&sfp_driver); +} + +static void __exit sfp_exit(void) +{ + i2c_del_driver(&sfp_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton as7312_54x_sfp driver"); +MODULE_LICENSE("GPL"); + +module_init(sfp_init); +module_exit(sfp_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_i2c_cpld.c new file mode 100644 index 00000000000..67ecd8e036a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_i2c_cpld.c @@ -0,0 +1,1219 @@ +/* + * Copyright (C) Brandon Chuang + * + * This module supports the accton cpld that hold the channel select + * mechanism for other i2c slave devices, such as SFP. + * This includes the: + * Accton as7312_54x CPLD1/CPLD2/CPLD3 + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +enum cpld_type { + as7312_54x_cpld1, + as7312_54x_cpld2, + as7312_54x_cpld3 +}; + +struct as7312_54x_cpld_data { + enum cpld_type type; + struct device *hwmon_dev; + struct mutex update_lock; +}; + +static const struct i2c_device_id as7312_54x_cpld_id[] = { + { "as7312_54x_cpld1", as7312_54x_cpld1 }, + { "as7312_54x_cpld2", as7312_54x_cpld2 }, + { "as7312_54x_cpld3", as7312_54x_cpld3 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, as7312_54x_cpld_id); + +#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index +#define TRANSCEIVER_TXDISABLE_ATTR_ID(index) MODULE_TXDISABLE_##index +#define TRANSCEIVER_RXLOS_ATTR_ID(index) MODULE_RXLOS_##index +#define TRANSCEIVER_TXFAULT_ATTR_ID(index) MODULE_TXFAULT_##index +#define TRANSCEIVER_RESET_ATTR_ID(index) MODULE_RESET_##index + +enum as7312_54x_cpld1_sysfs_attributes { + CPLD_VERSION, + ACCESS, + MODULE_PRESENT_ALL, + MODULE_RXLOS_ALL, + /* transceiver attributes */ + TRANSCEIVER_PRESENT_ATTR_ID(1), + TRANSCEIVER_PRESENT_ATTR_ID(2), + TRANSCEIVER_PRESENT_ATTR_ID(3), + TRANSCEIVER_PRESENT_ATTR_ID(4), + TRANSCEIVER_PRESENT_ATTR_ID(5), + TRANSCEIVER_PRESENT_ATTR_ID(6), + TRANSCEIVER_PRESENT_ATTR_ID(7), + TRANSCEIVER_PRESENT_ATTR_ID(8), + TRANSCEIVER_PRESENT_ATTR_ID(9), + TRANSCEIVER_PRESENT_ATTR_ID(10), + TRANSCEIVER_PRESENT_ATTR_ID(11), + TRANSCEIVER_PRESENT_ATTR_ID(12), + TRANSCEIVER_PRESENT_ATTR_ID(13), + TRANSCEIVER_PRESENT_ATTR_ID(14), + TRANSCEIVER_PRESENT_ATTR_ID(15), + TRANSCEIVER_PRESENT_ATTR_ID(16), + TRANSCEIVER_PRESENT_ATTR_ID(17), + TRANSCEIVER_PRESENT_ATTR_ID(18), + TRANSCEIVER_PRESENT_ATTR_ID(19), + TRANSCEIVER_PRESENT_ATTR_ID(20), + TRANSCEIVER_PRESENT_ATTR_ID(21), + TRANSCEIVER_PRESENT_ATTR_ID(22), + TRANSCEIVER_PRESENT_ATTR_ID(23), + TRANSCEIVER_PRESENT_ATTR_ID(24), + TRANSCEIVER_PRESENT_ATTR_ID(25), + TRANSCEIVER_PRESENT_ATTR_ID(26), + TRANSCEIVER_PRESENT_ATTR_ID(27), + TRANSCEIVER_PRESENT_ATTR_ID(28), + TRANSCEIVER_PRESENT_ATTR_ID(29), + TRANSCEIVER_PRESENT_ATTR_ID(30), + TRANSCEIVER_PRESENT_ATTR_ID(31), + TRANSCEIVER_PRESENT_ATTR_ID(32), + TRANSCEIVER_PRESENT_ATTR_ID(33), + TRANSCEIVER_PRESENT_ATTR_ID(34), + TRANSCEIVER_PRESENT_ATTR_ID(35), + TRANSCEIVER_PRESENT_ATTR_ID(36), + TRANSCEIVER_PRESENT_ATTR_ID(37), + TRANSCEIVER_PRESENT_ATTR_ID(38), + TRANSCEIVER_PRESENT_ATTR_ID(39), + TRANSCEIVER_PRESENT_ATTR_ID(40), + TRANSCEIVER_PRESENT_ATTR_ID(41), + TRANSCEIVER_PRESENT_ATTR_ID(42), + TRANSCEIVER_PRESENT_ATTR_ID(43), + TRANSCEIVER_PRESENT_ATTR_ID(44), + TRANSCEIVER_PRESENT_ATTR_ID(45), + TRANSCEIVER_PRESENT_ATTR_ID(46), + TRANSCEIVER_PRESENT_ATTR_ID(47), + TRANSCEIVER_PRESENT_ATTR_ID(48), + TRANSCEIVER_PRESENT_ATTR_ID(49), + TRANSCEIVER_PRESENT_ATTR_ID(50), + TRANSCEIVER_PRESENT_ATTR_ID(51), + TRANSCEIVER_PRESENT_ATTR_ID(52), + TRANSCEIVER_PRESENT_ATTR_ID(53), + TRANSCEIVER_PRESENT_ATTR_ID(54), + TRANSCEIVER_RESET_ATTR_ID(49), + TRANSCEIVER_RESET_ATTR_ID(50), + TRANSCEIVER_RESET_ATTR_ID(51), + TRANSCEIVER_RESET_ATTR_ID(52), + TRANSCEIVER_RESET_ATTR_ID(53), + TRANSCEIVER_RESET_ATTR_ID(54), + TRANSCEIVER_TXDISABLE_ATTR_ID(1), + TRANSCEIVER_TXDISABLE_ATTR_ID(2), + TRANSCEIVER_TXDISABLE_ATTR_ID(3), + TRANSCEIVER_TXDISABLE_ATTR_ID(4), + TRANSCEIVER_TXDISABLE_ATTR_ID(5), + TRANSCEIVER_TXDISABLE_ATTR_ID(6), + TRANSCEIVER_TXDISABLE_ATTR_ID(7), + TRANSCEIVER_TXDISABLE_ATTR_ID(8), + TRANSCEIVER_TXDISABLE_ATTR_ID(9), + TRANSCEIVER_TXDISABLE_ATTR_ID(10), + TRANSCEIVER_TXDISABLE_ATTR_ID(11), + TRANSCEIVER_TXDISABLE_ATTR_ID(12), + TRANSCEIVER_TXDISABLE_ATTR_ID(13), + TRANSCEIVER_TXDISABLE_ATTR_ID(14), + TRANSCEIVER_TXDISABLE_ATTR_ID(15), + TRANSCEIVER_TXDISABLE_ATTR_ID(16), + TRANSCEIVER_TXDISABLE_ATTR_ID(17), + TRANSCEIVER_TXDISABLE_ATTR_ID(18), + TRANSCEIVER_TXDISABLE_ATTR_ID(19), + TRANSCEIVER_TXDISABLE_ATTR_ID(20), + TRANSCEIVER_TXDISABLE_ATTR_ID(21), + TRANSCEIVER_TXDISABLE_ATTR_ID(22), + TRANSCEIVER_TXDISABLE_ATTR_ID(23), + TRANSCEIVER_TXDISABLE_ATTR_ID(24), + TRANSCEIVER_TXDISABLE_ATTR_ID(25), + TRANSCEIVER_TXDISABLE_ATTR_ID(26), + TRANSCEIVER_TXDISABLE_ATTR_ID(27), + TRANSCEIVER_TXDISABLE_ATTR_ID(28), + TRANSCEIVER_TXDISABLE_ATTR_ID(29), + TRANSCEIVER_TXDISABLE_ATTR_ID(30), + TRANSCEIVER_TXDISABLE_ATTR_ID(31), + TRANSCEIVER_TXDISABLE_ATTR_ID(32), + TRANSCEIVER_TXDISABLE_ATTR_ID(33), + TRANSCEIVER_TXDISABLE_ATTR_ID(34), + TRANSCEIVER_TXDISABLE_ATTR_ID(35), + TRANSCEIVER_TXDISABLE_ATTR_ID(36), + TRANSCEIVER_TXDISABLE_ATTR_ID(37), + TRANSCEIVER_TXDISABLE_ATTR_ID(38), + TRANSCEIVER_TXDISABLE_ATTR_ID(39), + TRANSCEIVER_TXDISABLE_ATTR_ID(40), + TRANSCEIVER_TXDISABLE_ATTR_ID(41), + TRANSCEIVER_TXDISABLE_ATTR_ID(42), + TRANSCEIVER_TXDISABLE_ATTR_ID(43), + TRANSCEIVER_TXDISABLE_ATTR_ID(44), + TRANSCEIVER_TXDISABLE_ATTR_ID(45), + TRANSCEIVER_TXDISABLE_ATTR_ID(46), + TRANSCEIVER_TXDISABLE_ATTR_ID(47), + TRANSCEIVER_TXDISABLE_ATTR_ID(48), + TRANSCEIVER_RXLOS_ATTR_ID(1), + TRANSCEIVER_RXLOS_ATTR_ID(2), + TRANSCEIVER_RXLOS_ATTR_ID(3), + TRANSCEIVER_RXLOS_ATTR_ID(4), + TRANSCEIVER_RXLOS_ATTR_ID(5), + TRANSCEIVER_RXLOS_ATTR_ID(6), + TRANSCEIVER_RXLOS_ATTR_ID(7), + TRANSCEIVER_RXLOS_ATTR_ID(8), + TRANSCEIVER_RXLOS_ATTR_ID(9), + TRANSCEIVER_RXLOS_ATTR_ID(10), + TRANSCEIVER_RXLOS_ATTR_ID(11), + TRANSCEIVER_RXLOS_ATTR_ID(12), + TRANSCEIVER_RXLOS_ATTR_ID(13), + TRANSCEIVER_RXLOS_ATTR_ID(14), + TRANSCEIVER_RXLOS_ATTR_ID(15), + TRANSCEIVER_RXLOS_ATTR_ID(16), + TRANSCEIVER_RXLOS_ATTR_ID(17), + TRANSCEIVER_RXLOS_ATTR_ID(18), + TRANSCEIVER_RXLOS_ATTR_ID(19), + TRANSCEIVER_RXLOS_ATTR_ID(20), + TRANSCEIVER_RXLOS_ATTR_ID(21), + TRANSCEIVER_RXLOS_ATTR_ID(22), + TRANSCEIVER_RXLOS_ATTR_ID(23), + TRANSCEIVER_RXLOS_ATTR_ID(24), + TRANSCEIVER_RXLOS_ATTR_ID(25), + TRANSCEIVER_RXLOS_ATTR_ID(26), + TRANSCEIVER_RXLOS_ATTR_ID(27), + TRANSCEIVER_RXLOS_ATTR_ID(28), + TRANSCEIVER_RXLOS_ATTR_ID(29), + TRANSCEIVER_RXLOS_ATTR_ID(30), + TRANSCEIVER_RXLOS_ATTR_ID(31), + TRANSCEIVER_RXLOS_ATTR_ID(32), + TRANSCEIVER_RXLOS_ATTR_ID(33), + TRANSCEIVER_RXLOS_ATTR_ID(34), + TRANSCEIVER_RXLOS_ATTR_ID(35), + TRANSCEIVER_RXLOS_ATTR_ID(36), + TRANSCEIVER_RXLOS_ATTR_ID(37), + TRANSCEIVER_RXLOS_ATTR_ID(38), + TRANSCEIVER_RXLOS_ATTR_ID(39), + TRANSCEIVER_RXLOS_ATTR_ID(40), + TRANSCEIVER_RXLOS_ATTR_ID(41), + TRANSCEIVER_RXLOS_ATTR_ID(42), + TRANSCEIVER_RXLOS_ATTR_ID(43), + TRANSCEIVER_RXLOS_ATTR_ID(44), + TRANSCEIVER_RXLOS_ATTR_ID(45), + TRANSCEIVER_RXLOS_ATTR_ID(46), + TRANSCEIVER_RXLOS_ATTR_ID(47), + TRANSCEIVER_RXLOS_ATTR_ID(48), + TRANSCEIVER_TXFAULT_ATTR_ID(1), + TRANSCEIVER_TXFAULT_ATTR_ID(2), + TRANSCEIVER_TXFAULT_ATTR_ID(3), + TRANSCEIVER_TXFAULT_ATTR_ID(4), + TRANSCEIVER_TXFAULT_ATTR_ID(5), + TRANSCEIVER_TXFAULT_ATTR_ID(6), + TRANSCEIVER_TXFAULT_ATTR_ID(7), + TRANSCEIVER_TXFAULT_ATTR_ID(8), + TRANSCEIVER_TXFAULT_ATTR_ID(9), + TRANSCEIVER_TXFAULT_ATTR_ID(10), + TRANSCEIVER_TXFAULT_ATTR_ID(11), + TRANSCEIVER_TXFAULT_ATTR_ID(12), + TRANSCEIVER_TXFAULT_ATTR_ID(13), + TRANSCEIVER_TXFAULT_ATTR_ID(14), + TRANSCEIVER_TXFAULT_ATTR_ID(15), + TRANSCEIVER_TXFAULT_ATTR_ID(16), + TRANSCEIVER_TXFAULT_ATTR_ID(17), + TRANSCEIVER_TXFAULT_ATTR_ID(18), + TRANSCEIVER_TXFAULT_ATTR_ID(19), + TRANSCEIVER_TXFAULT_ATTR_ID(20), + TRANSCEIVER_TXFAULT_ATTR_ID(21), + TRANSCEIVER_TXFAULT_ATTR_ID(22), + TRANSCEIVER_TXFAULT_ATTR_ID(23), + TRANSCEIVER_TXFAULT_ATTR_ID(24), + TRANSCEIVER_TXFAULT_ATTR_ID(25), + TRANSCEIVER_TXFAULT_ATTR_ID(26), + TRANSCEIVER_TXFAULT_ATTR_ID(27), + TRANSCEIVER_TXFAULT_ATTR_ID(28), + TRANSCEIVER_TXFAULT_ATTR_ID(29), + TRANSCEIVER_TXFAULT_ATTR_ID(30), + TRANSCEIVER_TXFAULT_ATTR_ID(31), + TRANSCEIVER_TXFAULT_ATTR_ID(32), + TRANSCEIVER_TXFAULT_ATTR_ID(33), + TRANSCEIVER_TXFAULT_ATTR_ID(34), + TRANSCEIVER_TXFAULT_ATTR_ID(35), + TRANSCEIVER_TXFAULT_ATTR_ID(36), + TRANSCEIVER_TXFAULT_ATTR_ID(37), + TRANSCEIVER_TXFAULT_ATTR_ID(38), + TRANSCEIVER_TXFAULT_ATTR_ID(39), + TRANSCEIVER_TXFAULT_ATTR_ID(40), + TRANSCEIVER_TXFAULT_ATTR_ID(41), + TRANSCEIVER_TXFAULT_ATTR_ID(42), + TRANSCEIVER_TXFAULT_ATTR_ID(43), + TRANSCEIVER_TXFAULT_ATTR_ID(44), + TRANSCEIVER_TXFAULT_ATTR_ID(45), + TRANSCEIVER_TXFAULT_ATTR_ID(46), + TRANSCEIVER_TXFAULT_ATTR_ID(47), + TRANSCEIVER_TXFAULT_ATTR_ID(48), +}; + +/* sysfs attributes for hwmon + */ +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_rxlos_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +static int as7312_54x_cpld_read_internal(struct i2c_client *client, u8 reg); +static int as7312_54x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value); + +/* transceiver attributes */ +#define DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_status, NULL, MODULE_PRESENT_##index) +#define DECLARE_TRANSCEIVER_PRESENT_ATTR(index) &sensor_dev_attr_module_present_##index.dev_attr.attr + +#define DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_reset_##index, S_IRUGO | S_IWUSR, show_status, set_reset, MODULE_RESET_##index) +#define DECLARE_TRANSCEIVER_RESET_ATTR(index) &sensor_dev_attr_module_reset_##index.dev_attr.attr + +#define DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_tx_disable_##index, S_IRUGO | S_IWUSR, show_status, set_tx_disable, MODULE_TXDISABLE_##index); \ + static SENSOR_DEVICE_ATTR(module_rx_los_##index, S_IRUGO, show_status, NULL, MODULE_RXLOS_##index); \ + static SENSOR_DEVICE_ATTR(module_tx_fault_##index, S_IRUGO, show_status, NULL, MODULE_TXFAULT_##index) +#define DECLARE_SFP_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_tx_disable_##index.dev_attr.attr, \ + &sensor_dev_attr_module_rx_los_##index.dev_attr.attr, \ + &sensor_dev_attr_module_tx_fault_##index.dev_attr.attr + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS); +/* transceiver attributes */ +static SENSOR_DEVICE_ATTR(module_present_all, S_IRUGO, show_present_all, NULL, MODULE_PRESENT_ALL); +static SENSOR_DEVICE_ATTR(module_rx_los_all, S_IRUGO, show_rxlos_all, NULL, MODULE_RXLOS_ALL); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(1); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(2); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(3); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(4); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(5); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(6); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(7); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(8); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(9); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(10); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(11); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(12); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(13); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(14); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(15); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(16); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(17); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(18); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(19); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(20); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(21); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(22); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(23); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(24); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(25); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(26); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(27); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(28); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(29); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(30); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(31); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(32); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(33); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(34); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(35); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(36); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(37); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(38); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(39); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(40); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(41); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(42); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(43); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(44); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(45); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(46); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(47); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(48); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(49); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(50); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(51); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(52); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(53); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(54); + +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(49); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(50); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(51); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(52); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(53); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(54); + +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(1); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(2); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(3); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(4); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(5); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(6); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(7); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(8); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(9); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(10); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(11); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(12); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(13); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(14); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(15); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(16); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(17); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(18); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(19); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(20); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(21); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(22); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(23); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(24); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(25); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(26); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(27); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(28); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(29); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(30); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(31); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(32); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(33); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(34); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(35); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(36); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(37); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(38); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(39); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(40); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(41); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(42); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(43); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(44); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(45); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(46); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(47); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(48); + +static struct attribute *as7312_54x_cpld1_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + NULL +}; + +static const struct attribute_group as7312_54x_cpld1_group = { + .attrs = as7312_54x_cpld1_attributes, +}; + +static struct attribute *as7312_54x_cpld2_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + &sensor_dev_attr_module_rx_los_all.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(1), + DECLARE_TRANSCEIVER_PRESENT_ATTR(2), + DECLARE_TRANSCEIVER_PRESENT_ATTR(3), + DECLARE_TRANSCEIVER_PRESENT_ATTR(4), + DECLARE_TRANSCEIVER_PRESENT_ATTR(5), + DECLARE_TRANSCEIVER_PRESENT_ATTR(6), + DECLARE_TRANSCEIVER_PRESENT_ATTR(7), + DECLARE_TRANSCEIVER_PRESENT_ATTR(8), + DECLARE_TRANSCEIVER_PRESENT_ATTR(9), + DECLARE_TRANSCEIVER_PRESENT_ATTR(10), + DECLARE_TRANSCEIVER_PRESENT_ATTR(11), + DECLARE_TRANSCEIVER_PRESENT_ATTR(12), + DECLARE_TRANSCEIVER_PRESENT_ATTR(13), + DECLARE_TRANSCEIVER_PRESENT_ATTR(14), + DECLARE_TRANSCEIVER_PRESENT_ATTR(15), + DECLARE_TRANSCEIVER_PRESENT_ATTR(16), + DECLARE_TRANSCEIVER_PRESENT_ATTR(17), + DECLARE_TRANSCEIVER_PRESENT_ATTR(18), + DECLARE_TRANSCEIVER_PRESENT_ATTR(19), + DECLARE_TRANSCEIVER_PRESENT_ATTR(20), + DECLARE_TRANSCEIVER_PRESENT_ATTR(21), + DECLARE_TRANSCEIVER_PRESENT_ATTR(22), + DECLARE_TRANSCEIVER_PRESENT_ATTR(23), + DECLARE_TRANSCEIVER_PRESENT_ATTR(24), + DECLARE_TRANSCEIVER_PRESENT_ATTR(49), + DECLARE_TRANSCEIVER_PRESENT_ATTR(50), + DECLARE_TRANSCEIVER_PRESENT_ATTR(51), + DECLARE_TRANSCEIVER_PRESENT_ATTR(52), + DECLARE_TRANSCEIVER_RESET_ATTR(49), + DECLARE_TRANSCEIVER_RESET_ATTR(50), + DECLARE_TRANSCEIVER_RESET_ATTR(51), + DECLARE_TRANSCEIVER_RESET_ATTR(52), + DECLARE_SFP_TRANSCEIVER_ATTR(1), + DECLARE_SFP_TRANSCEIVER_ATTR(2), + DECLARE_SFP_TRANSCEIVER_ATTR(3), + DECLARE_SFP_TRANSCEIVER_ATTR(4), + DECLARE_SFP_TRANSCEIVER_ATTR(5), + DECLARE_SFP_TRANSCEIVER_ATTR(6), + DECLARE_SFP_TRANSCEIVER_ATTR(7), + DECLARE_SFP_TRANSCEIVER_ATTR(8), + DECLARE_SFP_TRANSCEIVER_ATTR(9), + DECLARE_SFP_TRANSCEIVER_ATTR(10), + DECLARE_SFP_TRANSCEIVER_ATTR(11), + DECLARE_SFP_TRANSCEIVER_ATTR(12), + DECLARE_SFP_TRANSCEIVER_ATTR(13), + DECLARE_SFP_TRANSCEIVER_ATTR(14), + DECLARE_SFP_TRANSCEIVER_ATTR(15), + DECLARE_SFP_TRANSCEIVER_ATTR(16), + DECLARE_SFP_TRANSCEIVER_ATTR(17), + DECLARE_SFP_TRANSCEIVER_ATTR(18), + DECLARE_SFP_TRANSCEIVER_ATTR(19), + DECLARE_SFP_TRANSCEIVER_ATTR(20), + DECLARE_SFP_TRANSCEIVER_ATTR(21), + DECLARE_SFP_TRANSCEIVER_ATTR(22), + DECLARE_SFP_TRANSCEIVER_ATTR(23), + DECLARE_SFP_TRANSCEIVER_ATTR(24), + NULL +}; + +static const struct attribute_group as7312_54x_cpld2_group = { + .attrs = as7312_54x_cpld2_attributes, +}; + +static struct attribute *as7312_54x_cpld3_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + &sensor_dev_attr_module_rx_los_all.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(25), + DECLARE_TRANSCEIVER_PRESENT_ATTR(26), + DECLARE_TRANSCEIVER_PRESENT_ATTR(27), + DECLARE_TRANSCEIVER_PRESENT_ATTR(28), + DECLARE_TRANSCEIVER_PRESENT_ATTR(29), + DECLARE_TRANSCEIVER_PRESENT_ATTR(30), + DECLARE_TRANSCEIVER_PRESENT_ATTR(31), + DECLARE_TRANSCEIVER_PRESENT_ATTR(32), + DECLARE_TRANSCEIVER_PRESENT_ATTR(33), + DECLARE_TRANSCEIVER_PRESENT_ATTR(34), + DECLARE_TRANSCEIVER_PRESENT_ATTR(35), + DECLARE_TRANSCEIVER_PRESENT_ATTR(36), + DECLARE_TRANSCEIVER_PRESENT_ATTR(37), + DECLARE_TRANSCEIVER_PRESENT_ATTR(38), + DECLARE_TRANSCEIVER_PRESENT_ATTR(39), + DECLARE_TRANSCEIVER_PRESENT_ATTR(40), + DECLARE_TRANSCEIVER_PRESENT_ATTR(41), + DECLARE_TRANSCEIVER_PRESENT_ATTR(42), + DECLARE_TRANSCEIVER_PRESENT_ATTR(43), + DECLARE_TRANSCEIVER_PRESENT_ATTR(44), + DECLARE_TRANSCEIVER_PRESENT_ATTR(45), + DECLARE_TRANSCEIVER_PRESENT_ATTR(46), + DECLARE_TRANSCEIVER_PRESENT_ATTR(47), + DECLARE_TRANSCEIVER_PRESENT_ATTR(48), + DECLARE_TRANSCEIVER_PRESENT_ATTR(53), + DECLARE_TRANSCEIVER_PRESENT_ATTR(54), + DECLARE_TRANSCEIVER_RESET_ATTR(53), + DECLARE_TRANSCEIVER_RESET_ATTR(54), + DECLARE_SFP_TRANSCEIVER_ATTR(25), + DECLARE_SFP_TRANSCEIVER_ATTR(26), + DECLARE_SFP_TRANSCEIVER_ATTR(27), + DECLARE_SFP_TRANSCEIVER_ATTR(28), + DECLARE_SFP_TRANSCEIVER_ATTR(29), + DECLARE_SFP_TRANSCEIVER_ATTR(30), + DECLARE_SFP_TRANSCEIVER_ATTR(31), + DECLARE_SFP_TRANSCEIVER_ATTR(32), + DECLARE_SFP_TRANSCEIVER_ATTR(33), + DECLARE_SFP_TRANSCEIVER_ATTR(34), + DECLARE_SFP_TRANSCEIVER_ATTR(35), + DECLARE_SFP_TRANSCEIVER_ATTR(36), + DECLARE_SFP_TRANSCEIVER_ATTR(37), + DECLARE_SFP_TRANSCEIVER_ATTR(38), + DECLARE_SFP_TRANSCEIVER_ATTR(39), + DECLARE_SFP_TRANSCEIVER_ATTR(40), + DECLARE_SFP_TRANSCEIVER_ATTR(41), + DECLARE_SFP_TRANSCEIVER_ATTR(42), + DECLARE_SFP_TRANSCEIVER_ATTR(43), + DECLARE_SFP_TRANSCEIVER_ATTR(44), + DECLARE_SFP_TRANSCEIVER_ATTR(45), + DECLARE_SFP_TRANSCEIVER_ATTR(46), + DECLARE_SFP_TRANSCEIVER_ATTR(47), + DECLARE_SFP_TRANSCEIVER_ATTR(48), + NULL +}; + +static const struct attribute_group as7312_54x_cpld3_group = { + .attrs = as7312_54x_cpld3_attributes, +}; + +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u8 values[4] = {0}; + u8 regs[] = {0x9, 0xA, 0xB, 0x18}; + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = as7312_54x_cpld_read_internal(client, regs[i]); + + if (status < 0) { + goto exit; + } + + values[i] = ~(u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values 1 -> 54 in order */ + if (data->type == as7312_54x_cpld2) { + values[3] &= 0xF; + } + else { /* as7312_54x_cpld3 */ + values[3] &= 0x3; + } + + return sprintf(buf, "%.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], values[3]); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_rxlos_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u8 values[3] = {0}; + u8 regs[] = {0x12, 0x13, 0x14}; + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = as7312_54x_cpld_read_internal(client, regs[i]); + + if (status < 0) { + goto exit; + } + + values[i] = (u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values 1 -> 24 in order */ + return sprintf(buf, "%.2x %.2x %.2x\n", values[0], values[1], values[2]); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0, revert = 0; + + switch (attr->index) { + case MODULE_PRESENT_1 ... MODULE_PRESENT_8: + reg = 0x9; + mask = 0x1 << (attr->index - MODULE_PRESENT_1); + break; + case MODULE_PRESENT_9 ... MODULE_PRESENT_16: + reg = 0xA; + mask = 0x1 << (attr->index - MODULE_PRESENT_9); + break; + case MODULE_PRESENT_17 ... MODULE_PRESENT_24: + reg = 0xB; + mask = 0x1 << (attr->index - MODULE_PRESENT_17); + break; + case MODULE_PRESENT_25 ... MODULE_PRESENT_32: + reg = 0x9; + mask = 0x1 << (attr->index - MODULE_PRESENT_25); + break; + case MODULE_PRESENT_33 ... MODULE_PRESENT_40: + reg = 0xA; + mask = 0x1 << (attr->index - MODULE_PRESENT_33); + break; + case MODULE_PRESENT_41 ... MODULE_PRESENT_48: + reg = 0xB; + mask = 0x1 << (attr->index - MODULE_PRESENT_41); + break; + case MODULE_PRESENT_49: + reg = 0x18; + mask = 0x1; + break; + case MODULE_PRESENT_50: + reg = 0x18; + mask = 0x2; + break; + case MODULE_PRESENT_51: + reg = 0x18; + mask = 0x4; + break; + case MODULE_PRESENT_52: + reg = 0x18; + mask = 0x8; + break; + case MODULE_PRESENT_53: + reg = 0x18; + mask = 0x1; + break; + case MODULE_PRESENT_54: + reg = 0x18; + mask = 0x2; + break; + + case MODULE_RESET_49 ... MODULE_RESET_54: + reg = 0x17; + mask = 1 << ((attr->index - MODULE_PRESENT_49)%4); + break; + + case MODULE_TXFAULT_1 ... MODULE_TXFAULT_8: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_TXFAULT_1); + break; + case MODULE_TXFAULT_9 ... MODULE_TXFAULT_16: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXFAULT_9); + break; + case MODULE_TXFAULT_17 ... MODULE_TXFAULT_24: + reg = 0xE; + mask = 0x1 << (attr->index - MODULE_TXFAULT_17); + break; + case MODULE_TXFAULT_25 ... MODULE_TXFAULT_32: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_TXFAULT_25); + break; + case MODULE_TXFAULT_33 ... MODULE_TXFAULT_40: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXFAULT_33); + break; + case MODULE_TXFAULT_41 ... MODULE_TXFAULT_48: + reg = 0xE; + mask = 0x1 << (attr->index - MODULE_TXFAULT_41); + break; + case MODULE_TXDISABLE_1 ... MODULE_TXDISABLE_8: + reg = 0xF; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_1); + break; + case MODULE_TXDISABLE_9 ... MODULE_TXDISABLE_16: + reg = 0x10; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_9); + break; + case MODULE_TXDISABLE_17 ... MODULE_TXDISABLE_24: + reg = 0x11; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_17); + break; + case MODULE_TXDISABLE_25 ... MODULE_TXDISABLE_32: + reg = 0xF; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_25); + break; + case MODULE_TXDISABLE_33 ... MODULE_TXDISABLE_40: + reg = 0x10; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_33); + break; + case MODULE_TXDISABLE_41 ... MODULE_TXDISABLE_48: + reg = 0x11; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_41); + break; + case MODULE_RXLOS_1 ... MODULE_RXLOS_8: + reg = 0x12; + mask = 0x1 << (attr->index - MODULE_RXLOS_1); + break; + case MODULE_RXLOS_9 ... MODULE_RXLOS_16: + reg = 0x13; + mask = 0x1 << (attr->index - MODULE_RXLOS_9); + break; + case MODULE_RXLOS_17 ... MODULE_RXLOS_24: + reg = 0x14; + mask = 0x1 << (attr->index - MODULE_RXLOS_17); + break; + case MODULE_RXLOS_25 ... MODULE_RXLOS_32: + reg = 0x12; + mask = 0x1 << (attr->index - MODULE_RXLOS_25); + break; + case MODULE_RXLOS_33 ... MODULE_RXLOS_40: + reg = 0x13; + mask = 0x1 << (attr->index - MODULE_RXLOS_33); + break; + case MODULE_RXLOS_41 ... MODULE_RXLOS_48: + reg = 0x14; + mask = 0x1 << (attr->index - MODULE_RXLOS_41); + break; + default: + return 0; + } + + if (attr->index >= MODULE_PRESENT_1 && attr->index <= MODULE_PRESENT_54) { + revert = 1; + } + + mutex_lock(&data->update_lock); + status = as7312_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", revert ? !(status & mask) : !!(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_cpld_data *data = i2c_get_clientdata(client); + long reset; + int status; + u8 reg = 0, mask = 0; + + status = kstrtol(buf, 10, &reset); + if (status) { + return status; + } + + switch (attr->index) { + case MODULE_RESET_49 ... MODULE_RESET_54: + reg = 0x17; + mask = 1 << ((attr->index - MODULE_RESET_49)%4); + break; + default: + return 0; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as7312_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update reset status */ + if (reset) { + status |= mask; + } + else { + status &= ~mask; + } + status = as7312_54x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + + + + +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_cpld_data *data = i2c_get_clientdata(client); + long disable; + int status; + u8 reg = 0, mask = 0; + + status = kstrtol(buf, 10, &disable); + if (status) { + return status; + } + + switch (attr->index) { + case MODULE_TXDISABLE_1 ... MODULE_TXDISABLE_8: + reg = 0xF; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_1); + break; + case MODULE_TXDISABLE_9 ... MODULE_TXDISABLE_16: + reg = 0x10; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_9); + break; + case MODULE_TXDISABLE_17 ... MODULE_TXDISABLE_24: + reg = 0x11; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_17); + break; + case MODULE_TXDISABLE_25 ... MODULE_TXDISABLE_32: + reg = 0xF; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_25); + break; + case MODULE_TXDISABLE_33 ... MODULE_TXDISABLE_40: + reg = 0x10; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_33); + break; + case MODULE_TXDISABLE_41 ... MODULE_TXDISABLE_48: + reg = 0x11; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_41); + break; + default: + return 0; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as7312_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update tx_disable status */ + if (disable) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as7312_54x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_cpld_data *data = i2c_get_clientdata(client); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = as7312_54x_cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static void as7312_54x_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as7312_54x_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, 0x1); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d", val); +} + +/* + * I2C init/probing/exit functions + */ +static int as7312_54x_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + struct as7312_54x_cpld_data *data; + int ret = -ENODEV; + const struct attribute_group *group = NULL; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + goto exit; + + data = kzalloc(sizeof(struct as7312_54x_cpld_data), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->type = id->driver_data; + + /* Register sysfs hooks */ + switch (data->type) { + case as7312_54x_cpld1: + group = &as7312_54x_cpld1_group; + break; + case as7312_54x_cpld2: + group = &as7312_54x_cpld2_group; + break; + case as7312_54x_cpld3: + group = &as7312_54x_cpld3_group; + break; + default: + break; + } + + if (group) { + ret = sysfs_create_group(&client->dev.kobj, group); + if (ret) { + goto exit_free; + } + } + + as7312_54x_cpld_add_client(client); + return 0; + +exit_free: + kfree(data); +exit: + return ret; +} + +static int as7312_54x_cpld_remove(struct i2c_client *client) +{ + struct as7312_54x_cpld_data *data = i2c_get_clientdata(client); + const struct attribute_group *group = NULL; + + as7312_54x_cpld_remove_client(client); + + /* Remove sysfs hooks */ + switch (data->type) { + case as7312_54x_cpld1: + group = &as7312_54x_cpld1_group; + break; + case as7312_54x_cpld2: + group = &as7312_54x_cpld2_group; + break; + case as7312_54x_cpld3: + group = &as7312_54x_cpld3_group; + break; + default: + break; + } + + if (group) { + sysfs_remove_group(&client->dev.kobj, group); + } + + kfree(data); + + return 0; +} + +static int as7312_54x_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int as7312_54x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +int as7312_54x_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as7312_54x_cpld_read_internal(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as7312_54x_cpld_read); + +int as7312_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as7312_54x_cpld_write_internal(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as7312_54x_cpld_write); + +static struct i2c_driver as7312_54x_cpld_driver = { + .driver = { + .name = "as7312_54x_cpld", + .owner = THIS_MODULE, + }, + .probe = as7312_54x_cpld_probe, + .remove = as7312_54x_cpld_remove, + .id_table = as7312_54x_cpld_id, +}; + +static int __init as7312_54x_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as7312_54x_cpld_driver); +} + +static void __exit as7312_54x_cpld_exit(void) +{ + i2c_del_driver(&as7312_54x_cpld_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("Accton I2C CPLD driver"); +MODULE_LICENSE("GPL"); + +module_init(as7312_54x_cpld_init); +module_exit(as7312_54x_cpld_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/ym2651y.c new file mode 120000 index 00000000000..f4d67640ccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/ym2651y.c @@ -0,0 +1 @@ +../../common/modules/ym2651y.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/service/as7312-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/service/as7312-platform-monitor.service new file mode 100755 index 00000000000..b79357665be --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/service/as7312-platform-monitor.service @@ -0,0 +1,17 @@ +[Unit] +Description=Accton AS7312-54X Platform Monitoring service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/accton_as7312_util.py install +ExecStart=/usr/local/bin/accton_as7312_monitor.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/setup.py new file mode 100755 index 00000000000..5e862ce1504 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as7312_54x', + version='1.0', + description='Module to initialize Accton AS7312-54X platforms', + + packages=['as7312_54x'], + package_dir={'as7312_54x': 'as7312-54x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/utils/README b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/utils/README new file mode 100755 index 00000000000..66f31a03042 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/utils/README @@ -0,0 +1,117 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +Contents of this package: + patch - files under patch/ is for kernel and ONIE installer + for the kernel: + config-accton-as7312_54x.patch + for kernel configuration. + driver-i2c-muxes-pca954x-always-deselect.patch + for i2c_mux deselects after transaction. + driver-patches-for-accton-as7312-fan-psu-cpld.patch + for as7312's fan/psu/cpld/led/sfp drivers. + for ONIE: + onie_installer-accton-AS7312-54X.patch + for console port setting and copy util script o rootfs. + module - Contains source code of as7312 kernel driver modules. + +The late Sonic building scripts, pushed @Dec 5 2016, will automatically +create a docker container and run building process under it. +User is not necessary to handle docker environment creation. + +1. Download sonic-buildimage environment. + - Run "git clone https://github.com/Azure/sonic-buildimage". + - cd to sonic-buildimage and run "git submodule update --init --recursive". +2. Build kernel + - cd ./src/sonic-linux-kernel + - Copy patches and series from patch/kernel of this release to + sonic-linux-kernel/patch. + - Build kernel by "make". + - The built kernel package, linux-image-3.16.0-5-amd64_3.16.51-3+deb8u1_amd64.deb + , is generated. +3. Build installer + - Change directory back to sonic-buildimage/. + - Get onie_installer-accton-AS7312-54X.patch" from patch/installer. + - Change setting for AS7312-54X by patching build_image.sh. + "patch -p1 < onie_installer-accton-AS7312-54X.patch" + !!NOTICE, patching onie_installer-accton-AS7312-54X.patch comments out the + "git status" checking at build_image.sh. + - The account and password of installed OS can be given at rules/config. + The default user and password are "admin" & "YourPaSsWoRd" respectively. + - Run "make configure PLATFORM=broadcom" + - Copy the built kernel debian package to target/debs/. + The file is linux-image-3.16.0-5-amd64_*_amd64.deb under directory + src/sonic-linux-kernel/. + - Run "make target/sonic-generic.bin" + - Get the installer, target/sonic-generic.bin, to target machine and install. + +All Linux kernel code is licensed under the GPLv1. All other code is +licensed under the GPLv3. Please see the LICENSE file for copies of +both licenses. + +The code for integacting with Accton AS7312-54X has 2 parts, +kernel drivers and operational script. +The kernel drivers of peripherals are under module/ directory. +1. These drivers are patched into kernel by + driver-patches-for-accton-as7312-fan-psu-cpld.patch + Or you can build the driver under module/ by setting environment variable, + KERNEL_SRC, to proper linux built directory and run make. + It may be sonic-linux-kernel/linux-3.*/debian/build/build_amd64_none_amd64/. +2. A operational script, accton_as7312_util.py, for device initializatian and + peripheral accessing should be installed at /usr/bin. + This script is generated by onie_installer-accton-AS7312-54X.patch. + It's done by patching onie_installer-accton-AS7312-54X.patch at build-image. + Run "accton_as7312_util.py install" to install drivers. + +To initialize the system, run "accton_as7312_util.py install". +To clean up the drivers & devices, run "accton_as7312_util.py clean". +To dump information of sensors, run "accton_as7312_util.py show". +To dump SFP EEPROM, run "accton_as7312_util.py sff". +To set fan speed, run "accton_as7312_util.py set fan". +To enable/disable SFP emission, run "accton_as7312_util.py set sfp". +To set system LEDs' color, run "accton_as7312_util.py set led" +For more information, run "accton_as7312_util.py --help". + +==================================================================== +Besides applying accton_as7312_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +System LED: + There are 5 system LEDs at the lower-left corner of front panel. + They are loc, diag, fan, ps1, and ps2. + The sysfs interface color mappings are as follows: + Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + But not all colors are available for each LED. + +Fan Control: + There are 10 fans inside 5 fan modules. + All fans share 1 duty setting, ranged from 0~100. + +Thermal sensers: + 3 temperature sensors are controlled by the lm75 kernel modules. + +PSUs: + There 2 power supplies slot at the left/right side of the back. + Once if a PSU is not plugged, the status of it is shown failed. + +There are 48 SFP+ and 6 QSFP modules are equipped. +Before operating on PSU and QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/utils/accton_as7312_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/utils/accton_as7312_monitor.py new file mode 100755 index 00000000000..19d7470515f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/utils/accton_as7312_monitor.py @@ -0,0 +1,218 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# 2/27/2018: Roy Lee modify for as7312_54x +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import types + import time # this is only being used as part of the example + import traceback + import signal + from tabulate import tabulate + from as7312_54x.fanutil import FanUtil + from as7312_54x.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = 'accton_as7312_monitor' +DUTY_MAX = 100 + +global log_file +global log_level + +# (LM75_1+ LM75_2+ LM75_3) is LM75 at i2c addresses 0x48, 0x49, and 0x4A. +# TMP = (LM75_1+ LM75_2+ LM75_3)/3 +#1. If TMP < 35, All fans run with duty 31.25%. +#2. If TMP>=35 or the temperature of any one of fan is higher than 40, +# All fans run with duty 50% +#3. If TMP >= 40 or the temperature of any one of fan is higher than 45, +# All fans run with duty 62.5%. +#4. If TMP >= 45 or the temperature of any one of fan is higher than 50, +# All fans run with duty 100%. +#5. Any one of 6 fans is fault, set duty = 100%. +#6. Direction factor. If it is B2F direction, duty + 12%. + + # MISC: + # 1.Check single LM75 before applied average. + # 2.If no matched fan speed is found from the policy, + # use FAN_DUTY_CYCLE_MIN as default speed + # Get current temperature + # 4.Decision 3: Decide new fan speed depend on fan direction/current fan speed/temperature + + + + +# Make a class we can use to capture stdout and sterr in the log +class accton_as7312_monitor(object): + # static temp var + _ori_temp = 0 + _new_perc = 0 + _ori_perc = 0 + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_fans(self): + max_duty = DUTY_MAX + fan_policy_f2b = { + 0: [32, 0, 105000], + 1: [50, 105000, 120000], + 2: [63, 120000, 135000], + 3: [max_duty, 135000, sys.maxsize], + } + fan_policy_b2f = { + 0: [44, 0, 105000], + 1: [63, 105000, 120000], + 2: [75, 120000, 135000], + 3: [max_duty, 135000, sys.maxsize], + } + fan_policy_single = { + 0: 40000, + 1: 45000, + 2: 50000, + } + + thermal = ThermalUtil() + fan = FanUtil() + for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): + fan_status = fan.get_fan_status(x) + if fan_status is None: + logging.debug('INFO. SET new_perc to %d (FAN stauts is None. fan_num:%d)', max_duty, x) + return False + if fan_status is False: + logging.debug('INFO. SET new_perc to %d (FAN fault. fan_num:%d)', max_duty, x) + fan.set_fan_duty_cycle(max_duty) + return True + #logging.debug('INFO. fan_status is True (fan_num:%d)', x) + + fan_dir=fan.get_fan_dir(1) + if fan_dir == 1: + fan_policy = fan_policy_f2b + else: + fan_policy = fan_policy_b2f + + #Decide fan duty by if any of sensors > fan_policy_single. + new_duty_cycle = fan_policy[0][0] + for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): + single_thm = thermal._get_thermal_node_val(x) + for y in range(0, len(fan_policy_single)): + if single_thm > fan_policy_single[y]: + if fan_policy[y+1][0] > new_duty_cycle: + new_duty_cycle = fan_policy[y+1][0] + logging.debug('INFO. Single thermal sensor %d with temp %d > %d , new_duty_cycle=%d', + x, single_thm, fan_policy_single[y], new_duty_cycle) + single_result = new_duty_cycle + + + #Find if current duty matched any of define duty. + #If not, set it to highest one. + cur_duty_cycle = fan.get_fan_duty_cycle() + for x in range(0, len(fan_policy)): + if cur_duty_cycle == fan_policy[x][0]: + break + if x == len(fan_policy) : + fan.set_fan_duty_cycle(fan_policy[0][0]) + cur_duty_cycle = max_duty + + #Decide fan duty by if sum of sensors falls into any of fan_policy{} + get_temp = thermal.get_thermal_temp() + new_duty_cycle = cur_duty_cycle + for x in range(0, len(fan_policy)): + y = len(fan_policy) - x -1 #checked from highest + if get_temp > fan_policy[y][1] and get_temp < fan_policy[y][2] : + new_duty_cycle= fan_policy[y][0] + logging.debug('INFO. Sum of temp %d > %d , new_duty_cycle=%d', get_temp, fan_policy[y][1], new_duty_cycle) + + sum_result = new_duty_cycle + if (sum_result>single_result): + new_duty_cycle = sum_result; + else: + new_duty_cycle = single_result + + logging.debug('INFO. Final duty_cycle=%d', new_duty_cycle) + if(new_duty_cycle != cur_duty_cycle): + fan.set_fan_duty_cycle(new_duty_cycle) + return True + +def handler(signum, frame): + fan = FanUtil() + logging.debug('INFO:Cause signal %d, set fan speed max.', signum) + fan.set_fan_duty_cycle(DUTY_MAX) + sys.exit(0) + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + signal.signal(signal.SIGINT, handler) + signal.signal(signal.SIGTERM, handler) + monitor = accton_as7312_monitor(log_file, log_level) + + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(10) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/utils/accton_as7312_util.py b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/utils/accton_as7312_util.py new file mode 100755 index 00000000000..b8107c47afe --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/utils/accton_as7312_util.py @@ -0,0 +1,588 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + + + + +PROJECT_NAME = 'as7312_54x' +version = '0.1.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan':6,'thermal':4, 'psu':2, 'sfp':54} +FORCE = 0 +#logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +#logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-54 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-54 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ROY]"+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_check(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + return True + + + +kos = [ +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe accton_i2c_cpld' , +'modprobe ym2651y' , +'modprobe accton_as7312_54x_fan' , +'modprobe optoe' , +'modprobe accton_as7312_54x_leds' , +'modprobe accton_as7312_54x_psu' ] + +def driver_install(): + global FORCE + status, output = log_os_system("depmod", 1) + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + lst = rm.split(" ") + if len(lst) > 3: + del(lst[3]) + rm = " ".join(lst) + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +led_prefix ='/sys/class/leds/accton_'+PROJECT_NAME+'_led::' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2']} +hwmon_nodes = {'led': ['brightness'] } +hwmon_prefix ={'led': led_prefix} + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'fan': ['2-0066'] , + 'thermal': ['3-0048','3-0049', '3-004a', '3-004b'] , + 'psu': ['10-0051','11-0053'], + 'sfp': ['-0050']} +i2c_nodes = {'fan': ['present', 'front_speed_rpm', 'rear_speed_rpm'] , + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['sfp_is_present', 'sfp_tx_disable']} + +sfp_map = [18,19,20,21,22,23,24,25,26,27, + 28,29,30,31,32,33,34,35,36,37, + 38,39,40,41,42,43,44,45,46,47, + 48,49,50,51,52,53,54,55,56,57, + 58,59,60,61,62,63,64,65,66,67, + 68,69,70,71] + +qsfp_start = 48 + +mknod =[ +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-0/new_device' , +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-1/new_device' , +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-1/new_device' , +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-1/new_device', + +'echo as7312_54x_fan 0x66 > /sys/bus/i2c/devices/i2c-2/new_device ', +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-3/new_device', +'echo as7312_54x_psu1 0x53 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo ym2651 0x5b > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as7312_54x_psu2 0x50 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo ym2651 0x58 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo as7312_54x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-4/new_device', +'echo as7312_54x_cpld2 0x62 > /sys/bus/i2c/devices/i2c-5/new_device', +'echo as7312_54x_cpld3 0x64 > /sys/bus/i2c/devices/i2c-6/new_device'] + +mknod2 =[ +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-1/new_device' , +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-0/new_device' , +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-0/new_device' , +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-0/new_device', + +'echo as7312_54x_fan 0x66 > /sys/bus/i2c/devices/i2c-2/new_device ', +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-3/new_device', +'echo as7312_54x_psu1 0x53 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo ym2651 0x5b > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as7312_54x_psu2 0x50 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo ym2651 0x58 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo as7312_54x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-4/new_device', +'echo as7312_54x_cpld2 0x62 > /sys/bus/i2c/devices/i2c-5/new_device', +'echo as7312_54x_cpld3 0x64 > /sys/bus/i2c/devices/i2c-6/new_device'] + + + +def i2c_order_check(): + # i2c bus 0 and 1 might be installed in different order. + # Here check if 0x70 is exist @ i2c-1 + tmp = "echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device" + status, output = log_os_system(tmp, 0) + if not device_exist(): + order = 1 + else: + order = 0 + tmp = "echo 0x70 > /sys/bus/i2c/devices/i2c-1/delete_device" + status, output = log_os_system(tmp, 0) + return order + +def device_install(): + global FORCE + + order = i2c_order_check() + + # if 0x70 is not exist @i2c-1, use reversed bus order + if order: + for i in range(0,len(mknod2)): + #for pca954x need times to built new i2c buses + if mknod2[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod2[i], 1) + if status: + print output + if FORCE == 0: + return status + else: + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + for i in range(0,len(sfp_map)): + if i < qsfp_start: + status, output =log_os_system("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + else: + status, output =log_os_system("echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/1-0076", 0) + if status==0: + I2C_ORDER=1 + else: + I2C_ORDER=0 + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + if I2C_ORDER==0: + nodelist = mknod + else: + nodelist = mknod2 + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_check() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_check() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_check()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'sfp_eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan'] ['fan1'][0] + node = node.replace(node.split("/")[-1], 'fan_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0070", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/classes/fanutil.py new file mode 100755 index 00000000000..18802c80363 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/classes/fanutil.py @@ -0,0 +1,256 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# 2/27/2018: Roy Lee modify for as7312_54x +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_NUM_ON_MAIN_BROAD = 6 + FAN_NUM_1_IDX = 1 + FAN_NUM_2_IDX = 2 + FAN_NUM_3_IDX = 3 + FAN_NUM_4_IDX = 4 + FAN_NUM_5_IDX = 5 + FAN_NUM_6_IDX = 6 + + FAN_NODE_NUM_OF_MAP = 2 + FAN_NODE_FAULT_IDX_OF_MAP = 1 + #FAN_NODE_SPEED_IDX_OF_MAP = 2 + FAN_NODE_DIR_IDX_OF_MAP = 2 + #FAN_NODE_DUTY_IDX_OF_MAP = 4 + #FANR_NODE_FAULT_IDX_OF_MAP = 5 + + #BASE_VAL_PATH = '/sys/devices/platform/as5712_54x_fan/{0}' + BASE_VAL_PATH = '/sys/bus/i2c/devices/2-0066/{0}' + FAN_DUTY_PATH = '/sys/bus/i2c/devices/2-0066/fan_duty_cycle_percentage' + + #logfile = '' + #loglevel = logging.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + + _fan_to_device_path_mapping = {} + logger = logging.getLogger(__name__) + +#fan1_direction +#fan1_fault +#fan1_present + + #(FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage', + _fan_to_device_node_mapping = { + (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault', + (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction', + (FAN_NUM_2_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan2_fault', + (FAN_NUM_2_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan2_direction', + + (FAN_NUM_3_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan3_fault', + (FAN_NUM_3_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan3_direction', + + (FAN_NUM_4_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan4_fault', + (FAN_NUM_4_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan4_direction', + + (FAN_NUM_5_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan5_fault', + (FAN_NUM_5_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan5_direction', + + (FAN_NUM_6_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan6_fault', + (FAN_NUM_6_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan6_direction', + } + + def _get_fan_to_device_node(self, fan_num, node_num): + return self._fan_to_device_node_mapping[(fan_num, node_num)] + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + self.logger.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + self.logger.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + + try: + val_file = open(device_path, 'r') + except IOError as e: + self.logger.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + self.logger.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + self.logger.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + self.logger.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + self.logger.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + self.logger.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + self.logger.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + self.logger.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + def __init__(self, log_level=logging.INFO): + ch = logging.StreamHandler() + ch.setLevel(log_level) + self.logger.addHandler(ch) + + fan_path = self.BASE_VAL_PATH + + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_NUM_ON_MAIN_BROAD+1): + for node_num in range(self.FAN_NODE_FAULT_IDX_OF_MAP, self.FAN_NODE_NUM_OF_MAP+1): + self._fan_to_device_path_mapping[(fan_num, node_num)] = fan_path.format( + self._fan_to_device_node_mapping[(fan_num, node_num)]) + + def get_num_fans(self): + return self.FAN_NUM_ON_MAIN_BROAD + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM_OF_MAP + + def get_idx_node_start(self): + return self.FAN_NODE_FAULT_IDX_OF_MAP + + def get_size_node_map(self): + return len(self._fan_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._fan_to_device_path_mapping) + + def get_fan_to_device_path(self, fan_num, node_num): + return self._fan_to_device_path_mapping[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_FAULT_IDX_OF_MAP) + + #def get_fan_speed(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FAN_NODE_SPEED_IDX_OF_MAP) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DIR_IDX_OF_MAP) + + def get_fan_duty_cycle(self): + #duty_path = self.FAN_DUTY_PATH + try: + val_file = open(self.FAN_DUTY_PATH) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + return int(content) + #self._get_fan_node_val(fan_num, self.FAN_NODE_DUTY_IDX_OF_MAP) +#static u32 reg_val_to_duty_cycle(u8 reg_val) +#{ +# reg_val &= FAN_DUTY_CYCLE_REG_MASK; +# return ((u32)(reg_val+1) * 625 + 75)/ 100; +#} +# + def set_fan_duty_cycle(self, val): + + try: + fan_file = open(self.FAN_DUTY_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + #val = ((val + 1 ) * 625 +75 ) / 100 + fan_file.write(str(val)) + fan_file.close() + return True + + #def get_fanr_fault(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FANR_NODE_FAULT_IDX_OF_MAP) + + def get_fanr_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP) + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + self.logger.debug('GET. Parameter error. fan_num, %d', fan_num) + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + self.logger.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + return True + +#def main(): +# fan = FanUtil() +# +# print 'get_size_node_map : %d' % fan.get_size_node_map() +# print 'get_size_path_map : %d' % fan.get_size_path_map() +# for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): +# for y in range(fan.get_idx_node_start(), fan.get_num_nodes()+1): +# print fan.get_fan_to_device_path(x, y) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/classes/thermalutil.py new file mode 100755 index 00000000000..ddc3521fafa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/classes/thermalutil.py @@ -0,0 +1,128 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018:Jostar modify for as7716_32x +# 2/27/2018: Roy Lee modify for as7312_54x +# ------------------------------------------------------------------ + +try: + import time + import logging + import glob + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + + THERMAL_NUM_ON_MAIN_BROAD = 3 + THERMAL_NUM_1_IDX = 1 # 1_ON_MAIN_BROAD + THERMAL_NUM_2_IDX = 2 # 2_ON_MAIN_BROAD + THERMAL_NUM_3_IDX = 3 # 3_ON_MAIN_BROAD + + BASE_VAL_PATH = '/sys/bus/i2c/devices/{0}-00{1}/hwmon/hwmon*/temp1_input' + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + Value = path to fan device file (string) """ + _thermal_to_device_path_mapping = {} + + _thermal_to_device_node_mapping = { + THERMAL_NUM_1_IDX: ['3', '48'], + THERMAL_NUM_2_IDX: ['3', '49'], + THERMAL_NUM_3_IDX: ['3', '4a'], + } + + logger = logging.getLogger(__name__) + def __init__(self, log_level=logging.INFO): + ch = logging.StreamHandler() + ch.setLevel(log_level) + self.logger.addHandler(ch) + + thermal_path = self.BASE_VAL_PATH + for x in range(self.THERMAL_NUM_1_IDX, self.THERMAL_NUM_ON_MAIN_BROAD+1): + self._thermal_to_device_path_mapping[x] = thermal_path.format( + self._thermal_to_device_node_mapping[x][0], + self._thermal_to_device_node_mapping[x][1]) + + def _get_thermal_node_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_ON_MAIN_BROAD: + self.logger.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_to_device_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + self.logger.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + self.logger.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + self.logger.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + + def get_num_thermals(self): + return self.THERMAL_NUM_ON_MAIN_BROAD + + def get_idx_thermal_start(self): + return self.THERMAL_NUM_1_IDX + + def get_size_node_map(self): + return len(self._thermal_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._thermal_to_device_path_mapping) + + def get_thermal_to_device_path(self, thermal_num): + return self._thermal_to_device_path_mapping[thermal_num] + + def get_thermal_1_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + + def get_thermal_2_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) + def get_thermal_temp(self): + return (self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) +self._get_thermal_node_val(self.THERMAL_NUM_3_IDX)) + +#def main(): +# thermal = ThermalUtil() +# +# print 'get_size_node_map : %d' % thermal.get_size_node_map() +# print 'get_size_path_map : %d' % thermal.get_size_path_map() +# for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): +# print thermal.get_thermal_to_device_path(x) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/Makefile new file mode 100755 index 00000000000..488fdb321ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/Makefile @@ -0,0 +1,17 @@ +ifneq ($(KERNELRELEASE),) +obj-m:= accton_i2c_cpld.o \ + accton_as7312_54x_fan.o accton_as7312_54x_leds.o \ + accton_as7312_54x_psu.o ym2651y.o + +else +ifeq (,$(KERNEL_SRC)) +$(error KERNEL_SRC is not defined) +else +KERNELDIR:=$(KERNEL_SRC) +endif +PWD:=$(shell pwd) +default: + $(MAKE) -C $(KERNELDIR) M=$(PWD) modules +clean: + rm -rf *.o *.mod.o *.mod.o *.ko .*cmd .tmp_versions Module.markers Module.symvers modules.order +endif diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_fan.c new file mode 100755 index 00000000000..8764ec8a317 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_fan.c @@ -0,0 +1,815 @@ +/* + * A hwmon driver for the Accton as7312 54x fan + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as7312_54x_fan" + +#define NUM_THERMAL_SENSORS (3) /* Get sum of this number of sensors.*/ +#define THERMAL_SENSORS_DRIVER "lm75" +#define THERMAL_SENSORS_ADDRS {0x48, 0x49, 0x4a} + +#define IN +#define OUT + +static struct as7312_54x_fan_data *as7312_54x_fan_update_device(struct device *dev); +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_enable(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, char *buf); +extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +/* fan related data, the index should match sysfs_fan_attributes + */ +static const u8 fan_reg[] = { + 0x0F, /* fan 1-6 present status */ + 0x10, /* fan 1-6 direction(0:F2B 1:B2F) */ + 0x11, /* fan PWM(for all fan) */ + 0x12, /* front fan 1 speed(rpm) */ + 0x13, /* front fan 2 speed(rpm) */ + 0x14, /* front fan 3 speed(rpm) */ + 0x15, /* front fan 4 speed(rpm) */ + 0x16, /* front fan 5 speed(rpm) */ + 0x17, /* front fan 6 speed(rpm) */ + 0x22, /* rear fan 1 speed(rpm) */ + 0x23, /* rear fan 2 speed(rpm) */ + 0x24, /* rear fan 3 speed(rpm) */ + 0x25, /* rear fan 4 speed(rpm) */ + 0x26, /* rear fan 5 speed(rpm) */ + 0x27, /* rear fan 6 speed(rpm) */ +}; + +/* Each client has this additional data */ +struct as7312_54x_fan_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ + u8 enable; + int system_temp; /*In unit of mini-Celsius*/ + int sensors_found; +}; + +enum fan_id { + FAN1_ID, + FAN2_ID, + FAN3_ID, + FAN4_ID, + FAN5_ID, + FAN6_ID +}; + +enum sysfs_fan_attributes { + FAN_PRESENT_REG, + FAN_DIRECTION_REG, + FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ + FAN1_FRONT_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN5_FRONT_SPEED_RPM, + FAN6_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN5_REAR_SPEED_RPM, + FAN6_REAR_SPEED_RPM, + FAN1_DIRECTION, + FAN2_DIRECTION, + FAN3_DIRECTION, + FAN4_DIRECTION, + FAN5_DIRECTION, + FAN6_DIRECTION, + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN5_PRESENT, + FAN6_PRESENT, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + FAN5_FAULT, + FAN6_FAULT +}; + +/* Define attributes + */ +#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT);\ + static SENSOR_DEVICE_ATTR(fan##index2##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT) +#define DECLARE_FAN_FAULT_ATTR(index, index2) &sensor_dev_attr_fan##index##_fault.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_fault.dev_attr.attr + +#define DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_direction, S_IRUGO, fan_show_value, NULL, FAN##index##_DIRECTION) +#define DECLARE_FAN_DIRECTION_ATTR(index) &sensor_dev_attr_fan##index##_direction.dev_attr.attr + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE);\ + static SENSOR_DEVICE_ATTR(pwm##index, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE);\ + static SENSOR_DEVICE_ATTR(pwm##index##_enable, S_IWUSR | S_IRUGO, get_enable, set_enable, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan_duty_cycle_percentage.dev_attr.attr, \ + &sensor_dev_attr_pwm##index.dev_attr.attr, \ + &sensor_dev_attr_pwm##index##_enable.dev_attr.attr + +#define DECLARE_FAN_SYSTEM_TEMP_SENSOR_DEV_ATTR() \ + static SENSOR_DEVICE_ATTR(sys_temp, S_IRUGO, get_sys_temp, NULL, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_SYSTEM_TEMP_ATTR() &sensor_dev_attr_sys_temp.dev_attr.attr + + +#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_present, S_IRUGO, fan_show_value, NULL, FAN##index##_PRESENT) +#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr + +#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index2##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM) +#define DECLARE_FAN_SPEED_RPM_ATTR(index, index2) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_input.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_input.dev_attr.attr + +/* 6 fan fault attributes in this platform */ +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(6,16); +/* 6 fan speed(rpm) attributes in this platform */ +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(6,16); +/* 6 fan present attributes in this platform */ +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(5); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(6); +/* 6 fan direction attribute in this platform */ +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(1); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(2); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(3); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(4); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(5); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(6); +/* 1 fan duty cycle attribute in this platform */ +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(1); +/* System temperature for fancontrol */ +DECLARE_FAN_SYSTEM_TEMP_SENSOR_DEV_ATTR(); + +static struct attribute *as7312_54x_fan_attributes[] = { + /* fan related attributes */ + DECLARE_FAN_FAULT_ATTR(1,11), + DECLARE_FAN_FAULT_ATTR(2,12), + DECLARE_FAN_FAULT_ATTR(3,13), + DECLARE_FAN_FAULT_ATTR(4,14), + DECLARE_FAN_FAULT_ATTR(5,15), + DECLARE_FAN_FAULT_ATTR(6,16), + DECLARE_FAN_SPEED_RPM_ATTR(1,11), + DECLARE_FAN_SPEED_RPM_ATTR(2,12), + DECLARE_FAN_SPEED_RPM_ATTR(3,13), + DECLARE_FAN_SPEED_RPM_ATTR(4,14), + DECLARE_FAN_SPEED_RPM_ATTR(5,15), + DECLARE_FAN_SPEED_RPM_ATTR(6,16), + DECLARE_FAN_PRESENT_ATTR(1), + DECLARE_FAN_PRESENT_ATTR(2), + DECLARE_FAN_PRESENT_ATTR(3), + DECLARE_FAN_PRESENT_ATTR(4), + DECLARE_FAN_PRESENT_ATTR(5), + DECLARE_FAN_PRESENT_ATTR(6), + DECLARE_FAN_DIRECTION_ATTR(1), + DECLARE_FAN_DIRECTION_ATTR(2), + DECLARE_FAN_DIRECTION_ATTR(3), + DECLARE_FAN_DIRECTION_ATTR(4), + DECLARE_FAN_DIRECTION_ATTR(5), + DECLARE_FAN_DIRECTION_ATTR(6), + DECLARE_FAN_DUTY_CYCLE_ATTR(1), + DECLARE_FAN_SYSTEM_TEMP_ATTR(), + NULL +}; + +#define FAN_DUTY_CYCLE_REG_MASK 0xF +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 100 + +static int as7312_54x_fan_read_value(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int as7312_54x_fan_write_value(struct i2c_client *client, u8 reg, u8 value) +{ + return i2c_smbus_write_byte_data(client, reg, value); +} + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + reg_val &= FAN_DUTY_CYCLE_REG_MASK; + return ((u32)(reg_val+1) * 625 + 75)/ 100; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + return ((u32)duty_cycle * 100 / 625) - 1; +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static u8 reg_val_to_direction(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 1 : 0; +} +static u8 reg_val_to_is_present(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 0 : 1; +} + +static u8 is_fan_fault(struct as7312_54x_fan_data *data, enum fan_id id) +{ + u8 ret = 1; + int front_fan_index = FAN1_FRONT_SPEED_RPM + id; + int rear_fan_index = FAN1_REAR_SPEED_RPM + id; + + /* Check if the speed of front or rear fan is ZERO, + */ + if (reg_val_to_speed_rpm(data->reg_val[front_fan_index]) && + reg_val_to_speed_rpm(data->reg_val[rear_fan_index])) { + ret = 0; + } + + return ret; +} + +static ssize_t set_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct as7312_54x_fan_data *data = as7312_54x_fan_update_device(dev); + int error, value; + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0 || value > 1) + return -EINVAL; + + data->enable = value; + if (value == 0) + { + return set_duty_cycle(dev, da, buf, FAN_MAX_DUTY_CYCLE); + } + return count; +} + + +static ssize_t get_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as7312_54x_fan_data *data = as7312_54x_fan_update_device(dev); + + return sprintf(buf, "%u\n", data->enable); +} +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + struct i2c_client *client = to_i2c_client(dev); + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0) + return -EINVAL; + + value = (value > FAN_MAX_DUTY_CYCLE)? FAN_MAX_DUTY_CYCLE : value; + + as7312_54x_fan_write_value(client, 0x33, 0); /* Disable fan speed watch dog */ + as7312_54x_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); + return count; +} + +/* Due to this struct is declared at lm75.c, it cannot be include + * under Sonic environment. I duplicate it from lm75.c. + */ +struct lm75_data { + struct i2c_client *client; + struct device *hwmon_dev; + struct thermal_zone_device *tz; + struct mutex update_lock; + u8 orig_conf; + u8 resolution; /* In bits, between 9 and 12 */ + u8 resolution_limits; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + unsigned long sample_time; /* In jiffies */ + s16 temp[3]; /* Register values, + 0 = input + 1 = max + 2 = hyst */ +}; + +/*Copied from lm75.c*/ +static inline long lm75_reg_to_mc(s16 temp, u8 resolution) +{ + return ((temp >> (16 - resolution)) * 1000) >> (resolution - 8); +} + +/*Get hwmon_dev from i2c_client, set hwmon_dev = NULL is failed.*/ +static struct device * get_hwmon_dev( + struct i2c_client *client) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + if(data) + { + if( data->valid == 1 && data->hwmon_dev) + { + return data->hwmon_dev; + } + + } + return NULL; +} + +/* To find hwmon index by opening hwmon under that i2c address. + */ +static int find_hwmon_index_by_FileOpen( + int bus_nr, + unsigned short addr, + OUT int *index) +{ +#define MAX_HWMON_DEVICE (10) /* Find hwmon device in 0~10*/ + struct file *sfd; + char client_name[96]; + int i=0; + + do { + snprintf(client_name, sizeof(client_name), + "/sys/bus/i2c/devices/%d-%04x/hwmon/hwmon%d/temp1_input", + bus_nr, addr, i); + + sfd = filp_open(client_name, O_RDONLY, 0); + i++; + } while( IS_ERR(sfd) && i < MAX_HWMON_DEVICE); + + if (IS_ERR(sfd)) { + pr_err("Failed to open file(%s)#%d\r\n", client_name, __LINE__); + return -ENOENT; + } + filp_close(sfd, 0); + *index = i - 1; + return 0; + +#undef MAX_HWMON_DEVICE +} + +static int get_temp_file_path( + int bus_nr, unsigned short addr, + struct device *hwmon_dev + ,char *path, int max_len) +{ + + if(hwmon_dev && strlen(dev_name(hwmon_dev))) + { + snprintf(path, max_len, + "/sys/bus/i2c/devices/%d-%04x/hwmon/%s/temp1_input", + bus_nr, addr, dev_name(hwmon_dev)); + } + else + { + int i=0; + if(find_hwmon_index_by_FileOpen( bus_nr, addr, &i)) + { + return -EIO; + } + snprintf(path, max_len, + "/sys/bus/i2c/devices/%d-%04x/hwmon/hwmon%d/temp1_input", + bus_nr, addr, i); + } + return 0; +} + +/*File read the dev file at user space.*/ +static int read_devfile_temp1_input( + struct device *dev, + int bus_nr, + unsigned short addr, + struct device *hwmon_dev, + int *miniCelsius) +{ + struct file *sfd; + char buffer[96]; + char devfile[96]; + int rc, status; + int rdlen, value; + mm_segment_t old_fs; + + rc = 0; + get_temp_file_path(bus_nr, addr, hwmon_dev, devfile, sizeof(devfile)); + sfd = filp_open(devfile, O_RDONLY, 0); + if (IS_ERR(sfd)) { + pr_err("Failed to open file(%s)#%d\r\n", devfile, __LINE__); + return -ENOENT; + } + dev_dbg(dev, "Found device:%s\n",devfile); + + if(!(sfd->f_op) || !(sfd->f_op->read) ) { + pr_err("file %s cann't readable ?\n",devfile); + return -ENOENT; + } + + old_fs = get_fs(); + set_fs(KERNEL_DS); + rdlen = sfd->f_op->read(sfd, buffer, sizeof(buffer), &sfd->f_pos); + if (rdlen == 0) { + pr_err( "File(%s) empty!\n", devfile); + rc = -EIO; + goto exit; + } + status = sscanf(buffer, "%d", &value); + if (status != 1) { + rc = -EIO; + goto exit; + } + *miniCelsius = value; + dev_dbg(dev,"found sensors: %d @i2c %d-%04x\n", value, bus_nr, addr); + +exit: + set_fs(old_fs); + filp_close(sfd, 0); + return rc; +} + +static u8 is_lm75_data_due(struct i2c_client *client) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + if (time_after(jiffies, data->last_updated + data->sample_time)) + { + return 1; + } + return 0; +} +static int get_lm75_temp(struct i2c_client *client, int *miniCelsius) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + *miniCelsius = lm75_reg_to_mc(data->temp[0], data->resolution); + + return 0; +} + +static bool lm75_addr_mached(unsigned short addr) +{ + int i; + unsigned short addrs[] = THERMAL_SENSORS_ADDRS; + + for (i = 0; i < ARRAY_SIZE(addrs); i++) + { + if( addr == addrs[i]) + return 1; + } + return 0; +} + +static int _find_lm75_device(struct device *dev, void *data) +{ + struct device_driver *driver; + struct as7312_54x_fan_data *prv = data; + char *driver_name = THERMAL_SENSORS_DRIVER; + + driver = dev->driver; + if (driver && driver->name && + strcmp(driver->name, driver_name) == 0) + { + struct i2c_client *client; + client = to_i2c_client(dev); + if (client) + { + /*cannot use "struct i2c_adapter *adap = to_i2c_adapter(dev);"*/ + struct i2c_adapter *adap = client->adapter; + int miniCelsius = 0; + + if (! lm75_addr_mached(client->addr)) + { + return 0; + } + + if (!adap) { + return -ENXIO; + } + + /* If the data is not updated, read them from devfile + to drive them updateing data from chip.*/ + if (is_lm75_data_due(client)) + { + struct device *hwmon_dev; + + hwmon_dev = get_hwmon_dev(client); + if(0 == read_devfile_temp1_input(dev, adap->nr, + client->addr, hwmon_dev, &miniCelsius)) + { + prv->system_temp += miniCelsius; + prv->sensors_found++; + } + + } + else + { + get_lm75_temp(client, &miniCelsius); + prv->system_temp += miniCelsius; + prv->sensors_found++; + + } + } + } + return 0; +} + +/*Find all lm75 devices and return sum of temperatures.*/ +static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + ssize_t ret = 0; + struct as7312_54x_fan_data *data = as7312_54x_fan_update_device(dev); + + data->system_temp=0; + data->sensors_found=0; + i2c_for_each_dev(data, _find_lm75_device); + if (NUM_THERMAL_SENSORS != data->sensors_found) + { + dev_dbg(dev,"only %d of %d temps are found\n", + data->sensors_found, NUM_THERMAL_SENSORS); + data->system_temp = INT_MAX; + } + ret = sprintf(buf, "%d\n",data->system_temp); + return ret; +} + +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7312_54x_fan_data *data = as7312_54x_fan_update_device(dev); + ssize_t ret = 0; + + if (data->valid) { + switch (attr->index) { + case FAN_DUTY_CYCLE_PERCENTAGE: + { + u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); + ret = sprintf(buf, "%u\n", duty_cycle); + break; + } + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN5_FRONT_SPEED_RPM: + case FAN6_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: + case FAN6_REAR_SPEED_RPM: + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index])); + break; + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + case FAN6_PRESENT: + ret = sprintf(buf, "%d\n", + reg_val_to_is_present(data->reg_val[FAN_PRESENT_REG], + attr->index - FAN1_PRESENT)); + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + case FAN6_FAULT: + ret = sprintf(buf, "%d\n", is_fan_fault(data, attr->index - FAN1_FAULT)); + break; + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + case FAN5_DIRECTION: + case FAN6_DIRECTION: + ret = sprintf(buf, "%d\n", + reg_val_to_direction(data->reg_val[FAN_DIRECTION_REG], + attr->index - FAN1_DIRECTION)); + break; + default: + break; + } + } + + return ret; +} + +static const struct attribute_group as7312_54x_fan_group = { + .attrs = as7312_54x_fan_attributes, +}; + +static struct as7312_54x_fan_data *as7312_54x_fan_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_fan_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + dev_dbg(&client->dev, "Starting as7312_54x_fan update\n"); + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { + int status = as7312_54x_fan_read_value(client, fan_reg[i]); + + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + dev_dbg(&client->dev, "reg %d, err %d\n", fan_reg[i], status); + return data; + } + else { + data->reg_val[i] = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int as7312_54x_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7312_54x_fan_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7312_54x_fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->enable = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7312_54x_fan_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7312_54x_fan_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7312_54x_fan_remove(struct i2c_client *client) +{ + struct as7312_54x_fan_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7312_54x_fan_group); + + return 0; +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x66, I2C_CLIENT_END }; + +static const struct i2c_device_id as7312_54x_fan_id[] = { + { "as7312_54x_fan", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7312_54x_fan_id); + +static struct i2c_driver as7312_54x_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = as7312_54x_fan_probe, + .remove = as7312_54x_fan_remove, + .id_table = as7312_54x_fan_id, + .address_list = normal_i2c, +}; + +static int __init as7312_54x_fan_init(void) +{ + return i2c_add_driver(&as7312_54x_fan_driver); +} + +static void __exit as7312_54x_fan_exit(void) +{ + i2c_del_driver(&as7312_54x_fan_driver); +} + +module_init(as7312_54x_fan_init); +module_exit(as7312_54x_fan_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7312_54x_fan driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_leds.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_leds.c new file mode 100644 index 00000000000..1d54517c624 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_leds.c @@ -0,0 +1,438 @@ +/* + * A LED driver for the accton_as7312_54x_led + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +extern int as7312_54x_cpld_read (unsigned short cpld_addr, u8 reg); +extern int as7312_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern void led_classdev_unregister(struct led_classdev *led_cdev); +extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); +extern void led_classdev_resume(struct led_classdev *led_cdev); +extern void led_classdev_suspend(struct led_classdev *led_cdev); + +#define DRVNAME "accton_as7312_54x_led" + +struct accton_as7312_54x_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[1]; /* only 1 register*/ +}; + +static struct accton_as7312_54x_led_data *ledctl = NULL; + +/* LED related data + */ + +#define LED_CNTRLER_I2C_ADDRESS (0x60) + +#define LED_TYPE_DIAG_REG_MASK (0x3) +#define LED_MODE_DIAG_GREEN_VALUE (0x02) +#define LED_MODE_DIAG_RED_VALUE (0x01) +#define LED_MODE_DIAG_AMBER_VALUE (0x00) /*It's yellow actually. Green+Red=Yellow*/ +#define LED_MODE_DIAG_OFF_VALUE (0x03) + + +#define LED_TYPE_LOC_REG_MASK (0x80) +#define LED_MODE_LOC_ON_VALUE (0) +#define LED_MODE_LOC_OFF_VALUE (0x80) + +enum led_type { + LED_TYPE_DIAG, + LED_TYPE_LOC, + LED_TYPE_FAN, + LED_TYPE_PSU1, + LED_TYPE_PSU2 +}; + +struct led_reg { + u32 types; + u8 reg_addr; +}; + +static const struct led_reg led_reg_map[] = { + {(1<update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as7312_54x_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = accton_as7312_54x_led_read_value(led_reg_map[i].reg_addr); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg_map[i].reg_addr, status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as7312_54x_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + enum led_type type) +{ + int reg_val; + u8 reg ; + mutex_lock(&ledctl->update_lock); + + if( !accton_getLedReg(type, ®)) + { + dev_dbg(&ledctl->pdev->dev, "Not match item for %d.\n", type); + } + + reg_val = accton_as7312_54x_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + accton_as7312_54x_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + + +static void accton_as7312_54x_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as7312_54x_led_set(led_cdev, led_light_mode, LED_TYPE_DIAG); +} + +static enum led_brightness accton_as7312_54x_led_diag_get(struct led_classdev *cdev) +{ + accton_as7312_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void accton_as7312_54x_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as7312_54x_led_set(led_cdev, led_light_mode, LED_TYPE_LOC); +} + +static enum led_brightness accton_as7312_54x_led_loc_get(struct led_classdev *cdev) +{ + accton_as7312_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static void accton_as7312_54x_led_auto_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ +} + +static enum led_brightness accton_as7312_54x_led_auto_get(struct led_classdev *cdev) +{ + return LED_MODE_AUTO; +} + +static struct led_classdev accton_as7312_54x_leds[] = { + [LED_TYPE_DIAG] = { + .name = "accton_as7312_54x_led::diag", + .default_trigger = "unused", + .brightness_set = accton_as7312_54x_led_diag_set, + .brightness_get = accton_as7312_54x_led_diag_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_RED, + }, + [LED_TYPE_LOC] = { + .name = "accton_as7312_54x_led::loc", + .default_trigger = "unused", + .brightness_set = accton_as7312_54x_led_loc_set, + .brightness_get = accton_as7312_54x_led_loc_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_BLUE, + }, + [LED_TYPE_FAN] = { + .name = "accton_as7312_54x_led::fan", + .default_trigger = "unused", + .brightness_set = accton_as7312_54x_led_auto_set, + .brightness_get = accton_as7312_54x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU1] = { + .name = "accton_as7312_54x_led::psu1", + .default_trigger = "unused", + .brightness_set = accton_as7312_54x_led_auto_set, + .brightness_get = accton_as7312_54x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "accton_as7312_54x_led::psu2", + .default_trigger = "unused", + .brightness_set = accton_as7312_54x_led_auto_set, + .brightness_get = accton_as7312_54x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, +}; + +static int accton_as7312_54x_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as7312_54x_leds); i++) { + led_classdev_suspend(&accton_as7312_54x_leds[i]); + } + + return 0; +} + +static int accton_as7312_54x_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as7312_54x_leds); i++) { + led_classdev_resume(&accton_as7312_54x_leds[i]); + } + + return 0; +} + +static int accton_as7312_54x_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(accton_as7312_54x_leds); i++) { + ret = led_classdev_register(&pdev->dev, &accton_as7312_54x_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(accton_as7312_54x_leds)) { + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&accton_as7312_54x_leds[i]); + } + } + + return ret; +} + +static int accton_as7312_54x_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(accton_as7312_54x_leds); i++) { + led_classdev_unregister(&accton_as7312_54x_leds[i]); + } + + return 0; +} + +static struct platform_driver accton_as7312_54x_led_driver = { + .probe = accton_as7312_54x_led_probe, + .remove = accton_as7312_54x_led_remove, + .suspend = accton_as7312_54x_led_suspend, + .resume = accton_as7312_54x_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as7312_54x_led_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as7312_54x_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct accton_as7312_54x_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as7312_54x_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&accton_as7312_54x_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as7312_54x_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&accton_as7312_54x_led_driver); + kfree(ledctl); +} + +module_init(accton_as7312_54x_led_init); +module_exit(accton_as7312_54x_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as7312_54x_led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_psu.c new file mode 100644 index 00000000000..4646224ef90 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_psu.c @@ -0,0 +1,277 @@ +/* + * An hwmon driver for accton as7312_54x Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); +static int as7312_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as7312_54x_cpld_read(unsigned short cpld_addr, u8 reg); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x50, 0x53, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as7312_54x_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[9]; /* Model name, read from eeprom */ +}; + +static struct as7312_54x_psu_data *as7312_54x_psu_update_device(struct device *dev); + +enum as7312_54x_psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_model_name,NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); + +static struct attribute *as7312_54x_psu_attributes[] = { + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + NULL +}; + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7312_54x_psu_data *data = as7312_54x_psu_update_device(dev); + u8 status = 0; + + if (attr->index == PSU_PRESENT) { + status = !(data->status >> (1-data->index) & 0x1); + } + else { /* PSU_POWER_GOOD */ + status = (data->status >> (3-data->index) & 0x1); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as7312_54x_psu_data *data = as7312_54x_psu_update_device(dev); + + return sprintf(buf, "%s\n", data->model_name); +} + +static const struct attribute_group as7312_54x_psu_group = { + .attrs = as7312_54x_psu_attributes, +}; + +static int as7312_54x_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7312_54x_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7312_54x_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7312_54x_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7312_54x_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7312_54x_psu_remove(struct i2c_client *client) +{ + struct as7312_54x_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7312_54x_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as7312_54x_psu1, + as7312_54x_psu2 +}; + +static const struct i2c_device_id as7312_54x_psu_id[] = { + { "as7312_54x_psu1", as7312_54x_psu1 }, + { "as7312_54x_psu2", as7312_54x_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7312_54x_psu_id); + +static struct i2c_driver as7312_54x_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7312_54x_psu", + }, + .probe = as7312_54x_psu_probe, + .remove = as7312_54x_psu_remove, + .id_table = as7312_54x_psu_id, + .address_list = normal_i2c, +}; + +static int as7312_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = 0; + int retry_count = 5; + + while (retry_count) { + retry_count--; + + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) { + msleep(10); + continue; + } + + if (unlikely(result != data_len)) { + result = -EIO; + msleep(10); + continue; + } + + result = 0; + break; + } + + return result; +} + +static struct as7312_54x_psu_data *as7312_54x_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status; + int power_good = 0; + + dev_dbg(&client->dev, "Starting as7312_54x update\n"); + + /* Read psu status */ + status = as7312_54x_cpld_read(0x60, 0x2); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg 0x60 err %d\n", status); + } + else { + data->status = status; + } + + /* Read model name */ + memset(data->model_name, 0, sizeof(data->model_name)); + power_good = (data->status >> (3-data->index) & 0x1); + + if (power_good) { + status = as7312_54x_psu_read_block(client, 0x20, data->model_name, + ARRAY_SIZE(data->model_name)-1); + + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x)\n", client->addr); + } + else { + data->model_name[ARRAY_SIZE(data->model_name)-1] = '\0'; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(as7312_54x_psu_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7312_54x_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_sfp.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_sfp.c new file mode 100644 index 00000000000..921d9f892ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_sfp.c @@ -0,0 +1,1972 @@ +/* + * SFP driver for accton as7312_54x sfp + * + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "as7312_54x_sfp" /* Platform dependent */ + +#define DEBUG_MODE 0 + +#if (DEBUG_MODE == 1) +#define DEBUG_PRINT(fmt, args...) \ + printk (KERN_INFO "%s:%s[%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define NUM_OF_PORT 54 +#define SFP_PORT_MAX 48 +#define EEPROM_NAME "sfp_eeprom" +#define EEPROM_SIZE 256 /* 256 byte eeprom */ +#define BIT_INDEX(i) (1ULL << (i)) +#define USE_I2C_BLOCK_READ 1 /* Platform dependent */ +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +#define SFP_EEPROM_A0_I2C_ADDR (0xA0 >> 1) + +#define SFF8024_PHYSICAL_DEVICE_ID_ADDR 0x0 +#define SFF8024_DEVICE_ID_SFP 0x3 +#define SFF8024_DEVICE_ID_QSFP 0xC +#define SFF8024_DEVICE_ID_QSFP_PLUS 0xD +#define SFF8024_DEVICE_ID_QSFP28 0x11 + +#define SFF8472_DIAG_MON_TYPE_ADDR 92 +#define SFF8472_DIAG_MON_TYPE_DDM_MASK 0x40 +#define SFF8436_RX_LOS_ADDR 3 +#define SFF8436_TX_FAULT_ADDR 4 +#define SFF8436_TX_DISABLE_ADDR 86 + +#define MULTIPAGE_SUPPORT 1 + +#if (MULTIPAGE_SUPPORT == 1) +/* fundamental unit of addressing for SFF_8472/SFF_8436 */ +#define SFF_8436_PAGE_SIZE 128 +/* + * The current 8436 (QSFP) spec provides for only 4 supported + * pages (pages 0-3). + * This driver is prepared to support more, but needs a register in the + * EEPROM to indicate how many pages are supported before it is safe + * to implement more pages in the driver. + */ +#define SFF_8436_SPECED_PAGES 4 +#define SFF_8436_EEPROM_SIZE ((1 + SFF_8436_SPECED_PAGES) * SFF_8436_PAGE_SIZE) +#define SFF_8436_EEPROM_UNPAGED_SIZE (2 * SFF_8436_PAGE_SIZE) +/* + * The current 8472 (SFP) spec provides for only 3 supported + * pages (pages 0-2). + * This driver is prepared to support more, but needs a register in the + * EEPROM to indicate how many pages are supported before it is safe + * to implement more pages in the driver. + */ +#define SFF_8472_SPECED_PAGES 3 +#define SFF_8472_EEPROM_SIZE ((3 + SFF_8472_SPECED_PAGES) * SFF_8436_PAGE_SIZE) +#define SFF_8472_EEPROM_UNPAGED_SIZE (4 * SFF_8436_PAGE_SIZE) + +/* a few constants to find our way around the EEPROM */ +#define SFF_8436_PAGE_SELECT_REG 0x7F +#define SFF_8436_PAGEABLE_REG 0x02 +#define SFF_8436_NOT_PAGEABLE (1<<2) +#define SFF_8472_PAGEABLE_REG 0x40 +#define SFF_8472_PAGEABLE (1<<4) + +/* + * This parameter is to help this driver avoid blocking other drivers out + * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C + * clock, one 256 byte read takes about 1/43 second which is excessive; + * but the 1/170 second it takes at 400 kHz may be quite reasonable; and + * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. + * + * This value is forced to be a power of two so that writes align on pages. + */ +static unsigned io_limit = SFF_8436_PAGE_SIZE; + +/* + * specs often allow 5 msec for a page write, sometimes 20 msec; + * it's important to recover from write timeouts. + */ +static unsigned write_timeout = 25; + +typedef enum qsfp_opcode { + QSFP_READ_OP = 0, + QSFP_WRITE_OP = 1 +} qsfp_opcode_e; +#endif + +/* Platform dependent +++ */ +#define I2C_ADDR_CPLD1 0x60 +#define I2C_ADDR_CPLD2 0x62 +#define I2C_ADDR_CPLD3 0x64 + +#define CPLD3_OFFSET_QSFP_MOD_RST 0x17 +/* Platform dependent --- */ +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_present(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t sfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t sfp_set_tx_disable(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +static ssize_t qsfp_set_tx_disable(struct device *dev, struct device_attribute *da, const char *buf, size_t count);; +static ssize_t sfp_eeprom_read(struct i2c_client *, u8, u8 *,int); +static ssize_t sfp_eeprom_write(struct i2c_client *, u8 , const char *,int); +static ssize_t get_mode_reset(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); +enum sfp_sysfs_attributes { + PRESENT, + PRESENT_ALL, + PORT_NUMBER, + PORT_TYPE, + DDM_IMPLEMENTED, + TX_FAULT, + TX_FAULT1, + TX_FAULT2, + TX_FAULT3, + TX_FAULT4, + TX_DISABLE, + TX_DISABLE1, + TX_DISABLE2, + TX_DISABLE3, + TX_DISABLE4, + RX_LOS, + RX_LOS1, + RX_LOS2, + RX_LOS3, + RX_LOS4, + RX_LOS_ALL, + SFP_MOD_RST +}; + +/* SFP/QSFP common attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_port_number, S_IRUGO, show_port_number, NULL, PORT_NUMBER); +static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, show_present, NULL, PRESENT); +static SENSOR_DEVICE_ATTR(sfp_is_present_all, S_IRUGO, show_present, NULL, PRESENT_ALL); +static SENSOR_DEVICE_ATTR(sfp_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, RX_LOS); +static SENSOR_DEVICE_ATTR(sfp_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, TX_DISABLE); +static SENSOR_DEVICE_ATTR(sfp_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, TX_FAULT); + +/* QSFP attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_rx_los1, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS1); +static SENSOR_DEVICE_ATTR(sfp_rx_los2, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS2); +static SENSOR_DEVICE_ATTR(sfp_rx_los3, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS3); +static SENSOR_DEVICE_ATTR(sfp_rx_los4, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS4); +static SENSOR_DEVICE_ATTR(sfp_tx_disable1, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE1); +static SENSOR_DEVICE_ATTR(sfp_tx_disable2, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE2); +static SENSOR_DEVICE_ATTR(sfp_tx_disable3, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE3); +static SENSOR_DEVICE_ATTR(sfp_tx_disable4, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE4); +static SENSOR_DEVICE_ATTR(sfp_tx_fault1, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT1); +static SENSOR_DEVICE_ATTR(sfp_tx_fault2, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT2); +static SENSOR_DEVICE_ATTR(sfp_tx_fault3, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT3); +static SENSOR_DEVICE_ATTR(sfp_tx_fault4, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT4); +static SENSOR_DEVICE_ATTR(sfp_mod_rst, S_IWUSR | S_IRUGO, get_mode_reset, set_mode_reset, SFP_MOD_RST); + +static struct attribute *qsfp_attributes[] = { + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los1.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los2.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los3.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los4.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable1.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable2.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable3.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable4.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault1.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault2.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault3.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault4.dev_attr.attr, + &sensor_dev_attr_sfp_mod_rst.dev_attr.attr, + NULL +}; + +/* SFP msa attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_rx_los_all, S_IRUGO, sfp_show_tx_rx_status, NULL, RX_LOS_ALL); +static struct attribute *sfp_msa_attributes[] = { + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los_all.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable.dev_attr.attr, + NULL +}; + +/* Platform dependent +++ */ +#define CPLD_PORT_TO_FRONT_PORT(port) (port+1) + +enum port_numbers { + as7312_54x_port1, as7312_54x_port2, as7312_54x_port3, as7312_54x_port4, + as7312_54x_port5, as7312_54x_port6, as7312_54x_port7, as7312_54x_port8, + as7312_54x_port9, as7312_54x_port10, as7312_54x_port11, as7312_54x_port12, + as7312_54x_port13, as7312_54x_port14, as7312_54x_port15, as7312_54x_port16, + as7312_54x_port17, as7312_54x_port18, as7312_54x_port19, as7312_54x_port20, + as7312_54x_port21, as7312_54x_port22, as7312_54x_port23, as7312_54x_port24, + as7312_54x_port25, as7312_54x_port26, as7312_54x_port27, as7312_54x_port28, + as7312_54x_port29, as7312_54x_port30, as7312_54x_port31, as7312_54x_port32, + as7312_54x_port33, as7312_54x_port34, as7312_54x_port35, as7312_54x_port36, + as7312_54x_port37, as7312_54x_port38, as7312_54x_port39, as7312_54x_port40, + as7312_54x_port41, as7312_54x_port42, as7312_54x_port43, as7312_54x_port44, + as7312_54x_port45, as7312_54x_port46, as7312_54x_port47, as7312_54x_port48, + as7312_54x_port49, as7312_54x_port52, as7312_54x_port50, as7312_54x_port53, + as7312_54x_port51, as7312_54x_port54 +}; + +#define I2C_DEV_ID(x) { #x, x} + +static const struct i2c_device_id sfp_device_id[] = { + I2C_DEV_ID(as7312_54x_port1), + I2C_DEV_ID(as7312_54x_port2), + I2C_DEV_ID(as7312_54x_port3), + I2C_DEV_ID(as7312_54x_port4), + I2C_DEV_ID(as7312_54x_port5), + I2C_DEV_ID(as7312_54x_port6), + I2C_DEV_ID(as7312_54x_port7), + I2C_DEV_ID(as7312_54x_port8), + I2C_DEV_ID(as7312_54x_port9), + I2C_DEV_ID(as7312_54x_port10), + I2C_DEV_ID(as7312_54x_port11), + I2C_DEV_ID(as7312_54x_port12), + I2C_DEV_ID(as7312_54x_port13), + I2C_DEV_ID(as7312_54x_port14), + I2C_DEV_ID(as7312_54x_port15), + I2C_DEV_ID(as7312_54x_port16), + I2C_DEV_ID(as7312_54x_port17), + I2C_DEV_ID(as7312_54x_port18), + I2C_DEV_ID(as7312_54x_port19), + I2C_DEV_ID(as7312_54x_port20), + I2C_DEV_ID(as7312_54x_port21), + I2C_DEV_ID(as7312_54x_port22), + I2C_DEV_ID(as7312_54x_port23), + I2C_DEV_ID(as7312_54x_port24), + I2C_DEV_ID(as7312_54x_port25), + I2C_DEV_ID(as7312_54x_port26), + I2C_DEV_ID(as7312_54x_port27), + I2C_DEV_ID(as7312_54x_port28), + I2C_DEV_ID(as7312_54x_port29), + I2C_DEV_ID(as7312_54x_port30), + I2C_DEV_ID(as7312_54x_port31), + I2C_DEV_ID(as7312_54x_port32), + I2C_DEV_ID(as7312_54x_port33), + I2C_DEV_ID(as7312_54x_port34), + I2C_DEV_ID(as7312_54x_port35), + I2C_DEV_ID(as7312_54x_port36), + I2C_DEV_ID(as7312_54x_port37), + I2C_DEV_ID(as7312_54x_port38), + I2C_DEV_ID(as7312_54x_port39), + I2C_DEV_ID(as7312_54x_port40), + I2C_DEV_ID(as7312_54x_port41), + I2C_DEV_ID(as7312_54x_port42), + I2C_DEV_ID(as7312_54x_port43), + I2C_DEV_ID(as7312_54x_port44), + I2C_DEV_ID(as7312_54x_port45), + I2C_DEV_ID(as7312_54x_port46), + I2C_DEV_ID(as7312_54x_port47), + I2C_DEV_ID(as7312_54x_port48), + I2C_DEV_ID(as7312_54x_port49), + I2C_DEV_ID(as7312_54x_port50), + I2C_DEV_ID(as7312_54x_port51), + I2C_DEV_ID(as7312_54x_port52), + I2C_DEV_ID(as7312_54x_port53), + I2C_DEV_ID(as7312_54x_port54), + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, sfp_device_id); +/* Platform dependent --- */ + +enum driver_type_e { + DRIVER_TYPE_SFP_MSA, + DRIVER_TYPE_QSFP +}; + +/* Each client has this additional data + */ +struct eeprom_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + struct bin_attribute bin; /* eeprom data */ +}; + +struct sfp_msa_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u64 status[6]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss + 3 => device id + 4 => 10G Ethernet Compliance Codes + to distinguish SFP or SFP+ + 5 => DIAGNOSTIC MONITORING TYPE */ + struct eeprom_data eeprom; +#if (MULTIPAGE_SUPPORT == 1) + struct i2c_client *ddm_client; /* dummy client instance for 0xA2 */ +#endif +}; + +struct qsfp_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status[3]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss */ + + u8 device_id; + struct eeprom_data eeprom; +}; + +struct sfp_port_data { + struct mutex update_lock; + enum driver_type_e driver_type; + int port; /* CPLD port index */ + u64 present; /* present status, bit0:port0, bit1:port1 and so on */ + + struct sfp_msa_data *msa; + struct qsfp_data *qsfp; + + struct i2c_client *client; +#if (MULTIPAGE_SUPPORT == 1) + int use_smbus; + u8 *writebuf; + unsigned write_max; +#endif +}; + +#if (MULTIPAGE_SUPPORT == 1) +static ssize_t sfp_port_read_write(struct sfp_port_data *port_data, + char *buf, loff_t off, size_t len, qsfp_opcode_e opcode); +#endif +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + return sprintf(buf, "%d\n", CPLD_PORT_TO_FRONT_PORT(data->port)); +} + +/* Platform dependent +++ */ +static struct sfp_port_data *sfp_update_present(struct i2c_client *client) +{ + int i = 0, j = 0, status = -1; + u8 reg; + unsigned short cpld_addr; + struct sfp_port_data *data = i2c_get_clientdata(client); + + DEBUG_PRINT("Starting sfp present status update"); + mutex_lock(&data->update_lock); + data->present = 0; + + /* Read present status of port 1~48(SFP port) */ + for (i = 0; i < 2; i++) { + for (j = 0; j < 3; j++) { + cpld_addr = I2C_ADDR_CPLD2 + i*2; + reg = 0x9+j; + status = accton_i2c_cpld_read(cpld_addr, reg); + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_addr, reg, status); + goto exit; + } + + DEBUG_PRINT("Present status = 0x%lx\r\n", data->present); + data->present |= (u64)status << ((i*24) + (j%3)*8); + } + } + + /* Read present status of port 49-52(QSFP port) */ + cpld_addr = I2C_ADDR_CPLD2; + reg = 0x18; + status = accton_i2c_cpld_read(cpld_addr, reg); + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_addr, reg, status); + goto exit; + } + else { + data->present |= (u64)(status & 0xF) << SFP_PORT_MAX; + } + + /* Read present status of port 53-54(QSFP port) */ + cpld_addr = I2C_ADDR_CPLD3; + reg = 0x18; + status = accton_i2c_cpld_read(cpld_addr, reg); + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_addr, reg, status); + goto exit; + } + else { + data->present |= (u64)(status & 0x3) << 52; + } + + DEBUG_PRINT("Present status = 0x%lx", data->present); +exit: + mutex_unlock(&data->update_lock); + return (status < 0) ? ERR_PTR(status) : data; +} + +static struct sfp_port_data* sfp_update_tx_rx_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int i = 0, j = 0; + int status = -1; + + if (time_before(jiffies, data->msa->last_updated + HZ + HZ / 2) && data->msa->valid) { + return data; + } + + DEBUG_PRINT("Starting as7312_54x sfp tx rx status update"); + mutex_lock(&data->update_lock); + data->msa->valid = 0; + memset(data->msa->status, 0, sizeof(data->msa->status)); + + /* Read status of port 1~48(SFP port) */ + for (i = 0; i < 2; i++) { + for (j = 0; j < 9; j++) { + u8 reg; + unsigned short cpld_addr; + reg = 0xc+j; + cpld_addr = I2C_ADDR_CPLD2 + i*2; + + status = accton_i2c_cpld_read(cpld_addr, reg); + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_addr, reg, status); + goto exit; + } + + data->msa->status[j/3] |= (u64)status << ((i*24) + (j%3)*8); + } + } + + data->msa->valid = 1; + data->msa->last_updated = jiffies; + +exit: + mutex_unlock(&data->update_lock); + return (status < 0) ? ERR_PTR(status) : data; +} + +static ssize_t sfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + unsigned short cpld_addr = 0; + u8 cpld_reg = 0, cpld_val = 0, cpld_bit = 0; + long disable; + int error; + + if (data->driver_type == DRIVER_TYPE_QSFP) { + return qsfp_set_tx_disable(dev, da, buf, count); + } + + error = kstrtol(buf, 10, &disable); + if (error) { + return error; + } + + mutex_lock(&data->update_lock); + + if(data->port < 24) { + cpld_addr = I2C_ADDR_CPLD2; + cpld_reg = 0xF + data->port / 8; + cpld_bit = 1 << (data->port % 8); + } + else { /* port 24 ~ 48 */ + cpld_addr = I2C_ADDR_CPLD3; + cpld_reg = 0xF + (data->port - 24) / 8; + cpld_bit = 1 << (data->port % 8); + } + + /* Read current status */ + cpld_val = accton_i2c_cpld_read(cpld_addr, cpld_reg); + + /* Update tx_disable status */ + if (disable) { + data->msa->status[1] |= BIT_INDEX(data->port); + cpld_val |= cpld_bit; + } + else { + data->msa->status[1] &= ~BIT_INDEX(data->port); + cpld_val &= ~cpld_bit; + } + + accton_i2c_cpld_write(cpld_addr, cpld_reg, cpld_val); + mutex_unlock(&data->update_lock); + return count; +} + +static int sfp_is_port_present(struct i2c_client *client, int port) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + + data = sfp_update_present(client); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + return (data->present & BIT_INDEX(data->port)) ? 0 : 1; /* Platform dependent */ +} + +/* Platform dependent +++ */ +static ssize_t show_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + + if (PRESENT_ALL == attr->index) { + int i; + u8 values[7] = {0}; + struct sfp_port_data *data = sfp_update_present(client); + + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + for (i = 0; i < ARRAY_SIZE(values); i++) { + values[i] = ~(u8)(data->present >> (i * 8)); + } + + /* Return values 1 -> 54 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], + values[3], values[4], values[5], + values[6] & 0x3F); + } + else { + struct sfp_port_data *data = i2c_get_clientdata(client); + int present = sfp_is_port_present(client, data->port); + + if (IS_ERR_VALUE(present)) { + return present; + } + + /* PRESENT */ + return sprintf(buf, "%d\n", present); + } +} +/* Platform dependent --- */ + +static struct sfp_port_data *qsfp_update_tx_rx_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int i, status = -1; + u8 buf = 0; + u8 reg[] = {SFF8436_TX_FAULT_ADDR, SFF8436_TX_DISABLE_ADDR, SFF8436_RX_LOS_ADDR}; + + if (time_before(jiffies, data->qsfp->last_updated + HZ + HZ / 2) && data->qsfp->valid) { + return data; + } + + DEBUG_PRINT("Starting sfp tx rx status update"); + mutex_lock(&data->update_lock); + data->qsfp->valid = 0; + memset(data->qsfp->status, 0, sizeof(data->qsfp->status)); + + /* Notify device to update tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(client, reg[i], &buf, sizeof(buf)); + if (unlikely(status < 0)) { + goto exit; + } + } + msleep(200); + + /* Read actual tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(client, reg[i], &buf, sizeof(buf)); + if (unlikely(status < 0)) { + goto exit; + } + + DEBUG_PRINT("qsfp reg(0x%x) status = (0x%x)", reg[i], data->qsfp->status[i]); + data->qsfp->status[i] = (buf & 0xF); + } + + data->qsfp->valid = 1; + data->qsfp->last_updated = jiffies; + +exit: + mutex_unlock(&data->update_lock); + return (status < 0) ? ERR_PTR(status) : data; +} + +static ssize_t get_mode_reset(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + u8 cpld_val = 0; + int port_bit; + int status = -EINVAL; + u8 cpld_addr[] = {I2C_ADDR_CPLD2, I2C_ADDR_CPLD3}; + + /* Low power mode is not supported for SFP ports(1-48) */ + if (data->port < SFP_PORT_MAX) { + return -EINVAL; + } + mutex_lock(&data->update_lock); + + port_bit = data->port - SFP_PORT_MAX; + cpld_val = accton_i2c_cpld_read(cpld_addr[port_bit/4], CPLD3_OFFSET_QSFP_MOD_RST); + + pr_err("[ROY]%s#%d, %x from %x\n", __func__, __LINE__, cpld_val, cpld_addr[port_bit/4]); + + cpld_val = cpld_val & 0x0F; + cpld_val = cpld_val & BIT_INDEX(port_bit%4); + + pr_err("[ROY]%s#%d, %x of bit %d\n", __func__, __LINE__, cpld_val, port_bit); + + status = snprintf(buf, PAGE_SIZE - 1, "%d\r\n", cpld_val>>(port_bit%4)); + + mutex_unlock(&data->update_lock); + + return status; +} + +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + u8 cpld_val = 0; + long reset; + int error, port_bit; + u8 cpld_addr[] = {I2C_ADDR_CPLD2, I2C_ADDR_CPLD3}; + + pr_err("[ROY]%s#%d, port:%d\n", __func__, __LINE__, data->port); + + /* Tx disable is not supported for QSFP ports(49-54) */ + if (data->port < SFP_PORT_MAX) { + return -EINVAL; + } + port_bit = data->port - SFP_PORT_MAX; + error = kstrtol(buf, 10, &reset); + + pr_err("[ROY]%s#%d, %s == %d\n", __func__, __LINE__, buf, error); + if (error) { + return error; + } + mutex_lock(&data->update_lock); + + cpld_val = accton_i2c_cpld_read(cpld_addr[port_bit/4], CPLD3_OFFSET_QSFP_MOD_RST); + pr_err("[ROY]%s#%d, %x\n", __func__, __LINE__, cpld_val); + /* Update lp_mode status */ + if (reset) + { + cpld_val |= BIT_INDEX(port_bit%4); + } + else + { + cpld_val &= ~BIT_INDEX(port_bit%4); + } + pr_err("[ROY]%s#%d, %x to %x\n", __func__, __LINE__, cpld_val, cpld_addr[port_bit/4]); + + accton_i2c_cpld_write(cpld_addr[port_bit/4], CPLD3_OFFSET_QSFP_MOD_RST, cpld_val); + + mutex_unlock(&data->update_lock); + + return count; +} +static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + int present; + u8 val = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + present = sfp_is_port_present(client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + if (present == 0) { + /* port is not present */ + return -ENXIO; + } + + data = qsfp_update_tx_rx_status(dev); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + switch (attr->index) { + case TX_FAULT: + val = !!(data->qsfp->status[2] & 0xF); + break; + case TX_FAULT1: + case TX_FAULT2: + case TX_FAULT3: + case TX_FAULT4: + val = !!(data->qsfp->status[2] & BIT_INDEX(attr->index - TX_FAULT1)); + break; + case TX_DISABLE: + val = data->qsfp->status[1] & 0xF; + break; + case TX_DISABLE1: + case TX_DISABLE2: + case TX_DISABLE3: + case TX_DISABLE4: + val = !!(data->qsfp->status[1] & BIT_INDEX(attr->index - TX_DISABLE1)); + break; + case RX_LOS: + val = !!(data->qsfp->status[0] & 0xF); + break; + case RX_LOS1: + case RX_LOS2: + case RX_LOS3: + case RX_LOS4: + val = !!(data->qsfp->status[0] & BIT_INDEX(attr->index - RX_LOS1)); + break; + default: + break; + } + + return sprintf(buf, "%d\n", val); +} + +static ssize_t qsfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + long disable; + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + status = sfp_is_port_present(client, data->port); + if (IS_ERR_VALUE(status)) { + return status; + } + + if (!status) { + /* port is not present */ + return -ENXIO; + } + + status = kstrtol(buf, 10, &disable); + if (status) { + return status; + } + + data = qsfp_update_tx_rx_status(dev); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + mutex_lock(&data->update_lock); + + if (attr->index == TX_DISABLE) { + if (disable) { + data->qsfp->status[1] |= 0xF; + } + else { + data->qsfp->status[1] &= ~0xF; + } + } + else {/* TX_DISABLE1 ~ TX_DISABLE4*/ + if (disable) { + data->qsfp->status[1] |= (1 << (attr->index - TX_DISABLE1)); + } + else { + data->qsfp->status[1] &= ~(1 << (attr->index - TX_DISABLE1)); + } + } + + DEBUG_PRINT("index = (%d), status = (0x%x)", attr->index, data->qsfp->status[1]); + status = sfp_eeprom_write(data->client, SFF8436_TX_DISABLE_ADDR, &data->qsfp->status[1], sizeof(data->qsfp->status[1])); + if (unlikely(status < 0)) { + count = status; + } + + mutex_unlock(&data->update_lock); + return count; +} + +/* Platform dependent +++ */ +static ssize_t sfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 val = 0, index = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + if (data->driver_type == DRIVER_TYPE_QSFP) { + return qsfp_show_tx_rx_status(dev, da, buf); + } + + data = sfp_update_tx_rx_status(dev); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + if(attr->index == RX_LOS_ALL) { + int i = 0; + u8 values[6] = {0}; + + for (i = 0; i < ARRAY_SIZE(values); i++) { + values[i] = (u8)(data->msa->status[2] >> (i * 8)); + } + + /** Return values 1 -> 48 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], + values[3], values[4], values[5]); + } + + switch (attr->index) { + case TX_FAULT: + index = 0; + break; + case TX_DISABLE: + index = 1; + break; + case RX_LOS: + index = 2; + break; + default: + return 0; + } + + val = (data->msa->status[index] & BIT_INDEX(data->port)) ? 1 : 0; + return sprintf(buf, "%d\n", val); +} +/* Platform dependent --- */ +static ssize_t sfp_eeprom_write(struct i2c_client *client, u8 command, const char *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int status, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + status = i2c_smbus_write_i2c_block_data(client, command, data_len, data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + return status; + } + + return data_len; +#else + int status, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, command, *data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + return status; + } + + return 1; +#endif + + +} + +#if (MULTIPAGE_SUPPORT == 0) +static ssize_t sfp_port_write(struct sfp_port_data *data, + const char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + return count; + } + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_write(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; +} +#endif + +static ssize_t sfp_bin_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + int present; + struct sfp_port_data *data; + DEBUG_PRINT("%s(%d) offset = (%d), count = (%d)", off, count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + + present = sfp_is_port_present(data->client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + if (present == 0) { + /* port is not present */ + return -ENODEV; + } + +#if (MULTIPAGE_SUPPORT == 1) + return sfp_port_read_write(data, buf, off, count, QSFP_WRITE_OP); +#else + return sfp_port_write(data, buf, off, count); +#endif +} + +static ssize_t sfp_eeprom_read(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int status, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + status = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + goto abort; + } + if (unlikely(status != data_len)) { + status = -EIO; + goto abort; + } + + //result = data_len; + +abort: + return status; +#else + int status, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, command); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "sfp read byte data failed, command(0x%2x), data(0x%2x)\r\n", command, status); + goto abort; + } + + *data = (u8)status; + status = 1; + +abort: + return status; +#endif +} + +#if (MULTIPAGE_SUPPORT == 1) +/*-------------------------------------------------------------------------*/ +/* + * This routine computes the addressing information to be used for + * a given r/w request. + * + * Task is to calculate the client (0 = i2c addr 50, 1 = i2c addr 51), + * the page, and the offset. + * + * Handles both SFP and QSFP. + * For SFP, offset 0-255 are on client[0], >255 is on client[1] + * Offset 256-383 are on the lower half of client[1] + * Pages are accessible on the upper half of client[1]. + * Offset >383 are in 128 byte pages mapped into the upper half + * + * For QSFP, all offsets are on client[0] + * offset 0-127 are on the lower half of client[0] (no paging) + * Pages are accessible on the upper half of client[1]. + * Offset >127 are in 128 byte pages mapped into the upper half + * + * Callers must not read/write beyond the end of a client or a page + * without recomputing the client/page. Hence offset (within page) + * plus length must be less than or equal to 128. (Note that this + * routine does not have access to the length of the call, hence + * cannot do the validity check.) + * + * Offset within Lower Page 00h and Upper Page 00h are not recomputed + */ +static uint8_t sff_8436_translate_offset(struct sfp_port_data *port_data, + loff_t *offset, struct i2c_client **client) +{ + unsigned page = 0; + + *client = port_data->client; + + /* if SFP style, offset > 255, shift to i2c addr 0x51 */ + if (port_data->driver_type == DRIVER_TYPE_SFP_MSA) { + if (*offset > 255) { + /* like QSFP, but shifted to client[1] */ + *client = port_data->msa->ddm_client; + *offset -= 256; + } + } + + /* + * if offset is in the range 0-128... + * page doesn't matter (using lower half), return 0. + * offset is already correct (don't add 128 to get to paged area) + */ + if (*offset < SFF_8436_PAGE_SIZE) + return page; + + /* note, page will always be positive since *offset >= 128 */ + page = (*offset >> 7)-1; + /* 0x80 places the offset in the top half, offset is last 7 bits */ + *offset = SFF_8436_PAGE_SIZE + (*offset & 0x7f); + + return page; /* note also returning client and offset */ +} + +static ssize_t sff_8436_eeprom_read(struct sfp_port_data *port_data, + struct i2c_client *client, + char *buf, unsigned offset, size_t count) +{ + struct i2c_msg msg[2]; + u8 msgbuf[2]; + unsigned long timeout, read_time; + int status, i; + + memset(msg, 0, sizeof(msg)); + + switch (port_data->use_smbus) { + case I2C_SMBUS_I2C_BLOCK_DATA: + /*smaller eeproms can work given some SMBus extension calls */ + if (count > I2C_SMBUS_BLOCK_MAX) + count = I2C_SMBUS_BLOCK_MAX; + break; + case I2C_SMBUS_WORD_DATA: + /* Check for odd length transaction */ + count = (count == 1) ? 1 : 2; + break; + case I2C_SMBUS_BYTE_DATA: + count = 1; + break; + default: + /* + * When we have a better choice than SMBus calls, use a + * combined I2C message. Write address; then read up to + * io_limit data bytes. msgbuf is u8 and will cast to our + * needs. + */ + i = 0; + msgbuf[i++] = offset; + + msg[0].addr = client->addr; + msg[0].buf = msgbuf; + msg[0].len = i; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + } + + /* + * Reads fail if the previous write didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + read_time = jiffies; + + switch (port_data->use_smbus) { + case I2C_SMBUS_I2C_BLOCK_DATA: + status = i2c_smbus_read_i2c_block_data(client, offset, + count, buf); + break; + case I2C_SMBUS_WORD_DATA: + status = i2c_smbus_read_word_data(client, offset); + if (status >= 0) { + buf[0] = status & 0xff; + if (count == 2) + buf[1] = status >> 8; + status = count; + } + break; + case I2C_SMBUS_BYTE_DATA: + status = i2c_smbus_read_byte_data(client, offset); + if (status >= 0) { + buf[0] = status; + status = count; + } + break; + default: + status = i2c_transfer(client->adapter, msg, 2); + if (status == 2) + status = count; + } + + dev_dbg(&client->dev, "eeprom read %zu@%d --> %d (%ld)\n", + count, offset, status, jiffies); + + if (status == count) /* happy path */ + return count; + + if (status == -ENXIO) /* no module present */ + return status; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(read_time, timeout)); + + return -ETIMEDOUT; +} + +static ssize_t sff_8436_eeprom_write(struct sfp_port_data *port_data, + struct i2c_client *client, + const char *buf, + unsigned offset, size_t count) +{ + struct i2c_msg msg; + ssize_t status; + unsigned long timeout, write_time; + unsigned next_page_start; + int i = 0; + + /* write max is at most a page + * (In this driver, write_max is actually one byte!) + */ + if (count > port_data->write_max) + count = port_data->write_max; + + /* shorten count if necessary to avoid crossing page boundary */ + next_page_start = roundup(offset + 1, SFF_8436_PAGE_SIZE); + if (offset + count > next_page_start) + count = next_page_start - offset; + + switch (port_data->use_smbus) { + case I2C_SMBUS_I2C_BLOCK_DATA: + /*smaller eeproms can work given some SMBus extension calls */ + if (count > I2C_SMBUS_BLOCK_MAX) + count = I2C_SMBUS_BLOCK_MAX; + break; + case I2C_SMBUS_WORD_DATA: + /* Check for odd length transaction */ + count = (count == 1) ? 1 : 2; + break; + case I2C_SMBUS_BYTE_DATA: + count = 1; + break; + default: + /* If we'll use I2C calls for I/O, set up the message */ + msg.addr = client->addr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = port_data->writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + break; + } + + /* + * Reads fail if the previous write didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + write_time = jiffies; + + switch (port_data->use_smbus) { + case I2C_SMBUS_I2C_BLOCK_DATA: + status = i2c_smbus_write_i2c_block_data(client, + offset, count, buf); + if (status == 0) + status = count; + break; + case I2C_SMBUS_WORD_DATA: + if (count == 2) { + status = i2c_smbus_write_word_data(client, + offset, (u16)((buf[0])|(buf[1] << 8))); + } else { + /* count = 1 */ + status = i2c_smbus_write_byte_data(client, + offset, buf[0]); + } + if (status == 0) + status = count; + break; + case I2C_SMBUS_BYTE_DATA: + status = i2c_smbus_write_byte_data(client, offset, + buf[0]); + if (status == 0) + status = count; + break; + default: + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + break; + } + + dev_dbg(&client->dev, "eeprom write %zu@%d --> %ld (%lu)\n", + count, offset, (long int) status, jiffies); + + if (status == count) + return count; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(write_time, timeout)); + + return -ETIMEDOUT; +} + + +static ssize_t sff_8436_eeprom_update_client(struct sfp_port_data *port_data, + char *buf, loff_t off, + size_t count, qsfp_opcode_e opcode) +{ + struct i2c_client *client; + ssize_t retval = 0; + u8 page = 0; + loff_t phy_offset = off; + int ret = 0; + + page = sff_8436_translate_offset(port_data, &phy_offset, &client); + + dev_dbg(&client->dev, + "sff_8436_eeprom_update_client off %lld page:%d phy_offset:%lld, count:%ld, opcode:%d\n", + off, page, phy_offset, (long int) count, opcode); + if (page > 0) { + ret = sff_8436_eeprom_write(port_data, client, &page, + SFF_8436_PAGE_SELECT_REG, 1); + if (ret < 0) { + dev_dbg(&client->dev, + "Write page register for page %d failed ret:%d!\n", + page, ret); + return ret; + } + } + + while (count) { + ssize_t status; + + if (opcode == QSFP_READ_OP) { + status = sff_8436_eeprom_read(port_data, client, + buf, phy_offset, count); + } else { + status = sff_8436_eeprom_write(port_data, client, + buf, phy_offset, count); + } + if (status <= 0) { + if (retval == 0) + retval = status; + break; + } + buf += status; + phy_offset += status; + count -= status; + retval += status; + } + + + if (page > 0) { + /* return the page register to page 0 (why?) */ + page = 0; + ret = sff_8436_eeprom_write(port_data, client, &page, + SFF_8436_PAGE_SELECT_REG, 1); + if (ret < 0) { + dev_err(&client->dev, + "Restore page register to page %d failed ret:%d!\n", + page, ret); + return ret; + } + } + return retval; +} + + +/* + * Figure out if this access is within the range of supported pages. + * Note this is called on every access because we don't know if the + * module has been replaced since the last call. + * If/when modules support more pages, this is the routine to update + * to validate and allow access to additional pages. + * + * Returns updated len for this access: + * - entire access is legal, original len is returned. + * - access begins legal but is too long, len is truncated to fit. + * - initial offset exceeds supported pages, return -EINVAL + */ +static ssize_t sff_8436_page_legal(struct sfp_port_data *port_data, + loff_t off, size_t len) +{ + struct i2c_client *client = port_data->client; + u8 regval; + int status; + size_t maxlen; + + if (off < 0) return -EINVAL; + if (port_data->driver_type == DRIVER_TYPE_SFP_MSA) { + /* SFP case */ + if ((off + len) <= 256) return len; + /* if no pages needed, we're good */ + //if ((off + len) <= SFF_8472_EEPROM_UNPAGED_SIZE) return len; + /* if offset exceeds possible pages, we're not good */ + if (off >= SFF_8472_EEPROM_SIZE) return -EINVAL; + + /* Check if ddm is supported */ + status = sff_8436_eeprom_read(port_data, client, ®val, + SFF8472_DIAG_MON_TYPE_ADDR, 1); + if (status < 0) return status; /* error out (no module?) */ + if (!(regval & SFF8472_DIAG_MON_TYPE_DDM_MASK)) { + if (off >= 256) return -EINVAL; + maxlen = 256 - off; + } + else { + /* in between, are pages supported? */ + status = sff_8436_eeprom_read(port_data, client, ®val, + SFF_8472_PAGEABLE_REG, 1); + if (status < 0) return status; /* error out (no module?) */ + if (regval & SFF_8472_PAGEABLE) { + /* Pages supported, trim len to the end of pages */ + maxlen = SFF_8472_EEPROM_SIZE - off; + } else { + /* pages not supported, trim len to unpaged size */ + if (off >= SFF_8472_EEPROM_UNPAGED_SIZE) return -EINVAL; + maxlen = SFF_8472_EEPROM_UNPAGED_SIZE - off; + } + } + len = (len > maxlen) ? maxlen : len; + dev_dbg(&client->dev, + "page_legal, SFP, off %lld len %ld\n", + off, (long int) len); + } + else if (port_data->driver_type == DRIVER_TYPE_QSFP) { + /* QSFP case */ + /* if no pages needed, we're good */ + if ((off + len) <= SFF_8436_EEPROM_UNPAGED_SIZE) return len; + /* if offset exceeds possible pages, we're not good */ + if (off >= SFF_8436_EEPROM_SIZE) return -EINVAL; + /* in between, are pages supported? */ + status = sff_8436_eeprom_read(port_data, client, ®val, + SFF_8436_PAGEABLE_REG, 1); + if (status < 0) return status; /* error out (no module?) */ + if (regval & SFF_8436_NOT_PAGEABLE) { + /* pages not supported, trim len to unpaged size */ + if (off >= SFF_8436_EEPROM_UNPAGED_SIZE) return -EINVAL; + maxlen = SFF_8436_EEPROM_UNPAGED_SIZE - off; + } else { + /* Pages supported, trim len to the end of pages */ + maxlen = SFF_8436_EEPROM_SIZE - off; + } + len = (len > maxlen) ? maxlen : len; + dev_dbg(&client->dev, + "page_legal, QSFP, off %lld len %ld\n", + off, (long int) len); + } + else { + return -EINVAL; + } + return len; +} + + +static ssize_t sfp_port_read_write(struct sfp_port_data *port_data, + char *buf, loff_t off, size_t len, qsfp_opcode_e opcode) +{ + struct i2c_client *client = port_data->client; + int chunk; + int status = 0; + ssize_t retval; + size_t pending_len = 0, chunk_len = 0; + loff_t chunk_offset = 0, chunk_start_offset = 0; + + if (unlikely(!len)) + return len; + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&port_data->update_lock); + + /* + * Confirm this access fits within the device suppored addr range + */ + len = sff_8436_page_legal(port_data, off, len); + if (len < 0) { + status = len; + goto err; + } + + /* + * For each (128 byte) chunk involved in this request, issue a + * separate call to sff_eeprom_update_client(), to + * ensure that each access recalculates the client/page + * and writes the page register as needed. + * Note that chunk to page mapping is confusing, is different for + * QSFP and SFP, and never needs to be done. Don't try! + */ + pending_len = len; /* amount remaining to transfer */ + retval = 0; /* amount transferred */ + for (chunk = off >> 7; chunk <= (off + len - 1) >> 7; chunk++) { + + /* + * Compute the offset and number of bytes to be read/write + * + * 1. start at offset 0 (within the chunk), and read/write + * the entire chunk + * 2. start at offset 0 (within the chunk) and read/write less + * than entire chunk + * 3. start at an offset not equal to 0 and read/write the rest + * of the chunk + * 4. start at an offset not equal to 0 and read/write less than + * (end of chunk - offset) + */ + chunk_start_offset = chunk * SFF_8436_PAGE_SIZE; + + if (chunk_start_offset < off) { + chunk_offset = off; + if ((off + pending_len) < (chunk_start_offset + + SFF_8436_PAGE_SIZE)) + chunk_len = pending_len; + else + chunk_len = (chunk+1)*SFF_8436_PAGE_SIZE - off;/*SFF_8436_PAGE_SIZE - off;*/ + } else { + chunk_offset = chunk_start_offset; + if (pending_len > SFF_8436_PAGE_SIZE) + chunk_len = SFF_8436_PAGE_SIZE; + else + chunk_len = pending_len; + } + + dev_dbg(&client->dev, + "sff_r/w: off %lld, len %ld, chunk_start_offset %lld, chunk_offset %lld, chunk_len %ld, pending_len %ld\n", + off, (long int) len, chunk_start_offset, chunk_offset, + (long int) chunk_len, (long int) pending_len); + + /* + * note: chunk_offset is from the start of the EEPROM, + * not the start of the chunk + */ + status = sff_8436_eeprom_update_client(port_data, buf, + chunk_offset, chunk_len, opcode); + if (status != chunk_len) { + /* This is another 'no device present' path */ + dev_dbg(&client->dev, + "sff_8436_update_client for chunk %d chunk_offset %lld chunk_len %ld failed %d!\n", + chunk, chunk_offset, (long int) chunk_len, status); + goto err; + } + buf += status; + pending_len -= status; + retval += status; + } + mutex_unlock(&port_data->update_lock); + + return retval; + +err: + mutex_unlock(&port_data->update_lock); + + return status; +} + +#else +static ssize_t sfp_port_read(struct sfp_port_data *data, + char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + DEBUG_PRINT("Count = 0, return"); + return count; + } + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_read(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; + +} +#endif + +static ssize_t sfp_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + int present; + struct sfp_port_data *data; + DEBUG_PRINT("offset = (%d), count = (%d)", off, count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + + present = sfp_is_port_present(data->client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + if (present == 0) { + /* port is not present */ + return -ENODEV; + } + +#if (MULTIPAGE_SUPPORT == 1) + return sfp_port_read_write(data, buf, off, count, QSFP_READ_OP); +#else + return sfp_port_read(data, buf, off, count); +#endif +} + +#if (MULTIPAGE_SUPPORT == 1) +static int sfp_sysfs_eeprom_init(struct kobject *kobj, struct bin_attribute *eeprom, size_t size) +#else +static int sfp_sysfs_eeprom_init(struct kobject *kobj, struct bin_attribute *eeprom) +#endif +{ + int err; + + sysfs_bin_attr_init(eeprom); + eeprom->attr.name = EEPROM_NAME; + eeprom->attr.mode = S_IWUSR | S_IRUGO; + eeprom->read = sfp_bin_read; + eeprom->write = sfp_bin_write; +#if (MULTIPAGE_SUPPORT == 1) + eeprom->size = size; +#else + eeprom->size = EEPROM_SIZE; +#endif + + /* Create eeprom file */ + err = sysfs_create_bin_file(kobj, eeprom); + if (err) { + return err; + } + + return 0; +} + +static int sfp_sysfs_eeprom_cleanup(struct kobject *kobj, struct bin_attribute *eeprom) +{ + sysfs_remove_bin_file(kobj, eeprom); + return 0; +} + + +#if (MULTIPAGE_SUPPORT == 0) +static int sfp_i2c_check_functionality(struct i2c_client *client) +{ +#if USE_I2C_BLOCK_READ + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK); +#else + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA); +#endif +} +#endif + +static const struct attribute_group sfp_msa_group = { + .attrs = sfp_msa_attributes, +}; + +static int sfp_msa_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct sfp_msa_data **data) +{ + int status; + struct sfp_msa_data *msa; + +#if (MULTIPAGE_SUPPORT == 0) + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } +#endif + + msa = kzalloc(sizeof(struct sfp_msa_data), GFP_KERNEL); + if (!msa) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &sfp_msa_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ +#if (MULTIPAGE_SUPPORT == 1) + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &msa->eeprom.bin, SFF_8436_EEPROM_SIZE); +#else + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &msa->eeprom.bin); +#endif + if (status) { + goto exit_remove; + } + +#if (MULTIPAGE_SUPPORT == 1) + msa->ddm_client = i2c_new_dummy(client->adapter, client->addr + 1); + if (!msa->ddm_client) { + dev_err(&client->dev, "address 0x%02x unavailable\n", client->addr + 1); + status = -EADDRINUSE; + goto exit_eeprom; + } +#endif + + *data = msa; + dev_info(&client->dev, "sfp msa '%s'\n", client->name); + + return 0; + +exit_eeprom: + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &msa->eeprom.bin); +exit_remove: + sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); +exit_free: + kfree(msa); +exit: + + return status; +} + +static const struct attribute_group qsfp_group = { + .attrs = qsfp_attributes, +}; + +static int qsfp_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct qsfp_data **data) +{ + int status; + struct qsfp_data *qsfp; + +#if (MULTIPAGE_SUPPORT == 0) + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } +#endif + + qsfp = kzalloc(sizeof(struct qsfp_data), GFP_KERNEL); + if (!qsfp) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &qsfp_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ +#if (MULTIPAGE_SUPPORT == 1) + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &qsfp->eeprom.bin, SFF_8436_EEPROM_SIZE); +#else + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &qsfp->eeprom.bin); +#endif + if (status) { + goto exit_remove; + } + + *data = qsfp; + dev_info(&client->dev, "qsfp '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &qsfp_group); +exit_free: + kfree(qsfp); +exit: + + return status; +} + +/* Platform dependent +++ */ +static int sfp_device_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int ret = 0; + struct sfp_port_data *data = NULL; + + if (client->addr != SFP_EEPROM_A0_I2C_ADDR) { + return -ENODEV; + } + + if (dev_id->driver_data < as7312_54x_port1 || dev_id->driver_data > as7312_54x_port54) { + return -ENXIO; + } + + data = kzalloc(sizeof(struct sfp_port_data), GFP_KERNEL); + if (!data) { + return -ENOMEM; + } + +#if (MULTIPAGE_SUPPORT == 1) + data->use_smbus = 0; + + /* Use I2C operations unless we're stuck with SMBus extensions. */ + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { + if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { + data->use_smbus = I2C_SMBUS_I2C_BLOCK_DATA; + } else if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_WORD_DATA)) { + data->use_smbus = I2C_SMBUS_WORD_DATA; + } else if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_BYTE_DATA)) { + data->use_smbus = I2C_SMBUS_BYTE_DATA; + } else { + ret = -EPFNOSUPPORT; + goto exit_kfree; + } + } + + if (!data->use_smbus || + (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) || + i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_WRITE_WORD_DATA) || + i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + /* + * NOTE: AN-2079 + * Finisar recommends that the host implement 1 byte writes + * only since this module only supports 32 byte page boundaries. + * 2 byte writes are acceptable for PE and Vout changes per + * Application Note AN-2071. + */ + unsigned write_max = 1; + + if (write_max > io_limit) + write_max = io_limit; + if (data->use_smbus && write_max > I2C_SMBUS_BLOCK_MAX) + write_max = I2C_SMBUS_BLOCK_MAX; + data->write_max = write_max; + + /* buffer (data + address at the beginning) */ + data->writebuf = kmalloc(write_max + 2, GFP_KERNEL); + if (!data->writebuf) { + ret = -ENOMEM; + goto exit_kfree; + } + } else { + dev_warn(&client->dev, + "cannot write due to controller restrictions."); + } + + if (data->use_smbus == I2C_SMBUS_WORD_DATA || + data->use_smbus == I2C_SMBUS_BYTE_DATA) { + dev_notice(&client->dev, "Falling back to %s reads, " + "performance will suffer\n", data->use_smbus == + I2C_SMBUS_WORD_DATA ? "word" : "byte"); + } +#endif + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->port = dev_id->driver_data; + data->client = client; + + if (dev_id->driver_data >= as7312_54x_port1 && dev_id->driver_data <= as7312_54x_port48) { + data->driver_type = DRIVER_TYPE_SFP_MSA; + ret = sfp_msa_probe(client, dev_id, &data->msa); + } + else { /* as7312_54x_portsfp49 ~ as7312_54x_portsfp54 */ + data->driver_type = DRIVER_TYPE_QSFP; + ret = qsfp_probe(client, dev_id, &data->qsfp); + } + + if (ret < 0) { + goto exit_kfree_buf; + } + + + return ret; + +exit_kfree_buf: +#if (MULTIPAGE_SUPPORT == 1) + if (data->writebuf) kfree(data->writebuf); +#endif + +exit_kfree: + kfree(data); + return ret; +} +/* Platform dependent --- */ + +static int sfp_msa_remove(struct i2c_client *client, struct sfp_msa_data *data) +{ + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); +#if (MULTIPAGE_SUPPORT == 1) + i2c_unregister_device(data->ddm_client); +#endif + sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); + kfree(data); + return 0; +} + +static int qfp_remove(struct i2c_client *client, struct qsfp_data *data) +{ + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + sysfs_remove_group(&client->dev.kobj, &qsfp_group); + kfree(data); + return 0; +} + +static int sfp_device_remove(struct i2c_client *client) +{ + int ret = 0; + struct sfp_port_data *data = i2c_get_clientdata(client); + + switch (data->driver_type) { + case DRIVER_TYPE_SFP_MSA: + return sfp_msa_remove(client, data->msa); + case DRIVER_TYPE_QSFP: + return qfp_remove(client, data->qsfp); + } + +#if (MULTIPAGE_SUPPORT == 1) + if (data->writebuf) + kfree(data->writebuf); +#endif + kfree(data); + return ret; +} + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static struct i2c_driver sfp_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = sfp_device_probe, + .remove = sfp_device_remove, + .id_table = sfp_device_id, + .address_list = normal_i2c, +}; + +static int __init sfp_init(void) +{ + return i2c_add_driver(&sfp_driver); +} + +static void __exit sfp_exit(void) +{ + i2c_del_driver(&sfp_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton as7312_54x_sfp driver"); +MODULE_LICENSE("GPL"); + +module_init(sfp_init); +module_exit(sfp_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_i2c_cpld.c new file mode 100644 index 00000000000..67ecd8e036a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_i2c_cpld.c @@ -0,0 +1,1219 @@ +/* + * Copyright (C) Brandon Chuang + * + * This module supports the accton cpld that hold the channel select + * mechanism for other i2c slave devices, such as SFP. + * This includes the: + * Accton as7312_54x CPLD1/CPLD2/CPLD3 + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +enum cpld_type { + as7312_54x_cpld1, + as7312_54x_cpld2, + as7312_54x_cpld3 +}; + +struct as7312_54x_cpld_data { + enum cpld_type type; + struct device *hwmon_dev; + struct mutex update_lock; +}; + +static const struct i2c_device_id as7312_54x_cpld_id[] = { + { "as7312_54x_cpld1", as7312_54x_cpld1 }, + { "as7312_54x_cpld2", as7312_54x_cpld2 }, + { "as7312_54x_cpld3", as7312_54x_cpld3 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, as7312_54x_cpld_id); + +#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index +#define TRANSCEIVER_TXDISABLE_ATTR_ID(index) MODULE_TXDISABLE_##index +#define TRANSCEIVER_RXLOS_ATTR_ID(index) MODULE_RXLOS_##index +#define TRANSCEIVER_TXFAULT_ATTR_ID(index) MODULE_TXFAULT_##index +#define TRANSCEIVER_RESET_ATTR_ID(index) MODULE_RESET_##index + +enum as7312_54x_cpld1_sysfs_attributes { + CPLD_VERSION, + ACCESS, + MODULE_PRESENT_ALL, + MODULE_RXLOS_ALL, + /* transceiver attributes */ + TRANSCEIVER_PRESENT_ATTR_ID(1), + TRANSCEIVER_PRESENT_ATTR_ID(2), + TRANSCEIVER_PRESENT_ATTR_ID(3), + TRANSCEIVER_PRESENT_ATTR_ID(4), + TRANSCEIVER_PRESENT_ATTR_ID(5), + TRANSCEIVER_PRESENT_ATTR_ID(6), + TRANSCEIVER_PRESENT_ATTR_ID(7), + TRANSCEIVER_PRESENT_ATTR_ID(8), + TRANSCEIVER_PRESENT_ATTR_ID(9), + TRANSCEIVER_PRESENT_ATTR_ID(10), + TRANSCEIVER_PRESENT_ATTR_ID(11), + TRANSCEIVER_PRESENT_ATTR_ID(12), + TRANSCEIVER_PRESENT_ATTR_ID(13), + TRANSCEIVER_PRESENT_ATTR_ID(14), + TRANSCEIVER_PRESENT_ATTR_ID(15), + TRANSCEIVER_PRESENT_ATTR_ID(16), + TRANSCEIVER_PRESENT_ATTR_ID(17), + TRANSCEIVER_PRESENT_ATTR_ID(18), + TRANSCEIVER_PRESENT_ATTR_ID(19), + TRANSCEIVER_PRESENT_ATTR_ID(20), + TRANSCEIVER_PRESENT_ATTR_ID(21), + TRANSCEIVER_PRESENT_ATTR_ID(22), + TRANSCEIVER_PRESENT_ATTR_ID(23), + TRANSCEIVER_PRESENT_ATTR_ID(24), + TRANSCEIVER_PRESENT_ATTR_ID(25), + TRANSCEIVER_PRESENT_ATTR_ID(26), + TRANSCEIVER_PRESENT_ATTR_ID(27), + TRANSCEIVER_PRESENT_ATTR_ID(28), + TRANSCEIVER_PRESENT_ATTR_ID(29), + TRANSCEIVER_PRESENT_ATTR_ID(30), + TRANSCEIVER_PRESENT_ATTR_ID(31), + TRANSCEIVER_PRESENT_ATTR_ID(32), + TRANSCEIVER_PRESENT_ATTR_ID(33), + TRANSCEIVER_PRESENT_ATTR_ID(34), + TRANSCEIVER_PRESENT_ATTR_ID(35), + TRANSCEIVER_PRESENT_ATTR_ID(36), + TRANSCEIVER_PRESENT_ATTR_ID(37), + TRANSCEIVER_PRESENT_ATTR_ID(38), + TRANSCEIVER_PRESENT_ATTR_ID(39), + TRANSCEIVER_PRESENT_ATTR_ID(40), + TRANSCEIVER_PRESENT_ATTR_ID(41), + TRANSCEIVER_PRESENT_ATTR_ID(42), + TRANSCEIVER_PRESENT_ATTR_ID(43), + TRANSCEIVER_PRESENT_ATTR_ID(44), + TRANSCEIVER_PRESENT_ATTR_ID(45), + TRANSCEIVER_PRESENT_ATTR_ID(46), + TRANSCEIVER_PRESENT_ATTR_ID(47), + TRANSCEIVER_PRESENT_ATTR_ID(48), + TRANSCEIVER_PRESENT_ATTR_ID(49), + TRANSCEIVER_PRESENT_ATTR_ID(50), + TRANSCEIVER_PRESENT_ATTR_ID(51), + TRANSCEIVER_PRESENT_ATTR_ID(52), + TRANSCEIVER_PRESENT_ATTR_ID(53), + TRANSCEIVER_PRESENT_ATTR_ID(54), + TRANSCEIVER_RESET_ATTR_ID(49), + TRANSCEIVER_RESET_ATTR_ID(50), + TRANSCEIVER_RESET_ATTR_ID(51), + TRANSCEIVER_RESET_ATTR_ID(52), + TRANSCEIVER_RESET_ATTR_ID(53), + TRANSCEIVER_RESET_ATTR_ID(54), + TRANSCEIVER_TXDISABLE_ATTR_ID(1), + TRANSCEIVER_TXDISABLE_ATTR_ID(2), + TRANSCEIVER_TXDISABLE_ATTR_ID(3), + TRANSCEIVER_TXDISABLE_ATTR_ID(4), + TRANSCEIVER_TXDISABLE_ATTR_ID(5), + TRANSCEIVER_TXDISABLE_ATTR_ID(6), + TRANSCEIVER_TXDISABLE_ATTR_ID(7), + TRANSCEIVER_TXDISABLE_ATTR_ID(8), + TRANSCEIVER_TXDISABLE_ATTR_ID(9), + TRANSCEIVER_TXDISABLE_ATTR_ID(10), + TRANSCEIVER_TXDISABLE_ATTR_ID(11), + TRANSCEIVER_TXDISABLE_ATTR_ID(12), + TRANSCEIVER_TXDISABLE_ATTR_ID(13), + TRANSCEIVER_TXDISABLE_ATTR_ID(14), + TRANSCEIVER_TXDISABLE_ATTR_ID(15), + TRANSCEIVER_TXDISABLE_ATTR_ID(16), + TRANSCEIVER_TXDISABLE_ATTR_ID(17), + TRANSCEIVER_TXDISABLE_ATTR_ID(18), + TRANSCEIVER_TXDISABLE_ATTR_ID(19), + TRANSCEIVER_TXDISABLE_ATTR_ID(20), + TRANSCEIVER_TXDISABLE_ATTR_ID(21), + TRANSCEIVER_TXDISABLE_ATTR_ID(22), + TRANSCEIVER_TXDISABLE_ATTR_ID(23), + TRANSCEIVER_TXDISABLE_ATTR_ID(24), + TRANSCEIVER_TXDISABLE_ATTR_ID(25), + TRANSCEIVER_TXDISABLE_ATTR_ID(26), + TRANSCEIVER_TXDISABLE_ATTR_ID(27), + TRANSCEIVER_TXDISABLE_ATTR_ID(28), + TRANSCEIVER_TXDISABLE_ATTR_ID(29), + TRANSCEIVER_TXDISABLE_ATTR_ID(30), + TRANSCEIVER_TXDISABLE_ATTR_ID(31), + TRANSCEIVER_TXDISABLE_ATTR_ID(32), + TRANSCEIVER_TXDISABLE_ATTR_ID(33), + TRANSCEIVER_TXDISABLE_ATTR_ID(34), + TRANSCEIVER_TXDISABLE_ATTR_ID(35), + TRANSCEIVER_TXDISABLE_ATTR_ID(36), + TRANSCEIVER_TXDISABLE_ATTR_ID(37), + TRANSCEIVER_TXDISABLE_ATTR_ID(38), + TRANSCEIVER_TXDISABLE_ATTR_ID(39), + TRANSCEIVER_TXDISABLE_ATTR_ID(40), + TRANSCEIVER_TXDISABLE_ATTR_ID(41), + TRANSCEIVER_TXDISABLE_ATTR_ID(42), + TRANSCEIVER_TXDISABLE_ATTR_ID(43), + TRANSCEIVER_TXDISABLE_ATTR_ID(44), + TRANSCEIVER_TXDISABLE_ATTR_ID(45), + TRANSCEIVER_TXDISABLE_ATTR_ID(46), + TRANSCEIVER_TXDISABLE_ATTR_ID(47), + TRANSCEIVER_TXDISABLE_ATTR_ID(48), + TRANSCEIVER_RXLOS_ATTR_ID(1), + TRANSCEIVER_RXLOS_ATTR_ID(2), + TRANSCEIVER_RXLOS_ATTR_ID(3), + TRANSCEIVER_RXLOS_ATTR_ID(4), + TRANSCEIVER_RXLOS_ATTR_ID(5), + TRANSCEIVER_RXLOS_ATTR_ID(6), + TRANSCEIVER_RXLOS_ATTR_ID(7), + TRANSCEIVER_RXLOS_ATTR_ID(8), + TRANSCEIVER_RXLOS_ATTR_ID(9), + TRANSCEIVER_RXLOS_ATTR_ID(10), + TRANSCEIVER_RXLOS_ATTR_ID(11), + TRANSCEIVER_RXLOS_ATTR_ID(12), + TRANSCEIVER_RXLOS_ATTR_ID(13), + TRANSCEIVER_RXLOS_ATTR_ID(14), + TRANSCEIVER_RXLOS_ATTR_ID(15), + TRANSCEIVER_RXLOS_ATTR_ID(16), + TRANSCEIVER_RXLOS_ATTR_ID(17), + TRANSCEIVER_RXLOS_ATTR_ID(18), + TRANSCEIVER_RXLOS_ATTR_ID(19), + TRANSCEIVER_RXLOS_ATTR_ID(20), + TRANSCEIVER_RXLOS_ATTR_ID(21), + TRANSCEIVER_RXLOS_ATTR_ID(22), + TRANSCEIVER_RXLOS_ATTR_ID(23), + TRANSCEIVER_RXLOS_ATTR_ID(24), + TRANSCEIVER_RXLOS_ATTR_ID(25), + TRANSCEIVER_RXLOS_ATTR_ID(26), + TRANSCEIVER_RXLOS_ATTR_ID(27), + TRANSCEIVER_RXLOS_ATTR_ID(28), + TRANSCEIVER_RXLOS_ATTR_ID(29), + TRANSCEIVER_RXLOS_ATTR_ID(30), + TRANSCEIVER_RXLOS_ATTR_ID(31), + TRANSCEIVER_RXLOS_ATTR_ID(32), + TRANSCEIVER_RXLOS_ATTR_ID(33), + TRANSCEIVER_RXLOS_ATTR_ID(34), + TRANSCEIVER_RXLOS_ATTR_ID(35), + TRANSCEIVER_RXLOS_ATTR_ID(36), + TRANSCEIVER_RXLOS_ATTR_ID(37), + TRANSCEIVER_RXLOS_ATTR_ID(38), + TRANSCEIVER_RXLOS_ATTR_ID(39), + TRANSCEIVER_RXLOS_ATTR_ID(40), + TRANSCEIVER_RXLOS_ATTR_ID(41), + TRANSCEIVER_RXLOS_ATTR_ID(42), + TRANSCEIVER_RXLOS_ATTR_ID(43), + TRANSCEIVER_RXLOS_ATTR_ID(44), + TRANSCEIVER_RXLOS_ATTR_ID(45), + TRANSCEIVER_RXLOS_ATTR_ID(46), + TRANSCEIVER_RXLOS_ATTR_ID(47), + TRANSCEIVER_RXLOS_ATTR_ID(48), + TRANSCEIVER_TXFAULT_ATTR_ID(1), + TRANSCEIVER_TXFAULT_ATTR_ID(2), + TRANSCEIVER_TXFAULT_ATTR_ID(3), + TRANSCEIVER_TXFAULT_ATTR_ID(4), + TRANSCEIVER_TXFAULT_ATTR_ID(5), + TRANSCEIVER_TXFAULT_ATTR_ID(6), + TRANSCEIVER_TXFAULT_ATTR_ID(7), + TRANSCEIVER_TXFAULT_ATTR_ID(8), + TRANSCEIVER_TXFAULT_ATTR_ID(9), + TRANSCEIVER_TXFAULT_ATTR_ID(10), + TRANSCEIVER_TXFAULT_ATTR_ID(11), + TRANSCEIVER_TXFAULT_ATTR_ID(12), + TRANSCEIVER_TXFAULT_ATTR_ID(13), + TRANSCEIVER_TXFAULT_ATTR_ID(14), + TRANSCEIVER_TXFAULT_ATTR_ID(15), + TRANSCEIVER_TXFAULT_ATTR_ID(16), + TRANSCEIVER_TXFAULT_ATTR_ID(17), + TRANSCEIVER_TXFAULT_ATTR_ID(18), + TRANSCEIVER_TXFAULT_ATTR_ID(19), + TRANSCEIVER_TXFAULT_ATTR_ID(20), + TRANSCEIVER_TXFAULT_ATTR_ID(21), + TRANSCEIVER_TXFAULT_ATTR_ID(22), + TRANSCEIVER_TXFAULT_ATTR_ID(23), + TRANSCEIVER_TXFAULT_ATTR_ID(24), + TRANSCEIVER_TXFAULT_ATTR_ID(25), + TRANSCEIVER_TXFAULT_ATTR_ID(26), + TRANSCEIVER_TXFAULT_ATTR_ID(27), + TRANSCEIVER_TXFAULT_ATTR_ID(28), + TRANSCEIVER_TXFAULT_ATTR_ID(29), + TRANSCEIVER_TXFAULT_ATTR_ID(30), + TRANSCEIVER_TXFAULT_ATTR_ID(31), + TRANSCEIVER_TXFAULT_ATTR_ID(32), + TRANSCEIVER_TXFAULT_ATTR_ID(33), + TRANSCEIVER_TXFAULT_ATTR_ID(34), + TRANSCEIVER_TXFAULT_ATTR_ID(35), + TRANSCEIVER_TXFAULT_ATTR_ID(36), + TRANSCEIVER_TXFAULT_ATTR_ID(37), + TRANSCEIVER_TXFAULT_ATTR_ID(38), + TRANSCEIVER_TXFAULT_ATTR_ID(39), + TRANSCEIVER_TXFAULT_ATTR_ID(40), + TRANSCEIVER_TXFAULT_ATTR_ID(41), + TRANSCEIVER_TXFAULT_ATTR_ID(42), + TRANSCEIVER_TXFAULT_ATTR_ID(43), + TRANSCEIVER_TXFAULT_ATTR_ID(44), + TRANSCEIVER_TXFAULT_ATTR_ID(45), + TRANSCEIVER_TXFAULT_ATTR_ID(46), + TRANSCEIVER_TXFAULT_ATTR_ID(47), + TRANSCEIVER_TXFAULT_ATTR_ID(48), +}; + +/* sysfs attributes for hwmon + */ +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_rxlos_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +static int as7312_54x_cpld_read_internal(struct i2c_client *client, u8 reg); +static int as7312_54x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value); + +/* transceiver attributes */ +#define DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_status, NULL, MODULE_PRESENT_##index) +#define DECLARE_TRANSCEIVER_PRESENT_ATTR(index) &sensor_dev_attr_module_present_##index.dev_attr.attr + +#define DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_reset_##index, S_IRUGO | S_IWUSR, show_status, set_reset, MODULE_RESET_##index) +#define DECLARE_TRANSCEIVER_RESET_ATTR(index) &sensor_dev_attr_module_reset_##index.dev_attr.attr + +#define DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_tx_disable_##index, S_IRUGO | S_IWUSR, show_status, set_tx_disable, MODULE_TXDISABLE_##index); \ + static SENSOR_DEVICE_ATTR(module_rx_los_##index, S_IRUGO, show_status, NULL, MODULE_RXLOS_##index); \ + static SENSOR_DEVICE_ATTR(module_tx_fault_##index, S_IRUGO, show_status, NULL, MODULE_TXFAULT_##index) +#define DECLARE_SFP_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_tx_disable_##index.dev_attr.attr, \ + &sensor_dev_attr_module_rx_los_##index.dev_attr.attr, \ + &sensor_dev_attr_module_tx_fault_##index.dev_attr.attr + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS); +/* transceiver attributes */ +static SENSOR_DEVICE_ATTR(module_present_all, S_IRUGO, show_present_all, NULL, MODULE_PRESENT_ALL); +static SENSOR_DEVICE_ATTR(module_rx_los_all, S_IRUGO, show_rxlos_all, NULL, MODULE_RXLOS_ALL); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(1); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(2); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(3); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(4); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(5); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(6); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(7); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(8); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(9); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(10); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(11); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(12); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(13); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(14); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(15); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(16); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(17); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(18); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(19); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(20); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(21); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(22); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(23); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(24); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(25); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(26); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(27); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(28); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(29); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(30); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(31); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(32); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(33); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(34); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(35); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(36); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(37); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(38); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(39); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(40); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(41); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(42); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(43); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(44); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(45); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(46); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(47); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(48); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(49); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(50); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(51); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(52); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(53); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(54); + +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(49); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(50); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(51); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(52); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(53); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(54); + +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(1); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(2); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(3); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(4); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(5); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(6); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(7); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(8); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(9); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(10); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(11); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(12); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(13); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(14); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(15); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(16); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(17); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(18); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(19); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(20); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(21); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(22); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(23); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(24); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(25); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(26); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(27); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(28); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(29); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(30); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(31); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(32); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(33); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(34); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(35); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(36); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(37); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(38); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(39); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(40); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(41); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(42); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(43); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(44); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(45); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(46); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(47); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(48); + +static struct attribute *as7312_54x_cpld1_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + NULL +}; + +static const struct attribute_group as7312_54x_cpld1_group = { + .attrs = as7312_54x_cpld1_attributes, +}; + +static struct attribute *as7312_54x_cpld2_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + &sensor_dev_attr_module_rx_los_all.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(1), + DECLARE_TRANSCEIVER_PRESENT_ATTR(2), + DECLARE_TRANSCEIVER_PRESENT_ATTR(3), + DECLARE_TRANSCEIVER_PRESENT_ATTR(4), + DECLARE_TRANSCEIVER_PRESENT_ATTR(5), + DECLARE_TRANSCEIVER_PRESENT_ATTR(6), + DECLARE_TRANSCEIVER_PRESENT_ATTR(7), + DECLARE_TRANSCEIVER_PRESENT_ATTR(8), + DECLARE_TRANSCEIVER_PRESENT_ATTR(9), + DECLARE_TRANSCEIVER_PRESENT_ATTR(10), + DECLARE_TRANSCEIVER_PRESENT_ATTR(11), + DECLARE_TRANSCEIVER_PRESENT_ATTR(12), + DECLARE_TRANSCEIVER_PRESENT_ATTR(13), + DECLARE_TRANSCEIVER_PRESENT_ATTR(14), + DECLARE_TRANSCEIVER_PRESENT_ATTR(15), + DECLARE_TRANSCEIVER_PRESENT_ATTR(16), + DECLARE_TRANSCEIVER_PRESENT_ATTR(17), + DECLARE_TRANSCEIVER_PRESENT_ATTR(18), + DECLARE_TRANSCEIVER_PRESENT_ATTR(19), + DECLARE_TRANSCEIVER_PRESENT_ATTR(20), + DECLARE_TRANSCEIVER_PRESENT_ATTR(21), + DECLARE_TRANSCEIVER_PRESENT_ATTR(22), + DECLARE_TRANSCEIVER_PRESENT_ATTR(23), + DECLARE_TRANSCEIVER_PRESENT_ATTR(24), + DECLARE_TRANSCEIVER_PRESENT_ATTR(49), + DECLARE_TRANSCEIVER_PRESENT_ATTR(50), + DECLARE_TRANSCEIVER_PRESENT_ATTR(51), + DECLARE_TRANSCEIVER_PRESENT_ATTR(52), + DECLARE_TRANSCEIVER_RESET_ATTR(49), + DECLARE_TRANSCEIVER_RESET_ATTR(50), + DECLARE_TRANSCEIVER_RESET_ATTR(51), + DECLARE_TRANSCEIVER_RESET_ATTR(52), + DECLARE_SFP_TRANSCEIVER_ATTR(1), + DECLARE_SFP_TRANSCEIVER_ATTR(2), + DECLARE_SFP_TRANSCEIVER_ATTR(3), + DECLARE_SFP_TRANSCEIVER_ATTR(4), + DECLARE_SFP_TRANSCEIVER_ATTR(5), + DECLARE_SFP_TRANSCEIVER_ATTR(6), + DECLARE_SFP_TRANSCEIVER_ATTR(7), + DECLARE_SFP_TRANSCEIVER_ATTR(8), + DECLARE_SFP_TRANSCEIVER_ATTR(9), + DECLARE_SFP_TRANSCEIVER_ATTR(10), + DECLARE_SFP_TRANSCEIVER_ATTR(11), + DECLARE_SFP_TRANSCEIVER_ATTR(12), + DECLARE_SFP_TRANSCEIVER_ATTR(13), + DECLARE_SFP_TRANSCEIVER_ATTR(14), + DECLARE_SFP_TRANSCEIVER_ATTR(15), + DECLARE_SFP_TRANSCEIVER_ATTR(16), + DECLARE_SFP_TRANSCEIVER_ATTR(17), + DECLARE_SFP_TRANSCEIVER_ATTR(18), + DECLARE_SFP_TRANSCEIVER_ATTR(19), + DECLARE_SFP_TRANSCEIVER_ATTR(20), + DECLARE_SFP_TRANSCEIVER_ATTR(21), + DECLARE_SFP_TRANSCEIVER_ATTR(22), + DECLARE_SFP_TRANSCEIVER_ATTR(23), + DECLARE_SFP_TRANSCEIVER_ATTR(24), + NULL +}; + +static const struct attribute_group as7312_54x_cpld2_group = { + .attrs = as7312_54x_cpld2_attributes, +}; + +static struct attribute *as7312_54x_cpld3_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + &sensor_dev_attr_module_rx_los_all.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(25), + DECLARE_TRANSCEIVER_PRESENT_ATTR(26), + DECLARE_TRANSCEIVER_PRESENT_ATTR(27), + DECLARE_TRANSCEIVER_PRESENT_ATTR(28), + DECLARE_TRANSCEIVER_PRESENT_ATTR(29), + DECLARE_TRANSCEIVER_PRESENT_ATTR(30), + DECLARE_TRANSCEIVER_PRESENT_ATTR(31), + DECLARE_TRANSCEIVER_PRESENT_ATTR(32), + DECLARE_TRANSCEIVER_PRESENT_ATTR(33), + DECLARE_TRANSCEIVER_PRESENT_ATTR(34), + DECLARE_TRANSCEIVER_PRESENT_ATTR(35), + DECLARE_TRANSCEIVER_PRESENT_ATTR(36), + DECLARE_TRANSCEIVER_PRESENT_ATTR(37), + DECLARE_TRANSCEIVER_PRESENT_ATTR(38), + DECLARE_TRANSCEIVER_PRESENT_ATTR(39), + DECLARE_TRANSCEIVER_PRESENT_ATTR(40), + DECLARE_TRANSCEIVER_PRESENT_ATTR(41), + DECLARE_TRANSCEIVER_PRESENT_ATTR(42), + DECLARE_TRANSCEIVER_PRESENT_ATTR(43), + DECLARE_TRANSCEIVER_PRESENT_ATTR(44), + DECLARE_TRANSCEIVER_PRESENT_ATTR(45), + DECLARE_TRANSCEIVER_PRESENT_ATTR(46), + DECLARE_TRANSCEIVER_PRESENT_ATTR(47), + DECLARE_TRANSCEIVER_PRESENT_ATTR(48), + DECLARE_TRANSCEIVER_PRESENT_ATTR(53), + DECLARE_TRANSCEIVER_PRESENT_ATTR(54), + DECLARE_TRANSCEIVER_RESET_ATTR(53), + DECLARE_TRANSCEIVER_RESET_ATTR(54), + DECLARE_SFP_TRANSCEIVER_ATTR(25), + DECLARE_SFP_TRANSCEIVER_ATTR(26), + DECLARE_SFP_TRANSCEIVER_ATTR(27), + DECLARE_SFP_TRANSCEIVER_ATTR(28), + DECLARE_SFP_TRANSCEIVER_ATTR(29), + DECLARE_SFP_TRANSCEIVER_ATTR(30), + DECLARE_SFP_TRANSCEIVER_ATTR(31), + DECLARE_SFP_TRANSCEIVER_ATTR(32), + DECLARE_SFP_TRANSCEIVER_ATTR(33), + DECLARE_SFP_TRANSCEIVER_ATTR(34), + DECLARE_SFP_TRANSCEIVER_ATTR(35), + DECLARE_SFP_TRANSCEIVER_ATTR(36), + DECLARE_SFP_TRANSCEIVER_ATTR(37), + DECLARE_SFP_TRANSCEIVER_ATTR(38), + DECLARE_SFP_TRANSCEIVER_ATTR(39), + DECLARE_SFP_TRANSCEIVER_ATTR(40), + DECLARE_SFP_TRANSCEIVER_ATTR(41), + DECLARE_SFP_TRANSCEIVER_ATTR(42), + DECLARE_SFP_TRANSCEIVER_ATTR(43), + DECLARE_SFP_TRANSCEIVER_ATTR(44), + DECLARE_SFP_TRANSCEIVER_ATTR(45), + DECLARE_SFP_TRANSCEIVER_ATTR(46), + DECLARE_SFP_TRANSCEIVER_ATTR(47), + DECLARE_SFP_TRANSCEIVER_ATTR(48), + NULL +}; + +static const struct attribute_group as7312_54x_cpld3_group = { + .attrs = as7312_54x_cpld3_attributes, +}; + +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u8 values[4] = {0}; + u8 regs[] = {0x9, 0xA, 0xB, 0x18}; + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = as7312_54x_cpld_read_internal(client, regs[i]); + + if (status < 0) { + goto exit; + } + + values[i] = ~(u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values 1 -> 54 in order */ + if (data->type == as7312_54x_cpld2) { + values[3] &= 0xF; + } + else { /* as7312_54x_cpld3 */ + values[3] &= 0x3; + } + + return sprintf(buf, "%.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], values[3]); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_rxlos_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u8 values[3] = {0}; + u8 regs[] = {0x12, 0x13, 0x14}; + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = as7312_54x_cpld_read_internal(client, regs[i]); + + if (status < 0) { + goto exit; + } + + values[i] = (u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values 1 -> 24 in order */ + return sprintf(buf, "%.2x %.2x %.2x\n", values[0], values[1], values[2]); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0, revert = 0; + + switch (attr->index) { + case MODULE_PRESENT_1 ... MODULE_PRESENT_8: + reg = 0x9; + mask = 0x1 << (attr->index - MODULE_PRESENT_1); + break; + case MODULE_PRESENT_9 ... MODULE_PRESENT_16: + reg = 0xA; + mask = 0x1 << (attr->index - MODULE_PRESENT_9); + break; + case MODULE_PRESENT_17 ... MODULE_PRESENT_24: + reg = 0xB; + mask = 0x1 << (attr->index - MODULE_PRESENT_17); + break; + case MODULE_PRESENT_25 ... MODULE_PRESENT_32: + reg = 0x9; + mask = 0x1 << (attr->index - MODULE_PRESENT_25); + break; + case MODULE_PRESENT_33 ... MODULE_PRESENT_40: + reg = 0xA; + mask = 0x1 << (attr->index - MODULE_PRESENT_33); + break; + case MODULE_PRESENT_41 ... MODULE_PRESENT_48: + reg = 0xB; + mask = 0x1 << (attr->index - MODULE_PRESENT_41); + break; + case MODULE_PRESENT_49: + reg = 0x18; + mask = 0x1; + break; + case MODULE_PRESENT_50: + reg = 0x18; + mask = 0x2; + break; + case MODULE_PRESENT_51: + reg = 0x18; + mask = 0x4; + break; + case MODULE_PRESENT_52: + reg = 0x18; + mask = 0x8; + break; + case MODULE_PRESENT_53: + reg = 0x18; + mask = 0x1; + break; + case MODULE_PRESENT_54: + reg = 0x18; + mask = 0x2; + break; + + case MODULE_RESET_49 ... MODULE_RESET_54: + reg = 0x17; + mask = 1 << ((attr->index - MODULE_PRESENT_49)%4); + break; + + case MODULE_TXFAULT_1 ... MODULE_TXFAULT_8: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_TXFAULT_1); + break; + case MODULE_TXFAULT_9 ... MODULE_TXFAULT_16: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXFAULT_9); + break; + case MODULE_TXFAULT_17 ... MODULE_TXFAULT_24: + reg = 0xE; + mask = 0x1 << (attr->index - MODULE_TXFAULT_17); + break; + case MODULE_TXFAULT_25 ... MODULE_TXFAULT_32: + reg = 0xC; + mask = 0x1 << (attr->index - MODULE_TXFAULT_25); + break; + case MODULE_TXFAULT_33 ... MODULE_TXFAULT_40: + reg = 0xD; + mask = 0x1 << (attr->index - MODULE_TXFAULT_33); + break; + case MODULE_TXFAULT_41 ... MODULE_TXFAULT_48: + reg = 0xE; + mask = 0x1 << (attr->index - MODULE_TXFAULT_41); + break; + case MODULE_TXDISABLE_1 ... MODULE_TXDISABLE_8: + reg = 0xF; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_1); + break; + case MODULE_TXDISABLE_9 ... MODULE_TXDISABLE_16: + reg = 0x10; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_9); + break; + case MODULE_TXDISABLE_17 ... MODULE_TXDISABLE_24: + reg = 0x11; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_17); + break; + case MODULE_TXDISABLE_25 ... MODULE_TXDISABLE_32: + reg = 0xF; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_25); + break; + case MODULE_TXDISABLE_33 ... MODULE_TXDISABLE_40: + reg = 0x10; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_33); + break; + case MODULE_TXDISABLE_41 ... MODULE_TXDISABLE_48: + reg = 0x11; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_41); + break; + case MODULE_RXLOS_1 ... MODULE_RXLOS_8: + reg = 0x12; + mask = 0x1 << (attr->index - MODULE_RXLOS_1); + break; + case MODULE_RXLOS_9 ... MODULE_RXLOS_16: + reg = 0x13; + mask = 0x1 << (attr->index - MODULE_RXLOS_9); + break; + case MODULE_RXLOS_17 ... MODULE_RXLOS_24: + reg = 0x14; + mask = 0x1 << (attr->index - MODULE_RXLOS_17); + break; + case MODULE_RXLOS_25 ... MODULE_RXLOS_32: + reg = 0x12; + mask = 0x1 << (attr->index - MODULE_RXLOS_25); + break; + case MODULE_RXLOS_33 ... MODULE_RXLOS_40: + reg = 0x13; + mask = 0x1 << (attr->index - MODULE_RXLOS_33); + break; + case MODULE_RXLOS_41 ... MODULE_RXLOS_48: + reg = 0x14; + mask = 0x1 << (attr->index - MODULE_RXLOS_41); + break; + default: + return 0; + } + + if (attr->index >= MODULE_PRESENT_1 && attr->index <= MODULE_PRESENT_54) { + revert = 1; + } + + mutex_lock(&data->update_lock); + status = as7312_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", revert ? !(status & mask) : !!(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_cpld_data *data = i2c_get_clientdata(client); + long reset; + int status; + u8 reg = 0, mask = 0; + + status = kstrtol(buf, 10, &reset); + if (status) { + return status; + } + + switch (attr->index) { + case MODULE_RESET_49 ... MODULE_RESET_54: + reg = 0x17; + mask = 1 << ((attr->index - MODULE_RESET_49)%4); + break; + default: + return 0; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as7312_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update reset status */ + if (reset) { + status |= mask; + } + else { + status &= ~mask; + } + status = as7312_54x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + + + + +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_cpld_data *data = i2c_get_clientdata(client); + long disable; + int status; + u8 reg = 0, mask = 0; + + status = kstrtol(buf, 10, &disable); + if (status) { + return status; + } + + switch (attr->index) { + case MODULE_TXDISABLE_1 ... MODULE_TXDISABLE_8: + reg = 0xF; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_1); + break; + case MODULE_TXDISABLE_9 ... MODULE_TXDISABLE_16: + reg = 0x10; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_9); + break; + case MODULE_TXDISABLE_17 ... MODULE_TXDISABLE_24: + reg = 0x11; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_17); + break; + case MODULE_TXDISABLE_25 ... MODULE_TXDISABLE_32: + reg = 0xF; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_25); + break; + case MODULE_TXDISABLE_33 ... MODULE_TXDISABLE_40: + reg = 0x10; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_33); + break; + case MODULE_TXDISABLE_41 ... MODULE_TXDISABLE_48: + reg = 0x11; + mask = 0x1 << (attr->index - MODULE_TXDISABLE_41); + break; + default: + return 0; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as7312_54x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update tx_disable status */ + if (disable) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as7312_54x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct as7312_54x_cpld_data *data = i2c_get_clientdata(client); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = as7312_54x_cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static void as7312_54x_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as7312_54x_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, 0x1); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d", val); +} + +/* + * I2C init/probing/exit functions + */ +static int as7312_54x_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + struct as7312_54x_cpld_data *data; + int ret = -ENODEV; + const struct attribute_group *group = NULL; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + goto exit; + + data = kzalloc(sizeof(struct as7312_54x_cpld_data), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->type = id->driver_data; + + /* Register sysfs hooks */ + switch (data->type) { + case as7312_54x_cpld1: + group = &as7312_54x_cpld1_group; + break; + case as7312_54x_cpld2: + group = &as7312_54x_cpld2_group; + break; + case as7312_54x_cpld3: + group = &as7312_54x_cpld3_group; + break; + default: + break; + } + + if (group) { + ret = sysfs_create_group(&client->dev.kobj, group); + if (ret) { + goto exit_free; + } + } + + as7312_54x_cpld_add_client(client); + return 0; + +exit_free: + kfree(data); +exit: + return ret; +} + +static int as7312_54x_cpld_remove(struct i2c_client *client) +{ + struct as7312_54x_cpld_data *data = i2c_get_clientdata(client); + const struct attribute_group *group = NULL; + + as7312_54x_cpld_remove_client(client); + + /* Remove sysfs hooks */ + switch (data->type) { + case as7312_54x_cpld1: + group = &as7312_54x_cpld1_group; + break; + case as7312_54x_cpld2: + group = &as7312_54x_cpld2_group; + break; + case as7312_54x_cpld3: + group = &as7312_54x_cpld3_group; + break; + default: + break; + } + + if (group) { + sysfs_remove_group(&client->dev.kobj, group); + } + + kfree(data); + + return 0; +} + +static int as7312_54x_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int as7312_54x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +int as7312_54x_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as7312_54x_cpld_read_internal(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as7312_54x_cpld_read); + +int as7312_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as7312_54x_cpld_write_internal(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as7312_54x_cpld_write); + +static struct i2c_driver as7312_54x_cpld_driver = { + .driver = { + .name = "as7312_54x_cpld", + .owner = THIS_MODULE, + }, + .probe = as7312_54x_cpld_probe, + .remove = as7312_54x_cpld_remove, + .id_table = as7312_54x_cpld_id, +}; + +static int __init as7312_54x_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as7312_54x_cpld_driver); +} + +static void __exit as7312_54x_cpld_exit(void) +{ + i2c_del_driver(&as7312_54x_cpld_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("Accton I2C CPLD driver"); +MODULE_LICENSE("GPL"); + +module_init(as7312_54x_cpld_init); +module_exit(as7312_54x_cpld_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/ym2651y.c new file mode 120000 index 00000000000..f4d67640ccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/ym2651y.c @@ -0,0 +1 @@ +../../common/modules/ym2651y.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/service/as7312-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/service/as7312-platform-monitor.service new file mode 100755 index 00000000000..b79357665be --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/service/as7312-platform-monitor.service @@ -0,0 +1,17 @@ +[Unit] +Description=Accton AS7312-54X Platform Monitoring service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/accton_as7312_util.py install +ExecStart=/usr/local/bin/accton_as7312_monitor.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/setup.py new file mode 100755 index 00000000000..d1351ab3e59 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as7312_54xs', + version='1.0', + description='Module to initialize Accton AS7312-54XS platforms', + + packages=['as7312_54xs'], + package_dir={'as7312_54xs': 'as7312-54xs/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/utils/README b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/utils/README new file mode 100755 index 00000000000..66f31a03042 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/utils/README @@ -0,0 +1,117 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +Contents of this package: + patch - files under patch/ is for kernel and ONIE installer + for the kernel: + config-accton-as7312_54x.patch + for kernel configuration. + driver-i2c-muxes-pca954x-always-deselect.patch + for i2c_mux deselects after transaction. + driver-patches-for-accton-as7312-fan-psu-cpld.patch + for as7312's fan/psu/cpld/led/sfp drivers. + for ONIE: + onie_installer-accton-AS7312-54X.patch + for console port setting and copy util script o rootfs. + module - Contains source code of as7312 kernel driver modules. + +The late Sonic building scripts, pushed @Dec 5 2016, will automatically +create a docker container and run building process under it. +User is not necessary to handle docker environment creation. + +1. Download sonic-buildimage environment. + - Run "git clone https://github.com/Azure/sonic-buildimage". + - cd to sonic-buildimage and run "git submodule update --init --recursive". +2. Build kernel + - cd ./src/sonic-linux-kernel + - Copy patches and series from patch/kernel of this release to + sonic-linux-kernel/patch. + - Build kernel by "make". + - The built kernel package, linux-image-3.16.0-5-amd64_3.16.51-3+deb8u1_amd64.deb + , is generated. +3. Build installer + - Change directory back to sonic-buildimage/. + - Get onie_installer-accton-AS7312-54X.patch" from patch/installer. + - Change setting for AS7312-54X by patching build_image.sh. + "patch -p1 < onie_installer-accton-AS7312-54X.patch" + !!NOTICE, patching onie_installer-accton-AS7312-54X.patch comments out the + "git status" checking at build_image.sh. + - The account and password of installed OS can be given at rules/config. + The default user and password are "admin" & "YourPaSsWoRd" respectively. + - Run "make configure PLATFORM=broadcom" + - Copy the built kernel debian package to target/debs/. + The file is linux-image-3.16.0-5-amd64_*_amd64.deb under directory + src/sonic-linux-kernel/. + - Run "make target/sonic-generic.bin" + - Get the installer, target/sonic-generic.bin, to target machine and install. + +All Linux kernel code is licensed under the GPLv1. All other code is +licensed under the GPLv3. Please see the LICENSE file for copies of +both licenses. + +The code for integacting with Accton AS7312-54X has 2 parts, +kernel drivers and operational script. +The kernel drivers of peripherals are under module/ directory. +1. These drivers are patched into kernel by + driver-patches-for-accton-as7312-fan-psu-cpld.patch + Or you can build the driver under module/ by setting environment variable, + KERNEL_SRC, to proper linux built directory and run make. + It may be sonic-linux-kernel/linux-3.*/debian/build/build_amd64_none_amd64/. +2. A operational script, accton_as7312_util.py, for device initializatian and + peripheral accessing should be installed at /usr/bin. + This script is generated by onie_installer-accton-AS7312-54X.patch. + It's done by patching onie_installer-accton-AS7312-54X.patch at build-image. + Run "accton_as7312_util.py install" to install drivers. + +To initialize the system, run "accton_as7312_util.py install". +To clean up the drivers & devices, run "accton_as7312_util.py clean". +To dump information of sensors, run "accton_as7312_util.py show". +To dump SFP EEPROM, run "accton_as7312_util.py sff". +To set fan speed, run "accton_as7312_util.py set fan". +To enable/disable SFP emission, run "accton_as7312_util.py set sfp". +To set system LEDs' color, run "accton_as7312_util.py set led" +For more information, run "accton_as7312_util.py --help". + +==================================================================== +Besides applying accton_as7312_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +System LED: + There are 5 system LEDs at the lower-left corner of front panel. + They are loc, diag, fan, ps1, and ps2. + The sysfs interface color mappings are as follows: + Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + But not all colors are available for each LED. + +Fan Control: + There are 10 fans inside 5 fan modules. + All fans share 1 duty setting, ranged from 0~100. + +Thermal sensers: + 3 temperature sensors are controlled by the lm75 kernel modules. + +PSUs: + There 2 power supplies slot at the left/right side of the back. + Once if a PSU is not plugged, the status of it is shown failed. + +There are 48 SFP+ and 6 QSFP modules are equipped. +Before operating on PSU and QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/utils/accton_as7312_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/utils/accton_as7312_monitor.py new file mode 100755 index 00000000000..09bc99c75ab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/utils/accton_as7312_monitor.py @@ -0,0 +1,223 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# 2/27/2018: Roy Lee modify for as7312_54x +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import types + import time # this is only being used as part of the example + import traceback + import signal + from tabulate import tabulate + from as7312_54xs.fanutil import FanUtil + from as7312_54xs.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = 'accton_as7312_monitor' +DUTY_MAX = 100 + +global log_file +global log_level + +# (LM75_1+ LM75_2+ LM75_3) is LM75 at i2c addresses 0x48, 0x49, and 0x4A. +# TMP = (LM75_1+ LM75_2+ LM75_3)/3 +#1. If TMP < 35, All fans run with duty 31.25%. +#2. If TMP>=35 or the temperature of any one of fan is higher than 40, +# All fans run with duty 50% +#3. If TMP >= 40 or the temperature of any one of fan is higher than 45, +# All fans run with duty 62.5%. +#4. If TMP >= 45 or the temperature of any one of fan is higher than 50, +# All fans run with duty 100%. +#5. Any one of 6 fans is fault, set duty = 100%. +#6. Direction factor. If it is B2F direction, duty + 12%. + + # MISC: + # 1.Check single LM75 before applied average. + # 2.If no matched fan speed is found from the policy, + # use FAN_DUTY_CYCLE_MIN as default speed + # Get current temperature + # 4.Decision 3: Decide new fan speed depend on fan direction/current fan speed/temperature + + + + +# Make a class we can use to capture stdout and sterr in the log +class accton_as7312_monitor(object): + # static temp var + llog = logging.getLogger("["+FUNCTION_NAME+"]") + _ori_temp = 0 + _new_perc = 0 + _ori_perc = 0 + + def __init__(self, log_console, log_file, log_level=logging.INFO): + """Needs a logger and a logger level.""" + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + sys_handler.setLevel(log_level) + self.llog.addHandler(sys_handler) + + if log_file: + fh = logging.FileHandler(log_file) + fh.setLevel(logging.DEBUG) + formatter = logging.Formatter('%(asctime)-15s %(name)s %(message)s') + fh.setFormatter(formatter) + self.llog.addHandler(fh) + + if log_console: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(asctime)-15s %(name)s %(message)s') + console.setFormatter(formatter) + self.llog.addHandler(console) + + + def manage_fans(self): + max_duty = DUTY_MAX + fan_policy_f2b = { + 0: [32, 0, 105000], + 1: [50, 105000, 120000], + 2: [63, 120000, 135000], + 3: [max_duty, 135000, sys.maxsize], + } + fan_policy_b2f = { + 0: [44, 0, 105000], + 1: [63, 105000, 120000], + 2: [75, 120000, 135000], + 3: [max_duty, 135000, sys.maxsize], + } + fan_policy_single = { + 0: 40000, + 1: 45000, + 2: 50000, + } + + thermal = ThermalUtil() + fan = FanUtil() + for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): + fan_status = fan.get_fan_status(x) + if fan_status is None: + self.llog.debug('SET new_perc to %d (FAN stauts is None. fan_num:%d)', max_duty, x) + return False + if fan_status is False: + self.llog.warning('SET new_perc to %d (FAN fault. fan_num:%d)', max_duty, x) + fan.set_fan_duty_cycle(max_duty) + return True + + fan_dir=fan.get_fan_dir(1) + if fan_dir == 1: + fan_policy = fan_policy_f2b + else: + fan_policy = fan_policy_b2f + + #Decide fan duty by if any of sensors > fan_policy_single. + new_duty_cycle = fan_policy[0][0] + for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): + single_thm = thermal._get_thermal_node_val(x) + for y in range(0, len(fan_policy_single)): + if single_thm > fan_policy_single[y]: + if fan_policy[y+1][0] > new_duty_cycle: + new_duty_cycle = fan_policy[y+1][0] + self.llog.debug('Single thermal sensor %d with temp %d > %d , new_duty_cycle=%d', + x, single_thm, fan_policy_single[y], new_duty_cycle) + single_result = new_duty_cycle + + + #Find if current duty matched any of define duty. + #If not, set it to highest one. + cur_duty_cycle = fan.get_fan_duty_cycle() + for x in range(0, len(fan_policy)): + if cur_duty_cycle == fan_policy[x][0]: + break + if x == len(fan_policy) : + fan.set_fan_duty_cycle(fan_policy[0][0]) + cur_duty_cycle = max_duty + + #Decide fan duty by if sum of sensors falls into any of fan_policy{} + get_temp = thermal.get_thermal_temp() + new_duty_cycle = cur_duty_cycle + for x in range(0, len(fan_policy)): + y = len(fan_policy) - x -1 #checked from highest + if get_temp > fan_policy[y][1] and get_temp < fan_policy[y][2] : + new_duty_cycle= fan_policy[y][0] + self.llog.debug('Sum of temp %d > %d , new_duty_cycle=%d', get_temp, fan_policy[y][1], new_duty_cycle) + + sum_result = new_duty_cycle + if (sum_result>single_result): + new_duty_cycle = sum_result; + else: + new_duty_cycle = single_result + + self.llog.debug('Final duty_cycle=%d', new_duty_cycle) + if(new_duty_cycle != cur_duty_cycle): + fan.set_fan_duty_cycle(new_duty_cycle) + return True + +def sig_handler(signum, frame): + fan = FanUtil() + logging.critical('Cause signal %d, set fan speed max.', signum) + fan.set_fan_duty_cycle(DUTY_MAX) + sys.exit(0) + +def main(argv): + log_level = logging.INFO + log_console = 0 + log_file = "" + + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl') + except getopt.GetoptError: + print 'Usage: %s [-d]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l]' % sys.argv[0] + return 0 + elif opt in ('-d'): + log_console = 1 + elif opt in ('-l'): + log_file = '%s.log' % sys.argv[0] + + signal.signal(signal.SIGINT, sig_handler) + signal.signal(signal.SIGTERM, sig_handler) + monitor = accton_as7312_monitor(log_console, log_file) + + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(10) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/utils/accton_as7312_util.py b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/utils/accton_as7312_util.py new file mode 100755 index 00000000000..9b5803b07af --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/utils/accton_as7312_util.py @@ -0,0 +1,588 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + + + + +PROJECT_NAME = 'as7312_54x' +version = '0.1.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan':6,'thermal':4, 'psu':2, 'sfp':54} +FORCE = 0 +#logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +#logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-54 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-54 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ROY]"+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_check(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + return True + + + +kos = [ +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe accton_i2c_cpld' , +'modprobe ym2651y' , +'modprobe accton_as7312_54x_fan' , +'modprobe optoe' , +'modprobe accton_as7312_54x_leds' , +'modprobe accton_as7312_54x_psu' ] + +def driver_install(): + global FORCE + status, output = log_os_system("depmod", 1) + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + lst = rm.split(" ") + if len(lst) > 3: + del(lst[3]) + rm = " ".join(lst) + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +led_prefix ='/sys/class/leds/accton_'+PROJECT_NAME+'_led::' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2']} +hwmon_nodes = {'led': ['brightness'] } +hwmon_prefix ={'led': led_prefix} + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'fan': ['2-0066'] , + 'thermal': ['3-0048','3-0049', '3-004a', '3-004b'] , + 'psu': ['10-0051','11-0053'], + 'sfp': ['-0050']} +i2c_nodes = {'fan': ['present', 'front_speed_rpm', 'rear_speed_rpm'] , + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['sfp_is_present', 'sfp_tx_disable']} + +sfp_map = [18,19,20,21,22,23,24,25,26,27, + 28,29,30,31,32,33,34,35,36,37, + 38,39,40,41,42,43,44,45,46,47, + 48,49,50,51,52,53,54,55,56,57, + 58,59,60,61,62,63,64,65,66,67, + 68,69,70,71] + +qsfp_start = 48 + +mknod =[ +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-0/new_device' , +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-1/new_device' , +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-1/new_device' , +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-1/new_device', + +'echo as7312_54x_fan 0x66 > /sys/bus/i2c/devices/i2c-2/new_device ', +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-3/new_device', +'echo as7312_54x_psu1 0x51 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo ym2651 0x59 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as7312_54x_psu2 0x50 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo ym2651 0x58 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo as7312_54x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-4/new_device', +'echo as7312_54x_cpld2 0x62 > /sys/bus/i2c/devices/i2c-5/new_device', +'echo as7312_54x_cpld3 0x64 > /sys/bus/i2c/devices/i2c-6/new_device'] + +mknod2 =[ +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-1/new_device' , +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-0/new_device' , +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-0/new_device' , +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-0/new_device', + +'echo as7312_54x_fan 0x66 > /sys/bus/i2c/devices/i2c-2/new_device ', +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-3/new_device', +'echo as7312_54x_psu1 0x51 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo ym2651 0x59 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as7312_54x_psu2 0x50 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo ym2651 0x58 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo as7312_54x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-4/new_device', +'echo as7312_54x_cpld2 0x62 > /sys/bus/i2c/devices/i2c-5/new_device', +'echo as7312_54x_cpld3 0x64 > /sys/bus/i2c/devices/i2c-6/new_device'] + + + +def i2c_order_check(): + # i2c bus 0 and 1 might be installed in different order. + # Here check if 0x70 is exist @ i2c-1 + tmp = "echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device" + status, output = log_os_system(tmp, 0) + if not device_exist(): + order = 1 + else: + order = 0 + tmp = "echo 0x70 > /sys/bus/i2c/devices/i2c-1/delete_device" + status, output = log_os_system(tmp, 0) + return order + +def device_install(): + global FORCE + + order = i2c_order_check() + + # if 0x70 is not exist @i2c-1, use reversed bus order + if order: + for i in range(0,len(mknod2)): + #for pca954x need times to built new i2c buses + if mknod2[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod2[i], 1) + if status: + print output + if FORCE == 0: + return status + else: + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + for i in range(0,len(sfp_map)): + if i < qsfp_start: + status, output =log_os_system("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + else: + status, output =log_os_system("echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/1-0076", 0) + if status==0: + I2C_ORDER=1 + else: + I2C_ORDER=0 + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + if I2C_ORDER==0: + nodelist = mknod + else: + nodelist = mknod2 + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_check() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_check() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_check()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'sfp_eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan'] ['fan1'][0] + node = node.replace(node.split("/")[-1], 'fan_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0070", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/classes/fanutil.py new file mode 100644 index 00000000000..0e7b06bbd28 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/classes/fanutil.py @@ -0,0 +1,214 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# 5/02/2019: Roy Lee modify for as7816_64x +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_TOTAL_NUM = 5 + FAN_NUM_1_IDX = 1 + + FAN_NODE_NUM = 2 + FAN_FAULT_IDX = 1 + #FAN_SPEED_IDX = 2 + FAN_DIR_IDX = 2 + #FAN_NODE_DUTY_IDX_OF_MAP = 4 + #FANR_NODE_FAULT_IDX_OF_MAP = 5 + + BASE_VAL_PATH = '/sys/bus/i2c/devices/50-0066/{0}' + FAN_DUTY_PATH = '/sys/bus/i2c/devices/50-0066/fan{0}_pwm' + + #logfile = '' + #loglevel = self.logger.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + dev_paths = {} + + node_postfix = ["fault", "direction"] + def _get_fan_to_device_node(self, fan_num, node_num): + return "fan{0}_{1}".format(fan_num, self.node_postfix[node_num-1]) + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_TOTAL_NUM: + self.logger.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_FAULT_IDX or node_num > self.FAN_NODE_NUM: + self.logger.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + + try: + val_file = open(device_path, 'r') + except IOError as e: + self.logger.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + self.logger.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + self.logger.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_TOTAL_NUM: + self.logger.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_FAULT_IDX or node_num > self.FAN_NODE_NUM: + self.logger.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + self.logger.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + self.logger.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + self.logger.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + logger = logging.getLogger(__name__) + def __init__(self, log_level=logging.DEBUG): + ch = logging.StreamHandler() + ch.setLevel(log_level) + self.logger.addHandler(ch) + + fan_path = self.BASE_VAL_PATH + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_TOTAL_NUM+1): + for node_num in range(1, self.FAN_NODE_NUM+1): + node = self._get_fan_to_device_node(fan_num, node_num) + self.dev_paths[(fan_num, node_num)] = fan_path.format(node) + + def get_num_fans(self): + return self.FAN_TOTAL_NUM + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM + + def get_idx_node_start(self): + return self.FAN_FAULT_IDX + + def get_size_node_map(self): + return len(self.dev_paths) + + def get_size_path_map(self): + return len(self.dev_paths) + + def get_fan_to_device_path(self, fan_num, node_num): + return self.dev_paths[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_FAULT_IDX) + + #def get_fan_speed(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FAN_SPEED_IDX) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_DIR_IDX) + + def get_fan_duty_cycle(self): + try: + val_file = open(self.FAN_DUTY_PATH.format(1)) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + return int(content) + + def set_fan_duty_cycle(self, val): + for fan_num in range(1, self.FAN_TOTAL_NUM+1): + try: + fan_file = open(self.FAN_DUTY_PATH.format(fan_num), 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + fan_file.write(str(val)) + fan_file.close() + return True + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_TOTAL_NUM: + self.logger.debug('GET. Parameter error. fan_num, %d', fan_num) + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + self.logger.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + #if self.get_fanr_fault(fan_num) is not None and self.get_fanr_fault(fan_num) > 0: + # self.logger.debug('GET. FANR fault. fan_num, %d', fan_num) + # return False + + return True + +#def main(): +# fan = FanUtil() +# +# print 'get_size_node_map : %d' % fan.get_size_node_map() +# print 'get_size_path_map : %d' % fan.get_size_path_map() +# for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): +# for y in range(fan.get_idx_node_start(), fan.get_num_nodes()+1): +# print fan.get_fan_to_device_path(x, y) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/classes/thermalutil.py new file mode 100644 index 00000000000..47dba67f2c1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/classes/thermalutil.py @@ -0,0 +1,128 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018:Jostar modify for as7716_32x +# 5/02/2019: Roy Lee modify for as7816_64x +# ------------------------------------------------------------------ + +try: + import time + import logging + import glob + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + + THERMAL_NUM_ON_MAIN_BROAD = 3 + THERMAL_NUM_1_IDX = 1 + BASE_VAL_PATH = '/sys/bus/i2c/devices/{0}-00{1}/hwmon/hwmon*/temp1_input' + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + _thermal_to_device_path_mapping = {} + + _thermal_to_device_node_mapping = [ + ['51', '49'], + ['52', '4a'], + ['53', '4c'], + ] + logger = logging.getLogger(__name__) + def __init__(self, log_level=logging.DEBUG): + ch = logging.StreamHandler() + ch.setLevel(log_level) + self.logger.addHandler(ch) + + thermal_path = self.BASE_VAL_PATH + for x in range(self.THERMAL_NUM_ON_MAIN_BROAD): + self._thermal_to_device_path_mapping[x+1] = thermal_path.format( + self._thermal_to_device_node_mapping[x][0], + self._thermal_to_device_node_mapping[x][1]) + + def _get_thermal_node_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_ON_MAIN_BROAD: + self.logger.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_to_device_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + self.logger.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + self.logger.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + self.logger.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + + def get_num_thermals(self): + return self.THERMAL_NUM_ON_MAIN_BROAD + + def get_idx_thermal_start(self): + return self.THERMAL_NUM_1_IDX + + def get_size_node_map(self): + return len(self._thermal_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._thermal_to_device_path_mapping) + + def get_thermal_to_device_path(self, thermal_num): + return self._thermal_to_device_path_mapping[thermal_num] + + def get_thermal_2_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) + + def get_thermal_temp(self): + sum = 0 + o = [] + for x in range(self.THERMAL_NUM_ON_MAIN_BROAD): + sum += self._get_thermal_node_val(x+1) + avg = sum/self.THERMAL_NUM_ON_MAIN_BROAD + avg = (avg/1000)*1000 #round down for hysteresis. + return avg + +#def main(): +# thermal = ThermalUtil() +# +# print 'get_size_node_map : %d' % thermal.get_size_node_map() +# print 'get_size_path_map : %d' % thermal.get_size_path_map() +# for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): +# print thermal.get_thermal_to_device_path(x) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/Makefile new file mode 100644 index 00000000000..a1bf8335378 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/Makefile @@ -0,0 +1,2 @@ +obj-m:= accton_as7315_27xb_fan.o x86-64-accton-as7315-27xb-cpld.o x86-64-accton-as7315-27xb-psu.o \ + at24_as7315_27xb.o x86-64-accton-as7315-27xb-led.o ym2651y.o diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/accton_as7315_27xb_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/accton_as7315_27xb_fan.c new file mode 100644 index 00000000000..adf8fc69ea3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/accton_as7315_27xb_fan.c @@ -0,0 +1,673 @@ +/* + * A hwmon driver for the Accton as5710 54x fan contrl + * + * Copyright (C) 2013 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define DRV_NAME "as5812_54x_fan" + +#define FAN_MAX_NUMBER 5 +#define FAN_SPEED_TACH_TO_RPM_STEP 175 +#define FAN_SPEED_PWM_STEPS 31 +#define FAN_DUTY_CYCLE_MIN 0 /* 10% ??*/ +#define FAN_DUTY_CYCLE_MAX 100 /* 100% */ + + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ +#define ATTR_ALLOC_SIZE 1 /*For last attribute which is NUll.*/ +#define NAME_SIZE 24 + +typedef ssize_t (*show_func)( struct device *dev, + struct device_attribute *attr, + char *buf); +typedef ssize_t (*store_func)(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count); + + +struct fan_sensor { + struct fan_sensor *next; + char name[NAME_SIZE+1]; /* sysfs sensor name */ + struct device_attribute attribute; + bool update; /* runtime sensor update needed */ + int data; /* Sensor data. Negative if there was a read error */ + + u8 reg; /* register */ + u8 mask; /* bit mask */ + bool invert; /* inverted value*/ + +}; + +#define to_fan_sensor(_attr) \ + container_of(_attr, struct fan_sensor, attribute) + + +struct model_attrs { + struct attrs **cmn; + struct attrs **indiv; +}; + + +struct fan_data_t { + struct device *dev; + struct device *hwmon_dev; + + int num_attributes; + struct attribute_group group; + struct fan_sensor *sensors; + int attr_index; + struct model_attrs *attrs; + + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + + u8 fan_num; + + u8 status[FAN_MAX_NUMBER]; /* inner first fan status */ + u32 speed[FAN_MAX_NUMBER]; /* inner first fan speed */ + u8 direction[FAN_MAX_NUMBER]; /* reconrd the direction of inner first and second fans */ + u32 duty_cycle[FAN_MAX_NUMBER]; /* control the speed of inner first and second fans */ + u8 r_status[FAN_MAX_NUMBER]; /* inner second fan status */ + u32 r_speed[FAN_MAX_NUMBER]; /* inner second fan speed */ +}; + +static ssize_t show_bit(struct device *dev, + struct device_attribute *devattr, char *buf); +static ssize_t show_byte(struct device *dev, + struct device_attribute *devattr, char *buf); +static ssize_t set_1bit(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t set_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_pwm(struct device *dev, + struct device_attribute *devattr, char *buf); +static ssize_t show_rpm(struct device *dev, + struct device_attribute *devattr, char *buf); + +struct base_attrs { + const char *name; + umode_t mode; + show_func get; + store_func set; +}; + +struct attrs { + int reg; + int mask; + bool invert; + struct base_attrs *base; +}; + +enum common_attrs { + BRD_VERSION, + PLD_VERSION, + PLD_SVERSION, + NUM_COMMON_ATTR +}; + +struct base_attrs common_base_attrs[NUM_COMMON_ATTR] = +{ + [BRD_VERSION] = {"borad_ver", S_IRUGO, show_byte, NULL}, + [PLD_VERSION] = {"cpld_ver", S_IRUGO, show_byte, NULL}, + [PLD_SVERSION] = {"cpld_subver", S_IRUGO, show_byte, NULL}, +}; + +struct attrs common_attrs[] = { + [BRD_VERSION] = {0x00, -1, false, &common_base_attrs[BRD_VERSION]}, + [PLD_VERSION] = {0x01, -1, false, &common_base_attrs[PLD_VERSION]}, + [PLD_SVERSION] = {0x02, -1, false, &common_base_attrs[PLD_SVERSION]}, +}; + +struct attrs *as7315_cmn_list[] = { + &common_attrs[BRD_VERSION], + &common_attrs[PLD_VERSION], + &common_attrs[PLD_SVERSION], + NULL +}; + +enum fan_attrs { + _ENABLE, + _PRESENT, + _FAULT, + _SPEED_RPM, + _PWM, + _DIRECTION, + NUM_FAN_ATTRS +}; + +struct base_attrs tray_base_attrs[NUM_FAN_ATTRS] = +{ + {"enable", S_IRUGO|S_IWUSR, show_bit, set_1bit}, + {"present", S_IRUGO, show_bit, NULL}, + {"fault", S_IRUGO, show_bit, NULL}, + {"input", S_IRUGO, show_rpm, NULL}, + {"pwm", S_IRUGO|S_IWUSR, show_pwm, set_pwm}, + {"dir", S_IRUGO, show_bit, NULL}, +}; + +struct attrs as7315_module[NUM_FAN_ATTRS] = { + {0x10, -1, false, &tray_base_attrs[_ENABLE]}, + {0x22, 0, true, &tray_base_attrs[_PRESENT]}, + {0x22, 1, false, &tray_base_attrs[_FAULT]}, + {0x20, 0, false, &tray_base_attrs[_SPEED_RPM]}, + {0x21, 0, false, &tray_base_attrs[_PWM]}, + {-1, -1, false, &tray_base_attrs[_DIRECTION]}, +}; + +struct attrs *as7315_mod_list[] = { + &as7315_module[_ENABLE], + &as7315_module[_PRESENT], + &as7315_module[_FAULT], + &as7315_module[_SPEED_RPM], + &as7315_module[_PWM], + NULL +}; + +struct model_attrs models_attr = { + .cmn = as7315_cmn_list, + .indiv = as7315_mod_list, +}; + + +static const struct i2c_device_id as7315_fan_id[] = { + { "as7315_fan", 0}, + { }, +}; +MODULE_DEVICE_TABLE(i2c, as7315_fan_id); + + +static int cpld_write_internal( + struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + break; + } + return status; +} + +static int cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + break; + } + return status; +} + +static ssize_t show_bit(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int value; + struct i2c_client *client = to_i2c_client(dev); + struct fan_data_t *data = i2c_get_clientdata(client); + struct fan_sensor *sensor = to_fan_sensor(devattr); + + mutex_lock(&data->update_lock); + value = cpld_read_internal(client, sensor->reg); + if (unlikely(value < 0)) { + mutex_unlock(&data->update_lock); + return value; + } + value = value & sensor->mask; + if (sensor->invert) + value = !value; + mutex_unlock(&data->update_lock); + + return snprintf(buf, PAGE_SIZE, "%x\n", !!value); +} + +static ssize_t _read_1byte(struct device *dev, + struct device_attribute *devattr, u8 *data) +{ + int rv; + struct i2c_client *client = to_i2c_client(dev); + struct fan_data_t *fdata = i2c_get_clientdata(client); + struct fan_sensor *sensor = to_fan_sensor(devattr); + + mutex_lock(&fdata->update_lock); + rv = cpld_read_internal(client, sensor->reg); + if (unlikely(rv < 0)) { + mutex_unlock(&fdata->update_lock); + return rv; + } + mutex_unlock(&fdata->update_lock); + *data = rv; + return 0; +} + +static ssize_t show_byte(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + u8 data; + int rv; + + rv =_read_1byte(dev, devattr, &data); + if (unlikely(rv < 0)) { + return rv; + } + return snprintf(buf, PAGE_SIZE, "0x%x\n", data); +} + + +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + return ((u32)(reg_val+1) * 156 + 88) / 100; +} +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + return ((u32)duty_cycle * 100 / 155) - 1; +} + +static ssize_t show_pwm(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + u8 data; + int rv; + + rv =_read_1byte(dev, devattr, &data); + if (unlikely(rv < 0)) { + return rv; + } + data = reg_val_to_duty_cycle(data); + data = (data > FAN_DUTY_CYCLE_MAX)? FAN_DUTY_CYCLE_MAX: data; + return snprintf(buf, PAGE_SIZE, "%d\n", data); +} + +static ssize_t show_rpm(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + u8 data; + int rv; + + rv =_read_1byte(dev, devattr, &data); + if (unlikely(rv < 0)) { + return rv; + } + rv = data * FAN_SPEED_TACH_TO_RPM_STEP; + return snprintf(buf, PAGE_SIZE, "%d\n", rv); +} +static ssize_t set_1bit(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + long is_reset; + int value, status; + struct i2c_client *client = to_i2c_client(dev); + struct fan_data_t *data = i2c_get_clientdata(client); + struct fan_sensor *sensor = to_fan_sensor(devattr); + u8 cpld_bit, reg; + + status = kstrtol(buf, 10, &is_reset); + if (status) { + return status; + } + reg = sensor->reg; + cpld_bit = sensor->mask; + mutex_lock(&data->update_lock); + value = cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + if (sensor->invert) + is_reset = !is_reset; + + if (is_reset) { + value |= cpld_bit; + } + else { + value &= ~cpld_bit; + } + + status = cpld_write_internal(client, reg, value); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + + +static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + long value; + int status; + struct i2c_client *client = to_i2c_client(dev); + struct fan_data_t *data = i2c_get_clientdata(client); + struct fan_sensor *sensor = to_fan_sensor(devattr); + u8 reg; + + status = kstrtol(buf, 10, &value); + if (status) { + return status; + } + + value = (value > FAN_DUTY_CYCLE_MAX )? FAN_DUTY_CYCLE_MAX: value; + value = duty_cycle_to_reg_val(value); + reg = sensor->reg; + + mutex_lock(&data->update_lock); + status = cpld_write_internal(client, reg, value); + if (unlikely(status < 0)) { + mutex_unlock(&data->update_lock); + return status; + } + mutex_unlock(&data->update_lock); + return count; +} + + + +static int _add_attribute(struct fan_data_t *data, struct attribute *attr) +{ + int new_max_attrs = ++data->num_attributes + ATTR_ALLOC_SIZE; + void *new_attrs = krealloc(data->group.attrs, + new_max_attrs * sizeof(void *), + GFP_KERNEL); + + if (!new_attrs) + return -ENOMEM; + + data->group.attrs = new_attrs; + data->group.attrs[data->num_attributes-1] = attr; + data->group.attrs[data->num_attributes] = NULL; + + return 0; +} + +static void cpld_dev_attr_init(struct device_attribute *dev_attr, + const char *name, umode_t mode, + show_func show, store_func store) +{ + sysfs_attr_init(&dev_attr->attr); + dev_attr->attr.name = name; + dev_attr->attr.mode = mode; + dev_attr->show = show; + dev_attr->store = store; +} + +static struct fan_sensor * _add_sensor(struct fan_data_t *data, + const char *name, + u8 reg, u8 mask, bool invert, + bool update, umode_t mode, + show_func get, store_func set) +{ + struct fan_sensor *sensor; + struct device_attribute *a; + + sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return NULL; + a = &sensor->attribute; + + snprintf(sensor->name, sizeof(sensor->name), name); + sensor->reg = reg; + sensor->mask = mask; + sensor->update = update; + sensor->invert = invert; + cpld_dev_attr_init(a, sensor->name, + mode, + get, set); + + if (_add_attribute(data, &a->attr)) + return NULL; + + sensor->next = data->sensors; + data->sensors = sensor; + + return sensor; +} + +static int _add_attributes_cmn(struct fan_data_t *data, struct attrs **cmn) +{ + u8 reg, i ; + bool invert; + struct attrs *a; + struct base_attrs *b; + + if (NULL == cmn) + return -1; + + for (i = 0; cmn[i]; i++) + { + a = cmn[i]; + reg = a->reg; + invert = a->invert; + + + + b = a->base; + if (NULL == b) + break; + + + if (_add_sensor(data, b->name, + reg, 0xff, invert, + true, b->mode, + b->get, b->set) == NULL) + { + return -ENOMEM; + } + } + return 0; +} + +static int _add_attributes_indiv(struct fan_data_t *data, struct attrs **pa) +{ + char name[NAME_SIZE+1]; + int i, j, mask; + u8 reg, invert, reg_start, jump; + struct attrs *a; + struct base_attrs *b; + + if (NULL == pa) + return -EFAULT; + + jump = 0x10; + for (i = 0; pa[i]; i++) { + a = pa[i]; + reg_start = a->reg; + + if (reg < 0) + break; + + b = a->base; + if (b == NULL) + break; + invert = a->invert; + for (j = 0; j < data->fan_num; j++) + { + + snprintf(name, NAME_SIZE, "fan%d_%s", j+1, b->name); + /*If mask < 0, mask is as index*/ + if (a->mask < 0) { + mask = 1 << (j%8); + reg = reg_start; + } else { /*If mask >= 0, means to get full byte and reg need to shift*/ + mask = 1 << (a->mask); + reg = reg_start + ((j%8)*jump); + } + if (_add_sensor(data, name, reg, mask, invert, + true, b->mode, b->get, b->set) == NULL) + { + return -ENOMEM; + } + } + } + + + return 0; +} + +static int _add_attributes(struct i2c_client *client, + struct fan_data_t *data) +{ + struct model_attrs *m = data->attrs; + + if (m == NULL) + return -EINVAL; + + /* Common attributes.*/ + _add_attributes_cmn(data, m->cmn); + + /* Port-wise attributes.*/ + _add_attributes_indiv(data, m->indiv); + + return 0; +} + +static int fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + struct fan_data_t *data = NULL; + struct device *dev = &client->dev; + + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA)) + return -ENODEV; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) { + return -ENOMEM; + } + + data->attrs = &models_attr; + data->fan_num = FAN_MAX_NUMBER; + mutex_init(&data->update_lock); + data->dev = dev; + dev_info(dev, "chip found\n"); + + + status = _add_attributes(client, data); + if (status) { + return status; + } + + if (!data->num_attributes) { + dev_err(&client->dev, "No attributes found\n"); + return -ENODEV; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &data->group); + if (status) { + goto out_kfree; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, + client->name, NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_rm_sys; + } + + i2c_set_clientdata(client, data); + dev_info(dev, "%s: cpld '%s'\n", + dev_name(data->dev), client->name); + + return 0; + +exit_rm_sys: + sysfs_remove_group(&client->dev.kobj, &data->group); +out_kfree: + kfree(data->group.attrs); + return status; +} + + +static int fan_remove(struct i2c_client *client) +{ + struct fan_data_t *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->group); + kfree(data->group.attrs); + return 0; +} + + +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static struct i2c_driver as7315_i2c_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRV_NAME, + }, + .probe = fan_probe, + .remove = fan_remove, + .id_table = as7315_fan_id, + .address_list = normal_i2c, +}; + +static int __init accton_as7315_27xb_fan_init(void) +{ + return i2c_add_driver(&as7315_i2c_fan_driver); +} + +static void __exit accton_as7315_27xb_fan_exit(void) +{ + i2c_del_driver(&as7315_i2c_fan_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as7315_27xb_fan driver"); +MODULE_LICENSE("GPL"); + +module_init(accton_as7315_27xb_fan_init); +module_exit(accton_as7315_27xb_fan_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/at24_as7315_27xb.c b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/at24_as7315_27xb.c new file mode 100755 index 00000000000..8d8c7601a71 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/at24_as7315_27xb.c @@ -0,0 +1,695 @@ +/* + * at24_as7315_27xb.c - handle most I2C EEPROMs for ethernet switch, as7315_27xb. + * + * Copyright (C) 2005-2007 David Brownell + * Copyright (C) 2008 Wolfram Sang, Pengutronix + * Copyright (C) 2019 Roy Lee, EdgeCore network. + * Revised to support specially I2C transactions, pure READ and WRITE. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +/* + * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. + * Differences between different vendor product lines (like Atmel AT24C or + * MicroChip 24LC, etc) won't much matter for typical read/write access. + * There are also I2C RAM chips, likewise interchangeable. One example + * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). + * + * However, misconfiguration can lose data. "Set 16-bit memory address" + * to a part with 8-bit addressing will overwrite data. Writing with too + * big a page size also loses data. And it's not safe to assume that the + * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC + * uses 0x51, for just one example. + * + * Accordingly, explicit board-specific configuration data should be used + * in almost all cases. (One partial exception is an SMBus used to access + * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) + * + * So this driver uses "new style" I2C driver binding, expecting to be + * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or + * similar kernel-resident tables; or, configuration data coming from + * a bootloader. + * + * Other than binding model, current differences from "eeprom" driver are + * that this one handles write access and isn't restricted to 24c02 devices. + * It also handles larger devices (32 kbit and up) with two-byte addresses, + * which won't work on pure SMBus systems. + */ + +struct at24_data { + struct at24_platform_data chip; + int use_smbus; + int use_smbus_write; + + ssize_t (*read_func)(struct at24_data *, char *, unsigned int, size_t); + ssize_t (*write_func)(struct at24_data *, + const char *, unsigned int, size_t); + + /* + * Lock protects against activities from other Linux tasks, + * but not from changes by other I2C masters. + */ + struct mutex lock; + + u8 *writebuf; + unsigned write_max; + unsigned num_addresses; + + struct nvmem_config nvmem_config; + struct nvmem_device *nvmem; + + /* + * Some chips tie up multiple I2C addresses; dummy devices reserve + * them for us, and we'll use them with SMBus calls. + */ + struct i2c_client *client[]; +}; + +/* + * This parameter is to help this driver avoid blocking other drivers out + * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C + * clock, one 256 byte read takes about 1/43 second which is excessive; + * but the 1/170 second it takes at 400 kHz may be quite reasonable; and + * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. + * + * This value is forced to be a power of two so that writes align on pages. + */ +static unsigned io_limit = 128; +module_param(io_limit, uint, 0); +MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)"); + +/* + * Specs often allow 5 msec for a page write, sometimes 20 msec; + * it's important to recover from write timeouts. + */ +static unsigned write_timeout = 25; +module_param(write_timeout, uint, 0); +MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)"); + +#define AT24_SIZE_BYTELEN 5 +#define AT24_SIZE_FLAGS 8 + +#define AT24_BITMASK(x) (BIT(x) - 1) + +/* create non-zero magic value for given eeprom parameters */ +#define AT24_DEVICE_MAGIC(_len, _flags) \ + ((1 << AT24_SIZE_FLAGS | (_flags)) \ + << AT24_SIZE_BYTELEN | ilog2(_len)) + +/* + * Both reads and writes fail if the previous write didn't complete yet. This + * macro loops a few times waiting at least long enough for one entire page + * write to work while making sure that at least one iteration is run before + * checking the break condition. + * + * It takes two parameters: a variable in which the future timeout in jiffies + * will be stored and a temporary variable holding the time of the last + * iteration of processing the request. Both should be unsigned integers + * holding at least 32 bits. + */ +#define loop_until_timeout(tout, op_time) \ + for (tout = jiffies + msecs_to_jiffies(write_timeout), op_time = 0; \ + op_time ? time_before(op_time, tout) : true; \ + usleep_range(1000, 1500), op_time = jiffies) + +static const struct i2c_device_id at24_ids[] = { + { "24cxb04", AT24_DEVICE_MAGIC(4096 / 8, AT24_FLAG_ADDR16) }, + { "24cxb08", AT24_DEVICE_MAGIC(8192 / 8, AT24_FLAG_ADDR16) }, + { "24cxb16", AT24_DEVICE_MAGIC(16384 / 8, AT24_FLAG_ADDR16) }, + { "24cxb32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) }, + { "24cxb64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) }, + { "at24", 0 }, + { /* END OF LIST */ } +}; +MODULE_DEVICE_TABLE(i2c, at24_ids); + +static const struct acpi_device_id at24_acpi_ids[] = { + { "INT3499", AT24_DEVICE_MAGIC(8192 / 8, 0) }, + { } +}; +MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); + +/*-------------------------------------------------------------------------*/ + +/* + * This routine supports chips which consume multiple I2C addresses. It + * computes the addressing information to be used for a given r/w request. + * Assumes that sanity checks for offset happened at sysfs-layer. + * + * Slave address and byte offset derive from the offset. Always + * set the byte address; on a multi-master board, another master + * may have changed the chip's "current" address pointer. + * + * REVISIT some multi-address chips don't rollover page reads to + * the next slave address, so we may need to truncate the count. + * Those chips might need another quirk flag. + * + * If the real hardware used four adjacent 24c02 chips and that + * were misconfigured as one 24c08, that would be a similar effect: + * one "eeprom" file not four, but larger reads would fail when + * they crossed certain pages. + */ +static struct i2c_client *at24_translate_offset(struct at24_data *at24, + unsigned int *offset) +{ + unsigned i; + + /*Always AT24_FLAG_ADDR16*/ + i = *offset >> 16; + *offset &= 0xffff; + + return at24->client[i]; +} + +static ssize_t at24_eeprom_read_smbus(struct at24_data *at24, char *buf, + unsigned int offset, size_t count) +{ + unsigned long timeout, read_time; + struct i2c_client *client; + int status; + client = at24_translate_offset(at24, &offset); + + if (count > io_limit) + count = io_limit; + + loop_until_timeout(timeout, read_time) { +/* + status = i2c_smbus_read_i2c_block_data_or_emulated(client, + offset, + count, buf); + + dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", + count, offset, status, jiffies); +*/ + int i=0; + + /*Write 2-byte offset*/ + unsigned char bb = offset&0xff; + status = i2c_smbus_write_i2c_block_data(client, offset>>8, 1, &bb); + if (status < 0) { + return status; + } + + while (i < count) { + status = i2c_smbus_read_byte(client); + if (status < 0) { + return status; + } + buf[i] = status; + i++; + } + + + if (i == count) + return count; + } + + return -ETIMEDOUT; +} + +/* + * Note that if the hardware write-protect pin is pulled high, the whole + * chip is normally write protected. But there are plenty of product + * variants here, including OTP fuses and partial chip protect. + * + * We only use page mode writes; the alternative is sloooow. These routines + * write at most one page. + */ + +static size_t at24_adjust_write_count(struct at24_data *at24, + unsigned int offset, size_t count) +{ + unsigned next_page; + + /* write_max is at most a page */ + if (count > at24->write_max) + count = at24->write_max; + + /* Never roll over backwards, to the start of this page */ + next_page = roundup(offset + 1, at24->chip.page_size); + if (offset + count > next_page) + count = next_page - offset; + + return count; +} + +static ssize_t at24_eeprom_write_smbus_block(struct at24_data *at24, + const char *buf, + unsigned int offset, size_t count) +{ + unsigned long timeout, write_time; + struct i2c_client *client; + ssize_t status = 0; + + client = at24_translate_offset(at24, &offset); + count = at24_adjust_write_count(at24, offset, count); + + loop_until_timeout(timeout, write_time) { + status = i2c_smbus_write_i2c_block_data(client, + offset, count, buf); + if (status == 0) + status = count; + + dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", + count, offset, status, jiffies); + + if (status == count) + return count; + } + + return -ETIMEDOUT; +} + +static ssize_t at24_eeprom_write_smbus_byte(struct at24_data *at24, + const char *buf, + unsigned int offset, size_t count) +{ + unsigned long timeout, write_time; + struct i2c_client *client; + ssize_t status = 0; + + client = at24_translate_offset(at24, &offset); + + loop_until_timeout(timeout, write_time) { + status = i2c_smbus_write_byte_data(client, offset, buf[0]); + if (status == 0) + status = count; + + dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", + count, offset, status, jiffies); + + if (status == count) + return count; + } + + return -ETIMEDOUT; +} + +static ssize_t at24_eeprom_write_i2c(struct at24_data *at24, const char *buf, + unsigned int offset, size_t count) +{ + unsigned long timeout, write_time; + struct i2c_client *client; + struct i2c_msg msg; + ssize_t status = 0; + int i = 0; + + client = at24_translate_offset(at24, &offset); + count = at24_adjust_write_count(at24, offset, count); + + msg.addr = client->addr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = at24->writebuf; + if (at24->chip.flags & AT24_FLAG_ADDR16) + msg.buf[i++] = offset >> 8; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + + loop_until_timeout(timeout, write_time) { + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + + dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", + count, offset, status, jiffies); + + if (status == count) + return count; + } + + return -ETIMEDOUT; +} + +static int at24_read(void *priv, unsigned int off, void *val, size_t count) +{ + struct at24_data *at24 = priv; + char *buf = val; + + + + if (unlikely(!count)) + return count; + + if (off + count > at24->chip.byte_len) + return -EINVAL; + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&at24->lock); + + while (count) { + int status; + + status = at24->read_func(at24, buf, off, count); + if (status < 0) { + mutex_unlock(&at24->lock); + return status; + } + buf += status; + off += status; + count -= status; + } + + mutex_unlock(&at24->lock); + + return 0; +} + +static int at24_write(void *priv, unsigned int off, void *val, size_t count) +{ + struct at24_data *at24 = priv; + char *buf = val; + + if (unlikely(!count)) + return -EINVAL; + + if (off + count > at24->chip.byte_len) + return -EINVAL; + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&at24->lock); + + while (count) { + int status; + + status = at24->write_func(at24, buf, off, count); + if (status < 0) { + mutex_unlock(&at24->lock); + return status; + } + buf += status; + off += status; + count -= status; + } + + mutex_unlock(&at24->lock); + + return 0; +} + +#ifdef CONFIG_OF +static void at24_get_ofdata(struct i2c_client *client, + struct at24_platform_data *chip) +{ + const __be32 *val; + struct device_node *node = client->dev.of_node; + + if (node) { + if (of_get_property(node, "read-only", NULL)) + chip->flags |= AT24_FLAG_READONLY; + val = of_get_property(node, "pagesize", NULL); + if (val) + chip->page_size = be32_to_cpup(val); + } +} +#else +static void at24_get_ofdata(struct i2c_client *client, + struct at24_platform_data *chip) +{ } +#endif /* CONFIG_OF */ + +static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct at24_platform_data chip; + kernel_ulong_t magic = 0; + bool writable; + int use_smbus = 0; + int use_smbus_write = 0; + struct at24_data *at24; + int err; + unsigned i, num_addresses; + + if (client->dev.platform_data) { + chip = *(struct at24_platform_data *)client->dev.platform_data; + } else { + if (id) { + magic = id->driver_data; + } else { + const struct acpi_device_id *aid; + + aid = acpi_match_device(at24_acpi_ids, &client->dev); + if (aid) + magic = aid->driver_data; + } + if (!magic) + return -ENODEV; + + chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN)); + magic >>= AT24_SIZE_BYTELEN; + chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS); + /* + * This is slow, but we can't know all eeproms, so we better + * play safe. Specifying custom eeprom-types via platform_data + * is recommended anyhow. + */ + chip.page_size = 1; + + /* update chipdata if OF is present */ + at24_get_ofdata(client, &chip); + + chip.setup = NULL; + chip.context = NULL; + } + + if (!is_power_of_2(chip.byte_len)) + dev_warn(&client->dev, + "byte_len looks suspicious (no power of 2)!\n"); + if (!chip.page_size) { + dev_err(&client->dev, "page_size must not be 0!\n"); + return -EINVAL; + } + if (!is_power_of_2(chip.page_size)) + dev_warn(&client->dev, + "page_size looks suspicious (no power of 2)!\n"); + + /* + * REVISIT: the size of the EUI-48 byte array is 6 in at24mac402, while + * the call to ilog2() in AT24_DEVICE_MAGIC() rounds it down to 4. + * + * Eventually we'll get rid of the magic values altoghether in favor of + * real structs, but for now just manually set the right size. + */ + if (chip.flags & AT24_FLAG_MAC && chip.byte_len == 4) + chip.byte_len = 6; + + /* Use I2C operations unless we're stuck with SMBus extensions. */ + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { + /*if (chip.flags & AT24_FLAG_ADDR16){ + return -EPFNOSUPPORT; + }*/ + if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { + use_smbus = I2C_SMBUS_I2C_BLOCK_DATA; + } else if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_WORD_DATA)) { + use_smbus = I2C_SMBUS_WORD_DATA; + } else if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_BYTE_DATA)) { + use_smbus = I2C_SMBUS_BYTE_DATA; + } else { + return -EPFNOSUPPORT; + } + + if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) { + use_smbus_write = I2C_SMBUS_I2C_BLOCK_DATA; + } else if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + use_smbus_write = I2C_SMBUS_BYTE_DATA; + chip.page_size = 1; + } + } + + if (chip.flags & AT24_FLAG_TAKE8ADDR) + num_addresses = 8; + else + num_addresses = DIV_ROUND_UP(chip.byte_len, + (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256); + + at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) + + num_addresses * sizeof(struct i2c_client *), GFP_KERNEL); + if (!at24) + return -ENOMEM; + + mutex_init(&at24->lock); + at24->use_smbus = use_smbus; + at24->use_smbus_write = use_smbus_write; + at24->chip = chip; + at24->num_addresses = num_addresses; + + if ((chip.flags & AT24_FLAG_SERIAL) && (chip.flags & AT24_FLAG_MAC)) { + dev_err(&client->dev, + "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC."); + return -EINVAL; + } + at24->read_func = at24_eeprom_read_smbus; + + if (at24->use_smbus) { + if (at24->use_smbus_write == I2C_SMBUS_I2C_BLOCK_DATA) + at24->write_func = at24_eeprom_write_smbus_block; + else + at24->write_func = at24_eeprom_write_smbus_byte; + } else { + at24->write_func = at24_eeprom_write_i2c; + } + + writable = !(chip.flags & AT24_FLAG_READONLY); + if (writable) { + if (!use_smbus || use_smbus_write) { + + unsigned write_max = chip.page_size; + + if (write_max > io_limit) + write_max = io_limit; + if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX) + write_max = I2C_SMBUS_BLOCK_MAX; + at24->write_max = write_max; + + /* buffer (data + address at the beginning) */ + at24->writebuf = devm_kzalloc(&client->dev, + write_max + 2, GFP_KERNEL); + if (!at24->writebuf) + return -ENOMEM; + } else { + dev_warn(&client->dev, + "cannot write due to controller restrictions."); + } + } + + at24->client[0] = client; + + /* use dummy devices for multiple-address chips */ + for (i = 1; i < num_addresses; i++) { + at24->client[i] = i2c_new_dummy(client->adapter, + client->addr + i); + if (!at24->client[i]) { + dev_err(&client->dev, "address 0x%02x unavailable\n", + client->addr + i); + err = -EADDRINUSE; + goto err_clients; + } + } + + i2c_set_clientdata(client, at24); + at24->nvmem_config.name = dev_name(&client->dev); + at24->nvmem_config.dev = &client->dev; + at24->nvmem_config.read_only = !writable; + at24->nvmem_config.root_only = true; + at24->nvmem_config.owner = THIS_MODULE; + at24->nvmem_config.compat = true; + at24->nvmem_config.base_dev = &client->dev; + at24->nvmem_config.reg_read = at24_read; + at24->nvmem_config.reg_write = at24_write; + at24->nvmem_config.priv = at24; + at24->nvmem_config.stride = 1; + at24->nvmem_config.word_size = 1; + at24->nvmem_config.size = chip.byte_len; + + at24->nvmem = nvmem_register(&at24->nvmem_config); + + if (IS_ERR(at24->nvmem)) { + err = PTR_ERR(at24->nvmem); + goto err_clients; + } + + dev_info(&client->dev, "%u byte %s EEPROM, %s, %u bytes/write\n", + chip.byte_len, client->name, + writable ? "writable" : "read-only", at24->write_max); + if (use_smbus == I2C_SMBUS_WORD_DATA || + use_smbus == I2C_SMBUS_BYTE_DATA) { + dev_notice(&client->dev, "Falling back to %s reads, " + "performance will suffer\n", use_smbus == + I2C_SMBUS_WORD_DATA ? "word" : "byte"); + } + + /* export data to kernel code */ + if (chip.setup) + chip.setup(at24->nvmem, chip.context); + + return 0; + +err_clients: + for (i = 1; i < num_addresses; i++) + if (at24->client[i]) + i2c_unregister_device(at24->client[i]); + + return err; +} + +static int at24_remove(struct i2c_client *client) +{ + struct at24_data *at24; + int i; + + at24 = i2c_get_clientdata(client); + + nvmem_unregister(at24->nvmem); + + for (i = 1; i < at24->num_addresses; i++) + i2c_unregister_device(at24->client[i]); + + return 0; +} + +/*-------------------------------------------------------------------------*/ + +static struct i2c_driver at24_as7315_27xb_driver = { + .driver = { + .name = "at24_as7315_27xb", + .acpi_match_table = ACPI_PTR(at24_acpi_ids), + }, + .probe = at24_probe, + .remove = at24_remove, + .id_table = at24_ids, +}; + +static int __init at24_as7315_27xb_init(void) +{ + if (!io_limit) { + pr_err("at24_as7315_27xb: io_limit must not be 0!\n"); + return -EINVAL; + } + + io_limit = rounddown_pow_of_two(io_limit); + return i2c_add_driver(&at24_as7315_27xb_driver); +} +module_init(at24_as7315_27xb_init); + +static void __exit at24_as7315_27xb_exit(void) +{ + i2c_del_driver(&at24_as7315_27xb_driver); +} +module_exit(at24_as7315_27xb_exit); + +MODULE_DESCRIPTION("Driver for I2C EEPROMs on accton switch, as7315_27xb"); +MODULE_AUTHOR("Roy Lee"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-cpld.c new file mode 100755 index 00000000000..dcd604f1f61 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-cpld.c @@ -0,0 +1,1008 @@ +/* + * A hwmon driver for the as7315_i2c_cpld + * + * Copyright (C) 2019 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define DRV_NAME "as7315_i2c_cpld" +#define NUM_SFP 24 +#define NUM_QSFP 3 +#define NUM_ALL_PORTS 27 + +#define SFP_1ST_PRST_REG 0x10 +#define QSFP_1ST_PRST_REG 0x18 + +#define SFP_1ST_RXLOS_REG 0x13 +#define MUX_CHANNEL_SELECT_REG 0x80 + + +enum models { + MDL_CPLD_SFP, + MDL_CPLD_QSFP, + PLAIN_CPLD, /*No attribute but add i2c addr to the list.*/ + NUM_MODEL +}; + + +#define MAX_PORT_NUM 64 +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +/* + * Number of additional attribute pointers to allocate + * with each call to krealloc + */ +#define ATTR_ALLOC_SIZE 1 /*For last attribute which is NUll.*/ + +#define NAME_SIZE 24 + +typedef ssize_t (*show_func)( struct device *dev, + struct device_attribute *attr, + char *buf); +typedef ssize_t (*store_func)(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count); + +enum port_type { + PT_SFP, + PT_QSFP, +}; + +enum common_attrs { + CMN_VERSION, + CMN_ACCESS, + CMN_PRESENT_ALL, + CMN_RXLOS_ALL, + NUM_COMMON_ATTR +}; + +enum sfp_sb_attrs { + SFP_PRESENT, + SFP_RESET, + SFP_TX_DIS, + SFP_TX_FAULT, + SFP_RX_LOS, + QSFP_PRESENT, + QSFP_LP_MODE, + NUM_SFP_SB_ATTR +}; + +struct cpld_sensor { + struct cpld_sensor *next; + char name[NAME_SIZE+1]; /* sysfs sensor name */ + struct device_attribute attribute; + bool update; /* runtime sensor update needed */ + int data; /* Sensor data. Negative if there was a read error */ + + u8 reg; /* register */ + u8 mask; /* bit mask */ + bool invert; /* inverted value*/ + +}; + +#define to_cpld_sensor(_attr) \ + container_of(_attr, struct cpld_sensor, attribute) + +struct cpld_data { + struct device *dev; + struct device *hwmon_dev; + + int num_attributes; + struct attribute_group group; + + enum models model; + struct cpld_sensor *sensors; + struct mutex update_lock; + bool valid; + unsigned long last_updated; /* in jiffies */ + + int attr_index; + u16 sfp_num; + u8 sfp_types; + struct model_attrs *attrs; + + /*For mux function*/ + struct i2c_mux_core *muxc; +}; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + + +struct base_attrs { + const char *name; + umode_t mode; + show_func get; + store_func set; +}; + +struct attrs { + int reg; + bool invert; + struct base_attrs *base; +}; + +struct model_attrs { + struct attrs **cmn; + struct attrs **portly; +}; + + +static ssize_t show_bit(struct device *dev, + struct device_attribute *devattr, char *buf); +static ssize_t show_rxlos_all(struct device *dev, + struct device_attribute *devattr, char *buf); +static ssize_t show_presnet_all(struct device *dev, + struct device_attribute *devattr, char *buf); +static ssize_t set_1bit(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t set_byte(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); + +int accton_i2c_cpld_read(u8 cpld_addr, u8 reg); +int accton_i2c_cpld_write(u8 cpld_addr, u8 reg, u8 value); + + +struct base_attrs common_base_attrs[NUM_COMMON_ATTR] = +{ + [CMN_VERSION] = {"version", S_IRUGO, show_bit, NULL}, + [CMN_ACCESS] = {"access", S_IWUSR, NULL, set_byte}, + [CMN_PRESENT_ALL] = {"module_present_all", S_IRUGO, show_presnet_all, NULL}, + [CMN_RXLOS_ALL] = {"rx_los_all", S_IRUGO, show_rxlos_all, NULL}, +}; + +struct attrs common_attrs[] = { + [CMN_VERSION] = {0x01, false, &common_base_attrs[CMN_VERSION]}, + [CMN_ACCESS] = {-1, false, &common_base_attrs[CMN_ACCESS]}, + [CMN_PRESENT_ALL] = {-1, false, &common_base_attrs[CMN_PRESENT_ALL]}, + [CMN_RXLOS_ALL] = {-1, false, &common_base_attrs[CMN_RXLOS_ALL]}, +}; +struct attrs plain_common[] = { + [CMN_VERSION] = {0x01, false, &common_base_attrs[CMN_VERSION]}, +}; + +struct base_attrs portly_attrs[] = +{ + [SFP_PRESENT] = {"present", S_IRUGO, show_bit, NULL}, + [SFP_RESET] = {0}, + [SFP_TX_DIS] = {"tx_disable", S_IRUGO|S_IWUSR, show_bit, set_1bit}, + [SFP_TX_FAULT] = {"tx_fault", S_IRUGO|S_IWUSR, show_bit, set_1bit}, + [SFP_RX_LOS] = {"rx_los", S_IRUGO|S_IWUSR, show_bit, set_1bit}, + [QSFP_PRESENT] = {"present", S_IRUGO, show_bit, NULL}, + [QSFP_LP_MODE] = {"low_power_mode", S_IRUGO|S_IWUSR, show_bit, set_1bit}, +}; + +struct attrs as7315_port[NUM_SFP_SB_ATTR] = { + {SFP_1ST_PRST_REG, true, &portly_attrs[SFP_PRESENT]}, + {0}, + {0x12, false, &portly_attrs[SFP_TX_DIS]}, + {0x11, false, &portly_attrs[SFP_TX_FAULT]}, + {SFP_1ST_RXLOS_REG, false, &portly_attrs[SFP_RX_LOS]}, + {QSFP_1ST_PRST_REG, true, &portly_attrs[QSFP_PRESENT]}, + {0x19, false, &portly_attrs[QSFP_LP_MODE]}, +}; + +struct attrs *as7315_cmn_list[] = { + &common_attrs[CMN_VERSION], + &common_attrs[CMN_ACCESS], + &common_attrs[CMN_PRESENT_ALL], + &common_attrs[CMN_RXLOS_ALL], + NULL +}; + +struct attrs *plain_cmn_list[] = { + &plain_common[CMN_VERSION], + NULL +}; + +struct attrs *as7315_qsfp_list[] = { + &as7315_port[QSFP_PRESENT], + &as7315_port[QSFP_LP_MODE], + NULL +}; + +struct attrs *as7315_sfp_list[] = { + &as7315_port[SFP_PRESENT], + &as7315_port[SFP_TX_DIS], + &as7315_port[SFP_TX_FAULT], + &as7315_port[SFP_RX_LOS], + NULL +}; + +struct model_attrs models_attr[NUM_MODEL] = { + {.cmn = as7315_cmn_list, .portly=as7315_sfp_list}, + {.cmn = as7315_cmn_list, .portly=as7315_qsfp_list}, + {.cmn = plain_cmn_list, .portly=NULL}, +}; + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; +/* Addresses scanned for as7315_i2c_cpld + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +struct chip_desc { + u8 nchans; + u8 deselectChan; +}; + +/* Provide specs for the PCA954x types we know about */ +static const struct chip_desc chips[] = { + [MDL_CPLD_SFP] = {0}, + [MDL_CPLD_QSFP] = { + .nchans = 4, /*Fan + 3*LM75*/ + .deselectChan = 0, + }, +}; + +static const struct i2c_device_id as7315_cpld_id[] = { + { "as7315_cpld1", MDL_CPLD_SFP}, + { "as7315_cpld2", MDL_CPLD_QSFP}, + { }, +}; +MODULE_DEVICE_TABLE(i2c, as7315_cpld_id); + + + + +static int get_sfp_spec(int model, u16 *num, u8 *types) +{ + switch (model) { + case MDL_CPLD_SFP: + *num = NUM_SFP; + *types = PT_SFP; + break; + case MDL_CPLD_QSFP: + *num = NUM_QSFP; + *types = PT_QSFP; + break; + default: + *types = 0; + *num = 0; + break; + } + + return 0; +} + +/*num: how many bits can be applied for this read.*/ +static int get_present_reg(int model, u8 port, u8 *reg, u8 *num) +{ + + switch (model) { + case MDL_CPLD_SFP: + if (port < NUM_SFP) { + *reg = SFP_1ST_PRST_REG + (port/8)*4; + *num = (NUM_SFP > 8)? 8 : NUM_SFP; + return 0; + } + break; + case MDL_CPLD_QSFP: + if (port < NUM_QSFP) { + *reg = QSFP_1ST_PRST_REG + (port/8); + *num = (NUM_QSFP > 8)? 8 : NUM_QSFP; + return 0; + } + break; + default: + return -EINVAL; + } + return -EINVAL; +} + +static int get_rxlos_reg(int model, u8 port, u8 *reg, u8 *num) +{ + + switch (model) { + case MDL_CPLD_SFP: + if (port < NUM_SFP) { + *reg = SFP_1ST_RXLOS_REG + (port/8)*4; + *num = (NUM_SFP > 8)? 8 : NUM_SFP; + return 0; + } + break; + default: + return -EINVAL; + } + return -EINVAL; +} + +static int cpld_write_internal( + struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + break; + } + return status; +} + +static int cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + break; + } + return status; +} + +static ssize_t show_rxlos_all(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 i, value, reg, num; + u64 values; + + i = num = reg =0; + values = 0; + mutex_lock(&data->update_lock); + while (i < data->sfp_num) + { + /*No rxlos for QSFP*/ + if (data->model == MDL_CPLD_QSFP) { + values = 0; + break; + } + get_rxlos_reg(data->model, i, ®, &num); + if (!(num > 0)) + { + value = -EINVAL; + goto exit; + } + value = cpld_read_internal(client, reg); + if (unlikely(value < 0)) { + goto exit; + } + values |= (value &((1<<(num))-1)) << i; + i += num; + } + mutex_unlock(&data->update_lock); + values = cpu_to_le64(values); + return snprintf(buf, sizeof(values)+1, "%llx\n", values); +exit: + mutex_unlock(&data->update_lock); + return value; +} + + +static ssize_t show_presnet_all(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 i, value, reg, num; + u64 values; + + i = num = reg =0; + values = 0; + mutex_lock(&data->update_lock); + while (i < data->sfp_num) + { + get_present_reg(data->model, i, ®, &num); + if (!(num > 0)) + { + value = -EINVAL; + goto exit; + } + value = cpld_read_internal(client, reg); + if (unlikely(value < 0)) { + goto exit; + } + values |= (~value&((1<<(num))-1)) << i; + i += num; + } + mutex_unlock(&data->update_lock); + values = cpu_to_le64(values); + return snprintf(buf, sizeof(values)+1, "%llx\n", values); +exit: + mutex_unlock(&data->update_lock); + return value; +} + +static ssize_t show_bit(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int value; + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + struct cpld_sensor *sensor = to_cpld_sensor(devattr); + + mutex_lock(&data->update_lock); + value = cpld_read_internal(client, sensor->reg); + value = value & sensor->mask; + if (sensor->invert) + value = !value; + mutex_unlock(&data->update_lock); + + return snprintf(buf, PAGE_SIZE, "%x\n", !!value); +} + +static ssize_t set_1bit(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + long is_reset; + int value, status; + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + struct cpld_sensor *sensor = to_cpld_sensor(devattr); + u8 cpld_bit, reg; + + status = kstrtol(buf, 10, &is_reset); + if (status) { + return status; + } + reg = sensor->reg; + cpld_bit = sensor->mask; + mutex_lock(&data->update_lock); + value = cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + if (sensor->invert) + is_reset = !is_reset; + + if (is_reset) { + value |= cpld_bit; + } + else { + value &= ~cpld_bit; + } + + status = cpld_write_internal(client, reg, value); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_byte(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + return access(dev, da, buf, count); +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static void accton_i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = + kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", + client->addr); + return; + } + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void accton_i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int cpld_add_attribute(struct cpld_data *data, struct attribute *attr) +{ + int new_max_attrs = ++data->num_attributes + ATTR_ALLOC_SIZE; + void *new_attrs = krealloc(data->group.attrs, + new_max_attrs * sizeof(void *), + GFP_KERNEL); + if (!new_attrs) + return -ENOMEM; + data->group.attrs = new_attrs; + data->group.attrs[data->num_attributes-1] = attr; + data->group.attrs[data->num_attributes] = NULL; + + return 0; +} + +static void cpld_dev_attr_init(struct device_attribute *dev_attr, + const char *name, umode_t mode, + show_func show, store_func store) +{ + sysfs_attr_init(&dev_attr->attr); + dev_attr->attr.name = name; + dev_attr->attr.mode = mode; + dev_attr->show = show; + dev_attr->store = store; +} + +static struct cpld_sensor * add_sensor(struct cpld_data *data, + const char *name, + u8 reg, u8 mask, bool invert, + bool update, umode_t mode, + show_func get, store_func set) +{ + struct cpld_sensor *sensor; + struct device_attribute *a; + + sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return NULL; + a = &sensor->attribute; + + snprintf(sensor->name, sizeof(sensor->name), name); + sensor->reg = reg; + sensor->mask = mask; + sensor->update = update; + sensor->invert = invert; + cpld_dev_attr_init(a, sensor->name, + mode, + get, set); + + if (cpld_add_attribute(data, &a->attr)) + return NULL; + + sensor->next = data->sensors; + data->sensors = sensor; + + return sensor; +} + +static int add_attributes_cmn(struct cpld_data *data, struct attrs **cmn) +{ + u8 reg, i ; + bool invert; + struct attrs *a; + struct base_attrs *b; + + if (NULL == cmn) + return -1; + + for (i = 0; cmn[i]; i++) + { + a = cmn[i]; + + reg = a->reg; + invert = a->invert; + + b = a->base; + if (NULL == b) + break; + + if (add_sensor(data, b->name, + reg, 0xff, invert, + true, b->mode, + b->get, b->set) == NULL) + { + return -ENOMEM; + } + } + return 0; +} + +static int add_attributes_portly(struct cpld_data *data, struct attrs **pa) +{ + char name[NAME_SIZE+1]; + int i, j; + u8 reg, mask, invert, reg_start, jump; + struct attrs *a; + struct base_attrs *b; + + if (NULL == pa) + return -EFAULT; + + jump = 0; + if (data->sfp_types == PT_SFP) { + jump = 4; /*SFP sideband registers in set of 4 bytes.*/ + } else if (data->sfp_types == PT_QSFP) { + jump = 1; + } + + for (i = 0; pa[i]; i++) { + a = pa[i]; + reg_start = a->reg; + invert = a->invert; + b = a->base; + if (b == NULL) + break; + + for (j = 0; j < data->sfp_num; j++) + { + snprintf(name, NAME_SIZE, "%s_%d", b->name, j+1); + reg = reg_start + ((j/8)*jump); + mask = 1 << ((j)%8); + if (add_sensor(data, name, reg, mask, invert, + true, b->mode, b->get, b->set) == NULL) + { + return -ENOMEM; + } + } + } + + + return 0; +} + +static int add_attributes(struct i2c_client *client, + struct cpld_data *data) +{ + struct model_attrs *m = data->attrs; + + if (m == NULL) + return -EINVAL; + + /* Common attributes.*/ + add_attributes_cmn(data, m->cmn); + + /* Port-wise attributes.*/ + add_attributes_portly(data, m->portly); + + return 0; +} + +/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() + for this as they will try to lock adapter a second time */ +static int _cpld_mux_reg_write(struct i2c_adapter *adap, + struct i2c_client *client, u8 val) +{ + unsigned long orig_jiffies; + unsigned short flags; + union i2c_smbus_data data; + int try; + s32 res = -EIO; + + data.byte = val; + flags = client->flags; + flags &= ~(I2C_M_TEN | I2C_CLIENT_PEC); + + if (adap->algo->smbus_xfer) { + /* Retry automatically on arbitration loss */ + orig_jiffies = jiffies; + for (res = 0, try = 0; try <= adap->retries; try++) { + res = adap->algo->smbus_xfer(adap, client->addr, flags, + I2C_SMBUS_WRITE, MUX_CHANNEL_SELECT_REG, + I2C_SMBUS_BYTE_DATA, &data); + if (res != -EAGAIN) + break; + if (time_after(jiffies, + orig_jiffies + adap->timeout)) + break; + } + } + + return res; +} + + +static int _mux_select_chan(struct i2c_mux_core *muxc, + u32 chan) +{ + u8 regval; + struct i2c_client *client = i2c_mux_priv(muxc); + int ret = 0; + + regval = (chan+1) << 5; + ret = _cpld_mux_reg_write(muxc->parent, client, regval); + if (unlikely(ret < 0)) { + return ret; + } + return ret; +} + + +static int _prealloc_attrs(struct cpld_data *data) +{ + void *new_attrs = krealloc(data->group.attrs, + ATTR_ALLOC_SIZE * sizeof(void *), + GFP_KERNEL); + if (!new_attrs) + return -ENOMEM; + data->group.attrs = new_attrs; + + return 0; +} + +static int _add_sysfs_attributes(struct i2c_client *client, + struct cpld_data *data) +{ + int status; + + status = add_attributes(client, data); + if (status) { + return status; + } + + /*If there are no attributes, something is wrong. + * Bail out instead of trying to register nothing. + */ + if (!data->num_attributes) { + dev_err(&client->dev, "No attributes found\n"); + return -ENODEV; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &data->group); + if (status) { + return status; + } + + return 0; +} + + +static int _add_mux_channels(struct i2c_client *client, + const struct i2c_device_id *id, struct cpld_data *data) +{ + int num, force, class; + int status; + struct i2c_mux_core *muxc; + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + int model = id->driver_data; + + data->muxc = i2c_mux_alloc(adap, &client->dev, + chips[model].nchans, + sizeof(client), 0, + _mux_select_chan, NULL); + + if (!data->muxc) { + return ENOMEM; + } + muxc = data->muxc; + muxc->priv = client; + for (num = 0; num < chips[model].nchans; num++) { + force = 0; /* dynamic adap number */ + class = 0; /* no class by default */ + status = i2c_mux_add_adapter(muxc, force, num, class); + if (status) + return status ; + } + dev_info(&client->dev, + "registered %d multiplexed busses for I2C %s\n", + num, client->name); + + return 0; +} + +static int as7315_i2c_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + int status; + struct cpld_data *data = NULL; + struct device *dev = &client->dev; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA)) + return -ENODEV; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) { + return -ENOMEM; + } + data->model = dev_id->driver_data; + data->attrs = &models_attr[data->model]; + get_sfp_spec(data->model, &data->sfp_num, &data->sfp_types); + mutex_init(&data->update_lock); + data->dev = dev; + dev_info(dev, "chip found\n"); + + + status = _prealloc_attrs(data); + if (status) + return -ENOMEM; + + status = _add_sysfs_attributes(client, data); + if (status) + goto out_kfree; + + status = _add_mux_channels(client, dev_id, data); + if (status) + goto exit_rm_sys; + + i2c_set_clientdata(client, data); + accton_i2c_cpld_add_client(client); + dev_info(dev, "%s: cpld '%s'\n", + dev_name(data->dev), client->name); + + return 0; + +exit_rm_sys: + sysfs_remove_group(&client->dev.kobj, &data->group); +out_kfree: + kfree(data->group.attrs); + return status; +} + + +static int as7315_i2c_cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + struct i2c_mux_core *muxc = data->muxc; + + sysfs_remove_group(&client->dev.kobj, &data->group); + kfree(data->group.attrs); + if(muxc) { + i2c_mux_del_adapters(muxc); + } + accton_i2c_cpld_remove_client(client); + return 0; +} + +int accton_i2c_cpld_read(u8 cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_read_byte_data(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(accton_i2c_cpld_read); + +int accton_i2c_cpld_write(u8 cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_write_byte_data(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(accton_i2c_cpld_write); + + +static struct i2c_driver as7315_i2c_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRV_NAME, + }, + .probe = as7315_i2c_cpld_probe, + .remove = as7315_i2c_cpld_remove, + .id_table = as7315_cpld_id, + .address_list = normal_i2c, +}; + + +static int __init as7315_i2c_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as7315_i2c_cpld_driver); +} + +static void __exit as7315_i2c_cpld_exit(void) +{ + i2c_del_driver(&as7315_i2c_cpld_driver); +} + +module_init(as7315_i2c_cpld_init); +module_exit(as7315_i2c_cpld_exit); + +MODULE_AUTHOR("Roy Lee "); +MODULE_DESCRIPTION("as7315_i2c_cpld driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-led.c b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-led.c new file mode 100755 index 00000000000..fefb44fad33 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-led.c @@ -0,0 +1,408 @@ +/* + * A LED driver for the accton_as7315_27xb_led + * + * Copyright (C) 2019 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as7315_27xb_led" +#define CPLD_I2C_ADDR 0x64 + +enum led_type { + TYPE_DIAG, + TYPE_LOC, + TYPE_MAX +}; + +struct led_list_s { + enum led_type type; + char name[64]; + u8 reg_addr; + u8 slave_addr; +} led_list[TYPE_MAX] = { + {TYPE_DIAG, "as7315_27xb_diag", 0x41, CPLD_I2C_ADDR}, + {TYPE_LOC, "as7315_27xb_loc", 0x40, CPLD_I2C_ADDR} +}; + +struct accton_as7315_27xb_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 slave_addr[TYPE_MAX]; /* For LOC and DIAG.*/ + u8 reg_addr[TYPE_MAX]; /* For LOC and DIAG.*/ + u8 reg_val[TYPE_MAX]; /* Register value, 0 = LOC + 1 = DIAG */ +}; +static struct accton_as7315_27xb_led_data *ledctl = NULL; + +/* LED related data + */ +#define TYPE_DIAG_REG_MASK 0x30 +#define MODE_DIAG_GREEN_MASK 0x10 +#define MODE_DIAG_AMBER_MASK 0x20 +#define MODE_DIAG_GBLINK_MASK 0x00 +#define MODE_DIAG_OFF_MASK 0x30 + +#define TYPE_LOC_REG_MASK 0x40 +#define MODE_LOC_OFF_MASK 0x40 +#define MODE_LOC_BLINK_MASK 0x00 + + +typedef enum onlp_led_mode_e { + ONLP_LED_MODE_OFF, + ONLP_LED_MODE_ON, + ONLP_LED_MODE_BLINKING, + ONLP_LED_MODE_RED = 10, + ONLP_LED_MODE_RED_BLINKING = 11, + ONLP_LED_MODE_ORANGE = 12, + ONLP_LED_MODE_ORANGE_BLINKING = 13, + ONLP_LED_MODE_YELLOW = 14, + ONLP_LED_MODE_YELLOW_BLINKING = 15, + ONLP_LED_MODE_GREEN = 16, + ONLP_LED_MODE_GREEN_BLINKING = 17, + ONLP_LED_MODE_BLUE = 18, + ONLP_LED_MODE_BLUE_BLINKING = 19, + ONLP_LED_MODE_PURPLE = 20, + ONLP_LED_MODE_PURPLE_BLINKING = 21, + ONLP_LED_MODE_AUTO = 22, + ONLP_LED_MODE_AUTO_BLINKING = 23, +} onlp_led_mode_t; + + +struct led_type_mode { + enum led_type type; + int type_mask; + enum onlp_led_mode_e mode; + int mode_mask; +}; + +static struct led_type_mode led_type_mode_data[] = { + {TYPE_DIAG, TYPE_DIAG_REG_MASK, ONLP_LED_MODE_GREEN_BLINKING, MODE_DIAG_GBLINK_MASK}, + {TYPE_DIAG, TYPE_DIAG_REG_MASK, ONLP_LED_MODE_GREEN, MODE_DIAG_GREEN_MASK}, + {TYPE_DIAG, TYPE_DIAG_REG_MASK, ONLP_LED_MODE_ORANGE, MODE_DIAG_AMBER_MASK}, + {TYPE_DIAG, TYPE_DIAG_REG_MASK, ONLP_LED_MODE_OFF, MODE_DIAG_OFF_MASK}, + {TYPE_LOC, TYPE_LOC_REG_MASK, ONLP_LED_MODE_BLUE_BLINKING, MODE_LOC_BLINK_MASK}, + {TYPE_LOC, TYPE_LOC_REG_MASK, ONLP_LED_MODE_OFF, MODE_LOC_OFF_MASK}, +}; + +extern int accton_i2c_cpld_read (u8 cpld_addr, u8 reg); +extern int accton_i2c_cpld_write(u8 cpld_addr, u8 reg, u8 value); + + +static int pdata_init(struct accton_as7315_27xb_led_data *data) { + int i; + + for (i=0; ireg_addr[i] = led_list[i].reg_addr; + data->slave_addr[i] = led_list[i].slave_addr; + } + + return 0; +} + +static int led_reg_val_to_light_mode(enum led_type type, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + + if (type != led_type_mode_data[i].type) + continue; + + if ((led_type_mode_data[i].type_mask & reg_val) == + led_type_mode_data[i].mode_mask) + { + return led_type_mode_data[i].mode; + } + } + + return 0; +} + +static u8 led_light_mode_to_reg_val(enum led_type type, + enum onlp_led_mode_e mode, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + if (type != led_type_mode_data[i].type) + continue; + + if (mode != led_type_mode_data[i].mode) + continue; + + reg_val = led_type_mode_data[i].mode_mask | + (reg_val & (~led_type_mode_data[i].type_mask)); + } + + return reg_val; +} + +static int accton_as7315_27xb_led_read_value(u8 slave, u8 reg) +{ + return accton_i2c_cpld_read(slave, reg); +} + +static int accton_as7315_27xb_led_write_value(u8 slave, u8 reg, u8 value) +{ + return accton_i2c_cpld_write(slave, reg, value); +} + +static void accton_as7315_27xb_led_update(void) +{ + mutex_lock(&ledctl->update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as7315_27xb_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status; + u8 addr, offset; + addr = ledctl->slave_addr[i]; + offset = ledctl->reg_addr[i]; + status = accton_as7315_27xb_led_read_value(addr, offset); + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", ledctl->reg_addr[i], status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as7315_27xb_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + enum led_type type) +{ + int reg_val; + u8 addr, offset; + + if (type >= ARRAY_SIZE(led_list)) { + dev_dbg(&ledctl->pdev->dev, "Illegal type:%d\n", type); + return; + } + mutex_lock(&ledctl->update_lock); + addr = ledctl->slave_addr[type], + offset = ledctl->reg_addr[type], + reg_val = accton_as7315_27xb_led_read_value(addr, offset); + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", offset, reg_val); + goto exit; + } + + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + accton_as7315_27xb_led_write_value(addr, offset, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static enum led_type get_led_type(struct led_classdev *cdev) +{ + int i; + + for (i=0; iname)) + return i; + } + return -EINVAL; +} + +static void led_mode_set(struct led_classdev *cdev, + enum led_brightness led_light_mode) +{ + enum led_type type; + + type = get_led_type(cdev); + if (type < 0) { + dev_dbg(&ledctl->pdev->dev, "Found no corresponding type:%d\n", type); + return ; + } + accton_as7315_27xb_led_set(cdev, led_light_mode, type); +} + +static enum led_brightness led_mode_get(struct led_classdev *cdev) +{ + enum led_type type; + + type = get_led_type(cdev); + if (type < 0) + return type; + + accton_as7315_27xb_led_update(); + return led_reg_val_to_light_mode(type, ledctl->reg_val[type]); +} + +static struct led_classdev accton_as7315_27xb_leds[TYPE_MAX] = { + [TYPE_DIAG] = { + .name = led_list[TYPE_DIAG].name, + .default_trigger = "unused", + .brightness_set = led_mode_set, + .brightness_get = led_mode_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = ONLP_LED_MODE_AUTO, + }, + [TYPE_LOC] = { + .name = led_list[TYPE_LOC].name, + .default_trigger = "unused", + .brightness_set = led_mode_set, + .brightness_get = led_mode_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = ONLP_LED_MODE_AUTO, + }, +}; + +static int accton_as7315_27xb_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as7315_27xb_leds); i++) { + led_classdev_suspend(&accton_as7315_27xb_leds[i]); + } + + return 0; +} + +static int accton_as7315_27xb_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as7315_27xb_leds); i++) { + led_classdev_resume(&accton_as7315_27xb_leds[i]); + } + + return 0; +} + +static int accton_as7315_27xb_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(accton_as7315_27xb_leds); i++) { + ret = led_classdev_register(&pdev->dev, &accton_as7315_27xb_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(accton_as7315_27xb_leds)) { + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&accton_as7315_27xb_leds[i]); + } + } + + return ret; +} + +static int accton_as7315_27xb_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(accton_as7315_27xb_leds); i++) { + led_classdev_unregister(&accton_as7315_27xb_leds[i]); + } + + return 0; +} + +static struct platform_driver accton_as7315_27xb_led_driver = { + .probe = accton_as7315_27xb_led_probe, + .remove = accton_as7315_27xb_led_remove, + .suspend = accton_as7315_27xb_led_suspend, + .resume = accton_as7315_27xb_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as7315_27xb_led_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as7315_27xb_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct accton_as7315_27xb_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as7315_27xb_led_driver); + goto exit; + } + + pdata_init(ledctl); + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&accton_as7315_27xb_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as7315_27xb_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&accton_as7315_27xb_led_driver); + kfree(ledctl); +} + +module_init(accton_as7315_27xb_led_init); +module_exit(accton_as7315_27xb_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as7315_27xb_led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-psu.c b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-psu.c new file mode 100644 index 00000000000..1cf6313eab0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-psu.c @@ -0,0 +1,454 @@ +/* + * An hwmon driver for accton as7315_27xb Power Module + * + * Copyright (C) 2019 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "as7315_27xb_psu" +#define PSU_STATUS_I2C_ADDR 0x64 +#define PSU_STATUS_I2C_REG_OFFSET 0x2 +#define USE_BYTE_ACCESS 0 /*Somehow i2c block access is failed on this platform.*/ +#define UPDATE_PERIOD (HZ*2) +#define MAX_OUTPUT_LENGTH 32 +#define BASIC_EEPROM_SIZE 32 + +#define IS_POWER_GOOD(id, value) (!!(value & BIT(id + 2))) +#define IS_PRESENT(id, value) (!(value & BIT(id))) + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as7315_27xb_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char eeprom[BASIC_EEPROM_SIZE*2]; /* EEPROM*/ +}; + + +enum as7315_27xb_psu_sysfs_attributes { + PSU_INDEX, + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD, + PSU_SERIAL_NUMBER +}; + +enum psu_type { + PSU_YM_1401_A, /* AC110V - B2F */ + PSU_YM_2401_JCR, /* AC110V - F2B */ + PSU_YM_2401_JDR, /* AC110V - B2F */ + PSU_YM_2401_TCR, /* AC110V - B2F */ + PSU_CPR_4011_4M11, /* AC110V - F2B */ + PSU_CPR_4011_4M21, /* AC110V - B2F */ + PSU_CPR_6011_2M11, /* AC110V - F2B */ + PSU_CPR_6011_2M21, /* AC110V - B2F */ + PSU_UM400D_01G, /* DC48V - F2B */ + PSU_UM400D01_01G, /* DC48V - B2F */ + PSU_BEL_TOT120, /* DC48V - N/A */ + PSU_TYPE_MAX +}; + +struct model_info { + enum psu_type type; + u8 offset; + char* model_name; + u8 serial_offset; +}; + +struct model_info models[] = { + {PSU_YM_1401_A, 0x20, "YM-1401ACR",0x35}, + {PSU_YM_2401_JCR, 0x20, "YM-2401JCR",0x35}, + {PSU_YM_2401_JDR, 0x20, "YM-2401JDR",0x35}, + {PSU_YM_2401_TCR, 0x20, "YM-2401TCR",0x35}, + {PSU_CPR_4011_4M11, 0x26, "CPR-4011-4M11",0x47}, + {PSU_CPR_4011_4M21, 0x26, "CPR-4011-4M21",0x47}, + {PSU_CPR_6011_2M11, 0x26, "CPR-6011-2M11",0x46}, + {PSU_CPR_6011_2M21, 0x26, "CPR-6011-2M21",0x46}, + {PSU_UM400D_01G, 0x50, "um400d01G",0x50}, + {PSU_UM400D01_01G, 0x50, "um400d01-01G",0x50}, + {PSU_BEL_TOT120, 0x0A, "CRXT-T0T120",0x18}, +}; + +static ssize_t show_index(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_serial_number(struct device *dev, struct device_attribute *da,char *buf); +static int as7315_27xb_psu_block_read(struct i2c_client *client, u8 command, u8 *data,int data_len); +static int as7315_27xb_psu_model_name_get( + struct device *dev, char *buf); +static int as7315_27xb_psu_serial_number_get( + struct device *dev, enum psu_type type, char *out); +static struct as7315_27xb_psu_data *as7315_27xb_psu_update_device(struct device *dev); +extern int accton_i2c_cpld_read(u8 cpld_addr, u8 reg); + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_index, S_IRUGO, show_index, NULL, PSU_INDEX); +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_model_name,NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_serial, S_IRUGO, show_serial_number, NULL, PSU_SERIAL_NUMBER); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); + +static struct attribute *as7315_27xb_psu_attributes[] = { + &sensor_dev_attr_psu_index.dev_attr.attr, + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_serial.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + NULL +}; + +static ssize_t show_index(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7315_27xb_psu_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->index); +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7315_27xb_psu_data *data = as7315_27xb_psu_update_device(dev); + u8 status = 0; + + if (!data->valid) { + return sprintf(buf, "0\n"); + } + + if (attr->index == PSU_PRESENT) { + status = IS_PRESENT(data->index, data->status); + } + else { /* PSU_POWER_GOOD */ + status = IS_POWER_GOOD(data->index, data->status); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_serial_number(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i; + struct as7315_27xb_psu_data *data = as7315_27xb_psu_update_device(dev); + + if (!data->valid) { + return 0; + } + + if (!IS_PRESENT(data->index, data->status)) { + return 0; + } + + i = as7315_27xb_psu_model_name_get(dev, buf); + if ( i < 0) { + return -ENXIO; + } + + if (as7315_27xb_psu_serial_number_get(dev, i, buf) < 0) { + return -ENXIO; + } + return sprintf(buf, "%s\n", buf); +} + +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as7315_27xb_psu_data *data = as7315_27xb_psu_update_device(dev); + + if (!data->valid) { + return 0; + } + + if (!IS_PRESENT(data->index, data->status)) { + return 0; + } + + if (as7315_27xb_psu_model_name_get(dev, buf) < 0) { + return -ENXIO; + } + + return sprintf(buf, "%s\n", buf); +} + +static const struct attribute_group as7315_27xb_psu_group = { + .attrs = as7315_27xb_psu_attributes, +}; + +static int as7315_27xb_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7315_27xb_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7315_27xb_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7315_27xb_psu_group); + if (status) { + goto exit_free; + } + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, + client->name, NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7315_27xb_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7315_27xb_psu_remove(struct i2c_client *client) +{ + struct as7315_27xb_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7315_27xb_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as7315_27xb_psu1, + as7315_27xb_psu2 +}; + +static const struct i2c_device_id as7315_27xb_psu_id[] = { + { "as7315_27xb_psu1", as7315_27xb_psu1 }, + { "as7315_27xb_psu2", as7315_27xb_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7315_27xb_psu_id); + +static struct i2c_driver as7315_27xb_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRV_NAME, + }, + .probe = as7315_27xb_psu_probe, + .remove = as7315_27xb_psu_remove, + .id_table = as7315_27xb_psu_id, + .address_list = normal_i2c, +}; + +static int as7315_27xb_psu_block_read(struct i2c_client *client, + u8 command, u8 *data, int max_len) +{ + int result; + + u8 i, offset; + + if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { + for (i = 0; i < max_len; i += 32) { + offset = i + command ; + result = i2c_smbus_read_i2c_block_data(client, offset, + 32, data + i); + + if (result != 32) { + result = -EIO; + goto abort; + } + } + + } else { + for (i = 0; i < max_len; i += 2) { + int word; + offset = i + command ; + word = i2c_smbus_read_word_data(client, offset); + if (word < 0) { + result = -EIO; + goto abort; + } + data[i] = word & 0xff; + data[i + 1] = word >> 8; + } + } + result = 0; +abort: + return result; +} + +static int as7315_27xb_psu_serial_number_get( + struct device *dev, enum psu_type type, char *out) +{ + char *serial; + struct as7315_27xb_psu_data *data = as7315_27xb_psu_update_device(dev); + + if (type >= PSU_TYPE_MAX) { + return -EINVAL; + } + + if (!data->valid) { + out[0] = '\0'; + return 0; + } + + serial = data->eeprom + models[type].serial_offset; + strncpy(out, serial, MAX_OUTPUT_LENGTH); + return 0; +} + +static int find_model_name_from_eeprom( char *eeprom) +{ + int i; + char *name; + + for (i = 0; i < ARRAY_SIZE(models); i++) { + name = eeprom + models[i].offset; + if (strncmp(name, models[i].model_name, + strlen(models[i].model_name)) == 0) { + break; + } + } + + return (i == ARRAY_SIZE(models))? -EINVAL: i; +} +static int as7315_27xb_psu_model_name_get( + struct device *dev, char *buf) +{ + int i; + struct as7315_27xb_psu_data *data = as7315_27xb_psu_update_device(dev); + + if (!data->valid) { + return sprintf(buf, "0\n"); + } + + /* Determine if the model name is known, if not, read next index + */ + i = find_model_name_from_eeprom(data->eeprom); + if (i < 0) { + return -ENODATA; + } + + mutex_lock(&data->update_lock); + strncpy(buf, models[i].model_name, MAX_OUTPUT_LENGTH); + /*Work-around for some special models*/ + if (i == PSU_YM_2401_JCR || i == PSU_YM_2401_JDR || + i == PSU_YM_1401_A || i == PSU_YM_2401_TCR) { + /* Skip the meaningless data byte 8*/ + buf[8] = buf[9]; + buf[9] = buf[10]; + buf = '\0'; + } + + mutex_unlock(&data->update_lock); + return i; +} + +static struct as7315_27xb_psu_data *as7315_27xb_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7315_27xb_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + if (time_after(jiffies, data->last_updated + UPDATE_PERIOD) + || !data->valid) { + int status = -1; + + dev_dbg(&client->dev, "Starting as7315_27xb update\n"); + data->valid = 0; + + /* Read psu status */ + status = accton_i2c_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET); + if (status < 0) { + dev_dbg(&client->dev, + "cpld reg (0x%x) err %d\n", PSU_STATUS_I2C_ADDR, status); + goto exit; + } + else { + data->status = status; + } + + + /*Read the eeprom of psu*/ + memset(data->eeprom, 0, sizeof(data->eeprom)); + status = as7315_27xb_psu_block_read(client, 0, + data->eeprom, sizeof(data->eeprom)); + + if (status < 0) { + dev_dbg(&client->dev, "unable to read eeprom from (0x%x)\n", + client->addr); + goto exit; + } + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + return data; +} + +module_i2c_driver(as7315_27xb_psu_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton as7315_27xb_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/ym2651y.c new file mode 120000 index 00000000000..f4d67640ccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/ym2651y.c @@ -0,0 +1 @@ +../../common/modules/ym2651y.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/service/as7315-platform-init.service b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/service/as7315-platform-init.service new file mode 100755 index 00000000000..cdaf437166b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/service/as7315-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Accton AS7315-27XB Platform initialization service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/accton_as7315_util.py install +ExecStart=/usr/local/bin/accton_as7315_monitor.py +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/setup.py new file mode 100755 index 00000000000..09187900c7e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as7315_27xb', + version='1.0', + description='Module to initialize Accton AS7315-27XB platforms', + + packages=['as7315_27xb'], + package_dir={'as7315_27xb': 'as7315-27xb/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/utils/README b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/utils/README new file mode 100755 index 00000000000..0561fe7a277 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/utils/README @@ -0,0 +1,60 @@ +Copyright (C) 2019 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +To initialize the system, run "accton_as7315_util.py install". +To clean up the drivers & devices, run "accton_as7315_util.py clean". +To dump information of sensors, run "accton_as7315_util.py show". +To dump SFP EEPROM, run "accton_as7315_util.py sff". +To set fan speed, run "accton_as7315_util.py set fan". +To enable/disable SFP emission, run "accton_as7315_util.py set sfp". +To set system LEDs' color, run "accton_as7315_util.py set led" +For more information, run "accton_as7315_util.py --help". + +==================================================================== +Besides applying accton_as7315_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +LED controls can be found under /sys/class/leds. The sysfs interface +color mappings are as follows: +Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + +There are 5 system LEDs, loc, diag, fan, ps1, and ps2. +They are lit automatically by CPLD, but the loc and diag. +The loc led has only 1 color, blue. +The diag one has 3 colors: red, amber, and green. + +Fan controls can be found in /sys/bus/i2c/devices/2-0066. +There are 10 fans inside 5 fan modules. +All fans share 1 duty setting, ranged from 0~100. + +Three temperature sensors are controlled by the lm75 kernel modules. +They should already be visible under /sys/bus/i2c/drivers/lm75/. + +Two power supplies are controlled by the CPLD. +Here provide their status under +/sys/bus/i2c/devices/10-0050 and /sys/bus/i2c/devices/11-0053. + +There are QSFP/SFP modules are equipped. +Apply "accton_as7315_util.py show" to get their status. +Apply "accton_as7315_util.py set sfp" to turn on/off light transmission. +Apply "accton_as7315_util.py sff" to dump EEPROM information. +Before operating on that QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/utils/accton_as7315_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/utils/accton_as7315_monitor.py new file mode 100755 index 00000000000..5d821350ac8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/utils/accton_as7315_monitor.py @@ -0,0 +1,168 @@ +#!/usr/bin/env python +# +# Copyright (C) 2019 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# 8/02/2019: Roy Lee modify for as7315_27x +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import types + import time # this is only being used as part of the example + import traceback + import signal + from tabulate import tabulate + from as7315_27xb.fanutil import FanUtil + from as7315_27xb.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = 'accton_as7315_monitor' +DUTY_MAX = 100 +DUTY_DEF = 40 + +global log_file +global log_console + + +# Make a class we can use to capture stdout and sterr in the log +class accton_as7315_monitor(object): + # static temp var + _ori_temp = 0 + _new_perc = 0 + _ori_perc = 0 + + llog = logging.getLogger("["+FUNCTION_NAME+"]") + def __init__(self, log_console, log_file): + """Needs a logger and a logger level.""" + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + sys_handler.setLevel(logging.WARNING) #only fatal for syslog + self.llog.addHandler(sys_handler) + self.llog.setLevel(logging.DEBUG) + + if log_file: + fh = logging.FileHandler(log_file) + fh.setLevel(logging.INFO) + formatter = logging.Formatter('%(asctime)-15s %(name)s %(message)s') + fh.setFormatter(formatter) + self.llog.addHandler(fh) + + # set up logging to console + if log_console: + console = logging.StreamHandler() + console.setLevel(logging.DEBUG) #For debugging + formatter = logging.Formatter('%(asctime)-15s %(name)s %(message)s') + console.setFormatter(formatter) + self.llog.addHandler(console) + + def manage_fans(self): + max_duty = DUTY_MAX + fan_policy = { + 0: [52, 0, 43000], + 1: [63, 43000, 46000], + 2: [75, 46000, 52000], + 3: [88, 52000, 57000], + 4: [max_duty, 57000, sys.maxsize], + } + + thermal = ThermalUtil() + fan = FanUtil() + for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): + fan_status = fan.get_fan_status(x) + if fan_status is None: + self.llog.debug('SET new_perc to %d (FAN stauts is None. fan_num:%d)', max_duty, x) + return False + if fan_status is False: + self.llog.debug('SET new_perc to %d (FAN fault. fan_num:%d)', max_duty, x) + fan.set_fan_duty_cycle(max_duty) + return True + + #Find if current duty matched any of define duty. + #If not, set it to highest one. + cur_duty_cycle = fan.get_fan_duty_cycle() + new_duty_cycle = DUTY_DEF + for x in range(0, len(fan_policy)): + if cur_duty_cycle == fan_policy[x][0]: + break + if x == len(fan_policy) : + fan.set_fan_duty_cycle(fan_policy[0][0]) + cur_duty_cycle = max_duty + + #Decide fan duty by if sum of sensors falls into any of fan_policy{} + get_temp = thermal.get_thermal_temp() + for x in range(0, len(fan_policy)): + y = len(fan_policy) - x -1 #checked from highest + if get_temp > fan_policy[y][1] and get_temp < fan_policy[y][2] : + new_duty_cycle = fan_policy[y][0] + self.llog.debug('Sum of temp %d > %d , new_duty_cycle=%d', get_temp, fan_policy[y][1], new_duty_cycle) + + self.llog.debug('Final duty_cycle=%d', new_duty_cycle) + if(new_duty_cycle != cur_duty_cycle): + fan.set_fan_duty_cycle(new_duty_cycle) + return True + +def sig_handler(signum, frame): + fan = FanUtil() + logging.critical('Cause signal %d, set fan speed max.', signum) + fan.set_fan_duty_cycle(DUTY_MAX) + sys.exit(0) + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_console = 0 + log_file = "" + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl') + except getopt.GetoptError: + print 'Usage: %s [-d] [-l]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l]' % sys.argv[0] + return 0 + elif opt in ('-d'): + log_console = 1 + elif opt in ('-l'): + log_file = '%s.log' % sys.argv[0] + + signal.signal(signal.SIGINT, sig_handler) + signal.signal(signal.SIGTERM, sig_handler) + monitor = accton_as7315_monitor(log_console, log_file) + + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(10) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/utils/accton_as7315_util.py b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/utils/accton_as7315_util.py new file mode 100755 index 00000000000..ea856e4ff56 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/utils/accton_as7315_util.py @@ -0,0 +1,535 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + + + + +PROJECT_NAME = 'as7315_27xb' +version = '0.1.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':2, 'fan':5,'thermal':3, 'psu':2, 'sfp':27} +FORCE = 0 +#logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +#logging.basicConfig(level=logging.INFO) + +qsfp_start_index = 24 + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-1 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-27 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-27 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ROY]"+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_check(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + return True + + + +kos = [ +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe optoe', +'modprobe ym2651y', +'modprobe accton_as7315_27xb_fan', +'modprobe at24_as7315_27xb', +'modprobe x86-64-accton-as7315_27xb-cpld', +'modprobe x86-64-accton-as7315_27xb-led', +'modprobe x86-64-accton-as7315_27xb-psu' ] + +def driver_install(): + global FORCE + status, output = log_os_system("depmod", 1) + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + #remove parameter if any + rm = kos[-(i+1)] + lst = rm.split(" ") + if len(lst) > 2: + del(lst[2:]) + rm = " ".join(lst) + + #Change to removing commands + rm = rm.replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +led_prefix ='/sys/class/leds/'+PROJECT_NAME+'_' +hwmon_types = {'led': ['diag','loc']} +hwmon_nodes = {'led': ['brightness'] } +hwmon_prefix ={'led': led_prefix} + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'fan': ['50-0066'] , + 'thermal': ['51-0049','52-004a', '53-004c'] , + 'psu': ['13-0053','12-0050'], + 'sfp': ['-0050']} +i2c_nodes = {'fan': ['present', 'input'] , + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present', 'psu_power_good'] , + 'sfp': ['present']} + +sfp_map = [26,27,28,29,30,31,32,33, + 34,35,36,37,38,39,40,41, + 42,43,44,45,46,47,48,49, + 21, 22, 23] + +mknod =[ +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-18/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-19/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-20/new_device', + +'echo as7315_cpld1 0x63 > /sys/bus/i2c/devices/i2c-8/new_device', +'echo as7315_cpld2 0x64 > /sys/bus/i2c/devices/i2c-7/new_device', + +'echo 24cxb04 0x57 > /sys/bus/i2c/devices/i2c-4/new_device', +'echo as7315_27xb_psu2 0x50 > /sys/bus/i2c/devices/i2c-12/new_device', +'echo ym2401 0x58 > /sys/bus/i2c/devices/i2c-12/new_device', +'echo as7315_27xb_psu1 0x53 > /sys/bus/i2c/devices/i2c-13/new_device', +'echo ym2401 0x5b > /sys/bus/i2c/devices/i2c-13/new_device', +'echo as7315_fan 0x66 > /sys/bus/i2c/devices/i2c-50/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-51/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-52/new_device', +'echo lm75 0x4c > /sys/bus/i2c/devices/i2c-53/new_device', +] + +def i2c_order_check(): + return 0 + +def device_install(): + global FORCE + + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(0,len(sfp_map)): + path = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device" + if 1 >= qsfp_start_index: + status, output =log_os_system("echo optoe1 0x50 > " + path, 1) + else: + status, output =log_os_system("echo optoe2 0x50 > " + path, 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/1-0076", 0) + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + nodelist = mknod + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_check() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_check() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_check()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + if k > qsfp_start_index: + fmt = i2c_prefix+"7-0064/{0}_{1}" + else: + fmt = i2c_prefix+"8-0063/{0}_{1}" + path = fmt.format(nodes[j], (k%qsfp_start_index)+1) + + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + i = int(index)-1 + node = i2c_prefix+ str(sfp_map[i])+ i2c_bus['sfp'][0]+"/"+ 'eeprom' + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system(hex_cmd +" -C "+node, 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan'] ['fan1'][0] + node = node.replace(node.split("/")[-1], 'fan_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0076", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/classes/fanutil.py new file mode 100755 index 00000000000..91ca21aa528 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/classes/fanutil.py @@ -0,0 +1,252 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 3/23/2018: Roy Lee modify for as7326_56x +# 6/26/2018: Jostar implement by new thermal policy from HW RD +# ------------------------------------------------------------------ +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_NUM_ON_MAIN_BROAD = 6 + FAN_NUM_1_IDX = 1 + FAN_NUM_2_IDX = 2 + FAN_NUM_3_IDX = 3 + FAN_NUM_4_IDX = 4 + FAN_NUM_5_IDX = 5 + FAN_NUM_6_IDX = 6 + + FAN_NODE_NUM_OF_MAP = 2 + FAN_NODE_FAULT_IDX_OF_MAP = 1 + FAN_NODE_DIR_IDX_OF_MAP = 2 + #FAN_NODE_DUTY_IDX_OF_MAP = 4 + #FANR_NODE_FAULT_IDX_OF_MAP = 5 + + BASE_VAL_PATH = '/sys/bus/i2c/devices/11-0066/{0}' + FAN_DUTY_PATH = '/sys/bus/i2c/devices/11-0066/fan_duty_cycle_percentage' + + #logfile = '' + #loglevel = logging.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + _fan_to_device_path_mapping = {} + +#fan1_direction +#fan1_fault +#fan1_present + + #(FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage', + _fan_to_device_node_mapping = { + (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault', + (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction', + + (FAN_NUM_2_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan2_fault', + (FAN_NUM_2_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan2_direction', + + (FAN_NUM_3_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan3_fault', + (FAN_NUM_3_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan3_direction', + + (FAN_NUM_4_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan4_fault', + (FAN_NUM_4_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan4_direction', + + (FAN_NUM_5_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan5_fault', + (FAN_NUM_5_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan5_direction', + + (FAN_NUM_6_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan6_fault', + (FAN_NUM_6_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan6_direction', + } + + def _get_fan_to_device_node(self, fan_num, node_num): + return self._fan_to_device_node_mapping[(fan_num, node_num)] + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + + try: + val_file = open(device_path, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + def __init__(self): + fan_path = self.BASE_VAL_PATH + + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_NUM_ON_MAIN_BROAD+1): + for node_num in range(self.FAN_NODE_FAULT_IDX_OF_MAP, self.FAN_NODE_NUM_OF_MAP+1): + self._fan_to_device_path_mapping[(fan_num, node_num)] = fan_path.format( + self._fan_to_device_node_mapping[(fan_num, node_num)]) + + def get_num_fans(self): + return self.FAN_NUM_ON_MAIN_BROAD + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM_OF_MAP + + def get_idx_node_start(self): + return self.FAN_NODE_FAULT_IDX_OF_MAP + + def get_size_node_map(self): + return len(self._fan_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._fan_to_device_path_mapping) + + def get_fan_to_device_path(self, fan_num, node_num): + return self._fan_to_device_path_mapping[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_FAULT_IDX_OF_MAP) + + #def get_fan_speed(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FAN_NODE_SPEED_IDX_OF_MAP) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DIR_IDX_OF_MAP) + + def get_fan_duty_cycle(self): + #duty_path = self.FAN_DUTY_PATH + try: + val_file = open(self.FAN_DUTY_PATH) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + return int(content) + #self._get_fan_node_val(fan_num, self.FAN_NODE_DUTY_IDX_OF_MAP) +#static u32 reg_val_to_duty_cycle(u8 reg_val) +#{ +# reg_val &= FAN_DUTY_CYCLE_REG_MASK; +# return ((u32)(reg_val+1) * 625 + 75)/ 100; +#} +# + def set_fan_duty_cycle(self, val): + + try: + fan_file = open(self.FAN_DUTY_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + fan_file.write(str(val)) + fan_file.close() + return True + + #def get_fanr_fault(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FANR_NODE_FAULT_IDX_OF_MAP) + + def get_fanr_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP) + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num, %d', fan_num) + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + #logging.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + #if self.get_fanr_fault(fan_num) is not None and self.get_fanr_fault(fan_num) > 0: + # logging.debug('GET. FANR fault. fan_num, %d', fan_num) + # return False + + return True + +#def main(): +# fan = FanUtil() +# +# print 'get_size_node_map : %d' % fan.get_size_node_map() +# print 'get_size_path_map : %d' % fan.get_size_path_map() +# for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): +# for y in range(fan.get_idx_node_start(), fan.get_num_nodes()+1): +# print fan.get_fan_to_device_path(x, y) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/classes/thermalutil.py new file mode 100755 index 00000000000..9087ff1c38f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/classes/thermalutil.py @@ -0,0 +1,166 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 3/23/2018: Roy Lee modify for as7326_56x +# 6/26/2018: Jostar implement by new thermal policy from HW RD +# ------------------------------------------------------------------ + +try: + import os + import time + import logging + import glob + import commands + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status = 1 + output = "" + status, output = commands.getstatusoutput(cmd) + if show: + print "ACC: " + str(cmd) + " , result:"+ str(status) + + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + + THERMAL_NUM_MAX = 6 + THERMAL_NUM_1_IDX = 1 # 1_ON_MAIN_BROAD. LM75 + THERMAL_NUM_2_IDX = 2 # 2_ON_MAIN_BROAD. LM75 + THERMAL_NUM_3_IDX = 3 # 3_ON_MAIN_BROAD. LM75 + THERMAL_NUM_4_IDX = 4 # CPU board. LM75 + THERMAL_NUM_5_IDX = 5 # CPU core thermal + THERMAL_NUM_6_IDX = 6 # BCM thermal + + BCM_thermal_cmd = 'bcmcmd "show temp" > /tmp/bcm_thermal' + BCM_thermal_path = '/tmp/bcm_thermal' + #BCM_thermal_path = '/tmp/bcm_debug' + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + #_thermal_to_device_path_mapping = {} + + _thermal_to_device_node_mapping = { + THERMAL_NUM_1_IDX: ['15', '48'], + THERMAL_NUM_2_IDX: ['15', '49'], + THERMAL_NUM_3_IDX: ['15', '4a'], + THERMAL_NUM_4_IDX: ['15', '4b'], + } + thermal_sysfspath ={ + THERMAL_NUM_1_IDX: ["/sys/bus/i2c/drivers/lm75/15-0048/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_2_IDX: ["/sys/bus/i2c/drivers/lm75/15-0049/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_3_IDX: ["/sys/bus/i2c/drivers/lm75/15-004a/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_4_IDX: ["/sys/bus/i2c/drivers/lm75/15-004b/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_5_IDX: ["/sys/class/hwmon/hwmon0/temp1_input"], + } + + #def __init__(self): + + def _get_thermal_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_MAX: + logging.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + if thermal_num < self.THERMAL_NUM_6_IDX: + device_path = self.get_thermal_to_device_path(thermal_num) + + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + return int(content) + + else: + log_os_system(self.BCM_thermal_cmd,0) + file_path = self.BCM_thermal_path + check_file = open(file_path) + try: + check_file = open(file_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return 0 + file_str = check_file.read() + search_str="average current temperature is" + str_len = len(search_str) + idx=file_str.find(search_str) + if idx==-1: + logging.debug('bcm sdk is not ready ,retrun 0') + return 0 + else: + temp_str=file_str[idx+str_len+1] + file_str[idx+str_len+2] + file_str[idx+str_len+3]+file_str[idx+str_len+4] +file_str[idx+str_len+5] + check_file.close() + return float(temp_str)*1000 + + def get_num_thermals(self): + return self.THERMAL_NUM_MAX + + def get_idx_thermal_start(self): + return self.THERMAL_NUM_1_IDX + + def get_size_node_map(self): + return len(self._thermal_to_device_node_mapping) + + def get_size_path_map(self): + return len(self.thermal_sysfspath) + + def get_thermal_to_device_path(self, thermal_num): + return self.thermal_sysfspath[thermal_num][0] + + def get_thermal_1_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + + def get_thermal_2_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) + def get_thermal_temp(self): + return (self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) +self._get_thermal_node_val(self.THERMAL_NUM_3_IDX)) + +def main(): + thermal = ThermalUtil() + logging.debug('thermal1=%d' ,thermal._get_thermal_val(1)) + logging.debug('thermal2=%d' ,thermal._get_thermal_val(2)) + logging.debug('thermal3=%d' ,thermal._get_thermal_val(3)) + logging.debug('thermal4=%d' ,thermal._get_thermal_val(4)) + logging.debug('thermal5=%d' ,thermal._get_thermal_val(5)) + logging.debug('thermal6=%d' ,thermal._get_thermal_val(6)) + +if __name__ == '__main__': + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/Makefile new file mode 100755 index 00000000000..85c066571c2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/Makefile @@ -0,0 +1,17 @@ +ifneq ($(KERNELRELEASE),) +obj-m:= accton_i2c_cpld.o \ + accton_as7326_56x_fan.o accton_as7326_56x_leds.o \ + accton_as7326_56x_psu.o ym2651y.o + +else +ifeq (,$(KERNEL_SRC)) +$(error KERNEL_SRC is not defined) +else +KERNELDIR:=$(KERNEL_SRC) +endif +PWD:=$(shell pwd) +default: + $(MAKE) -C $(KERNELDIR) M=$(PWD) modules +clean: + rm -rf *.o *.mod.o *.mod.o *.ko .*cmd .tmp_versions Module.markers Module.symvers modules.order +endif diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_fan.c new file mode 100755 index 00000000000..606019f3ea4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_fan.c @@ -0,0 +1,815 @@ +/* + * A hwmon driver for the Accton as7326 56x fan + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as7326_56x_fan" + +#define NUM_THERMAL_SENSORS (3) /* Get sum of this number of sensors.*/ +#define THERMAL_SENSORS_DRIVER "lm75" +#define THERMAL_SENSORS_ADDRS {0x48, 0x49, 0x4a} + +#define IN +#define OUT + +static struct as7326_56x_fan_data *as7326_56x_fan_update_device(struct device *dev); +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_enable(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, char *buf); +extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +/* fan related data, the index should match sysfs_fan_attributes + */ +static const u8 fan_reg[] = { + 0x0F, /* fan 1-6 present status */ + 0x10, /* fan 1-6 direction(0:F2B 1:B2F) */ + 0x11, /* fan PWM(for all fan) */ + 0x12, /* front fan 1 speed(rpm) */ + 0x13, /* front fan 2 speed(rpm) */ + 0x14, /* front fan 3 speed(rpm) */ + 0x15, /* front fan 4 speed(rpm) */ + 0x16, /* front fan 5 speed(rpm) */ + 0x17, /* front fan 6 speed(rpm) */ + 0x22, /* rear fan 1 speed(rpm) */ + 0x23, /* rear fan 2 speed(rpm) */ + 0x24, /* rear fan 3 speed(rpm) */ + 0x25, /* rear fan 4 speed(rpm) */ + 0x26, /* rear fan 5 speed(rpm) */ + 0x27, /* rear fan 6 speed(rpm) */ +}; + +/* Each client has this additional data */ +struct as7326_56x_fan_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ + u8 enable; + int system_temp; /*In unit of mini-Celsius*/ + int sensors_found; +}; + +enum fan_id { + FAN1_ID, + FAN2_ID, + FAN3_ID, + FAN4_ID, + FAN5_ID, + FAN6_ID +}; + +enum sysfs_fan_attributes { + FAN_PRESENT_REG, + FAN_DIRECTION_REG, + FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ + FAN1_FRONT_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN5_FRONT_SPEED_RPM, + FAN6_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN5_REAR_SPEED_RPM, + FAN6_REAR_SPEED_RPM, + FAN1_DIRECTION, + FAN2_DIRECTION, + FAN3_DIRECTION, + FAN4_DIRECTION, + FAN5_DIRECTION, + FAN6_DIRECTION, + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN5_PRESENT, + FAN6_PRESENT, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + FAN5_FAULT, + FAN6_FAULT +}; + +/* Define attributes + */ +#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT);\ + static SENSOR_DEVICE_ATTR(fan##index2##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT) +#define DECLARE_FAN_FAULT_ATTR(index, index2) &sensor_dev_attr_fan##index##_fault.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_fault.dev_attr.attr + +#define DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_direction, S_IRUGO, fan_show_value, NULL, FAN##index##_DIRECTION) +#define DECLARE_FAN_DIRECTION_ATTR(index) &sensor_dev_attr_fan##index##_direction.dev_attr.attr + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE);\ + static SENSOR_DEVICE_ATTR(pwm##index, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE);\ + static SENSOR_DEVICE_ATTR(pwm##index##_enable, S_IWUSR | S_IRUGO, get_enable, set_enable, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan_duty_cycle_percentage.dev_attr.attr, \ + &sensor_dev_attr_pwm##index.dev_attr.attr, \ + &sensor_dev_attr_pwm##index##_enable.dev_attr.attr + +#define DECLARE_FAN_SYSTEM_TEMP_SENSOR_DEV_ATTR() \ + static SENSOR_DEVICE_ATTR(sys_temp, S_IRUGO, get_sys_temp, NULL, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_SYSTEM_TEMP_ATTR() &sensor_dev_attr_sys_temp.dev_attr.attr + + +#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_present, S_IRUGO, fan_show_value, NULL, FAN##index##_PRESENT) +#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr + +#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index2##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM) +#define DECLARE_FAN_SPEED_RPM_ATTR(index, index2) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_input.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_input.dev_attr.attr + +/* 6 fan fault attributes in this platform */ +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(6,16); +/* 6 fan speed(rpm) attributes in this platform */ +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(6,16); +/* 6 fan present attributes in this platform */ +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(5); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(6); +/* 6 fan direction attribute in this platform */ +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(1); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(2); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(3); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(4); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(5); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(6); +/* 1 fan duty cycle attribute in this platform */ +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(1); +/* System temperature for fancontrol */ +DECLARE_FAN_SYSTEM_TEMP_SENSOR_DEV_ATTR(); + +static struct attribute *as7326_56x_fan_attributes[] = { + /* fan related attributes */ + DECLARE_FAN_FAULT_ATTR(1,11), + DECLARE_FAN_FAULT_ATTR(2,12), + DECLARE_FAN_FAULT_ATTR(3,13), + DECLARE_FAN_FAULT_ATTR(4,14), + DECLARE_FAN_FAULT_ATTR(5,15), + DECLARE_FAN_FAULT_ATTR(6,16), + DECLARE_FAN_SPEED_RPM_ATTR(1,11), + DECLARE_FAN_SPEED_RPM_ATTR(2,12), + DECLARE_FAN_SPEED_RPM_ATTR(3,13), + DECLARE_FAN_SPEED_RPM_ATTR(4,14), + DECLARE_FAN_SPEED_RPM_ATTR(5,15), + DECLARE_FAN_SPEED_RPM_ATTR(6,16), + DECLARE_FAN_PRESENT_ATTR(1), + DECLARE_FAN_PRESENT_ATTR(2), + DECLARE_FAN_PRESENT_ATTR(3), + DECLARE_FAN_PRESENT_ATTR(4), + DECLARE_FAN_PRESENT_ATTR(5), + DECLARE_FAN_PRESENT_ATTR(6), + DECLARE_FAN_DIRECTION_ATTR(1), + DECLARE_FAN_DIRECTION_ATTR(2), + DECLARE_FAN_DIRECTION_ATTR(3), + DECLARE_FAN_DIRECTION_ATTR(4), + DECLARE_FAN_DIRECTION_ATTR(5), + DECLARE_FAN_DIRECTION_ATTR(6), + DECLARE_FAN_DUTY_CYCLE_ATTR(1), + DECLARE_FAN_SYSTEM_TEMP_ATTR(), + NULL +}; + +#define FAN_DUTY_CYCLE_REG_MASK 0xF +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 100 + +static int as7326_56x_fan_read_value(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int as7326_56x_fan_write_value(struct i2c_client *client, u8 reg, u8 value) +{ + return i2c_smbus_write_byte_data(client, reg, value); +} + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + reg_val &= FAN_DUTY_CYCLE_REG_MASK; + return ((u32)(reg_val+1) * 625 + 75)/ 100; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + return ((u32)duty_cycle * 100 / 625) - 1; +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static u8 reg_val_to_direction(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 1 : 0; +} +static u8 reg_val_to_is_present(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 0 : 1; +} + +static u8 is_fan_fault(struct as7326_56x_fan_data *data, enum fan_id id) +{ + u8 ret = 1; + int front_fan_index = FAN1_FRONT_SPEED_RPM + id; + int rear_fan_index = FAN1_REAR_SPEED_RPM + id; + + /* Check if the speed of front or rear fan is ZERO, + */ + if (reg_val_to_speed_rpm(data->reg_val[front_fan_index]) && + reg_val_to_speed_rpm(data->reg_val[rear_fan_index])) { + ret = 0; + } + + return ret; +} + +static ssize_t set_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct as7326_56x_fan_data *data = as7326_56x_fan_update_device(dev); + int error, value; + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0 || value > 1) + return -EINVAL; + + data->enable = value; + if (value == 0) + { + return set_duty_cycle(dev, da, buf, FAN_MAX_DUTY_CYCLE); + } + return count; +} + + +static ssize_t get_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as7326_56x_fan_data *data = as7326_56x_fan_update_device(dev); + + return sprintf(buf, "%u\n", data->enable); +} +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + struct i2c_client *client = to_i2c_client(dev); + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0) + return -EINVAL; + + value = (value > FAN_MAX_DUTY_CYCLE)? FAN_MAX_DUTY_CYCLE : value; + + as7326_56x_fan_write_value(client, 0x33, 0); /* Disable fan speed watch dog */ + as7326_56x_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); + return count; +} + +/* Due to this struct is declared at lm75.c, it cannot be include + * under Sonic environment. I duplicate it from lm75.c. + */ +struct lm75_data { + struct i2c_client *client; + struct device *hwmon_dev; + struct thermal_zone_device *tz; + struct mutex update_lock; + u8 orig_conf; + u8 resolution; /* In bits, between 9 and 12 */ + u8 resolution_limits; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + unsigned long sample_time; /* In jiffies */ + s16 temp[3]; /* Register values, + 0 = input + 1 = max + 2 = hyst */ +}; + +/*Copied from lm75.c*/ +static inline long lm75_reg_to_mc(s16 temp, u8 resolution) +{ + return ((temp >> (16 - resolution)) * 1000) >> (resolution - 8); +} + +/*Get hwmon_dev from i2c_client, set hwmon_dev = NULL is failed.*/ +static struct device * get_hwmon_dev( + struct i2c_client *client) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + if(data) + { + if( data->valid == 1 && data->hwmon_dev) + { + return data->hwmon_dev; + } + + } + return NULL; +} + +/* To find hwmon index by opening hwmon under that i2c address. + */ +static int find_hwmon_index_by_FileOpen( + int bus_nr, + unsigned short addr, + OUT int *index) +{ +#define MAX_HWMON_DEVICE (10) /* Find hwmon device in 0~10*/ + struct file *sfd; + char client_name[96]; + int i=0; + + do { + snprintf(client_name, sizeof(client_name), + "/sys/bus/i2c/devices/%d-%04x/hwmon/hwmon%d/temp1_input", + bus_nr, addr, i); + + sfd = filp_open(client_name, O_RDONLY, 0); + i++; + } while( IS_ERR(sfd) && i < MAX_HWMON_DEVICE); + + if (IS_ERR(sfd)) { + pr_err("Failed to open file(%s)#%d\r\n", client_name, __LINE__); + return -ENOENT; + } + filp_close(sfd, 0); + *index = i - 1; + return 0; + +#undef MAX_HWMON_DEVICE +} + +static int get_temp_file_path( + int bus_nr, unsigned short addr, + struct device *hwmon_dev + ,char *path, int max_len) +{ + + if(hwmon_dev && strlen(dev_name(hwmon_dev))) + { + snprintf(path, max_len, + "/sys/bus/i2c/devices/%d-%04x/hwmon/%s/temp1_input", + bus_nr, addr, dev_name(hwmon_dev)); + } + else + { + int i=0; + if(find_hwmon_index_by_FileOpen( bus_nr, addr, &i)) + { + return -EIO; + } + snprintf(path, max_len, + "/sys/bus/i2c/devices/%d-%04x/hwmon/hwmon%d/temp1_input", + bus_nr, addr, i); + } + return 0; +} + +/*File read the dev file at user space.*/ +static int read_devfile_temp1_input( + struct device *dev, + int bus_nr, + unsigned short addr, + struct device *hwmon_dev, + int *miniCelsius) +{ + struct file *sfd; + char buffer[96]; + char devfile[96]; + int rc, status; + int rdlen, value; + mm_segment_t old_fs; + + rc = 0; + get_temp_file_path(bus_nr, addr, hwmon_dev, devfile, sizeof(devfile)); + sfd = filp_open(devfile, O_RDONLY, 0); + if (IS_ERR(sfd)) { + pr_err("Failed to open file(%s)#%d\r\n", devfile, __LINE__); + return -ENOENT; + } + dev_dbg(dev, "Found device:%s\n",devfile); + + if(!(sfd->f_op) || !(sfd->f_op->read) ) { + pr_err("file %s cann't readable ?\n",devfile); + return -ENOENT; + } + + old_fs = get_fs(); + set_fs(KERNEL_DS); + rdlen = sfd->f_op->read(sfd, buffer, sizeof(buffer), &sfd->f_pos); + if (rdlen == 0) { + pr_err( "File(%s) empty!\n", devfile); + rc = -EIO; + goto exit; + } + status = sscanf(buffer, "%d", &value); + if (status != 1) { + rc = -EIO; + goto exit; + } + *miniCelsius = value; + dev_dbg(dev,"found sensors: %d @i2c %d-%04x\n", value, bus_nr, addr); + +exit: + set_fs(old_fs); + filp_close(sfd, 0); + return rc; +} + +static u8 is_lm75_data_due(struct i2c_client *client) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + if (time_after(jiffies, data->last_updated + data->sample_time)) + { + return 1; + } + return 0; +} +static int get_lm75_temp(struct i2c_client *client, int *miniCelsius) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + *miniCelsius = lm75_reg_to_mc(data->temp[0], data->resolution); + + return 0; +} + +static bool lm75_addr_mached(unsigned short addr) +{ + int i; + unsigned short addrs[] = THERMAL_SENSORS_ADDRS; + + for (i = 0; i < ARRAY_SIZE(addrs); i++) + { + if( addr == addrs[i]) + return 1; + } + return 0; +} + +static int _find_lm75_device(struct device *dev, void *data) +{ + struct device_driver *driver; + struct as7326_56x_fan_data *prv = data; + char *driver_name = THERMAL_SENSORS_DRIVER; + + driver = dev->driver; + if (driver && driver->name && + strcmp(driver->name, driver_name) == 0) + { + struct i2c_client *client; + client = to_i2c_client(dev); + if (client) + { + /*cannot use "struct i2c_adapter *adap = to_i2c_adapter(dev);"*/ + struct i2c_adapter *adap = client->adapter; + int miniCelsius = 0; + + if (! lm75_addr_mached(client->addr)) + { + return 0; + } + + if (!adap) { + return -ENXIO; + } + + /* If the data is not updated, read them from devfile + to drive them updateing data from chip.*/ + if (is_lm75_data_due(client)) + { + struct device *hwmon_dev; + + hwmon_dev = get_hwmon_dev(client); + if(0 == read_devfile_temp1_input(dev, adap->nr, + client->addr, hwmon_dev, &miniCelsius)) + { + prv->system_temp += miniCelsius; + prv->sensors_found++; + } + + } + else + { + get_lm75_temp(client, &miniCelsius); + prv->system_temp += miniCelsius; + prv->sensors_found++; + + } + } + } + return 0; +} + +/*Find all lm75 devices and return sum of temperatures.*/ +static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + ssize_t ret = 0; + struct as7326_56x_fan_data *data = as7326_56x_fan_update_device(dev); + + data->system_temp=0; + data->sensors_found=0; + i2c_for_each_dev(data, _find_lm75_device); + if (NUM_THERMAL_SENSORS != data->sensors_found) + { + dev_dbg(dev,"only %d of %d temps are found\n", + data->sensors_found, NUM_THERMAL_SENSORS); + data->system_temp = INT_MAX; + } + ret = sprintf(buf, "%d\n",data->system_temp); + return ret; +} + +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7326_56x_fan_data *data = as7326_56x_fan_update_device(dev); + ssize_t ret = 0; + + if (data->valid) { + switch (attr->index) { + case FAN_DUTY_CYCLE_PERCENTAGE: + { + u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); + ret = sprintf(buf, "%u\n", duty_cycle); + break; + } + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN5_FRONT_SPEED_RPM: + case FAN6_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: + case FAN6_REAR_SPEED_RPM: + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index])); + break; + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + case FAN6_PRESENT: + ret = sprintf(buf, "%d\n", + reg_val_to_is_present(data->reg_val[FAN_PRESENT_REG], + attr->index - FAN1_PRESENT)); + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + case FAN6_FAULT: + ret = sprintf(buf, "%d\n", is_fan_fault(data, attr->index - FAN1_FAULT)); + break; + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + case FAN5_DIRECTION: + case FAN6_DIRECTION: + ret = sprintf(buf, "%d\n", + reg_val_to_direction(data->reg_val[FAN_DIRECTION_REG], + attr->index - FAN1_DIRECTION)); + break; + default: + break; + } + } + + return ret; +} + +static const struct attribute_group as7326_56x_fan_group = { + .attrs = as7326_56x_fan_attributes, +}; + +static struct as7326_56x_fan_data *as7326_56x_fan_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7326_56x_fan_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + dev_dbg(&client->dev, "Starting as7326_56x_fan update\n"); + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { + int status = as7326_56x_fan_read_value(client, fan_reg[i]); + + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + dev_dbg(&client->dev, "reg %d, err %d\n", fan_reg[i], status); + return data; + } + else { + data->reg_val[i] = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int as7326_56x_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7326_56x_fan_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7326_56x_fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->enable = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7326_56x_fan_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7326_56x_fan_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7326_56x_fan_remove(struct i2c_client *client) +{ + struct as7326_56x_fan_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7326_56x_fan_group); + + return 0; +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x66, I2C_CLIENT_END }; + +static const struct i2c_device_id as7326_56x_fan_id[] = { + { "as7326_56x_fan", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7326_56x_fan_id); + +static struct i2c_driver as7326_56x_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = as7326_56x_fan_probe, + .remove = as7326_56x_fan_remove, + .id_table = as7326_56x_fan_id, + .address_list = normal_i2c, +}; + +static int __init as7326_56x_fan_init(void) +{ + return i2c_add_driver(&as7326_56x_fan_driver); +} + +static void __exit as7326_56x_fan_exit(void) +{ + i2c_del_driver(&as7326_56x_fan_driver); +} + +module_init(as7326_56x_fan_init); +module_exit(as7326_56x_fan_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7326_56x_fan driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_leds.c b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_leds.c new file mode 100644 index 00000000000..4cb7f1fa25a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_leds.c @@ -0,0 +1,438 @@ +/* + * A LED driver for the accton_as7326_56x_led + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +extern int as7326_56x_cpld_read (unsigned short cpld_addr, u8 reg); +extern int as7326_56x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern void led_classdev_unregister(struct led_classdev *led_cdev); +extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); +extern void led_classdev_resume(struct led_classdev *led_cdev); +extern void led_classdev_suspend(struct led_classdev *led_cdev); + +#define DRVNAME "accton_as7326_56x_led" + +struct accton_as7326_56x_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[1]; /* only 1 register*/ +}; + +static struct accton_as7326_56x_led_data *ledctl = NULL; + +/* LED related data + */ + +#define LED_CNTRLER_I2C_ADDRESS (0x60) + +#define LED_TYPE_DIAG_REG_MASK (0x3) +#define LED_MODE_DIAG_GREEN_VALUE (0x02) +#define LED_MODE_DIAG_RED_VALUE (0x01) +#define LED_MODE_DIAG_AMBER_VALUE (0x00) /*It's yellow actually. Green+Red=Yellow*/ +#define LED_MODE_DIAG_OFF_VALUE (0x03) + + +#define LED_TYPE_LOC_REG_MASK (0x80) +#define LED_MODE_LOC_ON_VALUE (0) +#define LED_MODE_LOC_OFF_VALUE (0x80) + +enum led_type { + LED_TYPE_DIAG, + LED_TYPE_LOC, + LED_TYPE_FAN, + LED_TYPE_PSU1, + LED_TYPE_PSU2 +}; + +struct led_reg { + u32 types; + u8 reg_addr; +}; + +static const struct led_reg led_reg_map[] = { + {(1<update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as7326_56x_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = accton_as7326_56x_led_read_value(led_reg_map[i].reg_addr); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg_map[i].reg_addr, status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as7326_56x_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + enum led_type type) +{ + int reg_val; + u8 reg ; + mutex_lock(&ledctl->update_lock); + + if( !accton_getLedReg(type, ®)) + { + dev_dbg(&ledctl->pdev->dev, "Not match item for %d.\n", type); + } + + reg_val = accton_as7326_56x_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + accton_as7326_56x_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + + +static void accton_as7326_56x_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as7326_56x_led_set(led_cdev, led_light_mode, LED_TYPE_DIAG); +} + +static enum led_brightness accton_as7326_56x_led_diag_get(struct led_classdev *cdev) +{ + accton_as7326_56x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void accton_as7326_56x_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as7326_56x_led_set(led_cdev, led_light_mode, LED_TYPE_LOC); +} + +static enum led_brightness accton_as7326_56x_led_loc_get(struct led_classdev *cdev) +{ + accton_as7326_56x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static void accton_as7326_56x_led_auto_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ +} + +static enum led_brightness accton_as7326_56x_led_auto_get(struct led_classdev *cdev) +{ + return LED_MODE_AUTO; +} + +static struct led_classdev accton_as7326_56x_leds[] = { + [LED_TYPE_DIAG] = { + .name = "accton_as7326_56x_led::diag", + .default_trigger = "unused", + .brightness_set = accton_as7326_56x_led_diag_set, + .brightness_get = accton_as7326_56x_led_diag_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_RED, + }, + [LED_TYPE_LOC] = { + .name = "accton_as7326_56x_led::loc", + .default_trigger = "unused", + .brightness_set = accton_as7326_56x_led_loc_set, + .brightness_get = accton_as7326_56x_led_loc_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_BLUE, + }, + [LED_TYPE_FAN] = { + .name = "accton_as7326_56x_led::fan", + .default_trigger = "unused", + .brightness_set = accton_as7326_56x_led_auto_set, + .brightness_get = accton_as7326_56x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU1] = { + .name = "accton_as7326_56x_led::psu1", + .default_trigger = "unused", + .brightness_set = accton_as7326_56x_led_auto_set, + .brightness_get = accton_as7326_56x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "accton_as7326_56x_led::psu2", + .default_trigger = "unused", + .brightness_set = accton_as7326_56x_led_auto_set, + .brightness_get = accton_as7326_56x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, +}; + +static int accton_as7326_56x_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as7326_56x_leds); i++) { + led_classdev_suspend(&accton_as7326_56x_leds[i]); + } + + return 0; +} + +static int accton_as7326_56x_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as7326_56x_leds); i++) { + led_classdev_resume(&accton_as7326_56x_leds[i]); + } + + return 0; +} + +static int accton_as7326_56x_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(accton_as7326_56x_leds); i++) { + ret = led_classdev_register(&pdev->dev, &accton_as7326_56x_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(accton_as7326_56x_leds)) { + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&accton_as7326_56x_leds[i]); + } + } + + return ret; +} + +static int accton_as7326_56x_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(accton_as7326_56x_leds); i++) { + led_classdev_unregister(&accton_as7326_56x_leds[i]); + } + + return 0; +} + +static struct platform_driver accton_as7326_56x_led_driver = { + .probe = accton_as7326_56x_led_probe, + .remove = accton_as7326_56x_led_remove, + .suspend = accton_as7326_56x_led_suspend, + .resume = accton_as7326_56x_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as7326_56x_led_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as7326_56x_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct accton_as7326_56x_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as7326_56x_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&accton_as7326_56x_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as7326_56x_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&accton_as7326_56x_led_driver); + kfree(ledctl); +} + +module_init(accton_as7326_56x_led_init); +module_exit(accton_as7326_56x_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as7326_56x_led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_psu.c new file mode 100644 index 00000000000..8c2ece6200f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_psu.c @@ -0,0 +1,277 @@ +/* + * An hwmon driver for accton as7326_56x Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); +static int as7326_56x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as7326_56x_cpld_read(unsigned short cpld_addr, u8 reg); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x50, 0x53, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as7326_56x_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[9]; /* Model name, read from eeprom */ +}; + +static struct as7326_56x_psu_data *as7326_56x_psu_update_device(struct device *dev); + +enum as7326_56x_psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_model_name,NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); + +static struct attribute *as7326_56x_psu_attributes[] = { + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + NULL +}; + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7326_56x_psu_data *data = as7326_56x_psu_update_device(dev); + u8 status = 0; + + if (attr->index == PSU_PRESENT) { + status = !(data->status >> (1-data->index) & 0x1); + } + else { /* PSU_POWER_GOOD */ + status = (data->status >> (3-data->index) & 0x1); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as7326_56x_psu_data *data = as7326_56x_psu_update_device(dev); + + return sprintf(buf, "%s\n", data->model_name); +} + +static const struct attribute_group as7326_56x_psu_group = { + .attrs = as7326_56x_psu_attributes, +}; + +static int as7326_56x_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7326_56x_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7326_56x_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7326_56x_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7326_56x_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7326_56x_psu_remove(struct i2c_client *client) +{ + struct as7326_56x_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7326_56x_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as7326_56x_psu1, + as7326_56x_psu2 +}; + +static const struct i2c_device_id as7326_56x_psu_id[] = { + { "as7326_56x_psu1", as7326_56x_psu1 }, + { "as7326_56x_psu2", as7326_56x_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7326_56x_psu_id); + +static struct i2c_driver as7326_56x_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7326_56x_psu", + }, + .probe = as7326_56x_psu_probe, + .remove = as7326_56x_psu_remove, + .id_table = as7326_56x_psu_id, + .address_list = normal_i2c, +}; + +static int as7326_56x_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = 0; + int retry_count = 5; + + while (retry_count) { + retry_count--; + + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) { + msleep(10); + continue; + } + + if (unlikely(result != data_len)) { + result = -EIO; + msleep(10); + continue; + } + + result = 0; + break; + } + + return result; +} + +static struct as7326_56x_psu_data *as7326_56x_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7326_56x_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status; + int power_good = 0; + + dev_dbg(&client->dev, "Starting as7326_56x update\n"); + + /* Read psu status */ + status = as7326_56x_cpld_read(0x60, 0x2); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg 0x60 err %d\n", status); + } + else { + data->status = status; + } + + /* Read model name */ + memset(data->model_name, 0, sizeof(data->model_name)); + power_good = (data->status >> (3-data->index) & 0x1); + + if (power_good) { + status = as7326_56x_psu_read_block(client, 0x20, data->model_name, + ARRAY_SIZE(data->model_name)-1); + + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x)\n", client->addr); + } + else { + data->model_name[ARRAY_SIZE(data->model_name)-1] = '\0'; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(as7326_56x_psu_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7326_56x_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_i2c_cpld.c new file mode 100644 index 00000000000..70d9a66affd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_i2c_cpld.c @@ -0,0 +1,1176 @@ +/* + * Copyright (C) Brandon Chuang + * + * This module supports the accton cpld that hold the channel select + * mechanism for other i2c slave devices, such as SFP. + * This includes the: + * Accton as7326_56x CPLD1/CPLD2/CPLD3 + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +enum cpld_type { + as7326_56x_cpld1, + as7326_56x_cpld2, + as7326_56x_cpld3 +}; + +struct as7326_56x_cpld_data { + enum cpld_type type; + struct device *hwmon_dev; + struct mutex update_lock; +}; + +static const struct i2c_device_id as7326_56x_cpld_id[] = { + { "as7326_56x_cpld1", as7326_56x_cpld1 }, + { "as7326_56x_cpld2", as7326_56x_cpld2 }, + { "as7326_56x_cpld3", as7326_56x_cpld3 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, as7326_56x_cpld_id); + +#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index +#define TRANSCEIVER_TXDISABLE_ATTR_ID(index) MODULE_TXDISABLE_##index +#define TRANSCEIVER_RXLOS_ATTR_ID(index) MODULE_RXLOS_##index +#define TRANSCEIVER_TXFAULT_ATTR_ID(index) MODULE_TXFAULT_##index +#define TRANSCEIVER_RESET_ATTR_ID(index) MODULE_RESET_##index + +enum as7326_56x_cpld_sysfs_attributes { + CPLD_VERSION, + ACCESS, + MODULE_PRESENT_ALL, + MODULE_RXLOS_ALL, + /* transceiver attributes */ + TRANSCEIVER_PRESENT_ATTR_ID(1), + TRANSCEIVER_PRESENT_ATTR_ID(2), + TRANSCEIVER_PRESENT_ATTR_ID(3), + TRANSCEIVER_PRESENT_ATTR_ID(4), + TRANSCEIVER_PRESENT_ATTR_ID(5), + TRANSCEIVER_PRESENT_ATTR_ID(6), + TRANSCEIVER_PRESENT_ATTR_ID(7), + TRANSCEIVER_PRESENT_ATTR_ID(8), + TRANSCEIVER_PRESENT_ATTR_ID(9), + TRANSCEIVER_PRESENT_ATTR_ID(10), + TRANSCEIVER_PRESENT_ATTR_ID(11), + TRANSCEIVER_PRESENT_ATTR_ID(12), + TRANSCEIVER_PRESENT_ATTR_ID(13), + TRANSCEIVER_PRESENT_ATTR_ID(14), + TRANSCEIVER_PRESENT_ATTR_ID(15), + TRANSCEIVER_PRESENT_ATTR_ID(16), + TRANSCEIVER_PRESENT_ATTR_ID(17), + TRANSCEIVER_PRESENT_ATTR_ID(18), + TRANSCEIVER_PRESENT_ATTR_ID(19), + TRANSCEIVER_PRESENT_ATTR_ID(20), + TRANSCEIVER_PRESENT_ATTR_ID(21), + TRANSCEIVER_PRESENT_ATTR_ID(22), + TRANSCEIVER_PRESENT_ATTR_ID(23), + TRANSCEIVER_PRESENT_ATTR_ID(24), + TRANSCEIVER_PRESENT_ATTR_ID(25), + TRANSCEIVER_PRESENT_ATTR_ID(26), + TRANSCEIVER_PRESENT_ATTR_ID(27), + TRANSCEIVER_PRESENT_ATTR_ID(28), + TRANSCEIVER_PRESENT_ATTR_ID(29), + TRANSCEIVER_PRESENT_ATTR_ID(30), + TRANSCEIVER_PRESENT_ATTR_ID(31), + TRANSCEIVER_PRESENT_ATTR_ID(32), + TRANSCEIVER_PRESENT_ATTR_ID(33), + TRANSCEIVER_PRESENT_ATTR_ID(34), + TRANSCEIVER_PRESENT_ATTR_ID(35), + TRANSCEIVER_PRESENT_ATTR_ID(36), + TRANSCEIVER_PRESENT_ATTR_ID(37), + TRANSCEIVER_PRESENT_ATTR_ID(38), + TRANSCEIVER_PRESENT_ATTR_ID(39), + TRANSCEIVER_PRESENT_ATTR_ID(40), + TRANSCEIVER_PRESENT_ATTR_ID(41), + TRANSCEIVER_PRESENT_ATTR_ID(42), + TRANSCEIVER_PRESENT_ATTR_ID(43), + TRANSCEIVER_PRESENT_ATTR_ID(44), + TRANSCEIVER_PRESENT_ATTR_ID(45), + TRANSCEIVER_PRESENT_ATTR_ID(46), + TRANSCEIVER_PRESENT_ATTR_ID(47), + TRANSCEIVER_PRESENT_ATTR_ID(48), + TRANSCEIVER_PRESENT_ATTR_ID(49), + TRANSCEIVER_PRESENT_ATTR_ID(50), + TRANSCEIVER_PRESENT_ATTR_ID(51), + TRANSCEIVER_PRESENT_ATTR_ID(52), + TRANSCEIVER_PRESENT_ATTR_ID(53), + TRANSCEIVER_PRESENT_ATTR_ID(54), + TRANSCEIVER_PRESENT_ATTR_ID(55), + TRANSCEIVER_PRESENT_ATTR_ID(56), + TRANSCEIVER_PRESENT_ATTR_ID(57), + TRANSCEIVER_PRESENT_ATTR_ID(58), + TRANSCEIVER_TXDISABLE_ATTR_ID(1), + TRANSCEIVER_TXDISABLE_ATTR_ID(2), + TRANSCEIVER_TXDISABLE_ATTR_ID(3), + TRANSCEIVER_TXDISABLE_ATTR_ID(4), + TRANSCEIVER_TXDISABLE_ATTR_ID(5), + TRANSCEIVER_TXDISABLE_ATTR_ID(6), + TRANSCEIVER_TXDISABLE_ATTR_ID(7), + TRANSCEIVER_TXDISABLE_ATTR_ID(8), + TRANSCEIVER_TXDISABLE_ATTR_ID(9), + TRANSCEIVER_TXDISABLE_ATTR_ID(10), + TRANSCEIVER_TXDISABLE_ATTR_ID(11), + TRANSCEIVER_TXDISABLE_ATTR_ID(12), + TRANSCEIVER_TXDISABLE_ATTR_ID(13), + TRANSCEIVER_TXDISABLE_ATTR_ID(14), + TRANSCEIVER_TXDISABLE_ATTR_ID(15), + TRANSCEIVER_TXDISABLE_ATTR_ID(16), + TRANSCEIVER_TXDISABLE_ATTR_ID(17), + TRANSCEIVER_TXDISABLE_ATTR_ID(18), + TRANSCEIVER_TXDISABLE_ATTR_ID(19), + TRANSCEIVER_TXDISABLE_ATTR_ID(20), + TRANSCEIVER_TXDISABLE_ATTR_ID(21), + TRANSCEIVER_TXDISABLE_ATTR_ID(22), + TRANSCEIVER_TXDISABLE_ATTR_ID(23), + TRANSCEIVER_TXDISABLE_ATTR_ID(24), + TRANSCEIVER_TXDISABLE_ATTR_ID(25), + TRANSCEIVER_TXDISABLE_ATTR_ID(26), + TRANSCEIVER_TXDISABLE_ATTR_ID(27), + TRANSCEIVER_TXDISABLE_ATTR_ID(28), + TRANSCEIVER_TXDISABLE_ATTR_ID(29), + TRANSCEIVER_TXDISABLE_ATTR_ID(30), + TRANSCEIVER_TXDISABLE_ATTR_ID(31), + TRANSCEIVER_TXDISABLE_ATTR_ID(32), + TRANSCEIVER_TXDISABLE_ATTR_ID(33), + TRANSCEIVER_TXDISABLE_ATTR_ID(34), + TRANSCEIVER_TXDISABLE_ATTR_ID(35), + TRANSCEIVER_TXDISABLE_ATTR_ID(36), + TRANSCEIVER_TXDISABLE_ATTR_ID(37), + TRANSCEIVER_TXDISABLE_ATTR_ID(38), + TRANSCEIVER_TXDISABLE_ATTR_ID(39), + TRANSCEIVER_TXDISABLE_ATTR_ID(40), + TRANSCEIVER_TXDISABLE_ATTR_ID(41), + TRANSCEIVER_TXDISABLE_ATTR_ID(42), + TRANSCEIVER_TXDISABLE_ATTR_ID(43), + TRANSCEIVER_TXDISABLE_ATTR_ID(44), + TRANSCEIVER_TXDISABLE_ATTR_ID(45), + TRANSCEIVER_TXDISABLE_ATTR_ID(46), + TRANSCEIVER_TXDISABLE_ATTR_ID(47), + TRANSCEIVER_TXDISABLE_ATTR_ID(48), + TRANSCEIVER_TXDISABLE_ATTR_ID(57), + TRANSCEIVER_TXDISABLE_ATTR_ID(58), + TRANSCEIVER_RXLOS_ATTR_ID(1), + TRANSCEIVER_RXLOS_ATTR_ID(2), + TRANSCEIVER_RXLOS_ATTR_ID(3), + TRANSCEIVER_RXLOS_ATTR_ID(4), + TRANSCEIVER_RXLOS_ATTR_ID(5), + TRANSCEIVER_RXLOS_ATTR_ID(6), + TRANSCEIVER_RXLOS_ATTR_ID(7), + TRANSCEIVER_RXLOS_ATTR_ID(8), + TRANSCEIVER_RXLOS_ATTR_ID(9), + TRANSCEIVER_RXLOS_ATTR_ID(10), + TRANSCEIVER_RXLOS_ATTR_ID(11), + TRANSCEIVER_RXLOS_ATTR_ID(12), + TRANSCEIVER_RXLOS_ATTR_ID(13), + TRANSCEIVER_RXLOS_ATTR_ID(14), + TRANSCEIVER_RXLOS_ATTR_ID(15), + TRANSCEIVER_RXLOS_ATTR_ID(16), + TRANSCEIVER_RXLOS_ATTR_ID(17), + TRANSCEIVER_RXLOS_ATTR_ID(18), + TRANSCEIVER_RXLOS_ATTR_ID(19), + TRANSCEIVER_RXLOS_ATTR_ID(20), + TRANSCEIVER_RXLOS_ATTR_ID(21), + TRANSCEIVER_RXLOS_ATTR_ID(22), + TRANSCEIVER_RXLOS_ATTR_ID(23), + TRANSCEIVER_RXLOS_ATTR_ID(24), + TRANSCEIVER_RXLOS_ATTR_ID(25), + TRANSCEIVER_RXLOS_ATTR_ID(26), + TRANSCEIVER_RXLOS_ATTR_ID(27), + TRANSCEIVER_RXLOS_ATTR_ID(28), + TRANSCEIVER_RXLOS_ATTR_ID(29), + TRANSCEIVER_RXLOS_ATTR_ID(30), + TRANSCEIVER_RXLOS_ATTR_ID(31), + TRANSCEIVER_RXLOS_ATTR_ID(32), + TRANSCEIVER_RXLOS_ATTR_ID(33), + TRANSCEIVER_RXLOS_ATTR_ID(34), + TRANSCEIVER_RXLOS_ATTR_ID(35), + TRANSCEIVER_RXLOS_ATTR_ID(36), + TRANSCEIVER_RXLOS_ATTR_ID(37), + TRANSCEIVER_RXLOS_ATTR_ID(38), + TRANSCEIVER_RXLOS_ATTR_ID(39), + TRANSCEIVER_RXLOS_ATTR_ID(40), + TRANSCEIVER_RXLOS_ATTR_ID(41), + TRANSCEIVER_RXLOS_ATTR_ID(42), + TRANSCEIVER_RXLOS_ATTR_ID(43), + TRANSCEIVER_RXLOS_ATTR_ID(44), + TRANSCEIVER_RXLOS_ATTR_ID(45), + TRANSCEIVER_RXLOS_ATTR_ID(46), + TRANSCEIVER_RXLOS_ATTR_ID(47), + TRANSCEIVER_RXLOS_ATTR_ID(48), + TRANSCEIVER_RXLOS_ATTR_ID(57), + TRANSCEIVER_RXLOS_ATTR_ID(58), + TRANSCEIVER_TXFAULT_ATTR_ID(1), + TRANSCEIVER_TXFAULT_ATTR_ID(2), + TRANSCEIVER_TXFAULT_ATTR_ID(3), + TRANSCEIVER_TXFAULT_ATTR_ID(4), + TRANSCEIVER_TXFAULT_ATTR_ID(5), + TRANSCEIVER_TXFAULT_ATTR_ID(6), + TRANSCEIVER_TXFAULT_ATTR_ID(7), + TRANSCEIVER_TXFAULT_ATTR_ID(8), + TRANSCEIVER_TXFAULT_ATTR_ID(9), + TRANSCEIVER_TXFAULT_ATTR_ID(10), + TRANSCEIVER_TXFAULT_ATTR_ID(11), + TRANSCEIVER_TXFAULT_ATTR_ID(12), + TRANSCEIVER_TXFAULT_ATTR_ID(13), + TRANSCEIVER_TXFAULT_ATTR_ID(14), + TRANSCEIVER_TXFAULT_ATTR_ID(15), + TRANSCEIVER_TXFAULT_ATTR_ID(16), + TRANSCEIVER_TXFAULT_ATTR_ID(17), + TRANSCEIVER_TXFAULT_ATTR_ID(18), + TRANSCEIVER_TXFAULT_ATTR_ID(19), + TRANSCEIVER_TXFAULT_ATTR_ID(20), + TRANSCEIVER_TXFAULT_ATTR_ID(21), + TRANSCEIVER_TXFAULT_ATTR_ID(22), + TRANSCEIVER_TXFAULT_ATTR_ID(23), + TRANSCEIVER_TXFAULT_ATTR_ID(24), + TRANSCEIVER_TXFAULT_ATTR_ID(25), + TRANSCEIVER_TXFAULT_ATTR_ID(26), + TRANSCEIVER_TXFAULT_ATTR_ID(27), + TRANSCEIVER_TXFAULT_ATTR_ID(28), + TRANSCEIVER_TXFAULT_ATTR_ID(29), + TRANSCEIVER_TXFAULT_ATTR_ID(30), + TRANSCEIVER_TXFAULT_ATTR_ID(31), + TRANSCEIVER_TXFAULT_ATTR_ID(32), + TRANSCEIVER_TXFAULT_ATTR_ID(33), + TRANSCEIVER_TXFAULT_ATTR_ID(34), + TRANSCEIVER_TXFAULT_ATTR_ID(35), + TRANSCEIVER_TXFAULT_ATTR_ID(36), + TRANSCEIVER_TXFAULT_ATTR_ID(37), + TRANSCEIVER_TXFAULT_ATTR_ID(38), + TRANSCEIVER_TXFAULT_ATTR_ID(39), + TRANSCEIVER_TXFAULT_ATTR_ID(40), + TRANSCEIVER_TXFAULT_ATTR_ID(41), + TRANSCEIVER_TXFAULT_ATTR_ID(42), + TRANSCEIVER_TXFAULT_ATTR_ID(43), + TRANSCEIVER_TXFAULT_ATTR_ID(44), + TRANSCEIVER_TXFAULT_ATTR_ID(45), + TRANSCEIVER_TXFAULT_ATTR_ID(46), + TRANSCEIVER_TXFAULT_ATTR_ID(47), + TRANSCEIVER_TXFAULT_ATTR_ID(48), + TRANSCEIVER_TXFAULT_ATTR_ID(57), + TRANSCEIVER_TXFAULT_ATTR_ID(58), + TRANSCEIVER_RESET_ATTR_ID(49), + TRANSCEIVER_RESET_ATTR_ID(50), + TRANSCEIVER_RESET_ATTR_ID(51), + TRANSCEIVER_RESET_ATTR_ID(52), + TRANSCEIVER_RESET_ATTR_ID(53), + TRANSCEIVER_RESET_ATTR_ID(54), + TRANSCEIVER_RESET_ATTR_ID(55), + TRANSCEIVER_RESET_ATTR_ID(56), +}; + +/* sysfs attributes for hwmon + */ +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_rxlos_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t set_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +static int as7326_56x_cpld_read_internal(struct i2c_client *client, u8 reg); +static int as7326_56x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value); + +/* transceiver attributes */ +#define DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_status, NULL, MODULE_PRESENT_##index) +#define DECLARE_TRANSCEIVER_PRESENT_ATTR(index) &sensor_dev_attr_module_present_##index.dev_attr.attr + +#define DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_reset_##index, S_IRUGO | S_IWUSR, show_status, set_reset, MODULE_RESET_##index) +#define DECLARE_TRANSCEIVER_RESET_ATTR(index) &sensor_dev_attr_module_reset_##index.dev_attr.attr + +#define DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_tx_disable_##index, S_IRUGO | S_IWUSR, show_status, set_tx_disable, MODULE_TXDISABLE_##index); \ + static SENSOR_DEVICE_ATTR(module_rx_los_##index, S_IRUGO, show_status, NULL, MODULE_RXLOS_##index); \ + static SENSOR_DEVICE_ATTR(module_tx_fault_##index, S_IRUGO, show_status, NULL, MODULE_TXFAULT_##index) +#define DECLARE_SFP_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_tx_disable_##index.dev_attr.attr, \ + &sensor_dev_attr_module_rx_los_##index.dev_attr.attr, \ + &sensor_dev_attr_module_tx_fault_##index.dev_attr.attr + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS); +/* transceiver attributes */ +static SENSOR_DEVICE_ATTR(module_present_all, S_IRUGO, show_present_all, NULL, MODULE_PRESENT_ALL); +static SENSOR_DEVICE_ATTR(module_rx_los_all, S_IRUGO, show_rxlos_all, NULL, MODULE_RXLOS_ALL); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(1); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(2); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(3); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(4); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(5); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(6); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(7); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(8); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(9); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(10); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(11); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(12); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(13); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(14); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(15); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(16); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(17); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(18); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(19); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(20); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(21); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(22); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(23); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(24); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(25); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(26); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(27); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(28); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(29); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(30); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(31); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(32); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(33); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(34); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(35); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(36); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(37); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(38); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(39); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(40); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(41); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(42); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(43); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(44); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(45); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(46); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(47); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(48); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(49); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(50); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(51); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(52); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(53); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(54); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(55); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(56); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(57); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(58); + +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(1); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(2); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(3); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(4); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(5); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(6); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(7); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(8); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(9); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(10); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(11); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(12); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(13); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(14); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(15); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(16); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(17); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(18); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(19); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(20); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(21); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(22); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(23); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(24); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(25); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(26); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(27); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(28); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(29); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(30); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(31); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(32); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(33); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(34); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(35); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(36); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(37); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(38); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(39); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(40); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(41); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(42); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(43); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(44); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(45); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(46); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(47); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(48); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(57); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(58); + +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(49); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(50); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(51); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(52); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(53); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(54); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(55); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(56); + +static struct attribute *as7326_56x_cpld3_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + NULL +}; + +static const struct attribute_group as7326_56x_cpld3_group = { + .attrs = as7326_56x_cpld3_attributes, +}; + +static struct attribute *as7326_56x_cpld2_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + &sensor_dev_attr_module_rx_los_all.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(1), + DECLARE_TRANSCEIVER_PRESENT_ATTR(2), + DECLARE_TRANSCEIVER_PRESENT_ATTR(3), + DECLARE_TRANSCEIVER_PRESENT_ATTR(4), + DECLARE_TRANSCEIVER_PRESENT_ATTR(5), + DECLARE_TRANSCEIVER_PRESENT_ATTR(6), + DECLARE_TRANSCEIVER_PRESENT_ATTR(7), + DECLARE_TRANSCEIVER_PRESENT_ATTR(8), + DECLARE_TRANSCEIVER_PRESENT_ATTR(9), + DECLARE_TRANSCEIVER_PRESENT_ATTR(10), + DECLARE_TRANSCEIVER_PRESENT_ATTR(11), + DECLARE_TRANSCEIVER_PRESENT_ATTR(12), + DECLARE_TRANSCEIVER_PRESENT_ATTR(13), + DECLARE_TRANSCEIVER_PRESENT_ATTR(14), + DECLARE_TRANSCEIVER_PRESENT_ATTR(15), + DECLARE_TRANSCEIVER_PRESENT_ATTR(16), + DECLARE_TRANSCEIVER_PRESENT_ATTR(17), + DECLARE_TRANSCEIVER_PRESENT_ATTR(18), + DECLARE_TRANSCEIVER_PRESENT_ATTR(19), + DECLARE_TRANSCEIVER_PRESENT_ATTR(20), + DECLARE_TRANSCEIVER_PRESENT_ATTR(21), + DECLARE_TRANSCEIVER_PRESENT_ATTR(22), + DECLARE_TRANSCEIVER_PRESENT_ATTR(23), + DECLARE_TRANSCEIVER_PRESENT_ATTR(24), + DECLARE_TRANSCEIVER_PRESENT_ATTR(25), + DECLARE_TRANSCEIVER_PRESENT_ATTR(26), + DECLARE_TRANSCEIVER_PRESENT_ATTR(27), + DECLARE_TRANSCEIVER_PRESENT_ATTR(28), + DECLARE_TRANSCEIVER_PRESENT_ATTR(29), + DECLARE_TRANSCEIVER_PRESENT_ATTR(30), + DECLARE_SFP_TRANSCEIVER_ATTR(1), + DECLARE_SFP_TRANSCEIVER_ATTR(2), + DECLARE_SFP_TRANSCEIVER_ATTR(3), + DECLARE_SFP_TRANSCEIVER_ATTR(4), + DECLARE_SFP_TRANSCEIVER_ATTR(5), + DECLARE_SFP_TRANSCEIVER_ATTR(6), + DECLARE_SFP_TRANSCEIVER_ATTR(7), + DECLARE_SFP_TRANSCEIVER_ATTR(8), + DECLARE_SFP_TRANSCEIVER_ATTR(9), + DECLARE_SFP_TRANSCEIVER_ATTR(10), + DECLARE_SFP_TRANSCEIVER_ATTR(11), + DECLARE_SFP_TRANSCEIVER_ATTR(12), + DECLARE_SFP_TRANSCEIVER_ATTR(13), + DECLARE_SFP_TRANSCEIVER_ATTR(14), + DECLARE_SFP_TRANSCEIVER_ATTR(15), + DECLARE_SFP_TRANSCEIVER_ATTR(16), + DECLARE_SFP_TRANSCEIVER_ATTR(17), + DECLARE_SFP_TRANSCEIVER_ATTR(18), + DECLARE_SFP_TRANSCEIVER_ATTR(19), + DECLARE_SFP_TRANSCEIVER_ATTR(20), + DECLARE_SFP_TRANSCEIVER_ATTR(21), + DECLARE_SFP_TRANSCEIVER_ATTR(22), + DECLARE_SFP_TRANSCEIVER_ATTR(23), + DECLARE_SFP_TRANSCEIVER_ATTR(24), + DECLARE_SFP_TRANSCEIVER_ATTR(25), + DECLARE_SFP_TRANSCEIVER_ATTR(26), + DECLARE_SFP_TRANSCEIVER_ATTR(27), + DECLARE_SFP_TRANSCEIVER_ATTR(28), + DECLARE_SFP_TRANSCEIVER_ATTR(29), + DECLARE_SFP_TRANSCEIVER_ATTR(30), + NULL +}; + +static const struct attribute_group as7326_56x_cpld2_group = { + .attrs = as7326_56x_cpld2_attributes, +}; + +static struct attribute *as7326_56x_cpld1_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + &sensor_dev_attr_module_rx_los_all.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(31), + DECLARE_TRANSCEIVER_PRESENT_ATTR(32), + DECLARE_TRANSCEIVER_PRESENT_ATTR(33), + DECLARE_TRANSCEIVER_PRESENT_ATTR(34), + DECLARE_TRANSCEIVER_PRESENT_ATTR(35), + DECLARE_TRANSCEIVER_PRESENT_ATTR(36), + DECLARE_TRANSCEIVER_PRESENT_ATTR(37), + DECLARE_TRANSCEIVER_PRESENT_ATTR(38), + DECLARE_TRANSCEIVER_PRESENT_ATTR(39), + DECLARE_TRANSCEIVER_PRESENT_ATTR(40), + DECLARE_TRANSCEIVER_PRESENT_ATTR(41), + DECLARE_TRANSCEIVER_PRESENT_ATTR(42), + DECLARE_TRANSCEIVER_PRESENT_ATTR(43), + DECLARE_TRANSCEIVER_PRESENT_ATTR(44), + DECLARE_TRANSCEIVER_PRESENT_ATTR(45), + DECLARE_TRANSCEIVER_PRESENT_ATTR(46), + DECLARE_TRANSCEIVER_PRESENT_ATTR(47), + DECLARE_TRANSCEIVER_PRESENT_ATTR(48), + DECLARE_TRANSCEIVER_PRESENT_ATTR(49), + DECLARE_TRANSCEIVER_PRESENT_ATTR(50), + DECLARE_TRANSCEIVER_PRESENT_ATTR(51), + DECLARE_TRANSCEIVER_PRESENT_ATTR(52), + DECLARE_TRANSCEIVER_PRESENT_ATTR(53), + DECLARE_TRANSCEIVER_PRESENT_ATTR(54), + DECLARE_TRANSCEIVER_PRESENT_ATTR(55), + DECLARE_TRANSCEIVER_PRESENT_ATTR(56), + DECLARE_TRANSCEIVER_PRESENT_ATTR(57), + DECLARE_TRANSCEIVER_PRESENT_ATTR(58), + DECLARE_SFP_TRANSCEIVER_ATTR(31), + DECLARE_SFP_TRANSCEIVER_ATTR(32), + DECLARE_SFP_TRANSCEIVER_ATTR(33), + DECLARE_SFP_TRANSCEIVER_ATTR(34), + DECLARE_SFP_TRANSCEIVER_ATTR(35), + DECLARE_SFP_TRANSCEIVER_ATTR(36), + DECLARE_SFP_TRANSCEIVER_ATTR(37), + DECLARE_SFP_TRANSCEIVER_ATTR(38), + DECLARE_SFP_TRANSCEIVER_ATTR(39), + DECLARE_SFP_TRANSCEIVER_ATTR(40), + DECLARE_SFP_TRANSCEIVER_ATTR(41), + DECLARE_SFP_TRANSCEIVER_ATTR(42), + DECLARE_SFP_TRANSCEIVER_ATTR(43), + DECLARE_SFP_TRANSCEIVER_ATTR(44), + DECLARE_SFP_TRANSCEIVER_ATTR(45), + DECLARE_SFP_TRANSCEIVER_ATTR(46), + DECLARE_SFP_TRANSCEIVER_ATTR(47), + DECLARE_SFP_TRANSCEIVER_ATTR(48), + DECLARE_SFP_TRANSCEIVER_ATTR(57), + DECLARE_SFP_TRANSCEIVER_ATTR(58), + DECLARE_TRANSCEIVER_RESET_ATTR(49), + DECLARE_TRANSCEIVER_RESET_ATTR(50), + DECLARE_TRANSCEIVER_RESET_ATTR(51), + DECLARE_TRANSCEIVER_RESET_ATTR(52), + DECLARE_TRANSCEIVER_RESET_ATTR(53), + DECLARE_TRANSCEIVER_RESET_ATTR(54), + DECLARE_TRANSCEIVER_RESET_ATTR(55), + DECLARE_TRANSCEIVER_RESET_ATTR(56), + NULL +}; + +static const struct attribute_group as7326_56x_cpld1_group = { + .attrs = as7326_56x_cpld1_attributes, +}; + +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u32 values; + u8 *value = (u8*)&values; + u8 regs_h1[] = {0x0f, 0x10, 0x11, 0x12}; + u8 regs_h2[] = {0x10, 0x11, 0x12, 0x13}; + u8 *regs_p; + struct i2c_client *client = to_i2c_client(dev); + struct as7326_56x_cpld_data *data = i2c_get_clientdata(client); + + if (data->type == as7326_56x_cpld2) { + regs_p = regs_h1; + } else { + regs_p = regs_h2; + } + mutex_lock(&data->update_lock); + for (i = 0; i < sizeof(values); i++) { + status = as7326_56x_cpld_read_internal(client, regs_p[i]); + + if (status < 0) { + goto exit; + } + + value[i] = ~(u8)status; + } + + mutex_unlock(&data->update_lock); + + values = cpu_to_le32(values); + /* For port 1 ~ 30 in order */ + if (data->type == as7326_56x_cpld2) { + values &= 0x3FFFFFFF; + } else { /* Port 31 ~ 56 */ + u8 tmp1 = (values >> 18) & 0x3; + u8 tmp2 = (values >> 24) ; + + values &= 0x3ffff; + values |= (tmp2 << 18); + values |= (tmp1 << 26); + } + + return sprintf(buf, "%x\n", values); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_rxlos_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u8 values[3] = {0}; + u8 regs[] = {0x12, 0x13, 0x14}; + struct i2c_client *client = to_i2c_client(dev); + struct as7326_56x_cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = as7326_56x_cpld_read_internal(client, regs[i]); + + if (status < 0) { + goto exit; + } + + values[i] = (u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values 1 -> 24 in order */ + return sprintf(buf, "%.2x %.2x %.2x\n", values[0], values[1], values[2]); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7326_56x_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0, revert = 0; + + switch (attr->index) { + case MODULE_PRESENT_1 ... MODULE_PRESENT_30: + reg = 0x0f + (attr->index-MODULE_PRESENT_1)/8; + mask = 0x1 << ((attr->index - MODULE_PRESENT_1)%8); + break; + case MODULE_PRESENT_31 ... MODULE_PRESENT_48: + reg = 0x10 + (attr->index-MODULE_PRESENT_31)/8; + mask = 0x1 << ((attr->index - MODULE_PRESENT_31)%8); + break; + case MODULE_PRESENT_57 ... MODULE_PRESENT_58: + reg = 0x12; + mask = 0x1 << (( MODULE_PRESENT_58 - attr->index)+2); + break; + case MODULE_PRESENT_49 ... MODULE_PRESENT_56: /*QSFP*/ + reg = 0x13 ; + mask = 0x1 << ((attr->index - MODULE_PRESENT_49)%8); + break; + case MODULE_TXFAULT_1 ... MODULE_TXFAULT_30: + reg = 0x03 + (attr->index - MODULE_TXFAULT_1)/8; + mask = 0x1 << ((attr->index - MODULE_TXFAULT_1)%8); + break; + case MODULE_TXFAULT_31 ... MODULE_TXFAULT_48: + reg = 0x1a + (attr->index-MODULE_TXFAULT_31)/8; + mask = 0x1 << ((attr->index - MODULE_TXFAULT_31)%8); + break; + case MODULE_TXFAULT_57 ... MODULE_TXFAULT_58: + reg = 0x1c; + mask = 0x1 << (( attr->index - MODULE_TXFAULT_57)+2); + break; + case MODULE_TXDISABLE_1 ... MODULE_TXDISABLE_30: + reg = 0x07 + (attr->index - MODULE_TXDISABLE_1)/8; + mask = 0x1 << ((attr->index - MODULE_TXDISABLE_1)%8); + break; + case MODULE_TXDISABLE_31 ... MODULE_TXDISABLE_48: + reg = 0x14 + (attr->index-MODULE_TXDISABLE_31)/8; + mask = 0x1 << ((attr->index - MODULE_TXDISABLE_31)%8); + break; + case MODULE_TXDISABLE_57 ... MODULE_TXDISABLE_58: + reg = 0x16; + mask = 0x1 << ((attr->index - MODULE_TXDISABLE_57)+2); + break; + case MODULE_RXLOS_1 ... MODULE_RXLOS_30: + reg = 0x0b + (attr->index - MODULE_RXLOS_1)/8; + mask = 0x1 << ((attr->index - MODULE_RXLOS_1)%8); + break; + case MODULE_RXLOS_31 ... MODULE_RXLOS_48: + reg = 0x17 + (attr->index-MODULE_RXLOS_31)/8; + mask = 0x1 << ((attr->index - MODULE_RXLOS_31)%8); + break; + case MODULE_RXLOS_57 ... MODULE_RXLOS_58: + reg = 0x19; + mask = 0x1 << (( attr->index - MODULE_RXLOS_57)+2); + break; + case MODULE_RESET_49 ... MODULE_RESET_56: + reg = 0x4; + mask = 0x1 << (attr->index - MODULE_RESET_49); + revert = 1; + break; + default: + return 0; + } + + if (attr->index >= MODULE_PRESENT_1 && attr->index <= MODULE_PRESENT_56) { + revert = 1; + } + + mutex_lock(&data->update_lock); + status = as7326_56x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", revert ? !(status & mask) : !!(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7326_56x_cpld_data *data = i2c_get_clientdata(client); + long disable; + int status; + u8 reg = 0, mask = 0; + + status = kstrtol(buf, 10, &disable); + if (status) { + return status; + } + + switch (attr->index) { + case MODULE_TXDISABLE_1 ... MODULE_TXDISABLE_30: + reg = 0x07 + (attr->index - MODULE_TXDISABLE_1)/8; + mask = 0x1 << ((attr->index - MODULE_TXDISABLE_1)%8); + break; + case MODULE_TXDISABLE_31 ... MODULE_TXDISABLE_48: + reg = 0x14 + (attr->index - MODULE_TXDISABLE_31)/8; + mask = 0x1 << ((attr->index - MODULE_TXDISABLE_31)%8); + break; + case MODULE_TXDISABLE_57 ... MODULE_TXDISABLE_58: + reg = 0x16; + mask = 0x1 << ((attr->index - MODULE_TXDISABLE_57)+2); + break; + default: + return 0; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as7326_56x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update tx_disable status */ + if (disable) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as7326_56x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7326_56x_cpld_data *data = i2c_get_clientdata(client); + long reset; + int status; + u8 reg = 0, mask = 0; + + status = kstrtol(buf, 10, &reset); + if (status) { + return status; + } + + switch (attr->index) + { + case MODULE_RESET_49 ... MODULE_RESET_56: + reg = 0x4; + mask = 0x1 << (attr->index - MODULE_RESET_49); + break; + default: + return 0; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as7326_56x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update reset status */ + if (!reset) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as7326_56x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct as7326_56x_cpld_data *data = i2c_get_clientdata(client); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = as7326_56x_cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static void as7326_56x_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as7326_56x_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, 0x1); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d", val); +} + +/* + * I2C init/probing/exit functions + */ +static int as7326_56x_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + struct as7326_56x_cpld_data *data; + int ret = -ENODEV; + const struct attribute_group *group = NULL; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + goto exit; + + data = kzalloc(sizeof(struct as7326_56x_cpld_data), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->type = id->driver_data; + + /* Register sysfs hooks */ + switch (data->type) { + case as7326_56x_cpld1: + group = &as7326_56x_cpld1_group; + break; + case as7326_56x_cpld2: + group = &as7326_56x_cpld2_group; + break; + case as7326_56x_cpld3: + group = &as7326_56x_cpld3_group; + break; + default: + break; + } + + if (group) { + ret = sysfs_create_group(&client->dev.kobj, group); + if (ret) { + goto exit_free; + } + } + + as7326_56x_cpld_add_client(client); + return 0; + +exit_free: + kfree(data); +exit: + return ret; +} + +static int as7326_56x_cpld_remove(struct i2c_client *client) +{ + struct as7326_56x_cpld_data *data = i2c_get_clientdata(client); + const struct attribute_group *group = NULL; + + as7326_56x_cpld_remove_client(client); + + /* Remove sysfs hooks */ + switch (data->type) { + case as7326_56x_cpld1: + group = &as7326_56x_cpld1_group; + break; + case as7326_56x_cpld2: + group = &as7326_56x_cpld2_group; + break; + case as7326_56x_cpld3: + group = &as7326_56x_cpld3_group; + break; + default: + break; + } + + if (group) { + sysfs_remove_group(&client->dev.kobj, group); + } + + kfree(data); + + return 0; +} + +static int as7326_56x_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int as7326_56x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +int as7326_56x_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as7326_56x_cpld_read_internal(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as7326_56x_cpld_read); + +int as7326_56x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as7326_56x_cpld_write_internal(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as7326_56x_cpld_write); + +static struct i2c_driver as7326_56x_cpld_driver = { + .driver = { + .name = "as7326_56x_cpld", + .owner = THIS_MODULE, + }, + .probe = as7326_56x_cpld_probe, + .remove = as7326_56x_cpld_remove, + .id_table = as7326_56x_cpld_id, +}; + +static int __init as7326_56x_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as7326_56x_cpld_driver); +} + +static void __exit as7326_56x_cpld_exit(void) +{ + i2c_del_driver(&as7326_56x_cpld_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("Accton I2C CPLD driver"); +MODULE_LICENSE("GPL"); + +module_init(as7326_56x_cpld_init); +module_exit(as7326_56x_cpld_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/ym2651y.c new file mode 120000 index 00000000000..f4d67640ccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/ym2651y.c @@ -0,0 +1 @@ +../../common/modules/ym2651y.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-handle_mac.service b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-handle_mac.service new file mode 100755 index 00000000000..3d03ec4f154 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-handle_mac.service @@ -0,0 +1,15 @@ +[Unit] +Description=Accton AS7326-56X Platform MAC handle service +Before=opennsl-modules.service +After=local-fs.target + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/idt_init.sh +RemainAfterExit=yes + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=opennsl-modules.service diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-monitor-fan.service b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-monitor-fan.service new file mode 100755 index 00000000000..e714561bdf8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-monitor-fan.service @@ -0,0 +1,16 @@ +[Unit] +Description=Accton AS7326-56X Platform Monitoring FAN service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/accton_as7326_monitor_fan.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-monitor-psu.service b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-monitor-psu.service new file mode 100755 index 00000000000..77fa1fd5c14 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-monitor-psu.service @@ -0,0 +1,16 @@ +[Unit] +Description=Accton AS7326-56X Platform Monitoring PSU service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/accton_as7326_monitor_psu.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-monitor.service new file mode 100755 index 00000000000..9da83704715 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-monitor.service @@ -0,0 +1,17 @@ +[Unit] +Description=Accton AS7326-56X Platform Monitoring service +Before=pmon.service +After=as7326-platform-handle_mac.service +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/accton_as7326_util.py install +ExecStart=/usr/local/bin/accton_as7326_monitor.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/setup.py new file mode 100755 index 00000000000..77114c71285 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env pytho + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as7326_56x', + version='1.0', + description='Module to initialize Accton AS7326-56X platforms', + + packages=['as7326_56x'], + package_dir={'as7326_56x': 'as7326-56x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/README b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/README new file mode 100755 index 00000000000..ef0d03cf5e4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/README @@ -0,0 +1,74 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +Contents of this package: + module - Contains source code of as7326 kernel driver modules. + util - operational scripts. + +Sonic creates a docker container and run building process under it. +If user tries to built new drivers, please get into that docker and +dpkg-buildpackage for them. + +All Linux kernel code is licensed under the GPLv1. All other code is +licensed under the GPLv3. Please see the LICENSE file for copies of +both licenses. + +The code for integacting with Accton AS7326-56X has 2 parts, +kernel drivers and operational script. +The kernel drivers of peripherals are under module/ directory. +1. These drivers can be built to individual ko during dpkg-buildpackage. +2. A operational script, accton_as7326_util.py, for device initializatian. + Run "accton_as7326_util.py install" to install drivers. + +To initialize the system, run "accton_as7326_util.py install". +To clean up the drivers & devices, run "accton_as7326_util.py clean". +To dump information of sensors, run "accton_as7326_util.py show". +To dump SFP EEPROM, run "accton_as7326_util.py sff". +To set fan speed, run "accton_as7326_util.py set fan". +To enable/disable SFP emission, run "accton_as7326_util.py set sfp". +To set system LEDs' color, run "accton_as7326_util.py set led" +For more information, run "accton_as7326_util.py --help". + +==================================================================== +Besides applying accton_as7326_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +System LED: + There are 5 system LEDs at the lower-left corner of front panel. + They are loc, diag, fan, ps1, and ps2. + The sysfs interface color mappings are as follows: + Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + But not all colors are available for each LED. + +Fan Control: + There are 10 fans inside 6 fan modules. + All fans share 1 duty setting, ranged from 0~100. + +Thermal sensers: + 3 temperature sensors are controlled by the lm75 kernel modules. + +PSUs: + There 2 power supplies slot at the left/right side of the back. + Once if a PSU is not plugged, the status of it is shown failed. + +There are 48 SFP+ and 8 QSFP modules are equipped. +Before operating on PSU and QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_monitor.py new file mode 100755 index 00000000000..b775d97edda --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_monitor.py @@ -0,0 +1,325 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 3/23/2018: Roy Lee modify for as7326_56x +# 6/26/2018: Jostar implement by new thermal policy from HW RD +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + from as7326_56x.fanutil import FanUtil + from as7326_56x.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as7326_monitor' + +global log_file +global log_level + + +#Default FAN speed: 37.5%(0x05) +#Ori is that detect: (U45_BCM56873 + Thermal sensor_LM75_CPU:0x4B) /2 +#New Detect: (sensor_LM75_49 + Thermal sensor_LM75_CPU_4B) /2 +#Thermal policy: Both F2B and B2F +#1. (sensor_LM75_49 + Thermal sensor_LM75_CPU) /2 =< 39C , Keep 37.5%(0x05) Fan speed +#2. (sensor_LM75_49 + Thermal sensor_LM75_CPU) /2 > 39C , Change Fan speed from 37.5%(0x05) to % 75%(0x0B) +#3. (sensor_LM75_49 + Thermal sensor_LM75_CPU) /2 > 45C , Change Fan speed from 75%(0x0B) to 100%(0x0F) +#4. (sensor_LM75_49 + Thermal sensor_LM75_CPU) /2 > 61C , Send alarm message +#5. (sensor_LM75_49 + Thermal sensor_LM75_CPU) /2 > 66C , Shutdown system +#6. One Fan fail , Change Fan speed to 100%(0x0F) + +#fan-dev 0-11 speed 0x05 Setup fan speed 37.50% +#fan-dev 0-11 speed 0xB Setup fan speed 75% +#fan-dev 0-11 speed 0xF Setup fan speed 100.00% + + +class switch(object): + def __init__(self, value): + self.value = value + self.fall = False + + def __iter__(self): + """Return the match method once, then stop""" + yield self.match + raise StopIteration + + def match(self, *args): + """Indicate whether or not to enter a case suite""" + if self.fall or not args: + return True + elif self.value in args: # changed for v1.5, see below + self.fall = True + return True + else: + return False + + +fan_policy_state=1 +fan_fail=0 +alarm_state = 0 #0->default or clear, 1-->alarm detect +test_temp = 0 +test_temp_list = [0, 0, 0, 0, 0, 0] + +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + # static temp var + temp = 0 + new_pwm = 0 + pwm=0 + ori_pwm = 0 + default_pwm=0x4 + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = handler = logging.handlers.SysLogHandler(address = '/dev/log') + sys_handler.setLevel(logging.WARNING) + logging.getLogger('').addHandler(sys_handler) + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def get_state_from_fan_policy(self, temp, policy): + state=0 + logging.debug('temp=%d', temp) + for i in range(0, len(policy)): + #logging.debug('policy[%d][0]=%d, policy[%d][1]=%d', i,policy[i][0],i, policy[i][1]) + if temp > policy[i][0]: + if temp <= policy[i][1]: + state =policy[i][2] + logging.debug ('temp=%d >= policy[%d][0]=%d, temp=%d < policy[%d][1]=%d' , temp, i, policy[i][0], temp, i, policy[i][1]) + logging.debug ('fan_state=%d', state) + if state==0: + state=policy[0][2] #below fan_min, set to default pwm + logging.debug('set default state') + return state + + def manage_fans(self): + + thermal_pwm_list = {} #Ori sort is lm75_48, 49, 4a, 4b, cpu, bcm + # After get pwm, do sort to get max pwm. + LEVEL_FAN_DEF=1 + LEVEL_FAN_MID=2 + LEVEL_FAN_MAX=3 + LEVEL_TEMP_HIGH=4 + LEVEL_TEMP_CRITICAL=5 + + fan_policy_state_pwm_tlb = { + LEVEL_FAN_DEF: [38, 0x4], + LEVEL_FAN_MID: [75, 0xB], + LEVEL_FAN_MAX: [100, 0xE], + LEVEL_TEMP_HIGH: [100, 0xE], + LEVEL_TEMP_CRITICAL: [100, 0xE], + } + global fan_policy_state + global fan_fail + global test_temp + global test_temp_list + global alarm_state + fan_policy ={ + 0: [0, 39000, LEVEL_FAN_DEF], #F2B_policy, B2F_plicy, PWM, reg_val + 1: [39000, 45000, LEVEL_FAN_MID], + 2: [45000, 61000, LEVEL_FAN_MAX], + 3: [61000, 66000, LEVEL_TEMP_HIGH], + 4: [66000, 200000, LEVEL_TEMP_CRITICAL], + } + + thermal = ThermalUtil() + fan = FanUtil() + fan_dir=fan.get_fan_dir(1) + if fan_dir > 1: + fan_dri=1 #something wrong, set fan_dir to default val + if fan_dir < 0: + fan_dri=1 #something wrong, set fan_dir to default val + ori_pwm=fan.get_fan_duty_cycle() + new_pwm=0 + logging.debug('fan_dir=%d, ori_pwm=%d', fan_dir, ori_pwm) + logging.debug('test_temp=%d', test_temp) + if test_temp==0: + temp1 = thermal._get_thermal_val(1) + temp2 = thermal._get_thermal_val(2) + temp3 = thermal._get_thermal_val(3) + temp4 = thermal._get_thermal_val(4) + temp5 = thermal._get_thermal_val(5) + temp6=0 + else: + temp1 = test_temp_list[0] + temp2 = test_temp_list[1] + temp3 = test_temp_list[2] + temp4 = test_temp_list[3] + temp5 = test_temp_list[4] + temp6=0 + fan_fail=0 + + if temp2==0: + temp_get=50000 # if one detect sensor is fail or zero, assign temp=50000, let fan to 75% + logging.debug('lm75_49 detect fail, so set temp_get=50000, let fan to 75%') + elif temp2==0: + temp_get=50000 # if one detect sensor is fail or zero, assign temp=50000, let fan to 75% + logging.debug('lm75_4b detect fail, so set temp_get=50000, let fan to 75%') + else: + temp_get= (temp2 + temp4)/2 # Use (sensor_LM75_49 + Thermal sensor_LM75_CPU_4B) /2 + ori_state=fan_policy_state + fan_policy_state=self.get_state_from_fan_policy(temp_get, fan_policy) + logging.debug('lm75_48=%d, lm75_49=%d, lm75_4a=%d, lm_4b=%d, cpu=%d, bcm=%d', temp1,temp2,temp3,temp4,temp5,temp6) + logging.debug('ori_state=%d, fan_policy_state=%d', ori_state, fan_policy_state) + new_pwm = fan_policy_state_pwm_tlb[fan_policy_state][0] + if fan_fail==0: + logging.debug('new_pwm=%d', new_pwm) + + if fan_fail==0: + if new_pwm!=ori_pwm: + fan.set_fan_duty_cycle(new_pwm) + logging.info('Set fan speed from %d to %d', ori_pwm, new_pwm) + + for i in range (fan.FAN_NUM_1_IDX, fan.FAN_NUM_ON_MAIN_BROAD+1): + if fan.get_fan_status(i)==0: + new_pwm=100 + logging.debug('fan_%d fail, set pwm to 100',i) + if test_temp==0: + fan_fail=1 + fan.set_fan_duty_cycle(new_pwm) + break + else: + fan_fail=0 + + new_state = fan_policy_state + + if ori_state==LEVEL_FAN_DEF: + if new_state==LEVEL_TEMP_HIGH: + if alarm_state==0: + logging.warning('Alarm for temperature high is detected') + alarm_state=1 + if new_state==LEVEL_TEMP_CRITICAL: + logging.critical('Alarm for temperature critical is detected, reboot DUT') + time.sleep(2) + os.system('reboot') + if ori_state==LEVEL_FAN_MID: + if new_state==LEVEL_TEMP_HIGH: + if alarm_state==0: + logging.warning('Alarm for temperature high is detected') + alarm_state=1 + if new_state==LEVEL_TEMP_CRITICAL: + logging.critical('Alarm for temperature critical is detected') + time.sleep(2) + os.system('reboot') + if ori_state==LEVEL_FAN_MAX: + if new_state==LEVEL_TEMP_HIGH: + if alarm_state==0: + logging.warning('Alarm for temperature high is detected') + alarm_state=1 + if new_state==LEVEL_TEMP_CRITICAL: + logging.critical('Alarm for temperature critical is detected') + time.sleep(2) + os.system('reboot') + if alarm_state==1: + if temp_get < (fan_policy[3][0] - 5000): #below 65 C, clear alarm + logging.warning('Alarm for temperature high is cleared') + alarm_state=0 + if ori_state==LEVEL_TEMP_HIGH: + if new_state==LEVEL_TEMP_CRITICAL: + logging.critical('Alarm for temperature critical is detected') + time.sleep(2) + os.system('reboot') + if new_state <= LEVEL_FAN_MID: + logging.warning('Alarm for temperature high is cleared') + alarm_state=0 + if new_state <= LEVEL_FAN_MAX: + if temp_get < (fan_policy[3][0] - 5000): #below 65 C, clear alarm + logging.warning('Alarm for temperature high is cleared') + alarm_state=0 + if ori_state==LEVEL_TEMP_CRITICAL: + if new_state <= LEVEL_FAN_MAX: + logging.warning('Alarm for temperature critical is cleared') + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + global test_temp + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdlt:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + if sys.argv[1]== '-t': + if len(sys.argv)!=8: + print "temp test, need input six temp" + return 0 + + i=0 + for x in range(2, 8): + test_temp_list[i]= int(sys.argv[x])*1000 + i=i+1 + test_temp = 1 + log_level = logging.DEBUG + print test_temp_list + + fan = FanUtil() + fan.set_fan_duty_cycle(38) + print "set default fan speed to 37.5%" + monitor = device_monitor(log_file, log_level) + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(5) + +if __name__ == '__main__': + main(sys.argv[1:]) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_monitor_fan.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_monitor_fan.py new file mode 100755 index 00000000000..6fa429d0131 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_monitor_fan.py @@ -0,0 +1,200 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 7/2/2018: Jostar create for as7326-56x +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as7326_monitor_fan' + +global log_file +global log_level + + +class switch(object): + def __init__(self, value): + self.value = value + self.fall = False + + def __iter__(self): + """Return the match method once, then stop""" + yield self.match + raise StopIteration + + def match(self, *args): + """Indicate whether or not to enter a case suite""" + if self.fall or not args: + return True + elif self.value in args: # changed for v1.5, see below + self.fall = True + return True + else: + return False + + +fan_state=[2, 2, 2, 2, 2, 2, 2] #init state=2, insert=1, remove=0 +fan_status_state=[2, 2, 2, 2, 2, 2, 2] #init state=2, fault=1, normal=0 +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + + #/sys/bus/i2c/devices/11-0066 + #fan1_present, fan6_present + + def __init__(self, log_file, log_level): + + self.fan_num = 6 + self.fan_path = "/sys/bus/i2c/devices/11-0066/" + self.present = { + 0: "fan1_present", + 1: "fan2_present", + 2: "fan3_present", + 3: "fan4_present", + 4: "fan5_present", + 5: "fan6_present", + } + + self.fault = { + 0: "fan1_fault", + 1: "fan2_fault", + 2: "fan3_fault", + 3: "fan4_fault", + 4: "fan5_fault", + 5: "fan6_fault", + } + + + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(logging.DEBUG) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + #sys_handler.setLevel(logging.WARNING) + sys_handler.setLevel(logging.INFO) + logging.getLogger('').addHandler(sys_handler) + + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_fan(self): + + FAN_STATE_REMOVE = 0 + FAN_STATE_INSERT = 1 + + FAN_STATUS_FAULT = 1 + FAN_STATUS_NORMAL = 0 + + global fan_state + global fan_status_state + + for idx in range (0, self.fan_num): + node = self.fan_path + self.present[idx] + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if fan_state[idx]!=1: + fan_state[idx]=FAN_STATE_INSERT + logging.info("FAN-%d present is detected", idx+1); + else: + if fan_state[idx]!=0: + fan_state[idx]=FAN_STATE_REMOVE + logging.warning("Alarm for FAN-%d absent is detected", idx+1) + + for idx in range (0, self.fan_num): + node = self.fan_path + self.fault[idx] + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if fan_status_state[idx]!=FAN_STATUS_FAULT: + if fan_state[idx] == FAN_STATE_INSERT: + logging.warning("Alarm for FAN-%d failed is detected", idx+1); + fan_status_state[idx]=FAN_STATUS_FAULT + else: + fan_status_state[idx]=FAN_STATUS_NORMAL + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + monitor = device_monitor(log_file, log_level) + while True: + monitor.manage_fan() + time.sleep(3) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_monitor_psu.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_monitor_psu.py new file mode 100755 index 00000000000..d76c20bd5a9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_monitor_psu.py @@ -0,0 +1,190 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 7/2/2018: Jostar create for as7326-56x +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as7326_monitor_psu' + +global log_file +global log_level + + +class switch(object): + def __init__(self, value): + self.value = value + self.fall = False + + def __iter__(self): + """Return the match method once, then stop""" + yield self.match + raise StopIteration + + def match(self, *args): + """Indicate whether or not to enter a case suite""" + if self.fall or not args: + return True + elif self.value in args: # changed for v1.5, see below + self.fall = True + return True + else: + return False + + +psu_state=[2, 2] +psu_power_status=[2, 2] +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + + def __init__(self, log_file, log_level): + + self.psu_num = 2 + self.psu_path = "/sys/bus/i2c/devices/" + self.presence = "/psu_present" + self.oper_status = "/psu_power_good" + self.mapping = { + 0: "17-0051", + 1: "13-0053", + } + + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + # set up logging to console + + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + #sys_handler.setLevel(logging.WARNING) + sys_handler.setLevel(logging.INFO) + logging.getLogger('').addHandler(sys_handler) + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_psu(self): + + PSU_STATE_REMOVE = 0 + PSU_STATE_INSERT = 1 + + PSU_STATUS_NO_POWER = 0 + PSU_STATUS_POWER_GOOD = 1 + + global psu_state + global psu_power_status + + for idx in range (0, self.psu_num): + node = self.psu_path + self.mapping[idx] + self.presence + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if psu_state[idx]!=PSU_STATE_INSERT: + psu_state[idx]=PSU_STATE_INSERT + logging.info("PSU-%d present is detected", idx+1); + #psu_power_status[idx]=PSU_STATUS_POWER_GOOD #when insert, assume power is good. If no_power, next code will find it. + else: + if psu_state[idx]!=PSU_STATE_REMOVE: + psu_state[idx]=PSU_STATE_REMOVE + logging.warning("Alarm for PSU-%d absent is detected", idx+1); + psu_power_status[idx]=PSU_STATUS_NO_POWER + + for idx in range (0, self.psu_num): + node = self.psu_path + self.mapping[idx] + self.oper_status + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + #logging.info("content=%s, psu_power_status[%d]=%d", content, idx, psu_power_status[idx]); + if content == "0": + if psu_power_status[idx]!=PSU_STATUS_NO_POWER: + if psu_state[idx]==PSU_STATE_INSERT: + logging.warning("Alarm for PSU-%d fault is detected", idx+1); + psu_power_status[idx]=PSU_STATUS_NO_POWER + else: + if psu_power_status[idx] !=PSU_STATUS_POWER_GOOD: + logging.info("PSU-%d power_good is detected", idx+1); + psu_power_status[idx]=PSU_STATUS_POWER_GOOD + + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + monitor = device_monitor(log_file, log_level) + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_psu() + time.sleep(3) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_util.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_util.py new file mode 100755 index 00000000000..0e08f0b62ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_util.py @@ -0,0 +1,606 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# +# Description: +# Due to adoption of optoe drivers, sideband signals of SFPs are moved +# into cpld drivers. Add a new dict, cpld_of_module, for mapping this +# attributes to corresponding cpld nodes. +# + + + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + + + + +PROJECT_NAME = 'as7326_56x' +version = '0.1.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan':6,'thermal':4, 'psu':2, 'sfp':58} +FORCE = 0 +#logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +#logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-56 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def dis_i2c_ir3570a(addr): + cmd = "i2cset -y 0 0x%x 0xE5 0x01" % addr + status, output = commands.getstatusoutput(cmd) + cmd = "i2cset -y 0 0x%x 0x12 0x02" % addr + status, output = commands.getstatusoutput(cmd) + return status + +def ir3570_check(): + cmd = "i2cdump -y 0 0x42 s 0x9a" + try: + status, output = commands.getstatusoutput(cmd) + lines = output.split('\n') + hn = re.findall(r'\w+', lines[-1]) + version = int(hn[1], 16) + if version == 0x24: #only for ir3570a + ret = dis_i2c_ir3570a(4) + else: + ret = 0 + except Exception as e: + print "Error on ir3570_check() e:" + str(e) + return -1 + return ret + + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-56 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ROY]"+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_check(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + return True + + + +kos = [ +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe accton_i2c_cpld' , +'modprobe ym2651y' , +'modprobe accton_as7326_56x_fan' , +'modprobe optoe' , +'modprobe accton_as7326_56x_leds' , +'modprobe accton_as7326_56x_psu' ] + +def driver_install(): + global FORCE + + status, output = log_os_system('modprobe i2c_dev', 1) + status, output = log_os_system("depmod", 1) + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + lst = rm.split(" ") + if len(lst) > 3: + del(lst[3]) + rm = " ".join(lst) + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +led_prefix ='/sys/class/leds/accton_'+PROJECT_NAME+'_led::' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2']} +hwmon_nodes = {'led': ['brightness'] } +hwmon_prefix ={'led': led_prefix} + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'fan': ['11-0066'] , + 'thermal': ['15-0048','15-0049', '15-004a', '15-004b'] , + 'psu': ['17-0051','13-0053'], + 'sfp': ['-0050']} +i2c_nodes = {'fan': ['present', 'front_speed_rpm', 'rear_speed_rpm'] , + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['module_present_', 'module_tx_disable_']} + +sfp_map = [ + 42,41,44,43,47,45,46,50, + 48,49,52,51,53,56,55,54, + 58,57,60,59,61,63,62,64, + 66,68,65,67,69,71,72,70, + 74,73,76,75,77,79,78,80, + 81,82,84,85,83,87,88,86, #port 41~48 + 25,26,27,28,29,30,31,32, #port 49~56 QSFP + 22,23] #port 57~58 SFP+ from CPU NIF. +qsfp_start = 48 +qsfp_end = 56 + +#For sideband signals of SFP/QSFP modules. +cpld_of_module = {'12-0062': list(range(0,30)), + '18-0060': list(range(30,58)) } + + +mknod =[ +'echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device' , +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-1/new_device' , +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-24/new_device' , +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-2/new_device' , +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-33/new_device', +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-34/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-35/new_device', +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-36/new_device', +'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-37/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-38/new_device', +'echo 24c04 0x56 > /sys/bus/i2c/devices/i2c-0/new_device', + +'echo as7326_56x_fan 0x66 > /sys/bus/i2c/devices/i2c-11/new_device ', +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-15/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-15/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-15/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-15/new_device', +'echo as7326_56x_psu1 0x51 > /sys/bus/i2c/devices/i2c-17/new_device', +'echo ym2651 0x59 > /sys/bus/i2c/devices/i2c-17/new_device', +'echo as7326_56x_psu2 0x53 > /sys/bus/i2c/devices/i2c-13/new_device', +'echo ym2651 0x5b > /sys/bus/i2c/devices/i2c-13/new_device', +'echo as7326_56x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-18/new_device', +'echo as7326_56x_cpld2 0x62 > /sys/bus/i2c/devices/i2c-12/new_device', +'echo as7326_56x_cpld3 0x64 > /sys/bus/i2c/devices/i2c-19/new_device'] + +mknod2 =[ +] + + + +def i2c_order_check(): + # This project has only 1 i2c bus. + return 0 + +def device_install(): + global FORCE + + order = i2c_order_check() + + # if 0x70 is not exist @i2c-1, use reversed bus order + if order: + for i in range(0,len(mknod2)): + #for pca954x need times to built new i2c buses + if mknod2[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod2[i], 1) + if status: + print output + if FORCE == 0: + return status + else: + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + for i in range(0,len(sfp_map)): + if i < qsfp_start or i >= qsfp_end: + status, output =log_os_system("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + else: + status, output =log_os_system("echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/1-0076", 0) + if status==0: + I2C_ORDER=1 + else: + I2C_ORDER=0 + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + if I2C_ORDER==0: + nodelist = mknod + else: + nodelist = mknod2 + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_check() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_check() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + + ir3570_check() + + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_check()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + for lk in cpld_of_module: + if k in cpld_of_module[lk]: + cpld_str = lk + node = key+str(k+1) + path = i2c_prefix+ lk + "/"+ nodes[j] + str(k+1) + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan'] ['fan1'][0] + node = node.replace(node.split("/")[-1], 'fan_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0070", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_handle_idt.sh b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_handle_idt.sh new file mode 100755 index 00000000000..f5de5628bc7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_handle_idt.sh @@ -0,0 +1,19 @@ +#!/bin/bash + +if [ -s /usr/local/bin/done_idt_init ];then + echo "There is a done_idt_init file" +else + + cat /etc/init.d/opennsl-modules|grep idt_init.sh + if [ $? -ne 0 ];then + echo "Add idt_init.sh to opennsl-modules for TD3 MAC" + sed -i '/modprobe linux-kernel-bde/i sleep 1' /etc/init.d/opennsl-modules + sed -i '/sleep/i /usr/local/bin/idt_init.sh' /etc/init.d/opennsl-modules + sed -i '/idt_init/i echo "IDT init" ' /etc/init.d/opennsl-modules + sed -i '/IDT init/i echo 1 > /usr/local/bin/done_idt_init' /etc/init.d/opennsl-modules + + fi + +fi + + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/idt_init.sh b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/idt_init.sh new file mode 100755 index 00000000000..7c1f1fcf3a7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/idt_init.sh @@ -0,0 +1,150 @@ +#!/bin/bash +test_log=/usr/local/bin/check_idt_status.txt +modprobe i2c-i801 +modprobe i2c-dev +i2cset -y 0 0x77 0x1 +i2cset -y 0 0x70 0x1 +i2cget -y 0 0x54 0 b > /dev/null +if [ $? -ne 0 ];then + printf "Device 8v89307(0x54) not found\n" + exit 1 +fi +echo "IDT 82V89307 " +echo "idt init 1" +# Title = --- IDT 82V89307 Registers --- +#Select to Page 0 +i2cset -y 0 0x54 0x2D 0x00 +i2cset -y 0 0x54 0x7F 0x05 +i2cset -y 0 0x54 0x7E 0x85 +i2cset -y 0 0x54 0x7B 0x00 +i2cset -y 0 0x54 0x7A 0x00 +i2cset -y 0 0x54 0x79 0x40 +i2cset -y 0 0x54 0x78 0x06 +i2cset -y 0 0x54 0x73 0x40 +i2cset -y 0 0x54 0x72 0x40 + +# OUT3:25MHz +i2cset -y 0 0x54 0x71 0x0A +i2cset -y 0 0x54 0x70 0x00 + +# OUT1:1pps +i2cset -y 0 0x54 0x6B 0x4E +i2cset -y 0 0x54 0x69 0x00 +i2cset -y 0 0x54 0x68 0x00 +i2cset -y 0 0x54 0x67 0x19 +i2cset -y 0 0x54 0x66 0xAB +i2cset -y 0 0x54 0x65 0x8C +i2cset -y 0 0x54 0x64 0x00 +i2cset -y 0 0x54 0x63 0x00 +i2cset -y 0 0x54 0x62 0x00 +i2cset -y 0 0x54 0x5F 0x00 +i2cset -y 0 0x54 0x5E 0x00 +i2cset -y 0 0x54 0x5D 0x00 +i2cset -y 0 0x54 0x5C 0x78 +i2cset -y 0 0x54 0x5B 0x02 +i2cset -y 0 0x54 0x5A 0xE5 +i2cset -y 0 0x54 0x59 0x88 +i2cset -y 0 0x54 0x58 0x4B +i2cset -y 0 0x54 0x57 0x6C +i2cset -y 0 0x54 0x56 0x6C + +# Lock to DPLL, output 625MHz +i2cset -y 0 0x54 0x55 0x80 +i2cset -y 0 0x54 0x53 0x00 +i2cset -y 0 0x54 0x52 0x81 +i2cset -y 0 0x54 0x50 0x00 +i2cset -y 0 0x54 0x4F 0x00 +i2cset -y 0 0x54 0x4E 0x00 +i2cset -y 0 0x54 0x4C 0xCB +i2cset -y 0 0x54 0x4A 0x00 +i2cset -y 0 0x54 0x45 0x66 +i2cset -y 0 0x54 0x44 0x66 +i2cset -y 0 0x54 0x42 0x80 +i2cset -y 0 0x54 0x41 0x03 +i2cset -y 0 0x54 0x40 0x01 +i2cset -y 0 0x54 0x3F 0x08 +i2cset -y 0 0x54 0x3E 0x04 +i2cset -y 0 0x54 0x3D 0x20 +i2cset -y 0 0x54 0x3C 0x13 +i2cset -y 0 0x54 0x3B 0x00 +i2cset -y 0 0x54 0x3A 0x98 +i2cset -y 0 0x54 0x39 0x01 +i2cset -y 0 0x54 0x38 0xE6 +i2cset -y 0 0x54 0x37 0x04 +i2cset -y 0 0x54 0x36 0xCE +i2cset -y 0 0x54 0x35 0x7C +i2cset -y 0 0x54 0x34 0x01 +i2cset -y 0 0x54 0x33 0x08 +i2cset -y 0 0x54 0x32 0x08 +i2cset -y 0 0x54 0x31 0x08 +i2cset -y 0 0x54 0x30 0x03 +i2cset -y 0 0x54 0x2F 0x23 +i2cset -y 0 0x54 0x2E 0x0B +i2cset -y 0 0x54 0x2D 0x00 +i2cset -y 0 0x54 0x28 0x76 +i2cset -y 0 0x54 0x27 0x54 +i2cset -y 0 0x54 0x25 0x00 +i2cset -y 0 0x54 0x24 0x03 +i2cset -y 0 0x54 0x23 0x06 +i2cset -y 0 0x54 0x1A 0x8C +i2cset -y 0 0x54 0x19 0x8C +i2cset -y 0 0x54 0x18 0x00 +i2cset -y 0 0x54 0x16 0x0D +i2cset -y 0 0x54 0x11 0x00 +i2cset -y 0 0x54 0x10 0x00 +i2cset -y 0 0x54 0x0E 0x3F +i2cset -y 0 0x54 0x0D 0xFF +i2cset -y 0 0x54 0x0C 0x02 +i2cset -y 0 0x54 0x0B 0xA1 +i2cset -y 0 0x54 0x0A 0x89 +i2cset -y 0 0x54 0x09 0xA2 +i2cset -y 0 0x54 0x08 0x32 +i2cset -y 0 0x54 0x06 0x00 +i2cset -y 0 0x54 0x05 0x00 +i2cset -y 0 0x54 0x04 0x00 +i2cset -y 0 0x54 0x03 0x00 +i2cset -y 0 0x54 0x02 0x05 +i2cset -y 0 0x54 0x01 0x33 +i2cset -y 0 0x54 0x00 0x91 + +echo "idt init 2" +# PreDivider_Parameters +#IN1 +i2cset -y 0 0x54 0x23 0x05 +i2cset -y 0 0x54 0x24 0x03 +i2cset -y 0 0x54 0x25 0x00 +#IN2 +i2cset -y 0 0x54 0x23 0x06 +i2cset -y 0 0x54 0x24 0x03 +i2cset -y 0 0x54 0x25 0x00 +#IN3 +i2cset -y 0 0x54 0x23 0x03 +i2cset -y 0 0x54 0x24 0x00 +i2cset -y 0 0x54 0x25 0x00 + +echo "idt init 3" +# Page1_Parameters +#Select to Page 1 +i2cset -y 0 0x54 0x2D 0x01 +i2cset -y 0 0x54 0x30 0x03 +i2cset -y 0 0x54 0x31 0x08 +i2cset -y 0 0x54 0x32 0x08 +i2cset -y 0 0x54 0x33 0x08 +i2cset -y 0 0x54 0x35 0x7C +i2cset -y 0 0x54 0x36 0xCE +i2cset -y 0 0x54 0x37 0x04 +i2cset -y 0 0x54 0x38 0xE6 +i2cset -y 0 0x54 0x39 0x01 +i2cset -y 0 0x54 0x3A 0x98 +i2cset -y 0 0x54 0x3B 0x00 +i2cset -y 0 0x54 0x3C 0x13 +i2cset -y 0 0x54 0x3D 0x20 +#Return to Page 0 +i2cset -y 0 0x54 0x2D 0x00 + +echo "idt init 4" +#reset the in-path mux +i2cset -y 0 0x70 0x0 +i2cset -y 0 0x77 0x0 + + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/Makefile new file mode 100644 index 00000000000..d9566355b84 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/Makefile @@ -0,0 +1,2 @@ +obj-m:=accton_as7712_32x_fan.o accton_as7712_32x_sfp.o leds-accton_as7712_32x.o \ + accton_as7712_32x_psu.o accton_i2c_cpld.o ym2651y.o diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_as7712_32x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_as7712_32x_fan.c new file mode 100755 index 00000000000..73dd36c2883 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_as7712_32x_fan.c @@ -0,0 +1,634 @@ +/* + * A hwmon driver for the Accton as7712 32x fan + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as7712_32x_fan" + +#define NUM_THERMAL_SENSORS (3) /* Get sum of this number of sensors.*/ +#define THERMAL_SENSORS_DRIVER "lm75" +#define THERMAL_SENSORS_ADDRS {0x48, 0x49, 0x4a} + +#define IN +#define OUT + +static struct as7712_32x_fan_data *as7712_32x_fan_update_device(struct device *dev); +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_enable(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, char *buf); + + +/* fan related data, the index should match sysfs_fan_attributes + */ +static const u8 fan_reg[] = { + 0x0F, /* fan 1-6 present status */ + 0x11, /* fan PWM(for all fan) */ + 0x12, /* front fan 1 speed(rpm) */ + 0x13, /* front fan 2 speed(rpm) */ + 0x14, /* front fan 3 speed(rpm) */ + 0x15, /* front fan 4 speed(rpm) */ + 0x16, /* front fan 5 speed(rpm) */ + 0x17, /* front fan 6 speed(rpm) */ + 0x22, /* rear fan 1 speed(rpm) */ + 0x23, /* rear fan 2 speed(rpm) */ + 0x24, /* rear fan 3 speed(rpm) */ + 0x25, /* rear fan 4 speed(rpm) */ + 0x26, /* rear fan 5 speed(rpm) */ + 0x27, /* rear fan 6 speed(rpm) */ +}; + +/* Each client has this additional data */ +struct as7712_32x_fan_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ + u8 enable; + int system_temp; /*In unit of mini-Celsius*/ + int sensors_found; +}; + +enum fan_id { + FAN1_ID, + FAN2_ID, + FAN3_ID, + FAN4_ID, + FAN5_ID, + FAN6_ID +}; + +enum sysfs_fan_attributes { + FAN_PRESENT_REG, + FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ + FAN1_FRONT_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN5_FRONT_SPEED_RPM, + FAN6_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN5_REAR_SPEED_RPM, + FAN6_REAR_SPEED_RPM, + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN5_PRESENT, + FAN6_PRESENT, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + FAN5_FAULT, + FAN6_FAULT +}; + +/* Define attributes + */ +#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT);\ + static SENSOR_DEVICE_ATTR(fan##index2##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT) +#define DECLARE_FAN_FAULT_ATTR(index, index2) &sensor_dev_attr_fan##index##_fault.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_fault.dev_attr.attr + +#define DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_direction, S_IRUGO, fan_show_value, NULL, FAN##index##_DIRECTION) +#define DECLARE_FAN_DIRECTION_ATTR(index) &sensor_dev_attr_fan##index##_direction.dev_attr.attr + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE);\ + static SENSOR_DEVICE_ATTR(pwm##index, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE);\ + static SENSOR_DEVICE_ATTR(pwm##index##_enable, S_IWUSR | S_IRUGO, get_enable, set_enable, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan_duty_cycle_percentage.dev_attr.attr, \ + &sensor_dev_attr_pwm##index.dev_attr.attr, \ + &sensor_dev_attr_pwm##index##_enable.dev_attr.attr + +#define DECLARE_FAN_SYSTEM_TEMP_SENSOR_DEV_ATTR() \ + static SENSOR_DEVICE_ATTR(sys_temp, S_IRUGO, get_sys_temp, NULL, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_SYSTEM_TEMP_ATTR() &sensor_dev_attr_sys_temp.dev_attr.attr + + +#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_present, S_IRUGO, fan_show_value, NULL, FAN##index##_PRESENT) +#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr + +#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index2##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM) +#define DECLARE_FAN_SPEED_RPM_ATTR(index, index2) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_input.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_input.dev_attr.attr + +/* 6 fan fault attributes in this platform */ +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(6,16); +/* 6 fan speed(rpm) attributes in this platform */ +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(6,16); +/* 6 fan present attributes in this platform */ +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(5); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(6); +/* 1 fan duty cycle attribute in this platform */ +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(1); +/* System temperature for fancontrol */ +DECLARE_FAN_SYSTEM_TEMP_SENSOR_DEV_ATTR(); + +static struct attribute *as7712_32x_fan_attributes[] = { + /* fan related attributes */ + DECLARE_FAN_FAULT_ATTR(1,11), + DECLARE_FAN_FAULT_ATTR(2,12), + DECLARE_FAN_FAULT_ATTR(3,13), + DECLARE_FAN_FAULT_ATTR(4,14), + DECLARE_FAN_FAULT_ATTR(5,15), + DECLARE_FAN_FAULT_ATTR(6,16), + DECLARE_FAN_SPEED_RPM_ATTR(1,11), + DECLARE_FAN_SPEED_RPM_ATTR(2,12), + DECLARE_FAN_SPEED_RPM_ATTR(3,13), + DECLARE_FAN_SPEED_RPM_ATTR(4,14), + DECLARE_FAN_SPEED_RPM_ATTR(5,15), + DECLARE_FAN_SPEED_RPM_ATTR(6,16), + DECLARE_FAN_PRESENT_ATTR(1), + DECLARE_FAN_PRESENT_ATTR(2), + DECLARE_FAN_PRESENT_ATTR(3), + DECLARE_FAN_PRESENT_ATTR(4), + DECLARE_FAN_PRESENT_ATTR(5), + DECLARE_FAN_PRESENT_ATTR(6), + DECLARE_FAN_DUTY_CYCLE_ATTR(1), + DECLARE_FAN_SYSTEM_TEMP_ATTR(), + NULL +}; + +#define FAN_DUTY_CYCLE_REG_MASK 0xF +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 100 + +static int as7712_32x_fan_read_value(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int as7712_32x_fan_write_value(struct i2c_client *client, u8 reg, u8 value) +{ + return i2c_smbus_write_byte_data(client, reg, value); +} + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + reg_val &= FAN_DUTY_CYCLE_REG_MASK; + return ((u32)(reg_val+1) * 625 + 75)/ 100; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + return ((u32)duty_cycle * 100 / 625) - 1; +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static u8 reg_val_to_is_present(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 0 : 1; +} + +static u8 is_fan_fault(struct as7712_32x_fan_data *data, enum fan_id id) +{ + u8 ret = 1; + int front_fan_index = FAN1_FRONT_SPEED_RPM + id; + int rear_fan_index = FAN1_REAR_SPEED_RPM + id; + + /* Check if the speed of front or rear fan is ZERO, + */ + if (reg_val_to_speed_rpm(data->reg_val[front_fan_index]) && + reg_val_to_speed_rpm(data->reg_val[rear_fan_index])) { + ret = 0; + } + + return ret; +} + +static ssize_t set_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct as7712_32x_fan_data *data = as7712_32x_fan_update_device(dev); + int error, value; + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0 || value > 1) + return -EINVAL; + + data->enable = value; + if (value == 0) + { + return set_duty_cycle(dev, da, buf, FAN_MAX_DUTY_CYCLE); + } + return count; +} + +static ssize_t get_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as7712_32x_fan_data *data = as7712_32x_fan_update_device(dev); + + return sprintf(buf, "%u\n", data->enable); +} + +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + struct i2c_client *client = to_i2c_client(dev); + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0) + return -EINVAL; + + value = (value > FAN_MAX_DUTY_CYCLE)? FAN_MAX_DUTY_CYCLE : value; + + as7712_32x_fan_write_value(client, 0x33, 0); /* Disable fan speed watch dog */ + as7712_32x_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); + return count; +} + +static bool lm75_addr_mached(unsigned short addr) +{ + int i; + unsigned short addrs[] = THERMAL_SENSORS_ADDRS; + + for (i = 0; i < ARRAY_SIZE(addrs); i++) + { + if( addr == addrs[i]) + return 1; + } + return 0; +} + +/* Struct and define are copied from drivers/hwmon/hwmon.c. */ +struct hwmon_device { + const char *name; + struct device dev; + const struct hwmon_chip_info *chip; + + struct attribute_group group; + const struct attribute_group **groups; +}; +#define to_hwmon_device(d) container_of(d, struct hwmon_device, dev) + +/*Find the 1st valid dev of all childs, it supposes to have only 1 child.*/ +static int is_valid_dev(struct device *dev, void *data) +{ + struct hwmon_device *hwmon_dev; + + if(dev) { + hwmon_dev = to_hwmon_device(dev); + if(hwmon_dev) { + int ret; + long t; + ret = hwmon_dev->chip->ops->read(dev, hwmon_temp, hwmon_temp_input, + 0, &t); + return !ret; + } + } + return 0; +} + +static int hwmon_get_temp(struct device *dev, long *mini_cel) +{ + struct hwmon_device *hwmon_dev = to_hwmon_device(dev); + int ret = 0; + + if(hwmon_dev) { + long t; + ret = hwmon_dev->chip->ops->read(dev, hwmon_temp, hwmon_temp_input, + 0, &t); + if (ret < 0) + return ret; + + *mini_cel = t; + } + return ret; +} + +/* Find devices under i2c_bus which with driver = lm75. + * Use the device to find its descendent hwmon_dev and read the temperature. + */ +static int _find_lm75_device(struct device *dev, void *data) +{ + struct device_driver *driver; + struct as7712_32x_fan_data *prv = data; + char *driver_name = THERMAL_SENSORS_DRIVER; + struct i2c_client *client; + + driver = dev->driver; + if (driver && driver->name && + strcmp(driver->name, driver_name) == 0) + { + + client = to_i2c_client(dev); + if (client) + { + long miniCelsius = 0; + struct device *child_dev; + + if (! lm75_addr_mached(client->addr)) + { + return 0; + } + + child_dev = device_find_child(dev, NULL, is_valid_dev); + if(child_dev) { + int ret = hwmon_get_temp(child_dev, &miniCelsius); + if (ret < 0) + return ret; + + prv->system_temp += miniCelsius; + prv->sensors_found++; + + } + } + } + return 0; +} + +/*Find all lm75 devices and return sum of temperatures.*/ +static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + ssize_t ret = 0; + struct as7712_32x_fan_data *data = as7712_32x_fan_update_device(dev); + + data->system_temp=0; + data->sensors_found=0; + i2c_for_each_dev(data, _find_lm75_device); + if (NUM_THERMAL_SENSORS != data->sensors_found) + { + dev_dbg(dev,"only %d of %d temps are found\n", + data->sensors_found, NUM_THERMAL_SENSORS); + data->system_temp = INT_MAX; + } + ret = sprintf(buf, "%d\n",data->system_temp); + return ret; +} + +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7712_32x_fan_data *data = as7712_32x_fan_update_device(dev); + ssize_t ret = 0; + + if (data->valid) { + switch (attr->index) { + case FAN_DUTY_CYCLE_PERCENTAGE: + { + u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); + ret = sprintf(buf, "%u\n", duty_cycle); + break; + } + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN5_FRONT_SPEED_RPM: + case FAN6_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: + case FAN6_REAR_SPEED_RPM: + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index])); + break; + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + case FAN6_PRESENT: + ret = sprintf(buf, "%d\n", + reg_val_to_is_present(data->reg_val[FAN_PRESENT_REG], + attr->index - FAN1_PRESENT)); + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + case FAN6_FAULT: + ret = sprintf(buf, "%d\n", is_fan_fault(data, attr->index - FAN1_FAULT)); + break; + default: + break; + } + } + + return ret; +} + +static const struct attribute_group as7712_32x_fan_group = { + .attrs = as7712_32x_fan_attributes, +}; + +static struct as7712_32x_fan_data *as7712_32x_fan_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7712_32x_fan_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + dev_dbg(&client->dev, "Starting as7712_32x_fan update\n"); + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { + int status = as7712_32x_fan_read_value(client, fan_reg[i]); + + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + dev_dbg(&client->dev, "reg %d, err %d\n", fan_reg[i], status); + return data; + } + else { + data->reg_val[i] = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int as7712_32x_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7712_32x_fan_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7712_32x_fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->enable = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7712_32x_fan_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7712_32x_fan_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7712_32x_fan_remove(struct i2c_client *client) +{ + struct as7712_32x_fan_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7712_32x_fan_group); + + return 0; +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x66, I2C_CLIENT_END }; + +static const struct i2c_device_id as7712_32x_fan_id[] = { + { "as7712_32x_fan", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7712_32x_fan_id); + +static struct i2c_driver as7712_32x_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = as7712_32x_fan_probe, + .remove = as7712_32x_fan_remove, + .id_table = as7712_32x_fan_id, + .address_list = normal_i2c, +}; + +static int __init as7712_32x_fan_init(void) +{ + return i2c_add_driver(&as7712_32x_fan_driver); +} + +static void __exit as7712_32x_fan_exit(void) +{ + i2c_del_driver(&as7712_32x_fan_driver); +} + +module_init(as7712_32x_fan_init); +module_exit(as7712_32x_fan_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7712_32x_fan driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_as7712_32x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_as7712_32x_psu.c new file mode 100644 index 00000000000..233aef78e09 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_as7712_32x_psu.c @@ -0,0 +1,288 @@ +/* + * An hwmon driver for accton as7712_32x Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); +static int as7712_32x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x50, 0x53, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as7712_32x_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[9]; /* Model name, read from eeprom */ +}; + +static struct as7712_32x_psu_data *as7712_32x_psu_update_device(struct device *dev); + +enum as7712_32x_psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_model_name,NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); + +static struct attribute *as7712_32x_psu_attributes[] = { + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + NULL +}; + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7712_32x_psu_data *data = as7712_32x_psu_update_device(dev); + u8 status = 0; + + if (attr->index == PSU_PRESENT) { + status = !(data->status >> (1-data->index) & 0x1); + } + else { /* PSU_POWER_GOOD */ + status = (data->status >> (3-data->index) & 0x1); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as7712_32x_psu_data *data = as7712_32x_psu_update_device(dev); + + return sprintf(buf, "%s\n", data->model_name); +} + +static const struct attribute_group as7712_32x_psu_group = { + .attrs = as7712_32x_psu_attributes, +}; + +static int as7712_32x_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7712_32x_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7712_32x_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7712_32x_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7712_32x_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7712_32x_psu_remove(struct i2c_client *client) +{ + struct as7712_32x_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7712_32x_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as7712_32x_psu1, + as7712_32x_psu2 +}; + +static const struct i2c_device_id as7712_32x_psu_id[] = { + { "as7712_32x_psu1", as7712_32x_psu1 }, + { "as7712_32x_psu2", as7712_32x_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7712_32x_psu_id); + +static struct i2c_driver as7712_32x_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7712_32x_psu", + }, + .probe = as7712_32x_psu_probe, + .remove = as7712_32x_psu_remove, + .id_table = as7712_32x_psu_id, + .address_list = normal_i2c, +}; + +static int as7712_32x_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = 0; + int retry_count = 5; + + while (retry_count) { + retry_count--; + + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) { + msleep(10); + continue; + } + + if (unlikely(result != data_len)) { + result = -EIO; + msleep(10); + continue; + } + + result = 0; + break; + } + + return result; +} + +static struct as7712_32x_psu_data *as7712_32x_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7712_32x_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status; + int power_good = 0; + + dev_dbg(&client->dev, "Starting as7712_32x update\n"); + + /* Read psu status */ + status = accton_i2c_cpld_read(0x60, 0x2); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg 0x60 err %d\n", status); + } + else { + data->status = status; + } + + /* Read model name */ + memset(data->model_name, 0, sizeof(data->model_name)); + power_good = (data->status >> (3-data->index) & 0x1); + + if (power_good) { + status = as7712_32x_psu_read_block(client, 0x20, data->model_name, + ARRAY_SIZE(data->model_name)-1); + + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x)\n", client->addr); + } + else { + data->model_name[ARRAY_SIZE(data->model_name)-1] = '\0'; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init as7712_32x_psu_init(void) +{ + return i2c_add_driver(&as7712_32x_psu_driver); +} + +static void __exit as7712_32x_psu_exit(void) +{ + i2c_del_driver(&as7712_32x_psu_driver); +} + +module_init(as7712_32x_psu_init); +module_exit(as7712_32x_psu_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7712_32x_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_as7712_32x_sfp.c b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_as7712_32x_sfp.c new file mode 100644 index 00000000000..4668f5a7f05 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_as7712_32x_sfp.c @@ -0,0 +1,1171 @@ +/* + * SFP driver for accton as7712_32x sfp + * + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "as7712_32x_sfp" + +#define DEBUG_MODE 0 + +#if (DEBUG_MODE == 1) + #define DEBUG_PRINT(fmt, args...) \ + printk (KERN_INFO "%s:%s[%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +#define NUM_OF_SFP_PORT 32 +#define EEPROM_NAME "sfp_eeprom" +#define EEPROM_SIZE 256 /* 256 byte eeprom */ +#define BIT_INDEX(i) (1ULL << (i)) +#define USE_I2C_BLOCK_READ 1 +#define I2C_RW_RETRY_COUNT 3 +#define I2C_RW_RETRY_INTERVAL 100 /* ms */ + +#define SFP_EEPROM_A0_I2C_ADDR (0xA0 >> 1) +#define SFP_EEPROM_A2_I2C_ADDR (0xA2 >> 1) + +#define SFF8024_PHYSICAL_DEVICE_ID_ADDR 0x0 +#define SFF8024_DEVICE_ID_SFP 0x3 +#define SFF8024_DEVICE_ID_QSFP 0xC +#define SFF8024_DEVICE_ID_QSFP_PLUS 0xD +#define SFF8024_DEVICE_ID_QSFP28 0x11 + +#define SFF8472_DIAG_MON_TYPE_ADDR 92 +#define SFF8472_DIAG_MON_TYPE_DDM_MASK 0x40 +#define SFF8472_10G_ETH_COMPLIANCE_ADDR 0x3 +#define SFF8472_10G_BASE_MASK 0xF0 + +#define SFF8436_RX_LOS_ADDR 3 +#define SFF8436_TX_FAULT_ADDR 4 +#define SFF8436_TX_DISABLE_ADDR 86 + +static ssize_t sfp_eeprom_read(struct i2c_client *, u8, u8 *,int); +static ssize_t sfp_eeprom_write(struct i2c_client *, u8 , const char *,int); +extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { SFP_EEPROM_A0_I2C_ADDR, SFP_EEPROM_A2_I2C_ADDR, I2C_CLIENT_END }; + +#define CPLD_PORT_TO_FRONT_PORT(port) (port+1) + +enum port_numbers { +sfp1, sfp2, sfp3, sfp4, sfp5, sfp6, sfp7, sfp8, +sfp9, sfp10, sfp11, sfp12, sfp13, sfp14, sfp15, sfp16, +sfp17, sfp18, sfp19, sfp20, sfp21, sfp22, sfp23, sfp24, +sfp25, sfp26, sfp27, sfp28, sfp29, sfp30, sfp31, sfp32 +}; + +static const struct i2c_device_id sfp_device_id[] = { +{ "sfp1", sfp1 }, { "sfp2", sfp2 }, { "sfp3", sfp3 }, { "sfp4", sfp4 }, +{ "sfp5", sfp5 }, { "sfp6", sfp6 }, { "sfp7", sfp7 }, { "sfp8", sfp8 }, +{ "sfp9", sfp9 }, { "sfp10", sfp10 }, { "sfp11", sfp11 }, { "sfp12", sfp12 }, +{ "sfp13", sfp13 }, { "sfp14", sfp14 }, { "sfp15", sfp15 }, { "sfp16", sfp16 }, +{ "sfp17", sfp17 }, { "sfp18", sfp18 }, { "sfp19", sfp19 }, { "sfp20", sfp20 }, +{ "sfp21", sfp21 }, { "sfp22", sfp22 }, { "sfp23", sfp23 }, { "sfp24", sfp24 }, +{ "sfp25", sfp25 }, { "sfp26", sfp26 }, { "sfp27", sfp27 }, { "sfp28", sfp28 }, +{ "sfp29", sfp29 }, { "sfp30", sfp30 }, { "sfp31", sfp31 }, { "sfp32", sfp32 }, +{} +}; +MODULE_DEVICE_TABLE(i2c, sfp_device_id); + +/* + * list of valid port types + * note OOM_PORT_TYPE_NOT_PRESENT to indicate no + * module is present in this port + */ +typedef enum oom_driver_port_type_e { + OOM_DRIVER_PORT_TYPE_INVALID, + OOM_DRIVER_PORT_TYPE_NOT_PRESENT, + OOM_DRIVER_PORT_TYPE_SFP, + OOM_DRIVER_PORT_TYPE_SFP_PLUS, + OOM_DRIVER_PORT_TYPE_QSFP, + OOM_DRIVER_PORT_TYPE_QSFP_PLUS, + OOM_DRIVER_PORT_TYPE_QSFP28 +} oom_driver_port_type_t; + +enum driver_type_e { + DRIVER_TYPE_SFP_MSA, + DRIVER_TYPE_SFP_DDM, + DRIVER_TYPE_QSFP +}; + +/* Each client has this additional data + */ +struct eeprom_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + struct bin_attribute bin; /* eeprom data */ +}; + +struct sfp_msa_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u64 status[2]; /* index 0 => device id + 1 => 10G Ethernet Compliance Codes + to distinguish SFP or SFP+ + 2 => DIAGNOSTIC MONITORING TYPE */ + struct eeprom_data eeprom; +}; + +struct sfp_ddm_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u64 status[3]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss */ + struct eeprom_data eeprom; +}; + +struct qsfp_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status[3]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss */ + + u8 device_id; + struct eeprom_data eeprom; +}; + +struct sfp_port_data { + struct mutex update_lock; + enum driver_type_e driver_type; + int port; /* CPLD port index */ + oom_driver_port_type_t port_type; + u64 present; /* present status, bit0:port0, bit1:port1 and so on */ + u64 port_reset; /* reset status, bit0:port0, bit1:port1 and so on */ + + struct sfp_msa_data *msa; + struct sfp_ddm_data *ddm; + struct qsfp_data *qsfp; + + struct i2c_client *client; +}; + +enum sfp_sysfs_attributes { + PRESENT, + PRESENT_ALL, + PORT_NUMBER, + PORT_TYPE, + DDM_IMPLEMENTED, + TX_FAULT, + TX_FAULT1, + TX_FAULT2, + TX_FAULT3, + TX_FAULT4, + TX_DISABLE, + TX_DISABLE1, + TX_DISABLE2, + TX_DISABLE3, + TX_DISABLE4, + TX_DISABLE_ALL, + RX_LOS, + RX_LOS1, + RX_LOS2, + RX_LOS3, + RX_LOS4, + RX_LOS_ALL, + PORT_RESET +}; + +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + return sprintf(buf, "%d\n", CPLD_PORT_TO_FRONT_PORT(data->port)); +} + +static struct sfp_port_data *sfp_update_present(struct i2c_client *client) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + int i = 0; + int status = -1; + u8 regs[] = {0x30, 0x31, 0x32, 0x33}; + + DEBUG_PRINT("Starting sfp present status update"); + mutex_lock(&data->update_lock); + + /* Read present status of port 1~32 */ + data->present = 0; + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = accton_i2c_cpld_read(0x60, regs[i]); + + if (status < 0) { + DEBUG_PRINT("cpld(0x60) reg(0x%x) err %d", regs[i], status); + goto exit; + } + + DEBUG_PRINT("Present status = 0x%llx", data->present); + data->present |= (u64)status << (i*8); + } + + DEBUG_PRINT("Present status = 0x%llx", data->present); +exit: + mutex_unlock(&data->update_lock); + return data; +} + +static struct sfp_port_data *sfp_update_tx_rx_status(struct device *dev) +{ + return NULL; +} + +static ssize_t sfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + return 0; +} + +static int sfp_is_port_present(struct i2c_client *client, int port) +{ + struct sfp_port_data *data = sfp_update_present(client); + return (data->present & BIT_INDEX(data->port)) ? 0 : 1; +} + +static ssize_t show_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + if (PRESENT_ALL == attr->index) { + + } + + /* PRESENT */ + return sprintf(buf, "%d\n", sfp_is_port_present(client, data->port)); +} + +static struct sfp_port_data *sfp_update_port_type(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + u8 buf = 0; + int status; + + mutex_lock(&data->update_lock); + + switch (data->driver_type) { + case DRIVER_TYPE_SFP_MSA: + { + status = sfp_eeprom_read(data->client, SFF8024_PHYSICAL_DEVICE_ID_ADDR, &buf, sizeof(buf)); + if (status < 0) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + if (buf != SFF8024_DEVICE_ID_SFP) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + status = sfp_eeprom_read(data->client, SFF8472_10G_ETH_COMPLIANCE_ADDR, &buf, sizeof(buf)); + if (status < 0) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + DEBUG_PRINT("sfp port type (0x3) data = (0x%x)", buf); + data->port_type = buf & SFF8472_10G_BASE_MASK ? OOM_DRIVER_PORT_TYPE_SFP_PLUS : OOM_DRIVER_PORT_TYPE_SFP; + break; + } + case DRIVER_TYPE_QSFP: + { + status = sfp_eeprom_read(data->client, SFF8024_PHYSICAL_DEVICE_ID_ADDR, &buf, sizeof(buf)); + if (status < 0) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + DEBUG_PRINT("qsfp port type (0x0) buf = (0x%x)", buf); + switch (buf) { + case SFF8024_DEVICE_ID_QSFP: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP; + break; + case SFF8024_DEVICE_ID_QSFP_PLUS: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP_PLUS; + break; + case SFF8024_DEVICE_ID_QSFP28: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP_PLUS; + break; + default: + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + break; + } + default: + break; + } + + mutex_unlock(&data->update_lock); + return data; +} + +static ssize_t show_port_type(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + if (!sfp_is_port_present(client, data->port)) { + return sprintf(buf, "%d\n", OOM_DRIVER_PORT_TYPE_NOT_PRESENT); + } + + sfp_update_port_type(dev); + return sprintf(buf, "%d\n", data->port_type); +} + + +static struct sfp_port_data *sfp_update_port_reset(struct i2c_client *client) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + int i = 0; + int status = -1; + u8 regs[] = {0x4, 0x5, 0x6, 0x7}; + + mutex_lock(&data->update_lock); + + /* Read reset status of port 1~32 */ + data->port_reset = 0; + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = accton_i2c_cpld_read(0x60, regs[i]); + + if (status < 0) { + DEBUG_PRINT("cpld(0x60) reg(0x%x) err %d", regs[i], status); + goto exit; + } + + DEBUG_PRINT("reset status = 0x%x", status); + data->port_reset |= (u64)status << (i*8); + } + + DEBUG_PRINT("reset status = 0x%llx", data->port_reset); +exit: + mutex_unlock(&data->update_lock); + return data; +} + +static ssize_t show_port_reset(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int is_reset = 0; + + if (!sfp_is_port_present(client, data->port)) { + return sprintf(buf, "%d\n", OOM_DRIVER_PORT_TYPE_NOT_PRESENT); + } + + sfp_update_port_reset(client); + is_reset = (data->port_reset & BIT_INDEX(data->port))? 0 : 1; + + return sprintf(buf, "%d\n", is_reset); +} + +static ssize_t sfp_set_port_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + u8 cpld_reg = 0, cpld_val = 0, cpld_bit = 0; + long is_reset; + int error; + + error = kstrtol(buf, 10, &is_reset); + if (error) { + return error; + } + + mutex_lock(&data->update_lock); + + cpld_reg = 0x4 + data->port / 8; + cpld_bit = 1 << (data->port % 8); + + cpld_val = accton_i2c_cpld_read(0x60, cpld_reg); + DEBUG_PRINT("current cpld reg = 0x%x value = 0x%x", cpld_reg, cpld_val); + + /* Update reset status. CPLD defined 0 is reset state, 1 is normal state. + * is_reset: 0 is not reset. 1 is reset. + */ + if (is_reset == 0) { + data->port_reset |= BIT_INDEX(data->port); + cpld_val |= cpld_bit; + } + else { + data->port_reset &= ~BIT_INDEX(data->port); + cpld_val &= ~cpld_bit; + } + + accton_i2c_cpld_write(0x60, cpld_reg, cpld_val); + DEBUG_PRINT("write cpld reg = 0x%x value = 0x%x cpld_bit = 0x%x", cpld_reg, cpld_val,cpld_bit); + + mutex_unlock(&data->update_lock); + + return count; +} + +static struct sfp_port_data *qsfp_update_tx_rx_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int i, status = -1; + u8 buf = 0; + u8 reg[] = {SFF8436_TX_FAULT_ADDR, SFF8436_TX_DISABLE_ADDR, SFF8436_RX_LOS_ADDR}; + + if (time_before(jiffies, data->qsfp->last_updated + HZ + HZ / 2) && data->qsfp->valid) { + return data; + } + + dev_dbg(dev, "Starting sfp tx rx status update"); + mutex_lock(&data->update_lock); + data->qsfp->valid = 0; + memset(data->qsfp->status, 0, sizeof(data->qsfp->status)); + + /* Notify device to update tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(data->client, reg[i], &buf, sizeof(buf)); + if (status < 0) { + goto exit; + } + } + msleep(200); + + /* Read actual tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(data->client, reg[i], &buf, sizeof(buf)); + if (status < 0) { + goto exit; + } + + DEBUG_PRINT("qsfp reg(0x%x) status = (0x%x)", reg[i], data->qsfp->status[i]); + data->qsfp->status[i] = (buf & 0xF); + } + + data->qsfp->valid = 1; + data->qsfp->last_updated = jiffies; + mutex_unlock(&data->update_lock); + return data; + +exit: + mutex_unlock(&data->update_lock); + return NULL; +} + +static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 val = 0; + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct sfp_port_data *data = i2c_get_clientdata(client); + + if (!sfp_is_port_present(client, data->port)) { + return -ENODEV; + } + + data = qsfp_update_tx_rx_status(dev); + if (!data) { + return -EIO; + } + + switch (attr->index) { + case TX_FAULT1: + case TX_FAULT2: + case TX_FAULT3: + case TX_FAULT4: + val = (data->qsfp->status[2] & BIT_INDEX(attr->index - TX_FAULT1)) ? 1 : 0; + break; + case TX_DISABLE1: + case TX_DISABLE2: + case TX_DISABLE3: + case TX_DISABLE4: + val = (data->qsfp->status[1] & BIT_INDEX(attr->index - TX_DISABLE1)) ? 1 : 0; + break; + case TX_DISABLE_ALL: + val = ((data->qsfp->status[1] & 0xF) == 0xF) ? 1 : 0; + break; + + case RX_LOS1: + case RX_LOS2: + case RX_LOS3: + case RX_LOS4: + val = (data->qsfp->status[0] & BIT_INDEX(attr->index - RX_LOS1)) ? 1 : 0; + break; + default: + break; + } + + return sprintf(buf, "%d\n", val); +} + +static ssize_t qsfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + long disable; + int result; + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct sfp_port_data *data; + + result = kstrtol(buf, 10, &disable); + if (result) { + return result; + } + + data = qsfp_update_tx_rx_status(dev); + if (!data) { + return -EIO; + } + + mutex_lock(&data->update_lock); + + DEBUG_PRINT ("disable:%ld %d==%d %u\r\n", disable, attr->index, TX_DISABLE_ALL, data->qsfp->status[1]); + + if (attr->index == TX_DISABLE_ALL) + { + data->qsfp->status[1] = disable? 0xF:0; + } + else + { + if (disable) { + data->qsfp->status[1] |= (1 << (attr->index - TX_DISABLE1)); + } + else { + data->qsfp->status[1] &= ~(1 << (attr->index - TX_DISABLE1)); + } + } + DEBUG_PRINT("index = (%d), status = (0x%x)", attr->index, data->qsfp->status[1]); + result = sfp_eeprom_write(client, SFF8436_TX_DISABLE_ADDR, &data->qsfp->status[1], sizeof(data->qsfp->status[1])); + mutex_unlock(&data->update_lock); + return count; +} + +static ssize_t sfp_show_ddm_implemented(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + char ddm; + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + if (!sfp_is_port_present(client, data->port)) { + return -ENODEV; + } + + status = sfp_eeprom_read(data->client, SFF8472_DIAG_MON_TYPE_ADDR, &ddm, sizeof(ddm)); + if (status < 0) { + return -EIO; + } + + return sprintf(buf, "%d\n", (ddm & SFF8472_DIAG_MON_TYPE_DDM_MASK) ? 1 : 0); +} + +static ssize_t sfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 val = 0, index = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct sfp_port_data *data; + + data = sfp_update_tx_rx_status(dev); + if (!data) { + return -EIO; + } + + switch (attr->index) { + case TX_FAULT: + index = 0; + break; + case TX_DISABLE: + index = 1; + break; + case RX_LOS: + index = 2; + break; + default: + break; + } + + val = (data->ddm->status[index] & BIT_INDEX(data->port)) ? 1 : 0; + return sprintf(buf, "%d\n", val); +} + +/* SFP/QSFP common attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_port_number, S_IRUGO, show_port_number, NULL, PORT_NUMBER); +static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, show_present, NULL, PRESENT); +static SENSOR_DEVICE_ATTR(sfp_port_type, S_IRUGO, show_port_type, NULL, PORT_TYPE); +static SENSOR_DEVICE_ATTR(sfp_is_present_all, S_IRUGO, show_present, NULL, PRESENT); +static SENSOR_DEVICE_ATTR(sfp_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT_RESET); + +/* QSFP attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_rx_los1, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS1); +static SENSOR_DEVICE_ATTR(sfp_rx_los2, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS2); +static SENSOR_DEVICE_ATTR(sfp_rx_los3, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS3); +static SENSOR_DEVICE_ATTR(sfp_rx_los4, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS4); +static SENSOR_DEVICE_ATTR(sfp_tx_disable1, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE1); +static SENSOR_DEVICE_ATTR(sfp_tx_disable2, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE2); +static SENSOR_DEVICE_ATTR(sfp_tx_disable3, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE3); +static SENSOR_DEVICE_ATTR(sfp_tx_disable4, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE4); +static SENSOR_DEVICE_ATTR(sfp_tx_disable_all, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE_ALL); +static SENSOR_DEVICE_ATTR(sfp_tx_fault1, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT1); +static SENSOR_DEVICE_ATTR(sfp_tx_fault2, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT2); +static SENSOR_DEVICE_ATTR(sfp_tx_fault3, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT3); +static SENSOR_DEVICE_ATTR(sfp_tx_fault4, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT4); +static struct attribute *qsfp_attributes[] = { + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_port_type.dev_attr.attr, + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_port_reset.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los1.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los2.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los3.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los4.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable1.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable2.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable3.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable4.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable_all.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault1.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault2.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault3.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault4.dev_attr.attr, + NULL +}; + +/* SFP msa attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_ddm_implemented, S_IRUGO, sfp_show_ddm_implemented, NULL, DDM_IMPLEMENTED); +static struct attribute *sfp_msa_attributes[] = { + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_port_type.dev_attr.attr, + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_ddm_implemented.dev_attr.attr, + NULL +}; + +/* SFP ddm attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, RX_LOS); +static SENSOR_DEVICE_ATTR(sfp_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, TX_DISABLE); +static SENSOR_DEVICE_ATTR(sfp_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, TX_FAULT); +static struct attribute *sfp_ddm_attributes[] = { + &sensor_dev_attr_sfp_tx_fault.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable.dev_attr.attr, + NULL +}; + +static ssize_t sfp_eeprom_write(struct i2c_client *client, u8 command, const char *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int result, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + result = i2c_smbus_write_i2c_block_data(client, command, data_len, data); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) { + return result; + } + + return data_len; +#else + int result, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + result = i2c_smbus_write_byte_data(client, command, *data); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) { + return result; + } + + return 1; +#endif + + +} + + +static ssize_t sfp_port_write(struct sfp_port_data *data, + const char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + return count; + } + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_write(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; +} + + +static ssize_t sfp_bin_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct sfp_port_data *data; + DEBUG_PRINT("offset = (%d), count = (%d)", off, count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + return sfp_port_write(data, buf, off, count); +} + +static ssize_t sfp_eeprom_read(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int result, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + //result = data_len; + +abort: + return result; +#else + int result, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + result = i2c_smbus_read_byte_data(client, command); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) { + dev_dbg(&client->dev, "sfp read byte data failed, command(0x%2x), data(0x%2x)\r\n", command, result); + goto abort; + } + + *data = (u8)result; + result = 1; + +abort: + return result; +#endif +} + +static ssize_t sfp_port_read(struct sfp_port_data *data, + char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + DEBUG_PRINT("Count = 0, return"); + return count; + } + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_read(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; + +} + +static ssize_t sfp_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct sfp_port_data *data; + DEBUG_PRINT("offset = (%d), count = (%d)", off, count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + return sfp_port_read(data, buf, off, count); +} + +static int sfp_sysfs_eeprom_init(struct kobject *kobj, struct bin_attribute *eeprom) +{ + int err; + + sysfs_bin_attr_init(eeprom); + eeprom->attr.name = EEPROM_NAME; + eeprom->attr.mode = S_IWUSR | S_IRUGO; + eeprom->read = sfp_bin_read; + eeprom->write = sfp_bin_write; + eeprom->size = EEPROM_SIZE; + + /* Create eeprom file */ + err = sysfs_create_bin_file(kobj, eeprom); + if (err) { + return err; + } + + return 0; +} + +static int sfp_sysfs_eeprom_cleanup(struct kobject *kobj, struct bin_attribute *eeprom) +{ + sysfs_remove_bin_file(kobj, eeprom); + return 0; +} + +static const struct attribute_group sfp_msa_group = { + .attrs = sfp_msa_attributes, +}; + +static int sfp_i2c_check_functionality(struct i2c_client *client) +{ +#if USE_I2C_BLOCK_READ + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK); +#else + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA); +#endif +} + +static int sfp_msa_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct sfp_msa_data **data) +{ + int status; + struct sfp_msa_data *msa; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + msa = kzalloc(sizeof(struct sfp_msa_data), GFP_KERNEL); + if (!msa) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &sfp_msa_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &msa->eeprom.bin); + if (status) { + goto exit_remove; + } + + *data = msa; + dev_info(&client->dev, "sfp msa '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); +exit_free: + kfree(msa); +exit: + + return status; +} + +static const struct attribute_group sfp_ddm_group = { + .attrs = sfp_ddm_attributes, +}; + +static int sfp_ddm_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct sfp_ddm_data **data) +{ + int status; + struct sfp_ddm_data *ddm; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + ddm = kzalloc(sizeof(struct sfp_ddm_data), GFP_KERNEL); + if (!ddm) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &sfp_ddm_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &ddm->eeprom.bin); + if (status) { + goto exit_remove; + } + + *data = ddm; + dev_info(&client->dev, "sfp ddm '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &sfp_ddm_group); +exit_free: + kfree(ddm); +exit: + + return status; +} + +static const struct attribute_group qsfp_group = { + .attrs = qsfp_attributes, +}; + +static int qsfp_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct qsfp_data **data) +{ + int status; + struct qsfp_data *qsfp; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + qsfp = kzalloc(sizeof(struct qsfp_data), GFP_KERNEL); + if (!qsfp) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &qsfp_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &qsfp->eeprom.bin); + if (status) { + goto exit_remove; + } + + /* Bring QSFPs out of reset + as6712_32x_i2c_cpld_write(0x62, 0x4, 0xFF); + as6712_32x_i2c_cpld_write(0x62, 0x5, 0xFF); + as6712_32x_i2c_cpld_write(0x64, 0x4, 0xFF); + as6712_32x_i2c_cpld_write(0x64, 0x5, 0xFF);*/ + + *data = qsfp; + dev_info(&client->dev, "qsfp '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &qsfp_group); +exit_free: + kfree(qsfp); +exit: + + return status; +} + +static int sfp_device_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct sfp_port_data *data = NULL; + + data = kzalloc(sizeof(struct sfp_port_data), GFP_KERNEL); + if (!data) { + return -ENOMEM; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->port = dev_id->driver_data; + data->client = client; + + if (client->addr != SFP_EEPROM_A0_I2C_ADDR) { + return -ENODEV; + } + + data->driver_type = DRIVER_TYPE_QSFP; + return qsfp_probe(client, dev_id, &data->qsfp); +} + +static int sfp_msa_remove(struct i2c_client *client, struct sfp_msa_data *data) +{ + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); + kfree(data); + return 0; +} + +static int sfp_ddm_remove(struct i2c_client *client, struct sfp_ddm_data *data) +{ + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + sysfs_remove_group(&client->dev.kobj, &sfp_ddm_group); + kfree(data); + return 0; +} + +static int qfp_remove(struct i2c_client *client, struct qsfp_data *data) +{ + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + sysfs_remove_group(&client->dev.kobj, &qsfp_group); + kfree(data); + return 0; +} + +static int sfp_device_remove(struct i2c_client *client) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + + switch (data->driver_type) { + case DRIVER_TYPE_SFP_MSA: + return sfp_msa_remove(client, data->msa); + case DRIVER_TYPE_SFP_DDM: + return sfp_ddm_remove(client, data->ddm); + case DRIVER_TYPE_QSFP: + return qfp_remove(client, data->qsfp); + } + + return 0; +} + +static struct i2c_driver sfp_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = sfp_device_probe, + .remove = sfp_device_remove, + .id_table = sfp_device_id, + .address_list = normal_i2c, +}; + +static int __init sfp_init(void) +{ + return i2c_add_driver(&sfp_driver); +} + +static void __exit sfp_exit(void) +{ + i2c_del_driver(&sfp_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton as7712_32x_sfp driver"); +MODULE_LICENSE("GPL"); + +module_init(sfp_init); +module_exit(sfp_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_i2c_cpld.c new file mode 120000 index 00000000000..39c0826d16f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_i2c_cpld.c @@ -0,0 +1 @@ +../../common/modules/accton_i2c_cpld.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_pmbus_3y.c b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_pmbus_3y.c new file mode 120000 index 00000000000..7504a0556e1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/accton_pmbus_3y.c @@ -0,0 +1 @@ +../../common/modules/accton_pmbus_3y.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/leds-accton_as7712_32x.c b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/leds-accton_as7712_32x.c new file mode 100644 index 00000000000..5e1a9282db0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/leds-accton_as7712_32x.c @@ -0,0 +1,690 @@ +/* + * A LED driver for the accton_as7712_32x_led + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +extern int accton_i2c_cpld_read (unsigned short cpld_addr, u8 reg); +extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern void led_classdev_unregister(struct led_classdev *led_cdev); +extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); +extern void led_classdev_resume(struct led_classdev *led_cdev); +extern void led_classdev_suspend(struct led_classdev *led_cdev); + +#define DRVNAME "accton_as7712_32x_led" +#define ENABLE_PORT_LED 1 + +struct accton_as7712_32x_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[1]; /* only 1 register*/ +}; + +static struct accton_as7712_32x_led_data *ledctl = NULL; + +/* LED related data + */ + +#define LED_CNTRLER_I2C_ADDRESS (0x60) + +#define LED_TYPE_DIAG_REG_MASK (0x3) +#define LED_MODE_DIAG_GREEN_VALUE (0x02) +#define LED_MODE_DIAG_RED_VALUE (0x01) +#define LED_MODE_DIAG_AMBER_VALUE (0x00) /*It's yellow actually. Green+Red=Yellow*/ +#define LED_MODE_DIAG_OFF_VALUE (0x03) + +#define LED_TYPE_LOC_REG_MASK (0x80) +#define LED_MODE_LOC_ON_VALUE (0) +#define LED_MODE_LOC_OFF_VALUE (0x80) + +#if (ENABLE_PORT_LED == 1) +#define LED_TYPE_PORT_LED(port) \ + LED_TYPE_PORT##port##_LED0, \ + LED_TYPE_PORT##port##_LED1, \ + LED_TYPE_PORT##port##_LED2, \ + LED_TYPE_PORT##port##_LED3 +#endif + +enum led_type { + LED_TYPE_DIAG, + LED_TYPE_LOC, + LED_TYPE_FAN, + LED_TYPE_PSU1, + LED_TYPE_PSU2, +#if (ENABLE_PORT_LED == 1) + LED_TYPE_PORT_LED(0), + LED_TYPE_PORT_LED(1), + LED_TYPE_PORT_LED(2), + LED_TYPE_PORT_LED(3), + LED_TYPE_PORT_LED(4), + LED_TYPE_PORT_LED(5), + LED_TYPE_PORT_LED(6), + LED_TYPE_PORT_LED(7), + LED_TYPE_PORT_LED(8), + LED_TYPE_PORT_LED(9), + LED_TYPE_PORT_LED(10), + LED_TYPE_PORT_LED(11), + LED_TYPE_PORT_LED(12), + LED_TYPE_PORT_LED(13), + LED_TYPE_PORT_LED(14), + LED_TYPE_PORT_LED(15), + LED_TYPE_PORT_LED(16), + LED_TYPE_PORT_LED(17), + LED_TYPE_PORT_LED(18), + LED_TYPE_PORT_LED(19), + LED_TYPE_PORT_LED(20), + LED_TYPE_PORT_LED(21), + LED_TYPE_PORT_LED(22), + LED_TYPE_PORT_LED(23), + LED_TYPE_PORT_LED(24), + LED_TYPE_PORT_LED(25), + LED_TYPE_PORT_LED(26), + LED_TYPE_PORT_LED(27), + LED_TYPE_PORT_LED(28), + LED_TYPE_PORT_LED(29), + LED_TYPE_PORT_LED(30), + LED_TYPE_PORT_LED(31), +#endif +}; + +struct led_reg { + u32 types; + u8 reg_addr; +}; + +static const struct led_reg led_reg_map[] = { + {(1<update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as7712_32x_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = accton_as7712_32x_led_read_value(led_reg_map[i].reg_addr); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg_map[i].reg_addr, status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as7712_32x_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + enum led_type type) +{ + int reg_val; + u8 reg ; + mutex_lock(&ledctl->update_lock); + + if( !accton_getLedReg(type, ®)) + { + dev_dbg(&ledctl->pdev->dev, "Not match item for %d.\n", type); + } + + reg_val = accton_as7712_32x_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + accton_as7712_32x_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + + +static void accton_as7712_32x_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as7712_32x_led_set(led_cdev, led_light_mode, LED_TYPE_DIAG); +} + +static enum led_brightness accton_as7712_32x_led_diag_get(struct led_classdev *cdev) +{ + accton_as7712_32x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void accton_as7712_32x_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as7712_32x_led_set(led_cdev, led_light_mode, LED_TYPE_LOC); +} + +static enum led_brightness accton_as7712_32x_led_loc_get(struct led_classdev *cdev) +{ + accton_as7712_32x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static void accton_as7712_32x_led_auto_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ +} + +static enum led_brightness accton_as7712_32x_led_auto_get(struct led_classdev *cdev) +{ + return LED_MODE_AUTO; +} + +#if (ENABLE_PORT_LED == 1) +#define PORT_LED_COLOR_MASK (0x7 << 2) +#define PORT_LED_COLOR1_REG_VAL (0x0 << 2) +#define PORT_LED_COLOR2_REG_VAL (0x1 << 2) +#define PORT_LED_COLOR3_REG_VAL (0x2 << 2) +#define PORT_LED_COLOR4_REG_VAL (0x3 << 2) +#define PORT_LED_COLOR5_REG_VAL (0x4 << 2) +#define PORT_LED_COLOR6_REG_VAL (0x5 << 2) +#define PORT_LED_COLOR7_REG_VAL (0x6 << 2) +#define PORT_LED_COLOR8_REG_VAL (0x7 << 2) + +static int accton_as7712_32x_port_led_read_value(unsigned short cpld_addr, u8 reg) +{ + return accton_i2c_cpld_read(cpld_addr, reg); +} + +static int accton_as7712_32x_port_led_write_value(unsigned short cpld_addr, u8 reg, u8 value) +{ + return accton_i2c_cpld_write(cpld_addr, reg, value); +} + +static int port_led_mode_to_cpld_val(int mode) +{ + u8 color = 0; + u8 blinking = 0; + u8 on = 1 << 0; + + switch (mode) { + case LED_MODE_WHITE_BLINKING: blinking = 1 << 1; /* fall through */ + case LED_MODE_WHITE: color = 0x0 << 2; + break; + case LED_MODE_YELLOW_BLINKING: blinking = 1 << 1; /* fall through */ + case LED_MODE_YELLOW: color = 0x1 << 2; + break; + case LED_MODE_ORANGE_BLINKING: blinking = 1 << 1; /* fall through */ + case LED_MODE_ORANGE: color = 0x2 << 2; + break; + case LED_MODE_PURPLE_BLINKING: blinking = 1 << 1; /* fall through */ + case LED_MODE_PURPLE: color = 0x3 << 2; + break; + case LED_MODE_CYAN_BLINKING: blinking = 1 << 1; /* fall through */ + case LED_MODE_CYAN: color = 0x4 << 2; + break; + case LED_MODE_RED_BLINKING: blinking = 1 << 1; /* fall through */ + case LED_MODE_RED: color = 0x5 << 2; + break; + case LED_MODE_GREEN_BLINKING: blinking = 1 << 1; /* fall through */ + case LED_MODE_GREEN: color = 0x6 << 2; + break; + case LED_MODE_BLUE_BLINKING: blinking = 1 << 1; /* fall through */ + case LED_MODE_BLUE: color = 0x7 << 2; + break; + case LED_MODE_OFF: on = 0 << 0; + break; + default: + return -EINVAL; + } + + return (color | blinking | on); +} + +static int cpld_val_to_port_led_mode(uint8_t value) +{ + int on = (value & 0x1); + int blinking = (value & 0x2); + int color = (value & PORT_LED_COLOR_MASK) ; + + if (!on) { + return LED_MODE_OFF; + } + + switch (color) { + case PORT_LED_COLOR1_REG_VAL: + return blinking ? LED_MODE_WHITE_BLINKING : LED_MODE_WHITE; + case PORT_LED_COLOR2_REG_VAL: + return blinking ? LED_MODE_YELLOW_BLINKING : LED_MODE_YELLOW; + case PORT_LED_COLOR3_REG_VAL: + return blinking ? LED_MODE_ORANGE_BLINKING : LED_MODE_ORANGE; + case PORT_LED_COLOR4_REG_VAL: + return blinking ? LED_MODE_PURPLE_BLINKING : LED_MODE_PURPLE; + case PORT_LED_COLOR5_REG_VAL: + return blinking ? LED_MODE_CYAN_BLINKING : LED_MODE_CYAN; + case PORT_LED_COLOR6_REG_VAL: + return blinking ? LED_MODE_RED_BLINKING : LED_MODE_RED; + case PORT_LED_COLOR7_REG_VAL: + return blinking ? LED_MODE_GREEN_BLINKING : LED_MODE_GREEN; + case PORT_LED_COLOR8_REG_VAL: + return blinking ? LED_MODE_BLUE_BLINKING : LED_MODE_BLUE; + default: + return -EINVAL;; + } +} + + +static void accton_as7712_32x_port_led_set(struct led_classdev *cdev, + enum led_brightness led_light_mode) +{ + unsigned int port, lid; + unsigned short cpld_addr; + u8 reg, value; + sscanf(cdev->name, "accton_as7712_32x_led::port%u_led%u", &port, &lid); + + if (port > 32 || lid > 4) { + dev_dbg(&ledctl->pdev->dev, "Port(%u), Led_id(%u) not match\n", port, lid); + return; + } + + cpld_addr = (port < 16) ? 0x64 : 0x62; + reg = (0x50 + (port % 16) * 4 + lid); + value = port_led_mode_to_cpld_val(led_light_mode); + + if (value < 0) { + dev_dbg(&ledctl->pdev->dev, "Unknow port led mode(%d)\n", led_light_mode); + return; + } + + accton_as7712_32x_port_led_write_value(cpld_addr, reg, value); +} + +static enum led_brightness accton_as7712_32x_port_led_get(struct led_classdev *cdev) +{ + unsigned int port, lid; + unsigned short cpld_addr; + u8 reg, value; + sscanf(cdev->name, "accton_as7712_32x_led::port%u_led%u", &port, &lid); + + if (port > 32 || lid > 4) { + dev_dbg(&ledctl->pdev->dev, "Port(%u), Led_id(%u) not match\n", port, lid); + return -EINVAL; + } + + cpld_addr = (port < 16) ? 0x64 : 0x62; + reg = (0x50 + (port % 16) * 4 + lid); + value = accton_as7712_32x_port_led_read_value(cpld_addr, reg); + + if (value < 0) { + dev_dbg(&ledctl->pdev->dev, "Unable to read reg value from cpld(0x%x), reg(0x%x)\n", cpld_addr, reg); + return value; + } + + return cpld_val_to_port_led_mode(value); +} + +#define _PORT_LED_CLASSDEV(port, lid) \ + [LED_TYPE_PORT##port##_LED##lid] = { \ + .name = "accton_as7712_32x_led::port"#port"_led"#lid,\ + .default_trigger = "unused", \ + .brightness_set = accton_as7712_32x_port_led_set, \ + .brightness_get = accton_as7712_32x_port_led_get, \ + .max_brightness = LED_MODE_CYAN_BLINKING, \ + } + +#define PORT_LED_CLASSDEV(port) \ + _PORT_LED_CLASSDEV(port, 0),\ + _PORT_LED_CLASSDEV(port, 1),\ + _PORT_LED_CLASSDEV(port, 2),\ + _PORT_LED_CLASSDEV(port, 3) +#endif + +static struct led_classdev accton_as7712_32x_leds[] = { + [LED_TYPE_DIAG] = { + .name = "accton_as7712_32x_led::diag", + .default_trigger = "unused", + .brightness_set = accton_as7712_32x_led_diag_set, + .brightness_get = accton_as7712_32x_led_diag_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_RED, + }, + [LED_TYPE_LOC] = { + .name = "accton_as7712_32x_led::loc", + .default_trigger = "unused", + .brightness_set = accton_as7712_32x_led_loc_set, + .brightness_get = accton_as7712_32x_led_loc_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_BLUE, + }, + [LED_TYPE_FAN] = { + .name = "accton_as7712_32x_led::fan", + .default_trigger = "unused", + .brightness_set = accton_as7712_32x_led_auto_set, + .brightness_get = accton_as7712_32x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU1] = { + .name = "accton_as7712_32x_led::psu1", + .default_trigger = "unused", + .brightness_set = accton_as7712_32x_led_auto_set, + .brightness_get = accton_as7712_32x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "accton_as7712_32x_led::psu2", + .default_trigger = "unused", + .brightness_set = accton_as7712_32x_led_auto_set, + .brightness_get = accton_as7712_32x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, +#if (ENABLE_PORT_LED == 1) + PORT_LED_CLASSDEV(0), + PORT_LED_CLASSDEV(1), + PORT_LED_CLASSDEV(2), + PORT_LED_CLASSDEV(3), + PORT_LED_CLASSDEV(4), + PORT_LED_CLASSDEV(5), + PORT_LED_CLASSDEV(6), + PORT_LED_CLASSDEV(7), + PORT_LED_CLASSDEV(8), + PORT_LED_CLASSDEV(9), + PORT_LED_CLASSDEV(10), + PORT_LED_CLASSDEV(11), + PORT_LED_CLASSDEV(12), + PORT_LED_CLASSDEV(13), + PORT_LED_CLASSDEV(14), + PORT_LED_CLASSDEV(15), + PORT_LED_CLASSDEV(16), + PORT_LED_CLASSDEV(17), + PORT_LED_CLASSDEV(18), + PORT_LED_CLASSDEV(19), + PORT_LED_CLASSDEV(20), + PORT_LED_CLASSDEV(21), + PORT_LED_CLASSDEV(22), + PORT_LED_CLASSDEV(23), + PORT_LED_CLASSDEV(24), + PORT_LED_CLASSDEV(25), + PORT_LED_CLASSDEV(26), + PORT_LED_CLASSDEV(27), + PORT_LED_CLASSDEV(28), + PORT_LED_CLASSDEV(29), + PORT_LED_CLASSDEV(30), + PORT_LED_CLASSDEV(31), +#endif +}; + +static int accton_as7712_32x_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as7712_32x_leds); i++) { + led_classdev_suspend(&accton_as7712_32x_leds[i]); + } + + return 0; +} + +static int accton_as7712_32x_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as7712_32x_leds); i++) { + led_classdev_resume(&accton_as7712_32x_leds[i]); + } + + return 0; +} + +static int accton_as7712_32x_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(accton_as7712_32x_leds); i++) { + ret = led_classdev_register(&pdev->dev, &accton_as7712_32x_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(accton_as7712_32x_leds)){ + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&accton_as7712_32x_leds[i]); + } + } + + return ret; +} + +static int accton_as7712_32x_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(accton_as7712_32x_leds); i++) { + led_classdev_unregister(&accton_as7712_32x_leds[i]); + } + + return 0; +} + +static struct platform_driver accton_as7712_32x_led_driver = { + .probe = accton_as7712_32x_led_probe, + .remove = accton_as7712_32x_led_remove, + .suspend = accton_as7712_32x_led_suspend, + .resume = accton_as7712_32x_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as7712_32x_led_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as7712_32x_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct accton_as7712_32x_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as7712_32x_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&accton_as7712_32x_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as7712_32x_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&accton_as7712_32x_led_driver); + kfree(ledctl); +} + +module_init(accton_as7712_32x_led_init); +module_exit(accton_as7712_32x_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as7712_32x_led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/pmbus.h new file mode 120000 index 00000000000..b0e1a57107f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/pmbus.h @@ -0,0 +1 @@ +../../common/modules/pmbus.h \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/ym2651y.c new file mode 120000 index 00000000000..f4d67640ccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/modules/ym2651y.c @@ -0,0 +1 @@ +../../common/modules/ym2651y.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/service/as7712-platform-init.service b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/service/as7712-platform-init.service new file mode 100755 index 00000000000..d5d25b6cde0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/service/as7712-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Accton AS7712-32X Platform initialization service +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/accton_as7712_util.py install +ExecStop=/usr/local/bin/accton_as7712_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/setup.py new file mode 100755 index 00000000000..09c763c84f0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as7712_32x', + version='1.0', + description='Module to initialize Accton AS7712-32X platforms', + + packages=['as7712_32x'], + package_dir={'as7712_32x': 'as7712-32x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/utils/README b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/utils/README new file mode 100755 index 00000000000..0b9fc163399 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/utils/README @@ -0,0 +1,60 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +To initialize the system, run "accton_as7712_util.py install". +To clean up the drivers & devices, run "accton_as7712_util.py clean". +To dump information of sensors, run "accton_as7712_util.py show". +To dump SFP EEPROM, run "accton_as7712_util.py sff". +To set fan speed, run "accton_as7712_util.py set fan". +To enable/disable SFP emission, run "accton_as7712_util.py set sfp". +To set system LEDs' color, run "accton_as7712_util.py set led" +For more information, run "accton_as7712_util.py --help". + +==================================================================== +Besides applying accton_as7712_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +LED controls can be found under /sys/class/leds. The sysfs interface +color mappings are as follows: +Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + +There are 5 system LEDs, loc, diag, fan, ps1, and ps2. +They are lit automatically by CPLD, but the loc and diag. +The loc led has only 1 color, blue. +The diag one has 3 colors: red, amber, and green. + +Fan controls can be found in /sys/bus/i2c/devices/2-0066. +There are 12 fans inside 6 fan modules. +All fans share 1 duty setting, ranged from 0~100. + +Three temperature sensors are controlled by the lm75 kernel modules. +They should already be visible under /sys/bus/i2c/drivers/lm75/. + +Two power supplies are controlled by the CPLD. +Here provide their status under +/sys/bus/i2c/devices/10-0050 and /sys/bus/i2c/devices/11-0053. + +There are 32 QSFP+ modules are equipped. +Apply "accton_as7712_util.py show" to get their status. +Apply "accton_as7712_util.py set sfp" to turn on/off light transmission. +Apply "accton_as7712_util.py sff" to dump EEPROM information. +Before operating on that QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/utils/accton_as7712_util.py b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/utils/accton_as7712_util.py new file mode 100755 index 00000000000..c8b755b85b6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/utils/accton_as7712_util.py @@ -0,0 +1,569 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + + + + +PROJECT_NAME = 'as7712_32x' +version = '0.1.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan':6,'thermal':4, 'psu':2, 'sfp':32} +FORCE = 0 +#logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +#logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-32 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-32 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ROY]"+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_check(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + return True + + + +kos = [ +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe accton_i2c_cpld' , +'modprobe ym2651y' , +'modprobe accton_as7712_32x_fan' , +'modprobe optoe' , +'modprobe leds-accton_as7712_32x' , +'modprobe accton_as7712_32x_psu' ] + +def driver_install(): + global FORCE + status, output = log_os_system("depmod", 1) + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +led_prefix ='/sys/class/leds/accton_'+PROJECT_NAME+'_led::' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2']} +hwmon_nodes = {'led': ['brightness'] } +hwmon_prefix ={'led': led_prefix} + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'fan': ['2-0066'] , + 'thermal': ['3-0048','3-0049', '3-004a', '3-004b'] , + 'psu': ['10-0050','11-0053'], + 'sfp': ['-0050']} +i2c_nodes = {'fan': ['present', 'front_speed_rpm', 'rear_speed_rpm'] , + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['module_present', 'sfp_tx_disable_all']} + +sfp_map = [22,23,24,25,27,26,29,28, + 18,19,20,21,30,31,32,33, + 34,35,36,37,46,47,48,49, + 38,39,40,41,42,43,44,45] +mknod =[ +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-1/new_device' , +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-1/new_device' , +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-1/new_device' , +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-1/new_device', + +'echo as7712_32x_fan 0x66 > /sys/bus/i2c/devices/i2c-2/new_device ', +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-3/new_device', +'echo as7712_32x_psu1 0x53 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo ym2651 0x5b > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as7712_32x_psu2 0x50 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo ym2651 0x58 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo cpld_as7712 0x60 > /sys/bus/i2c/devices/i2c-4/new_device', +'echo cpld_plain 0x62 > /sys/bus/i2c/devices/i2c-5/new_device', +'echo cpld_plain 0x64 > /sys/bus/i2c/devices/i2c-6/new_device'] + +mknod2 =[ +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-0/new_device' , +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-0/new_device' , +'echo pca9548 0X73 > /sys/bus/i2c/devices/i2c-0/new_device' , +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-0/new_device', + +'echo as7712_32x_fan 0x66 > /sys/bus/i2c/devices/i2c-2/new_device ', +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-3/new_device', +'echo as7712_32x_psu1 0x53 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo ym2651 0x5b > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as7712_32x_psu2 0x50 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo ym2651 0x58 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo cpld_as7712 0x60 > /sys/bus/i2c/devices/i2c-4/new_device', +'echo cpld_plain 0x62 > /sys/bus/i2c/devices/i2c-5/new_device', +'echo cpld_plain 0x64 > /sys/bus/i2c/devices/i2c-6/new_device'] + + +def i2c_order_check(): + # i2c bus 0 and 1 might be installed in different order. + # Here check if 0x76 is exist @ i2c-0 + tmp = "echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-0/new_device" + status, output = log_os_system(tmp, 0) + if not device_exist(): + order = 1 + else: + order = 0 + tmp = "echo 0x76 > /sys/bus/i2c/devices/i2c-0/delete_device" + status, output = log_os_system(tmp, 0) + return order + +def device_install(): + global FORCE + + order = i2c_order_check() + + # if 0x76 is not exist @i2c-0, use reversed bus order + if order: + for i in range(0,len(mknod2)): + #for pca954x need times to built new i2c buses + if mknod2[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod2[i], 1) + if status: + print output + if FORCE == 0: + return status + else: + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + for i in range(0,len(sfp_map)): + status, output =log_os_system("echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/1-0076", 0) + if status==0: + I2C_ORDER=1 + else: + I2C_ORDER=0 + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + if I2C_ORDER==0: + nodelist = mknod + else: + nodelist = mknod2 + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_check() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_check() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_check()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'sfp_eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan'] ['fan1'][0] + node = node.replace(node.split("/")[-1], 'fan_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0076", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/classes/fanutil.py new file mode 100755 index 00000000000..9a69f6e1d53 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/classes/fanutil.py @@ -0,0 +1,254 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_NUM_ON_MAIN_BROAD = 6 + FAN_NUM_1_IDX = 1 + FAN_NUM_2_IDX = 2 + FAN_NUM_3_IDX = 3 + FAN_NUM_4_IDX = 4 + FAN_NUM_5_IDX = 5 + FAN_NUM_6_IDX = 6 + + FAN_NODE_NUM_OF_MAP = 2 + FAN_NODE_FAULT_IDX_OF_MAP = 1 + #FAN_NODE_SPEED_IDX_OF_MAP = 2 + FAN_NODE_DIR_IDX_OF_MAP = 2 + #FAN_NODE_DUTY_IDX_OF_MAP = 4 + #FANR_NODE_FAULT_IDX_OF_MAP = 5 + + #BASE_VAL_PATH = '/sys/devices/platform/as5712_54x_fan/{0}' + BASE_VAL_PATH = '/sys/bus/i2c/devices/9-0066/{0}' + FAN_DUTY_PATH = '/sys/bus/i2c/devices/9-0066/fan_duty_cycle_percentage' + + #logfile = '' + #loglevel = logging.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + _fan_to_device_path_mapping = {} + +#fan1_direction +#fan1_fault +#fan1_present + + #(FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage', + _fan_to_device_node_mapping = { + (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault', + (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction', + + (FAN_NUM_2_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan2_fault', + (FAN_NUM_2_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan2_direction', + + (FAN_NUM_3_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan3_fault', + (FAN_NUM_3_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan3_direction', + + (FAN_NUM_4_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan4_fault', + (FAN_NUM_4_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan4_direction', + + (FAN_NUM_5_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan5_fault', + (FAN_NUM_5_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan5_direction', + + (FAN_NUM_6_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan6_fault', + (FAN_NUM_6_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan6_direction', + } + + def _get_fan_to_device_node(self, fan_num, node_num): + return self._fan_to_device_node_mapping[(fan_num, node_num)] + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + + try: + val_file = open(device_path, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + def __init__(self): + fan_path = self.BASE_VAL_PATH + + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_NUM_ON_MAIN_BROAD+1): + for node_num in range(self.FAN_NODE_FAULT_IDX_OF_MAP, self.FAN_NODE_NUM_OF_MAP+1): + self._fan_to_device_path_mapping[(fan_num, node_num)] = fan_path.format( + self._fan_to_device_node_mapping[(fan_num, node_num)]) + + def get_num_fans(self): + return self.FAN_NUM_ON_MAIN_BROAD + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM_OF_MAP + + def get_idx_node_start(self): + return self.FAN_NODE_FAULT_IDX_OF_MAP + + def get_size_node_map(self): + return len(self._fan_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._fan_to_device_path_mapping) + + def get_fan_to_device_path(self, fan_num, node_num): + return self._fan_to_device_path_mapping[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_FAULT_IDX_OF_MAP) + + #def get_fan_speed(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FAN_NODE_SPEED_IDX_OF_MAP) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DIR_IDX_OF_MAP) + + def get_fan_duty_cycle(self): + #duty_path = self.FAN_DUTY_PATH + try: + val_file = open(self.FAN_DUTY_PATH) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + return int(content) + #self._get_fan_node_val(fan_num, self.FAN_NODE_DUTY_IDX_OF_MAP) +#static u32 reg_val_to_duty_cycle(u8 reg_val) +#{ +# reg_val &= FAN_DUTY_CYCLE_REG_MASK; +# return ((u32)(reg_val+1) * 625 + 75)/ 100; +#} +# + def set_fan_duty_cycle(self, val): + + try: + fan_file = open(self.FAN_DUTY_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + #val = ((val + 1 ) * 625 +75 ) / 100 + fan_file.write(str(val)) + fan_file.close() + return True + + #def get_fanr_fault(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FANR_NODE_FAULT_IDX_OF_MAP) + + def get_fanr_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP) + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num, %d', fan_num) + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + logging.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + #if self.get_fanr_fault(fan_num) is not None and self.get_fanr_fault(fan_num) > 0: + # logging.debug('GET. FANR fault. fan_num, %d', fan_num) + # return False + + return True + +#def main(): +# fan = FanUtil() +# +# print 'get_size_node_map : %d' % fan.get_size_node_map() +# print 'get_size_path_map : %d' % fan.get_size_path_map() +# for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): +# for y in range(fan.get_idx_node_start(), fan.get_num_nodes()+1): +# print fan.get_fan_to_device_path(x, y) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/classes/thermalutil.py new file mode 100755 index 00000000000..50d8c85d94c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/classes/thermalutil.py @@ -0,0 +1,123 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018:Jostar modify for as7716_32x +# ------------------------------------------------------------------ + +try: + import time + import logging + import glob + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + + THERMAL_NUM_ON_MAIN_BROAD = 3 + THERMAL_NUM_1_IDX = 1 # 1_ON_MAIN_BROAD + THERMAL_NUM_2_IDX = 2 # 2_ON_MAIN_BROAD + THERMAL_NUM_3_IDX = 3 # 3_ON_MAIN_BROAD + + BASE_VAL_PATH = '/sys/bus/i2c/devices/{0}-00{1}/hwmon/hwmon*/temp1_input' + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + _thermal_to_device_path_mapping = {} + + _thermal_to_device_node_mapping = { + THERMAL_NUM_1_IDX: ['10', '48'], + THERMAL_NUM_2_IDX: ['10', '49'], + THERMAL_NUM_3_IDX: ['10', '4a'], + } + + def __init__(self): + thermal_path = self.BASE_VAL_PATH + + for x in range(self.THERMAL_NUM_1_IDX, self.THERMAL_NUM_ON_MAIN_BROAD+1): + self._thermal_to_device_path_mapping[x] = thermal_path.format( + self._thermal_to_device_node_mapping[x][0], + self._thermal_to_device_node_mapping[x][1]) + + def _get_thermal_node_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_to_device_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + + def get_num_thermals(self): + return self.THERMAL_NUM_ON_MAIN_BROAD + + def get_idx_thermal_start(self): + return self.THERMAL_NUM_1_IDX + + def get_size_node_map(self): + return len(self._thermal_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._thermal_to_device_path_mapping) + + def get_thermal_to_device_path(self, thermal_num): + return self._thermal_to_device_path_mapping[thermal_num] + + def get_thermal_1_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + + def get_thermal_2_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) + def get_thermal_temp(self): + return (self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) +self._get_thermal_node_val(self.THERMAL_NUM_3_IDX)) + +#def main(): +# thermal = ThermalUtil() +# +# print 'get_size_node_map : %d' % thermal.get_size_node_map() +# print 'get_size_path_map : %d' % thermal.get_size_path_map() +# for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): +# print thermal.get_thermal_to_device_path(x) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/Makefile new file mode 100755 index 00000000000..6cdbdd81ac1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/Makefile @@ -0,0 +1,21 @@ +ifneq ($(KERNELRELEASE),) +obj-m:= accton_as7716_32x_cpld1.o accton_as7716_32x_fan.o \ + accton_as7716_32x_leds.o accton_as7716_32x_psu.o cpr_4011_4mxx.o ym2651y.o \ + accton_i2c_cpld.o + +else +ifeq (,$(KERNEL_SRC)) +#$(error KERNEL_SRC is not defined) +KVERSION := $(shell uname -r) +KERNEL_DIR = /usr/src/linux-headers-$(KVERSION)/ +KERNELDIR:=$(KERNEL_DIR) +#export KERNELDIR:=${PWD}/../../../../../src/sonic-linux-kernel/linux-3.16.43/ +else +KERNELDIR:=$(KERNEL_SRC) +endif +PWD:=$(shell pwd) +default: + $(MAKE) -C $(KERNELDIR) M=$(PWD) modules +clean: + rm -rf *.o *.mod.o *.mod.o *.ko .*cmd .tmp_versions Module.markers Module.symvers modules.order +endif diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_cpld1.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_cpld1.c new file mode 100755 index 00000000000..cbab013f586 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_cpld1.c @@ -0,0 +1,781 @@ +/* + * A hwmon driver for the as7716_32x_cpld + * + * Copyright (C) 2013 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +static ssize_t show_present(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t get_mode_reset(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); + +static int as7716_32x_cpld_read_internal(struct i2c_client *client, u8 reg); +static int as7716_32x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value); + +struct as7716_32x_cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; +}; + +/* Addresses scanned for as7716_32x_cpld + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index +#define TRANSCEIVER_RESET_ATTR_ID(index) MODULE_RESET_##index + +enum as7716_32x_cpld_sysfs_attributes { + CPLD_VERSION, + ACCESS, + MODULE_PRESENT_ALL, + /* transceiver attributes */ + TRANSCEIVER_PRESENT_ATTR_ID(1), + TRANSCEIVER_PRESENT_ATTR_ID(2), + TRANSCEIVER_PRESENT_ATTR_ID(3), + TRANSCEIVER_PRESENT_ATTR_ID(4), + TRANSCEIVER_PRESENT_ATTR_ID(5), + TRANSCEIVER_PRESENT_ATTR_ID(6), + TRANSCEIVER_PRESENT_ATTR_ID(7), + TRANSCEIVER_PRESENT_ATTR_ID(8), + TRANSCEIVER_PRESENT_ATTR_ID(9), + TRANSCEIVER_PRESENT_ATTR_ID(10), + TRANSCEIVER_PRESENT_ATTR_ID(11), + TRANSCEIVER_PRESENT_ATTR_ID(12), + TRANSCEIVER_PRESENT_ATTR_ID(13), + TRANSCEIVER_PRESENT_ATTR_ID(14), + TRANSCEIVER_PRESENT_ATTR_ID(15), + TRANSCEIVER_PRESENT_ATTR_ID(16), + TRANSCEIVER_PRESENT_ATTR_ID(17), + TRANSCEIVER_PRESENT_ATTR_ID(18), + TRANSCEIVER_PRESENT_ATTR_ID(19), + TRANSCEIVER_PRESENT_ATTR_ID(20), + TRANSCEIVER_PRESENT_ATTR_ID(21), + TRANSCEIVER_PRESENT_ATTR_ID(22), + TRANSCEIVER_PRESENT_ATTR_ID(23), + TRANSCEIVER_PRESENT_ATTR_ID(24), + TRANSCEIVER_PRESENT_ATTR_ID(25), + TRANSCEIVER_PRESENT_ATTR_ID(26), + TRANSCEIVER_PRESENT_ATTR_ID(27), + TRANSCEIVER_PRESENT_ATTR_ID(28), + TRANSCEIVER_PRESENT_ATTR_ID(29), + TRANSCEIVER_PRESENT_ATTR_ID(30), + TRANSCEIVER_PRESENT_ATTR_ID(31), + TRANSCEIVER_PRESENT_ATTR_ID(32), + TRANSCEIVER_RESET_ATTR_ID(1), + TRANSCEIVER_RESET_ATTR_ID(2), + TRANSCEIVER_RESET_ATTR_ID(3), + TRANSCEIVER_RESET_ATTR_ID(4), + TRANSCEIVER_RESET_ATTR_ID(5), + TRANSCEIVER_RESET_ATTR_ID(6), + TRANSCEIVER_RESET_ATTR_ID(7), + TRANSCEIVER_RESET_ATTR_ID(8), + TRANSCEIVER_RESET_ATTR_ID(9), + TRANSCEIVER_RESET_ATTR_ID(10), + TRANSCEIVER_RESET_ATTR_ID(11), + TRANSCEIVER_RESET_ATTR_ID(12), + TRANSCEIVER_RESET_ATTR_ID(13), + TRANSCEIVER_RESET_ATTR_ID(14), + TRANSCEIVER_RESET_ATTR_ID(15), + TRANSCEIVER_RESET_ATTR_ID(16), + TRANSCEIVER_RESET_ATTR_ID(17), + TRANSCEIVER_RESET_ATTR_ID(18), + TRANSCEIVER_RESET_ATTR_ID(19), + TRANSCEIVER_RESET_ATTR_ID(20), + TRANSCEIVER_RESET_ATTR_ID(21), + TRANSCEIVER_RESET_ATTR_ID(22), + TRANSCEIVER_RESET_ATTR_ID(23), + TRANSCEIVER_RESET_ATTR_ID(24), + TRANSCEIVER_RESET_ATTR_ID(25), + TRANSCEIVER_RESET_ATTR_ID(26), + TRANSCEIVER_RESET_ATTR_ID(27), + TRANSCEIVER_RESET_ATTR_ID(28), + TRANSCEIVER_RESET_ATTR_ID(29), + TRANSCEIVER_RESET_ATTR_ID(30), + TRANSCEIVER_RESET_ATTR_ID(31), + TRANSCEIVER_RESET_ATTR_ID(32), +}; + +/* sysfs attributes for hwmon + */ + +/* transceiver attributes */ +/*present*/ +#define DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_present, NULL, MODULE_PRESENT_##index) +#define DECLARE_TRANSCEIVER_ATTR(index) &sensor_dev_attr_module_present_##index.dev_attr.attr + +/*reset*/ +#define DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_reset_##index, S_IWUSR | S_IRUGO, get_mode_reset, set_mode_reset, MODULE_RESET_##index) +#define DECLARE_TRANSCEIVER_RESET_ATTR(index) &sensor_dev_attr_module_reset_##index.dev_attr.attr + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS); +/* transceiver attributes */ +static SENSOR_DEVICE_ATTR(module_present_all, S_IRUGO, show_present_all, NULL, MODULE_PRESENT_ALL); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(1); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(2); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(3); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(4); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(5); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(6); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(7); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(8); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(9); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(10); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(11); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(12); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(13); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(14); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(15); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(16); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(17); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(18); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(19); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(20); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(21); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(22); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(23); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(24); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(25); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(26); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(27); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(28); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(29); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(30); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(31); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(32); + +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(1); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(2); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(3); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(4); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(5); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(6); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(7); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(8); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(9); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(10); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(11); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(12); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(13); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(14); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(15); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(16); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(17); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(18); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(19); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(20); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(21); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(22); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(23); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(24); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(25); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(26); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(27); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(28); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(29); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(30); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(31); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(32); + + +static struct attribute *as7716_32x_cpld_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + DECLARE_TRANSCEIVER_ATTR(1), + DECLARE_TRANSCEIVER_ATTR(2), + DECLARE_TRANSCEIVER_ATTR(3), + DECLARE_TRANSCEIVER_ATTR(4), + DECLARE_TRANSCEIVER_ATTR(5), + DECLARE_TRANSCEIVER_ATTR(6), + DECLARE_TRANSCEIVER_ATTR(7), + DECLARE_TRANSCEIVER_ATTR(8), + DECLARE_TRANSCEIVER_ATTR(9), + DECLARE_TRANSCEIVER_ATTR(10), + DECLARE_TRANSCEIVER_ATTR(11), + DECLARE_TRANSCEIVER_ATTR(12), + DECLARE_TRANSCEIVER_ATTR(13), + DECLARE_TRANSCEIVER_ATTR(14), + DECLARE_TRANSCEIVER_ATTR(15), + DECLARE_TRANSCEIVER_ATTR(16), + DECLARE_TRANSCEIVER_ATTR(17), + DECLARE_TRANSCEIVER_ATTR(18), + DECLARE_TRANSCEIVER_ATTR(19), + DECLARE_TRANSCEIVER_ATTR(20), + DECLARE_TRANSCEIVER_ATTR(21), + DECLARE_TRANSCEIVER_ATTR(22), + DECLARE_TRANSCEIVER_ATTR(23), + DECLARE_TRANSCEIVER_ATTR(24), + DECLARE_TRANSCEIVER_ATTR(25), + DECLARE_TRANSCEIVER_ATTR(26), + DECLARE_TRANSCEIVER_ATTR(27), + DECLARE_TRANSCEIVER_ATTR(28), + DECLARE_TRANSCEIVER_ATTR(29), + DECLARE_TRANSCEIVER_ATTR(30), + DECLARE_TRANSCEIVER_ATTR(31), + DECLARE_TRANSCEIVER_ATTR(32), + DECLARE_TRANSCEIVER_RESET_ATTR(1), + DECLARE_TRANSCEIVER_RESET_ATTR(2), + DECLARE_TRANSCEIVER_RESET_ATTR(3), + DECLARE_TRANSCEIVER_RESET_ATTR(4), + DECLARE_TRANSCEIVER_RESET_ATTR(5), + DECLARE_TRANSCEIVER_RESET_ATTR(6), + DECLARE_TRANSCEIVER_RESET_ATTR(7), + DECLARE_TRANSCEIVER_RESET_ATTR(8), + DECLARE_TRANSCEIVER_RESET_ATTR(9), + DECLARE_TRANSCEIVER_RESET_ATTR(10), + DECLARE_TRANSCEIVER_RESET_ATTR(11), + DECLARE_TRANSCEIVER_RESET_ATTR(12), + DECLARE_TRANSCEIVER_RESET_ATTR(13), + DECLARE_TRANSCEIVER_RESET_ATTR(14), + DECLARE_TRANSCEIVER_RESET_ATTR(15), + DECLARE_TRANSCEIVER_RESET_ATTR(16), + DECLARE_TRANSCEIVER_RESET_ATTR(17), + DECLARE_TRANSCEIVER_RESET_ATTR(18), + DECLARE_TRANSCEIVER_RESET_ATTR(19), + DECLARE_TRANSCEIVER_RESET_ATTR(20), + DECLARE_TRANSCEIVER_RESET_ATTR(21), + DECLARE_TRANSCEIVER_RESET_ATTR(22), + DECLARE_TRANSCEIVER_RESET_ATTR(23), + DECLARE_TRANSCEIVER_RESET_ATTR(24), + DECLARE_TRANSCEIVER_RESET_ATTR(25), + DECLARE_TRANSCEIVER_RESET_ATTR(26), + DECLARE_TRANSCEIVER_RESET_ATTR(27), + DECLARE_TRANSCEIVER_RESET_ATTR(28), + DECLARE_TRANSCEIVER_RESET_ATTR(29), + DECLARE_TRANSCEIVER_RESET_ATTR(30), + DECLARE_TRANSCEIVER_RESET_ATTR(31), + DECLARE_TRANSCEIVER_RESET_ATTR(32), + NULL +}; + +static const struct attribute_group as7716_32x_cpld_group = { + .attrs = as7716_32x_cpld_attributes, +}; + +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u8 values[4] = {0}; + u8 regs[] = {0x30, 0x31, 0x32, 0x33}; + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32x_cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = as7716_32x_cpld_read_internal(client, regs[i]); + + if (status < 0) { + goto exit; + } + + values[i] = ~(u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values 1 -> 32 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], + values[3]); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32x_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0; + + switch (attr->index) { + case MODULE_PRESENT_1 ... MODULE_PRESENT_8: + reg = 0x30; + mask = 0x1 << (attr->index - MODULE_PRESENT_1); + break; + case MODULE_PRESENT_9 ... MODULE_PRESENT_16: + reg = 0x31; + mask = 0x1 << (attr->index - MODULE_PRESENT_9); + break; + case MODULE_PRESENT_17 ... MODULE_PRESENT_24: + reg = 0x32; + mask = 0x1 << (attr->index - MODULE_PRESENT_17); + break; + case MODULE_PRESENT_25 ... MODULE_PRESENT_32: + reg = 0x33; + mask = 0x1 << (attr->index - MODULE_PRESENT_25); + break; + default: + return 0; + } + + + mutex_lock(&data->update_lock); + status = as7716_32x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", !(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 reg = 0, mask = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32x_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + + switch (attr->index) { + case CPLD_VERSION: + reg = 0x1; + mask = 0xFF; + break; + default: + break; + } + + mutex_lock(&data->update_lock); + status = as7716_32x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return sprintf(buf, "%d\n", (status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32x_cpld_data *data = i2c_get_clientdata(client); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = as7716_32x_cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static int as7716_32x_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int as7716_32x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static void as7716_32x_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as7716_32x_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int as7716_32x_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct as7716_32x_cpld_data *data = NULL; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7716_32x_cpld_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7716_32x_cpld_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + as7716_32x_cpld_add_client(client); + + dev_info(&client->dev, "%s: cpld '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7716_32x_cpld_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7716_32x_cpld_remove(struct i2c_client *client) +{ + struct as7716_32x_cpld_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7716_32x_cpld_group); + kfree(data); + as7716_32x_cpld_remove_client(client); + + return 0; +} + +int as7716_32x_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_read_byte_data(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as7716_32x_cpld_read); + +int as7716_32x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_write_byte_data(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as7716_32x_cpld_write); + +static ssize_t get_mode_reset(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32x_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0; + + switch (attr->index) { + case MODULE_RESET_1 ... MODULE_RESET_8: + reg = 0x04; + mask = 0x1 << (attr->index - MODULE_RESET_1); + break; + case MODULE_RESET_9 ... MODULE_RESET_16: + reg = 0x05; + mask = 0x1 << (attr->index - MODULE_RESET_9); + break; + case MODULE_RESET_17 ... MODULE_RESET_24: + reg = 0x06; + mask = 0x1 << (attr->index - MODULE_RESET_17); + break; + case MODULE_RESET_25 ... MODULE_RESET_32: + reg = 0x07; + mask = 0x1 << (attr->index - MODULE_RESET_25); + break; + default: + return 0; + } + + + mutex_lock(&data->update_lock); + status = as7716_32x_cpld_read_internal(client, reg); + + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\r\n", !(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32x_cpld_data *data = i2c_get_clientdata(client); + long reset; + int status=0, val, error; + u8 reg = 0, mask = 0; + + + error = kstrtol(buf, 10, &reset); + if (error) { + return error; + } + + switch (attr->index) { + case MODULE_RESET_1 ... MODULE_RESET_8: + reg = 0x04; + mask = 0x1 << (attr->index - MODULE_RESET_1); + break; + case MODULE_RESET_9 ... MODULE_RESET_16: + reg = 0x05; + mask = 0x1 << (attr->index - MODULE_RESET_9); + break; + case MODULE_RESET_17 ... MODULE_RESET_24: + reg = 0x06; + mask = 0x1 << (attr->index - MODULE_RESET_17); + break; + case MODULE_RESET_25 ... MODULE_RESET_32: + reg = 0x07; + mask = 0x1 << (attr->index - MODULE_RESET_25); + break; + default: + return 0; + } + mutex_lock(&data->update_lock); + + status = as7716_32x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update lp_mode status */ + if (reset) + { + val = status&(~mask); + } + else + { + val =status | (mask); + } + + status = as7716_32x_cpld_write_internal(client, reg, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + + + +static const struct i2c_device_id as7716_32x_cpld_id[] = { + { "as7716_32x_cpld1", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7716_32x_cpld_id); + +static struct i2c_driver as7716_32x_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7716_32x_cpld1", + }, + .probe = as7716_32x_cpld_probe, + .remove = as7716_32x_cpld_remove, + .id_table = as7716_32x_cpld_id, + .address_list = normal_i2c, +}; + +static int __init as7716_32x_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as7716_32x_cpld_driver); +} + +static void __exit as7716_32x_cpld_exit(void) +{ + i2c_del_driver(&as7716_32x_cpld_driver); +} + +module_init(as7716_32x_cpld_init); +module_exit(as7716_32x_cpld_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7716_32x_cpld driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_fan.c new file mode 100644 index 00000000000..3a0610fe370 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_fan.c @@ -0,0 +1,535 @@ +/* + * A hwmon driver for the Accton as7716 32x fan + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as7716_32x_fan" + +#define IN +#define OUT + +static struct as7716_32x_fan_data *as7716_32x_fan_update_device(struct device *dev); +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_enable(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); + +/* fan related data, the index should match sysfs_fan_attributes + */ +static const u8 fan_reg[] = { + 0x0F, /* fan 1-6 present status */ + 0x10, /* fan 1-6 direction(0:B2F 1:F2B) */ + 0x11, /* fan PWM(for all fan) */ + 0x12, /* front fan 1 speed(rpm) */ + 0x13, /* front fan 2 speed(rpm) */ + 0x14, /* front fan 3 speed(rpm) */ + 0x15, /* front fan 4 speed(rpm) */ + 0x16, /* front fan 5 speed(rpm) */ + 0x17, /* front fan 6 speed(rpm) */ + 0x22, /* rear fan 1 speed(rpm) */ + 0x23, /* rear fan 2 speed(rpm) */ + 0x24, /* rear fan 3 speed(rpm) */ + 0x25, /* rear fan 4 speed(rpm) */ + 0x26, /* rear fan 5 speed(rpm) */ + 0x27, /* rear fan 6 speed(rpm) */ +}; + +/* Each client has this additional data */ +struct as7716_32x_fan_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ + u8 enable; +}; + +enum fan_id { + FAN1_ID, + FAN2_ID, + FAN3_ID, + FAN4_ID, + FAN5_ID, + FAN6_ID +}; + +enum sysfs_fan_attributes { + FAN_PRESENT_REG, + FAN_DIRECTION_REG, + FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ + FAN1_FRONT_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN5_FRONT_SPEED_RPM, + FAN6_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN5_REAR_SPEED_RPM, + FAN6_REAR_SPEED_RPM, + FAN1_DIRECTION, + FAN2_DIRECTION, + FAN3_DIRECTION, + FAN4_DIRECTION, + FAN5_DIRECTION, + FAN6_DIRECTION, + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN5_PRESENT, + FAN6_PRESENT, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + FAN5_FAULT, + FAN6_FAULT +}; + +/* Define attributes + */ +#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT);\ + static SENSOR_DEVICE_ATTR(fan##index2##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT) +#define DECLARE_FAN_FAULT_ATTR(index, index2) &sensor_dev_attr_fan##index##_fault.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_fault.dev_attr.attr + +#define DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_direction, S_IRUGO, fan_show_value, NULL, FAN##index##_DIRECTION) +#define DECLARE_FAN_DIRECTION_ATTR(index) &sensor_dev_attr_fan##index##_direction.dev_attr.attr + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE);\ + static SENSOR_DEVICE_ATTR(pwm##index, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE);\ + static SENSOR_DEVICE_ATTR(pwm##index##_enable, S_IWUSR | S_IRUGO, get_enable, set_enable, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan_duty_cycle_percentage.dev_attr.attr, \ + &sensor_dev_attr_pwm##index.dev_attr.attr, \ + &sensor_dev_attr_pwm##index##_enable.dev_attr.attr + +#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_present, S_IRUGO, fan_show_value, NULL, FAN##index##_PRESENT) +#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr + +#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index2##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM) +#define DECLARE_FAN_SPEED_RPM_ATTR(index, index2) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_input.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_input.dev_attr.attr + +/* 6 fan fault attributes in this platform */ +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(6,16); +/* 6 fan speed(rpm) attributes in this platform */ +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(6,16); +/* 6 fan present attributes in this platform */ +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(5); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(6); + +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(1); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(2); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(3); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(4); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(5); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(6); + +/* 1 fan duty cycle attribute in this platform */ +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(1); + +static struct attribute *as7716_32x_fan_attributes[] = { + /* fan related attributes */ + DECLARE_FAN_FAULT_ATTR(1,11), + DECLARE_FAN_FAULT_ATTR(2,12), + DECLARE_FAN_FAULT_ATTR(3,13), + DECLARE_FAN_FAULT_ATTR(4,14), + DECLARE_FAN_FAULT_ATTR(5,15), + DECLARE_FAN_FAULT_ATTR(6,16), + DECLARE_FAN_SPEED_RPM_ATTR(1,11), + DECLARE_FAN_SPEED_RPM_ATTR(2,12), + DECLARE_FAN_SPEED_RPM_ATTR(3,13), + DECLARE_FAN_SPEED_RPM_ATTR(4,14), + DECLARE_FAN_SPEED_RPM_ATTR(5,15), + DECLARE_FAN_SPEED_RPM_ATTR(6,16), + DECLARE_FAN_PRESENT_ATTR(1), + DECLARE_FAN_PRESENT_ATTR(2), + DECLARE_FAN_PRESENT_ATTR(3), + DECLARE_FAN_PRESENT_ATTR(4), + DECLARE_FAN_PRESENT_ATTR(5), + DECLARE_FAN_PRESENT_ATTR(6), + DECLARE_FAN_DIRECTION_ATTR(1), + DECLARE_FAN_DIRECTION_ATTR(2), + DECLARE_FAN_DIRECTION_ATTR(3), + DECLARE_FAN_DIRECTION_ATTR(4), + DECLARE_FAN_DIRECTION_ATTR(5), + DECLARE_FAN_DIRECTION_ATTR(6), + DECLARE_FAN_DUTY_CYCLE_ATTR(1), + NULL +}; + +#define FAN_DUTY_CYCLE_REG_MASK 0xF +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 100 + +static int as7716_32x_fan_read_value(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int as7716_32x_fan_write_value(struct i2c_client *client, u8 reg, u8 value) +{ + return i2c_smbus_write_byte_data(client, reg, value); +} + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + reg_val &= FAN_DUTY_CYCLE_REG_MASK; + return ((u32)(reg_val+1) * 625 + 75)/ 100; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + return ((u32)duty_cycle * 100 / 625) - 1; +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static u8 reg_val_to_direction(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 1 : 0; +} +static u8 reg_val_to_is_present(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 0 : 1; +} + +static u8 is_fan_fault(struct as7716_32x_fan_data *data, enum fan_id id) +{ + u8 ret = 1; + int front_fan_index = FAN1_FRONT_SPEED_RPM + id; + int rear_fan_index = FAN1_REAR_SPEED_RPM + id; + + /* Check if the speed of front or rear fan is ZERO, + */ + if (reg_val_to_speed_rpm(data->reg_val[front_fan_index]) && + reg_val_to_speed_rpm(data->reg_val[rear_fan_index])) { + ret = 0; + } + + return ret; +} + +static ssize_t set_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct as7716_32x_fan_data *data = as7716_32x_fan_update_device(dev); + int error, value; + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0 || value > 1) + return -EINVAL; + + data->enable = value; + if (value == 0) + { + return set_duty_cycle(dev, da, buf, FAN_MAX_DUTY_CYCLE); + } + return count; +} + + +static ssize_t get_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as7716_32x_fan_data *data = as7716_32x_fan_update_device(dev); + + return sprintf(buf, "%u\n", data->enable); +} + +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + struct i2c_client *client = to_i2c_client(dev); + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0 || value > FAN_MAX_DUTY_CYCLE) + return -EINVAL; + + as7716_32x_fan_write_value(client, 0x33, 0); /* Disable fan speed watch dog */ + as7716_32x_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); + return count; +} + +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7716_32x_fan_data *data = as7716_32x_fan_update_device(dev); + ssize_t ret = 0; + + if (data->valid) { + switch (attr->index) { + case FAN_DUTY_CYCLE_PERCENTAGE: + { + u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); + ret = sprintf(buf, "%u\n", duty_cycle); + break; + } + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN5_FRONT_SPEED_RPM: + case FAN6_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: + case FAN6_REAR_SPEED_RPM: + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index])); + break; + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + case FAN6_PRESENT: + ret = sprintf(buf, "%d\n", + reg_val_to_is_present(data->reg_val[FAN_PRESENT_REG], + attr->index - FAN1_PRESENT)); + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + case FAN6_FAULT: + ret = sprintf(buf, "%d\n", is_fan_fault(data, attr->index - FAN1_FAULT)); + break; + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + case FAN5_DIRECTION: + case FAN6_DIRECTION: + ret = sprintf(buf, "%d\n", + reg_val_to_direction(data->reg_val[FAN_DIRECTION_REG], + attr->index - FAN1_DIRECTION)); + break; + default: + break; + } + } + + return ret; +} + +static const struct attribute_group as7716_32x_fan_group = { + .attrs = as7716_32x_fan_attributes, +}; + +static struct as7716_32x_fan_data *as7716_32x_fan_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32x_fan_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + dev_dbg(&client->dev, "Starting as7716_32x_fan update\n"); + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { + int status = as7716_32x_fan_read_value(client, fan_reg[i]); + + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + dev_dbg(&client->dev, "reg %d, err %d\n", fan_reg[i], status); + return data; + } + else { + data->reg_val[i] = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int as7716_32x_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7716_32x_fan_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7716_32x_fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7716_32x_fan_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7716_32x_fan_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7716_32x_fan_remove(struct i2c_client *client) +{ + struct as7716_32x_fan_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7716_32x_fan_group); + + return 0; +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x66, I2C_CLIENT_END }; + +static const struct i2c_device_id as7716_32x_fan_id[] = { + { "as7716_32x_fan", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7716_32x_fan_id); + +static struct i2c_driver as7716_32x_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = as7716_32x_fan_probe, + .remove = as7716_32x_fan_remove, + .id_table = as7716_32x_fan_id, + .address_list = normal_i2c, +}; + +static int __init as7716_32x_fan_init(void) +{ + return i2c_add_driver(&as7716_32x_fan_driver); +} + +static void __exit as7716_32x_fan_exit(void) +{ + i2c_del_driver(&as7716_32x_fan_driver); +} + +module_init(as7716_32x_fan_init); +module_exit(as7716_32x_fan_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7716_32x_fan driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_leds.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_leds.c new file mode 100755 index 00000000000..da3d9442035 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_leds.c @@ -0,0 +1,442 @@ +/* + * A LED driver for the as7716_32x_led + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +extern int as7716_32x_cpld_read (unsigned short cpld_addr, u8 reg); +extern int as7716_32x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern void led_classdev_unregister(struct led_classdev *led_cdev); +extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); +extern void led_classdev_resume(struct led_classdev *led_cdev); +extern void led_classdev_suspend(struct led_classdev *led_cdev); + +#define DRVNAME "as7716_32x_led" + +struct as7716_32x_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[1]; /* only 1 register*/ +}; + +static struct as7716_32x_led_data *ledctl = NULL; + +/* LED related data + */ + +#define LED_CNTRLER_I2C_ADDRESS (0x60) + +#define LED_TYPE_DIAG_REG_MASK (0x3) +#define LED_MODE_DIAG_GREEN_VALUE (0x02) +#define LED_MODE_DIAG_RED_VALUE (0x01) +#define LED_MODE_DIAG_AMBER_VALUE (0x00) /*It's yellow actually. Green+Red=Yellow*/ +#define LED_MODE_DIAG_OFF_VALUE (0x03) + + +#define LED_TYPE_LOC_REG_MASK (0x80) +#define LED_MODE_LOC_ON_VALUE (0) +#define LED_MODE_LOC_OFF_VALUE (0x80) + +enum led_type { + LED_TYPE_DIAG, + LED_TYPE_LOC, + LED_TYPE_FAN, + LED_TYPE_PSU1, + LED_TYPE_PSU2 +}; + +struct led_reg { + u32 types; + u8 reg_addr; +}; + +static const struct led_reg led_reg_map[] = { + {(1<update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting as7716_32x_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = as7716_32x_led_read_value(led_reg_map[i].reg_addr); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg_map[i].reg_addr, status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void as7716_32x_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + enum led_type type) +{ + int reg_val; + u8 reg ; + mutex_lock(&ledctl->update_lock); + + if( !getLedReg(type, ®)) + { + dev_dbg(&ledctl->pdev->dev, "Not match item for %d.\n", type); + } + + reg_val = as7716_32x_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + as7716_32x_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + + +static void as7716_32x_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + as7716_32x_led_set(led_cdev, led_light_mode, LED_TYPE_DIAG); +} + +static enum led_brightness as7716_32x_led_diag_get(struct led_classdev *cdev) +{ + as7716_32x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void as7716_32x_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + as7716_32x_led_set(led_cdev, led_light_mode, LED_TYPE_LOC); +} + +static enum led_brightness as7716_32x_led_loc_get(struct led_classdev *cdev) +{ + as7716_32x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static void as7716_32x_led_auto_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ +} + +static enum led_brightness as7716_32x_led_auto_get(struct led_classdev *cdev) +{ + return LED_MODE_AUTO; +} + +static struct led_classdev as7716_32x_leds[] = { + [LED_TYPE_DIAG] = { + .name = "as7716_32x_led::diag", + .default_trigger = "unused", + .brightness_set = as7716_32x_led_diag_set, + .brightness_get = as7716_32x_led_diag_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_RED, + }, + [LED_TYPE_LOC] = { + .name = "as7716_32x_led::loc", + .default_trigger = "unused", + .brightness_set = as7716_32x_led_loc_set, + .brightness_get = as7716_32x_led_loc_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_BLUE, + }, + [LED_TYPE_FAN] = { + .name = "as7716_32x_led::fan", + .default_trigger = "unused", + .brightness_set = as7716_32x_led_auto_set, + .brightness_get = as7716_32x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU1] = { + .name = "as7716_32x_led::psu1", + .default_trigger = "unused", + .brightness_set = as7716_32x_led_auto_set, + .brightness_get = as7716_32x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "as7716_32x_led::psu2", + .default_trigger = "unused", + .brightness_set = as7716_32x_led_auto_set, + .brightness_get = as7716_32x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, +}; + +static int as7716_32x_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(as7716_32x_leds); i++) { + led_classdev_suspend(&as7716_32x_leds[i]); + } + + return 0; +} + +static int as7716_32x_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(as7716_32x_leds); i++) { + led_classdev_resume(&as7716_32x_leds[i]); + } + + return 0; +} + +static int as7716_32x_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(as7716_32x_leds); i++) { + ret = led_classdev_register(&pdev->dev, &as7716_32x_leds[i]); + + if (ret < 0) + { + break; + } + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(as7716_32x_leds)){ + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&as7716_32x_leds[i]); + } + } + + return 0; +} + +static int as7716_32x_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(as7716_32x_leds); i++) { + led_classdev_unregister(&as7716_32x_leds[i]); + } + + return 0; +} + +static struct platform_driver as7716_32x_led_driver = { + .probe = as7716_32x_led_probe, + .remove = as7716_32x_led_remove, + .suspend = as7716_32x_led_suspend, + .resume = as7716_32x_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init as7716_32x_led_init(void) +{ + int ret; + + + ret = platform_driver_register(&as7716_32x_led_driver); + if (ret < 0) { + + goto exit; + } + + ledctl = kzalloc(sizeof(struct as7716_32x_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&as7716_32x_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&as7716_32x_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return 0; +} + +static void __exit as7716_32x_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&as7716_32x_led_driver); + kfree(ledctl); +} + +module_init(as7716_32x_led_init); +module_exit(as7716_32x_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7716_32x_led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_psu.c new file mode 100755 index 00000000000..78a58b820b2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_psu.c @@ -0,0 +1,381 @@ +/* + * An hwmon driver for accton as7716_32x Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_MODEL_NAME 16 + +#define DC12V_FAN_DIR_OFFSET 0x34 +#define DC12V_FAN_DIR_LEN 3 + +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_string(struct device *dev, struct device_attribute *da, char *buf); +static int as7716_32x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as7716_32x_cpld_read (unsigned short cpld_addr, u8 reg); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as7716_32x_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[MAX_MODEL_NAME+1]; /* Model name, read from eeprom */ + char fan_dir[DC12V_FAN_DIR_LEN+1]; /* DC12V fan direction */ +}; + +static struct as7716_32x_psu_data *as7716_32x_psu_update_device(struct device *dev); + +enum as7716_32x_psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD, + PSU_FAN_DIR /* For DC12V only */ +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_string, NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu_fan_dir, S_IRUGO, show_string, NULL, PSU_FAN_DIR); + +static struct attribute *as7716_32x_psu_attributes[] = { + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + &sensor_dev_attr_psu_fan_dir.dev_attr.attr, + NULL +}; + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7716_32x_psu_data *data = as7716_32x_psu_update_device(dev); + u8 status = 0; + + if (!data->valid) { + return -EIO; + } + + if (attr->index == PSU_PRESENT) { + status = !(data->status >> (1-data->index) & 0x1); + } + else { /* PSU_POWER_GOOD */ + status = (data->status >> (3-data->index) & 0x1); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_string(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7716_32x_psu_data *data = as7716_32x_psu_update_device(dev); + char *ptr = NULL; + + if (!data->valid) { + return -EIO; + } + + if (attr->index == PSU_MODEL_NAME) { + ptr = data->model_name; + } + else { /* PSU_FAN_DIR */ + ptr = data->fan_dir; + } + + return sprintf(buf, "%s\n", ptr); +} + +static const struct attribute_group as7716_32x_psu_group = { + .attrs = as7716_32x_psu_attributes, +}; + +static int as7716_32x_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7716_32x_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7716_32x_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7716_32x_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7716_32x_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7716_32x_psu_remove(struct i2c_client *client) +{ + struct as7716_32x_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7716_32x_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as7716_32x_psu1, + as7716_32x_psu2 +}; + +static const struct i2c_device_id as7716_32x_psu_id[] = { + { "as7716_32x_psu1", as7716_32x_psu1 }, + { "as7716_32x_psu2", as7716_32x_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7716_32x_psu_id); + +static struct i2c_driver as7716_32x_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7716_32x_psu", + }, + .probe = as7716_32x_psu_probe, + .remove = as7716_32x_psu_remove, + .id_table = as7716_32x_psu_id, + .address_list = normal_i2c, +}; + +static int as7716_32x_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = 0; + int retry_count = 5; + + while (retry_count) { + retry_count--; + + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) { + msleep(10); + continue; + } + + if (unlikely(result != data_len)) { + result = -EIO; + msleep(10); + continue; + } + + result = 0; + break; + } + + return result; +} + +enum psu_type { + PSU_TYPE_AC_110V, + PSU_TYPE_DC_48V, + PSU_TYPE_DC_12V +}; + +struct model_name_info { + enum psu_type type; + u8 offset; + u8 length; + char* model_name; +}; + +struct model_name_info models[] = { +{PSU_TYPE_AC_110V, 0x20, 8, "YM-2651Y"}, +{PSU_TYPE_DC_48V, 0x20, 8, "YM-2651V"}, +{PSU_TYPE_DC_12V, 0x00, 11, "PSU-12V-750"}, +}; + +static int as7716_32x_psu_model_name_get(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32x_psu_data *data = i2c_get_clientdata(client); + int i, status; + + for (i = 0; i < ARRAY_SIZE(models); i++) { + memset(data->model_name, 0, sizeof(data->model_name)); + + status = as7716_32x_psu_read_block(client, models[i].offset, + data->model_name, models[i].length); + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x) offset(0x%x)\n", + client->addr, models[i].offset); + return status; + } + else { + data->model_name[models[i].length] = '\0'; + } + + /* Determine if the model name is known, if not, read next index + */ + if (strncmp(data->model_name, models[i].model_name, models[i].length) == 0) { + return 0; + } + else { + data->model_name[0] = '\0'; + } + } + + return -ENODATA; +} + +static struct as7716_32x_psu_data *as7716_32x_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32x_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status; + int power_good = 0; + + data->valid = 0; + dev_dbg(&client->dev, "Starting as7716_32x update\n"); + + /* Read psu status */ + status = as7716_32x_cpld_read(0x60, 0x2); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg 0x60 err %d\n", status); + goto exit; + } + else { + data->status = status; + } + + /* Read model name */ + memset(data->model_name, 0, sizeof(data->model_name)); + memset(data->fan_dir, 0, sizeof(data->fan_dir)); + power_good = (data->status >> (3-data->index) & 0x1); + + if (power_good) { + if (as7716_32x_psu_model_name_get(dev) < 0) { + goto exit; + } + + if (strncmp(data->model_name, + models[PSU_TYPE_DC_12V].model_name, + models[PSU_TYPE_DC_12V].length) == 0) + { + /* Read fan direction */ + + status = as7716_32x_psu_read_block(client, DC12V_FAN_DIR_OFFSET, + data->fan_dir, DC12V_FAN_DIR_LEN); + + if (status < 0) { + data->fan_dir[0] = '\0'; + dev_dbg(&client->dev, "unable to read fan direction from (0x%x) offset(0x%x)\n", + client->addr, DC12V_FAN_DIR_OFFSET); + goto exit; + } + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init as7716_32x_psu_init(void) +{ + return i2c_add_driver(&as7716_32x_psu_driver); +} + +static void __exit as7716_32x_psu_exit(void) +{ + i2c_del_driver(&as7716_32x_psu_driver); +} + +module_init(as7716_32x_psu_init); +module_exit(as7716_32x_psu_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7716_32x_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_sfp.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_sfp.c new file mode 100755 index 00000000000..9c7a0563215 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_sfp.c @@ -0,0 +1,365 @@ +/* + * An hwmon driver for accton as7716_32x sfp + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BIT_INDEX(i) (1UL << (i)) +#define I2C_ADDR_CPLD1 0x60 +#define I2C_ADDR_CPLD2 0x62 +#define I2C_ADDR_CPLD3 0x64 +#define CPLD1_OFFSET_QSFP_PRESET1 0x30 +#define CPLD1_OFFSET_QSFP_PRESET2 0x31 +#define CPLD1_OFFSET_QSFP_PRESET3 0x32 +#define CPLD1_OFFSET_QSFP_PRESET4 0x33 + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x50, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as7716_32x_sfp_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + int port; /* Front port index */ + char eeprom[256]; /* eeprom data */ + u32 is_present; /* present status */ +}; + +static struct as7716_32x_sfp_data *as7716_32x_sfp_update_device(struct device *dev); +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_present(struct device *dev, struct device_attribute *da,char *buf); +static ssize_t show_eeprom(struct device *dev, struct device_attribute *da, char *buf); +extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +enum as7716_32x_sfp_sysfs_attributes { + SFP_PORT_NUMBER, + SFP_IS_PRESENT, + SFP_IS_PRESENT_ALL, + SFP_EEPROM +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(sfp_port_number, S_IRUGO, show_port_number, NULL, SFP_PORT_NUMBER); +static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, show_present, NULL, SFP_IS_PRESENT); +static SENSOR_DEVICE_ATTR(sfp_is_present_all, S_IRUGO, show_present, NULL, SFP_IS_PRESENT_ALL); +static SENSOR_DEVICE_ATTR(sfp_eeprom, S_IRUGO, show_eeprom, NULL, SFP_EEPROM); + +static struct attribute *as7716_32x_sfp_attributes[] = { + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, + &sensor_dev_attr_sfp_eeprom.dev_attr.attr, + NULL +}; + +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32x_sfp_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->port+1); +} + +/* Error-check the CPLD read results. */ +#define VALIDATED_READ(_buf, _rv, _read_expr, _invert) \ +do { \ + _rv = (_read_expr); \ + if(_rv < 0) { \ + return sprintf(_buf, "READ ERROR\n"); \ + } \ + if(_invert) { \ + _rv = ~_rv; \ + } \ + _rv &= 0xFF; \ +} while(0) + +static ssize_t show_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if(attr->index == SFP_IS_PRESENT_ALL) { + int values[4]; + /* + * Report the SFP_PRESENCE status for all ports. + */ + + /* QSFP_PRESENT Ports 1-8 */ + //VALIDATED_READ(buf, values[0], accton_i2c_cpld_read(0x62, 0x9), 1); + VALIDATED_READ(buf, values[0], accton_i2c_cpld_read(I2C_ADDR_CPLD1, CPLD1_OFFSET_QSFP_PRESET1), 1); + /* QSFP_PRESENT Ports 9-16 */ + VALIDATED_READ(buf, values[1], accton_i2c_cpld_read(I2C_ADDR_CPLD1, CPLD1_OFFSET_QSFP_PRESET2), 1); + /* QSFP_PRESENT Ports 17-24 */ + VALIDATED_READ(buf, values[2], accton_i2c_cpld_read(I2C_ADDR_CPLD1, CPLD1_OFFSET_QSFP_PRESET3), 1); + /* QSFP_PRESENT Ports 25-32 */ + VALIDATED_READ(buf, values[3], accton_i2c_cpld_read(I2C_ADDR_CPLD1, CPLD1_OFFSET_QSFP_PRESET4), 1); + + /* Return values 1 -> 32 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], values[3]); + } + else { /* SFP_IS_PRESENT */ + struct as7716_32x_sfp_data *data = as7716_32x_sfp_update_device(dev); + + if (!data->valid) { + printk("return -EIO\n"); + return -EIO; + } + + return sprintf(buf, "%d\n", data->is_present); + } +} + +static ssize_t show_eeprom(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as7716_32x_sfp_data *data = as7716_32x_sfp_update_device(dev); + + if (!data->valid) { + return 0; + } + + if (!data->is_present) { + return 0; + } + + memcpy(buf, data->eeprom, sizeof(data->eeprom)); + + return sizeof(data->eeprom); +} + +static const struct attribute_group as7716_32x_sfp_group = { + .attrs = as7716_32x_sfp_attributes, +}; + +static int as7716_32x_sfp_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7716_32x_sfp_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7716_32x_sfp_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + mutex_init(&data->update_lock); + data->port = dev_id->driver_data; + i2c_set_clientdata(client, data); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7716_32x_sfp_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sfp '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7716_32x_sfp_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7716_32x_sfp_remove(struct i2c_client *client) +{ + struct as7716_32x_sfp_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7716_32x_sfp_group); + kfree(data); + + return 0; +} + +enum port_numbers { +as7716_32x_sfp1, as7716_32x_sfp2, as7716_32x_sfp3, as7716_32x_sfp4, +as7716_32x_sfp5, as7716_32x_sfp6, as7716_32x_sfp7, as7716_32x_sfp8, +as7716_32x_sfp9, as7716_32x_sfp10,as7716_32x_sfp11,as7716_32x_sfp12, +as7716_32x_sfp13,as7716_32x_sfp14,as7716_32x_sfp15,as7716_32x_sfp16, +as7716_32x_sfp17,as7716_32x_sfp18,as7716_32x_sfp19,as7716_32x_sfp20, +as7716_32x_sfp21,as7716_32x_sfp22,as7716_32x_sfp23,as7716_32x_sfp24, +as7716_32x_sfp25,as7716_32x_sfp26,as7716_32x_sfp27,as7716_32x_sfp28, +as7716_32x_sfp29,as7716_32x_sfp30,as7716_32x_sfp31,as7716_32x_sfp32 +}; + +static const struct i2c_device_id as7716_32x_sfp_id[] = { +{ "as7716_32x_sfp1", as7716_32x_sfp1 }, { "as7716_32x_sfp2", as7716_32x_sfp2 }, +{ "as7716_32x_sfp3", as7716_32x_sfp3 }, { "as7716_32x_sfp4", as7716_32x_sfp4 }, +{ "as7716_32x_sfp5", as7716_32x_sfp5 }, { "as7716_32x_sfp6", as7716_32x_sfp6 }, +{ "as7716_32x_sfp7", as7716_32x_sfp7 }, { "as7716_32x_sfp8", as7716_32x_sfp8 }, +{ "as7716_32x_sfp9", as7716_32x_sfp9 }, { "as7716_32x_sfp10", as7716_32x_sfp10 }, +{ "as7716_32x_sfp11", as7716_32x_sfp11 }, { "as7716_32x_sfp12", as7716_32x_sfp12 }, +{ "as7716_32x_sfp13", as7716_32x_sfp13 }, { "as7716_32x_sfp14", as7716_32x_sfp14 }, +{ "as7716_32x_sfp15", as7716_32x_sfp15 }, { "as7716_32x_sfp16", as7716_32x_sfp16 }, +{ "as7716_32x_sfp17", as7716_32x_sfp17 }, { "as7716_32x_sfp18", as7716_32x_sfp18 }, +{ "as7716_32x_sfp19", as7716_32x_sfp19 }, { "as7716_32x_sfp20", as7716_32x_sfp20 }, +{ "as7716_32x_sfp21", as7716_32x_sfp21 }, { "as7716_32x_sfp22", as7716_32x_sfp22 }, +{ "as7716_32x_sfp23", as7716_32x_sfp23 }, { "as7716_32x_sfp24", as7716_32x_sfp24 }, +{ "as7716_32x_sfp25", as7716_32x_sfp25 }, { "as7716_32x_sfp26", as7716_32x_sfp26 }, +{ "as7716_32x_sfp27", as7716_32x_sfp27 }, { "as7716_32x_sfp28", as7716_32x_sfp28 }, +{ "as7716_32x_sfp29", as7716_32x_sfp29 }, { "as7716_32x_sfp30", as7716_32x_sfp30 }, +{ "as7716_32x_sfp31", as7716_32x_sfp31 }, { "as7716_32x_sfp32", as7716_32x_sfp32 }, +{} +}; +MODULE_DEVICE_TABLE(i2c, as7716_32x_sfp_id); + +static struct i2c_driver as7716_32x_sfp_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7716_32x_sfp", + }, + .probe = as7716_32x_sfp_probe, + .remove = as7716_32x_sfp_remove, + .id_table = as7716_32x_sfp_id, + .address_list = normal_i2c, +}; + +static int as7716_32x_sfp_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + result = 0; + +abort: + return result; +} + +static struct as7716_32x_sfp_data *as7716_32x_sfp_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32x_sfp_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status = -1; + int i = 0; + u8 cpld_reg = 0x30 + (data->port/8); + + data->valid = 0; + + /* Read present status of the specified port number */ + data->is_present = 0; + status = accton_i2c_cpld_read(I2C_ADDR_CPLD1, cpld_reg); + + if (status < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", I2C_ADDR_CPLD1, cpld_reg, status); + goto exit; + } + + data->is_present = (status & (1 << (data->port % 8))) ? 0 : 1; + printk("data->is_present=%d, data->port=%d, status=0x%x\n",data->is_present, data->port, status); + /* Read eeprom data based on port number */ + memset(data->eeprom, 0, sizeof(data->eeprom)); + + /* Check if the port is present */ + if (data->is_present) { + /* read eeprom */ + for (i = 0; i < sizeof(data->eeprom)/I2C_SMBUS_BLOCK_MAX; i++) { + status = as7716_32x_sfp_read_block(client, i*I2C_SMBUS_BLOCK_MAX, + data->eeprom+(i*I2C_SMBUS_BLOCK_MAX), + I2C_SMBUS_BLOCK_MAX); + if (status < 0) { + printk("unable to read eeprom from port(%d)\n", data->port); + dev_dbg(&client->dev, "unable to read eeprom from port(%d)\n", data->port); + goto exit; + } + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init as7716_32x_sfp_init(void) +{ + //extern int platform_accton_as7716_32x(void); + //if (!platform_accton_as7716_32x()) { +// return -ENODEV; + //} + + return i2c_add_driver(&as7716_32x_sfp_driver); +} + +static void __exit as7716_32x_sfp_exit(void) +{ + i2c_del_driver(&as7716_32x_sfp_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton as7716_32x_sfp driver"); +MODULE_LICENSE("GPL"); + +module_init(as7716_32x_sfp_init); +module_exit(as7716_32x_sfp_exit); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_i2c_cpld.c new file mode 100755 index 00000000000..46d1e277328 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_i2c_cpld.c @@ -0,0 +1,259 @@ +/* + * A hwmon driver for the accton_i2c_cpld + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define CPLD_VERSION_REG 0x1 + +enum as5712_54x_cpld_sysfs_attributes { + CPLD_READ_VERSION, + CPLD_BYTE_ACCESS, + CPLD_DUMP_ALL, +}; + +static ssize_t read_cpld_version(struct device *dev, struct device_attribute *da, + char *buf); +int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); + + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +/* Addresses scanned for accton_i2c_cpld + */ +static const unsigned short normal_i2c[] = { 0x31, 0x35, 0x60, 0x61, 0x62, I2C_CLIENT_END }; + +static SENSOR_DEVICE_ATTR(cpld_get_version, S_IRUGO, read_cpld_version, NULL, CPLD_READ_VERSION); + +static struct attribute *as5712_54x_cpld_attributes[] = { + &sensor_dev_attr_cpld_get_version.dev_attr.attr, + NULL +}; + +static const struct attribute_group as5712_54x_cpld_group = { + .attrs = as5712_54x_cpld_attributes, +}; + +static ssize_t read_cpld_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + unsigned short cpld_reg = CPLD_VERSION_REG; + u8 reg; + + if(attr->index == CPLD_READ_VERSION) { + reg = accton_i2c_cpld_read(client->addr, cpld_reg); + return sprintf(buf, "%02x\n",reg); + } + return -1 ; +} + + +static void accton_i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void accton_i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int accton_i2c_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as5712_54x_cpld_group); + if (status) { + goto exit; + } + + dev_info(&client->dev, "chip found\n"); + accton_i2c_cpld_add_client(client); + + return 0; +exit: + return status; +} + +static int accton_i2c_cpld_remove(struct i2c_client *client) +{ + sysfs_remove_group(&client->dev.kobj, &as5712_54x_cpld_group); + + accton_i2c_cpld_remove_client(client); + return 0; +} + +static const struct i2c_device_id accton_i2c_cpld_id[] = { + { "accton_i2c_cpld", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, accton_i2c_cpld_id); + +static struct i2c_driver accton_i2c_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "accton_i2c_cpld", + }, + .probe = accton_i2c_cpld_probe, + .remove = accton_i2c_cpld_remove, + .id_table = accton_i2c_cpld_id, + .address_list = normal_i2c, +}; + +int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_read_byte_data(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(accton_i2c_cpld_read); + +int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_write_byte_data(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(accton_i2c_cpld_write); + +static int __init accton_i2c_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&accton_i2c_cpld_driver); +} + +static void __exit accton_i2c_cpld_exit(void) +{ + i2c_del_driver(&accton_i2c_cpld_driver); +} +/* +static struct dmi_system_id as7712_dmi_table[] = { + { + .ident = "Accton AS7712", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Accton"), + DMI_MATCH(DMI_PRODUCT_NAME, "AS7712"), + }, + } +}; + +int platform_accton_as7712_32x(void) +{ + return dmi_check_system(as7712_dmi_table); +} +EXPORT_SYMBOL(platform_accton_as7712_32x); +*/ +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_i2c_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(accton_i2c_cpld_init); +module_exit(accton_i2c_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/cpr_4011_4mxx.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/cpr_4011_4mxx.c new file mode 100755 index 00000000000..30bea914d58 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/cpr_4011_4mxx.c @@ -0,0 +1,400 @@ +/* + * An hwmon driver for the CPR-4011-4Mxx Redundant Power Module + * + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#if 0 +#define DEBUG +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_FAN_DUTY_CYCLE 100 + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x3c, 0x3d, 0x3e, 0x3f, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct cpr_4011_4mxx_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 vout_mode; /* Register value */ + u16 v_in; /* Register value */ + u16 v_out; /* Register value */ + u16 i_in; /* Register value */ + u16 i_out; /* Register value */ + u16 p_in; /* Register value */ + u16 p_out; /* Register value */ + u16 temp_input[2]; /* Register value */ + u8 fan_fault; /* Register value */ + u16 fan_duty_cycle[2]; /* Register value */ + u16 fan_speed[2]; /* Register value */ +}; + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_vout(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +static int cpr_4011_4mxx_write_word(struct i2c_client *client, u8 reg, u16 value); +static struct cpr_4011_4mxx_data *cpr_4011_4mxx_update_device(struct device *dev); + +enum cpr_4011_4mxx_sysfs_attributes { + PSU_V_IN, + PSU_V_OUT, + PSU_I_IN, + PSU_I_OUT, + PSU_P_IN, + PSU_P_OUT, + PSU_TEMP1_INPUT, + PSU_FAN1_FAULT, + PSU_FAN1_DUTY_CYCLE, + PSU_FAN1_SPEED, +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_v_in, S_IRUGO, show_linear, NULL, PSU_V_IN); +static SENSOR_DEVICE_ATTR(psu_v_out, S_IRUGO, show_vout, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(psu_i_in, S_IRUGO, show_linear, NULL, PSU_I_IN); +static SENSOR_DEVICE_ATTR(psu_i_out, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(psu_p_in, S_IRUGO, show_linear, NULL, PSU_P_IN); +static SENSOR_DEVICE_ATTR(psu_p_out, S_IRUGO, show_linear, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(psu_temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, show_linear, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); + +static struct attribute *cpr_4011_4mxx_attributes[] = { + &sensor_dev_attr_psu_v_in.dev_attr.attr, + &sensor_dev_attr_psu_v_out.dev_attr.attr, + &sensor_dev_attr_psu_i_in.dev_attr.attr, + &sensor_dev_attr_psu_i_out.dev_attr.attr, + &sensor_dev_attr_psu_p_in.dev_attr.attr, + &sensor_dev_attr_psu_p_out.dev_attr.attr, + &sensor_dev_attr_psu_temp1_input.dev_attr.attr, + &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, + &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, + &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, + NULL +}; + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); + int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; + long speed; + int error; + + error = kstrtol(buf, 10, &speed); + if (error) + return error; + + if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) + return -EINVAL; + + mutex_lock(&data->update_lock); + data->fan_duty_cycle[nr] = speed; + cpr_4011_4mxx_write_word(client, 0x3B + nr, data->fan_duty_cycle[nr]); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); + + u16 value = 0; + int exponent, mantissa; + int multiplier = 1000; + + switch (attr->index) { + case PSU_V_IN: + value = data->v_in; + break; + case PSU_I_IN: + value = data->i_in; + break; + case PSU_I_OUT: + value = data->i_out; + break; + case PSU_P_IN: + value = data->p_in; + break; + case PSU_P_OUT: + value = data->p_out; + break; + case PSU_TEMP1_INPUT: + value = data->temp_input[0]; + break; + case PSU_FAN1_DUTY_CYCLE: + multiplier = 1; + value = data->fan_duty_cycle[0]; + break; + case PSU_FAN1_SPEED: + multiplier = 1; + value = data->fan_speed[0]; + break; + default: + break; + } + + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + + return (exponent >= 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); + + u8 shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; + + return sprintf(buf, "%d\n", data->fan_fault >> shift); +} + +static ssize_t show_vout(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); + int exponent, mantissa; + int multiplier = 1000; + + exponent = two_complement_to_int(data->vout_mode, 5, 0x1f); + mantissa = data->v_out; + + return (exponent > 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static const struct attribute_group cpr_4011_4mxx_group = { + .attrs = cpr_4011_4mxx_attributes, +}; + +static int cpr_4011_4mxx_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct cpr_4011_4mxx_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct cpr_4011_4mxx_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &cpr_4011_4mxx_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &cpr_4011_4mxx_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int cpr_4011_4mxx_remove(struct i2c_client *client) +{ + struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &cpr_4011_4mxx_group); + kfree(data); + + return 0; +} + +static const struct i2c_device_id cpr_4011_4mxx_id[] = { + { "cpr_4011_4mxx", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, cpr_4011_4mxx_id); + +static struct i2c_driver cpr_4011_4mxx_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "cpr_4011_4mxx", + }, + .probe = cpr_4011_4mxx_probe, + .remove = cpr_4011_4mxx_remove, + .id_table = cpr_4011_4mxx_id, + .address_list = normal_i2c, +}; + +static int cpr_4011_4mxx_read_byte(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int cpr_4011_4mxx_read_word(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_word_data(client, reg); +} + +static int cpr_4011_4mxx_write_word(struct i2c_client *client, u8 reg, u16 value) +{ + return i2c_smbus_write_word_data(client, reg, value); +} + +struct reg_data_byte { + u8 reg; + u8 *value; +}; + +struct reg_data_word { + u8 reg; + u16 *value; +}; + +static struct cpr_4011_4mxx_data *cpr_4011_4mxx_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int i, status; + struct reg_data_byte regs_byte[] = { {0x20, &data->vout_mode}, + {0x81, &data->fan_fault}}; + struct reg_data_word regs_word[] = { {0x88, &data->v_in}, + {0x8b, &data->v_out}, + {0x89, &data->i_in}, + {0x8c, &data->i_out}, + {0x96, &data->p_out}, + {0x97, &data->p_in}, + {0x8d, &(data->temp_input[0])}, + {0x8e, &(data->temp_input[1])}, + {0x3b, &(data->fan_duty_cycle[0])}, + {0x3c, &(data->fan_duty_cycle[1])}, + {0x90, &(data->fan_speed[0])}, + {0x91, &(data->fan_speed[1])}}; + + dev_dbg(&client->dev, "Starting cpr_4011_4mxx update\n"); + + /* Read byte data */ + for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { + status = cpr_4011_4mxx_read_byte(client, regs_byte[i].reg); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_byte[i].reg, status); + } + else { + *(regs_byte[i].value) = status; + } + } + + /* Read word data */ + for (i = 0; i < ARRAY_SIZE(regs_word); i++) { + status = cpr_4011_4mxx_read_word(client, regs_word[i].reg); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_word[i].reg, status); + } + else { + *(regs_word[i].value) = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init cpr_4011_4mxx_init(void) +{ + return i2c_add_driver(&cpr_4011_4mxx_driver); +} + +static void __exit cpr_4011_4mxx_exit(void) +{ + i2c_del_driver(&cpr_4011_4mxx_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("CPR_4011_4MXX driver"); +MODULE_LICENSE("GPL"); + +module_init(cpr_4011_4mxx_init); +module_exit(cpr_4011_4mxx_exit); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/ym2651y.c new file mode 100755 index 00000000000..8e76c56b54f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/ym2651y.c @@ -0,0 +1,603 @@ +/* + * An hwmon driver for the 3Y Power YM-2651Y Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_FAN_DUTY_CYCLE 100 + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x58, 0x5b, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct ym2651y_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 capability; /* Register value */ + u16 status_word; /* Register value */ + u8 fan_fault; /* Register value */ + u8 over_temp; /* Register value */ + u16 v_out; /* Register value */ + u16 i_out; /* Register value */ + u16 p_out; /* Register value */ + u16 temp; /* Register value */ + u16 fan_speed; /* Register value */ + u16 fan_duty_cycle[2]; /* Register value */ + u8 fan_dir[4]; /* Register value */ + u8 pmbus_revision; /* Register value */ + u8 mfr_id[10]; /* Register value */ + u8 mfr_model[10]; /* Register value */ + u8 mfr_revsion[3]; /* Register value */ + u16 mfr_vin_min; /* Register value */ + u16 mfr_vin_max; /* Register value */ + u16 mfr_iin_max; /* Register value */ + u16 mfr_iout_max; /* Register value */ + u16 mfr_pin_max; /* Register value */ + u16 mfr_pout_max; /* Register value */ + u16 mfr_vout_min; /* Register value */ + u16 mfr_vout_max; /* Register value */ +}; + +static ssize_t show_byte(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_word(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_over_temp(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_ascii(struct device *dev, struct device_attribute *da, + char *buf); +static struct ym2651y_data *ym2651y_update_device(struct device *dev); +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static int ym2651y_write_word(struct i2c_client *client, u8 reg, u16 value); + +enum ym2651y_sysfs_attributes { + PSU_POWER_ON = 0, + PSU_TEMP_FAULT, + PSU_POWER_GOOD, + PSU_FAN1_FAULT, + PSU_FAN_DIRECTION, + PSU_OVER_TEMP, + PSU_V_OUT, + PSU_I_OUT, + PSU_P_OUT, + PSU_P_OUT_UV, /*In Unit of microVolt, instead of mini.*/ + PSU_TEMP1_INPUT, + PSU_FAN1_SPEED, + PSU_FAN1_DUTY_CYCLE, + PSU_PMBUS_REVISION, + PSU_MFR_ID, + PSU_MFR_MODEL, + PSU_MFR_REVISION, + PSU_MFR_VIN_MIN, + PSU_MFR_VIN_MAX, + PSU_MFR_VOUT_MIN, + PSU_MFR_VOUT_MAX, + PSU_MFR_IIN_MAX, + PSU_MFR_IOUT_MAX, + PSU_MFR_PIN_MAX, + PSU_MFR_POUT_MAX +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_power_on, S_IRUGO, show_word, NULL, PSU_POWER_ON); +static SENSOR_DEVICE_ATTR(psu_temp_fault, S_IRUGO, show_word, NULL, PSU_TEMP_FAULT); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_word, NULL, PSU_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(psu_over_temp, S_IRUGO, show_over_temp, NULL, PSU_OVER_TEMP); +static SENSOR_DEVICE_ATTR(psu_v_out, S_IRUGO, show_linear, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(psu_i_out, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(psu_p_out, S_IRUGO, show_linear, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(psu_temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, show_linear, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(psu_fan_dir, S_IRUGO, show_ascii, NULL, PSU_FAN_DIRECTION); +static SENSOR_DEVICE_ATTR(psu_pmbus_revision, S_IRUGO, show_byte, NULL, PSU_PMBUS_REVISION); +static SENSOR_DEVICE_ATTR(psu_mfr_id, S_IRUGO, show_ascii, NULL, PSU_MFR_ID); +static SENSOR_DEVICE_ATTR(psu_mfr_model, S_IRUGO, show_ascii, NULL, PSU_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu_mfr_revision, S_IRUGO, show_ascii, NULL, PSU_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu_mfr_vin_min, S_IRUGO, show_linear, NULL, PSU_MFR_VIN_MIN); +static SENSOR_DEVICE_ATTR(psu_mfr_vin_max, S_IRUGO, show_linear, NULL, PSU_MFR_VIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_vout_min, S_IRUGO, show_linear, NULL, PSU_MFR_VOUT_MIN); +static SENSOR_DEVICE_ATTR(psu_mfr_vout_max, S_IRUGO, show_linear, NULL, PSU_MFR_VOUT_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_iin_max, S_IRUGO, show_linear, NULL, PSU_MFR_IIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_iout_max, S_IRUGO, show_linear, NULL, PSU_MFR_IOUT_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_pin_max, S_IRUGO, show_linear, NULL, PSU_MFR_PIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_pout_max, S_IRUGO, show_linear, NULL, PSU_MFR_POUT_MAX); + +/*Duplicate nodes for lm-sensors.*/ +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_linear, NULL, PSU_P_OUT_UV); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(temp1_fault, S_IRUGO, show_word, NULL, PSU_TEMP_FAULT); + +static struct attribute *ym2651y_attributes[] = { + &sensor_dev_attr_psu_power_on.dev_attr.attr, + &sensor_dev_attr_psu_temp_fault.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, + &sensor_dev_attr_psu_over_temp.dev_attr.attr, + &sensor_dev_attr_psu_v_out.dev_attr.attr, + &sensor_dev_attr_psu_i_out.dev_attr.attr, + &sensor_dev_attr_psu_p_out.dev_attr.attr, + &sensor_dev_attr_psu_temp1_input.dev_attr.attr, + &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, + &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, + &sensor_dev_attr_psu_fan_dir.dev_attr.attr, + &sensor_dev_attr_psu_pmbus_revision.dev_attr.attr, + &sensor_dev_attr_psu_mfr_id.dev_attr.attr, + &sensor_dev_attr_psu_mfr_model.dev_attr.attr, + &sensor_dev_attr_psu_mfr_revision.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vin_min.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_pout_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_iin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_pin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vout_min.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vout_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_iout_max.dev_attr.attr, + /*Duplicate nodes for lm-sensors.*/ + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_temp1_fault.dev_attr.attr, + NULL +}; + +static ssize_t show_byte(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + + return (attr->index == PSU_PMBUS_REVISION) ? sprintf(buf, "%d\n", data->pmbus_revision) : + sprintf(buf, "0\n"); +} + +static ssize_t show_word(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + u16 status = 0; + + switch (attr->index) { + case PSU_POWER_ON: /* psu_power_on, low byte bit 6 of status_word, 0=>ON, 1=>OFF */ + status = (data->status_word & 0x40) ? 0 : 1; + break; + case PSU_TEMP_FAULT: /* psu_temp_fault, low byte bit 2 of status_word, 0=>Normal, 1=>temp fault */ + status = (data->status_word & 0x4) >> 2; + break; + case PSU_POWER_GOOD: /* psu_power_good, high byte bit 3 of status_word, 0=>OK, 1=>FAIL */ + status = (data->status_word & 0x800) ? 0 : 1; + break; + } + + return sprintf(buf, "%d\n", status); +} + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct ym2651y_data *data = i2c_get_clientdata(client); + int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; + long speed; + int error; + + error = kstrtol(buf, 10, &speed); + if (error) + return error; + + if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) + return -EINVAL; + + mutex_lock(&data->update_lock); + data->fan_duty_cycle[nr] = speed; + ym2651y_write_word(client, 0x3B + nr, data->fan_duty_cycle[nr]); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + + u16 value = 0; + int exponent, mantissa; + int multiplier = 1000; + + switch (attr->index) { + case PSU_V_OUT: + value = data->v_out; + break; + case PSU_I_OUT: + value = data->i_out; + break; + case PSU_P_OUT_UV: + multiplier = 1000000; /*For lm-sensors, unit is micro-Volt.*/ + /*Passing through*/ + case PSU_P_OUT: + value = data->p_out; + break; + case PSU_TEMP1_INPUT: + value = data->temp; + break; + case PSU_FAN1_SPEED: + value = data->fan_speed; + multiplier = 1; + break; + case PSU_FAN1_DUTY_CYCLE: + value = data->fan_duty_cycle[0]; + multiplier = 1; + break; + case PSU_MFR_VIN_MIN: + value = data->mfr_vin_min; + break; + case PSU_MFR_VIN_MAX: + value = data->mfr_vin_max; + break; + case PSU_MFR_VOUT_MIN: + value = data->mfr_vout_min; + break; + case PSU_MFR_VOUT_MAX: + value = data->mfr_vout_max; + break; + case PSU_MFR_PIN_MAX: + value = data->mfr_pin_max; + break; + case PSU_MFR_POUT_MAX: + value = data->mfr_pout_max; + break; + case PSU_MFR_IOUT_MAX: + value = data->mfr_iout_max; + break; + case PSU_MFR_IIN_MAX: + value = data->mfr_iin_max; + break; + } + + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + return (exponent >= 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + + u8 shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; + + return sprintf(buf, "%d\n", data->fan_fault >> shift); +} + +static ssize_t show_over_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct ym2651y_data *data = ym2651y_update_device(dev); + + return sprintf(buf, "%d\n", data->over_temp >> 7); +} + +static ssize_t show_ascii(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + u8 *ptr = NULL; + + switch (attr->index) { + case PSU_FAN_DIRECTION: /* psu_fan_dir */ + ptr = data->fan_dir; + break; + case PSU_MFR_ID: /* psu_mfr_id */ + ptr = data->mfr_id; + break; + case PSU_MFR_MODEL: /* psu_mfr_model */ + ptr = data->mfr_model; + break; + case PSU_MFR_REVISION: /* psu_mfr_revision */ + ptr = data->mfr_revsion; + break; + default: + return 0; + } + + return sprintf(buf, "%s\n", ptr); +} + +static const struct attribute_group ym2651y_group = { + .attrs = ym2651y_attributes, +}; + +static int ym2651y_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct ym2651y_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct ym2651y_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &ym2651y_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &ym2651y_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int ym2651y_remove(struct i2c_client *client) +{ + struct ym2651y_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &ym2651y_group); + kfree(data); + + return 0; +} + +static const struct i2c_device_id ym2651y_id[] = { + { "ym2651", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, ym2651y_id); + +static struct i2c_driver ym2651y_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "ym2651", + }, + .probe = ym2651y_probe, + .remove = ym2651y_remove, + .id_table = ym2651y_id, + .address_list = normal_i2c, +}; + +static int ym2651y_read_byte(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int ym2651y_read_word(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_word_data(client, reg); +} + +static int ym2651y_write_word(struct i2c_client *client, u8 reg, u16 value) +{ + return i2c_smbus_write_word_data(client, reg, value); +} + +static int ym2651y_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + result = 0; + +abort: + return result; +} + +struct reg_data_byte { + u8 reg; + u8 *value; +}; + +struct reg_data_word { + u8 reg; + u16 *value; +}; + +static struct ym2651y_data *ym2651y_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct ym2651y_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int i, status; + u8 command; + u8 fan_dir[5] = {0}; + struct reg_data_byte regs_byte[] = { {0x19, &data->capability}, + {0x7d, &data->over_temp}, + {0x81, &data->fan_fault}, + {0x98, &data->pmbus_revision}}; + struct reg_data_word regs_word[] = { {0x79, &data->status_word}, + {0x8b, &data->v_out}, + {0x8c, &data->i_out}, + {0x96, &data->p_out}, + {0x8d, &data->temp}, + {0x3b, &(data->fan_duty_cycle[0])}, + {0x3c, &(data->fan_duty_cycle[1])}, + {0x90, &data->fan_speed}, + {0xa0, &data->mfr_vin_min}, + {0xa1, &data->mfr_vin_max}, + {0xa2, &data->mfr_iin_max}, + {0xa3, &data->mfr_pin_max}, + {0xa4, &data->mfr_vout_min}, + {0xa5, &data->mfr_vout_max}, + {0xa6, &data->mfr_iout_max}, + {0xa7, &data->mfr_pout_max}}; + + dev_dbg(&client->dev, "Starting ym2651 update\n"); + + /* Read byte data */ + for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { + status = ym2651y_read_byte(client, regs_byte[i].reg); + + if (status < 0) + { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_byte[i].reg, status); + } + else { + *(regs_byte[i].value) = status; + } + } + + /* Read word data */ + for (i = 0; i < ARRAY_SIZE(regs_word); i++) { + status = ym2651y_read_word(client, regs_word[i].reg); + + if (status < 0) + { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_word[i].reg, status); + } + else { + *(regs_word[i].value) = status; + } + } + + /* Read fan_direction */ + command = 0xC3; + status = ym2651y_read_block(client, command, fan_dir, ARRAY_SIZE(fan_dir)-1); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + } + + strncpy(data->fan_dir, fan_dir+1, ARRAY_SIZE(data->fan_dir)-1); + data->fan_dir[ARRAY_SIZE(data->fan_dir)-1] = '\0'; + + /* Read mfr_id */ + command = 0x99; + status = ym2651y_read_block(client, command, data->mfr_id, + ARRAY_SIZE(data->mfr_id)-1); + data->mfr_id[ARRAY_SIZE(data->mfr_id)-1] = '\0'; + + if (status < 0) + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + + /* Read mfr_model */ + command = 0x9a; + status = ym2651y_read_block(client, command, data->mfr_model, + ARRAY_SIZE(data->mfr_model)-1); + data->mfr_model[ARRAY_SIZE(data->mfr_model)-1] = '\0'; + + if (status < 0) + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + + /* Read mfr_revsion */ + command = 0x9b; + status = ym2651y_read_block(client, command, data->mfr_revsion, + ARRAY_SIZE(data->mfr_revsion)-1); + data->mfr_revsion[ARRAY_SIZE(data->mfr_revsion)-1] = '\0'; + + if (status < 0) + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(ym2651y_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("3Y Power YM-2651Y driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/service/as7716-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/service/as7716-platform-monitor.service new file mode 100755 index 00000000000..b1428d7844f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/service/as7716-platform-monitor.service @@ -0,0 +1,17 @@ +[Unit] +Description=Accton AS7716-32X Platform Monitoring service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/accton_as7716_util.py install +ExecStart=/usr/local/bin/accton_as7716_monitor.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/setup.py new file mode 100755 index 00000000000..7a3d784d326 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as7716_32x', + version='1.0', + description='Module to initialize Accton AS7716-32X platforms', + + packages=['as7716_32x'], + package_dir={'as7716_32x': 'as7716-32x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/utils/README b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/utils/README new file mode 100755 index 00000000000..44e03cab5f5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/utils/README @@ -0,0 +1,117 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +Contents of this package: + patch - files under patch/ is for kernel and ONIE installer + for the kernel: + config-accton-as5712_54x.patch + for kernel configuration. + driver-i2c-muxes-pca954x-always-deselect.patch + for i2c_mux deselects after transaction. + driver-patches-for-accton-as5712-fan-psu-cpld.patch + for as5712's fan/psu/cpld/led/sfp drivers. + for ONIE: + onie_installer-accton-AS5712-54X.patch + for console port setting and copy util script o rootfs. + module - Contains source code of as5712 kernel driver modules. + +The late Sonic building scripts, pushed @Dec 5 2016, will automatically +create a docker container and run building process under it. +User is not necessary to handle docker environment creation. + +1. Download sonic-buildimage environment. + - Run "git clone https://github.com/Azure/sonic-buildimage". + - cd to sonic-buildimage and run "git submodule update --init --recursive". +2. Build kernel + - cd ./src/sonic-linux-kernel + - Copy patches and series from patch/kernel of this release to + sonic-linux-kernel/patch. + - Build kernel by "make". + - The built kernel package, linux-image-3.16.0-5-amd64_3.16.51-3+deb8u1_amd64.deb + , is generated. +3. Build installer + - Change directory back to sonic-buildimage/. + - Get onie_installer-accton-AS5712-54X.patch" from patch/installer. + - Change setting for AS5712-54X by patching build_image.sh. + "patch -p1 < onie_installer-accton-AS5712-54X.patch" + !!NOTICE, patching onie_installer-accton-AS5712-54X.patch comments out the + "git status" checking at build_image.sh. + - The account and password of installed OS can be given at rules/config. + The default user and password are "admin" & "YourPaSsWoRd" respectively. + - Run "make configure PLATFORM=broadcom" + - Copy the built kernel debian package to target/debs/. + The file is linux-image-3.16.0-5-amd64_*_amd64.deb under directory + src/sonic-linux-kernel/. + - Run "make target/sonic-generic.bin" + - Get the installer, target/sonic-generic.bin, to target machine and install. + +All Linux kernel code is licensed under the GPLv1. All other code is +licensed under the GPLv3. Please see the LICENSE file for copies of +both licenses. + +The code for integacting with Accton AS5712-54X has 2 parts, +kernel drivers and operational script. +The kernel drivers of peripherals are under module/ directory. +1. These drivers are patched into kernel by + driver-patches-for-accton-as5712-fan-psu-cpld.patch + Or you can build the driver under module/ by setting environment variable, + KERNEL_SRC, to proper linux built directory and run make. + It may be sonic-linux-kernel/linux-3.*/debian/build/build_amd64_none_amd64/. +2. A operational script, accton_as5712_util.py, for device initializatian and + peripheral accessing should be installed at /usr/bin. + This script is generated by onie_installer-accton-AS5712-54X.patch. + It's done by patching onie_installer-accton-AS5712-54X.patch at build-image. + Run "accton_as5712_util.py install" to install drivers. + +To initialize the system, run "accton_as5712_util.py install". +To clean up the drivers & devices, run "accton_as5712_util.py clean". +To dump information of sensors, run "accton_as5712_util.py show". +To dump SFP EEPROM, run "accton_as5712_util.py sff". +To set fan speed, run "accton_as5712_util.py set fan". +To enable/disable SFP emission, run "accton_as5712_util.py set sfp". +To set system LEDs' color, run "accton_as5712_util.py set led" +For more information, run "accton_as5712_util.py --help". + +==================================================================== +Besides applying accton_as5712_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +System LED: + There are 5 system LEDs at the lower-left corner of front panel. + They are loc, diag, fan, ps1, and ps2. + The sysfs interface color mappings are as follows: + Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + But not all colors are available for each LED. + +Fan Control: + There are 10 fans inside 5 fan modules. + All fans share 1 duty setting, ranged from 0~100. + +Thermal sensers: + 3 temperature sensors are controlled by the lm75 kernel modules. + +PSUs: + There 2 power supplies slot at the left/right side of the back. + Once if a PSU is not plugged, the status of it is shown failed. + +There are 48 SFP+ and 6 QSFP modules are equipped. +Before operating on PSU and QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/utils/accton_as7716_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/utils/accton_as7716_monitor.py new file mode 100755 index 00000000000..63f26d5d2ef --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/utils/accton_as7716_monitor.py @@ -0,0 +1,207 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + from as7716_32x.fanutil import FanUtil + from as7716_32x.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = 'accton_as7716_monitor' + +global log_file +global log_level + + # For AC power Front to Back : + # If any fan fail, please fan speed register to 15 + # The max value of Fan speed register is 9 + # [LM75(48) + LM75(49) + LM75(4A)] > 174 => set Fan speed value from 4 to 5 + # [LM75(48) + LM75(49) + LM75(4A)] > 182 => set Fan speed value from 5 to 7 + # [LM75(48) + LM75(49) + LM75(4A)] > 190 => set Fan speed value from 7 to 9 + # + # [LM75(48) + LM75(49) + LM75(4A)] < 170 => set Fan speed value from 5 to 4 + # [LM75(48) + LM75(49) + LM75(4A)] < 178 => set Fan speed value from 7 to 5 + # [LM75(48) + LM75(49) + LM75(4A)] < 186 => set Fan speed value from 9 to 7 + # + # + # For AC power Back to Front : + # If any fan fail, please fan speed register to 15 + # The max value of Fan speed register is 10 + # [LM75(48) + LM75(49) + LM75(4A)] > 140 => set Fan speed value from 4 to 5 + # [LM75(48) + LM75(49) + LM75(4A)] > 150 => set Fan speed value from 5 to 7 + # [LM75(48) + LM75(49) + LM75(4A)] > 160 => set Fan speed value from 7 to 10 + # + # [LM75(48) + LM75(49) + LM75(4A)] < 135 => set Fan speed value from 5 to 4 + # [LM75(48) + LM75(49) + LM75(4A)] < 145 => set Fan speed value from 7 to 5 + # [LM75(48) + LM75(49) + LM75(4A)] < 155 => set Fan speed value from 10 to 7 + # + + + # 2.If no matched fan speed is found from the policy, + # use FAN_DUTY_CYCLE_MIN as default speed + # Get current temperature + # 4.Decision 3: Decide new fan speed depend on fan direction/current fan speed/temperature + + + + +# Make a class we can use to capture stdout and sterr in the log +class accton_as7716_monitor(object): + # static temp var + _ori_temp = 0 + _new_perc = 0 + _ori_perc = 0 + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_fans(self): + + fan_policy_f2b = { + 0: [32, 0, 174000], + 1: [38, 170000, 182000], + 2: [50, 178000, 190000], + 3: [63, 186000, 0], + } + fan_policy_b2f = { + 0: [32, 0, 140000], + 1: [38, 135000, 150000], + 2: [50, 145000, 160000], + 3: [69, 15500, 0], + } + + thermal = ThermalUtil() + fan = FanUtil() + get_temp = thermal.get_thermal_temp() + + cur_duty_cycle = fan.get_fan_duty_cycle() + + for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): + fan_status = fan.get_fan_status(x) + if fan_status is None: + logging.debug('INFO. SET new_perc to %d (FAN stauts is None. fan_num:%d)', 100, x) + return False + if fan_status is False: + logging.debug('INFO. SET new_perc to %d (FAN fault. fan_num:%d)', 100, x) + fan.set_fan_duty_cycle(45) + return True + logging.debug('INFO. fan_status is True (fan_num:%d)', x) + + if fan_status is not None and fan_status is not False: + fan_dir=fan.get_fan_dir(1) + for x in range(0, 4): + if cur_duty_cycle == fan_policy_f2b[x][0]: + break + + if fan_dir == 1: + if x == 4 : + fan.set_fan_duty_cycle(fan_policy_f2b[0][0]) + new_duty_cycle=cur_duty_cycle + # if temp > up_levle, else if temp < down_level + if get_temp > fan_policy_f2b[x][2] and x != 3 : + new_duty_cycle= fan_policy_f2b[x+1][0] + logging.debug('INFO. THERMAL temp UP, temp %d > %d , new_duty_cycle=%d', get_temp, fan_policy_f2b[x][2], new_duty_cycle) + elif get_temp < fan_policy_f2b[x][1] : + new_duty_cycle= fan_policy_f2b[x-1][0] + logging.debug('INFO. THERMAL temp down, temp %d < %d , new_duty_cycle=%d', get_temp, fan_policy_f2b[x][1], new_duty_cycle) + if new_duty_cycle == cur_duty_cycle : + return True + else: + if x == 4 : + fan.set_fan_duty_cycle(fan_policy_b2f[0][0]) + new_duty_cycle=cur_duty_cycle + # if temp > up_levle, else if temp < down_level + if get_temp > fan_policy_b2f[x][1] and x != 3 : + new_duty_cycle= fan_policy_b2f[x+1][0] + logging.debug('INFO. THERMAL temp UP, temp %d > %d , new_duty_cycle=%d', get_temp, fan_policy_b2f[x][2], new_duty_cycle) + elif get_temp < fan_policy_b2f[x][0] and x != 0 : + new_duty_cycle= fan_policy_b2f[x-1][0] + logging.debug('INFO. THERMAL temp down, temp %d < %d , new_duty_cycle=%d', get_temp, fan_policy_b2f[x][1], new_duty_cycle) + if new_duty_cycle == cur_duty_cycle : + return True + + fan.set_fan_duty_cycle(new_duty_cycle) + + return True + + + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + monitor = accton_as7716_monitor(log_file, log_level) + + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(1) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/utils/accton_as7716_util.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/utils/accton_as7716_util.py new file mode 100755 index 00000000000..b195165337d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/utils/accton_as7716_util.py @@ -0,0 +1,629 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +PROJECT_NAME = 'as7716_32x' +version = '0.0.1' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan1':1, 'fan2':1,'fan3':1,'fan4':1,'fan5':1,'thermal':3, 'psu':2, 'sfp':54} + + +led_prefix ='/sys/devices/platform/as7716_32x_led/leds/accton_'+PROJECT_NAME+'_led::' +fan_prefix ='/sys/devices/platform/as7716_32x_' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2'], + 'fan1': ['fan'], + 'fan2': ['fan'], + 'fan3': ['fan'], + 'fan4': ['fan'], + 'fan5': ['fan'], + 'fan5': ['fan'], + } +hwmon_nodes = {'led': ['brightness'] , + 'fan1': ['fan_duty_cycle_percentage', 'fan1_fault', 'fan1_speed_rpm', 'fan1_direction', 'fanr1_fault', 'fanr1_speed_rpm'], + 'fan2': ['fan_duty_cycle_percentage','fan2_fault', 'fan2_speed_rpm', 'fan2_direction', 'fanr2_fault', 'fanr2_speed_rpm'], + 'fan3': ['fan_duty_cycle_percentage','fan3_fault', 'fan3_speed_rpm', 'fan3_direction', 'fanr3_fault', 'fanr3_speed_rpm'], + 'fan4': ['fan4_duty_cycle_percentage','fan4_fault', 'fan4_speed_rpm', 'fan4_direction', 'fanr4_fault', 'fanr4_speed_rpm'], + 'fan5': ['fan_duty_cycle_percentage','fan5_fault', 'fan5_speed_rpm', 'fan5_direction', 'fanr5_fault', 'fanr5_speed_rpm'], + } +hwmon_prefix ={'led': led_prefix, + 'fan1': fan_prefix, + 'fan2': fan_prefix, + 'fan3': fan_prefix, + 'fan4': fan_prefix, + 'fan5': fan_prefix, + } + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'thermal': ['10-0048','10-0049', '10-004a'] , + 'psu': ['17-0050','18-0053'], + 'sfp': ['-0050']} +i2c_nodes = { + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['sfp_is_present ', 'sfp_tx_disable']} + +sfp_map = [29, 30, 31, 32, 34, 33, 36, 35, + 25, 26, 27, 28, 37, 38, 39, 40, + 41, 42, 43, 44, 53, 54, 55, 56, + 45, 46, 47, 48, 49, 50, 51, 52] + +mknod =[ +'echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo as7716_32x_fan 0x66 > /sys/bus/i2c/devices/i2c-9/new_device', + +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-10/new_device', + +'echo as7716_32x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo accton_i2c_cpld 0x62 > /sys/bus/i2c/devices/i2c-12/new_device', +'echo accton_i2c_cpld 0x64 > /sys/bus/i2c/devices/i2c-13/new_device', + +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-2/new_device', + +# PSU-1 +'echo as7716_32x_psu1 0x53 > /sys/bus/i2c/devices/i2c-18/new_device', +'echo ym2651 0x5b > /sys/bus/i2c/devices/i2c-18/new_device', + +# PSU-2 +'echo as7716_32x_psu2 0x50> /sys/bus/i2c/devices/i2c-17/new_device', +'echo ym2651 0x58 > /sys/bus/i2c/devices/i2c-17/new_device', + + + +#EERPOM +'echo 24c02 0x56 > /sys/bus/i2c/devices/i2c-1/new_device', +] + +mknod2 =[ +'echo as7716_32x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo accton_i2c_cpld 0x61 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo accton_i2c_cpld 0x62 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-0/new_device', + +# PSU-1 +'echo as7716_32x_psu1 0x38 > /sys/bus/i2c/devices/i2c-57/new_device', +'echo cpr_4011_4mxx 0x3c > /sys/bus/i2c/devices/i2c-57/new_device', +'echo as7716_32x_psu1 0x50 > /sys/bus/i2c/devices/i2c-57/new_device', +'echo ym2401 0x58 > /sys/bus/i2c/devices/i2c-57/new_device', + +# PSU-2 +'echo as7716_32x_psu2 0x3b > /sys/bus/i2c/devices/i2c-58/new_device', +'echo cpr_4011_4mxx 0x3f > /sys/bus/i2c/devices/i2c-58/new_device', +'echo as7716_32x_psu2 0x53 > /sys/bus/i2c/devices/i2c-58/new_device', +'echo ym2401 0x5b > /sys/bus/i2c/devices/i2c-58/new_device', + +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-61/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-62/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-63/new_device', + +#EERPOM +'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-1/new_device', +] + +FORCE = 0 +logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-32 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def dis_i2c_ir3570a(addr): + cmd = "i2cset -y 0 0x%x 0xE5 0x01" % addr + status, output = commands.getstatusoutput(cmd) + cmd = "i2cset -y 0 0x%x 0x12 0x02" % addr + status, output = commands.getstatusoutput(cmd) + return status + +def ir3570_check(): + cmd = "i2cdump -y 0 0x42 s 0x9a" + try: + status, output = commands.getstatusoutput(cmd) + lines = output.split('\n') + hn = re.findall(r'\w+', lines[-1]) + version = int(hn[1], 16) + if version == 0x24: #only for ir3570a + ret = dis_i2c_ir3570a(4) + else: + ret = 0 + except Exception as e: + print "Error on ir3570_check() e:" + str(e) + return -1 + return ret + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-32 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ACCTON DBG]: "+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status = 1 + output = "" + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log ("cmd:" + cmd) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_inserted(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + +#'modprobe cpr_4011_4mxx', + +kos = [ +'depmod -ae', +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe accton_i2c_cpld', +'modprobe cpr_4011_4mxx', +'modprobe ym2651y', +'modprobe accton_as7716_32x_cpld1', +'modprobe accton_as7716_32x_fan', +'modprobe accton_as7716_32x_leds', +'modprobe accton_as7716_32x_psu'] + +def driver_install(): + global FORCE + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + #remove parameter if any + rm = kos[-(i+1)] + lst = rm.split(" ") + if len(lst) > 2: + del(lst[2:]) + rm = " ".join(lst) + + #Change to removing commands + rm = rm.replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + + + +def i2c_order_check(): + # i2c bus 0 and 1 might be installed in different order. + # Here check if 0x76 is exist @ i2c-0 + tmp = "echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device" + status, output = log_os_system(tmp, 0) + if not device_exist(): + order = 1 + else: + order = 0 + tmp = "echo 0x70 > /sys/bus/i2c/devices/i2c-1/delete_device" + status, output = log_os_system(tmp, 0) + return order + +def device_install(): + global FORCE + + for i in range(0,len(mknod)): + #for pca932x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(2) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(0,len(sfp_map)): + status, output =log_os_system("echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + status, output =log_os_system("echo port"+str(i)+" > /sys/bus/i2c/devices/"+str(sfp_map[i])+"-0050/port_name", 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/0-0070", 0) + if status==0: + I2C_ORDER=1 + else: + I2C_ORDER=0 + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + if I2C_ORDER==0: + nodelist = mknod + else: + nodelist = mknod2 + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_inserted() == False: + return False + if not device_exist(): + print "not device_exist()" + return False + return True + +def do_install(): + if driver_inserted() == False: + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + + ir3570_check() + + if not device_exist(): + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_inserted()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'sfp_eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan1'] ['fan11'][0] + node = node.replace(node.split("/")[-1], 'fan1_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0077", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/classes/fanutil.py new file mode 100755 index 00000000000..e001e94092c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/classes/fanutil.py @@ -0,0 +1,263 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_NUM_ON_MAIN_BROAD = 6 + FAN_NUM_1_IDX = 1 + FAN_NUM_2_IDX = 2 + FAN_NUM_3_IDX = 3 + FAN_NUM_4_IDX = 4 + FAN_NUM_5_IDX = 5 + FAN_NUM_6_IDX = 6 + + FAN_NODE_NUM_OF_MAP = 2 + FAN_NODE_FAULT_IDX_OF_MAP = 1 + #FAN_NODE_SPEED_IDX_OF_MAP = 2 + FAN_NODE_DIR_IDX_OF_MAP = 2 + #FAN_NODE_DUTY_IDX_OF_MAP = 4 + #FANR_NODE_FAULT_IDX_OF_MAP = 5 + + #BASE_VAL_PATH = '/sys/devices/platform/as5712_54x_fan/{0}' + BASE_VAL_PATH = '/sys/bus/i2c/devices/9-0066/{0}' + FAN_DUTY_PATH = '/sys/bus/i2c/devices/9-0066/fan_duty_cycle_percentage' + + #logfile = '' + #loglevel = logging.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + _fan_to_device_path_mapping = {} + +#fan1_direction +#fan1_fault +#fan1_present + + #(FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage', + _fan_to_device_node_mapping = { + (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault', + (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction', + + (FAN_NUM_2_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan2_fault', + (FAN_NUM_2_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan2_direction', + + (FAN_NUM_3_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan3_fault', + (FAN_NUM_3_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan3_direction', + + (FAN_NUM_4_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan4_fault', + (FAN_NUM_4_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan4_direction', + + (FAN_NUM_5_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan5_fault', + (FAN_NUM_5_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan5_direction', + + (FAN_NUM_6_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan6_fault', + (FAN_NUM_6_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan6_direction', + } + + def _get_fan_to_device_node(self, fan_num, node_num): + return self._fan_to_device_node_mapping[(fan_num, node_num)] + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + + try: + val_file = open(device_path, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + #print "fan_num=%d" %fan_num + #print "node_num=%d" %node_num + #print "device_path=%s" %device_path + #print "content=%s" %content + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + def __init__(self): + fan_path = self.BASE_VAL_PATH + + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_NUM_ON_MAIN_BROAD+1): + for node_num in range(self.FAN_NODE_FAULT_IDX_OF_MAP, self.FAN_NODE_NUM_OF_MAP+1): + self._fan_to_device_path_mapping[(fan_num, node_num)] = fan_path.format( + self._fan_to_device_node_mapping[(fan_num, node_num)]) + #self._fan_to_device_path_mapping[(fan_num, node_num)] = fan_path + self._fan_to_device_node_mapping[(fan_num, node_num)]) + #print "fan_num=%d" %fan_num + #print "node_num=%d" %node_num + #print "self._fan_to_device_path_mapping[(fan_num, node_num)]=%s" %self._fan_to_device_path_mapping[(fan_num, node_num)] + + def get_num_fans(self): + return self.FAN_NUM_ON_MAIN_BROAD + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM_OF_MAP + + def get_idx_node_start(self): + return self.FAN_NODE_FAULT_IDX_OF_MAP + + def get_size_node_map(self): + return len(self._fan_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._fan_to_device_path_mapping) + + def get_fan_to_device_path(self, fan_num, node_num): + return self._fan_to_device_path_mapping[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_FAULT_IDX_OF_MAP) + + #def get_fan_speed(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FAN_NODE_SPEED_IDX_OF_MAP) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DIR_IDX_OF_MAP) + + def get_fan_duty_cycle(self): + #duty_path = self.FAN_DUTY_PATH + try: + val_file = open(self.FAN_DUTY_PATH) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + return int(content) + #self._get_fan_node_val(fan_num, self.FAN_NODE_DUTY_IDX_OF_MAP) +#static u32 reg_val_to_duty_cycle(u8 reg_val) +#{ +# reg_val &= FAN_DUTY_CYCLE_REG_MASK; +# return ((u32)(reg_val+1) * 625 + 75)/ 100; +#} +# + def set_fan_duty_cycle(self, val): + + try: + fan_file = open(self.FAN_DUTY_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + #val = ((val + 1 ) * 625 +75 ) / 100 + fan_file.write(str(val)) + fan_file.close() + return True + + #def get_fanr_fault(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FANR_NODE_FAULT_IDX_OF_MAP) + + def get_fanr_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP) + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num, %d', fan_num) + print "fan %d return none" %fan_num + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + logging.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + #if self.get_fanr_fault(fan_num) is not None and self.get_fanr_fault(fan_num) > 0: + # logging.debug('GET. FANR fault. fan_num, %d', fan_num) + # return False + + return True + +#def main(): +# fan = FanUtil() +# +# print 'get_size_node_map : %d' % fan.get_size_node_map() +# print 'get_size_path_map : %d' % fan.get_size_path_map() +# for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): +# for y in range(fan.get_idx_node_start(), fan.get_num_nodes()+1): +# print fan.get_fan_to_device_path(x, y) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/classes/thermalutil.py new file mode 100755 index 00000000000..d3feda8faad --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/classes/thermalutil.py @@ -0,0 +1,124 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018:Jostar modify for as7716_32x +# ------------------------------------------------------------------ + +try: + import time + import logging + import glob + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + + THERMAL_NUM_ON_MAIN_BROAD = 3 + THERMAL_NUM_1_IDX = 1 # 1_ON_MAIN_BROAD + THERMAL_NUM_2_IDX = 2 # 2_ON_MAIN_BROAD + THERMAL_NUM_3_IDX = 3 # 3_ON_MAIN_BROAD + + BASE_VAL_PATH = '/sys/bus/i2c/devices/{0}-00{1}/hwmon/hwmon*/temp1_input' + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + _thermal_to_device_path_mapping = {} + + _thermal_to_device_node_mapping = { + THERMAL_NUM_1_IDX: ['10', '48'], + THERMAL_NUM_2_IDX: ['10', '49'], + THERMAL_NUM_3_IDX: ['10', '4a'], + } + + def __init__(self): + thermal_path = self.BASE_VAL_PATH + + for x in range(self.THERMAL_NUM_1_IDX, self.THERMAL_NUM_ON_MAIN_BROAD+1): + self._thermal_to_device_path_mapping[x] = thermal_path.format( + self._thermal_to_device_node_mapping[x][0], + self._thermal_to_device_node_mapping[x][1]) + #print "self._thermal_to_device_path_mapping[x]=%s" %self._thermal_to_device_path_mapping[x] + + def _get_thermal_node_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_to_device_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + + def get_num_thermals(self): + return self.THERMAL_NUM_ON_MAIN_BROAD + + def get_idx_thermal_start(self): + return self.THERMAL_NUM_1_IDX + + def get_size_node_map(self): + return len(self._thermal_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._thermal_to_device_path_mapping) + + def get_thermal_to_device_path(self, thermal_num): + return self._thermal_to_device_path_mapping[thermal_num] + + def get_thermal_1_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + + def get_thermal_2_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) + def get_thermal_temp(self): + return (self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) +self._get_thermal_node_val(self.THERMAL_NUM_3_IDX)) + +#def main(): +# thermal = ThermalUtil() +# +# print 'get_size_node_map : %d' % thermal.get_size_node_map() +# print 'get_size_path_map : %d' % thermal.get_size_path_map() +# for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): +# print thermal.get_thermal_to_device_path(x) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/Makefile new file mode 100755 index 00000000000..3dfb021a7aa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/Makefile @@ -0,0 +1,17 @@ +ifneq ($(KERNELRELEASE),) +obj-m:= accton_as7716_32xb_cpld1.o accton_as7716_32xb_fan.o \ + accton_as7716_32xb_leds.o accton_as7716_32xb_psu.o \ + accton_as7716_32xb_thermal.o accton_as7716_32xb_oom.o accton_as7716_32xb_pmbus.o\ + accton_as7716_32xb_sys.o accton_i2c_cpld.o +else +ifeq (,$(KERNEL_SRC)) +$(error KERNEL_SRC is not defined) +else +KERNELDIR:=$(KERNEL_SRC) +endif +PWD:=$(shell pwd) +default: + $(MAKE) -C $(KERNELDIR) M=$(PWD) modules +clean: + rm -rf *.o *.mod.o *.mod.o *.ko .*cmd .tmp_versions Module.markers Module.symvers modules.order +endif diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_cpld1.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_cpld1.c new file mode 100644 index 00000000000..c322972481b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_cpld1.c @@ -0,0 +1,1021 @@ +/* + * A hwmon driver for the as7716_32xbb_cpld + * + * Copyright (C) 2013 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ +#define STRING_TO_DEC_VALUE 10 + +static ssize_t show_present(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t get_mode_reset(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); + +static int as7716_32xb_cpld_read_internal(struct i2c_client *client, u8 reg); +static int as7716_32xb_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value); + +static ssize_t sfp_value_show(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t sfp_value_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t size); + + +#define PORT_NUM_MAX 32 + +struct as7716_32xb_cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; + unsigned int present[PORT_NUM_MAX]; + unsigned int reset[PORT_NUM_MAX]; +}; +enum port_id { + PORT1_ID, + PORT2_ID, + PORT3_ID, + PORT4_ID, + PORT5_ID, + PORT6_ID, + PORT7_ID, + PORT8_ID, + PORT9_ID, + PORT10_ID, + PORT11_ID, + PORT12_ID, + PORT13_ID, + PORT14_ID, + PORT15_ID, + PORT16_ID, + PORT17_ID, + PORT18_ID, + PORT19_ID, + PORT20_ID, + PORT21_ID, + PORT22_ID, + PORT23_ID, + PORT24_ID, + PORT25_ID, + PORT26_ID, + PORT27_ID, + PORT28_ID, + PORT29_ID, + PORT30_ID, + PORT31_ID, + PORT32_ID +}; + +/* Addresses scanned for as7716_32xbb_cpld + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index +#define TRANSCEIVER_RESET_ATTR_ID(index) MODULE_RESET_##index + +enum as7716_32xb_cpld_sysfs_attributes { + CPLD_VERSION, + ACCESS, + MODULE_PRESENT_ALL, + /* transceiver attributes */ + TRANSCEIVER_PRESENT_ATTR_ID(1), + TRANSCEIVER_PRESENT_ATTR_ID(2), + TRANSCEIVER_PRESENT_ATTR_ID(3), + TRANSCEIVER_PRESENT_ATTR_ID(4), + TRANSCEIVER_PRESENT_ATTR_ID(5), + TRANSCEIVER_PRESENT_ATTR_ID(6), + TRANSCEIVER_PRESENT_ATTR_ID(7), + TRANSCEIVER_PRESENT_ATTR_ID(8), + TRANSCEIVER_PRESENT_ATTR_ID(9), + TRANSCEIVER_PRESENT_ATTR_ID(10), + TRANSCEIVER_PRESENT_ATTR_ID(11), + TRANSCEIVER_PRESENT_ATTR_ID(12), + TRANSCEIVER_PRESENT_ATTR_ID(13), + TRANSCEIVER_PRESENT_ATTR_ID(14), + TRANSCEIVER_PRESENT_ATTR_ID(15), + TRANSCEIVER_PRESENT_ATTR_ID(16), + TRANSCEIVER_PRESENT_ATTR_ID(17), + TRANSCEIVER_PRESENT_ATTR_ID(18), + TRANSCEIVER_PRESENT_ATTR_ID(19), + TRANSCEIVER_PRESENT_ATTR_ID(20), + TRANSCEIVER_PRESENT_ATTR_ID(21), + TRANSCEIVER_PRESENT_ATTR_ID(22), + TRANSCEIVER_PRESENT_ATTR_ID(23), + TRANSCEIVER_PRESENT_ATTR_ID(24), + TRANSCEIVER_PRESENT_ATTR_ID(25), + TRANSCEIVER_PRESENT_ATTR_ID(26), + TRANSCEIVER_PRESENT_ATTR_ID(27), + TRANSCEIVER_PRESENT_ATTR_ID(28), + TRANSCEIVER_PRESENT_ATTR_ID(29), + TRANSCEIVER_PRESENT_ATTR_ID(30), + TRANSCEIVER_PRESENT_ATTR_ID(31), + TRANSCEIVER_PRESENT_ATTR_ID(32), + TRANSCEIVER_RESET_ATTR_ID(1), + TRANSCEIVER_RESET_ATTR_ID(2), + TRANSCEIVER_RESET_ATTR_ID(3), + TRANSCEIVER_RESET_ATTR_ID(4), + TRANSCEIVER_RESET_ATTR_ID(5), + TRANSCEIVER_RESET_ATTR_ID(6), + TRANSCEIVER_RESET_ATTR_ID(7), + TRANSCEIVER_RESET_ATTR_ID(8), + TRANSCEIVER_RESET_ATTR_ID(9), + TRANSCEIVER_RESET_ATTR_ID(10), + TRANSCEIVER_RESET_ATTR_ID(11), + TRANSCEIVER_RESET_ATTR_ID(12), + TRANSCEIVER_RESET_ATTR_ID(13), + TRANSCEIVER_RESET_ATTR_ID(14), + TRANSCEIVER_RESET_ATTR_ID(15), + TRANSCEIVER_RESET_ATTR_ID(16), + TRANSCEIVER_RESET_ATTR_ID(17), + TRANSCEIVER_RESET_ATTR_ID(18), + TRANSCEIVER_RESET_ATTR_ID(19), + TRANSCEIVER_RESET_ATTR_ID(20), + TRANSCEIVER_RESET_ATTR_ID(21), + TRANSCEIVER_RESET_ATTR_ID(22), + TRANSCEIVER_RESET_ATTR_ID(23), + TRANSCEIVER_RESET_ATTR_ID(24), + TRANSCEIVER_RESET_ATTR_ID(25), + TRANSCEIVER_RESET_ATTR_ID(26), + TRANSCEIVER_RESET_ATTR_ID(27), + TRANSCEIVER_RESET_ATTR_ID(28), + TRANSCEIVER_RESET_ATTR_ID(29), + TRANSCEIVER_RESET_ATTR_ID(30), + TRANSCEIVER_RESET_ATTR_ID(31), + TRANSCEIVER_RESET_ATTR_ID(32), +}; + +/* sysfs attributes for hwmon + */ + +/* transceiver attributes */ +/*present*/ +#define DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IWUSR|S_IRUGO, sfp_value_show, sfp_value_store, MODULE_PRESENT_##index) +#define DECLARE_TRANSCEIVER_ATTR(index) &sensor_dev_attr_module_present_##index.dev_attr.attr + +/*reset*/ +//#define DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(index) \ +// static SENSOR_DEVICE_ATTR(module_reset_##index, S_IWUSR | S_IRUGO, get_mode_reset, set_mode_reset, MODULE_RESET_##index) +//#define DECLARE_TRANSCEIVER_RESET_ATTR(index) &sensor_dev_attr_module_reset_##index.dev_attr.attr +#define DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_reset_##index, S_IWUSR | S_IRUGO, sfp_value_show, sfp_value_store, MODULE_RESET_##index) +#define DECLARE_TRANSCEIVER_RESET_ATTR(index) &sensor_dev_attr_module_reset_##index.dev_attr.attr + + + + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS); +/* transceiver attributes */ +static SENSOR_DEVICE_ATTR(module_present_all, S_IRUGO, show_present_all, NULL, MODULE_PRESENT_ALL); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(1); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(2); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(3); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(4); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(5); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(6); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(7); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(8); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(9); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(10); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(11); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(12); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(13); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(14); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(15); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(16); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(17); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(18); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(19); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(20); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(21); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(22); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(23); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(24); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(25); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(26); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(27); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(28); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(29); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(30); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(31); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(32); + +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(1); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(2); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(3); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(4); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(5); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(6); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(7); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(8); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(9); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(10); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(11); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(12); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(13); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(14); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(15); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(16); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(17); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(18); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(19); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(20); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(21); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(22); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(23); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(24); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(25); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(26); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(27); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(28); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(29); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(30); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(31); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(32); + + +static struct attribute *as7716_32xb_cpld_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + /* transceiver attributes */ + &sensor_dev_attr_module_present_all.dev_attr.attr, + DECLARE_TRANSCEIVER_ATTR(1), + DECLARE_TRANSCEIVER_ATTR(2), + DECLARE_TRANSCEIVER_ATTR(3), + DECLARE_TRANSCEIVER_ATTR(4), + DECLARE_TRANSCEIVER_ATTR(5), + DECLARE_TRANSCEIVER_ATTR(6), + DECLARE_TRANSCEIVER_ATTR(7), + DECLARE_TRANSCEIVER_ATTR(8), + DECLARE_TRANSCEIVER_ATTR(9), + DECLARE_TRANSCEIVER_ATTR(10), + DECLARE_TRANSCEIVER_ATTR(11), + DECLARE_TRANSCEIVER_ATTR(12), + DECLARE_TRANSCEIVER_ATTR(13), + DECLARE_TRANSCEIVER_ATTR(14), + DECLARE_TRANSCEIVER_ATTR(15), + DECLARE_TRANSCEIVER_ATTR(16), + DECLARE_TRANSCEIVER_ATTR(17), + DECLARE_TRANSCEIVER_ATTR(18), + DECLARE_TRANSCEIVER_ATTR(19), + DECLARE_TRANSCEIVER_ATTR(20), + DECLARE_TRANSCEIVER_ATTR(21), + DECLARE_TRANSCEIVER_ATTR(22), + DECLARE_TRANSCEIVER_ATTR(23), + DECLARE_TRANSCEIVER_ATTR(24), + DECLARE_TRANSCEIVER_ATTR(25), + DECLARE_TRANSCEIVER_ATTR(26), + DECLARE_TRANSCEIVER_ATTR(27), + DECLARE_TRANSCEIVER_ATTR(28), + DECLARE_TRANSCEIVER_ATTR(29), + DECLARE_TRANSCEIVER_ATTR(30), + DECLARE_TRANSCEIVER_ATTR(31), + DECLARE_TRANSCEIVER_ATTR(32), + DECLARE_TRANSCEIVER_RESET_ATTR(1), + DECLARE_TRANSCEIVER_RESET_ATTR(2), + DECLARE_TRANSCEIVER_RESET_ATTR(3), + DECLARE_TRANSCEIVER_RESET_ATTR(4), + DECLARE_TRANSCEIVER_RESET_ATTR(5), + DECLARE_TRANSCEIVER_RESET_ATTR(6), + DECLARE_TRANSCEIVER_RESET_ATTR(7), + DECLARE_TRANSCEIVER_RESET_ATTR(8), + DECLARE_TRANSCEIVER_RESET_ATTR(9), + DECLARE_TRANSCEIVER_RESET_ATTR(10), + DECLARE_TRANSCEIVER_RESET_ATTR(11), + DECLARE_TRANSCEIVER_RESET_ATTR(12), + DECLARE_TRANSCEIVER_RESET_ATTR(13), + DECLARE_TRANSCEIVER_RESET_ATTR(14), + DECLARE_TRANSCEIVER_RESET_ATTR(15), + DECLARE_TRANSCEIVER_RESET_ATTR(16), + DECLARE_TRANSCEIVER_RESET_ATTR(17), + DECLARE_TRANSCEIVER_RESET_ATTR(18), + DECLARE_TRANSCEIVER_RESET_ATTR(19), + DECLARE_TRANSCEIVER_RESET_ATTR(20), + DECLARE_TRANSCEIVER_RESET_ATTR(21), + DECLARE_TRANSCEIVER_RESET_ATTR(22), + DECLARE_TRANSCEIVER_RESET_ATTR(23), + DECLARE_TRANSCEIVER_RESET_ATTR(24), + DECLARE_TRANSCEIVER_RESET_ATTR(25), + DECLARE_TRANSCEIVER_RESET_ATTR(26), + DECLARE_TRANSCEIVER_RESET_ATTR(27), + DECLARE_TRANSCEIVER_RESET_ATTR(28), + DECLARE_TRANSCEIVER_RESET_ATTR(29), + DECLARE_TRANSCEIVER_RESET_ATTR(30), + DECLARE_TRANSCEIVER_RESET_ATTR(31), + DECLARE_TRANSCEIVER_RESET_ATTR(32), + NULL +}; + +static const struct attribute_group as7716_32xb_cpld_group = { + .attrs = as7716_32xb_cpld_attributes, +}; + +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u8 values[4] = {0}; + u8 regs[] = {0x30, 0x31, 0x32, 0x33}; + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = as7716_32xb_cpld_read_internal(client, regs[i]); + + if (status < 0) { + goto exit; + } + + values[i] = ~(u8)status; + } + + mutex_unlock(&data->update_lock); + + /* Return values 1 -> 32 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], + values[3]); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static int sfp_array_index_get(int attr_idx) +{ + switch(attr_idx) + { + case TRANSCEIVER_PRESENT_ATTR_ID(1): + case TRANSCEIVER_RESET_ATTR_ID(1): + return PORT1_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(2): + case TRANSCEIVER_RESET_ATTR_ID(2): + return PORT2_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(3): + case TRANSCEIVER_RESET_ATTR_ID(3): + return PORT3_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(4): + case TRANSCEIVER_RESET_ATTR_ID(4): + return PORT4_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(5): + case TRANSCEIVER_RESET_ATTR_ID(5): + return PORT5_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(6): + case TRANSCEIVER_RESET_ATTR_ID(6): + return PORT6_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(7): + case TRANSCEIVER_RESET_ATTR_ID(7): + return PORT7_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(8): + case TRANSCEIVER_RESET_ATTR_ID(8): + return PORT8_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(9): + case TRANSCEIVER_RESET_ATTR_ID(9): + return PORT9_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(10): + case TRANSCEIVER_RESET_ATTR_ID(10): + return PORT10_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(11): + case TRANSCEIVER_RESET_ATTR_ID(11): + return PORT11_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(12): + case TRANSCEIVER_RESET_ATTR_ID(12): + return PORT12_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(13): + case TRANSCEIVER_RESET_ATTR_ID(13): + return PORT13_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(14): + case TRANSCEIVER_RESET_ATTR_ID(14): + return PORT14_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(15): + case TRANSCEIVER_RESET_ATTR_ID(15): + return PORT15_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(16): + case TRANSCEIVER_RESET_ATTR_ID(16): + return PORT16_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(17): + case TRANSCEIVER_RESET_ATTR_ID(17): + return PORT17_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(18): + case TRANSCEIVER_RESET_ATTR_ID(18): + return PORT18_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(19): + case TRANSCEIVER_RESET_ATTR_ID(19): + return PORT19_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(20): + case TRANSCEIVER_RESET_ATTR_ID(20): + return PORT20_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(21): + case TRANSCEIVER_RESET_ATTR_ID(21): + return PORT21_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(22): + case TRANSCEIVER_RESET_ATTR_ID(22): + return PORT22_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(23): + case TRANSCEIVER_RESET_ATTR_ID(23): + return PORT23_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(24): + case TRANSCEIVER_RESET_ATTR_ID(24): + return PORT24_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(25): + case TRANSCEIVER_RESET_ATTR_ID(25): + return PORT25_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(26): + case TRANSCEIVER_RESET_ATTR_ID(26): + return PORT26_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(27): + case TRANSCEIVER_RESET_ATTR_ID(27): + return PORT27_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(28): + case TRANSCEIVER_RESET_ATTR_ID(28): + return PORT28_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(29): + case TRANSCEIVER_RESET_ATTR_ID(29): + return PORT29_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(30): + case TRANSCEIVER_RESET_ATTR_ID(30): + return PORT30_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(31): + case TRANSCEIVER_RESET_ATTR_ID(31): + return PORT31_ID; + case TRANSCEIVER_PRESENT_ATTR_ID(32): + case TRANSCEIVER_RESET_ATTR_ID(32): + return PORT32_ID; + default : + return -1; + } +} + + +static ssize_t sfp_value_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t size) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_cpld_data *data = i2c_get_clientdata(client); + int status = -EINVAL; + int index; + long keyin = 0; + + //printk("sfp_value_store\n"); + //printk("attr->index=%d\n", attr->index); + mutex_lock(&data->update_lock); + switch (attr->index) + { + case MODULE_PRESENT_1 ... MODULE_PRESENT_8: + case MODULE_PRESENT_9 ... MODULE_PRESENT_16: + case MODULE_PRESENT_17 ... MODULE_PRESENT_24: + case MODULE_PRESENT_25 ... MODULE_PRESENT_32: + index=sfp_array_index_get(attr->index); + if(index < 0 || index > PORT_NUM_MAX -1) + break; + status = kstrtol(buf, STRING_TO_DEC_VALUE, &keyin); + if(keyin < 0 || keyin > 1) + break; + data->present[index]=keyin; + break; + case MODULE_RESET_1 ... MODULE_RESET_8: + case MODULE_RESET_9 ... MODULE_RESET_16: + case MODULE_RESET_17 ... MODULE_RESET_24: + case MODULE_RESET_25 ... MODULE_RESET_32: + index=sfp_array_index_get(attr->index); + if(index < 0 || index > PORT_NUM_MAX -1) + break; + status = kstrtol(buf, STRING_TO_DEC_VALUE, &keyin); + if(keyin < 0 || keyin > 1) + break; + data->reset[index]=keyin; + break; + default : + break; + } + mutex_unlock(&data->update_lock); + return size; +} +static ssize_t sfp_value_show(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_cpld_data *data = i2c_get_clientdata(client); + ssize_t ret = 0; + int index; + int status = -EINVAL; + + //printk("sfp_value_show, attr->index=%d\n", attr->index); + //printk("TRANSCEIVER_PRESENT_ATTR_ID(1)=%d, TRANSCEIVER_RESET_ATTR_ID(1)=%d\n", TRANSCEIVER_PRESENT_ATTR_ID(1), TRANSCEIVER_RESET_ATTR_ID(1)); + mutex_lock(&data->update_lock); + switch (attr->index) + { + case MODULE_PRESENT_1 ... MODULE_PRESENT_8: + case MODULE_PRESENT_9 ... MODULE_PRESENT_16: + case MODULE_PRESENT_17 ... MODULE_PRESENT_24: + case MODULE_PRESENT_25 ... MODULE_PRESENT_32: + index=sfp_array_index_get(attr->index); + if(index < 0 || index > PORT_NUM_MAX -1) + break; + status = sprintf(buf, "%u\n", data->present[index]); + break; + case MODULE_RESET_1 ... MODULE_RESET_8: + case MODULE_RESET_9 ... MODULE_RESET_16: + case MODULE_RESET_17 ... MODULE_RESET_24: + case MODULE_RESET_25 ... MODULE_RESET_32: + index=sfp_array_index_get(attr->index); + //printk("rst:attr->index=%d, index=%d\n",attr->index, index); + if(index < 0 || index > PORT_NUM_MAX -1) + break; + status = sprintf(buf, "%u\n", data->reset[index]); + break; + default : + break; + } + + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0; + + switch (attr->index) { + case MODULE_PRESENT_1 ... MODULE_PRESENT_8: + reg = 0x30; + mask = 0x1 << (attr->index - MODULE_PRESENT_1); + break; + case MODULE_PRESENT_9 ... MODULE_PRESENT_16: + reg = 0x31; + mask = 0x1 << (attr->index - MODULE_PRESENT_9); + break; + case MODULE_PRESENT_17 ... MODULE_PRESENT_24: + reg = 0x32; + mask = 0x1 << (attr->index - MODULE_PRESENT_17); + break; + case MODULE_PRESENT_25 ... MODULE_PRESENT_32: + reg = 0x33; + mask = 0x1 << (attr->index - MODULE_PRESENT_25); + break; + default: + return 0; + } + + + mutex_lock(&data->update_lock); + status = as7716_32xb_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", !(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 reg = 0, mask = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + + switch (attr->index) { + case CPLD_VERSION: + reg = 0x1; + mask = 0xFF; + break; + default: + break; + } + + mutex_lock(&data->update_lock); + status = as7716_32xb_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return sprintf(buf, "%d\n", (status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_cpld_data *data = i2c_get_clientdata(client); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = as7716_32xb_cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static int as7716_32xb_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int as7716_32xb_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static void as7716_32xb_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as7716_32xb_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int as7716_32xb_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct as7716_32xb_cpld_data *data = NULL; + + data = kzalloc(sizeof(struct as7716_32xb_cpld_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7716_32xb_cpld_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + as7716_32xb_cpld_add_client(client); + + dev_info(&client->dev, "%s: cpld '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7716_32xb_cpld_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7716_32xb_cpld_remove(struct i2c_client *client) +{ + struct as7716_32xb_cpld_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7716_32xb_cpld_group); + kfree(data); + as7716_32xb_cpld_remove_client(client); + + return 0; +} + +int as7716_32xb_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_read_byte_data(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as7716_32xb_cpld_read); + +int as7716_32xb_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_write_byte_data(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as7716_32xb_cpld_write); + +static ssize_t get_mode_reset(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0; + + switch (attr->index) { + case MODULE_RESET_1 ... MODULE_RESET_8: + reg = 0x04; + mask = 0x1 << (attr->index - MODULE_RESET_1); + break; + case MODULE_RESET_9 ... MODULE_RESET_16: + reg = 0x05; + mask = 0x1 << (attr->index - MODULE_RESET_9); + break; + case MODULE_RESET_17 ... MODULE_RESET_24: + reg = 0x06; + mask = 0x1 << (attr->index - MODULE_RESET_17); + break; + case MODULE_RESET_25 ... MODULE_RESET_32: + reg = 0x07; + mask = 0x1 << (attr->index - MODULE_RESET_25); + break; + default: + return 0; + } + + + mutex_lock(&data->update_lock); + status = as7716_32xb_cpld_read_internal(client, reg); + + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\r\n", !(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_cpld_data *data = i2c_get_clientdata(client); + long reset; + int status=0, val, error; + u8 reg = 0, mask = 0; + + + error = kstrtol(buf, 10, &reset); + if (error) { + return error; + } + //printk("set_mode_reset:attr->index=%d\n",attr->index); + switch (attr->index) { + case MODULE_RESET_1 ... MODULE_RESET_8: + reg = 0x04; + mask = 0x1 << (attr->index - MODULE_RESET_1); + break; + case MODULE_RESET_9 ... MODULE_RESET_16: + reg = 0x05; + mask = 0x1 << (attr->index - MODULE_RESET_9); + break; + case MODULE_RESET_17 ... MODULE_RESET_24: + reg = 0x06; + mask = 0x1 << (attr->index - MODULE_RESET_17); + break; + case MODULE_RESET_25 ... MODULE_RESET_32: + reg = 0x07; + mask = 0x1 << (attr->index - MODULE_RESET_25); + break; + default: + return 0; + } + mutex_lock(&data->update_lock); + + status = as7716_32xb_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + //printk("set_mode_reset:reset=%d, reg=0x%x, mask=0x%x, ori_val=0x%x\n", reset, reg, mask, status); + /* Update lp_mode status */ + if (reset) + { + val = status&(~mask); + //printk("1:new val=0x%x\n", val); + } + else + { + val =status | (mask); + //printk("0:new val=0x%x\n", val); + } + + status = as7716_32xb_cpld_write_internal(client, reg, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + + + +static const struct i2c_device_id as7716_32xb_cpld_id[] = { + { "as7716_32xb_cpld1", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7716_32xb_cpld_id); + +static struct i2c_driver as7716_32xb_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7716_32xb_cpld1", + }, + .probe = as7716_32xb_cpld_probe, + .remove = as7716_32xb_cpld_remove, + .id_table = as7716_32xb_cpld_id, + .address_list = normal_i2c, +}; + +static int __init as7716_32xb_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as7716_32xb_cpld_driver); +} + +static void __exit as7716_32xb_cpld_exit(void) +{ + i2c_del_driver(&as7716_32xb_cpld_driver); +} + +module_init(as7716_32xb_cpld_init); +module_exit(as7716_32xb_cpld_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7716_32xb_cpld driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_fan.c new file mode 100644 index 00000000000..65f3251c00e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_fan.c @@ -0,0 +1,710 @@ +/* + * A hwmon driver for the Accton as7716 32x fan + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as7716_32xb_fan" + +#define NUM_THERMAL_SENSORS (3) /* Get sum of this number of sensors.*/ +#define THERMAL_SENSORS_DRIVER "lm75" +#define STRING_TO_DEC_VALUE 10 + +#define IN +#define OUT + +static struct as7716_32xb_fan_data *as7716_32xb_fan_update_device(struct device *dev); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_enable(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); + +static ssize_t fan_value_show(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t fan_value_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t size); + +/* fan related data, the index should match sysfs_fan_attributes + */ +static const u8 fan_reg[] = { + 0x0F, /* fan 1-6 present status */ + 0x10, /* fan 1-6 direction(0:B2F 1:F2B) */ + 0x11, /* fan PWM(for all fan) */ + 0x12, /* front fan 1 speed(rpm) */ + 0x13, /* front fan 2 speed(rpm) */ + 0x14, /* front fan 3 speed(rpm) */ + 0x15, /* front fan 4 speed(rpm) */ + 0x16, /* front fan 5 speed(rpm) */ + 0x17, /* front fan 6 speed(rpm) */ + 0x22, /* rear fan 1 speed(rpm) */ + 0x23, /* rear fan 2 speed(rpm) */ + 0x24, /* rear fan 3 speed(rpm) */ + 0x25, /* rear fan 4 speed(rpm) */ + 0x26, /* rear fan 5 speed(rpm) */ + 0x27, /* rear fan 6 speed(rpm) */ +}; + +#define FAN_NUM_MAX 6 +/* Each client has this additional data */ +struct as7716_32xb_fan_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ + u8 enable; + u8 duty_cycle; + unsigned int present[FAN_NUM_MAX]; + unsigned int front_speed_rpm[FAN_NUM_MAX]; + unsigned int rear_speed_rpm[FAN_NUM_MAX]; + unsigned int direction[FAN_NUM_MAX]; + unsigned int fault[FAN_NUM_MAX]; + unsigned int input[FAN_NUM_MAX]; +}; + +enum FAN_ID { + FAN1_ID, + FAN2_ID, + FAN3_ID, + FAN4_ID, + FAN5_ID, + FAN6_ID +}; + +enum sysfs_fan_attributes { + FAN_PRESENT_REG, + FAN_DIRECTION_REG, + FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ + FAN1_FRONT_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN5_FRONT_SPEED_RPM, + FAN6_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN5_REAR_SPEED_RPM, + FAN6_REAR_SPEED_RPM, + FAN1_DIRECTION, + FAN2_DIRECTION, + FAN3_DIRECTION, + FAN4_DIRECTION, + FAN5_DIRECTION, + FAN6_DIRECTION, + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN5_PRESENT, + FAN6_PRESENT, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + FAN5_FAULT, + FAN6_FAULT +}; + +/* Define attributes + */ +#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO|S_IWUSR, fan_value_show, fan_value_store, FAN##index##_FAULT);\ + static SENSOR_DEVICE_ATTR(fan##index2##_fault, S_IRUGO|S_IWUSR, fan_value_show, fan_value_store, FAN##index##_FAULT) +#define DECLARE_FAN_FAULT_ATTR(index, index2) &sensor_dev_attr_fan##index##_fault.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_fault.dev_attr.attr + +#define DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_direction, S_IRUGO|S_IWUSR, fan_value_show, fan_value_store, FAN##index##_DIRECTION) +#define DECLARE_FAN_DIRECTION_ATTR(index) &sensor_dev_attr_fan##index##_direction.dev_attr.attr + + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_value_show, fan_value_store, FAN_DUTY_CYCLE_PERCENTAGE);\ + static SENSOR_DEVICE_ATTR(pwm##index, S_IWUSR | S_IRUGO, fan_value_show, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE);\ + static SENSOR_DEVICE_ATTR(pwm##index##_enable, S_IWUSR | S_IRUGO, get_enable, set_enable, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan_duty_cycle_percentage.dev_attr.attr, \ + &sensor_dev_attr_pwm##index.dev_attr.attr, \ + &sensor_dev_attr_pwm##index##_enable.dev_attr.attr + +#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_present, S_IWUSR|S_IRUGO, fan_value_show, fan_value_store, FAN##index##_PRESENT) +#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr + + +#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IWUSR|S_IRUGO, fan_value_show, fan_value_store, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IWUSR|S_IRUGO, fan_value_show, fan_value_store, FAN##index##_REAR_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IWUSR|S_IRUGO, fan_value_show, fan_value_store, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index2##_input, S_IWUSR|S_IRUGO, fan_value_show, fan_value_store, FAN##index##_REAR_SPEED_RPM) +#define DECLARE_FAN_SPEED_RPM_ATTR(index, index2) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_input.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_input.dev_attr.attr + +/* 6 fan fault attributes in this platform */ +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(6,16); +/* 6 fan speed(rpm) attributes in this platform */ +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(6,16); +/* 6 fan present attributes in this platform */ +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(5); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(6); + +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(1); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(2); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(3); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(4); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(5); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(6); + +/* 1 fan duty cycle attribute in this platform */ +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(1); + +static struct attribute *as7716_32xb_fan_attributes[] = { + /* fan related attributes */ + DECLARE_FAN_FAULT_ATTR(1,11), + DECLARE_FAN_FAULT_ATTR(2,12), + DECLARE_FAN_FAULT_ATTR(3,13), + DECLARE_FAN_FAULT_ATTR(4,14), + DECLARE_FAN_FAULT_ATTR(5,15), + DECLARE_FAN_FAULT_ATTR(6,16), + DECLARE_FAN_SPEED_RPM_ATTR(1,11), + DECLARE_FAN_SPEED_RPM_ATTR(2,12), + DECLARE_FAN_SPEED_RPM_ATTR(3,13), + DECLARE_FAN_SPEED_RPM_ATTR(4,14), + DECLARE_FAN_SPEED_RPM_ATTR(5,15), + DECLARE_FAN_SPEED_RPM_ATTR(6,16), + DECLARE_FAN_PRESENT_ATTR(1), + DECLARE_FAN_PRESENT_ATTR(2), + DECLARE_FAN_PRESENT_ATTR(3), + DECLARE_FAN_PRESENT_ATTR(4), + DECLARE_FAN_PRESENT_ATTR(5), + DECLARE_FAN_PRESENT_ATTR(6), + DECLARE_FAN_DIRECTION_ATTR(1), + DECLARE_FAN_DIRECTION_ATTR(2), + DECLARE_FAN_DIRECTION_ATTR(3), + DECLARE_FAN_DIRECTION_ATTR(4), + DECLARE_FAN_DIRECTION_ATTR(5), + DECLARE_FAN_DIRECTION_ATTR(6), + DECLARE_FAN_DUTY_CYCLE_ATTR(1), + NULL +}; + +#define FAN_DUTY_CYCLE_REG_MASK 0xF +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 100 + +static int as7716_32xb_fan_read_value(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int as7716_32xb_fan_write_value(struct i2c_client *client, u8 reg, u8 value) +{ + return i2c_smbus_write_byte_data(client, reg, value); +} + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + reg_val &= FAN_DUTY_CYCLE_REG_MASK; + return ((u32)(reg_val+1) * 625 + 75)/ 100; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + return ((u32)duty_cycle * 100 / 625) - 1; +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static u8 reg_val_to_direction(u8 reg_val, enum FAN_ID id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 1 : 0; +} +static u8 reg_val_to_is_present(u8 reg_val, enum FAN_ID id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 0 : 1; +} + +static u8 is_fan_fault(struct as7716_32xb_fan_data *data, enum FAN_ID id) +{ + u8 ret = 0; + + /* Check if the speed of front or rear fan is ZERO, + */ + if (!data->front_speed_rpm[id] && + !data->rear_speed_rpm[id] ) + { + ret = 1; + } + + return ret; +} + + +static ssize_t set_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct as7716_32xb_fan_data *data = as7716_32xb_fan_update_device(dev); + int error, value; + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0 || value > 1) + return -EINVAL; + + data->enable = value; + if (value == 0) + { + return set_duty_cycle(dev, da, buf, FAN_MAX_DUTY_CYCLE); + } + return count; +} + + + +static ssize_t get_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as7716_32xb_fan_data *data = as7716_32xb_fan_update_device(dev); + + return sprintf(buf, "%u\n", data->enable); +} + +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + struct i2c_client *client = to_i2c_client(dev); + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0 || value > FAN_MAX_DUTY_CYCLE) + return -EINVAL; + + as7716_32xb_fan_write_value(client, 0x33, 0); /* Disable fan speed watch dog */ + as7716_32xb_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); + return count; +} + +static int fan_array_index_get(int attr_idx) +{ + switch(attr_idx) + { + case FAN1_PRESENT: + case FAN1_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN1_FAULT: + case FAN1_DIRECTION: + return FAN1_ID; + case FAN2_PRESENT: + case FAN2_FRONT_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN2_FAULT: + case FAN2_DIRECTION: + return FAN2_ID; + case FAN3_PRESENT: + case FAN3_FRONT_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN3_FAULT: + case FAN3_DIRECTION: + return FAN3_ID; + case FAN4_PRESENT: + case FAN4_FRONT_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN4_FAULT: + case FAN4_DIRECTION: + return FAN4_ID; + case FAN5_PRESENT: + case FAN5_FRONT_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: + case FAN5_FAULT: + case FAN5_DIRECTION: + return FAN5_ID; + case FAN6_PRESENT: + case FAN6_FRONT_SPEED_RPM: + case FAN6_REAR_SPEED_RPM: + case FAN6_FAULT: + case FAN6_DIRECTION: + return FAN6_ID; + default : + return -1; + } +} + +static ssize_t fan_value_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t size) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_fan_data *data = i2c_get_clientdata(client); + int status = -EINVAL; + int index; + long keyin = 0; + //printk("fan_value_store\n"); + //printk("attr->index=%d\n", attr->index); + mutex_lock(&data->update_lock); + switch (attr->index) + { + case FAN_DUTY_CYCLE_PERCENTAGE: + status = kstrtol(buf, STRING_TO_DEC_VALUE, &keyin); + if (status) + break; + if (keyin > 1 || keyin < 0) + break; + data->duty_cycle=keyin; + break; + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN5_FRONT_SPEED_RPM: + case FAN6_FRONT_SPEED_RPM: + status = kstrtol(buf, STRING_TO_DEC_VALUE, &keyin); + if (status) + break; + index=fan_array_index_get(attr->index); + if(index < 0 || index > (FAN_NUM_MAX-1)) + break; + data->front_speed_rpm[index]=keyin; + break; + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: + case FAN6_REAR_SPEED_RPM: + status = kstrtol(buf, STRING_TO_DEC_VALUE, &keyin); + if (status) + break; + index=fan_array_index_get(attr->index); + if(index < 0 || index > (FAN_NUM_MAX-1)) + break; + data->rear_speed_rpm[index]=keyin; + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + case FAN6_PRESENT: + status = kstrtol(buf, STRING_TO_DEC_VALUE, &keyin); + if (status) + break; + index=fan_array_index_get(attr->index); + if(index < 0 || index > (FAN_NUM_MAX-1)) + break; + if(keyin < 0 || keyin > 1) + break; + data->present[index]=keyin; + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + case FAN6_FAULT: + status = kstrtol(buf, STRING_TO_DEC_VALUE, &keyin); + if (status) + break; + index=fan_array_index_get(attr->index); + if(index < 0 || index > (FAN_NUM_MAX-1)) + break; + if(keyin < 0 || keyin > 1) + break; + data->fault[index]=keyin; + break; + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + case FAN5_DIRECTION: + case FAN6_DIRECTION: + status = kstrtol(buf, STRING_TO_DEC_VALUE, &keyin); + if (status) + break; + index=fan_array_index_get(attr->index); + if(index < 0 || index > (FAN_NUM_MAX-1)) + break; + if(keyin < 0 || keyin > 1) + break; + data->direction[index]=keyin; + break; + default: + break; + } + mutex_unlock(&data->update_lock); + return size; +} +static ssize_t fan_value_show(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_fan_data *data = i2c_get_clientdata(client); + int status = -EINVAL; + int index=0; + //printk("ffan_value_show\n"); + //printk("attr->index=%d\n", attr->index); + mutex_lock(&data->update_lock); + switch (attr->index) + { + case FAN_DUTY_CYCLE_PERCENTAGE: + status = sprintf(buf, "%u\n", data->duty_cycle); + break; + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN5_FRONT_SPEED_RPM: + case FAN6_FRONT_SPEED_RPM: + index=fan_array_index_get(attr->index); + if(index < 0 || index > (FAN_NUM_MAX-1)) + break; + status = sprintf(buf, "%u\n", data->front_speed_rpm[index]); + break; + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: + case FAN6_REAR_SPEED_RPM: + index=fan_array_index_get(attr->index); + if(index < 0 || index > (FAN_NUM_MAX-1)) + break; + status = sprintf(buf, "%u\n", data->rear_speed_rpm[index]); + break; + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + case FAN6_PRESENT: + index=fan_array_index_get(attr->index); + if(index < 0 || index > (FAN_NUM_MAX-1)) + break; + status = sprintf(buf, "%d\n", data->present[index]); + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + case FAN6_FAULT: + index=fan_array_index_get(attr->index); + if(index < 0 || index > (FAN_NUM_MAX-1)) + break; + status = sprintf(buf, "%d\n", is_fan_fault(data, index)); + break; + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + case FAN5_DIRECTION: + case FAN6_DIRECTION: + index=fan_array_index_get(attr->index);; + if(index < 0 || index > (FAN_NUM_MAX-1)) + break; + status = sprintf(buf, "%d\n", data->direction[index]); + break; + default: + break; + } + mutex_unlock(&data->update_lock); + return status; +} + +static const struct attribute_group as7716_32xb_fan_group = { + .attrs = as7716_32xb_fan_attributes, +}; + +static struct as7716_32xb_fan_data *as7716_32xb_fan_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_fan_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + dev_dbg(&client->dev, "Starting as7716_32xb_fan update\n"); + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { + int status = as7716_32xb_fan_read_value(client, fan_reg[i]); + + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + dev_dbg(&client->dev, "reg %d, err %d\n", fan_reg[i], status); + return data; + } + else { + data->reg_val[i] = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int as7716_32xb_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7716_32xb_fan_data *data; + int status; + + data = kzalloc(sizeof(struct as7716_32xb_fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7716_32xb_fan_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7716_32xb_fan_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7716_32xb_fan_remove(struct i2c_client *client) +{ + struct as7716_32xb_fan_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7716_32xb_fan_group); + + return 0; +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x66, I2C_CLIENT_END }; + +static const struct i2c_device_id as7716_32xb_fan_id[] = { + { "as7716_32xb_fan", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7716_32xb_fan_id); + +static struct i2c_driver as7716_32xb_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = as7716_32xb_fan_probe, + .remove = as7716_32xb_fan_remove, + .id_table = as7716_32xb_fan_id, + .address_list = normal_i2c, +}; + +static int __init as7716_32xb_fan_init(void) +{ + return i2c_add_driver(&as7716_32xb_fan_driver); +} + +static void __exit as7716_32xb_fan_exit(void) +{ + i2c_del_driver(&as7716_32xb_fan_driver); +} + +module_init(as7716_32xb_fan_init); +module_exit(as7716_32xb_fan_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7716_32xb_fan driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_leds.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_leds.c new file mode 100755 index 00000000000..2fa3fd722cb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_leds.c @@ -0,0 +1,443 @@ +/* + * A LED driver for the as7716_32xb_led + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +extern void led_classdev_unregister(struct led_classdev *led_cdev); +extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); +extern void led_classdev_resume(struct led_classdev *led_cdev); +extern void led_classdev_suspend(struct led_classdev *led_cdev); + +#define DRVNAME "as7716_32x_led" + +struct as7716_32x_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[1]; /* only 1 register*/ +}; + +static struct as7716_32x_led_data *ledctl = NULL; + +/* LED related data + */ + +#define LED_CNTRLER_I2C_ADDRESS (0x60) + +#define LED_TYPE_DIAG_REG_MASK (0x3) +#define LED_MODE_DIAG_GREEN_VALUE (0x02) +#define LED_MODE_DIAG_RED_VALUE (0x01) +#define LED_MODE_DIAG_AMBER_VALUE (0x00) /*It's yellow actually. Green+Red=Yellow*/ +#define LED_MODE_DIAG_OFF_VALUE (0x03) + + +#define LED_TYPE_LOC_REG_MASK (0x80) +#define LED_MODE_LOC_ON_VALUE (0) +#define LED_MODE_LOC_OFF_VALUE (0x80) + +enum led_type { + LED_TYPE_DIAG, + LED_TYPE_LOC, + LED_TYPE_FAN, + LED_TYPE_PSU1, + LED_TYPE_PSU2 +}; + +struct led_reg { + u32 types; + u8 reg_addr; +}; + +static const struct led_reg led_reg_map[] = { + {(1<update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting as7716_32x_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = as7716_32x_led_read_value(led_reg_map[i].reg_addr); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg_map[i].reg_addr, status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void as7716_32x_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + enum led_type type) +{ + int reg_val; + u8 reg ; + mutex_lock(&ledctl->update_lock); + + if( !getLedReg(type, ®)) + { + dev_dbg(&ledctl->pdev->dev, "Not match item for %d.\n", type); + } + + reg_val = as7716_32x_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + as7716_32x_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + + +static void as7716_32x_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + as7716_32x_led_set(led_cdev, led_light_mode, LED_TYPE_DIAG); +} + +static enum led_brightness as7716_32x_led_diag_get(struct led_classdev *cdev) +{ + as7716_32x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void as7716_32x_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + as7716_32x_led_set(led_cdev, led_light_mode, LED_TYPE_LOC); +} + +static enum led_brightness as7716_32x_led_loc_get(struct led_classdev *cdev) +{ + as7716_32x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static void as7716_32x_led_auto_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ +} + +static enum led_brightness as7716_32x_led_auto_get(struct led_classdev *cdev) +{ + return LED_MODE_AUTO; +} + +static struct led_classdev as7716_32x_leds[] = { + [LED_TYPE_DIAG] = { + .name = "as7716_32x_led::diag", + .default_trigger = "unused", + .brightness_set = as7716_32x_led_diag_set, + .brightness_get = as7716_32x_led_diag_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_RED, + }, + [LED_TYPE_LOC] = { + .name = "as7716_32x_led::loc", + .default_trigger = "unused", + .brightness_set = as7716_32x_led_loc_set, + .brightness_get = as7716_32x_led_loc_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_BLUE, + }, + [LED_TYPE_FAN] = { + .name = "as7716_32x_led::fan", + .default_trigger = "unused", + .brightness_set = as7716_32x_led_auto_set, + .brightness_get = as7716_32x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU1] = { + .name = "as7716_32x_led::psu1", + .default_trigger = "unused", + .brightness_set = as7716_32x_led_auto_set, + .brightness_get = as7716_32x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "as7716_32x_led::psu2", + .default_trigger = "unused", + .brightness_set = as7716_32x_led_auto_set, + .brightness_get = as7716_32x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, +}; + +static int as7716_32x_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(as7716_32x_leds); i++) { + led_classdev_suspend(&as7716_32x_leds[i]); + } + + return 0; +} + +static int as7716_32x_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(as7716_32x_leds); i++) { + led_classdev_resume(&as7716_32x_leds[i]); + } + + return 0; +} + +static int as7716_32x_led_probe(struct platform_device *pdev) +{ + int ret, i; + + printk("as7716_32x_led_probe 1\n"); + for (i = 0; i < ARRAY_SIZE(as7716_32x_leds); i++) { + ret = led_classdev_register(&pdev->dev, &as7716_32x_leds[i]); + + if (ret < 0) + { + printk("ret < 0, i=%d\n", i); + break; + } + } + printk("as7716_32x_led_probe 2\n"); + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(as7716_32x_leds)){ + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&as7716_32x_leds[i]); + } + } + + printk("as7716_32x_led_probe 3\n"); + return 0; +} + +static int as7716_32x_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(as7716_32x_leds); i++) { + led_classdev_unregister(&as7716_32x_leds[i]); + } + + return 0; +} + +static struct platform_driver as7716_32x_led_driver = { + .probe = as7716_32x_led_probe, + .remove = as7716_32x_led_remove, + .suspend = as7716_32x_led_suspend, + .resume = as7716_32x_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init as7716_32x_led_init(void) +{ + int ret; + + printk("leds:1\n"); + ret = platform_driver_register(&as7716_32x_led_driver); + if (ret < 0) { + printk("leds:fail platform_driver_register\n"); + goto exit; + } + printk("leds:2\n"); + ledctl = kzalloc(sizeof(struct as7716_32x_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&as7716_32x_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + printk("leds:3\n"); + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + printk("leds:fail platform_device_register_simple\n"); + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&as7716_32x_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return 0; +} + +static void __exit as7716_32x_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&as7716_32x_led_driver); + kfree(ledctl); +} + +module_init(as7716_32x_led_init); +module_exit(as7716_32x_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7716_32x_led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_oom.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_oom.c new file mode 100755 index 00000000000..5e88d9efad5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_oom.c @@ -0,0 +1,267 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define STRING_TO_DEC_VALUE 10 +#define EEPROM_DATA_SIZE 512 + + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; +#define MAX_PORT_NAME_LEN 20 +/* Each client has this additional data + */ +struct as7716_32xb_oom_data { + struct device *hwmon_dev; + struct mutex lock; + u8 index; + unsigned char eeprom[EEPROM_DATA_SIZE]; + char port_name[MAX_PORT_NAME_LEN]; + +}; + + + +enum as7716_32xb_oom_sysfs_attributes { + TEMP1_INPUT, + TEMP1_MAX_HYST, + TEMP1_MAX +}; + +/* sysfs attributes for hwmon + */ + +static ssize_t oom_info_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t oom_info_show(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_port_name(struct device *dev, + struct device_attribute *dattr, char *buf); +static ssize_t set_port_name(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count); +static SENSOR_DEVICE_ATTR(eeprom, S_IWUSR|S_IRUGO, oom_info_show, oom_info_store, 0); +static SENSOR_DEVICE_ATTR(port_name, S_IRUGO | S_IWUSR, show_port_name, set_port_name, 1); + + +static struct attribute *as7716_32xb_oom_attributes[] = { + &sensor_dev_attr_eeprom.dev_attr.attr, + &sensor_dev_attr_port_name.dev_attr.attr, + NULL +}; + + +static ssize_t oom_info_show(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_oom_data *data = i2c_get_clientdata(client); + int i; + + mutex_lock(&data->lock); + memcpy(buf, data->eeprom, EEPROM_DATA_SIZE); + //for(i=0; i < EEPROM_DATA_SIZE ; i++) + //{ + // buf[i]=data->eeprom[i]; + // printk("buf[%d]=0x%x ",i, buf[i]); + //} + //status = EEPROM_DATA_SIZE+1; + + + memcpy(buf, data->eeprom, 256); + mutex_unlock(&data->lock); + + return 256; +} + +static ssize_t oom_info_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t size) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_oom_data *data = i2c_get_clientdata(client); + int i=0, j=0, k=0; + unsigned char str[3]; + unsigned int val; + + // printk("strlen(buf)=%d\n",strlen(buf)); + k=0; + mutex_lock(&data->lock); + memset(data->eeprom, 0xFF, EEPROM_DATA_SIZE); + memset(str, 0x0, 3); + if(strlen(buf) >= 256 ) + { + for(i=0; i < strlen(buf) ; i++) + { + // printk("i=%d ", i); + for(j=0;j<2; j++) + { + str[j]=buf[i+j]; + } + sscanf(str, "%x", &val); + //printk("str=%s val=0x%x ", str, val); + i=j+i-1; + if(k>=EEPROM_DATA_SIZE) + { + break; + } + data->eeprom[k]=(unsigned char)val; + //printk("data->eeprom[%d]=0x%x\n",k, data->eeprom[k]); + k++; + } + } + //printk("buf=\n"); + //for(i=0; i < strlen(buf) ; i++) + //{ + // printk("%c%c ", buf[i], buf[i+1]); + // if((i % 31)==0) + // printk("\n"); + //} + //printk("\n"); + + + mutex_unlock(&data->lock); + return size; + +} + +static ssize_t show_port_name(struct device *dev, + struct device_attribute *dattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_oom_data *data = i2c_get_clientdata(client); + ssize_t count; + + mutex_lock(&data->lock); + count = sprintf(buf, "%s\n", data->port_name); + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t set_port_name(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_oom_data *data = i2c_get_clientdata(client); + char port_name[MAX_PORT_NAME_LEN]; + + /* no checking, this value is not used except by show_port_name */ + + if (sscanf(buf, "%19s", port_name) != 1) + return -EINVAL; + + mutex_lock(&data->lock); + strcpy(data->port_name, port_name); + mutex_unlock(&data->lock); + + return count; +} + + +static const struct attribute_group as7716_32xb_oom_group = { + .attrs = as7716_32xb_oom_attributes, +}; + +static int as7716_32xb_oom_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7716_32xb_oom_data *data; + int status; + + data = kzalloc(sizeof(struct as7716_32xb_oom_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + i2c_set_clientdata(client, data); + data->index = dev_id->driver_data; + mutex_init(&data->lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7716_32xb_oom_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: oom '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7716_32xb_oom_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7716_32xb_oom_remove(struct i2c_client *client) +{ + struct as7716_32xb_oom_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7716_32xb_oom_group); + kfree(data); + + return 0; +} + + +static const struct i2c_device_id as7716_32xb_oom_id[] = { + { "as7716_32xb_oom", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7716_32xb_oom_id); + +static struct i2c_driver as7716_32xb_oom_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7716_32xb_oom", + }, + .probe = as7716_32xb_oom_probe, + .remove = as7716_32xb_oom_remove, + .id_table = as7716_32xb_oom_id, + .address_list = normal_i2c, +}; + + + + + + +static int __init as7716_32xb_oom_init(void) +{ + return i2c_add_driver(&as7716_32xb_oom_driver); +} + +static void __exit as7716_32xb_oom_exit(void) +{ + i2c_del_driver(&as7716_32xb_oom_driver); +} + +module_init(as7716_32xb_oom_init); +module_exit(as7716_32xb_oom_exit); + +MODULE_AUTHOR("Jostar yang "); +MODULE_DESCRIPTION("as7716_32xb_oom driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_pmbus.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_pmbus.c new file mode 100755 index 00000000000..3f4dba90d1a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_pmbus.c @@ -0,0 +1,444 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define STRING_TO_DEC_VALUE 10 + + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as7716_32xb_pmbus_data { + struct device *hwmon_dev; + struct mutex update_lock; + u8 index; + u8 capability; + u16 status_word; + u8 fan_fault; + u8 over_temp; + u16 v_out; + u16 i_out; + u16 p_out; + u16 temp; + u16 fan_speed; + u16 fan_duty_cycle; + u8 fan_dir[4]; + u8 pmbus_revision; + u8 mfr_id[10]; + u8 mfr_model[10]; + u8 mfr_revision[3]; + u16 mfr_vin_min; + u16 mfr_vin_max; + u16 mfr_iin_max; + u16 mfr_iout_max; + u16 mfr_pin_max; + u16 mfr_pout_max; + u16 mfr_vout_min; + u16 mfr_vout_max; + u16 power_on; + u16 temp_fault; + u16 power_good; +}; + + + +enum as7716_32xb_pmbus_sysfs_attributes { + PSU_POWER_ON = 0, + PSU_TEMP_FAULT, + PSU_POWER_GOOD, + PSU_FAN1_FAULT, + PSU_FAN_DIRECTION, + PSU_OVER_TEMP, + PSU_V_OUT, + PSU_I_OUT, + PSU_P_OUT, + PSU_P_OUT_UV, /*In Unit of microVolt, instead of mini.*/ + PSU_TEMP1_INPUT, + PSU_FAN1_SPEED, + PSU_FAN1_DUTY_CYCLE, + PSU_PMBUS_REVISION, + PSU_MFR_ID, + PSU_MFR_MODEL, + PSU_MFR_REVISION, + PSU_MFR_VIN_MIN, + PSU_MFR_VIN_MAX, + PSU_MFR_VOUT_MIN, + PSU_MFR_VOUT_MAX, + PSU_MFR_IIN_MAX, + PSU_MFR_IOUT_MAX, + PSU_MFR_PIN_MAX, + PSU_MFR_POUT_MAX +}; + +/* sysfs attributes for hwmon + */ +static ssize_t pmbus_info_show(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t pmbus_info_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static SENSOR_DEVICE_ATTR(psu_power_on, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_POWER_ON); +static SENSOR_DEVICE_ATTR(psu_temp_fault, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_TEMP_FAULT); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(psu_over_temp, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_OVER_TEMP); +static SENSOR_DEVICE_ATTR(psu_v_out, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(psu_i_out, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(psu_p_out, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(psu_temp1_input,S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm,S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(psu_fan_dir, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_FAN_DIRECTION); +static SENSOR_DEVICE_ATTR(psu_pmbus_revision,S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_PMBUS_REVISION); +static SENSOR_DEVICE_ATTR(psu_mfr_id, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_MFR_ID); +static SENSOR_DEVICE_ATTR(psu_mfr_model, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu_mfr_revision, S_IWUSR| S_IRUGO, pmbus_info_show,pmbus_info_store, PSU_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu_mfr_vin_min, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_MFR_VIN_MIN); +static SENSOR_DEVICE_ATTR(psu_mfr_vin_max, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_MFR_VIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_vout_min, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_MFR_VOUT_MIN); +static SENSOR_DEVICE_ATTR(psu_mfr_vout_max, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_MFR_VOUT_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_iin_max, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_MFR_IIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_iout_max, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_MFR_IOUT_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_pin_max, S_IWUSR|S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_MFR_PIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_pout_max, S_IWUSR| S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_MFR_POUT_MAX); + +/*Duplicate nodes for lm-sensors.*/ +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_P_OUT_UV); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(temp1_fault, S_IRUGO, pmbus_info_show, pmbus_info_store, PSU_TEMP_FAULT); + + +static struct attribute *as7716_32xb_pmbus_attributes[] = { + &sensor_dev_attr_psu_power_on.dev_attr.attr, + &sensor_dev_attr_psu_temp_fault.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, + &sensor_dev_attr_psu_over_temp.dev_attr.attr, + &sensor_dev_attr_psu_v_out.dev_attr.attr, + &sensor_dev_attr_psu_i_out.dev_attr.attr, + &sensor_dev_attr_psu_p_out.dev_attr.attr, + &sensor_dev_attr_psu_temp1_input.dev_attr.attr, + &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, + &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, + &sensor_dev_attr_psu_fan_dir.dev_attr.attr, + &sensor_dev_attr_psu_pmbus_revision.dev_attr.attr, + &sensor_dev_attr_psu_mfr_id.dev_attr.attr, + &sensor_dev_attr_psu_mfr_model.dev_attr.attr, + &sensor_dev_attr_psu_mfr_revision.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vin_min.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_pout_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_iin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_pin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vout_min.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vout_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_iout_max.dev_attr.attr, + /*Duplicate nodes for lm-sensors.*/ + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_temp1_fault.dev_attr.attr, + NULL +}; + + +static ssize_t pmbus_info_show(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_pmbus_data *data = i2c_get_clientdata(client); + int status = -EINVAL; + //printk("pmbus_info_show\n"); + printk("attr->index=%d\n", attr->index); + mutex_lock(&data->update_lock); + switch (attr->index) + { + case PSU_POWER_ON: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->power_on); + break; + case PSU_TEMP_FAULT: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->temp_fault); + break; + case PSU_POWER_GOOD: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->power_good); + break; + case PSU_FAN1_FAULT: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->fan_fault); + break; + case PSU_FAN_DIRECTION: + status=snprintf(buf, PAGE_SIZE-1, "%s\r\n", data->fan_dir); + break; + case PSU_OVER_TEMP: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->over_temp); + break; + case PSU_V_OUT: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->v_out); + break; + case PSU_I_OUT: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->i_out); + break; + case PSU_P_OUT: + printk("read PSU_P_OUT\n"); + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->p_out); + break; + case PSU_P_OUT_UV: + printk("read PSU_P_OUT_UV\n"); + status=snprintf(buf, PAGE_SIZE-1, "%ld\r\n", data->p_out * 1000000); + break; + case PSU_TEMP1_INPUT: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->temp); + break; + case PSU_FAN1_SPEED: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->fan_speed); + break; + case PSU_FAN1_DUTY_CYCLE: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->fan_duty_cycle); + break; + case PSU_PMBUS_REVISION: + break; + case PSU_MFR_ID: + status=snprintf(buf, PAGE_SIZE-1, "%s\r\n", data->mfr_id); + break; + case PSU_MFR_MODEL: + status=snprintf(buf, PAGE_SIZE-1, "%s\r\n", data->mfr_model); + break; + case PSU_MFR_REVISION: + status=snprintf(buf, PAGE_SIZE-1, "%s\r\n", data->mfr_revision); + break; + case PSU_MFR_VIN_MIN: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->mfr_vin_min); + break; + case PSU_MFR_VIN_MAX: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->mfr_vin_max); + break; + case PSU_MFR_VOUT_MIN: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->mfr_vin_max); + break; + case PSU_MFR_VOUT_MAX: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->mfr_vout_max); + break; + case PSU_MFR_IIN_MAX: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->mfr_iin_max); + break; + case PSU_MFR_IOUT_MAX: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->mfr_iout_max); + break; + case PSU_MFR_PIN_MAX: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->mfr_pin_max); + break; + case PSU_MFR_POUT_MAX: + status=snprintf(buf, PAGE_SIZE-1, "%d\r\n", data->mfr_pout_max); + break; + default : + break; + } + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t pmbus_info_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_pmbus_data *data = i2c_get_clientdata(client); + long keyin = 0; + int status = -EINVAL; + //printk("pmbus_info_store\n"); + //printk("attr->index=%d\n", attr->index); + mutex_lock(&data->update_lock); + status = kstrtol(buf, STRING_TO_DEC_VALUE, &keyin); + switch (attr->index) + { + case PSU_POWER_ON: + data->power_on=keyin; + break; + case PSU_TEMP_FAULT: + data->temp_fault=keyin; + break; + case PSU_POWER_GOOD: + data->power_good=keyin; + break; + case PSU_FAN1_FAULT: + break; + case PSU_FAN_DIRECTION: + memcpy(data->fan_dir, buf, sizeof(data->fan_dir)); + break; + case PSU_OVER_TEMP: + data->over_temp=keyin; + break; + case PSU_V_OUT: + data->v_out=keyin; + break; + case PSU_I_OUT: + data->i_out=keyin; + break; + case PSU_P_OUT: + printk("data->p_out=%d\n", data->p_out); + data->p_out=keyin; + break; + case PSU_P_OUT_UV: + //multiplier = 1000000; /*For lm-sensors, unit is micro-Volt.*/ + + break; + case PSU_TEMP1_INPUT: + data->temp=keyin; + break; + case PSU_FAN1_SPEED: + data->fan_speed=keyin; + break; + case PSU_FAN1_DUTY_CYCLE: + break; + case PSU_PMBUS_REVISION: + data->pmbus_revision=keyin; + break; + case PSU_MFR_ID: + memcpy(data->mfr_id, buf, sizeof(data->mfr_id)); + break; + case PSU_MFR_MODEL: + memcpy(data->mfr_model, buf, sizeof(data->mfr_model)); + break; + case PSU_MFR_REVISION: + memcpy(data->mfr_revision, buf, sizeof(data->mfr_revision)); + break; + case PSU_MFR_VIN_MIN: + data->mfr_vin_min=keyin; + break; + case PSU_MFR_VIN_MAX: + data->mfr_vin_max=keyin; + break; + case PSU_MFR_VOUT_MIN: + data->mfr_vout_min=keyin; + break; + case PSU_MFR_VOUT_MAX: + data->mfr_vout_max=keyin; + break; + case PSU_MFR_IIN_MAX: + data->mfr_iin_max=keyin; + break; + case PSU_MFR_IOUT_MAX: + data->mfr_iout_max=keyin; + break; + case PSU_MFR_PIN_MAX: + data->mfr_pin_max=keyin; + break; + case PSU_MFR_POUT_MAX: + data->mfr_pout_max=keyin; + break; + default : + break; + } + mutex_unlock(&data->update_lock); + return count; +} + + +static const struct attribute_group as7716_32xb_pmbus_group = { + .attrs = as7716_32xb_pmbus_attributes, +}; + +static int as7716_32xb_pmbus_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7716_32xb_pmbus_data *data; + int status; + + data = kzalloc(sizeof(struct as7716_32xb_pmbus_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + i2c_set_clientdata(client, data); + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7716_32xb_pmbus_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: pmbus '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7716_32xb_pmbus_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7716_32xb_pmbus_remove(struct i2c_client *client) +{ + struct as7716_32xb_pmbus_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7716_32xb_pmbus_group); + kfree(data); + + return 0; +} + + +static const struct i2c_device_id as7716_32xb_pmbus_id[] = { + { "as7716_32xb_pmbus", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7716_32xb_pmbus_id); + +static struct i2c_driver as7716_32xb_pmbus_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7716_32xb_pmbus", + }, + .probe = as7716_32xb_pmbus_probe, + .remove = as7716_32xb_pmbus_remove, + .id_table = as7716_32xb_pmbus_id, + .address_list = normal_i2c, +}; + + + + + + +static int __init as7716_32xb_pmbus_init(void) +{ + return i2c_add_driver(&as7716_32xb_pmbus_driver); +} + +static void __exit as7716_32xb_pmbus_exit(void) +{ + i2c_del_driver(&as7716_32xb_pmbus_driver); +} + +module_init(as7716_32xb_pmbus_init); +module_exit(as7716_32xb_pmbus_exit); + +MODULE_AUTHOR("Jostar yang "); +MODULE_DESCRIPTION("as7716_32xb_pmbus driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_psu.c new file mode 100755 index 00000000000..01756e8596e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_psu.c @@ -0,0 +1,355 @@ +/* + * An hwmon driver for accton as7716_32xbb Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_MODEL_NAME 16 +#define DC12V_FAN_DIR_OFFSET 0x34 +#define DC12V_FAN_DIR_LEN 3 +#define STRING_TO_DEC_VALUE 10 + +//static ssize_t show_string(struct device *dev, struct device_attribute *da, char *buf); +static int as7716_32xb_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as7716_32xb_cpld_read (unsigned short cpld_addr, u8 reg); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as7716_32xb_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + u8 present; + u8 power_good; + char model_name[MAX_MODEL_NAME+1]; /* Model name, read from eeprom */ + char fan_dir[DC12V_FAN_DIR_LEN+1]; /* DC12V fan direction */ +}; + +enum as7716_32xb_psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD, + PSU_FAN_DIR /* For DC12V only */ +}; + +/* sysfs attributes for hwmon + */ +static ssize_t psu_info_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t psu_info_show(struct device *dev, struct device_attribute *da, + char *buf); +static SENSOR_DEVICE_ATTR(psu_present, S_IWUSR|S_IRUGO, psu_info_show, psu_info_store, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IWUSR|S_IRUGO, psu_info_show, psu_info_store, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IWUSR|S_IRUGO, psu_info_show, psu_info_store, PSU_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu_fan_dir, S_IWUSR|S_IRUGO, psu_info_show, psu_info_store, PSU_FAN_DIR); + + +static struct attribute *as7716_32xb_psu_attributes[] = { + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + &sensor_dev_attr_psu_fan_dir.dev_attr.attr, + NULL +}; + +static ssize_t psu_info_show(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_psu_data *data = i2c_get_clientdata(client); + int status = -EINVAL; + //printk("psu_info_show\n"); + // printk("attr->index=%d\n", attr->index); + mutex_lock(&data->update_lock); + switch (attr->index) + { + case PSU_PRESENT: + //printk("data->present=%d\n",data->present); + status = snprintf(buf, PAGE_SIZE - 1, "%d\r\n", data->present); + break; + case PSU_MODEL_NAME: + //printk("data->model_name=%s\n",data->model_name); + status = snprintf(buf, PAGE_SIZE - 1, "%s\r\n", data->model_name); + break; + case PSU_POWER_GOOD: + // printk("data->present=%d\n",data->power_good); + status = snprintf(buf, PAGE_SIZE - 1, "%d\r\n", data->power_good); + break; + case PSU_FAN_DIR: + //printk("data->fan_dir=%s\n",data->fan_dir); + status = snprintf(buf, PAGE_SIZE - 1, "%s\r\n", data->fan_dir); + break; + default : + break; + } + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t psu_info_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_psu_data *data = i2c_get_clientdata(client); + long keyin = 0; + int status = -EINVAL; + //printk("psu_info_store\n"); + //printk("attr->index=%d\n", attr->index); + mutex_lock(&data->update_lock); + switch (attr->index) + { + case PSU_PRESENT: + status = kstrtol(buf, STRING_TO_DEC_VALUE, &keyin); + if (status) + goto fail_exit; + if (keyin > 1 || keyin < 0) + goto fail_exit; + data->present=keyin; + break; + case PSU_MODEL_NAME: + memcpy(data->model_name, buf, MAX_MODEL_NAME); + break; + case PSU_POWER_GOOD: + status = kstrtol(buf, STRING_TO_DEC_VALUE, &keyin); + if (status) + goto fail_exit; + if (keyin > 1 || keyin < 0) + goto fail_exit; + data->power_good=keyin; + break; + case PSU_FAN_DIR: + memcpy(data->fan_dir, buf, DC12V_FAN_DIR_LEN); + break; + default : + goto fail_exit; + } + mutex_unlock(&data->update_lock); + return count; + +fail_exit: + mutex_unlock(&data->update_lock); + return -EINVAL; +} + +static const struct attribute_group as7716_32xb_psu_group = { + .attrs = as7716_32xb_psu_attributes, +}; + +static int as7716_32xb_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7716_32xb_psu_data *data; + int status; + + data = kzalloc(sizeof(struct as7716_32xb_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7716_32xb_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7716_32xb_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7716_32xb_psu_remove(struct i2c_client *client) +{ + struct as7716_32xb_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7716_32xb_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as7716_32xb_psu1, + as7716_32xb_psu2 +}; + +static const struct i2c_device_id as7716_32xb_psu_id[] = { + { "as7716_32xb_psu1", as7716_32xb_psu1 }, + { "as7716_32xb_psu2", as7716_32xb_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7716_32xb_psu_id); + +static struct i2c_driver as7716_32xb_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7716_32xb_psu", + }, + .probe = as7716_32xb_psu_probe, + .remove = as7716_32xb_psu_remove, + .id_table = as7716_32xb_psu_id, + .address_list = normal_i2c, +}; + +static int as7716_32xb_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = 0; + int retry_count = 5; + + while (retry_count) { + retry_count--; + + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) { + msleep(10); + continue; + } + + if (unlikely(result != data_len)) { + result = -EIO; + msleep(10); + continue; + } + + result = 0; + break; + } + + return result; +} + +enum psu_type { + PSU_TYPE_AC_110V, + PSU_TYPE_DC_48V, + PSU_TYPE_DC_12V +}; + +struct model_name_info { + enum psu_type type; + u8 offset; + u8 length; + char* model_name; +}; + +struct model_name_info models[] = { +{PSU_TYPE_AC_110V, 0x20, 8, "YM-2651Y"}, +{PSU_TYPE_DC_48V, 0x20, 8, "YM-2651V"}, +{PSU_TYPE_DC_12V, 0x00, 11, "PSU-12V-750"}, +}; + +static int as7716_32xb_psu_model_name_get(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_psu_data *data = i2c_get_clientdata(client); + int i, status; + + for (i = 0; i < ARRAY_SIZE(models); i++) { + memset(data->model_name, 0, sizeof(data->model_name)); + + status = as7716_32xb_psu_read_block(client, models[i].offset, + data->model_name, models[i].length); + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x) offset(0x%x)\n", + client->addr, models[i].offset); + return status; + } + else { + data->model_name[models[i].length] = '\0'; + } + + /* Determine if the model name is known, if not, read next index + */ + if (strncmp(data->model_name, models[i].model_name, models[i].length) == 0) { + return 0; + } + else { + data->model_name[0] = '\0'; + } + } + + return -ENODATA; +} + +static int __init as7716_32xb_psu_init(void) +{ + return i2c_add_driver(&as7716_32xb_psu_driver); +} + +static void __exit as7716_32xb_psu_exit(void) +{ + i2c_del_driver(&as7716_32xb_psu_driver); +} + +module_init(as7716_32xb_psu_init); +module_exit(as7716_32xb_psu_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7716_32xb_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_sfp.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_sfp.c new file mode 100755 index 00000000000..9c7a0563215 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_sfp.c @@ -0,0 +1,365 @@ +/* + * An hwmon driver for accton as7716_32x sfp + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BIT_INDEX(i) (1UL << (i)) +#define I2C_ADDR_CPLD1 0x60 +#define I2C_ADDR_CPLD2 0x62 +#define I2C_ADDR_CPLD3 0x64 +#define CPLD1_OFFSET_QSFP_PRESET1 0x30 +#define CPLD1_OFFSET_QSFP_PRESET2 0x31 +#define CPLD1_OFFSET_QSFP_PRESET3 0x32 +#define CPLD1_OFFSET_QSFP_PRESET4 0x33 + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x50, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as7716_32x_sfp_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + int port; /* Front port index */ + char eeprom[256]; /* eeprom data */ + u32 is_present; /* present status */ +}; + +static struct as7716_32x_sfp_data *as7716_32x_sfp_update_device(struct device *dev); +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_present(struct device *dev, struct device_attribute *da,char *buf); +static ssize_t show_eeprom(struct device *dev, struct device_attribute *da, char *buf); +extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +enum as7716_32x_sfp_sysfs_attributes { + SFP_PORT_NUMBER, + SFP_IS_PRESENT, + SFP_IS_PRESENT_ALL, + SFP_EEPROM +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(sfp_port_number, S_IRUGO, show_port_number, NULL, SFP_PORT_NUMBER); +static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, show_present, NULL, SFP_IS_PRESENT); +static SENSOR_DEVICE_ATTR(sfp_is_present_all, S_IRUGO, show_present, NULL, SFP_IS_PRESENT_ALL); +static SENSOR_DEVICE_ATTR(sfp_eeprom, S_IRUGO, show_eeprom, NULL, SFP_EEPROM); + +static struct attribute *as7716_32x_sfp_attributes[] = { + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, + &sensor_dev_attr_sfp_eeprom.dev_attr.attr, + NULL +}; + +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32x_sfp_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->port+1); +} + +/* Error-check the CPLD read results. */ +#define VALIDATED_READ(_buf, _rv, _read_expr, _invert) \ +do { \ + _rv = (_read_expr); \ + if(_rv < 0) { \ + return sprintf(_buf, "READ ERROR\n"); \ + } \ + if(_invert) { \ + _rv = ~_rv; \ + } \ + _rv &= 0xFF; \ +} while(0) + +static ssize_t show_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if(attr->index == SFP_IS_PRESENT_ALL) { + int values[4]; + /* + * Report the SFP_PRESENCE status for all ports. + */ + + /* QSFP_PRESENT Ports 1-8 */ + //VALIDATED_READ(buf, values[0], accton_i2c_cpld_read(0x62, 0x9), 1); + VALIDATED_READ(buf, values[0], accton_i2c_cpld_read(I2C_ADDR_CPLD1, CPLD1_OFFSET_QSFP_PRESET1), 1); + /* QSFP_PRESENT Ports 9-16 */ + VALIDATED_READ(buf, values[1], accton_i2c_cpld_read(I2C_ADDR_CPLD1, CPLD1_OFFSET_QSFP_PRESET2), 1); + /* QSFP_PRESENT Ports 17-24 */ + VALIDATED_READ(buf, values[2], accton_i2c_cpld_read(I2C_ADDR_CPLD1, CPLD1_OFFSET_QSFP_PRESET3), 1); + /* QSFP_PRESENT Ports 25-32 */ + VALIDATED_READ(buf, values[3], accton_i2c_cpld_read(I2C_ADDR_CPLD1, CPLD1_OFFSET_QSFP_PRESET4), 1); + + /* Return values 1 -> 32 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], values[3]); + } + else { /* SFP_IS_PRESENT */ + struct as7716_32x_sfp_data *data = as7716_32x_sfp_update_device(dev); + + if (!data->valid) { + printk("return -EIO\n"); + return -EIO; + } + + return sprintf(buf, "%d\n", data->is_present); + } +} + +static ssize_t show_eeprom(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as7716_32x_sfp_data *data = as7716_32x_sfp_update_device(dev); + + if (!data->valid) { + return 0; + } + + if (!data->is_present) { + return 0; + } + + memcpy(buf, data->eeprom, sizeof(data->eeprom)); + + return sizeof(data->eeprom); +} + +static const struct attribute_group as7716_32x_sfp_group = { + .attrs = as7716_32x_sfp_attributes, +}; + +static int as7716_32x_sfp_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7716_32x_sfp_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7716_32x_sfp_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + mutex_init(&data->update_lock); + data->port = dev_id->driver_data; + i2c_set_clientdata(client, data); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7716_32x_sfp_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sfp '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7716_32x_sfp_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7716_32x_sfp_remove(struct i2c_client *client) +{ + struct as7716_32x_sfp_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7716_32x_sfp_group); + kfree(data); + + return 0; +} + +enum port_numbers { +as7716_32x_sfp1, as7716_32x_sfp2, as7716_32x_sfp3, as7716_32x_sfp4, +as7716_32x_sfp5, as7716_32x_sfp6, as7716_32x_sfp7, as7716_32x_sfp8, +as7716_32x_sfp9, as7716_32x_sfp10,as7716_32x_sfp11,as7716_32x_sfp12, +as7716_32x_sfp13,as7716_32x_sfp14,as7716_32x_sfp15,as7716_32x_sfp16, +as7716_32x_sfp17,as7716_32x_sfp18,as7716_32x_sfp19,as7716_32x_sfp20, +as7716_32x_sfp21,as7716_32x_sfp22,as7716_32x_sfp23,as7716_32x_sfp24, +as7716_32x_sfp25,as7716_32x_sfp26,as7716_32x_sfp27,as7716_32x_sfp28, +as7716_32x_sfp29,as7716_32x_sfp30,as7716_32x_sfp31,as7716_32x_sfp32 +}; + +static const struct i2c_device_id as7716_32x_sfp_id[] = { +{ "as7716_32x_sfp1", as7716_32x_sfp1 }, { "as7716_32x_sfp2", as7716_32x_sfp2 }, +{ "as7716_32x_sfp3", as7716_32x_sfp3 }, { "as7716_32x_sfp4", as7716_32x_sfp4 }, +{ "as7716_32x_sfp5", as7716_32x_sfp5 }, { "as7716_32x_sfp6", as7716_32x_sfp6 }, +{ "as7716_32x_sfp7", as7716_32x_sfp7 }, { "as7716_32x_sfp8", as7716_32x_sfp8 }, +{ "as7716_32x_sfp9", as7716_32x_sfp9 }, { "as7716_32x_sfp10", as7716_32x_sfp10 }, +{ "as7716_32x_sfp11", as7716_32x_sfp11 }, { "as7716_32x_sfp12", as7716_32x_sfp12 }, +{ "as7716_32x_sfp13", as7716_32x_sfp13 }, { "as7716_32x_sfp14", as7716_32x_sfp14 }, +{ "as7716_32x_sfp15", as7716_32x_sfp15 }, { "as7716_32x_sfp16", as7716_32x_sfp16 }, +{ "as7716_32x_sfp17", as7716_32x_sfp17 }, { "as7716_32x_sfp18", as7716_32x_sfp18 }, +{ "as7716_32x_sfp19", as7716_32x_sfp19 }, { "as7716_32x_sfp20", as7716_32x_sfp20 }, +{ "as7716_32x_sfp21", as7716_32x_sfp21 }, { "as7716_32x_sfp22", as7716_32x_sfp22 }, +{ "as7716_32x_sfp23", as7716_32x_sfp23 }, { "as7716_32x_sfp24", as7716_32x_sfp24 }, +{ "as7716_32x_sfp25", as7716_32x_sfp25 }, { "as7716_32x_sfp26", as7716_32x_sfp26 }, +{ "as7716_32x_sfp27", as7716_32x_sfp27 }, { "as7716_32x_sfp28", as7716_32x_sfp28 }, +{ "as7716_32x_sfp29", as7716_32x_sfp29 }, { "as7716_32x_sfp30", as7716_32x_sfp30 }, +{ "as7716_32x_sfp31", as7716_32x_sfp31 }, { "as7716_32x_sfp32", as7716_32x_sfp32 }, +{} +}; +MODULE_DEVICE_TABLE(i2c, as7716_32x_sfp_id); + +static struct i2c_driver as7716_32x_sfp_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7716_32x_sfp", + }, + .probe = as7716_32x_sfp_probe, + .remove = as7716_32x_sfp_remove, + .id_table = as7716_32x_sfp_id, + .address_list = normal_i2c, +}; + +static int as7716_32x_sfp_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + result = 0; + +abort: + return result; +} + +static struct as7716_32x_sfp_data *as7716_32x_sfp_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32x_sfp_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status = -1; + int i = 0; + u8 cpld_reg = 0x30 + (data->port/8); + + data->valid = 0; + + /* Read present status of the specified port number */ + data->is_present = 0; + status = accton_i2c_cpld_read(I2C_ADDR_CPLD1, cpld_reg); + + if (status < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", I2C_ADDR_CPLD1, cpld_reg, status); + goto exit; + } + + data->is_present = (status & (1 << (data->port % 8))) ? 0 : 1; + printk("data->is_present=%d, data->port=%d, status=0x%x\n",data->is_present, data->port, status); + /* Read eeprom data based on port number */ + memset(data->eeprom, 0, sizeof(data->eeprom)); + + /* Check if the port is present */ + if (data->is_present) { + /* read eeprom */ + for (i = 0; i < sizeof(data->eeprom)/I2C_SMBUS_BLOCK_MAX; i++) { + status = as7716_32x_sfp_read_block(client, i*I2C_SMBUS_BLOCK_MAX, + data->eeprom+(i*I2C_SMBUS_BLOCK_MAX), + I2C_SMBUS_BLOCK_MAX); + if (status < 0) { + printk("unable to read eeprom from port(%d)\n", data->port); + dev_dbg(&client->dev, "unable to read eeprom from port(%d)\n", data->port); + goto exit; + } + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init as7716_32x_sfp_init(void) +{ + //extern int platform_accton_as7716_32x(void); + //if (!platform_accton_as7716_32x()) { +// return -ENODEV; + //} + + return i2c_add_driver(&as7716_32x_sfp_driver); +} + +static void __exit as7716_32x_sfp_exit(void) +{ + i2c_del_driver(&as7716_32x_sfp_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton as7716_32x_sfp driver"); +MODULE_LICENSE("GPL"); + +module_init(as7716_32x_sfp_init); +module_exit(as7716_32x_sfp_exit); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_sys.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_sys.c new file mode 100755 index 00000000000..f0a8125139c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_sys.c @@ -0,0 +1,243 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define STRING_TO_DEC_VALUE 10 +#define EEPROM_DATA_SIZE 256 + + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; +#define MAX_PORT_NAME_LEN 20 +/* Each client has this additional data + */ +struct as7716_32xb_sys_data { + struct device *hwmon_dev; + struct mutex lock; + u8 index; + unsigned char eeprom[EEPROM_DATA_SIZE]; +}; + + +/* sysfs attributes for hwmon + */ + +static ssize_t sys_info_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t sys_info_show(struct device *dev, struct device_attribute *da, + char *buf); + +static SENSOR_DEVICE_ATTR(eeprom, S_IWUSR|S_IRUGO, sys_info_show, sys_info_store, 0); + + + +static struct attribute *as7716_32xb_sys_attributes[] = { + &sensor_dev_attr_eeprom.dev_attr.attr, + NULL +}; + + +static ssize_t sys_info_show(struct device *dev, struct device_attribute *da, + char *buf) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_sys_data *data = i2c_get_clientdata(client); +// int status = -EINVAL; + int i; + + //printk("sys_info_show\n"); + // printk("attr->index=%d\n", attr->index); + mutex_lock(&data->lock); + //for(i=0; i<8; i++) + // printk("data->eeprom[%d]=0x%x ",i, data->eeprom[i]); + //printk("\n"); + memcpy(buf, data->eeprom, EEPROM_DATA_SIZE); + //for(i=0; i < EEPROM_DATA_SIZE ; i++) + //{ + // buf[i]=data->eeprom[i]; + // printk("buf[%d]=0x%x ",i, buf[i]); + //} + //status = EEPROM_DATA_SIZE+1; + + //printk("\n"); + //status = sprintf(buf, "%x", 0xA); + //data->eeprom[0]=0x0d; + //data->eeprom[1]=0x0; + //data->eeprom[2]=0x06; + // buf[3]=0xFF; + + // for(i=0; i< 16; i++) + // printk("buf[%d]=0x%x ",i, buf[i]); + //printk("\n"); + + memcpy(buf, data->eeprom, 256); + + + mutex_unlock(&data->lock); + + return 256; +} + +static ssize_t sys_info_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t size) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_sys_data *data = i2c_get_clientdata(client); + int i=0, j=0, k=0; + unsigned char str[3]; + unsigned int val; + + //printk("sys_info_store\n"); + //printk("attr->index=%d\n", attr->index); + //printk("buf[0]=0x%x, buf[1]=0x%x, buf[2]=0x%x, buf[3]=0x%x\n", buf[0], buf[1], buf[2], buf[3]); + + // printk("strlen(buf)=%d\n",strlen(buf)); + k=0; + mutex_lock(&data->lock); + memset(data->eeprom, 0xFF, EEPROM_DATA_SIZE); + memset(str, 0x0, 3); + if(strlen(buf) >= 256 ) + { + for(i=0; i < strlen(buf) ; i++) + { + // printk("i=%d ", i); + for(j=0;j<2; j++) + { + str[j]=buf[i+j]; + } + sscanf(str, "%x", &val); + // printk("str=%s val=0x%x ", str, val); + i=j+i-1; + if(k>=EEPROM_DATA_SIZE) + { + break; + } + data->eeprom[k]=(unsigned char)val; + // printk("data->eeprom[%d]=0x%x\n",k, data->eeprom[k]); + k++; + } + } + //printk("buf=\n"); + //for(i=0; i < strlen(buf) ; i++) + //{ + // printk("%c%c ", buf[i], buf[i+1]); + // if((i % 31)==0) + // printk("\n"); + //} + //printk("\n"); + + //printk("eeprom[0]=0x%x, eeprom[1]=0x%x, eeprom[2]=0x%x, eeprom[3]=0x%x\n", + // data->eeprom[0], data->eeprom[1], data->eeprom[2], data->eeprom[3]); + + mutex_unlock(&data->lock); + return size; + +} + +static const struct attribute_group as7716_32xb_sys_group = { + .attrs = as7716_32xb_sys_attributes, +}; + +static int as7716_32xb_sys_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7716_32xb_sys_data *data; + int status; + + data = kzalloc(sizeof(struct as7716_32xb_sys_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + i2c_set_clientdata(client, data); + data->index = dev_id->driver_data; + mutex_init(&data->lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7716_32xb_sys_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sys '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7716_32xb_sys_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7716_32xb_sys_remove(struct i2c_client *client) +{ + struct as7716_32xb_sys_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7716_32xb_sys_group); + kfree(data); + + return 0; +} + + +static const struct i2c_device_id as7716_32xb_sys_id[] = { + { "as7716_32xb_sys", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7716_32xb_sys_id); + +static struct i2c_driver as7716_32xb_sys_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7716_32xb_sys", + }, + .probe = as7716_32xb_sys_probe, + .remove = as7716_32xb_sys_remove, + .id_table = as7716_32xb_sys_id, + .address_list = normal_i2c, +}; + + + + + + +static int __init as7716_32xb_sys_init(void) +{ + return i2c_add_driver(&as7716_32xb_sys_driver); +} + +static void __exit as7716_32xb_sys_exit(void) +{ + i2c_del_driver(&as7716_32xb_sys_driver); +} + +module_init(as7716_32xb_sys_init); +module_exit(as7716_32xb_sys_exit); + +MODULE_AUTHOR("Jostar yang "); +MODULE_DESCRIPTION("as7716_32xb_sys driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_thermal.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_thermal.c new file mode 100755 index 00000000000..d42341bb181 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_thermal.c @@ -0,0 +1,214 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define STRING_TO_DEC_VALUE 10 +#define STRING_TO_HEX_VALUE 16 + +#define TEMP1_MAX_HYST_DEFAULT 75000 +#define TEMP1_MAX_DEFAULT 80000 +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as7716_32xb_thermal_data { + struct device *hwmon_dev; + struct mutex update_lock; + u8 index; + unsigned int temp1_input; + unsigned int temp1_max_hyst; + unsigned int temp1_max; +}; + + + +enum as7716_32xb_thermal_sysfs_attributes { + TEMP1_INPUT, + TEMP1_MAX_HYST, + TEMP1_MAX +}; + +/* sysfs attributes for hwmon + */ + +static ssize_t temp_info_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t temp_info_show(struct device *dev, struct device_attribute *da, + char *buf); +static SENSOR_DEVICE_ATTR(temp1_input, S_IWUSR|S_IRUGO, temp_info_show, temp_info_store, TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IWUSR|S_IRUGO, temp_info_show, temp_info_store, TEMP1_MAX_HYST); +static SENSOR_DEVICE_ATTR(temp1_max, S_IWUSR|S_IRUGO, temp_info_show, temp_info_store, TEMP1_MAX); + + +static struct attribute *as7716_32xb_thermal_attributes[] = { + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp1_max_hyst.dev_attr.attr, + &sensor_dev_attr_temp1_max.dev_attr.attr, + NULL +}; + + +static ssize_t temp_info_show(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_thermal_data *data = i2c_get_clientdata(client); + int status = -EINVAL; + + mutex_lock(&data->update_lock); + switch (attr->index) + { + case TEMP1_INPUT: + status = snprintf(buf, PAGE_SIZE - 1, "%d\r\n", data->temp1_input); + break; + case TEMP1_MAX_HYST: + status = snprintf(buf, PAGE_SIZE - 1, "%d\r\n", TEMP1_MAX_HYST_DEFAULT); + break; + case TEMP1_MAX: + status = snprintf(buf, PAGE_SIZE - 1, "%d\r\n", TEMP1_MAX_DEFAULT); + break; + default : + break; + } + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t temp_info_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t size) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7716_32xb_thermal_data *data = i2c_get_clientdata(client); + long keyin = 0; + int status = -EINVAL; + + mutex_lock(&data->update_lock); + status = kstrtol(buf, STRING_TO_DEC_VALUE, &keyin); + switch (attr->index) + { + case TEMP1_INPUT: + data->temp1_input=keyin; + break; + case TEMP1_MAX_HYST: + data->temp1_max_hyst=keyin; + break; + case TEMP1_MAX: + data->temp1_max=keyin; + break; + default : + break; + } + mutex_unlock(&data->update_lock); + return size; + +} + +static const struct attribute_group as7716_32xb_thermal_group = { + .attrs = as7716_32xb_thermal_attributes, +}; + +static int as7716_32xb_thermal_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7716_32xb_thermal_data *data; + int status; + + data = kzalloc(sizeof(struct as7716_32xb_thermal_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + i2c_set_clientdata(client, data); + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7716_32xb_thermal_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: thermal '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7716_32xb_thermal_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7716_32xb_thermal_remove(struct i2c_client *client) +{ + struct as7716_32xb_thermal_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7716_32xb_thermal_group); + kfree(data); + + return 0; +} + + +static const struct i2c_device_id as7716_32xb_thermal_id[] = { + { "as7716_32xb_thermal", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7716_32xb_thermal_id); + +static struct i2c_driver as7716_32xb_thermal_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7716_32xb_thermal", + }, + .probe = as7716_32xb_thermal_probe, + .remove = as7716_32xb_thermal_remove, + .id_table = as7716_32xb_thermal_id, + .address_list = normal_i2c, +}; + + + + + + +static int __init as7716_32xb_thermal_init(void) +{ + return i2c_add_driver(&as7716_32xb_thermal_driver); +} + +static void __exit as7716_32xb_thermal_exit(void) +{ + i2c_del_driver(&as7716_32xb_thermal_driver); +} + +module_init(as7716_32xb_thermal_init); +module_exit(as7716_32xb_thermal_exit); + +MODULE_AUTHOR("Jostar yang "); +MODULE_DESCRIPTION("as7716_32xb_thermal driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_i2c_cpld.c new file mode 100755 index 00000000000..46d1e277328 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_i2c_cpld.c @@ -0,0 +1,259 @@ +/* + * A hwmon driver for the accton_i2c_cpld + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define CPLD_VERSION_REG 0x1 + +enum as5712_54x_cpld_sysfs_attributes { + CPLD_READ_VERSION, + CPLD_BYTE_ACCESS, + CPLD_DUMP_ALL, +}; + +static ssize_t read_cpld_version(struct device *dev, struct device_attribute *da, + char *buf); +int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); + + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +/* Addresses scanned for accton_i2c_cpld + */ +static const unsigned short normal_i2c[] = { 0x31, 0x35, 0x60, 0x61, 0x62, I2C_CLIENT_END }; + +static SENSOR_DEVICE_ATTR(cpld_get_version, S_IRUGO, read_cpld_version, NULL, CPLD_READ_VERSION); + +static struct attribute *as5712_54x_cpld_attributes[] = { + &sensor_dev_attr_cpld_get_version.dev_attr.attr, + NULL +}; + +static const struct attribute_group as5712_54x_cpld_group = { + .attrs = as5712_54x_cpld_attributes, +}; + +static ssize_t read_cpld_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + unsigned short cpld_reg = CPLD_VERSION_REG; + u8 reg; + + if(attr->index == CPLD_READ_VERSION) { + reg = accton_i2c_cpld_read(client->addr, cpld_reg); + return sprintf(buf, "%02x\n",reg); + } + return -1 ; +} + + +static void accton_i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void accton_i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int accton_i2c_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as5712_54x_cpld_group); + if (status) { + goto exit; + } + + dev_info(&client->dev, "chip found\n"); + accton_i2c_cpld_add_client(client); + + return 0; +exit: + return status; +} + +static int accton_i2c_cpld_remove(struct i2c_client *client) +{ + sysfs_remove_group(&client->dev.kobj, &as5712_54x_cpld_group); + + accton_i2c_cpld_remove_client(client); + return 0; +} + +static const struct i2c_device_id accton_i2c_cpld_id[] = { + { "accton_i2c_cpld", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, accton_i2c_cpld_id); + +static struct i2c_driver accton_i2c_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "accton_i2c_cpld", + }, + .probe = accton_i2c_cpld_probe, + .remove = accton_i2c_cpld_remove, + .id_table = accton_i2c_cpld_id, + .address_list = normal_i2c, +}; + +int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_read_byte_data(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(accton_i2c_cpld_read); + +int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_write_byte_data(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(accton_i2c_cpld_write); + +static int __init accton_i2c_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&accton_i2c_cpld_driver); +} + +static void __exit accton_i2c_cpld_exit(void) +{ + i2c_del_driver(&accton_i2c_cpld_driver); +} +/* +static struct dmi_system_id as7712_dmi_table[] = { + { + .ident = "Accton AS7712", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Accton"), + DMI_MATCH(DMI_PRODUCT_NAME, "AS7712"), + }, + } +}; + +int platform_accton_as7712_32x(void) +{ + return dmi_check_system(as7712_dmi_table); +} +EXPORT_SYMBOL(platform_accton_as7712_32x); +*/ +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_i2c_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(accton_i2c_cpld_init); +module_exit(accton_i2c_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/service/as7716_32xb-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/service/as7716_32xb-platform-monitor.service new file mode 100755 index 00000000000..05a5d93c48b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/service/as7716_32xb-platform-monitor.service @@ -0,0 +1,17 @@ +[Unit] +Description=Accton AS7716-32XB Platform Monitoring service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/accton_as7716_32xb_util.py install +ExecStart=/usr/local/bin/accton_as7716_32xb_drv_handler.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/setup.py new file mode 100755 index 00000000000..3edfc29b381 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as7716_32xb', + version='1.0', + description='Module to initialize Accton AS7716-32XB platforms', + + packages=['as7716_32xb'], + package_dir={'as7716_32xb': 'as7716-32xb/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/utils/README b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/utils/README new file mode 100755 index 00000000000..c602d753301 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/utils/README @@ -0,0 +1,117 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +Contents of this package: + patch - files under patch/ is for kernel and ONIE installer + for the kernel: + config-accton-as5712_54x.patch + for kernel configuration. + driver-i2c-muxes-pca954x-always-deselect.patch + for i2c_mux deselects after transaction. + driver-patches-for-accton-as5712-fan-psu-cpld.patch + for as5712's fan/psu/cpld/led/sfp drivers. + for ONIE: + onie_installer-accton-AS5712-54X.patch + for console port setting and copy util script o rootfs. + module - Contains source code of as5712 kernel driver modules. + +The late Sonic building scripts, pushed @Dec 5 2016, will automatically +create a docker container and run building process under it. +User is not necessary to handle docker environment creation. + +1. Download sonic-buildimage environment. + - Run "git clone https://github.com/Azure/sonic-buildimage". + - cd to sonic-buildimage and run "git submodule update --init --recursive". +2. Build kernel + - cd ./src/sonic-linux-kernel + - Copy patches and series from patch/kernel of this release to + sonic-linux-kernel/patch. + - Build kernel by "make". + - The built kernel package, linux-image-3.16.0-4-amd64_3.16.36-1+deb8u2_amd64.deb + , is generated. +3. Build installer + - Change directory back to sonic-buildimage/. + - Get onie_installer-accton-AS5712-54X.patch" from patch/installer. + - Change setting for AS5712-54X by patching build_image.sh. + "patch -p1 < onie_installer-accton-AS5712-54X.patch" + !!NOTICE, patching onie_installer-accton-AS5712-54X.patch comments out the + "git status" checking at build_image.sh. + - The account and password of installed OS can be given at rules/config. + The default user and password are "admin" & "YourPaSsWoRd" respectively. + - Run "make configure PLATFORM=broadcom" + - Copy the built kernel debian package to target/debs/. + The file is linux-image-3.16.0-4-amd64_*_amd64.deb under directory + src/sonic-linux-kernel/. + - Run "make target/sonic-generic.bin" + - Get the installer, target/sonic-generic.bin, to target machine and install. + +All Linux kernel code is licensed under the GPLv1. All other code is +licensed under the GPLv3. Please see the LICENSE file for copies of +both licenses. + +The code for integacting with Accton AS5712-54X has 2 parts, +kernel drivers and operational script. +The kernel drivers of peripherals are under module/ directory. +1. These drivers are patched into kernel by + driver-patches-for-accton-as5712-fan-psu-cpld.patch + Or you can build the driver under module/ by setting environment variable, + KERNEL_SRC, to proper linux built directory and run make. + It may be sonic-linux-kernel/linux-3.*/debian/build/build_amd64_none_amd64/. +2. A operational script, accton_as5712_util.py, for device initializatian and + peripheral accessing should be installed at /usr/bin. + This script is generated by onie_installer-accton-AS5712-54X.patch. + It's done by patching onie_installer-accton-AS5712-54X.patch at build-image. + Run "accton_as5712_util.py install" to install drivers. + +To initialize the system, run "accton_as5712_util.py install". +To clean up the drivers & devices, run "accton_as5712_util.py clean". +To dump information of sensors, run "accton_as5712_util.py show". +To dump SFP EEPROM, run "accton_as5712_util.py sff". +To set fan speed, run "accton_as5712_util.py set fan". +To enable/disable SFP emission, run "accton_as5712_util.py set sfp". +To set system LEDs' color, run "accton_as5712_util.py set led" +For more information, run "accton_as5712_util.py --help". + +==================================================================== +Besides applying accton_as5712_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +System LED: + There are 5 system LEDs at the lower-left corner of front panel. + They are loc, diag, fan, ps1, and ps2. + The sysfs interface color mappings are as follows: + Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + But not all colors are available for each LED. + +Fan Control: + There are 10 fans inside 5 fan modules. + All fans share 1 duty setting, ranged from 0~100. + +Thermal sensers: + 3 temperature sensors are controlled by the lm75 kernel modules. + +PSUs: + There 2 power supplies slot at the left/right side of the back. + Once if a PSU is not plugged, the status of it is shown failed. + +There are 48 SFP+ and 6 QSFP modules are equipped. +Before operating on PSU and QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/utils/accton_as7716_32xb_drv_handler.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/utils/accton_as7716_32xb_drv_handler.py new file mode 100755 index 00000000000..c08a82c7dc4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/utils/accton_as7716_32xb_drv_handler.py @@ -0,0 +1,443 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 1/18/2018: Jostar create for as7716_32xb +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import types + import time # this is only being used as part of the example + import traceback + import commands + from tabulate import tabulate +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = 'as7716_32xb_drv_handler' +DEBUG = False + +global log_file +global log_level + +def my_log(txt): + if DEBUG == True: + print "[ACCTON DBG]: "+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status = 1 + output = "" + status, output = commands.getstatusoutput(cmd) + if DEBUG == True: + my_log (cmd +" , result:" + str(status)) + else: + if show: + print "ACC: " + str(cmd) + " , result:"+ str(status) + #my_log ("cmd:" + cmd) + #my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + + +# Make a class we can use to capture stdout and sterr in the log +class accton_as7716xb_drv_handler(object): + + QSFP_PORT_START = 1 + QSFP_PORT_END = 32 + BASE_PATH = "/usr/local/bin/" + BASE_I2C_PATH="/sys/bus/i2c/devices/" + QSFP_PRESENT_PATH = "/sys/bus/i2c/devices/0-0060/module_present_" + QSFP_RESET_PATH = "/sys/bus/i2c/devices/0-0060/module_reset_" + QSFP_PRESENT_FILE = "/tmp/ipmi_qsfp_pres" + QSFP_EEPROM_FILE = "/tmp/ipmi_qsfp_ee_" + THERMAL_FILE = "/tmp/ipmi_thermal" + IPMI_CMD_QSFP = "ipmitool raw 0x34 0x10 " + IPMI_CMD_THERMAL = "ipmitool raw 0x34 0x12 " + IPMI_CMD_FAN = "ipmitool raw 0x34 0x14 " + IPMI_CMD_PSU ="ipmitool raw 0x34 0x16 " + IPMI_CMD_SYS_EEPROM_1 ="ipmitool raw 0x34 0x18 0x0 0x80" + IPMI_CMD_SYS_EEPROM_2 ="ipmitool raw 0x34 0x18 0x80 0x80" + FAN_ID_START = 1 + FAN_ID_END = 6 + FAN_FILE = "/tmp/ipmi_fan" + FAN_PATH = "/sys/bus/i2c/devices/0-0066/fan" + PSU_ID_START = 1 + PSU_ID_END = 2 + PSU1_PATH = "/sys/bus/i2c/devices/0-0053/" + PSU2_PATH = "/sys/bus/i2c/devices/0-0050/" + PSU1_PMBUS_PATH = "/sys/bus/i2c/devices/0-005b/" + PSU2_PMBUS_PATH = "/sys/bus/i2c/devices/0-0058/" + PSU_FILE = "/tmp/ipmi_psu_" + SYS_EEPROM_FILE_1 = "/tmp/ipmi_sys_eeprom_1" + SYS_EEPROM_FILE_2 = "/tmp/ipmi_sys_eeprom_2" + SYS_EEPROM_PATH = "/sys/bus/i2c/devices/0-0056/eeprom" + + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_ipmi_qsfp(self): + logging.debug ("drv hanlder-manage_ipmi_qsfp") + print "drv hanlder" + #Handle QSFP case + ipmi_cmd = self.IPMI_CMD_QSFP + " 0x10 > " +self.QSFP_PRESENT_FILE + log_os_system(ipmi_cmd, 0) + file_path = self.QSFP_PRESENT_FILE + check_file = open(file_path) + try: + check_file = open(file_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + line = check_file.readline() + pres_line= line.rstrip().replace(" ","") + while line: + line = check_file.readline() + pres_line+=line.rstrip().replace(" ","") + check_file.close() + + + for i in range(self.QSFP_PORT_START, self.QSFP_PORT_END+1, 1): + if i>1: + k=(i-1)*2 +1 + else: + k=1; + if pres_line[k] == '1': + #Set QSFP present + #print "port-%d present" %i + set_drv_cmd = "echo 1 > " + self.QSFP_PRESENT_PATH + str(i) + log_os_system(set_drv_cmd, 0) + #Read QSFP EEPROM + ipmi_cmd = self.IPMI_CMD_QSFP +str(i)+ " 0x00 > " +self.QSFP_EEPROM_FILE + str(i) + "_1" + log_os_system(ipmi_cmd, 0) + ipmi_cmd = self.IPMI_CMD_QSFP +str(i)+ " 0x01 > " +self.QSFP_EEPROM_FILE + str(i) + "_2" + log_os_system(ipmi_cmd, 0) + file_path = self.QSFP_EEPROM_FILE + str(i) + "_1" + check_file = open(file_path) + try: + check_file = open(file_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + line = check_file.readline() + str_line= line.rstrip().replace(" ","") + while line: + line = check_file.readline() + str_line+=line.rstrip().replace(" ","") + check_file.close() + file_path = self.QSFP_EEPROM_FILE + str(i) + "_2" + check_file = open(file_path) + try: + check_file = open(file_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + line = check_file.readline() + str_line+= line.rstrip().replace(" ","") + + while line: + line = check_file.readline() + str_line+=line.rstrip().replace(" ","") + check_file.close() + #Set QSFP EEPROM + if(i < 10): + set_drv_cmd = "echo " + str_line+ " > " + self.BASE_I2C_PATH + "0-000"+str(i) +"/eeprom" + else: + set_drv_cmd = "echo " + str_line+ " > " + self.BASE_I2C_PATH + "0-00"+str(i) +"/eeprom" + #print(set_drv_cmd) + log_os_system(set_drv_cmd, 0) + else: + ipmi_cmd = "echo 0 > " + self.QSFP_PRESENT_PATH + str(i) + log_os_system(ipmi_cmd, 0) + if(i < 10): + set_drv_cmd = "echo 0 > " + self.BASE_I2C_PATH + "0-000"+str(i) +"/eeprom" + else: + set_drv_cmd = "echo 0 > " + self.BASE_I2C_PATH + "0-00"+str(i) +"/eeprom" + #print(set_drv_cmd) + log_os_system(set_drv_cmd, 0) + + time.sleep(0.01) + return True + + def manage_ipmi_thermal(self): + logging.debug ("drv hanlder-manage_ipmi_thermal") + #Handle thermal case + #ipmitool raw 0x34 0x12 + ipmi_cmd = self.IPMI_CMD_THERMAL + " > " +self.THERMAL_FILE + log_os_system(ipmi_cmd, 0) + file_path = self.THERMAL_FILE + check_file = open(file_path) + try: + check_file = open(file_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + line = check_file.readline() + str_line= line.rstrip().replace(" ","") + while line: + line = check_file.readline() + str_line+=line.rstrip().replace(" ","") + check_file.close() + val_str= "0x" + str(str_line[4])+str(str_line[5]) + val_int=int(val_str, 16)*1000 + check_file.close() + set_drv_cmd = "echo "+str(val_int) + " > " + self.BASE_I2C_PATH + "0-0048/temp1_input" + log_os_system(set_drv_cmd,0) + val_str= "0x" + str(str_line[10])+str(str_line[11]) + val_int=int(val_str, 16) * 1000 + set_drv_cmd = "echo "+str(val_int) + " > " + self.BASE_I2C_PATH + "0-0049/temp1_input" + log_os_system(set_drv_cmd,0) + val_str= "0x" + str(str_line[16])+str(str_line[17]) + val_int=int(val_str, 16) * 1000 + set_drv_cmd = "echo "+str(val_int) + " > " + self.BASE_I2C_PATH + "0-004a/temp1_input" + log_os_system(set_drv_cmd, 0) + + return True + + def manage_ipmi_fan(self): + logging.debug ("drv hanlder-manage_ipmi_fan") + #Handle fan case + #ipmitool raw 0x34 0x14 + ipmi_cmd = self.IPMI_CMD_FAN + " > " +self.FAN_FILE + log_os_system(ipmi_cmd, 0) + file_path = self.FAN_FILE + #print(file_path) + check_file = open(file_path) + try: + check_file = open(file_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + line = check_file.readline() + str_line= line.rstrip().replace(" ","") + while line: + line = check_file.readline() + str_line+=line.rstrip().replace(" ","") + check_file.close() + #print (str_line) + k=0 + for i in range(self.FAN_ID_START, self.FAN_ID_END+1, 1): + #print "k=%d"%k + if str_line[k+1]=='0': + set_drv_cmd = "echo 1 > " + self.FAN_PATH + str(i) + "_present" + else: + set_drv_cmd = "echo 0 > " + self.FAN_PATH + str(i) + "_present" + log_os_system(set_drv_cmd, 0) + + val_str= "0x" + str(str_line[k+6])+str(str_line[k+7]) + str(str_line[k+4])+str(str_line[k+5]) + val_int=int(val_str, 16) + set_drv_cmd = "echo " + str(val_int) + " > " + self.FAN_PATH + str(i) + "_front_speed_rpm" + log_os_system(set_drv_cmd, 0) + val_str= "0x" + str(str_line[k+54])+str(str_line[k+55]) + str(str_line[k+52])+str(str_line[k+53]) + val_int=int(val_str, 16) + set_drv_cmd = "echo " + str(val_int) + " > " + self.FAN_PATH + str(i) + "_rear_speed_rpm" + log_os_system(set_drv_cmd, 0) + k+=8; + return True + + + def manage_ipmi_psu(self): + logging.debug ("drv hanlder-manage_ipmi_psu") + #Handle psu case + #present: ipmitool raw 0x34 0x16 '0x1' . Param-1 is psu id(id_1:0x1, id_2:0x2) + + #cpld access psu + for i in range(self.PSU_ID_START, self.PSU_ID_END+1, 1): + #present case + ipmi_cmd = self.IPMI_CMD_PSU + str(i) + " > " +self.PSU_FILE + str(i) + log_os_system(ipmi_cmd, 0) + if i==1: + psu_sysfs_path = self.PSU1_PATH + else: + psu_sysfs_path = self.PSU2_PATH + file_path = self.PSU_FILE + str(i) + #print(file_path) + check_file = open(file_path) + try: + check_file = open(file_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + line = check_file.readline() + str_line= line.rstrip().replace(" ","") + while line: + line = check_file.readline() + str_line+=line.rstrip().replace(" ","") + check_file.close() + #print (line) + if str_line[1]=='0': + int_val=1 #psu insert + #print "psu_%d present"%i + set_drv_cmd = "echo " +str(int_val) + " > " + psu_sysfs_path + "psu_present" + log_os_system(set_drv_cmd, 0) + set_drv_cmd = "echo " + str(str_line[5]) + " > " + psu_sysfs_path + "psu_power_good" + log_os_system(set_drv_cmd, 0) + else: + int_val=0 + set_drv_cmd = "echo " +str(int_val) + " > " + psu_sysfs_path + "psu_present" + log_os_system(set_drv_cmd, 0) + set_drv_cmd = "echo " + str(int_val) + " > " + psu_sysfs_path + "psu_power_good" + log_os_system(set_drv_cmd, 0) + + #pmbus + if i==1: + psu_sysfs_path = self.PSU1_PMBUS_PATH + else: + psu_sysfs_path = self.PSU2_PMBUS_PATH + + if str_line[5]=='1': #power_on + val_str= "0x" + str(str_line[28])+str(str_line[29]) + str(str_line[26])+str(str_line[27]) + val_int=int(val_str, 16) * 1000 + set_drv_cmd = "echo " + str(val_int) + " > " + psu_sysfs_path + "psu_temp1_input" + log_os_system(set_drv_cmd, 0) + #print "val_int=%d"%val_int + val_str= "0x" + str(str_line[32])+str(str_line[33]) + str(str_line[30])+str(str_line[31]) + val_int=int(val_str, 16) + #print "fan:val_int=%d"%val_int + set_drv_cmd = "echo " + str(val_int) + " > " + psu_sysfs_path + "psu_fan1_speed_rpm" + log_os_system(set_drv_cmd, 0) + val_str= "0x" + str(str_line[36])+str(str_line[37]) + str(str_line[34])+str(str_line[35]) + val_int=int(val_str, 16) + #print "pout val_int=%d"%val_int + set_drv_cmd = "echo " + str(val_int) + " > " + psu_sysfs_path + "psu_p_out" + log_os_system(set_drv_cmd, 0) + else: #power_off + val_int=0 + set_drv_cmd = "echo " + str(val_int) + " > " + psu_sysfs_path + "psu_temp1_input" + log_os_system(set_drv_cmd, 0) + set_drv_cmd = "echo " + str(val_int) + " > " + psu_sysfs_path + "psu_fan1_speed_rpm" + log_os_system(set_drv_cmd, 0) + set_drv_cmd = "echo " + str(val_int) + " > " + psu_sysfs_path + "psu_p_out" + log_os_system(set_drv_cmd, 0) + + time.sleep(2) + return True + + def manage_ipmi_sys(self): + logging.debug ("drv hanlder-manage_ipmi_sys") + #Handle sys case + #ipmitool -raw 0x34 0x18 0x00 0x80 + #ipmitool -raw 0x34 0x18 0x80 0x80 + + ipmi_cmd = self.IPMI_CMD_SYS_EEPROM_1 + " > " + self.SYS_EEPROM_FILE_1 + log_os_system(ipmi_cmd, 0) + ipmi_cmd = self.IPMI_CMD_SYS_EEPROM_2 + " > " + self.SYS_EEPROM_FILE_2 + log_os_system(ipmi_cmd, 0) + + #Read SYS EEPROM + file_path = self.SYS_EEPROM_FILE_1 + check_file = open(file_path) + try: + check_file = open(file_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + line = check_file.readline() + str_line= line.rstrip().replace(" ","") + while line: + line = check_file.readline() + str_line+=line.rstrip().replace(" ","") + check_file.close() + + file_path = self.SYS_EEPROM_FILE_2 + check_file = open(file_path) + try: + check_file = open(file_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + line = check_file.readline() + str_line+= line.rstrip().replace(" ","") + while line: + line = check_file.readline() + str_line+=line.rstrip().replace(" ","") + check_file.close() + #print(len(str_line)) + #print(str_line) + set_drv_cmd = "echo " + str_line+ " > " + self.SYS_EEPROM_PATH + #print(set_drv_cmd) + log_os_system(set_drv_cmd, 0) + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.WARNING + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + set_drv_cmd = "echo 100 > /sys/module/ipmi_si/parameters/kipmid_max_busy_us" + log_os_system(set_drv_cmd, 0) + monitor = accton_as7716xb_drv_handler(log_file, log_level) + + set_sys_eeprom=0 + thermal_chk_time=0 + psu_chk_time=0 + # Loop forever, doing something useful hopefully: + while True: + logging.debug ("monitor.manage_ipmi") + if set_sys_eeprom==0: + monitor.manage_ipmi_sys() + set_sys_eeprom=1 + monitor.manage_ipmi_qsfp() + time.sleep(0.1) + monitor.manage_ipmi_thermal() + monitor.manage_ipmi_psu() + time.sleep(0.1) + monitor.manage_ipmi_fan() + time.sleep(0.05) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/utils/accton_as7716_32xb_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/utils/accton_as7716_32xb_monitor.py new file mode 100755 index 00000000000..2568312b095 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/utils/accton_as7716_32xb_monitor.py @@ -0,0 +1,227 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + from as7716_32x.fanutil import FanUtil + from as7716_32x.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = 'accton_as7716_monitor' + +global log_file +global log_level + + # For AC power Front to Back : + # If any fan fail, please fan speed register to 15 + # The max value of Fan speed register is 9 + # [LM75(48) + LM75(49) + LM75(4A)] > 174 => set Fan speed value from 4 to 5 + # [LM75(48) + LM75(49) + LM75(4A)] > 182 => set Fan speed value from 5 to 7 + # [LM75(48) + LM75(49) + LM75(4A)] > 190 => set Fan speed value from 7 to 9 + # + # [LM75(48) + LM75(49) + LM75(4A)] < 170 => set Fan speed value from 5 to 4 + # [LM75(48) + LM75(49) + LM75(4A)] < 178 => set Fan speed value from 7 to 5 + # [LM75(48) + LM75(49) + LM75(4A)] < 186 => set Fan speed value from 9 to 7 + # + # + # For AC power Back to Front : + # If any fan fail, please fan speed register to 15 + # The max value of Fan speed register is 10 + # [LM75(48) + LM75(49) + LM75(4A)] > 140 => set Fan speed value from 4 to 5 + # [LM75(48) + LM75(49) + LM75(4A)] > 150 => set Fan speed value from 5 to 7 + # [LM75(48) + LM75(49) + LM75(4A)] > 160 => set Fan speed value from 7 to 10 + # + # [LM75(48) + LM75(49) + LM75(4A)] < 135 => set Fan speed value from 5 to 4 + # [LM75(48) + LM75(49) + LM75(4A)] < 145 => set Fan speed value from 7 to 5 + # [LM75(48) + LM75(49) + LM75(4A)] < 155 => set Fan speed value from 10 to 7 + # + + + # 2.If no matched fan speed is found from the policy, + # use FAN_DUTY_CYCLE_MIN as default speed + # Get current temperature + # 4.Decision 3: Decide new fan speed depend on fan direction/current fan speed/temperature + + + + +# Make a class we can use to capture stdout and sterr in the log +class accton_as7716_monitor(object): + # static temp var + _ori_temp = 0 + _new_perc = 0 + _ori_perc = 0 + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_fans(self): + + fan_policy_f2b = { + 0: [32, 0, 174000], + 1: [38, 170000, 182000], + 2: [50, 178000, 190000], + 3: [63, 186000, 0], + } + fan_policy_b2f = { + 0: [32, 0, 140000], + 1: [38, 135000, 150000], + 2: [50, 145000, 160000], + 3: [69, 15500, 0], + } + + thermal = ThermalUtil() + fan = FanUtil() + get_temp = thermal.get_thermal_temp() + # 1. Get each fan status, one not presented, set speed to full + # Get fan direction (Only get the first one since all fan direction are the same) + # Get current fan duty cycle + cur_duty_cycle = fan.get_fan_duty_cycle() + #print "cur_duty_cycle=%d" %cur_duty_cycle + #print "get_temp=%d" %get_temp + + for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): + fan_status = fan.get_fan_status(x) + if fan_status is None: + #print "fan_status is None" + logging.debug('INFO. SET new_perc to %d (FAN stauts is None. fan_num:%d)', 100, x) + return False + if fan_status is False: + #self._new_perc = FAN_LEV1_SPEED_PERC + #print "fan_%d status=false, set 45 duty_cycle" %x + logging.debug('INFO. SET new_perc to %d (FAN fault. fan_num:%d)', 100, x) + fan.set_fan_duty_cycle(45) + return True + logging.debug('INFO. fan_status is True (fan_num:%d)', x) + + if fan_status is not None and fan_status is not False: + fan_dir=fan.get_fan_dir(1) + for x in range(0, 4): + if cur_duty_cycle == fan_policy_f2b[x][0]: + break + #print "x=%d" %x + #print "fan_dir=%d" %fan_dir + #print "fan_policy_f2b[x][0]=%d" %fan_policy_f2b[x][0] + #print "cur_duty_cycle=%d" %cur_duty_cycle + + if fan_dir == 1: + if x == 4 : + fan.set_fan_duty_cycle(fan_policy_f2b[0][0]) + new_duty_cycle=cur_duty_cycle + # if temp > up_levle, else if temp < down_level + if get_temp > fan_policy_f2b[x][2] and x != 3 : + new_duty_cycle= fan_policy_f2b[x+1][0] + #print "new_duty_cycle= fan_policy_f2b[x+1][0]=%d" %new_duty_cycle + #print "Becasue get_temp > fan_policy_f2b[x][2]=%d" %fan_policy_f2b[x][2] + logging.debug('INFO. THERMAL temp UP, temp %d > %d , new_duty_cycle=%d', get_temp, fan_policy_f2b[x][2], new_duty_cycle) + #else get_temp < fan_policy_f2b[x][1] and x != 0 : + elif get_temp < fan_policy_f2b[x][1] : + new_duty_cycle= fan_policy_f2b[x-1][0] + #print "new_duty_cycle= fan_policy_f2b[x-1][0]=%d" %new_duty_cycle + #print "Becasue get_temp < fan_policy_f2b[x][1]=%d" %fan_policy_f2b[x][1] + logging.debug('INFO. THERMAL temp down, temp %d < %d , new_duty_cycle=%d', get_temp, fan_policy_f2b[x][1], new_duty_cycle) + if new_duty_cycle == cur_duty_cycle : + #print "new_duty_cycle == cur_duty_cycle case, so return True" + return True + else: + if x == 4 : + fan.set_fan_duty_cycle(fan_policy_b2f[0][0]) + new_duty_cycle=cur_duty_cycle + # if temp > up_levle, else if temp < down_level + if get_temp > fan_policy_b2f[x][1] and x != 3 : + new_duty_cycle= fan_policy_b2f[x+1][0] + logging.debug('INFO. THERMAL temp UP, temp %d > %d , new_duty_cycle=%d', get_temp, fan_policy_b2f[x][2], new_duty_cycle) + elif get_temp < fan_policy_b2f[x][0] and x != 0 : + #elif get_temp < fan_policy_b2f[x][0] + new_duty_cycle= fan_policy_b2f[x-1][0] + logging.debug('INFO. THERMAL temp down, temp %d < %d , new_duty_cycle=%d', get_temp, fan_policy_b2f[x][1], new_duty_cycle) + if new_duty_cycle == cur_duty_cycle : + return True + + fan.set_fan_duty_cycle(new_duty_cycle) + #print "set new_duty_cycle=%d" %new_duty_cycle + #print "old_duty_cycle=%d" %cur_duty_cycle + + return True + + + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + monitor = accton_as7716_monitor(log_file, log_level) + + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(1) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/utils/accton_as7716_32xb_util.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/utils/accton_as7716_32xb_util.py new file mode 100755 index 00000000000..ffddfb33850 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/utils/accton_as7716_32xb_util.py @@ -0,0 +1,616 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +PROJECT_NAME = 'as7716_32xb' +version = '0.0.1' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan1':1, 'fan2':1,'fan3':1,'fan4':1,'fan5':1,'thermal':3, 'psu':2, 'sfp':54} + + +led_prefix ='/sys/devices/platform/as7716_32xb_led/leds/accton_'+PROJECT_NAME+'_led::' +fan_prefix ='/sys/devices/platform/as7716_32xb_' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2'], + 'fan1': ['fan'], + 'fan2': ['fan'], + 'fan3': ['fan'], + 'fan4': ['fan'], + 'fan5': ['fan'], + 'fan5': ['fan'], + } +hwmon_nodes = {'led': ['brightness'] , + 'fan1': ['fan_duty_cycle_percentage', 'fan1_fault', 'fan1_speed_rpm', 'fan1_direction', 'fanr1_fault', 'fanr1_speed_rpm'], + 'fan2': ['fan_duty_cycle_percentage','fan2_fault', 'fan2_speed_rpm', 'fan2_direction', 'fanr2_fault', 'fanr2_speed_rpm'], + 'fan3': ['fan_duty_cycle_percentage','fan3_fault', 'fan3_speed_rpm', 'fan3_direction', 'fanr3_fault', 'fanr3_speed_rpm'], + 'fan4': ['fan4_duty_cycle_percentage','fan4_fault', 'fan4_speed_rpm', 'fan4_direction', 'fanr4_fault', 'fanr4_speed_rpm'], + 'fan5': ['fan_duty_cycle_percentage','fan5_fault', 'fan5_speed_rpm', 'fan5_direction', 'fanr5_fault', 'fanr5_speed_rpm'], + } +hwmon_prefix ={'led': led_prefix, + 'fan1': fan_prefix, + 'fan2': fan_prefix, + 'fan3': fan_prefix, + 'fan4': fan_prefix, + 'fan5': fan_prefix, + } + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_drv_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'thermal': ['10-0048','10-0049', '10-004a'] , + 'psu': ['17-0050','18-0053'], + 'sfp': ['-0050']} +i2c_nodes = { + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['sfp_is_present ', 'sfp_tx_disable']} + +sfp_map = [1, 2, 3, 4, 5, 6, 7, 8, + 9, 10, 11, 12, 13, 14, 15, 16, + 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32] + +mknod =[ +'echo as7716_32xb_cpld1 0x60 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo accton_i2c_cpld 0x62 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo accton_i2c_cpld 0x64 > /sys/bus/i2c/devices/i2c-0/new_device', + +] + +mknod_xb =[ +'echo as7716_32xb_cpld1 0x60 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo accton_i2c_cpld 0x62 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo accton_i2c_cpld 0x64 > /sys/bus/i2c/devices/i2c-0/new_device', +#Thermal +'echo as7716_32xb_thermal 0x48 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo as7716_32xb_thermal 0x49 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo as7716_32xb_thermal 0x4a > /sys/bus/i2c/devices/i2c-0/new_device', +#Fan +'echo as7716_32xb_fan 0x66 > /sys/bus/i2c/devices/i2c-0/new_device', +# PSU-1 +'echo as7716_32xb_psu1 0x53 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo as7716_32xb_psu2 0x50> /sys/bus/i2c/devices/i2c-0/new_device', +# PSU-2 +'echo as7716_32xb_pmbus 0x5b > /sys/bus/i2c/devices/i2c-0/new_device', +'echo as7716_32xb_pmbus 0x58 > /sys/bus/i2c/devices/i2c-0/new_device', +#EERPOM +'echo as7716_32xb_sys 0x56 > /sys/bus/i2c/devices/i2c-0/new_device', +] + + + +mknod2 =[ +'echo as7716_32xb_cpld1 0x60 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo accton_i2c_cpld 0x61 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo accton_i2c_cpld 0x62 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-0/new_device', + +# PSU-1 +'echo as7716_32xb_psu1 0x38 > /sys/bus/i2c/devices/i2c-57/new_device', +'echo cpr_4011_4mxx 0x3c > /sys/bus/i2c/devices/i2c-57/new_device', +'echo as7716_32xb_psu1 0x50 > /sys/bus/i2c/devices/i2c-57/new_device', +'echo ym2401 0x58 > /sys/bus/i2c/devices/i2c-57/new_device', + +# PSU-2 +'echo as7716_32xb_psu2 0x3b > /sys/bus/i2c/devices/i2c-58/new_device', +'echo cpr_4011_4mxx 0x3f > /sys/bus/i2c/devices/i2c-58/new_device', +'echo as7716_32xb_psu2 0x53 > /sys/bus/i2c/devices/i2c-58/new_device', +'echo ym2401 0x5b > /sys/bus/i2c/devices/i2c-58/new_device', + +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-61/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-62/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-63/new_device', + +#EERPOM +#'echo 24c02 0x57 > /sys/bus/i2c/devices/i2c-1/new_device', +] + +FORCE = 0 +logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-32 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-32 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ACCTON DBG]: "+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status = 1 + output = "" + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log ("cmd:" + cmd) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_inserted(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + + +kos = [ +'depmod -ae', +'modprobe ipmi_msghandler', +'modprobe ipmi_si', +'modprobe ipmi_devintf', +'modprobe i2c_dev', +'modprobe accton_i2c_cpld', +'modprobe accton_as7716_32xb_cpld1', +'modprobe accton_as7716_32xb_fan', +'modprobe accton_as7716_32xb_leds', +'modprobe accton_as7716_32xb_psu', +'modprobe accton_as7716_32xb_oom', +'modprobe accton_as7716_32xb_thermal', +'modprobe accton_as7716_32xb_pmbus', +'modprobe accton_as7716_32xb_sys'] + +def driver_install(): + global FORCE + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + + + +def i2c_order_check(): + # i2c bus 0 and 1 might be installed in different order. + # Here check if 0x76 is exist @ i2c-0 + tmp = "echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device" + status, output = log_os_system(tmp, 0) + if not device_exist(): + order = 1 + else: + order = 0 + tmp = "echo 0x70 > /sys/bus/i2c/devices/i2c-1/delete_device" + status, output = log_os_system(tmp, 0) + return order + +def device_install(): + global FORCE + + #order = i2c_order_check() + # if 0x76 is not exist @i2c-0, use reversed bus order + #if order: + # for i in range(0,len(mknod2)): + # #for pca932x need times to built new i2c buses + # if mknod2[i].find('pca954') != -1: + # time.sleep(2) + + # status, output = log_os_system(mknod2[i], 1) + # if status: + # print output + # if FORCE == 0: + # return status + #else: + print "Prepar to create instance.............." + for i in range(0,len(mknod_xb)): + print "Beginn to create instance.............." + status, output = log_os_system(mknod_xb[i], 1) + print "status=%s" %status + print "output=%s" %output + if status: + print output + if FORCE == 0: + return status + #time.sleep (50.0 / 1000.0) + print "Create sfp instance.............." + for i in range(0,len(sfp_map)): + status, output =log_os_system("echo as7716_32xb_oom 0x"+str(sfp_map[i])+ " > /sys/bus/i2c/devices/i2c-0/new_device", 1) + if status: + print output + if FORCE == 0: + return status + #status, output =log_os_system("echo port"+str(i)+" > /sys/bus/i2c/devices/0-000"+str(sfp_map[i])+"/port_name", 1) + #if status: + # print output + # if FORCE == 0: + # return status + return + +def device_uninstall(): + global FORCE + + for i in range(0,len(sfp_map)): + target = "echo 0x"+str(sfp_map[i])+ " > /sys/bus/i2c/devices/i2c-0/delete_device" + print(target) + status, output =log_os_system(target, 1) + if status: + print output + if FORCE == 0: + return status + + nodelist = mknod_xb + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_inserted() == False: + print "driver_inserted() == False" + return False + if not device_exist(): + print "not device_exist()" + return False + return True + +def do_install(): + print "Checking system...." + if driver_inserted() == False: + print "No driver, installing.1..." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing..2.." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking systemm...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_inserted()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + print "path= %s" %path + print "i=%d" %i + print "k=%d" %k + print "j= %d" %j + print "sfp_map[k]=%s" %sfp_map[k] + print " buses[i]=%s" %buses[i] + print "nodes[j]=%s" %nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'sfp_eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan1'] ['fan11'][0] + node = node.replace(node.split("/")[-1], 'fan1_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0060", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-0", 0) + print(ret1) + print(ret2) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/classes/fanutil.py new file mode 100755 index 00000000000..ca0f3f9da1e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/classes/fanutil.py @@ -0,0 +1,251 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# 12/03/2018: Jostar modify for as7726_32 +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_NUM_ON_MAIN_BROAD = 6 + FAN_NUM_1_IDX = 1 + FAN_NUM_2_IDX = 2 + FAN_NUM_3_IDX = 3 + FAN_NUM_4_IDX = 4 + FAN_NUM_5_IDX = 5 + FAN_NUM_6_IDX = 6 + + FAN_NODE_NUM_OF_MAP = 2 + FAN_NODE_FAULT_IDX_OF_MAP = 1 + FAN_NODE_DIR_IDX_OF_MAP = 2 + + BASE_VAL_PATH = '/sys/bus/i2c/devices/54-0066/{0}' + FAN_DUTY_PATH = '/sys/bus/i2c/devices/54-0066/fan_duty_cycle_percentage' + + #logfile = '' + #loglevel = logging.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + _fan_to_device_path_mapping = {} + +#fan1_direction +#fan1_fault +#fan1_present + + #(FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage', + _fan_to_device_node_mapping = { + (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault', + (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction', + + (FAN_NUM_2_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan2_fault', + (FAN_NUM_2_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan2_direction', + + (FAN_NUM_3_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan3_fault', + (FAN_NUM_3_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan3_direction', + + (FAN_NUM_4_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan4_fault', + (FAN_NUM_4_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan4_direction', + + (FAN_NUM_5_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan5_fault', + (FAN_NUM_5_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan5_direction', + + (FAN_NUM_6_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan6_fault', + (FAN_NUM_6_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan6_direction', + } + + def _get_fan_to_device_node(self, fan_num, node_num): + return self._fan_to_device_node_mapping[(fan_num, node_num)] + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + + try: + val_file = open(device_path, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + def __init__(self): + fan_path = self.BASE_VAL_PATH + + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_NUM_ON_MAIN_BROAD+1): + for node_num in range(self.FAN_NODE_FAULT_IDX_OF_MAP, self.FAN_NODE_NUM_OF_MAP+1): + self._fan_to_device_path_mapping[(fan_num, node_num)] = fan_path.format( + self._fan_to_device_node_mapping[(fan_num, node_num)]) + + def get_num_fans(self): + return self.FAN_NUM_ON_MAIN_BROAD + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM_OF_MAP + + def get_idx_node_start(self): + return self.FAN_NODE_FAULT_IDX_OF_MAP + + def get_size_node_map(self): + return len(self._fan_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._fan_to_device_path_mapping) + + def get_fan_to_device_path(self, fan_num, node_num): + return self._fan_to_device_path_mapping[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_FAULT_IDX_OF_MAP) + + #def get_fan_speed(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FAN_NODE_SPEED_IDX_OF_MAP) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DIR_IDX_OF_MAP) + + def get_fan_duty_cycle(self): + #duty_path = self.FAN_DUTY_PATH + try: + val_file = open(self.FAN_DUTY_PATH) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + return int(content) + #self._get_fan_node_val(fan_num, self.FAN_NODE_DUTY_IDX_OF_MAP) +#static u32 reg_val_to_duty_cycle(u8 reg_val) +#{ +# reg_val &= FAN_DUTY_CYCLE_REG_MASK; +# return ((u32)(reg_val+1) * 625 + 75)/ 100; +#} +# + def set_fan_duty_cycle(self, val): + + try: + fan_file = open(self.FAN_DUTY_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + #val = ((val + 1 ) * 625 +75 ) / 100 + fan_file.write(str(val)) + fan_file.close() + return True + + #def get_fanr_fault(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FANR_NODE_FAULT_IDX_OF_MAP) + + def get_fanr_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP) + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num, %d', fan_num) + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + logging.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + #if self.get_fanr_fault(fan_num) is not None and self.get_fanr_fault(fan_num) > 0: + # logging.debug('GET. FANR fault. fan_num, %d', fan_num) + # return False + + return True + +#def main(): +# fan = FanUtil() +# +# print 'get_size_node_map : %d' % fan.get_size_node_map() +# print 'get_size_path_map : %d' % fan.get_size_path_map() +# for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): +# for y in range(fan.get_idx_node_start(), fan.get_num_nodes()+1): +# print fan.get_fan_to_device_path(x, y) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/classes/thermalutil.py new file mode 100755 index 00000000000..96163f1d63a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/classes/thermalutil.py @@ -0,0 +1,131 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018:Jostar modify for as7716_32x +# 12/03/2018:Jostar modify for as7726_32x thermal plan +# ------------------------------------------------------------------ + +try: + import os + import time + import logging + import glob + import commands + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + THERMAL_NUM_MAX = 5 + THERMAL_NUM_1_IDX = 1 # 1_ON_MAIN_BROAD. LM75 + THERMAL_NUM_2_IDX = 2 # 2_ON_MAIN_BROAD. LM75 + THERMAL_NUM_3_IDX = 3 # 3_ON_MAIN_BROAD. LM75 + THERMAL_NUM_4_IDX = 4 # 4_ON_MAIN_BROAD. LM75 + THERMAL_NUM_5_IDX = 5 # 5_ON_MAIN_BROAD. LM75 + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + #_thermal_to_device_path_mapping = {} + + _thermal_to_device_node_mapping = { + THERMAL_NUM_1_IDX: ['55', '48'], + THERMAL_NUM_2_IDX: ['55', '49'], + THERMAL_NUM_3_IDX: ['55', '4a'], + THERMAL_NUM_4_IDX: ['55', '4b'], + THERMAL_NUM_5_IDX: ['54', '4c'], + } + thermal_sysfspath ={ + THERMAL_NUM_1_IDX: ["/sys/bus/i2c/devices/55-0048/hwmon/hwmon4/temp1_input"], + THERMAL_NUM_2_IDX: ["/sys/bus/i2c/devices/55-0049/hwmon/hwmon5/temp1_input"], + THERMAL_NUM_3_IDX: ["/sys/bus/i2c/devices/55-004a/hwmon/hwmon6/temp1_input"], + THERMAL_NUM_4_IDX: ["/sys/bus/i2c/devices/55-004b/hwmon/hwmon7/temp1_input"], + THERMAL_NUM_5_IDX: ["/sys/bus/i2c/devices/54-004c/hwmon/hwmon3/temp1_input"], + } + + #def __init__(self): + def _get_thermal_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_MAX: + logging.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_to_device_path(thermal_num) + if(os.path.isfile(device_path)): + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + content = val_file.readline().rstrip() + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + return int(content) + + else: + print "No such device_path=%s"%device_path + return 0 + + def get_num_thermals(self): + return self.THERMAL_NUM_MAX + + def get_idx_thermal_start(self): + return self.THERMAL_NUM_1_IDX + + def get_size_node_map(self): + return len(self._thermal_to_device_node_mapping) + + def get_size_path_map(self): + return len(self.thermal_sysfspath) + + def get_thermal_to_device_path(self, thermal_num): + return self.thermal_sysfspath[thermal_num][0] + + def get_thermal_1_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + + def get_thermal_2_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) + def get_thermal_temp(self): + return (self._get_thermal_node_val(self.THERMAL_NUM_1_IDX) + self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) +self._get_thermal_node_val(self.THERMAL_NUM_3_IDX)) + +def main(): + thermal = ThermalUtil() + print "termal1=%d" %thermal._get_thermal_val(1) + print "termal2=%d" %thermal._get_thermal_val(2) + print "termal3=%d" %thermal._get_thermal_val(3) + print "termal4=%d" %thermal._get_thermal_val(4) + print "termal5=%d" %thermal._get_thermal_val(5) +# +# print 'get_size_node_map : %d' % thermal.get_size_node_map() +# print 'get_size_path_map : %d' % thermal.get_size_path_map() +# for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): +# print thermal.get_thermal_to_device_path(x) +# +if __name__ == '__main__': + main() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/Makefile new file mode 100755 index 00000000000..5b5e6912c56 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/Makefile @@ -0,0 +1,19 @@ +ifneq ($(KERNELRELEASE),) +obj-m:= accton_as7726_32x_cpld.o accton_as7726_32x_fan.o \ + accton_as7726_32x_leds.o accton_as7726_32x_psu.o ym2651y.o + +else +ifeq (,$(KERNEL_SRC)) +#$(error KERNEL_SRC is not defined) +KVERSION=3.16.0-6-amd64 +KERNEL_DIR = /usr/src/linux-headers-$(KVERSION)/ +KERNELDIR:=$(KERNEL_DIR) +else +KERNELDIR:=$(KERNEL_SRC) +endif +PWD:=$(shell pwd) +default: + $(MAKE) -C $(KERNELDIR) M=$(PWD) modules +clean: + rm -rf *.o *.mod.o *.mod.o *.ko .*cmd .tmp_versions Module.markers Module.symvers modules.order +endif diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_cpld.c new file mode 100755 index 00000000000..9ffc3353839 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_cpld.c @@ -0,0 +1,919 @@ +/* + * Copyright (C) Brandon Chuang + * + * This module supports the accton cpld that hold the channel select + * mechanism for other i2c slave devices, such as SFP. + * This includes the: + * Accton as7726_32x CPLD1/CPLD2/CPLD3 + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +enum cpld_type { + as7726_32x_cpld1, + as7726_32x_cpld2, + as7726_32x_cpld3 +}; + +struct as7726_32x_cpld_data { + enum cpld_type type; + struct device *hwmon_dev; + struct mutex update_lock; +}; + +static const struct i2c_device_id as7726_32x_cpld_id[] = { + { "as7726_32x_cpld1", as7726_32x_cpld1 }, + { "as7726_32x_cpld2", as7726_32x_cpld2 }, + { "as7726_32x_cpld3", as7726_32x_cpld3 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, as7726_32x_cpld_id); + +#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index +#define TRANSCEIVER_TXDISABLE_ATTR_ID(index) MODULE_TXDISABLE_##index +#define TRANSCEIVER_RXLOS_ATTR_ID(index) MODULE_RXLOS_##index +#define TRANSCEIVER_RESET_ATTR_ID(index) MODULE_RESET_##index +//#define TRANSCEIVER_TXFAULT_ATTR_ID(index) MODULE_TXFAULT_##index + +enum as7726_32x_cpld1_sysfs_attributes { + CPLD_VERSION, + ACCESS, + MODULE_PRESENT_ALL, + MODULE_RXLOS_ALL, + /* transceiver attributes */ + TRANSCEIVER_PRESENT_ATTR_ID(1), + TRANSCEIVER_PRESENT_ATTR_ID(2), + TRANSCEIVER_PRESENT_ATTR_ID(3), + TRANSCEIVER_PRESENT_ATTR_ID(4), + TRANSCEIVER_PRESENT_ATTR_ID(5), + TRANSCEIVER_PRESENT_ATTR_ID(6), + TRANSCEIVER_PRESENT_ATTR_ID(7), + TRANSCEIVER_PRESENT_ATTR_ID(8), + TRANSCEIVER_PRESENT_ATTR_ID(9), + TRANSCEIVER_PRESENT_ATTR_ID(10), + TRANSCEIVER_PRESENT_ATTR_ID(11), + TRANSCEIVER_PRESENT_ATTR_ID(12), + TRANSCEIVER_PRESENT_ATTR_ID(13), + TRANSCEIVER_PRESENT_ATTR_ID(14), + TRANSCEIVER_PRESENT_ATTR_ID(15), + TRANSCEIVER_PRESENT_ATTR_ID(16), + TRANSCEIVER_PRESENT_ATTR_ID(17), + TRANSCEIVER_PRESENT_ATTR_ID(18), + TRANSCEIVER_PRESENT_ATTR_ID(19), + TRANSCEIVER_PRESENT_ATTR_ID(20), + TRANSCEIVER_PRESENT_ATTR_ID(21), + TRANSCEIVER_PRESENT_ATTR_ID(22), + TRANSCEIVER_PRESENT_ATTR_ID(23), + TRANSCEIVER_PRESENT_ATTR_ID(24), + TRANSCEIVER_PRESENT_ATTR_ID(25), + TRANSCEIVER_PRESENT_ATTR_ID(26), + TRANSCEIVER_PRESENT_ATTR_ID(27), + TRANSCEIVER_PRESENT_ATTR_ID(28), + TRANSCEIVER_PRESENT_ATTR_ID(29), + TRANSCEIVER_PRESENT_ATTR_ID(30), + TRANSCEIVER_PRESENT_ATTR_ID(31), + TRANSCEIVER_PRESENT_ATTR_ID(32), + TRANSCEIVER_PRESENT_ATTR_ID(33), + TRANSCEIVER_PRESENT_ATTR_ID(34), + TRANSCEIVER_TXDISABLE_ATTR_ID(33), + TRANSCEIVER_TXDISABLE_ATTR_ID(34), + TRANSCEIVER_RXLOS_ATTR_ID(33), + TRANSCEIVER_RXLOS_ATTR_ID(34), + TRANSCEIVER_RESET_ATTR_ID(1), + TRANSCEIVER_RESET_ATTR_ID(2), + TRANSCEIVER_RESET_ATTR_ID(3), + TRANSCEIVER_RESET_ATTR_ID(4), + TRANSCEIVER_RESET_ATTR_ID(5), + TRANSCEIVER_RESET_ATTR_ID(6), + TRANSCEIVER_RESET_ATTR_ID(7), + TRANSCEIVER_RESET_ATTR_ID(8), + TRANSCEIVER_RESET_ATTR_ID(9), + TRANSCEIVER_RESET_ATTR_ID(10), + TRANSCEIVER_RESET_ATTR_ID(11), + TRANSCEIVER_RESET_ATTR_ID(12), + TRANSCEIVER_RESET_ATTR_ID(13), + TRANSCEIVER_RESET_ATTR_ID(14), + TRANSCEIVER_RESET_ATTR_ID(15), + TRANSCEIVER_RESET_ATTR_ID(16), + TRANSCEIVER_RESET_ATTR_ID(17), + TRANSCEIVER_RESET_ATTR_ID(18), + TRANSCEIVER_RESET_ATTR_ID(19), + TRANSCEIVER_RESET_ATTR_ID(20), + TRANSCEIVER_RESET_ATTR_ID(21), + TRANSCEIVER_RESET_ATTR_ID(22), + TRANSCEIVER_RESET_ATTR_ID(23), + TRANSCEIVER_RESET_ATTR_ID(24), + TRANSCEIVER_RESET_ATTR_ID(25), + TRANSCEIVER_RESET_ATTR_ID(26), + TRANSCEIVER_RESET_ATTR_ID(27), + TRANSCEIVER_RESET_ATTR_ID(28), + TRANSCEIVER_RESET_ATTR_ID(29), + TRANSCEIVER_RESET_ATTR_ID(30), + TRANSCEIVER_RESET_ATTR_ID(31), + TRANSCEIVER_RESET_ATTR_ID(32) +}; + +/* sysfs attributes for hwmon + */ +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_rxlos_all(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t set_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +static int as7726_32x_cpld_read_internal(struct i2c_client *client, u8 reg); +static int as7726_32x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value); + +/* transceiver attributes */ +#define DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_status, NULL, MODULE_PRESENT_##index) +#define DECLARE_TRANSCEIVER_PRESENT_ATTR(index) &sensor_dev_attr_module_present_##index.dev_attr.attr + + +#define DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_reset_##index, S_IRUGO|S_IWUSR, show_status, set_reset, MODULE_RESET_##index) +#define DECLARE_TRANSCEIVER_RESET_ATTR(index) &sensor_dev_attr_module_reset_##index.dev_attr.attr + + +#define DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_tx_disable_##index, S_IRUGO | S_IWUSR, show_status, set_tx_disable, MODULE_TXDISABLE_##index); \ + static SENSOR_DEVICE_ATTR(module_rx_los_##index, S_IRUGO, show_status, NULL, MODULE_RXLOS_##index); + + +#define DECLARE_SFP_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_tx_disable_##index.dev_attr.attr, \ + &sensor_dev_attr_module_rx_los_##index.dev_attr.attr + + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS); +/* transceiver attributes */ +static SENSOR_DEVICE_ATTR(module_present_all, S_IRUGO, show_present_all, NULL, MODULE_PRESENT_ALL); +static SENSOR_DEVICE_ATTR(module_rx_los_all, S_IRUGO, show_rxlos_all, NULL, MODULE_RXLOS_ALL); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(1); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(2); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(3); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(4); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(5); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(6); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(7); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(8); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(9); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(10); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(11); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(12); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(13); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(14); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(15); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(16); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(17); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(18); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(19); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(20); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(21); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(22); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(23); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(24); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(25); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(26); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(27); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(28); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(29); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(30); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(31); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(32); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(33); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(34); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(33); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(34); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(1); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(2); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(3); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(4); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(5); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(6); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(7); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(8); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(9); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(10); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(11); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(12); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(13); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(14); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(15); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(16); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(17); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(18); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(19); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(20); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(21); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(22); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(23); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(24); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(25); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(26); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(27); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(28); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(29); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(30); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(31); +DECLARE_TRANSCEIVER_RESET_SENSOR_DEVICE_ATTR(32); + +static struct attribute *as7726_32x_cpld1_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + &sensor_dev_attr_module_present_all.dev_attr.attr, + &sensor_dev_attr_module_rx_los_all.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(1), + DECLARE_TRANSCEIVER_PRESENT_ATTR(2), + DECLARE_TRANSCEIVER_PRESENT_ATTR(3), + DECLARE_TRANSCEIVER_PRESENT_ATTR(4), + DECLARE_TRANSCEIVER_PRESENT_ATTR(5), + DECLARE_TRANSCEIVER_PRESENT_ATTR(6), + DECLARE_TRANSCEIVER_PRESENT_ATTR(7), + DECLARE_TRANSCEIVER_PRESENT_ATTR(8), + DECLARE_TRANSCEIVER_PRESENT_ATTR(9), + DECLARE_TRANSCEIVER_PRESENT_ATTR(10), + DECLARE_TRANSCEIVER_PRESENT_ATTR(11), + DECLARE_TRANSCEIVER_PRESENT_ATTR(12), + DECLARE_TRANSCEIVER_PRESENT_ATTR(13), + DECLARE_TRANSCEIVER_PRESENT_ATTR(14), + DECLARE_TRANSCEIVER_PRESENT_ATTR(15), + DECLARE_TRANSCEIVER_PRESENT_ATTR(16), + DECLARE_TRANSCEIVER_PRESENT_ATTR(17), + DECLARE_TRANSCEIVER_PRESENT_ATTR(18), + DECLARE_TRANSCEIVER_PRESENT_ATTR(19), + DECLARE_TRANSCEIVER_PRESENT_ATTR(20), + DECLARE_TRANSCEIVER_PRESENT_ATTR(21), + DECLARE_TRANSCEIVER_PRESENT_ATTR(22), + DECLARE_TRANSCEIVER_PRESENT_ATTR(23), + DECLARE_TRANSCEIVER_PRESENT_ATTR(24), + DECLARE_TRANSCEIVER_PRESENT_ATTR(25), + DECLARE_TRANSCEIVER_PRESENT_ATTR(26), + DECLARE_TRANSCEIVER_PRESENT_ATTR(27), + DECLARE_TRANSCEIVER_PRESENT_ATTR(28), + DECLARE_TRANSCEIVER_PRESENT_ATTR(29), + DECLARE_TRANSCEIVER_PRESENT_ATTR(30), + DECLARE_TRANSCEIVER_PRESENT_ATTR(31), + DECLARE_TRANSCEIVER_PRESENT_ATTR(32), + DECLARE_TRANSCEIVER_PRESENT_ATTR(33), + DECLARE_TRANSCEIVER_PRESENT_ATTR(34), + DECLARE_SFP_TRANSCEIVER_ATTR(33), + DECLARE_SFP_TRANSCEIVER_ATTR(34), + DECLARE_TRANSCEIVER_RESET_ATTR(1), + DECLARE_TRANSCEIVER_RESET_ATTR(2), + DECLARE_TRANSCEIVER_RESET_ATTR(3), + DECLARE_TRANSCEIVER_RESET_ATTR(4), + DECLARE_TRANSCEIVER_RESET_ATTR(5), + DECLARE_TRANSCEIVER_RESET_ATTR(6), + DECLARE_TRANSCEIVER_RESET_ATTR(7), + DECLARE_TRANSCEIVER_RESET_ATTR(8), + DECLARE_TRANSCEIVER_RESET_ATTR(9), + DECLARE_TRANSCEIVER_RESET_ATTR(10), + DECLARE_TRANSCEIVER_RESET_ATTR(11), + DECLARE_TRANSCEIVER_RESET_ATTR(12), + DECLARE_TRANSCEIVER_RESET_ATTR(13), + DECLARE_TRANSCEIVER_RESET_ATTR(14), + DECLARE_TRANSCEIVER_RESET_ATTR(15), + DECLARE_TRANSCEIVER_RESET_ATTR(16), + DECLARE_TRANSCEIVER_RESET_ATTR(17), + DECLARE_TRANSCEIVER_RESET_ATTR(18), + DECLARE_TRANSCEIVER_RESET_ATTR(19), + DECLARE_TRANSCEIVER_RESET_ATTR(20), + DECLARE_TRANSCEIVER_RESET_ATTR(21), + DECLARE_TRANSCEIVER_RESET_ATTR(22), + DECLARE_TRANSCEIVER_RESET_ATTR(23), + DECLARE_TRANSCEIVER_RESET_ATTR(24), + DECLARE_TRANSCEIVER_RESET_ATTR(25), + DECLARE_TRANSCEIVER_RESET_ATTR(26), + DECLARE_TRANSCEIVER_RESET_ATTR(27), + DECLARE_TRANSCEIVER_RESET_ATTR(28), + DECLARE_TRANSCEIVER_RESET_ATTR(29), + DECLARE_TRANSCEIVER_RESET_ATTR(30), + DECLARE_TRANSCEIVER_RESET_ATTR(31), + DECLARE_TRANSCEIVER_RESET_ATTR(32), + NULL +}; + +static const struct attribute_group as7726_32x_cpld1_group = { + .attrs = as7726_32x_cpld1_attributes, +}; + +static struct attribute *as7726_32x_cpld2_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + NULL +}; + +static const struct attribute_group as7726_32x_cpld2_group = { + .attrs = as7726_32x_cpld2_attributes, +}; + +static struct attribute *as7726_32x_cpld3_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + NULL +}; + +static const struct attribute_group as7726_32x_cpld3_group = { + .attrs = as7726_32x_cpld3_attributes, +}; + +static ssize_t show_present_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int i, status; + u8 values[5] = {0}; + u8 regs[] = {0x30, 0x31, 0x32, 0x33, 0x50}; + struct i2c_client *client = to_i2c_client(dev); + struct as7726_32x_cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = as7726_32x_cpld_read_internal(client, regs[i]); + + if (status < 0) { + goto exit; + } + + values[i] = ~(u8)status; + } + + mutex_unlock(&data->update_lock); + + values[4] &= 0x3; + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], values[3], values[4]); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_rxlos_all(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + u8 value=0; + u8 reg = 0x50; + struct i2c_client *client = to_i2c_client(dev); + struct as7726_32x_cpld_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + status = as7726_32x_cpld_read_internal(client, reg); + + if (status < 0) + goto exit; + + value = (u8)status; + value &= 0x0C; + value = value >> 2; + mutex_unlock(&data->update_lock); + + /* Return values 1 -> 34 in order */ + return sprintf(buf, "00 00 00 00 %.2x\n", value); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7726_32x_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0, revert = 0; + + switch (attr->index) { + case MODULE_PRESENT_1 ... MODULE_PRESENT_8: + reg = 0x30; + mask = 0x1 << (attr->index - MODULE_PRESENT_1); + break; + case MODULE_PRESENT_9 ... MODULE_PRESENT_16: + reg = 0x31; + mask = 0x1 << (attr->index - MODULE_PRESENT_9); + break; + case MODULE_PRESENT_17 ... MODULE_PRESENT_24: + reg = 0x32; + mask = 0x1 << (attr->index - MODULE_PRESENT_17); + break; + case MODULE_PRESENT_25 ... MODULE_PRESENT_32: + reg = 0x33; + mask = 0x1 << (attr->index - MODULE_PRESENT_25); + break; + case MODULE_PRESENT_33: + reg = 0x50; + mask = 0x1; + break; + case MODULE_PRESENT_34: + reg = 0x50; + mask = 0x2; + break; + case MODULE_RESET_1 ... MODULE_RESET_8: + reg = 0x4; + mask = 0x1 << (attr->index - MODULE_RESET_1); + break; + case MODULE_RESET_9 ... MODULE_RESET_16: + reg = 0x5; + mask = 0x1 << (attr->index - MODULE_RESET_9); + break; + case MODULE_RESET_17 ... MODULE_RESET_24: + reg = 0x6; + mask = 0x1 << (attr->index - MODULE_RESET_17); + break; + case MODULE_RESET_25 ... MODULE_RESET_32: + reg = 0x7; + mask = 0x1 << (attr->index - MODULE_RESET_25); + break; + case MODULE_RXLOS_33: + reg = 0x50; + mask = 0x4; + break; + case MODULE_RXLOS_34: + reg = 0x50; + mask = 0x8; + break; + case MODULE_TXDISABLE_33: + reg = 0x49; + mask = 0x1; + break; + case MODULE_TXDISABLE_34: + reg = 0x49; + mask = 0x2; + break; + + default: + return 0; + } + + if (attr->index >= MODULE_PRESENT_1 && attr->index <= MODULE_PRESENT_34) { + revert = 1; + } + + mutex_lock(&data->update_lock); + status = as7726_32x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", revert ? !(status & mask) : !!(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7726_32x_cpld_data *data = i2c_get_clientdata(client); + long disable; + int status; + u8 reg = 0, mask = 0; + + status = kstrtol(buf, 10, &disable); + if (status) { + return status; + } + + switch (attr->index) { + case MODULE_TXDISABLE_33: + reg = 0x49; + mask = 0x1; + break; + case MODULE_TXDISABLE_34: + reg = 0x49; + mask = 0x2; + break; + default: + return 0; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as7726_32x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update tx_disable status */ + if (disable) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as7726_32x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as7726_32x_cpld_data *data = i2c_get_clientdata(client); + long reset; + int status; + u8 reg = 0, mask = 0; + + status = kstrtol(buf, 10, &reset); + if (status) { + return status; + } + + switch (attr->index) + { + case MODULE_RESET_1 ... MODULE_RESET_8: + reg = 0x4; + mask = 0x1 << (attr->index - MODULE_RESET_1); + break; + case MODULE_RESET_9 ... MODULE_RESET_16: + reg = 0x5; + mask = 0x1 << (attr->index - MODULE_RESET_9); + break; + case MODULE_RESET_17 ... MODULE_RESET_24: + reg = 0x6; + mask = 0x1 << (attr->index - MODULE_RESET_17); + break; + case MODULE_RESET_25 ... MODULE_RESET_32: + reg = 0x7; + mask = 0x1 << (attr->index - MODULE_RESET_25); + break; + default: + return 0; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as7726_32x_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update tx_disable status */ + if (!reset) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as7726_32x_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct as7726_32x_cpld_data *data = i2c_get_clientdata(client); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = as7726_32x_cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static void as7726_32x_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as7726_32x_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, 0x1); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d\n", val); +} + +/* + * I2C init/probing/exit functions + */ +static int as7726_32x_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + struct as7726_32x_cpld_data *data; + int ret = -ENODEV; + const struct attribute_group *group = NULL; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + goto exit; + + data = kzalloc(sizeof(struct as7726_32x_cpld_data), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->type = id->driver_data; + + /* Register sysfs hooks */ + switch (data->type) { + case as7726_32x_cpld1: + group = &as7726_32x_cpld1_group; + break; + case as7726_32x_cpld2: + group = &as7726_32x_cpld2_group; + break; + case as7726_32x_cpld3: + group = &as7726_32x_cpld3_group; + break; + default: + break; + } + + if (group) { + ret = sysfs_create_group(&client->dev.kobj, group); + if (ret) { + goto exit_free; + } + } + + as7726_32x_cpld_add_client(client); + return 0; + +exit_free: + kfree(data); +exit: + return ret; +} + +static int as7726_32x_cpld_remove(struct i2c_client *client) +{ + struct as7726_32x_cpld_data *data = i2c_get_clientdata(client); + const struct attribute_group *group = NULL; + + as7726_32x_cpld_remove_client(client); + + /* Remove sysfs hooks */ + switch (data->type) { + case as7726_32x_cpld1: + group = &as7726_32x_cpld1_group; + break; + case as7726_32x_cpld2: + group = &as7726_32x_cpld2_group; + break; + case as7726_32x_cpld3: + group = &as7726_32x_cpld3_group; + break; + default: + break; + } + + if (group) { + sysfs_remove_group(&client->dev.kobj, group); + } + + kfree(data); + + return 0; +} + +static int as7726_32x_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int as7726_32x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +int as7726_32x_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as7726_32x_cpld_read_internal(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as7726_32x_cpld_read); + +int as7726_32x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as7726_32x_cpld_write_internal(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as7726_32x_cpld_write); + +static struct i2c_driver as7726_32x_cpld_driver = { + .driver = { + .name = "as7726_32x_cpld", + .owner = THIS_MODULE, + }, + .probe = as7726_32x_cpld_probe, + .remove = as7726_32x_cpld_remove, + .id_table = as7726_32x_cpld_id, +}; + +static int __init as7726_32x_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as7726_32x_cpld_driver); +} + +static void __exit as7726_32x_cpld_exit(void) +{ + i2c_del_driver(&as7726_32x_cpld_driver); +} + +MODULE_AUTHOR("Jostar Yang "); +MODULE_DESCRIPTION("Accton I2C CPLD driver"); +MODULE_LICENSE("GPL"); + +module_init(as7726_32x_cpld_init); +module_exit(as7726_32x_cpld_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_fan.c new file mode 100755 index 00000000000..beb58804ac9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_fan.c @@ -0,0 +1,763 @@ +/* + * A hwmon driver for the Accton as7726 32x fan + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as7726_32x_fan" + +#define NUM_THERMAL_SENSORS (5) /* Get sum of this number of sensors.*/ +#define THERMAL_SENSORS_DRIVER "lm75" +#define THERMAL_SENSORS_ADDRS {0x48, 0x49, 0x4a, 0x4b, 0x4c} + +#define IN +#define OUT + +static struct as7726_32x_fan_data *as7726_32x_fan_update_device(struct device *dev); +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, char *buf); + +/* fan related data, the index should match sysfs_fan_attributes + */ +static const u8 fan_reg[] = { + 0x0F, /* fan 1-6 present status */ + 0x10, /* fan 1-6 direction(0:F2B 1:B2F) */ + 0x11, /* fan PWM(for all fan) */ + 0x12, /* front fan 1 speed(rpm) */ + 0x13, /* front fan 2 speed(rpm) */ + 0x14, /* front fan 3 speed(rpm) */ + 0x15, /* front fan 4 speed(rpm) */ + 0x16, /* front fan 5 speed(rpm) */ + 0x17, /* front fan 6 speed(rpm) */ + 0x22, /* rear fan 1 speed(rpm) */ + 0x23, /* rear fan 2 speed(rpm) */ + 0x24, /* rear fan 3 speed(rpm) */ + 0x25, /* rear fan 4 speed(rpm) */ + 0x26, /* rear fan 5 speed(rpm) */ + 0x27, /* rear fan 6 speed(rpm) */ +}; + +/* Each client has this additional data */ +struct as7726_32x_fan_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ + int system_temp; /*In unit of mini-Celsius*/ + int sensors_found; +}; + +enum fan_id { + FAN1_ID, + FAN2_ID, + FAN3_ID, + FAN4_ID, + FAN5_ID, + FAN6_ID +}; + +enum sysfs_fan_attributes { + FAN_PRESENT_REG, + FAN_DIRECTION_REG, + FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ + FAN1_FRONT_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN5_FRONT_SPEED_RPM, + FAN6_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN5_REAR_SPEED_RPM, + FAN6_REAR_SPEED_RPM, + FAN1_DIRECTION, + FAN2_DIRECTION, + FAN3_DIRECTION, + FAN4_DIRECTION, + FAN5_DIRECTION, + FAN6_DIRECTION, + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN5_PRESENT, + FAN6_PRESENT, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + FAN5_FAULT, + FAN6_FAULT +}; + +/* Define attributes + */ +#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT);\ + static SENSOR_DEVICE_ATTR(fan##index2##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT) + +#define DECLARE_FAN_FAULT_ATTR(index, index2) &sensor_dev_attr_fan##index##_fault.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_fault.dev_attr.attr + + +#define DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_direction, S_IRUGO, fan_show_value, NULL, FAN##index##_DIRECTION) +#define DECLARE_FAN_DIRECTION_ATTR(index) &sensor_dev_attr_fan##index##_direction.dev_attr.attr + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN##index##_DUTY_CYCLE_PERCENTAGE) +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan##index##_duty_cycle_percentage.dev_attr.attr + +#define DECLARE_FAN_SYSTEM_TEMP_SENSOR_DEV_ATTR() \ + static SENSOR_DEVICE_ATTR(sys_temp, S_IRUGO, get_sys_temp, NULL, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_SYSTEM_TEMP_ATTR() &sensor_dev_attr_sys_temp.dev_attr.attr + +#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_present, S_IRUGO, fan_show_value, NULL, FAN##index##_PRESENT) +#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr + +#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index2##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM) +#define DECLARE_FAN_SPEED_RPM_ATTR(index, index2) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_input.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_input.dev_attr.attr + +/* 6 fan fault attributes in this platform */ +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(6,16); + +/* 6 fan speed(rpm) attributes in this platform */ +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(6,16); +/* 6 fan present attributes in this platform */ +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(5); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(6); +/* 6 fan direction attribute in this platform */ +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(1); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(2); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(3); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(4); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(5); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(6); +/* 1 fan duty cycle attribute in this platform */ +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(); +/* System temperature for fancontrol */ +DECLARE_FAN_SYSTEM_TEMP_SENSOR_DEV_ATTR(); + +static struct attribute *as7726_32x_fan_attributes[] = { + /* fan related attributes */ + DECLARE_FAN_FAULT_ATTR(1,11), + DECLARE_FAN_FAULT_ATTR(2,12), + DECLARE_FAN_FAULT_ATTR(3,13), + DECLARE_FAN_FAULT_ATTR(4,14), + DECLARE_FAN_FAULT_ATTR(5,15), + DECLARE_FAN_FAULT_ATTR(6,16), + DECLARE_FAN_SPEED_RPM_ATTR(1,11), + DECLARE_FAN_SPEED_RPM_ATTR(2,12), + DECLARE_FAN_SPEED_RPM_ATTR(3,13), + DECLARE_FAN_SPEED_RPM_ATTR(4,14), + DECLARE_FAN_SPEED_RPM_ATTR(5,15), + DECLARE_FAN_SPEED_RPM_ATTR(6,16), + DECLARE_FAN_PRESENT_ATTR(1), + DECLARE_FAN_PRESENT_ATTR(2), + DECLARE_FAN_PRESENT_ATTR(3), + DECLARE_FAN_PRESENT_ATTR(4), + DECLARE_FAN_PRESENT_ATTR(5), + DECLARE_FAN_PRESENT_ATTR(6), + DECLARE_FAN_DIRECTION_ATTR(1), + DECLARE_FAN_DIRECTION_ATTR(2), + DECLARE_FAN_DIRECTION_ATTR(3), + DECLARE_FAN_DIRECTION_ATTR(4), + DECLARE_FAN_DIRECTION_ATTR(5), + DECLARE_FAN_DIRECTION_ATTR(6), + DECLARE_FAN_DUTY_CYCLE_ATTR(), + DECLARE_FAN_SYSTEM_TEMP_ATTR(), + NULL +}; + +#define FAN_DUTY_CYCLE_REG_MASK 0xF +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 100 + +static int as7726_32x_fan_read_value(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int as7726_32x_fan_write_value(struct i2c_client *client, u8 reg, u8 value) +{ + return i2c_smbus_write_byte_data(client, reg, value); +} + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + reg_val &= FAN_DUTY_CYCLE_REG_MASK; + return ((u32)(reg_val+1) * 625 + 75)/ 100; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + return ((u32)duty_cycle * 100 / 625) - 1; +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static u8 reg_val_to_direction(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 1 : 0; +} +static u8 reg_val_to_is_present(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 0 : 1; +} + +static u8 is_fan_fault(struct as7726_32x_fan_data *data, enum fan_id id) +{ + u8 ret = 1; + int front_fan_index = FAN1_FRONT_SPEED_RPM + id; + int rear_fan_index = FAN1_REAR_SPEED_RPM + id; + + /* Check if the speed of front or rear fan is ZERO, + */ + if (reg_val_to_speed_rpm(data->reg_val[front_fan_index]) && + reg_val_to_speed_rpm(data->reg_val[rear_fan_index])) { + ret = 0; + } + + return ret; +} + +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + struct i2c_client *client = to_i2c_client(dev); + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0 || value > FAN_MAX_DUTY_CYCLE) + return -EINVAL; + + as7726_32x_fan_write_value(client, 0x33, 0); /* Disable fan speed watch dog */ + as7726_32x_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); + return count; +} + +/* Due to this struct is declared at lm75.c, it cannot be include + * under Sonic environment. I duplicate it from lm75.c. + */ +struct lm75_data { + struct i2c_client *client; + struct device *hwmon_dev; + struct thermal_zone_device *tz; + struct mutex update_lock; + u8 orig_conf; + u8 resolution; /* In bits, between 9 and 12 */ + u8 resolution_limits; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + unsigned long sample_time; /* In jiffies */ + s16 temp[3]; /* Register values, + 0 = input + 1 = max + 2 = hyst */ +}; + +/*Copied from lm75.c*/ +static inline long lm75_reg_to_mc(s16 temp, u8 resolution) +{ + return ((temp >> (16 - resolution)) * 1000) >> (resolution - 8); +} + +/*Get hwmon_dev from i2c_client, set hwmon_dev = NULL is failed.*/ +static struct device * get_hwmon_dev( + struct i2c_client *client) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + if(data) + { + if( data->valid == 1 && data->hwmon_dev) + { + return data->hwmon_dev; + } + + } + return NULL; +} + +/* To find hwmon index by opening hwmon under that i2c address. + */ +static int find_hwmon_index_by_FileOpen( + int bus_nr, + unsigned short addr, + OUT int *index) +{ +#define MAX_HWMON_DEVICE (10) /* Find hwmon device in 0~10*/ + struct file *sfd; + char client_name[96]; + int i=0; + + do { + snprintf(client_name, sizeof(client_name), + "/sys/bus/i2c/devices/%d-%04x/hwmon/hwmon%d/temp1_input", + bus_nr, addr, i); + + sfd = filp_open(client_name, O_RDONLY, 0); + i++; + } while( IS_ERR(sfd) && i < MAX_HWMON_DEVICE); + + if (IS_ERR(sfd)) { + pr_err("Failed to open file(%s)#%d\r\n", client_name, __LINE__); + return -ENOENT; + } + filp_close(sfd, 0); + *index = i - 1; + return 0; + +#undef MAX_HWMON_DEVICE +} + +static int get_temp_file_path( + int bus_nr, unsigned short addr, + struct device *hwmon_dev + ,char *path, int max_len) +{ + + if(hwmon_dev && strlen(dev_name(hwmon_dev))) + { + snprintf(path, max_len, + "/sys/bus/i2c/devices/%d-%04x/hwmon/%s/temp1_input", + bus_nr, addr, dev_name(hwmon_dev)); + } + else + { + int i=0; + if(find_hwmon_index_by_FileOpen( bus_nr, addr, &i)) + { + return -EIO; + } + snprintf(path, max_len, + "/sys/bus/i2c/devices/%d-%04x/hwmon/hwmon%d/temp1_input", + bus_nr, addr, i); + } + + return 0; +} + +/*File read the dev file at user space.*/ +static int read_devfile_temp1_input( + struct device *dev, + int bus_nr, + unsigned short addr, + struct device *hwmon_dev, + int *miniCelsius) +{ + struct file *sfd; + char buffer[96]; + char devfile[96]; + int rc, status; + int rdlen, value; + mm_segment_t old_fs; + + rc = 0; + get_temp_file_path(bus_nr, addr, hwmon_dev, devfile, sizeof(devfile)); + sfd = filp_open(devfile, O_RDONLY, 0); + if (IS_ERR(sfd)) { + pr_err("Failed to open file(%s)#%d\r\n", devfile, __LINE__); + return -ENOENT; + } + dev_dbg(dev, "Found device:%s\n",devfile); + + if(!(sfd->f_op) || !(sfd->f_op->read) ) { + pr_err("file %s cann't readable ?\n",devfile); + return -ENOENT; + } + + old_fs = get_fs(); + set_fs(KERNEL_DS); + rdlen = sfd->f_op->read(sfd, buffer, sizeof(buffer), &sfd->f_pos); + if (rdlen == 0) { + pr_err( "File(%s) empty!\n", devfile); + rc = -EIO; + goto exit; + } + status = sscanf(buffer, "%d", &value); + if (status != 1) { + rc = -EIO; + goto exit; + } + *miniCelsius = value; + dev_dbg(dev,"found sensors: %d @i2c %d-%04x\n", value, bus_nr, addr); + +exit: + set_fs(old_fs); + filp_close(sfd, 0); + return rc; +} + +static u8 is_lm75_data_due(struct i2c_client *client) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + if (time_after(jiffies, data->last_updated + data->sample_time)) + { + return 1; + } + return 0; +} +static int get_lm75_temp(struct i2c_client *client, int *miniCelsius) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + *miniCelsius = lm75_reg_to_mc(data->temp[0], data->resolution); + + return 0; +} + +static bool lm75_addr_mached(unsigned short addr) +{ + int i; + unsigned short addrs[] = THERMAL_SENSORS_ADDRS; + + for (i = 0; i < ARRAY_SIZE(addrs); i++) + { + if( addr == addrs[i]) + return 1; + } + return 0; +} + +static int _find_lm75_device(struct device *dev, void *data) +{ + struct device_driver *driver; + struct as7726_32x_fan_data *prv = data; + char *driver_name = THERMAL_SENSORS_DRIVER; + + driver = dev->driver; + if (driver && driver->name && + strcmp(driver->name, driver_name) == 0) + { + struct i2c_client *client; + client = to_i2c_client(dev); + if (client) + { + /*cannot use "struct i2c_adapter *adap = to_i2c_adapter(dev);"*/ + struct i2c_adapter *adap = client->adapter; + int miniCelsius = 0; + + if (! lm75_addr_mached(client->addr)) + { + return 0; + } + + if (!adap) { + return -ENXIO; + } + + /* If the data is not updated, read them from devfile + to drive them updateing data from chip.*/ + if (is_lm75_data_due(client)) + { + struct device *hwmon_dev; + + hwmon_dev = get_hwmon_dev(client); + if(0 == read_devfile_temp1_input(dev, adap->nr, + client->addr, hwmon_dev, &miniCelsius)) + { + prv->system_temp += miniCelsius; + prv->sensors_found++; + } + + } + else + { + get_lm75_temp(client, &miniCelsius); + prv->system_temp += miniCelsius; + prv->sensors_found++; + + } + } + } + return 0; +} + +/*Find all lm75 devices and return sum of temperatures.*/ +static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + ssize_t ret = 0; + struct as7726_32x_fan_data *data = as7726_32x_fan_update_device(dev); + + data->system_temp=0; + data->sensors_found=0; + i2c_for_each_dev(data, _find_lm75_device); + if (NUM_THERMAL_SENSORS != data->sensors_found) + { + dev_dbg(dev,"only %d of %d temps are found\n", + data->sensors_found, NUM_THERMAL_SENSORS); + data->system_temp = INT_MAX; + } + ret = sprintf(buf, "%d\n",data->system_temp); + return ret; +} + +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7726_32x_fan_data *data = as7726_32x_fan_update_device(dev); + ssize_t ret = 0; + + if (data->valid) { + switch (attr->index) { + case FAN_DUTY_CYCLE_PERCENTAGE: + { + u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); + ret = sprintf(buf, "%u\n", duty_cycle); + break; + } + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN5_FRONT_SPEED_RPM: + case FAN6_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: + case FAN6_REAR_SPEED_RPM: + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index])); + break; + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + case FAN6_PRESENT: + ret = sprintf(buf, "%d\n", + reg_val_to_is_present(data->reg_val[FAN_PRESENT_REG], + attr->index - FAN1_PRESENT)); + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + case FAN6_FAULT: + ret = sprintf(buf, "%d\n", is_fan_fault(data, attr->index - FAN1_FAULT)); + break; + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + case FAN5_DIRECTION: + case FAN6_DIRECTION: + ret = sprintf(buf, "%d\n", + reg_val_to_direction(data->reg_val[FAN_DIRECTION_REG], + attr->index - FAN1_DIRECTION)); + break; + default: + break; + } + } + + return ret; +} + +static const struct attribute_group as7726_32x_fan_group = { + .attrs = as7726_32x_fan_attributes, +}; + +static struct as7726_32x_fan_data *as7726_32x_fan_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7726_32x_fan_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + dev_dbg(&client->dev, "Starting as7726_32x_fan update\n"); + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { + int status = as7726_32x_fan_read_value(client, fan_reg[i]); + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + dev_dbg(&client->dev, "reg %d, err %d\n", fan_reg[i], status); + return data; + } + else { + data->reg_val[i] = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int as7726_32x_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7726_32x_fan_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7726_32x_fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7726_32x_fan_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7726_32x_fan_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7726_32x_fan_remove(struct i2c_client *client) +{ + struct as7726_32x_fan_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7726_32x_fan_group); + + return 0; +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x66, I2C_CLIENT_END }; + +static const struct i2c_device_id as7726_32x_fan_id[] = { + { "as7726_32x_fan", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7726_32x_fan_id); + +static struct i2c_driver as7726_32x_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = as7726_32x_fan_probe, + .remove = as7726_32x_fan_remove, + .id_table = as7726_32x_fan_id, + .address_list = normal_i2c, +}; + +module_i2c_driver(as7726_32x_fan_driver); + +MODULE_AUTHOR("Jostar Yang "); +MODULE_DESCRIPTION("as7726_32x_fan driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_leds.c b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_leds.c new file mode 100755 index 00000000000..65b962e628c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_leds.c @@ -0,0 +1,438 @@ +/* + * A LED driver for the accton_as7726_32x_led + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +extern int as7726_32x_cpld_read (unsigned short cpld_addr, u8 reg); +extern int as7726_32x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern void led_classdev_unregister(struct led_classdev *led_cdev); +extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); +extern void led_classdev_resume(struct led_classdev *led_cdev); +extern void led_classdev_suspend(struct led_classdev *led_cdev); + +#define DRVNAME "accton_as7726_32x_led" + +struct accton_as7726_32x_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[1]; /* only 1 register*/ +}; + +static struct accton_as7726_32x_led_data *ledctl = NULL; + +/* LED related data + */ + +#define LED_CNTRLER_I2C_ADDRESS (0x60) + +#define LED_TYPE_DIAG_REG_MASK (0x3) +#define LED_MODE_DIAG_GREEN_VALUE (0x02) +#define LED_MODE_DIAG_RED_VALUE (0x01) +#define LED_MODE_DIAG_AMBER_VALUE (0x00) /*It's yellow actually. Green+Red=Yellow*/ +#define LED_MODE_DIAG_OFF_VALUE (0x03) + + +#define LED_TYPE_LOC_REG_MASK (0x80) +#define LED_MODE_LOC_ON_VALUE (0) +#define LED_MODE_LOC_OFF_VALUE (0x80) + +enum led_type { + LED_TYPE_DIAG, + LED_TYPE_LOC, + LED_TYPE_FAN, + LED_TYPE_PSU1, + LED_TYPE_PSU2 +}; + +struct led_reg { + u32 types; + u8 reg_addr; +}; + +static const struct led_reg led_reg_map[] = { + {(1<update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as7726_32x_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = accton_as7726_32x_led_read_value(led_reg_map[i].reg_addr); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg_map[i].reg_addr, status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as7726_32x_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + enum led_type type) +{ + int reg_val; + u8 reg ; + mutex_lock(&ledctl->update_lock); + + if( !accton_getLedReg(type, ®)) + { + dev_dbg(&ledctl->pdev->dev, "Not match item for %d.\n", type); + } + + reg_val = accton_as7726_32x_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + accton_as7726_32x_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + + +static void accton_as7726_32x_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as7726_32x_led_set(led_cdev, led_light_mode, LED_TYPE_DIAG); +} + +static enum led_brightness accton_as7726_32x_led_diag_get(struct led_classdev *cdev) +{ + accton_as7726_32x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void accton_as7726_32x_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as7726_32x_led_set(led_cdev, led_light_mode, LED_TYPE_LOC); +} + +static enum led_brightness accton_as7726_32x_led_loc_get(struct led_classdev *cdev) +{ + accton_as7726_32x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static void accton_as7726_32x_led_auto_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ +} + +static enum led_brightness accton_as7726_32x_led_auto_get(struct led_classdev *cdev) +{ + return LED_MODE_AUTO; +} + +static struct led_classdev accton_as7726_32x_leds[] = { + [LED_TYPE_DIAG] = { + .name = "accton_as7726_32x_led::diag", + .default_trigger = "unused", + .brightness_set = accton_as7726_32x_led_diag_set, + .brightness_get = accton_as7726_32x_led_diag_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_RED, + }, + [LED_TYPE_LOC] = { + .name = "accton_as7726_32x_led::loc", + .default_trigger = "unused", + .brightness_set = accton_as7726_32x_led_loc_set, + .brightness_get = accton_as7726_32x_led_loc_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_BLUE, + }, + [LED_TYPE_FAN] = { + .name = "accton_as7726_32x_led::fan", + .default_trigger = "unused", + .brightness_set = accton_as7726_32x_led_auto_set, + .brightness_get = accton_as7726_32x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU1] = { + .name = "accton_as7726_32x_led::psu1", + .default_trigger = "unused", + .brightness_set = accton_as7726_32x_led_auto_set, + .brightness_get = accton_as7726_32x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "accton_as7726_32x_led::psu2", + .default_trigger = "unused", + .brightness_set = accton_as7726_32x_led_auto_set, + .brightness_get = accton_as7726_32x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, +}; + +static int accton_as7726_32x_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as7726_32x_leds); i++) { + led_classdev_suspend(&accton_as7726_32x_leds[i]); + } + + return 0; +} + +static int accton_as7726_32x_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as7726_32x_leds); i++) { + led_classdev_resume(&accton_as7726_32x_leds[i]); + } + + return 0; +} + +static int accton_as7726_32x_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(accton_as7726_32x_leds); i++) { + ret = led_classdev_register(&pdev->dev, &accton_as7726_32x_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(accton_as7726_32x_leds)) { + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&accton_as7726_32x_leds[i]); + } + } + + return ret; +} + +static int accton_as7726_32x_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(accton_as7726_32x_leds); i++) { + led_classdev_unregister(&accton_as7726_32x_leds[i]); + } + + return 0; +} + +static struct platform_driver accton_as7726_32x_led_driver = { + .probe = accton_as7726_32x_led_probe, + .remove = accton_as7726_32x_led_remove, + .suspend = accton_as7726_32x_led_suspend, + .resume = accton_as7726_32x_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as7726_32x_led_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as7726_32x_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct accton_as7726_32x_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as7726_32x_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&accton_as7726_32x_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as7726_32x_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&accton_as7726_32x_led_driver); + kfree(ledctl); +} + +module_init(accton_as7726_32x_led_init); +module_exit(accton_as7726_32x_led_exit); + +MODULE_AUTHOR("Jostar Yang "); +MODULE_DESCRIPTION("accton_as7726_32x_led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_psu.c new file mode 100755 index 00000000000..f4da01e86d9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_psu.c @@ -0,0 +1,276 @@ +/* + * An hwmon driver for accton as7726_32x Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); +static int as7726_32x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as7726_32x_cpld_read(unsigned short cpld_addr, u8 reg); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x50, 0x53, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as7726_32x_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[9]; /* Model name, read from eeprom */ +}; + +static struct as7726_32x_psu_data *as7726_32x_psu_update_device(struct device *dev); + +enum as7726_32x_psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_model_name,NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); + +static struct attribute *as7726_32x_psu_attributes[] = { + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + NULL +}; + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7726_32x_psu_data *data = as7726_32x_psu_update_device(dev); + u8 status = 0; + + if (attr->index == PSU_PRESENT) { + status = !(data->status >> (1-data->index) & 0x1); + } + else { /* PSU_POWER_GOOD */ + status = (data->status >> (3-data->index) & 0x1); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_model_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct as7726_32x_psu_data *data = as7726_32x_psu_update_device(dev); + + return sprintf(buf, "%s\n", data->model_name); +} + +static const struct attribute_group as7726_32x_psu_group = { + .attrs = as7726_32x_psu_attributes, +}; + +static int as7726_32x_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7726_32x_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7726_32x_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7726_32x_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7726_32x_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7726_32x_psu_remove(struct i2c_client *client) +{ + struct as7726_32x_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7726_32x_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as7726_32x_psu1, + as7726_32x_psu2 +}; + +static const struct i2c_device_id as7726_32x_psu_id[] = { + { "as7726_32x_psu1", as7726_32x_psu1 }, + { "as7726_32x_psu2", as7726_32x_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7726_32x_psu_id); + +static struct i2c_driver as7726_32x_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7726_32x_psu", + }, + .probe = as7726_32x_psu_probe, + .remove = as7726_32x_psu_remove, + .id_table = as7726_32x_psu_id, + .address_list = normal_i2c, +}; + +static int as7726_32x_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = 0; + int retry_count = 5; + + while (retry_count) { + retry_count--; + + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) { + msleep(10); + continue; + } + + if (unlikely(result != data_len)) { + result = -EIO; + msleep(10); + continue; + } + + result = 0; + break; + } + + return result; +} + +static struct as7726_32x_psu_data *as7726_32x_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7726_32x_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status; + int power_good = 0; + + dev_dbg(&client->dev, "Starting as7726_32x update\n"); + + /* Read psu status */ + status = as7726_32x_cpld_read(0x60, 0x2); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg 0x60 err %d\n", status); + } + else { + data->status = status; + } + + /* Read model name */ + memset(data->model_name, 0, sizeof(data->model_name)); + power_good = (data->status >> (3-data->index) & 0x1); + + if (power_good) { + status = as7726_32x_psu_read_block(client, 0x20, data->model_name, + ARRAY_SIZE(data->model_name)-1); + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x)\n", client->addr); + } + else { + data->model_name[ARRAY_SIZE(data->model_name)-1] = '\0'; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(as7726_32x_psu_driver); + +MODULE_AUTHOR("Jostar Yang "); +MODULE_DESCRIPTION("as7726_32x_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/ym2651y.c new file mode 100755 index 00000000000..8e76c56b54f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/ym2651y.c @@ -0,0 +1,603 @@ +/* + * An hwmon driver for the 3Y Power YM-2651Y Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_FAN_DUTY_CYCLE 100 + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x58, 0x5b, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct ym2651y_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 capability; /* Register value */ + u16 status_word; /* Register value */ + u8 fan_fault; /* Register value */ + u8 over_temp; /* Register value */ + u16 v_out; /* Register value */ + u16 i_out; /* Register value */ + u16 p_out; /* Register value */ + u16 temp; /* Register value */ + u16 fan_speed; /* Register value */ + u16 fan_duty_cycle[2]; /* Register value */ + u8 fan_dir[4]; /* Register value */ + u8 pmbus_revision; /* Register value */ + u8 mfr_id[10]; /* Register value */ + u8 mfr_model[10]; /* Register value */ + u8 mfr_revsion[3]; /* Register value */ + u16 mfr_vin_min; /* Register value */ + u16 mfr_vin_max; /* Register value */ + u16 mfr_iin_max; /* Register value */ + u16 mfr_iout_max; /* Register value */ + u16 mfr_pin_max; /* Register value */ + u16 mfr_pout_max; /* Register value */ + u16 mfr_vout_min; /* Register value */ + u16 mfr_vout_max; /* Register value */ +}; + +static ssize_t show_byte(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_word(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_over_temp(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_ascii(struct device *dev, struct device_attribute *da, + char *buf); +static struct ym2651y_data *ym2651y_update_device(struct device *dev); +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static int ym2651y_write_word(struct i2c_client *client, u8 reg, u16 value); + +enum ym2651y_sysfs_attributes { + PSU_POWER_ON = 0, + PSU_TEMP_FAULT, + PSU_POWER_GOOD, + PSU_FAN1_FAULT, + PSU_FAN_DIRECTION, + PSU_OVER_TEMP, + PSU_V_OUT, + PSU_I_OUT, + PSU_P_OUT, + PSU_P_OUT_UV, /*In Unit of microVolt, instead of mini.*/ + PSU_TEMP1_INPUT, + PSU_FAN1_SPEED, + PSU_FAN1_DUTY_CYCLE, + PSU_PMBUS_REVISION, + PSU_MFR_ID, + PSU_MFR_MODEL, + PSU_MFR_REVISION, + PSU_MFR_VIN_MIN, + PSU_MFR_VIN_MAX, + PSU_MFR_VOUT_MIN, + PSU_MFR_VOUT_MAX, + PSU_MFR_IIN_MAX, + PSU_MFR_IOUT_MAX, + PSU_MFR_PIN_MAX, + PSU_MFR_POUT_MAX +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_power_on, S_IRUGO, show_word, NULL, PSU_POWER_ON); +static SENSOR_DEVICE_ATTR(psu_temp_fault, S_IRUGO, show_word, NULL, PSU_TEMP_FAULT); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_word, NULL, PSU_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(psu_over_temp, S_IRUGO, show_over_temp, NULL, PSU_OVER_TEMP); +static SENSOR_DEVICE_ATTR(psu_v_out, S_IRUGO, show_linear, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(psu_i_out, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(psu_p_out, S_IRUGO, show_linear, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(psu_temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, show_linear, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(psu_fan_dir, S_IRUGO, show_ascii, NULL, PSU_FAN_DIRECTION); +static SENSOR_DEVICE_ATTR(psu_pmbus_revision, S_IRUGO, show_byte, NULL, PSU_PMBUS_REVISION); +static SENSOR_DEVICE_ATTR(psu_mfr_id, S_IRUGO, show_ascii, NULL, PSU_MFR_ID); +static SENSOR_DEVICE_ATTR(psu_mfr_model, S_IRUGO, show_ascii, NULL, PSU_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu_mfr_revision, S_IRUGO, show_ascii, NULL, PSU_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu_mfr_vin_min, S_IRUGO, show_linear, NULL, PSU_MFR_VIN_MIN); +static SENSOR_DEVICE_ATTR(psu_mfr_vin_max, S_IRUGO, show_linear, NULL, PSU_MFR_VIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_vout_min, S_IRUGO, show_linear, NULL, PSU_MFR_VOUT_MIN); +static SENSOR_DEVICE_ATTR(psu_mfr_vout_max, S_IRUGO, show_linear, NULL, PSU_MFR_VOUT_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_iin_max, S_IRUGO, show_linear, NULL, PSU_MFR_IIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_iout_max, S_IRUGO, show_linear, NULL, PSU_MFR_IOUT_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_pin_max, S_IRUGO, show_linear, NULL, PSU_MFR_PIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_pout_max, S_IRUGO, show_linear, NULL, PSU_MFR_POUT_MAX); + +/*Duplicate nodes for lm-sensors.*/ +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_linear, NULL, PSU_P_OUT_UV); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(temp1_fault, S_IRUGO, show_word, NULL, PSU_TEMP_FAULT); + +static struct attribute *ym2651y_attributes[] = { + &sensor_dev_attr_psu_power_on.dev_attr.attr, + &sensor_dev_attr_psu_temp_fault.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, + &sensor_dev_attr_psu_over_temp.dev_attr.attr, + &sensor_dev_attr_psu_v_out.dev_attr.attr, + &sensor_dev_attr_psu_i_out.dev_attr.attr, + &sensor_dev_attr_psu_p_out.dev_attr.attr, + &sensor_dev_attr_psu_temp1_input.dev_attr.attr, + &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, + &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, + &sensor_dev_attr_psu_fan_dir.dev_attr.attr, + &sensor_dev_attr_psu_pmbus_revision.dev_attr.attr, + &sensor_dev_attr_psu_mfr_id.dev_attr.attr, + &sensor_dev_attr_psu_mfr_model.dev_attr.attr, + &sensor_dev_attr_psu_mfr_revision.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vin_min.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_pout_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_iin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_pin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vout_min.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vout_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_iout_max.dev_attr.attr, + /*Duplicate nodes for lm-sensors.*/ + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_temp1_fault.dev_attr.attr, + NULL +}; + +static ssize_t show_byte(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + + return (attr->index == PSU_PMBUS_REVISION) ? sprintf(buf, "%d\n", data->pmbus_revision) : + sprintf(buf, "0\n"); +} + +static ssize_t show_word(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + u16 status = 0; + + switch (attr->index) { + case PSU_POWER_ON: /* psu_power_on, low byte bit 6 of status_word, 0=>ON, 1=>OFF */ + status = (data->status_word & 0x40) ? 0 : 1; + break; + case PSU_TEMP_FAULT: /* psu_temp_fault, low byte bit 2 of status_word, 0=>Normal, 1=>temp fault */ + status = (data->status_word & 0x4) >> 2; + break; + case PSU_POWER_GOOD: /* psu_power_good, high byte bit 3 of status_word, 0=>OK, 1=>FAIL */ + status = (data->status_word & 0x800) ? 0 : 1; + break; + } + + return sprintf(buf, "%d\n", status); +} + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct ym2651y_data *data = i2c_get_clientdata(client); + int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; + long speed; + int error; + + error = kstrtol(buf, 10, &speed); + if (error) + return error; + + if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) + return -EINVAL; + + mutex_lock(&data->update_lock); + data->fan_duty_cycle[nr] = speed; + ym2651y_write_word(client, 0x3B + nr, data->fan_duty_cycle[nr]); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + + u16 value = 0; + int exponent, mantissa; + int multiplier = 1000; + + switch (attr->index) { + case PSU_V_OUT: + value = data->v_out; + break; + case PSU_I_OUT: + value = data->i_out; + break; + case PSU_P_OUT_UV: + multiplier = 1000000; /*For lm-sensors, unit is micro-Volt.*/ + /*Passing through*/ + case PSU_P_OUT: + value = data->p_out; + break; + case PSU_TEMP1_INPUT: + value = data->temp; + break; + case PSU_FAN1_SPEED: + value = data->fan_speed; + multiplier = 1; + break; + case PSU_FAN1_DUTY_CYCLE: + value = data->fan_duty_cycle[0]; + multiplier = 1; + break; + case PSU_MFR_VIN_MIN: + value = data->mfr_vin_min; + break; + case PSU_MFR_VIN_MAX: + value = data->mfr_vin_max; + break; + case PSU_MFR_VOUT_MIN: + value = data->mfr_vout_min; + break; + case PSU_MFR_VOUT_MAX: + value = data->mfr_vout_max; + break; + case PSU_MFR_PIN_MAX: + value = data->mfr_pin_max; + break; + case PSU_MFR_POUT_MAX: + value = data->mfr_pout_max; + break; + case PSU_MFR_IOUT_MAX: + value = data->mfr_iout_max; + break; + case PSU_MFR_IIN_MAX: + value = data->mfr_iin_max; + break; + } + + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + return (exponent >= 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + + u8 shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; + + return sprintf(buf, "%d\n", data->fan_fault >> shift); +} + +static ssize_t show_over_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct ym2651y_data *data = ym2651y_update_device(dev); + + return sprintf(buf, "%d\n", data->over_temp >> 7); +} + +static ssize_t show_ascii(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + u8 *ptr = NULL; + + switch (attr->index) { + case PSU_FAN_DIRECTION: /* psu_fan_dir */ + ptr = data->fan_dir; + break; + case PSU_MFR_ID: /* psu_mfr_id */ + ptr = data->mfr_id; + break; + case PSU_MFR_MODEL: /* psu_mfr_model */ + ptr = data->mfr_model; + break; + case PSU_MFR_REVISION: /* psu_mfr_revision */ + ptr = data->mfr_revsion; + break; + default: + return 0; + } + + return sprintf(buf, "%s\n", ptr); +} + +static const struct attribute_group ym2651y_group = { + .attrs = ym2651y_attributes, +}; + +static int ym2651y_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct ym2651y_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct ym2651y_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &ym2651y_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &ym2651y_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int ym2651y_remove(struct i2c_client *client) +{ + struct ym2651y_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &ym2651y_group); + kfree(data); + + return 0; +} + +static const struct i2c_device_id ym2651y_id[] = { + { "ym2651", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, ym2651y_id); + +static struct i2c_driver ym2651y_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "ym2651", + }, + .probe = ym2651y_probe, + .remove = ym2651y_remove, + .id_table = ym2651y_id, + .address_list = normal_i2c, +}; + +static int ym2651y_read_byte(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int ym2651y_read_word(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_word_data(client, reg); +} + +static int ym2651y_write_word(struct i2c_client *client, u8 reg, u16 value) +{ + return i2c_smbus_write_word_data(client, reg, value); +} + +static int ym2651y_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + result = 0; + +abort: + return result; +} + +struct reg_data_byte { + u8 reg; + u8 *value; +}; + +struct reg_data_word { + u8 reg; + u16 *value; +}; + +static struct ym2651y_data *ym2651y_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct ym2651y_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int i, status; + u8 command; + u8 fan_dir[5] = {0}; + struct reg_data_byte regs_byte[] = { {0x19, &data->capability}, + {0x7d, &data->over_temp}, + {0x81, &data->fan_fault}, + {0x98, &data->pmbus_revision}}; + struct reg_data_word regs_word[] = { {0x79, &data->status_word}, + {0x8b, &data->v_out}, + {0x8c, &data->i_out}, + {0x96, &data->p_out}, + {0x8d, &data->temp}, + {0x3b, &(data->fan_duty_cycle[0])}, + {0x3c, &(data->fan_duty_cycle[1])}, + {0x90, &data->fan_speed}, + {0xa0, &data->mfr_vin_min}, + {0xa1, &data->mfr_vin_max}, + {0xa2, &data->mfr_iin_max}, + {0xa3, &data->mfr_pin_max}, + {0xa4, &data->mfr_vout_min}, + {0xa5, &data->mfr_vout_max}, + {0xa6, &data->mfr_iout_max}, + {0xa7, &data->mfr_pout_max}}; + + dev_dbg(&client->dev, "Starting ym2651 update\n"); + + /* Read byte data */ + for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { + status = ym2651y_read_byte(client, regs_byte[i].reg); + + if (status < 0) + { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_byte[i].reg, status); + } + else { + *(regs_byte[i].value) = status; + } + } + + /* Read word data */ + for (i = 0; i < ARRAY_SIZE(regs_word); i++) { + status = ym2651y_read_word(client, regs_word[i].reg); + + if (status < 0) + { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_word[i].reg, status); + } + else { + *(regs_word[i].value) = status; + } + } + + /* Read fan_direction */ + command = 0xC3; + status = ym2651y_read_block(client, command, fan_dir, ARRAY_SIZE(fan_dir)-1); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + } + + strncpy(data->fan_dir, fan_dir+1, ARRAY_SIZE(data->fan_dir)-1); + data->fan_dir[ARRAY_SIZE(data->fan_dir)-1] = '\0'; + + /* Read mfr_id */ + command = 0x99; + status = ym2651y_read_block(client, command, data->mfr_id, + ARRAY_SIZE(data->mfr_id)-1); + data->mfr_id[ARRAY_SIZE(data->mfr_id)-1] = '\0'; + + if (status < 0) + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + + /* Read mfr_model */ + command = 0x9a; + status = ym2651y_read_block(client, command, data->mfr_model, + ARRAY_SIZE(data->mfr_model)-1); + data->mfr_model[ARRAY_SIZE(data->mfr_model)-1] = '\0'; + + if (status < 0) + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + + /* Read mfr_revsion */ + command = 0x9b; + status = ym2651y_read_block(client, command, data->mfr_revsion, + ARRAY_SIZE(data->mfr_revsion)-1); + data->mfr_revsion[ARRAY_SIZE(data->mfr_revsion)-1] = '\0'; + + if (status < 0) + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(ym2651y_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("3Y Power YM-2651Y driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-handle_mac.service b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-handle_mac.service new file mode 100755 index 00000000000..5492775eee6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-handle_mac.service @@ -0,0 +1,15 @@ +[Unit] +Description=Accton AS7726-32X Platform MAC handle service +Before=opennsl-modules.service +After=local-fs.target + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/idt_init.sh +RemainAfterExit=yes + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=opennsl-modules.service diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-monitor-fan.service b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-monitor-fan.service new file mode 100755 index 00000000000..e18d592d6c1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-monitor-fan.service @@ -0,0 +1,16 @@ +[Unit] +Description=Accton AS7726-32X Platform Monitoring FAN service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/accton_as7726_32x_monitor_fan.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-monitor-psu.service b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-monitor-psu.service new file mode 100755 index 00000000000..99f7479494e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-monitor-psu.service @@ -0,0 +1,16 @@ +[Unit] +Description=Accton AS7726-32X Platform Monitoring PSU service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/accton_as7726_32x_monitor_psu.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-monitor.service new file mode 100755 index 00000000000..5b04ad41010 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-monitor.service @@ -0,0 +1,18 @@ +[Unit] +Description=Accton AS7726-32X Platform Monitoring service +Before=pmon.service +After=as7726-32x-platform-handle_mac.service +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/accton_as7726_32x_util.py install +ExecStart=/usr/local/bin/accton_as7726_32x_monitor.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL +#StandardOutput=tty + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/setup.py new file mode 100755 index 00000000000..9841874dbd1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as7726_32x', + version='1.0', + description='Module to initialize Accton AS7726-32X platforms', + + packages=['as7726_32x'], + package_dir={'as7726_32x': 'as7726-32x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/README b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/README new file mode 100755 index 00000000000..44e03cab5f5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/README @@ -0,0 +1,117 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +Contents of this package: + patch - files under patch/ is for kernel and ONIE installer + for the kernel: + config-accton-as5712_54x.patch + for kernel configuration. + driver-i2c-muxes-pca954x-always-deselect.patch + for i2c_mux deselects after transaction. + driver-patches-for-accton-as5712-fan-psu-cpld.patch + for as5712's fan/psu/cpld/led/sfp drivers. + for ONIE: + onie_installer-accton-AS5712-54X.patch + for console port setting and copy util script o rootfs. + module - Contains source code of as5712 kernel driver modules. + +The late Sonic building scripts, pushed @Dec 5 2016, will automatically +create a docker container and run building process under it. +User is not necessary to handle docker environment creation. + +1. Download sonic-buildimage environment. + - Run "git clone https://github.com/Azure/sonic-buildimage". + - cd to sonic-buildimage and run "git submodule update --init --recursive". +2. Build kernel + - cd ./src/sonic-linux-kernel + - Copy patches and series from patch/kernel of this release to + sonic-linux-kernel/patch. + - Build kernel by "make". + - The built kernel package, linux-image-3.16.0-5-amd64_3.16.51-3+deb8u1_amd64.deb + , is generated. +3. Build installer + - Change directory back to sonic-buildimage/. + - Get onie_installer-accton-AS5712-54X.patch" from patch/installer. + - Change setting for AS5712-54X by patching build_image.sh. + "patch -p1 < onie_installer-accton-AS5712-54X.patch" + !!NOTICE, patching onie_installer-accton-AS5712-54X.patch comments out the + "git status" checking at build_image.sh. + - The account and password of installed OS can be given at rules/config. + The default user and password are "admin" & "YourPaSsWoRd" respectively. + - Run "make configure PLATFORM=broadcom" + - Copy the built kernel debian package to target/debs/. + The file is linux-image-3.16.0-5-amd64_*_amd64.deb under directory + src/sonic-linux-kernel/. + - Run "make target/sonic-generic.bin" + - Get the installer, target/sonic-generic.bin, to target machine and install. + +All Linux kernel code is licensed under the GPLv1. All other code is +licensed under the GPLv3. Please see the LICENSE file for copies of +both licenses. + +The code for integacting with Accton AS5712-54X has 2 parts, +kernel drivers and operational script. +The kernel drivers of peripherals are under module/ directory. +1. These drivers are patched into kernel by + driver-patches-for-accton-as5712-fan-psu-cpld.patch + Or you can build the driver under module/ by setting environment variable, + KERNEL_SRC, to proper linux built directory and run make. + It may be sonic-linux-kernel/linux-3.*/debian/build/build_amd64_none_amd64/. +2. A operational script, accton_as5712_util.py, for device initializatian and + peripheral accessing should be installed at /usr/bin. + This script is generated by onie_installer-accton-AS5712-54X.patch. + It's done by patching onie_installer-accton-AS5712-54X.patch at build-image. + Run "accton_as5712_util.py install" to install drivers. + +To initialize the system, run "accton_as5712_util.py install". +To clean up the drivers & devices, run "accton_as5712_util.py clean". +To dump information of sensors, run "accton_as5712_util.py show". +To dump SFP EEPROM, run "accton_as5712_util.py sff". +To set fan speed, run "accton_as5712_util.py set fan". +To enable/disable SFP emission, run "accton_as5712_util.py set sfp". +To set system LEDs' color, run "accton_as5712_util.py set led" +For more information, run "accton_as5712_util.py --help". + +==================================================================== +Besides applying accton_as5712_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +System LED: + There are 5 system LEDs at the lower-left corner of front panel. + They are loc, diag, fan, ps1, and ps2. + The sysfs interface color mappings are as follows: + Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + But not all colors are available for each LED. + +Fan Control: + There are 10 fans inside 5 fan modules. + All fans share 1 duty setting, ranged from 0~100. + +Thermal sensers: + 3 temperature sensors are controlled by the lm75 kernel modules. + +PSUs: + There 2 power supplies slot at the left/right side of the back. + Once if a PSU is not plugged, the status of it is shown failed. + +There are 48 SFP+ and 6 QSFP modules are equipped. +Before operating on PSU and QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_monitor.py new file mode 100755 index 00000000000..b88b440c903 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_monitor.py @@ -0,0 +1,345 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.)# +# 4/20/2018: Jostar modify for as7726_32x +# 12/03/2018:Jostar modify for as7726_32x thermal plan +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + from as7726_32x.fanutil import FanUtil + from as7726_32x.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as7726_32x_monitor' + +global log_file +global log_level + + +# Air Flow Front to Back : +# (Thermal sensor_LM75_4A + Thermal sensor_LM75_CPU) /2 <=38C : Keep 37.5%(0x04) Fan speed +# (Thermal sensor_LM75_4A + Thermal sensor_LM75_CPU) /2 > 38C : Change Fan speed from 37.5%(0x04) to 62.5%(0x08) +# (Thermal sensor_LM75_4A + Thermal sensor_LM75_CPU) /2 > 46C : Change Fan speed from 62.5%(0x08) to 100%(0x0E) +# (Thermal sensor_LM75_4A + Thermal sensor_LM75_CPU) /2 > 58C : Send alarm message +# (Thermal sensor_LM75_4A + Thermal sensor_LM75_CPU) /2 > 66C : Shut down system +# One Fan fail : Change Fan speed to 100%(0x0E) + + +# Air Flow Back to Front : +# (Thermal sensor_LM75_4A + Thermal sensor_LM75_CPU) /2 <=34C : Keep 37.5%(0x04) Fan speed +# (Thermal sensor_LM75_4A + Thermal sensor_LM75_CPU) /2 > 34C : Change Fan speed from 37.5%(0x04) to 62.5%(0x08) +# (Thermal sensor_LM75_4A + Thermal sensor_LM75_CPU) /2 > 44C : Change Fan speed from 62.5%(0x08) to 100%(0x0E) +# (Thermal sensor_LM75_4A + Thermal sensor_LM75_CPU) /2 > 59C : Send alarm message +# (Thermal sensor_LM75_4A + Thermal sensor_LM75_CPU) /2 > 67C : Shut down system +# One Fan fail: Change Fan speed to 100%(0x0E) +# sensor_LM75_CPU == sensor_LM75_4B + + +class switch(object): + def __init__(self, value): + self.value = value + self.fall = False + + def __iter__(self): + """Return the match method once, then stop""" + yield self.match + raise StopIteration + + def match(self, *args): + """Indicate whether or not to enter a case suite""" + if self.fall or not args: + return True + elif self.value in args: # changed for v1.5, see below + self.fall = True + return True + else: + return False + + +fan_policy_state=1 +fan_fail=0 +alarm_state = 0 #0->default or clear, 1-->alarm detect +test_temp = 0 +test_temp_list = [0, 0, 0, 0, 0, 0] +temp_test_data=0 +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + # static temp var + temp = 0 + new_pwm = 0 + pwm=0 + ori_pwm = 0 + default_pwm=0x4 + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = handler = logging.handlers.SysLogHandler(address = '/dev/log') + sys_handler.setLevel(logging.WARNING) + logging.getLogger('').addHandler(sys_handler) + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def get_state_from_fan_policy(self, temp, policy): + state=0 + + logging.debug('temp=%d', temp) + for i in range(0, len(policy)): + #logging.debug('policy[%d][0]=%d, policy[%d][1]=%d, policy[%d][2]=%d', i,policy[i][0],i, policy[i][1], i, policy[i][2]) + if temp > policy[i][2]: + if temp <= policy[i][3]: + state =i + logging.debug ('temp=%d >= policy[%d][2]=%d, temp=%d < policy[%d][3]=%d' , temp, i, policy[i][2], temp, i, policy[i][3]) + logging.debug ('fan_state=%d', state) + break + + return state + + + def manage_fans(self): + + global fan_policy_state + global fan_fail + global test_temp + global test_temp_list + global alarm_state + global temp_test_data + + LEVEL_FAN_DEF=0 + LEVEL_FAN_MID=1 + LEVEL_FAN_MAX=2 + LEVEL_TEMP_HIGH=3 + LEVEL_TEMP_CRITICAL=4 + + + fan_policy_f2b = { + LEVEL_FAN_DEF: [38, 0x4, 0, 38000], + LEVEL_FAN_MID: [63, 0x6, 38000, 46000], + LEVEL_FAN_MAX: [100, 0xE, 46000, 58000], + LEVEL_TEMP_HIGH: [100, 0xE, 58000, 66000], + LEVEL_TEMP_CRITICAL: [100, 0xE, 58000, 200000], + } + fan_policy_b2f = { + LEVEL_FAN_DEF: [38, 0x4, 0, 34000], + LEVEL_FAN_MID: [63, 0x8, 34000, 44000], + LEVEL_FAN_MAX: [100, 0xE, 44000, 59000], + LEVEL_TEMP_HIGH: [100, 0xE, 59000, 67000], + LEVEL_TEMP_CRITICAL: [100, 0xE, 59000, 200000], + } + + fan_policy = fan_policy_f2b + + thermal = ThermalUtil() + fan = FanUtil() + fan_dir=fan.get_fan_dir(1) + if fan_dir == 1: + fan_dri=1 #something wrong, set fan_dir to default val + else: + fan_policy = fan_policy_b2f + + ori_pwm=fan.get_fan_duty_cycle() + new_pwm=0 + logging.debug('fan_dir=%d, ori_pwm=%d', fan_dir, ori_pwm) + logging.debug('test_temp=%d', test_temp) + if test_temp==0: + temp1 = thermal._get_thermal_val(1) + temp2 = thermal._get_thermal_val(2) + temp3 = thermal._get_thermal_val(3) + temp4 = thermal._get_thermal_val(4) + temp5 = thermal._get_thermal_val(5) + else: + temp1 = test_temp_list[0] + temp2 = test_temp_list[1] + temp3 = test_temp_list[2] + temp4 = test_temp_list[3] + temp5 = test_temp_list[4] + fan_fail=0 + + if temp3==0: + temp_get=50000 # if one detect sensor is fail or zero, assign temp=50000, let fan to 75% + logging.debug('lm75_49 detect fail, so set temp_get=50000, let fan to 75%') + elif temp4==0: + temp_get=50000 # if one detect sensor is fail or zero, assign temp=50000, let fan to 75% + logging.debug('lm75_4b detect fail, so set temp_get=50000, let fan to 75%') + else: + temp_get= (temp3 + temp4)/2 # Use (sensor_LM75_4a + sensor_LM75_4b) /2 + ori_state=fan_policy_state + + #temp_test_data=temp_test_data+1000 + #temp_get = temp_get + temp_test_data + #print "Unit test:temp_get=%d"%temp_get + + fan_policy_state=self.get_state_from_fan_policy(temp_get, fan_policy) + #print "temp3=%d"%temp3 + #print "temp4=%d"%temp4 + #print "temp_get=%d"%temp_get + + logging.debug('lm75_48=%d, lm75_49=%d, lm75_4a=%d, lm_4b=%d, lm_4b=%d', temp1,temp2,temp3,temp4,temp5) + logging.debug('ori_state=%d, fan_policy_state=%d', ori_state, fan_policy_state) + new_pwm = fan_policy[fan_policy_state][0] + if fan_fail==0: + logging.debug('new_fan_cycle=%d', new_pwm) + + if fan_fail==0: + if new_pwm!=ori_pwm: + fan.set_fan_duty_cycle(new_pwm) + logging.info('Set fan speed from %d to %d', ori_pwm, new_pwm) + + #Check Fan status + for i in range (fan.FAN_NUM_1_IDX, fan.FAN_NUM_ON_MAIN_BROAD+1): + if fan.get_fan_status(i)==0: + new_pwm=100 + logging.debug('fan_%d fail, set pwm to 100',i) + if test_temp==0: + fan_fail=1 + fan.set_fan_duty_cycle(new_pwm) + break + else: + fan_fail=0 + + #if fan_policy_state == ori_state: + # return True + #else: + new_state = fan_policy_state + + #logging.warning('Temperature high alarm testing') + if ori_state==LEVEL_FAN_DEF: + if new_state==LEVEL_TEMP_HIGH: + if alarm_state==0: + logging.warning('Alarm for temperature high is detected') + alarm_state=1 + if new_state==LEVEL_TEMP_CRITICAL: + logging.critical('Alarm for temperature critical is detected, reboot DUT') + time.sleep(2) + os.system('reboot') + if ori_state==LEVEL_FAN_MID: + if new_state==LEVEL_TEMP_HIGH: + if alarm_state==0: + logging.warning('Alarm for temperature high is detected') + alarm_state=1 + if new_state==LEVEL_TEMP_CRITICAL: + logging.critical('Alarm for temperature critical is detected') + time.sleep(2) + os.system('reboot') + if ori_state==LEVEL_FAN_MAX: + if new_state==LEVEL_TEMP_HIGH: + if alarm_state==0: + logging.warning('Alarm for temperature high is detected') + alarm_state=1 + if new_state==LEVEL_TEMP_CRITICAL: + logging.critical('Alarm for temperature critical is detected') + time.sleep(2) + os.system('reboot') + if alarm_state==1: + if temp_get < (fan_policy[3][0] - 5000): #below 65 C, clear alarm + logging.warning('Alarm for temperature high is cleared') + alarm_state=0 + if ori_state==LEVEL_TEMP_HIGH: + if new_state==LEVEL_TEMP_CRITICAL: + logging.critical('Alarm for temperature critical is detected') + time.sleep(2) + os.system('reboot') + if new_state <= LEVEL_FAN_MID: + logging.warning('Alarm for temperature high is cleared') + alarm_state=0 + if new_state <= LEVEL_FAN_MAX: + if temp_get < (fan_policy[3][0] - 5000): #below 65 C, clear alarm + logging.warning('Alarm for temperature high is cleared') + alarm_state=0 + if ori_state==LEVEL_TEMP_CRITICAL: + if new_state <= LEVEL_FAN_MAX: + logging.warning('Alarm for temperature critical is cleared') + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + global test_temp + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdlt:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + if sys.argv[1]== '-t': + if len(sys.argv)!=7: + print "temp test, need input six temp" + return 0 + + i=0 + for x in range(2, 7): + test_temp_list[i]= int(sys.argv[x])*1000 + i=i+1 + test_temp = 1 + log_level = logging.DEBUG + print test_temp_list + + fan = FanUtil() + fan.set_fan_duty_cycle(38) + print "set default fan speed to 37.5%" + monitor = device_monitor(log_file, log_level) + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(5) + +if __name__ == '__main__': + main(sys.argv[1:]) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_monitor_fan.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_monitor_fan.py new file mode 100755 index 00000000000..de737b99f1f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_monitor_fan.py @@ -0,0 +1,197 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 7/2/2018: Jostar create for as7326-56x +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as7726_32x_monitor_fan' + +global log_file +global log_level + + +class switch(object): + def __init__(self, value): + self.value = value + self.fall = False + + def __iter__(self): + """Return the match method once, then stop""" + yield self.match + raise StopIteration + + def match(self, *args): + """Indicate whether or not to enter a case suite""" + if self.fall or not args: + return True + elif self.value in args: # changed for v1.5, see below + self.fall = True + return True + else: + return False + + +fan_state=[2, 2, 2, 2, 2, 2, 2] #init state=2, insert=1, remove=0 +fan_status_state=[2, 2, 2, 2, 2, 2, 2] #init state=2, fault=1, normal=0 +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + + def __init__(self, log_file, log_level): + + self.fan_num = 6 + self.fan_path = "/sys/bus/i2c/devices/54-0066/" + self.present = { + 0: "fan1_present", + 1: "fan2_present", + 2: "fan3_present", + 3: "fan4_present", + 4: "fan5_present", + 5: "fan6_present", + } + + self.fault = { + 0: "fan1_fault", + 1: "fan2_fault", + 2: "fan3_fault", + 3: "fan4_fault", + 4: "fan5_fault", + 5: "fan6_fault", + } + + + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(logging.DEBUG) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + #sys_handler.setLevel(logging.WARNING) + sys_handler.setLevel(logging.INFO) + logging.getLogger('').addHandler(sys_handler) + + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_fan(self): + + FAN_STATE_REMOVE = 0 + FAN_STATE_INSERT = 1 + + FAN_STATUS_FAULT = 1 + FAN_STATUS_NORMAL = 0 + + global fan_state + global fan_status_state + + for idx in range (0, self.fan_num): + node = self.fan_path + self.present[idx] + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if fan_state[idx]!=1: + fan_state[idx]=FAN_STATE_INSERT + logging.info("FAN-%d present is detected", idx+1); + else: + if fan_state[idx]!=0: + fan_state[idx]=FAN_STATE_REMOVE + logging.warning("Alarm for FAN-%d absent is detected", idx+1) + + for idx in range (0, self.fan_num): + node = self.fan_path + self.fault[idx] + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if fan_status_state[idx]!=FAN_STATUS_FAULT: + if fan_state[idx] == FAN_STATE_INSERT: + logging.warning("Alarm for FAN-%d failed is detected", idx+1); + fan_status_state[idx]=FAN_STATUS_FAULT + else: + fan_status_state[idx]=FAN_STATUS_NORMAL + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + monitor = device_monitor(log_file, log_level) + while True: + monitor.manage_fan() + time.sleep(3) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_monitor_psu.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_monitor_psu.py new file mode 100755 index 00000000000..618c58eec87 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_monitor_psu.py @@ -0,0 +1,169 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 7/2/2018: Jostar create for as7326-56x +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as7726_32x_monitor_psu' + +global log_file +global log_level + + +psu_state=[2, 2] +psu_status_state=[2, 2] +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + + def __init__(self, log_file, log_level): + + self.psu_num = 2 + self.psu_path = "/sys/bus/i2c/devices/" + self.presence = "/psu_present" + self.oper_status = "/psu_power_good" + self.mapping = { + 0: "50-0053", + 1: "49-0050", + } + + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + # set up logging to console + + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + #sys_handler.setLevel(logging.WARNING) + sys_handler.setLevel(logging.INFO) + logging.getLogger('').addHandler(sys_handler) + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_psu(self): + + PSU_STATE_REMOVE = 0 + PSU_STATE_INSERT = 1 + + PSU_STATUS_NO_POWER = 0 + PSU_STATUS_POWER_GOOD = 1 + PSU_STATUS_IDLE =2 + + global psu_state + + for idx in range (0, self.psu_num): + node = self.psu_path + self.mapping[idx] + self.presence + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if psu_state[idx]!=1: + psu_state[idx]=PSU_STATE_INSERT + logging.info("PSU-%d present is detected", idx+1); + #psu_status_state[idx]=PSU_STATUS_POWER_GOOD #when insert, assume power is good. If no_power, next code will find it. + else: + if psu_state[idx]!=0: + psu_state[idx]=PSU_STATE_REMOVE + logging.warning("Alarm for PSU-%d absent is detected", idx+1); + psu_status_state[idx]=PSU_STATUS_IDLE + + for idx in range (0, self.psu_num): + node = self.psu_path + self.mapping[idx] + self.oper_status + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "0": + if psu_status_state[idx]!=PSU_STATUS_NO_POWER: + if psu_state[idx]==PSU_STATE_INSERT: + logging.warning("Alarm for PSU-%d failed is detected", idx+1); + psu_status_state[idx]=PSU_STATUS_NO_POWER + else: + if psu_state[idx]==PSU_STATE_INSERT: + if psu_status_state[idx]!=PSU_STATUS_POWER_GOOD: + logging.info("PSU-%d power_good is detected", idx+1); + psu_status_state[idx]=PSU_STATUS_POWER_GOOD + + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + monitor = device_monitor(log_file, log_level) + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_psu() + time.sleep(3) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_util.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_util.py new file mode 100755 index 00000000000..acb0319f5f2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_util.py @@ -0,0 +1,599 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +PROJECT_NAME = 'as7726_32x' +version = '0.0.1' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan1':1, 'fan2':1,'fan3':1,'fan4':1,'fan5':1,'thermal':3, 'psu':2, 'sfp':54} + + +led_prefix ='/sys/devices/platform/as7716_32x_led/leds/accton_'+PROJECT_NAME+'_led::' +fan_prefix ='/sys/devices/platform/as7716_32x_' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2'], + 'fan1': ['fan'], + 'fan2': ['fan'], + 'fan3': ['fan'], + 'fan4': ['fan'], + 'fan5': ['fan'], + 'fan5': ['fan'], + } +hwmon_nodes = {'led': ['brightness'] , + 'fan1': ['fan_duty_cycle_percentage', 'fan1_fault', 'fan1_speed_rpm', 'fan1_direction', 'fanr1_fault', 'fanr1_speed_rpm'], + 'fan2': ['fan_duty_cycle_percentage','fan2_fault', 'fan2_speed_rpm', 'fan2_direction', 'fanr2_fault', 'fanr2_speed_rpm'], + 'fan3': ['fan_duty_cycle_percentage','fan3_fault', 'fan3_speed_rpm', 'fan3_direction', 'fanr3_fault', 'fanr3_speed_rpm'], + 'fan4': ['fan4_duty_cycle_percentage','fan4_fault', 'fan4_speed_rpm', 'fan4_direction', 'fanr4_fault', 'fanr4_speed_rpm'], + 'fan5': ['fan_duty_cycle_percentage','fan5_fault', 'fan5_speed_rpm', 'fan5_direction', 'fanr5_fault', 'fanr5_speed_rpm'], + } +hwmon_prefix ={'led': led_prefix, + 'fan1': fan_prefix, + 'fan2': fan_prefix, + 'fan3': fan_prefix, + 'fan4': fan_prefix, + 'fan5': fan_prefix, + } + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'fan': ['54-0066'], + 'thermal': ['54-004c', '55-0048','55-0049', '55-004a', '55-004b'] , + 'psu': ['49-0050','50-0053'], + 'sfp': ['-0050']} +i2c_nodes = {'fan': ['present', 'front_speed_rpm', 'rear_speed_rpm'], + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['module_present_ ', 'module_tx_disable_']} + +sfp_map = [21, 22, 23, 24, 26, 25, 28, 27, + 17, 18, 19, 20, 29, 30, 31, 32, + 33, 34, 35, 36, 45, 46, 47, 48, + 37, 38, 39, 40, 41, 42, 43, 44, + 15, 16] + +mknod =[ +'echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-2/new_device', + +'echo as7726_32x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo as7726_32x_cpld2 0x62 > /sys/bus/i2c/devices/i2c-12/new_device', +'echo as7726_32x_cpld3 0x64 > /sys/bus/i2c/devices/i2c-13/new_device', + +'echo as7726_32x_fan 0x66 > /sys/bus/i2c/devices/i2c-54/new_device', + + +'echo lm75 0x4c > /sys/bus/i2c/devices/i2c-54/new_device', +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-55/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-55/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-55/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-55/new_device', + + +# PSU-1 +'echo as7726_32x_psu1 0x53 > /sys/bus/i2c/devices/i2c-50/new_device', +'echo ym2651 0x5b > /sys/bus/i2c/devices/i2c-50/new_device', + +# PSU-2 +'echo as7726_32x_psu2 0x50> /sys/bus/i2c/devices/i2c-49/new_device', +'echo ym2651 0x58 > /sys/bus/i2c/devices/i2c-49/new_device', + +#EERPOM +'echo 24c02 0x56 > /sys/bus/i2c/devices/i2c-0/new_device', +] + + + +FORCE = 0 +logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-32 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-32 \" to dump sfp# eeprom" + sys.exit(0) + +def dis_i2c_ir3570a(addr): + cmd = "i2cset -y 0 0x%x 0xE5 0x01" % addr + status, output = commands.getstatusoutput(cmd) + cmd = "i2cset -y 0 0x%x 0x12 0x02" % addr + status, output = commands.getstatusoutput(cmd) + return status + +def ir3570_check(): + cmd = "i2cdump -y 0 0x42 s 0x9a" + try: + status, output = commands.getstatusoutput(cmd) + lines = output.split('\n') + hn = re.findall(r'\w+', lines[-1]) + version = int(hn[1], 16) + if version == 0x24: #only for ir3570a + ret = dis_i2c_ir3570a(4) + else: + ret = 0 + except Exception as e: + print "Error on ir3570_check() e:" + str(e) + return -1 + return ret + + +def my_log(txt): + if DEBUG == True: + print "[ACCTON DBG]: "+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status = 1 + output = "" + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log ("cmd:" + cmd) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_inserted(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + +def cpld_reset_mac(): + ret, lsmod = log_os_system("i2cset -y 0 0x77 0x1", 0) + ret, lsmod = log_os_system("i2cset -y 0 0x76 0x4", 0) + ret, lsmod = log_os_system("i2cset -y 0 0x60 0x8 0x77", 0) + time.sleep(1) + ret, lsmod = log_os_system("i2cset -y 0 0x60 0x8 0xf7", 0) + return True + + + +#'modprobe cpr_4011_4mxx', + +kos = [ +'depmod -ae', +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe ym2651y', +'modprobe accton_as7726_32x_cpld', +'modprobe accton_as7726_32x_fan', +'modprobe accton_as7726_32x_leds', +'modprobe accton_as7726_32x_psu', +'modprobe optoe'] + +def driver_install(): + global FORCE + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + + #status=cpld_reset_mac() + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + lst = rm.split(" ") + print "lst=%s"%lst + if len(lst) > 3: + del(lst[3]) + rm = " ".join(lst) + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +def device_install(): + global FORCE + + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(2) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(0,len(sfp_map)): + status, output =log_os_system("echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + status, output =log_os_system("echo port"+str(i)+" > /sys/bus/i2c/devices/"+str(sfp_map[i])+"-0050/port_name", 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/0-0070", 0) + if status==0: + I2C_ORDER=1 + else: + I2C_ORDER=0 + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + nodelist = mknod + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_inserted() == False: + return False + if not device_exist(): + print "not device_exist()" + return False + return True + +def do_install(): + if driver_inserted() == False: + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + + ir3570_check() + + if not device_exist(): + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_inserted()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + print "node=%s"%node + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan1'] ['fan11'][0] + node = node.replace(node.split("/")[-1], 'fan1_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0077", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_handle_idt.sh b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_handle_idt.sh new file mode 100755 index 00000000000..6c9af53dce3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_handle_idt.sh @@ -0,0 +1,17 @@ +#!/bin/bash + +if [ -s /usr/local/bin/done_idt_init ];then + echo "There is a done_idt_init file" +else + cat /etc/init.d/opennsl-modules|grep idt_init.sh + if [ $? -ne 0 ];then + echo "Add idt_init.sh to opennsl-modules for TD3 MAC" + sed -i '/modprobe linux-kernel-bde/i sleep 1' /etc/init.d/opennsl-modules + sed -i '/sleep/i /usr/local/bin/idt_init.sh' /etc/init.d/opennsl-modules + sed -i '/idt_init/i echo "IDT init" ' /etc/init.d/opennsl-modules + sed -i '/IDT init/i echo 1 > /usr/local/bin/done_idt_init' /etc/init.d/opennsl-modules + fi + +fi + + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/idt_init.sh b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/idt_init.sh new file mode 100755 index 00000000000..257a0242702 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/idt_init.sh @@ -0,0 +1,152 @@ +#!/bin/bash +test_log=/usr/local/bin/check_idt_status.txt +modprobe i2c-i801 +modprobe i2c-dev +i2cset -y 0 0x77 0x1 +i2cset -y 0 0x76 0x1 +i2cget -y 0 0x54 0 b > /dev/null +if [ $? -ne 0 ];then + printf "Device 8v89307(0x54) not found\n" + exit 1 +fi +echo "IDT 82V89307 " +echo "idt init 1" +# Title = --- IDT 82V89307 Registers --- +#Select to Page 0 +i2cset -y 0 0x54 0x2D 0x00 +i2cset -y 0 0x54 0x7F 0x05 +i2cset -y 0 0x54 0x7E 0x85 +i2cset -y 0 0x54 0x7B 0x00 +i2cset -y 0 0x54 0x7A 0x00 +i2cset -y 0 0x54 0x79 0x40 +i2cset -y 0 0x54 0x78 0x06 +i2cset -y 0 0x54 0x73 0x40 +i2cset -y 0 0x54 0x72 0x40 + +# OUT3:25MHz +i2cset -y 0 0x54 0x71 0x0A +i2cset -y 0 0x54 0x70 0x00 + +# OUT1:1pps +i2cset -y 0 0x54 0x6B 0x4E +i2cset -y 0 0x54 0x69 0x00 +i2cset -y 0 0x54 0x68 0x00 +i2cset -y 0 0x54 0x67 0x19 +i2cset -y 0 0x54 0x66 0xAB +i2cset -y 0 0x54 0x65 0x8C +i2cset -y 0 0x54 0x64 0x00 +i2cset -y 0 0x54 0x63 0x00 +i2cset -y 0 0x54 0x62 0x00 +i2cset -y 0 0x54 0x5F 0x00 +i2cset -y 0 0x54 0x5E 0x00 +i2cset -y 0 0x54 0x5D 0x00 +i2cset -y 0 0x54 0x5C 0x78 +i2cset -y 0 0x54 0x5B 0x02 +i2cset -y 0 0x54 0x5A 0xE5 +i2cset -y 0 0x54 0x59 0x88 +i2cset -y 0 0x54 0x58 0x4B +i2cset -y 0 0x54 0x57 0x6C +i2cset -y 0 0x54 0x56 0x6C + +# Lock to DPLL, output 625MHz +i2cset -y 0 0x54 0x55 0x80 +i2cset -y 0 0x54 0x53 0x00 +i2cset -y 0 0x54 0x52 0x81 +i2cset -y 0 0x54 0x50 0x00 +i2cset -y 0 0x54 0x4F 0x00 +i2cset -y 0 0x54 0x4E 0x00 +i2cset -y 0 0x54 0x4C 0xCB +i2cset -y 0 0x54 0x4A 0x00 +i2cset -y 0 0x54 0x45 0x66 +i2cset -y 0 0x54 0x44 0x66 +i2cset -y 0 0x54 0x42 0x80 +i2cset -y 0 0x54 0x41 0x03 +i2cset -y 0 0x54 0x40 0x01 +i2cset -y 0 0x54 0x3F 0x08 +i2cset -y 0 0x54 0x3E 0x04 +i2cset -y 0 0x54 0x3D 0x20 +i2cset -y 0 0x54 0x3C 0x13 +i2cset -y 0 0x54 0x3B 0x00 +i2cset -y 0 0x54 0x3A 0x98 +i2cset -y 0 0x54 0x39 0x01 +i2cset -y 0 0x54 0x38 0xE6 +i2cset -y 0 0x54 0x37 0x04 +i2cset -y 0 0x54 0x36 0xCE +i2cset -y 0 0x54 0x35 0x7C +i2cset -y 0 0x54 0x34 0x01 +i2cset -y 0 0x54 0x33 0x08 +i2cset -y 0 0x54 0x32 0x08 +i2cset -y 0 0x54 0x31 0x08 +i2cset -y 0 0x54 0x30 0x03 +i2cset -y 0 0x54 0x2F 0x23 +i2cset -y 0 0x54 0x2E 0x0B +i2cset -y 0 0x54 0x2D 0x00 +i2cset -y 0 0x54 0x28 0x76 +i2cset -y 0 0x54 0x27 0x54 +i2cset -y 0 0x54 0x25 0x00 +i2cset -y 0 0x54 0x24 0x03 +i2cset -y 0 0x54 0x23 0x06 +i2cset -y 0 0x54 0x1A 0x8C +i2cset -y 0 0x54 0x19 0x8C +i2cset -y 0 0x54 0x18 0x00 +i2cset -y 0 0x54 0x16 0x0D +i2cset -y 0 0x54 0x11 0x00 +i2cset -y 0 0x54 0x10 0x00 +i2cset -y 0 0x54 0x0E 0x3F +i2cset -y 0 0x54 0x0D 0xFF +i2cset -y 0 0x54 0x0C 0x02 +i2cset -y 0 0x54 0x0B 0xA1 +i2cset -y 0 0x54 0x0A 0x89 +i2cset -y 0 0x54 0x09 0xA2 +i2cset -y 0 0x54 0x08 0x32 +i2cset -y 0 0x54 0x06 0x00 +i2cset -y 0 0x54 0x05 0x00 +i2cset -y 0 0x54 0x04 0x00 +i2cset -y 0 0x54 0x03 0x00 +i2cset -y 0 0x54 0x02 0x05 +i2cset -y 0 0x54 0x01 0x33 +i2cset -y 0 0x54 0x00 0x91 + +echo "idt init 2" +# PreDivider_Parameters +#IN1 +i2cset -y 0 0x54 0x23 0x05 +i2cset -y 0 0x54 0x24 0x03 +i2cset -y 0 0x54 0x25 0x00 +#IN2 +i2cset -y 0 0x54 0x23 0x06 +i2cset -y 0 0x54 0x24 0x03 +i2cset -y 0 0x54 0x25 0x00 +#IN3 +i2cset -y 0 0x54 0x23 0x03 +i2cset -y 0 0x54 0x24 0x00 +i2cset -y 0 0x54 0x25 0x00 + +echo "idt init 3" +# Page1_Parameters +#Select to Page 1 +i2cset -y 0 0x54 0x2D 0x01 +i2cset -y 0 0x54 0x30 0x03 +i2cset -y 0 0x54 0x31 0x08 +i2cset -y 0 0x54 0x32 0x08 +i2cset -y 0 0x54 0x33 0x08 +i2cset -y 0 0x54 0x35 0x7C +i2cset -y 0 0x54 0x36 0xCE +i2cset -y 0 0x54 0x37 0x04 +i2cset -y 0 0x54 0x38 0xE6 +i2cset -y 0 0x54 0x39 0x01 +i2cset -y 0 0x54 0x3A 0x98 +i2cset -y 0 0x54 0x3B 0x00 +i2cset -y 0 0x54 0x3C 0x13 +i2cset -y 0 0x54 0x3D 0x20 +#Return to Page 0 +i2cset -y 0 0x54 0x2D 0x00 + +echo "idt init 4" +#reset the in-path mux +i2cset -y 0 0x76 0x0 +i2cset -y 0 0x77 0x0 + + + + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/mac_reset.sh b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/mac_reset.sh new file mode 100755 index 00000000000..9f688058c30 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/mac_reset.sh @@ -0,0 +1,242 @@ +#!/bin/bash +test_log=/usr/local/bin/check_mac_status.txt +modprobe i2c-i801 +modprobe i2c-dev +i2cset -y 0 0x77 0x1 +i2cset -y 0 0x76 0x1 +i2cget -y 0 0x54 0 b > /dev/null +if [ $? -ne 0 ];then + printf "Device 8v89307(0x54) not found\n" + i2cdetect -y 0 + echo "Reset both MAC and PCI (write 0x6F)" + i2cset -y 0 0x60 0x8 0x6f + + echo "Sleep 1s" + sleep 1 + + echo "Pull back MAC reset, keep PCIE reset (write 0xEF)" + i2cset -y 0 0x60 0x7 0xef + + echo "Sleep 1s" + sleep 1 + + echo "Set to default normal state (write 0xFF)" + i2cset -y 0 0x60 0x8 0xff + + + echo "remove PCI device" + echo 1 > /sys/bus/pci/devices/0000:07:00.0/remove + ls /sys/bus/pci/devices/ + echo "rescan PCI device" + echo 1 > /sys/bus/pci/rescan + ls /sys/bus/pci/devices/ + echo "Sleep 1s" + sleep 1 + lspci -n|grep 07:00.0 + if [ $? -ne 0 ];then + echo "Broadcom Corporation Device is not detect">>$test_log + echo "rescan PCI again" >>$test_log + echo 1 > /sys/bus/pci/rescan + sleep 1 + lspci -n|grep 07:00.0 + if [ $? -ne 0 ];then + echo "Broadcom Corporation Device NG">>$test_log + echo "rescan PCI again-2" >>$test_log + echo 1 > /sys/bus/pci/rescan + sleep 1 + else + echo "done mac_pci_reset_rescan" + fi + fi + + exit 1 +fi +echo "idt init 1" +# Title = --- IDT 82V89307 Registers --- +#Select to Page 0 +i2cset -y 0 0x54 0x2D 0x00 +i2cset -y 0 0x54 0x7F 0x05 +i2cset -y 0 0x54 0x7E 0x85 +i2cset -y 0 0x54 0x7B 0x00 +i2cset -y 0 0x54 0x7A 0x00 +i2cset -y 0 0x54 0x79 0x40 +i2cset -y 0 0x54 0x78 0x06 +i2cset -y 0 0x54 0x73 0x40 +i2cset -y 0 0x54 0x72 0x40 + +# OUT3:25MHz +i2cset -y 0 0x54 0x71 0x0A +i2cset -y 0 0x54 0x70 0x00 + +# OUT1:1pps +i2cset -y 0 0x54 0x6B 0x4E +i2cset -y 0 0x54 0x69 0x00 +i2cset -y 0 0x54 0x68 0x00 +i2cset -y 0 0x54 0x67 0x19 +i2cset -y 0 0x54 0x66 0xAB +i2cset -y 0 0x54 0x65 0x8C +i2cset -y 0 0x54 0x64 0x00 +i2cset -y 0 0x54 0x63 0x00 +i2cset -y 0 0x54 0x62 0x00 +i2cset -y 0 0x54 0x5F 0x00 +i2cset -y 0 0x54 0x5E 0x00 +i2cset -y 0 0x54 0x5D 0x00 +i2cset -y 0 0x54 0x5C 0x78 +i2cset -y 0 0x54 0x5B 0x02 +i2cset -y 0 0x54 0x5A 0xE5 +i2cset -y 0 0x54 0x59 0x88 +i2cset -y 0 0x54 0x58 0x4B +i2cset -y 0 0x54 0x57 0x6C +i2cset -y 0 0x54 0x56 0x6C + +# Lock to DPLL, output 625MHz +i2cset -y 0 0x54 0x55 0x80 +i2cset -y 0 0x54 0x53 0x00 +i2cset -y 0 0x54 0x52 0x81 +i2cset -y 0 0x54 0x50 0x00 +i2cset -y 0 0x54 0x4F 0x00 +i2cset -y 0 0x54 0x4E 0x00 +i2cset -y 0 0x54 0x4C 0xCB +i2cset -y 0 0x54 0x4A 0x00 +i2cset -y 0 0x54 0x45 0x66 +i2cset -y 0 0x54 0x44 0x66 +i2cset -y 0 0x54 0x42 0x80 +i2cset -y 0 0x54 0x41 0x03 +i2cset -y 0 0x54 0x40 0x01 +i2cset -y 0 0x54 0x3F 0x08 +i2cset -y 0 0x54 0x3E 0x04 +i2cset -y 0 0x54 0x3D 0x20 +i2cset -y 0 0x54 0x3C 0x13 +i2cset -y 0 0x54 0x3B 0x00 +i2cset -y 0 0x54 0x3A 0x98 +i2cset -y 0 0x54 0x39 0x01 +i2cset -y 0 0x54 0x38 0xE6 +i2cset -y 0 0x54 0x37 0x04 +i2cset -y 0 0x54 0x36 0xCE +i2cset -y 0 0x54 0x35 0x7C +i2cset -y 0 0x54 0x34 0x01 +i2cset -y 0 0x54 0x33 0x08 +i2cset -y 0 0x54 0x32 0x08 +i2cset -y 0 0x54 0x31 0x08 +i2cset -y 0 0x54 0x30 0x03 +i2cset -y 0 0x54 0x2F 0x23 +i2cset -y 0 0x54 0x2E 0x0B +i2cset -y 0 0x54 0x2D 0x00 +i2cset -y 0 0x54 0x28 0x76 +i2cset -y 0 0x54 0x27 0x54 +i2cset -y 0 0x54 0x25 0x00 +i2cset -y 0 0x54 0x24 0x03 +i2cset -y 0 0x54 0x23 0x06 +i2cset -y 0 0x54 0x1A 0x8C +i2cset -y 0 0x54 0x19 0x8C +i2cset -y 0 0x54 0x18 0x00 +i2cset -y 0 0x54 0x16 0x0D +i2cset -y 0 0x54 0x11 0x00 +i2cset -y 0 0x54 0x10 0x00 +i2cset -y 0 0x54 0x0E 0x3F +i2cset -y 0 0x54 0x0D 0xFF +i2cset -y 0 0x54 0x0C 0x02 +i2cset -y 0 0x54 0x0B 0xA1 +i2cset -y 0 0x54 0x0A 0x89 +i2cset -y 0 0x54 0x09 0xA2 +i2cset -y 0 0x54 0x08 0x32 +i2cset -y 0 0x54 0x06 0x00 +i2cset -y 0 0x54 0x05 0x00 +i2cset -y 0 0x54 0x04 0x00 +i2cset -y 0 0x54 0x03 0x00 +i2cset -y 0 0x54 0x02 0x05 +i2cset -y 0 0x54 0x01 0x33 +i2cset -y 0 0x54 0x00 0x91 + +echo "idt init 2" +# PreDivider_Parameters +#IN1 +i2cset -y 0 0x54 0x23 0x05 +i2cset -y 0 0x54 0x24 0x03 +i2cset -y 0 0x54 0x25 0x00 +#IN2 +i2cset -y 0 0x54 0x23 0x06 +i2cset -y 0 0x54 0x24 0x03 +i2cset -y 0 0x54 0x25 0x00 +#IN3 +i2cset -y 0 0x54 0x23 0x03 +i2cset -y 0 0x54 0x24 0x00 +i2cset -y 0 0x54 0x25 0x00 + +echo "idt init 3" +# Page1_Parameters +#Select to Page 1 +i2cset -y 0 0x54 0x2D 0x01 +i2cset -y 0 0x54 0x30 0x03 +i2cset -y 0 0x54 0x31 0x08 +i2cset -y 0 0x54 0x32 0x08 +i2cset -y 0 0x54 0x33 0x08 +i2cset -y 0 0x54 0x35 0x7C +i2cset -y 0 0x54 0x36 0xCE +i2cset -y 0 0x54 0x37 0x04 +i2cset -y 0 0x54 0x38 0xE6 +i2cset -y 0 0x54 0x39 0x01 +i2cset -y 0 0x54 0x3A 0x98 +i2cset -y 0 0x54 0x3B 0x00 +i2cset -y 0 0x54 0x3C 0x13 +i2cset -y 0 0x54 0x3D 0x20 +#Return to Page 0 +i2cset -y 0 0x54 0x2D 0x00 + +echo "idt init 4" +#reset the in-path mux +i2cset -y 0 0x76 0x0 +i2cset -y 0 0x77 0x0 + +#flip MAC reset at CPLD +echo "Work around: We need to reset MAC after set 8v89307 clock output" +echo " or it is possible to get sdk init failure sometimes" +echo "MAC reset at CPLD" +i2cset -y 0 0x77 0x1 +i2cset -y 0 0x76 0x4 +#i2cset -y 0 0x60 0x8 0x7f +#sleep 1 +#i2cset -y 0 0x60 0x8 0xff + + echo "Reset both MAC and PCI (write 0x6F)" + i2cset -y 0 0x60 0x8 0x6f + + echo "Sleep 1s" + sleep 1 + + echo "Pull back MAC reset, keep PCIE reset (write 0xEF)" + i2cset -y 0 0x60 0x7 0xef + + echo "Sleep 1s" + sleep 1 + + echo "Set to default normal state (write 0xFF)" + i2cset -y 0 0x60 0x8 0xff + + + echo "remove PCI device" + echo 1 > /sys/bus/pci/devices/0000:07:00.0/remove + ls /sys/bus/pci/devices/ + echo "rescan PCI device" + echo 1 > /sys/bus/pci/rescan + ls /sys/bus/pci/devices/ + echo "Sleep 1s" + sleep 1 + lspci -n|grep 07:00.0 + if [ $? -ne 0 ];then + echo "Broadcom Corporation Device is not detect">>$test_log + echo "rescan PCI again" >>$test_log + echo 1 > /sys/bus/pci/rescan + sleep 1 + lspci -n|grep 07:00.0 + if [ $? -ne 0 ];then + echo "Broadcom Corporation Device NG">>$test_log + echo "rescan PCI again-2" >>$test_log + echo 1 > /sys/bus/pci/rescan + sleep 1 + else + echo "done mac_pci_reset_rescan" + fi + fi + + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/classes/fanutil.py new file mode 100644 index 00000000000..42ccb17eaa0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/classes/fanutil.py @@ -0,0 +1,244 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# 5/02/2019: Roy Lee modify for as7816_64x +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_NUM_ON_MAIN_BROAD = 4 + FAN_NUM_1_IDX = 1 + FAN_NUM_2_IDX = 2 + FAN_NUM_3_IDX = 3 + FAN_NUM_4_IDX = 4 + + FAN_NODE_NUM_OF_MAP = 2 + FAN_NODE_FAULT_IDX_OF_MAP = 1 + #FAN_NODE_SPEED_IDX_OF_MAP = 2 + FAN_NODE_DIR_IDX_OF_MAP = 2 + #FAN_NODE_DUTY_IDX_OF_MAP = 4 + #FANR_NODE_FAULT_IDX_OF_MAP = 5 + + BASE_VAL_PATH = '/sys/bus/i2c/devices/17-0068/{0}' + FAN_DUTY_PATH = '/sys/bus/i2c/devices/17-0068/fan_duty_cycle_percentage' + + #logfile = '' + #loglevel = logging.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + _fan_to_device_path_mapping = {} + +#fan1_direction +#fan1_fault +#fan1_present + + #(FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage', + _fan_to_device_node_mapping = { + (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault', + (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction', + (FAN_NUM_2_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan2_fault', + (FAN_NUM_2_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan2_direction', + + (FAN_NUM_3_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan3_fault', + (FAN_NUM_3_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan3_direction', + + (FAN_NUM_4_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan4_fault', + (FAN_NUM_4_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan4_direction', + } + + def _get_fan_to_device_node(self, fan_num, node_num): + return self._fan_to_device_node_mapping[(fan_num, node_num)] + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + + try: + val_file = open(device_path, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_to_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + def __init__(self): + fan_path = self.BASE_VAL_PATH + + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_NUM_ON_MAIN_BROAD+1): + for node_num in range(self.FAN_NODE_FAULT_IDX_OF_MAP, self.FAN_NODE_NUM_OF_MAP+1): + self._fan_to_device_path_mapping[(fan_num, node_num)] = fan_path.format( + self._fan_to_device_node_mapping[(fan_num, node_num)]) + + def get_num_fans(self): + return self.FAN_NUM_ON_MAIN_BROAD + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM_OF_MAP + + def get_idx_node_start(self): + return self.FAN_NODE_FAULT_IDX_OF_MAP + + def get_size_node_map(self): + return len(self._fan_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._fan_to_device_path_mapping) + + def get_fan_to_device_path(self, fan_num, node_num): + return self._fan_to_device_path_mapping[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_FAULT_IDX_OF_MAP) + + #def get_fan_speed(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FAN_NODE_SPEED_IDX_OF_MAP) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DIR_IDX_OF_MAP) + + def get_fan_duty_cycle(self): + #duty_path = self.FAN_DUTY_PATH + try: + val_file = open(self.FAN_DUTY_PATH) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + return int(content) + #self._get_fan_node_val(fan_num, self.FAN_NODE_DUTY_IDX_OF_MAP) +#static u32 reg_val_to_duty_cycle(u8 reg_val) +#{ +# reg_val &= FAN_DUTY_CYCLE_REG_MASK; +# return ((u32)(reg_val+1) * 625 + 75)/ 100; +#} +# + def set_fan_duty_cycle(self, val): + + try: + fan_file = open(self.FAN_DUTY_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + fan_file.write(str(val)) + fan_file.close() + return True + + #def get_fanr_fault(self, fan_num): + # return self._get_fan_node_val(fan_num, self.FANR_NODE_FAULT_IDX_OF_MAP) + + def get_fanr_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP) + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num, %d', fan_num) + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + logging.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + #if self.get_fanr_fault(fan_num) is not None and self.get_fanr_fault(fan_num) > 0: + # logging.debug('GET. FANR fault. fan_num, %d', fan_num) + # return False + + return True + +#def main(): +# fan = FanUtil() +# +# print 'get_size_node_map : %d' % fan.get_size_node_map() +# print 'get_size_path_map : %d' % fan.get_size_path_map() +# for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): +# for y in range(fan.get_idx_node_start(), fan.get_num_nodes()+1): +# print fan.get_fan_to_device_path(x, y) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/classes/thermalutil.py new file mode 100644 index 00000000000..65e872c6beb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/classes/thermalutil.py @@ -0,0 +1,128 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018:Jostar modify for as7716_32x +# 5/02/2019: Roy Lee modify for as7816_64x +# ------------------------------------------------------------------ + +try: + import time + import logging + import glob + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + + THERMAL_NUM_ON_MAIN_BROAD = 6 + THERMAL_NUM_1_IDX = 1 + BASE_VAL_PATH = '/sys/bus/i2c/devices/{0}-00{1}/hwmon/hwmon*/temp1_input' + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + _thermal_to_device_path_mapping = {} + + _thermal_to_device_node_mapping = [ + ['18', '48'], + ['18', '49'], + ['18', '4a'], + ['18', '4b'], + ['17', '4d'], + ['17', '4e'], + ] + + def __init__(self): + thermal_path = self.BASE_VAL_PATH + + for x in range(self.THERMAL_NUM_ON_MAIN_BROAD): + self._thermal_to_device_path_mapping[x+1] = thermal_path.format( + self._thermal_to_device_node_mapping[x][0], + self._thermal_to_device_node_mapping[x][1]) + + def _get_thermal_node_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_to_device_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + + def get_num_thermals(self): + return self.THERMAL_NUM_ON_MAIN_BROAD + + def get_idx_thermal_start(self): + return self.THERMAL_NUM_1_IDX + + def get_size_node_map(self): + return len(self._thermal_to_device_node_mapping) + + def get_size_path_map(self): + return len(self._thermal_to_device_path_mapping) + + def get_thermal_to_device_path(self, thermal_num): + return self._thermal_to_device_path_mapping[thermal_num] + + def get_thermal_2_val(self): + return self._get_thermal_node_val(self.THERMAL_NUM_2_IDX) + + def get_thermal_temp(self): + sum = 0 + o = [] + for x in range(self.THERMAL_NUM_ON_MAIN_BROAD): + sum += self._get_thermal_node_val(x+1) + avg = sum/self.THERMAL_NUM_ON_MAIN_BROAD + avg = (avg/1000)*1000 #round down for hysteresis. + return avg + +#def main(): +# thermal = ThermalUtil() +# +# print 'get_size_node_map : %d' % thermal.get_size_node_map() +# print 'get_size_path_map : %d' % thermal.get_size_path_map() +# for x in range(thermal.get_idx_thermal_start(), thermal.get_num_thermals()+1): +# print thermal.get_thermal_to_device_path(x) +# +#if __name__ == '__main__': +# main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/Makefile new file mode 100644 index 00000000000..1b3477b0b77 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/Makefile @@ -0,0 +1,2 @@ +obj-m:=x86-64-accton-as7816-64x-fan.o x86-64-accton-as7816-64x-sfp.o x86-64-accton-as7816-64x-leds.o \ + x86-64-accton-as7816-64x-psu.o accton_i2c_cpld.o ym2651y.o diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/accton_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/accton_i2c_cpld.c new file mode 120000 index 00000000000..39c0826d16f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/accton_i2c_cpld.c @@ -0,0 +1 @@ +../../common/modules/accton_i2c_cpld.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-fan.c b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-fan.c new file mode 100644 index 00000000000..3de2c200e1e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-fan.c @@ -0,0 +1,466 @@ +/* + * A hwmon driver for the Accton as7816-64x fan + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as7816_64x_fan" + +static struct as7816_64x_fan_data *as7816_64x_fan_update_device(struct device *dev); +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); + +/* fan related data, the index should match sysfs_fan_attributes + */ +static const u8 fan_reg[] = { + 0x80, /* fan 1-4 present status */ + 0x81, /* fan 1-4 direction(0:F2B 1:B2F) */ + 0x87, /* fan PWM(for all fan) */ + 0x90, /* front fan 1 speed(rpm) */ + 0x91, /* front fan 2 speed(rpm) */ + 0x92, /* front fan 3 speed(rpm) */ + 0x93, /* front fan 4 speed(rpm) */ + 0x98, /* rear fan 1 speed(rpm) */ + 0x99, /* rear fan 2 speed(rpm) */ + 0x9A, /* rear fan 3 speed(rpm) */ + 0x9B, /* rear fan 4 speed(rpm) */ +}; + +/* Each client has this additional data */ +struct as7816_64x_fan_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ +}; + +enum fan_id { + FAN1_ID, + FAN2_ID, + FAN3_ID, + FAN4_ID +}; + +enum sysfs_fan_attributes { + FAN_PRESENT_REG, + FAN_DIRECTION_REG, + FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ + FAN1_FRONT_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN1_DIRECTION, + FAN2_DIRECTION, + FAN3_DIRECTION, + FAN4_DIRECTION, + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT +}; + +/* Define attributes + */ +#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT);\ + static SENSOR_DEVICE_ATTR(fan##index2##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT) +#define DECLARE_FAN_FAULT_ATTR(index, index2) &sensor_dev_attr_fan##index##_fault.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_fault.dev_attr.attr + +#define DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_direction, S_IRUGO, fan_show_value, NULL, FAN##index##_DIRECTION) +#define DECLARE_FAN_DIRECTION_ATTR(index) &sensor_dev_attr_fan##index##_direction.dev_attr.attr + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE);\ + static SENSOR_DEVICE_ATTR(pwm##index, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan_duty_cycle_percentage.dev_attr.attr, \ + &sensor_dev_attr_pwm##index.dev_attr.attr + + +#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_present, S_IRUGO, fan_show_value, NULL, FAN##index##_PRESENT) +#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr + +#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index2##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM) +#define DECLARE_FAN_SPEED_RPM_ATTR(index, index2) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_input.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_input.dev_attr.attr + +/* 6 fan fault attributes in this platform */ +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4,14); +/* 6 fan speed(rpm) attributes in this platform */ +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4,14); +/* 6 fan present attributes in this platform */ +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4); +/* 6 fan direction attribute in this platform */ +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(1); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(2); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(3); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(4); +/* 1 fan duty cycle attribute in this platform */ +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(1); + +static struct attribute *as7816_64x_fan_attributes[] = { + /* fan related attributes */ + DECLARE_FAN_FAULT_ATTR(1,11), + DECLARE_FAN_FAULT_ATTR(2,12), + DECLARE_FAN_FAULT_ATTR(3,13), + DECLARE_FAN_FAULT_ATTR(4,14), + DECLARE_FAN_SPEED_RPM_ATTR(1,11), + DECLARE_FAN_SPEED_RPM_ATTR(2,12), + DECLARE_FAN_SPEED_RPM_ATTR(3,13), + DECLARE_FAN_SPEED_RPM_ATTR(4,14), + DECLARE_FAN_PRESENT_ATTR(1), + DECLARE_FAN_PRESENT_ATTR(2), + DECLARE_FAN_PRESENT_ATTR(3), + DECLARE_FAN_PRESENT_ATTR(4), + DECLARE_FAN_DIRECTION_ATTR(1), + DECLARE_FAN_DIRECTION_ATTR(2), + DECLARE_FAN_DIRECTION_ATTR(3), + DECLARE_FAN_DIRECTION_ATTR(4), + DECLARE_FAN_DUTY_CYCLE_ATTR(1), + NULL +}; + +#define FAN_DUTY_CYCLE_REG_MASK 0xF +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 100 + +static int as7816_64x_fan_read_value(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int as7816_64x_fan_write_value(struct i2c_client *client, u8 reg, u8 value) +{ + return i2c_smbus_write_byte_data(client, reg, value); +} + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + reg_val &= FAN_DUTY_CYCLE_REG_MASK; + + if (!reg_val) { + return 0; + } + + if (reg_val == 0xF) { + return FAN_MAX_DUTY_CYCLE; + } + + return (reg_val * 6) + 10; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + if (duty_cycle < 16) { + return 0; + } + + if (duty_cycle >= 100) { + return 0xF; + } + + return (duty_cycle - 10) / 6; +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static u8 reg_val_to_direction(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + return !!(reg_val & mask); +} + +static u8 reg_val_to_is_present(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + return !(reg_val & mask); +} + +static u8 is_fan_fault(struct as7816_64x_fan_data *data, enum fan_id id) +{ + u8 ret = 1; + int front_fan_index = FAN1_FRONT_SPEED_RPM + id; + int rear_fan_index = FAN1_REAR_SPEED_RPM + id; + + /* Check if the speed of front or rear fan is ZERO, + */ + if (reg_val_to_speed_rpm(data->reg_val[front_fan_index]) && + reg_val_to_speed_rpm(data->reg_val[rear_fan_index])) { + ret = 0; + } + + return ret; +} + +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + struct i2c_client *client = to_i2c_client(dev); + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0 || value > FAN_MAX_DUTY_CYCLE) + return -EINVAL; + + as7816_64x_fan_write_value(client, 0x28, 0); /* Disable fan speed watch dog */ + as7816_64x_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); + return count; +} + +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7816_64x_fan_data *data = as7816_64x_fan_update_device(dev); + ssize_t ret = 0; + + if (data->valid) { + switch (attr->index) { + case FAN_DUTY_CYCLE_PERCENTAGE: + { + u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); + ret = sprintf(buf, "%u\n", duty_cycle); + break; + } + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + { + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index])); + break; + } + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + ret = sprintf(buf, "%d\n", + reg_val_to_is_present(data->reg_val[FAN_PRESENT_REG], + attr->index - FAN1_PRESENT)); + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + ret = sprintf(buf, "%d\n", is_fan_fault(data, attr->index - FAN1_FAULT)); + break; + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + ret = sprintf(buf, "%d\n", + reg_val_to_direction(data->reg_val[FAN_DIRECTION_REG], + attr->index - FAN1_DIRECTION)); + break; + default: + break; + } + } + + return ret; +} + +static const struct attribute_group as7816_64x_fan_group = { + .attrs = as7816_64x_fan_attributes, +}; + +static struct as7816_64x_fan_data *as7816_64x_fan_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7816_64x_fan_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + dev_dbg(&client->dev, "Starting as7816_64x_fan update\n"); + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { + int status = as7816_64x_fan_read_value(client, fan_reg[i]); + + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + dev_dbg(&client->dev, "reg %d, err %d\n", fan_reg[i], status); + return data; + } + else { + data->reg_val[i] = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int as7816_64x_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7816_64x_fan_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7816_64x_fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7816_64x_fan_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7816_64x_fan_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7816_64x_fan_remove(struct i2c_client *client) +{ + struct as7816_64x_fan_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7816_64x_fan_group); + + return 0; +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static const struct i2c_device_id as7816_64x_fan_id[] = { + { "as7816_64x_fan", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7816_64x_fan_id); + +static struct i2c_driver as7816_64x_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = as7816_64x_fan_probe, + .remove = as7816_64x_fan_remove, + .id_table = as7816_64x_fan_id, + .address_list = normal_i2c, +}; + +static int __init as7816_64x_fan_init(void) +{ + return i2c_add_driver(&as7816_64x_fan_driver); +} + +static void __exit as7816_64x_fan_exit(void) +{ + i2c_del_driver(&as7816_64x_fan_driver); +} + +module_init(as7816_64x_fan_init); +module_exit(as7816_64x_fan_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7816_64x_fan driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-leds.c b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-leds.c new file mode 100644 index 00000000000..025f87d692a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-leds.c @@ -0,0 +1,460 @@ +/* + * A LED driver for the as7816_64x_led + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +extern int accton_i2c_cpld_read (u8 cpld_addr, u8 reg); +extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern void led_classdev_unregister(struct led_classdev *led_cdev); +extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); +extern void led_classdev_resume(struct led_classdev *led_cdev); +extern void led_classdev_suspend(struct led_classdev *led_cdev); + +#define DRVNAME "as7816_64x_led" + +struct as7816_64x_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[1]; /* only 1 register*/ +}; + +static struct as7816_64x_led_data *ledctl = NULL; + +/* LED related data + */ + +#define LED_CNTRLER_I2C_ADDRESS (0x60) + +#define LED_TYPE_DIAG_REG_MASK (0x03) +#define LED_MODE_DIAG_YELLOW_VALUE (0x00) +#define LED_MODE_DIAG_RED_VALUE (0x01) +#define LED_MODE_DIAG_GREEN_VALUE (0x02) +#define LED_MODE_DIAG_OFF_VALUE (0x03) + +#define LED_TYPE_LOC_REG_MASK (0x10) +#define LED_MODE_LOC_ORANGE_VALUE (0x00) +#define LED_MODE_LOC_OFF_VALUE (0x10) + +#define LED_TYPE_FAN_REG_MASK (0x0C) +#define LED_MODE_FAN_ORANGE_VALUE (0x04) +#define LED_MODE_FAN_GREEN_VALUE_1 (0x00) +#define LED_MODE_FAN_GREEN_VALUE_2 (0x08) +#define LED_MODE_FAN_OFF_VALUE (0x0C) + +enum led_type { + LED_TYPE_DIAG, + LED_TYPE_LOC, + LED_TYPE_FAN, + LED_TYPE_PSU1, + LED_TYPE_PSU2 +}; + +struct led_reg { + u32 types; + u8 reg_addr; +}; + +static const struct led_reg led_reg_map[] = { + {(1 << LED_TYPE_LOC) | (1 << LED_TYPE_DIAG) | (1 << LED_TYPE_FAN), 0x30}, +}; + +enum led_light_mode { + LED_MODE_OFF, + LED_MODE_RED = 10, + LED_MODE_RED_BLINKING = 11, + LED_MODE_ORANGE = 12, + LED_MODE_ORANGE_BLINKING = 13, + LED_MODE_YELLOW = 14, + LED_MODE_YELLOW_BLINKING = 15, + LED_MODE_GREEN = 16, + LED_MODE_GREEN_BLINKING = 17, + LED_MODE_BLUE = 18, + LED_MODE_BLUE_BLINKING = 19, + LED_MODE_PURPLE = 20, + LED_MODE_PURPLE_BLINKING = 21, + LED_MODE_AUTO = 22, + LED_MODE_AUTO_BLINKING = 23, + LED_MODE_WHITE = 24, + LED_MODE_WHITE_BLINKING = 25, + LED_MODE_CYAN = 26, + LED_MODE_CYAN_BLINKING = 27, + LED_MODE_UNKNOWN = 99 +}; + +struct led_type_mode { + enum led_type type; + enum led_light_mode mode; + int reg_bit_mask; + int mode_value; +}; + +static struct led_type_mode led_type_mode_data[] = { +{LED_TYPE_LOC, LED_MODE_OFF, LED_TYPE_LOC_REG_MASK, LED_MODE_LOC_OFF_VALUE}, +{LED_TYPE_LOC, LED_MODE_ORANGE,LED_TYPE_LOC_REG_MASK, LED_MODE_LOC_ORANGE_VALUE}, +{LED_TYPE_DIAG, LED_MODE_OFF, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_OFF_VALUE}, +{LED_TYPE_DIAG, LED_MODE_GREEN, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_GREEN_VALUE}, +{LED_TYPE_DIAG, LED_MODE_RED, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_RED_VALUE}, +{LED_TYPE_DIAG, LED_MODE_YELLOW,LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_YELLOW_VALUE}, +{LED_TYPE_FAN, LED_MODE_OFF, LED_TYPE_FAN_REG_MASK, LED_MODE_FAN_OFF_VALUE}, +{LED_TYPE_FAN, LED_MODE_GREEN, LED_TYPE_FAN_REG_MASK, LED_MODE_FAN_GREEN_VALUE_1}, +{LED_TYPE_FAN, LED_MODE_GREEN, LED_TYPE_FAN_REG_MASK, LED_MODE_FAN_GREEN_VALUE_2}, +{LED_TYPE_FAN, LED_MODE_ORANGE,LED_TYPE_FAN_REG_MASK, LED_MODE_FAN_ORANGE_VALUE} +}; + +static int get_led_reg(enum led_type type, u8 *reg) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(led_reg_map); i++) { + if(led_reg_map[i].types & (1 << type)) { + *reg = led_reg_map[i].reg_addr; + return 0; + } + } + + return 1; +} + +static int led_reg_val_to_light_mode(enum led_type type, u8 reg_val) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + + if (type != led_type_mode_data[i].type) + continue; + + if ((led_type_mode_data[i].reg_bit_mask & reg_val) == + led_type_mode_data[i].mode_value) + { + return led_type_mode_data[i].mode; + } + } + + return 0; +} + +static u8 led_light_mode_to_reg_val(enum led_type type, + enum led_light_mode mode, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + if (type != led_type_mode_data[i].type) + continue; + + if (mode != led_type_mode_data[i].mode) + continue; + + reg_val = led_type_mode_data[i].mode_value | + (reg_val & (~led_type_mode_data[i].reg_bit_mask)); + break; + } + + return reg_val; +} + +static int as7816_64x_led_read_value(u8 reg) +{ + return accton_i2c_cpld_read(LED_CNTRLER_I2C_ADDRESS, reg); +} + +static int as7816_64x_led_write_value(u8 reg, u8 value) +{ + return accton_i2c_cpld_write(LED_CNTRLER_I2C_ADDRESS, reg, value); +} + +static void as7816_64x_led_update(void) +{ + mutex_lock(&ledctl->update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting as7816_64x_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = as7816_64x_led_read_value(led_reg_map[i].reg_addr); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg_map[i].reg_addr, status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void as7816_64x_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + enum led_type type) +{ + int reg_val; + u8 reg ; + mutex_lock(&ledctl->update_lock); + + if( !get_led_reg(type, ®)) { + dev_dbg(&ledctl->pdev->dev, "Not match register for %d.\n", type); + } + + reg_val = as7816_64x_led_read_value(reg); + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + as7816_64x_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + + +static void as7816_64x_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + as7816_64x_led_set(led_cdev, led_light_mode, LED_TYPE_DIAG); +} + +static enum led_brightness as7816_64x_led_diag_get(struct led_classdev *cdev) +{ + as7816_64x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void as7816_64x_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + as7816_64x_led_set(led_cdev, led_light_mode, LED_TYPE_LOC); +} + +static enum led_brightness as7816_64x_led_loc_get(struct led_classdev *cdev) +{ + as7816_64x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static void as7816_64x_led_fan_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + as7816_64x_led_set(led_cdev, led_light_mode, LED_TYPE_FAN); +} + +static enum led_brightness as7816_64x_led_fan_get(struct led_classdev *cdev) +{ + as7816_64x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_FAN, ledctl->reg_val[0]); +} + +static void as7816_64x_led_auto_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ +} + +static enum led_brightness as7816_64x_led_auto_get(struct led_classdev *cdev) +{ + return LED_MODE_AUTO; +} + +static struct led_classdev as7816_64x_leds[] = { + [LED_TYPE_DIAG] = { + .name = "as7816_64x_led::diag", + .default_trigger = "unused", + .brightness_set = as7816_64x_led_diag_set, + .brightness_get = as7816_64x_led_diag_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_GREEN, + }, + [LED_TYPE_LOC] = { + .name = "as7816_64x_led::loc", + .default_trigger = "unused", + .brightness_set = as7816_64x_led_loc_set, + .brightness_get = as7816_64x_led_loc_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_ORANGE, + }, + [LED_TYPE_FAN] = { + .name = "as7816_64x_led::fan", + .default_trigger = "unused", + .brightness_set = as7816_64x_led_fan_set, + .brightness_get = as7816_64x_led_fan_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_GREEN, + }, + [LED_TYPE_PSU1] = { + .name = "as7816_64x_led::psu1", + .default_trigger = "unused", + .brightness_set = as7816_64x_led_auto_set, + .brightness_get = as7816_64x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "as7816_64x_led::psu2", + .default_trigger = "unused", + .brightness_set = as7816_64x_led_auto_set, + .brightness_get = as7816_64x_led_auto_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, +}; + +static int as7816_64x_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(as7816_64x_leds); i++) { + led_classdev_suspend(&as7816_64x_leds[i]); + } + + return 0; +} + +static int as7816_64x_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(as7816_64x_leds); i++) { + led_classdev_resume(&as7816_64x_leds[i]); + } + + return 0; +} + +static int as7816_64x_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(as7816_64x_leds); i++) { + ret = led_classdev_register(&pdev->dev, &as7816_64x_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(as7816_64x_leds)){ + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&as7816_64x_leds[i]); + } + } + + return ret; +} + +static int as7816_64x_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(as7816_64x_leds); i++) { + led_classdev_unregister(&as7816_64x_leds[i]); + } + + return 0; +} + +static struct platform_driver as7816_64x_led_driver = { + .probe = as7816_64x_led_probe, + .remove = as7816_64x_led_remove, + .suspend = as7816_64x_led_suspend, + .resume = as7816_64x_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init as7816_64x_led_init(void) +{ + int ret; + + ret = platform_driver_register(&as7816_64x_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct as7816_64x_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&as7816_64x_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&as7816_64x_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return ret; +} + +static void __exit as7816_64x_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&as7816_64x_led_driver); + kfree(ledctl); +} + +module_init(as7816_64x_led_init); +module_exit(as7816_64x_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7816_64x_led driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-psu.c b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-psu.c new file mode 100644 index 00000000000..cdc535347dc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-psu.c @@ -0,0 +1,239 @@ +/* + * An hwmon driver for accton as7816_64x Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PSU_STATUS_I2C_ADDR 0x60 +#define PSU_STATUS_I2C_REG_OFFSET 0x03 + +#define IS_POWER_GOOD(id, value) (!!(value & BIT(2+id))) +#define IS_PRESENT(id, value) (!(value & BIT(id))) + +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static struct as7816_64x_psu_data *as7816_64x_psu_update_device(struct device *dev); +extern int accton_i2c_cpld_read (u8 cpld_addr, u8 reg); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as7816_64x_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ +}; + +enum as7816_64x_psu_sysfs_attributes { + PSU_PRESENT, + PSU_POWER_GOOD +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); + +static struct attribute *as7816_64x_psu_attributes[] = { + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + NULL +}; + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7816_64x_psu_data *data = as7816_64x_psu_update_device(dev); + u8 status = 0; + + if (!data->valid) { + return -EIO; + } + + if (attr->index == PSU_PRESENT) { + status = IS_PRESENT(data->index, data->status); + } + else { /* PSU_POWER_GOOD */ + status = IS_POWER_GOOD(data->index, data->status); + } + + return sprintf(buf, "%d\n", status); +} + +static const struct attribute_group as7816_64x_psu_group = { + .attrs = as7816_64x_psu_attributes, +}; + +static int as7816_64x_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7816_64x_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7816_64x_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7816_64x_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7816_64x_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7816_64x_psu_remove(struct i2c_client *client) +{ + struct as7816_64x_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7816_64x_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as7816_64x_psu1, + as7816_64x_psu2 +}; + +static const struct i2c_device_id as7816_64x_psu_id[] = { + { "as7816_64x_psu1", as7816_64x_psu1 }, + { "as7816_64x_psu2", as7816_64x_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7816_64x_psu_id); + +static struct i2c_driver as7816_64x_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7816_64x_psu", + }, + .probe = as7816_64x_psu_probe, + .remove = as7816_64x_psu_remove, + .id_table = as7816_64x_psu_id, + .address_list = normal_i2c, +}; + +static struct as7816_64x_psu_data *as7816_64x_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7816_64x_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status; + + data->valid = 0; + dev_dbg(&client->dev, "Starting as7816_64x update\n"); + + /* Read psu status */ + status = accton_i2c_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg (0x%x) err %d\n", PSU_STATUS_I2C_ADDR, status); + goto exit; + } + else { + data->status = status; + } + + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init as7816_64x_psu_init(void) +{ + return i2c_add_driver(&as7816_64x_psu_driver); +} + +static void __exit as7816_64x_psu_exit(void) +{ + i2c_del_driver(&as7816_64x_psu_driver); +} + +module_init(as7816_64x_psu_init); +module_exit(as7816_64x_psu_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7816_64x_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-sfp.c b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-sfp.c new file mode 100644 index 00000000000..76444ebbafc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-sfp.c @@ -0,0 +1,1576 @@ +/* + * SFP driver for accton as7816_64x sfp + * + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "as7816_64x_sfp" /* Platform dependent */ + +#define DEBUG_MODE 0 + +#if (DEBUG_MODE == 1) + #define DEBUG_PRINT(fmt, args...) \ + printk (KERN_INFO "%s:%s[%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +#define NUM_OF_SFP_PORT 24 +#define EEPROM_NAME "sfp_eeprom" +#define EEPROM_SIZE 256 /* 256 byte eeprom */ +#define BIT_INDEX(i) (1ULL << (i)) +#define USE_I2C_BLOCK_READ 1 /* Platform dependent */ +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +#define SFP_EEPROM_A0_I2C_ADDR (0xA0 >> 1) + +#define SFF8024_PHYSICAL_DEVICE_ID_ADDR 0x0 +#define SFF8024_DEVICE_ID_SFP 0x3 +#define SFF8024_DEVICE_ID_QSFP 0xC +#define SFF8024_DEVICE_ID_QSFP_PLUS 0xD +#define SFF8024_DEVICE_ID_QSFP28 0x11 + +#define SFF8436_RX_LOS_ADDR 3 +#define SFF8436_TX_FAULT_ADDR 4 +#define SFF8436_TX_DISABLE_ADDR 86 + +#define MULTIPAGE_SUPPORT 1 + +#if (MULTIPAGE_SUPPORT == 1) +/* fundamental unit of addressing for SFF_8472/SFF_8436 */ +#define SFF_8436_PAGE_SIZE 128 +/* + * The current 8436 (QSFP) spec provides for only 4 supported + * pages (pages 0-3). + * This driver is prepared to support more, but needs a register in the + * EEPROM to indicate how many pages are supported before it is safe + * to implement more pages in the driver. + */ +#define SFF_8436_SPECED_PAGES 4 +#define SFF_8436_EEPROM_SIZE ((1 + SFF_8436_SPECED_PAGES) * SFF_8436_PAGE_SIZE) +#define SFF_8436_EEPROM_UNPAGED_SIZE (2 * SFF_8436_PAGE_SIZE) +/* + * The current 8472 (SFP) spec provides for only 3 supported + * pages (pages 0-2). + * This driver is prepared to support more, but needs a register in the + * EEPROM to indicate how many pages are supported before it is safe + * to implement more pages in the driver. + */ +#define SFF_8472_SPECED_PAGES 3 +#define SFF_8472_EEPROM_SIZE ((3 + SFF_8472_SPECED_PAGES) * SFF_8436_PAGE_SIZE) +#define SFF_8472_EEPROM_UNPAGED_SIZE (4 * SFF_8436_PAGE_SIZE) + +/* a few constants to find our way around the EEPROM */ +#define SFF_8436_PAGE_SELECT_REG 0x7F +#define SFF_8436_PAGEABLE_REG 0x02 +#define SFF_8436_NOT_PAGEABLE (1<<2) +#define SFF_8472_PAGEABLE_REG 0x40 +#define SFF_8472_PAGEABLE (1<<4) + +/* + * This parameter is to help this driver avoid blocking other drivers out + * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C + * clock, one 256 byte read takes about 1/43 second which is excessive; + * but the 1/170 second it takes at 400 kHz may be quite reasonable; and + * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. + * + * This value is forced to be a power of two so that writes align on pages. + */ +static unsigned io_limit = SFF_8436_PAGE_SIZE; + +/* + * specs often allow 5 msec for a page write, sometimes 20 msec; + * it's important to recover from write timeouts. + */ +static unsigned write_timeout = 25; + +typedef enum qsfp_opcode { + QSFP_READ_OP = 0, + QSFP_WRITE_OP = 1 +} qsfp_opcode_e; +#endif + +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_present(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t qsfp_set_tx_disable(struct device *dev, struct device_attribute *da, const char *buf, size_t count);; +static ssize_t sfp_eeprom_read(struct i2c_client *, u8, u8 *,int); +static ssize_t sfp_eeprom_write(struct i2c_client *, u8 , const char *,int); +extern int accton_i2c_cpld_read (u8 cpld_addr, u8 reg); + +enum sfp_sysfs_attributes { + PRESENT, + PRESENT_ALL, + PORT_NUMBER, + PORT_TYPE, + DDM_IMPLEMENTED, + TX_FAULT, + TX_FAULT1, + TX_FAULT2, + TX_FAULT3, + TX_FAULT4, + TX_DISABLE, + TX_DISABLE1, + TX_DISABLE2, + TX_DISABLE3, + TX_DISABLE4, + RX_LOS, + RX_LOS1, + RX_LOS2, + RX_LOS3, + RX_LOS4, + RX_LOS_ALL +}; + +/* SFP/QSFP common attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_port_number, S_IRUGO, show_port_number, NULL, PORT_NUMBER); +static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, show_present, NULL, PRESENT); +static SENSOR_DEVICE_ATTR(sfp_is_present_all, S_IRUGO, show_present, NULL, PRESENT_ALL); +static SENSOR_DEVICE_ATTR(sfp_tx_disable, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE); +static SENSOR_DEVICE_ATTR(sfp_tx_fault, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT); + +/* QSFP attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_rx_los, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS); +static SENSOR_DEVICE_ATTR(sfp_rx_los1, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS1); +static SENSOR_DEVICE_ATTR(sfp_rx_los2, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS2); +static SENSOR_DEVICE_ATTR(sfp_rx_los3, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS3); +static SENSOR_DEVICE_ATTR(sfp_rx_los4, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS4); +static SENSOR_DEVICE_ATTR(sfp_tx_disable1, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE1); +static SENSOR_DEVICE_ATTR(sfp_tx_disable2, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE2); +static SENSOR_DEVICE_ATTR(sfp_tx_disable3, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE3); +static SENSOR_DEVICE_ATTR(sfp_tx_disable4, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE4); +static SENSOR_DEVICE_ATTR(sfp_tx_fault1, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT1); +static SENSOR_DEVICE_ATTR(sfp_tx_fault2, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT2); +static SENSOR_DEVICE_ATTR(sfp_tx_fault3, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT3); +static SENSOR_DEVICE_ATTR(sfp_tx_fault4, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT4); +static struct attribute *qsfp_attributes[] = { + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los1.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los2.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los3.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los4.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable1.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable2.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable3.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable4.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault1.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault2.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault3.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault4.dev_attr.attr, + NULL +}; + +/* Platform dependent +++ */ +#define CPLD_PORT_TO_FRONT_PORT(port) (port+1) + +enum port_numbers { +as7816_64x_port1, as7816_64x_port2, as7816_64x_port3, as7816_64x_port4, +as7816_64x_port5, as7816_64x_port6, as7816_64x_port7, as7816_64x_port8, +as7816_64x_port9, as7816_64x_port10, as7816_64x_port11, as7816_64x_port12, +as7816_64x_port13, as7816_64x_port14, as7816_64x_port15, as7816_64x_port16, +as7816_64x_port17, as7816_64x_port18, as7816_64x_port19, as7816_64x_port20, +as7816_64x_port21, as7816_64x_port22, as7816_64x_port23, as7816_64x_port24, +as7816_64x_port25, as7816_64x_port26, as7816_64x_port27, as7816_64x_port28, +as7816_64x_port29, as7816_64x_port30, as7816_64x_port31, as7816_64x_port32, +as7816_64x_port33, as7816_64x_port34, as7816_64x_port35, as7816_64x_port36, +as7816_64x_port37, as7816_64x_port38, as7816_64x_port39, as7816_64x_port40, +as7816_64x_port41, as7816_64x_port42, as7816_64x_port43, as7816_64x_port44, +as7816_64x_port45, as7816_64x_port46, as7816_64x_port47, as7816_64x_port48, +as7816_64x_port49, as7816_64x_port50, as7816_64x_port51, as7816_64x_port52, +as7816_64x_port53, as7816_64x_port54, as7816_64x_port55, as7816_64x_port56, +as7816_64x_port57, as7816_64x_port58, as7816_64x_port59, as7816_64x_port60, +as7816_64x_port61, as7816_64x_port62, as7816_64x_port63, as7816_64x_port64 +}; + +#define I2C_DEV_ID(x) { #x, x} + +static const struct i2c_device_id sfp_device_id[] = { +I2C_DEV_ID(as7816_64x_port1), +I2C_DEV_ID(as7816_64x_port2), +I2C_DEV_ID(as7816_64x_port3), +I2C_DEV_ID(as7816_64x_port4), +I2C_DEV_ID(as7816_64x_port5), +I2C_DEV_ID(as7816_64x_port6), +I2C_DEV_ID(as7816_64x_port7), +I2C_DEV_ID(as7816_64x_port8), +I2C_DEV_ID(as7816_64x_port9), +I2C_DEV_ID(as7816_64x_port10), +I2C_DEV_ID(as7816_64x_port11), +I2C_DEV_ID(as7816_64x_port12), +I2C_DEV_ID(as7816_64x_port13), +I2C_DEV_ID(as7816_64x_port14), +I2C_DEV_ID(as7816_64x_port15), +I2C_DEV_ID(as7816_64x_port16), +I2C_DEV_ID(as7816_64x_port17), +I2C_DEV_ID(as7816_64x_port18), +I2C_DEV_ID(as7816_64x_port19), +I2C_DEV_ID(as7816_64x_port20), +I2C_DEV_ID(as7816_64x_port21), +I2C_DEV_ID(as7816_64x_port22), +I2C_DEV_ID(as7816_64x_port23), +I2C_DEV_ID(as7816_64x_port24), +I2C_DEV_ID(as7816_64x_port25), +I2C_DEV_ID(as7816_64x_port26), +I2C_DEV_ID(as7816_64x_port27), +I2C_DEV_ID(as7816_64x_port28), +I2C_DEV_ID(as7816_64x_port29), +I2C_DEV_ID(as7816_64x_port30), +I2C_DEV_ID(as7816_64x_port31), +I2C_DEV_ID(as7816_64x_port32), +I2C_DEV_ID(as7816_64x_port33), +I2C_DEV_ID(as7816_64x_port34), +I2C_DEV_ID(as7816_64x_port35), +I2C_DEV_ID(as7816_64x_port36), +I2C_DEV_ID(as7816_64x_port37), +I2C_DEV_ID(as7816_64x_port38), +I2C_DEV_ID(as7816_64x_port39), +I2C_DEV_ID(as7816_64x_port40), +I2C_DEV_ID(as7816_64x_port41), +I2C_DEV_ID(as7816_64x_port42), +I2C_DEV_ID(as7816_64x_port43), +I2C_DEV_ID(as7816_64x_port44), +I2C_DEV_ID(as7816_64x_port45), +I2C_DEV_ID(as7816_64x_port46), +I2C_DEV_ID(as7816_64x_port47), +I2C_DEV_ID(as7816_64x_port48), +I2C_DEV_ID(as7816_64x_port49), +I2C_DEV_ID(as7816_64x_port50), +I2C_DEV_ID(as7816_64x_port51), +I2C_DEV_ID(as7816_64x_port52), +I2C_DEV_ID(as7816_64x_port53), +I2C_DEV_ID(as7816_64x_port54), +I2C_DEV_ID(as7816_64x_port55), +I2C_DEV_ID(as7816_64x_port56), +I2C_DEV_ID(as7816_64x_port57), +I2C_DEV_ID(as7816_64x_port58), +I2C_DEV_ID(as7816_64x_port59), +I2C_DEV_ID(as7816_64x_port60), +I2C_DEV_ID(as7816_64x_port61), +I2C_DEV_ID(as7816_64x_port62), +I2C_DEV_ID(as7816_64x_port63), +I2C_DEV_ID(as7816_64x_port64), +{ /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, sfp_device_id); +/* Platform dependent --- */ + +enum driver_type_e { + DRIVER_TYPE_SFP_MSA, + DRIVER_TYPE_SFP_DDM, + DRIVER_TYPE_QSFP, + DRIVER_TYPE_XFP +}; + +/* Each client has this additional data + */ +struct eeprom_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + struct bin_attribute bin; /* eeprom data */ +}; + +struct qsfp_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status[3]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss */ + u8 device_id; + struct eeprom_data eeprom; +}; + +struct sfp_port_data { + struct mutex update_lock; + enum driver_type_e driver_type; + int port; /* CPLD port index */ + u64 present; /* present status, bit0:port0, bit1:port1 and so on */ + + struct qsfp_data *qsfp; + + struct i2c_client *client; +#if (MULTIPAGE_SUPPORT == 1) + int use_smbus; + u8 *writebuf; + unsigned write_max; +#endif +}; + +#if (MULTIPAGE_SUPPORT == 1) +static ssize_t sfp_port_read_write(struct sfp_port_data *port_data, + char *buf, loff_t off, size_t len, qsfp_opcode_e opcode); +#endif +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + return sprintf(buf, "%d\n", CPLD_PORT_TO_FRONT_PORT(data->port)); +} + +/* Platform dependent +++ */ +static struct sfp_port_data *sfp_update_present(struct i2c_client *client) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + int i = 0; + int status = -1; + u8 regs[] = {0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77}; + + DEBUG_PRINT("Starting sfp present status update"); + mutex_lock(&data->update_lock); + + /* Read present status of port 1~64 */ + data->present = 0; + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = accton_i2c_cpld_read(0x60, regs[i]); + + if (status < 0) { + DEBUG_PRINT("cpld(0x60) reg(0x%x) err %d", regs[i], status); + goto exit; + } + + DEBUG_PRINT("Present status = 0x%lx", data->present); + data->present |= (u64)status << (i*8); + } + + DEBUG_PRINT("Present status = 0x%lx", data->present); +exit: + mutex_unlock(&data->update_lock); + return (status < 0) ? ERR_PTR(status) : data; +} + +/* Platform dependent --- */ + +static int sfp_is_port_present(struct i2c_client *client, int port) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + + data = sfp_update_present(client); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + return (data->present & BIT_INDEX(data->port)) ? 0 : 1; /* Platform dependent */ +} + +/* Platform dependent +++ */ +static ssize_t show_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + + if (PRESENT_ALL == attr->index) { + int i; + u8 values[8] = {0}; + struct sfp_port_data *data = sfp_update_present(client); + + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + for (i = 0; i < ARRAY_SIZE(values); i++) { + values[i] = ~(u8)(data->present >> (i * 8)); + } + + /* Return values 1 -> 64 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], values[3], + values[4], values[5], values[6], values[7]); + } + else { + struct sfp_port_data *data = i2c_get_clientdata(client); + int present = sfp_is_port_present(client, data->port); + + if (IS_ERR_VALUE(present)) { + return present; + } + + /* PRESENT */ + return sprintf(buf, "%d\n", present); + } +} +/* Platform dependent --- */ + +static struct sfp_port_data *qsfp_update_tx_rx_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int i, status = -1; + u8 buf = 0; + u8 reg[] = {SFF8436_TX_FAULT_ADDR, SFF8436_TX_DISABLE_ADDR, SFF8436_RX_LOS_ADDR}; + + if (time_before(jiffies, data->qsfp->last_updated + HZ + HZ / 2) && data->qsfp->valid) { + return data; + } + + DEBUG_PRINT("Starting sfp tx rx status update"); + mutex_lock(&data->update_lock); + data->qsfp->valid = 0; + memset(data->qsfp->status, 0, sizeof(data->qsfp->status)); + + /* Notify device to update tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(client, reg[i], &buf, sizeof(buf)); + if (unlikely(status < 0)) { + goto exit; + } + } + msleep(200); + + /* Read actual tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(client, reg[i], &buf, sizeof(buf)); + if (unlikely(status < 0)) { + goto exit; + } + + DEBUG_PRINT("qsfp reg(0x%x) status = (0x%x)", reg[i], data->qsfp->status[i]); + data->qsfp->status[i] = (buf & 0xF); + } + + data->qsfp->valid = 1; + data->qsfp->last_updated = jiffies; + +exit: + mutex_unlock(&data->update_lock); + return (status < 0) ? ERR_PTR(status) : data; +} + +static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + int present; + u8 val = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + present = sfp_is_port_present(client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + if (present == 0) { + /* port is not present */ + return -ENXIO; + } + + data = qsfp_update_tx_rx_status(dev); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + switch (attr->index) { + case TX_FAULT: + val = !!(data->qsfp->status[2] & 0xF); + break; + case TX_FAULT1: + case TX_FAULT2: + case TX_FAULT3: + case TX_FAULT4: + val = !!(data->qsfp->status[2] & BIT_INDEX(attr->index - TX_FAULT1)); + break; + case TX_DISABLE: + val = data->qsfp->status[1] & 0xF; + break; + case TX_DISABLE1: + case TX_DISABLE2: + case TX_DISABLE3: + case TX_DISABLE4: + val = !!(data->qsfp->status[1] & BIT_INDEX(attr->index - TX_DISABLE1)); + break; + case RX_LOS: + val = !!(data->qsfp->status[0] & 0xF); + break; + case RX_LOS1: + case RX_LOS2: + case RX_LOS3: + case RX_LOS4: + val = !!(data->qsfp->status[0] & BIT_INDEX(attr->index - RX_LOS1)); + break; + default: + break; + } + + return sprintf(buf, "%d\n", val); +} + +static ssize_t qsfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + long disable; + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + status = sfp_is_port_present(client, data->port); + if (IS_ERR_VALUE(status)) { + return status; + } + + if (!status) { + /* port is not present */ + return -ENXIO; + } + + status = kstrtol(buf, 10, &disable); + if (status) { + return status; + } + + data = qsfp_update_tx_rx_status(dev); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + mutex_lock(&data->update_lock); + + if (attr->index == TX_DISABLE) { + if (disable) { + data->qsfp->status[1] |= 0xF; + } + else { + data->qsfp->status[1] &= ~0xF; + } + } + else {/* TX_DISABLE1 ~ TX_DISABLE4*/ + if (disable) { + data->qsfp->status[1] |= (1 << (attr->index - TX_DISABLE1)); + } + else { + data->qsfp->status[1] &= ~(1 << (attr->index - TX_DISABLE1)); + } + } + + DEBUG_PRINT("index = (%d), status = (0x%x)", attr->index, data->qsfp->status[1]); + status = sfp_eeprom_write(data->client, SFF8436_TX_DISABLE_ADDR, &data->qsfp->status[1], sizeof(data->qsfp->status[1])); + if (unlikely(status < 0)) { + count = status; + } + + mutex_unlock(&data->update_lock); + return count; +} + +static ssize_t sfp_eeprom_write(struct i2c_client *client, u8 command, const char *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int status, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + status = i2c_smbus_write_i2c_block_data(client, command, data_len, data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + return status; + } + + return data_len; +#else + int status, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, command, *data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + return status; + } + + return 1; +#endif + + +} + +#if (MULTIPAGE_SUPPORT == 0) +static ssize_t sfp_port_write(struct sfp_port_data *data, + const char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + return count; + } + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_write(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; +} +#endif + +static ssize_t sfp_bin_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + int present; + struct sfp_port_data *data; + DEBUG_PRINT("%s(%d) offset = (%d), count = (%d)", off, count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + + present = sfp_is_port_present(data->client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + if (present == 0) { + /* port is not present */ + return -ENODEV; + } + +#if (MULTIPAGE_SUPPORT == 1) + return sfp_port_read_write(data, buf, off, count, QSFP_WRITE_OP); +#else + return sfp_port_write(data, buf, off, count); +#endif +} + +static ssize_t sfp_eeprom_read(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int status, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + status = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + goto abort; + } + if (unlikely(status != data_len)) { + status = -EIO; + goto abort; + } + + //result = data_len; + +abort: + return status; +#else + int status, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, command); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "sfp read byte data failed, command(0x%2x), data(0x%2x)\r\n", command, status); + goto abort; + } + + *data = (u8)status; + status = 1; + +abort: + return status; +#endif +} + +#if (MULTIPAGE_SUPPORT == 1) +/*-------------------------------------------------------------------------*/ +/* + * This routine computes the addressing information to be used for + * a given r/w request. + * + * Task is to calculate the client (0 = i2c addr 50, 1 = i2c addr 51), + * the page, and the offset. + * + * Handles both SFP and QSFP. + * For SFP, offset 0-255 are on client[0], >255 is on client[1] + * Offset 256-383 are on the lower half of client[1] + * Pages are accessible on the upper half of client[1]. + * Offset >383 are in 128 byte pages mapped into the upper half + * + * For QSFP, all offsets are on client[0] + * offset 0-127 are on the lower half of client[0] (no paging) + * Pages are accessible on the upper half of client[1]. + * Offset >127 are in 128 byte pages mapped into the upper half + * + * Callers must not read/write beyond the end of a client or a page + * without recomputing the client/page. Hence offset (within page) + * plus length must be less than or equal to 128. (Note that this + * routine does not have access to the length of the call, hence + * cannot do the validity check.) + * + * Offset within Lower Page 00h and Upper Page 00h are not recomputed + */ +static uint8_t sff_8436_translate_offset(struct sfp_port_data *port_data, + loff_t *offset, struct i2c_client **client) +{ + unsigned page = 0; + + *client = port_data->client; + + /* + * if offset is in the range 0-128... + * page doesn't matter (using lower half), return 0. + * offset is already correct (don't add 128 to get to paged area) + */ + if (*offset < SFF_8436_PAGE_SIZE) + return page; + + /* note, page will always be positive since *offset >= 128 */ + page = (*offset >> 7)-1; + /* 0x80 places the offset in the top half, offset is last 7 bits */ + *offset = SFF_8436_PAGE_SIZE + (*offset & 0x7f); + + return page; /* note also returning client and offset */ +} + +static ssize_t sff_8436_eeprom_read(struct sfp_port_data *port_data, + struct i2c_client *client, + char *buf, unsigned offset, size_t count) +{ + struct i2c_msg msg[2]; + u8 msgbuf[2]; + unsigned long timeout, read_time; + int status, i; + + memset(msg, 0, sizeof(msg)); + + switch (port_data->use_smbus) { + case I2C_SMBUS_I2C_BLOCK_DATA: + /*smaller eeproms can work given some SMBus extension calls */ + if (count > I2C_SMBUS_BLOCK_MAX) + count = I2C_SMBUS_BLOCK_MAX; + break; + case I2C_SMBUS_WORD_DATA: + /* Check for odd length transaction */ + count = (count == 1) ? 1 : 2; + break; + case I2C_SMBUS_BYTE_DATA: + count = 1; + break; + default: + /* + * When we have a better choice than SMBus calls, use a + * combined I2C message. Write address; then read up to + * io_limit data bytes. msgbuf is u8 and will cast to our + * needs. + */ + i = 0; + msgbuf[i++] = offset; + + msg[0].addr = client->addr; + msg[0].buf = msgbuf; + msg[0].len = i; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + } + + /* + * Reads fail if the previous write didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + read_time = jiffies; + + switch (port_data->use_smbus) { + case I2C_SMBUS_I2C_BLOCK_DATA: + status = i2c_smbus_read_i2c_block_data(client, offset, + count, buf); + break; + case I2C_SMBUS_WORD_DATA: + status = i2c_smbus_read_word_data(client, offset); + if (status >= 0) { + buf[0] = status & 0xff; + if (count == 2) + buf[1] = status >> 8; + status = count; + } + break; + case I2C_SMBUS_BYTE_DATA: + status = i2c_smbus_read_byte_data(client, offset); + if (status >= 0) { + buf[0] = status; + status = count; + } + break; + default: + status = i2c_transfer(client->adapter, msg, 2); + if (status == 2) + status = count; + } + + dev_dbg(&client->dev, "eeprom read %zu@%d --> %d (%ld)\n", + count, offset, status, jiffies); + + if (status == count) /* happy path */ + return count; + + if (status == -ENXIO) /* no module present */ + return status; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(read_time, timeout)); + + return -ETIMEDOUT; +} + +static ssize_t sff_8436_eeprom_write(struct sfp_port_data *port_data, + struct i2c_client *client, + const char *buf, + unsigned offset, size_t count) +{ + struct i2c_msg msg; + ssize_t status; + unsigned long timeout, write_time; + unsigned next_page_start; + int i = 0; + + /* write max is at most a page + * (In this driver, write_max is actually one byte!) + */ + if (count > port_data->write_max) + count = port_data->write_max; + + /* shorten count if necessary to avoid crossing page boundary */ + next_page_start = roundup(offset + 1, SFF_8436_PAGE_SIZE); + if (offset + count > next_page_start) + count = next_page_start - offset; + + switch (port_data->use_smbus) { + case I2C_SMBUS_I2C_BLOCK_DATA: + /*smaller eeproms can work given some SMBus extension calls */ + if (count > I2C_SMBUS_BLOCK_MAX) + count = I2C_SMBUS_BLOCK_MAX; + break; + case I2C_SMBUS_WORD_DATA: + /* Check for odd length transaction */ + count = (count == 1) ? 1 : 2; + break; + case I2C_SMBUS_BYTE_DATA: + count = 1; + break; + default: + /* If we'll use I2C calls for I/O, set up the message */ + msg.addr = client->addr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = port_data->writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + break; + } + + /* + * Reads fail if the previous write didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + write_time = jiffies; + + switch (port_data->use_smbus) { + case I2C_SMBUS_I2C_BLOCK_DATA: + status = i2c_smbus_write_i2c_block_data(client, + offset, count, buf); + if (status == 0) + status = count; + break; + case I2C_SMBUS_WORD_DATA: + if (count == 2) { + status = i2c_smbus_write_word_data(client, + offset, (u16)((buf[0])|(buf[1] << 8))); + } else { + /* count = 1 */ + status = i2c_smbus_write_byte_data(client, + offset, buf[0]); + } + if (status == 0) + status = count; + break; + case I2C_SMBUS_BYTE_DATA: + status = i2c_smbus_write_byte_data(client, offset, + buf[0]); + if (status == 0) + status = count; + break; + default: + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + break; + } + + dev_dbg(&client->dev, "eeprom write %zu@%d --> %ld (%lu)\n", + count, offset, (long int) status, jiffies); + + if (status == count) + return count; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(write_time, timeout)); + + return -ETIMEDOUT; +} + + +static ssize_t sff_8436_eeprom_update_client(struct sfp_port_data *port_data, + char *buf, loff_t off, + size_t count, qsfp_opcode_e opcode) +{ + struct i2c_client *client; + ssize_t retval = 0; + u8 page = 0; + loff_t phy_offset = off; + int ret = 0; + + page = sff_8436_translate_offset(port_data, &phy_offset, &client); + + dev_dbg(&client->dev, + "sff_8436_eeprom_update_client off %lld page:%d phy_offset:%lld, count:%ld, opcode:%d\n", + off, page, phy_offset, (long int) count, opcode); + if (page > 0) { + ret = sff_8436_eeprom_write(port_data, client, &page, + SFF_8436_PAGE_SELECT_REG, 1); + if (ret < 0) { + dev_dbg(&client->dev, + "Write page register for page %d failed ret:%d!\n", + page, ret); + return ret; + } + } + + while (count) { + ssize_t status; + + if (opcode == QSFP_READ_OP) { + status = sff_8436_eeprom_read(port_data, client, + buf, phy_offset, count); + } else { + status = sff_8436_eeprom_write(port_data, client, + buf, phy_offset, count); + } + if (status <= 0) { + if (retval == 0) + retval = status; + break; + } + buf += status; + phy_offset += status; + count -= status; + retval += status; + } + + + if (page > 0) { + /* return the page register to page 0 (why?) */ + page = 0; + ret = sff_8436_eeprom_write(port_data, client, &page, + SFF_8436_PAGE_SELECT_REG, 1); + if (ret < 0) { + dev_err(&client->dev, + "Restore page register to page %d failed ret:%d!\n", + page, ret); + return ret; + } + } + return retval; +} + + +/* + * Figure out if this access is within the range of supported pages. + * Note this is called on every access because we don't know if the + * module has been replaced since the last call. + * If/when modules support more pages, this is the routine to update + * to validate and allow access to additional pages. + * + * Returns updated len for this access: + * - entire access is legal, original len is returned. + * - access begins legal but is too long, len is truncated to fit. + * - initial offset exceeds supported pages, return -EINVAL + */ +static ssize_t sff_8436_page_legal(struct sfp_port_data *port_data, + loff_t off, size_t len) +{ + struct i2c_client *client = port_data->client; + u8 regval; + int status; + size_t maxlen; + + if (off < 0) return -EINVAL; + if (port_data->driver_type == DRIVER_TYPE_SFP_MSA) { + /* SFP case */ + /* if no pages needed, we're good */ + if ((off + len) <= SFF_8472_EEPROM_UNPAGED_SIZE) return len; + /* if offset exceeds possible pages, we're not good */ + if (off >= SFF_8472_EEPROM_SIZE) return -EINVAL; + /* in between, are pages supported? */ + status = sff_8436_eeprom_read(port_data, client, ®val, + SFF_8472_PAGEABLE_REG, 1); + if (status < 0) return status; /* error out (no module?) */ + if (regval & SFF_8472_PAGEABLE) { + /* Pages supported, trim len to the end of pages */ + maxlen = SFF_8472_EEPROM_SIZE - off; + } else { + /* pages not supported, trim len to unpaged size */ + maxlen = SFF_8472_EEPROM_UNPAGED_SIZE - off; + } + len = (len > maxlen) ? maxlen : len; + dev_dbg(&client->dev, + "page_legal, SFP, off %lld len %ld\n", + off, (long int) len); + } + else if (port_data->driver_type == DRIVER_TYPE_QSFP || + port_data->driver_type == DRIVER_TYPE_XFP) { + /* QSFP case */ + /* if no pages needed, we're good */ + if ((off + len) <= SFF_8436_EEPROM_UNPAGED_SIZE) return len; + /* if offset exceeds possible pages, we're not good */ + if (off >= SFF_8436_EEPROM_SIZE) return -EINVAL; + /* in between, are pages supported? */ + status = sff_8436_eeprom_read(port_data, client, ®val, + SFF_8436_PAGEABLE_REG, 1); + if (status < 0) return status; /* error out (no module?) */ + if (regval & SFF_8436_NOT_PAGEABLE) { + /* pages not supported, trim len to unpaged size */ + maxlen = SFF_8436_EEPROM_UNPAGED_SIZE - off; + } else { + /* Pages supported, trim len to the end of pages */ + maxlen = SFF_8436_EEPROM_SIZE - off; + } + len = (len > maxlen) ? maxlen : len; + dev_dbg(&client->dev, + "page_legal, QSFP, off %lld len %ld\n", + off, (long int) len); + } + else { + return -EINVAL; + } + return len; +} + + +static ssize_t sfp_port_read_write(struct sfp_port_data *port_data, + char *buf, loff_t off, size_t len, qsfp_opcode_e opcode) +{ + struct i2c_client *client = port_data->client; + int chunk; + int status = 0; + ssize_t retval; + size_t pending_len = 0, chunk_len = 0; + loff_t chunk_offset = 0, chunk_start_offset = 0; + + if (unlikely(!len)) + return len; + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&port_data->update_lock); + + /* + * Confirm this access fits within the device suppored addr range + */ + len = sff_8436_page_legal(port_data, off, len); + if (len < 0) { + status = len; + goto err; + } + + /* + * For each (128 byte) chunk involved in this request, issue a + * separate call to sff_eeprom_update_client(), to + * ensure that each access recalculates the client/page + * and writes the page register as needed. + * Note that chunk to page mapping is confusing, is different for + * QSFP and SFP, and never needs to be done. Don't try! + */ + pending_len = len; /* amount remaining to transfer */ + retval = 0; /* amount transferred */ + for (chunk = off >> 7; chunk <= (off + len - 1) >> 7; chunk++) { + + /* + * Compute the offset and number of bytes to be read/write + * + * 1. start at offset 0 (within the chunk), and read/write + * the entire chunk + * 2. start at offset 0 (within the chunk) and read/write less + * than entire chunk + * 3. start at an offset not equal to 0 and read/write the rest + * of the chunk + * 4. start at an offset not equal to 0 and read/write less than + * (end of chunk - offset) + */ + chunk_start_offset = chunk * SFF_8436_PAGE_SIZE; + + if (chunk_start_offset < off) { + chunk_offset = off; + if ((off + pending_len) < (chunk_start_offset + + SFF_8436_PAGE_SIZE)) + chunk_len = pending_len; + else + chunk_len = (chunk+1)*SFF_8436_PAGE_SIZE - off;/*SFF_8436_PAGE_SIZE - off;*/ + } else { + chunk_offset = chunk_start_offset; + if (pending_len > SFF_8436_PAGE_SIZE) + chunk_len = SFF_8436_PAGE_SIZE; + else + chunk_len = pending_len; + } + + dev_dbg(&client->dev, + "sff_r/w: off %lld, len %ld, chunk_start_offset %lld, chunk_offset %lld, chunk_len %ld, pending_len %ld\n", + off, (long int) len, chunk_start_offset, chunk_offset, + (long int) chunk_len, (long int) pending_len); + + /* + * note: chunk_offset is from the start of the EEPROM, + * not the start of the chunk + */ + status = sff_8436_eeprom_update_client(port_data, buf, + chunk_offset, chunk_len, opcode); + if (status != chunk_len) { + /* This is another 'no device present' path */ + dev_dbg(&client->dev, + "sff_8436_update_client for chunk %d chunk_offset %lld chunk_len %ld failed %d!\n", + chunk, chunk_offset, (long int) chunk_len, status); + goto err; + } + buf += status; + pending_len -= status; + retval += status; + } + mutex_unlock(&port_data->update_lock); + + return retval; + +err: + mutex_unlock(&port_data->update_lock); + + return status; +} + +#else +static ssize_t sfp_port_read(struct sfp_port_data *data, + char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + DEBUG_PRINT("Count = 0, return"); + return count; + } + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_read(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; + +} +#endif + +static ssize_t sfp_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + int present; + struct sfp_port_data *data; + DEBUG_PRINT("offset = (%d), count = (%d)", off, count); + + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + present = sfp_is_port_present(data->client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + if (present == 0) { + /* port is not present */ + return -ENODEV; + } + +#if (MULTIPAGE_SUPPORT == 1) + return sfp_port_read_write(data, buf, off, count, QSFP_READ_OP); +#else + return sfp_port_read(data, buf, off, count); +#endif +} + +#if (MULTIPAGE_SUPPORT == 1) +static int sfp_sysfs_eeprom_init(struct kobject *kobj, struct bin_attribute *eeprom, size_t size) +#else +static int sfp_sysfs_eeprom_init(struct kobject *kobj, struct bin_attribute *eeprom) +#endif +{ + int err; + + sysfs_bin_attr_init(eeprom); + eeprom->attr.name = EEPROM_NAME; + eeprom->attr.mode = S_IWUSR | S_IRUGO; + eeprom->read = sfp_bin_read; + eeprom->write = sfp_bin_write; +#if (MULTIPAGE_SUPPORT == 1) + eeprom->size = size; +#else + eeprom->size = EEPROM_SIZE; +#endif + + /* Create eeprom file */ + err = sysfs_create_bin_file(kobj, eeprom); + if (err) { + return err; + } + + return 0; +} + +static int sfp_sysfs_eeprom_cleanup(struct kobject *kobj, struct bin_attribute *eeprom) +{ + sysfs_remove_bin_file(kobj, eeprom); + return 0; +} + + +#if (MULTIPAGE_SUPPORT == 0) +static int sfp_i2c_check_functionality(struct i2c_client *client) +{ +#if USE_I2C_BLOCK_READ + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK); +#else + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA); +#endif +} +#endif + + +static const struct attribute_group qsfp_group = { + .attrs = qsfp_attributes, +}; + +static int qsfp_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct qsfp_data **data) +{ + int status; + struct qsfp_data *qsfp; + +#if (MULTIPAGE_SUPPORT == 0) + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } +#endif + + qsfp = kzalloc(sizeof(struct qsfp_data), GFP_KERNEL); + if (!qsfp) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &qsfp_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ +#if (MULTIPAGE_SUPPORT == 1) + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &qsfp->eeprom.bin, SFF_8436_EEPROM_SIZE); +#else + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &qsfp->eeprom.bin); +#endif + if (status) { + goto exit_remove; + } + + *data = qsfp; + dev_info(&client->dev, "qsfp '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &qsfp_group); +exit_free: + kfree(qsfp); +exit: + + return status; +} + +/* Platform dependent +++ */ +static int sfp_device_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int ret = 0; + struct sfp_port_data *data = NULL; + + if (client->addr != SFP_EEPROM_A0_I2C_ADDR) { + return -ENODEV; + } + + if (dev_id->driver_data < as7816_64x_port1 || dev_id->driver_data > as7816_64x_port64) { + return -ENXIO; + } + + data = kzalloc(sizeof(struct sfp_port_data), GFP_KERNEL); + if (!data) { + return -ENOMEM; + } + +#if (MULTIPAGE_SUPPORT == 1) + data->use_smbus = 0; + + /* Use I2C operations unless we're stuck with SMBus extensions. */ + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { + if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { + data->use_smbus = I2C_SMBUS_I2C_BLOCK_DATA; + } else if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_WORD_DATA)) { + data->use_smbus = I2C_SMBUS_WORD_DATA; + } else if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_BYTE_DATA)) { + data->use_smbus = I2C_SMBUS_BYTE_DATA; + } else { + ret = -EPFNOSUPPORT; + goto exit_kfree; + } + } + + if (!data->use_smbus || + (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) || + i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_WRITE_WORD_DATA) || + i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + /* + * NOTE: AN-2079 + * Finisar recommends that the host implement 1 byte writes + * only since this module only supports 32 byte page boundaries. + * 2 byte writes are acceptable for PE and Vout changes per + * Application Note AN-2071. + */ + unsigned write_max = 1; + + if (write_max > io_limit) + write_max = io_limit; + if (data->use_smbus && write_max > I2C_SMBUS_BLOCK_MAX) + write_max = I2C_SMBUS_BLOCK_MAX; + data->write_max = write_max; + + /* buffer (data + address at the beginning) */ + data->writebuf = kmalloc(write_max + 2, GFP_KERNEL); + if (!data->writebuf) { + ret = -ENOMEM; + goto exit_kfree; + } + } else { + dev_warn(&client->dev, + "cannot write due to controller restrictions."); + } + + if (data->use_smbus == I2C_SMBUS_WORD_DATA || + data->use_smbus == I2C_SMBUS_BYTE_DATA) { + dev_notice(&client->dev, "Falling back to %s reads, " + "performance will suffer\n", data->use_smbus == + I2C_SMBUS_WORD_DATA ? "word" : "byte"); + } +#endif + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->port = dev_id->driver_data; + data->client = client; + data->driver_type = DRIVER_TYPE_QSFP; + + ret = qsfp_probe(client, dev_id, &data->qsfp); + if (ret < 0) { + goto exit_kfree_buf; + } + + return ret; + +exit_kfree_buf: +#if (MULTIPAGE_SUPPORT == 1) + if (data->writebuf) kfree(data->writebuf); +#endif + +exit_kfree: + kfree(data); + return ret; +} +/* Platform dependent --- */ + +static int qsfp_remove(struct i2c_client *client, struct qsfp_data *data) +{ + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + sysfs_remove_group(&client->dev.kobj, &qsfp_group); + kfree(data); + return 0; +} + +static int sfp_device_remove(struct i2c_client *client) +{ + int ret = 0; + struct sfp_port_data *data = i2c_get_clientdata(client); + + if (data->driver_type == DRIVER_TYPE_QSFP) { + ret = qsfp_remove(client, data->qsfp); + } + + kfree(data); + return ret; +} + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static struct i2c_driver sfp_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = sfp_device_probe, + .remove = sfp_device_remove, + .id_table = sfp_device_id, + .address_list = normal_i2c, +}; + +static int __init sfp_init(void) +{ + return i2c_add_driver(&sfp_driver); +} + +static void __exit sfp_exit(void) +{ + i2c_del_driver(&sfp_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton as7816_64x_sfp driver"); +MODULE_LICENSE("GPL"); + +module_init(sfp_init); +module_exit(sfp_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/ym2651y.c new file mode 120000 index 00000000000..f4d67640ccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/ym2651y.c @@ -0,0 +1 @@ +../../common/modules/ym2651y.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/service/as7816-platform-init.service b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/service/as7816-platform-init.service new file mode 100755 index 00000000000..486ed74f824 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/service/as7816-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Accton AS7816-64X Platform initialization service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/accton_as7816_util.py install +ExecStart=/usr/local/bin/accton_as7816_monitor.py +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/setup.py new file mode 100755 index 00000000000..6633b9438b8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as7816_64x', + version='1.0', + description='Module to initialize Accton AS7816-64X platforms', + + packages=['as7816_64x'], + package_dir={'as7816_64x': 'as7816-64x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/utils/README b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/utils/README new file mode 100755 index 00000000000..0b9fc163399 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/utils/README @@ -0,0 +1,60 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +To initialize the system, run "accton_as7712_util.py install". +To clean up the drivers & devices, run "accton_as7712_util.py clean". +To dump information of sensors, run "accton_as7712_util.py show". +To dump SFP EEPROM, run "accton_as7712_util.py sff". +To set fan speed, run "accton_as7712_util.py set fan". +To enable/disable SFP emission, run "accton_as7712_util.py set sfp". +To set system LEDs' color, run "accton_as7712_util.py set led" +For more information, run "accton_as7712_util.py --help". + +==================================================================== +Besides applying accton_as7712_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +LED controls can be found under /sys/class/leds. The sysfs interface +color mappings are as follows: +Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + +There are 5 system LEDs, loc, diag, fan, ps1, and ps2. +They are lit automatically by CPLD, but the loc and diag. +The loc led has only 1 color, blue. +The diag one has 3 colors: red, amber, and green. + +Fan controls can be found in /sys/bus/i2c/devices/2-0066. +There are 12 fans inside 6 fan modules. +All fans share 1 duty setting, ranged from 0~100. + +Three temperature sensors are controlled by the lm75 kernel modules. +They should already be visible under /sys/bus/i2c/drivers/lm75/. + +Two power supplies are controlled by the CPLD. +Here provide their status under +/sys/bus/i2c/devices/10-0050 and /sys/bus/i2c/devices/11-0053. + +There are 32 QSFP+ modules are equipped. +Apply "accton_as7712_util.py show" to get their status. +Apply "accton_as7712_util.py set sfp" to turn on/off light transmission. +Apply "accton_as7712_util.py sff" to dump EEPROM information. +Before operating on that QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/utils/accton_as7816_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/utils/accton_as7816_monitor.py new file mode 100755 index 00000000000..3d9f6fc3ce5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/utils/accton_as7816_monitor.py @@ -0,0 +1,163 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 11/13/2017: Polly Hsu, Create +# 1/10/2018: Jostar modify for as7716_32 +# 5/02/2019: Roy Lee modify for as7816_64x +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import types + import time # this is only being used as part of the example + import traceback + import signal + from tabulate import tabulate + from as7816_64x.fanutil import FanUtil + from as7816_64x.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = 'accton_as7816_monitor' +DUTY_MAX = 100 +DUTY_DEF = 40 + +global log_file +global log_level + + +# Make a class we can use to capture stdout and sterr in the log +class accton_as7816_monitor(object): + # static temp var + _ori_temp = 0 + _new_perc = 0 + _ori_perc = 0 + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_fans(self): + max_duty = DUTY_MAX + fan_policy = { + 0: [52, 0, 43000], + 1: [63, 43000, 46000], + 2: [75, 46000, 52000], + 3: [88, 52000, 57000], + 4: [max_duty, 57000, sys.maxsize], + } + + thermal = ThermalUtil() + fan = FanUtil() + for x in range(fan.get_idx_fan_start(), fan.get_num_fans()+1): + fan_status = fan.get_fan_status(x) + if fan_status is None: + logging.debug('INFO. SET new_perc to %d (FAN stauts is None. fan_num:%d)', max_duty, x) + return False + if fan_status is False: + logging.debug('INFO. SET new_perc to %d (FAN fault. fan_num:%d)', max_duty, x) + fan.set_fan_duty_cycle(max_duty) + return True + #logging.debug('INFO. fan_status is True (fan_num:%d)', x) + + #Find if current duty matched any of define duty. + #If not, set it to highest one. + cur_duty_cycle = fan.get_fan_duty_cycle() + new_duty_cycle = DUTY_DEF + for x in range(0, len(fan_policy)): + if cur_duty_cycle == fan_policy[x][0]: + break + if x == len(fan_policy) : + fan.set_fan_duty_cycle(fan_policy[0][0]) + cur_duty_cycle = max_duty + + #Decide fan duty by if sum of sensors falls into any of fan_policy{} + get_temp = thermal.get_thermal_temp() + for x in range(0, len(fan_policy)): + y = len(fan_policy) - x -1 #checked from highest + if get_temp > fan_policy[y][1] and get_temp < fan_policy[y][2] : + new_duty_cycle = fan_policy[y][0] + logging.debug('INFO. Sum of temp %d > %d , new_duty_cycle=%d', get_temp, fan_policy[y][1], new_duty_cycle) + + logging.debug('INFO. Final duty_cycle=%d', new_duty_cycle) + if(new_duty_cycle != cur_duty_cycle): + fan.set_fan_duty_cycle(new_duty_cycle) + return True + +def handler(signum, frame): + fan = FanUtil() + logging.debug('INFO:Cause signal %d, set fan speed max.', signum) + fan.set_fan_duty_cycle(DUTY_MAX) + sys.exit(0) + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + signal.signal(signal.SIGINT, handler) + signal.signal(signal.SIGTERM, handler) + monitor = accton_as7816_monitor(log_file, log_level) + + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(10) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/utils/accton_as7816_util.py b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/utils/accton_as7816_util.py new file mode 100755 index 00000000000..ab5e52cb85b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/utils/accton_as7816_util.py @@ -0,0 +1,559 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + + + + +PROJECT_NAME = 'as7816_64x' +version = '0.1.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan':4,'thermal':6, 'psu':2, 'sfp':64} +FORCE = 0 +#logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +#logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-64 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def dis_i2c_ir3570a(addr): + cmd = "i2cset -y 0 0x%x 0xE5 0x01" % addr + status, output = commands.getstatusoutput(cmd) + cmd = "i2cset -y 0 0x%x 0x12 0x02" % addr + status, output = commands.getstatusoutput(cmd) + return status + +def ir3570_check(): + cmd = "i2cdump -y 0 0x42 s 0x9a" + try: + status, output = commands.getstatusoutput(cmd) + lines = output.split('\n') + hn = re.findall(r'\w+', lines[-1]) + version = int(hn[1], 16) + if version == 0x24: #only for ir3570a + ret = dis_i2c_ir3570a(4) + else: + ret = 0 + except Exception as e: + print "Error on ir3570_check() e:" + str(e) + return -1 + return ret + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-64 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ROY]"+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_check(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + return True + + + +kos = [ +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe optoe', +'modprobe accton_i2c_cpld' , +'modprobe ym2651y' , +'modprobe x86-64-accton-as7816-64x-fan' , +#'modprobe x86-64-accton-as7816-64x-sfp' , +'modprobe x86-64-accton-as7816-64x-leds' , +'modprobe x86-64-accton-as7816-64x-psu' ] + +def driver_install(): + global FORCE + status, output = log_os_system("depmod", 1) + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + #remove parameter if any + rm = kos[-(i+1)] + lst = rm.split(" ") + if len(lst) > 2: + del(lst[2:]) + rm = " ".join(lst) + + #Change to removing commands + rm = rm.replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +led_prefix ='/sys/class/leds/'+PROJECT_NAME+'_led::' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2']} +hwmon_nodes = {'led': ['brightness'] } +hwmon_prefix ={'led': led_prefix} + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'fan': ['17-0068'] , + 'thermal': ['18-0048','18-0049', '18-004a' , '18-004b', '17-004d', '17-004e'] , + 'psu': ['10-0053','9-0050'], + 'sfp': ['-0050']} +i2c_nodes = {'fan': ['present', 'front_speed_rpm', 'rear_speed_rpm'] , + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present', 'psu_power_good'] , + 'sfp': ['module_present']} + +sfp_map = [37,38,39,40,42,41,44,43,33,34,35,36,45,46,47,48,49,50,51,52, + 61,62,63,64,53,54,55,56,57,58,59,60,69,70,71,72,77,78,79,80,65, + 66,67,68,73,74,75,76,85,86,87,88,31,32,29,30,81,82,83,84,25,26, + 27,28] + +mknod =[ +'echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo 24c02 0x56 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo as7816_64x_psu1 0x53 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo ym2851 0x5b > /sys/bus/i2c/devices/i2c-10/new_device', +'echo as7816_64x_psu2 0x50 > /sys/bus/i2c/devices/i2c-9/new_device', +'echo ym2851 0x58 > /sys/bus/i2c/devices/i2c-9/new_device', +'echo as7816_64x_fan 0x68 > /sys/bus/i2c/devices/i2c-17/new_device', +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4d > /sys/bus/i2c/devices/i2c-17/new_device', +'echo lm75 0x4e > /sys/bus/i2c/devices/i2c-17/new_device', +'echo cpld_as7816 0x60 > /sys/bus/i2c/devices/i2c-19/new_device', +'echo cpld_plain 0x62 > /sys/bus/i2c/devices/i2c-20/new_device', +'echo cpld_plain 0x64 > /sys/bus/i2c/devices/i2c-21/new_device', +'echo cpld_plain 0x66 > /sys/bus/i2c/devices/i2c-22/new_device'] + +def i2c_order_check(): + return 0 + +def device_install(): + global FORCE + + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(0,len(sfp_map)): + path = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device" + status, output =log_os_system("echo optoe1 0x50 > " + path, 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/1-0076", 0) + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + nodelist = mknod + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_check() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_check() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + + ir3570_check() + + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_check()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + fmt = i2c_prefix+"19-0060/{0}_{1}" + path = fmt.format(nodes[j], k+1) + + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + i = int(index)-1 + node = i2c_prefix+ str(sfp_map[i])+ i2c_bus['sfp'][0]+"/"+ 'eeprom' + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system(hex_cmd +" -C "+node, 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan'] ['fan1'][0] + node = node.replace(node.split("/")[-1], 'fan_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0076", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/classes/fanutil.py new file mode 100755 index 00000000000..52889cd5895 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/classes/fanutil.py @@ -0,0 +1,218 @@ +#!/usr/bin/env python +# Copyright (c) 2019 Edgecore Networks Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. +# +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 8/27/2019:Jostar craete for as9716_32d +# ------------------------------------------------------------------ + +try: + import time + import logging + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +class FanUtil(object): + """Platform-specific FanUtil class""" + + FAN_NUM_ON_MAIN_BROAD = 6 + FAN_NUM_1_IDX = 1 + FAN_NUM_2_IDX = 2 + FAN_NUM_3_IDX = 3 + FAN_NUM_4_IDX = 4 + FAN_NUM_5_IDX = 5 + FAN_NUM_6_IDX = 6 + + FAN_NODE_NUM_OF_MAP = 2 + FAN_NODE_FAULT_IDX_OF_MAP = 1 + FAN_NODE_DIR_IDX_OF_MAP = 2 + + BASE_VAL_PATH = '/sys/bus/i2c/devices/17-0066/{0}' + FAN_DUTY_PATH = '/sys/bus/i2c/devices/17-0066/fan_duty_cycle_percentage' + + #logfile = '' + #loglevel = logging.INFO + + """ Dictionary where + key1 = fan id index (integer) starting from 1 + key2 = fan node index (interger) starting from 1 + value = path to fan device file (string) """ + _fan_device_path_mapping = {} + +#fan1_direction +#fan1_fault +#fan1_present + + #(FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage', + _fan_device_node_mapping = { + (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault', + (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction', + + (FAN_NUM_2_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan2_fault', + (FAN_NUM_2_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan2_direction', + + (FAN_NUM_3_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan3_fault', + (FAN_NUM_3_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan3_direction', + + (FAN_NUM_4_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan4_fault', + (FAN_NUM_4_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan4_direction', + + (FAN_NUM_5_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan5_fault', + (FAN_NUM_5_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan5_direction', + + (FAN_NUM_6_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan6_fault', + (FAN_NUM_6_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan6_direction', + } + + def _get_fan_device_node(self, fan_num, node_num): + return self._fan_device_node_mapping[(fan_num, node_num)] + + def _get_fan_node_val(self, fan_num, node_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + device_path = self.get_fan_device_path(fan_num, node_num) + + try: + val_file = open(device_path, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + def _set_fan_node_val(self, fan_num, node_num, val): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num:%d', fan_num) + return None + + if node_num < self.FAN_NODE_FAULT_IDX_OF_MAP or node_num > self.FAN_NODE_NUM_OF_MAP: + logging.debug('GET. Parameter error. node_num:%d', node_num) + return None + + content = str(val) + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + device_path = self.get_fan_device_path(fan_num, node_num) + try: + val_file = open(device_path, 'w') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + val_file.write(content) + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return True + + def __init__(self): + fan_path = self.BASE_VAL_PATH + + for fan_num in range(self.FAN_NUM_1_IDX, self.FAN_NUM_ON_MAIN_BROAD+1): + for node_num in range(self.FAN_NODE_FAULT_IDX_OF_MAP, self.FAN_NODE_NUM_OF_MAP+1): + self._fan_device_path_mapping[(fan_num, node_num)] = fan_path.format( + self._fan_device_node_mapping[(fan_num, node_num)]) + + def get_num_fans(self): + return self.FAN_NUM_ON_MAIN_BROAD + + def get_idx_fan_start(self): + return self.FAN_NUM_1_IDX + + def get_num_nodes(self): + return self.FAN_NODE_NUM_OF_MAP + + def get_idx_node_start(self): + return self.FAN_NODE_FAULT_IDX_OF_MAP + + def get_size_node_map(self): + return len(self._fan_device_node_mapping) + + def get_size_path_map(self): + return len(self._fan_device_path_mapping) + + def get_fan_device_path(self, fan_num, node_num): + return self._fan_device_path_mapping[(fan_num, node_num)] + + def get_fan_fault(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_FAULT_IDX_OF_MAP) + + def get_fan_dir(self, fan_num): + return self._get_fan_node_val(fan_num, self.FAN_NODE_DIR_IDX_OF_MAP) + + def get_fan_duty_cycle(self): + #duty_path = self.FAN_DUTY_PATH + try: + val_file = open(self.FAN_DUTY_PATH) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + return int(content) + + def set_fan_duty_cycle(self, val): + try: + fan_file = open(self.FAN_DUTY_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + fan_file.write(str(val)) + fan_file.close() + return True + + def get_fanr_speed(self, fan_num): + return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP) + + def get_fan_status(self, fan_num): + if fan_num < self.FAN_NUM_1_IDX or fan_num > self.FAN_NUM_ON_MAIN_BROAD: + logging.debug('GET. Parameter error. fan_num, %d', fan_num) + return None + + if self.get_fan_fault(fan_num) is not None and self.get_fan_fault(fan_num) > 0: + logging.debug('GET. FAN fault. fan_num, %d', fan_num) + return False + + diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/classes/thermalutil.py b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/classes/thermalutil.py new file mode 100755 index 00000000000..abbc5e819a8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/classes/thermalutil.py @@ -0,0 +1,102 @@ +#!/usr/bin/env python +# Copyright (c) 2019 Edgecore Networks Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. +# +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 8/27/2019:Jostar craete for as9716_32d +# ------------------------------------------------------------------ + +try: + import os + import time + import logging + import glob + import commands + from collections import namedtuple +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +class ThermalUtil(object): + """Platform-specific ThermalUtil class""" + THERMAL_NUM_MAX = 8 + THERMAL_NUM_1_IDX = 1 # 1~7 are mainboard thermal sensors + THERMAL_NUM_2_IDX = 2 + THERMAL_NUM_3_IDX = 3 + THERMAL_NUM_4_IDX = 4 + THERMAL_NUM_5_IDX = 5 + THERMAL_NUM_6_IDX = 6 + THERMAL_NUM_7_IDX = 7 # CPU core + THERMAL_NUM_8_IDX = 8 + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + #_thermal_to_device_path_mapping = {} + + thermal_sysfspath ={ + THERMAL_NUM_1_IDX: ["/sys/bus/i2c/devices/18-0048/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_2_IDX: ["/sys/bus/i2c/devices/18-0049/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_3_IDX: ["/sys/bus/i2c/devices/18-004a/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_4_IDX: ["/sys/bus/i2c/devices/18-004c/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_5_IDX: ["/sys/bus/i2c/devices/18-004e/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_6_IDX: ["/sys/bus/i2c/devices/18-004f/hwmon/hwmon*/temp1_input"], + THERMAL_NUM_7_IDX: ["/sys/class/hwmon/hwmon0/temp1_input"], + THERMAL_NUM_8_IDX: ["/sys/bus/i2c/devices/18-004b/hwmon/hwmon*/temp1_input"], + } + + #def __init__(self): + + def _get_thermal_val(self, thermal_num): + if thermal_num < self.THERMAL_NUM_1_IDX or thermal_num > self.THERMAL_NUM_MAX: + logging.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + content = val_file.readline().rstrip() + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + return 0 + + def get_num_thermals(self): + return self.THERMAL_NUM_MAX + + def get_size_path_map(self): + return len(self.thermal_sysfspath) + + def get_thermal_path(self, thermal_num): + return self.thermal_sysfspath[thermal_num][0] + + +def main(): + thermal = ThermalUtil() + +if __name__ == '__main__': + main() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/Makefile new file mode 100755 index 00000000000..be04fc82cb5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/Makefile @@ -0,0 +1,19 @@ +ifneq ($(KERNELRELEASE),) +obj-m:= accton_as9716_32d_cpld.o accton_as9716_32d_fan.o \ + accton_as9716_32d_leds.o accton_as9716_32d_psu.o accton_i2c_psu.o + +else +ifeq (,$(KERNEL_SRC)) +#$(error KERNEL_SRC is not defined) +KVERSION=3.16.0-8-amd64 +KERNEL_DIR = /usr/src/linux-headers-$(KVERSION)/ +KERNELDIR:=$(KERNEL_DIR) +else +KERNELDIR:=$(KERNEL_SRC) +endif +PWD:=$(shell pwd) +default: + $(MAKE) -C $(KERNELDIR) M=$(PWD) modules +clean: + rm -rf *.o *.mod.o *.mod.o *.ko .*cmd *.mod.c .tmp_versions Module.markers Module.symvers modules.order +endif diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_cpld.c new file mode 100755 index 00000000000..874bdc33bea --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_cpld.c @@ -0,0 +1,900 @@ +/* + * Copyright (C) Brandon Chuang + * + * This module supports the accton cpld that hold the channel select + * mechanism for other i2c slave devices, such as SFP. + * This includes the: + * Accton as9716_32d CPLD1/CPLD2/CPLD3 + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +enum cpld_type { + as9716_32d_fpga, + as9716_32d_cpld1, + as9716_32d_cpld2, + as9716_32d_cpld_cpu +}; + +struct as9716_32d_cpld_data { + enum cpld_type type; + struct device *hwmon_dev; + struct mutex update_lock; +}; + +static const struct i2c_device_id as9716_32d_cpld_id[] = { + { "as9716_32d_fpga", as9716_32d_fpga }, + { "as9716_32d_cpld1", as9716_32d_cpld1 }, + { "as9716_32d_cpld2", as9716_32d_cpld2 }, + { "as9716_32d_cpld_cpu", as9716_32d_cpld_cpu }, + { } +}; +MODULE_DEVICE_TABLE(i2c, as9716_32d_cpld_id); + +#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index +#define TRANSCEIVER_TXDISABLE_ATTR_ID(index) MODULE_TXDISABLE_##index +#define TRANSCEIVER_RXLOS_ATTR_ID(index) MODULE_RXLOS_##index +#define TRANSCEIVER_TXFAULT_ATTR_ID(index) MODULE_TXFAULT_##index +#define TRANSCEIVER_RESET_ATTR_ID(index) MODULE_RESET_##index + +enum as9716_32d_cpld_sysfs_attributes { + CPLD_VERSION, + ACCESS, + /* transceiver attributes */ + TRANSCEIVER_PRESENT_ATTR_ID(1), + TRANSCEIVER_PRESENT_ATTR_ID(2), + TRANSCEIVER_PRESENT_ATTR_ID(3), + TRANSCEIVER_PRESENT_ATTR_ID(4), + TRANSCEIVER_PRESENT_ATTR_ID(5), + TRANSCEIVER_PRESENT_ATTR_ID(6), + TRANSCEIVER_PRESENT_ATTR_ID(7), + TRANSCEIVER_PRESENT_ATTR_ID(8), + TRANSCEIVER_PRESENT_ATTR_ID(9), + TRANSCEIVER_PRESENT_ATTR_ID(10), + TRANSCEIVER_PRESENT_ATTR_ID(11), + TRANSCEIVER_PRESENT_ATTR_ID(12), + TRANSCEIVER_PRESENT_ATTR_ID(13), + TRANSCEIVER_PRESENT_ATTR_ID(14), + TRANSCEIVER_PRESENT_ATTR_ID(15), + TRANSCEIVER_PRESENT_ATTR_ID(16), + TRANSCEIVER_PRESENT_ATTR_ID(17), + TRANSCEIVER_PRESENT_ATTR_ID(18), + TRANSCEIVER_PRESENT_ATTR_ID(19), + TRANSCEIVER_PRESENT_ATTR_ID(20), + TRANSCEIVER_PRESENT_ATTR_ID(21), + TRANSCEIVER_PRESENT_ATTR_ID(22), + TRANSCEIVER_PRESENT_ATTR_ID(23), + TRANSCEIVER_PRESENT_ATTR_ID(24), + TRANSCEIVER_PRESENT_ATTR_ID(25), + TRANSCEIVER_PRESENT_ATTR_ID(26), + TRANSCEIVER_PRESENT_ATTR_ID(27), + TRANSCEIVER_PRESENT_ATTR_ID(28), + TRANSCEIVER_PRESENT_ATTR_ID(29), + TRANSCEIVER_PRESENT_ATTR_ID(30), + TRANSCEIVER_PRESENT_ATTR_ID(31), + TRANSCEIVER_PRESENT_ATTR_ID(32), + TRANSCEIVER_PRESENT_ATTR_ID(33), + TRANSCEIVER_PRESENT_ATTR_ID(34), + TRANSCEIVER_TXDISABLE_ATTR_ID(33), + TRANSCEIVER_TXDISABLE_ATTR_ID(34), + TRANSCEIVER_RXLOS_ATTR_ID(33), + TRANSCEIVER_RXLOS_ATTR_ID(34), + TRANSCEIVER_TXFAULT_ATTR_ID(33), + TRANSCEIVER_TXFAULT_ATTR_ID(34), + TRANSCEIVER_RESET_ATTR_ID(1), + TRANSCEIVER_RESET_ATTR_ID(2), + TRANSCEIVER_RESET_ATTR_ID(3), + TRANSCEIVER_RESET_ATTR_ID(4), + TRANSCEIVER_RESET_ATTR_ID(5), + TRANSCEIVER_RESET_ATTR_ID(6), + TRANSCEIVER_RESET_ATTR_ID(7), + TRANSCEIVER_RESET_ATTR_ID(8), + TRANSCEIVER_RESET_ATTR_ID(9), + TRANSCEIVER_RESET_ATTR_ID(10), + TRANSCEIVER_RESET_ATTR_ID(11), + TRANSCEIVER_RESET_ATTR_ID(12), + TRANSCEIVER_RESET_ATTR_ID(13), + TRANSCEIVER_RESET_ATTR_ID(14), + TRANSCEIVER_RESET_ATTR_ID(15), + TRANSCEIVER_RESET_ATTR_ID(16), + TRANSCEIVER_RESET_ATTR_ID(17), + TRANSCEIVER_RESET_ATTR_ID(18), + TRANSCEIVER_RESET_ATTR_ID(19), + TRANSCEIVER_RESET_ATTR_ID(20), + TRANSCEIVER_RESET_ATTR_ID(21), + TRANSCEIVER_RESET_ATTR_ID(22), + TRANSCEIVER_RESET_ATTR_ID(23), + TRANSCEIVER_RESET_ATTR_ID(24), + TRANSCEIVER_RESET_ATTR_ID(25), + TRANSCEIVER_RESET_ATTR_ID(26), + TRANSCEIVER_RESET_ATTR_ID(27), + TRANSCEIVER_RESET_ATTR_ID(28), + TRANSCEIVER_RESET_ATTR_ID(29), + TRANSCEIVER_RESET_ATTR_ID(30), + TRANSCEIVER_RESET_ATTR_ID(31), + TRANSCEIVER_RESET_ATTR_ID(32), +}; + +/* sysfs attributes for hwmon + */ +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t get_mode_reset(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static int as9716_32d_cpld_read_internal(struct i2c_client *client, u8 reg); +static int as9716_32d_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value); + +/* transceiver attributes */ +#define DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_status, NULL, MODULE_PRESENT_##index) +#define DECLARE_TRANSCEIVER_PRESENT_ATTR(index) &sensor_dev_attr_module_present_##index.dev_attr.attr + +#define DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_tx_disable_##index, S_IRUGO | S_IWUSR, show_status, set_tx_disable, MODULE_TXDISABLE_##index); \ + static SENSOR_DEVICE_ATTR(module_rx_los_##index, S_IRUGO, show_status, NULL, MODULE_RXLOS_##index); \ + static SENSOR_DEVICE_ATTR(module_tx_fault_##index, S_IRUGO, show_status, NULL, MODULE_RXLOS_##index); + +#define DECLARE_SFP_TRANSCEIVER_ATTR(index) \ + &sensor_dev_attr_module_tx_disable_##index.dev_attr.attr, \ + &sensor_dev_attr_module_rx_los_##index.dev_attr.attr, \ + &sensor_dev_attr_module_tx_fault_##index.dev_attr.attr + +/*reset*/ +#define DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(index) \ + static SENSOR_DEVICE_ATTR(module_reset_##index, S_IWUSR | S_IRUGO, get_mode_reset, set_mode_reset, MODULE_RESET_##index) +#define DECLARE_TRANSCEIVER_RESET_ATTR(index) &sensor_dev_attr_module_reset_##index.dev_attr.attr + + + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS); +/* transceiver attributes */ +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(1); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(2); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(3); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(4); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(5); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(6); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(7); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(8); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(9); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(10); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(11); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(12); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(13); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(14); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(15); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(16); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(17); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(18); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(19); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(20); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(21); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(22); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(23); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(24); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(25); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(26); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(27); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(28); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(29); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(30); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(31); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(32); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(33); +DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(34); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(33); +DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(34); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(1); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(2); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(3); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(4); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(5); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(6); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(7); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(8); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(9); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(10); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(11); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(12); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(13); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(14); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(15); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(16); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(17); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(18); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(19); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(20); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(21); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(22); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(23); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(24); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(25); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(26); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(27); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(28); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(29); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(30); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(31); +DECLARE_TRANSCEIVER_SENSOR_DEVICE_RESET_ATTR(32); + + + +static struct attribute *as9716_32d_fpga_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + NULL +}; + +static const struct attribute_group as9716_32d_fpga_group = { + .attrs = as9716_32d_fpga_attributes, +}; + +static struct attribute *as9716_32d_cpld1_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(1), + DECLARE_TRANSCEIVER_PRESENT_ATTR(2), + DECLARE_TRANSCEIVER_PRESENT_ATTR(3), + DECLARE_TRANSCEIVER_PRESENT_ATTR(4), + DECLARE_TRANSCEIVER_PRESENT_ATTR(5), + DECLARE_TRANSCEIVER_PRESENT_ATTR(6), + DECLARE_TRANSCEIVER_PRESENT_ATTR(7), + DECLARE_TRANSCEIVER_PRESENT_ATTR(8), + DECLARE_TRANSCEIVER_PRESENT_ATTR(9), + DECLARE_TRANSCEIVER_PRESENT_ATTR(10), + DECLARE_TRANSCEIVER_PRESENT_ATTR(11), + DECLARE_TRANSCEIVER_PRESENT_ATTR(12), + DECLARE_TRANSCEIVER_PRESENT_ATTR(13), + DECLARE_TRANSCEIVER_PRESENT_ATTR(14), + DECLARE_TRANSCEIVER_PRESENT_ATTR(15), + DECLARE_TRANSCEIVER_PRESENT_ATTR(16), + DECLARE_TRANSCEIVER_RESET_ATTR(1), + DECLARE_TRANSCEIVER_RESET_ATTR(2), + DECLARE_TRANSCEIVER_RESET_ATTR(3), + DECLARE_TRANSCEIVER_RESET_ATTR(4), + DECLARE_TRANSCEIVER_RESET_ATTR(5), + DECLARE_TRANSCEIVER_RESET_ATTR(6), + DECLARE_TRANSCEIVER_RESET_ATTR(7), + DECLARE_TRANSCEIVER_RESET_ATTR(8), + DECLARE_TRANSCEIVER_RESET_ATTR(9), + DECLARE_TRANSCEIVER_RESET_ATTR(10), + DECLARE_TRANSCEIVER_RESET_ATTR(11), + DECLARE_TRANSCEIVER_RESET_ATTR(12), + DECLARE_TRANSCEIVER_RESET_ATTR(13), + DECLARE_TRANSCEIVER_RESET_ATTR(14), + DECLARE_TRANSCEIVER_RESET_ATTR(15), + DECLARE_TRANSCEIVER_RESET_ATTR(16), + NULL +}; + +static const struct attribute_group as9716_32d_cpld1_group = { + .attrs = as9716_32d_cpld1_attributes, +}; + +static struct attribute *as9716_32d_cpld2_attributes[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_access.dev_attr.attr, + DECLARE_TRANSCEIVER_PRESENT_ATTR(17), + DECLARE_TRANSCEIVER_PRESENT_ATTR(18), + DECLARE_TRANSCEIVER_PRESENT_ATTR(19), + DECLARE_TRANSCEIVER_PRESENT_ATTR(20), + DECLARE_TRANSCEIVER_PRESENT_ATTR(21), + DECLARE_TRANSCEIVER_PRESENT_ATTR(22), + DECLARE_TRANSCEIVER_PRESENT_ATTR(23), + DECLARE_TRANSCEIVER_PRESENT_ATTR(24), + DECLARE_TRANSCEIVER_PRESENT_ATTR(25), + DECLARE_TRANSCEIVER_PRESENT_ATTR(26), + DECLARE_TRANSCEIVER_PRESENT_ATTR(27), + DECLARE_TRANSCEIVER_PRESENT_ATTR(28), + DECLARE_TRANSCEIVER_PRESENT_ATTR(29), + DECLARE_TRANSCEIVER_PRESENT_ATTR(30), + DECLARE_TRANSCEIVER_PRESENT_ATTR(31), + DECLARE_TRANSCEIVER_PRESENT_ATTR(32), + DECLARE_TRANSCEIVER_PRESENT_ATTR(33), + DECLARE_TRANSCEIVER_PRESENT_ATTR(34), + DECLARE_SFP_TRANSCEIVER_ATTR(33), + DECLARE_SFP_TRANSCEIVER_ATTR(34), + DECLARE_TRANSCEIVER_RESET_ATTR(17), + DECLARE_TRANSCEIVER_RESET_ATTR(18), + DECLARE_TRANSCEIVER_RESET_ATTR(19), + DECLARE_TRANSCEIVER_RESET_ATTR(20), + DECLARE_TRANSCEIVER_RESET_ATTR(21), + DECLARE_TRANSCEIVER_RESET_ATTR(22), + DECLARE_TRANSCEIVER_RESET_ATTR(23), + DECLARE_TRANSCEIVER_RESET_ATTR(24), + DECLARE_TRANSCEIVER_RESET_ATTR(25), + DECLARE_TRANSCEIVER_RESET_ATTR(26), + DECLARE_TRANSCEIVER_RESET_ATTR(27), + DECLARE_TRANSCEIVER_RESET_ATTR(28), + DECLARE_TRANSCEIVER_RESET_ATTR(29), + DECLARE_TRANSCEIVER_RESET_ATTR(30), + DECLARE_TRANSCEIVER_RESET_ATTR(31), + DECLARE_TRANSCEIVER_RESET_ATTR(32), + NULL +}; + +static const struct attribute_group as9716_32d_cpld2_group = { + .attrs = as9716_32d_cpld2_attributes, +}; + + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as9716_32d_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0, revert = 0; + + switch (attr->index) { + case MODULE_PRESENT_1 ... MODULE_PRESENT_8: + reg = 0x12; + mask = 0x1 << (attr->index - MODULE_PRESENT_1); + break; + case MODULE_PRESENT_9 ... MODULE_PRESENT_16: + reg = 0x13; + mask = 0x1 << (attr->index - MODULE_PRESENT_9); + break; + case MODULE_PRESENT_17 ... MODULE_PRESENT_24: + reg = 0x12; + mask = 0x1 << (attr->index - MODULE_PRESENT_17); + break; + case MODULE_PRESENT_25 ... MODULE_PRESENT_32: + reg = 0x13; + mask = 0x1 << (attr->index - MODULE_PRESENT_25); + break; + case MODULE_PRESENT_33: + reg = 0x20; + mask = 0x1; + break; + case MODULE_PRESENT_34: + reg = 0x20; + mask = 0x8; + break; + case MODULE_RXLOS_33: + reg = 0x20; + mask = 0x2; + break; + case MODULE_RXLOS_34: + reg = 0x20; + mask = 0x10; + break; + case MODULE_TXDISABLE_33: + reg = 0x21; + mask = 0x1; + break; + case MODULE_TXDISABLE_34: + reg = 0x21; + mask = 0x2; + break; + + default: + return 0; + } + + if (attr->index >= MODULE_PRESENT_1 && attr->index <= MODULE_PRESENT_34) { + revert = 1; + } + + mutex_lock(&data->update_lock); + status = as9716_32d_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", revert ? !(status & mask) : !!(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as9716_32d_cpld_data *data = i2c_get_clientdata(client); + long disable; + int status; + u8 reg = 0, mask = 0; + + status = kstrtol(buf, 10, &disable); + if (status) { + return status; + } + + switch (attr->index) { + case MODULE_TXDISABLE_33: + reg = 0x21; + mask = 0x1; + break; + case MODULE_TXDISABLE_34: + reg = 0x21; + mask = 0x2; + break; + default: + return 0; + } + + /* Read current status */ + mutex_lock(&data->update_lock); + status = as9716_32d_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update tx_disable status */ + if (disable) { + status |= mask; + } + else { + status &= ~mask; + } + + status = as9716_32d_cpld_write_internal(client, reg, status); + if (unlikely(status < 0)) { + goto exit; + } + + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct as9716_32d_cpld_data *data = i2c_get_clientdata(client); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = as9716_32d_cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static void as9716_32d_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as9716_32d_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, 0x1); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_mode_reset(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as9716_32d_cpld_data *data = i2c_get_clientdata(client); + int status = 0; + u8 reg = 0, mask = 0; + + switch (attr->index) { + case MODULE_RESET_1 ... MODULE_RESET_8: + reg = 0x14; + mask = 0x1 << (attr->index - MODULE_RESET_1); + break; + case MODULE_RESET_9 ... MODULE_RESET_16: + reg = 0x15; + mask = 0x1 << (attr->index - MODULE_RESET_9); + break; + case MODULE_RESET_17 ... MODULE_RESET_24: + reg = 0x14; + mask = 0x1 << (attr->index - MODULE_RESET_17); + break; + case MODULE_RESET_25 ... MODULE_RESET_32: + reg = 0x15; + mask = 0x1 << (attr->index - MODULE_RESET_25); + break; + default: + return 0; + } + + + mutex_lock(&data->update_lock); + status = as9716_32d_cpld_read_internal(client, reg); + + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\r\n", !(status & mask)); + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct as9716_32d_cpld_data *data = i2c_get_clientdata(client); + long reset; + int status=0, val, error; + u8 reg = 0, mask = 0; + + + error = kstrtol(buf, 10, &reset); + if (error) { + return error; + } + + switch (attr->index) { + case MODULE_RESET_1 ... MODULE_RESET_8: + reg = 0x14; + mask = 0x1 << (attr->index - MODULE_RESET_1); + break; + case MODULE_RESET_9 ... MODULE_RESET_16: + reg = 0x15; + mask = 0x1 << (attr->index - MODULE_RESET_9); + break; + case MODULE_RESET_17 ... MODULE_RESET_24: + reg = 0x14; + mask = 0x1 << (attr->index - MODULE_RESET_17); + break; + case MODULE_RESET_25 ... MODULE_RESET_32: + reg = 0x15; + mask = 0x1 << (attr->index - MODULE_RESET_25); + break; + default: + return 0; + } + mutex_lock(&data->update_lock); + + status = as9716_32d_cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + /* Update lp_mode status */ + if (reset) + { + val = status&(~mask); + } + else + { + val =status | (mask); + } + + status = as9716_32d_cpld_write_internal(client, reg, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + + + +/* + * I2C init/probing/exit functions + */ +static int as9716_32d_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + struct as9716_32d_cpld_data *data; + int ret = -ENODEV; + int status; + const struct attribute_group *group = NULL; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + goto exit; + + data = kzalloc(sizeof(struct as9716_32d_cpld_data), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->type = id->driver_data; + + + /* Register sysfs hooks */ + switch (data->type) { + case as9716_32d_fpga: + group = &as9716_32d_fpga_group; + break; + case as9716_32d_cpld1: + group = &as9716_32d_cpld1_group; + break; + case as9716_32d_cpld2: + group = &as9716_32d_cpld2_group; + break; + case as9716_32d_cpld_cpu: + /* Disable CPLD reset to avoid DUT will be reset. + */ + status=as9716_32d_cpld_write_internal(client, 0x3, 0x0); + if (status < 0) + { + dev_dbg(&client->dev, "cpu_cpld reg 0x65 err %d\n", status); + } + default: + break; + } + + if (group) { + ret = sysfs_create_group(&client->dev.kobj, group); + if (ret) { + goto exit_free; + } + } + + as9716_32d_cpld_add_client(client); + return 0; + +exit_free: + kfree(data); +exit: + return ret; +} + +static int as9716_32d_cpld_remove(struct i2c_client *client) +{ + struct as9716_32d_cpld_data *data = i2c_get_clientdata(client); + const struct attribute_group *group = NULL; + + as9716_32d_cpld_remove_client(client); + + /* Remove sysfs hooks */ + switch (data->type) { + case as9716_32d_fpga: + group = &as9716_32d_fpga_group; + break; + case as9716_32d_cpld1: + group = &as9716_32d_cpld1_group; + break; + case as9716_32d_cpld2: + group = &as9716_32d_cpld2_group; + break; + default: + break; + } + + if (group) { + sysfs_remove_group(&client->dev.kobj, group); + } + + kfree(data); + + return 0; +} + +static int as9716_32d_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int as9716_32d_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +int as9716_32d_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as9716_32d_cpld_read_internal(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as9716_32d_cpld_read); + +int as9716_32d_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = as9716_32d_cpld_write_internal(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as9716_32d_cpld_write); + +static struct i2c_driver as9716_32d_cpld_driver = { + .driver = { + .name = "as9716_32d_cpld", + .owner = THIS_MODULE, + }, + .probe = as9716_32d_cpld_probe, + .remove = as9716_32d_cpld_remove, + .id_table = as9716_32d_cpld_id, +}; + +static int __init as9716_32d_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as9716_32d_cpld_driver); +} + +static void __exit as9716_32d_cpld_exit(void) +{ + i2c_del_driver(&as9716_32d_cpld_driver); +} + +MODULE_AUTHOR("Jostar Yang "); +MODULE_DESCRIPTION("Accton I2C CPLD driver"); +MODULE_LICENSE("GPL"); + +module_init(as9716_32d_cpld_init); +module_exit(as9716_32d_cpld_exit); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_fan.c b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_fan.c new file mode 100755 index 00000000000..4d2433e7981 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_fan.c @@ -0,0 +1,760 @@ +/* + * A hwmon driver for the Accton as9716 32d fan + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as9716_32d_fan" + +#define NUM_THERMAL_SENSORS (7) /* Get sum of this number of sensors.*/ +#define THERMAL_SENSORS_DRIVER "lm75" +#define THERMAL_SENSORS_ADDRS {0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4c , 0x4e} + +static struct as9716_32d_fan_data *as9716_32d_fan_update_device(struct device *dev); +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, char *buf); + +/* fan related data, the index should match sysfs_fan_attributes + */ +static const u8 fan_reg[] = { + 0x0F, /* fan 1-6 present status */ + 0x10, /* fan 1-6 direction(0:F2B 1:B2F) */ + 0x11, /* fan PWM(for all fan) */ + 0x12, /* front fan 1 speed(rpm) */ + 0x13, /* front fan 2 speed(rpm) */ + 0x14, /* front fan 3 speed(rpm) */ + 0x15, /* front fan 4 speed(rpm) */ + 0x16, /* front fan 5 speed(rpm) */ + 0x17, /* front fan 6 speed(rpm) */ + 0x22, /* rear fan 1 speed(rpm) */ + 0x23, /* rear fan 2 speed(rpm) */ + 0x24, /* rear fan 3 speed(rpm) */ + 0x25, /* rear fan 4 speed(rpm) */ + 0x26, /* rear fan 5 speed(rpm) */ + 0x27, /* rear fan 6 speed(rpm) */ +}; + +/* Each client has this additional data */ +struct as9716_32d_fan_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ + int system_temp; /*In unit of mini-Celsius*/ + int sensors_found; +}; + +enum fan_id { + FAN1_ID, + FAN2_ID, + FAN3_ID, + FAN4_ID, + FAN5_ID, + FAN6_ID +}; + +enum sysfs_fan_attributes { + FAN_PRESENT_REG, + FAN_DIRECTION_REG, + FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ + FAN1_FRONT_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN5_FRONT_SPEED_RPM, + FAN6_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN5_REAR_SPEED_RPM, + FAN6_REAR_SPEED_RPM, + FAN1_DIRECTION, + FAN2_DIRECTION, + FAN3_DIRECTION, + FAN4_DIRECTION, + FAN5_DIRECTION, + FAN6_DIRECTION, + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN5_PRESENT, + FAN6_PRESENT, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + FAN5_FAULT, + FAN6_FAULT +}; + +/* Define attributes + */ +#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT);\ + static SENSOR_DEVICE_ATTR(fan##index2##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT) + +#define DECLARE_FAN_FAULT_ATTR(index, index2) &sensor_dev_attr_fan##index##_fault.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_fault.dev_attr.attr + + +#define DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_direction, S_IRUGO, fan_show_value, NULL, FAN##index##_DIRECTION) +#define DECLARE_FAN_DIRECTION_ATTR(index) &sensor_dev_attr_fan##index##_direction.dev_attr.attr + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN##index##_DUTY_CYCLE_PERCENTAGE) +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan##index##_duty_cycle_percentage.dev_attr.attr + +#define DECLARE_FAN_SYSTEM_TEMP_SENSOR_DEV_ATTR() \ + static SENSOR_DEVICE_ATTR(sys_temp, S_IRUGO, get_sys_temp, NULL, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_SYSTEM_TEMP_ATTR() &sensor_dev_attr_sys_temp.dev_attr.attr + +#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_present, S_IRUGO, fan_show_value, NULL, FAN##index##_PRESENT) +#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr + +#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index2##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM) +#define DECLARE_FAN_SPEED_RPM_ATTR(index, index2) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_input.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_input.dev_attr.attr + +/* 6 fan fault attributes in this platform */ +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(6,16); + +/* 6 fan speed(rpm) attributes in this platform */ +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4,14); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(5,15); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(6,16); +/* 6 fan present attributes in this platform */ +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(5); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(6); +/* 6 fan direction attribute in this platform */ +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(1); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(2); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(3); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(4); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(5); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(6); +/* 1 fan duty cycle attribute in this platform */ +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(); +/* System temperature for fancontrol */ +DECLARE_FAN_SYSTEM_TEMP_SENSOR_DEV_ATTR(); + +static struct attribute *as9716_32d_fan_attributes[] = { + /* fan related attributes */ + DECLARE_FAN_FAULT_ATTR(1,11), + DECLARE_FAN_FAULT_ATTR(2,12), + DECLARE_FAN_FAULT_ATTR(3,13), + DECLARE_FAN_FAULT_ATTR(4,14), + DECLARE_FAN_FAULT_ATTR(5,15), + DECLARE_FAN_FAULT_ATTR(6,16), + DECLARE_FAN_SPEED_RPM_ATTR(1,11), + DECLARE_FAN_SPEED_RPM_ATTR(2,12), + DECLARE_FAN_SPEED_RPM_ATTR(3,13), + DECLARE_FAN_SPEED_RPM_ATTR(4,14), + DECLARE_FAN_SPEED_RPM_ATTR(5,15), + DECLARE_FAN_SPEED_RPM_ATTR(6,16), + DECLARE_FAN_PRESENT_ATTR(1), + DECLARE_FAN_PRESENT_ATTR(2), + DECLARE_FAN_PRESENT_ATTR(3), + DECLARE_FAN_PRESENT_ATTR(4), + DECLARE_FAN_PRESENT_ATTR(5), + DECLARE_FAN_PRESENT_ATTR(6), + DECLARE_FAN_DIRECTION_ATTR(1), + DECLARE_FAN_DIRECTION_ATTR(2), + DECLARE_FAN_DIRECTION_ATTR(3), + DECLARE_FAN_DIRECTION_ATTR(4), + DECLARE_FAN_DIRECTION_ATTR(5), + DECLARE_FAN_DIRECTION_ATTR(6), + DECLARE_FAN_DUTY_CYCLE_ATTR(), + DECLARE_FAN_SYSTEM_TEMP_ATTR(), + NULL +}; + +#define FAN_DUTY_CYCLE_REG_MASK 0xF +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 100 + +static int as9716_32d_fan_read_value(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int as9716_32d_fan_write_value(struct i2c_client *client, u8 reg, u8 value) +{ + return i2c_smbus_write_byte_data(client, reg, value); +} + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + reg_val &= FAN_DUTY_CYCLE_REG_MASK; + return ((u32)(reg_val+1) * 625 + 75)/ 100; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + return ((u32)duty_cycle * 100 / 625) - 1; +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static u8 reg_val_to_direction(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 1 : 0; +} +static u8 reg_val_to_is_present(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 0 : 1; +} + +static u8 is_fan_fault(struct as9716_32d_fan_data *data, enum fan_id id) +{ + u8 ret = 1; + int front_fan_index = FAN1_FRONT_SPEED_RPM + id; + int rear_fan_index = FAN1_REAR_SPEED_RPM + id; + + /* Check if the speed of front or rear fan is ZERO, + */ + if (reg_val_to_speed_rpm(data->reg_val[front_fan_index]) && + reg_val_to_speed_rpm(data->reg_val[rear_fan_index])) { + ret = 0; + } + + return ret; +} + +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + struct i2c_client *client = to_i2c_client(dev); + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0 || value > FAN_MAX_DUTY_CYCLE) + return -EINVAL; + + as9716_32d_fan_write_value(client, 0x33, 0); /* Disable fan speed watch dog */ + as9716_32d_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); + return count; +} + +/* Due to this struct is declared at lm75.c, it cannot be include + * under Sonic environment. I duplicate it from lm75.c. + */ +struct lm75_data { + struct i2c_client *client; + struct device *hwmon_dev; + struct thermal_zone_device *tz; + struct mutex update_lock; + u8 orig_conf; + u8 resolution; /* In bits, between 9 and 12 */ + u8 resolution_limits; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + unsigned long sample_time; /* In jiffies */ + s16 temp[3]; /* Register values, + 0 = input + 1 = max + 2 = hyst */ +}; + +/*Copied from lm75.c*/ +static inline long lm75_reg_to_mc(s16 temp, u8 resolution) +{ + return ((temp >> (16 - resolution)) * 1000) >> (resolution - 8); +} + +/*Get hwmon_dev from i2c_client, set hwmon_dev = NULL is failed.*/ +static struct device * get_hwmon_dev( + struct i2c_client *client) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + if(data) + { + if( data->valid == 1 && data->hwmon_dev) + { + return data->hwmon_dev; + } + + } + return NULL; +} + +/* To find hwmon index by opening hwmon under that i2c address. + */ +static int find_hwmon_index_by_FileOpen( + int bus_nr, + unsigned short addr, + int *index) +{ +#define MAX_HWMON_DEVICE (10) /* Find hwmon device in 0~10*/ + struct file *sfd; + char client_name[96]; + int i=0; + + do { + snprintf(client_name, sizeof(client_name), + "/sys/bus/i2c/devices/%d-%04x/hwmon/hwmon%d/temp1_input", + bus_nr, addr, i); + + sfd = filp_open(client_name, O_RDONLY, 0); + i++; + } while( IS_ERR(sfd) && i < MAX_HWMON_DEVICE); + + if (IS_ERR(sfd)) { + pr_err("Failed to open file(%s)#%d\r\n", client_name, __LINE__); + return -ENOENT; + } + filp_close(sfd, 0); + *index = i - 1; + return 0; + +#undef MAX_HWMON_DEVICE +} + +static int get_temp_file_path( + int bus_nr, unsigned short addr, + struct device *hwmon_dev + ,char *path, int max_len) +{ + + if(hwmon_dev && strlen(dev_name(hwmon_dev))) + { + snprintf(path, max_len, + "/sys/bus/i2c/devices/%d-%04x/hwmon/%s/temp1_input", + bus_nr, addr, dev_name(hwmon_dev)); + } + else + { + int i=0; + if(find_hwmon_index_by_FileOpen( bus_nr, addr, &i)) + { + return -EIO; + } + snprintf(path, max_len, + "/sys/bus/i2c/devices/%d-%04x/hwmon/hwmon%d/temp1_input", + bus_nr, addr, i); + } + + return 0; +} + +/*File read the dev file at user space.*/ +static int read_devfile_temp1_input( + struct device *dev, + int bus_nr, + unsigned short addr, + struct device *hwmon_dev, + int *miniCelsius) +{ + struct file *sfd; + char buffer[96]; + char devfile[96]; + int rc, status; + int rdlen, value; + mm_segment_t old_fs; + + rc = 0; + get_temp_file_path(bus_nr, addr, hwmon_dev, devfile, sizeof(devfile)); + sfd = filp_open(devfile, O_RDONLY, 0); + if (IS_ERR(sfd)) { + pr_err("Failed to open file(%s)#%d\r\n", devfile, __LINE__); + return -ENOENT; + } + dev_dbg(dev, "Found device:%s\n",devfile); + + if(!(sfd->f_op) || !(sfd->f_op->read) ) { + pr_err("file %s cann't readable ?\n",devfile); + return -ENOENT; + } + + old_fs = get_fs(); + set_fs(KERNEL_DS); + rdlen = sfd->f_op->read(sfd, buffer, sizeof(buffer), &sfd->f_pos); + if (rdlen == 0) { + pr_err( "File(%s) empty!\n", devfile); + rc = -EIO; + goto exit; + } + status = sscanf(buffer, "%d", &value); + if (status != 1) { + rc = -EIO; + goto exit; + } + *miniCelsius = value; + dev_dbg(dev,"found sensors: %d @i2c %d-%04x\n", value, bus_nr, addr); + +exit: + set_fs(old_fs); + filp_close(sfd, 0); + return rc; +} + +static u8 is_lm75_data_due(struct i2c_client *client) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + if (time_after(jiffies, data->last_updated + data->sample_time)) + { + return 1; + } + return 0; +} +static int get_lm75_temp(struct i2c_client *client, int *miniCelsius) +{ + struct lm75_data *data = NULL; + + data = i2c_get_clientdata(client); + *miniCelsius = lm75_reg_to_mc(data->temp[0], data->resolution); + + return 0; +} + +static bool lm75_addr_mached(unsigned short addr) +{ + int i; + unsigned short addrs[] = THERMAL_SENSORS_ADDRS; + + for (i = 0; i < ARRAY_SIZE(addrs); i++) + { + if( addr == addrs[i]) + return 1; + } + return 0; +} + +static int _find_lm75_device(struct device *dev, void *data) +{ + struct device_driver *driver; + struct as9716_32d_fan_data *prv = data; + char *driver_name = THERMAL_SENSORS_DRIVER; + + driver = dev->driver; + if (driver && driver->name && + strcmp(driver->name, driver_name) == 0) + { + struct i2c_client *client; + client = to_i2c_client(dev); + if (client) + { + /*cannot use "struct i2c_adapter *adap = to_i2c_adapter(dev);"*/ + struct i2c_adapter *adap = client->adapter; + int miniCelsius = 0; + + if (! lm75_addr_mached(client->addr)) + { + return 0; + } + + if (!adap) { + return -ENXIO; + } + + /* If the data is not updated, read them from devfile + to drive them updateing data from chip.*/ + if (is_lm75_data_due(client)) + { + struct device *hwmon_dev; + + hwmon_dev = get_hwmon_dev(client); + if(0 == read_devfile_temp1_input(dev, adap->nr, + client->addr, hwmon_dev, &miniCelsius)) + { + prv->system_temp += miniCelsius; + prv->sensors_found++; + } + + } + else + { + get_lm75_temp(client, &miniCelsius); + prv->system_temp += miniCelsius; + prv->sensors_found++; + + } + } + } + return 0; +} + +/*Find all lm75 devices and return sum of temperatures.*/ +static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + ssize_t ret = 0; + struct as9716_32d_fan_data *data = as9716_32d_fan_update_device(dev); + + data->system_temp=0; + data->sensors_found=0; + i2c_for_each_dev(data, _find_lm75_device); + if (NUM_THERMAL_SENSORS != data->sensors_found) + { + dev_dbg(dev,"only %d of %d temps are found\n", + data->sensors_found, NUM_THERMAL_SENSORS); + data->system_temp = INT_MAX; + } + ret = sprintf(buf, "%d\n",data->system_temp); + return ret; +} + +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as9716_32d_fan_data *data = as9716_32d_fan_update_device(dev); + ssize_t ret = 0; + + if (data->valid) { + switch (attr->index) { + case FAN_DUTY_CYCLE_PERCENTAGE: + { + u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); + ret = sprintf(buf, "%u\n", duty_cycle); + break; + } + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN5_FRONT_SPEED_RPM: + case FAN6_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: + case FAN6_REAR_SPEED_RPM: + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index])); + break; + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + case FAN6_PRESENT: + ret = sprintf(buf, "%d\n", + reg_val_to_is_present(data->reg_val[FAN_PRESENT_REG], + attr->index - FAN1_PRESENT)); + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + case FAN6_FAULT: + ret = sprintf(buf, "%d\n", is_fan_fault(data, attr->index - FAN1_FAULT)); + break; + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + case FAN5_DIRECTION: + case FAN6_DIRECTION: + ret = sprintf(buf, "%d\n", + reg_val_to_direction(data->reg_val[FAN_DIRECTION_REG], + attr->index - FAN1_DIRECTION)); + break; + default: + break; + } + } + + return ret; +} + +static const struct attribute_group as9716_32d_fan_group = { + .attrs = as9716_32d_fan_attributes, +}; + +static struct as9716_32d_fan_data *as9716_32d_fan_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as9716_32d_fan_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + dev_dbg(&client->dev, "Starting as9716_32d_fan update\n"); + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { + int status = as9716_32d_fan_read_value(client, fan_reg[i]); + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + dev_dbg(&client->dev, "reg %d, err %d\n", fan_reg[i], status); + return data; + } + else { + data->reg_val[i] = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int as9716_32d_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as9716_32d_fan_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as9716_32d_fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as9716_32d_fan_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as9716_32d_fan_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as9716_32d_fan_remove(struct i2c_client *client) +{ + struct as9716_32d_fan_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as9716_32d_fan_group); + + return 0; +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x66, I2C_CLIENT_END }; + +static const struct i2c_device_id as9716_32d_fan_id[] = { + { "as9716_32d_fan", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as9716_32d_fan_id); + +static struct i2c_driver as9716_32d_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = as9716_32d_fan_probe, + .remove = as9716_32d_fan_remove, + .id_table = as9716_32d_fan_id, + .address_list = normal_i2c, +}; + +module_i2c_driver(as9716_32d_fan_driver); + +MODULE_AUTHOR("Jostar Yang "); +MODULE_DESCRIPTION("as9716_32d_fan driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_leds.c b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_leds.c new file mode 100755 index 00000000000..0fd28a4631b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_leds.c @@ -0,0 +1,492 @@ +/* + * A LED driver for the accton_as9716_32d_led + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +extern int as9716_32d_cpld_read (unsigned short cpld_addr, u8 reg); +extern int as9716_32d_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +#define DRVNAME "accton_as9716_32d_led" + +struct accton_as9716_32d_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[2]; /* only 1 register*/ +}; + +static struct accton_as9716_32d_led_data *ledctl = NULL; + +/* LED related data + */ + +#define LED_CNTRLER_I2C_ADDRESS (0x61) + +#define LED_TYPE_DIAG_REG_MASK (0x1|0x2|0x4) +#define LED_MODE_DIAG_GREEN_VALUE (0x01) +#define LED_MODE_DIAG_AMBER_VALUE (0x02) /*It's yellow actually. Green+Red=Yellow*/ +#define LED_MODE_DIAG_GREEN_BLINK_VALUE (0x04) +#define LED_MODE_DIAG_OFF_VALUE (0x0) + + +#define LED_TYPE_LOC_REG_MASK (0x80|0x40) +#define LED_MODE_LOC_GREEN_BLIKN_VALUE 0x80 +#define LED_MODE_LOC_AMBER_VALUE 0x40 +#define LED_MODE_LOC_OFF_VALUE (0x0) + +#define LED_TYPE_FAN_REG_MASK (0x20|0x10) +#define LED_MODE_FAN_AMBER_VALUE 0x20 +#define LED_MODE_FAN_GREEN_VALUE 0x10 +#define LED_MODE_FAN_OFF_VALUE (0x0) + +#define LED_TYPE_PSU2_REG_MASK (0x8|0x4) +#define LED_MODE_PSU2_AMBER_VALUE 0x8 +#define LED_MODE_PSU2_GREEN_VALUE 0x4 +#define LED_MODE_PSU2_OFF_VALUE (0x0) + +#define LED_TYPE_PSU1_REG_MASK (0x2|0x1) +#define LED_MODE_PSU1_AMBER_VALUE 0x2 +#define LED_MODE_PSU1_GREEN_VALUE 0x1 +#define LED_MODE_PSU1_OFF_VALUE (0x0) + +enum led_type { + LED_TYPE_DIAG, + LED_TYPE_LOC, + LED_TYPE_FAN, + LED_TYPE_PSU1, + LED_TYPE_PSU2 +}; + +struct led_reg { + u32 types; + u8 reg_addr; +}; + +static const struct led_reg led_reg_map[] = { + {(1<update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as9716_32d_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = accton_as9716_32d_led_read_value(led_reg_map[i].reg_addr); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg_map[i].reg_addr, status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void accton_as9716_32d_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + enum led_type type) +{ + int reg_val; + u8 reg ; + mutex_lock(&ledctl->update_lock); + + if( !accton_getLedReg(type, ®)) + { + dev_dbg(&ledctl->pdev->dev, "Not match item for %d.\n", type); + } + + reg_val = accton_as9716_32d_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + + accton_as9716_32d_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + + +static void accton_as9716_32d_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as9716_32d_led_set(led_cdev, led_light_mode, LED_TYPE_DIAG); +} + +static enum led_brightness accton_as9716_32d_led_diag_get(struct led_classdev *cdev) +{ + accton_as9716_32d_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void accton_as9716_32d_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as9716_32d_led_set(led_cdev, led_light_mode, LED_TYPE_LOC); +} + +static enum led_brightness accton_as9716_32d_led_loc_get(struct led_classdev *cdev) +{ + accton_as9716_32d_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[1]); +} + +static void accton_as9716_32d_led_fan_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as9716_32d_led_set(led_cdev, led_light_mode, LED_TYPE_FAN); +} + +static enum led_brightness accton_as9716_32d_led_fan_get(struct led_classdev *cdev) +{ + accton_as9716_32d_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_FAN, ledctl->reg_val[1]); +} + +static void accton_as9716_32d_led_psu1_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as9716_32d_led_set(led_cdev, led_light_mode, LED_TYPE_PSU1); +} + +static enum led_brightness accton_as9716_32d_led_psu1_get(struct led_classdev *cdev) +{ + accton_as9716_32d_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU1, ledctl->reg_val[1]); +} + +static void accton_as9716_32d_led_psu2_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + accton_as9716_32d_led_set(led_cdev, led_light_mode, LED_TYPE_PSU2); +} + +static enum led_brightness accton_as9716_32d_led_psu2_get(struct led_classdev *cdev) +{ + accton_as9716_32d_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU2, ledctl->reg_val[1]); +} + +static struct led_classdev accton_as9716_32d_leds[] = { + [LED_TYPE_DIAG] = { + .name = "accton_as9716_32d_led::diag", + .default_trigger = "unused", + .brightness_set = accton_as9716_32d_led_diag_set, + .brightness_get = accton_as9716_32d_led_diag_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_GREEN_BLINK, + }, + [LED_TYPE_LOC] = { + .name = "accton_as9716_32d_led::loc", + .default_trigger = "unused", + .brightness_set = accton_as9716_32d_led_loc_set, + .brightness_get = accton_as9716_32d_led_loc_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_GREEN_BLINK, + }, + [LED_TYPE_FAN] = { + .name = "accton_as9716_32d_led::fan", + .default_trigger = "unused", + .brightness_set = accton_as9716_32d_led_fan_set, + .brightness_get = accton_as9716_32d_led_fan_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AMBER, + }, + [LED_TYPE_PSU1] = { + .name = "accton_as9716_32d_led::psu1", + .default_trigger = "unused", + .brightness_set = accton_as9716_32d_led_psu1_set, + .brightness_get = accton_as9716_32d_led_psu1_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AMBER, + }, + [LED_TYPE_PSU2] = { + .name = "accton_as9716_32d_led::psu2", + .default_trigger = "unused", + .brightness_set = accton_as9716_32d_led_psu2_set, + .brightness_get = accton_as9716_32d_led_psu2_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AMBER, + }, +}; + +static int accton_as9716_32d_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as9716_32d_leds); i++) { + led_classdev_suspend(&accton_as9716_32d_leds[i]); + } + + return 0; +} + +static int accton_as9716_32d_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(accton_as9716_32d_leds); i++) { + led_classdev_resume(&accton_as9716_32d_leds[i]); + } + + return 0; +} + +static int accton_as9716_32d_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(accton_as9716_32d_leds); i++) { + ret = led_classdev_register(&pdev->dev, &accton_as9716_32d_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(accton_as9716_32d_leds)) { + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&accton_as9716_32d_leds[i]); + } + } + + return ret; +} + +static int accton_as9716_32d_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(accton_as9716_32d_leds); i++) { + led_classdev_unregister(&accton_as9716_32d_leds[i]); + } + + return 0; +} + +static struct platform_driver accton_as9716_32d_led_driver = { + .probe = accton_as9716_32d_led_probe, + .remove = accton_as9716_32d_led_remove, + .suspend = accton_as9716_32d_led_suspend, + .resume = accton_as9716_32d_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init accton_as9716_32d_led_init(void) +{ + int ret; + + ret = platform_driver_register(&accton_as9716_32d_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct accton_as9716_32d_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&accton_as9716_32d_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&accton_as9716_32d_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return ret; +} + +static void __exit accton_as9716_32d_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&accton_as9716_32d_led_driver); + kfree(ledctl); +} + +module_init(accton_as9716_32d_led_init); +module_exit(accton_as9716_32d_led_exit); + +MODULE_AUTHOR("Jostar Yang "); +MODULE_DESCRIPTION("accton_as9716_32d_led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_psu.c b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_psu.c new file mode 100755 index 00000000000..06e8e23c3c5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_psu.c @@ -0,0 +1,311 @@ +/* + * An hwmon driver for accton as9716_32d Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_MODEL_NAME 16 +#define MAX_SERIAL_NUMBER 19 + +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_string(struct device *dev, struct device_attribute *da, char *buf); +static int as9716_32d_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as9716_32d_cpld_read(unsigned short cpld_addr, u8 reg); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x50, 0x51, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as9716_32d_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[MAX_MODEL_NAME]; /* Model name, read from eeprom */ + char serial_number[MAX_SERIAL_NUMBER]; +}; + +static struct as9716_32d_psu_data *as9716_32d_psu_update_device(struct device *dev); + +enum as9716_32d_psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD, + PSU_SERIAL_NUMBER +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_string, NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu_serial_number, S_IRUGO, show_string, NULL, PSU_SERIAL_NUMBER); + + +static struct attribute *as9716_32d_psu_attributes[] = { + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + &sensor_dev_attr_psu_serial_number.dev_attr.attr, + NULL +}; + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as9716_32d_psu_data *data = as9716_32d_psu_update_device(dev); + u8 status = 0; + + if (attr->index == PSU_PRESENT) { + status = !(data->status >> (1-data->index) & 0x1); + } + else { /* PSU_POWER_GOOD */ + status = (data->status >> (3-data->index) & 0x1); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_string(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as9716_32d_psu_data *data = as9716_32d_psu_update_device(dev); + char *ptr = NULL; + + if (!data->valid) { + return -EIO; + } + + switch (attr->index) { + case PSU_MODEL_NAME: + ptr = data->model_name; + break; + case PSU_SERIAL_NUMBER: + ptr = data->serial_number; + break; + default: + return -EINVAL; + } + + return sprintf(buf, "%s\n", ptr); +} + +static const struct attribute_group as9716_32d_psu_group = { + .attrs = as9716_32d_psu_attributes, +}; + +static int as9716_32d_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as9716_32d_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as9716_32d_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as9716_32d_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as9716_32d_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as9716_32d_psu_remove(struct i2c_client *client) +{ + struct as9716_32d_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as9716_32d_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as9716_32d_psu1, + as9716_32d_psu2 +}; + +static const struct i2c_device_id as9716_32d_psu_id[] = { + { "as9716_32d_psu1", as9716_32d_psu1 }, + { "as9716_32d_psu2", as9716_32d_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as9716_32d_psu_id); + +static struct i2c_driver as9716_32d_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as9716_32d_psu", + }, + .probe = as9716_32d_psu_probe, + .remove = as9716_32d_psu_remove, + .id_table = as9716_32d_psu_id, + .address_list = normal_i2c, +}; + +static int as9716_32d_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = 0; + int retry_count = 5; + + while (retry_count) { + retry_count--; + + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) { + msleep(10); + continue; + } + + if (unlikely(result != data_len)) { + result = -EIO; + msleep(10); + continue; + } + + result = 0; + break; + } + + return result; +} + +static struct as9716_32d_psu_data *as9716_32d_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as9716_32d_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status; + int power_good = 0; + + dev_dbg(&client->dev, "Starting as9716_32d update\n"); + + /* Read psu status */ + status = as9716_32d_cpld_read(0x60, 0x3); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg 0x60 err %d\n", status); + } + else { + data->status = status; + } + + /* Read model name */ + memset(data->model_name, 0, sizeof(data->model_name)); + memset(data->serial_number, 0, sizeof(data->serial_number)); + power_good = (data->status >> (3-data->index) & 0x1); + + if (power_good) { + status = as9716_32d_psu_read_block(client, 0x20, data->model_name, + ARRAY_SIZE(data->model_name)-1); + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x)\n", client->addr); + } + else { + data->model_name[ARRAY_SIZE(data->model_name)-1] = '\0'; + + } + /* Read from offset 0x2e ~ 0x3d (16 bytes) */ + status = as9716_32d_psu_read_block(client, 0x2e,data->serial_number, MAX_SERIAL_NUMBER); + if (status < 0) + { + data->serial_number[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x) offset(0x2e)\n", client->addr); + } + data->serial_number[MAX_SERIAL_NUMBER-1]='\0'; + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(as9716_32d_psu_driver); + +MODULE_AUTHOR("Jostar Yang "); +MODULE_DESCRIPTION("as9716_32d_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_i2c_psu.c b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_i2c_psu.c new file mode 100755 index 00000000000..df7324de560 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_i2c_psu.c @@ -0,0 +1,602 @@ +/* + * An hwmon driver for the Accton Redundant Power Module + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_DESCRIPTION_NAME "accton i2c psu driver" +/* PMBus Protocol. */ +#define PMBUS_LITERAL_DATA_MULTIPLIER 1000 +#define PMBUS_REGISTER_VOUT_MODE 0x20 +#define PMBUS_REGISTER_STATUS_BYTE 0x78 +#define PMBUS_REGISTER_STATUS_WORD 0x79 +#define PMBUS_REGISTER_STATUS_FAN 0x81 +#define PMBUS_REGISTER_READ_VIN 0x88 +#define PMBUS_REGISTER_READ_IIN 0x89 +#define PMBUS_REGISTER_READ_VOUT 0x8B +#define PMBUS_REGISTER_READ_IOUT 0x8C +#define PMBUS_REGISTER_READ_TEMPERATURE_1 0x8D +#define PMBUS_REGISTER_READ_TEMPERATURE_2 0x8E +#define PMBUS_REGISTER_READ_TEMPERATURE_3 0x8F +#define PMBUS_REGISTER_READ_FAN_SPEED_1 0x90 +#define PMBUS_REGISTER_READ_FAN_SPEED_2 0x91 + +#define PMBUS_REGISTER_READ_FAN_CONFIG_1 0x3A +#define PMBUS_REGISTER_FAN_COMMAND_1 0x3B + +#define PMBUS_REGISTER_READ_POUT 0x96 +#define PMBUS_REGISTER_READ_PIN 0x97 +#define PMBUS_REGISTER_MFR_ID 0x99 +#define PMBUS_REGISTER_MFR_MODEL 0x9A +#define PMBUS_REGISTER_MFR_REVISION 0x9B +#define PMBUS_REGISTER_MFR_SERIAL 0x9E + + +#define MAX_FAN_DUTY_CYCLE 100 +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct accton_i2c_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 vout_mode; /* Register value */ + u16 v_in; /* Register value */ + u16 v_out; /* Register value */ + u16 i_in; /* Register value */ + u16 i_out; /* Register value */ + u16 p_in; /* Register value */ + u16 p_out; /* Register value */ + u16 temp_input[2]; /* Register value */ + u8 fan_fault; /* Register value */ + u16 fan_duty_cycle[2]; /* Register value */ + u16 fan_speed[2]; /* Register value */ + u8 pmbus_revision; /* Register value */ + u8 mfr_id[10]; /* Register value */ + u8 mfr_model[16]; /* Register value */ + u8 mfr_revsion[3]; /* Register value */ + u8 mfr_serial[26]; /* Register value */ +}; + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_vout(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +static ssize_t show_ascii(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_byte(struct device *dev, struct device_attribute *da, + char *buf); + +static int accton_i2c_psu_write_word(struct i2c_client *client, u8 reg, u16 value); +static struct accton_i2c_psu_data *accton_i2c_psu_update_device(struct device *dev); + +enum accton_i2c_psu_sysfs_attributes { + PSU_V_IN, + PSU_V_OUT, + PSU_I_IN, + PSU_I_OUT, + PSU_P_IN, + PSU_P_OUT_UV, + PSU_P_OUT, + PSU_TEMP1_INPUT, + PSU_FAN1_FAULT, + PSU_FAN1_DUTY_CYCLE, + PSU_FAN1_SPEED, + PSU_PMBUS_REVISION, + PSU_MFR_ID, + PSU_MFR_MODEL, + PSU_MFR_REVISION, + PSU_MFR_SERIAL, +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_v_in, S_IRUGO, show_linear, NULL, PSU_V_IN); +static SENSOR_DEVICE_ATTR(psu_v_out, S_IRUGO, show_vout, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(psu_i_in, S_IRUGO, show_linear, NULL, PSU_I_IN); +static SENSOR_DEVICE_ATTR(psu_i_out, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(psu_p_in, S_IRUGO, show_linear, NULL, PSU_P_IN); +static SENSOR_DEVICE_ATTR(psu_p_out, S_IRUGO, show_linear, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(psu_temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, show_linear, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(psu_pmbus_revision,S_IRUGO, show_byte, NULL, PSU_PMBUS_REVISION); +static SENSOR_DEVICE_ATTR(psu_mfr_id, S_IRUGO, show_ascii, NULL, PSU_MFR_ID); +static SENSOR_DEVICE_ATTR(psu_mfr_model, S_IRUGO, show_ascii, NULL, PSU_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu_mfr_revision, S_IRUGO, show_ascii, NULL, PSU_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu_mfr_serial, S_IRUGO, show_ascii, NULL, PSU_MFR_SERIAL); + + +/*Duplicate nodes for lm-sensors.*/ +static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_vout, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_linear, NULL, PSU_P_OUT_UV); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); +//static SENSOR_DEVICE_ATTR(temp1_fault, S_IRUGO, show_word, NULL, PSU_TEMP_FAULT); + + +static struct attribute *accton_i2c_psu_attributes[] = { + &sensor_dev_attr_psu_v_in.dev_attr.attr, + &sensor_dev_attr_psu_v_out.dev_attr.attr, + &sensor_dev_attr_psu_i_in.dev_attr.attr, + &sensor_dev_attr_psu_i_out.dev_attr.attr, + &sensor_dev_attr_psu_p_in.dev_attr.attr, + &sensor_dev_attr_psu_p_out.dev_attr.attr, + &sensor_dev_attr_psu_temp1_input.dev_attr.attr, + &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, + &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, + &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, + &sensor_dev_attr_psu_pmbus_revision.dev_attr.attr, + &sensor_dev_attr_psu_mfr_id.dev_attr.attr, + &sensor_dev_attr_psu_mfr_model.dev_attr.attr, + &sensor_dev_attr_psu_mfr_revision.dev_attr.attr, + &sensor_dev_attr_psu_mfr_serial.dev_attr.attr, + /*Duplicate nodes for lm-sensors.*/ + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_in3_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + //&sensor_dev_attr_temp1_fault.dev_attr.attr, + NULL +}; + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct accton_i2c_psu_data *data = i2c_get_clientdata(client); + int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; + long speed; + int error; + + error = kstrtol(buf, 10, &speed); + if (error) + return error; + + if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) + return -EINVAL; + + mutex_lock(&data->update_lock); + data->fan_duty_cycle[nr] = speed; + accton_i2c_psu_write_word(client, PMBUS_REGISTER_FAN_COMMAND_1 + nr, data->fan_duty_cycle[nr]); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct accton_i2c_psu_data *data = accton_i2c_psu_update_device(dev); + + u16 value = 0; + int exponent, mantissa; + int multiplier = 0; + + switch (attr->index) { + case PSU_V_IN: + value = data->v_in; + break; + case PSU_I_IN: + value = data->i_in; + break; + case PSU_I_OUT: + value = data->i_out; + break; + case PSU_P_IN: + value = data->p_in; + break; + case PSU_P_OUT_UV: + multiplier=1; + case PSU_P_OUT: + value = data->p_out; + break; + case PSU_TEMP1_INPUT: + value = data->temp_input[0]; + break; + case PSU_FAN1_DUTY_CYCLE: + multiplier = 1; + value = data->fan_duty_cycle[0]; + break; + case PSU_FAN1_SPEED: + multiplier = 1; + value = data->fan_speed[0]; + break; + default: + break; + } + + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + + if(!multiplier) + multiplier = PMBUS_LITERAL_DATA_MULTIPLIER; + if(attr->index==PSU_P_OUT_UV) + multiplier = 1000000; + + return (exponent >= 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct accton_i2c_psu_data *data = accton_i2c_psu_update_device(dev); + + u8 shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; + + return sprintf(buf, "%d\n", data->fan_fault >> shift); +} + +static ssize_t show_vout(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct accton_i2c_psu_data *data = accton_i2c_psu_update_device(dev); + int exponent, mantissa; + + exponent = two_complement_to_int(data->vout_mode, 5, 0x1f); + mantissa = data->v_out; + + return (exponent > 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * PMBUS_LITERAL_DATA_MULTIPLIER) : + sprintf(buf, "%d\n", (mantissa * PMBUS_LITERAL_DATA_MULTIPLIER) / (1 << -exponent)); +} + +static ssize_t show_byte(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct accton_i2c_psu_data *data = accton_i2c_psu_update_device(dev); + + if (!data->valid) { + return 0; + } + + return (attr->index == PSU_PMBUS_REVISION) ? sprintf(buf, "%d\n", data->pmbus_revision) : + sprintf(buf, "0\n"); +} + +static ssize_t show_ascii(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct accton_i2c_psu_data *data = accton_i2c_psu_update_device(dev); + u8 *ptr = NULL; + + if (!data->valid) { + return 0; + } + switch (attr->index) { + + case PSU_MFR_ID: + ptr = data->mfr_id; + break; + case PSU_MFR_MODEL: + ptr = data->mfr_model; + break; + case PSU_MFR_REVISION: + ptr = data->mfr_revsion; + break; + case PSU_MFR_SERIAL: + ptr = data->mfr_serial; + break; + default: + return 0; + } + + return sprintf(buf, "%s\n", ptr); +} + + +static const struct attribute_group accton_i2c_psu_group = { + .attrs = accton_i2c_psu_attributes, +}; + +static int accton_i2c_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct accton_i2c_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct accton_i2c_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &accton_i2c_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &accton_i2c_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int accton_i2c_psu_remove(struct i2c_client *client) +{ + struct accton_i2c_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &accton_i2c_psu_group); + kfree(data); + + return 0; +} +/* Support psu moduel + */ +static const struct i2c_device_id accton_i2c_psu_id[] = { + { "acbel_fsh082", 0 }, + { "yesm1300am", 1 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, accton_i2c_psu_id); + +static struct i2c_driver accton_i2c_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "accton_i2c_psu", + }, + .probe = accton_i2c_psu_probe, + .remove = accton_i2c_psu_remove, + .id_table = accton_i2c_psu_id, + .address_list = normal_i2c, +}; + +static int accton_i2c_psu_read_byte(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int accton_i2c_psu_read_word(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_word_data(client, reg); +} + +static int accton_i2c_psu_write_word(struct i2c_client *client, u8 reg, u16 value) +{ + return i2c_smbus_write_word_data(client, reg, value); +} + +static int accton_i2c_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + + +static int accton_i2c_psu_read_block_data(struct i2c_client *client, u8 command, u8 *data, int data_length) +{ + int status = -EIO; + int length; + u8 buffer[128] = {0}, *ptr = buffer; + + status = accton_i2c_psu_read_byte(client, command); + if (status < 0) + { + dev_dbg(&client->dev, "Unable to get data from offset 0x%02X\r\n", command); + status = -EIO; + goto EXIT_READ_BLOCK_DATA; + } + + status = (status & 0xFF) + 1; + if ( status > 128) + { + dev_dbg(&client->dev, "Unable to get big data from offset 0x%02X\r\n", command); + status = -EINVAL; + goto EXIT_READ_BLOCK_DATA; + } + + length = status; + status = accton_i2c_psu_read_block(client, command, buffer, length); + if (unlikely(status < 0)) + goto EXIT_READ_BLOCK_DATA; + if (unlikely(status != length)) { + status = -EIO; + goto EXIT_READ_BLOCK_DATA; + } + /* The first byte is the count byte of string. */ + ptr++; + status--; + + length=status>(data_length-1)?(data_length-1):status; + memcpy(data, ptr, length); + data[length-1] = 0; + +EXIT_READ_BLOCK_DATA: + + return status; +} + + +struct reg_data_byte { + u8 reg; + u8 *value; +}; + +struct reg_data_word { + u8 reg; + u16 *value; +}; + +static struct accton_i2c_psu_data *accton_i2c_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct accton_i2c_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int i, status; + //u8 command, buf; + struct reg_data_byte regs_byte[] = { {PMBUS_REGISTER_VOUT_MODE, &data->vout_mode}, + {PMBUS_REGISTER_STATUS_FAN, &data->fan_fault}}; + struct reg_data_word regs_word[] = { {PMBUS_REGISTER_READ_VIN, &data->v_in}, + {PMBUS_REGISTER_READ_VOUT, &data->v_out}, + {PMBUS_REGISTER_READ_IIN, &data->i_in}, + {PMBUS_REGISTER_READ_IOUT, &data->i_out}, + {PMBUS_REGISTER_READ_POUT, &data->p_out}, + {PMBUS_REGISTER_READ_PIN, &data->p_in}, + {PMBUS_REGISTER_READ_TEMPERATURE_1, &(data->temp_input[0])}, + {PMBUS_REGISTER_READ_TEMPERATURE_2, &(data->temp_input[1])}, + {PMBUS_REGISTER_FAN_COMMAND_1, &(data->fan_duty_cycle[0])}, + {PMBUS_REGISTER_READ_FAN_SPEED_1, &(data->fan_speed[0])}, + {PMBUS_REGISTER_READ_FAN_SPEED_2, &(data->fan_speed[1])}, + }; + + dev_dbg(&client->dev, "Starting accton_i2c_psu update\n"); + + /* Read byte data */ + for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { + status = accton_i2c_psu_read_byte(client, regs_byte[i].reg); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_byte[i].reg, status); + } + else { + *(regs_byte[i].value) = status; + } + } + + /* Read word data */ + for (i = 0; i < ARRAY_SIZE(regs_word); i++) { + status = accton_i2c_psu_read_word(client, regs_word[i].reg); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_word[i].reg, status); + } + else { + *(regs_word[i].value) = status; + } + + } + /* Read mfr_id */ + status = accton_i2c_psu_read_block_data(client, PMBUS_REGISTER_MFR_ID, data->mfr_id, + ARRAY_SIZE(data->mfr_id)); + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", PMBUS_REGISTER_MFR_ID, status); + goto exit; + } + /* Read mfr_model */ + status = accton_i2c_psu_read_block_data(client, PMBUS_REGISTER_MFR_MODEL, data->mfr_model, + ARRAY_SIZE(data->mfr_model)); + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", PMBUS_REGISTER_MFR_MODEL, status); + goto exit; + } + /* Read mfr_revsion */ + status = accton_i2c_psu_read_block_data(client, PMBUS_REGISTER_MFR_REVISION, data->mfr_revsion, + ARRAY_SIZE(data->mfr_revsion)); + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", PMBUS_REGISTER_MFR_REVISION, status); + goto exit; + } + /* Read mfr_serial */ + status = accton_i2c_psu_read_block_data(client, PMBUS_REGISTER_MFR_SERIAL, data->mfr_serial, + ARRAY_SIZE(data->mfr_serial)); + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", PMBUS_REGISTER_MFR_SERIAL, status); + goto exit; + } + + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init accton_i2c_psu_init(void) +{ + return i2c_add_driver(&accton_i2c_psu_driver); +} + +static void __exit accton_i2c_psu_exit(void) +{ + i2c_del_driver(&accton_i2c_psu_driver); +} + +MODULE_AUTHOR("Jostar Yang "); +MODULE_DESCRIPTION(DRIVER_DESCRIPTION_NAME); +MODULE_LICENSE("GPL"); + +module_init(accton_i2c_psu_init); +module_exit(accton_i2c_psu_exit); diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-platform-monitor-fan.service b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-platform-monitor-fan.service new file mode 100755 index 00000000000..b77b40d6729 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-platform-monitor-fan.service @@ -0,0 +1,16 @@ +[Unit] +Description=Accton AS9716-32D Platform Monitoring FAN service +Before=pmon.service +After=as9716-32d-platform-monitor.service +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/accton_as9716_32d_monitor_fan.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-platform-monitor-psu.service b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-platform-monitor-psu.service new file mode 100755 index 00000000000..69bcf37e27f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-platform-monitor-psu.service @@ -0,0 +1,16 @@ +[Unit] +Description=Accton AS9716-32D Platform Monitoring PSU service +Before=pmon.service +After=as9716-32d-platform-monitor.service +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/accton_as9716_32d_monitor_psu.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-platform-monitor.service new file mode 100755 index 00000000000..1d77c39120a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-platform-monitor.service @@ -0,0 +1,18 @@ +[Unit] +Description=Accton AS9716-32D Platform Monitoring service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/accton_as9716_32d_util.py install +ExecStart=/usr/local/bin/accton_as9716_32d_monitor.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL +#StandardOutput=tty + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/setup.py b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/setup.py new file mode 100755 index 00000000000..7c70492e5d6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='as9716_32d', + version='1.0', + description='Module to initialize Accton AS9716-32D platforms', + + packages=['as9716_32d'], + package_dir={'as9716_32d': 'as9716-32d/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/README b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/README new file mode 100755 index 00000000000..44e03cab5f5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/README @@ -0,0 +1,117 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +Contents of this package: + patch - files under patch/ is for kernel and ONIE installer + for the kernel: + config-accton-as5712_54x.patch + for kernel configuration. + driver-i2c-muxes-pca954x-always-deselect.patch + for i2c_mux deselects after transaction. + driver-patches-for-accton-as5712-fan-psu-cpld.patch + for as5712's fan/psu/cpld/led/sfp drivers. + for ONIE: + onie_installer-accton-AS5712-54X.patch + for console port setting and copy util script o rootfs. + module - Contains source code of as5712 kernel driver modules. + +The late Sonic building scripts, pushed @Dec 5 2016, will automatically +create a docker container and run building process under it. +User is not necessary to handle docker environment creation. + +1. Download sonic-buildimage environment. + - Run "git clone https://github.com/Azure/sonic-buildimage". + - cd to sonic-buildimage and run "git submodule update --init --recursive". +2. Build kernel + - cd ./src/sonic-linux-kernel + - Copy patches and series from patch/kernel of this release to + sonic-linux-kernel/patch. + - Build kernel by "make". + - The built kernel package, linux-image-3.16.0-5-amd64_3.16.51-3+deb8u1_amd64.deb + , is generated. +3. Build installer + - Change directory back to sonic-buildimage/. + - Get onie_installer-accton-AS5712-54X.patch" from patch/installer. + - Change setting for AS5712-54X by patching build_image.sh. + "patch -p1 < onie_installer-accton-AS5712-54X.patch" + !!NOTICE, patching onie_installer-accton-AS5712-54X.patch comments out the + "git status" checking at build_image.sh. + - The account and password of installed OS can be given at rules/config. + The default user and password are "admin" & "YourPaSsWoRd" respectively. + - Run "make configure PLATFORM=broadcom" + - Copy the built kernel debian package to target/debs/. + The file is linux-image-3.16.0-5-amd64_*_amd64.deb under directory + src/sonic-linux-kernel/. + - Run "make target/sonic-generic.bin" + - Get the installer, target/sonic-generic.bin, to target machine and install. + +All Linux kernel code is licensed under the GPLv1. All other code is +licensed under the GPLv3. Please see the LICENSE file for copies of +both licenses. + +The code for integacting with Accton AS5712-54X has 2 parts, +kernel drivers and operational script. +The kernel drivers of peripherals are under module/ directory. +1. These drivers are patched into kernel by + driver-patches-for-accton-as5712-fan-psu-cpld.patch + Or you can build the driver under module/ by setting environment variable, + KERNEL_SRC, to proper linux built directory and run make. + It may be sonic-linux-kernel/linux-3.*/debian/build/build_amd64_none_amd64/. +2. A operational script, accton_as5712_util.py, for device initializatian and + peripheral accessing should be installed at /usr/bin. + This script is generated by onie_installer-accton-AS5712-54X.patch. + It's done by patching onie_installer-accton-AS5712-54X.patch at build-image. + Run "accton_as5712_util.py install" to install drivers. + +To initialize the system, run "accton_as5712_util.py install". +To clean up the drivers & devices, run "accton_as5712_util.py clean". +To dump information of sensors, run "accton_as5712_util.py show". +To dump SFP EEPROM, run "accton_as5712_util.py sff". +To set fan speed, run "accton_as5712_util.py set fan". +To enable/disable SFP emission, run "accton_as5712_util.py set sfp". +To set system LEDs' color, run "accton_as5712_util.py set led" +For more information, run "accton_as5712_util.py --help". + +==================================================================== +Besides applying accton_as5712_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +System LED: + There are 5 system LEDs at the lower-left corner of front panel. + They are loc, diag, fan, ps1, and ps2. + The sysfs interface color mappings are as follows: + Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + But not all colors are available for each LED. + +Fan Control: + There are 10 fans inside 5 fan modules. + All fans share 1 duty setting, ranged from 0~100. + +Thermal sensers: + 3 temperature sensors are controlled by the lm75 kernel modules. + +PSUs: + There 2 power supplies slot at the left/right side of the back. + Once if a PSU is not plugged, the status of it is shown failed. + +There are 48 SFP+ and 6 QSFP modules are equipped. +Before operating on PSU and QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/accton_as9716_32d_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/accton_as9716_32d_monitor.py new file mode 100755 index 00000000000..3752161d3eb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/accton_as9716_32d_monitor.py @@ -0,0 +1,537 @@ +#!/usr/bin/env python +# -*- coding: utf-8 -* +# Copyright (c) 2019 Edgecore Networks Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. +# +# HISTORY: +# mm/dd/yyyy (A.D.)# +# 8/27/2019:Jostar create for as9716_32d thermal plan +# ------------------------------------------------------------------ + +try: + import os + import commands + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + from as9716_32d.fanutil import FanUtil + from as9716_32d.thermalutil import ThermalUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as9716_32d_monitor' + +global log_file +global log_level + +class switch(object): + def __init__(self, value): + self.value = value + self.fall = False + + def __iter__(self): + """Return the match method once, then stop""" + yield self.match + raise StopIteration + + def match(self, *args): + """Indicate whether or not to enter a case suite""" + if self.fall or not args: + return True + elif self.value in args: # changed for v1.5, see below + self.fall = True + return True + else: + return False + + + +# Read fanN_direction=1: The air flow of Fan6 is “AFI-Back to Front” +# 0: The air flow of Fan6 is “AFO-Front to back” +# +# Thermal policy: +# a.Defaut fan duty_cycle=100% +# b.One fan fail, set to fan duty_cycle=100% +# 1.For AFI: +# Default fan duty_cycle will be 100%(fan_policy_state=LEVEL_FAN_MAX). +# If all below case meet with, set to 75%(LEVEL_FAN_MID). +# MB board +# LM75-1(0X48)<=57 +# LM75-2(0X49)<=47.3 +# LM75-3(0X4A)<=45 +# LM75-4(0X4C)<=45.1 +# LM75-5(0X4E)<=40.75 +# LM75-6(0X4F)<=42.1 +# CPU board +# Core<=44 +# LM75-1(0X4B)<=35 + +# When fan_policy_state=LEVEL_FAN_MID, meet with below case, Fan duty_cycle will be 100%(LEVEL_FAN_DAX) +# (MB board) +# LM75-1(0X48)>=61.5 +# LM75-2(0X49)>=51.5 +# LM75-3(0X4A)>=49.4 +# LM75-4(0X4C)>=49.4 +# LM75-5(0X4E)>=45.1 +# LM75-6(0X4F)>=46.75 +# (CPU board) +# Core>=48 +# LM75-1(0X4B)>=38.5 + +# 2. For AFO: +# At default, FAN duty_cycle was 100%(LEVEL_FAN_MAX). If all below case meet with, set to 75%(LEVEL_FAN_MID). +# (MB board) +# LM75-1(0X48)<=59 +# LM75-2(0X49)<=53.5 +# LM75-3(0X4A)<=55.3 +# LM75-4(0X4C)<=50.3 +# LM75-5(0X4E)<=50 +# LM75-6(0X4F)<=52.5 +# (CPU board) +# Core<=59 +# LM75-1(0X4B)<=41.1 + +# When FAN duty_cycle was 75%(LEVEL_FAN_MID). If all below case meet with, set to 50%(LEVEL_FAN_DEF). +# (MB board) +# LM75-1(0X48)<=55.8 +# LM75-2(0X49)<=50.5 +# LM75-3(0X4A)<=51.1 +# LM75-4(0X4C)<=47.6 +# LM75-5(0X4E)<=45.75 +# LM75-6(0X4F)<=50.1 +# (CPU board) +# Core<=57 +# LM75-1(0X4B)<=36.6 + +# When fan_speed 50%(LEVEL_FAN_DEF). +# Meet with below case, Fan duty_cycle will be 75%(LEVEL_FAN_MID) +# (MB board) +# LM75-1(0X48)>=70 +# LM75-2(0X49)>=66 +# LM75-3(0X4A)>=68 +# LM75-4(0X4C)>=62 +# LM75-5(0X4E)>=62 +# LM75-6(0X4F)>=67 +# (CPU board) +# Core>=77 +# LM75-1(0X4B)>=50 + +# When FAN duty_cycle was 75%(LEVEL_FAN_MID). If all below case meet with, set to 100%(LEVEL_FAN_MAX). +# (MB board) +# LM75-1(0X48)>=67 +# LM75-2(0X49)>=62.5 +# LM75-3(0X4A)>=65 +# LM75-4(0X4C)>=59 +# LM75-5(0X4E)>=58.5 +# LM75-6(0X4F)>=63 + +# (CPU board) +# Core >=69 +# LM75-1(0X4B)>=49 + + +#Yellow Alarm +#MB board +#LM75-1(0X48)>=68 +#LM75-2(0X49)>=64 +#LM75-3(0X4A)>=65 +#LM75-4(0X4C)>=61 +#LM75-5(0X4E)>=60 +#LM75-6(0X4F)>=64 +#CPU Board +#Core>=70 +#LM75-1(0X4B)>=68 + +#Red Alarm +#MB board +#LM75-1(0X48)>=72 +#LM75-2(0X49)>=68 +#LM75-3(0X4A)>=69 +#LM75-4(0X4C)>=65 +#LM75-5(0X4E)>=64 +#LM75-6(0X4F)>=68 +#CPU Board +#Core>=74 +#LM75-1(0X4B)>=72 + +#Shut down +#MB board +#LM75-1(0X48)>=77 +#LM75-2(0X49)>=73 +#LM75-3(0X4A)>=74 +#LM75-4(0X4C)>=70 +#LM75-5(0X4E)>=69 +#LM75-6(0X4F)>=73 +#CPU Board +#Core>=79 +#LM75-1(0X4B)>=77 + + + +def power_off_dut(): + cmd_str="i2cset -y -f 19 0x60 0x60 0x10" + status, output = commands.getstatusoutput(cmd_str) + return status + +#If only one PSU insert(or one of PSU pwoer fail), and watt >800w. Must let DUT fan pwm >= 75% in AFO. +#Because the psu temp is high. +# Return 1: full load +# Return 0: Not full load +def check_psu_loading(): + psu_power_status=[1, 1] + + psu_power_good = { + 2: "/sys/bus/i2c/devices/10-0051/psu_power_good", + 1: "/sys/bus/i2c/devices/9-0050/psu_power_good", + } + psu_power_in = { + 2: "/sys/bus/i2c/devices/10-0059/psu_p_in", + 1: "/sys/bus/i2c/devices/9-0058/psu_p_in", + } + psu_power_out = { + 2: "/sys/bus/i2c/devices/10-0059/psu_p_out", + 1: "/sys/bus/i2c/devices/9-0058/psu_p_out", + } + + check_psu_watt=0 + for i in range(1,3): + node = psu_power_good[i] + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return None + + psu_power_status[i-1]=int(status) + if status==0: + check_psu_watt=1 + + if check_psu_watt: + for i in range(1,3): + if psu_power_status[i-1]==1: + #check watt + node = psu_power_in[i] + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return None + + psu_p_in= int(status) + if psu_p_in/1000 > 800: + return True + + node = psu_power_out[i] + try: + with open(node, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return None + psu_p_out= int(status) + if psu_p_out/1000 > 800: + return True + else: + return False + + + return False + +fan_policy_state=0 +fan_policy_alarm=0 +send_yellow_alarm=0 +send_red_alarm=0 +fan_fail=0 +count_check=0 + +test_temp = 0 +test_temp_list = [0, 0, 0, 0, 0, 0, 0, 0] +temp_test_data=0 +test_temp_revert=0 + +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + # static temp var + temp = 0 + new_duty_cycle = 0 + duty_cycle=0 + ori_duty_cycle = 0 + + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = handler = logging.handlers.SysLogHandler(address = '/dev/log') + sys_handler.setLevel(logging.WARNING) + logging.getLogger('').addHandler(sys_handler) + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + + def manage_fans(self): + + global fan_policy_state + global fan_policy_alarm + global send_yellow_alarm + global send_red_alarm + global fan_fail + global count_check + global test_temp + global test_temp_list + global temp_test_data + global test_temp_revert + + CHECK_TIMES=3 + + LEVEL_FAN_INIT=0 + LEVEL_FAN_MIN=1 + LEVEL_FAN_MID=2 + LEVEL_FAN_MAX=3 + LEVEL_FAN_DEF=LEVEL_FAN_MAX + LEVEL_FAN_YELLOW_ALARM=4 + LEVEL_FAN_RED_ALARM=5 + LEVEL_FAN_SHUTDOWN=6 + + fan_policy_f2b = { #AFO + LEVEL_FAN_MIN: [50, 0x7], + LEVEL_FAN_MID: [75, 0xb], + LEVEL_FAN_MAX: [100, 0xf] + } + fan_policy_b2f = { #AFI + LEVEL_FAN_MID: [75, 0xb], + LEVEL_FAN_MAX: [100, 0xf] + } + + afi_thermal_spec={ + "mid_to_max_temp":[61500, 51500, 49400, 49400, 45100, 46750, 48000, 38500], + "max_to_mid_temp":[57000, 47300, 45000, 45100, 40750, 42100, 44000, 35000] + } + afo_thermal_spec={ + "min_to_mid_temp": [70000, 66000, 68000, 62000, 62000, 67000, 77000, 50000], + "mid_to_max_temp": [67000, 62000, 65000, 59000, 58500, 63000, 69000, 49000], + "max_to_mid_temp": [59000, 53500, 55300, 50300, 50000, 52500, 59000, 41100], + "mid_to_min_temp": [55800, 50500, 51100, 47600, 45750, 50100, 57000, 36600], + "max_to_yellow_alarm": [68000, 64000, 65000, 61000, 60000, 64000, 70000, 68000], + "yellow_to_red_alarm": [72000, 68000, 69000, 65000, 64000, 68000, 74000, 72000], + "red_alarm_to_shutdown": [77000, 73000, 74000, 70000, 69000, 73000, 79000, 77000] + } + + thermal_val=[0,0,0,0,0,0,0,0] + max_to_mid=0 + mid_to_min=0 + + fan = FanUtil() + if fan_policy_state==LEVEL_FAN_INIT: + fan_policy_state=LEVEL_FAN_MAX #This is default state + logging.debug("fan_policy_state=LEVEL_FAN_MAX") + return + + count_check=count_check+1 + if count_check < CHECK_TIMES: + return + else: + count_check=0 + + thermal = ThermalUtil() + fan_dir=1 + fan_dir=fan.get_fan_dir(1) + + if fan_dir==1: # AFI + fan_thermal_spec = afi_thermal_spec + fan_policy=fan_policy_b2f + elif fan_dir==0: # AFO + fan_thermal_spec = afo_thermal_spec + fan_policy=fan_policy_f2b + else: + logging.debug( "NULL case") + + ori_duty_cycle=fan.get_fan_duty_cycle() + new_duty_cycle=0 + + if test_temp_revert==0: + temp_test_data=temp_test_data+2000 + else: + temp_test_data=temp_test_data-2000 + + if test_temp==0: + for i in range (thermal.THERMAL_NUM_1_IDX, thermal.THERMAL_NUM_MAX+1): + thermal_val[i-1]=thermal._get_thermal_val(i) + else: + for i in range (thermal.THERMAL_NUM_1_IDX, thermal.THERMAL_NUM_MAX+1): + thermal_val[i-1]=test_temp_list[i-1] + thermal_val[i-1]= thermal_val[i-1] + temp_test_data + + fan_fail=0 + + ori_state=fan_policy_state; + current_state=fan_policy_state; + + if fan_dir==1: #AFI + for i in range (0, thermal.THERMAL_NUM_MAX): + if ori_state==LEVEL_FAN_MID: + if thermal_val[i] >= fan_thermal_spec["mid_to_max_temp"][i]: + current_state=LEVEL_FAN_MAX + logging.debug("current_state=LEVEL_FAN_MAX") + break + else: + if (thermal_val[i] <= fan_thermal_spec["max_to_mid_temp"][i]): + max_to_mid=max_to_mid+1 + + if max_to_mid==thermal.THERMAL_NUM_MAX and fan_policy_state==LEVEL_FAN_MAX: + current_state=LEVEL_FAN_MID + logging.debug("current_state=LEVEL_FAN_MID") + else: #AFO + psu_full_load=check_psu_loading() + for i in range (0, thermal.THERMAL_NUM_MAX): + if ori_state==LEVEL_FAN_MID: + if thermal_val[i] >= fan_thermal_spec["mid_to_max_temp"][i]: + current_state=LEVEL_FAN_MAX + break + else: + if psu_full_load!=True and thermal_val[i] <= fan_thermal_spec["mid_to_min_temp"][i]: + mid_to_min=mid_to_min+1 + elif ori_state==LEVEL_FAN_MIN: + if psu_full_load==True: + current_state=LEVEL_FAN_MID + logging.debug("psu_full_load, set current_state=LEVEL_FAN_MID") + if thermal_val[i] >= fan_thermal_spec["min_to_mid_temp"][i]: + current_state=LEVEL_FAN_MID + + else: + if thermal_val[i] <= fan_thermal_spec["max_to_mid_temp"][i] : + max_to_mid=max_to_mid+1 + if fan_policy_alarm==0: + if thermal_val[i] >= fan_thermal_spec["max_to_yellow_alarm"][i]: + if send_yellow_alarm==0: + logging.warning('Alarm-Yellow for temperature high is detected') + fan_policy_alarm=LEVEL_FAN_YELLOW_ALARM + send_yellow_alarm=1 + elif fan_policy_alarm==LEVEL_FAN_YELLOW_ALARM: + if thermal_val[i] >= fan_thermal_spec["yellow_to_red_alarm"][i]: + if send_red_alarm==0: + logging.warning('Alarm-Red for temperature high is detected') + fan_policy_alarm=LEVEL_FAN_RED_ALARM + send_red_alarm=1 + elif fan_policy_alarm==LEVEL_FAN_RED_ALARM: + if thermal_val[i] >= fan_thermal_spec["red_alarm_to_shutdown"][i]: + logging.critical('Alarm-Critical for temperature high is detected, shutdown DUT') + fan_policy_alarm=LEVEL_FAN_SHUTDOWN + time.sleep(2) + power_off_dut() + + if max_to_mid==thermal.THERMAL_NUM_MAX and ori_state==LEVEL_FAN_MAX: + current_state=LEVEL_FAN_MID + if fan_policy_alarm!=0: + logging.warning('Alarm for temperature high is cleared') + fan_policy_alarm=0 + send_yellow_alarm=0 + send_red_alarm=0 + test_temp_revert=0 + logging.debug("current_state=LEVEL_FAN_MID") + + if mid_to_min==thermal.THERMAL_NUM_MAX and ori_state==LEVEL_FAN_MID: + if psu_full_load==0: + current_state=LEVEL_FAN_MIN + logging.debug("current_state=LEVEL_FAN_MIN") + + #Check Fan status + for i in range (fan.FAN_NUM_1_IDX, fan.FAN_NUM_ON_MAIN_BROAD+1): + if fan.get_fan_status(i)==0: + new_duty_cycle=100 + logging.debug('fan_%d fail, set duty_cycle to 100',i) + if test_temp==0: + fan_fail=1 + fan.set_fan_duty_cycle(new_duty_cycle) + break + else: + fan_fail=0 + + if current_state!=ori_state: + fan_policy_state=current_state + new_duty_cycle=fan_policy[current_state][0] + logging.debug("fan_policy_state=%d, new_duty_cycle=%d", fan_policy_state, new_duty_cycle) + if new_duty_cycle!=ori_duty_cycle and fan_fail==0: + fan.set_fan_duty_cycle(new_duty_cycle) + return True + if new_duty_cycle==0 and fan_fail==0: + fan.set_fan_duty_cycle(FAN_DUTY_CYCLE_MAX) + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + global test_temp + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdlt:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + if sys.argv[1]== '-t': + if len(sys.argv)!=10: + print "temp test, need input 8 temp" + return 0 + i=0 + for x in range(2, 10): + test_temp_list[i]= int(sys.argv[x])*1000 + i=i+1 + test_temp = 1 + log_level = logging.DEBUG + print test_temp_list + + fan = FanUtil() + fan.set_fan_duty_cycle(100) + monitor = device_monitor(log_file, log_level) + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(10) + + +if __name__ == '__main__': + main(sys.argv[1:]) + diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/accton_as9716_32d_monitor_fan.py b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/accton_as9716_32d_monitor_fan.py new file mode 100755 index 00000000000..320655361b8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/accton_as9716_32d_monitor_fan.py @@ -0,0 +1,197 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 12/13/2018: Jostar create for as9716-32d +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as9716_32d_monitor_fan' + +global log_file +global log_level + + +class switch(object): + def __init__(self, value): + self.value = value + self.fall = False + + def __iter__(self): + """Return the match method once, then stop""" + yield self.match + raise StopIteration + + def match(self, *args): + """Indicate whether or not to enter a case suite""" + if self.fall or not args: + return True + elif self.value in args: # changed for v1.5, see below + self.fall = True + return True + else: + return False + + +fan_state=[2, 2, 2, 2, 2, 2] #init state=2, insert=1, remove=0 +fan_status_state=[2, 2, 2, 2, 2, 2] #init state=2, fault=1, normal=0 +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + + def __init__(self, log_file, log_level): + + self.fan_num = 6 + self.fan_path = "/sys/bus/i2c/devices/17-0066/" + self.present = { + 0: "fan1_present", + 1: "fan2_present", + 2: "fan3_present", + 3: "fan4_present", + 4: "fan5_present", + 5: "fan6_present", + } + + self.fault = { + 0: "fan1_fault", + 1: "fan2_fault", + 2: "fan3_fault", + 3: "fan4_fault", + 4: "fan5_fault", + 5: "fan6_fault", + } + + + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(logging.DEBUG) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + #sys_handler.setLevel(logging.WARNING) + sys_handler.setLevel(logging.INFO) + logging.getLogger('').addHandler(sys_handler) + + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_fan(self): + + FAN_STATE_REMOVE = 0 + FAN_STATE_INSERT = 1 + + FAN_STATUS_FAULT = 1 + FAN_STATUS_NORMAL = 0 + + global fan_state + global fan_status_state + + for idx in range (0, self.fan_num): + node = self.fan_path + self.present[idx] + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if fan_state[idx]!=1: + fan_state[idx]=FAN_STATE_INSERT + logging.info("FAN-%d present is detected", idx+1); + else: + if fan_state[idx]!=0: + fan_state[idx]=FAN_STATE_REMOVE + logging.warning("Alarm for FAN-%d absent is detected", idx+1) + + for idx in range (0, self.fan_num): + node = self.fan_path + self.fault[idx] + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if fan_status_state[idx]!=FAN_STATUS_FAULT: + if fan_state[idx] == FAN_STATE_INSERT: + logging.warning("Alarm for FAN-%d failed is detected", idx+1); + fan_status_state[idx]=FAN_STATUS_FAULT + else: + fan_status_state[idx]=FAN_STATUS_NORMAL + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + monitor = device_monitor(log_file, log_level) + while True: + monitor.manage_fan() + time.sleep(3) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/accton_as9716_32d_monitor_psu.py b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/accton_as9716_32d_monitor_psu.py new file mode 100755 index 00000000000..a8df99430c8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/accton_as9716_32d_monitor_psu.py @@ -0,0 +1,169 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Accton Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 12/12/2018: Jostar create for as9716-32d +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/accton_as9716_32d_monitor_psu' + +global log_file +global log_level + + +psu_state=[2, 2] +psu_status_state=[2, 2] +# Make a class we can use to capture stdout and sterr in the log +class device_monitor(object): + + def __init__(self, log_file, log_level): + + self.psu_num = 2 + self.psu_path = "/sys/bus/i2c/devices/" + self.presence = "/psu_present" + self.oper_status = "/psu_power_good" + self.mapping = { + 0: "9-0050", + 1: "10-0051", + } + + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + # set up logging to console + + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = logging.handlers.SysLogHandler(address = '/dev/log') + #sys_handler.setLevel(logging.WARNING) + sys_handler.setLevel(logging.INFO) + logging.getLogger('').addHandler(sys_handler) + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_psu(self): + + PSU_STATE_REMOVE = 0 + PSU_STATE_INSERT = 1 + + PSU_STATUS_NO_POWER = 0 + PSU_STATUS_POWER_GOOD = 1 + PSU_STATUS_IDLE =2 + + global psu_state + + for idx in range (0, self.psu_num): + node = self.psu_path + self.mapping[idx] + self.presence + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "1": + if psu_state[idx]!=1: + psu_state[idx]=PSU_STATE_INSERT + logging.info("PSU-%d present is detected", idx+1); + #psu_status_state[idx]=PSU_STATUS_POWER_GOOD #when insert, assume power is good. If no_power, next code will find it. + else: + if psu_state[idx]!=0: + psu_state[idx]=PSU_STATE_REMOVE + logging.warning("Alarm for PSU-%d absent is detected", idx+1); + psu_status_state[idx]=PSU_STATUS_IDLE + + for idx in range (0, self.psu_num): + node = self.psu_path + self.mapping[idx] + self.oper_status + try: + val_file = open(node) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + content = val_file.readline().rstrip() + val_file.close() + # content is a string, either "0" or "1" + if content == "0": + if psu_status_state[idx]!=PSU_STATUS_NO_POWER: + if psu_state[idx]==PSU_STATE_INSERT: + logging.warning("Alarm for PSU-%d failed is detected", idx+1); + psu_status_state[idx]=PSU_STATUS_NO_POWER + else: + if psu_state[idx]==PSU_STATE_INSERT: + if psu_status_state[idx]!=PSU_STATUS_POWER_GOOD: + logging.info("PSU-%d power_good is detected", idx+1); + psu_status_state[idx]=PSU_STATUS_POWER_GOOD + + + return True + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdl:',['lfile=']) + except getopt.GetoptError: + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + monitor = device_monitor(log_file, log_level) + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_psu() + time.sleep(3) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/accton_as9716_32d_util.py b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/accton_as9716_32d_util.py new file mode 100755 index 00000000000..7ccf05a798a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/utils/accton_as9716_32d_util.py @@ -0,0 +1,598 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +PROJECT_NAME = 'as9716_32d' +version = '0.0.1' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan1':1, 'fan2':1,'fan3':1,'fan4':1,'fan5':1,'thermal':3, 'psu':2, 'sfp':34} + + +led_prefix ='/sys/devices/platform/as9716_32d_led/leds/accton_'+PROJECT_NAME+'_led::' +fan_prefix ='/sys/devices/platform/as9716_32d_' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2'], + 'fan1': ['fan'], + 'fan2': ['fan'], + 'fan3': ['fan'], + 'fan4': ['fan'], + 'fan5': ['fan'], + 'fan5': ['fan'], + } +hwmon_nodes = {'led': ['brightness'] , + 'fan1': ['fan_duty_cycle_percentage', 'fan1_fault', 'fan1_speed_rpm', 'fan1_direction', 'fanr1_fault', 'fanr1_speed_rpm'], + 'fan2': ['fan_duty_cycle_percentage','fan2_fault', 'fan2_speed_rpm', 'fan2_direction', 'fanr2_fault', 'fanr2_speed_rpm'], + 'fan3': ['fan_duty_cycle_percentage','fan3_fault', 'fan3_speed_rpm', 'fan3_direction', 'fanr3_fault', 'fanr3_speed_rpm'], + 'fan4': ['fan_duty_cycle_percentage','fan4_fault', 'fan4_speed_rpm', 'fan4_direction', 'fanr4_fault', 'fanr4_speed_rpm'], + 'fan5': ['fan_duty_cycle_percentage','fan5_fault', 'fan5_speed_rpm', 'fan5_direction', 'fanr5_fault', 'fanr5_speed_rpm'], + 'fan6': ['fan_duty_cycle_percentage','fan6_fault', 'fan6_speed_rpm', 'fan6_direction', 'fanr5_fault', 'fanr5_speed_rpm'], + } +hwmon_prefix ={'led': led_prefix, + 'fan1': fan_prefix, + 'fan2': fan_prefix, + 'fan3': fan_prefix, + 'fan4': fan_prefix, + 'fan5': fan_prefix, + } + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'fan': ['54-0066'], + 'thermal': ['18-0048', '18-0049','18-004a', '18-004b', '18-004c', '18-004e', '18-004f'] , + 'psu': ['9-0058', '10-0059'], + 'sfp': ['-0050']} +i2c_nodes = {'fan': ['present', 'front_speed_rpm', 'rear_speed_rpm'], + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['module_present_ ', 'module_tx_disable_']} + +sfp_map = [25, 26, 27, 28, 29, 30, 31, 32, + 33, 34, 35, 36, 37, 38, 39, 40, + 41, 42, 43, 44, 45, 46, 47, 48, + 49, 50, 51, 52, 53, 54, 55, 56, + 57, 58] + +#sfp_map = [25, 26] + +mknod =[ +'echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-2/new_device', + +'echo as9716_32d_fpga 0x60 > /sys/bus/i2c/devices/i2c-19/new_device', +'echo as9716_32d_cpld1 0x61 > /sys/bus/i2c/devices/i2c-20/new_device', +'echo as9716_32d_cpld2 0x62 > /sys/bus/i2c/devices/i2c-21/new_device', +'echo as9716_32d_cpld_cpu 0x65 > /sys/bus/i2c/devices/i2c-0/new_device', + +'echo as9716_32d_fan 0x66 > /sys/bus/i2c/devices/i2c-17/new_device', + +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4c > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4e > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4f > /sys/bus/i2c/devices/i2c-18/new_device', + +# PSU-1 +'echo as9716_32d_psu1 0x50 > /sys/bus/i2c/devices/i2c-9/new_device', +'echo acbel_fsh082 0x58 > /sys/bus/i2c/devices/i2c-9/new_device', + +# PSU-2 +'echo as9716_32d_psu2 0x51 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo acbel_fsh082 0x59 > /sys/bus/i2c/devices/i2c-10/new_device', + +#EERPOM +'echo 24c02 0x56 > /sys/bus/i2c/devices/i2c-0/new_device', +] + + + +FORCE = 0 +logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) > DEVICE_NO['sfp'] -1: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-32 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def dis_i2c_ir3570a(addr): + cmd = "i2cset -y 0 0x%x 0xE5 0x01" % addr + status, output = commands.getstatusoutput(cmd) + cmd = "i2cset -y 0 0x%x 0x12 0x02" % addr + status, output = commands.getstatusoutput(cmd) + return status + +def ir3570_check(): + cmd = "i2cdump -y 0 0x42 s 0x9a" + try: + status, output = commands.getstatusoutput(cmd) + lines = output.split('\n') + hn = re.findall(r'\w+', lines[-1]) + version = int(hn[1], 16) + if version == 0x24: #only for ir3570a + ret = dis_i2c_ir3570a(4) + else: + ret = 0 + except Exception as e: + print "Error on ir3570_check() e:" + str(e) + return -1 + return ret + + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-32 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ACCTON DBG]: "+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status = 1 + output = "" + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log ("cmd:" + cmd) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_inserted(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + + +kos = [ +'depmod -ae', +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe accton_i2c_psu', +'modprobe accton_as9716_32d_cpld', +'modprobe accton_as9716_32d_fan', +'modprobe accton_as9716_32d_leds', +'modprobe accton_as9716_32d_psu', +'modprobe optoe', +'modprobe lm75'] + +cpld_reset_stop='i2cset -y 0 0x65 0x3 0x0' + +def driver_install(): + + global FORCE + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + log_os_system(cpld_reset_stop, 1) + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + lst = rm.split(" ") + print "lst=%s"%lst + if len(lst) > 3: + del(lst[3]) + rm = " ".join(lst) + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +def device_install(): + global FORCE + + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(2) + print "init i2c device instance" + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(0,len(sfp_map)): + status, output =log_os_system("echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + status, output =log_os_system("echo port"+str(i)+" > /sys/bus/i2c/devices/"+str(sfp_map[i])+"-0050/port_name", 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/0-0070", 0) + if status==0: + I2C_ORDER=1 + else: + I2C_ORDER=0 + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + nodelist = mknod + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_inserted() == False: + return False + if not device_exist(): + print "not device_exist()" + return False + return True + +def do_install(): + if driver_inserted() == False: + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + + ir3570_check() + + if not device_exist(): + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_inserted()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + #if len(ALL_DEVICE)==0: + # devices_info() + #node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + #node = node.replace(node.split("/")[-1], 'eeprom') + node= "/sys/bus/i2c/devices/"+str(sfp_map[int(index)])+"-0050" + "/eeprom" + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + print "node=%s"%node + #print node + ":" + #ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + ret, log = log_os_system(hex_cmd+" -C " + node, 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan1'] ['fan11'][0] + node = node.replace(node.split("/")[-1], 'fan1_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0077", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/common/modules/accton_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-accton/common/modules/accton_i2c_cpld.c new file mode 100755 index 00000000000..03e528ef8d5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/common/modules/accton_i2c_cpld.c @@ -0,0 +1,888 @@ +/* + * A hwmon driver for the accton_i2c_cpld + * + * Copyright (C) 2013 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define MAX_PORT_NUM 64 +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +#define I2C_ADDR_CPLD1 0x60 +#define I2C_ADDR_CPLD2 0x62 +#define I2C_ADDR_CPLD3 0x64 +#define CPLD_ADDRS {I2C_ADDR_CPLD1, I2C_ADDR_CPLD2, I2C_ADDR_CPLD3} + + +/* + * Number of additional attribute pointers to allocate + * with each call to krealloc + */ +#define ATTR_ALLOC_SIZE 1 /*For last attribute which is NUll.*/ + +#define NAME_SIZE 24 +#define MAX_RESP_LENGTH 48 + +typedef ssize_t (*show_func)( struct device *dev, + struct device_attribute *attr, + char *buf); +typedef ssize_t (*store_func)(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count); + +enum models { + AS7712_32X, + AS7716_32X, + AS7816_64X, + AS7312_54X, + PLAIN_CPLD, /*No attribute but add i2c addr to the list.*/ + NUM_MODEL +}; + +enum sfp_func { + HAS_SFP = 1<<0 , + HAS_QSFP = 1<<1 , +}; + +enum common_attrs { + CMN_VERSION, + CMN_ACCESS, + CMN_PRESENT_ALL, + NUM_COMMON_ATTR +}; + +enum sfp_attrs { + SFP_PRESENT, + SFP_RESET, + SFP_LP_MODE, + NUM_SFP_ATTR +}; + +struct cpld_sensor { + struct cpld_sensor *next; + char name[NAME_SIZE+1]; /* sysfs sensor name */ + struct device_attribute attribute; + bool update; /* runtime sensor update needed */ + int data; /* Sensor data. Negative if there was a read error */ + + u8 reg; /* register */ + u8 mask; /* bit mask */ + bool invert; /* inverted value*/ + +}; + +#define to_cpld_sensor(_attr) \ + container_of(_attr, struct cpld_sensor, attribute) + +struct cpld_data { + struct device *dev; + struct device *hwmon_dev; + + int num_attributes; + struct attribute_group group; + + enum models model; + struct cpld_sensor *sensors; + struct mutex update_lock; + bool valid; + unsigned long last_updated; /* in jiffies */ + + int attr_index; + u16 sfp_num; + u8 sfp_types; + struct model_attrs *cmn_attr; +}; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + + +struct base_attrs { + const char *name; + umode_t mode; + show_func get; + store_func set; +}; + +struct attrs { + int reg; + bool invert; + struct base_attrs *base; +}; + +struct model_attrs { + struct attrs **cmn; + struct attrs **portly; +}; + + +static ssize_t show_bit(struct device *dev, + struct device_attribute *devattr, char *buf); +static ssize_t show_presnet_all(struct device *dev, + struct device_attribute *devattr, char *buf); +static ssize_t set_1bit(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t set_byte(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); + +int accton_i2c_cpld_read(u8 cpld_addr, u8 reg); +int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + + +struct base_attrs common_attrs[NUM_COMMON_ATTR] = +{ + [CMN_VERSION] = {"version", S_IRUGO, show_bit, NULL}, + [CMN_ACCESS] = {"access", S_IWUSR, NULL, set_byte}, + [CMN_PRESENT_ALL] = {"module_present_all", S_IRUGO, show_presnet_all, NULL}, +}; + +struct attrs as7712_common[] = { + [CMN_VERSION] = {0x01, false, &common_attrs[CMN_VERSION]}, + [CMN_ACCESS] = {0x00, false, &common_attrs[CMN_ACCESS]}, + [CMN_PRESENT_ALL] = {0x30, false, &common_attrs[CMN_PRESENT_ALL]}, +}; +struct attrs as7816_common[] = { + [CMN_VERSION] = {0x01, false, &common_attrs[CMN_VERSION]}, + [CMN_ACCESS] = {0x00, false, &common_attrs[CMN_ACCESS]}, + [CMN_PRESENT_ALL] = {0x70, false, &common_attrs[CMN_PRESENT_ALL]}, +}; +struct attrs as7312_common[] = { + [CMN_VERSION] = {0x01, false, &common_attrs[CMN_VERSION]}, + [CMN_ACCESS] = {0x00, false, &common_attrs[CMN_ACCESS]}, + [CMN_PRESENT_ALL] = {-1, false, &common_attrs[CMN_PRESENT_ALL]}, +}; +struct attrs plain_common[] = { + [CMN_VERSION] = {0x01, false, &common_attrs[CMN_VERSION]}, +}; + +struct base_attrs portly_attrs[] = +{ + [SFP_PRESENT] = {"module_present", S_IRUGO, show_bit, NULL}, + [SFP_RESET] = {"module_reset", S_IRUGO|S_IWUSR, show_bit, set_1bit}, +}; + +struct attrs as7712_port[] = { + {0x30, true, &portly_attrs[SFP_PRESENT]}, + {0x04, true, &portly_attrs[SFP_RESET]}, +}; + +struct attrs as7816_port[] = { + {0x70, true, &portly_attrs[SFP_PRESENT]}, + {0x40, true, &portly_attrs[SFP_RESET]}, +}; + +struct attrs *as7712_cmn_list[] = { + &as7712_common[CMN_VERSION], + &as7712_common[CMN_ACCESS], + &as7712_common[CMN_PRESENT_ALL], + NULL +}; + +struct attrs *as7816_cmn_list[] = { + &as7816_common[CMN_VERSION], + &as7816_common[CMN_ACCESS], + &as7816_common[CMN_PRESENT_ALL], + NULL +}; + +struct attrs *as7312_cmn_list[] = { + &as7312_common[CMN_VERSION], + &as7312_common[CMN_ACCESS], + &as7312_common[CMN_PRESENT_ALL], + NULL +}; + +struct attrs *plain_cmn_list[] = { + &plain_common[CMN_VERSION], + NULL +}; + +struct attrs *as7712_port_list[] = { + &as7712_port[SFP_PRESENT], + &as7712_port[SFP_RESET], + NULL +}; +struct attrs *as7816_port_list[] = { + &as7816_port[SFP_PRESENT], + &as7816_port[SFP_RESET], + NULL +}; + +struct model_attrs models_attr[NUM_MODEL] = { + {.cmn = as7712_cmn_list, .portly=as7712_port_list}, + {.cmn = as7712_cmn_list, .portly=as7712_port_list}, /*7716's as 7712*/ + {.cmn = as7816_cmn_list, .portly=as7816_port_list}, + {.cmn = as7312_cmn_list, .portly=as7816_port_list}, + {.cmn = plain_cmn_list, .portly=NULL}, +}; + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; +/* Addresses scanned for accton_i2c_cpld + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static int get_sfp_spec(int model, u16 *num, u8 *types) +{ + switch (model) { + case AS7712_32X: + case AS7716_32X: + *num = 32; + *types = HAS_QSFP; + break; + case AS7816_64X: + *num = 64; + *types = HAS_QSFP; + break; + case AS7312_54X: + *num = 54; + *types = HAS_QSFP|HAS_SFP; + default: + *types = 0; + *num = 0; + break; + } + + return 0; +} + +static int get_present_reg_distinct(int model, u8 port, u8 *cpld_addr, u8 *reg, u8 *num) +{ + u8 cpld_address[] = CPLD_ADDRS; + + switch (model) { + case AS7312_54X: + if (port < 48) { + *cpld_addr = cpld_address[1 + port/24]; + *reg = 0x09 + (port%24)/8; + *num = 8; + } + else + { + *reg = 0x18; + *num = 4; + *cpld_addr = ( port < 52)? cpld_address[1]: cpld_address[2]; + } + break; + default: + return -EINVAL; + } +} + + +/*Assume the bits for ports are listed in-a-row.*/ +static int get_reg_bit(u8 reg_start, int port, + u8 *reg ,u8 *mask) +{ + *reg = reg_start + ((port)/8); + *mask = 1 << ((port)%8); + + return 0; +} + +static int cpld_write_internal( + struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + + +/*Turn a numberic array into string with " " between each element. + * e.g., {0x11, 0x33, 0xff, 0xf1} => "11 33 ff f1" + */ +static ssize_t array_stringify(char *buf, u8 *input, size_t size) { + + int i; + char t[MAX_RESP_LENGTH+1]; + + buf[0] = '\0'; + for (i = 0; i < size; i++) { + snprintf(t, MAX_RESP_LENGTH, "%x ", input[i]); + strncat(buf, t, MAX_RESP_LENGTH); + } + + if (strlen(buf) > 0) + buf[strlen(buf)-1] = '\0'; /*Remove tailing blank*/ + + return snprintf(buf, MAX_RESP_LENGTH, "%s\n", buf); +} + +static ssize_t show_presnet_all_distinct(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 i, value, reg; + u8 cpld_addr, num; + u8 _value[8]; + u64 *values = (u64 *)_value; + + values = 0; + mutex_lock(&data->update_lock); + while(i < data->sfp_num) + { + get_present_reg_distinct(data->model, i, &cpld_addr, ®, &num); + if(cpld_addr == client->addr) + value = cpld_read_internal(client, reg); + else + value = accton_i2c_cpld_read(cpld_addr, reg); + + if (unlikely(value < 0)) { + goto exit; + } + + *values |= (value&((1<<(num))-1)) << i; + i += num; + } + mutex_unlock(&data->update_lock); + + *values = cpu_to_le64(*values); + return array_stringify(buf, _value, i); +exit: + mutex_unlock(&data->update_lock); + return value; +} + +static ssize_t show_presnet_all(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + struct cpld_sensor *sensor = to_cpld_sensor(devattr); + u8 i, values[MAX_PORT_NUM/8]; + + /*In case, the registers out-of-order*/ + if (sensor->reg < 0) { + return show_presnet_all_distinct(dev, devattr, buf); + } + + mutex_lock(&data->update_lock); + for (i = 0; i < ((data->sfp_num + 7)/8); i++) { + values[i] = cpld_read_internal(client, sensor->reg + i); + if (unlikely(values[i] < 0)) { + goto exit; + } + } + mutex_unlock(&data->update_lock); + return array_stringify(buf, values, i); + +exit: + mutex_unlock(&data->update_lock); + return values[i]; +} + +static ssize_t show_bit(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int value; + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + struct cpld_sensor *sensor = to_cpld_sensor(devattr); + + mutex_lock(&data->update_lock); + value = cpld_read_internal(client, sensor->reg); + value = value & sensor->mask; + if (sensor->invert) + value = !value; + mutex_unlock(&data->update_lock); + + return snprintf(buf, PAGE_SIZE, "%x\n", value); +} + +static ssize_t set_1bit(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + long is_reset; + int value, status; + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + struct cpld_sensor *sensor = to_cpld_sensor(devattr); + u8 cpld_bit, reg; + + status = kstrtol(buf, 10, &is_reset); + if (status) { + return status; + } + reg = sensor->reg; + cpld_bit = sensor->mask; + mutex_lock(&data->update_lock); + value = cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + if (sensor->invert) + is_reset = !is_reset; + + if (is_reset) { + value |= cpld_bit; + } + else { + value &= ~cpld_bit; + } + + status = cpld_write_internal(client, reg, value); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_byte(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + return access(dev, da, buf, count); +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static void accton_i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = + kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", + client->addr); + return; + } + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void accton_i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int cpld_add_attribute(struct cpld_data *data, struct attribute *attr) +{ + int new_max_attrs = ++data->num_attributes + ATTR_ALLOC_SIZE; + void *new_attrs = krealloc(data->group.attrs, + new_max_attrs * sizeof(void *), + GFP_KERNEL); + if (!new_attrs) + return -ENOMEM; + data->group.attrs = new_attrs; + + + data->group.attrs[data->num_attributes-1] = attr; + data->group.attrs[data->num_attributes] = NULL; + + return 0; +} + +static void cpld_dev_attr_init(struct device_attribute *dev_attr, + const char *name, umode_t mode, + show_func show, store_func store) +{ + sysfs_attr_init(&dev_attr->attr); + dev_attr->attr.name = name; + dev_attr->attr.mode = mode; + dev_attr->show = show; + dev_attr->store = store; +} + +static struct cpld_sensor * add_sensor(struct cpld_data *data, + const char *name, + u8 reg, u8 mask, bool invert, + bool update, umode_t mode, + show_func get, store_func set) +{ + struct cpld_sensor *sensor; + struct device_attribute *a; + + sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return NULL; + a = &sensor->attribute; + + snprintf(sensor->name, sizeof(sensor->name), name); + sensor->reg = reg; + sensor->mask = mask; + sensor->update = update; + sensor->invert = invert; + cpld_dev_attr_init(a, sensor->name, + mode, + get, set); + + if (cpld_add_attribute(data, &a->attr)) + return NULL; + + sensor->next = data->sensors; + data->sensors = sensor; + + return sensor; +} + +static int add_attributes_cmn(struct cpld_data *data, struct attrs **cmn) +{ + u8 reg, i ; + bool invert; + struct attrs *a; + struct base_attrs *b; + + if (NULL == cmn) + return -1; + + for (i = 0; cmn[i]; i++) + { + a = cmn[i]; + + reg = a->reg; + invert = a->invert; + + b = a->base; + if (NULL == b) + break; + + if (add_sensor(data, b->name, + reg, 0xff, invert, + true, b->mode, + b->get, b->set) == NULL) + { + return -ENOMEM; + } + } + return 0; +} + +static int add_attributes_portly(struct cpld_data *data, struct attrs **pa) +{ + char name[NAME_SIZE+1]; + int i, j; + u8 reg, mask, invert; + struct attrs *a; + struct base_attrs *b; + + if (NULL == pa) + return -1; + + + for (i = 0; pa[i]; i++) { + a = pa[i]; + b = a->base; + if (b == NULL) + break; + + invert = a->invert; + for (j = 0; j < data->sfp_num; j++) + { + snprintf(name, NAME_SIZE, "%s_%d", b->name, j+1); + get_reg_bit(a->reg, j, ®, &mask); + + if (add_sensor(data, name, reg, mask, invert, + true, b->mode, b->get, b->set) == NULL) + { + return -ENOMEM; + } + } + } + return 0; +} + +static int add_attributes(struct i2c_client *client, + struct cpld_data *data) +{ + struct model_attrs *m = data->cmn_attr; + + if (m == NULL) + return -EINVAL; + + /* Common attributes.*/ + add_attributes_cmn(data, m->cmn); + + /* Port-wise attributes.*/ + add_attributes_portly(data, m->portly); + + return 0; +} + +static int accton_i2c_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + struct device *dev = &client->dev; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + return -EIO; + } + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) { + return -ENOMEM; + } + + data->model = dev_id->driver_data; + data->cmn_attr = &models_attr[data->model]; + get_sfp_spec(data->model, &data->sfp_num, &data->sfp_types); + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->dev = dev; + dev_info(dev, "chip found\n"); + + status = add_attributes(client, data); + if (status) + goto out_kfree; + + /* + * If there are no attributes, something is wrong. + * Bail out instead of trying to register nothing. + */ + if (!data->num_attributes) { + dev_err(dev, "No attributes found\n"); + status = -ENODEV; + goto out_kfree; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &data->group); + if (status) { + goto out_kfree; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + accton_i2c_cpld_add_client(client); + dev_info(dev, "%s: cpld '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; +exit_remove: + sysfs_remove_group(&client->dev.kobj, &data->group); +out_kfree: + kfree(data->group.attrs); + return status; + +} + +static int accton_i2c_cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->group); + kfree(data->group.attrs); + accton_i2c_cpld_remove_client(client); + return 0; +} + +int accton_i2c_cpld_read(u8 cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_read_byte_data(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(accton_i2c_cpld_read); + +int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_write_byte_data(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(accton_i2c_cpld_write); + + +static const struct i2c_device_id accton_i2c_cpld_id[] = { + { "cpld_as7712", AS7712_32X}, + { "cpld_as7716", AS7716_32X}, + { "cpld_as7816", AS7816_64X}, + { "cpld_as7312", AS7312_54X}, + { "cpld_plain", PLAIN_CPLD}, + { }, +}; +MODULE_DEVICE_TABLE(i2c, accton_i2c_cpld_id); + +static struct i2c_driver accton_i2c_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "accton_i2c_cpld", + }, + .probe = accton_i2c_cpld_probe, + .remove = accton_i2c_cpld_remove, + .id_table = accton_i2c_cpld_id, + .address_list = normal_i2c, +}; + + +static int __init accton_i2c_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&accton_i2c_cpld_driver); +} + +static void __exit accton_i2c_cpld_exit(void) +{ + i2c_del_driver(&accton_i2c_cpld_driver); +} + +module_init(accton_i2c_cpld_init); +module_exit(accton_i2c_cpld_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_i2c_cpld driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/common/modules/accton_pmbus_3y.c b/platform/broadcom/sonic-platform-modules-accton/common/modules/accton_pmbus_3y.c new file mode 100644 index 00000000000..ed176189cdc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/common/modules/accton_pmbus_3y.c @@ -0,0 +1,1978 @@ +/* + * Hardware monitoring driver for 3Y power devices. + * + * Copyright (C) 2018 Accton Technology Corporation. + * Roy Lee + * + * Based on pmbus.c, pmbus.h and pmbus_core.c. + * Copyright 2012 Guenter Roeck/Ericsson AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pmbus.h" + + +enum chips { + YM2651, + YM2401, + YM2851, + LIMITED_CHIPS, +}; + + +/* + * Number of additional attribute pointers to allocate + * with each call to krealloc + */ +#define PMBUS_ATTR_ALLOC_SIZE 32 + +/* + * Index into status register array, per status register group + */ +#define PB_STATUS_BASE 0 +#define PB_STATUS_VOUT_BASE (PB_STATUS_BASE + PMBUS_PAGES) +#define PB_STATUS_IOUT_BASE (PB_STATUS_VOUT_BASE + PMBUS_PAGES) +#define PB_STATUS_FAN_BASE (PB_STATUS_IOUT_BASE + PMBUS_PAGES) +#define PB_STATUS_FAN34_BASE (PB_STATUS_FAN_BASE + PMBUS_PAGES) +#define PB_STATUS_TEMP_BASE (PB_STATUS_FAN34_BASE + PMBUS_PAGES) +#define PB_STATUS_INPUT_BASE (PB_STATUS_TEMP_BASE + PMBUS_PAGES) +#define PB_STATUS_VMON_BASE (PB_STATUS_INPUT_BASE + 1) + +#define PB_NUM_STATUS_REG (PB_STATUS_VMON_BASE + 1) + +#define PMBUS_NAME_SIZE 24 + +struct pmbus_sensor { + struct pmbus_sensor *next; + char name[PMBUS_NAME_SIZE]; /* sysfs sensor name */ + struct device_attribute attribute; + u8 page; /* page number */ + u16 reg; /* register */ + enum pmbus_sensor_classes class; /* sensor class */ + bool update; /* runtime sensor update needed */ + int data; /* Sensor data. + Negative if there was a read error */ +}; +#define to_pmbus_sensor(_attr) \ + container_of(_attr, struct pmbus_sensor, attribute) + +struct pmbus_boolean { + char name[PMBUS_NAME_SIZE]; /* sysfs boolean name */ + struct sensor_device_attribute attribute; + struct pmbus_sensor *s1; + struct pmbus_sensor *s2; +}; +#define to_pmbus_boolean(_attr) \ + container_of(_attr, struct pmbus_boolean, attribute) + +struct pmbus_label { + char name[PMBUS_NAME_SIZE]; /* sysfs label name */ + struct device_attribute attribute; + char label[PMBUS_NAME_SIZE]; /* label */ +}; +#define to_pmbus_label(_attr) \ + container_of(_attr, struct pmbus_label, attribute) + +struct pmbus_data { + struct device *dev; + struct device *hwmon_dev; + + u32 flags; /* from platform data */ + + int exponent[PMBUS_PAGES]; + /* linear mode: exponent for output voltages */ + + const struct pmbus_driver_info *info; + + int max_attributes; + int num_attributes; + struct attribute_group group; + const struct attribute_group *groups[2]; + + struct pmbus_sensor *sensors; + + struct mutex update_lock; + bool valid; + unsigned long last_updated; /* in jiffies */ + + /* + * A single status register covers multiple attributes, + * so we keep them all together. + */ + u8 status[PB_NUM_STATUS_REG]; + u8 status_register; + + u8 currpage; + bool linear_16; +}; + + +static int limited_models(const struct i2c_device_id *id); + +int _pmbus_set_page(struct i2c_client *client, u8 page) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + int rv = 0; + int newpage; + + if (page != data->currpage) { + rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page); + newpage = i2c_smbus_read_byte_data(client, PMBUS_PAGE); + if (newpage != page) + rv = -EIO; + else + data->currpage = page; + } + return 0; +} + +/* + * _pmbus_write_byte() is similar to pmbus_write_byte(), but checks if + * a device specific mapping function exists and calls it if necessary. + */ +static int _pmbus_write_byte(struct i2c_client *client, int page, u8 value) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + const struct pmbus_driver_info *info = data->info; + int status; + + if (info->write_byte) { + status = info->write_byte(client, page, value); + if (status != -ENODATA) + return status; + } + /*Ignore page*/ + return i2c_smbus_write_byte(client, value);; +} + +/* + * _pmbus_write_word_data() is similar to pmbus_write_word_data(), but checks if + * a device specific mapping function exists and calls it if necessary. + */ +static int _pmbus_write_word_data(struct i2c_client *client, int page, int reg, + u16 word) +{ + if (reg >= PMBUS_VIRT_BASE) + return -ENXIO; + /*Ignore page*/ + return i2c_smbus_write_word_data(client, reg, word); +} + +/* + * _pmbus_read_word_data() is similar to pmbus_read_word_data(), but checks if + * a device specific mapping function exists and calls it if necessary. + */ +static int _pmbus_read_word_data(struct i2c_client *client, int page, int reg) +{ + /*Ignore page*/ + return i2c_smbus_read_word_data(client, reg);; +} + +/* + * _pmbus_read_byte_data() is similar to pmbus_read_byte_data(), but checks if + * a device specific mapping function exists and calls it if necessary. + */ +static int _pmbus_read_byte_data(struct i2c_client *client, int page, int reg) +{ + if (reg >= PMBUS_VIRT_BASE) + return -ENXIO; + + /*Ignore page*/ + return i2c_smbus_read_byte_data(client, reg); +} + +static void pmbus_clear_fault_page(struct i2c_client *client, int page) +{ + _pmbus_write_byte(client, page, PMBUS_CLEAR_FAULTS); +} + + +static int pmbus_check_status_cml(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + int status, status2; + + status = _pmbus_read_byte_data(client, -1, data->status_register); + if (status < 0 || (status & PB_STATUS_CML)) { + status2 = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML); + if (status2 < 0 || (status2 & PB_CML_FAULT_INVALID_COMMAND)) + return -EIO; + } + return 0; +} + +static bool pmbus_check_register(struct i2c_client *client, + int (*func)(struct i2c_client *client, + int page, int reg), + int page, int reg) +{ + int rv; + struct pmbus_data *data = i2c_get_clientdata(client); + + if((data->flags & PMBUS_SKIP_STATUS_CHECK)) + return 1; + + rv = func(client, page, reg); + if (rv >= 0) + rv = pmbus_check_status_cml(client); + pmbus_clear_fault_page(client, -1); + return rv >= 0; +} + +static struct _pmbus_status { + u32 func; + u16 base; + u16 reg; +} pmbus_status[] = { + { PMBUS_HAVE_STATUS_VOUT, PB_STATUS_VOUT_BASE, PMBUS_STATUS_VOUT }, + { PMBUS_HAVE_STATUS_IOUT, PB_STATUS_IOUT_BASE, PMBUS_STATUS_IOUT }, + { PMBUS_HAVE_STATUS_TEMP, PB_STATUS_TEMP_BASE, + PMBUS_STATUS_TEMPERATURE + }, + { PMBUS_HAVE_STATUS_FAN12, PB_STATUS_FAN_BASE, PMBUS_STATUS_FAN_12 }, + { PMBUS_HAVE_STATUS_FAN34, PB_STATUS_FAN34_BASE, PMBUS_STATUS_FAN_34 }, +}; + +void _pmbus_clear_faults(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + int i; + + for (i = 0; i < data->info->pages; i++) + pmbus_clear_fault_page(client, i); +} +static struct pmbus_data *pmbus_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct pmbus_data *data = i2c_get_clientdata(client); + const struct pmbus_driver_info *info = data->info; + struct pmbus_sensor *sensor; + + mutex_lock(&data->update_lock); + if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { + int i, j; + + for (i = 0; i < info->pages; i++) { + data->status[PB_STATUS_BASE + i] + = _pmbus_read_byte_data(client, i, + data->status_register); + for (j = 0; j < ARRAY_SIZE(pmbus_status); j++) { + struct _pmbus_status *s = &pmbus_status[j]; + + if (!(info->func[i] & s->func)) + continue; + data->status[s->base + i] + = _pmbus_read_byte_data(client, i, + s->reg); + } + } + + if (info->func[0] & PMBUS_HAVE_STATUS_INPUT) + data->status[PB_STATUS_INPUT_BASE] + = _pmbus_read_byte_data(client, 0, + PMBUS_STATUS_INPUT); + + if (info->func[0] & PMBUS_HAVE_STATUS_VMON) + data->status[PB_STATUS_VMON_BASE] + = _pmbus_read_byte_data(client, 0, + PMBUS_VIRT_STATUS_VMON); + + for (sensor = data->sensors; sensor; sensor = sensor->next) { + if (!data->valid || sensor->update) + sensor->data + = _pmbus_read_word_data(client, + sensor->page, + sensor->reg); + } + _pmbus_clear_faults(client); + data->last_updated = jiffies; + data->valid = 1; + } + mutex_unlock(&data->update_lock); + return data; +} + +/* + * Convert linear sensor values to milli- or micro-units + * depending on sensor type. + */ +static long pmbus_reg2data_linear(struct pmbus_data *data, + struct pmbus_sensor *sensor) +{ + s16 exponent; + s32 mantissa; + long val; + + /* LINEAR16 */ + if ( data->linear_16 && + sensor->class == PSC_VOLTAGE_OUT) { + exponent = data->exponent[sensor->page]; + mantissa = (u16) sensor->data; + } else + { /* LINEAR11 */ + exponent = ((s16)sensor->data) >> 11; + mantissa = ((s16)((sensor->data & 0x7ff) << 5)) >> 5; + } + + val = mantissa; + + /* scale result to milli-units for all sensors except fans */ + if (sensor->class != PSC_FAN) + val = val * 1000L; + + /* scale result to micro-units for power sensors */ + if (sensor->class == PSC_POWER) + val = val * 1000L; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +/* + * Convert direct sensor values to milli- or micro-units + * depending on sensor type. + */ +static long pmbus_reg2data_direct(struct pmbus_data *data, + struct pmbus_sensor *sensor) +{ + long val = (s16) sensor->data; + long m, b, R; + + m = data->info->m[sensor->class]; + b = data->info->b[sensor->class]; + R = data->info->R[sensor->class]; + + if (m == 0) + return 0; + + /* X = 1/m * (Y * 10^-R - b) */ + R = -R; + /* scale result to milli-units for everything but fans */ + if (sensor->class != PSC_FAN) { + R += 3; + b *= 1000; + } + + /* scale result to micro-units for power sensors */ + if (sensor->class == PSC_POWER) { + R += 3; + b *= 1000; + } + + while (R > 0) { + val *= 10; + R--; + } + while (R < 0) { + val = DIV_ROUND_CLOSEST(val, 10); + R++; + } + + return (val - b) / m; +} + +/* + * Convert VID sensor values to milli- or micro-units + * depending on sensor type. + * We currently only support VR11. + */ +static long pmbus_reg2data_vid(struct pmbus_data *data, + struct pmbus_sensor *sensor) +{ + long val = sensor->data; + + if (val < 0x02 || val > 0xb2) + return 0; + return DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100); +} + +static long pmbus_reg2data(struct pmbus_data *data, struct pmbus_sensor *sensor) +{ + long val; + + switch (data->info->format[sensor->class]) { + case direct: + val = pmbus_reg2data_direct(data, sensor); + break; + case vid: + val = pmbus_reg2data_vid(data, sensor); + break; + case linear: + default: + val = pmbus_reg2data_linear(data, sensor); + break; + } + return val; +} + +#define MAX_MANTISSA (1023 * 1000) +#define MIN_MANTISSA (511 * 1000) + +static u16 pmbus_data2reg_linear(struct pmbus_data *data, + struct pmbus_sensor *sensor, long val) +{ + s16 exponent = 0, mantissa; + bool negative = false; + + /* simple case */ + if (val == 0) + return 0; + + if (data->linear_16 && + sensor->class == PSC_VOLTAGE_OUT) { + /* LINEAR16 does not support negative voltages */ + if (val < 0) + return 0; + + /* + * For a static exponents, we don't have a choice + * but to adjust the value to it. + */ + if (data->exponent[sensor->page] < 0) + val <<= -data->exponent[sensor->page]; + else + val >>= data->exponent[sensor->page]; + val = DIV_ROUND_CLOSEST(val, 1000); + return val & 0xffff; + } + + if (val < 0) { + negative = true; + val = -val; + } + + /* Power is in uW. Convert to mW before converting. */ + if (sensor->class == PSC_POWER) + val = DIV_ROUND_CLOSEST(val, 1000L); + + /* + * For simplicity, convert fan data to milli-units + * before calculating the exponent. + */ + if (sensor->class == PSC_FAN) + val = val * 1000; + + /* Reduce large mantissa until it fits into 10 bit */ + while (val >= MAX_MANTISSA && exponent < 15) { + exponent++; + val >>= 1; + } + /* Increase small mantissa to improve precision */ + while (val < MIN_MANTISSA && exponent > -15) { + exponent--; + val <<= 1; + } + + /* Convert mantissa from milli-units to units */ + mantissa = DIV_ROUND_CLOSEST(val, 1000); + + /* Ensure that resulting number is within range */ + if (mantissa > 0x3ff) + mantissa = 0x3ff; + + /* restore sign */ + if (negative) + mantissa = -mantissa; + + /* Convert to 5 bit exponent, 11 bit mantissa */ + return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800); +} + +static u16 pmbus_data2reg_direct(struct pmbus_data *data, + struct pmbus_sensor *sensor, long val) +{ + long m, b, R; + + m = data->info->m[sensor->class]; + b = data->info->b[sensor->class]; + R = data->info->R[sensor->class]; + + /* Power is in uW. Adjust R and b. */ + if (sensor->class == PSC_POWER) { + R -= 3; + b *= 1000; + } + + /* Calculate Y = (m * X + b) * 10^R */ + if (sensor->class != PSC_FAN) { + R -= 3; /* Adjust R and b for data in milli-units */ + b *= 1000; + } + val = val * m + b; + + while (R > 0) { + val *= 10; + R--; + } + while (R < 0) { + val = DIV_ROUND_CLOSEST(val, 10); + R++; + } + + return val; +} + +static u16 pmbus_data2reg_vid(struct pmbus_data *data, + struct pmbus_sensor *sensor, long val) +{ + val = clamp_val(val, 500, 1600); + + return 2 + DIV_ROUND_CLOSEST((1600 - val) * 100, 625); +} + +static u16 pmbus_data2reg(struct pmbus_data *data, + struct pmbus_sensor *sensor, long val) +{ + u16 regval; + + switch (data->info->format[sensor->class]) { + case direct: + regval = pmbus_data2reg_direct(data, sensor, val); + break; + case vid: + regval = pmbus_data2reg_vid(data, sensor, val); + break; + case linear: + default: + regval = pmbus_data2reg_linear(data, sensor, val); + break; + } + return regval; +} + +/* + * Return boolean calculated from converted data. + * defines a status register index and mask. + * The mask is in the lower 8 bits, the register index is in bits 8..23. + * + * The associated pmbus_boolean structure contains optional pointers to two + * sensor attributes. If specified, those attributes are compared against each + * other to determine if a limit has been exceeded. + * + * If the sensor attribute pointers are NULL, the function returns true if + * (status[reg] & mask) is true. + * + * If sensor attribute pointers are provided, a comparison against a specified + * limit has to be performed to determine the boolean result. + * In this case, the function returns true if v1 >= v2 (where v1 and v2 are + * sensor values referenced by sensor attribute pointers s1 and s2). + * + * To determine if an object exceeds upper limits, specify = . + * To determine if an object exceeds lower limits, specify = . + * + * If a negative value is stored in any of the referenced registers, this value + * reflects an error code which will be returned. + */ +static int pmbus_get_boolean(struct pmbus_data *data, struct pmbus_boolean *b, + int index) +{ + struct pmbus_sensor *s1 = b->s1; + struct pmbus_sensor *s2 = b->s2; + u16 reg = (index >> 8) & 0xffff; + u8 mask = index & 0xff; + int ret, status; + u8 regval; + + status = data->status[reg]; + if (status < 0) + return status; + + regval = status & mask; + if (!s1 && !s2) { + ret = !!regval; + } else if (!s1 || !s2) { + WARN(1, "Bad boolean descriptor %p: s1=%p, s2=%p\n", b, s1, s2); + return 0; + } else { + long v1, v2; + + if (s1->data < 0) + return s1->data; + if (s2->data < 0) + return s2->data; + + v1 = pmbus_reg2data(data, s1); + v2 = pmbus_reg2data(data, s2); + ret = !!(regval && v1 >= v2); + } + return ret; +} + +static ssize_t pmbus_show_boolean(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct pmbus_boolean *boolean = to_pmbus_boolean(attr); + struct pmbus_data *data = pmbus_update_device(dev); + int val; + + val = pmbus_get_boolean(data, boolean, attr->index); + if (val < 0) { + return snprintf(buf, PAGE_SIZE, "%d\n", 1); + } + return snprintf(buf, PAGE_SIZE, "%d\n", val); +} + +static ssize_t pmbus_show_sensor(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct pmbus_data *data = pmbus_update_device(dev); + struct pmbus_sensor *sensor = to_pmbus_sensor(devattr); + + + if (sensor->data < 0) { + return snprintf(buf, PAGE_SIZE, "%d\n", 0); + } + + + return snprintf(buf, PAGE_SIZE, "%ld\n", pmbus_reg2data(data, sensor)); +} + +static ssize_t pmbus_set_sensor(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct pmbus_data *data = i2c_get_clientdata(client); + struct pmbus_sensor *sensor = to_pmbus_sensor(devattr); + ssize_t rv = count; + long val = 0; + int ret; + u16 regval; + + if (kstrtol(buf, 10, &val) < 0) + return -EINVAL; + + mutex_lock(&data->update_lock); + regval = pmbus_data2reg(data, sensor, val); + ret = _pmbus_write_word_data(client, sensor->page, sensor->reg, regval); + if (ret < 0) + rv = ret; + else + sensor->data = regval; + mutex_unlock(&data->update_lock); + return rv; +} + +static ssize_t pmbus_show_label(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct pmbus_label *label = to_pmbus_label(da); + + return snprintf(buf, PAGE_SIZE, "%s\n", label->label); +} + +static int pmbus_add_attribute(struct pmbus_data *data, struct attribute *attr) +{ + if (data->num_attributes >= data->max_attributes - 1) { + int new_max_attrs = data->max_attributes + PMBUS_ATTR_ALLOC_SIZE; + void *new_attrs = krealloc(data->group.attrs, + new_max_attrs * sizeof(void *), + GFP_KERNEL); + if (!new_attrs) + return -ENOMEM; + data->group.attrs = new_attrs; + data->max_attributes = new_max_attrs; + } + + + + data->group.attrs[data->num_attributes++] = attr; + data->group.attrs[data->num_attributes] = NULL; + return 0; +} + +static void pmbus_dev_attr_init(struct device_attribute *dev_attr, + const char *name, + umode_t mode, + ssize_t (*show)(struct device *dev, + struct device_attribute *attr, + char *buf), + ssize_t (*store)(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count)) +{ + sysfs_attr_init(&dev_attr->attr); + dev_attr->attr.name = name; + dev_attr->attr.mode = mode; + dev_attr->show = show; + dev_attr->store = store; +} + +static void pmbus_attr_init(struct sensor_device_attribute *a, + const char *name, + umode_t mode, + ssize_t (*show)(struct device *dev, + struct device_attribute *attr, + char *buf), + ssize_t (*store)(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count), + int idx) +{ + pmbus_dev_attr_init(&a->dev_attr, name, mode, show, store); + a->index = idx; +} + +static int pmbus_add_boolean(struct pmbus_data *data, + const char *name, const char *type, int seq, + struct pmbus_sensor *s1, + struct pmbus_sensor *s2, + u16 reg, u8 mask) +{ + struct pmbus_boolean *boolean; + struct sensor_device_attribute *a; + + boolean = devm_kzalloc(data->dev, sizeof(*boolean), GFP_KERNEL); + if (!boolean) + return -ENOMEM; + + a = &boolean->attribute; + + snprintf(boolean->name, sizeof(boolean->name), "%s%d_%s", + name, seq, type); + boolean->s1 = s1; + boolean->s2 = s2; + pmbus_attr_init(a, boolean->name, S_IRUGO, pmbus_show_boolean, NULL, + (reg << 8) | mask); + + return pmbus_add_attribute(data, &a->dev_attr.attr); +} + +static struct pmbus_sensor *pmbus_add_sensor(struct pmbus_data *data, + const char *name, const char *type, + int seq, int page, int reg, + enum pmbus_sensor_classes class, + bool update, bool readonly) +{ + struct pmbus_sensor *sensor; + struct device_attribute *a; + + sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return NULL; + a = &sensor->attribute; + + snprintf(sensor->name, sizeof(sensor->name), "%s%d_%s", + name, seq, type); + sensor->page = page; + sensor->reg = reg; + sensor->class = class; + sensor->update = update; + pmbus_dev_attr_init(a, sensor->name, + readonly ? S_IRUGO : S_IRUGO | S_IWUSR, + pmbus_show_sensor, pmbus_set_sensor); + + if (pmbus_add_attribute(data, &a->attr)) + return NULL; + + sensor->next = data->sensors; + data->sensors = sensor; + + return sensor; +} + +static int pmbus_add_label(struct pmbus_data *data, + const char *name, int seq, + const char *lstring, int index) +{ + struct pmbus_label *label; + struct device_attribute *a; + + label = devm_kzalloc(data->dev, sizeof(*label), GFP_KERNEL); + if (!label) + return -ENOMEM; + + a = &label->attribute; + + snprintf(label->name, sizeof(label->name), "%s%d_label", name, seq); + if (!index) + strncpy(label->label, lstring, sizeof(label->label) - 1); + else + snprintf(label->label, sizeof(label->label), "%s%d", lstring, + index); + + pmbus_dev_attr_init(a, label->name, S_IRUGO, pmbus_show_label, NULL); + return pmbus_add_attribute(data, &a->attr); +} + +/* + * Search for attributes. Allocate sensors, booleans, and labels as needed. + */ + +/* + * The pmbus_limit_attr structure describes a single limit attribute + * and its associated alarm attribute. + */ +struct pmbus_limit_attr { + u16 reg; /* Limit register */ + u16 sbit; /* Alarm attribute status bit */ + bool update; /* True if register needs updates */ + bool low; /* True if low limit; for limits with compare + functions only */ + const char *attr; /* Attribute name */ + const char *alarm; /* Alarm attribute name */ +}; + +/* + * The pmbus_sensor_attr structure describes one sensor attribute. This + * description includes a reference to the associated limit attributes. + */ +struct pmbus_sensor_attr { + u16 reg; /* sensor register */ + u8 gbit; /* generic status bit */ + u8 nlimit; /* # of limit registers */ + enum pmbus_sensor_classes class;/* sensor class */ + const char *label; /* sensor label */ + bool paged; /* true if paged sensor */ + bool update; /* true if update needed */ + bool compare; /* true if compare function needed */ + u32 func; /* sensor mask */ + u32 sfunc; /* sensor status mask */ + int sbase; /* status base register */ + const struct pmbus_limit_attr *limit;/* limit registers */ +}; + +/* + * Add a set of limit attributes and, if supported, the associated + * alarm attributes. + * returns 0 if no alarm register found, 1 if an alarm register was found, + * < 0 on errors. + */ +static int pmbus_add_limit_attrs(struct i2c_client *client, + struct pmbus_data *data, + const struct pmbus_driver_info *info, + const char *name, int index, int page, + struct pmbus_sensor *base, + const struct pmbus_sensor_attr *attr) +{ + const struct pmbus_limit_attr *l = attr->limit; + int nlimit = attr->nlimit; + int have_alarm = 0; + int i, ret; + struct pmbus_sensor *curr; + + for (i = 0; i < nlimit; i++) { + if (_pmbus_check_word_register(client, page, l->reg)) + { + curr = pmbus_add_sensor(data, name, l->attr, index, + page, l->reg, attr->class, + attr->update || l->update, + false); + if (!curr) + return -ENOMEM; + if (l->sbit && (info->func[page] & attr->sfunc)) { + ret = pmbus_add_boolean(data, name, + l->alarm, index, + attr->compare ? l->low ? curr : base + : NULL, + attr->compare ? l->low ? base : curr + : NULL, + attr->sbase + page, l->sbit); + if (ret) + return ret; + have_alarm = 1; + } + } + l++; + } + return have_alarm; +} + +bool _pmbus_check_byte_register(struct i2c_client *client, int page, int reg) +{ + return pmbus_check_register(client, _pmbus_read_byte_data, page, reg); +} + + +bool _pmbus_check_word_register(struct i2c_client *client, int page, int reg) +{ + return pmbus_check_register(client, _pmbus_read_word_data, page, reg); +} + +static int pmbus_add_sensor_attrs_one(struct i2c_client *client, + struct pmbus_data *data, + const struct pmbus_driver_info *info, + const char *name, + int index, int page, + const struct pmbus_sensor_attr *attr) +{ + struct pmbus_sensor *base; + int ret; + + if (attr->label) { + ret = pmbus_add_label(data, name, index, attr->label, + attr->paged ? page + 1 : 0); + if (ret) + return ret; + } + base = pmbus_add_sensor(data, name, "input", index, page, attr->reg, + attr->class, true, true); + + + if (!base) + return -ENOMEM; + + if (attr->sfunc) { + ret = pmbus_add_limit_attrs(client, data, info, name, + index, page, base, attr); + if (ret < 0) + return ret; + /* + * Add generic alarm attribute only if there are no individual + * alarm attributes, if there is a global alarm bit, and if + * the generic status register for this page is accessible. + */ + if (!ret && attr->gbit && + _pmbus_check_byte_register(client, page, + data->status_register)) { + ret = pmbus_add_boolean(data, name, "alarm", index, + NULL, NULL, + PB_STATUS_BASE + page, + attr->gbit); + if (ret) + return ret; + } + } + return 0; +} + +static int pmbus_add_sensor_attrs(struct i2c_client *client, + struct pmbus_data *data, + const char *name, + const struct pmbus_sensor_attr *attrs, + int nattrs) +{ + const struct pmbus_driver_info *info = data->info; + int index, i; + int ret; + + index = 1; + for (i = 0; i < nattrs; i++) { + int page, pages; + + pages = attrs->paged ? info->pages : 1; + for (page = 0; page < pages; page++) { + if (!(info->func[page] & attrs->func)) + continue; + ret = pmbus_add_sensor_attrs_one(client, data, info, + name, index, page, + attrs); + if (ret) + return ret; + index++; + } + attrs++; + } + return 0; +} + +static const struct pmbus_limit_attr vin_limit_attrs[] = { + { + .reg = PMBUS_VIN_UV_WARN_LIMIT, + .attr = "min", + .alarm = "min_alarm", + .sbit = PB_VOLTAGE_UV_WARNING, + }, { + .reg = PMBUS_VIN_UV_FAULT_LIMIT, + .attr = "lcrit", + .alarm = "lcrit_alarm", + .sbit = PB_VOLTAGE_UV_FAULT, + }, { + .reg = PMBUS_VIN_OV_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_VOLTAGE_OV_WARNING, + }, { + .reg = PMBUS_VIN_OV_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_VOLTAGE_OV_FAULT, + }, { + .reg = PMBUS_VIRT_READ_VIN_AVG, + .update = true, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_VIN_MIN, + .update = true, + .attr = "lowest", + }, { + .reg = PMBUS_VIRT_READ_VIN_MAX, + .update = true, + .attr = "highest", + }, { + .reg = PMBUS_VIRT_RESET_VIN_HISTORY, + .attr = "reset_history", + }, +}; + +static const struct pmbus_limit_attr vmon_limit_attrs[] = { + { + .reg = PMBUS_VIRT_VMON_UV_WARN_LIMIT, + .attr = "min", + .alarm = "min_alarm", + .sbit = PB_VOLTAGE_UV_WARNING, + }, { + .reg = PMBUS_VIRT_VMON_UV_FAULT_LIMIT, + .attr = "lcrit", + .alarm = "lcrit_alarm", + .sbit = PB_VOLTAGE_UV_FAULT, + }, { + .reg = PMBUS_VIRT_VMON_OV_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_VOLTAGE_OV_WARNING, + }, { + .reg = PMBUS_VIRT_VMON_OV_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_VOLTAGE_OV_FAULT, + } +}; + +static const struct pmbus_limit_attr vout_limit_attrs[] = { + { + .reg = PMBUS_VOUT_UV_WARN_LIMIT, + .attr = "min", + .alarm = "min_alarm", + .sbit = PB_VOLTAGE_UV_WARNING, + }, { + .reg = PMBUS_VOUT_UV_FAULT_LIMIT, + .attr = "lcrit", + .alarm = "lcrit_alarm", + .sbit = PB_VOLTAGE_UV_FAULT, + }, { + .reg = PMBUS_VOUT_OV_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_VOLTAGE_OV_WARNING, + }, { + .reg = PMBUS_VOUT_OV_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_VOLTAGE_OV_FAULT, + }, { + .reg = PMBUS_VIRT_READ_VOUT_AVG, + .update = true, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_VOUT_MIN, + .update = true, + .attr = "lowest", + }, { + .reg = PMBUS_VIRT_READ_VOUT_MAX, + .update = true, + .attr = "highest", + }, { + .reg = PMBUS_VIRT_RESET_VOUT_HISTORY, + .attr = "reset_history", + } +}; + +static const struct pmbus_sensor_attr voltage_attributes[] = { + { + .reg = PMBUS_READ_VIN, + .class = PSC_VOLTAGE_IN, + .label = "vin", + .func = PMBUS_HAVE_VIN, + .sfunc = PMBUS_HAVE_STATUS_INPUT, + .sbase = PB_STATUS_INPUT_BASE, + .gbit = PB_STATUS_VIN_UV, + .limit = vin_limit_attrs, + .nlimit = ARRAY_SIZE(vin_limit_attrs), + }, { + .reg = PMBUS_VIRT_READ_VMON, + .class = PSC_VOLTAGE_IN, + .label = "vmon", + .func = PMBUS_HAVE_VMON, + .sfunc = PMBUS_HAVE_STATUS_VMON, + .sbase = PB_STATUS_VMON_BASE, + .limit = vmon_limit_attrs, + .nlimit = ARRAY_SIZE(vmon_limit_attrs), + }, { + .reg = PMBUS_READ_VCAP, + .class = PSC_VOLTAGE_IN, + .label = "vcap", + .func = PMBUS_HAVE_VCAP, + }, { + .reg = PMBUS_READ_VOUT, + .class = PSC_VOLTAGE_OUT, + .label = "vout", + .paged = true, + .func = PMBUS_HAVE_VOUT, + .sfunc = PMBUS_HAVE_STATUS_VOUT, + .sbase = PB_STATUS_VOUT_BASE, + .gbit = PB_STATUS_VOUT_OV, + .limit = vout_limit_attrs, + .nlimit = ARRAY_SIZE(vout_limit_attrs), + } +}; + +/* Current attributes */ + +static const struct pmbus_limit_attr iin_limit_attrs[] = { + { + .reg = PMBUS_IIN_OC_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_IIN_OC_WARNING, + }, { + .reg = PMBUS_IIN_OC_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_IIN_OC_FAULT, + }, { + .reg = PMBUS_VIRT_READ_IIN_AVG, + .update = true, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_IIN_MIN, + .update = true, + .attr = "lowest", + }, { + .reg = PMBUS_VIRT_READ_IIN_MAX, + .update = true, + .attr = "highest", + }, { + .reg = PMBUS_VIRT_RESET_IIN_HISTORY, + .attr = "reset_history", + } +}; + +static const struct pmbus_limit_attr iout_limit_attrs[] = { + { + .reg = PMBUS_IOUT_OC_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_IOUT_OC_WARNING, + }, { + .reg = PMBUS_IOUT_UC_FAULT_LIMIT, + .attr = "lcrit", + .alarm = "lcrit_alarm", + .sbit = PB_IOUT_UC_FAULT, + }, { + .reg = PMBUS_IOUT_OC_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_IOUT_OC_FAULT, + }, { + .reg = PMBUS_VIRT_READ_IOUT_AVG, + .update = true, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_IOUT_MIN, + .update = true, + .attr = "lowest", + }, { + .reg = PMBUS_VIRT_READ_IOUT_MAX, + .update = true, + .attr = "highest", + }, { + .reg = PMBUS_VIRT_RESET_IOUT_HISTORY, + .attr = "reset_history", + } +}; + +static const struct pmbus_sensor_attr current_attributes[] = { + { + .reg = PMBUS_READ_IIN, + .class = PSC_CURRENT_IN, + .label = "iin", + .func = PMBUS_HAVE_IIN, + .sfunc = PMBUS_HAVE_STATUS_INPUT, + .sbase = PB_STATUS_INPUT_BASE, + .limit = iin_limit_attrs, + .nlimit = ARRAY_SIZE(iin_limit_attrs), + }, { + .reg = PMBUS_READ_IOUT, + .class = PSC_CURRENT_OUT, + .label = "iout", + .paged = true, + .func = PMBUS_HAVE_IOUT, + .sfunc = PMBUS_HAVE_STATUS_IOUT, + .sbase = PB_STATUS_IOUT_BASE, + .gbit = PB_STATUS_IOUT_OC, + .limit = iout_limit_attrs, + .nlimit = ARRAY_SIZE(iout_limit_attrs), + } +}; + +/* Power attributes */ + +static const struct pmbus_limit_attr pin_limit_attrs[] = { + { + .reg = PMBUS_PIN_OP_WARN_LIMIT, + .attr = "max", + .alarm = "alarm", + .sbit = PB_PIN_OP_WARNING, + }, { + .reg = PMBUS_VIRT_READ_PIN_AVG, + .update = true, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_PIN_MAX, + .update = true, + .attr = "input_highest", + }, { + .reg = PMBUS_VIRT_RESET_PIN_HISTORY, + .attr = "reset_history", + } +}; + +static const struct pmbus_limit_attr pout_limit_attrs[] = { + { + .reg = PMBUS_POUT_MAX, + .attr = "cap", + .alarm = "cap_alarm", + .sbit = PB_POWER_LIMITING, + }, { + .reg = PMBUS_POUT_OP_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_POUT_OP_WARNING, + }, { + .reg = PMBUS_POUT_OP_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_POUT_OP_FAULT, + }, { + .reg = PMBUS_VIRT_READ_POUT_AVG, + .update = true, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_POUT_MAX, + .update = true, + .attr = "input_highest", + }, { + .reg = PMBUS_VIRT_RESET_POUT_HISTORY, + .attr = "reset_history", + } +}; + +static const struct pmbus_sensor_attr power_attributes[] = { + { + .reg = PMBUS_READ_PIN, + .class = PSC_POWER, + .label = "pin", + .func = PMBUS_HAVE_PIN, + .sfunc = PMBUS_HAVE_STATUS_INPUT, + .sbase = PB_STATUS_INPUT_BASE, + .limit = pin_limit_attrs, + .nlimit = ARRAY_SIZE(pin_limit_attrs), + }, { + .reg = PMBUS_READ_POUT, + .class = PSC_POWER, + .label = "pout", + .paged = true, + .func = PMBUS_HAVE_POUT, + .sfunc = PMBUS_HAVE_STATUS_IOUT, + .sbase = PB_STATUS_IOUT_BASE, + .limit = pout_limit_attrs, + .nlimit = ARRAY_SIZE(pout_limit_attrs), + } +}; + +/* Temperature atributes */ + +static const struct pmbus_limit_attr temp_limit_attrs[] = { + { + .reg = PMBUS_UT_WARN_LIMIT, + .low = true, + .attr = "min", + .alarm = "min_alarm", + .sbit = PB_TEMP_UT_WARNING, + }, { + .reg = PMBUS_UT_FAULT_LIMIT, + .low = true, + .attr = "lcrit", + .alarm = "lcrit_alarm", + .sbit = PB_TEMP_UT_FAULT, + }, { + .reg = PMBUS_OT_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_TEMP_OT_WARNING, + }, { + .reg = PMBUS_OT_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_TEMP_OT_FAULT, + }, { + .reg = PMBUS_VIRT_READ_TEMP_MIN, + .attr = "lowest", + }, { + .reg = PMBUS_VIRT_READ_TEMP_AVG, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_TEMP_MAX, + .attr = "highest", + }, { + .reg = PMBUS_VIRT_RESET_TEMP_HISTORY, + .attr = "reset_history", + } +}; + +static const struct pmbus_limit_attr temp_limit_attrs2[] = { + { + .reg = PMBUS_UT_WARN_LIMIT, + .low = true, + .attr = "min", + .alarm = "min_alarm", + .sbit = PB_TEMP_UT_WARNING, + }, { + .reg = PMBUS_UT_FAULT_LIMIT, + .low = true, + .attr = "lcrit", + .alarm = "lcrit_alarm", + .sbit = PB_TEMP_UT_FAULT, + }, { + .reg = PMBUS_OT_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_TEMP_OT_WARNING, + }, { + .reg = PMBUS_OT_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_TEMP_OT_FAULT, + }, { + .reg = PMBUS_VIRT_READ_TEMP2_MIN, + .attr = "lowest", + }, { + .reg = PMBUS_VIRT_READ_TEMP2_AVG, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_TEMP2_MAX, + .attr = "highest", + }, { + .reg = PMBUS_VIRT_RESET_TEMP2_HISTORY, + .attr = "reset_history", + } +}; + +static const struct pmbus_limit_attr temp_limit_attrs3[] = { + { + .reg = PMBUS_UT_WARN_LIMIT, + .low = true, + .attr = "min", + .alarm = "min_alarm", + .sbit = PB_TEMP_UT_WARNING, + }, { + .reg = PMBUS_UT_FAULT_LIMIT, + .low = true, + .attr = "lcrit", + .alarm = "lcrit_alarm", + .sbit = PB_TEMP_UT_FAULT, + }, { + .reg = PMBUS_OT_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_TEMP_OT_WARNING, + }, { + .reg = PMBUS_OT_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_TEMP_OT_FAULT, + } +}; + +static const struct pmbus_sensor_attr temp_attributes[] = { + { + .reg = PMBUS_READ_TEMPERATURE_1, + .class = PSC_TEMPERATURE, + .paged = true, + .update = true, + .compare = true, + .func = PMBUS_HAVE_TEMP, + .sfunc = PMBUS_HAVE_STATUS_TEMP, + .sbase = PB_STATUS_TEMP_BASE, + .gbit = PB_STATUS_TEMPERATURE, + .limit = temp_limit_attrs, + .nlimit = ARRAY_SIZE(temp_limit_attrs), + }, { + .reg = PMBUS_READ_TEMPERATURE_2, + .class = PSC_TEMPERATURE, + .paged = true, + .update = true, + .compare = true, + .func = PMBUS_HAVE_TEMP2, + .sfunc = PMBUS_HAVE_STATUS_TEMP, + .sbase = PB_STATUS_TEMP_BASE, + .gbit = PB_STATUS_TEMPERATURE, + .limit = temp_limit_attrs2, + .nlimit = ARRAY_SIZE(temp_limit_attrs2), + }, { + .reg = PMBUS_READ_TEMPERATURE_3, + .class = PSC_TEMPERATURE, + .paged = true, + .update = true, + .compare = true, + .func = PMBUS_HAVE_TEMP3, + .sfunc = PMBUS_HAVE_STATUS_TEMP, + .sbase = PB_STATUS_TEMP_BASE, + .gbit = PB_STATUS_TEMPERATURE, + .limit = temp_limit_attrs3, + .nlimit = ARRAY_SIZE(temp_limit_attrs3), + } +}; + +static const int pmbus_fan_registers[] = { + PMBUS_READ_FAN_SPEED_1, + PMBUS_READ_FAN_SPEED_2, + PMBUS_READ_FAN_SPEED_3, + PMBUS_READ_FAN_SPEED_4 +}; + +static const int pmbus_fan_config_registers[] = { + PMBUS_FAN_CONFIG_12, + PMBUS_FAN_CONFIG_12, + PMBUS_FAN_CONFIG_34, + PMBUS_FAN_CONFIG_34 +}; + +static const int pmbus_fan_status_registers[] = { + PMBUS_STATUS_FAN_12, + PMBUS_STATUS_FAN_12, + PMBUS_STATUS_FAN_34, + PMBUS_STATUS_FAN_34 +}; + +static const u32 pmbus_fan_flags[] = { + PMBUS_HAVE_FAN12, + PMBUS_HAVE_FAN12, + PMBUS_HAVE_FAN34, + PMBUS_HAVE_FAN34 +}; + +static const u32 pmbus_fan_status_flags[] = { + PMBUS_HAVE_STATUS_FAN12, + PMBUS_HAVE_STATUS_FAN12, + PMBUS_HAVE_STATUS_FAN34, + PMBUS_HAVE_STATUS_FAN34 +}; + +/* Fans */ +static int pmbus_add_fan_attributes(struct i2c_client *client, + struct pmbus_data *data) +{ + const struct pmbus_driver_info *info = data->info; + int index = 1; + int page; + int ret; + + for (page = 0; page < info->pages; page++) { + int f; + + for (f = 0; f < ARRAY_SIZE(pmbus_fan_registers); f++) { + int regval; + + if (f >= info->fan_num) + break; + + if (!(info->func[page] & pmbus_fan_flags[f])) + break; + + if (!_pmbus_check_word_register(client, page, + pmbus_fan_registers[f])) + break; + + /* + * Skip fan if not installed. + * Each fan configuration register covers multiple fans, + * so we have to do some magic. + */ + regval = _pmbus_read_byte_data(client, page, + pmbus_fan_config_registers[f]); + if (regval < 0 || + (!(regval & (PB_FAN_1_INSTALLED >> ((f & 1) * 4))))) + continue; + + if (pmbus_add_sensor(data, "fan", "input", index, + page, pmbus_fan_registers[f], + PSC_FAN, true, true) == NULL) + return -ENOMEM; + + /* + * Each fan status register covers multiple fans, + * so we have to do some magic. + */ + if ((info->func[page] & pmbus_fan_status_flags[f]) && + _pmbus_check_byte_register(client, + page, pmbus_fan_status_registers[f])) { + int base; + + if (f > 1) /* fan 3, 4 */ + base = PB_STATUS_FAN34_BASE + page; + else + base = PB_STATUS_FAN_BASE + page; + ret = pmbus_add_boolean(data, "fan", + "alarm", index, NULL, NULL, base, + PB_FAN_FAN1_WARNING >> (f & 1)); + if (ret) + return ret; + ret = pmbus_add_boolean(data, "fan", + "fault", index, NULL, NULL, base, + PB_FAN_FAN1_FAULT >> (f & 1)); + if (ret) + return ret; + } + index++; + } + } + return 0; +} + +static int pmbus_find_attributes(struct i2c_client *client, + struct pmbus_data *data) +{ + int ret; + + /* Voltage sensors */ + ret = pmbus_add_sensor_attrs(client, data, "in", voltage_attributes, + ARRAY_SIZE(voltage_attributes)); + if (ret) + return ret; + + /* Current sensors */ + ret = pmbus_add_sensor_attrs(client, data, "curr", current_attributes, + ARRAY_SIZE(current_attributes)); + if (ret) + return ret; + + /* Power sensors */ + ret = pmbus_add_sensor_attrs(client, data, "power", power_attributes, + ARRAY_SIZE(power_attributes)); + if (ret) + return ret; + + /* Temperature sensors */ + ret = pmbus_add_sensor_attrs(client, data, "temp", temp_attributes, + ARRAY_SIZE(temp_attributes)); + if (ret) + return ret; + + /* Fans */ + ret = pmbus_add_fan_attributes(client, data); + return ret; +} + +/* + * Identify chip parameters. + * This function is called for all chips. + */ +static int pmbus_identify_common(struct i2c_client *client, + struct pmbus_data *data, int page) +{ + int vout_mode = -1; + + if (_pmbus_check_byte_register(client, page, PMBUS_VOUT_MODE)) + { + vout_mode = _pmbus_read_byte_data(client, page, + PMBUS_VOUT_MODE); + } + + if (vout_mode >= 0 && vout_mode != 0xff) { + /* + * Not all chips support the VOUT_MODE command, + * so a failure to read it is not an error. + */ + switch (vout_mode >> 5) { + case 0: /* linear mode */ + if (data->info->format[PSC_VOLTAGE_OUT] != linear) + return -ENODEV; + + data->exponent[page] = ((s8)(vout_mode << 3)) >> 3; + break; + case 1: /* VID mode */ + if (data->info->format[PSC_VOLTAGE_OUT] != vid) + return -ENODEV; + break; + case 2: /* direct mode */ + if (data->info->format[PSC_VOLTAGE_OUT] != direct) + return -ENODEV; + break; + default: + return -ENODEV; + } + } + + pmbus_clear_fault_page(client, page); + return 0; +} + +static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data, + struct pmbus_driver_info *info) +{ + struct device *dev = &client->dev; + int page, ret; + + /* + * Some PMBus chips don't support PMBUS_STATUS_BYTE, so try + * to use PMBUS_STATUS_WORD instead if that is the case. + * Bail out if both registers are not supported. + */ + if(0) { /*Skip this for the i2c access may fail if PSU is not powered.*/ + data->status_register = PMBUS_STATUS_BYTE; + ret = i2c_smbus_read_byte_data(client, PMBUS_STATUS_BYTE); + if (ret < 0 || ret == 0xff) { + data->status_register = PMBUS_STATUS_WORD; + ret = i2c_smbus_read_word_data(client, PMBUS_STATUS_WORD); + if (ret < 0 || ret == 0xffff) { + dev_err(dev, "PMBus status register not found\n"); + return -ENODEV; + } + } + } + _pmbus_clear_faults(client); + + if (info->identify) { + ret = (*info->identify)(client, info); + if (ret < 0) { + dev_err(dev, "Chip identification failed\n"); + return ret; + } + } + + if (info->pages <= 0 || info->pages > PMBUS_PAGES) { + dev_err(dev, "Bad number of PMBus pages: %d\n", info->pages); + return -ENODEV; + } + + for (page = 0; page < info->pages; page++) { + ret = pmbus_identify_common(client, data, page); + if (ret < 0) { + dev_err(dev, "Failed to identify chip capabilities\n"); + return ret; + } + } + return 0; +} + +int _pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, + struct pmbus_driver_info *info) +{ + struct device *dev = &client->dev; + struct pmbus_data *data; + int ret; + + if (!info) + return -ENODEV; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_BYTE + | I2C_FUNC_SMBUS_BYTE_DATA + | I2C_FUNC_SMBUS_WORD_DATA)) + return -ENODEV; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->dev = dev; + + if (limited_models(id)) + { + data->flags |= PMBUS_SKIP_STATUS_CHECK; + info->pages = 1; + info->fan_num = 1; + data->linear_16 = 0; + } + else + { + info->pages = id->driver_data; + info->fan_num = 4; + data->linear_16 = 1; + + } + + data->info = info; + + ret = pmbus_init_common(client, data, info); + if (ret < 0) + return ret; + + ret = pmbus_find_attributes(client, data); + if (ret) + goto out_kfree; + + /* + * If there are no attributes, something is wrong. + * Bail out instead of trying to register nothing. + */ + if (!data->num_attributes) { + dev_err(dev, "No attributes found\n"); + ret = -ENODEV; + goto out_kfree; + } + + data->groups[0] = &data->group; + data->hwmon_dev = hwmon_device_register_with_groups(dev, client->name, + data, data->groups); + if (IS_ERR(data->hwmon_dev)) { + ret = PTR_ERR(data->hwmon_dev); + dev_err(dev, "Failed to register hwmon device\n"); + goto out_kfree; + } + return 0; + +out_kfree: + kfree(data->group.attrs); + return ret; +} + +/* + * Find sensor groups and status registers on each page. + */ +static void pmbus_find_sensor_groups(struct i2c_client *client, + struct pmbus_driver_info *info) +{ + int page; + + /* For i2c might not available when this driver installing, + turn on all attributes but VMON and FAN34.*/ + info->func[0] |= 0x1feff; + return ; + + + /* Sensors detected on page 0 only */ + if (_pmbus_check_word_register(client, 0, PMBUS_READ_VIN)) + info->func[0] |= PMBUS_HAVE_VIN; + if (_pmbus_check_word_register(client, 0, PMBUS_READ_VCAP)) + info->func[0] |= PMBUS_HAVE_VCAP; + if (_pmbus_check_word_register(client, 0, PMBUS_READ_IIN)) + info->func[0] |= PMBUS_HAVE_IIN; + if (_pmbus_check_word_register(client, 0, PMBUS_READ_PIN)) + info->func[0] |= PMBUS_HAVE_PIN; + if (info->func[0] + && _pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT)) + info->func[0] |= PMBUS_HAVE_STATUS_INPUT; + if (info->fan_num > 0) + { + if (_pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_12) && + _pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) { + info->func[0] |= PMBUS_HAVE_FAN12; + if (_pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12)) + info->func[0] |= PMBUS_HAVE_STATUS_FAN12; + } + } + if (info->fan_num > 2) + { + if (_pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_34) && + _pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) { + info->func[0] |= PMBUS_HAVE_FAN34; + if (_pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34)) + info->func[0] |= PMBUS_HAVE_STATUS_FAN34; + } + } + + if (_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1)) + info->func[0] |= PMBUS_HAVE_TEMP; + if (_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_2)) + info->func[0] |= PMBUS_HAVE_TEMP2; + if (_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_3)) + info->func[0] |= PMBUS_HAVE_TEMP3; + + if (info->func[0] & (PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 + | PMBUS_HAVE_TEMP3) + && _pmbus_check_byte_register(client, 0, + PMBUS_STATUS_TEMPERATURE)) + info->func[0] |= PMBUS_HAVE_STATUS_TEMP; + + /* Sensors detected on all pages */ + for (page = 0; page < info->pages; page++) { + if (_pmbus_check_word_register(client, page, PMBUS_READ_VOUT)) { + info->func[page] |= PMBUS_HAVE_VOUT; + if (_pmbus_check_byte_register(client, page, + PMBUS_STATUS_VOUT)) + info->func[page] |= PMBUS_HAVE_STATUS_VOUT; + } + if (_pmbus_check_word_register(client, page, PMBUS_READ_IOUT)) { + info->func[page] |= PMBUS_HAVE_IOUT; + if (_pmbus_check_byte_register(client, 0, + PMBUS_STATUS_IOUT)) + info->func[page] |= PMBUS_HAVE_STATUS_IOUT; + } + if (_pmbus_check_word_register(client, page, PMBUS_READ_POUT)) + info->func[page] |= PMBUS_HAVE_POUT; + } +} + +/* + * Identify chip parameters. + */ +static int pmbus_identify(struct i2c_client *client, + struct pmbus_driver_info *info) +{ + int ret = 0; + + if (!info->pages) { + /* + * Check if the PAGE command is supported. If it is, + * keep setting the page number until it fails or until the + * maximum number of pages has been reached. Assume that + * this is the number of pages supported by the chip. + */ + if (_pmbus_check_byte_register(client, 0, PMBUS_PAGE)) { + int page; + + for (page = 1; page < PMBUS_PAGES; page++) { + if (_pmbus_set_page(client, page) < 0) + break; + } + _pmbus_set_page(client, 0); + info->pages = page; + } else { + info->pages = 1; + } + } + + if (_pmbus_check_byte_register(client, 0, PMBUS_VOUT_MODE)) { + int vout_mode; + + vout_mode = _pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE); + if (vout_mode >= 0 && vout_mode != 0xff) { + switch (vout_mode >> 5) { + case 0: + break; + case 1: + info->format[PSC_VOLTAGE_OUT] = vid; + break; + case 2: + info->format[PSC_VOLTAGE_OUT] = direct; + break; + default: + ret = -ENODEV; + goto abort; + } + } + } + + + /* + * We should check if the COEFFICIENTS register is supported. + * If it is, and the chip is configured for direct mode, we can read + * the coefficients from the chip, one set per group of sensor + * registers. + * + * To do this, we will need access to a chip which actually supports the + * COEFFICIENTS command, since the command is too complex to implement + * without testing it. Until then, abort if a chip configured for direct + * mode was detected. + */ + if (info->format[PSC_VOLTAGE_OUT] == direct) { + ret = -ENODEV; + goto abort; + } + + /* Try to find sensor groups */ + pmbus_find_sensor_groups(client, info); +abort: + return ret; +} + +/* + * Use driver_data to set the number of pages supported by the chip. + */ +static const struct i2c_device_id pmbus_id[] = { + { "accton_ym2651", YM2651 }, + { "accton_ym2401", YM2401 }, + { "accton_ym2851", YM2851 }, + {} +}; + +static int limited_models(const struct i2c_device_id *id) +{ + int j; + + if (!id->name) + return 0; + + for (j = 0; j < ARRAY_SIZE(pmbus_id); j++) { + if (!pmbus_id[j].name) + continue; + + if (!strcmp(id->name, pmbus_id[j].name)) + { + if(id->driver_data < LIMITED_CHIPS) + { + return 1; + } + else + { + return 0; + } + } + + } + + return 0; +} + +static int pmbus_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct pmbus_driver_info *info; + + info = devm_kzalloc(&client->dev, sizeof(struct pmbus_driver_info), + GFP_KERNEL); + if (!info) + return -ENOMEM; + + info->identify = pmbus_identify; + + return _pmbus_do_probe(client, id, info); +} + +int _pmbus_do_remove(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + kfree(data->group.attrs); + return 0; +} + +MODULE_DEVICE_TABLE(i2c, pmbus_id); + +/* This is the driver that will be inserted */ +static struct i2c_driver pmbus_driver = { + .driver = { + .name = "accton_pmbus_3y", + }, + .probe = pmbus_probe, + .remove = _pmbus_do_remove, + .id_table = pmbus_id, +}; + +module_i2c_driver(pmbus_driver); + +MODULE_AUTHOR("Roy Lee"); +MODULE_DESCRIPTION("Accton PMBus driver for 3Y Power YM-2651Y."); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/common/modules/cpr_4011_4mxx.c b/platform/broadcom/sonic-platform-modules-accton/common/modules/cpr_4011_4mxx.c new file mode 100644 index 00000000000..f1790b4515f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/common/modules/cpr_4011_4mxx.c @@ -0,0 +1,428 @@ +/* + * An hwmon driver for the CPR-4011-4Mxx Redundant Power Module + * + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#if 0 +#define DEBUG +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_FAN_DUTY_CYCLE 100 + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x3c, 0x3d, 0x3e, 0x3f, I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct cpr_4011_4mxx_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 vout_mode; /* Register value */ + u16 v_in; /* Register value */ + u16 v_out; /* Register value */ + u16 i_in; /* Register value */ + u16 i_out; /* Register value */ + u16 p_in; /* Register value */ + u16 p_out; /* Register value */ + u16 temp_input[2]; /* Register value */ + u8 fan_fault; /* Register value */ + u16 fan_duty_cycle[2]; /* Register value */ + u16 fan_speed[2]; /* Register value */ +}; + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_vout(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +static int cpr_4011_4mxx_write_word(struct i2c_client *client, u8 reg, u16 value); +static struct cpr_4011_4mxx_data *cpr_4011_4mxx_update_device(struct device *dev); + +enum cpr_4011_4mxx_sysfs_attributes { + PSU_V_IN, + PSU_V_OUT, + PSU_I_IN, + PSU_I_OUT, + PSU_P_IN, + PSU_P_OUT, + PSU_TEMP1_INPUT, + PSU_FAN1_FAULT, + PSU_FAN1_DUTY_CYCLE, + PSU_FAN1_SPEED, +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_v_in, S_IRUGO, show_linear, NULL, PSU_V_IN); +static SENSOR_DEVICE_ATTR(psu_v_out, S_IRUGO, show_vout, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(psu_i_in, S_IRUGO, show_linear, NULL, PSU_I_IN); +static SENSOR_DEVICE_ATTR(psu_i_out, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(psu_p_in, S_IRUGO, show_linear, NULL, PSU_P_IN); +static SENSOR_DEVICE_ATTR(psu_p_out, S_IRUGO, show_linear, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(psu_temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, show_linear, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); + + +/*Duplicate nodes for lm-sensors.*/ +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_linear, NULL, PSU_V_IN); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_vout, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, show_linear, NULL, PSU_I_IN); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_linear, NULL, PSU_P_IN); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_linear, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(pwm1_input, S_IRUGO, show_linear, NULL, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); + + + +static struct attribute *cpr_4011_4mxx_attributes[] = { + &sensor_dev_attr_psu_v_in.dev_attr.attr, + &sensor_dev_attr_psu_v_out.dev_attr.attr, + &sensor_dev_attr_psu_i_in.dev_attr.attr, + &sensor_dev_attr_psu_i_out.dev_attr.attr, + &sensor_dev_attr_psu_p_in.dev_attr.attr, + &sensor_dev_attr_psu_p_out.dev_attr.attr, + &sensor_dev_attr_psu_temp1_input.dev_attr.attr, + &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, + &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, + &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, + /*Duplicate nodes for lm-sensors.*/ + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_fan1_fault.dev_attr.attr, + &sensor_dev_attr_pwm1_input.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + NULL +}; + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); + int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; + long speed; + int error; + + error = kstrtol(buf, 10, &speed); + if (error) + return error; + + if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) + return -EINVAL; + + mutex_lock(&data->update_lock); + data->fan_duty_cycle[nr] = speed; + cpr_4011_4mxx_write_word(client, 0x3B + nr, data->fan_duty_cycle[nr]); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); + + u16 value = 0; + int exponent, mantissa; + int multiplier = 1000; + + switch (attr->index) { + case PSU_V_IN: + value = data->v_in; + break; + case PSU_I_IN: + value = data->i_in; + break; + case PSU_I_OUT: + value = data->i_out; + break; + case PSU_P_IN: + value = data->p_in; + break; + case PSU_P_OUT: + value = data->p_out; + break; + case PSU_TEMP1_INPUT: + value = data->temp_input[0]; + break; + case PSU_FAN1_DUTY_CYCLE: + multiplier = 1; + value = data->fan_duty_cycle[0]; + break; + case PSU_FAN1_SPEED: + multiplier = 1; + value = data->fan_speed[0]; + break; + default: + break; + } + + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + + return (exponent >= 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); + + u8 shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; + + return sprintf(buf, "%d\n", data->fan_fault >> shift); +} + +static ssize_t show_vout(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct cpr_4011_4mxx_data *data = cpr_4011_4mxx_update_device(dev); + int exponent, mantissa; + int multiplier = 1000; + + exponent = two_complement_to_int(data->vout_mode, 5, 0x1f); + mantissa = data->v_out; + + return (exponent > 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static const struct attribute_group cpr_4011_4mxx_group = { + .attrs = cpr_4011_4mxx_attributes, +}; + +static int cpr_4011_4mxx_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct cpr_4011_4mxx_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct cpr_4011_4mxx_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &cpr_4011_4mxx_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &cpr_4011_4mxx_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int cpr_4011_4mxx_remove(struct i2c_client *client) +{ + struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &cpr_4011_4mxx_group); + kfree(data); + + return 0; +} + +static const struct i2c_device_id cpr_4011_4mxx_id[] = { + { "cpr_4011_4mxx", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, cpr_4011_4mxx_id); + +static struct i2c_driver cpr_4011_4mxx_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "cpr_4011_4mxx", + }, + .probe = cpr_4011_4mxx_probe, + .remove = cpr_4011_4mxx_remove, + .id_table = cpr_4011_4mxx_id, + .address_list = normal_i2c, +}; + +static int cpr_4011_4mxx_read_byte(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int cpr_4011_4mxx_read_word(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_word_data(client, reg); +} + +static int cpr_4011_4mxx_write_word(struct i2c_client *client, u8 reg, u16 value) +{ + return i2c_smbus_write_word_data(client, reg, value); +} + +struct reg_data_byte { + u8 reg; + u8 *value; +}; + +struct reg_data_word { + u8 reg; + u16 *value; +}; + +static struct cpr_4011_4mxx_data *cpr_4011_4mxx_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpr_4011_4mxx_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int i, status; + struct reg_data_byte regs_byte[] = { {0x20, &data->vout_mode}, + {0x81, &data->fan_fault} + }; + struct reg_data_word regs_word[] = { {0x88, &data->v_in}, + {0x8b, &data->v_out}, + {0x89, &data->i_in}, + {0x8c, &data->i_out}, + {0x96, &data->p_out}, + {0x97, &data->p_in}, + {0x8d, &(data->temp_input[0])}, + {0x8e, &(data->temp_input[1])}, + {0x3b, &(data->fan_duty_cycle[0])}, + {0x3c, &(data->fan_duty_cycle[1])}, + {0x90, &(data->fan_speed[0])}, + {0x91, &(data->fan_speed[1])} + }; + + dev_dbg(&client->dev, "Starting cpr_4011_4mxx update\n"); + + /* Read byte data */ + for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { + status = cpr_4011_4mxx_read_byte(client, regs_byte[i].reg); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_byte[i].reg, status); + } + else { + *(regs_byte[i].value) = status; + } + } + + /* Read word data */ + for (i = 0; i < ARRAY_SIZE(regs_word); i++) { + status = cpr_4011_4mxx_read_word(client, regs_word[i].reg); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_word[i].reg, status); + } + else { + *(regs_word[i].value) = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init cpr_4011_4mxx_init(void) +{ + return i2c_add_driver(&cpr_4011_4mxx_driver); +} + +static void __exit cpr_4011_4mxx_exit(void) +{ + i2c_del_driver(&cpr_4011_4mxx_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("CPR_4011_4MXX driver"); +MODULE_LICENSE("GPL"); + +module_init(cpr_4011_4mxx_init); +module_exit(cpr_4011_4mxx_exit); diff --git a/platform/broadcom/sonic-platform-modules-accton/common/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-accton/common/modules/pmbus.h new file mode 100644 index 00000000000..cb6dbc34d87 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/common/modules/pmbus.h @@ -0,0 +1,389 @@ +/* + * pmbus.h - Common defines and structures for PMBus devices + * + * Copyright (c) 2010, 2011 Ericsson AB. + * Copyright (c) 2012 Guenter Roeck + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef PMBUS_H +#define PMBUS_H + +/* + * Registers + */ +#define PMBUS_PAGE 0x00 +#define PMBUS_OPERATION 0x01 +#define PMBUS_ON_OFF_CONFIG 0x02 +#define PMBUS_CLEAR_FAULTS 0x03 +#define PMBUS_PHASE 0x04 + +#define PMBUS_CAPABILITY 0x19 +#define PMBUS_QUERY 0x1A + +#define PMBUS_VOUT_MODE 0x20 +#define PMBUS_VOUT_COMMAND 0x21 +#define PMBUS_VOUT_TRIM 0x22 +#define PMBUS_VOUT_CAL_OFFSET 0x23 +#define PMBUS_VOUT_MAX 0x24 +#define PMBUS_VOUT_MARGIN_HIGH 0x25 +#define PMBUS_VOUT_MARGIN_LOW 0x26 +#define PMBUS_VOUT_TRANSITION_RATE 0x27 +#define PMBUS_VOUT_DROOP 0x28 +#define PMBUS_VOUT_SCALE_LOOP 0x29 +#define PMBUS_VOUT_SCALE_MONITOR 0x2A + +#define PMBUS_COEFFICIENTS 0x30 +#define PMBUS_POUT_MAX 0x31 + +#define PMBUS_FAN_CONFIG_12 0x3A +#define PMBUS_FAN_COMMAND_1 0x3B +#define PMBUS_FAN_COMMAND_2 0x3C +#define PMBUS_FAN_CONFIG_34 0x3D +#define PMBUS_FAN_COMMAND_3 0x3E +#define PMBUS_FAN_COMMAND_4 0x3F + +#define PMBUS_VOUT_OV_FAULT_LIMIT 0x40 +#define PMBUS_VOUT_OV_FAULT_RESPONSE 0x41 +#define PMBUS_VOUT_OV_WARN_LIMIT 0x42 +#define PMBUS_VOUT_UV_WARN_LIMIT 0x43 +#define PMBUS_VOUT_UV_FAULT_LIMIT 0x44 +#define PMBUS_VOUT_UV_FAULT_RESPONSE 0x45 +#define PMBUS_IOUT_OC_FAULT_LIMIT 0x46 +#define PMBUS_IOUT_OC_FAULT_RESPONSE 0x47 +#define PMBUS_IOUT_OC_LV_FAULT_LIMIT 0x48 +#define PMBUS_IOUT_OC_LV_FAULT_RESPONSE 0x49 +#define PMBUS_IOUT_OC_WARN_LIMIT 0x4A +#define PMBUS_IOUT_UC_FAULT_LIMIT 0x4B +#define PMBUS_IOUT_UC_FAULT_RESPONSE 0x4C + +#define PMBUS_OT_FAULT_LIMIT 0x4F +#define PMBUS_OT_FAULT_RESPONSE 0x50 +#define PMBUS_OT_WARN_LIMIT 0x51 +#define PMBUS_UT_WARN_LIMIT 0x52 +#define PMBUS_UT_FAULT_LIMIT 0x53 +#define PMBUS_UT_FAULT_RESPONSE 0x54 +#define PMBUS_VIN_OV_FAULT_LIMIT 0x55 +#define PMBUS_VIN_OV_FAULT_RESPONSE 0x56 +#define PMBUS_VIN_OV_WARN_LIMIT 0x57 +#define PMBUS_VIN_UV_WARN_LIMIT 0x58 +#define PMBUS_VIN_UV_FAULT_LIMIT 0x59 + +#define PMBUS_IIN_OC_FAULT_LIMIT 0x5B +#define PMBUS_IIN_OC_WARN_LIMIT 0x5D + +#define PMBUS_POUT_OP_FAULT_LIMIT 0x68 +#define PMBUS_POUT_OP_WARN_LIMIT 0x6A +#define PMBUS_PIN_OP_WARN_LIMIT 0x6B + +#define PMBUS_STATUS_BYTE 0x78 +#define PMBUS_STATUS_WORD 0x79 +#define PMBUS_STATUS_VOUT 0x7A +#define PMBUS_STATUS_IOUT 0x7B +#define PMBUS_STATUS_INPUT 0x7C +#define PMBUS_STATUS_TEMPERATURE 0x7D +#define PMBUS_STATUS_CML 0x7E +#define PMBUS_STATUS_OTHER 0x7F +#define PMBUS_STATUS_MFR_SPECIFIC 0x80 +#define PMBUS_STATUS_FAN_12 0x81 +#define PMBUS_STATUS_FAN_34 0x82 + +#define PMBUS_READ_VIN 0x88 +#define PMBUS_READ_IIN 0x89 +#define PMBUS_READ_VCAP 0x8A +#define PMBUS_READ_VOUT 0x8B +#define PMBUS_READ_IOUT 0x8C +#define PMBUS_READ_TEMPERATURE_1 0x8D +#define PMBUS_READ_TEMPERATURE_2 0x8E +#define PMBUS_READ_TEMPERATURE_3 0x8F +#define PMBUS_READ_FAN_SPEED_1 0x90 +#define PMBUS_READ_FAN_SPEED_2 0x91 +#define PMBUS_READ_FAN_SPEED_3 0x92 +#define PMBUS_READ_FAN_SPEED_4 0x93 +#define PMBUS_READ_DUTY_CYCLE 0x94 +#define PMBUS_READ_FREQUENCY 0x95 +#define PMBUS_READ_POUT 0x96 +#define PMBUS_READ_PIN 0x97 + +#define PMBUS_REVISION 0x98 +#define PMBUS_MFR_ID 0x99 +#define PMBUS_MFR_MODEL 0x9A +#define PMBUS_MFR_REVISION 0x9B +#define PMBUS_MFR_LOCATION 0x9C +#define PMBUS_MFR_DATE 0x9D +#define PMBUS_MFR_SERIAL 0x9E + +/* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ +#define PMBUS_VIRT_BASE 0x100 +#define PMBUS_VIRT_READ_TEMP_AVG (PMBUS_VIRT_BASE + 0) +#define PMBUS_VIRT_READ_TEMP_MIN (PMBUS_VIRT_BASE + 1) +#define PMBUS_VIRT_READ_TEMP_MAX (PMBUS_VIRT_BASE + 2) +#define PMBUS_VIRT_RESET_TEMP_HISTORY (PMBUS_VIRT_BASE + 3) +#define PMBUS_VIRT_READ_VIN_AVG (PMBUS_VIRT_BASE + 4) +#define PMBUS_VIRT_READ_VIN_MIN (PMBUS_VIRT_BASE + 5) +#define PMBUS_VIRT_READ_VIN_MAX (PMBUS_VIRT_BASE + 6) +#define PMBUS_VIRT_RESET_VIN_HISTORY (PMBUS_VIRT_BASE + 7) +#define PMBUS_VIRT_READ_IIN_AVG (PMBUS_VIRT_BASE + 8) +#define PMBUS_VIRT_READ_IIN_MIN (PMBUS_VIRT_BASE + 9) +#define PMBUS_VIRT_READ_IIN_MAX (PMBUS_VIRT_BASE + 10) +#define PMBUS_VIRT_RESET_IIN_HISTORY (PMBUS_VIRT_BASE + 11) +#define PMBUS_VIRT_READ_PIN_AVG (PMBUS_VIRT_BASE + 12) +#define PMBUS_VIRT_READ_PIN_MAX (PMBUS_VIRT_BASE + 13) +#define PMBUS_VIRT_RESET_PIN_HISTORY (PMBUS_VIRT_BASE + 14) +#define PMBUS_VIRT_READ_POUT_AVG (PMBUS_VIRT_BASE + 15) +#define PMBUS_VIRT_READ_POUT_MAX (PMBUS_VIRT_BASE + 16) +#define PMBUS_VIRT_RESET_POUT_HISTORY (PMBUS_VIRT_BASE + 17) +#define PMBUS_VIRT_READ_VOUT_AVG (PMBUS_VIRT_BASE + 18) +#define PMBUS_VIRT_READ_VOUT_MIN (PMBUS_VIRT_BASE + 19) +#define PMBUS_VIRT_READ_VOUT_MAX (PMBUS_VIRT_BASE + 20) +#define PMBUS_VIRT_RESET_VOUT_HISTORY (PMBUS_VIRT_BASE + 21) +#define PMBUS_VIRT_READ_IOUT_AVG (PMBUS_VIRT_BASE + 22) +#define PMBUS_VIRT_READ_IOUT_MIN (PMBUS_VIRT_BASE + 23) +#define PMBUS_VIRT_READ_IOUT_MAX (PMBUS_VIRT_BASE + 24) +#define PMBUS_VIRT_RESET_IOUT_HISTORY (PMBUS_VIRT_BASE + 25) +#define PMBUS_VIRT_READ_TEMP2_AVG (PMBUS_VIRT_BASE + 26) +#define PMBUS_VIRT_READ_TEMP2_MIN (PMBUS_VIRT_BASE + 27) +#define PMBUS_VIRT_READ_TEMP2_MAX (PMBUS_VIRT_BASE + 28) +#define PMBUS_VIRT_RESET_TEMP2_HISTORY (PMBUS_VIRT_BASE + 29) + +#define PMBUS_VIRT_READ_VMON (PMBUS_VIRT_BASE + 30) +#define PMBUS_VIRT_VMON_UV_WARN_LIMIT (PMBUS_VIRT_BASE + 31) +#define PMBUS_VIRT_VMON_OV_WARN_LIMIT (PMBUS_VIRT_BASE + 32) +#define PMBUS_VIRT_VMON_UV_FAULT_LIMIT (PMBUS_VIRT_BASE + 33) +#define PMBUS_VIRT_VMON_OV_FAULT_LIMIT (PMBUS_VIRT_BASE + 34) +#define PMBUS_VIRT_STATUS_VMON (PMBUS_VIRT_BASE + 35) + +/* + * CAPABILITY + */ +#define PB_CAPABILITY_SMBALERT (1<<4) +#define PB_CAPABILITY_ERROR_CHECK (1<<7) + +/* + * VOUT_MODE + */ +#define PB_VOUT_MODE_MODE_MASK 0xe0 +#define PB_VOUT_MODE_PARAM_MASK 0x1f + +#define PB_VOUT_MODE_LINEAR 0x00 +#define PB_VOUT_MODE_VID 0x20 +#define PB_VOUT_MODE_DIRECT 0x40 + +/* + * Fan configuration + */ +#define PB_FAN_2_PULSE_MASK ((1 << 0) | (1 << 1)) +#define PB_FAN_2_RPM (1 << 2) +#define PB_FAN_2_INSTALLED (1 << 3) +#define PB_FAN_1_PULSE_MASK ((1 << 4) | (1 << 5)) +#define PB_FAN_1_RPM (1 << 6) +#define PB_FAN_1_INSTALLED (1 << 7) + +/* + * STATUS_BYTE, STATUS_WORD (lower) + */ +#define PB_STATUS_NONE_ABOVE (1<<0) +#define PB_STATUS_CML (1<<1) +#define PB_STATUS_TEMPERATURE (1<<2) +#define PB_STATUS_VIN_UV (1<<3) +#define PB_STATUS_IOUT_OC (1<<4) +#define PB_STATUS_VOUT_OV (1<<5) +#define PB_STATUS_OFF (1<<6) +#define PB_STATUS_BUSY (1<<7) + +/* + * STATUS_WORD (upper) + */ +#define PB_STATUS_UNKNOWN (1<<8) +#define PB_STATUS_OTHER (1<<9) +#define PB_STATUS_FANS (1<<10) +#define PB_STATUS_POWER_GOOD_N (1<<11) +#define PB_STATUS_WORD_MFR (1<<12) +#define PB_STATUS_INPUT (1<<13) +#define PB_STATUS_IOUT_POUT (1<<14) +#define PB_STATUS_VOUT (1<<15) + +/* + * STATUS_IOUT + */ +#define PB_POUT_OP_WARNING (1<<0) +#define PB_POUT_OP_FAULT (1<<1) +#define PB_POWER_LIMITING (1<<2) +#define PB_CURRENT_SHARE_FAULT (1<<3) +#define PB_IOUT_UC_FAULT (1<<4) +#define PB_IOUT_OC_WARNING (1<<5) +#define PB_IOUT_OC_LV_FAULT (1<<6) +#define PB_IOUT_OC_FAULT (1<<7) + +/* + * STATUS_VOUT, STATUS_INPUT + */ +#define PB_VOLTAGE_UV_FAULT (1<<4) +#define PB_VOLTAGE_UV_WARNING (1<<5) +#define PB_VOLTAGE_OV_WARNING (1<<6) +#define PB_VOLTAGE_OV_FAULT (1<<7) + +/* + * STATUS_INPUT + */ +#define PB_PIN_OP_WARNING (1<<0) +#define PB_IIN_OC_WARNING (1<<1) +#define PB_IIN_OC_FAULT (1<<2) + +/* + * STATUS_TEMPERATURE + */ +#define PB_TEMP_UT_FAULT (1<<4) +#define PB_TEMP_UT_WARNING (1<<5) +#define PB_TEMP_OT_WARNING (1<<6) +#define PB_TEMP_OT_FAULT (1<<7) + +/* + * STATUS_FAN + */ +#define PB_FAN_AIRFLOW_WARNING (1<<0) +#define PB_FAN_AIRFLOW_FAULT (1<<1) +#define PB_FAN_FAN2_SPEED_OVERRIDE (1<<2) +#define PB_FAN_FAN1_SPEED_OVERRIDE (1<<3) +#define PB_FAN_FAN2_WARNING (1<<4) +#define PB_FAN_FAN1_WARNING (1<<5) +#define PB_FAN_FAN2_FAULT (1<<6) +#define PB_FAN_FAN1_FAULT (1<<7) + +/* + * CML_FAULT_STATUS + */ +#define PB_CML_FAULT_OTHER_MEM_LOGIC (1<<0) +#define PB_CML_FAULT_OTHER_COMM (1<<1) +#define PB_CML_FAULT_PROCESSOR (1<<3) +#define PB_CML_FAULT_MEMORY (1<<4) +#define PB_CML_FAULT_PACKET_ERROR (1<<5) +#define PB_CML_FAULT_INVALID_DATA (1<<6) +#define PB_CML_FAULT_INVALID_COMMAND (1<<7) + +enum pmbus_sensor_classes { + PSC_VOLTAGE_IN = 0, + PSC_VOLTAGE_OUT, + PSC_CURRENT_IN, + PSC_CURRENT_OUT, + PSC_POWER, + PSC_TEMPERATURE, + PSC_FAN, + PSC_NUM_CLASSES /* Number of power sensor classes */ +}; + +#define PMBUS_PAGES 32 /* Per PMBus specification */ + +/* Functionality bit mask */ +#define PMBUS_HAVE_VIN (1 << 0) +#define PMBUS_HAVE_VCAP (1 << 1) +#define PMBUS_HAVE_VOUT (1 << 2) +#define PMBUS_HAVE_IIN (1 << 3) +#define PMBUS_HAVE_IOUT (1 << 4) +#define PMBUS_HAVE_PIN (1 << 5) +#define PMBUS_HAVE_POUT (1 << 6) +#define PMBUS_HAVE_FAN12 (1 << 7) +#define PMBUS_HAVE_FAN34 (1 << 8) +#define PMBUS_HAVE_TEMP (1 << 9) +#define PMBUS_HAVE_TEMP2 (1 << 10) +#define PMBUS_HAVE_TEMP3 (1 << 11) +#define PMBUS_HAVE_STATUS_VOUT (1 << 12) +#define PMBUS_HAVE_STATUS_IOUT (1 << 13) +#define PMBUS_HAVE_STATUS_INPUT (1 << 14) +#define PMBUS_HAVE_STATUS_TEMP (1 << 15) +#define PMBUS_HAVE_STATUS_FAN12 (1 << 16) +#define PMBUS_HAVE_STATUS_FAN34 (1 << 17) +#define PMBUS_HAVE_VMON (1 << 18) +#define PMBUS_HAVE_STATUS_VMON (1 << 19) + +enum pmbus_data_format { linear = 0, direct, vid }; + +struct pmbus_driver_info { + int pages; /* Total number of pages */ + enum pmbus_data_format format[PSC_NUM_CLASSES]; + /* + * Support one set of coefficients for each sensor type + * Used for chips providing data in direct mode. + */ + int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ + int b[PSC_NUM_CLASSES]; /* offset */ + int R[PSC_NUM_CLASSES]; /* exponent */ + + u32 func[PMBUS_PAGES]; /* Functionality, per page */ + /* + * The following functions map manufacturing specific register values + * to PMBus standard register values. Specify only if mapping is + * necessary. + * Functions return the register value (read) or zero (write) if + * successful. A return value of -ENODATA indicates that there is no + * manufacturer specific register, but that a standard PMBus register + * may exist. Any other negative return value indicates that the + * register does not exist, and that no attempt should be made to read + * the standard register. + */ + int (*read_byte_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int reg); + int (*write_word_data)(struct i2c_client *client, int page, int reg, + u16 word); + int (*write_byte)(struct i2c_client *client, int page, u8 value); + /* + * The identify function determines supported PMBus functionality. + * This function is only necessary if a chip driver supports multiple + * chips, and the chip functionality is not pre-determined. + */ + int (*identify)(struct i2c_client *client, + struct pmbus_driver_info *info); + + int fan_num; +}; + +/* Function declarations */ + +void pmbus_clear_cache(struct i2c_client *client); +int pmbus_set_page(struct i2c_client *client, u8 page); +int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg); +int pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg, u16 word); +int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); +int pmbus_write_byte(struct i2c_client *client, int page, u8 value); +void _pmbus_clear_faults(struct i2c_client *client); +bool _pmbus_check_byte_register(struct i2c_client *client, int page, int reg); +bool _pmbus_check_word_register(struct i2c_client *client, int page, int reg); +int _pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, + struct pmbus_driver_info *info); +int pmbus_do_remove(struct i2c_client *client); +const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client + *client); + +#endif /* PMBUS_H */ diff --git a/platform/broadcom/sonic-platform-modules-accton/common/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/common/modules/ym2651y.c new file mode 100755 index 00000000000..5e9d858fa68 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/common/modules/ym2651y.c @@ -0,0 +1,671 @@ +/* + * An hwmon driver for the 3Y Power YM-2651Y Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_FAN_DUTY_CYCLE 100 + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x58, 0x5b, I2C_CLIENT_END }; + +enum chips { + YM2651, + YM2401, + YM2851, + YPEB1200AM +}; + +/* Each client has this additional data + */ +struct ym2651y_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 chip; /* chip id */ + u8 capability; /* Register value */ + u16 status_word; /* Register value */ + u8 fan_fault; /* Register value */ + u8 over_temp; /* Register value */ + u16 v_out; /* Register value */ + u16 i_out; /* Register value */ + u16 p_out; /* Register value */ + u8 vout_mode; /* Register value */ + u16 temp; /* Register value */ + u16 fan_speed; /* Register value */ + u16 fan_duty_cycle[2]; /* Register value */ + u8 fan_dir[4]; /* Register value */ + u8 pmbus_revision; /* Register value */ + u8 mfr_id[10]; /* Register value */ + u8 mfr_model[10]; /* Register value */ + u8 mfr_revsion[3]; /* Register value */ + u16 mfr_vin_min; /* Register value */ + u16 mfr_vin_max; /* Register value */ + u16 mfr_iin_max; /* Register value */ + u16 mfr_iout_max; /* Register value */ + u16 mfr_pin_max; /* Register value */ + u16 mfr_pout_max; /* Register value */ + u16 mfr_vout_min; /* Register value */ + u16 mfr_vout_max; /* Register value */ +}; + +static ssize_t show_vout(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_byte(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_word(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_over_temp(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_ascii(struct device *dev, struct device_attribute *da, + char *buf); +static struct ym2651y_data *ym2651y_update_device(struct device *dev); +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static int ym2651y_write_word(struct i2c_client *client, u8 reg, u16 value); + +enum ym2651y_sysfs_attributes { + PSU_POWER_ON = 0, + PSU_TEMP_FAULT, + PSU_POWER_GOOD, + PSU_FAN1_FAULT, + PSU_FAN_DIRECTION, + PSU_OVER_TEMP, + PSU_V_OUT, + PSU_I_OUT, + PSU_P_OUT, + PSU_P_OUT_UV, /*In Unit of microVolt, instead of mini.*/ + PSU_TEMP1_INPUT, + PSU_FAN1_SPEED, + PSU_FAN1_DUTY_CYCLE, + PSU_PMBUS_REVISION, + PSU_MFR_ID, + PSU_MFR_MODEL, + PSU_MFR_REVISION, + PSU_MFR_VIN_MIN, + PSU_MFR_VIN_MAX, + PSU_MFR_VOUT_MIN, + PSU_MFR_VOUT_MAX, + PSU_MFR_IIN_MAX, + PSU_MFR_IOUT_MAX, + PSU_MFR_PIN_MAX, + PSU_MFR_POUT_MAX +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_power_on, S_IRUGO, show_word, NULL, PSU_POWER_ON); +static SENSOR_DEVICE_ATTR(psu_temp_fault, S_IRUGO, show_word, NULL, PSU_TEMP_FAULT); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_word, NULL, PSU_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(psu_over_temp, S_IRUGO, show_over_temp, NULL, PSU_OVER_TEMP); +static SENSOR_DEVICE_ATTR(psu_v_out, S_IRUGO, show_vout, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(psu_i_out, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(psu_p_out, S_IRUGO, show_linear, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(psu_temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, show_linear, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(psu_fan_dir, S_IRUGO, show_ascii, NULL, PSU_FAN_DIRECTION); +static SENSOR_DEVICE_ATTR(psu_pmbus_revision, S_IRUGO, show_byte, NULL, PSU_PMBUS_REVISION); +static SENSOR_DEVICE_ATTR(psu_mfr_id, S_IRUGO, show_ascii, NULL, PSU_MFR_ID); +static SENSOR_DEVICE_ATTR(psu_mfr_model, S_IRUGO, show_ascii, NULL, PSU_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu_mfr_revision, S_IRUGO, show_ascii, NULL, PSU_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu_mfr_vin_min, S_IRUGO, show_linear, NULL, PSU_MFR_VIN_MIN); +static SENSOR_DEVICE_ATTR(psu_mfr_vin_max, S_IRUGO, show_linear, NULL, PSU_MFR_VIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_vout_min, S_IRUGO, show_linear, NULL, PSU_MFR_VOUT_MIN); +static SENSOR_DEVICE_ATTR(psu_mfr_vout_max, S_IRUGO, show_linear, NULL, PSU_MFR_VOUT_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_iin_max, S_IRUGO, show_linear, NULL, PSU_MFR_IIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_iout_max, S_IRUGO, show_linear, NULL, PSU_MFR_IOUT_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_pin_max, S_IRUGO, show_linear, NULL, PSU_MFR_PIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_pout_max, S_IRUGO, show_linear, NULL, PSU_MFR_POUT_MAX); + +/*Duplicate nodes for lm-sensors.*/ +static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_vout, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_linear, NULL, PSU_P_OUT_UV); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(temp1_fault, S_IRUGO, show_word, NULL, PSU_TEMP_FAULT); + +static struct attribute *ym2651y_attributes[] = { + &sensor_dev_attr_psu_power_on.dev_attr.attr, + &sensor_dev_attr_psu_temp_fault.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, + &sensor_dev_attr_psu_over_temp.dev_attr.attr, + &sensor_dev_attr_psu_v_out.dev_attr.attr, + &sensor_dev_attr_psu_i_out.dev_attr.attr, + &sensor_dev_attr_psu_p_out.dev_attr.attr, + &sensor_dev_attr_psu_temp1_input.dev_attr.attr, + &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, + &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, + &sensor_dev_attr_psu_fan_dir.dev_attr.attr, + &sensor_dev_attr_psu_pmbus_revision.dev_attr.attr, + &sensor_dev_attr_psu_mfr_id.dev_attr.attr, + &sensor_dev_attr_psu_mfr_model.dev_attr.attr, + &sensor_dev_attr_psu_mfr_revision.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vin_min.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_pout_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_iin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_pin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vout_min.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vout_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_iout_max.dev_attr.attr, + /*Duplicate nodes for lm-sensors.*/ + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_in3_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_temp1_fault.dev_attr.attr, + NULL +}; + +static ssize_t show_byte(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + + return (attr->index == PSU_PMBUS_REVISION) ? sprintf(buf, "%d\n", data->pmbus_revision) : + sprintf(buf, "0\n"); +} + +static ssize_t show_word(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + u16 status = 0; + + switch (attr->index) { + case PSU_POWER_ON: /* psu_power_on, low byte bit 6 of status_word, 0=>ON, 1=>OFF */ + status = (data->status_word & 0x40) ? 0 : 1; + break; + case PSU_TEMP_FAULT: /* psu_temp_fault, low byte bit 2 of status_word, 0=>Normal, 1=>temp fault */ + status = (data->status_word & 0x4) >> 2; + break; + case PSU_POWER_GOOD: /* psu_power_good, high byte bit 3 of status_word, 0=>OK, 1=>FAIL */ + status = (data->status_word & 0x800) ? 0 : 1; + break; + } + + return sprintf(buf, "%d\n", status); +} + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct ym2651y_data *data = i2c_get_clientdata(client); + int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; + long speed; + int error; + + error = kstrtol(buf, 10, &speed); + if (error) + return error; + + if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) + return -EINVAL; + + mutex_lock(&data->update_lock); + data->fan_duty_cycle[nr] = speed; + ym2651y_write_word(client, 0x3B + nr, data->fan_duty_cycle[nr]); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + + u16 value = 0; + int exponent, mantissa; + int multiplier = 1000; + + switch (attr->index) { + case PSU_V_OUT: + value = data->v_out; + break; + case PSU_I_OUT: + value = data->i_out; + break; + case PSU_P_OUT_UV: + multiplier = 1000000; /*For lm-sensors, unit is micro-Volt.*/ + /*Passing through*/ + case PSU_P_OUT: + value = data->p_out; + break; + case PSU_TEMP1_INPUT: + value = data->temp; + break; + case PSU_FAN1_SPEED: + value = data->fan_speed; + multiplier = 1; + break; + case PSU_FAN1_DUTY_CYCLE: + value = data->fan_duty_cycle[0]; + multiplier = 1; + break; + case PSU_MFR_VIN_MIN: + value = data->mfr_vin_min; + break; + case PSU_MFR_VIN_MAX: + value = data->mfr_vin_max; + break; + case PSU_MFR_VOUT_MIN: + value = data->mfr_vout_min; + break; + case PSU_MFR_VOUT_MAX: + value = data->mfr_vout_max; + break; + case PSU_MFR_PIN_MAX: + value = data->mfr_pin_max; + break; + case PSU_MFR_POUT_MAX: + value = data->mfr_pout_max; + break; + case PSU_MFR_IOUT_MAX: + value = data->mfr_iout_max; + break; + case PSU_MFR_IIN_MAX: + value = data->mfr_iin_max; + break; + } + + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + return (exponent >= 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + + u8 shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; + + return sprintf(buf, "%d\n", data->fan_fault >> shift); +} + +static ssize_t show_over_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct ym2651y_data *data = ym2651y_update_device(dev); + + return sprintf(buf, "%d\n", data->over_temp >> 7); +} + +static ssize_t show_ascii(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + u8 *ptr = NULL; + + switch (attr->index) { + case PSU_FAN_DIRECTION: /* psu_fan_dir */ + ptr = data->fan_dir; + break; + case PSU_MFR_ID: /* psu_mfr_id */ + ptr = data->mfr_id; + break; + case PSU_MFR_MODEL: /* psu_mfr_model */ + ptr = data->mfr_model; + break; + case PSU_MFR_REVISION: /* psu_mfr_revision */ + ptr = data->mfr_revsion; + break; + default: + return 0; + } + + return sprintf(buf, "%s\n", ptr); +} + +static ssize_t show_vout_by_mode(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + int exponent, mantissa; + int multiplier = 1000; + + if (!data->valid) { + return 0; + } + + exponent = two_complement_to_int(data->vout_mode, 5, 0x1f); + switch (attr->index) { + case PSU_MFR_VOUT_MIN: + mantissa = data->mfr_vout_min; + break; + case PSU_MFR_VOUT_MAX: + mantissa = data->mfr_vout_max; + break; + case PSU_V_OUT: + mantissa = data->v_out; + break; + default: + return 0; + } + + return (exponent > 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t show_vout(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct ym2651y_data *data = i2c_get_clientdata(client); + + if (data->chip == YM2401) { + return show_vout_by_mode(dev, da, buf); + } + else { + return show_linear(dev, da, buf); + } +} + +static const struct attribute_group ym2651y_group = { + .attrs = ym2651y_attributes, +}; + +static int ym2651y_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct ym2651y_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct ym2651y_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->chip = dev_id->driver_data; + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &ym2651y_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &ym2651y_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int ym2651y_remove(struct i2c_client *client) +{ + struct ym2651y_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &ym2651y_group); + kfree(data); + + return 0; +} + +static const struct i2c_device_id ym2651y_id[] = { + { "ym2651", YM2651 }, + { "ym2401", YM2401 }, + { "ym2851", YM2851 }, + { "ype1200am", YPEB1200AM }, + {} +}; +MODULE_DEVICE_TABLE(i2c, ym2651y_id); + +static struct i2c_driver ym2651y_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "ym2651", + }, + .probe = ym2651y_probe, + .remove = ym2651y_remove, + .id_table = ym2651y_id, + .address_list = normal_i2c, +}; + +static int ym2651y_read_byte(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int ym2651y_read_word(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_word_data(client, reg); +} + +static int ym2651y_write_word(struct i2c_client *client, u8 reg, u16 value) +{ + return i2c_smbus_write_word_data(client, reg, value); +} + +static int ym2651y_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + result = 0; + +abort: + return result; +} + +struct reg_data_byte { + u8 reg; + u8 *value; +}; + +struct reg_data_word { + u8 reg; + u16 *value; +}; + +static struct ym2651y_data *ym2651y_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct ym2651y_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int i, status; + u8 command; + u8 fan_dir[5] = {0}; + struct reg_data_byte regs_byte[] = { {0x19, &data->capability}, + {0x20, &data->vout_mode}, + {0x7d, &data->over_temp}, + {0x81, &data->fan_fault}, + {0x98, &data->pmbus_revision} + }; + struct reg_data_word regs_word[] = { {0x79, &data->status_word}, + {0x8b, &data->v_out}, + {0x8c, &data->i_out}, + {0x96, &data->p_out}, + {0x8d, &data->temp}, + {0x3b, &(data->fan_duty_cycle[0])}, + {0x3c, &(data->fan_duty_cycle[1])}, + {0x90, &data->fan_speed}, + {0xa0, &data->mfr_vin_min}, + {0xa1, &data->mfr_vin_max}, + {0xa2, &data->mfr_iin_max}, + {0xa3, &data->mfr_pin_max}, + {0xa4, &data->mfr_vout_min}, + {0xa5, &data->mfr_vout_max}, + {0xa6, &data->mfr_iout_max}, + {0xa7, &data->mfr_pout_max} + }; + + dev_dbg(&client->dev, "Starting ym2651 update\n"); + + /* Read byte data */ + for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { + status = ym2651y_read_byte(client, regs_byte[i].reg); + + if (status < 0) + { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_byte[i].reg, status); + *(regs_byte[i].value) = 0; + } + else { + *(regs_byte[i].value) = status; + } + } + + /* Read word data */ + for (i = 0; i < ARRAY_SIZE(regs_word); i++) { + status = ym2651y_read_word(client, regs_word[i].reg); + + if (status < 0) + { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_word[i].reg, status); + *(regs_word[i].value) = 0; + } + else { + *(regs_word[i].value) = status; + } + } + + /* Read fan_direction */ + command = 0xC3; + status = ym2651y_read_block(client, command, fan_dir, ARRAY_SIZE(fan_dir)-1); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + } + + strncpy(data->fan_dir, fan_dir+1, ARRAY_SIZE(data->fan_dir)-1); + data->fan_dir[ARRAY_SIZE(data->fan_dir)-1] = '\0'; + + /* Read mfr_id */ + command = 0x99; + status = ym2651y_read_block(client, command, data->mfr_id, + ARRAY_SIZE(data->mfr_id)-1); + data->mfr_id[ARRAY_SIZE(data->mfr_id)-1] = '\0'; + + if (status < 0) + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + + /* Read mfr_model */ + command = 0x9a; + status = ym2651y_read_block(client, command, data->mfr_model, + ARRAY_SIZE(data->mfr_model)-1); + data->mfr_model[ARRAY_SIZE(data->mfr_model)-1] = '\0'; + + if (status < 0) + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + + /* Read mfr_revsion */ + command = 0x9b; + status = ym2651y_read_block(client, command, data->mfr_revsion, + ARRAY_SIZE(data->mfr_revsion)-1); + data->mfr_revsion[ARRAY_SIZE(data->mfr_revsion)-1] = '\0'; + + if (status < 0) + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(ym2651y_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("3Y Power YM-2651Y driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-accton/debian/changelog b/platform/broadcom/sonic-platform-modules-accton/debian/changelog new file mode 100755 index 00000000000..2b08b12c206 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/debian/changelog @@ -0,0 +1,18 @@ +sonic-accton-platform-modules (1.1) unstable; urgency=low + + * Add support for AS7816-64X. + + -- Accton Network Tue, 19 Dec 2017 09:35:58 +0800 + +sonic-accton-platform-modules (1.1) unstable; urgency=low + + * Add support for Accton AS5712-54X + + -- Accton Network Wed, 11 Oct 2017 14:21:45 +0800 + +sonic-accton-platform-modules (1.0) unstable; urgency=low + + * Add support for Accton AS7712-32X + * Initial release + + -- Accton Network Thu, 01 Jun 2017 14:06:38 +0800 diff --git a/platform/broadcom/sonic-platform-modules-accton/debian/compat b/platform/broadcom/sonic-platform-modules-accton/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/broadcom/sonic-platform-modules-accton/debian/control b/platform/broadcom/sonic-platform-modules-accton/debian/control new file mode 100755 index 00000000000..2b3c1af3d80 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/debian/control @@ -0,0 +1,78 @@ +Source: sonic-accton-platform-modules +Section: main +Priority: extra +Maintainer: Accton network , Accton Network , Accton Network , Accton Network +Build-Depends: debhelper (>= 9), bzip2 +Standards-Version: 3.9.3 + +Package: sonic-platform-accton-as7712-32x +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as5712-54x +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as7816-64x +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as7716-32x +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as7716-32xb +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as7312-54x +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as7326-56x +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as6712-32x +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as7726-32x +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as4630-54pe +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-minipack +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as5812-54x +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as5812-54t +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as5835-54x +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as9716-32d +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as5835-54t +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as7312-54xs +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-accton-as7315-27xb +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/broadcom/sonic-platform-modules-accton/debian/rules b/platform/broadcom/sonic-platform-modules-accton/debian/rules new file mode 100755 index 00000000000..722d4126ad0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/debian/rules @@ -0,0 +1,87 @@ +#!/usr/bin/make -f +# -*- makefile -*- +# Sample debian/rules that uses debhelper. +# This file was originally written by Joey Hess and Craig Small. +# As a special exception, when this file is copied by dh-make into a +# dh-make output file, you may use that output file without restriction. +# This special exception was added by Craig Small in version 0.37 of dh-make. + +include /usr/share/dpkg/pkg-info.mk + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + +export INSTALL_MOD_DIR:=extra + +PYTHON ?= python2 + +PACKAGE_PRE_NAME := sonic-platform-accton +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS := as7712-32x as5712-54x as7816-64x as7716-32x as7716-32xb as7312-54x +MODULE_DIRS += as7326-56x as6712-32x as7726-32x as4630-54pe minipack as5812-54x +MODULE_DIRS += as5835-54x as9716-32d as5835-54t as7312-54xs as7315-27xb as5812-54t +MODULE_DIR := modules +UTILS_DIR := utils +SERVICE_DIR := service +CONF_DIR := conf + +%: + dh $@ --with systemd,python2,python3 --buildsystem=pybuild + +clean: + dh_testdir + dh_testroot + dh_clean + +build: + #make modules -C $(KERNEL_SRC)/build M=$(MODULE_SRC) + (for mod in $(MODULE_DIRS); do \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + $(PYTHON) $${mod}/setup.py build; \ + done) + +binary: binary-arch binary-indep + # Nothing to do + +binary-arch: + # Nothing to do + +#install: build + #dh_testdir + #dh_testroot + #dh_clean -k + #dh_installdirs + +binary-indep: + dh_testdir + dh_installdirs + + # Custom package commands + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} usr/local/bin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} lib/systemd/system; \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin/; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system/; \ + $(PYTHON) $${mod}/setup.py install --root=$(MOD_SRC_DIR)/debian/$(PACKAGE_PRE_NAME)-$${mod} --install-layout=deb; \ + done) + # Resuming debhelper scripts + dh_testroot + dh_install + dh_installchangelogs + dh_installdocs + dh_systemd_enable + dh_installinit + dh_systemd_start + dh_link + dh_fixperms + dh_compress + dh_strip + dh_installdeb + dh_gencontrol + dh_md5sums + dh_builddeb +.PHONY: build binary binary-arch binary-indep clean diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/classes/__init__.py b/platform/broadcom/sonic-platform-modules-accton/minipack/classes/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/classes/pimutil.py b/platform/broadcom/sonic-platform-modules-accton/minipack/classes/pimutil.py new file mode 100755 index 00000000000..778ff76afd1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/classes/pimutil.py @@ -0,0 +1,578 @@ +# Copyright (c) 2019 Edgecore Networks Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 5/29/2019: Jostar create for minipack +# ----------------------------------------------------------- +try: + import os + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + import fbfpgaio + import re + import time + from select import select + #from ctypes import fbfpgaio + +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + + +# pimutil.py +# +# Platform-specific PIM interface for SONiC +# + +iob = { + "revision": 0x0, + "scratchpad": 0x4, + "interrupt_status": 0x2C, + "pim_status": 0x40, + "pim_present_intr_mask": 0x44, +} + +dom_base = [ + 0xFFFFFFFF, # Padding + 0x40000, + 0x48000, + 0x50000, + 0x58000, + 0x60000, + 0x68000, + 0x70000, + 0x78000, +] + + +dom = { + "revision": 0x0, + "system_led": 0xC, + "intr_status": 0x2C, + "qsfp_present": 0x48, + "qsfp_present_intr": 0x50, + "qsfp_present_intr_mask": 0x58, + "qsfp_intr": 0x60, + "qsfp_intr_mask": 0x68, + "qsfp_reset": 0x70, + "qsfp_lp_mode": 0x78, + "device_power_bad_status": 0x90, + "port_led_color_profile": { + 0: 0x300, + 1: 0x300, + 2: 0x304, + 3: 0x304, + 4: 0x308, + 5: 0x308, + 6: 0x30C, + 7: 0x30C, + }, + "port_led_control": { + 1: 0x310, + 2: 0x314, + 3: 0x318, + 4: 0x31C, + 5: 0x320, + 6: 0x324, + 7: 0x328, + 8: 0x32C, + 9: 0x330, + 10: 0x334, + 11: 0x338, + 12: 0x33C, + 13: 0x340, + 14: 0x344, + 15: 0x348, + 16: 0x34C, + }, + "dom_control_config": 0x410, + "dom_global_status": 0x414, + "dom_data": 0x4000, + + + "mdio": { + "config": 0x0200, + "command": 0x0204, + "write": 0x0208, + "read": 0x020C, + "status": 0x0210, + "intr_mask": 0x0214, + "source_sel": 0x0218, + }, # mdio +} + +mdio_read_cmd = 0x1 +mdio_write_cmd = 0x0 +mdio_device_type = 0x1F + + +#fbfpgaio=cdll.LoadLibrary('./fbfpgaio.so') + +def init_resources(): + fbfpgaio.hw_init() + return + +def release_resources(): + fbfpgaio.hw_release() + return + +def fpga_io(offset, data=None): + if data is None: + return fbfpgaio.hw_io(offset) + else: + fbfpgaio.hw_io(offset, data) + return + +def pim_io(pim, offset, data=None): + global dom_base + target_offset = dom_base[pim]+offset + if data is None: + retval = fpga_io(target_offset) + #print ("0x%04X" % retval) # idebug + return retval + else: + retval = fpga_io(target_offset, data) + return retval + + +def show_pim_present(): + pim_status = fpga_io(iob["pim_status"]) + + header = "PIM # " + status_str = " " + for shift in range(0,8): + status = pim_status & (0x10000 << shift) #[23:16] from pim_0 to pim_7 + header += " %d " % (shift+1) + if status: + status_str += (" | ") + else: + status_str += (" X ") + print(header) + print(status_str) + +def show_qsfp_present_status(pim_num): + status = fpga_io(dom_base[pim_num]+dom["qsfp_present"]) + interrupt = fpga_io(dom_base[pim_num]+dom["qsfp_present_intr"]) + mask = fpga_io(dom_base[pim_num]+dom["qsfp_present_intr_mask"]) + + print + print(" (0x48) (0x50) (0x58)") + print(" 0x%08X 0x%08X 0x%08X" %(status, interrupt, mask)) + print(" Status Interrupt Mask") + for row in range(8): + output_str = str() + status_left = bool(status & (0x1 << row*2)) + status_right = bool(status & (0x2 << row*2)) + interrupt_left = bool(interrupt & (0x1 << row*2)) + interrupt_right = bool(interrupt & (0x2 << row*2)) + mask_left = bool(mask & (0x1 << row*2)) + mask_right = bool(mask & (0x2 << row*2)) + print("%2d: %d %d %d %d %d %d" % \ + (row*2+1, status_left, status_right, \ + interrupt_left, interrupt_right, \ + mask_left, mask_right)) + print + + + +#pim_index start from 0 to 7 +#port_index start from 0 to 127. Each 16-port is to one pim card. +class PimUtil(object): + + PORT_START = 0 + PORT_END = 127 + + def __init__(self): + self.value=1 + + def __del__(self): + self.value=0 + + def init_pim_fpga(self): + init_resources() + + def release_pim_fpga(self): + release_resources() + + def get_pim_by_port(self, port_num): + if port_num < self.PORT_START or port_num > self.PORT_END: + return False + pim_num=port_num/16 + return True, pim_num+1 + + def get_onepimport_by_port(self, port_num): + if port_num < self.PORT_START or port_num > self.PORT_END: + return False + if port_num < 16: + return True, port_num + else: + return True, port_num%16 + + def get_pim_presence(self, pim_num): + if pim_num <0 or pim_num > 7: + return 0 + pim_status = fpga_io(iob["pim_status"]) + status = pim_status & (0x10000 << pim_num) + if status: + return 1 #present + else: + return 0 #not present + + #return code=0:100G. return code=1:400G + def get_pim_board_id(self, pim_num): + if pim_num <0 or pim_num > 7: + return False + board_id = fpga_io(dom_base[pim_num+1]+dom["revision"]) + board_id = board_id & 0x1 + if board_id==0x0: + return 0 + else: + return 1 + + + def get_pim_status(self, pim_num): + if pim_num <0 or pim_num > 7: + return 0xFF + power_status =0 + #device_power_bad_status + status=fpga_io(dom_base[pim_num+1]+dom["device_power_bad_status"]) + + for x in range(0, 5): + if status & ( (0xf) << (4*x) ) : + power_status = power_status | (0x1 << x) + + if ( status & 0x1000000): + power_status=power_status | (0x1 << 5) + if ( status & 0x2000000): + power_status=power_status | (0x1 << 6) + if ( status & 0x8000000): + power_status=power_status | (0x1 << 7) + if ( status & 0x10000000): + power_status=power_status | (0x1 << 8) + if ( status & 0x40000000): + power_status=power_status | (0x1 << 9) + if ( status & 0x80000000): + power_status=power_status | (0x1 << 10) + + return power_status + #path=0:MDIO path is set on TH3. path=1:MDIO path is set on FPGA. + def set_pim_mdio_source_sel(self, pim_num, path): + if pim_num <0 or pim_num > 7: + return False + status= pim_io(pim_num+1, dom["mdio"]["source_sel"]) + + if path==1: + status = status | 0x2 + else: + status = status & 0xfffffffd + + pim_io(pim_num+1, dom["mdio"]["source_sel"], status) + return True + #retrun code=0, path is TH3. retrun code=1, path is FPGA + def get_pim_mdio_source_sel(sefl, pim_num): + if pim_num <0 or pim_num > 7: + return False + path= pim_io(pim_num+1, dom["mdio"]["source_sel"]) + path = path & 0x2 + if path: + return 1 + else: + return 0 + + #This api will set mdio path to MAC side.(At default, mdio path is set to FPGA side). + def pim_init(self, pim_num): + if pim_num <0 or pim_num > 7: + return False + status=self.set_pim_mdio_source_sel(pim_num, 0) + #put init phy cmd here + + + #return code="pim_dict[pim_num]='1' ":insert evt. return code="pim_dict[pim_num]='0' ":remove evt + def get_pim_change_event(self, timeout=0): + start_time = time.time() + pim_dict = {} + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print "get_transceiver_change_event:Invalid timeout value", timeout + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print 'get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout + + return False, {} # Time wrap or possibly incorrect timeout + + pim_mask_status = fpga_io(iob["pim_present_intr_mask"], 0xffff00000) + + while timeout >= 0: + new_pim_status=0 + pim_status = fpga_io(iob["pim_status"]) + present_status= pim_status & 0xff0000 + change_status=pim_status & 0xff + interrupt_status = fpga_io(iob["interrupt_status"]) + + for pim_num in range(0,8): + if change_status & (0x1 << pim_num) : + status = present_status & (0x10000 << pim_num) + new_pim_status = new_pim_status | (0x1 << pim_num) #prepare to W1C to clear + if status: + pim_dict[pim_num]='1' + else: + pim_dict[pim_num]='0' + + if change_status: + new_pim_status = pim_status | new_pim_status #Write one to clear interrupt bit + fpga_io(iob["pim_status"], new_pim_status) + return True, pim_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + print "get_evt_change_event: Should not reach here." + return False, {} + + + def get_pim_max_number(self): + return 8 + + #pim_num start from 0 to 7 + #color:0=amber, 1=blue + #contrl:off(0),on(1), flash(2) + def set_pim_led(self, pim_num, color, control): + if pim_num <0 or pim_num > 7: + return False + + led_val=fpga_io(dom_base[pim_num+1]+dom["system_led"]) + + if color==1: + led_val = led_val | (0x8000 | 0x4000) #blue + elif color==0: + led_val = (led_val & ( ~ 0x8000)) | 0x4000 #amber + else: + print "Set RGB control to Green1" + led_val = led_val & (~ 0x4000) + led_val = led_val & (~ 0xfff) + led_val = led_val | 0x0f0 #B.G.R Birghtness, set to Green + + if control==0: + led_val = led_val & ( ~ 0x3000) #Off + elif control==1: + led_val = led_val & ( ~ 0x3000) #Off + led_val = led_val | 0x1000 #On + else: + led_val = led_val | 0x3000 #Flash + + fpga_io(dom_base[pim_num+1]+dom["system_led"], led_val) + + def get_qsfp_presence(self, port_num): + #xlate port to get pim_num + status, pim_num=self.get_pim_by_port(port_num) + + if status==0: + return False + else: + present = fpga_io(dom_base[pim_num]+dom["qsfp_present"]) + status, shift = self.get_onepimport_by_port(port_num) + if status==0: + return False + else: + if bool(present & (0x1 << shift)): + return 1 #present + else: + return 0 #not present + + #return code: low_power(1) or high_power(0) + def get_low_power_mode(self, port_num): + status, pim_num=self.get_pim_by_port(port_num) + + if status==0: + return False + else: + lp_mode = fpga_io(dom_base[pim_num]+dom["qsfp_lp_mode"]) + + status, shift=self.get_onepimport_by_port(port_num) + if status==0: + return False + else: + if (lp_mode & (0x1 << shift)): + return 1 #low + else: + return 0 #high + + #lpmode=1 to hold QSFP in low power mode. lpmode=0 to release QSFP from low power mode. + def set_low_power_mode(self, port_num, mode): + status, pim_num=self.get_pim_by_port(port_num) + if status==0: + return False + val = fpga_io(dom_base[pim_num]+dom["qsfp_lp_mode"]) + status, shift=self.get_onepimport_by_port(port_num) + if status==0: + return False + else: + if mode==0: + new_val = val & (~(0x1 << shift)) + else: + new_val=val|(0x1 << shift) + status=fpga_io(dom_base[pim_num]+dom["qsfp_lp_mode"], new_val) + return status + + #port_dict[idx]=1 means get interrupt(change evt), port_dict[idx]=0 means no get interrupt + def get_qsfp_interrupt(self): + port_dict={} + #show_qsfp_present_status(1) + for pim_num in range(0, 8): + fpga_io(dom_base[pim_num+1]+dom["qsfp_present_intr_mask"], 0xffff0000) + fpga_io(dom_base[pim_num+1]+dom["qsfp_intr_mask"], 0xffff0000) + for pim_num in range(0, 8): + clear_bit=0 + qsfp_present_intr_status = fpga_io(dom_base[pim_num+1]+dom["qsfp_present_intr"]) + interrupt_status = qsfp_present_intr_status & 0xffff + #time.sleep(2) + if interrupt_status: + for idx in range (0,16): + port_idx=idx + (pim_num*16) + if interrupt_status & (0x1< +#include +#include +#include +#include + +//#define IDEBUG(...) printf(__VA_ARGS__) +#define IDEBUG(...) + +#define FPGA_RESOURCE_NODE "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0/resource0" +#define FPGA_RESOURCE_LENGTH 0x80000 + + +static int hw_handle = -1; +static void *io_base = NULL; + +static PyObject *fbfpgaio_hw_init(PyObject *self) +{ + const char fpga_resource_node[] = FPGA_RESOURCE_NODE; + + /* Open hardware resource node */ + hw_handle = open(fpga_resource_node, O_RDWR|O_SYNC); + if (hw_handle == -1) { + IDEBUG("[ERROR] %s: open hw resource node\n", __func__); + return Py_False; + } + + IDEBUG("[PASS] %s: open hw resource node\n", __func__); + + /* Mapping hardware resource */ + io_base = mmap(NULL, FPGA_RESOURCE_LENGTH, PROT_READ|PROT_WRITE, MAP_SHARED|MAP_NORESERVE, hw_handle, 0); + if (io_base == MAP_FAILED) { + IDEBUG("[ERROR] %s: mapping resource node\n", __func__); + perror("map_failed"); + fprintf(stderr,"%d %s\\n",errno,strerror(errno)); + return Py_False; + } + + IDEBUG("[PASS] %s: mapping resource node\n", __func__); + + return Py_True; +} + +static PyObject *fbfpgaio_hw_release(PyObject *self) +{ + int retval = 0; + + if ((io_base != NULL) && (io_base != MAP_FAILED)) { + retval = munmap(io_base, FPGA_RESOURCE_LENGTH); + if (retval == 0) { + IDEBUG("[PASS] %s: Unmapping hardware resources\n", __func__); + close(hw_handle); + return Py_True; + } + } + + IDEBUG("[ERROR] %s: unmapping resource node\n", __func__); + return Py_False; +} + +static PyObject *fbfpgaio_hw_io(PyObject *self, PyObject *args) +{ + void *offset = NULL; + /* We are not able to diffrentiate the input data between an unsigned value or a + 'None' object. We assume that the input data (if any) will be an unsigned integer. + The default value of 'data' is larger than the max. number of unsigned integer. + This value signify that the caller of this function does not input a data argument. */ + unsigned long input_data = 0x1FFFFFFFF; + + if (!PyArg_ParseTuple(args, "I|k", &offset, &input_data)) { + return NULL; + } + + if (input_data == 0x1FFFFFFFF) { + // Read operation + IDEBUG("Read operation\n"); + unsigned int *address = (unsigned int *) ((unsigned long) io_base + (unsigned long) offset); + return Py_BuildValue("k", *address); + } else { + // Write operation + IDEBUG("Write operation\n"); + unsigned int *address = (unsigned int *) ((unsigned long) io_base + (unsigned long) offset); + unsigned int data = (unsigned int) (input_data & 0xFFFFFFFF); + *address = data; + + Py_INCREF(Py_None); + return Py_None; + } +} + +static PyMethodDef FbfpgaMethods[] = { + { "hw_init", (PyCFunction) fbfpgaio_hw_init, METH_NOARGS, "Initialize resources for accessing FPGA" }, + { "hw_release", (PyCFunction) fbfpgaio_hw_release, METH_NOARGS, "Release resources for accessing FPGA" }, + { "hw_io", fbfpgaio_hw_io, METH_VARARGS, "Access FPGA" }, + { NULL, NULL, 0, NULL }, +}; + +PyMODINIT_FUNC +initfbfpgaio(void) +{ + char docstr[] = "\ +1. hw_init():\n\ + return value: True/False\n\ +2. hw_release():\n\ + return value: True/False\n\ +3. hw_io(offset,[data])\n\ + return value:\n\ + In reading operation: data which is read from FPGA\n\ + In writing operation: None\n"; + + (void) Py_InitModule3("fbfpgaio", FbfpgaMethods, docstr); +} diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/minipack/modules/Makefile new file mode 100644 index 00000000000..607c2ce7607 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/modules/Makefile @@ -0,0 +1 @@ +obj-m:= minipack_psensor.o diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/modules/minipack_psensor.c b/platform/broadcom/sonic-platform-modules-accton/minipack/modules/minipack_psensor.c new file mode 100755 index 00000000000..3155b2b27c4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/modules/minipack_psensor.c @@ -0,0 +1,1097 @@ +/* + * A hwmon driver for the minipack. + * + * Copyright (C) 2018 Accton Technology Corporation. + * Roy Lee + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* + * This driver retrieves sensors' data through uart interface by opening + * an user-space tty device node. + * Designed pariticular for ethernet switch with BMC. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define DEBUG_BUF_LEN 256 +#define DEBUG_INTR(args...) \ + debug_print(__func__, __LINE__, 1, args) + +static unsigned int verbose = 0; +module_param(verbose, uint, S_IRUGO|S_IWUSR); +MODULE_PARM_DESC(verbose, "Print more information for debugging. Default is disabled."); + +static unsigned int poll_interval = 9; +module_param(poll_interval, uint, S_IRUGO|S_IWUSR); +MODULE_PARM_DESC(poll_interval, "Time interval for data polling, in unit of second."); + + +#define DRVNAME "minipack_psensor" /*Platform Sensor*/ + +#define MAX_THERMAL_COUNT 8 +#define MAX_FAN_COUNT (8) +#define MAX_PSU_COUNT (4) +#define CHASSIS_PSU_CHAR_COUNT (2) /*2 for input and output.*/ +#define CHASSIS_LED_COUNT (2) +#define CHASSIS_PSU_VOUT_COUNT (1) /*V output only.*/ +#define CHASSIS_PSU_VOUT_INDEX (1) /*V output start index.*/ + + +#define ATTR_ALLOC_EXTRA 1 /*For last attribute which is NUll.*/ +#define ATTR_NAME_SIZE 24 +#define ATTR_NAME_OUTFIT_SIZE 12 +#define ATTR_MAX_LIST 8 + +#define TTY_DEVICE "/dev/ttyACM0" +#define TTY_PROMPT "@bmc-oob" +#define TTY_USER "root" +#define TTY_PASSWORD "0penBmc" +#define TTY_BAUDRATE (57600) +#define TTY_LOGIN_RETRY 10 +#define TTY_LOGIN_RETRY_INTV (200) +#define TTY_RETRY_INTERVAL (100) /*mini-seconds*/ +#define TTY_RESPONSE_INTERVAL (1000) /*mini-seconds*/ +#define TTY_PMBUS_INTERVAL (1800) /*mini-seconds*/ +#define MAXIMUM_TTY_BUFFER_LENGTH 1024 +#define MAXIMUM_TTY_STRING_LENGTH (MAXIMUM_TTY_BUFFER_LENGTH - 1) +#define TTY_CMD_RETRY 3 +#define TTY_RX_RETRY 3 +#define TTY_CMD_MAX_LEN (64) +#define TTY_READ_MAX_LEN (256) + +#define TTY_RESP_SEPARATOR '|' /*For the ease to debug*/ +#define MAX_ATTR_PATTERN (8) +#define MIN_FAN_RPM (0) +#define MAX_PSU_VOUT (12000*1005/1000) /*12 + 0.5%*/ +#define MIN_PSU_VOUT (12000*995/1000) /*12 - 0.5%*/ + +#define ATTR_TYPE_INDEX_GAP (100) + +enum sensor_type_e { + SENSOR_TYPE_THERMAL, + SENSOR_TYPE_FAN_RPM, + SENSOR_TYPE_FAN_RPM_DN, + SENSOR_TYPE_PSU1, + SENSOR_TYPE_PSU2, + SENSOR_TYPE_PSU3, + SENSOR_TYPE_PSU4, + SENSOR_TYPE_MAX, +}; + +enum sysfs_attributes_index { + INDEX_THRM_IN_START = SENSOR_TYPE_THERMAL *ATTR_TYPE_INDEX_GAP, + INDEX_FAN_RPM_START = SENSOR_TYPE_FAN_RPM *ATTR_TYPE_INDEX_GAP, + INDEX_FAN_RPM_START_DN = SENSOR_TYPE_FAN_RPM_DN*ATTR_TYPE_INDEX_GAP, + INDEX_PSU1_START = SENSOR_TYPE_PSU1 *ATTR_TYPE_INDEX_GAP, + INDEX_PSU2_START = SENSOR_TYPE_PSU2 *ATTR_TYPE_INDEX_GAP, + INDEX_PSU3_START = SENSOR_TYPE_PSU3 *ATTR_TYPE_INDEX_GAP, + INDEX_PSU4_START = SENSOR_TYPE_PSU4 *ATTR_TYPE_INDEX_GAP, + INDEX_NAME = SENSOR_TYPE_MAX *ATTR_TYPE_INDEX_GAP, +}; + +/* Pmbus reg defines are copied from drivers/hwmon/pmbus/pmbus.h*/ +#define PMBUS_READ_VIN 0x88 +#define PMBUS_READ_IIN 0x89 +#define PMBUS_READ_VOUT 0x8B +#define PMBUS_READ_IOUT 0x8C +#define PMBUS_READ_POUT 0x96 +#define PMBUS_READ_PIN 0x97 + +#define PMBUS_REG_START PMBUS_READ_VIN +#define PMBUS_REG_END PMBUS_READ_PIN + +enum psu_data_e { + PSU_DATA_VIN = 0, + PSU_DATA_VOUT, + PSU_DATA_IIN, + PSU_DATA_IOUT, + PSU_DATA_PIN, + PSU_DATA_POUT, + PSU_DATA_MAX, +}; + +struct pmbus_reg_t { + u8 addr; + bool power; /*power attribute is in unit of uW instead of mW.*/ +} pmbus_regs[] = { + [PSU_DATA_VIN ] = {PMBUS_READ_VIN, false}, + [PSU_DATA_VOUT] = {PMBUS_READ_VOUT, false}, + [PSU_DATA_IIN ] = {PMBUS_READ_IIN, false}, + [PSU_DATA_IOUT] = {PMBUS_READ_IOUT, false}, + [PSU_DATA_PIN ] = {PMBUS_READ_PIN, true}, + [PSU_DATA_POUT] = {PMBUS_READ_POUT, true}, +}; + +struct sensor_data { + int lm75_input[MAX_THERMAL_COUNT]; + int fan_rpm[MAX_FAN_COUNT]; + int fan_rpm_dn[MAX_FAN_COUNT]; + int psu_data [MAX_PSU_COUNT][PSU_DATA_MAX]; + int led_bright[CHASSIS_LED_COUNT]; +}; + +struct psensor { + struct psensor *next; + char name[ATTR_NAME_SIZE+1]; /* sysfs sensor name */ + struct sensor_device_attribute sensor_dev_attr; +}; + +struct minipack_data { + struct platform_device *pdev; + struct device *dev; + struct device *hwmon_dev; + struct mutex update_lock; + struct tty_struct *tty; + struct ktermios old_ktermios; + bool logged_in; + bool valid[SENSOR_TYPE_MAX]; + unsigned long last_updated[SENSOR_TYPE_MAX]; /* In jiffies */ + struct sensor_data sdata; + int num_attributes; + struct attribute_group group; +}; + +typedef ssize_t (*show_func)( struct device *dev, + struct device_attribute *attr, char *buf); +typedef ssize_t (*store_func)(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count); +static ssize_t show_name(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t _attr_show(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_fan_min(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_psu_vout_min(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_psu_vout_max(struct device *dev, struct device_attribute *da, + char *buf); +static int add_attr2group(struct minipack_data *data, struct attribute *attr); + + +struct attr_pattern { + int count; /*How many attr of this pattern*/ + int index_addon; /* For attribute naming, e.g. + * X of "fanX_input",start from a number but 0. + */ + char prefix[ATTR_NAME_OUTFIT_SIZE+1]; /*e.g. "temp"4_input*/ + char postfix[ATTR_NAME_OUTFIT_SIZE+1]; /*e.g. temp4"_input"*/ + umode_t mode; + show_func show; + store_func store; +}; + +struct sensor_set { + int total; /*How many attr of this type*/ + int start_index; + char *query; + u32 mdelay; /*TTY delay to read after sent.*/ + struct attr_pattern *ptn[MAX_ATTR_PATTERN]; +}; + + + +#define DECLARE_PSU_SENSOR_DEVICE_ATTR(index) \ +static struct attr_pattern psu##index##_vin = {CHASSIS_PSU_CHAR_COUNT, \ +CHASSIS_PSU_CHAR_COUNT*index, "in","_input", S_IRUGO, _attr_show, NULL}; \ +static struct attr_pattern psu##index##_curr = {CHASSIS_PSU_CHAR_COUNT, \ +CHASSIS_PSU_CHAR_COUNT*index, "curr","_input", S_IRUGO, _attr_show, NULL}; \ +static struct attr_pattern psu##index##_pwr = {CHASSIS_PSU_CHAR_COUNT, \ +CHASSIS_PSU_CHAR_COUNT*index, "power","_input", S_IRUGO, _attr_show, NULL}; \ +static struct attr_pattern psu##index##_vmax = {CHASSIS_PSU_VOUT_COUNT, \ +CHASSIS_PSU_CHAR_COUNT*index + 1, "in","_max", S_IRUGO, show_psu_vout_max, NULL};\ +static struct attr_pattern psu##index##_vmin = {CHASSIS_PSU_VOUT_COUNT, \ +CHASSIS_PSU_CHAR_COUNT*index + 1, "in","_min", S_IRUGO, show_psu_vout_min, NULL} + +#define DECLARE_PSU_ATTR(index) \ + &psu##index##_vin, &psu##index##_curr, &psu##index##_pwr, \ + &psu##index##_vmax, &psu##index##_vmin + + +DECLARE_PSU_SENSOR_DEVICE_ATTR(0); +DECLARE_PSU_SENSOR_DEVICE_ATTR(1); +DECLARE_PSU_SENSOR_DEVICE_ATTR(2); +DECLARE_PSU_SENSOR_DEVICE_ATTR(3); + + + +static char tty_cmd[SENSOR_TYPE_MAX][TTY_CMD_MAX_LEN] = { + "ls -v /sys/class/hwmon/hwmon*/temp1_input|head -n "\ + __stringify(MAX_THERMAL_COUNT)"| xargs cat\r", + "ls -v /sys/bus/i2c/devices/72-0033/fan*_input | xargs cat\r", + "ls -v /sys/bus/i2c/devices/64-0033/fan*_input | xargs cat\r", + "i2cdump -y -f -r "\ + __stringify(PMBUS_REG_START)"-" __stringify(PMBUS_REG_END)\ + " 49 0x59 w\r", + "i2cdump -y -f -r "\ + __stringify(PMBUS_REG_START)"-" __stringify(PMBUS_REG_END)\ + " 48 0x58 w\r", + "i2cdump -y -f -r "\ + __stringify(PMBUS_REG_START)"-" __stringify(PMBUS_REG_END)\ + " 57 0x59 w\r", + "i2cdump -y -f -r "\ + __stringify(PMBUS_REG_START)"-" __stringify(PMBUS_REG_END)\ + " 56 0x58 w\r", +}; + +static struct attr_pattern temp_in = +{ MAX_THERMAL_COUNT, 0, "temp","_input", + S_IRUGO, _attr_show, NULL +}; +static struct attr_pattern fan_in_up = +{ MAX_FAN_COUNT, 0, "fan","_input", + S_IRUGO, _attr_show, NULL +}; +static struct attr_pattern fan_min_up = +{ MAX_FAN_COUNT, 0, "fan","_min", + S_IRUGO, show_fan_min, NULL +}; +static struct attr_pattern fan_in_dw = +{ MAX_FAN_COUNT, MAX_FAN_COUNT, "fan","_input", + S_IRUGO, _attr_show, NULL +}; +static struct attr_pattern fan_min_dw = +{ MAX_FAN_COUNT, MAX_FAN_COUNT, "fan","_min", + S_IRUGO, show_fan_min, NULL +}; + +struct sensor_set model_ssets[SENSOR_TYPE_MAX] = +{ + { MAX_THERMAL_COUNT, INDEX_THRM_IN_START, tty_cmd[SENSOR_TYPE_THERMAL], + TTY_RESPONSE_INTERVAL, {&temp_in, NULL}, + }, + { MAX_FAN_COUNT, INDEX_FAN_RPM_START, tty_cmd[SENSOR_TYPE_FAN_RPM], + TTY_RESPONSE_INTERVAL, {&fan_in_up, &fan_min_up, NULL}, + }, + { MAX_FAN_COUNT, INDEX_FAN_RPM_START_DN, tty_cmd[SENSOR_TYPE_FAN_RPM_DN], + TTY_RESPONSE_INTERVAL, {&fan_in_dw, &fan_min_dw, NULL}, + }, + { PSU_DATA_MAX, INDEX_PSU1_START, tty_cmd[SENSOR_TYPE_PSU1], + TTY_PMBUS_INTERVAL, {DECLARE_PSU_ATTR(0), NULL}, + }, + { PSU_DATA_MAX, INDEX_PSU2_START, tty_cmd[SENSOR_TYPE_PSU2], + TTY_PMBUS_INTERVAL, {DECLARE_PSU_ATTR(1), NULL}, + }, + { PSU_DATA_MAX, INDEX_PSU3_START, tty_cmd[SENSOR_TYPE_PSU3], + TTY_PMBUS_INTERVAL, {DECLARE_PSU_ATTR(2), NULL}, + }, + { PSU_DATA_MAX, INDEX_PSU4_START, tty_cmd[SENSOR_TYPE_PSU4], + TTY_PMBUS_INTERVAL, {DECLARE_PSU_ATTR(3), NULL}, + }, +}; +static struct minipack_data *mp_data = NULL; + +/*-----------------------------------------------------------------------*/ + +static void debug_print(const char *func, int line, int level, + const char *fmt, ...) +{ + va_list args; + char buf[DEBUG_BUF_LEN]; + if (verbose >= level) { + va_start(args, fmt); + vsnprintf(buf, sizeof(buf), fmt, args); + va_end(args); + pr_info("[DBG]%s#%d: %s\n", func, line, buf); + } +} + + + +static int _tty_wait(u32 mdelay) { + if (mdelay) { + msleep(mdelay); + } + return 0; +} + +static int _tty_open(struct file **fd) +{ + struct ktermios kt; + struct tty_struct *tty; + speed_t baudrate = 57600; + struct file *tty_fd = *fd; + + /*TTY must be not opened.*/ + if (tty_fd != NULL) { + return -EINVAL; + } + + tty_fd = filp_open(TTY_DEVICE, O_RDWR|O_NOCTTY|O_NDELAY, 0644); + if (IS_ERR(tty_fd)) { + DEBUG_INTR("Failed to open file(%s)\r\n", TTY_DEVICE); + return -ENOENT; + } else { + spin_lock(&tty_fd->f_lock); + tty = ((struct tty_file_private *)tty_fd ->private_data)->tty; + mp_data->old_ktermios = (tty->termios); + + kt = tty->termios; + tty_termios_encode_baud_rate(&kt, baudrate, baudrate); + kt.c_cflag = B57600 | CS8 | CLOCAL | CREAD; + kt.c_iflag = IGNPAR; + kt.c_oflag = 0; + kt.c_lflag = 0; + kt.c_cc[VMIN] = (unsigned char) + ((MAXIMUM_TTY_STRING_LENGTH > 0xFF) ? + 0xFF : MAXIMUM_TTY_STRING_LENGTH); + kt.c_cc[VTIME] = 0; + tty_set_termios(tty, &kt); + + mp_data->tty = tty ; + *fd = tty_fd; + return 0; + } + return -ENXIO; +} + +static int _tty_close(struct file **tty_fd) +{ + struct file *fd = *tty_fd; + + if(*tty_fd == NULL) { + return -EINVAL; + } + spin_unlock(&fd->f_lock); + filp_close(*tty_fd, 0); + *tty_fd = NULL; + + return 0; +} + +static int _tty_tx(struct file *tty_fd, const char *str) +{ + int rc; + + /*Sanity check*/ + if (tty_fd == NULL) + return -EINVAL; + if(!(tty_fd->f_op) || !(tty_fd->f_op->read) ||!(tty_fd->f_op->write)) { + return -EINVAL; + } + + rc = tty_fd->f_op->write(tty_fd, str, strlen(str)+1,0); + if (rc < 0) { + pr_info( "failed to write(%d)\n", rc); + return -EBUSY; + } + DEBUG_INTR("[TX]%s-%d, %d BYTES, write:\n\"%s\"\n", __func__, __LINE__,rc, str); + return rc; +} + +static int _tty_rx(struct file *tty_fd, char *buf, int max_len) +{ + int rc; + u32 timeout = 0; + + /*Sanity check*/ + if (tty_fd == NULL) + return -EINVAL; + if(!(tty_fd->f_op) || !(tty_fd->f_op->read) ||!(tty_fd->f_op->write)) { + return -EINVAL; + } + + /*Clear for remained data cause ambiguous string*/ + memset(buf, 0, max_len); + do { + rc = tty_fd->f_op->read(tty_fd, buf, max_len, 0); + if (rc == 0) { /*Buffer Empty, waits. */ + timeout++; + _tty_wait(TTY_RETRY_INTERVAL); + continue; + } else { + break; + } + } while (rc < 0 && timeout < TTY_RX_RETRY); + + if (timeout == TTY_RX_RETRY) { + rc = -EAGAIN; + } + DEBUG_INTR("[RX]%s-%d, %d BYTES, read:\n\"%s\"\n", __func__, __LINE__,rc, buf); + return rc; +} + +/*Clear Rx buffer by reading it out.*/ +static int _tty_clear_rxbuf(struct file *tty_fd, char* buf, size_t max_size) { + int rc, i; + mm_segment_t old_fs; + int retry = TTY_CMD_RETRY; + + if (tty_fd == NULL) { + return -EINVAL; + } + old_fs = get_fs(); + set_fs(KERNEL_DS); + i = 0; + do { + rc = tty_fd->f_op->read(tty_fd, buf, max_size, 0); + memset(buf, 0, max_size); + i++; + } while (rc > 0 && i < retry); + + set_fs(old_fs); + return rc; +} + +static int _tty_writeNread(struct file *tty_fd, + char *wr_p, char *rd_p, int rx_max_len, u32 mdelay) +{ + int rc; + mm_segment_t old_fs; + + /*Presumed file is opened!*/ + if (tty_fd == NULL) + return -EINVAL; + + if(!(tty_fd->f_op) || !(tty_fd->f_op->read) ||!(tty_fd->f_op->write)) { + pr_info("file %s cann't readable or writable?\n", TTY_DEVICE); + return -EINVAL; + } + + memset(rd_p, 0, rx_max_len); + old_fs = get_fs(); + set_fs(KERNEL_DS); + rc = _tty_tx(tty_fd, wr_p); + if (rc < 0) { + DEBUG_INTR( "failed to write(%d)\n", rc); + goto exit; + } + _tty_wait(mdelay); + rc = _tty_rx(tty_fd, rd_p, rx_max_len); + if (rc < 0) { + DEBUG_INTR("failed to read(%d)\n", rc); + goto exit; + } + +exit: + set_fs(old_fs); + return rc; +} + +static bool _is_logged_in(struct file *tty_fd, char* buf, size_t max_size) +{ + int i, ret; + + if (mp_data->logged_in) { + return true; + } + + _tty_clear_rxbuf(tty_fd, buf, max_size); + for (i = 0; i < TTY_LOGIN_RETRY; i++) { + ret = _tty_writeNread(tty_fd, "\r\r", buf, max_size, TTY_RETRY_INTERVAL); + if (ret < 0) { + DEBUG_INTR("%s-%d, failed ret:%d\n", __func__, __LINE__, ret); + continue; + } + + DEBUG_INTR("%s-%d, tty_buf:%s\n", __func__, __LINE__, buf); + /*Check if logined by comparing BMC's cmd prompt.*/ + if (strstr(buf, TTY_PROMPT) != NULL) { + mp_data->logged_in = true; + return true; + } else { + return false; + } + } + return false; + +} + +static int _tty_login(struct file *tty_fd, char* buf, size_t max_size) +{ + int i; + int ret = -EINVAL; + + if(!tty_fd) + return -EINVAL; + + for (i = 1; i <= TTY_LOGIN_RETRY; i++) { + if (_is_logged_in(tty_fd, buf, max_size)) + return 0; + + DEBUG_INTR("%s-%d, tty_buf:%s\n", __func__, __LINE__, buf); + if ((strstr(buf, "bmc") != NULL) && + (strstr(buf, "login:") != NULL)) + { + ret = _tty_writeNread(tty_fd, TTY_USER"\r", + buf, max_size, TTY_LOGIN_RETRY_INTV); + if (ret < 0) { + DEBUG_INTR("%s-%d, failed ret:%d\n", __func__, __LINE__, ret); + continue; + } + DEBUG_INTR("%s-%d, tty_buf:%s\n", __func__, __LINE__, buf); + if (strstr(buf, "Password:") != NULL) { + DEBUG_INTR("%s-%d, tty_buf:%s\n", __func__, __LINE__, buf); + ret = _tty_writeNread(tty_fd, TTY_PASSWORD"\r", buf, max_size, 0); + if (ret < 0) { + DEBUG_INTR("%s-%d, failed ret:%d\n", __func__, __LINE__, ret); + continue; + } + if (strstr(buf, TTY_PROMPT) != NULL) { + DEBUG_INTR("%s-%d, tty_buf:%s\n", __func__, __LINE__, buf); + return 0; + } + } + } + _tty_wait(TTY_RETRY_INTERVAL); + } + + dev_err(mp_data->dev, "Failed on %s ret:%d\n", __func__, ret); + return -EAGAIN; +} + +static int +bmc_transaction(char *cmd, char* resp, int max, u32 mdelay) +{ + u32 i; + struct file *tty_fd = NULL; + char *buf; + int buf_size = MAXIMUM_TTY_BUFFER_LENGTH; + int ret = 0; + + if(!cmd || !resp) + return -EINVAL; + + if (_tty_open(&tty_fd) != 0) { + DEBUG_INTR("ERROR: Cannot open TTY device\n"); + return -EAGAIN; + } + buf = (char *)kmalloc(buf_size, GFP_KERNEL); + if (!buf) { + ret = -ENOMEM; + goto exit; + } + if (_tty_login(tty_fd, buf, buf_size) != 0) { + dev_err(mp_data->dev, "Failed to login TTY device\n"); + _tty_close(&tty_fd); + ret = -ENOENT; + goto exit; + } + + i = 0; + do { + ret = _tty_writeNread(tty_fd, cmd, buf, buf_size, + mdelay+((i)*500)); + if (ret < 0) { + goto exit; + } + i++; + } while(strstr(buf, cmd) == NULL && i <= TTY_CMD_RETRY); + if (i > TTY_CMD_RETRY) { + ret = -ENOENT; + goto exit; + } + strncpy(resp, buf, max); +exit: + kfree(buf); + _tty_close(&tty_fd); + return ret; +} + +static void dev_attr_init(struct device_attribute *dev_attr, + const char *name, umode_t mode, + show_func show, store_func store) +{ + sysfs_attr_init(&dev_attr->attr); + dev_attr->attr.name = name; + dev_attr->attr.mode = mode; + dev_attr->show = show; + dev_attr->store = store; +} + +/*Allowcat sensor_device_attributes and adds them to a group.*/ +static int attributs_init(struct minipack_data *data) +{ + struct sensor_set *model = model_ssets; + char name[64] = {0}; + int start, pi, si, ai, num, ret, acc; + struct psensor *sensor; + struct sensor_device_attribute *sensor_dattr; + struct device_attribute *dev_attr; + + /*name*/ + sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return -ENOENT; + sensor_dattr = &sensor->sensor_dev_attr; + dev_attr = &sensor_dattr->dev_attr; + snprintf(sensor->name, sizeof(sensor->name), "name"); + dev_attr_init(dev_attr, sensor->name, S_IRUGO, show_name, NULL); + sensor_dattr->index = INDEX_NAME; + ret = add_attr2group(data, &dev_attr->attr); + if (ret) + return ret; + + /*types*/ + for (si = 0; si < SENSOR_TYPE_MAX; si++) { + struct sensor_set *ss = model+si; + num = ss->total; + start = ss->start_index; + acc = start; + for (pi = 0; ss->ptn[pi]; pi++) + { + char *prefix, *postfix; + struct attr_pattern *ptn = ss->ptn[pi]; + prefix = ptn->prefix; + postfix = ptn->postfix; + for (ai = 0; ai < ptn->count ; ai++) { + u32 ptn_index = ai + ptn->index_addon + 1 ; + snprintf(name, sizeof(name), "%s%d%s",prefix, ptn_index, postfix); + sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return -ENOENT; + + sensor_dattr = &sensor->sensor_dev_attr; + dev_attr = &sensor_dattr->dev_attr; + snprintf(sensor->name, sizeof(sensor->name), name); + dev_attr_init(dev_attr, sensor->name, ptn->mode, + ptn->show, ptn->store); + sensor_dattr->index = acc + ai; + + DEBUG_INTR("%s-%d, name:%s index:%d\n", __func__, __LINE__, + name, sensor_dattr->index); + ret = add_attr2group(data, &dev_attr->attr); + if (ret) + return ret; + } + acc += ptn->count; + } + } + + return 0 ; +} + +static void mp_data_init(struct minipack_data *data) +{ + +} + +static int extract_numbers(char *buf, int *out, int out_cnt) +{ + char *ptr; + int cnt, x; + + ptr = buf; + /*replace non-digits into '|', for sscanf(%s)'s ease to handle it.*/ + for (x = 0; x < strlen(ptr); x++) { + if( (ptr[x]<'0' || ptr[x] >'9') && ptr[x] != '-') + ptr[x] = TTY_RESP_SEPARATOR; + } + + cnt = 0; + while (strchr(ptr, TTY_RESP_SEPARATOR)) + { + if (sscanf(ptr,"%d%s",out,ptr)) { + cnt++; + out++; + if (cnt == out_cnt) { + return 0; + } + } else { + ptr++; + } + } + + return -EINVAL; +} + +static int extract_2byteHex(char *buf, int *out, int out_cnt) +{ + char tmp[TTY_READ_MAX_LEN]; + char *ptr; + int cnt, x; + long y; + + + if (strstr(buf, "XXXX") != NULL) { + return -ENODEV; + } + + ptr = buf; + /*replace non-hex into '|', for sscanf(%s)'s ease to handle it.*/ + for (x = 0; x < strlen(ptr); x++) { + if((ptr[x]>='0' && ptr[x] <= '9') || (ptr[x] >= 'a' && ptr[x] <= 'f')) + ; + else + ptr[x] = TTY_RESP_SEPARATOR; + } + + cnt = 0; + while (strchr(ptr, TTY_RESP_SEPARATOR)) + { + ptr++; + if (strlen(ptr) && *ptr == TTY_RESP_SEPARATOR) { + continue; + } + if (sscanf(ptr,"%4s",tmp)) { + if(!strchr(tmp, TTY_RESP_SEPARATOR)) { + if (kstrtol(tmp, 16, &y) < 0) + return -EINVAL; + *out = (int)y; + cnt++; + out++; + if (cnt == out_cnt) { + return 0; + } + ptr += 4; + } + } else { + break; + } + } + + return -EINVAL; +} + +int pmbus_linear11(int in, bool power) { + int exponent; + int mantissa, val; + int data = in; + + exponent = ((short)data) >> 11; + mantissa = ((short)((data & 0x7ff) << 5)) >> 5; + + val = mantissa*1000; + if (power) + val *= 1000; + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +static int get_pmbus_regs_partial(int *in, int in_cnt, int *out, int *out_cnt) +{ + int i, j, k; + k = 0; + for (j = 0; j < ARRAY_SIZE(pmbus_regs); j++) { + for (i = 0; i < in_cnt; i++) { + if (i == (pmbus_regs[j].addr - PMBUS_REG_START)) { + *out = pmbus_linear11(in[i], pmbus_regs[j].power); + out++; + k++; + break; + } + } + } + if (k == 0) + return -EINVAL; + + *out_cnt = k; + return 0; +} + + +static int comm2BMC(enum sensor_type_e type, int *out, int out_cnt) +{ + char cmd[TTY_CMD_MAX_LEN], resp[TTY_READ_MAX_LEN]; + char *ptr; + int ret; + + if (out == NULL) + return -EINVAL; + if (out_cnt == 0) + return 0; + + snprintf(cmd, sizeof(cmd), model_ssets[type].query); + DEBUG_INTR("%s-%d, cmd:%s\n", __func__, __LINE__, cmd); + ret = bmc_transaction(cmd, resp, sizeof(resp)-1, model_ssets[type].mdelay); + if (ret < 0) { + return ret; + } + /*Strip off string of command just sent, if any.*/ + if (strstr(resp, cmd) != NULL) { + ptr = resp + strlen(cmd); + } else { + ptr = resp; + } + + switch (type) { + case SENSOR_TYPE_THERMAL: + case SENSOR_TYPE_FAN_RPM: + case SENSOR_TYPE_FAN_RPM_DN: + ret = extract_numbers(ptr, out, out_cnt); + break; + case SENSOR_TYPE_PSU1: + case SENSOR_TYPE_PSU2: + case SENSOR_TYPE_PSU3: + case SENSOR_TYPE_PSU4: + { + int reg[(PMBUS_REG_END - PMBUS_REG_START) +1]; + int total = (PMBUS_REG_END - PMBUS_REG_START) +1; + ret = extract_2byteHex(ptr, reg, total); + if(ret == 0) + get_pmbus_regs_partial(reg, total, out, &out_cnt); + break; + } + default: + return -EINVAL; + } + + return ret; +} + +static int get_type_data ( + struct sensor_data *data, enum sensor_type_e type, int index, + int **out, int *count) +{ + struct sensor_set *model = model_ssets; + + switch (type) { + case SENSOR_TYPE_THERMAL: + *out = &data->lm75_input[index]; + break; + case SENSOR_TYPE_FAN_RPM: + *out = &data->fan_rpm[index]; + break; + case SENSOR_TYPE_FAN_RPM_DN: + *out = &data->fan_rpm_dn[index]; + break; + case SENSOR_TYPE_PSU1: + case SENSOR_TYPE_PSU2: + case SENSOR_TYPE_PSU3: + case SENSOR_TYPE_PSU4: + *out = &data->psu_data[type-SENSOR_TYPE_PSU1][index]; + break; + default: + return -EINVAL; + } + *count = model[type].total; + return 0; +} + +static struct sensor_data* +update_data(struct device *dev, enum sensor_type_e type) { + struct minipack_data *data = mp_data; + bool *valid = &data->valid[type]; + unsigned long *last_updated = &data->last_updated[type]; + struct sensor_data* ret = NULL; + int *data_ptr = NULL; + int data_cnt, rc; + + mutex_lock(&data->update_lock); + if (time_after(jiffies, (*last_updated) + (poll_interval*HZ)) + || !(*valid)) + { + rc = get_type_data(&data->sdata, type, 0, &data_ptr, &data_cnt); + if (rc < 0) + goto exit_err; + + DEBUG_INTR("%s-%d, type:%d cnt:%d\n", __func__, __LINE__, type, data_cnt); + rc = comm2BMC(type, data_ptr, data_cnt); + if (rc < 0) { + /*Clear data if failed.*/ + if (data_ptr != NULL) + memset(data_ptr, 0, sizeof(*data_ptr)*data_cnt); + /*Make it valid if no such device, to avoid frequenctly access.*/ + if (rc == -ENODEV) { + *valid = 1; + } else { + *valid = 0; + } + } else { + *valid = 1; + } + *last_updated = jiffies; + } + ret = &data->sdata; +exit_err: + mutex_unlock(&data->update_lock); + return ret; +} + +static ssize_t show_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + return sprintf(buf, "%s\n", DRVNAME); +} + +static ssize_t _attr_show(struct device *dev, struct device_attribute *da, + char *buf) +{ + int index, count, rc; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct sensor_data* data; + int *out = NULL; + enum sensor_type_e type; + + type = attr->index / ATTR_TYPE_INDEX_GAP; + + DEBUG_INTR("%s-%d, type:%d index:%d\n", __func__, __LINE__, type, attr->index); + data = update_data(dev, type); + if (data == NULL) + return -EINVAL; + + index = attr->index % ATTR_TYPE_INDEX_GAP; + rc = get_type_data(data, type, index, &out, &count); + if (rc < 0 || out == NULL) + return -EINVAL; + + if( index > count) + return -EINVAL; + + return sprintf(buf, "%d\n", *out); +} + +static ssize_t show_fan_min(struct device *dev, struct device_attribute *da, + char *buf) +{ + return sprintf(buf, "%d\n", MIN_FAN_RPM); +} + +static ssize_t show_psu_vout_max(struct device *dev, struct device_attribute *da, + char *buf) +{ + return sprintf(buf, "%d\n", MAX_PSU_VOUT); +} + +static ssize_t show_psu_vout_min(struct device *dev, struct device_attribute *da, + char *buf) +{ + return sprintf(buf, "%d\n", MIN_PSU_VOUT); +} + +static int add_attr2group(struct minipack_data *data, struct attribute *attr) +{ + int new_max_attrs = ++data->num_attributes + ATTR_ALLOC_EXTRA; + void *new_attrs = krealloc(data->group.attrs, + new_max_attrs * sizeof(void *), + GFP_KERNEL); + DEBUG_INTR("%s-%d, num_attr:%d\n", __func__, __LINE__, new_max_attrs); + if (!new_attrs) + return -ENOMEM; + data->group.attrs = new_attrs; + + + data->group.attrs[data->num_attributes-1] = attr; + data->group.attrs[data->num_attributes] = NULL; + + return 0; +} + +static int minipack_probe(struct platform_device *pdev) +{ + int status = -1; + + mp_data->dev = &pdev->dev; + status = attributs_init(mp_data); + DEBUG_INTR("%s-%d, status:%d\n", __func__, __LINE__, status); + if (status) { + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&pdev->dev.kobj, &mp_data->group); + DEBUG_INTR("%s-%d, status:%d\n", __func__, __LINE__, status); + + if (status) { + goto exit_kfree; + } + + mp_data->hwmon_dev = hwmon_device_register(&pdev->dev); + if (IS_ERR(mp_data->hwmon_dev)) { + status = PTR_ERR(mp_data->hwmon_dev); + goto exit_remove; + } + dev_info(&pdev->dev, "minipack sensors found\n"); + return 0; + +exit_remove: + sysfs_remove_group(&pdev->dev.kobj, &mp_data->group); +exit_kfree: + kfree(mp_data->group.attrs); +exit: + return status; +} + +static int minipack_remove(struct platform_device *pdev) +{ + hwmon_device_unregister(mp_data->hwmon_dev); + sysfs_remove_group(&pdev->dev.kobj, &mp_data->group); + kfree(mp_data->group.attrs); + return 0; +} + +static struct platform_driver minipack_driver = { + .probe = minipack_probe, + .remove = minipack_remove, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + + +static int __init minipack_init(void) +{ + int ret; + + ret = platform_driver_register(&minipack_driver); + if (ret < 0) { + goto exit; + } + mp_data = kzalloc(sizeof(struct minipack_data), GFP_KERNEL); + if (!mp_data) { + ret = -ENOMEM; + platform_driver_unregister(&minipack_driver); + goto exit; + } + mutex_init(&mp_data->update_lock); + mp_data_init(mp_data); + + mp_data->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(mp_data->pdev)) { + ret = PTR_ERR(mp_data->pdev); + platform_driver_unregister(&minipack_driver); + kfree(mp_data); + goto exit; + } +exit: + return ret; +} + +static void __exit minipack_exit(void) +{ + if (!mp_data) { + return; + } + platform_device_unregister(mp_data->pdev); + platform_driver_unregister(&minipack_driver); + kfree(mp_data); +} + +module_init(minipack_init); +module_exit(minipack_exit); + +MODULE_AUTHOR("Roy Lee "); +MODULE_DESCRIPTION("Minipack platform sensors driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/service/minipack-platform-init.service b/platform/broadcom/sonic-platform-modules-accton/minipack/service/minipack-platform-init.service new file mode 100644 index 00000000000..4a0f803b271 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/service/minipack-platform-init.service @@ -0,0 +1,14 @@ +[Unit] +Description=Accton MiniPack Platform Monitoring service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/accton_minipack_util.py install +ExecStop=/usr/local/bin/accton_minipack_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/service/minipack-setup-qsfp-oom.service b/platform/broadcom/sonic-platform-modules-accton/minipack/service/minipack-setup-qsfp-oom.service new file mode 100644 index 00000000000..df1c961bf18 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/service/minipack-setup-qsfp-oom.service @@ -0,0 +1,16 @@ +[Unit] +Description=Accton MiniPack Platform setup qsfp oom service +Before=pmon.service +After=minipack-platform-init.service +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/setup_qsfp_eeprom.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/setup.py b/platform/broadcom/sonic-platform-modules-accton/minipack/setup.py new file mode 100755 index 00000000000..b5d08c090ba --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/setup.py @@ -0,0 +1,20 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup, Extension +os.listdir + +module1 = Extension("fbfpgaio", sources = ["minipack/lib/fbfpgaiomodule.c"]) + +setup( + name='minipack', + version='1.0', + description='Module to initialize Accton MiniPack platforms', + + packages=['minipack'], + package_dir={'minipack': 'minipack/classes'}, + ext_modules=[module1], + +) + diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/utils/README b/platform/broadcom/sonic-platform-modules-accton/minipack/utils/README new file mode 100644 index 00000000000..bb52538deb3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/utils/README @@ -0,0 +1,48 @@ +Copyright (C) 2019 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +Contents of this package: + module - Contains source code of kernel driver modules. + util - operational scripts. + +Sonic creates a docker container and run building process under it. +If user tries to built new drivers, please get into that docker and +dpkg-buildpackage for them. + +All Linux kernel code is licensed under the GPLv1. All other code is +licensed under the GPLv3. Please see the LICENSE file for copies of +both licenses. + +==================================================================== +The most of peripherals are accessed through BMC. +Only system eeprom and QSFP are directly accessed by CPU. + +System LED: + There are 2 system LEDs at the upper-left corner of front panel. + +Fan Control: + There are 16 fans inside 8 fan modules. + +Thermal sensers: + 8 temperature sensors are controlled by the lm75 kernel modules. + +PSUs: + There r42 power supplies slot at the back. + Once if a PSU is not plugged, the data of it is shown all 0's. + +There are 128 QSFP modules are equipped. +Before operating on PSU and QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/utils/accton_minipack_util.py b/platform/broadcom/sonic-platform-modules-accton/minipack/utils/accton_minipack_util.py new file mode 100755 index 00000000000..261074c5d99 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/utils/accton_minipack_util.py @@ -0,0 +1,484 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# Description: +# Due to adoption of optoe drivers, sideband signals of SFPs are moved +# into cpld drivers. Add a new dict, cpld_of_module, for mapping this +# attributes to corresponding cpld nodes. +# + + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +PROJECT_NAME = 'minipack' +version = '0.2.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'psu':2, 'sfp':32} + + +led_prefix ='' +hwmon_types = {'led': ['diag','loc'], + } +hwmon_nodes = {'led': ['brightness'] , + } +hwmon_prefix ={'led': led_prefix, + } + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = { + 'psu': ['35-0038','36-003b'], + 'sfp': ['-0050']} +i2c_nodes = { + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['module_present_', 'sfp_tx_disable']} + +NO_QSFP = 128 + +#For sideband signals of SFP/QSFP modules. +cpld_of_module = {'-0062': list(range(0,16)), + '-0064': list(range(16,32)) } + + +mknod =[ +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo 24c64 0x57 > /sys/bus/i2c/devices/i2c-1/new_device', +] + +FORCE = 0 + + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " sfp 1-32 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-54 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ACCTON DBG]: "+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status = 1 + output = "" + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log ("cmd:" + cmd) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_inserted(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + + + +kos = [ +'depmod -ae', +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe optoe', +'modprobe minipack_psensor'] + +def driver_install(): + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + for i in range(0,len(kos)): + #remove parameter if any + rm = kos[-(i+1)] + lst = rm.split(" ") + if len(lst) > 2: + del(lst[2:]) + rm = " ".join(lst) + + #Change to removing commands + rm = rm.replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +def sfp_map(index): + port = index + 1 + base = ((port-1)/8*8) + 10 + index = (port - 1) % 8 + index = 7 - index + if (index%2): + index = index -1 + else: + index = index +1 + bus = base + index + return bus + +def device_install(): + for i in range(0,len(mknod)): + #for pca932x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(2) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + + rm_cmd="rm -rf /usr/local/bin/minipack_qsfp > /dev/null 2>&1" + log_os_system(rm_cmd, 1) + mk_cmd= "mkdir /usr/local/bin/minipack_qsfp" + log_os_system(mk_cmd, 1) + + return + +def device_uninstall(): + nodelist = mknod + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_inserted() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_inserted() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_inserted()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + bus = 1 + node = key+str(k+1) + path = i2c_prefix + str(bus) + lk + "/"+ nodes[j] + str(k+1) + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0070", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/utils/setup_qsfp_eeprom.py b/platform/broadcom/sonic-platform-modules-accton/minipack/utils/setup_qsfp_eeprom.py new file mode 100755 index 00000000000..84388520b90 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/utils/setup_qsfp_eeprom.py @@ -0,0 +1,317 @@ +#!/usr/bin/env python +# +# Copyright (c) 2019 Edgecore Networks Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. + +# ------------------------------------------------------------------ +# HISTORY: +# mm/dd/yyyy (A.D.) +# 7/22/2019: Jostar create for minipack +# ------------------------------------------------------------------ + +try: + import os + import sys, getopt + import subprocess + import subprocess + import click + import imp + import commands + import logging + import logging.config + import logging.handlers + import types + import time # this is only being used as part of the example + import traceback + from tabulate import tabulate + from minipack.pimutil import PimUtil +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +#2:idle state. 1:insert state, 0:remove state. +pim_state=[2,2,2,2,2,2,2,2] + +# port_use_i2c_bus[idx], idx means port_idx. Idx start from 0 to 127 +# port_use_i2c_bus[0] means port0 use i2c-device number +# port_use_i2c_bus[1] means port1 use i2c-device number +#At default , port_use_i2c_bus are 0. When PIM insert, it will no be 0 +port_use_i2c_bus= [0] * 128 + +#pim_port_use_bus[idx] are for 8 channel use. At default, pim_port_use_bus[idx]=0 +#pim_port_use_bus[idx] will save pim_idx(0 to 7). +#setup service will check when pim insert at first time. +#It will find +# 1. Does this pim card insert or not in the past. So it will check pim_port_use_bus[idx] +# 2. If make sure that pim_port_use_bus[idx]==0. Assgin oom start i2c dev numer to pim_port_use_bus[idx]. +#Never set pim_port_use_bus[idx] to 0 +#So if pim next insert, it need to check whether pim_port_use_bus[idx] is 0 or not. +#if pim_port_use_bus[idx]!=0, means this pim card has setup oom sysfs +pim_port_use_bus=[0] * 8 + +oom_i2c_bus_table=1 + +pim_dev=PimUtil() + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/usr/local/bin/setup_qsfp_eeprom' +DEBUG = False +PIM_MIN=0 +PIM_MAX=8 + +def my_log(txt): + if DEBUG == True: + print "[ACCTON DBG]: "+txt + return + +def log_os_system(cmd): + logging.info('Run :'+cmd) + status = 1 + output = "" + status, output = commands.getstatusoutput(cmd) + if status: + logging.info('Failed :'+cmd) + return status, output + +def qsfp_map_bus(idx): + port = idx + 1 + base = ((port-1)/8*8) + 10 + idx = (port - 1) % 8 + idx = 7 - idx + if (idx%2): + idx = idx -1 + else: + idx = idx +1 + bus = base + idx + return bus + +def pca9548_sysfs(i2c_bus, create): + if create==1: + cmdl = "echo pca9548 0x%x > /sys/bus/i2c/devices/i2c-%d/new_device" + else: + cmdl = "echo 0x%x > /sys/bus/i2c/devices/i2c-%d/delete_device" + + cmdm = cmdl % (0x72, i2c_bus) + status1, output =log_os_system(cmdm) + cmdm = cmdl % (0x71, i2c_bus) + status2, output =log_os_system(cmdm) + return (status1 | status2) + + +def qsfp_eeprom_sys(pim_idx, i2c_bus_order, create): + # initialize multiplexer for 8 PIMs + global port_use_i2c_bus + start_port=pim_idx*16 + end_port = (pim_idx+1)*16 + start_bus=(i2c_bus_order-1)*16 + end_bus = i2c_bus_order*16 + k=start_port + for i in range(start_bus, end_bus): + bus = qsfp_map_bus(i) + if create==1: + status, output =log_os_system( + "echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-"+str(bus)+"/new_device") + if status: + print output + return 1 + status, output =log_os_system( + "echo port"+str(k+1)+" > /sys/bus/i2c/devices/"+str(bus)+"-0050/port_name") + + status, output =log_os_system( + "ln -s -f /sys/bus/i2c/devices/"+str(bus)+"-0050/eeprom" + " /usr/local/bin/minipack_qsfp/port" + str(k) + "_eeprom") + if status: + print output + return 1 + else: + status, output =log_os_system( + "echo 0x50 > /sys/bus/i2c/devices/i2c-"+str(bus)+"/delete_device") + if status: + print output + + k=k+1 + + return 0 + +def check_pca_active( i2c_addr, bus): + cmd = "i2cget -y -f %d 0x%x 0x0" + cmd = cmd %(bus, i2c_addr) + status, output = commands.getstatusoutput(cmd) + return status + +def set_pim_port_use_bus(pim_idx): + + global pim_port_use_bus + global oom_i2c_bus_table + + if pim_port_use_bus[pim_idx]!=0: + return 0 + + pim_port_use_bus[pim_idx]=oom_i2c_bus_table + oom_i2c_bus_table=oom_i2c_bus_table+1 + + return pim_port_use_bus[pim_idx] + + +def del_pim_port_use_bus(pim_idx): + global oom_i2c_bus_table + + oom_i2c_bus_table=oom_i2c_bus_table-1 + pim_port_use_bus[pim_idx]=0 + + +def device_remove(): + cmd1 = "echo 0x%x > /sys/bus/i2c/devices/i2c-%d/delete_device" + + for bus in range(2, 10): + #ret=check_pca_active(0x72, bus) + #if ret==0: + + cmdm= cmd1 % (0x72, bus) + status, output = commands.getstatusoutput(cmdm) + print "Remove %d-0072 i2c device"%bus + cmdm= cmd1 % (0x71, bus) + status, output = commands.getstatusoutput(cmdm) + print "Remove %d-0071 i2c device"%bus + + cmd="rm -f /usr/local/bin/minipack_qsfp/port*" + status, output=log_os_system(cmd) + return status + +class device_monitor(object): + + PIM_STATE_REMOVE = 0 + PIM_STATE_INSERT = 1 + PIM_STATE_IDLE=2 + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + sys_handler = handler = logging.handlers.SysLogHandler(address = '/dev/log') + sys_handler.setLevel(logging.WARNING) + logging.getLogger('').addHandler(sys_handler) + + #logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level) + + def manage_pim(self): + global pim_dev + global pim_state + + for pim_idx in range(PIM_MIN, PIM_MAX): + presence=pim_dev.get_pim_presence(pim_idx) + if presence==1: + if pim_state[pim_idx]!=self.PIM_STATE_INSERT: + #find which i2c_device can use. It start from 2 + i2c_bus_order=set_pim_port_use_bus(pim_idx) + if i2c_bus_order==0: + logging.info("pim_state[%d] PIM_STATE_INSERT", pim_idx); + pim_state[pim_idx]=self.PIM_STATE_INSERT + continue + + logging.info ("pim_idx=%d oom use i2c_bus_order=%d", pim_idx, i2c_bus_order) + ready=0 + retry_limit=100 + retry_count=0 + while retry_count < retry_limit: + ret=check_pca_active(0x72, pim_idx+2) + if ret==0: + ready=1 + break + retry_count=retry_count+1 + time.sleep(0.2) + + if ready==1: + status=pca9548_sysfs(pim_idx+2, 1) + if status: + status=pca9548_sysfs(pim_idx+2, 0) #del pca i2c device, give up set oom at this time. + del_pim_port_use_bus(pim_idx) + continue + status=qsfp_eeprom_sys(pim_idx,i2c_bus_order, 1) + if status: + status=pca9548_sysfs(pim_idx+2, 0) #del pca i2c device, give up set oom at this time. + del_pim_port_use_bus(pim_idx) + continue + #ret_2=check_pca_active(0x72, pim_idx+2) + #ret_1=check_pca_active(0x71, pim_idx+2) + + pim_state[pim_idx]=self.PIM_STATE_INSERT + logging.info("pim_state[%d] PIM_STATE_INSERT", pim_idx); + else: + print "retry check 100 times for check pca addr" + del_pim_port_use_bus(pim_idx) + else: + if pim_state[pim_idx]==self.PIM_STATE_INSERT: + #pca9548_sysfs(pim_idx+2, 0) + pim_state[pim_idx]=self.PIM_STATE_REMOVE + logging.info("pim_state[%d] PIM_STATE_REMOVE", pim_idx); + +def main(argv): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.INFO + remove_dev=0 + cpu_pca_i2c_ready=0 + + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv,'hdlr',['lfile=']) + except getopt.GetoptError: + print 'A:Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + for opt, arg in opts: + if opt == '-h': + print 'B:Usage: %s [-d] [-l ]' % sys.argv[0] + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + elif opt in ('-r', '--remove'): + remove_dev=1 + + if remove_dev==1: + device_remove() + return 0 + monitor = device_monitor(log_file, log_level) + global pim_dev + pim_dev.init_pim_fpga() + + while cpu_pca_i2c_ready==0: + status=check_pca_active(0x70, 1) + time.sleep(0.5) + if status==0: + cpu_pca_i2c_ready=1 + print "Make sure CPU pca i2c device is ready" + break + + while True: + monitor.manage_pim() + time.sleep(2) + + +if __name__ == "__main__": + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/.gitignore b/platform/broadcom/sonic-platform-modules-alphanetworks/.gitignore new file mode 100644 index 00000000000..7f287d53822 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/.gitignore @@ -0,0 +1,50 @@ +# Object files +*.o +*.ko +*.obj +*.elf + +# Precompiled Headers +*.gch +*.pch + +# Libraries +*.lib +*.a +*.la +*.lo + +# Shared objects (inc. Windows DLLs) +*.dll +*.so +*.so.* +*.dylib + +# Executables +*.exe +*.out +*.app +*.i*86 +*.x86_64 +*.hex + +# Debug files +*.dSYM/ +*.su + +# Kernel Module Compile Results +*.mod* +*.cmd +*.o.d +.tmp_versions/ +modules.order +Module.symvers +Mkfile.old +dkms.conf + +# Debian packaging +*.debhelper.log +*.postinst.debhelper +*.postrm.debhelper +*.prerm.debhelper +*.substvars diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/README.md b/platform/broadcom/sonic-platform-modules-alphanetworks/README.md new file mode 100644 index 00000000000..a0c75383010 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/README.md @@ -0,0 +1 @@ +platform drivers of Alphanetworks products for the SONiC project diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/debian/changelog b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/changelog new file mode 100644 index 00000000000..2742b7c6a41 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/changelog @@ -0,0 +1,6 @@ +sonic-alphanetworks-platform-modules (1.0) unstable; urgency=low + + * Add support for SNH60A0-320FV2 and SNH60B0_640F. + + -- Alphanetworks Tue, 19 Dec 2017 09:35:58 +0800 + diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/debian/compat b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control new file mode 100644 index 00000000000..9a53b982322 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control @@ -0,0 +1,17 @@ +Source: sonic-alphanetworks-platform-modules +Section: main +Priority: extra +Maintainer: Alphanetworks , Alphanetworks +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: sonic-platform-alphanetworks-snh60a0-320fv2 +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: sonic-platform-alphanetworks-snh60b0-640f +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/debian/rules b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/rules new file mode 100755 index 00000000000..0d1a588db6b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/rules @@ -0,0 +1,86 @@ +#!/usr/bin/make -f +# -*- makefile -*- +# Sample debian/rules that uses debhelper. +# This file was originally written by Joey Hess and Craig Small. +# As a special exception, when this file is copied by dh-make into a +# dh-make output file, you may use that output file without restriction. +# This special exception was added by Craig Small in version 0.37 of dh-make. + +include /usr/share/dpkg/pkg-info.mk + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + +export INSTALL_MOD_DIR:=extra + +PYTHON ?= python2 + +PACKAGE_PRE_NAME := sonic-platform-alphanetworks +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= snh60a0-320fv2 snh60b0-640f +MODULE_DIR := modules +UTILS_DIR := utils +SERVICE_DIR := service +CLASSES_DIR := classes +CONF_DIR := conf + +%: + dh $@ --with systemd,python2,python3 --buildsystem=pybuild + +clean: + dh_testdir + dh_testroot + dh_clean + +build: + #make modules -C $(KERNEL_SRC)/build M=$(MODULE_SRC) + (for mod in $(MODULE_DIRS); do \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + $(PYTHON) $${mod}/setup.py build; \ + done) + +binary: binary-arch binary-indep + # Nothing to do + +binary-arch: + # Nothing to do + +#install: build + #dh_testdir + #dh_testroot + #dh_clean -k + #dh_installdirs + +binary-indep: + dh_testdir + dh_installdirs + + # Custom package commands + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system; \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin/; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system/; \ + $(PYTHON) $${mod}/setup.py install --root=$(MOD_SRC_DIR)/debian/$(PACKAGE_PRE_NAME)-$${mod} --install-layout=deb; \ + done) + # Resuming debhelper scripts + dh_testroot + dh_install + dh_installchangelogs + dh_installdocs + dh_systemd_enable + dh_installinit + dh_systemd_start + dh_link + dh_fixperms + dh_compress + dh_strip + dh_installdeb + dh_gencontrol + dh_md5sums + dh_builddeb +.PHONY: build binary binary-arch binary-indep clean diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/classes/__init__.py b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/classes/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/Makefile b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/Makefile new file mode 100644 index 00000000000..f9477910d38 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/Makefile @@ -0,0 +1,8 @@ +# obj-m:=accton_as7712_32x_fan.o accton_as7712_32x_sfp.o leds-accton_as7712_32x.o \ +# goreme_system_cpld.o ym2651y.o optoe.o + +obj-m:=alphanetworks_snh60a0-320fv2_sfp.o snh60a0_system_cpld.o snh60a0_power_cpld.o snh60a0_onie_eeprom.o + + +# obj-m:=accton_as7712_32x_fan.o accton_as7712_32x_sfp.o leds-accton_as7712_32x.o \ +# accton_as7712_32x_psu.o accton_i2c_cpld.o ym2651y.o optoe.o diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/alphanetworks_snh60a0-320fv2_sfp.c b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/alphanetworks_snh60a0-320fv2_sfp.c new file mode 100644 index 00000000000..af47c6521a0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/alphanetworks_snh60a0-320fv2_sfp.c @@ -0,0 +1,1669 @@ +/* + * SFP driver for alphanetworks snh60a0-320fv2 sfp + * + * Copyright (C) 2018 Alphanetworks Technology Corporation. + * Philip Wang + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * see + * + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "snh60a0_320fv2_sfp" + +#define DEBUG_MODE 0 + +#if (DEBUG_MODE == 1) + #define DEBUG_PRINT(fmt, args...) \ + printk (KERN_INFO "%s[%s,%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +#define NUM_OF_SFP_PORT 32 +#define EEPROM_NAME "sfp_eeprom" +#define EEPROM_SIZE 256 /* 256 byte eeprom */ +#define BIT_INDEX(i) (1ULL << (i)) +#define USE_I2C_BLOCK_READ 1 +#define I2C_RW_RETRY_COUNT 3 +#define I2C_RW_RETRY_INTERVAL 100 /* ms */ + +#define SFP_CPLD_I2C_ADDR 0x5F +#define SFP_EEPROM_A0_I2C_ADDR 0x50 +#define SFP_EEPROM_A2_I2C_ADDR 0x68 + +#define SFF8024_PHYSICAL_DEVICE_ID_ADDR 0x0 +#define SFF8024_DEVICE_ID_SFP 0x3 +#define SFF8024_DEVICE_ID_QSFP 0xC +#define SFF8024_DEVICE_ID_QSFP_PLUS 0xD +#define SFF8024_DEVICE_ID_QSFP28 0x11 + +#define SFF8472_DIAG_MON_TYPE_ADDR 92 +#define SFF8472_DIAG_MON_TYPE_DDM_MASK 0x40 +#define SFF8472_10G_ETH_COMPLIANCE_ADDR 0x3 +#define SFF8472_10G_BASE_MASK 0xF0 + +#define SFF8436_RX_LOS_ADDR 3 +#define SFF8436_TX_FAULT_ADDR 4 +#define SFF8436_TX_DISABLE_ADDR 86 + +static ssize_t sfp_eeprom_read(struct i2c_client *, u8, u8 *,int); +static ssize_t sfp_eeprom_write(struct i2c_client *, u8 , const char *,int); +/* extern int alpha_i2c_cpld_read(unsigned short cpld_addr, u8 reg); */ +extern int alpha_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { SFP_EEPROM_A0_I2C_ADDR, SFP_EEPROM_A2_I2C_ADDR, SFP_CPLD_I2C_ADDR, I2C_CLIENT_END }; + +#define CPLD_PORT_TO_FRONT_PORT(port) (port+1) + +enum port_numbers { +sfp1, sfp2, sfp3, sfp4, sfp5, sfp6, sfp7, sfp8, +sfp9, sfp10, sfp11, sfp12, sfp13, sfp14, sfp15, sfp16, +sfp17, sfp18, sfp19, sfp20, sfp21, sfp22, sfp23, sfp24, +sfp25, sfp26, sfp27, sfp28, sfp29, sfp30, sfp31, sfp32 +}; + +static const struct i2c_device_id sfp_device_id[] = { +{ "sfpcpld1", sfp1 }, { "sfpcpld2", sfp2 }, { "sfpcpld3", sfp3 }, { "sfpcpld4", sfp4 }, +{ "sfpcpld5", sfp5 }, { "sfpcpld6", sfp6 }, { "sfpcpld7", sfp7 }, { "sfpcpld8", sfp8 }, +{ "sfpcpld9", sfp9 }, { "sfpcpld10", sfp10 }, { "sfpcpld11", sfp11 }, { "sfpcpld12", sfp12 }, +{ "sfpcpld13", sfp13 }, { "sfpcpld14", sfp14 }, { "sfpcpld15", sfp15 }, { "sfpcpld16", sfp16 }, +{ "sfpcpld17", sfp17 }, { "sfpcpld18", sfp18 }, { "sfpcpld19", sfp19 }, { "sfpcpld20", sfp20 }, +{ "sfpcpld21", sfp21 }, { "sfpcpld22", sfp22 }, { "sfpcpld23", sfp23 }, { "sfpcpld24", sfp24 }, +{ "sfpcpld25", sfp25 }, { "sfpcpld26", sfp26 }, { "sfpcpld27", sfp27 }, { "sfpcpld28", sfp28 }, +{ "sfpcpld29", sfp29 }, { "sfpcpld30", sfp30 }, { "sfpcpld31", sfp31 }, { "sfpcpld32", sfp32 }, +{} +}; +MODULE_DEVICE_TABLE(i2c, sfp_device_id); + +/* + * list of valid port types + * note OOM_PORT_TYPE_NOT_PRESENT to indicate no + * module is present in this port + */ +typedef enum oom_driver_port_type_e { + OOM_DRIVER_PORT_TYPE_INVALID, + OOM_DRIVER_PORT_TYPE_NOT_PRESENT, + OOM_DRIVER_PORT_TYPE_SFP, + OOM_DRIVER_PORT_TYPE_SFP_PLUS, + OOM_DRIVER_PORT_TYPE_QSFP, + OOM_DRIVER_PORT_TYPE_QSFP_PLUS, + OOM_DRIVER_PORT_TYPE_QSFP28 +} oom_driver_port_type_t; + +enum driver_type_e { + DRIVER_TYPE_SFP_MSA, + DRIVER_TYPE_SFP_DDM, + DRIVER_TYPE_QSFP +}; + +/* Each client has this additional data + */ +struct eeprom_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + struct bin_attribute bin; /* eeprom data */ +}; + +struct sfp_msa_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u64 status[2]; /* index 0 => device id + 1 => 10G Ethernet Compliance Codes + to distinguish SFP or SFP+ + 2 => DIAGNOSTIC MONITORING TYPE */ + struct eeprom_data eeprom; +}; + +struct sfp_ddm_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u64 status[3]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss */ + struct eeprom_data eeprom; +}; + +struct qsfp_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status[3]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss */ + + u8 device_id; + struct eeprom_data eeprom; +}; + +struct sfp_port_data { + struct mutex update_lock; + enum driver_type_e driver_type; + int port; /* CPLD port index */ + oom_driver_port_type_t port_type; + u64 present; /* present status, bit0:port0, bit1:port1 and so on */ + u64 port_reset; /* reset status, bit0:port0, bit1:port1 and so on */ + + struct sfp_msa_data *msa; + struct sfp_ddm_data *ddm; + struct qsfp_data *qsfp; + + struct i2c_client *client; +}; + +enum sfp_sysfs_port_num_attributes { + PORT1_NUMBER, + PORT2_NUMBER, + PORT3_NUMBER, + PORT4_NUMBER, + PORT5_NUMBER, + PORT6_NUMBER, + PORT7_NUMBER, + PORT8_NUMBER, + PORT_NUMBER_MAX +}; + +enum sfp_sysfs_present_attributes { + PORT1_PRESENT, + PORT2_PRESENT, + PORT3_PRESENT, + PORT4_PRESENT, + PORT5_PRESENT, + PORT6_PRESENT, + PORT7_PRESENT, + PORT8_PRESENT, + PORT1_PRESENT_ALL, + PORT2_PRESENT_ALL, + PORT3_PRESENT_ALL, + PORT4_PRESENT_ALL, + PORT5_PRESENT_ALL, + PORT6_PRESENT_ALL, + PORT7_PRESENT_ALL, + PORT8_PRESENT_ALL, + PORT_PRESENT_MAX +}; + +enum sfp_sysfs_type_attributes { + PORT1_TYPE, + PORT2_TYPE, + PORT3_TYPE, + PORT4_TYPE, + PORT5_TYPE, + PORT6_TYPE, + PORT7_TYPE, + PORT8_TYPE, + PORT_TYPE_MAX +}; + +enum sfp_sysfs_reset_attributes { + PORT1_RESET, + PORT2_RESET, + PORT3_RESET, + PORT4_RESET, + PORT5_RESET, + PORT6_RESET, + PORT7_RESET, + PORT8_RESET, + PORT_RESET_MAX +}; + +enum sfp_sysfs_rx_los_attributes { + PORT1_RX_LOS, + PORT2_RX_LOS, + PORT3_RX_LOS, + PORT4_RX_LOS, + PORT5_RX_LOS, + PORT6_RX_LOS, + PORT7_RX_LOS, + PORT8_RX_LOS, + PORT1_RX_LOS1, + PORT2_RX_LOS1, + PORT3_RX_LOS1, + PORT4_RX_LOS1, + PORT5_RX_LOS1, + PORT6_RX_LOS1, + PORT7_RX_LOS1, + PORT8_RX_LOS1, + PORT1_RX_LOS2, + PORT2_RX_LOS2, + PORT3_RX_LOS2, + PORT4_RX_LOS2, + PORT5_RX_LOS2, + PORT6_RX_LOS2, + PORT7_RX_LOS2, + PORT8_RX_LOS2, + PORT1_RX_LOS3, + PORT2_RX_LOS3, + PORT3_RX_LOS3, + PORT4_RX_LOS3, + PORT5_RX_LOS3, + PORT6_RX_LOS3, + PORT7_RX_LOS3, + PORT8_RX_LOS3, + PORT1_RX_LOS4, + PORT2_RX_LOS4, + PORT3_RX_LOS4, + PORT4_RX_LOS4, + PORT5_RX_LOS4, + PORT6_RX_LOS4, + PORT7_RX_LOS4, + PORT8_RX_LOS4, + PORT1_RX_LOS_ALL, + PORT2_RX_LOS_ALL, + PORT3_RX_LOS_ALL, + PORT4_RX_LOS_ALL, + PORT5_RX_LOS_ALL, + PORT6_RX_LOS_ALL, + PORT7_RX_LOS_ALL, + PORT8_RX_LOS_ALL, + PORT_RX_LOS_MAX +}; + +enum sfp_sysfs_tx_disable_attributes { + PORT1_TX_DISABLE = PORT_RX_LOS_MAX, + PORT2_TX_DISABLE, + PORT3_TX_DISABLE, + PORT4_TX_DISABLE, + PORT5_TX_DISABLE, + PORT6_TX_DISABLE, + PORT7_TX_DISABLE, + PORT8_TX_DISABLE, + PORT1_TX_DISABLE1, + PORT2_TX_DISABLE1, + PORT3_TX_DISABLE1, + PORT4_TX_DISABLE1, + PORT5_TX_DISABLE1, + PORT6_TX_DISABLE1, + PORT7_TX_DISABLE1, + PORT8_TX_DISABLE1, + PORT1_TX_DISABLE2, + PORT2_TX_DISABLE2, + PORT3_TX_DISABLE2, + PORT4_TX_DISABLE2, + PORT5_TX_DISABLE2, + PORT6_TX_DISABLE2, + PORT7_TX_DISABLE2, + PORT8_TX_DISABLE2, + PORT1_TX_DISABLE3, + PORT2_TX_DISABLE3, + PORT3_TX_DISABLE3, + PORT4_TX_DISABLE3, + PORT5_TX_DISABLE3, + PORT6_TX_DISABLE3, + PORT7_TX_DISABLE3, + PORT8_TX_DISABLE3, + PORT1_TX_DISABLE4, + PORT2_TX_DISABLE4, + PORT3_TX_DISABLE4, + PORT4_TX_DISABLE4, + PORT5_TX_DISABLE4, + PORT6_TX_DISABLE4, + PORT7_TX_DISABLE4, + PORT8_TX_DISABLE4, + PORT1_TX_DISABLE_ALL, + PORT2_TX_DISABLE_ALL, + PORT3_TX_DISABLE_ALL, + PORT4_TX_DISABLE_ALL, + PORT5_TX_DISABLE_ALL, + PORT6_TX_DISABLE_ALL, + PORT7_TX_DISABLE_ALL, + PORT8_TX_DISABLE_ALL, + PORT_TX_DISABLE_MAX +}; + +enum sfp_sysfs_tx_fault_attributes { + PORT1_TX_FAULT = PORT_TX_DISABLE_MAX, + PORT2_TX_FAULT, + PORT3_TX_FAULT, + PORT4_TX_FAULT, + PORT5_TX_FAULT, + PORT6_TX_FAULT, + PORT7_TX_FAULT, + PORT8_TX_FAULT, + PORT1_TX_FAULT1, + PORT2_TX_FAULT1, + PORT3_TX_FAULT1, + PORT4_TX_FAULT1, + PORT5_TX_FAULT1, + PORT6_TX_FAULT1, + PORT7_TX_FAULT1, + PORT8_TX_FAULT1, + PORT1_TX_FAULT2, + PORT2_TX_FAULT2, + PORT3_TX_FAULT2, + PORT4_TX_FAULT2, + PORT5_TX_FAULT2, + PORT6_TX_FAULT2, + PORT7_TX_FAULT2, + PORT8_TX_FAULT2, + PORT1_TX_FAULT3, + PORT2_TX_FAULT3, + PORT3_TX_FAULT3, + PORT4_TX_FAULT3, + PORT5_TX_FAULT3, + PORT6_TX_FAULT3, + PORT7_TX_FAULT3, + PORT8_TX_FAULT3, + PORT1_TX_FAULT4, + PORT2_TX_FAULT4, + PORT3_TX_FAULT4, + PORT4_TX_FAULT4, + PORT5_TX_FAULT4, + PORT6_TX_FAULT4, + PORT7_TX_FAULT4, + PORT8_TX_FAULT4, + PORT_TX_FAULT_MAX +}; + +enum sfp_sysfs_eeprom_attributes { + PORT1_EEPROM, + PORT2_EEPROM, + PORT3_EEPROM, + PORT4_EEPROM, + PORT5_EEPROM, + PORT6_EEPROM, + PORT7_EEPROM, + PORT8_EEPROM, + PORT_EEPROM_MAX +}; + +enum sfp_sysfs_ddm_implemented_attributes { + PORT1_DDM_IMPLEMENTED, + PORT2_DDM_IMPLEMENTED, + PORT3_DDM_IMPLEMENTED, + PORT4_DDM_IMPLEMENTED, + PORT5_DDM_IMPLEMENTED, + PORT6_DDM_IMPLEMENTED, + PORT7_DDM_IMPLEMENTED, + PORT8_DDM_IMPLEMENTED, + PORT_DDM_IMPLEMENTED_MAX +}; + +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + DEBUG_PRINT("show_port_number port number:%d", data->port + attr->index); + return sprintf(buf, "%d\n", CPLD_PORT_TO_FRONT_PORT(data->port + attr->index)); +} + +static struct sfp_port_data *sfp_update_present(struct i2c_client *client) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + int i = 0; + int status = -1; + u8 regs[] = {0x05}; + + DEBUG_PRINT("Starting sfp present status update"); + mutex_lock(&data->update_lock); + + /* Read present status of port 1~32 */ + data->present = 0; + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = i2c_smbus_read_byte_data(client, regs[i]); + + if (status < 0) { + DEBUG_PRINT("cpld(0x5f) reg(0x%x) err %d", regs[i], status); + goto exit; + } + + DEBUG_PRINT("Present status = 0x%llx", data->present); + data->present |= (u64)status << (i*8); + } + + DEBUG_PRINT("Present status = 0x%llx", data->present); +exit: + mutex_unlock(&data->update_lock); + return data; +} + +static struct sfp_port_data *sfp_update_tx_rx_status(struct device *dev) +{ + return NULL; +} + +static ssize_t sfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + return 0; +} + +static int sfp_is_port_present(struct i2c_client *client, int port) +{ + struct sfp_port_data *data = sfp_update_present(client); + return (data->present & BIT_INDEX(port)) ? 1 : 0; +} + +static ssize_t show_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + + if ((attr->index >= PORT1_PRESENT_ALL) && (attr->index <= PORT8_PRESENT_ALL)) { + + } + + /* PRESENT */ + return sprintf(buf, "%d\n", sfp_is_port_present(client, attr->index)); +} + +static struct sfp_port_data *sfp_update_port_type(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + u8 buf = 0; + int status; + + mutex_lock(&data->update_lock); + + switch (data->driver_type) { + case DRIVER_TYPE_SFP_MSA: + { + status = sfp_eeprom_read(data->client, SFF8024_PHYSICAL_DEVICE_ID_ADDR, &buf, sizeof(buf)); + if (status < 0) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + if (buf != SFF8024_DEVICE_ID_SFP) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + status = sfp_eeprom_read(data->client, SFF8472_10G_ETH_COMPLIANCE_ADDR, &buf, sizeof(buf)); + if (status < 0) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + DEBUG_PRINT("sfp port type (0x3) data = (0x%x)", buf); + data->port_type = buf & SFF8472_10G_BASE_MASK ? OOM_DRIVER_PORT_TYPE_SFP_PLUS : OOM_DRIVER_PORT_TYPE_SFP; + break; + } + case DRIVER_TYPE_QSFP: + { + status = sfp_eeprom_read(data->client, SFF8024_PHYSICAL_DEVICE_ID_ADDR, &buf, sizeof(buf)); + if (status < 0) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + DEBUG_PRINT("qsfp port type (0x0) buf = (0x%x)", buf); + switch (buf) { + case SFF8024_DEVICE_ID_QSFP: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP; + break; + case SFF8024_DEVICE_ID_QSFP_PLUS: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP_PLUS; + break; + case SFF8024_DEVICE_ID_QSFP28: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP_PLUS; + break; + default: + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + break; + } + default: + break; + } + + mutex_unlock(&data->update_lock); + return data; +} + +static ssize_t show_port_type(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + + if (!sfp_is_port_present(client, attr->index)) { + return sprintf(buf, "%d\n", OOM_DRIVER_PORT_TYPE_NOT_PRESENT); + } + + sfp_update_port_type(dev); + return sprintf(buf, "%d\n", data->port_type); +} + + +static struct sfp_port_data *sfp_update_port_reset(struct i2c_client *client) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + int i = 0; + int status = -1; + u8 regs[] = {0x7}; + + mutex_lock(&data->update_lock); + + /* Read reset status of port 1~32 */ + data->port_reset = 0; + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = i2c_smbus_read_byte_data(client, regs[i]); + + if (status < 0) { + DEBUG_PRINT("cpld(0x60) reg(0x%x) err %d", regs[i], status); + goto exit; + } + + DEBUG_PRINT("reset status = 0x%x", status); + data->port_reset |= (u64)status << (i*8); + } + + DEBUG_PRINT("reset status = 0x%llx", data->port_reset); +exit: + mutex_unlock(&data->update_lock); + return data; +} + +static ssize_t show_port_reset(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int is_reset = 0; + + if (!sfp_is_port_present(client, attr->index)) { + return sprintf(buf, "%d\n", OOM_DRIVER_PORT_TYPE_NOT_PRESENT); + } + + sfp_update_port_reset(client); + is_reset = (data->port_reset & BIT_INDEX(attr->index))? 0 : 1; + + return sprintf(buf, "%d\n", is_reset); +} + +static ssize_t sfp_set_port_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + u8 cpld_reg = 0, cpld_val = 0; /*, cpld_bit = 0; //remove unused variable */ + long is_reset; + int error; + + error = kstrtol(buf, 10, &is_reset); + if (error) { + return error; + } + + mutex_lock(&data->update_lock); + + cpld_reg = 0x07; + + cpld_val = i2c_smbus_read_byte_data(client, cpld_reg); + + DEBUG_PRINT("current cpld reg = 0x%x value = 0x%x", cpld_reg, cpld_val); + + /* Update reset status. CPLD defined 0 is reset state, 1 is normal state. + * is_reset: 0 is not reset. 1 is reset. + */ + if (is_reset == 0) { + data->port_reset |= BIT_INDEX(attr->index); + } + else { + data->port_reset &= ~BIT_INDEX(attr->index); + } + + alpha_i2c_cpld_write(0x5f, cpld_reg, cpld_val); + DEBUG_PRINT("write cpld reg = 0x%x value = 0x%x", cpld_reg, cpld_val); + + mutex_unlock(&data->update_lock); + + return count; +} + +static struct sfp_port_data *qsfp_update_tx_rx_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int i, status = -1; + u8 buf = 0; + u8 reg[] = {SFF8436_TX_FAULT_ADDR, SFF8436_TX_DISABLE_ADDR, SFF8436_RX_LOS_ADDR}; + + if (time_before(jiffies, data->qsfp->last_updated + HZ + HZ / 2) && data->qsfp->valid) { + return data; + } + + dev_dbg(dev, "Starting sfp tx rx status update"); + mutex_lock(&data->update_lock); + data->qsfp->valid = 0; + memset(data->qsfp->status, 0, sizeof(data->qsfp->status)); + + /* Notify device to update tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(data->client, reg[i], &buf, sizeof(buf)); + if (status < 0) { + goto exit; + } + } + msleep(200); + + /* Read actual tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(data->client, reg[i], &buf, sizeof(buf)); + if (status < 0) { + goto exit; + } + + DEBUG_PRINT("qsfp reg(0x%x) status = (0x%x)", reg[i], data->qsfp->status[i]); + data->qsfp->status[i] = (buf & 0xF); + } + + data->qsfp->valid = 1; + data->qsfp->last_updated = jiffies; + mutex_unlock(&data->update_lock); + return data; + +exit: + mutex_unlock(&data->update_lock); + return NULL; +} + +static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 val = 0; + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct sfp_port_data *data = i2c_get_clientdata(client); + + if (!sfp_is_port_present(client, attr->index)) { + return -ENODEV; + } + + data = qsfp_update_tx_rx_status(dev); + if (!data) { + return -EIO; + } + + if ((attr->index >= PORT1_TX_FAULT1) && (attr->index <= PORT8_TX_FAULT4)){ + val = (data->qsfp->status[2] & BIT_INDEX(attr->index - PORT1_TX_FAULT1)) ? 1 : 0; + } + else if ((attr->index >= PORT1_TX_DISABLE1) && (attr->index <= PORT8_TX_DISABLE4)){ + val = (data->qsfp->status[1] & BIT_INDEX(attr->index - PORT1_TX_DISABLE1)) ? 1 : 0; + } + else if ((attr->index >= PORT1_TX_DISABLE_ALL) && (attr->index <= PORT8_TX_DISABLE_ALL)){ + val = ((data->qsfp->status[1] & 0xF) == 0xF) ? 1 : 0; + } + if ((attr->index >= PORT1_RX_LOS1) && (attr->index <= PORT8_RX_LOS4)){ + val = (data->qsfp->status[0] & BIT_INDEX(attr->index - PORT1_RX_LOS1)) ? 1 : 0; + } + + return sprintf(buf, "%d\n", val); +} + +static ssize_t qsfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + long disable; + int result; + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct sfp_port_data *data; + + result = kstrtol(buf, 10, &disable); + if (result) { + return result; + } + + data = qsfp_update_tx_rx_status(dev); + if (!data) { + return -EIO; + } + + mutex_lock(&data->update_lock); + + if((attr->index >= PORT1_TX_DISABLE_ALL) && (attr->index <= PORT8_TX_DISABLE_ALL)){ + DEBUG_PRINT ("disable:%ld %d==TX_DISABLE_ALL %u\r\n", disable, attr->index, data->qsfp->status[1]); + data->qsfp->status[1] = disable? 0xF:0; + } + else{ + if (disable) { + data->qsfp->status[1] |= (1 << (attr->index - PORT1_TX_DISABLE1)); + } + else { + data->qsfp->status[1] &= ~(1 << (attr->index - PORT1_TX_DISABLE1)); + } + } + + DEBUG_PRINT("index = (%d), status = (0x%x)", attr->index, data->qsfp->status[1]); + result = sfp_eeprom_write(client, SFF8436_TX_DISABLE_ADDR, &data->qsfp->status[1], sizeof(data->qsfp->status[1])); + mutex_unlock(&data->update_lock); + return count; +} + +static ssize_t sfp_show_ddm_implemented(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + char ddm; + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (!sfp_is_port_present(client, attr->index)) { + return -ENODEV; + } + + status = sfp_eeprom_read(data->client, SFF8472_DIAG_MON_TYPE_ADDR, &ddm, sizeof(ddm)); + if (status < 0) { + return -EIO; + } + + return sprintf(buf, "%d\n", (ddm & SFF8472_DIAG_MON_TYPE_DDM_MASK) ? 1 : 0); +} + +static ssize_t sfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 val = 0, index = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct sfp_port_data *data; + + data = sfp_update_tx_rx_status(dev); + if (!data) { + return -EIO; + } + if ((attr->index >= PORT1_TX_FAULT) && (attr->index <= PORT8_TX_FAULT)){ + index = 0; + } + else if ((attr->index >= PORT1_TX_DISABLE) && (attr->index <= PORT8_TX_DISABLE)){ + index = 1; + } + if ((attr->index >= PORT1_RX_LOS) && (attr->index <= PORT8_RX_LOS)){ + index = 2; + } + + val = (data->ddm->status[index] & BIT_INDEX(attr->index)) ? 1 : 0; + return sprintf(buf, "%d\n", val); +} + +static ssize_t qsfp_show_eeprom(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + char devfile[96]; + struct file *sfd; + int i2c_index = 0; + int status, result, offset = 0xb; + int rdlen, rc; + mm_segment_t old_fs; + char buffer[256]; + + if (!sfp_is_port_present(client, attr->index)) { + return 0; + } + + if(strcmp(client->name, "sfpcpld1") == 0) + i2c_index = 14; + else if(strcmp(client->name, "sfpcpld9") == 0) + i2c_index = 15; + else if(strcmp(client->name, "sfpcpld17") == 0) + i2c_index = 16; + else if(strcmp(client->name, "sfpcpld25") == 0) + i2c_index = 17; + + snprintf(devfile, sizeof(devfile), "/sys/bus/i2c/devices/%d-0050/sfp_eeprom", i2c_index); + + /* Set module select register */ + result = i2c_smbus_write_byte_data(client, offset, BIT_INDEX(attr->index)); + if (result < 0) { + dev_info(&client->dev, "i2c_smbus_write_byte_data faill(%d)", result); + } + + /* Read SFP EEPROM */ + sfd = filp_open(devfile, O_RDONLY, 0); + if (IS_ERR(sfd)) { + dev_info(&client->dev, "Failed to open file(%s)#%d", devfile, __LINE__); + return 0; + } + + if(!(sfd->f_op) || !(sfd->f_op->read) ) { + dev_info(&client->dev, "file %s cann't readable ?\n", devfile); + return 0; + } + + old_fs = get_fs(); + set_fs(KERNEL_DS); + rdlen = sfd->f_op->read(sfd, buffer, sizeof(buffer), &sfd->f_pos); + if (rdlen == 0) { + dev_info(&client->dev, "File(%s) empty!\n", devfile); + rc = 0; + goto exit; + } + + rc = sizeof(buffer); + memcpy(buf, buffer, rc); + + /* Reset module select register */ + result = i2c_smbus_write_byte_data(client, offset, 0); + if (result < 0) { + dev_info(&client->dev, "i2c_smbus_write_byte_data faill(%d)", result); + } + +exit: + set_fs(old_fs); + filp_close(sfd, 0); + + return rc; +} + +#if 0 +static ssize_t qsfp_set_eeprom(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + DEBUG_PRINT("data->port:%d attr index:%d", data->port, attr->index); + return 1; +} +#endif + +/* SFP/QSFP common attributes for sysfs */ +#define DECLARE_PORT_NUMBER_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT1##_NUMBER); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT2##_NUMBER); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT3##_NUMBER); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT4##_NUMBER); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT5##_NUMBER); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT6##_NUMBER); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT7##_NUMBER); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT8##_NUMBER); +#define DECLARE_PORT_NUMBER_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + &sensor_dev_attr_sfp##PORT1##_port_number.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_port_number.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_port_number.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_port_number.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_port_number.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_port_number.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_port_number.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_port_number.dev_attr.attr, +DECLARE_PORT_NUMBER_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + +#define DECLARE_PORT_IS_PRESENT_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_is_present, S_IRUGO, show_present, NULL, PORT##PORT1##_PRESENT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_is_present, S_IRUGO, show_present, NULL, PORT##PORT2##_PRESENT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_is_present, S_IRUGO, show_present, NULL, PORT##PORT3##_PRESENT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_is_present, S_IRUGO, show_present, NULL, PORT##PORT4##_PRESENT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_is_present, S_IRUGO, show_present, NULL, PORT##PORT5##_PRESENT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_is_present, S_IRUGO, show_present, NULL, PORT##PORT6##_PRESENT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_is_present, S_IRUGO, show_present, NULL, PORT##PORT7##_PRESENT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_is_present, S_IRUGO, show_present, NULL, PORT##PORT8##_PRESENT); +#define DECLARE_PORT_IS_PRESENT_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + &sensor_dev_attr_sfp##PORT1##_is_present.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_is_present.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_is_present.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_is_present.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_is_present.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_is_present.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_is_present.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_is_present.dev_attr.attr, +DECLARE_PORT_IS_PRESENT_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + +#define DECLARE_PORT_TYPE_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT1##_TYPE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT2##_TYPE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT3##_TYPE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT4##_TYPE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT5##_TYPE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT6##_TYPE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT7##_TYPE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT8##_TYPE); +#define DECLARE_PORT_TYPE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) &sensor_dev_attr_sfp##PORT1##_port_type.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_port_type.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_port_type.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_port_type.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_port_type.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_port_type.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_port_type.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_port_type.dev_attr.attr, +DECLARE_PORT_TYPE_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + +#define DECLARE_PORT_RESET_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT1##_RESET); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT2##_RESET); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT3##_RESET); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT4##_RESET); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT5##_RESET); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT6##_RESET); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT7##_RESET); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT8##_RESET); +#define DECLARE_PORT_RESET_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) &sensor_dev_attr_sfp##PORT1##_port_reset.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_port_reset.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_port_reset.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_port_reset.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_port_reset.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_port_reset.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_port_reset.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_port_reset.dev_attr.attr, +DECLARE_PORT_RESET_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + +/* QSFP attributes for sysfs */ +#define DECLARE_PORT_RX_LOSn_SENSOR_DEVICE_ATTR(INDEX, PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT1##_RX_LOS##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT2##_RX_LOS##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT3##_RX_LOS##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT4##_RX_LOS##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT5##_RX_LOS##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT6##_RX_LOS##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT7##_RX_LOS##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT8##_RX_LOS##INDEX); +#define DECLARE_PORT_RX_LOSn_ATTR(INDEX, PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + &sensor_dev_attr_sfp##PORT1##_rx_los##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_rx_los##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_rx_los##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_rx_los##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_rx_los##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_rx_los##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_rx_los##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_rx_los##INDEX.dev_attr.attr, +DECLARE_PORT_RX_LOSn_SENSOR_DEVICE_ATTR(1, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_RX_LOSn_SENSOR_DEVICE_ATTR(2, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_RX_LOSn_SENSOR_DEVICE_ATTR(3, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_RX_LOSn_SENSOR_DEVICE_ATTR(4, 1, 2, 3, 4, 5, 6, 7, 8) + +#define DECLARE_PORT_TX_DISABLEn_SENSOR_DEVICE_ATTR(INDEX, PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT1##_TX_DISABLE##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT2##_TX_DISABLE##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT3##_TX_DISABLE##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT4##_TX_DISABLE##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT5##_TX_DISABLE##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT6##_TX_DISABLE##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT7##_TX_DISABLE##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT8##_TX_DISABLE##INDEX); + +#define DECLARE_PORT_TX_DISABLEn_ATTR(INDEX, PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + &sensor_dev_attr_sfp##PORT1##_tx_disable##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_tx_disable##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_tx_disable##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_tx_disable##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_tx_disable##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_tx_disable##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_tx_disable##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_tx_disable##INDEX.dev_attr.attr, +DECLARE_PORT_TX_DISABLEn_SENSOR_DEVICE_ATTR(1, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TX_DISABLEn_SENSOR_DEVICE_ATTR(2, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TX_DISABLEn_SENSOR_DEVICE_ATTR(3, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TX_DISABLEn_SENSOR_DEVICE_ATTR(4, 1, 2, 3, 4, 5, 6, 7, 8) + +#define DECLARE_PORT_TX_FAULTn_SENSOR_DEVICE_ATTR(INDEX, PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT1##_TX_FAULT##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT2##_TX_FAULT##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT3##_TX_FAULT##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT4##_TX_FAULT##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT5##_TX_FAULT##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT6##_TX_FAULT##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT7##_TX_FAULT##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT8##_TX_FAULT##INDEX); +#define DECLARE_PORT_TX_FAULTn_ATTR(INDEX, PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + &sensor_dev_attr_sfp##PORT1##_tx_fault##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_tx_fault##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_tx_fault##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_tx_fault##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_tx_fault##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_tx_fault##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_tx_fault##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_tx_fault##INDEX.dev_attr.attr, +DECLARE_PORT_TX_FAULTn_SENSOR_DEVICE_ATTR(1, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TX_FAULTn_SENSOR_DEVICE_ATTR(2, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TX_FAULTn_SENSOR_DEVICE_ATTR(3, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TX_FAULTn_SENSOR_DEVICE_ATTR(4, 1, 2, 3, 4, 5, 6, 7, 8) + +#define DECLARE_PORT_EEPROMn_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT1##_EEPROM); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT2##_EEPROM); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT3##_EEPROM); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT4##_EEPROM); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT5##_EEPROM); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT6##_EEPROM); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT7##_EEPROM); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT8##_EEPROM); +#define DECLARE_PORT_EEPROMTn_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + &sensor_dev_attr_sfp##PORT1##_eeprom.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_eeprom.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_eeprom.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_eeprom.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_eeprom.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_eeprom.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_eeprom.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_eeprom.dev_attr.attr, +DECLARE_PORT_EEPROMn_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + +static struct attribute *qsfp_attributes[] = { + DECLARE_PORT_NUMBER_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TYPE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_IS_PRESENT_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_RESET_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_RX_LOSn_ATTR(1, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_RX_LOSn_ATTR(2, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_RX_LOSn_ATTR(3, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_RX_LOSn_ATTR(4, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_DISABLEn_ATTR(1, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_DISABLEn_ATTR(2, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_DISABLEn_ATTR(3, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_DISABLEn_ATTR(4, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_FAULTn_ATTR(1, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_FAULTn_ATTR(2, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_FAULTn_ATTR(3, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_FAULTn_ATTR(4, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_EEPROMTn_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + NULL +}; + + +/* SFP msa attributes for sysfs */ +static struct attribute *sfp_msa_attributes[] = { + DECLARE_PORT_NUMBER_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TYPE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_IS_PRESENT_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_RESET_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + NULL +}; + +/* SFP ddm attributes for sysfs */ +#define DECLARE_RX_LOS_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT1##_RX_LOS); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT2##_RX_LOS); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT3##_RX_LOS); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT4##_RX_LOS); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT5##_RX_LOS); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT6##_RX_LOS); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT7##_RX_LOS); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT8##_RX_LOS); +#define DECLARE_RX_LOS_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) &sensor_dev_attr_sfp##PORT1##_rx_los.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_rx_los.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_rx_los.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_rx_los.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_rx_los.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_rx_los.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_rx_los.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_rx_los.dev_attr.attr, +DECLARE_RX_LOS_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + +#define DECLARE_TX_DISABLE_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT1##_TX_DISABLE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT2##_TX_DISABLE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT3##_TX_DISABLE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT4##_TX_DISABLE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT5##_TX_DISABLE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT6##_TX_DISABLE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT7##_TX_DISABLE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT8##_TX_DISABLE); +#define DECLARE_TX_DISABLE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) &sensor_dev_attr_sfp##PORT1##_tx_disable.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_tx_disable.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_tx_disable.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_tx_disable.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_tx_disable.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_tx_disable.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_tx_disable.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_tx_disable.dev_attr.attr, +DECLARE_TX_DISABLE_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + +#define DECLARE_TX_FAULT_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT1##_TX_FAULT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT2##_TX_FAULT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT3##_TX_FAULT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT4##_TX_FAULT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT5##_TX_FAULT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT6##_TX_FAULT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT7##_TX_FAULT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT8##_TX_FAULT); +#define DECLARE_TX_FAULT_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) &sensor_dev_attr_sfp##PORT1##_tx_fault.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_tx_fault.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_tx_fault.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_tx_fault.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_tx_fault.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_tx_fault.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_tx_fault.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_tx_fault.dev_attr.attr, +DECLARE_TX_FAULT_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + +static struct attribute *sfp_ddm_attributes[] = { + DECLARE_RX_LOS_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_TX_DISABLE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_TX_FAULT_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + NULL +}; + +static ssize_t sfp_eeprom_write(struct i2c_client *client, u8 command, const char *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int result, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + result = i2c_smbus_write_i2c_block_data(client, command, data_len, data); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) { + return result; + } + + return data_len; +#else + int result, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + result = i2c_smbus_write_byte_data(client, command, *data); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) { + return result; + } + + return 1; +#endif + + +} + + +static ssize_t sfp_port_write(struct sfp_port_data *data, + const char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + return count; + } + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_write(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; +} + + +static ssize_t sfp_bin_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct sfp_port_data *data; + DEBUG_PRINT("offset = (%d), count = (%d)", (int)off, (int)count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + return sfp_port_write(data, buf, off, count); +} + +static ssize_t sfp_eeprom_read(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int result, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + /* result = data_len; */ + +abort: + return result; +#else + int result, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + result = i2c_smbus_read_byte_data(client, command); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) { + dev_dbg(&client->dev, "sfp read byte data failed, command(0x%2x), data(0x%2x)\r\n", command, result); + goto abort; + } + + *data = (u8)result; + result = 1; + +abort: + return result; +#endif +} + +static ssize_t sfp_port_read(struct sfp_port_data *data, + char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + DEBUG_PRINT("Count = 0, return"); + return count; + } + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_read(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; + +} + +static ssize_t sfp_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct sfp_port_data *data; + DEBUG_PRINT("offset = (%d), count = (%d)", (int)off, (int)count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + return sfp_port_read(data, buf, off, count); +} + +static int sfp_sysfs_eeprom_init(struct kobject *kobj, struct bin_attribute *eeprom) +{ + int err; + + sysfs_bin_attr_init(eeprom); + eeprom->attr.name = EEPROM_NAME; + eeprom->attr.mode = S_IWUSR | S_IRUGO; + eeprom->read = sfp_bin_read; + eeprom->write = sfp_bin_write; + eeprom->size = EEPROM_SIZE; + + /* Create eeprom file */ + err = sysfs_create_bin_file(kobj, eeprom); + if (err) { + return err; + } + + return 0; +} + +static int sfp_sysfs_eeprom_cleanup(struct kobject *kobj, struct bin_attribute *eeprom) +{ + sysfs_remove_bin_file(kobj, eeprom); + return 0; +} + +static const struct attribute_group sfp_msa_group = { + .attrs = sfp_msa_attributes, +}; + +static int sfp_i2c_check_functionality(struct i2c_client *client) +{ +#if USE_I2C_BLOCK_READ + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK); +#else + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA); +#endif +} + +static int sfp_msa_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct sfp_msa_data **data) +{ + int status; + struct sfp_msa_data *msa; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + msa = kzalloc(sizeof(struct sfp_msa_data), GFP_KERNEL); + if (!msa) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &sfp_msa_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &msa->eeprom.bin); + if (status) { + dev_info(&client->dev, "sfp msa '%s' (sfp_sysfs_eeprom_init fail...)\n", client->name); + /* goto exit_remove; */ + } + + *data = msa; + dev_info(&client->dev, "sfp msa '%s'\n", client->name); + + return 0; + +/* exit_remove: */ + sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); +exit_free: + kfree(msa); +exit: + + return status; +} + +static const struct attribute_group sfp_ddm_group = { + .attrs = sfp_ddm_attributes, +}; + +static int sfp_ddm_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct sfp_ddm_data **data) +{ + int status; + struct sfp_ddm_data *ddm; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + ddm = kzalloc(sizeof(struct sfp_ddm_data), GFP_KERNEL); + if (!ddm) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &sfp_ddm_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &ddm->eeprom.bin); + if (status) { + goto exit_remove; + } + + *data = ddm; + dev_info(&client->dev, "sfp ddm '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &sfp_ddm_group); +exit_free: + kfree(ddm); +exit: + + return status; +} + +static const struct attribute_group qsfp_group = { + .attrs = qsfp_attributes, +}; + +static int qsfp_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct qsfp_data **data) +{ + int status; + struct qsfp_data *qsfp; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + qsfp = kzalloc(sizeof(struct qsfp_data), GFP_KERNEL); + if (!qsfp) { + status = -ENOMEM; + goto exit; + } + + if (client->addr == SFP_CPLD_I2C_ADDR){ + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &qsfp_group); + if (status) { + goto exit_free; + } + } + + if (client->addr == SFP_EEPROM_A0_I2C_ADDR){ + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &qsfp->eeprom.bin); + if (status) { + goto exit_remove; + } + } + + /* Bring QSFPs out of reset */ + + *data = qsfp; + dev_info(&client->dev, "qsfp '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &qsfp_group); +exit_free: + kfree(qsfp); +exit: + + return status; +} + +static int sfp_device_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct sfp_port_data *data = NULL; + + data = kzalloc(sizeof(struct sfp_port_data), GFP_KERNEL); + if (!data) { + return -ENOMEM; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->port = dev_id->driver_data; + data->client = client; + + if ((client->addr != SFP_EEPROM_A0_I2C_ADDR) && (client->addr != SFP_CPLD_I2C_ADDR)){ + DEBUG_PRINT("client->addr:0x%0x\n", client->addr); + return -ENODEV; + } + + data->driver_type = DRIVER_TYPE_QSFP; + return qsfp_probe(client, dev_id, &data->qsfp); +} + +static int sfp_msa_remove(struct i2c_client *client, struct sfp_msa_data *data) +{ + if (client->addr == SFP_EEPROM_A0_I2C_ADDR) + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + if (client->addr == SFP_CPLD_I2C_ADDR) + sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); + kfree(data); + return 0; +} + +static int sfp_ddm_remove(struct i2c_client *client, struct sfp_ddm_data *data) +{ + if (client->addr == SFP_EEPROM_A0_I2C_ADDR) + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + if (client->addr == SFP_CPLD_I2C_ADDR) + sysfs_remove_group(&client->dev.kobj, &sfp_ddm_group); + kfree(data); + return 0; +} + +static int qfp_remove(struct i2c_client *client, struct qsfp_data *data) +{ + if (client->addr == SFP_EEPROM_A0_I2C_ADDR) + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + if (client->addr == SFP_CPLD_I2C_ADDR) + sysfs_remove_group(&client->dev.kobj, &qsfp_group); + kfree(data); + return 0; +} + +static int sfp_device_remove(struct i2c_client *client) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + + switch (data->driver_type) { + case DRIVER_TYPE_SFP_MSA: + return sfp_msa_remove(client, data->msa); + case DRIVER_TYPE_SFP_DDM: + return sfp_ddm_remove(client, data->ddm); + case DRIVER_TYPE_QSFP: + return qfp_remove(client, data->qsfp); + } + + return 0; +} + +static struct i2c_driver sfp_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = sfp_device_probe, + .remove = sfp_device_remove, + .id_table = sfp_device_id, + .address_list = normal_i2c, +}; + +static int __init sfp_init(void) +{ + return i2c_add_driver(&sfp_driver); +} + +static void __exit sfp_exit(void) +{ + i2c_del_driver(&sfp_driver); +} + +MODULE_AUTHOR("Philip Wang "); +MODULE_DESCRIPTION("alphanetworks snh60a0-320fv2 driver"); +MODULE_LICENSE("GPL"); + +module_init(sfp_init); +module_exit(sfp_exit); + diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/snh60a0_onie_eeprom.c b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/snh60a0_onie_eeprom.c new file mode 100644 index 00000000000..d8e246ec2a8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/snh60a0_onie_eeprom.c @@ -0,0 +1,268 @@ +/* + * A driver for alphanetworks_snh60a0_320fv2 onie eeprom + * + * Copyright (C) 2018 Alphanetworks Technology Corporation. + * Robin Chen + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * see + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define EEPROM_SIZE 256 + +#define SYS_LED_REG 0x8 +#define FAN12_LED_REG 0x9 +#define FAN34_LED_REG 0xA +#define FAN56_LED_REG 0xB +#define SYS_RESET1_REG 0x2 + +#define SYS_LOCATOR_LED_BITS 0x01 +#define SYS_PWR_LED_BITS 0x0E +#define SYS_STATUS_LED_BITS 0x70 +#define FAN135_LED_BITS 0x07 +#define FAN246_LED_BITS 0x38 + + +extern int alpha_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int alpha_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t onie_read(struct device *dev, struct device_attribute *attr, char *buf); +static ssize_t onie_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count); + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +/* Addresses scanned for alphanetworks_snh60a0_320fv2_onie_eeprom */ +static const unsigned short normal_i2c[] = { 0x56, I2C_CLIENT_END }; + + +enum sysfs_onie_attributes { + ONIE_RW, +}; + +static SENSOR_DEVICE_ATTR(eeprom, (0660), onie_read, onie_write, ONIE_RW); + +static struct attribute *alphanetworks_snh60a0_320fv2_onie_attributes[] = { + &sensor_dev_attr_eeprom.dev_attr.attr, + NULL +}; + +static const struct attribute_group alphanetworks_snh60a0_320fv2_onie_group = { + .attrs = alphanetworks_snh60a0_320fv2_onie_attributes, +}; + + +static ssize_t onie_read(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0, res = 0; + u8 command; + struct i2c_client *client = to_i2c_client(dev); + __u8 read_write; + unsigned short offset = 0; + union i2c_smbus_data temp; + char rbuf[EEPROM_SIZE]; + + for( offset=0 ; offset < EEPROM_SIZE ; ++offset ) + { + read_write = I2C_SMBUS_WRITE; + offset = offset & 0x3fff; + temp.byte = (u8)offset; + res = i2c_smbus_xfer(client->adapter, client->addr, client->flags=0, + read_write, 0, 2, &temp); + res = i2c_smbus_xfer(client->adapter, client->addr, client->flags=0, + read_write, 0, 2, &temp); + + read_write = I2C_SMBUS_READ; + temp.byte = 0xaa; + res = i2c_smbus_xfer(client->adapter, client->addr, client->flags=0, + read_write, 0, 1, &temp); + if (!res) + { + res = temp.byte; + rbuf[offset] = (char)temp.byte; + } + + read_write = I2C_SMBUS_READ; + temp.byte = 0xbb; + res = i2c_smbus_xfer(client->adapter, client->addr, client->flags=0, + read_write, 0, 1, &temp); + if (!res) + { + res = temp.byte; + } + } + + memcpy(buf, rbuf, EEPROM_SIZE); + return EEPROM_SIZE; +} + +static ssize_t onie_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int error, write, command, read; + + error = kstrtoint(buf, 10, &write); + if (error) + return error; + + if (write < 0 || write > 255) + return -EINVAL; + + /* Not support yet */ + + return count; +} + + + +static void alpha_i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void alpha_i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int onie_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + status = sysfs_create_group(&client->dev.kobj, &alphanetworks_snh60a0_320fv2_onie_group); + if (status) { + goto exit; + } + + dev_info(&client->dev, "chip found\n"); + alpha_i2c_cpld_add_client(client); + + return 0; + +exit: + return status; +} + +static int onie_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_group(&client->dev.kobj, &alphanetworks_snh60a0_320fv2_onie_group); + alpha_i2c_cpld_remove_client(client); + + return 0; +} + +static const struct i2c_device_id onie_eeprom_id[] = { + { "snh60a0_onie_eeprom", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, onie_eeprom_id); + +static struct i2c_driver onie_eeprom_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "snh60a0_onie_eeprom", + }, + .probe = onie_eeprom_probe, + .remove = onie_eeprom_remove, + .id_table = onie_eeprom_id, + .address_list = normal_i2c, +}; + + +static int __init onie_eeprom_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&onie_eeprom_driver); +} + +static void __exit onie_eeprom_exit(void) + +{ + i2c_del_driver(&onie_eeprom_driver); +} + + +MODULE_AUTHOR("Alpha-SID6"); +MODULE_DESCRIPTION("onie eeprom driver"); +MODULE_LICENSE("GPL"); + +module_init(onie_eeprom_init); +module_exit(onie_eeprom_exit); diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/snh60a0_power_cpld.c b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/snh60a0_power_cpld.c new file mode 100644 index 00000000000..c9a9104d266 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/snh60a0_power_cpld.c @@ -0,0 +1,507 @@ +/* + * A hwmon driver for the alphanetworks_snh60a0_320fv2_power_cpld + * + * Copyright (C) 2018 Alphanetworks Technology Corporation. + * Robin Chen + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * see + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define DRIVER_NAME "snh60a0_power_cpld" +#define PSU1_STATUS_REG 0x3 +#define PSU2_STATUS_REG 0x4 +#define FAN_PWM_REG 0x23 + +#define PSU_PRESENT_BIT 0x4 +#define PSU_POWER_BIT 0x2 +#define FAN_PRESENT_BIT 0x2 + + +static ssize_t psu_show_status(struct device *dev, struct device_attribute *attr, char *buf); +static ssize_t fan_pwm_show(struct device *dev, struct device_attribute *attr, char *buf); +static ssize_t set_fan_pwm(struct device *dev, struct device_attribute *attr, const char *buf, size_t count); +static ssize_t fan_show_status(struct device *dev, struct device_attribute *attr, char *buf); + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +/* Addresses scanned for alphanetworks_snh60a0_320fv2_power_cpld */ +static const unsigned short normal_i2c[] = { 0x5E, I2C_CLIENT_END }; + +struct alphanetworks_snh60a0_320fv2_pwr_cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; + char model_name[9]; /* Model name, read from eeprom */ +}; + + +enum sysfs_psu_attributes { + PSU1_PRESENT, + PSU2_PRESENT, + PSU1_POWER_GOOD, + PSU2_POWER_GOOD, + FAN_PWM, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + FAN5_FAULT, + FAN6_FAULT, + FAN1_PRESENT=0x10, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN5_PRESENT, + FAN6_PRESENT, + FAN1_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN5_FRONT_SPEED_RPM, + FAN5_REAR_SPEED_RPM, + FAN6_FRONT_SPEED_RPM, + FAN6_REAR_SPEED_RPM, +}; + +static SENSOR_DEVICE_ATTR(psu1_present, S_IRUGO, psu_show_status, NULL, PSU1_PRESENT); +static SENSOR_DEVICE_ATTR(psu2_present, S_IRUGO, psu_show_status, NULL, PSU2_PRESENT); +static SENSOR_DEVICE_ATTR(psu1_power_good, S_IRUGO, psu_show_status, NULL, PSU1_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu2_power_good, S_IRUGO, psu_show_status, NULL, PSU2_POWER_GOOD); +static SENSOR_DEVICE_ATTR(fan_pwm, (0660), fan_pwm_show, set_fan_pwm, FAN_PWM); +static SENSOR_DEVICE_ATTR(fan1_present, S_IRUGO, fan_show_status, NULL, FAN1_PRESENT); +static SENSOR_DEVICE_ATTR(fan2_present, S_IRUGO, fan_show_status, NULL, FAN2_PRESENT); +static SENSOR_DEVICE_ATTR(fan3_present, S_IRUGO, fan_show_status, NULL, FAN3_PRESENT); +static SENSOR_DEVICE_ATTR(fan4_present, S_IRUGO, fan_show_status, NULL, FAN4_PRESENT); +static SENSOR_DEVICE_ATTR(fan5_present, S_IRUGO, fan_show_status, NULL, FAN5_PRESENT); +static SENSOR_DEVICE_ATTR(fan6_present, S_IRUGO, fan_show_status, NULL, FAN6_PRESENT); +static SENSOR_DEVICE_ATTR(fan1_front_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN1_FRONT_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan2_front_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN2_FRONT_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan3_front_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN3_FRONT_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan4_front_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN4_FRONT_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan5_front_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN5_FRONT_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan6_front_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN6_FRONT_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan1_rear_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN1_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan2_rear_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN2_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan3_rear_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN3_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan4_rear_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN4_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan5_rear_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN5_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan6_rear_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN6_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan1_fault, S_IRUGO, fan_show_status, NULL, FAN1_FAULT); static SENSOR_DEVICE_ATTR(fan11_fault, S_IRUGO, fan_show_status, NULL, FAN1_FAULT); +static SENSOR_DEVICE_ATTR(fan2_fault, S_IRUGO, fan_show_status, NULL, FAN2_FAULT); static SENSOR_DEVICE_ATTR(fan12_fault, S_IRUGO, fan_show_status, NULL, FAN2_FAULT); +static SENSOR_DEVICE_ATTR(fan3_fault, S_IRUGO, fan_show_status, NULL, FAN3_FAULT); static SENSOR_DEVICE_ATTR(fan13_fault, S_IRUGO, fan_show_status, NULL, FAN3_FAULT); +static SENSOR_DEVICE_ATTR(fan4_fault, S_IRUGO, fan_show_status, NULL, FAN4_FAULT); static SENSOR_DEVICE_ATTR(fan14_fault, S_IRUGO, fan_show_status, NULL, FAN4_FAULT); +static SENSOR_DEVICE_ATTR(fan5_fault, S_IRUGO, fan_show_status, NULL, FAN5_FAULT); static SENSOR_DEVICE_ATTR(fan15_fault, S_IRUGO, fan_show_status, NULL, FAN5_FAULT); +static SENSOR_DEVICE_ATTR(fan6_fault, S_IRUGO, fan_show_status, NULL, FAN6_FAULT); static SENSOR_DEVICE_ATTR(fan16_fault, S_IRUGO, fan_show_status, NULL, FAN6_FAULT); +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, fan_show_status, NULL, FAN1_FRONT_SPEED_RPM); static SENSOR_DEVICE_ATTR(fan11_input, S_IRUGO, fan_show_status, NULL, FAN1_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, fan_show_status, NULL, FAN2_FRONT_SPEED_RPM); static SENSOR_DEVICE_ATTR(fan12_input, S_IRUGO, fan_show_status, NULL, FAN2_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, fan_show_status, NULL, FAN3_FRONT_SPEED_RPM); static SENSOR_DEVICE_ATTR(fan13_input, S_IRUGO, fan_show_status, NULL, FAN3_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, fan_show_status, NULL, FAN4_FRONT_SPEED_RPM); static SENSOR_DEVICE_ATTR(fan14_input, S_IRUGO, fan_show_status, NULL, FAN4_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, fan_show_status, NULL, FAN5_FRONT_SPEED_RPM); static SENSOR_DEVICE_ATTR(fan15_input, S_IRUGO, fan_show_status, NULL, FAN5_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, fan_show_status, NULL, FAN6_FRONT_SPEED_RPM); static SENSOR_DEVICE_ATTR(fan16_input, S_IRUGO, fan_show_status, NULL, FAN6_REAR_SPEED_RPM); + + +static struct attribute *alphanetworks_snh60a0_320fv2_psu_attributes[] = { + &sensor_dev_attr_psu1_present.dev_attr.attr, + &sensor_dev_attr_psu2_present.dev_attr.attr, + &sensor_dev_attr_psu1_power_good.dev_attr.attr, + &sensor_dev_attr_psu2_power_good.dev_attr.attr, + &sensor_dev_attr_fan_pwm.dev_attr.attr, + &sensor_dev_attr_fan1_present.dev_attr.attr, + &sensor_dev_attr_fan2_present.dev_attr.attr, + &sensor_dev_attr_fan3_present.dev_attr.attr, + &sensor_dev_attr_fan4_present.dev_attr.attr, + &sensor_dev_attr_fan5_present.dev_attr.attr, + &sensor_dev_attr_fan6_present.dev_attr.attr, + &sensor_dev_attr_fan1_front_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_front_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_front_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_front_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan5_front_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan6_front_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan1_rear_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_rear_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_rear_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_rear_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan5_rear_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan6_rear_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan1_fault.dev_attr.attr, &sensor_dev_attr_fan11_fault.dev_attr.attr, + &sensor_dev_attr_fan2_fault.dev_attr.attr, &sensor_dev_attr_fan12_fault.dev_attr.attr, + &sensor_dev_attr_fan3_fault.dev_attr.attr, &sensor_dev_attr_fan13_fault.dev_attr.attr, + &sensor_dev_attr_fan4_fault.dev_attr.attr, &sensor_dev_attr_fan14_fault.dev_attr.attr, + &sensor_dev_attr_fan5_fault.dev_attr.attr, &sensor_dev_attr_fan15_fault.dev_attr.attr, + &sensor_dev_attr_fan6_fault.dev_attr.attr, &sensor_dev_attr_fan16_fault.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, &sensor_dev_attr_fan11_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, &sensor_dev_attr_fan12_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, &sensor_dev_attr_fan13_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, &sensor_dev_attr_fan14_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, &sensor_dev_attr_fan15_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, &sensor_dev_attr_fan16_input.dev_attr.attr, + NULL +}; + +static const struct attribute_group alphanetworks_snh60a0_320fv2_psu_group = { + .attrs = alphanetworks_snh60a0_320fv2_psu_attributes, +}; + + +static ssize_t psu_show_status(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0, res = 0; + u8 command; + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *sda = to_sensor_dev_attr(attr); + + switch(sda->index) { + case PSU1_PRESENT: + case PSU1_POWER_GOOD: + command = PSU1_STATUS_REG; + break; + case PSU2_PRESENT: + case PSU2_POWER_GOOD: + command = PSU2_STATUS_REG; + break; + } + + val = i2c_smbus_read_byte_data(client, command); + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + switch(sda->index) { + case PSU1_PRESENT: + case PSU2_PRESENT: + res = (val & PSU_PRESENT_BIT ? 1 : 0 ); + break; + case PSU1_POWER_GOOD: + case PSU2_POWER_GOOD: + res = (val & PSU_POWER_BIT ? 1 : 0 ); + break; + } + + return sprintf(buf, "%d\n", res); +} + +static ssize_t fan_pwm_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, FAN_PWM_REG); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d", val); +} + +static ssize_t set_fan_pwm(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int error, value; + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0 || value > 0xFF) + return -EINVAL; + + i2c_smbus_write_byte_data(client, FAN_PWM_REG, value); + + return count; +} + +static ssize_t fan_show_status(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct sensor_device_attribute *sda = to_sensor_dev_attr(attr); + struct i2c_client *client = to_i2c_client(dev); + // struct as7712_32x_fan_data *data = as7712_32x_fan_update_device(dev); + ssize_t ret = 0; + int val, val2; + + switch (sda->index) { + /* case FAN_DUTY_CYCLE_PERCENTAGE: */ + /* { */ + /* u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); */ + /* ret = sprintf(buf, "%u\n", duty_cycle); */ + /* break; */ + /* } */ + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN5_FRONT_SPEED_RPM: + case FAN6_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: + case FAN6_REAR_SPEED_RPM: + val = i2c_smbus_read_byte_data(client, sda->index); + ret = sprintf(buf, "%d\n", val * 150); + break; + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + case FAN6_PRESENT: + val = i2c_smbus_read_byte_data(client, sda->index); + ret = sprintf(buf, "%d\n", (val & FAN_PRESENT_BIT) ? 1 : 0); + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + case FAN6_FAULT: + val = i2c_smbus_read_byte_data(client, (sda->index - FAN1_FAULT)*2 + FAN1_FRONT_SPEED_RPM); + val2 = i2c_smbus_read_byte_data(client, (sda->index - FAN1_FAULT)*2 + FAN1_REAR_SPEED_RPM); + ret = sprintf(buf, "%d\n", (val|val2) ? 0 : 1); + break; + default: + break; + } + + return ret; +} + + +static void alpha_i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void alpha_i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int alpha_i2c_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct alphanetworks_snh60a0_320fv2_pwr_cpld_data* data; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct alphanetworks_snh60a0_320fv2_pwr_cpld_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + status = sysfs_create_group(&client->dev.kobj, &alphanetworks_snh60a0_320fv2_psu_group); + if (status) { + goto exit; + } + + dev_info(&client->dev, "chip found\n"); + alpha_i2c_cpld_add_client(client); + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit; + } + + dev_info(&client->dev, "%s: pwr_cpld '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit: + return status; +} + +static int alpha_i2c_cpld_remove(struct i2c_client *client) +{ + struct alphanetworks_snh60a0_320fv2_pwr_cpld_data *data = i2c_get_clientdata(client); + sysfs_remove_group(&client->dev.kobj, &alphanetworks_snh60a0_320fv2_psu_group); + alpha_i2c_cpld_remove_client(client); + kfree(data); + + return 0; +} + +static const struct i2c_device_id alpha_i2c_cpld_id[] = { + { DRIVER_NAME, 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, alpha_i2c_cpld_id); + +static struct i2c_driver alpha_i2c_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRIVER_NAME, + }, + .probe = alpha_i2c_cpld_probe, + .remove = alpha_i2c_cpld_remove, + .id_table = alpha_i2c_cpld_id, + .address_list = normal_i2c, +}; + +int alpha_i2c_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_read_byte_data(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(alpha_i2c_cpld_read); + +int alpha_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_write_byte_data(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(alpha_i2c_cpld_write); + +static int __init alpha_i2c_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&alpha_i2c_cpld_driver); +} + +static void __exit alpha_i2c_cpld_exit(void) +{ + i2c_del_driver(&alpha_i2c_cpld_driver); +} + +static struct dmi_system_id alphanetworks_snh60a0_320fv2_dmi_table[] = { + { + .ident = "Alpha Zion", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Alpha"), + DMI_MATCH(DMI_PRODUCT_NAME, "Zion"), + }, + } +}; + +int platform_alphanetworks_snh60a0_320fv2(void) +{ + return dmi_check_system(alphanetworks_snh60a0_320fv2_dmi_table); +} +EXPORT_SYMBOL(platform_alphanetworks_snh60a0_320fv2); + +MODULE_AUTHOR("Alpha-SID6"); +MODULE_DESCRIPTION("alpha_power_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(alpha_i2c_cpld_init); +module_exit(alpha_i2c_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/snh60a0_system_cpld.c b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/snh60a0_system_cpld.c new file mode 100644 index 00000000000..13c302b3569 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/modules/snh60a0_system_cpld.c @@ -0,0 +1,380 @@ +/* + * A hwmon driver for the alphanetworks_snh60a0_320fv2_system_cpld + * + * Copyright (C) 2018 Alphanetworks Technology Corporation. + * Robin Chen + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * see + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define SYS_LED_REG 0x8 +#define FAN12_LED_REG 0x9 +#define FAN34_LED_REG 0xA +#define FAN56_LED_REG 0xB +#define SYS_RESET1_REG 0x2 +#define SWI_CTRL_REG 0x4 + +#define SYS_LOCATOR_LED_BITS 0x01 +#define SYS_PWR_LED_BITS 0x0E +#define SYS_STATUS_LED_BITS 0x70 +#define FAN135_LED_BITS 0x07 +#define FAN246_LED_BITS 0x38 +#define REST_BUTTON_BITS 0x0 + + +extern int alpha_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int alpha_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t sys_led_read(struct device *dev, struct device_attribute *attr, char *buf); +static ssize_t sys_led_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count); + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +/* Addresses scanned for alphanetworks_snh60a0_320fv2_system_cpld */ +static const unsigned short normal_i2c[] = { 0x5F, I2C_CLIENT_END }; + + +enum sysfs_sys_attributes { + SYS_LOCATOR, + SYS_PWR, + SYS_STATUS, + FAN1_LED, + FAN2_LED, + FAN3_LED, + FAN4_LED, + FAN5_LED, + FAN6_LED, + SYS_REST1, + SWI_CTRL, +}; + +static SENSOR_DEVICE_ATTR(sys_locator, (0660), sys_led_read, sys_led_write, SYS_LOCATOR); +static SENSOR_DEVICE_ATTR(sys_pwr, (0660), sys_led_read, sys_led_write, SYS_PWR); +static SENSOR_DEVICE_ATTR(sys_status, (0600), sys_led_read, sys_led_write, SYS_STATUS); +static SENSOR_DEVICE_ATTR(fan1_led, (0660), sys_led_read, sys_led_write, FAN1_LED); +static SENSOR_DEVICE_ATTR(fan2_led, (0660), sys_led_read, sys_led_write, FAN2_LED); +static SENSOR_DEVICE_ATTR(fan3_led, (0660), sys_led_read, sys_led_write, FAN3_LED); +static SENSOR_DEVICE_ATTR(fan4_led, (0660), sys_led_read, sys_led_write, FAN4_LED); +static SENSOR_DEVICE_ATTR(fan5_led, (0660), sys_led_read, sys_led_write, FAN5_LED); +static SENSOR_DEVICE_ATTR(fan6_led, (0660), sys_led_read, sys_led_write, FAN6_LED); +static SENSOR_DEVICE_ATTR(sys_reset1, (0660), sys_led_read, sys_led_write, SYS_REST1); +static SENSOR_DEVICE_ATTR(swi_ctrl, (0660), sys_led_read, NULL, SWI_CTRL); + +static struct attribute *alphanetworks_snh60a0_320fv2_sys_attributes[] = { + &sensor_dev_attr_sys_locator.dev_attr.attr, + &sensor_dev_attr_sys_pwr.dev_attr.attr, + &sensor_dev_attr_sys_status.dev_attr.attr, + &sensor_dev_attr_fan1_led.dev_attr.attr, + &sensor_dev_attr_fan2_led.dev_attr.attr, + &sensor_dev_attr_fan3_led.dev_attr.attr, + &sensor_dev_attr_fan4_led.dev_attr.attr, + &sensor_dev_attr_fan5_led.dev_attr.attr, + &sensor_dev_attr_fan6_led.dev_attr.attr, + &sensor_dev_attr_sys_reset1.dev_attr.attr, + &sensor_dev_attr_swi_ctrl.dev_attr.attr, + NULL +}; + +static const struct attribute_group alphanetworks_snh60a0_320fv2_sys_group = { + .attrs = alphanetworks_snh60a0_320fv2_sys_attributes, +}; + + +static ssize_t sys_led_read(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0, res = 0; + u8 command; + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *sda = to_sensor_dev_attr(attr); + + switch(sda->index) { + case SYS_LOCATOR: + case SYS_PWR: + case SYS_STATUS: + command = SYS_LED_REG; + break; + case FAN1_LED: + case FAN2_LED: + case FAN3_LED: + case FAN4_LED: + case FAN5_LED: + case FAN6_LED: + command = FAN12_LED_REG + (sda->index - FAN1_LED)/2; + break; + case SYS_REST1: + command = SYS_RESET1_REG; + break; + case SWI_CTRL: + command = SWI_CTRL_REG; + break; + } + + val = i2c_smbus_read_byte_data(client, command); + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + switch(sda->index) { + case SYS_LOCATOR: + res = (val & SYS_LOCATOR_LED_BITS) >> 0; + break; + case SYS_PWR: + res = (val & SYS_PWR_LED_BITS) >> 1; + break; + case SYS_STATUS: + res = (val & SYS_STATUS_LED_BITS) >> 4; + break; + case FAN1_LED: + case FAN3_LED: + case FAN5_LED: + res = (val & FAN135_LED_BITS) >> 0; + break; + case FAN2_LED: + case FAN4_LED: + case FAN6_LED: + res = (val & FAN246_LED_BITS) >> 3; + break; + case SYS_REST1: + res = val; + break; + case SWI_CTRL: + res = (val & REST_BUTTON_BITS) >> 0; + break; + } + + return sprintf(buf, "%d\n", res); +} + +static ssize_t sys_led_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *sda = to_sensor_dev_attr(attr); + int error, write, command, read; + + error = kstrtoint(buf, 10, &write); + if (error) + return error; + + + switch(sda->index) { + case SYS_LOCATOR: + if(write < 0 || write > 2) + return -EINVAL; + case SYS_PWR: + case SYS_STATUS: + if (write < 0 || write > 7) + return -EINVAL; + command = SYS_LED_REG; + break; + case FAN1_LED: + case FAN2_LED: + case FAN3_LED: + case FAN4_LED: + case FAN5_LED: + case FAN6_LED: + if (write < 0 || write > 7) + return -EINVAL; + command = FAN12_LED_REG + (sda->index - FAN1_LED)/2; + break; + case SYS_REST1: + if (write < 0 || write > 15) + return -EINVAL; + command = SYS_RESET1_REG; + break; + } + + read = i2c_smbus_read_byte_data(client, command); + if (read < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, read); + } + + switch(sda->index) { + case SYS_LOCATOR: + read &= ~SYS_LOCATOR_LED_BITS; + read |= write << 0; + break; + case SYS_PWR: + read &= ~SYS_PWR_LED_BITS; + read |= write << 1; + break; + case SYS_STATUS: + read &= ~SYS_STATUS_LED_BITS; + read |= write << 4; + break; + case FAN1_LED: + case FAN3_LED: + case FAN5_LED: + read &= ~FAN135_LED_BITS; + read |= write << 0; + break; + case FAN2_LED: + case FAN4_LED: + case FAN6_LED: + read &= ~FAN246_LED_BITS; + read |= write << 3; + break; + case SYS_REST1: + read = write; + break; + } + + i2c_smbus_write_byte_data(client, command, read); + + return count; +} + + + +static void alpha_i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void alpha_i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int alpha_i2c_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + status = sysfs_create_group(&client->dev.kobj, &alphanetworks_snh60a0_320fv2_sys_group); + if (status) { + goto exit; + } + + dev_info(&client->dev, "chip found\n"); + alpha_i2c_cpld_add_client(client); + + return 0; + +exit: + return status; +} + +static int alpha_i2c_cpld_remove(struct i2c_client *client) +{ + sysfs_remove_group(&client->dev.kobj, &alphanetworks_snh60a0_320fv2_sys_group); + alpha_i2c_cpld_remove_client(client); + + return 0; +} + +static const struct i2c_device_id alpha_i2c_cpld_id[] = { + { "snh60a0_system_cpld", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, alpha_i2c_cpld_id); + +static struct i2c_driver alpha_i2c_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "snh60a0_system_cpld", + }, + .probe = alpha_i2c_cpld_probe, + .remove = alpha_i2c_cpld_remove, + .id_table = alpha_i2c_cpld_id, + .address_list = normal_i2c, +}; + + +static int __init alpha_i2c_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&alpha_i2c_cpld_driver); +} + +static void __exit alpha_i2c_cpld_exit(void) +{ + i2c_del_driver(&alpha_i2c_cpld_driver); +} + + +MODULE_AUTHOR("Alpha-SID6"); +MODULE_DESCRIPTION("alpha_system_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(alpha_i2c_cpld_init); +module_exit(alpha_i2c_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/service/snh60a0-platform-init.service b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/service/snh60a0-platform-init.service new file mode 100644 index 00000000000..564a8dcdb7a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/service/snh60a0-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Alphanetworks SNH60A0-320F Platform initialization service +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/alphanetworks_snh60a0_util.py install +ExecStop=/usr/local/bin/alphanetworks_snh60a0_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/setup.py b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/setup.py new file mode 100644 index 00000000000..94435eef3c0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='snh60a0_320fv2', + version='1.0', + description='Module to initialize Alphanetworks SNH60A0-320FV2 platforms', + + packages=['snh60a0_320fv2'], + package_dir={'snh60a0_320fv2': 'snh60a0-320fv2/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/utils/alphanetworks_snh60a0_util.py b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/utils/alphanetworks_snh60a0_util.py new file mode 100755 index 00000000000..870267e31c2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60a0-320fv2/utils/alphanetworks_snh60a0_util.py @@ -0,0 +1,399 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Alphanetworks Technology Corporation. +# Robin Chen +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# see +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + + + + +PROJECT_NAME = 'snh60a0-320fv2' +device_path = "x86_64-alphanetworks_snh60a0_320fv2-r0" +version = '0.1.0' +verbose = False +DEBUG = False +args = [] +FORCE = 0 + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print PROJECT_NAME.upper()+": "+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +" with result: " + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_check(): + ret, lsmod = log_os_system("lsmod | grep alphanetworks", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + return True + + + +kos = [ +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x', +'modprobe optoe' , +'modprobe snh60a0_power_cpld' , +'modprobe snh60a0_system_cpld' , +'modprobe snh60a0_onie_eeprom' , +'modprobe alphanetworks_snh60a0_320fv2_sfp' ] + +def driver_install(): + global FORCE + status, output = log_os_system("depmod", 1) + for i in range(0,len(kos)): + if kos[i].find('pca954') != -1: + status, output = log_os_system(kos[i]+ " force_deselect_on_exit=1", 1) + else: + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +i2c_prefix = '/sys/bus/i2c/devices/' + +sfp_map = [14,15,16,17] +mknod =[ +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9545 0x71 > /sys/bus/i2c/devices/i2c-6/new_device', +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-8/new_device', +'echo pca9545 0x71 > /sys/bus/i2c/devices/i2c-7/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-21/new_device', +'echo 24c02 0x51 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo 24c02 0x51 > /sys/bus/i2c/devices/i2c-12/new_device', +'echo snh60a0_onie_eeprom 0x56 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo snh60a0_power_cpld 0x5e > /sys/bus/i2c/devices/i2c-0/new_device', +'echo snh60a0_system_cpld 0x5f > /sys/bus/i2c/devices/i2c-9/new_device', +'echo lm75 0x4D > /sys/bus/i2c/devices/i2c-4/new_device', +'echo lm75 0x4C > /sys/bus/i2c/devices/i2c-5/new_device', +'echo lm75 0x4F > /sys/bus/i2c/devices/i2c-0/new_device' ] + +mknod2 =[ +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9545 0x71 > /sys/bus/i2c/devices/i2c-6/new_device', +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-8/new_device', +'echo pca9545 0x71 > /sys/bus/i2c/devices/i2c-7/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-21/new_device', +'echo 24c02 0x51 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo 24c02 0x51 > /sys/bus/i2c/devices/i2c-12/new_device', +'echo snh60a0_onie_eeprom 0x56 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo snh60a0_power_cpld 0x5e > /sys/bus/i2c/devices/i2c-1/new_device', +'echo snh60a0_system_cpld 0x5f > /sys/bus/i2c/devices/i2c-9/new_device', +'echo lm75 0x4D > /sys/bus/i2c/devices/i2c-4/new_device', +'echo lm75 0x4C > /sys/bus/i2c/devices/i2c-5/new_device', +'echo lm75 0x4F > /sys/bus/i2c/devices/i2c-1/new_device' ] + + + +def i2c_order_check(): + # i2c bus 0 and 1 might be installed in different order. + # Here check if 0x76 is exist @ i2c-0 + + status, output = log_os_system("i2cdetect -l | grep I801 | grep i2c-0", 0) + if not output: + order = 1 + else: + order = 0 + + if not device_exist(): + #order = 1 + tmp = "sed -i 's/0-/1-/g' /usr/share/sonic/device/"+device_path+"/fancontrol" + status, output = log_os_system(tmp, 0) + tmp = "sed -i 's/0-/1-/g' /usr/share/sonic/device/"+device_path+"/plugins/led_control.py" + status, output = log_os_system(tmp, 0) + else: + #order = 0 + tmp = "sed -i 's/1-/0-/g' /usr/share/sonic/device/"+device_path+"/fancontrol" + status, output = log_os_system(tmp, 0) + tmp = "sed -i 's/1-/0-/g' /usr/share/sonic/device/"+device_path+"/plugins/led_control.py" + status, output = log_os_system(tmp, 0) + + + return order + +def device_install(): + global FORCE + + order = i2c_order_check() + + # if 0x76 is not exist @i2c-0, use reversed bus order + if order: + for i in range(0,len(mknod2)): + #for pca954x need times to built new i2c buses + if mknod2[i].find('pca954') != -1: + time.sleep(1) + + if mknod2[i].find('lm75') != -1: + time.sleep(1) + + status, output = log_os_system(mknod2[i], 1) + if status: + print output + if FORCE == 0: + return status + else: + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(1) + + if mknod[i].find('lm75') != -1: + time.sleep(1) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + + status, output =log_os_system("echo 0 > /sys/bus/i2c/devices/9-005f/sys_reset1", 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(0, 32): + index = i / 8 + port = i % 8 + reg_sfp = 0 + if port == 0: + reg_sfp = 1 + + if reg_sfp == 1: + status, output =log_os_system("echo sfpcpld"+str(i+1)+" 0x5f > /sys/bus/i2c/devices/i2c-"+str(sfp_map[index])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + status, output =log_os_system("echo sfpcpld"+str(i+1)+" 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[index])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + + return + +def device_uninstall(): + global FORCE + + status, output = log_os_system("i2cdetect -l | grep I801 | grep i2c-0", 0) + + if not output: + I2C_ORDER=1 + else: + I2C_ORDER=0 + + for i in range(0, 32): + index = i / 8 + port = i % 8 + reg_sfp = 0 + if port == 0: + reg_sfp = 1 + + if reg_sfp == 1: + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[index])+"/delete_device" + status, output =log_os_system("echo 0x5f > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[index])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + if I2C_ORDER==0: + nodelist = mknod + else: + nodelist = mknod2 + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_check() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + tmp = "find /var/lib/docker/overlay -iname fancontrol | grep usr/sbin/fancontrol | xargs cat | sed '429d' | sed '428a if \[ $? -ne 1 \]' | sed '425d' | sed '424a return' > /tmp/tmp_fancontrol" + status, output = log_os_system(tmp, 1) + tmp = "fancontrol_tmp=`find /var/lib/docker/overlay -iname fancontrol | grep usr/sbin/fancontrol` ; cp /tmp/tmp_fancontrol $fancontrol_tmp" + status, output = log_os_system(tmp, 1) + print "Checking system...." + if driver_check() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_check()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0070", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/classes/__init__.py b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/classes/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/Makefile b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/Makefile new file mode 100644 index 00000000000..ec14f1229d6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/Makefile @@ -0,0 +1,8 @@ +# obj-m:=accton_as7712_32x_fan.o accton_as7712_32x_sfp.o leds-accton_as7712_32x.o \ +# goreme_system_cpld.o ym2651y.o optoe.o + +obj-m:=alphanetworks_snh60b0-640f_sfp.o snh60b0-640f_system_cpld.o snh60b0-640f_power_cpld.o snh60b0-640f_onie_eeprom.o + + +# obj-m:=accton_as7712_32x_fan.o accton_as7712_32x_sfp.o leds-accton_as7712_32x.o \ +# accton_as7712_32x_psu.o accton_i2c_cpld.o ym2651y.o optoe.o diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/alphanetworks_snh60b0-640f_sfp.c b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/alphanetworks_snh60b0-640f_sfp.c new file mode 100644 index 00000000000..8985790cce6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/alphanetworks_snh60b0-640f_sfp.c @@ -0,0 +1,2076 @@ +/* + * SFP driver for alphanetworks snh60b0-640f sfp + * + * Copyright (C) 2018 Alphanetworks Technology Corporation. + * Philip Wang + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * see + * + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "snh60b0_640f_sfp" + +#define DEBUG_MODE 0 + +#if (DEBUG_MODE == 1) + #define DEBUG_PRINT(fmt, args...) \ + printk (KERN_INFO "%s[%s,%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +#define NUM_OF_SFP_PORT 64 +#define EEPROM_NAME "sfp_eeprom" +#define EEPROM_SIZE 256 /* 256 byte eeprom */ +#define BIT_INDEX(i) (1ULL << (i)) +#define USE_I2C_BLOCK_READ 1 +#define I2C_RW_RETRY_COUNT 3 +#define I2C_RW_RETRY_INTERVAL 100 /* ms */ + +#define SFP_CPLD_I2C_ADDR 0x5F +#define SFP_EEPROM_A0_I2C_ADDR 0x50 +#define SFP_EEPROM_A2_I2C_ADDR 0x68 +#define SFP_PCA9506_I2C_ADDR 0x20 + + +#define SFPPLUS_1_PORT_NUMBER 64 +#define SFPPLUS_2_PORT_NUMBER 65 + +#define SFF8024_PHYSICAL_DEVICE_ID_ADDR 0x0 +#define SFF8024_DEVICE_ID_SFP 0x3 +#define SFF8024_DEVICE_ID_QSFP 0xC +#define SFF8024_DEVICE_ID_QSFP_PLUS 0xD +#define SFF8024_DEVICE_ID_QSFP28 0x11 + +#define SFF8472_DIAG_MON_TYPE_ADDR 92 +#define SFF8472_DIAG_MON_TYPE_DDM_MASK 0x40 +#define SFF8472_10G_ETH_COMPLIANCE_ADDR 0x3 +#define SFF8472_10G_BASE_MASK 0xF0 + +#define SFF8436_RX_LOS_ADDR 3 +#define SFF8436_TX_FAULT_ADDR 4 +#define SFF8436_TX_DISABLE_ADDR 86 + +static ssize_t sfp_eeprom_read(struct i2c_client *, u8, u8 *,int); +static ssize_t sfp_eeprom_write(struct i2c_client *, u8 , const char *,int); +/* extern int alpha_i2c_cpld_read(unsigned short cpld_addr, u8 reg); */ +extern int alpha_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { SFP_EEPROM_A0_I2C_ADDR, SFP_EEPROM_A2_I2C_ADDR, SFP_CPLD_I2C_ADDR, SFP_PCA9506_I2C_ADDR, I2C_CLIENT_END }; + +#define CPLD_PORT_TO_FRONT_PORT(port) (port+1) + +enum port_numbers { +sfp1, sfp2, sfp3, sfp4, sfp5, sfp6, sfp7, sfp8, +sfp9, sfp10, sfp11, sfp12, sfp13, sfp14, sfp15, sfp16, +sfp17, sfp18, sfp19, sfp20, sfp21, sfp22, sfp23, sfp24, +sfp25, sfp26, sfp27, sfp28, sfp29, sfp30, sfp31, sfp32, +sfp33, sfp34, sfp35, sfp36, sfp37, sfp38, sfp39, sfp40, +sfp41, sfp42, sfp43, sfp44, sfp45, sfp46, sfp47, sfp48, +sfp49, sfp50, sfp51, sfp52, sfp53, sfp54, sfp55, sfp56, +sfp57, sfp58, sfp59, sfp60, sfp61, sfp62, sfp63, sfp64, +sfp65, sfp66 +}; + +static const struct i2c_device_id sfp_device_id[] = { +{ "sfpcpld1", sfp1 }, { "sfpcpld2", sfp2 }, { "sfpcpld3", sfp3 }, { "sfpcpld4", sfp4 }, +{ "sfpcpld5", sfp5 }, { "sfpcpld6", sfp6 }, { "sfpcpld7", sfp7 }, { "sfpcpld8", sfp8 }, +{ "sfpcpld9", sfp9 }, { "sfpcpld10", sfp10 }, { "sfpcpld11", sfp11 }, { "sfpcpld12", sfp12 }, +{ "sfpcpld13", sfp13 }, { "sfpcpld14", sfp14 }, { "sfpcpld15", sfp15 }, { "sfpcpld16", sfp16 }, +{ "sfpcpld17", sfp17 }, { "sfpcpld18", sfp18 }, { "sfpcpld19", sfp19 }, { "sfpcpld20", sfp20 }, +{ "sfpcpld21", sfp21 }, { "sfpcpld22", sfp22 }, { "sfpcpld23", sfp23 }, { "sfpcpld24", sfp24 }, +{ "sfpcpld25", sfp25 }, { "sfpcpld26", sfp26 }, { "sfpcpld27", sfp27 }, { "sfpcpld28", sfp28 }, +{ "sfpcpld29", sfp29 }, { "sfpcpld30", sfp30 }, { "sfpcpld31", sfp31 }, { "sfpcpld32", sfp32 }, +{ "sfpcpld33", sfp33 }, { "sfpcpld34", sfp34 }, { "sfpcpld35", sfp35 }, { "sfpcpld36", sfp36 }, +{ "sfpcpld37", sfp37 }, { "sfpcpld38", sfp38 }, { "sfpcpld39", sfp39 }, { "sfpcpld40", sfp40 }, +{ "sfpcpld41", sfp41 }, { "sfpcpld42", sfp42 }, { "sfpcpld43", sfp43 }, { "sfpcpld44", sfp44 }, +{ "sfpcpld45", sfp45 }, { "sfpcpld46", sfp46 }, { "sfpcpld47", sfp47 }, { "sfpcpld48", sfp48 }, +{ "sfpcpld49", sfp49 }, { "sfpcpld50", sfp50 }, { "sfpcpld51", sfp51 }, { "sfpcpld52", sfp52 }, +{ "sfpcpld53", sfp53 }, { "sfpcpld54", sfp54 }, { "sfpcpld55", sfp55 }, { "sfpcpld56", sfp56 }, +{ "sfpcpld57", sfp57 }, { "sfpcpld58", sfp58 }, { "sfpcpld59", sfp59 }, { "sfpcpld60", sfp60 }, +{ "sfpcpld61", sfp61 }, { "sfpcpld62", sfp62 }, { "sfpcpld63", sfp63 }, { "sfpcpld64", sfp64 }, +{ "sfpcpld65", sfp65 }, { "sfpcpld66", sfp66 }, {} +}; +MODULE_DEVICE_TABLE(i2c, sfp_device_id); + +/* + * list of valid port types + * note OOM_PORT_TYPE_NOT_PRESENT to indicate no + * module is present in this port + */ +typedef enum oom_driver_port_type_e { + OOM_DRIVER_PORT_TYPE_INVALID, + OOM_DRIVER_PORT_TYPE_NOT_PRESENT, + OOM_DRIVER_PORT_TYPE_SFP, + OOM_DRIVER_PORT_TYPE_SFP_PLUS, + OOM_DRIVER_PORT_TYPE_QSFP, + OOM_DRIVER_PORT_TYPE_QSFP_PLUS, + OOM_DRIVER_PORT_TYPE_QSFP28 +} oom_driver_port_type_t; + +enum driver_type_e { + DRIVER_TYPE_SFP_MSA, + DRIVER_TYPE_SFP_DDM, + DRIVER_TYPE_QSFP +}; + +/* Each client has this additional data + */ +struct eeprom_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + struct bin_attribute bin; /* eeprom data */ +}; + +struct sfp_msa_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u64 status[2]; /* index 0 => device id + 1 => 10G Ethernet Compliance Codes + to distinguish SFP or SFP+ + 2 => DIAGNOSTIC MONITORING TYPE */ + struct eeprom_data eeprom; +}; + +struct sfp_ddm_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u64 status[3]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss */ + struct eeprom_data eeprom; +}; + +struct qsfp_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status[3]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss */ + + u8 device_id; + struct eeprom_data eeprom; +}; + +struct sfp_port_data { + struct mutex update_lock; + enum driver_type_e driver_type; + int port; /* CPLD port index */ + oom_driver_port_type_t port_type; + u64 present; /* present status, bit0:port0, bit1:port1 and so on */ + u64 port_reset; /* reset status, bit0:port0, bit1:port1 and so on */ + + struct sfp_msa_data *msa; + struct sfp_ddm_data *ddm; + struct qsfp_data *qsfp; + + struct i2c_client *client; +}; + +enum sfp_sysfs_port_num_attributes { + PORT1_NUMBER, + PORT2_NUMBER, + PORT3_NUMBER, + PORT4_NUMBER, + PORT5_NUMBER, + PORT6_NUMBER, + PORT7_NUMBER, + PORT8_NUMBER, + PORT9_NUMBER, + PORT10_NUMBER, + PORT11_NUMBER, + PORT12_NUMBER, + PORT13_NUMBER, + PORT14_NUMBER, + PORT15_NUMBER, + PORT16_NUMBER, + PORT_NUMBER_MAX +}; + +enum sfp_sysfs_present_attributes { + PORT1_PRESENT, + PORT2_PRESENT, + PORT3_PRESENT, + PORT4_PRESENT, + PORT5_PRESENT, + PORT6_PRESENT, + PORT7_PRESENT, + PORT8_PRESENT, + PORT9_PRESENT, + PORT10_PRESENT, + PORT11_PRESENT, + PORT12_PRESENT, + PORT13_PRESENT, + PORT14_PRESENT, + PORT15_PRESENT, + PORT16_PRESENT, + PORT1_PRESENT_ALL, + PORT2_PRESENT_ALL, + PORT3_PRESENT_ALL, + PORT4_PRESENT_ALL, + PORT5_PRESENT_ALL, + PORT6_PRESENT_ALL, + PORT7_PRESENT_ALL, + PORT8_PRESENT_ALL, + PORT9_PRESENT_ALL, + PORT10_PRESENT_ALL, + PORT11_PRESENT_ALL, + PORT12_PRESENT_ALL, + PORT13_PRESENT_ALL, + PORT14_PRESENT_ALL, + PORT15_PRESENT_ALL, + PORT16_PRESENT_ALL, + PORT_PRESENT_MAX +}; + +enum sfp_sysfs_type_attributes { + PORT1_TYPE, + PORT2_TYPE, + PORT3_TYPE, + PORT4_TYPE, + PORT5_TYPE, + PORT6_TYPE, + PORT7_TYPE, + PORT8_TYPE, + PORT9_TYPE, + PORT10_TYPE, + PORT11_TYPE, + PORT12_TYPE, + PORT13_TYPE, + PORT14_TYPE, + PORT15_TYPE, + PORT16_TYPE, + PORT_TYPE_MAX +}; + +enum sfp_sysfs_reset_attributes { + PORT1_RESET, + PORT2_RESET, + PORT3_RESET, + PORT4_RESET, + PORT5_RESET, + PORT6_RESET, + PORT7_RESET, + PORT8_RESET, + PORT9_RESET, + PORT10_RESET, + PORT11_RESET, + PORT12_RESET, + PORT13_RESET, + PORT14_RESET, + PORT15_RESET, + PORT16_RESET, + PORT_RESET_MAX +}; + +enum sfp_sysfs_rx_los_attributes { + PORT1_RX_LOS, + PORT2_RX_LOS, + PORT3_RX_LOS, + PORT4_RX_LOS, + PORT5_RX_LOS, + PORT6_RX_LOS, + PORT7_RX_LOS, + PORT8_RX_LOS, + PORT9_RX_LOS, + PORT10_RX_LOS, + PORT11_RX_LOS, + PORT12_RX_LOS, + PORT13_RX_LOS, + PORT14_RX_LOS, + PORT15_RX_LOS, + PORT16_RX_LOS, + PORT_RX_LOS_MAX +}; + +enum sfp_sysfs_rx_los1_attributes { + PORT1_RX_LOS1 = PORT_RX_LOS_MAX, + PORT2_RX_LOS1, + PORT3_RX_LOS1, + PORT4_RX_LOS1, + PORT5_RX_LOS1, + PORT6_RX_LOS1, + PORT7_RX_LOS1, + PORT8_RX_LOS1, + PORT9_RX_LOS1, + PORT10_RX_LOS1, + PORT11_RX_LOS1, + PORT12_RX_LOS1, + PORT13_RX_LOS1, + PORT14_RX_LOS1, + PORT15_RX_LOS1, + PORT16_RX_LOS1, + PORT_RX_LOS1_MAX +}; + +enum sfp_sysfs_rx_los2_attributes { + PORT1_RX_LOS2 = PORT_RX_LOS1_MAX, + PORT2_RX_LOS2, + PORT3_RX_LOS2, + PORT4_RX_LOS2, + PORT5_RX_LOS2, + PORT6_RX_LOS2, + PORT7_RX_LOS2, + PORT8_RX_LOS2, + PORT9_RX_LOS2, + PORT10_RX_LOS2, + PORT11_RX_LOS2, + PORT12_RX_LOS2, + PORT13_RX_LOS2, + PORT14_RX_LOS2, + PORT15_RX_LOS2, + PORT16_RX_LOS2, + PORT_RX_LOS2_MAX +}; + +enum sfp_sysfs_rx_los3_attributes { + PORT1_RX_LOS3 = PORT_RX_LOS2_MAX, + PORT2_RX_LOS3, + PORT3_RX_LOS3, + PORT4_RX_LOS3, + PORT5_RX_LOS3, + PORT6_RX_LOS3, + PORT7_RX_LOS3, + PORT8_RX_LOS3, + PORT9_RX_LOS3, + PORT10_RX_LOS3, + PORT11_RX_LOS3, + PORT12_RX_LOS3, + PORT13_RX_LOS3, + PORT14_RX_LOS3, + PORT15_RX_LOS3, + PORT16_RX_LOS3, + PORT_RX_LOS3_MAX +}; + +enum sfp_sysfs_rx_los4_attributes { + PORT1_RX_LOS4 = PORT_RX_LOS3_MAX, + PORT2_RX_LOS4, + PORT3_RX_LOS4, + PORT4_RX_LOS4, + PORT5_RX_LOS4, + PORT6_RX_LOS4, + PORT7_RX_LOS4, + PORT8_RX_LOS4, + PORT9_RX_LOS4, + PORT10_RX_LOS4, + PORT11_RX_LOS4, + PORT12_RX_LOS4, + PORT13_RX_LOS4, + PORT14_RX_LOS4, + PORT15_RX_LOS4, + PORT16_RX_LOS4, + PORT_RX_LOS4_MAX +}; + +enum sfp_sysfs_rx_los_all_attributes { + PORT1_RX_LOS_ALL = PORT_RX_LOS4_MAX, + PORT2_RX_LOS_ALL, + PORT3_RX_LOS_ALL, + PORT4_RX_LOS_ALL, + PORT5_RX_LOS_ALL, + PORT6_RX_LOS_ALL, + PORT7_RX_LOS_ALL, + PORT8_RX_LOS_ALL, + PORT9_RX_LOS_ALL, + PORT10_RX_LOS_ALL, + PORT11_RX_LOS_ALL, + PORT12_RX_LOS_ALL, + PORT13_RX_LOS_ALL, + PORT14_RX_LOS_ALL, + PORT15_RX_LOS_ALL, + PORT16_RX_LOS_ALL, + PORT_RX_LOS_ALL_MAX +}; + +enum sfp_sysfs_tx_disable_attributes { + PORT1_TX_DISABLE = PORT_RX_LOS_ALL_MAX, + PORT2_TX_DISABLE, + PORT3_TX_DISABLE, + PORT4_TX_DISABLE, + PORT5_TX_DISABLE, + PORT6_TX_DISABLE, + PORT7_TX_DISABLE, + PORT8_TX_DISABLE, + PORT9_TX_DISABLE, + PORT10_TX_DISABLE, + PORT11_TX_DISABLE, + PORT12_TX_DISABLE, + PORT13_TX_DISABLE, + PORT14_TX_DISABLE, + PORT15_TX_DISABLE, + PORT16_TX_DISABLE, + PORT_TX_DISABLE_MAX +}; + +enum sfp_sysfs_tx_disable1_attributes { + PORT1_TX_DISABLE1 = PORT_TX_DISABLE_MAX, + PORT2_TX_DISABLE1, + PORT3_TX_DISABLE1, + PORT4_TX_DISABLE1, + PORT5_TX_DISABLE1, + PORT6_TX_DISABLE1, + PORT7_TX_DISABLE1, + PORT8_TX_DISABLE1, + PORT9_TX_DISABLE1, + PORT10_TX_DISABLE1, + PORT11_TX_DISABLE1, + PORT12_TX_DISABLE1, + PORT13_TX_DISABLE1, + PORT14_TX_DISABLE1, + PORT15_TX_DISABLE1, + PORT16_TX_DISABLE1, + PORT_TX_DISABLE1_MAX +}; + +enum sfp_sysfs_tx_disable2_attributes { + PORT1_TX_DISABLE2 = PORT_TX_DISABLE1_MAX, + PORT2_TX_DISABLE2, + PORT3_TX_DISABLE2, + PORT4_TX_DISABLE2, + PORT5_TX_DISABLE2, + PORT6_TX_DISABLE2, + PORT7_TX_DISABLE2, + PORT8_TX_DISABLE2, + PORT9_TX_DISABLE2, + PORT10_TX_DISABLE2, + PORT11_TX_DISABLE2, + PORT12_TX_DISABLE2, + PORT13_TX_DISABLE2, + PORT14_TX_DISABLE2, + PORT15_TX_DISABLE2, + PORT16_TX_DISABLE2, + PORT_TX_DISABLE2_MAX +}; + +enum sfp_sysfs_tx_disable3_attributes { + PORT1_TX_DISABLE3 = PORT_TX_DISABLE2_MAX, + PORT2_TX_DISABLE3, + PORT3_TX_DISABLE3, + PORT4_TX_DISABLE3, + PORT5_TX_DISABLE3, + PORT6_TX_DISABLE3, + PORT7_TX_DISABLE3, + PORT8_TX_DISABLE3, + PORT9_TX_DISABLE3, + PORT10_TX_DISABLE3, + PORT11_TX_DISABLE3, + PORT12_TX_DISABLE3, + PORT13_TX_DISABLE3, + PORT14_TX_DISABLE3, + PORT15_TX_DISABLE3, + PORT16_TX_DISABLE3, + PORT_TX_DISABLE3_MAX +}; + +enum sfp_sysfs_tx_disable4_attributes { + PORT1_TX_DISABLE4 = PORT_TX_DISABLE3_MAX, + PORT2_TX_DISABLE4, + PORT3_TX_DISABLE4, + PORT4_TX_DISABLE4, + PORT5_TX_DISABLE4, + PORT6_TX_DISABLE4, + PORT7_TX_DISABLE4, + PORT8_TX_DISABLE4, + PORT9_TX_DISABLE4, + PORT10_TX_DISABLE4, + PORT11_TX_DISABLE4, + PORT12_TX_DISABLE4, + PORT13_TX_DISABLE4, + PORT14_TX_DISABLE4, + PORT15_TX_DISABLE4, + PORT16_TX_DISABLE4, + PORT_TX_DISABLE4_MAX +}; + +enum sfp_sysfs_tx_disable_all_attributes { + PORT1_TX_DISABLE_ALL = PORT_TX_DISABLE4_MAX, + PORT2_TX_DISABLE_ALL, + PORT3_TX_DISABLE_ALL, + PORT4_TX_DISABLE_ALL, + PORT5_TX_DISABLE_ALL, + PORT6_TX_DISABLE_ALL, + PORT7_TX_DISABLE_ALL, + PORT8_TX_DISABLE_ALL, + PORT9_TX_DISABLE_ALL, + PORT10_TX_DISABLE_ALL, + PORT11_TX_DISABLE_ALL, + PORT12_TX_DISABLE_ALL, + PORT13_TX_DISABLE_ALL, + PORT14_TX_DISABLE_ALL, + PORT15_TX_DISABLE_ALL, + PORT16_TX_DISABLE_ALL, + PORT_TX_DISABLE_ALL_MAX +}; + +enum sfp_sysfs_tx_fault_attributes { + PORT1_TX_FAULT = PORT_TX_DISABLE_ALL_MAX, + PORT2_TX_FAULT, + PORT3_TX_FAULT, + PORT4_TX_FAULT, + PORT5_TX_FAULT, + PORT6_TX_FAULT, + PORT7_TX_FAULT, + PORT8_TX_FAULT, + PORT9_TX_FAULT, + PORT10_TX_FAULT, + PORT11_TX_FAULT, + PORT12_TX_FAULT, + PORT13_TX_FAULT, + PORT14_TX_FAULT, + PORT15_TX_FAULT, + PORT16_TX_FAULT, + PORT_TX_FAULT_MAX +}; + +enum sfp_sysfs_tx_fault1_attributes { + PORT1_TX_FAULT1 = PORT_TX_FAULT_MAX, + PORT2_TX_FAULT1, + PORT3_TX_FAULT1, + PORT4_TX_FAULT1, + PORT5_TX_FAULT1, + PORT6_TX_FAULT1, + PORT7_TX_FAULT1, + PORT8_TX_FAULT1, + PORT9_TX_FAULT1, + PORT10_TX_FAULT1, + PORT11_TX_FAULT1, + PORT12_TX_FAULT1, + PORT13_TX_FAULT1, + PORT14_TX_FAULT1, + PORT15_TX_FAULT1, + PORT16_TX_FAULT1, + PORT_TX_FAULT1_MAX +}; + +enum sfp_sysfs_tx_fault2_attributes { + PORT1_TX_FAULT2 = PORT_TX_FAULT1_MAX, + PORT2_TX_FAULT2, + PORT3_TX_FAULT2, + PORT4_TX_FAULT2, + PORT5_TX_FAULT2, + PORT6_TX_FAULT2, + PORT7_TX_FAULT2, + PORT8_TX_FAULT2, + PORT9_TX_FAULT2, + PORT10_TX_FAULT2, + PORT11_TX_FAULT2, + PORT12_TX_FAULT2, + PORT13_TX_FAULT2, + PORT14_TX_FAULT2, + PORT15_TX_FAULT2, + PORT16_TX_FAULT2, + PORT_TX_FAULT2_MAX +}; + +enum sfp_sysfs_tx_fault3_attributes { + PORT1_TX_FAULT3 = PORT_TX_FAULT2_MAX, + PORT2_TX_FAULT3, + PORT3_TX_FAULT3, + PORT4_TX_FAULT3, + PORT5_TX_FAULT3, + PORT6_TX_FAULT3, + PORT7_TX_FAULT3, + PORT8_TX_FAULT3, + PORT9_TX_FAULT3, + PORT10_TX_FAULT3, + PORT11_TX_FAULT3, + PORT12_TX_FAULT3, + PORT13_TX_FAULT3, + PORT14_TX_FAULT3, + PORT15_TX_FAULT3, + PORT16_TX_FAULT3, + PORT_TX_FAULT3_MAX +}; + +enum sfp_sysfs_tx_fault4_attributes { + PORT1_TX_FAULT4 = PORT_TX_FAULT3_MAX, + PORT2_TX_FAULT4, + PORT3_TX_FAULT4, + PORT4_TX_FAULT4, + PORT5_TX_FAULT4, + PORT6_TX_FAULT4, + PORT7_TX_FAULT4, + PORT8_TX_FAULT4, + PORT9_TX_FAULT4, + PORT10_TX_FAULT4, + PORT11_TX_FAULT4, + PORT12_TX_FAULT4, + PORT13_TX_FAULT4, + PORT14_TX_FAULT4, + PORT15_TX_FAULT4, + PORT16_TX_FAULT4, + PORT_TX_FAULT4_MAX +}; + +enum sfp_sysfs_eeprom_attributes { + PORT1_EEPROM, + PORT2_EEPROM, + PORT3_EEPROM, + PORT4_EEPROM, + PORT5_EEPROM, + PORT6_EEPROM, + PORT7_EEPROM, + PORT8_EEPROM, + PORT9_EEPROM, + PORT10_EEPROM, + PORT11_EEPROM, + PORT12_EEPROM, + PORT13_EEPROM, + PORT14_EEPROM, + PORT15_EEPROM, + PORT16_EEPROM, + PORT_EEPROM_MAX +}; + +enum sfp_sysfs_ddm_implemented_attributes { + PORT1_DDM_IMPLEMENTED, + PORT2_DDM_IMPLEMENTED, + PORT3_DDM_IMPLEMENTED, + PORT4_DDM_IMPLEMENTED, + PORT5_DDM_IMPLEMENTED, + PORT6_DDM_IMPLEMENTED, + PORT7_DDM_IMPLEMENTED, + PORT8_DDM_IMPLEMENTED, + PORT9_DDM_IMPLEMENTED, + PORT10_DDM_IMPLEMENTED, + PORT11_DDM_IMPLEMENTED, + PORT12_DDM_IMPLEMENTED, + PORT13_DDM_IMPLEMENTED, + PORT14_DDM_IMPLEMENTED, + PORT15_DDM_IMPLEMENTED, + PORT16_DDM_IMPLEMENTED, + PORT_DDM_IMPLEMENTED_MAX +}; + +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + DEBUG_PRINT("show_port_number port number:%d", data->port + attr->index); + return sprintf(buf, "%d\n", CPLD_PORT_TO_FRONT_PORT(data->port + attr->index)); +} + +static struct sfp_port_data *sfp_pca9506_update_present(struct i2c_client *client) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + int i = 0; + int status = -1; + u8 regs[] = {0x03}; + + DEBUG_PRINT("Starting pca9506 sfp present status update"); + mutex_lock(&data->update_lock); + + /* Read present status of port */ + data->present = 0; + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + /* status = alpha_i2c_cpld_read(0x5f, regs[i]); */ + status = i2c_smbus_read_byte_data(client, regs[i]); + + if (status < 0) { + DEBUG_PRINT("pca9506(0x20) reg(0x%x) err %d", regs[i], status); + goto exit; + } + + data->present = status; + } + + DEBUG_PRINT("Present status = 0x%llx", data->present); +exit: + mutex_unlock(&data->update_lock); + return data; +} + +static struct sfp_port_data *sfp_update_present(struct i2c_client *client) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + int i = 0; + int status = -1; + u8 regs[] = {0x05, 0x06}; + + if(data->port >= SFPPLUS_1_PORT_NUMBER){ + return sfp_pca9506_update_present(client); + } + + DEBUG_PRINT("Starting sfp present status update"); + mutex_lock(&data->update_lock); + + /* Read present status of port 1~32 */ + data->present = 0; + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + /* status = alpha_i2c_cpld_read(0x5f, regs[i]); */ + status = i2c_smbus_read_byte_data(client, regs[i]); + + if (status < 0) { + DEBUG_PRINT("cpld(0x5f) reg(0x%x) err %d", regs[i], status); + goto exit; + } + + data->present |= (u64)status << (i*8); + DEBUG_PRINT("Present status = 0x%llx", data->present); + } + + DEBUG_PRINT("Present status = 0x%llx", data->present); +exit: + mutex_unlock(&data->update_lock); + return data; +} + +static struct sfp_port_data *sfp_update_tx_rx_status(struct device *dev) +{ + return NULL; +} + +static ssize_t sfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + return 0; +} + +static int sfp_is_port_present(struct i2c_client *client, int port) +{ + struct sfp_port_data *data = sfp_update_present(client); + + if(data->port >= SFPPLUS_1_PORT_NUMBER) + return (data->present & BIT_INDEX(port)) ? 0 : 1; + else + return (data->present & BIT_INDEX(port)) ? 1 : 0; +} + +static ssize_t show_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + + if ((attr->index >= PORT1_PRESENT_ALL) && (attr->index <= PORT8_PRESENT_ALL)) { + + } + + /* PRESENT */ + return sprintf(buf, "%d\n", sfp_is_port_present(client, attr->index)); +} + +static struct sfp_port_data *sfp_update_port_type(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + u8 buf = 0; + int status; + + mutex_lock(&data->update_lock); + + switch (data->driver_type) { + case DRIVER_TYPE_SFP_MSA: + { + status = sfp_eeprom_read(data->client, SFF8024_PHYSICAL_DEVICE_ID_ADDR, &buf, sizeof(buf)); + if (status < 0) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + if (buf != SFF8024_DEVICE_ID_SFP) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + status = sfp_eeprom_read(data->client, SFF8472_10G_ETH_COMPLIANCE_ADDR, &buf, sizeof(buf)); + if (status < 0) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + DEBUG_PRINT("sfp port type (0x3) data = (0x%x)", buf); + data->port_type = buf & SFF8472_10G_BASE_MASK ? OOM_DRIVER_PORT_TYPE_SFP_PLUS : OOM_DRIVER_PORT_TYPE_SFP; + break; + } + case DRIVER_TYPE_QSFP: + { + status = sfp_eeprom_read(data->client, SFF8024_PHYSICAL_DEVICE_ID_ADDR, &buf, sizeof(buf)); + if (status < 0) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + DEBUG_PRINT("qsfp port type (0x0) buf = (0x%x)", buf); + switch (buf) { + case SFF8024_DEVICE_ID_QSFP: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP; + break; + case SFF8024_DEVICE_ID_QSFP_PLUS: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP_PLUS; + break; + case SFF8024_DEVICE_ID_QSFP28: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP_PLUS; + break; + default: + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + break; + } + default: + break; + } + + mutex_unlock(&data->update_lock); + return data; +} + +static ssize_t show_port_type(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (!sfp_is_port_present(client, attr->index)) { + return sprintf(buf, "%d\n", OOM_DRIVER_PORT_TYPE_NOT_PRESENT); + } + + sfp_update_port_type(dev); + return sprintf(buf, "%d\n", data->port_type); +} + + +static struct sfp_port_data *sfp_update_port_reset(struct i2c_client *client) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + int i = 0; + int status = -1; + u8 regs[] = {0x07, 0x08}; + + mutex_lock(&data->update_lock); + + /* Read reset status of port 1~32 */ + data->port_reset = 0; + + for (i = 0; i < ARRAY_SIZE(regs); i++) { + status = i2c_smbus_read_byte_data(client, regs[i]); + + if (status < 0) { + DEBUG_PRINT("cpld(0x60) reg(0x%x) err %d", regs[i], status); + goto exit; + } + + DEBUG_PRINT("reset status = 0x%x", status); + data->port_reset |= (u64)status << (i*8); + } + + DEBUG_PRINT("reset status = 0x%llx", data->port_reset); +exit: + mutex_unlock(&data->update_lock); + return data; +} + +static ssize_t show_port_reset(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int is_reset = 0; + + if (!sfp_is_port_present(client, attr->index)) { + return sprintf(buf, "%d\n", OOM_DRIVER_PORT_TYPE_NOT_PRESENT); + } + + sfp_update_port_reset(client); + is_reset = (data->port_reset & BIT_INDEX(attr->index))? 0 : 1; + + return sprintf(buf, "%d\n", is_reset); +} + +static ssize_t sfp_set_port_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + u8 cpld_reg = 0, cpld_val = 0; /*, cpld_bit = 0; //remove unused variable */ + long is_reset; + int error; + + error = kstrtol(buf, 10, &is_reset); + if (error) { + return error; + } + + mutex_lock(&data->update_lock); + + cpld_reg = 0x07; + + cpld_val = i2c_smbus_read_byte_data(client, cpld_reg); + + DEBUG_PRINT("current cpld reg = 0x%x value = 0x%x", cpld_reg, cpld_val); + + /* Update reset status. CPLD defined 0 is reset state, 1 is normal state. + * is_reset: 0 is not reset. 1 is reset. + */ + if (is_reset == 0) { + data->port_reset |= BIT_INDEX(attr->index); + } + else { + data->port_reset &= ~BIT_INDEX(attr->index); + } + + alpha_i2c_cpld_write(0x5f, cpld_reg, cpld_val); + DEBUG_PRINT("write cpld reg = 0x%x value = 0x%x", cpld_reg, cpld_val); + + mutex_unlock(&data->update_lock); + + return count; +} + +static struct sfp_port_data *qsfp_update_tx_rx_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int i, status = -1; + u8 buf = 0; + u8 reg[] = {SFF8436_TX_FAULT_ADDR, SFF8436_TX_DISABLE_ADDR, SFF8436_RX_LOS_ADDR}; + + if (time_before(jiffies, data->qsfp->last_updated + HZ + HZ / 2) && data->qsfp->valid) { + return data; + } + + dev_dbg(dev, "Starting sfp tx rx status update"); + mutex_lock(&data->update_lock); + data->qsfp->valid = 0; + memset(data->qsfp->status, 0, sizeof(data->qsfp->status)); + + /* Notify device to update tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(data->client, reg[i], &buf, sizeof(buf)); + if (status < 0) { + goto exit; + } + } + msleep(200); + + /* Read actual tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(data->client, reg[i], &buf, sizeof(buf)); + if (status < 0) { + goto exit; + } + + DEBUG_PRINT("qsfp reg(0x%x) status = (0x%x)", reg[i], data->qsfp->status[i]); + data->qsfp->status[i] = (buf & 0xF); + } + + data->qsfp->valid = 1; + data->qsfp->last_updated = jiffies; + mutex_unlock(&data->update_lock); + return data; + +exit: + mutex_unlock(&data->update_lock); + return NULL; +} + +static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 val = 0; + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct sfp_port_data *data = i2c_get_clientdata(client); + + if (!sfp_is_port_present(client, attr->index)) { + return -ENODEV; + } + + data = qsfp_update_tx_rx_status(dev); + if (!data) { + return -EIO; + } + + if ((attr->index >= PORT1_TX_FAULT1) && (attr->index < PORT_TX_FAULT4_MAX)){ + val = (data->qsfp->status[2] & BIT_INDEX(attr->index - PORT1_TX_FAULT1)) ? 1 : 0; + } + else if ((attr->index >= PORT1_TX_DISABLE1) && (attr->index < PORT_TX_DISABLE4_MAX)){ + val = (data->qsfp->status[1] & BIT_INDEX(attr->index - PORT1_TX_DISABLE1)) ? 1 : 0; + } + else if ((attr->index >= PORT1_TX_DISABLE_ALL) && (attr->index < PORT_TX_DISABLE_ALL_MAX)){ + val = ((data->qsfp->status[1] & 0xF) == 0xF) ? 1 : 0; + } + if ((attr->index >= PORT1_RX_LOS1) && (attr->index < PORT_RX_LOS4_MAX)){ + val = (data->qsfp->status[0] & BIT_INDEX(attr->index - PORT1_RX_LOS1)) ? 1 : 0; + } + + return sprintf(buf, "%d\n", val); +} + +static ssize_t qsfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + long disable; + int result; + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct sfp_port_data *data; + + result = kstrtol(buf, 10, &disable); + if (result) { + return result; + } + + data = qsfp_update_tx_rx_status(dev); + if (!data) { + return -EIO; + } + + mutex_lock(&data->update_lock); + + if((attr->index >= PORT1_TX_DISABLE_ALL) && (attr->index < PORT_TX_DISABLE_ALL_MAX)){ + DEBUG_PRINT ("disable:%ld %d==TX_DISABLE_ALL %u\r\n", disable, attr->index, data->qsfp->status[1]); + data->qsfp->status[1] = disable? 0xF:0; + } + else{ + if (disable) { + data->qsfp->status[1] |= (1 << (attr->index - PORT1_TX_DISABLE1)); + } + else { + data->qsfp->status[1] &= ~(1 << (attr->index - PORT1_TX_DISABLE1)); + } + } + + DEBUG_PRINT("index = (%d), status = (0x%x)", attr->index, data->qsfp->status[1]); + result = sfp_eeprom_write(client, SFF8436_TX_DISABLE_ADDR, &data->qsfp->status[1], sizeof(data->qsfp->status[1])); + mutex_unlock(&data->update_lock); + return count; +} + +static ssize_t sfp_show_ddm_implemented(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + char ddm; + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (!sfp_is_port_present(client, attr->index)) { + return -ENODEV; + } + + status = sfp_eeprom_read(data->client, SFF8472_DIAG_MON_TYPE_ADDR, &ddm, sizeof(ddm)); + if (status < 0) { + return -EIO; + } + + return sprintf(buf, "%d\n", (ddm & SFF8472_DIAG_MON_TYPE_DDM_MASK) ? 1 : 0); +} + +static ssize_t sfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 val = 0, index = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct sfp_port_data *data; + + data = sfp_update_tx_rx_status(dev); + if (!data) { + return -EIO; + } + if ((attr->index >= PORT1_TX_FAULT) && (attr->index < PORT_TX_FAULT_MAX)){ + index = 0; + } + else if ((attr->index >= PORT1_TX_DISABLE) && (attr->index < PORT_TX_DISABLE_MAX)){ + index = 1; + } + if ((attr->index >= PORT1_RX_LOS) && (attr->index < PORT_RX_LOS_MAX)){ + index = 2; + } + + if(data->port == SFPPLUS_1_PORT_NUMBER) + val = (data->ddm->status[index] & BIT_INDEX(0)) ? 1 : 0; + else if(data->port == SFPPLUS_1_PORT_NUMBER) + val = (data->ddm->status[index] & BIT_INDEX(1)) ? 1 : 0; + else + val = (data->ddm->status[index] & BIT_INDEX(attr->index)) ? 1 : 0; + return sprintf(buf, "%d\n", val); +} + +static ssize_t qsfp_show_eeprom(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + char devfile[96]; + struct file *sfd; + int i2c_index = 0; + int result; + int offset[] = {0x0b, 0x0c}; + int rdlen, rc; + mm_segment_t old_fs; + char buffer[256]; + + if (!sfp_is_port_present(client, attr->index)) { + return 0; + } + + if(strcmp(client->name, "sfpcpld1") == 0) + i2c_index = 13; + else if(strcmp(client->name, "sfpcpld17") == 0) + i2c_index = 14; + else if(strcmp(client->name, "sfpcpld33") == 0) + i2c_index = 15; + else if(strcmp(client->name, "sfpcpld49") == 0) + i2c_index = 16; + else if(strcmp(client->name, "sfpcpld65") == 0){ + if(attr->index == 0) + i2c_index = 21; + else if(attr->index == 1) + i2c_index = 22; + } + + snprintf(devfile, sizeof(devfile), "/sys/bus/i2c/devices/%d-0050/sfp_eeprom", i2c_index); + + /* Set module select register */ + switch(i2c_index){ + case 13: + case 14: + case 15: + case 16: + if((attr->index/8) == 0){ + /* Port number is 1-8 */ + result = i2c_smbus_write_byte_data(client, offset[0], BIT_INDEX(attr->index)); + if (result < 0) { + dev_info(&client->dev, "i2c_smbus_write_byte_data fail(%d)", result); + } + } + else if((attr->index/8) == 1){ + /* Port number is 9-16 */ + result = i2c_smbus_write_byte_data(client, offset[1], BIT_INDEX((attr->index)%8)); + if (result < 0) { + dev_info(&client->dev, "i2c_smbus_write_byte_data fail(%d)", result); + } + } + break; + default: + break; + } + + /* Read SFP EEPROM */ + sfd = filp_open(devfile, O_RDONLY, 0); + if (IS_ERR(sfd)) { + dev_info(&client->dev, "Failed to open file(%s)#%d", devfile, __LINE__); + return 0; + } + + if(!(sfd->f_op) || !(sfd->f_op->read) ) { + dev_info(&client->dev, "file %s cann't readable ?\n", devfile); + return 0; + } + + old_fs = get_fs(); + set_fs(KERNEL_DS); + rdlen = sfd->f_op->read(sfd, buffer, sizeof(buffer), &sfd->f_pos); + if (rdlen == 0) { + dev_info(&client->dev, "File(%s) empty!\n", devfile); + rc = 0; + goto exit; + } + + rc = sizeof(buffer); + memcpy(buf, buffer, rc); + + /* Reset module select register */ + switch(i2c_index){ + case 13: + case 14: + case 15: + case 16: + if((attr->index/8) == 0){ + /* Port number is 1-8 */ + result = i2c_smbus_write_byte_data(client, offset[0], 0); + if (result < 0) { + dev_info(&client->dev, "i2c_smbus_write_byte_data fail(%d)", result); + } + } + else if((attr->index/8) == 1){ + /* Port number is 9-16 */ + result = i2c_smbus_write_byte_data(client, offset[1], 0); + if (result < 0) { + dev_info(&client->dev, "i2c_smbus_write_byte_data fail(%d)", result); + } + } + break; + default: + break; + } + +exit: + set_fs(old_fs); + filp_close(sfd, 0); + + return rc; +} + +#if 0 +static ssize_t qsfp_set_eeprom(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + DEBUG_PRINT("data->port:%d attr index:%d", data->port, attr->index); + return 1; +} +#endif + +/* SFP/QSFP common attributes for sysfs */ +#define DECLARE_PORT_NUMBER_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT1##_NUMBER); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT2##_NUMBER); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT3##_NUMBER); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT4##_NUMBER); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT5##_NUMBER); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT6##_NUMBER); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT7##_NUMBER); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_port_number, S_IRUGO, show_port_number, NULL, PORT##PORT8##_NUMBER); +#define DECLARE_PORT_NUMBER_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + &sensor_dev_attr_sfp##PORT1##_port_number.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_port_number.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_port_number.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_port_number.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_port_number.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_port_number.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_port_number.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_port_number.dev_attr.attr, +DECLARE_PORT_NUMBER_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_NUMBER_SENSOR_DEVICE_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + +#define DECLARE_PORT_IS_PRESENT_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_is_present, S_IRUGO, show_present, NULL, PORT##PORT1##_PRESENT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_is_present, S_IRUGO, show_present, NULL, PORT##PORT2##_PRESENT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_is_present, S_IRUGO, show_present, NULL, PORT##PORT3##_PRESENT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_is_present, S_IRUGO, show_present, NULL, PORT##PORT4##_PRESENT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_is_present, S_IRUGO, show_present, NULL, PORT##PORT5##_PRESENT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_is_present, S_IRUGO, show_present, NULL, PORT##PORT6##_PRESENT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_is_present, S_IRUGO, show_present, NULL, PORT##PORT7##_PRESENT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_is_present, S_IRUGO, show_present, NULL, PORT##PORT8##_PRESENT); +#define DECLARE_PORT_IS_PRESENT_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + &sensor_dev_attr_sfp##PORT1##_is_present.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_is_present.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_is_present.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_is_present.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_is_present.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_is_present.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_is_present.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_is_present.dev_attr.attr, +DECLARE_PORT_IS_PRESENT_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_IS_PRESENT_SENSOR_DEVICE_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + +#define DECLARE_PORT_TYPE_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT1##_TYPE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT2##_TYPE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT3##_TYPE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT4##_TYPE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT5##_TYPE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT6##_TYPE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT7##_TYPE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_port_type, S_IRUGO, show_port_type, NULL, PORT##PORT8##_TYPE); +#define DECLARE_PORT_TYPE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) &sensor_dev_attr_sfp##PORT1##_port_type.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_port_type.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_port_type.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_port_type.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_port_type.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_port_type.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_port_type.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_port_type.dev_attr.attr, +DECLARE_PORT_TYPE_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TYPE_SENSOR_DEVICE_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + +#define DECLARE_PORT_RESET_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT1##_RESET); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT2##_RESET); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT3##_RESET); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT4##_RESET); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT5##_RESET); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT6##_RESET); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT7##_RESET); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_port_reset, S_IWUSR | S_IRUGO, show_port_reset, sfp_set_port_reset, PORT##PORT8##_RESET); +#define DECLARE_PORT_RESET_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) &sensor_dev_attr_sfp##PORT1##_port_reset.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_port_reset.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_port_reset.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_port_reset.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_port_reset.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_port_reset.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_port_reset.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_port_reset.dev_attr.attr, +DECLARE_PORT_RESET_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_RESET_SENSOR_DEVICE_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + +/* QSFP attributes for sysfs */ +#define DECLARE_PORT_RX_LOSn_SENSOR_DEVICE_ATTR(INDEX, PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT1##_RX_LOS##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT2##_RX_LOS##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT3##_RX_LOS##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT4##_RX_LOS##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT5##_RX_LOS##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT6##_RX_LOS##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT7##_RX_LOS##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_rx_los##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT8##_RX_LOS##INDEX); +#define DECLARE_PORT_RX_LOSn_ATTR(INDEX, PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + &sensor_dev_attr_sfp##PORT1##_rx_los##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_rx_los##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_rx_los##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_rx_los##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_rx_los##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_rx_los##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_rx_los##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_rx_los##INDEX.dev_attr.attr, +DECLARE_PORT_RX_LOSn_SENSOR_DEVICE_ATTR(1, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_RX_LOSn_SENSOR_DEVICE_ATTR(1, 9, 10, 11, 12, 13, 14, 15, 16) +DECLARE_PORT_RX_LOSn_SENSOR_DEVICE_ATTR(2, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_RX_LOSn_SENSOR_DEVICE_ATTR(2, 9, 10, 11, 12, 13, 14, 15, 16) +DECLARE_PORT_RX_LOSn_SENSOR_DEVICE_ATTR(3, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_RX_LOSn_SENSOR_DEVICE_ATTR(3, 9, 10, 11, 12, 13, 14, 15, 16) +DECLARE_PORT_RX_LOSn_SENSOR_DEVICE_ATTR(4, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_RX_LOSn_SENSOR_DEVICE_ATTR(4, 9, 10, 11, 12, 13, 14, 15, 16) + +#define DECLARE_PORT_TX_DISABLEn_SENSOR_DEVICE_ATTR(INDEX, PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT1##_TX_DISABLE##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT2##_TX_DISABLE##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT3##_TX_DISABLE##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT4##_TX_DISABLE##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT5##_TX_DISABLE##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT6##_TX_DISABLE##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT7##_TX_DISABLE##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_tx_disable##INDEX, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, PORT##PORT8##_TX_DISABLE##INDEX); + +#define DECLARE_PORT_TX_DISABLEn_ATTR(INDEX, PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + &sensor_dev_attr_sfp##PORT1##_tx_disable##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_tx_disable##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_tx_disable##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_tx_disable##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_tx_disable##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_tx_disable##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_tx_disable##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_tx_disable##INDEX.dev_attr.attr, +DECLARE_PORT_TX_DISABLEn_SENSOR_DEVICE_ATTR(1, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TX_DISABLEn_SENSOR_DEVICE_ATTR(1, 9, 10, 11, 12, 13, 14, 15, 16) +DECLARE_PORT_TX_DISABLEn_SENSOR_DEVICE_ATTR(2, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TX_DISABLEn_SENSOR_DEVICE_ATTR(2, 9, 10, 11, 12, 13, 14, 15, 16) +DECLARE_PORT_TX_DISABLEn_SENSOR_DEVICE_ATTR(3, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TX_DISABLEn_SENSOR_DEVICE_ATTR(3, 9, 10, 11, 12, 13, 14, 15, 16) +DECLARE_PORT_TX_DISABLEn_SENSOR_DEVICE_ATTR(4, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TX_DISABLEn_SENSOR_DEVICE_ATTR(4, 9, 10, 11, 12, 13, 14, 15, 16) + +#define DECLARE_PORT_TX_FAULTn_SENSOR_DEVICE_ATTR(INDEX, PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT1##_TX_FAULT##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT2##_TX_FAULT##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT3##_TX_FAULT##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT4##_TX_FAULT##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT5##_TX_FAULT##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT6##_TX_FAULT##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT7##_TX_FAULT##INDEX); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_tx_fault##INDEX, S_IRUGO, qsfp_show_tx_rx_status, NULL, PORT##PORT8##_TX_FAULT##INDEX); +#define DECLARE_PORT_TX_FAULTn_ATTR(INDEX, PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + &sensor_dev_attr_sfp##PORT1##_tx_fault##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_tx_fault##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_tx_fault##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_tx_fault##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_tx_fault##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_tx_fault##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_tx_fault##INDEX.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_tx_fault##INDEX.dev_attr.attr, +DECLARE_PORT_TX_FAULTn_SENSOR_DEVICE_ATTR(1, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TX_FAULTn_SENSOR_DEVICE_ATTR(1, 9, 10, 11, 12, 13, 14, 15, 16) +DECLARE_PORT_TX_FAULTn_SENSOR_DEVICE_ATTR(2, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TX_FAULTn_SENSOR_DEVICE_ATTR(2, 9, 10, 11, 12, 13, 14, 15, 16) +DECLARE_PORT_TX_FAULTn_SENSOR_DEVICE_ATTR(3, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TX_FAULTn_SENSOR_DEVICE_ATTR(3, 9, 10, 11, 12, 13, 14, 15, 16) +DECLARE_PORT_TX_FAULTn_SENSOR_DEVICE_ATTR(4, 1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_TX_FAULTn_SENSOR_DEVICE_ATTR(4, 9, 10, 11, 12, 13, 14, 15, 16) + +#define DECLARE_PORT_EEPROMn_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT1##_EEPROM); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT2##_EEPROM); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT3##_EEPROM); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT4##_EEPROM); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT5##_EEPROM); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT6##_EEPROM); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT7##_EEPROM); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_eeprom, S_IRUGO, qsfp_show_eeprom, NULL, PORT##PORT8##_EEPROM); +#define DECLARE_PORT_EEPROMTn_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + &sensor_dev_attr_sfp##PORT1##_eeprom.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_eeprom.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_eeprom.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_eeprom.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_eeprom.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_eeprom.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_eeprom.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_eeprom.dev_attr.attr, +DECLARE_PORT_EEPROMn_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_PORT_EEPROMn_SENSOR_DEVICE_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + +static struct attribute *qsfp_attributes[] = { + DECLARE_PORT_NUMBER_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_NUMBER_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_TYPE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TYPE_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_IS_PRESENT_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_IS_PRESENT_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_RESET_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_RESET_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_RX_LOSn_ATTR(1, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_RX_LOSn_ATTR(1, 9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_RX_LOSn_ATTR(2, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_RX_LOSn_ATTR(2, 9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_RX_LOSn_ATTR(3, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_RX_LOSn_ATTR(3, 9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_RX_LOSn_ATTR(4, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_RX_LOSn_ATTR(4, 9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_TX_DISABLEn_ATTR(1, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_DISABLEn_ATTR(1, 9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_TX_DISABLEn_ATTR(2, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_DISABLEn_ATTR(2, 9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_TX_DISABLEn_ATTR(3, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_DISABLEn_ATTR(3, 9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_TX_DISABLEn_ATTR(4, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_DISABLEn_ATTR(4, 9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_TX_FAULTn_ATTR(1, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_FAULTn_ATTR(1, 9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_TX_FAULTn_ATTR(2, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_FAULTn_ATTR(2, 9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_TX_FAULTn_ATTR(3, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_FAULTn_ATTR(3, 9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_TX_FAULTn_ATTR(4, 1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TX_FAULTn_ATTR(4, 9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_EEPROMTn_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_EEPROMTn_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + NULL +}; + + +/* SFP msa attributes for sysfs */ +static struct attribute *sfp_msa_attributes[] = { + DECLARE_PORT_NUMBER_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_NUMBER_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_TYPE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_TYPE_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_IS_PRESENT_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_IS_PRESENT_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_PORT_RESET_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_PORT_RESET_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + NULL +}; + +/* SFP ddm attributes for sysfs */ +#define DECLARE_RX_LOS_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT1##_RX_LOS); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT2##_RX_LOS); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT3##_RX_LOS); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT4##_RX_LOS); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT5##_RX_LOS); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT6##_RX_LOS); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT7##_RX_LOS); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT8##_RX_LOS); +#define DECLARE_RX_LOS_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) &sensor_dev_attr_sfp##PORT1##_rx_los.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_rx_los.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_rx_los.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_rx_los.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_rx_los.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_rx_los.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_rx_los.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_rx_los.dev_attr.attr, +DECLARE_RX_LOS_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_RX_LOS_SENSOR_DEVICE_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + +#define DECLARE_TX_DISABLE_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT1##_TX_DISABLE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT2##_TX_DISABLE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT3##_TX_DISABLE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT4##_TX_DISABLE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT5##_TX_DISABLE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT6##_TX_DISABLE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT7##_TX_DISABLE); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, PORT##PORT8##_TX_DISABLE); +#define DECLARE_TX_DISABLE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) &sensor_dev_attr_sfp##PORT1##_tx_disable.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_tx_disable.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_tx_disable.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_tx_disable.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_tx_disable.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_tx_disable.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_tx_disable.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_tx_disable.dev_attr.attr, +DECLARE_TX_DISABLE_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_TX_DISABLE_SENSOR_DEVICE_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + +#define DECLARE_TX_FAULT_SENSOR_DEVICE_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) \ + static SENSOR_DEVICE_ATTR(sfp##PORT1##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT1##_TX_FAULT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT2##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT2##_TX_FAULT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT3##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT3##_TX_FAULT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT4##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT4##_TX_FAULT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT5##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT5##_TX_FAULT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT6##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT6##_TX_FAULT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT7##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT7##_TX_FAULT); \ + static SENSOR_DEVICE_ATTR(sfp##PORT8##_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, PORT##PORT8##_TX_FAULT); +#define DECLARE_TX_FAULT_ATTR(PORT1, PORT2, PORT3, PORT4, PORT5, PORT6, PORT7, PORT8) &sensor_dev_attr_sfp##PORT1##_tx_fault.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT2##_tx_fault.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT3##_tx_fault.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT4##_tx_fault.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT5##_tx_fault.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT6##_tx_fault.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT7##_tx_fault.dev_attr.attr, \ + &sensor_dev_attr_sfp##PORT8##_tx_fault.dev_attr.attr, +DECLARE_TX_FAULT_SENSOR_DEVICE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) +DECLARE_TX_FAULT_SENSOR_DEVICE_ATTR(9, 10, 11, 12, 13, 14, 15, 16) +static struct attribute *sfp_ddm_attributes[] = { + DECLARE_RX_LOS_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_RX_LOS_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_TX_DISABLE_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_TX_DISABLE_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + DECLARE_TX_FAULT_ATTR(1, 2, 3, 4, 5, 6, 7, 8) + DECLARE_TX_FAULT_ATTR(9, 10, 11, 12, 13, 14, 15, 16) + NULL +}; + +static ssize_t sfp_eeprom_write(struct i2c_client *client, u8 command, const char *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int result, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + result = i2c_smbus_write_i2c_block_data(client, command, data_len, data); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) { + return result; + } + + return data_len; +#else + int result, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + result = i2c_smbus_write_byte_data(client, command, *data); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) { + return result; + } + + return 1; +#endif + + +} + + +static ssize_t sfp_port_write(struct sfp_port_data *data, + const char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + return count; + } + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_write(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; +} + + +static ssize_t sfp_bin_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct sfp_port_data *data; + DEBUG_PRINT("offset = (%d), count = (%d)", (int)off, (int)count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + return sfp_port_write(data, buf, off, count); +} + +static ssize_t sfp_eeprom_read(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int result, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + /* result = data_len; */ + +abort: + return result; +#else + int result, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + result = i2c_smbus_read_byte_data(client, command); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) { + dev_dbg(&client->dev, "sfp read byte data failed, command(0x%2x), data(0x%2x)\r\n", command, result); + goto abort; + } + + *data = (u8)result; + result = 1; + +abort: + return result; +#endif +} + +static ssize_t sfp_port_read(struct sfp_port_data *data, + char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + DEBUG_PRINT("Count = 0, return"); + return count; + } + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_read(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; + +} + +static ssize_t sfp_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct sfp_port_data *data; + DEBUG_PRINT("offset = (%d), count = (%d)", (int)off, (int)count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + return sfp_port_read(data, buf, off, count); +} + +static int sfp_sysfs_eeprom_init(struct kobject *kobj, struct bin_attribute *eeprom) +{ + int err; + + sysfs_bin_attr_init(eeprom); + eeprom->attr.name = EEPROM_NAME; + eeprom->attr.mode = S_IWUSR | S_IRUGO; + eeprom->read = sfp_bin_read; + eeprom->write = sfp_bin_write; + eeprom->size = EEPROM_SIZE; + + /* Create eeprom file */ + err = sysfs_create_bin_file(kobj, eeprom); + if (err) { + return err; + } + + return 0; +} + +static int sfp_sysfs_eeprom_cleanup(struct kobject *kobj, struct bin_attribute *eeprom) +{ + sysfs_remove_bin_file(kobj, eeprom); + return 0; +} + +static const struct attribute_group sfp_msa_group = { + .attrs = sfp_msa_attributes, +}; + +static int sfp_i2c_check_functionality(struct i2c_client *client) +{ +#if USE_I2C_BLOCK_READ + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK); +#else + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA); +#endif +} + +static int sfp_msa_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct sfp_msa_data **data) +{ + int status; + struct sfp_msa_data *msa; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + msa = kzalloc(sizeof(struct sfp_msa_data), GFP_KERNEL); + if (!msa) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &sfp_msa_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &msa->eeprom.bin); + if (status) { + dev_info(&client->dev, "sfp msa '%s' (sfp_sysfs_eeprom_init fail...)\n", client->name); + /* goto exit_remove; */ + } + + *data = msa; + dev_info(&client->dev, "sfp msa '%s'\n", client->name); + + return 0; + +/* exit_remove: */ + sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); +exit_free: + kfree(msa); +exit: + + return status; +} + +static const struct attribute_group sfp_ddm_group = { + .attrs = sfp_ddm_attributes, +}; + +static int sfp_ddm_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct sfp_ddm_data **data) +{ + int status; + struct sfp_ddm_data *ddm; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + ddm = kzalloc(sizeof(struct sfp_ddm_data), GFP_KERNEL); + if (!ddm) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &sfp_ddm_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &ddm->eeprom.bin); + if (status) { + goto exit_remove; + } + + *data = ddm; + dev_info(&client->dev, "sfp ddm '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &sfp_ddm_group); +exit_free: + kfree(ddm); +exit: + + return status; +} + +static const struct attribute_group qsfp_group = { + .attrs = qsfp_attributes, +}; + +static int qsfp_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct qsfp_data **data) +{ + int status; + struct qsfp_data *qsfp; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + qsfp = kzalloc(sizeof(struct qsfp_data), GFP_KERNEL); + if (!qsfp) { + status = -ENOMEM; + goto exit; + } + + if ((client->addr == SFP_CPLD_I2C_ADDR) || (client->addr == SFP_PCA9506_I2C_ADDR)){ + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &qsfp_group); + if (status) { + goto exit_free; + } + } + + if (client->addr == SFP_EEPROM_A0_I2C_ADDR){ + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &qsfp->eeprom.bin); + if (status) { + goto exit_remove; + } + } + + /* Bring QSFPs out of reset */ + + *data = qsfp; + dev_info(&client->dev, "qsfp '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &qsfp_group); +exit_free: + kfree(qsfp); +exit: + + return status; +} + +static int sfp_device_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct sfp_port_data *data = NULL; + + data = kzalloc(sizeof(struct sfp_port_data), GFP_KERNEL); + if (!data) { + return -ENOMEM; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->port = dev_id->driver_data; + data->client = client; + + DEBUG_PRINT("data->port:%d client->addr:0x%0x\n", data->port, client->addr); + if ((client->addr == SFP_CPLD_I2C_ADDR) || (client->addr == SFP_PCA9506_I2C_ADDR)){ + if(data->port >= SFPPLUS_1_PORT_NUMBER){ + if(client->addr != SFP_PCA9506_I2C_ADDR){ + DEBUG_PRINT("client->addr:0x%0x\n", client->addr); + return -ENODEV; + } + } + else if(client->addr != SFP_CPLD_I2C_ADDR){ + DEBUG_PRINT("client->addr:0x%0x\n", client->addr); + return -ENODEV; + } + } + + data->driver_type = DRIVER_TYPE_QSFP; + return qsfp_probe(client, dev_id, &data->qsfp); +} + +static int sfp_msa_remove(struct i2c_client *client, struct sfp_msa_data *data) +{ + if (client->addr == SFP_EEPROM_A0_I2C_ADDR) + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + if ((client->addr == SFP_CPLD_I2C_ADDR) || (client->addr == SFP_PCA9506_I2C_ADDR)) + sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); + kfree(data); + return 0; +} + +static int sfp_ddm_remove(struct i2c_client *client, struct sfp_ddm_data *data) +{ + if (client->addr == SFP_EEPROM_A0_I2C_ADDR) + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + if ((client->addr == SFP_CPLD_I2C_ADDR) || (client->addr == SFP_PCA9506_I2C_ADDR)) + sysfs_remove_group(&client->dev.kobj, &sfp_ddm_group); + kfree(data); + return 0; +} + +static int qfp_remove(struct i2c_client *client, struct qsfp_data *data) +{ + if (client->addr == SFP_EEPROM_A0_I2C_ADDR) + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + if ((client->addr == SFP_CPLD_I2C_ADDR) || (client->addr == SFP_PCA9506_I2C_ADDR)) + sysfs_remove_group(&client->dev.kobj, &qsfp_group); + kfree(data); + return 0; +} + +static int sfp_device_remove(struct i2c_client *client) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + + switch (data->driver_type) { + case DRIVER_TYPE_SFP_MSA: + return sfp_msa_remove(client, data->msa); + case DRIVER_TYPE_SFP_DDM: + return sfp_ddm_remove(client, data->ddm); + case DRIVER_TYPE_QSFP: + return qfp_remove(client, data->qsfp); + } + + return 0; +} + +static struct i2c_driver sfp_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = sfp_device_probe, + .remove = sfp_device_remove, + .id_table = sfp_device_id, + .address_list = normal_i2c, +}; + +static int __init sfp_init(void) +{ + return i2c_add_driver(&sfp_driver); +} + +static void __exit sfp_exit(void) +{ + i2c_del_driver(&sfp_driver); +} + +MODULE_AUTHOR("Philip Wang "); +MODULE_DESCRIPTION("alphanetworks snh60b0-640f driver"); +MODULE_LICENSE("GPL"); + +module_init(sfp_init); +module_exit(sfp_exit); + diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/snh60b0-640f_onie_eeprom.c b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/snh60b0-640f_onie_eeprom.c new file mode 100644 index 00000000000..f259abdca8f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/snh60b0-640f_onie_eeprom.c @@ -0,0 +1,268 @@ +/* + * A driver for snh60b0-640f onie eeprom + * + * Copyright (C) 2018 Alphanetworks Technology Corporation. + * Robin Chen + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * see + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define EEPROM_SIZE 256 + +#define SYS_LED_REG 0x8 +#define FAN12_LED_REG 0x9 +#define FAN34_LED_REG 0xA +#define FAN56_LED_REG 0xB +#define SYS_RESET1_REG 0x2 + +#define SYS_LOCATOR_LED_BITS 0x01 +#define SYS_PWR_LED_BITS 0x0E +#define SYS_STATUS_LED_BITS 0x70 +#define FAN135_LED_BITS 0x07 +#define FAN246_LED_BITS 0x38 + + +extern int alpha_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int alpha_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t onie_read(struct device *dev, struct device_attribute *attr, char *buf); +static ssize_t onie_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count); + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +/* Addresses scanned for snh60b0-640f_onie_eeprom */ +static const unsigned short normal_i2c[] = { 0x56, I2C_CLIENT_END }; + + +enum sysfs_onie_attributes { + ONIE_RW, +}; + +static SENSOR_DEVICE_ATTR(eeprom, (0660), onie_read, onie_write, ONIE_RW); + +static struct attribute *snh60b0_onie_attributes[] = { + &sensor_dev_attr_eeprom.dev_attr.attr, + NULL +}; + +static const struct attribute_group snh60b0_onie_group = { + .attrs = snh60b0_onie_attributes, +}; + + +static ssize_t onie_read(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0, res = 0; + u8 command; + struct i2c_client *client = to_i2c_client(dev); + __u8 read_write; + unsigned short offset = 0; + union i2c_smbus_data temp; + char rbuf[EEPROM_SIZE]; + + for( offset=0 ; offset < EEPROM_SIZE ; ++offset ) + { + read_write = I2C_SMBUS_WRITE; + offset = offset & 0x3fff; + temp.byte = (u8)offset; + res = i2c_smbus_xfer(client->adapter, client->addr, client->flags=0, + read_write, 0, 2, &temp); + res = i2c_smbus_xfer(client->adapter, client->addr, client->flags=0, + read_write, 0, 2, &temp); + + read_write = I2C_SMBUS_READ; + temp.byte = 0xaa; + res = i2c_smbus_xfer(client->adapter, client->addr, client->flags=0, + read_write, 0, 1, &temp); + if (!res) + { + res = temp.byte; + rbuf[offset] = (char)temp.byte; + } + + read_write = I2C_SMBUS_READ; + temp.byte = 0xbb; + res = i2c_smbus_xfer(client->adapter, client->addr, client->flags=0, + read_write, 0, 1, &temp); + if (!res) + { + res = temp.byte; + } + } + + memcpy(buf, rbuf, EEPROM_SIZE); + return EEPROM_SIZE; +} + +static ssize_t onie_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int error, write, command, read; + + error = kstrtoint(buf, 10, &write); + if (error) + return error; + + if (write < 0 || write > 255) + return -EINVAL; + + /* Not support yet */ + + return count; +} + + + +static void alpha_i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void alpha_i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int onie_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + status = sysfs_create_group(&client->dev.kobj, &snh60b0_onie_group); + if (status) { + goto exit; + } + + dev_info(&client->dev, "chip found\n"); + alpha_i2c_cpld_add_client(client); + + return 0; + +exit: + return status; +} + +static int onie_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_group(&client->dev.kobj, &snh60b0_onie_group); + alpha_i2c_cpld_remove_client(client); + + return 0; +} + +static const struct i2c_device_id onie_eeprom_id[] = { + { "snh60b0_onie_eeprom", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, onie_eeprom_id); + +static struct i2c_driver onie_eeprom_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "snh60b0_onie_eeprom", + }, + .probe = onie_eeprom_probe, + .remove = onie_eeprom_remove, + .id_table = onie_eeprom_id, + .address_list = normal_i2c, +}; + + +static int __init onie_eeprom_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&onie_eeprom_driver); +} + +static void __exit onie_eeprom_exit(void) + +{ + i2c_del_driver(&onie_eeprom_driver); +} + + +MODULE_AUTHOR("Alpha-SID6"); +MODULE_DESCRIPTION("onie eeprom driver"); +MODULE_LICENSE("GPL"); + +module_init(onie_eeprom_init); +module_exit(onie_eeprom_exit); diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/snh60b0-640f_power_cpld.c b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/snh60b0-640f_power_cpld.c new file mode 100644 index 00000000000..00b8779ad50 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/snh60b0-640f_power_cpld.c @@ -0,0 +1,501 @@ +/* + * A hwmon driver for the snh60b0-640f_power_cpld + * + * Copyright (C) 2018 Alphanetworks Technology Corporation. + * Robin Chen + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * see + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define DRIVER_NAME "snh60b0_power_cpld" +#define PSU1_STATUS_REG 0x3 +#define PSU2_STATUS_REG 0x4 +#define FAN_PWM_REG 0x23 + +#define PSU_PRESENT_BIT 0x4 +#define PSU_POWER_BIT 0x2 +#define FAN_PRESENT_BIT 0x2 + + +static ssize_t psu_show_status(struct device *dev, struct device_attribute *attr, char *buf); +static ssize_t fan_pwm_show(struct device *dev, struct device_attribute *attr, char *buf); +static ssize_t set_fan_pwm(struct device *dev, struct device_attribute *attr, const char *buf, size_t count); +static ssize_t fan_show_status(struct device *dev, struct device_attribute *attr, char *buf); + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +/* Addresses scanned for snh60b0-640f_power_cpld */ +static const unsigned short normal_i2c[] = { 0x5E, I2C_CLIENT_END }; + +struct snh60b0_pwr_cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; + char model_name[9]; /* Model name, read from eeprom */ +}; + + +enum sysfs_psu_attributes { + PSU1_PRESENT, + PSU2_PRESENT, + PSU1_POWER_GOOD, + PSU2_POWER_GOOD, + FAN_PWM, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + /* FAN5_FAULT, */ + /* FAN6_FAULT, */ + FAN1_PRESENT=0x12, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + /* FAN5_PRESENT, */ + /* FAN6_PRESENT, */ + FAN1_FRONT_SPEED_RPM=0x1A, + FAN1_REAR_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + /* FAN5_FRONT_SPEED_RPM, */ + /* FAN5_REAR_SPEED_RPM, */ + /* FAN6_FRONT_SPEED_RPM, */ + /* FAN6_REAR_SPEED_RPM, */ +}; + +static SENSOR_DEVICE_ATTR(psu1_present, S_IRUGO, psu_show_status, NULL, PSU1_PRESENT); +static SENSOR_DEVICE_ATTR(psu2_present, S_IRUGO, psu_show_status, NULL, PSU2_PRESENT); +static SENSOR_DEVICE_ATTR(psu1_power_good, S_IRUGO, psu_show_status, NULL, PSU1_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu2_power_good, S_IRUGO, psu_show_status, NULL, PSU2_POWER_GOOD); +static SENSOR_DEVICE_ATTR(fan_pwm, (0660), fan_pwm_show, set_fan_pwm, FAN_PWM); +static SENSOR_DEVICE_ATTR(fan1_present, S_IRUGO, fan_show_status, NULL, FAN1_PRESENT); +static SENSOR_DEVICE_ATTR(fan2_present, S_IRUGO, fan_show_status, NULL, FAN2_PRESENT); +static SENSOR_DEVICE_ATTR(fan3_present, S_IRUGO, fan_show_status, NULL, FAN3_PRESENT); +static SENSOR_DEVICE_ATTR(fan4_present, S_IRUGO, fan_show_status, NULL, FAN4_PRESENT); +/* static SENSOR_DEVICE_ATTR(fan5_present, S_IRUGO, fan_show_status, NULL, FAN5_PRESENT); */ +/* static SENSOR_DEVICE_ATTR(fan6_present, S_IRUGO, fan_show_status, NULL, FAN6_PRESENT); */ +static SENSOR_DEVICE_ATTR(fan1_front_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN1_FRONT_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan2_front_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN2_FRONT_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan3_front_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN3_FRONT_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan4_front_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN4_FRONT_SPEED_RPM); +/* static SENSOR_DEVICE_ATTR(fan5_front_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN5_FRONT_SPEED_RPM); */ +/* static SENSOR_DEVICE_ATTR(fan6_front_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN6_FRONT_SPEED_RPM); */ +static SENSOR_DEVICE_ATTR(fan1_rear_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN1_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan2_rear_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN2_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan3_rear_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN3_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan4_rear_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN4_REAR_SPEED_RPM); +/* static SENSOR_DEVICE_ATTR(fan5_rear_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN5_REAR_SPEED_RPM); */ +/* static SENSOR_DEVICE_ATTR(fan6_rear_speed_rpm, S_IRUGO, fan_show_status, NULL, FAN6_REAR_SPEED_RPM); */ +static SENSOR_DEVICE_ATTR(fan1_fault, S_IRUGO, fan_show_status, NULL, FAN1_FAULT); static SENSOR_DEVICE_ATTR(fan11_fault, S_IRUGO, fan_show_status, NULL, FAN1_FAULT); +static SENSOR_DEVICE_ATTR(fan2_fault, S_IRUGO, fan_show_status, NULL, FAN2_FAULT); static SENSOR_DEVICE_ATTR(fan12_fault, S_IRUGO, fan_show_status, NULL, FAN2_FAULT); +static SENSOR_DEVICE_ATTR(fan3_fault, S_IRUGO, fan_show_status, NULL, FAN3_FAULT); static SENSOR_DEVICE_ATTR(fan13_fault, S_IRUGO, fan_show_status, NULL, FAN3_FAULT); +static SENSOR_DEVICE_ATTR(fan4_fault, S_IRUGO, fan_show_status, NULL, FAN4_FAULT); static SENSOR_DEVICE_ATTR(fan14_fault, S_IRUGO, fan_show_status, NULL, FAN4_FAULT); +/* static SENSOR_DEVICE_ATTR(fan5_fault, S_IRUGO, fan_show_status, NULL, FAN5_FAULT); static SENSOR_DEVICE_ATTR(fan15_fault, S_IRUGO, fan_show_status, NULL, FAN5_FAULT); */ +/* static SENSOR_DEVICE_ATTR(fan6_fault, S_IRUGO, fan_show_status, NULL, FAN6_FAULT); static SENSOR_DEVICE_ATTR(fan16_fault, S_IRUGO, fan_show_status, NULL, FAN6_FAULT); */ +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, fan_show_status, NULL, FAN1_FRONT_SPEED_RPM); static SENSOR_DEVICE_ATTR(fan11_input, S_IRUGO, fan_show_status, NULL, FAN1_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, fan_show_status, NULL, FAN2_FRONT_SPEED_RPM); static SENSOR_DEVICE_ATTR(fan12_input, S_IRUGO, fan_show_status, NULL, FAN2_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, fan_show_status, NULL, FAN3_FRONT_SPEED_RPM); static SENSOR_DEVICE_ATTR(fan13_input, S_IRUGO, fan_show_status, NULL, FAN3_REAR_SPEED_RPM); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, fan_show_status, NULL, FAN4_FRONT_SPEED_RPM); static SENSOR_DEVICE_ATTR(fan14_input, S_IRUGO, fan_show_status, NULL, FAN4_REAR_SPEED_RPM); +/* static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, fan_show_status, NULL, FAN5_FRONT_SPEED_RPM); static SENSOR_DEVICE_ATTR(fan15_input, S_IRUGO, fan_show_status, NULL, FAN5_REAR_SPEED_RPM); */ +/* static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, fan_show_status, NULL, FAN6_FRONT_SPEED_RPM); static SENSOR_DEVICE_ATTR(fan16_input, S_IRUGO, fan_show_status, NULL, FAN6_REAR_SPEED_RPM); */ + + +static struct attribute *snh60b0_psu_attributes[] = { + &sensor_dev_attr_psu1_present.dev_attr.attr, + &sensor_dev_attr_psu2_present.dev_attr.attr, + &sensor_dev_attr_psu1_power_good.dev_attr.attr, + &sensor_dev_attr_psu2_power_good.dev_attr.attr, + &sensor_dev_attr_fan_pwm.dev_attr.attr, + &sensor_dev_attr_fan1_present.dev_attr.attr, + &sensor_dev_attr_fan2_present.dev_attr.attr, + &sensor_dev_attr_fan3_present.dev_attr.attr, + &sensor_dev_attr_fan4_present.dev_attr.attr, + /* &sensor_dev_attr_fan5_present.dev_attr.attr, */ + /* &sensor_dev_attr_fan6_present.dev_attr.attr, */ + &sensor_dev_attr_fan1_front_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_front_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_front_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_front_speed_rpm.dev_attr.attr, + /* &sensor_dev_attr_fan5_front_speed_rpm.dev_attr.attr, */ + /* &sensor_dev_attr_fan6_front_speed_rpm.dev_attr.attr, */ + &sensor_dev_attr_fan1_rear_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_rear_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_rear_speed_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_rear_speed_rpm.dev_attr.attr, + /* &sensor_dev_attr_fan5_rear_speed_rpm.dev_attr.attr, */ + /* &sensor_dev_attr_fan6_rear_speed_rpm.dev_attr.attr, */ + &sensor_dev_attr_fan1_fault.dev_attr.attr, &sensor_dev_attr_fan11_fault.dev_attr.attr, + &sensor_dev_attr_fan2_fault.dev_attr.attr, &sensor_dev_attr_fan12_fault.dev_attr.attr, + &sensor_dev_attr_fan3_fault.dev_attr.attr, &sensor_dev_attr_fan13_fault.dev_attr.attr, + &sensor_dev_attr_fan4_fault.dev_attr.attr, &sensor_dev_attr_fan14_fault.dev_attr.attr, + /* &sensor_dev_attr_fan5_fault.dev_attr.attr, &sensor_dev_attr_fan15_fault.dev_attr.attr, */ + /* &sensor_dev_attr_fan6_fault.dev_attr.attr, &sensor_dev_attr_fan16_fault.dev_attr.attr, */ + &sensor_dev_attr_fan1_input.dev_attr.attr, &sensor_dev_attr_fan11_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, &sensor_dev_attr_fan12_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, &sensor_dev_attr_fan13_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, &sensor_dev_attr_fan14_input.dev_attr.attr, + /* &sensor_dev_attr_fan5_input.dev_attr.attr, &sensor_dev_attr_fan15_input.dev_attr.attr, */ + /* &sensor_dev_attr_fan6_input.dev_attr.attr, &sensor_dev_attr_fan16_input.dev_attr.attr, */ + NULL +}; + +static const struct attribute_group snh60b0_psu_group = { + .attrs = snh60b0_psu_attributes, +}; + + +static ssize_t psu_show_status(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0, res = 0; + u8 command; + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *sda = to_sensor_dev_attr(attr); + + switch(sda->index) { + case PSU1_PRESENT: + case PSU1_POWER_GOOD: + command = PSU1_STATUS_REG; + break; + case PSU2_PRESENT: + case PSU2_POWER_GOOD: + command = PSU2_STATUS_REG; + break; + } + + val = i2c_smbus_read_byte_data(client, command); + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + switch(sda->index) { + case PSU1_PRESENT: + case PSU2_PRESENT: + res = (val & PSU_PRESENT_BIT ? 1 : 0 ); + break; + case PSU1_POWER_GOOD: + case PSU2_POWER_GOOD: + res = (val & PSU_POWER_BIT ? 1 : 0 ); + break; + } + + return sprintf(buf, "%d\n", res); +} + +static ssize_t fan_pwm_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, FAN_PWM_REG); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d", val); +} + +static ssize_t set_fan_pwm(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int error, value; + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < 0 || value > 0xFF) + return -EINVAL; + + i2c_smbus_write_byte_data(client, FAN_PWM_REG, value); + + return count; +} + +static ssize_t fan_show_status(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct sensor_device_attribute *sda = to_sensor_dev_attr(attr); + struct i2c_client *client = to_i2c_client(dev); + // struct as7712_32x_fan_data *data = as7712_32x_fan_update_device(dev); + ssize_t ret = 0; + int val, val2; + + switch (sda->index) { + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + /* case FAN5_FRONT_SPEED_RPM: */ + /* case FAN6_FRONT_SPEED_RPM: */ + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + /* case FAN5_REAR_SPEED_RPM: */ + /* case FAN6_REAR_SPEED_RPM: */ + val = i2c_smbus_read_byte_data(client, sda->index); + ret = sprintf(buf, "%d\n", val * 150); + break; + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + /* case FAN5_PRESENT: */ + /* case FAN6_PRESENT: */ + val = i2c_smbus_read_byte_data(client, sda->index); + ret = sprintf(buf, "%d\n", (val & FAN_PRESENT_BIT) ? 1 : 0); + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + /* case FAN5_FAULT: */ + /* case FAN6_FAULT: */ + val = i2c_smbus_read_byte_data(client, (sda->index - FAN1_FAULT)*2 + FAN1_FRONT_SPEED_RPM); + val2 = i2c_smbus_read_byte_data(client, (sda->index - FAN1_FAULT)*2 + FAN1_REAR_SPEED_RPM); + ret = sprintf(buf, "%d\n", (val|val2) ? 0 : 1); + break; + default: + break; + } + + return ret; +} + + +static void alpha_i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void alpha_i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int alpha_i2c_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct snh60b0_pwr_cpld_data* data; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct snh60b0_pwr_cpld_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + status = sysfs_create_group(&client->dev.kobj, &snh60b0_psu_group); + if (status) { + goto exit; + } + + dev_info(&client->dev, "chip found\n"); + alpha_i2c_cpld_add_client(client); + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit; + } + + dev_info(&client->dev, "%s: pwr_cpld '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit: + return status; +} + +static int alpha_i2c_cpld_remove(struct i2c_client *client) +{ + struct snh60b0_pwr_cpld_data *data = i2c_get_clientdata(client); + sysfs_remove_group(&client->dev.kobj, &snh60b0_psu_group); + alpha_i2c_cpld_remove_client(client); + kfree(data); + + return 0; +} + +static const struct i2c_device_id alpha_i2c_cpld_id[] = { + { DRIVER_NAME, 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, alpha_i2c_cpld_id); + +static struct i2c_driver alpha_i2c_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRIVER_NAME, + }, + .probe = alpha_i2c_cpld_probe, + .remove = alpha_i2c_cpld_remove, + .id_table = alpha_i2c_cpld_id, + .address_list = normal_i2c, +}; + +int alpha_i2c_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_read_byte_data(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(alpha_i2c_cpld_read); + +int alpha_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_write_byte_data(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(alpha_i2c_cpld_write); + +static int __init alpha_i2c_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&alpha_i2c_cpld_driver); +} + +static void __exit alpha_i2c_cpld_exit(void) +{ + i2c_del_driver(&alpha_i2c_cpld_driver); +} + +static struct dmi_system_id snh60b0_dmi_table[] = { + { + .ident = "Alpha snh60b0-640f", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Alpha"), + DMI_MATCH(DMI_PRODUCT_NAME, "snh60b0-640f"), + }, + } +}; + +int platform_alpha_snh60b0(void) +{ + return dmi_check_system(snh60b0_dmi_table); +} +EXPORT_SYMBOL(platform_alpha_snh60b0); + +MODULE_AUTHOR("Alpha-SID6"); +MODULE_DESCRIPTION("alpha_power_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(alpha_i2c_cpld_init); +module_exit(alpha_i2c_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/snh60b0-640f_system_cpld.c b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/snh60b0-640f_system_cpld.c new file mode 100644 index 00000000000..ddba09370ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/modules/snh60b0-640f_system_cpld.c @@ -0,0 +1,365 @@ +/* + * A hwmon driver for the snh60b0-640f_system_cpld + * + * Copyright (C) 2018 Alphanetworks Technology Corporation. + * Robin Chen + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * see + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define SYS_LED_REG 0x8 +#define FAN12_LED_REG 0x9 +#define FAN34_LED_REG 0xA +#define SYS_RESET1_REG 0x2 +#define SWI_CTRL_REG 0x4 + +#define SYS_LOCATOR_LED_BITS 0x01 +#define SYS_PWR_LED_BITS 0x0E +#define SYS_STATUS_LED_BITS 0x70 +#define FAN135_LED_BITS 0x07 +#define FAN246_LED_BITS 0x38 +#define REST_BUTTON_BITS 0x0 + + +extern int alpha_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int alpha_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t sys_led_read(struct device *dev, struct device_attribute *attr, char *buf); +static ssize_t sys_led_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count); + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +/* Addresses scanned for snh60b0-640f_system_cpld */ +static const unsigned short normal_i2c[] = { 0x5F, I2C_CLIENT_END }; + + +enum sysfs_sys_attributes { + SYS_LOCATOR, + SYS_PWR, + SYS_STATUS, + FAN1_LED, + FAN2_LED, + FAN3_LED, + FAN4_LED, + SYS_REST1, + SWI_CTRL, +}; + +static SENSOR_DEVICE_ATTR(sys_locator, (0660), sys_led_read, sys_led_write, SYS_LOCATOR); +static SENSOR_DEVICE_ATTR(sys_pwr, (0660), sys_led_read, sys_led_write, SYS_PWR); +static SENSOR_DEVICE_ATTR(sys_status, (0600), sys_led_read, sys_led_write, SYS_STATUS); +static SENSOR_DEVICE_ATTR(fan1_led, (0660), sys_led_read, sys_led_write, FAN1_LED); +static SENSOR_DEVICE_ATTR(fan2_led, (0660), sys_led_read, sys_led_write, FAN2_LED); +static SENSOR_DEVICE_ATTR(fan3_led, (0660), sys_led_read, sys_led_write, FAN3_LED); +static SENSOR_DEVICE_ATTR(fan4_led, (0660), sys_led_read, sys_led_write, FAN4_LED); +static SENSOR_DEVICE_ATTR(sys_reset1, (0660), sys_led_read, sys_led_write, SYS_REST1); +static SENSOR_DEVICE_ATTR(swi_ctrl, (0660), sys_led_read, NULL, SWI_CTRL); + +static struct attribute *snh60b0_sys_attributes[] = { + &sensor_dev_attr_sys_locator.dev_attr.attr, + &sensor_dev_attr_sys_pwr.dev_attr.attr, + &sensor_dev_attr_sys_status.dev_attr.attr, + &sensor_dev_attr_fan1_led.dev_attr.attr, + &sensor_dev_attr_fan2_led.dev_attr.attr, + &sensor_dev_attr_fan3_led.dev_attr.attr, + &sensor_dev_attr_fan4_led.dev_attr.attr, + &sensor_dev_attr_sys_reset1.dev_attr.attr, + &sensor_dev_attr_swi_ctrl.dev_attr.attr, + NULL +}; + +static const struct attribute_group snh60b0_sys_group = { + .attrs = snh60b0_sys_attributes, +}; + + +static ssize_t sys_led_read(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0, res = 0; + u8 command; + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *sda = to_sensor_dev_attr(attr); + + switch(sda->index) { + case SYS_LOCATOR: + case SYS_PWR: + case SYS_STATUS: + command = SYS_LED_REG; + break; + case FAN1_LED: + case FAN2_LED: + case FAN3_LED: + case FAN4_LED: + command = FAN12_LED_REG + (sda->index - FAN1_LED)/2; + break; + case SYS_REST1: + command = SYS_RESET1_REG; + break; + case SWI_CTRL: + command = SWI_CTRL_REG; + break; + } + + val = i2c_smbus_read_byte_data(client, command); + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + switch(sda->index) { + case SYS_LOCATOR: + res = (val & SYS_LOCATOR_LED_BITS) >> 0; + break; + case SYS_PWR: + res = (val & SYS_PWR_LED_BITS) >> 1; + break; + case SYS_STATUS: + res = (val & SYS_STATUS_LED_BITS) >> 4; + break; + case FAN1_LED: + case FAN3_LED: + res = (val & FAN135_LED_BITS) >> 0; + break; + case FAN2_LED: + case FAN4_LED: + res = (val & FAN246_LED_BITS) >> 3; + break; + case SYS_REST1: + res = val; + break; + case SWI_CTRL: + res = (val & REST_BUTTON_BITS) >> 0; + break; + } + + return sprintf(buf, "%d\n", res); +} + +static ssize_t sys_led_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *sda = to_sensor_dev_attr(attr); + int error, write, command, read; + + error = kstrtoint(buf, 10, &write); + if (error) + return error; + + + switch(sda->index) { + case SYS_LOCATOR: + if(write < 0 || write > 2) + return -EINVAL; + case SYS_PWR: + case SYS_STATUS: + if (write < 0 || write > 7) + return -EINVAL; + command = SYS_LED_REG; + break; + case FAN1_LED: + case FAN2_LED: + case FAN3_LED: + case FAN4_LED: + if (write < 0 || write > 7) + return -EINVAL; + command = FAN12_LED_REG + (sda->index - FAN1_LED)/2; + break; + case SYS_REST1: + if (write < 0 || write > 15) + return -EINVAL; + command = SYS_RESET1_REG; + break; + } + + read = i2c_smbus_read_byte_data(client, command); + if (read < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, read); + } + + switch(sda->index) { + case SYS_LOCATOR: + read &= ~SYS_LOCATOR_LED_BITS; + read |= write << 0; + break; + case SYS_PWR: + read &= ~SYS_PWR_LED_BITS; + read |= write << 1; + break; + case SYS_STATUS: + read &= ~SYS_STATUS_LED_BITS; + read |= write << 4; + break; + case FAN1_LED: + case FAN3_LED: + read &= ~FAN135_LED_BITS; + read |= write << 0; + break; + case FAN2_LED: + case FAN4_LED: + read &= ~FAN246_LED_BITS; + read |= write << 3; + break; + case SYS_REST1: + read = write; + break; + } + + i2c_smbus_write_byte_data(client, command, read); + + return count; +} + + + +static void alpha_i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void alpha_i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int alpha_i2c_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + status = sysfs_create_group(&client->dev.kobj, &snh60b0_sys_group); + if (status) { + goto exit; + } + + dev_info(&client->dev, "chip found\n"); + alpha_i2c_cpld_add_client(client); + + return 0; + +exit: + return status; +} + +static int alpha_i2c_cpld_remove(struct i2c_client *client) +{ + sysfs_remove_group(&client->dev.kobj, &snh60b0_sys_group); + alpha_i2c_cpld_remove_client(client); + + return 0; +} + +static const struct i2c_device_id alpha_i2c_cpld_id[] = { + { "snh60b0_system_cpld", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, alpha_i2c_cpld_id); + +static struct i2c_driver alpha_i2c_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "snh60b0_system_cpld", + }, + .probe = alpha_i2c_cpld_probe, + .remove = alpha_i2c_cpld_remove, + .id_table = alpha_i2c_cpld_id, + .address_list = normal_i2c, +}; + + +static int __init alpha_i2c_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&alpha_i2c_cpld_driver); +} + +static void __exit alpha_i2c_cpld_exit(void) +{ + i2c_del_driver(&alpha_i2c_cpld_driver); +} + + +MODULE_AUTHOR("Alpha-SID6"); +MODULE_DESCRIPTION("alpha_system_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(alpha_i2c_cpld_init); +module_exit(alpha_i2c_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/service/snh60b0-platform-init.service b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/service/snh60b0-platform-init.service new file mode 100644 index 00000000000..fa2e849c7c3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/service/snh60b0-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Alphanetworks SNH60B0-640F Platform initialization service +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/alphanetworks_snh60b0_util.py -f install +ExecStop=/usr/local/bin/alphanetworks_snh60b0_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/setup.py b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/setup.py new file mode 100644 index 00000000000..785a3666018 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='snh60b0_640f', + version='1.0', + description='Module to initialize Alphanetworks SNH60B0-640F platforms', + + packages=['snh60b0_640f'], + package_dir={'snh60b0_640f': 'snh60b0-640f/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/utils/alphanetworks_snh60b0_util.py b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/utils/alphanetworks_snh60b0_util.py new file mode 100755 index 00000000000..4b64a2e12a1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/snh60b0-640f/utils/alphanetworks_snh60b0_util.py @@ -0,0 +1,427 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Alphanetworks Technology Corporation. +# Robin Chen +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# see +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + + + + +PROJECT_NAME = 'snh60b0-640f' +device_path = "x86_64-alphanetworks_snh60b0_640f-r0" +version = '0.1.0' +verbose = False +DEBUG = False +args = [] +FORCE = 0 + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print PROJECT_NAME.upper()+": "+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +" with result: " + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_check(): + ret, lsmod = log_os_system("lsmod| grep alphanetworks", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + return True + + + +kos = [ +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x', +'modprobe optoe' , +'modprobe snh60b0-640f_power_cpld' , +'modprobe snh60b0-640f_system_cpld' , +'modprobe snh60b0-640f_onie_eeprom' , +'modprobe alphanetworks_snh60b0_640f_sfp' ] + +def driver_install(): + global FORCE + status, output = log_os_system("depmod", 1) + for i in range(0,len(kos)): + if kos[i].find('pca954') != -1: + status, output = log_os_system(kos[i]+ " force_deselect_on_exit=1", 1) + else: + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +i2c_prefix = '/sys/bus/i2c/devices/' + +sfp_map = [13,14,15,16,23] +mknod =[ +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9545 0x71 > /sys/bus/i2c/devices/i2c-5/new_device', +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-7/new_device', +'echo pca9545 0x71 > /sys/bus/i2c/devices/i2c-6/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-20/new_device', +'echo 24c02 0x51 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo 24c02 0x51 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo snh60b0_onie_eeprom 0x56 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo snh60b0_power_cpld 0x5e > /sys/bus/i2c/devices/i2c-0/new_device', +'echo snh60b0_system_cpld 0x5f > /sys/bus/i2c/devices/i2c-8/new_device', +'echo lm75 0x4D > /sys/bus/i2c/devices/i2c-3/new_device', +'echo lm75 0x4C > /sys/bus/i2c/devices/i2c-4/new_device', +'echo lm75 0x4F > /sys/bus/i2c/devices/i2c-0/new_device' ] + +mknod2 =[ +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9545 0x71 > /sys/bus/i2c/devices/i2c-6/new_device', +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-8/new_device', +'echo pca9545 0x71 > /sys/bus/i2c/devices/i2c-7/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-21/new_device', +'echo 24c02 0x51 > /sys/bus/i2c/devices/i2c-11/new_device', +'echo 24c02 0x51 > /sys/bus/i2c/devices/i2c-12/new_device', +'echo snh60b0_onie_eeprom 0x56 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo snh60b0_power_cpld 0x5e > /sys/bus/i2c/devices/i2c-1/new_device', +'echo snh60b0_system_cpld 0x5f > /sys/bus/i2c/devices/i2c-9/new_device', +'echo lm75 0x4D > /sys/bus/i2c/devices/i2c-4/new_device', +'echo lm75 0x4C > /sys/bus/i2c/devices/i2c-5/new_device', +'echo lm75 0x4F > /sys/bus/i2c/devices/i2c-1/new_device' ] + + +def i2c_order_check(): + # i2c bus 0 and 1 might be installed in different order. + # Here check if 0x76 is exist @ i2c-0 + tmp = "echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-0/new_device" + status, output = log_os_system(tmp, 0) + if not device_exist(): + order = 1 + tmp = "sed -i 's/0-/1-/g' /usr/share/sonic/device/"+device_path+"/fancontrol" + status, output = log_os_system(tmp, 0) + else: + order = 0 + tmp = "sed -i 's/1-/0-/g' /usr/share/sonic/device/"+device_path+"/fancontrol" + status, output = log_os_system(tmp, 0) + tmp = "echo 0x70 > /sys/bus/i2c/devices/i2c-0/delete_device" + status, output = log_os_system(tmp, 0) + return order + +def device_install(): + global FORCE + + order = i2c_order_check() + + # if 0x76 is not exist @i2c-0, use reversed bus order + if order: + for i in range(0,len(mknod2)): + #for pca954x need times to built new i2c buses + if mknod2[i].find('pca954') != -1: + time.sleep(1) + + if mknod2[i].find('lm75') != -1: + time.sleep(1) + + status, output = log_os_system(mknod2[i], 1) + if status: + print output + if FORCE == 0: + return status + else: + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(1) + + if mknod[i].find('lm75') != -1: + time.sleep(1) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + + status, output =log_os_system("echo 0 > /sys/bus/i2c/devices/8-005f/sys_reset1", 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(0, 66): + index = i / 16 + port = i % 16 + reg_sfp = 0 + if port == 0: + reg_sfp = 1 + + if reg_sfp == 1: + if i == 64: + status, output =log_os_system("echo sfpcpld"+str(i+1)+" 0x20 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[index])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + if i < 64: + status, output =log_os_system("echo sfpcpld"+str(i+1)+" 0x5f > /sys/bus/i2c/devices/i2c-"+str(sfp_map[index])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + status, output =log_os_system("echo sfpcpld"+str(i+1)+" 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[index])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + + if i == 64: + status, output =log_os_system("echo sfpcpld"+str(i+1)+" 0x50 > /sys/bus/i2c/devices/i2c-21/new_device", 1) + if status: + print output + if FORCE == 0: + return status + if i == 65: + status, output =log_os_system("echo sfpcpld"+str(i+1)+" 0x50 > /sys/bus/i2c/devices/i2c-22/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/1-0070", 0) + if status==0: + I2C_ORDER=1 + else: + I2C_ORDER=0 + + for i in range(0, 66): + index = i / 16 + port = i % 16 + reg_sfp = 0 + if port == 0: + reg_sfp = 1 + + if reg_sfp == 1: + if i == 64: + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[index])+"/delete_device" + status, output =log_os_system("echo 0x20 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + if i < 64: + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[index])+"/delete_device" + status, output =log_os_system("echo 0x5f > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[index])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + if i == 64: + status, output =log_os_system("echo 0x50 > /sys/bus/i2c/devices/i2c-21/delete_device", 1) + if status: + print output + if FORCE == 0: + return status + if i == 65: + status, output =log_os_system("echo 0x50 > /sys/bus/i2c/devices/i2c-22/delete_device", 1) + if status: + print output + if FORCE == 0: + return status + if I2C_ORDER==0: + nodelist = mknod + else: + nodelist = mknod2 + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_check() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + tmp = "find /var/lib/docker/overlay -iname fancontrol | grep usr/sbin/fancontrol | xargs cat | sed '429d' | sed '428a if \[ $? -ne 1 \]' | sed '425d' | sed '424a return' > /tmp/tmp_fancontrol" + status, output = log_os_system(tmp, 1) + tmp = "fancontrol_tmp=`find /var/lib/docker/overlay -iname fancontrol | grep usr/sbin/fancontrol` ; cp /tmp/tmp_fancontrol $fancontrol_tmp" + status, output = log_os_system(tmp, 1) + print "Checking system...." + if driver_check() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_check()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0070", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista new file mode 160000 index 00000000000..390d5e22f9c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-arista @@ -0,0 +1 @@ +Subproject commit 390d5e22f9c6c1a007ed325f6b0bd050a79aa5b1 diff --git a/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/Makefile b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/Makefile new file mode 100644 index 00000000000..cd2a5a101ad --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/Makefile @@ -0,0 +1,14 @@ +SHELL = /bin/bash +.ONESHELL: +.SHELLFLAGS += -e + +MAIN_TARGET = $(BRCM_XLR_GTS_PLATFORM_MODULE) + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Build the package + export PYBUILD_INSTALL_ARGS_python2=--install-scripts=/dev/null + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + + mv $(addprefix ../, $* $(EXTRA_TARGETS)) $(DEST)/ + +$(addprefix $(DEST)/, $(EXTRA_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/confs/sonic-platform-brcm-xlr-gts.service b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/confs/sonic-platform-brcm-xlr-gts.service new file mode 100644 index 00000000000..55ceca0e019 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/confs/sonic-platform-brcm-xlr-gts.service @@ -0,0 +1,11 @@ +[Unit] +Description=Broadcom XLR/GTS platform setup +Before=systemd-logind docker.service + +[Service] +Type=oneshot +RemainAfterExit=yes +ExecStart=/usr/bin/brcm-xlr-gts-platform-setup + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/changelog b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/changelog new file mode 100755 index 00000000000..3168c7c4d69 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/changelog @@ -0,0 +1,5 @@ +sonic-platform-brcm-xlr-gts (1.0) unstable; + + * Initial release + + -- Olivier Singla Thursday, 14 Feb 2019 11:11:11 -0800 diff --git a/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/compat b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/compat new file mode 100755 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/control b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/control new file mode 100755 index 00000000000..a046edb6930 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/control @@ -0,0 +1,27 @@ +Source: sonic-platform-brcm-xlr-gts +Section: main +Priority: extra +Maintainer: Olivier Singla +Build-Depends: + dh-python, + debhelper (>= 9.0.0), + python-all, + python(>=2.7-3~), + python-setuptools, + python3(>=3.2), + python3-setuptools, + bzip2 +Standards-Version: 1.0.0 +X-Python-Version: >= 2.7 +X-Python3-Version: >= 3.2 +XS-Python-Version: >= 2.7 +XS-Python3-Version: >= 3.2 + +Package: sonic-platform-brcm-xlr-gts +Architecture: amd64 +Depends: + ${python:Depends}, + ${misc:Depends}, + python(>=2.7), + i2c-tools +Description: Miscellaneous XLR scripts and tools diff --git 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But first, please read +. diff --git a/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/files b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/files new file mode 100644 index 00000000000..5e9df1525c0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/files @@ -0,0 +1,2 @@ +sonic-platform-brcm-xlr-gts_1.0_amd64.buildinfo main extra +sonic-platform-brcm-xlr-gts_1.0_amd64.deb main extra diff --git a/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/rules b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/rules new file mode 100755 index 00000000000..9c680102251 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/debian/rules @@ -0,0 +1,31 @@ +#!/usr/bin/make -f + +include /usr/share/dpkg/pkg-info.mk + +BIN_FILES := brcm-xlr-gts-platform-setup brcm-xlr-gts-create-eeprom-file.py +RULE_FILES := +SERVICE_FILES := sonic-platform-brcm-xlr-gts.service +USR_SBIN_FILES := brcm-xlr-gts-platform-setup brcm-xlr-gts-create-eeprom-file.py + +BASE_DIR := $(shell pwd) +MODULE_SRC := $(BASE_DIR)/src +TEST_DIR := $(BASE_DIR)/tests +BIN_SRC := $(addprefix $(BASE_DIR)/utils/,$(BIN_FILES)) +SERVICE_SRC := $(addprefix $(BASE_DIR)/confs/,$(SERVICE_FILES)) +USRLOCALSBIN_SRC := $(addprefix $(BASE_DIR)/utils/,$(USR_SBIN_FILES)) + +%: + dh $@ --with python2,python3,systemd --buildsystem=pybuild + +override_dh_auto_install: + dh_installdirs -p$(DEB_SOURCE) lib/systemd/system + cp $(SERVICE_SRC) debian/$(DEB_SOURCE)/lib/systemd/system + dh_installdirs -p$(DEB_SOURCE) usr/bin + cp $(BIN_SRC) debian/$(DEB_SOURCE)/usr/bin + dh_systemd_enable sonic-platform-brcm-xlr-gts.service + +override_dh_clean: + dh_clean + +print-%: + @echo $($*) diff --git a/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/setup.py b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/setup.py new file mode 100755 index 00000000000..6ade72b8163 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/setup.py @@ -0,0 +1,12 @@ +#!/usr/bin/env python + +from setuptools import setup +import os + +setup( + name='platform-xlr-gts', + version='%s' % os.environ.get('BRCM_XLR_GTS_PLATFORM_MODULE_VERSION', '1.0'), + description='Module to initialize Broadcom XLR/GTS platforms', + packages=[], +) + diff --git a/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/src/Makefile b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/src/Makefile new file mode 100644 index 00000000000..fc16fbbfdbf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/src/Makefile @@ -0,0 +1,13 @@ +ccflags-y := -Werror + +#ifeq ($(ARISTA_SCD_DRIVER_CONFIG),m) +#obj-$(ARISTA_SCD_DRIVER_CONFIG) += scd.o +#else +#KBUILD_EXTRA_SYMBOLS += $(EXTRA_SYMBOLS) +#endif + +#obj-m += scd-hwmon.o +#obj-m += crow-fan-driver.o +#obj-m += raven-fan-driver.o +#obj-m += rook-led-driver.o +#obj-m += rook-fan-cpld.o diff --git a/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/src/modules.order b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/src/modules.order new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/tests/all-platforms.sh b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/tests/all-platforms.sh new file mode 100755 index 00000000000..ce5c7b145cb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/tests/all-platforms.sh @@ -0,0 +1,9 @@ +#!/bin/bash +# +# This script provides a simple helper to test if the initscripts for all +# platforms work. +# It runs in simulation mode and don't actually initialize anything but still +# checks most of the codepaths +# + +echo "Nothing to do!" diff --git a/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/utils/brcm-xlr-gts-create-eeprom-file.py b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/utils/brcm-xlr-gts-create-eeprom-file.py new file mode 100755 index 00000000000..71a99471a99 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/utils/brcm-xlr-gts-create-eeprom-file.py @@ -0,0 +1,105 @@ +#!/usr/bin/python + +# Since the XLR/GTS cards do not have an EEPROM, we create a file which +# will be use like an EEPROM. + +import sys +import struct +from ctypes import * +import os + +TLV_CODE_PRODUCT_NAME = 0x21 +TLV_CODE_SERIAL_NUMBER = 0x23 +TLV_CODE_MAC_BASE = 0x24 +TLV_CODE_PLATFORM_NAME = 0x28 +TLV_CODE_ONIE_VERSION = 0x29 +TLV_CODE_MANUF_NAME = 0x2B +TLV_CODE_CRC_32 = 0xFE + +def getmac(interface): + try: + mac = open('/sys/class/net/'+interface+'/address').readline() + except: + mac = "00:00:00:00:00:00" + return mac[0:17] + +class TLVINFO_HEADER(Structure): + _fields_ = [("signature", c_char*8), + ("version", c_ubyte), + ("totallen", c_ushort)] + def dump(self): + return struct.pack('8s', self.signature) + \ + struct.pack('B', self.version) + \ + struct.pack('>H', self.totallen) + +class TLVINFO_DATA: + data = []; + def add_tlv_str(self, type, value): + self.data.append(struct.pack('B', type) + struct.pack('B', len(value)) + value.encode()) + def add_tlv_mac(self, type, value): + self.data.append(struct.pack('B', type) + struct.pack('B', len(value))) + for v in value: + self.data.append(struct.pack('B', int(v, 16))) + def dump(self): + r = ''; + for m in self.data: + r += bytes(m) + return r + struct.pack('B', TLV_CODE_CRC_32) + struct.pack('B', 4) + +def crc32(crc, p, len): + crc = 0xffffffff & ~crc + for i in range(len): + crc = crc ^ p[i] + for j in range(8): + crc = (crc >> 1) ^ (0xedb88320 & -(crc & 1)) + return 0xffffffff & ~crc + +def crc(header, data): + r = ''; + for m in header: + r += bytes(m) + for m in data: + r += bytes(m) + c = crc32(0, bytearray(r), len(r)) + s = struct.pack('>I', c) + return s + +def main(): + + tlvinfo_header = TLVINFO_HEADER('TlvInfo', 1, 0) + + tlvinfo_data = TLVINFO_DATA() + tlvinfo_data.add_tlv_str(TLV_CODE_SERIAL_NUMBER, 'S/N') + + onie_machine = os.popen("cat /host/machine.conf | grep 'onie_machine=' | sed 's/onie_machine=//'").read().strip() + if onie_machine == 'bcm_xlr': + tlvinfo_data.add_tlv_str(TLV_CODE_PRODUCT_NAME, 'BCM9COMX2XMC') + else: + tlvinfo_data.add_tlv_str(TLV_CODE_PRODUCT_NAME, 'Unknown') + + tlvinfo_data.add_tlv_str(TLV_CODE_MANUF_NAME, 'Broadcom') + + eth0_mac_str = getmac('eth0') + eth0_mac = eth0_mac_str.split(':') + tlvinfo_data.add_tlv_mac(TLV_CODE_MAC_BASE, eth0_mac) + + brcm_dev = os.popen("lspci | grep -m1 'Ethernet controller: Broadcom ' | grep 'Device' | sed 's/(.*//' | awk '{print $NF}'").read().strip() + if brcm_dev == 'b960': + tlvinfo_data.add_tlv_str(TLV_CODE_PLATFORM_NAME, 'BCM956960K') + + onie_version = os.popen("cat /host/machine.conf | grep 'onie_version' | sed 's/onie_version=//'").read().strip() + tlvinfo_data.add_tlv_str(TLV_CODE_ONIE_VERSION, onie_version) + + tlvinfo_header.totallen = len(tlvinfo_data.dump())+4; + + try: + f = open('/etc/sys_eeprom.bin', 'w+') + f.write(tlvinfo_header.dump()) + f.write(tlvinfo_data.dump()) + f.write(crc(tlvinfo_header.dump(), tlvinfo_data.dump())) + f.close() + except: + print('Unable to write file /etc/sys_eeprom.bin') + +if __name__== "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/utils/brcm-xlr-gts-platform-setup b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/utils/brcm-xlr-gts-platform-setup new file mode 100755 index 00000000000..1b5d20a5c94 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-brcm-xlr-gts/utils/brcm-xlr-gts-platform-setup @@ -0,0 +1,23 @@ +#!/bin/sh + +. /host/machine.conf + +# We boot SONiC from an XMC card : identify the switch at run-time and update the SKU +if [ "${onie_machine}" = "bcm_xlr" ]; then + grep "HandleLidSwitch=ignore" /etc/systemd/logind.conf > /dev/null + if [ ! $? = 0 ]; then + echo "HandleLidSwitch=ignore" >> /etc/systemd/logind.conf + echo "IdleAction=ignore" >> /etc/systemd/logind.conf + systemctl is-active --quiet systemd-logind + if [ $? = 0 ]; then + systemctl restart systemd-logind + fi + fi + /usr/bin/brcm-xlr-gts-create-eeprom-file.py + brcm_sw=$(lspci | grep -m1 "Ethernet controller: Broadcom " | grep "Device" | sed 's/(.*//' | awk '{print $NF}') + case "$brcm_sw" in + b960) + echo "BCM956960K t1" > /usr/share/sonic/device/${onie_platform}/default_sku + ;; + esac +fi diff --git a/platform/broadcom/sonic-platform-modules-cel/.gitignore b/platform/broadcom/sonic-platform-modules-cel/.gitignore new file mode 100644 index 00000000000..2490baa9d1e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/.gitignore @@ -0,0 +1,59 @@ +# Prerequisites +*.d + +# Object files +*.o +*.ko +*.obj +*.elf + +# Linker output +*.ilk +*.map +*.exp + +# Precompiled Headers +*.gch +*.pch + +# Libraries +*.lib +*.a +*.la +*.lo + +# Shared objects (inc. Windows DLLs) +*.dll +*.so +*.so.* +*.dylib + +# Executables +*.exe +*.out +*.app +*.i*86 +*.x86_64 +*.hex + +# Debug files +*.dSYM/ +*.su +*.idb +*.pdb + +# Kernel Module Compile Results +*.mod* +*.cmd +.tmp_versions/ +modules.order +Module.symvers +Mkfile.old +dkms.conf + +# Debian packaging +*.debhelper.log +*.postinst.debhelper +*.postrm.debhelper +*.prerm.debhelper +*.substvars diff --git a/platform/broadcom/sonic-platform-modules-cel/LICENSE b/platform/broadcom/sonic-platform-modules-cel/LICENSE new file mode 100644 index 00000000000..2386a3920c0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/LICENSE @@ -0,0 +1,15 @@ +Copyright (C) 2017 Celestica, Inc + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/broadcom/sonic-platform-modules-cel/README.md b/platform/broadcom/sonic-platform-modules-cel/README.md new file mode 100644 index 00000000000..26e45c685e4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/README.md @@ -0,0 +1 @@ +platform drivers for Celestica DX010 and Haliburton for the SONiC project diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/changelog b/platform/broadcom/sonic-platform-modules-cel/debian/changelog new file mode 100644 index 00000000000..843b028e430 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/changelog @@ -0,0 +1,57 @@ +sonic-cel-platform-modules (0.9) unstable; urgency=low + + * Add haliburton platform module. + + -- Wirut Getbamrung Fri, 17 Aug 2018 10:10:10 +0700 + +sonic-cel-platform-modules (0.8) unstable; urgency=low + + * Add dx010 platform fan led control. + * The platform gpio init moved to kernel space. + + -- Pradchaya Phucharoen Mon, 1 Jul 2018 11:09:13 +0700 + +sonic-cel-platform-modules (0.7) unstable; urgency=low + + * Add dx010 plaform gpio sysfs exported when module load. + + -- Pradchaya Phucharoen Wed, 21 Jun 2018 13:29:05 +0700 + +sonic-cel-platform-modules (0.6) unstable; urgency=low + + * Remove unused port-mode switch script. This should be done by hwsku config script. + * Add script to turn off QSFP low power mode when boot up. + + -- Pradchaya Phucharoen Wed, 26 July 2017 10:43:00 +0700 + +sonic-cel-platform-modules (0.5) unstable; urgency=low + + * Add port-mode switch script to support 100G 50G 10G_50G qsfp modes. + * Fix garbage data when using sfputil to read QSFP-transceiver's eeprom. + * Fix incorrect endian in eeprom read word data. + + -- Pradchaya Phucharoen Tue, 18 July 2017 11:30:00 +0700 + +sonic-cel-platform-modules (0.4) unstable; urgency=low + + * Add support for DX010's fancontrol, automatic run-up and FIX bug lpmod + + -- Pariwat Leamsumran Thu, 14 June 2017 16:25:00 +0700 + +sonic-cel-platform-modules (0.3) unstable; urgency=low + + * Add support for DX010's DPS800 + + -- Abhisit Sangjan Thu, 29 May 2017 19:23:00 +0700 + +sonic-cel-platform-modules (0.2) unstable; urgency=low + + * Add support for DX010's LM75B, Watchdog and EMC2305 + + -- Abhisit Sangjan Thu, 25 May 2017 15:26:00 +0700 + +sonic-cel-platform-modules (0.1) unstable; urgency=low + + * Initial release + + -- Abhisit Sangjan Mon, 2 May 2017 14:47:00 +0700 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/compat b/platform/broadcom/sonic-platform-modules-cel/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/control b/platform/broadcom/sonic-platform-modules-cel/debian/control new file mode 100644 index 00000000000..2e9b578872f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/control @@ -0,0 +1,22 @@ +Source: sonic-cel-platform-modules +Section: main +Priority: extra +Maintainer: Abhisit Sangjan +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: platform-modules-dx010 +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + + +Package: platform-modules-haliburton +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-silverstone +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as led, sfp. diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init new file mode 100644 index 00000000000..1e124565a41 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init @@ -0,0 +1,163 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: $portmap +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup DX010 board. +### END INIT INFO + +function export_gpio { +label=$3 +gpio_dir=$2 +gpio_num=$1 +gpio_base=`( cat /sys/class/gpio/gpiochip*/base | head -1 ) 2>/dev/null` +gpio_label=`( cat /sys/class/gpio/gpiochip*/label | head -1 ) 2>/dev/null` +if [[ "X$gpio_base" == "X" ]] || +( [[ "X$label" != "X" ]] && [[ "$label" != "$gpio_label" ]] ); then + echo "Platform driver error: No gpiochip found!" + exit 1; +fi +ionum=$((gpio_base+gpio_num)) +echo $ionum > /sys/class/gpio/export +if [ $? -ne 0 ]; then + echo "Platform driver error: Cannot export gpio$ionum!" + exit 1; +fi +if [[ "X$gpio_dir" != "X" ]]; then + echo $gpio_dir > /sys/class/gpio/gpio${ionum}/direction + if [ $? -ne 0 ]; then + echo "Platform driver error: Cannot set direction of gpio$ionum!" + exit 1; + fi +fi +} + +case "$1" in +start) + echo -n "Setting up board... " + + modprobe i2c-dev + modprobe i2c-mux-pca954x + modprobe dx010_wdt + modprobe leds-dx010 + modprobe lm75 + + found=0 + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + # iSMT adapter can be at either dffd0000 or dfff0000 + if [[ $devname == 'SMBus iSMT adapter at '* ]]; then + found=1 + break + fi + done + + [ $found -eq 0 ] && echo "cannot find iSMT" && exit 1 + + i2cset -y ${devnum} 0x70 0x10 0x00 0x01 i + + # Attach PCA9541 Ox70 Master Selector + chmod 755 /sys/bus/i2c/devices/i2c-${devnum}/new_device + echo pca9541 0x70 > /sys/bus/i2c/devices/i2c-${devnum}/new_device + sleep 1 + + # Attach PCA9548 0x71 Channel Extender for Main Board + echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-${devnum}/new_device + sleep 1 + + # Attach PCA9548 0x73 Channel Extender for CPU Board + echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-${devnum}/new_device + sleep 1 + + # Attach PCA9548 0x77 Channel Extender for Fan's EEPROMs + echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-${devnum}/new_device + sleep 1 + + # Attach syseeprom + echo 24lc64t 0x50 > /sys/bus/i2c/devices/i2c-12/new_device + + # Attach temperature sensors + echo lm75b 0x48 > /sys/bus/i2c/devices/i2c-5/new_device + echo lm75b 0x49 > /sys/bus/i2c/devices/i2c-6/new_device + echo lm75b 0x4a > /sys/bus/i2c/devices/i2c-7/new_device + echo lm75b 0x48 > /sys/bus/i2c/devices/i2c-14/new_device + echo lm75b 0x4e > /sys/bus/i2c/devices/i2c-15/new_device + + # Attach fans + echo emc2305 0x2e > /sys/bus/i2c/devices/i2c-13/new_device + echo emc2305 0x4d > /sys/bus/i2c/devices/i2c-13/new_device + + # Attach PSUs + echo dps460 0x5a > /sys/bus/i2c/devices/i2c-10/new_device + echo dps460 0x5b > /sys/bus/i2c/devices/i2c-11/new_device + + # Attach PCA9506 GPIO expander for 40 pins + echo pca9505 0x20 > /sys/bus/i2c/devices/i2c-17/new_device + + modprobe dx010_cpld + sleep 2 + + # Export platform gpio sysfs + export_gpio 10 "in" # Fan 1 present + export_gpio 11 "in" # Fan 2 present + export_gpio 12 "in" # Fan 3 present + export_gpio 13 "in" # Fan 4 present + export_gpio 14 "in" # Fan 5 present + + export_gpio 15 "in" # Fan 1 direction + export_gpio 16 "in" # Fan 2 direction + export_gpio 17 "in" # Fan 3 direction + export_gpio 18 "in" # Fan 4 direction + export_gpio 19 "in" # Fan 5 direction + + export_gpio 22 "in" # PSU L PWOK + export_gpio 25 "in" # PSU R PWOK + export_gpio 27 "in" # PSU L ABS + export_gpio 28 "in" # PSU R ABS + + export_gpio 29 "out" # Fan 1 LED: Red + export_gpio 30 "out" # Fan 1 LED: Yellow + export_gpio 31 "out" # Fan 2 LED: Red + export_gpio 32 "out" # Fan 2 LED: Yellow + export_gpio 33 "out" # Fan 3 LED: Red + export_gpio 34 "out" # Fan 3 LED: Yellow + export_gpio 35 "out" # Fan 4 LED: Red + export_gpio 36 "out" # Fan 4 LED: Yellow + export_gpio 37 "out" # Fan 5 LED: Red + export_gpio 38 "out" # Fan 5 LED: Yellow + + # Turn off/down lpmod by defult (0 - Normal, 1 - Low Pow) + echo 0x00000000 > /sys/devices/platform/dx010_cpld/qsfp_lpmode + + # Attach 32 instances of EEPROM driver QSFP ports + for ((n=26;n<=58;n++)); + do + echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-$n/new_device + sleep 0.1 + done + + /bin/sh /usr/local/bin/platform_api_mgnt.sh init + + echo "done." + ;; + +stop) + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-dx010.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.install new file mode 100644 index 00000000000..2ab53302a9b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.install @@ -0,0 +1,6 @@ +dx010/scripts/dx010_check_qsfp.sh usr/local/bin +dx010/cfg/dx010-modules.conf etc/modules-load.d +dx010/systemd/platform-modules-dx010.service lib/systemd/system +dx010/modules/sonic_platform-1.0-py2-none-any.whl usr/share/sonic/device/x86_64-cel_seastone-r0 +services/platform_api/platform_api_mgnt.sh usr/local/bin +tools/afulnx_64 usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.postinst new file mode 100644 index 00000000000..15243c935ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.postinst @@ -0,0 +1,6 @@ +depmod -a +systemctl enable platform-modules-dx010.service +systemctl start platform-modules-dx010.service + +/usr/local/bin/platform_api_mgnt.sh install + diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init new file mode 100644 index 00000000000..1dc0ea5cfee --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init @@ -0,0 +1,91 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: $portmap +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Haliburton board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + modprobe smc + modprobe hlx_gpio_ich + modprobe dps200 + + found=0 + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + # iSMT adapter can be at either dffd0000 or dfff0000 + if [[ $devname == 'SMBus iSMT adapter at '* ]]; then + found=1 + break + fi + done + + [ $found -eq 0 ] && echo "cannot find iSMT" && exit 1 + + i2cset -y ${devnum} 0x73 0x10 0x00 0x01 i + + # Attach PCA9548 0x73 Channel Extender for CPU Board + echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-${devnum}/new_device + sleep 1 + + # Attach PCA9541 Ox71 Master Selector + chmod 755 /sys/bus/i2c/devices/i2c-${devnum}/new_device + echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-8/new_device + sleep 1 + + # Attach PCA9548 0x72 Channel Extender for Main Board + echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-8/new_device + sleep 1 + + # Attach syseeprom + echo 24lc64t 0x50 > /sys/bus/i2c/devices/i2c-2/new_device + + echo max6699 0x1a > /sys/bus/i2c/devices/i2c-3/new_device + echo max6699 0x1a > /sys/bus/i2c/devices/i2c-11/new_device + + # Attach PSUs + echo dps200 0x5a > /sys/bus/i2c/devices/i2c-12/new_device + echo dps200 0x5b > /sys/bus/i2c/devices/i2c-13/new_device + + # Attach fans + echo emc2305 0x4d > /sys/bus/i2c/devices/i2c-23/new_device + + # Attach 4 SFP+ Uplink + echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-14/new_device + echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-15/new_device + echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-16/new_device + echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-17/new_device + + # Enable SFP module presence interrupt + echo "both" > /sys/devices/platform/e1031.smc/SFP/modabs_trig + echo 0 > /sys/devices/platform/e1031.smc/SFP/modabs_mask + + /bin/sh /usr/local/bin/platform_api_mgnt.sh init + + echo "done." + ;; + +stop) + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-haliburton.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.install new file mode 100644 index 00000000000..d50306304cd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.install @@ -0,0 +1,8 @@ +haliburton/cfg/haliburton-modules.conf etc/modules-load.d +haliburton/systemd/platform-modules-haliburton.service lib/systemd/system +haliburton/script/fancontrol.sh etc/init.d +services/fancontrol/fancontrol.service lib/systemd/system +services/fancontrol/fancontrol usr/local/bin +haliburton/modules/sonic_platform-1.0-py2-none-any.whl usr/share/sonic/device/x86_64-cel_e1031-r0 +services/platform_api/platform_api_mgnt.sh usr/local/bin +tools/afulnx_64 usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.postinst new file mode 100644 index 00000000000..e62799bd591 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.postinst @@ -0,0 +1,8 @@ +depmod -a +systemctl enable platform-modules-haliburton.service +systemctl enable fancontrol.service + +systemctl start platform-modules-haliburton.service +systemctl start fancontrol.service + +/usr/local/bin/platform_api_mgnt.sh install diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init new file mode 100644 index 00000000000..eb003599ec6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init @@ -0,0 +1,51 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: $portmap +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup SilverStone board. +### END INIT INFO + + +case "$1" in +start) + echo -n "Setting up board... " + + modprobe i2c-dev + modprobe baseboard-lpc + modprobe switchboard + modprobe mc24lc64t + modprobe ipmi_devintf + + # Instantiate TLV EEPROM device on I801 bus + devname=`cat /sys/bus/i2c/devices/i2c-0/name` + if [[ $devname == 'SMBus I801 adapter at '* ]]; then + echo 24lc64t 0x56 > /sys/bus/i2c/devices/i2c-0/new_device + fi + decode-syseeprom --init 2> /dev/null & + + /bin/sh /usr/local/bin/platform_api_mgnt.sh init + + echo "done." + ;; + +stop) + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-silverstone.init {start|stop}" + exit 1 + ;; +esac + +exit 0 \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install new file mode 100644 index 00000000000..67b433ced85 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install @@ -0,0 +1,6 @@ +silverstone/scripts/sensors usr/bin +silverstone/scripts/platform_sensors.py usr/local/bin +silverstone/cfg/silverstone-modules.conf etc/modules-load.d +silverstone/systemd/platform-modules-silverstone.service lib/systemd/system +silverstone/modules/sonic_platform-1.0-py2-none-any.whl usr/share/sonic/device/x86_64-cel_silverstone-r0 +services/platform_api/platform_api_mgnt.sh usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst new file mode 100644 index 00000000000..feb9cf45c21 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst @@ -0,0 +1,5 @@ +depmod -a +systemctl enable platform-modules-silverstone.service +systemctl start platform-modules-silverstone.service + +/usr/local/bin/platform_api_mgnt.sh install diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/rules b/platform/broadcom/sonic-platform-modules-cel/debian/rules new file mode 100755 index 00000000000..dd5452ccaa1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/rules @@ -0,0 +1,36 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= dx010 haliburton silverstone + +%: + dh $@ + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python2.7 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \ + cd $(MOD_SRC_DIR); \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -pplatform-modules-$${mod} \ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/modules/*.ko \ + debian/platform-modules-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + done) + +override_dh_usrlocal: + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) + diff --git a/platform/broadcom/sonic-platform-modules-cel/dx010/cfg/dx010-modules.conf b/platform/broadcom/sonic-platform-modules-cel/dx010/cfg/dx010-modules.conf new file mode 100644 index 00000000000..66f002a5fc9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/dx010/cfg/dx010-modules.conf @@ -0,0 +1,15 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-gpio +i2c-mux-pca954x + diff --git a/platform/broadcom/sonic-platform-modules-cel/dx010/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/dx010/modules/Makefile new file mode 100644 index 00000000000..9b0f1060481 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/dx010/modules/Makefile @@ -0,0 +1 @@ +obj-m := dx010_cpld.o mc24lc64t.o emc2305.o dx010_wdt.o leds-dx010.o \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/dx010/modules/dx010_cpld.c b/platform/broadcom/sonic-platform-modules-cel/dx010/modules/dx010_cpld.c new file mode 100644 index 00000000000..7893220ff6d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/dx010/modules/dx010_cpld.c @@ -0,0 +1,640 @@ +/* + * dx010_cpld.c - driver for SeaStone's CPLD + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "dx010_cpld" + +#define CPLD1_VERSION_ADDR 0x100 +#define CPLD2_VERSION_ADDR 0x200 +#define CPLD3_VERSION_ADDR 0x280 +#define CPLD4_VERSION_ADDR 0x300 +#define CPLD5_VERSION_ADDR 0x380 + + +#define RESET0108 0x250 +#define RESET0910 0x251 +#define RESET1118 0x2d0 +#define RESET1921 0x2d1 +#define RESET2229 0x3d0 +#define RESET3032 0x3d1 + +#define LPMOD0108 0x252 +#define LPMOD0910 0x253 +#define LPMOD1118 0x2d2 +#define LPMOD1921 0x2d3 +#define LPMOD2229 0x3d2 +#define LPMOD3032 0x3d3 + +#define ABS0108 0x254 +#define ABS0910 0x255 +#define ABS1118 0x2d4 +#define ABS1921 0x2d5 +#define ABS2229 0x3d4 +#define ABS3032 0x3d5 + +#define INT0108 0x256 +#define INT0910 0x257 +#define INT1118 0x2d6 +#define INT1921 0x2d7 +#define INT2229 0x3d6 +#define INT3032 0x3d7 + + +#define LENGTH_PORT_CPLD 34 +#define PORT_BANK1_START 1 +#define PORT_BANK1_END 10 +#define PORT_BANK2_START 11 +#define PORT_BANK2_END 21 +#define PORT_BANK3_START 22 +#define PORT_BANK3_END 32 +#define PORT_SFPP1 33 +#define PORT_SFPP2 34 + +#define PORT_ID_BANK1 0x210 +#define PORT_ID_BANK2 0x290 +#define PORT_ID_BANK3 0x390 + +#define OPCODE_ID_BANK1 0x211 +#define OPCODE_ID_BANK2 0x291 +#define OPCODE_ID_BANK3 0x391 + +#define DEVADDR_ID_BANK1 0x212 +#define DEVADDR_ID_BANK2 0x292 +#define DEVADDR_ID_BANK3 0x392 + +#define CMDBYT_ID_BANK1 0x213 +#define CMDBYT_ID_BANK2 0x293 +#define CMDBYT_ID_BANK3 0x393 + +#define WRITE_ID_BANK1 0x220 +#define WRITE_ID_BANK2 0x2A0 +#define WRITE_ID_BANK3 0x3A0 + +#define READ_ID_BANK1 0x230 +#define READ_ID_BANK2 0x2B0 +#define READ_ID_BANK3 0x3B0 + +#define SSRR_ID_BANK1 0x216 +#define SSRR_ID_BANK2 0x296 +#define SSRR_ID_BANK3 0x396 + +#define HST_CNTL2_QUICK 0x00 +#define HST_CNTL2_BYTE 0x01 +#define HST_CNTL2_BYTE_DATA 0x02 +#define HST_CNTL2_WORD_DATA 0x03 +#define HST_CNTL2_BLOCK 0x05 + +struct dx010_i2c_data { + int portid; +}; + +struct dx010_cpld_data { + struct i2c_adapter *i2c_adapter[LENGTH_PORT_CPLD]; + struct mutex cpld_lock; + uint16_t read_addr; +}; + +struct dx010_cpld_data *cpld_data; + +static ssize_t getreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + + uint16_t addr; + char *last; + + addr = (uint16_t)strtoul(buf,&last,16); + if(addr == 0 && buf == last){ + return -EINVAL; + } + cpld_data->read_addr = addr; + return count; +} + +static ssize_t getreg_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + + int len = 0; + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n",inb(cpld_data->read_addr)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} + +static ssize_t get_reset(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned long reset = 0; + + mutex_lock(&cpld_data->cpld_lock); + + reset = + (inb(RESET3032) & 0x07) << (24+5) | + inb(RESET2229) << (24-3) | + (inb(RESET1921) & 0x07) << (16 + 2) | + inb(RESET1118) << (16-6) | + (inb(RESET0910) & 0x03 ) << 8 | + inb(RESET0108); + + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf,"0x%8.8lx\n", reset & 0xffffffff); +} + +static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + + uint16_t addr; + uint8_t value; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + + strcpy(clone, buf); + + mutex_lock(&cpld_data->cpld_lock); + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + addr = (uint16_t)strtoul(tok,&last,16); + if(addr == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + value = (uint8_t)strtoul(tok,&last,16); + if(value == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + outb(value,addr); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned long reset; + int err; + + mutex_lock(&cpld_data->cpld_lock); + + err = kstrtoul(buf, 16, &reset); + if (err) + { + mutex_unlock(&cpld_data->cpld_lock); + return err; + } + + outb( (reset >> 0) & 0xFF, RESET0108); + outb( (reset >> 8) & 0x03, RESET0910); + outb( (reset >> 10) & 0xFF, RESET1118); + outb( (reset >> 18) & 0x07, RESET1921); + outb( (reset >> 21) & 0xFF, RESET2229); + outb( (reset >> 29) & 0x07, RESET3032); + + mutex_unlock(&cpld_data->cpld_lock); + + return count; +} + +static ssize_t get_lpmode(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned long lpmod = 0; + + mutex_lock(&cpld_data->cpld_lock); + + lpmod = + (inb(LPMOD3032) & 0x07) << (24+5) | + inb(LPMOD2229) << (24-3) | + (inb(LPMOD1921) & 0x07) << (16 + 2) | + inb(LPMOD1118) << (16-6) | + (inb(LPMOD0910) & 0x03 ) << 8 | + inb(LPMOD0108); + + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf,"0x%8.8lx\n", lpmod & 0xffffffff); +} + +static ssize_t set_lpmode(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned long lpmod; + int err; + + mutex_lock(&cpld_data->cpld_lock); + + err = kstrtoul(buf, 16, &lpmod); + if (err) + { + mutex_unlock(&cpld_data->cpld_lock); + return err; + } + + outb( (lpmod >> 0) & 0xFF, LPMOD0108); + outb( (lpmod >> 8) & 0x03, LPMOD0910); + outb( (lpmod >> 10) & 0xFF, LPMOD1118); + outb( (lpmod >> 18) & 0x07, LPMOD1921); + outb( (lpmod >> 21) & 0xFF, LPMOD2229); + outb( (lpmod >> 29) & 0x07, LPMOD3032); + + mutex_unlock(&cpld_data->cpld_lock); + + return count; +} + +static ssize_t get_modprs(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned long present; + + mutex_lock(&cpld_data->cpld_lock); + + present = + (inb(ABS3032) & 0x07) << (24+5) | + inb(ABS2229) << (24-3) | + (inb(ABS1921) & 0x07) << (16 + 2) | + inb(ABS1118) << (16-6) | + (inb(ABS0910) & 0x03) << 8 | + inb(ABS0108); + + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf,"0x%8.8lx\n", present & 0xffffffff); +} + +static ssize_t get_modirq(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned long irq; + + mutex_lock(&cpld_data->cpld_lock); + + irq = + (inb(INT3032) & 0x07) << (24+5) | + inb(INT2229) << (24-3) | + (inb(INT1921) & 0x07) << (16 + 2) | + inb(INT1118) << (16-6) | + (inb(INT0910) & 0x03) << 8 | + inb(INT0108); + + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf,"0x%8.8lx\n", irq & 0xffffffff); +} + +static DEVICE_ATTR_RW(getreg); +static DEVICE_ATTR_WO(setreg); +static DEVICE_ATTR(qsfp_reset, S_IRUGO | S_IWUSR, get_reset, set_reset); +static DEVICE_ATTR(qsfp_lpmode, S_IRUGO | S_IWUSR, get_lpmode, set_lpmode); +static DEVICE_ATTR(qsfp_modprs, S_IRUGO, get_modprs, NULL); +static DEVICE_ATTR(qsfp_modirq, S_IRUGO, get_modirq, NULL); + +static struct attribute *dx010_lpc_attrs[] = { + &dev_attr_getreg.attr, + &dev_attr_setreg.attr, + &dev_attr_qsfp_reset.attr, + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_modprs.attr, + &dev_attr_qsfp_modirq.attr, + NULL, +}; + +static struct attribute_group dx010_lpc_attr_grp = { + .attrs = dx010_lpc_attrs, +}; + +static struct resource cel_dx010_lpc_resources[] = { + { + .flags = IORESOURCE_IO, + }, +}; + +static void cel_dx010_lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device cel_dx010_lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(cel_dx010_lpc_resources), + .resource = cel_dx010_lpc_resources, + .dev = { + .release = cel_dx010_lpc_dev_release, + } +}; + + +/** + * Read eeprom of QSFP device. + * @param a i2c adapter. + * @param addr address to read. + * @param new_data QSFP port number struct. + * @param cmd i2c command. + * @return 0 if not error, else the error code. + */ +static int i2c_read_eeprom(struct i2c_adapter *a, u16 addr, + struct dx010_i2c_data *new_data, u8 cmd, union i2c_smbus_data *data){ + + u32 reg; + int ioBase=0; + char byte; + short temp; + short portid, opcode, devaddr, cmdbyte0, ssrr, writedata, readdata; + __u16 word_data; + int error = -EIO; + + mutex_lock(&cpld_data->cpld_lock); + + if (((new_data->portid >= PORT_BANK1_START) + && (new_data->portid <= PORT_BANK1_END)) + || (new_data->portid == PORT_SFPP1) + || (new_data->portid == PORT_SFPP2)) + { + portid = PORT_ID_BANK1; + opcode = OPCODE_ID_BANK1; + devaddr = DEVADDR_ID_BANK1; + cmdbyte0 = CMDBYT_ID_BANK1; + ssrr = SSRR_ID_BANK1; + writedata = WRITE_ID_BANK1; + readdata = READ_ID_BANK1; + }else if ((new_data->portid >= PORT_BANK2_START) && (new_data->portid <= PORT_BANK2_END)){ + portid = PORT_ID_BANK2; + opcode = OPCODE_ID_BANK2; + devaddr = DEVADDR_ID_BANK2; + cmdbyte0 = CMDBYT_ID_BANK2; + ssrr = SSRR_ID_BANK2; + writedata = WRITE_ID_BANK2; + readdata = READ_ID_BANK2; + }else if ((new_data->portid >= PORT_BANK3_START) && (new_data->portid <= PORT_BANK3_END)){ + portid = PORT_ID_BANK3; + opcode = OPCODE_ID_BANK3; + devaddr = DEVADDR_ID_BANK3; + cmdbyte0 = CMDBYT_ID_BANK3; + ssrr = SSRR_ID_BANK3; + writedata = WRITE_ID_BANK3; + readdata = READ_ID_BANK3; + }else{ + /* Invalid parameter! */ + error = -EINVAL; + goto exit; + } + + while ((inb(ioBase + ssrr) & 0x40)); + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + error = -EIO; + /* Read error reset the port */ + outb(0x00, ioBase + ssrr); + udelay(3000); + outb(0x01, ioBase + ssrr); + goto exit; + } + + byte = 0x40 +new_data->portid; + reg = cmd; + outb(byte, ioBase + portid); + outb(reg,ioBase + cmdbyte0); + byte = 33; + outb(byte, ioBase + opcode); + addr = addr << 1; + addr |= 0x01; + outb(addr, ioBase + devaddr); + while ((inb(ioBase + ssrr) & 0x40)) + { + udelay(100); + } + + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + /* Read error reset the port */ + error = -EIO; + outb(0x00, ioBase + ssrr); + udelay(3000); + outb(0x01, ioBase + ssrr); + goto exit; + } + + temp = ioBase + readdata; + word_data = inb(temp); + word_data |= (inb(++temp) << 8); + + mutex_unlock(&cpld_data->cpld_lock); + data->word = word_data; + return 0; + +exit: + mutex_unlock(&cpld_data->cpld_lock); + return error; +} + +static int dx010_i2c_access(struct i2c_adapter *a, u16 addr, + unsigned short flags, char rw, u8 cmd, + int size, union i2c_smbus_data *data) +{ + + int error = 0; + + struct dx010_i2c_data *new_data; + + /* Write the command register */ + new_data = i2c_get_adapdata(a); + + /* Map the size to what the chip understands */ + switch (size) { + case I2C_SMBUS_QUICK: + size = HST_CNTL2_QUICK; + break; + case I2C_SMBUS_BYTE: + size = HST_CNTL2_BYTE; + break; + case I2C_SMBUS_BYTE_DATA: + size = HST_CNTL2_BYTE_DATA; + break; + case I2C_SMBUS_WORD_DATA: + size = HST_CNTL2_WORD_DATA; + break; + case I2C_SMBUS_BLOCK_DATA: + size = HST_CNTL2_BLOCK; + break; + default: + dev_warn(&a->dev, "Unsupported transaction %d\n", size); + error = -EOPNOTSUPP; + goto Done; + } + + switch (size) { + case HST_CNTL2_BYTE: /* Result put in SMBHSTDAT0 */ + break; + case HST_CNTL2_BYTE_DATA: + break; + case HST_CNTL2_WORD_DATA: + if( 0 == i2c_read_eeprom(a,addr,new_data,cmd,data)){ + error = 0; + }else{ + error = -EIO; + } + break; + } + +Done: + return error; +} + +static u32 dx010_i2c_func(struct i2c_adapter *a) +{ + return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_BLOCK_DATA; +} + +static const struct i2c_algorithm dx010_i2c_algorithm = { + .smbus_xfer = dx010_i2c_access, + .functionality = dx010_i2c_func, +}; + +static struct i2c_adapter * cel_dx010_i2c_init(struct platform_device *pdev, int portid) +{ + int error; + + struct i2c_adapter *new_adapter; + struct dx010_i2c_data *new_data; + + new_adapter = kzalloc(sizeof(*new_adapter), GFP_KERNEL); + if (!new_adapter) + return NULL; + + new_adapter->dev.parent = &pdev->dev; + new_adapter->owner = THIS_MODULE; + new_adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + new_adapter->algo = &dx010_i2c_algorithm; + + snprintf(new_adapter->name, sizeof(new_adapter->name), + "SMBus dx010 i2c Adapter portid@%04x", portid); + + new_data = kzalloc(sizeof(*new_data), GFP_KERNEL); + if (!new_data) + return NULL; + + new_data->portid = portid; + + i2c_set_adapdata(new_adapter,new_data); + + error = i2c_add_adapter(new_adapter); + if(error) + return NULL; + + return new_adapter; +}; + +static int cel_dx010_lpc_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int ret =0; + int portid_count; + + cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct dx010_cpld_data), + GFP_KERNEL); + if (!cpld_data) + return -ENOMEM; + + mutex_init(&cpld_data->cpld_lock); + cpld_data->read_addr = CPLD1_VERSION_ADDR; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (unlikely(!res)) { + printk(KERN_ERR " Specified Resource Not Available...\n"); + return -1; + } + + ret = sysfs_create_group(&pdev->dev.kobj, &dx010_lpc_attr_grp); + if (ret) { + printk(KERN_ERR "Cannot create sysfs\n"); + } + + for(portid_count=1 ; portid_count<=LENGTH_PORT_CPLD ; portid_count++) + cpld_data->i2c_adapter[portid_count-1] = + cel_dx010_i2c_init(pdev, portid_count); + + return 0; +} + +static int cel_dx010_lpc_drv_remove(struct platform_device *pdev) +{ + int portid_count; + + sysfs_remove_group(&pdev->dev.kobj, &dx010_lpc_attr_grp); + + for (portid_count=1 ; portid_count<=LENGTH_PORT_CPLD ; portid_count++) + i2c_del_adapter(cpld_data->i2c_adapter[portid_count-1]); + + return 0; +} + +static struct platform_driver cel_dx010_lpc_drv = { + .probe = cel_dx010_lpc_drv_probe, + .remove = __exit_p(cel_dx010_lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int cel_dx010_lpc_init(void) +{ + platform_device_register(&cel_dx010_lpc_dev); + platform_driver_register(&cel_dx010_lpc_drv); + + return 0; +} + +void cel_dx010_lpc_exit(void) +{ + platform_driver_unregister(&cel_dx010_lpc_drv); + platform_device_unregister(&cel_dx010_lpc_dev); +} + +module_init(cel_dx010_lpc_init); +module_exit(cel_dx010_lpc_exit); + +MODULE_AUTHOR("Abhisit Sangjan "); +MODULE_AUTHOR("Pariwat Leamsumran "); +MODULE_DESCRIPTION("Celestica SeaStone DX010 LPC Driver"); +MODULE_LICENSE("GPL"); \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/dx010/modules/dx010_wdt.c b/platform/broadcom/sonic-platform-modules-cel/dx010/modules/dx010_wdt.c new file mode 100644 index 00000000000..a386c065051 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/dx010/modules/dx010_wdt.c @@ -0,0 +1,215 @@ +/* + * Watchdog driver for the Seastone DX010 + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define DRIVER_NAME "dx010_wdt" + +#define RESET_CTRL 0x102 +#define WDT_MASK 0x04 +#define WDI_GPIO_DIR 0x504 +#define WDI_GPIO 0x508 + +static bool nowayout = WATCHDOG_NOWAYOUT; + +struct dx010_wdt_drvdata { + struct watchdog_device wdt; + struct mutex lock; +}; + +static struct resource dx010_wdt_resources[] = { + { + .flags = IORESOURCE_IO, + }, +}; + +static void dx010_wdt_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device dx010_wdt_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(dx010_wdt_resources), + .resource = dx010_wdt_resources, + .dev = { + .release = dx010_wdt_dev_release, + } +}; + +static int dx010_wdt_start(struct watchdog_device *wdt_dev) +{ + struct dx010_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); + unsigned char reset_ctrl = 0x00; + unsigned long gpio ,dir; + + mutex_lock(&drvdata->lock); + + gpio = inl(WDI_GPIO); + gpio |= 1 << 15; + outl(gpio, WDI_GPIO); + + outl((inl(WDI_GPIO_DIR) & (~(1 << 15))), WDI_GPIO_DIR); + + reset_ctrl = inb(RESET_CTRL); + + gpio = inl(WDI_GPIO); + gpio &= ~(1 << 15); + outl_p( gpio, WDI_GPIO ); + + mdelay(10); + + gpio = inl(WDI_GPIO); + gpio |= (1 << 15); + outl_p( gpio, WDI_GPIO ); + + reset_ctrl |= WDT_MASK; + outb(reset_ctrl, RESET_CTRL); + + mutex_unlock(&drvdata->lock); + + return 0; +} + +static int dx010_wdt_stop(struct watchdog_device *wdt_dev) +{ + struct dx010_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); + unsigned long reset_ctrl; + + mutex_lock(&drvdata->lock); + + reset_ctrl = inb(RESET_CTRL); + reset_ctrl &= ~WDT_MASK; + outb(reset_ctrl, RESET_CTRL); + + mutex_unlock(&drvdata->lock); + + return 0; +} + +static int dx010_wdt_ping(struct watchdog_device *wdt_dev) +{ + struct dx010_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); + unsigned long gpio; + + mutex_lock(&drvdata->lock); + + gpio = inl(WDI_GPIO); + gpio &= ~(1 << 15); + outl_p( gpio, WDI_GPIO ); + + mdelay(10); + + gpio = inl(WDI_GPIO); + gpio |= (1 << 15); + outl_p( gpio, WDI_GPIO ); + + mutex_unlock(&drvdata->lock); + + return 0; +} + +static const struct watchdog_info dx010_wdt_info = { + .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, + .identity = "DX010 Watchdog", +}; + +static const struct watchdog_ops dx010_wdt_ops = { + .owner = THIS_MODULE, + .start = dx010_wdt_start, + .stop = dx010_wdt_stop, + .ping = dx010_wdt_ping, +}; + +static int dx010_wdt_probe(struct platform_device *pdev) +{ + struct dx010_wdt_drvdata *drvdata; + int ret; + + drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), + GFP_KERNEL); + if (!drvdata) { + ret = -ENOMEM; + goto err; + } + + mutex_init(&drvdata->lock); + + drvdata->wdt.info = &dx010_wdt_info; + drvdata->wdt.ops = &dx010_wdt_ops; + + watchdog_set_nowayout(&drvdata->wdt, nowayout); + watchdog_set_drvdata(&drvdata->wdt, drvdata); + + ret = watchdog_register_device(&drvdata->wdt); + if (ret != 0) { + dev_err(&pdev->dev, "watchdog_register_device() failed: %d\n", + ret); + goto err; + } + + platform_set_drvdata(pdev, drvdata); + +err: + return ret; +} + +static int dx010_wdt_remove(struct platform_device *pdev) +{ + struct dx010_wdt_drvdata *drvdata = platform_get_drvdata(pdev); + + watchdog_unregister_device(&drvdata->wdt); + + return 0; +} + +static struct platform_driver dx010_wdt_drv = { + .probe = dx010_wdt_probe, + .remove = dx010_wdt_remove, + .driver = { + .name = DRIVER_NAME, + }, +}; + +int dx010_wdt_init(void) +{ + platform_device_register(&dx010_wdt_dev); + platform_driver_register(&dx010_wdt_drv); + + return 0; +} + +void dx010_wdt_exit(void) +{ + platform_driver_unregister(&dx010_wdt_drv); + platform_device_unregister(&dx010_wdt_dev); +} + +module_init(dx010_wdt_init); +module_exit(dx010_wdt_exit); + +MODULE_AUTHOR("Abhisit Sangjan "); +MODULE_AUTHOR("Pariwat Leamsumran "); +MODULE_DESCRIPTION("Seastone DX010 Watchdog"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:dx010-watchdog"); diff --git a/platform/broadcom/sonic-platform-modules-cel/dx010/modules/emc2305.c b/platform/broadcom/sonic-platform-modules-cel/dx010/modules/emc2305.c new file mode 100644 index 00000000000..b406a29fd9b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/dx010/modules/emc2305.c @@ -0,0 +1,886 @@ +/* + * emc2305.c - hwmon driver for SMSC EMC2305 fan controller + * (C) Copyright 2013 + * Reinhard Pfau, Guntermann & Drunck GmbH + * + * Based on emc2103 driver by SMSC. + * + * Datasheet available at: + * http://www.smsc.com/Downloads/SMSC/Downloads_Public/Data_Sheets/2305.pdf + * + * Also supports the EMC2303 fan controller which has the same functionality + * and register layout as EMC2305, but supports only up to 3 fans instead of 5. + * + * Also supports EMC2302 (up to 2 fans) and EMC2301 (1 fan) fan controller. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* + * TODO / IDEAS: + * - expose more of the configuration and features + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Addresses scanned. + * Listed in the same order as they appear in the EMC2305, EMC2303 data sheets. + * + * Note: these are the I2C adresses which are possible for EMC2305 and EMC2303 + * chips. + * The EMC2302 supports only 0x2e (EMC2302-1) and 0x2f (EMC2302-2). + * The EMC2301 supports only 0x2f. + */ +static const unsigned short i2c_adresses[] = { + 0x2E, + 0x2F, + 0x2C, + 0x2D, + 0x4C, + 0x4D, + I2C_CLIENT_END +}; + +/* + * global registers + */ +enum { + REG_CONFIGURATION = 0x20, + REG_FAN_STATUS = 0x24, + REG_FAN_STALL_STATUS = 0x25, + REG_FAN_SPIN_STATUS = 0x26, + REG_DRIVE_FAIL_STATUS = 0x27, + REG_FAN_INTERRUPT_ENABLE = 0x29, + REG_PWM_POLARITY_CONFIG = 0x2a, + REG_PWM_OUTPUT_CONFIG = 0x2b, + REG_PWM_BASE_FREQ_1 = 0x2c, + REG_PWM_BASE_FREQ_2 = 0x2d, + REG_SOFTWARE_LOCK = 0xef, + REG_PRODUCT_FEATURES = 0xfc, + REG_PRODUCT_ID = 0xfd, + REG_MANUFACTURER_ID = 0xfe, + REG_REVISION = 0xff +}; + +/* + * fan specific registers + */ +enum { + REG_FAN_SETTING = 0x30, + REG_PWM_DIVIDE = 0x31, + REG_FAN_CONFIGURATION_1 = 0x32, + REG_FAN_CONFIGURATION_2 = 0x33, + REG_GAIN = 0x35, + REG_FAN_SPIN_UP_CONFIG = 0x36, + REG_FAN_MAX_STEP = 0x37, + REG_FAN_MINIMUM_DRIVE = 0x38, + REG_FAN_VALID_TACH_COUNT = 0x39, + REG_FAN_DRIVE_FAIL_BAND_LOW = 0x3a, + REG_FAN_DRIVE_FAIL_BAND_HIGH = 0x3b, + REG_TACH_TARGET_LOW = 0x3c, + REG_TACH_TARGET_HIGH = 0x3d, + REG_TACH_READ_HIGH = 0x3e, + REG_TACH_READ_LOW = 0x3f, +}; + +#define SEL_FAN(fan, reg) (reg + fan * 0x10) + +/* + * Factor by equations [2] and [3] from data sheet; valid for fans where the + * number of edges equals (poles * 2 + 1). + */ +#define FAN_RPM_FACTOR 3932160 + + +struct emc2305_fan_data { + bool enabled; + bool valid; + unsigned long last_updated; + bool rpm_control; + u8 multiplier; + u8 poles; + u16 target; + u16 tach; + u16 rpm_factor; + u8 pwm; +}; + +struct emc2305_data { + struct device *hwmon_dev; + struct mutex update_lock; + int fans; + struct emc2305_fan_data fan[5]; +}; + +static int read_u8_from_i2c(struct i2c_client *client, u8 i2c_reg, u8 *output) +{ + int status = i2c_smbus_read_byte_data(client, i2c_reg); + if (status < 0) { + dev_warn(&client->dev, "reg 0x%02x, err %d\n", + i2c_reg, status); + } else { + *output = status; + } + return status; +} + +static void read_fan_from_i2c(struct i2c_client *client, u16 *output, + u8 hi_addr, u8 lo_addr) +{ + u8 high_byte, lo_byte; + + if (read_u8_from_i2c(client, hi_addr, &high_byte) < 0) + return; + + if (read_u8_from_i2c(client, lo_addr, &lo_byte) < 0) + return; + + *output = ((u16)high_byte << 5) | (lo_byte >> 3); +} + +static void write_fan_target_to_i2c(struct i2c_client *client, int fan, + u16 new_target) +{ + const u8 lo_reg = SEL_FAN(fan, REG_TACH_TARGET_LOW); + const u8 hi_reg = SEL_FAN(fan, REG_TACH_TARGET_HIGH); + u8 high_byte = (new_target & 0x1fe0) >> 5; + u8 low_byte = (new_target & 0x001f) << 3; + i2c_smbus_write_byte_data(client, lo_reg, low_byte); + i2c_smbus_write_byte_data(client, hi_reg, high_byte); +} + +static void read_fan_config_from_i2c(struct i2c_client *client, int fan) + +{ + struct emc2305_data *data = i2c_get_clientdata(client); + u8 conf1; + + if (read_u8_from_i2c(client, SEL_FAN(fan, REG_FAN_CONFIGURATION_1), + &conf1) < 0) + return; + + data->fan[fan].rpm_control = (conf1 & 0x80) != 0; + data->fan[fan].multiplier = 1 << ((conf1 & 0x60) >> 5); + data->fan[fan].poles = ((conf1 & 0x18) >> 3) + 1; +} + +static void read_fan_setting(struct i2c_client *client, int fan) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + u8 setting; + + if (read_u8_from_i2c(client, SEL_FAN(fan, REG_FAN_SETTING), + &setting) < 0) + return; + + data->fan[fan].pwm = setting; +} + +static void read_fan_data(struct i2c_client *client, int fan_idx) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + + read_fan_from_i2c(client, &data->fan[fan_idx].target, + SEL_FAN(fan_idx, REG_TACH_TARGET_HIGH), + SEL_FAN(fan_idx, REG_TACH_TARGET_LOW)); + read_fan_from_i2c(client, &data->fan[fan_idx].tach, + SEL_FAN(fan_idx, REG_TACH_READ_HIGH), + SEL_FAN(fan_idx, REG_TACH_READ_LOW)); +} + +static struct emc2305_fan_data * +emc2305_update_fan(struct i2c_client *client, int fan_idx) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan_data = &data->fan[fan_idx]; + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, fan_data->last_updated + HZ + HZ / 2) + || !fan_data->valid) { + read_fan_config_from_i2c(client, fan_idx); + read_fan_data(client, fan_idx); + read_fan_setting(client, fan_idx); + fan_data->valid = true; + fan_data->last_updated = jiffies; + } + + mutex_unlock(&data->update_lock); + return fan_data; +} + +static struct emc2305_fan_data * +emc2305_update_device_fan(struct device *dev, struct device_attribute *da) +{ + struct i2c_client *client = to_i2c_client(dev); + int fan_idx = to_sensor_dev_attr(da)->index; + + return emc2305_update_fan(client, fan_idx); +} + +/* + * set/ config functions + */ + +/* + * Note: we also update the fan target here, because its value is + * determined in part by the fan clock divider. This follows the principle + * of least surprise; the user doesn't expect the fan target to change just + * because the divider changed. + */ +static int +emc2305_set_fan_div(struct i2c_client *client, int fan_idx, long new_div) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan = emc2305_update_fan(client, fan_idx); + const u8 reg_conf1 = SEL_FAN(fan_idx, REG_FAN_CONFIGURATION_1); + int new_range_bits, old_div = 8 / fan->multiplier; + int status = 0; + + if (new_div == old_div) /* No change */ + return 0; + + switch (new_div) { + case 1: + new_range_bits = 3; + break; + case 2: + new_range_bits = 2; + break; + case 4: + new_range_bits = 1; + break; + case 8: + new_range_bits = 0; + break; + default: + return -EINVAL; + } + + mutex_lock(&data->update_lock); + + status = i2c_smbus_read_byte_data(client, reg_conf1); + if (status < 0) { + dev_dbg(&client->dev, "reg 0x%02x, err %d\n", + reg_conf1, status); + status = -EIO; + goto exit_unlock; + } + status &= 0x9F; + status |= (new_range_bits << 5); + status = i2c_smbus_write_byte_data(client, reg_conf1, status); + if (status < 0) { + status = -EIO; + goto exit_invalidate; + } + + fan->multiplier = 8 / new_div; + + /* update fan target if high byte is not disabled */ + if ((fan->target & 0x1fe0) != 0x1fe0) { + u16 new_target = (fan->target * old_div) / new_div; + fan->target = min_t(u16, new_target, 0x1fff); + write_fan_target_to_i2c(client, fan_idx, fan->target); + } + +exit_invalidate: + /* invalidate fan data to force re-read from hardware */ + fan->valid = false; +exit_unlock: + mutex_unlock(&data->update_lock); + return status; +} + +static int +emc2305_set_fan_target(struct i2c_client *client, int fan_idx, long rpm_target) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan = emc2305_update_fan(client, fan_idx); + + /* + * Datasheet states 16000 as maximum RPM target + * (table 2.2 and section 4.3) + */ + if ((rpm_target < 0) || (rpm_target > 16000)) + return -EINVAL; + + mutex_lock(&data->update_lock); + + if (rpm_target == 0) + fan->target = 0x1fff; + else + fan->target = clamp_val( + (FAN_RPM_FACTOR * fan->multiplier) / rpm_target, + 0, 0x1fff); + + write_fan_target_to_i2c(client, fan_idx, fan->target); + + mutex_unlock(&data->update_lock); + return 0; +} + +static int +emc2305_set_pwm_enable(struct i2c_client *client, int fan_idx, long enable) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan = emc2305_update_fan(client, fan_idx); + const u8 reg_fan_conf1 = SEL_FAN(fan_idx, REG_FAN_CONFIGURATION_1); + int status = 0; + u8 conf_reg; + + mutex_lock(&data->update_lock); + switch (enable) { + case 0: + fan->rpm_control = false; + break; + case 3: + fan->rpm_control = true; + break; + default: + status = -EINVAL; + goto exit_unlock; + } + + status = read_u8_from_i2c(client, reg_fan_conf1, &conf_reg); + if (status < 0) { + status = -EIO; + goto exit_unlock; + } + + if (fan->rpm_control) + conf_reg |= 0x80; + else + conf_reg &= ~0x80; + + status = i2c_smbus_write_byte_data(client, reg_fan_conf1, conf_reg); + if (status < 0) + status = -EIO; + +exit_unlock: + mutex_unlock(&data->update_lock); + return status; +} + +static int +emc2305_set_pwm(struct i2c_client *client, int fan_idx, long pwm) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan = emc2305_update_fan(client, fan_idx); + const u8 reg_fan_setting = SEL_FAN(fan_idx, REG_FAN_SETTING); + int status = 0; + + /* + * Datasheet states 255 as maximum PWM + * (section 5.7) + */ + if ((pwm < 0) || (pwm > 255)) + return -EINVAL; + + fan->pwm = pwm; + + mutex_lock(&data->update_lock); + + status = i2c_smbus_write_byte_data(client, reg_fan_setting, fan->pwm); + + mutex_unlock(&data->update_lock); + return status; +} +/* + * sysfs callback functions + * + * Note: + * Naming of the funcs is modelled after the naming scheme described in + * Documentation/hwmon/sysfs-interface: + * + * For a sysfs file _ the functions are named like this: + * the show function: show__ + * the store function: set__ + * For read only (RO) attributes of course only the show func is required. + * + * This convention allows us to define the sysfs attributes by using macros. + */ + +static ssize_t +show_fan_input(struct device *dev, struct device_attribute *da, char *buf) +{ + struct emc2305_fan_data *fan = emc2305_update_device_fan(dev, da); + int rpm = 0; + if (fan->tach != 0) + rpm = (FAN_RPM_FACTOR * fan->multiplier) / fan->tach; + return sprintf(buf, "%d\n", rpm); +} + +static ssize_t +show_fan_fault(struct device *dev, struct device_attribute *da, char *buf) +{ + struct emc2305_fan_data *fan = emc2305_update_device_fan(dev, da); + bool fault = ((fan->tach & 0x1fe0) == 0x1fe0); + return sprintf(buf, "%d\n", fault ? 1 : 0); +} + +static ssize_t +show_fan_div(struct device *dev, struct device_attribute *da, char *buf) +{ + struct emc2305_fan_data *fan = emc2305_update_device_fan(dev, da); + int fan_div = 8 / fan->multiplier; + return sprintf(buf, "%d\n", fan_div); +} + +static ssize_t +show_fan_alarm(struct device *dev, struct device_attribute *da, char *buf) +{ + struct emc2305_fan_data *fan = emc2305_update_device_fan(dev, da); + bool fault = ((fan->tach & 0x1fe0) == 0x1fe0); + return sprintf(buf, "%d\n", fault ? 1 : 0); +} + +static ssize_t +set_fan_div(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int fan_idx = to_sensor_dev_attr(da)->index; + long new_div; + int status; + + status = kstrtol(buf, 10, &new_div); + if (status < 0) + return -EINVAL; + + status = emc2305_set_fan_div(client, fan_idx, new_div); + if (status < 0) + return status; + + return count; +} + +static ssize_t +show_fan_target(struct device *dev, struct device_attribute *da, char *buf) +{ + struct emc2305_fan_data *fan = emc2305_update_device_fan(dev, da); + int rpm = 0; + + /* high byte of 0xff indicates disabled so return 0 */ + if ((fan->target != 0) && ((fan->target & 0x1fe0) != 0x1fe0)) + rpm = (FAN_RPM_FACTOR * fan->multiplier) + / fan->target; + + return sprintf(buf, "%d\n", rpm); +} + +static ssize_t set_fan_target(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int fan_idx = to_sensor_dev_attr(da)->index; + long rpm_target; + int status; + + status = kstrtol(buf, 10, &rpm_target); + if (status < 0) + return -EINVAL; + + status = emc2305_set_fan_target(client, fan_idx, rpm_target); + if (status < 0) + return status; + + return count; +} + +static ssize_t +show_pwm_enable(struct device *dev, struct device_attribute *da, char *buf) +{ + struct emc2305_fan_data *fan = emc2305_update_device_fan(dev, da); + return sprintf(buf, "%d\n", fan->rpm_control ? 3 : 0); +} + +static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int fan_idx = to_sensor_dev_attr(da)->index; + long new_value; + int status; + + status = kstrtol(buf, 10, &new_value); + if (status < 0) + return -EINVAL; + status = emc2305_set_pwm_enable(client, fan_idx, new_value); + return count; +} + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct emc2305_fan_data *fan = emc2305_update_device_fan(dev, da); + return sprintf(buf, "%d\n", fan->pwm); +} + +static ssize_t set_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int fan_idx = to_sensor_dev_attr(da)->index; + unsigned long val; + int ret; + int status; + + ret = kstrtoul(buf, 10, &val); + if (ret) + return ret; + if (val > 255) + return -EINVAL; + + status = emc2305_set_pwm(client, fan_idx, val); + return count; +} + +/* define a read only attribute */ +#define EMC2305_ATTR_RO(_type, _item, _num) \ + SENSOR_ATTR(_type ## _num ## _ ## _item, S_IRUGO, \ + show_## _type ## _ ## _item, NULL, _num - 1) + +/* define a read/write attribute */ +#define EMC2305_ATTR_RW(_type, _item, _num) \ + SENSOR_ATTR(_type ## _num ## _ ## _item, S_IRUGO | S_IWUSR, \ + show_## _type ##_ ## _item, \ + set_## _type ## _ ## _item, _num - 1) + +/* + * TODO: Ugly hack, but temporary as this whole logic needs + * to be rewritten as per standard HWMON sysfs registration + */ + +/* define a read/write attribute */ +#define EMC2305_ATTR_RW2(_type, _num) \ + SENSOR_ATTR(_type ## _num, S_IRUGO | S_IWUSR, \ + show_## _type, set_## _type, _num - 1) + +/* defines the attributes for a single fan */ +#define EMC2305_DEFINE_FAN_ATTRS(_num) \ + static const \ + struct sensor_device_attribute emc2305_attr_fan ## _num[] = { \ + EMC2305_ATTR_RO(fan, input, _num), \ + EMC2305_ATTR_RO(fan, fault, _num), \ + EMC2305_ATTR_RW(fan, div, _num), \ + EMC2305_ATTR_RO(fan, alarm, _num), \ + EMC2305_ATTR_RW(fan, target, _num), \ + EMC2305_ATTR_RW(pwm, enable, _num), \ + EMC2305_ATTR_RW2(pwm, _num) \ + } + +#define EMC2305_NUM_FAN_ATTRS ARRAY_SIZE(emc2305_attr_fan1) + +/* common attributes for EMC2303 and EMC2305 */ +static const struct sensor_device_attribute emc2305_attr_common[] = { +}; + +/* fan attributes for the single fans */ +EMC2305_DEFINE_FAN_ATTRS(1); +EMC2305_DEFINE_FAN_ATTRS(2); +EMC2305_DEFINE_FAN_ATTRS(3); +EMC2305_DEFINE_FAN_ATTRS(4); +EMC2305_DEFINE_FAN_ATTRS(5); +EMC2305_DEFINE_FAN_ATTRS(6); + +/* fan attributes */ +static const struct sensor_device_attribute *emc2305_fan_attrs[] = { + emc2305_attr_fan1, + emc2305_attr_fan2, + emc2305_attr_fan3, + emc2305_attr_fan4, + emc2305_attr_fan5, +}; + +/* + * driver interface + */ + +static int emc2305_remove(struct i2c_client *client) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + int fan_idx, i; + + hwmon_device_unregister(data->hwmon_dev); + + for (fan_idx = 0; fan_idx < data->fans; ++fan_idx) + for (i = 0; i < EMC2305_NUM_FAN_ATTRS; ++i) + device_remove_file( + &client->dev, + &emc2305_fan_attrs[fan_idx][i].dev_attr); + + for (i = 0; i < ARRAY_SIZE(emc2305_attr_common); ++i) + device_remove_file(&client->dev, + &emc2305_attr_common[i].dev_attr); + + kfree(data); + return 0; +} + + +#ifdef CONFIG_OF +/* + * device tree support + */ + +struct of_fan_attribute { + const char *name; + int (*set)(struct i2c_client*, int, long); +}; + +struct of_fan_attribute of_fan_attributes[] = { + {"fan-div", emc2305_set_fan_div}, + {"fan-target", emc2305_set_fan_target}, + {"pwm-enable", emc2305_set_pwm_enable}, + {NULL, NULL} +}; + +static int emc2305_config_of(struct i2c_client *client) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct device_node *node; + unsigned int fan_idx; + + if (!client->dev.of_node) + return -EINVAL; + if (!of_get_next_child(client->dev.of_node, NULL)) + return 0; + + for (fan_idx = 0; fan_idx < data->fans; ++fan_idx) + data->fan[fan_idx].enabled = false; + + for_each_child_of_node(client->dev.of_node, node) { + const __be32 *property; + int len; + struct of_fan_attribute *attr; + + property = of_get_property(node, "reg", &len); + if (!property || len != sizeof(int)) { + dev_err(&client->dev, "invalid reg on %s\n", + node->full_name); + continue; + } + + fan_idx = be32_to_cpup(property); + if (fan_idx >= data->fans) { + dev_err(&client->dev, + "invalid fan index %d on %s\n", + fan_idx, node->full_name); + continue; + } + + data->fan[fan_idx].enabled = true; + + for (attr = of_fan_attributes; attr->name; ++attr) { + int status = 0; + long value; + property = of_get_property(node, attr->name, &len); + if (!property) + continue; + if (len != sizeof(int)) { + dev_err(&client->dev, "invalid %s on %s\n", + attr->name, node->full_name); + continue; + } + value = be32_to_cpup(property); + status = attr->set(client, fan_idx, value); + if (status == -EINVAL) { + dev_err(&client->dev, + "invalid value for %s on %s\n", + attr->name, node->full_name); + } + } + } + + return 0; +} + +#endif + +static void emc2305_get_config(struct i2c_client *client) +{ + int i; + struct emc2305_data *data = i2c_get_clientdata(client); + + for (i = 0; i < data->fans; ++i) { + data->fan[i].enabled = true; + emc2305_update_fan(client, i); + } + +#ifdef CONFIG_OF + emc2305_config_of(client); +#endif + +} + +static int +emc2305_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct emc2305_data *data; + int status; + int i; + int fan_idx; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct emc2305_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + status = i2c_smbus_read_byte_data(client, REG_PRODUCT_ID); + switch (status) { + case 0x34: /* EMC2305 */ + data->fans = 5; + break; + case 0x35: /* EMC2303 */ + data->fans = 3; + break; + case 0x36: /* EMC2302 */ + data->fans = 2; + break; + case 0x37: /* EMC2301 */ + data->fans = 1; + break; + default: + if (status >= 0) + status = -EINVAL; + goto exit_free; + } + + emc2305_get_config(client); + + for (i = 0; i < ARRAY_SIZE(emc2305_attr_common); ++i) { + status = device_create_file(&client->dev, + &emc2305_attr_common[i].dev_attr); + if (status) + goto exit_remove; + } + for (fan_idx = 0; fan_idx < data->fans; ++fan_idx) + for (i = 0; i < EMC2305_NUM_FAN_ATTRS; ++i) { + if (!data->fan[fan_idx].enabled) + continue; + status = device_create_file( + &client->dev, + &emc2305_fan_attrs[fan_idx][i].dev_attr); + if (status) + goto exit_remove_fans; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove_fans; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove_fans: + for (fan_idx = 0; fan_idx < data->fans; ++fan_idx) + for (i = 0; i < EMC2305_NUM_FAN_ATTRS; ++i) + device_remove_file( + &client->dev, + &emc2305_fan_attrs[fan_idx][i].dev_attr); + +exit_remove: + for (i = 0; i < ARRAY_SIZE(emc2305_attr_common); ++i) + device_remove_file(&client->dev, + &emc2305_attr_common[i].dev_attr); +exit_free: + kfree(data); + return status; +} + +static const struct i2c_device_id emc2305_id[] = { + { "emc2305", 0 }, + { "emc2303", 0 }, + { "emc2302", 0 }, + { "emc2301", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, emc2305_id); + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int +emc2305_detect(struct i2c_client *new_client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = new_client->adapter; + int manufacturer, product; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) + return -ENODEV; + + manufacturer = + i2c_smbus_read_byte_data(new_client, REG_MANUFACTURER_ID); + if (manufacturer != 0x5D) + return -ENODEV; + + product = i2c_smbus_read_byte_data(new_client, REG_PRODUCT_ID); + + switch (product) { + case 0x34: + strlcpy(info->type, "emc2305", I2C_NAME_SIZE); + break; + case 0x35: + strlcpy(info->type, "emc2303", I2C_NAME_SIZE); + break; + case 0x36: + strlcpy(info->type, "emc2302", I2C_NAME_SIZE); + break; + case 0x37: + strlcpy(info->type, "emc2301", I2C_NAME_SIZE); + break; + default: + return -ENODEV; + } + + return 0; +} + +static struct i2c_driver emc2305_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "emc2305", + }, + .probe = emc2305_probe, + .remove = emc2305_remove, + .id_table = emc2305_id, +/* + .detect = emc2305_detect, + .address_list = i2c_adresses, +*/ +}; + +module_i2c_driver(emc2305_driver); + +MODULE_AUTHOR("Reinhard Pfau "); +MODULE_DESCRIPTION("SMSC EMC2305 hwmon driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/dx010/modules/leds-dx010.c b/platform/broadcom/sonic-platform-modules-cel/dx010/modules/leds-dx010.c new file mode 100644 index 00000000000..fac8322f06b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/dx010/modules/leds-dx010.c @@ -0,0 +1,289 @@ +/* + * leds-dx010-status.c - Driver for Seastone DX010 front panel LEDs + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include + +#define DRIVER_NAME "leds_dx010" +#define FRONT_LED_STAT 0x303 + +static int dx010_led_blink_stat(struct led_classdev *led_cdev, + unsigned long *delay_on, + unsigned long *delay_off) +{ + unsigned char led; + + if (!(*delay_on == 0 && *delay_off == 0) && + !(*delay_on == 250 && *delay_off == 250) && + !(*delay_on == 500 && *delay_off == 500)) + return -EINVAL; + + led = inb(FRONT_LED_STAT); + led &= 0xfc; + + if ((*delay_on == 250) && (*delay_off == 250)) + led |= 0x02; + else if ((*delay_on == 500) && (*delay_off == 500)) + led |= 0x01; + + outb(led, FRONT_LED_STAT); + + return 0; +} + +static ssize_t dx010_led_blink_show_stat(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct led_classdev *leddev = dev_get_drvdata(dev); + unsigned char led; + const char *msg; + + led = inb(FRONT_LED_STAT); + led &= 0x03; + + switch (led) + { + case 0: + msg = "No blinking, turn on"; + break; + case 1: + msg = "1 Hz is blinking"; + break; + case 2: + msg = "4 Hz is blinking"; + break; + case 3: + msg = "No blinking, turn off"; + break; + default: + msg = "Unknown error"; + break; + } + + return sprintf(buf, "%s\n", msg); +} + +static ssize_t dx010_led_blink_store_stat(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret; + struct led_classdev *leddev = dev_get_drvdata(dev); + unsigned long blink_state; + unsigned char led; + + ret = kstrtoul(buf, 10, &blink_state); + if (ret) + return ret; + + led = inb(FRONT_LED_STAT); + led &= 0xfc; + + switch (blink_state) + { + case 0: + led |= 0x03; + break; + case 1: + break; + case 250: + led |= 0x02; + break; + case 500: + led |= 0x01; + break; + default: + return -EINVAL; + break; + } + + outb(led, FRONT_LED_STAT); + + return size; +} +static DEVICE_ATTR(blink, 0644, dx010_led_blink_show_stat, dx010_led_blink_store_stat); + +static void dx010_led_brightness_set_stat(struct led_classdev *led_cdev, + enum led_brightness brightness) +{ + unsigned char led; + + led = inb(FRONT_LED_STAT); + led &= 0xfc; + + if (!brightness) + led |= 0x03; + + outb( led, FRONT_LED_STAT); +} + +enum led_brightness dx010_led_brightness_get_p2(struct led_classdev *led_cdev) +{ + unsigned char led; + + led = inb(FRONT_LED_STAT); + + return (led & 0x08) ? LED_OFF : LED_FULL; +} + +static void dx010_led_brightness_set_p2(struct led_classdev *led_cdev, + enum led_brightness brightness) +{ + unsigned char led; + + led = inb(FRONT_LED_STAT); + led &= 0xf7; + + if (!brightness) + led |= 0x08; + + outb( led, FRONT_LED_STAT); +} + +enum led_brightness dx010_led_brightness_get_p1(struct led_classdev *led_cdev) +{ + unsigned char led; + + led = inb(FRONT_LED_STAT); + + return (led & 0x04) ? LED_OFF : LED_FULL; +} + +static void dx010_led_brightness_set_p1(struct led_classdev *led_cdev, + enum led_brightness brightness) +{ + unsigned char led; + + led = inb(FRONT_LED_STAT); + led &= 0xfb; + + if (!brightness) + led |= 0x04; + + outb( led, FRONT_LED_STAT); +} + +static struct led_classdev dx010_leds[] = { + { + .name = "dx010:green:p-1", + .brightness = LED_OFF, + .max_brightness = 1, + .brightness_get = dx010_led_brightness_get_p1, + .brightness_set = dx010_led_brightness_set_p1, + }, + { + .name = "dx010:green:p-2", + .brightness = LED_OFF, + .max_brightness = 1, + .brightness_get = dx010_led_brightness_get_p2, + .brightness_set = dx010_led_brightness_set_p2, + }, + { + .name = "dx010:green:stat", + .brightness = LED_OFF, + .max_brightness = 1, + .brightness_set = dx010_led_brightness_set_stat, + .blink_set = dx010_led_blink_stat, + .flags = LED_CORE_SUSPENDRESUME, + }, +}; + +static struct resource dx010_led_resources[] = { + { + .flags = IORESOURCE_IO, + }, +}; + +static void dx010_led_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device dx010_lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(dx010_led_resources), + .resource = dx010_led_resources, + .dev = { + .release = dx010_led_dev_release, + } +}; + +static int dx010_led_drv_probe(struct platform_device *pdev) +{ + int i, ret; + + for (i = 0; i < ARRAY_SIZE(dx010_leds); i++) { + ret = led_classdev_register(&pdev->dev, &dx010_leds[i]); + if (ret < 0) + goto exit; + } + + ret = device_create_file(&pdev->dev, &dev_attr_blink); + if (ret) + { + for (i = 0; i < ARRAY_SIZE(dx010_leds); i++) + led_classdev_unregister(&dx010_leds[i]); + } +exit: + return ret; +} + +static int dx010_led_drv_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(dx010_leds); i++) + led_classdev_unregister(&dx010_leds[i]); + + device_remove_file(&pdev->dev, &dev_attr_blink); + + return 0; +} + +static struct platform_driver dx010_led_drv = { + .probe = dx010_led_drv_probe, + .remove = __exit_p(dx010_led_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int dx010_led_init(void) +{ + platform_device_register(&dx010_lpc_dev); + platform_driver_register(&dx010_led_drv); + + return 0; +} + +void dx010_led_exit(void) +{ + platform_driver_unregister(&dx010_led_drv); + platform_device_unregister(&dx010_lpc_dev); +} + +module_init(dx010_led_init); +module_exit(dx010_led_exit); + +MODULE_AUTHOR("Abhisit Sangjan "); +MODULE_DESCRIPTION("Celestica SeaStone DX010 LEDs Front Panel Status Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/dx010/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/dx010/modules/mc24lc64t.c new file mode 100644 index 00000000000..a391056d09a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/dx010/modules/mc24lc64t.c @@ -0,0 +1,142 @@ +/* + * mc24lc64t.c - driver for Microchip 24LC64T + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct mc24lc64t_data { + struct i2c_client *fake_client; + struct mutex update_lock; +}; + +static ssize_t mc24lc64t_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, read_time, i = 0; + int status; + + mutex_lock(&drvdata->update_lock); + + if (i2c_smbus_write_byte_data(client, off>>8, off)) + { + status = -EIO; + goto exit; + } + + msleep(1); + +begin: + + if (i < count) + { + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + do { + read_time = jiffies; + + status = i2c_smbus_read_byte(client); + if (status >= 0) + { + buf[i++] = status; + goto begin; + } + } while (time_before(read_time, timeout)); + + status = -ETIMEDOUT; + goto exit; + } + + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + + return status; +} + +static struct bin_attribute mc24lc64t_bit_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = 65536, + .read = mc24lc64t_read, +}; + +static int mc24lc64t_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adapter = client->adapter; + struct mc24lc64t_data *drvdata; + int err; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA + | I2C_FUNC_SMBUS_READ_BYTE)) + return -EPFNOSUPPORT; + + if (!(drvdata = devm_kzalloc(&client->dev, + sizeof(struct mc24lc64t_data), GFP_KERNEL))) + return -ENOMEM; + + drvdata->fake_client = i2c_new_dummy(client->adapter, client->addr + 1); + if (!drvdata->fake_client) + return -ENOMEM; + + i2c_set_clientdata(client, drvdata); + mutex_init(&drvdata->update_lock); + + err = sysfs_create_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + if (err) + i2c_unregister_device(drvdata->fake_client); + + return err; +} + +static int mc24lc64t_remove(struct i2c_client *client) +{ + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + + i2c_unregister_device(drvdata->fake_client); + + sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + + return 0; +} + +static const struct i2c_device_id mc24lc64t_id[] = { + { "24lc64t", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mc24lc64t_id); + +static struct i2c_driver mc24lc64t_driver = { + .driver = { + .name = "mc24lc64t", + .owner = THIS_MODULE, + }, + .probe = mc24lc64t_probe, + .remove = mc24lc64t_remove, + .id_table = mc24lc64t_id, +}; + +module_i2c_driver(mc24lc64t_driver); + +MODULE_AUTHOR("Abhisit Sangjan "); +MODULE_DESCRIPTION("Microchip 24LC64T Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/dx010/scripts/dx010_check_qsfp.sh b/platform/broadcom/sonic-platform-modules-cel/dx010/scripts/dx010_check_qsfp.sh new file mode 100644 index 00000000000..938b07952e0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/dx010/scripts/dx010_check_qsfp.sh @@ -0,0 +1,7 @@ +#!/bin/bash + +#Usage: +# TBD + +echo "Do we need to check qsfp?" + diff --git a/platform/broadcom/sonic-platform-modules-cel/dx010/setup.py b/platform/broadcom/sonic-platform-modules-cel/dx010/setup.py new file mode 100644 index 00000000000..8183788184a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/dx010/setup.py @@ -0,0 +1,34 @@ +from setuptools import setup + +DEVICE_NAME = 'celestica' +HW_SKU = 'x86_64-cel_seastone-r0' + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Wirut Getbamrung', + maintainer_email='wgetbumr@celestica.com', + packages=[ + 'sonic_platform', + ], + package_dir={ + 'sonic_platform': '../../../../device/{}/{}/sonic_platform'.format(DEVICE_NAME, HW_SKU)}, + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 2.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/dx010/systemd/platform-modules-dx010.service b/platform/broadcom/sonic-platform-modules-cel/dx010/systemd/platform-modules-dx010.service new file mode 100644 index 00000000000..32827dcf0de --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/dx010/systemd/platform-modules-dx010.service @@ -0,0 +1,14 @@ + +[Unit] +Description=Celestica Seastone dx010 platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-dx010 start +ExecStop=-/etc/init.d/platform-modules-dx010 stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/haliburton/cfg/haliburton-modules.conf b/platform/broadcom/sonic-platform-modules-cel/haliburton/cfg/haliburton-modules.conf new file mode 100644 index 00000000000..66f002a5fc9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/haliburton/cfg/haliburton-modules.conf @@ -0,0 +1,15 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-gpio +i2c-mux-pca954x + diff --git a/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/Makefile new file mode 100644 index 00000000000..415d1b5e62f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/Makefile @@ -0,0 +1 @@ +obj-m := mc24lc64t.o emc2305.o smc.o hlx_gpio_ich.o dps200.o diff --git a/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/dps200.c b/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/dps200.c new file mode 100644 index 00000000000..6d5afdfb78b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/dps200.c @@ -0,0 +1,128 @@ +/* + * Hardware monitoring driver for Delta DPS200 + * + * (C) Copyright 2019, Celestica Inc. + * Author: Pradchaya Phucharoen + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "pmbus.h" + + +static int dps200_read_word_data(struct i2c_client *client, int page, int reg) +{ + + if (reg >= PMBUS_VIRT_BASE || + reg == PMBUS_VOUT_OV_FAULT_LIMIT || + reg == PMBUS_VOUT_OV_WARN_LIMIT || + reg == PMBUS_VOUT_UV_WARN_LIMIT || + reg == PMBUS_VOUT_UV_FAULT_LIMIT || + reg == PMBUS_IOUT_OC_LV_FAULT_LIMIT || + reg == PMBUS_IOUT_UC_FAULT_LIMIT || + reg == PMBUS_UT_WARN_LIMIT || + reg == PMBUS_UT_FAULT_LIMIT || + reg == PMBUS_VIN_OV_FAULT_LIMIT || + reg == PMBUS_VIN_OV_WARN_LIMIT || + reg == PMBUS_IIN_OC_FAULT_LIMIT || + reg == PMBUS_POUT_MAX) + return -ENXIO; + + /* + * WARNING: The following feild have coinstant driver value. + * If the register are + * PMBUS_IOUT_OC_WARN_LIMIT or PMBUS_IOUT_OC_FAULT_LIMIT convert + * the constant value from linear to direct fomat. + */ + if (reg == PMBUS_IOUT_OC_WARN_LIMIT) + return 0xb4; + else if (reg == PMBUS_IOUT_OC_FAULT_LIMIT) + return 0xc8; + else + return pmbus_read_word_data(client, page, reg); +} + +/* + * Form DPS-200 datasheet the supported sensors format defined as: + * VOUT: direct mode with one decimal place. + * + * Other sensors: + * IOUT: direct mode with one decimal place. + * IOUT Limits: linear mode, which difference from IOUT. + * VIN, IIN, POWER, TEMP, & FAN: linear mode. + */ +static struct pmbus_driver_info dps200_info = { + .pages = 1, + .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT + | PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT + | PMBUS_HAVE_PIN | PMBUS_HAVE_POUT + | PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12 + | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP + | PMBUS_HAVE_STATUS_INPUT, + .format = { + [PSC_VOLTAGE_OUT] = direct, + [PSC_CURRENT_OUT] = direct, + }, + .m = { + [PSC_VOLTAGE_OUT] = 10, + [PSC_CURRENT_OUT] = 10, + }, + .b = { + [PSC_VOLTAGE_OUT] = 0, + [PSC_CURRENT_OUT] = 0, + }, + .R = { + [PSC_VOLTAGE_OUT] = 0, + [PSC_CURRENT_OUT] = 0, + }, + .read_word_data = &dps200_read_word_data, +}; + +static int pmbus_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + return pmbus_do_probe(client, id, &dps200_info); +} +/* user driver datat to pass the grpup */ +static const struct i2c_device_id dps200_id[] = { + {"dps200", 0}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, dps200_id); + +/* This is the driver that will be inserted */ +static struct i2c_driver dps200_driver = { + .driver = { + .name = "dps200", + }, + .probe = pmbus_probe, + .remove = pmbus_do_remove, + .id_table = dps200_id, +}; + +module_i2c_driver(dps200_driver); + +MODULE_AUTHOR("Pradchaya Phucharoen"); +MODULE_DESCRIPTION("PMBus driver for Delta DPS200"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/emc2305.c b/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/emc2305.c new file mode 100644 index 00000000000..f08033e080c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/emc2305.c @@ -0,0 +1,877 @@ +/* + * emc2305.c - hwmon driver for SMSC EMC2305 fan controller + * (C) Copyright 2013 + * Reinhard Pfau, Guntermann & Drunck GmbH + * + * Based on emc2103 driver by SMSC. + * + * Datasheet available at: + * http://www.smsc.com/Downloads/SMSC/Downloads_Public/Data_Sheets/2305.pdf + * + * Also supports the EMC2303 fan controller which has the same functionality + * and register layout as EMC2305, but supports only up to 3 fans instead of 5. + * + * Also supports EMC2302 (up to 2 fans) and EMC2301 (1 fan) fan controller. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* + * TODO / IDEAS: + * - expose more of the configuration and features + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Addresses scanned. + * Listed in the same order as they appear in the EMC2305, EMC2303 data sheets. + * + * Note: these are the I2C adresses which are possible for EMC2305 and EMC2303 + * chips. + * The EMC2302 supports only 0x2e (EMC2302-1) and 0x2f (EMC2302-2). + * The EMC2301 supports only 0x2f. + */ +static const unsigned short i2c_adresses[] = { + 0x2E, + 0x2F, + 0x2C, + 0x2D, + 0x4C, + 0x4D, + I2C_CLIENT_END +}; + +/* + * global registers + */ +enum { + REG_CONFIGURATION = 0x20, + REG_FAN_STATUS = 0x24, + REG_FAN_STALL_STATUS = 0x25, + REG_FAN_SPIN_STATUS = 0x26, + REG_DRIVE_FAIL_STATUS = 0x27, + REG_FAN_INTERRUPT_ENABLE = 0x29, + REG_PWM_POLARITY_CONFIG = 0x2a, + REG_PWM_OUTPUT_CONFIG = 0x2b, + REG_PWM_BASE_FREQ_1 = 0x2c, + REG_PWM_BASE_FREQ_2 = 0x2d, + REG_SOFTWARE_LOCK = 0xef, + REG_PRODUCT_FEATURES = 0xfc, + REG_PRODUCT_ID = 0xfd, + REG_MANUFACTURER_ID = 0xfe, + REG_REVISION = 0xff +}; + +/* + * fan specific registers + */ +enum { + REG_FAN_SETTING = 0x30, + REG_PWM_DIVIDE = 0x31, + REG_FAN_CONFIGURATION_1 = 0x32, + REG_FAN_CONFIGURATION_2 = 0x33, + REG_GAIN = 0x35, + REG_FAN_SPIN_UP_CONFIG = 0x36, + REG_FAN_MAX_STEP = 0x37, + REG_FAN_MINIMUM_DRIVE = 0x38, + REG_FAN_VALID_TACH_COUNT = 0x39, + REG_FAN_DRIVE_FAIL_BAND_LOW = 0x3a, + REG_FAN_DRIVE_FAIL_BAND_HIGH = 0x3b, + REG_TACH_TARGET_LOW = 0x3c, + REG_TACH_TARGET_HIGH = 0x3d, + REG_TACH_READ_HIGH = 0x3e, + REG_TACH_READ_LOW = 0x3f, +}; + +#define SEL_FAN(fan, reg) (reg + fan * 0x10) + +/* + * Factor by equations [2] and [3] from data sheet; valid for fans where the + * number of edges equals (poles * 2 + 1). + */ +#define FAN_RPM_FACTOR 3932160 + + +struct emc2305_fan_data { + bool enabled; + bool valid; + unsigned long last_updated; + bool rpm_control; + u8 multiplier; + u8 poles; + u16 target; + u16 tach; + u16 rpm_factor; + u8 pwm; +}; + +struct emc2305_data { + struct device *hwmon_dev; + struct mutex update_lock; + int fans; + struct emc2305_fan_data fan[5]; +}; + +static int read_u8_from_i2c(struct i2c_client *client, u8 i2c_reg, u8 *output) +{ + int status = i2c_smbus_read_byte_data(client, i2c_reg); + if (status < 0) { + dev_warn(&client->dev, "reg 0x%02x, err %d\n", + i2c_reg, status); + } else { + *output = status; + } + return status; +} + +static void read_fan_from_i2c(struct i2c_client *client, u16 *output, + u8 hi_addr, u8 lo_addr) +{ + u8 high_byte, lo_byte; + + if (read_u8_from_i2c(client, hi_addr, &high_byte) < 0) + return; + + if (read_u8_from_i2c(client, lo_addr, &lo_byte) < 0) + return; + + *output = ((u16)high_byte << 5) | (lo_byte >> 3); +} + +static void write_fan_target_to_i2c(struct i2c_client *client, int fan, + u16 new_target) +{ + const u8 lo_reg = SEL_FAN(fan, REG_TACH_TARGET_LOW); + const u8 hi_reg = SEL_FAN(fan, REG_TACH_TARGET_HIGH); + u8 high_byte = (new_target & 0x1fe0) >> 5; + u8 low_byte = (new_target & 0x001f) << 3; + i2c_smbus_write_byte_data(client, lo_reg, low_byte); + i2c_smbus_write_byte_data(client, hi_reg, high_byte); +} + +static void read_fan_config_from_i2c(struct i2c_client *client, int fan) + +{ + struct emc2305_data *data = i2c_get_clientdata(client); + u8 conf1; + + if (read_u8_from_i2c(client, SEL_FAN(fan, REG_FAN_CONFIGURATION_1), + &conf1) < 0) + return; + + data->fan[fan].rpm_control = (conf1 & 0x80) != 0; + data->fan[fan].multiplier = 1 << ((conf1 & 0x60) >> 5); + data->fan[fan].poles = ((conf1 & 0x18) >> 3) + 1; +} + +static void read_fan_setting(struct i2c_client *client, int fan) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + u8 setting; + + if (read_u8_from_i2c(client, SEL_FAN(fan, REG_FAN_SETTING), + &setting) < 0) + return; + + data->fan[fan].pwm = setting; +} + +static void read_fan_data(struct i2c_client *client, int fan_idx) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + + read_fan_from_i2c(client, &data->fan[fan_idx].target, + SEL_FAN(fan_idx, REG_TACH_TARGET_HIGH), + SEL_FAN(fan_idx, REG_TACH_TARGET_LOW)); + read_fan_from_i2c(client, &data->fan[fan_idx].tach, + SEL_FAN(fan_idx, REG_TACH_READ_HIGH), + SEL_FAN(fan_idx, REG_TACH_READ_LOW)); +} + +static struct emc2305_fan_data * +emc2305_update_fan(struct i2c_client *client, int fan_idx) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan_data = &data->fan[fan_idx]; + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, fan_data->last_updated + HZ + HZ / 2) + || !fan_data->valid) { + read_fan_config_from_i2c(client, fan_idx); + read_fan_data(client, fan_idx); + read_fan_setting(client, fan_idx); + fan_data->valid = true; + fan_data->last_updated = jiffies; + } + + mutex_unlock(&data->update_lock); + return fan_data; +} + +static struct emc2305_fan_data * +emc2305_update_device_fan(struct device *dev, struct device_attribute *da) +{ + struct i2c_client *client = to_i2c_client(dev); + int fan_idx = to_sensor_dev_attr(da)->index; + + return emc2305_update_fan(client, fan_idx); +} + +/* + * set/ config functions + */ + +/* + * Note: we also update the fan target here, because its value is + * determined in part by the fan clock divider. This follows the principle + * of least surprise; the user doesn't expect the fan target to change just + * because the divider changed. + */ +static int +emc2305_set_fan_div(struct i2c_client *client, int fan_idx, long new_div) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan = emc2305_update_fan(client, fan_idx); + const u8 reg_conf1 = SEL_FAN(fan_idx, REG_FAN_CONFIGURATION_1); + int new_range_bits, old_div = 8 / fan->multiplier; + int status = 0; + + if (new_div == old_div) /* No change */ + return 0; + + switch (new_div) { + case 1: + new_range_bits = 3; + break; + case 2: + new_range_bits = 2; + break; + case 4: + new_range_bits = 1; + break; + case 8: + new_range_bits = 0; + break; + default: + return -EINVAL; + } + + mutex_lock(&data->update_lock); + + status = i2c_smbus_read_byte_data(client, reg_conf1); + if (status < 0) { + dev_dbg(&client->dev, "reg 0x%02x, err %d\n", + reg_conf1, status); + status = -EIO; + goto exit_unlock; + } + status &= 0x9F; + status |= (new_range_bits << 5); + status = i2c_smbus_write_byte_data(client, reg_conf1, status); + if (status < 0) { + status = -EIO; + goto exit_invalidate; + } + + fan->multiplier = 8 / new_div; + + /* update fan target if high byte is not disabled */ + if ((fan->target & 0x1fe0) != 0x1fe0) { + u16 new_target = (fan->target * old_div) / new_div; + fan->target = min_t(u16, new_target, 0x1fff); + write_fan_target_to_i2c(client, fan_idx, fan->target); + } + +exit_invalidate: + /* invalidate fan data to force re-read from hardware */ + fan->valid = false; +exit_unlock: + mutex_unlock(&data->update_lock); + return status; +} + +static int +emc2305_set_fan_target(struct i2c_client *client, int fan_idx, long rpm_target) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan = emc2305_update_fan(client, fan_idx); + + /* + * Datasheet states 16000 as maximum RPM target + * (table 2.2 and section 4.3) + */ + if ((rpm_target < 0) || (rpm_target > 16000)) + return -EINVAL; + + mutex_lock(&data->update_lock); + + if (rpm_target == 0) + fan->target = 0x1fff; + else + fan->target = clamp_val( + (FAN_RPM_FACTOR * fan->multiplier) / rpm_target, + 0, 0x1fff); + + write_fan_target_to_i2c(client, fan_idx, fan->target); + + mutex_unlock(&data->update_lock); + return 0; +} + +static int +emc2305_set_pwm_enable(struct i2c_client *client, int fan_idx, long enable) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan = emc2305_update_fan(client, fan_idx); + const u8 reg_fan_conf1 = SEL_FAN(fan_idx, REG_FAN_CONFIGURATION_1); + int status = 0; + u8 conf_reg; + + mutex_lock(&data->update_lock); + switch (enable) { + case 0: + fan->rpm_control = false; + break; + case 3: + fan->rpm_control = true; + break; + default: + status = -EINVAL; + goto exit_unlock; + } + + status = read_u8_from_i2c(client, reg_fan_conf1, &conf_reg); + if (status < 0) { + status = -EIO; + goto exit_unlock; + } + + if (fan->rpm_control) + conf_reg |= 0x80; + else + conf_reg &= ~0x80; + + status = i2c_smbus_write_byte_data(client, reg_fan_conf1, conf_reg); + if (status < 0) + status = -EIO; + +exit_unlock: + mutex_unlock(&data->update_lock); + return status; +} + +static int +emc2305_set_pwm(struct i2c_client *client, int fan_idx, long pwm) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan = emc2305_update_fan(client, fan_idx); + const u8 reg_fan_setting = SEL_FAN(fan_idx, REG_FAN_SETTING); + int status = 0; + + /* + * Datasheet states 255 as maximum PWM + * (section 5.7) + */ + if ((pwm < 0) || (pwm > 255)) + return -EINVAL; + + fan->pwm = pwm; + + mutex_lock(&data->update_lock); + + status = i2c_smbus_write_byte_data(client, reg_fan_setting, fan->pwm); + + mutex_unlock(&data->update_lock); + return status; +} +/* + * sysfs callback functions + * + * Note: + * Naming of the funcs is modelled after the naming scheme described in + * Documentation/hwmon/sysfs-interface: + * + * For a sysfs file _ the functions are named like this: + * the show function: show__ + * the store function: set__ + * For read only (RO) attributes of course only the show func is required. + * + * This convention allows us to define the sysfs attributes by using macros. + */ + +static ssize_t +show_fan_input(struct device *dev, struct device_attribute *da, char *buf) +{ + struct emc2305_fan_data *fan = emc2305_update_device_fan(dev, da); + int rpm = 0; + if (fan->tach != 0) + rpm = (FAN_RPM_FACTOR * fan->multiplier) / fan->tach; + return sprintf(buf, "%d\n", rpm); +} + +static ssize_t +show_fan_fault(struct device *dev, struct device_attribute *da, char *buf) +{ + struct emc2305_fan_data *fan = emc2305_update_device_fan(dev, da); + bool fault = ((fan->tach & 0x1fe0) == 0x1fe0); + return sprintf(buf, "%d\n", fault ? 1 : 0); +} + +static ssize_t +show_fan_div(struct device *dev, struct device_attribute *da, char *buf) +{ + struct emc2305_fan_data *fan = emc2305_update_device_fan(dev, da); + int fan_div = 8 / fan->multiplier; + return sprintf(buf, "%d\n", fan_div); +} + +static ssize_t +set_fan_div(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int fan_idx = to_sensor_dev_attr(da)->index; + long new_div; + int status; + + status = kstrtol(buf, 10, &new_div); + if (status < 0) + return -EINVAL; + + status = emc2305_set_fan_div(client, fan_idx, new_div); + if (status < 0) + return status; + + return count; +} + +static ssize_t +show_fan_target(struct device *dev, struct device_attribute *da, char *buf) +{ + struct emc2305_fan_data *fan = emc2305_update_device_fan(dev, da); + int rpm = 0; + + /* high byte of 0xff indicates disabled so return 0 */ + if ((fan->target != 0) && ((fan->target & 0x1fe0) != 0x1fe0)) + rpm = (FAN_RPM_FACTOR * fan->multiplier) + / fan->target; + + return sprintf(buf, "%d\n", rpm); +} + +static ssize_t set_fan_target(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int fan_idx = to_sensor_dev_attr(da)->index; + long rpm_target; + int status; + + status = kstrtol(buf, 10, &rpm_target); + if (status < 0) + return -EINVAL; + + status = emc2305_set_fan_target(client, fan_idx, rpm_target); + if (status < 0) + return status; + + return count; +} + +static ssize_t +show_pwm_enable(struct device *dev, struct device_attribute *da, char *buf) +{ + struct emc2305_fan_data *fan = emc2305_update_device_fan(dev, da); + return sprintf(buf, "%d\n", fan->rpm_control ? 3 : 0); +} + +static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int fan_idx = to_sensor_dev_attr(da)->index; + long new_value; + int status; + + status = kstrtol(buf, 10, &new_value); + if (status < 0) + return -EINVAL; + status = emc2305_set_pwm_enable(client, fan_idx, new_value); + return count; +} + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct emc2305_fan_data *fan = emc2305_update_device_fan(dev, da); + return sprintf(buf, "%d\n", fan->pwm); +} + +static ssize_t set_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int fan_idx = to_sensor_dev_attr(da)->index; + unsigned long val; + int ret; + int status; + + ret = kstrtoul(buf, 10, &val); + if (ret) + return ret; + if (val > 255) + return -EINVAL; + + status = emc2305_set_pwm(client, fan_idx, val); + return count; +} + +/* define a read only attribute */ +#define EMC2305_ATTR_RO(_type, _item, _num) \ + SENSOR_ATTR(_type ## _num ## _ ## _item, S_IRUGO, \ + show_## _type ## _ ## _item, NULL, _num - 1) + +/* define a read/write attribute */ +#define EMC2305_ATTR_RW(_type, _item, _num) \ + SENSOR_ATTR(_type ## _num ## _ ## _item, S_IRUGO | S_IWUSR, \ + show_## _type ##_ ## _item, \ + set_## _type ## _ ## _item, _num - 1) + +/* + * TODO: Ugly hack, but temporary as this whole logic needs + * to be rewritten as per standard HWMON sysfs registration + */ + +/* define a read/write attribute */ +#define EMC2305_ATTR_RW2(_type, _num) \ + SENSOR_ATTR(_type ## _num, S_IRUGO | S_IWUSR, \ + show_## _type, set_## _type, _num - 1) + +/* defines the attributes for a single fan */ +#define EMC2305_DEFINE_FAN_ATTRS(_num) \ + static const \ + struct sensor_device_attribute emc2305_attr_fan ## _num[] = { \ + EMC2305_ATTR_RO(fan, input, _num), \ + EMC2305_ATTR_RO(fan, fault, _num), \ + EMC2305_ATTR_RW(fan, div, _num), \ + EMC2305_ATTR_RW(fan, target, _num), \ + EMC2305_ATTR_RW(pwm, enable, _num), \ + EMC2305_ATTR_RW2(pwm, _num) \ + } + +#define EMC2305_NUM_FAN_ATTRS ARRAY_SIZE(emc2305_attr_fan1) + +/* common attributes for EMC2303 and EMC2305 */ +static const struct sensor_device_attribute emc2305_attr_common[] = { +}; + +/* fan attributes for the single fans */ +EMC2305_DEFINE_FAN_ATTRS(1); +EMC2305_DEFINE_FAN_ATTRS(2); +EMC2305_DEFINE_FAN_ATTRS(3); +EMC2305_DEFINE_FAN_ATTRS(4); +EMC2305_DEFINE_FAN_ATTRS(5); +EMC2305_DEFINE_FAN_ATTRS(6); + +/* fan attributes */ +static const struct sensor_device_attribute *emc2305_fan_attrs[] = { + emc2305_attr_fan1, + emc2305_attr_fan2, + emc2305_attr_fan3, + emc2305_attr_fan4, + emc2305_attr_fan5, +}; + +/* + * driver interface + */ + +static int emc2305_remove(struct i2c_client *client) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + int fan_idx, i; + + hwmon_device_unregister(data->hwmon_dev); + + for (fan_idx = 0; fan_idx < data->fans; ++fan_idx) + for (i = 0; i < EMC2305_NUM_FAN_ATTRS; ++i) + device_remove_file( + &client->dev, + &emc2305_fan_attrs[fan_idx][i].dev_attr); + + for (i = 0; i < ARRAY_SIZE(emc2305_attr_common); ++i) + device_remove_file(&client->dev, + &emc2305_attr_common[i].dev_attr); + + kfree(data); + return 0; +} + + +#ifdef CONFIG_OF +/* + * device tree support + */ + +struct of_fan_attribute { + const char *name; + int (*set)(struct i2c_client*, int, long); +}; + +struct of_fan_attribute of_fan_attributes[] = { + {"fan-div", emc2305_set_fan_div}, + {"fan-target", emc2305_set_fan_target}, + {"pwm-enable", emc2305_set_pwm_enable}, + {NULL, NULL} +}; + +static int emc2305_config_of(struct i2c_client *client) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct device_node *node; + unsigned int fan_idx; + + if (!client->dev.of_node) + return -EINVAL; + if (!of_get_next_child(client->dev.of_node, NULL)) + return 0; + + for (fan_idx = 0; fan_idx < data->fans; ++fan_idx) + data->fan[fan_idx].enabled = false; + + for_each_child_of_node(client->dev.of_node, node) { + const __be32 *property; + int len; + struct of_fan_attribute *attr; + + property = of_get_property(node, "reg", &len); + if (!property || len != sizeof(int)) { + dev_err(&client->dev, "invalid reg on %s\n", + node->full_name); + continue; + } + + fan_idx = be32_to_cpup(property); + if (fan_idx >= data->fans) { + dev_err(&client->dev, + "invalid fan index %d on %s\n", + fan_idx, node->full_name); + continue; + } + + data->fan[fan_idx].enabled = true; + + for (attr = of_fan_attributes; attr->name; ++attr) { + int status = 0; + long value; + property = of_get_property(node, attr->name, &len); + if (!property) + continue; + if (len != sizeof(int)) { + dev_err(&client->dev, "invalid %s on %s\n", + attr->name, node->full_name); + continue; + } + value = be32_to_cpup(property); + status = attr->set(client, fan_idx, value); + if (status == -EINVAL) { + dev_err(&client->dev, + "invalid value for %s on %s\n", + attr->name, node->full_name); + } + } + } + + return 0; +} + +#endif + +static void emc2305_get_config(struct i2c_client *client) +{ + int i; + struct emc2305_data *data = i2c_get_clientdata(client); + + for (i = 0; i < data->fans; ++i) { + data->fan[i].enabled = true; + emc2305_update_fan(client, i); + } + +#ifdef CONFIG_OF + emc2305_config_of(client); +#endif + +} + +static int +emc2305_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct emc2305_data *data; + int status; + int i; + int fan_idx; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct emc2305_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + status = i2c_smbus_read_byte_data(client, REG_PRODUCT_ID); + switch (status) { + case 0x34: /* EMC2305 */ + data->fans = 5; + break; + case 0x35: /* EMC2303 */ + data->fans = 3; + break; + case 0x36: /* EMC2302 */ + data->fans = 2; + break; + case 0x37: /* EMC2301 */ + data->fans = 1; + break; + default: + if (status >= 0) + status = -EINVAL; + goto exit_free; + } + + emc2305_get_config(client); + + for (i = 0; i < ARRAY_SIZE(emc2305_attr_common); ++i) { + status = device_create_file(&client->dev, + &emc2305_attr_common[i].dev_attr); + if (status) + goto exit_remove; + } + for (fan_idx = 0; fan_idx < data->fans; ++fan_idx) + for (i = 0; i < EMC2305_NUM_FAN_ATTRS; ++i) { + if (!data->fan[fan_idx].enabled) + continue; + status = device_create_file( + &client->dev, + &emc2305_fan_attrs[fan_idx][i].dev_attr); + if (status) + goto exit_remove_fans; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove_fans; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove_fans: + for (fan_idx = 0; fan_idx < data->fans; ++fan_idx) + for (i = 0; i < EMC2305_NUM_FAN_ATTRS; ++i) + device_remove_file( + &client->dev, + &emc2305_fan_attrs[fan_idx][i].dev_attr); + +exit_remove: + for (i = 0; i < ARRAY_SIZE(emc2305_attr_common); ++i) + device_remove_file(&client->dev, + &emc2305_attr_common[i].dev_attr); +exit_free: + kfree(data); + return status; +} + +static const struct i2c_device_id emc2305_id[] = { + { "emc2305", 0 }, + { "emc2303", 0 }, + { "emc2302", 0 }, + { "emc2301", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, emc2305_id); + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int +emc2305_detect(struct i2c_client *new_client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = new_client->adapter; + int manufacturer, product; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) + return -ENODEV; + + manufacturer = + i2c_smbus_read_byte_data(new_client, REG_MANUFACTURER_ID); + if (manufacturer != 0x5D) + return -ENODEV; + + product = i2c_smbus_read_byte_data(new_client, REG_PRODUCT_ID); + + switch (product) { + case 0x34: + strlcpy(info->type, "emc2305", I2C_NAME_SIZE); + break; + case 0x35: + strlcpy(info->type, "emc2303", I2C_NAME_SIZE); + break; + case 0x36: + strlcpy(info->type, "emc2302", I2C_NAME_SIZE); + break; + case 0x37: + strlcpy(info->type, "emc2301", I2C_NAME_SIZE); + break; + default: + return -ENODEV; + } + + return 0; +} + +static struct i2c_driver emc2305_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "emc2305", + }, + .probe = emc2305_probe, + .remove = emc2305_remove, + .id_table = emc2305_id, +/* + .detect = emc2305_detect, + .address_list = i2c_adresses, +*/ +}; + +module_i2c_driver(emc2305_driver); + +MODULE_AUTHOR("Reinhard Pfau "); +MODULE_DESCRIPTION("SMSC EMC2305 hwmon driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/hlx_gpio_ich.c b/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/hlx_gpio_ich.c new file mode 100644 index 00000000000..3667da0db84 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/hlx_gpio_ich.c @@ -0,0 +1,1047 @@ +/* Copyright (c) 2018 Dell Inc. + * gpio_ich.c - ICH driver for Rangeley switches + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "hlx-ich" + +#define C2000_PCU_DEVICE_ID 0x1f38 + +// GPIO registers +// GPIO Core Control/Access Registers in I/O Space +#define GPIO_SC_USE_SEL 0x0 +#define GPIO_SC_IO_SEL 0x4 +#define GPIO_SC_GP_LVL 0x8 +#define GPIO_SC_TPE 0xC +#define GPIO_SC_TNE 0x10 +#define GPIO_SC_TS 0x14 + +// GPIO SUS Control/Access Registers in I/O Space +#define GPIO_SUS_USE_SEL 0x80 +#define GPIO_SUS_IO_SEL 0x84 +#define GPIO_SUS_GP_LVL 0x88 +#define GPIO_SUS_TPE 0x8C +#define GPIO_SUS_TNE 0x90 +#define GPIO_SUS_TS 0x94 +#define GPIO_SUS_WAKE_EN 0x98 + +static const unsigned char c2000_gpio_regs[] = { + GPIO_SC_USE_SEL, + GPIO_SC_IO_SEL, + GPIO_SC_GP_LVL, + GPIO_SC_TPE, + GPIO_SC_TNE, + GPIO_SC_TS, + GPIO_SUS_USE_SEL, + GPIO_SUS_IO_SEL, + GPIO_SUS_GP_LVL, + GPIO_SUS_TPE, + GPIO_SUS_TNE, + GPIO_SUS_TS, + GPIO_SUS_WAKE_EN +}; + +#define GPIO_REG_LEN 0x4 + +#define GPIOS0_EN (1 << 0) +#define GPIOS1_EN (1 << 1) +#define GPIOS2_EN (1 << 2) +#define GPIOS3_EN (1 << 3) +#define GPIOS4_EN (1 << 4) +#define GPIOS5_EN (1 << 5) +#define GPIOS6_EN (1 << 6) +#define GPIOS7_EN (1 << 7) + +#define GPIOSUS0_EN (1 << 0) +#define GPIOSUS1_EN (1 << 1) +#define GPIOSUS2_EN (1 << 2) +#define GPIOSUS3_EN (1 << 3) +// GPIOSUS4_EN : unused +// GPIOSUS5_EN : unused +#define GPIOSUS6_EN (1 << 6) +#define GPIOSUS7_EN (1 << 7) + + +// GPE0a_EN - General Purpose Event 0 Enables +#define GPIO_GPE0a_EN_SUS0 (1 << 16) +#define GPIO_GPE0a_EN_SUS1 (1 << 17) +#define GPIO_GPE0a_EN_SUS2 (1 << 18) +#define GPIO_GPE0a_EN_SUS3 (1 << 19) +// GPIO_GPE0a_EN_SUS4 : unused +// GPIO_GPE0a_EN_SUS5 : unused +#define GPIO_GPE0a_EN_SUS6 (1 << 22) +#define GPIO_GPE0a_EN_SUS7 (1 << 23) + +#define GPIO_GPE0a_EN_CORE0 (1 << 24) +#define GPIO_GPE0a_EN_CORE1 (1 << 25) +#define GPIO_GPE0a_EN_CORE2 (1 << 26) +#define GPIO_GPE0a_EN_CORE3 (1 << 27) +#define GPIO_GPE0a_EN_CORE4 (1 << 28) +#define GPIO_GPE0a_EN_CORE5 (1 << 29) +#define GPIO_GPE0a_EN_CORE6 (1 << 30) +#define GPIO_GPE0a_EN_CORE7 (1 << 31) + +// GPE0a_STS - General Purpose Event 0 Status +// We're interested in only SUS6 for now +#define GPIO_GPE0a_STS_SUS6 (1 << 22) +#define GPIO_GPE0a_STS_SUS7 (1 << 23) + +// GPIO_ROUT - GPIO_ROUT Register +#define GPIO_ROUT_OFFSET_SUS0 0 +#define GPIO_ROUT_OFFSET_SUS1 2 +#define GPIO_ROUT_OFFSET_SUS2 4 +#define GPIO_ROUT_OFFSET_SUS3 6 +// GPIO_ROUT_OFFSET_SUS4 : unused +// GPIO_ROUT_OFFSET_SUS5 : unused +#define GPIO_ROUT_OFFSET_SUS6 12 +#define GPIO_ROUT_OFFSET_SUS7 14 + +#define GPIO_ROUT_OFFSET_CORE0 16 +#define GPIO_ROUT_OFFSET_CORE1 18 +#define GPIO_ROUT_OFFSET_CORE2 20 +#define GPIO_ROUT_OFFSET_CORE3 22 +#define GPIO_ROUT_OFFSET_CORE4 24 +#define GPIO_ROUT_OFFSET_CORE5 26 +#define GPIO_ROUT_OFFSET_CORE6 28 +#define GPIO_ROUT_OFFSET_CORE7 30 + +enum GPIO_ROUT { + GPIO_NO_EFFECT = 0, + GPIO_SMI, + GPIO_SCI, + GPIO_RESERVED +}; + +/* + * GPIO resources + * defined as in drivers/gpio/gpio-ich.c + */ +#define ICH_RES_GPIO 0 +#define ICH_RES_GPE0 1 +static struct resource gpio_ich_res[] = { + /* GPIO */ + { + .flags = IORESOURCE_IO, + }, + /* ACPI - GPE0 */ + { + .flags = IORESOURCE_IO, + }, +}; + +// ACPI registers +#define ACPI_GPE0a_STS 0x20 +#define ACPI_GPE0a_EN 0x28 + +// PMC registers +#define PMC_GPIO_ROUT 0x58 +#define PMC_REG_LEN 0x4 + +// lpc_ich_priv is derived from drivers/mfd/lpc_ich.c +struct lpc_ich_priv { + int chipset; + + int abase; /* ACPI base */ + int actrl_pbase; /* ACPI control or PMC base */ + int gbase; /* GPIO base */ + int gctrl; /* GPIO control */ + + int abase_save; /* Cached ACPI base value */ + int actrl_pbase_save; /* Cached ACPI control or PMC base value */ + int gctrl_save; /* Cached GPIO control value */ +}; + +#define ICH_RES_MEM_GCS_PMC 0 + +#define IO_REG_WRITE(val, reg, base_res) outl(val, (reg) + (base_res)->start) +#define IO_REG_READ(reg, base_res) inl((reg) + (base_res)->start) + +struct resource pmc_res = {.flags = IORESOURCE_MEM,}; + +static struct kobject *hlx_kobj; +static unsigned short force_id; +module_param(force_id, ushort, 0); + +#define SMF_REG_ADDR 0x200 +#define SIO_REG_DEVID 0x1 +#define SIO_Z9100_ID 0x1 +#define SIO_S6100_ID 0x2 +#define SIO_S4200_ID 0x3 +#define SIO_S5148_ID 0x4 +#define SIO_E1031_ID 0x5a + +enum kinds { + z9100smf, s6100smf, e1031 +}; + +struct hlx_ich_data { + enum kinds kind; + struct resource *gpio_base, *acpi_base, *pmc_base; + int gpio_alloc,pmc_alloc; + unsigned int int_gpio_sus7_count; +}; + +// GPIO sysfs attributes + +static ssize_t get_sc_use_sel(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_USE_SEL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_use_sel(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_USE_SEL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_io_sel(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_IO_SEL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_io_sel(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_IO_SEL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_gp_lvl(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_GP_LVL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_gp_lvl(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_GP_LVL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_gp_tpe(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_TPE,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_gp_tpe(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_TPE,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_gp_tne(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_TNE,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_gp_tne(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_TNE,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_gp_ts(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_TS,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_gp_ts(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_TS,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_use_sel(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_USE_SEL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_use_sel(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_USE_SEL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_io_sel(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_IO_SEL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_io_sel(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_IO_SEL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_gp_lvl(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_GP_LVL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_gp_lvl(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_GP_LVL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_gp_tpe(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_TPE,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_gp_tpe(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_TPE,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_gp_tne(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_TNE,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_gp_tne(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_TNE,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_gp_ts(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_TS,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_gp_ts(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_TS,ich_data->gpio_base); + + return count; +} + +static DEVICE_ATTR(sc_use_sel, S_IRUGO | S_IWUSR, get_sc_use_sel, set_sc_use_sel); +static DEVICE_ATTR(sc_io_sel, S_IRUGO | S_IWUSR, get_sc_io_sel, set_sc_io_sel); +static DEVICE_ATTR(sc_gp_lvl, S_IRUGO | S_IWUSR, get_sc_gp_lvl, set_sc_gp_lvl); +static DEVICE_ATTR(sc_gp_tpe, S_IRUGO | S_IWUSR, get_sc_gp_tpe, set_sc_gp_tpe); +static DEVICE_ATTR(sc_gp_tne, S_IRUGO | S_IWUSR, get_sc_gp_tne, set_sc_gp_tne); +static DEVICE_ATTR(sc_gp_ts, S_IRUGO | S_IWUSR, get_sc_gp_ts, set_sc_gp_ts); +static DEVICE_ATTR(sus_use_sel, S_IRUGO | S_IWUSR, get_sus_use_sel,set_sus_use_sel); +static DEVICE_ATTR(sus_io_sel, S_IRUGO | S_IWUSR, get_sus_io_sel, set_sus_io_sel); +static DEVICE_ATTR(sus_gp_lvl, S_IRUGO | S_IWUSR, get_sus_gp_lvl, set_sus_gp_lvl); +static DEVICE_ATTR(sus_gp_tpe, S_IRUGO | S_IWUSR, get_sus_gp_tpe, set_sus_gp_tpe); +static DEVICE_ATTR(sus_gp_tne, S_IRUGO | S_IWUSR, get_sus_gp_tne, set_sus_gp_tne); +static DEVICE_ATTR(sus_gp_ts, S_IRUGO | S_IWUSR, get_sus_gp_ts, set_sus_gp_ts); + +static struct attribute *gpio_attrs[] = { + &dev_attr_sc_use_sel.attr, + &dev_attr_sc_io_sel.attr, + &dev_attr_sc_gp_lvl.attr, + &dev_attr_sc_gp_tpe.attr, + &dev_attr_sc_gp_tne.attr, + &dev_attr_sc_gp_ts.attr, + &dev_attr_sus_use_sel.attr, + &dev_attr_sus_io_sel.attr, + &dev_attr_sus_gp_lvl.attr, + &dev_attr_sus_gp_tpe.attr, + &dev_attr_sus_gp_tne.attr, + &dev_attr_sus_gp_ts.attr, + NULL, +}; + +static struct attribute_group gpio_attrs_group= { + .attrs = gpio_attrs, +}; + +// ACPI sysfs attributes + +static ssize_t get_gpe0a_sts(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(ACPI_GPE0a_STS,ich_data->acpi_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_gpe0a_sts(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,ACPI_GPE0a_STS,ich_data->acpi_base); + + return count; +} + +static ssize_t get_gpe0a_en(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(ACPI_GPE0a_EN,ich_data->acpi_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_gpe0a_en(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,ACPI_GPE0a_EN,ich_data->acpi_base); + + return count; +} + +static DEVICE_ATTR(gpe0a_sts, S_IRUGO | S_IWUSR, get_gpe0a_sts, set_gpe0a_sts); +static DEVICE_ATTR(gpe0a_en, S_IRUGO | S_IWUSR, get_gpe0a_en, set_gpe0a_en); + +static struct attribute *acpi_attrs[] = { + &dev_attr_gpe0a_sts.attr, + &dev_attr_gpe0a_en.attr, + NULL, +}; + +static struct attribute_group acpi_attrs_group= { + .attrs = acpi_attrs, +}; + +static ssize_t get_gpio_rout(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = readl(ich_data->pmc_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +// PMC sysfs attributes + +static ssize_t set_gpio_rout(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + writel(devdata,ich_data->pmc_base); + + return count; +} + +static DEVICE_ATTR(gpio_rout, S_IRUGO | S_IWUSR, get_gpio_rout, set_gpio_rout); + +static struct attribute *pmc_attrs[] = { + &dev_attr_gpio_rout.attr, + NULL, +}; + +static struct attribute_group pmc_attrs_group= { + .attrs = pmc_attrs, +}; + +// SCI interrupt sysfs attributes + +static ssize_t get_sci_int_gpio_sus7(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = ich_data->int_gpio_sus7_count; + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sci_int_gpio_sus7(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + ich_data->int_gpio_sus7_count = devdata; + + return count; +} + +static DEVICE_ATTR(sci_int_gpio_sus7, S_IRUGO | S_IWUSR, get_sci_int_gpio_sus7, set_sci_int_gpio_sus7); + +static struct attribute *sci_attrs[] = { + &dev_attr_sci_int_gpio_sus7.attr, + NULL, +}; + +static struct attribute_group sci_attrs_group= { + .attrs = sci_attrs, +}; + +static u32 hlx_ich_sci_handler(void *context) +{ + unsigned int data; + struct device *dev = (struct device *)context; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + if(!dev) return ACPI_INTERRUPT_NOT_HANDLED; + + ich_data = dev_get_platdata(dev); + if(!ich_data) return ACPI_INTERRUPT_NOT_HANDLED; + + data=IO_REG_READ(ACPI_GPE0a_STS,ich_data->acpi_base); + if(data & GPIO_GPE0a_STS_SUS7) { + // Clear the SUS7 status + IO_REG_WRITE(data,ACPI_GPE0a_STS,ich_data->acpi_base); + ich_data->int_gpio_sus7_count++; + // and notify the user space clients + sysfs_notify(&dev->kobj, NULL, "sci_int_gpio_sus7"); + return ACPI_INTERRUPT_HANDLED; + } + + return ACPI_INTERRUPT_NOT_HANDLED; +} + +/* + * Setup GPIO SUS7 to generate an SCI interrupt for optics detection + * This can be alternatively be setup using sysfs + */ +int setup_gpio_sus7_sci_interrupt(struct device *dev) +{ + int ret=0; + unsigned int data; + struct resource *acpi_base, *pmc_base, *gpio_base; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + + gpio_base = ich_data->gpio_base; + acpi_base = ich_data->acpi_base; + pmc_base = ich_data->pmc_base; + + // Enable GPIOSUS7_EN + data = IO_REG_READ(GPIO_SUS_USE_SEL,gpio_base); + data |= GPIOSUS7_EN; + IO_REG_WRITE(data,GPIO_SUS_USE_SEL,gpio_base); + + // GPIOSUS7_EN is input + data = IO_REG_READ(GPIO_SUS_IO_SEL,gpio_base); + data |= GPIOSUS7_EN; + IO_REG_WRITE(data,GPIO_SUS_IO_SEL,gpio_base); + + // Trigger on positive edge for GPIOSUS7_EN + data = IO_REG_READ(GPIO_SUS_TPE,gpio_base); + data |= GPIOSUS7_EN; + IO_REG_WRITE(data,GPIO_SUS_TPE,gpio_base); + + // Enable GPE for SUS7 to generate an SCI + data=IO_REG_READ(ACPI_GPE0a_EN,acpi_base); + data|=GPIO_GPE0a_EN_SUS7; + IO_REG_WRITE(data,ACPI_GPE0a_EN,acpi_base); + + data=readl(pmc_base); + data=(data & ~(0x3 << GPIO_ROUT_OFFSET_SUS7)) | (GPIO_SCI << GPIO_ROUT_OFFSET_SUS7); + writel(data,pmc_base); + + ret = acpi_install_sci_handler(hlx_ich_sci_handler,(void*)dev); + if(ret) { + pr_info("hlx_ich acpi_install_sci_handler failed %d\n",ret); + return ret; + } + + return ret; +} + +static int hlx_ich_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + struct pci_dev *lpc_ich_dev; + struct lpc_ich_priv *priv; + struct resource *res; + unsigned int base_addr_cfg, base_addr; + int ret,i; + + // Get the PCU device + lpc_ich_dev=pci_get_device(PCI_VENDOR_ID_INTEL,C2000_PCU_DEVICE_ID,NULL); + priv=(struct lpc_ich_priv*) pci_get_drvdata(lpc_ich_dev); + if(!priv) { + pr_info("hlx_ich: Unable to retrieve private data\n"); + return -ENODEV; + } + + // Retrieve the GPIO Base (that was initialized by lpc-ich) + pci_read_config_dword(lpc_ich_dev, priv->gbase, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + pr_info("hlx_ich I/O space for GPIO uninitialized\n"); + ret = -ENODEV; + goto probe_err; + } + + res = &gpio_ich_res[ICH_RES_GPIO]; + res->start = base_addr; + res->end = res->start + 0x9c - 1; + ret = acpi_check_resource_conflict(res); + if (ret) { + pr_info("hlx_ich gpio resource conflict ret %d\n",ret); + } + + ich_data->gpio_base=res; + // Request regions for GPIO registers + for(i=0; istart+c2000_gpio_regs[i],GPIO_REG_LEN, "hlx_ich_gpio")) { + pr_info("hlx_ich: request_region failed for GPIO : %x\n",(unsigned int) res->start+c2000_gpio_regs[i]); + ret = -EBUSY; + goto probe_err; + } + ich_data->gpio_alloc |= (1<kobj, &gpio_attrs_group); + if (ret) { + pr_info("hlx_ich cannot create sysfs for GPIO %d\n",ret); + ret = -ENOMEM; + goto probe_err; + } + + // Retrieve the ACPI Base (that was initialized by lpc-ich) + pci_read_config_dword(lpc_ich_dev, priv->abase, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + pr_info("hlx_ich I/O space for ACPI uninitialized\n"); + ret = -ENODEV; + goto probe_err; + } + + res = &gpio_ich_res[ICH_RES_GPE0]; + res->start = base_addr; + res->end = base_addr + 0x40; + ret = acpi_check_resource_conflict(res); + if (ret) { + pr_info("hlx_ich acpi resource conflict ret %d\n",ret); + } + + // ACPI region is requested by pnp 00:01/ACPI GPE0_BLK + ich_data->acpi_base=res; + + /* Register sysfs hooks for ACPI */ + ret = sysfs_create_group(&dev->kobj, &acpi_attrs_group); + if (ret) { + pr_info("hlx_ich cannot create sysfs for ACPI %d\n",ret); + ret = -ENOMEM; + goto probe_err; + } + + // Retrieve the PMC Base (that was initialized by lpc-ich) + pci_read_config_dword(lpc_ich_dev, priv->actrl_pbase, &base_addr_cfg); + base_addr = base_addr_cfg & 0xfffffe00; + pr_info("hlx_ich base_addr_cfg %x base_addr %x\n",(int)base_addr_cfg,(int)base_addr); + if (!base_addr) { + pr_info("hlx_ich PMC space for GPIO uninitialized\n"); + ret = -ENODEV; + goto probe_err; + } + + res = &pmc_res; + res->start = base_addr + PMC_GPIO_ROUT; + res->end = base_addr + PMC_GPIO_ROUT + PMC_REG_LEN - 1; + pr_info("hlx_ich pmc res_start:end %x:%x\n",(int)res->start,(int)res->end); + + ret = acpi_check_resource_conflict(res); + if (ret) { + pr_info("hlx_ich acpi resource conflict ret %d\n",ret); + } + + if (!request_mem_region(res->start,resource_size(res),"hlx_ich_pmc")) { + pr_info("hlx_ich pmc request_region failed\n"); + ret = -EBUSY; + goto probe_err; + } else { + ich_data->pmc_alloc=1; + } + + ich_data->pmc_base = ioremap(res->start, resource_size(res)); + if(!ich_data->pmc_base) { + pr_info("hlx_ich pmc ioremap failed\n"); + ret = -ENOMEM; + goto probe_err; + } + + /* Register sysfs hooks for pmc */ + ret = sysfs_create_group(&dev->kobj, &pmc_attrs_group); + if (ret) { + pr_info("hlx_ich cannot create sysfs for PMC %d\n",ret); + ret = -ENOMEM; + goto probe_err; + } + + /* Register sysfs hooks for SCI interrupts*/ + ret = sysfs_create_group(&dev->kobj, &sci_attrs_group); + if (ret) { + pr_info("hlx_ich cannot create sysfs for SCI %d\n",ret); + ret = -ENOMEM; + goto probe_err; + } + + if((ich_data->kind == z9100smf) || (ich_data->kind == s6100smf) || (ich_data->kind == e1031)) { + ret = setup_gpio_sus7_sci_interrupt(dev); + if (ret) { + pr_info("hlx_ich unable to setup SCI interrupt %d\n",ret); + goto probe_err; + } + } + + return 0; + +probe_err: + pr_info("hlx_ich hlx_ich_probe failed with : %d\n",ret); + return ret; +} + +static int hlx_ich_remove(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct hlx_ich_data *ich_data = dev_get_platdata(dev); + int i,ret; + + // Release GPIO regions + for(i=0; igpio_alloc & (1<gpio_base->start+c2000_gpio_regs[i], GPIO_REG_LEN); + } + } + + // Unmap and release PMC regions + if(ich_data->pmc_base) iounmap(ich_data->pmc_base); + if(ich_data->pmc_alloc) release_region(pmc_res.start, PMC_REG_LEN); + + ret = acpi_remove_sci_handler(hlx_ich_sci_handler); + if(ret) { + pr_info("hlx_ich acpi_remove_sci_handler failed %d\n",ret); + return ret; + } + + pr_info("hlx_ich : hlx_ich_remove done.\n"); + + return 0; +} + +static struct platform_driver hlx_ich_driver= { + .driver = { + .name = DRV_NAME, + }, + .probe = hlx_ich_probe, + .remove = hlx_ich_remove, +}; + +int __init +init_ich_data(int smf_address, struct hlx_ich_data *ich_data) +{ + int val; + + memset(ich_data, 0, sizeof(struct hlx_ich_data)); + + if (force_id) + val = force_id; + else + val = inb(smf_address + SIO_REG_DEVID); + + switch (val) { + case SIO_Z9100_ID: + ich_data->kind = z9100smf; + break; + case SIO_S6100_ID: + ich_data->kind = s6100smf; + break; + case SIO_E1031_ID: + ich_data->kind = e1031; + break; + default: + if (val != 0xffff) + pr_debug("unsupported chip ID: 0x%04x\n", val); + return -ENODEV; + } + + pr_info("hlx_ich: found SMF for ID %#x\n", ich_data->kind); + + return (0); +} + +static struct platform_device *pdev; + +static int __init hlx_ich_init(void) +{ + int err; + struct hlx_ich_data ich_data; + + if (init_ich_data(SMF_REG_ADDR, &ich_data)) + return -ENODEV; + + err = platform_driver_register(&hlx_ich_driver); + if (err) + goto exit; + + pdev = platform_device_alloc(DRV_NAME, 0); + if (!pdev) { + err = -ENOMEM; + pr_err("hlx_ich: Device allocation failed\n"); + goto exit_unregister; + } + + err = platform_device_add_data(pdev, &ich_data, + sizeof(struct hlx_ich_data)); + if (err) { + pr_err("hlx_ich: Platform data allocation failed\n"); + goto exit_device_put; + } + + /* platform_device_add calls probe() */ + err = platform_device_add(pdev); + if (err) { + pr_err("hlx_ich: Device addition failed (%d)\n", err); + goto exit_device_put; + } + + return 0; + +exit_device_put: + platform_device_put(pdev); +exit_unregister: + platform_driver_unregister(&hlx_ich_driver); +exit: + pr_err("hlx_ich: hlx_ich_init failed (%d)\n", err); + return err; +} + +static void __exit hlx_ich_exit(void) +{ + platform_device_unregister(pdev); + platform_driver_unregister(&hlx_ich_driver); + + /*Remove sysfs hlx_kobj*/ + kobject_put(hlx_kobj); +} + +MODULE_AUTHOR("Padmanabhan Narayanan"); +MODULE_DESCRIPTION("ICH driver for Rangeley switches"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:"DRV_NAME); +MODULE_PARM_DESC(force_id, "Override the detected device ID"); + +module_init(hlx_ich_init); +module_exit(hlx_ich_exit); diff --git a/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/mc24lc64t.c new file mode 100644 index 00000000000..a391056d09a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/mc24lc64t.c @@ -0,0 +1,142 @@ +/* + * mc24lc64t.c - driver for Microchip 24LC64T + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct mc24lc64t_data { + struct i2c_client *fake_client; + struct mutex update_lock; +}; + +static ssize_t mc24lc64t_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, read_time, i = 0; + int status; + + mutex_lock(&drvdata->update_lock); + + if (i2c_smbus_write_byte_data(client, off>>8, off)) + { + status = -EIO; + goto exit; + } + + msleep(1); + +begin: + + if (i < count) + { + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + do { + read_time = jiffies; + + status = i2c_smbus_read_byte(client); + if (status >= 0) + { + buf[i++] = status; + goto begin; + } + } while (time_before(read_time, timeout)); + + status = -ETIMEDOUT; + goto exit; + } + + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + + return status; +} + +static struct bin_attribute mc24lc64t_bit_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = 65536, + .read = mc24lc64t_read, +}; + +static int mc24lc64t_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adapter = client->adapter; + struct mc24lc64t_data *drvdata; + int err; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA + | I2C_FUNC_SMBUS_READ_BYTE)) + return -EPFNOSUPPORT; + + if (!(drvdata = devm_kzalloc(&client->dev, + sizeof(struct mc24lc64t_data), GFP_KERNEL))) + return -ENOMEM; + + drvdata->fake_client = i2c_new_dummy(client->adapter, client->addr + 1); + if (!drvdata->fake_client) + return -ENOMEM; + + i2c_set_clientdata(client, drvdata); + mutex_init(&drvdata->update_lock); + + err = sysfs_create_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + if (err) + i2c_unregister_device(drvdata->fake_client); + + return err; +} + +static int mc24lc64t_remove(struct i2c_client *client) +{ + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + + i2c_unregister_device(drvdata->fake_client); + + sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + + return 0; +} + +static const struct i2c_device_id mc24lc64t_id[] = { + { "24lc64t", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mc24lc64t_id); + +static struct i2c_driver mc24lc64t_driver = { + .driver = { + .name = "mc24lc64t", + .owner = THIS_MODULE, + }, + .probe = mc24lc64t_probe, + .remove = mc24lc64t_remove, + .id_table = mc24lc64t_id, +}; + +module_i2c_driver(mc24lc64t_driver); + +MODULE_AUTHOR("Abhisit Sangjan "); +MODULE_DESCRIPTION("Microchip 24LC64T Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/pmbus.h new file mode 100644 index 00000000000..521baf6da49 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/pmbus.h @@ -0,0 +1,425 @@ +/* + * pmbus.h - Common defines and structures for PMBus devices + * + * Copyright (c) 2010, 2011 Ericsson AB. + * Copyright (c) 2012 Guenter Roeck + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef PMBUS_H +#define PMBUS_H + +#include +#include + +/* + * Registers + */ +enum pmbus_regs { + PMBUS_PAGE = 0x00, + PMBUS_OPERATION = 0x01, + PMBUS_ON_OFF_CONFIG = 0x02, + PMBUS_CLEAR_FAULTS = 0x03, + PMBUS_PHASE = 0x04, + + PMBUS_CAPABILITY = 0x19, + PMBUS_QUERY = 0x1A, + + PMBUS_VOUT_MODE = 0x20, + PMBUS_VOUT_COMMAND = 0x21, + PMBUS_VOUT_TRIM = 0x22, + PMBUS_VOUT_CAL_OFFSET = 0x23, + PMBUS_VOUT_MAX = 0x24, + PMBUS_VOUT_MARGIN_HIGH = 0x25, + PMBUS_VOUT_MARGIN_LOW = 0x26, + PMBUS_VOUT_TRANSITION_RATE = 0x27, + PMBUS_VOUT_DROOP = 0x28, + PMBUS_VOUT_SCALE_LOOP = 0x29, + PMBUS_VOUT_SCALE_MONITOR = 0x2A, + + PMBUS_COEFFICIENTS = 0x30, + PMBUS_POUT_MAX = 0x31, + + PMBUS_FAN_CONFIG_12 = 0x3A, + PMBUS_FAN_COMMAND_1 = 0x3B, + PMBUS_FAN_COMMAND_2 = 0x3C, + PMBUS_FAN_CONFIG_34 = 0x3D, + PMBUS_FAN_COMMAND_3 = 0x3E, + PMBUS_FAN_COMMAND_4 = 0x3F, + + PMBUS_VOUT_OV_FAULT_LIMIT = 0x40, + PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41, + PMBUS_VOUT_OV_WARN_LIMIT = 0x42, + PMBUS_VOUT_UV_WARN_LIMIT = 0x43, + PMBUS_VOUT_UV_FAULT_LIMIT = 0x44, + PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45, + PMBUS_IOUT_OC_FAULT_LIMIT = 0x46, + PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47, + PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48, + PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49, + PMBUS_IOUT_OC_WARN_LIMIT = 0x4A, + PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B, + PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C, + + PMBUS_OT_FAULT_LIMIT = 0x4F, + PMBUS_OT_FAULT_RESPONSE = 0x50, + PMBUS_OT_WARN_LIMIT = 0x51, + PMBUS_UT_WARN_LIMIT = 0x52, + PMBUS_UT_FAULT_LIMIT = 0x53, + PMBUS_UT_FAULT_RESPONSE = 0x54, + PMBUS_VIN_OV_FAULT_LIMIT = 0x55, + PMBUS_VIN_OV_FAULT_RESPONSE = 0x56, + PMBUS_VIN_OV_WARN_LIMIT = 0x57, + PMBUS_VIN_UV_WARN_LIMIT = 0x58, + PMBUS_VIN_UV_FAULT_LIMIT = 0x59, + + PMBUS_IIN_OC_FAULT_LIMIT = 0x5B, + PMBUS_IIN_OC_WARN_LIMIT = 0x5D, + + PMBUS_POUT_OP_FAULT_LIMIT = 0x68, + PMBUS_POUT_OP_WARN_LIMIT = 0x6A, + PMBUS_PIN_OP_WARN_LIMIT = 0x6B, + + PMBUS_STATUS_BYTE = 0x78, + PMBUS_STATUS_WORD = 0x79, + PMBUS_STATUS_VOUT = 0x7A, + PMBUS_STATUS_IOUT = 0x7B, + PMBUS_STATUS_INPUT = 0x7C, + PMBUS_STATUS_TEMPERATURE = 0x7D, + PMBUS_STATUS_CML = 0x7E, + PMBUS_STATUS_OTHER = 0x7F, + PMBUS_STATUS_MFR_SPECIFIC = 0x80, + PMBUS_STATUS_FAN_12 = 0x81, + PMBUS_STATUS_FAN_34 = 0x82, + + PMBUS_READ_VIN = 0x88, + PMBUS_READ_IIN = 0x89, + PMBUS_READ_VCAP = 0x8A, + PMBUS_READ_VOUT = 0x8B, + PMBUS_READ_IOUT = 0x8C, + PMBUS_READ_TEMPERATURE_1 = 0x8D, + PMBUS_READ_TEMPERATURE_2 = 0x8E, + PMBUS_READ_TEMPERATURE_3 = 0x8F, + PMBUS_READ_FAN_SPEED_1 = 0x90, + PMBUS_READ_FAN_SPEED_2 = 0x91, + PMBUS_READ_FAN_SPEED_3 = 0x92, + PMBUS_READ_FAN_SPEED_4 = 0x93, + PMBUS_READ_DUTY_CYCLE = 0x94, + PMBUS_READ_FREQUENCY = 0x95, + PMBUS_READ_POUT = 0x96, + PMBUS_READ_PIN = 0x97, + + PMBUS_REVISION = 0x98, + PMBUS_MFR_ID = 0x99, + PMBUS_MFR_MODEL = 0x9A, + PMBUS_MFR_REVISION = 0x9B, + PMBUS_MFR_LOCATION = 0x9C, + PMBUS_MFR_DATE = 0x9D, + PMBUS_MFR_SERIAL = 0x9E, + +/* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ + PMBUS_VIRT_BASE = 0x100, + PMBUS_VIRT_READ_TEMP_AVG, + PMBUS_VIRT_READ_TEMP_MIN, + PMBUS_VIRT_READ_TEMP_MAX, + PMBUS_VIRT_RESET_TEMP_HISTORY, + PMBUS_VIRT_READ_VIN_AVG, + PMBUS_VIRT_READ_VIN_MIN, + PMBUS_VIRT_READ_VIN_MAX, + PMBUS_VIRT_RESET_VIN_HISTORY, + PMBUS_VIRT_READ_IIN_AVG, + PMBUS_VIRT_READ_IIN_MIN, + PMBUS_VIRT_READ_IIN_MAX, + PMBUS_VIRT_RESET_IIN_HISTORY, + PMBUS_VIRT_READ_PIN_AVG, + PMBUS_VIRT_READ_PIN_MIN, + PMBUS_VIRT_READ_PIN_MAX, + PMBUS_VIRT_RESET_PIN_HISTORY, + PMBUS_VIRT_READ_POUT_AVG, + PMBUS_VIRT_READ_POUT_MIN, + PMBUS_VIRT_READ_POUT_MAX, + PMBUS_VIRT_RESET_POUT_HISTORY, + PMBUS_VIRT_READ_VOUT_AVG, + PMBUS_VIRT_READ_VOUT_MIN, + PMBUS_VIRT_READ_VOUT_MAX, + PMBUS_VIRT_RESET_VOUT_HISTORY, + PMBUS_VIRT_READ_IOUT_AVG, + PMBUS_VIRT_READ_IOUT_MIN, + PMBUS_VIRT_READ_IOUT_MAX, + PMBUS_VIRT_RESET_IOUT_HISTORY, + PMBUS_VIRT_READ_TEMP2_AVG, + PMBUS_VIRT_READ_TEMP2_MIN, + PMBUS_VIRT_READ_TEMP2_MAX, + PMBUS_VIRT_RESET_TEMP2_HISTORY, + + PMBUS_VIRT_READ_VMON, + PMBUS_VIRT_VMON_UV_WARN_LIMIT, + PMBUS_VIRT_VMON_OV_WARN_LIMIT, + PMBUS_VIRT_VMON_UV_FAULT_LIMIT, + PMBUS_VIRT_VMON_OV_FAULT_LIMIT, + PMBUS_VIRT_STATUS_VMON, +}; + +/* + * OPERATION + */ +#define PB_OPERATION_CONTROL_ON BIT(7) + +/* + * CAPABILITY + */ +#define PB_CAPABILITY_SMBALERT BIT(4) +#define PB_CAPABILITY_ERROR_CHECK BIT(7) + +/* + * VOUT_MODE + */ +#define PB_VOUT_MODE_MODE_MASK 0xe0 +#define PB_VOUT_MODE_PARAM_MASK 0x1f + +#define PB_VOUT_MODE_LINEAR 0x00 +#define PB_VOUT_MODE_VID 0x20 +#define PB_VOUT_MODE_DIRECT 0x40 + +/* + * Fan configuration + */ +#define PB_FAN_2_PULSE_MASK (BIT(0) | BIT(1)) +#define PB_FAN_2_RPM BIT(2) +#define PB_FAN_2_INSTALLED BIT(3) +#define PB_FAN_1_PULSE_MASK (BIT(4) | BIT(5)) +#define PB_FAN_1_RPM BIT(6) +#define PB_FAN_1_INSTALLED BIT(7) + +/* + * STATUS_BYTE, STATUS_WORD (lower) + */ +#define PB_STATUS_NONE_ABOVE BIT(0) +#define PB_STATUS_CML BIT(1) +#define PB_STATUS_TEMPERATURE BIT(2) +#define PB_STATUS_VIN_UV BIT(3) +#define PB_STATUS_IOUT_OC BIT(4) +#define PB_STATUS_VOUT_OV BIT(5) +#define PB_STATUS_OFF BIT(6) +#define PB_STATUS_BUSY BIT(7) + +/* + * STATUS_WORD (upper) + */ +#define PB_STATUS_UNKNOWN BIT(8) +#define PB_STATUS_OTHER BIT(9) +#define PB_STATUS_FANS BIT(10) +#define PB_STATUS_POWER_GOOD_N BIT(11) +#define PB_STATUS_WORD_MFR BIT(12) +#define PB_STATUS_INPUT BIT(13) +#define PB_STATUS_IOUT_POUT BIT(14) +#define PB_STATUS_VOUT BIT(15) + +/* + * STATUS_IOUT + */ +#define PB_POUT_OP_WARNING BIT(0) +#define PB_POUT_OP_FAULT BIT(1) +#define PB_POWER_LIMITING BIT(2) +#define PB_CURRENT_SHARE_FAULT BIT(3) +#define PB_IOUT_UC_FAULT BIT(4) +#define PB_IOUT_OC_WARNING BIT(5) +#define PB_IOUT_OC_LV_FAULT BIT(6) +#define PB_IOUT_OC_FAULT BIT(7) + +/* + * STATUS_VOUT, STATUS_INPUT + */ +#define PB_VOLTAGE_UV_FAULT BIT(4) +#define PB_VOLTAGE_UV_WARNING BIT(5) +#define PB_VOLTAGE_OV_WARNING BIT(6) +#define PB_VOLTAGE_OV_FAULT BIT(7) + +/* + * STATUS_INPUT + */ +#define PB_PIN_OP_WARNING BIT(0) +#define PB_IIN_OC_WARNING BIT(1) +#define PB_IIN_OC_FAULT BIT(2) + +/* + * STATUS_TEMPERATURE + */ +#define PB_TEMP_UT_FAULT BIT(4) +#define PB_TEMP_UT_WARNING BIT(5) +#define PB_TEMP_OT_WARNING BIT(6) +#define PB_TEMP_OT_FAULT BIT(7) + +/* + * STATUS_FAN + */ +#define PB_FAN_AIRFLOW_WARNING BIT(0) +#define PB_FAN_AIRFLOW_FAULT BIT(1) +#define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2) +#define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3) +#define PB_FAN_FAN2_WARNING BIT(4) +#define PB_FAN_FAN1_WARNING BIT(5) +#define PB_FAN_FAN2_FAULT BIT(6) +#define PB_FAN_FAN1_FAULT BIT(7) + +/* + * CML_FAULT_STATUS + */ +#define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0) +#define PB_CML_FAULT_OTHER_COMM BIT(1) +#define PB_CML_FAULT_PROCESSOR BIT(3) +#define PB_CML_FAULT_MEMORY BIT(4) +#define PB_CML_FAULT_PACKET_ERROR BIT(5) +#define PB_CML_FAULT_INVALID_DATA BIT(6) +#define PB_CML_FAULT_INVALID_COMMAND BIT(7) + +enum pmbus_sensor_classes { + PSC_VOLTAGE_IN = 0, + PSC_VOLTAGE_OUT, + PSC_CURRENT_IN, + PSC_CURRENT_OUT, + PSC_POWER, + PSC_TEMPERATURE, + PSC_FAN, + PSC_NUM_CLASSES /* Number of power sensor classes */ +}; + +#define PMBUS_PAGES 32 /* Per PMBus specification */ + +/* Functionality bit mask */ +#define PMBUS_HAVE_VIN BIT(0) +#define PMBUS_HAVE_VCAP BIT(1) +#define PMBUS_HAVE_VOUT BIT(2) +#define PMBUS_HAVE_IIN BIT(3) +#define PMBUS_HAVE_IOUT BIT(4) +#define PMBUS_HAVE_PIN BIT(5) +#define PMBUS_HAVE_POUT BIT(6) +#define PMBUS_HAVE_FAN12 BIT(7) +#define PMBUS_HAVE_FAN34 BIT(8) +#define PMBUS_HAVE_TEMP BIT(9) +#define PMBUS_HAVE_TEMP2 BIT(10) +#define PMBUS_HAVE_TEMP3 BIT(11) +#define PMBUS_HAVE_STATUS_VOUT BIT(12) +#define PMBUS_HAVE_STATUS_IOUT BIT(13) +#define PMBUS_HAVE_STATUS_INPUT BIT(14) +#define PMBUS_HAVE_STATUS_TEMP BIT(15) +#define PMBUS_HAVE_STATUS_FAN12 BIT(16) +#define PMBUS_HAVE_STATUS_FAN34 BIT(17) +#define PMBUS_HAVE_VMON BIT(18) +#define PMBUS_HAVE_STATUS_VMON BIT(19) + +enum pmbus_data_format { linear = 0, direct, vid }; +enum vrm_version { vr11 = 0, vr12 }; + +struct pmbus_driver_info { + int pages; /* Total number of pages */ + enum pmbus_data_format format[PSC_NUM_CLASSES]; + enum vrm_version vrm_version; + /* + * Support one set of coefficients for each sensor type + * Used for chips providing data in direct mode. + */ + int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ + int b[PSC_NUM_CLASSES]; /* offset */ + int R[PSC_NUM_CLASSES]; /* exponent */ + + u32 func[PMBUS_PAGES]; /* Functionality, per page */ + /* + * The following functions map manufacturing specific register values + * to PMBus standard register values. Specify only if mapping is + * necessary. + * Functions return the register value (read) or zero (write) if + * successful. A return value of -ENODATA indicates that there is no + * manufacturer specific register, but that a standard PMBus register + * may exist. Any other negative return value indicates that the + * register does not exist, and that no attempt should be made to read + * the standard register. + */ + int (*read_byte_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int reg); + int (*write_word_data)(struct i2c_client *client, int page, int reg, + u16 word); + int (*write_byte)(struct i2c_client *client, int page, u8 value); + /* + * The identify function determines supported PMBus functionality. + * This function is only necessary if a chip driver supports multiple + * chips, and the chip functionality is not pre-determined. + */ + int (*identify)(struct i2c_client *client, + struct pmbus_driver_info *info); + + /* Regulator functionality, if supported by this chip driver. */ + int num_regulators; + const struct regulator_desc *reg_desc; +}; + +/* Regulator ops */ + +extern const struct regulator_ops pmbus_regulator_ops; + +/* Macro for filling in array of struct regulator_desc */ +#define PMBUS_REGULATOR(_name, _id) \ + [_id] = { \ + .name = (_name # _id), \ + .id = (_id), \ + .of_match = of_match_ptr(_name # _id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &pmbus_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +/* Function declarations */ + +void pmbus_clear_cache(struct i2c_client *client); +int pmbus_set_page(struct i2c_client *client, u8 page); +int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg); +int pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg, u16 word); +int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); +int pmbus_write_byte(struct i2c_client *client, int page, u8 value); +int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, + u8 value); +int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, + u8 mask, u8 value); +void pmbus_clear_faults(struct i2c_client *client); +bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); +bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); +int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, + struct pmbus_driver_info *info); +int pmbus_do_remove(struct i2c_client *client); +const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client + *client); + +#endif /* PMBUS_H */ \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/smc.c b/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/smc.c new file mode 100644 index 00000000000..7ec9753066b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/haliburton/modules/smc.c @@ -0,0 +1,1068 @@ +/* + * smc.c - The CPLD driver for E1031 System Management. + * The driver implement sysfs to access CPLD register on the E1031 via LPC bus. + * Copyright (C) 2018 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define DRIVER_NAME "e1031.smc" + +/** + * CPLD register address for read and write. + */ +#define VERSION 0x0200 +#define SCRATCH 0x0201 +#define BROAD_ID 0x0202 + +/* SEPERATE RESET + * [7:5] RESERVED + * [4] RESET PCIE + * [3] RESET USBHUB + * [2] RESET B50282 + * [1] RESET PCA9548 + * [0] RESET BCM54616 + * 1: not reset, 0: reset + */ +#define SPR_RESET 0x0222 + +/* PSU STATUS + * [7] PSUR_ACOK + * [6] PSUR_PWOK + * [5] PSUR_ALRT + * [4] PSUR_PRS + * [3] PSUL_ACOK + * [2] PSUL_PWOK + * [1] PSUL_ALRT + * [0] PSUL_PRS + */ +#define PSU_STAT 0x0204 +#define PSUR_ACOK 7 +#define PSUR_PWOK 6 +#define PSUR_ALRT 5 +#define PSUR_PRS 4 +#define PSUL_ACOK 3 +#define PSUL_PWOK 2 +#define PSUL_ALRT 1 +#define PSUL_PRS 0 + +/* FAN LED CTRL + * [7:3] RESERVED + * [2:0] LED CTRL + */ +#define FAN_LED_1 0x0205 +#define FAN_LED_2 0x0206 +#define FAN_LED_3 0x0207 + +enum FAN_LED { + fan_led_grn = 0, + fan_led_grn_bnk, + fan_led_amb, + fan_led_amb_bnk, + fan_led_off +} fan_led; + +#define LED_OPMOD 0x0208 +#define LED_TEST 0x0209 + +/* SYSTEM LED + * [7:4] RESERVED + * [3:2] STATUS LED + * [1:0] MASTER LED + */ +#define LED_FPS 0x020a + +enum STAT_LED { + stat_led_off = 0, + stat_led_grn, + stat_led_grn_bnk +} stat_led; + +enum MASTER_LED { + master_led_off = 0, + master_led_grn, + master_led_amb +} master_led; + +/* FAN DIRECTION STAT + * [7:4] RESERVED + * [3] USB HUB STAT + * [2:0] FAN_DIR + */ +#define DEV_STAT 0x020c +#define FAN_3 2 +#define FAN_2 1 +#define FAN_1 0 + +/* FAN STATUS + * [7:5] FAN STATUS + * [4] FAN INTERRUPT + * [3:0] PSU ALERT + */ +#define FAN_STAT 0x0234 +#define FAN3_PRS 7 +#define FAN2_PRS 6 +#define FAN1_PRS 5 + +/* SFP PORT INT TRIGGER MODE + * [7:6] RESERVED + * [5:4] RXLOS + * [3:2] MODABS + * [1:0] TXFAULT + * 00: falling edge, + * 01: rising edge, + * 10: Both edges, + * 11: low level detect + */ +#define TRIG_MODE 0x0240 +#define TXFAULT_TRIG 0 +#define MODABS_TRIG 2 +#define RXLOS_TRIG 4 + + +/* SFP PORT STATUS + * [7:4] RESERVED + * [3:0] TX_FAULT / MODABS / RXLOS + */ +#define SFP_TXFAULT 0x0242 +#define SFP_MODABS 0x0243 +#define SFP_RXLOS 0x0244 + +/* SFP PORT INTERRUPT + * [7:4] RESERVED + * [3:0] TX_FAULT / MODABS / RXLOS + * 1: int, 0: no int + */ +#define TXFAULT_INT 0x0246 +#define MODABS_INT 0x0247 +#define RXLOS_INT 0x0248 + +/* INTERRUPT MASK REGISTER + * [7:4] RESERVED + * [3:0] TX_FAULT / MODABS / RXLOS + * 1: mask, 0: not mask + */ +#define TXFAULT_MSK 0x024A +#define MODABS_MSK 0x024B +#define RXLOS_MSK 0x024C + +/* SFP PORT CTRL + * [7:4] RATE SEL (RS0/RS1) + * [3:0] TX_DIS + */ +#define SFP_TXCTRL 0x0255 + +struct cpld_data { + struct mutex cpld_lock; + uint16_t read_addr; + struct device *fpp_node; + struct device *sfp_devices[4]; +}; + +struct sfp_device_data { + int portid; +}; + +struct class *celplatform; +struct cpld_data *cpld_data; + +struct index_device_attribute { + struct device_attribute dev_attr; + int index; +}; + +static ssize_t scratch_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SCRATCH); + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t scratch_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned long data; + char *last; + + mutex_lock(&cpld_data->cpld_lock); + data = (uint16_t)strtoul(buf, &last, 16); + if (data == 0 && buf == last) { + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + outb(data, SCRATCH); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} + + +static ssize_t version_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = 0; + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n", inb(VERSION)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} + +static ssize_t getreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint16_t addr; + char *last; + + addr = (uint16_t)strtoul(buf, &last, 16); + if (addr == 0 && buf == last) { + return -EINVAL; + } + cpld_data->read_addr = addr; + return count; +} + +static ssize_t getreg_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = 0; + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n", inb(cpld_data->read_addr)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} + +static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint16_t addr; + uint8_t value; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + + strcpy(clone, buf); + + mutex_lock(&cpld_data->cpld_lock); + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + addr = (uint16_t)strtoul(tok, &last, 16); + if (addr == 0 && tok == last) { + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + value = (uint8_t)strtoul(tok, &last, 16); + if (value == 0 && tok == last) { + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + outb(value, addr); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} + +/** + * @brief Show status led + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return led state - off/on/blink + */ +static ssize_t status_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(LED_FPS); + mutex_unlock(&cpld_data->cpld_lock); + data = data & 0xc; + return sprintf(buf, "%s\n", + data == stat_led_grn ? "on" : data == stat_led_grn_bnk ? "blink" : "off"); +} + +/** + * @brief Set the status led + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value - off/on/blink + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t status_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status, data; + + if (sysfs_streq(buf, "off")) { + led_status = stat_led_off; + } else if (sysfs_streq(buf, "on")) { + led_status = stat_led_grn; + } else if (sysfs_streq(buf, "blink")) { + led_status = stat_led_grn_bnk; + } else { + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(LED_FPS); + data = data & ~(0xc); + data = data | ( led_status << 2 ); + outb(data, LED_FPS); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} + +/** + * @brief Show master led + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return led state - off/green/amber + */ +static ssize_t master_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(LED_FPS); + mutex_unlock(&cpld_data->cpld_lock); + data = data & 0x3; + return sprintf(buf, "%s\n", + data == master_led_grn ? "on" : data == master_led_amb ? "amber" : "off"); +} + +/** + * @brief Set the master led + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value - off/green/amber + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t master_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status, data; + + if (sysfs_streq(buf, "off")) { + led_status = master_led_off; + } else if (sysfs_streq(buf, "green")) { + led_status = master_led_grn; + } else if (sysfs_streq(buf, "amber")) { + led_status = master_led_amb; + } else { + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(LED_FPS); + data = data & ~(0x3); + data = data | led_status; + outb(data, LED_FPS); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} + +static ssize_t psuL_prs_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(PSU_STAT); + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "%d\n", ~(data >> PSUL_PRS) & 1U); +} + +static ssize_t psuR_prs_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(PSU_STAT); + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "%d\n", ~(data >> PSUR_PRS) & 1U); +} +static DEVICE_ATTR_RO(psuR_prs); + +static ssize_t psuL_status_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(PSU_STAT); + mutex_unlock(&cpld_data->cpld_lock); + data = ( data >> PSUL_PWOK ) & 0x3; + return sprintf(buf, "%d\n", data == 0x3 ); +} + +static ssize_t psuR_status_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(PSU_STAT); + mutex_unlock(&cpld_data->cpld_lock); + data = ( data >> PSUR_PWOK ) & 0x3; + return sprintf(buf, "%d\n", data == 0x3 ); +} + + +static ssize_t fan_dir_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct sensor_device_attribute *sa = to_sensor_dev_attr(devattr); + int index = sa->index; + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(DEV_STAT); + mutex_unlock(&cpld_data->cpld_lock); + data = ( data >> index ) & 1U; + return sprintf(buf, "%s\n", data ? "B2F" : "F2B" ); +} + +static ssize_t fan_prs_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct sensor_device_attribute *sa = to_sensor_dev_attr(devattr); + int index = sa->index; + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(FAN_STAT); + mutex_unlock(&cpld_data->cpld_lock); + data = ( data >> index ) & 1U; + return sprintf(buf, "%d\n", data); +} + +static ssize_t sfp_txfault_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + unsigned char data; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SFP_TXFAULT); + data = data & 0x0F; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t sfp_modabs_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + unsigned char data; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SFP_MODABS); + data = data & 0x0F; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t sfp_rxlos_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + unsigned char data; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SFP_RXLOS); + data = data & 0x0F; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t sfp_txdis_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + unsigned char data; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SFP_TXCTRL); + data = data & 0x0F; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t sfp_txdis_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + long value; + ssize_t status; + unsigned char data; + + mutex_lock(&cpld_data->cpld_lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + data = inb(SFP_TXCTRL); + data = data & ~(0x0F); + data = data | (value & 0x0F); + outb(data, SFP_TXCTRL); + status = size; + } + mutex_unlock(&cpld_data->cpld_lock); + return status; +} + +static ssize_t sfp_rs_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + unsigned char data; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SFP_TXCTRL) >> 4; + data = data & 0x0F; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t sfp_rs_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + long value; + ssize_t status; + unsigned char data; + + mutex_lock(&cpld_data->cpld_lock); + status = kstrtol(buf, 0, &value); + value = (value & 0x0F) << 4; + if (status == 0) { + data = inb(SFP_TXCTRL); + data = data & ~(0xF0); + data = data | value; + outb(data, SFP_TXCTRL); + status = size; + } + mutex_unlock(&cpld_data->cpld_lock); + return status; +} + +/** + * @brief Show the avaliable interrupt trigger mode. + * "none" means the interrupt is masked. + * + * @return Current trigger mode. + */ +static ssize_t txfault_trig_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + unsigned char mode; + char *mode_str[5] = {"falling", "rising", "both", "low"}; + + mutex_lock(&cpld_data->cpld_lock); + mode = inb(TRIG_MODE) >> TXFAULT_TRIG; + mode = mode & 0x3; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "%s\n", mode_str[mode]); +} + +/** + * @brief Set the trigger mode of each interrupt type. + * Only one trigger mode allow in a type. + * + * @param buf The trigger mode of follwings + * "falling", "rising", "both" + */ +static ssize_t txfault_trig_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + ssize_t status; + unsigned char data, trig_mode; + + if (sysfs_streq(buf, "falling")) { + trig_mode = 0; + } else if (sysfs_streq(buf, "rising")) { + trig_mode = 1; + } else if (sysfs_streq(buf, "both")) { + trig_mode = 2; + } else if (sysfs_streq(buf, "low")) { + trig_mode = 3; + } else { + status = -EINVAL; + return status; + } + + mutex_lock(&cpld_data->cpld_lock); + data = inb(TRIG_MODE); + data = data & ~(0x03 << TXFAULT_TRIG); + data = data | trig_mode << TXFAULT_TRIG; + outb(data, TRIG_MODE); + mutex_unlock(&cpld_data->cpld_lock); + status = size; + return status; +} + +/** + * @brief Show the avaliable interrupt trigger mode. + * "none" means the interrupt is masked. + * + * @return Current trigger mode. + */ +static ssize_t modabs_trig_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + unsigned char mode; + char *mode_str[5] = {"falling", "rising", "both", "low"}; + + mutex_lock(&cpld_data->cpld_lock); + mode = inb(TRIG_MODE) >> MODABS_TRIG; + mode = mode & 0x3; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "%s\n", mode_str[mode]); +} + +/** + * @brief Set the trigger mode of each interrupt type. + * Only one trigger mode allow in a type. + * + * @param buf The trigger mode of follwings + * "falling", "rising", "both", "low" + */ +static ssize_t modabs_trig_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + ssize_t status; + unsigned char data, trig_mode; + + if (sysfs_streq(buf, "falling")) { + trig_mode = 0; + } else if (sysfs_streq(buf, "rising")) { + trig_mode = 1; + } else if (sysfs_streq(buf, "both")) { + trig_mode = 2; + } else if (sysfs_streq(buf, "low")) { + trig_mode = 3; + } else { + status = -EINVAL; + return status; + } + + mutex_lock(&cpld_data->cpld_lock); + data = inb(TRIG_MODE); + data = data & ~(0x03 << MODABS_TRIG); + data = data | trig_mode << MODABS_TRIG; + outb(data, TRIG_MODE); + mutex_unlock(&cpld_data->cpld_lock); + status = size; + return status; +} + +/** + * @brief Show the avaliable interrupt trigger mode. + * "none" means the interrupt is masked. + * + * @return Current trigger mode. + */ +static ssize_t rxlos_trig_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + unsigned char mode; + char *mode_str[5] = {"falling", "rising", "both", "low"}; + + mutex_lock(&cpld_data->cpld_lock); + mode = inb(TRIG_MODE) >> RXLOS_TRIG; + mode = mode & 0x3; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "%s\n", mode_str[mode]); +} + +/** + * @brief Set the trigger mode of each interrupt type. + * Only one trigger mode allow in a type. + * + * @param buf The trigger mode of follwings + * "falling", "rising", "both", "low" + */ +static ssize_t rxlos_trig_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + ssize_t status; + unsigned char data, trig_mode; + + if (sysfs_streq(buf, "falling")) { + trig_mode = 0; + } else if (sysfs_streq(buf, "rising")) { + trig_mode = 1; + } else if (sysfs_streq(buf, "both")) { + trig_mode = 2; + } else if (sysfs_streq(buf, "low")) { + trig_mode = 3; + } else { + status = -EINVAL; + return status; + } + + mutex_lock(&cpld_data->cpld_lock); + data = inb(TRIG_MODE); + data = data & ~(0x03 << RXLOS_TRIG); + data = data | trig_mode << RXLOS_TRIG; + outb(data, TRIG_MODE); + mutex_unlock(&cpld_data->cpld_lock); + status = size; + return status; +} + +static ssize_t txfault_int_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + unsigned char data; + mutex_lock(&cpld_data->cpld_lock); + data = inb(TXFAULT_INT); + data = data & 0x0F; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t modabs_int_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + unsigned char data; + mutex_lock(&cpld_data->cpld_lock); + data = inb(MODABS_INT); + data = data & 0x0F; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t rxlos_int_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + unsigned char data; + mutex_lock(&cpld_data->cpld_lock); + data = inb(RXLOS_INT); + data = data & 0x0F; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t txfault_mask_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + unsigned char data; + mutex_lock(&cpld_data->cpld_lock); + data = inb(TXFAULT_MSK); + data = data & 0x0F; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t txfault_mask_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + long value; + ssize_t status; + + status = kstrtol(buf, 0, &value); + value = value & 0x0F; + if (status == 0) { + mutex_lock(&cpld_data->cpld_lock); + outb(value, TXFAULT_MSK); + mutex_unlock(&cpld_data->cpld_lock); + status = size; + } + return status; +} + +static ssize_t modabs_mask_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + unsigned char data; + mutex_lock(&cpld_data->cpld_lock); + data = inb(MODABS_MSK); + data = data & 0x0F; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t modabs_mask_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + long value; + ssize_t status; + + status = kstrtol(buf, 0, &value); + value = value & 0x0F; + if (status == 0) { + mutex_lock(&cpld_data->cpld_lock); + outb(value, MODABS_MSK); + mutex_unlock(&cpld_data->cpld_lock); + status = size; + } + return status; +} + +static ssize_t rxlos_mask_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + unsigned char data; + mutex_lock(&cpld_data->cpld_lock); + data = inb(RXLOS_MSK); + data = data & 0x0F; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t rxlos_mask_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + long value; + ssize_t status; + + status = kstrtol(buf, 0, &value); + value = value & 0x0F; + if (status == 0) { + mutex_lock(&cpld_data->cpld_lock); + outb(value, RXLOS_MSK); + mutex_unlock(&cpld_data->cpld_lock); + status = size; + } + return status; +} + +static ssize_t fan_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct sensor_device_attribute *sa = to_sensor_dev_attr(devattr); + int index = sa->index; + unsigned char data = 0; + char *led_str[5] = {"green", "green-blink", "amber", "amber-blink", "off"}; + + // Use index to determind the status bit + mutex_lock(&cpld_data->cpld_lock); + data = inb(FAN_LED_1 + index); + data = data & 0x7; + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "%s\n", led_str[data]); +} + +static ssize_t fan_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *sa = to_sensor_dev_attr(devattr); + int index = sa->index; + unsigned char led_status = 0; + + if (sysfs_streq(buf, "off")) { + led_status = fan_led_off; + } else if (sysfs_streq(buf, "green")) { + led_status = fan_led_grn; + } else if (sysfs_streq(buf, "amber")) { + led_status = fan_led_amb; + } else if (sysfs_streq(buf, "green-blink")) { + led_status = fan_led_grn_bnk; + } else if (sysfs_streq(buf, "amber-blink")) { + led_status = fan_led_amb_bnk; + } else { + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + outb(led_status, FAN_LED_1 + index); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} + +static DEVICE_ATTR_RO(version); +static DEVICE_ATTR_RW(scratch); +static DEVICE_ATTR_RW(getreg); +static DEVICE_ATTR_WO(setreg); +static DEVICE_ATTR_RW(status_led); +static DEVICE_ATTR_RW(master_led); +static DEVICE_ATTR_RO(psuL_prs); +static DEVICE_ATTR_RO(psuL_status); +static DEVICE_ATTR_RO(psuR_status); +static DEVICE_ATTR_RO(sfp_txfault); +static DEVICE_ATTR_RO(sfp_modabs); +static DEVICE_ATTR_RO(sfp_rxlos); +static DEVICE_ATTR_RW(sfp_txdis); +static DEVICE_ATTR_RW(sfp_rs); +static DEVICE_ATTR_RW(txfault_trig); +static DEVICE_ATTR_RW(modabs_trig); +static DEVICE_ATTR_RW(rxlos_trig); +static DEVICE_ATTR_RO(txfault_int); +static DEVICE_ATTR_RO(modabs_int); +static DEVICE_ATTR_RO(rxlos_int); +static DEVICE_ATTR_RW(txfault_mask); +static DEVICE_ATTR_RW(modabs_mask); +static DEVICE_ATTR_RW(rxlos_mask); +static SENSOR_DEVICE_ATTR(fan1_dir, S_IRUGO, fan_dir_show, NULL, FAN_1); +static SENSOR_DEVICE_ATTR(fan2_dir, S_IRUGO, fan_dir_show, NULL, FAN_2); +static SENSOR_DEVICE_ATTR(fan3_dir, S_IRUGO, fan_dir_show, NULL, FAN_3); +static SENSOR_DEVICE_ATTR(fan1_led, S_IWUSR | S_IRUGO, fan_led_show, fan_led_store, FAN_1); +static SENSOR_DEVICE_ATTR(fan2_led, S_IWUSR | S_IRUGO, fan_led_show, fan_led_store, FAN_2); +static SENSOR_DEVICE_ATTR(fan3_led, S_IWUSR | S_IRUGO, fan_led_show, fan_led_store, FAN_3); +static SENSOR_DEVICE_ATTR(fan1_prs, S_IRUGO, fan_prs_show, NULL, FAN1_PRS); +static SENSOR_DEVICE_ATTR(fan2_prs, S_IRUGO, fan_prs_show, NULL, FAN2_PRS); +static SENSOR_DEVICE_ATTR(fan3_prs, S_IRUGO, fan_prs_show, NULL, FAN3_PRS); + +static struct attribute *cpld_attrs[] = { + &dev_attr_version.attr, + &dev_attr_scratch.attr, + &dev_attr_getreg.attr, + &dev_attr_setreg.attr, + // LEDs + &dev_attr_status_led.attr, + &dev_attr_master_led.attr, + // PSUs + &dev_attr_psuL_prs.attr, + &dev_attr_psuR_prs.attr, + &dev_attr_psuL_status.attr, + &dev_attr_psuR_status.attr, + // FANs + &sensor_dev_attr_fan1_dir.dev_attr.attr, + &sensor_dev_attr_fan2_dir.dev_attr.attr, + &sensor_dev_attr_fan3_dir.dev_attr.attr, + &sensor_dev_attr_fan1_led.dev_attr.attr, + &sensor_dev_attr_fan2_led.dev_attr.attr, + &sensor_dev_attr_fan3_led.dev_attr.attr, + &sensor_dev_attr_fan1_prs.dev_attr.attr, + &sensor_dev_attr_fan2_prs.dev_attr.attr, + &sensor_dev_attr_fan3_prs.dev_attr.attr, + NULL, +}; + +static struct attribute_group cpld_group = { + .attrs = cpld_attrs, +}; + +static struct attribute *sfp_attrs[] = { + // SFP + &dev_attr_sfp_txfault.attr, + &dev_attr_sfp_modabs.attr, + &dev_attr_sfp_rxlos.attr, + &dev_attr_sfp_txdis.attr, + &dev_attr_sfp_rs.attr, + &dev_attr_txfault_trig.attr, + &dev_attr_modabs_trig.attr, + &dev_attr_rxlos_trig.attr, + &dev_attr_txfault_int.attr, + &dev_attr_modabs_int.attr, + &dev_attr_rxlos_int.attr, + &dev_attr_txfault_mask.attr, + &dev_attr_modabs_mask.attr, + &dev_attr_rxlos_mask.attr, + NULL, +}; + +ATTRIBUTE_GROUPS(sfp); + +static struct resource cpld_resources[] = { + { + .start = 0x0200, + .end = 0x0255, + .flags = IORESOURCE_IO, + }, +}; + +static void cpld_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device cpld_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(cpld_resources), + .resource = cpld_resources, + .dev = { + .release = cpld_dev_release, + } +}; + +static int cpld_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int err; + + cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct cpld_data), + GFP_KERNEL); + if (!cpld_data) + return -ENOMEM; + + mutex_init(&cpld_data->cpld_lock); + + cpld_data->read_addr = VERSION; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (unlikely(!res)) { + printk(KERN_ERR "Specified Resource Not Available...\n"); + return -ENODEV; + } + + err = sysfs_create_group(&pdev->dev.kobj, &cpld_group); + if (err) { + printk(KERN_ERR "Cannot create sysfs for SMC.\n"); + return err; + } + + celplatform = class_create(THIS_MODULE, "celplatform"); + if (IS_ERR(celplatform)) { + printk(KERN_ERR "Failed to register device class\n"); + sysfs_remove_group(&pdev->dev.kobj, &cpld_group); + return PTR_ERR(celplatform); + } + + cpld_data->fpp_node = device_create_with_groups(celplatform, NULL, MKDEV(0, 0), NULL, sfp_groups, "optical_ports"); + + if (IS_ERR(cpld_data->fpp_node)) { + class_destroy(celplatform); + sysfs_remove_group(&pdev->dev.kobj, &cpld_group); + return PTR_ERR(cpld_data->fpp_node); + } + + err = sysfs_create_link(&pdev->dev.kobj, &cpld_data->fpp_node->kobj, "SFP"); + if (err != 0) { + put_device(cpld_data->fpp_node); + device_unregister(cpld_data->fpp_node); + class_destroy(celplatform); + sysfs_remove_group(&pdev->dev.kobj, &cpld_group); + return err; + } + + // Clear all reset signals + outb(0xFF, SPR_RESET); + return 0; +} + +static int cpld_drv_remove(struct platform_device *pdev) +{ + device_unregister(cpld_data->fpp_node); + put_device(cpld_data->fpp_node); + sysfs_remove_group(&pdev->dev.kobj, &cpld_group); + class_destroy(celplatform); + return 0; +} + +static struct platform_driver cpld_drv = { + .probe = cpld_drv_probe, + .remove = __exit_p(cpld_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int cpld_init(void) +{ + // Register platform device and platform driver + platform_device_register(&cpld_dev); + platform_driver_register(&cpld_drv); + return 0; +} + +void cpld_exit(void) +{ + // Unregister platform device and platform driver + platform_driver_unregister(&cpld_drv); + platform_device_unregister(&cpld_dev); +} + +module_init(cpld_init); +module_exit(cpld_exit); + + +MODULE_AUTHOR("Celestica Inc."); +MODULE_DESCRIPTION("Celestica E1031 SMC driver"); +MODULE_VERSION("1.0.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/haliburton/script/fancontrol.sh b/platform/broadcom/sonic-platform-modules-cel/haliburton/script/fancontrol.sh new file mode 100755 index 00000000000..f2c0f3cd0f4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/haliburton/script/fancontrol.sh @@ -0,0 +1,78 @@ +#! /bin/sh + +### BEGIN INIT INFO +# Provides: fancontrol +# Required-Start: $remote_fs +# Required-Stop: $remote_fs +# Default-Start: 2 3 4 5 +# Default-Stop: +# Short-Description: fancontrol +# Description: fan speed regulator +### END INIT INFO + +. /lib/lsb/init-functions + +[ -f /etc/default/rcS ] && . /etc/default/rcS +PATH=/bin:/usr/bin:/sbin:/usr/sbin:/usr/local/bin +DAEMON=/usr/local/bin/fancontrol +DESC="fan speed regulator" +NAME="fancontrol" +PIDFILE=/var/run/fancontrol.pid +PLATFORMPATH=/sys/devices/platform/e1031.smc +MAIN_CONF=/usr/share/sonic/device/x86_64-cel_e1031-r0/fancontrol +DEVPATH=/sys/devices/pci0000:00/0000:00:13.0/i2c-0/i2c-8/i2c-23/23-004d + +test -x $DAEMON || exit 0 + +for i in 1 2 3 +do + j=$i + [ $i -eq 3 ] && j=4 + FANFAULT=$(cat ${DEVPATH}/fan${j}_fault) + [ $FANFAULT = 1 ] && continue + FANDIR=$(cat ${PLATFORMPATH}/fan${i}_dir) +done +CONF=${MAIN_CONF}-${FANDIR} + +case "$1" in + start) + if [ -f $CONF ] ; then + if $DAEMON --check $CONF 1>/dev/null 2>/dev/null ; then + log_daemon_msg "Starting $DESC" "$NAME\n" + start-stop-daemon --start --quiet --pidfile $PIDFILE --startas $DAEMON $CONF + log_end_msg $? + else + log_failure_msg "Not starting fancontrol, broken configuration file; please re-run pwmconfig." + fi + else + if [ "$VERBOSE" != no ]; then + log_warning_msg "Not starting fancontrol; run pwmconfig first." + fi + fi + ;; + stop) + log_daemon_msg "Stopping $DESC" "$NAME" + start-stop-daemon --stop --quiet --pidfile $PIDFILE --oknodo --startas $DAEMON $CONF + rm -f $PIDFILE + log_end_msg $? + ;; + restart) + $0 stop + sleep 3 + $0 start + ;; + force-reload) + if start-stop-daemon --stop --test --quiet --pidfile $PIDFILE --startas $DAEMON $CONF ; then + $0 restart + fi + ;; + status) + status_of_proc $DAEMON $NAME $CONF && exit 0 || exit $? + ;; + *) + log_success_msg "Usage: /etc/init.d/fancontrol {start|stop|restart|force-reload|status}" + exit 1 + ;; +esac + +exit 0 \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/haliburton/setup.py b/platform/broadcom/sonic-platform-modules-cel/haliburton/setup.py new file mode 100644 index 00000000000..17056855106 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/haliburton/setup.py @@ -0,0 +1,34 @@ +from setuptools import setup + +DEVICE_NAME = 'celestica' +HW_SKU = 'x86_64-cel_e1031-r0' + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Wirut Getbamrung', + maintainer_email='wgetbumr@celestica.com', + packages=[ + 'sonic_platform', + ], + package_dir={ + 'sonic_platform': '../../../../device/{}/{}/sonic_platform'.format(DEVICE_NAME, HW_SKU)}, + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 2.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/haliburton/systemd/platform-modules-haliburton.service b/platform/broadcom/sonic-platform-modules-cel/haliburton/systemd/platform-modules-haliburton.service new file mode 100644 index 00000000000..bf129503885 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/haliburton/systemd/platform-modules-haliburton.service @@ -0,0 +1,14 @@ + +[Unit] +Description=Celestica haliburton platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-haliburton start +ExecStop=-/etc/init.d/platform-modules-haliburton stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/services/fancontrol/fancontrol b/platform/broadcom/sonic-platform-modules-cel/services/fancontrol/fancontrol new file mode 100755 index 00000000000..9155d8a6699 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/services/fancontrol/fancontrol @@ -0,0 +1,616 @@ +#!/bin/bash +# +# Simple script implementing a temperature dependent fan speed control +# Supported Linux kernel versions: 2.6.5 and later +# +# Version 0.70 +# +# Usage: fancontrol [CONFIGFILE] +# +# Dependencies: +# bash, egrep, sed, cut, sleep, readlink, lm_sensors :) +# +# Please send any questions, comments or success stories to +# marius.reiner@hdev.de +# Thanks! +# +# For configuration instructions and warnings please see fancontrol.txt, which +# can be found in the doc/ directory or at the website mentioned above. +# +# +# Copyright 2003 Marius Reiner +# Copyright (C) 2007-2009 Jean Delvare +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA. +# +# + +PIDFILE="/var/run/fancontrol.pid" + +#DEBUG=1 +MAX=255 + +function LoadConfig +{ + local fcvcount fcv + + echo "Loading configuration from $1 ..." + if [ ! -r "$1" ] + then + echo "Error: Can't read configuration file" >&2 + exit 1 + fi + + # grep configuration from file + INTERVAL=`egrep '^INTERVAL=.*$' $1 | sed -e 's/INTERVAL=//g'` + DEVPATH=`egrep '^DEVPATH=.*$' $1 | sed -e 's/DEVPATH= *//g'` + DEVNAME=`egrep '^DEVNAME=.*$' $1 | sed -e 's/DEVNAME= *//g'` + FCTEMPS=`egrep '^FCTEMPS=.*$' $1 | sed -e 's/FCTEMPS=//g'` + MINTEMP=`egrep '^MINTEMP=.*$' $1 | sed -e 's/MINTEMP=//g'` + MAXTEMP=`egrep '^MAXTEMP=.*$' $1 | sed -e 's/MAXTEMP=//g'` + MINSTART=`egrep '^MINSTART=.*$' $1 | sed -e 's/MINSTART=//g'` + MINSTOP=`egrep '^MINSTOP=.*$' $1 | sed -e 's/MINSTOP=//g'` + # optional settings: + FCFANS=`egrep '^FCFANS=.*$' $1 | sed -e 's/FCFANS=//g'` + MINPWM=`egrep '^MINPWM=.*$' $1 | sed -e 's/MINPWM=//g'` + MAXPWM=`egrep '^MAXPWM=.*$' $1 | sed -e 's/MAXPWM=//g'` + THYST=`egrep '^THYST=.*$' $1 | sed -e 's/THYST=//g'` + echo + # Check whether all mandatory settings are set + if [[ -z ${INTERVAL} || -z ${FCTEMPS} || -z ${MINTEMP} || -z ${MAXTEMP} || -z ${MINSTART} || -z ${MINSTOP} ]] + then + echo "Some mandatory settings missing, please check your config file!" >&2 + exit 1 + fi + if [ "$INTERVAL" -le 0 ] + then + echo "Error in configuration file:" >&2 + echo "INTERVAL must be at least 1" >&2 + exit 1 + fi + + # write settings to arrays for easier use and print them + echo + echo "Common settings:" + echo " INTERVAL=$INTERVAL" + + let fcvcount=0 + for fcv in $FCTEMPS + do + if ! echo $fcv | egrep -q '=' + then + echo "Error in configuration file:" >&2 + echo "FCTEMPS value is improperly formatted" >&2 + exit 1 + fi + + AFCPWM[$fcvcount]=`echo $fcv |cut -d'=' -f1` + AFCTEMP[$fcvcount]=`echo $fcv |cut -d'=' -f2` + AFCFAN[$fcvcount]=`echo $FCFANS |sed -e 's/ /\n/g' |egrep "${AFCPWM[$fcvcount]}" |cut -d'=' -f2` + AFCFANFAULT[$fcvcount]=`echo "${AFCFAN[$fcvcount]}" |sed -e 's/input/fault/g'` + AFCMINTEMP[$fcvcount]=`echo $MINTEMP |sed -e 's/ /\n/g' |egrep "${AFCPWM[$fcvcount]}" |cut -d'=' -f2` + AFCMAXTEMP[$fcvcount]=`echo $MAXTEMP |sed -e 's/ /\n/g' |egrep "${AFCPWM[$fcvcount]}" |cut -d'=' -f2` + AFCMINSTART[$fcvcount]=`echo $MINSTART |sed -e 's/ /\n/g' |egrep "${AFCPWM[$fcvcount]}" |cut -d'=' -f2` + AFCMINSTOP[$fcvcount]=`echo $MINSTOP |sed -e 's/ /\n/g' |egrep "${AFCPWM[$fcvcount]}" |cut -d'=' -f2` + AFCMINPWM[$fcvcount]=`echo $MINPWM |sed -e 's/ /\n/g' |egrep "${AFCPWM[$fcvcount]}" |cut -d'=' -f2` + [ -z "${AFCMINPWM[$fcvcount]}" ] && AFCMINPWM[$fcvcount]=0 + AFCMAXPWM[$fcvcount]=`echo $MAXPWM |sed -e 's/ /\n/g' |egrep "${AFCPWM[$fcvcount]}" |cut -d'=' -f2` + [ -z "${AFCMAXPWM[$fcvcount]}" ] && AFCMAXPWM[$fcvcount]=255 + AFCTHYST[$fcvcount]=`echo $THYST |sed -e 's/ /\n/g' |egrep "${AFCPWM[$fcvcount]}" |cut -d'=' -f2` + [ -z "${AFCTHYST[$fcvcount]}" ] && AFCTHYST[$fcvcount]=0 + + # verify the validity of the settings + if [ "${AFCMINTEMP[$fcvcount]}" -ge "${AFCMAXTEMP[$fcvcount]}" ] + then + echo "Error in configuration file (${AFCPWM[$fcvcount]}):" >&2 + echo "MINTEMP must be less than MAXTEMP" >&2 + exit 1 + fi + if [ "${AFCMAXPWM[$fcvcount]}" -gt 255 ] + then + echo "Error in configuration file (${AFCPWM[$fcvcount]}):" >&2 + echo "MAXPWM must be at most 255" >&2 + exit 1 + fi + if [ "${AFCMINSTOP[$fcvcount]}" -ge "${AFCMAXPWM[$fcvcount]}" ] + then + echo "Error in configuration file (${AFCPWM[$fcvcount]}):" >&2 + echo "MINSTOP must be less than MAXPWM" >&2 + exit 1 + fi + if [ "${AFCMINSTOP[$fcvcount]}" -lt "${AFCMINPWM[$fcvcount]}" ] + then + echo "Error in configuration file (${AFCPWM[$fcvcount]}):" >&2 + echo "MINSTOP must be greater than or equal to MINPWM" >&2 + exit 1 + fi + if [ "${AFCMINPWM[$fcvcount]}" -lt 0 ] + then + echo "Error in configuration file (${AFCPWM[$fcvcount]}):" >&2 + echo "MINPWM must be at least 0" >&2 + exit 1 + fi + + echo + echo "Settings for ${AFCPWM[$fcvcount]}:" + echo " Depends on ${AFCTEMP[$fcvcount]}" + echo " Controls ${AFCFAN[$fcvcount]}" + echo " MINTEMP=${AFCMINTEMP[$fcvcount]}" + echo " MAXTEMP=${AFCMAXTEMP[$fcvcount]}" + echo " MINSTART=${AFCMINSTART[$fcvcount]}" + echo " MINSTOP=${AFCMINSTOP[$fcvcount]}" + echo " MINPWM=${AFCMINPWM[$fcvcount]}" + echo " MAXPWM=${AFCMAXPWM[$fcvcount]}" + echo " THYST=${AFCTHYST[$fcvcount]}" + let fcvcount=fcvcount+1 + done + echo +} + +function CheckFanFault() +{ + let fancount=0 + while (( $fancount < ${#AFCFANFAULT[@]} )) # go through all fan fault. + do + fault=`cat ${AFCFANFAULT[$fancount]}` + if [[ "$fault" == "1" ]] + then + return 1 # fan fault detected + fi + let fancount=$fancount+1 + done + return 0 +} + +function DevicePath() +{ + if [ -h "$1/device" ] + then + readlink -f "$1/device" | sed -e 's/^\/sys\///' + fi +} + +function DeviceName() +{ + if [ -r "$1/name" ] + then + cat "$1/name" | sed -e 's/[[:space:]=]/_/g' + elif [ -r "$1/device/name" ] + then + cat "$1/device/name" | sed -e 's/[[:space:]=]/_/g' + fi +} + +function ValidateDevices() +{ + local OLD_DEVPATH="$1" OLD_DEVNAME="$2" outdated=0 + local entry device name path + + for entry in $OLD_DEVPATH + do + device=`echo "$entry" | sed -e 's/=[^=]*$//'` + path=`echo "$entry" | sed -e 's/^[^=]*=//'` + + if [ "`DevicePath "$device"`" != "$path" ] + then + echo "Device path of $device has changed" >&2 + outdated=1 + fi + done + + for entry in $OLD_DEVNAME + do + device=`echo "$entry" | sed -e 's/=[^=]*$//'` + name=`echo "$entry" | sed -e 's/^[^=]*=//'` + + if [ "`DeviceName "$device"`" != "$name" ] + then + echo "Device name of $device has changed" >&2 + outdated=1 + fi + done + + return $outdated +} + +# Check that all referenced sysfs files exist +function CheckFiles +{ + local outdated=0 fcvcount pwmo tsen fan + + let fcvcount=0 + while (( $fcvcount < ${#AFCPWM[@]} )) # go through all pwm outputs + do + pwmo=${AFCPWM[$fcvcount]} + if [ ! -w $pwmo ] + then + echo "Error: file $pwmo doesn't exist" >&2 + outdated=1 + fi + let fcvcount=$fcvcount+1 + done + + let fcvcount=0 + while (( $fcvcount < ${#AFCTEMP[@]} )) # go through all temp inputs + do + tsen=${AFCTEMP[$fcvcount]} + if [ ! -r $tsen ] + then + echo "Error: file $tsen doesn't exist" >&2 + outdated=1 + fi + let fcvcount=$fcvcount+1 + done + + let fcvcount=0 + while (( $fcvcount < ${#AFCFAN[@]} )) # go through all fan inputs + do + # A given PWM output can control several fans + for fan in $(echo ${AFCFAN[$fcvcount]} | sed -e 's/+/ /') + do + if [ ! -r $fan ] + then + echo "Error: file $fan doesn't exist" >&2 + outdated=1 + fi + done + let fcvcount=$fcvcount+1 + done + + if [ $outdated -eq 1 ] + then + echo >&2 + echo "At least one referenced file is missing. Either some required kernel" >&2 + echo "modules haven't been loaded, or your configuration file is outdated." >&2 + echo "In the latter case, you should run pwmconfig again." >&2 + fi + + return $outdated +} + +if [ "$1" == "--check" ] +then + if [ -f "$2" ] + then + LoadConfig $2 + else + LoadConfig /etc/fancontrol + fi + exit 0 +fi + +if [ -f "$1" ] +then + LoadConfig $1 +else + LoadConfig /etc/fancontrol +fi + +# Detect path to sensors +if echo "${AFCPWM[0]}" | egrep -q '^/' +then + DIR=/ +elif echo "${AFCPWM[0]}" | egrep -q '^hwmon[0-9]' +then + DIR=/sys/class/hwmon +elif echo "${AFCPWM[0]}" | egrep -q '^[1-9]*[0-9]-[0-9abcdef]{4}' +then + DIR=/sys/bus/i2c/devices +else + echo "$0: Invalid path to sensors" >&2 + exit 1 +fi + +if [ ! -d $DIR ] +then + echo $0: 'No sensors found! (did you load the necessary modules?)' >&2 + exit 1 +fi +cd $DIR + +# Check for configuration change +if [ "$DIR" != "/" ] && [ -z "$DEVPATH" -o -z "$DEVNAME" ] +then + echo "Configuration is too old, please run pwmconfig again" >&2 + exit 1 +fi +if [ "$DIR" = "/" -a -n "$DEVPATH" ] +then + echo "Unneeded DEVPATH with absolute device paths" >&2 + exit 1 +fi +if ! ValidateDevices "$DEVPATH" "$DEVNAME" +then + echo "Configuration appears to be outdated, please run pwmconfig again" >&2 + exit 1 +fi +CheckFiles || exit 1 + +if [ -f "$PIDFILE" ] +then + echo "File $PIDFILE exists, is fancontrol already running?" >&2 + exit 1 +fi +echo $$ > "$PIDFILE" + +# $1 = pwm file name +function pwmdisable() +{ + local ENABLE=${1}_enable + + # No enable file? Just set to max + if [ ! -f $ENABLE ] + then + echo $MAX > $1 + return 0 + fi + + # Try pwmN_enable=0 + echo 0 > $ENABLE 2> /dev/null + if [ `cat $ENABLE` -eq 0 ] + then + # Success + echo $MAX > $1 + return 0 + fi + + # It didn't work, try pwmN_enable=1 pwmN=255 + echo 1 > $ENABLE 2> /dev/null + echo $MAX > $1 + if [ `cat $ENABLE` -eq 1 -a `cat $1` -ge 190 ] + then + # Success + return 0 + fi + + # Nothing worked + echo "$ENABLE stuck to" `cat $ENABLE` >&2 + return 1 +} + +# $1 = pwm file name +function pwmenable() +{ + local ENABLE=${1}_enable + + if [ -f $ENABLE ] + then + echo 1 > $ENABLE 2> /dev/null + if [ $? -ne 0 ] + then + return 1 + fi + fi + echo $MAX > $1 +} + +function restorefans() +{ + local status=$1 fcvcount pwmo + + echo 'Aborting, restoring fans...' + let fcvcount=0 + while (( $fcvcount < ${#AFCPWM[@]} )) # go through all pwm outputs + do + pwmo=${AFCPWM[$fcvcount]} + pwmdisable $pwmo + let fcvcount=$fcvcount+1 + done + echo 'Verify fans have returned to full speed' + rm -f "$PIDFILE" + exit $status +} + +trap 'restorefans 0' SIGQUIT SIGTERM +trap 'restorefans 1' SIGHUP SIGINT + +function upperBound +{ + # $1: temperature + # $2: Tmin + # $3: Tmax + # $4: MinPWM + # $5: MaxPWM + # $6 Thyst + # upper_bound = (temperature-Tmin+2) * (MaxPWM-MinPWM)/(Tmax-Tmin)+MinPWM + let a="($1-$2+$6)*($5-$4)/($3-$2)+$4" + up_b=$a +} +function lowerBound +{ + # $1: temperature + # $2: Tmin + # $3: Tmax + # $4: MinPWM + # $5: MaxPWM + # $6 Thyst + # lower_bound = (temperature-Tmin) *(MaxPWM-MinPWM)/(Tmax-Tmin)+MinPWM + let a="($1-$2)*($5-$4)/($3-$2)+$4" + lw_b=$a +} + +# main function +function UpdateFanSpeeds +{ + local fcvcount + local pwmo tsens fan mint maxt minsa minso minpwm maxpwm tHyst + local tval pwmpval fanval min_fanval one_fan one_fanval + local -i pwmval + + let fcvcount=0 + while (( $fcvcount < ${#AFCPWM[@]} )) # go through all pwm outputs + do + #hopefully shorter vars will improve readability: + pwmo=${AFCPWM[$fcvcount]} + tsens=${AFCTEMP[$fcvcount]} + fan=${AFCFAN[$fcvcount]} + let mint="${AFCMINTEMP[$fcvcount]}*1000" + let maxt="${AFCMAXTEMP[$fcvcount]}*1000" + minsa=${AFCMINSTART[$fcvcount]} + minso=${AFCMINSTOP[$fcvcount]} + minpwm=${AFCMINPWM[$fcvcount]} + maxpwm=${AFCMAXPWM[$fcvcount]} + let tHyst="${AFCTHYST[$fcvcount]}*1000" + + #if some fan fault detected all pwm=100% + CheckFanFault + if [ $? -ne 0 ] + then + echo $MAX > $pwmo + let fcvcount=$fcvcount+1 + continue + fi + + read tval < ${tsens} + if [ $? -ne 0 ] + then + echo "Error reading temperature from $DIR/$tsens" + restorefans 1 + fi + + read pwmpval < ${pwmo} + if [ $? -ne 0 ] + then + echo "Error reading PWM value from $DIR/$pwmo" + restorefans 1 + fi + + # If fanspeed-sensor output shall be used, do it + if [[ -n ${fan} ]] + then + min_fanval=100000 + fanval= + # A given PWM output can control several fans + for one_fan in $(echo $fan | sed -e 's/+/ /') + do + read one_fanval < ${one_fan} + if [ $? -ne 0 ] + then + echo "Error reading Fan value from $DIR/$one_fan" >&2 + restorefans 1 + fi + + # Remember the minimum, it only matters if it is 0 + if [ $one_fanval -lt $min_fanval ] + then + min_fanval=$one_fanval + fi + + if [ -z "$fanval" ] + then + fanval=$one_fanval + else + fanval="$fanval/$one_fanval" + fi + done + else + fanval=1 # set it to a non zero value, so the rest of the script still works + fi + + # debug info + if [ "$DEBUG" != "" ] + then + echo "pwmo=$pwmo" + echo "tsens=$tsens" + echo "fan=$fan" + echo "mint=$mint" + echo "maxt=$maxt" + echo "minsa=$minsa" + echo "minso=$minso" + echo "minpwm=$minpwm" + echo "maxpwm=$maxpwm" + echo "tval=$tval" + echo "pwmpval=$pwmpval" + echo "fanval=$fanval" + echo "min_fanval=$min_fanval" + echo "tHyst=$tHyst" + fi + pwmval=$pwmpval + if (( $tval+$tHyst <= $mint )) + then pwmval=$minpwm # below min temp, use defined min pwm + elif (( $tval >= $maxt )) + then pwmval=$maxpwm # over max temp, use defined max pwm + elif (( $tval+$tHyst >= $maxt )) && (( $pwmpval == $maxpwm )) + then pwmval=$maxpwm + else + # calculate the new value from temperature and settings + # pwmval="(${tval}-${mint})*(${maxpwm}-${minso})/(${maxt}-${mint})+${minso} + lowerBound ${tval} ${mint} ${maxt} ${minpwm} ${maxpwm} ${tHyst} + lb=$lw_b + upperBound ${tval} ${mint} ${maxt} ${minpwm} ${maxpwm} ${tHyst} + ub=$up_b + + if [ "$DEBUG" != "" ] + then + echo "old pwm=$pwmval lw_b=$lw_b up_b=$up_b" + fi + + if [[ "$pwmval" -gt "$ub" ]] + then + pwmval=$ub + else + if [[ "$pwmval" -lt "$lb" ]] + then + pwmval=$lb + fi + fi + + if [ $pwmpval -eq 0 -o $min_fanval -eq 0 ] + then # if fan was stopped start it using a safe value + echo $minsa > $pwmo + # Sleep while still handling signals + sleep 1 & + wait $! + fi + fi + echo $pwmval > $pwmo # write new value to pwm output + if [ $? -ne 0 ] + then + echo "Error writing PWM value to $DIR/$pwmo" >&2 + restorefans 1 + fi + if [ "$DEBUG" != "" ] + then + echo "new pwmval=$pwmval" + fi + let fcvcount=$fcvcount+1 + done +} + +echo 'Enabling PWM on fans...' +let fcvcount=0 +while (( $fcvcount < ${#AFCPWM[@]} )) # go through all pwm outputs +do + pwmo=${AFCPWM[$fcvcount]} + pwmenable $pwmo + if [ $? -ne 0 ] + then + echo "Error enabling PWM on $DIR/$pwmo" >&2 + restorefans 1 + fi + let fcvcount=$fcvcount+1 +done + +echo 'Starting automatic fan control...' + +# main loop calling the main function at specified intervals +while true +do + UpdateFanSpeeds + # Sleep while still handling signals + sleep $INTERVAL & + wait $! +done \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/services/fancontrol/fancontrol.service b/platform/broadcom/sonic-platform-modules-cel/services/fancontrol/fancontrol.service new file mode 100755 index 00000000000..bda54167002 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/services/fancontrol/fancontrol.service @@ -0,0 +1,12 @@ +[Unit] +Description=fan speed regulator +After=platform-modules-haliburton.service +Before=pmon.service + +[Service] +ExecStart=-/etc/init.d/fancontrol.sh start +ExecStop=-/etc/init.d/fancontrol.sh stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-cel/services/platform_api/platform_api_mgnt.sh b/platform/broadcom/sonic-platform-modules-cel/services/platform_api/platform_api_mgnt.sh new file mode 100755 index 00000000000..e1d33035789 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/services/platform_api/platform_api_mgnt.sh @@ -0,0 +1,41 @@ +#!/bin/bash + +PREV_REBOOT_CAUSE="/host/reboot-cause/" +DEVICE="/usr/share/sonic/device" +PLATFORM=$(/usr/local/bin/sonic-cfggen -H -v DEVICE_METADATA.localhost.platform) +FILES=$DEVICE/$PLATFORM/api_files + +install() { + # Install sonic-platform package + if [ -e $DEVICE/$PLATFORM/sonic_platform-1.0-py2-none-any.whl ]; then + pip install $DEVICE/$PLATFORM/sonic_platform-1.0-py2-none-any.whl + fi +} + +init() { + # mount needed files for sonic-platform package + mkdir -p $FILES + + mkdir -p $FILES/reboot-cause + mount -B $PREV_REBOOT_CAUSE $FILES/reboot-cause +} + +deinit() { + # deinit sonic-platform package + umount -f $PREV_REBOOT_CAUSE $FILES/reboot-cause >/dev/null 2>/dev/null +} + +uninstall() { + # Uninstall sonic-platform package + pip uninstall -y sonic-platform >/dev/null 2>/dev/null +} + +case "$1" in +install | uninstall | init | deinit) + $1 + ;; +*) + echo "Usage: $0 {install|uninstall|init|deinit}" + exit 1 + ;; +esac diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf b/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf new file mode 100644 index 00000000000..cb8dcf640ba --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf @@ -0,0 +1,15 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-pca954x +ipmi_devintf +ipmi_si \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile new file mode 100644 index 00000000000..f6ad4d9ba4d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile @@ -0,0 +1 @@ +obj-m := baseboard-lpc.o mc24lc64t.o switchboard.o \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c new file mode 100644 index 00000000000..b6291f7d3ce --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c @@ -0,0 +1,433 @@ +/* + * baseboard-lpc.c - The CPLD driver for the Base Board of Silverstone + * The driver implement sysfs to access CPLD register on the baseboard of Silverstone via LPC bus. + * Copyright (C) 2018 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "baseboard-lpc" +/** + * CPLD register address for read and write. + */ +#define VERSION_ADDR 0xA100 +#define SCRATCH_ADDR 0xA101 +#define BLT_MONTH_ADDR 0xA102 +#define BLT_DATE_ADDR 0xA103 +#define REBOOT_CAUSE 0xA106 +#define SYS_LED_ADDR 0xA162 +#define CPLD_REGISTER_SIZE 0x93 + +/* System reboot cause recorded in CPLD */ +static const struct { + const char *reason; + u8 reset_code; +} reboot_causes[] = { + {"POR", 0x11}, + {"soft-warm-rst", 0x22}, + {"soft-cold-rst", 0x33}, + {"warm-rst", 0x44}, + {"cold-rst", 0x55}, + {"wdt-rst", 0x66}, + {"power-cycle", 0x77} +}; + +struct cpld_b_data { + struct mutex cpld_lock; + uint16_t read_addr; +}; + +struct cpld_b_data *cpld_data; + +static ssize_t scratch_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf,"0x%2.2x\n", data); +} + +static ssize_t scratch_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned long data; + char *last; + + mutex_lock(&cpld_data->cpld_lock); + data = (uint16_t)strtoul(buf,&last,16); + if(data == 0 && buf == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + outb(data, SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(scratch); + + +/* CPLD version attributes */ +static ssize_t version_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u8 version; + mutex_lock(&cpld_data->cpld_lock); + version = inb(VERSION_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "%d.%d\n", version >> 4, version & 0x0F); +} +static DEVICE_ATTR_RO(version); + +/* CPLD version attributes */ +static ssize_t build_date_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u8 month, day_of_month; + mutex_lock(&cpld_data->cpld_lock); + day_of_month = inb(BLT_DATE_ADDR); + month = inb(BLT_MONTH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf, "%x/%x\n", day_of_month, month); +} +static DEVICE_ATTR_RO(build_date); + + +static ssize_t getreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint16_t addr; + char *last; + + addr = (uint16_t)strtoul(buf,&last,16); + if(addr == 0 && buf == last){ + return -EINVAL; + } + cpld_data->read_addr = addr; + return count; +} + +static ssize_t getreg_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = 0; + + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n",inb(cpld_data->read_addr)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RW(getreg); + +static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint16_t addr; + uint8_t value; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + + strcpy(clone, buf); + + mutex_lock(&cpld_data->cpld_lock); + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + addr = (uint16_t)strtoul(tok,&last,16); + if(addr == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + value = (uint8_t)strtoul(tok,&last,16); + if(value == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + outb(value,addr); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_WO(setreg); + +/** + * Read all CPLD register in binary mode. + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i=0; + ssize_t status; + + mutex_lock(&cpld_data->cpld_lock); +begin: + if(i < count){ + buf[i++] = inb(VERSION_ADDR + off); + off++; + msleep(1); + goto begin; + } + status = count; + + mutex_unlock(&cpld_data->cpld_lock); + return status; +} +static BIN_ATTR_RO(dump, CPLD_REGISTER_SIZE); + +/** + * Show system led status - on/off/1hz/4hz + * @return Hex string read from scratch register. + */ +static ssize_t sys_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = data & 0x3; + return sprintf(buf, "%s\n", + data == 0x03 ? "off" : data == 0x02 ? "4hz" : data ==0x01 ? "1hz": "on"); +} + +/** + * Set the status of system led - on/off/1hz/4hz + */ +static ssize_t sys_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status,data; + if(sysfs_streq(buf, "off")){ + led_status = 0x03; + }else if(sysfs_streq(buf, "4hz")){ + led_status = 0x02; + }else if(sysfs_streq(buf, "1hz")){ + led_status = 0x01; + }else if(sysfs_streq(buf, "on")){ + led_status = 0x00; + }else{ + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + data = data & ~(0x3); + data = data | led_status; + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(sys_led); + +/** + * Show system led color - both/green/yellow/none + * @return Current led color. + */ +static ssize_t sys_led_color_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = (data >> 4) & 0x3; + return sprintf(buf, "%s\n", + data == 0x03 ? "off" : data == 0x02 ? "yellow" : data ==0x01 ? "green": "both"); +} + +/** + * Set the color of system led - both/green/yellow/none + */ +static ssize_t sys_led_color_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status,data; + if(sysfs_streq(buf, "off")){ + led_status = 0x03; + }else if(sysfs_streq(buf, "yellow")){ + led_status = 0x02; + }else if(sysfs_streq(buf, "green")){ + led_status = 0x01; + }else if(sysfs_streq(buf, "both")){ + led_status = 0x00; + }else{ + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + data = data & ~( 0x3 << 4); + data = data | (led_status << 4); + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(sys_led_color); + +static ssize_t reboot_cause_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + ssize_t status; + u8 reg; + int i; + + mutex_lock(&cpld_data->cpld_lock); + reg = inb(REBOOT_CAUSE); + mutex_unlock(&cpld_data->cpld_lock); + + status = 0; + dev_dbg(dev,"reboot: 0x%x\n", (u8)reg); + for(i = 0; i < ARRAY_SIZE(reboot_causes); i++){ + if((u8)reg == reboot_causes[i].reset_code){ + status = sprintf(buf, "%s\n", + reboot_causes[i].reason); + break; + } + } + return status; +} +DEVICE_ATTR_RO(reboot_cause); + +static struct attribute *cpld_b_attrs[] = { + &dev_attr_version.attr, + &dev_attr_build_date.attr, + &dev_attr_scratch.attr, + &dev_attr_getreg.attr, + &dev_attr_setreg.attr, + &dev_attr_sys_led.attr, + &dev_attr_sys_led_color.attr, + &dev_attr_reboot_cause.attr, + NULL, +}; + +static struct bin_attribute *cpld_b_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute_group cpld_b_attrs_grp = { + .attrs = cpld_b_attrs, + .bin_attrs = cpld_b_bin_attrs, +}; + +static struct resource cpld_b_resources[] = { + { + .start = 0xA100, + .end = 0xA192, + .flags = IORESOURCE_IO, + }, +}; + +static void cpld_b_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device cpld_b_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(cpld_b_resources), + .resource = cpld_b_resources, + .dev = { + .release = cpld_b_dev_release, + } +}; + +static int cpld_b_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int err = 0; + + cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct cpld_b_data), + GFP_KERNEL); + if (!cpld_data) + return -ENOMEM; + + mutex_init(&cpld_data->cpld_lock); + + cpld_data->read_addr = VERSION_ADDR; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (unlikely(!res)) { + printk(KERN_ERR "Specified Resource Not Available...\n"); + return -ENODEV; + } + + err = sysfs_create_group(&pdev->dev.kobj, &cpld_b_attrs_grp); + if (err) { + printk(KERN_ERR "Cannot create sysfs for baseboard CPLD\n"); + return err; + } + return 0; +} + +static int cpld_b_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &cpld_b_attrs_grp); + return 0; +} + +static struct platform_driver cpld_b_drv = { + .probe = cpld_b_drv_probe, + .remove = __exit_p(cpld_b_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int cpld_b_init(void) +{ + // Register platform device and platform driver + platform_device_register(&cpld_b_dev); + platform_driver_register(&cpld_b_drv); + return 0; +} + +void cpld_b_exit(void) +{ + // Unregister platform device and platform driver + platform_driver_unregister(&cpld_b_drv); + platform_device_unregister(&cpld_b_dev); +} + +module_init(cpld_b_init); +module_exit(cpld_b_exit); + + +MODULE_AUTHOR("Celestica Inc."); +MODULE_DESCRIPTION("Celestica Silverstone CPLD baseboard driver"); +MODULE_VERSION("0.2.0"); +MODULE_LICENSE("GPL"); \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/mc24lc64t.c new file mode 100644 index 00000000000..fc15bb74b68 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/mc24lc64t.c @@ -0,0 +1,174 @@ +/* + * mc24lc64t.c - driver for Microchip 24LC64T + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define EEPROM_SIZE 8192 //mc24lt64t eeprom size in bytes. + +struct mc24lc64t_data { + struct mutex update_lock; +}; + +static ssize_t mc24lc64t_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, read_time, i = 0; + int status; + + mutex_lock(&drvdata->update_lock); + + if (i2c_smbus_write_byte_data(client, off>>8, off)) + { + status = -EIO; + goto exit; + } + + msleep(1); + +begin: + + if (i < count) + { + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + do { + read_time = jiffies; + + status = i2c_smbus_read_byte(client); + if (status >= 0) + { + buf[i++] = status; + goto begin; + } + } while (time_before(read_time, timeout)); + + status = -ETIMEDOUT; + goto exit; + } + + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + + return status; +} + + +static ssize_t mc24lc64t_write (struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count){ + + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, write_time, i = 0; + int status; + u16 value; + + mutex_lock(&drvdata->update_lock); + +begin: + if (i < count){ + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + value = (buf[i] << 8 | ( off &0xff)); + do { + write_time = jiffies; + status = i2c_smbus_write_word_data(client, off>>8, value); + if (status >= 0) + { + // increase offset + off++; + // increase buffer index + i++; + goto begin; + } + } while (time_before(write_time, timeout)); + status = -ETIMEDOUT; + goto exit; + } + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + return status; +} + + +static struct bin_attribute mc24lc64t_bit_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUGO, + }, + .size = EEPROM_SIZE, + .read = mc24lc64t_read, + .write = mc24lc64t_write, +}; + +static int mc24lc64t_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adapter = client->adapter; + struct mc24lc64t_data *drvdata; + int err; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA + | I2C_FUNC_SMBUS_READ_BYTE)) + return -EPFNOSUPPORT; + + if (!(drvdata = devm_kzalloc(&client->dev, + sizeof(struct mc24lc64t_data), GFP_KERNEL))) + return -ENOMEM; + + i2c_set_clientdata(client, drvdata); + mutex_init(&drvdata->update_lock); + + err = sysfs_create_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + return err; +} + +static int mc24lc64t_remove(struct i2c_client *client) +{ + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + + return 0; +} + +static const struct i2c_device_id mc24lc64t_id[] = { + { "24lc64t", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mc24lc64t_id); + +static struct i2c_driver mc24lc64t_driver = { + .driver = { + .name = "mc24lc64t", + .owner = THIS_MODULE, + }, + .probe = mc24lc64t_probe, + .remove = mc24lc64t_remove, + .id_table = mc24lc64t_id, +}; + +module_i2c_driver(mc24lc64t_driver); + +MODULE_AUTHOR("Abhisit Sangjan "); +MODULE_DESCRIPTION("Microchip 24LC64T Driver"); +MODULE_LICENSE("GPL"); \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switchboard.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switchboard.c new file mode 100644 index 00000000000..2ee6c858a8b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switchboard.c @@ -0,0 +1,2106 @@ +/* + * switchboard.c - driver for Silverstone Switch board FPGA/CPLD. + * + * Author: Pradchaya Phucharoen + * + * Copyright (C) 2018 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * / + * \--sys + * \--devices + * \--platform + * \--silverstone + * |--FPGA + * |--CPLD1 + * |--CPLD2 + * \--SFF + * |--QSFP[1..32] + * \--SFP[1..2] + * + */ + +#ifndef TEST_MODE +#define MOD_VERSION "1.2.0" +#else +#define MOD_VERSION "TEST" +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static int majorNumber; + +#define CLASS_NAME "silverstone_fpga" +#define DRIVER_NAME "switchboard" +#define FPGA_PCI_NAME "Silverstone_fpga_pci" +#define DEVICE_NAME "fwupgrade" + + +static int smbus_access(struct i2c_adapter *adapter, u16 addr, + unsigned short flags, char rw, u8 cmd, + int size, union i2c_smbus_data *data); + +static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr, + unsigned short flags, char rw, u8 cmd, + int size, union i2c_smbus_data *data); + +static int fpgafw_init(void); +static void fpgafw_exit(void); + + +/* +======================================== +FPGA PCIe BAR 0 Registers +======================================== +Misc Control 0x00000000 – 0x000000FF. +I2C_CH1 0x00000100 - 0x00000110 +I2C_CH2 0x00000200 - 0x00000210. +I2C_CH3 0x00000300 - 0x00000310. +I2C_CH4 0x00000400 - 0x00000410. +I2C_CH5 0x00000500 - 0x00000510. +I2C_CH6 0x00000600 - 0x00000610. +I2C_CH7 0x00000700 - 0x00000710. +I2C_CH8 0x00000800 - 0x00000810. +I2C_CH9 0x00000900 - 0x00000910. +I2C_CH10 0x00000A00 - 0x00000A10. +I2C_CH11 0x00000B00 - 0x00000B10. +I2C_CH12 0x00000C00 - 0x00000C10. +I2C_CH13 0x00000D00 - 0x00000D10. +SPI Master 0x00001200 - 0x00001300. +DPLL SPI Master 0x00001320 - 0x0000132F. +PORT XCVR 0x00004000 - 0x00004FFF. +*/ + +/* MISC */ +#define FPGA_VERSION 0x0000 +#define FPGA_VERSION_MJ_MSK 0xff00 +#define FPGA_VERSION_MN_MSK 0x00ff +#define FPGA_SCRATCH 0x0004 +#define FPGA_BROAD_TYPE 0x0008 +#define FPGA_BROAD_REV_MSK 0x0038 +#define FPGA_BROAD_ID_MSK 0x0007 +#define FPGA_PLL_STATUS 0x0014 +#define BMC_I2C_SCRATCH 0x0020 +#define FPGA_SLAVE_CPLD_REST 0x0030 +#define FPGA_PERIPH_RESET_CTRL 0x0034 +#define FPGA_INT_STATUS 0x0040 +#define FPGA_INT_SRC_STATUS 0x0044 +#define FPGA_INT_FLAG 0x0048 +#define FPGA_INT_MASK 0x004c +#define FPGA_MISC_CTRL 0x0050 +#define FPGA_MISC_STATUS 0x0054 +#define FPGA_AVS_VID_STATUS 0x0068 +#define FPGA_PORT_XCVR_READY 0x000c + +/* I2C_MASTER BASE ADDR */ +#define I2C_MASTER_FREQ_1 0x0100 +#define I2C_MASTER_CTRL_1 0x0104 +#define I2C_MASTER_STATUS_1 0x0108 +#define I2C_MASTER_DATA_1 0x010c +#define I2C_MASTER_PORT_ID_1 0x0110 +#define I2C_MASTER_CH_1 1 +#define I2C_MASTER_CH_2 2 +#define I2C_MASTER_CH_3 3 +#define I2C_MASTER_CH_4 4 +#define I2C_MASTER_CH_5 5 +#define I2C_MASTER_CH_6 6 +#define I2C_MASTER_CH_7 7 +#define I2C_MASTER_CH_8 8 +#define I2C_MASTER_CH_9 9 +#define I2C_MASTER_CH_10 10 +#define I2C_MASTER_CH_11 11 +#define I2C_MASTER_CH_12 12 +#define I2C_MASTER_CH_13 13 + +#define I2C_MASTER_CH_TOTAL I2C_MASTER_CH_5 + +/* SPI_MASTER */ +#define SPI_MASTER_WR_EN 0x1200 /* one bit */ +#define SPI_MASTER_WR_DATA 0x1204 /* 32 bits */ +#define SPI_MASTER_CHK_ID 0x1208 /* one bit */ +#define SPI_MASTER_VERIFY 0x120c /* one bit */ +#define SPI_MASTER_STATUS 0x1210 /* 15 bits */ +#define SPI_MASTER_MODULE_RST 0x1214 /* one bit */ + +/* FPGA FRONT PANEL PORT MGMT */ +#define SFF_PORT_CTRL_BASE 0x4000 +#define SFF_PORT_STATUS_BASE 0x4004 +#define SFF_PORT_INT_STATUS_BASE 0x4008 +#define SFF_PORT_INT_MASK_BASE 0x400c + +#define PORT_XCVR_REGISTER_SIZE 0x1000 + +/* PORT CTRL REGISTER +[31:7] RSVD +[6] LPMOD 6 +[5] RSVD +[4] RST 4 +[3:1] RSVD +[0] TXDIS 0 +*/ +#define CTRL_LPMOD 6 +#define CTRL_RST 4 +#define CTRL_TXDIS 0 + +/* PORT STATUS REGISTER +[31:6] RSVD +[5] IRQ 5 +[4] PRESENT 4 +[3] RSVD +[2] TXFAULT 2 +[1] RXLOS 1 +[0] MODABS 0 +*/ +#define STAT_IRQ 5 +#define STAT_PRESENT 4 +#define STAT_TXFAULT 2 +#define STAT_RXLOS 1 +#define STAT_MODABS 0 + +/* PORT INTRPT REGISTER +[31:6] RSVD +[5] INT_N 5 +[4] PRESENT 4 +[3] RSVD +[2] RSVD +[1] RXLOS 1 +[0] MODABS 0 +*/ +#define INTR_INT_N 5 +#define INTR_PRESENT 4 +#define INTR_TXFAULT 2 +#define INTR_RXLOS 1 +#define INTR_MODABS 0 + +/* PORT INT MASK REGISTER +[31:6] RSVD +[5] INT_N 5 +[4] PRESENT 4 +[3] RSVD +[2] RSVD +[1] RXLOS_INT 1 +[0] MODABS 0 +*/ +#define MASK_INT_N 5 +#define MASK_PRESENT 4 +#define MASK_TXFAULT 2 +#define MASK_RXLOS 1 +#define MASK_MODABS 0 + +enum { + I2C_SR_BIT_RXAK = 0, + I2C_SR_BIT_MIF, + I2C_SR_BIT_SRW, + I2C_SR_BIT_BCSTM, + I2C_SR_BIT_MAL, + I2C_SR_BIT_MBB, + I2C_SR_BIT_MAAS, + I2C_SR_BIT_MCF +}; + +enum { + I2C_CR_BIT_BCST = 0, + I2C_CR_BIT_RSTA = 2, + I2C_CR_BIT_TXAK, + I2C_CR_BIT_MTX, + I2C_CR_BIT_MSTA, + I2C_CR_BIT_MIEN, + I2C_CR_BIT_MEN, +}; + +/** + * + * The function is i2c algorithm implement to allow master access to + * correct endpoint devices trough the PCA9548 switch devices. + * + * FPGA I2C Master [mutex resource] + * | + * | + * --------------------------- + * | PCA9548(s) | + * ---1--2--3--4--5--6--7--8-- + * | | | | | | | | + * EEPROM ... EEPROM + * + */ + +#define VIRTUAL_I2C_QSFP_PORT 32 +#define VIRTUAL_I2C_SFP_PORT 2 + +#define SFF_PORT_TOTAL VIRTUAL_I2C_QSFP_PORT + VIRTUAL_I2C_SFP_PORT + +#define VIRTUAL_I2C_BUS_OFFSET 10 +#define CPLD1_SLAVE_ADDR 0x30 +#define CPLD2_SLAVE_ADDR 0x31 + +static struct class* fpgafwclass = NULL; // < The device-driver class struct pointer +static struct device* fpgafwdev = NULL; // < The device-driver device struct pointer + +#define PCI_VENDOR_ID_TEST 0x1af4 + +#ifndef PCI_VENDOR_ID_XILINX +#define PCI_VENDOR_ID_XILINX 0x10EE +#endif + +#define FPGA_PCIE_DEVICE_ID 0x7021 +#define TEST_PCIE_DEVICE_ID 0x1110 + + +#ifdef DEBUG_KERN +#define info(fmt,args...) printk(KERN_INFO "line %3d : "fmt,__LINE__,##args) +#define check(REG) printk(KERN_INFO "line %3d : %-8s = %2.2X",__LINE__,#REG,ioread8(REG)); +#else +#define info(fmt,args...) +#define check(REG) +#endif + +#define GET_REG_BIT(REG,BIT) ((ioread8(REG) >> BIT) & 0x01) +#define SET_REG_BIT_H(REG,BIT) iowrite8(ioread8(REG) | (0x01 << BIT),REG) +#define SET_REG_BIT_L(REG,BIT) iowrite8(ioread8(REG) & ~(0x01 << BIT),REG) + +static struct mutex fpga_i2c_master_locks[I2C_MASTER_CH_TOTAL]; +/* Store lasted switch address and channel */ +static uint16_t fpga_i2c_lasted_access_port[I2C_MASTER_CH_TOTAL]; + +enum PORT_TYPE { + NONE, + QSFP, + SFP +}; + +struct i2c_switch { + unsigned char master_bus; // I2C bus number + unsigned char switch_addr; // PCA9548 device address, 0xFF if directly connect to a bus. + unsigned char channel; // PCA9548 channel number. If the switch_addr is 0xFF, this value is ignored. + enum PORT_TYPE port_type; // QSFP/SFP tranceiver port type. + char calling_name[20]; // Calling name. +}; + +struct i2c_dev_data { + int portid; + struct i2c_switch pca9548; +}; + +/* PREDEFINED I2C SWITCH DEVICE TOPOLOGY */ +static struct i2c_switch fpga_i2c_bus_dev[] = { + /* BUS3 QSFP Exported as virtual bus */ + {I2C_MASTER_CH_3, 0x71, 2, QSFP, "QSFP1"}, {I2C_MASTER_CH_3, 0x71, 3, QSFP, "QSFP2"}, + {I2C_MASTER_CH_3, 0x71, 0, QSFP, "QSFP3"}, {I2C_MASTER_CH_3, 0x71, 1, QSFP, "QSFP4"}, + {I2C_MASTER_CH_3, 0x71, 6, QSFP, "QSFP5"}, {I2C_MASTER_CH_3, 0x71, 5, QSFP, "QSFP6"}, + {I2C_MASTER_CH_3, 0x73, 7, QSFP, "QSFP7"}, {I2C_MASTER_CH_3, 0x71, 4, QSFP, "QSFP8"}, + + {I2C_MASTER_CH_3, 0x73, 4, QSFP, "QSFP9"}, {I2C_MASTER_CH_3, 0x73, 3, QSFP, "QSFP10"}, + {I2C_MASTER_CH_3, 0x73, 6, QSFP, "QSFP11"}, {I2C_MASTER_CH_3, 0x73, 2, QSFP, "QSFP12"}, + {I2C_MASTER_CH_3, 0x73, 1, QSFP, "QSFP13"}, {I2C_MASTER_CH_3, 0x73, 5, QSFP, "QSFP14"}, + {I2C_MASTER_CH_3, 0x71, 7, QSFP, "QSFP15"}, {I2C_MASTER_CH_3, 0x73, 0, QSFP, "QSFP16"}, + + {I2C_MASTER_CH_3, 0x72, 1, QSFP, "QSFP17"}, {I2C_MASTER_CH_3, 0x72, 7, QSFP, "QSFP18"}, + {I2C_MASTER_CH_3, 0x72, 4, QSFP, "QSFP19"}, {I2C_MASTER_CH_3, 0x72, 0, QSFP, "QSFP20"}, + {I2C_MASTER_CH_3, 0x72, 5, QSFP, "QSFP21"}, {I2C_MASTER_CH_3, 0x72, 2, QSFP, "QSFP22"}, + {I2C_MASTER_CH_3, 0x70, 5, QSFP, "QSFP23"}, {I2C_MASTER_CH_3, 0x72, 6, QSFP, "QSFP24"}, + + {I2C_MASTER_CH_3, 0x72, 3, QSFP, "QSFP25"}, {I2C_MASTER_CH_3, 0x70, 6, QSFP, "QSFP26"}, + {I2C_MASTER_CH_3, 0x70, 0, QSFP, "QSFP27"}, {I2C_MASTER_CH_3, 0x70, 7, QSFP, "QSFP28"}, + {I2C_MASTER_CH_3, 0x70, 2, QSFP, "QSFP29"}, {I2C_MASTER_CH_3, 0x70, 4, QSFP, "QSFP30"}, + {I2C_MASTER_CH_3, 0x70, 3, QSFP, "QSFP31"}, {I2C_MASTER_CH_3, 0x70, 1, QSFP, "QSFP32"}, + /* BUS1 SFP+ Exported as virtual bus */ + {I2C_MASTER_CH_1, 0xFF, 0, SFP, "SFP1"}, + /* BUS2 SFP+ Exported as virtual bus */ + {I2C_MASTER_CH_2, 0xFF, 0, SFP, "SFP2"}, + /* BUS4 CPLD Access via I2C */ + {I2C_MASTER_CH_4, 0xFF, 0, NONE, "CPLD_S"}, + /* BUS5 CPLD_B */ + {I2C_MASTER_CH_5, 0xFF, 0, NONE, "CPLD_B"}, +}; + +#define VIRTUAL_I2C_PORT_LENGTH ARRAY_SIZE(fpga_i2c_bus_dev) +#define SW_I2C_CPLD_INDEX SFF_PORT_TOTAL + +struct fpga_device { + /* data mmio region */ + void __iomem *data_base_addr; + resource_size_t data_mmio_start; + resource_size_t data_mmio_len; +}; + +static struct fpga_device fpga_dev = { + .data_base_addr = 0, + .data_mmio_start = 0, + .data_mmio_len = 0, +}; + +struct silverstone_fpga_data { + struct device *sff_devices[SFF_PORT_TOTAL]; + struct i2c_client *sff_i2c_clients[SFF_PORT_TOTAL]; + struct i2c_adapter *i2c_adapter[VIRTUAL_I2C_PORT_LENGTH]; + struct mutex fpga_lock; // For FPGA internal lock + void __iomem * fpga_read_addr; + uint8_t cpld1_read_addr; + uint8_t cpld2_read_addr; +}; + +struct sff_device_data { + int portid; + enum PORT_TYPE port_type; +}; + +struct silverstone_fpga_data *fpga_data; + +/* + * Kernel object for other module drivers. + * Other module can use these kobject as a parent. + */ + +static struct kobject *fpga = NULL; +static struct kobject *cpld1 = NULL; +static struct kobject *cpld2 = NULL; + +/** + * Device node in sysfs tree. + */ +static struct device *sff_dev = NULL; + + +static ssize_t version_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + u32 version; + + mutex_lock(&fpga_data->fpga_lock); + version = ioread32(fpga_dev.data_base_addr + FPGA_VERSION); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d.%d\n", version >> 16, version & 0xFFFF); +} + +/** + * Show the value of the register set by 'set_fpga_reg_address' + * If the address is not set by 'set_fpga_reg_address' first, + * The version register is selected by default. + * @param buf register value in hextring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + // read data from the address + uint32_t data; + data = ioread32(fpga_data->fpga_read_addr); + return sprintf(buf, "0x%8.8x\n", data); +} +/** + * Store the register address + * @param buf address wanted to be read value of + * @return number of bytes stored, or an error code + */ +static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t addr; + char *last; + + addr = (uint32_t)strtoul(buf, &last, 16); + if (addr == 0 && buf == last) { + return -EINVAL; + } + fpga_data->fpga_read_addr = fpga_dev.data_base_addr + addr; + return count; +} +/** + * Show value of fpga scratch register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + return sprintf(buf, "0x%8.8x\n", ioread32(fpga_dev.data_base_addr + FPGA_SCRATCH) & 0xffffffff); +} +/** + * Store value of fpga scratch register + * @param buf scratch register value passing from user space + * @return number of bytes stored, or an error code + */ +static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t data; + char *last; + data = (uint32_t)strtoul(buf, &last, 16); + if (data == 0 && buf == last) { + return -EINVAL; + } + iowrite32(data, fpga_dev.data_base_addr + FPGA_SCRATCH); + return count; +} +/** + * Store a value in a specific register address + * @param buf the value and address in format '0xhhhh 0xhhhhhhhh' + * @return number of bytes sent by user space, or an error code + */ +static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // register are 4 bytes + uint32_t addr; + uint32_t value; + uint32_t mode = 8; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + + strcpy(clone, buf); + + mutex_lock(&fpga_data->fpga_lock); + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + addr = (uint32_t)strtoul(tok, &last, 16); + if (addr == 0 && tok == last) { + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + value = (uint32_t)strtoul(tok, &last, 16); + if (value == 0 && tok == last) { + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mode = 32; + } else { + mode = (uint32_t)strtoul(tok, &last, 10); + if (mode == 0 && tok == last) { + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + } + if (mode == 32) { + iowrite32(value, fpga_dev.data_base_addr + addr); + } else if (mode == 8) { + iowrite8(value, fpga_dev.data_base_addr + addr); + } else { + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + mutex_unlock(&fpga_data->fpga_lock); + return count; +} + +/** + * Show FPGA port XCVR ready status + * @param buf 1 if the functin is ready, 0 if not. + * @return number of bytes read, or an error code + */ +static ssize_t ready_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + unsigned int REGISTER = FPGA_PORT_XCVR_READY; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> 0) & 1U); +} + +/* FPGA attributes */ +static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address); +static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch); +static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value); +static DEVICE_ATTR_RO(ready); +static DEVICE_ATTR_RO(version); + +static struct attribute *fpga_attrs[] = { + &dev_attr_getreg.attr, + &dev_attr_scratch.attr, + &dev_attr_setreg.attr, + &dev_attr_ready.attr, + &dev_attr_version.attr, + NULL, +}; + +static struct attribute_group fpga_attr_grp = { + .attrs = fpga_attrs, +}; + +static ssize_t cpld1_version_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 version; + int err; + err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x00, + I2C_SMBUS_BYTE_DATA, + (union i2c_smbus_data *)&version); + if (err < 0) + return err; + return sprintf(buf, "%d.%d\n", version >> 4, version & 0x0F); +} +struct device_attribute dev_attr_cpld1_version = __ATTR(version, 0444, cpld1_version_show , NULL); + +/* SW CPLDs attributes */ +static ssize_t cpld1_getreg_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + uint8_t data; + fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, fpga_data->cpld1_read_addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + return sprintf(buf, "0x%2.2x\n", data); +} +static ssize_t cpld1_getreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + uint8_t addr; + char *last; + addr = (uint8_t)strtoul(buf, &last, 16); + if (addr == 0 && buf == last) { + return -EINVAL; + } + fpga_data->cpld1_read_addr = addr; + return size; +} +struct device_attribute dev_attr_cpld1_getreg = __ATTR(getreg, 0600, cpld1_getreg_show, cpld1_getreg_store); + +static ssize_t cpld1_scratch_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + __u8 data; + int err; + err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + if (err < 0) + return err; + return sprintf(buf, "0x%2.2x\n", data); +} +static ssize_t cpld1_scratch_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + // CPLD register is one byte + __u8 data; + char *last; + int err; + data = (uint8_t)strtoul(buf, &last, 16); + if (data == 0 && buf == last) { + return -EINVAL; + } + err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + if (err < 0) + return err; + return size; +} +struct device_attribute dev_attr_cpld1_scratch = __ATTR(scratch, 0600, cpld1_scratch_show, cpld1_scratch_store); + +static ssize_t cpld1_setreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + + uint8_t addr, value; + char *tok; + char clone[size]; + char *pclone = clone; + int err; + char *last; + + strcpy(clone, buf); + + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + return -EINVAL; + } + addr = (uint8_t)strtoul(tok, &last, 16); + if (addr == 0 && tok == last) { + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + return -EINVAL; + } + value = (uint8_t)strtoul(tok, &last, 16); + if (value == 0 && tok == last) { + return -EINVAL; + } + + err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&value); + if (err < 0) + return err; + + return size; +} +struct device_attribute dev_attr_cpld1_setreg = __ATTR(setreg, 0200, NULL, cpld1_setreg_store); + +static struct attribute *cpld1_attrs[] = { + &dev_attr_cpld1_version.attr, + &dev_attr_cpld1_getreg.attr, + &dev_attr_cpld1_scratch.attr, + &dev_attr_cpld1_setreg.attr, + NULL, +}; + +static struct attribute_group cpld1_attr_grp = { + .attrs = cpld1_attrs, +}; + +static ssize_t cpld2_version_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 version; + int err; + err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x00, + I2C_SMBUS_BYTE_DATA, + (union i2c_smbus_data *)&version); + if (err < 0) + return err; + return sprintf(buf, "%d.%d\n", version >> 4, version & 0x0F); +} +struct device_attribute dev_attr_cpld2_version = __ATTR(version, 0444, cpld2_version_show , NULL); + +static ssize_t cpld2_getreg_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + uint8_t data; + fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, fpga_data->cpld2_read_addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t cpld2_getreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + // CPLD register is one byte + uint32_t addr; + char *last; + addr = (uint8_t)strtoul(buf, &last, 16); + if (addr == 0 && buf == last) { + return -EINVAL; + } + fpga_data->cpld2_read_addr = addr; + return size; +} +struct device_attribute dev_attr_cpld2_getreg = __ATTR(getreg, 0600, cpld2_getreg_show, cpld2_getreg_store); + +static ssize_t cpld2_scratch_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + __u8 data; + int err; + err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + if (err < 0) + return err; + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t cpld2_scratch_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + // CPLD register is one byte + __u8 data; + char *last; + int err; + + data = (uint8_t)strtoul(buf, &last, 16); + if (data == 0 && buf == last) { + return -EINVAL; + } + err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + if (err < 0) + return err; + return size; +} +struct device_attribute dev_attr_cpld2_scratch = __ATTR(scratch, 0600, cpld2_scratch_show, cpld2_scratch_store); + +static ssize_t cpld2_setreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + uint8_t addr, value; + char *tok; + char clone[size]; + char *pclone = clone; + int err; + char *last; + + strcpy(clone, buf); + + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + return -EINVAL; + } + addr = (uint8_t)strtoul(tok, &last, 16); + if (addr == 0 && tok == last) { + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + return -EINVAL; + } + value = (uint8_t)strtoul(tok, &last, 16); + if (value == 0 && tok == last) { + return -EINVAL; + } + + err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&value); + if (err < 0) + return err; + + return size; +} +struct device_attribute dev_attr_cpld2_setreg = __ATTR(setreg, 0200, NULL, cpld2_setreg_store); + +static struct attribute *cpld2_attrs[] = { + &dev_attr_cpld2_version.attr, + &dev_attr_cpld2_getreg.attr, + &dev_attr_cpld2_scratch.attr, + &dev_attr_cpld2_setreg.attr, + NULL, +}; + +static struct attribute_group cpld2_attr_grp = { + .attrs = cpld2_attrs, +}; + +/* QSFP/SFP+ attributes */ +static ssize_t qsfp_modirq_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid - 1) * 0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_IRQ) & 1U); +} +DEVICE_ATTR_RO(qsfp_modirq); + +static ssize_t qsfp_modprs_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid - 1) * 0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_PRESENT) & 1U); +} +DEVICE_ATTR_RO(qsfp_modprs); + +static ssize_t sfp_txfault_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid - 1) * 0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_TXFAULT) & 1U); +} +DEVICE_ATTR_RO(sfp_txfault); + +static ssize_t sfp_rxlos_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid - 1) * 0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_RXLOS) & 1U); +} +DEVICE_ATTR_RO(sfp_rxlos); + +static ssize_t sfp_modabs_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid - 1) * 0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_MODABS) & 1U); +} +DEVICE_ATTR_RO(sfp_modabs); + +static ssize_t qsfp_lpmode_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid - 1) * 0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> CTRL_LPMOD) & 1U); +} +static ssize_t qsfp_lpmode_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + ssize_t status; + long value; + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid - 1) * 0x10; + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + // if value is 0, disable the lpmode + data = ioread32(fpga_dev.data_base_addr + REGISTER); + if (!value) + data = data & ~( (u32)0x1 << CTRL_LPMOD); + else + data = data | ((u32)0x1 << CTRL_LPMOD); + iowrite32(data, fpga_dev.data_base_addr + REGISTER); + status = size; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(qsfp_lpmode); + +static ssize_t qsfp_reset_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid - 1) * 0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> CTRL_RST) & 1U); +} + +static ssize_t qsfp_reset_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + ssize_t status; + long value; + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid - 1) * 0x10; + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + // if value is 0, reset signal is low + data = ioread32(fpga_dev.data_base_addr + REGISTER); + if (!value) + data = data & ~( (u32)0x1 << CTRL_RST); + else + data = data | ((u32)0x1 << CTRL_RST); + iowrite32(data, fpga_dev.data_base_addr + REGISTER); + status = size; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(qsfp_reset); + +static ssize_t sfp_txdisable_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid - 1) * 0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> CTRL_TXDIS) & 1U); +} +static ssize_t sfp_txdisable_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + ssize_t status; + long value; + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid - 1) * 0x10; + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + // check if value is 0 clear + data = ioread32(fpga_dev.data_base_addr + REGISTER); + if (!value) + data = data & ~( (u32)0x1 << CTRL_TXDIS); + else + data = data | ((u32)0x1 << CTRL_TXDIS); + iowrite32(data, fpga_dev.data_base_addr + REGISTER); + status = size; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(sfp_txdisable); + +static struct attribute *sff_attrs[] = { + &dev_attr_qsfp_modirq.attr, + &dev_attr_qsfp_modprs.attr, + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_reset.attr, + &dev_attr_sfp_txfault.attr, + &dev_attr_sfp_rxlos.attr, + &dev_attr_sfp_modabs.attr, + &dev_attr_sfp_txdisable.attr, + NULL, +}; + +static struct attribute_group sff_attr_grp = { + .attrs = sff_attrs, +}; + +static const struct attribute_group *sff_attr_grps[] = { + &sff_attr_grp, + NULL +}; + + +static ssize_t port_led_mode_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // value can be "nomal", "test" + __u8 led_mode_1, led_mode_2; + int err; + err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); + if (err < 0) + return err; + err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_2); + if (err < 0) + return err; + return sprintf(buf, "%s %s\n", + led_mode_1 ? "test" : "normal", + led_mode_2 ? "test" : "normal"); +} +static ssize_t port_led_mode_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + int status; + __u8 led_mode_1; + if (sysfs_streq(buf, "test")) { + led_mode_1 = 0x01; + } else if (sysfs_streq(buf, "normal")) { + led_mode_1 = 0x00; + } else { + return -EINVAL; + } + status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, + I2C_SMBUS_WRITE, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); + status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, + I2C_SMBUS_WRITE, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); + return size; +} +DEVICE_ATTR_RW(port_led_mode); + +// Only work when port_led_mode set to 1 +static ssize_t port_led_color_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // value can be R/G/B/C/M/Y/W/OFF + __u8 led_color1, led_color2; + int err; + err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color1); + if (err < 0) + return err; + err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color2); + if (err < 0) + return err; + return sprintf(buf, "%s %s\n", + led_color1 == 0x07 ? "off" : led_color1 == 0x06 ? "green" : led_color1 == 0x05 ? "red" : led_color1 == 0x04 ? + "yellow" : led_color1 == 0x03 ? "blue" : led_color1 == 0x02 ? "cyan" : led_color1 == 0x01 ? "magenta" : "white", + led_color1 == 0x07 ? "off" : led_color1 == 0x06 ? "green" : led_color1 == 0x05 ? "red" : led_color1 == 0x04 ? + "yellow" : led_color1 == 0x03 ? "blue" : led_color1 == 0x02 ? "cyan" : led_color1 == 0x01 ? "magenta" : "white"); +} + +static ssize_t port_led_color_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + int status; + __u8 led_color; + if (sysfs_streq(buf, "off")) { + led_color = 0x07; + } else if (sysfs_streq(buf, "green")) { + led_color = 0x06; + } else if (sysfs_streq(buf, "red")) { + led_color = 0x05; + } else if (sysfs_streq(buf, "yellow")) { + led_color = 0x04; + } else if (sysfs_streq(buf, "blue")) { + led_color = 0x03; + } else if (sysfs_streq(buf, "cyan")) { + led_color = 0x02; + } else if (sysfs_streq(buf, "magenta")) { + led_color = 0x01; + } else if (sysfs_streq(buf, "white")) { + led_color = 0x00; + } else { + status = -EINVAL; + return status; + } + status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, + I2C_SMBUS_WRITE, 0x0A, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color); + status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, + I2C_SMBUS_WRITE, 0x0A, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color); + return size; +} +DEVICE_ATTR_RW(port_led_color); + +static struct attribute *sff_led_test[] = { + &dev_attr_port_led_mode.attr, + &dev_attr_port_led_color.attr, + NULL, +}; + +static struct attribute_group sff_led_test_grp = { + .attrs = sff_led_test, +}; + +static struct device * silverstone_sff_init(int portid) { + struct sff_device_data *new_data; + struct device *new_device; + + new_data = kzalloc(sizeof(*new_data), GFP_KERNEL); + if (!new_data) { + printk(KERN_ALERT "Cannot alloc sff device data @port%d", portid); + return NULL; + } + /* The QSFP port ID start from 1 */ + new_data->portid = portid + 1; + new_data->port_type = fpga_i2c_bus_dev[portid].port_type; + new_device = device_create_with_groups(fpgafwclass, sff_dev, MKDEV(0, 0), new_data, sff_attr_grps, "%s", fpga_i2c_bus_dev[portid].calling_name); + if (IS_ERR(new_device)) { + printk(KERN_ALERT "Cannot create sff device @port%d", portid); + kfree(new_data); + return NULL; + } + return new_device; +} + +static int i2c_wait_ack(struct i2c_adapter *a, unsigned long timeout, int writing) { + int error = 0; + int Status; + + struct i2c_dev_data *new_data = i2c_get_adapdata(a); + void __iomem *pci_bar = fpga_dev.data_base_addr; + + unsigned int REG_FDR0; + unsigned int REG_CR0; + unsigned int REG_SR0; + unsigned int REG_DR0; + unsigned int REG_ID0; + + unsigned int master_bus = new_data->pca9548.master_bus; + + if (master_bus < I2C_MASTER_CH_1 || master_bus > I2C_MASTER_CH_TOTAL) { + error = -EINVAL; + return error; + } + + REG_FDR0 = I2C_MASTER_FREQ_1 + (master_bus - 1) * 0x0100; + REG_CR0 = I2C_MASTER_CTRL_1 + (master_bus - 1) * 0x0100; + REG_SR0 = I2C_MASTER_STATUS_1 + (master_bus - 1) * 0x0100; + REG_DR0 = I2C_MASTER_DATA_1 + (master_bus - 1) * 0x0100; + REG_ID0 = I2C_MASTER_PORT_ID_1 + (master_bus - 1) * 0x0100; + + check(pci_bar + REG_SR0); + check(pci_bar + REG_CR0); + + timeout = jiffies + msecs_to_jiffies(timeout); + while (1) { + Status = ioread8(pci_bar + REG_SR0); + if (jiffies > timeout) { + info("Status %2.2X", Status); + info("Error Timeout"); + error = -ETIMEDOUT; + break; + } + + + if (Status & (1 << I2C_SR_BIT_MIF)) { + break; + } + + if (writing == 0 && (Status & (1 << I2C_SR_BIT_MCF))) { + break; + } + } + Status = ioread8(pci_bar + REG_SR0); + iowrite8(0, pci_bar + REG_SR0); + + if (error < 0) { + info("Status %2.2X", Status); + return error; + } + + if (!(Status & (1 << I2C_SR_BIT_MCF))) { + info("Error Unfinish"); + return -EIO; + } + + if (Status & (1 << I2C_SR_BIT_MAL)) { + info("Error MAL"); + return -EAGAIN; + } + + if (Status & (1 << I2C_SR_BIT_RXAK)) { + info( "SL No Acknowlege"); + if (writing) { + info("Error No Acknowlege"); + iowrite8(1 << I2C_CR_BIT_MEN, pci_bar + REG_CR0); + return -ENXIO; + } + } else { + info( "SL Acknowlege"); + } + + return 0; +} + +static int smbus_access(struct i2c_adapter *adapter, u16 addr, + unsigned short flags, char rw, u8 cmd, + int size, union i2c_smbus_data *data) +{ + int error = 0; + int cnt = 0; + int bid = 0; + struct i2c_dev_data *dev_data; + void __iomem *pci_bar; + unsigned int portid, master_bus; + unsigned int REG_FDR0; + unsigned int REG_CR0; + unsigned int REG_SR0; + unsigned int REG_DR0; + unsigned int REG_ID0; + + /* Write the command register */ + dev_data = i2c_get_adapdata(adapter); + portid = dev_data->portid; + pci_bar = fpga_dev.data_base_addr; + master_bus = dev_data->pca9548.master_bus; + REG_FDR0 = I2C_MASTER_FREQ_1 + (master_bus - 1) * 0x0100; + REG_CR0 = I2C_MASTER_CTRL_1 + (master_bus - 1) * 0x0100; + REG_SR0 = I2C_MASTER_STATUS_1 + (master_bus - 1) * 0x0100; + REG_DR0 = I2C_MASTER_DATA_1 + (master_bus - 1) * 0x0100; + REG_ID0 = I2C_MASTER_PORT_ID_1 + (master_bus - 1) * 0x0100; + + if (master_bus < I2C_MASTER_CH_1 || master_bus > I2C_MASTER_CH_TOTAL) { + error = -EINVAL; + goto Done; + } + +#ifdef DEBUG_KERN + printk(KERN_INFO "portid %2d|@ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-10s|CMD %2.2X " + , portid, addr, flags, rw, rw == 1 ? "READ " : "WRITE" + , size, size == 0 ? "QUICK" : + size == 1 ? "BYTE" : + size == 2 ? "BYTE_DATA" : + size == 3 ? "WORD_DATA" : + size == 4 ? "PROC_CALL" : + size == 5 ? "BLOCK_DATA" : "ERROR" + , cmd); +#endif + /* Map the size to what the chip understands */ + switch (size) { + case I2C_SMBUS_QUICK: + case I2C_SMBUS_BYTE: + case I2C_SMBUS_BYTE_DATA: + case I2C_SMBUS_WORD_DATA: + case I2C_SMBUS_BLOCK_DATA: + break; + default: + printk(KERN_INFO "Unsupported transaction %d\n", size); + error = -EOPNOTSUPP; + goto Done; + } + + iowrite8(portid, pci_bar + REG_ID0); + + ////[S][ADDR/R] + //Clear status register + iowrite8(0, pci_bar + REG_SR0); + iowrite8(1 << I2C_CR_BIT_MIEN | 1 << I2C_CR_BIT_MTX | 1 << I2C_CR_BIT_MSTA , pci_bar + REG_CR0); + SET_REG_BIT_H(pci_bar + REG_CR0, I2C_CR_BIT_MEN); + + if (rw == I2C_SMBUS_READ && + (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)) { + // sent device address with Read mode + iowrite8(addr << 1 | 0x01, pci_bar + REG_DR0); + } else { + // sent device address with Write mode + iowrite8(addr << 1 | 0x00, pci_bar + REG_DR0); + } + + + + info( "MS Start"); + + //// Wait {A} + error = i2c_wait_ack(adapter, 12, 1); + if (error < 0) { + info( "get error %d", error); + goto Done; + } + + //// [CMD]{A} + if (size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA || + (size == I2C_SMBUS_BYTE && rw == I2C_SMBUS_WRITE)) { + + //sent command code to data register + iowrite8(cmd, pci_bar + REG_DR0); + info( "MS Send CMD 0x%2.2X", cmd); + + // Wait {A} + error = i2c_wait_ack(adapter, 12, 1); + if (error < 0) { + info( "get error %d", error); + goto Done; + } + } + + switch (size) { + case I2C_SMBUS_BYTE_DATA: + cnt = 1; break; + case I2C_SMBUS_WORD_DATA: + cnt = 2; break; + case I2C_SMBUS_BLOCK_DATA: + // in block data mode keep number of byte in block[0] + cnt = data->block[0]; + break; + default: + cnt = 0; break; + } + + // [CNT] used only bloack data write + if (size == I2C_SMBUS_BLOCK_DATA && rw == I2C_SMBUS_WRITE) { + + iowrite8(cnt, pci_bar + REG_DR0); + info( "MS Send CNT 0x%2.2X", cnt); + + // Wait {A} + error = i2c_wait_ack(adapter, 12, 1); + if (error < 0) { + info( "get error %d", error); + goto Done; + } + } + + // [DATA]{A} + if ( rw == I2C_SMBUS_WRITE && ( + size == I2C_SMBUS_BYTE || + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA + )) { + int bid = 0; + info( "MS prepare to sent [%d bytes]", cnt); + if (size == I2C_SMBUS_BLOCK_DATA ) { + bid = 1; // block[0] is cnt; + cnt += 1; // offset from block[0] + } + for (; bid < cnt; bid++) { + + iowrite8(data->block[bid], pci_bar + REG_DR0); + info( " Data > %2.2X", data->block[bid]); + // Wait {A} + error = i2c_wait_ack(adapter, 12, 1); + if (error < 0) { + goto Done; + } + } + } + + //REPEATE START + if ( rw == I2C_SMBUS_READ && ( + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA + )) { + info( "MS Repeated Start"); + + SET_REG_BIT_L(pci_bar + REG_CR0, I2C_CR_BIT_MEN); + iowrite8(1 << I2C_CR_BIT_MIEN | + 1 << I2C_CR_BIT_MTX | + 1 << I2C_CR_BIT_MSTA | + 1 << I2C_CR_BIT_RSTA , pci_bar + REG_CR0); + SET_REG_BIT_H(pci_bar + REG_CR0, I2C_CR_BIT_MEN); + + // sent Address with Read mode + iowrite8( addr << 1 | 0x1 , pci_bar + REG_DR0); + + // Wait {A} + error = i2c_wait_ack(adapter, 12, 1); + if (error < 0) { + goto Done; + } + + } + + if ( rw == I2C_SMBUS_READ && ( + size == I2C_SMBUS_BYTE || + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA + )) { + + switch (size) { + case I2C_SMBUS_BYTE: + case I2C_SMBUS_BYTE_DATA: + cnt = 1; break; + case I2C_SMBUS_WORD_DATA: + cnt = 2; break; + case I2C_SMBUS_BLOCK_DATA: + //will be changed after recived first data + cnt = 3; break; + default: + cnt = 0; break; + } + + info( "MS Receive"); + + //set to Receive mode + iowrite8(1 << I2C_CR_BIT_MEN | + 1 << I2C_CR_BIT_MIEN | + 1 << I2C_CR_BIT_MSTA , pci_bar + REG_CR0); + + for (bid = -1; bid < cnt; bid++) { + + // Wait {A} + error = i2c_wait_ack(adapter, 12, 0); + if (error < 0) { + goto Done; + } + + if (bid == cnt - 2) { + info( "SET NAK"); + SET_REG_BIT_H(pci_bar + REG_CR0, I2C_CR_BIT_TXAK); + } + + if (bid < 0) { + ioread8(pci_bar + REG_DR0); + info( "READ Dummy Byte" ); + } else { + + if (bid == cnt - 1) { + info ( "SET STOP in read loop"); + SET_REG_BIT_L(pci_bar + REG_CR0, I2C_CR_BIT_MSTA); + } + data->block[bid] = ioread8(pci_bar + REG_DR0); + + info( "DATA IN [%d] %2.2X", bid, data->block[bid]); + + if (size == I2C_SMBUS_BLOCK_DATA && bid == 0) { + cnt = data->block[0] + 1; + } + } + } + } + + //[P] + SET_REG_BIT_L(pci_bar + REG_CR0, I2C_CR_BIT_MSTA); + i2c_wait_ack(adapter, 12, 0); + info( "MS STOP"); + +Done: + iowrite8(1 << I2C_CR_BIT_MEN, pci_bar + REG_CR0); + check(pci_bar + REG_CR0); + check(pci_bar + REG_SR0); +#ifdef DEBUG_KERN + printk(KERN_INFO "END --- Error code %d", error); +#endif + + return error; +} + +/** + * Wrapper of smbus_access access with PCA9548 I2C switch management. + * This function set PCA9548 switches to the proper slave channel. + * Only one channel among switches chip is selected during communication time. + * + * Note: If the bus does not have any PCA9548 on it, the switch_addr must be + * set to 0xFF, it will use normal smbus_access function. + */ +static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr, + unsigned short flags, char rw, u8 cmd, + int size, union i2c_smbus_data *data) +{ + int error = 0; + struct i2c_dev_data *dev_data; + unsigned char master_bus; + unsigned char switch_addr; + unsigned char channel; + uint16_t prev_port = 0; + unsigned char prev_switch; + unsigned char prev_ch; + int retry; + + dev_data = i2c_get_adapdata(adapter); + master_bus = dev_data->pca9548.master_bus; + switch_addr = dev_data->pca9548.switch_addr; + channel = dev_data->pca9548.channel; + + // Acquire the master resource. + mutex_lock(&fpga_i2c_master_locks[master_bus - 1]); + prev_port = fpga_i2c_lasted_access_port[master_bus - 1]; + prev_switch = (unsigned char)(prev_port >> 8) & 0xFF; + prev_ch = (unsigned char)(prev_port & 0xFF); + + if (switch_addr != 0xFF) { + + // Check lasted access switch address on a master + if ( prev_switch != switch_addr && prev_switch != 0 ) { + // reset prev_port PCA9548 chip + retry = 3; + while(retry--){ + error = smbus_access(adapter, (u16)(prev_switch), flags, I2C_SMBUS_WRITE, 0x00, I2C_SMBUS_BYTE, NULL); + if(error >= 0){ + break; + }else{ + dev_dbg(&adapter->dev,"Failed to deselect ch %d of 0x%x, CODE %d\n", prev_ch, prev_switch, error); + } + } + if(retry == 0) + goto release_unlock; + // set PCA9548 to current channel + retry = 3; + while(retry--){ + error = smbus_access(adapter, switch_addr, flags, I2C_SMBUS_WRITE, 1 << channel, I2C_SMBUS_BYTE, NULL); + if(error >= 0){ + break; + }else{ + dev_dbg(&adapter->dev,"Failed to select ch %d of 0x%x, CODE %d\n", channel, switch_addr, error); + } + } + if(retry == 0) + goto release_unlock; + // update lasted port + fpga_i2c_lasted_access_port[master_bus - 1] = switch_addr << 8 | channel; + + } else { + // check if channel is also changes + if ( prev_ch != channel || prev_switch == 0 ) { + // set new PCA9548 at switch_addr to current + retry = 3; + while(retry--){ + error = smbus_access(adapter, switch_addr, flags, I2C_SMBUS_WRITE, 1 << channel, I2C_SMBUS_BYTE, NULL); + if(error >= 0){ + break; + }else{ + dev_dbg(&adapter->dev,"Failed to select ch %d of 0x%x, CODE %d\n", channel, switch_addr, error); + } + } + if(retry == 0) + goto release_unlock; + // update lasted port + fpga_i2c_lasted_access_port[master_bus - 1] = switch_addr << 8 | channel; + } + } + } + + // Do SMBus communication + error = smbus_access(adapter, addr, flags, rw, cmd, size, data); + if(error < 0){ + dev_dbg( &adapter->dev,"smbus_xfer failed (%d) @ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-10s|CMD %2.2X " + , error, addr, flags, rw, rw == 1 ? "READ " : "WRITE" + , size, size == 0 ? "QUICK" : + size == 1 ? "BYTE" : + size == 2 ? "BYTE_DATA" : + size == 3 ? "WORD_DATA" : + size == 4 ? "PROC_CALL" : + size == 5 ? "BLOCK_DATA" : + size == 8 ? "I2C_BLOCK_DATA" : "ERROR" + , cmd); + } + +release_unlock: + mutex_unlock(&fpga_i2c_master_locks[master_bus - 1]); + dev_dbg(&adapter->dev,"switch ch %d of 0x%x -> ch %d of 0x%x\n", prev_ch, prev_switch, channel, switch_addr); + return error; +} + + + +/** + * A callback function show available smbus functions. + */ +static u32 fpga_i2c_func(struct i2c_adapter *a) +{ + return I2C_FUNC_SMBUS_QUICK | + I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_BLOCK_DATA; +} + +static const struct i2c_algorithm silverstone_i2c_algorithm = { + .smbus_xfer = fpga_i2c_access, + .functionality = fpga_i2c_func, +}; + +/** + * Create virtual I2C bus adapter for switch devices + * @param pdev platform device pointer + * @param portid virtual i2c port id for switch device mapping + * @param bus_number_offset bus offset for virtual i2c adapter in system + * @return i2c adapter. + * + * When bus_number_offset is -1, created adapter with dynamic bus number. + * Otherwise create adapter at i2c bus = bus_number_offset + portid. + */ +static struct i2c_adapter * silverstone_i2c_init(struct platform_device *pdev, int portid, int bus_number_offset) +{ + int error; + + struct i2c_adapter *new_adapter; + struct i2c_dev_data *new_data; + void __iomem *i2c_freq_base_reg; + + new_adapter = kzalloc(sizeof(*new_adapter), GFP_KERNEL); + if (!new_adapter) { + printk(KERN_ALERT "Cannot alloc i2c adapter for %s", fpga_i2c_bus_dev[portid].calling_name); + return NULL; + } + + new_adapter->owner = THIS_MODULE; + new_adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + new_adapter->algo = &silverstone_i2c_algorithm; + /* If the bus offset is -1, use dynamic bus number */ + if (bus_number_offset == -1) { + new_adapter->nr = -1; + } else { + new_adapter->nr = bus_number_offset + portid; + } + + new_data = kzalloc(sizeof(*new_data), GFP_KERNEL); + if (!new_data) { + printk(KERN_ALERT "Cannot alloc i2c data for %s", fpga_i2c_bus_dev[portid].calling_name); + kzfree(new_adapter); + return NULL; + } + + new_data->portid = portid; + new_data->pca9548.master_bus = fpga_i2c_bus_dev[portid].master_bus; + new_data->pca9548.switch_addr = fpga_i2c_bus_dev[portid].switch_addr; + new_data->pca9548.channel = fpga_i2c_bus_dev[portid].channel; + strcpy(new_data->pca9548.calling_name, fpga_i2c_bus_dev[portid].calling_name); + + snprintf(new_adapter->name, sizeof(new_adapter->name), + "SMBus I2C Adapter PortID: %s", new_data->pca9548.calling_name); + + i2c_freq_base_reg = fpga_dev.data_base_addr + I2C_MASTER_FREQ_1; + iowrite8(0x07, i2c_freq_base_reg + (new_data->pca9548.master_bus - 1) * 0x100); // 0x07 400kHz + i2c_set_adapdata(new_adapter, new_data); + error = i2c_add_numbered_adapter(new_adapter); + if (error < 0) { + printk(KERN_ALERT "Cannot add i2c adapter %s", new_data->pca9548.calling_name); + kzfree(new_adapter); + kzfree(new_data); + return NULL; + } + + return new_adapter; +}; + +static void silverstone_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device silverstone_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = 0, + .resource = NULL, + .dev = { + .release = silverstone_dev_release, + } +}; + +/** + * Board info for QSFP/SFP+ eeprom. + * Note: Using OOM optoe as I2C eeprom driver. + * https://www.opencompute.org/wiki/Networking/SpecsAndDesigns#Open_Optical_Monitoring + */ +static struct i2c_board_info sff8436_eeprom_info[] = { + { I2C_BOARD_INFO("optoe1", 0x50) }, //For QSFP w/ sff8436 + { I2C_BOARD_INFO("optoe2", 0x50) }, //For SFP+ w/ sff8472 +}; + +static int silverstone_drv_probe(struct platform_device *pdev) +{ + int ret = 0; + int portid_count; + uint8_t cpld1_version, cpld2_version; + uint16_t prev_i2c_switch = 0; + struct sff_device_data *sff_data; + + /* The device class need to be instantiated before this function called */ + BUG_ON(fpgafwclass == NULL); + + fpga_data = devm_kzalloc(&pdev->dev, sizeof(struct silverstone_fpga_data), + GFP_KERNEL); + + if (!fpga_data) + return -ENOMEM; + + // Set default read address to VERSION + fpga_data->fpga_read_addr = fpga_dev.data_base_addr + FPGA_VERSION; + fpga_data->cpld1_read_addr = 0x00; + fpga_data->cpld2_read_addr = 0x00; + + mutex_init(&fpga_data->fpga_lock); + for (ret = I2C_MASTER_CH_1 ; ret <= I2C_MASTER_CH_TOTAL; ret++) { + mutex_init(&fpga_i2c_master_locks[ret - 1]); + } + + fpga = kobject_create_and_add("FPGA", &pdev->dev.kobj); + if (!fpga) { + kzfree(fpga_data); + return -ENOMEM; + } + + ret = sysfs_create_group(fpga, &fpga_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create FPGA sysfs attributes\n"); + kobject_put(fpga); + kzfree(fpga_data); + return ret; + } + + cpld1 = kobject_create_and_add("CPLD1", &pdev->dev.kobj); + if (!cpld1) { + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kzfree(fpga_data); + return -ENOMEM; + } + ret = sysfs_create_group(cpld1, &cpld1_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create CPLD1 sysfs attributes\n"); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kzfree(fpga_data); + return ret; + } + + cpld2 = kobject_create_and_add("CPLD2", &pdev->dev.kobj); + if (!cpld2) { + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kzfree(fpga_data); + return -ENOMEM; + } + ret = sysfs_create_group(cpld2, &cpld2_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create CPLD2 sysfs attributes\n"); + kobject_put(cpld2); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kzfree(fpga_data); + return ret; + } + + sff_dev = device_create(fpgafwclass, NULL, MKDEV(0, 0), NULL, "sff_device"); + if (IS_ERR(sff_dev)) { + printk(KERN_ERR "Failed to create sff device\n"); + sysfs_remove_group(cpld2, &cpld2_attr_grp); + kobject_put(cpld2); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kzfree(fpga_data); + return PTR_ERR(sff_dev); + } + + ret = sysfs_create_group(&sff_dev->kobj, &sff_led_test_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create SFF attributes\n"); + device_destroy(fpgafwclass, MKDEV(0, 0)); + sysfs_remove_group(cpld2, &cpld2_attr_grp); + kobject_put(cpld2); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kzfree(fpga_data); + return ret; + } + + ret = sysfs_create_link(&pdev->dev.kobj, &sff_dev->kobj, "SFF"); + if (ret != 0) { + sysfs_remove_group(&sff_dev->kobj, &sff_led_test_grp); + device_destroy(fpgafwclass, MKDEV(0, 0)); + sysfs_remove_group(cpld2, &cpld2_attr_grp); + kobject_put(cpld2); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kzfree(fpga_data); + return ret; + } + + for (portid_count = 0 ; portid_count < VIRTUAL_I2C_PORT_LENGTH ; portid_count++) { + fpga_data->i2c_adapter[portid_count] = silverstone_i2c_init(pdev, portid_count, VIRTUAL_I2C_BUS_OFFSET); + } + + /* Init SFF devices */ + for (portid_count = 0; portid_count < SFF_PORT_TOTAL; portid_count++) { + struct i2c_adapter *i2c_adap = fpga_data->i2c_adapter[portid_count]; + if (i2c_adap) { + fpga_data->sff_devices[portid_count] = silverstone_sff_init(portid_count); + sff_data = dev_get_drvdata(fpga_data->sff_devices[portid_count]); + BUG_ON(sff_data == NULL); + if ( sff_data->port_type == QSFP ) { + fpga_data->sff_i2c_clients[portid_count] = i2c_new_device(i2c_adap, &sff8436_eeprom_info[0]); + } else { + fpga_data->sff_i2c_clients[portid_count] = i2c_new_device(i2c_adap, &sff8436_eeprom_info[1]); + } + sff_data = NULL; + sysfs_create_link(&fpga_data->sff_devices[portid_count]->kobj, + &fpga_data->sff_i2c_clients[portid_count]->dev.kobj, + "i2c"); + } + } + +#ifdef TEST_MODE + return 0; +#endif + fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, + I2C_SMBUS_READ, 0x00, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&cpld1_version); + fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, + I2C_SMBUS_READ, 0x00, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&cpld2_version); + + printk(KERN_INFO "Switch CPLD1 VERSION: %2.2x\n", cpld1_version); + printk(KERN_INFO "Switch CPLD2 VERSION: %2.2x\n", cpld2_version); + + + /* Init I2C buses that has PCA9548 switch device. */ + for (portid_count = 0; portid_count < VIRTUAL_I2C_PORT_LENGTH; portid_count++) { + + struct i2c_dev_data *dev_data; + unsigned char master_bus; + unsigned char switch_addr; + + dev_data = i2c_get_adapdata(fpga_data->i2c_adapter[portid_count]); + master_bus = dev_data->pca9548.master_bus; + switch_addr = dev_data->pca9548.switch_addr; + + if (switch_addr != 0xFF) { + + if (prev_i2c_switch != ( (master_bus << 8) | switch_addr) ) { + // Found the bus with PCA9548, trying to clear all switch in it. + smbus_access(fpga_data->i2c_adapter[portid_count], switch_addr, 0x00, I2C_SMBUS_WRITE, 0x00, I2C_SMBUS_BYTE, NULL); + prev_i2c_switch = ( master_bus << 8 ) | switch_addr; + } + } + } + return 0; +} + +static int silverstone_drv_remove(struct platform_device *pdev) +{ + int portid_count; + struct sff_device_data *rem_data; + + for (portid_count = 0; portid_count < SFF_PORT_TOTAL; portid_count++) { + sysfs_remove_link(&fpga_data->sff_devices[portid_count]->kobj, "i2c"); + i2c_unregister_device(fpga_data->sff_i2c_clients[portid_count]); + } + + for (portid_count = 0 ; portid_count < VIRTUAL_I2C_PORT_LENGTH ; portid_count++) { + if (fpga_data->i2c_adapter[portid_count] != NULL) { + info(KERN_INFO "<%x>", fpga_data->i2c_adapter[portid_count]); + i2c_del_adapter(fpga_data->i2c_adapter[portid_count]); + } + } + + for (portid_count = 0; portid_count < SFF_PORT_TOTAL; portid_count++) { + if (fpga_data->sff_devices[portid_count] != NULL) { + rem_data = dev_get_drvdata(fpga_data->sff_devices[portid_count]); + device_unregister(fpga_data->sff_devices[portid_count]); + put_device(fpga_data->sff_devices[portid_count]); + kfree(rem_data); + } + } + + sysfs_remove_group(fpga, &fpga_attr_grp); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + sysfs_remove_group(cpld2, &cpld2_attr_grp); + sysfs_remove_group(&sff_dev->kobj, &sff_led_test_grp); + kobject_put(fpga); + kobject_put(cpld1); + kobject_put(cpld2); + device_destroy(fpgafwclass, MKDEV(0, 0)); + devm_kfree(&pdev->dev, fpga_data); + return 0; +} + +#ifdef TEST_MODE +#define FPGA_PCI_BAR_NUM 2 +#else +#define FPGA_PCI_BAR_NUM 0 +#endif + +static struct platform_driver silverstone_drv = { + .probe = silverstone_drv_probe, + .remove = __exit_p(silverstone_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +static const struct pci_device_id fpga_id_table[] = { + { PCI_VDEVICE(XILINX, FPGA_PCIE_DEVICE_ID) }, + { PCI_VDEVICE(TEST, TEST_PCIE_DEVICE_ID) }, + {0, } +}; + +MODULE_DEVICE_TABLE(pci, fpga_id_table); + +static int fpga_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) +{ + int err; + struct device *dev = &pdev->dev; + uint32_t fpga_version; + + if ((err = pci_enable_device(pdev))) { + dev_err(dev, "pci_enable_device probe error %d for device %s\n", + err, pci_name(pdev)); + return err; + } + + if ((err = pci_request_regions(pdev, FPGA_PCI_NAME)) < 0) { + dev_err(dev, "pci_request_regions error %d\n", err); + goto pci_disable; + } + + /* bar0: data mmio region */ + fpga_dev.data_mmio_start = pci_resource_start(pdev, FPGA_PCI_BAR_NUM); + fpga_dev.data_mmio_len = pci_resource_len(pdev, FPGA_PCI_BAR_NUM); + fpga_dev.data_base_addr = pci_iomap(pdev, FPGA_PCI_BAR_NUM, 0); + if (!fpga_dev.data_base_addr) { + dev_err(dev, "cannot iomap region of size %lu\n", + (unsigned long)fpga_dev.data_mmio_len); + goto pci_release; + } + dev_info(dev, "data_mmio iomap base = 0x%lx \n", + (unsigned long)fpga_dev.data_base_addr); + dev_info(dev, "data_mmio_start = 0x%lx data_mmio_len = %lu\n", + (unsigned long)fpga_dev.data_mmio_start, + (unsigned long)fpga_dev.data_mmio_len); + + printk(KERN_INFO "FPGA PCIe driver probe OK.\n"); + printk(KERN_INFO "FPGA ioremap registers of size %lu\n", (unsigned long)fpga_dev.data_mmio_len); + printk(KERN_INFO "FPGA Virtual BAR %d at %8.8lx - %8.8lx\n", FPGA_PCI_BAR_NUM, + (unsigned long)fpga_dev.data_base_addr, + (unsigned long)(fpga_dev.data_base_addr + fpga_dev.data_mmio_len)); + printk(KERN_INFO ""); + fpga_version = ioread32(fpga_dev.data_base_addr); + printk(KERN_INFO "FPGA VERSION : %8.8x\n", fpga_version); + fpgafw_init(); + platform_device_register(&silverstone_dev); + platform_driver_register(&silverstone_drv); + return 0; + +pci_release: + pci_release_regions(pdev); +pci_disable: + pci_disable_device(pdev); + return -EBUSY; +} + +static void fpga_pci_remove(struct pci_dev *pdev) +{ + platform_driver_unregister(&silverstone_drv); + platform_device_unregister(&silverstone_dev); + fpgafw_exit(); + pci_iounmap(pdev, fpga_dev.data_base_addr); + pci_release_regions(pdev); + pci_disable_device(pdev); + printk(KERN_INFO "FPGA PCIe driver remove OK.\n"); +}; + +static struct pci_driver pci_dev_ops = { + .name = FPGA_PCI_NAME, + .probe = fpga_pci_probe, + .remove = fpga_pci_remove, + .id_table = fpga_id_table, +}; + +enum { + READREG, + WRITEREG +}; + +struct fpga_reg_data { + uint32_t addr; + uint32_t value; +}; + +static long fpgafw_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { + int ret = 0; + struct fpga_reg_data data; + mutex_lock(&fpga_data->fpga_lock); + +#ifdef TEST_MODE + static uint32_t status_reg; +#endif + // Switch function to read and write. + switch (cmd) { + case READREG: + if (copy_from_user(&data, (void __user*)arg, sizeof(data)) != 0) { + mutex_unlock(&fpga_data->fpga_lock); + return -EFAULT; + } + data.value = ioread32(fpga_dev.data_base_addr + data.addr); + if (copy_to_user((void __user*)arg , &data, sizeof(data)) != 0) { + mutex_unlock(&fpga_data->fpga_lock); + return -EFAULT; + } +#ifdef TEST_MODE + if (data.addr == 0x1210) { + switch (status_reg) { + case 0x0000 : status_reg = 0x8000; + break; + + case 0x8080 : status_reg = 0x80C0; + break; + case 0x80C0 : status_reg = 0x80F0; + break; + case 0x80F0 : status_reg = 0x80F8; + break; + + } + iowrite32(status_reg, fpga_dev.data_base_addr + 0x1210); + } +#endif + + + break; + case WRITEREG: + if (copy_from_user(&data, (void __user*)arg, sizeof(data)) != 0) { + mutex_unlock(&fpga_data->fpga_lock); + return -EFAULT; + } + iowrite32(data.value, fpga_dev.data_base_addr + data.addr); + +#ifdef TEST_MODE + if (data.addr == 0x1204) { + status_reg = 0x8080; + iowrite32(status_reg, fpga_dev.data_base_addr + 0x1210); + } +#endif + + break; + default: + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + mutex_unlock(&fpga_data->fpga_lock); + return ret; +} + + +const struct file_operations fpgafw_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = fpgafw_unlocked_ioctl, +}; + + +static int fpgafw_init(void) { + printk(KERN_INFO "Initializing the switchboard driver\n"); + // Try to dynamically allocate a major number for the device -- more difficult but worth it + majorNumber = register_chrdev(0, DEVICE_NAME, &fpgafw_fops); + if (majorNumber < 0) { + printk(KERN_ALERT "Failed to register a major number\n"); + return majorNumber; + } + printk(KERN_INFO "Device registered correctly with major number %d\n", majorNumber); + + // Register the device class + fpgafwclass = class_create(THIS_MODULE, CLASS_NAME); + if (IS_ERR(fpgafwclass)) { // Check for error and clean up if there is + unregister_chrdev(majorNumber, DEVICE_NAME); + printk(KERN_ALERT "Failed to register device class\n"); + return PTR_ERR(fpgafwclass); + } + printk(KERN_INFO "Device class registered correctly\n"); + + // Register the device driver + fpgafwdev = device_create(fpgafwclass, NULL, MKDEV(majorNumber, 0), NULL, DEVICE_NAME); + if (IS_ERR(fpgafwdev)) { // Clean up if there is an error + class_destroy(fpgafwclass); // Repeated code but the alternative is goto statements + unregister_chrdev(majorNumber, DEVICE_NAME); + printk(KERN_ALERT "Failed to create the FW upgrade device node\n"); + return PTR_ERR(fpgafwdev); + } + printk(KERN_INFO "FPGA fw upgrade device node created correctly\n"); + return 0; +} + +static void fpgafw_exit(void) { + device_destroy(fpgafwclass, MKDEV(majorNumber, 0)); // remove the device + class_unregister(fpgafwclass); // unregister the device class + class_destroy(fpgafwclass); // remove the device class + unregister_chrdev(majorNumber, DEVICE_NAME); // unregister the major number + printk(KERN_INFO "Goodbye!\n"); +} + +int silverstone_init(void) +{ + int rc; + rc = pci_register_driver(&pci_dev_ops); + if (rc) + return rc; + return 0; +} + +void silverstone_exit(void) +{ + pci_unregister_driver(&pci_dev_ops); +} + +module_init(silverstone_init); +module_exit(silverstone_exit); + +MODULE_AUTHOR("Celestica Inc."); +MODULE_DESCRIPTION("Celestica Silverstone platform driver"); +MODULE_VERSION(MOD_VERSION); +MODULE_LICENSE("GPL"); \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py new file mode 100755 index 00000000000..186ee6c5450 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py @@ -0,0 +1,173 @@ +#!/usr/bin/python +# +# Silverstone platform sensors. This script get the sensor data from BMC +# using ipmitool and display them in lm-sensor alike format. +# +# The following data is support: +# 1. Temperature sensors +# 2. PSUs +# 3. Fan trays + +import sys +import logging +import subprocess + +IPMI_SDR_CMD = "ipmitool sdr elist" +MAX_NUM_FANS = 7 +MAX_NUM_PSUS = 2 + + +def ipmi_sensor_dump(cmd): + ''' Execute ipmitool command return dump output + exit if any error occur. + ''' + sensor_dump = '' + try: + sensor_dump = subprocess.check_output(cmd, shell=True) + except subprocess.CalledProcessError as e: + logging.error('Error! Failed to execute: {}'.format(cmd)) + sys.exit(1) + return sensor_dump + +def get_reading_by_name(sensor_name, sdr_elist_dump): + ''' + Search for the match sensor name, return sensor + reading value and unit, return object epmtry string + if search not match. + + The output of sensor dump: + TEMP_FAN_U52 | 00h | ok | 7.1 | 31 degrees C + TEMP_FAN_U17 | 01h | ok | 7.1 | 27 degrees C + TEMP_SW_U52 | 02h | ok | 7.1 | 30 degrees C + Fan2_Status | 07h | ok | 29.2 | Present + Fan2_Front | 0Eh | ok | 29.2 | 12000 RPM + Fan2_Rear | 46h | ok | 29.2 | 14700 RPM + PSU2_Status | 39h | ok | 10.2 | Presence detected + PSU2_Fan | 3Dh | ok | 10.2 | 16000 RPM + PSU2_VIn | 3Ah | ok | 10.2 | 234.30 Volts + PSU2_CIn | 3Bh | ok | 10.2 | 0.80 Amps + ''' + found = '' + + for line in sdr_elist_dump.split("\n"): + if sensor_name in line: + found = line.strip() + break + + if not found: + logging.error('Cannot find sensor name:' + sensor_name) + + else: + try: + found = found.split('|')[4] + except IndexError: + logging.error('Cannot get sensor data of:' + sensor_name) + + logging.basicConfig(level=logging.DEBUG) + return found + + +def read_temperature_sensors(ipmi_sdr_elist): + + sensor_list = [ + ('TEMP_FAN_U52', 'Fan Tray Middle Temp'), + ('TEMP_FAN_U17', 'Fan Tray Right Temp'), + ('TEMP_SW_U52', 'Switchboard Left Inlet Temp'), + ('TEMP_SW_U16', 'Switchboard Right Inlet Temp'), + ('TEMP_BB_U3', 'Baseboard Temp'), + ('TEMP_CPU', 'CPU Internal Temp'), + ('TEMP_SW_Internal', 'ASIC Internal Temp'), + ('SW_U04_Temp', 'IR3595 Chip Left Temp'), + ('SW_U14_Temp', 'IR3595 Chip Right Temp'), + ('SW_U4403_Temp', 'IR3584 Chip Temp'), + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Temperature Sensors\n" + output += "Adapter: IPMI adapter\n" + for sensor in sensor_list: + reading = get_reading_by_name(sensor[0],ipmi_sdr_elist) + output += sensor_format.format('{}:'.format(sensor[1]), + reading, + width=str(max_name_width+1)) + output += '\n' + return output + + +def read_fan_sensors(num_fans, ipmi_sdr_elist): + + sensor_list = [ + ('Fan{}_Status', 'Status'), + ('Fan{}_Front', 'Fan {} front'), + ('Fan{}_Rear', 'Fan {} rear'), + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Fan Trays\n" + output += "Adapter: IPMI adapter\n" + for fan_num in range(1, num_fans+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(fan_num) + display_sensor_name = sensor[1].format(fan_num) + reading = get_reading_by_name(ipmi_sensor_name, ipmi_sdr_elist) + output += sensor_format.format('{}:'.format(display_sensor_name), + reading, + width=str(max_name_width+1)) + output += '\n' + return output + + +def read_psu_sensors(num_psus, ipmi_sdr_elist): + + sensor_list = [ + ('PSU{}_Status', 'PSU {} Status'), + ('PSU{}_Fan', 'PSU {} Fan'), + ('PSU{}_VIn', 'PSU {} Input Voltag'), + ('PSU{}_CIn', 'PSU {} Input Current'), + ('PSU{}_PIn', 'PSU {} Input Power'), + ('PSU{}_Temp1', 'PSU {} Temp1'), + ('PSU{}_Temp2', 'PSU {} Temp2'), + ('PSU{}_VOut', 'PSU {} Output Voltag'), + ('PSU{}_COut', 'PSU {} Output Current'), + ('PSU{}_POut', 'PSU {} Output Power'), + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "PSU\n" + output += "Adapter: IPMI adapter\n" + for psu_num in range(1, num_psus+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(psu_num) + display_sensor_name = sensor[1].format(psu_num) + reading = get_reading_by_name(ipmi_sensor_name, ipmi_sdr_elist) + output += sensor_format.format('{}:'.format(display_sensor_name), + reading, + width=str(max_name_width+1)) + output += '\n' + return output + + +def main(): + output_string = '' + + ipmi_sdr_elist = ipmi_sensor_dump(IPMI_SDR_CMD) + output_string += read_temperature_sensors(ipmi_sdr_elist) + output_string += read_psu_sensors(MAX_NUM_PSUS, ipmi_sdr_elist) + output_string += read_fan_sensors(MAX_NUM_FANS, ipmi_sdr_elist) + print(output_string) + + +if __name__ == '__main__': + main() diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors new file mode 100755 index 00000000000..405d92c2b3c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors @@ -0,0 +1,11 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@" +docker exec -$DOCKER_EXEC_FLAGS pmon platform_sensors.py "$@" diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py new file mode 100644 index 00000000000..20a2b6d1063 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py @@ -0,0 +1,34 @@ +from setuptools import setup + +DEVICE_NAME = 'celestica' +HW_SKU = 'x86_64-cel_silverstone-r0' + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Wirut Getbamrung', + maintainer_email='wgetbumr@celestica.com', + packages=[ + 'sonic_platform', + ], + package_dir={ + 'sonic_platform': '../../../../device/{}/{}/sonic_platform'.format(DEVICE_NAME, HW_SKU)}, + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 2.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/systemd/platform-modules-silverstone.service b/platform/broadcom/sonic-platform-modules-cel/silverstone/systemd/platform-modules-silverstone.service new file mode 100644 index 00000000000..907764153a2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/systemd/platform-modules-silverstone.service @@ -0,0 +1,13 @@ +[Unit] +Description=Celestica Silverstone platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-silverstone start +ExecStop=-/etc/init.d/platform-modules-silverstone stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/tools/afulnx_64 b/platform/broadcom/sonic-platform-modules-cel/tools/afulnx_64 new file mode 100755 index 00000000000..c32823393c0 Binary files /dev/null and b/platform/broadcom/sonic-platform-modules-cel/tools/afulnx_64 differ diff --git a/platform/broadcom/sonic-platform-modules-dell/.gitignore b/platform/broadcom/sonic-platform-modules-dell/.gitignore new file mode 100644 index 00000000000..7f287d53822 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/.gitignore @@ -0,0 +1,50 @@ +# Object files +*.o +*.ko +*.obj +*.elf + +# Precompiled Headers +*.gch +*.pch + +# Libraries +*.lib +*.a +*.la +*.lo + +# Shared objects (inc. Windows DLLs) +*.dll +*.so +*.so.* +*.dylib + +# Executables +*.exe +*.out +*.app +*.i*86 +*.x86_64 +*.hex + +# Debug files +*.dSYM/ +*.su + +# Kernel Module Compile Results +*.mod* +*.cmd +*.o.d +.tmp_versions/ +modules.order +Module.symvers +Mkfile.old +dkms.conf + +# Debian packaging +*.debhelper.log +*.postinst.debhelper +*.postrm.debhelper +*.prerm.debhelper +*.substvars diff --git a/platform/broadcom/sonic-platform-modules-dell/LICENSE b/platform/broadcom/sonic-platform-modules-dell/LICENSE new file mode 100644 index 00000000000..243a846ea80 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/LICENSE @@ -0,0 +1,16 @@ +Copyright (C) 2016 Microsoft, Inc +Copyright (C) 2017 Dell, Inc + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/broadcom/sonic-platform-modules-dell/README.md b/platform/broadcom/sonic-platform-modules-dell/README.md new file mode 100644 index 00000000000..a9f5358192a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/README.md @@ -0,0 +1 @@ +platform drivers for Dell Z9100 for the SONiC project diff --git a/platform/broadcom/sonic-platform-modules-dell/common/dell_i2c_utils.sh b/platform/broadcom/sonic-platform-modules-dell/common/dell_i2c_utils.sh new file mode 100755 index 00000000000..7ebf1e54449 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/common/dell_i2c_utils.sh @@ -0,0 +1,127 @@ +# Perform an i2c device configuration : instantiate / delete. +# Input is of the form: +# "echo [driver] > " +# where operation = "new_device" or "delete_device" + +i2c_config() { + local count=0 + local MAX_BUS_RETRY=20 + local MAX_I2C_OP_RETRY=10 + + i2c_bus_op=`echo "$@" | cut -d'>' -f 2` + i2c_bus=$(dirname $i2c_bus_op) + + # check if bus exists + while [[ "$count" -lt "$MAX_BUS_RETRY" ]]; do + [[ -e $i2c_bus ]] && break || sleep .1 + count=$((count+1)) + done + + if [[ "$count" -eq "$MAX_BUS_RETRY" ]]; then + echo "dell_i2c_utils : ERROR: $@ : i2c bus not created" + return + fi + + # perform the add/delete + count=0 + while [[ "$count" -lt "$MAX_I2C_OP_RETRY" ]]; do + eval "$@" > /dev/null 2>&1 + [[ $? == 0 ]] && break || sleep .2 + count=$((count+1)) + done + + if [[ "$count" -eq "$MAX_I2C_OP_RETRY" ]]; then + echo "dell_i2c_utils : ERROR: $@ : i2c operation failed" + return + fi +} + +# Check if a i2c bus exists. Poll for upto 2 seconds since mux creation may take time.. +# Input: bus to check for existence + +i2c_poll_bus_exists() { + local count=0 + local MAX_BUS_RETRY=20 + local i2c_bus + + i2c_bus=$1 + + # check if bus exists + while [[ "$count" -lt "$MAX_BUS_RETRY" ]]; do + [[ -e $i2c_bus ]] && break || sleep .1 + count=$((count+1)) + done + + if [[ "$count" -eq "$MAX_BUS_RETRY" ]]; then + echo "dell_i2c_utils : ERROR: $@ : i2c bus not created" + return 1 + else + return 0 + fi +} + +# Perform an i2c mux device create +# Input is of the form: +# i2c_mux_create mux_driver i2c_addr i2c_bus_num i2c_child_bus_num_start +# where i2c_bus_num is the bus number in which the mux is to be created and +# i2c_child_bus_num_start is the first of the 8 bus channels that this mux should create +i2c_mux_create() { + local MAX_MUX_CHANNEL_RETRY=3 + local MAX_MUX_CHANNELS=8 + local count=0 + local i + local mux_driver=$1 + local i2c_addr=$2 + local i2c_bus_num=$3 + local i2c_child_bus_num_start=$4 + + # Construct the i2c bus, the first and last bus channels that will be created under the MUX + i2c_bus=/sys/bus/i2c/devices/i2c-$i2c_bus_num + i2c_mux_channel_first=$i2c_bus/i2c-$i2c_child_bus_num_start + i2c_mux_channel_last=$i2c_bus/i2c-$(expr $i2c_child_bus_num_start + $MAX_MUX_CHANNELS - 1) + + if i2c_poll_bus_exists $i2c_bus; then + while [[ "$count" -lt "$MAX_MUX_CHANNEL_RETRY" ]]; do + eval "echo $mux_driver $i2c_addr > /sys/bus/i2c/devices/i2c-$i2c_bus_num/new_device" > /dev/null 2>&1 + ret=$? + + # Give more time for the mux channels to get created based on retries + i=0 + while [[ "$i" -lt "$count" ]]; do + sleep 1 + i=$((i+1)) + done + + # Check if the (first and last) mux channels got created + if [[ $ret -eq "0" && -e $i2c_mux_channel_first && -e $i2c_mux_channel_last ]]; then + break; + else + # If the channel did not get created, remove the mux, reset the mux tree and retry + echo "dell_i2c_utils : ERROR: i2c mux channel not created for $mux_driver,$i2c_addr,$i2c_bus_num" + i2c_mux_delete $i2c_addr $i2c_bus_num + reset_muxes + fi + + count=$((count+1)) + done + fi + + if [[ "$count" -eq "$MAX_MUX_CHANNEL_RETRY" ]]; then + echo "dell_i2c_utils : ERROR: $1,$2 : i2c mux channel not created" + return + fi + + return +} + +# Perform an i2c mux device delete +# Input is of the form: +# i2c_mux_delete i2c_addr i2c_bus_num +i2c_mux_delete() { + local i2c_addr + local i2c_bus_num + + i2c_addr=$1 + i2c_bus_num=$2 + i2c_config "echo $i2c_addr > /sys/bus/i2c/devices/i2c-$i2c_bus_num/delete_device" +} diff --git a/platform/broadcom/sonic-platform-modules-dell/common/dell_ich.c b/platform/broadcom/sonic-platform-modules-dell/common/dell_ich.c new file mode 100644 index 00000000000..cce36e9056f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/common/dell_ich.c @@ -0,0 +1,1043 @@ +/* Copyright (c) 2018 Dell Inc. + * dell_ich.c - ICH driver for Dell Avoton/Rangeley switches + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "dell_ich" + +#define AVOTON_PCU_DEVICE_ID 0x1f38 + +// GPIO registers +// GPIO Core Control/Access Registers in I/O Space +#define GPIO_SC_USE_SEL 0x0 +#define GPIO_SC_IO_SEL 0x4 +#define GPIO_SC_GP_LVL 0x8 +#define GPIO_SC_TPE 0xC +#define GPIO_SC_TNE 0x10 +#define GPIO_SC_TS 0x14 + +// GPIO SUS Control/Access Registers in I/O Space +#define GPIO_SUS_USE_SEL 0x80 +#define GPIO_SUS_IO_SEL 0x84 +#define GPIO_SUS_GP_LVL 0x88 +#define GPIO_SUS_TPE 0x8C +#define GPIO_SUS_TNE 0x90 +#define GPIO_SUS_TS 0x94 +#define GPIO_SUS_WAKE_EN 0x98 + +static const unsigned char avoton_gpio_regs[] = { + GPIO_SC_USE_SEL, + GPIO_SC_IO_SEL, + GPIO_SC_GP_LVL, + GPIO_SC_TPE, + GPIO_SC_TNE, + GPIO_SC_TS, + GPIO_SUS_USE_SEL, + GPIO_SUS_IO_SEL, + GPIO_SUS_GP_LVL, + GPIO_SUS_TPE, + GPIO_SUS_TNE, + GPIO_SUS_TS, + GPIO_SUS_WAKE_EN +}; + +#define GPIO_REG_LEN 0x4 + +#define GPIOS0_EN (1 << 0) +#define GPIOS1_EN (1 << 1) +#define GPIOS2_EN (1 << 2) +#define GPIOS3_EN (1 << 3) +#define GPIOS4_EN (1 << 4) +#define GPIOS5_EN (1 << 5) +#define GPIOS6_EN (1 << 6) +#define GPIOS7_EN (1 << 7) + +#define GPIOSUS0_EN (1 << 0) +#define GPIOSUS1_EN (1 << 1) +#define GPIOSUS2_EN (1 << 2) +#define GPIOSUS3_EN (1 << 3) +// GPIOSUS4_EN : unused +// GPIOSUS5_EN : unused +#define GPIOSUS6_EN (1 << 6) +#define GPIOSUS7_EN (1 << 7) + + +// GPE0a_EN - General Purpose Event 0 Enables +#define GPIO_GPE0a_EN_SUS0 (1 << 16) +#define GPIO_GPE0a_EN_SUS1 (1 << 17) +#define GPIO_GPE0a_EN_SUS2 (1 << 18) +#define GPIO_GPE0a_EN_SUS3 (1 << 19) +// GPIO_GPE0a_EN_SUS4 : unused +// GPIO_GPE0a_EN_SUS5 : unused +#define GPIO_GPE0a_EN_SUS6 (1 << 22) +#define GPIO_GPE0a_EN_SUS7 (1 << 23) + +#define GPIO_GPE0a_EN_CORE0 (1 << 24) +#define GPIO_GPE0a_EN_CORE1 (1 << 25) +#define GPIO_GPE0a_EN_CORE2 (1 << 26) +#define GPIO_GPE0a_EN_CORE3 (1 << 27) +#define GPIO_GPE0a_EN_CORE4 (1 << 28) +#define GPIO_GPE0a_EN_CORE5 (1 << 29) +#define GPIO_GPE0a_EN_CORE6 (1 << 30) +#define GPIO_GPE0a_EN_CORE7 (1 << 31) + +// GPE0a_STS - General Purpose Event 0 Status +// We're interested in only SUS6 for now +#define GPIO_GPE0a_STS_SUS6 (1 << 22) + +// GPIO_ROUT - GPIO_ROUT Register +#define GPIO_ROUT_OFFSET_SUS0 0 +#define GPIO_ROUT_OFFSET_SUS1 2 +#define GPIO_ROUT_OFFSET_SUS2 4 +#define GPIO_ROUT_OFFSET_SUS3 6 +// GPIO_ROUT_OFFSET_SUS4 : unused +// GPIO_ROUT_OFFSET_SUS5 : unused +#define GPIO_ROUT_OFFSET_SUS6 12 +#define GPIO_ROUT_OFFSET_SUS7 14 + +#define GPIO_ROUT_OFFSET_CORE0 16 +#define GPIO_ROUT_OFFSET_CORE1 18 +#define GPIO_ROUT_OFFSET_CORE2 20 +#define GPIO_ROUT_OFFSET_CORE3 22 +#define GPIO_ROUT_OFFSET_CORE4 24 +#define GPIO_ROUT_OFFSET_CORE5 26 +#define GPIO_ROUT_OFFSET_CORE6 28 +#define GPIO_ROUT_OFFSET_CORE7 30 + +enum GPIO_ROUT { + GPIO_NO_EFFECT = 0, + GPIO_SMI, + GPIO_SCI, + GPIO_RESERVED +}; + +/* + * GPIO resources + * defined as in drivers/gpio/gpio-ich.c + */ +#define ICH_RES_GPIO 0 +#define ICH_RES_GPE0 1 +static struct resource gpio_ich_res[] = { + /* GPIO */ + { + .flags = IORESOURCE_IO, + }, + /* ACPI - GPE0 */ + { + .flags = IORESOURCE_IO, + }, +}; + +// ACPI registers +#define ACPI_GPE0a_STS 0x20 +#define ACPI_GPE0a_EN 0x28 + +// PMC registers +#define PMC_GPIO_ROUT 0x58 +#define PMC_REG_LEN 0x4 + +// lpc_ich_priv is derived from drivers/mfd/lpc_ich.c +struct lpc_ich_priv { + int chipset; + + int abase; /* ACPI base */ + int actrl_pbase; /* ACPI control or PMC base */ + int gbase; /* GPIO base */ + int gctrl; /* GPIO control */ + + int abase_save; /* Cached ACPI base value */ + int actrl_pbase_save; /* Cached ACPI control or PMC base value */ + int gctrl_save; /* Cached GPIO control value */ +}; + +#define ICH_RES_MEM_GCS_PMC 0 + +#define IO_REG_WRITE(val, reg, base_res) outl(val, (reg) + (base_res)->start) +#define IO_REG_READ(reg, base_res) inl((reg) + (base_res)->start) + +struct resource pmc_res = {.flags = IORESOURCE_MEM,}; + +static struct kobject *dell_kobj; +static unsigned short force_id; +module_param(force_id, ushort, 0); + +#define SMF_REG_ADDR 0x200 +#define SIO_REG_DEVID 0x1 +#define SIO_Z9100_ID 0x1 +#define SIO_S6100_ID 0x2 +#define SIO_S4200_ID 0x3 +#define SIO_S5148_ID 0x4 + +enum kinds { + z9100smf, s6100smf +}; + +struct dell_ich_data { + enum kinds kind; + struct resource *gpio_base, *acpi_base, *pmc_base; + int gpio_alloc,pmc_alloc; + unsigned int int_gpio_sus6_count; +}; + +// GPIO sysfs attributes + +static ssize_t get_sc_use_sel(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_USE_SEL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_use_sel(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_USE_SEL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_io_sel(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_IO_SEL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_io_sel(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_IO_SEL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_gp_lvl(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_GP_LVL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_gp_lvl(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_GP_LVL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_gp_tpe(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_TPE,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_gp_tpe(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_TPE,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_gp_tne(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_TNE,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_gp_tne(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_TNE,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sc_gp_ts(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SC_TS,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sc_gp_ts(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SC_TS,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_use_sel(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_USE_SEL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_use_sel(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_USE_SEL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_io_sel(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_IO_SEL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_io_sel(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_IO_SEL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_gp_lvl(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_GP_LVL,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_gp_lvl(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_GP_LVL,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_gp_tpe(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_TPE,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_gp_tpe(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_TPE,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_gp_tne(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_TNE,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_gp_tne(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_TNE,ich_data->gpio_base); + + return count; +} + +static ssize_t get_sus_gp_ts(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(GPIO_SUS_TS,ich_data->gpio_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sus_gp_ts(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,GPIO_SUS_TS,ich_data->gpio_base); + + return count; +} + +static DEVICE_ATTR(sc_use_sel, S_IRUGO | S_IWUSR, get_sc_use_sel, set_sc_use_sel); +static DEVICE_ATTR(sc_io_sel, S_IRUGO | S_IWUSR, get_sc_io_sel, set_sc_io_sel); +static DEVICE_ATTR(sc_gp_lvl, S_IRUGO | S_IWUSR, get_sc_gp_lvl, set_sc_gp_lvl); +static DEVICE_ATTR(sc_gp_tpe, S_IRUGO | S_IWUSR, get_sc_gp_tpe, set_sc_gp_tpe); +static DEVICE_ATTR(sc_gp_tne, S_IRUGO | S_IWUSR, get_sc_gp_tne, set_sc_gp_tne); +static DEVICE_ATTR(sc_gp_ts, S_IRUGO | S_IWUSR, get_sc_gp_ts, set_sc_gp_ts); +static DEVICE_ATTR(sus_use_sel, S_IRUGO | S_IWUSR, get_sus_use_sel,set_sus_use_sel); +static DEVICE_ATTR(sus_io_sel, S_IRUGO | S_IWUSR, get_sus_io_sel, set_sus_io_sel); +static DEVICE_ATTR(sus_gp_lvl, S_IRUGO | S_IWUSR, get_sus_gp_lvl, set_sus_gp_lvl); +static DEVICE_ATTR(sus_gp_tpe, S_IRUGO | S_IWUSR, get_sus_gp_tpe, set_sus_gp_tpe); +static DEVICE_ATTR(sus_gp_tne, S_IRUGO | S_IWUSR, get_sus_gp_tne, set_sus_gp_tne); +static DEVICE_ATTR(sus_gp_ts, S_IRUGO | S_IWUSR, get_sus_gp_ts, set_sus_gp_ts); + +static struct attribute *gpio_attrs[] = { + &dev_attr_sc_use_sel.attr, + &dev_attr_sc_io_sel.attr, + &dev_attr_sc_gp_lvl.attr, + &dev_attr_sc_gp_tpe.attr, + &dev_attr_sc_gp_tne.attr, + &dev_attr_sc_gp_ts.attr, + &dev_attr_sus_use_sel.attr, + &dev_attr_sus_io_sel.attr, + &dev_attr_sus_gp_lvl.attr, + &dev_attr_sus_gp_tpe.attr, + &dev_attr_sus_gp_tne.attr, + &dev_attr_sus_gp_ts.attr, + NULL, +}; + +static struct attribute_group gpio_attrs_group= { + .attrs = gpio_attrs, +}; + +// ACPI sysfs attributes + +static ssize_t get_gpe0a_sts(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(ACPI_GPE0a_STS,ich_data->acpi_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_gpe0a_sts(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,ACPI_GPE0a_STS,ich_data->acpi_base); + + return count; +} + +static ssize_t get_gpe0a_en(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = IO_REG_READ(ACPI_GPE0a_EN,ich_data->acpi_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_gpe0a_en(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + IO_REG_WRITE(devdata,ACPI_GPE0a_EN,ich_data->acpi_base); + + return count; +} + +static DEVICE_ATTR(gpe0a_sts, S_IRUGO | S_IWUSR, get_gpe0a_sts, set_gpe0a_sts); +static DEVICE_ATTR(gpe0a_en, S_IRUGO | S_IWUSR, get_gpe0a_en, set_gpe0a_en); + +static struct attribute *acpi_attrs[] = { + &dev_attr_gpe0a_sts.attr, + &dev_attr_gpe0a_en.attr, + NULL, +}; + +static struct attribute_group acpi_attrs_group= { + .attrs = acpi_attrs, +}; + +static ssize_t get_gpio_rout(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = readl(ich_data->pmc_base); + return sprintf(buf,"0x%08x\n",devdata); +} + +// PMC sysfs attributes + +static ssize_t set_gpio_rout(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + writel(devdata,ich_data->pmc_base); + + return count; +} + +static DEVICE_ATTR(gpio_rout, S_IRUGO | S_IWUSR, get_gpio_rout, set_gpio_rout); + +static struct attribute *pmc_attrs[] = { + &dev_attr_gpio_rout.attr, + NULL, +}; + +static struct attribute_group pmc_attrs_group= { + .attrs = pmc_attrs, +}; + +// SCI interrupt sysfs attributes + +static ssize_t get_sci_int_gpio_sus6(struct device *dev, struct device_attribute *devattr, char *buf) +{ + u32 devdata=0; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!ich_data) return sprintf(buf, "read error"); + + devdata = ich_data->int_gpio_sus6_count; + return sprintf(buf,"0x%08x\n",devdata); +} + +static ssize_t set_sci_int_gpio_sus6(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + ich_data->int_gpio_sus6_count = devdata; + + return count; +} + +static DEVICE_ATTR(sci_int_gpio_sus6, S_IRUGO | S_IWUSR, get_sci_int_gpio_sus6, set_sci_int_gpio_sus6); + +static struct attribute *sci_attrs[] = { + &dev_attr_sci_int_gpio_sus6.attr, + NULL, +}; + +static struct attribute_group sci_attrs_group= { + .attrs = sci_attrs, +}; + +static u32 dell_ich_sci_handler(void *context) +{ + unsigned int data; + struct device *dev = (struct device *)context; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + if(!dev) return ACPI_INTERRUPT_NOT_HANDLED; + + ich_data = dev_get_platdata(dev); + if(!ich_data) return ACPI_INTERRUPT_NOT_HANDLED; + + data=IO_REG_READ(ACPI_GPE0a_STS,ich_data->acpi_base); + if(data & GPIO_GPE0a_STS_SUS6) { + // Clear the SUS6 status + IO_REG_WRITE(data,ACPI_GPE0a_STS,ich_data->acpi_base); + ich_data->int_gpio_sus6_count++; + // and notify the user space clients + sysfs_notify(&dev->kobj, NULL, "sci_int_gpio_sus6"); + return ACPI_INTERRUPT_HANDLED; + } + + return ACPI_INTERRUPT_NOT_HANDLED; +} + +/* + * Setup GPIO SUS6 to generate an SCI interrupt for optics detection + * This can be alternatively be setup using sysfs + */ +int setup_gpio_sus6_sci_interrupt(struct device *dev) +{ + int ret=0; + unsigned int data; + struct resource *acpi_base, *pmc_base, *gpio_base; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + + gpio_base = ich_data->gpio_base; + acpi_base = ich_data->acpi_base; + pmc_base = ich_data->pmc_base; + + // Enable GPIOSUS6_EN + data = IO_REG_READ(GPIO_SUS_USE_SEL,gpio_base); + data |= GPIOSUS6_EN; + IO_REG_WRITE(data,GPIO_SUS_USE_SEL,gpio_base); + + // GPIOSUS6_EN is input + data = IO_REG_READ(GPIO_SUS_IO_SEL,gpio_base); + data |= GPIOSUS6_EN; + IO_REG_WRITE(data,GPIO_SUS_IO_SEL,gpio_base); + + // Trigger on positive edge for GPIOSUS6_EN + data = IO_REG_READ(GPIO_SUS_TPE,gpio_base); + data |= GPIOSUS6_EN; + IO_REG_WRITE(data,GPIO_SUS_TPE,gpio_base); + + // Enable GPE for SUS6 to generate an SCI + data=IO_REG_READ(ACPI_GPE0a_EN,acpi_base); + data|=GPIO_GPE0a_EN_SUS6; + IO_REG_WRITE(data,ACPI_GPE0a_EN,acpi_base); + + data=readl(pmc_base); + data=(data & ~(0x3 << GPIO_ROUT_OFFSET_SUS6)) | (GPIO_SCI << GPIO_ROUT_OFFSET_SUS6); + writel(data,pmc_base); + + ret = acpi_install_sci_handler(dell_ich_sci_handler,(void*)dev); + if(ret) { + pr_info("dell_ich acpi_install_sci_handler failed %d\n",ret); + return ret; + } + + return ret; +} + +static int dell_ich_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + struct pci_dev *lpc_ich_dev; + struct lpc_ich_priv *priv; + struct resource *res; + unsigned int base_addr_cfg, base_addr; + int ret,i; + + // Get the PCU device + lpc_ich_dev=pci_get_device(PCI_VENDOR_ID_INTEL,AVOTON_PCU_DEVICE_ID,NULL); + priv=(struct lpc_ich_priv*) pci_get_drvdata(lpc_ich_dev); + if(!priv) { + pr_info("dell_ich: Unable to retrieve private data\n"); + return -ENODEV; + } + + // Retrieve the GPIO Base (that was initialized by lpc-ich) + pci_read_config_dword(lpc_ich_dev, priv->gbase, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + pr_info("dell_ich I/O space for GPIO uninitialized\n"); + ret = -ENODEV; + goto probe_err; + } + + res = &gpio_ich_res[ICH_RES_GPIO]; + res->start = base_addr; + res->end = res->start + 0x9c - 1; + ret = acpi_check_resource_conflict(res); + if (ret) { + pr_info("dell_ich gpio resource conflict ret %d\n",ret); + } + + ich_data->gpio_base=res; + // Request regions for GPIO registers + for(i=0; istart+avoton_gpio_regs[i],GPIO_REG_LEN, "dell_ich_gpio")) { + pr_info("dell_ich: request_region failed for GPIO : %x\n",(unsigned int) res->start+avoton_gpio_regs[i]); + ret = -EBUSY; + goto probe_err; + } + ich_data->gpio_alloc |= (1<kobj, &gpio_attrs_group); + if (ret) { + pr_info("dell_ich cannot create sysfs for GPIO %d\n",ret); + ret = -ENOMEM; + goto probe_err; + } + + // Retrieve the ACPI Base (that was initialized by lpc-ich) + pci_read_config_dword(lpc_ich_dev, priv->abase, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + pr_info("dell_ich I/O space for ACPI uninitialized\n"); + ret = -ENODEV; + goto probe_err; + } + + res = &gpio_ich_res[ICH_RES_GPE0]; + res->start = base_addr; + res->end = base_addr + 0x40; + ret = acpi_check_resource_conflict(res); + if (ret) { + pr_info("dell_ich acpi resource conflict ret %d\n",ret); + } + + // ACPI region is requested by pnp 00:01/ACPI GPE0_BLK + ich_data->acpi_base=res; + + /* Register sysfs hooks for ACPI */ + ret = sysfs_create_group(&dev->kobj, &acpi_attrs_group); + if (ret) { + pr_info("dell_ich cannot create sysfs for ACPI %d\n",ret); + ret = -ENOMEM; + goto probe_err; + } + + // Retrieve the PMC Base (that was initialized by lpc-ich) + pci_read_config_dword(lpc_ich_dev, priv->actrl_pbase, &base_addr_cfg); + base_addr = base_addr_cfg & 0xfffffe00; + pr_info("dell_ich base_addr_cfg %x base_addr %x\n",(int)base_addr_cfg,(int)base_addr); + if (!base_addr) { + pr_info("dell_ich PMC space for GPIO uninitialized\n"); + ret = -ENODEV; + goto probe_err; + } + + res = &pmc_res; + res->start = base_addr + PMC_GPIO_ROUT; + res->end = base_addr + PMC_GPIO_ROUT + PMC_REG_LEN - 1; + pr_info("dell_ich pmc res_start:end %x:%x\n",(int)res->start,(int)res->end); + + ret = acpi_check_resource_conflict(res); + if (ret) { + pr_info("dell_ich acpi resource conflict ret %d\n",ret); + } + + if (!request_mem_region(res->start,resource_size(res),"dell_ich_pmc")) { + pr_info("dell_ich pmc request_region failed\n"); + ret = -EBUSY; + goto probe_err; + } else { + ich_data->pmc_alloc=1; + } + + ich_data->pmc_base = ioremap(res->start, resource_size(res)); + if(!ich_data->pmc_base) { + pr_info("dell_ich pmc ioremap failed\n"); + ret = -ENOMEM; + goto probe_err; + } + + /* Register sysfs hooks for pmc */ + ret = sysfs_create_group(&dev->kobj, &pmc_attrs_group); + if (ret) { + pr_info("dell_ich cannot create sysfs for PMC %d\n",ret); + ret = -ENOMEM; + goto probe_err; + } + + /* Register sysfs hooks for SCI interrupts*/ + ret = sysfs_create_group(&dev->kobj, &sci_attrs_group); + if (ret) { + pr_info("dell_ich cannot create sysfs for SCI %d\n",ret); + ret = -ENOMEM; + goto probe_err; + } + + if((ich_data->kind == z9100smf) || (ich_data->kind == s6100smf)) { + ret = setup_gpio_sus6_sci_interrupt(dev); + if (ret) { + pr_info("dell_ich unable to setup SCI interrupt %d\n",ret); + goto probe_err; + } + } + + return 0; + +probe_err: + pr_info("dell_ich dell_ich_probe failed with : %d\n",ret); + return ret; +} + +static int dell_ich_remove(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct dell_ich_data *ich_data = dev_get_platdata(dev); + int i,ret; + + // Release GPIO regions + for(i=0; igpio_alloc & (1<gpio_base->start+avoton_gpio_regs[i], GPIO_REG_LEN); + } + } + + // Unmap and release PMC regions + if(ich_data->pmc_base) iounmap(ich_data->pmc_base); + if(ich_data->pmc_alloc) release_region(pmc_res.start, PMC_REG_LEN); + + ret = acpi_remove_sci_handler(dell_ich_sci_handler); + if(ret) { + pr_info("dell_ich acpi_remove_sci_handler failed %d\n",ret); + return ret; + } + + pr_info("dell_ich : dell_ich_remove done.\n"); + + return 0; +} + +static struct platform_driver dell_ich_driver= { + .driver = { + .name = DRV_NAME, + }, + .probe = dell_ich_probe, + .remove = dell_ich_remove, +}; + +int __init +init_ich_data(int smf_address, struct dell_ich_data *ich_data) +{ + int val; + + memset(ich_data, 0, sizeof(struct dell_ich_data)); + + if (force_id) + val = force_id; + else + val = inb(smf_address + SIO_REG_DEVID); + + switch (val) { + case SIO_Z9100_ID: + ich_data->kind = z9100smf; + break; + case SIO_S6100_ID: + ich_data->kind = s6100smf; + break; + default: + if (val != 0xffff) + pr_debug("unsupported chip ID: 0x%04x\n", val); + return -ENODEV; + } + + pr_info("dell_ich: found SMF for ID %#x\n", ich_data->kind); + + return (0); +} + +static struct platform_device *pdev; + +static int __init dell_ich_init(void) +{ + int err; + struct dell_ich_data ich_data; + + if (init_ich_data(SMF_REG_ADDR, &ich_data)) + return -ENODEV; + + err = platform_driver_register(&dell_ich_driver); + if (err) + goto exit; + + pdev = platform_device_alloc(DRV_NAME, 0); + if (!pdev) { + err = -ENOMEM; + pr_err("dell_ich: Device allocation failed\n"); + goto exit_unregister; + } + + err = platform_device_add_data(pdev, &ich_data, + sizeof(struct dell_ich_data)); + if (err) { + pr_err("dell_ich: Platform data allocation failed\n"); + goto exit_device_put; + } + + /* platform_device_add calls probe() */ + err = platform_device_add(pdev); + if (err) { + pr_err("dell_ich: Device addition failed (%d)\n", err); + goto exit_device_put; + } + + return 0; + +exit_device_put: + platform_device_put(pdev); +exit_unregister: + platform_driver_unregister(&dell_ich_driver); +exit: + pr_err("dell_ich: dell_ich_init failed (%d)\n", err); + return err; +} + +static void __exit dell_ich_exit(void) +{ + platform_device_unregister(pdev); + platform_driver_unregister(&dell_ich_driver); + + /*Remove sysfs dell_kobj*/ + kobject_put(dell_kobj); +} + +MODULE_AUTHOR("Padmanabhan Narayanan"); +MODULE_DESCRIPTION("ICH driver for Dell Avoton/Rangeley switches"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:"DRV_NAME); +MODULE_PARM_DESC(force_id, "Override the detected device ID"); + +MODULE_SOFTDEP("pre: lpc_ich"); +module_init(dell_ich_init); +module_exit(dell_ich_exit); diff --git a/platform/broadcom/sonic-platform-modules-dell/common/dell_lpc_mon.sh b/platform/broadcom/sonic-platform-modules-dell/common/dell_lpc_mon.sh new file mode 100755 index 00000000000..0f8d24a7f51 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/common/dell_lpc_mon.sh @@ -0,0 +1,46 @@ +#!/bin/bash +REV=$(lspci -xxx -s 0:0.0 | grep rev | awk -F 'rev ' '{print $2}' | sed 's/)//') +if [ $REV -gt 2 ] +then + exit 0 +fi + +test_val=(55 aa) +num_val=${#test_val[@]} +index=0 +poll_interval=300 +cpld_scratch_reg=0x102 +smf_scratch_reg=0x202 + +function log_crit() { + local msg=$1 + + `logger -p user.crit -t DELL_LPC_BUS_MON $msg` +} + +function validate_lpc() { + local reg=$1 + local val=$2 + local reg_str="CPLD scratch register" + + if [ $reg == $smf_scratch_reg ] + then + reg_str="SMF scratch register" + fi + io_rd_wr.py --set --val $val --offset $reg + get_val=$(io_rd_wr.py --get --offset $reg | cut -d " " -f3) + if [ $val != $get_val ] + then + log_crit "LPC bus has deteriorated on this unit. \ + $reg_str has value $get_val while expected is $val \ + Please contact technical support" + fi +} +while true +do + val=${test_val[$index]} + validate_lpc $cpld_scratch_reg $val + validate_lpc $smf_scratch_reg $val + index=$(((index+1)%num_val)) + sleep $poll_interval +done diff --git a/platform/broadcom/sonic-platform-modules-dell/common/dell_pmc.c b/platform/broadcom/sonic-platform-modules-dell/common/dell_pmc.c new file mode 100644 index 00000000000..7c258cdfeab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/common/dell_pmc.c @@ -0,0 +1,2287 @@ +/* Copyright (c) 2017 Dell Inc.* + * dell_s6100_smf.c - driver for Dell SMF + * + * Author: Per Fremrot + * Author: Paavaanan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SIO_DRVNAME "SMF" +#define DEBUG 1 +#define LABELS 1 +#define SMF_VERSION_ADDR 0x0000 + +#define FANIN_MAX 12 /* Counted from 1 */ +#define VSEN_MAX 48 /* VSEN1.. */ +#define CURR_MAX 6 +#define TCPU_MAX 15 +#define PSU_MAX 4 /* TODO change to actual sensors */ + +/* Where are the sensors address/data + registers relative to the region offset */ + +#define IOREGION_OFFSET 0x10 +#define IOREGION_LENGTH 0x4 +#define SMF_ADDR_REG_OFFSET 0 +#define SMF_READ_DATA_REG_OFFSET 2 +#define SMF_WRITE_DATA_REG_OFFSET 3 +#define SMF_REG_ADDR 0x200 +#define SMF_POR_SRC_REG 0x209 +#define SMF_RST_SRC_REG 0x20A +#define SMF_PROBE_ADDR 0x210 + +#define SIO_REG_DEVID 0x1 +#define SIO_Z9100_ID 0x1 +#define SIO_S6100_ID 0x2 +#define SIO_S4200_ID 0x3 +#define SIO_S5148_ID 0x4 + +/* IOM presence */ +#define IO_MODULE_STATUS 0x0310 +#define IO_MODULE_PRESENCE 0x0311 + +/* FAN Tray */ +#define S6100_MAX_NUM_FAN_TRAYS 4 +#define Z9100_MAX_NUM_FAN_TRAYS 5 + +#define MAX_NUM_FAN_TRAYS 0x00F0 +#define MAX_NUM_FANS_PER_TRAY 0x00F1 +#define FAN_TRAY_PRESENCE 0x0113 +#define FAN_STATUS_GROUP_A 0x0114 +#define FAN_STATUS_GROUP_B 0x0115 +#define FAN_TRAY_AIRFLOW 0x0116 + + +/* FAN */ +#define SMF_FAN_SPEED_ADDR 0x00F3 +#define FAN_TRAY_1_SPEED 0x00F3 +#define FAN_TRAY_1_FAN_2_SPEED 0x00F5 +#define FAN_TRAY_2_SPEED 0x00F7 +#define FAN_TRAY_2_FAN_2_SPEED 0x00F9 +#define FAN_TRAY_3_SPEED 0x00FB +#define FAN_TRAY_3_FAN_2_SPEED 0x00FD +#define FAN_TRAY_4_SPEED 0x00FF +#define FAN_TRAY_4_FAN_2_SPEED 0x0101 +#define FAN_TRAY_5_FAN_1_SPEED 0x0103 +#define FAN_TRAY_5_FAN_2_SPEED 0x0105 +#define FAN_TRAY_5 4 +#define FAN_1_SERIAL_CODE 0x0117 +#define FAN_2_SERIAL_CODE 0x013A +#define FAN_3_SERIAL_CODE 0x015D +#define FAN_4_SERIAL_CODE 0x0180 +#define FAN_5_SERIAL_CODE 0x01A3 +#define FAN_601_FAULT (2 + 1) +#define IN28_INPUT (27 + 1) +#define IN404_INPUT (43 + 1) +#define IOM_PRESENCE (44 + 1) +#define IOM_PRESENCE_MAX (45 + 1) +#define IN602_INPUT (1 + 1) +#define CURR22_INPUT (1 + 1) +#define CURR602_INPUT (3 + 1) +#define TEMP13_INPUT (12 + 1) +#define TEMP601_INPUT (13 + 1) + +/* PSUs */ +#define S6100_MAX_NUM_PSUS 2 +#define MAX_NUM_PSUS 0x0231 +#define CURRENT_TOTAL_POWER 0x0232 + +/* PSU1 */ +#define PSU_1_MAX_POWER 0x0234 +#define PSU_1_FUNCTION_SUPPORT 0x0236 +#define PSU_1_STATUS 0x0237 +#define PSU_1_TEMPERATURE 0x0239 +#define PSU_1_FAN_SPEED 0x023B +#define PSU_1_FAN_STATUS 0x023D +#define PSU_1_INPUT_VOLTAGE 0x023E +#define PSU_1_OUTPUT_VOLTAGE 0x0240 +#define PSU_1_INPUT_CURRENT 0x0242 +#define PSU_1_OUTPUT_CURRENT 0x0244 +#define PSU_1_INPUT_POWER 0x0246 +#define PSU_1_OUTPUT_POWER 0x0248 +#define PSU_1_COUNTRY_CODE 0x024A + +/* PSU2 */ +#define PSU_2_MAX_POWER 0x026D +#define PSU_2_FUNCTION_SUPPORT 0x026F +#define PSU_2_STATUS 0x0270 +#define PSU_2_TEMPERATURE 0x0272 +#define PSU_2_FAN_SPEED 0x0274 +#define PSU_2_FAN_STATUS 0x0276 +#define PSU_2_INPUT_VOLTAGE 0x0277 +#define PSU_2_OUTPUT_VOLTAGE 0x0279 +#define PSU_2_INPUT_CURRENT 0x027B +#define PSU_2_OUTPUT_CURRENT 0x027D +#define PSU_2_INPUT_POWER 0x027F +#define PSU_2_OUTPUT_POWER 0x0281 +#define PSU_2_COUNTRY_CODE 0x0283 + +/* TEMP */ +#define TEMP_SENSOR_1 0x0014 +#define TEMP_SENSOR_1_STATUS 0x00DC +#define TEMP_SENSOR_1_HW_LIMIT 0x003E + +/* VOLTAGE */ +#define CPU_1_VOLTAGE 0x02A8 +#define IO_MODULE_1_VOLTAGE 0x02E8 +#define SWITCH_CURRENT_S6100 0x02E4 +#define SWITCH_CURRENT_Z9100 0x02E2 + +/* VOLTAGE S6100 */ +#define CPU_1_MONITOR_STATUS 0x0308 +#define CPU_2_MONITOR_STATUS 0x0309 +#define CPU_3_MONITOR_STATUS 0x030A +#define CPU_4_MONITOR_STATUS 0x030B + +/* VOLTAGE Z9100 */ +#define CPU_5_MONITOR_STATUS 0x02E6 +#define CPU_6_MONITOR_STATUS 0x02E7 +#define CPU_7_MONITOR_STATUS 0x02E8 +#define CPU_8_MONITOR_STATUS 0x02E9 + +/* EEPROM PPID */ +/* FAN and PSU EEPROM PPID format is: + COUNTRY_CODE-PART_NO-MFG_ID-MFG_DATE_CODE-SERIAL_NO-LABEL_REV */ +#define EEPROM_COUNTRY_CODE_SIZE 2 +#define EEPROM_PART_NO_SIZE 6 +#define EEPROM_MFG_ID_SIZE 5 +#define EEPROM_MFG_DATE_SIZE 8 +#define EEPROM_DATE_CODE_SIZE 3 +#define EEPROM_SERIAL_NO_SIZE 4 +#define EEPROM_SERVICE_TAG_SIZE 7 +#define EEPROM_LABEL_REV_SIZE 3 +#define EEPROM_PPID_SIZE 28 + +/* Mailbox PowerOn Reason */ +#define TRACK_POWERON_REASON 0x05FF + + +unsigned long *mmio; +static struct kobject *dell_kobj; +static unsigned short force_id; +module_param(force_id, ushort, 0); +int smf_ver; + + +enum kinds { + z9100smf, s6100smf +}; + + +struct smf_devices { + const char *name; + u64 tcpu_mask; + u64 vsen_mask; + u32 curr_mask; + u64 fanin_mask; + u64 psu_mask; + const char *const *temp_label; + const char *const *vsen_label; + const char *const *curr_label; + const char *const *fan_label; + const char *const *psu_label; +}; + + +static const char *const z9100_temp_label[] = { + "CPU On-board (U2900)", + "BCM Switch On-Board #1 (U44)", + "Front BCM On-Board (U4)", + "Front BCM On-Board (U2)", + "Unused", + "BCM Switch On-Board #1 (U38)", + "Unused", + "Unused", + "Rear (U2900)", + "", + "", + "", + "", + "", + "PSU 1", + "PSU 2" +}; + + +static const char *const s6100_temp_label[] = { + "CPU On-board (U2900)", + "BCM On-Board #1 (U44)", + "Front BCM On-board (U4)", + "Front BCM On-board (U2)", + "IOM #1", + "IOM #2", + "IOM #3", + "IOM #4", + "U2 Switch board?", + "Front GE", + "Front SFP+", + "BCM Internal", + "CPU Internal", + "", + "PSU 1", + "PSU 2" +}; + + +static const char *const z9100_vsen_label[] = { + /* CPU Board */ + "CPU XP3R3V_EARLY", + "CPU XP5R0V_CP", + "CPU XP3R3V_STD", + "CPU XP3R3V_CP ", + "CPU XP0R75V_VTT_A", + "CPU XP0R75V_VTT_B", + "CPU XP1R07V_CPU", + "CPU XP1R0V_CPU", + "CPU XP12R0V", + "CPU VDDR_CPU_2", + "CPU VDDR_CPU_1", + "CPU XP1R5V_CLK", + "CPU XP1R35V_CPU", + "CPU XP1R8V_CPU", + "CPU XP1R0V_CPU_VNN", + "CPU XP1R0V_CPU_VCC", + "CPU XP1R5V_EARLY", + /* Switch Board */ + "SW XP12R0V_MON", + "SW XP3R3V_MON", + "SW XP1R8V_MON", + "SW XP1R25V_MON", + "SW XP1R2V_MON", + "SW XP1R0V_SW_MON", + "SW XP1R0V_ROV_SW_MON", + "SW XP5V_MB_MON", + "SW XP1R8V_FPGA_MON", + "SW XP3R3V_FPGA_MON", + "SW XP3R3V_EARLY_MON", + /* PSU */ + "PSU1 VIN", + "PSU1 VOUT", + "PSU2 VIN", + "PSU2 VOUT", + /* IOM 1 */ + "", + "", + "", + "", + /* IOM 2 */ + "", + "", + "", + "", + /* IOM 3 */ + "", + "", + "", + "", + /* IOM 4 */ + "", + "", + "", + "" +}; + + +static const char *const s6100_vsen_label[] = { + /* CPU Board */ + "CPU XP3R3V_EARLY", + "CPU XP5R0V_CP", + "CPU XP3R3V_STD", + "CPU XP3R3V_CP ", + "CPU XP0R75V_VTT_A", + "CPU XP0R75V_VTT_B", + "CPU XP1R07V_CPU", + "CPU XP1R0V_CPU", + "CPU XP12R0V", + "CPU VDDR_CPU_2", + "CPU VDDR_CPU_1", + "CPU XP1R5V_CLK", + "CPU XP1R35V_CPU", + "CPU XP1R8V_CPU", + "CPU XP1R0V_CPU_VNN", + "CPU XP1R0V_CPU_VCC", + "CPU XP1R5V_EARLY", + /* Switch Board */ + "SW XP12R0V_MON", + "SW XP3R3V_MON", + "SW XP1R8V_MON", + "SW XP1R25V_MON", + "SW XP1R2V_MON", + "SW XP1R0V_SW_MON", + "SW XP1R0V_ROV_SW_MON", + "XR1R0V_BCM84752_MON", + "SW XP5V_MB_MON", + "SW XP1R8V_FPGA_MON", + "SW XP3R3V_FPGA_MON", + + /* PSU */ + "PSU1 VIN", + "PSU1 VOUT", + "PSU2 VIN", + "PSU2 VOUT", + + /* IOM 1 */ + "IOM 1 #1", + "IOM 1 #2", + "IOM 1 #3", + "IOM 1 #4", + /* IOM 2 */ + "IOM 2 #1", + "IOM 2 #2", + "IOM 2 #3", + "IOM 2 #4", + /* IOM 1 */ + "IOM 3 #1", + "IOM 3 #2", + "IOM 3 #3", + "IOM 3 #4", + /* IOM 1 */ + "IOM 4 #1", + "IOM 4 #2", + "IOM 4 #3", + "IOM 4 #4" +}; + + +static const char *const z9100_curr_label[] = { + "XP1R0V", + "XP1R0V_ROV" +}; + + +static const char *const s6100_fan_label[] = { + "Tray1 Fan1", + "", + "Tray2 Fan1", + "", + "Tray3 Fan1", + "", + "Tray4 Fan1", + "", + "", + "", + "Psu1 Fan", + "Psu2 Fan" +}; + +static const char *const z9100_fan_label[] = { + "Tray1 Fan1", + "Tray1 Fan2", + "Tray2 Fan1", + "Tray2 Fan2", + "Tray3 Fan1", + "Tray3 Fan2", + "Tray4 Fan1", + "Tray4 Fan2", + "Tray5 Fan1", + "Tray5 Fan2", + "Psu1 Fan", + "Psu2 Fan" +}; + + +static const char *const s6100_psu_label[] = { + "Psu1 Input", + "Psu1 Output", + "Psu2 Input", + "Psu2 Output", +}; + +static const struct smf_devices smf_devices[] = { + [z9100smf] = { + .name = "SMF_Z9100_ON", + .tcpu_mask=0xe1ff, + .vsen_mask=0xfffdffff, + .curr_mask=0x3f, + .fanin_mask=0xfff, + .psu_mask=0xf, + .temp_label = z9100_temp_label, + .vsen_label = z9100_vsen_label, + .curr_label = z9100_curr_label, + .fan_label = z9100_fan_label, + .psu_label = s6100_psu_label + }, + [s6100smf] = { + .name = "SMF_S6100_ON", + .tcpu_mask=0x7fff, + .vsen_mask=0xfffffefdffff, + .curr_mask=0x3f, + .fanin_mask=0xc55, + .psu_mask=0xf, + .temp_label = s6100_temp_label, + .vsen_label = s6100_vsen_label, + .curr_label = z9100_curr_label, + .fan_label = s6100_fan_label, + .psu_label = s6100_psu_label + + } +}; + + +/* + * For each registered chip, we need to keep some data in memory. + * The structure is dynamically allocated. + */ +struct smf_data { + enum kinds kind; /* Inherited from SuperIO kind */ + unsigned short addr; + struct device *hwmon_dev; + struct mutex lock; + u64 tcpu_mask; + u64 vsen_mask; + u32 curr_mask; + u64 fanin_mask; + u64 psu_mask; + const char * const *temp_label; + const char * const *vsen_label; + const char * const *curr_label; + const char * const *fan_label; + const char * const *psu_label; +}; + + +struct smf_sio_data { + int sioreg; + enum kinds kind; +}; + +static int smf_write_reg(struct smf_data *data, u16 reg, u16 dev_data) +{ + int res = 0; + + mutex_lock(&data->lock); + outb_p(reg>> 8, data->addr + SMF_ADDR_REG_OFFSET); + outb_p(reg & 0xff, data->addr + SMF_ADDR_REG_OFFSET + 1); + outb_p(dev_data & 0xff, data->addr + SMF_WRITE_DATA_REG_OFFSET); + mutex_unlock(&data->lock); + + return res; +} + +static int smf_read_reg(struct smf_data *data, u16 reg) +{ + int res; + + mutex_lock(&data->lock); + outb_p(reg>> 8, data->addr + SMF_ADDR_REG_OFFSET); + outb_p(reg & 0xff, data->addr + SMF_ADDR_REG_OFFSET + 1); + res = inb_p(data->addr + SMF_READ_DATA_REG_OFFSET); + mutex_unlock(&data->lock); + return res; +} + + +static int smf_read_reg16(struct smf_data *data, u16 reg) +{ + int res; + + mutex_lock(&data->lock); + outb_p(reg>> 8, data->addr + SMF_ADDR_REG_OFFSET); + outb_p(reg & 0xff, data->addr + SMF_ADDR_REG_OFFSET + 1); + + res = inb_p(data->addr + SMF_READ_DATA_REG_OFFSET); + + outb_p((reg + 1)>> 8, data->addr + SMF_ADDR_REG_OFFSET); + outb_p((reg + 1) & 0xff, data->addr + SMF_ADDR_REG_OFFSET + 1); + + res = (res << 8) + inb_p(data->addr + SMF_READ_DATA_REG_OFFSET); + + mutex_unlock(&data->lock); + return res; +} + +/* SMF Version */ +static ssize_t show_smf_version(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + unsigned int ret = 0; + unsigned int smf_version = 0; + unsigned int smf_firmware_major_ver = 0; + unsigned int smf_firmware_minor_ver = 0; + struct smf_data *data = dev_get_drvdata(dev); + + ret = smf_read_reg(data, (SMF_VERSION_ADDR + index*2)); + + printk("smf_firmware_details-->0x%x index[%d]", ret, index); + + if (index > 0) { + smf_firmware_major_ver = ((ret & (0xC0)) >> 6); + smf_firmware_minor_ver = (ret & (0x3F)); + + ret = sprintf(buf, "%u.%u\n", smf_firmware_major_ver, + smf_firmware_minor_ver); + } else { + smf_version = ret; + ret = sprintf(buf, "%u\n", smf_version); + } + + return ret; +} + + +/* SMF Reset Reason */ +static ssize_t show_reset_reason(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + unsigned int ret = 0; + + ret = inb(SMF_RST_SRC_REG); + + if(ret < 0) + return ret; + + return sprintf(buf, "%x\n", ret); +} + +/* SMF Power ON Reason */ +static ssize_t show_power_on_reason(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + unsigned int ret = 0; + + ret = inb(SMF_POR_SRC_REG); + + if(ret < 0) + return ret; + + return sprintf(buf, "%x\n", ret); +} + +/* SMF Mailbox Power ON Reason */ +static ssize_t set_mb_poweron_reason(struct device *dev, + struct device_attribute *devattr, const char *buf, size_t count) +{ + int err = 0; + unsigned int dev_data = 0; + struct smf_data *data = dev_get_drvdata(dev); + + err = kstrtouint(buf, 16, &dev_data); + if (err) + return err; + + err = smf_write_reg(data, TRACK_POWERON_REASON, dev_data); + + if(err < 0) + return err; + + return count; +} + +static ssize_t show_mb_poweron_reason(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + unsigned int ret = 0; + struct smf_data *data = dev_get_drvdata(dev); + + ret = smf_read_reg(data, TRACK_POWERON_REASON); + + if(ret < 0) + return ret; + + return sprintf(buf, "0x%x\n", ret); +} + +/* FANIN ATTR */ +static ssize_t +show_fan_label(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct smf_data *data = dev_get_drvdata(dev); + int nr = to_sensor_dev_attr(attr)->index; + return sprintf(buf, "%s\n", data->fan_label[nr]); +} + + +static ssize_t show_fan(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + struct smf_data *data = dev_get_drvdata(dev); + int export_hex=0; + unsigned int ret = -1; + unsigned rpm; + + + if (index <10) + ret = smf_read_reg16(data, SMF_FAN_SPEED_ADDR + index * 2); + else switch (index) { + case 10: + ret = smf_read_reg16(data, PSU_1_FAN_SPEED); + break; + case 11: + ret = smf_read_reg16(data, PSU_2_FAN_SPEED); + break; + case 12: + ret = ~smf_read_reg(data, FAN_TRAY_PRESENCE); + export_hex = 1; + break; + + default: + return ret; + } + + + if (ret < 0) + return ret; + + if (ret & 0x8000) + ret = - (ret & 0x7fff); + + rpm = ret; + + if(export_hex) + return sprintf(buf, "%x\n", rpm); + else + return sprintf(buf, "%u\n", rpm); +} + + +static ssize_t show_fan_fault(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + struct smf_data *data = dev_get_drvdata(dev); + int ret=1, fan_status; + + index = index / 2; + fan_status = ~smf_read_reg(data, FAN_TRAY_PRESENCE); + + if (fan_status & (1 << (index))) + ret=0; + + if (ret < 0) + return ret; + + return sprintf(buf, "%d\n", ret); +} + + +static ssize_t show_fan_alarm(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + struct smf_data *data = dev_get_drvdata(dev); + int ret, psu_fan_status=0; + + if(index < 2) + psu_fan_status = smf_read_reg(data, FAN_STATUS_GROUP_B); + + if (psu_fan_status & (1 << (index))) + ret=0; + + if (ret < 0) + return ret; + + return sprintf(buf, "%d\n", ret); +} + + +static ssize_t show_fan_airflow(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + struct smf_data *data = dev_get_drvdata(dev); + int ret=1, fan_airflow; + + if (data->kind == s6100smf && index == FAN_TRAY_5) + return 0; + + fan_airflow = smf_read_reg(data, FAN_TRAY_AIRFLOW); + + if (fan_airflow & (1 << (index))) + ret=1; + + if (ret < 0) + return ret; + + return sprintf(buf, "%d\n", ret); +} + + +static ssize_t show_psu_fan(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + struct smf_data *data = dev_get_drvdata(dev); + int ret=0, fan_status; + + if (index < FAN_601_FAULT){ + fan_status = smf_read_reg(data, PSU_1_FAN_STATUS); + ret = fan_status & (1 << index); + + } + else{ + fan_status = smf_read_reg(data, PSU_2_FAN_STATUS); + ret = fan_status & (1 << (index - 3)); + } + + if (ret < 0) + return ret; + + return sprintf(buf, "%d\n", ret); +} + + + +static umode_t smf_fanin_is_visible(struct kobject *kobj, + struct attribute *a, int n) +{ + struct device *dev = container_of(kobj, struct device, kobj); + struct smf_data *data = dev_get_drvdata(dev); + + if (data->fanin_mask & (1 << (n % FANIN_MAX))) + return a->mode; + + return 0; +} + +static umode_t smf_dell_is_visible(struct kobject *kobj, + struct attribute *a, int n) +{ + return a->mode; + +} + +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_fan, NULL, 5); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_fan, NULL, 6); +static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_fan, NULL, 7); +static SENSOR_DEVICE_ATTR(fan9_input, S_IRUGO, show_fan, NULL, 8); +static SENSOR_DEVICE_ATTR(fan10_input, S_IRUGO, show_fan, NULL,9); +/* PSU1 FAN */ +static SENSOR_DEVICE_ATTR(fan11_input, S_IRUGO, show_fan, NULL, 10); +/* PSU2 FAN */ +static SENSOR_DEVICE_ATTR(fan12_input, S_IRUGO, show_fan, NULL, 11); + +static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0); +static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 1); +static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 2); +static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 3); +static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_fan_alarm, NULL, 4); +static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_fan_alarm, NULL, 5); +static SENSOR_DEVICE_ATTR(fan7_alarm, S_IRUGO, show_fan_alarm, NULL, 6); +static SENSOR_DEVICE_ATTR(fan8_alarm, S_IRUGO, show_fan_alarm, NULL, 7); +static SENSOR_DEVICE_ATTR(fan9_alarm, S_IRUGO, show_fan_alarm, NULL, 8); +static SENSOR_DEVICE_ATTR(fan10_alarm, S_IRUGO, show_fan_alarm, NULL, 9); +static SENSOR_DEVICE_ATTR(fan11_alarm, S_IRUGO, show_psu_fan, NULL, 1); +static SENSOR_DEVICE_ATTR(fan12_alarm, S_IRUGO, show_psu_fan, NULL, 4); + +static SENSOR_DEVICE_ATTR(fan1_fault, S_IRUGO, show_fan_fault, NULL, 0); +static SENSOR_DEVICE_ATTR(fan2_fault, S_IRUGO, show_fan_fault, NULL, 1); +static SENSOR_DEVICE_ATTR(fan3_fault, S_IRUGO, show_fan_fault, NULL, 2); +static SENSOR_DEVICE_ATTR(fan4_fault, S_IRUGO, show_fan_fault, NULL, 3); +static SENSOR_DEVICE_ATTR(fan5_fault, S_IRUGO, show_fan_fault, NULL, 4); +static SENSOR_DEVICE_ATTR(fan6_fault, S_IRUGO, show_fan_fault, NULL, 5); +static SENSOR_DEVICE_ATTR(fan7_fault, S_IRUGO, show_fan_fault, NULL, 6); +static SENSOR_DEVICE_ATTR(fan8_fault, S_IRUGO, show_fan_fault, NULL, 7); +static SENSOR_DEVICE_ATTR(fan9_fault, S_IRUGO, show_fan_fault, NULL, 8); +static SENSOR_DEVICE_ATTR(fan10_fault, S_IRUGO, show_fan_fault, NULL, 9); +static SENSOR_DEVICE_ATTR(fan11_fault, S_IRUGO, show_psu_fan, NULL, 2); +static SENSOR_DEVICE_ATTR(fan12_fault, S_IRUGO, show_psu_fan, NULL, 5); + +static SENSOR_DEVICE_ATTR(fan1_label, S_IRUGO, show_fan_label, NULL, 0); +static SENSOR_DEVICE_ATTR(fan2_label, S_IRUGO, show_fan_label, NULL, 1); +static SENSOR_DEVICE_ATTR(fan3_label, S_IRUGO, show_fan_label, NULL, 2); +static SENSOR_DEVICE_ATTR(fan4_label, S_IRUGO, show_fan_label, NULL, 3); +static SENSOR_DEVICE_ATTR(fan5_label, S_IRUGO, show_fan_label, NULL, 4); +static SENSOR_DEVICE_ATTR(fan6_label, S_IRUGO, show_fan_label, NULL, 5); +static SENSOR_DEVICE_ATTR(fan7_label, S_IRUGO, show_fan_label, NULL, 6); +static SENSOR_DEVICE_ATTR(fan8_label, S_IRUGO, show_fan_label, NULL, 7); +static SENSOR_DEVICE_ATTR(fan9_label, S_IRUGO, show_fan_label, NULL, 8); +static SENSOR_DEVICE_ATTR(fan10_label, S_IRUGO, show_fan_label, NULL, 9); +static SENSOR_DEVICE_ATTR(fan11_label, S_IRUGO, show_fan_label, NULL, 10); +static SENSOR_DEVICE_ATTR(fan12_label, S_IRUGO, show_fan_label, NULL, 11); + + +static struct attribute *smf_fanin_attrs[] = { + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_fan8_input.dev_attr.attr, + &sensor_dev_attr_fan9_input.dev_attr.attr, + &sensor_dev_attr_fan10_input.dev_attr.attr, + &sensor_dev_attr_fan11_input.dev_attr.attr, + &sensor_dev_attr_fan12_input.dev_attr.attr, + + &sensor_dev_attr_fan1_label.dev_attr.attr, + &sensor_dev_attr_fan2_label.dev_attr.attr, + &sensor_dev_attr_fan3_label.dev_attr.attr, + &sensor_dev_attr_fan4_label.dev_attr.attr, + &sensor_dev_attr_fan5_label.dev_attr.attr, + &sensor_dev_attr_fan6_label.dev_attr.attr, + &sensor_dev_attr_fan7_label.dev_attr.attr, + &sensor_dev_attr_fan8_label.dev_attr.attr, + &sensor_dev_attr_fan9_label.dev_attr.attr, + &sensor_dev_attr_fan10_label.dev_attr.attr, + &sensor_dev_attr_fan11_label.dev_attr.attr, + &sensor_dev_attr_fan12_label.dev_attr.attr, + + + &sensor_dev_attr_fan1_alarm.dev_attr.attr, + &sensor_dev_attr_fan2_alarm.dev_attr.attr, + &sensor_dev_attr_fan3_alarm.dev_attr.attr, + &sensor_dev_attr_fan4_alarm.dev_attr.attr, + &sensor_dev_attr_fan5_alarm.dev_attr.attr, + &sensor_dev_attr_fan6_alarm.dev_attr.attr, + &sensor_dev_attr_fan7_alarm.dev_attr.attr, + &sensor_dev_attr_fan8_alarm.dev_attr.attr, + &sensor_dev_attr_fan9_alarm.dev_attr.attr, + &sensor_dev_attr_fan10_alarm.dev_attr.attr, + &sensor_dev_attr_fan11_alarm.dev_attr.attr, + &sensor_dev_attr_fan12_alarm.dev_attr.attr, + + &sensor_dev_attr_fan1_fault.dev_attr.attr, + &sensor_dev_attr_fan2_fault.dev_attr.attr, + &sensor_dev_attr_fan3_fault.dev_attr.attr, + &sensor_dev_attr_fan4_fault.dev_attr.attr, + &sensor_dev_attr_fan5_fault.dev_attr.attr, + &sensor_dev_attr_fan6_fault.dev_attr.attr, + &sensor_dev_attr_fan7_fault.dev_attr.attr, + &sensor_dev_attr_fan8_fault.dev_attr.attr, + &sensor_dev_attr_fan9_fault.dev_attr.attr, + &sensor_dev_attr_fan10_fault.dev_attr.attr, + &sensor_dev_attr_fan11_fault.dev_attr.attr, + &sensor_dev_attr_fan12_fault.dev_attr.attr, + + NULL +}; + + + + +/* VSEN ATTR */ +static ssize_t +show_voltage_label(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct smf_data *data = dev_get_drvdata(dev); + int nr = to_sensor_dev_attr(attr)->index; + return sprintf(buf, "%s\n", data->vsen_label[nr]); +} + + +static ssize_t show_voltage(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + struct smf_data *data = dev_get_drvdata(dev); + int volt, ret=0; + int export_hex=0; + + /*0 to 27 */ + if (index < IN28_INPUT) /* Voltage sensors */ + ret = smf_read_reg16(data, CPU_1_VOLTAGE + index * 2); + else if ((data->kind == s6100smf) && (index < IN404_INPUT)) + ret = smf_read_reg16(data, IO_MODULE_1_VOLTAGE + index * 2); + else if ((data->kind == s6100smf) && (index < IOM_PRESENCE)) + ret = smf_read_reg(data, IO_MODULE_STATUS); + else if ((data->kind == s6100smf) && (index < IOM_PRESENCE_MAX)) + ret = smf_read_reg(data, IO_MODULE_PRESENCE); + + if (ret < 0) + return ret; + + if(index < 44) + volt = ret*10; + else + export_hex=1; + + if(export_hex) + return sprintf(buf, "%x\n", ret); + else + return sprintf(buf, "%d\n", volt); +} + + +static ssize_t show_psu_voltage(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + struct smf_data *data = dev_get_drvdata(dev); + int ret; + + if (index < 2) /* PSU1 */ + ret = smf_read_reg16(data, PSU_1_INPUT_VOLTAGE + index * 2); + else /* PSU2 */ + ret = smf_read_reg16(data, PSU_2_INPUT_VOLTAGE + ((index - 2) * 2)); + + if (ret < 0) + return ret; + + return sprintf(buf, "%d\n", ret*10); +} + + +static ssize_t show_voltage_alarm(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + struct smf_data *data = dev_get_drvdata(dev); + unsigned status=0; + int ret; + + if (index < 8) { + + if (data->kind == s6100smf) + status = smf_read_reg16(data, CPU_1_MONITOR_STATUS); + else + status = smf_read_reg16(data, CPU_5_MONITOR_STATUS); + + ret = status & (1 << index); + } + else if (index < 15) { + + if (data->kind == s6100smf) + ret = smf_read_reg16(data, CPU_2_MONITOR_STATUS); + else + ret = smf_read_reg16(data, CPU_6_MONITOR_STATUS); + + ret = status & (1 << index); + } + else if (index < 23) { + + if (data->kind == s6100smf) + ret = smf_read_reg16(data, CPU_3_MONITOR_STATUS); + else + ret = smf_read_reg16(data, CPU_7_MONITOR_STATUS); + + ret = status & (1 << index); + } + else { + + if (data->kind == s6100smf) + ret = smf_read_reg16(data, CPU_4_MONITOR_STATUS); + else + ret = smf_read_reg16(data, CPU_8_MONITOR_STATUS); + + ret = status & (1 << index); + } + + + if (ret < 0) + return ret; + + return sprintf(buf, "%d\n", ret); +} + + +static umode_t smf_vsen_is_visible(struct kobject *kobj, + struct attribute *a, int n) +{ + struct device *dev = container_of(kobj, struct device, kobj); + struct smf_data *data = dev_get_drvdata(dev); + + if (data->vsen_mask & (1 << (n % VSEN_MAX))) + return a->mode; + return 0; +} + +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_voltage, NULL, 0); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_voltage, NULL, 1); +static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_voltage, NULL, 2); +static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_voltage, NULL, 3); +static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_voltage, NULL, 4); +static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_voltage, NULL, 5); +static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_voltage, NULL, 6); +static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_voltage, NULL, 7); +static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_voltage, NULL, 8); +static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_voltage, NULL, 9); +static SENSOR_DEVICE_ATTR(in11_input, S_IRUGO, show_voltage, NULL, 10); +static SENSOR_DEVICE_ATTR(in12_input, S_IRUGO, show_voltage, NULL, 11); +static SENSOR_DEVICE_ATTR(in13_input, S_IRUGO, show_voltage, NULL, 12); +static SENSOR_DEVICE_ATTR(in14_input, S_IRUGO, show_voltage, NULL, 13); +static SENSOR_DEVICE_ATTR(in15_input, S_IRUGO, show_voltage, NULL, 14); +static SENSOR_DEVICE_ATTR(in16_input, S_IRUGO, show_voltage, NULL, 15); +static SENSOR_DEVICE_ATTR(in17_input, S_IRUGO, show_voltage, NULL, 16); +static SENSOR_DEVICE_ATTR(in18_input, S_IRUGO, show_voltage, NULL, 17); +static SENSOR_DEVICE_ATTR(in19_input, S_IRUGO, show_voltage, NULL, 18); +static SENSOR_DEVICE_ATTR(in20_input, S_IRUGO, show_voltage, NULL, 19); +static SENSOR_DEVICE_ATTR(in21_input, S_IRUGO, show_voltage, NULL, 20); +static SENSOR_DEVICE_ATTR(in22_input, S_IRUGO, show_voltage, NULL, 21); +static SENSOR_DEVICE_ATTR(in23_input, S_IRUGO, show_voltage, NULL, 22); +static SENSOR_DEVICE_ATTR(in24_input, S_IRUGO, show_voltage, NULL, 23); +static SENSOR_DEVICE_ATTR(in25_input, S_IRUGO, show_voltage, NULL, 24); +static SENSOR_DEVICE_ATTR(in26_input, S_IRUGO, show_voltage, NULL, 25); +static SENSOR_DEVICE_ATTR(in27_input, S_IRUGO, show_voltage, NULL, 26); +static SENSOR_DEVICE_ATTR(in28_input, S_IRUGO, show_voltage, NULL, 27); + +/* PSU1 Voltage*/ +static SENSOR_DEVICE_ATTR(in29_input, S_IRUGO, show_psu_voltage, NULL, 0); +static SENSOR_DEVICE_ATTR(in30_input, S_IRUGO, show_psu_voltage, NULL, 1); + +/* PSU2 Voltage*/ +static SENSOR_DEVICE_ATTR(in31_input, S_IRUGO, show_psu_voltage, NULL, 2); +static SENSOR_DEVICE_ATTR(in32_input, S_IRUGO, show_psu_voltage, NULL, 3); + +/*IO Modules Voltage*/ +static SENSOR_DEVICE_ATTR(in101_input, S_IRUGO, show_voltage, NULL, 28); +static SENSOR_DEVICE_ATTR(in102_input, S_IRUGO, show_voltage, NULL, 29); +static SENSOR_DEVICE_ATTR(in103_input, S_IRUGO, show_voltage, NULL, 30); +static SENSOR_DEVICE_ATTR(in104_input, S_IRUGO, show_voltage, NULL, 31); +static SENSOR_DEVICE_ATTR(in201_input, S_IRUGO, show_voltage, NULL, 32); +static SENSOR_DEVICE_ATTR(in202_input, S_IRUGO, show_voltage, NULL, 33); +static SENSOR_DEVICE_ATTR(in203_input, S_IRUGO, show_voltage, NULL, 34); +static SENSOR_DEVICE_ATTR(in204_input, S_IRUGO, show_voltage, NULL, 35); +static SENSOR_DEVICE_ATTR(in301_input, S_IRUGO, show_voltage, NULL, 36); +static SENSOR_DEVICE_ATTR(in302_input, S_IRUGO, show_voltage, NULL, 37); +static SENSOR_DEVICE_ATTR(in303_input, S_IRUGO, show_voltage, NULL, 38); +static SENSOR_DEVICE_ATTR(in304_input, S_IRUGO, show_voltage, NULL, 39); +static SENSOR_DEVICE_ATTR(in401_input, S_IRUGO, show_voltage, NULL, 40); +static SENSOR_DEVICE_ATTR(in402_input, S_IRUGO, show_voltage, NULL, 41); +static SENSOR_DEVICE_ATTR(in403_input, S_IRUGO, show_voltage, NULL, 42); +static SENSOR_DEVICE_ATTR(in404_input, S_IRUGO, show_voltage, NULL, 43); + + + +static SENSOR_DEVICE_ATTR(in1_label, S_IRUGO, show_voltage_label, NULL, 0); +static SENSOR_DEVICE_ATTR(in2_label, S_IRUGO, show_voltage_label, NULL, 1); +static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_voltage_label, NULL, 2); +static SENSOR_DEVICE_ATTR(in4_label, S_IRUGO, show_voltage_label, NULL, 3); +static SENSOR_DEVICE_ATTR(in5_label, S_IRUGO, show_voltage_label, NULL, 4); +static SENSOR_DEVICE_ATTR(in6_label, S_IRUGO, show_voltage_label, NULL, 5); +static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_voltage_label, NULL, 6); +static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_voltage_label, NULL, 7); +static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_voltage_label, NULL, 8); +static SENSOR_DEVICE_ATTR(in10_label, S_IRUGO, show_voltage_label, NULL, 9); +static SENSOR_DEVICE_ATTR(in11_label, S_IRUGO, show_voltage_label, NULL, 10); +static SENSOR_DEVICE_ATTR(in12_label, S_IRUGO, show_voltage_label, NULL, 11); +static SENSOR_DEVICE_ATTR(in13_label, S_IRUGO, show_voltage_label, NULL, 12); +static SENSOR_DEVICE_ATTR(in14_label, S_IRUGO, show_voltage_label, NULL, 13); +static SENSOR_DEVICE_ATTR(in15_label, S_IRUGO, show_voltage_label, NULL, 14); +static SENSOR_DEVICE_ATTR(in16_label, S_IRUGO, show_voltage_label, NULL, 15); +static SENSOR_DEVICE_ATTR(in17_label, S_IRUGO, show_voltage_label, NULL, 16); +static SENSOR_DEVICE_ATTR(in18_label, S_IRUGO, show_voltage_label, NULL, 17); +static SENSOR_DEVICE_ATTR(in19_label, S_IRUGO, show_voltage_label, NULL, 18); +static SENSOR_DEVICE_ATTR(in20_label, S_IRUGO, show_voltage_label, NULL, 19); +static SENSOR_DEVICE_ATTR(in21_label, S_IRUGO, show_voltage_label, NULL, 20); +static SENSOR_DEVICE_ATTR(in22_label, S_IRUGO, show_voltage_label, NULL, 21); +static SENSOR_DEVICE_ATTR(in23_label, S_IRUGO, show_voltage_label, NULL, 22); +static SENSOR_DEVICE_ATTR(in24_label, S_IRUGO, show_voltage_label, NULL, 23); +static SENSOR_DEVICE_ATTR(in25_label, S_IRUGO, show_voltage_label, NULL, 24); +static SENSOR_DEVICE_ATTR(in26_label, S_IRUGO, show_voltage_label, NULL, 25); +static SENSOR_DEVICE_ATTR(in27_label, S_IRUGO, show_voltage_label, NULL, 26); +static SENSOR_DEVICE_ATTR(in28_label, S_IRUGO, show_voltage_label, NULL, 27); + +/* PSU1 Voltage Label*/ +static SENSOR_DEVICE_ATTR(in29_label, S_IRUGO, show_voltage_label, NULL, 28); +static SENSOR_DEVICE_ATTR(in30_label, S_IRUGO, show_voltage_label, NULL, 29); + +/* PSU2 Voltage Label*/ +static SENSOR_DEVICE_ATTR(in31_label, S_IRUGO, show_voltage_label, NULL, 30); +static SENSOR_DEVICE_ATTR(in32_label, S_IRUGO, show_voltage_label, NULL, 31); + +/*IO Modules Labels*/ +static SENSOR_DEVICE_ATTR(in101_label, S_IRUGO, show_voltage_label, NULL, 32); +static SENSOR_DEVICE_ATTR(in102_label, S_IRUGO, show_voltage_label, NULL, 33); +static SENSOR_DEVICE_ATTR(in103_label, S_IRUGO, show_voltage_label, NULL, 34); +static SENSOR_DEVICE_ATTR(in104_label, S_IRUGO, show_voltage_label, NULL, 35); +static SENSOR_DEVICE_ATTR(in201_label, S_IRUGO, show_voltage_label, NULL, 36); +static SENSOR_DEVICE_ATTR(in202_label, S_IRUGO, show_voltage_label, NULL, 37); +static SENSOR_DEVICE_ATTR(in203_label, S_IRUGO, show_voltage_label, NULL, 38); +static SENSOR_DEVICE_ATTR(in204_label, S_IRUGO, show_voltage_label, NULL, 39); +static SENSOR_DEVICE_ATTR(in301_label, S_IRUGO, show_voltage_label, NULL, 40); +static SENSOR_DEVICE_ATTR(in302_label, S_IRUGO, show_voltage_label, NULL, 41); +static SENSOR_DEVICE_ATTR(in303_label, S_IRUGO, show_voltage_label, NULL, 42); +static SENSOR_DEVICE_ATTR(in304_label, S_IRUGO, show_voltage_label, NULL, 43); +static SENSOR_DEVICE_ATTR(in401_label, S_IRUGO, show_voltage_label, NULL, 44); +static SENSOR_DEVICE_ATTR(in402_label, S_IRUGO, show_voltage_label, NULL, 45); +static SENSOR_DEVICE_ATTR(in403_label, S_IRUGO, show_voltage_label, NULL, 46); +static SENSOR_DEVICE_ATTR(in404_label, S_IRUGO, show_voltage_label, NULL, 47); + + + +/* CPU Voltage Alarm */ +static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_voltage_alarm, NULL, 0); +static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_voltage_alarm, NULL, 1); +static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_voltage_alarm, NULL, 2); +static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_voltage_alarm, NULL, 3); +static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_voltage_alarm, NULL, 4); +static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_voltage_alarm, NULL, 5); +static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_voltage_alarm, NULL, 6); +static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_voltage_alarm, NULL, 7); + +static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_voltage_alarm, NULL, 8); +static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_voltage_alarm, NULL, 9); +static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_voltage_alarm, NULL, 10); +static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_voltage_alarm, NULL, 11); +static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_voltage_alarm, NULL, 12); +static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_voltage_alarm, NULL, 13); +static SENSOR_DEVICE_ATTR(in15_alarm, S_IRUGO, show_voltage_alarm, NULL, 14); +static SENSOR_DEVICE_ATTR(in16_alarm, S_IRUGO, show_voltage_alarm, NULL, 15); + +static SENSOR_DEVICE_ATTR(in17_alarm, S_IRUGO, show_voltage_alarm, NULL, 16); +static SENSOR_DEVICE_ATTR(in18_alarm, S_IRUGO, show_voltage_alarm, NULL, 17); +static SENSOR_DEVICE_ATTR(in19_alarm, S_IRUGO, show_voltage_alarm, NULL, 18); +static SENSOR_DEVICE_ATTR(in20_alarm, S_IRUGO, show_voltage_alarm, NULL, 19); +static SENSOR_DEVICE_ATTR(in21_alarm, S_IRUGO, show_voltage_alarm, NULL, 20); +static SENSOR_DEVICE_ATTR(in22_alarm, S_IRUGO, show_voltage_alarm, NULL, 21); +static SENSOR_DEVICE_ATTR(in23_alarm, S_IRUGO, show_voltage_alarm, NULL, 22); +static SENSOR_DEVICE_ATTR(in24_alarm, S_IRUGO, show_voltage_alarm, NULL, 23); + +static SENSOR_DEVICE_ATTR(in25_alarm, S_IRUGO, show_voltage_alarm, NULL, 24); +static SENSOR_DEVICE_ATTR(in26_alarm, S_IRUGO, show_voltage_alarm, NULL, 25); +static SENSOR_DEVICE_ATTR(in27_alarm, S_IRUGO, show_voltage_alarm, NULL, 26); +static SENSOR_DEVICE_ATTR(in28_alarm, S_IRUGO, show_voltage_alarm, NULL, 27); + + + +static struct attribute *smf_vsen_attrs[] = { + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_in3_input.dev_attr.attr, + &sensor_dev_attr_in4_input.dev_attr.attr, + &sensor_dev_attr_in5_input.dev_attr.attr, + &sensor_dev_attr_in6_input.dev_attr.attr, + &sensor_dev_attr_in7_input.dev_attr.attr, + &sensor_dev_attr_in8_input.dev_attr.attr, + &sensor_dev_attr_in9_input.dev_attr.attr, + &sensor_dev_attr_in10_input.dev_attr.attr, + &sensor_dev_attr_in11_input.dev_attr.attr, + &sensor_dev_attr_in12_input.dev_attr.attr, + &sensor_dev_attr_in13_input.dev_attr.attr, + &sensor_dev_attr_in14_input.dev_attr.attr, + &sensor_dev_attr_in15_input.dev_attr.attr, + &sensor_dev_attr_in16_input.dev_attr.attr, + &sensor_dev_attr_in17_input.dev_attr.attr, + &sensor_dev_attr_in18_input.dev_attr.attr, + &sensor_dev_attr_in19_input.dev_attr.attr, + &sensor_dev_attr_in20_input.dev_attr.attr, + &sensor_dev_attr_in21_input.dev_attr.attr, + &sensor_dev_attr_in22_input.dev_attr.attr, + &sensor_dev_attr_in23_input.dev_attr.attr, + &sensor_dev_attr_in24_input.dev_attr.attr, + &sensor_dev_attr_in25_input.dev_attr.attr, + &sensor_dev_attr_in26_input.dev_attr.attr, + &sensor_dev_attr_in27_input.dev_attr.attr, + &sensor_dev_attr_in28_input.dev_attr.attr, + + &sensor_dev_attr_in29_input.dev_attr.attr, + &sensor_dev_attr_in30_input.dev_attr.attr, + &sensor_dev_attr_in31_input.dev_attr.attr, + &sensor_dev_attr_in32_input.dev_attr.attr, + + &sensor_dev_attr_in101_input.dev_attr.attr, + &sensor_dev_attr_in102_input.dev_attr.attr, + &sensor_dev_attr_in103_input.dev_attr.attr, + &sensor_dev_attr_in104_input.dev_attr.attr, + &sensor_dev_attr_in201_input.dev_attr.attr, + &sensor_dev_attr_in202_input.dev_attr.attr, + &sensor_dev_attr_in203_input.dev_attr.attr, + &sensor_dev_attr_in204_input.dev_attr.attr, + &sensor_dev_attr_in301_input.dev_attr.attr, + &sensor_dev_attr_in302_input.dev_attr.attr, + &sensor_dev_attr_in303_input.dev_attr.attr, + &sensor_dev_attr_in304_input.dev_attr.attr, + &sensor_dev_attr_in401_input.dev_attr.attr, + &sensor_dev_attr_in402_input.dev_attr.attr, + &sensor_dev_attr_in403_input.dev_attr.attr, + &sensor_dev_attr_in404_input.dev_attr.attr, + + + &sensor_dev_attr_in1_label.dev_attr.attr, + &sensor_dev_attr_in2_label.dev_attr.attr, + &sensor_dev_attr_in3_label.dev_attr.attr, + &sensor_dev_attr_in4_label.dev_attr.attr, + &sensor_dev_attr_in5_label.dev_attr.attr, + &sensor_dev_attr_in6_label.dev_attr.attr, + &sensor_dev_attr_in7_label.dev_attr.attr, + &sensor_dev_attr_in8_label.dev_attr.attr, + &sensor_dev_attr_in9_label.dev_attr.attr, + &sensor_dev_attr_in10_label.dev_attr.attr, + &sensor_dev_attr_in11_label.dev_attr.attr, + &sensor_dev_attr_in12_label.dev_attr.attr, + &sensor_dev_attr_in13_label.dev_attr.attr, + &sensor_dev_attr_in14_label.dev_attr.attr, + &sensor_dev_attr_in15_label.dev_attr.attr, + &sensor_dev_attr_in16_label.dev_attr.attr, + &sensor_dev_attr_in17_label.dev_attr.attr, + &sensor_dev_attr_in18_label.dev_attr.attr, + &sensor_dev_attr_in19_label.dev_attr.attr, + &sensor_dev_attr_in20_label.dev_attr.attr, + &sensor_dev_attr_in21_label.dev_attr.attr, + &sensor_dev_attr_in22_label.dev_attr.attr, + &sensor_dev_attr_in23_label.dev_attr.attr, + &sensor_dev_attr_in24_label.dev_attr.attr, + &sensor_dev_attr_in25_label.dev_attr.attr, + &sensor_dev_attr_in26_label.dev_attr.attr, + &sensor_dev_attr_in27_label.dev_attr.attr, + &sensor_dev_attr_in28_label.dev_attr.attr, + + &sensor_dev_attr_in29_label.dev_attr.attr, + &sensor_dev_attr_in30_label.dev_attr.attr, + &sensor_dev_attr_in31_label.dev_attr.attr, + &sensor_dev_attr_in32_label.dev_attr.attr, + + &sensor_dev_attr_in101_label.dev_attr.attr, + &sensor_dev_attr_in102_label.dev_attr.attr, + &sensor_dev_attr_in103_label.dev_attr.attr, + &sensor_dev_attr_in104_label.dev_attr.attr, + &sensor_dev_attr_in201_label.dev_attr.attr, + &sensor_dev_attr_in202_label.dev_attr.attr, + &sensor_dev_attr_in203_label.dev_attr.attr, + &sensor_dev_attr_in204_label.dev_attr.attr, + &sensor_dev_attr_in301_label.dev_attr.attr, + &sensor_dev_attr_in302_label.dev_attr.attr, + &sensor_dev_attr_in303_label.dev_attr.attr, + &sensor_dev_attr_in304_label.dev_attr.attr, + &sensor_dev_attr_in401_label.dev_attr.attr, + &sensor_dev_attr_in402_label.dev_attr.attr, + &sensor_dev_attr_in403_label.dev_attr.attr, + &sensor_dev_attr_in404_label.dev_attr.attr, + + + &sensor_dev_attr_in1_alarm.dev_attr.attr, + &sensor_dev_attr_in2_alarm.dev_attr.attr, + &sensor_dev_attr_in3_alarm.dev_attr.attr, + &sensor_dev_attr_in4_alarm.dev_attr.attr, + &sensor_dev_attr_in5_alarm.dev_attr.attr, + &sensor_dev_attr_in6_alarm.dev_attr.attr, + &sensor_dev_attr_in7_alarm.dev_attr.attr, + &sensor_dev_attr_in8_alarm.dev_attr.attr, + &sensor_dev_attr_in9_alarm.dev_attr.attr, + &sensor_dev_attr_in10_alarm.dev_attr.attr, + &sensor_dev_attr_in11_alarm.dev_attr.attr, + &sensor_dev_attr_in12_alarm.dev_attr.attr, + &sensor_dev_attr_in13_alarm.dev_attr.attr, + &sensor_dev_attr_in14_alarm.dev_attr.attr, + &sensor_dev_attr_in15_alarm.dev_attr.attr, + &sensor_dev_attr_in16_alarm.dev_attr.attr, + &sensor_dev_attr_in17_alarm.dev_attr.attr, + &sensor_dev_attr_in18_alarm.dev_attr.attr, + &sensor_dev_attr_in19_alarm.dev_attr.attr, + &sensor_dev_attr_in20_alarm.dev_attr.attr, + &sensor_dev_attr_in21_alarm.dev_attr.attr, + &sensor_dev_attr_in22_alarm.dev_attr.attr, + &sensor_dev_attr_in23_alarm.dev_attr.attr, + &sensor_dev_attr_in24_alarm.dev_attr.attr, + &sensor_dev_attr_in25_alarm.dev_attr.attr, + &sensor_dev_attr_in26_alarm.dev_attr.attr, + &sensor_dev_attr_in27_alarm.dev_attr.attr, + &sensor_dev_attr_in28_alarm.dev_attr.attr, + + + NULL +}; + +static const struct attribute_group smf_vsen_group = { + .attrs = smf_vsen_attrs, + .is_visible = smf_vsen_is_visible, +}; + +/* CURRENT ATTR */ +static ssize_t +show_current_label(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct smf_data *data = dev_get_drvdata(dev); + int nr = to_sensor_dev_attr(attr)->index; + return sprintf(buf, "%s\n", data->curr_label[nr]); +} + +static ssize_t show_current(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + struct smf_data *data = dev_get_drvdata(dev); + int ret=0; + int curr; + + if (index < CURR22_INPUT) + if (data->kind == s6100smf) + ret = smf_read_reg16(data, SWITCH_CURRENT_S6100 + index * 2); + else + ret = smf_read_reg16(data, SWITCH_CURRENT_Z9100 + index * 2); + else if (index < CURR602_INPUT) + curr = smf_read_reg16(data, PSU_1_INPUT_CURRENT + (index % 4) * 2); + else + curr = smf_read_reg16(data, PSU_2_INPUT_CURRENT + (index % 4) * 2); + + + if (ret < 0) + return ret; + + /* TODO: docs say 10mA, value look like A? */ + if(index < 2) + curr = ret*1000; + + return sprintf(buf, "%d\n", curr); +} + + +static umode_t smf_curr_is_visible(struct kobject *kobj, + struct attribute *a, int n) +{ + struct device *dev = container_of(kobj, struct device, kobj); + struct smf_data *data = dev_get_drvdata(dev); + + if (data->curr_mask & (1 << (n % CURR_MAX))) + return a->mode; + return 0; +} + + +static SENSOR_DEVICE_ATTR(curr21_input, S_IRUGO, show_current, NULL, 0); +static SENSOR_DEVICE_ATTR(curr22_input, S_IRUGO, show_current, NULL, 1); + +static SENSOR_DEVICE_ATTR(curr601_input, S_IRUGO, show_current, NULL, 2); +static SENSOR_DEVICE_ATTR(curr602_input, S_IRUGO, show_current, NULL, 3); + +static SENSOR_DEVICE_ATTR(curr701_input, S_IRUGO, show_current, NULL, 4); +static SENSOR_DEVICE_ATTR(curr702_input, S_IRUGO, show_current, NULL, 5); + +static SENSOR_DEVICE_ATTR(curr21_label, S_IRUGO, show_current_label, NULL, 0); +static SENSOR_DEVICE_ATTR(curr22_label, S_IRUGO, show_current_label, NULL, 1); + +static SENSOR_DEVICE_ATTR(curr601_label, S_IRUGO, show_current_label, NULL, 2); +static SENSOR_DEVICE_ATTR(curr602_label, S_IRUGO, show_current_label, NULL, 3); + +static SENSOR_DEVICE_ATTR(curr701_label, S_IRUGO, show_current_label, NULL, 4); +static SENSOR_DEVICE_ATTR(curr702_label, S_IRUGO, show_current_label, NULL, 5); + + +static struct attribute *smf_curr_attrs[] = { + &sensor_dev_attr_curr21_input.dev_attr.attr, + &sensor_dev_attr_curr22_input.dev_attr.attr, + + &sensor_dev_attr_curr601_input.dev_attr.attr, + &sensor_dev_attr_curr602_input.dev_attr.attr, + + &sensor_dev_attr_curr701_input.dev_attr.attr, + &sensor_dev_attr_curr702_input.dev_attr.attr, + + &sensor_dev_attr_curr21_label.dev_attr.attr, + &sensor_dev_attr_curr22_label.dev_attr.attr, + + &sensor_dev_attr_curr601_label.dev_attr.attr, + &sensor_dev_attr_curr602_label.dev_attr.attr, + + &sensor_dev_attr_curr701_label.dev_attr.attr, + &sensor_dev_attr_curr702_label.dev_attr.attr, + + NULL +}; + + +static const struct attribute_group smf_curr_group = { + .attrs = smf_curr_attrs, + .is_visible = smf_curr_is_visible, +}; + + +/* CPU_TEMP ATTR */ +static ssize_t +show_temp_label(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct smf_data *data = dev_get_drvdata(dev); + int nr = to_sensor_dev_attr(attr)->index; + return sprintf(buf, "%s\n", data->temp_label[nr]); +} + + +static ssize_t show_tcpu(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + struct smf_data *data = dev_get_drvdata(dev); + int ret; + int temp; + + if (index < TEMP13_INPUT) /* Temp sensors */ + ret = smf_read_reg16(data, TEMP_SENSOR_1 + index * 2); + else if(index < TEMP601_INPUT) + ret = smf_read_reg16(data, PSU_1_TEMPERATURE); + else + ret = smf_read_reg16(data, PSU_2_TEMPERATURE); + + if (ret < 0) + return ret; + + if (ret > 65500) + ret = 0; + + if (ret & 0x8000) + ret = - (ret & 0x7fff); + + temp = ret*100; + + return sprintf(buf, "%d\n", temp); +} + + +static ssize_t show_temp_crit(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + struct smf_data *data = dev_get_drvdata(dev); + int ret; + int temp; + + ret = smf_read_reg16(data, TEMP_SENSOR_1_HW_LIMIT + index * 2); + if (ret < 0) + return ret; + + if (ret == 65535) + ret = 0; + + if (ret & 0x8000) + ret = - (ret & 0x7fff); + + temp = ret*100; + + return sprintf(buf, "%d\n", temp); +} + + +static ssize_t show_temp_alarm(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + struct smf_data *data = dev_get_drvdata(dev); + int ret = 0; + int temp = 0; + + ret = smf_read_reg(data, TEMP_SENSOR_1_STATUS + index); + + if (ret < 0) { + return ret; + } + + if (ret == 0xff) { + ret = 0; + } + + temp = ret; + + return sprintf(buf, "%d\n", temp); +} + + +static umode_t smf_tcpu_is_visible(struct kobject *kobj, + struct attribute *a, int n) +{ + struct device *dev = container_of(kobj, struct device, kobj); + struct smf_data *data = dev_get_drvdata(dev); + + if (data->tcpu_mask & (1 << (n % TCPU_MAX))) + return a->mode; + + return 0; +} + + +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_tcpu, NULL, 0); +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_tcpu, NULL, 1); +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_tcpu, NULL, 2); +static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_tcpu, NULL, 3); +static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_tcpu, NULL, 4); +static SENSOR_DEVICE_ATTR(temp6_input, S_IRUGO, show_tcpu, NULL, 5); +static SENSOR_DEVICE_ATTR(temp7_input, S_IRUGO, show_tcpu, NULL, 6); +static SENSOR_DEVICE_ATTR(temp8_input, S_IRUGO, show_tcpu, NULL, 7); +static SENSOR_DEVICE_ATTR(temp9_input, S_IRUGO, show_tcpu, NULL, 8); +static SENSOR_DEVICE_ATTR(temp10_input, S_IRUGO, show_tcpu, NULL, 9); +static SENSOR_DEVICE_ATTR(temp11_input, S_IRUGO, show_tcpu, NULL, 10); +static SENSOR_DEVICE_ATTR(temp12_input, S_IRUGO, show_tcpu, NULL, 11); +static SENSOR_DEVICE_ATTR(temp13_input, S_IRUGO, show_tcpu, NULL, 12); + +/* PSU1 Fan Temp */ +static SENSOR_DEVICE_ATTR(temp14_input, S_IRUGO, show_tcpu, NULL, 13); + +/* PSU2 Fan Temp */ +static SENSOR_DEVICE_ATTR(temp15_input, S_IRUGO, show_tcpu, NULL, 14); + +static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0); +static SENSOR_DEVICE_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1); +static SENSOR_DEVICE_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2); +static SENSOR_DEVICE_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3); +static SENSOR_DEVICE_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4); +static SENSOR_DEVICE_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5); +static SENSOR_DEVICE_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6); +static SENSOR_DEVICE_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7); +static SENSOR_DEVICE_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8); +static SENSOR_DEVICE_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9); +static SENSOR_DEVICE_ATTR(temp11_label, S_IRUGO, show_temp_label, NULL, 10); +static SENSOR_DEVICE_ATTR(temp12_label, S_IRUGO, show_temp_label, NULL, 11); +static SENSOR_DEVICE_ATTR(temp13_label, S_IRUGO, show_temp_label, NULL, 12); + +static SENSOR_DEVICE_ATTR(temp14_label, S_IRUGO, show_temp_label, NULL, 14); +static SENSOR_DEVICE_ATTR(temp15_label, S_IRUGO, show_temp_label, NULL, 15); + + +static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp_crit, NULL, 1); +static SENSOR_DEVICE_ATTR(temp2_crit, S_IRUGO, show_temp_crit, NULL, 5); +static SENSOR_DEVICE_ATTR(temp3_crit, S_IRUGO, show_temp_crit, NULL, 9); +static SENSOR_DEVICE_ATTR(temp4_crit, S_IRUGO, show_temp_crit, NULL, 13); +static SENSOR_DEVICE_ATTR(temp5_crit, S_IRUGO, show_temp_crit, NULL, 17); +static SENSOR_DEVICE_ATTR(temp6_crit, S_IRUGO, show_temp_crit, NULL, 21); +static SENSOR_DEVICE_ATTR(temp7_crit, S_IRUGO, show_temp_crit, NULL, 25); +static SENSOR_DEVICE_ATTR(temp8_crit, S_IRUGO, show_temp_crit, NULL, 29); +static SENSOR_DEVICE_ATTR(temp9_crit, S_IRUGO, show_temp_crit, NULL, 33); +static SENSOR_DEVICE_ATTR(temp10_crit, S_IRUGO, show_temp_crit, NULL, 37); +static SENSOR_DEVICE_ATTR(temp11_crit, S_IRUGO, show_temp_crit, NULL, 41); +static SENSOR_DEVICE_ATTR(temp12_crit, S_IRUGO, show_temp_crit, NULL, 45); +static SENSOR_DEVICE_ATTR(temp13_crit, S_IRUGO, show_temp_crit, NULL, 49); + +static SENSOR_DEVICE_ATTR(temp14_crit, S_IRUGO, show_temp_crit, NULL, 11); +static SENSOR_DEVICE_ATTR(temp15_crit, S_IRUGO, show_temp_crit, NULL, 11); + + +static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, show_temp_crit, NULL, 2); +static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO, show_temp_crit, NULL, 6); +static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO, show_temp_crit, NULL, 10); +static SENSOR_DEVICE_ATTR(temp4_max, S_IRUGO, show_temp_crit, NULL, 14); +static SENSOR_DEVICE_ATTR(temp5_max, S_IRUGO, show_temp_crit, NULL, 18); +static SENSOR_DEVICE_ATTR(temp6_max, S_IRUGO, show_temp_crit, NULL, 22); +static SENSOR_DEVICE_ATTR(temp7_max, S_IRUGO, show_temp_crit, NULL, 26); +static SENSOR_DEVICE_ATTR(temp8_max, S_IRUGO, show_temp_crit, NULL, 30); +static SENSOR_DEVICE_ATTR(temp9_max, S_IRUGO, show_temp_crit, NULL, 34); +static SENSOR_DEVICE_ATTR(temp10_max, S_IRUGO, show_temp_crit, NULL, 38); +static SENSOR_DEVICE_ATTR(temp11_max, S_IRUGO, show_temp_crit, NULL, 42); +static SENSOR_DEVICE_ATTR(temp12_max, S_IRUGO, show_temp_crit, NULL, 46); +static SENSOR_DEVICE_ATTR(temp13_max, S_IRUGO, show_temp_crit, NULL, 50); + +static SENSOR_DEVICE_ATTR(temp14_max, S_IRUGO, show_temp_crit, NULL, 46); +static SENSOR_DEVICE_ATTR(temp15_max, S_IRUGO, show_temp_crit, NULL, 50); + +static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0); +static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 1); +static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 2); +static SENSOR_DEVICE_ATTR(temp4_alarm, S_IRUGO, show_temp_alarm, NULL, 3); +static SENSOR_DEVICE_ATTR(temp5_alarm, S_IRUGO, show_temp_alarm, NULL, 4); +static SENSOR_DEVICE_ATTR(temp6_alarm, S_IRUGO, show_temp_alarm, NULL, 5); +static SENSOR_DEVICE_ATTR(temp7_alarm, S_IRUGO, show_temp_alarm, NULL, 6); +static SENSOR_DEVICE_ATTR(temp8_alarm, S_IRUGO, show_temp_alarm, NULL, 7); +static SENSOR_DEVICE_ATTR(temp9_alarm, S_IRUGO, show_temp_alarm, NULL, 8); +static SENSOR_DEVICE_ATTR(temp10_alarm, S_IRUGO, show_temp_alarm, NULL, 9); +static SENSOR_DEVICE_ATTR(temp11_alarm, S_IRUGO, show_temp_alarm, NULL, 10); +static SENSOR_DEVICE_ATTR(temp12_alarm, S_IRUGO, show_temp_alarm, NULL, 11); +static SENSOR_DEVICE_ATTR(temp13_alarm, S_IRUGO, show_temp_alarm, NULL, 12); + +static SENSOR_DEVICE_ATTR(temp14_alarm, S_IRUGO, show_temp_alarm, NULL, 13); +static SENSOR_DEVICE_ATTR(temp15_alarm, S_IRUGO, show_temp_alarm, NULL, 14); + + + + +static struct attribute *smf_tcpu_attrs[] = { + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_temp4_input.dev_attr.attr, + &sensor_dev_attr_temp5_input.dev_attr.attr, + &sensor_dev_attr_temp6_input.dev_attr.attr, + &sensor_dev_attr_temp7_input.dev_attr.attr, + &sensor_dev_attr_temp8_input.dev_attr.attr, + &sensor_dev_attr_temp9_input.dev_attr.attr, + &sensor_dev_attr_temp10_input.dev_attr.attr, + &sensor_dev_attr_temp11_input.dev_attr.attr, + &sensor_dev_attr_temp12_input.dev_attr.attr, + &sensor_dev_attr_temp13_input.dev_attr.attr, + &sensor_dev_attr_temp14_input.dev_attr.attr, + &sensor_dev_attr_temp15_input.dev_attr.attr, + + &sensor_dev_attr_temp1_label.dev_attr.attr, + &sensor_dev_attr_temp2_label.dev_attr.attr, + &sensor_dev_attr_temp3_label.dev_attr.attr, + &sensor_dev_attr_temp4_label.dev_attr.attr, + &sensor_dev_attr_temp5_label.dev_attr.attr, + &sensor_dev_attr_temp6_label.dev_attr.attr, + &sensor_dev_attr_temp7_label.dev_attr.attr, + &sensor_dev_attr_temp8_label.dev_attr.attr, + &sensor_dev_attr_temp9_label.dev_attr.attr, + &sensor_dev_attr_temp10_label.dev_attr.attr, + &sensor_dev_attr_temp11_label.dev_attr.attr, + &sensor_dev_attr_temp12_label.dev_attr.attr, + &sensor_dev_attr_temp13_label.dev_attr.attr, + &sensor_dev_attr_temp14_label.dev_attr.attr, + &sensor_dev_attr_temp15_label.dev_attr.attr, + + &sensor_dev_attr_temp1_crit.dev_attr.attr, + &sensor_dev_attr_temp2_crit.dev_attr.attr, + &sensor_dev_attr_temp3_crit.dev_attr.attr, + &sensor_dev_attr_temp4_crit.dev_attr.attr, + &sensor_dev_attr_temp5_crit.dev_attr.attr, + &sensor_dev_attr_temp6_crit.dev_attr.attr, + &sensor_dev_attr_temp7_crit.dev_attr.attr, + &sensor_dev_attr_temp8_crit.dev_attr.attr, + &sensor_dev_attr_temp9_crit.dev_attr.attr, + &sensor_dev_attr_temp10_crit.dev_attr.attr, + &sensor_dev_attr_temp11_crit.dev_attr.attr, + &sensor_dev_attr_temp12_crit.dev_attr.attr, + &sensor_dev_attr_temp13_crit.dev_attr.attr, + &sensor_dev_attr_temp14_crit.dev_attr.attr, + &sensor_dev_attr_temp15_crit.dev_attr.attr, + + &sensor_dev_attr_temp1_max.dev_attr.attr, + &sensor_dev_attr_temp2_max.dev_attr.attr, + &sensor_dev_attr_temp3_max.dev_attr.attr, + &sensor_dev_attr_temp4_max.dev_attr.attr, + &sensor_dev_attr_temp5_max.dev_attr.attr, + &sensor_dev_attr_temp6_max.dev_attr.attr, + &sensor_dev_attr_temp7_max.dev_attr.attr, + &sensor_dev_attr_temp8_max.dev_attr.attr, + &sensor_dev_attr_temp9_max.dev_attr.attr, + &sensor_dev_attr_temp10_max.dev_attr.attr, + &sensor_dev_attr_temp11_max.dev_attr.attr, + &sensor_dev_attr_temp12_max.dev_attr.attr, + &sensor_dev_attr_temp13_max.dev_attr.attr, + &sensor_dev_attr_temp14_max.dev_attr.attr, + &sensor_dev_attr_temp15_max.dev_attr.attr, + + &sensor_dev_attr_temp1_alarm.dev_attr.attr, + &sensor_dev_attr_temp2_alarm.dev_attr.attr, + &sensor_dev_attr_temp3_alarm.dev_attr.attr, + &sensor_dev_attr_temp4_alarm.dev_attr.attr, + &sensor_dev_attr_temp5_alarm.dev_attr.attr, + &sensor_dev_attr_temp6_alarm.dev_attr.attr, + &sensor_dev_attr_temp7_alarm.dev_attr.attr, + &sensor_dev_attr_temp8_alarm.dev_attr.attr, + &sensor_dev_attr_temp9_alarm.dev_attr.attr, + &sensor_dev_attr_temp10_alarm.dev_attr.attr, + &sensor_dev_attr_temp11_alarm.dev_attr.attr, + &sensor_dev_attr_temp12_alarm.dev_attr.attr, + &sensor_dev_attr_temp13_alarm.dev_attr.attr, + &sensor_dev_attr_temp14_alarm.dev_attr.attr, + &sensor_dev_attr_temp15_alarm.dev_attr.attr, + + + NULL +}; + + +static const struct attribute_group smf_tcpu_group = { + .attrs = smf_tcpu_attrs, + .is_visible = smf_tcpu_is_visible, +}; + + +/* PSU ATTR */ +static ssize_t +show_psu_label(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct smf_data *data = dev_get_drvdata(dev); + int nr = to_sensor_dev_attr(attr)->index; + return sprintf(buf, "%s\n", data->psu_label[nr]); +} + + +static ssize_t show_psu(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + struct smf_data *data = dev_get_drvdata(dev); + int ret=0, export_hex=0; + int psu_status=0, pow; + int pow_val = 0; + + switch (index) { + + case 0: + pow = smf_read_reg16(data, PSU_1_MAX_POWER); + if (data->kind == s6100smf) + ret = 1000000 * 1100; + else + ret = 1000000 * 750; + break; + case 1: + ret = smf_read_reg(data, PSU_1_STATUS); + export_hex=1; + break; + case 2: + pow_val = smf_read_reg16(data, PSU_1_INPUT_POWER); + /* In case of absent psu, pow_val will be 0xffff */ + if (pow_val == 0xffff) { + pow_val = 0; + } + ret = 100000 * pow_val; + break; + case 3: + pow_val = smf_read_reg16(data, PSU_1_OUTPUT_POWER); + /* In case of absent psu, pow_val will be 0xffff */ + if (pow_val == 0xffff) { + pow_val = 0; + } + ret = 100000 * pow_val; + break; + case 4: + psu_status = smf_read_reg(data, PSU_1_STATUS); + if (psu_status &(1)) + ret=1; + break; + case 5: + pow = smf_read_reg16(data, PSU_2_MAX_POWER); + ret = 1000000 * pow; + if (data->kind == s6100smf) + ret = 1000000 * 1100; + else + ret = 1000000 * 750; + break; + case 6: + ret = smf_read_reg(data, PSU_2_STATUS); + export_hex=1; + break; + case 7: + pow_val = smf_read_reg16(data, PSU_2_INPUT_POWER); + /* In case of absent psu, pow_val will be 0xffff */ + if (pow_val == 0xffff) { + pow_val = 0; + } + ret = 100000 * pow_val; + break; + case 8: + pow_val = smf_read_reg16(data, PSU_2_OUTPUT_POWER); + /* In case of absent psu, pow_val will be 0xffff */ + if (pow_val == 0xffff) { + pow_val = 0; + } + ret = 100000 * pow_val; + break; + case 9: + psu_status = smf_read_reg(data, PSU_2_STATUS); + if (psu_status &(1)) + ret=1; + break; + case 10: + pow = smf_read_reg16(data, CURRENT_TOTAL_POWER); + /* In case of both psu absent, pow will be 0xffff */ + if (pow == 0xffff) { + pow = 0; + } + ret = pow/10; + break; + default: + return ret; + } + + if (ret < 0) + return ret; + + pow = ret; + + if(export_hex) + return sprintf(buf, "%x\n", pow); + else + return sprintf(buf, "%u\n", pow); +} + +/* FAN and PSU EEPROM PPID format is: + COUNTRY_CODE-PART_NO-MFG_ID-MFG_DATE_CODE-SERIAL_NO-LABEL_REV */ +static ssize_t show_ppid(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + struct smf_data *data = dev_get_drvdata(dev); + char ppid[EEPROM_PPID_SIZE + 1] = {0}; + char psu_mfg_date[EEPROM_MFG_DATE_SIZE + 1] = {0}; + char psu_mfg_date_code[EEPROM_DATE_CODE_SIZE + 1] = {0}; + char temp; + int i, reg, ret = 0, ppid_pos = 0; + + switch(index) { + + /* PPID starts from Country Code*/ + case 0: + reg = FAN_1_SERIAL_CODE; + break; + case 1: + reg = FAN_2_SERIAL_CODE; + break; + case 2: + reg = FAN_3_SERIAL_CODE; + break; + case 3: + reg = FAN_4_SERIAL_CODE; + break; + case 4: + reg = FAN_5_SERIAL_CODE; + break; + case 10: + reg = PSU_1_COUNTRY_CODE; + break; + case 11: + reg = PSU_2_COUNTRY_CODE; + break; + default: + return ret; +} + + // Get Country Code + for( i = 0; i < EEPROM_COUNTRY_CODE_SIZE; i++) { + ppid[ppid_pos++] = (char)smf_read_reg(data,reg++); + } + ppid[ppid_pos++] = '-'; + + // Get Part Number + for( i = 0; i < EEPROM_PART_NO_SIZE; i++) { + ppid[ppid_pos++] = (char)smf_read_reg(data,reg++); + } + ppid[ppid_pos++] = '-'; + + // Get Manufacture ID + for( i = 0; i < EEPROM_MFG_ID_SIZE; i++) { + ppid[ppid_pos++] = (char)smf_read_reg(data,reg++); + } + ppid[ppid_pos++] = '-'; + if(index > 9){ //Applicable only for PSU + // Get Manufacture date + for( i = 0; i < EEPROM_MFG_DATE_SIZE; i++) { + psu_mfg_date[i] = (char)smf_read_reg(data,reg++); + } + + /* Converting 6 digit date code [yymmdd] to 3 digit[ymd] + Year Starting from 2010 [0-9] , Day : 1-9 and A-V , Month : 1-9 and A-C */ + // Year Validation and Conversion + if( ( psu_mfg_date[0] == '1' ) && ( psu_mfg_date[1] >= '0' ) && ( psu_mfg_date[1] <= '9') ) + { + psu_mfg_date_code[0] = psu_mfg_date[1]; + } + else + { + psu_mfg_date_code[0] = ' '; + } + + // Month Validation and Conversion + temp = ( ( psu_mfg_date[2] - 0x30 ) * 10 ) + ( psu_mfg_date[3] - 0x30 ); + if( ( temp >= 1) && ( temp < 10) ) + { + psu_mfg_date_code[1] = temp + 0x30; // 0- 9 + } + else if ( ( temp >= 10) && ( temp <= 12) ) + { + psu_mfg_date_code[1] = temp + 0x37; // A-C + } + else + { + psu_mfg_date_code[1]= ' '; + } + + // Date Validation and Conversion + temp = ( ( psu_mfg_date[4] - 0x30 ) * 10 ) + ( psu_mfg_date[5] - 0x30 ); + if( ( temp >= 1) && ( temp < 10) ) + { + psu_mfg_date_code[2] = temp + 0x30; // 0- 9 + } + else if( ( temp >= 10) && ( temp <= 31) ) + { + psu_mfg_date_code[2] = temp + 0x37; // A-V + } + else + { + psu_mfg_date_code[2] = ' '; + } + for( i = 0; i < EEPROM_DATE_CODE_SIZE; i++) { + ppid[ppid_pos++] = psu_mfg_date_code[i]; + } + }else{ + for( i = 0; i < EEPROM_DATE_CODE_SIZE; i++) { + ppid[ppid_pos++] = (char)smf_read_reg(data,reg++); + } + } + + ppid[ppid_pos++] = '-'; + + // Get Serial Number + for( i = 0; i < EEPROM_SERIAL_NO_SIZE; i++) { + ppid[ppid_pos++] = (char)smf_read_reg(data,reg++); + } + ppid[ppid_pos++] = '-'; + + if(index > 9){ + // Skipping PSU service tag in PPID + reg += EEPROM_SERVICE_TAG_SIZE; + } + else{ + // Skipping FAN partno tag in PPID + reg += EEPROM_PART_NO_SIZE; + } + + // Get Label Revision + for( i = 0; i < EEPROM_LABEL_REV_SIZE; i++) { + ppid[ppid_pos++] = (char)smf_read_reg(data,reg++); + } + + return sprintf(buf, "%s\n",ppid); +} + +static umode_t smf_psu_is_visible(struct kobject *kobj, + struct attribute *a, int n) +{ + struct device *dev = container_of(kobj, struct device, kobj); + struct smf_data *data = dev_get_drvdata(dev); + + if (data->psu_mask & (1 << (n % PSU_MAX))) + return a->mode; + return 0; +} + +/* PSU */ +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_psu, NULL, 2); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_psu, NULL, 3); +static SENSOR_DEVICE_ATTR(power3_input, S_IRUGO, show_psu, NULL, 7); +static SENSOR_DEVICE_ATTR(power4_input, S_IRUGO, show_psu, NULL, 8); + +static SENSOR_DEVICE_ATTR(power1_label, S_IRUGO, show_psu_label, NULL, 0); +static SENSOR_DEVICE_ATTR(power2_label, S_IRUGO, show_psu_label, NULL, 1); +static SENSOR_DEVICE_ATTR(power3_label, S_IRUGO, show_psu_label, NULL, 2); +static SENSOR_DEVICE_ATTR(power4_label, S_IRUGO, show_psu_label, NULL, 3); + +static SENSOR_DEVICE_ATTR(power1_max, S_IRUGO, show_psu, NULL, 0); +static SENSOR_DEVICE_ATTR(power2_max, S_IRUGO, show_psu, NULL, 0); +static SENSOR_DEVICE_ATTR(power3_max, S_IRUGO, show_psu, NULL, 5); +static SENSOR_DEVICE_ATTR(power4_max, S_IRUGO, show_psu, NULL, 5); + + +/* PSU2 */ +//static SENSOR_DEVICE_ATTR(power602_alarm, S_IRUGO, show_psu, NULL, 4); +//static SENSOR_DEVICE_ATTR(power702_alarm, S_IRUGO, show_psu, NULL, 9); + + + +static struct attribute *smf_psu_attrs[] = { + + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_power3_input.dev_attr.attr, + &sensor_dev_attr_power4_input.dev_attr.attr, + + &sensor_dev_attr_power1_label.dev_attr.attr, + &sensor_dev_attr_power2_label.dev_attr.attr, + &sensor_dev_attr_power3_label.dev_attr.attr, + &sensor_dev_attr_power4_label.dev_attr.attr, + + &sensor_dev_attr_power1_max.dev_attr.attr, + &sensor_dev_attr_power2_max.dev_attr.attr, + &sensor_dev_attr_power3_max.dev_attr.attr, + &sensor_dev_attr_power4_max.dev_attr.attr, + + NULL +}; + + +static const struct attribute_group smf_psu_group = { + .attrs = smf_psu_attrs, + .is_visible = smf_psu_is_visible, +}; + + +static const struct attribute_group smf_fanin_group = { + .attrs = smf_fanin_attrs, + .is_visible = smf_fanin_is_visible, +}; + + +static SENSOR_DEVICE_ATTR(fan_tray_presence, S_IRUGO, show_fan, NULL, 12); +static SENSOR_DEVICE_ATTR(fan1_airflow, S_IRUGO, show_fan_airflow, NULL, 0); +static SENSOR_DEVICE_ATTR(fan3_airflow, S_IRUGO, show_fan_airflow, NULL, 1); +static SENSOR_DEVICE_ATTR(fan5_airflow, S_IRUGO, show_fan_airflow, NULL, 2); +static SENSOR_DEVICE_ATTR(fan7_airflow, S_IRUGO, show_fan_airflow, NULL, 3); +static SENSOR_DEVICE_ATTR(fan9_airflow, S_IRUGO, show_fan_airflow, NULL, 4); +static SENSOR_DEVICE_ATTR(fan11_airflow, S_IRUGO, show_psu_fan, NULL, 0); +static SENSOR_DEVICE_ATTR(fan12_airflow, S_IRUGO, show_psu_fan, NULL, 3); +static SENSOR_DEVICE_ATTR(fan1_serialno, S_IRUGO, show_ppid, NULL, 0); +static SENSOR_DEVICE_ATTR(fan3_serialno, S_IRUGO, show_ppid, NULL, 1); +static SENSOR_DEVICE_ATTR(fan5_serialno, S_IRUGO, show_ppid, NULL, 2); +static SENSOR_DEVICE_ATTR(fan7_serialno, S_IRUGO, show_ppid, NULL, 3); +static SENSOR_DEVICE_ATTR(fan9_serialno, S_IRUGO, show_ppid, NULL, 4); +/* IOM status */ +static SENSOR_DEVICE_ATTR(iom_status, S_IRUGO, show_voltage, NULL, 44); +static SENSOR_DEVICE_ATTR(iom_presence, S_IRUGO, show_voltage, NULL, 45); + +static SENSOR_DEVICE_ATTR(psu1_presence, S_IRUGO, show_psu, NULL, 1); +static SENSOR_DEVICE_ATTR(psu2_presence, S_IRUGO, show_psu, NULL, 6); +static SENSOR_DEVICE_ATTR(psu1_serialno, S_IRUGO, show_ppid, NULL, 10); +static SENSOR_DEVICE_ATTR(psu2_serialno, S_IRUGO, show_ppid, NULL, 11); +static SENSOR_DEVICE_ATTR(current_total_power, S_IRUGO, show_psu, NULL, 10); + +/* SMF Version */ +static SENSOR_DEVICE_ATTR(smf_version, S_IRUGO, show_smf_version, NULL, 0); +static SENSOR_DEVICE_ATTR(smf_firmware_ver, S_IRUGO, show_smf_version, NULL, 1); + +/* SMF Reset Reason */ +static SENSOR_DEVICE_ATTR(smf_reset_reason, S_IRUGO, show_reset_reason, NULL, 1); + +/* SMF PowerOn Reason */ +static SENSOR_DEVICE_ATTR(smf_poweron_reason, S_IRUGO, + show_power_on_reason, NULL, 1); + +/* Mailbox Power tracking Reason */ +static SENSOR_DEVICE_ATTR(mb_poweron_reason, S_IRUGO|S_IWUSR, + show_mb_poweron_reason, set_mb_poweron_reason, 0); + +static struct attribute *smf_dell_attrs[] = { + &sensor_dev_attr_smf_version.dev_attr.attr, + &sensor_dev_attr_smf_firmware_ver.dev_attr.attr, + &sensor_dev_attr_smf_reset_reason.dev_attr.attr, + &sensor_dev_attr_smf_poweron_reason.dev_attr.attr, + &sensor_dev_attr_mb_poweron_reason.dev_attr.attr, + &sensor_dev_attr_fan_tray_presence.dev_attr.attr, + &sensor_dev_attr_fan1_airflow.dev_attr.attr, + &sensor_dev_attr_fan3_airflow.dev_attr.attr, + &sensor_dev_attr_fan5_airflow.dev_attr.attr, + &sensor_dev_attr_fan7_airflow.dev_attr.attr, + &sensor_dev_attr_fan9_airflow.dev_attr.attr, + &sensor_dev_attr_fan11_airflow.dev_attr.attr, + &sensor_dev_attr_fan12_airflow.dev_attr.attr, + &sensor_dev_attr_iom_status.dev_attr.attr, + &sensor_dev_attr_iom_presence.dev_attr.attr, + &sensor_dev_attr_psu1_presence.dev_attr.attr, + &sensor_dev_attr_psu2_presence.dev_attr.attr, + &sensor_dev_attr_psu1_serialno.dev_attr.attr, + &sensor_dev_attr_psu2_serialno.dev_attr.attr, + &sensor_dev_attr_fan1_serialno.dev_attr.attr, + &sensor_dev_attr_fan3_serialno.dev_attr.attr, + &sensor_dev_attr_fan5_serialno.dev_attr.attr, + &sensor_dev_attr_fan7_serialno.dev_attr.attr, + &sensor_dev_attr_fan9_serialno.dev_attr.attr, + &sensor_dev_attr_current_total_power.dev_attr.attr, + NULL +}; + +static const struct attribute_group smf_dell_group = { + .attrs = smf_dell_attrs, + .is_visible = smf_dell_is_visible, +}; + + +static const struct attribute_group *smf_groups[] = { + &smf_psu_group, + &smf_fanin_group, + &smf_vsen_group, + &smf_curr_group, + &smf_tcpu_group, + &smf_dell_group, + NULL +}; + + + +static int smf_probe(struct platform_device *pdev) +{ + struct smf_data *data; + struct device *dev = &pdev->dev; + struct smf_sio_data *sio_data = dev_get_platdata(dev); + struct resource *res; + int err = 0; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (!request_region(res->start, IOREGION_LENGTH, + smf_devices[sio_data->kind].name)) { + err = -EBUSY; + dev_err(dev, "Failed to request region 0x%lx-0x%lx\n", + (unsigned long)res->start, + (unsigned long)res->start + IOREGION_LENGTH - 1); + return err; + } + + data = devm_kzalloc(dev, sizeof(struct smf_data), GFP_KERNEL); + /* TODO Use probe address value */ + data->addr = SMF_PROBE_ADDR; + data->kind = sio_data->kind; + + if (!data) + return -ENOMEM; + + mutex_init(&data->lock); + + /* PSU attributes */ + data->psu_mask = smf_devices[data->kind].psu_mask; + data->psu_label = smf_devices[data->kind].psu_label; + + /* FANIN attributes */ + data->fanin_mask = smf_devices[data->kind].fanin_mask; + data->fan_label = smf_devices[data->kind].fan_label; + + /* VSEN attributes */ + data->vsen_mask = smf_devices[data->kind].vsen_mask; + data->vsen_label = smf_devices[data->kind].vsen_label; + + /* CURR attributes */ + data->curr_mask = smf_devices[data->kind].curr_mask; + data->curr_label = smf_devices[data->kind].curr_label; + + /* CPU_TEMP attributes */ + data->tcpu_mask = smf_devices[data->kind].tcpu_mask; + data->temp_label = smf_devices[data->kind].temp_label; + + data->hwmon_dev = devm_hwmon_device_register_with_groups(dev, + smf_devices[data->kind].name, + data, smf_groups); + + return PTR_ERR_OR_ZERO(data->hwmon_dev); +} + + +static int smf_remove(struct platform_device *pdev) +{ + struct resource *res; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + release_region(res->start, IOREGION_LENGTH); + return 0; +} + + +static struct platform_driver smf_driver = { + .driver = { + .name = "SMF", + }, + .probe = smf_probe, + .remove = smf_remove +}; + +int __init +smf_find(int sioaddr, unsigned short *addr, struct smf_sio_data *sio_data) +{ + + int val; + + if (force_id) + val = force_id; + else + val = inb(sioaddr + SIO_REG_DEVID); + + switch (val) { + case SIO_Z9100_ID: + sio_data->kind = z9100smf; + break; + case SIO_S6100_ID: + sio_data->kind = s6100smf; + break; + + default: + if (val != 0xffff) + pr_debug("unsupported chip ID: 0x%04x\n", val); + return -ENODEV; + } + + /* TODO Use define, should this be 0x200 or 0x210??? */ + *addr = sioaddr; + + pr_info("Found %s chip at %#x\n", smf_devices[sio_data->kind].name, *addr); + sio_data->sioreg = sioaddr; + + return (0); +} + + +/* + * when Super-I/O functions move to a separate file, the Super-I/O + * bus will manage the lifetime of the device and this module will only keep + * track of the smf driver. But since we platform_device_alloc(), we + * must keep track of the device + */ +static struct platform_device *pdev; + +static int __init sensors_smf_init(void) +{ + int err; + unsigned short address; + struct resource res; + struct smf_sio_data sio_data; + + /* + * initialize sio_data->kind and sio_data->sioreg. + * when Super-I/O functions move to a separate file, the Super-I/O + * driver will probe and auto-detect the presence of a + * smf hardware monitor, and call probe() + */ + + if (smf_find(SMF_REG_ADDR, &address, &sio_data)) + return -ENODEV; + + err = platform_driver_register(&smf_driver); + if (err) + goto exit; + + pdev = platform_device_alloc(SIO_DRVNAME, address); + if (!pdev) { + err = -ENOMEM; + pr_err("Device allocation failed\n"); + goto exit_unregister; + } + + err = platform_device_add_data(pdev, &sio_data, + sizeof(struct smf_sio_data)); + if (err) { + pr_err("Platform data allocation failed\n"); + goto exit_device_put; + } + + memset(&res, 0, sizeof(res)); + res.name = SIO_DRVNAME; + res.start = address + IOREGION_OFFSET; + res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1; + res.flags = IORESOURCE_IO; + + err = acpi_check_resource_conflict(&res); + if (err) + goto exit_device_put; + + err = platform_device_add_resources(pdev, &res, 1); + if (err) { + pr_err("Device resource addition failed (%d)\n", err); + goto exit_device_put; + } + + /* platform_device_add calls probe() */ + err = platform_device_add(pdev); + if (err) { + pr_err("Device addition failed (%d)\n", err); + goto exit_device_put; + } + + return 0; + +exit_device_put: + platform_device_put(pdev); +exit_unregister: + platform_driver_unregister(&smf_driver); +exit: + return err; +} + + +static void __exit sensors_smf_exit(void) +{ + platform_device_unregister(pdev); + platform_driver_unregister(&smf_driver); + + /*Remove sysfs dell_kobj*/ + kobject_put(dell_kobj); +} + + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("SMF driver"); +MODULE_PARM_DESC(force_id, "Override the detected device ID"); +MODULE_AUTHOR("Per Fremrot "); +MODULE_AUTHOR("Paavaanan "); + +module_init(sensors_smf_init); +module_exit(sensors_smf_exit); diff --git a/platform/broadcom/sonic-platform-modules-dell/common/fw-updater b/platform/broadcom/sonic-platform-modules-dell/common/fw-updater new file mode 100755 index 00000000000..6905664672a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/common/fw-updater @@ -0,0 +1,91 @@ +#!/usr/bin/python + +# dell staging fw updater script + +import os +import sys +import subprocess +import argparse + + +onie_boot_folder = '/mnt/onie-boot/onie/tools/bin/onie-fwpkg' +onie_fwpkg_tool = '/mnt/onie-boot/onie/tools/bin/onie-fwpkg' +ONIE_BOOT_MODE_CMD = '/mnt/onie-boot/onie/tools/bin/onie-boot-mode' +HOST_GRUB_DIR = '/host' +HOST_GRUB_CFG = HOST_GRUB_DIR + '/grub/grub.cfg' +HOST_GRUB_ENV = HOST_GRUB_DIR + '/grub/grubenv' +HOST_GRUB_BOOT_DIR = '--boot-directory=' + HOST_GRUB_DIR +HOST_PLATFORM_INFO = HOST_GRUB_DIR + '/platform' +dell_reload_tool = '/usr/bin/reboot' + + + + +def set_onie_mode(option): + """Select the ONIE boot mode, and set the next_entry to point to ONIE""" + _set_env_option('next_entry', 'ONIE') + subprocess.check_call([ONIE_BOOT_MODE_CMD, '-o', option]) + +def set_onie_fw_update_env(): + """Select the ONIE boot mode, and set the next_entry to point to ONIE""" + + if not os.path.exists(onie_boot_folder): + os.makedirs(onie_boot_folder) + + try: + subprocess.check_call(['mount','/dev/disk/by-label/ONIE-BOOT','/mnt/onie-boot']) + except: + print "onie-boot not able to mount" + +def _set_env_option(option, value): + """Set an option in the GRUB environment block. Pass None to value to + unset the option""" + if value is None: + action = 'unset' + key_value = option + else: + action = 'set' + key_value = '%s=%s' % (option, value) + + subprocess.check_call(['grub-editenv', HOST_GRUB_ENV, action, key_value]) + + +def dell_firmware_update_staging(image_name): + + try: + p = subprocess.Popen([onie_fwpkg_tool,"purge"],stdout=subprocess.PIPE,stdin=subprocess.PIPE) + p.communicate("y") + except: + print "onie-fwpkg command not found for purging old fw updates" + + try: + subprocess.check_call([onie_fwpkg_tool,"add", str(image_name)]) + except: + print "onie-fwpkg is not found to stage fw updates" + + try: + set_onie_mode("update") + except: + print "dell-image command not found" + + try: + subprocess.check_call([dell_reload_tool]) + except: + print "reload command not found" + + +if __name__ == '__main__': + parser = argparse.ArgumentParser(description='Dell HOST Firmware updates') + opts = parser.add_mutually_exclusive_group(required=True) + opts.add_argument('-u', '--update', nargs=1, metavar='IMAGE', + help='update specified image') + + args = parser.parse_args() + + if os.getuid() != 0: + parser.exit(127, 'ERROR: Must be root\n') + + if args.update: + set_onie_fw_update_env() + dell_firmware_update_staging(args.update[0]) + diff --git a/platform/broadcom/sonic-platform-modules-dell/common/io_rd_wr.py b/platform/broadcom/sonic-platform-modules-dell/common/io_rd_wr.py new file mode 100755 index 00000000000..dc9dd09807c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/common/io_rd_wr.py @@ -0,0 +1,93 @@ +#!/usr/bin/python +#Script to read/write the io based registers + +import sys +import os +import getopt +import struct + +io_resource='/dev/port' + +def usage(): + ''' This is the Usage Method ''' + + print 'Utility for IO read/write' + print '\t\t io_rd_wr.py --get --offset ' + print '\t\t io_rd_wr.py --set --val --offset ' + sys.exit(1) + +def io_reg_read(io_resource,offset): + fd=os.open(io_resource, os.O_RDONLY) + if(fd<0): + print 'file open failed %s"%io_resource' + return + if(os.lseek(fd, offset, os.SEEK_SET) != offset): + print 'lseek failed on %s'%io_resource + return + buf=os.read(fd,1) + reg_val1=ord(buf) + print 'reg value %x'%reg_val1 + os.close(fd) + +def io_reg_write(io_resource,offset,val): + fd=os.open(io_resource,os.O_RDWR) + if(fd<0): + print 'file open failed %s"%io_resource' + return + if(os.lseek(fd, offset, os.SEEK_SET) != offset): + print 'lseek failed on %s'%io_resource + return + ret=os.write(fd,struct.pack('B',val)) + if(ret != 1): + print 'write failed %d'%ret + return + os.close(fd) + +def main(argv): + + ''' The main function will read the user input from the + command line argument and process the request ''' + + opts = '' + val = '' + choice = '' + resouce = '' + offset = '' + + try: + opts, args = getopt.getopt(argv, "hgs:" , \ + ["val=","offset=","help", "get", "set"]) + + except getopt.GetoptError: + usage() + + for opt,arg in opts: + + if opt in ('-h','--help'): + choice = 'help' + + elif opt in ('-g', '--get'): + choice = 'get' + + elif opt in ('-s', '--set'): + choice = 'set' + + elif opt == '--offset': + offset = int(arg,16) + + elif opt == '--val': + val = int(arg,16) + + if choice == 'get' and offset != '': + io_reg_read(io_resource,offset) + + elif choice == 'set' and offset != '' and val != '': + io_reg_write(io_resource,offset,val) + + else: + usage() + +#Calling the main method +if __name__ == "__main__": + main(sys.argv[1:]) + diff --git a/platform/broadcom/sonic-platform-modules-dell/common/platform_reboot b/platform/broadcom/sonic-platform-modules-dell/common/platform_reboot new file mode 100755 index 00000000000..3e165630658 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/common/platform_reboot @@ -0,0 +1,25 @@ +#!/usr/bin/python +import sys +import os +import struct + +PORT_RES = '/dev/port' + + +def portio_reg_write(resource, offset, val): + fd = os.open(resource, os.O_RDWR) + if(fd < 0): + print 'file open failed %s" % resource' + return + if(os.lseek(fd, offset, os.SEEK_SET) != offset): + print 'lseek failed on %s' % resource + return + ret = os.write(fd, struct.pack('B', val)) + if(ret != 1): + print 'write failed %d' % ret + return + os.close(fd) + +if __name__ == "__main__": + portio_reg_write(PORT_RES, 0xcf9, 0xe) + diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/changelog b/platform/broadcom/sonic-platform-modules-dell/debian/changelog new file mode 100644 index 00000000000..90fed6f6d84 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/changelog @@ -0,0 +1,11 @@ +sonic-dell-platform-modules (1.1) unstable; urgency=low + + * Add support for Dell S6100 + + -- Dell Team Wed, 08 Feb 2017 15:57:40 -0800 + +sonic-dell-platform-modules (1.0) unstable; urgency=low + + * Initial release + + -- Dell Team Mon, 6 Feb 2017 10:10:10 -0800 diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/compat b/platform/broadcom/sonic-platform-modules-dell/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/control b/platform/broadcom/sonic-platform-modules-dell/debian/control new file mode 100644 index 00000000000..f32fa7244ac --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/control @@ -0,0 +1,36 @@ +Source: sonic-dell-platform-modules +Section: main +Priority: extra +Maintainer: Dell Team +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: platform-modules-s6000 +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-z9100 +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-s6100 +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-z9264f +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-s5232f +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-s5248f +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5232f.init b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5232f.init new file mode 100755 index 00000000000..7a8df5a9e2e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5232f.init @@ -0,0 +1,40 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Z9264f board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + # /usr/local/bin/iom_power_on.sh + /usr/local/bin/s5232f_platform.sh init + + echo "done." + ;; + +stop) + /usr/local/bin/s5232f_platform.sh deinit + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-s5232f.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5232f.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5232f.install new file mode 100644 index 00000000000..b577c5cd5b1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5232f.install @@ -0,0 +1,10 @@ +s5232f/scripts/s5232f_platform.sh usr/local/bin +s5232f/scripts/check_qsfp.sh usr/local/bin +s5232f/scripts/platform_sensors.py usr/local/bin +s5232f/scripts/sensors usr/bin +s5232f/scripts/pcisysfs.py usr/bin +s5232f/scripts/qsfp_irq_enable.py usr/bin +s5232f/cfg/s5232f-modules.conf etc/modules-load.d +s5232f/systemd/platform-modules-s5232f.service etc/systemd/system +common/platform_reboot usr/share/sonic/device/x86_64-dellemc_s5232f_c3538-r0 +common/fw-updater usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5232f.postinst b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5232f.postinst new file mode 100644 index 00000000000..f9b7cd32fe9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5232f.postinst @@ -0,0 +1,10 @@ +# postinst script for S5232f + +# Enable Dell-S5232f-platform-service +depmod -a +systemctl enable platform-modules-s5232f.service +systemctl start platform-modules-s5232f.service + + +#DEBHELPER# + diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5248f.init b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5248f.init new file mode 100755 index 00000000000..0e02b00bc38 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5248f.init @@ -0,0 +1,40 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup S5248f board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + # /usr/local/bin/iom_power_on.sh + /usr/local/bin/s5248f_platform.sh init + + echo "done." + ;; + +stop) + /usr/local/bin/s5248f_platform.sh deinit + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-s5248f.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5248f.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5248f.install new file mode 100644 index 00000000000..7aa27d23b53 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5248f.install @@ -0,0 +1,10 @@ +s5248f/scripts/s5248f_platform.sh usr/local/bin +s5248f/scripts/check_qsfp.sh usr/local/bin +s5248f/scripts/platform_sensors.py usr/local/bin +s5248f/scripts/sensors usr/bin +s5248f/scripts/pcisysfs.py usr/bin +s5248f/scripts/qsfp_irq_enable.py usr/bin +s5248f/cfg/s5248f-modules.conf etc/modules-load.d +s5248f/systemd/platform-modules-s5248f.service etc/systemd/system +common/platform_reboot usr/share/sonic/device/x86_64-dellemc_s5248f_c3538-r0 +common/fw-updater usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5248f.postinst b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5248f.postinst new file mode 100644 index 00000000000..f13e2f70313 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s5248f.postinst @@ -0,0 +1,10 @@ +# postinst script for S5248f + +# Enable Dell-S5248f-platform-service +depmod -a +systemctl enable platform-modules-s5248f.service +systemctl start platform-modules-s5248f.service + + +#DEBHELPER# + diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6000.init b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6000.init new file mode 100755 index 00000000000..94bddb6afe2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6000.init @@ -0,0 +1,39 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup S6000 board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + /usr/local/bin/s6000_platform.sh init + + echo "done." + ;; + +stop) + /usr/local/bin/s6000_platform.sh deinit + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-s6000.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6000.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6000.install new file mode 100644 index 00000000000..c2dcb5dc03a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6000.install @@ -0,0 +1,6 @@ +s6000/scripts/s6000_platform.sh usr/local/bin +s6000/scripts/reset-qsfp usr/local/bin +s6000/scripts/set-fan-speed usr/local/bin +s6000/systemd/platform-modules-s6000.service etc/systemd/system +common/io_rd_wr.py usr/local/bin +s6000/modules/sonic_platform-1.0-py2-none-any.whl usr/share/sonic/device/x86_64-dell_s6000_s1220-r0 diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6000.postinst b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6000.postinst new file mode 100644 index 00000000000..a9b90fa86f3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6000.postinst @@ -0,0 +1,7 @@ +# postinst script for S6000 + +# Enable Dell-S6000-platform-service +depmod -a +systemctl enable platform-modules-s6000.service +systemctl start platform-modules-s6000.service +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.init b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.init new file mode 100755 index 00000000000..c798b24ef23 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.init @@ -0,0 +1,40 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup S6100 board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + /usr/local/bin/iom_power_on.sh + /usr/local/bin/s6100_platform.sh init + + echo "done." + ;; + +stop) + /usr/local/bin/s6100_platform.sh deinit + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-s6100.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install new file mode 100644 index 00000000000..5d1cb6341fc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.install @@ -0,0 +1,16 @@ +s6100/scripts/iom_power_*.sh usr/local/bin +s6100/scripts/s6100_platform.sh usr/local/bin +common/dell_i2c_utils.sh usr/local/bin +common/io_rd_wr.py usr/local/bin +s6100/scripts/platform_reboot_override usr/share/sonic/device/x86_64-dell_s6100_c2538-r0 +s6100/scripts/override.conf /etc/systemd/system/systemd-reboot.service.d +common/dell_lpc_mon.sh usr/local/bin +s6100/scripts/platform_sensors.py usr/local/bin +s6100/modules/sonic_platform-1.0-py2-none-any.whl usr/share/sonic/device/x86_64-dell_s6100_c2538-r0 +s6100/scripts/platform_watchdog_enable.sh usr/local/bin +s6100/scripts/platform_watchdog_disable.sh usr/local/bin +s6100/scripts/sensors usr/bin +s6100/systemd/platform-modules-s6100.service etc/systemd/system +s6100/systemd/s6100-lpc-monitor.service etc/systemd/system +tools/flashrom/flashrom usr/local/bin/ +common/fw-updater usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.postinst b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.postinst new file mode 100644 index 00000000000..eda8f7c8a41 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s6100.postinst @@ -0,0 +1,11 @@ +# postinst script for S6100 + +# Enable Dell-S6100-platform-service +depmod -a +systemctl enable platform-modules-s6100.service +systemctl start platform-modules-s6100.service + +systemctl enable s6100-lpc-monitor.service +systemctl start s6100-lpc-monitor.service + +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.init b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.init new file mode 100755 index 00000000000..aefecf1d815 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.init @@ -0,0 +1,40 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Z9100 board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + # /usr/local/bin/iom_power_on.sh + /usr/local/bin/z9100_platform.sh init + + echo "done." + ;; + +stop) + /usr/local/bin/z9100_platform.sh deinit + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-z9100.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install new file mode 100644 index 00000000000..5c5c4cc55be --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.install @@ -0,0 +1,14 @@ +z9100/scripts/check_qsfp.sh usr/local/bin +z9100/scripts/z9100_platform.sh usr/local/bin +common/dell_i2c_utils.sh usr/local/bin +common/dell_lpc_mon.sh usr/local/bin +common/io_rd_wr.py usr/local/bin +z9100/scripts/platform_reboot_override usr/share/sonic/device/x86_64-dell_z9100_c2538-r0 +z9100/scripts/override.conf /etc/systemd/system/systemd-reboot.service.d +z9100/scripts/platform_sensors.py usr/local/bin +z9100/scripts/sensors usr/bin +z9100/modules/sonic_platform-1.0-py2-none-any.whl usr/share/sonic/device/x86_64-dell_z9100_c2538-r0 +z9100/cfg/z9100-modules.conf etc/modules-load.d +z9100/systemd/platform-modules-z9100.service etc/systemd/system +z9100/systemd/z9100-lpc-monitor.service etc/systemd/system +common/fw-updater usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.postinst b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.postinst new file mode 100644 index 00000000000..77750fe626a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9100.postinst @@ -0,0 +1,12 @@ +# postinst script for Z9100 + +# Enable Dell-Z9100-platform-service +depmod -a +systemctl enable platform-modules-z9100.service +systemctl start platform-modules-z9100.service + + +systemctl enable z9100-lpc-monitor.service +systemctl start z9100-lpc-monitor.service + +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.init b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.init new file mode 100755 index 00000000000..fb0b6811797 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.init @@ -0,0 +1,40 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Z9264f board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + # /usr/local/bin/iom_power_on.sh + /usr/local/bin/z9264f_platform.sh init + + echo "done." + ;; + +stop) + /usr/local/bin/z9264f_platform.sh deinit + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-z9264f.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.install new file mode 100644 index 00000000000..29e8b1df2e3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.install @@ -0,0 +1,10 @@ +z9264f/scripts/z9264f_platform.sh usr/local/bin +z9264f/scripts/check_qsfp.sh usr/local/bin +z9264f/scripts/platform_sensors.py usr/local/bin +z9264f/scripts/sensors usr/bin +z9264f/scripts/pcisysfs.py usr/bin +z9264f/scripts/qsfp_irq_enable.py usr/bin +z9264f/cfg/z9264f-modules.conf etc/modules-load.d +z9264f/systemd/platform-modules-z9264f.service etc/systemd/system +common/platform_reboot usr/share/sonic/device/x86_64-dellemc_z9264f_c3538-r0 +common/fw-updater usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.postinst b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.postinst new file mode 100644 index 00000000000..f5da0a81890 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9264f.postinst @@ -0,0 +1,10 @@ +# postinst script for Z9264f + +# Enable Dell-Z9264f-platform-service +depmod -a +systemctl enable platform-modules-z9264f.service +systemctl start platform-modules-z9264f.service + + +#DEBHELPER# + diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/rules b/platform/broadcom/sonic-platform-modules-dell/debian/rules new file mode 100755 index 00000000000..a7f68a21f55 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/rules @@ -0,0 +1,73 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= s6000 z9100 s6100 z9264f s5232f s5248f +COMMON_DIR := common + +%: + dh $@ + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + if [ $$mod = "s6100" ]; then \ + cp $(COMMON_DIR)/dell_pmc.c $(MOD_SRC_DIR)/$${mod}/modules/dell_s6100_lpc.c; \ + cp $(COMMON_DIR)/dell_ich.c $(MOD_SRC_DIR)/$${mod}/modules/dell_ich.c; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python2.7 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \ + cd $(MOD_SRC_DIR); \ + elif [ $$mod = "z9100" ]; then \ + cp $(COMMON_DIR)/dell_pmc.c $(MOD_SRC_DIR)/$${mod}/modules/dell_mailbox.c; \ + cp $(COMMON_DIR)/dell_ich.c $(MOD_SRC_DIR)/$${mod}/modules/dell_ich.c; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python2.7 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \ + cd $(MOD_SRC_DIR); \ + elif [ $$mod = "s6000" ]; then \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python2.7 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \ + cd $(MOD_SRC_DIR); \ + fi; \ + echo "making man page alias $$mod -> $$mod APIs";\ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -pplatform-modules-$${mod} \ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/modules/*.ko \ + debian/platform-modules-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + if [ $$mod = "s6000" ]; then \ + dh_installdirs -pplatform-modules-$${mod} usr/local/bin ; \ + cp -r $(MOD_SRC_DIR)/$${mod}/scripts/* debian/platform-modules-$${mod}/usr/local/bin; \ + fi; \ + done) + +override_dh_usrlocal: + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + if [ $$mod = "s6100" ]; then \ + rm -f $(MOD_SRC_DIR)/$${mod}/modules/dell_s6100_lpc.c; \ + rm -f $(MOD_SRC_DIR)/$${mod}/modules/dell_ich.c; \ + rm -f $(MOD_SRC_DIR)/$${mod}/modules/*.whl; \ + rm -rf $(MOD_SRC_DIR)/$${mod}/build; \ + rm -rf $(MOD_SRC_DIR)/$${mod}/build/*.egg-info; \ + elif [ $$mod = "z9100" ]; then \ + rm -f $(MOD_SRC_DIR)/$${mod}/modules/dell_mailbox.c; \ + rm -f $(MOD_SRC_DIR)/$${mod}/modules/dell_ich.c; \ + rm -f $(MOD_SRC_DIR)/$${mod}/modules/*.whl; \ + rm -rf $(MOD_SRC_DIR)/$${mod}/build; \ + rm -rf $(MOD_SRC_DIR)/$${mod}/build/*.egg-info; \ + elif [ $$mod = "s6000" ]; then \ + rm -f $(MOD_SRC_DIR)/$${mod}/modules/*.whl; \ + rm -rf $(MOD_SRC_DIR)/$${mod}/build; \ + rm -rf $(MOD_SRC_DIR)/$${mod}/build/*.egg-info; \ + fi; \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) + diff --git a/platform/broadcom/sonic-platform-modules-dell/s5232f/cfg/s5232f-modules.conf b/platform/broadcom/sonic-platform-modules-dell/s5232f/cfg/s5232f-modules.conf new file mode 100644 index 00000000000..950162b45f4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5232f/cfg/s5232f-modules.conf @@ -0,0 +1,19 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-gpio +i2c-mux-pca954x + +ipmi_devintf +ipmi_si +dell_s5232f_fpga_ocores +i2c_ocores diff --git a/platform/broadcom/sonic-platform-modules-dell/s5232f/modules/Makefile b/platform/broadcom/sonic-platform-modules-dell/s5232f/modules/Makefile new file mode 100644 index 00000000000..2aa771f3df1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5232f/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := dell_s5232f_fpga_ocores.o + diff --git a/platform/broadcom/sonic-platform-modules-dell/s5232f/modules/dell_s5232f_fpga_ocores.c b/platform/broadcom/sonic-platform-modules-dell/s5232f/modules/dell_s5232f_fpga_ocores.c new file mode 100644 index 00000000000..f66f5f18a70 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5232f/modules/dell_s5232f_fpga_ocores.c @@ -0,0 +1,1622 @@ +/* + * Copyright (C) 2018 Dell Inc + * + * Licensed under the GNU General Public License Version 2 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +/********************************************************************** + * @file fpga_ocores.c + * @brief This is a driver to interface with Linux Open Cores driver for FPGA i2c access + * + ************************************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include //siginfo +#include //rcu_read_lock +#include //kernel_version +#include +#include +#include +#include +#include + + +void __iomem * fpga_base_addr = NULL; +void __iomem * fpga_ctl_addr = NULL; + +#define DRIVER_NAME "fpgapci" +#define PCI_NUM_BARS 4 + +#ifdef DEBUG +# define PRINT(fmt, ...) printk(fmt, ##__VA_ARGS__) +#else +# define PRINT(fmt, ...) +#endif + +/* Maximum size of driver buffer (allocated with kalloc()). + * Needed to copy data from user to kernel space, among other + * things. */ +static const size_t BUF_SIZE = PAGE_SIZE; + +/* Device data used by this driver. */ +struct fpgapci_dev { + /* the kernel pci device data structure */ + struct pci_dev *pci_dev; + + /* upstream root node */ + struct pci_dev *upstream; + + /* kernels virtual addr. for the mapped BARs */ + void * __iomem bar[PCI_NUM_BARS]; + + /* length of each memory region. Used for error checking. */ + size_t bar_length[PCI_NUM_BARS]; + + /* Debug data */ + /* number of hw interrupts handled. */ + int num_handled_interrupts; + int num_undelivered_signals; + int pci_gen; + int pci_num_lanes; + + unsigned int irq_first; + unsigned int irq_length; + unsigned int irq_assigned; + unsigned int xcvr_intr_count; + +}; + +static int use_irq = 1; +module_param(use_irq, int, 0644); +MODULE_PARM_DESC(use_irq, "Get an use_irq value from user...\n"); + +static uint32_t num_bus = 0; +module_param(num_bus, int, 0); +MODULE_PARM_DESC(num_bus, + "Number of i2c busses supported by the FPGA on this platform."); + + +/* Xilinx FPGA PCIE info: */ +/* Non-VGA unclassified device: Xilinx Corporation Device 7021*/ +/* Subsystem: Xilinx Corporation Device 0007 */ +//#define VENDOR 0x10EE +#define DEVICE 0x7021 +static phys_addr_t fpga_phys_addr; + +typedef signed char s8; +typedef unsigned char u8; + +typedef signed short s16; +typedef unsigned short u16; + +typedef signed int s32; +typedef unsigned int u32; + +typedef signed long long s64; +typedef unsigned long long u64; + + +/* struct to hold data related to the pcie device */ +struct pci_data_struct{ + struct pci_dev* dev; + unsigned long long phy_addr_bar0; + unsigned long long phy_len_bar0; + unsigned long long phy_flags_bar0; + unsigned int irq_first; + unsigned int irq_length; + unsigned int irq_assigned; + void * kvirt_addr_bar0; +}; + +/* global variable declarations */ + +/* Static function declarations */ +static int fpgapci_probe(struct pci_dev *dev, const struct pci_device_id *id); +static void fpgapci_remove(struct pci_dev *dev); + +static int scan_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev); +static int map_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev); +static void free_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev); + + +struct fpgalogic_i2c { + void __iomem *base; + u32 reg_shift; + u32 reg_io_width; + wait_queue_head_t wait; + struct i2c_msg *msg; + int pos; + int nmsgs; + int state; /* see STATE_ */ + int ip_clock_khz; + int bus_clock_khz; + void (*reg_set)(struct fpgalogic_i2c *i2c, int reg, u8 value); + u8 (*reg_get)(struct fpgalogic_i2c *i2c, int reg); + u32 timeout; + struct mutex lock; +}; +/* registers */ +#define FPGAI2C_REG_PRELOW 0 +#define FPGAI2C_REG_PREHIGH 1 +#define FPGAI2C_REG_CONTROL 2 +#define FPGAI2C_REG_DATA 3 +#define FPGAI2C_REG_CMD 4 /* write only */ +#define FPGAI2C_REG_STATUS 4 /* read only, same address as FPGAI2C_REG_CMD */ +#define FPGAI2C_REG_VER 5 + + + +#define FPGAI2C_REG_CTRL_IEN 0x40 +#define FPGAI2C_REG_CTRL_EN 0x80 + +#define FPGAI2C_REG_CMD_START 0x91 +#define FPGAI2C_REG_CMD_STOP 0x41 +#define FPGAI2C_REG_CMD_READ 0x21 +#define FPGAI2C_REG_CMD_WRITE 0x11 +#define FPGAI2C_REG_CMD_READ_ACK 0x21 +#define FPGAI2C_REG_CMD_READ_NACK 0x29 +#define FPGAI2C_REG_CMD_IACK 0x01 + +#define FPGAI2C_REG_STAT_IF 0x01 +#define FPGAI2C_REG_STAT_TIP 0x02 +#define FPGAI2C_REG_STAT_ARBLOST 0x20 +#define FPGAI2C_REG_STAT_BUSY 0x40 +#define FPGAI2C_REG_STAT_NACK 0x80 + +/* SR[7:0] - Status register */ +#define FPGAI2C_REG_SR_RXACK (1 << 7) /* Receive acknowledge from slave �1� = No acknowledge received*/ +#define FPGAI2C_REG_SR_BUSY (1 << 6) /* Busy, I2C bus busy (as defined by start / stop bits) */ +#define FPGAI2C_REG_SR_AL (1 << 5) /* Arbitration lost - fpga i2c logic lost arbitration */ +#define FPGAI2C_REG_SR_TIP (1 << 1) /* Transfer in progress */ +#define FPGAI2C_REG_SR_IF (1 << 0) /* Interrupt flag */ + +enum { + STATE_DONE = 0, + STATE_INIT, + STATE_ADDR, + STATE_ADDR10, + STATE_START, + STATE_WRITE, + STATE_READ, + STATE_ERROR, +}; + +#define TYPE_FPGALOGIC 0 +#define TYPE_GRLIB 1 + +/*I2C_CH1 Offset address from PCIE BAR 0*/ +#define FPGALOGIC_I2C_BASE 0x00006000 +#define FPGALOGIC_CH_OFFSET 0x10 + +#define i2c_bus_controller_numb 1 +#define I2C_PCI_MAX_BUS (16) +#define I2C_PCI_MAX_BUS_REV00 (7) +#define DELL_I2C_CLOCK_LEGACY 0 +#define DELL_I2C_CLOCK_PRESERVE (~0U) +#define I2C_PCI_BUS_NUM_5 5 +#define I2C_PCI_BUS_NUM_7 7 +#define I2C_PCI_BUS_NUM_8 8 +#define I2C_PCI_BUS_NUM_10 10 +#define I2C_PCI_BUS_NUM_12 12 +#define I2C_PCI_BUS_NUM_16 16 + +#define IRQ_LTCH_STS 0x20 +#define PRSNT_LTCH_STS 0x10 + +#define PORT_CTRL_OFFSET 0x4000 +#define PORT_STS_OFFSET 0x4004 +#define PORT_IRQ_STS_OFFSET 0x4008 +#define PORT_IRQ_EN_OFFSET 0x400C +#define MB_BRD_REV_TYPE 0x0008 +#define MB_BRD_REV_MASK 0x00f0 +#define MB_BRD_REV_00 0x0000 +#define MB_BRD_REV_01 0x0010 +#define MB_BRD_REV_02 0x0020 +#define MB_BRD_REV_03 0x0030 +#define MB_BRD_TYPE_MASK 0x000f +#define BRD_TYPE_Z9232_NON_NEBS 0x0 +#define BRD_TYPE_Z9232_NEBS 0x1 +#define BRD_TYPE_Z9264_NON_NEBS 0x2 +#define BRD_TYPE_Z9264_NEBS 0x3 +#define BRD_TYPE_S5212_NON_NEBS 0x4 +#define BRD_TYPE_S5212_NEBS 0x5 +#define BRD_TYPE_S5224_NON_NEBS 0x6 +#define BRD_TYPE_S5224_NEBS 0x7 +#define BRD_TYPE_S5248_NON_NEBS 0x8 +#define BRD_TYPE_S5248_NEBS 0x9 +#define BRD_TYPE_S5296_NON_NEBS 0xa +#define BRD_TYPE_S5296_NEBS 0xb +#define BRD_TYPE_S5232_NON_NEBS 0xc +#define BRD_TYPE_S5232_NEBS 0xd + +#define FPGA_CTL_REG_SIZE 0x6000 +#define MSI_VECTOR_MAP_MASK 0x1f +#define MSI_VECTOR_MAP1 0x58 +#define I2C_CH1_MSI_MAP_VECT_8 0x00000008 +#define I2C_CH2_MSI_MAP_VECT_9 0x00000120 +#define I2C_CH3_MSI_MAP_VECT_10 0x00002800 +#define I2C_CH4_MSI_MAP_VECT_11 0x00058000 +#define I2C_CH5_MSI_MAP_VECT_12 0x00c00000 +#define I2C_CH6_MSI_MAP_VECT_13 0x15000000 +#define MSI_VECTOR_MAP2 0x5c +#define I2C_CH7_MSI_MAP_VECT_14 0x0000000e +#define MSI_VECTOR_MAP3 0x9c +#define I2C_CH8_MSI_MAP_VECT_8 0x00800000 +#define I2C_CH8_MSI_MAP_VECT_16 0x01100000 +#define I2C_CH9_MSI_MAP_VECT_9 0x12000000 +#define I2C_CH9_MSI_MAP_VECT_17 0x24000000 +#define MSI_VECTOR_MAP4 0xa0 +#define I2C_CH10_MSI_MAP_VECT_10 0x0000000a +#define I2C_CH10_MSI_MAP_VECT_18 0x00000012 +#define I2C_CH11_MSI_MAP_VECT_11 0x00000120 +#define I2C_CH11_MSI_MAP_VECT_19 0x00000260 +#define I2C_CH12_MSI_MAP_VECT_12 0x00002800 +#define I2C_CH12_MSI_MAP_VECT_20 0x00005000 +#define I2C_CH13_MSI_MAP_VECT_13 0x00058000 +#define I2C_CH13_MSI_MAP_VECT_21 0x000a8000 +#define I2C_CH14_MSI_MAP_VECT_14 0x00c00000 +#define I2C_CH14_MSI_MAP_VECT_22 0x01600000 +#define I2C_CH15_MSI_MAP_VECT_8 0x10000000 +#define I2C_CH15_MSI_MAP_VECT_23 0x2e000000 +#define MSI_VECTOR_MAP5 0xa4 +#define I2C_CH16_MSI_MAP_VECT_9 0x00000009 +#define I2C_CH16_MSI_MAP_VECT_24 0x00000018 + +#define MSI_VECTOR_REV_00 16 +#define MSI_VECTOR_REV_01 32 + +#define FPGA_MSI_VECTOR_ID_4 4 +#define FPGA_MSI_VECTOR_ID_5 5 +#define FPGA_MSI_VECTOR_ID_8 8 +#define FPGA_MSI_VECTOR_ID_9 9 +#define FPGA_MSI_VECTOR_ID_10 10 +#define FPGA_MSI_VECTOR_ID_11 11 +#define FPGA_MSI_VECTOR_ID_12 12 +#define FPGA_MSI_VECTOR_ID_13 13 +#define FPGA_MSI_VECTOR_ID_14 14 +#define FPGA_MSI_VECTOR_ID_15 15 /*Note: this is external MSI vector id */ +#define FPGA_MSI_VECTOR_ID_16 16 +#define FPGA_MSI_VECTOR_ID_17 17 +#define FPGA_MSI_VECTOR_ID_18 18 +#define FPGA_MSI_VECTOR_ID_19 19 +#define FPGA_MSI_VECTOR_ID_20 20 +#define FPGA_MSI_VECTOR_ID_21 21 +#define FPGA_MSI_VECTOR_ID_22 22 +#define FPGA_MSI_VECTOR_ID_23 23 +#define FPGA_MSI_VECTOR_ID_24 24 + + + +static int total_i2c_pci_bus = 0; +static uint32_t board_rev_type = 0; +static struct fpgalogic_i2c fpgalogic_i2c[I2C_PCI_MAX_BUS]; +static struct i2c_adapter i2c_pci_adap[I2C_PCI_MAX_BUS]; +static struct mutex i2c_xfer_lock[I2C_PCI_MAX_BUS]; + +static void fpgai2c_reg_set_8(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite8(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void fpgai2c_reg_set_16(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite16(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void fpgai2c_reg_set_32(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite32(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void fpgai2c_reg_set_16be(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite16be(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void fpgai2c_reg_set_32be(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite32be(value, i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_8(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread8(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_16(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread16(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_32(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread32(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_16be(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread16be(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_32be(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread32be(i2c->base + (reg << i2c->reg_shift)); +} + +static inline void fpgai2c_reg_set(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + i2c->reg_set(i2c, reg, value); + udelay(100); +} + +static inline u8 fpgai2c_reg_get(struct fpgalogic_i2c *i2c, int reg) +{ + udelay(100); + return i2c->reg_get(i2c, reg); +} + +static void fpgai2c_dump(struct fpgalogic_i2c *i2c) +{ + u8 tmp; + + PRINT("Logic register dump:\n"); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_PRELOW); + PRINT("FPGAI2C_REG_PRELOW (%d) = 0x%x\n",FPGAI2C_REG_PRELOW,tmp); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_PREHIGH); + PRINT("FPGAI2C_REG_PREHIGH(%d) = 0x%x\n",FPGAI2C_REG_PREHIGH,tmp); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_CONTROL); + PRINT("FPGAI2C_REG_CONTROL(%d) = 0x%x\n",FPGAI2C_REG_CONTROL,tmp); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_DATA); + PRINT("FPGAI2C_REG_DATA (%d) = 0x%x\n",FPGAI2C_REG_DATA,tmp); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_CMD); + PRINT("FPGAI2C_REG_CMD (%d) = 0x%x\n",FPGAI2C_REG_CMD,tmp); +} + +static void fpgai2c_stop(struct fpgalogic_i2c *i2c) +{ + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP); +} + +/* + * dell_get_mutex must be called prior to calling this function. + */ +static int fpgai2c_poll(struct fpgalogic_i2c *i2c) +{ + u8 stat = fpgai2c_reg_get(i2c, FPGAI2C_REG_STATUS); + struct i2c_msg *msg = i2c->msg; + u8 addr; + + /* Ready? */ + if (stat & FPGAI2C_REG_STAT_TIP) + return -EBUSY; + + if (i2c->state == STATE_DONE || i2c->state == STATE_ERROR) { + /* Stop has been sent */ + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK); + if (i2c->state == STATE_ERROR) + return -EIO; + return 0; + } + + /* Error? */ + if (stat & FPGAI2C_REG_STAT_ARBLOST) { + i2c->state = STATE_ERROR; + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP); + return -EAGAIN; + } + + if (i2c->state == STATE_INIT) { + if (stat & FPGAI2C_REG_STAT_BUSY) + return -EBUSY; + + i2c->state = STATE_ADDR; + } + + if (i2c->state == STATE_ADDR) { + /* 10 bit address? */ + if (i2c->msg->flags & I2C_M_TEN) { + addr = 0xf0 | ((i2c->msg->addr >> 7) & 0x6); + i2c->state = STATE_ADDR10; + } else { + addr = (i2c->msg->addr << 1); + i2c->state = STATE_START; + } + + /* Set read bit if necessary */ + addr |= (i2c->msg->flags & I2C_M_RD) ? 1 : 0; + + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, addr); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_START); + + return 0; + } + + /* Second part of 10 bit addressing */ + if (i2c->state == STATE_ADDR10) { + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, i2c->msg->addr & 0xff); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_WRITE); + + i2c->state = STATE_START; + return 0; + } + + if (i2c->state == STATE_START || i2c->state == STATE_WRITE) { + i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; + + if (stat & FPGAI2C_REG_STAT_NACK) { + i2c->state = STATE_ERROR; + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP); + return -ENXIO; + } + } else { + msg->buf[i2c->pos++] = fpgai2c_reg_get(i2c, FPGAI2C_REG_DATA); + } + + if (i2c->pos >= msg->len) { + i2c->nmsgs--; + i2c->msg++; + i2c->pos = 0; + msg = i2c->msg; + + if (i2c->nmsgs) { + if (!(msg->flags & I2C_M_NOSTART)) { + i2c->state = STATE_ADDR; + return 0; + } else { + i2c->state = (msg->flags & I2C_M_RD) + ? STATE_READ : STATE_WRITE; + } + } else { + i2c->state = STATE_DONE; + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP); + return 0; + } + } + + if (i2c->state == STATE_READ) { + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, i2c->pos == (msg->len - 1) ? + FPGAI2C_REG_CMD_READ_NACK : FPGAI2C_REG_CMD_READ_ACK); + } else { + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, msg->buf[i2c->pos++]); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_WRITE); + } + + return 0; +} + +static ssize_t get_mod_msi(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ind = 0, port_status=0, port_irq_status=0; + struct fpgapci_dev *fpgapci = (struct fpgapci_dev*) dev_get_drvdata(dev); + PRINT("%s:xcvr_intr_count:%u\n", __FUNCTION__, fpgapci->xcvr_intr_count); + for(ind=0;ind<64;ind++) + { + port_status = ioread32(fpga_ctl_addr + PORT_STS_OFFSET + (ind*16)); + port_irq_status = ioread32(fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + PRINT("%s:port:%d, port_status:%#x, port_irq_status:%#x\n", __FUNCTION__, ind, port_status, port_irq_status); + } + return sprintf(buf,"0x%04x\n",fpgapci->xcvr_intr_count); +} +static DEVICE_ATTR(port_msi, S_IRUGO, get_mod_msi, NULL); + +static struct attribute *port_attrs[] = { + &dev_attr_port_msi.attr, + NULL, +}; + +static struct attribute_group port_attr_grp = { + .attrs = port_attrs, +}; + + +static irqreturn_t fpgaport_1_32_isr(int irq, void *dev) +{ + struct pci_dev *pdev = dev; + struct fpgapci_dev *fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&pdev->dev); + int ind = 0, port_status=0, port_irq_status=0; + for(ind=0;ind<32;ind++) + { + port_irq_status = ioread32(fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + if(port_irq_status&(IRQ_LTCH_STS|PRSNT_LTCH_STS)) + { + PRINT("%s:port:%d, port_status:%#x, port_irq_status:%#x\n", __FUNCTION__, ind, port_status, port_irq_status); + //write on clear + iowrite32( IRQ_LTCH_STS|PRSNT_LTCH_STS,fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + } + } + fpgapci->xcvr_intr_count++; + PRINT("%s: xcvr_intr_count:%u\n", __FUNCTION__, fpgapci->xcvr_intr_count); + sysfs_notify(&pdev->dev.kobj, NULL, "port_msi"); + return IRQ_HANDLED; +} + +static irqreturn_t fpgaport_33_64_isr(int irq, void *dev) +{ + struct pci_dev *pdev = dev; + struct fpgapci_dev *fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&pdev->dev); + int ind = 0, port_status=0, port_irq_status=0; + for(ind=32;ind<64;ind++) + { + port_irq_status = ioread32(fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + if(port_irq_status| (IRQ_LTCH_STS|PRSNT_LTCH_STS)) + { + PRINT("%s:port:%d, port_status:%#x, port_irq_status:%#x\n", __FUNCTION__, ind, port_status, port_irq_status); + //write on clear + iowrite32( IRQ_LTCH_STS|PRSNT_LTCH_STS,fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + } + } + fpgapci->xcvr_intr_count++; + PRINT("%s: xcvr_intr_count:%u\n", __FUNCTION__, fpgapci->xcvr_intr_count); + sysfs_notify(&pdev->dev.kobj, NULL, "port_msi"); + return IRQ_HANDLED; +} + +static void fpgai2c_process(struct fpgalogic_i2c *i2c) +{ + struct i2c_msg *msg = i2c->msg; + u8 stat = fpgai2c_reg_get(i2c, FPGAI2C_REG_STATUS); + + PRINT("fpgai2c_process in. status reg :0x%x\n", stat); + + if ((i2c->state == STATE_DONE) || (i2c->state == STATE_ERROR)) { + /* stop has been sent */ + PRINT("fpgai2c_process FPGAI2C_REG_CMD_IACK stat = 0x%x Set FPGAI2C_REG_CMD(0%x) FPGAI2C_REG_CMD_IACK = 0x%x\n",stat, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK); + wake_up(&i2c->wait); + return; + } + + + /* error? */ + if (stat & FPGAI2C_REG_STAT_ARBLOST) { + i2c->state = STATE_ERROR; + PRINT("fpgai2c_process FPGAI2C_REG_STAT_ARBLOST FPGAI2C_REG_CMD_STOP\n"); + fpgai2c_stop(i2c); + return; + } + + if ((i2c->state == STATE_START) || (i2c->state == STATE_WRITE)) { + i2c->state = + (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; + + if (stat & FPGAI2C_REG_STAT_NACK) { + i2c->state = STATE_ERROR; + fpgai2c_stop(i2c); + return; + } + } else + { + msg->buf[i2c->pos++] = fpgai2c_reg_get(i2c, FPGAI2C_REG_DATA); + } + + /* end of msg? */ + if (i2c->pos == msg->len) { + i2c->nmsgs--; + i2c->msg++; + i2c->pos = 0; + msg = i2c->msg; + + if (i2c->nmsgs) { /* end? */ + /* send start? */ + if (!(msg->flags & I2C_M_NOSTART)) { + + u8 addr = (msg->addr << 1); + + if (msg->flags & I2C_M_RD) + addr |= 1; + + i2c->state = STATE_START; + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, addr); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_START); + return; + } else + { + i2c->state = (msg->flags & I2C_M_RD) + ? STATE_READ : STATE_WRITE; + } + } else { + i2c->state = STATE_DONE; + fpgai2c_stop(i2c); + return; + } + } + + if (i2c->state == STATE_READ) { + PRINT("fpgai2c_poll STATE_READ i2c->pos=%d msg->len-1 = 0x%x set FPGAI2C_REG_CMD = 0x%x\n",i2c->pos, msg->len-1, + i2c->pos == (msg->len-1) ? FPGAI2C_REG_CMD_READ_NACK : FPGAI2C_REG_CMD_READ_ACK); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, i2c->pos == (msg->len-1) ? + FPGAI2C_REG_CMD_READ_NACK : FPGAI2C_REG_CMD_READ_ACK); + } else { + PRINT("fpgai2c_process set FPGAI2C_REG_DATA(0x%x)\n",FPGAI2C_REG_DATA); + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, msg->buf[i2c->pos++]); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_WRITE); + } +} + +static irqreturn_t fpgai2c_isr(int irq, void *dev_id) +{ + struct fpgalogic_i2c *i2c = dev_id; + fpgai2c_process(i2c); + + return IRQ_HANDLED; +} +void dell_get_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_lock(&i2c->lock); +} + +/** + * dell_release_mutex - release mutex + */ +void dell_release_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_unlock(&i2c->lock); +} + +static int fpgai2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) +{ + struct fpgalogic_i2c *i2c = i2c_get_adapdata(adap); + int ret; + unsigned long timeout = jiffies + msecs_to_jiffies(1000); + + i2c->msg = msgs; + i2c->pos = 0; + i2c->nmsgs = num; + i2c->state = (use_irq == 1) ? STATE_START : STATE_INIT; + + PRINT("i2c->msg->addr = 0x%x i2c->msg->flags = 0x%x\n",i2c->msg->addr,i2c->msg->flags); + PRINT("I2C_M_RD = 0x%x i2c->msg->addr << 1 = 0x%x\n",I2C_M_RD,i2c->msg->addr << 1); + + if (!use_irq) { + /* Handle the transfer */ + while (time_before(jiffies, timeout)) { + dell_get_mutex(i2c); + ret = fpgai2c_poll(i2c); + dell_release_mutex(i2c); + + if (i2c->state == STATE_DONE || i2c->state == STATE_ERROR) + return (i2c->state == STATE_DONE) ? num : ret; + + if (ret == 0) + timeout = jiffies + HZ; + + usleep_range(5, 15); + } + + i2c->state = STATE_ERROR; + + return -ETIMEDOUT; + + + } else { + PRINT("Set FPGAI2C_REG_DATA(0%x) val = 0x%x\n",FPGAI2C_REG_DATA, + (i2c->msg->addr << 1) | ((i2c->msg->flags & I2C_M_RD) ? 1:0)); + + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, + (i2c->msg->addr << 1) | + ((i2c->msg->flags & I2C_M_RD) ? 1:0)); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_START); + + /* Interrupt mode */ + if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) || + (i2c->state == STATE_DONE), HZ)) + return (i2c->state == STATE_DONE) ? num : -EIO; + else + return -ETIMEDOUT; + } +} + +static int fpgai2c_init(struct fpgalogic_i2c *i2c) +{ + int prescale; + int diff; + u8 ctrl; + + if (i2c->reg_io_width == 0) + i2c->reg_io_width = 1; /* Set to default value */ + + if (!i2c->reg_set || !i2c->reg_get) { + bool be = 0; //1:big_endian 0:little_endian + + switch (i2c->reg_io_width) { + case 1: + i2c->reg_set = fpgai2c_reg_set_8; + i2c->reg_get = fpgai2c_reg_get_8; + break; + + case 2: + i2c->reg_set = be ? fpgai2c_reg_set_16be : fpgai2c_reg_set_16; + i2c->reg_get = be ? fpgai2c_reg_get_16be : fpgai2c_reg_get_16; + break; + + case 4: + i2c->reg_set = be ? fpgai2c_reg_set_32be : fpgai2c_reg_set_32; + i2c->reg_get = be ? fpgai2c_reg_get_32be : fpgai2c_reg_get_32; + break; + + default: + PRINT("Unsupported I/O width (%d)\n", + i2c->reg_io_width); + return -EINVAL; + } + } + + ctrl = fpgai2c_reg_get(i2c, FPGAI2C_REG_CONTROL); + + PRINT("%s(), line:%d\n", __func__, __LINE__); + PRINT("i2c->base = 0x%p\n",i2c->base); + + PRINT("ctrl = 0x%x\n",ctrl); + PRINT("set ctrl = 0x%x\n",ctrl & ~(FPGAI2C_REG_CTRL_EN|FPGAI2C_REG_CTRL_IEN)); + + /* make sure the device is disabled */ + fpgai2c_reg_set(i2c, FPGAI2C_REG_CONTROL, ctrl & ~(FPGAI2C_REG_CTRL_EN|FPGAI2C_REG_CTRL_IEN)); + + /* + * I2C Frequency depends on host clock + * input clock of 100MHz + * prescale to 100MHz / ( 5*100kHz) -1 = 199 = 0x4F 100000/(5*100)-1=199=0xc7 + */ + prescale = (i2c->ip_clock_khz / (5 * i2c->bus_clock_khz)) - 1; + prescale = clamp(prescale, 0, 0xffff); + + diff = i2c->ip_clock_khz / (5 * (prescale + 1)) - i2c->bus_clock_khz; + if (abs(diff) > i2c->bus_clock_khz / 10) { + PRINT("Unsupported clock settings: core: %d KHz, bus: %d KHz\n", + i2c->ip_clock_khz, i2c->bus_clock_khz); + return -EINVAL; + } + + fpgai2c_reg_set(i2c, FPGAI2C_REG_PRELOW, prescale & 0xff); + fpgai2c_reg_set(i2c, FPGAI2C_REG_PREHIGH, prescale >> 8); + + /* Init the device */ + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK); + if (!use_irq) + fpgai2c_reg_set(i2c, FPGAI2C_REG_CONTROL, ctrl | FPGAI2C_REG_CTRL_EN); + else + fpgai2c_reg_set(i2c, FPGAI2C_REG_CONTROL, ctrl | FPGAI2C_REG_CTRL_IEN | FPGAI2C_REG_CTRL_EN); + + fpgai2c_dump(i2c); + + /* Initialize interrupt handlers if not already done */ + init_waitqueue_head(&i2c->wait); + + return 0; +} + + +static u32 fpgai2c_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm fpgai2c_algorithm = { + .master_xfer = fpgai2c_xfer, + .functionality = fpgai2c_func, +}; + +static int i2c_pci_add_bus (struct i2c_adapter *adap) +{ + int ret = 0; + /* Register new adapter */ + adap->algo = &fpgai2c_algorithm; + ret = i2c_add_numbered_adapter(adap); + return ret; +} + +static int i2c_init_internal_data(void) +{ + int i; + PRINT("%s(), line:%d\n", __func__, __LINE__); + + for( i = 0; i < total_i2c_pci_bus; i++ ) + { + fpgalogic_i2c[i].reg_shift = 0; /* 8 bit registers */ + fpgalogic_i2c[i].reg_io_width = 1; /* 8 bit read/write */ + fpgalogic_i2c[i].timeout = 500;//1000;//1ms + fpgalogic_i2c[i].ip_clock_khz = 100000;//100000;/* input clock of 100MHz */ + fpgalogic_i2c[i].bus_clock_khz = 100; + fpgalogic_i2c[i].base = fpga_base_addr + i*FPGALOGIC_CH_OFFSET; + mutex_init(&fpgalogic_i2c[i].lock); + fpgai2c_init(&fpgalogic_i2c[i]); + } + + return 0; +} + + +static int i2c_pci_init (void) +{ + int i; + + if (num_bus == 0) { + board_rev_type = ioread32(fpga_ctl_addr + MB_BRD_REV_TYPE); + + if ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_00) { + num_bus = I2C_PCI_MAX_BUS_REV00; + } else if (((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_01) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_02) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_03)) { + switch (board_rev_type & MB_BRD_TYPE_MASK){ + case BRD_TYPE_S5212_NON_NEBS: + case BRD_TYPE_S5212_NEBS: + num_bus = I2C_PCI_BUS_NUM_5; + break; + case BRD_TYPE_S5224_NON_NEBS: + case BRD_TYPE_S5224_NEBS: + num_bus = I2C_PCI_BUS_NUM_7; + break; + case BRD_TYPE_Z9232_NON_NEBS: + case BRD_TYPE_Z9232_NEBS: + case BRD_TYPE_S5232_NON_NEBS: + case BRD_TYPE_S5232_NEBS: + num_bus = I2C_PCI_BUS_NUM_8; + break; + case BRD_TYPE_S5248_NON_NEBS: + case BRD_TYPE_S5248_NEBS: + num_bus = I2C_PCI_BUS_NUM_10; + break; + case BRD_TYPE_Z9264_NON_NEBS: + case BRD_TYPE_Z9264_NEBS: + num_bus = I2C_PCI_BUS_NUM_12; + break; + case BRD_TYPE_S5296_NON_NEBS: + case BRD_TYPE_S5296_NEBS: + num_bus = I2C_PCI_BUS_NUM_16; + break; + default: + num_bus = I2C_PCI_BUS_NUM_16; + printk("Wrong BRD_TYPE: 0x%x\n", board_rev_type); + break; + } + } else { + printk("Wrong board_rev_type 0x%x\n", board_rev_type); + } + } + + printk("board_rev_type 0x%x, num_bus 0x%x\n", board_rev_type, num_bus); + total_i2c_pci_bus = num_bus; + + memset (&i2c_pci_adap, 0, sizeof(i2c_pci_adap)); + memset (&fpgalogic_i2c, 0, sizeof(fpgalogic_i2c)); + for(i=0; i < i2c_bus_controller_numb; i++) + mutex_init(&i2c_xfer_lock[i]); + + /* Initialize driver's itnernal data structures */ + i2c_init_internal_data(); + + for (i = 0 ; i < total_i2c_pci_bus; i ++) { + + i2c_pci_adap[i].owner = THIS_MODULE; + i2c_pci_adap[i].class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + + i2c_pci_adap[i].algo_data = &fpgalogic_i2c[i]; + /* /dev/i2c-600 ~ /dev/i2c-615 for FPGA LOGIC I2C channel controller 1-7 */ + i2c_pci_adap[i].nr = i+600; + sprintf( i2c_pci_adap[ i ].name, "i2c-pci-%d", i ); + /* Add the bus via the algorithm code */ + if( i2c_pci_add_bus( &i2c_pci_adap[ i ] ) != 0 ) + { + PRINT("Cannot add bus %d to algorithm layer\n", i ); + return( -ENODEV ); + } + i2c_set_adapdata(&i2c_pci_adap[i], &fpgalogic_i2c[i]); + + PRINT( "Registered bus id: %s\n", kobject_name(&i2c_pci_adap[ i ].dev.kobj)); + } + + return 0; +} + +static void i2c_pci_deinit(void) +{ + int i; + for( i = 0; i < total_i2c_pci_bus; i++ ){ + i2c_del_adapter(&i2c_pci_adap[i]); + } + +} + +/* Find upstream PCIe root node. + * Used for re-training and disabling AER. */ +static struct pci_dev* find_upstream_dev (struct pci_dev *dev) +{ + struct pci_bus *bus = 0; + struct pci_dev *bridge = 0; + struct pci_dev *cur = 0; + int found_dev = 0; + + bus = dev->bus; + if (bus == 0) { + PRINT ( "Device doesn't have an associated bus!\n"); + return 0; + } + + bridge = bus->self; + if (bridge == 0) { + PRINT ( "Can't get the bridge for the bus!\n"); + return 0; + } + + PRINT ( "Upstream device %x/%x, bus:slot.func %02x:%02x.%02x\n", + bridge->vendor, bridge->device, + bridge->bus->number, PCI_SLOT(bridge->devfn), PCI_FUNC(bridge->devfn)); + + PRINT ( "List of downstream devices:"); + list_for_each_entry (cur, &bus->devices, bus_list) { + if (cur != 0) { + PRINT ( " %x/%x", cur->vendor, cur->device); + if (cur == dev) { + found_dev = 1; + } + } + } + PRINT ( "\n"); + if (found_dev) { + return bridge; + } else { + PRINT ( "Couldn't find upstream device!\n"); + return 0; + } +} + + +static int scan_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev) +{ + int i; + + for (i = 0; i < PCI_NUM_BARS; i++) { + unsigned long bar_start = pci_resource_start(dev, i); + if (bar_start) { + unsigned long bar_end = pci_resource_end(dev, i); + unsigned long bar_flags = pci_resource_flags(dev, i); + PRINT ( "BAR[%d] 0x%08lx-0x%08lx flags 0x%08lx", + i, bar_start, bar_end, bar_flags); + } + } + + return 0; +} + + +/** + * Map the device memory regions into kernel virtual address space + * after verifying their sizes respect the minimum sizes needed, given + * by the bar_min_len[] array. + */ +static int map_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev) +{ + int i; + + for (i = 0; i < PCI_NUM_BARS; i++){ + phys_addr_t bar_start = pci_resource_start(dev, i); + phys_addr_t bar_end = pci_resource_end(dev, i); + unsigned long bar_length = bar_end - bar_start + 1; + fpgapci->bar_length[i] = bar_length; + + + if (!bar_start || !bar_end) { + fpgapci->bar_length[i] = 0; + continue; + } + + if (bar_length < 1) { + PRINT ( "BAR #%d length is less than 1 byte\n", i); + continue; + } + + PRINT ( "bar_start=%llx, bar_end=%llx, bar_length=%lx, flag=%lx\n", bar_start, + bar_end, bar_length, pci_resource_flags(dev, i)); + + /* map the device memory or IO region into kernel virtual + * address space */ + fpgapci->bar[i] = ioremap_nocache (bar_start + FPGALOGIC_I2C_BASE, I2C_PCI_MAX_BUS * FPGALOGIC_CH_OFFSET); + + if (!fpgapci->bar[i]) { + PRINT ( "Could not map BAR #%d.\n", i); + return -1; + } + + PRINT ( "BAR[%d] mapped at 0x%p with length %lu.", i, + fpgapci->bar[i], bar_length); + + if(i == 0) //FPGA register is in the BAR[0] + { + + fpga_phys_addr = bar_start; + fpga_ctl_addr = ioremap_nocache (bar_start, FPGA_CTL_REG_SIZE); + fpga_base_addr = fpgapci->bar[i]; + } + + PRINT ( "BAR[%d] mapped at 0x%p with length %lu.\n", i, + fpgapci->bar[i], bar_length); + } + return 0; +} + +static void free_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev) +{ + int i; + + for (i = 0; i < PCI_NUM_BARS; i++) { + if (fpgapci->bar[i]) { + pci_iounmap(dev, fpgapci->bar[i]); + fpgapci->bar[i] = NULL; + } + } +} + +#define FPGA_PCI_NAME "FPGA_PCI" + +/** + * @brief Register specific function with msi interrupt line + * @param dev Pointer to pci-device, which should be allocated + * @param int interrupt number relative to global interrupt number + * @return Returns error code or zero if success + * */ +static int register_intr_handler(struct pci_dev *dev, int irq_num_id) +{ + int err = 0; + struct fpgapci_dev *fpgapci = 0; + + fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&dev->dev); + if (fpgapci == 0) { + PRINT ( ": fpgapci_dev is 0\n"); + return err; + } + + if ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_00) { + /* Request interrupt line for unique function + * alternatively function will be called from free_irq as well + * with flag IRQF_SHARED */ + switch(irq_num_id) { + /* Currently we only support test vector 2 for FPGA Logic I2C channel + * controller 1-7 interrupt*/ + case FPGA_MSI_VECTOR_ID_4: + err = request_irq(dev->irq + irq_num_id, fpgaport_1_32_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, dev); + PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_5: + err = request_irq(dev->irq + irq_num_id, fpgaport_33_64_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, dev); + PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_8: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[0]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_9: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[1]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_10: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[2]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_11: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[3]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_12: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[4]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_13: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[5]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_14: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[6]); + fpgapci->irq_assigned++; + break; + + default: + PRINT("No more interrupt handler for number (%d)\n", + dev->irq + irq_num_id); + break; + } + } else if (((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_01) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_02) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_03)) { + /* FPGA SPEC 4.3.1.34, First i2c channel mapped to vector 8 */ + switch (irq_num_id) { + case FPGA_MSI_VECTOR_ID_4: + err = request_irq(dev->irq + irq_num_id, fpgaport_1_32_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, dev); + PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_5: + err = request_irq(dev->irq + irq_num_id, fpgaport_33_64_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, dev); + PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_8: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[0]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_9: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[1]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_10: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[2]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_11: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[3]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_12: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[4]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_13: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_5) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[5]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_14: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_5) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[6]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_15: + /*it is an external interrupt number. Ignore this case */ + break; + case FPGA_MSI_VECTOR_ID_16: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_7) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[7]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_17: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_8) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[8]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_18: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_8) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[9]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_19: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_10) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[10]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_20: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_10) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[11]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_21: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[12]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_22: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[13]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_23: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[14]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_24: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[15]); + fpgapci->irq_assigned++; + } + break; + + default: + PRINT("No more interrupt handler for number (%d)\n", + dev->irq + irq_num_id); + break; + } + } + + return err; +} +/* Mask for MSI Multi message enable bits */ +#define MSI_MME 0x70 +/** + * These enums define the type of interrupt scheme that the overall + * system uses. + */ +enum fpga_irq_type { + INT_MSI_SINGLE, + INT_MSI_MULTI, + INT_MSIX, + INT_NONE, + INT_FENCE /* Last item to guard from loop run-overs */ +}; +/** + * @def PCI_DEVICE_STATUS + * define the offset for STS register + * from the start of PCI config space as specified in the + * NVME_Comliance 1.0b. offset 06h:STS - Device status. + * This register has error status for NVME PCI Exress + * Card. After reading data from this reagister, the driver + * will identify if any error is set during the operation and + * report as kernel alert message. + */ +#define PCI_DEVICE_STATUS 0x6 +/** + * @def NEXT_MASK + * This indicates the location of the next capability item + * in the list. + */ +#define NEXT_MASK 0xFF00 +/** + * @def MSIXCAP_ID + * This bit indicates if the pointer leading to this position + * is a capability. + */ +#define MSIXCAP_ID 0x11 +/** + * @def MSICAP_ID + * This bit indicates if the pointer leading to this position + * is a capability. + */ +#define MSICAP_ID 0x5 + +/** + * @def CL_MASK + * This bit position indicates Capabilities List of the controller + * The controller should support the PCI Power Management cap as a + * minimum. + */ +#define CL_MASK 0x0010 + +/** + * @def CAP_REG + * Set to offset defined in NVME Spec 1.0b. + */ +#define CAP_REG 0x34 +static void msi_set_enable(struct pci_dev *dev, int enable) +{ + int pos,maxvec; + u16 control; + int request_private_bits = 4; + + pos = pci_find_capability(dev, PCI_CAP_ID_MSI); + + if (pos) { + pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); + maxvec = 1 << ((control & PCI_MSI_FLAGS_QMASK) >> 1); + PRINT("control = 0x%x maxvec = 0x%x\n", control, maxvec); + control &= ~PCI_MSI_FLAGS_ENABLE; + + + /* + * The PCI 2.3 spec mandates that there are at most 32 + * interrupts. If this device asks for more, only give it one. + */ + if (request_private_bits > 5) { + request_private_bits = 0; + } + + /* Update the number of IRQs the device has available to it */ + control &= ~PCI_MSI_FLAGS_QSIZE; + control |= (request_private_bits << 4); + + pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control); + } +} +/** + * @brief Enables pcie-device and claims/remaps neccessary bar resources + * @param dev Pointer to pci-device, which should be allocated + * @return Returns error code or zero if success + * */ +static int fpgapci_setup_device(struct fpgapci_dev *fpgapci,struct pci_dev *dev) +{ + int err = 0; + + /* wake up the pci device */ + err = pci_enable_device(dev); + if(err) { + PRINT("failed to enable pci device %d\n", err); + goto error_pci_en; + } + + /* on platforms with buggy ACPI, pdev->msi_enabled may be set to + * allow pci_enable_device to work. This indicates INTx was not routed + * and only MSI should be used + */ + + pci_set_master(dev); + + /* Setup the BAR memory regions */ + err = pci_request_regions(dev, DRIVER_NAME); + if (err) { + PRINT("failed to enable pci device %d\n", err); + goto error_pci_req; + } + + scan_bars(fpgapci, dev); + + if (map_bars(fpgapci, dev)) { + goto fail_map_bars; + } + + i2c_pci_init(); + + return 0; + /* ERROR HANDLING */ +fail_map_bars: + pci_release_regions(dev); +error_pci_req: + pci_disable_device(dev); +error_pci_en: + return -ENODEV; +} + +static int fpgapci_configure_msi(struct fpgapci_dev *fpgapci,struct pci_dev *dev) +{ + int err = 0, i; + int request_vec; + + msi_set_enable(dev,1); + PRINT("Check MSI capability after msi_set_enable\n"); + + + /*Above 4.1.12*/ + request_vec = total_i2c_pci_bus; + err = pci_alloc_irq_vectors(dev, request_vec, pci_msi_vec_count(dev), + PCI_IRQ_MSI);//PCI_IRQ_AFFINITY | PCI_IRQ_MSI); + + if (err <= 0) { + PRINT("Cannot set MSI vector (%d)\n", err); + goto error_no_msi; + } else { + PRINT("Got %d MSI vectors starting at %d\n", err, dev->irq); + if ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_00) { + if (err < MSI_VECTOR_REV_00) { + goto error_disable_msi; + } + } else if (((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_01) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_02) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_03)) { + if (err < MSI_VECTOR_REV_01) { + goto error_disable_msi; + } + } + } + fpgapci->irq_first = dev->irq; + fpgapci->irq_length = err; + fpgapci->irq_assigned = 0; + + + for(i = 0; i < fpgapci->irq_length; i++) { + err = register_intr_handler(dev, i); + if (err) { + PRINT("Cannot request Interrupt number %d\n", i); + goto error_pci_req_irq; + } + } + + return 0; + +error_pci_req_irq: + for(i = 0; i < fpgapci->irq_assigned; i++) + { + PRINT("free_irq %d i =%d\n",fpgapci->irq_first + i,i); + if (i < 7) + free_irq(fpgapci->irq_first + 8 + i, &fpgalogic_i2c[i]); + else + free_irq(fpgapci->irq_first + 8 + i + 1, &fpgalogic_i2c[i]); + } +error_disable_msi: + pci_disable_msi(fpgapci->pci_dev); +error_no_msi: + return -ENOSPC; +} + +static int fpgapci_probe(struct pci_dev *dev, const struct pci_device_id *id) +{ + struct fpgapci_dev *fpgapci = 0; + int status = 0; + +#ifdef TEST + PRINT ( " vendor = 0x%x, device = 0x%x, class = 0x%x, bus:slot.func = %02x:%02x.%02x\n", + dev->vendor, dev->device, dev->class, + dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); +#endif + fpgapci = kzalloc(sizeof(struct fpgapci_dev), GFP_KERNEL); + + if (!fpgapci) { + PRINT( "Couldn't allocate memory!\n"); + goto fail_kzalloc; + } + + fpgapci->pci_dev = dev; + dev_set_drvdata(&dev->dev, (void*)fpgapci); + + fpgapci->upstream = find_upstream_dev (dev); + status = sysfs_create_group(&dev->dev.kobj, &port_attr_grp); + if (status) { + printk(KERN_INFO "%s:Cannot create sysfs\n", __FUNCTION__); + } + + if(fpgapci_setup_device(fpgapci,dev)) { + goto error_no_device; + } + + if (use_irq) { + if(fpgapci_configure_msi(fpgapci,dev)) { + goto error_cannot_configure; + } + } + + + return 0; + /* ERROR HANDLING */ +error_cannot_configure: + printk("error_cannot_configure\n"); + free_bars (fpgapci, dev); + pci_release_regions(dev); + pci_disable_device(dev); +error_no_device: + i2c_pci_deinit(); + printk("error_no_device\n"); +fail_kzalloc: + return -1; + + +} + +static void fpgapci_remove(struct pci_dev *dev) +{ + struct fpgapci_dev *fpgapci = 0; + int i; + PRINT (": dev is %p\n", dev); + + if (dev == 0) { + PRINT ( ": dev is 0\n"); + return; + } + + fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&dev->dev); + if (fpgapci == 0) { + PRINT ( ": fpgapci_dev is 0\n"); + return; + } + i2c_pci_deinit(); + // + if (use_irq) + { + for(i = 0; i < fpgapci->irq_assigned; i++) + { + PRINT("free_irq %d i =%d\n",fpgapci->irq_first + i,i); + if (i < 7) + free_irq(fpgapci->irq_first + 8 + i, &fpgalogic_i2c[i]); + else + free_irq(fpgapci->irq_first + 8 + i + 1, &fpgalogic_i2c[i]); + } + } + pci_disable_msi(fpgapci->pci_dev); + free_bars (fpgapci, dev); + pci_disable_device(dev); + pci_release_regions(dev); + + kfree (fpgapci); +} + +static const struct pci_device_id fpgapci_ids[] = { + {PCI_DEVICE(PCI_VENDOR_ID_XILINX, DEVICE)}, + {0, }, +}; + +MODULE_DEVICE_TABLE(pci, fpgapci_ids); + +static struct pci_driver fpgapci_driver = { + .name = DRIVER_NAME, + .id_table = fpgapci_ids, + .probe = fpgapci_probe, + .remove = fpgapci_remove, + /* resume, suspend are optional */ +}; + +/* Initialize the driver module (but not any device) and register + * the module with the kernel PCI subsystem. */ +static int __init fpgapci_init(void) +{ + + if (pci_register_driver(&fpgapci_driver)) { + PRINT("pci_unregister_driver\n"); + pci_unregister_driver(&fpgapci_driver); + return -ENODEV; + } + + return 0; +} + +static void __exit fpgapci_exit(void) +{ + PRINT ("fpgapci_exit"); + + /* unregister this driver from the PCI bus driver */ + pci_unregister_driver(&fpgapci_driver); + +} + + +module_init (fpgapci_init); +module_exit (fpgapci_exit); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("joyce_yu@dell.com"); +MODULE_DESCRIPTION ("Driver for FPGA Logic I2C bus"); +MODULE_SUPPORTED_DEVICE ("FPGA Logic I2C bus"); diff --git a/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/check_qsfp.sh b/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/check_qsfp.sh new file mode 100755 index 00000000000..ebf2b600ddd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/check_qsfp.sh @@ -0,0 +1,3 @@ +# Temporary dummy file for s5232f. +# Will be updated soon. + diff --git a/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/pcisysfs.py b/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/pcisysfs.py new file mode 100755 index 00000000000..047618e057c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/pcisysfs.py @@ -0,0 +1,102 @@ +#!/usr/bin/python +# Copyright (c) 2015 Dell Inc. +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. + +import struct +import sys +import getopt +from os import * +from mmap import * + +def usage(): + ''' This is the Usage Method ''' + + print '\t\t pcisysfs.py --get --offset --res ' + print '\t\t pcisysfs.py --set --val --offset --res ' + sys.exit(1) + +def pci_mem_read(mm,offset): + mm.seek(offset) + read_data_stream=mm.read(4) + print "" + reg_val=struct.unpack('I',read_data_stream) + print "reg_val read:%x"%reg_val + return reg_val + +def pci_mem_write(mm,offset,data): + mm.seek(offset) + print "data to write:%x"%data + mm.write(struct.pack('I',data)) + +def pci_set_value(resource,val,offset): + fd=open(resource,O_RDWR) + mm=mmap(fd,0) + pci_mem_write(mm,offset,val) + +def pci_get_value(resource,offset): + fd=open(resource,O_RDWR) + mm=mmap(fd,0) + pci_mem_read(mm,offset) + +def main(argv): + + ''' The main function will read the user input from the + command line argument and process the request ''' + + opts = '' + val = '' + choice = '' + resource = '' + offset = '' + + try: + opts, args = getopt.getopt(argv, "hgsv:" , \ + ["val=","res=","offset=","help", "get", "set"]) + + except getopt.GetoptError: + usage() + + for opt,arg in opts: + + if opt in ('-h','--help'): + choice = 'help' + + elif opt in ('-g', '--get'): + choice = 'get' + + elif opt in ('-s', '--set'): + choice = 'set' + + elif opt == '--res': + resource = arg + + elif opt == '--val': + val = int(arg,16) + + elif opt == '--offset': + offset = int(arg,16) + + if choice == 'set' and val != '' and offset !='' and resource !='': + pci_set_value(resource,val,offset) + + elif choice == 'get' and offset != '' and resource !='': + pci_get_value(resource,offset) + + else: + usage() + +#Calling the main method +if __name__ == "__main__": + main(sys.argv[1:]) + diff --git a/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/platform_sensors.py new file mode 100755 index 00000000000..3091d1c9ed4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/platform_sensors.py @@ -0,0 +1,248 @@ +#!/usr/bin/python +# On S5232F, the BaseBoard Management Controller is an +# autonomous subsystem provides monitoring and management +# facility independent of the host CPU. IPMI standard +# protocol is used with ipmitool to fetch sensor details. +# Current script support X00 board only. X01 support will +# be added soon. This provies support for the +# following objects: +# * Onboard temperature sensors +# * FAN trays +# * PSU + + +import os +import sys +import logging +import subprocess +import commands + +S5232F_MAX_FAN_TRAYS = 4 +S5232F_MAX_PSUS = 2 +IPMI_SENSOR_DATA = "ipmitool sdr list" +IPMI_SENSOR_DUMP = "/tmp/sdr" + +FAN_PRESENCE = "FAN{0}_prsnt" +PSU_PRESENCE = "PSU{0}_stat" +# Use this for older firmware +# PSU_PRESENCE="PSU{0}_prsnt" + +ipmi_sdr_list = "" + +# Dump sensor registers + + +def ipmi_sensor_dump(): + + status = 1 + global ipmi_sdr_list + ipmi_cmd = IPMI_SENSOR_DATA + status, ipmi_sdr_list = commands.getstatusoutput(ipmi_cmd) + + if status: + logging.error('Failed to execute:' + ipmi_sdr_list) + sys.exit(0) + +# Fetch a BMC register + + +def get_pmc_register(reg_name): + + output = None + for item in ipmi_sdr_list.split("\n"): + if reg_name in item: + output = item.strip() + + if output is None: + print('\nFailed to fetch: ' + reg_name + ' sensor ') + sys.exit(0) + + output = output.split('|')[1] + + logging.basicConfig(level=logging.DEBUG) + return output + + +# Print the information for temperature sensors + + +def print_temperature_sensors(): + + print("\nOnboard Temperature Sensors:") + + print ' PT_Left_temp: ',\ + (get_pmc_register('PT_Left_temp')) + print ' PT_Mid_temp: ',\ + (get_pmc_register('PT_Mid_temp')) + print ' PT_Right_temp: ',\ + (get_pmc_register('PT_Right_temp')) + print ' Broadcom Temp: ',\ + (get_pmc_register('NPU_Near_temp')) + print ' Inlet Airflow Temp: ',\ + (get_pmc_register('ILET_AF_temp')) + print ' CPU Temp: ',\ + (get_pmc_register('CPU_temp')) + +ipmi_sensor_dump() + +print_temperature_sensors() + +# Print the information for 1 Fan Tray + + +def print_fan_tray(tray): + + Fan_Status = [' Normal', ' Abnormal'] + Airflow_Direction = ['B2F', 'F2B'] + + print ' Fan Tray ' + str(tray) + ':' + + if (tray == 1): + + fan1_status = int(get_pmc_register('FAN1_Front_stat'), 16) + fan2_status = int(get_pmc_register('FAN1_Rear_stat'), 16) + + print ' Fan1 Speed: ',\ + get_pmc_register('FAN1_Front_rpm') + print ' Fan2 Speed: ',\ + get_pmc_register('FAN1_Rear_rpm') + print ' Fan1 State: ',\ + Fan_Status[fan1_status] + print ' Fan2 State: ',\ + Fan_Status[fan2_status] + + elif (tray == 2): + + fan1_status = int(get_pmc_register('FAN2_Front_stat'), 16) + fan2_status = int(get_pmc_register('FAN2_Rear_stat'), 16) + + print ' Fan1 Speed: ',\ + get_pmc_register('FAN2_Front_rpm') + print ' Fan2 Speed: ',\ + get_pmc_register('FAN2_Rear_rpm') + print ' Fan1 State: ',\ + Fan_Status[fan1_status] + print ' Fan2 State: ',\ + Fan_Status[fan2_status] + + elif (tray == 3): + + fan1_status = int(get_pmc_register('FAN3_Front_stat'), 16) + fan2_status = int(get_pmc_register('FAN3_Rear_stat'), 16) + + print ' Fan1 Speed: ',\ + get_pmc_register('FAN3_Front_rpm') + print ' Fan2 Speed: ',\ + get_pmc_register('FAN3_Rear_rpm') + print ' Fan1 State: ',\ + Fan_Status[fan1_status] + print ' Fan2 State: ',\ + Fan_Status[fan2_status] + + elif (tray == 4): + + fan1_status = int(get_pmc_register('FAN4_Front_stat'), 16) + fan2_status = int(get_pmc_register('FAN4_Rear_stat'), 16) + + print ' Fan1 Speed: ',\ + get_pmc_register('FAN4_Front_rpm') + print ' Fan2 Speed: ',\ + get_pmc_register('FAN4_Rear_rpm') + print ' Fan1 State: ',\ + Fan_Status[fan1_status] + print ' Fan2 State: ',\ + Fan_Status[fan2_status] + + +print('\nFan Trays:') + +for tray in range(1, S5232F_MAX_FAN_TRAYS + 1): + fan_presence = FAN_PRESENCE.format(tray) + if (get_pmc_register(fan_presence)): + print_fan_tray(tray) + else: + print '\n Fan Tray ' + str(tray + 1) + ': Not present' + + +# Print the information for PSU1, PSU2 +def print_psu(psu): + Psu_Type = ['Normal', 'Mismatch'] + Psu_Input_Type = ['AC', 'DC'] + PSU_STATUS_TYPE_BIT = 4 + PSU_STATUS_INPUT_TYPE_BIT = 1 + PSU_FAN_PRESENT_BIT = 2 + PSU_FAN_STATUS_BIT = 1 + PSU_FAN_AIR_FLOW_BIT = 0 + Psu_Fan_Presence = ['Present', 'Absent'] + Psu_Fan_Status = ['Normal', 'Abnormal'] + Psu_Fan_Airflow = ['B2F', 'F2B'] + + # print ' Input: ', Psu_Input_Type[psu_input_type] + # print ' Type: ', Psu_Type[psu_type] + + # PSU FAN details + if (psu == 1): + + # psu1_fan_status = int(get_pmc_register('PSU1_status'),16) + + print ' PSU1:' + print ' FAN Normal Temperature: ',\ + get_pmc_register('PSU1_temp') + print ' FAN AirFlow Temperature: ',\ + get_pmc_register('PSU1_AF_temp') + print ' FAN RPM: ',\ + get_pmc_register('PSU1_rpm') + # print ' FAN Status: ', Psu_Fan_Status[psu1_fan_status] + + # PSU input & output monitors + print ' Input Voltage: ',\ + get_pmc_register('PSU1_In_volt') + print ' Output Voltage: ',\ + get_pmc_register('PSU1_Out_volt') + print ' Input Power: ',\ + get_pmc_register('PSU1_In_watt') + print ' Output Power: ',\ + get_pmc_register('PSU1_Out_watt') + print ' Input Current: ',\ + get_pmc_register('PSU1_In_amp') + print ' Output Current: ',\ + get_pmc_register('PSU1_Out_amp') + + else: + + # psu2_fan_status = int(get_pmc_register('PSU1_status'),16) + print ' PSU2:' + print ' FAN Normal Temperature: ',\ + get_pmc_register('PSU2_temp') + print ' FAN AirFlow Temperature: ',\ + get_pmc_register('PSU2_AF_temp') + print ' FAN RPM: ',\ + get_pmc_register('PSU2_rpm') + # print ' FAN Status: ', Psu_Fan_Status[psu2_fan_status] + + # PSU input & output monitors + print ' Input Voltage: ',\ + get_pmc_register('PSU2_In_volt') + print ' Output Voltage: ',\ + get_pmc_register('PSU2_Out_volt') + print ' Input Power: ',\ + get_pmc_register('PSU2_In_watt') + print ' Output Power: ',\ + get_pmc_register('PSU2_Out_watt') + print ' Input Current: ',\ + get_pmc_register('PSU2_In_amp') + print ' Output Current: ',\ + get_pmc_register('PSU2_Out_amp') + + +print('\nPSUs:') +for psu in range(1, S5232F_MAX_PSUS + 1): + psu_presence = PSU_PRESENCE.format(psu) + if (get_pmc_register(psu_presence)): + print_psu(psu) + else: + print '\n PSU ', psu, 'Not present' + +print '\n Total Power: ',\ + get_pmc_register('PSU_Total_watt') + diff --git a/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/qsfp_irq_enable.py b/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/qsfp_irq_enable.py new file mode 100755 index 00000000000..5050475f987 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/qsfp_irq_enable.py @@ -0,0 +1,32 @@ +#!/usr/bin/python + +try: + import struct + import sys + from os import * + from mmap import * + +except ImportError as e: + raise ImportError("%s - required module no found" % str(e)) + +BASE_RES_PATH = "/sys/bus/pci/devices/0000:04:00.0/resource0" +PORT_START = 0 +PORT_END = 32 + + +def pci_mem_write(mm, offset, data): + mm.seek(offset) + mm.write(struct.pack('I', data)) + + +def pci_set_value(resource, val, offset): + fd = open(resource, O_RDWR) + mm = mmap(fd, 0) + val = pci_mem_write(mm, offset, val) + mm.close() + close(fd) + return val + +for port_num in range(PORT_START, PORT_END+1): + port_offset = 0x400c + ((port_num) * 16) + pci_set_value(BASE_RES_PATH, 0x30, port_offset) diff --git a/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/s5232f_platform.sh b/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/s5232f_platform.sh new file mode 100755 index 00000000000..18e5ca2d515 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/s5232f_platform.sh @@ -0,0 +1,120 @@ +#!/bin/bash + +init_devnum() { + found=0 + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + # iSMT adapter can be at either dffd0000 or dfff0000 + if [[ $devname == 'SMBus iSMT adapter at '* ]]; then + found=1 + break + fi + done + + [ $found -eq 0 ] && echo "cannot find iSMT" && exit 1 +} + +# Attach/Detach syseeprom on CPU board +sys_eeprom() { + case $1 in + "new_device") echo 24c16 0x50 > /sys/bus/i2c/devices/i2c-0/$1 + ;; + "delete_device") echo 0x50 > /sys/bus/i2c/devices/i2c-0/$1 + ;; + *) echo "s5232f_platform: sys_eeprom : invalid command !" + ;; + esac +} + +#Attach/Detach the MUX connecting all QSFPs +switch_board_qsfp_mux() { + case $1 in + "new_device") + for ((i=603;i<=607;i++)); + do + echo "Attaching PCA9548 @ 0x74" + echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-$i/$1 + done + + ;; + "delete_device") + for ((i=603;i<=607;i++)); + do + echo "Detaching PCA9548 @ 0x74" + echo 0x74 > /sys/bus/i2c/devices/i2c-$i/$1 + done + + ;; + *) echo "s5232f_platform: switch_board_qsfp_mux: invalid command !" + ;; + esac + sleep 2 +} + +#Attach/Detach 64 instances of EEPROM driver QSFP ports +#eeprom can dump data using below command +switch_board_qsfp() { + case $1 in + "new_device") + for ((i=2;i<=41;i++)); + do + echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-$i/$1 + done + ;; + + "delete_device") + for ((i=2;i<=41;i++)); + do + echo 0x50 > /sys/bus/i2c/devices/i2c-$i/$1 + done + ;; + + *) echo "s5232f_platform: switch_board_qsfp: invalid command !" + ;; + esac +} + +#Modsel 64 ports to applicable QSFP type modules +#This enables the adapter to respond for i2c commands +switch_board_modsel() { + resource="/sys/bus/pci/devices/0000:04:00.0/resource0" + for ((i=1;i<=64;i++)); + do + port_addr=$(( 16384 + ((i - 1) * 16))) + hex=$( printf "0x%x" $port_addr ) + python /usr/bin/pcisysfs.py --set --offset $hex --val 0x10 --res $resource > /dev/null 2>&1 + done +} + +#This enables the led control for CPU and default states +switch_board_led_default() { + resource="/sys/bus/pci/devices/0000:04:00.0/resource0" + python /usr/bin/pcisysfs.py --set --offset 0x24 --val 0x194 --res $resource > /dev/null 2>&1 +} +init_devnum + +if [ "$1" == "init" ]; then + modprobe i2c-dev + modprobe i2c-mux-pca954x force_deselect_on_exit=1 + modprobe ipmi_devintf + modprobe ipmi_si + modprobe i2c_ocores + modprobe dell_s5232f_fpga_ocores + sys_eeprom "new_device" + switch_board_qsfp_mux "new_device" + switch_board_qsfp "new_device" + switch_board_modsel + switch_board_led_default + python /usr/bin/qsfp_irq_enable.py + +elif [ "$1" == "deinit" ]; then + sys_eeprom "delete_device" + switch_board_qsfp "delete_device" + switch_board_qsfp_mux "delete_device" + + modprobe -r i2c-mux-pca954x + modprobe -r i2c-dev +else + echo "s5232f_platform : Invalid option !" +fi + diff --git a/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/sensors b/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/sensors new file mode 100755 index 00000000000..ee53f2b0f32 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5232f/scripts/sensors @@ -0,0 +1,8 @@ +#!/bin/bash +docker exec -i pmon sensors "$@" +docker exec -i pmon /usr/bin/platform_sensors.py "$@" + +#To probe sensors not part of lm-sensors +#if [ -r /usr/local/bin/platform_sensors.py ]; then +# python /usr/local/bin/platform_sensors.py +#fi diff --git a/platform/broadcom/sonic-platform-modules-dell/s5232f/systemd/platform-modules-s5232f.service b/platform/broadcom/sonic-platform-modules-dell/s5232f/systemd/platform-modules-s5232f.service new file mode 100644 index 00000000000..7fb3801e339 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5232f/systemd/platform-modules-s5232f.service @@ -0,0 +1,13 @@ +[Unit] +Description=Dell S5232f Platform modules +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/s5232f_platform.sh init +ExecStop=/usr/local/bin/s5232f_platform.sh deinit +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-dell/s5248f/cfg/s5248f-modules.conf b/platform/broadcom/sonic-platform-modules-dell/s5248f/cfg/s5248f-modules.conf new file mode 100644 index 00000000000..94639bd3f6e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5248f/cfg/s5248f-modules.conf @@ -0,0 +1,19 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-gpio +i2c-mux-pca954x + +ipmi_devintf +ipmi_si +dell_s5248f_fpga_ocores +i2c_ocores diff --git a/platform/broadcom/sonic-platform-modules-dell/s5248f/modules/Makefile b/platform/broadcom/sonic-platform-modules-dell/s5248f/modules/Makefile new file mode 100644 index 00000000000..c179aa5dc93 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5248f/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := dell_s5248f_fpga_ocores.o + diff --git a/platform/broadcom/sonic-platform-modules-dell/s5248f/modules/dell_s5248f_fpga_ocores.c b/platform/broadcom/sonic-platform-modules-dell/s5248f/modules/dell_s5248f_fpga_ocores.c new file mode 100644 index 00000000000..b9a50c69b22 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5248f/modules/dell_s5248f_fpga_ocores.c @@ -0,0 +1,1626 @@ +/* +* Copyright (C) 2018 Dell Inc +* +* Licensed under the GNU General Public License Version 2 +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +*/ + +/** +* @file fpga_i2ccore.c +* @brief This is a driver to interface with Linux Open Cores drivber for FPGA i2c access +* +************************************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include //siginfo +#include //rcu_read_lock +#include //kernel_version +#include +#include +#include +#include +#include + + +void __iomem * fpga_base_addr = NULL; +void __iomem * fpga_ctl_addr = NULL; + +#define DRIVER_NAME "fpgapci" +#define PCI_NUM_BARS 4 + +#ifdef DEBUG +# define PRINT(fmt, ...) printk(fmt, ##__VA_ARGS__) +#else +# define PRINT(fmt, ...) +#endif + +/* Maximum size of driver buffer (allocated with kalloc()). + * Needed to copy data from user to kernel space, among other + * things. */ +static const size_t BUF_SIZE = PAGE_SIZE; + +/* Device data used by this driver. */ +struct fpgapci_dev { + /* the kernel pci device data structure */ + struct pci_dev *pci_dev; + + /* upstream root node */ + struct pci_dev *upstream; + + /* kernels virtual addr. for the mapped BARs */ + void * __iomem bar[PCI_NUM_BARS]; + + /* length of each memory region. Used for error checking. */ + size_t bar_length[PCI_NUM_BARS]; + + /* Debug data */ + /* number of hw interrupts handled. */ + int num_handled_interrupts; + int num_undelivered_signals; + int pci_gen; + int pci_num_lanes; + + unsigned int irq_first; + unsigned int irq_length; + unsigned int irq_assigned; + unsigned int xcvr_intr_count; +}; + +static int use_irq = 1; +module_param(use_irq, int, 0644); +MODULE_PARM_DESC(use_irq, "Get an use_irq value from user...\n"); + +static uint32_t num_bus = 0; +module_param(num_bus, int, 0); +MODULE_PARM_DESC(num_bus, + "Number of i2c busses supported by the FPGA on this platform."); + + +/* Xilinx FPGA PCIE info: */ +/* Non-VGA unclassified device: Xilinx Corporation Device 7021*/ +/* Subsystem: Xilinx Corporation Device 0007 */ +//#define VENDOR 0x10EE +#define DEVICE 0x7021 +static phys_addr_t fpga_phys_addr; + +typedef signed char s8; +typedef unsigned char u8; + +typedef signed short s16; +typedef unsigned short u16; + +typedef signed int s32; +typedef unsigned int u32; + +typedef signed long long s64; +typedef unsigned long long u64; + + +/* struct to hold data related to the pcie device */ +struct pci_data_struct{ + struct pci_dev* dev; + unsigned long long phy_addr_bar0; + unsigned long long phy_len_bar0; + unsigned long long phy_flags_bar0; + unsigned int irq_first; + unsigned int irq_length; + unsigned int irq_assigned; + void * kvirt_addr_bar0; +}; + +/* global variable declarations */ + +/* Static function declarations */ +static int fpgapci_probe(struct pci_dev *dev, const struct pci_device_id *id); +static void fpgapci_remove(struct pci_dev *dev); + +static int scan_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev); +static int map_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev); +static void free_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev); + + +struct fpgalogic_i2c { + void __iomem *base; + u32 reg_shift; + u32 reg_io_width; + wait_queue_head_t wait; + struct i2c_msg *msg; + int pos; + int nmsgs; + int state; /* see STATE_ */ + int ip_clock_khz; + int bus_clock_khz; + void (*reg_set)(struct fpgalogic_i2c *i2c, int reg, u8 value); + u8 (*reg_get)(struct fpgalogic_i2c *i2c, int reg); + u32 timeout; + struct mutex lock; +}; +/* registers */ +#define FPGAI2C_REG_PRELOW 0 +#define FPGAI2C_REG_PREHIGH 1 +#define FPGAI2C_REG_CONTROL 2 +#define FPGAI2C_REG_DATA 3 +#define FPGAI2C_REG_CMD 4 /* write only */ +#define FPGAI2C_REG_STATUS 4 /* read only, same address as FPGAI2C_REG_CMD */ +#define FPGAI2C_REG_VER 5 + + + +#define FPGAI2C_REG_CTRL_IEN 0x40 +#define FPGAI2C_REG_CTRL_EN 0x80 + +#define FPGAI2C_REG_CMD_START 0x91 +#define FPGAI2C_REG_CMD_STOP 0x41 +#define FPGAI2C_REG_CMD_READ 0x21 +#define FPGAI2C_REG_CMD_WRITE 0x11 +#define FPGAI2C_REG_CMD_READ_ACK 0x21 +#define FPGAI2C_REG_CMD_READ_NACK 0x29 +#define FPGAI2C_REG_CMD_IACK 0x01 + +#define FPGAI2C_REG_STAT_IF 0x01 +#define FPGAI2C_REG_STAT_TIP 0x02 +#define FPGAI2C_REG_STAT_ARBLOST 0x20 +#define FPGAI2C_REG_STAT_BUSY 0x40 +#define FPGAI2C_REG_STAT_NACK 0x80 + +/* SR[7:0] - Status register */ +#define FPGAI2C_REG_SR_RXACK (1 << 7) /* Receive acknowledge from slave �1� = No acknowledge received*/ +#define FPGAI2C_REG_SR_BUSY (1 << 6) /* Busy, I2C bus busy (as defined by start / stop bits) */ +#define FPGAI2C_REG_SR_AL (1 << 5) /* Arbitration lost - fpga i2c logic lost arbitration */ +#define FPGAI2C_REG_SR_TIP (1 << 1) /* Transfer in progress */ +#define FPGAI2C_REG_SR_IF (1 << 0) /* Interrupt flag */ + +enum { + STATE_DONE = 0, + STATE_INIT, + STATE_ADDR, + STATE_ADDR10, + STATE_START, + STATE_WRITE, + STATE_READ, + STATE_STOP, + STATE_ERROR, +}; + +#define TYPE_FPGALOGIC 0 +#define TYPE_GRLIB 1 + +/*I2C_CH1 Offset address from PCIE BAR 0*/ +#define FPGALOGIC_I2C_BASE 0x00006000 +#define FPGALOGIC_CH_OFFSET 0x10 + +#define i2c_bus_controller_numb 1 +#define I2C_PCI_MAX_BUS (16) +#define I2C_PCI_MAX_BUS_REV00 (7) +#define DELL_I2C_CLOCK_LEGACY 0 +#define DELL_I2C_CLOCK_PRESERVE (~0U) +#define I2C_PCI_BUS_NUM_5 5 +#define I2C_PCI_BUS_NUM_7 7 +#define I2C_PCI_BUS_NUM_8 8 +#define I2C_PCI_BUS_NUM_10 10 +#define I2C_PCI_BUS_NUM_12 12 +#define I2C_PCI_BUS_NUM_16 16 + +#define IRQ_LTCH_STS 0x20 +#define PRSNT_LTCH_STS 0x10 + +#define PORT_CTRL_OFFSET 0x4000 +#define PORT_STS_OFFSET 0x4004 +#define PORT_IRQ_STS_OFFSET 0x4008 +#define PORT_IRQ_EN_OFFSET 0x400C +#define MB_BRD_REV_TYPE 0x0008 +#define MB_BRD_REV_MASK 0x00f0 +#define MB_BRD_REV_00 0x0000 +#define MB_BRD_REV_01 0x0010 +#define MB_BRD_REV_02 0x0020 +#define MB_BRD_REV_03 0x0030 +#define MB_BRD_TYPE_MASK 0x000f +#define BRD_TYPE_Z9232_NON_NEBS 0x0 +#define BRD_TYPE_Z9232_NEBS 0x1 +#define BRD_TYPE_Z9264_NON_NEBS 0x2 +#define BRD_TYPE_Z9264_NEBS 0x3 +#define BRD_TYPE_S5212_NON_NEBS 0x4 +#define BRD_TYPE_S5212_NEBS 0x5 +#define BRD_TYPE_S5224_NON_NEBS 0x6 +#define BRD_TYPE_S5224_NEBS 0x7 +#define BRD_TYPE_S5248_NON_NEBS 0x8 +#define BRD_TYPE_S5248_NEBS 0x9 +#define BRD_TYPE_S5296_NON_NEBS 0xa +#define BRD_TYPE_S5296_NEBS 0xb +#define BRD_TYPE_S5232_NON_NEBS 0xc +#define BRD_TYPE_S5232_NEBS 0xd + +#define FPGA_CTL_REG_SIZE 0x6000 +#define MSI_VECTOR_MAP_MASK 0x1f +#define MSI_VECTOR_MAP1 0x58 +#define I2C_CH1_MSI_MAP_VECT_8 0x00000008 +#define I2C_CH2_MSI_MAP_VECT_9 0x00000120 +#define I2C_CH3_MSI_MAP_VECT_10 0x00002800 +#define I2C_CH4_MSI_MAP_VECT_11 0x00058000 +#define I2C_CH5_MSI_MAP_VECT_12 0x00c00000 +#define I2C_CH6_MSI_MAP_VECT_13 0x15000000 +#define MSI_VECTOR_MAP2 0x5c +#define I2C_CH7_MSI_MAP_VECT_14 0x0000000e +#define MSI_VECTOR_MAP3 0x9c +#define I2C_CH8_MSI_MAP_VECT_8 0x00800000 +#define I2C_CH8_MSI_MAP_VECT_16 0x01100000 +#define I2C_CH9_MSI_MAP_VECT_9 0x12000000 +#define I2C_CH9_MSI_MAP_VECT_17 0x24000000 +#define MSI_VECTOR_MAP4 0xa0 +#define I2C_CH10_MSI_MAP_VECT_10 0x0000000a +#define I2C_CH10_MSI_MAP_VECT_18 0x00000012 +#define I2C_CH11_MSI_MAP_VECT_11 0x00000120 +#define I2C_CH11_MSI_MAP_VECT_19 0x00000260 +#define I2C_CH12_MSI_MAP_VECT_12 0x00002800 +#define I2C_CH12_MSI_MAP_VECT_20 0x00005000 +#define I2C_CH13_MSI_MAP_VECT_13 0x00058000 +#define I2C_CH13_MSI_MAP_VECT_21 0x000a8000 +#define I2C_CH14_MSI_MAP_VECT_14 0x00c00000 +#define I2C_CH14_MSI_MAP_VECT_22 0x01600000 +#define I2C_CH15_MSI_MAP_VECT_8 0x10000000 +#define I2C_CH15_MSI_MAP_VECT_23 0x2e000000 +#define MSI_VECTOR_MAP5 0xa4 +#define I2C_CH16_MSI_MAP_VECT_9 0x00000009 +#define I2C_CH16_MSI_MAP_VECT_24 0x00000018 + +#define MSI_VECTOR_REV_00 16 +#define MSI_VECTOR_REV_01 32 + +#define FPGA_MSI_VECTOR_ID_4 4 +#define FPGA_MSI_VECTOR_ID_5 5 +#define FPGA_MSI_VECTOR_ID_8 8 +#define FPGA_MSI_VECTOR_ID_9 9 +#define FPGA_MSI_VECTOR_ID_10 10 +#define FPGA_MSI_VECTOR_ID_11 11 +#define FPGA_MSI_VECTOR_ID_12 12 +#define FPGA_MSI_VECTOR_ID_13 13 +#define FPGA_MSI_VECTOR_ID_14 14 +#define FPGA_MSI_VECTOR_ID_15 15 /*Note: this is external MSI vector id */ +#define FPGA_MSI_VECTOR_ID_16 16 +#define FPGA_MSI_VECTOR_ID_17 17 +#define FPGA_MSI_VECTOR_ID_18 18 +#define FPGA_MSI_VECTOR_ID_19 19 +#define FPGA_MSI_VECTOR_ID_20 20 +#define FPGA_MSI_VECTOR_ID_21 21 +#define FPGA_MSI_VECTOR_ID_22 22 +#define FPGA_MSI_VECTOR_ID_23 23 +#define FPGA_MSI_VECTOR_ID_24 24 + + + +static int total_i2c_pci_bus = 0; +static uint32_t board_rev_type = 0; +static struct fpgalogic_i2c fpgalogic_i2c[I2C_PCI_MAX_BUS]; +static struct i2c_adapter i2c_pci_adap[I2C_PCI_MAX_BUS]; +static struct mutex i2c_xfer_lock[I2C_PCI_MAX_BUS]; + +static void fpgai2c_reg_set_8(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite8(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void fpgai2c_reg_set_16(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite16(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void fpgai2c_reg_set_32(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite32(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void fpgai2c_reg_set_16be(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite16be(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void fpgai2c_reg_set_32be(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite32be(value, i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_8(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread8(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_16(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread16(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_32(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread32(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_16be(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread16be(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_32be(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread32be(i2c->base + (reg << i2c->reg_shift)); +} + +static inline void fpgai2c_reg_set(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + i2c->reg_set(i2c, reg, value); + udelay(100); +} + +static inline u8 fpgai2c_reg_get(struct fpgalogic_i2c *i2c, int reg) +{ + udelay(100); + return i2c->reg_get(i2c, reg); +} + +static void fpgai2c_dump(struct fpgalogic_i2c *i2c) +{ + u8 tmp; + + PRINT("Logic register dump:\n"); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_PRELOW); + PRINT("FPGAI2C_REG_PRELOW (%d) = 0x%x\n",FPGAI2C_REG_PRELOW,tmp); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_PREHIGH); + PRINT("FPGAI2C_REG_PREHIGH(%d) = 0x%x\n",FPGAI2C_REG_PREHIGH,tmp); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_CONTROL); + PRINT("FPGAI2C_REG_CONTROL(%d) = 0x%x\n",FPGAI2C_REG_CONTROL,tmp); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_DATA); + PRINT("FPGAI2C_REG_DATA (%d) = 0x%x\n",FPGAI2C_REG_DATA,tmp); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_CMD); + PRINT("FPGAI2C_REG_CMD (%d) = 0x%x\n",FPGAI2C_REG_CMD,tmp); +} + +static void fpgai2c_stop(struct fpgalogic_i2c *i2c) +{ + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP); +} + +/* + * dell_get_mutex must be called prior to calling this function. + */ +static int fpgai2c_poll(struct fpgalogic_i2c *i2c) +{ + u8 stat = fpgai2c_reg_get(i2c, FPGAI2C_REG_STATUS); + struct i2c_msg *msg = i2c->msg; + u8 addr; + + /* Ready? */ + if (stat & FPGAI2C_REG_STAT_TIP) + return -EBUSY; + + if (i2c->state == STATE_DONE || i2c->state == STATE_ERROR) { + /* Stop has been sent */ + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK); + if (i2c->state == STATE_ERROR) + return -EIO; + return 0; + } + + /* Error? */ + if (stat & FPGAI2C_REG_STAT_ARBLOST) { + i2c->state = STATE_ERROR; + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP); + return -EAGAIN; + } + + if (i2c->state == STATE_INIT) { + if (stat & FPGAI2C_REG_STAT_BUSY) + return -EBUSY; + + i2c->state = STATE_ADDR; + } + + if (i2c->state == STATE_ADDR) { + /* 10 bit address? */ + if (i2c->msg->flags & I2C_M_TEN) { + addr = 0xf0 | ((i2c->msg->addr >> 7) & 0x6); + i2c->state = STATE_ADDR10; + } else { + addr = (i2c->msg->addr << 1); + i2c->state = STATE_START; + } + + /* Set read bit if necessary */ + addr |= (i2c->msg->flags & I2C_M_RD) ? 1 : 0; + + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, addr); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_START); + + return 0; + } + + /* Second part of 10 bit addressing */ + if (i2c->state == STATE_ADDR10) { + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, i2c->msg->addr & 0xff); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_WRITE); + + i2c->state = STATE_START; + return 0; + } + + if (i2c->state == STATE_START || i2c->state == STATE_WRITE) { + i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; + + if (stat & FPGAI2C_REG_STAT_NACK) { + i2c->state = STATE_ERROR; + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP); + return -ENXIO; + } + } else { + msg->buf[i2c->pos++] = fpgai2c_reg_get(i2c, FPGAI2C_REG_DATA); + } + + if (i2c->pos >= msg->len) { + i2c->nmsgs--; + i2c->msg++; + i2c->pos = 0; + msg = i2c->msg; + + if (i2c->nmsgs) { + if (!(msg->flags & I2C_M_NOSTART)) { + i2c->state = STATE_ADDR; + return 0; + } else { + i2c->state = (msg->flags & I2C_M_RD) + ? STATE_READ : STATE_WRITE; + } + } else { + i2c->state = STATE_DONE; + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP); + return 0; + } + } + + if (i2c->state == STATE_READ) { + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, i2c->pos == (msg->len - 1) ? + FPGAI2C_REG_CMD_READ_NACK : FPGAI2C_REG_CMD_READ_ACK); + } else { + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, msg->buf[i2c->pos++]); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_WRITE); + } + + return 0; +} + +static ssize_t get_mod_msi(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ind = 0, port_status=0, port_irq_status=0; + struct fpgapci_dev *fpgapci = (struct fpgapci_dev*) dev_get_drvdata(dev); + PRINT("%s:xcvr_intr_count:%u\n", __FUNCTION__, fpgapci->xcvr_intr_count); + for(ind=0;ind<64;ind++) + { + port_status = ioread32(fpga_ctl_addr + PORT_STS_OFFSET + (ind*16)); + port_irq_status = ioread32(fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + PRINT("%s:port:%d, port_status:%#x, port_irq_status:%#x\n", __FUNCTION__, ind, port_status, port_irq_status); + } + return sprintf(buf,"0x%04x\n",fpgapci->xcvr_intr_count); +} +static DEVICE_ATTR(port_msi, S_IRUGO, get_mod_msi, NULL); + +static struct attribute *port_attrs[] = { + &dev_attr_port_msi.attr, + NULL, +}; + +static struct attribute_group port_attr_grp = { + .attrs = port_attrs, +}; + + +static irqreturn_t fpgaport_1_32_isr(int irq, void *dev) +{ + struct pci_dev *pdev = dev; + struct fpgapci_dev *fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&pdev->dev); + int ind = 0, port_status=0, port_irq_status=0; + for(ind=0;ind<32;ind++) + { + port_irq_status = ioread32(fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + if(port_irq_status&(IRQ_LTCH_STS|PRSNT_LTCH_STS)) + { + PRINT("%s:port:%d, port_status:%#x, port_irq_status:%#x\n", __FUNCTION__, ind, port_status, port_irq_status); + //write on clear + iowrite32( IRQ_LTCH_STS|PRSNT_LTCH_STS,fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + } + } + fpgapci->xcvr_intr_count++; + PRINT("%s: xcvr_intr_count:%u\n", __FUNCTION__, fpgapci->xcvr_intr_count); + sysfs_notify(&pdev->dev.kobj, NULL, "port_msi"); + return IRQ_HANDLED; +} + +static irqreturn_t fpgaport_33_64_isr(int irq, void *dev) +{ + struct pci_dev *pdev = dev; + struct fpgapci_dev *fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&pdev->dev); + int ind = 0, port_status=0, port_irq_status=0; + for(ind=32;ind<64;ind++) + { + port_irq_status = ioread32(fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + if(port_irq_status| (IRQ_LTCH_STS|PRSNT_LTCH_STS)) + { + PRINT("%s:port:%d, port_status:%#x, port_irq_status:%#x\n", __FUNCTION__, ind, port_status, port_irq_status); + iowrite32( IRQ_LTCH_STS|PRSNT_LTCH_STS,fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + } + } + fpgapci->xcvr_intr_count++; + PRINT("%s: xcvr_intr_count:%u\n", __FUNCTION__, fpgapci->xcvr_intr_count); + sysfs_notify(&pdev->dev.kobj, NULL, "port_msi"); + return IRQ_HANDLED; +} + +static void fpgai2c_process(struct fpgalogic_i2c *i2c) +{ + struct i2c_msg *msg = i2c->msg; + u8 stat = fpgai2c_reg_get(i2c, FPGAI2C_REG_STATUS); + + PRINT("fpgai2c_process in. status reg :0x%x\n", stat); + + if ((i2c->state == STATE_STOP) || (i2c->state == STATE_ERROR)) { + /* stop has been sent */ + PRINT("fpgai2c_process FPGAI2C_REG_CMD_IACK stat = 0x%x Set FPGAI2C_REG_CMD(0%x) FPGAI2C_REG_CMD_IACK = 0x%x\n" \ + ,stat, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK); + if(i2c->state == STATE_STOP) { + i2c->state = STATE_DONE; + } + wake_up(&i2c->wait); + return; + } + + + /* error? */ + if (stat & FPGAI2C_REG_STAT_ARBLOST) { + i2c->state = STATE_ERROR; + PRINT("fpgai2c_process FPGAI2C_REG_STAT_ARBLOST FPGAI2C_REG_CMD_STOP\n"); + fpgai2c_stop(i2c); + return; + } + + if ((i2c->state == STATE_START) || (i2c->state == STATE_WRITE)) { + i2c->state = + (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; + + if (stat & FPGAI2C_REG_STAT_NACK) { + i2c->state = STATE_ERROR; + fpgai2c_stop(i2c); + return; + } + } else + { + msg->buf[i2c->pos++] = fpgai2c_reg_get(i2c, FPGAI2C_REG_DATA); + } + + /* end of msg? */ + if (i2c->pos == msg->len) { + i2c->nmsgs--; + i2c->msg++; + i2c->pos = 0; + msg = i2c->msg; + + if (i2c->nmsgs) { /* end? */ + /* send start? */ + if (!(msg->flags & I2C_M_NOSTART)) { + + u8 addr = (msg->addr << 1); + + if (msg->flags & I2C_M_RD) + addr |= 1; + + i2c->state = STATE_START; + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, addr); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_START); + return; + } else + { + i2c->state = (msg->flags & I2C_M_RD) + ? STATE_READ : STATE_WRITE; + } + } else { + i2c->state = STATE_STOP; + fpgai2c_stop(i2c); + return; + } + } + + if (i2c->state == STATE_READ) { + PRINT("fpgai2c_poll STATE_READ i2c->pos=%d msg->len-1 = 0x%x set FPGAI2C_REG_CMD = 0x%x\n",i2c->pos, msg->len-1, + i2c->pos == (msg->len-1) ? FPGAI2C_REG_CMD_READ_NACK : FPGAI2C_REG_CMD_READ_ACK); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, i2c->pos == (msg->len-1) ? + FPGAI2C_REG_CMD_READ_NACK : FPGAI2C_REG_CMD_READ_ACK); + } else { + PRINT("fpgai2c_process set FPGAI2C_REG_DATA(0x%x)\n",FPGAI2C_REG_DATA); + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, msg->buf[i2c->pos++]); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_WRITE); + } +} + +static irqreturn_t fpgai2c_isr(int irq, void *dev_id) +{ + struct fpgalogic_i2c *i2c = dev_id; + fpgai2c_process(i2c); + + return IRQ_HANDLED; +} +void dell_get_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_lock(&i2c->lock); +} + +/** + * dell_release_mutex - release mutex + */ +void dell_release_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_unlock(&i2c->lock); +} + +static int fpgai2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) +{ + struct fpgalogic_i2c *i2c = i2c_get_adapdata(adap); + int ret; + unsigned long timeout = jiffies + msecs_to_jiffies(1000); + + i2c->msg = msgs; + i2c->pos = 0; + i2c->nmsgs = num; + i2c->state = (use_irq == 1) ? STATE_START : STATE_INIT; + + PRINT("i2c->msg->addr = 0x%x i2c->msg->flags = 0x%x\n",i2c->msg->addr,i2c->msg->flags); + PRINT("I2C_M_RD = 0x%x i2c->msg->addr << 1 = 0x%x\n",I2C_M_RD,i2c->msg->addr << 1); + + if (!use_irq) { + /* Handle the transfer */ + while (time_before(jiffies, timeout)) { + dell_get_mutex(i2c); + ret = fpgai2c_poll(i2c); + dell_release_mutex(i2c); + + if (i2c->state == STATE_DONE || i2c->state == STATE_ERROR) + return (i2c->state == STATE_DONE) ? num : ret; + + if (ret == 0) + timeout = jiffies + HZ; + + usleep_range(5, 15); + } + + i2c->state = STATE_ERROR; + + return -ETIMEDOUT; + + + } else { + ret = -ETIMEDOUT; + PRINT("Set FPGAI2C_REG_DATA(0%x) val = 0x%x\n",FPGAI2C_REG_DATA, + (i2c->msg->addr << 1) | ((i2c->msg->flags & I2C_M_RD) ? 1:0)); + + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, + (i2c->msg->addr << 1) | + ((i2c->msg->flags & I2C_M_RD) ? 1:0)); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_START); + + /* Interrupt mode */ + if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) || + (i2c->state == STATE_DONE), HZ)) + ret = (i2c->state == STATE_DONE) ? num : -EIO; + return ret; + } +} + +static int fpgai2c_init(struct fpgalogic_i2c *i2c) +{ + int prescale; + int diff; + u8 ctrl; + + if (i2c->reg_io_width == 0) + i2c->reg_io_width = 1; /* Set to default value */ + + if (!i2c->reg_set || !i2c->reg_get) { + bool be = 0; //1:big_endian 0:little_endian + + switch (i2c->reg_io_width) { + case 1: + i2c->reg_set = fpgai2c_reg_set_8; + i2c->reg_get = fpgai2c_reg_get_8; + break; + + case 2: + i2c->reg_set = be ? fpgai2c_reg_set_16be : fpgai2c_reg_set_16; + i2c->reg_get = be ? fpgai2c_reg_get_16be : fpgai2c_reg_get_16; + break; + + case 4: + i2c->reg_set = be ? fpgai2c_reg_set_32be : fpgai2c_reg_set_32; + i2c->reg_get = be ? fpgai2c_reg_get_32be : fpgai2c_reg_get_32; + break; + + default: + PRINT("Unsupported I/O width (%d)\n", + i2c->reg_io_width); + return -EINVAL; + } + } + + ctrl = fpgai2c_reg_get(i2c, FPGAI2C_REG_CONTROL); + + PRINT("%s(), line:%d\n", __func__, __LINE__); + PRINT("i2c->base = 0x%p\n",i2c->base); + + PRINT("ctrl = 0x%x\n",ctrl); + PRINT("set ctrl = 0x%x\n",ctrl & ~(FPGAI2C_REG_CTRL_EN|FPGAI2C_REG_CTRL_IEN)); + + /* make sure the device is disabled */ + fpgai2c_reg_set(i2c, FPGAI2C_REG_CONTROL, ctrl & ~(FPGAI2C_REG_CTRL_EN|FPGAI2C_REG_CTRL_IEN)); + + /* + * I2C Frequency depends on host clock + * input clock of 100MHz + * prescale to 100MHz / ( 5*100kHz) -1 = 199 = 0x4F 100000/(5*100)-1=199=0xc7 + */ + prescale = (i2c->ip_clock_khz / (5 * i2c->bus_clock_khz)) - 1; + prescale = clamp(prescale, 0, 0xffff); + + diff = i2c->ip_clock_khz / (5 * (prescale + 1)) - i2c->bus_clock_khz; + if (abs(diff) > i2c->bus_clock_khz / 10) { + PRINT("Unsupported clock settings: core: %d KHz, bus: %d KHz\n", + i2c->ip_clock_khz, i2c->bus_clock_khz); + return -EINVAL; + } + + fpgai2c_reg_set(i2c, FPGAI2C_REG_PRELOW, prescale & 0xff); + fpgai2c_reg_set(i2c, FPGAI2C_REG_PREHIGH, prescale >> 8); + + /* Init the device */ + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK); + if (!use_irq) + fpgai2c_reg_set(i2c, FPGAI2C_REG_CONTROL, ctrl | FPGAI2C_REG_CTRL_EN); + else + fpgai2c_reg_set(i2c, FPGAI2C_REG_CONTROL, ctrl | FPGAI2C_REG_CTRL_IEN | FPGAI2C_REG_CTRL_EN); + + fpgai2c_dump(i2c); + + /* Initialize interrupt handlers if not already done */ + init_waitqueue_head(&i2c->wait); + + return 0; +} + + +static u32 fpgai2c_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm fpgai2c_algorithm = { + .master_xfer = fpgai2c_xfer, + .functionality = fpgai2c_func, +}; + +static int i2c_pci_add_bus (struct i2c_adapter *adap) +{ + int ret = 0; + /* Register new adapter */ + adap->algo = &fpgai2c_algorithm; + ret = i2c_add_numbered_adapter(adap); + return ret; +} + +static int i2c_init_internal_data(void) +{ + int i; + PRINT("%s(), line:%d\n", __func__, __LINE__); + + for( i = 0; i < total_i2c_pci_bus; i++ ) + { + fpgalogic_i2c[i].reg_shift = 0; /* 8 bit registers */ + fpgalogic_i2c[i].reg_io_width = 1; /* 8 bit read/write */ + fpgalogic_i2c[i].timeout = 500;//1000;//1ms + fpgalogic_i2c[i].ip_clock_khz = 100000;//100000;/* input clock of 100MHz */ + fpgalogic_i2c[i].bus_clock_khz = 100; + fpgalogic_i2c[i].base = fpga_base_addr + i*FPGALOGIC_CH_OFFSET; + mutex_init(&fpgalogic_i2c[i].lock); + fpgai2c_init(&fpgalogic_i2c[i]); + } + + return 0; +} + + +static int i2c_pci_init (void) +{ + int i; + + if (num_bus == 0) { + board_rev_type = ioread32(fpga_ctl_addr + MB_BRD_REV_TYPE); + + if ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_00) { + num_bus = I2C_PCI_MAX_BUS_REV00; + } else if (((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_01) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_02) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_03)) { + switch (board_rev_type & MB_BRD_TYPE_MASK){ + case BRD_TYPE_S5212_NON_NEBS: + case BRD_TYPE_S5212_NEBS: + num_bus = I2C_PCI_BUS_NUM_5; + break; + case BRD_TYPE_S5224_NON_NEBS: + case BRD_TYPE_S5224_NEBS: + num_bus = I2C_PCI_BUS_NUM_7; + break; + case BRD_TYPE_Z9232_NON_NEBS: + case BRD_TYPE_Z9232_NEBS: + case BRD_TYPE_S5232_NON_NEBS: + case BRD_TYPE_S5232_NEBS: + num_bus = I2C_PCI_BUS_NUM_8; + break; + case BRD_TYPE_S5248_NON_NEBS: + case BRD_TYPE_S5248_NEBS: + num_bus = I2C_PCI_BUS_NUM_10; + break; + case BRD_TYPE_Z9264_NON_NEBS: + case BRD_TYPE_Z9264_NEBS: + num_bus = I2C_PCI_BUS_NUM_12; + break; + case BRD_TYPE_S5296_NON_NEBS: + case BRD_TYPE_S5296_NEBS: + num_bus = I2C_PCI_BUS_NUM_16; + break; + default: + num_bus = I2C_PCI_BUS_NUM_16; + printk("Wrong BRD_TYPE: 0x%x\n", board_rev_type); + break; + } + } else { + printk("Wrong board_rev_type 0x%x\n", board_rev_type); + } + } + + printk("board_rev_type 0x%x, num_bus 0x%x\n", board_rev_type, num_bus); + total_i2c_pci_bus = num_bus; + + memset (&i2c_pci_adap, 0, sizeof(i2c_pci_adap)); + memset (&fpgalogic_i2c, 0, sizeof(fpgalogic_i2c)); + for(i=0; i < i2c_bus_controller_numb; i++) + mutex_init(&i2c_xfer_lock[i]); + + /* Initialize driver's itnernal data structures */ + i2c_init_internal_data(); + + for (i = 0 ; i < total_i2c_pci_bus; i ++) { + + i2c_pci_adap[i].owner = THIS_MODULE; + i2c_pci_adap[i].class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + + i2c_pci_adap[i].algo_data = &fpgalogic_i2c[i]; + /* /dev/i2c-600 ~ /dev/i2c-615 for FPGA LOGIC I2C channel controller 1-7 */ + i2c_pci_adap[i].nr = i+600; + sprintf( i2c_pci_adap[ i ].name, "i2c-pci-%d", i ); + /* Add the bus via the algorithm code */ + if( i2c_pci_add_bus( &i2c_pci_adap[ i ] ) != 0 ) + { + PRINT("Cannot add bus %d to algorithm layer\n", i ); + return( -ENODEV ); + } + i2c_set_adapdata(&i2c_pci_adap[i], &fpgalogic_i2c[i]); + + PRINT( "Registered bus id: %s\n", kobject_name(&i2c_pci_adap[ i ].dev.kobj)); + } + + return 0; +} + +static void i2c_pci_deinit(void) +{ + int i; + for( i = 0; i < total_i2c_pci_bus; i++ ){ + i2c_del_adapter(&i2c_pci_adap[i]); + } + +} + +/* Find upstream PCIe root node. + * Used for re-training and disabling AER. */ +static struct pci_dev* find_upstream_dev (struct pci_dev *dev) +{ + struct pci_bus *bus = 0; + struct pci_dev *bridge = 0; + struct pci_dev *cur = 0; + int found_dev = 0; + + bus = dev->bus; + if (bus == 0) { + PRINT ( "Device doesn't have an associated bus!\n"); + return 0; + } + + bridge = bus->self; + if (bridge == 0) { + PRINT ( "Can't get the bridge for the bus!\n"); + return 0; + } + + PRINT ( "Upstream device %x/%x, bus:slot.func %02x:%02x.%02x\n", + bridge->vendor, bridge->device, + bridge->bus->number, PCI_SLOT(bridge->devfn), PCI_FUNC(bridge->devfn)); + + PRINT ( "List of downstream devices:"); + list_for_each_entry (cur, &bus->devices, bus_list) { + if (cur != 0) { + PRINT ( " %x/%x", cur->vendor, cur->device); + if (cur == dev) { + found_dev = 1; + } + } + } + PRINT ( "\n"); + if (found_dev) { + return bridge; + } else { + PRINT ( "Couldn't find upstream device!\n"); + return 0; + } +} + + +static int scan_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev) +{ + int i; + + for (i = 0; i < PCI_NUM_BARS; i++) { + unsigned long bar_start = pci_resource_start(dev, i); + if (bar_start) { + unsigned long bar_end = pci_resource_end(dev, i); + unsigned long bar_flags = pci_resource_flags(dev, i); + PRINT ( "BAR[%d] 0x%08lx-0x%08lx flags 0x%08lx", + i, bar_start, bar_end, bar_flags); + } + } + + return 0; +} + + +/** + * Map the device memory regions into kernel virtual address space + * after verifying their sizes respect the minimum sizes needed, given + * by the bar_min_len[] array. + */ +static int map_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev) +{ + int i; + + for (i = 0; i < PCI_NUM_BARS; i++){ + phys_addr_t bar_start = pci_resource_start(dev, i); + phys_addr_t bar_end = pci_resource_end(dev, i); + unsigned long bar_length = bar_end - bar_start + 1; + fpgapci->bar_length[i] = bar_length; + + + if (!bar_start || !bar_end) { + fpgapci->bar_length[i] = 0; + continue; + } + + if (bar_length < 1) { + PRINT ( "BAR #%d length is less than 1 byte\n", i); + continue; + } + + PRINT ( "bar_start=%llx, bar_end=%llx, bar_length=%lx, flag=%lx\n", bar_start, + bar_end, bar_length, pci_resource_flags(dev, i)); + + /* map the device memory or IO region into kernel virtual + * address space */ + fpgapci->bar[i] = ioremap_nocache (bar_start + FPGALOGIC_I2C_BASE, I2C_PCI_MAX_BUS * FPGALOGIC_CH_OFFSET); + + if (!fpgapci->bar[i]) { + PRINT ( "Could not map BAR #%d.\n", i); + return -1; + } + + PRINT ( "BAR[%d] mapped at 0x%p with length %lu.", i, + fpgapci->bar[i], bar_length); + + if(i == 0) //FPGA register is in the BAR[0] + { + + fpga_phys_addr = bar_start; + fpga_ctl_addr = ioremap_nocache (bar_start, FPGA_CTL_REG_SIZE); + fpga_base_addr = fpgapci->bar[i]; + } + + PRINT ( "BAR[%d] mapped at 0x%p with length %lu.\n", i, + fpgapci->bar[i], bar_length); + } + return 0; +} + +static void free_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev) +{ + int i; + + for (i = 0; i < PCI_NUM_BARS; i++) { + if (fpgapci->bar[i]) { + pci_iounmap(dev, fpgapci->bar[i]); + fpgapci->bar[i] = NULL; + } + } +} + +#define FPGA_PCI_NAME "FPGA_PCI" + +/** + * @brief Register specific function with msi interrupt line + * @param dev Pointer to pci-device, which should be allocated + * @param int interrupt number relative to global interrupt number + * @return Returns error code or zero if success + * */ +static int register_intr_handler(struct pci_dev *dev, int irq_num_id) +{ + int err = 0; + struct fpgapci_dev *fpgapci = 0; + + fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&dev->dev); + if (fpgapci == 0) { + PRINT ( ": fpgapci_dev is 0\n"); + return err; + } + + if ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_00) { + /* Request interrupt line for unique function + * alternatively function will be called from free_irq as well + * with flag IRQF_SHARED */ + switch(irq_num_id) { + /* Currently we only support test vector 2 for FPGA Logic I2C channel + * controller 1-7 interrupt*/ + case FPGA_MSI_VECTOR_ID_4: + err = request_irq(dev->irq + irq_num_id, fpgaport_1_32_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, dev); + PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_5: + err = request_irq(dev->irq + irq_num_id, fpgaport_33_64_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, dev); + PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_8: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[0]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_9: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[1]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_10: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[2]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_11: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[3]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_12: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[4]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_13: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[5]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_14: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[6]); + fpgapci->irq_assigned++; + break; + + default: + PRINT("No more interrupt handler for number (%d)\n", + dev->irq + irq_num_id); + break; + } + } else if (((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_01) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_02) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_03)) { + /* FPGA SPEC 4.3.1.34, First i2c channel mapped to vector 8 */ + switch (irq_num_id) { + case FPGA_MSI_VECTOR_ID_4: + err = request_irq(dev->irq + irq_num_id, fpgaport_1_32_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, dev); + PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_5: + err = request_irq(dev->irq + irq_num_id, fpgaport_33_64_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, dev); + PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_8: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[0]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_9: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[1]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_10: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[2]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_11: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[3]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_12: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[4]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_13: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_5) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[5]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_14: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_5) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[6]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_15: + /*it is an external interrupt number. Ignore this case */ + break; + case FPGA_MSI_VECTOR_ID_16: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_7) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[7]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_17: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_8) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[8]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_18: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_8) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[9]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_19: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_10) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[10]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_20: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_10) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[11]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_21: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[12]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_22: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[13]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_23: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[14]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_24: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[15]); + fpgapci->irq_assigned++; + } + break; + + default: + PRINT("No more interrupt handler for number (%d)\n", + dev->irq + irq_num_id); + break; + } + } + + return err; +} +/* Mask for MSI Multi message enable bits */ +#define MSI_MME 0x70 +/** + * These enums define the type of interrupt scheme that the overall + * system uses. + */ +enum fpga_irq_type { + INT_MSI_SINGLE, + INT_MSI_MULTI, + INT_MSIX, + INT_NONE, + INT_FENCE /* Last item to guard from loop run-overs */ +}; +/** + * @def PCI_DEVICE_STATUS + * define the offset for STS register + * from the start of PCI config space as specified in the + * NVME_Comliance 1.0b. offset 06h:STS - Device status. + * This register has error status for NVME PCI Exress + * Card. After reading data from this reagister, the driver + * will identify if any error is set during the operation and + * report as kernel alert message. + */ +#define PCI_DEVICE_STATUS 0x6 +/** + * @def NEXT_MASK + * This indicates the location of the next capability item + * in the list. + */ +#define NEXT_MASK 0xFF00 +/** + * @def MSIXCAP_ID + * This bit indicates if the pointer leading to this position + * is a capability. + */ +#define MSIXCAP_ID 0x11 +/** + * @def MSICAP_ID + * This bit indicates if the pointer leading to this position + * is a capability. + */ +#define MSICAP_ID 0x5 + +/** + * @def CL_MASK + * This bit position indicates Capabilities List of the controller + * The controller should support the PCI Power Management cap as a + * minimum. + */ +#define CL_MASK 0x0010 + +/** + * @def CAP_REG + * Set to offset defined in NVME Spec 1.0b. + */ +#define CAP_REG 0x34 +static void msi_set_enable(struct pci_dev *dev, int enable) +{ + int pos,maxvec; + u16 control; + int request_private_bits = 4; + + pos = pci_find_capability(dev, PCI_CAP_ID_MSI); + + if (pos) { + pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); + maxvec = 1 << ((control & PCI_MSI_FLAGS_QMASK) >> 1); + PRINT("control = 0x%x maxvec = 0x%x\n", control, maxvec); + control &= ~PCI_MSI_FLAGS_ENABLE; + + + /* + * The PCI 2.3 spec mandates that there are at most 32 + * interrupts. If this device asks for more, only give it one. + */ + if (request_private_bits > 5) { + request_private_bits = 0; + } + + /* Update the number of IRQs the device has available to it */ + control &= ~PCI_MSI_FLAGS_QSIZE; + control |= (request_private_bits << 4); + + pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control); + } +} +/** + * @brief Enables pcie-device and claims/remaps neccessary bar resources + * @param dev Pointer to pci-device, which should be allocated + * @return Returns error code or zero if success + * */ +static int fpgapci_setup_device(struct fpgapci_dev *fpgapci,struct pci_dev *dev) +{ + int err = 0; + + /* wake up the pci device */ + err = pci_enable_device(dev); + if(err) { + PRINT("failed to enable pci device %d\n", err); + goto error_pci_en; + } + + /* on platforms with buggy ACPI, pdev->msi_enabled may be set to + * allow pci_enable_device to work. This indicates INTx was not routed + * and only MSI should be used + */ + + pci_set_master(dev); + + /* Setup the BAR memory regions */ + err = pci_request_regions(dev, DRIVER_NAME); + if (err) { + PRINT("failed to enable pci device %d\n", err); + goto error_pci_req; + } + + scan_bars(fpgapci, dev); + + if (map_bars(fpgapci, dev)) { + goto fail_map_bars; + } + + i2c_pci_init(); + + return 0; + /* ERROR HANDLING */ +fail_map_bars: + pci_release_regions(dev); +error_pci_req: + pci_disable_device(dev); +error_pci_en: + return -ENODEV; +} + +static int fpgapci_configure_msi(struct fpgapci_dev *fpgapci,struct pci_dev *dev) +{ + int err = 0, i; + int request_vec; + + msi_set_enable(dev,1); + PRINT("Check MSI capability after msi_set_enable\n"); + + + /*Above 4.1.12*/ + request_vec = total_i2c_pci_bus; + err = pci_alloc_irq_vectors(dev, request_vec, pci_msi_vec_count(dev), + PCI_IRQ_MSI);//PCI_IRQ_AFFINITY | PCI_IRQ_MSI); + + if (err <= 0) { + PRINT("Cannot set MSI vector (%d)\n", err); + goto error_no_msi; + } else { + PRINT("Got %d MSI vectors starting at %d\n", err, dev->irq); + if ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_00) { + if (err < MSI_VECTOR_REV_00) { + goto error_disable_msi; + } + } else if (((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_01) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_02) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_03)) { + if (err < MSI_VECTOR_REV_01) { + goto error_disable_msi; + } + } + } + fpgapci->irq_first = dev->irq; + fpgapci->irq_length = err; + fpgapci->irq_assigned = 0; + + + for(i = 0; i < fpgapci->irq_length; i++) { + err = register_intr_handler(dev, i); + if (err) { + PRINT("Cannot request Interrupt number %d\n", i); + goto error_pci_req_irq; + } + } + + return 0; + +error_pci_req_irq: + for(i = 0; i < fpgapci->irq_assigned; i++) + { + PRINT("free_irq %d i =%d\n",fpgapci->irq_first + i,i); + if (i < 7) + free_irq(fpgapci->irq_first + 8 + i, &fpgalogic_i2c[i]); + else + free_irq(fpgapci->irq_first + 8 + i + 1, &fpgalogic_i2c[i]); + } +error_disable_msi: + pci_disable_msi(fpgapci->pci_dev); +error_no_msi: + return -ENOSPC; +} + +static int fpgapci_probe(struct pci_dev *dev, const struct pci_device_id *id) +{ + struct fpgapci_dev *fpgapci = 0; + int status = 0; + +#ifdef TEST + PRINT ( " vendor = 0x%x, device = 0x%x, class = 0x%x, bus:slot.func = %02x:%02x.%02x\n", + dev->vendor, dev->device, dev->class, + dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); +#endif + fpgapci = kzalloc(sizeof(struct fpgapci_dev), GFP_KERNEL); + + if (!fpgapci) { + PRINT( "Couldn't allocate memory!\n"); + goto fail_kzalloc; + } + + fpgapci->pci_dev = dev; + dev_set_drvdata(&dev->dev, (void*)fpgapci); + + status = sysfs_create_group(&dev->dev.kobj, &port_attr_grp); + if (status) { + printk(KERN_INFO "%s:Cannot create sysfs\n", __FUNCTION__); + } + + fpgapci->upstream = find_upstream_dev (dev); + + if(fpgapci_setup_device(fpgapci,dev)) { + goto error_no_device; + } + + if (use_irq) { + if(fpgapci_configure_msi(fpgapci,dev)) { + goto error_cannot_configure; + } + } + + + return 0; + /* ERROR HANDLING */ +error_cannot_configure: + printk("error_cannot_configure\n"); + free_bars (fpgapci, dev); + pci_release_regions(dev); + pci_disable_device(dev); +error_no_device: + i2c_pci_deinit(); + printk("error_no_device\n"); +fail_kzalloc: + return -1; + + +} + +static void fpgapci_remove(struct pci_dev *dev) +{ + struct fpgapci_dev *fpgapci = 0; + int i; + PRINT (": dev is %p\n", dev); + + if (dev == 0) { + PRINT ( ": dev is 0\n"); + return; + } + + fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&dev->dev); + if (fpgapci == 0) { + PRINT ( ": fpgapci_dev is 0\n"); + return; + } + i2c_pci_deinit(); + // + if (use_irq) + { + for(i = 0; i < fpgapci->irq_assigned; i++) + { + PRINT("free_irq %d i =%d\n",fpgapci->irq_first + i,i); + if (i < 7) + free_irq(fpgapci->irq_first + 8 + i, &fpgalogic_i2c[i]); + else + free_irq(fpgapci->irq_first + 8 + i + 1, &fpgalogic_i2c[i]); + } + } + pci_disable_msi(fpgapci->pci_dev); + free_bars (fpgapci, dev); + pci_disable_device(dev); + pci_release_regions(dev); + + kfree (fpgapci); +} + +static const struct pci_device_id fpgapci_ids[] = { + {PCI_DEVICE(PCI_VENDOR_ID_XILINX, DEVICE)}, + {0, }, +}; + +MODULE_DEVICE_TABLE(pci, fpgapci_ids); + +static struct pci_driver fpgapci_driver = { + .name = DRIVER_NAME, + .id_table = fpgapci_ids, + .probe = fpgapci_probe, + .remove = fpgapci_remove, + /* resume, suspend are optional */ +}; + +/* Initialize the driver module (but not any device) and register + * the module with the kernel PCI subsystem. */ +static int __init fpgapci_init(void) +{ + + if (pci_register_driver(&fpgapci_driver)) { + PRINT("pci_unregister_driver\n"); + pci_unregister_driver(&fpgapci_driver); + return -ENODEV; + } + + return 0; +} + +static void __exit fpgapci_exit(void) +{ + PRINT ("fpgapci_exit"); + + /* unregister this driver from the PCI bus driver */ + pci_unregister_driver(&fpgapci_driver); + +} + + +module_init (fpgapci_init); +module_exit (fpgapci_exit); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("joyce_yu@dell.com"); +MODULE_DESCRIPTION ("Driver for FPGA Logic I2C bus"); +MODULE_SUPPORTED_DEVICE ("FPGA Logic I2C bus"); diff --git a/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/check_qsfp.sh b/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/check_qsfp.sh new file mode 100755 index 00000000000..2028b8e6594 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/check_qsfp.sh @@ -0,0 +1,3 @@ +# Temporary dummy file for s5248f. +# Will be updated soon. + diff --git a/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/pcisysfs.py b/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/pcisysfs.py new file mode 100755 index 00000000000..047618e057c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/pcisysfs.py @@ -0,0 +1,102 @@ +#!/usr/bin/python +# Copyright (c) 2015 Dell Inc. +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. + +import struct +import sys +import getopt +from os import * +from mmap import * + +def usage(): + ''' This is the Usage Method ''' + + print '\t\t pcisysfs.py --get --offset --res ' + print '\t\t pcisysfs.py --set --val --offset --res ' + sys.exit(1) + +def pci_mem_read(mm,offset): + mm.seek(offset) + read_data_stream=mm.read(4) + print "" + reg_val=struct.unpack('I',read_data_stream) + print "reg_val read:%x"%reg_val + return reg_val + +def pci_mem_write(mm,offset,data): + mm.seek(offset) + print "data to write:%x"%data + mm.write(struct.pack('I',data)) + +def pci_set_value(resource,val,offset): + fd=open(resource,O_RDWR) + mm=mmap(fd,0) + pci_mem_write(mm,offset,val) + +def pci_get_value(resource,offset): + fd=open(resource,O_RDWR) + mm=mmap(fd,0) + pci_mem_read(mm,offset) + +def main(argv): + + ''' The main function will read the user input from the + command line argument and process the request ''' + + opts = '' + val = '' + choice = '' + resource = '' + offset = '' + + try: + opts, args = getopt.getopt(argv, "hgsv:" , \ + ["val=","res=","offset=","help", "get", "set"]) + + except getopt.GetoptError: + usage() + + for opt,arg in opts: + + if opt in ('-h','--help'): + choice = 'help' + + elif opt in ('-g', '--get'): + choice = 'get' + + elif opt in ('-s', '--set'): + choice = 'set' + + elif opt == '--res': + resource = arg + + elif opt == '--val': + val = int(arg,16) + + elif opt == '--offset': + offset = int(arg,16) + + if choice == 'set' and val != '' and offset !='' and resource !='': + pci_set_value(resource,val,offset) + + elif choice == 'get' and offset != '' and resource !='': + pci_get_value(resource,offset) + + else: + usage() + +#Calling the main method +if __name__ == "__main__": + main(sys.argv[1:]) + diff --git a/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/platform_sensors.py new file mode 100755 index 00000000000..6f7ba9b55b0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/platform_sensors.py @@ -0,0 +1,277 @@ +#!/usr/bin/python +# On S5248F, the BaseBoard Management Controller is an +# autonomous subsystem provides monitoring and management +# facility independent of the host CPU. IPMI standard +# protocol is used with ipmitool to fetch sensor details. +# Current script support X00 board only. X01 support will +# be added soon. This provies support for the +# following objects: +# * Onboard temperature sensors +# * FAN trays +# * PSU + + +import os +import sys +import logging +import subprocess +import commands + +S5248F_MAX_FAN_TRAYS = 4 +S5248F_MAX_PSUS = 2 +IPMI_SENSOR_DATA = "ipmitool sdr list" +IPMI_SENSOR_DUMP = "/tmp/sdr" + +FAN_PRESENCE = "FAN{0}_prsnt" +PSU_PRESENCE = "PSU{0}_stat" +# Use this for older firmware +# PSU_PRESENCE="PSU{0}_prsnt" + +IPMI_PSU1_DATA_DOCKER = "ipmitool raw 0x04 0x2d 0x31 | awk '{print substr($0,9,1)}'" +IPMI_PSU2_DATA_DOCKER = "ipmitool raw 0x04 0x2d 0x32 | awk '{print substr($0,9,1)}'" +ipmi_sdr_list = "" + +# Dump sensor registers + + +def ipmi_sensor_dump(): + + status = 1 + global ipmi_sdr_list + ipmi_cmd = IPMI_SENSOR_DATA + status, ipmi_sdr_list = commands.getstatusoutput(ipmi_cmd) + + if status: + logging.error('Failed to execute:' + ipmi_sdr_list) + sys.exit(0) + +# Fetch a BMC register + + +def get_pmc_register(reg_name): + + output = None + for item in ipmi_sdr_list.split("\n"): + if reg_name in item: + output = item.strip() + + if output is None: + print('\nFailed to fetch: ' + reg_name + ' sensor ') + sys.exit(0) + + output = output.split('|')[1] + + logging.basicConfig(level=logging.DEBUG) + return output + + +# Print the information for temperature sensors + + +def print_temperature_sensors(): + + print("\nOnboard Temperature Sensors:") + + print ' PT_Left_temp: ',\ + (get_pmc_register('PT_Left_temp')) + print ' PT_Mid_temp: ',\ + (get_pmc_register('PT_Mid_temp')) + print ' PT_Right_temp: ',\ + (get_pmc_register('PT_Right_temp')) + print ' Broadcom Temp: ',\ + (get_pmc_register('NPU_Near_temp')) + print ' Inlet Airflow Temp: ',\ + (get_pmc_register('ILET_AF_temp')) + print ' CPU Temp: ',\ + (get_pmc_register('CPU_temp')) + +ipmi_sensor_dump() + +print_temperature_sensors() + +# Print the information for 1 Fan Tray + + +def print_fan_tray(tray): + + Fan_Status = [' Normal', ' Abnormal'] + Airflow_Direction = ['B2F', 'F2B'] + + print ' Fan Tray ' + str(tray) + ':' + + if (tray == 1): + + fan1_status = int(get_pmc_register('FAN1_Front_stat'), 16) + fan2_status = int(get_pmc_register('FAN1_Rear_stat'), 16) + + print ' Fan1 Speed: ',\ + get_pmc_register('FAN1_Front_rpm') + print ' Fan2 Speed: ',\ + get_pmc_register('FAN1_Rear_rpm') + print ' Fan1 State: ',\ + Fan_Status[fan1_status] + print ' Fan2 State: ',\ + Fan_Status[fan2_status] + + elif (tray == 2): + + fan1_status = int(get_pmc_register('FAN2_Front_stat'), 16) + fan2_status = int(get_pmc_register('FAN2_Rear_stat'), 16) + + print ' Fan1 Speed: ',\ + get_pmc_register('FAN2_Front_rpm') + print ' Fan2 Speed: ',\ + get_pmc_register('FAN2_Rear_rpm') + print ' Fan1 State: ',\ + Fan_Status[fan1_status] + print ' Fan2 State: ',\ + Fan_Status[fan2_status] + + elif (tray == 3): + + fan1_status = int(get_pmc_register('FAN3_Front_stat'), 16) + fan2_status = int(get_pmc_register('FAN3_Rear_stat'), 16) + + print ' Fan1 Speed: ',\ + get_pmc_register('FAN3_Front_rpm') + print ' Fan2 Speed: ',\ + get_pmc_register('FAN3_Rear_rpm') + print ' Fan1 State: ',\ + Fan_Status[fan1_status] + print ' Fan2 State: ',\ + Fan_Status[fan2_status] + + elif (tray == 4): + + fan1_status = int(get_pmc_register('FAN4_Front_stat'), 16) + fan2_status = int(get_pmc_register('FAN4_Rear_stat'), 16) + + print ' Fan1 Speed: ',\ + get_pmc_register('FAN4_Front_rpm') + print ' Fan2 Speed: ',\ + get_pmc_register('FAN4_Rear_rpm') + print ' Fan1 State: ',\ + Fan_Status[fan1_status] + print ' Fan2 State: ',\ + Fan_Status[fan2_status] + + +print('\nFan Trays:') + +for tray in range(1, S5248F_MAX_FAN_TRAYS + 1): + fan_presence = FAN_PRESENCE.format(tray) + if (get_pmc_register(fan_presence)): + print_fan_tray(tray) + else: + print '\n Fan Tray ' + str(tray + 1) + ': Not present' + + def get_psu_presence(index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + ret_status = 1 + + if index == 1: + status, ipmi_cmd_ret = commands.getstatusoutput(IPMI_PSU1_DATA_DOCKER) + elif index == 2: + ret_status, ipmi_cmd_ret = commands.getstatusoutput(IPMI_PSU2_DATA_DOCKER) + + #if ret_status: + # print ipmi_cmd_ret + # logging.error('Failed to execute ipmitool') + # sys.exit(0) + + psu_status = ipmi_cmd_ret + + if psu_status == '1': + status = 1 + + return status + + +# Print the information for PSU1, PSU2 +def print_psu(psu): + Psu_Type = ['Normal', 'Mismatch'] + Psu_Input_Type = ['AC', 'DC'] + PSU_STATUS_TYPE_BIT = 4 + PSU_STATUS_INPUT_TYPE_BIT = 1 + PSU_FAN_PRESENT_BIT = 2 + PSU_FAN_STATUS_BIT = 1 + PSU_FAN_AIR_FLOW_BIT = 0 + Psu_Fan_Presence = ['Present', 'Absent'] + Psu_Fan_Status = ['Normal', 'Abnormal'] + Psu_Fan_Airflow = ['B2F', 'F2B'] + + # print ' Input: ', Psu_Input_Type[psu_input_type] + # print ' Type: ', Psu_Type[psu_type] + + # PSU FAN details + if (psu == 1): + + # psu1_fan_status = int(get_pmc_register('PSU1_status'),16) + + print ' PSU1:' + print ' FAN Normal Temperature: ',\ + get_pmc_register('PSU1_temp') + print ' FAN AirFlow Temperature: ',\ + get_pmc_register('PSU1_AF_temp') + print ' FAN RPM: ',\ + get_pmc_register('PSU1_rpm') + # print ' FAN Status: ', Psu_Fan_Status[psu1_fan_status] + + # PSU input & output monitors + print ' Input Voltage: ',\ + get_pmc_register('PSU1_In_volt') + print ' Output Voltage: ',\ + get_pmc_register('PSU1_Out_volt') + print ' Input Power: ',\ + get_pmc_register('PSU1_In_watt') + print ' Output Power: ',\ + get_pmc_register('PSU1_Out_watt') + print ' Input Current: ',\ + get_pmc_register('PSU1_In_amp') + print ' Output Current: ',\ + get_pmc_register('PSU1_Out_amp') + + else: + + # psu2_fan_status = int(get_pmc_register('PSU1_status'),16) + print ' PSU2:' + print ' FAN Normal Temperature: ',\ + get_pmc_register('PSU2_temp') + print ' FAN AirFlow Temperature: ',\ + get_pmc_register('PSU2_AF_temp') + print ' FAN RPM: ',\ + get_pmc_register('PSU2_rpm') + # print ' FAN Status: ', Psu_Fan_Status[psu2_fan_status] + + # PSU input & output monitors + print ' Input Voltage: ',\ + get_pmc_register('PSU2_In_volt') + print ' Output Voltage: ',\ + get_pmc_register('PSU2_Out_volt') + print ' Input Power: ',\ + get_pmc_register('PSU2_In_watt') + print ' Output Power: ',\ + get_pmc_register('PSU2_Out_watt') + print ' Input Current: ',\ + get_pmc_register('PSU2_In_amp') + print ' Output Current: ',\ + get_pmc_register('PSU2_Out_amp') + + +print('\nPSUs:') +for psu in range(1, S5248F_MAX_PSUS + 1): + #psu_presence = PSU_PRESENCE.format(psu) + if (get_psu_presence(psu)): + print_psu(psu) + else: + print '\n PSU ', psu, 'Not present' + +print '\n Total Power: ',\ + get_pmc_register('PSU_Total_watt') + diff --git a/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/qsfp_irq_enable.py b/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/qsfp_irq_enable.py new file mode 100755 index 00000000000..5050475f987 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/qsfp_irq_enable.py @@ -0,0 +1,32 @@ +#!/usr/bin/python + +try: + import struct + import sys + from os import * + from mmap import * + +except ImportError as e: + raise ImportError("%s - required module no found" % str(e)) + +BASE_RES_PATH = "/sys/bus/pci/devices/0000:04:00.0/resource0" +PORT_START = 0 +PORT_END = 32 + + +def pci_mem_write(mm, offset, data): + mm.seek(offset) + mm.write(struct.pack('I', data)) + + +def pci_set_value(resource, val, offset): + fd = open(resource, O_RDWR) + mm = mmap(fd, 0) + val = pci_mem_write(mm, offset, val) + mm.close() + close(fd) + return val + +for port_num in range(PORT_START, PORT_END+1): + port_offset = 0x400c + ((port_num) * 16) + pci_set_value(BASE_RES_PATH, 0x30, port_offset) diff --git a/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/s5248f_platform.sh b/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/s5248f_platform.sh new file mode 100755 index 00000000000..e74a3d6c40d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/s5248f_platform.sh @@ -0,0 +1,161 @@ +#!/bin/bash + +init_devnum() { + found=0 + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + # iSMT adapter can be at either dffd0000 or dfff0000 + if [[ $devname == 'SMBus iSMT adapter at '* ]]; then + found=1 + break + fi + done + + [ $found -eq 0 ] && echo "cannot find iSMT" && exit 1 +} + +# Attach/Detach syseeprom on CPU board +sys_eeprom() { + case $1 in + "new_device") echo 24c16 0x50 > /sys/bus/i2c/devices/i2c-0/$1 + ;; + "delete_device") echo 0x50 > /sys/bus/i2c/devices/i2c-0/$1 + ;; + *) echo "s5248f_platform: sys_eeprom : invalid command !" + ;; + esac +} + +#Attach/Detach the MUX connecting all QSFPs +switch_board_qsfp_mux() { + case $1 in + "new_device") + for ((i=603;i<=610;i++)); + do + echo "Attaching PCA9548 @ 0x74" + echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-$i/$1 + done + + ;; + "delete_device") + for ((i=603;i<=610;i++)); + do + echo "Detaching PCA9548 @ 0x74" + echo 0x74 > /sys/bus/i2c/devices/i2c-$i/$1 + done + + ;; + *) echo "s5248f_platform: switch_board_qsfp_mux: invalid command !" + ;; + esac + sleep 2 +} + +#Attach/Detach 64 instances of EEPROM driver QSFP ports +#eeprom can dump data using below command +switch_board_qsfp() { + case $1 in + "new_device") + for ((i=2;i<=57;i++)); + do + echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-$i/$1 + done + ;; + + "delete_device") + for ((i=2;i<=57;i++)); + do + echo 0x50 > /sys/bus/i2c/devices/i2c-$i/$1 + done + ;; + + *) echo "s5248f_platform: switch_board_qsfp: invalid command !" + ;; + esac +} + +#Modsel 64 ports to applicable QSFP type modules +#This enables the adapter to respond for i2c commands +switch_board_modsel() { + resource="/sys/bus/pci/devices/0000:04:00.0/resource0" + for ((i=1;i<=64;i++)); + do + port_addr=$(( 16384 + ((i - 1) * 16))) + hex=$( printf "0x%x" $port_addr ) + python /usr/bin/pcisysfs.py --set --offset $hex --val 0x10 --res $resource > /dev/null 2>&1 + done +} + +platform_firmware_versions() { + FIRMWARE_VERSION_FILE=/var/log/firmware_versions + rm -rf ${FIRMWARE_VERSION_FILE} + echo "BIOS: `dmidecode -s system-version `" > $FIRMWARE_VERSION_FILE + ## Get FPGA version + r=`/usr/bin/pcisysfs.py --get --offset 0x00 --res /sys/bus/pci/devices/0000\:04\:00.0/resource0 | sed '1d; s/.*\(....\)$/\1/; s/\(..\{1\}\)/\1./'` + r_min=$(echo $r | sed 's/.*\(..\)$/0x\1/') + r_maj=$(echo $r | sed 's/^\(..\).*/0x\1/') + echo "FPGA: $((r_maj)).$((r_min))" >> $FIRMWARE_VERSION_FILE + + ## Get BMC Firmware Revision + r=`cat /sys/class/ipmi/ipmi0/device/bmc/firmware_revision` + echo "BMC: $r" >> $FIRMWARE_VERSION_FILE + + #System CPLD 0x31 on i2c bus 601 ( physical FPGA I2C-2) + r_min=`/usr/sbin/i2cget -y 601 0x31 0x0 | sed ' s/.*\(0x..\)$/\1/'` + r_maj=`/usr/sbin/i2cget -y 601 0x31 0x1 | sed ' s/.*\(0x..\)$/\1/'` + echo "System CPLD: $((r_maj)).$((r_min))" >> $FIRMWARE_VERSION_FILE + + #Slave CPLD 1 0x30 on i2c bus 600 ( physical FPGA I2C-1) + r_min=`/usr/sbin/i2cget -y 600 0x30 0x0 | sed ' s/.*\(0x..\)$/\1/'` + r_maj=`/usr/sbin/i2cget -y 600 0x30 0x1 | sed ' s/.*\(0x..\)$/\1/'` + echo "Slave CPLD 1: $((r_maj)).$((r_min))" >> $FIRMWARE_VERSION_FILE + + #Slave CPLD 2 0x31 on i2c bus 600 ( physical FPGA I2C-1) + r_min=`/usr/sbin/i2cget -y 600 0x31 0x0 | sed ' s/.*\(0x..\)$/\1/'` + r_maj=`/usr/sbin/i2cget -y 600 0x31 0x1 | sed ' s/.*\(0x..\)$/\1/'` + echo "Slave CPLD 2: $((r_maj)).$((r_min))" >> $FIRMWARE_VERSION_FILE + + #Slave CPLD 3 0x32 on i2c bus 600 ( physical FPGA I2C-1) + r_min=`/usr/sbin/i2cget -y 600 0x32 0x0 | sed ' s/.*\(0x..\)$/\1/'` + r_maj=`/usr/sbin/i2cget -y 600 0x32 0x1 | sed ' s/.*\(0x..\)$/\1/'` + echo "Slave CPLD 3: $((r_maj)).$((r_min))" >> $FIRMWARE_VERSION_FILE + + #Slave CPLD 3 0x32 on i2c bus 600 ( physical FPGA I2C-1) + r_min=`/usr/sbin/i2cget -y 600 0x33 0x0 | sed ' s/.*\(0x..\)$/\1/'` + r_maj=`/usr/sbin/i2cget -y 600 0x33 0x1 | sed ' s/.*\(0x..\)$/\1/'` + echo "Slave CPLD 4: $((r_maj)).$((r_min))" >> $FIRMWARE_VERSION_FILE +} + +#This enables the led control for CPU and default states +switch_board_led_default() { + resource="/sys/bus/pci/devices/0000:04:00.0/resource0" + python /usr/bin/pcisysfs.py --set --offset 0x24 --val 0x194 --res $resource > /dev/null 2>&1 +} +init_devnum + +if [ "$1" == "init" ]; then + modprobe i2c-dev + modprobe i2c-mux-pca954x force_deselect_on_exit=1 + modprobe ipmi_devintf + modprobe ipmi_si + modprobe i2c_ocores + modprobe dell_s5248f_fpga_ocores + sys_eeprom "new_device" + switch_board_qsfp_mux "new_device" + switch_board_qsfp "new_device" + switch_board_modsel + switch_board_led_default + #python /usr/bin/qsfp_irq_enable.py + platform_firmware_versions + +elif [ "$1" == "deinit" ]; then + sys_eeprom "delete_device" + switch_board_qsfp "delete_device" + switch_board_qsfp_mux "delete_device" + + modprobe -r i2c-mux-pca954x + modprobe -r i2c-dev +else + echo "s5248f_platform : Invalid option !" +fi + diff --git a/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/sensors b/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/sensors new file mode 100755 index 00000000000..ee53f2b0f32 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5248f/scripts/sensors @@ -0,0 +1,8 @@ +#!/bin/bash +docker exec -i pmon sensors "$@" +docker exec -i pmon /usr/bin/platform_sensors.py "$@" + +#To probe sensors not part of lm-sensors +#if [ -r /usr/local/bin/platform_sensors.py ]; then +# python /usr/local/bin/platform_sensors.py +#fi diff --git a/platform/broadcom/sonic-platform-modules-dell/s5248f/systemd/platform-modules-s5248f.service b/platform/broadcom/sonic-platform-modules-dell/s5248f/systemd/platform-modules-s5248f.service new file mode 100644 index 00000000000..ec3ea09f00a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s5248f/systemd/platform-modules-s5248f.service @@ -0,0 +1,13 @@ +[Unit] +Description=Dell S5248f Platform modules +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/s5248f_platform.sh init +ExecStop=/usr/local/bin/s5248f_platform.sh deinit +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/LICENSE b/platform/broadcom/sonic-platform-modules-dell/s6000/LICENSE new file mode 100644 index 00000000000..676cdeec726 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/LICENSE @@ -0,0 +1,15 @@ +Copyright (C) 2016 Microsoft, Inc + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/MAINTAINERS b/platform/broadcom/sonic-platform-modules-dell/s6000/MAINTAINERS new file mode 100644 index 00000000000..65e3129fcc1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/MAINTAINERS @@ -0,0 +1,7 @@ +# This file describes the maintainers for sonic-platform-modules-s6000 +# See the SONiC project governance document for more information + +Name = "Shuotian Cheng" +Email = "shuche@microsoft.com" +Github = stcheng +Mailinglist = sonicproject@googlegroups.com diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/README.md b/platform/broadcom/sonic-platform-modules-dell/s6000/README.md new file mode 100644 index 00000000000..7913d168a30 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/README.md @@ -0,0 +1,2 @@ +# sonic-platform-modules-s6000 +Device drivers for support of Dell S6000 for the SONiC project diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/modules/Makefile b/platform/broadcom/sonic-platform-modules-dell/s6000/modules/Makefile new file mode 100644 index 00000000000..12e80d01010 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/modules/Makefile @@ -0,0 +1 @@ +obj-m := dell_s6000_platform.o diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/modules/dell_s6000_platform.c b/platform/broadcom/sonic-platform-modules-dell/s6000/modules/dell_s6000_platform.c new file mode 100644 index 00000000000..e8bcd312168 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/modules/dell_s6000_platform.c @@ -0,0 +1,1380 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define S6000_MUX_BASE_NR 10 +#define QSFP_MODULE_BASE_NR 20 + +/* 74CBTLV3253 Dual 1-of-4 multiplexer/demultiplexer */ +#define MUX_CHANNEL_NUM 2 + +#define CPLD_DEVICE_NUM 3 +#define QSFP_MODULE_NUM 16 +#define QSFP_DEVICE_NUM 2 + +#define GPIO_I2C_MUX_PIN 10 + +#define RTC_NVRAM_REBOOT_REASON_OFFSET 0x49 + +static void device_release(struct device *dev) +{ + return; +} + +/* + * S6000 74CBTLV3253 MUX + */ +static const unsigned s6000_mux_gpios[] = { + 1, 2 +}; + +static const unsigned s6000_mux_values[] = { + 0, 1, 2, 3 +}; + +static struct i2c_mux_gpio_platform_data s6000_mux_platform_data = { + .parent = 2, + .base_nr = S6000_MUX_BASE_NR, + .values = s6000_mux_values, + .n_values = ARRAY_SIZE(s6000_mux_values), + .gpios = s6000_mux_gpios, + .n_gpios = ARRAY_SIZE(s6000_mux_gpios), + .idle = 0, +}; + +static struct platform_device s6000_mux = { + .name = "i2c-mux-gpio", + .id = 0, + .dev = { + .platform_data = &s6000_mux_platform_data, + .release = device_release + }, +}; + +/* + * S6000 CPLD + */ + +enum cpld_type { + system_cpld, + master_cpld, + slave_cpld, +}; + +struct cpld_platform_data { + int reg_addr; + struct i2c_client *client; +}; + +static struct cpld_platform_data s6000_cpld_platform_data[] = { + [system_cpld] = { + .reg_addr = 0x31, + }, + + [master_cpld] = { + .reg_addr = 0x32, + }, + + [slave_cpld] = { + .reg_addr = 0x33, + }, +}; + +static struct platform_device s6000_cpld = { + .name = "dell-s6000-cpld", + .id = 0, + .dev = { + .platform_data = s6000_cpld_platform_data, + .release = device_release + }, +}; + +/* + * S6000 QSFP MUX + */ + +struct qsfp_mux_platform_data { + int parent; + int base_nr; + int reg_addr; + struct i2c_client *cpld; +}; + +struct qsfp_mux { + struct qsfp_mux_platform_data data; +}; + +static struct qsfp_mux_platform_data s6000_qsfp_mux_platform_data[] = { + { + .parent = S6000_MUX_BASE_NR + 2, + .base_nr = QSFP_MODULE_BASE_NR, + .cpld = NULL, + .reg_addr = 0x0, + }, + { + .parent = S6000_MUX_BASE_NR + 3, + .base_nr = QSFP_MODULE_BASE_NR + QSFP_MODULE_NUM, + .cpld = NULL, + .reg_addr = 0xa, + }, +}; + +static struct platform_device s6000_qsfp_mux[] = { + { + .name = "dell-s6000-qsfp-mux", + .id = 0, + .dev = { + .platform_data = &s6000_qsfp_mux_platform_data[0], + .release = device_release, + }, + }, + { + .name = "dell-s6000-qsfp-mux", + .id = 1, + .dev = { + .platform_data = &s6000_qsfp_mux_platform_data[1], + .release = device_release, + }, + }, +}; + +static int cpld_reg_write_byte(struct i2c_client *client, u8 regaddr, u8 val) +{ + union i2c_smbus_data data; + + data.byte = val; + return client->adapter->algo->smbus_xfer(client->adapter, client->addr, + client->flags, + I2C_SMBUS_WRITE, + regaddr, I2C_SMBUS_BYTE_DATA, &data); +} + +static int qsfp_mux_select(struct i2c_mux_core *muxc, u32 chan) +{ + struct qsfp_mux *mux = i2c_mux_priv(muxc); + unsigned short mask = ~(unsigned short)(1 << chan); + + cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr, (u8)(mask & 0xff)); + return cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr + 1, (u8)(mask >> 8)); +} + +static int __init qsfp_mux_probe(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc; + struct qsfp_mux *mux; + struct qsfp_mux_platform_data *pdata; + struct i2c_adapter *parent; + int i, ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + mux = devm_kzalloc(&pdev->dev, sizeof(*mux), GFP_KERNEL); + if (!mux) { + return -ENOMEM; + } + + mux->data = *pdata; + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -EPROBE_DEFER; + } + + muxc = i2c_mux_alloc(parent, &pdev->dev, QSFP_MODULE_NUM, 0, 0, + qsfp_mux_select, NULL); + if (!muxc) { + ret = -ENOMEM; + goto alloc_failed; + } + muxc->priv = mux; + + platform_set_drvdata(pdev, muxc); + + for (i = 0; i < QSFP_MODULE_NUM; i++) { + int nr = pdata->base_nr + i; + unsigned int class = 0; + + ret = i2c_mux_add_adapter(muxc, nr, i, class); + if (ret) { + dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + goto add_adapter_failed; + } + } + + dev_info(&pdev->dev, "%d port mux on %s adapter\n", QSFP_MODULE_NUM, parent->name); + + return 0; + +add_adapter_failed: + i2c_mux_del_adapters(muxc); +alloc_failed: + i2c_put_adapter(parent); + + return ret; +} + +static int qsfp_mux_remove(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc = platform_get_drvdata(pdev); + + i2c_mux_del_adapters(muxc); + + i2c_put_adapter(muxc->parent); + + return 0; +} + +static struct platform_driver qsfp_mux_driver = { + .probe = qsfp_mux_probe, + .remove = qsfp_mux_remove, + .driver = { + .owner = THIS_MODULE, + .name = "dell-s6000-qsfp-mux", + }, +}; + +/* TODO */ +/* module_platform_driver */ + +static int dell_i2c_smbus_read_byte_data(const struct i2c_client *client, + u8 command) +{ + int ret = 0; + + ret = i2c_smbus_read_byte_data(client, command); + if(ret < 0) { + printk(KERN_WARNING "I2C smbus read failed. Resetting mux with gpio10"); + gpio_set_value(GPIO_I2C_MUX_PIN, 1); + gpio_set_value(GPIO_I2C_MUX_PIN, 0); + ret = i2c_smbus_read_byte_data(client, command); + } + return ret; +} + +static int dell_i2c_smbus_write_byte_data(const struct i2c_client *client, + u8 command, u8 value) +{ + int ret = 0; + + ret = i2c_smbus_write_byte_data(client, command, value); + if(ret < 0) + { + printk(KERN_WARNING "I2C smbus write failed. Resetting mux with gpio10"); + gpio_set_value(GPIO_I2C_MUX_PIN, 1); + gpio_set_value(GPIO_I2C_MUX_PIN, 0); + ret = i2c_smbus_write_byte_data(client, command, value); + } + return ret; +} + +static ssize_t get_modsel(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[slave_cpld].client, 0x0); + if (ret < 0) + return sprintf(buf, "na"); + data = (u32)ret & 0xff; + + ret = dell_i2c_smbus_read_byte_data(pdata[slave_cpld].client, 0x1); + if (ret < 0) + return sprintf(buf, "na"); + data |= (u32)(ret & 0xff) << 8; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0xa); + if (ret < 0) + return sprintf(buf, "na"); + data |= (u32)(ret & 0xff) << 16; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0xb); + if (ret < 0) + return sprintf(buf, "na"); + data |= (u32)(ret & 0xff) << 24; + + return sprintf(buf, "0x%08x\n", data); +} + +static ssize_t get_lpmode(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[slave_cpld].client, 0x2); + if (ret < 0) + return sprintf(buf, "na"); + data = (u32)ret & 0xff; + + ret = dell_i2c_smbus_read_byte_data(pdata[slave_cpld].client, 0x3); + if (ret < 0) + return sprintf(buf, "na"); + data |= (u32)(ret & 0xff) << 8; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0xc); + if (ret < 0) + return sprintf(buf, "na"); + data |= (u32)(ret & 0xff) << 16; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0xd); + if (ret < 0) + return sprintf(buf, "na"); + data |= (u32)(ret & 0xff) << 24; + + return sprintf(buf, "0x%08x\n", data); +} + +static ssize_t set_lpmode(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 16, &data); + if (err) + return err; + + dell_i2c_smbus_write_byte_data(pdata[slave_cpld].client, 0x2, (u8)(data & 0xff)); + dell_i2c_smbus_write_byte_data(pdata[slave_cpld].client, 0x3, (u8)((data >> 8) & 0xff)); + dell_i2c_smbus_write_byte_data(pdata[master_cpld].client, 0xc, (u8)((data >> 16) & 0xff)); + dell_i2c_smbus_write_byte_data(pdata[master_cpld].client, 0xd, (u8)((data >> 24) & 0xff)); + + return count; +} + +static ssize_t get_reset(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[slave_cpld].client, 0x6); + if (ret < 0) + return sprintf(buf, "na"); + data = (u32)ret & 0xff; + + ret = dell_i2c_smbus_read_byte_data(pdata[slave_cpld].client, 0x7); + if (ret < 0) + return sprintf(buf, "na"); + data |= (u32)(ret & 0xff) << 8; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x10); + if (ret < 0) + return sprintf(buf, "na"); + data |= (u32)(ret & 0xff) << 16; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x11); + if (ret < 0) + return sprintf(buf, "na"); + data |= (u32)(ret & 0xff) << 24; + + return sprintf(buf, "0x%08x\n", data); +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 16, &data); + if (err) + return err; + + dell_i2c_smbus_write_byte_data(pdata[slave_cpld].client, 0x6, (u8)(data & 0xff)); + dell_i2c_smbus_write_byte_data(pdata[slave_cpld].client, 0x7, (u8)((data >> 8)& 0xff)); + dell_i2c_smbus_write_byte_data(pdata[master_cpld].client, 0x10, (u8)((data >> 16) & 0xff)); + dell_i2c_smbus_write_byte_data(pdata[master_cpld].client, 0x11, (u8)((data >> 24) & 0xff)); + + return count; +} + +static ssize_t get_modprs(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[slave_cpld].client, 0x4); + if (ret < 0) + return sprintf(buf, "read error"); + data = (u32)ret & 0xff; + + ret = dell_i2c_smbus_read_byte_data(pdata[slave_cpld].client, 0x5); + if (ret < 0) + return sprintf(buf, "read error"); + data |= (u32)(ret & 0xff) << 8; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0xe); + if (ret < 0) + return sprintf(buf, "na"); + data |= (u32)(ret & 0xff) << 16; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0xf); + if (ret < 0) + return sprintf(buf, "na"); + data |= (u32)(ret & 0xff) << 24; + + return sprintf(buf, "0x%08x\n", data); +} + +static ssize_t set_power_reset(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 10, &data); + if (err) + return err; + + if (data) + { + dell_i2c_smbus_write_byte_data(pdata[system_cpld].client, 0x1, (u8)(0xfd)); + } + + return count; +} + +static ssize_t get_power_reset(struct device *dev, struct device_attribute *devattr, char *buf) +{ + uint8_t ret = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[system_cpld].client, 0x1); + if (ret < 0) + return sprintf(buf, "read error"); + + return sprintf(buf, "0x%x\n", ret); +} + +static ssize_t get_fan_prs(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x8); + if (ret < 0) + return sprintf(buf, "read error"); + data = (u32)((ret & 0xc0) >> 6); + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x9); + if (ret < 0) + return sprintf(buf, "read error"); + data |= (u32)((ret & 0x01) << 2); + data = ~data & 0x7; + + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t get_psu0_prs(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x3); + if (ret < 0) + return sprintf(buf, "read error"); + + if (!(ret & 0x80)) + data = 1; + + return sprintf(buf, "%d\n", data); +} + +static ssize_t get_psu1_prs(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x3); + if (ret < 0) + return sprintf(buf, "read error"); + + if (!(ret & 0x08)) + data = 1; + + return sprintf(buf, "%d\n", data); +} + +static ssize_t get_psu0_status(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x3); + if (ret < 0) + return sprintf(buf, "read error"); + + if (!(ret & 0x40)) + data = 1; + + return sprintf(buf, "%d\n", data); +} + +static ssize_t get_psu1_status(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x3); + if (ret < 0) + return sprintf(buf, "read error"); + + if (!(ret & 0x04)) + data = 1; + + return sprintf(buf, "%d\n", data); +} + +static ssize_t get_powersupply_status(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int data; + struct cpld_platform_data *pdata = dev->platform_data; + + data = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x3); + if (data < 0) + return sprintf(buf, "read error"); + + return sprintf(buf, "%x\n", data); +} + +static ssize_t get_system_led(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x7); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u32)(ret & 0x60) >> 5; + + switch (data) + { + case 0: + ret = sprintf(buf, "blink_green\n"); + break; + case 1: + ret = sprintf(buf, "green\n"); + break; + case 2: + ret = sprintf(buf, "yellow\n"); + break; + default: + ret = sprintf(buf, "blink_yellow\n"); + } + + return ret; +} + +static ssize_t set_system_led(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + if (!strncmp(buf, "blink_green", 11)) + { + data = 0; + } + else if (!strncmp(buf, "green", 5)) + { + data = 1; + } + else if (!strncmp(buf, "yellow", 6)) + { + data = 2; + } + else if (!strncmp(buf, "blink_yellow", 12)) + { + data = 3; + } + else + { + return -1; + } + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x7); + if (ret < 0) + return ret; + + dell_i2c_smbus_write_byte_data(pdata[master_cpld].client, 0x7, (u8)((ret & 0x9F) | (data << 5))); + + return count; +} + +static ssize_t get_locator_led(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x7); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u32)(ret & 0x18) >> 3; + + switch (data) + { + case 0: + ret = sprintf(buf, "off\n"); + break; + case 1: + ret = sprintf(buf, "blink_blue\n"); + break; + case 2: + ret = sprintf(buf, "blue\n"); + break; + default: + ret = sprintf(buf, "invalid\n"); + } + + return ret; +} + +static ssize_t set_locator_led(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + if (!strncmp(buf, "off", 3)) + { + data = 0; + } + else if (!strncmp(buf, "blink_blue", 10)) + { + data = 1; + } + else if (!strncmp(buf, "blue", 4)) + { + data = 2; + } + else + { + return -1; + } + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x7); + if (ret < 0) + return ret; + + dell_i2c_smbus_write_byte_data(pdata[master_cpld].client, 0x7, (u8)((ret & 0xE7) | (data << 3))); + + return count; +} + +static ssize_t get_power_led(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x7); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u32)(ret & 0x06) >> 1; + + switch (data) + { + case 0: + ret = sprintf(buf, "off\n"); + break; + case 1: + ret = sprintf(buf, "yellow\n"); + break; + case 2: + ret = sprintf(buf, "green\n"); + break; + default: + ret = sprintf(buf, "blink_yellow\n"); + } + + return ret; +} + +static ssize_t set_power_led(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + if (!strncmp(buf, "off", 3)) + { + data = 0; + } + else if (!strncmp(buf, "yellow", 6)) + { + data = 1; + } + else if (!strncmp(buf, "green", 5)) + { + data = 2; + } + else if (!strncmp(buf, "blink_yellow", 12)) + { + data = 3; + } + else + { + return -1; + } + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x7); + if (ret < 0) + return ret; + + dell_i2c_smbus_write_byte_data(pdata[master_cpld].client, 0x7, (u8)((ret & 0xF9) | (data << 1))); + + return count; +} + +static ssize_t get_master_led(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x7); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u32)(ret & 0x1); + + switch (data) + { + case 0: + ret = sprintf(buf, "green\n"); + break; + default: + ret = sprintf(buf, "off\n"); + break; + } + + return ret; +} + +static ssize_t set_master_led(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + if (!strncmp(buf, "green", 5)) + { + data = 0; + } + else if (!strncmp(buf, "off", 3)) + { + data = 1; + } + else + { + return -1; + } + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x7); + if (ret < 0) + return ret; + + dell_i2c_smbus_write_byte_data(pdata[master_cpld].client, 0x7, (u8)((ret & 0xFE) | data)); + + return count; +} + +static ssize_t get_fan_led(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x9); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u32)(ret & 0x18) >> 3; + + switch (data) + { + case 0: + ret = sprintf(buf, "off\n"); + break; + case 1: + ret = sprintf(buf, "yellow\n"); + break; + case 2: + ret = sprintf(buf, "green\n"); + break; + default: + ret = sprintf(buf, "blink_yellow\n"); + } + + return ret; +} + +static ssize_t set_fan_led(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + if (!strncmp(buf, "off", 3)) + { + data = 0; + } + else if (!strncmp(buf, "yellow", 6)) + { + data = 1; + } + else if (!strncmp(buf, "green", 5)) + { + data = 2; + } + else if (!strncmp(buf, "blink_yellow", 12)) + { + data = 3; + } + else + { + return -1; + } + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x9); + if (ret < 0) + return ret; + + dell_i2c_smbus_write_byte_data(pdata[master_cpld].client, 0x9, (u8)((ret & 0xE7) | (data << 3))); + + return count; +} + +static ssize_t get_fan0_led(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x8); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u32)(ret & 0x3); + + switch (data) + { + case 0: + ret = sprintf(buf, "off\n"); + break; + case 1: + ret = sprintf(buf, "green\n"); + break; + case 2: + ret = sprintf(buf, "yellow\n"); + break; + default: + ret = sprintf(buf, "unknown\n"); + } + + return ret; +} + +static ssize_t set_fan0_led(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + if (!strncmp(buf, "off", 3)) + { + data = 0; + } + else if (!strncmp(buf, "yellow", 6)) + { + data = 2; + } + else if (!strncmp(buf, "green", 5)) + { + data = 1; + } + else + { + return -1; + } + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x8); + if (ret < 0) + return ret; + + dell_i2c_smbus_write_byte_data(pdata[master_cpld].client, 0x8, (u8)((ret & 0xFC) | data)); + + return count; +} + + +static ssize_t get_fan1_led(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x8); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u32)(ret & 0xc) >> 2; + + switch (data) + { + case 0: + ret = sprintf(buf, "off\n"); + break; + case 1: + ret = sprintf(buf, "green\n"); + break; + case 2: + ret = sprintf(buf, "yellow\n"); + break; + default: + ret = sprintf(buf, "unknown\n"); + } + + return ret; +} + +static ssize_t set_fan1_led(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + if (!strncmp(buf, "off", 3)) + { + data = 0; + } + else if (!strncmp(buf, "yellow", 6)) + { + data = 2; + } + else if (!strncmp(buf, "green", 5)) + { + data = 1; + } + else + { + return -1; + } + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x8); + if (ret < 0) + return ret; + + dell_i2c_smbus_write_byte_data(pdata[master_cpld].client, 0x8, (u8)((ret & 0xF3) | (data << 2))); + + return count; +} + +static ssize_t get_fan2_led(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x8); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u32)(ret & 0x30) >> 4; + + switch (data) + { + case 0: + ret = sprintf(buf, "off\n"); + break; + case 1: + ret = sprintf(buf, "green\n"); + break; + case 2: + ret = sprintf(buf, "yellow\n"); + break; + default: + ret = sprintf(buf, "unknown\n"); + } + + return ret; +} + +static ssize_t set_fan2_led(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + if (!strncmp(buf, "off", 3)) + { + data = 0; + } + else if (!strncmp(buf, "yellow", 6)) + { + data = 2; + } + else if (!strncmp(buf, "green", 5)) + { + data = 1; + } + else + { + return -1; + } + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x8); + if (ret < 0) + return ret; + + dell_i2c_smbus_write_byte_data(pdata[master_cpld].client, 0x8, (u8)((ret & 0xCF) | (data << 4))); + + return count; +} + +static ssize_t get_system_cpld_ver(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + uint8_t ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[system_cpld].client, 0x0); + if (ret < 0) + return sprintf(buf, "read error"); + + data = ret & (0x0f); + + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t get_master_cpld_ver(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + uint8_t ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[master_cpld].client, 0x1); + if (ret < 0) + return sprintf(buf, "read error"); + + data = ret & (0x0f); + + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t get_slave_cpld_ver(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + uint8_t ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = dell_i2c_smbus_read_byte_data(pdata[slave_cpld].client, 0xa); + if (ret < 0) + return sprintf(buf, "read error"); + + data = ret & (0x0f); + + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t get_reboot_reason(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + uint8_t data = 0; + + /* Last Reboot reason in saved in RTC NVRAM offset 0x49 + * We write the reboot reason into nvram offset, + * as part of platform_reboot implementation from userspace. + + * COLD_RESET = 0xE # Cold Reset (value) + * WARM_RESET = 0x6 # Warm Reset (value) + */ + + /* Read it from this offset, and export it as last_reboot_reason */ + data = nvram_read_byte(RTC_NVRAM_REBOOT_REASON_OFFSET); + + return sprintf(buf, "0x%x\n", data); +} + +static DEVICE_ATTR(qsfp_modsel, S_IRUGO, get_modsel, NULL); +static DEVICE_ATTR(qsfp_modprs, S_IRUGO, get_modprs, NULL); +static DEVICE_ATTR(qsfp_lpmode, S_IRUGO | S_IWUSR, get_lpmode, set_lpmode); +static DEVICE_ATTR(qsfp_reset, S_IRUGO | S_IWUSR, get_reset, set_reset); +static DEVICE_ATTR(power_reset, S_IRUGO | S_IWUSR, get_power_reset, set_power_reset); +static DEVICE_ATTR(fan_prs, S_IRUGO, get_fan_prs, NULL); +static DEVICE_ATTR(psu0_prs, S_IRUGO, get_psu0_prs, NULL); +static DEVICE_ATTR(psu1_prs, S_IRUGO, get_psu1_prs, NULL); +static DEVICE_ATTR(psu0_status, S_IRUGO, get_psu0_status, NULL); +static DEVICE_ATTR(psu1_status, S_IRUGO, get_psu1_status, NULL); +static DEVICE_ATTR(powersupply_status, S_IRUGO, get_powersupply_status, NULL); +static DEVICE_ATTR(system_led, S_IRUGO | S_IWUSR, get_system_led, set_system_led); +static DEVICE_ATTR(locator_led, S_IRUGO | S_IWUSR, get_locator_led, set_locator_led); +static DEVICE_ATTR(power_led, S_IRUGO | S_IWUSR, get_power_led, set_power_led); +static DEVICE_ATTR(master_led, S_IRUGO | S_IWUSR, get_master_led, set_master_led); +static DEVICE_ATTR(fan_led, S_IRUGO | S_IWUSR, get_fan_led, set_fan_led); +static DEVICE_ATTR(fan0_led, S_IRUGO | S_IWUSR, get_fan0_led, set_fan0_led); +static DEVICE_ATTR(fan1_led, S_IRUGO | S_IWUSR, get_fan1_led, set_fan1_led); +static DEVICE_ATTR(fan2_led, S_IRUGO | S_IWUSR, get_fan2_led, set_fan2_led); +static DEVICE_ATTR(system_cpld_ver, S_IRUGO, get_system_cpld_ver, NULL); +static DEVICE_ATTR(master_cpld_ver, S_IRUGO, get_master_cpld_ver, NULL); +static DEVICE_ATTR(slave_cpld_ver, S_IRUGO, get_slave_cpld_ver, NULL); +static DEVICE_ATTR(last_reboot_reason, S_IRUGO, get_reboot_reason, NULL); + +static struct attribute *s6000_cpld_attrs[] = { + &dev_attr_qsfp_modsel.attr, + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_reset.attr, + &dev_attr_qsfp_modprs.attr, + &dev_attr_power_reset.attr, + &dev_attr_fan_prs.attr, + &dev_attr_psu0_prs.attr, + &dev_attr_psu1_prs.attr, + &dev_attr_psu0_status.attr, + &dev_attr_psu1_status.attr, + &dev_attr_powersupply_status.attr, + &dev_attr_system_led.attr, + &dev_attr_locator_led.attr, + &dev_attr_power_led.attr, + &dev_attr_master_led.attr, + &dev_attr_fan_led.attr, + &dev_attr_fan0_led.attr, + &dev_attr_fan1_led.attr, + &dev_attr_fan2_led.attr, + &dev_attr_system_cpld_ver.attr, + &dev_attr_master_cpld_ver.attr, + &dev_attr_slave_cpld_ver.attr, + &dev_attr_last_reboot_reason.attr, + NULL, +}; + +static struct attribute_group s6000_cpld_attr_grp = { + .attrs = s6000_cpld_attrs, +}; + +static int __init cpld_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int i; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(S6000_MUX_BASE_NR); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", + S6000_MUX_BASE_NR); + return -ENODEV; + } + + for (i = 0; i < CPLD_DEVICE_NUM; i++) { + pdata[i].client = i2c_new_dummy(parent, pdata[i].reg_addr); + if (!pdata[i].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[i].reg_addr); + goto error; + } + } + + ret = sysfs_create_group(&pdev->dev.kobj, &s6000_cpld_attr_grp); + if (ret) + goto error; + + return 0; + +error: + i--; + for (; i >= 0; i--) { + if (pdata[i].client) { + i2c_unregister_device(pdata[i].client); + } + } + + i2c_put_adapter(parent); + + return -ENODEV; +} + +static int __exit cpld_remove(struct platform_device *pdev) +{ + int i; + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + + sysfs_remove_group(&pdev->dev.kobj, &s6000_cpld_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } else { + for (i = 0; i < CPLD_DEVICE_NUM; i++) { + if (pdata[i].client) { + if (!parent) { + parent = (pdata[i].client)->adapter; + } + i2c_unregister_device(pdata[i].client); + } + } + } + + i2c_put_adapter(parent); + + return 0; +} + +static struct platform_driver cpld_driver = { + .probe = cpld_probe, + .remove = __exit_p(cpld_remove), + .driver = { + .owner = THIS_MODULE, + .name = "dell-s6000-cpld", + }, +}; + +static int __init dell_s6000_platform_init(void) +{ + int ret = 0; + struct cpld_platform_data *cpld_pdata; + struct qsfp_mux_platform_data *qsfp_pdata; + int i; + bool gpio_allocated = false; + + printk("dell_s6000_platform module initialization\n"); + + ret = gpio_request(GPIO_I2C_MUX_PIN, "gpio10"); + if(ret < 0) { + printk(KERN_WARNING "Failed to request gpio 10"); + goto error_gpio_init; + } + gpio_allocated = true; + + ret = gpio_export(GPIO_I2C_MUX_PIN, false); + if(ret < 0) { + printk(KERN_WARNING "Failed to export gpio 10"); + goto error_gpio_init; + } + + ret = gpio_direction_output(GPIO_I2C_MUX_PIN, 0); + if(ret < 0) { + printk(KERN_WARNING "Failed to set direction out on gpio 10"); + goto error_gpio_init; + } + + ret = platform_driver_register(&cpld_driver); + if (ret) { + printk(KERN_WARNING "Fail to register cpld driver\n"); + goto error_cpld_driver; + } + + ret = platform_driver_register(&qsfp_mux_driver); + if (ret) { + printk(KERN_WARNING "Fail to register qsfp mux driver\n"); + goto error_qsfp_mux_driver; + } + + ret = platform_device_register(&s6000_mux); + if (ret) { + printk(KERN_WARNING "Fail to create gpio mux\n"); + goto error_mux; + } + + ret = platform_device_register(&s6000_cpld); + if (ret) { + printk(KERN_WARNING "Fail to create cpld device\n"); + goto error_cpld; + } + + cpld_pdata = s6000_cpld.dev.platform_data; + qsfp_pdata = s6000_qsfp_mux[0].dev.platform_data; + qsfp_pdata->cpld = cpld_pdata[slave_cpld].client; + qsfp_pdata = s6000_qsfp_mux[1].dev.platform_data; + qsfp_pdata->cpld = cpld_pdata[master_cpld].client; + + for (i = 0; i < QSFP_DEVICE_NUM; i++) { + ret = platform_device_register(&s6000_qsfp_mux[i]); + if (ret) { + printk(KERN_WARNING "fail to create qsfp mux %d\n", i); + goto error_qsfp_mux; + } + } + + if (ret) + goto error_qsfp_mux; + + return 0; + +error_qsfp_mux: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&s6000_qsfp_mux[i]); + } + platform_device_unregister(&s6000_cpld); +error_cpld: + platform_device_unregister(&s6000_mux); +error_mux: + platform_driver_unregister(&qsfp_mux_driver); +error_qsfp_mux_driver: + platform_driver_unregister(&cpld_driver); +error_cpld_driver: + return ret; +error_gpio_init: + if(gpio_allocated) { + gpio_free(GPIO_I2C_MUX_PIN); + } + return ret; +} + +static void __exit dell_s6000_platform_exit(void) +{ + int i; + + for (i = 0; i < MUX_CHANNEL_NUM; i++) + platform_device_unregister(&s6000_qsfp_mux[i]); + platform_device_unregister(&s6000_cpld); + platform_device_unregister(&s6000_mux); + + platform_driver_unregister(&cpld_driver); + platform_driver_unregister(&qsfp_mux_driver); + gpio_free(GPIO_I2C_MUX_PIN); +} + +module_init(dell_s6000_platform_init); +module_exit(dell_s6000_platform_exit); + +MODULE_DESCRIPTION("DELL S6000 Platform Support"); +MODULE_AUTHOR("Guohan Lu "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/scripts/reset-qsfp b/platform/broadcom/sonic-platform-modules-dell/s6000/scripts/reset-qsfp new file mode 100755 index 00000000000..6b017ed37c2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/scripts/reset-qsfp @@ -0,0 +1,25 @@ +#!/bin/bash + +# Usage: +# Reset QSFP manually by writing 1/0 to QSFP reset pin + +QSFP_RESET=/sys/bus/platform/devices/dell-s6000-cpld.0/qsfp_reset + +logger -t platform-modules "Reset QSFP modules" + +# Retry three times +for i in `seq 1 3` +do + if [ -w $QSFP_RESET ]; then + echo 0x00000000 > $QSFP_RESET + # Sleep 1 second to reset QSFP + sleep 1 + echo 0xffffffff > $QSFP_RESET + exit 0 + fi + # Sleep for 3 seconds to wait for device tree to be ready + sleep 3 +done + +logger -p user.error -t platform-modules "Failed to reset QSFP modules!" +exit 1 diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/scripts/s6000_platform.sh b/platform/broadcom/sonic-platform-modules-dell/s6000/scripts/s6000_platform.sh new file mode 100755 index 00000000000..bf6c730425e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/scripts/s6000_platform.sh @@ -0,0 +1,98 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup S6000 board. +### END INIT INFO + +add_i2c_devices() { + + echo 24c02 0x50 > /sys/class/i2c-adapter/i2c-1/new_device + echo 24c02 0x51 > /sys/class/i2c-adapter/i2c-1/new_device + echo dni_dps460 0x58 > /sys/class/i2c-adapter/i2c-1/new_device + echo dni_dps460 0x59 > /sys/class/i2c-adapter/i2c-1/new_device + echo jc42 0x18 > /sys/class/i2c-adapter/i2c-10/new_device + echo emc1403 0x4d > /sys/class/i2c-adapter/i2c-10/new_device + echo spd 0x50 > /sys/class/i2c-adapter/i2c-10/new_device + echo 24c02 0x53 > /sys/class/i2c-adapter/i2c-10/new_device + echo max6620 0x29 > /sys/class/i2c-adapter/i2c-11/new_device + echo max6620 0x2a > /sys/class/i2c-adapter/i2c-11/new_device + echo ltc4215 0x40 > /sys/class/i2c-adapter/i2c-11/new_device + echo ltc4215 0x42 > /sys/class/i2c-adapter/i2c-11/new_device + echo tmp75 0x4c > /sys/class/i2c-adapter/i2c-11/new_device + echo tmp75 0x4d > /sys/class/i2c-adapter/i2c-11/new_device + echo tmp75 0x4e > /sys/class/i2c-adapter/i2c-11/new_device + echo 24c02 0x51 > /sys/class/i2c-adapter/i2c-11/new_device + echo 24c02 0x52 > /sys/class/i2c-adapter/i2c-11/new_device + echo 24c02 0x53 > /sys/class/i2c-adapter/i2c-11/new_device + for i in `seq 0 31`; do + echo optoe1 0x50 > /sys/class/i2c-adapter/i2c-$((20+i))/new_device + done +} + +remove_i2c_devices() { + echo 0x50 > /sys/class/i2c-adapter/i2c-1/delete_device + echo 0x51 > /sys/class/i2c-adapter/i2c-1/delete_device + echo 0x58 > /sys/class/i2c-adapter/i2c-1/delete_device + echo 0x59 > /sys/class/i2c-adapter/i2c-1/delete_device + echo 0x18 > /sys/class/i2c-adapter/i2c-10/delete_device + echo 0x4d > /sys/class/i2c-adapter/i2c-10/delete_device + echo 0x50 > /sys/class/i2c-adapter/i2c-10/delete_device + echo 0x53 > /sys/class/i2c-adapter/i2c-10/delete_device + echo 0x29 > /sys/class/i2c-adapter/i2c-11/delete_device + echo 0x2a > /sys/class/i2c-adapter/i2c-11/delete_device + echo 0x40 > /sys/class/i2c-adapter/i2c-11/delete_device + echo 0x42 > /sys/class/i2c-adapter/i2c-11/delete_device + echo 0x4c > /sys/class/i2c-adapter/i2c-11/delete_device + echo 0x4d > /sys/class/i2c-adapter/i2c-11/delete_device + echo 0x4e > /sys/class/i2c-adapter/i2c-11/delete_device + echo 0x51 > /sys/class/i2c-adapter/i2c-11/delete_device + echo 0x52 > /sys/class/i2c-adapter/i2c-11/delete_device + echo 0x53 > /sys/class/i2c-adapter/i2c-11/delete_device + for i in `seq 0 31`; do + echo 0x50 > /sys/class/i2c-adapter/i2c-$((20+i))/delete_device + done +} + +install_python_api_package() { + device="/usr/share/sonic/device" + platform=$(/usr/local/bin/sonic-cfggen -H -v DEVICE_METADATA.localhost.platform) + + if [ -e $device/$platform/sonic_platform-1.0-py2-none-any.whl ]; then + rv=$(pip install $device/$platform/sonic_platform-1.0-py2-none-any.whl) + fi +} + +remove_python_api_package() { + rv=$(pip show sonic-platform > /dev/null 2>/dev/null) + if [ $? -eq 0 ]; then + rv = $(pip uninstall -y sonic-platform > /dev/null 2>/dev/null) + fi +} + +if [[ "$1" == "init" ]]; then + depmod -a + modprobe nvram + modprobe i2c_mux_gpio + modprobe dell_s6000_platform + install_python_api_package + + add_i2c_devices + + /usr/local/bin/set-fan-speed 15000 + /usr/local/bin/reset-qsfp +elif [[ "$1" == "deinit" ]]; then + remove_i2c_devices + rmmod dell_s6000_platform + rmmod nvram + rmmod i2c_mux_gpio + remove_python_api_package +else + echo "s6000_platform : Invalid option !" +fi diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/scripts/set-fan-speed b/platform/broadcom/sonic-platform-modules-dell/s6000/scripts/set-fan-speed new file mode 100755 index 00000000000..00c738f23a8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/scripts/set-fan-speed @@ -0,0 +1,58 @@ +#!/bin/bash + +# Usage: +# Set all fans speed to $1 + +usage() { + echo "This script must be run with super-user privilege." + echo "Warning! Wrongly set fan speed may result in physical damage to the device." + echo "" + echo "usage: set-fan-speed speed_in_rpm" + echo "example: set-fan-speed 15000" +} + +if [ $# -ne 1 ]; then + usage + exit 1 +fi + +PSU_FAN1=/sys/class/i2c-adapter/i2c-1/1-0058/fan1_target +PSU_FAN2=/sys/class/i2c-adapter/i2c-1/1-0059/fan1_target + +# Three fan trays with each contains two separate fans +# fan1-fan4 fan2-fan5 fan3-fan6 +FAN1=/sys/class/i2c-adapter/i2c-11/11-0029/fan1_target +FAN2=/sys/class/i2c-adapter/i2c-11/11-0029/fan2_target +FAN3=/sys/class/i2c-adapter/i2c-11/11-0029/fan3_target +FAN4=/sys/class/i2c-adapter/i2c-11/11-0029/fan4_target +FAN5=/sys/class/i2c-adapter/i2c-11/11-002a/fan1_target +FAN6=/sys/class/i2c-adapter/i2c-11/11-002a/fan2_target + +speed=$1 +logger -t platform-modules "Trying to set fan speed to $speed" + +# Retry three times +for i in `seq 1 3` +do + if [ -w $FAN1 -o -w $FAN2 -o -w $FAN3 ]; then + # set default psu fan speed + echo $speed > $PSU_FAN1 + echo $speed > $PSU_FAN2 + # set default fan speed + echo $speed > $FAN1 + echo $speed > $FAN2 + echo $speed > $FAN3 + echo $speed > $FAN4 + echo $speed > $FAN5 + echo $speed > $FAN6 + + logger -t platform-modules "Fan speed is set to $speed" + + exit 0 + fi + # Sleep for 3 seconds to wait for device tree to be ready + sleep 3 +done + +logger -p user.error -t platform-modules "Failed to set fan speed!" +exit 1 diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/setup.py b/platform/broadcom/sonic-platform-modules-dell/s6000/setup.py new file mode 120000 index 00000000000..4f6de9941d9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/setup.py @@ -0,0 +1 @@ +../s6100/setup.py \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/__init__.py new file mode 100755 index 00000000000..48057d29035 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis", "sfp", "psu", "thermal"] +from sonic_platform import * diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/chassis.py new file mode 100755 index 00000000000..005fdd15b26 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/chassis.py @@ -0,0 +1,258 @@ +#!/usr/bin/env python + +############################################################################# +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + import os + import time + import datetime + import subprocess + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.sfp import Sfp + from sonic_platform.eeprom import Eeprom + from sonic_platform.fan import Fan + from sonic_platform.psu import Psu + from sonic_platform.thermal import Thermal + from sonic_platform.component import Component +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +MAX_S6000_FAN = 3 +MAX_S6000_PSU = 2 +MAX_S6000_THERMAL = 10 +MAX_S6000_COMPONENT = 4 + + +class Chassis(ChassisBase): + """ + DELLEMC Platform-specific Chassis class + """ + CPLD_DIR = "/sys/devices/platform/dell-s6000-cpld.0" + + sfp_control = "" + PORT_START = 0 + PORT_END = 0 + reset_reason_dict = {} + reset_reason_dict[0xe] = ChassisBase.REBOOT_CAUSE_NON_HARDWARE + reset_reason_dict[0x6] = ChassisBase.REBOOT_CAUSE_NON_HARDWARE + + def __init__(self): + # Initialize SFP list + self.PORT_START = 0 + self.PORT_END = 31 + EEPROM_OFFSET = 20 + PORTS_IN_BLOCK = (self.PORT_END + 1) + + # sfp.py will read eeprom contents and retrive the eeprom data. + # It will also provide support sfp controls like reset and setting + # low power mode. + # We pass the eeprom path and sfp control path from chassis.py + # So that sfp.py implementation can be generic to all platforms + eeprom_base = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + self.sfp_control = "/sys/devices/platform/dell-s6000-cpld.0/" + + for index in range(0, PORTS_IN_BLOCK): + eeprom_path = eeprom_base.format(index + EEPROM_OFFSET) + sfp_node = Sfp(index, 'QSFP', eeprom_path, self.sfp_control, index) + self._sfp_list.append(sfp_node) + + # Get Transceiver status + self.modprs_register = self._get_transceiver_status() + + self.sys_eeprom = Eeprom() + for i in range(MAX_S6000_FAN): + fan = Fan(i) + self._fan_list.append(fan) + + for i in range(MAX_S6000_PSU): + psu = Psu(i) + self._psu_list.append(psu) + + for i in range(MAX_S6000_THERMAL): + thermal = Thermal(i) + self._thermal_list.append(thermal) + + for i in range(MAX_S6000_COMPONENT): + component = Component(i) + self._component_list.append(component) + + def _get_cpld_register(self, reg_name): + rv = 'ERR' + mb_reg_file = self.CPLD_DIR+'/'+reg_name + + if (not os.path.isfile(mb_reg_file)): + return rv + + try: + with open(mb_reg_file, 'r') as fd: + rv = fd.read() + except Exception as error: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self.sys_eeprom.modelstr() + + def get_presence(self): + """ + Retrieves the presence of the chassis + Returns: + bool: True if chassis is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the chassis + Returns: + string: Model/part number of chassis + """ + return self.sys_eeprom.part_number_str() + + def get_serial(self): + """ + Retrieves the serial number of the chassis (Service tag) + Returns: + string: Serial number of chassis + """ + return self.sys_eeprom.serial_str() + + def get_status(self): + """ + Retrieves the operational status of the chassis + Returns: + bool: A boolean value, True if chassis is operating properly + False if not + """ + return True + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self.sys_eeprom.base_mac_addr() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + return self.sys_eeprom.serial_number_str() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the + chassis + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their + corresponding values. + """ + return self.sys_eeprom.system_eeprom_info() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + """ + # In S6000, We track the reboot reason by writing the reason in + # NVRAM. Only Warmboot and Coldboot reason are supported here. + # Since it does not support any hardware reason, we return + # non_hardware as default + + lrr = self._get_cpld_register('last_reboot_reason') + if (lrr != 'ERR'): + reset_reason = int(lrr, base=16) + if (reset_reason in self.reset_reason_dict): + return (self.reset_reason_dict[reset_reason], None) + + return (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, None) + + def _get_transceiver_status(self): + presence_ctrl = self.sfp_control + 'qsfp_modprs' + try: + reg_file = open(presence_ctrl) + + except IOError as e: + return False + + content = reg_file.readline().rstrip() + reg_file.close() + + return int(content, 16) + + def get_transceiver_change_event(self, timeout=0): + """ + Returns a dictionary containing sfp changes which have + experienced a change at chassis level + """ + start_time = time.time() + port_dict = {} + port = self.PORT_START + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + return False, {} + end_time = start_time + timeout + + if (start_time > end_time): + return False, {} # Time wrap or possibly incorrect timeout + + while (timeout >= 0): + # Check for OIR events and return updated port_dict + reg_value = self._get_transceiver_status() + if (reg_value != self.modprs_register): + changed_ports = (self.modprs_register ^ reg_value) + while (port >= self.PORT_START and port <= self.PORT_END): + # Mask off the bit corresponding to our port + mask = (1 << port) + if (changed_ports & mask): + # ModPrsL is active low + if reg_value & mask == 0: + port_dict[port] = '1' + else: + port_dict[port] = '0' + port += 1 + + # Update reg value + self.modprs_register = reg_value + return True, port_dict + + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + return False, {} + + diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/component.py new file mode 100644 index 00000000000..daa30eaafa3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/component.py @@ -0,0 +1,130 @@ +#!/usr/bin/env python + +######################################################################## +# DELLEMC S6000 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in +# the platform +# +######################################################################## + +try: + import os + import subprocess + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BIOS_QUERY_VERSION_COMMAND = "dmidecode -s system-version" + + +class Component(ComponentBase): + """DellEMC Platform-specific Component class""" + + CPLD_DIR = "/sys/devices/platform/dell-s6000-cpld.0" + + CHASSIS_COMPONENTS = [ + ["BIOS", ("Performs initialization of hardware components during " + "booting")], + ["System-CPLD", "Used for managing CPU board devices and power"], + ["Master-CPLD", ("Used for managing Fan, PSU, system LEDs, QSFP " + "modules (1-16)")], + ["Slave-CPLD", "Used for managing QSFP modules (17-32)"] + ] + + def __init__(self, component_index): + self.index = component_index + self.name = self.CHASSIS_COMPONENTS[self.index][0] + self.description = self.CHASSIS_COMPONENTS[self.index][1] + + def _get_cpld_register(self, reg_name): + rv = 'ERR' + mb_reg_file = self.CPLD_DIR+'/'+reg_name + + if (not os.path.isfile(mb_reg_file)): + return rv + + try: + with open(mb_reg_file, 'r') as fd: + rv = fd.read() + except Exception as error: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def _get_command_result(self, cmdline): + try: + proc = subprocess.Popen(cmdline.split(), stdout=subprocess.PIPE, + stderr=subprocess.STDOUT) + stdout = proc.communicate()[0] + proc.wait() + result = stdout.rstrip('\n') + except OSError: + result = None + + return result + + def _get_cpld_version(self, cpld_number): + cpld_version_reg = { + 1: "system_cpld_ver", + 2: "master_cpld_ver", + 3: "slave_cpld_ver" + } + + cpld_version = self._get_cpld_register(cpld_version_reg[cpld_number]) + + if cpld_version != 'ERR': + return str(int(cpld_version, 16)) + else: + return 'NA' + + def get_name(self): + """ + Retrieves the name of the component + + Returns: + A string containing the name of the component + """ + return self.name + + def get_description(self): + """ + Retrieves the description of the component + + Returns: + A string containing the description of the component + """ + return self.description + + def get_firmware_version(self): + """ + Retrieves the firmware version of the component + + Returns: + A string containing the firmware version of the component + """ + if self.index == 0: + bios_ver = self._get_command_result(BIOS_QUERY_VERSION_COMMAND) + + if not bios_ver: + return 'NA' + else: + return bios_ver + + elif self.index <= 3: + return self._get_cpld_version(self.index) + + def install_firmware(self, image_path): + """ + Installs firmware to the component + + Args: + image_path: A string, path to firmware image + + Returns: + A boolean, True if install was successful, False if not + """ + return False diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py new file mode 100644 index 00000000000..3d824ba2826 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py @@ -0,0 +1,234 @@ +#!/usr/bin/env python + +######################################################################## +# DellEMC S6000 +# +# Module contains platform specific implementation of SONiC Platform +# Base API and provides the EEPROMs' information. +# +# The different EEPROMs available are as follows: +# - System EEPROM : Contains Serial number, Service tag, Base MA +# address, etc. in ONIE TlvInfo EEPROM format. +# - PSU EEPROM : Contains Serial number, Part number, Service Tag, +# PSU type, Revision. +# - Fan EEPROM : Contains Serial number, Part number, Service Tag, +# Fan type, Number of Fans in Fantray, Revision. +######################################################################## + + +try: + import os + from sonic_platform_base.sonic_eeprom.eeprom_base import EepromDecoder + from sonic_platform_base.sonic_eeprom.eeprom_tlvinfo import TlvInfoDecoder +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +# PSU eeprom fields in format required by EepromDecoder +psu_eeprom_format = [ + ('PPID', 's', 20), ('DPN Rev', 's', 3), ('Service Tag', 's', 7), + ('Part Number', 's', 10), ('Part Num Revision', 's', 3), + ('Mfg Test', 's', 2), ('PSU Type', 's', 1), ('Fab Rev', 's', 2) + ] + +# Fan eeprom fields in format required by EepromDecoder +fan_eeprom_format = [ + ('PPID', 's', 20), ('DPN Rev', 's', 3), ('Service Tag', 's', 7), + ('Part Number', 's', 10), ('Part Num Revision', 's', 3), + ('Mfg Test', 's', 2), ('Redundant copy', 's', 82), + ('Number of Fans', 's', 1), ('Fan Type', 's', 1), + ('Fab Rev', 's', 2) + ] + + +class Eeprom(TlvInfoDecoder): + """DellEMC Platform-specific EEPROM class""" + + I2C_DIR = "/sys/class/i2c-adapter/" + + def __init__(self, is_psu=False, psu_index=0, is_fan=False, fan_index=0): + self.is_psu_eeprom = is_psu + self.is_fan_eeprom = is_fan + self.is_sys_eeprom = not (is_psu | is_fan) + + if self.is_sys_eeprom: + self.start_offset = 0 + self.eeprom_path = self.I2C_DIR + "i2c-10/10-0053/eeprom" + # System EEPROM is in ONIE TlvInfo EEPROM format + super(Eeprom, self).__init__(self.eeprom_path, + self.start_offset, '', True) + self._load_system_eeprom() + else: + self.start_offset = 6 + if self.is_psu_eeprom: + self.index = psu_index + self.eeprom_path = self.I2C_DIR \ + + "i2c-1/1-005{}/eeprom".format(2 - self.index) + self.format = psu_eeprom_format + else: + self.index = fan_index + self.eeprom_path = self.I2C_DIR \ + + "i2c-11/11-005{}/eeprom".format(4 - self.index) + self.format = fan_eeprom_format + EepromDecoder.__init__(self, self.eeprom_path, self.format, + self.start_offset, '', True) + self._load_device_eeprom() + + def _load_system_eeprom(self): + """ + Reads the system EEPROM and retrieves the values corresponding + to the codes defined as per ONIE TlvInfo EEPROM format and fills + them in a dictionary. + """ + try: + # Read System EEPROM as per ONIE TlvInfo EEPROM format. + self.eeprom_data = self.read_eeprom() + except: + self.base_mac = 'NA' + self.serial_number = 'NA' + self.part_number = 'NA' + self.model_str = 'NA' + self.serial = 'NA' + self.eeprom_tlv_dict = dict() + else: + eeprom = self.eeprom_data + self.eeprom_tlv_dict = dict() + + if not self.is_valid_tlvinfo_header(eeprom): + self.base_mac = 'NA' + self.serial_number = 'NA' + self.part_number = 'NA' + self.model_str = 'NA' + self.serial = 'NA' + return + + total_length = (ord(eeprom[9]) << 8) | ord(eeprom[10]) + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + ord(eeprom[tlv_index + 1])] + code = "0x%02X" % (ord(tlv[0])) + + if ord(tlv[0]) == self._TLV_CODE_VENDOR_EXT: + value = str((ord(tlv[2]) << 24) | (ord(tlv[3]) << 16) | + (ord(tlv[4]) << 8) | ord(tlv[5])) + value += str(tlv[6:6 + ord(tlv[1])]) + else: + name, value = self.decoder(None, tlv) + + self.eeprom_tlv_dict[code] = value + if ord(eeprom[tlv_index]) == self._TLV_CODE_CRC_32: + break + + tlv_index += ord(eeprom[tlv_index+1]) + 2 + + self.base_mac = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_MAC_BASE), 'NA') + self.serial_number = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_SERIAL_NUMBER), 'NA') + self.part_number = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_PART_NUMBER), 'NA') + self.model_str = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_PRODUCT_NAME), 'NA') + self.serial = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_SERVICE_TAG), 'NA') + + def _load_device_eeprom(self): + """ + Reads the Fan/PSU EEPROM and retrieves the serial number and + model number of the device. + """ + try: + # Read Fan/PSU EEPROM as per the specified format. + self.eeprom_data = EepromDecoder.read_eeprom(self) + except: + self.serial_number = 'NA' + self.part_number = 'NA' + else: + (valid, data) = self._get_eeprom_field("PPID") + if valid: + ppid = data + self.serial_number = (ppid[:2] + "-" + ppid[2:8] + "-" + + ppid[8:13] + "-" + ppid[13:16] + + "-" + ppid[16:]) + (valid, data) = self._get_eeprom_field("DPN Rev") + if valid: + self.serial_number += "-" + data + else: + self.serial_number = 'NA' + + (valid, data) = self._get_eeprom_field("Part Number") + if valid: + self.part_number = data + else: + self.part_number = 'NA' + + (valid, data) = self._get_eeprom_field("Fan Type") + if valid: + self.fan_type = data + else: + self.fan_type = 'NA' + + def _get_eeprom_field(self, field_name): + """ + For a field name specified in the EEPROM format, returns the + presence of the field and the value for the same. + """ + field_start = 0 + for field in self.format: + field_end = field_start + field[2] + if field[0] == field_name: + return (True, self.eeprom_data[field_start:field_end]) + field_start = field_end + + return (False, None) + + def serial_number_str(self): + """ + Returns the serial number. + """ + return self.serial_number + + def part_number_str(self): + """ + Returns the part number. + """ + return self.part_number + + def airflow_fan_type(self): + """ + Returns the airflow fan type. + """ + return int(self.fan_type.encode('hex'), 16) + + # System EEPROM specific methods + def base_mac_addr(self): + """ + Returns the base MAC address found in the system EEPROM. + """ + return self.base_mac + + def modelstr(self): + """ + Returns the Model name. + """ + return self.model_str + + def serial_str(self): + """ + Returns the servicetag number. + """ + return self.serial + + def system_eeprom_info(self): + """ + Returns a dictionary, where keys are the type code defined in + ONIE EEPROM format and values are their corresponding values + found in the system EEPROM. + """ + return self.eeprom_tlv_dict diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/fan.py new file mode 100644 index 00000000000..3350b481840 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/fan.py @@ -0,0 +1,286 @@ +#!/usr/bin/env python + +######################################################################## +# DellEMC S6000 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Fans' information which are available in the platform +# +######################################################################## + + +try: + import os + from sonic_platform_base.fan_base import FanBase + from sonic_platform.eeprom import Eeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +MAX_S6000_FAN_SPEED = 19000 + + +class Fan(FanBase): + """DellEMC Platform-specific Fan class""" + + CPLD_DIR = "/sys/devices/platform/dell-s6000-cpld.0/" + I2C_DIR = "/sys/class/i2c-adapter/" + + def __init__(self, fan_index, psu_fan=False): + # Fan is 1-based in DellEMC platforms + self.index = fan_index + 1 + self.is_psu_fan = psu_fan + + if not self.is_psu_fan: + self.fan_presence_reg = "fan_prs" + self.fan_led_reg = "fan{}_led".format(fan_index) + self.get_fan_speed_reg = self.I2C_DIR + "i2c-11/11-0029/" +\ + "fan{}_input".format(self.index) + self.set_fan_speed_reg = self.I2C_DIR + "i2c-11/11-0029/" +\ + "fan{}_target".format(self.index) + self.eeprom = Eeprom(is_fan=True, fan_index=self.index) + self.max_fan_speed = MAX_S6000_FAN_SPEED + self.supported_led_color = ['off', 'green', 'amber'] + else: + self.get_fan_speed_reg = self.I2C_DIR + "i2c-1/1-005{}/" +\ + "fan1_input".format(10 - self.index) + + def _get_cpld_register(self, reg_name): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + cpld_reg_file = self.CPLD_DIR + reg_name + + if (not os.path.isfile(cpld_reg_file)): + return rv + + try: + with open(cpld_reg_file, 'r') as fd: + rv = fd.read() + except: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def _set_cpld_register(self, reg_name, value): + # On successful write, returns the value will be written on + # reg_name and on failure returns 'ERR' + rv = 'ERR' + cpld_reg_file = self.CPLD_DIR + reg_name + + if (not os.path.isfile(cpld_reg_file)): + print "open error" + return rv + + try: + with open(cpld_reg_file, 'w') as fd: + rv = fd.write(str(value)) + except: + rv = 'ERR' + + return rv + + def _get_i2c_register(self, reg_file): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(reg_file)): + return rv + + try: + with open(reg_file, 'r') as fd: + rv = fd.read() + except: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def _set_i2c_register(self, reg_file, value): + # On successful write, the value read will be written on + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(reg_file)): + return rv + + try: + with open(reg_file, 'w') as fd: + rv = fd.write(str(value)) + except: + rv = 'ERR' + + return rv + + def get_name(self): + """ + Retrieves the name of the Fan + + Returns: + string: The name of the Fan + """ + if not self.is_psu_fan: + return "Fan{}".format(self.index) + else: + return "PSU{} Fan".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the Fan Unit + + Returns: + bool: True if Fan is present, False if not + """ + status = False + fan_presence = self._get_cpld_register(self.fan_presence_reg) + if (fan_presence != 'ERR'): + fan_presence = int(fan_presence,16) & self.index + if fan_presence: + status = True + + return status + + def get_model(self): + """ + Retrieves the part number of the Fan + + Returns: + string: Part number of Fan + """ + return self.eeprom.part_number_str() + + def get_serial(self): + """ + Retrieves the serial number of the Fan + + Returns: + string: Serial number of Fan + """ + # Sample Serial number format "US-01234D-54321-25A-0123-A00" + return self.eeprom.serial_number_str() + + def get_status(self): + """ + Retrieves the operational status of the Fan + + Returns: + bool: True if Fan is operating properly, False if not + """ + status = False + fan_speed = self._get_i2c_register(self.get_fan_speed_reg) + if (fan_speed != 'ERR'): + if (int(fan_speed) > 14000): + status = True + + return status + + def get_direction(self): + """ + Retrieves the fan airflow direction + + Returns: + A string, either FAN_DIRECTION_INTAKE or + FAN_DIRECTION_EXHAUST depending on fan direction + """ + direction = {1: 'FAN_DIRECTION_INTAKE', 2: 'FAN_DIRECTION_EXHAUST'} + fan_direction = self.eeprom.airflow_fan_type() + + return direction.get(fan_direction,'NA') + + def get_speed(self): + """ + Retrieves the speed of fan + + Returns: + int: percentage of the max fan speed + """ + fan_speed = self._get_i2c_register(self.get_fan_speed_reg) + if (fan_speed != 'ERR') and self.get_presence(): + speed_in_rpm = int(fan_speed, 10) + speed = (100 * speed_in_rpm)/self.max_fan_speed + else: + speed = 0 + + return speed + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed + which is considered tolerable + """ + if self.get_presence(): + # The tolerance value is fixed as 20% for all the DellEmc platform + tolerance = 20 + else: + tolerance = 0 + + return tolerance + + def set_speed(self, speed): + """ + Set fan speed to expected value + Args: + speed: An integer, the percentage of full fan speed to set + fan to, in the range 0 (off) to 100 (full speed) + Returns: + bool: True if set success, False if fail. + """ + fan_set = (speed * self.max_fan_speed)/ 100 + rv = self._set_i2c_register(self.set_fan_speed_reg , fan_set) + if (rv != 'ERR'): + return True + else: + return False + + def set_status_led(self, color): + """ + Set led to expected color + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if set success, False if fail. + """ + if color not in self.supported_led_color: + return False + if(color == self.STATUS_LED_COLOR_AMBER): + color = 'yellow' + + rv = self._set_cpld_register(self.fan_led_reg ,color) + if (rv != 'ERR'): + return True + else: + return False + + def get_status_led(self): + """ + Gets the state of the fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings. + """ + fan_led = self._get_cpld_register(self.fan_led_reg) + if (fan_led != 'ERR'): + if (fan_led == 'yellow'): + return self.STATUS_LED_COLOR_AMBER + else: + return fan_led + else: + return self.STATUS_LED_COLOR_OFF + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + + Returns: + An integer, the percentage of full fan speed, in the range 0 + (off) to 100 (full speed) + """ + return 79 diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/platform.py new file mode 100755 index 00000000000..426db717281 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/platform.py @@ -0,0 +1,26 @@ +#!/usr/bin/env python + +############################################################################# +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + import os + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PlatformBase): + """ + DELLEMC Platform-specific class + """ + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() + diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/psu.py new file mode 100644 index 00000000000..dfbd2a87eb5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/psu.py @@ -0,0 +1,240 @@ +#!/usr/bin/env python + +######################################################################## +# DellEMC S6000 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs' information which are available in the platform +# +######################################################################## + + +try: + import os + from sonic_platform_base.psu_base import PsuBase + from sonic_platform.eeprom import Eeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Psu(PsuBase): + """DellEMC Platform-specific PSU class""" + + CPLD_DIR = "/sys/devices/platform/dell-s6000-cpld.0/" + I2C_DIR = "/sys/class/i2c-adapter/" + + def __init__(self, psu_index): + # PSU is 1-based in DellEMC platforms + self.index = psu_index + 1 + self.psu_presence_reg = "psu{}_prs".format(psu_index) + self.psu_status_reg = "powersupply_status" + + if self.index == 1: + ltc_dir = self.I2C_DIR + "i2c-11/11-0042/hwmon/" + else: + ltc_dir = self.I2C_DIR + "i2c-11/11-0040/hwmon/" + hwmon_node = os.listdir(ltc_dir)[0] + self.HWMON_DIR = ltc_dir + hwmon_node + '/' + + self.psu_voltage_reg = self.HWMON_DIR + "in1_input" + self.psu_current_reg = self.HWMON_DIR + "curr1_input" + self.psu_power_reg = self.HWMON_DIR + "power1_input" + + self.eeprom = Eeprom(is_psu=True, psu_index=self.index) + + # Overriding _fan_list class variable defined in PsuBase, to + # make it unique per Psu object + self._fan_list = [] + + def _get_cpld_register(self, reg_name): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + cpld_reg_file = self.CPLD_DIR + reg_name + + if (not os.path.isfile(cpld_reg_file)): + return rv + + try: + with open(cpld_reg_file, 'r') as fd: + rv = fd.read() + except: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def _get_i2c_register(self, reg_file): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(reg_file)): + return rv + + try: + with open(reg_file, 'r') as fd: + rv = fd.read() + except: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return "PSU{}".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the Power Supply Unit (PSU) + + Returns: + bool: True if PSU is present, False if not + """ + status = False + psu_presence = self._get_cpld_register(self.psu_presence_reg) + if (psu_presence != 'ERR'): + psu_presence = int(psu_presence) + if psu_presence: + status = True + + return status + + def get_model(self): + """ + Retrieves the part number of the PSU + + Returns: + string: Part number of PSU + """ + return self.eeprom.part_number_str() + + def get_serial(self): + """ + Retrieves the serial number of the PSU + + Returns: + string: Serial number of PSU + """ + # Sample Serial number format "US-01234D-54321-25A-0123-A00" + return self.eeprom.serial_number_str() + + def get_status(self): + """ + Retrieves the operational status of the PSU + + Returns: + bool: True if PSU is operating properly, False if not + """ + status = False + psu_status = self._get_cpld_register(self.psu_status_reg) + if (psu_status != 'ERR'): + psu_status = (int(psu_status, 16) >> ((2 - self.index) * 4)) & 0xF + if (~psu_status & 0b1000) and (~psu_status & 0b0100): + status = True + + return status + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + psu_voltage = self._get_i2c_register(self.psu_voltage_reg) + if (psu_voltage != 'ERR') and self.get_status(): + # Converting the value returned by driver which is in + # millivolts to volts + psu_voltage = float(psu_voltage) / 1000 + else: + psu_voltage = 0.0 + + return psu_voltage + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + + Returns: + A float number, electric current in amperes, + e.g. 15.4 + """ + psu_current = self._get_i2c_register(self.psu_current_reg) + if (psu_current != 'ERR') and self.get_status(): + # Converting the value returned by driver which is in + # milliamperes to amperes + psu_current = float(psu_current) / 1000 + else: + psu_current = 0.0 + + return psu_current + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + psu_power = self._get_i2c_register(self.psu_power_reg) + if (psu_power != 'ERR') and self.get_status(): + # Converting the value returned by driver which is in + # microwatts to watts + psu_power = float(psu_power) / 1000000 + else: + psu_power = 0.0 + + return psu_power + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + Returns: + A boolean, True if PSU has stablized its output voltages and + passed all its internal self-tests, False if not. + """ + status = False + psu_status = self._get_cpld_register(self.psu_status_reg) + if (psu_status != 'ERR'): + psu_status = (int(psu_status, 16) >> ((2 - self.index) * 4)) & 0xF + if (psu_status == 0x2): + status = True + + return status + + def get_status_led(self): + """ + Gets the state of the PSU status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings. + """ + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_OFF + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + Args: + color: A string representing the color with which to set the + PSU status LED + Returns: + bool: True if status LED state is set successfully, False if + not + """ + # In S6000, the firmware running in the PSU controls the LED + # and the PSU LED state cannot be changed from CPU. + return False diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/sfp.py new file mode 100644 index 00000000000..9ab89db5d61 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/sfp.py @@ -0,0 +1,880 @@ +#!/usr/bin/env python + +############################################################################# +# DELLEMC +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + import os + import time + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +PAGE_OFFSET = 0 +KEY_OFFSET = 1 +KEY_WIDTH = 2 +FUNC_NAME = 3 + +INFO_OFFSET = 128 +DOM_OFFSET = 0 +DOM_OFFSET1 = 384 + +cable_length_tup = ('Length(km)', 'Length OM3(2m)', 'Length OM2(m)', + 'Length OM1(m)', 'Length Cable Assembly(m)') + +compliance_code_tup = ( + '10/40G Ethernet Compliance Code', + 'SONET Compliance codes', + 'SAS/SATA compliance codes', + 'Gigabit Ethernet Compliant codes', + 'Fibre Channel link length/Transmitter Technology', + 'Fibre Channel transmission media', + 'Fibre Channel Speed') + +info_dict_keys = ['type', 'hardwarerev', 'serialnum', + 'manufacturename', 'modelname', 'Connector', + 'encoding', 'ext_identifier', 'ext_rateselect_compliance', + 'cable_type', 'cable_length', 'nominal_bit_rate', + 'specification_compliance', 'type_abbrv_name','vendor_date', 'vendor_oui'] + +dom_dict_keys = ['rx_los', 'tx_fault', 'reset_status', + 'power_lpmode', 'tx_disable', 'tx_disable_channel', + 'temperature', 'voltage', 'rx1power', + 'rx2power', 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', 'tx3bias', + 'tx4bias', 'tx1power', 'tx2power', + 'tx3power', 'tx4power'] + +threshold_dict_keys = ['temphighalarm', 'temphighwarning', + 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', + 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', + 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', + 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', + 'txbiaslowalarm', 'txbiaslowwarning'] + +sff8436_parser = { + 'reset_status': [DOM_OFFSET, 2, 1, 'parse_dom_status_indicator'], + 'rx_los': [DOM_OFFSET, 3, 1, 'parse_dom_tx_rx_los'], + 'tx_fault': [DOM_OFFSET, 4, 1, 'parse_dom_tx_fault'], + 'tx_disable': [DOM_OFFSET, 86, 1, 'parse_dom_tx_disable'], + 'power_lpmode': [DOM_OFFSET, 93, 1, 'parse_dom_power_control'], + 'power_override': [DOM_OFFSET, 93, 1, 'parse_dom_power_control'], + 'Temperature': [DOM_OFFSET, 22, 2, 'parse_temperature'], + 'Voltage': [DOM_OFFSET, 26, 2, 'parse_voltage'], + 'ChannelMonitor': [DOM_OFFSET, 34, 16, 'parse_channel_monitor_params'], + + 'cable_type': [INFO_OFFSET, -1, -1, 'parse_sfp_info_bulk'], + 'cable_length': [INFO_OFFSET, -1, -1, 'parse_sfp_info_bulk'], + 'Connector': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'type': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'encoding': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'ext_identifier': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'ext_rateselect_compliance': + [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'nominal_bit_rate': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'specification_compliance': + [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'type_abbrv_name' : [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'manufacturename': [INFO_OFFSET, 20, 16, 'parse_vendor_name'], + 'vendor_oui': [INFO_OFFSET, 37, 3, 'parse_vendor_oui'], + 'modelname': [INFO_OFFSET, 40, 16, 'parse_vendor_pn'], + 'hardwarerev': [INFO_OFFSET, 56, 2, 'parse_vendor_rev'], + 'serialnum': [INFO_OFFSET, 68, 16, 'parse_vendor_sn'], + 'vendor_date': [INFO_OFFSET, 84, 8, 'parse_vendor_date'], + 'ModuleThreshold': [DOM_OFFSET1, 128, 24, 'parse_module_threshold_values'], + 'ChannelThreshold': [DOM_OFFSET1, 176, 16, 'parse_channel_threshold_values'], +} + + +class Sfp(SfpBase): + """ + DELLEMC Platform-specific Sfp class + """ + + def __init__(self, index, sfp_type, eeprom_path, + sfp_control, sfp_ctrl_idx): + SfpBase.__init__(self) + self.sfp_type = sfp_type + self.index = index + self.eeprom_path = eeprom_path + self.sfp_control = sfp_control + self.sfp_ctrl_idx = sfp_ctrl_idx + self.sfpInfo = sff8436InterfaceId() + self.sfpDomInfo = sff8436Dom() + + def _read_eeprom_bytes(self, eeprom_path, offset, num_bytes): + eeprom_raw = [] + try: + eeprom = open(eeprom_path, mode="rb", buffering=0) + except IOError: + return None + + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + try: + eeprom.seek(offset) + raw = eeprom.read(num_bytes) + except IOError: + eeprom.close() + return None + + try: + for n in range(0, num_bytes): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except BaseException: + eeprom.close() + return None + + eeprom.close() + return eeprom_raw + + def _get_eeprom_data(self, eeprom_key): + eeprom_data = None + page_offset = None + + if (self.sfpInfo is None): + return None + + page_offset = sff8436_parser[eeprom_key][PAGE_OFFSET] + eeprom_data_raw = self._read_eeprom_bytes( + self.eeprom_path, + (sff8436_parser[eeprom_key][PAGE_OFFSET] + + sff8436_parser[eeprom_key][KEY_OFFSET]), + sff8436_parser[eeprom_key][KEY_WIDTH]) + if (eeprom_data_raw is not None): + # Offset 128 is used to retrieve sff8436InterfaceId Info + # Offset 0 is used to retrieve sff8436Dom Info + if (page_offset == 128): + eeprom_data = getattr( + self.sfpInfo, sff8436_parser[eeprom_key][FUNC_NAME])( + eeprom_data_raw, 0) + else: + eeprom_data = getattr( + self.sfpDomInfo, sff8436_parser[eeprom_key][FUNC_NAME])( + eeprom_data_raw, 0) + + return eeprom_data + + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + """ + transceiver_info_dict = {} + compliance_code_dict = {} + transceiver_info_dict = dict.fromkeys(info_dict_keys, 'N/A') + + # BaseInformation + iface_data = self._get_eeprom_data('type') + if (iface_data is not None): + connector = iface_data['data']['Connector']['value'] + encoding = iface_data['data']['EncodingCodes']['value'] + ext_id = iface_data['data']['Extended Identifier']['value'] + rate_identifier = iface_data['data']['RateIdentifier']['value'] + identifier = iface_data['data']['type']['value'] + type_abbrv_name=iface_data['data']['type_abbrv_name']['value'] + bit_rate = str( + iface_data['data']['Nominal Bit Rate(100Mbs)']['value']) + + for key in compliance_code_tup: + if key in iface_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = iface_data['data']['Specification compliance']['value'][key]['value'] + for key in cable_length_tup: + if key in iface_data['data']: + cable_type = key + cable_length = str(iface_data['data'][key]['value']) + else: + return transceiver_info_dict + + # Vendor Date + vendor_date_data = self._get_eeprom_data('vendor_date') + if (vendor_date_data is not None): + vendor_date = vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] + else: + return None + + # Vendor Name + vendor_name_data = self._get_eeprom_data('manufacturename') + if (vendor_name_data is not None): + vendor_name = vendor_name_data['data']['Vendor Name']['value'] + else: + return transceiver_info_dict + + # Vendor OUI + vendor_oui_data = self._get_eeprom_data('vendor_oui') + if (vendor_oui_data is not None): + vendor_oui = vendor_oui_data['data']['Vendor OUI']['value'] + else: + return transceiver_info_dict + + # Vendor PN + vendor_pn_data = self._get_eeprom_data('modelname') + if (vendor_pn_data is not None): + vendor_pn = vendor_pn_data['data']['Vendor PN']['value'] + else: + return transceiver_info_dict + + # Vendor Revision + vendor_rev_data = self._get_eeprom_data('hardwarerev') + if (vendor_rev_data is not None): + vendor_rev = vendor_rev_data['data']['Vendor Rev']['value'] + else: + return transceiver_info_dict + + # Vendor Serial Number + vendor_sn_data = self._get_eeprom_data('serialnum') + if (vendor_sn_data is not None): + vendor_sn = vendor_sn_data['data']['Vendor SN']['value'] + else: + return transceiver_info_dict + + # Fill The Dictionary and return + transceiver_info_dict['type'] = identifier + transceiver_info_dict['hardwarerev'] = vendor_rev + transceiver_info_dict['serialnum'] = vendor_sn + transceiver_info_dict['manufacturename'] = vendor_name + transceiver_info_dict['modelname'] = vendor_pn + transceiver_info_dict['Connector'] = connector + transceiver_info_dict['encoding'] = encoding + transceiver_info_dict['ext_identifier'] = ext_id + transceiver_info_dict['ext_rateselect_compliance'] = rate_identifier + transceiver_info_dict['cable_type'] = cable_type + transceiver_info_dict['cable_length'] = cable_length + transceiver_info_dict['nominal_bit_rate'] = bit_rate + transceiver_info_dict['specification_compliance'] = str( + compliance_code_dict) + transceiver_info_dict['vendor_date'] = vendor_date + transceiver_info_dict['vendor_oui'] = vendor_oui + transceiver_info_dict['type_abbrv_name']=type_abbrv_name + + return transceiver_info_dict + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + """ + transceiver_dom_threshold_dict = {} + transceiver_dom_threshold_dict = dict.fromkeys( + threshold_dict_keys, 'N/A') + + # Module Threshold + module_threshold_data = self._get_eeprom_data('ModuleThreshold') + if (module_threshold_data is not None): + tempHighAlarm = module_threshold_data['data']['TempHighAlarm']['value'] + tempLowAlarm = module_threshold_data['data']['TempLowAlarm']['value'] + tempHighWarn = module_threshold_data['data']['TempHighWarning']['value'] + tempLowWarn = module_threshold_data['data']['TempLowWarning']['value'] + vccHighAlarm = module_threshold_data['data']['VccHighAlarm']['value'] + vccLowAlarm = module_threshold_data['data']['VccLowAlarm']['value'] + vccHighWarn = module_threshold_data['data']['VccHighWarning']['value'] + vccLowWarn = module_threshold_data['data']['VccLowWarning']['value'] + else: + return transceiver_dom_threshold_dict + + # Channel Threshold + channel_threshold_data = self._get_eeprom_data('ChannelThreshold') + if (channel_threshold_data is not None): + rxPowerHighAlarm = channel_threshold_data['data']['RxPowerHighAlarm']['value'] + rxPowerLowAlarm = channel_threshold_data['data']['RxPowerLowAlarm']['value'] + rxPowerHighWarn = channel_threshold_data['data']['RxPowerHighWarning']['value'] + rxPowerLowWarn = channel_threshold_data['data']['RxPowerLowWarning']['value'] + txBiasHighAlarm = channel_threshold_data['data']['TxBiasHighAlarm']['value'] + txBiasLowAlarm = channel_threshold_data['data']['TxBiasLowAlarm']['value'] + txBiasHighWarn = channel_threshold_data['data']['TxBiasHighWarning']['value'] + txBiasLowWarn = channel_threshold_data['data']['TxBiasLowWarning']['value'] + else: + return transceiver_dom_threshold_dict + + transceiver_dom_threshold_dict['temphighalarm'] = tempHighAlarm + transceiver_dom_threshold_dict['templowalarm'] = tempLowAlarm + transceiver_dom_threshold_dict['temphighwarning'] = tempHighWarn + transceiver_dom_threshold_dict['templowwarning'] = tempLowWarn + transceiver_dom_threshold_dict['vcchighalarm'] = vccHighAlarm + transceiver_dom_threshold_dict['vcclowalarm'] = vccLowAlarm + transceiver_dom_threshold_dict['vcchighwarning'] = vccHighWarn + transceiver_dom_threshold_dict['vcclowwarning'] = vccLowWarn + transceiver_dom_threshold_dict['rxpowerhighalarm'] = rxPowerHighAlarm + transceiver_dom_threshold_dict['rxpowerlowalarm'] = rxPowerLowAlarm + transceiver_dom_threshold_dict['rxpowerhighwarning'] = rxPowerHighWarn + transceiver_dom_threshold_dict['rxpowerlowwarning'] = rxPowerLowWarn + transceiver_dom_threshold_dict['txbiashighalarm'] = txBiasHighAlarm + transceiver_dom_threshold_dict['txbiaslowalarm'] = txBiasLowAlarm + transceiver_dom_threshold_dict['txbiashighwarning'] = txBiasHighWarn + transceiver_dom_threshold_dict['txbiaslowwarning'] = txBiasLowWarn + + return transceiver_dom_threshold_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + """ + tx_bias_list = [] + rx_power_list = [] + transceiver_dom_dict = {} + transceiver_dom_dict = dict.fromkeys(dom_dict_keys, 'N/A') + + # RxLos + rx_los = self.get_rx_los() + + # TxFault + tx_fault = self.get_tx_fault() + + # ResetStatus + reset_state = self.get_reset_status() + + # LowPower Mode + lp_mode = self.get_lpmode() + + # TxDisable + tx_disable = self.get_tx_disable() + + # TxDisable Channel + tx_disable_channel = self.get_tx_disable_channel() + + # Temperature + temperature = self.get_temperature() + + # Voltage + voltage = self.get_voltage() + + # Channel Monitor + channel_monitor_data = self._get_eeprom_data('ChannelMonitor') + if (channel_monitor_data is not None): + tx_bias = channel_monitor_data['data']['TX1Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = channel_monitor_data['data']['TX2Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = channel_monitor_data['data']['TX3Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = channel_monitor_data['data']['TX4Bias']['value'] + tx_bias_list.append(tx_bias) + rx_power = channel_monitor_data['data']['RX1Power']['value'] + rx_power_list.append(rx_power) + rx_power = channel_monitor_data['data']['RX2Power']['value'] + rx_power_list.append(rx_power) + rx_power = channel_monitor_data['data']['RX3Power']['value'] + rx_power_list.append(rx_power) + rx_power = channel_monitor_data['data']['RX4Power']['value'] + rx_power_list.append(rx_power) + else: + return transceiver_dom_dict + + transceiver_dom_dict['rx_los'] = rx_los + transceiver_dom_dict['tx_fault'] = tx_fault + transceiver_dom_dict['reset_status'] = reset_state + transceiver_dom_dict['power_lpmode'] = lp_mode + transceiver_dom_dict['tx_disable'] = tx_disable + transceiver_dom_dict['tx_disable_channel'] = tx_disable_channel + transceiver_dom_dict['temperature'] = temperature + transceiver_dom_dict['voltage'] = voltage + transceiver_dom_dict['tx1bias'] = tx_bias_list[0] + transceiver_dom_dict['tx2bias'] = tx_bias_list[1] + transceiver_dom_dict['tx3bias'] = tx_bias_list[2] + transceiver_dom_dict['tx4bias'] = tx_bias_list[3] + transceiver_dom_dict['rx1power'] = rx_power_list[0] + transceiver_dom_dict['rx2power'] = rx_power_list[1] + transceiver_dom_dict['rx3power'] = rx_power_list[2] + transceiver_dom_dict['rx4power'] = rx_power_list[3] + + return transceiver_dom_dict + + def get_name(self): + """ + Retrieves the name of the sfp + Returns : QSFP or QSFP+ or QSFP28 + """ + iface_data = self._get_eeprom_data('type') + if (iface_data is not None): + identifier = iface_data['data']['type']['value'] + else: + return None + + return identifier + + def get_presence(self): + """ + Retrieves the presence of the sfp + """ + presence_ctrl = self.sfp_control + 'qsfp_modprs' + try: + reg_file = open(presence_ctrl) + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + mask = (1 << self.sfp_ctrl_idx) + + # ModPrsL is active low + if ((reg_value & mask) == 0): + return True + + return False + + def get_model(self): + """ + Retrieves the model number (or part number) of the sfp + """ + vendor_pn_data = self._get_eeprom_data('modelname') + if (vendor_pn_data is not None): + vendor_pn = vendor_pn_data['data']['Vendor PN']['value'] + else: + return None + + return vendor_pn + + def get_serial(self): + """ + Retrieves the serial number of the sfp + """ + vendor_sn_data = self._get_eeprom_data('serialnum') + if (vendor_sn_data is not None): + vendor_sn = vendor_sn_data['data']['Vendor SN']['value'] + else: + return None + + return vendor_sn + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + """ + reset_status = None + reset_ctrl = self.sfp_control + 'qsfp_reset' + try: + reg_file = open(reset_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + index = self.sfp_ctrl_idx + + mask = (1 << index) + + if ((reg_value & mask) == 0): + reset_status = True + else: + reset_status = False + + return reset_status + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + """ + rx_los = None + rx_los_list = [] + + rx_los_data = self._get_eeprom_data('rx_los') + if (rx_los_data is not None): + rx_los = rx_los_data['data']['Rx1LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + rx_los = rx_los_data['data']['Rx2LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + rx_los = rx_los_data['data']['Rx3LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + rx_los = rx_los_data['data']['Rx4LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + + if (rx_los_list[0] and rx_los_list[1] + and rx_los_list[2] and rx_los_list[3]): + rx_los = True + else: + rx_los = False + + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + """ + tx_fault = None + tx_fault_list = [] + + tx_fault_data = self._get_eeprom_data('tx_fault') + if (tx_fault_data is not None): + tx_fault = tx_fault_data['data']['Tx1Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + tx_fault = tx_fault_data['data']['Tx2Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + tx_fault = tx_fault_data['data']['Tx3Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + tx_fault = tx_fault_data['data']['Tx4Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + + if (tx_fault_list[0] and tx_fault_list[1] + and tx_fault_list[2] and tx_fault_list[3]): + tx_fault = True + else: + tx_fault = False + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + """ + tx_disable = None + tx_disable_list = [] + + tx_disable_data = self._get_eeprom_data('tx_disable') + if (tx_disable_data is not None): + tx_disable = tx_disable_data['data']['Tx1Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + tx_disable = tx_disable_data['data']['Tx2Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + tx_disable = tx_disable_data['data']['Tx3Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + tx_disable = tx_disable_data['data']['Tx4Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + + if (tx_disable_list[0] and tx_disable_list[1] + and tx_disable_list[2] and tx_disable_list[3]): + tx_disable = True + else: + tx_disable = False + + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + """ + tx_disable = None + tx_disable_list = [] + + tx_disable_data = self._get_eeprom_data('tx_disable') + if (tx_disable_data is not None): + tx_disable = tx_disable_data['data']['Tx1Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + tx_disable = tx_disable_data['data']['Tx2Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + tx_disable = tx_disable_data['data']['Tx3Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + tx_disable = tx_disable_data['data']['Tx4Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + + bit4 = int(tx_disable_list[3]) * 8 + bit3 = int(tx_disable_list[2]) * 4 + bit2 = int(tx_disable_list[1]) * 2 + bit1 = int(tx_disable_list[0]) * 1 + + tx_disable_channel = hex(bit4 + bit3 + bit2 + bit1) + + return tx_disable_channel + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + """ + lpmode_ctrl = self.sfp_control + 'qsfp_lpmode' + try: + reg_file = open(lpmode_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + index = self.sfp_ctrl_idx + + mask = (1 << index) + + if ((reg_value & mask) == 0): + lpmode_state = False + else: + lpmode_state = True + + return lpmode_state + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + """ + power_override_state = None + + # Reset Status + power_override_data = self._get_eeprom_data('power_override') + if (power_override_data is not None): + power_override = power_override_data['data']['PowerOverRide']['value'] + if (power_override is 'On'): + power_override_state = True + else: + power_override_state = False + + return power_override_state + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + """ + temperature = None + + temperature_data = self._get_eeprom_data('Temperature') + if (temperature_data is not None): + temperature = temperature_data['data']['Temperature']['value'] + + return temperature + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + """ + voltage = None + + voltage_data = self._get_eeprom_data('Voltage') + if (voltage_data is not None): + voltage = voltage_data['data']['Vcc']['value'] + + return voltage + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + """ + tx_bias = None + tx_bias_list = [] + + tx_bias_data = self._get_eeprom_data('ChannelMonitor') + if (tx_bias_data is not None): + tx_bias = tx_bias_data['data']['TX1Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = tx_bias_data['data']['TX2Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = tx_bias_data['data']['TX3Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = tx_bias_data['data']['TX4Bias']['value'] + tx_bias_list.append(tx_bias) + + return tx_bias_list + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + """ + rx_power = None + rx_power_list = [] + + rx_power_data = self._get_eeprom_data('ChannelMonitor') + if (rx_power_data is not None): + rx_power = rx_power_data['data']['RX1Power']['value'] + rx_power_list.append(rx_power) + rx_power = rx_power_data['data']['RX2Power']['value'] + rx_power_list.append(rx_power) + rx_power = rx_power_data['data']['RX3Power']['value'] + rx_power_list.append(rx_power) + rx_power = rx_power_data['data']['RX4Power']['value'] + rx_power_list.append(rx_power) + + return rx_power_list + + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + """ + tx_power = None + tx_power_list = [] + + tx_power_list.append('-infdBm') + tx_power_list.append('-infdBm') + tx_power_list.append('-infdBm') + tx_power_list.append('-infdBm') + + return tx_power_list + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + """ + reset_ctrl = self.sfp_control + 'qsfp_reset' + try: + # Open reset_ctrl in both read & write mode + reg_file = open(reset_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + index = self.sfp_ctrl_idx + + # Mask off the bit corresponding to our port + mask = (1 << index) + + # ResetL is active low + reg_value = (reg_value & ~mask) + + # Convert our register value back to a + # hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the + # register to take port out of reset + try: + reg_file = open(reset_ctrl, "w") + except IOError as e: + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + """ + lpmode_ctrl = self.sfp_control + 'qsfp_lpmode' + try: + reg_file = open(lpmode_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + index = self.sfp_ctrl_idx + + mask = (1 << index) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = (reg_value | mask) + else: + reg_value = (reg_value & ~mask) + + # Convert our register value back to a hex string and write back + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + """ + return False + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + """ + return False + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + """ + return False + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + """ + return False + + def get_status(self): + """ + Retrieves the operational status of the device + """ + reset = self.get_reset_status() + + if (reset == True): + status = False + else: + status = True + + return status diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/thermal.py new file mode 100644 index 00000000000..70bac0c729d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/thermal.py @@ -0,0 +1,217 @@ +#!/usr/bin/env python + +######################################################################## +# DellEMC S6000 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Thermals' information which are available in the platform +# +######################################################################## + + +try: + import os + from sonic_platform_base.thermal_base import ThermalBase + from sonic_platform.psu import Psu +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Thermal(ThermalBase): + """DellEMC Platform-specific Thermal class""" + + I2C_DIR = "/sys/class/i2c-adapter/" + I2C_DEV_MAPPING = (['i2c-11/11-004c/hwmon/', 1], + ['i2c-11/11-004d/hwmon/', 1], + ['i2c-11/11-004e/hwmon/', 1], + ['i2c-10/10-0018/hwmon/', 1], + ['i2c-1/1-0059/hwmon/', 1], + ['i2c-1/1-0059/hwmon/', 2], + ['i2c-1/1-0058/hwmon/', 1], + ['i2c-1/1-0058/hwmon/', 2]) + THERMAL_NAME = ('ASIC On-board', 'NIC', 'System Front', 'DIMM', + 'PSU1-Sensor 1', 'PSU1-Sensor 2', 'PSU2-Sensor 1', + 'PSU2-Sensor 2', 'CPU Core 0', 'CPU Core 1') + + def __init__(self, thermal_index): + self.index = thermal_index + 1 + self.is_psu_thermal = False + self.dependency = None + + if self.index < 9: + i2c_path = self.I2C_DIR + self.I2C_DEV_MAPPING[self.index - 1][0] + hwmon_temp_index = self.I2C_DEV_MAPPING[self.index - 1][1] + hwmon_temp_suffix = "max" + hwmon_node = os.listdir(i2c_path)[0] + self.HWMON_DIR = i2c_path + hwmon_node + '/' + + if self.index == 4: + hwmon_temp_suffix = "crit" + + if self.index > 4: + self.is_psu_thermal = True + self.dependency = Psu(self.index / 7) + else: + dev_path = "/sys/devices/platform/coretemp.0/hwmon/" + hwmon_temp_index = self.index - 7 + hwmon_temp_suffix = "crit" + hwmon_node = os.listdir(dev_path)[0] + self.HWMON_DIR = dev_path + hwmon_node + '/' + + self.thermal_temperature_file = self.HWMON_DIR \ + + "temp{}_input".format(hwmon_temp_index) + self.thermal_high_threshold_file = self.HWMON_DIR \ + + "temp{}_{}".format(hwmon_temp_index, hwmon_temp_suffix) + self.thermal_low_threshold_file = self.HWMON_DIR \ + + "temp{}_min".format(hwmon_temp_index) + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # sysfs_file and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + except: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def get_name(self): + """ + Retrieves the name of the thermal + + Returns: + string: The name of the thermal + """ + return self.THERMAL_NAME[self.index - 1] + + def get_presence(self): + """ + Retrieves the presence of the thermal + + Returns: + bool: True if thermal is present, False if not + """ + if self.dependency: + return self.dependency.get_presence() + else: + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the Thermal + + Returns: + string: Model/part number of Thermal + """ + return 'NA' + + def get_serial(self): + """ + Retrieves the serial number of the Thermal + + Returns: + string: Serial number of Thermal + """ + return 'NA' + + def get_status(self): + """ + Retrieves the operational status of the thermal + + Returns: + A boolean value, True if thermal is operating properly, + False if not + """ + if self.dependency: + return self.dependency.get_status() + else: + return True + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celsius up to + nearest thousandth of one degree Celsius, e.g. 30.125 + """ + thermal_temperature = self._read_sysfs_file( + self.thermal_temperature_file) + if (thermal_temperature != 'ERR'): + thermal_temperature = float(thermal_temperature) / 1000 + else: + thermal_temperature = 0 + + return "{:.3f}".format(thermal_temperature) + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + + Returns: + A float number, the high threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius, + e.g. 30.125 + """ + thermal_high_threshold = self._read_sysfs_file( + self.thermal_high_threshold_file) + if (thermal_high_threshold != 'ERR'): + thermal_high_threshold = float(thermal_high_threshold) / 1000 + else: + thermal_high_threshold = 0 + + return "{:.3f}".format(thermal_high_threshold) + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + + Returns: + A float number, the low threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius, + e.g. 30.125 + """ + thermal_low_threshold = self._read_sysfs_file( + self.thermal_low_threshold_file) + if (thermal_low_threshold != 'ERR'): + thermal_low_threshold = float(thermal_low_threshold) / 1000 + else: + thermal_low_threshold = 0 + + return "{:.3f}".format(thermal_low_threshold) + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one + degree Celsius, e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if + not + """ + # Thermal threshold values are pre-defined based on HW. + return False + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one + degree Celsius, e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if + not + """ + # Thermal threshold values are pre-defined based on HW. + return False diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/systemd/platform-modules-s6000.service b/platform/broadcom/sonic-platform-modules-dell/s6000/systemd/platform-modules-s6000.service new file mode 100644 index 00000000000..b55a466890b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6000/systemd/platform-modules-s6000.service @@ -0,0 +1,13 @@ +[Unit] +Description=Dell S6000 Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/s6000_platform.sh init +ExecStop=/usr/local/bin/s6000_platform.sh deinit +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/modules/Makefile b/platform/broadcom/sonic-platform-modules-dell/s6100/modules/Makefile new file mode 100644 index 00000000000..63242a5cf12 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := dell_s6100_iom_cpld.o dell_s6100_lpc.o dell_ich.o + diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/modules/dell_s6100_iom_cpld.c b/platform/broadcom/sonic-platform-modules-dell/s6100/modules/dell_s6100_iom_cpld.c new file mode 100644 index 00000000000..1ffa909ed70 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/modules/dell_s6100_iom_cpld.c @@ -0,0 +1,516 @@ + +#include // included for all kernel modules +#include // included for KERN_INFO +#include // included for __init and __exit macros +#include +#include +#include +#include + + +//iom cpld slave address +#define IOM_CPLD_SLAVE_ADD 0x3e + +#define CPLD_SEP_RST0 0x5 + +//iom cpld ver register +#define IOM_CPLD_SLAVE_VER 0x00 + +//qsfp reset cntrl reg on each iom +#define QSFP_RST_CRTL_REG0 0x10 +#define QSFP_RST_CRTL_REG1 0x11 + +//qsfp lp mode reg on each iom +#define QSFP_LPMODE_REG0 0x12 +#define QSFP_LPMODE_REG1 0x13 + +//qsfp mod presence reg on each iom +#define QSFP_MOD_PRS_REG0 0x16 +#define QSFP_MOD_PRS_REG1 0x17 + +//qsfp interrupt registers +#define QSFP_INT_STA_REG0 0x14 +#define QSFP_INT_STA_REG1 0x15 +#define QSFP_ABS_STA_REG0 0x16 +#define QSFP_ABS_STA_REG1 0x17 +#define QSFP_TRIG_MOD 0x20 +#define QSFP_INT_COMBINE 0x21 +#define QSFP_INT0 0x22 +#define QSFP_INT1 0x23 +#define QSFP_ABS_INT0 0x24 +#define QSFP_ABS_INT1 0x25 +#define QSFP_INT_MASK0 0x26 +#define QSFP_INT_MASK1 0x27 +#define QSFP_ABS_MASK0 0x28 +#define QSFP_ABS_MASK1 0x29 + +struct cpld_data { + struct i2c_client *client; + struct mutex update_lock; +}; + + +static void dell_s6100_iom_cpld_add_client(struct i2c_client *client) +{ + struct cpld_data *data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + + if (!data) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + data->client = client; + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); +} + +static void dell_s6100_iom_cpld_remove_client(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + kfree(data); + return; +} + +int dell_s6100_iom_cpld_read(struct cpld_data *data,unsigned short cpld_addr, u8 reg) +{ + int ret = -EPERM; + u8 high_reg =0x00; + + mutex_lock(&data->update_lock); + ret = i2c_smbus_write_byte_data(data->client, high_reg,reg); + ret = i2c_smbus_read_byte(data->client); + mutex_unlock(&data->update_lock); + + return ret; +} + +int dell_s6100_iom_cpld_write(struct cpld_data *data,unsigned short cpld_addr, u8 reg, u8 value) +{ + int ret = -EIO; + u16 devdata=0; + u8 high_reg =0x00; + + mutex_lock(&data->update_lock); + devdata = (value << 8) | reg; + i2c_smbus_write_word_data(data->client,high_reg,devdata); + mutex_unlock(&data->update_lock); + + return ret; +} +static ssize_t get_cpldver(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u8 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,IOM_CPLD_SLAVE_VER); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u8)ret & 0xff; + return sprintf(buf,"IOM CPLD Version:0x%02x\n",devdata); +} + +static ssize_t get_modprs(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_MOD_PRS_REG0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_MOD_PRS_REG1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_lpmode(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_LPMODE_REG0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_LPMODE_REG1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_reset(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_RST_CRTL_REG0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_RST_CRTL_REG1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t set_lpmode(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,QSFP_LPMODE_REG0,(u8)(devdata & 0xff)); + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,QSFP_LPMODE_REG1,(u8)((devdata >> 8) & 0xff)); + + return count; +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,QSFP_RST_CRTL_REG0,(u8)(devdata & 0xff)); + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,QSFP_RST_CRTL_REG1,(u8)((devdata >> 8) & 0xff)); + + return count; +} + +static ssize_t get_int_sta(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_INT_STA_REG0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_INT_STA_REG1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_abs_sta(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_STA_REG0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_STA_REG1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_trig_mod(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u8 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_TRIG_MOD); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u8)ret & 0xff; + return sprintf(buf,"0x%02x\n",devdata); +} + +static ssize_t set_trig_mod(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,QSFP_TRIG_MOD,(u8)(devdata & 0xff)); + + return count; +} + +static ssize_t get_int_combine(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u8 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_INT_COMBINE); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u8)ret & 0xff; + return sprintf(buf,"0x%02x\n",devdata); +} + +static ssize_t get_int(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_INT0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_INT1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_abs_int(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_INT0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_INT1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_int_mask(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_INT_MASK0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_INT_MASK1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t set_int_mask(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,QSFP_INT_MASK0,(u8)(devdata & 0xff)); + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,QSFP_INT_MASK1,(u8)((devdata >> 8) & 0xff)); + + return count; +} + +static ssize_t get_abs_mask(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_MASK0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_MASK1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t set_abs_mask(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_MASK0,(u8)(devdata & 0xff)); + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,QSFP_ABS_MASK1,(u8)((devdata >> 8) & 0xff)); + + return count; +} + +static ssize_t get_sep_reset(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u8 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_s6100_iom_cpld_read(data,IOM_CPLD_SLAVE_ADD,CPLD_SEP_RST0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u8)ret & 0xff; + return sprintf(buf,"0x%02x\n",devdata); +} + +static ssize_t set_sep_reset(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_s6100_iom_cpld_write(data,IOM_CPLD_SLAVE_ADD,CPLD_SEP_RST0,(u8)(devdata & 0xff)); + + return count; +} + +static DEVICE_ATTR(iom_cpld_vers,S_IRUGO,get_cpldver, NULL); +static DEVICE_ATTR(qsfp_modprs, S_IRUGO,get_modprs, NULL); +static DEVICE_ATTR(qsfp_lpmode, S_IRUGO | S_IWUSR,get_lpmode,set_lpmode); +static DEVICE_ATTR(qsfp_reset, S_IRUGO | S_IWUSR,get_reset, set_reset); +static DEVICE_ATTR(qsfp_int_sta, S_IRUGO, get_int_sta, NULL); +static DEVICE_ATTR(qsfp_abs_sta, S_IRUGO, get_abs_sta, NULL); +static DEVICE_ATTR(qsfp_trig_mod, S_IRUGO | S_IWUSR, get_trig_mod, set_trig_mod); +static DEVICE_ATTR(qsfp_int_combine, S_IRUGO, get_int_combine, NULL); +static DEVICE_ATTR(qsfp_int, S_IRUGO, get_int, NULL); +static DEVICE_ATTR(qsfp_abs_int, S_IRUGO, get_abs_int, NULL); +static DEVICE_ATTR(qsfp_int_mask, S_IRUGO | S_IWUSR, get_int_mask, set_int_mask); +static DEVICE_ATTR(qsfp_abs_mask, S_IRUGO | S_IWUSR, get_abs_mask, set_abs_mask); +static DEVICE_ATTR(sep_reset, S_IRUGO | S_IWUSR, get_sep_reset, set_sep_reset); + +static struct attribute *i2c_cpld_attrs[] = { + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_reset.attr, + &dev_attr_qsfp_modprs.attr, + &dev_attr_iom_cpld_vers.attr, + &dev_attr_qsfp_int_sta.attr, + &dev_attr_qsfp_abs_sta.attr, + &dev_attr_qsfp_trig_mod.attr, + &dev_attr_qsfp_int_combine.attr, + &dev_attr_qsfp_int.attr, + &dev_attr_qsfp_abs_int.attr, + &dev_attr_qsfp_int_mask.attr, + &dev_attr_qsfp_abs_mask.attr, + &dev_attr_sep_reset.attr, + NULL, +}; + +static struct attribute_group i2c_cpld_attr_grp = { + .attrs = i2c_cpld_attrs, +}; + +static int dell_s6100_iom_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + dev_info(&client->dev, "chip found\n"); + dell_s6100_iom_cpld_add_client(client); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &i2c_cpld_attr_grp); + if (status) { + printk(KERN_INFO "Cannot create sysfs\n"); + } + return 0; + +exit: + return status; +} + +static int dell_s6100_iom_cpld_remove(struct i2c_client *client) +{ + dell_s6100_iom_cpld_remove_client(client); + return 0; +} + + +static const struct i2c_device_id dell_s6100_iom_cpld_id[] = { + { "dell_s6100_iom_cpld", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, dell_s6100_iom_cpld_id); + +static struct i2c_driver dell_s6100_iom_cpld_driver = { + .driver = { + .name = "dell_s6100_iom_cpld", + }, + .probe = dell_s6100_iom_cpld_probe, + .remove = dell_s6100_iom_cpld_remove, + .id_table = dell_s6100_iom_cpld_id, +}; + + + +static int __init dell_s6100_iom_cpld_init(void) +{ + return i2c_add_driver(&dell_s6100_iom_cpld_driver); +} + +static void __exit dell_s6100_iom_cpld_exit(void) +{ + i2c_del_driver(&dell_s6100_iom_cpld_driver); +} + +MODULE_AUTHOR("Srideep Devireddy "); +MODULE_DESCRIPTION("dell_s6100_iom_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(dell_s6100_iom_cpld_init); +module_exit(dell_s6100_iom_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/README b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/README new file mode 100644 index 00000000000..b141bb05e2e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/README @@ -0,0 +1,146 @@ +Dell S6100 64x40G support +------------------------ + +summary:- +S6100 has 64 x 40G port capacity +S6100 supports 4 IO Modules which are pluggable. Below section covers how to power on IO modules +and initialize the device drivers and configure necessary mux to send traffic. + + +Necessary drivers and scripts to package + +1) Users are expected to build necessary drivers for kernel and package to acess it on the target + + a) Mgmt phy driver + This supports BCM 54616 phy driver ( enable CONFIG_IGB in kernel config) + b) driver-support-sff-8436-eeprom.patch + c) driver-support-sff-8436-eeprom-update.patch + This driver supports QSFP EEPROM + d) dell_s6100_iom_cpld.ko + This driver provides support for cpld on 4 x 40Gig-IOM modules + e) i2c_mux_pca954x.ko + This driver provides support for i2c mux/switch (pca954x) + f) dell_s6100_lpc.ko + This driver porivide support for reading all the platform info from SMF. + + +2) Users are also expected to package below scripts for platform initialization and i2c tree creation + + a) iom_power.sh + This script is used to power on IO modules on S6100 + b) io_rd_wr.py +This script is generic LPC/io read/write utility (can also access system cpld) + +steps to platform initialization (Tested with 3.16) + +1) After power up of S6100 + + a) power up the io modules by executing (./iom_power.sh) + b) insert i2c_mux_pca954x.ko,dell_s6100_iom_cpld.ko,dell_s6100_lpc.ko + + Above 2 steps can be called by including them in below 2 step + +2) Build i2c device tree/device initialization by calling below script + + ./s6100_platform_init.sh + +3) IOM cpld devices are created under "/sys/bus/i2c/drivers/dell_s6100_iom_cpld/" + QSFP handles via sysfs i2c bus #( 15,16,17,18-003e) + iom_cpld_vers -- Displays CPLD version(RO) + qsfp_lpmode -- lpmode settings(RW) + qsfp_modprs -- modules presence (RO) + qsfp_reset -- reset settings (RW) + + ls /sys/bus/i2c/drivers/dell_s6100_iom_cpld/15-003e/ + driver/ iom_cpld_vers modalias name power/ qsfp_lpmode qsfp_modprs qsfp_reset subsystem/ uevent + +4) step 2 script also builds/attach sfp device tress in sysfs + + Example for reading EEPROM data + + cat /sys/bus/i2c/devices/19-0050/eeprom | hexdump -C + 00000000 0d 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 |................| + 00000010 00 00 00 00 00 00 18 1b 00 00 82 20 00 00 00 00 |........... ....| + 00000020 00 00 00 00 00 00 00 00 00 00 16 4d 16 4d 16 4d |...........M.M.M| + 00000030 16 4d 34 bf 44 bf 54 bf 64 bf 00 00 00 00 00 00 |.M4.D.T.d.......| + 00000040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| + * + 00000070 00 00 00 00 00 00 00 ff ff ff ff ff ff ff ff 00 |................| + 00000080 0d 00 0c 04 00 00 00 40 40 02 d5 05 69 00 00 32 |.......@@...i..2| + 00000090 00 00 00 00 46 49 4e 49 53 41 52 20 43 4f 52 50 |....FINISAR CORP| + 000000a0 20 20 20 20 07 00 90 65 46 54 4c 34 31 30 51 45 | ...eFTL410QE| + 000000b0 31 43 20 20 20 20 20 20 41 33 42 68 07 d0 46 70 |1C A3Bh..Fp| + 000000c0 00 01 04 d0 4d 4c 54 30 30 51 33 20 20 20 20 20 |....MLT00Q3 | + 000000d0 20 20 20 20 31 32 30 31 31 35 20 20 08 00 00 38 | 120115 ...8| + 000000e0 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 | | + 000000f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| + * + 00000200 4b 00 fb 00 46 00 00 00 00 00 00 00 00 00 00 00 |K...F...........| + 00000210 94 70 6e f0 86 c4 7b 0c 00 00 00 00 00 00 00 00 |.pn...{.........| + 00000220 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| + * + 00000260 00 00 11 11 00 00 00 00 00 00 00 00 00 00 22 22 |..............""| + 00000270 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| + 00000280 + +5)SMF driver details/Readme are as below + + S6100 SMF + --------- + + S6100 has one SMF soc on CPU board. This is via LPC interface, provide access to all the below functionality + + a) Read sensors details on the system + b) Read PSU details on the system + c) Read fans/Fan tray details on the system + d) Read/Write to system led + + dell_s6100_lpc create entry for all the above necessary platform components as attributes in below path. + + /sys/devices/platform/dell_s6100_lpc/ + + + LED:- + ---- + + Get /set operations on sys_led + + Get operation + cat /sys/devices/platform/dell_s6100_lpc/sys_led + 0x80 + + Set operation + echo 83 > sys/devices/platform/dell_s6100_lpc/sys_led + + Sensors:- + -------- + + Max no of sensors on the system ( 11 sensors are available on fully loaded system) + + cat /sys/devices/platform/dell_s6100_lpc/max_num_temp_sensors + b + + cat /sys/devices/platform/dell_s6100_lpc/temp_sensor_1 ( temp_sensor_1 <85>.temp_sensor_11) + + Fan tray speed:- + -------------- + + /sys/devices/platform/dell_s6100_lpc/fan_tray_1_speed (fan_tray_1_speed - fan_tray_4_speed) + 13700 + + cat /sys/devices/platform/dell_s6100_lpc/psu1_max_pwr + 110 + cat /sys/devices/platform/dell_s6100_lpc/psu2_max_pwr + 110 + + cat /sys/devices/platform/dell_s6100_lpc/psu_total_pwr + 232 + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/iom_power_off.sh b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/iom_power_off.sh new file mode 100755 index 00000000000..a7671cfe589 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/iom_power_off.sh @@ -0,0 +1,16 @@ +#!/bin/bash +#This script is used to power off IO modules +# IOM can be controlled via SMF using mailbox registers +# write 0x2 to 0x04D9 to power off IOM 1 +./io_rd_wr.py --set --val 0x04 --offset 0x210 +./io_rd_wr.py --set --val 0xd9 --offset 0x211 +./io_rd_wr.py --set --val 0x2 --offset 0x213 +# write 0x2 to 0x04DA to power off IOM 2 +./io_rd_wr.py --set --val 0xda --offset 0x211 +./io_rd_wr.py --set --val 0x2 --offset 0x213 +# write 0x2 to 0x04DB to power off IOM 3 +./io_rd_wr.py --set --val 0xdb --offset 0x211 +./io_rd_wr.py --set --val 0x2 --offset 0x213 +# write 0x2 to 0x04DC to power off IOM 4 +./io_rd_wr.py --set --val 0xdc --offset 0x211 +./io_rd_wr.py --set --val 0x2 --offset 0x213 diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/iom_power_on.sh b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/iom_power_on.sh new file mode 100755 index 00000000000..3d31170803e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/iom_power_on.sh @@ -0,0 +1,17 @@ +#!/bin/bash +# This script is used to power on IO modules +# IOM can be controlled via SMF using mailbox registers + +# write 0x1 to 0x04D9 to power up IOM 1 +/usr/local/bin/io_rd_wr.py --set --val 0x04 --offset 0x210 +/usr/local/bin/io_rd_wr.py --set --val 0xd9 --offset 0x211 +/usr/local/bin/io_rd_wr.py --set --val 0x1 --offset 0x213 +# write 0x1 to 0x04DA to power up IOM 2 +/usr/local/bin/io_rd_wr.py --set --val 0xda --offset 0x211 +/usr/local/bin/io_rd_wr.py --set --val 0x1 --offset 0x213 +# write 0x1 to 0x04DB to power up IOM 3 +/usr/local/bin/io_rd_wr.py --set --val 0xdb --offset 0x211 +/usr/local/bin/io_rd_wr.py --set --val 0x1 --offset 0x213 +# write 0x1 to 0x04DC to power up IOM 4 +/usr/local/bin/io_rd_wr.py --set --val 0xdc --offset 0x211 +/usr/local/bin/io_rd_wr.py --set --val 0x1 --offset 0x213 diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/override.conf b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/override.conf new file mode 100644 index 00000000000..cd7458e7a8b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/override.conf @@ -0,0 +1,3 @@ +[Service] +ExecStart= +ExecStart=/usr/share/sonic/device/x86_64-dell_s6100_c2538-r0/platform_reboot_override diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/platform_reboot_override b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/platform_reboot_override new file mode 100755 index 00000000000..3e165630658 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/platform_reboot_override @@ -0,0 +1,25 @@ +#!/usr/bin/python +import sys +import os +import struct + +PORT_RES = '/dev/port' + + +def portio_reg_write(resource, offset, val): + fd = os.open(resource, os.O_RDWR) + if(fd < 0): + print 'file open failed %s" % resource' + return + if(os.lseek(fd, offset, os.SEEK_SET) != offset): + print 'lseek failed on %s' % resource + return + ret = os.write(fd, struct.pack('B', val)) + if(ret != 1): + print 'write failed %d' % ret + return + os.close(fd) + +if __name__ == "__main__": + portio_reg_write(PORT_RES, 0xcf9, 0xe) + diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/platform_sensors.py new file mode 100755 index 00000000000..a0231bc507c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/platform_sensors.py @@ -0,0 +1,324 @@ +#!/usr/bin/python + +# On S6100, the Platform Management Controller runs the +# thermal algorithm. It provides a mailbox for the Host +# to query relevant thermals. The dell_mailbox module +# provides the sysfs support for the following objects: +# * onboard temperature sensors +# * FAN trays +# * PSU +# +import os +import sys +import logging + +S6100_MAX_FAN_TRAYS = 4 +S6100_MAX_PSUS = 2 +S6100_MAX_IOMS = 4 + +HWMON_DIR = "/sys/devices/platform/SMF.512/hwmon/" +HWMON_NODE = os.listdir(HWMON_DIR)[0] +MAILBOX_DIR = HWMON_DIR + HWMON_NODE +iom_status_list = [] + +# Get a mailbox register + + +def get_pmc_register(reg_name): + retval = 'ERR' + mb_reg_file = MAILBOX_DIR+'/'+reg_name + + if (not os.path.isfile(mb_reg_file)): + print mb_reg_file, 'not found !' + return retval + + try: + with open(mb_reg_file, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", mb_reg_file, "file !") + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + +logging.basicConfig(level=logging.DEBUG) + +if (os.path.isdir(MAILBOX_DIR)): + print 'dell-s6100-lpc' + print 'Adapter: S6100 Platform Management Controller' +else: + logging.error('S6100 Platform Management Controller module not loaded !') + # sys.exit(0) + +# Print the information for temperature sensors + + +def print_temperature_sensors(): + print("\nOnboard Temperature Sensors:") + print ' CPU: ',\ + int(get_pmc_register('temp1_input'))/1000, 'C' + print ' BCM56960 (PSU side): ',\ + int(get_pmc_register('temp2_input'))/1000, 'C' + print ' System Outlet 1 (switch board): ',\ + int(get_pmc_register('temp3_input'))/1000, 'C' + print ' BCM56960 (IO side): ',\ + int(get_pmc_register('temp4_input'))/1000, 'C' + print ' System Outlet 2 (CPU board): ',\ + int(get_pmc_register('temp9_input'))/1000, 'C' + print ' System Inlet Left (IO side): ',\ + int(get_pmc_register('temp10_input'))/1000, 'C' + print ' System Inlet Right (IO side): ',\ + int(get_pmc_register('temp11_input'))/1000, 'C' + + iom_status = get_pmc_register('iom_presence') + iom_status = int(iom_status, 16) + + iom_presence = get_pmc_register('iom_status') + + if (iom_presence != 'ERR'): + iom_presence = int(iom_presence, 16) + + # IOM presence : 0 => IOM present + # Temperature sensors 5..8 correspond to IOM 1..4 + for iom in range(0, S6100_MAX_IOMS): + if (~iom_presence & (1 << iom)): + iom_sensor_indx = iom + 5 + print ' IOM ' + str(iom + 1) + ':\t\t\t ',\ + int(get_pmc_register('temp'+str(iom_sensor_indx) + + '_input'))/1000, 'C' + + # Save the IOM Status for later use + if (~iom_status & (1 << iom)): + iom_status_list.append('ON') + else: + iom_status_list.append('OFF') + else: + iom_status_list.append('Not present') + print ' IOM ' + str(iom + 1) + ':\t\t\t ', 'Not present' + else: + logging.error('Unable to check IOM presence') + +print_temperature_sensors() + + +# Print the information for voltage sensors + + +def print_voltage_sensors(): + print("\nOnboard Voltage Sensors:") + + print ' CPU XP3R3V_EARLY ',\ + float(get_pmc_register('in1_input'))/1000, 'V' + print ' CPU XP5R0V_CP ',\ + float(get_pmc_register('in2_input'))/1000, 'V' + print ' CPU XP3R3V_STD ',\ + float(get_pmc_register('in3_input'))/1000, 'V' + print ' CPU XP3R3V_CP ',\ + float(get_pmc_register('in4_input'))/1000, 'V' + print ' CPU XP0R75V_VTT_A ',\ + float(get_pmc_register('in5_input'))/1000, 'V' + print ' CPU XPPR75V_VTT_B ',\ + float(get_pmc_register('in6_input'))/1000, 'V' + print ' CPU XP1R07V_CPU ',\ + float(get_pmc_register('in7_input'))/1000, 'V' + print ' CPU XP1R0V_CPU ',\ + float(get_pmc_register('in8_input'))/1000, 'V' + print ' CPU XP12R0V ',\ + float(get_pmc_register('in9_input'))/1000, 'V' + print ' CPU VDDR_CPU_2 ',\ + float(get_pmc_register('in10_input'))/1000, 'V' + print ' CPU VDDR_CPU_1 ',\ + float(get_pmc_register('in11_input'))/1000, 'V' + print ' CPU XP1R5V_CLK ',\ + float(get_pmc_register('in12_input'))/1000, 'V' + print ' CPU XP1R8V_CPU ',\ + float(get_pmc_register('in13_input'))/1000, 'V' + print ' CPU XP1R0V_CPU_VNN ',\ + float(get_pmc_register('in14_input'))/1000, 'V' + print ' CPU XP1R0V_CPU_VCC ',\ + float(get_pmc_register('in15_input'))/1000, 'V' + print ' CPU XP1R5V_EARLY ',\ + float(get_pmc_register('in16_input'))/1000, 'V' + print ' SW XP3R3V_MON ',\ + float(get_pmc_register('in17_input'))/1000, 'V' + print ' SW XP1R25V_MON ',\ + float(get_pmc_register('in19_input'))/1000, 'V' + print ' SW XP1R2V_MON ',\ + float(get_pmc_register('in20_input'))/1000, 'V' + print ' SW XP1R0V_SW_MON ',\ + float(get_pmc_register('in21_input'))/1000, 'V' + print ' SW XP1R0V_ROV_SW_MON ',\ + float(get_pmc_register('in22_input'))/1000, 'V' + print ' SW XR1R0V_BCM84752_MON ',\ + float(get_pmc_register('in23_input'))/1000, 'V' + print ' SW XP5V_MB_MON ',\ + float(get_pmc_register('in24_input'))/1000, 'V' + print ' SW XP3R3V_FPGA_MON ',\ + float(get_pmc_register('in26_input'))/1000, 'V' + print ' SW XP3R3V_EARLY_MON ',\ + float(get_pmc_register('in27_input'))/1000, 'V' + +print_voltage_sensors() + +# Print the information for 1 Fan Tray + + +def print_fan_tray(tray): + + Fan_Status = ['Normal', 'Abnormal'] + Airflow_Direction = ['B2F', 'F2B'] + + print ' Fan Tray ' + str(tray) + ':' + + if (tray == 1): + fan1_speed = get_pmc_register('fan1_input') + air_flow_reg = int(get_pmc_register('fan1_airflow'), 16) + fan1_status = 0 if fan1_speed >= 1000 else 1 + + print ' Fan Speed: ', fan1_speed, 'RPM' + print ' Fan State: ', Fan_Status[fan1_status] + print ' Air Flow: ', Airflow_Direction[air_flow_reg] + elif (tray == 2): + fan1_speed = get_pmc_register('fan3_input') + air_flow_reg = int(get_pmc_register('fan3_airflow'), 16) + fan1_status = 0 if fan1_speed >= 1000 else 1 + + print ' Fan Speed: ', fan1_speed, 'RPM' + print ' Fan State: ', Fan_Status[fan1_status] + print ' Air Flow: ', Airflow_Direction[air_flow_reg] + elif (tray == 3): + fan1_speed = get_pmc_register('fan5_input') + air_flow_reg = int(get_pmc_register('fan5_airflow'), 16) + fan1_status = 0 if fan1_speed >= 1000 else 1 + + print ' Fan Speed: ', fan1_speed, 'RPM' + print ' Fan State: ', Fan_Status[fan1_status] + print ' Air Flow: ', Airflow_Direction[air_flow_reg] + elif (tray == 4): + fan1_speed = get_pmc_register('fan7_input') + air_flow_reg = int(get_pmc_register('fan7_airflow'), 16) + fan1_status = 0 if fan1_speed >= 1000 else 1 + + print ' Fan Speed: ', fan1_speed, 'RPM' + print ' Fan State: ', Fan_Status[fan1_status] + print ' Air Flow: ', Airflow_Direction[air_flow_reg] + +print('\nFan Trays:') +fan_tray_presence = get_pmc_register('fan_tray_presence') + +if (fan_tray_presence != 'ERR'): + fan_tray_presence = int(fan_tray_presence, 16) + + for tray in range(0, S6100_MAX_FAN_TRAYS): + if (fan_tray_presence & (1 << tray)): + print_fan_tray(tray + 1) + else: + print '\n Fan Tray ' + str(tray + 1) + ': Not present' +else: + logging.error('Unable to read FAN presence') + +# Print the information for PSU1, PSU2 + + +def print_psu(psu): + Psu_Type = ['Mismatch', 'Normal'] + Psu_Input_Type = ['AC', 'DC'] + PSU_STATUS_TYPE_BIT = 4 + PSU_STATUS_INPUT_TYPE_BIT = 1 + PSU_FAN_PRESENT_BIT = 2 + PSU_FAN_STATUS_BIT = 1 + PSU_FAN_AIR_FLOW_BIT = 0 + Psu_Fan_Presence = ['Present', 'Absent'] + Psu_Fan_Status = ['Normal', 'Abnormal'] + Psu_Fan_Airflow = ['B2F', 'F2B'] + + print ' PSU ' + str(psu) + ':' + if (psu == 1): + psu_status = int(get_pmc_register('psu1_presence'), 16) + else: + psu_status = int(get_pmc_register('psu2_presence'), 16) + + psu_input_type = (psu_status & (1 << PSU_STATUS_INPUT_TYPE_BIT)) >>\ + PSU_STATUS_INPUT_TYPE_BIT + psu_type = (psu_status & (1 << PSU_STATUS_TYPE_BIT)) >>\ + PSU_STATUS_TYPE_BIT + + print ' Input: ', Psu_Input_Type[psu_input_type] + print ' Type: ', Psu_Type[psu_type] + + # PSU FAN details + if (psu == 1): + print ' FAN Speed: ', get_pmc_register('fan11_input'), 'RPM' + psu_fan_airflow = int(get_pmc_register('fan11_airflow')) + psu_fan_status = int(get_pmc_register('fan11_alarm')) + psu_fan_present = int(get_pmc_register('fan11_fault')) + input_voltage = float(get_pmc_register('in29_input')) / 1000 + output_voltage = float(get_pmc_register('in30_input')) / 1000 + input_current = float(get_pmc_register('curr601_input')) / 100 + output_current = float(get_pmc_register('curr602_input')) / 100 + input_power = float(get_pmc_register('power1_input')) / 1000000 + output_power = float(get_pmc_register('power2_input')) / 1000000 + if (input_power != 0): + psu_fan_temp = int(get_pmc_register('temp14_input'))/1000 + else: + print ' FAN Speed: ', get_pmc_register('fan12_input'), 'RPM' + psu_fan_airflow = int(get_pmc_register('fan12_airflow')) + psu_fan_status = int(get_pmc_register('fan12_alarm')) + psu_fan_present = int(get_pmc_register('fan12_fault')) + input_voltage = float(get_pmc_register('in31_input')) / 1000 + output_voltage = float(get_pmc_register('in32_input')) / 1000 + input_current = float(get_pmc_register('curr701_input')) / 100 + output_current = float(get_pmc_register('curr702_input')) / 100 + input_power = float(get_pmc_register('power3_input')) / 1000000 + output_power = float(get_pmc_register('power4_input')) / 1000000 + if (input_power != 0): + psu_fan_temp = int(get_pmc_register('temp15_input'))/1000 + print ' FAN: ', Psu_Fan_Presence[psu_fan_present] + print ' FAN Status: ', Psu_Fan_Status[psu_fan_status] + print ' FAN AIRFLOW: ', Psu_Fan_Airflow[psu_fan_airflow] + + # PSU input & output monitors + print ' Input Voltage: %6.2f' % (input_voltage), 'V' + + print ' Output Voltage: %6.2f' % (output_voltage), 'V' + + print ' Input Current: %6.2f' % (input_current), 'A' + + print ' Output Current: %6.2f' % (output_current), 'A' + + print ' Input Power: %6.2f' % (input_power), 'W' + + print ' Output Power: %6.2f' % (output_power), 'W' + + # PSU firmware gives spurious temperature reading without input power + if (input_power != 0): + print ' Temperature: ', psu_fan_temp, 'C' + else: + print ' Temperature: ', 'NA' + +print('\nPSUs:') +for psu in range(1, S6100_MAX_PSUS + 1): + + if (psu == 1): + psu_status = get_pmc_register('psu1_presence') + else: + psu_status = get_pmc_register('psu2_presence') + + if (psu_status != 'ERR'): + psu_status = int(psu_status, 16) + if (~psu_status & 0b1): + print_psu(psu) + else: + print '\n PSU ', psu, 'Not present' + else: + logging.error('Unable to check PSU presence') + +print '\n Total Power: ', get_pmc_register('current_total_power'), 'W' + +print('\nIO Modules:') + +for iom in range(1, S6100_MAX_IOMS+1): + print ' IOM ' + str(iom) + ' :' + iom_status_list[iom - 1] + +print '\n' diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/platform_watchdog_disable.sh b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/platform_watchdog_disable.sh new file mode 100755 index 00000000000..c3a90f3e89b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/platform_watchdog_disable.sh @@ -0,0 +1,13 @@ +#!/bin/bash +#This script is used to disable SMF Watchdog Timer + +wd_status=-1 +enabled=0 + +# Disable Watchdog if enabled +wd_status=$(io_rd_wr.py --get --offset 0x207 | cut -d " " -f3) + +if [[ $wd_status -eq $enabled ]]; then + echo "Disabling Watchdog Timer.." + io_rd_wr.py --set --val 1 --offset 0x207 +fi diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/platform_watchdog_enable.sh b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/platform_watchdog_enable.sh new file mode 100755 index 00000000000..804627b5e2f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/platform_watchdog_enable.sh @@ -0,0 +1,8 @@ +#!/bin/bash +#This script is used to enable SMF Watchdog Timer + +# Set watchdog to 180 seconds +io_rd_wr.py --set --val 3 --offset 0x206 + +# Enable watchdog timer +io_rd_wr.py --set --val 0 --offset 0x207 diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/s6100_platform.sh b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/s6100_platform.sh new file mode 100755 index 00000000000..d8b13ca02c1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/s6100_platform.sh @@ -0,0 +1,297 @@ +#!/bin/bash + +#platform init script for Dell S6100 + +source dell_i2c_utils.sh + +init_devnum() { + found=0 + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + # iSMT adapter can be at either dffd0000 or dfff0000 + if [[ $devname == 'SMBus iSMT adapter at '* ]]; then + found=1 + break + fi + done + + [[ $found -eq 0 ]] && echo "cannot find iSMT" && exit 1 +} + +# Attach/Detach CPU board mux @ 0x70 +cpu_board_mux() { + case $1 in + "new_device") i2c_mux_create pca9547 0x70 $devnum 2 + ;; + "delete_device") i2c_mux_delete 0x70 $devnum + ;; + *) echo "s6100_platform: cpu_board_mux: invalid command !" + ;; + esac +} + +# Attach/Detach Switchboard MUX @ 0x71 +switch_board_mux() { + case $1 in + "new_device") i2c_mux_create pca9548 0x71 4 10 + ;; + "delete_device") i2c_mux_delete 0x71 4 + ;; + *) echo "s6100_platform: switch_board_mux : invalid command !" + ;; + esac +} + +# Attach/Detach syseeprom on CPU board +sys_eeprom() { + case $1 in + "new_device") i2c_config "echo 24c02 0x50 > /sys/bus/i2c/devices/i2c-2/$1" + ;; + "delete_device") i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-2/$1" + ;; + *) echo "s6100_platform: sys_eeprom : invalid command !" + ;; + esac +} + +#Attach/Detach CPLD devices to drivers for each IOM +switch_board_cpld() { + case $1 in + "new_device") + for ((i=14;i<=17;i++)); + do + i2c_config "echo dell_s6100_iom_cpld 0x3e > /sys/bus/i2c/devices/i2c-$i/$1" + done + ;; + "delete_device") + for ((i=14;i<=17;i++)); + do + i2c_config "echo 0x3e > /sys/bus/i2c/devices/i2c-$i/$1" + done + ;; + *) echo "s6100_platform: switch_board_cpld : invalid command !" + ;; + esac +} + +#Attach/Detach the MUX connecting all QSFPs on each IOM @0x71 and 0x72 +switch_board_qsfp_mux() { + case $1 in + "new_device") + # The mux for the QSFPs spawn {18..25}, {26..33}... {74..81} + # starting at chennel 18 and 16 channels per IOM. + channel_first=18 + for ((i=9;i>=6;i--)); + do + # 0x71 mux on the IOM 1 + mux_index=$(expr $i - 5) + echo "Attaching PCA9548 $mux_index" + i2c_mux_create pca9548 0x71 $i $channel_first + i2c_mux_create pca9548 0x72 $i $(expr $channel_first + 8) + channel_first=$(expr $channel_first + 16) + done + ;; + "delete_device") + for ((i=9;i>=6;i--)); + do + # 0x71 mux on the IOM 1 + mux_index=$(expr $i - 5) + echo "Detaching PCA9548 $mux_index" + i2c_mux_delete 0x71 $i + i2c_mux_delete 0x72 $i + done + ;; + *) echo "s6100_platform: switch_board_qsfp_mux: invalid command !" + ;; + esac +} + +#Attach/Detach the SFP modules on PCA9548_2 +switch_board_sfp() { + case $1 in + "new_device") i2c_config "echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-11/$1" + i2c_config "echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-12/$1" + ;; + "delete_device") i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-11/$1" + i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-12/$1" + ;; + *) echo "s6100_platform: switch_board_sfp: invalid command !" + ;; + esac +} + +#Add/Delete ($1) a range ($2..$3) of QSFPs +qsfp_device_mod() { + case $1 in + "new_device") for ((i=$2;i<=$3;i++)); + do + i2c_config "echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-$i/$1" + done + ;; + "delete_device") for ((i=$2;i<=$3;i++)); + do + i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-$i/$1" + done + ;; + *) echo "s6100_platform: qsfp_device_mod: invalid command $1:$2,$3!" + ;; + esac +} + +# Attach/Detach 16 instances of QSFP ports on each IO modules +# eeprom can dump data using below command +switch_board_qsfp() { + if i2c_poll_bus_exists "/sys/bus/i2c/devices/i2c-18"; then + qsfp_device_mod $1 18 33 + fi + + if i2c_poll_bus_exists "/sys/bus/i2c/devices/i2c-34"; then + qsfp_device_mod $1 34 49 + fi + + if i2c_poll_bus_exists "/sys/bus/i2c/devices/i2c-50"; then + qsfp_device_mod $1 50 65 + fi + + if i2c_poll_bus_exists "/sys/bus/i2c/devices/i2c-66"; then + qsfp_device_mod $1 66 81 + fi +} + +# Enable/Disable low power mode on all QSFP ports +switch_board_qsfp_lpmode() { + case $1 in + "enable") value=0xffff + ;; + "disable") value=0x0 + ;; + *) echo "s6100_platform: switch_board_qsfp_lpmode: invalid command $1!" + return + ;; + esac + echo $value > /sys/class/i2c-adapter/i2c-14/14-003e/qsfp_lpmode + echo $value > /sys/class/i2c-adapter/i2c-15/15-003e/qsfp_lpmode + echo $value > /sys/class/i2c-adapter/i2c-16/16-003e/qsfp_lpmode + echo $value > /sys/class/i2c-adapter/i2c-17/17-003e/qsfp_lpmode +} + +# Enable/Disable xcvr presence interrupts +xcvr_presence_interrupts() { + case $1 in + "enable") + for ((i=14;i<=17;i++)); + do + echo 0x0 > /sys/class/i2c-adapter/i2c-$i/$i-003e/qsfp_abs_mask + done + ;; + "disable") + for ((i=14;i<=17;i++)); + do + echo 0xffff > /sys/class/i2c-adapter/i2c-$i/$i-003e/qsfp_abs_mask + done + ;; + *) echo "s6100_platform: xcvr_presence_interrupts: invalid command !" + ;; + esac +} + +# Reset the mux tree +reset_muxes() { + local i + + # Reset the IOM muxes (if they have been already instantiated) + for ((i=14;i<=17;i++)); + do + if [[ -e /sys/class/i2c-adapter/i2c-$i/$i-003e ]]; then + echo 0xfc > /sys/class/i2c-adapter/i2c-$i/$i-003e/sep_reset + echo 0xff > /sys/class/i2c-adapter/i2c-$i/$i-003e/sep_reset + fi + done + + # Reset the switch card PCA9548A + io_rd_wr.py --set --val 0xef --offset 0x110 + io_rd_wr.py --set --val 0xff --offset 0x110 + + # Reset the CPU Card PCA9547 + io_rd_wr.py --set --val 0xfd --offset 0x20b + io_rd_wr.py --set --val 0xff --offset 0x20b +} + +track_reboot_reason() { + if [[ -d /sys/devices/platform/SMF.512/hwmon/ ]]; then + rv=$(cd /sys/devices/platform/SMF.512/hwmon/*; cat mb_poweron_reason) + reason=$(echo $rv | cut -d 'x' -f2) + if [ $reason == "ff" ]; then + cd /sys/devices/platform/SMF.512/hwmon/* + if [[ -e /tmp/notify_firstboot_to_platform ]]; then + echo 0x01 > mb_poweron_reason + else + echo 0xbb > mb_poweron_reason + fi + elif [ $reason == "bb" ] || [ $reason == "1" ]; then + cd /sys/devices/platform/SMF.512/hwmon/* + echo 0xaa > mb_poweron_reason + fi + fi +} + +install_python_api_package() { + device="/usr/share/sonic/device" + platform=$(/usr/local/bin/sonic-cfggen -H -v DEVICE_METADATA.localhost.platform) + + rv=$(pip install $device/$platform/sonic_platform-1.0-py2-none-any.whl) +} + +remove_python_api_package() { + rv=$(pip show sonic-platform > /dev/null 2>/dev/null) + if [ $? -eq 0 ]; then + rv = $(pip uninstall -y sonic-platform > /dev/null 2>/dev/null) + fi +} + +init_devnum + +if [[ "$1" == "init" ]]; then + modprobe i2c-dev + modprobe i2c-mux-pca954x force_deselect_on_exit=1 + modprobe dell_ich + modprobe dell_s6100_iom_cpld + modprobe dell_s6100_lpc + track_reboot_reason + + # Disable Watchdog Timer + if [[ -e /usr/local/bin/platform_watchdog_disable.sh ]]; then + /usr/local/bin/platform_watchdog_disable.sh + fi + + cpu_board_mux "new_device" + switch_board_mux "new_device" + sys_eeprom "new_device" + switch_board_cpld "new_device" + switch_board_qsfp_mux "new_device" + switch_board_sfp "new_device" + switch_board_qsfp "new_device" + switch_board_qsfp_lpmode "disable" + xcvr_presence_interrupts "enable" + + install_python_api_package + +elif [[ "$1" == "deinit" ]]; then + xcvr_presence_interrupts "disable" + switch_board_sfp "delete_device" + switch_board_cpld "delete_device" + switch_board_mux "delete_device" + sys_eeprom "delete_device" + switch_board_qsfp "delete_device" + switch_board_qsfp_mux "delete_device" + cpu_board_mux "delete_device" + + modprobe -r dell_s6100_lpc + modprobe -r dell_s6100_iom_cpld + modprobe -r i2c-mux-pca954x + modprobe -r i2c-dev + modprobe -r dell_ich + remove_python_api_package +else + echo "s6100_platform : Invalid option !" +fi diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/sensors b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/sensors new file mode 100755 index 00000000000..958cbdcb7be --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/sensors @@ -0,0 +1,3 @@ +#!/bin/bash +docker exec -i pmon sensors "$@" + diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/setup.py b/platform/broadcom/sonic-platform-modules-dell/s6100/setup.py new file mode 100755 index 00000000000..eb95775c667 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/setup.py @@ -0,0 +1,30 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on DellEmc Platforms', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='DellEMC', + maintainer_email='dell-sonic@dell.com', + packages=[ + 'sonic_platform', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 2.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) + diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/__init__.py new file mode 100755 index 00000000000..96de5a93c4c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/__init__.py @@ -0,0 +1,3 @@ +__all__ = ["platform", "chassis", "module", "fan", "psu", "sfp", "thermal"] +from sonic_platform import * + diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/chassis.py new file mode 100755 index 00000000000..e39e8480e2c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/chassis.py @@ -0,0 +1,213 @@ +#!/usr/bin/env python + +############################################################################# +# DELLEMC S6100 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + import os + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.sfp import Sfp + from sonic_platform.psu import Psu + from sonic_platform.fan import Fan + from sonic_platform.module import Module + from sonic_platform.thermal import Thermal + from sonic_platform.component import Component + from eeprom import Eeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +MAX_S6100_MODULE = 4 +MAX_S6100_FAN = 4 +MAX_S6100_PSU = 2 +MAX_S6100_THERMAL = 10 +MAX_S6100_COMPONENT = 3 + + +class Chassis(ChassisBase): + """ + DELLEMC Platform-specific Chassis class + """ + + HWMON_DIR = "/sys/devices/platform/SMF.512/hwmon/" + HWMON_NODE = os.listdir(HWMON_DIR)[0] + MAILBOX_DIR = HWMON_DIR + HWMON_NODE + + reset_reason_dict = {} + reset_reason_dict[11] = ChassisBase.REBOOT_CAUSE_POWER_LOSS + reset_reason_dict[33] = ChassisBase.REBOOT_CAUSE_WATCHDOG + reset_reason_dict[44] = ChassisBase.REBOOT_CAUSE_NON_HARDWARE + reset_reason_dict[55] = ChassisBase.REBOOT_CAUSE_NON_HARDWARE + + power_reason_dict = {} + power_reason_dict[11] = ChassisBase.REBOOT_CAUSE_POWER_LOSS + power_reason_dict[22] = ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU + power_reason_dict[33] = ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC + power_reason_dict[44] = ChassisBase.REBOOT_CAUSE_INSUFFICIENT_FAN_SPEED + + def __init__(self): + + ChassisBase.__init__(self) + # Initialize EEPROM + self.sys_eeprom = Eeprom() + for i in range(MAX_S6100_MODULE): + module = Module(i) + self._module_list.append(module) + + for i in range(MAX_S6100_FAN): + fan = Fan(i) + self._fan_list.append(fan) + + for i in range(MAX_S6100_PSU): + psu = Psu(i) + self._psu_list.append(psu) + + for i in range(MAX_S6100_THERMAL): + thermal = Thermal(i) + self._thermal_list.append(thermal) + + for i in range(MAX_S6100_COMPONENT): + component = Component(i) + self._component_list.append(component) + + def _get_reboot_reason_smf_register(self): + # Returns 0xAA on software reload + # Returns 0xFF on power-cycle + # Returns 0x01 on first-boot + smf_mb_reg_reason = self._get_pmc_register('mb_poweron_reason') + return int(smf_mb_reg_reason, 16) + + def _get_pmc_register(self, reg_name): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + mb_reg_file = self.MAILBOX_DIR + '/' + reg_name + + if (not os.path.isfile(mb_reg_file)): + return rv + + try: + with open(mb_reg_file, 'r') as fd: + rv = fd.read() + except Exception as error: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self.sys_eeprom.modelstr() + + def get_presence(self): + """ + Retrieves the presence of the chassis + Returns: + bool: True if chassis is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the chassis + Returns: + string: Model/part number of chassis + """ + return self.sys_eeprom.part_number_str() + + def get_serial(self): + """ + Retrieves the serial number of the chassis (Service tag) + Returns: + string: Serial number of chassis + """ + return self.sys_eeprom.serial_str() + + def get_status(self): + """ + Retrieves the operational status of the chassis + Returns: + bool: A boolean value, True if chassis is operating properly + False if not + """ + return True + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self.sys_eeprom.base_mac_addr() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + return self.sys_eeprom.serial_number_str() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self.sys_eeprom.system_eeprom_info() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reset_reason = int(self._get_pmc_register('smf_reset_reason')) + power_reason = int(self._get_pmc_register('smf_poweron_reason')) + smf_mb_reg_reason = self._get_reboot_reason_smf_register() + + if ((smf_mb_reg_reason == 0x01) and (power_reason == 0x11)): + return (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, None) + + # Reset_Reason = 11 ==> PowerLoss + # So return the reboot reason from Last Power_Reason Dictionary + # If Reset_Reason is not 11 return from Reset_Reason dictionary + # Also check if power_reason, reset_reason are valid values by + # checking key presence in dictionary else return + # REBOOT_CAUSE_HARDWARE_OTHER as the Power_Reason and Reset_Reason + # registers returned invalid data + + # In S6100, if Reset_Reason is not 11 and smf_mb_reg_reason + # is ff or bb, then it is PowerLoss + if (reset_reason == 11): + if (power_reason in self.power_reason_dict): + return (self.power_reason_dict[power_reason], None) + else: + if ((smf_mb_reg_reason == 0xbb) or (smf_mb_reg_reason == 0xff)): + return (ChassisBase.REBOOT_CAUSE_POWER_LOSS, None) + + if (reset_reason in self.reset_reason_dict): + return (self.reset_reason_dict[reset_reason], None) + + return (ChassisBase.REBOOT_CAUSE_HARDWARE_OTHER, "Invalid Reason") diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/component.py new file mode 100644 index 00000000000..a92ab5c85db --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/component.py @@ -0,0 +1,177 @@ +#!/usr/bin/env python + +######################################################################## +# DELLEMC S6100 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in +# the platform +# +######################################################################## + +try: + import os + import subprocess + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BIOS_QUERY_VERSION_COMMAND = "dmidecode -s system-version" + + +class Component(ComponentBase): + """DellEMC Platform-specific Component class""" + + HWMON_DIR = "/sys/devices/platform/SMF.512/hwmon/" + HWMON_NODE = os.listdir(HWMON_DIR)[0] + MAILBOX_DIR = HWMON_DIR + HWMON_NODE + + CHASSIS_COMPONENTS = [ + ["BIOS", ("Performs initialization of hardware components during " + "booting")], + ["CPLD", "Used for managing IO modules, SFP+ modules and system LEDs"], + ["FPGA", ("Platform management controller for on-board temperature " + "monitoring, in-chassis power, Fan and LED control")] + ] + MODULE_COMPONENT = [ + "IOM{}-CPLD", + "Used for managing QSFP+ modules ({0}-{1})" + ] + + def __init__(self, component_index=0, + is_module=False, iom_index=0, i2c_line=0): + + self.is_module_component = is_module + + if self.is_module_component: + self.index = iom_index + self.name = self.MODULE_COMPONENT[0].format(self.index) + self.description = self.MODULE_COMPONENT[1].format( + ((self.index - 1) * 16) + 1, self.index * 16) + self.cpld_version_file = ("/sys/class/i2c-adapter/i2c-{0}/{0}-003e" + "/iom_cpld_vers").format(i2c_line) + else: + self.index = component_index + self.name = self.CHASSIS_COMPONENTS[self.index][0] + self.description = self.CHASSIS_COMPONENTS[self.index][1] + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # sysfs_file and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + except Exception as error: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def _get_command_result(self, cmdline): + try: + proc = subprocess.Popen(cmdline.split(), stdout=subprocess.PIPE, + stderr=subprocess.STDOUT) + stdout = proc.communicate()[0] + proc.wait() + result = stdout.rstrip('\n') + except OSError: + result = None + + return result + + def _get_cpld_version(self): + io_resource = "/dev/port" + CPLD_VERSION_ADDR = 0x100 + + fd = os.open(io_resource, os.O_RDONLY) + if (fd < 0): + return 'NA' + + if (os.lseek(fd, CPLD_VERSION_ADDR, os.SEEK_SET) != CPLD_VERSION_ADDR): + os.close(fd) + return 'NA' + + buf = os.read(fd, 1) + cpld_version = str(ord(buf)) + os.close(fd) + + return cpld_version + + def _get_iom_cpld_version(self): + ver_str = self._read_sysfs_file(self.cpld_version_file) + if (ver_str != 'ERR'): + if ver_str == 'read error': + return 'NA' + + ver_str = ver_str.rstrip('\r\n') + cpld_version = str(int(ver_str.split(':')[1], 16)) + return cpld_version + else: + return 'NA' + + def _get_fpga_version(self): + fpga_ver_file = self.MAILBOX_DIR + '/smf_firmware_ver' + fpga_ver = self._read_sysfs_file(fpga_ver_file) + if (fpga_ver != 'ERR'): + return fpga_ver + else: + return 'NA' + + def get_name(self): + """ + Retrieves the name of the component + + Returns: + A string containing the name of the component + """ + return self.name + + def get_description(self): + """ + Retrieves the description of the component + + Returns: + A string containing the description of the component + """ + return self.description + + def get_firmware_version(self): + """ + Retrieves the firmware version of the component + + Returns: + A string containing the firmware version of the component + """ + if self.is_module_component: # IOM CPLD + return self._get_iom_cpld_version() + else: + if self.index == 0: # BIOS + bios_ver = self._get_command_result(BIOS_QUERY_VERSION_COMMAND) + + if not bios_ver: + return 'NA' + else: + return bios_ver + + elif self.index == 1: # SwitchCard CPLD + return self._get_cpld_version() + elif self.index == 2: # FPGA + return self._get_fpga_version() + + def install_firmware(self, image_path): + """ + Installs firmware to the component + + Args: + image_path: A string, path to firmware image + + Returns: + A boolean, True if install was successful, False if not + """ + return False diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/eeprom.py new file mode 100644 index 00000000000..4e683e1e511 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/eeprom.py @@ -0,0 +1,116 @@ +#!/usr/bin/env python + +############################################################################# +# DellEmc S6100 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo + import binascii +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0050/eeprom" + super(Eeprom, self).__init__(self.eeprom_path, 0, '', True) + self.eeprom_tlv_dict = dict() + try: + self.eeprom_data = self.read_eeprom() + except: + self.eeprom_data = "N/A" + raise RuntimeError("Eeprom is not Programmed") + else: + eeprom = self.eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + return + + total_length = (ord(eeprom[9]) << 8) | ord(eeprom[10]) + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + ord(eeprom[tlv_index + 1])] + code = "0x%02X" % (ord(tlv[0])) + + if ord(tlv[0]) == self._TLV_CODE_VENDOR_EXT: + value = str((ord(tlv[2]) << 24) | (ord(tlv[3]) << 16) | + (ord(tlv[4]) << 8) | ord(tlv[5])) + value += str(tlv[6:6 + ord(tlv[1])]) + else: + name, value = self.decoder(None, tlv) + + self.eeprom_tlv_dict[code] = value + if ord(eeprom[tlv_index]) == self._TLV_CODE_CRC_32: + break + + tlv_index += ord(eeprom[tlv_index+1]) + 2 + + + def serial_number_str(self): + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_SERIAL_NUMBER) + if not is_valid: + return "N/A" + + return results[2] + + def base_mac_addr(self): + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_MAC_BASE) + if not is_valid or results[1] != 6: + return super(TlvInfoDecoder, self).switchaddrstr(e) + + return ":".join([binascii.b2a_hex(T) for T in results[2]]) + + def modelstr(self): + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_PRODUCT_NAME) + if not is_valid: + return "N/A" + + return results[2] + + def part_number_str(self): + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_PART_NUMBER) + if not is_valid: + return "N/A" + + return results[2] + + def serial_str(self): + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_SERVICE_TAG) + if not is_valid: + return "N/A" + + return results[2] + + def revision_str(self): + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_DEVICE_VERSION) + if not is_valid: + return "N/A" + + return results[2] + + def system_eeprom_info(self): + """ + Returns a dictionary, where keys are the type code defined in + ONIE EEPROM format and values are their corresponding values + found in the system EEPROM. + """ + return self.eeprom_tlv_dict diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/fan.py new file mode 100644 index 00000000000..2aef71b756e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/fan.py @@ -0,0 +1,233 @@ +#!/usr/bin/env python + +######################################################################## +# DellEMC S6100 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Fans' information which are available in the platform. +# +######################################################################## + +import os.path + +try: + from sonic_platform_base.fan_base import FanBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +MAX_S6100_PSU_FAN_SPEED = 18000 +MAX_S6100_FAN_SPEED = 16000 + + +class Fan(FanBase): + """DellEMC Platform-specific Fan class""" + + HWMON_DIR = "/sys/devices/platform/SMF.512/hwmon/" + HWMON_NODE = os.listdir(HWMON_DIR)[0] + MAILBOX_DIR = HWMON_DIR + HWMON_NODE + + def __init__(self, fantray_index=1, fan_index=1, psu_fan=False): + self.is_psu_fan = psu_fan + if not self.is_psu_fan: + # API index is starting from 0, DellEMC platform index is starting + # from 1 + self.fantrayindex = fantray_index + 1 + self.fanindex = fan_index + 1 + self.get_fan_speed_reg = "fan{}_input".format( + 2 * self.fantrayindex - 1) + self.get_fan_dir_reg = "fan{}_airflow".format( + 2 * self.fantrayindex - 1) + self.fan_serialno_reg = "fan{}_serialno".format( + 2 * self.fantrayindex - 1) + self.max_fan_speed = MAX_S6100_FAN_SPEED + else: + # PSU Fan index starts from 11 + self.fanindex = fan_index + 10 + self.get_fan_speed_reg = "fan{}_input".format(self.fanindex) + self.max_fan_speed = MAX_S6100_PSU_FAN_SPEED + + def _get_pmc_register(self, reg_name): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + mb_reg_file = self.MAILBOX_DIR+'/'+reg_name + + if (not os.path.isfile(mb_reg_file)): + return rv + try: + with open(mb_reg_file, 'r') as fd: + rv = fd.read() + except Exception as error: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def get_name(self): + """ + Retrieves the fan name + Returns: + string: The name of the device + """ + if not self.is_psu_fan: + return "FanTray{}-Fan{}".format( + self.fantrayindex, self.fanindex - 1) + else: + return "PSU{} Fan".format(self.fanindex - 10) + + def get_model(self): + """ + Retrieves the part number of the FAN + Returns: + string: Part number of FAN + """ + # For Serial number "US-01234D-54321-25A-0123-A00", the part + # number is "01234D" + fan_serialno = self._get_pmc_register(self.fan_serialno_reg) + if (fan_serialno != 'ERR') and self.get_presence(): + if (len(fan_serialno.split('-')) > 1): + fan_partno = fan_serialno.split('-')[1] + else: + fan_partno = 'NA' + else: + fan_partno = 'NA' + + return fan_partno + + def get_serial(self): + """ + Retrieves the serial number of the FAN + Returns: + string: Serial number of FAN + """ + # Sample Serial number format "US-01234D-54321-25A-0123-A00" + fan_serialno = self._get_pmc_register(self.fan_serialno_reg) + if (fan_serialno == 'ERR') or not self.get_presence(): + fan_serialno = 'NA' + + return fan_serialno + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if fan is present, False if not + """ + status = False + fantray_presence = self._get_pmc_register(self.get_fan_speed_reg) + if (fantray_presence != 'ERR'): + fantray_presence = int(fantray_presence, 10) + if (fantray_presence > 0): + status = True + + return status + + def get_status(self): + """ + Retrieves the operational status of the FAN + Returns: + bool: True if FAN is operating properly, False if not + """ + status = False + fantray_status = self._get_pmc_register(self.get_fan_speed_reg) + if (fantray_status != 'ERR'): + fantray_status = int(fantray_status, 10) + if (fantray_status > 5000): + status = True + + return status + + def get_direction(self): + """ + Retrieves the fan airflow direction + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = ['FAN_DIRECTION_INTAKE', 'FAN_DIRECTION_EXHAUST'] + fan_direction = self._get_pmc_register(self.get_fan_dir_reg) + if (fan_direction != 'ERR') and self.get_presence(): + fan_direction = int(fan_direction, 10) + else: + return 'N/A' + return direction[fan_direction] + + def get_speed(self): + """ + Retrieves the speed of fan + Returns: + int: percentage of the max fan speed + """ + fan_speed = self._get_pmc_register(self.get_fan_speed_reg) + if (fan_speed != 'ERR') and self.get_presence(): + speed_in_rpm = int(fan_speed, 10) + speed = (100 * speed_in_rpm)/self.max_fan_speed + else: + speed = 0 + + return speed + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + if self.get_presence(): + # The tolerance value is fixed as 20% for all the DellEmc platform + tolerance = 20 + else: + tolerance = 0 + + return tolerance + + def set_speed(self, speed): + """ + Set fan speed to expected value + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + Returns: + bool: True if set success, False if fail. + """ + + # Fan speeds are controlled by Smart-fussion FPGA. + return False + + def set_status_led(self, color): + """ + Set led to expected color + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if set success, False if fail. + """ + # Leds are controlled by Smart-fussion FPGA. + status = False + return status + + def get_status_led(self): + """ + Gets the state of the Fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings. + """ + if self.get_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_OFF + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + return 0 + + diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/module.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/module.py new file mode 100644 index 00000000000..265dc206ad0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/module.py @@ -0,0 +1,195 @@ +#!/usr/bin/env python + +######################################################################## +# DellEMC S6100 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Modules' information which are available in the platform +# +######################################################################## + + +try: + import os + from sonic_platform_base.module_base import ModuleBase + from sonic_platform.sfp import Sfp + from sonic_platform.component import Component +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Module(ModuleBase): + """DellEMC Platform-specific Module class""" + + HWMON_DIR = "/sys/devices/platform/SMF.512/hwmon/" + HWMON_NODE = os.listdir(HWMON_DIR)[0] + MAILBOX_DIR = HWMON_DIR + HWMON_NODE + + IOM_I2C_MAPPING = { 1: 14, 2: 16, 3: 15, 4: 17 } + EEPROM_I2C_MAPPING = { + # IOM 1 + 0: [6, 66], 1: [6, 67], 2: [6, 68], 3: [6, 69], + 4: [6, 70], 5: [6, 71], 6: [6, 72], 7: [6, 73], + 8: [6, 74], 9: [6, 75], 10: [6, 76], 11: [6, 77], + 12: [6, 78], 13: [6, 79], 14: [6, 80], 15: [6, 81], + # IOM 2 + 16: [8, 34], 17: [8, 35], 18: [8, 36], 19: [8, 37], + 20: [8, 38], 21: [8, 39], 22: [8, 40], 23: [8, 41], + 24: [8, 42], 25: [8, 43], 26: [8, 44], 27: [8, 45], + 28: [8, 46], 29: [8, 47], 30: [8, 48], 31: [8, 49], + # IOM 3 + 32: [7, 50], 33: [7, 51], 34: [7, 52], 35: [7, 53], + 36: [7, 54], 37: [7, 55], 38: [7, 56], 39: [7, 57], + 40: [7, 58], 41: [7, 59], 42: [7, 60], 43: [7, 61], + 44: [7, 62], 45: [7, 63], 46: [7, 64], 47: [7, 65], + # IOM 4 + 48: [9, 18], 49: [9, 19], 50: [9, 20], 51: [9, 21], + 52: [9, 22], 53: [9, 23], 54: [9, 24], 55: [9, 25], + 56: [9, 26], 57: [9, 27], 58: [9, 28], 59: [9, 29], + 60: [9, 30], 61: [9, 31], 62: [9, 32], 63: [9, 33] + } + + def __init__(self, module_index): + # Modules are 1-based in DellEMC platforms + self.index = module_index + 1 + self.port_start = (self.index - 1) * 16 + self.port_end = (self.index * 16) - 1 + self.port_i2c_line = self.IOM_I2C_MAPPING[self.index] + self.eeprom_tlv_dict = dict() + + self.iom_status_reg = "iom_status" + self.iom_presence_reg = "iom_presence" + + # Overriding _component_list and _sfp_list class variables defined in + # ModuleBase, to make them unique per Module object + self._component_list = [] + self._sfp_list = [] + + component = Component(is_module=True, iom_index=self.index, + i2c_line=self.port_i2c_line) + self._component_list.append(component) + + eeprom_base = "/sys/class/i2c-adapter/i2c-{0}/i2c-{1}/{1}-0050/eeprom" + sfp_ctrl_base = "/sys/class/i2c-adapter/i2c-{0}/{0}-003e/" + + # sfp.py will read eeprom contents and retrive the eeprom data. + # It will also provide support sfp controls like reset and setting + # low power mode. + for index in range(self.port_start, self.port_end + 1): + eeprom_path = eeprom_base.format(self.EEPROM_I2C_MAPPING[index][0], + self.EEPROM_I2C_MAPPING[index][1]) + sfp_control = sfp_ctrl_base.format(self.port_i2c_line) + sfp_node = Sfp(index, 'QSFP', eeprom_path, sfp_control, index) + self._sfp_list.append(sfp_node) + + def _get_pmc_register(self, reg_name): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + mb_reg_file = self.MAILBOX_DIR + '/' + reg_name + + if (not os.path.isfile(mb_reg_file)): + return rv + + try: + with open(mb_reg_file, 'r') as fd: + rv = fd.read() + except Exception as error: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return "IOM{}: 16xQSFP+".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the Module + + Returns: + bool: True if Module is present, False if not + """ + status = False + iom_presence = self._get_pmc_register(self.iom_presence_reg) + if (iom_presence != 'ERR'): + iom_presence = int(iom_presence,16) + if (~iom_presence & (1 << (self.index - 1))): + status = True + + return status + + def get_model(self): + """ + Retrieves the part number of the module + + Returns: + string: part number of module + """ + return 'NA' + + def get_serial(self): + """ + Retrieves the serial number of the module + + Returns: + string: Serial number of module + """ + return 'NA' + + def get_status(self): + """ + Retrieves the operational status of the Module + + Returns: + bool: True if Module is operating properly, False if not + """ + status = False + iom_status = self._get_pmc_register(self.iom_status_reg) + if (iom_status != 'ERR'): + iom_status = int(iom_status,16) + if (~iom_status & (1 << (self.index - 1))): + status = True + + return status + + def get_base_mac(self): + """ + Retrieves the base MAC address for the module + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + # In S6100, individual modules doesn't have MAC address + return '00:00:00:00:00:00' + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the module + + Returns: + A string containing the hardware serial number for this module. + """ + return 'NA' + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the module + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + Ex. { ‘0x21’:’AG9064’, ‘0x22’:’V1.0’, ‘0x23’:’AG9064-0109867821’, + ‘0x24’:’001c0f000fcd0a’, ‘0x25’:’02/03/2018 16:22:00’, + ‘0x26’:’01’, ‘0x27’:’REV01’, ‘0x28’:’AG9064-C2358-16G’} + """ + return self.eeprom_tlv_dict diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/platform.py new file mode 100755 index 00000000000..426db717281 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/platform.py @@ -0,0 +1,26 @@ +#!/usr/bin/env python + +############################################################################# +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + import os + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PlatformBase): + """ + DELLEMC Platform-specific class + """ + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() + diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/psu.py new file mode 100644 index 00000000000..18a8b5d0354 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/psu.py @@ -0,0 +1,237 @@ +#!/usr/bin/env python + +######################################################################## +# DellEMC S6100 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs' information which are available in the platform +# +######################################################################## + + +try: + import os + from sonic_platform_base.psu_base import PsuBase + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Psu(PsuBase): + """DellEMC Platform-specific PSU class""" + + HWMON_DIR = "/sys/devices/platform/SMF.512/hwmon/" + HWMON_NODE = os.listdir(HWMON_DIR)[0] + MAILBOX_DIR = HWMON_DIR + HWMON_NODE + + def __init__(self, psu_index): + # PSU is 1-based in DellEMC platforms + self.index = psu_index + 1 + self.psu_presence_reg = "psu{}_presence".format(self.index) + self.psu_serialno_reg = "psu{}_serialno".format(self.index) + if self.index == 1: + self.psu_voltage_reg = "in30_input" + self.psu_current_reg = "curr602_input" + self.psu_power_reg = "power2_input" + elif self.index == 2: + self.psu_voltage_reg = "in32_input" + self.psu_current_reg = "curr702_input" + self.psu_power_reg = "power4_input" + + # Overriding _fan_list class variable defined in PsuBase, to + # make it unique per Psu object + self._fan_list = [] + + # Passing True to specify it is a PSU fan + psu_fan = Fan(fan_index=self.index, psu_fan=True) + self._fan_list.append(psu_fan) + + def _get_pmc_register(self, reg_name): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + mb_reg_file = self.MAILBOX_DIR + '/' + reg_name + + if (not os.path.isfile(mb_reg_file)): + return rv + + try: + with open(mb_reg_file, 'r') as fd: + rv = fd.read() + except Exception as error: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return "PSU{}".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the Power Supply Unit (PSU) + + Returns: + bool: True if PSU is present, False if not + """ + status = False + psu_presence = self._get_pmc_register(self.psu_presence_reg) + if (psu_presence != 'ERR'): + psu_presence = int(psu_presence, 16) + # Checking whether bit 0 is not set + if (~psu_presence & 0b1): + status = True + + return status + + def get_model(self): + """ + Retrieves the part number of the PSU + + Returns: + string: Part number of PSU + """ + # For Serial number "US-01234D-54321-25A-0123-A00", the part + # number is "01234D" + psu_serialno = self._get_pmc_register(self.psu_serialno_reg) + if (psu_serialno != 'ERR') and self.get_presence(): + if (len(psu_serialno.split('-')) > 1): + psu_partno = psu_serialno.split('-')[1] + else: + psu_partno = 'NA' + else: + psu_partno = 'NA' + + return psu_partno + + def get_serial(self): + """ + Retrieves the serial number of the PSU + + Returns: + string: Serial number of PSU + """ + # Sample Serial number format "US-01234D-54321-25A-0123-A00" + psu_serialno = self._get_pmc_register(self.psu_serialno_reg) + if (psu_serialno == 'ERR') or not self.get_presence(): + psu_serialno = 'NA' + + return psu_serialno + + def get_status(self): + """ + Retrieves the operational status of the PSU + + Returns: + bool: True if PSU is operating properly, False if not + """ + status = False + psu_status = self._get_pmc_register(self.psu_presence_reg) + if (psu_status != 'ERR'): + psu_status = int(psu_status, 16) + # Checking whether both bit 3 and bit 2 are not set + if (~psu_status & 0b1000) and (~psu_status & 0b0100): + status = True + + return status + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + psu_voltage = self._get_pmc_register(self.psu_voltage_reg) + if (psu_voltage != 'ERR') and self.get_presence(): + # Converting the value returned by driver which is in + # millivolts to volts + psu_voltage = float(psu_voltage) / 1000 + else: + psu_voltage = 0.0 + + return psu_voltage + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + + Returns: + A float number, electric current in amperes, + e.g. 15.4 + """ + psu_current = self._get_pmc_register(self.psu_current_reg) + if (psu_current != 'ERR') and self.get_presence(): + # Converting the value returned by driver which is in + # milliamperes to amperes + psu_current = float(psu_current) / 1000 + else: + psu_current = 0.0 + + return psu_current + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + psu_power = self._get_pmc_register(self.psu_power_reg) + if (psu_power != 'ERR') and self.get_presence(): + # Converting the value returned by driver which is in + # microwatts to watts + psu_power = float(psu_power) / 1000000 + else: + psu_power = 0.0 + + return psu_power + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + + Returns: + A boolean, True if PSU has stablized its output voltages and + passed all its internal self-tests, False if not. + """ + status = False + if self.get_status() and self._fan_list[0].get_status(): + status = True + + return status + + def get_status_led(self): + """ + Gets the state of the PSU status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings. + """ + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_OFF + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + Args: + color: A string representing the color with which to set the + PSU status LED + Returns: + bool: True if status LED state is set successfully, False if + not + """ + # In S6100, SmartFusion FPGA controls the PSU LED and the PSU + # LED state cannot be changed from CPU. + return False diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/sfp.py new file mode 100755 index 00000000000..e94c53b11a9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/sfp.py @@ -0,0 +1,894 @@ +#!/usr/bin/env python + +############################################################################# +# DELLEMC +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + import os + import time + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +PAGE_OFFSET = 0 +KEY_OFFSET = 1 +KEY_WIDTH = 2 +FUNC_NAME = 3 + +INFO_OFFSET = 128 +DOM_OFFSET = 0 +DOM_OFFSET1 = 384 + +cable_length_tup = ('Length(km)', 'Length OM3(2m)', 'Length OM2(m)', + 'Length OM1(m)', 'Length Cable Assembly(m)') + +compliance_code_tup = ( + '10/40G Ethernet Compliance Code', + 'SONET Compliance codes', + 'SAS/SATA compliance codes', + 'Gigabit Ethernet Compliant codes', + 'Fibre Channel link length/Transmitter Technology', + 'Fibre Channel transmission media', + 'Fibre Channel Speed') + +info_dict_keys = ['type', 'hardwarerev', 'serialnum', + 'manufacturename', 'modelname', 'Connector', + 'encoding', 'ext_identifier', 'ext_rateselect_compliance', + 'cable_type', 'cable_length', 'nominal_bit_rate', + 'specification_compliance', 'vendor_date', 'vendor_oui'] + +dom_dict_keys = ['rx_los', 'tx_fault', 'reset_status', + 'power_lpmode', 'tx_disable', 'tx_disable_channel', + 'temperature', 'voltage', 'rx1power', + 'rx2power', 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', 'tx3bias', + 'tx4bias', 'tx1power', 'tx2power', + 'tx3power', 'tx4power'] + +threshold_dict_keys = ['temphighalarm', 'temphighwarning', + 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', + 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', + 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', + 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', + 'txbiaslowalarm', 'txbiaslowwarning'] + +sff8436_parser = { + 'reset_status': [DOM_OFFSET, 2, 1, 'parse_dom_status_indicator'], + 'rx_los': [DOM_OFFSET, 3, 1, 'parse_dom_tx_rx_los'], + 'tx_fault': [DOM_OFFSET, 4, 1, 'parse_dom_tx_fault'], + 'tx_disable': [DOM_OFFSET, 86, 1, 'parse_dom_tx_disable'], + 'power_lpmode': [DOM_OFFSET, 93, 1, 'parse_dom_power_control'], + 'power_override': [DOM_OFFSET, 93, 1, 'parse_dom_power_control'], + 'Temperature': [DOM_OFFSET, 22, 2, 'parse_temperature'], + 'Voltage': [DOM_OFFSET, 26, 2, 'parse_voltage'], + 'ChannelMonitor': [DOM_OFFSET, 34, 16, 'parse_channel_monitor_params'], + + 'cable_type': [INFO_OFFSET, -1, -1, 'parse_sfp_info_bulk'], + 'cable_length': [INFO_OFFSET, -1, -1, 'parse_sfp_info_bulk'], + 'Connector': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'type': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'encoding': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'ext_identifier': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'ext_rateselect_compliance': + [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'nominal_bit_rate': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'specification_compliance': + [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'manufacturename': [INFO_OFFSET, 20, 16, 'parse_vendor_name'], + 'vendor_oui': [INFO_OFFSET, 37, 3, 'parse_vendor_oui'], + 'modelname': [INFO_OFFSET, 40, 16, 'parse_vendor_pn'], + 'hardwarerev': [INFO_OFFSET, 56, 2, 'parse_vendor_rev'], + 'serialnum': [INFO_OFFSET, 68, 16, 'parse_vendor_sn'], + 'vendor_date': [INFO_OFFSET, 84, 8, 'parse_vendor_date'], + 'ModuleThreshold': [DOM_OFFSET1, 128, 24, 'parse_module_threshold_values'], + 'ChannelThreshold': [DOM_OFFSET1, 176, 16, 'parse_channel_threshold_values'], +} + + +class Sfp(SfpBase): + """ + DELLEMC Platform-specific Sfp class + """ + + def __init__(self, index, sfp_type, eeprom_path, + sfp_control, sfp_ctrl_idx): + SfpBase.__init__(self) + self.sfp_type = sfp_type + self.index = index + self.eeprom_path = eeprom_path + self.sfp_control = sfp_control + self.sfp_ctrl_idx = sfp_ctrl_idx + self.sfpInfo = sff8436InterfaceId() + self.sfpDomInfo = sff8436Dom() + + def _read_eeprom_bytes(self, eeprom_path, offset, num_bytes): + eeprom_raw = [] + try: + eeprom = open(eeprom_path, mode="rb", buffering=0) + except IOError: + return None + + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + try: + eeprom.seek(offset) + raw = eeprom.read(num_bytes) + except IOError: + eeprom.close() + return None + + try: + for n in range(0, num_bytes): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except BaseException: + eeprom.close() + return None + + eeprom.close() + return eeprom_raw + + def _get_eeprom_data(self, eeprom_key): + eeprom_data = None + page_offset = None + + if (self.sfpInfo is None): + return None + + page_offset = sff8436_parser[eeprom_key][PAGE_OFFSET] + eeprom_data_raw = self._read_eeprom_bytes( + self.eeprom_path, + (sff8436_parser[eeprom_key][PAGE_OFFSET] + + sff8436_parser[eeprom_key][KEY_OFFSET]), + sff8436_parser[eeprom_key][KEY_WIDTH]) + if (eeprom_data_raw is not None): + # Offset 128 is used to retrieve sff8436InterfaceId Info + # Offset 0 is used to retrieve sff8436Dom Info + if (page_offset == 128): + eeprom_data = getattr( + self.sfpInfo, sff8436_parser[eeprom_key][FUNC_NAME])( + eeprom_data_raw, 0) + else: + eeprom_data = getattr( + self.sfpDomInfo, sff8436_parser[eeprom_key][FUNC_NAME])( + eeprom_data_raw, 0) + + return eeprom_data + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + """ + transceiver_info_dict = {} + compliance_code_dict = {} + transceiver_info_dict = dict.fromkeys(info_dict_keys, 'N/A') + + # BaseInformation + iface_data = self._get_eeprom_data('type') + if (iface_data is not None): + connector = iface_data['data']['Connector']['value'] + encoding = iface_data['data']['EncodingCodes']['value'] + ext_id = iface_data['data']['Extended Identifier']['value'] + rate_identifier = iface_data['data']['RateIdentifier']['value'] + identifier = iface_data['data']['type']['value'] + bit_rate = str( + iface_data['data']['Nominal Bit Rate(100Mbs)']['value']) + + for key in compliance_code_tup: + if key in iface_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = iface_data['data']['Specification compliance']['value'][key]['value'] + for key in cable_length_tup: + if key in iface_data['data']: + cable_type = key + cable_length = str(iface_data['data'][key]['value']) + else: + return transceiver_info_dict + + # Vendor Date + vendor_date_data = self._get_eeprom_data('vendor_date') + if (vendor_date_data is not None): + vendor_date = vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] + else: + return transceiver_info_dict + + # Vendor Name + vendor_name_data = self._get_eeprom_data('manufacturename') + if (vendor_name_data is not None): + vendor_name = vendor_name_data['data']['Vendor Name']['value'] + else: + return transceiver_info_dict + + # Vendor OUI + vendor_oui_data = self._get_eeprom_data('vendor_oui') + if (vendor_oui_data is not None): + vendor_oui = vendor_oui_data['data']['Vendor OUI']['value'] + else: + return transceiver_info_dict + + # Vendor PN + vendor_pn_data = self._get_eeprom_data('modelname') + if (vendor_pn_data is not None): + vendor_pn = vendor_pn_data['data']['Vendor PN']['value'] + else: + return transceiver_info_dict + + # Vendor Revision + vendor_rev_data = self._get_eeprom_data('hardwarerev') + if (vendor_rev_data is not None): + vendor_rev = vendor_rev_data['data']['Vendor Rev']['value'] + else: + return transceiver_info_dict + + # Vendor Serial Number + vendor_sn_data = self._get_eeprom_data('serialnum') + if (vendor_sn_data is not None): + vendor_sn = vendor_sn_data['data']['Vendor SN']['value'] + else: + return transceiver_info_dict + + # Fill The Dictionary and return + transceiver_info_dict['type'] = identifier + transceiver_info_dict['hardwarerev'] = vendor_rev + transceiver_info_dict['serialnum'] = vendor_sn + transceiver_info_dict['manufacturename'] = vendor_name + transceiver_info_dict['modelname'] = vendor_pn + transceiver_info_dict['Connector'] = connector + transceiver_info_dict['encoding'] = encoding + transceiver_info_dict['ext_identifier'] = ext_id + transceiver_info_dict['ext_rateselect_compliance'] = rate_identifier + transceiver_info_dict['cable_type'] = cable_type + transceiver_info_dict['cable_length'] = cable_length + transceiver_info_dict['nominal_bit_rate'] = bit_rate + transceiver_info_dict['specification_compliance'] = str( + compliance_code_dict) + transceiver_info_dict['vendor_date'] = vendor_date + transceiver_info_dict['vendor_oui'] = vendor_oui + + return transceiver_info_dict + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + """ + transceiver_dom_threshold_dict = {} + transceiver_dom_threshold_dict = dict.fromkeys( + threshold_dict_keys, 'N/A') + + # Module Threshold + module_threshold_data = self._get_eeprom_data('ModuleThreshold') + if (module_threshold_data is not None): + tempHighAlarm = module_threshold_data['data']['TempHighAlarm']['value'] + tempLowAlarm = module_threshold_data['data']['TempLowAlarm']['value'] + tempHighWarn = module_threshold_data['data']['TempHighWarning']['value'] + tempLowWarn = module_threshold_data['data']['TempLowWarning']['value'] + vccHighAlarm = module_threshold_data['data']['VccHighAlarm']['value'] + vccLowAlarm = module_threshold_data['data']['VccLowAlarm']['value'] + vccHighWarn = module_threshold_data['data']['VccHighWarning']['value'] + vccLowWarn = module_threshold_data['data']['VccLowWarning']['value'] + else: + return transceiver_dom_threshold_dict + + # Channel Threshold + channel_threshold_data = self._get_eeprom_data('ChannelThreshold') + if (channel_threshold_data is not None): + rxPowerHighAlarm = channel_threshold_data['data']['RxPowerHighAlarm']['value'] + rxPowerLowAlarm = channel_threshold_data['data']['RxPowerLowAlarm']['value'] + rxPowerHighWarn = channel_threshold_data['data']['RxPowerHighWarning']['value'] + rxPowerLowWarn = channel_threshold_data['data']['RxPowerLowWarning']['value'] + txBiasHighAlarm = channel_threshold_data['data']['TxBiasHighAlarm']['value'] + txBiasLowAlarm = channel_threshold_data['data']['TxBiasLowAlarm']['value'] + txBiasHighWarn = channel_threshold_data['data']['TxBiasHighWarning']['value'] + txBiasLowWarn = channel_threshold_data['data']['TxBiasLowWarning']['value'] + else: + return transceiver_dom_threshold_dict + + transceiver_dom_threshold_dict['temphighalarm'] = tempHighAlarm + transceiver_dom_threshold_dict['templowalarm'] = tempLowAlarm + transceiver_dom_threshold_dict['temphighwarning'] = tempHighWarn + transceiver_dom_threshold_dict['templowwarning'] = tempLowWarn + transceiver_dom_threshold_dict['vcchighalarm'] = vccHighAlarm + transceiver_dom_threshold_dict['vcclowalarm'] = vccLowAlarm + transceiver_dom_threshold_dict['vcchighwarning'] = vccHighWarn + transceiver_dom_threshold_dict['vcclowwarning'] = vccLowWarn + transceiver_dom_threshold_dict['rxpowerhighalarm'] = rxPowerHighAlarm + transceiver_dom_threshold_dict['rxpowerlowalarm'] = rxPowerLowAlarm + transceiver_dom_threshold_dict['rxpowerhighwarning'] = rxPowerHighWarn + transceiver_dom_threshold_dict['rxpowerlowwarning'] = rxPowerLowWarn + transceiver_dom_threshold_dict['txbiashighalarm'] = txBiasHighAlarm + transceiver_dom_threshold_dict['txbiaslowalarm'] = txBiasLowAlarm + transceiver_dom_threshold_dict['txbiashighwarning'] = txBiasHighWarn + transceiver_dom_threshold_dict['txbiaslowwarning'] = txBiasLowWarn + + return transceiver_dom_threshold_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + """ + tx_bias_list = [] + rx_power_list = [] + transceiver_dom_dict = {} + transceiver_dom_dict = dict.fromkeys(dom_dict_keys, 'N/A') + + # RxLos + rx_los = self.get_rx_los() + + # TxFault + tx_fault = self.get_tx_fault() + + # ResetStatus + reset_state = self.get_reset_status() + + # LowPower Mode + lp_mode = self.get_lpmode() + + # TxDisable + tx_disable = self.get_tx_disable() + + # TxDisable Channel + tx_disable_channel = self.get_tx_disable_channel() + + # Temperature + temperature = self.get_temperature() + + # Voltage + voltage = self.get_voltage() + + # Channel Monitor + channel_monitor_data = self._get_eeprom_data('ChannelMonitor') + if (channel_monitor_data is not None): + tx_bias = channel_monitor_data['data']['TX1Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = channel_monitor_data['data']['TX2Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = channel_monitor_data['data']['TX3Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = channel_monitor_data['data']['TX4Bias']['value'] + tx_bias_list.append(tx_bias) + rx_power = channel_monitor_data['data']['RX1Power']['value'] + rx_power_list.append(rx_power) + rx_power = channel_monitor_data['data']['RX2Power']['value'] + rx_power_list.append(rx_power) + rx_power = channel_monitor_data['data']['RX3Power']['value'] + rx_power_list.append(rx_power) + rx_power = channel_monitor_data['data']['RX4Power']['value'] + rx_power_list.append(rx_power) + else: + return transceiver_dom_dict + + transceiver_dom_dict['rx_los'] = rx_los + transceiver_dom_dict['tx_fault'] = tx_fault + transceiver_dom_dict['reset_status'] = reset_state + transceiver_dom_dict['power_lpmode'] = lp_mode + transceiver_dom_dict['tx_disable'] = tx_disable + transceiver_dom_dict['tx_disable_channel'] = tx_disable_channel + transceiver_dom_dict['temperature'] = temperature + transceiver_dom_dict['voltage'] = voltage + transceiver_dom_dict['tx1bias'] = tx_bias_list[0] + transceiver_dom_dict['tx2bias'] = tx_bias_list[1] + transceiver_dom_dict['tx3bias'] = tx_bias_list[2] + transceiver_dom_dict['tx4bias'] = tx_bias_list[3] + transceiver_dom_dict['rx1power'] = rx_power_list[0] + transceiver_dom_dict['rx2power'] = rx_power_list[1] + transceiver_dom_dict['rx3power'] = rx_power_list[2] + transceiver_dom_dict['rx4power'] = rx_power_list[3] + + return transceiver_dom_dict + + def get_name(self): + """ + Retrieves the name of the sfp + Returns : QSFP or QSFP+ or QSFP28 + """ + iface_data = self._get_eeprom_data('type') + if (iface_data is not None): + identifier = iface_data['data']['type']['value'] + else: + return None + + return identifier + + def get_presence(self): + """ + Retrieves the presence of the sfp + """ + presence_ctrl = self.sfp_control + 'qsfp_modprs' + try: + reg_file = open(presence_ctrl) + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + if (self.sfp_ctrl_idx > 15): + index = self.sfp_ctrl_idx % 16 + else: + index = self.sfp_ctrl_idx + + # Mask off the bit corresponding to our port + mask = (1 << index) + + # ModPrsL is active low + if ((reg_value & mask) == 0): + return True + + return False + + def get_model(self): + """ + Retrieves the model number (or part number) of the sfp + """ + vendor_pn_data = self._get_eeprom_data('modelname') + if (vendor_pn_data is not None): + vendor_pn = vendor_pn_data['data']['Vendor PN']['value'] + else: + return None + + return vendor_pn + + def get_serial(self): + """ + Retrieves the serial number of the sfp + """ + vendor_sn_data = self._get_eeprom_data('serialnum') + if (vendor_sn_data is not None): + vendor_sn = vendor_sn_data['data']['Vendor SN']['value'] + else: + return None + + return vendor_sn + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + """ + reset_status = None + reset_ctrl = self.sfp_control + 'qsfp_reset' + try: + reg_file = open(reset_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + if (self.sfp_ctrl_idx > 15): + index = self.sfp_ctrl_idx % 16 + else: + index = self.sfp_ctrl_idx + + mask = (1 << index) + + if ((reg_value & mask) == 0): + reset_status = True + else: + reset_status = False + + return reset_status + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + """ + rx_los = None + rx_los_list = [] + + rx_los_data = self._get_eeprom_data('rx_los') + if (rx_los_data is not None): + rx_los = rx_los_data['data']['Rx1LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + rx_los = rx_los_data['data']['Rx2LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + rx_los = rx_los_data['data']['Rx3LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + rx_los = rx_los_data['data']['Rx4LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + + if (rx_los_list[0] and rx_los_list[1] + and rx_los_list[2] and rx_los_list[3]): + rx_los = True + else: + rx_los = False + + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + """ + tx_fault = None + tx_fault_list = [] + + tx_fault_data = self._get_eeprom_data('tx_fault') + if (tx_fault_data is not None): + tx_fault = tx_fault_data['data']['Tx1Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + tx_fault = tx_fault_data['data']['Tx2Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + tx_fault = tx_fault_data['data']['Tx3Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + tx_fault = tx_fault_data['data']['Tx4Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + + if (tx_fault_list[0] and tx_fault_list[1] + and tx_fault_list[2] and tx_fault_list[3]): + tx_fault = True + else: + tx_fault = False + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + """ + tx_disable = None + tx_disable_list = [] + + tx_disable_data = self._get_eeprom_data('tx_disable') + if (tx_disable_data is not None): + tx_disable = tx_disable_data['data']['Tx1Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + tx_disable = tx_disable_data['data']['Tx2Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + tx_disable = tx_disable_data['data']['Tx3Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + tx_disable = tx_disable_data['data']['Tx4Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + + if (tx_disable_list[0] and tx_disable_list[1] + and tx_disable_list[2] and tx_disable_list[3]): + tx_disable = True + else: + tx_disable = False + + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + """ + tx_disable = None + tx_disable_list = [] + + tx_disable_data = self._get_eeprom_data('tx_disable') + if (tx_disable_data is not None): + tx_disable = tx_disable_data['data']['Tx1Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + tx_disable = tx_disable_data['data']['Tx2Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + tx_disable = tx_disable_data['data']['Tx3Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + tx_disable = tx_disable_data['data']['Tx4Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + + bit4 = int(tx_disable_list[3]) * 8 + bit3 = int(tx_disable_list[2]) * 4 + bit2 = int(tx_disable_list[1]) * 2 + bit1 = int(tx_disable_list[0]) * 1 + + tx_disable_channel = hex(bit4 + bit3 + bit2 + bit1) + + return tx_disable_channel + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + """ + lpmode_ctrl = self.sfp_control + 'qsfp_lpmode' + try: + reg_file = open(lpmode_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + if (self.sfp_ctrl_idx > 15): + index = self.sfp_ctrl_idx % 16 + else: + index = self.sfp_ctrl_idx + + mask = (1 << index) + + if ((reg_value & mask) == 0): + lpmode_state = False + else: + lpmode_state = True + + return lpmode_state + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + """ + power_override_state = None + + # Reset Status + power_override_data = self._get_eeprom_data('power_override') + if (power_override_data is not None): + power_override = power_override_data['data']['PowerOverRide']['value'] + if (power_override is 'On'): + power_override_state = True + else: + power_override_state = False + + return power_override_state + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + """ + temperature = None + + temperature_data = self._get_eeprom_data('Temperature') + if (temperature_data is not None): + temperature = temperature_data['data']['Temperature']['value'] + + return temperature + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + """ + voltage = None + + voltage_data = self._get_eeprom_data('Voltage') + if (voltage_data is not None): + voltage = voltage_data['data']['Vcc']['value'] + + return voltage + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + """ + tx_bias = None + tx_bias_list = [] + + tx_bias_data = self._get_eeprom_data('ChannelMonitor') + if (tx_bias_data is not None): + tx_bias = tx_bias_data['data']['TX1Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = tx_bias_data['data']['TX2Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = tx_bias_data['data']['TX3Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = tx_bias_data['data']['TX4Bias']['value'] + tx_bias_list.append(tx_bias) + + return tx_bias_list + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + """ + rx_power = None + rx_power_list = [] + + rx_power_data = self._get_eeprom_data('ChannelMonitor') + if (rx_power_data is not None): + rx_power = rx_power_data['data']['RX1Power']['value'] + rx_power_list.append(rx_power) + rx_power = rx_power_data['data']['RX2Power']['value'] + rx_power_list.append(rx_power) + rx_power = rx_power_data['data']['RX3Power']['value'] + rx_power_list.append(rx_power) + rx_power = rx_power_data['data']['RX4Power']['value'] + rx_power_list.append(rx_power) + + return rx_power_list + + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + """ + tx_power = None + tx_power_list = [] + + tx_power_list.append('-infdBm') + tx_power_list.append('-infdBm') + tx_power_list.append('-infdBm') + tx_power_list.append('-infdBm') + + return tx_power_list + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + """ + reset_ctrl = self.sfp_control + 'qsfp_reset' + try: + # Open reset_ctrl in both read & write mode + reg_file = open(reset_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + if (self.sfp_ctrl_idx > 15): + index = self.sfp_ctrl_idx % 16 + else: + index = self.sfp_ctrl_idx + + # Mask off the bit corresponding to our port + mask = (1 << index) + + # ResetL is active low + reg_value = (reg_value & ~mask) + + # Convert our register value back to a + # hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the + # register to take port out of reset + try: + reg_file = open(reset_ctrl, "w") + except IOError as e: + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + """ + lpmode_ctrl = self.sfp_control + 'qsfp_lpmode' + try: + reg_file = open(lpmode_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + if (self.sfp_ctrl_idx > 15): + index = self.sfp_ctrl_idx % 16 + else: + index = self.sfp_ctrl_idx + + mask = (1 << index) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = (reg_value | mask) + else: + reg_value = (reg_value & ~mask) + + # Convert our register value back to a hex string and write back + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + """ + return False + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + """ + return False + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + """ + return False + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + """ + return False + + def get_status(self): + """ + Retrieves the operational status of the device + """ + reset = self.get_reset_status() + + if (reset == True): + status = False + else: + status = True + + return status diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/thermal.py new file mode 100644 index 00000000000..3947f4c8495 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/thermal.py @@ -0,0 +1,209 @@ +#!/usr/bin/env python + +######################################################################## +# DellEMC S6100 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Thermals' information which are available in the platform +# +######################################################################## + + +try: + import os + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Thermal(ThermalBase): + """DellEMC Platform-specific Thermal class""" + + THERMAL_NAME = ( + 'CPU On-board', 'ASIC On-board Front', 'System Front', + 'ASIC On-board Rear', 'Front GE board', 'Front SFP+ board', + 'CPU Core 0', 'CPU Core 1', 'CPU Core 2', 'CPU Core 3' + ) + + def __init__(self, thermal_index): + self.is_cpu_thermal = False + self.index = thermal_index + 1 + + if self.index < 7: + if self.index < 5: + hwmon_temp_index = self.index + else: + hwmon_temp_index = self.index + 5 + + dev_path = "/sys/devices/platform/SMF.512/hwmon/" + else: + hwmon_temp_index = self.index - 5 + self.is_cpu_thermal = True + dev_path = "/sys/devices/platform/coretemp.0/hwmon/" + + hwmon_node = os.listdir(dev_path)[0] + self.HWMON_DIR = dev_path + hwmon_node + '/' + + self.thermal_status_file = self.HWMON_DIR \ + + "temp{}_alarm".format(hwmon_temp_index) + self.thermal_temperature_file = self.HWMON_DIR \ + + "temp{}_input".format(hwmon_temp_index) + self.thermal_high_threshold_file = self.HWMON_DIR \ + + "temp{}_crit".format(hwmon_temp_index) + self.thermal_low_threshold_file = self.HWMON_DIR \ + + "temp{}_min".format(hwmon_temp_index) + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # sysfs_file and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + except Exception as error: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def get_name(self): + """ + Retrieves the name of the thermal + + Returns: + string: The name of the thermal + """ + return self.THERMAL_NAME[self.index - 1] + + def get_presence(self): + """ + Retrieves the presence of the thermal + + Returns: + bool: True if thermal is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the Thermal + + Returns: + string: Model/part number of Thermal + """ + return 'NA' + + def get_serial(self): + """ + Retrieves the serial number of the Thermal + + Returns: + string: Serial number of Thermal + """ + return 'NA' + + def get_status(self): + """ + Retrieves the operational status of the thermal + + Returns: + A boolean value, True if thermal is operating properly, + False if not + """ + status = False + if self.is_cpu_thermal: + status = True + else: + thermal_status = self._read_sysfs_file(self.thermal_status_file) + if (thermal_status != 'ERR'): + thermal_status = int(thermal_status, 16) + if thermal_status != 5: + status = True + + return status + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celsius up to + nearest thousandth of one degree Celsius, e.g. 30.125 + """ + thermal_temperature = self._read_sysfs_file( + self.thermal_temperature_file) + if (thermal_temperature != 'ERR'): + thermal_temperature = float(thermal_temperature) / 1000 + else: + thermal_temperature = 0 + + return "{:.3f}".format(thermal_temperature) + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + + Returns: + A float number, the high threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius, + e.g. 30.125 + """ + thermal_high_threshold = self._read_sysfs_file( + self.thermal_high_threshold_file) + if (thermal_high_threshold != 'ERR'): + thermal_high_threshold = float(thermal_high_threshold) / 1000 + else: + thermal_high_threshold = 0 + + return "{:.3f}".format(thermal_high_threshold) + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + + Returns: + A float number, the low threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius, + e.g. 30.125 + """ + thermal_low_threshold = self._read_sysfs_file( + self.thermal_low_threshold_file) + if (thermal_low_threshold != 'ERR'): + thermal_low_threshold = float(thermal_low_threshold) / 1000 + else: + thermal_low_threshold = 0 + + return "{:.3f}".format(thermal_low_threshold) + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one + degree Celsius, e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if + not + """ + # Thermal threshold values are pre-defined based on HW. + return False + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one + degree Celsius, e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if + not + """ + # Thermal threshold values are pre-defined based on HW. + return False diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/watchdog.py new file mode 100644 index 00000000000..207ccb8971b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/watchdog.py @@ -0,0 +1,227 @@ +#!/usr/bin/env python + +######################################################################## +# +# DELLEMC S6100 +# +# Abstract base class for implementing a platform-specific class with +# which to interact with a hardware watchdog module in SONiC +# +######################################################################## + +try: + import os + import struct + import ctypes + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class _timespec(ctypes.Structure): + _fields_ = [ + ('tv_sec', ctypes.c_long), + ('tv_nsec', ctypes.c_long) + ] + +class Watchdog(WatchdogBase): + """ + Abstract base class for interfacing with a hardware watchdog module + """ + + io_resource = '/dev/port' + + WD_STATUS_OFFSET = 0x207 + WD_TIMER_OFFSET = 0x206 + WD_ENABLE = 0 + WD_DISABLE = 1 + + armed_time = 0 + timeout = 0 + CLOCK_MONOTONIC = 1 + + def __init__(self): + self._librt = ctypes.CDLL('librt.so.1', use_errno=True) + self._clock_gettime = self._librt.clock_gettime + self._clock_gettime.argtypes=[ctypes.c_int, ctypes.POINTER(_timespec)] + + def _io_reg_read(self, offset): + """ + Read the resource file + """ + fd = os.open(self.io_resource, os.O_RDONLY) + if fd < 0: + return -1 + + if os.lseek(fd, offset, os.SEEK_SET) != offset: + os.close(fd) + return -1 + + buf = os.read(fd, 1) + reg_value = ord(buf) + + os.close(fd) + return reg_value + + def _io_reg_write(self, offset, val): + """ + Write in the resource file + """ + fd = os.open(self.io_resource, os.O_RDWR) + if fd < 0: + return -1 + + if os.lseek(fd, offset, os.SEEK_SET) != offset: + os.close(fd) + return -1 + + ret = os.write(fd, struct.pack('B', val)) + if ret != 1: + os.close(fd) + return -1 + + os.close(fd) + return ret + + def _read_gpio_file(self, file_path): + """ + Read the GPIO values + """ + fd = os.open(file_path, os.O_RDONLY) + read_str = os.read(fd, os.path.getsize(file_path)) + gpio_val = int(read_str, 16) + os.close(fd) + return gpio_val + + def _write_gpio_file(self, file_path, val): + """ + Write the GPIO values + """ + fd = os.open(file_path, os.O_RDWR) + ret = os.write(fd, val) + if ret < 0: + os.close(fd) + return -1 + + os.close(fd) + return 1 + + def _get_time(self): + """ + To get clock monotonic time + """ + ts = _timespec() + if self._clock_gettime(self.CLOCK_MONOTONIC, ctypes.pointer(ts)) != 0: + errno_ = ctypes.get_errno() + return 0 + return ts.tv_sec + ts.tv_nsec * 1e-9 + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* + available value. + + Returns: + An integer specifying the *actual* number of seconds the + watchdog was armed with. On failure returns -1. + """ + gpio = "/sys/devices/platform/dell_ich.0/sc_gp_lvl" + timer_offset = -1 + if seconds <= 30: + timer_offset = 1 + seconds = 30 + elif seconds > 30 and seconds <= 60: + timer_offset = 2 + seconds = 60 + elif seconds > 60 and seconds <= 180: + timer_offset = 3 + seconds = 180 + + if timer_offset == -1: + return -1 + if self._io_reg_read(self.WD_TIMER_OFFSET) != timer_offset: + if self._io_reg_write(self.WD_TIMER_OFFSET, timer_offset) == -1: + return -1 + self.disarm() + + if self.is_armed(): + gpio_val = self._read_gpio_file(gpio) + high_val = gpio_val | (1 << 15) + if self._write_gpio_file(gpio, hex(high_val)) != -1: + low_val = high_val & 0xFFFF7FFF + if self._write_gpio_file(gpio, hex(low_val)) != -1: + self.armed_time = self._get_time() + self.timeout = seconds + return seconds + elif self._io_reg_write(self.WD_STATUS_OFFSET, self.WD_ENABLE) != -1: + self.armed_time = self._get_time() + self.timeout = seconds + return seconds + + return -1 + + def disarm(self): + """ + Disarm the hardware watchdog + + Returns: + A boolean, True if watchdog is disarmed successfully, False + if not + """ + if self._io_reg_write(self.WD_STATUS_OFFSET, self.WD_DISABLE) != -1: + self.armed_time = 0 + self.timeout = 0 + return True + + return False + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + + Returns: + A boolean, True if watchdog is armed, False if not + """ + wd_status = self.WD_DISABLE + wd_status = self._io_reg_read(self.WD_STATUS_OFFSET) + if wd_status == self.WD_ENABLE: + return True + + return False + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds + remaining on the watchdog timer + + Returns: + An integer specifying the number of seconds remaining on + their watchdog timer. If the watchdog is not armed, returns + -1. + + S6100 doesnot have hardware support to show remaining time. + Due to this limitation, this API is implemented in software. + This API would return correct software time difference if it + is called from the process which armed the watchdog timer. + If this API called from any other process, it would return + 0. If the watchdog is not armed, this API would return -1. + """ + if not self.is_armed(): + return -1 + + if self.armed_time > 0 and self.timeout != 0: + cur_time = self._get_time() + if cur_time <= 0: + return 0 + diff_time = int(cur_time - self.armed_time) + if diff_time > self.timeout: + return self.timeout + else: + return self.timeout - diff_time + + return 0 + diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/systemd/platform-modules-s6100.service b/platform/broadcom/sonic-platform-modules-dell/s6100/systemd/platform-modules-s6100.service new file mode 100644 index 00000000000..9b5805d5cbb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/systemd/platform-modules-s6100.service @@ -0,0 +1,14 @@ +[Unit] +Description=Dell S6100 Platform modules +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStartPre=/usr/local/bin/iom_power_on.sh +ExecStart=/usr/local/bin/s6100_platform.sh init +ExecStop=/usr/local/bin/s6100_platform.sh deinit +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/systemd/s6100-lpc-monitor.service b/platform/broadcom/sonic-platform-modules-dell/s6100/systemd/s6100-lpc-monitor.service new file mode 100644 index 00000000000..86dac18a310 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/systemd/s6100-lpc-monitor.service @@ -0,0 +1,12 @@ +[Unit] +Description=Dell S6100 LPC bus monitoring poller +DefaultDependencies=no + +[Service] +User=root +ExecStart=/usr/local/bin/dell_lpc_mon.sh +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target + diff --git a/platform/broadcom/sonic-platform-modules-dell/tools/0002-Flashrom-support-for-Intel-Rangeley-and-Denverton-CP.patch b/platform/broadcom/sonic-platform-modules-dell/tools/0002-Flashrom-support-for-Intel-Rangeley-and-Denverton-CP.patch new file mode 100644 index 00000000000..ab77df9c4d3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/tools/0002-Flashrom-support-for-Intel-Rangeley-and-Denverton-CP.patch @@ -0,0 +1,8510 @@ +From 482e06109190eb918208820fd94c8f4a6963f77e Mon Sep 17 00:00:00 2001 +From: paavaanan +Date: Tue, 21 May 2019 10:40:59 -0400 +Subject: [PATCH] Intel-Rangeley-stripped-code-changes + +--- + 82802ab.c | 1 + + Makefile | 109 +++- + README | 26 +- + at45db.c | 562 ++++++++++++++++ + atahpt.c | 2 + + board_enable.c | 19 +- + buspirate_spi.c | 7 +- + cbtable.c | 7 +- + chipdrivers.h | 21 +- + chipset_enable.c | 610 +++++++++++------ + cli_classic.c | 40 +- + dmi.c | 332 ++++++++-- + dnv_smi_spi.c | 185 ++++++ + drkaiser.c | 14 +- + flash.h | 56 +- + flashchips.c | 791 +++++++++++++++++++---- + flashchips.h | 27 +- + flashrom.c | 162 ++++- + ft2232_spi.c | 6 + + gfxnvidia.c | 14 +- + hwaccess.h | 6 + + ich_descriptors.c | 104 +++ + ich_descriptors.h | 104 +++ + ichspi.c | 557 ++++++++++++++-- + internal.c | 5 +- + it85spi.c | 3 + + it87spi.c | 47 +- + layout.c | 126 +++- + linux_spi.c | 12 +- + mcp6x_spi.c | 15 +- + nic3com.c | 2 + + nicintel.c | 29 +- + nicintel_spi.c | 26 +- + nicnatsemi.c | 2 + + nicrealtek.c | 2 + + ogp_spi.c | 14 +- + pcidev.c | 2 +- + physmap.c | 170 +++-- + pony_spi.c | 1 + + print.c | 15 +- + programmer.h | 28 +- + rayer_spi.c | 196 ++++-- + satamv.c | 19 +- + satasii.c | 18 +- + sb600spi.c | 208 +++++- + serial.c | 113 ++-- + serprog.c | 165 +++-- + spi25.c | 35 +- + spi25_statusreg.c | 2 +- + stm50.c | 115 ++++ + udelay.c | 10 +- + util/getrevision.sh | 311 +++++++++ + util/ich_descriptors_tool/ich_descriptors_tool.c | 8 +- + util/z60_flashrom.rules | 4 + + 54 files changed, 4553 insertions(+), 912 deletions(-) + create mode 100644 at45db.c + create mode 100644 dnv_smi_spi.c + create mode 100644 stm50.c + create mode 100755 util/getrevision.sh + +diff --git a/82802ab.c b/82802ab.c +index 608995d..2a43813 100644 +--- a/82802ab.c ++++ b/82802ab.c +@@ -89,6 +89,7 @@ int probe_82802ab(struct flashctx *flash) + return 1; + } + ++/* FIXME: needs timeout */ + uint8_t wait_82802ab(struct flashctx *flash) + { + uint8_t status; +diff --git a/Makefile b/Makefile +index 6e41e5d..d66039a 100644 +--- a/Makefile ++++ b/Makefile +@@ -39,6 +39,7 @@ CFLAGS ?= -Os -Wall -Wshadow + EXPORTDIR ?= . + AR ?= ar + RANLIB ?= ranlib ++DOSLIBS_BASE ?= .. + # The following parameter changes the default programmer that will be used if there is no -p/--programmer + # argument given when running flashrom. The predefined setting does not enable any default so that every + # user has to declare the programmer he wants to use on every run. The rationale for this to be not set +@@ -50,7 +51,8 @@ RANLIB ?= ranlib + # values are those specified in enum programmer in programmer.h (which depend on other CONFIG_* options + # evaluated below, namely those that enable/disable the various programmers). + # Compilation will fail for unspecified values. +-CONFIG_DEFAULT_PROGRAMMER ?= PROGRAMMER_INVALID ++#CONFIG_DEFAULT_PROGRAMMER ?= PROGRAMMER_INVALID ++CONFIG_DEFAULT_PROGRAMMER ?= PROGRAMMER_INTERNAL + + # If your compiler spits out excessive warnings, run make WARNERROR=no + # You shouldn't have to change this flag. +@@ -61,10 +63,13 @@ CFLAGS += -Werror + endif + + ############################################################################### +-# General OS/architecture specific settings. ++# General OS-specific settings. ++# 1. Prepare for later by gathering information about host and target OS ++# 2. Set compiler flags and parameters according to OSes ++# 3. Likewise verify user-supplied CONFIG_* variables. + + # HOST_OS is only used to work around local toolchain issues. +-HOST_OS ?= $(shell uname) ++HOST_OS ?= $(shell uname) + ifeq ($(HOST_OS), MINGW32_NT-5.1) + # Explicitly set CC = gcc on MinGW, otherwise: "cc: command not found". + CC = gcc +@@ -94,13 +99,24 @@ CPPFLAGS += -I/usr/local/include + LDFLAGS += -L/usr/local/lib + endif + ++ifeq ($(TARGET_OS), NetBSD) ++CPPFLAGS += -I/usr/pkg/include ++LDFLAGS += -L/usr/pkg/lib ++endif ++ ++ifeq ($(TARGET_OS), DragonFlyBSD) ++CPPFLAGS += -I/usr/pkg/include ++LDFLAGS += -L/usr/pkg/lib ++endif ++ + ifeq ($(TARGET_OS), DOS) + EXEC_SUFFIX := .exe +-CPPFLAGS += -I../libgetopt ++CPPFLAGS += -I$(DOSLIBS_BASE)/libgetopt + # DJGPP has odd uint*_t definitions which cause lots of format string warnings. + CFLAGS += -Wno-format + # FIXME Check if we can achieve the same effect with -L../libgetopt -lgetopt +-LIBS += ../libgetopt/libgetopt.a ++LIBS += -lgetopt ++LDFLAGS += -L$(DOSLIBS_BASE)/libgetopt/ + # Bus Pirate, Serprog and PonyProg are not supported under DOS (missing serial support). + ifeq ($(CONFIG_BUSPIRATE_SPI), yes) + UNSUPPORTED_FEATURES += CONFIG_BUSPIRATE_SPI=yes +@@ -215,6 +231,10 @@ endif + endif + + ifeq ($(TARGET_OS), libpayload) ++ifeq ($(MAKECMDGOALS),) ++.DEFAULT_GOAL := libflashrom.a ++$(info Setting default goal to libflashrom.a) ++endif + FLASHROM_CFLAGS += -DSTANDALONE + ifeq ($(CONFIG_DUMMY), yes) + UNSUPPORTED_FEATURES += CONFIG_DUMMY=yes +@@ -263,6 +283,10 @@ override CONFIG_LINUX_SPI = no + endif + endif + ++############################################################################### ++# General architecture-specific settings. ++# Like above for the OS, below we verify user-supplied options depending on the target architecture. ++ + # Determine the destination processor architecture. + # IMPORTANT: The following line must be placed before ARCH is ever used + # (of course), but should come after any lines setting CC because the line +@@ -307,10 +331,10 @@ endif + ############################################################################### + # Flash chip drivers and bus support infrastructure. + +-CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \ ++CHIP_OBJS = jedec.o stm50.o w39.o w29ee011.o \ + sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ + sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \ +- opaque.o sfdp.o en29lv640b.o ++ opaque.o sfdp.o en29lv640b.o at45db.o + + ############################################################################### + # Library code. +@@ -322,18 +346,22 @@ LIB_OBJS = layout.o flashrom.o udelay.o programmer.o + + CLI_OBJS = cli_classic.o cli_output.o print.o + +-# Set the flashrom version string from the highest revision number +-# of the checked out flashrom files. ++# Set the flashrom version string from the highest revision number of the checked out flashrom files. + # Note to packagers: Any tree exported with "make export" or "make tarball" + # will not require subversion. The downloadable snapshots are already exported. +-SVNVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/\([0-9]*\).*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown) ++SVNVERSION := r1781 + + RELEASE := 0.9.7 +-VERSION := $(RELEASE)-r$(SVNVERSION) ++VERSION := $(RELEASE)-$(SVNVERSION) + RELEASENAME ?= $(VERSION) + + SVNDEF := -D'FLASHROM_VERSION="$(VERSION)"' + ++F10FLAGS := -DFORCE10_SPI_CHANGE ++ ++############################################################################### ++# Default settings of CONFIG_* variables. ++ + # Always enable internal/onboard support for now. + CONFIG_INTERNAL ?= yes + +@@ -425,16 +453,39 @@ endif + endif + + ############################################################################### ++# Handle CONFIG_* variables that depend on others set (and verified) above. ++ ++# The external DMI decoder (dmidecode) does not work in libpayload. Bail out if the internal one got disabled. ++ifeq ($(TARGET_OS), libpayload) ++ifeq ($(CONFIG_INTERNAL), yes) ++ifeq ($(CONFIG_INTERNAL_DMI), no) ++UNSUPPORTED_FEATURES += CONFIG_INTERNAL_DMI=no ++else ++override CONFIG_INTERNAL_DMI = yes ++endif ++endif ++endif ++ ++# Use internal DMI/SMBIOS decoder by default instead of relying on dmidecode. ++CONFIG_INTERNAL_DMI ?= yes ++ ++############################################################################### + # Programmer drivers and programmer support infrastructure. ++# Depending on the CONFIG_* variables set and verified above we set compiler flags and parameters below. ++ ++FEATURE_CFLAGS += -DDELL_DENVERTON_SUPPORT -DDELL_AVOTON_SUPPORT + + FEATURE_CFLAGS += -D'CONFIG_DEFAULT_PROGRAMMER=$(CONFIG_DEFAULT_PROGRAMMER)' + + ifeq ($(CONFIG_INTERNAL), yes) + FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' +-PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o dmi.o internal.o ++PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o internal.o + ifeq ($(ARCH), x86) + PROGRAMMER_OBJS += it87spi.o it85spi.o sb600spi.o amd_imc.o wbsio_spi.o mcp6x_spi.o +-PROGRAMMER_OBJS += ichspi.o ich_descriptors.o ++PROGRAMMER_OBJS += ichspi.o ich_descriptors.o dmi.o dnv_smi_spi.o ++ifeq ($(CONFIG_INTERNAL_DMI), yes) ++FEATURE_CFLAGS += -D'CONFIG_INTERNAL_DMI=1' ++endif + else + endif + NEED_PCI := yes +@@ -597,9 +648,9 @@ PCILIBS += -lpciutils -lpci + PCILIBS += -l$(shell uname -p) + else + ifeq ($(TARGET_OS), DOS) +-# FIXME There needs to be a better way to do this +-CPPFLAGS += -I../libpci/include +-PCILIBS += ../libpci/lib/libpci.a ++CPPFLAGS += -I$(DOSLIBS_BASE)/libpci/include ++LDFLAGS += -L$(DOSLIBS_BASE)/libpci/lib/ ++PCILIBS += -lpci + else + PCILIBS += -lpci + ifeq ($(TARGET_OS), OpenBSD) +@@ -635,10 +686,11 @@ FEATURE_LIBS += $(shell LC_ALL=C grep -q "NEEDLIBZ := yes" .libdeps && printf "% + LIBFLASHROM_OBJS = $(CHIP_OBJS) $(PROGRAMMER_OBJS) $(LIB_OBJS) + OBJS = $(CLI_OBJS) $(LIBFLASHROM_OBJS) + +-all: hwlibs features $(PROGRAM)$(EXEC_SUFFIX) ++all: hwlibs features $(PROGRAM)$(EXEC_SUFFIX) $(PROGRAM).8 + ifeq ($(ARCH), x86) + @+$(MAKE) -C util/ich_descriptors_tool/ TARGET_OS=$(TARGET_OS) EXEC_SUFFIX=$(EXEC_SUFFIX) + endif ++default: all + + $(PROGRAM)$(EXEC_SUFFIX): $(OBJS) + $(CC) $(LDFLAGS) -o $(PROGRAM)$(EXEC_SUFFIX) $(OBJS) $(LIBS) $(PCILIBS) $(FEATURE_LIBS) $(USBLIBS) +@@ -653,13 +705,13 @@ libflashrom.a: $(LIBFLASHROM_OBJS) + TAROPTIONS = $(shell LC_ALL=C tar --version|grep -q GNU && echo "--owner=root --group=root") + + %.o: %.c .features +- $(CC) -MMD $(CFLAGS) $(CPPFLAGS) $(FLASHROM_CFLAGS) $(FEATURE_CFLAGS) $(SVNDEF) -o $@ -c $< ++ $(CC) -MMD $(CFLAGS) $(CPPFLAGS) $(FLASHROM_CFLAGS) $(FEATURE_CFLAGS) $(SVNDEF) $(F10FLAGS) -o $@ -c $< + + # Make sure to add all names of generated binaries here. + # This includes all frontends and libflashrom. + # We don't use EXEC_SUFFIX here because we want to clean everything. + clean: +- rm -f $(PROGRAM) $(PROGRAM).exe libflashrom.a *.o *.d ++ rm -f $(PROGRAM) $(PROGRAM).exe libflashrom.a *.o *.d $(PROGRAM).8 + @+$(MAKE) -C util/ich_descriptors_tool/ clean + + distclean: clean +@@ -698,11 +750,20 @@ compiler: featuresavailable + @echo $(TARGET_OS)|wc -w|grep -q '^[[:blank:]]*1[[:blank:]]*$$' || \ + ( echo "unknown. Aborting."; exit 1) + @printf "%s\n" '$(TARGET_OS)' ++ifeq ($(TARGET_OS), libpayload) ++ @$(CC) --version 2>&1 | grep -q coreboot || \ ++ ( echo "Warning: It seems you are not using coreboot's reference compiler."; \ ++ echo "This might work but usually does not, please beware." ) ++endif + + define LIBPCI_TEST + /* Avoid a failing test due to libpci header symbol shadowing breakage */ + #define index shadow_workaround_index ++#if !defined __NetBSD__ && !defined __DragonFly__ + #include ++#else ++#include ++#endif + struct pci_access *pacc; + int main(int argc, char **argv) + { +@@ -853,16 +914,20 @@ endif + @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features + @rm -f .featuretest.c .featuretest$(EXEC_SUFFIX) + +-install: $(PROGRAM)$(EXEC_SUFFIX) ++$(PROGRAM).8: $(PROGRAM).8.tmpl ++ @sed -e '1 s#".*".*#"$(shell ./util/getrevision.sh -d $(PROGRAM).8.tmpl)" "$(VERSION)"#' <$< >$@ ++ ++install: $(PROGRAM)$(EXEC_SUFFIX) $(PROGRAM).8 + mkdir -p $(DESTDIR)$(PREFIX)/sbin + mkdir -p $(DESTDIR)$(MANDIR)/man8 + $(INSTALL) -m 0755 $(PROGRAM)$(EXEC_SUFFIX) $(DESTDIR)$(PREFIX)/sbin + $(INSTALL) -m 0644 $(PROGRAM).8 $(DESTDIR)$(MANDIR)/man8 + +-export: ++export: $(PROGRAM).8 + @rm -rf $(EXPORTDIR)/flashrom-$(RELEASENAME) + @svn export -r BASE . $(EXPORTDIR)/flashrom-$(RELEASENAME) + @sed "s/^SVNVERSION.*/SVNVERSION := $(SVNVERSION)/" Makefile >$(EXPORTDIR)/flashrom-$(RELEASENAME)/Makefile ++ @cp $(PROGRAM).8 "$(EXPORTDIR)/flashrom-$(RELEASENAME)/$(PROGRAM).8" + @LC_ALL=C svn log >$(EXPORTDIR)/flashrom-$(RELEASENAME)/ChangeLog + @echo Exported $(EXPORTDIR)/flashrom-$(RELEASENAME)/ + +@@ -876,6 +941,6 @@ djgpp-dos: clean + libpayload: clean + make CC="CC=i386-elf-gcc lpgcc" AR=i386-elf-ar RANLIB=i386-elf-ranlib + +-.PHONY: all clean distclean compiler hwlibs features export tarball dos featuresavailable ++.PHONY: all install clean distclean compiler hwlibs features export tarball dos featuresavailable + + -include $(OBJS:.o=.d) +diff --git a/README b/README +index 7f24cca..b3e50a6 100644 +--- a/README ++++ b/README +@@ -80,11 +80,9 @@ To compile on Solaris, use: + + gmake LDFLAGS="-L$pathtolibpci" CC="gcc -I$pathtopciheaders" CFLAGS=-O2 + +-To compile on NetBSD or DragonFly BSD, use: ++To compile on NetBSD or DragonFly BSD (with pciutils, libftdi, libusb installed in /usr/pkg/), use: + +- ln -s /usr/pkg/include/pciutils pci +- gmake CPPFLAGS="-I. -I/usr/pkg/include" \ +- LDFLAGS="-L/usr/pkg/lib -Wl,-rpath-link,/usr/pkg/lib" ++ gmake + + To compile on OpenBSD, use: + +@@ -105,20 +103,24 @@ To cross-compile on Linux for DOS: + djcrx-2.04pre_20090725-13ap.i386.rpm + The cross toolchain packages for your distribution may have slightly different + names (look for packages named *djgpp*). +- Download pciutils 3.1.5 and apply http://assembler.cz/flashrom/pciutils.patch +- Download and compile http://assembler.cz/flashrom/libgetopt/ ++ ++ You will need the following library source trees containing their compiled ++ static libraries either in the parent directory of the flashrom source or ++ specify the base folder on compile time with the DOSLIBS_BASE parameter. ++ The default as described above is equal to calling ++ 'make djgpp-dos DOSLIBS_BASE=..' ++ ++ To get and build said libraries... ++ Download pciutils 3.1.5 and apply http://flashrom.org/File:Pciutils.patch.gz + Compile pciutils, see README.DJGPP for instructions. ++ Download and compile http://flashrom.org/File:Libgetopt.tar.gz + Enter the flashrom directory. +- ../libpci should contain pciutils source and binaries. +- ../libgetopt should contain getopt.a from libgetopt. + Run either (change settings where appropriate) + make CC=i586-pc-msdosdjgpp-gcc STRIP=i586-pc-msdosdjgpp-strip + or (above settings hardcoded) + make djgpp-dos +- You might have to add WARNERROR=no to the make command line. +- To run flashrom.exe, download and unpack +- http://homer.rice.edu/~sandmann/cwsdpmi/csdpmi7b.zip and make sure +- CWSDPMI.EXE is in the current directory. ++ To run flashrom.exe, download http://flashrom.org/File:Csdpmi7b.zip and ++ unpack CWSDPMI.EXE into the current directory or one in PATH. + + To cross-compile on Linux for Windows: + +diff --git a/at45db.c b/at45db.c +new file mode 100644 +index 0000000..5c90418 +--- /dev/null ++++ b/at45db.c +@@ -0,0 +1,562 @@ ++/* ++ * Support for Atmel AT45DB series DataFlash chips. ++ * This file is part of the flashrom project. ++ * ++ * Copyright (C) 2012 Aidan Thornton ++ * Copyright (C) 2013 Stefan Tauner ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ */ ++ ++#include ++#include "flash.h" ++#include "chipdrivers.h" ++#include "programmer.h" ++#include "spi.h" ++ ++/* Status register bits */ ++#define AT45DB_READY (1<<7) ++#define AT45DB_CMP (1<<6) ++#define AT45DB_PROT (1<<1) ++#define AT45DB_POWEROF2 (1<<0) ++ ++/* Opcodes */ ++#define AT45DB_STATUS 0xD7 /* NB: this is a block erase command on most other chips(!). */ ++#define AT45DB_DISABLE_PROTECT 0x3D, 0x2A, 0x7F, 0x9A ++#define AT45DB_READ_ARRAY 0xE8 ++#define AT45DB_READ_PROTECT 0x32 ++#define AT45DB_READ_LOCKDOWN 0x35 ++#define AT45DB_PAGE_ERASE 0x81 ++#define AT45DB_BLOCK_ERASE 0x50 ++#define AT45DB_SECTOR_ERASE 0x7C ++#define AT45DB_CHIP_ERASE 0xC7 ++#define AT45DB_CHIP_ERASE_ADDR 0x94809A /* Magic address. See usage. */ ++#define AT45DB_BUFFER1_WRITE 0x84 ++#define AT45DB_BUFFER1_PAGE_PROGRAM 0x88 ++/* Buffer 2 is unused yet. ++#define AT45DB_BUFFER2_WRITE 0x87 ++#define AT45DB_BUFFER2_PAGE_PROGRAM 0x89 ++*/ ++ ++static uint8_t at45db_read_status_register(struct flashctx *flash, uint8_t *status) ++{ ++ static const uint8_t cmd[] = { AT45DB_STATUS }; ++ ++ int ret = spi_send_command(flash, sizeof(cmd), 1, cmd, status); ++ if (ret != 0) ++ msg_cerr("Reading the status register failed!\n"); ++ else ++ msg_cspew("Status register: 0x%02x.\n", *status); ++ return ret; ++} ++ ++int spi_disable_blockprotect_at45db(struct flashctx *flash) ++{ ++ static const uint8_t cmd[4] = { AT45DB_DISABLE_PROTECT }; /* NB: 4 bytes magic number */ ++ int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); ++ if (ret != 0) { ++ msg_cerr("Sending disable lockdown failed!\n"); ++ return ret; ++ } ++ uint8_t status; ++ ret = at45db_read_status_register(flash, &status); ++ if (ret != 0 || ((status & AT45DB_PROT) != 0)) { ++ msg_cerr("Disabling lockdown failed!\n"); ++ return 1; ++ } ++ ++ return 0; ++} ++ ++static unsigned int at45db_get_sector_count(struct flashctx *flash) ++{ ++ unsigned int i, j; ++ unsigned int cnt = 0; ++ for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { ++ if (flash->chip->block_erasers[i].block_erase == &spi_erase_at45db_sector) { ++ for (j = 0; j < NUM_ERASEREGIONS; j++) { ++ cnt += flash->chip->block_erasers[i].eraseblocks[j].count; ++ } ++ } ++ } ++ msg_cspew("%s: number of sectors=%u\n", __func__, cnt); ++ return cnt; ++} ++ ++/* Reads and prettyprints protection/lockdown registers. ++ * Some elegance of the printouts had to be cut down a bit to share this code. */ ++static uint8_t at45db_prettyprint_protection_register(struct flashctx *flash, uint8_t opcode, const char *regname) ++{ ++ const uint8_t cmd[] = { opcode, 0, 0, 0 }; ++ /* The first two sectors share the first result byte. */ ++ uint8_t buf[at45db_get_sector_count(flash) - 1]; ++ ++ int ret = spi_send_command(flash, sizeof(cmd), sizeof(buf), cmd, buf); ++ if (ret != 0) { ++ msg_cerr("Reading the %s register failed!\n", regname); ++ return ret; ++ } ++ ++ unsigned int i; ++ for (i = 0; i < sizeof(buf); i++) { ++ if (buf[i] != 0x00) ++ break; ++ if (i == sizeof(buf) - 1) { ++ msg_cdbg("No Sector is %sed.\n", regname); ++ return 0; ++ } ++ } ++ ++ /* TODO: print which addresses are mapped to (un)locked sectors. */ ++ msg_cdbg("Sector 0a is %s%sed.\n", ((buf[0] & 0xC0) == 0x00) ? "un" : "", regname); ++ msg_cdbg("Sector 0b is %s%sed.\n", ((buf[0] & 0x30) == 0x00) ? "un" : "", regname); ++ for (i = 1; i < sizeof(buf); i++) ++ msg_cdbg("Sector %2u is %s%sed.\n", i, (buf[i] == 0x00) ? "un" : "", regname); ++ ++ return 0; ++} ++ ++/* bit 7: busy flag ++ * bit 6: memory/buffer compare result ++ * bit 5-2: density (encoding see below) ++ * bit 1: protection enabled (soft or hard) ++ * bit 0: "power of 2" page size indicator (e.g. 1 means 256B; 0 means 264B) ++ * ++ * 5-2 encoding: bit 2 is always 1, bits 3-5 encode the density as "2^(bits - 1)" in Mb e.g.: ++ * AT45DB161D 1011 16Mb */ ++int spi_prettyprint_status_register_at45db(struct flashctx *flash) ++{ ++ uint8_t status; ++ if (at45db_read_status_register(flash, &status) != 0) { ++ return 1; ++ } ++ ++ /* AT45DB321C does not support lockdown or a page size of a power of 2... */ ++ const bool isAT45DB321C = (strcmp(flash->chip->name, "AT45DB321C") == 0); ++ msg_cdbg("Chip status register is 0x%02x\n", status); ++ msg_cdbg("Chip status register: Bit 7 / Ready is %sset\n", (status & AT45DB_READY) ? "" : "not "); ++ msg_cdbg("Chip status register: Bit 6 / Compare match is %sset\n", (status & AT45DB_CMP) ? "" : "not "); ++ spi_prettyprint_status_register_bit(status, 5); ++ spi_prettyprint_status_register_bit(status, 4); ++ spi_prettyprint_status_register_bit(status, 3); ++ spi_prettyprint_status_register_bit(status, 2); ++ const uint8_t dens = (status >> 3) & 0x7; /* Bit 2 is always 1, we use the other bits only */ ++ msg_cdbg("Chip status register: Density is %u Mb\n", 1 << (dens - 1)); ++ msg_cdbg("Chip status register: Bit 1 / Protection is %sset\n", (status & AT45DB_PROT) ? "" : "not "); ++ ++ if (isAT45DB321C) ++ spi_prettyprint_status_register_bit(status, 0); ++ else ++ msg_cdbg("Chip status register: Bit 0 / \"Power of 2\" is %sset\n", ++ (status & AT45DB_POWEROF2) ? "" : "not "); ++ ++ if (status & AT45DB_PROT) ++ at45db_prettyprint_protection_register(flash, AT45DB_READ_PROTECT, "protect"); ++ ++ if (!isAT45DB321C) ++ at45db_prettyprint_protection_register(flash, AT45DB_READ_LOCKDOWN, "lock"); ++ ++ return 0; ++} ++ ++/* Probe function for AT45DB* chips that support multiple page sizes. */ ++int probe_spi_at45db(struct flashctx *flash) ++{ ++ uint8_t status; ++ struct flashchip *chip = flash->chip; ++ ++ if (!probe_spi_rdid(flash)) ++ return 0; ++ ++ /* Some AT45DB* chips support two different page sizes each (e.g. 264 and 256 B). In order to tell which ++ * page size this chip has we need to read the status register. */ ++ if (at45db_read_status_register(flash, &status) != 0) ++ return 0; ++ ++ /* We assume sane power-of-2 page sizes and adjust the chip attributes in case this is not the case. */ ++ if ((status & AT45DB_POWEROF2) == 0) { ++ chip->total_size = (chip->total_size / 32) * 33; ++ chip->page_size = (chip->page_size / 32) * 33; ++ ++ unsigned int i, j; ++ for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { ++ struct block_eraser *eraser = &chip->block_erasers[i]; ++ for (j = 0; j < NUM_ERASEREGIONS; j++) { ++ eraser->eraseblocks[j].size = (eraser->eraseblocks[j].size / 32) * 33; ++ } ++ } ++ } ++ ++ switch (chip->page_size) { ++ case 256: chip->gran = write_gran_256bytes; break; ++ case 264: chip->gran = write_gran_264bytes; break; ++ case 512: chip->gran = write_gran_512bytes; break; ++ case 528: chip->gran = write_gran_528bytes; break; ++ case 1024: chip->gran = write_gran_1024bytes; break; ++ case 1056: chip->gran = write_gran_1056bytes; break; ++ default: ++ msg_cerr("%s: unknown page size %d.\n", __func__, chip->page_size); ++ return 0; ++ } ++ ++ msg_cdbg2("%s: total size %i kB, page size %i B\n", __func__, chip->total_size * 1024, chip->page_size); ++ ++ return 1; ++} ++ ++/* Returns the minimum number of bits needed to represent the given address. ++ * FIXME: use mind-blowing implementation. ++ * FIXME: move to utility module. */ ++static uint32_t address_to_bits(uint32_t addr) ++{ ++ unsigned int lzb = 0; ++ while (((1 << (31 - lzb)) & ~addr) != 0) ++ lzb++; ++ return 32 - lzb; ++} ++ ++/* In case of non-power-of-two page sizes we need to convert the address flashrom uses to the address the ++ * DataFlash chips use. The latter uses a segmented address space where the page address is encoded in the ++ * more significant bits and the offset within the page is encoded in the less significant bits. The exact ++ * partition depends on the page size. ++ */ ++static unsigned int at45db_convert_addr(unsigned int addr, unsigned int page_size) ++{ ++ unsigned int page_bits = address_to_bits(page_size - 1); ++ unsigned int at45db_addr = ((addr / page_size) << page_bits) | (addr % page_size); ++ msg_cspew("%s: addr=0x%x, page_size=%u, page_bits=%u -> at45db_addr=0x%x\n", ++ __func__, addr, page_size, page_bits, at45db_addr); ++ return at45db_addr; ++} ++ ++int spi_read_at45db(struct flashctx *flash, uint8_t *buf, unsigned int addr, unsigned int len) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ const unsigned int total_size = flash->chip->total_size * 1024; ++ if ((addr + len) > total_size) { ++ msg_cerr("%s: tried to read beyond flash boundary: addr=%u, len=%u, size=%u\n", ++ __func__, addr, len, total_size); ++ return 1; ++ } ++ ++ /* We have to split this up into chunks to fit within the programmer's read size limit, but those ++ * chunks can cross page boundaries. */ ++ const unsigned int max_data_read = flash->pgm->spi.max_data_read; ++ const unsigned int max_chunk = (max_data_read > 0) ? max_data_read : page_size; ++ while (addr < len) { ++ unsigned int chunk = min(max_chunk, len); ++ int ret = spi_nbyte_read(flash, at45db_convert_addr(addr, page_size), buf + addr, chunk); ++ if (ret) { ++ msg_cerr("%s: error sending read command!\n", __func__); ++ return ret; ++ } ++ addr += chunk; ++ } ++ ++ return 0; ++} ++ ++/* Legacy continuous read, used where spi_read_at45db() is not available. ++ * The first 4 (dummy) bytes read need to be discarded. */ ++int spi_read_at45db_e8(struct flashctx *flash, uint8_t *buf, unsigned int addr, unsigned int len) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ const unsigned int total_size = flash->chip->total_size * 1024; ++ if ((addr + len) > total_size) { ++ msg_cerr("%s: tried to read beyond flash boundary: addr=%u, len=%u, size=%u\n", ++ __func__, addr, len, total_size); ++ return 1; ++ } ++ ++ /* We have to split this up into chunks to fit within the programmer's read size limit, but those ++ * chunks can cross page boundaries. */ ++ const unsigned int max_data_read = flash->pgm->spi.max_data_read; ++ const unsigned int max_chunk = (max_data_read > 0) ? max_data_read : page_size; ++ while (addr < len) { ++ const unsigned int addr_at45 = at45db_convert_addr(addr, page_size); ++ const unsigned char cmd[] = { ++ AT45DB_READ_ARRAY, ++ (addr_at45 >> 16) & 0xff, ++ (addr_at45 >> 8) & 0xff, ++ (addr_at45 >> 0) & 0xff ++ }; ++ /* We need to leave place for 4 dummy bytes and handle them explicitly. */ ++ unsigned int chunk = min(max_chunk, len + 4); ++ uint8_t tmp[chunk]; ++ int ret = spi_send_command(flash, sizeof(cmd), chunk, cmd, tmp); ++ if (ret) { ++ msg_cerr("%s: error sending read command!\n", __func__); ++ return ret; ++ } ++ /* Copy result without dummy bytes into buf and advance address counter respectively. */ ++ memcpy(buf + addr, tmp + 4, chunk - 4); ++ addr += chunk - 4; ++ } ++ return 0; ++} ++ ++/* Returns 0 when ready, 1 on errors and timeouts. */ ++static int at45db_wait_ready (struct flashctx *flash, unsigned int us, unsigned int retries) ++{ ++ while (true) { ++ uint8_t status; ++ int ret = at45db_read_status_register(flash, &status); ++ if ((status & AT45DB_READY) == AT45DB_READY) ++ return 0; ++ if (ret != 0 || retries-- == 0) ++ return 1; ++ programmer_delay(us); ++ } ++} ++ ++static int at45db_erase(struct flashctx *flash, uint8_t opcode, unsigned int at45db_addr, unsigned int stepsize, unsigned int retries) ++{ ++ const uint8_t cmd[] = { ++ opcode, ++ (at45db_addr >> 16) & 0xff, ++ (at45db_addr >> 8) & 0xff, ++ (at45db_addr >> 0) & 0xff ++ }; ++ ++ /* Send erase command. */ ++ int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); ++ if (ret != 0) { ++ msg_cerr("%s: error sending erase command!\n", __func__); ++ return ret; ++ } ++ ++ /* Wait for completion. */ ++ ret = at45db_wait_ready(flash, stepsize, retries); ++ if (ret != 0) ++ msg_cerr("%s: chip did not became ready again after sending the erase command!\n", __func__); ++ ++ return ret; ++} ++ ++int spi_erase_at45db_page(struct flashctx *flash, unsigned int addr, unsigned int blocklen) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ const unsigned int total_size = flash->chip->total_size * 1024; ++ ++ if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { ++ msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); ++ return 1; ++ } ++ ++ if ((addr + blocklen) > total_size) { ++ msg_cerr("%s: tried to erase a block beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", ++ __func__, addr, blocklen, total_size); ++ return 1; ++ } ++ ++ /* Needs typically about 35 ms for completion, so let's wait 100 ms in 500 us steps. */ ++ return at45db_erase(flash, AT45DB_PAGE_ERASE, at45db_convert_addr(addr, page_size), 500, 200); ++} ++ ++int spi_erase_at45db_block(struct flashctx *flash, unsigned int addr, unsigned int blocklen) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ const unsigned int total_size = flash->chip->total_size * 1024; ++ ++ if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { // FIXME: should check blocks not pages ++ msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); ++ return 1; ++ } ++ ++ if ((addr + blocklen) > total_size) { ++ msg_cerr("%s: tried to erase a block beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", ++ __func__, addr, blocklen, total_size); ++ return 1; ++ } ++ ++ /* Needs typically between 20 and 100 ms for completion, so let's wait 300 ms in 1 ms steps. */ ++ return at45db_erase(flash, AT45DB_BLOCK_ERASE, at45db_convert_addr(addr, page_size), 1000, 300); ++} ++ ++int spi_erase_at45db_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ const unsigned int total_size = flash->chip->total_size * 1024; ++ ++ if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { // FIXME: should check sectors not pages ++ msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); ++ return 1; ++ } ++ ++ if ((addr + blocklen) > total_size) { ++ msg_cerr("%s: tried to erase a sector beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", ++ __func__, addr, blocklen, total_size); ++ return 1; ++ } ++ ++ /* Needs typically about 5 s for completion, so let's wait 20 seconds in 200 ms steps. */ ++ return at45db_erase(flash, AT45DB_SECTOR_ERASE, at45db_convert_addr(addr, page_size), 200000, 100); ++} ++ ++int spi_erase_at45db_chip(struct flashctx *flash, unsigned int addr, unsigned int blocklen) ++{ ++ const unsigned int total_size = flash->chip->total_size * 1024; ++ ++ if ((addr + blocklen) > total_size) { ++ msg_cerr("%s: tried to erase beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", ++ __func__, addr, blocklen, total_size); ++ return 1; ++ } ++ ++ /* Needs typically from about 5 to over 60 s for completion, so let's wait 100 s in 500 ms steps. ++ * NB: the address is not a real address but a magic number. This hack allows to share code. */ ++ return at45db_erase(flash, AT45DB_CHIP_ERASE, AT45DB_CHIP_ERASE_ADDR, 500000, 200); ++} ++ ++/* This one is really special and works only for AT45CS1282. It uses two different opcodes depending on the ++ * address and has an asymmetric layout. */ ++int spi_erase_at45cs_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ const unsigned int total_size = flash->chip->total_size * 1024; ++ const struct block_eraser be = flash->chip->block_erasers[0]; ++ const unsigned int sec_0a_top = be.eraseblocks[0].size; ++ const unsigned int sec_0b_top = be.eraseblocks[0].size + be.eraseblocks[1].size; ++ ++ if ((addr + blocklen) > total_size) { ++ msg_cerr("%s: tried to erase a sector beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", ++ __func__, addr, blocklen, total_size); ++ return 1; ++ } ++ ++ bool partial_range = false; ++ uint8_t opcode = 0x7C; /* Used for all but sector 0a. */ ++ if (addr < sec_0a_top) { ++ opcode = 0x50; ++ /* One single sector of 8 pages at address 0. */ ++ if (addr != 0 || blocklen != (8 * page_size)) ++ partial_range = true; ++ } else if (addr < sec_0b_top) { ++ /* One single sector of 248 pages adjacent to the first. */ ++ if (addr != sec_0a_top || blocklen != (248 * page_size)) ++ partial_range = true; ++ } else { ++ /* The rest is filled by 63 aligned sectors of 256 pages. */ ++ if ((addr % (256 * page_size)) != 0 || (blocklen % (256 * page_size)) != 0) ++ partial_range = true; ++ } ++ if (partial_range) { ++ msg_cerr("%s: cannot erase partial sectors: addr=%u, blocklen=%u\n", __func__, addr, blocklen); ++ return 1; ++ } ++ ++ /* Needs up to 4 s for completion, so let's wait 20 seconds in 200 ms steps. */ ++ return at45db_erase(flash, opcode, at45db_convert_addr(addr, page_size), 200000, 100); ++} ++ ++static int at45db_fill_buffer1(struct flashctx *flash, uint8_t *bytes, unsigned int off, unsigned int len) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ if ((off + len) > page_size) { ++ msg_cerr("Tried to write %u bytes at offset %u into a buffer of only %u B.\n", ++ len, off, page_size); ++ return 1; ++ } ++ ++ /* Create a suitable buffer to store opcode, address and data chunks for buffer1. */ ++ const unsigned int max_data_write = flash->pgm->spi.max_data_write; ++ const unsigned int max_chunk = (max_data_write > 0 && max_data_write <= page_size) ? ++ max_data_write : page_size; ++ uint8_t buf[4 + max_chunk]; ++ ++ buf[0] = AT45DB_BUFFER1_WRITE; ++ while (off < page_size) { ++ unsigned int cur_chunk = min(max_chunk, page_size - off); ++ buf[1] = (off >> 16) & 0xff; ++ buf[2] = (off >> 8) & 0xff; ++ buf[3] = (off >> 0) & 0xff; ++ memcpy(&buf[4], bytes + off, cur_chunk); ++ int ret = spi_send_command(flash, 4 + cur_chunk, 0, buf, NULL); ++ if (ret != 0) { ++ msg_cerr("%s: error sending buffer write!\n", __func__); ++ return ret; ++ } ++ off += cur_chunk; ++ } ++ return 0; ++} ++ ++static int at45db_commit_buffer1(struct flashctx *flash, unsigned int at45db_addr) ++{ ++ const uint8_t cmd[] = { ++ AT45DB_BUFFER1_PAGE_PROGRAM, ++ (at45db_addr >> 16) & 0xff, ++ (at45db_addr >> 8) & 0xff, ++ (at45db_addr >> 0) & 0xff ++ }; ++ ++ /* Send buffer to device. */ ++ int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); ++ if (ret != 0) { ++ msg_cerr("%s: error sending buffer to main memory command!\n", __func__); ++ return ret; ++ } ++ ++ /* Wait for completion (typically a few ms). */ ++ ret = at45db_wait_ready(flash, 250, 200); // 50 ms ++ if (ret != 0) { ++ msg_cerr("%s: chip did not became ready again!\n", __func__); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int at45db_program_page(struct flashctx *flash, uint8_t *buf, unsigned int at45db_addr) ++{ ++ int ret = at45db_fill_buffer1(flash, buf, 0, flash->chip->page_size); ++ if (ret != 0) { ++ msg_cerr("%s: filling the buffer failed!\n", __func__); ++ return ret; ++ } ++ ++ ret = at45db_commit_buffer1(flash, at45db_addr); ++ if (ret != 0) { ++ msg_cerr("%s: committing page failed!\n", __func__); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++int spi_write_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) ++{ ++ const unsigned int page_size = flash->chip->page_size; ++ const unsigned int total_size = flash->chip->total_size; ++ ++ if ((start % page_size) != 0 || (len % page_size) != 0) { ++ msg_cerr("%s: cannot write partial pages: start=%u, len=%u\n", __func__, start, len); ++ return 1; ++ } ++ ++ if ((start + len) > (total_size * 1024)) { ++ msg_cerr("%s: tried to write beyond flash boundary: start=%u, len=%u, size=%u\n", ++ __func__, start, len, total_size); ++ return 1; ++ } ++ ++ unsigned int i; ++ for (i = 0; i < len; i += page_size) { ++ if (at45db_program_page(flash, buf + i, at45db_convert_addr(start + i, page_size)) != 0) { ++ msg_cerr("Writing page %u failed!\n", i); ++ return 1; ++ } ++ } ++ return 0; ++} +diff --git a/atahpt.c b/atahpt.c +index f8be8c4..242e14a 100644 +--- a/atahpt.c ++++ b/atahpt.c +@@ -69,6 +69,8 @@ int atahpt_init(void) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_4); ++ if (!io_base_addr) ++ return 1; + + /* Enable flash access. */ + reg32 = pci_read_long(dev, REG_FLASH_ACCESS); +diff --git a/board_enable.c b/board_enable.c +index 074cabb..e2a5fe2 100644 +--- a/board_enable.c ++++ b/board_enable.c +@@ -1488,6 +1488,7 @@ static int intel_ich_gpio_set(int gpio, int raise) + {0x24D0, 0x58, 0x1BFF0000, 0x00030305, 0}, /* 82801EB/ER (ICH5/ICH5R) */ + {0x2640, 0x48, 0x1BFF0000, 0x00030307, 0}, /* 82801FB/FR (ICH6/ICH6R) */ + {0x2641, 0x48, 0x1BFF0000, 0x00030307, 0}, /* 82801FBM (ICH6M) */ ++ {0x27B0, 0x48, 0xFFFFFFFF, 0x000300FF, 0}, /* 82801GDH (ICH7 DH) */ + {0x27B8, 0x48, 0xFFFFFFFF, 0x000300FF, 0}, /* 82801GB/GR (ICH7 Family) */ + {0x27B9, 0x48, 0xFFEBFFFE, 0x000300FE, 0}, /* 82801GBM (ICH7-M) */ + {0x27BD, 0x48, 0xFFEBFFFE, 0x000300FE, 0}, /* 82801GHM (ICH7-M DH) */ +@@ -1665,6 +1666,7 @@ static int intel_ich_gpio_set(int gpio, int raise) + * - abit IP35 Pro: Intel P35 + ICH9R + * - ASUS P5LD2 + * - ASUS P5LD2-VM ++ * - ASUS P5LD2-VM DH + */ + static int intel_ich_gpio16_raise(void) + { +@@ -2266,13 +2268,13 @@ static int p2_whitelist_laptop(void) + * NOTE: Please add boards that _don't_ need such enables or don't work yet + * to the respective tables in print.c. Thanks! + * +- * We use 2 sets of IDs here, you're free to choose which is which. This ++ * We use 2 sets of PCI IDs here, you're free to choose which is which. This + * is to provide a very high degree of certainty when matching a board on + * the basis of subsystem/card IDs. As not every vendor handles + * subsystem/card IDs in a sane manner. + * + * Keep the second set NULLed if it should be ignored. Keep the subsystem IDs +- * NULLed if they don't identify the board fully and if you can't use DMI. ++ * and the dmi identifier NULLed if they don't identify the board fully to disable autodetection. + * But please take care to provide an as complete set of pci ids as possible; + * autodetection is the preferred behaviour and we would like to make sure that + * matches are unique. +@@ -2306,6 +2308,7 @@ const struct board_match board_matches[] = { + #if defined(__i386__) || defined(__x86_64__) + {0x10DE, 0x0547, 0x147B, 0x1C2F, 0x10DE, 0x0548, 0x147B, 0x1C2F, NULL, NULL, NULL, P3, "abit", "AN-M2", 0, NT, nvidia_mcp_gpio2_raise}, + {0x1106, 0x0282, 0x147B, 0x1415, 0x1106, 0x3227, 0x147B, 0x1415, "^AV8 ", NULL, NULL, P3, "abit", "AV8", 0, OK, board_abit_av8}, ++ {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, NULL /* "^I440BX-W977$" */, "abit", "bf6", P3, "abit", "BF6", 0, OK, intel_piix4_gpo26_lower}, + {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^i440BX-W977 (BM6)$", NULL, NULL, P3, "abit", "BM6", 0, OK, intel_piix4_gpo26_lower}, + {0x8086, 0x24d3, 0x147b, 0x1014, 0x8086, 0x2578, 0x147b, 0x1014, NULL, NULL, NULL, P3, "abit", "IC7", 0, NT, intel_ich_gpio23_raise}, + {0x8086, 0x2930, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, P3, "abit", "IP35", 0, OK, intel_ich_gpio16_raise}, +@@ -2330,6 +2333,7 @@ const struct board_match board_matches[] = { + {0x8086, 0x2570, 0x1849, 0x2570, 0x8086, 0x24d3, 0x1849, 0x24d0, NULL, NULL, NULL, P3, "ASRock", "775i65G", 0, OK, intel_ich_gpio23_raise}, + {0x10DE, 0x0060, 0x1043, 0x80AD, 0x10DE, 0x01E0, 0x1043, 0x80C0, NULL, NULL, NULL, P3, "ASUS", "A7N8X-VM/400", 0, OK, it8712f_gpio12_raise}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, P3, "ASUS", "A7V600-X", 0, OK, it8712f_gpio31_raise}, ++ {0x1106, 0x3177, 0x1043, 0x80F9, 0x1106, 0x3205, 0x1043, 0x80F9, NULL, NULL, NULL, P3, "ASUS", "A7V8X-MX", 0, OK, w836xx_memw_enable_2e}, + {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, P3, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, P3, "ASUS", "A7V8X", 0, OK, it8703f_gpio51_raise}, + {0x1106, 0x3099, 0x1043, 0x807F, 0x1106, 0x3147, 0x1043, 0x808C, NULL, NULL, NULL, P3, "ASUS", "A7V333", 0, OK, it8703f_gpio51_raise}, +@@ -2372,12 +2376,14 @@ const struct board_match board_matches[] = { + {0x8086, 0x27b8, 0x1043, 0x2a22, 0x8086, 0x2770, 0x1043, 0x2a22, "^P5LP-LE$", NULL, NULL, P3, "ASUS", "P5LP-LE (Epson OEM)", 0, OK, intel_ich_gpio34_raise}, + {0x8086, 0x27da, 0x1043, 0x8179, 0x8086, 0x27b8, 0x1043, 0x8179, "^P5LD2$", NULL, NULL, P3, "ASUS", "P5LD2", 0, NT, intel_ich_gpio16_raise}, + {0x8086, 0x27da, 0x1043, 0x8179, 0x8086, 0x27b8, 0x1043, 0x8179, "^P5LD2-VM$", NULL, NULL, P3, "ASUS", "P5LD2-VM", 0, NT, intel_ich_gpio16_raise}, ++ {0x8086, 0x27b0, 0x1043, 0x8179, 0x8086, 0x2770, 0x1043, 0x817a, "^P5LD2-VM DH$", NULL, NULL, P3, "ASUS", "P5LD2-VM DH", 0, OK, intel_ich_gpio16_raise}, + {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, P3, "ASUS", "P5ND2-SLI Deluxe", 0, OK, nvidia_mcp_gpio10_raise}, + {0x10DE, 0x0260, 0x1043, 0x81BC, 0x10DE, 0x026C, 0x1043, 0x829E, "^P5N-D$", NULL, NULL, P3, "ASUS", "P5N-D", 0, OK, it8718f_gpio63_raise}, + {0x10DE, 0x0260, 0x1043, 0x81BC, 0x10DE, 0x026C, 0x1043, 0x8249, "^P5N-E SLI$",NULL, NULL, P3, "ASUS", "P5N-E SLI", 0, NT, it8718f_gpio63_raise}, + {0x8086, 0x24dd, 0x1043, 0x80a6, 0x8086, 0x2570, 0x1043, 0x8157, NULL, NULL, NULL, P3, "ASUS", "P5PE-VM", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x2443, 0x1043, 0x8027, 0x8086, 0x1130, 0x1043, 0x8027, "^CUSL2-C", NULL, NULL, P3, "ASUS", "CUSL2-C", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x2443, 0x1043, 0x8027, 0x8086, 0x1130, 0x1043, 0x8027, "^TUSL2-C", NULL, NULL, P3, "ASUS", "TUSL2-C", 0, NT, intel_ich_gpio21_raise}, ++ {0x1106, 0x3059, 0x1106, 0x4161, 0x1106, 0x3065, 0x1106, 0x0102, NULL, NULL, NULL, P3, "Bcom/Clientron", "WinNET P680", 0, OK, w836xx_memw_enable_2e}, + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3116, 0x1106, 0x3116, "^KM266-8235$", "biostar", "m7viq", P3, "Biostar", "M7VIQ", 0, NT, w83697xx_memw_enable_2e}, + {0x10b7, 0x9055, 0x1028, 0x0082, 0x8086, 0x7190, 0, 0, NULL, NULL, NULL, P3, "Dell", "OptiPlex GX1", 0, OK, intel_piix4_gpo30_lower}, + {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, P3, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise}, +@@ -2452,6 +2458,12 @@ const struct board_match board_matches[] = { + {0x1106, 0x0259, 0x1106, 0xAA07, 0x1106, 0x3227, 0x1106, 0xAA07, NULL, NULL, NULL, P3, "VIA", "EPIA EK", 0, NT, via_vt823x_gpio9_raise}, + {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, P3, "VIA", "EPIA M/MII/...", 0, OK, via_vt823x_gpio15_raise}, + {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, P3, "VIA", "EPIA-N/NL", 0, OK, via_vt823x_gpio9_raise}, ++#ifdef DELL_AVOTON_SUPPORT ++ {0x8086, 0x1f38, 0x8086, 0x7270, 0, 0, 0, 0, NULL, NULL, NULL, P2, "DELL", "AVOTON", 0, OK, p2_not_a_laptop}, ++#endif ++#if DELL_DENVERTON_SUPPORT == 1 ++ {0x8086, 0x19dc, 0x8086, 0x7270, 0, 0, 0, 0, NULL, NULL, NULL, P2, "DELL", "DENVERTON", 0, OK, p2_not_a_laptop}, ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + #endif + { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, P3, NULL, NULL, 0, NT, NULL}, /* end marker */ + }; +@@ -2559,6 +2571,7 @@ const static struct board_match *board_match_pci_ids(enum board_match_phase phas + } + } + ++#if defined(__i386__) || defined(__x86_64__) + if (board->dmi_pattern) { + if (!has_dmi_support) { + msg_pwarn("Warning: Can't autodetect %s %s, DMI info unavailable.\n", +@@ -2571,7 +2584,7 @@ const static struct board_match *board_match_pci_ids(enum board_match_phase phas + continue; + } + } +- ++#endif // defined(__i386__) || defined(__x86_64__) + return board; + } + +diff --git a/buspirate_spi.c b/buspirate_spi.c +index 9d229f4..f0e84bc 100644 +--- a/buspirate_spi.c ++++ b/buspirate_spi.c +@@ -250,6 +250,7 @@ int buspirate_spi_init(void) + if (!bp_commbuf) { + bp_commbufsize = 0; + msg_perr("Out of memory!\n"); ++ free(dev); + return ERROR_OOM; + } + bp_commbufsize = DEFAULT_BUFSIZE; +@@ -263,8 +264,12 @@ int buspirate_spi_init(void) + return ret; + } + +- if (register_shutdown(buspirate_spi_shutdown, NULL)) ++ if (register_shutdown(buspirate_spi_shutdown, NULL) != 0) { ++ bp_commbufsize = 0; ++ free(bp_commbuf); ++ bp_commbuf = NULL; + return 1; ++ } + + /* This is the brute force version, but it should work. + * It is likely to fail if a previous flashrom run was aborted during a write with the new SPI commands +diff --git a/cbtable.c b/cbtable.c +index e262a84..c100bbb 100644 +--- a/cbtable.c ++++ b/cbtable.c +@@ -261,7 +261,7 @@ int cb_parse_table(const char **vendor, const char **model) + #else + start = 0x0; + #endif +- table_area = physmap_try_ro("low megabyte", start, BYTES_TO_MAP - start); ++ table_area = physmap_ro_unaligned("low megabyte", start, BYTES_TO_MAP - start); + if (ERROR_PTR == table_area) { + msg_perr("Failed getting access to coreboot low tables.\n"); + return -1; +@@ -276,8 +276,9 @@ int cb_parse_table(const char **vendor, const char **model) + if (forward->tag == LB_TAG_FORWARD) { + start = forward->forward; + start &= ~(getpagesize() - 1); +- physunmap(table_area, BYTES_TO_MAP); +- table_area = physmap_try_ro("high tables", start, BYTES_TO_MAP); ++ physunmap_unaligned(table_area, BYTES_TO_MAP); ++ // FIXME: table_area is never unmapped below, nor is it unmapped above in the no-forward case ++ table_area = physmap_ro_unaligned("high tables", start, BYTES_TO_MAP); + if (ERROR_PTR == table_area) { + msg_perr("Failed getting access to coreboot high tables.\n"); + return -1; +diff --git a/chipdrivers.h b/chipdrivers.h +index 091d14c..851e90a 100644 +--- a/chipdrivers.h ++++ b/chipdrivers.h +@@ -64,6 +64,7 @@ int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, + /* spi25_statusreg.c */ + uint8_t spi_read_status_register(struct flashctx *flash); + int spi_write_status_register(struct flashctx *flash, int status); ++void spi_prettyprint_status_register_bit(uint8_t status, int bit); + int spi_prettyprint_status_register_plain(struct flashctx *flash); + int spi_prettyprint_status_register_default_welwip(struct flashctx *flash); + int spi_prettyprint_status_register_default_bp1(struct flashctx *flash); +@@ -109,6 +110,19 @@ int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsign + int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); + int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen); + ++/* at45db.c */ ++int probe_spi_at45db(struct flashctx *flash); ++int spi_prettyprint_status_register_at45db(struct flashctx *flash); ++int spi_disable_blockprotect_at45db(struct flashctx *flash); ++int spi_read_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); ++int spi_read_at45db_e8(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); ++int spi_write_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); ++int spi_erase_at45db_page(struct flashctx *flash, unsigned int addr, unsigned int blocklen); ++int spi_erase_at45db_block(struct flashctx *flash, unsigned int addr, unsigned int blocklen); ++int spi_erase_at45db_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen); ++int spi_erase_at45db_chip(struct flashctx *flash, unsigned int addr, unsigned int blocklen); ++int spi_erase_at45cs_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen); ++ + /* 82802ab.c */ + uint8_t wait_82802ab(struct flashctx *flash); + int probe_82802ab(struct flashctx *flash); +@@ -179,9 +193,10 @@ int printlock_at49f(struct flashctx *flash); + /* w29ee011.c */ + int probe_w29ee011(struct flashctx *flash); + +-/* stm50flw0x0x.c */ +-int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int block, unsigned int blocksize); +-int unlock_stm50flw0x0x(struct flashctx *flash); ++/* stm50.c */ ++int erase_sector_stm50(struct flashctx *flash, unsigned int block, unsigned int blocksize); ++int unlock_stm50_uniform(struct flashctx *flash); ++int unlock_stm50_nonuniform(struct flashctx *flash); + + /* en29lv640b.c */ + int probe_en29lv640b(struct flashctx *flash); +diff --git a/chipset_enable.c b/chipset_enable.c +index a2df263..8a8ab66 100644 +--- a/chipset_enable.c ++++ b/chipset_enable.c +@@ -41,6 +41,17 @@ + + #if defined(__i386__) || defined(__x86_64__) + ++#if DELL_AVOTON_SUPPORT == 1 ++uint8_t is_avoton = 0; ++#endif /* DELL_AVOTON_SUPPORT == 1 */ ++ ++#if DELL_DENVERTON_SUPPORT == 1 ++uint8_t is_dnv = 0; ++uint32_t dnv_bios_region_start = 0x00; ++uint32_t dnv_bios_region_size = 0x00; ++uint32_t dnv_bios_region_limit = 0x00; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + static int enable_flash_ali_m1533(struct pci_dev *dev, const char *name) + { + uint8_t tmp; +@@ -260,20 +271,44 @@ static int enable_flash_piix4(struct pci_dev *dev, const char *name) + return 0; + } + +-/* +- * See ie. page 375 of "Intel I/O Controller Hub 7 (ICH7) Family Datasheet" +- * http://download.intel.com/design/chipsets/datashts/30701303.pdf +- */ +-static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_cntl) ++/* Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, in Poulsbo, Tunnel Creek and other Atom ++ * chipsets/SoCs it is even 32b, but just treating it as 8 bit wide seems to work fine in practice. */ ++static int enable_flash_ich_bios_cntl(struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) + { + uint8_t old, new, wanted; + +- /* +- * Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, in Tunnel Creek it is even 32b, but +- * just treating it as 8 bit wide seems to work fine in practice. +- */ +- wanted = old = pci_read_byte(dev, bios_cntl); ++ switch (ich_generation) { ++ case CHIPSET_ICH_UNKNOWN: ++ return ERROR_FATAL; ++ /* Non-SPI-capable */ ++ case CHIPSET_ICH: ++ case CHIPSET_ICH2345: ++ break; ++ /* Atom chipsets are special: The second byte of BIOS_CNTL (D9h) contains a prefetch bit similar to what ++ * other SPI-capable chipsets have at DCh. ++ * The Tunnel Creek datasheet contains a lot of details about the SPI controller, among other things it ++ * mentions that the prefetching and caching does only happen for direct memory reads. ++ * Therefore - at least for Tunnel Creek - it should not matter to flashrom because we use the ++ * programmed access only and not memory mapping. */ ++ case CHIPSET_TUNNEL_CREEK: ++ case CHIPSET_POULSBO: ++ case CHIPSET_CENTERTON: ++ old = pci_read_byte(dev, bios_cntl + 1); ++ msg_pdbg("BIOS Prefetch Enable: %sabled, ", (old & 1) ? "en" : "dis"); ++ break; ++ case CHIPSET_ICH7: ++ default: /* Future version might behave the same */ ++ old = (pci_read_byte(dev, bios_cntl) >> 2) & 0x3; ++ msg_pdbg("SPI Read Configuration: "); ++ if (old == 3) ++ msg_pdbg("invalid prefetching/caching settings, "); ++ else ++ msg_pdbg("prefetching %sabled, caching %sabled, ", ++ (old & 0x2) ? "en" : "dis", ++ (old & 0x1) ? "dis" : "en"); ++ } + ++ wanted = old = pci_read_byte(dev, bios_cntl); + /* + * Quote from the 6 Series datasheet (Document Number: 324645-004): + * "Bit 5: SMM BIOS Write Protect Disable (SMM_BWP) +@@ -283,11 +318,23 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_ + * + * Try to unset it in any case. + * It won't hurt and makes sense in some cases according to Stefan Reinauer. ++ * ++ * At least in Centerton aforementioned bit is located at bit 7. It is unspecified in all other Atom ++ * and Desktop chipsets before Ibex Peak/5 Series, but we reset bit 5 anyway. + */ +- wanted &= ~(1 << 5); ++ int smm_bwp_bit; ++ if (ich_generation == CHIPSET_CENTERTON) ++ smm_bwp_bit = 7; ++ else ++ smm_bwp_bit = 5; ++ wanted &= ~(1 << smm_bwp_bit); + +- /* Set BIOS Write Enable */ +- wanted |= (1 << 0); ++ /* Tunnel Creek has a cache disable at bit 2 of the lowest BIOS_CNTL byte. */ ++ if (ich_generation == CHIPSET_TUNNEL_CREEK) ++ wanted |= (1 << 2); ++ ++ wanted |= (1 << 0); /* Set BIOS Write Enable */ ++ wanted &= ~(1 << 1); /* Disable lock (futile) */ + + /* Only write the register if it's necessary */ + if (wanted != old) { +@@ -299,64 +346,79 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_ + msg_pdbg("\nBIOS_CNTL = 0x%02x: ", new); + msg_pdbg("BIOS Lock Enable: %sabled, ", (new & (1 << 1)) ? "en" : "dis"); + msg_pdbg("BIOS Write Enable: %sabled\n", (new & (1 << 0)) ? "en" : "dis"); +- if (new & (1 << 5)) ++ if (new & (1 << smm_bwp_bit)) + msg_pwarn("Warning: BIOS region SMM protection is enabled!\n"); + +- + if (new != wanted) +- msg_pwarn("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n" +- "New value is 0x%02x.\n", bios_cntl, old, wanted, name, new); ++ msg_pwarn("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x failed.\n" ++ "New value is 0x%02x.\n", bios_cntl, old, wanted, new); + +- /* Return an error if we could not set the write enable */ ++ /* Return an error if we could not set the write enable only. */ + if (!(new & (1 << 0))) + return -1; + + return 0; + } + +-static int enable_flash_ich_4e(struct pci_dev *dev, const char *name) ++static int enable_flash_ich_fwh_decode(struct pci_dev *dev, enum ich_chipset ich_generation) + { +- /* +- * Note: ICH5 has registers similar to FWH_SEL1, FWH_SEL2 and +- * FWH_DEC_EN1, but they are called FB_SEL1, FB_SEL2, FB_DEC_EN1 and +- * FB_DEC_EN2. +- */ +- internal_buses_supported = BUS_FWH; +- return enable_flash_ich(dev, name, 0x4e); +-} +- +-static int enable_flash_ich_dc(struct pci_dev *dev, const char *name) +-{ +- uint32_t fwh_conf; +- int i, tmp; +- char *idsel = NULL; +- int max_decode_fwh_idsel = 0, max_decode_fwh_decode = 0; +- int contiguous = 1; ++ uint8_t fwh_sel1 = 0, fwh_sel2 = 0, fwh_dec_en_lo = 0, fwh_dec_en_hi = 0; /* silence compilers */ ++ bool implemented = 0; ++ switch (ich_generation) { ++ case CHIPSET_ICH: ++ /* FIXME: Unlike later chipsets, ICH and ICH-0 do only support mapping of the top-most 4MB ++ * and therefore do only feature FWH_DEC_EN (E3h, different default too) and FWH_SEL (E8h). */ ++ break; ++ case CHIPSET_ICH2345: ++ fwh_sel1 = 0xe8; ++ fwh_sel2 = 0xee; ++ fwh_dec_en_lo = 0xf0; ++ fwh_dec_en_hi = 0xe3; ++ implemented = 1; ++ break; ++ case CHIPSET_POULSBO: ++ case CHIPSET_TUNNEL_CREEK: ++ /* FIXME: Similar to ICH and ICH-0, Tunnel Creek and Poulsbo do only feature one register each, ++ * FWH_DEC_EN (D7h) and FWH_SEL (D0h). */ ++ break; ++ case CHIPSET_CENTERTON: ++ /* FIXME: Similar to above FWH_DEC_EN (D4h) and FWH_SEL (D0h). */ ++ break; ++ case CHIPSET_ICH6: ++ case CHIPSET_ICH7: ++ default: /* Future version might behave the same */ ++ fwh_sel1 = 0xd0; ++ fwh_sel2 = 0xd4; ++ fwh_dec_en_lo = 0xd8; ++ fwh_dec_en_hi = 0xd9; ++ implemented = 1; ++ break; ++ } + +- idsel = extract_programmer_param("fwh_idsel"); ++ char *idsel = extract_programmer_param("fwh_idsel"); + if (idsel && strlen(idsel)) { +- uint64_t fwh_idsel_old, fwh_idsel; ++ if (!implemented) { ++ msg_perr("Error: fwh_idsel= specified, but (yet) unsupported on this chipset.\n"); ++ goto idsel_garbage_out; ++ } + errno = 0; + /* Base 16, nothing else makes sense. */ +- fwh_idsel = (uint64_t)strtoull(idsel, NULL, 16); ++ uint64_t fwh_idsel = (uint64_t)strtoull(idsel, NULL, 16); + if (errno) { +- msg_perr("Error: fwh_idsel= specified, but value could " +- "not be converted.\n"); ++ msg_perr("Error: fwh_idsel= specified, but value could not be converted.\n"); + goto idsel_garbage_out; + } + if (fwh_idsel & 0xffff000000000000ULL) { +- msg_perr("Error: fwh_idsel= specified, but value had " +- "unused bits set.\n"); ++ msg_perr("Error: fwh_idsel= specified, but value had unused bits set.\n"); + goto idsel_garbage_out; + } +- fwh_idsel_old = pci_read_long(dev, 0xd0); ++ uint64_t fwh_idsel_old = pci_read_long(dev, fwh_sel1); + fwh_idsel_old <<= 16; +- fwh_idsel_old |= pci_read_word(dev, 0xd4); +- msg_pdbg("\nSetting IDSEL from 0x%012" PRIx64 " to " +- "0x%012" PRIx64 " for top 16 MB.", fwh_idsel_old, +- fwh_idsel); +- rpci_write_long(dev, 0xd0, (fwh_idsel >> 16) & 0xffffffff); +- rpci_write_word(dev, 0xd4, fwh_idsel & 0xffff); ++ fwh_idsel_old |= pci_read_word(dev, fwh_sel2); ++ msg_pdbg("\nSetting IDSEL from 0x%012" PRIx64 " to 0x%012" PRIx64 " for top 16 MB.", ++ fwh_idsel_old, fwh_idsel); ++ rpci_write_long(dev, fwh_sel1, (fwh_idsel >> 16) & 0xffffffff); ++ rpci_write_word(dev, fwh_sel2, fwh_idsel & 0xffff); + /* FIXME: Decode settings are not changed. */ + } else if (idsel) { + msg_perr("Error: fwh_idsel= specified, but no value given.\n"); +@@ -366,15 +428,23 @@ idsel_garbage_out: + } + free(idsel); + ++ if (!implemented) { ++ msg_pdbg2("FWH IDSEL handling is not implemented on this chipset."); ++ return 0; ++ } ++ + /* Ignore all legacy ranges below 1 MB. + * We currently only support flashing the chip which responds to + * IDSEL=0. To support IDSEL!=0, flashbase and decode size calculations + * have to be adjusted. + */ ++ int max_decode_fwh_idsel = 0, max_decode_fwh_decode = 0; ++ bool contiguous = 1; ++ uint32_t fwh_conf = pci_read_long(dev, fwh_sel1); ++ int i; + /* FWH_SEL1 */ +- fwh_conf = pci_read_long(dev, 0xd0); + for (i = 7; i >= 0; i--) { +- tmp = (fwh_conf >> (i * 4)) & 0xf; ++ int tmp = (fwh_conf >> (i * 4)) & 0xf; + msg_pdbg("\n0x%08x/0x%08x FWH IDSEL: 0x%x", + (0x1ff8 + i) * 0x80000, + (0x1ff0 + i) * 0x80000, +@@ -386,9 +456,9 @@ idsel_garbage_out: + } + } + /* FWH_SEL2 */ +- fwh_conf = pci_read_word(dev, 0xd4); ++ fwh_conf = pci_read_word(dev, fwh_sel2); + for (i = 3; i >= 0; i--) { +- tmp = (fwh_conf >> (i * 4)) & 0xf; ++ int tmp = (fwh_conf >> (i * 4)) & 0xf; + msg_pdbg("\n0x%08x/0x%08x FWH IDSEL: 0x%x", + (0xff4 + i) * 0x100000, + (0xff0 + i) * 0x100000, +@@ -401,9 +471,11 @@ idsel_garbage_out: + } + contiguous = 1; + /* FWH_DEC_EN1 */ +- fwh_conf = pci_read_word(dev, 0xd8); ++ fwh_conf = pci_read_byte(dev, fwh_dec_en_hi); ++ fwh_conf <<= 8; ++ fwh_conf |= pci_read_byte(dev, fwh_dec_en_lo); + for (i = 7; i >= 0; i--) { +- tmp = (fwh_conf >> (i + 0x8)) & 0x1; ++ int tmp = (fwh_conf >> (i + 0x8)) & 0x1; + msg_pdbg("\n0x%08x/0x%08x FWH decode %sabled", + (0x1ff8 + i) * 0x80000, + (0x1ff0 + i) * 0x80000, +@@ -415,7 +487,7 @@ idsel_garbage_out: + } + } + for (i = 3; i >= 0; i--) { +- tmp = (fwh_conf >> i) & 0x1; ++ int tmp = (fwh_conf >> i) & 0x1; + msg_pdbg("\n0x%08x/0x%08x FWH decode %sabled", + (0xff4 + i) * 0x100000, + (0xff0 + i) * 0x100000, +@@ -429,99 +501,66 @@ idsel_garbage_out: + max_rom_decode.fwh = min(max_decode_fwh_idsel, max_decode_fwh_decode); + msg_pdbg("\nMaximum FWH chip size: 0x%x bytes", max_rom_decode.fwh); + +- /* If we're called by enable_flash_ich_dc_spi, it will override +- * internal_buses_supported anyway. +- */ +- internal_buses_supported = BUS_FWH; +- return enable_flash_ich(dev, name, 0xdc); ++ return 0; + } + +-static int enable_flash_poulsbo(struct pci_dev *dev, const char *name) ++static int enable_flash_ich_fwh(struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) + { +- uint16_t old, new; + int err; + +- if ((err = enable_flash_ich(dev, name, 0xd8)) != 0) ++ /* Configure FWH IDSEL decoder maps. */ ++ if ((err = enable_flash_ich_fwh_decode(dev, ich_generation)) != 0) + return err; + +- old = pci_read_byte(dev, 0xd9); +- msg_pdbg("BIOS Prefetch Enable: %sabled, ", +- (old & 1) ? "en" : "dis"); +- new = old & ~1; +- +- if (new != old) +- rpci_write_byte(dev, 0xd9, new); +- + internal_buses_supported = BUS_FWH; +- return 0; ++ return enable_flash_ich_bios_cntl(dev, ich_generation, bios_cntl); + } + +-static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name) ++static int enable_flash_ich0(struct pci_dev *dev, const char *name) + { +- uint16_t old, new; +- uint32_t tmp, bnt; +- void *rcrb; +- int ret; +- +- /* Enable Flash Writes */ +- ret = enable_flash_ich(dev, name, 0xd8); +- if (ret == ERROR_FATAL) +- return ret; +- +- /* Make sure BIOS prefetch mechanism is disabled */ +- old = pci_read_byte(dev, 0xd9); +- msg_pdbg("BIOS Prefetch Enable: %sabled, ", (old & 1) ? "en" : "dis"); +- new = old & ~1; +- if (new != old) +- rpci_write_byte(dev, 0xd9, new); +- +- /* Get physical address of Root Complex Register Block */ +- tmp = pci_read_long(dev, 0xf0) & 0xffffc000; +- msg_pdbg("\nRoot Complex Register Block address = 0x%x\n", tmp); +- +- /* Map RCBA to virtual memory */ +- rcrb = physmap("ICH RCRB", tmp, 0x4000); +- +- /* Test Boot BIOS Strap Status */ +- bnt = mmio_readl(rcrb + 0x3410); +- if (bnt & 0x02) { +- /* If strapped to LPC, no SPI initialization is required */ +- internal_buses_supported = BUS_FWH; +- return 0; +- } ++ return enable_flash_ich_fwh(dev, CHIPSET_ICH, 0x4e); ++} + +- /* This adds BUS_SPI */ +- if (ich_init_spi(dev, tmp, rcrb, 7) != 0) { +- if (!ret) +- ret = ERROR_NONFATAL; +- } ++static int enable_flash_ich2345(struct pci_dev *dev, const char *name) ++{ ++ return enable_flash_ich_fwh(dev, CHIPSET_ICH2345, 0x4e); ++} + +- return ret; ++static int enable_flash_ich6(struct pci_dev *dev, const char *name) ++{ ++ return enable_flash_ich_fwh(dev, CHIPSET_ICH6, 0xdc); + } + +-static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, +- enum ich_chipset ich_generation) ++static int enable_flash_poulsbo(struct pci_dev *dev, const char *name) + { +- int ret, ret_spi; +- uint8_t bbs, buc; +- uint32_t tmp, gcs; +- void *rcrb; +- const char *const *straps_names; ++ return enable_flash_ich_fwh(dev, CHIPSET_POULSBO, 0xd8); ++} + ++static int enable_flash_ich_spi(struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) ++{ + static const char *const straps_names_EP80579[] = { "SPI", "reserved", "reserved", "LPC" }; + static const char *const straps_names_ich7_nm10[] = { "reserved", "SPI", "PCI", "LPC" }; ++ static const char *const straps_names_tunnel_creek[] = { "SPI", "LPC" }; + static const char *const straps_names_ich8910[] = { "SPI", "SPI", "PCI", "LPC" }; + static const char *const straps_names_pch567[] = { "LPC", "reserved", "PCI", "SPI" }; + static const char *const straps_names_pch8[] = { "LPC", "reserved", "reserved", "SPI" }; +- static const char *const straps_names_pch8_lp[] = { "SPI", "LPC", "unknown", "unknown" }; ++ static const char *const straps_names_pch8_lp[] = { "SPI", "LPC" }; + static const char *const straps_names_unknown[] = { "unknown", "unknown", "unknown", "unknown" }; ++#ifdef DELL_AVOTON_SUPPORT ++ static const char *const straps_names_avoton[] = { "LPC", "reserved", "reserved", "SPI" }; ++ uint32_t tmp; ++ int ret_fwh = 0; ++ uint32_t new, old; ++ void *spibar; ++#endif + ++ const char *const *straps_names; + switch (ich_generation) { + case CHIPSET_ICH7: + /* EP80579 may need further changes, but this is the least + * intrusive way to get correct BOOT Strap printing without + * changing the rest of its code path). */ +- if (strcmp(name, "EP80579") == 0) ++ if (dev->device_id == 0x5031) + straps_names = straps_names_EP80579; + else + straps_names = straps_names_ich7_nm10; +@@ -531,6 +570,9 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, + case CHIPSET_ICH10: + straps_names = straps_names_ich8910; + break; ++ case CHIPSET_TUNNEL_CREEK: ++ straps_names = straps_names_tunnel_creek; ++ break; + case CHIPSET_5_SERIES_IBEX_PEAK: + case CHIPSET_6_SERIES_COUGAR_POINT: + case CHIPSET_7_SERIES_PANTHER_POINT: +@@ -543,33 +585,41 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, + straps_names = straps_names_pch8_lp; + break; + case CHIPSET_8_SERIES_WELLSBURG: // FIXME: check datasheet ++ case CHIPSET_CENTERTON: // FIXME: Datasheet does not mention GCS at all + straps_names = straps_names_unknown; + break; ++#ifdef DELL_AVOTON_SUPPORT ++ case CHIPSET_AVOTON: ++ straps_names = straps_names_avoton; ++ break; ++#endif + default: +- msg_gerr("%s: unknown ICH generation. Please report!\n", +- __func__); ++ msg_gerr("%s: unknown ICH generation. Please report!\n", __func__); + straps_names = straps_names_unknown; + break; + } + +- /* Enable Flash Writes */ +- ret = enable_flash_ich_dc(dev, name); +- if (ret == ERROR_FATAL) +- return ret; +- + /* Get physical address of Root Complex Register Block */ +- tmp = pci_read_long(dev, 0xf0) & 0xffffc000; +- msg_pdbg("Root Complex Register Block address = 0x%x\n", tmp); ++ uint32_t rcra = pci_read_long(dev, 0xf0) & 0xffffc000; ++ msg_pdbg("Root Complex Register Block address = 0x%x\n", rcra); + + /* Map RCBA to virtual memory */ +- rcrb = physmap("ICH RCRB", tmp, 0x4000); ++ void *rcrb = rphysmap("ICH RCRB", rcra, 0x4000); ++ if (rcrb == ERROR_PTR) ++ return ERROR_FATAL; + +- gcs = mmio_readl(rcrb + 0x3410); ++#ifdef DELL_AVOTON_SUPPORT ++ if (ich_generation != CHIPSET_AVOTON) { ++#endif ++ uint32_t gcs = mmio_readl(rcrb + 0x3410); + msg_pdbg("GCS = 0x%x: ", gcs); +- msg_pdbg("BIOS Interface Lock-Down: %sabled, ", +- (gcs & 0x1) ? "en" : "dis"); ++ msg_pdbg("BIOS Interface Lock-Down: %sabled, ", (gcs & 0x1) ? "en" : "dis"); + ++ uint8_t bbs; + switch (ich_generation) { ++ case CHIPSET_TUNNEL_CREEK: ++ bbs = (gcs >> 1) & 0x1; ++ break; + case CHIPSET_8_SERIES_LYNX_POINT_LP: + case CHIPSET_8_SERIES_WELLSBURG: // FIXME: check datasheet + /* Lynx Point LP uses a single bit for GCS */ +@@ -582,91 +632,187 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, + } + msg_pdbg("Boot BIOS Straps: 0x%x (%s)\n", bbs, straps_names[bbs]); + +- buc = mmio_readb(rcrb + 0x3414); +- msg_pdbg("Top Swap : %s\n", +- (buc & 1) ? "enabled (A16 inverted)" : "not enabled"); ++ if (ich_generation != CHIPSET_TUNNEL_CREEK && ich_generation != CHIPSET_CENTERTON) { ++ uint8_t buc = mmio_readb(rcrb + 0x3414); ++ msg_pdbg("Top Swap : %s\n", (buc & 1) ? "enabled (A16(+) inverted)" : "not enabled"); ++ } + +- /* It seems the ICH7 does not support SPI and LPC chips at the same +- * time. At least not with our current code. So we prevent searching +- * on ICH7 when the southbridge is strapped to LPC +- */ +- internal_buses_supported = BUS_FWH; +- if (ich_generation == CHIPSET_ICH7) { +- if (bbs == 0x03) { +- /* If strapped to LPC, no further SPI initialization is +- * required. */ +- return ret; +- } else { +- /* Disable LPC/FWH if strapped to PCI or SPI */ +- internal_buses_supported = BUS_NONE; +- } ++ /* Handle FWH-related parameters and initialization */ ++#ifdef DELL_AVOTON_SUPPORT ++ ret_fwh = enable_flash_ich_fwh(dev, ich_generation, bios_cntl); ++#else ++ int ret_fwh = enable_flash_ich_fwh(dev, ich_generation, bios_cntl); ++#endif ++ if (ret_fwh == ERROR_FATAL) ++ return ret_fwh; ++ ++ /* SPIBAR is at RCRB+0x3020 for ICH[78], Tunnel Creek and Centerton, and RCRB+0x3800 for ICH9. */ ++ uint16_t spibar_offset; ++ switch (ich_generation) { ++ case CHIPSET_ICH_UNKNOWN: ++ return ERROR_FATAL; ++ case CHIPSET_ICH7: ++ case CHIPSET_ICH8: ++ case CHIPSET_TUNNEL_CREEK: ++ case CHIPSET_CENTERTON: ++ spibar_offset = 0x3020; ++ break; ++ case CHIPSET_ICH9: ++ default: /* Future version might behave the same */ ++ spibar_offset = 0x3800; ++ break; + } ++ msg_pdbg("SPIBAR = 0x%0*" PRIxPTR " + 0x%04x\n", PRIxPTR_WIDTH, (uintptr_t)rcrb, spibar_offset); ++#ifndef DELL_AVOTON_SUPPORT ++ void *spibar = rcrb + spibar_offset; ++#else ++ spibar = rcrb + spibar_offset; ++ } else { ++ tmp = pci_read_long(dev, 0x54) & 0xFFFFFE00; ++ spibar = rphysmap("ICH SPIBAR", tmp, 0x4000); ++ msg_pdbg("SPIBAR = 0x%x\n", tmp); ++ ++ /* BIOS Control Register */ ++ tmp = mmio_readl(spibar + bios_cntl); ++ msg_pdbg("0xFC: 0x%08x (BIOS_CONTROL_REGISTER_BIOS : BCR)\n", tmp); ++ msg_pdbg("BIOS Write Protect Disable : %sabled, \n", ++ (tmp & (1 << 0)) ? "en" : "dis"); ++ msg_pdbg("\nBIOS Lock Enable: %sabled, \n", ++ (tmp & (1 << 1)) ? "en" : "dis"); ++ if (tmp != 1) { ++ mmio_writel(0x1, (spibar + bios_cntl)); ++ } ++ tmp = mmio_readl(spibar + bios_cntl); ++ msg_pdbg("0xFC: 0x%08x (BIOS_CONTROL_REGISTER_BIOS : BCR)\n", tmp); ++ msg_pdbg("BIOS Write Protect Disable : %sabled, \n", ++ (tmp & (1 << 0)) ? "en" : "dis"); ++ if (tmp != 1) { ++ msg_perr("Reboot and change BIOS-> IntelRCSetup -> Relax Security Config -> Disabled to Enabled\n"); ++ return ERROR_FATAL; /* Signal error */ ++ } ++ old = mmio_readb(spibar + 0xFC); ++ msg_pdbg("SPI Read Configuration: \n"); ++ new = (old >> 2) & 0x3; ++ switch (new) { ++ case 0: ++ case 1: ++ case 2: ++ msg_pdbg("prefetching %sabled, caching %sabled, \n", ++ (new & 0x2) ? "en" : "dis", ++ (new & 0x1) ? "dis" : "en"); ++ break; ++ default: ++ msg_pdbg("invalid prefetching/caching settings, \n"); ++ break; ++ } ++ } ++#endif ++ + + /* This adds BUS_SPI */ +- ret_spi = ich_init_spi(dev, tmp, rcrb, ich_generation); ++ int ret_spi = ich_init_spi(dev, spibar, ich_generation); + if (ret_spi == ERROR_FATAL) + return ret_spi; + +- if (ret || ret_spi) +- ret = ERROR_NONFATAL; ++ if (ret_fwh || ret_spi) ++ return ERROR_NONFATAL; + +- return ret; ++ return 0; ++} ++ ++static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name) ++{ ++ return enable_flash_ich_spi(dev, CHIPSET_TUNNEL_CREEK, 0xd8); ++} ++ ++static int enable_flash_s12x0(struct pci_dev *dev, const char *name) ++{ ++ return enable_flash_ich_spi(dev, CHIPSET_CENTERTON, 0xd8); + } + + static int enable_flash_ich7(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_ICH7); ++ return enable_flash_ich_spi(dev, CHIPSET_ICH7, 0xdc); + } + + static int enable_flash_ich8(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_ICH8); ++ return enable_flash_ich_spi(dev, CHIPSET_ICH8, 0xdc); + } + + static int enable_flash_ich9(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_ICH9); ++ return enable_flash_ich_spi(dev, CHIPSET_ICH9, 0xdc); + } + + static int enable_flash_ich10(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_ICH10); ++ return enable_flash_ich_spi(dev, CHIPSET_ICH10, 0xdc); + } + ++#ifdef DELL_AVOTON_SUPPORT ++static int enable_flash_c2000(struct pci_dev *dev, const char *name) ++{ ++ is_avoton = 1; ++ return enable_flash_ich_spi(dev, CHIPSET_AVOTON, 0xfc); ++} ++#endif ++ ++#if DELL_DENVERTON_SUPPORT == 1 ++static int enable_flash_denverton(struct pci_dev *dev, const char *name) ++{ ++ void *spibar; ++ int32_t ret_spi; ++ uint32_t sbase; ++ enum ich_chipset ich_generation = CHIPSET_DENVERTON; ++ ++ is_dnv = 1; ++ internal_buses_supported = BUS_FWH; ++ ++ /* GET physical address of SPI Base Address and map it */ ++ sbase = pci_read_long(dev, 0x10) & 0xfffffe00; ++ msg_pdbg("SPI_BASE_ADDRESS = 0x%x\n", sbase); ++ spibar = rphysmap("DENVERTON SBASE", sbase, 512); ++ enable_flash_ich_bios_cntl(dev, ich_generation, 0xdc); ++ ret_spi = ich_init_spi(dev, spibar, ich_generation); ++ return ret_spi; ++} ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + /* Ibex Peak aka. 5 series & 3400 series */ + static int enable_flash_pch5(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_5_SERIES_IBEX_PEAK); ++ return enable_flash_ich_spi(dev, CHIPSET_5_SERIES_IBEX_PEAK, 0xdc); + } + + /* Cougar Point aka. 6 series & c200 series */ + static int enable_flash_pch6(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_6_SERIES_COUGAR_POINT); ++ return enable_flash_ich_spi(dev, CHIPSET_6_SERIES_COUGAR_POINT, 0xdc); + } + + /* Panther Point aka. 7 series */ + static int enable_flash_pch7(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_7_SERIES_PANTHER_POINT); ++ return enable_flash_ich_spi(dev, CHIPSET_7_SERIES_PANTHER_POINT, 0xdc); + } + + /* Lynx Point aka. 8 series */ + static int enable_flash_pch8(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_8_SERIES_LYNX_POINT); ++ return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_LYNX_POINT, 0xdc); + } + +-/* Lynx Point aka. 8 series low-power */ ++/* Lynx Point LP aka. 8 series low-power */ + static int enable_flash_pch8_lp(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_8_SERIES_LYNX_POINT_LP); ++ return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_LYNX_POINT_LP, 0xdc); + } + + /* Wellsburg (for Haswell-EP Xeons) */ + static int enable_flash_pch8_wb(struct pci_dev *dev, const char *name) + { +- return enable_flash_ich_dc_spi(dev, name, CHIPSET_8_SERIES_WELLSBURG); ++ return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_WELLSBURG, 0xdc); + } + + static int via_no_byte_merge(struct pci_dev *dev, const char *name) +@@ -737,10 +883,8 @@ static int enable_flash_vt_vx(struct pci_dev *dev, const char *name) + case 0x8410: /* VX900 */ + mmio_base = pci_read_long(dev, 0xbc) << 8; + mmio_base_physmapped = physmap("VIA VX MMIO register", mmio_base, SPI_CNTL_LEN); +- if (mmio_base_physmapped == ERROR_PTR) { +- physunmap(mmio_base_physmapped, SPI_CNTL_LEN); ++ if (mmio_base_physmapped == ERROR_PTR) + return ERROR_FATAL; +- } + + /* Offset 0 - Bit 0 holds SPI Bus0 Enable Bit. */ + spi_cntl = mmio_readl(mmio_base_physmapped) + 0x00; +@@ -882,22 +1026,29 @@ static int enable_flash_sc1100(struct pci_dev *dev, const char *name) + return 0; + } + +-/* Works for AMD-8111, VIA VT82C586A/B, VIA VT82C686A/B. */ +-static int enable_flash_amd8111(struct pci_dev *dev, const char *name) ++/* Works for AMD-768, AMD-8111, VIA VT82C586A/B, VIA VT82C596, VIA VT82C686A/B. ++ * ++ * ROM decode control register matrix ++ * AMD-768 AMD-8111 VT82C586A/B VT82C596 VT82C686A/B ++ * 7 FFC0_0000h–FFFF_FFFFh <- FFFE0000h-FFFEFFFFh <- <- ++ * 6 FFB0_0000h–FFBF_FFFFh <- FFF80000h-FFFDFFFFh <- <- ++ * 5 00E8... <- <- FFF00000h-FFF7FFFFh <- ++ */ ++static int enable_flash_amd_via(struct pci_dev *dev, const char *name, uint8_t decode_val) + { + #define AMD_MAPREG 0x43 + #define AMD_ENREG 0x40 + uint8_t old, new; + +- /* Enable decoding at 0xffb00000 to 0xffffffff. */ + old = pci_read_byte(dev, AMD_MAPREG); +- new = old | 0xC0; ++ new = old | decode_val; + if (new != old) { + rpci_write_byte(dev, AMD_MAPREG, new); + if (pci_read_byte(dev, AMD_MAPREG) != new) { +- msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", ++ msg_pwarn("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", + AMD_MAPREG, new, name); +- } ++ } else ++ msg_pdbg("Changed ROM decode range to 0x%02x successfully.\n", new); + } + + /* Enable 'ROM write' bit. */ +@@ -908,14 +1059,37 @@ static int enable_flash_amd8111(struct pci_dev *dev, const char *name) + rpci_write_byte(dev, AMD_ENREG, new); + + if (pci_read_byte(dev, AMD_ENREG) != new) { +- msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", ++ msg_pwarn("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", + AMD_ENREG, new, name); +- return -1; ++ return ERROR_NONFATAL; + } ++ msg_pdbg2("Set ROM enable bit successfully.\n"); + + return 0; + } + ++static int enable_flash_amd_768_8111(struct pci_dev *dev, const char *name) ++{ ++ /* Enable decoding of 0xFFB00000 to 0xFFFFFFFF (5 MB). */ ++ max_rom_decode.lpc = 5 * 1024 * 1024; ++ return enable_flash_amd_via(dev, name, 0xC0); ++} ++ ++static int enable_flash_vt82c586(struct pci_dev *dev, const char *name) ++{ ++ /* Enable decoding of 0xFFF80000 to 0xFFFFFFFF. (512 kB) */ ++ max_rom_decode.parallel = 512 * 1024; ++ return enable_flash_amd_via(dev, name, 0xC0); ++} ++ ++/* Works for VT82C686A/B too. */ ++static int enable_flash_vt82c596(struct pci_dev *dev, const char *name) ++{ ++ /* Enable decoding of 0xFFF80000 to 0xFFFFFFFF. (1 MB) */ ++ max_rom_decode.parallel = 1024 * 1024; ++ return enable_flash_amd_via(dev, name, 0xE0); ++} ++ + static int enable_flash_sb600(struct pci_dev *dev, const char *name) + { + uint32_t prot; +@@ -1257,6 +1431,8 @@ static int get_flashbase_sc520(struct pci_dev *dev, const char *name) + + /* 1. Map MMCR */ + mmcr = physmap("Elan SC520 MMCR", 0xfffef000, getpagesize()); ++ if (mmcr == ERROR_PTR) ++ return ERROR_FATAL; + + /* 2. Scan PAR0 (0x88) - PAR15 (0xc4) for + * BOOTCS region (PARx[31:29] = 100b)e +@@ -1302,8 +1478,8 @@ const struct penable chipset_enables[] = { + {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, +- {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111}, +- {0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111}, ++ {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd_768_8111}, ++ {0x1022, 0x7468, OK, "AMD", "AMD-8111", enable_flash_amd_768_8111}, + {0x1022, 0x780e, OK, "AMD", "FCH", enable_flash_sb600}, + {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, + {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, +@@ -1388,9 +1564,9 @@ const struct penable chipset_enables[] = { + {0x1106, 0x0691, OK, "VIA", "VT82C69x", via_no_byte_merge}, + {0x1106, 0x8601, NT, "VIA", "VT8601T", via_no_byte_merge}, + /* VIA southbridges */ +- {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, +- {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, +- {0x1106, 0x0686, OK, "VIA", "VT82C686A/B", enable_flash_amd8111}, ++ {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_vt82c586}, ++ {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_vt82c596}, ++ {0x1106, 0x0686, OK, "VIA", "VT82C686A/B", enable_flash_vt82c596}, + {0x1106, 0x3074, OK, "VIA", "VT8233", enable_flash_vt823x}, + {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, + {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, +@@ -1405,6 +1581,7 @@ const struct penable chipset_enables[] = { + {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, + {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, + {0x17f3, 0x6030, OK, "RDC", "R8610/R3210", enable_flash_rdc_r8610}, ++ {0x8086, 0x0c60, NT, "Intel", "S12x0", enable_flash_s12x0}, + {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, + {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, + {0x8086, 0x1c44, OK, "Intel", "Z68", enable_flash_pch6}, +@@ -1441,21 +1618,21 @@ const struct penable chipset_enables[] = { + {0x8086, 0x1e5f, NT, "Intel", "NM70", enable_flash_pch7}, + {0x8086, 0x2310, NT, "Intel", "DH89xxCC", enable_flash_pch7}, + {0x8086, 0x2390, NT, "Intel", "Coleto Creek", enable_flash_pch7}, +- {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, +- {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, +- {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, +- {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, +- {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich_4e}, +- {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, +- {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, +- {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, +- {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, +- {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, +- {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, +- {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, +- {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, +- {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich_dc}, +- {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, ++ {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich0}, ++ {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich0}, ++ {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich2345}, ++ {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich2345}, ++ {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich2345}, ++ {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich2345}, ++ {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich2345}, ++ {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich2345}, ++ {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich2345}, ++ {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich2345}, ++ {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich2345}, ++ {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich6}, ++ {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich6}, ++ {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich6}, ++ {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich6}, + {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, + {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, + {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, +@@ -1570,6 +1747,12 @@ const struct penable chipset_enables[] = { + {0x8086, 0x8d5d, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d5e, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, + {0x8086, 0x8d5f, NT, "Intel", "Wellsburg", enable_flash_pch8_wb}, ++#ifdef DELL_AVOTON_SUPPORT ++ {0x8086, 0x1f38, OK, "Intel", "C2000", enable_flash_c2000}, ++#endif ++#if DELL_DENVERTON_SUPPORT == 1 ++ {0x8086, 0x19e0, OK, "Intel", "Denverton", enable_flash_denverton}, ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + #endif + {0}, + }; +@@ -1597,14 +1780,23 @@ int chipset_flash_enable(void) + chipset_enables[i].device_name); + continue; + } ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("Found chipset \"%s %s\"", ++ chipset_enables[i].vendor_name, ++ chipset_enables[i].device_name); ++#else + msg_pinfo("Found chipset \"%s %s\"", + chipset_enables[i].vendor_name, + chipset_enables[i].device_name); ++#endif + msg_pdbg(" with PCI ID %04x:%04x", + chipset_enables[i].vendor_id, + chipset_enables[i].device_id); ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg(". "); ++#else + msg_pinfo(". "); +- ++#endif + if (chipset_enables[i].status == NT) { + msg_pinfo("\nThis chipset is marked as untested. If " + "you are using an up-to-date version\nof " +@@ -1614,20 +1806,44 @@ int chipset_flash_enable(void) + "flashrom@flashrom.org including a verbose " + "(-V) log.\nThank you!\n"); + } ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("Enabling flash write... "); ++#else + msg_pinfo("Enabling flash write... "); ++#endif + ret = chipset_enables[i].doit(dev, + chipset_enables[i].device_name); + if (ret == NOT_DONE_YET) { + ret = -2; ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("OK - searching further chips.\n"); ++#else + msg_pinfo("OK - searching further chips.\n"); ++#endif + } else if (ret < 0) ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("FAILED!\n"); ++#else + msg_pinfo("FAILED!\n"); ++#endif + else if (ret == 0) ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("OK.\n"); ++#else + msg_pinfo("OK.\n"); ++#endif + else if (ret == ERROR_NONFATAL) ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("PROBLEMS, continuing anyway\n"); ++#else + msg_pinfo("PROBLEMS, continuing anyway\n"); ++#endif + if (ret == ERROR_FATAL) { ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("FATAL ERROR!\n"); ++#else + msg_perr("FATAL ERROR!\n"); ++#endif + return ret; + } + } +diff --git a/cli_classic.c b/cli_classic.c +index 4c71d07..09565f4 100644 +--- a/cli_classic.c ++++ b/cli_classic.c +@@ -31,6 +31,10 @@ + #include "flashchips.h" + #include "programmer.h" + ++#if DELL_DENVERTON_SUPPORT == 1 ++extern int8_t is_dnv; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + static void cli_classic_usage(const char *name) + { + printf("Please note that the command line interface for flashrom has changed between\n" +@@ -136,9 +140,10 @@ int main(int argc, char *argv[]) + char *tempstr = NULL; + char *pparam = NULL; + ++#ifndef FORCE10_SPI_CHANGE + print_version(); + print_banner(); +- ++#endif + if (selfcheck()) + exit(1); + +@@ -221,8 +226,6 @@ int main(int argc, char *argv[]) + free(tempstr); + cli_classic_abort_usage(); + } +- /* FIXME: A pointer to the image name is saved in a static array (of size MAX_ROMLAYOUT) +- * by register_include_arg() and needs to be freed after processing them. */ + break; + case 'L': + if (++operation_specified > 1) { +@@ -295,6 +298,9 @@ int main(int argc, char *argv[]) + "specified. Aborting.\n"); + cli_classic_abort_usage(); + } ++#ifdef FORCE10_SPI_CHANGE ++ print_version(); ++#endif + exit(0); + break; + case 'h': +@@ -372,6 +378,12 @@ int main(int argc, char *argv[]) + ret = 1; + goto out; + } ++ if (layoutfile != NULL && !write_it) { ++ msg_gerr("Layout files are currently supported for write operations only.\n"); ++ ret = 1; ++ goto out; ++ } ++ + if (process_include_args()) { + ret = 1; + goto out; +@@ -393,8 +405,13 @@ int main(int argc, char *argv[]) + if (prog == PROGRAMMER_INVALID) { + if (CONFIG_DEFAULT_PROGRAMMER != PROGRAMMER_INVALID) { + prog = CONFIG_DEFAULT_PROGRAMMER; ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("Using default programmer \"%s\".\n", ++ programmer_table[CONFIG_DEFAULT_PROGRAMMER].name); ++#else + msg_pinfo("Using default programmer \"%s\".\n", + programmer_table[CONFIG_DEFAULT_PROGRAMMER].name); ++#endif + } else { + msg_perr("Please select a programmer with the --programmer parameter.\n" + "Previously this was not necessary because there was a default set.\n" +@@ -489,6 +506,10 @@ int main(int argc, char *argv[]) + tempstr = flashbuses_to_text(flashes[0].chip->bustype); + msg_gdbg("Found %s flash chip \"%s\" (%d kB, %s).\n", + flashes[0].chip->vendor, flashes[0].chip->name, flashes[0].chip->total_size, tempstr); ++ if ((flashes[0].chip->total_size > flashes[0].bios_size) && (flashes[0].bios_size != 0)) { ++ msg_gdbg("BIOS Size in flash chip: %d kB\n", flashes[0].bios_size); ++ flashes[0].chip->total_size = flashes[0].bios_size; ++ } + free(tempstr); + } + +@@ -517,7 +538,19 @@ int main(int argc, char *argv[]) + * Give the chip time to settle. + */ + programmer_delay(100000); ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ dnv_smi_open_res(); ++ dnv_smi_doit(0, NULL, SMI_ENABLE_SPI); ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + ret |= doit(fill_flash, force, filename, read_it, write_it, erase_it, verify_it); ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ dnv_smi_doit(0, NULL, SMI_DISABLE_SPI); ++ dnv_smi_release_res(); ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + /* Note: doit() already calls programmer_shutdown(). */ + goto out; + +@@ -527,6 +560,7 @@ out: + for (i = 0; i < chipcount; i++) + free(flashes[i].chip); + ++ layout_cleanup(); + free(filename); + free(layoutfile); + free(pparam); +diff --git a/dmi.c b/dmi.c +index 242889f..25ddd93 100644 +--- a/dmi.c ++++ b/dmi.c +@@ -1,7 +1,10 @@ + /* + * This file is part of the flashrom project. + * ++ * Copyright (C) 2000-2002 Alan Cox ++ * Copyright (C) 2002-2010 Jean Delvare + * Copyright (C) 2009,2010 Michael Karcher ++ * Copyright (C) 2011-2013 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by +@@ -26,33 +29,28 @@ + #include "flash.h" + #include "programmer.h" + +-int has_dmi_support = 0; +- +-#if STANDALONE ++#if defined(__i386__) || defined(__x86_64__) + +-/* Stub to indicate missing DMI functionality. +- * has_dmi_support is 0 by default, so nothing to do here. +- * Because dmidecode is not available on all systems, the goal is to implement +- * the DMI subset we need directly in this file. +- */ +-void dmi_init(void) +-{ +-} ++/* Enable SMBIOS decoding. Currently legacy DMI decoding is enough. */ ++#define SM_SUPPORT 0 + +-int dmi_match(const char *pattern) +-{ +- return 0; +-} ++/* Strings longer than 4096 in DMI are just insane. */ ++#define DMI_MAX_ANSWER_LEN 4096 + +-#else /* STANDALONE */ ++int has_dmi_support = 0; + +-static const char *dmidecode_names[] = { +- "system-manufacturer", +- "system-product-name", +- "system-version", +- "baseboard-manufacturer", +- "baseboard-product-name", +- "baseboard-version", ++static struct { ++ const char *const keyword; ++ const uint8_t type; ++ const uint8_t offset; ++ char *value; ++} dmi_strings[] = { ++ { "system-manufacturer", 1, 0x04, NULL }, ++ { "system-product-name", 1, 0x05, NULL }, ++ { "system-version", 1, 0x06, NULL }, ++ { "baseboard-manufacturer", 2, 0x04, NULL }, ++ { "baseboard-product-name", 2, 0x05, NULL }, ++ { "baseboard-version", 2, 0x06, NULL }, + }; + + /* This list is used to identify supposed laptops. The is_laptop field has the +@@ -66,9 +64,9 @@ static const char *dmidecode_names[] = { + * The types below are the most common ones. + */ + static const struct { +- unsigned char type; +- unsigned char is_laptop; +- const char *name; ++ uint8_t type; ++ uint8_t is_laptop; ++ char *name; + } dmi_chassis_types[] = { + {0x01, 2, "Other"}, + {0x02, 2, "Unknown"}, +@@ -86,20 +84,206 @@ static const struct { + {0x18, 0, "Sealed-case PC"}, /* used by Supermicro (X8SIE) */ + }; + +-#define DMI_COMMAND_LEN_MAX 260 +-static const char *dmidecode_command = "dmidecode"; ++#if CONFIG_INTERNAL_DMI == 1 ++#if defined(__DJGPP__) || defined(FORCE10_SPI_CHANGE) /* There is no strnlen in DJGPP. FIXME: Move this to a common utility file. */ ++size_t strnlen(const char *str, size_t n) ++{ ++ size_t i; ++ for (i = 0; i < n && str[i] != '\0'; i++) ++ ; ++ return i; ++} ++#endif + +-static char *dmistrings[ARRAY_SIZE(dmidecode_names)]; ++static bool dmi_checksum(const uint8_t * const buf, size_t len) ++{ ++ uint8_t sum = 0; ++ size_t a; + +-/* Strings longer than 4096 in DMI are just insane. */ +-#define DMI_MAX_ANSWER_LEN 4096 ++ for (a = 0; a < len; a++) ++ sum += buf[a]; ++ return (sum == 0); ++} ++ ++static char *dmi_string(uint8_t *buf, uint8_t string_id, uint8_t *limit) ++{ ++ size_t i, len; ++ ++ if (string_id == 0) ++ return "Not Specified"; ++ ++ while (string_id > 1 && string_id--) { ++ if (buf > limit) { ++ msg_perr("DMI table is broken (string portion out of bounds)!\n"); ++ return ""; ++ } ++ buf += strnlen((char *)buf, limit - buf) + 1; ++ } ++ ++ if (!*buf) /* as long as the current byte we're on isn't null */ ++ return ""; ++ ++ len = strnlen((char *)buf, limit - buf); ++ if (len > DMI_MAX_ANSWER_LEN) ++ len = DMI_MAX_ANSWER_LEN; ++ ++ /* fix junk bytes in the string */ ++ for (i = 0; i < len && buf[i] != '\0'; i++) ++ if (buf[i] < 32 || buf[i] >= 127) ++ buf[i] = ' '; ++ ++ return (char *)buf; ++} ++ ++static void dmi_chassis_type(uint8_t code) ++{ ++ int i; ++ code &= 0x7f; /* bits 6:0 are chassis type, 7th bit is the lock bit */ ++ is_laptop = 2; ++ for (i = 0; i < ARRAY_SIZE(dmi_chassis_types); i++) { ++ if (code == dmi_chassis_types[i].type) { ++ msg_pdbg("DMI string chassis-type: \"%s\"\n", dmi_chassis_types[i].name); ++ is_laptop = dmi_chassis_types[i].is_laptop; ++ break; ++ } ++ } ++} ++ ++static void dmi_table(uint32_t base, uint16_t len, uint16_t num) ++{ ++ int i = 0, j = 0; ++ ++ uint8_t *dmi_table_mem = physmap_ro("DMI Table", base, len); ++ if (dmi_table_mem == NULL) { ++ msg_perr("Unable to access DMI Table\n"); ++ return; ++ } ++ ++ uint8_t *data = dmi_table_mem; ++ uint8_t *limit = dmi_table_mem + len; ++ ++ /* SMBIOS structure header is always 4 B long and contains: ++ * - uint8_t type; // see dmi_chassis_types's type ++ * - uint8_t length; // data section w/ header w/o strings ++ * - uint16_t handle; ++ */ ++ while (i < num && data + 4 <= limit) { ++ /* - If a short entry is found (less than 4 bytes), not only it ++ * is invalid, but we cannot reliably locate the next entry. ++ * - If the length value indicates that this structure spreads ++ * accross the table border, something is fishy too. ++ * Better stop at this point, and let the user know his/her ++ * table is broken. ++ */ ++ if (data[1] < 4 || data + data[1] > limit) { ++ msg_perr("DMI table is broken (bogus header)!\n"); ++ break; ++ } ++ ++ if(data[0] == 3) { ++ if (data + 5 <= limit) ++ dmi_chassis_type(data[5]); ++ /* else the table is broken, but laptop detection is optional, hence continue. */ ++ } else ++ for (j = 0; j < ARRAY_SIZE(dmi_strings); j++) { ++ uint8_t offset = dmi_strings[j].offset; ++ uint8_t type = dmi_strings[j].type; ++ ++ if (data[0] != type) ++ continue; ++ ++ if (data[1] <= offset || data+offset > limit) { ++ msg_perr("DMI table is broken (offset out of bounds)!\n"); ++ goto out; ++ } ++ ++ /* Table will be unmapped, hence fill the struct with duplicated strings. */ ++ dmi_strings[j].value = strdup(dmi_string(data + data[1], data[offset], limit)); ++ } ++ /* Find next structure by skipping data and string sections */ ++ data += data[1]; ++ while (data + 1 <= limit) { ++ if (data[0] == 0 && data[1] == 0) ++ break; ++ data++; ++ } ++ data += 2; ++ i++; ++ } ++out: ++ physunmap(dmi_table_mem, len); ++} ++ ++#if SM_SUPPORT ++static int smbios_decode(uint8_t *buf) ++{ ++ /* TODO: other checks mentioned in the conformance guidelines? */ ++ if (!dmi_checksum(buf, buf[0x05]) || ++ (memcmp(buf + 0x10, "_DMI_", 5) != 0) || ++ !dmi_checksum(buf + 0x10, 0x0F)) ++ return 0; ++ ++ dmi_table(mmio_readl(buf + 0x18), mmio_readw(buf + 0x16), mmio_readw(buf + 0x1C)); ++ ++ return 1; ++} ++#endif ++ ++static int legacy_decode(uint8_t *buf) ++{ ++ if (!dmi_checksum(buf, 0x0F)) ++ return 1; ++ ++ dmi_table(mmio_readl(buf + 0x08), mmio_readw(buf + 0x06), mmio_readw(buf + 0x0C)); ++ ++ return 0; ++} ++ ++int dmi_fill(void) ++{ ++ size_t fp; ++ uint8_t *dmi_mem; ++ int ret = 1; ++ ++ msg_pdbg("Using Internal DMI decoder.\n"); ++ /* There are two ways specified to gain access to the SMBIOS table: ++ * - EFI's configuration table contains a pointer to the SMBIOS table. On linux it can be obtained from ++ * sysfs. EFI's SMBIOS GUID is: {0xeb9d2d31,0x2d88,0x11d3,0x9a,0x16,0x0,0x90,0x27,0x3f,0xc1,0x4d} ++ * - Scanning physical memory address range 0x000F0000h to 0x000FFFFF for the anchor-string(s). */ ++ dmi_mem = physmap_ro("DMI", 0xF0000, 0x10000); ++ if (dmi_mem == ERROR_PTR) ++ return ret; ++ ++ for (fp = 0; fp <= 0xFFF0; fp += 16) { ++#if SM_SUPPORT ++ if (memcmp(dmi_mem + fp, "_SM_", 4) == 0 && fp <= 0xFFE0) { ++ if (smbios_decode(dmi_mem + fp)) // FIXME: length check ++ goto out; ++ } else ++#endif ++ if (memcmp(dmi_mem + fp, "_DMI_", 5) == 0) ++ if (legacy_decode(dmi_mem + fp) == 0) { ++ ret = 0; ++ goto out; ++ } ++ } ++ msg_pinfo("No DMI table found.\n"); ++out: ++ physunmap(dmi_mem, 0x10000); ++ return ret; ++} ++ ++#else /* CONFIG_INTERNAL_DMI */ ++ ++#define DMI_COMMAND_LEN_MAX 300 ++static const char *dmidecode_command = "dmidecode"; + + static char *get_dmi_string(const char *string_name) + { + FILE *dmidecode_pipe; + char *result; +- char answerbuf[DMI_MAX_ANSWER_LEN]; +- char commandline[DMI_COMMAND_LEN_MAX + 40]; ++ char answerbuf[DMI_MAX_ANSWER_LEN + 1] = {'\0'}; ++ char commandline[DMI_COMMAND_LEN_MAX + 1] = {'\0'}; + + snprintf(commandline, sizeof(commandline), + "%s -s %s", dmidecode_command, string_name); +@@ -138,46 +322,31 @@ static char *get_dmi_string(const char *string_name) + /* Chomp trailing newline. */ + if (answerbuf[0] != 0 && answerbuf[strlen(answerbuf) - 1] == '\n') + answerbuf[strlen(answerbuf) - 1] = 0; +- msg_pdbg("DMI string %s: \"%s\"\n", string_name, answerbuf); + + result = strdup(answerbuf); +- if (!result) ++ if (result == NULL) + msg_pwarn("Warning: Out of memory - DMI support fails"); + + return result; + } + +-static int dmi_shutdown(void *data) +-{ +- int i; +- for (i = 0; i < ARRAY_SIZE(dmistrings); i++) { +- free(dmistrings[i]); +- dmistrings[i] = NULL; +- } +- return 0; +-} +- +-void dmi_init(void) ++int dmi_fill(void) + { + int i; + char *chassis_type; + +- if (register_shutdown(dmi_shutdown, NULL)) +- return; +- +- has_dmi_support = 1; +- for (i = 0; i < ARRAY_SIZE(dmidecode_names); i++) { +- dmistrings[i] = get_dmi_string(dmidecode_names[i]); +- if (!dmistrings[i]) { +- has_dmi_support = 0; +- return; +- } ++ msg_pdbg("Using External DMI decoder.\n"); ++ for (i = 0; i < ARRAY_SIZE(dmi_strings); i++) { ++ dmi_strings[i].value = get_dmi_string(dmi_strings[i].keyword); ++ if (dmi_strings[i].value == NULL) ++ return 1; + } + + chassis_type = get_dmi_string("chassis-type"); + if (chassis_type == NULL) +- return; ++ return 0; /* chassis-type handling is optional anyway */ + ++ msg_pdbg("DMI string chassis-type: \"%s\"\n", chassis_type); + is_laptop = 2; + for (i = 0; i < ARRAY_SIZE(dmi_chassis_types); i++) { + if (strcasecmp(chassis_type, dmi_chassis_types[i].name) == 0) { +@@ -185,6 +354,33 @@ void dmi_init(void) + break; + } + } ++ free(chassis_type); ++ return 0; ++} ++ ++#endif /* CONFIG_INTERNAL_DMI */ ++ ++static int dmi_shutdown(void *data) ++{ ++ int i; ++ for (i = 0; i < ARRAY_SIZE(dmi_strings); i++) { ++ free(dmi_strings[i].value); ++ dmi_strings[i].value = NULL; ++ } ++ return 0; ++} ++ ++void dmi_init(void) ++{ ++ /* Register shutdown function before we allocate anything. */ ++ if (register_shutdown(dmi_shutdown, NULL)) { ++ msg_pwarn("Warning: Could not register DMI shutdown function - continuing without DMI info.\n"); ++ return; ++ } ++ ++ /* dmi_fill fills the dmi_strings array, and if possible sets the global is_laptop variable. */ ++ if (dmi_fill() != 0) ++ return; + + switch (is_laptop) { + case 1: +@@ -194,7 +390,13 @@ void dmi_init(void) + msg_pdbg("DMI chassis-type is not specific enough.\n"); + break; + } +- free(chassis_type); ++ ++ has_dmi_support = 1; ++ int i; ++ for (i = 0; i < ARRAY_SIZE(dmi_strings); i++) { ++ msg_pdbg("DMI string %s: \"%s\"\n", dmi_strings[i].keyword, ++ (dmi_strings[i].value == NULL) ? "" : dmi_strings[i].value); ++ } + } + + /** +@@ -204,8 +406,8 @@ void dmi_init(void) + * at the beginning and '$' at the end. So you can look for "^prefix", + * "suffix$", "substring" or "^complete string$". + * +- * @param value The string to check. +- * @param pattern The pattern. ++ * @param value The non-NULL string to check. ++ * @param pattern The non-NULL pattern. + * @return Nonzero if pattern matches. + */ + static int dmi_compare(const char *value, const char *pattern) +@@ -252,11 +454,15 @@ int dmi_match(const char *pattern) + if (!has_dmi_support) + return 0; + +- for (i = 0; i < ARRAY_SIZE(dmidecode_names); i++) +- if (dmi_compare(dmistrings[i], pattern)) ++ for (i = 0; i < ARRAY_SIZE(dmi_strings); i++) { ++ if (dmi_strings[i].value == NULL) ++ continue; ++ ++ if (dmi_compare(dmi_strings[i].value, pattern)) + return 1; ++ } + + return 0; + } + +-#endif /* STANDALONE */ ++#endif // defined(__i386__) || defined(__x86_64__) +diff --git a/dnv_smi_spi.c b/dnv_smi_spi.c +new file mode 100644 +index 0000000..0317cc7 +--- /dev/null ++++ b/dnv_smi_spi.c +@@ -0,0 +1,185 @@ ++ ++/************************************************************************ ++* LEGALESE: "Copyright (c) 2018, Dell Inc. All rights reserved." ++* ++* This source code is confidential, proprietary, and contains trade ++* secrets that are the sole property of Dell Inc. ++* Copy and/or distribution of this source code or disassembly or reverse ++* engineering of the resultant object code are strictly forbidden without ++* the written consent of Dell Inc. ++* ++************************************************************************/ ++#if DELL_DENVERTON_SUPPORT == 1 ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "flash.h" ++ ++#define MEM_MODULE "/dev/mem" ++ ++DELL_SPI_MAILBOX *mailbox; ++uint64_t phy_addr; ++ ++/** ++* @brief unmap a pagesize of physical memory into virtual memory. ++* @param[in] addr - virtual memory address that is unmaped. ++*/ ++static void free_virt_mapping(void *addr) ++{ ++ munmap(addr, getpagesize()); ++} ++ ++/** ++* @brief map a pagesize of physical memory into virtual memory. ++* @param[in] addr - physical memory address. ++* @param[out] buf - pointer to buffer which storages data. ++* @return = 0 for success, otherwise for error. ++*/ ++static uint32_t getData_phy_to_virt(uint32_t addr, void** buf) ++{ ++ uint8_t *tmp; ++ uint32_t pagesize, offset, index, fd; ++ ++ pagesize = getpagesize(); ++ if ( (fd = open(MEM_MODULE, O_RDWR)) < 0 ) { ++ printf("open() %s error\n", MEM_MODULE); ++ return 1; ++ } ++ ++ offset = addr & ~(pagesize - 1); ++ index = addr & (pagesize - 1); ++ if ( (tmp = mmap(0, pagesize*2, PROT_READ|PROT_WRITE, MAP_SHARED, fd, offset)) == MAP_FAILED ) { ++ printf("mmap() error\n"); ++ close(fd); ++ return 1; ++ } ++ *buf = tmp + index; ++ close(fd); ++ return 0; ++} ++ ++/** ++* @brief send "get communication buffer" requirement to SMM ++*/ ++uint32_t dnv_smi_open_res() ++{ ++ uint32_t mailboxAddress; ++ ++ ioperm(0xB2, 3, 1); ++ __asm__ __volatile__ ("push %%rcx" : :); ++ outb(0x27, 0xB2); ++ __asm__ __volatile__ ("movl %%ecx, %0" : "=r" (mailboxAddress)); ++ __asm__ __volatile__ ("pop %%rcx" : :); ++ ioperm(0xB2, 3, 0); ++ ++ getData_phy_to_virt(mailboxAddress, (void **)&mailbox); ++ phy_addr = mailboxAddress; ++ return 0; ++} ++ ++/** ++* @brief send "release communication buffer" requirement to SMM ++*/ ++void dnv_smi_release_res() ++{ ++ free_virt_mapping((void *)mailbox); ++} ++ ++/** ++* @brief disable SPI write protection. ++*/ ++static void dnv_trigger_smi_spi_unlock() ++{ ++ ioperm(0xB2, 3, 1); ++ __asm__ __volatile__ ("push %%rcx" : :); ++ __asm__ __volatile__ ("push %%rbx" : :); ++ __asm__ __volatile__ ("movl %0, %%ecx" : : "a" ((uint32_t)0)); ++ __asm__ __volatile__ ("movl %0, %%ebx" : : "a" ((uint32_t)phy_addr)); ++ outb(0x20, 0xB2); ++ __asm__ __volatile__ ("pop %%rbx" : :); ++ __asm__ __volatile__ ("pop %%rcx" : :); ++ ioperm(0xB2, 3, 0); ++} ++ ++/** ++* @brief enable SPI write protection. ++*/ ++static void dnv_trigger_smi_spi_lock() ++{ ++ ioperm(0xB2, 3, 1); ++ __asm__ __volatile__ ("push %%rcx" : :); ++ __asm__ __volatile__ ("push %%rbx" : :); ++ __asm__ __volatile__ ("movl %0, %%ecx" : : "a" ((uint32_t)0)); ++ __asm__ __volatile__ ("movl %0, %%ebx" : : "a" ((uint32_t)phy_addr)); ++ outb(0x24, 0xB2); ++ __asm__ __volatile__ ("pop %%rbx" : :); ++ __asm__ __volatile__ ("pop %%rcx" : :); ++ ioperm(0xB2, 3, 0); ++} ++ ++/** ++* @brief trigger smi ++*/ ++void run() ++{ ++ ioperm(0xB2, 3, 1); ++ outb(0x28, 0xB2); ++ ioperm(0xB2, 3, 0); ++} ++ ++/** ++* @brief This function is used to read/write and erase BIOS. ++* trigger SMI and send information to SMM(like requirement, address,and data) ++* @param[in] bios_offset - offset of bios region [0~size of bios region] ++* @param[in] buf - pointer to write data if cmd is "SMI_READ_SPI" ++* @param[in] cmd - enum SPI_SMI_CMD ++* @param[out] buf - pointer to read data if cmd is "SMI_WRITE_SPI" ++* @returns ret. This ret is returned from SMM. ++*/ ++int32_t dnv_smi_doit(uint32_t bios_offset, uint8_t *buf, SPI_SMI_CMD cmd) ++{ ++ ++ if (cmd == SMI_READ_SPI) { ++ mailbox->cmd = 0x1; ++ mailbox->offset = bios_offset; ++ mailbox->dlen = DELL_DENVERTON_BLOCK_SIZE; ++ run(); ++ memcpy (buf, mailbox->data, DELL_DENVERTON_BLOCK_SIZE); ++ return mailbox->ret; ++ } else if (cmd == SMI_ERASE_SPI) { ++ mailbox->cmd = 0x2; ++ mailbox->offset = bios_offset; ++ mailbox->dlen = DELL_DENVERTON_BLOCK_SIZE; ++ run(); ++ return mailbox->ret; ++ } else if (cmd == SMI_WRITE_SPI) { ++ memcpy (mailbox->data, buf, DELL_DENVERTON_BLOCK_SIZE); ++ mailbox->cmd = 0x3; ++ mailbox->offset = bios_offset; ++ mailbox->dlen = DELL_DENVERTON_BLOCK_SIZE; ++ run(); ++ return mailbox->ret; ++ } ++ ++ switch (cmd) ++ { ++ case SMI_ENABLE_SPI: ++ dnv_trigger_smi_spi_unlock(); ++ break; ++ case SMI_DISABLE_SPI: ++ dnv_trigger_smi_spi_lock(); ++ break; ++ default: ++ return -1; ++ } ++ ++ return 0; ++} ++ ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ +diff --git a/drkaiser.c b/drkaiser.c +index b94d6dd..0cf1fdb 100644 +--- a/drkaiser.c ++++ b/drkaiser.c +@@ -56,12 +56,6 @@ static const struct par_programmer par_programmer_drkaiser = { + .chip_writen = fallback_chip_writen, + }; + +-static int drkaiser_shutdown(void *data) +-{ +- physunmap(drkaiser_bar, DRKAISER_MEMMAP_SIZE); +- return 0; +-} +- + int drkaiser_init(void) + { + struct pci_dev *dev = NULL; +@@ -75,15 +69,15 @@ int drkaiser_init(void) + return 1; + + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); ++ if (!addr) ++ return 1; + + /* Write magic register to enable flash write. */ + rpci_write_word(dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE); + + /* Map 128kB flash memory window. */ +- drkaiser_bar = physmap("Dr. Kaiser PC-Waechter flash memory", +- addr, DRKAISER_MEMMAP_SIZE); +- +- if (register_shutdown(drkaiser_shutdown, NULL)) ++ drkaiser_bar = rphysmap("Dr. Kaiser PC-Waechter flash memory", addr, DRKAISER_MEMMAP_SIZE); ++ if (drkaiser_bar == ERROR_PTR) + return 1; + + max_rom_decode.parallel = 128 * 1024; +diff --git a/flash.h b/flash.h +index 63701ed..79fe8f4 100644 +--- a/flash.h ++++ b/flash.h +@@ -45,6 +45,14 @@ + typedef uintptr_t chipaddr; + #define PRIxPTR_WIDTH ((int)(sizeof(uintptr_t)*2)) + ++/* Types and macros regarding the maximum flash space size supported by generic code. */ ++typedef uint32_t chipoff_t; /* Able to store any addressable offset within a supported flash memory. */ ++typedef uint32_t chipsize_t; /* Able to store the number of bytes of any supported flash memory. */ ++#define FL_MAX_CHIPADDR_BITS (24) ++#define FL_MAX_CHIPADDR ((chipoff_t)(1ULL< 0) ++ programmer_table[programmer].delay(usecs); + } + + void map_flash_registers(struct flashctx *flash) +@@ -619,12 +629,29 @@ static unsigned int count_usable_erasers(const struct flashctx *flash) + return usable_erasefunctions; + } + ++#if DELL_DENVERTON_SUPPORT == 1 ++int8_t is_erase = 0; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + int compare_range(uint8_t *wantbuf, uint8_t *havebuf, unsigned int start, unsigned int len) + { + int ret = 0, failcount = 0; + unsigned int i; + for (i = 0; i < len; i++) { + if (wantbuf[i] != havebuf[i]) { ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv && is_erase) { ++ // _FVH ++ // At offset 0x28~0x2b of NVRAM, Main Bios and Boot Bios ++ // We can't read correct data after "erasing". ++ // But, We verified bios through SF100. The erase feature is work. ++ if (i == _FVH_OFFSET && ++ memcmp(&havebuf[i], _FVH_SIGNATURE, sizeof(_FVH_SIGNATURE) - 1) == 0) { ++ i += sizeof(_FVH_SIGNATURE) - 1; ++ continue; ++ } ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + /* Only print the first failure. */ + if (!failcount++) + msg_cerr("FAILED at 0x%08x! Expected=0x%02x, Found=0x%02x,", +@@ -651,7 +678,15 @@ int check_erased_range(struct flashctx *flash, unsigned int start, + exit(1); + } + memset(cmpbuf, 0xff, len); ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) ++ is_erase = 1; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + ret = verify_range(flash, cmpbuf, start, len); ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) ++ is_erase = 0; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + free(cmpbuf); + return ret; + } +@@ -695,6 +730,22 @@ int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, un + return ret; + } + ++#if DELL_DENVERTON_SUPPORT == 1 ++ // NVRAM will be recovery even if use afulnx. ++ // skip NVRAM region. ++ if (is_dnv) { ++ // Do not hard-code the NVRAM region start address. It is located at different addresses for 16MB and 32MB BIOS image. ++ // For Denverton platform, NVRAM region start address is always located at dnv_bios_region_start. ++ // NVRAM backup region is located at (dnv_bios_region_start + DELL_DENVERTON_MAIN_NVRAM_LENGTH). ++ if ((start >= dnv_bios_region_start && ++ start < (dnv_bios_region_start + DELL_DENVERTON_MAIN_NVRAM_LENGTH)) || ++ (start >= (dnv_bios_region_start + DELL_DENVERTON_MAIN_NVRAM_LENGTH) && ++ start < ((dnv_bios_region_start + DELL_DENVERTON_MAIN_NVRAM_LENGTH) + DELL_DENVERTON_BACKUP_NVRAM_LENGTH))) { ++ return ret; ++ } ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + ret = compare_range(cmpbuf, readbuf, start, len); + out_free: + free(readbuf); +@@ -770,6 +821,11 @@ int need_erase(uint8_t *have, uint8_t *want, unsigned int len, enum write_granul + case write_gran_1056bytes: + result = need_erase_gran_bytes(have, want, len, 1056); + break; ++#if DELL_DENVERTON_SUPPORT == 1 ++ case write_gran_4096bytes: ++ result = need_erase_gran_bytes(have, want, len, 4096); ++ break; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + default: + msg_cerr("%s: Unsupported granularity! Please report a bug at " + "flashrom@flashrom.org\n", __func__); +@@ -831,6 +887,11 @@ static unsigned int get_next_write(uint8_t *have, uint8_t *want, unsigned int le + case write_gran_1056bytes: + stride = 1056; + break; ++#if DELL_DENVERTON_SUPPORT == 1 ++ case write_gran_4096bytes: ++ stride = 4096; ++ break; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + default: + msg_cerr("%s: Unsupported granularity! Please report a bug at " + "flashrom@flashrom.org\n", __func__); +@@ -1140,6 +1201,12 @@ notfound: + if (!flash->chip) + return -1; + ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ flash->chip->gran = write_gran_4096bytes; ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + #if CONFIG_INTERNAL == 1 + if (programmer_table[programmer].map_flash_region == physmap) + snprintf(location, sizeof(location), "at physical address 0x%lx", base); +@@ -1148,8 +1215,13 @@ notfound: + snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name); + + tmp = flashbuses_to_text(flash->chip->bustype); ++#ifdef FORCE10_SPI_CHANGE ++ msg_cdbg("%s %s flash chip \"%s\" (%d kB, %s) %s.\n", force ? "Assuming" : "Found", ++ flash->chip->vendor, flash->chip->name, flash->chip->total_size, tmp, location); ++#else + msg_cinfo("%s %s flash chip \"%s\" (%d kB, %s) %s.\n", force ? "Assuming" : "Found", + flash->chip->vendor, flash->chip->name, flash->chip->total_size, tmp, location); ++#endif + free(tmp); + + /* Flash registers will not be mapped if the chip was forced. Lock info +@@ -1166,6 +1238,10 @@ notfound: + int read_buf_from_file(unsigned char *buf, unsigned long size, + const char *filename) + { ++#ifdef __LIBPAYLOAD__ ++ msg_gerr("Error: No file I/O support in libpayload\n"); ++ return 1; ++#else + unsigned long numbytes; + FILE *image; + struct stat image_stat; +@@ -1196,11 +1272,16 @@ int read_buf_from_file(unsigned char *buf, unsigned long size, + return 1; + } + return 0; ++#endif + } + + int write_buf_to_file(unsigned char *buf, unsigned long size, + const char *filename) + { ++#ifdef __LIBPAYLOAD__ ++ msg_gerr("Error: No file I/O support in libpayload\n"); ++ return 1; ++#else + unsigned long numbytes; + FILE *image; + +@@ -1221,6 +1302,7 @@ int write_buf_to_file(unsigned char *buf, unsigned long size, + return 1; + } + return 0; ++#endif + } + + int read_flash_to_file(struct flashctx *flash, const char *filename) +@@ -1229,6 +1311,16 @@ int read_flash_to_file(struct flashctx *flash, const char *filename) + unsigned char *buf = calloc(size, sizeof(char)); + int ret = 0; + ++#if DELL_DENVERTON_SUPPORT == 1 ++ uint64_t bios_start = 0; ++ uint64_t bios_size = size; ++ ++ if (is_dnv) { ++ bios_size = dnv_bios_region_size; ++ bios_start = dnv_bios_region_start; ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + msg_cinfo("Reading flash... "); + if (!buf) { + msg_gerr("Memory allocation failed!\n"); +@@ -1240,7 +1332,11 @@ int read_flash_to_file(struct flashctx *flash, const char *filename) + ret = 1; + goto out_free; + } ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (flash->chip->read(flash, (buf + bios_start), bios_start, bios_size)) { ++#else + if (flash->chip->read(flash, buf, 0, size)) { ++#endif /* #if DELL_DENVERTON__SUPPORT == 1 */ + msg_cerr("Read operation failed!\n"); + ret = 1; + goto out_free; +@@ -1388,6 +1484,11 @@ static int walk_eraseregions(struct flashctx *flash, int erasefunction, + { + int i, j; + unsigned int start = 0; ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ start = dnv_bios_region_start; ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + unsigned int len; + struct block_eraser eraser = flash->chip->block_erasers[erasefunction]; + +@@ -1897,6 +1998,10 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, + uint8_t *newcontents; + int ret = 0; + unsigned long size = flash->chip->total_size * 1024; ++#if DELL_DENVERTON_SUPPORT == 1 ++ uint32_t bios_size = size; ++ uint32_t bios_start = 0; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + + if (chip_safety_check(flash, force, read_it, write_it, erase_it, verify_it)) { + msg_cerr("Aborting.\n"); +@@ -1904,6 +2009,12 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, + goto out_nofree; + } + ++ if (normalize_romentries(flash)) { ++ msg_cerr("Requested regions can not be handled. Aborting.\n"); ++ ret = 1; ++ goto out_nofree; ++ } ++ + /* Given the existence of read locks, we want to unlock for read, + * erase and write. + */ +@@ -1936,6 +2047,13 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, + */ + + if (erase_it) { ++ ++#if 0 // Since we dont have a layout, why set newcontents to 0?? ++#ifdef FORCE10_SPI_CHANGE ++ /* Build a new image taking the given layout into account. */ ++ build_new_image(flash, oldcontents, newcontents); ++#endif ++#endif + /* FIXME: Do we really want the scary warning if erase failed? + * After all, after erase the chip is either blank or partially + * blank or it has the old contents. A blank chip won't boot, +@@ -1975,25 +2093,47 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, + * preserved, but in that case we might perform unneeded erase which + * takes time as well. + */ ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ bios_size = dnv_bios_region_size; ++ bios_start = dnv_bios_region_start; ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++#ifdef FORCE10_SPI_CHANGE ++ msg_cdbg("Reading old flash chip contents... "); ++#else + msg_cinfo("Reading old flash chip contents... "); ++#endif ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (flash->chip->read(flash, oldcontents + bios_start, bios_start, bios_size)) { ++#else + if (flash->chip->read(flash, oldcontents, 0, size)) { ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + ret = 1; + msg_cinfo("FAILED.\n"); + goto out; + } ++#ifdef FORCE10_SPI_CHANGE ++ msg_cdbg("done.\n"); ++#else + msg_cinfo("done.\n"); ++#endif + +- // This should be moved into each flash part's code to do it +- // cleanly. This does the job. +- handle_romentries(flash, oldcontents, newcontents); +- ++#if 0 ++ /* Build a new image taking the given layout into account. */ ++ build_new_image(flash, oldcontents, newcontents); ++#endif + // //////////////////////////////////////////////////////////// + + if (write_it) { + if (erase_and_write_flash(flash, oldcontents, newcontents)) { + msg_cerr("Uh oh. Erase/write failed. Checking if " + "anything changed.\n"); ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (!flash->chip->read(flash, newcontents, bios_start, bios_size)) { ++#else + if (!flash->chip->read(flash, newcontents, 0, size)) { ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + if (!memcmp(oldcontents, newcontents, size)) { + msg_cinfo("Good. It seems nothing was changed.\n"); + nonfatal_help_message(); +@@ -2014,14 +2154,22 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, + if (write_it) { + /* Work around chips which need some time to calm down. */ + programmer_delay(1000*1000); ++#if DELL_DENVERTON_SUPPORT == 1 ++ ret = verify_range(flash, newcontents + bios_start, bios_start, bios_size); ++#else + ret = verify_range(flash, newcontents, 0, size); ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + /* If we tried to write, and verification now fails, we + * might have an emergency situation. + */ + if (ret) + emergency_help_message(); + } else { ++#if DELL_DENVERTON_SUPPORT == 1 ++ ret = compare_range(newcontents + bios_start, oldcontents + bios_start, bios_start, bios_size); ++#else + ret = compare_range(newcontents, oldcontents, 0, size); ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + } + if (!ret) + msg_cinfo("VERIFIED.\n"); +diff --git a/ft2232_spi.c b/ft2232_spi.c +index 81be051..44354fd 100644 +--- a/ft2232_spi.c ++++ b/ft2232_spi.c +@@ -43,6 +43,7 @@ + #define FTDI_FT4232H_PID 0x6011 + #define FTDI_FT232H_PID 0x6014 + #define TIAO_TUMPA_PID 0x8a98 ++#define TIAO_TUMPA_LITE_PID 0x8a99 + #define AMONTEC_JTAGKEY_PID 0xCFF8 + + #define GOEPEL_VID 0x096C +@@ -62,6 +63,7 @@ const struct dev_entry devs_ft2232spi[] = { + {FTDI_VID, FTDI_FT4232H_PID, OK, "FTDI", "FT4232H"}, + {FTDI_VID, FTDI_FT232H_PID, OK, "FTDI", "FT232H"}, + {FTDI_VID, TIAO_TUMPA_PID, OK, "TIAO", "USB Multi-Protocol Adapter"}, ++ {FTDI_VID, TIAO_TUMPA_LITE_PID, OK, "TIAO", "USB Multi-Protocol Adapter Lite"}, + {FTDI_VID, AMONTEC_JTAGKEY_PID, OK, "Amontec", "JTAGkey"}, + {GOEPEL_VID, GOEPEL_PICOTAP_PID, OK, "GOEPEL", "PicoTAP"}, + {FIC_VID, OPENMOKO_DBGBOARD_PID, OK, "FIC", "OpenMoko Neo1973 Debug board (V2+)"}, +@@ -208,6 +210,10 @@ int ft2232_spi_init(void) + /* Interface A is SPI1, B is SPI2. */ + ft2232_type = TIAO_TUMPA_PID; + channel_count = 2; ++ } else if (!strcasecmp(arg, "tumpalite")) { ++ /* Only one channel is used on lite edition */ ++ ft2232_type = TIAO_TUMPA_LITE_PID; ++ channel_count = 1; + } else if (!strcasecmp(arg, "busblaster")) { + /* In its default configuration it is a jtagkey clone */ + ft2232_type = FTDI_FT2232H_PID; +diff --git a/gfxnvidia.c b/gfxnvidia.c +index d0a9feb..d3ee14e 100644 +--- a/gfxnvidia.c ++++ b/gfxnvidia.c +@@ -77,12 +77,6 @@ static const struct par_programmer par_programmer_gfxnvidia = { + .chip_writen = fallback_chip_writen, + }; + +-static int gfxnvidia_shutdown(void *data) +-{ +- physunmap(nvidia_bar, GFXNVIDIA_MEMMAP_SIZE); +- return 0; +-} +- + int gfxnvidia_init(void) + { + struct pci_dev *dev = NULL; +@@ -96,12 +90,14 @@ int gfxnvidia_init(void) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); ++ if (!io_base_addr) ++ return 1; ++ + io_base_addr += 0x300000; + msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr); + +- nvidia_bar = physmap("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); +- +- if (register_shutdown(gfxnvidia_shutdown, NULL)) ++ nvidia_bar = rphysmap("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); ++ if (nvidia_bar == ERROR_PTR) + return 1; + + /* Allow access to flash interface (will disable screen). */ +diff --git a/hwaccess.h b/hwaccess.h +index fd6eb12..83f349e 100644 +--- a/hwaccess.h ++++ b/hwaccess.h +@@ -37,7 +37,13 @@ + * or as builtin. + */ + #define index shadow_workaround_index ++ ++#if !defined (__NetBSD__) && !defined (__DragonFly__) + #include ++#else ++#include ++#endif ++ + #undef index + #endif + +diff --git a/ich_descriptors.c b/ich_descriptors.c +index 528717b..c007867 100644 +--- a/ich_descriptors.c ++++ b/ich_descriptors.c +@@ -45,6 +45,11 @@ + #define min(a, b) (a < b) ? a : b + #endif + ++#if DELL_DENVERTON_SUPPORT == 1 ++#define DELL_DENVERTON_MAX_DENSITY 7 ++extern int8_t is_dnv; // if 1 chipset is denverton serial, 0 otherwise ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + void prettyprint_ich_reg_vscc(uint32_t reg_val, int verbosity) + { + print(verbosity, "BES=0x%x, ", (reg_val & VSCC_BES) >> VSCC_BES_OFF); +@@ -100,6 +105,36 @@ void prettyprint_ich_descriptor_content(const struct ich_desc_content *cont) + + void prettyprint_ich_descriptor_component(const struct ich_descriptors *desc) + { ++#if DELL_DENVERTON_SUPPORT == 1 ++ static const char * const dnv_freq_str[8] = { ++ "reserved", /* 000 */ ++ "reserved", /* 001 */ ++ "48 MHz", /* 010 */ ++ "reserved", /* 011 */ ++ "30MHz", /* 100 */ ++ "reserved", /* 101 */ ++ "17 MHz", /* 110 */ ++ "reserved", /* 111 */ ++ }; ++ static const char * const dnv_size_str[16] = { ++ "512 kB", /* 0000 */ ++ " 1 MB", /* 0001 */ ++ " 2 MB", /* 0010 */ ++ " 4 MB", /* 0011 */ ++ " 8 MB", /* 0100 */ ++ " 16 MB", /* 0101 */ ++ " 32 MB", /* 0110 */ ++ " 64 MB", /* 0111 */ ++ "reserved", /* 1000 */ ++ "reserved", /* 1001 */ ++ "reserved", /* 1010 */ ++ "reserved", /* 1011 */ ++ "reserved", /* 1100 */ ++ "reserved", /* 1101 */ ++ "reserved", /* 1110 */ ++ "reserved", /* 1111 */ ++ }; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + static const char * const freq_str[8] = { + "20 MHz", /* 000 */ + "33 MHz", /* 001 */ +@@ -121,6 +156,47 @@ void prettyprint_ich_descriptor_component(const struct ich_descriptors *desc) + "reserved", /* 111 */ + }; + ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ msg_pdbg2("=== Component Section ===\n"); ++ msg_pdbg2("FLCOMP 0x%08x\n", desc->component.FLCOMP); ++ msg_pdbg2("FLILL 0x%08x\n", desc->component.FLILL ); ++ msg_pdbg2("\n"); ++ ++ msg_pdbg2("--- Details ---\n"); ++ msg_pdbg2("Component 1 density: %s\n", ++ dnv_size_str[desc->component.dnv_comp1_density]); ++ if (desc->content.NC) ++ msg_pdbg2("Component 2 density: %s\n", ++ dnv_size_str[desc->component.dnv_comp2_density]); ++ else ++ msg_pdbg2("Component 2 is not used.\n"); ++ msg_pdbg2("Read Clock Frequency: %s\n", ++ dnv_freq_str[desc->component.dnv_freq_read]); ++ msg_pdbg2("Read ID and Status Clock Freq.: %s\n", ++ dnv_freq_str[desc->component.dnv_freq_read_id]); ++ msg_pdbg2("Write and Erase Clock Freq.: %s\n", ++ dnv_freq_str[desc->component.dnv_freq_write]); ++ msg_pdbg2("Fast Read is %ssupported.\n", ++ desc->component.dnv_fastread ? "" : "not "); ++ if (desc->component.dnv_fastread) ++ msg_pdbg2("Fast Read Clock Frequency: %s\n", ++ dnv_freq_str[desc->component.dnv_freq_fastread]); ++ if (desc->component.FLILL == 0) ++ msg_pdbg2("No forbidden opcodes.\n"); ++ else { ++ msg_pdbg2("Invalid instruction 0: 0x%02x\n", ++ desc->component.invalid_instr0); ++ msg_pdbg2("Invalid instruction 1: 0x%02x\n", ++ desc->component.invalid_instr1); ++ msg_pdbg2("Invalid instruction 2: 0x%02x\n", ++ desc->component.invalid_instr2); ++ msg_pdbg2("Invalid instruction 3: 0x%02x\n", ++ desc->component.invalid_instr3); ++ } ++ } else { ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + msg_pdbg2("=== Component Section ===\n"); + msg_pdbg2("FLCOMP 0x%08x\n", desc->component.FLCOMP); + msg_pdbg2("FLILL 0x%08x\n", desc->component.FLILL ); +@@ -157,6 +233,9 @@ void prettyprint_ich_descriptor_component(const struct ich_descriptors *desc) + msg_pdbg2("Invalid instruction 3: 0x%02x\n", + desc->component.invalid_instr3); + } ++#if DELL_DENVERTON_SUPPORT == 1 ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + msg_pdbg2("\n"); + } + +@@ -171,6 +250,12 @@ static void pprint_freg(const struct ich_desc_region *reg, uint32_t i) + } + uint32_t base = ICH_FREG_BASE(reg->FLREGs[i]); + uint32_t limit = ICH_FREG_LIMIT(reg->FLREGs[i]); ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ base = DELL_DENVERTON_FREG_BASE(reg->FLREGs[i]); ++ limit = DELL_DENVERTON_FREG_LIMIT(reg->FLREGs[i]); ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + msg_pdbg2("Region %d (%-6s) ", i, region_names[i]); + if (base > limit) + msg_pdbg2("is unused.\n"); +@@ -741,17 +826,36 @@ int getFCBA_component_density(const struct ich_descriptors *desc, uint8_t idx) + msg_perr("Only ICH SPI component index 0 or 1 are supported yet.\n"); + return 0; + } ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ if (size_enc > DELL_DENVERTON_MAX_DENSITY) { ++ msg_perr("Density of ICH SPI component with index %d is invalid. Encoded density is 0x%x.\n", idx, size_enc); ++ return 0; ++ } ++ } else { ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + if (size_enc > 5) { + msg_perr("Density of ICH SPI component with index %d is invalid. Encoded density is 0x%x.\n", + idx, size_enc); + return 0; + } ++#if DELL_DENVERTON_SUPPORT == 1 ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + return (1 << (19 + size_enc)); + } + + static uint32_t read_descriptor_reg(uint8_t section, uint16_t offset, void *spibar) + { + uint32_t control = 0; ++#if DELL_DENVERTON_SUPPORT == 1 ++ if (is_dnv) { ++ control |= (section << DENVERTON_FDOC_FDSS_OFF) & DENVERTON_FDOC_FDSS; ++ control |= (offset << DENVERTON_FDOC_FDSI_OFF) & DENVERTON_FDOC_FDSI; ++ mmio_le_writel(control, spibar + DENVERTON_REG_FDOC); ++ return mmio_le_readl(spibar + DENVERTON_REG_FDOD); ++ } ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + control |= (section << FDOC_FDSS_OFF) & FDOC_FDSS; + control |= (offset << FDOC_FDSI_OFF) & FDOC_FDSI; + mmio_le_writel(control, spibar + ICH9_REG_FDOC); +diff --git a/ich_descriptors.h b/ich_descriptors.h +index 3a44740..914a3cd 100644 +--- a/ich_descriptors.h ++++ b/ich_descriptors.h +@@ -64,6 +64,19 @@ + #define ICH_FREG_BASE(flreg) (((flreg) << 12) & 0x01fff000) + #define ICH_FREG_LIMIT(flreg) (((flreg) >> 4) & 0x01fff000) + ++#if DELL_DENVERTON_SUPPORT == 1 ++#define DENVERTON_REG_FDOC 0xB4 ++#define DENVERTON_FDOC_FDSI_OFF 2 ++#define DENVERTON_FDOC_FDSI (0x3ff << DENVERTON_FDOC_FDSI_OFF) ++#define DENVERTON_FDOC_FDSS_OFF 12 ++#define DENVERTON_FDOC_FDSS (0x3 << DENVERTON_FDOC_FDSS_OFF) ++ ++#define DENVERTON_REG_FDOD 0xB8 ++ ++#define DELL_DENVERTON_FREG_BASE(flreg) (((flreg) << 12) & 0x03fff000) ++#define DELL_DENVERTON_FREG_LIMIT(flreg) (((flreg) >> 4) & 0x03fff000) ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + void prettyprint_ich_reg_vscc(uint32_t reg_val, int verbosity); + + struct ich_desc_content { +@@ -78,6 +91,15 @@ struct ich_desc_content { + NR :3, /* Number Of Regions */ + :5; + }; ++#if DELL_DENVERTON_SUPPORT == 1 ++ struct { ++ int32_t dnv_FCBA :8, /* Flash Component Base Address */ ++ dnv_NC :2, /* Number Of Components */ ++ :6, ++ dnv_FRBA :8, /* Flash Region Base Address */ ++ :8; ++ }; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + }; + union { /* 0x08 */ + uint32_t FLMAP1; +@@ -113,6 +135,20 @@ struct ich_desc_component { + freq_read_id :3, + :2; + }; ++#if DELL_DENVERTON_SUPPORT == 1 ++ struct { ++ uint32_t dnv_comp1_density :4, ++ dnv_comp2_density :4, ++ :9, ++ dnv_freq_read :3, ++ dnv_fastread :1, ++ dnv_freq_fastread :3, ++ dnv_freq_write :3, ++ dnv_freq_read_id :3, ++ dnv_dualfastread :1, ++ :1; ++ }; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + }; + union { /* 0x04 */ + uint32_t FLILL; /* Flash Invalid Instructions Register */ +@@ -129,6 +165,15 @@ struct ich_desc_component { + uint32_t FPBA :13, /* Flash Partition Boundary Addr */ + :19; + }; ++#if DELL_DENVERTON_SUPPORT == 1 ++ uint32_t FLILL1; /* Flash Partition Boundary Register for dnv */ ++ struct { ++ uint32_t invalid_instr4 :8, ++ invalid_instr5 :8, ++ invalid_instr6 :8, ++ invalid_instr7 :8; ++ }; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + }; + }; + +@@ -167,6 +212,65 @@ struct ich_desc_region { + :3; + }; + }; ++#if DELL_DENVERTON_SUPPORT == 1 ++ struct { /* FLREG0 Flash Descriptor */ ++ uint32_t dnv_reg0_base :15, ++ :1, ++ dnv_reg0_limit :15, ++ :1; ++ }; ++ struct { /* FLREG1 BIOS */ ++ uint32_t dnv_reg1_base :15, ++ :1, ++ dnv_reg1_limit :15, ++ :1; ++ }; ++ struct { /* FLREG2 ME */ ++ uint32_t dnv_reg2_base :15, ++ :1, ++ dnv_reg2_limit :15, ++ :1; ++ }; ++ ++ /* FLREG3 - Reserved */ ++ ++ struct { /* FLREG4 Platform */ ++ uint32_t dnv_reg4_base :15, ++ :1, ++ dnv_reg4_limit :15, ++ :1; ++ }; ++ ++ /* FLREG5 - Reserved */ ++ /* FLREG6 - Reserved */ ++ /* FLREG7 - Reserved */ ++ /* FLREG8 - Reserved */ ++ /* FLREG9 - Reserved */ ++ ++ struct { /* FLREG10 IE */ ++ uint32_t dnv_reg10_base :15, ++ :1, ++ dnv_reg10_limit :15, ++ :1; ++ }; ++ struct { /* FLREG11 LAN CTRL0 */ ++ uint32_t dnv_reg11_base :15, ++ :1, ++ dnv_reg11_limit :15, ++ :1; ++ }; ++ struct { /* FLREG12 LAN CTRL1 */ ++ uint32_t dnv_reg12_base :15, ++ :1, ++ dnv_reg12_limit :15, ++ :1; ++ }; ++ ++ /* FLREG13 - Reserved */ ++ /* FLREG14 - Reserved */ ++ /* FLREG15 - Reserved */ ++ ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + }; + }; + +diff --git a/ichspi.c b/ichspi.c +index 6d1bd1a..742d424 100644 +--- a/ichspi.c ++++ b/ichspi.c +@@ -170,6 +170,52 @@ + #define ICH7_REG_OPTYPE 0x56 /* 16 Bits */ + #define ICH7_REG_OPMENU 0x58 /* 64 Bits */ + ++/* denverton controller register definition */ ++#if DELL_DENVERTON_SUPPORT == 1 ++#define DENVERTON_REG_BFPREG 0x00 /* 32 Bits SPI BIOS MMIO PRI */ ++#define DENVERTON_BFPREG_PRB_OFF 0 /* 0-14: BIOS Flash Promary Region Base */ ++#define DENVERTON_BFPREG_PRB (0x7FFF << DENVERTON_BFPREG_PRB_OFF) ++#define DENVERTON_BFPREG_PRL_OFF 16 /* 16-30: BIOS Flash Primary Region Limit */ ++#define DENVERTON_BFPREG_PRL (0xFFFF << DENVERTON_BFPREG_PRL_OFF) ++#define DENVERTON_REG_HSFS 0x04 /* 16 Bits Hardware Sequencing Flash Status */ ++#define DENVERTON_HSFS_FDONE_OFF 0 /* 0: Flash Cycle Done */ ++#define DENVERTON_HSFS_FDONE (0x1 << DENVERTON_HSFS_FDONE_OFF) ++#define DENVERTON_HSFS_FCERR_OFF 1 /* 1: Flash Cycle Error */ ++#define DENVERTON_HSFS_FCERR (0x1 << DENVERTON_HSFS_FCERR_OFF) ++#define DENVERTON_HSFS_FDOPSS_OFF 13 /* 13: Flash Descriptor Override Pin-Strap Status */ ++#define DENVERTON_HSFS_FDOPSS (0x1 << DENVERTON_HSFS_FDOPSS_OFF) ++#define DENVERTON_HSFS_FDV_OFF 14 /* 14: Flash Descriptor Valid */ ++#define DENVERTON_HSFS_FDV (0x1 << DENVERTON_HSFS_FDV_OFF) ++#define DENVERTON_HSFS_FLOCKDN_OFF 15 /* 15: Flash Configuration Lock-Down */ ++#define DENVERTON_HSFS_FLOCKDN (0x1 << DENVERTON_HSFS_FLOCKDN_OFF) ++#define DENVERTON_REG_HSFC 0x06 /* 16 Bits Hardware Sequencing Flash Control */ ++#define DENVERTON_HSFC_FGO_OFF 0 /* 0: Flash Cycle Go */ ++#define DENVERTON_HSFC_FGO (0x1 << DENVERTON_HSFC_FGO_OFF) ++#define DENVERTON_HSFC_FCYCLE_OFF 1 /* 1- 4: FLASH Cycle */ ++#define DENVERTON_HSFC_FCYCLE (0xF << DENVERTON_HSFC_FCYCLE_OFF) ++#define DENVERTON_HSFC_FDBC_OFF 8 /* 8-13: Flash Data Byte Count */ ++#define DENVERTON_HSFC_FDBC (0x3F << DENVERTON_HSFC_FDBC_OFF) ++#define DENVERTON_REG_FADDR 0x08 /* 32 Bits */ ++#define DENVERTON_REG_FDATA0 0x10 /* 32 Bits */ ++#define DENVERTON_REG_FRAP 0x50 /* 32 Bytes Flash Region Access Permissions */ ++#define DENVERTON_REG_FREG0 0x54 /* 32 Bytes Flash Region 0 */ ++#define DENVERTON_REG_PR0 0x84 /* 32 Bytes Protected Range 0 */ ++#define DENVERTON_PR_WP_OFF 31 /* 31: write protection enable */ ++#define DENVERTON_PR_RP_OFF 15 /* 15: read protection enable */ ++#define DENVERTON_REG_VSCC0 0xC4 /* 32 Bits Host Vendor Specific Component Capabilities for Component 0 */ ++#define DENVERTON_REG_VSCC1 0xC8 /* 32 Bits Host Vendor Specific Component Capabilities for Component 1 */ ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ ++#ifdef DELL_AVOTON_SUPPORT ++extern int8_t is_avoton; ++#endif /* DELL_AVOTON_SUPPORT */ ++ ++#if DELL_DENVERTON_SUPPORT == 1 ++extern uint32_t dnv_bios_region_start; ++extern uint32_t dnv_bios_region_size; ++extern uint32_t dnv_bios_region_limit; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + /* ICH SPI configuration lock-down. May be set during chipset enabling. */ + static int ichspi_lock = 0; + +@@ -466,6 +512,8 @@ static int generate_opcodes(OPCODES * op) + + switch (ich_generation) { + case CHIPSET_ICH7: ++ case CHIPSET_TUNNEL_CREEK: ++ case CHIPSET_CENTERTON: + preop = REGREAD16(ICH7_REG_PREOP); + optype = REGREAD16(ICH7_REG_OPTYPE); + opmenu[0] = REGREAD32(ICH7_REG_OPMENU); +@@ -529,7 +577,7 @@ static int program_opcodes(OPCODES *op, int enable_undo) + opmenu[0] |= ((uint32_t) op->opcode[a].opcode) << (a * 8); + } + +- /*Program Allowable Opcodes 4 - 7 */ ++ /* Program Allowable Opcodes 4 - 7 */ + opmenu[1] = 0; + for (a = 4; a < 8; a++) { + opmenu[1] |= ((uint32_t) op->opcode[a].opcode) << ((a - 4) * 8); +@@ -538,6 +586,8 @@ static int program_opcodes(OPCODES *op, int enable_undo) + msg_pdbg2("\n%s: preop=%04x optype=%04x opmenu=%08x%08x\n", __func__, preop, optype, opmenu[0], opmenu[1]); + switch (ich_generation) { + case CHIPSET_ICH7: ++ case CHIPSET_TUNNEL_CREEK: ++ case CHIPSET_CENTERTON: + /* Register undo only for enable_undo=1, i.e. first call. */ + if (enable_undo) { + rmmio_valw(ich_spibar + ICH7_REG_PREOP); +@@ -603,10 +653,19 @@ static void ich_set_bbar(uint32_t min_addr) + int bbar_off; + switch (ich_generation) { + case CHIPSET_ICH7: ++ case CHIPSET_TUNNEL_CREEK: ++ case CHIPSET_CENTERTON: + bbar_off = 0x50; + break; + case CHIPSET_ICH8: ++#ifdef DELL_AVOTON_SUPPORT ++ case CHIPSET_AVOTON: ++#endif ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("BBAR offset is unknown on ICH8!\n"); ++#else + msg_perr("BBAR offset is unknown on ICH8!\n"); ++#endif + return; + case CHIPSET_ICH9: + default: /* Future version might behave the same */ +@@ -817,11 +876,17 @@ static int ich7_run_opcode(OPCODE op, uint32_t offset, + /* FIXME: make sure we do not needlessly cause transaction errors. */ + temp16 = REGREAD16(ICH7_REG_SPIS); + if (temp16 & SPIS_FCERR) { ++#ifndef FORCE10_SPI_CHANGE + msg_perr("Transaction error!\n"); ++#endif + /* keep reserved bits */ + temp16 &= SPIS_RESERVED_MASK; + REGWRITE16(ICH7_REG_SPIS, temp16 | SPIS_FCERR); ++#ifndef FORCE10_SPI_CHANGE + return 1; ++#else ++ return 0; ++#endif + } + + if ((!write_cmd) && (datalength != 0)) +@@ -838,6 +903,22 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, + uint32_t temp32; + uint64_t opmenu; + int opcode_index; ++/* skip unused region for Rangeley */ ++ if (offset >= 0x10000 && offset <= 0x9fffff) { ++ uint32_t i = 0; ++ for (i = 0; i < datalength; i++) ++ *(data + i) = 0xff; ++ return 0; ++ } ++#ifdef DELL_AVOTON_SUPPORT ++ /* skip unused region for Rangeley */ ++ if (is_avoton && offset >= 0x10000 && offset <= 0x9fffff) { ++ uint32_t i = 0; ++ for (i = 0; i < datalength; i++) ++ *(data + i) = 0xff; ++ return 0; ++ } ++#endif /* AVOTON */ + + /* Is it a write command? */ + if ((op.spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS) +@@ -939,14 +1020,20 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, + /* FIXME make sure we do not needlessly cause transaction errors. */ + temp32 = REGREAD32(ICH9_REG_SSFS); + if (temp32 & SSFS_FCERR) { ++#ifndef FORCE10_SPI_CHANGE + msg_perr("Transaction error!\n"); ++#endif + prettyprint_ich9_reg_ssfs(temp32); + prettyprint_ich9_reg_ssfc(temp32); + /* keep reserved bits */ + temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK; + /* Clear the transaction error. */ + REGWRITE32(ICH9_REG_SSFS, temp32 | SSFS_FCERR); ++#ifndef FORCE10_SPI_CHANGE + return 1; ++#else ++ return 0; ++#endif + } + + if ((!write_cmd) && (datalength != 0)) +@@ -975,6 +1062,8 @@ static int run_opcode(const struct flashctx *flash, OPCODE op, uint32_t offset, + + switch (ich_generation) { + case CHIPSET_ICH7: ++ case CHIPSET_TUNNEL_CREEK: ++ case CHIPSET_CENTERTON: + return ich7_run_opcode(op, offset, datalength, data, maxlength); + case CHIPSET_ICH8: + default: /* Future version might behave the same */ +@@ -1418,6 +1507,191 @@ static int ich_spi_send_multicommand(struct flashctx *flash, + return ret; + } + ++#if DELL_DENVERTON_SUPPORT == 1 ++/* Sets FLA in FADDR to (addr & 0x01FFFFFF) without touching other bits. */ ++static void dnv_hwseq_set_addr(uint32_t addr) ++{ ++ uint32_t addr_old = REGREAD32(DENVERTON_REG_FADDR) & ~0x01FFFFFF; ++ REGWRITE32(DENVERTON_REG_FADDR, (addr & 0x01FFFFFF) | addr_old); ++} ++ ++/* Polls for Cycle Done Status, Flash Cycle Error or timeout in 8 us intervals. ++ Resets all error flags in HSFS. ++ Returns 0 if the cycle completes successfully without errors within ++ timeout us, 1 on errors. */ ++static int dnv_hwseq_wait_for_cycle_complete(uint32_t timeout, ++ uint32_t len) ++{ ++ uint16_t hsfs; ++ uint32_t addr; ++ ++ timeout /= 8; /* scale timeout duration to counter */ ++ while ((((hsfs = REGREAD16(DENVERTON_REG_HSFS)) & ++ (DENVERTON_HSFS_FDONE | DENVERTON_HSFS_FCERR)) == 0) && ++ --timeout) { ++ programmer_delay(8); ++ } ++ REGWRITE16(DENVERTON_REG_HSFS, REGREAD16(DENVERTON_REG_HSFS)); ++ if (!timeout) { ++ addr = REGREAD32(DENVERTON_REG_FADDR) & 0x01FFFFFF; ++ msg_perr("Timeout error between offset 0x%08x and " ++ "0x%08x (= 0x%08x + %d)!\n", ++ addr, addr + len - 1, addr, len - 1); ++ return 1; ++ } ++ ++ if (hsfs & DENVERTON_HSFS_FCERR) { ++ addr = REGREAD32(DENVERTON_REG_FADDR) & 0x01FFFFFF; ++ msg_perr("Transaction error between offset 0x%08x and " ++ "0x%08x (= 0x%08x + %d)!\n", ++ addr, addr + len - 1, addr, len - 1); ++ return 1; ++ } ++ return 0; ++} ++ ++int dnv_read_JEDEC_ID(uint8_t *buf) ++{ ++ uint16_t hsfc; ++ uint16_t timeout = 100 * 60; ++ uint8_t len = 3; ++ ++ /* clear FDONE, FCERR, AEL by writing 1 to them (if they are set) */ ++ REGWRITE16(DENVERTON_REG_HSFS, REGREAD16(DENVERTON_REG_HSFS)); ++ ++ dnv_hwseq_set_addr(0); ++ hsfc = REGREAD16(DENVERTON_REG_HSFC); ++ hsfc &= ~DENVERTON_HSFC_FCYCLE; /* clear operation */ ++ hsfc |= (0x6 << DENVERTON_HSFC_FCYCLE_OFF); /* set read JEDEC ID operation */ ++ hsfc &= ~DENVERTON_HSFC_FDBC; /* clear byte count */ ++ /* set byte count */ ++ hsfc |= (((len - 1) << DENVERTON_HSFC_FDBC_OFF) & DENVERTON_HSFC_FDBC); ++ hsfc |= DENVERTON_HSFC_FGO; /* start */ ++ REGWRITE16(DENVERTON_REG_HSFC, hsfc); ++ ++ if (dnv_hwseq_wait_for_cycle_complete(timeout, len)) ++ return 1; ++ ich_read_data(buf, len, DENVERTON_REG_FDATA0); ++ return 0; ++} ++ ++static int dnv_hwseq_probe(struct flashctx *flash) ++{ ++ uint8_t jedec_id[3]; ++ uint32_t tmp, manufacture_id, model_id; ++ struct block_eraser *eraser; ++ const struct flashchip *chip; ++ ++ msg_gdbg("Using HW Sequency to read JEDEC ID and find SPI flash.\n"); ++ if (dnv_read_JEDEC_ID(jedec_id)) { ++ msg_cerr("Can't get JEDEC ID through HW Sequency\n"); ++ return -1; ++ } ++ ++ manufacture_id = (uint32_t)jedec_id[0]; ++ model_id = (uint32_t)(jedec_id[1] << 8 | jedec_id[2]); ++ ++ for (chip = flashchips; chip && chip->name; chip++) { ++ if (chip->manufacture_id == manufacture_id && chip->model_id == model_id) { ++ break; ++ } ++ } ++ ++ flash->bios_size = (hwseq_data.size_comp0 + hwseq_data.size_comp1) / 1024; ++ ++ /* We only replace base information. The functions still use hw sequency, like read and write */ ++ flash->chip->vendor = chip->vendor; ++ flash->chip->name = chip->name; ++ flash->chip->manufacture_id = chip->manufacture_id; ++ flash->chip->model_id = chip->model_id; ++ flash->chip->total_size = chip->total_size; ++ flash->chip->page_size = chip->page_size; ++ ++ msg_cdbg("Hardware sequencing reports %d attached SPI flash chip", ++ (hwseq_data.size_comp1 != 0) ? 2 : 1); ++ if (hwseq_data.size_comp1 != 0) ++ msg_cdbg("s with a combined"); ++ else ++ msg_cdbg(" with a"); ++ msg_cdbg(" density of %d kB.\n", flash->chip->total_size); ++ ++ eraser = &(flash->chip->block_erasers[0]); ++ tmp = mmio_readl(ich_spibar + DENVERTON_REG_BFPREG); ++ dnv_bios_region_start = ((tmp & DENVERTON_BFPREG_PRB) >> DENVERTON_BFPREG_PRB_OFF) << 12; ++ dnv_bios_region_limit = ((tmp & DENVERTON_BFPREG_PRL) >> ++ DENVERTON_BFPREG_PRL_OFF) << 12 | ((1 << 12) -1); ++ dnv_bios_region_size = dnv_bios_region_limit - dnv_bios_region_start + 1; ++ eraser->eraseblocks[0].size = 4 * 1024; // 4K ++ eraser->eraseblocks[0].count = dnv_bios_region_size / ++ eraser->eraseblocks[0].size; ++ ++ flash->chip->tested = TEST_OK_PREW; ++ return 1; ++} ++ ++static int dnv_block_check(struct flashctx *flash, uint32_t addr, uint32_t len, SPI_SMI_CMD cmd) ++{ ++ char msg[3][4][32] = { ++ {"Read", "read", "", "Reading"}, ++ {"Erase", "erase", "Not erasing anthing.", "Erasing"}, ++ {"Write", "write", "", "Writing"}}; ++ ++ /* Although the hardware supports this (it would erase the whole block ++ * containing the address) we play safe here. */ ++ if (addr % DELL_DENVERTON_BLOCK_SIZE != 0) { ++ msg_cerr("%s address 0x%06x is not aligned to the %s " ++ "block boundary (any multiple of %d). %s\n", ++ msg[cmd][0], addr, msg[cmd][1], DELL_DENVERTON_BLOCK_SIZE, msg[cmd][2]); ++ return -1; ++ } ++ ++ if (addr + len > flash->chip->total_size * 1024) { ++ msg_perr("Request to %s some inaccessible memory address(es)" ++ " (addr=0x%x, len=%d). %s\n", msg[cmd][1], ++ addr, len, msg[cmd][2]); ++ return -1; ++ } ++ ++ msg_pdbg("%s %d bytes starting at 0x%06x.\n", msg[cmd][3], len, addr); ++ return 0; ++} ++ ++static int dnv_smi_spi(struct flashctx *flash, uint8_t *buf, uint32_t addr, ++ uint32_t len, SPI_SMI_CMD cmd) ++{ ++ int32_t ret = 0; ++ uint32_t block_index = 0; ++ ++ ret = dnv_block_check(flash, addr, len, cmd); ++ if (ret == 0) { ++ for (block_index = 0; block_index * DELL_DENVERTON_BLOCK_SIZE < len; block_index++ ) { ++ if ((ret = dnv_smi_doit(addr - dnv_bios_region_start, buf, cmd)) != 0) { ++ break; ++ } ++ buf += DELL_DENVERTON_BLOCK_SIZE; ++ addr += DELL_DENVERTON_BLOCK_SIZE; ++ } ++ } ++ return ret; ++} ++ ++static int dnv_smi_erase_spi(struct flashctx *flash, uint32_t addr, uint32_t len) ++{ ++ return dnv_smi_spi(flash, NULL, addr, len, SMI_ERASE_SPI); ++} ++ ++static int dnv_smi_read_spi(struct flashctx *flash, uint8_t *buf, uint32_t addr, uint32_t len) ++{ ++ return dnv_smi_spi(flash, buf, addr, len, SMI_READ_SPI); ++} ++ ++static int dnv_smi_write_spi(struct flashctx *flash, uint8_t *buf, uint32_t addr, uint32_t len) ++{ ++ return dnv_smi_spi(flash, buf, addr, len, SMI_WRITE_SPI); ++} ++ ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + #define ICH_BMWAG(x) ((x >> 24) & 0xff) + #define ICH_BMRAG(x) ((x >> 16) & 0xff) + #define ICH_BRWA(x) ((x >> 8) & 0xff) +@@ -1452,6 +1726,9 @@ static int ich9_handle_frap(uint32_t frap, int i) + msg_pdbg("FREG%i: %s region (0x%08x-0x%08x) is %s.\n", i, + region_names[i], base, (limit | 0x0fff), + access_names[rwperms]); ++#ifdef FORCE10_SPI_CHANGE ++ add_romentry(base, (limit | 0x0fff), region_names[i]); ++#endif + return 0; + } + +@@ -1514,6 +1791,90 @@ static void ich9_set_pr(int i, int read_prot, int write_prot) + msg_gspew("resulted in 0x%08x.\n", mmio_readl(addr)); + } + ++#if DELL_DENVERTON_SUPPORT == 1 ++/* returns 0 if region is unused or r/w */ ++static int dnv_handle_frap(uint32_t frap, int32_t i) ++{ ++ static const char *const access_names[4] = { ++ "locked", "read-only", "write-only", "read-write" ++ }; ++ static const char *const region_names[5] = { ++ "Flash Descriptor", "BIOS", "Management Engine", ++ "Gigabit Ethernet", "Platform Data" ++ }; ++ uint32_t base, limit; ++ int32_t rwperms = (((ICH_BRWA(frap) >> i) & 1) << 1) | ++ (((ICH_BRRA(frap) >> i) & 1) << 0); ++ int32_t offset = DENVERTON_REG_FREG0 + i * 4; ++ uint32_t freg = mmio_readl(ich_spibar + offset); ++ ++ base = ICH_FREG_BASE(freg); ++ limit = ICH_FREG_LIMIT(freg); ++ if (base > limit || (freg == 0 && i > 0)) { ++ /* this FREG is disabled */ ++ msg_pdbg2("0x%02X: 0x%08x FREG%i: %s region is unused.\n", ++ offset, freg, i, region_names[i]); ++ return 0; ++ } ++ msg_pdbg("0x%02X: 0x%08x ", offset, freg); ++ if (rwperms == 0x3) { ++ msg_pdbg("FREG%i: %s region (0x%08x-0x%08x) is %s.\n", i, ++ region_names[i], base, (limit | 0x0fff), ++ access_names[rwperms]); ++ return 0; ++ } ++ ++ msg_pwarn("FREG%i: Warning: %s region (0x%08x-0x%08x) is %s.\n", i, ++ region_names[i], base, (limit | 0x0fff), ++ access_names[rwperms]); ++ return 1; ++} ++ ++/* returns 0 if range is unused (i.e. r/w) */ ++static int dnv_handle_pr(int32_t i) ++{ ++ static const char *const access_names[3] = { ++ "locked", "read-only", "write-only" ++ }; ++ uint8_t off = DENVERTON_REG_PR0 + (i * 4); ++ uint32_t pr = mmio_readl(ich_spibar + off); ++ uint32_t rwperms = ICH_PR_PERMS(pr); ++ ++ if (rwperms == 0x3) { ++ msg_pdbg2("0x%02X: 0x%08x (PR%u is unused)\n", off, pr, i); ++ return 0; ++ } ++ ++ msg_pdbg("0x%02X: 0x%08x ", off, pr); ++ msg_pwarn("PR%u: Warning: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr), ++ ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]); ++ return 1; ++} ++ ++/* Set/Clear the read and write protection enable bits of PR register @i ++ * according to @read_prot and @write_prot. */ ++static void dnv_set_pr(int32_t i, int32_t read_prot, int32_t write_prot) ++{ ++ void *addr = ich_spibar + DENVERTON_REG_PR0 + (i * 4); ++ uint32_t old = mmio_readl(addr); ++ uint32_t new; ++ ++ msg_gspew("PR%u is 0x%08x", i, old); ++ new = old & ~((1 << DENVERTON_PR_RP_OFF) | (1 << DENVERTON_PR_WP_OFF)); ++ if (read_prot) ++ new |= (1 << DENVERTON_PR_RP_OFF); ++ if (write_prot) ++ new |= (1 << DENVERTON_PR_WP_OFF); ++ if (old == new) { ++ msg_gspew(" already.\n"); ++ return; ++ } ++ msg_gspew(", trying to set it to 0x%08x ", new); ++ rmmio_writel(new, addr); ++ msg_gspew("resulted in 0x%08x.\n", mmio_readl(addr)); ++} ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ + static const struct spi_programmer spi_programmer_ich7 = { + .type = SPI_CONTROLLER_ICH7, + .max_data_read = 64, +@@ -1545,12 +1906,21 @@ static const struct opaque_programmer opaque_programmer_ich_hwseq = { + .erase = ich_hwseq_block_erase, + }; + +-int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, +- enum ich_chipset ich_gen) ++#if DELL_DENVERTON_SUPPORT == 1 ++static const struct opaque_programmer opaque_master_dnv_hwseq = { ++ .max_data_read = 64, ++ .max_data_write = 64, ++ .probe = dnv_hwseq_probe, ++ .read = dnv_smi_read_spi, ++ .write = dnv_smi_write_spi, ++ .erase = dnv_smi_erase_spi, ++}; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ ++ ++int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_gen) + { + int i; +- uint8_t old, new; +- uint16_t spibar_offset, tmp2; ++ uint16_t tmp2; + uint32_t tmp; + char *arg; + int ich_spi_force = 0; +@@ -1564,42 +1934,18 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, + } ich_spi_mode = ich_auto; + + ich_generation = ich_gen; +- +- switch (ich_generation) { +- case CHIPSET_ICH_UNKNOWN: +- return ERROR_FATAL; +- case CHIPSET_ICH7: +- case CHIPSET_ICH8: +- spibar_offset = 0x3020; +- break; +- case CHIPSET_ICH9: +- default: /* Future version might behave the same */ +- spibar_offset = 0x3800; +- break; +- } +- +- /* SPIBAR is at RCRB+0x3020 for ICH[78] and RCRB+0x3800 for ICH9. */ +- msg_pdbg("SPIBAR = 0x%x + 0x%04x\n", base, spibar_offset); +- +- /* Assign Virtual Address */ +- ich_spibar = rcrb + spibar_offset; ++ ich_spibar = spibar; + + switch (ich_generation) { + case CHIPSET_ICH7: ++ case CHIPSET_TUNNEL_CREEK: ++ case CHIPSET_CENTERTON: + msg_pdbg("0x00: 0x%04x (SPIS)\n", + mmio_readw(ich_spibar + 0)); + msg_pdbg("0x02: 0x%04x (SPIC)\n", + mmio_readw(ich_spibar + 2)); + msg_pdbg("0x04: 0x%08x (SPIA)\n", + mmio_readl(ich_spibar + 4)); +- for (i = 0; i < 8; i++) { +- int offs; +- offs = 8 + (i * 8); +- msg_pdbg("0x%02x: 0x%08x (SPID%d)\n", offs, +- mmio_readl(ich_spibar + offs), i); +- msg_pdbg("0x%02x: 0x%08x (SPID%d+4)\n", offs + 4, +- mmio_readl(ich_spibar + offs + 4), i); +- } + ichspi_bbar = mmio_readl(ich_spibar + 0x50); + msg_pdbg("0x50: 0x%08x (BBAR)\n", + ichspi_bbar); +@@ -1625,7 +1971,123 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, + ich_set_bbar(0); + register_spi_programmer(&spi_programmer_ich7); + break; ++#if DELL_DENVERTON_SUPPORT == 1 ++ case CHIPSET_DENVERTON: ++ ++ tmp2 = mmio_readw(ich_spibar + DENVERTON_REG_HSFS); ++ msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); ++ if (tmp2 & DENVERTON_HSFS_FLOCKDN) { ++ msg_pwarn("Warning: SPI Configuration Lockdown activated.\n"); ++ ichspi_lock = 1; ++ } ++ if (tmp2 & DENVERTON_HSFS_FDV) ++ desc_valid = 1; ++ if (!(tmp2 & DENVERTON_HSFS_FDOPSS) && desc_valid) ++ msg_pinfo("The Flash Descriptor Override Strap-Pin is set. " ++ "Restrictions implied by\n" ++ "the Master Section of the flash descriptor are " ++ "NOT in effect. Please note\n" ++ "that Protected Range (PR) restrictions still apply.\n"); ++ if (desc_valid) { ++ tmp2 = mmio_readw(ich_spibar + DENVERTON_REG_HSFC); ++ msg_pdbg("0x06: 0x%04x (HSFC)\n", tmp2); ++ } ++ ++ tmp = mmio_readl(ich_spibar + DENVERTON_REG_FADDR); ++ msg_pdbg2("0x08: 0x%08x (FADDR)\n", tmp); ++ ++ if (desc_valid) { ++ tmp = mmio_readl(ich_spibar + DENVERTON_REG_FRAP); ++ msg_pdbg("0x50: 0x%08x (FRAP)", tmp); ++ ++ /* Handle FREGx and FRAP registers */ ++ for (i=0; i < 5; i++) ++ ich_spi_rw_restricted |= dnv_handle_frap(tmp, i); ++ if (ich_spi_rw_restricted) ++ msg_pwarn("Not all flash regions are freely accessible " ++ "by flashrom. This is most likely\n" ++ "due to an active ME. " ++ "Please see http://flashrom.org/ME for details.\n"); ++ } ++ ++ /* Handle PR registers */ ++ for (i = 0; i < 5; i++) { ++ if (!ichspi_lock) ++ dnv_set_pr(i, 0, 0); ++ ich_spi_rw_restricted |= dnv_handle_pr(i); ++ } ++ ++ if (ich_spi_force) ++ msg_pinfo("Continuing with write support because " ++ "the user forced us to!\n"); ++ ++ if (desc_valid) { ++ tmp = mmio_readl(ich_spibar + DENVERTON_REG_VSCC0); ++ msg_pdbg("0xC4: 0x%08x (VSCC0)\n", tmp); ++ ++ tmp = mmio_readl(ich_spibar + DENVERTON_REG_VSCC1); ++ msg_pdbg("0xC8: 0x%08x (VSCC1)\n", tmp); ++ ++ if (read_ich_descriptors_via_fdo(ich_spibar, &desc) == ICH_RET_OK) ++ prettyprint_ich_descriptors(ich_gen, &desc); ++ ++ /* If the descriptor is valid and indicates multiple ++ * flash devices we need to use hwseq to be able to ++ * access the second flash device. ++ */ ++ if (ich_spi_mode == ich_auto && desc.content.NC != 0) { ++ msg_pinfo("Enabling hardware sequencing due to " ++ "multiple flash chips detected.\n"); ++ ich_spi_mode = ich_hwseq; ++ } ++ } ++ ++ if (ich_spi_mode == ich_auto && ichspi_lock) { ++ msg_pinfo("Enabling hardware sequencing because " ++ "some important opcode is locked.\n"); ++ ich_spi_mode = ich_hwseq; ++ } ++ ++ if (ich_spi_mode == ich_auto && ichspi_lock) { ++ msg_pinfo("Enabling hardware sequencing because " ++ "some important opcode is locked.\n"); ++ ich_spi_mode = ich_hwseq; ++ } ++ ++ if (ich_spi_mode == ich_hwseq) { ++ if (!desc_valid) { ++ msg_perr("Hardware sequencing was requested " ++ "but the flash descriptor is not valid. Aborting.\n"); ++ return ERROR_FATAL; ++ } ++ ++ uint32_t tmpi = getFCBA_component_density(&desc, 0); ++ if (tmpi < 0) { ++ msg_perr("Could not determine density of " ++ "flash component %d.\n", 0); ++ return ERROR_FATAL; ++ } ++ hwseq_data.size_comp0 = tmpi; ++ ++ tmpi = getFCBA_component_density(&desc, 1); ++ if (tmpi < 0) { ++ msg_perr("Could not determine density of flash component %d.\n", 1); ++ return ERROR_FATAL; ++ } ++ hwseq_data.size_comp1 = tmpi; ++ ++ register_opaque_programmer(&opaque_master_dnv_hwseq); ++ } else { ++ msg_perr("[%s:%d] Error!!!\n", __func__, __LINE__); ++ return -1; ++ } ++ ++ break; ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + case CHIPSET_ICH8: ++#ifdef DELL_AVOTON_SUPPORT ++ case CHIPSET_AVOTON: ++#endif + default: /* Future version might behave the same */ + arg = extract_programmer_param("ich_spi_mode"); + if (arg && !strcmp(arg, "hwseq")) { +@@ -1669,7 +2131,11 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, + msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); + prettyprint_ich9_reg_hsfs(tmp2); + if (tmp2 & HSFS_FLOCKDN) { ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("Warning: SPI Configuration Lockdown activated.\n"); ++#else + msg_pwarn("Warning: SPI Configuration Lockdown activated.\n"); ++#endif + ichspi_lock = 1; + } + if (tmp2 & HSFS_FDV) +@@ -1690,6 +2156,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, + msg_pdbg2("0x08: 0x%08x (FADDR)\n", tmp); + + if (desc_valid) { ++ + tmp = mmio_readl(ich_spibar + ICH9_REG_FRAP); + msg_pdbg("0x50: 0x%08x (FRAP)\n", tmp); + msg_pdbg("BMWAG 0x%02x, ", ICH_BMWAG(tmp)); +@@ -1750,10 +2217,15 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, + msg_pdbg("VSCC: "); + prettyprint_ich_reg_vscc(tmp, MSG_DEBUG); + } else { ++#ifdef DELL_AVOTON_SUPPORT ++ if (ich_generation != CHIPSET_AVOTON) { ++#endif + ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR); + msg_pdbg("0xA0: 0x%08x (BBAR)\n", + ichspi_bbar); +- ++#ifdef DELL_AVOTON_SUPPORT ++ } ++#endif + if (desc_valid) { + tmp = mmio_readl(ich_spibar + ICH9_REG_LVSCC); + msg_pdbg("0xC4: 0x%08x (LVSCC)\n", tmp); +@@ -1811,21 +2283,6 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, + break; + } + +- old = pci_read_byte(dev, 0xdc); +- msg_pdbg("SPI Read Configuration: "); +- new = (old >> 2) & 0x3; +- switch (new) { +- case 0: +- case 1: +- case 2: +- msg_pdbg("prefetching %sabled, caching %sabled, ", +- (new & 0x2) ? "en" : "dis", +- (new & 0x1) ? "dis" : "en"); +- break; +- default: +- msg_pdbg("invalid prefetching/caching settings, "); +- break; +- } + return 0; + } + +@@ -1844,7 +2301,9 @@ int via_init_spi(struct pci_dev *dev, uint32_t mmio_base) + { + int i; + +- ich_spibar = physmap("VIA SPI MMIO registers", mmio_base, 0x70); ++ ich_spibar = rphysmap("VIA SPI MMIO registers", mmio_base, 0x70); ++ if (ich_spibar == ERROR_PTR) ++ return ERROR_FATAL; + /* Do we really need no write enable? Like the LPC one at D17F0 0x40 */ + + /* Not sure if it speaks all these bus protocols. */ +diff --git a/internal.c b/internal.c +index ab3c81f..30b184f 100644 +--- a/internal.c ++++ b/internal.c +@@ -331,9 +331,8 @@ int internal_init(void) + return ret; + + #if defined(__i386__) || defined(__x86_64__) +- /* Probe unconditionally for IT87* LPC->SPI translation and for +- * IT87* Parallel write enable. +- */ ++ /* Probe unconditionally for ITE Super I/O chips. This enables LPC->SPI translation on IT87* and ++ * parallel writes on IT8705F. Also, this handles the manual chip select for Gigabyte's DualBIOS. */ + init_superio_ite(); + #endif + +diff --git a/it85spi.c b/it85spi.c +index 0b074eb..7efc680 100644 +--- a/it85spi.c ++++ b/it85spi.c +@@ -262,6 +262,9 @@ static int it85xx_spi_common_init(struct superio s) + * Major TODO here, and it will be a lot of work. + */ + base = (chipaddr)physmap("it85 communication", 0xFFFFF000, 0x1000); ++ if (base == (chipaddr)ERROR_PTR) ++ return 1; ++ + msg_pdbg("%s():%d base=0x%08x\n", __func__, __LINE__, + (unsigned int)base); + ce_high = (unsigned char *)(base + 0xE00); /* 0xFFFFFE00 */ +diff --git a/it87spi.c b/it87spi.c +index 8e4e0ad..be7f234 100644 +--- a/it87spi.c ++++ b/it87spi.c +@@ -27,6 +27,7 @@ + + #include + #include ++#include + #include "flash.h" + #include "chipdrivers.h" + #include "programmer.h" +@@ -36,7 +37,7 @@ + #define ITE_SUPERIO_PORT1 0x2e + #define ITE_SUPERIO_PORT2 0x4e + +-uint16_t it8716f_flashport = 0; ++static uint16_t it8716f_flashport = 0; + /* use fast 33MHz SPI (<>0) or slow 16MHz (0) */ + static int fast_spi = 1; + +@@ -124,10 +125,40 @@ static const struct spi_programmer spi_programmer_it87xx = { + static uint16_t it87spi_probe(uint16_t port) + { + uint8_t tmp = 0; +- char *portpos = NULL; + uint16_t flashport = 0; + + enter_conf_mode_ite(port); ++ ++ char *param = extract_programmer_param("dualbiosindex"); ++ if (param != NULL) { ++ sio_write(port, 0x07, 0x07); /* Select GPIO LDN */ ++ tmp = sio_read(port, 0xEF); ++ if (*param == '\0') { /* Print current setting only. */ ++ free(param); ++ } else { ++ char *dualbiosindex_suffix; ++ errno = 0; ++ long chip_index = strtol(param, &dualbiosindex_suffix, 0); ++ free(param); ++ if (errno != 0 || *dualbiosindex_suffix != '\0' || chip_index < 0 || chip_index > 1) { ++ msg_perr("DualBIOS: Invalid chip index requested - choose 0 or 1.\n"); ++ exit_conf_mode_ite(port); ++ return 1; ++ } ++ if (chip_index != (tmp & 1)) { ++ msg_pdbg("DualBIOS: Previous chip index: %d\n", tmp & 1); ++ sio_write(port, 0xEF, (tmp & 0xFE) | chip_index); ++ tmp = sio_read(port, 0xEF); ++ if ((tmp & 1) != chip_index) { ++ msg_perr("DualBIOS: Chip selection failed.\n"); ++ exit_conf_mode_ite(port); ++ return 1; ++ } ++ } ++ } ++ msg_pinfo("DualBIOS: Selected chip: %d\n", tmp & 1); ++ } ++ + /* NOLDN, reg 0x24, mask out lowest bit (suspend) */ + tmp = sio_read(port, 0x24) & 0xFE; + /* Check if LPC->SPI translation is active. */ +@@ -163,11 +194,11 @@ static uint16_t it87spi_probe(uint16_t port) + flashport |= sio_read(port, 0x65); + msg_pdbg("Serial flash port 0x%04x\n", flashport); + /* Non-default port requested? */ +- portpos = extract_programmer_param("it87spiport"); +- if (portpos) { ++ param = extract_programmer_param("it87spiport"); ++ if (param) { + char *endptr = NULL; + unsigned long forced_flashport; +- forced_flashport = strtoul(portpos, &endptr, 0); ++ forced_flashport = strtoul(param, &endptr, 0); + /* Port 0, port >0x1000, unaligned ports and garbage strings + * are rejected. + */ +@@ -180,7 +211,8 @@ static uint16_t it87spi_probe(uint16_t port) + msg_perr("Error: it87spiport specified, but no valid " + "port specified.\nPort must be a multiple of " + "0x8 and lie between 0x100 and 0xff8.\n"); +- free(portpos); ++ exit_conf_mode_ite(port); ++ free(param); + return 1; + } else { + flashport = (uint16_t)forced_flashport; +@@ -190,7 +222,7 @@ static uint16_t it87spi_probe(uint16_t port) + sio_write(port, 0x65, (flashport & 0xff)); + } + } +- free(portpos); ++ free(param); + exit_conf_mode_ite(port); + it8716f_flashport = flashport; + if (internal_buses_supported & BUS_SPI) +@@ -228,6 +260,7 @@ int init_superio_ite(void) + case 0x8716: + case 0x8718: + case 0x8720: ++ case 0x8728: + ret |= it87spi_probe(superios[i].port); + break; + default: +diff --git a/layout.c b/layout.c +index 1bd3152..d00c16c 100644 +--- a/layout.c ++++ b/layout.c +@@ -3,6 +3,7 @@ + * + * Copyright (C) 2005-2008 coresystems GmbH + * (Written by Stefan Reinauer for coresystems GmbH) ++ * Copyright (C) 2011-2013 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by +@@ -25,24 +26,23 @@ + #include "flash.h" + #include "programmer.h" + +-static int romimages = 0; +- + #define MAX_ROMLAYOUT 32 + + typedef struct { +- unsigned int start; +- unsigned int end; ++ chipoff_t start; ++ chipoff_t end; + unsigned int included; + char name[256]; +-} romlayout_t; ++} romentry_t; + +-/* include_args lists arguments specified at the command line with -i. They +- * must be processed at some point so that desired regions are marked as +- * "included" in the rom_entries list. +- */ ++/* rom_entries store the entries specified in a layout file and associated run-time data */ ++static romentry_t rom_entries[MAX_ROMLAYOUT]; ++static int num_rom_entries = 0; /* the number of successfully parsed rom_entries */ ++ ++/* include_args holds the arguments specified at the command line with -i. They must be processed at some point ++ * so that desired regions are marked as "included" in the rom_entries list. */ + static char *include_args[MAX_ROMLAYOUT]; +-static int num_include_args = 0; /* the number of valid entries. */ +-static romlayout_t rom_entries[MAX_ROMLAYOUT]; ++static int num_include_args = 0; /* the number of valid include_args. */ + + #ifndef __LIBPAYLOAD__ + int read_romlayout(char *name) +@@ -62,12 +62,13 @@ int read_romlayout(char *name) + while (!feof(romlayout)) { + char *tstr1, *tstr2; + +- if (romimages >= MAX_ROMLAYOUT) { ++ if (num_rom_entries >= MAX_ROMLAYOUT) { + msg_gerr("Maximum number of ROM images (%i) in layout " + "file reached.\n", MAX_ROMLAYOUT); ++ fclose(romlayout); + return 1; + } +- if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[romimages].name)) ++ if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[num_rom_entries].name)) + continue; + #if 0 + // fscanf does not like arbitrary comments like that :( later +@@ -82,13 +83,13 @@ int read_romlayout(char *name) + fclose(romlayout); + return 1; + } +- rom_entries[romimages].start = strtol(tstr1, (char **)NULL, 16); +- rom_entries[romimages].end = strtol(tstr2, (char **)NULL, 16); +- rom_entries[romimages].included = 0; +- romimages++; ++ rom_entries[num_rom_entries].start = strtol(tstr1, (char **)NULL, 16); ++ rom_entries[num_rom_entries].end = strtol(tstr2, (char **)NULL, 16); ++ rom_entries[num_rom_entries].included = 0; ++ num_rom_entries++; + } + +- for (i = 0; i < romimages; i++) { ++ for (i = 0; i < num_rom_entries; i++) { + msg_gdbg("romlayout %08x - %08x named %s\n", + rom_entries[i].start, + rom_entries[i].end, rom_entries[i].name); +@@ -100,6 +101,33 @@ int read_romlayout(char *name) + } + #endif + ++ ++#ifdef FORCE10_SPI_CHANGE ++int add_romentry(chipoff_t start, chipoff_t end, const char *name) ++{ ++ int len = 0; ++ ++ if (num_rom_entries >= MAX_ROMLAYOUT) { ++ msg_gerr("Maximum number of ROM images (%i) in layout " ++ "file reached.\n", MAX_ROMLAYOUT); ++ return 1; ++ } ++ rom_entries[num_rom_entries].start = start; ++ rom_entries[num_rom_entries].end = end; ++ rom_entries[num_rom_entries].included = 1; ++ len = strlen(name); ++ if (len > 256) { ++ msg_gdbg("terminating rom entry name to 256 as it exceeds max length\n"); ++ len = 255; ++ } ++ strncpy(rom_entries[num_rom_entries].name, name, len); ++ msg_gdbg("Adding rom entry: %08x - %08x named %s\n", rom_entries[num_rom_entries].start, ++ rom_entries[num_rom_entries].end, rom_entries[num_rom_entries].name); ++ num_rom_entries++; ++ return 0; ++} ++#endif ++ + /* returns the index of the entry (or a negative value if it is not found) */ + int find_include_arg(const char *const name) + { +@@ -139,11 +167,11 @@ static int find_romentry(char *name) + { + int i; + +- if (!romimages) ++ if (num_rom_entries == 0) + return -1; + + msg_gspew("Looking for region \"%s\"... ", name); +- for (i = 0; i < romimages; i++) { ++ for (i = 0; i < num_rom_entries; i++) { + if (!strcmp(rom_entries[i].name, name)) { + rom_entries[i].included = 1; + msg_gspew("found.\n"); +@@ -166,7 +194,7 @@ int process_include_args(void) + return 0; + + /* User has specified an area, but no layout file is loaded. */ +- if (!romimages) { ++ if (num_rom_entries == 0) { + msg_gerr("Region requested (with -i \"%s\"), " + "but no layout data is available.\n", + include_args[0]); +@@ -190,15 +218,30 @@ int process_include_args(void) + return 0; + } + +-romlayout_t *get_next_included_romentry(unsigned int start) ++void layout_cleanup(void) ++{ ++ int i; ++ for (i = 0; i < num_include_args; i++) { ++ free(include_args[i]); ++ include_args[i] = NULL; ++ } ++ num_include_args = 0; ++ ++ for (i = 0; i < num_rom_entries; i++) { ++ rom_entries[i].included = 0; ++ } ++ num_rom_entries = 0; ++} ++ ++romentry_t *get_next_included_romentry(unsigned int start) + { + int i; + unsigned int best_start = UINT_MAX; +- romlayout_t *best_entry = NULL; +- romlayout_t *cur; ++ romentry_t *best_entry = NULL; ++ romentry_t *cur; + + /* First come, first serve for overlapping regions. */ +- for (i = 0; i < romimages; i++) { ++ for (i = 0; i < num_rom_entries; i++) { + cur = &rom_entries[i]; + if (!cur->included) + continue; +@@ -217,18 +260,43 @@ romlayout_t *get_next_included_romentry(unsigned int start) + return best_entry; + } + +-int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) ++/* Validate and - if needed - normalize layout entries. */ ++int normalize_romentries(const struct flashctx *flash) ++{ ++ chipsize_t total_size = flash->chip->total_size * 1024; ++ int ret = 0; ++ ++ int i; ++ for (i = 0; i < num_rom_entries; i++) { ++ if (rom_entries[i].start >= total_size || rom_entries[i].end >= total_size) { ++ msg_gwarn("Warning: Address range of region \"%s\" exceeds the current chip's " ++ "address space.\n", rom_entries[i].name); ++ if (rom_entries[i].included) ++ ret = 1; ++ } ++ if (rom_entries[i].start > rom_entries[i].end) { ++ msg_gerr("Error: Size of the address range of region \"%s\" is not positive.\n", ++ rom_entries[i].name); ++ ret = 1; ++ } ++ } ++ ++ return ret; ++} ++ ++int build_new_image(const struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) + { + unsigned int start = 0; +- romlayout_t *entry; ++ romentry_t *entry; + unsigned int size = flash->chip->total_size * 1024; + + /* If no regions were specified for inclusion, assume + * that the user wants to write the complete new image. + */ ++#ifndef FORCE10_SPI_CHANGE + if (num_include_args == 0) + return 0; +- ++#endif + /* Non-included romentries are ignored. + * The union of all included romentries is used from the new image. + */ +@@ -239,7 +307,7 @@ int handle_romentries(const struct flashctx *flash, uint8_t *oldcontents, uint8_ + memcpy(newcontents + start, oldcontents + start, + size - start); + break; +- } ++ } + /* For non-included region, copy from old content. */ + if (entry->start > start) + memcpy(newcontents + start, oldcontents + start, +diff --git a/linux_spi.c b/linux_spi.c +index d12fceb..f0c6404 100644 +--- a/linux_spi.c ++++ b/linux_spi.c +@@ -60,7 +60,7 @@ static const struct spi_programmer spi_programmer_linux = { + int linux_spi_init(void) + { + char *p, *endp, *dev; +- uint32_t speed = 0; ++ uint32_t speed_hz = 0; + /* FIXME: make the following configurable by CLI options. */ + /* SPI mode 0 (beware this also includes: MSB first, CS active low and others */ + const uint8_t mode = SPI_MODE_0; +@@ -68,7 +68,7 @@ int linux_spi_init(void) + + p = extract_programmer_param("spispeed"); + if (p && strlen(p)) { +- speed = (uint32_t)strtoul(p, &endp, 10) * 1024; ++ speed_hz = (uint32_t)strtoul(p, &endp, 10) * 1000; + if (p == endp) { + msg_perr("%s: invalid clock: %s kHz\n", __func__, p); + free(p); +@@ -98,14 +98,14 @@ int linux_spi_init(void) + return 1; + /* We rely on the shutdown function for cleanup from here on. */ + +- if (speed > 0) { +- if (ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed) == -1) { ++ if (speed_hz > 0) { ++ if (ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed_hz) == -1) { + msg_perr("%s: failed to set speed to %d Hz: %s\n", +- __func__, speed, strerror(errno)); ++ __func__, speed_hz, strerror(errno)); + return 1; + } + +- msg_pdbg("Using %d kHz clock\n", speed); ++ msg_pdbg("Using %d kHz clock\n", speed_hz/1000); + } + + if (ioctl(fd, SPI_IOC_WR_MODE, &mode) == -1) { +diff --git a/mcp6x_spi.c b/mcp6x_spi.c +index ac40557..20e9bd8 100644 +--- a/mcp6x_spi.c ++++ b/mcp6x_spi.c +@@ -135,25 +135,20 @@ int mcp6x_spi_init(int want_spi) + + /* Accessing a NULL pointer BAR is evil. Don't do it. */ + if (!mcp6x_spibaraddr && want_spi) { +- msg_perr("Error: Chipset is strapped for SPI, but MCP SPI BAR " +- "is invalid.\n"); ++ msg_perr("Error: Chipset is strapped for SPI, but MCP SPI BAR is invalid.\n"); + return 1; + } else if (!mcp6x_spibaraddr && !want_spi) { + msg_pdbg("MCP SPI is not used.\n"); + return 0; + } else if (mcp6x_spibaraddr && !want_spi) { +- msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently" +- " doesn't have SPI enabled.\n"); ++ msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled.\n"); + /* FIXME: Should we enable SPI anyway? */ + return 0; + } + /* Map the BAR. Bytewise/wordwise access at 0x530 and 0x540. */ +- mcp6x_spibar = physmap("NVIDIA MCP6x SPI", mcp6x_spibaraddr, 0x544); +- +-#if 0 +- /* FIXME: Run the physunmap in a shutdown function. */ +- physunmap(mcp6x_spibar, 0x544); +-#endif ++ mcp6x_spibar = rphysmap("NVIDIA MCP6x SPI", mcp6x_spibaraddr, 0x544); ++ if (mcp6x_spibar == ERROR_PTR) ++ return 1; + + status = mmio_readw(mcp6x_spibar + 0x530); + msg_pdbg("SPI control is 0x%04x, req=%i, gnt=%i\n", +diff --git a/nic3com.c b/nic3com.c +index 8d67b54..27e28c7 100644 +--- a/nic3com.c ++++ b/nic3com.c +@@ -96,6 +96,8 @@ int nic3com_init(void) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); ++ if (!io_base_addr) ++ return 1; + + id = dev->device_id; + +diff --git a/nicintel.c b/nicintel.c +index 56678e7..98ba29f 100644 +--- a/nicintel.c ++++ b/nicintel.c +@@ -59,13 +59,6 @@ static const struct par_programmer par_programmer_nicintel = { + .chip_writen = fallback_chip_writen, + }; + +-static int nicintel_shutdown(void *data) +-{ +- physunmap(nicintel_control_bar, NICINTEL_CONTROL_MEMMAP_SIZE); +- physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); +- return 0; +-} +- + int nicintel_init(void) + { + struct pci_dev *dev = NULL; +@@ -83,18 +76,19 @@ int nicintel_init(void) + return 1; + + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); +- nicintel_bar = physmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); ++ if (!addr) ++ return 1; ++ ++ nicintel_bar = rphysmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); + if (nicintel_bar == ERROR_PTR) +- goto error_out_unmap; ++ return 1; + + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); +- /* FIXME: This is not an aligned mapping. Use 4k? */ +- nicintel_control_bar = physmap("Intel NIC control/status reg", +- addr, NICINTEL_CONTROL_MEMMAP_SIZE); +- if (nicintel_control_bar == ERROR_PTR) +- goto error_out; ++ if (!addr) ++ return 1; + +- if (register_shutdown(nicintel_shutdown, NULL)) ++ nicintel_control_bar = rphysmap("Intel NIC control/status reg", addr, NICINTEL_CONTROL_MEMMAP_SIZE); ++ if (nicintel_control_bar == ERROR_PTR) + return 1; + + /* FIXME: This register is pretty undocumented in all publicly available +@@ -112,11 +106,6 @@ int nicintel_init(void) + register_par_programmer(&par_programmer_nicintel, BUS_PARALLEL); + + return 0; +- +-error_out_unmap: +- physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); +-error_out: +- return 1; + } + + static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val, +diff --git a/nicintel_spi.c b/nicintel_spi.c +index 0045c09..1522c9b 100644 +--- a/nicintel_spi.c ++++ b/nicintel_spi.c +@@ -19,10 +19,16 @@ + */ + + /* +- * Datasheet: ++ * Datasheets: + * PCI/PCI-X Family of Gigabit Ethernet Controllers Software Developer's Manual + * 82540EP/EM, 82541xx, 82544GC/EI, 82545GM/EM, 82546GB/EB, and 82547xx +- * http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf ++ * http://www.intel.com/content/www/us/en/ethernet-controllers/pci-pci-x-family-gbe-controllers-software-dev-manual.html ++ * ++ * PCIe GbE Controllers Open Source Software Developer's Manual ++ * http://www.intel.com/content/www/us/en/ethernet-controllers/pcie-gbe-controllers-open-source-manual.html ++ * ++ * Intel 82574 Gigabit Ethernet Controller Family Datasheet ++ * http://www.intel.com/content/www/us/en/ethernet-controllers/82574l-gbe-controller-datasheet.html + */ + + #include +@@ -72,6 +78,7 @@ const struct dev_entry nics_intel_spi[] = { + {PCI_VENDOR_ID_INTEL, 0x1076, OK, "Intel", "82541GI Gigabit Ethernet Controller"}, + {PCI_VENDOR_ID_INTEL, 0x107c, OK, "Intel", "82541PI Gigabit Ethernet Controller"}, + {PCI_VENDOR_ID_INTEL, 0x10b9, OK, "Intel", "82572EI Gigabit Ethernet Controller"}, ++ {PCI_VENDOR_ID_INTEL, 0x10d3, OK, "Intel", "82574L Gigabit Ethernet Controller"}, + + {0}, + }; +@@ -151,16 +158,12 @@ static int nicintel_spi_shutdown(void *data) + { + uint32_t tmp; + +- /* Disable writes manually. See the comment about EECD in +- * nicintel_spi_init() for details. +- */ ++ /* Disable writes manually. See the comment about EECD in nicintel_spi_init() for details. */ + tmp = pci_mmio_readl(nicintel_spibar + EECD); + tmp &= ~FLASH_WRITES_ENABLED; + tmp |= FLASH_WRITES_DISABLED; + pci_mmio_writel(tmp, nicintel_spibar + EECD); + +- physunmap(nicintel_spibar, MEMMAP_SIZE); +- + return 0; + } + +@@ -177,8 +180,13 @@ int nicintel_spi_init(void) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); +- nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", +- io_base_addr, MEMMAP_SIZE); ++ if (!io_base_addr) ++ return 1; ++ ++ nicintel_spibar = rphysmap("Intel Gigabit NIC w/ SPI flash", io_base_addr, MEMMAP_SIZE); ++ if (nicintel_spibar == ERROR_PTR) ++ return 1; ++ + /* Automatic restore of EECD on shutdown is not possible because EECD + * does not only contain FLASH_WRITES_DISABLED|FLASH_WRITES_ENABLED, + * but other bits with side effects as well. Those other bits must be +diff --git a/nicnatsemi.c b/nicnatsemi.c +index d62a73f..cb8da6d 100644 +--- a/nicnatsemi.c ++++ b/nicnatsemi.c +@@ -64,6 +64,8 @@ int nicnatsemi_init(void) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); ++ if (!io_base_addr) ++ return 1; + + /* The datasheet shows address lines MA0-MA16 in one place and MA0-MA15 + * in another. My NIC has MA16 connected to A16 on the boot ROM socket +diff --git a/nicrealtek.c b/nicrealtek.c +index fb8e9e1..02fbd39 100644 +--- a/nicrealtek.c ++++ b/nicrealtek.c +@@ -69,6 +69,8 @@ int nicrealtek_init(void) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); ++ if (!io_base_addr) ++ return 1; + + /* Beware, this ignores the vendor ID! */ + switch (dev->device_id) { +diff --git a/ogp_spi.c b/ogp_spi.c +index 0c09d6a..23431d1 100644 +--- a/ogp_spi.c ++++ b/ogp_spi.c +@@ -97,12 +97,6 @@ static const struct bitbang_spi_master bitbang_spi_master_ogp = { + .half_period = 0, + }; + +-static int ogp_spi_shutdown(void *data) +-{ +- physunmap(ogp_spibar, 4096); +- return 0; +-} +- + int ogp_spi_init(void) + { + struct pci_dev *dev = NULL; +@@ -126,8 +120,10 @@ int ogp_spi_init(void) + ogp_reg_sck = OGA1_XP10_CPROM_SCK; + } else { + msg_perr("Invalid or missing rom= parameter.\n"); ++ free(type); + return 1; + } ++ free(type); + + if (rget_io_perms()) + return 1; +@@ -137,9 +133,11 @@ int ogp_spi_init(void) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); +- ogp_spibar = physmap("OGP registers", io_base_addr, 4096); ++ if (!io_base_addr) ++ return 1; + +- if (register_shutdown(ogp_spi_shutdown, NULL)) ++ ogp_spibar = rphysmap("OGP registers", io_base_addr, 4096); ++ if (ogp_spibar == ERROR_PTR) + return 1; + + if (bitbang_spi_init(&bitbang_spi_master_ogp)) +diff --git a/pcidev.c b/pcidev.c +index c7e9d78..3a3f77c 100644 +--- a/pcidev.c ++++ b/pcidev.c +@@ -94,7 +94,7 @@ uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) + + supported_cycles = pci_read_word(dev, PCI_COMMAND); + +- msg_pdbg("Requested BAR is "); ++ msg_pdbg("Requested BAR is of type "); + switch (bartype) { + case TYPE_MEMBAR: + msg_pdbg("MEM"); +diff --git a/physmap.c b/physmap.c +index 932fe75..150c44a 100644 +--- a/physmap.c ++++ b/physmap.c +@@ -21,11 +21,13 @@ + */ + + #include ++#include + #include + #include + #include + #include + #include "flash.h" ++#include "programmer.h" + #include "hwaccess.h" + + #if !defined(__DJGPP__) && !defined(__LIBPAYLOAD__) +@@ -88,7 +90,7 @@ static void *sys_physmap(uintptr_t phys_addr, size_t len) + #define sys_physmap_rw_uncached sys_physmap + #define sys_physmap_ro_cached sys_physmap + +-void physunmap(void *virt_addr, size_t len) ++void sys_physunmap_unaligned(void *virt_addr, size_t len) + { + __dpmi_meminfo mi; + +@@ -117,7 +119,7 @@ void *sys_physmap(uintptr_t phys_addr, size_t len) + #define sys_physmap_rw_uncached sys_physmap + #define sys_physmap_ro_cached sys_physmap + +-void physunmap(void *virt_addr, size_t len) ++void sys_physunmap_unaligned(void *virt_addr, size_t len) + { + } + #elif defined(__MACH__) && defined(__APPLE__) +@@ -138,7 +140,7 @@ static void *sys_physmap(uintptr_t phys_addr, size_t len) + #define sys_physmap_rw_uncached sys_physmap + #define sys_physmap_ro_cached sys_physmap + +-void physunmap(void *virt_addr, size_t len) ++void sys_physunmap_unaligned(void *virt_addr, size_t len) + { + unmap_physical(virt_addr, len); + } +@@ -164,12 +166,11 @@ static void *sys_physmap_rw_uncached(uintptr_t phys_addr, size_t len) + /* Open the memory device UNCACHED. Important for MMIO. */ + if (-1 == (fd_mem = open(MEM_DEV, O_RDWR | O_SYNC))) { + msg_perr("Critical error: open(" MEM_DEV "): %s\n", strerror(errno)); +- exit(2); ++ return ERROR_PTR; + } + } + +- virt_addr = mmap(NULL, len, PROT_WRITE | PROT_READ, MAP_SHARED, +- fd_mem, (off_t)phys_addr); ++ virt_addr = mmap(NULL, len, PROT_WRITE | PROT_READ, MAP_SHARED, fd_mem, (off_t)phys_addr); + return MAP_FAILED == virt_addr ? ERROR_PTR : virt_addr; + } + +@@ -184,50 +185,77 @@ static void *sys_physmap_ro_cached(uintptr_t phys_addr, size_t len) + /* Open the memory device CACHED. */ + if (-1 == (fd_mem_cached = open(MEM_DEV, O_RDWR))) { + msg_perr("Critical error: open(" MEM_DEV "): %s\n", strerror(errno)); +- exit(2); ++ return ERROR_PTR; + } + } + +- virt_addr = mmap(NULL, len, PROT_READ, MAP_SHARED, +- fd_mem_cached, (off_t)phys_addr); ++ virt_addr = mmap(NULL, len, PROT_READ, MAP_SHARED, fd_mem_cached, (off_t)phys_addr); + return MAP_FAILED == virt_addr ? ERROR_PTR : virt_addr; + } + +-void physunmap(void *virt_addr, size_t len) ++void sys_physunmap_unaligned(void *virt_addr, size_t len) + { +- if (len == 0) { +- msg_pspew("Not unmapping zero size at %p\n", virt_addr); +- return; +- } +- + munmap(virt_addr, len); + } + #endif + +-#define PHYSMAP_NOFAIL 0 +-#define PHYSMAP_MAYFAIL 1 +-#define PHYSMAP_RW 0 +-#define PHYSMAP_RO 1 ++#define PHYSM_RW 0 ++#define PHYSM_RO 1 ++#define PHYSM_NOCLEANUP 0 ++#define PHYSM_CLEANUP 1 ++#define PHYSM_EXACT 0 ++#define PHYSM_ROUND 1 ++ ++/* Round start to nearest page boundary below and set len so that the resulting address range ends at the lowest ++ * possible page boundary where the original address range is still entirely contained. It returns the ++ * difference between the rounded start address and the original start address. */ ++static uintptr_t round_to_page_boundaries(uintptr_t *start, size_t *len) ++{ ++ uintptr_t page_size = getpagesize(); ++ uintptr_t page_mask = ~(page_size-1); ++ uintptr_t end = *start + *len; ++ uintptr_t old_start = *start; ++ msg_gspew("page_size=%" PRIxPTR "\n", page_size); ++ msg_gspew("pre-rounding: start=0x%0*" PRIxPTR ", len=0x%zx, end=0x%0*" PRIxPTR "\n", ++ PRIxPTR_WIDTH, *start, *len, PRIxPTR_WIDTH, end); ++ *start = *start & page_mask; ++ end = (end + page_size - 1) & page_mask; ++ *len = end - *start; ++ msg_gspew("post-rounding: start=0x%0*" PRIxPTR ", len=0x%zx, end=0x%0*" PRIxPTR "\n", ++ PRIxPTR_WIDTH, *start, *len, PRIxPTR_WIDTH, *start + *len); ++ return old_start - *start; ++} ++ ++struct undo_physmap_data { ++ void *virt_addr; ++ size_t len; ++}; ++ ++static int undo_physmap(void *data) ++{ ++ if (data == NULL) { ++ msg_perr("%s: tried to physunmap without valid data!\n", __func__); ++ return 1; ++ } ++ struct undo_physmap_data *d = data; ++ physunmap_unaligned(d->virt_addr, d->len); ++ free(data); ++ return 0; ++} + +-static void *physmap_common(const char *descr, uintptr_t phys_addr, +- size_t len, int mayfail, int readonly) ++static void *physmap_common(const char *descr, uintptr_t phys_addr, size_t len, bool readonly, bool autocleanup, ++ bool round) + { + void *virt_addr; ++ uintptr_t offset = 0; + + if (len == 0) { + msg_pspew("Not mapping %s, zero size at 0x%0*" PRIxPTR ".\n", descr, PRIxPTR_WIDTH, phys_addr); + return ERROR_PTR; + } + +- if ((getpagesize() - 1) & len) { +- msg_perr("Mapping %s at 0x%0*" PRIxPTR ", unaligned size 0x%zx.\n", +- descr, PRIxPTR_WIDTH, phys_addr, len); +- } +- +- if ((getpagesize() - 1) & phys_addr) { +- msg_perr("Mapping %s, 0x%zx bytes at unaligned 0x%0*" PRIxPTR ".\n", +- descr, len, PRIxPTR_WIDTH, phys_addr); +- } ++ if (round) ++ offset = round_to_page_boundaries(&phys_addr, &len); + + if (readonly) + virt_addr = sys_physmap_ro_cached(phys_addr, len); +@@ -253,23 +281,89 @@ static void *physmap_common(const char *descr, uintptr_t phys_addr, + "and reboot, or reboot into\n" + "single user mode.\n"); + #endif +- if (!mayfail) +- exit(3); ++ return ERROR_PTR; + } + +- return virt_addr; ++ if (autocleanup) { ++ struct undo_physmap_data *d = malloc(sizeof(struct undo_physmap_data)); ++ if (d == NULL) { ++ msg_perr("%s: Out of memory!\n", __func__); ++ physunmap_unaligned(virt_addr, len); ++ return ERROR_PTR; ++ } ++ ++ d->virt_addr = virt_addr; ++ d->len = len; ++ if (register_shutdown(undo_physmap, d) != 0) { ++ msg_perr("%s: Could not register shutdown function!\n", __func__); ++ physunmap_unaligned(virt_addr, len); ++ return ERROR_PTR; ++ } ++ } ++ ++ return virt_addr + offset; ++} ++ ++void physunmap_unaligned(void *virt_addr, size_t len) ++{ ++ /* No need to check for zero size, such mappings would have yielded ERROR_PTR. */ ++ if (virt_addr == ERROR_PTR) { ++#ifndef FORCE10_SPI_CHANGE ++ msg_perr("Trying to unmap a nonexisting mapping!\n" ++ "Please report a bug at flashrom@flashrom.org\n"); ++#else ++ msg_pdbg("Trying to unmap a nonexisting mapping!\n" ++ "Please report a bug at flashrom@flashrom.org\n"); ++#endif ++ return; ++ } ++ ++ sys_physunmap_unaligned(virt_addr, len); ++} ++ ++void physunmap(void *virt_addr, size_t len) ++{ ++ uintptr_t tmp; ++ ++ /* No need to check for zero size, such mappings would have yielded ERROR_PTR. */ ++ if (virt_addr == ERROR_PTR) { ++#ifndef FORCE10_SPI_CHANGE ++ msg_perr("Trying to unmap a nonexisting mapping!\n" ++ "Please report a bug at flashrom@flashrom.org\n"); ++#else ++ msg_pdbg("Trying to unmap a nonexisting mapping!\n" ++ "Please report a bug at flashrom@flashrom.org\n"); ++#endif ++ return; ++ } ++ tmp = (uintptr_t)virt_addr; ++ /* We assume that the virtual address of a page-aligned physical address is page-aligned as well. By ++ * extension, rounding a virtual unaligned address as returned by physmap should yield the same offset ++ * between rounded and original virtual address as between rounded and original physical address. ++ */ ++ round_to_page_boundaries(&tmp, &len); ++ virt_addr = (void *)tmp; ++ physunmap_unaligned(virt_addr, len); + } + + void *physmap(const char *descr, uintptr_t phys_addr, size_t len) + { +- return physmap_common(descr, phys_addr, len, PHYSMAP_NOFAIL, +- PHYSMAP_RW); ++ return physmap_common(descr, phys_addr, len, PHYSM_RW, PHYSM_NOCLEANUP, PHYSM_ROUND); ++} ++ ++void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len) ++{ ++ return physmap_common(descr, phys_addr, len, PHYSM_RW, PHYSM_CLEANUP, PHYSM_ROUND); ++} ++ ++void *physmap_ro(const char *descr, uintptr_t phys_addr, size_t len) ++{ ++ return physmap_common(descr, phys_addr, len, PHYSM_RO, PHYSM_NOCLEANUP, PHYSM_ROUND); + } + +-void *physmap_try_ro(const char *descr, uintptr_t phys_addr, size_t len) ++void *physmap_ro_unaligned(const char *descr, uintptr_t phys_addr, size_t len) + { +- return physmap_common(descr, phys_addr, len, PHYSMAP_MAYFAIL, +- PHYSMAP_RO); ++ return physmap_common(descr, phys_addr, len, PHYSM_RO, PHYSM_NOCLEANUP, PHYSM_EXACT); + } + + /* MSR abstraction implementations for Linux, OpenBSD, FreeBSD/Dragonfly, OSX, libpayload +diff --git a/pony_spi.c b/pony_spi.c +index 101751f..2a3666f 100644 +--- a/pony_spi.c ++++ b/pony_spi.c +@@ -140,6 +140,7 @@ int pony_spi_init(void) + } else if (arg && !strlen(arg)) { + msg_perr("Error: Missing argument for programmer type.\n"); + free(arg); ++ return 1; + } else if (arg){ + msg_perr("Error: Invalid programmer type specified.\n"); + free(arg); +diff --git a/print.c b/print.c +index 6766eeb..6d2921b 100644 +--- a/print.c ++++ b/print.c +@@ -436,12 +436,13 @@ static void print_supported_boards_helper(const struct board_info *boards, + msg_ginfo("%s", b->name); + for (i = 0; i < maxboardlen - strlen(b->name); i++) + msg_ginfo(" "); +- if (b->working == OK) +- msg_ginfo("OK "); +- else if (b->working == NT) +- msg_ginfo("NT "); +- else +- msg_ginfo("BAD "); ++ ++ if (b->working == OK) ++ msg_ginfo("OK "); ++ else if (b->working == NT) ++ msg_ginfo("NT "); ++ else ++ msg_ginfo("BAD "); + + for (e = board_matches; e->vendor_name != NULL; e++) { + if (strcmp(e->vendor_name, b->vendor) +@@ -530,6 +531,7 @@ const struct board_info boards_known[] = { + B("abit", "AN-M2", OK, NULL, NULL), + B("abit", "AV8", OK, NULL, NULL), + B("abit", "AX8", OK, NULL, NULL), ++ B("abit", "BF6", OK, NULL, NULL), + B("abit", "BM6", OK, NULL, NULL), + B("abit", "Fatal1ty F-I90HD", OK, NULL, NULL), + B("abit", "IC7", OK, NULL, NULL), +@@ -695,6 +697,7 @@ const struct board_info boards_known[] = { + B("ASUS", "P5L-VM 1394", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL), + B("ASUS", "P5LD2", NT, NULL, "Untested board enable."), + B("ASUS", "P5LD2-VM", NT, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LD2VM/", "Untested board enable."), ++ B("ASUS", "P5LD2-VM DH", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LD2VM_DH/", NULL), + B("ASUS", "P5LP-LE (Lithium-UL8E)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prodinfoCategory&cc=us&dlc=en&lc=en&product=1159887", "This is an OEM board from HP."), + B("ASUS", "P5LP-LE (Epson OEM)", OK, NULL, "This is an OEM board from Epson (e.g. Endeavor MT7700)."), + B("ASUS", "P5LP-LE", NT, NULL, "This designation is used for OEM boards from HP, Epson and maybe others. The HP names vary and not all of them have been tested yet. Please report any success or failure, thanks."), +diff --git a/programmer.h b/programmer.h +index 4db8d58..d3cc557 100644 +--- a/programmer.h ++++ b/programmer.h +@@ -276,8 +276,11 @@ int processor_flash_enable(void); + + /* physmap.c */ + void *physmap(const char *descr, uintptr_t phys_addr, size_t len); +-void *physmap_try_ro(const char *descr, uintptr_t phys_addr, size_t len); ++void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len); ++void *physmap_ro(const char *descr, uintptr_t phys_addr, size_t len); ++void *physmap_ro_unaligned(const char *descr, uintptr_t phys_addr, size_t len); + void physunmap(void *virt_addr, size_t len); ++void physunmap_unaligned(void *virt_addr, size_t len); + #if CONFIG_INTERNAL == 1 + int setup_cpu_msr(int cpu); + void cleanup_cpu_msr(void); +@@ -287,9 +290,11 @@ int cb_parse_table(const char **vendor, const char **model); + int cb_check_image(uint8_t *bios, int size); + + /* dmi.c */ ++#if defined(__i386__) || defined(__x86_64__) + extern int has_dmi_support; + void dmi_init(void); + int dmi_match(const char *pattern); ++#endif // defined(__i386__) || defined(__x86_64__) + + /* internal.c */ + struct superio { +@@ -550,10 +555,19 @@ int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int sta + int default_spi_write_aai(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); + int register_spi_programmer(const struct spi_programmer *programmer); + +-/* The following enum is needed by ich_descriptor_tool and ich* code. */ ++/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */ + enum ich_chipset { + CHIPSET_ICH_UNKNOWN, +- CHIPSET_ICH7 = 7, ++#ifdef DELL_AVOTON_SUPPORT ++ CHIPSET_AVOTON, ++#endif ++ CHIPSET_ICH, ++ CHIPSET_ICH2345, ++ CHIPSET_ICH6, ++ CHIPSET_POULSBO, /* SCH U* */ ++ CHIPSET_TUNNEL_CREEK, /* Atom E6xx */ ++ CHIPSET_CENTERTON, /* Atom S1220 S1240 S1260 */ ++ CHIPSET_ICH7, + CHIPSET_ICH8, + CHIPSET_ICH9, + CHIPSET_ICH10, +@@ -563,13 +577,15 @@ enum ich_chipset { + CHIPSET_8_SERIES_LYNX_POINT, + CHIPSET_8_SERIES_LYNX_POINT_LP, + CHIPSET_8_SERIES_WELLSBURG, ++#if DELL_DENVERTON_SUPPORT == 1 ++ CHIPSET_DENVERTON, ++#endif /* #if DELL_DENVERTON_SUPPORT == 1 */ + }; + + /* ichspi.c */ + #if CONFIG_INTERNAL == 1 + extern uint32_t ichspi_bbar; +-int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, +- enum ich_chipset ich_generation); ++int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_generation); + int via_init_spi(struct pci_dev *dev, uint32_t mmio_base); + + /* amd_imc.c */ +@@ -659,7 +675,7 @@ typedef int fdtype; + + void sp_flush_incoming(void); + fdtype sp_openserport(char *dev, unsigned int baud); +-void __attribute__((noreturn)) sp_die(char *msg); ++int serialport_config(fdtype fd, unsigned int baud); + extern fdtype sp_fd; + /* expose serialport_shutdown as it's currently used by buspirate */ + int serialport_shutdown(void *data); +diff --git a/rayer_spi.c b/rayer_spi.c +index b312610..189341a 100644 +--- a/rayer_spi.c ++++ b/rayer_spi.c +@@ -17,11 +17,9 @@ + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +-/* Driver for the SPIPGM hardware by "RayeR" Martin Rehak. +- * See http://rayer.ic.cz/elektro/spipgm.htm for schematics and instructions. +- */ +- +-/* This driver uses non-portable direct I/O port accesses which won't work on ++/* Driver for various LPT adapters. ++ * ++ * This driver uses non-portable direct I/O port accesses which won't work on + * any non-x86 platform, and even on x86 there is a high chance there will be + * collisions with any loaded parallel port drivers. + * The big advantage of direct port I/O is OS independence and speed because +@@ -37,21 +35,87 @@ + #include "programmer.h" + #include "hwaccess.h" + +-enum rayer_type { +- TYPE_RAYER, +- TYPE_XILINX_DLC5, +-}; +- + /* We have two sets of pins, out and in. The numbers for both sets are + * independent and are bitshift values, not real pin numbers. + * Default settings are for the RayeR hardware. + */ +-/* Pins for master->slave direction */ +-static int rayer_cs_bit = 5; +-static int rayer_sck_bit = 6; +-static int rayer_mosi_bit = 7; +-/* Pins for slave->master direction */ +-static int rayer_miso_bit = 6; ++ ++struct rayer_programmer { ++ const char *type; ++ const enum test_state status; ++ const char *description; ++ const void *dev_data; ++}; ++ ++struct rayer_pinout { ++ uint8_t cs_bit; ++ uint8_t sck_bit; ++ uint8_t mosi_bit; ++ uint8_t miso_bit; ++ void (*preinit)(const void *); ++ int (*shutdown)(void *); ++}; ++ ++static const struct rayer_pinout rayer_spipgm = { ++ .cs_bit = 5, ++ .sck_bit = 6, ++ .mosi_bit = 7, ++ .miso_bit = 6, ++}; ++ ++static void dlc5_preinit(const void *); ++static int dlc5_shutdown(void *); ++ ++static const struct rayer_pinout xilinx_dlc5 = { ++ .cs_bit = 2, ++ .sck_bit = 1, ++ .mosi_bit = 0, ++ .miso_bit = 4, ++ .preinit = dlc5_preinit, ++ .shutdown = dlc5_shutdown, ++}; ++ ++static void byteblaster_preinit(const void *); ++static int byteblaster_shutdown(void *); ++ ++static const struct rayer_pinout altera_byteblastermv = { ++ .cs_bit = 1, ++ .sck_bit = 0, ++ .mosi_bit = 6, ++ .miso_bit = 7, ++ .preinit = byteblaster_preinit, ++ .shutdown = byteblaster_shutdown, ++}; ++ ++static void stk200_preinit(const void *); ++static int stk200_shutdown(void *); ++ ++static const struct rayer_pinout atmel_stk200 = { ++ .cs_bit = 7, ++ .sck_bit = 4, ++ .mosi_bit = 5, ++ .miso_bit = 6, ++ .preinit = stk200_preinit, ++ .shutdown = stk200_shutdown, ++}; ++ ++static const struct rayer_pinout wiggler_lpt = { ++ .cs_bit = 1, ++ .sck_bit = 2, ++ .mosi_bit = 3, ++ .miso_bit = 7, ++}; ++ ++static const struct rayer_programmer rayer_spi_types[] = { ++ {"rayer", NT, "RayeR SPIPGM", &rayer_spipgm}, ++ {"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5}, ++ {"byteblastermv", OK, "Altera ByteBlasterMV", &altera_byteblastermv}, ++ {"stk200", NT, "Atmel STK200/300 adapter", &atmel_stk200}, ++ {"wiggler", OK, "Wiggler LPT", &wiggler_lpt}, ++ {0}, ++}; ++ ++static const struct rayer_pinout *pinout = NULL; + + static uint16_t lpt_iobase; + +@@ -60,22 +124,22 @@ static uint8_t lpt_outbyte; + + static void rayer_bitbang_set_cs(int val) + { +- lpt_outbyte &= ~(1 << rayer_cs_bit); +- lpt_outbyte |= (val << rayer_cs_bit); ++ lpt_outbyte &= ~(1 << pinout->cs_bit); ++ lpt_outbyte |= (val << pinout->cs_bit); + OUTB(lpt_outbyte, lpt_iobase); + } + + static void rayer_bitbang_set_sck(int val) + { +- lpt_outbyte &= ~(1 << rayer_sck_bit); +- lpt_outbyte |= (val << rayer_sck_bit); ++ lpt_outbyte &= ~(1 << pinout->sck_bit); ++ lpt_outbyte |= (val << pinout->sck_bit); + OUTB(lpt_outbyte, lpt_iobase); + } + + static void rayer_bitbang_set_mosi(int val) + { +- lpt_outbyte &= ~(1 << rayer_mosi_bit); +- lpt_outbyte |= (val << rayer_mosi_bit); ++ lpt_outbyte &= ~(1 << pinout->mosi_bit); ++ lpt_outbyte |= (val << pinout->mosi_bit); + OUTB(lpt_outbyte, lpt_iobase); + } + +@@ -83,8 +147,8 @@ static int rayer_bitbang_get_miso(void) + { + uint8_t tmp; + +- tmp = INB(lpt_iobase + 1); +- tmp = (tmp >> rayer_miso_bit) & 0x1; ++ tmp = INB(lpt_iobase + 1) ^ 0x80; // bit.7 inverted ++ tmp = (tmp >> pinout->miso_bit) & 0x1; + return tmp; + } + +@@ -99,8 +163,8 @@ static const struct bitbang_spi_master bitbang_spi_master_rayer = { + + int rayer_spi_init(void) + { ++ const struct rayer_programmer *prog = rayer_spi_types; + char *arg = NULL; +- enum rayer_type rayer_type = TYPE_RAYER; + + /* Non-default port requested? */ + arg = extract_programmer_param("iobase"); +@@ -138,36 +202,20 @@ int rayer_spi_init(void) + + arg = extract_programmer_param("type"); + if (arg) { +- if (!strcasecmp(arg, "rayer")) { +- rayer_type = TYPE_RAYER; +- } else if (!strcasecmp(arg, "xilinx")) { +- rayer_type = TYPE_XILINX_DLC5; +- } else { ++ for (; prog->type != NULL; prog++) { ++ if (strcasecmp(arg, prog->type) == 0) { ++ break; ++ } ++ } ++ if (prog->type == NULL) { + msg_perr("Error: Invalid device type specified.\n"); + free(arg); + return 1; + } ++ free(arg); + } +- free(arg); +- switch (rayer_type) { +- case TYPE_RAYER: +- msg_pdbg("Using RayeR SPIPGM pinout.\n"); +- /* Bits for master->slave direction */ +- rayer_cs_bit = 5; +- rayer_sck_bit = 6; +- rayer_mosi_bit = 7; +- /* Bits for slave->master direction */ +- rayer_miso_bit = 6; +- break; +- case TYPE_XILINX_DLC5: +- msg_pdbg("Using Xilinx Parallel Cable III (DLC 5) pinout.\n"); +- /* Bits for master->slave direction */ +- rayer_cs_bit = 2; +- rayer_sck_bit = 1; +- rayer_mosi_bit = 0; +- /* Bits for slave->master direction */ +- rayer_miso_bit = 4; +- } ++ msg_pinfo("Using %s pinout.\n", prog->description); ++ pinout = (struct rayer_pinout *)prog->dev_data; + + if (rget_io_perms()) + return 1; +@@ -175,12 +223,60 @@ int rayer_spi_init(void) + /* Get the initial value before writing to any line. */ + lpt_outbyte = INB(lpt_iobase); + ++ if (pinout->shutdown) ++ register_shutdown(pinout->shutdown, (void*)pinout); ++ if (pinout->preinit) ++ pinout->preinit(pinout); ++ + if (bitbang_spi_init(&bitbang_spi_master_rayer)) + return 1; + + return 0; + } + ++static void byteblaster_preinit(const void *data){ ++ msg_pdbg("byteblaster_preinit\n"); ++ /* Assert #EN signal. */ ++ OUTB(2, lpt_iobase + 2 ); ++} ++ ++static int byteblaster_shutdown(void *data){ ++ msg_pdbg("byteblaster_shutdown\n"); ++ /* De-Assert #EN signal. */ ++ OUTB(0, lpt_iobase + 2 ); ++ return 0; ++} ++ ++static void stk200_preinit(const void *data) { ++ msg_pdbg("stk200_init\n"); ++ /* Assert #EN signals, set LED signal. */ ++ lpt_outbyte = (1 << 6) ; ++ OUTB(lpt_outbyte, lpt_iobase); ++} ++ ++static int stk200_shutdown(void *data) { ++ msg_pdbg("stk200_shutdown\n"); ++ /* Assert #EN signals, clear LED signal. */ ++ lpt_outbyte = (1 << 2) | (1 << 3); ++ OUTB(lpt_outbyte, lpt_iobase); ++ return 0; ++} ++ ++static void dlc5_preinit(const void *data) { ++ msg_pdbg("dlc5_preinit\n"); ++ /* Assert pin 6 to receive MISO. */ ++ lpt_outbyte |= (1<<4); ++ OUTB(lpt_outbyte, lpt_iobase); ++} ++ ++static int dlc5_shutdown(void *data) { ++ msg_pdbg("dlc5_shutdown\n"); ++ /* De-assert pin 6 to force MISO low. */ ++ lpt_outbyte &= ~(1<<4); ++ OUTB(lpt_outbyte, lpt_iobase); ++ return 0; ++} ++ + #else + #error PCI port I/O access is not supported on this architecture yet. + #endif +diff --git a/satamv.c b/satamv.c +index c3f27e7..e03508e 100644 +--- a/satamv.c ++++ b/satamv.c +@@ -57,12 +57,6 @@ static const struct par_programmer par_programmer_satamv = { + .chip_writen = fallback_chip_writen, + }; + +-static int satamv_shutdown(void *data) +-{ +- physunmap(mv_bar, 0x20000); +- return 0; +-} +- + /* + * Random notes: + * FCE# Flash Chip Enable +@@ -94,11 +88,11 @@ int satamv_init(void) + return 1; + + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); +- mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000); +- if (mv_bar == ERROR_PTR) ++ if (!addr) + return 1; + +- if (register_shutdown(satamv_shutdown, NULL)) ++ mv_bar = rphysmap("Marvell 88SX7042 registers", addr, 0x20000); ++ if (mv_bar == ERROR_PTR) + return 1; + + tmp = pci_mmio_readl(mv_bar + FLASH_PARAM); +@@ -144,12 +138,15 @@ int satamv_init(void) + pci_rmmio_writel(tmp, mv_bar + GPIO_PORT_CONTROL); + + /* Get I/O BAR location. */ +- tmp = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); ++ addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); ++ if (!addr) ++ return 1; ++ + /* Truncate to reachable range. + * FIXME: Check if the I/O BAR is actually reachable. + * This is an arch specific check. + */ +- mv_iobar = tmp & 0xffff; ++ mv_iobar = addr & 0xffff; + msg_pspew("Activating I/O BAR at 0x%04x\n", mv_iobar); + + /* 512 kByte with two 8-bit latches, and +diff --git a/satasii.c b/satasii.c +index 72e35e5..83dc62c 100644 +--- a/satasii.c ++++ b/satasii.c +@@ -54,12 +54,6 @@ static const struct par_programmer par_programmer_satasii = { + .chip_writen = fallback_chip_writen, + }; + +-static int satasii_shutdown(void *data) +-{ +- physunmap(sii_bar, SATASII_MEMMAP_SIZE); +- return 0; +-} +- + static uint32_t satasii_wait_done(void) + { + uint32_t ctrl_reg; +@@ -91,21 +85,25 @@ int satasii_init(void) + + if ((id == 0x3132) || (id == 0x3124)) { + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); ++ if (!addr) ++ return 1; + reg_offset = 0x70; + } else { + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_5); ++ if (!addr) ++ return 1; + reg_offset = 0x50; + } + +- sii_bar = physmap("SATA SiI registers", addr, SATASII_MEMMAP_SIZE) + reg_offset; ++ sii_bar = rphysmap("SATA SiI registers", addr, SATASII_MEMMAP_SIZE); ++ if (sii_bar == ERROR_PTR) ++ return 1; ++ sii_bar += reg_offset; + + /* Check if ROM cycle are OK. */ + if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26)))) + msg_pwarn("Warning: Flash seems unconnected.\n"); + +- if (register_shutdown(satasii_shutdown, NULL)) +- return 1; +- + register_par_programmer(&par_programmer_satasii, BUS_PARALLEL); + + return 0; +diff --git a/sb600spi.c b/sb600spi.c +index cb7c4ac..9523591 100644 +--- a/sb600spi.c ++++ b/sb600spi.c +@@ -57,7 +57,28 @@ static enum amd_chipset amd_gen = CHIPSET_AMD_UNKNOWN; + static void determine_generation(struct pci_dev *dev) + { + amd_gen = CHIPSET_AMD_UNKNOWN; +- if (dev->device_id == 0x780e) { ++ msg_pdbg2("Trying to determine the generation of the SPI interface... "); ++ if (dev->device_id == 0x438d) { ++ amd_gen = CHIPSET_SB6XX; ++ msg_pdbg("SB6xx detected.\n"); ++ } else if (dev->device_id == 0x439d) { ++ struct pci_dev *smbus_dev = pci_dev_find(0x1002, 0x4385); ++ if (smbus_dev == NULL) ++ return; ++ uint8_t rev = pci_read_byte(smbus_dev, PCI_REVISION_ID); ++ if (rev >= 0x39 && rev <= 0x3D) { ++ amd_gen = CHIPSET_SB7XX; ++ msg_pdbg("SB7xx/SP5100 detected.\n"); ++ } else if (rev >= 0x40 && rev <= 0x42) { ++ amd_gen = CHIPSET_SB89XX; ++ msg_pdbg("SB8xx/SB9xx/Hudson-1 detected.\n"); ++ } else { ++ msg_pwarn("SB device found but SMBus revision 0x%02x does not match known values.\n" ++ "Assuming SB8xx/SB9xx/Hudson-1. Please send a log to flashrom@flashrom.org\n", ++ rev); ++ amd_gen = CHIPSET_SB89XX; ++ } ++ } else if (dev->device_id == 0x780e) { + /* The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and Yangtze (Kabini/Temash) + * although they use different SPI interfaces. */ + #ifdef USE_YANGTZE_HEURISTICS +@@ -94,7 +115,11 @@ static void determine_generation(struct pci_dev *dev) + "the output of lspci -nnvx, thanks!.\n", rev); + } + #endif +- } ++ } else ++ msg_pwarn("%s: Unknown LPC device %" PRIx16 ":%" PRIx16 ".\n" ++ "Please report this to flashrom@flashrom.org and include this log and\n" ++ "the output of lspci -nnvx, thanks!\n", ++ __func__, dev->vendor_id, dev->device_id); + } + + static void reset_internal_fifo_pointer(void) +@@ -247,10 +272,66 @@ static int sb600_spi_send_command(struct flashctx *flash, unsigned int writecnt, + return 0; + } + ++struct spispeed { ++ const char *const name; ++ const uint8_t speed; ++}; ++ ++static const struct spispeed spispeeds[] = { ++ { "66 MHz", 0x00 }, ++ { "33 MHz", 0x01 }, ++ { "22 MHz", 0x02 }, ++ { "16.5 MHz", 0x03 }, ++}; ++ ++static int set_speed(struct pci_dev *dev, const struct spispeed *spispeed) ++{ ++ bool success = false; ++ uint8_t speed = spispeed->speed; ++ ++ msg_pdbg("Setting SPI clock to %s (0x%x).\n", spispeed->name, speed); ++ if (amd_gen != CHIPSET_YANGTZE) { ++ rmmio_writeb((mmio_readb(sb600_spibar + 0xd) & ~(0x3 << 4)) | (speed << 4), sb600_spibar + 0xd); ++ success = (speed == ((mmio_readb(sb600_spibar + 0xd) >> 4) & 0x3)); ++ } ++ ++ if (!success) { ++ msg_perr("Setting SPI clock failed.\n"); ++ return 1; ++ } ++ return 0; ++} ++ ++static int handle_speed(struct pci_dev *dev) ++{ ++ uint32_t tmp; ++ int8_t spispeed_idx = 3; /* Default to 16.5 MHz */ ++ ++ /* See the chipset support matrix for SPI Base_Addr below for an explanation of the symbols used. ++ * bit 6xx 7xx/SP5100 8xx 9xx hudson1 hudson234 yangtze ++ * 18 rsvd <- fastReadEnable ? <- ? SpiReadMode[0] ++ * 29:30 rsvd <- <- ? <- ? SpiReadMode[2:1] ++ */ ++ if (amd_gen != CHIPSET_YANGTZE) { ++ if (amd_gen >= CHIPSET_SB89XX && amd_gen <= CHIPSET_HUDSON234) { ++ bool fast_read = (mmio_readl(sb600_spibar + 0x00) >> 18) & 0x1; ++ msg_pdbg("Fast Reads are %sabled\n", fast_read ? "en" : "dis"); ++ if (fast_read) { ++ msg_pdbg("Disabling them temporarily.\n"); ++ rmmio_writel(mmio_readl(sb600_spibar + 0x00) & ~(0x1 << 18), ++ sb600_spibar + 0x00); ++ } ++ } ++ tmp = (mmio_readb(sb600_spibar + 0xd) >> 4) & 0x3; ++ msg_pdbg("NormSpeed is %s\n", spispeeds[tmp].name); ++ } ++ return set_speed(dev, &spispeeds[spispeed_idx]); ++} ++ + static int sb600_handle_imc(struct pci_dev *dev, bool amd_imc_force) + { + /* Handle IMC everywhere but sb600 which does not have one. */ +- if (dev->device_id == 0x438d) ++ if (amd_gen == CHIPSET_SB6XX) + return 0; + + /* TODO: we should not only look at IntegratedImcPresent (LPC Dev 20, Func 3, 40h) but also at +@@ -297,9 +378,6 @@ int sb600_probe_spi(struct pci_dev *dev) + uint32_t tmp; + uint8_t reg; + bool amd_imc_force = false; +- static const char *const speed_names[4] = { +- "66/reserved", "33", "22", "16.5" +- }; + + char *arg = extract_programmer_param("amd_imc_force"); + if (arg && !strcmp(arg, "yes")) { +@@ -326,14 +404,20 @@ int sb600_probe_spi(struct pci_dev *dev) + return 0; + + /* Physical memory has to be mapped at page (4k) boundaries. */ +- sb600_spibar = physmap("SB600 SPI registers", tmp & 0xfffff000, +- 0x1000); ++ sb600_spibar = rphysmap("SB600 SPI registers", tmp & 0xfffff000, 0x1000); ++ if (sb600_spibar == ERROR_PTR) ++ return ERROR_FATAL; ++ + /* The low bits of the SPI base address are used as offset into + * the mapped page. + */ + sb600_spibar += tmp & 0xfff; + + determine_generation(dev); ++ if (amd_gen == CHIPSET_AMD_UNKNOWN) { ++ msg_perr("Could not determine chipset generation."); ++ return ERROR_NONFATAL; ++ } + + if (amd_gen == CHIPSET_YANGTZE) { + msg_perr("SPI on Kabini/Temash and newer chipsets are not yet supported.\n" +@@ -341,34 +425,87 @@ int sb600_probe_spi(struct pci_dev *dev) + return ERROR_NONFATAL; + } + +- tmp = pci_read_long(dev, 0xa0); +- msg_pdbg("AltSpiCSEnable=%i, SpiRomEnable=%i, " +- "AbortEnable=%i\n", tmp & 0x1, (tmp & 0x2) >> 1, +- (tmp & 0x4) >> 2); +- tmp = (pci_read_byte(dev, 0xba) & 0x4) >> 2; +- msg_pdbg("PrefetchEnSPIFromIMC=%i, ", tmp); +- +- tmp = pci_read_byte(dev, 0xbb); +- /* FIXME: Set bit 3,6,7 if not already set. +- * Set bit 5, otherwise SPI accesses are pointless in LPC mode. +- * See doc 42413 AMD SB700/710/750 RPR. ++ /* How to read the following table and similar ones in this file: ++ * "?" means we have no datasheet for this chipset generation or it doesn't have any relevant info. ++ * "<-" means the bit/register meaning is identical to the next non-"?" chipset to the left. "<-" thus ++ * never refers to another "?". ++ * If a "?" chipset is between two chipsets with identical meaning, we assume the meaning didn't change ++ * twice in between, i.e. the meaning is unchanged for the "?" chipset. Usually we assume that ++ * succeeding hardware supports the same functionality as its predecessor unless proven different by ++ * tests or documentation, hence "?" will often be implemented equally to "<-". ++ * ++ * Chipset support matrix for SPI Base_Addr (LPC PCI reg 0xa0) ++ * bit 6xx 7xx/SP5100 8xx 9xx hudson1 hudson2+ yangtze ++ * 3 rsvd <- <- ? <- ? RouteTpm2Spi ++ * 2 rsvd AbortEnable rsvd ? <- ? <- ++ * 1 rsvd SpiRomEnable <- ? <- ? <- ++ * 0 rsvd AltSpiCSEnable rsvd ? <- ? <- + */ +- msg_pdbg("PrefetchEnSPIFromHost=%i, SpiOpEnInLpcMode=%i\n", +- tmp & 0x1, (tmp & 0x20) >> 5); +- tmp = mmio_readl(sb600_spibar); +- /* FIXME: If SpiAccessMacRomEn or SpiHostAccessRomEn are zero on +- * SB700 or later, reads and writes will be corrupted. Abort in this +- * case. Make sure to avoid this check on SB600. ++ if (amd_gen >= CHIPSET_SB7XX) { ++ tmp = pci_read_long(dev, 0xa0); ++ msg_pdbg("SpiRomEnable=%i", (tmp >> 1) & 0x1); ++ if (amd_gen == CHIPSET_SB7XX) ++ msg_pdbg(", AltSpiCSEnable=%i, AbortEnable=%i", tmp & 0x1, (tmp >> 2) & 0x1); ++ ++ tmp = pci_read_byte(dev, 0xba); ++ msg_pdbg(", PrefetchEnSPIFromIMC=%i", (tmp & 0x4) >> 2); ++ ++ tmp = pci_read_byte(dev, 0xbb); ++ /* FIXME: Set bit 3,6,7 if not already set. ++ * Set bit 5, otherwise SPI accesses are pointless in LPC mode. ++ * See doc 42413 AMD SB700/710/750 RPR. ++ */ ++ if (amd_gen == CHIPSET_SB7XX) ++ msg_pdbg(", SpiOpEnInLpcMode=%i", (tmp >> 5) & 0x1); ++ msg_pdbg(", PrefetchEnSPIFromHost=%i\n", tmp & 0x1); ++ } ++ ++ /* Chipset support matrix for SPI_Cntrl0 (spibar + 0x0) ++ * See the chipset support matrix for SPI Base_Addr above for an explanation of the symbols used. ++ * bit 6xx 7xx/SP5100 8xx 9xx hudson1 hudson2+ yangtze ++ * 17 rsvd <- <- ? <- ? <- ++ * 18 rsvd <- fastReadEnable<1> ? <- ? SpiReadMode[0]<1> ++ * 19 SpiArbEnable <- <- ? <- ? <- ++ * 20 (FifoPtrClr) <- <- ? <- ? <- ++ * 21 (FifoPtrInc) <- <- ? <- ? IllegalAccess ++ * 22 SpiAccessMacRomEn <- <- ? <- ? <- ++ * 23 SpiHostAccessRomEn <- <- ? <- ? <- ++ * 24:26 ArbWaitCount <- <- ? <- ? <- ++ * 27 SpiBridgeDisable <- <- ? <- ? rsvd ++ * 28 rsvd DropOneClkOnRd = SPIClkGate ? <- ? <- ++ * 29:30 rsvd <- <- ? <- ? SpiReadMode[2:1]<1> ++ * 31 rsvd <- SpiBusy ? <- ? <- ++ * ++ * <1> see handle_speed + */ +- msg_pdbg("(0x%08" PRIx32 ") fastReadEnable=%u, SpiArbEnable=%i, SpiAccessMacRomEn=%i, " +- "SpiHostAccessRomEn=%i, ArbWaitCount=%i, " +- "SpiBridgeDisable=%i, DropOneClkOnRd=%i\n", +- tmp, (tmp >> 18) & 0x1, +- (tmp >> 19) & 0x1, (tmp >> 22) & 0x1, +- (tmp >> 23) & 0x1, (tmp >> 24) & 0x7, +- (tmp >> 27) & 0x1, (tmp >> 28) & 0x1); +- tmp = (mmio_readb(sb600_spibar + 0xd) >> 4) & 0x3; +- msg_pdbg("NormSpeed is %s MHz\n", speed_names[tmp]); ++ tmp = mmio_readl(sb600_spibar + 0x00); ++ msg_pdbg("(0x%08" PRIx32 ") SpiArbEnable=%i", tmp, (tmp >> 19) & 0x1); ++ ++ msg_pdbg(", SpiAccessMacRomEn=%i, SpiHostAccessRomEn=%i, ArbWaitCount=%i", ++ (tmp >> 22) & 0x1, (tmp >> 23) & 0x1, (tmp >> 24) & 0x7); ++ ++ if (amd_gen != CHIPSET_YANGTZE) ++ msg_pdbg(", SpiBridgeDisable=%i", (tmp >> 27) & 0x1); ++ ++ switch (amd_gen) { ++ case CHIPSET_SB7XX: ++ msg_pdbg(", DropOneClkOnRd/SpiClkGate=%i", (tmp >> 28) & 0x1); ++ case CHIPSET_SB89XX: ++ case CHIPSET_HUDSON234: ++ msg_pdbg(", SpiBusy=%i", (tmp >> 31) & 0x1); ++ default: break; ++ } ++ msg_pdbg("\n"); ++ ++ if (((tmp >> 22) & 0x1) == 0 || ((tmp >> 23) & 0x1) == 0) { ++ msg_perr("ERROR: State of SpiAccessMacRomEn or SpiHostAccessRomEn prohibits full access.\n"); ++ return ERROR_NONFATAL; ++ } ++ ++ if (amd_gen >= CHIPSET_SB89XX) { ++ tmp = mmio_readb(sb600_spibar + 0x1D); ++ msg_pdbg("Using SPI_CS%d\n", tmp & 0x3); ++ } + + /* Look for the SMBus device. */ + smbus_dev = pci_dev_find(0x1002, 0x4385); +@@ -409,6 +546,9 @@ int sb600_probe_spi(struct pci_dev *dev) + return 0; + } + ++ if (handle_speed(dev) != 0) ++ return ERROR_FATAL; ++ + if (sb600_handle_imc(dev, amd_imc_force) != 0) + return ERROR_FATAL; + +diff --git a/serial.c b/serial.c +index 1b394cd..126079a 100644 +--- a/serial.c ++++ b/serial.c +@@ -41,12 +41,6 @@ + + fdtype sp_fd = SER_INV_FD; + +-void __attribute__((noreturn)) sp_die(char *msg) +-{ +- perror(msg); +- exit(1); +-} +- + #ifdef _WIN32 + struct baudentry { + DWORD flag; +@@ -158,35 +152,18 @@ static void msg_perr_strerror(const char *msg) + #endif + } + +-fdtype sp_openserport(char *dev, unsigned int baud) ++int serialport_config(fdtype fd, unsigned int baud) + { +-#ifdef _WIN32 +- HANDLE fd; +- char *dev2 = dev; +- if ((strlen(dev) > 3) && +- (tolower((unsigned char)dev[0]) == 'c') && +- (tolower((unsigned char)dev[1]) == 'o') && +- (tolower((unsigned char)dev[2]) == 'm')) { +- dev2 = malloc(strlen(dev) + 5); +- if (!dev2) { +- msg_perr_strerror("Out of memory: "); +- return SER_INV_FD; +- } +- strcpy(dev2, "\\\\.\\"); +- strcpy(dev2 + 4, dev); +- } +- fd = CreateFile(dev2, GENERIC_READ | GENERIC_WRITE, 0, NULL, +- OPEN_EXISTING, 0, NULL); +- if (dev2 != dev) +- free(dev2); +- if (fd == INVALID_HANDLE_VALUE) { +- msg_perr_strerror("Cannot open serial port: "); +- return SER_INV_FD; ++ if (fd == SER_INV_FD) { ++ msg_perr("%s: File descriptor is invalid.\n", __func__); ++ return 1; + } ++ ++#ifdef _WIN32 + DCB dcb; + if (!GetCommState(fd, &dcb)) { + msg_perr_strerror("Could not fetch original serial port configuration: "); +- goto out_close; ++ return 1; + } + const struct baudentry *entry = round_baud(baud); + dcb.BaudRate = entry->flag; +@@ -195,35 +172,25 @@ fdtype sp_openserport(char *dev, unsigned int baud) + dcb.StopBits = ONESTOPBIT; + if (!SetCommState(fd, &dcb)) { + msg_perr_strerror("Could not change serial port configuration: "); +- goto out_close; ++ return 1; + } + if (!GetCommState(fd, &dcb)) { + msg_perr_strerror("Could not fetch new serial port configuration: "); +- goto out_close; ++ return 1; + } + msg_pdbg("Baud rate is %ld.\n", dcb.BaudRate); +- return fd; +-out_close: +- CloseHandle(sp_fd); +- return SER_INV_FD; + #else + struct termios wanted, observed; +- int fd; +- fd = open(dev, O_RDWR | O_NOCTTY | O_NDELAY); +- if (fd < 0) { +- msg_perr_strerror("Cannot open serial port: "); +- return SER_INV_FD; +- } + fcntl(fd, F_SETFL, 0); + if (tcgetattr(fd, &observed) != 0) { + msg_perr_strerror("Could not fetch original serial port configuration: "); +- goto out_close; ++ return 1; + } + wanted = observed; + const struct baudentry *entry = round_baud(baud); + if (cfsetispeed(&wanted, entry->flag) != 0 || cfsetospeed(&wanted, entry->flag) != 0) { + msg_perr_strerror("Could not set serial baud rate: "); +- goto out_close; ++ return 1; + } + wanted.c_cflag &= ~(PARENB | CSTOPB | CSIZE | CRTSCTS); + wanted.c_cflag |= (CS8 | CLOCAL | CREAD); +@@ -232,11 +199,11 @@ out_close: + wanted.c_oflag &= ~OPOST; + if (tcsetattr(fd, TCSANOW, &wanted) != 0) { + msg_perr_strerror("Could not change serial port configuration: "); +- goto out_close; ++ return 1; + } + if (tcgetattr(fd, &observed) != 0) { + msg_perr_strerror("Could not fetch new serial port configuration: "); +- goto out_close; ++ return 1; + } + if (observed.c_cflag != wanted.c_cflag || + observed.c_lflag != wanted.c_lflag || +@@ -244,14 +211,54 @@ out_close: + observed.c_oflag != wanted.c_oflag || + cfgetispeed(&observed) != cfgetispeed(&wanted)) { + msg_perr("%s: Some requested options did not stick.\n", __func__); +- goto out_close; ++ return 1; + } +- msg_pdbg("Baud rate is %d.\n", entry->baud); +- return fd; ++ msg_pdbg("Baud rate is %d now.\n", entry->baud); ++#endif ++ return 0; ++} + +-out_close: +- close(sp_fd); +- return SER_INV_FD; ++fdtype sp_openserport(char *dev, unsigned int baud) ++{ ++ fdtype fd; ++#ifdef _WIN32 ++ char *dev2 = dev; ++ if ((strlen(dev) > 3) && ++ (tolower((unsigned char)dev[0]) == 'c') && ++ (tolower((unsigned char)dev[1]) == 'o') && ++ (tolower((unsigned char)dev[2]) == 'm')) { ++ dev2 = malloc(strlen(dev) + 5); ++ if (!dev2) { ++ msg_perr_strerror("Out of memory: "); ++ return SER_INV_FD; ++ } ++ strcpy(dev2, "\\\\.\\"); ++ strcpy(dev2 + 4, dev); ++ } ++ fd = CreateFile(dev2, GENERIC_READ | GENERIC_WRITE, 0, NULL, ++ OPEN_EXISTING, 0, NULL); ++ if (dev2 != dev) ++ free(dev2); ++ if (fd == INVALID_HANDLE_VALUE) { ++ msg_perr_strerror("Cannot open serial port: "); ++ return SER_INV_FD; ++ } ++ if (serialport_config(fd, baud) != 0) { ++ CloseHandle(fd); ++ return SER_INV_FD; ++ } ++ return fd; ++#else ++ fd = open(dev, O_RDWR | O_NOCTTY | O_NDELAY); ++ if (fd < 0) { ++ msg_perr_strerror("Cannot open serial port: "); ++ return SER_INV_FD; ++ } ++ if (serialport_config(fd, baud) != 0) { ++ close(fd); ++ return SER_INV_FD; ++ } ++ return fd; + #endif + } + +@@ -350,7 +357,7 @@ int serialport_write(unsigned char *buf, unsigned int writecnt) + if (!tmp) { + msg_pdbg2("Empty write\n"); + empty_writes--; +- programmer_delay(500); ++ internal_delay(500); + if (empty_writes == 0) { + msg_perr("Serial port is unresponsive!\n"); + return 1; +diff --git a/serprog.c b/serprog.c +index 3476315..35c4f32 100644 +--- a/serprog.c ++++ b/serprog.c +@@ -100,6 +100,7 @@ static int sp_opensocket(char *ip, unsigned int port) + if (NULL == hostPtr) { + hostPtr = gethostbyaddr(ip, strlen(ip), AF_INET); + if (NULL == hostPtr) { ++ close(sock); + msg_perr("Error: cannot resolve %s\n", ip); + return -1; + } +@@ -114,7 +115,11 @@ static int sp_opensocket(char *ip, unsigned int port) + } + /* We are latency limited, and sometimes do write-write-read * + * (write-n) - so enable TCP_NODELAY. */ +- setsockopt(sock, IPPROTO_TCP, TCP_NODELAY, &flag, sizeof(int)); ++ if (setsockopt(sock, IPPROTO_TCP, TCP_NODELAY, &flag, sizeof(int))) { ++ close(sock); ++ msg_perr("Error: serprog cannot set socket options: %s\n", strerror(errno)); ++ return -1; ++ } + return sock; + } + #endif +@@ -237,43 +242,58 @@ static int sp_docommand(uint8_t command, uint32_t parmlen, + return 0; + } + +-static void sp_flush_stream(void) ++static int sp_flush_stream(void) + { + if (sp_streamed_transmit_ops) + do { + unsigned char c; + if (serialport_read(&c, 1) != 0) { +- sp_die("Error: cannot read from device (flushing stream)"); ++ msg_perr("Error: cannot read from device (flushing stream)"); ++ return 1; + } + if (c == S_NAK) { + msg_perr("Error: NAK to a stream buffer operation\n"); +- exit(1); ++ return 1; + } + if (c != S_ACK) { + msg_perr("Error: Invalid reply 0x%02X from device\n", c); +- exit(1); ++ return 1; + } + } while (--sp_streamed_transmit_ops); + sp_streamed_transmit_ops = 0; + sp_streamed_transmit_bytes = 0; ++ return 0; + } + +-static int sp_stream_buffer_op(uint8_t cmd, uint32_t parmlen, uint8_t * parms) ++static int sp_stream_buffer_op(uint8_t cmd, uint32_t parmlen, uint8_t *parms) + { + uint8_t *sp; + if (sp_automatic_cmdcheck(cmd)) + return 1; ++ + sp = malloc(1 + parmlen); +- if (!sp) sp_die("Error: cannot malloc command buffer"); ++ if (!sp) { ++ msg_perr("Error: cannot malloc command buffer\n"); ++ return 1; ++ } + sp[0] = cmd; + memcpy(&(sp[1]), parms, parmlen); +- if (sp_streamed_transmit_bytes >= (1 + parmlen + sp_device_serbuf_size)) +- sp_flush_stream(); +- if (serialport_write(sp, 1 + parmlen) != 0) +- sp_die("Error: cannot write command"); +- free(sp); ++ ++ if (sp_streamed_transmit_bytes >= (1 + parmlen + sp_device_serbuf_size)) { ++ if (sp_flush_stream() != 0) { ++ free(sp); ++ return 1; ++ } ++ } ++ if (serialport_write(sp, 1 + parmlen) != 0) { ++ msg_perr("Error: cannot write command\n"); ++ free(sp); ++ return 1; ++ } + sp_streamed_transmit_ops += 1; + sp_streamed_transmit_bytes += 1 + parmlen; ++ ++ free(sp); + return 0; + } + +@@ -656,16 +676,16 @@ int serprog_init(void) + return 0; + } + +-/* Move an in flashrom buffer existing write-n operation to * +- * the on-device operation buffer. */ +-static void sp_pass_writen(void) ++/* Move an in flashrom buffer existing write-n operation to the on-device operation buffer. */ ++static int sp_pass_writen(void) + { + unsigned char header[7]; +- msg_pspew(MSGHEADER "Passing write-n bytes=%d addr=0x%x\n", +- sp_write_n_bytes, sp_write_n_addr); +- if (sp_streamed_transmit_bytes >= +- (7 + sp_write_n_bytes + sp_device_serbuf_size)) +- sp_flush_stream(); ++ msg_pspew(MSGHEADER "Passing write-n bytes=%d addr=0x%x\n", sp_write_n_bytes, sp_write_n_addr); ++ if (sp_streamed_transmit_bytes >= (7 + sp_write_n_bytes + sp_device_serbuf_size)) { ++ if (sp_flush_stream() != 0) { ++ return 1; ++ } ++ } + /* In case it's just a single byte send it as a single write. */ + if (sp_write_n_bytes == 1) { + sp_write_n_bytes = 0; +@@ -673,9 +693,10 @@ static void sp_pass_writen(void) + header[1] = (sp_write_n_addr >> 8) & 0xFF; + header[2] = (sp_write_n_addr >> 16) & 0xFF; + header[3] = sp_write_n_buf[0]; +- sp_stream_buffer_op(S_CMD_O_WRITEB, 4, header); ++ if (sp_stream_buffer_op(S_CMD_O_WRITEB, 4, header) != 0) ++ return 1; + sp_opbuf_usage += 5; +- return; ++ return 0; + } + header[0] = S_CMD_O_WRITEN; + header[1] = (sp_write_n_bytes >> 0) & 0xFF; +@@ -684,39 +705,55 @@ static void sp_pass_writen(void) + header[4] = (sp_write_n_addr >> 0) & 0xFF; + header[5] = (sp_write_n_addr >> 8) & 0xFF; + header[6] = (sp_write_n_addr >> 16) & 0xFF; +- if (serialport_write(header, 7) != 0) +- sp_die("Error: cannot write write-n command\n"); +- if (serialport_write(sp_write_n_buf, sp_write_n_bytes) != 0) +- sp_die("Error: cannot write write-n data"); ++ if (serialport_write(header, 7) != 0) { ++ msg_perr(MSGHEADER "Error: cannot write write-n command\n"); ++ return 1; ++ } ++ if (serialport_write(sp_write_n_buf, sp_write_n_bytes) != 0) { ++ msg_perr(MSGHEADER "Error: cannot write write-n data"); ++ return 1; ++ } + sp_streamed_transmit_bytes += 7 + sp_write_n_bytes; + sp_streamed_transmit_ops += 1; + sp_opbuf_usage += 7 + sp_write_n_bytes; + sp_write_n_bytes = 0; + sp_prev_was_write = 0; ++ return 0; + } + +-static void sp_execute_opbuf_noflush(void) ++static int sp_execute_opbuf_noflush(void) + { +- if ((sp_max_write_n) && (sp_write_n_bytes)) +- sp_pass_writen(); +- sp_stream_buffer_op(S_CMD_O_EXEC, 0, NULL); +- msg_pspew(MSGHEADER "Executed operation buffer of %d bytes\n", +- sp_opbuf_usage); ++ if ((sp_max_write_n) && (sp_write_n_bytes)) { ++ if (sp_pass_writen() != 0) { ++ msg_perr("Error: could not transfer write buffer\n"); ++ return 1; ++ } ++ } ++ if (sp_stream_buffer_op(S_CMD_O_EXEC, 0, NULL) != 0) { ++ msg_perr("Error: could not execute command buffer\n"); ++ return 1; ++ } ++ msg_pspew(MSGHEADER "Executed operation buffer of %d bytes\n", sp_opbuf_usage); + sp_opbuf_usage = 0; + sp_prev_was_write = 0; +- return; ++ return 0; + } + +-static void sp_execute_opbuf(void) ++static int sp_execute_opbuf(void) + { +- sp_execute_opbuf_noflush(); +- sp_flush_stream(); ++ if (sp_execute_opbuf_noflush() != 0) ++ return 1; ++ if (sp_flush_stream() != 0) ++ return 1; ++ ++ return 0; + } + + static int serprog_shutdown(void *data) + { + if ((sp_opbuf_usage) || (sp_max_write_n && sp_write_n_bytes)) +- sp_execute_opbuf(); ++ if (sp_execute_opbuf() != 0) ++ msg_pwarn("Could not flush command buffer.\n"); + if (sp_check_commandavail(S_CMD_S_PIN_STATE)) { + uint8_t dis = 0; + if (sp_docommand(S_CMD_S_PIN_STATE, 1, &dis, 0, NULL) == 0) +@@ -731,14 +768,15 @@ static int serprog_shutdown(void *data) + return 0; + } + +-static void sp_check_opbuf_usage(int bytes_to_be_added) ++static int sp_check_opbuf_usage(int bytes_to_be_added) + { + if (sp_device_opbuf_size <= (sp_opbuf_usage + bytes_to_be_added)) { +- sp_execute_opbuf(); +- /* If this happens in the mid of an page load the page load * +- * will probably fail. */ +- msg_pdbg(MSGHEADER "Warning: executed operation buffer due to size reasons\n"); ++ /* If this happens in the middle of a page load the page load will probably fail. */ ++ msg_pwarn(MSGHEADER "Warning: executed operation buffer due to size reasons\n"); ++ if (sp_execute_opbuf() != 0) ++ return 1; + } ++ return 0; + } + + static void serprog_chip_writeb(const struct flashctx *flash, uint8_t val, +@@ -768,7 +806,7 @@ static void serprog_chip_writeb(const struct flashctx *flash, uint8_t val, + writeb_parm[1] = (addr >> 8) & 0xFF; + writeb_parm[2] = (addr >> 16) & 0xFF; + writeb_parm[3] = val; +- sp_stream_buffer_op(S_CMD_O_WRITEB, 4, writeb_parm); ++ sp_stream_buffer_op(S_CMD_O_WRITEB, 4, writeb_parm); // FIXME: return error + sp_opbuf_usage += 5; + } + } +@@ -785,16 +823,16 @@ static uint8_t serprog_chip_readb(const struct flashctx *flash, + buf[0] = ((addr >> 0) & 0xFF); + buf[1] = ((addr >> 8) & 0xFF); + buf[2] = ((addr >> 16) & 0xFF); +- sp_stream_buffer_op(S_CMD_R_BYTE, 3, buf); +- sp_flush_stream(); ++ sp_stream_buffer_op(S_CMD_R_BYTE, 3, buf); // FIXME: return error ++ sp_flush_stream(); // FIXME: return error + if (serialport_read(&c, 1) != 0) +- sp_die("readb byteread"); ++ msg_perr(MSGHEADER "readb byteread"); // FIXME: return error + msg_pspew("%s addr=0x%" PRIxPTR " returning 0x%02X\n", __func__, addr, c); + return c; + } + + /* Local version that really does the job, doesn't care of max_read_n. */ +-static void sp_do_read_n(uint8_t * buf, const chipaddr addr, size_t len) ++static int sp_do_read_n(uint8_t * buf, const chipaddr addr, size_t len) + { + unsigned char sbuf[6]; + msg_pspew("%s: addr=0x%" PRIxPTR " len=%zu\n", __func__, addr, len); +@@ -808,10 +846,13 @@ static void sp_do_read_n(uint8_t * buf, const chipaddr addr, size_t len) + sbuf[4] = ((len >> 8) & 0xFF); + sbuf[5] = ((len >> 16) & 0xFF); + sp_stream_buffer_op(S_CMD_R_NBYTES, 6, sbuf); +- sp_flush_stream(); +- if (serialport_read(buf, len) != 0) +- sp_die("Error: cannot read read-n data"); +- return; ++ if (sp_flush_stream() != 0) ++ return 1; ++ if (serialport_read(buf, len) != 0) { ++ msg_perr(MSGHEADER "Error: cannot read read-n data"); ++ return 1; ++ } ++ return 0; + } + + /* The externally called version that makes sure that max_read_n is obeyed. */ +@@ -821,12 +862,12 @@ static void serprog_chip_readn(const struct flashctx *flash, uint8_t * buf, + size_t lenm = len; + chipaddr addrm = addr; + while ((sp_max_read_n != 0) && (lenm > sp_max_read_n)) { +- sp_do_read_n(&(buf[addrm-addr]), addrm, sp_max_read_n); ++ sp_do_read_n(&(buf[addrm-addr]), addrm, sp_max_read_n); // FIXME: return error + addrm += sp_max_read_n; + lenm -= sp_max_read_n; + } + if (lenm) +- sp_do_read_n(&(buf[addrm-addr]), addrm, lenm); ++ sp_do_read_n(&(buf[addrm-addr]), addrm, lenm); // FIXME: return error + } + + void serprog_delay(int usecs) +@@ -858,11 +899,18 @@ static int serprog_spi_send_command(struct flashctx *flash, + unsigned char *parmbuf; + int ret; + msg_pspew("%s, writecnt=%i, readcnt=%i\n", __func__, writecnt, readcnt); +- if ((sp_opbuf_usage) || (sp_max_write_n && sp_write_n_bytes)) +- sp_execute_opbuf(); ++ if ((sp_opbuf_usage) || (sp_max_write_n && sp_write_n_bytes)) { ++ if (sp_execute_opbuf() != 0) { ++ msg_perr("Error: could not execute command buffer before sending SPI commands.\n"); ++ return 1; ++ } ++ } ++ + parmbuf = malloc(writecnt + 6); +- if (!parmbuf) +- sp_die("Error: cannot malloc SPI send param buffer"); ++ if (!parmbuf) { ++ msg_perr("Error: could not allocate SPI send param buffer.\n"); ++ return 1; ++ } + parmbuf[0] = (writecnt >> 0) & 0xFF; + parmbuf[1] = (writecnt >> 8) & 0xFF; + parmbuf[2] = (writecnt >> 16) & 0xFF; +@@ -879,8 +927,7 @@ static int serprog_spi_send_command(struct flashctx *flash, + /* FIXME: This function is optimized so that it does not split each transaction + * into chip page_size long blocks unnecessarily like spi_read_chunked. This has + * the advantage that it is much faster for most chips, but breaks those with +- * non-contiguous address space (like AT45DB161D). When spi_read_chunked is +- * fixed this method can be removed. */ ++ * non-continuous reads. When spi_read_chunked is fixed this method can be removed. */ + static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, + unsigned int start, unsigned int len) + { +diff --git a/spi25.c b/spi25.c +index e001196..862a865 100644 +--- a/spi25.c ++++ b/spi25.c +@@ -679,7 +679,7 @@ int spi_block_erase_20(struct flashctx *flash, unsigned int addr, + + result = spi_send_multicommand(flash, cmds); + if (result) { +- msg_cerr("%s failed during command execution at address 0x%x\n", ++ msg_pdbg("%s failed during command execution at address 0x%x\n", + __func__, addr); + return result; + } +@@ -1128,13 +1128,9 @@ int default_spi_write_aai(struct flashctx *flash, uint8_t *buf, unsigned int sta + + + result = spi_send_multicommand(flash, cmds); +- if (result) { +- msg_cerr("%s failed during start command execution\n", +- __func__); +- /* FIXME: Should we send WRDI here as well to make sure the chip +- * is not in AAI mode? +- */ +- return result; ++ if (result != 0) { ++ msg_cerr("%s failed during start command execution: %d\n", __func__, result); ++ goto bailout; + } + while (spi_read_status_register(flash) & SPI_SR_WIP) + programmer_delay(10); +@@ -1146,16 +1142,21 @@ int default_spi_write_aai(struct flashctx *flash, uint8_t *buf, unsigned int sta + while (pos < start + len - 1) { + cmd[1] = buf[pos++ - start]; + cmd[2] = buf[pos++ - start]; +- spi_send_command(flash, JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, +- cmd, NULL); ++ result = spi_send_command(flash, JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, cmd, NULL); ++ if (result != 0) { ++ msg_cerr("%s failed during followup AAI command execution: %d\n", __func__, result); ++ goto bailout; ++ } + while (spi_read_status_register(flash) & SPI_SR_WIP) + programmer_delay(10); + } + +- /* Use WRDI to exit AAI mode. This needs to be done before issuing any +- * other non-AAI command. +- */ +- spi_write_disable(flash); ++ /* Use WRDI to exit AAI mode. This needs to be done before issuing any other non-AAI command. */ ++ result = spi_write_disable(flash); ++ if (result != 0) { ++ msg_cerr("%s failed to disable AAI mode.\n", __func__); ++ return SPI_GENERIC_ERROR; ++ } + + /* Write remaining byte (if any). */ + if (pos < start + len) { +@@ -1165,4 +1166,10 @@ int default_spi_write_aai(struct flashctx *flash, uint8_t *buf, unsigned int sta + } + + return 0; ++ ++bailout: ++ result = spi_write_disable(flash); ++ if (result != 0) ++ msg_cerr("%s failed to disable AAI mode.\n", __func__); ++ return SPI_GENERIC_ERROR; + } +diff --git a/spi25_statusreg.c b/spi25_statusreg.c +index 8fb7f2d..48fceb0 100644 +--- a/spi25_statusreg.c ++++ b/spi25_statusreg.c +@@ -270,7 +270,7 @@ static void spi_prettyprint_status_register_bp(uint8_t status, int bp) + } + + /* Unnamed bits. */ +-static void spi_prettyprint_status_register_bit(uint8_t status, int bit) ++void spi_prettyprint_status_register_bit(uint8_t status, int bit) + { + msg_cdbg("Chip status register: Bit %i is %sset\n", bit, (status & (1 << bit)) ? "" : "not "); + } +diff --git a/stm50.c b/stm50.c +new file mode 100644 +index 0000000..edcfdd2 +--- /dev/null ++++ b/stm50.c +@@ -0,0 +1,115 @@ ++/* ++ * This file is part of the flashrom project. ++ * ++ * Copyright (C) 2008 Claus Gindhart ++ * Copyright (C) 2009 Sean Nelson ++ * Copyright (C) 2013 Stefan Tauner ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ */ ++ ++/* ++ * All ST M50 chips are locked on startup. Most of them have a uniform 64 kB block layout, but some have ++ * a non-uniform block/sector segmentation which has to be handled with more care. Some of the non-uniform ++ * chips support erasing of the 4 kB sectors with another command. ++ */ ++ ++#include "flash.h" ++#include "flashchips.h" ++#include "chipdrivers.h" ++ ++static int stm50_unlock_address(struct flashctx *flash, int offset) ++{ ++ chipaddr wrprotect = flash->virtual_registers + 2; ++ static const uint8_t unlock_sector = 0x00; ++ msg_cdbg("unlocking at 0x%x\n", offset); ++ chip_writeb(flash, unlock_sector, wrprotect + offset); ++ if (chip_readb(flash, wrprotect + offset) != unlock_sector) { ++ msg_cerr("Cannot unlock address 0x%x\n", offset); ++ return -1; ++ } ++ return 0; ++} ++ ++/* Chips known to use a non-uniform block and sector layout for locking (as well as for erasing): ++ * Name Size Address range of lock registers ++ * M50FLW080A 1MB FFB00002 - FFBFF002 ++ * M50FLW080B 1MB FFB00002 - FFBFF002 ++ * M50FW002 256k FFBC0002 - FFBFC002 ++ * M50LPW116 2MB FFA00002 - FFBFC002 ++ */ ++int unlock_stm50_nonuniform(struct flashctx *flash) ++{ ++ int i; ++ struct eraseblock *eraseblocks = flash->chip->block_erasers[0].eraseblocks; ++ unsigned int done = 0; ++ for (i = 0; i < NUM_ERASEREGIONS && eraseblocks[i].count != 0; i++) { ++ unsigned int block_size = eraseblocks[i].size; ++ unsigned int block_count = eraseblocks[i].count; ++ ++ int j; ++ for (j = 0; j < block_count; j++) { ++ if (stm50_unlock_address(flash, done)) { ++ msg_cerr("UNLOCK FAILED!\n"); ++ return -1; ++ } ++ done += block_count * block_size; ++ } ++ } ++ return 0; ++} ++ ++/* Unlocking for uniform 64 kB blocks starting at offset 2 of the feature registers. */ ++int unlock_stm50_uniform(struct flashctx *flash) ++{ ++ int i; ++ for (i = 0; i < flash->chip->total_size * 1024; i+= 64 * 1024) { ++ if (stm50_unlock_address(flash, i)) { ++ msg_cerr("UNLOCK FAILED!\n"); ++ return -1; ++ } ++ } ++ return 0; ++} ++ ++static int stm50_erase_sector(struct flashctx *flash, unsigned int addr) ++{ ++ chipaddr bios = flash->virtual_memory + addr; ++ ++ // clear status register ++ chip_writeb(flash, 0x50, bios); ++ // now start it ++ chip_writeb(flash, 0x32, bios); ++ chip_writeb(flash, 0xd0, bios); ++ programmer_delay(10); ++ ++ uint8_t status = wait_82802ab(flash); ++ print_status_82802ab(status); ++ ++ return status == 0x80; ++} ++ ++/* Some ST M50* chips do support erasing of sectors. This function will derive the erase function to use from ++ * the length of the of the block. For calls that apparently do not address a sector (but a block) we just call ++ * the block erase function instead. FIXME: This duplicates the behavior of the remaining erasers for blocks and ++ * might be fixed when flashrom supports multiple functions per eraser or erasers that do erase parts of the ++ * chip only. */ ++int erase_sector_stm50(struct flashctx *flash, unsigned int addr, unsigned int len) ++{ ++ if (len == 4096) ++ return stm50_erase_sector(flash, addr); ++ else ++ return erase_block_82802ab(flash, addr, len); ++} +diff --git a/udelay.c b/udelay.c +index e3cf3e3..9d3bfc2 100644 +--- a/udelay.c ++++ b/udelay.c +@@ -90,7 +90,11 @@ void myusec_calibrate_delay(void) + unsigned long timeusec, resolution; + int i, tries = 0; + ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("Calibrating delay loop... "); ++#else + msg_pinfo("Calibrating delay loop... "); ++#endif + resolution = measure_os_delay_resolution(); + if (resolution) { + msg_pdbg("OS timer resolution is %lu usecs, ", resolution); +@@ -151,7 +155,7 @@ recalibrate: + } + } + } else { +- msg_perr("delay loop is unreliable, trying to continue "); ++ msg_pdbg("delay loop is unreliable, trying to continue "); + } + + /* We're interested in the actual precision. */ +@@ -166,7 +170,11 @@ recalibrate: + timeusec = measure_delay(resolution * 4); + msg_pdbg("%ld myus = %ld us, ", resolution * 4, timeusec); + ++#ifdef FORCE10_SPI_CHANGE ++ msg_pdbg("OK.\n"); ++#else + msg_pinfo("OK.\n"); ++#endif + } + + /* Not very precise sleep. */ +diff --git a/util/getrevision.sh b/util/getrevision.sh +new file mode 100755 +index 0000000..709e45f +--- /dev/null ++++ b/util/getrevision.sh +@@ -0,0 +1,311 @@ ++#!/bin/sh ++# ++# This file is part of the flashrom project. ++# ++# Copyright (C) 2005 coresystems GmbH ++# Copyright (C) 2009,2010 Carl-Daniel Hailfinger ++# Copyright (C) 2010 Chromium OS Authors ++# Copyright (C) 2013 Stefan Tauner ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++# ++ ++EXIT_SUCCESS=0 ++EXIT_FAILURE=1 ++ ++# Make sure we don't get translated output ++export LC_ALL=C ++# nor local times or dates ++export TZ=UTC0 ++ ++# Helper functions ++# First argument is the path to inspect (usually optional; w/o it the whole repository will be considered) ++svn_has_local_changes() { ++ svn status "$1" | egrep '^ *[ADMR] *' >/dev/null ++} ++ ++git_has_local_changes() { ++ git update-index -q --refresh >/dev/null ++ ! git diff-index --quiet HEAD -- "$1" ++} ++ ++git_last_commit() { ++ git log --pretty=format:"%h" -1 -- "$1" ++} ++ ++svn_is_file_tracked() { ++ svn info "$1" >/dev/null 2>&1 ++} ++ ++git_is_file_tracked() { ++ git ls-files --error-unmatch -- "$1" >/dev/null 2>&1 ++} ++ ++is_file_tracked() { ++ svn_is_file_tracked "$1" || git_is_file_tracked "$1" ++} ++ ++# Tries to find a remote source for the changes committed locally. ++# This includes the URL of the remote repository including the last commit and a suitable branch name. ++# Takes one optional argument: the path to inspect ++git_url() { ++ last_commit=$(git_last_commit "$1") ++ # get all remote branches containing the last commit (excluding origin/HEAD and git-svn branches/tags) ++ branches=$(git branch -r --contains $last_commit | sed '/\//!d;/.*->.*/d;s/[\t ]*//') ++ if [ -z "$branches" ] ; then ++ echo "No remote branch contains a suitable commit">&2 ++ return ++ fi ++ ++ # find "nearest" branch ++ local mindiff=9000 ++ local target= ++ for branch in $branches ; do ++ curdiff=$(git rev-list --count $last_commit..$branch) ++ if [ $curdiff -ge $mindiff ] ; then ++ continue ++ fi ++ mindiff=$curdiff ++ target=$branch ++ done ++ ++ echo "$(git ls-remote --exit-code --get-url ${target%/*}) ${target#*/}" ++} ++ ++# Returns a string indicating where others can get the current source code (excluding uncommitted changes) ++# Takes one optional argument: the path to inspect ++scm_url() { ++ local url= ++ ++ # for a primitive VCS like subversion finding the URL is easy: there is only one upstream host ++ if svn_is_file_tracked "$1" ; then ++ url="$(svn info "$1" 2>/dev/null | ++ grep URL: | ++ sed 's/.*URL:[[:blank:]]*//;s/:\/\/.*@/:\/\//' | ++ grep ^.)" ++ elif git_is_file_tracked "$1" ; then ++ url="$(git_url "$1")" ++ else ++ return ${EXIT_FAILURE} ++ fi ++ ++ echo "${url}" ++} ++ ++# Retrieve timestamp since last modification. If the sources are pristine, ++# then the timestamp will match that of the SCM's most recent modification ++# date. ++timestamp() { ++ local t ++ ++ # date syntaxes are manifold: ++ # gnu date [-d input]... [+FORMAT] ++ # netbsd date [-ajnu] [-d date] [-r seconds] [+format] [[[[[[CC]yy]mm]dd]HH]MM[.SS]] ++ # freebsd date [-jnu] [-d dst] [-r seconds] [-f fmt date | [[[[[cc]yy]mm]dd]HH]MM[.ss]] [+format] [...] ++ # dragonflybsd date [-jnu] [-d dst] [-r seconds] [-f fmt date | [[[[[cc]yy]mm]dd]HH]MM[.ss]] [+format] [...] ++ # openbsd date [-aju] [-d dst] [-r seconds] [+format] [[[[[[cc]yy]mm]dd]HH]MM[.SS]] [...] ++ if svn_is_file_tracked "$2" ; then ++ if svn_has_local_changes "$2"; then ++ t=$(date -u "$1") ++ else ++ # No local changes, get date of the last log record. Subversion provides that in ++ # ISO 8601 format when using the --xml switch. The sed call extracts that ignoring any ++ # fractional parts started by a comma or a dot. ++ local last_commit_date="$(svn info --xml "$2"| \ ++ sed -n -e 's/\([^,\.]*\)\([\.,].*\)*Z<\/date>/\1Z/p')" ++ ++ case $(uname) in ++ # Most BSD dates do not support parsing date values from user input with -d but all of ++ # them support parsing the syntax with [[[[[[cc]yy]mm]dd]HH]MM[.ss]]. We have to ++ # transform the ISO8601 date first though. ++ NetBSD|OpenBSD|DragonFly|FreeBSD) ++ last_commit_date="$(echo ${last_commit_date} | \ ++ sed -n -e 's/\(....\)-\(..\)-\(..\)T\(..\):\(..\):\(..\)Z/\1\2\3\4\5\.\6/p')" ++ t=$(date -u -j "${last_commit_date}" "$1" 2>/dev/null);; ++ *) ++ t=$(date -u -d "${last_commit_date}" "$1" 2>/dev/null);; ++ esac ++ fi ++ elif git_is_file_tracked "$2" ; then ++ # are there local changes? ++ if git_has_local_changes "$2" ; then ++ t=$(date -u "${1}") ++ else ++ # No local changes, get date of the last commit ++ case $(uname) in ++ # Most BSD dates do not support parsing date values from user input with -d but all of ++ # them support parsing epoch seconds with -r. Thanks to git we can easily use that: ++ NetBSD|OpenBSD|DragonFly|FreeBSD) ++ t=$(date -u -r "$(git log --pretty=format:%ct -1 -- $2)" "$1" 2>/dev/null);; ++ *) ++ t=$(date -d "$(git log --pretty=format:%cD -1 -- $2)" -u "$1" 2>/dev/null);; ++ esac ++ fi ++ else ++ t=$(date -u "$1") ++ fi ++ ++ if [ -z "$t" ]; then ++ echo "Warning: Could not determine timestamp." 2>/dev/null ++ fi ++ echo "${t}" ++} ++ ++# Retrieve local SCM revision info. This is useful if we're working in a different SCM than upstream and/or ++# have local changes. ++local_revision() { ++ local r= ++ ++ if svn_is_file_tracked "$1" ; then ++ r=$(svn_has_local_changes "$1" && echo "dirty") ++ elif git_is_file_tracked "$1" ; then ++ r=$(git_last_commit "$1") ++ ++ local svn_base=$(git log --grep git-svn-id -1 --format='%h') ++ if [ "$svn_base" != "" ] ; then ++ local diff_to_svn=$(git rev-list --count ${svn_base}..${r}) ++ if [ "$diff_to_svn" -gt 0 ] ; then ++ r="$r-$diff_to_svn" ++ fi ++ fi ++ ++ if git_has_local_changes "$1" ; then ++ r="$r-dirty" ++ fi ++ else ++ return ${EXIT_FAILURE} ++ fi ++ ++ echo "${r}" ++} ++ ++# Get the upstream flashrom revision stored in SVN metadata. ++upstream_revision() { ++ local r= ++ ++ if svn_is_file_tracked "$1" ; then ++ r=$(svn info "$1" 2>/dev/null | \ ++ grep "Last Changed Rev:" | \ ++ sed -e "s/^Last Changed Rev: *//" -e "s/\([0-9]*\).*/r\1/" | \ ++ grep "r[0-9]") ++ elif git_is_file_tracked "$1" ; then ++ # If this is a "native" git-svn clone we could use git svn log: ++ # git svn log --oneline -1 | sed 's/^r//;s/[[:blank:]].*//' or even git svn find-rev ++ # but it is easier to just grep for the git-svn-id unconditionally ++ r=$(git log --grep git-svn-id -1 -- "$1" | \ ++ grep git-svn-id | \ ++ sed 's/.*@/r/;s/[[:blank:]].*//') ++ fi ++ ++ if [ -z "$r" ]; then ++ r="unknown" # default to unknown ++ fi ++ echo "${r}" ++} ++ ++show_help() { ++ echo "Usage: ++ ${0} [path] ++ ++Commands ++ -h or --help ++ this message ++ -l or --local ++ local revision information including an indicator for uncommitted changes ++ -u or --upstream ++ upstream revision ++ -U or --url ++ URL associated with the latest commit ++ -d or --date ++ date of most recent modification ++ -t or --timestamp ++ timestamp of most recent modification ++" ++ return ++} ++ ++check_action() { ++ if [ -n "$action" ]; then ++ echo "Error: Multiple actions given.">&2 ++ exit ${EXIT_FAILURE} ++ fi ++} ++ ++main() { ++ local query_path= ++ local action= ++ ++ # The is the main loop ++ while [ $# -gt 0 ]; ++ do ++ case ${1} in ++ -h|--help) ++ action=show_help; ++ shift;; ++ -l|--local) ++ check_action $1 ++ action=local_revision ++ shift;; ++ -u|--upstream) ++ check_action $1 ++ action=upstream_revision ++ shift;; ++ -U|--url) ++ check_action $1 ++ action=scm_url ++ shift;; ++ -d|--date) ++ check_action $1 ++ action="timestamp +%Y-%m-%d" # refrain from suffixing 'Z' to indicate it's UTC ++ shift;; ++ -t|--timestamp) ++ check_action $1 ++ action="timestamp +%Y-%m-%dT%H:%M:%SZ" # There is only one valid time format! ISO 8601 ++ shift;; ++ -*) ++ show_help; ++ echo "Error: Invalid option: ${1}" ++ exit ${EXIT_FAILURE};; ++ *) ++ if [ -z "$query_path" ] ; then ++ if [ ! -e "$1" ] ; then ++ echo "Error: Path \"${1}\" does not exist.">&2 ++ exit ${EXIT_FAILURE} ++ fi ++ query_path=$1 ++ else ++ echo "Warning: Ignoring over-abundant paramter: \"${1}\"">&2 ++ fi ++ shift;; ++ esac; ++ done ++ ++ # default to current directory (usually equals the whole repository) ++ if [ -z "$query_path" ] ; then ++ query_path=. ++ fi ++ if ! is_file_tracked "$query_path" ; then ++ echo "Warning: Path \"${query_path}\" is not under version control.">&2 ++ fi ++ if [ -z "$action" ] ; then ++ show_help ++ echo "Error: No actions specified" ++ exit ${EXIT_FAILURE} ++ fi ++ ++ $action "$query_path" ++} ++ ++main $@ +diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c +index c359913..dd35860 100644 +--- a/util/ich_descriptors_tool/ich_descriptors_tool.c ++++ b/util/ich_descriptors_tool/ich_descriptors_tool.c +@@ -77,12 +77,13 @@ static void dump_file(const char *prefix, const uint32_t *dump, unsigned int len + printf("Dumping %u bytes of the %s region from 0x%08x-0x%08x to %s... ", + file_len, region_names[i], base, limit, fn); + int fh = open(fn, O_WRONLY | O_CREAT, S_IRUSR | S_IWUSR); +- free(fn); + if (fh < 0) { + fprintf(stderr, + "ERROR: couldn't open(%s): %s\n", fn, strerror(errno)); ++ free(fn); + exit(1); + } ++ free(fn); + + ret = write(fh, &dump[base >> 2], file_len); + if (ret != file_len) { +@@ -120,6 +121,7 @@ static void usage(char *argv[], char *error) + "\t- \"5\" or \"ibex\" for Intel's 5 series chipsets,\n" + "\t- \"6\" or \"cougar\" for Intel's 6 series chipsets,\n" + "\t- \"7\" or \"panther\" for Intel's 7 series chipsets.\n" ++"\t- \"avoton\",\n" + "If '-d' is specified some regions such as the BIOS image as seen by the CPU or\n" + "the GbE blob that is required to initialize the GbE are also dumped to files.\n", + argv[0], argv[0]); +@@ -197,6 +199,10 @@ int main(int argc, char *argv[]) + else if ((strcmp(csn, "7") == 0) || + (strcmp(csn, "panther") == 0)) + cs = CHIPSET_7_SERIES_PANTHER_POINT; ++#ifdef DELL_AVOTON_SUPPORT ++ else if (strcmp(csn, "avoton") == 0) ++ cs = CHIPSET_AVOTON; ++#endif + } + + ret = read_ich_descriptors_from_dump(buf, len, &desc); +diff --git a/util/z60_flashrom.rules b/util/z60_flashrom.rules +index 8456a04..948563c 100644 +--- a/util/z60_flashrom.rules ++++ b/util/z60_flashrom.rules +@@ -80,4 +80,8 @@ ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="002a", MODE="664", GROUP="plugdev" + # http://www.diygadget.com/tiao-usb-multi-protocol-adapter-jtag-spi-i2c-serial.html + ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8a98", MODE="664", GROUP="plugdev" + ++# TIAO/DIYGADGET USB Multi-Protocol Adapter (TUMPA) Lite ++# http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_Lite_User's_Manual ++ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8a99", MODE="664", GROUP="plugdev" ++ + LABEL="flashrom_rules_end" +-- +2.7.4 + diff --git a/platform/broadcom/sonic-platform-modules-dell/tools/flashrom.sh b/platform/broadcom/sonic-platform-modules-dell/tools/flashrom.sh new file mode 100755 index 00000000000..c3af65fd6d8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/tools/flashrom.sh @@ -0,0 +1,10 @@ +#!/bin/bash +export DELL_TOOLS_DIR="platform/broadcom/sonic-platform-modules-dell/tools" + +cd $DELL_TOOLS_DIR +rm -rf $DELL_TOOLS_DIR/flashrom +git clone https://github.com/flashrom/flashrom.git +cd flashrom +git checkout tags/0.9.7 +git apply ../0002-Flashrom-support-for-Intel-Rangeley-and-Denverton-CP.patch +make diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/cfg/z9100-modules.conf b/platform/broadcom/sonic-platform-modules-dell/z9100/cfg/z9100-modules.conf new file mode 100644 index 00000000000..66f002a5fc9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/cfg/z9100-modules.conf @@ -0,0 +1,15 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-gpio +i2c-mux-pca954x + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/modules/Makefile b/platform/broadcom/sonic-platform-modules-dell/z9100/modules/Makefile new file mode 100644 index 00000000000..24ef231b2a5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := dell_mailbox.o dell_z9100_cpld.o dell_ich.o + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/modules/dell_z9100_cpld.c b/platform/broadcom/sonic-platform-modules-dell/z9100/modules/dell_z9100_cpld.c new file mode 100644 index 00000000000..6198771ab45 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/modules/dell_z9100_cpld.c @@ -0,0 +1,491 @@ + + +/* Includes only 3 things. + * a. QSFP Reset control + * b. LP Mode + * c. Module Presence + */ +#include // included for all kernel modules +#include // included for KERN_INFO +#include // included for __init and __exit macros +#include +#include +#include +#include + + +//iom cpld slave address +#define IOM_CPLD_SLAVE_ADD 0x3e + +//iom cpld ver register +#define IOM_CPLD_SLAVE_VER 0x00 + +//qsfp reset cntrl reg on each iom +#define QSFP_RST_CRTL_REG0 0x10 +#define QSFP_RST_CRTL_REG1 0x11 + +//qsfp lp mode reg on each iom +#define QSFP_LPMODE_REG0 0x12 +#define QSFP_LPMODE_REG1 0x13 + +//qsfp mod presence reg on each iom +#define QSFP_MOD_PRS_REG0 0x16 +#define QSFP_MOD_PRS_REG1 0x17 + +//qsfp interrupt registers +#define QSFP_INT_STA_REG0 0x14 +#define QSFP_INT_STA_REG1 0x15 +#define QSFP_ABS_STA_REG0 0x16 +#define QSFP_ABS_STA_REG1 0x17 +#define QSFP_TRIG_MOD 0x20 +#define QSFP_INT_COMBINE 0x21 +#define QSFP_INT0 0x22 +#define QSFP_INT1 0x23 +#define QSFP_ABS_INT0 0x24 +#define QSFP_ABS_INT1 0x25 +#define QSFP_INT_MASK0 0x26 +#define QSFP_INT_MASK1 0x27 +#define QSFP_ABS_MASK0 0x28 +#define QSFP_ABS_MASK1 0x29 + +struct cpld_data { + struct i2c_client *client; + struct mutex update_lock; +}; + + +static void dell_z9100_iom_cpld_add_client(struct i2c_client *client) +{ + struct cpld_data *data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + + if (!data) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + data->client = client; + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); +} + +static void dell_z9100_iom_cpld_remove_client(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + kfree(data); + return ; +} + +int dell_z9100_iom_cpld_read(struct cpld_data *data, u8 reg) +{ + int ret = -EPERM; + u8 high_reg =0x00; + + mutex_lock(&data->update_lock); + + ret = i2c_smbus_write_byte_data(data->client, high_reg,reg); + ret = i2c_smbus_read_byte(data->client); + mutex_unlock(&data->update_lock); + + return ret; +} + +int dell_z9100_iom_cpld_write(struct cpld_data *data,u8 reg, u8 value) +{ + int ret = -EIO; + u16 devdata=0; + u8 high_reg =0x00; + + mutex_lock(&data->update_lock); + devdata = (value << 8) | reg; + i2c_smbus_write_word_data(data->client,high_reg,devdata); + mutex_unlock(&data->update_lock); + + return ret; +} +static ssize_t get_cpldver(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u8 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,IOM_CPLD_SLAVE_VER); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u8)ret & 0xff; + return sprintf(buf,"IOM CPLD Version:0x%02x\n",devdata); +} + +static ssize_t get_modprs(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_MOD_PRS_REG0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_MOD_PRS_REG1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_lpmode(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_LPMODE_REG0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_LPMODE_REG1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_reset(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_RST_CRTL_REG0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_RST_CRTL_REG1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t set_lpmode(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_z9100_iom_cpld_write(data,QSFP_LPMODE_REG0,(u8)(devdata & 0xff)); + dell_z9100_iom_cpld_write(data,QSFP_LPMODE_REG1,(u8)((devdata >> 8) & 0xff)); + + return count; +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_z9100_iom_cpld_write(data,QSFP_RST_CRTL_REG0,(u8)(devdata & 0xff)); + dell_z9100_iom_cpld_write(data,QSFP_RST_CRTL_REG1,(u8)((devdata >> 8) & 0xff)); + + return count; +} + +static ssize_t get_int_sta(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_INT_STA_REG0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_INT_STA_REG1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_abs_sta(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_ABS_STA_REG0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_ABS_STA_REG1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_trig_mod(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u8 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_TRIG_MOD); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u8)ret & 0xff; + return sprintf(buf,"0x%02x\n",devdata); +} + +static ssize_t set_trig_mod(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_z9100_iom_cpld_write(data,QSFP_TRIG_MOD,(u8)(devdata & 0xff)); + + return count; +} + +static ssize_t get_int_combine(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u8 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_INT_COMBINE); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u8)ret & 0xff; + return sprintf(buf,"0x%02x\n",devdata); +} + +static ssize_t get_int(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_INT0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_INT1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_abs_int(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_ABS_INT0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_ABS_INT1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t get_int_mask(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_INT_MASK0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_INT_MASK1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t set_int_mask(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_z9100_iom_cpld_write(data,QSFP_INT_MASK0,(u8)(devdata & 0xff)); + dell_z9100_iom_cpld_write(data,QSFP_INT_MASK1,(u8)((devdata >> 8) & 0xff)); + + return count; +} + +static ssize_t get_abs_mask(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u16 devdata=0; + struct cpld_data *data = dev_get_drvdata(dev); + + ret = dell_z9100_iom_cpld_read(data,QSFP_ABS_MASK0); + if(ret < 0) + return sprintf(buf, "read error"); + devdata = (u16)ret & 0xff; + + ret = dell_z9100_iom_cpld_read(data,QSFP_ABS_MASK1); + if(ret < 0) + return sprintf(buf, "read error"); + devdata |= (u16)(ret & 0xff) << 8; + + return sprintf(buf,"0x%04x\n",devdata); +} + +static ssize_t set_abs_mask(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long devdata; + int err; + struct cpld_data *data = dev_get_drvdata(dev); + + err = kstrtoul(buf, 16, &devdata); + if (err) + return err; + + dell_z9100_iom_cpld_write(data,QSFP_ABS_MASK0,(u8)(devdata & 0xff)); + dell_z9100_iom_cpld_write(data,QSFP_ABS_MASK1,(u8)((devdata >> 8) & 0xff)); + + return count; +} + +static DEVICE_ATTR(iom_cpld_vers,S_IRUGO,get_cpldver, NULL); +static DEVICE_ATTR(qsfp_modprs, S_IRUGO,get_modprs, NULL); +static DEVICE_ATTR(qsfp_lpmode, S_IRUGO | S_IWUSR,get_lpmode,set_lpmode); +static DEVICE_ATTR(qsfp_reset, S_IRUGO | S_IWUSR,get_reset, set_reset); +static DEVICE_ATTR(qsfp_int_sta, S_IRUGO, get_int_sta, NULL); +static DEVICE_ATTR(qsfp_abs_sta, S_IRUGO, get_abs_sta, NULL); +static DEVICE_ATTR(qsfp_trig_mod, S_IRUGO | S_IWUSR, get_trig_mod, set_trig_mod); +static DEVICE_ATTR(qsfp_int_combine, S_IRUGO, get_int_combine, NULL); +static DEVICE_ATTR(qsfp_int, S_IRUGO, get_int, NULL); +static DEVICE_ATTR(qsfp_abs_int, S_IRUGO, get_abs_int, NULL); +static DEVICE_ATTR(qsfp_int_mask, S_IRUGO | S_IWUSR, get_int_mask, set_int_mask); +static DEVICE_ATTR(qsfp_abs_mask, S_IRUGO | S_IWUSR, get_abs_mask, set_abs_mask); + +static struct attribute *i2c_cpld_attrs[] = { + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_reset.attr, + &dev_attr_qsfp_modprs.attr, + &dev_attr_iom_cpld_vers.attr, + &dev_attr_qsfp_int_sta.attr, + &dev_attr_qsfp_abs_sta.attr, + &dev_attr_qsfp_trig_mod.attr, + &dev_attr_qsfp_int_combine.attr, + &dev_attr_qsfp_int.attr, + &dev_attr_qsfp_abs_int.attr, + &dev_attr_qsfp_int_mask.attr, + &dev_attr_qsfp_abs_mask.attr, + NULL, +}; + +static struct attribute_group i2c_cpld_attr_grp = { + .attrs = i2c_cpld_attrs, +}; + +static int dell_z9100_iom_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + dev_info(&client->dev, "chip found- New\n"); + dell_z9100_iom_cpld_add_client(client); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &i2c_cpld_attr_grp); + if (status) { + printk(KERN_INFO "Cannot create sysfs\n"); + } + return 0; + +exit: + return status; +} + +static int dell_z9100_iom_cpld_remove(struct i2c_client *client) +{ + dell_z9100_iom_cpld_remove_client(client); + return 0; +} + + +static const struct i2c_device_id dell_z9100_iom_cpld_id[] = { + { "dell_z9100_iom_cpld", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, dell_z9100_iom_cpld_id); + +static struct i2c_driver dell_z9100_iom_cpld_driver = { + .driver = { + .name = "dell_z9100_iom_cpld", + }, + .probe = dell_z9100_iom_cpld_probe, + .remove = dell_z9100_iom_cpld_remove, + .id_table = dell_z9100_iom_cpld_id, +}; + + + +static int __init dell_z9100_iom_cpld_init(void) +{ + return i2c_add_driver(&dell_z9100_iom_cpld_driver); +} + +static void __exit dell_z9100_iom_cpld_exit(void) +{ + i2c_del_driver(&dell_z9100_iom_cpld_driver); +} + +MODULE_AUTHOR("Srideep Devireddy "); +MODULE_DESCRIPTION("dell_z9100_iom_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(dell_z9100_iom_cpld_init); +module_exit(dell_z9100_iom_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/check_qsfp.sh b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/check_qsfp.sh new file mode 100755 index 00000000000..38f62013e46 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/check_qsfp.sh @@ -0,0 +1,60 @@ +#!/bin/bash + +#Usage: +# check_qsfp.sh qsfp10 +# check_qsfp.sh sffp2 + +# There are 34 optics ports. 32 QSFP28, 2 SFP+ +# QSFP28 is orgainized is 3 banks +# CPLD-2 QSFP-1-12 +# CPLD-3 QSFP-13-22 +# CPLD-4 QSFP-23-32 +# SFF+ 2 ports on CPLD-4 + +optics=$1 +cpld_addr="003e" + +if [ `expr match $optics qsfp` -ne 0 ] +then + type=qsfp + id=${optics:4} + + if [ $id -le 0 -o $id -gt 32 ] + then + echo "Invalid QSFP id" + return -1 + fi + if [ $id -le 12 ] + then + #cpld=2 + cpld_bus=15 + elif [ $id -le 22 ] + then + #cpld=3 + cpld_bus=16 + else + #cpld=4 + cpld_bus=17 + fi + + if [ $id -le 8 ] + then + let qsfp_bus=42+$id + elif [ $id -le 16 ] + then + let qsfp_bus=34+${id}-8 + elif [ $id -le 24 ] + then + let qsfp_bus=26+${id}-16 + else + let qsfp_bus=18+${id}-24 + fi +else + type=sff + id=${optics:3} + cpld=4 +fi + +echo "Preence:`cat /sys/class/i2c-dev/i2c-${cpld_bus}/device/${cpld_bus}-${cpld_addr}/qsfp_modprs`" +echo "Hexdump:" +cat /sys/bus/i2c/devices/${qsfp_bus}-0050/eeprom | hexdump -C diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/override.conf b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/override.conf new file mode 100644 index 00000000000..2b3b3254661 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/override.conf @@ -0,0 +1,3 @@ +[Service] +ExecStart= +ExecStart=/usr/share/sonic/device/x86_64-dell_z9100_c2538-r0/platform_reboot_override diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/platform_reboot_override b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/platform_reboot_override new file mode 100755 index 00000000000..3e165630658 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/platform_reboot_override @@ -0,0 +1,25 @@ +#!/usr/bin/python +import sys +import os +import struct + +PORT_RES = '/dev/port' + + +def portio_reg_write(resource, offset, val): + fd = os.open(resource, os.O_RDWR) + if(fd < 0): + print 'file open failed %s" % resource' + return + if(os.lseek(fd, offset, os.SEEK_SET) != offset): + print 'lseek failed on %s' % resource + return + ret = os.write(fd, struct.pack('B', val)) + if(ret != 1): + print 'write failed %d' % ret + return + os.close(fd) + +if __name__ == "__main__": + portio_reg_write(PORT_RES, 0xcf9, 0xe) + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/platform_sensors.py new file mode 100755 index 00000000000..76e527e13d7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/platform_sensors.py @@ -0,0 +1,326 @@ +#!/usr/bin/python +# +# On Z9100, the Platform Management Controller runs the +# thermal algorithm. It provides a mailbox for the Host +# to query relevant thermals. The dell_mailbox module +# provides the sysfs support for the following objects: +# * onboard temperature sensors +# * FAN trays +# * PSU + +import os +import sys +import logging + +Z9100_MAX_FAN_TRAYS = 5 +Z9100_MAX_PSUS = 2 +S6100_MAX_IOMS = 4 + +HWMON_DIR = "/sys/devices/platform/SMF.512/hwmon/" +HWMON_NODE = os.listdir(HWMON_DIR)[0] +MAILBOX_DIR = HWMON_DIR + HWMON_NODE + +# Get a mailbox register + + +def get_pmc_register(reg_name): + retval = 'ERR' + mb_reg_file = MAILBOX_DIR+'/'+reg_name + + if (not os.path.isfile(mb_reg_file)): + print mb_reg_file, 'not found !' + return retval + + try: + with open(mb_reg_file, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", mb_reg_file, "file !") + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + +logging.basicConfig(level=logging.DEBUG) + +if (os.path.isdir(MAILBOX_DIR)): + print 'dell-z9100-lpc' + print 'Adapter: Z9100 Platform Management Controller' +else: + logging.error('Z9100 Platform Management Controller module not loaded !') + # sys.exit(0) + +# Print the information for temperature sensors + + +def print_temperature_sensors(): + print("\nOnboard Temperature Sensors:") + print ' CPU: ',\ + int(get_pmc_register('temp1_input'))/1000, 'C' + print ' BCM56960 (PSU side): ',\ + int(get_pmc_register('temp2_input'))/1000, 'C' + print ' System Outlet 1 (switch board): ',\ + int(get_pmc_register('temp3_input'))/1000, 'C' + print ' BCM56960 (IO side): ',\ + int(get_pmc_register('temp4_input'))/1000, 'C' + print ' System Outlet 2 (CPU board): ',\ + int(get_pmc_register('temp9_input'))/1000, 'C' + print ' System Inlet Left (IO side): ',\ + int(get_pmc_register('temp6_input'))/1000, 'C' + +print_temperature_sensors() + + +# Print the information for voltage sensors + + +def print_voltage_sensors(): + print("\nOnboard Voltage Sensors:") + + print ' CPU XP3R3V_EARLY ',\ + float(get_pmc_register('in1_input'))/1000, 'V' + print '\n CPU XP5R0V_CP ',\ + float(get_pmc_register('in2_input'))/1000, 'V' + print ' CPU XP3R3V_STD ',\ + float(get_pmc_register('in3_input'))/1000, 'V' + print ' CPU XP3R3V_CP ',\ + float(get_pmc_register('in4_input'))/1000, 'V' + print ' CPU XP0R75V_VTT_A ',\ + float(get_pmc_register('in5_input'))/1000, 'V' + print ' CPU XPPR75V_VTT_B ',\ + float(get_pmc_register('in6_input'))/1000, 'V' + print ' CPU XP1R07V_CPU ',\ + float(get_pmc_register('in7_input'))/1000, 'V' + print ' CPU XP1R0V_CPU ',\ + float(get_pmc_register('in8_input'))/1000, 'V' + print ' CPU XP12R0V ',\ + float(get_pmc_register('in9_input'))/1000, 'V' + print ' CPU VDDR_CPU_2 ',\ + float(get_pmc_register('in10_input'))/1000, 'V' + print ' CPU VDDR_CPU_1 ',\ + float(get_pmc_register('in11_input'))/1000, 'V' + print ' CPU XP1R5V_CLK ',\ + float(get_pmc_register('in12_input'))/1000, 'V' + print ' CPU XP1R8V_CPU ',\ + float(get_pmc_register('in13_input'))/1000, 'V' + print ' CPU XP1R0V_CPU_VNN ',\ + float(get_pmc_register('in14_input'))/1000, 'V' + print ' CPU XP1R0V_CPU_VCC ',\ + float(get_pmc_register('in15_input'))/1000, 'V' + print ' CPU XP1R5V_EARLY ',\ + float(get_pmc_register('in16_input'))/1000, 'V' + print ' SW XP3R3V_MON ',\ + float(get_pmc_register('in17_input'))/1000, 'V' + print ' SW XP1R8V_MON ',\ + float(get_pmc_register('in19_input'))/1000, 'V' + print ' SW XP1R2V_MON ',\ + float(get_pmc_register('in20_input'))/1000, 'V' + print ' SW XP1R0V_SW_MON ',\ + float(get_pmc_register('in21_input'))/1000, 'V' + print ' SW XP1R0V_ROV_SW_MON ',\ + float(get_pmc_register('in22_input'))/1000, 'V' + print ' SW XR1R0V_BCM84752_MON ',\ + float(get_pmc_register('in23_input'))/1000, 'V' + print ' SW XP5V_MB_MON ',\ + float(get_pmc_register('in24_input'))/1000, 'V' + print ' SW XP1R8V_FPGA_MON ',\ + float(get_pmc_register('in25_input'))/1000, 'V' + print ' SW XP3R3V_FPGA_MON ',\ + float(get_pmc_register('in26_input'))/1000, 'V' + print ' SW XP3R3V_EARLY_MON ',\ + float(get_pmc_register('in27_input'))/1000, 'V' + print ' SW XP1R0V_ ',\ + float(get_pmc_register('curr21_input'))/10000, 'A' + print ' SW XP1R0V_ROV ',\ + float(get_pmc_register('curr22_input'))/10000, 'A' + + + +print_voltage_sensors() + +# Print the information for 1 Fan Tray + + +def print_fan_tray(tray): + + Fan_Status = ['Normal', 'Abnormal'] + Airflow_Direction = ['B2F', 'F2B'] + + print ' Fan Tray ' + str(tray) + ':' + + if (tray == 1): + fan1_speed = get_pmc_register('fan1_input') + fan2_speed = get_pmc_register('fan2_input') + air_flow_reg = int(get_pmc_register('fan1_airflow'), 16) + fan1_status = 0 if fan1_speed >= 1000 else 1 + fan2_status = 0 if fan2_speed >= 1000 else 1 + + print ' Fan1 Speed: ', fan1_speed, 'RPM' + print ' Fan2 Speed: ', fan2_speed, 'RPM' + print ' Fan1 State: ', Fan_Status[fan1_status] + print ' Fan2 State: ', Fan_Status[fan2_status] + print ' Air Flow: ', Airflow_Direction[air_flow_reg] + elif (tray == 2): + fan1_speed = get_pmc_register('fan3_input') + fan2_speed = get_pmc_register('fan4_input') + air_flow_reg = int(get_pmc_register('fan3_airflow'), 16) + fan1_status = 0 if fan1_speed >= 1000 else 1 + fan2_status = 0 if fan2_speed >= 1000 else 1 + + print ' Fan1 Speed: ', fan1_speed, 'RPM' + print ' Fan2 Speed: ', fan2_speed, 'RPM' + print ' Fan1 State: ', Fan_Status[fan1_status] + print ' Fan2 State: ', Fan_Status[fan2_status] + print ' Air Flow: ', Airflow_Direction[air_flow_reg] + elif (tray == 3): + fan1_speed = get_pmc_register('fan5_input') + fan2_speed = get_pmc_register('fan6_input') + air_flow_reg = int(get_pmc_register('fan5_airflow'), 16) + fan1_status = 0 if fan1_speed >= 1000 else 1 + fan2_status = 0 if fan2_speed >= 1000 else 1 + + print ' Fan1 Speed: ', fan1_speed, 'RPM' + print ' Fan2 Speed: ', fan2_speed, 'RPM' + print ' Fan1 State: ', Fan_Status[fan1_status] + print ' Fan2 State: ', Fan_Status[fan2_status] + print ' Air Flow: ', Airflow_Direction[air_flow_reg] + elif (tray == 4): + fan1_speed = get_pmc_register('fan7_input') + fan2_speed = get_pmc_register('fan8_input') + air_flow_reg = int(get_pmc_register('fan7_airflow'), 16) + fan1_status = 0 if fan1_speed >= 1000 else 1 + fan2_status = 0 if fan2_speed >= 1000 else 1 + + print ' Fan1 Speed: ', fan1_speed, 'RPM' + print ' Fan2 Speed: ', fan2_speed, 'RPM' + print ' Fan1 State: ', Fan_Status[fan1_status] + print ' Fan2 State: ', Fan_Status[fan2_status] + print ' Air Flow: ', Airflow_Direction[air_flow_reg] + elif (tray == 5): + fan1_speed = get_pmc_register('fan9_input') + fan2_speed = get_pmc_register('fan10_input') + air_flow_reg = int(get_pmc_register('fan9_airflow'), 16) + fan1_status = 0 if fan1_speed >= 1000 else 1 + fan2_status = 0 if fan2_speed >= 1000 else 1 + + print ' Fan1 Speed: ', fan1_speed, 'RPM' + print ' Fan2 Speed: ', fan2_speed, 'RPM' + print ' Fan1 State: ', Fan_Status[fan1_status] + print ' Fan2 State: ', Fan_Status[fan2_status] + print ' Air Flow: ', Airflow_Direction[air_flow_reg] + + +print('\nFan Trays:') +fan_tray_presence = get_pmc_register('fan_tray_presence') + +if (fan_tray_presence != 'ERR'): + fan_tray_presence = int(fan_tray_presence, 16) + + for tray in range(0, Z9100_MAX_FAN_TRAYS): + if (fan_tray_presence & (1 << tray)): + print_fan_tray(tray + 1) + else: + print '\n Fan Tray ' + str(tray + 1) + ': Not present' +else: + logging.error('Unable to read FAN presence') + +# Print the information for PSU1, PSU2 + + +def print_psu(psu): + Psu_Type = ['Normal', 'Mismatch'] + Psu_Input_Type = ['AC', 'DC'] + PSU_STATUS_TYPE_BIT = 4 + PSU_STATUS_INPUT_TYPE_BIT = 1 + PSU_FAN_PRESENT_BIT = 2 + PSU_FAN_STATUS_BIT = 1 + PSU_FAN_AIR_FLOW_BIT = 0 + Psu_Fan_Presence = ['Present', 'Absent'] + Psu_Fan_Status = ['Normal', 'Abnormal'] + Psu_Fan_Airflow = ['B2F', 'F2B'] + + + print ' PSU ' + str(psu) + ':' + if (psu == 1): + psu_status = int(get_pmc_register('psu1_presence'), 16) + else: + psu_status = int(get_pmc_register('psu2_presence'), 16) + + psu_input_type = (psu_status & (1 << PSU_STATUS_INPUT_TYPE_BIT)) >>\ + PSU_STATUS_INPUT_TYPE_BIT + psu_type = (psu_status & (1 << PSU_STATUS_TYPE_BIT)) >>\ + PSU_STATUS_TYPE_BIT + + print ' Input: ', Psu_Input_Type[psu_input_type] + print ' Type: ', Psu_Type[psu_type] + + # PSU FAN details + if (psu == 1): + print ' FAN Speed: ', get_pmc_register('fan11_input'), 'RPM' + psu_fan_airflow = int(get_pmc_register('fan11_airflow')) + psu_fan_status = int(get_pmc_register('fan11_alarm')) + psu_fan_present = int(get_pmc_register('fan11_fault')) + input_voltage = float(get_pmc_register('in29_input')) / 1000 + output_voltage = float(get_pmc_register('in30_input')) / 1000 + input_current = float(get_pmc_register('curr601_input')) / 100 + output_current = float(get_pmc_register('curr602_input')) /100 + input_power = float(get_pmc_register('power1_input')) / 1000000 + output_power = float(get_pmc_register('power2_input')) / 1000000 + if (input_power != 0): + psu_fan_temp = int(get_pmc_register('temp14_input'))/1000 + else: + print ' FAN Speed: ', get_pmc_register('fan12_input'), 'RPM' + psu_fan_airflow = int(get_pmc_register('fan12_airflow')) + psu_fan_status = int(get_pmc_register('fan12_alarm')) + psu_fan_present = int(get_pmc_register('fan12_fault')) + input_voltage = float(get_pmc_register('in31_input')) / 1000 + output_voltage = float(get_pmc_register('in32_input')) / 1000 + input_current = float(get_pmc_register('curr701_input')) / 100 + output_current = float(get_pmc_register('curr702_input')) / 100 + input_power = float(get_pmc_register('power3_input')) / 1000000 + output_power = float(get_pmc_register('power4_input')) / 1000000 + if (input_power != 0): + psu_fan_temp = int(get_pmc_register('temp15_input'))/1000 + + print ' FAN: ', Psu_Fan_Presence[psu_fan_present] + print ' FAN Status: ', Psu_Fan_Status[psu_fan_status] + print ' FAN AIRFLOW: ', Psu_Fan_Airflow[psu_fan_airflow] + + # PSU input & output monitors + print ' Input Voltage: %6.2f' % (input_voltage), 'V' + + print ' Output Voltage: %6.2f' % (output_voltage), 'V' + + print ' Input Current: %6.2f' % (input_current), 'A' + + print ' Output Current: %6.2f' % (output_current), 'A' + + print ' Input Power: %6.2f' % (input_power), 'W' + + print ' Output Power: %6.2f' % (output_power), 'W' + + # PSU firmware gives spurious temperature reading without input power + if (input_power != 0): + print ' Temperature: ', psu_fan_temp, 'C' + else: + print ' Temperature: ', 'NA' + +print('\nPSUs:') +for psu in range(1, Z9100_MAX_PSUS + 1): + + if (psu == 1): + psu_status = get_pmc_register('psu1_presence') + else: + psu_status = get_pmc_register('psu2_presence') + + if (psu_status != 'ERR'): + psu_status = int(psu_status, 16) + + if (~psu_status & 0b1): + print_psu(psu) + else: + print '\n PSU ', psu, 'Not present' + else: + logging.error('Unable to check PSU presence') + +print '\n Total Power: ', get_pmc_register('current_total_power'), 'W' diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/sensors b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/sensors new file mode 100755 index 00000000000..958cbdcb7be --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/sensors @@ -0,0 +1,3 @@ +#!/bin/bash +docker exec -i pmon sensors "$@" + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/z9100_platform.sh b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/z9100_platform.sh new file mode 100755 index 00000000000..7fe841ef544 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/scripts/z9100_platform.sh @@ -0,0 +1,262 @@ +#!/bin/bash + +#platform init script for Dell Z9100 + +source dell_i2c_utils.sh + +init_devnum() { + found=0 + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + # iSMT adapter can be at either dffd0000 or dfff0000 + if [[ $devname == 'SMBus iSMT adapter at '* ]]; then + found=1 + break + fi + done + + [[ $found -eq 0 ]] && echo "cannot find iSMT" && exit 1 +} + +# Attach/Detach CPU board mux @ 0x70 +cpu_board_mux() { + case $1 in + "new_device") i2c_mux_create pca9547 0x70 $devnum 2 + ;; + "delete_device") i2c_mux_delete 0x70 $devnum + ;; + *) echo "z9100_platform: cpu_board_mux: invalid command !" + ;; + esac +} + +# Attach/Detach switch board MUX to IOM CPLDs @ 0x71 +switch_board_mux() { + case $1 in + "new_device") i2c_mux_create pca9548 0x71 4 10 + ;; + "delete_device") i2c_mux_delete 0x71 4 + ;; + *) echo "z9100_platform: switch_board_mux : invalid command !" + ;; + esac +} + +# Attach/Detach syseeprom on CPU board +sys_eeprom() { + case $1 in + "new_device") i2c_config "echo 24c02 0x50 > /sys/bus/i2c/devices/i2c-2/$1" + ;; + "delete_device") i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-2/$1" + ;; + *) echo "z9100_platform: sys_eeprom : invalid command !" + ;; + esac +} + +#Attach/Detach cpld devices to drivers for each iom +switch_board_cpld() { + case $1 in + "new_device") + for ((i=14;i<=17;i++)); + do + i2c_config "echo dell_z9100_iom_cpld 0x3e > /sys/bus/i2c/devices/i2c-$i/$1" + done + ;; + "delete_device") + for ((i=14;i<=17;i++)); + do + i2c_config "echo 0x3e > /sys/bus/i2c/devices/i2c-$i/$1" + done + ;; + *) echo "z9100_platform: switch_board_cpld : invalid command !" + ;; + esac +} + +#Attach/Detach the MUX connecting all QSFPs +switch_board_qsfp_mux() { + case $1 in + "new_device") + # The mux for the QSFPs spawn {18..25}, {26..33}, {34..41} and {42..49} + # starting at chennel 18 and 8 channels per mux. + channel_first=18 + for ((i=9;i>=6;i--)); + do + # 0x71 mux on the IOM 1 + mux_index=$(expr $i - 5) + echo "Attaching PCA9548 $mux_index" + i2c_mux_create pca9548 0x71 $i $channel_first + channel_first=$(expr $channel_first + 8) + done + ;; + "delete_device") + for ((i=9;i>=6;i--)); + do + # 0x71 mux on the IOM 1 + mux_index=$(expr $i - 5) + echo "Detaching PCA9548 $mux_index" + i2c_mux_delete 0x71 $i + done + ;; + *) echo "z9100_platform: switch_board_qsfp_mux: invalid command !" + ;; + esac +} + +#Attach/Detach the SFP modules on PCA9548_2 +switch_board_sfp() { + case $1 in + "new_device") i2c_config "echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-11/$1" + i2c_config "echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-12/$1" + ;; + "delete_device") i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-11/$1" + i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-12/$1" + ;; + *) echo "z9100_platform: switch_board_sfp: invalid command !" + ;; + esac +} + +# Attach/Detach 32 instances of EEPROM driver QSFP ports on IO module 1 +#eeprom can dump data using below command +switch_board_qsfp() { + case $1 in + "new_device") + for ((i=18;i<=49;i++)); + do + i2c_config "echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-$i/$1" + done + ;; + "delete_device") + for ((i=18;i<=49;i++)); + do + i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-$i/$1" + done + ;; + + *) echo "z9100_platform: switch_board_qsfp: invalid command !" + ;; + esac +} + +# Enable/Disable xcvr presence interrupts +xcvr_presence_interrupts() { + case $1 in + "enable") + for ((i=14;i<=16;i++)); + do + echo 0x0 > /sys/class/i2c-adapter/i2c-$i/$i-003e/qsfp_abs_mask + done + ;; + "disable") + for ((i=14;i<=16;i++)); + do + echo 0xffff > /sys/class/i2c-adapter/i2c-$i/$i-003e/qsfp_abs_mask + done + ;; + *) echo "z9100_platform: xcvr_presence_interrupts: invalid command !" + ;; + esac +} + +# Reset the mux tree +reset_muxes() { + # Reset the IOM muxes and the switch card mux + io_rd_wr.py --set --val 0xe0 --offset 0x110 + io_rd_wr.py --set --val 0xff --offset 0x110 + + # Reset the CPU Card PCA9547 + io_rd_wr.py --set --val 0xfd --offset 0x20b + io_rd_wr.py --set --val 0xff --offset 0x20b +} + +# Copy led_proc_init.soc file according to the HWSKU +init_switch_port_led() { + T0="Force10-Z9100-C8D48" + T1="Force10-Z9100-C32" + device="/usr/share/sonic/device" + platform=$(/usr/local/bin/sonic-cfggen -H -v DEVICE_METADATA.localhost.platform) + hwsku=$(cat /etc/sonic/config_db.json | grep -A2 "DEVICE_METADATA" | grep "hwsku" | cut -d ":" -f2 | sed 's/"//g' | sed 's/,//g'| xargs ) + + if [ -z "$hwsku" ]; then + #Check minigraph for hwsku + cat /etc/sonic/minigraph.xml | grep $T1 > /dev/null + if [ $? -eq 0 ]; then + hwsku=$T1 + else + hwsku=$T0 + fi + fi + + led_proc_init="$device/$platform/$hwsku/led_proc_init.soc" + + # Remove old HWSKU LED file.. + rm -rf $device/$platform/led_proc_init.soc + + if [ -e $led_proc_init ] && [ ! -e $device/$platform/led_proc_init.soc ]; then + cp $led_proc_init $device/$platform + fi + +} + +install_python_api_package() { + device="/usr/share/sonic/device" + platform=$(/usr/local/bin/sonic-cfggen -H -v DEVICE_METADATA.localhost.platform) + + rv=$(pip install $device/$platform/sonic_platform-1.0-py2-none-any.whl) +} + +remove_python_api_package() { + rv=$(pip show sonic-platform > /dev/null 2>/dev/null) + if [ $? -eq 0 ]; then + rv = $(pip uninstall -y sonic-platform > /dev/null 2>/dev/null) + fi +} + +init_devnum + +if [[ "$1" == "init" ]]; then + modprobe i2c-dev + modprobe i2c-mux-pca954x force_deselect_on_exit=1 + modprobe dell_ich + modprobe dell_mailbox + modprobe dell_z9100_cpld + + cpu_board_mux "new_device" + switch_board_mux "new_device" + sys_eeprom "new_device" + switch_board_cpld "new_device" + switch_board_qsfp_mux "new_device" + switch_board_sfp "new_device" + switch_board_qsfp "new_device" + xcvr_presence_interrupts "enable" + + #Copy led_proc_init.soc + init_switch_port_led + install_python_api_package + + value=0x0 + echo $value > /sys/class/i2c-adapter/i2c-14/14-003e/qsfp_lpmode + echo $value > /sys/class/i2c-adapter/i2c-15/15-003e/qsfp_lpmode + echo $value > /sys/class/i2c-adapter/i2c-16/16-003e/qsfp_lpmode + +elif [[ "$1" == "deinit" ]]; then + xcvr_presence_interrupts "disable" + switch_board_sfp "delete_device" + switch_board_cpld "delete_device" + switch_board_mux "delete_device" + sys_eeprom "delete_device" + switch_board_qsfp "delete_device" + switch_board_qsfp_mux "delete_device" + cpu_board_mux "delete_device" + + modprobe -r dell_z9100_cpld + modprobe -r dell_mailbox + modprobe -r i2c-mux-pca954x + modprobe -r i2c-dev + modprobe -r dell_ich + remove_python_api_package +else + echo "z9100_platform : Invalid option !" +fi diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/setup.py b/platform/broadcom/sonic-platform-modules-dell/z9100/setup.py new file mode 120000 index 00000000000..4f6de9941d9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/setup.py @@ -0,0 +1 @@ +../s6100/setup.py \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/__init__.py new file mode 100755 index 00000000000..56f88c6e0fe --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/__init__.py @@ -0,0 +1,3 @@ +__all__ = ["platform", "chassis", "fan", "psu", "sfp", "thermal"] +from sonic_platform import * + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/chassis.py new file mode 100755 index 00000000000..3472bb3e7fb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/chassis.py @@ -0,0 +1,232 @@ +#!/usr/bin/env python + +############################################################################# +# DELLEMC Z9100 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + import os + import subprocess + import re + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.sfp import Sfp + from sonic_platform.fan import Fan + from sonic_platform.psu import Psu + from sonic_platform.thermal import Thermal + from sonic_platform.component import Component + from eeprom import Eeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +MAX_Z9100_FANTRAY = 5 +MAX_Z9100_FAN = 2 +MAX_Z9100_PSU = 2 +MAX_Z9100_THERMAL = 8 +MAX_Z9100_COMPONENT = 6 + + +class Chassis(ChassisBase): + """ + DELLEMC Platform-specific Chassis class + """ + + HWMON_DIR = "/sys/devices/platform/SMF.512/hwmon/" + HWMON_NODE = os.listdir(HWMON_DIR)[0] + MAILBOX_DIR = HWMON_DIR + HWMON_NODE + EEPROM_I2C_MAPPING = { + 0: [9, 18], 1: [9, 19], 2: [9, 20], 3: [9, 21], + 4: [9, 22], 5: [9, 23], 6: [9, 24], 7: [9, 25], + 8: [8, 26], 9: [8, 27], 10: [8, 28], 11: [8, 29], + 12: [8, 31], 13: [8, 30], 14: [8, 33], 15: [8, 32], # Remapped 4 entries + 16: [7, 34], 17: [7, 35], 18: [7, 36], 19: [7, 37], + 20: [7, 38], 21: [7, 39], 22: [7, 40], 23: [7, 41], + 24: [6, 42], 25: [6, 43], 26: [6, 44], 27: [6, 45], + 28: [6, 46], 29: [6, 47], 30: [6, 48], 31: [6, 49] + } + PORT_I2C_MAPPING = { + # 0th Index = i2cLine, 1st Index = portIdx in i2cLine + 0: [14, 0], 1: [14, 1], 2: [14, 2], 3: [14, 3], + 4: [14, 4], 5: [14, 5], 6: [14, 6], 7: [14, 7], + 8: [14, 8], 9: [14, 9], 10: [14, 10], 11: [14, 11], + 12: [15, 0], 13: [15, 1], 14: [15, 2], 15: [15, 3], + 16: [15, 4], 17: [15, 5], 18: [15, 6], 19: [15, 7], + 20: [15, 8], 21: [15, 9], 22: [16, 0], 23: [16, 1], + 24: [16, 2], 25: [16, 3], 26: [16, 4], 27: [16, 5], + 28: [16, 6], 29: [16, 7], 30: [16, 8], 31: [16, 9] + } + + reset_reason_dict = {} + reset_reason_dict[11] = ChassisBase.REBOOT_CAUSE_POWER_LOSS + reset_reason_dict[33] = ChassisBase.REBOOT_CAUSE_WATCHDOG + reset_reason_dict[44] = ChassisBase.REBOOT_CAUSE_NON_HARDWARE + reset_reason_dict[55] = ChassisBase.REBOOT_CAUSE_NON_HARDWARE + + power_reason_dict = {} + power_reason_dict[11] = ChassisBase.REBOOT_CAUSE_POWER_LOSS + power_reason_dict[22] = ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU + power_reason_dict[33] = ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC + power_reason_dict[44] = ChassisBase.REBOOT_CAUSE_INSUFFICIENT_FAN_SPEED + + def __init__(self): + PORT_START = 0 + PORT_END = 31 + PORTS_IN_BLOCK = (PORT_END + 1) + + # sfp.py will read eeprom contents and retrive the eeprom data. + # It will also provide support sfp controls like reset and setting + # low power mode. + # We pass the eeprom path and sfp control path from chassis.py + # So that sfp.py implementation can be generic to all platforms + eeprom_base = "/sys/class/i2c-adapter/i2c-{0}/i2c-{1}/{1}-0050/eeprom" + sfp_ctrl_base = "/sys/class/i2c-adapter/i2c-{0}/{0}-003e/" + for index in range(0, PORTS_IN_BLOCK): + eeprom_path = eeprom_base.format(self.EEPROM_I2C_MAPPING[index][0], + self.EEPROM_I2C_MAPPING[index][1]) + sfp_control = sfp_ctrl_base.format(self.PORT_I2C_MAPPING[index][0]) + sfp_node = Sfp(index, 'QSFP', eeprom_path, sfp_control, + self.PORT_I2C_MAPPING[index][1]) + self._sfp_list.append(sfp_node) + + ChassisBase.__init__(self) + # Initialize EEPROM + self.sys_eeprom = Eeprom() + for i in range(MAX_Z9100_FANTRAY): + for j in range(MAX_Z9100_FAN): + fan = Fan(i, j) + self._fan_list.append(fan) + + for i in range(MAX_Z9100_PSU): + psu = Psu(i) + self._psu_list.append(psu) + + for i in range(MAX_Z9100_THERMAL): + thermal = Thermal(i) + self._thermal_list.append(thermal) + + for i in range(MAX_Z9100_COMPONENT): + component = Component(i) + self._component_list.append(component) + + def _get_pmc_register(self, reg_name): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + mb_reg_file = self.MAILBOX_DIR + '/' + reg_name + + if (not os.path.isfile(mb_reg_file)): + return rv + + try: + with open(mb_reg_file, 'r') as fd: + rv = fd.read() + except Exception as error: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self.sys_eeprom.modelstr() + + def get_presence(self): + """ + Retrieves the presence of the chassis + Returns: + bool: True if chassis is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the chassis + Returns: + string: Model/part number of chassis + """ + return self.sys_eeprom.part_number_str() + + def get_serial(self): + """ + Retrieves the serial number of the chassis (Service tag) + Returns: + string: Serial number of chassis + """ + return self.sys_eeprom.serial_str() + + def get_status(self): + """ + Retrieves the operational status of the chassis + Returns: + bool: A boolean value, True if chassis is operating properly + False if not + """ + return True + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self.sys_eeprom.base_mac_addr() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this chassis. + """ + return self.sys_eeprom.serial_number_str() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self.sys_eeprom.system_eeprom_info() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + reset_reason = int(self._get_pmc_register('smf_reset_reason')) + power_reason = int(self._get_pmc_register('smf_poweron_reason')) + + # Reset_Reason = 11 ==> PowerLoss + # So return the reboot reason from Last Power_Reason Dictionary + # If Reset_Reason is not 11 return from Reset_Reason dictionary + # Also check if power_reason, reset_reason are valid values by + # checking key presence in dictionary else return + # REBOOT_CAUSE_HARDWARE_OTHER as the Power_Reason and Reset_Reason + # registers returned invalid data + if (reset_reason == 11): + if (power_reason in self.power_reason_dict): + return (self.power_reason_dict[power_reason], None) + else: + if (reset_reason in self.reset_reason_dict): + return (self.reset_reason_dict[reset_reason], None) + + return (ChassisBase.REBOOT_CAUSE_HARDWARE_OTHER, "Invalid Reason") diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/component.py new file mode 100644 index 00000000000..dccb8f6ac2d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/component.py @@ -0,0 +1,164 @@ +#!/usr/bin/env python + +######################################################################## +# DELLEMC Z9100 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in +# the platform +# +######################################################################## + +try: + import os + import subprocess + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BIOS_QUERY_VERSION_COMMAND = "dmidecode -s system-version" + + +class Component(ComponentBase): + """DellEMC Platform-specific Component class""" + + HWMON_DIR = "/sys/devices/platform/SMF.512/hwmon/" + HWMON_NODE = os.listdir(HWMON_DIR)[0] + MAILBOX_DIR = HWMON_DIR + HWMON_NODE + + CHASSIS_COMPONENTS = [ + ["BIOS", ("Performs initialization of hardware components during " + "booting")], + ["CPLD1", "Used for managing the system LEDs"], + ["CPLD2", "Used for managing QSFP28 modules (1-12)"], + ["CPLD3", "Used for managing QSFP28 modules (13-22)"], + ["CPLD4", ("Used for managing QSFP28 modules (23-32) and SFP+ " + "modules")], + ["FPGA", ("Platform management controller for on-board temperature " + "monitoring, in-chassis power, Fan and LED control")] + ] + + def __init__(self, component_index=0): + self.index = component_index + self.name = self.CHASSIS_COMPONENTS[self.index][0] + self.description = self.CHASSIS_COMPONENTS[self.index][1] + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # sysfs_file and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + except Exception as error: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def _get_command_result(self, cmdline): + try: + proc = subprocess.Popen(cmdline.split(), stdout=subprocess.PIPE, + stderr=subprocess.STDOUT) + stdout = proc.communicate()[0] + proc.wait() + result = stdout.rstrip('\n') + except OSError: + result = None + + return result + + def _get_cpld_version(self, cpld_number): + io_resource = "/dev/port" + CPLD1_VERSION_ADDR = 0x100 + + if (cpld_number == 1): + fd = os.open(io_resource, os.O_RDONLY) + if (fd < 0): + return 'NA' + + if (os.lseek(fd, CPLD1_VERSION_ADDR, os.SEEK_SET) + != CPLD1_VERSION_ADDR): + os.close(fd) + return 'NA' + + buf = os.read(fd, 1) + cpld_version = str(ord(buf)) + os.close(fd) + + return cpld_version + else: + cpld_version_file = ("/sys/class/i2c-adapter/i2c-{0}/{0}-003e" + "/iom_cpld_vers").format(12 + cpld_number) + ver_str = self._read_sysfs_file(cpld_version_file) + + if (ver_str == "read error") or (ver_str == 'ERR'): + return 'NA' + + ver_str = ver_str.rstrip("\r\n") + cpld_version = str(int(ver_str.split(":")[1], 16)) + + return cpld_version + + def _get_fpga_version(self): + fpga_ver_file = self.MAILBOX_DIR + '/smf_firmware_ver' + fpga_ver = self._read_sysfs_file(fpga_ver_file) + if (fpga_ver != 'ERR'): + return fpga_ver + else: + return 'NA' + + def get_name(self): + """ + Retrieves the name of the component + + Returns: + A string containing the name of the component + """ + return self.name + + def get_description(self): + """ + Retrieves the description of the component + + Returns: + A string containing the description of the component + """ + return self.description + + def get_firmware_version(self): + """ + Retrieves the firmware version of the component + + Returns: + A string containing the firmware version of the component + """ + if self.index == 0: # BIOS + bios_ver = self._get_command_result(BIOS_QUERY_VERSION_COMMAND) + + if not bios_ver: + return 'NA' + else: + return bios_ver + + elif self.index < 5: # CPLD + return self._get_cpld_version(self.index) + elif self.index == 5: # FPGA + return self._get_fpga_version() + + def install_firmware(self, image_path): + """ + Installs firmware to the component + + Args: + image_path: A string, path to firmware image + + Returns: + A boolean, True if install was successful, False if not + """ + return False diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/eeprom.py new file mode 100644 index 00000000000..15a2cec8019 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/eeprom.py @@ -0,0 +1,114 @@ +#!/usr/bin/env python + +############################################################################# +# DellEmc Z9100 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo + import binascii +except ImportError, e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0050/eeprom" + super(Eeprom, self).__init__(self.eeprom_path, 0, '', True) + self.eeprom_tlv_dict = dict() + try: + self.eeprom_data = self.read_eeprom() + except: + self.eeprom_data = "N/A" + raise RuntimeError("Eeprom is not Programmed") + else: + eeprom = self.eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + return + + total_length = (ord(eeprom[9]) << 8) | ord(eeprom[10]) + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + ord(eeprom[tlv_index + 1])] + code = "0x%02X" % (ord(tlv[0])) + + if ord(tlv[0]) == self._TLV_CODE_VENDOR_EXT: + value = str((ord(tlv[2]) << 24) | (ord(tlv[3]) << 16) | + (ord(tlv[4]) << 8) | ord(tlv[5])) + value += str(tlv[6:6 + ord(tlv[1])]) + else: + name, value = self.decoder(None, tlv) + + self.eeprom_tlv_dict[code] = value + if ord(eeprom[tlv_index]) == self._TLV_CODE_CRC_32: + break + + tlv_index += ord(eeprom[tlv_index+1]) + 2 + + def serial_number_str(self): + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_SERIAL_NUMBER) + if not is_valid: + return "N/A" + return results[2] + + def base_mac_addr(self): + (is_valid, t) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_MAC_BASE) + if not is_valid or t[1] != 6: + return super(TlvInfoDecoder, self).switchaddrstr(e) + + return ":".join([binascii.b2a_hex(T) for T in t[2]]) + + def modelstr(self): + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_PRODUCT_NAME) + if not is_valid: + return "N/A" + + return results[2] + + def part_number_str(self): + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_PART_NUMBER) + if not is_valid: + return "N/A" + + return results[2] + + def serial_str(self): + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_SERVICE_TAG) + if not is_valid: + return "N/A" + + return results[2] + + def revision_str(self): + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_DEVICE_VERSION) + if not is_valid: + return "N/A" + + return results[2] + + def system_eeprom_info(self): + """ + Returns a dictionary, where keys are the type code defined in + ONIE EEPROM format and values are their corresponding values + found in the system EEPROM. + """ + return self.eeprom_tlv_dict diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/fan.py new file mode 100755 index 00000000000..ae3c5e9fbca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/fan.py @@ -0,0 +1,234 @@ +#!/usr/bin/env python + +######################################################################## +# DellEMC Z9100 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Fans' information which are available in the platform. +# +######################################################################## + +import os.path + +try: + from sonic_platform_base.fan_base import FanBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +MAX_Z9100_PSU_FAN_SPEED = 18000 +MAX_Z9100_FAN_SPEED = 16000 + + +class Fan(FanBase): + """DellEMC Platform-specific Fan class""" + + HWMON_DIR = "/sys/devices/platform/SMF.512/hwmon/" + HWMON_NODE = os.listdir(HWMON_DIR)[0] + MAILBOX_DIR = HWMON_DIR + HWMON_NODE + + def __init__(self, fantray_index=1, fan_index=1, psu_fan=False): + self.is_psu_fan = psu_fan + if not self.is_psu_fan: + # API index is starting from 0, DellEMC platform index is starting + # from 1 + self.fantrayindex = fantray_index + 1 + self.fanindex = fan_index + 1 + self.get_fan_speed_reg = "fan{}_input".format( + 2 * (self.fantrayindex - 1) + (self.fanindex - 1) + 1 ) + self.get_fan_dir_reg = "fan{}_airflow".format( + 2 * self.fantrayindex - 1) + self.fan_serialno_reg = "fan{}_serialno".format( + 2 * self.fantrayindex - 1) + self.max_fan_speed = MAX_Z9100_FAN_SPEED + else: + # PSU Fan index starts from 11 + self.fanindex = fan_index + 10 + self.get_fan_speed_reg = "fan{}_input".format(self.fanindex) + self.max_fan_speed = MAX_Z9100_PSU_FAN_SPEED + + def _get_pmc_register(self, reg_name): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + mb_reg_file = self.MAILBOX_DIR+'/'+reg_name + + if (not os.path.isfile(mb_reg_file)): + return rv + try: + with open(mb_reg_file, 'r') as fd: + rv = fd.read() + except Exception as error: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def get_name(self): + """ + Retrieves the fan name + Returns: + string: The name of the device + """ + if not self.is_psu_fan: + return "FanTray{}-Fan{}".format(self.fantrayindex, self.fanindex) + else: + return "PSU{} Fan".format(self.fanindex - 10) + + def get_model(self): + """ + Retrieves the part number of the FAN + Returns: + string: Part number of FAN + """ + # For Serial number "US-01234D-54321-25A-0123-A00", the part + # number is "01234D" + fan_serialno = self._get_pmc_register(self.fan_serialno_reg) + if (fan_serialno != 'ERR') and self.get_presence(): + if (len(fan_serialno.split('-')) > 1): + fan_partno = fan_serialno.split('-')[1] + else: + fan_partno = 'NA' + else: + fan_partno = 'NA' + + return fan_partno + + def get_serial(self): + """ + Retrieves the serial number of the FAN + Returns: + string: Serial number of FAN + """ + # Sample Serial number format "US-01234D-54321-25A-0123-A00" + fan_serialno = self._get_pmc_register(self.fan_serialno_reg) + if (fan_serialno == 'ERR') or not self.get_presence(): + fan_serialno = 'NA' + + return fan_serialno + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if fan is present, False if not + """ + status = False + fantray_presence = self._get_pmc_register(self.get_fan_speed_reg) + if (fantray_presence != 'ERR'): + fantray_presence = int(fantray_presence, 10) + if (fantray_presence > 0): + status = True + + return status + + def get_status(self): + """ + Retrieves the operational status of the FAN + Returns: + bool: True if FAN is operating properly, False if not + """ + status = False + fantray_status = self._get_pmc_register(self.get_fan_speed_reg) + if (fantray_status != 'ERR'): + fantray_status = int(fantray_status, 10) + if (fantray_status > 5000): + status = True + + return status + + def get_direction(self): + """ + Retrieves the fan airflow direction + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = ['FAN_DIRECTION_INTAKE', 'FAN_DIRECTION_EXHAUST'] + fan_direction = self._get_pmc_register(self.get_fan_dir_reg) + if (fan_direction != 'ERR') and self.get_presence(): + fan_direction = int(fan_direction, 10) + else: + return 'N/A' + return direction[fan_direction] + + def get_speed(self): + """ + Retrieves the speed of fan + Returns: + int: percentage of the max fan speed + """ + fan_speed = self._get_pmc_register(self.get_fan_speed_reg) + if (fan_speed != 'ERR') and self.get_presence(): + speed_in_rpm = int(fan_speed, 10) + speed = (100 * speed_in_rpm)/self.max_fan_speed + else: + speed = 0 + + return speed + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + if self.get_presence(): + # The tolerance value is fixed as 20% for all the DellEmc platform + tolerance = 20 + else: + tolerance = 0 + + return tolerance + + def set_speed(self, speed): + """ + Set fan speed to expected value + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + Returns: + bool: True if set success, False if fail. + """ + + # Fan speeds are controlled by Smart-fussion FPGA. + return False + + def set_status_led(self, color): + """ + Set led to expected color + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if set success, False if fail. + """ + # Leds are controlled by Smart-fussion FPGA. + status = False + return status + + def get_status_led(self): + """ + Gets the state of the Fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings. + """ + if self.get_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_OFF + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + return 0 + + + + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/platform.py new file mode 100755 index 00000000000..426db717281 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/platform.py @@ -0,0 +1,26 @@ +#!/usr/bin/env python + +############################################################################# +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + import os + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PlatformBase): + """ + DELLEMC Platform-specific class + """ + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/psu.py new file mode 100644 index 00000000000..f76d0ac1bec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/psu.py @@ -0,0 +1,237 @@ +#!/usr/bin/env python + +######################################################################## +# DellEMC Z9100 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs' information which are available in the platform +# +######################################################################## + + +try: + import os + from sonic_platform_base.psu_base import PsuBase + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Psu(PsuBase): + """DellEMC Platform-specific PSU class""" + + HWMON_DIR = "/sys/devices/platform/SMF.512/hwmon/" + HWMON_NODE = os.listdir(HWMON_DIR)[0] + MAILBOX_DIR = HWMON_DIR + HWMON_NODE + + def __init__(self, psu_index): + # PSU is 1-based in DellEMC platforms + self.index = psu_index + 1 + self.psu_presence_reg = "psu{}_presence".format(self.index) + self.psu_serialno_reg = "psu{}_serialno".format(self.index) + if self.index == 1: + self.psu_voltage_reg = "in30_input" + self.psu_current_reg = "curr602_input" + self.psu_power_reg = "power2_input" + elif self.index == 2: + self.psu_voltage_reg = "in32_input" + self.psu_current_reg = "curr702_input" + self.psu_power_reg = "power4_input" + + # Overriding _fan_list class variable defined in PsuBase, to + # make it unique per Psu object + self._fan_list = [] + + # Passing True to specify it is a PSU fan + psu_fan = Fan(fan_index=self.index, psu_fan=True) + self._fan_list.append(psu_fan) + + def _get_pmc_register(self, reg_name): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + mb_reg_file = self.MAILBOX_DIR + '/' + reg_name + + if (not os.path.isfile(mb_reg_file)): + return rv + + try: + with open(mb_reg_file, 'r') as fd: + rv = fd.read() + except Exception as error: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return "PSU{}".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the Power Supply Unit (PSU) + + Returns: + bool: True if PSU is present, False if not + """ + status = False + psu_presence = self._get_pmc_register(self.psu_presence_reg) + if (psu_presence != 'ERR'): + psu_presence = int(psu_presence, 16) + # Checking whether bit 0 is not set + if (~psu_presence & 0b1): + status = True + + return status + + def get_model(self): + """ + Retrieves the part number of the PSU + + Returns: + string: Part number of PSU + """ + # For Serial number "US-01234D-54321-25A-0123-A00", the part + # number is "01234D" + psu_serialno = self._get_pmc_register(self.psu_serialno_reg) + if (psu_serialno != 'ERR') and self.get_presence(): + if (len(psu_serialno.split('-')) > 1): + psu_partno = psu_serialno.split('-')[1] + else: + psu_partno = 'NA' + else: + psu_partno = 'NA' + + return psu_partno + + def get_serial(self): + """ + Retrieves the serial number of the PSU + + Returns: + string: Serial number of PSU + """ + # Sample Serial number format "US-01234D-54321-25A-0123-A00" + psu_serialno = self._get_pmc_register(self.psu_serialno_reg) + if (psu_serialno == 'ERR') or not self.get_presence(): + psu_serialno = 'NA' + + return psu_serialno + + def get_status(self): + """ + Retrieves the operational status of the PSU + + Returns: + bool: True if PSU is operating properly, False if not + """ + status = False + psu_status = self._get_pmc_register(self.psu_presence_reg) + if (psu_status != 'ERR'): + psu_status = int(psu_status, 16) + # Checking whether both bit 3 and bit 2 are not set + if (~psu_status & 0b1000) and (~psu_status & 0b0100): + status = True + + return status + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + psu_voltage = self._get_pmc_register(self.psu_voltage_reg) + if (psu_voltage != 'ERR') and self.get_presence(): + # Converting the value returned by driver which is in + # millivolts to volts + psu_voltage = float(psu_voltage) / 1000 + else: + psu_voltage = 0.0 + + return psu_voltage + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + + Returns: + A float number, electric current in amperes, + e.g. 15.4 + """ + psu_current = self._get_pmc_register(self.psu_current_reg) + if (psu_current != 'ERR') and self.get_presence(): + # Converting the value returned by driver which is in + # milliamperes to amperes + psu_current = float(psu_current) / 1000 + else: + psu_current = 0.0 + + return psu_current + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + psu_power = self._get_pmc_register(self.psu_power_reg) + if (psu_power != 'ERR') and self.get_presence(): + # Converting the value returned by driver which is in + # microwatts to watts + psu_power = float(psu_power) / 1000000 + else: + psu_power = 0.0 + + return psu_power + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + + Returns: + A boolean, True if PSU has stablized its output voltages and + passed all its internal self-tests, False if not. + """ + status = False + if self.get_status() and self._fan_list[0].get_status(): + status = True + + return status + + def get_status_led(self): + """ + Gets the state of the PSU status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings. + """ + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_OFF + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + Args: + color: A string representing the color with which to set the + PSU status LED + Returns: + bool: True if status LED state is set successfully, False if + not + """ + # In Z9100, SmartFusion FPGA controls the PSU LED and the PSU + # LED state cannot be changed from CPU. + return False diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/sfp.py new file mode 100644 index 00000000000..87057545cbb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/sfp.py @@ -0,0 +1,882 @@ +#!/usr/bin/env python + +############################################################################# +# DELLEMC +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + import os + import time + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +PAGE_OFFSET = 0 +KEY_OFFSET = 1 +KEY_WIDTH = 2 +FUNC_NAME = 3 + +INFO_OFFSET = 128 +DOM_OFFSET = 0 +DOM_OFFSET1 = 384 + +cable_length_tup = ('Length(km)', 'Length OM3(2m)', 'Length OM2(m)', + 'Length OM1(m)', 'Length Cable Assembly(m)') + +compliance_code_tup = ( + '10/40G Ethernet Compliance Code', + 'SONET Compliance codes', + 'SAS/SATA compliance codes', + 'Gigabit Ethernet Compliant codes', + 'Fibre Channel link length/Transmitter Technology', + 'Fibre Channel transmission media', + 'Fibre Channel Speed') + +info_dict_keys = ['type', 'hardwarerev', 'serialnum', + 'manufacturename', 'modelname', 'Connector', + 'encoding', 'ext_identifier', 'ext_rateselect_compliance', + 'cable_type', 'cable_length', 'nominal_bit_rate', + 'specification_compliance', ,'type_abbrv_name','vendor_date', 'vendor_oui'] + +dom_dict_keys = ['rx_los', 'tx_fault', 'reset_status', + 'power_lpmode', 'tx_disable', 'tx_disable_channel', + 'temperature', 'voltage', 'rx1power', + 'rx2power', 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', 'tx3bias', + 'tx4bias', 'tx1power', 'tx2power', + 'tx3power', 'tx4power'] + +threshold_dict_keys = ['temphighalarm', 'temphighwarning', + 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', + 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', + 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', + 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', + 'txbiaslowalarm', 'txbiaslowwarning'] + +sff8436_parser = { + 'reset_status': [DOM_OFFSET, 2, 1, 'parse_dom_status_indicator'], + 'rx_los': [DOM_OFFSET, 3, 1, 'parse_dom_tx_rx_los'], + 'tx_fault': [DOM_OFFSET, 4, 1, 'parse_dom_tx_fault'], + 'tx_disable': [DOM_OFFSET, 86, 1, 'parse_dom_tx_disable'], + 'power_lpmode': [DOM_OFFSET, 93, 1, 'parse_dom_power_control'], + 'power_override': [DOM_OFFSET, 93, 1, 'parse_dom_power_control'], + 'Temperature': [DOM_OFFSET, 22, 2, 'parse_temperature'], + 'Voltage': [DOM_OFFSET, 26, 2, 'parse_voltage'], + 'ChannelMonitor': [DOM_OFFSET, 34, 16, 'parse_channel_monitor_params'], + + 'cable_type': [INFO_OFFSET, -1, -1, 'parse_sfp_info_bulk'], + 'cable_length': [INFO_OFFSET, -1, -1, 'parse_sfp_info_bulk'], + 'Connector': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'type': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'encoding': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'ext_identifier': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'ext_rateselect_compliance': + [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'nominal_bit_rate': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'specification_compliance': + [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'type_abbrv_name': [INFO_OFFSET, 0, 20, 'parse_sfp_info_bulk'], + 'manufacturename': [INFO_OFFSET, 20, 16, 'parse_vendor_name'], + 'vendor_oui': [INFO_OFFSET, 37, 3, 'parse_vendor_oui'], + 'modelname': [INFO_OFFSET, 40, 16, 'parse_vendor_pn'], + 'hardwarerev': [INFO_OFFSET, 56, 2, 'parse_vendor_rev'], + 'serialnum': [INFO_OFFSET, 68, 16, 'parse_vendor_sn'], + 'vendor_date': [INFO_OFFSET, 84, 8, 'parse_vendor_date'], + 'ModuleThreshold': [DOM_OFFSET1, 128, 24, 'parse_module_threshold_values'], + 'ChannelThreshold': [DOM_OFFSET1, 176, 16, 'parse_channel_threshold_values'], +} + + +class Sfp(SfpBase): + """ + DELLEMC Platform-specific Sfp class + """ + + def __init__(self, index, sfp_type, eeprom_path, + sfp_control, sfp_ctrl_idx): + SfpBase.__init__(self) + self.sfp_type = sfp_type + self.index = index + self.eeprom_path = eeprom_path + self.sfp_control = sfp_control + self.sfp_ctrl_idx = sfp_ctrl_idx + self.sfpInfo = sff8436InterfaceId() + self.sfpDomInfo = sff8436Dom() + + def _read_eeprom_bytes(self, eeprom_path, offset, num_bytes): + eeprom_raw = [] + try: + eeprom = open(eeprom_path, mode="rb", buffering=0) + except IOError: + return None + + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + try: + eeprom.seek(offset) + raw = eeprom.read(num_bytes) + except IOError: + eeprom.close() + return None + + try: + for n in range(0, num_bytes): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except BaseException: + eeprom.close() + return None + + eeprom.close() + return eeprom_raw + + def _get_eeprom_data(self, eeprom_key): + eeprom_data = None + page_offset = None + + if (self.sfpInfo is None): + return None + + page_offset = sff8436_parser[eeprom_key][PAGE_OFFSET] + eeprom_data_raw = self._read_eeprom_bytes( + self.eeprom_path, + (sff8436_parser[eeprom_key][PAGE_OFFSET] + + sff8436_parser[eeprom_key][KEY_OFFSET]), + sff8436_parser[eeprom_key][KEY_WIDTH]) + if (eeprom_data_raw is not None): + # Offset 128 is used to retrieve sff8436InterfaceId Info + # Offset 0 is used to retrieve sff8436Dom Info + if (page_offset == 128): + eeprom_data = getattr( + self.sfpInfo, sff8436_parser[eeprom_key][FUNC_NAME])( + eeprom_data_raw, 0) + else: + eeprom_data = getattr( + self.sfpDomInfo, sff8436_parser[eeprom_key][FUNC_NAME])( + eeprom_data_raw, 0) + + return eeprom_data + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + """ + transceiver_info_dict = {} + compliance_code_dict = {} + transceiver_info_dict = dict.fromkeys(info_dict_keys, 'N/A') + + # BaseInformation + iface_data = self._get_eeprom_data('type') + if (iface_data is not None): + connector = iface_data['data']['Connector']['value'] + encoding = iface_data['data']['EncodingCodes']['value'] + ext_id = iface_data['data']['Extended Identifier']['value'] + rate_identifier = iface_data['data']['RateIdentifier']['value'] + identifier = iface_data['data']['type']['value'] + bit_rate = str( + iface_data['data']['Nominal Bit Rate(100Mbs)']['value']) + type_abbrv_name=iface_data['data']['type_abbrv_name']['value'] + + for key in compliance_code_tup: + if key in iface_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = iface_data['data']['Specification compliance']['value'][key]['value'] + for key in cable_length_tup: + if key in iface_data['data']: + cable_type = key + cable_length = str(iface_data['data'][key]['value']) + else: + return transceiver_info_dict + + # Vendor Date + vendor_date_data = self._get_eeprom_data('vendor_date') + if (vendor_date_data is not None): + vendor_date = vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] + else: + return transceiver_info_dict + + # Vendor Name + vendor_name_data = self._get_eeprom_data('manufacturename') + if (vendor_name_data is not None): + vendor_name = vendor_name_data['data']['Vendor Name']['value'] + else: + return transceiver_info_dict + + # Vendor OUI + vendor_oui_data = self._get_eeprom_data('vendor_oui') + if (vendor_oui_data is not None): + vendor_oui = vendor_oui_data['data']['Vendor OUI']['value'] + else: + return transceiver_info_dict + + # Vendor PN + vendor_pn_data = self._get_eeprom_data('modelname') + if (vendor_pn_data is not None): + vendor_pn = vendor_pn_data['data']['Vendor PN']['value'] + else: + return transceiver_info_dict + + # Vendor Revision + vendor_rev_data = self._get_eeprom_data('hardwarerev') + if (vendor_rev_data is not None): + vendor_rev = vendor_rev_data['data']['Vendor Rev']['value'] + else: + return transceiver_info_dict + + # Vendor Serial Number + vendor_sn_data = self._get_eeprom_data('serialnum') + if (vendor_sn_data is not None): + vendor_sn = vendor_sn_data['data']['Vendor SN']['value'] + else: + return transceiver_info_dict + + # Fill The Dictionary and return + transceiver_info_dict['type'] = identifier + transceiver_info_dict['hardwarerev'] = vendor_rev + transceiver_info_dict['serialnum'] = vendor_sn + transceiver_info_dict['manufacturename'] = vendor_name + transceiver_info_dict['modelname'] = vendor_pn + transceiver_info_dict['Connector'] = connector + transceiver_info_dict['encoding'] = encoding + transceiver_info_dict['ext_identifier'] = ext_id + transceiver_info_dict['ext_rateselect_compliance'] = rate_identifier + transceiver_info_dict['cable_type'] = cable_type + transceiver_info_dict['cable_length'] = cable_length + transceiver_info_dict['nominal_bit_rate'] = bit_rate + transceiver_info_dict['specification_compliance'] = str( + compliance_code_dict) + transceiver_info_dict['vendor_date'] = vendor_date + transceiver_info_dict['vendor_oui'] = vendor_oui + transceiver_info_dict['type_abbrv_name']=type_abbrv_name + + return transceiver_info_dict + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + """ + transceiver_dom_threshold_dict = {} + transceiver_dom_threshold_dict = dict.fromkeys( + threshold_dict_keys, 'N/A') + + # Module Threshold + module_threshold_data = self._get_eeprom_data('ModuleThreshold') + if (module_threshold_data is not None): + tempHighAlarm = module_threshold_data['data']['TempHighAlarm']['value'] + tempLowAlarm = module_threshold_data['data']['TempLowAlarm']['value'] + tempHighWarn = module_threshold_data['data']['TempHighWarning']['value'] + tempLowWarn = module_threshold_data['data']['TempLowWarning']['value'] + vccHighAlarm = module_threshold_data['data']['VccHighAlarm']['value'] + vccLowAlarm = module_threshold_data['data']['VccLowAlarm']['value'] + vccHighWarn = module_threshold_data['data']['VccHighWarning']['value'] + vccLowWarn = module_threshold_data['data']['VccLowWarning']['value'] + else: + return transceiver_dom_threshold_dict + + # Channel Threshold + channel_threshold_data = self._get_eeprom_data('ChannelThreshold') + if (channel_threshold_data is not None): + rxPowerHighAlarm = channel_threshold_data['data']['RxPowerHighAlarm']['value'] + rxPowerLowAlarm = channel_threshold_data['data']['RxPowerLowAlarm']['value'] + rxPowerHighWarn = channel_threshold_data['data']['RxPowerHighWarning']['value'] + rxPowerLowWarn = channel_threshold_data['data']['RxPowerLowWarning']['value'] + txBiasHighAlarm = channel_threshold_data['data']['TxBiasHighAlarm']['value'] + txBiasLowAlarm = channel_threshold_data['data']['TxBiasLowAlarm']['value'] + txBiasHighWarn = channel_threshold_data['data']['TxBiasHighWarning']['value'] + txBiasLowWarn = channel_threshold_data['data']['TxBiasLowWarning']['value'] + else: + return transceiver_dom_threshold_dict + + transceiver_dom_threshold_dict['temphighalarm'] = tempHighAlarm + transceiver_dom_threshold_dict['templowalarm'] = tempLowAlarm + transceiver_dom_threshold_dict['temphighwarning'] = tempHighWarn + transceiver_dom_threshold_dict['templowwarning'] = tempLowWarn + transceiver_dom_threshold_dict['vcchighalarm'] = vccHighAlarm + transceiver_dom_threshold_dict['vcclowalarm'] = vccLowAlarm + transceiver_dom_threshold_dict['vcchighwarning'] = vccHighWarn + transceiver_dom_threshold_dict['vcclowwarning'] = vccLowWarn + transceiver_dom_threshold_dict['rxpowerhighalarm'] = rxPowerHighAlarm + transceiver_dom_threshold_dict['rxpowerlowalarm'] = rxPowerLowAlarm + transceiver_dom_threshold_dict['rxpowerhighwarning'] = rxPowerHighWarn + transceiver_dom_threshold_dict['rxpowerlowwarning'] = rxPowerLowWarn + transceiver_dom_threshold_dict['txbiashighalarm'] = txBiasHighAlarm + transceiver_dom_threshold_dict['txbiaslowalarm'] = txBiasLowAlarm + transceiver_dom_threshold_dict['txbiashighwarning'] = txBiasHighWarn + transceiver_dom_threshold_dict['txbiaslowwarning'] = txBiasLowWarn + + return transceiver_dom_threshold_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + """ + tx_bias_list = [] + rx_power_list = [] + transceiver_dom_dict = {} + transceiver_dom_dict = dict.fromkeys(dom_dict_keys, 'N/A') + + # RxLos + rx_los = self.get_rx_los() + + # TxFault + tx_fault = self.get_tx_fault() + + # ResetStatus + reset_state = self.get_reset_status() + + # LowPower Mode + lp_mode = self.get_lpmode() + + # TxDisable + tx_disable = self.get_tx_disable() + + # TxDisable Channel + tx_disable_channel = self.get_tx_disable_channel() + + # Temperature + temperature = self.get_temperature() + + # Voltage + voltage = self.get_voltage() + + # Channel Monitor + channel_monitor_data = self._get_eeprom_data('ChannelMonitor') + if (channel_monitor_data is not None): + tx_bias = channel_monitor_data['data']['TX1Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = channel_monitor_data['data']['TX2Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = channel_monitor_data['data']['TX3Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = channel_monitor_data['data']['TX4Bias']['value'] + tx_bias_list.append(tx_bias) + rx_power = channel_monitor_data['data']['RX1Power']['value'] + rx_power_list.append(rx_power) + rx_power = channel_monitor_data['data']['RX2Power']['value'] + rx_power_list.append(rx_power) + rx_power = channel_monitor_data['data']['RX3Power']['value'] + rx_power_list.append(rx_power) + rx_power = channel_monitor_data['data']['RX4Power']['value'] + rx_power_list.append(rx_power) + else: + return transceiver_dom_dict + + transceiver_dom_dict['rx_los'] = rx_los + transceiver_dom_dict['tx_fault'] = tx_fault + transceiver_dom_dict['reset_status'] = reset_state + transceiver_dom_dict['power_lpmode'] = lp_mode + transceiver_dom_dict['tx_disable'] = tx_disable + transceiver_dom_dict['tx_disable_channel'] = tx_disable_channel + transceiver_dom_dict['temperature'] = temperature + transceiver_dom_dict['voltage'] = voltage + transceiver_dom_dict['tx1bias'] = tx_bias_list[0] + transceiver_dom_dict['tx2bias'] = tx_bias_list[1] + transceiver_dom_dict['tx3bias'] = tx_bias_list[2] + transceiver_dom_dict['tx4bias'] = tx_bias_list[3] + transceiver_dom_dict['rx1power'] = rx_power_list[0] + transceiver_dom_dict['rx2power'] = rx_power_list[1] + transceiver_dom_dict['rx3power'] = rx_power_list[2] + transceiver_dom_dict['rx4power'] = rx_power_list[3] + + return transceiver_dom_dict + + def get_name(self): + """ + Retrieves the name of the sfp + Returns : QSFP or QSFP+ or QSFP28 + """ + iface_data = self._get_eeprom_data('type') + if (iface_data is not None): + identifier = iface_data['data']['type']['value'] + else: + return None + + return identifier + + def get_presence(self): + """ + Retrieves the presence of the sfp + """ + presence_ctrl = self.sfp_control + 'qsfp_modprs' + try: + reg_file = open(presence_ctrl) + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + index = self.sfp_ctrl_idx + + # Mask off the bit corresponding to our port + mask = (1 << index) + + # ModPrsL is active low + if ((reg_value & mask) == 0): + return True + + return False + + def get_model(self): + """ + Retrieves the model number (or part number) of the sfp + """ + vendor_pn_data = self._get_eeprom_data('modelname') + if (vendor_pn_data is not None): + vendor_pn = vendor_pn_data['data']['Vendor PN']['value'] + else: + return None + + return vendor_pn + + def get_serial(self): + """ + Retrieves the serial number of the sfp + """ + vendor_sn_data = self._get_eeprom_data('serialnum') + if (vendor_sn_data is not None): + vendor_sn = vendor_sn_data['data']['Vendor SN']['value'] + else: + return None + + return vendor_sn + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + """ + reset_status = None + reset_ctrl = self.sfp_control + 'qsfp_reset' + try: + reg_file = open(reset_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + index = self.sfp_ctrl_idx + + mask = (1 << index) + + if ((reg_value & mask) == 0): + reset_status = True + else: + reset_status = False + + return reset_status + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + """ + rx_los = None + rx_los_list = [] + + rx_los_data = self._get_eeprom_data('rx_los') + if (rx_los_data is not None): + rx_los = rx_los_data['data']['Rx1LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + rx_los = rx_los_data['data']['Rx2LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + rx_los = rx_los_data['data']['Rx3LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + rx_los = rx_los_data['data']['Rx4LOS']['value'] + if (rx_los is 'On'): + rx_los_list.append(True) + else: + rx_los_list.append(False) + + if (rx_los_list[0] and rx_los_list[1] + and rx_los_list[2] and rx_los_list[3]): + rx_los = True + else: + rx_los = False + + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + """ + tx_fault = None + tx_fault_list = [] + + tx_fault_data = self._get_eeprom_data('tx_fault') + if (tx_fault_data is not None): + tx_fault = tx_fault_data['data']['Tx1Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + tx_fault = tx_fault_data['data']['Tx2Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + tx_fault = tx_fault_data['data']['Tx3Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + tx_fault = tx_fault_data['data']['Tx4Fault']['value'] + if (tx_fault is 'On'): + tx_fault_list.append(True) + else: + tx_fault_list.append(False) + + if (tx_fault_list[0] and tx_fault_list[1] + and tx_fault_list[2] and tx_fault_list[3]): + tx_fault = True + else: + tx_fault = False + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + """ + tx_disable = None + tx_disable_list = [] + + tx_disable_data = self._get_eeprom_data('tx_disable') + if (tx_disable_data is not None): + tx_disable = tx_disable_data['data']['Tx1Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + tx_disable = tx_disable_data['data']['Tx2Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + tx_disable = tx_disable_data['data']['Tx3Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + tx_disable = tx_disable_data['data']['Tx4Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(True) + else: + tx_disable_list.append(False) + + if (tx_disable_list[0] and tx_disable_list[1] + and tx_disable_list[2] and tx_disable_list[3]): + tx_disable = True + else: + tx_disable = False + + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + """ + tx_disable = None + tx_disable_list = [] + + tx_disable_data = self._get_eeprom_data('tx_disable') + if (tx_disable_data is not None): + tx_disable = tx_disable_data['data']['Tx1Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + tx_disable = tx_disable_data['data']['Tx2Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + tx_disable = tx_disable_data['data']['Tx3Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + tx_disable = tx_disable_data['data']['Tx4Disable']['value'] + if (tx_disable is 'On'): + tx_disable_list.append(1) + else: + tx_disable_list.append(0) + + bit4 = int(tx_disable_list[3]) * 8 + bit3 = int(tx_disable_list[2]) * 4 + bit2 = int(tx_disable_list[1]) * 2 + bit1 = int(tx_disable_list[0]) * 1 + + tx_disable_channel = hex(bit4 + bit3 + bit2 + bit1) + + return tx_disable_channel + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + """ + lpmode_ctrl = self.sfp_control + 'qsfp_lpmode' + try: + reg_file = open(lpmode_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + index = self.sfp_ctrl_idx + + mask = (1 << index) + + if ((reg_value & mask) == 0): + lpmode_state = False + else: + lpmode_state = True + + return lpmode_state + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + """ + power_override_state = None + + # Reset Status + power_override_data = self._get_eeprom_data('power_override') + if (power_override_data is not None): + power_override = power_override_data['data']['PowerOverRide']['value'] + if (power_override is 'On'): + power_override_state = True + else: + power_override_state = False + + return power_override_state + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + """ + temperature = None + + temperature_data = self._get_eeprom_data('Temperature') + if (temperature_data is not None): + temperature = temperature_data['data']['Temperature']['value'] + + return temperature + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + """ + voltage = None + + voltage_data = self._get_eeprom_data('Voltage') + if (voltage_data is not None): + voltage = voltage_data['data']['Vcc']['value'] + + return voltage + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + """ + tx_bias = None + tx_bias_list = [] + + tx_bias_data = self._get_eeprom_data('ChannelMonitor') + if (tx_bias_data is not None): + tx_bias = tx_bias_data['data']['TX1Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = tx_bias_data['data']['TX2Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = tx_bias_data['data']['TX3Bias']['value'] + tx_bias_list.append(tx_bias) + tx_bias = tx_bias_data['data']['TX4Bias']['value'] + tx_bias_list.append(tx_bias) + + return tx_bias_list + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + """ + rx_power = None + rx_power_list = [] + + rx_power_data = self._get_eeprom_data('ChannelMonitor') + if (rx_power_data is not None): + rx_power = rx_power_data['data']['RX1Power']['value'] + rx_power_list.append(rx_power) + rx_power = rx_power_data['data']['RX2Power']['value'] + rx_power_list.append(rx_power) + rx_power = rx_power_data['data']['RX3Power']['value'] + rx_power_list.append(rx_power) + rx_power = rx_power_data['data']['RX4Power']['value'] + rx_power_list.append(rx_power) + + return rx_power_list + + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + """ + tx_power = None + tx_power_list = [] + + tx_power_list.append('-infdBm') + tx_power_list.append('-infdBm') + tx_power_list.append('-infdBm') + tx_power_list.append('-infdBm') + + return tx_power_list + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + """ + reset_ctrl = self.sfp_control + 'qsfp_reset' + try: + # Open reset_ctrl in both read & write mode + reg_file = open(reset_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + index = self.sfp_ctrl_idx + + # Mask off the bit corresponding to our port + mask = (1 << index) + + # ResetL is active low + reg_value = (reg_value & ~mask) + + # Convert our register value back to a + # hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the + # register to take port out of reset + try: + reg_file = open(reset_ctrl, "w") + except IOError as e: + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + """ + lpmode_ctrl = self.sfp_control + 'qsfp_lpmode' + try: + reg_file = open(lpmode_ctrl, "r+") + except IOError as e: + return False + + reg_hex = reg_file.readline().rstrip() + + # content is a string containing the hex + # representation of the register + reg_value = int(reg_hex, 16) + + # Mask off the bit corresponding to our port + index = self.sfp_ctrl_idx + + mask = (1 << index) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = (reg_value | mask) + else: + reg_value = (reg_value & ~mask) + + # Convert our register value back to a hex string and write back + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + """ + return False + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + """ + return False + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + """ + return False + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + """ + return False + + def get_status(self): + """ + Retrieves the operational status of the device + """ + reset = self.get_reset_status() + + if (reset == True): + status = False + else: + status = True + + return status diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/thermal.py new file mode 100644 index 00000000000..05d012b114c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/sonic_platform/thermal.py @@ -0,0 +1,205 @@ +#!/usr/bin/env python + +######################################################################## +# DellEMC Z9100 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Thermals' information which are available in the platform +# +######################################################################## + + +try: + import os + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Thermal(ThermalBase): + """DellEMC Platform-specific Thermal class""" + + THERMAL_NAME = ( + 'CPU On-board', 'ASIC On-board Rear', 'System Front Left', + 'System Front Right', 'CPU Core 0', 'CPU Core 1', 'CPU Core 2', + 'CPU Core 3' + ) + + def __init__(self, thermal_index): + self.is_cpu_thermal = False + self.index = thermal_index + 1 + + if self.index < 5: + hwmon_temp_index = self.index + dev_path = "/sys/devices/platform/SMF.512/hwmon/" + else: + hwmon_temp_index = self.index - 3 + self.is_cpu_thermal = True + dev_path = "/sys/devices/platform/coretemp.0/hwmon/" + + hwmon_node = os.listdir(dev_path)[0] + self.HWMON_DIR = dev_path + hwmon_node + '/' + + self.thermal_status_file = self.HWMON_DIR \ + + "temp{}_alarm".format(hwmon_temp_index) + self.thermal_temperature_file = self.HWMON_DIR \ + + "temp{}_input".format(hwmon_temp_index) + self.thermal_high_threshold_file = self.HWMON_DIR \ + + "temp{}_crit".format(hwmon_temp_index) + self.thermal_low_threshold_file = self.HWMON_DIR \ + + "temp{}_min".format(hwmon_temp_index) + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # sysfs_file and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + except Exception as error: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def get_name(self): + """ + Retrieves the name of the thermal + + Returns: + string: The name of the thermal + """ + return self.THERMAL_NAME[self.index - 1] + + def get_presence(self): + """ + Retrieves the presence of the thermal + + Returns: + bool: True if thermal is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the Thermal + + Returns: + string: Model/part number of Thermal + """ + return 'NA' + + def get_serial(self): + """ + Retrieves the serial number of the Thermal + + Returns: + string: Serial number of Thermal + """ + return 'NA' + + def get_status(self): + """ + Retrieves the operational status of the thermal + + Returns: + A boolean value, True if thermal is operating properly, + False if not + """ + status = False + if self.is_cpu_thermal: + status = True + else: + thermal_status = self._read_sysfs_file(self.thermal_status_file) + if (thermal_status != 'ERR'): + thermal_status = int(thermal_status, 16) + if thermal_status != 5: + status = True + + return status + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celsius up to + nearest thousandth of one degree Celsius, e.g. 30.125 + """ + thermal_temperature = self._read_sysfs_file( + self.thermal_temperature_file) + if (thermal_temperature != 'ERR'): + thermal_temperature = float(thermal_temperature) / 1000 + else: + thermal_temperature = 0 + + return "{:.3f}".format(thermal_temperature) + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + + Returns: + A float number, the high threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius, + e.g. 30.125 + """ + thermal_high_threshold = self._read_sysfs_file( + self.thermal_high_threshold_file) + if (thermal_high_threshold != 'ERR'): + thermal_high_threshold = float(thermal_high_threshold) / 1000 + else: + thermal_high_threshold = 0 + + return "{:.3f}".format(thermal_high_threshold) + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + + Returns: + A float number, the low threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius, + e.g. 30.125 + """ + thermal_low_threshold = self._read_sysfs_file( + self.thermal_low_threshold_file) + if (thermal_low_threshold != 'ERR'): + thermal_low_threshold = float(thermal_low_threshold) / 1000 + else: + thermal_low_threshold = 0 + + return "{:.3f}".format(thermal_low_threshold) + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one + degree Celsius, e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if + not + """ + # Thermal threshold values are pre-defined based on HW. + return False + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one + degree Celsius, e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if + not + """ + # Thermal threshold values are pre-defined based on HW. + return False diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/systemd/platform-modules-z9100.service b/platform/broadcom/sonic-platform-modules-dell/z9100/systemd/platform-modules-z9100.service new file mode 100644 index 00000000000..00fbfa6803e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/systemd/platform-modules-z9100.service @@ -0,0 +1,13 @@ +[Unit] +Description=Dell Z9100 Platform modules +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/z9100_platform.sh init +ExecStop=/usr/local/bin/z9100_platform.sh deinit +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-dell/z9100/systemd/z9100-lpc-monitor.service b/platform/broadcom/sonic-platform-modules-dell/z9100/systemd/z9100-lpc-monitor.service new file mode 100644 index 00000000000..136081a63f3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9100/systemd/z9100-lpc-monitor.service @@ -0,0 +1,12 @@ +[Unit] +Description=Dell Z9100 LPC bus monitoring poller +DefaultDependencies=no + +[Service] +User=root +ExecStart=/usr/local/bin/dell_lpc_mon.sh +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/cfg/z9264f-modules.conf b/platform/broadcom/sonic-platform-modules-dell/z9264f/cfg/z9264f-modules.conf new file mode 100644 index 00000000000..959ac829064 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/cfg/z9264f-modules.conf @@ -0,0 +1,19 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-gpio +i2c-mux-pca954x + +ipmi_devintf +ipmi_si +dell_z9264f_fpga_ocores +i2c_ocores diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/modules/Makefile b/platform/broadcom/sonic-platform-modules-dell/z9264f/modules/Makefile new file mode 100644 index 00000000000..a162f0d34bf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := dell_z9264f_fpga_ocores.o + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/modules/dell_z9264f_fpga_ocores.c b/platform/broadcom/sonic-platform-modules-dell/z9264f/modules/dell_z9264f_fpga_ocores.c new file mode 100644 index 00000000000..c1644ecf705 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/modules/dell_z9264f_fpga_ocores.c @@ -0,0 +1,1627 @@ +/* + * Copyright (C) 2018 Dell Inc + * + * Licensed under the GNU General Public License Version 2 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +/********************************************************************** + * @file fpga_ocores.c + * @brief This is a driver to interface with Linux Open Cores driver for FPGA i2c access + * + * 2019/5/9 - PCIe Interrupt supported is added for OIR Events. + ************************************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include //siginfo +#include //rcu_read_lock +#include //kernel_version +#include +#include +#include +#include +#include + + +void __iomem * fpga_base_addr = NULL; +void __iomem * fpga_ctl_addr = NULL; + +#define DRIVER_NAME "fpgapci" +#define PCI_NUM_BARS 4 + +#ifdef DEBUG +# define PRINT(fmt, ...) printk(fmt, ##__VA_ARGS__) +#else +# define PRINT(fmt, ...) +#endif + +/* Maximum size of driver buffer (allocated with kalloc()). + * Needed to copy data from user to kernel space, among other + * things. */ +static const size_t BUF_SIZE = PAGE_SIZE; + +/* Device data used by this driver. */ +struct fpgapci_dev { + /* the kernel pci device data structure */ + struct pci_dev *pci_dev; + + /* upstream root node */ + struct pci_dev *upstream; + + /* kernels virtual addr. for the mapped BARs */ + void * __iomem bar[PCI_NUM_BARS]; + + /* length of each memory region. Used for error checking. */ + size_t bar_length[PCI_NUM_BARS]; + + /* Debug data */ + /* number of hw interrupts handled. */ + int num_handled_interrupts; + int num_undelivered_signals; + int pci_gen; + int pci_num_lanes; + + unsigned int irq_first; + unsigned int irq_length; + unsigned int irq_assigned; + unsigned int xcvr_intr_count; +}; + +static int use_irq = 1; +module_param(use_irq, int, 0644); +MODULE_PARM_DESC(use_irq, "Get an use_irq value from user...\n"); + +static uint32_t num_bus = 0; +module_param(num_bus, int, 0); +MODULE_PARM_DESC(num_bus, + "Number of i2c busses supported by the FPGA on this platform."); + + +/* Xilinx FPGA PCIE info: */ +/* Non-VGA unclassified device: Xilinx Corporation Device 7021*/ +/* Subsystem: Xilinx Corporation Device 0007 */ +//#define VENDOR 0x10EE +#define DEVICE 0x7021 +static phys_addr_t fpga_phys_addr; + +typedef signed char s8; +typedef unsigned char u8; + +typedef signed short s16; +typedef unsigned short u16; + +typedef signed int s32; +typedef unsigned int u32; + +typedef signed long long s64; +typedef unsigned long long u64; + + +/* struct to hold data related to the pcie device */ +struct pci_data_struct{ + struct pci_dev* dev; + unsigned long long phy_addr_bar0; + unsigned long long phy_len_bar0; + unsigned long long phy_flags_bar0; + unsigned int irq_first; + unsigned int irq_length; + unsigned int irq_assigned; + void * kvirt_addr_bar0; +}; + +/* global variable declarations */ + +/* Static function declarations */ +static int fpgapci_probe(struct pci_dev *dev, const struct pci_device_id *id); +static void fpgapci_remove(struct pci_dev *dev); + +static int scan_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev); +static int map_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev); +static void free_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev); + + +struct fpgalogic_i2c { + void __iomem *base; + u32 reg_shift; + u32 reg_io_width; + wait_queue_head_t wait; + struct i2c_msg *msg; + int pos; + int nmsgs; + int state; /* see STATE_ */ + int ip_clock_khz; + int bus_clock_khz; + void (*reg_set)(struct fpgalogic_i2c *i2c, int reg, u8 value); + u8 (*reg_get)(struct fpgalogic_i2c *i2c, int reg); + u32 timeout; + struct mutex lock; +}; +/* registers */ +#define FPGAI2C_REG_PRELOW 0 +#define FPGAI2C_REG_PREHIGH 1 +#define FPGAI2C_REG_CONTROL 2 +#define FPGAI2C_REG_DATA 3 +#define FPGAI2C_REG_CMD 4 /* write only */ +#define FPGAI2C_REG_STATUS 4 /* read only, same address as FPGAI2C_REG_CMD */ +#define FPGAI2C_REG_VER 5 + + + +#define FPGAI2C_REG_CTRL_IEN 0x40 +#define FPGAI2C_REG_CTRL_EN 0x80 + +#define FPGAI2C_REG_CMD_START 0x91 +#define FPGAI2C_REG_CMD_STOP 0x41 +#define FPGAI2C_REG_CMD_READ 0x21 +#define FPGAI2C_REG_CMD_WRITE 0x11 +#define FPGAI2C_REG_CMD_READ_ACK 0x21 +#define FPGAI2C_REG_CMD_READ_NACK 0x29 +#define FPGAI2C_REG_CMD_IACK 0x01 + +#define FPGAI2C_REG_STAT_IF 0x01 +#define FPGAI2C_REG_STAT_TIP 0x02 +#define FPGAI2C_REG_STAT_ARBLOST 0x20 +#define FPGAI2C_REG_STAT_BUSY 0x40 +#define FPGAI2C_REG_STAT_NACK 0x80 + +/* SR[7:0] - Status register */ +#define FPGAI2C_REG_SR_RXACK (1 << 7) /* Receive acknowledge from slave �1� = No acknowledge received*/ +#define FPGAI2C_REG_SR_BUSY (1 << 6) /* Busy, I2C bus busy (as defined by start / stop bits) */ +#define FPGAI2C_REG_SR_AL (1 << 5) /* Arbitration lost - fpga i2c logic lost arbitration */ +#define FPGAI2C_REG_SR_TIP (1 << 1) /* Transfer in progress */ +#define FPGAI2C_REG_SR_IF (1 << 0) /* Interrupt flag */ + +enum { + STATE_DONE = 0, + STATE_INIT, + STATE_ADDR, + STATE_ADDR10, + STATE_START, + STATE_WRITE, + STATE_READ, + STATE_STOP, + STATE_ERROR, +}; + +#define TYPE_FPGALOGIC 0 +#define TYPE_GRLIB 1 + +/*I2C_CH1 Offset address from PCIE BAR 0*/ +#define FPGALOGIC_I2C_BASE 0x00006000 +#define FPGALOGIC_CH_OFFSET 0x10 + +#define i2c_bus_controller_numb 1 +#define I2C_PCI_MAX_BUS (16) +#define I2C_PCI_MAX_BUS_REV00 (7) +#define DELL_I2C_CLOCK_LEGACY 0 +#define DELL_I2C_CLOCK_PRESERVE (~0U) +#define I2C_PCI_BUS_NUM_5 5 +#define I2C_PCI_BUS_NUM_7 7 +#define I2C_PCI_BUS_NUM_8 8 +#define I2C_PCI_BUS_NUM_10 10 +#define I2C_PCI_BUS_NUM_12 12 +#define I2C_PCI_BUS_NUM_16 16 + + +#define IRQ_LTCH_STS 0x20 +#define PRSNT_LTCH_STS 0x10 + +#define PORT_CTRL_OFFSET 0x4000 +#define PORT_STS_OFFSET 0x4004 +#define PORT_IRQ_STS_OFFSET 0x4008 +#define PORT_IRQ_EN_OFFSET 0x400C +#define MB_BRD_REV_TYPE 0x0008 +#define MB_BRD_REV_MASK 0x00f0 +#define MB_BRD_REV_00 0x0000 +#define MB_BRD_REV_01 0x0010 +#define MB_BRD_REV_02 0x0020 +#define MB_BRD_REV_03 0x0030 +#define MB_BRD_TYPE_MASK 0x000f +#define BRD_TYPE_Z9232_NON_NEBS 0x0 +#define BRD_TYPE_Z9232_NEBS 0x1 +#define BRD_TYPE_Z9264_NON_NEBS 0x2 +#define BRD_TYPE_Z9264_NEBS 0x3 +#define BRD_TYPE_S5212_NON_NEBS 0x4 +#define BRD_TYPE_S5212_NEBS 0x5 +#define BRD_TYPE_S5224_NON_NEBS 0x6 +#define BRD_TYPE_S5224_NEBS 0x7 +#define BRD_TYPE_S5248_NON_NEBS 0x8 +#define BRD_TYPE_S5248_NEBS 0x9 +#define BRD_TYPE_S5296_NON_NEBS 0xa +#define BRD_TYPE_S5296_NEBS 0xb +#define BRD_TYPE_S5232_NON_NEBS 0xc +#define BRD_TYPE_S5232_NEBS 0xd + +#define FPGA_CTL_REG_SIZE 0x6000 +#define MSI_VECTOR_MAP_MASK 0x1f +#define MSI_VECTOR_MAP1 0x58 +#define I2C_CH1_MSI_MAP_VECT_8 0x00000008 +#define I2C_CH2_MSI_MAP_VECT_9 0x00000120 +#define I2C_CH3_MSI_MAP_VECT_10 0x00002800 +#define I2C_CH4_MSI_MAP_VECT_11 0x00058000 +#define I2C_CH5_MSI_MAP_VECT_12 0x00c00000 +#define I2C_CH6_MSI_MAP_VECT_13 0x15000000 +#define MSI_VECTOR_MAP2 0x5c +#define I2C_CH7_MSI_MAP_VECT_14 0x0000000e +#define MSI_VECTOR_MAP3 0x9c +#define I2C_CH8_MSI_MAP_VECT_8 0x00800000 +#define I2C_CH8_MSI_MAP_VECT_16 0x01100000 +#define I2C_CH9_MSI_MAP_VECT_9 0x12000000 +#define I2C_CH9_MSI_MAP_VECT_17 0x24000000 +#define MSI_VECTOR_MAP4 0xa0 +#define I2C_CH10_MSI_MAP_VECT_10 0x0000000a +#define I2C_CH10_MSI_MAP_VECT_18 0x00000012 +#define I2C_CH11_MSI_MAP_VECT_11 0x00000120 +#define I2C_CH11_MSI_MAP_VECT_19 0x00000260 +#define I2C_CH12_MSI_MAP_VECT_12 0x00002800 +#define I2C_CH12_MSI_MAP_VECT_20 0x00005000 +#define I2C_CH13_MSI_MAP_VECT_13 0x00058000 +#define I2C_CH13_MSI_MAP_VECT_21 0x000a8000 +#define I2C_CH14_MSI_MAP_VECT_14 0x00c00000 +#define I2C_CH14_MSI_MAP_VECT_22 0x01600000 +#define I2C_CH15_MSI_MAP_VECT_8 0x10000000 +#define I2C_CH15_MSI_MAP_VECT_23 0x2e000000 +#define MSI_VECTOR_MAP5 0xa4 +#define I2C_CH16_MSI_MAP_VECT_9 0x00000009 +#define I2C_CH16_MSI_MAP_VECT_24 0x00000018 + +#define MSI_VECTOR_REV_00 16 +#define MSI_VECTOR_REV_01 32 + +#define FPGA_MSI_VECTOR_ID_4 4 +#define FPGA_MSI_VECTOR_ID_5 5 +#define FPGA_MSI_VECTOR_ID_8 8 +#define FPGA_MSI_VECTOR_ID_9 9 +#define FPGA_MSI_VECTOR_ID_10 10 +#define FPGA_MSI_VECTOR_ID_11 11 +#define FPGA_MSI_VECTOR_ID_12 12 +#define FPGA_MSI_VECTOR_ID_13 13 +#define FPGA_MSI_VECTOR_ID_14 14 +#define FPGA_MSI_VECTOR_ID_15 15 /*Note: this is external MSI vector id */ +#define FPGA_MSI_VECTOR_ID_16 16 +#define FPGA_MSI_VECTOR_ID_17 17 +#define FPGA_MSI_VECTOR_ID_18 18 +#define FPGA_MSI_VECTOR_ID_19 19 +#define FPGA_MSI_VECTOR_ID_20 20 +#define FPGA_MSI_VECTOR_ID_21 21 +#define FPGA_MSI_VECTOR_ID_22 22 +#define FPGA_MSI_VECTOR_ID_23 23 +#define FPGA_MSI_VECTOR_ID_24 24 + + + +static int total_i2c_pci_bus = 0; +static uint32_t board_rev_type = 0; +static struct fpgalogic_i2c fpgalogic_i2c[I2C_PCI_MAX_BUS]; +static struct i2c_adapter i2c_pci_adap[I2C_PCI_MAX_BUS]; +static struct mutex i2c_xfer_lock[I2C_PCI_MAX_BUS]; + +static void fpgai2c_reg_set_8(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite8(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void fpgai2c_reg_set_16(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite16(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void fpgai2c_reg_set_32(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite32(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void fpgai2c_reg_set_16be(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite16be(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void fpgai2c_reg_set_32be(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + iowrite32be(value, i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_8(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread8(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_16(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread16(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_32(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread32(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_16be(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread16be(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 fpgai2c_reg_get_32be(struct fpgalogic_i2c *i2c, int reg) +{ + return ioread32be(i2c->base + (reg << i2c->reg_shift)); +} + +static inline void fpgai2c_reg_set(struct fpgalogic_i2c *i2c, int reg, u8 value) +{ + i2c->reg_set(i2c, reg, value); + udelay(100); +} + +static inline u8 fpgai2c_reg_get(struct fpgalogic_i2c *i2c, int reg) +{ + udelay(100); + return i2c->reg_get(i2c, reg); +} + +static void fpgai2c_dump(struct fpgalogic_i2c *i2c) +{ + u8 tmp; + + PRINT("Logic register dump:\n"); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_PRELOW); + PRINT("FPGAI2C_REG_PRELOW (%d) = 0x%x\n",FPGAI2C_REG_PRELOW,tmp); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_PREHIGH); + PRINT("FPGAI2C_REG_PREHIGH(%d) = 0x%x\n",FPGAI2C_REG_PREHIGH,tmp); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_CONTROL); + PRINT("FPGAI2C_REG_CONTROL(%d) = 0x%x\n",FPGAI2C_REG_CONTROL,tmp); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_DATA); + PRINT("FPGAI2C_REG_DATA (%d) = 0x%x\n",FPGAI2C_REG_DATA,tmp); + + tmp = fpgai2c_reg_get(i2c, FPGAI2C_REG_CMD); + PRINT("FPGAI2C_REG_CMD (%d) = 0x%x\n",FPGAI2C_REG_CMD,tmp); +} + +static void fpgai2c_stop(struct fpgalogic_i2c *i2c) +{ + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP); +} + +/* + * dell_get_mutex must be called prior to calling this function. + */ +static int fpgai2c_poll(struct fpgalogic_i2c *i2c) +{ + u8 stat = fpgai2c_reg_get(i2c, FPGAI2C_REG_STATUS); + struct i2c_msg *msg = i2c->msg; + u8 addr; + + /* Ready? */ + if (stat & FPGAI2C_REG_STAT_TIP) + return -EBUSY; + + if (i2c->state == STATE_DONE || i2c->state == STATE_ERROR) { + /* Stop has been sent */ + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK); + if (i2c->state == STATE_ERROR) + return -EIO; + return 0; + } + + /* Error? */ + if (stat & FPGAI2C_REG_STAT_ARBLOST) { + i2c->state = STATE_ERROR; + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP); + return -EAGAIN; + } + + if (i2c->state == STATE_INIT) { + if (stat & FPGAI2C_REG_STAT_BUSY) + return -EBUSY; + + i2c->state = STATE_ADDR; + } + + if (i2c->state == STATE_ADDR) { + /* 10 bit address? */ + if (i2c->msg->flags & I2C_M_TEN) { + addr = 0xf0 | ((i2c->msg->addr >> 7) & 0x6); + i2c->state = STATE_ADDR10; + } else { + addr = (i2c->msg->addr << 1); + i2c->state = STATE_START; + } + + /* Set read bit if necessary */ + addr |= (i2c->msg->flags & I2C_M_RD) ? 1 : 0; + + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, addr); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_START); + + return 0; + } + + /* Second part of 10 bit addressing */ + if (i2c->state == STATE_ADDR10) { + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, i2c->msg->addr & 0xff); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_WRITE); + + i2c->state = STATE_START; + return 0; + } + + if (i2c->state == STATE_START || i2c->state == STATE_WRITE) { + i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; + + if (stat & FPGAI2C_REG_STAT_NACK) { + i2c->state = STATE_ERROR; + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP); + return -ENXIO; + } + } else { + msg->buf[i2c->pos++] = fpgai2c_reg_get(i2c, FPGAI2C_REG_DATA); + } + + if (i2c->pos >= msg->len) { + i2c->nmsgs--; + i2c->msg++; + i2c->pos = 0; + msg = i2c->msg; + + if (i2c->nmsgs) { + if (!(msg->flags & I2C_M_NOSTART)) { + i2c->state = STATE_ADDR; + return 0; + } else { + i2c->state = (msg->flags & I2C_M_RD) + ? STATE_READ : STATE_WRITE; + } + } else { + i2c->state = STATE_DONE; + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_STOP); + return 0; + } + } + + if (i2c->state == STATE_READ) { + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, i2c->pos == (msg->len - 1) ? + FPGAI2C_REG_CMD_READ_NACK : FPGAI2C_REG_CMD_READ_ACK); + } else { + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, msg->buf[i2c->pos++]); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_WRITE); + } + + return 0; +} + +static ssize_t get_mod_msi(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ind = 0, port_status=0, port_irq_status=0; + struct fpgapci_dev *fpgapci = (struct fpgapci_dev*) dev_get_drvdata(dev); + PRINT("%s:xcvr_intr_count:%u\n", __FUNCTION__, fpgapci->xcvr_intr_count); + for(ind=0;ind<64;ind++) + { + port_status = ioread32(fpga_ctl_addr + PORT_STS_OFFSET + (ind*16)); + port_irq_status = ioread32(fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + PRINT("%s:port:%d, port_status:%#x, port_irq_status:%#x\n", __FUNCTION__, ind, port_status, port_irq_status); + } + return sprintf(buf,"0x%04x\n",fpgapci->xcvr_intr_count); +} +static DEVICE_ATTR(port_msi, S_IRUGO, get_mod_msi, NULL); + +static struct attribute *port_attrs[] = { + &dev_attr_port_msi.attr, + NULL, +}; + +static struct attribute_group port_attr_grp = { + .attrs = port_attrs, +}; + + +static irqreturn_t fpgaport_1_32_isr(int irq, void *dev) +{ + struct pci_dev *pdev = dev; + struct fpgapci_dev *fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&pdev->dev); + int ind = 0, port_status=0, port_irq_status=0; + for(ind=0;ind<32;ind++) + { + port_irq_status = ioread32(fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + if(port_irq_status&(IRQ_LTCH_STS|PRSNT_LTCH_STS)) + { + PRINT("%s:port:%d, port_status:%#x, port_irq_status:%#x\n", __FUNCTION__, ind, port_status, port_irq_status); + //write on clear + iowrite32( IRQ_LTCH_STS|PRSNT_LTCH_STS,fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + } + } + fpgapci->xcvr_intr_count++; + PRINT("%s: xcvr_intr_count:%u\n", __FUNCTION__, fpgapci->xcvr_intr_count); + sysfs_notify(&pdev->dev.kobj, NULL, "port_msi"); + return IRQ_HANDLED; +} + +static irqreturn_t fpgaport_33_64_isr(int irq, void *dev) +{ + struct pci_dev *pdev = dev; + struct fpgapci_dev *fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&pdev->dev); + int ind = 0, port_status=0, port_irq_status=0; + for(ind=32;ind<64;ind++) + { + port_irq_status = ioread32(fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + if(port_irq_status| (IRQ_LTCH_STS|PRSNT_LTCH_STS)) + { + PRINT("%s:port:%d, port_status:%#x, port_irq_status:%#x\n", __FUNCTION__, ind, port_status, port_irq_status); + //write on clear + iowrite32( IRQ_LTCH_STS|PRSNT_LTCH_STS,fpga_ctl_addr + PORT_IRQ_STS_OFFSET + (ind*16)); + } + } + fpgapci->xcvr_intr_count++; + PRINT("%s: xcvr_intr_count:%u\n", __FUNCTION__, fpgapci->xcvr_intr_count); + sysfs_notify(&pdev->dev.kobj, NULL, "port_msi"); + return IRQ_HANDLED; +} + +static void fpgai2c_process(struct fpgalogic_i2c *i2c) +{ + struct i2c_msg *msg = i2c->msg; + u8 stat = fpgai2c_reg_get(i2c, FPGAI2C_REG_STATUS); + + PRINT("fpgai2c_process in. status reg :0x%x\n", stat); + + if ((i2c->state == STATE_STOP) || (i2c->state == STATE_ERROR)) { + /* stop has been sent */ + PRINT("fpgai2c_process FPGAI2C_REG_CMD_IACK stat = 0x%x Set FPGAI2C_REG_CMD(0%x) FPGAI2C_REG_CMD_IACK = 0x%x\n",stat, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK); + if(i2c->state == STATE_STOP) { + i2c->state = STATE_DONE; + } + wake_up(&i2c->wait); + return; + } + + + /* error? */ + if (stat & FPGAI2C_REG_STAT_ARBLOST) { + i2c->state = STATE_ERROR; + PRINT("fpgai2c_process FPGAI2C_REG_STAT_ARBLOST FPGAI2C_REG_CMD_STOP\n"); + fpgai2c_stop(i2c); + return; + } + + if ((i2c->state == STATE_START) || (i2c->state == STATE_WRITE)) { + i2c->state = + (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; + + if (stat & FPGAI2C_REG_STAT_NACK) { + i2c->state = STATE_ERROR; + fpgai2c_stop(i2c); + return; + } + } else + { + msg->buf[i2c->pos++] = fpgai2c_reg_get(i2c, FPGAI2C_REG_DATA); + } + + /* end of msg? */ + if (i2c->pos == msg->len) { + i2c->nmsgs--; + i2c->msg++; + i2c->pos = 0; + msg = i2c->msg; + + if (i2c->nmsgs) { /* end? */ + /* send start? */ + if (!(msg->flags & I2C_M_NOSTART)) { + + u8 addr = (msg->addr << 1); + + if (msg->flags & I2C_M_RD) + addr |= 1; + + i2c->state = STATE_START; + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, addr); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_START); + return; + } else + { + i2c->state = (msg->flags & I2C_M_RD) + ? STATE_READ : STATE_WRITE; + } + } else { + i2c->state = STATE_STOP; + fpgai2c_stop(i2c); + return; + } + } + + if (i2c->state == STATE_READ) { + PRINT("fpgai2c_poll STATE_READ i2c->pos=%d msg->len-1 = 0x%x set FPGAI2C_REG_CMD = 0x%x\n",i2c->pos, msg->len-1, + i2c->pos == (msg->len-1) ? FPGAI2C_REG_CMD_READ_NACK : FPGAI2C_REG_CMD_READ_ACK); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, i2c->pos == (msg->len-1) ? + FPGAI2C_REG_CMD_READ_NACK : FPGAI2C_REG_CMD_READ_ACK); + } else { + PRINT("fpgai2c_process set FPGAI2C_REG_DATA(0x%x)\n",FPGAI2C_REG_DATA); + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, msg->buf[i2c->pos++]); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_WRITE); + } +} + +static irqreturn_t fpgai2c_isr(int irq, void *dev_id) +{ + struct fpgalogic_i2c *i2c = dev_id; + fpgai2c_process(i2c); + + return IRQ_HANDLED; +} +void dell_get_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_lock(&i2c->lock); +} + +/** + * dell_release_mutex - release mutex + */ +void dell_release_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_unlock(&i2c->lock); +} + +static int fpgai2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) +{ + struct fpgalogic_i2c *i2c = i2c_get_adapdata(adap); + int ret; + unsigned long timeout = jiffies + msecs_to_jiffies(1000); + + i2c->msg = msgs; + i2c->pos = 0; + i2c->nmsgs = num; + i2c->state = (use_irq == 1) ? STATE_START : STATE_INIT; + + PRINT("i2c->msg->addr = 0x%x i2c->msg->flags = 0x%x\n",i2c->msg->addr,i2c->msg->flags); + PRINT("I2C_M_RD = 0x%x i2c->msg->addr << 1 = 0x%x\n",I2C_M_RD,i2c->msg->addr << 1); + + if (!use_irq) { + /* Handle the transfer */ + while (time_before(jiffies, timeout)) { + dell_get_mutex(i2c); + ret = fpgai2c_poll(i2c); + dell_release_mutex(i2c); + + if (i2c->state == STATE_DONE || i2c->state == STATE_ERROR) + return (i2c->state == STATE_DONE) ? num : ret; + + if (ret == 0) + timeout = jiffies + HZ; + + usleep_range(5, 15); + } + + i2c->state = STATE_ERROR; + + return -ETIMEDOUT; + + + } else { + ret = -ETIMEDOUT; + PRINT("Set FPGAI2C_REG_DATA(0%x) val = 0x%x\n",FPGAI2C_REG_DATA, + (i2c->msg->addr << 1) | ((i2c->msg->flags & I2C_M_RD) ? 1:0)); + + fpgai2c_reg_set(i2c, FPGAI2C_REG_DATA, + (i2c->msg->addr << 1) | + ((i2c->msg->flags & I2C_M_RD) ? 1:0)); + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_START); + + /* Interrupt mode */ + if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) || + (i2c->state == STATE_DONE), HZ)) + ret = (i2c->state == STATE_DONE) ? num : -EIO; + return ret; + } +} + +static int fpgai2c_init(struct fpgalogic_i2c *i2c) +{ + int prescale; + int diff; + u8 ctrl; + + if (i2c->reg_io_width == 0) + i2c->reg_io_width = 1; /* Set to default value */ + + if (!i2c->reg_set || !i2c->reg_get) { + bool be = 0; //1:big_endian 0:little_endian + + switch (i2c->reg_io_width) { + case 1: + i2c->reg_set = fpgai2c_reg_set_8; + i2c->reg_get = fpgai2c_reg_get_8; + break; + + case 2: + i2c->reg_set = be ? fpgai2c_reg_set_16be : fpgai2c_reg_set_16; + i2c->reg_get = be ? fpgai2c_reg_get_16be : fpgai2c_reg_get_16; + break; + + case 4: + i2c->reg_set = be ? fpgai2c_reg_set_32be : fpgai2c_reg_set_32; + i2c->reg_get = be ? fpgai2c_reg_get_32be : fpgai2c_reg_get_32; + break; + + default: + PRINT("Unsupported I/O width (%d)\n", + i2c->reg_io_width); + return -EINVAL; + } + } + + ctrl = fpgai2c_reg_get(i2c, FPGAI2C_REG_CONTROL); + + PRINT("%s(), line:%d\n", __func__, __LINE__); + PRINT("i2c->base = 0x%p\n",i2c->base); + + PRINT("ctrl = 0x%x\n",ctrl); + PRINT("set ctrl = 0x%x\n",ctrl & ~(FPGAI2C_REG_CTRL_EN|FPGAI2C_REG_CTRL_IEN)); + + /* make sure the device is disabled */ + fpgai2c_reg_set(i2c, FPGAI2C_REG_CONTROL, ctrl & ~(FPGAI2C_REG_CTRL_EN|FPGAI2C_REG_CTRL_IEN)); + + /* + * I2C Frequency depends on host clock + * input clock of 100MHz + * prescale to 100MHz / ( 5*100kHz) -1 = 199 = 0x4F 100000/(5*100)-1=199=0xc7 + */ + prescale = (i2c->ip_clock_khz / (5 * i2c->bus_clock_khz)) - 1; + prescale = clamp(prescale, 0, 0xffff); + + diff = i2c->ip_clock_khz / (5 * (prescale + 1)) - i2c->bus_clock_khz; + if (abs(diff) > i2c->bus_clock_khz / 10) { + PRINT("Unsupported clock settings: core: %d KHz, bus: %d KHz\n", + i2c->ip_clock_khz, i2c->bus_clock_khz); + return -EINVAL; + } + + fpgai2c_reg_set(i2c, FPGAI2C_REG_PRELOW, prescale & 0xff); + fpgai2c_reg_set(i2c, FPGAI2C_REG_PREHIGH, prescale >> 8); + + /* Init the device */ + fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK); + if (!use_irq) + fpgai2c_reg_set(i2c, FPGAI2C_REG_CONTROL, ctrl | FPGAI2C_REG_CTRL_EN); + else + fpgai2c_reg_set(i2c, FPGAI2C_REG_CONTROL, ctrl | FPGAI2C_REG_CTRL_IEN | FPGAI2C_REG_CTRL_EN); + + fpgai2c_dump(i2c); + + /* Initialize interrupt handlers if not already done */ + init_waitqueue_head(&i2c->wait); + + return 0; +} + + +static u32 fpgai2c_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm fpgai2c_algorithm = { + .master_xfer = fpgai2c_xfer, + .functionality = fpgai2c_func, +}; + +static int i2c_pci_add_bus (struct i2c_adapter *adap) +{ + int ret = 0; + /* Register new adapter */ + adap->algo = &fpgai2c_algorithm; + ret = i2c_add_numbered_adapter(adap); + return ret; +} + +static int i2c_init_internal_data(void) +{ + int i; + PRINT("%s(), line:%d\n", __func__, __LINE__); + + for( i = 0; i < total_i2c_pci_bus; i++ ) + { + fpgalogic_i2c[i].reg_shift = 0; /* 8 bit registers */ + fpgalogic_i2c[i].reg_io_width = 1; /* 8 bit read/write */ + fpgalogic_i2c[i].timeout = 500;//1000;//1ms + fpgalogic_i2c[i].ip_clock_khz = 100000;//100000;/* input clock of 100MHz */ + fpgalogic_i2c[i].bus_clock_khz = 100; + fpgalogic_i2c[i].base = fpga_base_addr + i*FPGALOGIC_CH_OFFSET; + mutex_init(&fpgalogic_i2c[i].lock); + fpgai2c_init(&fpgalogic_i2c[i]); + } + + return 0; +} + + +static int i2c_pci_init (void) +{ + int i; + + if (num_bus == 0) { + board_rev_type = ioread32(fpga_ctl_addr + MB_BRD_REV_TYPE); + + if ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_00) { + num_bus = I2C_PCI_MAX_BUS_REV00; + } else if (((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_01) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_02) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_03)) { + switch (board_rev_type & MB_BRD_TYPE_MASK){ + case BRD_TYPE_S5212_NON_NEBS: + case BRD_TYPE_S5212_NEBS: + num_bus = I2C_PCI_BUS_NUM_5; + break; + case BRD_TYPE_S5224_NON_NEBS: + case BRD_TYPE_S5224_NEBS: + num_bus = I2C_PCI_BUS_NUM_7; + break; + case BRD_TYPE_Z9232_NON_NEBS: + case BRD_TYPE_Z9232_NEBS: + case BRD_TYPE_S5232_NON_NEBS: + case BRD_TYPE_S5232_NEBS: + num_bus = I2C_PCI_BUS_NUM_8; + break; + case BRD_TYPE_S5248_NON_NEBS: + case BRD_TYPE_S5248_NEBS: + num_bus = I2C_PCI_BUS_NUM_10; + break; + case BRD_TYPE_Z9264_NON_NEBS: + case BRD_TYPE_Z9264_NEBS: + num_bus = I2C_PCI_BUS_NUM_12; + break; + case BRD_TYPE_S5296_NON_NEBS: + case BRD_TYPE_S5296_NEBS: + num_bus = I2C_PCI_BUS_NUM_16; + break; + default: + num_bus = I2C_PCI_BUS_NUM_16; + printk("Wrong BRD_TYPE: 0x%x\n", board_rev_type); + break; + } + } else { + printk("Wrong board_rev_type 0x%x\n", board_rev_type); + } + } + + printk("board_rev_type 0x%x, num_bus 0x%x\n", board_rev_type, num_bus); + total_i2c_pci_bus = num_bus; + + memset (&i2c_pci_adap, 0, sizeof(i2c_pci_adap)); + memset (&fpgalogic_i2c, 0, sizeof(fpgalogic_i2c)); + for(i=0; i < i2c_bus_controller_numb; i++) + mutex_init(&i2c_xfer_lock[i]); + + /* Initialize driver's itnernal data structures */ + i2c_init_internal_data(); + + for (i = 0 ; i < total_i2c_pci_bus; i ++) { + + i2c_pci_adap[i].owner = THIS_MODULE; + i2c_pci_adap[i].class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + + i2c_pci_adap[i].algo_data = &fpgalogic_i2c[i]; + /* /dev/i2c-600 ~ /dev/i2c-615 for FPGA LOGIC I2C channel controller 1-7 */ + i2c_pci_adap[i].nr = i+600; + sprintf( i2c_pci_adap[ i ].name, "i2c-pci-%d", i ); + /* Add the bus via the algorithm code */ + if( i2c_pci_add_bus( &i2c_pci_adap[ i ] ) != 0 ) + { + PRINT("Cannot add bus %d to algorithm layer\n", i ); + return( -ENODEV ); + } + i2c_set_adapdata(&i2c_pci_adap[i], &fpgalogic_i2c[i]); + + PRINT( "Registered bus id: %s\n", kobject_name(&i2c_pci_adap[ i ].dev.kobj)); + } + + return 0; +} + +static void i2c_pci_deinit(void) +{ + int i; + for( i = 0; i < total_i2c_pci_bus; i++ ){ + i2c_del_adapter(&i2c_pci_adap[i]); + } + +} + +/* Find upstream PCIe root node. + * Used for re-training and disabling AER. */ +static struct pci_dev* find_upstream_dev (struct pci_dev *dev) +{ + struct pci_bus *bus = 0; + struct pci_dev *bridge = 0; + struct pci_dev *cur = 0; + int found_dev = 0; + + bus = dev->bus; + if (bus == 0) { + PRINT ( "Device doesn't have an associated bus!\n"); + return 0; + } + + bridge = bus->self; + if (bridge == 0) { + PRINT ( "Can't get the bridge for the bus!\n"); + return 0; + } + + PRINT ( "Upstream device %x/%x, bus:slot.func %02x:%02x.%02x\n", + bridge->vendor, bridge->device, + bridge->bus->number, PCI_SLOT(bridge->devfn), PCI_FUNC(bridge->devfn)); + + PRINT ( "List of downstream devices:"); + list_for_each_entry (cur, &bus->devices, bus_list) { + if (cur != 0) { + PRINT ( " %x/%x", cur->vendor, cur->device); + if (cur == dev) { + found_dev = 1; + } + } + } + PRINT ( "\n"); + if (found_dev) { + return bridge; + } else { + PRINT ( "Couldn't find upstream device!\n"); + return 0; + } +} + + +static int scan_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev) +{ + int i; + + for (i = 0; i < PCI_NUM_BARS; i++) { + unsigned long bar_start = pci_resource_start(dev, i); + if (bar_start) { + unsigned long bar_end = pci_resource_end(dev, i); + unsigned long bar_flags = pci_resource_flags(dev, i); + PRINT ( "BAR[%d] 0x%08lx-0x%08lx flags 0x%08lx", + i, bar_start, bar_end, bar_flags); + } + } + + return 0; +} + + +/** + * Map the device memory regions into kernel virtual address space + * after verifying their sizes respect the minimum sizes needed, given + * by the bar_min_len[] array. + */ +static int map_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev) +{ + int i; + + for (i = 0; i < PCI_NUM_BARS; i++){ + phys_addr_t bar_start = pci_resource_start(dev, i); + phys_addr_t bar_end = pci_resource_end(dev, i); + unsigned long bar_length = bar_end - bar_start + 1; + fpgapci->bar_length[i] = bar_length; + + + if (!bar_start || !bar_end) { + fpgapci->bar_length[i] = 0; + continue; + } + + if (bar_length < 1) { + PRINT ( "BAR #%d length is less than 1 byte\n", i); + continue; + } + + PRINT ( "bar_start=%llx, bar_end=%llx, bar_length=%lx, flag=%lx\n", bar_start, + bar_end, bar_length, pci_resource_flags(dev, i)); + + /* map the device memory or IO region into kernel virtual + * address space */ + fpgapci->bar[i] = ioremap_nocache (bar_start + FPGALOGIC_I2C_BASE, I2C_PCI_MAX_BUS * FPGALOGIC_CH_OFFSET); + + if (!fpgapci->bar[i]) { + PRINT ( "Could not map BAR #%d.\n", i); + return -1; + } + + PRINT ( "BAR[%d] mapped at 0x%p with length %lu.", i, + fpgapci->bar[i], bar_length); + + if(i == 0) //FPGA register is in the BAR[0] + { + + fpga_phys_addr = bar_start; + fpga_ctl_addr = ioremap_nocache (bar_start, FPGA_CTL_REG_SIZE); + fpga_base_addr = fpgapci->bar[i]; + } + + PRINT ( "BAR[%d] mapped at 0x%p with length %lu.\n", i, + fpgapci->bar[i], bar_length); + } + return 0; +} + +static void free_bars(struct fpgapci_dev *fpgapci, struct pci_dev *dev) +{ + int i; + + for (i = 0; i < PCI_NUM_BARS; i++) { + if (fpgapci->bar[i]) { + pci_iounmap(dev, fpgapci->bar[i]); + fpgapci->bar[i] = NULL; + } + } +} + +#define FPGA_PCI_NAME "FPGA_PCI" + +/** + * @brief Register specific function with msi interrupt line + * @param dev Pointer to pci-device, which should be allocated + * @param int interrupt number relative to global interrupt number + * @return Returns error code or zero if success + * */ +static int register_intr_handler(struct pci_dev *dev, int irq_num_id) +{ + int err = 0; + struct fpgapci_dev *fpgapci = 0; + + fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&dev->dev); + if (fpgapci == 0) { + PRINT ( ": fpgapci_dev is 0\n"); + return err; + } + + if ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_00) { + /* Request interrupt line for unique function + * alternatively function will be called from free_irq as well + * with flag IRQF_SHARED */ + switch(irq_num_id) { + /* Currently we only support test vector 2 for FPGA Logic I2C channel + * controller 1-7 interrupt*/ + case FPGA_MSI_VECTOR_ID_4: + err = request_irq(dev->irq + irq_num_id, fpgaport_1_32_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, dev); + PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_5: + err = request_irq(dev->irq + irq_num_id, fpgaport_33_64_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, dev); + PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_8: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[0]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_9: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[1]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_10: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[2]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_11: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[3]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_12: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[4]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_13: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[5]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_14: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[6]); + fpgapci->irq_assigned++; + break; + + default: + PRINT("No more interrupt handler for number (%d)\n", + dev->irq + irq_num_id); + break; + } + } else if (((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_01) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_02) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_03)) { + /* FPGA SPEC 4.3.1.34, First i2c channel mapped to vector 8 */ + switch (irq_num_id) { + case FPGA_MSI_VECTOR_ID_4: + err = request_irq(dev->irq + irq_num_id, fpgaport_1_32_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, dev); + PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_5: + err = request_irq(dev->irq + irq_num_id, fpgaport_33_64_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, dev); + PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_8: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[0]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_9: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[1]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_10: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[2]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_11: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[3]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_12: + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME, + FPGA_PCI_NAME, &fpgalogic_i2c[4]); + fpgapci->irq_assigned++; + break; + case FPGA_MSI_VECTOR_ID_13: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_5) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[5]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_14: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_5) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[6]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_15: + /*it is an external interrupt number. Ignore this case */ + break; + case FPGA_MSI_VECTOR_ID_16: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_7) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[7]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_17: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_8) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[8]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_18: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_8) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[9]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_19: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_10) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[10]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_20: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_10) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[11]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_21: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[12]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_22: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[13]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_23: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[14]); + fpgapci->irq_assigned++; + } + break; + case FPGA_MSI_VECTOR_ID_24: + if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) { + err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, + IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[15]); + fpgapci->irq_assigned++; + } + break; + + default: + PRINT("No more interrupt handler for number (%d)\n", + dev->irq + irq_num_id); + break; + } + } + + return err; +} +/* Mask for MSI Multi message enable bits */ +#define MSI_MME 0x70 +/** + * These enums define the type of interrupt scheme that the overall + * system uses. + */ +enum fpga_irq_type { + INT_MSI_SINGLE, + INT_MSI_MULTI, + INT_MSIX, + INT_NONE, + INT_FENCE /* Last item to guard from loop run-overs */ +}; +/** + * @def PCI_DEVICE_STATUS + * define the offset for STS register + * from the start of PCI config space as specified in the + * NVME_Comliance 1.0b. offset 06h:STS - Device status. + * This register has error status for NVME PCI Exress + * Card. After reading data from this reagister, the driver + * will identify if any error is set during the operation and + * report as kernel alert message. + */ +#define PCI_DEVICE_STATUS 0x6 +/** + * @def NEXT_MASK + * This indicates the location of the next capability item + * in the list. + */ +#define NEXT_MASK 0xFF00 +/** + * @def MSIXCAP_ID + * This bit indicates if the pointer leading to this position + * is a capability. + */ +#define MSIXCAP_ID 0x11 +/** + * @def MSICAP_ID + * This bit indicates if the pointer leading to this position + * is a capability. + */ +#define MSICAP_ID 0x5 + +/** + * @def CL_MASK + * This bit position indicates Capabilities List of the controller + * The controller should support the PCI Power Management cap as a + * minimum. + */ +#define CL_MASK 0x0010 + +/** + * @def CAP_REG + * Set to offset defined in NVME Spec 1.0b. + */ +#define CAP_REG 0x34 +static void msi_set_enable(struct pci_dev *dev, int enable) +{ + int pos,maxvec; + u16 control; + int request_private_bits = 4; + + pos = pci_find_capability(dev, PCI_CAP_ID_MSI); + + if (pos) { + pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); + maxvec = 1 << ((control & PCI_MSI_FLAGS_QMASK) >> 1); + PRINT("control = 0x%x maxvec = 0x%x\n", control, maxvec); + control &= ~PCI_MSI_FLAGS_ENABLE; + + + /* + * The PCI 2.3 spec mandates that there are at most 32 + * interrupts. If this device asks for more, only give it one. + */ + if (request_private_bits > 5) { + request_private_bits = 0; + } + + /* Update the number of IRQs the device has available to it */ + control &= ~PCI_MSI_FLAGS_QSIZE; + control |= (request_private_bits << 4); + + pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control); + } +} +/** + * @brief Enables pcie-device and claims/remaps neccessary bar resources + * @param dev Pointer to pci-device, which should be allocated + * @return Returns error code or zero if success + * */ +static int fpgapci_setup_device(struct fpgapci_dev *fpgapci,struct pci_dev *dev) +{ + int err = 0; + + /* wake up the pci device */ + err = pci_enable_device(dev); + if(err) { + PRINT("failed to enable pci device %d\n", err); + goto error_pci_en; + } + + /* on platforms with buggy ACPI, pdev->msi_enabled may be set to + * allow pci_enable_device to work. This indicates INTx was not routed + * and only MSI should be used + */ + + pci_set_master(dev); + + /* Setup the BAR memory regions */ + err = pci_request_regions(dev, DRIVER_NAME); + if (err) { + PRINT("failed to enable pci device %d\n", err); + goto error_pci_req; + } + + scan_bars(fpgapci, dev); + + if (map_bars(fpgapci, dev)) { + goto fail_map_bars; + } + + i2c_pci_init(); + + return 0; + /* ERROR HANDLING */ +fail_map_bars: + pci_release_regions(dev); +error_pci_req: + pci_disable_device(dev); +error_pci_en: + return -ENODEV; +} + +static int fpgapci_configure_msi(struct fpgapci_dev *fpgapci,struct pci_dev *dev) +{ + int err = 0, i; + int request_vec; + + msi_set_enable(dev,1); + PRINT("Check MSI capability after msi_set_enable\n"); + + + /*Above 4.1.12*/ + request_vec = total_i2c_pci_bus; + err = pci_alloc_irq_vectors(dev, request_vec, pci_msi_vec_count(dev), + PCI_IRQ_MSI);//PCI_IRQ_AFFINITY | PCI_IRQ_MSI); + + if (err <= 0) { + PRINT("Cannot set MSI vector (%d)\n", err); + goto error_no_msi; + } else { + PRINT("Got %d MSI vectors starting at %d\n", err, dev->irq); + if ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_00) { + if (err < MSI_VECTOR_REV_00) { + goto error_disable_msi; + } + } else if (((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_01) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_02) || + ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_03)) { + if (err < MSI_VECTOR_REV_01) { + goto error_disable_msi; + } + } + } + fpgapci->irq_first = dev->irq; + fpgapci->irq_length = err; + fpgapci->irq_assigned = 0; + + + for(i = 0; i < fpgapci->irq_length; i++) { + err = register_intr_handler(dev, i); + if (err) { + PRINT("Cannot request Interrupt number %d\n", i); + goto error_pci_req_irq; + } + } + + return 0; + +error_pci_req_irq: + for(i = 0; i < fpgapci->irq_assigned; i++) + { + PRINT("free_irq %d i =%d\n",fpgapci->irq_first + i,i); + if (i < 7) + free_irq(fpgapci->irq_first + 8 + i, &fpgalogic_i2c[i]); + else + free_irq(fpgapci->irq_first + 8 + i + 1, &fpgalogic_i2c[i]); + } +error_disable_msi: + pci_disable_msi(fpgapci->pci_dev); +error_no_msi: + return -ENOSPC; +} + +static int fpgapci_probe(struct pci_dev *dev, const struct pci_device_id *id) +{ + struct fpgapci_dev *fpgapci = 0; + int status = 0; + +#ifdef TEST + PRINT ( " vendor = 0x%x, device = 0x%x, class = 0x%x, bus:slot.func = %02x:%02x.%02x\n", + dev->vendor, dev->device, dev->class, + dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); +#endif + fpgapci = kzalloc(sizeof(struct fpgapci_dev), GFP_KERNEL); + + if (!fpgapci) { + PRINT( "Couldn't allocate memory!\n"); + goto fail_kzalloc; + } + + fpgapci->pci_dev = dev; + dev_set_drvdata(&dev->dev, (void*)fpgapci); + + fpgapci->upstream = find_upstream_dev (dev); + status = sysfs_create_group(&dev->dev.kobj, &port_attr_grp); + if (status) { + printk(KERN_INFO "%s:Cannot create sysfs\n", __FUNCTION__); + } + + if(fpgapci_setup_device(fpgapci,dev)) { + goto error_no_device; + } + + if (use_irq) { + if(fpgapci_configure_msi(fpgapci,dev)) { + goto error_cannot_configure; + } + } + + + return 0; + /* ERROR HANDLING */ +error_cannot_configure: + printk("error_cannot_configure\n"); + free_bars (fpgapci, dev); + pci_release_regions(dev); + pci_disable_device(dev); +error_no_device: + i2c_pci_deinit(); + printk("error_no_device\n"); +fail_kzalloc: + return -1; + + +} + +static void fpgapci_remove(struct pci_dev *dev) +{ + struct fpgapci_dev *fpgapci = 0; + int i; + PRINT (": dev is %p\n", dev); + + if (dev == 0) { + PRINT ( ": dev is 0\n"); + return; + } + + fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&dev->dev); + if (fpgapci == 0) { + PRINT ( ": fpgapci_dev is 0\n"); + return; + } + i2c_pci_deinit(); + // + if (use_irq) + { + for(i = 0; i < fpgapci->irq_assigned; i++) + { + PRINT("free_irq %d i =%d\n",fpgapci->irq_first + i,i); + if (i < 7) + free_irq(fpgapci->irq_first + 8 + i, &fpgalogic_i2c[i]); + else + free_irq(fpgapci->irq_first + 8 + i + 1, &fpgalogic_i2c[i]); + } + } + pci_disable_msi(fpgapci->pci_dev); + free_bars (fpgapci, dev); + pci_disable_device(dev); + pci_release_regions(dev); + + kfree (fpgapci); +} + +static const struct pci_device_id fpgapci_ids[] = { + {PCI_DEVICE(PCI_VENDOR_ID_XILINX, DEVICE)}, + {0, }, +}; + +MODULE_DEVICE_TABLE(pci, fpgapci_ids); + +static struct pci_driver fpgapci_driver = { + .name = DRIVER_NAME, + .id_table = fpgapci_ids, + .probe = fpgapci_probe, + .remove = fpgapci_remove, + /* resume, suspend are optional */ +}; + +/* Initialize the driver module (but not any device) and register + * the module with the kernel PCI subsystem. */ +static int __init fpgapci_init(void) +{ + + if (pci_register_driver(&fpgapci_driver)) { + PRINT("pci_unregister_driver\n"); + pci_unregister_driver(&fpgapci_driver); + return -ENODEV; + } + + return 0; +} + +static void __exit fpgapci_exit(void) +{ + PRINT ("fpgapci_exit"); + + /* unregister this driver from the PCI bus driver */ + pci_unregister_driver(&fpgapci_driver); + +} + + +module_init (fpgapci_init); +module_exit (fpgapci_exit); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("joyce_yu@dell.com"); +MODULE_DESCRIPTION ("Driver for FPGA Logic I2C bus"); +MODULE_SUPPORTED_DEVICE ("FPGA Logic I2C bus"); diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/check_qsfp.sh b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/check_qsfp.sh new file mode 100755 index 00000000000..7e7f1636a18 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/check_qsfp.sh @@ -0,0 +1,3 @@ +# Temporary dummy file for z9264f. +# Will be updated soon. + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/pcisysfs.py b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/pcisysfs.py new file mode 100755 index 00000000000..047618e057c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/pcisysfs.py @@ -0,0 +1,102 @@ +#!/usr/bin/python +# Copyright (c) 2015 Dell Inc. +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. + +import struct +import sys +import getopt +from os import * +from mmap import * + +def usage(): + ''' This is the Usage Method ''' + + print '\t\t pcisysfs.py --get --offset --res ' + print '\t\t pcisysfs.py --set --val --offset --res ' + sys.exit(1) + +def pci_mem_read(mm,offset): + mm.seek(offset) + read_data_stream=mm.read(4) + print "" + reg_val=struct.unpack('I',read_data_stream) + print "reg_val read:%x"%reg_val + return reg_val + +def pci_mem_write(mm,offset,data): + mm.seek(offset) + print "data to write:%x"%data + mm.write(struct.pack('I',data)) + +def pci_set_value(resource,val,offset): + fd=open(resource,O_RDWR) + mm=mmap(fd,0) + pci_mem_write(mm,offset,val) + +def pci_get_value(resource,offset): + fd=open(resource,O_RDWR) + mm=mmap(fd,0) + pci_mem_read(mm,offset) + +def main(argv): + + ''' The main function will read the user input from the + command line argument and process the request ''' + + opts = '' + val = '' + choice = '' + resource = '' + offset = '' + + try: + opts, args = getopt.getopt(argv, "hgsv:" , \ + ["val=","res=","offset=","help", "get", "set"]) + + except getopt.GetoptError: + usage() + + for opt,arg in opts: + + if opt in ('-h','--help'): + choice = 'help' + + elif opt in ('-g', '--get'): + choice = 'get' + + elif opt in ('-s', '--set'): + choice = 'set' + + elif opt == '--res': + resource = arg + + elif opt == '--val': + val = int(arg,16) + + elif opt == '--offset': + offset = int(arg,16) + + if choice == 'set' and val != '' and offset !='' and resource !='': + pci_set_value(resource,val,offset) + + elif choice == 'get' and offset != '' and resource !='': + pci_get_value(resource,offset) + + else: + usage() + +#Calling the main method +if __name__ == "__main__": + main(sys.argv[1:]) + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/platform_sensors.py new file mode 100755 index 00000000000..77a9887f9a0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/platform_sensors.py @@ -0,0 +1,265 @@ +#!/usr/bin/python +# On Z9264f, the BaseBoard Management Controller is an +# autonomous subsystem provides monitoring and management +# facility independent of the host CPU. IPMI standard +# protocol is used with ipmitool to fetch sensor details. +# Current script support X00 board only. X01 support will +# be added soon. This provies support for the +# following objects: +# * Onboard temperature sensors +# * FAN trays +# * PSU + + +import os +import sys +import logging +import subprocess +import commands + +Z9264F_MAX_FAN_TRAYS = 4 +Z9264F_MAX_PSUS = 2 +IPMI_SENSOR_DATA = "ipmitool sdr list" +IPMI_SENSOR_DUMP = "/tmp/sdr" + +FAN_PRESENCE = "FAN{0}_prsnt" +PSU_PRESENCE = "PSU{0}_state" +# Use this for older firmware +# PSU_PRESENCE="PSU{0}_prsnt" +ipmi_sdr_list = "" + +# Dump sensor registers + + +def ipmi_sensor_dump(): + + status = 1 + global ipmi_sdr_list + ipmi_cmd = IPMI_SENSOR_DATA + status, ipmi_sdr_list = commands.getstatusoutput(ipmi_cmd) + + if status: + logging.error('Failed to execute:' + ipmi_sdr_list) + sys.exit(0) + +# Fetch a BMC register + + +def get_pmc_register(reg_name): + + for item in ipmi_sdr_list.split("\n"): + if reg_name in item: + output = item.strip() + + if not output: + print('\nFailed to fetch: ' + reg_name + ' sensor ') + sys.exit(0) + + output = output.split('|')[1] + + logging.basicConfig(level=logging.DEBUG) + return output + + +# Print the information for temperature sensors + + +def print_temperature_sensors(): + + print("\nOnboard Temperature Sensors:") + + print ' PT_Left_temp: ',\ + (get_pmc_register('PT_Left_temp')) + print ' PT_Mid_temp: ',\ + (get_pmc_register('PT_Mid_temp')) + print ' PT_Right_temp: ',\ + (get_pmc_register('PT_Right_temp')) + print ' Broadcom Temp: ',\ + (get_pmc_register('TC_Near_temp')) + print ' Inlet Airflow Temp: ',\ + (get_pmc_register('ILET_AF_temp')) + print ' CPU Temp: ',\ + (get_pmc_register('CPU_Near_temp')) + print ' CPU Near Temp: ',\ + (get_pmc_register('CPU_temp')) + print ' PSU FAN AirFlow Temperature 1: ',\ + (get_pmc_register('PSU1_AF_temp')) + print ' PSU FAN AirFlow Temperature 2: ',\ + (get_pmc_register('PSU2_AF_temp')) + +ipmi_sensor_dump() + +print_temperature_sensors() + +# Print the information for 1 Fan Tray + + +def print_fan_tray(tray): + + Fan_Status = [' Normal', ' Abnormal', ' no reading'] + Airflow_Direction = ['B2F', 'F2B'] + + print ' Fan Tray ' + str(tray) + ':' + + if (tray == 1): + + if(int(get_pmc_register('FAN1_prsnt'), 16)): + fan1_status = int(get_pmc_register('Fan1_Front_state'), 16) + fan2_status = int(get_pmc_register('Fan1_Rear_state'), 16) + # BMC taking some time to update + if(fan1_status > 2 or fan2_status > 2): + fan1_status = 2 + fan2_status = 2 + else: + fan1_status = 2 + fan2_status = 2 + + print ' Fan1 Speed: ',\ + get_pmc_register('FAN1_Front_rpm') + print ' Fan2 Speed: ',\ + get_pmc_register('FAN1_Rear_rpm') + print ' Fan1 State: ',\ + Fan_Status[fan1_status] + print ' Fan2 State: ',\ + Fan_Status[fan2_status] + + elif (tray == 2): + + if(int(get_pmc_register('FAN2_prsnt'), 16)): + fan1_status = int(get_pmc_register('Fan2_Front_state'), 16) + fan2_status = int(get_pmc_register('Fan2_Rear_state'), 16) + # BMC taking some time to update + if(fan1_status > 2 or fan2_status > 2): + fan1_status = 2 + fan2_status = 2 + else: + fan1_status = 2 + fan2_status = 2 + + print ' Fan1 Speed: ',\ + get_pmc_register('FAN2_Front_rpm') + print ' Fan2 Speed: ',\ + get_pmc_register('FAN2_Rear_rpm') + print ' Fan1 State: ',\ + Fan_Status[fan1_status] + print ' Fan2 State: ',\ + Fan_Status[fan2_status] + + elif (tray == 3): + + if(int(get_pmc_register('FAN3_prsnt'), 16)): + fan1_status = int(get_pmc_register('Fan3_Front_state'), 16) + fan2_status = int(get_pmc_register('Fan3_Rear_state'), 16) + # BMC taking some time to update + if(fan1_status > 2 or fan2_status > 2): + fan1_status = 2 + fan2_status = 2 + else: + fan1_status = 2 + fan2_status = 2 + + print ' Fan1 Speed: ',\ + get_pmc_register('FAN3_Front_rpm') + print ' Fan2 Speed: ',\ + get_pmc_register('FAN3_Rear_rpm') + print ' Fan1 State: ',\ + Fan_Status[fan1_status] + print ' Fan2 State: ',\ + Fan_Status[fan2_status] + + elif (tray == 4): + + if(int(get_pmc_register('FAN4_prsnt'), 16)): + fan1_status = int(get_pmc_register('Fan4_Front_state'), 16) + fan2_status = int(get_pmc_register('Fan4_Rear_state'), 16) + # BMC taking some time to update + if(fan1_status > 2 or fan2_status > 2): + fan1_status = 2 + fan2_status = 2 + else: + fan1_status = 2 + fan2_status = 2 + + print ' Fan1 Speed: ',\ + get_pmc_register('FAN4_Front_rpm') + print ' Fan2 Speed: ',\ + get_pmc_register('FAN4_Rear_rpm') + print ' Fan1 State: ',\ + Fan_Status[fan1_status] + print ' Fan2 State: ',\ + Fan_Status[fan2_status] + + +print('\nFan Trays:') + +for tray in range(1, Z9264F_MAX_FAN_TRAYS + 1): + fan_presence = FAN_PRESENCE.format(tray) + if (get_pmc_register(fan_presence)): + print_fan_tray(tray) + else: + print '\n Fan Tray ' + str(tray + 1) + ': Not present' + + +# Print the information for PSU1, PSU2 +def print_psu(psu): + + # PSU FAN details + if (psu == 1): + + print ' PSU1:' + print ' FAN Normal Temperature: ',\ + get_pmc_register('PSU1_Normal_temp') + print ' Chassis Temperature: ',\ + get_pmc_register('PSU1_Chass_temp') + print ' System Temperature: ',\ + get_pmc_register('PSU1_Sys_temp') + print ' FAN RPM: ',\ + get_pmc_register('PSU1_rpm') + print ' Input Voltage: ',\ + get_pmc_register('PSU1_In_volt') + print ' Output Voltage: ',\ + get_pmc_register('PSU1_Out_volt') + print ' Input Power: ',\ + get_pmc_register('PSU1_In_watt') + print ' Output Power: ',\ + get_pmc_register('PSU1_Out_watt') + print ' Input Current: ',\ + get_pmc_register('PSU1_In_amp') + print ' Output Current: ',\ + get_pmc_register('PSU1_Out_amp') + + else: + + print ' PSU2:' + print ' FAN Normal Temperature: ',\ + get_pmc_register('PSU2_Normal_temp') + print ' Chassis Temperature: ',\ + get_pmc_register('PSU2_Chass_temp') + print ' System Temperature: ',\ + get_pmc_register('PSU2_Sys_temp') + print ' FAN RPM: ',\ + get_pmc_register('PSU2_rpm') + print ' Input Voltage: ',\ + get_pmc_register('PSU2_In_volt') + print ' Output Voltage: ',\ + get_pmc_register('PSU2_Out_volt') + print ' Input Power: ',\ + get_pmc_register('PSU2_In_watt') + print ' Output Power: ',\ + get_pmc_register('PSU2_Out_watt') + print ' Input Current: ',\ + get_pmc_register('PSU2_In_amp') + print ' Output Current: ',\ + get_pmc_register('PSU2_Out_amp') + + +print('\nPSUs:') +for psu in range(1, Z9264F_MAX_PSUS + 1): + psu_presence = PSU_PRESENCE.format(psu) + if (get_pmc_register(psu_presence)): + print_psu(psu) + else: + print '\n PSU ', psu, 'Not present' + +print '\n Total Power: ',\ + get_pmc_register('PSU_Total_watt') diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/qsfp_irq_enable.py b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/qsfp_irq_enable.py new file mode 100755 index 00000000000..b2eb03dd201 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/qsfp_irq_enable.py @@ -0,0 +1,32 @@ +#!/usr/bin/python + +try: + import struct + import sys + from os import * + from mmap import * + +except ImportError as e: + raise ImportError("%s - required module no found" % str(e)) + +BASE_RES_PATH = "/sys/bus/pci/devices/0000:04:00.0/resource0" +PORT_START = 0 +PORT_END = 64 + + +def pci_mem_write(mm, offset, data): + mm.seek(offset) + mm.write(struct.pack('I', data)) + + +def pci_set_value(resource, val, offset): + fd = open(resource, O_RDWR) + mm = mmap(fd, 0) + val = pci_mem_write(mm, offset, val) + mm.close() + close(fd) + return val + +for port_num in range(PORT_START, PORT_END+1): + port_offset = 0x400c + ((port_num) * 16) + pci_set_value(BASE_RES_PATH, 0x30, port_offset) diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/sensors b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/sensors new file mode 100755 index 00000000000..ee53f2b0f32 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/sensors @@ -0,0 +1,8 @@ +#!/bin/bash +docker exec -i pmon sensors "$@" +docker exec -i pmon /usr/bin/platform_sensors.py "$@" + +#To probe sensors not part of lm-sensors +#if [ -r /usr/local/bin/platform_sensors.py ]; then +# python /usr/local/bin/platform_sensors.py +#fi diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/z9264f_platform.sh b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/z9264f_platform.sh new file mode 100755 index 00000000000..3435704a65c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/scripts/z9264f_platform.sh @@ -0,0 +1,155 @@ +#!/bin/bash + +init_devnum() { + found=0 + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + # iSMT adapter can be at either dffd0000 or dfff0000 + if [[ $devname == 'SMBus iSMT adapter at '* ]]; then + found=1 + break + fi + done + + [ $found -eq 0 ] && echo "cannot find iSMT" && exit 1 +} + +# Attach/Detach syseeprom on CPU board +sys_eeprom() { + case $1 in + "new_device") echo 24c16 0x50 > /sys/bus/i2c/devices/i2c-0/$1 + ;; + "delete_device") echo 0x50 > /sys/bus/i2c/devices/i2c-0/$1 + ;; + *) echo "z9264f_platform: sys_eeprom : invalid command !" + ;; + esac +} + +#Attach/Detach the MUX connecting all QSFPs +switch_board_qsfp_mux() { + case $1 in + "new_device") + for ((i=603;i<=611;i++)); + do + echo "Attaching PCA9548 @ 0x74" + echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-$i/$1 + done + + ;; + "delete_device") + for ((i=603;i<=611;i++)); + do + echo "Detaching PCA9548 @ 0x74" + echo 0x74 > /sys/bus/i2c/devices/i2c-$i/$1 + done + + ;; + *) echo "z9264f_platform: switch_board_qsfp_mux: invalid command !" + ;; + esac + sleep 2 +} + +#Attach/Detach 64 instances of EEPROM driver QSFP ports +#eeprom can dump data using below command +switch_board_qsfp() { + case $1 in + "new_device") + for ((i=2;i<=65;i++)); + do + echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-$i/$1 + done + ;; + + "delete_device") + for ((i=2;i<=65;i++)); + do + echo 0x50 > /sys/bus/i2c/devices/i2c-$i/$1 + done + ;; + + *) echo "z9264f_platform: switch_board_qsfp: invalid command !" + ;; + esac +} + +#Attach/Detach 2 instances of EEPROM driver SFP+ ports +#eeprom can dump data using below command +switch_board_sfp() { + case $1 in + "new_device") + for ((i=66;i<=67;i++)); + do + echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-$i/$1 + done + ;; + + "delete_device") + for ((i=66;i<=67;i++)); + do + echo 0x50 > /sys/bus/i2c/devices/i2c-$i/$1 + done + ;; + + *) echo "z9264f_platform: switch_board_sfp: invalid command !" + ;; + esac +} + +#Modsel 64 ports to applicable QSFP type modules +#This enables the adapter to respond for i2c commands +switch_board_modsel() { + resource="/sys/bus/pci/devices/0000:04:00.0/resource0" + for ((i=1;i<=64;i++)); + do + port_addr=$(( 16384 + ((i - 1) * 16))) + hex=$( printf "0x%x" $port_addr ) + python /usr/bin/pcisysfs.py --set --offset $hex --val 0x10 --res $resource > /dev/null 2>&1 + done +} + +# Copy led_proc_init.soc file according to the HWSKU +init_switch_port_led() { + device="/usr/share/sonic/device" + platform=$(/usr/local/bin/sonic-cfggen -H -v DEVICE_METADATA.localhost.platform) + hwsku=$(cat /etc/sonic/config_db.json | grep -A10 "DEVICE_METADATA" | grep "hwsku" | cut -d ":" -f2 | sed 's/"//g' | sed 's/,//g'| xargs ) + + led_proc_init="$device/$platform/$hwsku/led_proc_init.soc" + + # Remove old HWSKU LED file.. + rm -rf $device/$platform/led_proc_init.soc + + if [ -e $led_proc_init ] && [ ! -e $device/$platform/led_proc_init.soc ]; then + cp $led_proc_init $device/$platform/ + fi +} + +init_devnum + +if [ "$1" == "init" ]; then + modprobe i2c-dev + modprobe i2c-mux-pca954x force_deselect_on_exit=1 + modprobe ipmi_devintf + modprobe ipmi_si + modprobe i2c_ocores + modprobe dell_z9264f_fpga_ocores + sys_eeprom "new_device" + switch_board_qsfp_mux "new_device" + switch_board_qsfp "new_device" + switch_board_sfp "new_device" + switch_board_modsel + init_switch_port_led + python /usr/bin/qsfp_irq_enable.py + +elif [ "$1" == "deinit" ]; then + sys_eeprom "delete_device" + switch_board_qsfp "delete_device" + switch_board_qsfp_mux "delete_device" + switch_board_sfp "delete_device" + modprobe -r i2c-mux-pca954x + modprobe -r i2c-dev +else + echo "z9264f_platform : Invalid option !" +fi + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9264f/systemd/platform-modules-z9264f.service b/platform/broadcom/sonic-platform-modules-dell/z9264f/systemd/platform-modules-z9264f.service new file mode 100644 index 00000000000..b89f61ea622 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9264f/systemd/platform-modules-z9264f.service @@ -0,0 +1,13 @@ +[Unit] +Description=Dell Z9264f Platform modules +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/z9264f_platform.sh init +ExecStop=/usr/local/bin/z9264f_platform.sh deinit +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-delta/.gitignore b/platform/broadcom/sonic-platform-modules-delta/.gitignore new file mode 100644 index 00000000000..2490baa9d1e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/.gitignore @@ -0,0 +1,59 @@ +# Prerequisites +*.d + +# Object files +*.o +*.ko +*.obj +*.elf + +# Linker output +*.ilk +*.map +*.exp + +# Precompiled Headers +*.gch +*.pch + +# Libraries +*.lib +*.a +*.la +*.lo + +# Shared objects (inc. Windows DLLs) +*.dll +*.so +*.so.* +*.dylib + +# Executables +*.exe +*.out +*.app +*.i*86 +*.x86_64 +*.hex + +# Debug files +*.dSYM/ +*.su +*.idb +*.pdb + +# Kernel Module Compile Results +*.mod* +*.cmd +.tmp_versions/ +modules.order +Module.symvers +Mkfile.old +dkms.conf + +# Debian packaging +*.debhelper.log +*.postinst.debhelper +*.postrm.debhelper +*.prerm.debhelper +*.substvars diff --git a/platform/broadcom/sonic-platform-modules-delta/LICENSE b/platform/broadcom/sonic-platform-modules-delta/LICENSE new file mode 100644 index 00000000000..ea87fe9caab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/LICENSE @@ -0,0 +1,16 @@ +Copyright (C) 2016 Microsoft, Inc +Copyright (C) 2017 Delta Networks, Inc. + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/broadcom/sonic-platform-modules-delta/ag5648/cfg/ag5648-modules.conf b/platform/broadcom/sonic-platform-modules-delta/ag5648/cfg/ag5648-modules.conf new file mode 100644 index 00000000000..552b4103ed0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag5648/cfg/ag5648-modules.conf @@ -0,0 +1,13 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus +i2c-mux-gpio +i2c-mux-pca954x diff --git a/platform/broadcom/sonic-platform-modules-delta/ag5648/modules/Makefile b/platform/broadcom/sonic-platform-modules-delta/ag5648/modules/Makefile new file mode 100644 index 00000000000..012f708ec46 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag5648/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := dni_ag5648_psu.o dni_emc2305.o delta_ag5648_platform.o + diff --git a/platform/broadcom/sonic-platform-modules-delta/ag5648/modules/delta_ag5648_platform.c b/platform/broadcom/sonic-platform-modules-delta/ag5648/modules/delta_ag5648_platform.c new file mode 100644 index 00000000000..16b9ba2fbc4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag5648/modules/delta_ag5648_platform.c @@ -0,0 +1,1644 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BUS4_DEV_NUM 54 +#define DEFAULT_NUM 1 +#define BUS4_BASE_NUM 10 +#define BUS4_MUX_REG 0x18 + +#define TEMP_FAN_VAL 0x06 +#define FANIO_CTL_VAL 0x07 +#define FAN_CTRL_VAL 0x05 +#define PSU1_VAL 0x00 +#define PSU2_VAL 0x20 +#define HOT_SWAP1_VAL 0x10 +#define HOT_SWAP2_VAL 0x30 + +#define SYSTEM_CPLD_REG 0x31 +#define MASTER_CPLD_REG 0x35 +#define SLAVE_CPLD_REG 0x39 + +#define FAN_LED_REG 0x05 +#define LED_REG 0x04 + +#define SFP_PRESENCE_1 0x08 +#define SFP_PRESENCE_2 0x09 +#define SFP_PRESENCE_3 0x0a +#define SFP_PRESENCE_4 0x0b +#define SFP_PRESENCE_5 0x0c +#define SFP_PRESENCE_6 0x08 +#define SFP_PRESENCE_7 0x09 +#define QSFP_PRESENCE 0x12 + +#define QSFP_RESPONSE 0x10 +#define QSFP_LP_MODE 0x11 +#define QSFP_RESET 0x13 + + +#define SFF8436_INFO(data) \ + .type = "sff8436", .addr = 0x50, .platform_data = (data) + +#define SFF_8436_PORT(eedata) \ + .byte_len = 256, .page_size = 1, .flags = SFF_8436_FLAG_READONLY + +#define ag5648_i2c_device_num(NUM){ \ + .name = "delta-ag5648-i2c-device", \ + .id = NUM, \ + .dev = { \ + .platform_data = &ag5648_i2c_device_platform_data[NUM], \ + .release = device_release, \ + }, \ +} + +/*Define struct to get client of i2c_new_deivce */ +struct i2c_client * i2c_client_9548; + +enum{ + BUS0 = 0, + BUS1, + BUS2, + BUS3, + BUS4, + BUS5, + BUS6, + BUS7, +}; + +unsigned char reverse_8bits(unsigned char c) +{ + unsigned char s = 0; + int i; + for (i = 0; i < 8; ++i) { + s <<= 1; + s |= c & 1; + c >>= 1; + } + return s; +} +/*---------------- I2C device - start ------------- */ +static void device_release(struct device *dev) +{ + return; +} + +struct i2c_device_platform_data { + int parent; + struct i2c_board_info info; + struct i2c_client *client; +}; +/* pca9548 - add 8 bus */ +static struct pca954x_platform_mode pca954x_mode[] = { + { .adap_id = 2, + .deselect_on_exit = 1, + }, + { .adap_id = 3, + .deselect_on_exit = 1, + }, + { .adap_id = 4, + .deselect_on_exit = 1, + }, + { .adap_id = 5, + .deselect_on_exit = 1, + }, + { .adap_id = 6, + .deselect_on_exit = 1, + }, + { .adap_id = 7, + .deselect_on_exit = 1, + }, + { .adap_id = 8, + .deselect_on_exit = 1, + }, + { .adap_id = 9, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_data pca954x_data = { + .modes = pca954x_mode, + .num_modes = ARRAY_SIZE(pca954x_mode), +}; + +static struct i2c_board_info __initdata i2c_info_pca9548[] = +{ + { + I2C_BOARD_INFO("pca9548", 0x70), + .platform_data = &pca954x_data, + }, +}; + + +static struct sff_8436_platform_data sff_8436_port[] = { + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, + { SFF_8436_PORT() }, +}; + + +static struct i2c_device_platform_data ag5648_i2c_device_platform_data[] = { + { + /* id eeprom (0x53) */ + .parent = 2, + .info = { I2C_BOARD_INFO("24c02", 0x53) }, + .client = NULL, + }, + { + /* tmp75 (0x4d) */ + .parent = 2, + .info = { I2C_BOARD_INFO("tmp75", 0x4d) }, + .client = NULL, + }, + { + /* tmp75 (0x49) */ + .parent = 3, + .info = { I2C_BOARD_INFO("tmp75", 0x49) }, + .client = NULL, + }, + { + /* tmp75 (0x4b) */ + .parent = 3, + .info = { I2C_BOARD_INFO("tmp75", 0x4b) }, + }, + { + /* tmp75 (0x4c) */ + .parent = 3, + .info = { I2C_BOARD_INFO("tmp75", 0x4c) }, + .client = NULL, + }, + { + /* tmp75 (0x4e) */ + .parent = 3, + .info = { I2C_BOARD_INFO("tmp75", 0x4e) }, + .client = NULL, + }, + { + /* tmp75 (0x4f) */ + .parent = 3, + .info = { I2C_BOARD_INFO("tmp75", 0x4f) }, + }, + { + /* tmp75 (0x4d) */ + .parent = 3, + .info = { I2C_BOARD_INFO("emc2305", 0x4d) }, + .client = NULL, + }, + { + /* tmp75 (0x4d) */ + .parent = 5, + .info = { I2C_BOARD_INFO("emc2305", 0x4d) }, + .client = NULL, + }, + { + /* tmp75 (0x40) */ + .parent = 3, + .info = { I2C_BOARD_INFO("ltc4215", 0x40) }, + .client = NULL, + }, + { + /* tmp75 (0x42) */ + .parent = 3, + .info = { I2C_BOARD_INFO("ltc4215", 0x42) }, + }, + { + /* psu1 (0x59) */ + .parent = 6, + .info = { I2C_BOARD_INFO("dni_ag5648_psu", 0x59) }, + .client = NULL, + }, + { + /* psu2 (0x58) */ + .parent = 6, + .info = { I2C_BOARD_INFO("dni_ag5648_psu", 0x58) }, + }, + { + /* qsfp 1 (0x50) */ + .parent = 10, + .info = { SFF8436_INFO(&sff_8436_port[0]) }, + .client = NULL, + }, + { + /* qsfp 2 (0x50) */ + .parent = 11, + .info = { SFF8436_INFO(&sff_8436_port[1]) }, + .client = NULL, + }, + { + /* qsfp 3 (0x50) */ + .parent = 12, + .info = { SFF8436_INFO(&sff_8436_port[2]) }, + .client = NULL, + }, + { + /* qsfp 4 (0x50) */ + .parent = 13, + .info = { SFF8436_INFO(&sff_8436_port[3]) }, + .client = NULL, + }, + { + /* qsfp 5 (0x50) */ + .parent = 14, + .info = { SFF8436_INFO(&sff_8436_port[4]) }, + .client = NULL, + }, + { + /* qsfp 6 (0x50) */ + .parent = 15, + .info = { SFF8436_INFO(&sff_8436_port[5]) }, + .client = NULL, + }, + { + /* qsfp 7 (0x50) */ + .parent = 16, + .info = { SFF8436_INFO(&sff_8436_port[6]) }, + .client = NULL, + }, + { + /* qsfp 8 (0x50) */ + .parent = 17, + .info = { SFF8436_INFO(&sff_8436_port[7]) }, + .client = NULL, + }, + { + /* qsfp 9 (0x50) */ + .parent = 18, + .info = { SFF8436_INFO(&sff_8436_port[8]) }, + .client = NULL, + }, + { + /* qsfp 10 (0x50) */ + .parent = 19, + .info = { SFF8436_INFO(&sff_8436_port[9]) }, + .client = NULL, + }, + { + /* qsfp 11 (0x50) */ + .parent = 20, + .info = { SFF8436_INFO(&sff_8436_port[10]) }, + .client = NULL, + }, + { + /* qsfp 12 (0x50) */ + .parent = 21, + .info = { SFF8436_INFO(&sff_8436_port[11]) }, + .client = NULL, + }, + { + /* qsfp 13 (0x50) */ + .parent = 22, + .info = { SFF8436_INFO(&sff_8436_port[12]) }, + .client = NULL, + }, + { + /* qsfp 14 (0x50) */ + .parent = 23, + .info = { SFF8436_INFO(&sff_8436_port[13]) }, + .client = NULL, + }, + { + /* qsfp 15 (0x50) */ + .parent = 24, + .info = { SFF8436_INFO(&sff_8436_port[14]) }, + .client = NULL, + }, + { + /* qsfp 16 (0x50) */ + .parent = 25, + .info = { SFF8436_INFO(&sff_8436_port[15]) }, + .client = NULL, + }, + { + /* qsfp 17 (0x50) */ + .parent = 26, + .info = { SFF8436_INFO(&sff_8436_port[16]) }, + .client = NULL, + }, + { + /* qsfp 18 (0x50) */ + .parent = 27, + .info = { SFF8436_INFO(&sff_8436_port[17]) }, + .client = NULL, + }, + { + /* qsfp 19 (0x50) */ + .parent = 28, + .info = { SFF8436_INFO(&sff_8436_port[18]) }, + .client = NULL, + }, + { + /* qsfp 20 (0x50) */ + .parent = 29, + .info = { SFF8436_INFO(&sff_8436_port[19]) }, + .client = NULL, + }, + { + /* qsfp 21 (0x50) */ + .parent = 30, + .info = { SFF8436_INFO(&sff_8436_port[20]) }, + .client = NULL, + }, + { + /* qsfp 22 (0x50) */ + .parent = 31, + .info = { SFF8436_INFO(&sff_8436_port[21]) }, + .client = NULL, + }, + { + /* qsfp 23 (0x50) */ + .parent = 32, + .info = { SFF8436_INFO(&sff_8436_port[22]) }, + .client = NULL, + }, + { + /* qsfp 24 (0x50) */ + .parent = 33, + .info = { SFF8436_INFO(&sff_8436_port[23]) }, + .client = NULL, + }, + { + /* qsfp 25 (0x50) */ + .parent = 34, + .info = { SFF8436_INFO(&sff_8436_port[24]) }, + .client = NULL, + }, + { + /* qsfp 26 (0x50) */ + .parent = 35, + .info = { SFF8436_INFO(&sff_8436_port[25]) }, + .client = NULL, + }, + { + /* qsfp 27 (0x50) */ + .parent = 36, + .info = { SFF8436_INFO(&sff_8436_port[26]) }, + .client = NULL, + }, + { + /* qsfp 28 (0x50) */ + .parent = 37, + .info = { SFF8436_INFO(&sff_8436_port[27]) }, + .client = NULL, + }, + { + /* qsfp 29 (0x50) */ + .parent = 38, + .info = { SFF8436_INFO(&sff_8436_port[28]) }, + .client = NULL, + }, + { + /* qsfp 30 (0x50) */ + .parent = 39, + .info = { SFF8436_INFO(&sff_8436_port[29]) }, + .client = NULL, + }, + { + /* qsfp 31 (0x50) */ + .parent = 40, + .info = { SFF8436_INFO(&sff_8436_port[30]) }, + .client = NULL, + }, + { + /* qsfp 32 (0x50) */ + .parent = 41, + .info = { SFF8436_INFO(&sff_8436_port[31]) }, + .client = NULL, + }, + { + /* qsfp 33 (0x50) */ + .parent = 42, + .info = { SFF8436_INFO(&sff_8436_port[32]) }, + .client = NULL, + }, + { + /* qsfp 34 (0x50) */ + .parent = 43, + .info = { SFF8436_INFO(&sff_8436_port[33]) }, + .client = NULL, + }, + { + /* qsfp 35 (0x50) */ + .parent = 44, + .info = { SFF8436_INFO(&sff_8436_port[34]) }, + .client = NULL, + }, + { + /* qsfp 36 (0x50) */ + .parent = 45, + .info = { SFF8436_INFO(&sff_8436_port[35]) }, + .client = NULL, + }, + { + /* qsfp 37 (0x50) */ + .parent = 46, + .info = { SFF8436_INFO(&sff_8436_port[36]) }, + .client = NULL, + }, + { + /* qsfp 38 (0x50) */ + .parent = 47, + .info = { SFF8436_INFO(&sff_8436_port[37]) }, + .client = NULL, + }, + { + /* qsfp 39 (0x50) */ + .parent = 48, + .info = { SFF8436_INFO(&sff_8436_port[38]) }, + .client = NULL, + }, + { + /* qsfp 40 (0x50) */ + .parent = 49, + .info = { SFF8436_INFO(&sff_8436_port[39]) }, + .client = NULL, + }, + { + /* qsfp 41 (0x50) */ + .parent = 50, + .info = { SFF8436_INFO(&sff_8436_port[40]) }, + .client = NULL, + }, + { + /* qsfp 42 (0x50) */ + .parent = 51, + .info = { SFF8436_INFO(&sff_8436_port[41]) }, + .client = NULL, + }, + { + /* qsfp 43 (0x50) */ + .parent = 52, + .info = { SFF8436_INFO(&sff_8436_port[42]) }, + .client = NULL, + }, + { + /* qsfp 44 (0x50) */ + .parent = 53, + .info = { SFF8436_INFO(&sff_8436_port[43]) }, + .client = NULL, + }, + { + /* qsfp 45 (0x50) */ + .parent = 54, + .info = { SFF8436_INFO(&sff_8436_port[44]) }, + .client = NULL, + }, + { + /* qsfp 46 (0x50) */ + .parent = 55, + .info = { SFF8436_INFO(&sff_8436_port[45]) }, + .client = NULL, + }, + { + /* qsfp 47 (0x50) */ + .parent = 56, + .info = { SFF8436_INFO(&sff_8436_port[46]) }, + .client = NULL, + }, + { + /* qsfp 48 (0x50) */ + .parent = 57, + .info = { SFF8436_INFO(&sff_8436_port[47]) }, + .client = NULL, + }, + { + /* qsfp 49 (0x50) */ + .parent = 58, + .info = { SFF8436_INFO(&sff_8436_port[48]) }, + .client = NULL, + }, + { + /* qsfp 50 (0x50) */ + .parent = 59, + .info = { SFF8436_INFO(&sff_8436_port[49]) }, + .client = NULL, + }, + { + /* qsfp 51 (0x50) */ + .parent = 60, + .info = { SFF8436_INFO(&sff_8436_port[50]) }, + .client = NULL, + }, + { + /* qsfp 52 (0x50) */ + .parent = 61, + .info = { SFF8436_INFO(&sff_8436_port[51]) }, + .client = NULL, + }, + { + /* qsfp 53 (0x50) */ + .parent = 62, + .info = { SFF8436_INFO(&sff_8436_port[52]) }, + .client = NULL, + }, + { + /* qsfp 54 (0x50) */ + .parent = 63, + .info = { SFF8436_INFO(&sff_8436_port[53]) }, + .client = NULL, + }, +}; + + +static struct platform_device ag5648_i2c_device[] = { + ag5648_i2c_device_num(0), + ag5648_i2c_device_num(1), + ag5648_i2c_device_num(2), + ag5648_i2c_device_num(3), + ag5648_i2c_device_num(4), + ag5648_i2c_device_num(5), + ag5648_i2c_device_num(6), + ag5648_i2c_device_num(7), + ag5648_i2c_device_num(8), + ag5648_i2c_device_num(9), + ag5648_i2c_device_num(10), + ag5648_i2c_device_num(11), + ag5648_i2c_device_num(12), + ag5648_i2c_device_num(13), + ag5648_i2c_device_num(14), + ag5648_i2c_device_num(15), + ag5648_i2c_device_num(16), + ag5648_i2c_device_num(17), + ag5648_i2c_device_num(18), + ag5648_i2c_device_num(19), + ag5648_i2c_device_num(20), + ag5648_i2c_device_num(21), + ag5648_i2c_device_num(22), + ag5648_i2c_device_num(23), + ag5648_i2c_device_num(24), + ag5648_i2c_device_num(25), + ag5648_i2c_device_num(26), + ag5648_i2c_device_num(27), + ag5648_i2c_device_num(28), + ag5648_i2c_device_num(29), + ag5648_i2c_device_num(30), + ag5648_i2c_device_num(31), + ag5648_i2c_device_num(32), + ag5648_i2c_device_num(33), + ag5648_i2c_device_num(34), + ag5648_i2c_device_num(35), + ag5648_i2c_device_num(36), + ag5648_i2c_device_num(37), + ag5648_i2c_device_num(38), + ag5648_i2c_device_num(39), + ag5648_i2c_device_num(40), + ag5648_i2c_device_num(41), + ag5648_i2c_device_num(42), + ag5648_i2c_device_num(43), + ag5648_i2c_device_num(44), + ag5648_i2c_device_num(45), + ag5648_i2c_device_num(46), + ag5648_i2c_device_num(47), + ag5648_i2c_device_num(48), + ag5648_i2c_device_num(49), + ag5648_i2c_device_num(50), + ag5648_i2c_device_num(51), + ag5648_i2c_device_num(52), + ag5648_i2c_device_num(53), + ag5648_i2c_device_num(54), + ag5648_i2c_device_num(55), + ag5648_i2c_device_num(56), + ag5648_i2c_device_num(57), + ag5648_i2c_device_num(58), + ag5648_i2c_device_num(59), + ag5648_i2c_device_num(60), + ag5648_i2c_device_num(61), + ag5648_i2c_device_num(62), + ag5648_i2c_device_num(63), + ag5648_i2c_device_num(64), + ag5648_i2c_device_num(65), + ag5648_i2c_device_num(66), +}; + +/*---------------- I2C device - end ------------- */ + +/*---------------- I2C driver - start ------------- */ +static int __init i2c_device_probe(struct platform_device *pdev) +{ + struct i2c_device_platform_data *pdata; + struct i2c_adapter *parent; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -ENODEV; + } + + pdata->client = i2c_new_device(parent, &pdata->info); + if (!pdata->client) { + dev_err(&pdev->dev, "Failed to create i2c client %s at %d\n", + pdata->info.type, pdata->parent); + return -ENODEV; + } + + return 0; +} + +static int __exit i2c_deivce_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent; + struct i2c_device_platform_data *pdata; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + if (pdata->client) { + parent = (pdata->client)->adapter; + i2c_unregister_device(pdata->client); + i2c_put_adapter(parent); + } + + return 0; +} +static struct platform_driver i2c_device_driver = { + .probe = i2c_device_probe, + .remove = __exit_p(i2c_deivce_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag5648-i2c-device", + } +}; + +/*---------------- I2C driver - end ------------- */ + +/*---------------- CPLD - start ------------- */ + +/* CPLD -- device */ + +enum cpld_type { + system_cpld, + master_cpld, + slave_cpld, +}; + +struct cpld_platform_data { + int reg_addr; + struct i2c_client *client; +}; + +static struct cpld_platform_data ag5648_cpld_platform_data[] = { + [system_cpld] = { + .reg_addr = SYSTEM_CPLD_REG, + }, + [master_cpld] = { + .reg_addr = MASTER_CPLD_REG, + }, + [slave_cpld] = { + .reg_addr = SLAVE_CPLD_REG, + }, +}; + +static struct platform_device ag5648_cpld = { + .name = "delta-ag5648-cpld", + .id = 0, + .dev = { + .platform_data = ag5648_cpld_platform_data, + .release = device_release + }, +}; + +static ssize_t get_present(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + int ret; + u32 data = 0; + u32 data2 = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[slave_cpld].client, SFP_PRESENCE_1); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data = (u32)(ret & 0xff); + + ret = i2c_smbus_read_byte_data(pdata[slave_cpld].client, SFP_PRESENCE_2); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(ret & 0xff) << 8; + + ret = i2c_smbus_read_byte_data(pdata[slave_cpld].client, SFP_PRESENCE_3); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(ret & 0xff) << 16; + + ret = i2c_smbus_read_byte_data(pdata[slave_cpld].client, SFP_PRESENCE_4); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(ret & 0xff) << 24; + + ret = i2c_smbus_read_byte_data(pdata[slave_cpld].client, SFP_PRESENCE_5); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data2 = ((u32)(ret & 0xf)) ; + + ret = i2c_smbus_read_byte_data(pdata[master_cpld].client, SFP_PRESENCE_6); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data2 |= (u32)(ret & 0xff) << 4; + + ret = i2c_smbus_read_byte_data(pdata[master_cpld].client, SFP_PRESENCE_7); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data2 |= (u32)((ret >> 4) & 0xf) << 12; + + ret = i2c_smbus_read_byte_data(pdata[master_cpld].client, QSFP_PRESENCE); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data2 |= (u32)(ret & 0x3f) << 16; + + return sprintf(buf, "0x%06x%x\n", data2, data); +} + +static ssize_t get_lpmode(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[master_cpld].client, QSFP_LP_MODE); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data = ((u8)ret & 0x3f) ; + + return sprintf(buf, "0x%02x%012x\n", data, 0); +} + +static ssize_t set_lpmode(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long data; + int err; + + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 16, &data); + if (err) + return err; + + data = data >> 48; + i2c_smbus_write_byte_data(pdata[master_cpld].client, QSFP_LP_MODE, (u8)(data & 0xff)); + + return count; +} + +static ssize_t get_reset(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[master_cpld].client, QSFP_RESET); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + + data = ((u8)ret & 0x3f); + + return sprintf(buf, "0x%02x%012x\n", data, 0); +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 16, &data); + if (err) + return err; + data = data >> 48; + i2c_smbus_write_byte_data(pdata[master_cpld].client, QSFP_RESET, (u8)(data & 0xff)); + + return count; +} + +static ssize_t get_response(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[master_cpld].client, QSFP_RESPONSE); + + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data = (u8)ret & 0x3f; + + return sprintf(buf, "0x%02x%012x\n", data, 0); +} + +static ssize_t set_response(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 16, &data); + if (err) + return err; + data = data >> 48; + i2c_smbus_write_byte_data(pdata[master_cpld].client, QSFP_RESPONSE, (u8)(data & 0xff)); + + return count; +} + +struct platform_led_status{ + int reg_data; + char *led_status; + int led_id; +}; + +static struct platform_led_status led_info[] = { + { + .reg_data = 0x00,//0000 0000 + .led_status = "fan_off", + .led_id = 0, + }, + { + .reg_data = 1 << 6,//0100 0000 + .led_status = "fan_Amber", + .led_id = 0, + }, + { + .reg_data = 2 << 6,//1000 0000 + .led_status = "fan_green", + .led_id = 0, + }, + { + .reg_data = 3 << 6,//1100 0000 + .led_status = "fan_Blinking_yellow", + .led_id = 0, + }, + { + .reg_data = 0x00, + .led_status = "sys_Blinking_green", + .led_id = 1, + }, + { + .reg_data = 1 << 4, + .led_status = "sys_green", + .led_id = 1, + }, + { + .reg_data = 2 << 4, + .led_status = "sys_Amber", + .led_id = 1, + }, + { + .reg_data = 3 << 4 , + .led_status = "sys_Amber", + .led_id = 1, + }, + { + .reg_data = 0x00, + .led_status = "pwr_off", + .led_id = 2, + }, + { + .reg_data = 1 << 1, + .led_status = "pwr_Amber", + .led_id = 2, + }, + { + .reg_data = 2 << 1, + .led_status = "pwr_green", + .led_id = 2, + }, + { + .reg_data = 3 << 1, + .led_status = "pwr_Blinking_Amber", + .led_id = 2, + }, + { + .reg_data = 0x00, + .led_status = "fan4_off", + .led_id = 3, + }, + { + .reg_data = 1 << 6, + .led_status = "fan4_green", + .led_id = 3, + }, + { + .reg_data = 2 << 6, + .led_status = "fan4_Amber", + .led_id = 3, + }, + { + .reg_data = 0x00, + .led_status = "fan3_off", + .led_id = 4, + }, + { + .reg_data = 1 << 4, + .led_status = "fan3_green", + .led_id = 4, + }, + { + .reg_data = 2 << 4, + .led_status = "fan3_Amber", + .led_id = 4, + }, + { + .reg_data = 0x00, + .led_status = "fan2_off", + .led_id = 5, + }, + { + .reg_data = 1 << 2, + .led_status = "fan2_green", + .led_id = 5, + }, + { + .reg_data = 1 << 3, + .led_status = "fan2_Amber", + .led_id = 5, + }, + { + .reg_data = 0x00, + .led_status = "fan1_off", + .led_id = 6, + }, + { + .reg_data = 1, + .led_status = "fan1_green", + .led_id = 6, + }, + { + .reg_data = 2, + .led_status = "fan1_Amber", + .led_id = 6, + }, +}; + +struct platform_led_data{ + int reg_addr; + int mask; +}; + +static struct platform_led_data led_data[] = { + { + .reg_addr = LED_REG, //0x04 + .mask = 0xc0,//1100 0000 + }, + { + .reg_addr = LED_REG, + .mask = 0x30,//0011 0000 + }, + { + .reg_addr = LED_REG, + .mask = 0x06,//0000 0110 + }, + { + .reg_addr = FAN_LED_REG,//0x05 + .mask = 0xc0,//1100 0000 + }, + { + .reg_addr = FAN_LED_REG, + .mask = 0x30,//0011 0000 + }, + { + .reg_addr = FAN_LED_REG, + .mask = 0x0c,//0000 1100 + }, + { + .reg_addr = FAN_LED_REG, + .mask = 0x03,//0000 0011 + }, +}; + + +static ssize_t get_led_color(struct device *dev, struct device_attribute *devattr, char *buf) +{ + char str[9][20] = {0}; + int board_data; + int led_data_number; + int led_info_number; + struct cpld_platform_data *pdata = dev->platform_data; + + for(led_data_number = 0; led_data_number < ARRAY_SIZE(led_data); led_data_number++){ + board_data = i2c_smbus_read_byte_data(pdata[slave_cpld].client, led_data[led_data_number].reg_addr); + if(board_data >= 0){ + board_data &= led_data[led_data_number].mask; + for(led_info_number = 0; led_info_number < ARRAY_SIZE(led_info); led_info_number++){ + if (led_data_number == led_info[led_info_number].led_id \ + && board_data == led_info[led_info_number].reg_data){ + sprintf(str[led_data_number], "%s", led_info[led_info_number].led_status); + } + } + } + else + printk( KERN_ERR "Missing LED board data\n"); + } + return sprintf(buf,"%s\n%s\n%s\n%s\n%s\n%s\n%s\n",str[0],str[1],str[2],str[3],str[4],str[5],str[6]); +} + +static ssize_t set_led_color(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + int led_info_number; + int led_data_number; + int str_compar; + int led_reg_value; + struct cpld_platform_data *pdata = dev->platform_data; + + for(led_info_number = 0; led_info_number < ARRAY_SIZE(led_info); led_info_number++){ + str_compar = strncmp(buf,led_info[led_info_number].led_status,strlen(led_info[led_info_number].led_status)); + if(str_compar == 0){ + for(led_data_number = 0; led_data_number < ARRAY_SIZE(led_data); led_data_number++){ + if(led_info[led_info_number].led_id == led_data_number){ + led_reg_value = i2c_smbus_read_byte_data(pdata[slave_cpld].client, led_data[led_data_number].reg_addr); + if(led_reg_value >= 0){ + led_reg_value &= (~led_data[led_data_number].mask); + led_reg_value |= led_info[led_info_number].reg_data; + i2c_smbus_write_byte_data(pdata[slave_cpld].client, (u8)(led_data[led_data_number].reg_addr & 0xff), (u8)(led_reg_value & 0xff)); + } + else + printk( KERN_ERR "Missing LED reg. data\n"); + } + } + } + } + return count; +} + +static DEVICE_ATTR(sfp_response, S_IWUSR | S_IRUGO, get_response, set_response ); +static DEVICE_ATTR(sfp_present, S_IRUGO, get_present, NULL ); +static DEVICE_ATTR(sfp_lpmode, S_IWUSR | S_IRUGO, get_lpmode, set_lpmode ); +static DEVICE_ATTR(sfp_reset, S_IWUSR | S_IRUGO, get_reset, set_reset ); + +static DEVICE_ATTR(led_control, S_IRUGO | S_IWUSR, get_led_color, set_led_color); + +static struct attribute *ag5648_cpld_attrs[] = { + &dev_attr_sfp_response.attr, + &dev_attr_sfp_present.attr, + &dev_attr_sfp_lpmode.attr, + &dev_attr_sfp_reset.attr, + &dev_attr_led_control.attr, + NULL, +}; + +static struct attribute_group ag5648_cpld_attr_grp = { + .attrs = ag5648_cpld_attrs, +}; + +/* CPLD -- driver */ +static int __init cpld_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int ret,i; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "CPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(BUS2); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n",BUS2); + return -ENODEV; + } + + for (i = 0; i < ARRAY_SIZE(ag5648_cpld_platform_data); i++) { + pdata[i].client = i2c_new_dummy(parent, pdata[i].reg_addr); + if (!pdata[i].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[i].reg_addr); + goto error; + } + } + + ret = sysfs_create_group(&pdev->dev.kobj, &ag5648_cpld_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + return 0; + +error: + i--; + for (; i >= 0; i--) { + if (pdata[i].client) { + i2c_unregister_device(pdata[i].client); + } + } + i2c_put_adapter(parent); + + return -ENODEV; +} + +static int __exit cpld_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + int i; + sysfs_remove_group(&pdev->dev.kobj, &ag5648_cpld_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + for (i = 0; i < ARRAY_SIZE(ag5648_cpld_platform_data); i++) { + if (pdata[i].client) { + if (!parent) { + parent = (pdata[i].client)->adapter; + } + i2c_unregister_device(pdata[i].client); + } + } + } + + i2c_put_adapter(parent); + + return 0; +} + +static struct platform_driver cpld_driver = { + .probe = cpld_probe, + .remove = __exit_p(cpld_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag5648-cpld", + }, +}; + +/*---------------- CPLD - end ------------- */ + +/*---------------- MUX - start ------------- */ + +struct swpld_mux_platform_data { + int parent; + int base_nr; + int reg_addr; + struct i2c_client *cpld; +}; + +struct swpld_mux { + struct i2c_adapter *parent; + struct i2c_adapter **child; + struct swpld_mux_platform_data data; +}; + +static struct swpld_mux_platform_data ag5648_swpld_mux_platform_data[] = { + { + .parent = BUS4, + .base_nr = BUS4_BASE_NUM, + .cpld = NULL, + .reg_addr = BUS4_MUX_REG , + }, +}; + + +static struct platform_device ag5648_swpld_mux[] = { + { + .name = "delta-ag5648-swpld-mux", + .id = 0, + .dev = { + .platform_data = &ag5648_swpld_mux_platform_data[0], + .release = device_release, + }, + }, +}; + + +static int cpld_reg_write_byte(struct i2c_client *client, u8 regaddr, u8 val) +{ + union i2c_smbus_data data; + + data.byte = val; + return client->adapter->algo->smbus_xfer(client->adapter, client->addr, + client->flags, + I2C_SMBUS_WRITE, + regaddr, I2C_SMBUS_BYTE_DATA, &data); +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) +static int swpld_mux_select(struct i2c_adapter *adap, void *data, u8 chan) +{ + struct swpld_mux *mux = data; + u8 swpld_mux_val=0; + if ( mux->data.base_nr == BUS4_BASE_NUM ) + { + swpld_mux_val = (chan + 0x01); + } + else + { + swpld_mux_val = 0x00; + } + swpld_mux_val=swpld_mux_val & (u8)0x3F; + + return cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr, (u8)(swpld_mux_val & 0xff)); +} +#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) +static int swpld_mux_select(struct i2c_mux_core *muxc, u32 chan) +{ + struct swpld_mux *mux = i2c_mux_priv(muxc); + u8 swpld_mux_val=0; + if ( mux->data.base_nr == BUS4_BASE_NUM ) + { + swpld_mux_val = (chan + 0x01); + } + else + { + swpld_mux_val = 0x00; + } + swpld_mux_val=swpld_mux_val & (u8)0x3F; + + return cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr, (u8)(swpld_mux_val & 0xff)); +} +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) +static int __init swpld_mux_probe(struct platform_device *pdev) +{ + struct swpld_mux *mux; + struct swpld_mux_platform_data *pdata; + struct i2c_adapter *parent; + int i, ret, dev_num; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", pdata->parent); + return -ENODEV; + } + + /* Judge bus number to decide how many devices*/ + switch (pdata->parent) { + case BUS4: + dev_num = BUS4_DEV_NUM; + break; + default : + dev_num = DEFAULT_NUM; + break; + } + + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) { + ret = -ENOMEM; + printk(KERN_ERR "Failed to allocate memory for mux\n"); + goto alloc_failed; + } + + mux->parent = parent; + mux->data = *pdata; + mux->child = kzalloc(sizeof(struct i2c_adapter *) * dev_num, GFP_KERNEL); + if (!mux->child) { + ret = -ENOMEM; + printk(KERN_ERR "Failed to allocate memory for device on mux\n"); + goto alloc_failed2; + } + + for (i = 0; i < dev_num; i++) { + int nr = pdata->base_nr + i; + unsigned int class = 0; + + mux->child[i] = i2c_add_mux_adapter(parent, &pdev->dev, mux, + nr, i, class, + swpld_mux_select, NULL); + if (!mux->child[i]) { + ret = -ENODEV; + dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + goto add_adapter_failed; + } + } + + platform_set_drvdata(pdev, mux); + return 0; + +add_adapter_failed: + for (; i > 0; i--) + i2c_del_mux_adapter(mux->child[i - 1]); + kfree(mux->child); +alloc_failed2: + kfree(mux); +alloc_failed: + i2c_put_adapter(parent); + + return ret; +} +#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) +static int __init swpld_mux_probe(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc; + struct swpld_mux *mux; + struct swpld_mux_platform_data *pdata; + struct i2c_adapter *parent; + int i, ret, dev_num; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD platform data not found\n"); + return -ENODEV; + } + + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) { + printk(KERN_ERR "Failed to allocate memory for mux\n"); + return -ENOMEM; + } + mux->data = *pdata; + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + kfree(mux); + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", pdata->parent); + return -ENODEV; + } + + /* Judge bus number to decide how many devices*/ + switch (pdata->parent) { + case BUS4: + dev_num = BUS4_DEV_NUM; + break; + default : + dev_num = DEFAULT_NUM; + break; + } + + muxc = i2c_mux_alloc(parent, &pdev->dev, dev_num, 0, 0, + swpld_mux_select, NULL); + if (!muxc) { + ret = -ENOMEM; + goto alloc_failed; + } + muxc->priv = mux; + platform_set_drvdata(pdev, muxc); + + + for (i = 0; i < dev_num; i++) { + int nr = pdata->base_nr + i; + unsigned int class = 0; + + ret = i2c_mux_add_adapter(muxc, nr, i, class); + if (ret) { + dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + goto add_adapter_failed; + } + } + + dev_info(&pdev->dev, "%d port mux on %s adapter\n", dev_num, parent->name); + + return 0; + +add_adapter_failed: + i2c_mux_del_adapters(muxc); +alloc_failed: + kfree(mux); + i2c_put_adapter(parent); + + return ret; +} +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) +static int __exit swpld_mux_remove(struct platform_device *pdev) +{ + int i; + struct swpld_mux *mux = platform_get_drvdata(pdev); + struct swpld_mux_platform_data *pdata; + struct i2c_adapter *parent; + int dev_num; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -ENODEV; + } + switch (pdata->parent) { + case BUS4: + dev_num = BUS4_DEV_NUM; + break; + default : + dev_num = DEFAULT_NUM; + break; + } + + for (i = 0; i < dev_num; i++) + i2c_del_mux_adapter(mux->child[i]); + + platform_set_drvdata(pdev, NULL); + i2c_put_adapter(mux->parent); + kfree(mux->child); + kfree(mux); + + return 0; +} +#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) +static int __exit swpld_mux_remove(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc = platform_get_drvdata(pdev); + + i2c_mux_del_adapters(muxc); + i2c_put_adapter(muxc->parent); + + return 0; +} +#endif + +static struct platform_driver swpld_mux_driver = { + .probe = swpld_mux_probe, + .remove = __exit_p(swpld_mux_remove), /* TODO */ + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag5648-swpld-mux", + }, +}; +/*---------------- MUX - end ------------- */ + + +/*---------------- module initialization ------------- */ +static int __init delta_ag5648_platform_init(void) +{ + //struct i2c_client *client; + struct i2c_adapter *adapter; + struct cpld_platform_data *cpld_pdata; + struct swpld_mux_platform_data *swpld_pdata; + int ret,i = 0; + + //Use pca9548 in i2c_mux_pca954x.c + adapter = i2c_get_adapter(BUS1); + + i2c_client_9548 = i2c_new_device(adapter, &i2c_info_pca9548[0]); + i2c_put_adapter(adapter); + + // set the CPLD prob and remove + ret = platform_driver_register(&cpld_driver); + if (ret) { + printk(KERN_WARNING "Fail to register cpld driver\n"); + goto error_cpld_driver; + } + + // register the mux prob which call the CPLD + ret = platform_driver_register(&swpld_mux_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld mux driver\n"); + goto error_swpld_mux_driver; + } + + // register the i2c devices + ret = platform_driver_register(&i2c_device_driver); + if (ret) { + printk(KERN_WARNING "Fail to register i2c device driver\n"); + goto error_i2c_device_driver; + } + + // register the CPLD + ret = platform_device_register(&ag5648_cpld); + if (ret) { + printk(KERN_WARNING "Fail to create cpld device\n"); + goto error_ag5648_cpld; + } + // link the CPLD and the Mux + cpld_pdata = ag5648_cpld.dev.platform_data; + + + swpld_pdata = ag5648_swpld_mux[0].dev.platform_data; + swpld_pdata->cpld = cpld_pdata[master_cpld].client; + ret = platform_device_register(&ag5648_swpld_mux[0]); + if (ret) { + printk(KERN_WARNING "Fail to create swpld mux %d\n", i); + goto error_ag5648_swpld_mux; + } + + for (i = 0; i < ARRAY_SIZE(ag5648_i2c_device); i++) + { + ret = platform_device_register(&ag5648_i2c_device[i]); + if (ret) { + printk(KERN_WARNING "Fail to create i2c device %d\n", i); + goto error_ag5648_i2c_device; + } + } + + if (ret) + goto error_ag5648_swpld_mux; + return 0; + +error_ag5648_i2c_device: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&ag5648_i2c_device[i]); + } + i = ARRAY_SIZE(ag5648_swpld_mux); +error_ag5648_swpld_mux: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&ag5648_swpld_mux[0]); + } + platform_device_unregister(&ag5648_cpld); +error_ag5648_cpld: + platform_driver_unregister(&i2c_device_driver); +error_i2c_device_driver: + platform_driver_unregister(&swpld_mux_driver); +error_swpld_mux_driver: + platform_driver_unregister(&cpld_driver); +error_cpld_driver: + return ret; +} + +static void __exit delta_ag5648_platform_exit(void) +{ + int i = 0; + + for ( i = 0; i < ARRAY_SIZE(ag5648_i2c_device); i++ ) { + platform_device_unregister(&ag5648_i2c_device[i]); + } + + for (i = 0; i < ARRAY_SIZE(ag5648_swpld_mux); i++) { + platform_device_unregister(&ag5648_swpld_mux[i]); + } + + platform_device_unregister(&ag5648_cpld); + platform_driver_unregister(&i2c_device_driver); + platform_driver_unregister(&cpld_driver); + platform_driver_unregister(&swpld_mux_driver); + i2c_unregister_device(i2c_client_9548); +} + +module_init(delta_ag5648_platform_init); +module_exit(delta_ag5648_platform_exit); + +MODULE_DESCRIPTION("DNI ag5648 Platform Support"); +MODULE_AUTHOR("Neal Tai "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-delta/ag5648/modules/dni_ag5648_psu.c b/platform/broadcom/sonic-platform-modules-delta/ag5648/modules/dni_ag5648_psu.c new file mode 100644 index 00000000000..d7e8a3bf8e7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag5648/modules/dni_ag5648_psu.c @@ -0,0 +1,552 @@ +/* + * An hwmon driver for delta AG5648 PSU + * dps_800ab_16_d.c - Support for DPS-800AB-16 D Power Supply Module + * + * Copyright (C) 2016 Delta Network Technology Corporation + * + * DNI + * + * Based on ym2651y.c + * Based on ad7414.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_FAN_DUTY_CYCLE 100 +#define SWPLD_REG 0x31 +#define SWPLD_PSU_MUX_REG 0x21 +#define SELECT_PSU1_EEPROM 0x00 +#define SELECT_PSU2_EEPROM 0x20 + +u8 psu_member_data = 0x00; + +/* Address scanned */ +static const unsigned short normal_i2c[] = { 0x59, 0x58, I2C_CLIENT_END }; + +/* This is additional data */ +struct dps_800ab_16_d_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; + unsigned long last_updated; /* In jiffies */ + + /* Registers value */ + u8 vout_mode; + u16 in1_input; + u16 in2_input; + u16 curr1_input; + u16 curr2_input; + u16 power1_input; + u16 power2_input; + u16 temp_input[2]; + u8 fan_target; + u16 fan_duty_cycle_input[2]; + u16 fan_speed_input[2]; + u8 mfr_model[14]; + u8 mfr_serial[16]; +}; + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask); +static ssize_t set_fan_duty_cycle_input(struct device *dev, struct device_attribute \ + *dev_attr, const char *buf, size_t count); +static ssize_t for_linear_data(struct device *dev, struct device_attribute \ + *dev_attr, char *buf); +static ssize_t for_fan_target(struct device *dev, struct device_attribute \ + *dev_attr, char *buf); +static ssize_t for_vout_data(struct device *dev, struct device_attribute \ + *dev_attr, char *buf); +static int dps_800ab_16_d_read_byte(struct i2c_client *client, u8 reg); +static int dps_800ab_16_d_read_word(struct i2c_client *client, u8 reg); +static int dps_800ab_16_d_write_word(struct i2c_client *client, u8 reg, \ + u16 value); +static int dps_800ab_16_d_read_block(struct i2c_client *client, u8 command, \ + u8 *data, int data_len); +static struct dps_800ab_16_d_data *dps_800ab_16_d_update_device( \ + struct device *dev); +static ssize_t for_ascii(struct device *dev, struct device_attribute \ + *dev_attr, char *buf); +/* +static ssize_t set_w_member_data(struct device *dev, struct device_attribute \ + *dev_att, const char *buf, size_t count); +static ssize_t for_r_member_data(struct device *dev, struct device_attribute \ + *dev_attr, char *buf); +*/ +enum dps_800ab_16_d_sysfs_attributes { + PSU_V_IN, + PSU_V_OUT, + PSU_I_IN, + PSU_I_OUT, + PSU_P_IN, + PSU_P_OUT, + PSU_TEMP1_INPUT, + PSU_FAN1_FAULT, + PSU_FAN1_DUTY_CYCLE, + PSU_FAN1_SPEED, + PSU_MFR_MODEL, + PSU_MFR_SERIAL, + PSU_SELECT_MEMBER, +}; + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static ssize_t set_fan_duty_cycle_input(struct device *dev, struct device_attribute \ + *dev_attr, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct i2c_client *client = to_i2c_client(dev); + struct dps_800ab_16_d_data *data = i2c_get_clientdata(client); + int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; + long speed; + int error; + + error = kstrtol(buf, 10, &speed); + if (error) + return error; + + if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) + return -EINVAL; + + /* Select SWPLD PSU offset */ + + mutex_lock(&data->update_lock); + data->fan_duty_cycle_input[nr] = speed; + dps_800ab_16_d_write_word(client, 0x3B + nr, data->fan_duty_cycle_input[nr]); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t for_linear_data(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct dps_800ab_16_d_data *data = dps_800ab_16_d_update_device(dev); + + u16 value = 0; + int exponent, mantissa; + int multiplier = 1000; + + switch (attr->index) { + case PSU_V_IN: + value = data->in1_input; + break; + case PSU_I_IN: + value = data->curr1_input; + break; + case PSU_I_OUT: + value = data->curr2_input; + break; + case PSU_P_IN: + value = data->power1_input; + multiplier = 1000*1000; + break; + case PSU_P_OUT: + value = data->power2_input; + multiplier = 1000*1000; + break; + case PSU_TEMP1_INPUT: + value = data->temp_input[0]; + break; + case PSU_FAN1_DUTY_CYCLE: + multiplier = 1; + value = data->fan_duty_cycle_input[0]; + break; + case PSU_FAN1_SPEED: + multiplier = 1; + value = data->fan_speed_input[0]; + break; + default: + break; + } + + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + + return (exponent >= 0) ? sprintf(buf, "%d\n", \ + (mantissa << exponent) * multiplier) : \ + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t for_fan_target(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct dps_800ab_16_d_data *data = dps_800ab_16_d_update_device(dev); + + u8 shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; + + return sprintf(buf, "%d\n", data->fan_target >> shift); +} + +static ssize_t for_vout_data(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + struct dps_800ab_16_d_data *data = dps_800ab_16_d_update_device(dev); + int exponent, mantissa; + int multiplier = 1000; + + exponent = two_complement_to_int(data->vout_mode, 5, 0x1f); + mantissa = data->in2_input; + + return (exponent > 0) ? sprintf(buf, "%d\n", \ + (mantissa * multiplier) / (1 << exponent)): \ + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + +} + +static ssize_t for_ascii(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct dps_800ab_16_d_data *data = dps_800ab_16_d_update_device(dev); + u8 *ptr = NULL; + + if (!data->valid) + return 0; + + switch (attr->index) { + case PSU_MFR_MODEL: + ptr = data->mfr_model + 1; + break; + case PSU_MFR_SERIAL: + ptr = data->mfr_serial + 1; + break; + default: + return 0; + } + return sprintf(buf, "%s\n", ptr); +} +static int dps_800ab_16_d_read_byte(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int dps_800ab_16_d_read_word(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_word_data(client, reg); +} + +static int dps_800ab_16_d_write_word(struct i2c_client *client, u8 reg, \ + u16 value) +{ + union i2c_smbus_data data; + data.word = value; + return i2c_smbus_xfer(client->adapter, client->addr, + client->flags |= I2C_CLIENT_PEC, + I2C_SMBUS_WRITE, reg, + I2C_SMBUS_WORD_DATA, &data); + +} + +static int dps_800ab_16_d_read_block(struct i2c_client *client, u8 command, \ + u8 *data, int data_len) +{ + int result = i2c_smbus_read_i2c_block_data(client, command, data_len, + data); + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + result = 0; +abort: + return result; + +} + +struct reg_data_byte { + u8 reg; + u8 *value; +}; + +struct reg_data_word { + u8 reg; + u16 *value; +}; + +static struct dps_800ab_16_d_data *dps_800ab_16_d_update_device( \ + struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct dps_800ab_16_d_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + /* Select SWPLD PSU offset */ + + if (time_after(jiffies, data->last_updated)) { + int i, status; + u8 command; + struct reg_data_byte regs_byte[] = { + {0x20, &data->vout_mode}, + {0x81, &data->fan_target} + }; + struct reg_data_word regs_word[] = { + {0x88, &data->in1_input}, + {0x8b, &data->in2_input}, + {0x89, &data->curr1_input}, + {0x8c, &data->curr2_input}, + {0x97, &data->power1_input}, + {0x96, &data->power2_input}, + {0x8d, &(data->temp_input[0])}, + {0x8e, &(data->temp_input[1])}, + {0x3b, &(data->fan_duty_cycle_input[0])}, + {0x90, &(data->fan_speed_input[0])}, + }; + + dev_dbg(&client->dev, "start data update\n"); + /* one milliseconds from now */ + data->last_updated = jiffies + HZ / 1000; + + data->in1_input = 0; + data->in2_input = 0; + data->curr1_input = 0; + data->curr2_input = 0; + data->power1_input = 0; + data->power2_input = 0; + data->temp_input[0] = 0; + data->temp_input[1] = 0; + data->fan_duty_cycle_input[0] = 0; + data->fan_speed_input[0] = 0; + + data->mfr_model[0] = '\0'; + data->mfr_serial[0] = '\0'; + + command = 0x9a; /* PSU mfr_model */ + status = dps_800ab_16_d_read_block(client, command, + data->mfr_model, ARRAY_SIZE(data->mfr_model) - 1); + data->mfr_model[ARRAY_SIZE(data->mfr_model) - 1] = '\0'; + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, + status); + } + + command = 0x9e; /* PSU mfr_serial */ + status = dps_800ab_16_d_read_block(client, command, + data->mfr_serial, ARRAY_SIZE(data->mfr_serial) - 1); + data->mfr_serial[ARRAY_SIZE(data->mfr_serial) - 1] = '\0'; + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, + status); + } + + for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { + status = dps_800ab_16_d_read_byte(client, + regs_byte[i].reg); + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_byte[i].reg, status); + } else { + *(regs_byte[i].value) = status; + } + } + + for (i = 0; i < ARRAY_SIZE(regs_word); i++) { + status = dps_800ab_16_d_read_word(client, + regs_word[i].reg); + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_word[i].reg, status); + } else { + *(regs_word[i].value) = status; + } + } +/* + command = 0x9a; / PSU mfr_model / + status = dps_800ab_16_d_read_block(client, command, + data->mfr_model, ARRAY_SIZE(data->mfr_model) - 1); + data->mfr_model[ARRAY_SIZE(data->mfr_model) - 1] = '\0'; + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, + status); + } + + command = 0x9e; / PSU mfr_serial / + status = dps_800ab_16_d_read_block(client, command, + data->mfr_serial, ARRAY_SIZE(data->mfr_serial) - 1); + data->mfr_serial[ARRAY_SIZE(data->mfr_serial) - 1] = '\0'; + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, + status); + } + */ + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; + +} + +/* sysfs attributes for hwmon */ +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, for_linear_data, NULL, PSU_V_IN); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, for_vout_data, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, for_linear_data, NULL, PSU_I_IN); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, for_linear_data, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, for_linear_data, NULL, PSU_P_IN); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, for_linear_data, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(temp1_input, \ + S_IRUGO, for_linear_data, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(fan1_target, \ + S_IRUGO, for_fan_target, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(fan1_set_percentage, S_IWUSR | S_IRUGO, \ + for_linear_data, set_fan_duty_cycle_input, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(fan1_input, \ + S_IRUGO, for_linear_data, NULL, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(psu_mfr_model, \ + S_IRUGO, for_ascii, NULL, PSU_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu_mfr_serial, \ + S_IRUGO, for_ascii, NULL, PSU_MFR_SERIAL); +/* +static SENSOR_DEVICE_ATTR(psu_select_member, S_IWUGO | S_IRUGO, \ + for_r_member_data, set_w_member_data, PSU_SELECT_MEMBER); +*/ +static struct attribute *dps_800ab_16_d_attributes[] = { + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_fan1_target.dev_attr.attr, + &sensor_dev_attr_fan1_set_percentage.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_psu_mfr_model.dev_attr.attr, + &sensor_dev_attr_psu_mfr_serial.dev_attr.attr, + //&sensor_dev_attr_psu_select_member.dev_attr.attr, + NULL +}; + +static const struct attribute_group dps_800ab_16_d_group = { + .attrs = dps_800ab_16_d_attributes, +}; + +static int dps_800ab_16_d_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct dps_800ab_16_d_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(*data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "new chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &dps_800ab_16_d_group); + if (status) + goto exit_sysfs_create_group; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_hwmon_device_register; + } + + return 0; + +exit_hwmon_device_register: + sysfs_remove_group(&client->dev.kobj, &dps_800ab_16_d_group); +exit_sysfs_create_group: + kfree(data); +exit: + return status; +} + +static int dps_800ab_16_d_remove(struct i2c_client *client) +{ + struct dps_800ab_16_d_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &dps_800ab_16_d_group); + kfree(data); + + return 0; +} + +enum id_name { + dni_ag5648_psu, + dps_800ab_16_d +}; + +static const struct i2c_device_id dps_800ab_16_d_id[] = { + { "dni_ag5648_psu", dni_ag5648_psu }, + { "dps_800ab_16_d", dps_800ab_16_d }, + {} +}; +MODULE_DEVICE_TABLE(i2c, dps_800ab_16_d_id); + +/* This is the driver that will be inserted */ +static struct i2c_driver dps_800ab_16_d_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "dps_800ab_16_d", + }, + .probe = dps_800ab_16_d_probe, + .remove = dps_800ab_16_d_remove, + .id_table = dps_800ab_16_d_id, + .address_list = normal_i2c, +}; + +static int __init dps_800ab_16_d_init(void) +{ + return i2c_add_driver(&dps_800ab_16_d_driver); +} + +static void __exit dps_800ab_16_d_exit(void) +{ + i2c_del_driver(&dps_800ab_16_d_driver); +} + + +MODULE_AUTHOR("Aries Lin "); +MODULE_DESCRIPTION("DPS_800AB_16_D Driver"); +MODULE_LICENSE("GPL"); + +module_init(dps_800ab_16_d_init); +module_exit(dps_800ab_16_d_exit); diff --git a/platform/broadcom/sonic-platform-modules-delta/ag5648/modules/dni_emc2305.c b/platform/broadcom/sonic-platform-modules-delta/ag5648/modules/dni_emc2305.c new file mode 120000 index 00000000000..e8f7ae6b3f4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag5648/modules/dni_emc2305.c @@ -0,0 +1 @@ +../../common/modules/dni_emc2305.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-delta/ag5648/scripts/ag5648_platform_init.sh b/platform/broadcom/sonic-platform-modules-delta/ag5648/scripts/ag5648_platform_init.sh new file mode 100755 index 00000000000..753649f01ab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag5648/scripts/ag5648_platform_init.sh @@ -0,0 +1,13 @@ +#!/bin/bash + +#platform init script for Delta ag5648 + +#fan speed monitor start +/usr/share/sonic/device/x86_64-delta_ag5648-r0/fancontrol.service /usr/share/sonic/device/x86_64-delta_ag5648-r0/fancontrol & + +#led control +/usr/local/bin/led_control & + + +exit 0 + diff --git a/platform/broadcom/sonic-platform-modules-delta/ag5648/scripts/led_control b/platform/broadcom/sonic-platform-modules-delta/ag5648/scripts/led_control new file mode 100755 index 00000000000..bc1417f9ba5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag5648/scripts/led_control @@ -0,0 +1,221 @@ +#!/bin/bash + +FAN1_EEPROM="-y 3 0x51 0x0a" +FAN2_EEPROM="-y 3 0x52 0x0a" +FAN3_EEPROM="-y 3 0x53 0x0a" +FAN4_EEPROM="-y 3 0x54 0x0a" +LED_CONTROL="/sys/devices/platform/delta-ag5648-cpld.0/led_control" + +FAN1_REAR_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/3-004d/fan1_input" +FAN2_REAR_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/3-004d/fan2_input" +FAN3_REAR_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/3-004d/fan3_input" +FAN4_REAR_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/3-004d/fan4_input" + +FAN1_FRONT_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-5/5-004d/fan1_input" +FAN2_FRONT_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-5/5-004d/fan2_input" +FAN3_FRONT_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-5/5-004d/fan3_input" +FAN4_FRONT_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-5/5-004d/fan4_input" + +PSU1_EEPROM="-y 6 0x51 0x00" +PSU2_EEPROM="-y 6 0x50 0x00" +PSU1_FAN_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-6/6-0059/fan1_input" +PSU2_FAN_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-6/6-0058/fan1_input" + +catfaneeprom(){ + fan_eeprom_num=0 + fan1_eeprom_num=0 + i2cget $FAN1_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + fan1_eeprom_num=$((fan1_eeprom_num+1)) + elif [ "`echo $?`" -eq "2" ]; then + fan1_eeprom_num=$((fan1_eeprom_num)) + fi + + fan2_eeprom_num=0 + i2cget $FAN2_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + fan2_eeprom_num=$((fan2_eeprom_num+1)) + elif [ "`echo $?`" -eq "2" ]; then + fan2_eeprom_num=$((fan2_eeprom_num)) + fi + + fan3_eeprom_num=0 + i2cget $FAN3_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + fan3_eeprom_num=$((fan3_eeprom_num+1)) + elif [ "`echo $?`" -eq "2" ]; then + fan3_eeprom_num=$((fan3_eeprom_num)) + fi + + fan4_eeprom_num=0 + i2cget $FAN4_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + fan4_eeprom_num=$((fan4_eeprom_num+1)) + elif [ "`echo $?`" -eq "2" ]; then + fan4_eeprom_num=$((fan4_eeprom_num)) + fi + + fan_eeprom_num=$((fan1_eeprom_num+fan2_eeprom_num+fan3_eeprom_num+fan4_eeprom_num)) +} + +catfanspeed(){ + fan_rpm_normal_num=0 + fan1_rpm_normal_num=0 + fan1_front_rpm=`cat $FAN1_FRONT_RPM` + fan1_rear_rpm=`cat $FAN1_REAR_RPM` + if [ "${fan1_front_rpm}" -ne "960" ] && [ "${fan1_rear_rpm}" -ne "960" ] && [ "${fan1_front_rpm}" -ne "0" ] && [ "${fan1_rear_rpm}" -ne "0" ]; then + fan1_rpm_normal_num=$((fan1_rpm_normal_num+1)) + elif [ "${fan1_front_rpm}" -eq "960" ] || [ "${fan1_rear_rpm}" -eq "960" ] || [ "${fan1_front_rpm}" -eq "0" ] || [ "${fan1_rear_rpm}" -eq "0" ]; then + fan1_rpm_normal_num=$((fan1_rpm_normal_num)) + fi + + fan2_rpm_normal_num=0 + fan2_front_rpm=`cat $FAN2_FRONT_RPM` + fan2_rear_rpm=`cat $FAN2_REAR_RPM` + if [ "${fan2_front_rpm}" -ne "960" ] && [ "${fan2_rear_rpm}" -ne "960" ] && [ "${fan2_front_rpm}" -ne "0" ] && [ "${fan2_rear_rpm}" -ne "0" ]; then + fan2_rpm_normal_num=$((fan2_rpm_normal_num+1)) + elif [ "${fan2_front_rpm}" -eq "960" ] || [ "${fan2_rear_rpm}" -eq "960" ] || [ "${fan2_front_rpm}" -eq "0" ] || [ "${fan2_rear_rpm}" -eq "0" ]; then + fan2_rpm_normal_num=$((fan2_rpm_normal_num)) + fi + + fan3_rpm_normal_num=0 + fan3_front_rpm=`cat $FAN3_FRONT_RPM` + fan3_rear_rpm=`cat $FAN3_REAR_RPM` + if [ "${fan3_front_rpm}" -ne "960" ] && [ "${fan3_rear_rpm}" -ne "960" ] && [ "${fan3_front_rpm}" -ne "0" ] && [ "${fan3_rear_rpm}" -ne "0" ]; then + fan3_rpm_normal_num=$((fan3_rpm_normal_num+1)) + elif [ "${fan3_front_rpm}" -eq "960" ] || [ "${fan3_rear_rpm}" -eq "960" ] || [ "${fan3_front_rpm}" -eq "0" ] || [ "${fan3_rear_rpm}" -eq "0" ]; then + fan3_rpm_normal_num=$((fan3_rpm_normal_num)) + fi + + fan4_rpm_normal_num=0 + fan4_front_rpm=`cat $FAN4_FRONT_RPM` + fan4_rear_rpm=`cat $FAN4_REAR_RPM` + if [ "${fan4_front_rpm}" -ne "960" ] && [ "${fan4_rear_rpm}" -ne "960" ] && [ "${fan4_front_rpm}" -ne "0" ] && [ "${fan4_rear_rpm}" -ne "0" ]; then + fan4_rpm_normal_num=$((fan4_rpm_normal_num+1)) + elif [ "${fan4_front_rpm}" -eq "960" ] || [ "${fan4_rear_rpm}" -eq "960" ] || [ "${fan4_front_rpm}" -eq "0" ] || [ "${fan4_rear_rpm}" -eq "0" ]; then + fan4_rpm_normal_num=$((fan4_rpm_normal_num)) + fi + + fan_rpm_normal_num=$((fan1_rpm_normal_num+fan2_rpm_normal_num+fan3_rpm_normal_num+fan4_rpm_normal_num)) + +} + +catpsueeprom(){ + psu1_eeprom_num=0 + i2cget $PSU1_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + psu1_eeprom_num=$((psu1_eeprom_num+1)) + elif [ "`echo $?`" -eq "2" ]; then + psu1_eeprom_num=$((psu1_eeprom_num)) + fi + + psu2_eeprom_num=0 + i2cget $PSU2_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + psu2_eeprom_num=$((psu2_eeprom_num+1)) + elif [ "`echo $?`" -eq "2" ]; then + psu2_eeprom_num=$((psu2_eeprom_num)) + fi +} + +catpsufanspeed(){ + + psu1_rpm_normal_num=0 + psu1_rpm=`cat $PSU1_FAN_RPM` + + if [ "${psu1_rpm}" -ne "960" ] && [ "${psu1_rpm}" -ne "0" ]; then + psu1_rpm_normal_num=$((psu1_rpm_normal_num+1)) + elif [ "${psu1_rpm}" -eq "960" ] || [ "${psu1_rpm}" -eq "0" ]; then + psu1_rpm_normal_num=$((psu1_rpm_normal_num)) + fi + + psu2_rpm_normal_num=0 + psu2_rpm=`cat $PSU2_FAN_RPM` + + if [ "${psu2_rpm}" -ne "960" ] && [ "${psu2_rpm}" -ne "0" ]; then + psu2_rpm_normal_num=$((psu2_rpm_normal_num+1)) + elif [ "${psu2_rpm}" -eq "960" ] || [ "${psu2_rpm}" -eq "0" ]; then + psu2_rpm_normal_num=$((psu2_rpm_normal_num)) + fi + +} + +setfanled(){ + if [ "${fan_eeprom_num}" -eq "4" ] && [ "${fan_rpm_normal_num}" -eq "4" ]; then + echo "fan_green" > $LED_CONTROL + elif [ "${fan_eeprom_num}" -lt "4" ] && [ "${fan_rpm_normal_num}" -eq "4" ]; then + echo "fan_Amber" > $LED_CONTROL + elif [ "${psu1_eeprom_num}" -eq "0" ] && [ "${psu2_eeprom_num}" -eq "0" ]; then + echo "fan_off" > $LED_CONTROL + else + echo "fan_Blinking_yellow" > $LED_CONTROL + fi +} + +setpsuled(){ + if [ "${psu1_rpm_normal_num}" -eq "1" ] && [ "${psu2_rpm_normal_num}" -eq "1" ]; then + echo "pwr_green" > $LED_CONTROL + elif [ "${psu1_eeprom_num}" -eq "1" ] && [ "${psu2_eeprom_num}" -eq "1" ]; then + echo "pwr_Blinking_Amber" > $LED_CONTROL + elif [ "${psu1_eeprom_num}" -eq "0" ] || [ "${psu2_eeprom_num}" -eq "0" ]; then + echo "pwr_Amber" > $LED_CONTROL + else + echo "pwr_off" > $LED_CONTROL + fi + +} + +setfantrayled(){ + if [ "${fan1_rpm_normal_num}" -eq "1" ]; then + echo "fan1_green" > $LED_CONTROL + elif [ "${fan1_eeprom_num}" -eq "1" ]; then + echo "fan1_Amber" > $LED_CONTROL + else + echo "fan1_off" > $LED_CONTROL + fi + + if [ "${fan2_rpm_normal_num}" -eq "1" ]; then + echo "fan2_green" > $LED_CONTROL + elif [ "${fan2_eeprom_num}" -eq "1" ]; then + echo "fan2_Amber" > $LED_CONTROL + else + echo "fan2_off" > $LED_CONTROL + fi + + if [ "${fan3_rpm_normal_num}" -eq "1" ]; then + echo "fan3_green" > $LED_CONTROL + elif [ "${fan3_eeprom_num}" -eq "1" ]; then + echo "fan3_Amber" > $LED_CONTROL + else + echo "fan3_off" > $LED_CONTROL + fi + + if [ "${fan4_rpm_normal_num}" -eq "1" ]; then + echo "fan4_green" > $LED_CONTROL + elif [ "${fan4_eeprom_num}" -eq "1" ]; then + echo "fan4_Amber" > $LED_CONTROL + else + echo "fan4_off" > $LED_CONTROL + fi + +} + +platformstatus(){ + + echo "sys_green" > $LED_CONTROL + catfaneeprom + catfanspeed + setfanled + setfantrayled + + catpsueeprom + catpsufanspeed + setpsuled +} + +while true +do + platformstatus + sleep 5 +done + diff --git a/platform/broadcom/sonic-platform-modules-delta/ag5648/sensors.conf b/platform/broadcom/sonic-platform-modules-delta/ag5648/sensors.conf new file mode 100644 index 00000000000..c69567997a2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag5648/sensors.conf @@ -0,0 +1,94 @@ +# libsensors configuration file for AG5648 +# ------------------------------------------------ +# + +bus "i2c-2" "i2c-1-mux (chan_id 0)" +bus "i2c-3" "i2c-1-mux (chan_id 1)" +bus "i2c-4" "i2c-1-mux (chan_id 2)" +bus "i2c-5" "i2c-1-mux (chan_id 3)" +bus "i2c-6" "i2c-1-mux (chan_id 4)" +bus "i2c-7" "i2c-1-mux (chan_id 5)" + +# tmp75-i2c-2-4d board sensor near Left of front vents. +# tmp75-i2c-3-49 board sensor near MAC. +# tmp75-i2c-3-4b board sensor near Middle of front vents. +# tmp75-i2c-3-4c board sensor near Right of front vents. +# tmp75-i2c-3-4e board sensor near DC fan. +# tmp75-i2c-3-4f board sensor near CPU. + +chip "tmp75-i2c-*-4d" + label temp1 "board sensor near Left of front vents" + set temp1_max 60 + set temp1_max_hyst 55 + +chip "tmp75-i2c-*-49" + label temp1 "board sensor near MAC" + set temp1_max 85 + set temp1_max_hyst 80 + +chip "tmp75-i2c-*-4b" + label temp1 "board sensor near Middle of front vents" + set temp1_max 70 + set temp1_max_hyst 65 + +chip "tmp75-i2c-*-4c" + label temp1 "board sensor near Right of front vents" + set temp1_max 65 + set temp1_max_hyst 60 + +chip "tmp75-i2c-*-4e" + label temp1 "board sensor near DC fan" + set temp1_max 60 + set temp1_max_hyst 55 + +chip "tmp75-i2c-*-4f" + label temp1 "board sensor near CPU" + set temp1_max 80 + set temp1_max_hyst 75 + +chip "emc2305-i2c-3-4d" + label fan1 "FANTRAY 1 REAR" + label fan2 "FANTRAY 2 REAR" + label fan3 "FANTRAY 3 REAR" + label fan4 "FANTRAY 4 REAR" + label fan5 "FANTRAY 5 REAR" + +chip "emc2305-i2c-5-4d" + label fan1 "FANTRAY 1 FRONT" + label fan2 "FANTRAY 2 FRONT" + label fan3 "FANTRAY 3 FRONT" + label fan4 "FANTRAY 4 FRONT" + label fan5 "FANTRAY 5 FRONT" + +chip "ltc4215-i2c-*-40" + label in1 "PSU Hot-Swap voltage 1" + label in2 "PSU Hot-Swap voltage 2" + label power1 "PSU Hot-Swap power" + label curr1 "PSU Hot-Swap current" + +chip "ltc4215-i2c-*-42" + label in1 "PSU Hot-Swap voltage 1" + label in2 "PSU Hot-Swap voltage 2" + label power1 "PSU Hot-Swap power" + label curr1 "PSU Hot-Swap current" + +chip "dni_ag5648_psu-i2c-*-59" + label in1 "PSU voltage 1" + label in2 "PSU voltage 2" + label fan1 "PSU fan" + label temp1 "PSU temperature" + label power1 "PSU power1" + label power2 "PSU power2" + label curr1 "PSU current1" + label curr2 "PSU current2" + +chip "dni_ag5648_psu-i2c-*-58" + label in1 "PSU voltage 1" + label in2 "PSU voltage 2" + label fan1 "PSU fan" + label temp1 "PSU temperature" + label power1 "PSU power1" + label power2 "PSU power2" + label curr1 "PSU current1" + label curr2 "PSU current2" + diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/cfg/ag9032v1-modules.conf b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/cfg/ag9032v1-modules.conf new file mode 100644 index 00000000000..552b4103ed0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/cfg/ag9032v1-modules.conf @@ -0,0 +1,13 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus +i2c-mux-gpio +i2c-mux-pca954x diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/Makefile b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/Makefile new file mode 100644 index 00000000000..d77d3b78408 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/Makefile @@ -0,0 +1 @@ +obj-m := dni_ag9032v1_psu.o dni_emc2305.o delta_ag9032v1_platform.o delta_ag9032v1_cpupld.o diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/delta_ag9032v1_cpupld.c b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/delta_ag9032v1_cpupld.c new file mode 100644 index 00000000000..22f997e71fa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/delta_ag9032v1_cpupld.c @@ -0,0 +1,387 @@ +#include +#include +#include +#include +#include +#include + +#define CPUPLD_REG 0x31 + +enum cpld_type { + cpld, +}; + +struct platform_data { + int reg_addr; + struct i2c_client *client; +}; + +enum{ + BUS0 = 0, + BUS1, + BUS2, + BUS3, + BUS4, + BUS5, + BUS6, + BUS7, +}; + +enum cpld_attributes { + CPLD_VER, + CPU_BOARD_VER, + CPU_ID, + CPLD_RST, + MB_RST, + I2C_SW_RST, + MB_PWR, + PSU_FAN_INT, + SPI_WP_GBE, + EEPROM_WP, +}; + +static void device_release(struct device *dev) +{ + return; +} + +/*---------------- CPUPLD - start ------------- */ +static struct platform_data ag9032v1_cpld_platform_data[] = { + [cpld] = { + .reg_addr = CPUPLD_REG, + }, +}; + +static struct platform_device ag9032v1_cpld = { + .name = "delta-ag9032v1-cpupld", + .id = 0, + .dev = { + .platform_data = ag9032v1_cpld_platform_data, + .release = device_release + }, +}; +static unsigned char cpld_reg_addr; +static ssize_t get_cpld_reg_value(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + struct platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[cpld].client, cpld_reg_addr); + + return sprintf(buf, "0x%02x\n", ret); +} + +static ssize_t set_cpld_reg_value(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned long data; + int err; + struct platform_data *pdata = dev->platform_data; + err = kstrtoul(buf, 0, &data); + if (err){ + return err; + } + + if (data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + return count; + } + + i2c_smbus_write_byte_data(pdata[cpld].client, cpld_reg_addr, data); + + return count; +} + +static ssize_t get_cpld_reg_addr(struct device *dev, struct device_attribute *devattr, char *buf) +{ + + return sprintf(buf, "0x%02x\n", cpld_reg_addr); +} + +static ssize_t set_cpld_reg_addr(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned long data; + int err; + + err = kstrtoul(buf, 0, &data); + if (err){ + return err; + } + if (data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + return count; + } + cpld_reg_addr = data; + + return count; +} + +static ssize_t get_cpld_data(struct device *dev, struct device_attribute *dev_attr, char *buf) +{ + int ret; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct platform_data *pdata = dev->platform_data; + unsigned char reg; + int mask; + int value; + char note[180]; + switch (attr->index) { + case CPLD_VER: + reg = 0x01; + value = i2c_smbus_read_byte_data(pdata[cpld].client, reg); + sprintf(note, "\nCPLD Version, controlled by CPLD editor.\n"); + return sprintf(buf, "0x%02x%s", value, note); + break; + case CPU_BOARD_VER: + reg = 0x02; + ret = i2c_smbus_read_byte_data(pdata[cpld].client, reg); + value = ret >> 4; + sprintf(note, "\n“0x00”: proto A1\n“0x01”: proto A2\n“0x02”: proto B\n"); + return sprintf(buf, "0x%02x%s", value, note); + break; + case CPU_ID: + reg = 0x02; + ret = i2c_smbus_read_byte_data(pdata[cpld].client, reg); + value = ret & 0x0F; + sprintf(note, "\n“0x00”: P2041 ECC\n“0x01”: Rangeley ECC\n“0x02”: T2080 ECC\n"); + return sprintf(buf, "0x%02x%s", value, note); + break; + case CPLD_RST: + reg = 0x05; + mask = 7; + sprintf(note, "\n“1” = Normal operation\n“0” = Reset\n"); + break; + case MB_RST: + reg = 0x05; + mask = 1; + sprintf(note, "\n“1” = Normal operation\n“0” = Reset\n"); + break; + case I2C_SW_RST: + reg = 0x05; + mask = 0; + sprintf(note, "\n“1” = Normal operation\n“0” = Reset\n"); + break; + case MB_PWR: + reg = 0x08; + mask = 4; + sprintf(note, "\n“1” = Power rail is good\n“0” = Power rail is failed\n"); + break; + case PSU_FAN_INT: + reg = 0x0A; + mask = 0; + sprintf(note, "\n“1” = Interrupt doesn’t occur\n“0” = Interrupt occurs\n"); + break; + case SPI_WP_GBE: + reg = 0x10; + mask = 3; + sprintf(note, "\n“1” = overrides the lock-down function enabling blocks to be erased or programmed using software commands.\n“0” = enables the lock-down mechanism.\n"); + break; + case EEPROM_WP: + reg = 0x10; + mask = 2; + sprintf(note, "\n“1” = overrides the lock-down function enabling blocks to be erased or programmed using software commands.\n“0” = enables the lock-down mechanism.\n"); + break; + default: + return sprintf(buf, "%d not found", attr->index); + } + ret = i2c_smbus_read_byte_data(pdata[cpld].client, reg); + value = (ret & (1 << mask)) >> mask; + return sprintf(buf, "%d%s", value, note); +} + +static ssize_t set_cpld_data(struct device *dev, struct device_attribute *dev_attr, + const char *buf, size_t count) +{ + int mask; + int err; + int ret; + unsigned long data; + unsigned char reg; + unsigned char mask_shift; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct platform_data *pdata = dev->platform_data; + err = kstrtoul(buf, 0, &data); + if (err){ + return err; + } + + if (data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + return count; + } + switch (attr->index) { + case CPLD_RST: + reg = 0x05; + mask = 7; + break; + case MB_RST: + reg = 0x05; + mask = 1; + break; + case I2C_SW_RST: + reg = 0x05; + mask = 0; + break; + case SPI_WP_GBE: + reg = 0x10; + mask = 3; + break; + case EEPROM_WP: + reg = 0x10; + mask = 2; + break; + default: + return count; + } + + ret = i2c_smbus_read_byte_data(pdata[cpld].client, reg); + mask_shift = 1 << mask; + data = (ret & ~mask_shift) | (data << mask); + i2c_smbus_write_byte_data(pdata[cpld].client, cpld_reg_addr, data); + + return count; +} + +static DEVICE_ATTR(cpld_reg_value, S_IRUGO | S_IWUSR, get_cpld_reg_value, set_cpld_reg_value); +static DEVICE_ATTR(cpld_reg_addr, S_IRUGO | S_IWUSR, get_cpld_reg_addr, set_cpld_reg_addr); + +static SENSOR_DEVICE_ATTR(cpld_ver, S_IRUGO, get_cpld_data, NULL, CPLD_VER); +static SENSOR_DEVICE_ATTR(cpu_board_ver, S_IRUGO, get_cpld_data, NULL, CPU_BOARD_VER); +static SENSOR_DEVICE_ATTR(cpu_id, S_IRUGO, get_cpld_data, NULL, CPU_ID); +static SENSOR_DEVICE_ATTR(cpld_rst, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, CPLD_RST); +static SENSOR_DEVICE_ATTR(mb_rst, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, MB_RST); +static SENSOR_DEVICE_ATTR(i2c_sw_rst, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, I2C_SW_RST); +static SENSOR_DEVICE_ATTR(mb_pwr, S_IRUGO, get_cpld_data, NULL, MB_PWR); +static SENSOR_DEVICE_ATTR(psu_fan_int, S_IRUGO, get_cpld_data, NULL, PSU_FAN_INT); +static SENSOR_DEVICE_ATTR(spi_wp_gbe, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, SPI_WP_GBE); +static SENSOR_DEVICE_ATTR(eeprom_wp, S_IRUGO | S_IWUSR, get_cpld_data, set_cpld_data, EEPROM_WP); + +static struct attribute *ag9032v1_cpld_attrs[] = { + &dev_attr_cpld_reg_value.attr, + &dev_attr_cpld_reg_addr.attr, + &sensor_dev_attr_cpld_ver.dev_attr.attr, + &sensor_dev_attr_cpu_board_ver.dev_attr.attr, + &sensor_dev_attr_cpu_id.dev_attr.attr, + &sensor_dev_attr_cpld_rst.dev_attr.attr, + &sensor_dev_attr_mb_rst.dev_attr.attr, + &sensor_dev_attr_i2c_sw_rst.dev_attr.attr, + &sensor_dev_attr_mb_pwr.dev_attr.attr, + &sensor_dev_attr_psu_fan_int.dev_attr.attr, + &sensor_dev_attr_spi_wp_gbe.dev_attr.attr, + &sensor_dev_attr_eeprom_wp.dev_attr.attr, + NULL, +}; + +static struct attribute_group ag9032v1_cpld_attr_group = { + .attrs = ag9032v1_cpld_attrs, +}; + +static int __init cpld_probe(struct platform_device *pdev) +{ + struct platform_data *pdata; + struct i2c_adapter *parent; + int ret; + int retval; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "CPUPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(BUS2); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n",BUS2); + return -ENODEV; + } + + pdata[cpld].client = i2c_new_dummy(parent, pdata[cpld].reg_addr); + if (!pdata[cpld].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[cpld].reg_addr); + goto error; + } + + retval = sysfs_create_group(&pdev->dev.kobj, &ag9032v1_cpld_attr_group); + if (retval){ + printk(KERN_WARNING "Fail to create cpupld attribute group"); + goto error; + } + return 0; + +error: + i2c_unregister_device(pdata[cpld].client); + i2c_put_adapter(parent); + return -ENODEV; +} + +static int __exit cpld_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &ag9032v1_cpld_attr_group); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + if (pdata[cpld].client) { + if (!parent) { + parent = (pdata[cpld].client)->adapter; + } + i2c_unregister_device(pdata[cpld].client); + } + } + i2c_put_adapter(parent); + return 0; +} + +static struct platform_driver cpld_driver = { + .probe = cpld_probe, + .remove = __exit_p(cpld_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v1-cpupld", + }, +}; +/*---------------- CPUPLD - end ------------- */ + + +/*---------------- module initialization ------------- */ +static int __init delta_ag9032v1_cpupld_init(void) +{ + int ret; + printk(KERN_WARNING "ag9032v1_platform_cpupld module initialization\n"); + + // set the CPUPLD prob and remove + ret = platform_driver_register(&cpld_driver); + if (ret) { + printk(KERN_WARNING "Fail to register cpupld driver\n"); + goto error_cpupld_driver; + } + + // register the CPUPLD + ret = platform_device_register(&ag9032v1_cpld); + if (ret) { + printk(KERN_WARNING "Fail to create cpupld device\n"); + goto error_ag9032v1_cpupld; + } + return 0; + +error_ag9032v1_cpupld: + platform_driver_unregister(&cpld_driver); +error_cpupld_driver: + return ret; +} + +static void __exit delta_ag9032v1_cpupld_exit(void) +{ + platform_device_unregister(&ag9032v1_cpld); + platform_driver_unregister(&cpld_driver); +} +module_init(delta_ag9032v1_cpupld_init); +module_exit(delta_ag9032v1_cpupld_exit); + +MODULE_DESCRIPTION("DNI ag9032v1 CPLD Platform Support"); +MODULE_AUTHOR("Stanley Chi "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/delta_ag9032v1_platform.c b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/delta_ag9032v1_platform.c new file mode 100644 index 00000000000..9b7a1958c77 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/delta_ag9032v1_platform.c @@ -0,0 +1,2554 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BUS3_DEV_NUM 9 +#define BUS4_DEV_NUM 6 +#define BUS5_DEV_NUM 32 +#define DEFAULT_NUM 1 +#define BUS3_BASE_NUM 30 +#define BUS4_BASE_NUM 40 +#define BUS5_BASE_NUM 50 + +#define BUS3_MUX_REG 0x21 +#define BUS4_MUX_REG 0x21 +#define BUS5_MUX_REG 0x20 + +#define TEMP_FAN_VAL 0x06 +#define FANIO_CTL_VAL 0x07 +#define FAN_CTRL_VAL 0x05 +#define PSU1_VAL 0x00 +#define PSU2_VAL 0x20 +#define HOT_SWAP1_VAL 0x10 +#define HOT_SWAP2_VAL 0x30 +#define FAN_EEPROM1_VAL 0x00 +#define FAN_EEPROM2_VAL 0x01 +#define FAN_EEPROM3_VAL 0x02 +#define FAN_EEPROM4_VAL 0x03 +#define FAN_EEPROM5_VAL 0x04 + +#define SWPLD_REG 0x31 +#define SWPLD_SFP_MUX_REG 0x20 + +#define SYS_LED_REG 0x1C +#define FAN1_LED_REG 0x1D +#define FAN2_LED_REG 0x1E + +#define SFP_PRESENCE_1 0x38 +#define SFP_PRESENCE_2 0x39 +#define SFP_PRESENCE_3 0x3A +#define SFP_PRESENCE_4 0x3B + +#define SFP_LP_MODE_1 0x34 +#define SFP_LP_MODE_2 0x35 +#define SFP_LP_MODE_3 0x36 +#define SFP_LP_MODE_4 0x37 + +#define SFP_RESET_1 0x3C +#define SFP_RESET_2 0x3D +#define SFP_RESET_3 0x3E +#define SFP_RESET_4 0x3F + +#define SFP_RESPONSE_1 0x30 +#define SFP_RESPONSE_2 0x31 +#define SFP_RESPONSE_3 0x32 +#define SFP_RESPONSE_4 0x33 + +#define SFF8436_INFO(data) \ + .type = "sff8436", .addr = 0x50, .platform_data = (data) + +#define SFF_8346_PORT(eedata) \ + .byte_len = 256, .page_size = 1, .flags = SFF_8436_FLAG_READONLY + +#define ag9032v1_i2c_device_num(NUM){ \ + .name = "delta-ag9032v1-i2c-device", \ + .id = NUM, \ + .dev = { \ + .platform_data = &ag9032v1_i2c_device_platform_data[NUM], \ + .release = device_release, \ + }, \ +} + +/*Define struct to get client of i2c_new_deivce */ +struct i2c_client * i2c_client_9547; + +enum{ + BUS0 = 0, + BUS1, + BUS2, + BUS3, + BUS4, + BUS5, + BUS6, + BUS7, +}; + +unsigned char reverse_8bits(unsigned char c) +{ + unsigned char s = 0; + int i; + for (i = 0; i < 8; ++i) { + s <<= 1; + s |= c & 1; + c >>= 1; + } + return s; +} +/*---------------- I2C device - start ------------- */ +static void device_release(struct device *dev) +{ + return; +} + +struct i2c_device_platform_data { + int parent; + struct i2c_board_info info; + struct i2c_client *client; +}; +/* pca9547 - add 8 bus */ +static struct pca954x_platform_mode pca954x_mode[] = { + { .adap_id = 2, + .deselect_on_exit = 1, + }, + { .adap_id = 3, + .deselect_on_exit = 1, + }, + { .adap_id = 4, + .deselect_on_exit = 1, + }, + { .adap_id = 5, + .deselect_on_exit = 1, + }, + { .adap_id = 6, + .deselect_on_exit = 1, + }, + { .adap_id = 7, + .deselect_on_exit = 1, + }, + { .adap_id = 8, + .deselect_on_exit = 1, + }, + { .adap_id = 9, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_data pca954x_data = { + .modes = pca954x_mode, + .num_modes = ARRAY_SIZE(pca954x_mode), +}; + +static struct i2c_board_info __initdata i2c_info_pca9547[] = +{ + { + I2C_BOARD_INFO("pca9547", 0x71), + .platform_data = &pca954x_data, + }, +}; + + +static struct sff_8436_platform_data sff_8436_port[] = { + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, + { SFF_8346_PORT() }, +}; + +static struct i2c_device_platform_data ag9032v1_i2c_device_platform_data[] = { + { + /* tmp75 (0x4d) */ + .parent = 2, + .info = { I2C_BOARD_INFO("tmp75", 0x4d) }, + .client = NULL, + }, + { + /* id eeprom (0x53) */ + .parent = 2, + .info = { I2C_BOARD_INFO("24c02", 0x53) }, + .client = NULL, + }, + { + /* tmp75 (0x4c) */ + .parent = 7, + .info = { I2C_BOARD_INFO("tmp75", 0x4c) }, + .client = NULL, + }, + { + /* tmp75 (0x4d) */ + .parent = 7, + .info = { I2C_BOARD_INFO("tmp75", 0x4d) }, + .client = NULL, + }, + { + /* tmp75 (0x4e) */ + .parent = 7, + .info = { I2C_BOARD_INFO("tmp75", 0x4e) }, + .client = NULL, + }, + { + /* tmp75 (0x4f) */ + .parent = 30, + .info = { I2C_BOARD_INFO("tmp75", 0x4f) }, + .client = NULL, + }, + { + /* FAN 1 Controller (0x2c) */ + .parent = 37, + .info = { I2C_BOARD_INFO("emc2305", 0x2c) }, + .client = NULL, + }, + { + /* FAN 2 Controller (0x2d) */ + .parent = 38, + .info = { I2C_BOARD_INFO("emc2305", 0x2d) }, + .client = NULL, + }, + { + /* psu 1 (0x58) */ + .parent = 40, + .info = { .type = "dni_ag9032v1_psu", .addr = 0x58, .platform_data = (void *) 0 }, + .client = NULL, + }, + { + /* psu 2 (0x58) */ + .parent = 41, + .info = { .type = "dni_ag9032v1_psu", .addr = 0x58, .platform_data = (void *) 1 }, + .client = NULL, + }, + { + /* hot-swap 1 (0x40) */ + .parent = 42, + .info = { .type = "ltc4215", .addr = 0x40, .platform_data = (void *) 0 }, + .client = NULL, + }, + { + /* hot-swap 2 (0x40) */ + .parent = 43, + .info = { .type = "ltc4215", .addr = 0x40, .platform_data = (void *) 1 }, + .client = NULL, + }, + { + /* qsfp 1 (0x50) */ + .parent = 50, + .info = { SFF8436_INFO(&sff_8436_port[0]) }, + .client = NULL, + }, + { + /* qsfp 2 (0x50) */ + .parent = 51, + .info = { SFF8436_INFO(&sff_8436_port[1]) }, + .client = NULL, + }, + { + /* qsfp 3 (0x50) */ + .parent = 52, + .info = { SFF8436_INFO(&sff_8436_port[2]) }, + .client = NULL, + }, + { + /* qsfp 4 (0x50) */ + .parent = 53, + .info = { SFF8436_INFO(&sff_8436_port[3]) }, + .client = NULL, + }, + { + /* qsfp 5 (0x50) */ + .parent = 54, + .info = { SFF8436_INFO(&sff_8436_port[4]) }, + .client = NULL, + }, + { + /* qsfp 6 (0x50) */ + .parent = 55, + .info = { SFF8436_INFO(&sff_8436_port[5]) }, + .client = NULL, + }, + { + /* qsfp 7 (0x50) */ + .parent = 56, + .info = { SFF8436_INFO(&sff_8436_port[6]) }, + .client = NULL, + }, + { + /* qsfp 8 (0x50) */ + .parent = 57, + .info = { SFF8436_INFO(&sff_8436_port[7]) }, + .client = NULL, + }, + { + /* qsfp 9 (0x50) */ + .parent = 58, + .info = { SFF8436_INFO(&sff_8436_port[8]) }, + .client = NULL, + }, + { + /* qsfp 10 (0x50) */ + .parent = 59, + .info = { SFF8436_INFO(&sff_8436_port[9]) }, + .client = NULL, + }, + { + /* qsfp 11 (0x50) */ + .parent = 60, + .info = { SFF8436_INFO(&sff_8436_port[10]) }, + .client = NULL, + }, + { + /* qsfp 12 (0x50) */ + .parent = 61, + .info = { SFF8436_INFO(&sff_8436_port[11]) }, + .client = NULL, + }, + { + /* qsfp 13 (0x50) */ + .parent = 62, + .info = { SFF8436_INFO(&sff_8436_port[12]) }, + .client = NULL, + }, + { + /* qsfp 14 (0x50) */ + .parent = 63, + .info = { SFF8436_INFO(&sff_8436_port[13]) }, + .client = NULL, + }, + { + /* qsfp 15 (0x50) */ + .parent = 64, + .info = { SFF8436_INFO(&sff_8436_port[14]) }, + .client = NULL, + }, + { + /* qsfp 16 (0x50) */ + .parent = 65, + .info = { SFF8436_INFO(&sff_8436_port[15]) }, + .client = NULL, + }, + { + /* qsfp 17 (0x50) */ + .parent = 66, + .info = { SFF8436_INFO(&sff_8436_port[16]) }, + .client = NULL, + }, + { + /* qsfp 18 (0x50) */ + .parent = 67, + .info = { SFF8436_INFO(&sff_8436_port[17]) }, + .client = NULL, + }, + { + /* qsfp 19 (0x50) */ + .parent = 68, + .info = { SFF8436_INFO(&sff_8436_port[18]) }, + .client = NULL, + }, + { + /* qsfp 20 (0x50) */ + .parent = 69, + .info = { SFF8436_INFO(&sff_8436_port[19]) }, + .client = NULL, + }, + { + /* qsfp 21 (0x50) */ + .parent = 70, + .info = { SFF8436_INFO(&sff_8436_port[20]) }, + .client = NULL, + }, + { + /* qsfp 22 (0x50) */ + .parent = 71, + .info = { SFF8436_INFO(&sff_8436_port[21]) }, + .client = NULL, + }, + { + /* qsfp 23 (0x50) */ + .parent = 72, + .info = { SFF8436_INFO(&sff_8436_port[22]) }, + .client = NULL, + }, + { + /* qsfp 24 (0x50) */ + .parent = 73, + .info = { SFF8436_INFO(&sff_8436_port[23]) }, + .client = NULL, + }, + { + /* qsfp 25 (0x50) */ + .parent = 74, + .info = { SFF8436_INFO(&sff_8436_port[24]) }, + .client = NULL, + }, + { + /* qsfp 26 (0x50) */ + .parent = 75, + .info = { SFF8436_INFO(&sff_8436_port[25]) }, + .client = NULL, + }, + { + /* qsfp 27 (0x50) */ + .parent = 76, + .info = { SFF8436_INFO(&sff_8436_port[26]) }, + .client = NULL, + }, + { + /* qsfp 28 (0x50) */ + .parent = 77, + .info = { SFF8436_INFO(&sff_8436_port[27]) }, + .client = NULL, + }, + { + /* qsfp 29 (0x50) */ + .parent = 78, + .info = { SFF8436_INFO(&sff_8436_port[28]) }, + .client = NULL, + }, + { + /* qsfp 30 (0x50) */ + .parent = 79, + .info = { SFF8436_INFO(&sff_8436_port[29]) }, + .client = NULL, + }, + { + /* qsfp 31 (0x50) */ + .parent = 80, + .info = { SFF8436_INFO(&sff_8436_port[30]) }, + .client = NULL, + }, + { + /* qsfp 32 (0x50) */ + .parent = 81, + .info = { SFF8436_INFO(&sff_8436_port[31]) }, + .client = NULL, + }, +}; + + +static struct platform_device ag9032v1_i2c_device[] = { + ag9032v1_i2c_device_num(0), + ag9032v1_i2c_device_num(1), + ag9032v1_i2c_device_num(2), + ag9032v1_i2c_device_num(3), + ag9032v1_i2c_device_num(4), + ag9032v1_i2c_device_num(5), + ag9032v1_i2c_device_num(6), + ag9032v1_i2c_device_num(7), + ag9032v1_i2c_device_num(8), + ag9032v1_i2c_device_num(9), + ag9032v1_i2c_device_num(10), + ag9032v1_i2c_device_num(11), + ag9032v1_i2c_device_num(12), + ag9032v1_i2c_device_num(13), + ag9032v1_i2c_device_num(14), + ag9032v1_i2c_device_num(15), + ag9032v1_i2c_device_num(16), + ag9032v1_i2c_device_num(17), + ag9032v1_i2c_device_num(18), + ag9032v1_i2c_device_num(19), + ag9032v1_i2c_device_num(20), + ag9032v1_i2c_device_num(21), + ag9032v1_i2c_device_num(22), + ag9032v1_i2c_device_num(23), + ag9032v1_i2c_device_num(24), + ag9032v1_i2c_device_num(25), + ag9032v1_i2c_device_num(26), + ag9032v1_i2c_device_num(27), + ag9032v1_i2c_device_num(28), + ag9032v1_i2c_device_num(29), + ag9032v1_i2c_device_num(30), + ag9032v1_i2c_device_num(31), + ag9032v1_i2c_device_num(32), + ag9032v1_i2c_device_num(33), + ag9032v1_i2c_device_num(34), + ag9032v1_i2c_device_num(35), + ag9032v1_i2c_device_num(36), + ag9032v1_i2c_device_num(37), + ag9032v1_i2c_device_num(38), + ag9032v1_i2c_device_num(39), + ag9032v1_i2c_device_num(40), + ag9032v1_i2c_device_num(41), + ag9032v1_i2c_device_num(42), + ag9032v1_i2c_device_num(43), +}; + +/*---------------- I2C device - end ------------- */ + +/*---------------- I2C driver - start ------------- */ +static int __init i2c_device_probe(struct platform_device *pdev) +{ + struct i2c_device_platform_data *pdata; + struct i2c_adapter *parent; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -ENODEV; + } + + pdata->client = i2c_new_device(parent, &pdata->info); + if (!pdata->client) { + dev_err(&pdev->dev, "Failed to create i2c client %s at %d\n", + pdata->info.type, pdata->parent); + return -ENODEV; + } + + return 0; +} + +static int __exit i2c_deivce_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent; + struct i2c_device_platform_data *pdata; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + if (pdata->client) { + parent = (pdata->client)->adapter; + i2c_unregister_device(pdata->client); + i2c_put_adapter(parent); + } + + return 0; +} +static struct platform_driver i2c_device_driver = { + .probe = i2c_device_probe, + .remove = __exit_p(i2c_deivce_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v1-i2c-device", + } +}; + +/*---------------- I2C driver - end ------------- */ + +/*---------------- CPLD - start ------------- */ + +/* CPLD -- device */ + +enum cpld_type { + system_cpld, +}; + +struct cpld_platform_data { + int reg_addr; + struct i2c_client *client; +}; + +enum swpld_attributes { + SW_BOARD_ID, + SW_BOARD_VER, + SWPLD_VER, + SYS_RST, + B56960_RST, + MB_A_PLD_RST, + MB_B_PLD_RST, + PSU1_PWR_OK, + PSU2_PWR_OK, + HS1_PWR_OK, + HS2_PWR_OK, + B54616_RST, + B54616_INT, + B54616_MASK_INT, + PB_HS_INT, + MB_HS_INT, + PB_PWR_INT, + MB_PWR_INT, + FAN_INT, + PB_HS_MASK_INT, + MB_HS_MASK_INT, + PB_PWR1_MASK_INT, + PB_PWR2_MASK_INT, + FAN_MASK_INT, + QSFP_01TO08_INT, + QSFP_08TO16_INT, + QSFP_17TO24_INT, + QSFP_25TO32_INT, + QSFP_01TO08_ABS, + QSFP_08TO16_ABS, + QSFP_17TO24_ABS, + QSFP_25TO32_ABS, + QSFP_01TO08_MASK_INT, + QSFP_08TO16_MASK_INT, + QSFP_17TO24_MASK_INT, + QSFP_25TO32_MASK_INT, + QSFP_01TO08_MASK_ABS, + QSFP_08TO16_MASK_ABS, + QSFP_17TO24_MASK_ABS, + QSFP_25TO32_MASK_ABS, + QSFP01_MOD_INT, + QSFP02_MOD_INT, + QSFP03_MOD_INT, + QSFP04_MOD_INT, + QSFP05_MOD_INT, + QSFP06_MOD_INT, + QSFP07_MOD_INT, + QSFP08_MOD_INT, + QSFP09_MOD_INT, + QSFP10_MOD_INT, + QSFP11_MOD_INT, + QSFP12_MOD_INT, + QSFP13_MOD_INT, + QSFP14_MOD_INT, + QSFP15_MOD_INT, + QSFP16_MOD_INT, + QSFP17_MOD_INT, + QSFP18_MOD_INT, + QSFP19_MOD_INT, + QSFP20_MOD_INT, + QSFP21_MOD_INT, + QSFP22_MOD_INT, + QSFP23_MOD_INT, + QSFP24_MOD_INT, + QSFP25_MOD_INT, + QSFP26_MOD_INT, + QSFP27_MOD_INT, + QSFP28_MOD_INT, + QSFP29_MOD_INT, + QSFP30_MOD_INT, + QSFP31_MOD_INT, + QSFP32_MOD_INT, +}; + +static struct cpld_platform_data ag9032v1_cpld_platform_data[] = { + [system_cpld] = { + .reg_addr = SWPLD_REG, + }, +}; + +static struct platform_device ag9032v1_cpld = { + .name = "delta-ag9032v1-swpld", + .id = 0, + .dev = { + .platform_data = ag9032v1_cpld_platform_data, + .release = device_release, + }, +}; + +static struct swpld_attribute_data { + int reg_addr; + int reg_mask; + char reg_note[150]; +}; + +static struct swpld_attribute_data controller_interrupt_data[] = { +//BOARD + [SYS_RST] = { + .reg_addr = 0x04, + .reg_mask = 7, + .reg_note = "“1” = Normal operation\n“0” = Reset" + }, + [B56960_RST] = { + .reg_addr = 0x04, + .reg_mask = 6, + .reg_note = "“1” = Normal operation\n“0” = Reset" + }, + [MB_A_PLD_RST] = { + .reg_addr = 0x04, + .reg_mask = 4, + .reg_note = "“1” = Normal operation\n“0” = Reset" + }, + [MB_B_PLD_RST] = { + .reg_addr = 0x04, + .reg_mask = 3, + .reg_note = "“1” = Normal operation\n“0” = Reset" + }, +//PSU + [PSU1_PWR_OK] = { + .reg_addr = 0x0a, + .reg_mask = 7, + .reg_note = "‘0’ = Power rail is failed\n‘1’ = Power rail is good" + }, + [PSU2_PWR_OK] = { + .reg_addr = 0x0a, + .reg_mask = 6, + .reg_note = "‘0’ = Power rail is failed\n‘1’ = Power rail is good" + }, +//HOT SWAP + [HS1_PWR_OK] = { + .reg_addr = 0x08, + .reg_mask = 5, + .reg_note = "‘0’ = Hot swap controller disabled\n‘1’ = Hot swap controller enabled" + }, + [HS2_PWR_OK] = { + .reg_addr = 0x08, + .reg_mask = 4, + .reg_note = "‘0’ = Hot swap controller disabled\n‘1’ = Hot swap controller enabled" + }, +//BCM54616S + [B54616_RST] = { + .reg_addr = 0x04, + .reg_mask = 5, + .reg_note = "“0” = Reset\n“1” = Normal operation" + }, + [B54616_INT] = { + .reg_addr = 0x16, + .reg_mask = 7, + .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [B54616_MASK_INT] = { + .reg_addr = 0x17, + .reg_mask = 7, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, +//QSFP + [PB_HS_INT] = { + .reg_addr = 0x10, + .reg_mask = 7, + .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [MB_HS_INT] = { + .reg_addr = 0x10, + .reg_mask = 6, + .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [PB_PWR_INT] = { + .reg_addr = 0x10, + .reg_mask = 5, + .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [MB_PWR_INT] = { + .reg_addr = 0x10, + .reg_mask = 4, + .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [FAN_INT] = { + .reg_addr = 0x10, + .reg_mask = 3, + .reg_note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [PB_HS_MASK_INT] = { + .reg_addr = 0x11, + .reg_mask = 7, + .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" + }, + [MB_HS_MASK_INT] = { + .reg_addr = 0x11, + .reg_mask = 6, + .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" + }, + [PB_PWR1_MASK_INT] = { + .reg_addr = 0x11, + .reg_mask = 5, + .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" + }, + [PB_PWR2_MASK_INT] = { + .reg_addr = 0x11, + .reg_mask = 4, + .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" + }, + [FAN_MASK_INT] = { + .reg_addr = 0x11, + .reg_mask = 3, + .reg_note = "‘0’ = Interrupt doesn’t masked\n‘1’ = Interrupt masked" + }, + [QSFP_01TO08_INT] = { + .reg_addr = 0x12, + .reg_mask = 7, + .reg_note = "“0” = Interrupt occurs\n“1” = Interrupt doesn’t occur" + }, + [QSFP_08TO16_INT] = { + .reg_addr = 0x12, + .reg_mask = 6, + .reg_note = "“0” = Interrupt occurs\n“1” = Interrupt doesn’t occur" + }, + [QSFP_17TO24_INT] = { + .reg_addr = 0x12, + .reg_mask = 5, + .reg_note = "“0” = Interrupt occurs\n“1” = Interrupt doesn’t occur" + }, + [QSFP_25TO32_INT] = { + .reg_addr = 0x12, + .reg_mask = 4, + .reg_note = "“0” = Interrupt occurs\n“1” = Interrupt doesn’t occur" + }, + [QSFP_01TO08_ABS] = { + .reg_addr = 0x12, + .reg_mask = 3, + .reg_note = "“0” = Absence status change\n“1” = Absence status not changes" + }, + [QSFP_08TO16_ABS] = { + .reg_addr = 0x12, + .reg_mask = 2, + .reg_note = "“0” = Absence status change\n“1” = Absence status not changes" + }, + [QSFP_17TO24_ABS] = { + .reg_addr = 0x12, + .reg_mask = 1, + .reg_note = "“0” = Absence status change\n“1” = Absence status not changes" + }, + [QSFP_25TO32_ABS] = { + .reg_addr = 0x12, + .reg_mask = 0, + .reg_note = "“0” = Absence status change\n“1” = Absence status not changes" + }, + [QSFP_01TO08_MASK_INT] = { + .reg_addr = 0x13, + .reg_mask = 7, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP_08TO16_MASK_INT] = { + .reg_addr = 0x13, + .reg_mask = 6, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP_17TO24_MASK_INT] = { + .reg_addr = 0x13, + .reg_mask = 5, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP_25TO32_MASK_INT] = { + .reg_addr = 0x13, + .reg_mask = 4, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP_01TO08_MASK_ABS] = { + .reg_addr = 0x13, + .reg_mask = 3, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP_08TO16_MASK_ABS] = { + .reg_addr = 0x13, + .reg_mask = 2, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP_17TO24_MASK_ABS] = { + .reg_addr = 0x13, + .reg_mask = 1, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP_25TO32_MASK_ABS] = { + .reg_addr = 0x13, + .reg_mask = 0, + .reg_note = "“0” = Interrupt doesn’t masked\n“1” = Interrupt masked" + }, + [QSFP01_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 7, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP02_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 6, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP03_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 5, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP04_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 4, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP05_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 3, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP06_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 2, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP07_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 1, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP08_MOD_INT] = { + .reg_addr = 0x40, + .reg_mask = 0, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP09_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 7, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP10_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 6, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP11_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 5, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP12_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 4, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP13_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 3, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP14_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 2, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP15_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 1, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP16_MOD_INT] = { + .reg_addr = 0x41, + .reg_mask = 0, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP17_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 7, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP18_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 6, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP19_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 5, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP20_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 4, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP21_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 3, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP22_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 2, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP23_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 1, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP24_MOD_INT] = { + .reg_addr = 0x42, + .reg_mask = 0, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP25_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 7, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP26_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 6, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP27_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 5, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP28_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 4, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP29_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 3, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP30_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 2, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP31_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 1, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, + [QSFP32_MOD_INT] = { + .reg_addr = 0x43, + .reg_mask = 0, + .reg_note = "“0” = The module issue the interrupt\n“1” = The module NOT issue the interrupt" + }, +}; + +static ssize_t get_present(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_PRESENCE_1); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data = (u32)reverse_8bits(ret) & 0xff; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_PRESENCE_2); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 8; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_PRESENCE_3); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 16; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_PRESENCE_4); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 24; + + return sprintf(buf, "0x%08x\n", data); //return 32bits data +} + +static ssize_t get_lpmode(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_LP_MODE_1); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data = (u32)(reverse_8bits(ret) & 0xff); + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_LP_MODE_2); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 8; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_LP_MODE_3); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 16; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_LP_MODE_4); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 24; + + return sprintf(buf, "0x%08x\n", data); //return 32bits data +} + +static ssize_t set_lpmode(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 16, &data); + if (err) + return err; + + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_LP_MODE_1, (u8)reverse_8bits(data & 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_LP_MODE_2, (u8)(reverse_8bits(data >> 8) & 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_LP_MODE_3, (u8)(reverse_8bits(data >> 16) & 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_LP_MODE_4, (u8)(reverse_8bits(data >> 24) & 0xff)); + + return count; +} + +static ssize_t get_reset(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESET_1); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data = (u32)(reverse_8bits(ret) & 0xff); + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESET_2); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 8; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESET_3); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 16; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESET_4); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 24; + + return sprintf(buf, "0x%08x\n", data); //return 32bits data +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 16, &data); + if (err) + return err; + + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESET_1, (u8)reverse_8bits(data & 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESET_2, (u8)reverse_8bits((data >> 8)& 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESET_3, (u8)reverse_8bits((data >> 16) & 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESET_4, (u8)reverse_8bits((data >> 24) & 0xff)); + + return count; +} + +static ssize_t get_response(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + u32 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESPONSE_1); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data = (u32)(reverse_8bits(ret) & 0xff); + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESPONSE_2); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 8; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESPONSE_3); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 16; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, SFP_RESPONSE_4); + if (ret < 0) + return sprintf(buf, "error number(%d)",ret); + data |= (u32)(reverse_8bits(ret) & 0xff) << 24; + + return sprintf(buf, "0x%08x\n", data); //return 32bits data +} + +static ssize_t set_response(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 16, &data); + if (err) + return err; + + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESPONSE_1, (u8)reverse_8bits(data & 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESPONSE_2, (u8)reverse_8bits((data >> 8)& 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESPONSE_3, (u8)reverse_8bits((data >> 16) & 0xff)); + i2c_smbus_write_byte_data(pdata[system_cpld].client, SFP_RESPONSE_4, (u8)reverse_8bits((data >> 24) & 0xff)); + + return count; +} + +struct platform_led_status{ + int reg_data; + char *led_status; + int led_id; +}; + +static struct platform_led_status led_info[] = { + { + .reg_data = 0x40, + .led_status = "pwr1_green", + .led_id = 0, + }, + { + .reg_data = 0x80, + .led_status = "pwr1_amber", + .led_id = 0, + }, + { + .reg_data = 0x00, + .led_status = "pwr1_off", + .led_id = 0, + }, + { + .reg_data = 0xc0, + .led_status = "pwr1_off", + .led_id = 0, + }, + { + .reg_data = 0x10, + .led_status = "pwr2_green", + .led_id = 1, + }, + { + .reg_data = 0x20, + .led_status = "pwr2_amber", + .led_id = 1, + }, + { + .reg_data = 0x00, + .led_status = "pwr2_off", + .led_id = 1, + }, + { + .reg_data = 0x30, + .led_status = "pwr2_off", + .led_id = 1, + }, + { + .reg_data = 0x04, + .led_status = "sys_green", + .led_id = 2, + }, + { + .reg_data = 0x08, + .led_status = "sys_blinking_green", + .led_id = 2, + }, + { + .reg_data = 0x0c, + .led_status = "sys_red", + .led_id = 2, + }, + { + .reg_data = 0x00, + .led_status = "sys_off", + .led_id = 2, + }, + { + .reg_data = 0x01, + .led_status = "fan_green", + .led_id = 3, + }, + { + .reg_data = 0x02, + .led_status = "fan_amber", + .led_id = 3, + }, + { + .reg_data = 0x00, + .led_status = "fan_off", + .led_id = 3, + }, + { + .reg_data = 0x03, + .led_status = "fan_off", + .led_id = 3, + }, + { + .reg_data = 0x40, + .led_status = "fan1_green", + .led_id = 4, + }, + { + .reg_data = 0x80, + .led_status = "fan1_red", + .led_id = 4, + }, + { + .reg_data = 0x00, + .led_status = "fan1_off", + .led_id = 4, + }, + { + .reg_data = 0x10, + .led_status = "fan2_green", + .led_id = 5, + }, + { + .reg_data = 0x20, + .led_status = "fan2_red", + .led_id = 5, + }, + { + .reg_data = 0x00, + .led_status = "fan2_off", + .led_id = 5, + }, + { + .reg_data = 0x04, + .led_status = "fan3_green", + .led_id = 6, + }, + { + .reg_data = 0x08, + .led_status = "fan3_red", + .led_id = 6, + }, + { + .reg_data = 0x00, + .led_status = "fan3_off", + .led_id = 6, + }, + { + .reg_data = 0x01, + .led_status = "fan4_green", + .led_id = 7, + }, + { + .reg_data = 0x02, + .led_status = "fan4_red", + .led_id = 7, + }, + { + .reg_data = 0x00, + .led_status = "fan4_off", + .led_id = 7, + }, + { + .reg_data = 0x40, + .led_status = "fan5_green", + .led_id = 8, + }, + { + .reg_data = 0x80, + .led_status = "fan5_red", + .led_id = 8, + }, + { + .reg_data = 0x00, + .led_status = "fan5_off", + .led_id = 8, + }, +}; + +struct platform_led_data{ + int reg_addr; + int mask; +}; + +static struct platform_led_data led_data[] = { + { + .reg_addr = SYS_LED_REG, + .mask = 0xc0, + }, + { + .reg_addr = SYS_LED_REG, + .mask = 0x30, + }, + { + .reg_addr = SYS_LED_REG, + .mask = 0x0c, + }, + { + .reg_addr = SYS_LED_REG, + .mask = 0x03, + }, + { + .reg_addr = FAN1_LED_REG, + .mask = 0xc0, + }, + { + .reg_addr = FAN1_LED_REG, + .mask = 0x30, + }, + { + .reg_addr = FAN1_LED_REG, + .mask = 0x0c, + }, + { + .reg_addr = FAN1_LED_REG, + .mask = 0x03, + }, + { + .reg_addr = FAN2_LED_REG, + .mask = 0xc0, + }, +}; + +static ssize_t get_led_color(struct device *dev, struct device_attribute *devattr, char *buf) +{ + char str[9][20] = {0}; + int board_data; + int led_data_number; + int led_info_number; + struct cpld_platform_data *pdata = dev->platform_data; + + for(led_data_number = 0; led_data_number < ARRAY_SIZE(led_data); led_data_number++){ + board_data = i2c_smbus_read_byte_data(pdata[system_cpld].client, led_data[led_data_number].reg_addr); + if(board_data >= 0){ + board_data &= led_data[led_data_number].mask; + for(led_info_number = 0; led_info_number < ARRAY_SIZE(led_info); led_info_number++){ + if (led_data_number == led_info[led_info_number].led_id){ + if(board_data == led_info[led_info_number].reg_data){ + sprintf(str[led_data_number], "%s", led_info[led_info_number].led_status); + } + } + } + } + else + printk( KERN_ERR "Missing LED board data\n"); + } + return sprintf(buf,"%s\n%s\n%s\n%s\n%s\n%s\n%s\n%s\n%s\n",str[0],str[1],str[2],str[3],str[4],str[5],str[6],str[7],str[8]); +} + +static ssize_t set_led_color(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + int led_info_number; + int led_data_number; + int str_compar; + int led_reg_value; + struct cpld_platform_data *pdata = dev->platform_data; + + for(led_info_number = 0; led_info_number < ARRAY_SIZE(led_info); led_info_number++){ + str_compar = strncmp(buf,led_info[led_info_number].led_status,strlen(led_info[led_info_number].led_status)); + if(str_compar == 0){ + for(led_data_number = 0; led_data_number < ARRAY_SIZE(led_data); led_data_number++){ + if(led_info[led_info_number].led_id == led_data_number){ + led_reg_value = i2c_smbus_read_byte_data(pdata[system_cpld].client, led_data[led_data_number].reg_addr); + if(led_reg_value >= 0){ + led_reg_value &= (~led_data[led_data_number].mask); + led_reg_value |= led_info[led_info_number].reg_data; + i2c_smbus_write_byte_data(pdata[system_cpld].client, (u8)(led_data[led_data_number].reg_addr & 0xff), (u8)(led_reg_value & 0xff)); + } + else + printk( KERN_ERR "Missing LED reg. data\n"); + } + } + } + } + return count; +} + +static unsigned char swpld_reg_addr; +static ssize_t get_swpld_reg_value(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int ret; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, swpld_reg_addr); + return sprintf(buf, "0x%02x\n", ret); +} + +static ssize_t set_swpld_reg_value(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + err = kstrtoul(buf, 0, &data); + if (err){ + return err; + } + + if (data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + return count; + } + + i2c_smbus_write_byte_data(pdata[system_cpld].client, swpld_reg_addr, data); + + return count; +} + +static ssize_t get_swpld_reg_addr(struct device *dev, struct device_attribute *devattr, char *buf) +{ + + return sprintf(buf, "0x%02x\n", swpld_reg_addr); +} + +static ssize_t set_swpld_reg_addr(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned long data; + int err; + + err = kstrtoul(buf, 0, &data); + if (err){ + return err; + } + if (data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + return count; + } + swpld_reg_addr = data; + + return count; +} + +static DEVICE_ATTR(swpld_reg_value, S_IRUGO | S_IWUSR, get_swpld_reg_value, set_swpld_reg_value); +static DEVICE_ATTR(swpld_reg_addr, S_IRUGO | S_IWUSR, get_swpld_reg_addr, set_swpld_reg_addr); +static DEVICE_ATTR(sfp_present, S_IRUGO, get_present, NULL ); +static DEVICE_ATTR(sfp_lpmode, S_IRUGO | S_IWUSR, get_lpmode, set_lpmode ); +static DEVICE_ATTR(sfp_reset, S_IRUGO | S_IWUSR, get_reset, set_reset ); +static DEVICE_ATTR(sfp_response, S_IRUGO | S_IWUSR, get_response, set_response ); +static DEVICE_ATTR(led_control, S_IRUGO | S_IWUSR, get_led_color, set_led_color); + +static struct attribute *ag9032v1_cpld_attrs[] = { + &dev_attr_swpld_reg_value.attr, + &dev_attr_swpld_reg_addr.attr, + &dev_attr_sfp_response.attr, + &dev_attr_sfp_present.attr, + &dev_attr_sfp_lpmode.attr, + &dev_attr_sfp_reset.attr, + &dev_attr_led_control.attr, + NULL, +}; + +static struct attribute_group ag9032v1_cpld_attr_grp = { + .attrs = ag9032v1_cpld_attrs, +}; + +static struct kobject *kobj_swpld; +static struct kobject *kobj_board; +static struct kobject *kobj_psu; +static struct kobject *kobj_hot_swap; +static struct kobject *kobj_controller_interrupt; +static struct kobject *kobj_BCM54616S; + +static ssize_t get_swpld_data(struct device *dev, struct device_attribute *dev_attr, char *buf) +{ + int ret; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct device *i2cdev = kobj_to_dev(kobj_swpld); + struct cpld_platform_data *pdata = i2cdev->platform_data; + + + unsigned char reg; + int mask; + int value; + char note[150]; + + switch (attr->index) { + //attributes on BOARD + case SW_BOARD_ID: + reg = 0x00; + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); + value = ret >> 4; + sprintf(note, "\n“0x00”: L9032NB-AL-R\n“0x01”: AK9032-R\n“0x02”: AG9032-R\n“0x03”: AG9032R-R\n“0x04”: AG9032 V1-R\n"); + return sprintf(buf, "0x%02x%s", value, note); + case SW_BOARD_VER: + reg = 0x00; + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); + value = ret & 0x0F; + sprintf(note, "\n“0x00”: proto-A\n“0x01”: proto-B\n"); + return sprintf(buf, "0x%02x%s", value, note); + case SWPLD_VER: + reg = 0x01; + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); + value = ret & 0xFF; + sprintf(note, " "); + return sprintf(buf, "0x%02x%s", value, note); + //other attributes + case SYS_RST ... QSFP32_MOD_INT: + reg = controller_interrupt_data[attr->index].reg_addr; + mask = controller_interrupt_data[attr->index].reg_mask; + sprintf(note, "\n%s\n",controller_interrupt_data[attr->index].reg_note); + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); + value = (ret & (1 << mask)) >> mask; + return sprintf(buf, "%d%s", value, note); + default: + return sprintf(buf, "%d not found", attr->index); + } +} + +static ssize_t set_swpld_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count) +{ + int ret; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct device *i2cdev = kobj_to_dev(kobj_board->parent); + struct cpld_platform_data *pdata = i2cdev->platform_data; + unsigned char reg; + int mask; + int value; + char note[180]; + int data; + int val; + u8 mask_out; + + ret = kstrtoint(buf, 0, &val); + + if (ret) + { + return ret; + } + if (val > 1) + { + return -EINVAL; + } + + switch (attr->index) { + case SYS_RST ... MB_B_PLD_RST: + case HS1_PWR_OK ... HS2_PWR_OK: + case B54616_RST: + case QSFP_01TO08_MASK_INT... QSFP_25TO32_MASK_ABS: + reg = controller_interrupt_data[attr->index].reg_addr; + mask = controller_interrupt_data[attr->index].reg_mask; + break; + default: + return sprintf(buf, "%d not found", attr->index); + } + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); + mask_out = ret & ~((u8)(1 << mask)); + data = mask_out | (val << mask); + i2c_smbus_write_byte_data(pdata[system_cpld].client, reg, (u8)(data & 0xff)); + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); + return count; +} + +static SENSOR_DEVICE_ATTR(sw_board_id, S_IRUGO, get_swpld_data, NULL, SW_BOARD_ID); +static SENSOR_DEVICE_ATTR(sw_board_ver, S_IRUGO, get_swpld_data, NULL, SW_BOARD_VER); +static SENSOR_DEVICE_ATTR(swpld_ver, S_IRUGO, get_swpld_data, NULL, SWPLD_VER); +static SENSOR_DEVICE_ATTR(sys_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, SYS_RST); +static SENSOR_DEVICE_ATTR(B56960_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, B56960_RST); +static SENSOR_DEVICE_ATTR(mb_a_pld_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, MB_A_PLD_RST); +static SENSOR_DEVICE_ATTR(mb_b_pld_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, MB_B_PLD_RST); + +static struct attribute *ag9032v1_swpld_attrs_board[] = { + &sensor_dev_attr_sw_board_id.dev_attr.attr, + &sensor_dev_attr_sw_board_ver.dev_attr.attr, + &sensor_dev_attr_swpld_ver.dev_attr.attr, + &sensor_dev_attr_sys_rst.dev_attr.attr, + &sensor_dev_attr_B56960_rst.dev_attr.attr, + &sensor_dev_attr_mb_a_pld_rst.dev_attr.attr, + &sensor_dev_attr_mb_b_pld_rst.dev_attr.attr, + NULL, +}; + +static SENSOR_DEVICE_ATTR(psu1_pwr_ok, S_IRUGO, get_swpld_data, NULL, PSU1_PWR_OK); +static SENSOR_DEVICE_ATTR(psu2_pwr_ok, S_IRUGO, get_swpld_data, NULL, PSU2_PWR_OK); + +static struct attribute *ag9032v1_swpld_attrs_psu[] = { + &sensor_dev_attr_psu1_pwr_ok.dev_attr.attr, + &sensor_dev_attr_psu2_pwr_ok.dev_attr.attr, + NULL, +}; + +static SENSOR_DEVICE_ATTR(hs1_pwr_ok, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, HS1_PWR_OK); +static SENSOR_DEVICE_ATTR(hs2_pwr_ok, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, HS2_PWR_OK); + +static struct attribute *ag9032v1_swpld_attrs_hot_swap[] = { + &sensor_dev_attr_hs1_pwr_ok.dev_attr.attr, + &sensor_dev_attr_hs2_pwr_ok.dev_attr.attr, + NULL, +}; + +static SENSOR_DEVICE_ATTR(B54616_rst, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, B54616_RST ); +static SENSOR_DEVICE_ATTR(B54616_int, S_IRUGO, get_swpld_data, NULL, B54616_INT ); +static SENSOR_DEVICE_ATTR(B54616_mask_int, S_IRUGO, get_swpld_data, NULL, B54616_MASK_INT); + +static struct attribute *ag9032v1_swpld_attrs_BCM54616S[] = { + &sensor_dev_attr_B54616_rst.dev_attr.attr, + &sensor_dev_attr_B54616_int.dev_attr.attr, + &sensor_dev_attr_B54616_mask_int.dev_attr.attr, + NULL, +}; + +static SENSOR_DEVICE_ATTR(pb_hs_int, S_IRUGO, get_swpld_data, NULL, PB_HS_INT); +static SENSOR_DEVICE_ATTR(mb_hs_int, S_IRUGO, get_swpld_data, NULL, MB_HS_INT); +static SENSOR_DEVICE_ATTR(pb_pwr_int, S_IRUGO, get_swpld_data, NULL, PB_PWR_INT); +static SENSOR_DEVICE_ATTR(mb_pwr_int, S_IRUGO, get_swpld_data, NULL, MB_PWR_INT); +static SENSOR_DEVICE_ATTR(fan_int, S_IRUGO, get_swpld_data, NULL, FAN_INT); +static SENSOR_DEVICE_ATTR(pb_hs_mask_int, S_IRUGO, get_swpld_data, NULL, PB_HS_MASK_INT); +static SENSOR_DEVICE_ATTR(mb_hs_mask_int, S_IRUGO, get_swpld_data, NULL, MB_HS_MASK_INT); +static SENSOR_DEVICE_ATTR(pb_pwr1_mask_int, S_IRUGO, get_swpld_data, NULL, PB_PWR1_MASK_INT); +static SENSOR_DEVICE_ATTR(pb_pwr2_mask_int, S_IRUGO, get_swpld_data, NULL, PB_PWR2_MASK_INT); +static SENSOR_DEVICE_ATTR(fan_mask_int, S_IRUGO, get_swpld_data, NULL, FAN_MASK_INT); +static SENSOR_DEVICE_ATTR(qsfp_01to08_int, S_IRUGO, get_swpld_data, NULL, QSFP_01TO08_INT); +static SENSOR_DEVICE_ATTR(qsfp_08to16_int, S_IRUGO, get_swpld_data, NULL, QSFP_08TO16_INT); +static SENSOR_DEVICE_ATTR(qsfp_17to24_int, S_IRUGO, get_swpld_data, NULL, QSFP_17TO24_INT); +static SENSOR_DEVICE_ATTR(qsfp_25to32_int, S_IRUGO, get_swpld_data, NULL, QSFP_25TO32_INT); +static SENSOR_DEVICE_ATTR(qsfp_01to08_abs, S_IRUGO, get_swpld_data, NULL, QSFP_01TO08_ABS); +static SENSOR_DEVICE_ATTR(qsfp_08to16_abs, S_IRUGO, get_swpld_data, NULL, QSFP_08TO16_ABS); +static SENSOR_DEVICE_ATTR(qsfp_17to24_abs, S_IRUGO, get_swpld_data, NULL, QSFP_17TO24_ABS); +static SENSOR_DEVICE_ATTR(qsfp_25to32_abs, S_IRUGO, get_swpld_data, NULL, QSFP_25TO32_ABS); +static SENSOR_DEVICE_ATTR(qsfp_01to08_mask_int, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_01TO08_MASK_INT); +static SENSOR_DEVICE_ATTR(qsfp_08to16_mask_int, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_08TO16_MASK_INT); +static SENSOR_DEVICE_ATTR(qsfp_17to24_mask_int, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_17TO24_MASK_INT); +static SENSOR_DEVICE_ATTR(qsfp_25to32_mask_int, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_25TO32_MASK_INT); +static SENSOR_DEVICE_ATTR(qsfp_01to08_mask_abs, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_01TO08_MASK_ABS); +static SENSOR_DEVICE_ATTR(qsfp_08to16_mask_abs, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_08TO16_MASK_ABS); +static SENSOR_DEVICE_ATTR(qsfp_17to24_mask_abs, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_17TO24_MASK_ABS); +static SENSOR_DEVICE_ATTR(qsfp_25to32_mask_abs, S_IRUGO | S_IWUSR, get_swpld_data, set_swpld_data, QSFP_25TO32_MASK_ABS); +static SENSOR_DEVICE_ATTR(qsfp01_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP01_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp02_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP02_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp03_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP03_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp04_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP04_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp05_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP05_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp06_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP06_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp07_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP07_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp08_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP08_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp09_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP09_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp10_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP10_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp11_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP11_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp12_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP12_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp13_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP13_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp14_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP14_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp15_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP15_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp16_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP16_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp17_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP17_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp18_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP18_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp19_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP19_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp20_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP20_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp21_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP21_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp22_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP22_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp23_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP23_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp24_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP24_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp25_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP25_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp26_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP26_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp27_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP27_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp28_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP28_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp29_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP29_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp30_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP30_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp31_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP31_MOD_INT); +static SENSOR_DEVICE_ATTR(qsfp32_mod_int, S_IRUGO, get_swpld_data, NULL, QSFP32_MOD_INT); + +static struct attribute *ag9032v1_swpld_attrs_controller_interrupt[] = { + &sensor_dev_attr_pb_hs_int.dev_attr.attr, + &sensor_dev_attr_mb_hs_int.dev_attr.attr, + &sensor_dev_attr_pb_pwr_int.dev_attr.attr, + &sensor_dev_attr_mb_pwr_int.dev_attr.attr, + &sensor_dev_attr_fan_int.dev_attr.attr, + &sensor_dev_attr_pb_hs_mask_int.dev_attr.attr, + &sensor_dev_attr_mb_hs_mask_int.dev_attr.attr, + &sensor_dev_attr_pb_pwr1_mask_int.dev_attr.attr, + &sensor_dev_attr_pb_pwr2_mask_int.dev_attr.attr, + &sensor_dev_attr_fan_mask_int.dev_attr.attr, + &sensor_dev_attr_qsfp_01to08_int.dev_attr.attr, + &sensor_dev_attr_qsfp_08to16_int.dev_attr.attr, + &sensor_dev_attr_qsfp_17to24_int.dev_attr.attr, + &sensor_dev_attr_qsfp_25to32_int.dev_attr.attr, + &sensor_dev_attr_qsfp_01to08_abs.dev_attr.attr, + &sensor_dev_attr_qsfp_08to16_abs.dev_attr.attr, + &sensor_dev_attr_qsfp_17to24_abs.dev_attr.attr, + &sensor_dev_attr_qsfp_25to32_abs.dev_attr.attr, + &sensor_dev_attr_qsfp_01to08_mask_int.dev_attr.attr, + &sensor_dev_attr_qsfp_08to16_mask_int.dev_attr.attr, + &sensor_dev_attr_qsfp_17to24_mask_int.dev_attr.attr, + &sensor_dev_attr_qsfp_25to32_mask_int.dev_attr.attr, + &sensor_dev_attr_qsfp_01to08_mask_abs.dev_attr.attr, + &sensor_dev_attr_qsfp_08to16_mask_abs.dev_attr.attr, + &sensor_dev_attr_qsfp_17to24_mask_abs.dev_attr.attr, + &sensor_dev_attr_qsfp_25to32_mask_abs.dev_attr.attr, + &sensor_dev_attr_qsfp01_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp02_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp03_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp04_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp05_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp06_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp07_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp08_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp09_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp10_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp11_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp12_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp13_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp14_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp15_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp16_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp17_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp18_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp19_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp20_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp21_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp22_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp23_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp24_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp25_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp26_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp27_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp28_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp29_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp30_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp31_mod_int.dev_attr.attr, + &sensor_dev_attr_qsfp32_mod_int.dev_attr.attr, + NULL, +}; + +static struct attribute_group ag9032v1_swpld_attr_grp_board = { + .attrs = ag9032v1_swpld_attrs_board, +}; +static struct attribute_group ag9032v1_swpld_attr_grp_psu = { + .attrs = ag9032v1_swpld_attrs_psu, +}; +static struct attribute_group ag9032v1_swpld_attr_grp_hot_swap = { + .attrs = ag9032v1_swpld_attrs_hot_swap, +}; +static struct attribute_group ag9032v1_swpld_attr_grp_BCM54616S = { + .attrs = ag9032v1_swpld_attrs_BCM54616S, +}; +static struct attribute_group ag9032v1_swpld_attr_grp_controller_interrupt = { + .attrs = ag9032v1_swpld_attrs_controller_interrupt, +}; + +/* CPLD -- driver */ +static int __init cpld_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "CPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(BUS6); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", BUS6); + return -ENODEV; + } + + pdata[system_cpld].client = i2c_new_dummy(parent, pdata[system_cpld].reg_addr); + if (!pdata[system_cpld].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[system_cpld].reg_addr); + goto error; + } + + kobj_swpld = &pdev->dev.kobj; + kobj_board = kobject_create_and_add("Board", &pdev->dev.kobj); + if (!kobj_board){ + printk(KERN_WARNING "Fail to create directory"); + goto error; + } + + kobj_psu = kobject_create_and_add("PSU", &pdev->dev.kobj); + if (!kobj_psu){ + printk(KERN_WARNING "Fail to create directory"); + goto error; + } + + kobj_hot_swap = kobject_create_and_add("HOT_SWAP", &pdev->dev.kobj); + if (!kobj_hot_swap){ + printk(KERN_WARNING "Fail to create directory"); + goto error; + } + + kobj_controller_interrupt = kobject_create_and_add("Controller_interrupt", &pdev->dev.kobj); + if (!kobj_controller_interrupt){ + printk(KERN_WARNING "Fail to create directory"); + goto error; + } + + kobj_BCM54616S = kobject_create_and_add("BCM54616S", &pdev->dev.kobj); + if (!kobj_BCM54616S){ + printk(KERN_WARNING "Fail to create directory"); + goto error; + } + + ret = sysfs_create_group(kobj_board, &ag9032v1_swpld_attr_grp_board); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + ret = sysfs_create_group(kobj_psu, &ag9032v1_swpld_attr_grp_psu); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + ret = sysfs_create_group(kobj_hot_swap, &ag9032v1_swpld_attr_grp_hot_swap); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + ret = sysfs_create_group(kobj_BCM54616S, &ag9032v1_swpld_attr_grp_BCM54616S); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + ret = sysfs_create_group(kobj_controller_interrupt, &ag9032v1_swpld_attr_grp_controller_interrupt); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + ret = sysfs_create_group(&pdev->dev.kobj, &ag9032v1_cpld_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + return 0; + +error: + kobject_put(kobj_swpld); + kobject_put(kobj_board); + kobject_put(kobj_psu); + kobject_put(kobj_hot_swap); + kobject_put(kobj_controller_interrupt); + kobject_put(kobj_BCM54616S); + i2c_unregister_device(pdata[system_cpld].client); + i2c_put_adapter(parent); + + return -ENODEV; +} + +static int __exit cpld_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &ag9032v1_cpld_attr_grp); + sysfs_remove_group(kobj_board, &ag9032v1_swpld_attr_grp_board); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + kobject_put(kobj_swpld); + kobject_put(kobj_board); + kobject_put(kobj_psu); + kobject_put(kobj_hot_swap); + kobject_put(kobj_controller_interrupt); + kobject_put(kobj_BCM54616S); + if (pdata[system_cpld].client) { + if (!parent) { + parent = (pdata[system_cpld].client)->adapter; + } + i2c_unregister_device(pdata[system_cpld].client); + } + } + i2c_put_adapter(parent); + + return 0; +} + +static struct platform_driver cpld_driver = { + .probe = cpld_probe, + .remove = __exit_p(cpld_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v1-swpld", + }, +}; + +/*---------------- CPLD - end ------------- */ + +/*---------------- MUX - start ------------- */ + +struct swpld_mux_platform_data { + int parent; + int base_nr; + int reg_addr; + struct i2c_client *cpld; +}; + +struct swpld_mux { + struct i2c_adapter *parent; + struct i2c_adapter **child; + struct swpld_mux_platform_data data; +}; +static struct swpld_mux_platform_data ag9032v1_swpld_mux_platform_data[] = { + { + .parent = BUS3, + .base_nr = BUS3_BASE_NUM, + .cpld = NULL, + .reg_addr = BUS3_MUX_REG ,// the i2c register address which for select mux TEMP(FAN) + }, + { + .parent = BUS4, + .base_nr = BUS4_BASE_NUM , + .cpld = NULL, + .reg_addr = BUS4_MUX_REG , + }, + { + .parent = BUS5, + .base_nr = BUS5_BASE_NUM , + .cpld = NULL, + .reg_addr = BUS5_MUX_REG , + }, +}; + +static struct platform_device ag9032v1_swpld_mux[] = { + { + .name = "delta-ag9032v1-swpld-mux", + .id = 0, + .dev = { + .platform_data = &ag9032v1_swpld_mux_platform_data[0], + .release = device_release, + }, + }, + { + .name = "delta-ag9032v1-swpld-mux", + .id = 1, + .dev = { + .platform_data = &ag9032v1_swpld_mux_platform_data[1], + .release = device_release, + }, + }, + { + .name = "delta-ag9032v1-swpld-mux", + .id = 2, + .dev = { + .platform_data = &ag9032v1_swpld_mux_platform_data[2], + .release = device_release, + }, + }, +}; + +static int cpld_reg_write_byte(struct i2c_client *client, u8 regaddr, u8 val) +{ + union i2c_smbus_data data; + + data.byte = val; + return client->adapter->algo->smbus_xfer(client->adapter, client->addr, + client->flags, + I2C_SMBUS_WRITE, + regaddr, I2C_SMBUS_BYTE_DATA, &data); +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) +static int swpld_mux_select(struct i2c_adapter *adap, void *data, u8 chan) +{ + struct swpld_mux *mux = data; + u8 swpld_mux_val=0; + + if ( mux->data.base_nr == BUS3_BASE_NUM ) + { + switch (chan) { + case 0: + swpld_mux_val = TEMP_FAN_VAL; + break; + case 1: + swpld_mux_val = FAN_EEPROM1_VAL; + break; + case 2: + swpld_mux_val = FAN_EEPROM2_VAL; + break; + case 3: + swpld_mux_val = FAN_EEPROM3_VAL; + break; + case 4: + swpld_mux_val = FAN_EEPROM4_VAL; + break; + case 5: + swpld_mux_val = FAN_EEPROM5_VAL; + break; + case 6: + swpld_mux_val = FANIO_CTL_VAL; + break; + case 7: + case 8: + swpld_mux_val = FAN_CTRL_VAL; + break; + } + } + else if ( mux->data.base_nr == BUS4_BASE_NUM ) + { + switch (chan) { + case 0: + swpld_mux_val = PSU1_VAL; + break; + case 1: + swpld_mux_val = PSU2_VAL; + break; + case 2: + swpld_mux_val = HOT_SWAP1_VAL; + break; + case 3: + swpld_mux_val = HOT_SWAP2_VAL; + break; + } + } + else if ( mux->data.base_nr == BUS5_BASE_NUM ){ + if (chan < 9){ + swpld_mux_val = (u8)(chan) + 0x01; + } + else if (8 < chan && chan < 19){ + swpld_mux_val = (u8)(chan - 9) + 0x10; + } + else if (18 < chan && chan < 29){ + swpld_mux_val = (u8)(chan - 19) + 0x20; + } + else if (28 < chan && chan < 39){ + swpld_mux_val = (u8)(chan - 29) + 0x30; + } + else{ + swpld_mux_val = 0x00; + } + } + else + { + swpld_mux_val = 0x00; + } + return cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr, (u8)(swpld_mux_val & 0xff)); +} +#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) +static int swpld_mux_select(struct i2c_mux_core *muxc, u32 chan) +{ + struct swpld_mux *mux = i2c_mux_priv(muxc); + u8 swpld_mux_val=0; + + if ( mux->data.base_nr == BUS3_BASE_NUM ) + { + switch (chan) { + case 0: + swpld_mux_val = TEMP_FAN_VAL; + break; + case 1: + swpld_mux_val = FAN_EEPROM1_VAL; + break; + case 2: + swpld_mux_val = FAN_EEPROM2_VAL; + break; + case 3: + swpld_mux_val = FAN_EEPROM3_VAL; + break; + case 4: + swpld_mux_val = FAN_EEPROM4_VAL; + break; + case 5: + swpld_mux_val = FAN_EEPROM5_VAL; + break; + case 6: + swpld_mux_val = FANIO_CTL_VAL; + break; + case 7: + case 8: + swpld_mux_val = FAN_CTRL_VAL; + break; + } + } + else if ( mux->data.base_nr == BUS4_BASE_NUM ) + { + switch (chan) { + case 0: + swpld_mux_val = PSU1_VAL; + break; + case 1: + swpld_mux_val = PSU2_VAL; + break; + case 2: + swpld_mux_val = HOT_SWAP1_VAL; + break; + case 3: + swpld_mux_val = HOT_SWAP2_VAL; + break; + } + } + else if ( mux->data.base_nr == BUS5_BASE_NUM ){ + if (chan < 9){ + swpld_mux_val = (u8)(chan) + 0x01; + } + else if (8 < chan && chan < 19){ + swpld_mux_val = (u8)(chan - 9) + 0x10; + } + else if (18 < chan && chan < 29){ + swpld_mux_val = (u8)(chan - 19) + 0x20; + } + else if (28 < chan && chan < 39){ + swpld_mux_val = (u8)(chan - 29) + 0x30; + } + else{ + swpld_mux_val = 0x00; + } + } + else + { + swpld_mux_val = 0x00; + } + + return cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr, (u8)(swpld_mux_val & 0xff)); +} +#endif // #if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) +static int __init swpld_mux_probe(struct platform_device *pdev) +{ + struct swpld_mux *mux; + struct swpld_mux_platform_data *pdata; + struct i2c_adapter *parent; + int i, ret, dev_num; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", pdata->parent); + return -ENODEV; + } + /* Judge bus number to decide how many devices*/ + switch (pdata->parent) { + case BUS3: + dev_num = BUS3_DEV_NUM; + break; + case BUS4: + dev_num = BUS4_DEV_NUM; + break; + case BUS5: + dev_num = BUS5_DEV_NUM; + break; + default : + dev_num = DEFAULT_NUM; + break; + } + + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) { + ret = -ENOMEM; + printk(KERN_ERR "Failed to allocate memory for mux\n"); + goto alloc_failed; + } + + mux->parent = parent; + mux->data = *pdata; + mux->child = kzalloc(sizeof(struct i2c_adapter *) * dev_num, GFP_KERNEL); + if (!mux->child) { + ret = -ENOMEM; + printk(KERN_ERR "Failed to allocate memory for device on mux\n"); + goto alloc_failed2; + } + + for (i = 0; i < dev_num; i++) { + int nr = pdata->base_nr + i; + unsigned int class = 0; + + mux->child[i] = i2c_add_mux_adapter(parent, &pdev->dev, mux, + nr, i, class, + swpld_mux_select, NULL); + if (!mux->child[i]) { + ret = -ENODEV; + dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + goto add_adapter_failed; + } + } + + platform_set_drvdata(pdev, mux); + return 0; + +add_adapter_failed: + for (; i > 0; i--) + i2c_del_mux_adapter(mux->child[i - 1]); + kfree(mux->child); +alloc_failed2: + kfree(mux); +alloc_failed: + i2c_put_adapter(parent); + + return ret; +} +#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) +static int __init swpld_mux_probe(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc; + struct swpld_mux *mux; + struct swpld_mux_platform_data *pdata; + struct i2c_adapter *parent; + int i, ret, dev_num; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD platform data not found\n"); + return -ENODEV; + } + + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) { + printk(KERN_ERR "Failed to allocate memory for mux\n"); + return -ENOMEM; + } + mux->data = *pdata; + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + kfree(mux); + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", pdata->parent); + return -ENODEV; + } + + /* Judge bus number to decide how many devices*/ + switch (pdata->parent) { + case BUS3: + dev_num = BUS3_DEV_NUM; + break; + case BUS4: + dev_num = BUS4_DEV_NUM; + break; + case BUS5: + dev_num = BUS5_DEV_NUM; + break; + default : + dev_num = DEFAULT_NUM; + break; + } + + + + muxc = i2c_mux_alloc(parent, &pdev->dev, dev_num, 0, 0, + swpld_mux_select, NULL); + if (!muxc) { + ret = -ENOMEM; + goto alloc_failed; + } + muxc->priv = mux; + platform_set_drvdata(pdev, muxc); + + + for (i = 0; i < dev_num; i++) { + int nr = pdata->base_nr + i; + unsigned int class = 0; + + ret = i2c_mux_add_adapter(muxc, nr, i, class); + if (ret) { + dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + goto add_adapter_failed; + } + } + + dev_info(&pdev->dev, "%d port mux on %s adapter\n", dev_num, parent->name); + + return 0; + +add_adapter_failed: + i2c_mux_del_adapters(muxc); +alloc_failed: + kfree(mux); + i2c_put_adapter(parent); + + return ret; +} +#endif // #if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) +static int __exit swpld_mux_remove(struct platform_device *pdev) +{ + int i; + struct swpld_mux *mux = platform_get_drvdata(pdev); + struct swpld_mux_platform_data *pdata; + struct i2c_adapter *parent; + int dev_num; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -ENODEV; + } + switch (pdata->parent) { + case BUS3: + dev_num = BUS3_DEV_NUM; + break; + case BUS4: + dev_num = BUS4_DEV_NUM; + break; + case BUS5: + dev_num = BUS5_DEV_NUM; + break; + default : + dev_num = DEFAULT_NUM; + break; + } + + for (i = 0; i < dev_num; i++) + i2c_del_mux_adapter(mux->child[i]); + + platform_set_drvdata(pdev, NULL); + i2c_put_adapter(mux->parent); + kfree(mux->child); + kfree(mux); + + return 0; +} +#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) +static int __exit swpld_mux_remove(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc = platform_get_drvdata(pdev); + struct i2c_adapter *parent=muxc->parent; + + i2c_mux_del_adapters(muxc); + i2c_put_adapter(parent); + + return 0; +} +#endif + +static struct platform_driver swpld_mux_driver = { + .probe = swpld_mux_probe, + .remove = __exit_p(swpld_mux_remove), /* TODO */ + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v1-swpld-mux", + }, +}; +/*---------------- MUX - end ------------- */ + +/*---------------- module initialization ------------- */ +static int __init delta_ag9032v1_platform_init(void) +{ +// struct i2c_client *client; + struct i2c_adapter *adapter; + struct cpld_platform_data *cpld_pdata; + struct swpld_mux_platform_data *swpld_mux_pdata; + int ret,i = 0; + printk("ag9032v1_platform module initialization\n"); + + //Use pca9547 in i2c_mux_pca954x.c + adapter = i2c_get_adapter(BUS1); + //client = i2c_new_device(adapter, &i2c_info_pca9547[0]); + i2c_client_9547 = i2c_new_device(adapter, &i2c_info_pca9547[0]); + + i2c_put_adapter(adapter); + + // set the CPLD prob and remove + ret = platform_driver_register(&cpld_driver); + if (ret) { + printk(KERN_WARNING "Fail to register cpld driver\n"); + goto error_cpld_driver; + } + // register the mux prob which call the CPLD + ret = platform_driver_register(&swpld_mux_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld mux driver\n"); + goto error_swpld_mux_driver; + } + + // register the i2c devices + ret = platform_driver_register(&i2c_device_driver); + if (ret) { + printk(KERN_WARNING "Fail to register i2c device driver\n"); + goto error_i2c_device_driver; + } + + // register the CPLD + ret = platform_device_register(&ag9032v1_cpld); + if (ret) { + printk(KERN_WARNING "Fail to create cpld device\n"); + goto error_ag9032v1_cpld; + } + // link the CPLD and the Mux + cpld_pdata = ag9032v1_cpld.dev.platform_data; + + for (i = 0; i < ARRAY_SIZE(ag9032v1_swpld_mux); i++) + { + swpld_mux_pdata = ag9032v1_swpld_mux[i].dev.platform_data; + swpld_mux_pdata->cpld = cpld_pdata[system_cpld].client; + ret = platform_device_register(&ag9032v1_swpld_mux[i]); + if (ret) { + printk(KERN_WARNING "Fail to create swpld mux %d\n", i); + goto error_ag9032v1_swpld_mux; + } + } + + for (i = 0; i < ARRAY_SIZE(ag9032v1_i2c_device); i++) + { + ret = platform_device_register(&ag9032v1_i2c_device[i]); + if (ret) { + printk(KERN_WARNING "Fail to create i2c device %d\n", i); + goto error_ag9032v1_i2c_device; + } + } + + if (ret) + goto error_ag9032v1_swpld_mux; + + return 0; + +error_ag9032v1_i2c_device: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&ag9032v1_i2c_device[i]); + } + i = ARRAY_SIZE(ag9032v1_swpld_mux); +error_ag9032v1_swpld_mux: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&ag9032v1_swpld_mux[i]); + } + platform_driver_unregister((struct platform_driver *) &ag9032v1_cpld); +error_ag9032v1_cpld: + platform_driver_unregister(&i2c_device_driver); +error_i2c_device_driver: + platform_driver_unregister(&swpld_mux_driver); +error_swpld_mux_driver: + platform_driver_unregister(&cpld_driver); +error_cpld_driver: + return ret; +} + +static void __exit delta_ag9032v1_platform_exit(void) +{ + int i = 0; + + for ( i = 0; i < ARRAY_SIZE(ag9032v1_i2c_device); i++ ) { + platform_device_unregister(&ag9032v1_i2c_device[i]); + } + + for (i = 0; i < ARRAY_SIZE(ag9032v1_swpld_mux); i++) { + platform_device_unregister(&ag9032v1_swpld_mux[i]); + } + + platform_device_unregister(&ag9032v1_cpld); + platform_driver_unregister(&i2c_device_driver); + platform_driver_unregister(&cpld_driver); + platform_driver_unregister(&swpld_mux_driver); + + i2c_unregister_device(i2c_client_9547); +} + +module_init(delta_ag9032v1_platform_init); +module_exit(delta_ag9032v1_platform_exit); + +MODULE_DESCRIPTION("DNI ag9032v1 Platform Support"); +MODULE_AUTHOR("Neal Tai "); +MODULE_LICENSE("GPL"); \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/dni_ag9032v1_psu.c b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/dni_ag9032v1_psu.c new file mode 100644 index 00000000000..7d9350bc55b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/dni_ag9032v1_psu.c @@ -0,0 +1,550 @@ +/* + * An hwmon driver for delta AG9032v1 PSU + * dps_800ab_16_d.c - Support for DPS-800AB-16 D Power Supply Module + * + * Copyright (C) 2016 Delta Network Technology Corporation + * + * DNI + * + * Based on ym2651y.c + * Based on ad7414.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_FAN_DUTY_CYCLE 100 +#define SWPLD_REG 0x31 +#define SWPLD_PSU_MUX_REG 0x21 +#define SELECT_PSU1_EEPROM 0x00 +#define SELECT_PSU2_EEPROM 0x20 + +u8 psu_member_data = 0x00; + + +/* Address scanned */ +static const unsigned short normal_i2c[] = { 0x58, I2C_CLIENT_END }; + +/* This is additional data */ +struct dps_800ab_16_d_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; + unsigned long last_updated; /* In jiffies */ + + /* Registers value */ + u8 vout_mode; + u16 in1_input; + u16 in2_input; + u16 curr1_input; + u16 curr2_input; + u16 power1_input; + u16 power2_input; + u16 temp_input[2]; + u8 fan_target; + u16 fan_duty_cycle_input[2]; + u16 fan_speed_input[2]; + u8 mfr_model[16]; + u8 mfr_serial[16]; +}; + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask); +static ssize_t set_fan_duty_cycle_input(struct device *dev, struct device_attribute \ + *dev_attr, const char *buf, size_t count); +static ssize_t for_linear_data(struct device *dev, struct device_attribute \ + *dev_attr, char *buf); +static ssize_t for_fan_target(struct device *dev, struct device_attribute \ + *dev_attr, char *buf); +static ssize_t for_vout_data(struct device *dev, struct device_attribute \ + *dev_attr, char *buf); +static int dps_800ab_16_d_read_byte(struct i2c_client *client, u8 reg); +static int dps_800ab_16_d_read_word(struct i2c_client *client, u8 reg); +static int dps_800ab_16_d_write_word(struct i2c_client *client, u8 reg, \ + u16 value); +static int dps_800ab_16_d_read_block(struct i2c_client *client, u8 command, \ + u8 *data, int data_len); +static struct dps_800ab_16_d_data *dps_800ab_16_d_update_device( \ + struct device *dev); +static ssize_t for_ascii(struct device *dev, struct device_attribute \ + *dev_attr, char *buf); +static ssize_t set_w_member_data(struct device *dev, struct device_attribute \ + *dev_att, const char *buf, size_t count); +static ssize_t for_r_member_data(struct device *dev, struct device_attribute \ + *dev_attr, char *buf); + +enum dps_800ab_16_d_sysfs_attributes { + PSU_V_IN, + PSU_V_OUT, + PSU_I_IN, + PSU_I_OUT, + PSU_P_IN, + PSU_P_OUT, + PSU_TEMP1_INPUT, + PSU_FAN1_FAULT, + PSU_FAN1_DUTY_CYCLE, + PSU_FAN1_SPEED, + PSU_MFR_MODEL, + PSU_MFR_SERIAL, + PSU_SELECT_MEMBER, +}; + +static ssize_t set_w_member_data(struct device *dev, struct device_attribute \ + *dev_attr, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + long data; + int error; + if (attr->index == PSU_SELECT_MEMBER) { + error = kstrtol(buf, 16, &data); + if (error) + return error; + if (SELECT_PSU1_EEPROM == data) { + psu_member_data = SELECT_PSU1_EEPROM; + } else if (SELECT_PSU2_EEPROM == data) { + psu_member_data = SELECT_PSU2_EEPROM; + } else { + return -EINVAL; + } + } + return count; +} + +static ssize_t for_r_member_data(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + return sprintf(buf, "0x%02X\n", psu_member_data); +} + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static ssize_t set_fan_duty_cycle_input(struct device *dev, struct device_attribute \ + *dev_attr, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct i2c_client *client = to_i2c_client(dev); + struct dps_800ab_16_d_data *data = i2c_get_clientdata(client); + int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; + long speed; + int error; + + error = kstrtol(buf, 10, &speed); + if (error) + return error; + + if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) + return -EINVAL; + + /* Select SWPLD PSU offset */ + + mutex_lock(&data->update_lock); + data->fan_duty_cycle_input[nr] = speed; + dps_800ab_16_d_write_word(client, 0x3B + nr, data->fan_duty_cycle_input[nr]); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t for_linear_data(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct dps_800ab_16_d_data *data = dps_800ab_16_d_update_device(dev); + + u16 value = 0; + int exponent, mantissa; + int multiplier = 1000; + + switch (attr->index) { + case PSU_V_IN: + value = data->in1_input; + break; + case PSU_I_IN: + value = data->curr1_input; + break; + case PSU_I_OUT: + value = data->curr2_input; + break; + case PSU_P_IN: + value = data->power1_input; + multiplier = 1000*1000; + break; + case PSU_P_OUT: + value = data->power2_input; + multiplier = 1000*1000; + break; + case PSU_TEMP1_INPUT: + value = data->temp_input[0]; + break; + case PSU_FAN1_DUTY_CYCLE: + multiplier = 1; + value = data->fan_duty_cycle_input[0]; + break; + case PSU_FAN1_SPEED: + multiplier = 1; + value = data->fan_speed_input[0]; + break; + default: + break; + } + + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + + return (exponent >= 0) ? sprintf(buf, "%d\n", \ + (mantissa << exponent) * multiplier) : \ + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t for_fan_target(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct dps_800ab_16_d_data *data = dps_800ab_16_d_update_device(dev); + + u8 shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; + + return sprintf(buf, "%d\n", data->fan_target >> shift); +} + +static ssize_t for_vout_data(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + struct dps_800ab_16_d_data *data = dps_800ab_16_d_update_device(dev); + int exponent, mantissa; + int multiplier = 1000; + + exponent = two_complement_to_int(data->vout_mode, 5, 0x1f); + mantissa = data->in2_input; + + return (exponent > 0) ? sprintf(buf, "%d\n", \ + (mantissa * multiplier) / (1 << exponent)): \ + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t for_ascii(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct dps_800ab_16_d_data *data = dps_800ab_16_d_update_device(dev); + u8 *ptr = NULL; + + if (!data->valid) + return 0; + + switch (attr->index) { + case PSU_MFR_MODEL: + ptr = data->mfr_model + 1; + break; + case PSU_MFR_SERIAL: + ptr = data->mfr_serial + 1; + break; + default: + return 0; + } + return sprintf(buf, "%s\n", ptr); +} +static int dps_800ab_16_d_read_byte(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int dps_800ab_16_d_read_word(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_word_data(client, reg); +} + +static int dps_800ab_16_d_write_word(struct i2c_client *client, u8 reg, \ + u16 value) +{ + union i2c_smbus_data data; + data.word = value; + return i2c_smbus_xfer(client->adapter, client->addr, + client->flags |= I2C_CLIENT_PEC, + I2C_SMBUS_WRITE, reg, + I2C_SMBUS_WORD_DATA, &data); + +} + +static int dps_800ab_16_d_read_block(struct i2c_client *client, u8 command, \ + u8 *data, int data_len) +{ + int result = i2c_smbus_read_i2c_block_data(client, command, data_len, + data); + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + result = 0; +abort: + return result; + +} + +struct reg_data_byte { + u8 reg; + u8 *value; +}; + +struct reg_data_word { + u8 reg; + u16 *value; +}; + +static struct dps_800ab_16_d_data *dps_800ab_16_d_update_device( \ + struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct dps_800ab_16_d_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + /* Select SWPLD PSU offset */ + + if (time_after(jiffies, data->last_updated)) { + int i, status; + u8 command; + struct reg_data_byte regs_byte[] = { + {0x20, &data->vout_mode}, + {0x81, &data->fan_target} + }; + struct reg_data_word regs_word[] = { + {0x88, &data->in1_input}, + {0x8b, &data->in2_input}, + {0x89, &data->curr1_input}, + {0x8c, &data->curr2_input}, + {0x96, &data->power2_input}, + {0x97, &data->power1_input}, + {0x8d, &(data->temp_input[0])}, + {0x8e, &(data->temp_input[1])}, + {0x3b, &(data->fan_duty_cycle_input[0])}, + {0x90, &(data->fan_speed_input[0])}, + }; + + dev_dbg(&client->dev, "start data update\n"); + + /* one milliseconds from now */ + data->last_updated = jiffies + HZ / 1000; + + for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { + status = dps_800ab_16_d_read_byte(client, + regs_byte[i].reg); + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_byte[i].reg, status); + *(regs_byte[i].value) = 0; + } else { + *(regs_byte[i].value) = status; + } + } + + for (i = 0; i < ARRAY_SIZE(regs_word); i++) { + status = dps_800ab_16_d_read_word(client, + regs_word[i].reg); + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_word[i].reg, status); + *(regs_word[i].value) = 0; + } else { + *(regs_word[i].value) = status; + } + } + + command = 0x9a; /* PSU mfr_model */ + //data->mfr_model[1] = '\0'; + status = dps_800ab_16_d_read_block(client, command, + data->mfr_model, ARRAY_SIZE(data->mfr_model) - 1); + data->mfr_model[ARRAY_SIZE(data->mfr_model) - 1] = '\0'; + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command,status); + data->mfr_model[1] = '\0'; + } + + command = 0x9e; /* PSU mfr_serial */ + //data->mfr_serial[1] = '\0'; + status = dps_800ab_16_d_read_block(client, command, + data->mfr_serial, ARRAY_SIZE(data->mfr_serial) - 1); + data->mfr_serial[ARRAY_SIZE(data->mfr_serial) - 1] = '\0'; + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command,status); + data->mfr_serial[1] = '\0'; + } + + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; + +} + +/* sysfs attributes for hwmon */ +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, for_linear_data, NULL, PSU_V_IN); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, for_vout_data, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, for_linear_data, NULL, PSU_I_IN); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, for_linear_data, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, for_linear_data, NULL, PSU_P_IN); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, for_linear_data, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(temp1_input, \ + S_IRUGO, for_linear_data, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(fan1_target, \ + S_IRUGO, for_fan_target, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(fan1_set_percentage, S_IWUSR | S_IRUGO, \ + for_linear_data, set_fan_duty_cycle_input, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(fan1_input, \ + S_IRUGO, for_linear_data, NULL, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(psu_mfr_model, \ + S_IRUGO, for_ascii, NULL, PSU_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu_mfr_serial, \ + S_IRUGO, for_ascii, NULL, PSU_MFR_SERIAL); +static SENSOR_DEVICE_ATTR(psu_select_member, S_IWUSR | S_IRUGO, \ + for_r_member_data, set_w_member_data, PSU_SELECT_MEMBER); + +static struct attribute *dps_800ab_16_d_attributes[] = { + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_fan1_target.dev_attr.attr, + &sensor_dev_attr_fan1_set_percentage.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_psu_mfr_model.dev_attr.attr, + &sensor_dev_attr_psu_mfr_serial.dev_attr.attr, + &sensor_dev_attr_psu_select_member.dev_attr.attr, + NULL +}; + +static const struct attribute_group dps_800ab_16_d_group = { + .attrs = dps_800ab_16_d_attributes, +}; + +static int dps_800ab_16_d_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct dps_800ab_16_d_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(*data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "new chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &dps_800ab_16_d_group); + if (status) + goto exit_sysfs_create_group; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_hwmon_device_register; + } + + return 0; + +exit_hwmon_device_register: + sysfs_remove_group(&client->dev.kobj, &dps_800ab_16_d_group); +exit_sysfs_create_group: + kfree(data); +exit: + return status; +} + +static int dps_800ab_16_d_remove(struct i2c_client *client) +{ + struct dps_800ab_16_d_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &dps_800ab_16_d_group); + kfree(data); + + return 0; +} + +enum id_name { + dni_ag9032v1_psu, + dps_800ab_16_d +}; + +static const struct i2c_device_id dps_800ab_16_d_id[] = { + { "dni_ag9032v1_psu", dni_ag9032v1_psu }, + { "dps_800ab_16_d", dps_800ab_16_d }, + {} +}; +MODULE_DEVICE_TABLE(i2c, dps_800ab_16_d_id); + +/* This is the driver that will be inserted */ +static struct i2c_driver dps_800ab_16_d_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "dps_800ab_16_d", + }, + .probe = dps_800ab_16_d_probe, + .remove = dps_800ab_16_d_remove, + .id_table = dps_800ab_16_d_id, + .address_list = normal_i2c, +}; + +static int __init dps_800ab_16_d_init(void) +{ + return i2c_add_driver(&dps_800ab_16_d_driver); +} + +static void __exit dps_800ab_16_d_exit(void) +{ + i2c_del_driver(&dps_800ab_16_d_driver); +} + + +MODULE_AUTHOR("Aries Lin "); +MODULE_DESCRIPTION("DPS_800AB_16_D Driver"); +MODULE_LICENSE("GPL"); + +module_init(dps_800ab_16_d_init); +module_exit(dps_800ab_16_d_exit); diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/dni_emc2305.c b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/dni_emc2305.c new file mode 120000 index 00000000000..e8f7ae6b3f4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/modules/dni_emc2305.c @@ -0,0 +1 @@ +../../common/modules/dni_emc2305.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/scripts/ag9032v1_platform_init.sh b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/scripts/ag9032v1_platform_init.sh new file mode 100755 index 00000000000..b199ff34944 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/scripts/ag9032v1_platform_init.sh @@ -0,0 +1,12 @@ +#!/bin/bash + +#platform init script for Delta ag9032v1 + +#fan speed monitol start +/usr/share/sonic/device/x86_64-delta_ag9032v1-r0/fancontrol.service /usr/share/sonic/device/x86_64-delta_ag9032v1-r0/fancontrol & + +#set led status +/usr/local/bin/led_status.sh & + +exit 0 + diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v1/scripts/led_status.sh b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/scripts/led_status.sh new file mode 100755 index 00000000000..825e09aa4cf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v1/scripts/led_status.sh @@ -0,0 +1,225 @@ +#!/bin/bash + +FAN1_EEPROM="-y 31 0x51 0x0a" +FAN2_EEPROM="-y 32 0x52 0x0a" +FAN3_EEPROM="-y 33 0x53 0x0a" +FAN4_EEPROM="-y 34 0x54 0x0a" +FAN5_EEPROM="-y 35 0x55 0x0a" +LED_CONTROL="/sys/devices/platform/delta-ag9032v1-swpld.0/led_control" +FAN1_FRONT_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/i2c-37/37-002c/fan5_input" +FAN1_REAR_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/i2c-38/38-002d/fan5_input" +FAN2_FRONT_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/i2c-37/37-002c/fan4_input" +FAN2_REAR_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/i2c-38/38-002d/fan4_input" +FAN3_FRONT_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/i2c-37/37-002c/fan3_input" +FAN3_REAR_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/i2c-38/38-002d/fan3_input" +FAN4_FRONT_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/i2c-37/37-002c/fan2_input" +FAN4_REAR_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/i2c-38/38-002d/fan2_input" +FAN5_FRONT_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/i2c-37/37-002c/fan1_input" +FAN5_REAR_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-3/i2c-38/38-002d/fan1_input" + +PSU1_EEPROM="-y 40 0x50 0x00" +PSU2_EEPROM="-y 41 0x50 0x00" +PSU1_FAN_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-4/i2c-40/40-0058/fan1_input" +PSU2_FAN_RPM="/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-4/i2c-41/41-0058/fan1_input" + +catfaneeprom(){ + fan_eeprom_num=0 + i2cget $FAN1_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + fan_eeprom_num=$((fan_eeprom_num+1)) + elif [ "`echo $?`" -eq "2" ]; then + fan_eeprom_num=$((fan_eeprom_num)) + fi + i2cget $FAN2_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + fan_eeprom_num=$((fan_eeprom_num+1)) + elif [ "`echo $?`" -eq "2" ]; then + fan_eeprom_num=$((fan_eeprom_num_num)) + fi + + i2cget $FAN3_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + fan_eeprom_num=$((fan_eeprom_num+1)) + elif [ "`echo $?`" -eq "2" ]; then + fan_eeprom_num=$((fan_eeprom_num)) + fi + + i2cget $FAN4_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + fan_eeprom_num=$((fan_eeprom_num+1)) + elif [ "`echo $?`" -eq "2" ]; then + fan_eeprom_num=$((fan_eeprom_num)) + fi + + i2cget $FAN5_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + fan_eeprom_num=$((fan_eeprom_num+1)) + elif [ "`echo $?`" -eq "2" ]; then + fan_eeprom_num=$((fan_eeprom_num)) + fi +} + +catfanspeed(){ + fan_rpm_normal_num=0 + fan1_rpm_normal_num=0 + fan1_front_rpm=`cat $FAN1_FRONT_RPM` + fan1_rear_rpm=`cat $FAN1_REAR_RPM` + if [ "${fan1_front_rpm}" -ne "960" ] && [ "${fan1_rear_rpm}" -ne "960" ] && [ "${fan1_front_rpm}" -ne "0" ] && [ "${fan1_rear_rpm}" -ne "0" ]; then + fan1_rpm_normal_num=$((fan1_rpm_normal_num+1)) + elif [ "${fan1_front_rpm}" -eq "960" ] || [ "${fan1_rear_rpm}" -eq "960" ] || [ "${fan1_front_rpm}" -eq "0" ] || [ "${fan1_rear_rpm}" -eq "0" ]; then + fan1_rpm_normal_num=$((fan1_rpm_normal_num)) + fi + + fan2_rpm_normal_num=0 + fan2_front_rpm=`cat $FAN2_FRONT_RPM` + fan2_rear_rpm=`cat $FAN2_REAR_RPM` + if [ "${fan2_front_rpm}" -ne "960" ] && [ "${fan2_rear_rpm}" -ne "960" ] && [ "${fan2_front_rpm}" -ne "0" ] && [ "${fan2_rear_rpm}" -ne "0" ]; then + fan2_rpm_normal_num=$((fan2_rpm_normal_num+1)) + elif [ "${fan2_front_rpm}" -eq "960" ] || [ "${fan2_rear_rpm}" -eq "960" ] || [ "${fan2_front_rpm}" -eq "0" ] || [ "${fan2_rear_rpm}" -eq "0" ]; then + fan2_rpm_normal_num=$((fan2_rpm_normal_num)) + fi + + fan3_rpm_normal_num=0 + fan3_front_rpm=`cat $FAN3_FRONT_RPM` + fan3_rear_rpm=`cat $FAN3_REAR_RPM` + if [ "${fan3_front_rpm}" -ne "960" ] && [ "${fan3_rear_rpm}" -ne "960" ] && [ "${fan3_front_rpm}" -ne "0" ] && [ "${fan3_rear_rpm}" -ne "0" ]; then + fan3_rpm_normal_num=$((fan3_rpm_normal_num+1)) + elif [ "${fan3_front_rpm}" -eq "960" ] || [ "${fan3_rear_rpm}" -eq "960" ] || [ "${fan3_front_rpm}" -eq "0" ] || [ "${fan3_rear_rpm}" -eq "0" ]; then + fan3_rpm_normal_num=$((fan3_rpm_normal_num)) + fi + + fan4_rpm_normal_num=0 + fan4_front_rpm=`cat $FAN4_FRONT_RPM` + fan4_rear_rpm=`cat $FAN4_REAR_RPM` + if [ "${fan4_front_rpm}" -ne "960" ] && [ "${fan4_rear_rpm}" -ne "960" ] && [ "${fan4_front_rpm}" -ne "0" ] && [ "${fan4_rear_rpm}" -ne "0" ]; then + fan4_rpm_normal_num=$((fan4_rpm_normal_num+1)) + elif [ "${fan4_front_rpm}" -eq "960" ] || [ "${fan4_rear_rpm}" -eq "960" ] || [ "${fan4_front_rpm}" -eq "0" ] || [ "${fan4_rear_rpm}" -eq "0" ]; then + fan4_rpm_normal_num=$((fan4_rpm_normal_num)) + fi + + fan5_rpm_normal_num=0 + fan5_front_rpm=`cat $FAN5_FRONT_RPM` + fan5_rear_rpm=`cat $FAN5_REAR_RPM` + if [ "${fan5_front_rpm}" -ne "960" ] && [ "${fan5_rear_rpm}" -ne "960" ] && [ "${fan5_front_rpm}" -ne "0" ] && [ "${fan5_rear_rpm}" -ne "0" ]; then + fan5_rpm_normal_num=$((fan5_rpm_normal_num+1)) + elif [ "${fan5_front_rpm}" -eq "960" ] || [ "${fan5_rear_rpm}" -eq "960" ] || [ "${fan5_front_rpm}" -eq "0" ] || [ "${fan5_rear_rpm}" -eq "0" ]; then + fan5_rpm_normal_num=$((fan5_rpm_normal_num)) + fi + + fan_rpm_normal_num=$((fan1_rpm_normal_num+fan2_rpm_normal_num+fan3_rpm_normal_num+fan4_rpm_normal_num+fan5_rpm_normal_num)) + +} + +catpsueeprom(){ + psu1_eeprom_num=0 + i2cget $PSU1_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + psu1_eeprom_num=$((psu1_eeprom_num+1)) + elif [ "`echo $?`" -eq "2" ]; then + psu1_eeprom_num=$((psu1_eeprom_num)) + fi + + psu2_eeprom_num=0 + i2cget $PSU2_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + psu2_eeprom_num=$((psu2_eeprom_num+1)) + elif [ "`echo $?`" -eq "2" ]; then + psu2_eeprom_num=$((psu2_eeprom_num)) + fi +} + +catpsufanspeed(){ + + psu1_rpm_normal_num=0 + psu1_rpm=`cat $PSU1_FAN_RPM` + + if [ "${psu1_rpm}" -ne "960" ] && [ "${psu1_rpm}" -ne "0" ]; then + psu1_rpm_normal_num=$((psu1_rpm_normal_num+1)) + elif [ "${psu1_rpm}" -eq "960" ] || [ "${psu1_rpm}" -eq "0" ]; then + psu1_rpm_normal_num=$((psu1_rpm_normal_num)) + fi + + psu2_rpm_normal_num=0 + psu2_rpm=`cat $PSU2_FAN_RPM` + + if [ "${psu2_rpm}" -ne "960" ] && [ "${psu2_rpm}" -ne "0" ]; then + psu2_rpm_normal_num=$((psu2_rpm_normal_num+1)) + elif [ "${psu2_rpm}" -eq "960" ] || [ "${psu2_rpm}" -eq "0" ]; then + psu2_rpm_normal_num=$((psu2_rpm_normal_num)) + fi + +} + +setfanled(){ + if [ "${fan_eeprom_num}" -eq "5" ] && [ "${fan_rpm_normal_num}" -eq "5" ]; then + echo "fan_green" > $LED_CONTROL + elif [ "${fan_eeprom_num}" -lt "5" ] || [ "${fan_rpm_normal_num}" -lt "5" ]; then + echo "fan_amber" > $LED_CONTROL + fi +} + +setpsuled(){ + if [ "${psu1_eeprom_num}" -eq "1" ] && [ "${psu1_rpm_normal_num}" -eq "1" ]; then + echo "pwr1_green" > $LED_CONTROL + elif [ "${psu1_eeprom_num}" -eq "0" ] || [ "${psu1_rpm_normal_num}" -eq "0" ]; then + echo "pwr1_amber" > $LED_CONTROL + fi + + if [ "${psu2_eeprom_num}" -eq "1" ] && [ "${psu2_rpm_normal_num}" -eq "1" ]; then + echo "pwr2_green" > $LED_CONTROL + elif [ "${psu2_eeprom_num}" -eq "0" ] || [ "${psu2_rpm_normal_num}" -eq "0" ]; then + echo "pwr2_amber" > $LED_CONTROL + fi +} + +setfantrayled(){ + if [ "${fan1_rpm_normal_num}" -eq "1" ]; then + echo "fan1_green" > $LED_CONTROL + else + echo "fan1_red" > $LED_CONTROL + fi + + if [ "${fan2_rpm_normal_num}" -eq "1" ]; then + echo "fan2_green" > $LED_CONTROL + else + echo "fan2_red" > $LED_CONTROL + fi + + if [ "${fan3_rpm_normal_num}" -eq "1" ]; then + echo "fan3_green" > $LED_CONTROL + else + echo "fan3_red" > $LED_CONTROL + fi + + if [ "${fan4_rpm_normal_num}" -eq "1" ]; then + echo "fan4_green" > $LED_CONTROL + else + echo "fan4_red" > $LED_CONTROL + fi + + if [ "${fan5_rpm_normal_num}" -eq "1" ]; then + echo "fan5_green" > $LED_CONTROL + else + echo "fan5_red" > $LED_CONTROL + fi +} + +platformstatus(){ + + echo "sys_green" > $LED_CONTROL + catfaneeprom + catfanspeed + setfanled + setfantrayled + + catpsueeprom + catpsufanspeed + setpsuled +} + +while true +do + platformstatus + sleep 1 +done + diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v2a/cfg/ag9032v2a-modules.conf b/platform/broadcom/sonic-platform-modules-delta/ag9032v2a/cfg/ag9032v2a-modules.conf new file mode 100644 index 00000000000..552b4103ed0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v2a/cfg/ag9032v2a-modules.conf @@ -0,0 +1,13 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus +i2c-mux-gpio +i2c-mux-pca954x diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v2a/modules/Makefile b/platform/broadcom/sonic-platform-modules-delta/ag9032v2a/modules/Makefile new file mode 100644 index 00000000000..185357033df --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v2a/modules/Makefile @@ -0,0 +1 @@ +obj-m += delta_ag9032v2a_platform.o diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v2a/modules/delta_ag9032v2a_platform.c b/platform/broadcom/sonic-platform-modules-delta/ag9032v2a/modules/delta_ag9032v2a_platform.c new file mode 100644 index 00000000000..85719af7ea9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v2a/modules/delta_ag9032v2a_platform.c @@ -0,0 +1,1781 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define CPUPLD_ADDR 0x31 +#define SWPLD1_ADDR 0x6a +#define SWPLD2_ADDR 0x73 +#define SWPLD3_ADDR 0x75 +#define MUX_VAL_SWPLD 0xff +#define MUX_VAL_IDEEPROM 0xfc +#define MUX_VAL_PCA9548 0xfd +#define DEF_DEV_NUM 1 +#define BUS0_DEV_NUM 3 +#define BUS0_BASE_NUM 1 +#define BUS0_MUX_REG 0x14 +#define BUS3_DEV_NUM 33 +#define BUS3_BASE_NUM 20 +#define BUS3_MUX_REG 0x1f +#define QSFP_PRESENCE_1 0x12 +#define QSFP_PRESENCE_2 0x13 +#define QSFP_PRESENCE_3 0x14 +#define QSFP_PRESENCE_4 0x15 +#define SFP_PRESENCE_5 0x02 +#define QSFP_LPMODE_1 0x0E +#define QSFP_LPMODE_2 0x0F +#define QSFP_LPMODE_3 0x10 +#define QSFP_LPMODE_4 0x11 +#define QSFP_RESET_1 0x16 +#define QSFP_RESET_2 0x17 +#define QSFP_RESET_3 0x18 +#define QSFP_RESET_4 0x19 + + +struct mutex dni_lock; +void device_release(struct device *dev) +{ + return; +} + +unsigned char dni_log2 (unsigned char num){ + unsigned char num_log2 = 0; + while(num > 0){ + num = num >> 1; + num_log2 += 1; + } + return num_log2 -1; +} + +unsigned char reverse_8bits(unsigned char c) +{ + unsigned char s = 0; + int i; + for (i = 0; i < 8; ++i) { + s <<= 1; + s |= c & 1; + c >>= 1; + } + return s; +} + +enum{ + BUS0 = 0, + BUS1, + BUS2, + BUS3, + BUS4, + BUS5, + BUS6, + BUS7, + BUS8, + BUS9, + BUS10, + BUS11, + BUS12, + BUS13, + BUS14, +}; + +#define ag9032v2a_i2c_device_num(NUM){ \ + .name = "delta-ag9032v2a-i2c-device", \ + .id = NUM, \ + .dev = { \ + .platform_data = &ag9032v2a_i2c_device_platform_data[NUM], \ + .release = device_release, \ + }, \ +} + +struct cpld_attribute_data { + uint8_t bus; + uint8_t addr; + uint8_t reg; + uint8_t mask; + char note[200]; +}; + +enum cpld_type { + system_cpld, +}; + +enum swpld1_type { + swpld1, +}; + +enum swpld2_type { + swpld2, +}; + +enum swpld3_type { + swpld3, +}; + +struct cpld_platform_data { + int reg_addr; + struct i2c_client *client; +}; + +enum cpld_attributes { + CPLD_REG_ADDR, + CPLD_REG_VALUE, + SWPLD1_REG_ADDR, + SWPLD1_REG_VALUE, + SWPLD2_REG_ADDR, + SWPLD2_REG_VALUE, + SWPLD3_REG_ADDR, + SWPLD3_REG_VALUE, +}; + +enum ag9032v2a_sfp_sysfs_attributes +{ + SFP_IS_PRESENT, + QSFP_LPMODE, + QSFP_RESET, +}; + +static struct cpld_attribute_data attribute_data[] = { + [CPLD_REG_ADDR] = { + }, + [CPLD_REG_VALUE] = { + }, + [SWPLD1_REG_ADDR] = { + }, + [SWPLD1_REG_VALUE] = { + }, + [SWPLD2_REG_ADDR] = { + }, + [SWPLD2_REG_VALUE] = { + }, + [SWPLD3_REG_ADDR] = { + }, +}; +struct i2c_device_platform_data { + int parent; + struct i2c_board_info info; + struct i2c_client *client; +}; + +struct i2c_client * i2c_client_9548; + +static struct cpld_platform_data ag9032v2a_cpld_platform_data[] = { + [system_cpld] = { + .reg_addr = CPUPLD_ADDR, + }, +}; + +static struct cpld_platform_data ag9032v2a_swpld1_platform_data[] = { + [swpld1] = { + .reg_addr = SWPLD1_ADDR, + }, +}; + +static struct cpld_platform_data ag9032v2a_swpld2_platform_data[] = { + [swpld2] = { + .reg_addr = SWPLD2_ADDR, + }, +}; + +static struct cpld_platform_data ag9032v2a_swpld3_platform_data[] = { + [swpld3] = { + .reg_addr = SWPLD3_ADDR, + }, +}; + +// pca9548 - add 8 bus +static struct pca954x_platform_mode pca954x_mode[] = +{ + { + .adap_id = 10, + .deselect_on_exit = 1, + }, + { + .adap_id = 11, + .deselect_on_exit = 1, + }, + { + .adap_id = 12, + .deselect_on_exit = 1, + }, + { + .adap_id = 13, + .deselect_on_exit = 1, + }, + { + .adap_id = 14, + .deselect_on_exit = 1, + }, + { + .adap_id = 15, + .deselect_on_exit = 1, + }, + { + .adap_id = 16, + .deselect_on_exit = 1, + }, + { + .adap_id = 17, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_data pca954x_data = +{ + .modes = pca954x_mode, + .num_modes = ARRAY_SIZE(pca954x_mode), +}; + +static struct i2c_board_info __initdata i2c_info_pca9548[] = +{ + { + I2C_BOARD_INFO("pca9548", 0x71), + .platform_data = &pca954x_data, + }, +}; + +/*---------------- I2C device - start ------------- */ +static struct i2c_device_platform_data ag9032v2a_i2c_device_platform_data[] = { + { + // id eeprom + .parent = 1, + .info = { I2C_BOARD_INFO("24c02", 0x53) }, + .client = NULL, + }, + { + // qsfp 1 (0x50) + .parent = 20, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 2 (0x50) + .parent = 21, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 3 (0x50) + .parent = 22, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 4 (0x50) + .parent = 23, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 5 (0x50) + .parent = 24, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 6 (0x50) + .parent = 25, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 7 (0x50) + .parent = 26, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 8 (0x50) + .parent = 27, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 9 (0x50) + .parent = 28, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 10 (0x50) + .parent = 29, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 11 (0x50) + .parent = 30, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 12 (0x50) + .parent = 31, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 13 (0x50) + .parent = 32, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 14 (0x50) + .parent = 33, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 15 (0x50) + .parent = 34, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 16 (0x50) + .parent = 35, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 17 (0x50) + .parent = 36, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 18 (0x50) + .parent = 37, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 19 (0x50) + .parent = 38, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 20 (0x50) + .parent = 39, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 21 (0x50) + .parent = 40, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 22 (0x50) + .parent = 41, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 23 (0x50) + .parent = 42, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 24 (0x50) + .parent = 43, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 25 (0x50) + .parent = 44, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 26 (0x50) + .parent = 45, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 27 (0x50) + .parent = 46, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 28 (0x50) + .parent = 47, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 29 (0x50) + .parent = 48, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 30 (0x50) + .parent = 49, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 31 (0x50) + .parent = 50, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // qsfp 32 (0x50) + .parent = 51, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + // sfp 1 (0x50) + .parent = 52, + .info = { .type = "optoe2", .addr = 0x50 }, + .client = NULL, + }, +}; + +static struct platform_device ag9032v2a_i2c_device[] = { + ag9032v2a_i2c_device_num(0), + ag9032v2a_i2c_device_num(1), + ag9032v2a_i2c_device_num(2), + ag9032v2a_i2c_device_num(3), + ag9032v2a_i2c_device_num(4), + ag9032v2a_i2c_device_num(5), + ag9032v2a_i2c_device_num(6), + ag9032v2a_i2c_device_num(7), + ag9032v2a_i2c_device_num(8), + ag9032v2a_i2c_device_num(9), + ag9032v2a_i2c_device_num(10), + ag9032v2a_i2c_device_num(11), + ag9032v2a_i2c_device_num(12), + ag9032v2a_i2c_device_num(13), + ag9032v2a_i2c_device_num(14), + ag9032v2a_i2c_device_num(15), + ag9032v2a_i2c_device_num(16), + ag9032v2a_i2c_device_num(17), + ag9032v2a_i2c_device_num(18), + ag9032v2a_i2c_device_num(19), + ag9032v2a_i2c_device_num(20), + ag9032v2a_i2c_device_num(21), + ag9032v2a_i2c_device_num(22), + ag9032v2a_i2c_device_num(23), + ag9032v2a_i2c_device_num(24), + ag9032v2a_i2c_device_num(25), + ag9032v2a_i2c_device_num(26), + ag9032v2a_i2c_device_num(27), + ag9032v2a_i2c_device_num(28), + ag9032v2a_i2c_device_num(29), + ag9032v2a_i2c_device_num(30), + ag9032v2a_i2c_device_num(31), + ag9032v2a_i2c_device_num(32), + ag9032v2a_i2c_device_num(33), +}; + +/*---------------- I2C device - end ------------- */ + +/*---------------- I2C driver - start ------------- */ + +static int __init i2c_device_probe(struct platform_device *pdev) +{ + struct i2c_device_platform_data *pdata; + struct i2c_adapter *parent; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -ENODEV; + } + + pdata->client = i2c_new_device(parent, &pdata->info); + if (!pdata->client) { + dev_err(&pdev->dev, "Failed to create i2c client %s at %d\n", + pdata->info.type, pdata->parent); + return -ENODEV; + } + + return 0; +} + +static int __exit i2c_deivce_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent; + struct i2c_device_platform_data *pdata; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + if (pdata->client) { + parent = (pdata->client)->adapter; + i2c_unregister_device(pdata->client); + i2c_put_adapter(parent); + } + + return 0; +} +static struct platform_driver i2c_device_driver = { + .probe = i2c_device_probe, + .remove = __exit_p(i2c_deivce_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v2a-i2c-device", + } +}; + +/*---------------- I2C driver - end ------------- */ + +/*---------------- SFP attribute read/write - start -------- */ +static struct kobject *kobj_swpld1; +static struct kobject *kobj_swpld2; +static struct kobject *kobj_swpld3; + +static ssize_t for_status(struct device *dev, struct device_attribute *dev_attr, char *buf){ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct device *i2cdev_1 = kobj_to_dev(kobj_swpld1); + struct device *i2cdev_2 = kobj_to_dev(kobj_swpld2); + struct cpld_platform_data *pdata1 = i2cdev_1->platform_data; + struct cpld_platform_data *pdata2 = i2cdev_2->platform_data; + int ret; + int ret_sfp; + u64 data = 0; + + mutex_lock(&dni_lock); + switch (attr->index) { + case SFP_IS_PRESENT: + /*QSFP25~32*/ + ret = i2c_smbus_read_byte_data(pdata1[swpld1].client, QSFP_PRESENCE_4); + data = (u32)ret & 0xff; + /*QSFP17~24*/ + ret = i2c_smbus_read_byte_data(pdata1[swpld1].client, QSFP_PRESENCE_3); + data |= ((u32)ret & 0xff) << 8; + /*QSFP9~16*/ + ret = i2c_smbus_read_byte_data(pdata1[swpld1].client, QSFP_PRESENCE_2); + data |= (u32)(ret & 0xff) << 16; + /*QSFP1~8*/ + ret = i2c_smbus_read_byte_data(pdata1[swpld1].client, QSFP_PRESENCE_1); + data |= (u32)(ret & 0xff) << 24; + + ret = i2c_smbus_read_byte_data(pdata2[swpld2].client, SFP_PRESENCE_5); + ret_sfp = (ret & (0x80)); + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%x%02x\n", data, ret_sfp); + + case QSFP_LPMODE: + /*QSFP25~32*/ + ret = i2c_smbus_read_byte_data(pdata1[swpld1].client, QSFP_LPMODE_4); + data = (u32)(ret & 0xff); + /*QSFP17~24*/ + ret = i2c_smbus_read_byte_data(pdata1[swpld1].client, QSFP_LPMODE_3); + data |= (u32)(ret & 0xff) << 8; + /*QSFP9~16*/ + ret = i2c_smbus_read_byte_data(pdata1[swpld1].client, QSFP_LPMODE_2); + data |= (u32)(ret & 0xff) << 16; + /*QSFP1~8*/ + ret = i2c_smbus_read_byte_data(pdata1[swpld1].client, QSFP_LPMODE_1); + data |= (u32)(ret & 0xff) << 24; + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%x\n", data); + + case QSFP_RESET: + /*QSFP25~32*/ + ret = i2c_smbus_read_byte_data(pdata1[swpld1].client, QSFP_RESET_4); + data = (u32)(ret & 0xff); + /*QSFP17~24*/ + ret = i2c_smbus_read_byte_data(pdata1[swpld1].client, QSFP_RESET_3); + data |= (u32)(ret & 0xff) << 8; + /*QSFP9~16*/ + ret = i2c_smbus_read_byte_data(pdata1[swpld1].client, QSFP_RESET_2); + data |= (u32)(ret & 0xff) << 16; + /*QSFP1~8*/ + ret = i2c_smbus_read_byte_data(pdata1[swpld1].client, QSFP_RESET_1); + data |= (u32)(ret & 0xff) << 24; + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%x\n", data); + + default: + mutex_unlock(&dni_lock); + return sprintf(buf, "%d not found", attr->index); + } +} + +static ssize_t set_lpmode_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count) +{ + struct device *i2cdev = kobj_to_dev(kobj_swpld1); + struct cpld_platform_data *pdata = i2cdev->platform_data; + unsigned long long set_data; + int err; + int status = 0; + unsigned char set_bytes; + + + err = kstrtoull(buf, 16, &set_data); + if (err){ + return err; + } + mutex_lock(&dni_lock); + /*QSFP25~32*/ + set_bytes = set_data & 0xff; + status = i2c_smbus_write_byte_data(pdata[swpld1].client, QSFP_LPMODE_4, set_bytes); + if(status < 0) + { + goto ERROR; + } + + /*QSFP17~24*/ + set_bytes = (set_data >> 8 ) & 0xff; + status = i2c_smbus_write_byte_data(pdata[swpld1].client, QSFP_LPMODE_3, set_bytes); + if(status < 0) + { + goto ERROR; + } + + /*QSFP9~16*/ + set_bytes = (set_data >> 16 ) & 0xff; + status = i2c_smbus_write_byte_data(pdata[swpld1].client, QSFP_LPMODE_2, set_bytes); + if(status < 0) + { + goto ERROR; + } + + /*QSFP1~8*/ + set_bytes = (set_data >> 24 ) & 0xff; + status = i2c_smbus_write_byte_data(pdata[swpld1].client, QSFP_LPMODE_1, set_bytes); + if(status < 0) + { + goto ERROR; + } + + mutex_unlock(&dni_lock); + return count; + +ERROR: + mutex_unlock(&dni_lock); + return status; + +} + +static ssize_t set_reset_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count) +{ + struct device *i2cdev = kobj_to_dev(kobj_swpld1); + struct cpld_platform_data *pdata = i2cdev->platform_data; + unsigned long long set_data; + int err; + int status = 0; + unsigned char set_bytes; + + err = kstrtoull(buf, 16, &set_data); + if (err){ + return err; + } + + mutex_lock(&dni_lock); + /*QSFP25~32*/ + set_bytes = set_data & 0xff; + status = i2c_smbus_write_byte_data(pdata[swpld1].client, QSFP_RESET_4, set_bytes); + if(status < 0) + { + goto ERROR; + } + + /*QSFP17~24*/ + set_bytes = (set_data >> 8 ) & 0xff; + status = i2c_smbus_write_byte_data(pdata[swpld1].client, QSFP_RESET_3, set_bytes); + if(status < 0) + { + goto ERROR; + } + + /*QSFP9~16*/ + set_bytes = (set_data >> 16 ) & 0xff; + status = i2c_smbus_write_byte_data(pdata[swpld1].client, QSFP_RESET_2, set_bytes); + if(status < 0) + { + goto ERROR; + } + + /*QSFP1~8*/ + set_bytes = (set_data >> 24 ) & 0xff; + status = i2c_smbus_write_byte_data(pdata[swpld1].client, QSFP_RESET_1, set_bytes); + if(status < 0) + { + goto ERROR; + } + + mutex_unlock(&dni_lock); + return count; +ERROR: + mutex_unlock(&dni_lock); + return status; +} + + +/*---------------- SFP attribute read/write - end -------- */ + +/*---------------- CPLD - start ------------- */ +unsigned char cpupld_reg_addr; +unsigned char swpld1_reg_addr; +unsigned char swpld2_reg_addr; +unsigned char swpld3_reg_addr; +/* CPLD -- device */ +static struct platform_device cpld_device = { + .name = "delta-ag9032v2a-cpld", + .id = 0, + .dev = { + .platform_data = ag9032v2a_cpld_platform_data, + .release = device_release + }, + +}; + +static struct platform_device swpld1_device = { + .name = "delta-ag9032v2a-swpld1", + .id = 0, + .dev = { + .platform_data = ag9032v2a_swpld1_platform_data, + .release = device_release + }, +}; + +static struct platform_device swpld2_device = { + .name = "delta-ag9032v2a-swpld2", + .id = 0, + .dev = { + .platform_data = ag9032v2a_swpld2_platform_data, + .release = device_release + }, +}; + +static struct platform_device swpld3_device = { + .name = "delta-ag9032v2a-swpld3", + .id = 0, + .dev = { + .platform_data = ag9032v2a_swpld3_platform_data, + .release = device_release + }, +}; + +static ssize_t get_cpld_reg(struct device *dev, struct device_attribute *dev_attr, char *buf) +{ + int ret; + int mask; + int value; + char note[200]; + unsigned char reg; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cpld_platform_data *pdata = dev->platform_data; + + mutex_lock(&dni_lock); + switch (attr->index) { + case CPLD_REG_ADDR: + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", cpupld_reg_addr); + case SWPLD1_REG_ADDR: + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", swpld1_reg_addr); + case SWPLD2_REG_ADDR: + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", swpld2_reg_addr); + case SWPLD3_REG_ADDR: + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", swpld3_reg_addr); + case SWPLD1_REG_VALUE: + ret = i2c_smbus_read_byte_data(pdata[swpld1].client, swpld1_reg_addr); + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", ret); + case SWPLD2_REG_VALUE: + ret = i2c_smbus_read_byte_data(pdata[swpld2].client, swpld2_reg_addr); + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", ret); + case SWPLD3_REG_VALUE: + ret = i2c_smbus_read_byte_data(pdata[swpld3].client, swpld3_reg_addr); + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", ret); + default: + mutex_unlock(&dni_lock); + return sprintf(buf, "%d not found", attr->index); + } + + switch (mask) + { + case 0xff: + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x%s", value, note); + case 0x0f: + case 0x03: + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%01x%s", value, note); + case 0x0c: + mutex_unlock(&dni_lock); + value = value >> 2; + return sprintf(buf, "0x%01x%s", value, note); + case 0xf0: + mutex_unlock(&dni_lock); + value = value >> 4; + return sprintf(buf, "0x%01x%s", value, note); + case 0xe0: + mutex_unlock(&dni_lock); + value = value >> 5; + return sprintf(buf, "0x%01x%s", value, note); + default : + value = value >> dni_log2(mask); + mutex_unlock(&dni_lock); + return sprintf(buf, "%d%s", value, note); + } +} + +static ssize_t set_cpld_reg(struct device *dev, struct device_attribute *dev_attr, + const char *buf, size_t count) +{ + int err; + int value; + int set_data; + unsigned long set_data_ul; + unsigned char reg; + unsigned char mask; + unsigned char mask_out; + + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 0, &set_data_ul); + if (err){ + return err; + } + + set_data = (int)set_data_ul; + if (set_data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + return count; + } + + mutex_lock(&dni_lock); + switch (attr->index) + { + case CPLD_REG_ADDR: + cpupld_reg_addr = set_data; + mutex_unlock(&dni_lock); + return count; + case SWPLD1_REG_ADDR: + swpld1_reg_addr = set_data; + mutex_unlock(&dni_lock); + return count; + case SWPLD2_REG_ADDR: + swpld2_reg_addr = set_data; + mutex_unlock(&dni_lock); + return count; + case SWPLD3_REG_ADDR: + swpld3_reg_addr = set_data; + mutex_unlock(&dni_lock); + return count; + case CPLD_REG_VALUE: + i2c_smbus_write_byte_data(pdata[system_cpld].client, cpupld_reg_addr, set_data); + mutex_unlock(&dni_lock); + return count; + case SWPLD1_REG_VALUE: + i2c_smbus_write_byte_data(pdata[swpld1].client, swpld1_reg_addr, set_data); + mutex_unlock(&dni_lock); + return count; + case SWPLD2_REG_VALUE: + i2c_smbus_write_byte_data(pdata[swpld2].client, swpld2_reg_addr, set_data); + mutex_unlock(&dni_lock); + return count; + case SWPLD3_REG_VALUE: + i2c_smbus_write_byte_data(pdata[swpld3].client, swpld3_reg_addr, set_data); + mutex_unlock(&dni_lock); + return count; + default: + mutex_unlock(&dni_lock); + return sprintf(buf, "%d not found", attr->index); + } + + switch (mask) { + case 0x03: + case 0x0C: + case 0x0F: + case 0xFF: + set_data = mask_out | (set_data & mask); + break; + case 0xF0: + set_data = set_data << 4; + set_data = mask_out | (set_data & mask); + break; + case 0xE0: + set_data = set_data << 5; + set_data = mask_out | (set_data & mask); + break; + default : + set_data = mask_out | (set_data << dni_log2(mask) ); + } + + switch (attr->index) { + default: + mutex_unlock(&dni_lock); + return sprintf(buf, "cpld not found"); + } + mutex_unlock(&dni_lock); + return count; +} + +//address and value +static SENSOR_DEVICE_ATTR(cpld_reg_addr, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, CPLD_REG_ADDR); +static SENSOR_DEVICE_ATTR(cpld_reg_value, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, CPLD_REG_VALUE); +static SENSOR_DEVICE_ATTR(swpld1_reg_addr, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, SWPLD1_REG_ADDR); +static SENSOR_DEVICE_ATTR(swpld1_reg_value, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, SWPLD1_REG_VALUE); +static SENSOR_DEVICE_ATTR(swpld2_reg_addr, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, SWPLD2_REG_ADDR); +static SENSOR_DEVICE_ATTR(swpld2_reg_value, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, SWPLD2_REG_VALUE); +static SENSOR_DEVICE_ATTR(swpld3_reg_addr, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, SWPLD3_REG_ADDR); +static SENSOR_DEVICE_ATTR(swpld3_reg_value, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, SWPLD3_REG_VALUE); + +//QSFP +static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, for_status, NULL, SFP_IS_PRESENT); +static SENSOR_DEVICE_ATTR(qsfp_lpmode, S_IRUGO | S_IWUSR, for_status, set_lpmode_data, QSFP_LPMODE); +static SENSOR_DEVICE_ATTR(qsfp_reset, S_IRUGO | S_IWUSR, for_status, set_reset_data, QSFP_RESET); + +static struct attribute *cpld_attrs[] = { + &sensor_dev_attr_cpld_reg_value.dev_attr.attr, + &sensor_dev_attr_cpld_reg_addr.dev_attr.attr, + NULL, +}; + +static struct attribute *swpld1_attrs[] = { + //SWPLD1 + &sensor_dev_attr_swpld1_reg_value.dev_attr.attr, + &sensor_dev_attr_swpld1_reg_addr.dev_attr.attr, + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_qsfp_lpmode.dev_attr.attr, + &sensor_dev_attr_qsfp_reset.dev_attr.attr, + NULL, +}; + +static struct attribute *swpld2_attrs[] = { + &sensor_dev_attr_swpld2_reg_value.dev_attr.attr, + &sensor_dev_attr_swpld2_reg_addr.dev_attr.attr, + NULL, +}; + +static struct attribute *swpld3_attrs[] = { + &sensor_dev_attr_swpld3_reg_value.dev_attr.attr, + &sensor_dev_attr_swpld3_reg_addr.dev_attr.attr, + NULL, +}; + +static struct attribute_group cpld_attr_grp = { + .attrs = cpld_attrs, +}; + +static struct attribute_group swpld1_attr_grp = { + .attrs = swpld1_attrs, +}; + +static struct attribute_group swpld2_attr_grp = { + .attrs = swpld2_attrs, +}; + +static struct attribute_group swpld3_attr_grp = { + .attrs = swpld3_attrs, +}; + +static int __init cpld_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "CPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(BUS0); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", BUS0); + return -ENODEV; + } + + pdata[system_cpld].client = i2c_new_dummy(parent, pdata[system_cpld].reg_addr); + if (!pdata[system_cpld].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[system_cpld].reg_addr); + goto error; + } + + ret = sysfs_create_group(&pdev->dev.kobj, &cpld_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + return 0; + +error: + i2c_unregister_device(pdata[system_cpld].client); + i2c_put_adapter(parent); + + return -ENODEV; +} + +static int __init swpld1_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD1 platform data not found\n"); + return -ENODEV; + } + parent = i2c_get_adapter(BUS3); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", BUS1); + return -ENODEV; + } + + pdata[swpld1].client = i2c_new_dummy(parent, pdata[swpld1].reg_addr); + if (!pdata[swpld1].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[swpld1].reg_addr); + goto error; + } + + kobj_swpld1 = &pdev->dev.kobj; + ret = sysfs_create_group(&pdev->dev.kobj, &swpld1_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create swpld attribute group"); + goto error; + } + return 0; + +error: + kobject_put(kobj_swpld1); + i2c_unregister_device(pdata[swpld1].client); + i2c_put_adapter(parent); + return -ENODEV; +} + +static int __init swpld2_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD2 platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(BUS3); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", BUS1); + return -ENODEV; + } + + pdata[swpld2].client = i2c_new_dummy(parent, pdata[swpld2].reg_addr); + if (!pdata[swpld2].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[swpld2].reg_addr); + goto error; + } + + kobj_swpld2 = &pdev->dev.kobj; + ret = sysfs_create_group(&pdev->dev.kobj, &swpld2_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create swpld attribute group"); + goto error; + } + + return 0; + +error: + kobject_put(kobj_swpld2); + i2c_unregister_device(pdata[swpld2].client); + i2c_put_adapter(parent); + + return -ENODEV; +} + +static int __init swpld3_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD3 platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(BUS3); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", BUS1); + return -ENODEV; + } + + pdata[swpld3].client = i2c_new_dummy(parent, pdata[swpld3].reg_addr); + if (!pdata[swpld3].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[swpld3].reg_addr); + goto error; + } + + kobj_swpld3 = &pdev->dev.kobj; + ret = sysfs_create_group(&pdev->dev.kobj, &swpld3_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create swpld attribute group"); + goto error; + } + + return 0; + +error: + kobject_put(kobj_swpld3); + i2c_unregister_device(pdata[swpld3].client); + i2c_put_adapter(parent); + + return -ENODEV; +} + +static int __exit cpld_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &cpld_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + if (pdata[system_cpld].client) { + if (!parent) { + parent = (pdata[system_cpld].client)->adapter; + } + i2c_unregister_device(pdata[system_cpld].client); + } + } + i2c_put_adapter(parent); + + return 0; +} + +static int __exit swpld1_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &swpld1_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + if (pdata[swpld1].client) { + if (!parent) { + parent = (pdata[swpld1].client)->adapter; + } + i2c_unregister_device(pdata[swpld1].client); + } + } + i2c_put_adapter(parent); + return 0; +} + +static int __exit swpld2_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &swpld2_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + if (pdata[swpld2].client) { + if (!parent) { + parent = (pdata[swpld2].client)->adapter; + } + i2c_unregister_device(pdata[swpld2].client); + } + } + i2c_put_adapter(parent); + return 0; +} + +static int __exit swpld3_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &swpld3_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + if (pdata[swpld3].client) { + if (!parent) { + parent = (pdata[swpld3].client)->adapter; + } + i2c_unregister_device(pdata[swpld3].client); + } + } + i2c_put_adapter(parent); + return 0; +} + +static struct platform_driver cpld_driver = { + .probe = cpld_probe, + .remove = __exit_p(cpld_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v2a-cpld", + }, +}; + +static struct platform_driver swpld1_driver = { + .probe = swpld1_probe, + .remove = __exit_p(swpld1_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v2a-swpld1", + }, +}; + +static struct platform_driver swpld2_driver = { + .probe = swpld2_probe, + .remove = __exit_p(swpld2_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v2a-swpld2", + }, +}; + +static struct platform_driver swpld3_driver = { + .probe = swpld3_probe, + .remove = __exit_p(swpld3_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v2a-swpld3", + }, +}; +/*---------------- CPLD - end ------------- */ +/*---------------- MUX - start ------------- */ + +struct cpld_mux_platform_data { + int parent; + int base_nr; + struct i2c_client *cpld; + int reg_addr; +}; + +struct cpld_mux { + struct i2c_adapter *parent; + struct i2c_adapter **child; + struct cpld_mux_platform_data data; +}; + +static struct cpld_mux_platform_data ag9032v2a_cpld_mux_platform_data[] = { + { + .parent = BUS0, + .base_nr = BUS0_BASE_NUM, + .cpld = NULL, + .reg_addr = BUS0_MUX_REG, + }, +}; + +static struct cpld_mux_platform_data ag9032v2a_swpld_mux_platform_data[] = { + { + .parent = BUS3, + .base_nr = BUS3_BASE_NUM, + .cpld = NULL, + .reg_addr = BUS3_MUX_REG, + }, +}; + +static struct platform_device cpld_mux_device[] = +{ + { + .name = "delta-ag9032v2a-cpld-mux", + .id = 0, + .dev = { + .platform_data = &ag9032v2a_cpld_mux_platform_data[0], + .release = device_release, + }, + }, +}; + +static struct platform_device swpld1_mux_device[] = +{ + { + .name = "delta-ag9032v2a-swpld1-mux", + .id = 0, + .dev = { + .platform_data = &ag9032v2a_swpld_mux_platform_data[0], + .release = device_release, + }, + }, +}; + +static int cpld_reg_write_byte(struct i2c_client *client, u8 regaddr, u8 val) +{ + union i2c_smbus_data data; + + data.byte = val; + return client->adapter->algo->smbus_xfer(client->adapter, client->addr, + client->flags, + I2C_SMBUS_WRITE, + regaddr, I2C_SMBUS_BYTE_DATA, &data); +} + +static int cpld_mux_select(struct i2c_mux_core *muxc, u32 chan) +{ + struct cpld_mux *mux = i2c_mux_priv(muxc); + u8 cpld_mux_val = 0; + int ret = 0; + if ( mux->data.base_nr == BUS0_BASE_NUM ){ + switch (chan) { + case 0: + cpld_mux_val = MUX_VAL_IDEEPROM; + break; + case 1: + cpld_mux_val = MUX_VAL_PCA9548; + break; + case 2: + cpld_mux_val = MUX_VAL_SWPLD; + break; + default: + cpld_mux_val = 0x0; + break; + } + } + else + { + printk(KERN_ERR "CPLD mux select error\n"); + return 0; + } + ret = cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr, (u8)(cpld_mux_val & 0xff)); + return ret; +} + +static int swpld_mux_select(struct i2c_mux_core *muxc, u32 chan) +{ + struct cpld_mux *mux = i2c_mux_priv(muxc); + u8 swpld_mux_val = 0; + int ret =0; + + if ( mux->data.base_nr == BUS3_BASE_NUM ){ + swpld_mux_val = chan; + } + else + { + printk(KERN_ERR "SWPLD mux select error\n"); + return 0; + } + ret = cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr, (u8)(swpld_mux_val & 0xff)); + return ret; +} + +static int __init cpld_mux_probe(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc; + struct cpld_mux *mux; + struct cpld_mux_platform_data *pdata; + struct i2c_adapter *parent; + int i, ret, dev_num; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "CPLD platform data not found\n"); + return -ENODEV; + } + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) { + printk(KERN_ERR "Failed to allocate memory for mux\n"); + return -ENOMEM; + } + mux->data = *pdata; + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + kfree(mux); + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", pdata->parent); + return -ENODEV; + } + /* Judge bus number to decide how many devices*/ + switch (pdata->parent) { + case BUS0: + dev_num = BUS0_DEV_NUM; + break; + default : + dev_num = DEF_DEV_NUM; + break; + } + muxc = i2c_mux_alloc(parent, &pdev->dev, dev_num, 0, 0, cpld_mux_select, NULL); + if (!muxc) { + ret = -ENOMEM; + goto alloc_failed; + } + muxc->priv = mux; + platform_set_drvdata(pdev, muxc); + + for (i = 0; i < dev_num; i++) + { + int nr = pdata->base_nr + i; + unsigned int class = 0; + ret = i2c_mux_add_adapter(muxc, nr, i, class); + if (ret) { + dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + goto add_adapter_failed; + } + } + dev_info(&pdev->dev, "%d port mux on %s adapter\n", dev_num, parent->name); + return 0; + +add_adapter_failed: + i2c_mux_del_adapters(muxc); +alloc_failed: + kfree(mux); + i2c_put_adapter(parent); + return ret; +} + +static int __init swpld_mux_probe(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc; + struct cpld_mux *mux; + struct cpld_mux_platform_data *pdata; + struct i2c_adapter *parent; + int i, ret, dev_num; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD platform data not found\n"); + return -ENODEV; + } + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) { + printk(KERN_ERR "Failed to allocate memory for mux\n"); + return -ENOMEM; + } + mux->data = *pdata; + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + kfree(mux); + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", pdata->parent); + return -ENODEV; + } + /* Judge bus number to decide how many devices*/ + switch (pdata->parent) { + case BUS3: + dev_num = BUS3_DEV_NUM; + break; + default : + dev_num = DEF_DEV_NUM; + break; + } + + muxc = i2c_mux_alloc(parent, &pdev->dev, dev_num, 0, 0, swpld_mux_select, NULL); + if (!muxc) { + ret = -ENOMEM; + goto alloc_failed; + } + muxc->priv = mux; + platform_set_drvdata(pdev, muxc); + for (i = 0; i < dev_num; i++) + { + int nr = pdata->base_nr + i; + unsigned int class = 0; + ret = i2c_mux_add_adapter(muxc, nr, i, class); + if (ret) { + dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + goto add_adapter_failed; + } + } + dev_info(&pdev->dev, "%d port mux on %s adapter\n", dev_num, parent->name); + return 0; + +add_adapter_failed: + i2c_mux_del_adapters(muxc); +alloc_failed: + kfree(mux); + i2c_put_adapter(parent); + + return ret; +} + +static int __exit cpld_mux_remove(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc = platform_get_drvdata(pdev); + struct i2c_adapter *parent = muxc->parent; + + i2c_mux_del_adapters(muxc); + i2c_put_adapter(parent); + + return 0; +} + +static int __exit swpld_mux_remove(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc = platform_get_drvdata(pdev); + struct i2c_adapter *parent = muxc->parent; + + i2c_mux_del_adapters(muxc); + i2c_put_adapter(parent); + + return 0; +} + +static struct platform_driver cpld_mux_driver = { + .probe = cpld_mux_probe, + .remove = __exit_p(cpld_mux_remove), /* TODO */ + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v2a-cpld-mux", + }, +}; + +static struct platform_driver swpld1_mux_driver = { + .probe = swpld_mux_probe, + .remove = __exit_p(swpld_mux_remove), /* TODO */ + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9032v2a-swpld1-mux", + }, +}; +/*---------------- MUX - end ------------- */ + +/*---------------- module initialization ------------- */ + +static int __init delta_ag9032v2a_platform_init(void) +{ +// struct i2c_client *client; + struct i2c_adapter *adapter; + struct cpld_mux_platform_data *cpld_mux_pdata; + struct cpld_platform_data *cpld_pdata; + struct cpld_mux_platform_data *swpld_mux_pdata; + struct cpld_platform_data *swpld_pdata; + int ret,i = 0; + + mutex_init(&dni_lock); + printk("ag9032v2a_platform module initialization\n"); + + ret = platform_driver_register(&cpld_driver); + if (ret) { + printk(KERN_WARNING "Fail to register cpupld driver\n"); + goto error_cpld_driver; + } + // set the SWPLD prob and remove + ret = platform_driver_register(&swpld1_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld driver\n"); + goto error_swpld1_driver; + } + + // set the SWPLD prob and remove + ret = platform_driver_register(&swpld2_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld driver\n"); + goto error_swpld2_driver; + } + + // set the SWPLD prob and remove + ret = platform_driver_register(&swpld3_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld driver\n"); + goto error_swpld3_driver; + } + + // register the mux prob which call the SWPLD + ret = platform_driver_register(&cpld_mux_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld mux driver\n"); + goto error_cpld_mux_driver; + } + + // register the mux prob which call the SWPLD + ret = platform_driver_register(&swpld1_mux_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld1 mux driver\n"); + goto error_swpld1_mux_driver; + } + + // register the i2c devices + ret = platform_driver_register(&i2c_device_driver); + if (ret) { + printk(KERN_WARNING "Fail to register i2c device driver\n"); + goto error_i2c_device_driver; + } + + // register the CPUPLD + ret = platform_device_register(&cpld_device); + if (ret) { + printk(KERN_WARNING "Fail to create cpupld device\n"); + goto error_cpld_device; + } + + // link the CPLD and the Mux + cpld_pdata = ag9032v2a_cpld_platform_data; + for (i = 0; i < ARRAY_SIZE(cpld_mux_device); i++) + { + cpld_mux_pdata = cpld_mux_device[i].dev.platform_data; + cpld_mux_pdata->cpld = cpld_pdata[system_cpld].client; + ret = platform_device_register(&cpld_mux_device[i]); + if (ret) { + printk(KERN_WARNING "Fail to create swpld mux %d\n", i); + goto error_cpld_mux; + } + } + + adapter = i2c_get_adapter(BUS2); + i2c_client_9548 = i2c_new_device(adapter, &i2c_info_pca9548[0]); + i2c_put_adapter(adapter); + + // register the SWPLD + ret = platform_device_register(&swpld1_device); + if (ret) { + printk(KERN_WARNING "Fail to create swpld1 device\n"); + goto error_swpld1_device; + } + + // register the SWPLD + ret = platform_device_register(&swpld2_device); + if (ret) { + printk(KERN_WARNING "Fail to create swpld2 device\n"); + goto error_swpld2_device; + } + + // register the SWPLD + ret = platform_device_register(&swpld3_device); + if (ret) { + printk(KERN_WARNING "Fail to create swpld3 device\n"); + goto error_swpld3_device; + } + + // link the SWPLD1 and the Mux + swpld_pdata = ag9032v2a_swpld1_platform_data; + for (i = 0; i < ARRAY_SIZE(swpld1_mux_device); i++) + { + swpld_mux_pdata = swpld1_mux_device[i].dev.platform_data; + swpld_mux_pdata->cpld = swpld_pdata[swpld1].client; + ret = platform_device_register(&swpld1_mux_device[i]); + if (ret) { + printk(KERN_WARNING "Fail to create swpld mux %d\n", i); + goto error_ag9032v2a_swpld1_mux; + } + } + + for (i = 0; i < ARRAY_SIZE(ag9032v2a_i2c_device); i++) + { + ret = platform_device_register(&ag9032v2a_i2c_device[i]); + if (ret) + { + printk(KERN_WARNING "Fail to create i2c device %d\n", i); + goto error_ag9032v2a_i2c_device; + } + } + if (ret) + goto error_cpld_mux; + return 0; + +error_ag9032v2a_i2c_device: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&ag9032v2a_i2c_device[i]); + } + i = ARRAY_SIZE(swpld1_mux_device); +error_ag9032v2a_swpld1_mux: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&swpld1_mux_device[i]); + } + platform_device_unregister(&swpld3_device); +error_swpld3_device: + platform_device_unregister(&swpld2_device); +error_swpld2_device: + platform_device_unregister(&swpld1_device); +error_swpld1_device: + i2c_unregister_device(i2c_client_9548); + i = ARRAY_SIZE(cpld_mux_device); +error_cpld_mux: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&cpld_mux_device[i]); + } + platform_device_unregister(&cpld_device); +error_cpld_device: + platform_driver_unregister(&i2c_device_driver); +error_i2c_device_driver: + platform_driver_unregister(&swpld1_mux_driver); +error_swpld1_mux_driver: + platform_driver_unregister(&cpld_mux_driver); +error_cpld_mux_driver: + platform_driver_unregister(&swpld3_driver); +error_swpld3_driver: + platform_driver_unregister(&swpld2_driver); +error_swpld2_driver: + platform_driver_unregister(&swpld1_driver); +error_swpld1_driver: + platform_driver_unregister(&cpld_driver); +error_cpld_driver: + return ret; +} + +static void __exit delta_ag9032v2a_platform_exit(void) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(ag9032v2a_i2c_device); i++) { + platform_device_unregister(&ag9032v2a_i2c_device[i]); + } + + for (i = 0; i < ARRAY_SIZE(swpld1_mux_device); i++) { + platform_device_unregister(&swpld1_mux_device[i]); + } + + platform_device_unregister(&swpld1_device); + platform_driver_unregister(&swpld1_driver); + + platform_device_unregister(&swpld2_device); + platform_driver_unregister(&swpld2_driver); + + platform_device_unregister(&swpld3_device); + platform_driver_unregister(&swpld3_driver); + + i2c_unregister_device(i2c_client_9548); + + for (i = 0; i < ARRAY_SIZE(cpld_mux_device); i++) { + platform_device_unregister(&cpld_mux_device[i]); + } + + platform_driver_unregister(&i2c_device_driver); + platform_driver_unregister(&swpld1_mux_driver); + platform_driver_unregister(&cpld_mux_driver); + platform_device_unregister(&cpld_device); + platform_driver_unregister(&cpld_driver); +} + +module_init(delta_ag9032v2a_platform_init); +module_exit(delta_ag9032v2a_platform_exit); + +MODULE_DESCRIPTION("DELTA ag9032v2a Platform Support"); +MODULE_AUTHOR("Johnson Lu "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9032v2a/scripts/ag9032v2a_platform_init.sh b/platform/broadcom/sonic-platform-modules-delta/ag9032v2a/scripts/ag9032v2a_platform_init.sh new file mode 100755 index 00000000000..af5d5f0c7b5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9032v2a/scripts/ag9032v2a_platform_init.sh @@ -0,0 +1,7 @@ +#!/bin/bash + +#platform init script for Delta ag9032v2a + + +exit 0 + diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/cfg/ag9064-modules.conf b/platform/broadcom/sonic-platform-modules-delta/ag9064/cfg/ag9064-modules.conf new file mode 100644 index 00000000000..552b4103ed0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/cfg/ag9064-modules.conf @@ -0,0 +1,13 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus +i2c-mux-gpio +i2c-mux-pca954x diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/Makefile b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/Makefile new file mode 100644 index 00000000000..5642e82fa05 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/Makefile @@ -0,0 +1,5 @@ +obj-m += delta_ag9064_platform.o +obj-m += delta_ag9064_cpld.o +obj-m += delta_ag9064_swpld.o +obj-m += i2c-mei.o +i2c-mei-objs := i2c-mei_io.o i2c-mei_main.o i2c-mei_rw.o \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/client.h b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/client.h new file mode 100644 index 00000000000..04e1aa39243 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/client.h @@ -0,0 +1,255 @@ +/* + * + * Intel Management Engine Interface (Intel MEI) Linux driver + * Copyright (c) 2003-2012, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#ifndef _MEI_CLIENT_H_ +#define _MEI_CLIENT_H_ + +#include +#include +#include +#include + +#include "mei_dev.h" + +/* + * reference counting base function + */ +void mei_me_cl_init(struct mei_me_client *me_cl); +void mei_me_cl_put(struct mei_me_client *me_cl); +struct mei_me_client *mei_me_cl_get(struct mei_me_client *me_cl); + +void mei_me_cl_add(struct mei_device *dev, struct mei_me_client *me_cl); +void mei_me_cl_del(struct mei_device *dev, struct mei_me_client *me_cl); + +struct mei_me_client *mei_me_cl_by_uuid(struct mei_device *dev, + const uuid_le *uuid); +struct mei_me_client *mei_me_cl_by_id(struct mei_device *dev, u8 client_id); +struct mei_me_client *mei_me_cl_by_uuid_id(struct mei_device *dev, + const uuid_le *uuid, u8 client_id); +void mei_me_cl_rm_by_uuid(struct mei_device *dev, const uuid_le *uuid); +void mei_me_cl_rm_by_uuid_id(struct mei_device *dev, + const uuid_le *uuid, u8 id); +void mei_me_cl_rm_all(struct mei_device *dev); + +/** + * mei_me_cl_is_active - check whether me client is active in the fw + * + * @me_cl: me client + * + * Return: true if the me client is active in the firmware + */ +static inline bool mei_me_cl_is_active(const struct mei_me_client *me_cl) +{ + return !list_empty_careful(&me_cl->list); +} + +/** + * mei_me_cl_uuid - return me client protocol name (uuid) + * + * @me_cl: me client + * + * Return: me client protocol name + */ +static inline const uuid_le *mei_me_cl_uuid(const struct mei_me_client *me_cl) +{ + return &me_cl->props.protocol_name; +} + +/** + * mei_me_cl_ver - return me client protocol version + * + * @me_cl: me client + * + * Return: me client protocol version + */ +static inline u8 mei_me_cl_ver(const struct mei_me_client *me_cl) +{ + return me_cl->props.protocol_version; +} + +/* + * MEI IO Functions + */ +struct mei_cl_cb *mei_io_cb_init(struct mei_cl *cl, enum mei_cb_file_ops type, + struct file *fp); +void mei_io_cb_free(struct mei_cl_cb *priv_cb); +int mei_io_cb_alloc_buf(struct mei_cl_cb *cb, size_t length); + + +/** + * mei_io_list_init - Sets up a queue list. + * + * @list: An instance cl callback structure + */ +static inline void mei_io_list_init(struct mei_cl_cb *list) +{ + INIT_LIST_HEAD(&list->list); +} +void mei_io_list_flush(struct mei_cl_cb *list, struct mei_cl *cl); + +/* + * MEI Host Client Functions + */ + +struct mei_cl *mei_cl_allocate(struct mei_device *dev); +void mei_cl_init(struct mei_cl *cl, struct mei_device *dev); + + +int mei_cl_link(struct mei_cl *cl, int id); +int mei_cl_unlink(struct mei_cl *cl); + +struct mei_cl *mei_cl_alloc_linked(struct mei_device *dev, int id); + +struct mei_cl_cb *mei_cl_read_cb(const struct mei_cl *cl, + const struct file *fp); +void mei_cl_read_cb_flush(const struct mei_cl *cl, const struct file *fp); +struct mei_cl_cb *mei_cl_alloc_cb(struct mei_cl *cl, size_t length, + enum mei_cb_file_ops type, struct file *fp); +int mei_cl_flush_queues(struct mei_cl *cl, const struct file *fp); + +int mei_cl_flow_ctrl_creds(struct mei_cl *cl); + +int mei_cl_flow_ctrl_reduce(struct mei_cl *cl); +/* + * MEI input output function prototype + */ + +/** + * mei_cl_is_connected - host client is connected + * + * @cl: host client + * + * Return: true if the host client is connected + */ +static inline bool mei_cl_is_connected(struct mei_cl *cl) +{ + return cl->state == MEI_FILE_CONNECTED; +} + +/** + * mei_cl_me_id - me client id + * + * @cl: host client + * + * Return: me client id or 0 if client is not connected + */ +static inline u8 mei_cl_me_id(const struct mei_cl *cl) +{ + return cl->me_cl ? cl->me_cl->client_id : 0; +} + +/** + * mei_cl_mtu - maximal message that client can send and receive + * + * @cl: host client + * + * Return: mtu + */ +static inline size_t mei_cl_mtu(const struct mei_cl *cl) +{ + return cl->me_cl->props.max_msg_length; +} + +/** + * mei_cl_is_fixed_address - check whether the me client uses fixed address + * + * @cl: host client + * + * Return: true if the client is connected and it has fixed me address + */ +static inline bool mei_cl_is_fixed_address(const struct mei_cl *cl) +{ + return cl->me_cl && cl->me_cl->props.fixed_address; +} + +/** + * mei_cl_is_single_recv_buf- check whether the me client + * uses single receiving buffer + * + * @cl: host client + * + * Return: true if single_recv_buf == 1; 0 otherwise + */ +static inline bool mei_cl_is_single_recv_buf(const struct mei_cl *cl) +{ + return cl->me_cl->props.single_recv_buf; +} + +/** + * mei_cl_uuid - client's uuid + * + * @cl: host client + * + * Return: return uuid of connected me client + */ +static inline const uuid_le *mei_cl_uuid(const struct mei_cl *cl) +{ + return mei_me_cl_uuid(cl->me_cl); +} + +/** + * mei_cl_host_addr - client's host address + * + * @cl: host client + * + * Return: 0 for fixed address client, host address for dynamic client + */ +static inline u8 mei_cl_host_addr(const struct mei_cl *cl) +{ + return mei_cl_is_fixed_address(cl) ? 0 : cl->host_client_id; +} + +int mei_cl_disconnect(struct mei_cl *cl); +void mei_cl_set_disconnected(struct mei_cl *cl); +int mei_cl_irq_disconnect(struct mei_cl *cl, struct mei_cl_cb *cb, + struct mei_cl_cb *cmpl_list); +int mei_cl_connect(struct mei_cl *cl, struct mei_me_client *me_cl, + struct file *file); +int mei_cl_irq_connect(struct mei_cl *cl, struct mei_cl_cb *cb, + struct mei_cl_cb *cmpl_list); +int mei_cl_read_start(struct mei_cl *cl, size_t length, struct file *fp); +int mei_cl_irq_read_msg(struct mei_cl *cl, struct mei_msg_hdr *hdr, + struct mei_cl_cb *cmpl_list); +int mei_cl_write(struct mei_cl *cl, struct mei_cl_cb *cb, bool blocking); +int mei_cl_irq_write(struct mei_cl *cl, struct mei_cl_cb *cb, + struct mei_cl_cb *cmpl_list); + +void mei_cl_complete(struct mei_cl *cl, struct mei_cl_cb *cb); + +void mei_host_client_init(struct work_struct *work); + +u8 mei_cl_notify_fop2req(enum mei_cb_file_ops fop); +enum mei_cb_file_ops mei_cl_notify_req2fop(u8 request); +int mei_cl_notify_request(struct mei_cl *cl, struct file *file, u8 request); +int mei_cl_irq_notify(struct mei_cl *cl, struct mei_cl_cb *cb, + struct mei_cl_cb *cmpl_list); +int mei_cl_notify_get(struct mei_cl *cl, bool block, bool *notify_ev); +void mei_cl_notify(struct mei_cl *cl); + +void mei_cl_all_disconnect(struct mei_device *dev); +void mei_cl_all_wakeup(struct mei_device *dev); +void mei_cl_all_write_clear(struct mei_device *dev); + +#define MEI_CL_FMT "cl:host=%02d me=%02d " +#define MEI_CL_PRM(cl) (cl)->host_client_id, mei_cl_me_id(cl) + +#define cl_dbg(dev, cl, format, arg...) \ + dev_dbg((dev)->dev, MEI_CL_FMT format, MEI_CL_PRM(cl), ##arg) + +#define cl_err(dev, cl, format, arg...) \ + dev_err((dev)->dev, MEI_CL_FMT format, MEI_CL_PRM(cl), ##arg) + +#endif /* _MEI_CLIENT_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_common.h b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_common.h new file mode 100644 index 00000000000..40eba7e241a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_common.h @@ -0,0 +1,568 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define IPMI_MAX_INTF (4) +#define DELTA_NETFN 0x38 +#define BMC_BUS_5 0x04 +#define BMC_BUS_1 0x00 +#define CMD_SETDATA 0x03 +#define CMD_GETDATA 0x02 +#define CMD_DEVICE_SCAN 0x01 + +#define CPUPLD_ADDR 0x31 +#define SWPLD1_ADDR 0x35 +#define SWPLD2_ADDR 0x34 +#define SWPLD3_ADDR 0x33 +#define SWPLD4_ADDR 0x32 +#define QSFP_PORT_MUX_REG 0x13 +#define PSU1_EEPROM_ADDR 0x50 +#define PSU2_EEPROM_ADDR 0x51 + +#define DEFAULT_NUM 1 +#define BUS9_DEV_NUM 64 +#define BUS9_BASE_NUM 20 +#define EEPROM_SIZE 640 +#define EEPROM_ARCH_SIZE 256 +#define EEPROM_MASK 20 +#define ATTR_R 1 +#define ATTR_W 2 + +extern int dni_bmc_cmd(char set_cmd, char *cmd_data, int cmd_data_len); +extern int dni_create_user(void); +extern unsigned char dni_log2 (unsigned char num); +extern void device_release(struct device *dev); +extern void msg_handler(struct ipmi_recv_msg *recv_msg,void* handler_data); +extern void dummy_smi_free(struct ipmi_smi_msg *msg); +extern void dummy_recv_free(struct ipmi_recv_msg *msg); +extern void dni_klock(void); +extern void dni_kunlock(void); + +static ipmi_user_t ipmi_mh_user = NULL; +static struct ipmi_user_hndl ipmi_hndlrs = { .ipmi_recv_hndl = msg_handler,}; +static atomic_t dummy_count = ATOMIC_INIT(0); + +static struct ipmi_smi_msg halt_smi_msg = { + .done = dummy_smi_free +}; +static struct ipmi_recv_msg halt_recv_msg = { + .done = dummy_recv_free +}; + +enum{ + BUS0 = 0, + BUS1, + BUS2, + BUS3, + BUS4, + BUS5, + BUS6, + BUS7, + BUS8, + BUS9, + BUS10, + BUS11, + BUS12, + BUS13, + BUS14, +}; + +static struct cpld_attribute_data { + uint8_t bus; + uint8_t addr; + uint8_t reg; + uint8_t mask; + char note[200]; +}; + + +enum cpld_type { + system_cpld, + swpld1, + swpld2, + swpld3, + swpld4, +}; + +struct cpld_platform_data { + int reg_addr; + struct i2c_client *client; +}; + +static struct cpld_platform_data ag9064_cpld_platform_data[] = { + [system_cpld] = { + .reg_addr = CPUPLD_ADDR, + }, +}; + +static struct cpld_platform_data ag9064_swpld1_platform_data[] = { + [swpld1] = { + .reg_addr = SWPLD1_ADDR, + }, +}; + +static struct cpld_platform_data ag9064_swpld2_platform_data[] = { + [swpld2] = { + .reg_addr = SWPLD2_ADDR, + }, +}; + +static struct cpld_platform_data ag9064_swpld3_platform_data[] = { + [swpld3] = { + .reg_addr = SWPLD3_ADDR, + }, +}; + +static struct cpld_platform_data ag9064_swpld4_platform_data[] = { + [swpld4] = { + .reg_addr = SWPLD4_ADDR, + }, +}; + +enum cpld_attributes { + CPLD_REG_ADDR, + CPLD_REG_VALUE, + SWPLD1_REG_ADDR, + SWPLD1_REG_VALUE, + SWPLD2_REG_ADDR, + SWPLD2_REG_VALUE, + SWPLD3_REG_ADDR, + SWPLD3_REG_VALUE, + SWPLD4_REG_ADDR, + SWPLD4_REG_VALUE, + PSU1_SCAN, + PSU2_SCAN, + //CPLD + CPLD_VER, + CPU_BOARD_VER, + CPU_ID, + MB_ID, + MB_VER, + CPU0_PWR_OK, + PWR_RAIL_OVER_TEMP, + CPU_DISOMIC_OVER_TEMP, + DDR_OVER_TEMP, + CPLD_PWR_ON_RST, + CPLD_HARD_RST, + CPLD_RST, + MB_RST, + PSU_FAN_INT, + OP_MODULE_INT, +//SWPLD1 + SWPLD1_MAJOR_VER, + SWPLD1_MINOR_VER, + SWPLD1_SCRTCH_REG, + PSU1_PWR_OK, + PSU1_INT, + PSU2_PWR_OK, + PSU2_INT, + PSU1_GREEN_LED, + PSU1_RED_LED, + PSU2_GREEN_LED, + PSU2_RED_LED, + PSU_LED_MODE, +//SWPLD2 + SWPLD2_MAJOR_VER, + SWPLD2_MINOR_VER, + SWPLD2_SCRTCH_REG, + FAN_LED, + SYS_LED, + FAN_MOD1_LED, + FAN_MOD2_LED, + FAN_MOD3_LED, + FAN_MOD4_LED, +//SWPLD3 + SWPLD3_MAJOR_VER, + SWPLD3_MINOR_VER, + SWPLD3_SCRTCH_REG, + SB_VER, + PLATFORM_TYPE, +//SWPLD4 + SW_BOARD_ID1, + SW_BOARD_ID2, + SWBD_VER, + SWPLD4_VER, + PSU_FAN_EVENT, + CPU_THERMAL_INT, + FAN_INT, + CPLD_SPI_WP, + RJ45_CONSOLE_SEL, + SYSTEM_INT, + CPLD_MB_RST_DONE, + MB_PWR_OK, + FAN_EEPROM_WP, +}; + +enum sfp_attributes{ + EEPROM_SFP_1, + EEPROM_SFP_2, + EEPROM_SFP_3, + EEPROM_SFP_4, + EEPROM_SFP_5, + EEPROM_SFP_6, + EEPROM_SFP_7, + EEPROM_SFP_8, + EEPROM_SFP_9, + EEPROM_SFP_10, + EEPROM_SFP_11, + EEPROM_SFP_12, + EEPROM_SFP_13, + EEPROM_SFP_14, + EEPROM_SFP_15, + EEPROM_SFP_16, + EEPROM_SFP_17, + EEPROM_SFP_18, + EEPROM_SFP_19, + EEPROM_SFP_20, + EEPROM_SFP_21, + EEPROM_SFP_22, + EEPROM_SFP_23, + EEPROM_SFP_24, + EEPROM_SFP_25, + EEPROM_SFP_26, + EEPROM_SFP_27, + EEPROM_SFP_28, + EEPROM_SFP_29, + EEPROM_SFP_30, + EEPROM_SFP_31, + EEPROM_SFP_32, + EEPROM_SFP_33, + EEPROM_SFP_34, + EEPROM_SFP_35, + EEPROM_SFP_36, + EEPROM_SFP_37, + EEPROM_SFP_38, + EEPROM_SFP_39, + EEPROM_SFP_40, + EEPROM_SFP_41, + EEPROM_SFP_42, + EEPROM_SFP_43, + EEPROM_SFP_44, + EEPROM_SFP_45, + EEPROM_SFP_46, + EEPROM_SFP_47, + EEPROM_SFP_48, + EEPROM_SFP_49, + EEPROM_SFP_50, + EEPROM_SFP_51, + EEPROM_SFP_52, + EEPROM_SFP_53, + EEPROM_SFP_54, + EEPROM_SFP_55, + EEPROM_SFP_56, + EEPROM_SFP_57, + EEPROM_SFP_58, + EEPROM_SFP_59, + EEPROM_SFP_60, + EEPROM_SFP_61, + EEPROM_SFP_62, + EEPROM_SFP_63, + EEPROM_SFP_64, +}; + +static struct cpld_attribute_data attribute_data[] = { + [CPLD_REG_ADDR] = { + }, + [CPLD_REG_VALUE] = { + }, + [SWPLD1_REG_ADDR] = { + }, + [SWPLD1_REG_VALUE] = { + }, + [SWPLD2_REG_ADDR] = { + }, + [SWPLD2_REG_VALUE] = { + }, + [SWPLD3_REG_ADDR] = { + }, + [SWPLD3_REG_VALUE] = { + }, + [SWPLD4_REG_ADDR] = { + }, + [SWPLD4_REG_VALUE] = { + }, +//CPLD + [CPLD_VER] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x01, .mask = 0xFF, + .note = "CPLD Version, controlled by CPLD editor" + }, + [CPU_BOARD_VER] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x02, .mask = 0xF0, + .note = "“0x0”: proto A1\n“0x1”: proto A2\n“0x2”: PR (Production)" + }, + [CPU_ID] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x02, .mask = 0x0F, + .note = "“0x0”: C2558 ECC\n“0x1”: Rangeley ECC\n“0x2”: BROADWELL-DE ECC" + }, + [MB_ID] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x03, .mask = 0xFF, + .note = "“0x00”: proto A1\n“0x01”: proto A2\n“0x02”: PR (Production)" + }, + [MB_VER] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x04, .mask = 0x0F, + .note = "“0x0”: proto-A\n“0x1”: proto-B" + }, + [CPU0_PWR_OK] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x08, .mask = 1 << 3, + .note = "“1” =Power rail is good\n“0” = Power rail is failed" + }, + [PWR_RAIL_OVER_TEMP] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x0b, .mask = 1 << 3, + .note = "“1” = Not over temperature\n“0” = Over temperature" + }, + [CPU_DISOMIC_OVER_TEMP] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x0b, .mask = 1 << 1, + .note = "“1” = Not over temperature\n“0” = Over temperature" + }, + [DDR_OVER_TEMP] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x0b, .mask = 1 << 0, + .note = "“1” = Not over temperature\n“0” = Over temperature" + }, + [CPLD_PWR_ON_RST] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x11, .mask = 1 << 4, + .note = "“0” = Reset\n“1” = Normal operation" + }, + [CPLD_HARD_RST] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x11, .mask = 1 << 2, + .note = "“0” = Reset\n“1” = Normal operation" + }, + [CPLD_RST] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x11, .mask = 1 << 0, + .note = "“0” = Reset\n“1” = Normal operation" + }, + [MB_RST] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x12, .mask = 1 << 0, + .note = "“0” = Reset\n“1” = Normal operation" + }, + [PSU_FAN_INT] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x15, .mask = 1 << 1, + .note = "“0” = Interrupt occurs\n“1” = Interrupt doesn't occur" + }, + [OP_MODULE_INT] = { + .bus = BUS0, .addr = CPUPLD_ADDR, + .reg = 0x15, .mask = 1 << 0, + .note = "“0” = Interrupt occurs\n“1” = Interrupt doesn't occur" + }, +//SWPLD1 + [SWPLD1_MAJOR_VER] = { + .bus = BUS0, .addr = SWPLD1_ADDR, + .reg = 0x00, .mask = 0xF0, + .note = "CPLD Major Version, controlled by CPLD editor." + }, + [SWPLD1_MINOR_VER] = { + .bus = BUS0, .addr = SWPLD1_ADDR, + .reg = 0x00, .mask = 0x0F, + .note = "CPLD Minor Version, controlled by CPLD editor." + }, + [SWPLD1_SCRTCH_REG] = { + .bus = BUS0, .addr = SWPLD1_ADDR, + .reg = 0x01, .mask = 0xFF, + .note = "CPLD read/write test register, to provide a way to test CPLD access." + }, + [PSU1_PWR_OK] = { + .bus = BUS0, .addr = SWPLD1_ADDR, + .reg = 0x02, .mask = 1 << 6, + .note = "‘0’ = Power rail is good\n‘1’ = Power rail is failed" + }, + [PSU1_INT] = { + .bus = BUS0, .addr = SWPLD1_ADDR, + .reg = 0x02, .mask = 1 << 5, + .note = "‘0’ = Interrupt doesn’t occur\n‘1’ = Interrupt occurs" + }, + [PSU2_PWR_OK] = { + .bus = BUS0, .addr = SWPLD1_ADDR, + .reg = 0x02, .mask = 1 << 2, + .note = "‘0’ = Power rail is good\n‘1’ = Power rail is failed" + }, + [PSU2_INT] = { + .bus = BUS0, .addr = SWPLD1_ADDR, + .reg = 0x02, .mask = 1 << 1, + .note = "‘0’ = Interrupt doesn’t occur\n‘1’ = Interrupt occurs" + }, + [PSU1_GREEN_LED] = { + .bus = BUS0, .addr = SWPLD1_ADDR, + .reg = 0x13, .mask = 1 << 7, + .note = "“0”: Solid Green – Power Supply 1 is supplied to the switch & operating normally\n“1”: OFF" + }, + [PSU1_RED_LED] = { + .bus = BUS0, .addr = SWPLD1_ADDR, + .reg = 0x13, .mask = 1 << 6, + .note = "“0”: Solid Red – Power Supply 1 is supplied to the switch & operating normally\n“1”: OFF" + }, + [PSU2_GREEN_LED] = { + .bus = BUS0, .addr = SWPLD1_ADDR, + .reg = 0x13, .mask = 1 << 5, + .note = "“0”: Solid Green – Power Supply 2 is supplied to the switch & operating normally\n“1”: OFF" + }, + [PSU2_RED_LED] = { + .bus = BUS0, .addr = SWPLD1_ADDR, + .reg = 0x13, .mask = 1 << 4, + .note = "“0”: Solid Red – Power Supply 1=2 is supplied to the switch & operating normally\n“1”: OFF" + }, + [PSU_LED_MODE] = { + .bus = BUS0, .addr = SWPLD1_ADDR, + .reg = 0x13, .mask = 1 << 0, + .note = "“0”: PSU LED can be changed manually\n“1”: PSU LED can’t be changed manually" + }, +//SWPLD2 + [SWPLD2_MAJOR_VER] = { + .bus = BUS0, .addr = SWPLD2_ADDR, + .reg = 0x00, .mask =0xF0 , + .note = "CPLD Major Version, controlled by CPLD editor." + }, + [SWPLD2_MINOR_VER] = { + .bus = BUS0, .addr = SWPLD2_ADDR, + .reg = 0x00, .mask = 0x0F, + .note = "CPLD Minor Version, controlled by CPLD editor." + }, + [SWPLD2_SCRTCH_REG] = { + .bus = BUS0, .addr = SWPLD2_ADDR, + .reg = 0x01, .mask = 0xFF, + .note = "CPLD read/write test register, to provide a way to test CPLD access." + }, + [FAN_LED] = { + .bus = BUS0, .addr = SWPLD2_ADDR, + .reg = 0x02, .mask = 0xC0, + .note = "“00’/”11”: OFF\n“01”: Solid Green – FANs are operating normally\n“10”: Solid Amber – FANs are Error" + }, + [SYS_LED] = { + .bus = BUS0, .addr = SWPLD2_ADDR, + .reg = 0x02, .mask = 0x30, + .note = "‘00’: Off\n‘01’: Solid Green – Normal operation\n‘10’: Blinking Green – Booting Progress\n‘11’: Solid Red – System Fail" + }, + [FAN_MOD1_LED] = { + .bus = BUS0, .addr = SWPLD2_ADDR, + .reg = 0x1b, .mask = 1 << 7, + .note = "‘0’ = Amber\n‘1’ = Green" + }, + [FAN_MOD2_LED] = { + .bus = BUS0, .addr = SWPLD2_ADDR, + .reg = 0x1b, .mask = 1 << 6, + .note = "‘0’ = Amber\n‘1’ = Green" + }, + [FAN_MOD3_LED] = { + .bus = BUS0, .addr = SWPLD2_ADDR, + .reg = 0x1b, .mask = 1 << 5, + .note = "‘0’ = Amber\n‘1’ = Green" + }, + [FAN_MOD4_LED] = { + .bus = BUS0, .addr = SWPLD2_ADDR, + .reg = 0x1b, .mask = 1 << 4, + .note = "‘0’ = Amber\n‘1’ = Green" + }, +//SWPLD3 + [SWPLD3_MAJOR_VER] = { + .bus = BUS0, .addr = SWPLD3_ADDR, + .reg = 0x00, .mask = 0xF0, + .note = "CPLD Major Version, controlled by CPLD editor." + }, + [SWPLD3_MINOR_VER] = { + .bus = BUS0, .addr = SWPLD3_ADDR, + .reg = 0x00, .mask = 0x0F, + .note = "CPLD Minor Version, controlled by CPLD editor." + }, + [SWPLD3_SCRTCH_REG] = { + .bus = BUS0, .addr = SWPLD3_ADDR, + .reg = 0x01, .mask = 0xFF, + .note = "CPLD read/write test register, to provide a way to test CPLD access." + }, + [SB_VER] = { + .bus = BUS0, .addr = SWPLD3_ADDR, + .reg = 0x02, .mask = 0xF0, + .note = "“0x0”: proto-A\n“0x1”: proto-B" + }, + [PLATFORM_TYPE] = { + .bus = BUS0, .addr = SWPLD3_ADDR, + .reg = 0x02, .mask = 0x0F, + .note = "“0x0”: 64X100G_2U\n“0x1”~”0xF” Reserved" + }, +//SWPLD4 + [SW_BOARD_ID1] = { + .bus = BUS0, .addr = SWPLD4_ADDR, + .reg = 0x00, .mask = 0xFF, + .note = "0x00" + }, + [SW_BOARD_ID2] = { + .bus = BUS0, .addr = SWPLD4_ADDR, + .reg = 0x01, .mask = 0xFF, + .note = "Configured by PLD Editor\n0x03: AG9064" + }, + [SWBD_VER] = { + .bus = BUS0, .addr = SWPLD4_ADDR, + .reg = 0x02, .mask = 0xFF, + .note = "Configured by external resistor\n0x01:EVT1\n0x02:EVT2\n0x03:EVT3\n0x04:EVT4\n0x10:DVT\n0x20:PVT" + }, + [SWPLD4_VER] = { + .bus = BUS0, .addr = SWPLD4_ADDR, + .reg = 0x03, .mask = 0xFF, + .note = "-" + }, + [PSU_FAN_EVENT] = { + .bus = BUS0, .addr = SWPLD4_ADDR, + .reg = 0x04, .mask = 1 << 4, + .note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [CPU_THERMAL_INT] = { + .bus = BUS0, .addr = SWPLD4_ADDR, + .reg = 0x04, .mask = 1 << 1, + .note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [FAN_INT] = { + .bus = BUS0, .addr = SWPLD4_ADDR, + .reg = 0x04, .mask = 1 << 0, + .note = "‘0’ = Interrupt occurs\n‘1’ = Interrupt doesn’t occur" + }, + [CPLD_SPI_WP] = { + .bus = BUS0, .addr = SWPLD4_ADDR, + .reg = 0x06, .mask = 1 << 3, + .note = "“0” = SPI write operation is disabled\n“1” = SPI write operation is enabled" + }, + [RJ45_CONSOLE_SEL] = { + .bus = BUS0, .addr = SWPLD4_ADDR, + .reg = 0x06, .mask = 1 << 2, + .note = "“0” = Use BCM UART\n“1” = Use CPU UART" + }, + [SYSTEM_INT] = { + .bus = BUS0, .addr = SWPLD4_ADDR, + .reg = 0x07, .mask = 1 << 2, + .note = "“0” = Interrupt is asserted\n“1” = Interrupt is deasserted" + }, + [CPLD_MB_RST_DONE] = { + .bus = BUS0, .addr = SWPLD4_ADDR, + .reg = 0x07, .mask = 1 << 1, + .note = "“0” = Is done\n“1” = Is not done" + }, + [MB_PWR_OK] = { + .bus = BUS0, .addr = SWPLD4_ADDR, + .reg = 0x07, .mask = 1 << 0, + .note = "‘0’ = Power is failed\n‘1’ = Power is good" + }, + [FAN_EEPROM_WP] = { + .bus = BUS0, .addr = SWPLD4_ADDR, + .reg = 0x15, .mask = 1 << 2, + .note = "“1” = enables the lock-down mechanism.\n“0” = overrides the lock-down function enabling blocks to be erased or programmed using software commands." + }, +}; diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_cpld.c b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_cpld.c new file mode 100644 index 00000000000..a1c275209b0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_cpld.c @@ -0,0 +1,928 @@ +#include "delta_ag9064_common.h" + +#define QSFP_PRESENCE_1 0x03 +#define QSFP_PRESENCE_2 0x03 +#define QSFP_PRESENCE_3 0x24 +#define QSFP_PRESENCE_4 0x24 +#define QSFP_PRESENCE_5 0x04 +#define QSFP_PRESENCE_6 0x04 +#define QSFP_PRESENCE_7 0x25 +#define QSFP_PRESENCE_8 0x25 + +#define QSFP_LP_MODE_1 0x0c +#define QSFP_LP_MODE_2 0x0c +#define QSFP_LP_MODE_3 0x2a +#define QSFP_LP_MODE_4 0x2a +#define QSFP_LP_MODE_5 0x0d +#define QSFP_LP_MODE_6 0x0d +#define QSFP_LP_MODE_7 0x2b +#define QSFP_LP_MODE_8 0x2b + +#define QSFP_RESET_1 0x06 +#define QSFP_RESET_2 0x06 +#define QSFP_RESET_3 0x26 +#define QSFP_RESET_4 0x26 +#define QSFP_RESET_5 0x07 +#define QSFP_RESET_6 0x07 +#define QSFP_RESET_7 0x27 +#define QSFP_RESET_8 0x27 + +#define QSFP_RESPONSE_1 0x09 +#define QSFP_RESPONSE_2 0x09 +#define QSFP_RESPONSE_3 0x28 +#define QSFP_RESPONSE_4 0x28 +#define QSFP_RESPONSE_5 0x0a +#define QSFP_RESPONSE_6 0x0a +#define QSFP_RESPONSE_7 0x29 +#define QSFP_RESPONSE_8 0x29 + +#define QSFP_INTERRUPT_1 0x0f +#define QSFP_INTERRUPT_2 0x0f +#define QSFP_INTERRUPT_3 0x2c +#define QSFP_INTERRUPT_4 0x2c +#define QSFP_INTERRUPT_5 0x10 +#define QSFP_INTERRUPT_6 0x10 +#define QSFP_INTERRUPT_7 0x2d +#define QSFP_INTERRUPT_8 0x2d + +unsigned char cpupld_reg_addr; +/*---------------- CPLD - start ------------- */ +/* CPLD -- device */ +static struct platform_device ag9064_cpld = { + .name = "delta-ag9064-cpld", + .id = 0, + .dev = { + .platform_data = ag9064_cpld_platform_data, + .release = device_release + }, +}; + +static ssize_t get_present(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + int ret; + u64 data = 0; + uint8_t cmd_data[4]={0}; + uint8_t set_cmd; + int cmd_data_len; + set_cmd = CMD_GETDATA; + + dni_klock(); + + /*QSFP1~8*/ + cmd_data[0] = BMC_BUS_5; + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_PRESENCE_1; + cmd_data[3] = 1; + cmd_data_len = sizeof(cmd_data); + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data = (u64)(ret & 0xff); + + /*QSFP9~16*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_PRESENCE_2; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 8; + + /*QSFP17~24*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_PRESENCE_3; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 16; + + /*QSFP25~32*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_PRESENCE_4; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 24; + + /*QSFP33~40*/ + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_PRESENCE_5; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 32; + + /*QSFP41~48*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_PRESENCE_6; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 40; + + /*QSFP49~56*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_PRESENCE_7; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 48; + + /*QSFP57~64*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_PRESENCE_8; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 56; + + dni_kunlock(); + return sprintf(buf, "0x%016llx\n", data); +} + +static ssize_t get_lpmode(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + int ret; + u64 data = 0; + uint8_t cmd_data[4]={0}; + uint8_t set_cmd; + int cmd_data_len; + set_cmd = CMD_GETDATA; + + dni_klock(); + + /*QSFP1~8*/ + cmd_data[0] = BMC_BUS_5; + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_LP_MODE_1; + cmd_data[3] = 1; + cmd_data_len = sizeof(cmd_data); + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data = (u64)(ret & 0xff); + + /*QSFP9~16*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_LP_MODE_2; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 8; + + /*QSFP17~24*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_LP_MODE_3; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 16; + + /*QSFP25~32*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_LP_MODE_4; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 24; + + /*QSFP33~40*/ + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_LP_MODE_5; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 32; + + /*QSFP41~48*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_LP_MODE_6; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 40; + + /*QSFP49~56*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_LP_MODE_7; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 48; + + /*QSFP57~64*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_LP_MODE_8; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 56; + + dni_kunlock(); + + return sprintf(buf, "0x%016llx\n", data); +} + +static ssize_t get_reset(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + int ret; + u64 data = 0; + uint8_t cmd_data[4]={0}; + uint8_t set_cmd; + int cmd_data_len; + set_cmd = CMD_GETDATA; + + dni_klock(); + + /*QSFP1~8*/ + cmd_data[0] = BMC_BUS_5; + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_RESET_1; + cmd_data[3] = 1; + cmd_data_len = sizeof(cmd_data); + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data = (u64)(ret & 0xff); + + /*QSFP9~16*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_RESET_2; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 8; + + /*QSFP17~24*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_RESET_3; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 16; + + /*QSFP25~32*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_RESET_4; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 24; + + /*QSFP33~40*/ + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_RESET_5; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 32; + + /*QSFP41~48*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_RESET_6; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 40; + + /*QSFP49~56*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_RESET_7; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 48; + + /*QSFP57~64*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_RESET_8; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 56; + + dni_kunlock(); + + return sprintf(buf, "0x%016llx\n", data); +} + +static ssize_t get_response(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + int ret; + u64 data = 0; + uint8_t cmd_data[4]={0}; + uint8_t set_cmd; + int cmd_data_len; + set_cmd = CMD_GETDATA; + + dni_klock(); + + /*QSFP1~8*/ + cmd_data[0] = BMC_BUS_5; + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_RESPONSE_1; + cmd_data[3] = 1; + cmd_data_len = sizeof(cmd_data); + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data = (u64)(ret & 0xff); + + /*QSFP9~16*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_RESPONSE_2; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 8; + + /*QSFP17~24*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_RESPONSE_3; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 16; + + /*QSFP25~32*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_RESPONSE_4; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 24; + + /*QSFP33~40*/ + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_RESPONSE_5; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 32; + + /*QSFP41~48*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_RESPONSE_6; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 40; + + /*QSFP49~56*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_RESPONSE_7; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 48; + + /*QSFP57~64*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_RESPONSE_8; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 56; + + dni_kunlock(); + + return sprintf(buf, "0x%016llx\n", data); +} + +static ssize_t get_interrupt(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + int ret; + u64 data = 0; + uint8_t cmd_data[4]={0}; + uint8_t set_cmd; + int cmd_data_len; + set_cmd = CMD_GETDATA; + + dni_klock(); + + /*QSFP1~8*/ + cmd_data[0] = BMC_BUS_5; + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_INTERRUPT_1; + cmd_data[3] = 1; + cmd_data_len = sizeof(cmd_data); + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data = (u64)(ret & 0xff); + + /*QSFP9~16*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_INTERRUPT_2; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 8; + + /*QSFP17~24*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_INTERRUPT_3; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 16; + + /*QSFP25~32*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_INTERRUPT_4; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 24; + + /*QSFP33~40*/ + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_INTERRUPT_5; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 32; + + /*QSFP41~48*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_INTERRUPT_6; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 40; + + /*QSFP49~56*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_INTERRUPT_7; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 48; + + /*QSFP57~64*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_INTERRUPT_8; + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + data |= (u64)(ret & 0xff) << 56; + + dni_kunlock(); + + return sprintf(buf, "0x%016llx\n", data); +} + +static ssize_t set_lpmode(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long long set_data; + int err; + uint8_t cmd_data[4]={0}; + uint8_t set_cmd; + int cmd_data_len; + set_cmd = CMD_SETDATA; + + dni_klock(); + + err = kstrtoull(buf, 16, &set_data); + if (err){ + dni_kunlock(); + return err; + } + + /*QSFP1~8*/ + cmd_data[0] = BMC_BUS_5; + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_LP_MODE_1; + cmd_data[3] = (set_data & 0xff); + cmd_data_len = sizeof(cmd_data); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP9~16*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_LP_MODE_2; + cmd_data[3] = ((set_data >> 8 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP17~24*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_LP_MODE_3; + cmd_data[3] = ((set_data >> 16 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP25~32*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_LP_MODE_4; + cmd_data[3] = ((set_data >> 24 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP33~40*/ + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_LP_MODE_5; + cmd_data[3] = ((set_data >> 32 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP41~48*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_LP_MODE_6; + cmd_data[3] = ((set_data >> 40 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP49~56*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_LP_MODE_7; + cmd_data[3] = ((set_data >> 48 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP57~64*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_LP_MODE_8; + cmd_data[3] = ((set_data >> 56 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + dni_kunlock(); + + return count; +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long long set_data; + int err; + uint8_t cmd_data[4]={0}; + uint8_t set_cmd; + int cmd_data_len; + set_cmd = CMD_SETDATA; + + dni_klock(); + + err = kstrtoull(buf, 16, &set_data); + if (err){ + dni_kunlock(); + return err; + } + + /*QSFP1~8*/ + cmd_data[0] = BMC_BUS_5; + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_RESET_1; + cmd_data[3] = (set_data & 0xff); + cmd_data_len = sizeof(cmd_data); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP9~16*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_RESET_2; + cmd_data[3] = ((set_data >> 8 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP17~24*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_RESET_3; + cmd_data[3] = ((set_data >> 16 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP25~32*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_RESET_4; + cmd_data[3] = ((set_data >> 24 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP33~40*/ + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_RESET_5; + cmd_data[3] = ((set_data >> 32 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP41~48*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_RESET_6; + cmd_data[3] = ((set_data >> 40 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP49~56*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_RESET_7; + cmd_data[3] = ((set_data >> 48 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP57~64*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_RESET_8; + cmd_data[3] = ((set_data >> 56 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + dni_kunlock(); + + return count; +} + +static ssize_t set_response(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + unsigned long long set_data; + int err; + uint8_t cmd_data[4]={0}; + uint8_t set_cmd; + int cmd_data_len; + set_cmd = CMD_SETDATA; + + dni_klock(); + + err = kstrtoull(buf, 16, &set_data); + if (err){ + dni_kunlock(); + return err; + } + + /*QSFP1~8*/ + cmd_data[0] = BMC_BUS_5; + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_RESPONSE_1; + cmd_data[3] = (set_data & 0xff); + cmd_data_len = sizeof(cmd_data); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP9~16*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_RESPONSE_2; + cmd_data[3] = ((set_data >> 8 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP17~24*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_RESPONSE_3; + cmd_data[3] = ((set_data >> 16 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP25~32*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_RESPONSE_4; + cmd_data[3] = ((set_data >> 24 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP33~40*/ + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = QSFP_RESPONSE_5; + cmd_data[3] = ((set_data >> 32 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP41~48*/ + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_RESPONSE_6; + cmd_data[3] = ((set_data >> 40 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP49~56*/ + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = QSFP_RESPONSE_7; + cmd_data[3] = ((set_data >> 48 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + /*QSFP57~64*/ + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = QSFP_RESPONSE_8; + cmd_data[3] = ((set_data >> 56 ) & 0xff); + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + + dni_kunlock(); + + return count; +} + +static ssize_t psu_scan(struct device *dev, struct device_attribute *dev_attr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + int ret; + uint8_t cmd_data[2]={0}; + uint8_t set_cmd; + int cmd_data_len; + set_cmd = CMD_DEVICE_SCAN; + + dni_klock(); + cmd_data[0] = BMC_BUS_1; + switch (attr->index) + { + case PSU1_SCAN: + cmd_data[1] = PSU1_EEPROM_ADDR; + break; + case PSU2_SCAN: + cmd_data[1] = PSU2_EEPROM_ADDR; + break; + } + cmd_data_len = sizeof(cmd_data); + ret = dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + dni_kunlock(); + return sprintf(buf, "0x%x\n", ret); +} + +static ssize_t get_cpld_reg(struct device *dev, struct device_attribute *dev_attr, char *buf) +{ + int ret; + int mask; + int value; + char note[200]; + unsigned char reg; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cpld_platform_data *pdata = dev->platform_data; + + dni_klock(); + + switch (attr->index) { + case CPLD_REG_ADDR: + dni_kunlock(); + return sprintf(buf, "0x%02x\n", cpupld_reg_addr); + case CPLD_REG_VALUE: + ret = i2c_smbus_read_byte_data(pdata[system_cpld].client, cpupld_reg_addr); + dni_kunlock(); + return sprintf(buf, "0x%02x\n", ret); + case CPLD_VER ... OP_MODULE_INT: + reg = attribute_data[attr->index].reg; + mask = attribute_data[attr->index].mask; + value = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); + sprintf(note, "\n%s\n",attribute_data[attr->index].note); + value = (value & mask); + break; + default: + dni_kunlock(); + return sprintf(buf, "%d not found", attr->index); + } + + switch (mask) { + case 0xFF: + dni_kunlock(); + return sprintf(buf, "0x%02x%s", value, note); + case 0x0F: + dni_kunlock(); + return sprintf(buf, "0x%01x%s", value, note); + case 0xF0: + value = value >> 4; + dni_kunlock(); + return sprintf(buf, "0x%01x%s", value, note); + default : + value = value >> dni_log2(mask); + dni_kunlock(); + return sprintf(buf, "%d%s", value, note); + } + dni_kunlock(); + return sprintf(buf, "%d not found", attr->index); +} + +static ssize_t set_cpld_reg(struct device *dev, struct device_attribute *dev_attr, + const char *buf, size_t count) +{ + int err; + int value; + int set_data; + unsigned long set_data_ul; + unsigned char reg; + unsigned char mask; + unsigned char mask_out; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cpld_platform_data *pdata = dev->platform_data; + + dni_klock(); + + err = kstrtoul(buf, 0, &set_data_ul); + if (err){ + dni_kunlock(); + return err; + } + + set_data = (int)set_data_ul; + if (set_data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + dni_kunlock(); + return count; + } + + switch (attr->index) { + case CPLD_REG_ADDR: + cpupld_reg_addr = set_data; + dni_kunlock(); + return count; + case CPLD_REG_VALUE: + i2c_smbus_write_byte_data(pdata[system_cpld].client, cpupld_reg_addr, set_data); + dni_kunlock(); + return count; + case CPLD_VER ... OP_MODULE_INT: + reg = attribute_data[attr->index].reg; + mask = attribute_data[attr->index].mask; + value = i2c_smbus_read_byte_data(pdata[system_cpld].client, reg); + mask_out = value & ~(mask); + break; + default: + dni_kunlock(); + return sprintf(buf, "%d not found", attr->index); + } + + switch (mask) { + case 0xFF: + set_data = mask_out | (set_data & mask); + break; + case 0x0F: + set_data = mask_out | (set_data & mask); + break; + case 0xF0: + set_data = set_data << 4; + set_data = mask_out | (set_data & mask); + break; + default : + set_data = mask_out | (set_data << dni_log2(mask) ); + } + + i2c_smbus_write_byte_data(pdata[system_cpld].client, reg, set_data); + dni_kunlock(); + return count; +} + +static DEVICE_ATTR(qsfp_present, S_IRUGO, get_present, NULL); +static DEVICE_ATTR(qsfp_lpmode, S_IWUSR | S_IRUGO, get_lpmode, set_lpmode); +static DEVICE_ATTR(qsfp_reset, S_IWUSR | S_IRUGO, get_reset, set_reset); +static DEVICE_ATTR(qsfp_modsel, S_IWUSR | S_IRUGO, get_response, set_response); +static DEVICE_ATTR(qsfp_interrupt, S_IRUGO, get_interrupt, NULL); + +static SENSOR_DEVICE_ATTR(cpld_reg_addr, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, CPLD_REG_ADDR); +static SENSOR_DEVICE_ATTR(cpld_reg_value, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, CPLD_REG_VALUE); +static SENSOR_DEVICE_ATTR(cpld_ver, S_IRUGO, get_cpld_reg, NULL, CPLD_VER); +static SENSOR_DEVICE_ATTR(cpu_board_ver, S_IRUGO, get_cpld_reg, NULL, CPU_BOARD_VER); +static SENSOR_DEVICE_ATTR(cpu_id, S_IRUGO, get_cpld_reg, NULL, CPU_ID); +static SENSOR_DEVICE_ATTR(mb_id, S_IRUGO, get_cpld_reg, NULL, MB_ID); +static SENSOR_DEVICE_ATTR(mb_ver, S_IRUGO, get_cpld_reg, NULL, MB_VER); +static SENSOR_DEVICE_ATTR(cpu0_pwr_ok, S_IRUGO, get_cpld_reg, NULL, CPU0_PWR_OK); +static SENSOR_DEVICE_ATTR(pwr_rail_over_temp, S_IRUGO, get_cpld_reg, NULL, PWR_RAIL_OVER_TEMP); +static SENSOR_DEVICE_ATTR(cpu_disomic_over_temp, S_IRUGO, get_cpld_reg, NULL, CPU_DISOMIC_OVER_TEMP); +static SENSOR_DEVICE_ATTR(ddr_over_temp, S_IRUGO, get_cpld_reg, NULL, DDR_OVER_TEMP); +static SENSOR_DEVICE_ATTR(cpld_pwr_on_rst, S_IRUGO, get_cpld_reg, NULL, CPLD_PWR_ON_RST); +static SENSOR_DEVICE_ATTR(cpld_hard_rst, S_IRUGO, get_cpld_reg, NULL, CPLD_HARD_RST); +static SENSOR_DEVICE_ATTR(cpld_rst, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, CPLD_RST); +static SENSOR_DEVICE_ATTR(mb_rst, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, MB_RST); +static SENSOR_DEVICE_ATTR(psu_fan_int, S_IRUGO, get_cpld_reg, NULL, PSU_FAN_INT); +static SENSOR_DEVICE_ATTR(op_module_int, S_IRUGO, get_cpld_reg, NULL, OP_MODULE_INT); +static SENSOR_DEVICE_ATTR(psu1_scan, S_IRUGO, psu_scan, NULL, PSU1_SCAN); +static SENSOR_DEVICE_ATTR(psu2_scan, S_IRUGO, psu_scan, NULL, PSU2_SCAN); + +static struct attribute *ag9064_cpld_attrs[] = { + &dev_attr_qsfp_present.attr, + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_reset.attr, + &dev_attr_qsfp_modsel.attr, + &dev_attr_qsfp_interrupt.attr, + &sensor_dev_attr_cpld_reg_value.dev_attr.attr, + &sensor_dev_attr_cpld_reg_addr.dev_attr.attr, + &sensor_dev_attr_cpld_ver.dev_attr.attr, + &sensor_dev_attr_cpu_board_ver.dev_attr.attr, + &sensor_dev_attr_cpu_id.dev_attr.attr, + &sensor_dev_attr_mb_id.dev_attr.attr, + &sensor_dev_attr_mb_ver.dev_attr.attr, + &sensor_dev_attr_cpu0_pwr_ok.dev_attr.attr, + &sensor_dev_attr_pwr_rail_over_temp.dev_attr.attr, + &sensor_dev_attr_cpu_disomic_over_temp.dev_attr.attr, + &sensor_dev_attr_ddr_over_temp.dev_attr.attr, + &sensor_dev_attr_cpld_pwr_on_rst.dev_attr.attr, + &sensor_dev_attr_cpld_hard_rst.dev_attr.attr, + &sensor_dev_attr_cpld_rst.dev_attr.attr, + &sensor_dev_attr_mb_rst.dev_attr.attr, + &sensor_dev_attr_psu_fan_int.dev_attr.attr, + &sensor_dev_attr_op_module_int.dev_attr.attr, + &sensor_dev_attr_psu1_scan.dev_attr.attr, + &sensor_dev_attr_psu2_scan.dev_attr.attr, + NULL, +}; + +static struct attribute_group ag9064_cpld_attr_grp = { + .attrs = ag9064_cpld_attrs, +}; + +static int __init cpld_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "CPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(BUS7); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n",BUS7); + return -ENODEV; + } + + pdata[system_cpld].client = i2c_new_dummy(parent, pdata[system_cpld].reg_addr); + if (!pdata[system_cpld].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[system_cpld].reg_addr); + goto error; + } + + ret = sysfs_create_group(&pdev->dev.kobj, &ag9064_cpld_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + return 0; + +error: + i2c_unregister_device(pdata[system_cpld].client); + i2c_put_adapter(parent); + + return -ENODEV; +} + +static int __exit cpld_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &ag9064_cpld_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + if (pdata[system_cpld].client) { + if (!parent) { + parent = (pdata[system_cpld].client)->adapter; + } + i2c_unregister_device(pdata[system_cpld].client); + } + } + i2c_put_adapter(parent); + + return 0; +} + +static struct platform_driver cpld_driver = { + .probe = cpld_probe, + .remove = __exit_p(cpld_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9064-cpld", + }, +}; + +/*---------------- CPLD - end ------------- */ + +/*---------------- module initialization ------------- */ +static int __init delta_ag9064_cpupld_init(void) +{ + int ret; + printk(KERN_WARNING "ag9064_platform_cpupld module initialization\n"); + + // set the CPUPLD prob and remove + ret = platform_driver_register(&cpld_driver); + if (ret) { + printk(KERN_WARNING "Fail to register cpupld driver\n"); + goto error_cpupld_driver; + } + + // register the CPUPLD + ret = platform_device_register(&ag9064_cpld); + if (ret) { + printk(KERN_WARNING "Fail to create cpupld device\n"); + goto error_ag9064_cpupld; + } + return 0; + +error_ag9064_cpupld: + platform_driver_unregister(&cpld_driver); +error_cpupld_driver: + return ret; +} + +static void __exit delta_ag9064_cpupld_exit(void) +{ + platform_device_unregister(&ag9064_cpld); + platform_driver_unregister(&cpld_driver); +} +module_init(delta_ag9064_cpupld_init); +module_exit(delta_ag9064_cpupld_exit); + +MODULE_DESCRIPTION("DNI ag9064 CPLD Platform Support"); +MODULE_AUTHOR("Stanley Chi "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_platform.c b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_platform.c new file mode 100644 index 00000000000..4de9799d460 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_platform.c @@ -0,0 +1,1384 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "delta_ag9064_common.h" + +#define ag9064_i2c_device_num(NUM){ \ + .name = "delta-ag9064-i2c-device", \ + .id = NUM, \ + .dev = { \ + .platform_data = &ag9064_i2c_device_platform_data[NUM], \ + .release = device_release, \ + }, \ +} + +struct i2c_client * i2c_client_9548; +static struct kobject *kobj_sfp; +struct mutex dni_lock;; + +void dni_klock(void) +{ + mutex_lock(&dni_lock); +} +EXPORT_SYMBOL(dni_klock); +void dni_kunlock(void) +{ + mutex_unlock(&dni_lock); +} +EXPORT_SYMBOL(dni_kunlock); + +/* pca9548 - add 8 bus */ +static struct pca954x_platform_mode pca954x_mode[] = +{ + { + .adap_id = 7, + .deselect_on_exit = 1, + }, + { + .adap_id = 8, + .deselect_on_exit = 1, + }, + { + .adap_id = 9, + .deselect_on_exit = 1, + }, + { + .adap_id = 10, + .deselect_on_exit = 1, + }, + { + .adap_id = 11, + .deselect_on_exit = 1, + }, + { + .adap_id = 12, + .deselect_on_exit = 1, + }, + { + .adap_id = 13, + .deselect_on_exit = 1, + }, + { + .adap_id = 14, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_data pca954x_data = +{ + .modes = pca954x_mode, + .num_modes = ARRAY_SIZE(pca954x_mode), +}; + +static struct i2c_board_info __initdata i2c_info_pca9548[] = +{ + { + I2C_BOARD_INFO("pca9548", 0x70), + .platform_data = &pca954x_data, + }, +}; + +void device_release(struct device *dev) +{ + return; +} +EXPORT_SYMBOL(device_release); +void msg_handler(struct ipmi_recv_msg *recv_msg, void* handler_data) +{ + struct completion *comp = recv_msg->user_msg_data; + if (comp) + complete(comp); + else + ipmi_free_recv_msg(recv_msg); + return; +} +EXPORT_SYMBOL(msg_handler); +void dummy_smi_free(struct ipmi_smi_msg *msg) +{ + atomic_dec(&dummy_count); +} +EXPORT_SYMBOL(dummy_smi_free); +void dummy_recv_free(struct ipmi_recv_msg *msg) +{ + atomic_dec(&dummy_count); +} +EXPORT_SYMBOL(dummy_recv_free); +unsigned char dni_log2 (unsigned char num){ + unsigned char num_log2 = 0; + while(num > 0){ + num = num >> 1; + num_log2 += 1; + } + return num_log2 -1; +} +EXPORT_SYMBOL(dni_log2); + +/*---------------- IPMI - start ------------- */ + +int dni_create_user(void) +{ + int rv, i; + + for (i=0,rv=1; idev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -ENODEV; + } + + pdata->client = i2c_new_device(parent, &pdata->info); + if (!pdata->client) { + dev_err(&pdev->dev, "Failed to create i2c client %s at %d\n", + pdata->info.type, pdata->parent); + return -ENODEV; + } + + return 0; + +} + +static int __exit i2c_deivce_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent; + struct i2c_device_platform_data *pdata; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + if (pdata->client) { + parent = (pdata->client)->adapter; + i2c_unregister_device(pdata->client); + i2c_put_adapter(parent); + } + + return 0; +} +static struct platform_driver i2c_device_driver = { + .probe = i2c_device_probe, + .remove = __exit_p(i2c_deivce_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9064-i2c-device", + } +}; + +/*---------------- I2C driver - end ------------- */ + +/*---------------- MUX - start ------------- */ + +struct swpld_mux_platform_data { + int parent; + int base_nr; +}; + +struct swpld_mux { + struct i2c_adapter *parent; + struct i2c_adapter **child; + struct swpld_mux_platform_data data; +}; + +static struct swpld_mux_platform_data ag9064_swpld_mux_platform_data[] = { + { + .parent = BUS9, + .base_nr = BUS9_BASE_NUM, + }, +}; + +static struct platform_device ag9064_swpld_mux[] = +{ + { + .name = "delta-ag9064-swpld-mux", + .id = 0, + .dev = { + .platform_data = &ag9064_swpld_mux_platform_data[0], + .release = device_release, + }, + }, +}; + +static int swpld_mux_select(struct i2c_mux_core *muxc, u32 chan) +{ + uint8_t cmd_data[4]={0}; + struct swpld_mux *mux = i2c_mux_priv(muxc); + uint8_t set_cmd; + int cmd_data_len; + + if ( mux->data.base_nr == BUS9_BASE_NUM ) + { + set_cmd = CMD_SETDATA; + cmd_data[0] = BMC_BUS_5; + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = QSFP_PORT_MUX_REG; + cmd_data[3] = chan + 1; + cmd_data_len = sizeof(cmd_data); + return dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + } + else + { + printk(KERN_ERR "Swpld mux QSFP select port error\n"); + return 0; + } + +} + +static int __init swpld_mux_probe(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc; + struct swpld_mux *mux; + struct swpld_mux_platform_data *pdata; + struct i2c_adapter *parent; + int i, ret, dev_num; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD platform data not found\n"); + return -ENODEV; + } + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) { + printk(KERN_ERR "Failed to allocate memory for mux\n"); + return -ENOMEM; + } + mux->data = *pdata; + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + kfree(mux); + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", pdata->parent); + return -ENODEV; + } + /* Judge bus number to decide how many devices*/ + switch (pdata->parent) { + case BUS9: + dev_num = BUS9_DEV_NUM; + break; + default : + dev_num = DEFAULT_NUM; + break; + } + + muxc = i2c_mux_alloc(parent, &pdev->dev, dev_num, 0, 0,swpld_mux_select, NULL); + if (!muxc) { + ret = -ENOMEM; + goto alloc_failed; + } + muxc->priv = mux; + platform_set_drvdata(pdev, muxc); + + for (i = 0; i < dev_num; i++) + { + int nr = pdata->base_nr + i; + unsigned int class = 0; + ret = i2c_mux_add_adapter(muxc, nr, i, class); + if (ret) { + dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + goto add_adapter_failed; + } + } + dev_info(&pdev->dev, "%d port mux on %s adapter\n", dev_num, parent->name); + return 0; + +add_adapter_failed: + i2c_mux_del_adapters(muxc); +alloc_failed: + i2c_put_adapter(parent); + kfree(mux); + + return ret; +} + +static int __exit swpld_mux_remove(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc = platform_get_drvdata(pdev); + struct i2c_adapter *parent=muxc->parent; + + i2c_mux_del_adapters(muxc); + i2c_put_adapter(parent); + + return 0; +} + +static struct platform_driver swpld_mux_driver = { + .probe = swpld_mux_probe, + .remove = __exit_p(swpld_mux_remove), /* TODO */ + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9064-swpld-mux", + }, +}; + +/*---------------- MUX - end ------------- */ + +/*---------------- SFP - start ------------- */ + +struct delta_bin_attribute { + struct bin_attribute attr; + int index; +}; + +#define to_delta_attr(x) container_of(x, struct delta_bin_attribute, attr) + +#define BIN_ATTR(_name, _mode, _read, _write, _size, _index) { \ + .attr = { \ + .attr = {.name = __stringify(_name), .mode = _mode }, \ + .read = _read, \ + .write = _write, \ + .size = _size, \ + }, \ + .index = _index, \ +} + +#define DELTA_BIN_ATTR(_name, _mode, _read, _write, _size, _index) \ +struct delta_bin_attribute delta_attr_##_name \ + = BIN_ATTR(_name, _mode, _read, _write, _size, _index) + +static char eeprom_data[EEPROM_SIZE]; + +static ssize_t access_user_space(const char *name, char *buf, size_t len, loff_t offset, int mode) +{ + struct file *fp; + mm_segment_t fs; + loff_t pos = offset; + ssize_t vfs_ret = 0; + int i = 0; + + fs = get_fs(); + set_fs(get_ds()); + + switch(mode) + { + case ATTR_W: + fp = filp_open(name, O_WRONLY, S_IWUGO); + if (IS_ERR(fp)){ + return -ENOENT; + } + for(i = 0; i < ((len / EEPROM_ARCH_SIZE) + 1); i++) + { + len = len - pos; + vfs_ret = vfs_write(fp, buf + pos, len, &pos); + } + break; + case ATTR_R: + fp = filp_open(name, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)){ + return -ENOENT; + } + vfs_ret = vfs_read(fp, buf, len, &pos); + break; + } + + set_fs(fs); + filp_close(fp, NULL); + return vfs_ret; +} + +static ssize_t delta_bin_attr_read(struct file *filp, struct kobject *kobj, struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct delta_bin_attribute *delta_attr = to_delta_attr(attr); + char attr_path[100]; + + dni_klock(); + + memset(buf, 0, count); + switch(delta_attr->index) { + case EEPROM_SFP_1: + case EEPROM_SFP_2: + case EEPROM_SFP_3: + case EEPROM_SFP_4: + case EEPROM_SFP_5: + case EEPROM_SFP_6: + case EEPROM_SFP_7: + case EEPROM_SFP_8: + case EEPROM_SFP_9: + case EEPROM_SFP_10: + case EEPROM_SFP_11: + case EEPROM_SFP_12: + case EEPROM_SFP_13: + case EEPROM_SFP_14: + case EEPROM_SFP_15: + case EEPROM_SFP_16: + case EEPROM_SFP_17: + case EEPROM_SFP_18: + case EEPROM_SFP_19: + case EEPROM_SFP_20: + case EEPROM_SFP_21: + case EEPROM_SFP_22: + case EEPROM_SFP_23: + case EEPROM_SFP_24: + case EEPROM_SFP_25: + case EEPROM_SFP_26: + case EEPROM_SFP_27: + case EEPROM_SFP_28: + case EEPROM_SFP_29: + case EEPROM_SFP_30: + case EEPROM_SFP_31: + case EEPROM_SFP_32: + case EEPROM_SFP_33: + case EEPROM_SFP_34: + case EEPROM_SFP_35: + case EEPROM_SFP_36: + case EEPROM_SFP_37: + case EEPROM_SFP_38: + case EEPROM_SFP_39: + case EEPROM_SFP_40: + case EEPROM_SFP_41: + case EEPROM_SFP_42: + case EEPROM_SFP_43: + case EEPROM_SFP_44: + case EEPROM_SFP_45: + case EEPROM_SFP_46: + case EEPROM_SFP_47: + case EEPROM_SFP_48: + case EEPROM_SFP_49: + case EEPROM_SFP_50: + case EEPROM_SFP_51: + case EEPROM_SFP_52: + case EEPROM_SFP_53: + case EEPROM_SFP_54: + case EEPROM_SFP_55: + case EEPROM_SFP_56: + case EEPROM_SFP_57: + case EEPROM_SFP_58: + case EEPROM_SFP_59: + case EEPROM_SFP_60: + case EEPROM_SFP_61: + case EEPROM_SFP_62: + case EEPROM_SFP_63: + case EEPROM_SFP_64: + sprintf(attr_path, "/sys/bus/i2c/devices/%d-0050/eeprom", delta_attr->index + EEPROM_MASK); + if (access_user_space(attr_path, eeprom_data, EEPROM_SIZE, off, ATTR_R) < 0) { + goto ACCESS_ERROR; + } + count = (count <= EEPROM_SIZE) ? count : EEPROM_SIZE; + memcpy(buf, eeprom_data + off, count); + break; + default: + goto ACCESS_ERROR; + } + dni_kunlock(); + return count; + +ACCESS_ERROR: + dni_kunlock(); + return -ETIMEDOUT; +} + +static ssize_t delta_bin_attr_write(struct file *filp, struct kobject *kobj, struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct delta_bin_attribute *delta_attr = to_delta_attr(attr); + char attr_path[100]; + + dni_klock(); + + switch(delta_attr->index){ + case EEPROM_SFP_1: + case EEPROM_SFP_2: + case EEPROM_SFP_3: + case EEPROM_SFP_4: + case EEPROM_SFP_5: + case EEPROM_SFP_6: + case EEPROM_SFP_7: + case EEPROM_SFP_8: + case EEPROM_SFP_9: + case EEPROM_SFP_10: + case EEPROM_SFP_11: + case EEPROM_SFP_12: + case EEPROM_SFP_13: + case EEPROM_SFP_14: + case EEPROM_SFP_15: + case EEPROM_SFP_16: + case EEPROM_SFP_17: + case EEPROM_SFP_18: + case EEPROM_SFP_19: + case EEPROM_SFP_20: + case EEPROM_SFP_21: + case EEPROM_SFP_22: + case EEPROM_SFP_23: + case EEPROM_SFP_24: + case EEPROM_SFP_25: + case EEPROM_SFP_26: + case EEPROM_SFP_27: + case EEPROM_SFP_28: + case EEPROM_SFP_29: + case EEPROM_SFP_30: + case EEPROM_SFP_31: + case EEPROM_SFP_32: + case EEPROM_SFP_33: + case EEPROM_SFP_34: + case EEPROM_SFP_35: + case EEPROM_SFP_36: + case EEPROM_SFP_37: + case EEPROM_SFP_38: + case EEPROM_SFP_39: + case EEPROM_SFP_40: + case EEPROM_SFP_41: + case EEPROM_SFP_42: + case EEPROM_SFP_43: + case EEPROM_SFP_44: + case EEPROM_SFP_45: + case EEPROM_SFP_46: + case EEPROM_SFP_47: + case EEPROM_SFP_48: + case EEPROM_SFP_49: + case EEPROM_SFP_50: + case EEPROM_SFP_51: + case EEPROM_SFP_52: + case EEPROM_SFP_53: + case EEPROM_SFP_54: + case EEPROM_SFP_55: + case EEPROM_SFP_56: + case EEPROM_SFP_57: + case EEPROM_SFP_58: + case EEPROM_SFP_59: + case EEPROM_SFP_60: + case EEPROM_SFP_61: + case EEPROM_SFP_62: + case EEPROM_SFP_63: + case EEPROM_SFP_64: + sprintf(attr_path, "/sys/bus/i2c/devices/%d-0050/eeprom", delta_attr->index + EEPROM_MASK); + if (access_user_space(attr_path, buf, count, off, ATTR_W) < 0) { + goto ACCESS_ERROR; + } + break; + default: + goto ACCESS_ERROR; + } + + dni_kunlock(); + return count; +ACCESS_ERROR: + dni_kunlock(); + return -ETIMEDOUT; +} + +DELTA_BIN_ATTR(eeprom_sfp_1, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_1); +DELTA_BIN_ATTR(eeprom_sfp_2, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_2); +DELTA_BIN_ATTR(eeprom_sfp_3, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_3); +DELTA_BIN_ATTR(eeprom_sfp_4, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_4); +DELTA_BIN_ATTR(eeprom_sfp_5, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_5); +DELTA_BIN_ATTR(eeprom_sfp_6, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_6); +DELTA_BIN_ATTR(eeprom_sfp_7, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_7); +DELTA_BIN_ATTR(eeprom_sfp_8, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_8); +DELTA_BIN_ATTR(eeprom_sfp_9, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_9); +DELTA_BIN_ATTR(eeprom_sfp_10, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_10); +DELTA_BIN_ATTR(eeprom_sfp_11, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_11); +DELTA_BIN_ATTR(eeprom_sfp_12, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_12); +DELTA_BIN_ATTR(eeprom_sfp_13, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_13); +DELTA_BIN_ATTR(eeprom_sfp_14, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_14); +DELTA_BIN_ATTR(eeprom_sfp_15, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_15); +DELTA_BIN_ATTR(eeprom_sfp_16, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_16); +DELTA_BIN_ATTR(eeprom_sfp_17, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_17); +DELTA_BIN_ATTR(eeprom_sfp_18, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_18); +DELTA_BIN_ATTR(eeprom_sfp_19, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_19); +DELTA_BIN_ATTR(eeprom_sfp_20, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_20); +DELTA_BIN_ATTR(eeprom_sfp_21, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_21); +DELTA_BIN_ATTR(eeprom_sfp_22, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_22); +DELTA_BIN_ATTR(eeprom_sfp_23, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_23); +DELTA_BIN_ATTR(eeprom_sfp_24, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_24); +DELTA_BIN_ATTR(eeprom_sfp_25, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_25); +DELTA_BIN_ATTR(eeprom_sfp_26, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_26); +DELTA_BIN_ATTR(eeprom_sfp_27, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_27); +DELTA_BIN_ATTR(eeprom_sfp_28, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_28); +DELTA_BIN_ATTR(eeprom_sfp_29, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_29); +DELTA_BIN_ATTR(eeprom_sfp_30, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_30); +DELTA_BIN_ATTR(eeprom_sfp_31, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_31); +DELTA_BIN_ATTR(eeprom_sfp_32, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_32); +DELTA_BIN_ATTR(eeprom_sfp_33, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_33); +DELTA_BIN_ATTR(eeprom_sfp_34, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_34); +DELTA_BIN_ATTR(eeprom_sfp_35, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_35); +DELTA_BIN_ATTR(eeprom_sfp_36, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_36); +DELTA_BIN_ATTR(eeprom_sfp_37, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_37); +DELTA_BIN_ATTR(eeprom_sfp_38, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_38); +DELTA_BIN_ATTR(eeprom_sfp_39, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_39); +DELTA_BIN_ATTR(eeprom_sfp_40, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_40); +DELTA_BIN_ATTR(eeprom_sfp_41, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_41); +DELTA_BIN_ATTR(eeprom_sfp_42, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_42); +DELTA_BIN_ATTR(eeprom_sfp_43, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_43); +DELTA_BIN_ATTR(eeprom_sfp_44, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_44); +DELTA_BIN_ATTR(eeprom_sfp_45, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_45); +DELTA_BIN_ATTR(eeprom_sfp_46, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_46); +DELTA_BIN_ATTR(eeprom_sfp_47, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_47); +DELTA_BIN_ATTR(eeprom_sfp_48, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_48); +DELTA_BIN_ATTR(eeprom_sfp_49, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_49); +DELTA_BIN_ATTR(eeprom_sfp_50, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_50); +DELTA_BIN_ATTR(eeprom_sfp_51, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_51); +DELTA_BIN_ATTR(eeprom_sfp_52, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_52); +DELTA_BIN_ATTR(eeprom_sfp_53, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_53); +DELTA_BIN_ATTR(eeprom_sfp_54, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_54); +DELTA_BIN_ATTR(eeprom_sfp_55, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_55); +DELTA_BIN_ATTR(eeprom_sfp_56, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_56); +DELTA_BIN_ATTR(eeprom_sfp_57, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_57); +DELTA_BIN_ATTR(eeprom_sfp_58, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_58); +DELTA_BIN_ATTR(eeprom_sfp_59, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_59); +DELTA_BIN_ATTR(eeprom_sfp_60, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_60); +DELTA_BIN_ATTR(eeprom_sfp_61, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_61); +DELTA_BIN_ATTR(eeprom_sfp_62, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_62); +DELTA_BIN_ATTR(eeprom_sfp_63, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_63); +DELTA_BIN_ATTR(eeprom_sfp_64, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_64); + +static struct bin_attribute *sfp_attrs[] = { + &delta_attr_eeprom_sfp_1.attr, + &delta_attr_eeprom_sfp_2.attr, + &delta_attr_eeprom_sfp_3.attr, + &delta_attr_eeprom_sfp_4.attr, + &delta_attr_eeprom_sfp_5.attr, + &delta_attr_eeprom_sfp_6.attr, + &delta_attr_eeprom_sfp_7.attr, + &delta_attr_eeprom_sfp_8.attr, + &delta_attr_eeprom_sfp_9.attr, + &delta_attr_eeprom_sfp_10.attr, + &delta_attr_eeprom_sfp_11.attr, + &delta_attr_eeprom_sfp_12.attr, + &delta_attr_eeprom_sfp_13.attr, + &delta_attr_eeprom_sfp_14.attr, + &delta_attr_eeprom_sfp_15.attr, + &delta_attr_eeprom_sfp_16.attr, + &delta_attr_eeprom_sfp_17.attr, + &delta_attr_eeprom_sfp_18.attr, + &delta_attr_eeprom_sfp_19.attr, + &delta_attr_eeprom_sfp_20.attr, + &delta_attr_eeprom_sfp_21.attr, + &delta_attr_eeprom_sfp_22.attr, + &delta_attr_eeprom_sfp_23.attr, + &delta_attr_eeprom_sfp_24.attr, + &delta_attr_eeprom_sfp_25.attr, + &delta_attr_eeprom_sfp_26.attr, + &delta_attr_eeprom_sfp_27.attr, + &delta_attr_eeprom_sfp_28.attr, + &delta_attr_eeprom_sfp_29.attr, + &delta_attr_eeprom_sfp_30.attr, + &delta_attr_eeprom_sfp_31.attr, + &delta_attr_eeprom_sfp_32.attr, + &delta_attr_eeprom_sfp_33.attr, + &delta_attr_eeprom_sfp_34.attr, + &delta_attr_eeprom_sfp_35.attr, + &delta_attr_eeprom_sfp_36.attr, + &delta_attr_eeprom_sfp_37.attr, + &delta_attr_eeprom_sfp_38.attr, + &delta_attr_eeprom_sfp_39.attr, + &delta_attr_eeprom_sfp_40.attr, + &delta_attr_eeprom_sfp_41.attr, + &delta_attr_eeprom_sfp_42.attr, + &delta_attr_eeprom_sfp_43.attr, + &delta_attr_eeprom_sfp_44.attr, + &delta_attr_eeprom_sfp_45.attr, + &delta_attr_eeprom_sfp_46.attr, + &delta_attr_eeprom_sfp_47.attr, + &delta_attr_eeprom_sfp_48.attr, + &delta_attr_eeprom_sfp_49.attr, + &delta_attr_eeprom_sfp_50.attr, + &delta_attr_eeprom_sfp_51.attr, + &delta_attr_eeprom_sfp_52.attr, + &delta_attr_eeprom_sfp_53.attr, + &delta_attr_eeprom_sfp_54.attr, + &delta_attr_eeprom_sfp_55.attr, + &delta_attr_eeprom_sfp_56.attr, + &delta_attr_eeprom_sfp_57.attr, + &delta_attr_eeprom_sfp_58.attr, + &delta_attr_eeprom_sfp_59.attr, + &delta_attr_eeprom_sfp_60.attr, + &delta_attr_eeprom_sfp_61.attr, + &delta_attr_eeprom_sfp_62.attr, + &delta_attr_eeprom_sfp_63.attr, + &delta_attr_eeprom_sfp_64.attr, + NULL, /* need to NULL terminate the list of attributes */ +}; + +static struct attribute_group sfp_attr_grp = { + .bin_attrs = sfp_attrs, +}; +/*---------------- SFP - end ------------- */ + + +/*---------------- module initialization ------------- */ + +static int __init delta_ag9064_platform_init(void) +{ + struct i2c_adapter *adapter; + struct swpld_mux_platform_data *swpld_pdata; + int ret,i = 0; + + printk("ag9064_platform module initialization\n"); + + mutex_init(&dni_lock); + + adapter = i2c_get_adapter(BUS2); + i2c_client_9548 = i2c_new_device(adapter, &i2c_info_pca9548[0]); + i2c_put_adapter(adapter); + + ret = dni_create_user(); + if (ret != 0){ + printk(KERN_WARNING "Fail to create IPMI user\n"); + } + + // register the mux prob which call the SWPLD + ret = platform_driver_register(&swpld_mux_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld mux driver\n"); + goto error_swpld_mux_driver; + } + + // register the i2c devices + ret = platform_driver_register(&i2c_device_driver); + if (ret) { + printk(KERN_WARNING "Fail to register i2c device driver\n"); + goto error_i2c_device_driver; + } + + swpld_pdata = ag9064_swpld_mux[0].dev.platform_data; + ret = platform_device_register(&ag9064_swpld_mux[0]); + if (ret) { + printk(KERN_WARNING "Fail to create swpld mux\n"); + goto error_ag9064_swpld_mux; + } + + for (i = 0; i < ARRAY_SIZE(ag9064_i2c_device); i++) + { + ret = platform_device_register(&ag9064_i2c_device[i]); + if (ret) + { + printk(KERN_WARNING "Fail to create i2c device %d\n", i); + goto error_ag9064_i2c_device; + } + } + + kobj_sfp = kobject_create_and_add("sfp", kernel_kobj); + if(!kobj_sfp) + { + return -ENOMEM; + } + ret = sysfs_create_group(kobj_sfp, &sfp_attr_grp); + if (ret) + { + printk(KERN_WARNING "Fail to create sysfs of sfp group\n"); + goto error_create_sfp_group; + } + + if (ret) + goto error_create_sfp_group; + + return 0; + +error_create_sfp_group: + kobject_put(kobj_sfp); +error_ag9064_i2c_device: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&ag9064_i2c_device[i]); + } + i = ARRAY_SIZE(ag9064_swpld_mux); +error_ag9064_swpld_mux: + platform_device_unregister(&ag9064_swpld_mux[0]); + platform_driver_unregister(&i2c_device_driver); +error_i2c_device_driver: + platform_driver_unregister(&swpld_mux_driver); +error_swpld_mux_driver: + return ret; +} + +static void __exit delta_ag9064_platform_exit(void) +{ + int i = 0; + + kobject_put(kobj_sfp); + for ( i = 0; i < ARRAY_SIZE(ag9064_i2c_device); i++ ) { + platform_device_unregister(&ag9064_i2c_device[i]); + } + + platform_device_unregister(&ag9064_swpld_mux[0]); + platform_driver_unregister(&i2c_device_driver); + platform_driver_unregister(&swpld_mux_driver); + i2c_unregister_device(i2c_client_9548); +} + +module_init(delta_ag9064_platform_init); +module_exit(delta_ag9064_platform_exit); + +MODULE_DESCRIPTION("DELTA ag9064 Platform Support"); +MODULE_AUTHOR("Johnson Lu "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_swpld.c b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_swpld.c new file mode 100644 index 00000000000..fd17a28378a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/delta_ag9064_swpld.c @@ -0,0 +1,622 @@ +#include "delta_ag9064_common.h" + +unsigned char swpld1_reg_addr; +unsigned char swpld2_reg_addr; +unsigned char swpld3_reg_addr; +unsigned char swpld4_reg_addr; + +/*---------------- CPLD - start ------------- */ +/* SWPLD1 -- device */ +static struct platform_device swpld1_device = { + .name = "delta-ag9064-swpld1", + .id = 0, + .dev = { + .platform_data = ag9064_swpld1_platform_data, + .release = device_release + }, +}; + +static struct platform_device swpld2_device = { + .name = "delta-ag9064-swpld2", + .id = 0, + .dev = { + .platform_data = ag9064_swpld2_platform_data, + .release = device_release + }, +}; +static struct platform_device swpld3_device = { + .name = "delta-ag9064-swpld3", + .id = 0, + .dev = { + .platform_data = ag9064_swpld3_platform_data, + .release = device_release + }, +}; +static struct platform_device swpld4_device = { + .name = "delta-ag9064-swpld4", + .id = 0, + .dev = { + .platform_data = ag9064_swpld4_platform_data, + .release = device_release + }, +}; + +static ssize_t get_swpld_reg(struct device *dev, struct device_attribute *dev_attr, char *buf) +{ + int ret; + int mask; + int value; + int cmd_data_len; + char note[200]; + uint8_t cmd_data[4]={0}; + uint8_t get_cmd; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + + dni_klock(); + cmd_data_len = sizeof(cmd_data); + get_cmd = CMD_GETDATA; + cmd_data[0] = BMC_BUS_5; + cmd_data[3] = 1; + mask = attribute_data[attr->index].mask; + sprintf(note, "\n%s\n",attribute_data[attr->index].note); + + if (attr->index <= SWPLD4_REG_VALUE){ + switch (attr->index) { + case SWPLD1_REG_ADDR: + dni_kunlock(); + return sprintf(buf, "0x%02x\n", swpld1_reg_addr); + case SWPLD2_REG_ADDR: + dni_kunlock(); + return sprintf(buf, "0x%02x\n", swpld2_reg_addr); + case SWPLD3_REG_ADDR: + dni_kunlock(); + return sprintf(buf, "0x%02x\n", swpld3_reg_addr); + case SWPLD4_REG_ADDR: + dni_kunlock(); + return sprintf(buf, "0x%02x\n", swpld4_reg_addr); + case SWPLD1_REG_VALUE: + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = swpld1_reg_addr; + break; + case SWPLD2_REG_VALUE: + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = swpld2_reg_addr; + break; + case SWPLD3_REG_VALUE: + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = swpld3_reg_addr; + break; + case SWPLD4_REG_VALUE: + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = swpld4_reg_addr; + break; + default: + dni_kunlock(); + return sprintf(buf, "%d not found", attr->index); + } + ret = dni_bmc_cmd(get_cmd, cmd_data, cmd_data_len); + ret = ret & 0xff; + dni_kunlock(); + return sprintf(buf, "0x%02x\n", ret); + }else{ + + switch (attr->index) { + case SWPLD1_MAJOR_VER ... PSU_LED_MODE : + cmd_data[1] = SWPLD1_ADDR; + break; + case SWPLD2_MAJOR_VER ... FAN_MOD4_LED : + cmd_data[1] = SWPLD2_ADDR; + break; + case SWPLD3_MAJOR_VER ... PLATFORM_TYPE : + cmd_data[1] = SWPLD3_ADDR; + break; + case SW_BOARD_ID1 ... FAN_EEPROM_WP : + cmd_data[1] = SWPLD4_ADDR; + break; + default: + dni_kunlock(); + return sprintf(buf, "%d not found", attr->index); + } + cmd_data[2] = attribute_data[attr->index].reg; + value = dni_bmc_cmd(get_cmd, cmd_data, cmd_data_len); + value = value & mask; + switch (mask) { + case 0xFF: + dni_kunlock(); + return sprintf(buf, "0x%02x%s", value, note); + case 0x0F: + dni_kunlock(); + return sprintf(buf, "0x%01x%s", value, note); + case 0xF0: + value = value >> 4; + dni_kunlock(); + return sprintf(buf, "0x%01x%s", value, note); + case 0xC0: + value = value >> 6; + dni_kunlock(); + return sprintf(buf, "0x%01x%s", value, note); + case 0x30: + value = value >> 4; + dni_kunlock(); + return sprintf(buf, "0x%01x%s", value, note); + default : + value = value >> dni_log2(mask); + dni_kunlock(); + return sprintf(buf, "%d%s", value, note); + } + } + dni_kunlock(); + return sprintf(buf, "%d not found", attr->index); +} + +static ssize_t set_swpld_reg(struct device *dev, struct device_attribute *dev_attr, + const char *buf, size_t count) +{ + int err; + int value; + int set_data; + int cmd_data_len; + uint8_t cmd_data[4]={0}; + uint8_t set_cmd; + uint8_t get_cmd; + unsigned long set_data_ul; + unsigned char mask; + unsigned char mask_out; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + + cmd_data_len = sizeof(cmd_data); + set_cmd = CMD_SETDATA; + get_cmd = CMD_GETDATA; + + dni_klock(); + + err = kstrtoul(buf, 0, &set_data_ul); + if (err){ + dni_kunlock(); + return err; + } + + if (set_data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + dni_kunlock(); + return count; + } + + set_data = (int)set_data_ul; + if (attr->index <= SWPLD4_REG_VALUE){ + cmd_data[0] = BMC_BUS_5; + cmd_data[3] = set_data; + switch (attr->index) { + //reg_addr + case SWPLD1_REG_ADDR: + swpld1_reg_addr = set_data; + dni_kunlock(); + return count; + case SWPLD2_REG_ADDR: + swpld2_reg_addr = set_data; + dni_kunlock(); + return count; + case SWPLD3_REG_ADDR: + swpld3_reg_addr = set_data; + dni_kunlock(); + return count; + case SWPLD4_REG_ADDR: + swpld4_reg_addr = set_data; + dni_kunlock(); + return count; + //reg_value + case SWPLD1_REG_VALUE: + cmd_data[1] = SWPLD1_ADDR; + cmd_data[2] = swpld1_reg_addr; + break; + case SWPLD2_REG_VALUE: + cmd_data[1] = SWPLD2_ADDR; + cmd_data[2] = swpld2_reg_addr; + break; + case SWPLD3_REG_VALUE: + cmd_data[1] = SWPLD3_ADDR; + cmd_data[2] = swpld3_reg_addr; + break; + case SWPLD4_REG_VALUE: + cmd_data[1] = SWPLD4_ADDR; + cmd_data[2] = swpld4_reg_addr; + break; + default : + dni_kunlock(); + return sprintf(buf, "%d not found", attr->index); + } + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + dni_kunlock(); + return count; + } + else{ + cmd_data[0] = BMC_BUS_5; + cmd_data[2] = attribute_data[attr->index].reg; + cmd_data[3] = 1; + switch (attr->index) { + //attributes + case SWPLD1_MAJOR_VER ... PSU_LED_MODE://SWPLD1 + cmd_data[1] = SWPLD1_ADDR; + break; + case SWPLD2_MAJOR_VER ... FAN_MOD4_LED://SWPLD2 + cmd_data[1] = SWPLD2_ADDR; + break; + case SWPLD3_MAJOR_VER ... PLATFORM_TYPE://SWPLD3 + cmd_data[1] = SWPLD3_ADDR; + break; + case SW_BOARD_ID1 ... FAN_EEPROM_WP://SWPLD4 + cmd_data[1] = SWPLD4_ADDR; + break; + default: + dni_kunlock(); + return sprintf(buf, "%d not found", attr->index); + } + + value = dni_bmc_cmd(get_cmd, cmd_data, cmd_data_len); + mask = attribute_data[attr->index].mask; + mask_out = value & ~(mask); + cmd_data[3] = set_data; + switch (mask) { + case 0xFF: + set_data = mask_out | (set_data & mask); + break; + case 0x0F: + set_data = mask_out | (set_data & mask); + break; + case 0xF0: + set_data = set_data << 4; + set_data = mask_out | (set_data & mask); + break; + case 0xC0: + set_data = set_data << 6; + set_data = mask_out | (set_data & mask); + break; + case 0x30: + set_data = set_data << 4; + set_data = mask_out | (set_data & mask); + break; + default : + set_data = mask_out | (set_data << dni_log2(mask) ); + } + dni_bmc_cmd(set_cmd, cmd_data, cmd_data_len); + dni_kunlock(); + return count; + } + dni_kunlock(); + return count; +} + +//SWPLD +static SENSOR_DEVICE_ATTR(swpld1_reg_addr, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SWPLD1_REG_ADDR); +static SENSOR_DEVICE_ATTR(swpld1_reg_value, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SWPLD1_REG_VALUE); +static SENSOR_DEVICE_ATTR(swpld2_reg_addr, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SWPLD2_REG_ADDR); +static SENSOR_DEVICE_ATTR(swpld2_reg_value, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SWPLD2_REG_VALUE); +static SENSOR_DEVICE_ATTR(swpld3_reg_addr, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SWPLD3_REG_ADDR); +static SENSOR_DEVICE_ATTR(swpld3_reg_value, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SWPLD3_REG_VALUE); +static SENSOR_DEVICE_ATTR(swpld4_reg_addr, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SWPLD4_REG_ADDR); +static SENSOR_DEVICE_ATTR(swpld4_reg_value, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SWPLD4_REG_VALUE); +//SWPLD1 +static SENSOR_DEVICE_ATTR(swpld1_major_ver, S_IRUGO, get_swpld_reg, NULL, SWPLD1_MAJOR_VER); +static SENSOR_DEVICE_ATTR(swpld1_minor_ver, S_IRUGO, get_swpld_reg, NULL, SWPLD1_MINOR_VER); +static SENSOR_DEVICE_ATTR(swpld1_scrtch_reg, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SWPLD1_SCRTCH_REG); +static SENSOR_DEVICE_ATTR(psu1_pwr_ok, S_IRUGO, get_swpld_reg, NULL, PSU1_PWR_OK); +static SENSOR_DEVICE_ATTR(psu1_int, S_IRUGO, get_swpld_reg, NULL, PSU1_INT); +static SENSOR_DEVICE_ATTR(psu2_pwr_ok, S_IRUGO, get_swpld_reg, NULL, PSU2_PWR_OK); +static SENSOR_DEVICE_ATTR(psu2_int, S_IRUGO, get_swpld_reg, NULL, PSU2_INT); +static SENSOR_DEVICE_ATTR(psu1_green_led, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, PSU1_GREEN_LED); +static SENSOR_DEVICE_ATTR(psu1_red_led, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, PSU1_RED_LED); +static SENSOR_DEVICE_ATTR(psu2_green_led, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, PSU2_GREEN_LED); +static SENSOR_DEVICE_ATTR(psu2_red_led, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, PSU2_RED_LED); +static SENSOR_DEVICE_ATTR(psu_led_mode, S_IRUGO, get_swpld_reg, NULL, PSU_LED_MODE); +//SWPLD2 +static SENSOR_DEVICE_ATTR(swpld2_major_ver, S_IRUGO, get_swpld_reg, NULL, SWPLD2_MAJOR_VER); +static SENSOR_DEVICE_ATTR(swpld2_minor_ver, S_IRUGO, get_swpld_reg, NULL, SWPLD2_MINOR_VER); +static SENSOR_DEVICE_ATTR(swpld2_scrtch_reg, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SWPLD2_SCRTCH_REG); +static SENSOR_DEVICE_ATTR(fan_led, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, FAN_LED); +static SENSOR_DEVICE_ATTR(sys_led, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SYS_LED); +static SENSOR_DEVICE_ATTR(fan_mod1_led, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, FAN_MOD1_LED); +static SENSOR_DEVICE_ATTR(fan_mod2_led, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, FAN_MOD2_LED); +static SENSOR_DEVICE_ATTR(fan_mod3_led, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, FAN_MOD3_LED); +static SENSOR_DEVICE_ATTR(fan_mod4_led, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, FAN_MOD4_LED); +//SWPLD3 +static SENSOR_DEVICE_ATTR(swpld3_major_ver, S_IRUGO, get_swpld_reg, NULL, SWPLD3_MAJOR_VER); +static SENSOR_DEVICE_ATTR(swpld3_minor_ver, S_IRUGO, get_swpld_reg, NULL, SWPLD3_MINOR_VER); +static SENSOR_DEVICE_ATTR(swpld3_scrtch_reg, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SWPLD3_SCRTCH_REG); +static SENSOR_DEVICE_ATTR(sb_ver, S_IRUGO, get_swpld_reg, NULL, SB_VER); +static SENSOR_DEVICE_ATTR(platform_type, S_IRUGO, get_swpld_reg, NULL, PLATFORM_TYPE); + +//SWPLD4 +static SENSOR_DEVICE_ATTR(sw_board_id1, S_IRUGO, get_swpld_reg, NULL, SW_BOARD_ID1); +static SENSOR_DEVICE_ATTR(sw_board_id2, S_IRUGO, get_swpld_reg, NULL, SW_BOARD_ID2); +static SENSOR_DEVICE_ATTR(swbd_ver, S_IRUGO, get_swpld_reg, NULL, SWBD_VER); +static SENSOR_DEVICE_ATTR(swpld4_ver, S_IRUGO, get_swpld_reg, NULL, SWPLD4_VER); +static SENSOR_DEVICE_ATTR(psu_fan_event, S_IRUGO, get_swpld_reg, NULL, PSU_FAN_EVENT); +static SENSOR_DEVICE_ATTR(cpu_thermal_int, S_IRUGO, get_swpld_reg, NULL, CPU_THERMAL_INT); +static SENSOR_DEVICE_ATTR(fan_int, S_IRUGO, get_swpld_reg, NULL, FAN_INT); +static SENSOR_DEVICE_ATTR(cpld_spi_wp, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, CPLD_SPI_WP); +static SENSOR_DEVICE_ATTR(rj45_console_sel, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, RJ45_CONSOLE_SEL); +static SENSOR_DEVICE_ATTR(system_int, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, SYSTEM_INT); +static SENSOR_DEVICE_ATTR(cpld_mb_rst_done, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, CPLD_MB_RST_DONE); +static SENSOR_DEVICE_ATTR(mb_pwr_ok, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, MB_PWR_OK); +static SENSOR_DEVICE_ATTR(fan_eeprom_wp, S_IRUGO | S_IWUSR, get_swpld_reg, set_swpld_reg, FAN_EEPROM_WP); + +static struct attribute *swpld1_device_attrs[] = { + &sensor_dev_attr_swpld1_reg_value.dev_attr.attr, + &sensor_dev_attr_swpld1_reg_addr.dev_attr.attr, + &sensor_dev_attr_swpld1_major_ver.dev_attr.attr, + &sensor_dev_attr_swpld1_minor_ver.dev_attr.attr, + &sensor_dev_attr_swpld1_scrtch_reg.dev_attr.attr, + &sensor_dev_attr_psu1_pwr_ok.dev_attr.attr, + &sensor_dev_attr_psu1_int.dev_attr.attr, + &sensor_dev_attr_psu2_pwr_ok.dev_attr.attr, + &sensor_dev_attr_psu2_int.dev_attr.attr, + &sensor_dev_attr_psu1_green_led.dev_attr.attr, + &sensor_dev_attr_psu1_red_led.dev_attr.attr, + &sensor_dev_attr_psu2_green_led.dev_attr.attr, + &sensor_dev_attr_psu2_red_led.dev_attr.attr, + &sensor_dev_attr_psu_led_mode.dev_attr.attr, + NULL, +}; + +static struct attribute *swpld2_device_attrs[] = { + &sensor_dev_attr_swpld2_reg_value.dev_attr.attr, + &sensor_dev_attr_swpld2_reg_addr.dev_attr.attr, + &sensor_dev_attr_swpld2_major_ver.dev_attr.attr, + &sensor_dev_attr_swpld2_minor_ver.dev_attr.attr, + &sensor_dev_attr_swpld2_scrtch_reg.dev_attr.attr, + &sensor_dev_attr_fan_led.dev_attr.attr, + &sensor_dev_attr_sys_led.dev_attr.attr, + &sensor_dev_attr_fan_mod1_led.dev_attr.attr, + &sensor_dev_attr_fan_mod2_led.dev_attr.attr, + &sensor_dev_attr_fan_mod3_led.dev_attr.attr, + &sensor_dev_attr_fan_mod4_led.dev_attr.attr, + NULL, +}; + +static struct attribute *swpld3_device_attrs[] = { + &sensor_dev_attr_swpld3_reg_value.dev_attr.attr, + &sensor_dev_attr_swpld3_reg_addr.dev_attr.attr, + &sensor_dev_attr_swpld3_major_ver.dev_attr.attr, + &sensor_dev_attr_swpld3_minor_ver.dev_attr.attr, + &sensor_dev_attr_swpld3_scrtch_reg.dev_attr.attr, + &sensor_dev_attr_sb_ver.dev_attr.attr, + &sensor_dev_attr_platform_type.dev_attr.attr, + NULL, +}; + +static struct attribute *swpld4_device_attrs[] = { + &sensor_dev_attr_sw_board_id1.dev_attr.attr, + &sensor_dev_attr_sw_board_id2.dev_attr.attr, + &sensor_dev_attr_swbd_ver.dev_attr.attr, + &sensor_dev_attr_swpld4_ver.dev_attr.attr, + &sensor_dev_attr_psu_fan_event.dev_attr.attr, + &sensor_dev_attr_cpu_thermal_int.dev_attr.attr, + &sensor_dev_attr_fan_int.dev_attr.attr, + &sensor_dev_attr_cpld_spi_wp.dev_attr.attr, + &sensor_dev_attr_rj45_console_sel.dev_attr.attr, + &sensor_dev_attr_system_int.dev_attr.attr, + &sensor_dev_attr_cpld_mb_rst_done.dev_attr.attr, + &sensor_dev_attr_mb_pwr_ok.dev_attr.attr, + &sensor_dev_attr_fan_eeprom_wp.dev_attr.attr, + NULL, +}; + +static struct attribute_group swpld1_device_attr_grp = { + .attrs = swpld1_device_attrs, +}; + +static struct attribute_group swpld2_device_attr_grp = { + .attrs = swpld2_device_attrs, +}; + +static struct attribute_group swpld3_device_attr_grp = { + .attrs = swpld3_device_attrs, +}; + +static struct attribute_group swpld4_device_attr_grp = { + .attrs = swpld4_device_attrs, +}; + +static int __init swpld1_probe(struct platform_device *pdev) +{ + int ret; + ret = sysfs_create_group(&pdev->dev.kobj, &swpld1_device_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + return -ENODEV; + } + return 0; +} + +static int __init swpld2_probe(struct platform_device *pdev) +{ + int ret; + ret = sysfs_create_group(&pdev->dev.kobj, &swpld2_device_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + return -ENODEV; + } + return 0; +} + +static int __init swpld3_probe(struct platform_device *pdev) +{ + int ret; + ret = sysfs_create_group(&pdev->dev.kobj, &swpld3_device_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + return -ENODEV; + } + return 0; +} + +static int __init swpld4_probe(struct platform_device *pdev) +{ + int ret; + ret = sysfs_create_group(&pdev->dev.kobj, &swpld4_device_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + return -ENODEV; + } + return 0; +} + +static int __exit swpld1_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &swpld1_device_attr_grp); + return 0; +} + +static int __exit swpld2_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &swpld2_device_attr_grp); + return 0; +} + +static int __exit swpld3_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &swpld3_device_attr_grp); + return 0; +} + +static int __exit swpld4_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &swpld4_device_attr_grp); + return 0; +} + +static struct platform_driver swpld1_driver = { + .probe = swpld1_probe, + .remove = __exit_p(swpld1_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9064-swpld1", + }, +}; + +static struct platform_driver swpld2_driver = { + .probe = swpld2_probe, + .remove = __exit_p(swpld2_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9064-swpld2", + }, +}; + +static struct platform_driver swpld3_driver = { + .probe = swpld3_probe, + .remove = __exit_p(swpld3_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9064-swpld3", + }, +}; + +static struct platform_driver swpld4_driver = { + .probe = swpld4_probe, + .remove = __exit_p(swpld4_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-ag9064-swpld4", + }, +}; +/*---------------- CPLD - end ------------- */ + +/*---------------- module initialization ------------- */ +static int __init delta_ag9064_swpld_init(void) +{ + int ret; + printk(KERN_WARNING "ag9064_platform_swpld module initialization\n"); + + // set the SWPLD prob and remove + ret = platform_driver_register(&swpld1_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld driver\n"); + goto error_swpld1_driver; + } + + // register the SWPLD + ret = platform_device_register(&swpld1_device); + if (ret) { + printk(KERN_WARNING "Fail to create swpld device\n"); + goto error_swpld1_device; + } + + // set the SWPLD prob and remove + ret = platform_driver_register(&swpld2_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld driver\n"); + goto error_swpld2_driver; + } + + // register the SWPLD + ret = platform_device_register(&swpld2_device); + if (ret) { + printk(KERN_WARNING "Fail to create swpld device\n"); + goto error_swpld2_device; + } + + // set the SWPLD prob and remove + ret = platform_driver_register(&swpld3_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld driver\n"); + goto error_swpld3_driver; + } + + // register the SWPLD + ret = platform_device_register(&swpld3_device); + if (ret) { + printk(KERN_WARNING "Fail to create swpld device\n"); + goto error_swpld3_device; + } + + // set the SWPLD prob and remove + ret = platform_driver_register(&swpld4_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld driver\n"); + goto error_swpld4_driver; + } + + // register the SWPLD + ret = platform_device_register(&swpld4_device); + if (ret) { + printk(KERN_WARNING "Fail to create swpld device\n"); + goto error_swpld4_device; + } + return 0; + +error_swpld4_device: + platform_driver_unregister(&swpld4_driver); +error_swpld4_driver: + platform_device_unregister(&swpld3_device); +error_swpld3_device: + platform_driver_unregister(&swpld3_driver); +error_swpld3_driver: + platform_device_unregister(&swpld2_device); +error_swpld2_device: + platform_driver_unregister(&swpld2_driver); +error_swpld2_driver: + platform_device_unregister(&swpld1_device); +error_swpld1_device: + platform_driver_unregister(&swpld1_driver); +error_swpld1_driver: + return ret; +} + +static void __exit delta_ag9064_swpld_exit(void) +{ + platform_device_unregister(&swpld1_device); + platform_driver_unregister(&swpld1_driver); + platform_device_unregister(&swpld2_device); + platform_driver_unregister(&swpld2_driver); + platform_device_unregister(&swpld3_device); + platform_driver_unregister(&swpld3_driver); + platform_device_unregister(&swpld4_device); + platform_driver_unregister(&swpld4_driver); +} +module_init(delta_ag9064_swpld_init); +module_exit(delta_ag9064_swpld_exit); + +MODULE_DESCRIPTION("DNI ag9064 CPLD Platform Support"); +MODULE_AUTHOR("Stanley Chi "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/hbm.h b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/hbm.h new file mode 100644 index 00000000000..a2025a5083a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/hbm.h @@ -0,0 +1,62 @@ +/* + * + * Intel Management Engine Interface (Intel MEI) Linux driver + * Copyright (c) 2003-2012, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#ifndef _MEI_HBM_H_ +#define _MEI_HBM_H_ + +struct mei_device; +struct mei_msg_hdr; +struct mei_cl; + +/** + * enum mei_hbm_state - host bus message protocol state + * + * @MEI_HBM_IDLE : protocol not started + * @MEI_HBM_STARTING : start request message was sent + * @MEI_HBM_ENUM_CLIENTS : enumeration request was sent + * @MEI_HBM_CLIENT_PROPERTIES : acquiring clients properties + * @MEI_HBM_STARTED : enumeration was completed + * @MEI_HBM_STOPPED : stopping exchange + */ +enum mei_hbm_state { + MEI_HBM_IDLE = 0, + MEI_HBM_STARTING, + MEI_HBM_ENUM_CLIENTS, + MEI_HBM_CLIENT_PROPERTIES, + MEI_HBM_STARTED, + MEI_HBM_STOPPED, +}; + +const char *mei_hbm_state_str(enum mei_hbm_state state); + +int mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr); + +void mei_hbm_idle(struct mei_device *dev); +void mei_hbm_reset(struct mei_device *dev); +int mei_hbm_start_req(struct mei_device *dev); +int mei_hbm_start_wait(struct mei_device *dev); +int mei_hbm_cl_flow_control_req(struct mei_device *dev, struct mei_cl *cl); +int mei_hbm_cl_disconnect_req(struct mei_device *dev, struct mei_cl *cl); +int mei_hbm_cl_disconnect_rsp(struct mei_device *dev, struct mei_cl *cl); +int mei_hbm_cl_connect_req(struct mei_device *dev, struct mei_cl *cl); +bool mei_hbm_version_is_supported(struct mei_device *dev); +int mei_hbm_pg(struct mei_device *dev, u8 pg_cmd); +void mei_hbm_pg_resume(struct mei_device *dev); +int mei_hbm_cl_notify_req(struct mei_device *dev, + struct mei_cl *cl, u8 request); + +#endif /* _MEI_HBM_H_ */ + diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/hw.h b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/hw.h new file mode 100644 index 00000000000..4cebde85924 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/hw.h @@ -0,0 +1,426 @@ +/* + * + * Intel Management Engine Interface (Intel MEI) Linux driver + * Copyright (c) 2003-2012, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#ifndef _MEI_HW_TYPES_H_ +#define _MEI_HW_TYPES_H_ + +#include + +/* + * Timeouts in Seconds + */ +#define MEI_HW_READY_TIMEOUT 2 /* Timeout on ready message */ +#define MEI_CONNECT_TIMEOUT 3 /* HPS: at least 2 seconds */ + +#define MEI_CL_CONNECT_TIMEOUT 15 /* HPS: Client Connect Timeout */ +#define MEI_CLIENTS_INIT_TIMEOUT 15 /* HPS: Clients Enumeration Timeout */ + +#define MEI_IAMTHIF_STALL_TIMER 12 /* HPS */ +#define MEI_IAMTHIF_READ_TIMER 10 /* HPS */ + +#define MEI_PGI_TIMEOUT 1 /* PG Isolation time response 1 sec */ +#define MEI_D0I3_TIMEOUT 5 /* D0i3 set/unset max response time */ +#define MEI_HBM_TIMEOUT 1 /* 1 second */ + +/* + * MEI Version + */ +#define HBM_MINOR_VERSION 0 +#define HBM_MAJOR_VERSION 2 + +/* + * MEI version with PGI support + */ +#define HBM_MINOR_VERSION_PGI 1 +#define HBM_MAJOR_VERSION_PGI 1 + +/* + * MEI version with Dynamic clients support + */ +#define HBM_MINOR_VERSION_DC 0 +#define HBM_MAJOR_VERSION_DC 2 + +/* + * MEI version with disconnect on connection timeout support + */ +#define HBM_MINOR_VERSION_DOT 0 +#define HBM_MAJOR_VERSION_DOT 2 + +/* + * MEI version with notifcation support + */ +#define HBM_MINOR_VERSION_EV 0 +#define HBM_MAJOR_VERSION_EV 2 + +/* Host bus message command opcode */ +#define MEI_HBM_CMD_OP_MSK 0x7f +/* Host bus message command RESPONSE */ +#define MEI_HBM_CMD_RES_MSK 0x80 + +/* + * MEI Bus Message Command IDs + */ +#define HOST_START_REQ_CMD 0x01 +#define HOST_START_RES_CMD 0x81 + +#define HOST_STOP_REQ_CMD 0x02 +#define HOST_STOP_RES_CMD 0x82 + +#define ME_STOP_REQ_CMD 0x03 + +#define HOST_ENUM_REQ_CMD 0x04 +#define HOST_ENUM_RES_CMD 0x84 + +#define HOST_CLIENT_PROPERTIES_REQ_CMD 0x05 +#define HOST_CLIENT_PROPERTIES_RES_CMD 0x85 + +#define CLIENT_CONNECT_REQ_CMD 0x06 +#define CLIENT_CONNECT_RES_CMD 0x86 + +#define CLIENT_DISCONNECT_REQ_CMD 0x07 +#define CLIENT_DISCONNECT_RES_CMD 0x87 + +#define MEI_FLOW_CONTROL_CMD 0x08 + +#define MEI_PG_ISOLATION_ENTRY_REQ_CMD 0x0a +#define MEI_PG_ISOLATION_ENTRY_RES_CMD 0x8a +#define MEI_PG_ISOLATION_EXIT_REQ_CMD 0x0b +#define MEI_PG_ISOLATION_EXIT_RES_CMD 0x8b + +#define MEI_HBM_ADD_CLIENT_REQ_CMD 0x0f +#define MEI_HBM_ADD_CLIENT_RES_CMD 0x8f + +#define MEI_HBM_NOTIFY_REQ_CMD 0x10 +#define MEI_HBM_NOTIFY_RES_CMD 0x90 +#define MEI_HBM_NOTIFICATION_CMD 0x11 + +/* + * MEI Stop Reason + * used by hbm_host_stop_request.reason + */ +enum mei_stop_reason_types { + DRIVER_STOP_REQUEST = 0x00, + DEVICE_D1_ENTRY = 0x01, + DEVICE_D2_ENTRY = 0x02, + DEVICE_D3_ENTRY = 0x03, + SYSTEM_S1_ENTRY = 0x04, + SYSTEM_S2_ENTRY = 0x05, + SYSTEM_S3_ENTRY = 0x06, + SYSTEM_S4_ENTRY = 0x07, + SYSTEM_S5_ENTRY = 0x08 +}; + + +/** + * enum mei_hbm_status - mei host bus messages return values + * + * @MEI_HBMS_SUCCESS : status success + * @MEI_HBMS_CLIENT_NOT_FOUND : client not found + * @MEI_HBMS_ALREADY_EXISTS : connection already established + * @MEI_HBMS_REJECTED : connection is rejected + * @MEI_HBMS_INVALID_PARAMETER : invalid parameter + * @MEI_HBMS_NOT_ALLOWED : operation not allowed + * @MEI_HBMS_ALREADY_STARTED : system is already started + * @MEI_HBMS_NOT_STARTED : system not started + * + * @MEI_HBMS_MAX : sentinel + */ +enum mei_hbm_status { + MEI_HBMS_SUCCESS = 0, + MEI_HBMS_CLIENT_NOT_FOUND = 1, + MEI_HBMS_ALREADY_EXISTS = 2, + MEI_HBMS_REJECTED = 3, + MEI_HBMS_INVALID_PARAMETER = 4, + MEI_HBMS_NOT_ALLOWED = 5, + MEI_HBMS_ALREADY_STARTED = 6, + MEI_HBMS_NOT_STARTED = 7, + + MEI_HBMS_MAX +}; + + +/* + * Client Connect Status + * used by hbm_client_connect_response.status + */ +enum mei_cl_connect_status { + MEI_CL_CONN_SUCCESS = MEI_HBMS_SUCCESS, + MEI_CL_CONN_NOT_FOUND = MEI_HBMS_CLIENT_NOT_FOUND, + MEI_CL_CONN_ALREADY_STARTED = MEI_HBMS_ALREADY_EXISTS, + MEI_CL_CONN_OUT_OF_RESOURCES = MEI_HBMS_REJECTED, + MEI_CL_CONN_MESSAGE_SMALL = MEI_HBMS_INVALID_PARAMETER, + MEI_CL_CONN_NOT_ALLOWED = MEI_HBMS_NOT_ALLOWED, +}; + +/* + * Client Disconnect Status + */ +enum mei_cl_disconnect_status { + MEI_CL_DISCONN_SUCCESS = MEI_HBMS_SUCCESS +}; + +/* + * MEI BUS Interface Section + */ +struct mei_msg_hdr { + u32 me_addr:8; + u32 host_addr:8; + u32 length:9; + u32 reserved:5; + u32 internal:1; + u32 msg_complete:1; +} __packed; + + +struct mei_bus_message { + u8 hbm_cmd; + u8 data[0]; +} __packed; + +/** + * struct hbm_cl_cmd - client specific host bus command + * CONNECT, DISCONNECT, and FlOW CONTROL + * + * @hbm_cmd: bus message command header + * @me_addr: address of the client in ME + * @host_addr: address of the client in the driver + * @data: generic data + */ +struct mei_hbm_cl_cmd { + u8 hbm_cmd; + u8 me_addr; + u8 host_addr; + u8 data; +}; + +struct hbm_version { + u8 minor_version; + u8 major_version; +} __packed; + +struct hbm_host_version_request { + u8 hbm_cmd; + u8 reserved; + struct hbm_version host_version; +} __packed; + +struct hbm_host_version_response { + u8 hbm_cmd; + u8 host_version_supported; + struct hbm_version me_max_version; +} __packed; + +struct hbm_host_stop_request { + u8 hbm_cmd; + u8 reason; + u8 reserved[2]; +} __packed; + +struct hbm_host_stop_response { + u8 hbm_cmd; + u8 reserved[3]; +} __packed; + +struct hbm_me_stop_request { + u8 hbm_cmd; + u8 reason; + u8 reserved[2]; +} __packed; + +/** + * struct hbm_host_enum_request - enumeration request from host to fw + * + * @hbm_cmd: bus message command header + * @allow_add: allow dynamic clients add HBM version >= 2.0 + * @reserved: reserved + */ +struct hbm_host_enum_request { + u8 hbm_cmd; + u8 allow_add; + u8 reserved[2]; +} __packed; + +struct hbm_host_enum_response { + u8 hbm_cmd; + u8 reserved[3]; + u8 valid_addresses[32]; +} __packed; + +struct mei_client_properties { + uuid_le protocol_name; + u8 protocol_version; + u8 max_number_of_connections; + u8 fixed_address; + u8 single_recv_buf; + u32 max_msg_length; +} __packed; + +struct hbm_props_request { + u8 hbm_cmd; + u8 me_addr; + u8 reserved[2]; +} __packed; + +struct hbm_props_response { + u8 hbm_cmd; + u8 me_addr; + u8 status; + u8 reserved[1]; + struct mei_client_properties client_properties; +} __packed; + +/** + * struct hbm_add_client_request - request to add a client + * might be sent by fw after enumeration has already completed + * + * @hbm_cmd: bus message command header + * @me_addr: address of the client in ME + * @reserved: reserved + * @client_properties: client properties + */ +struct hbm_add_client_request { + u8 hbm_cmd; + u8 me_addr; + u8 reserved[2]; + struct mei_client_properties client_properties; +} __packed; + +/** + * struct hbm_add_client_response - response to add a client + * sent by the host to report client addition status to fw + * + * @hbm_cmd: bus message command header + * @me_addr: address of the client in ME + * @status: if HBMS_SUCCESS then the client can now accept connections. + * @reserved: reserved + */ +struct hbm_add_client_response { + u8 hbm_cmd; + u8 me_addr; + u8 status; + u8 reserved[1]; +} __packed; + +/** + * struct hbm_power_gate - power gate request/response + * + * @hbm_cmd: bus message command header + * @reserved: reserved + */ +struct hbm_power_gate { + u8 hbm_cmd; + u8 reserved[3]; +} __packed; + +/** + * struct hbm_client_connect_request - connect/disconnect request + * + * @hbm_cmd: bus message command header + * @me_addr: address of the client in ME + * @host_addr: address of the client in the driver + * @reserved: reserved + */ +struct hbm_client_connect_request { + u8 hbm_cmd; + u8 me_addr; + u8 host_addr; + u8 reserved; +} __packed; + +/** + * struct hbm_client_connect_response - connect/disconnect response + * + * @hbm_cmd: bus message command header + * @me_addr: address of the client in ME + * @host_addr: address of the client in the driver + * @status: status of the request + */ +struct hbm_client_connect_response { + u8 hbm_cmd; + u8 me_addr; + u8 host_addr; + u8 status; +} __packed; + + +#define MEI_FC_MESSAGE_RESERVED_LENGTH 5 + +struct hbm_flow_control { + u8 hbm_cmd; + u8 me_addr; + u8 host_addr; + u8 reserved[MEI_FC_MESSAGE_RESERVED_LENGTH]; +} __packed; + +#define MEI_HBM_NOTIFICATION_START 1 +#define MEI_HBM_NOTIFICATION_STOP 0 +/** + * struct hbm_notification_request - start/stop notification request + * + * @hbm_cmd: bus message command header + * @me_addr: address of the client in ME + * @host_addr: address of the client in the driver + * @start: start = 1 or stop = 0 asynchronous notifications + */ +struct hbm_notification_request { + u8 hbm_cmd; + u8 me_addr; + u8 host_addr; + u8 start; +} __packed; + +/** + * struct hbm_notification_response - start/stop notification response + * + * @hbm_cmd: bus message command header + * @me_addr: address of the client in ME + * @host_addr: - address of the client in the driver + * @status: (mei_hbm_status) response status for the request + * - MEI_HBMS_SUCCESS: successful stop/start + * - MEI_HBMS_CLIENT_NOT_FOUND: if the connection could not be found. + * - MEI_HBMS_ALREADY_STARTED: for start requests for a previously + * started notification. + * - MEI_HBMS_NOT_STARTED: for stop request for a connected client for whom + * asynchronous notifications are currently disabled. + * + * @start: start = 1 or stop = 0 asynchronous notifications + * @reserved: reserved + */ +struct hbm_notification_response { + u8 hbm_cmd; + u8 me_addr; + u8 host_addr; + u8 status; + u8 start; + u8 reserved[3]; +} __packed; + +/** + * struct hbm_notification - notification event + * + * @hbm_cmd: bus message command header + * @me_addr: address of the client in ME + * @host_addr: address of the client in the driver + * @reserved: reserved for alignment + */ +struct hbm_notification { + u8 hbm_cmd; + u8 me_addr; + u8 host_addr; + u8 reserved[1]; +} __packed; + +#endif diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_io.c b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_io.c new file mode 100644 index 00000000000..97c93c6122b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_io.c @@ -0,0 +1,636 @@ + +#include "i2c-mei_rw.h" + + +/* ========== IoLibGcc.c ========= */ + +/** + Reads an 8-bit I/O port. + + Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned. + This function must guarantee that all I/O read and write operations are + serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + + @return The value read. + +**/ +//__inline__ +UINT8 +IoRead8 ( + IN UINTN Port + ) +{ + UINT8 Data; + + __asm__ __volatile__ ("inb %w1,%b0" : "=a" (Data) : "d" ((UINT16)Port)); + return Data; +} + +/** + Writes an 8-bit I/O port. + + Writes the 8-bit I/O port specified by Port with the value specified by Value + and returns Value. This function must guarantee that all I/O read and write + operations are serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Value The value to write to the I/O port. + + @return The value written the I/O port. + +**/ +//__inline__ +UINT8 +IoWrite8 ( + IN UINTN Port, + IN UINT8 Value + ) +{ + __asm__ __volatile__ ("outb %b0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + return Value;; +} + +/** + Reads a 16-bit I/O port. + + Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned. + This function must guarantee that all I/O read and write operations are + serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + If Port is not aligned on a 16-bit boundary, then ASSERT(). + + @param Port The I/O port to read. + + @return The value read. + +**/ +//__inline__ +UINT16 +IoRead16 ( + IN UINTN Port + ) +{ + UINT16 Data; + + if((Port & 1) != 0) + printk("Failed\n"); + __asm__ __volatile__ ("inw %w1,%w0" : "=a" (Data) : "d" ((UINT16)Port)); + return Data; +} + +/** + Writes a 16-bit I/O port. + + Writes the 16-bit I/O port specified by Port with the value specified by Value + and returns Value. This function must guarantee that all I/O read and write + operations are serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + If Port is not aligned on a 16-bit boundary, then ASSERT(). + + @param Port The I/O port to write. + @param Value The value to write to the I/O port. + + @return The value written the I/O port. + +**/ +//__inline__ +UINT16 +IoWrite16 ( + IN UINTN Port, + IN UINT16 Value + ) +{ + if((Port & 1) != 0) + printk("Failed\n"); + __asm__ __volatile__ ("outw %w0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + return Value;; +} + +/** + Reads a 32-bit I/O port. + + Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned. + This function must guarantee that all I/O read and write operations are + serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + If Port is not aligned on a 32-bit boundary, then ASSERT(). + + @param Port The I/O port to read. + + @return The value read. + +**/ +//__inline__ +UINT32 +IoRead32 ( + IN UINTN Port + ) +{ + UINT32 Data; + + if((Port & 3) != 0) + printk("Failed\n"); + __asm__ __volatile__ ("inl %w1,%0" : "=a" (Data) : "d" ((UINT16)Port)); + return Data; +} + +/** + Writes a 32-bit I/O port. + + Writes the 32-bit I/O port specified by Port with the value specified by Value + and returns Value. This function must guarantee that all I/O read and write + operations are serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + If Port is not aligned on a 32-bit boundary, then ASSERT(). + + @param Port The I/O port to write. + @param Value The value to write to the I/O port. + + @return The value written the I/O port. + +**/ +//__inline__ +UINT32 +IoWrite32 ( + IN UINTN Port, + IN UINT32 Value + ) +{ + if((Port & 3) != 0) + printk("Failed\n"); + __asm__ __volatile__ ("outl %0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + return Value; +} + + + +/* ========== GccInline.c ========= */ + +/** + Enables CPU interrupts. + + Enables CPU interrupts. + +**/ +VOID +EnableInterrupts ( + VOID + ) +{ + __asm__ __volatile__ ("sti"::: "memory"); +} + +/** + Disables CPU interrupts. + + Disables CPU interrupts. + +**/ +VOID +DisableInterrupts ( + VOID + ) +{ + __asm__ __volatile__ ("cli"::: "memory"); +} + +/** + Reads the current value of the EFLAGS register. + + Reads and returns the current value of the EFLAGS register. This function is + only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a + 64-bit value on X64. + + @return EFLAGS on IA-32 or RFLAGS on X64. + +**/ +UINTN +AsmReadEflags ( + VOID + ) +{ + UINTN Eflags; + + __asm__ __volatile__ ( + "pushfq \n\t" + "pop %0 " + : "=r" (Eflags) // %0 + ); + + return Eflags; +} + + + +/* ========== X86GetInterruptState.c ========= */ + +/** + Retrieves the current CPU interrupt state. + + Returns TRUE is interrupts are currently enabled. Otherwise + returns FALSE. + + @retval TRUE CPU interrupts are enabled. + @retval FALSE CPU interrupts are disabled. + +**/ +BOOLEAN +GetInterruptState ( + VOID + ) +{ + IA32_EFLAGS32 EFlags; + + EFlags.UintN = AsmReadEflags (); + return (BOOLEAN)(1 == EFlags.Bits.IF); +} + + + +/* ========== Cpu.c ========= */ + +/** + Disables CPU interrupts and returns the interrupt state prior to the disable + operation. + + @retval TRUE CPU interrupts were enabled on entry to this call. + @retval FALSE CPU interrupts were disabled on entry to this call. + +**/ +BOOLEAN +SaveAndDisableInterrupts ( + VOID + ) +{ + BOOLEAN InterruptState; + + InterruptState = GetInterruptState (); + DisableInterrupts (); + return InterruptState; +} + +/** + Set the current CPU interrupt state. + + Sets the current CPU interrupt state to the state specified by + InterruptState. If InterruptState is TRUE, then interrupts are enabled. If + InterruptState is FALSE, then interrupts are disabled. InterruptState is + returned. + + @param InterruptState TRUE if interrupts should be enabled. FALSE if + interrupts should be disabled. + + @return InterruptState + +**/ +BOOLEAN +SetInterruptState ( + IN BOOLEAN InterruptState + ) +{ + if (InterruptState) { + EnableInterrupts (); + } else { + DisableInterrupts (); + } + return InterruptState; +} + + + +/* ========== pciLib.c ========= */ + +// +// Declare I/O Ports used to perform PCI Confguration Cycles +// +#define PCI_CONFIGURATION_ADDRESS_PORT 0xCF8 +#define PCI_CONFIGURATION_DATA_PORT 0xCFC + +/** + Convert a PCI Library address to PCI CF8 formatted address. + + Declare macro to convert PCI Library address to PCI CF8 formatted address. + Bit fields of PCI Library and CF8 formatted address is as follows: + PCI Library formatted address CF8 Formatted Address + ============================= ====================== + Bits 00..11 Register Bits 00..07 Register + Bits 12..14 Function Bits 08..10 Function + Bits 15..19 Device Bits 11..15 Device + Bits 20..27 Bus Bits 16..23 Bus + Bits 28..31 Reserved(MBZ) Bits 24..30 Reserved(MBZ) + Bits 31..31 Must be 1 + + @param A The address to convert. + + @retval The coverted address. + +**/ +#define PCI_TO_CF8_ADDRESS(A) \ + ((UINT32) ((((A) >> 4) & 0x00ffff00) | ((A) & 0xfc) | 0x80000000)) + +/** + Reads an 8-bit PCI configuration register. + + Reads and returns the 8-bit PCI configuration register specified by Address. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address The address that encodes the PCI Bus, Device, Function and + Register. + + @return The read value from the PCI configuration register. + +**/ +UINT8 +PciCf8Read8 ( + IN UINTN Address + ) +{ + BOOLEAN InterruptState; + UINT32 AddressPort; + UINT8 Result; + + InterruptState = SaveAndDisableInterrupts (); + AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT); + IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address)); + Result = IoRead8 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3)); + IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort); + SetInterruptState (InterruptState); + return Result; +} + +/** + Writes an 8-bit PCI configuration register. + + Writes the 8-bit PCI configuration register specified by Address with the + value specified by Value. Value is returned. This function must guarantee + that all PCI read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address The address that encodes the PCI Bus, Device, Function and + Register. + @param Value The value to write. + + @return The value written to the PCI configuration register. + +**/ +UINT8 +PciCf8Write8 ( + IN UINTN Address, + IN UINT8 Value + ) +{ + BOOLEAN InterruptState; + UINT32 AddressPort; + UINT8 Result; + + InterruptState = SaveAndDisableInterrupts (); + AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT); + IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address)); + Result = IoWrite8 ( + PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3), + Value + ); + IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort); + SetInterruptState (InterruptState); + return Result; +} + +/** + Reads a 16-bit PCI configuration register. + + Reads and returns the 16-bit PCI configuration register specified by Address. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address The address that encodes the PCI Bus, Device, Function and + Register. + + @return The read value from the PCI configuration register. + +**/ +UINT16 +PciCf8Read16 ( + IN UINTN Address + ) +{ + BOOLEAN InterruptState; + UINT32 AddressPort; + UINT16 Result; + + InterruptState = SaveAndDisableInterrupts (); + AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT); + IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address)); + Result = IoRead16 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2)); + IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort); + SetInterruptState (InterruptState); + return Result; +} + +/** + Writes a 16-bit PCI configuration register. + + Writes the 16-bit PCI configuration register specified by Address with the + value specified by Value. Value is returned. This function must guarantee + that all PCI read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address The address that encodes the PCI Bus, Device, Function and + Register. + @param Value The value to write. + + @return The value written to the PCI configuration register. + +**/ +UINT16 +PciCf8Write16 ( + IN UINTN Address, + IN UINT16 Value + ) +{ + BOOLEAN InterruptState; + UINT32 AddressPort; + UINT16 Result; + + InterruptState = SaveAndDisableInterrupts (); + AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT); + IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address)); + Result = IoWrite16 ( + PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2), + Value + ); + IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort); + SetInterruptState (InterruptState); + return Result; +} + +/** + Reads a 32-bit PCI configuration register. + + Reads and returns the 32-bit PCI configuration register specified by Address. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address The address that encodes the PCI Bus, Device, Function and + Register. + + @return The read value from the PCI configuration register. + +**/ +UINT32 +PciCf8Read32 ( + IN UINTN Address + ) +{ + BOOLEAN InterruptState; + UINT32 AddressPort; + UINT32 Result; + + InterruptState = SaveAndDisableInterrupts (); + AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT); + IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address)); + Result = IoRead32 (PCI_CONFIGURATION_DATA_PORT); + IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort); + SetInterruptState (InterruptState); + return Result; +} + +/** + Writes a 32-bit PCI configuration register. + + Writes the 32-bit PCI configuration register specified by Address with the + value specified by Value. Value is returned. This function must guarantee + that all PCI read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address The address that encodes the PCI Bus, Device, Function and + Register. + @param Value The value to write. + + @return The value written to the PCI configuration register. + +**/ +UINT32 +PciCf8Write32 ( + IN UINTN Address, + IN UINT32 Value + ) +{ + BOOLEAN InterruptState; + UINT32 AddressPort; + UINT32 Result; + + InterruptState = SaveAndDisableInterrupts (); + AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT); + IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address)); + Result = IoWrite32 ( + PCI_CONFIGURATION_DATA_PORT, + Value + ); + IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort); + SetInterruptState (InterruptState); + return Result; +} + + + +/* ========== Other ========= */ + +// UINT8 PciRead8(UINT64 addr) +// { +// printf("[%s] addr: %8X.\n", __func__, addr); +// return 0x01; +// } + +// UINT8 PciWrite8(UINT64 addr, UINT8 data) +// { +// printf("[%s] addr: %8X data: %2X.\n", __func__, addr, data); +// return 0x02; +// } + + +// UINT16 PciRead16(UINT64 addr) +// { +// printf("[%s] addr: %8X.\n", __func__, addr); +// return 0x03; +// } + +// UINT16 PciWrite16(UINT64 addr, UINT8 data) +// { +// printf("[%s] addr: %8X data: %2X.\n", __func__, addr, data); +// return 0x04; +// } + + +// UINT32 PciRead32(UINT64 addr) +// { +// printf("[%s] addr: %8X.\n", __func__, addr); +// return 0x05; +// } + +// UINT32 PciWrite32(UINT64 addr, UINT8 data) +// { +// printf("[%s] addr: %8X data: %2X.\n", __func__, addr, data); +// return 0x06; +// } + +UINT8 PciRead8(UINT64 addr) +{ + return PciCf8Read8 (addr); +} + +UINT8 PciWrite8(UINT64 addr, UINT8 data) +{ + return PciCf8Write8 (addr, data); +} + + +UINT16 PciRead16(UINT64 addr) +{ + return PciCf8Read16 (addr); +} + +UINT16 PciWrite16(UINT64 addr, UINT8 data) +{ + return PciCf8Write16 (addr, data); +} + + +UINT32 PciRead32(UINT64 addr) +{ + return PciCf8Read32 (addr); +} + +UINT32 PciWrite32(UINT64 addr, UINT8 data) +{ + return PciCf8Write32 (addr, data); +} diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_io.h b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_io.h new file mode 100644 index 00000000000..5180cc47e73 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_io.h @@ -0,0 +1,46 @@ + +#include "i2c-mei_type.h" + + + +/* ========== PciLib.h ========= */ + +/** + Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an + address that can be passed to the PCI Library functions. + + @param Bus PCI Bus number. Range 0..255. + @param Device PCI Device number. Range 0..31. + @param Function PCI Function number. Range 0..7. + @param Register PCI Register number. Range 0..255 for PCI. Range 0..4095 + for PCI Express. + + @return The encoded PCI address. + +**/ +#define PCI_LIB_ADDRESS(Bus,Device,Function,Register) \ + (((Register) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20)) + + + +/* ========== Qubbing ========= */ + +UINT8 PciRead8(UINT64 addr); + +UINT8 PciWrite8(UINT64 addr, UINT8 data); + +UINT16 PciRead16(UINT64 addr); + +UINT16 PciWrite16(UINT64 addr, UINT8 data); + +UINT32 PciRead32(UINT64 addr); + +UINT32 PciWrite32(UINT64 addr, UINT8 data); + + +void I2C_Set(UINT8 smbus, UINT8 daddr, INT32 reg, UINT8 *data, UINT8 dlen); + +void I2C_Read(UINT8 smbus, UINT8 daddr, INT32 reg, UINT8 dlen); + +void VersionRead(void); +void I2C_Probe(void); \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_main.c b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_main.c new file mode 100644 index 00000000000..a5dbbd22b4a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_main.c @@ -0,0 +1,579 @@ +/* + * MEI-I2C driver + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mei_dev.h" +#include "client.h" +#include "i2c-mei_rw.h" + +#if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \ + defined CONFIG_DMI +#include +#include +#endif + +/* PCI Address Constants */ +#define SMBBAR 0 +#define SMBPCICTL 0x004 +#define SMBPCISTS 0x006 +#define SMBHSTCFG 0x040 +#define TCOBASE 0x050 +#define TCOCTL 0x054 + +/* Other settings */ +#define MAX_RETRIES 400 + +/* I801 command constants */ +#define I801_QUICK 0x00 +#define I801_BYTE 0x04 +#define I801_BYTE_DATA 0x08 +#define I801_WORD_DATA 0x0C +#define I801_PROC_CALL 0x10 /* unimplemented */ +#define I801_BLOCK_DATA 0x14 +#define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */ + +#define HECI_PEC_FLAG 0x80 + +#define PCI_DEVICE_ID_INTEL_LPT_H 0x8C3A /* Lynx Point H */ + +struct mei_i2c_mux_config { + char *gpio_chip; + unsigned values[3]; + int n_values; + unsigned classes[3]; + unsigned gpios[2]; /* Relative to gpio_chip->base */ + int n_gpios; +}; + +#define FEATURE_SMBUS_PEC (1 << 0) +#define FEATURE_BLOCK_BUFFER (1 << 1) +#define FEATURE_BLOCK_PROC (1 << 2) +#define FEATURE_I2C_BLOCK_READ (1 << 3) +#define FEATURE_IRQ (1 << 4) +/* Not really a feature, but it's convenient to handle it as such */ +#define FEATURE_IDF (1 << 15) +#define FEATURE_TCO (1 << 16) + +static const char *mei_i2c_feature_names[] = { + "SMBus PEC", + "Block buffer", + "Block process call", + "I2C block read", + "Interrupt", +}; + +static unsigned int disable_features; +module_param(disable_features, uint, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(disable_features, "Disable selected driver features:\n" + "\t\t 0x01 disable SMBus PEC\n" + "\t\t 0x02 disable the block buffer\n" + "\t\t 0x08 disable the I2C block read functionality\n" + "\t\t 0x10 don't use interrupts "); + + +/*MEI SMB Sensor Bus (when MEI_FLAG_SMB_DEV_ADD_FMAT_EXT)*/ +#define MEI_SMB_BUS_SMBUS 0x0 +#define MEI_SMB_BUS_SMLINK0 0x1 +#define MEI_SMB_BUS_SMLINK1 0x2 +#define MEI_SMB_BUS_SMLINK2 0x3 +#define MEI_SMB_BUS_SMLINK3 0x4 +#define MEI_SMB_BUS_SMLINK4 0x5 + +struct mei_smb_priv{ + struct i2c_adapter adapter; + unsigned long smba; + unsigned char original_hstcfg; + struct pci_dev *pci_dev; + unsigned int features; + unsigned char sensorbus; + /* isr processing */ + wait_queue_head_t waitq; + u8 status; + /* Command state used by isr for byte-by-byte block transactions */ + u8 cmd; + bool is_read; + int count; + int len; + u8 *data; +}; + + +struct mei_i2c_data_ext{ + char Cmd; + char Flag; + char Sensor_Bus; + char Psu_Addr; + char Mux_Addr; + char Mux_Channel; + char Mux_Conf; + char Reserved; + char W_Length; + char R_Length; + char PMbus_data[21]; +}; + +struct mei_msg{ + struct mei_msg_hdr hdr; + struct mei_i2c_data_ext data; +}; + +#define DEBUG_MSG 0 +static int mei_TxRx(u8 sensor_bus, u16 addr, u8 command, char read_write, int size, union i2c_smbus_data * data, int pec) +{ + struct mei_msg_hdr mei_hdr; + int rets; + unsigned char * recv_buf; + int retry = 0; + int len = 0; + int i = 0; + + struct mei_msg * msg; +// unsigned char blen; + + UINT32 timeout, dwTimeout; + UINT32 blen; + HECI_DEVICE sHeciDev; + + recv_buf = kmalloc(sizeof(unsigned char) * (32), GFP_KERNEL); + msg = kmalloc(sizeof(struct mei_msg), GFP_KERNEL); + + dwTimeout = 2000000 / HECI_TIMEOUT_UNIT; + + sHeciDev.Bus = HECI_BUS; + sHeciDev.Dev = HECI_DEV; + sHeciDev.Fun = HECI_FUN; + sHeciDev.Hidm = HECI_HIDM_MSI; + sHeciDev.Mbar = HECI_MBAR_DEFAULT; + HeciInit(&sHeciDev, &dwTimeout); + + msg->data.Cmd = 0x0A; + if(read_write){ + if(size == I2C_SMBUS_WORD_DATA){ + msg->data.Flag = 0x56; + msg->data.W_Length = 1; + msg->data.R_Length = 2; + } + else if(size == I2C_SMBUS_BYTE_DATA || size == I2C_SMBUS_QUICK){ + msg->data.Flag = 0x52; + msg->data.W_Length = 1; + msg->data.R_Length = 1; + }else if(size == I2C_SMBUS_BYTE){ + msg->data.Flag = 0x50; + msg->data.W_Length = 0; + msg->data.R_Length = 1; + }else if(size == I2C_SMBUS_BLOCK_DATA){ + msg->data.Flag = 0x5A; + msg->data.W_Length = 1; + } + + } + else{ + if(size == I2C_SMBUS_WORD_DATA){ + msg->data.Flag = 0x58; + msg->data.W_Length = 3; + } + else if(size == I2C_SMBUS_BYTE_DATA){ + msg->data.Flag = 0x54; + msg->data.W_Length = 2; + } + else if((size == I2C_SMBUS_BYTE) || (size == I2C_SMBUS_QUICK)){ + msg->data.Flag = 0x50; + msg->data.W_Length = 1; + }else if(size == I2C_SMBUS_BLOCK_DATA){ + msg->data.Flag = 0x5C; + msg->data.W_Length = data->block[0]; + } + + msg->data.R_Length = 0x0; + if(data !=NULL){ + if(size == I2C_SMBUS_WORD_DATA){ + msg->data.PMbus_data[1] = data->word & 0xff; + msg->data.PMbus_data[2] = (data->word & 0xff00) >> 8; + }else if(size == I2C_SMBUS_BYTE_DATA){ + msg->data.PMbus_data[1] = data->byte; + }else if(size == I2C_SMBUS_BLOCK_DATA){ + for (i = 0; i < msg->data.W_Length; i++) + msg->data.PMbus_data[i+1] = data->block[i+1]; + } + + }else{ + msg->data.PMbus_data[1] = 0; + } + } + + if (pec == 1) + msg->data.Flag |= HECI_PEC_FLAG; + + msg->data.Sensor_Bus = sensor_bus; + msg->data.Psu_Addr =(char) addr << 1; + msg->data.Mux_Addr = 0x0; + msg->data.Mux_Channel = 0x0; + msg->data.Mux_Conf = 0x0; + msg->data.Reserved = 0x0; + msg->data.PMbus_data[0] = command; + + + msg->hdr.host_addr = 0;//mei_cl_host_addr(cl); + msg->hdr.me_addr = 0x20; + msg->hdr.reserved = 0; + msg->hdr.msg_complete = 0; + msg->hdr.internal = 0; //cb->internal; + msg->hdr.length = 10 + msg->data.W_Length; + msg->hdr.msg_complete = 1; + +#if (DEBUG_MSG) + printk("Cmd : 0x%02x , Flag : 0x%02x , Sensor_Bus : 0x%02x , Psu_Addr : 0x%02x\n" , msg->data.Cmd, msg->data.Flag, msg->data.Sensor_Bus, msg->data.Psu_Addr); + printk("Mux_Addr : 0x%02x , Mux_Channel : 0x%02x , Mux_Conf : 0x%02x , W_Length : 0x%02x\n" , msg->data.Mux_Addr, msg->data.Mux_Channel, msg->data.Mux_Conf, msg->data.W_Length); + printk("R_Length : 0x%02x , PMbus_data[0] : 0x%02x , size : 0x%x\n" , msg->data.R_Length, msg->data.PMbus_data[0], size); + if(!read_write){ + if(size == I2C_SMBUS_BLOCK_DATA){ + for (i = 0; i < msg->data.W_Length; i++){ + printk("PMbus_data[%d] : 0x%02x , ", i, msg->data.PMbus_data[i]); + } + printk("\n"); + }else{ + printk("PMbus_data[1] : 0x%02x , PMbus_data[2] : 0x%02x\n", msg->data.PMbus_data[1], msg->data.PMbus_data[2]); + } + } +#endif + retry = 3; + while(retry){ + timeout = HECI_SEND_TIMEOUT / HECI_TIMEOUT_UNIT; + rets = HeciMsgSend(&sHeciDev, &timeout, (HECI_MSG_HEADER *)msg); + if (rets != 0){ + printk("HeciMsgSend ret: %d\n",rets); + retry --; + continue; + }else{ + break; + } + } + if(read_write) + { + if(size == I2C_SMBUS_WORD_DATA){ + blen = 8; + HeciMsgRecv(&sHeciDev, &timeout, (HECI_MSG_HEADER *)recv_buf, &blen); + } + else if(size == I2C_SMBUS_BYTE_DATA || size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE){ + blen = 7; + HeciMsgRecv(&sHeciDev, &timeout, (HECI_MSG_HEADER *)recv_buf, &blen); + } +#if (DEBUG_MSG) + if(size == I2C_SMBUS_BLOCK_DATA){ + printk("recv_len %d hdr: 0x%02x%02x%02x%02x\n", blen, recv_buf[3], recv_buf[2], recv_buf[1], recv_buf[0]); + for (i = 0; i < blen ; i++){ + printk("0x%02x , ", recv_buf[4 + i]); + } + printk("\n"); + }else{ + printk("recv_len %d recv: 0x%02x%02x%02x%02x\n0x%02x , 0x%02x , 0x%02x, 0x%02x \n", blen, recv_buf[3], recv_buf[2], recv_buf[1], recv_buf[0], recv_buf[4], recv_buf[5], recv_buf[6], recv_buf[7]); + } +#endif + if(data !=NULL){ + if(size == I2C_SMBUS_WORD_DATA){ + data->word = ((recv_buf[7] << 8) & 0xff00) | (recv_buf[6] & 0xff); + } + else if(size == I2C_SMBUS_BYTE_DATA){ + data->byte = recv_buf[6] & 0xff; + } + else if(size == I2C_SMBUS_BLOCK_DATA){ + for (i = 0; i < blen; i++){ + data->block[i] = recv_buf[6+i] & 0xff; + } + } + } + } + else + { + blen = 6; + HeciMsgRecv(&sHeciDev, &timeout, (HECI_MSG_HEADER *)recv_buf, &blen); +#if (DEBUG_MSG) + printk("recv: 0x%02x%02x%02x%02x , 0x%02x , 0x%02x \n", recv_buf[3], recv_buf[2], recv_buf[1], recv_buf[0], recv_buf[4], recv_buf[5]); +#endif + } + + rets = recv_buf[5]; + + kfree(recv_buf); + kfree(msg); + if(rets) + return -1; + else + return 0; +} + +/* Return negative errno on error. */ +static s32 mei_i2c_access(struct i2c_adapter *adap, u16 addr, + unsigned short flags, char read_write, u8 command, + int size, union i2c_smbus_data *data) +{ + int hwpec; + int block = 0; + int ret = 0, xact = 0; + int pec = 0; + char byte = 0; + struct mei_smb_priv *priv = i2c_get_adapdata(adap); + + if (flags & I2C_CLIENT_PEC) + pec = 1; + + switch (size) { + case I2C_SMBUS_QUICK: + + command = 0; + read_write = 1; + ret = mei_TxRx(priv->sensorbus, addr, command, read_write, size, NULL, pec); + xact = I801_QUICK; + break; + case I2C_SMBUS_BYTE: + if (read_write == I2C_SMBUS_READ) + command = 0; + ret = mei_TxRx(priv->sensorbus, addr, command, read_write, size, data, pec); + xact = I801_BYTE; + break; + case I2C_SMBUS_BYTE_DATA: + ret = mei_TxRx(priv->sensorbus, addr, command, read_write, size, data, pec); + xact = I801_BYTE_DATA; + break; + case I2C_SMBUS_WORD_DATA: + ret = mei_TxRx(priv->sensorbus, addr, command, read_write, size, data, pec); + xact = I801_WORD_DATA; + break; + case I2C_SMBUS_BLOCK_DATA: + ret = mei_TxRx(priv->sensorbus, addr, command, read_write, size, data, pec); + break; + case I2C_SMBUS_I2C_BLOCK_DATA: + printk("I2C_SMBUS_I2C_BLOCK_DATA unsupported!!%d\n",size); + break; + default: + dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n", + size); + return -EOPNOTSUPP; + } + + if (ret) + return ret; + return 0; +} + +static u32 mei_i2c_func(struct i2c_adapter *adapter) +{ + struct mei_smb_priv *priv = i2c_get_adapdata(adapter); + + return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_BLOCK_DATA ; +} + +static const struct i2c_algorithm smbus_algorithm = { + .smbus_xfer = mei_i2c_access, + .functionality = mei_i2c_func, +}; + +static const struct pci_device_id mei_i2c_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LPT_H) }, + { 0, } +}; + +MODULE_DEVICE_TABLE(pci, mei_i2c_ids); + +/* richard + priv_table */ +struct mei_smb_priv_table { + struct mei_smb_priv *priv_tbl[MEI_SMB_BUS_SMLINK4]; + int count; +}; + +static int mei_i2c_probe(struct pci_dev *pdev, const struct pci_device_id *id) +{ + unsigned char temp; + int err, i; + struct mei_smb_priv *priv_sml_0, *priv_sml_1, *priv_sml_2, *priv_sml_3, *priv_sml_4, *priv_smb; + +//richard + priv_table + struct mei_smb_priv_table *priv_table; + + priv_table = kzalloc(sizeof(*priv_table), GFP_KERNEL); + if(!priv_table) + return -ENOMEM; + + priv_sml_0= kzalloc(sizeof(struct mei_smb_priv), GFP_KERNEL); + if (!priv_sml_0) + return -ENOMEM; + i2c_set_adapdata(&priv_sml_0->adapter, priv_sml_0); + priv_sml_0->adapter.owner = THIS_MODULE; + priv_sml_0->adapter.algo = &smbus_algorithm; + priv_sml_0->adapter.dev.parent = &pdev->dev; + priv_sml_0->adapter.retries = 3; + priv_sml_0->sensorbus = MEI_SMB_BUS_SMLINK0; + priv_sml_0->pci_dev = pdev; + + priv_sml_1 = kzalloc(sizeof(*priv_sml_1), GFP_KERNEL); + if (!priv_sml_1) + return -ENOMEM; + i2c_set_adapdata(&priv_sml_1->adapter, priv_sml_1); + priv_sml_1->adapter.owner = THIS_MODULE; + priv_sml_1->adapter.algo = &smbus_algorithm; + priv_sml_1->adapter.dev.parent = &pdev->dev; + priv_sml_1->adapter.retries = 3; + priv_sml_1->sensorbus = MEI_SMB_BUS_SMLINK1; + priv_sml_1->pci_dev = pdev; + + priv_sml_2 = kzalloc(sizeof(*priv_sml_2), GFP_KERNEL); + if (!priv_sml_2) + return -ENOMEM; + i2c_set_adapdata(&priv_sml_2->adapter, priv_sml_2); + priv_sml_2->adapter.owner = THIS_MODULE; + priv_sml_2->adapter.algo = &smbus_algorithm; + priv_sml_2->adapter.dev.parent = &pdev->dev; + priv_sml_2->adapter.retries = 3; + priv_sml_2->sensorbus = MEI_SMB_BUS_SMLINK2; + priv_sml_2->pci_dev = pdev; + + priv_sml_3 = kzalloc(sizeof(*priv_sml_3), GFP_KERNEL); + if (!priv_sml_3) + return -ENOMEM; + i2c_set_adapdata(&priv_sml_3->adapter, priv_sml_3); + priv_sml_3->adapter.owner = THIS_MODULE; + priv_sml_3->adapter.algo = &smbus_algorithm; + priv_sml_3->adapter.dev.parent = &pdev->dev; + priv_sml_3->adapter.retries = 3; + priv_sml_3->sensorbus = MEI_SMB_BUS_SMLINK3; + priv_sml_3->pci_dev = pdev; + + priv_sml_4 = kzalloc(sizeof(*priv_sml_4), GFP_KERNEL); + if (!priv_sml_4) + return -ENOMEM; + i2c_set_adapdata(&priv_sml_4->adapter, priv_sml_4); + priv_sml_4->adapter.owner = THIS_MODULE; + priv_sml_4->adapter.algo = &smbus_algorithm; + priv_sml_4->adapter.dev.parent = &pdev->dev; + priv_sml_4->adapter.retries = 3; + priv_sml_4->sensorbus = MEI_SMB_BUS_SMLINK4; + priv_sml_4->pci_dev = pdev; + + printk("mei_i2c_probe 0x%x 0x%x\n", pdev->device, pdev->dev.id); + + snprintf(priv_sml_0->adapter.name, sizeof(priv_sml_0->adapter.name), + "ME-SMLINK0"); + err = i2c_add_adapter(&priv_sml_0->adapter); + printk("i2c nr : %d \n", priv_sml_0->adapter.nr); + if (err) { + dev_err(&pdev->dev, "Failed to add SMBus adapter ME-SMLINK0\n"); + return err; + } + + snprintf(priv_sml_1->adapter.name, sizeof(priv_sml_1->adapter.name), + "ME-SMLINK1"); + err = i2c_add_adapter(&priv_sml_1->adapter); + if (err) { + dev_err(&pdev->dev, "Failed to add SMBus adapter ME-SMLINK1\n"); + return err; + } + + snprintf(priv_sml_2->adapter.name, sizeof(priv_sml_2->adapter.name), + "ME-SMLINK2"); + err = i2c_add_adapter(&priv_sml_2->adapter); + if (err) { + dev_err(&pdev->dev, "Failed to add SMBus adapter ME-SMLINK2\n"); + return err; + } + + snprintf(priv_sml_3->adapter.name, sizeof(priv_sml_3->adapter.name), + "ME-SMLINK3"); + err = i2c_add_adapter(&priv_sml_3->adapter); + if (err) { + dev_err(&pdev->dev, "Failed to add SMBus adapter ME-SMLINK3\n"); + return err; + } + + snprintf(priv_sml_4->adapter.name, sizeof(priv_sml_4->adapter.name), + "ME-SMLINK4"); + err = i2c_add_adapter(&priv_sml_4->adapter); + if (err) { + dev_err(&pdev->dev, "Failed to add SMBus adapter ME-SMLINK4\n"); + return err; + } + + priv_table->count = 0; + priv_table->priv_tbl[priv_table->count++] = priv_sml_0; + priv_table->priv_tbl[priv_table->count++] = priv_sml_1; + priv_table->priv_tbl[priv_table->count++] = priv_sml_2; + priv_table->priv_tbl[priv_table->count++] = priv_sml_3; + priv_table->priv_tbl[priv_table->count++] = priv_sml_4; + + pci_set_drvdata(pdev, priv_table); + + return 0; +} + +static void mei_i2c_remove(struct pci_dev *dev) +{ + struct mei_smb_priv *priv = pci_get_drvdata(dev); + // richard + priv_table + struct mei_smb_priv_table *priv_table = pci_get_drvdata(dev); + int i; + + for(i=0; icount; i++) { + i2c_del_adapter(&priv_table->priv_tbl[i]->adapter); + } + pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg); + + /* + * do not call pci_disable_device(dev) since it can cause hard hangs on + * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010) + */ +} + +#define mei_i2c_suspend NULL +#define mei_i2c_resume NULL + +static struct pci_driver mei_i2c_driver = { + .name = "mei_i2c", + .id_table = mei_i2c_ids, + .probe = mei_i2c_probe, + .remove = mei_i2c_remove, + .suspend = mei_i2c_suspend, + .resume = mei_i2c_resume, +}; + +static int __init mei_i2c_init(void) +{ + int ret = 16; + u32 status = 0; + struct pci_dev *pdev = NULL; + struct mei_device *dev; + struct pci_driver *pci_drv; + + return pci_register_driver(&mei_i2c_driver); +} + +static void __exit mei_i2c_exit(void) +{ + pci_unregister_driver(&mei_i2c_driver); +} + +MODULE_AUTHOR("Delta Networks, Inc."); +MODULE_DESCRIPTION("MEI SMBus driver"); +MODULE_LICENSE("GPL"); + +module_init(mei_i2c_init); +module_exit(mei_i2c_exit); diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_rw.c b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_rw.c new file mode 100644 index 00000000000..215df220f09 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_rw.c @@ -0,0 +1,591 @@ +#include "i2c-mei_rw.h" + +#define MicroSecondDelay(time) udelay(time) + +/****** Parameter *****/ + +/****** Struct *****/ +typedef struct +{ + volatile UINT32 CB_WW; // Circular Buffer Write Window + volatile UINT32 H_CSR; // Host Control and Status Register + volatile UINT32 CB_RW; // Circular Buffer Read Window + volatile UINT32 ME_CSR; // ME Control and Status Register (read only) +} HECI_MBAR_REGS; + + +typedef union +{ + UINT32 DWord; + struct + { + UINT32 H_IE : 1, // 0 - Interrupt Enable ME + H_IS : 1, // 1 - Interrupt Status ME + H_IG : 1, // 2 - Interrupt Generate + H_RDY : 1, // 3 - Ready + H_RST : 1, // 4 - Reset + Reserved: 3, // 5~7 + H_CBRP : 8, // 8~15 - CB Read Pointer + H_CBWP : 8, // 16~23 - CB Write Pointer + H_CBD : 8; // 24~31 - Circular Buffer Depth + } Bits; +} HECI_HOST_CSR; + +// HECI_MBAR_REGS::ME_CSR - ME Control and Status Register +typedef union +{ + UINT32 DWord; + struct + { + UINT32 ME_IE : 1, // 0 - Interrupt Enable (Host Read Access) + ME_IS : 1, // 1 - Interrupt Status (Host Read Access) + ME_IG : 1, // 2 - Interrupt Generate (Host Read Access) + ME_RDY : 1, // 3 - Ready (Host Read Access) + ME_RST : 1, // 4 - Reset (Host Read Access) + Reserved: 3, // 5~7 + ME_CBRP : 8, // 8~15 - CB Read Pointer (Host Read Access) + ME_CBWP : 8, // 16~23 - CB Write Pointer (Host Read Access) + ME_CBD : 8; // 24~31 - Circular Buffer Depth (Host Read Access) + } Bits; +} HECI_ME_CSR; + +/****** Function *****/ +VOID* HeciMbarRead(IN HECI_DEVICE *pThis); +VOID HeciTrace(IN HECI_DEVICE*, IN CHAR8*, IN HECI_MSG_HEADER*, IN INT32); + +EFI_STATUS HeciInit ( HECI_DEVICE *pThis, + UINT32 *pTimeout) +{ + EFI_STATUS Status = EFI_SUCCESS; + UINT32 Timeout = 0; + HECI_HOST_CSR sHCsr; + HECI_ME_CSR sMeCsr; + HECI_MBAR_REGS *pMbarRegs; + VOID *pAddrPoint; + + if (pThis == NULL || (pThis->Mbar & 0xF) != 0 || pThis->Hidm > HECI_HIDM_LAST) + { + printk("Heci Init Failed"); + return EFI_INVALID_PARAMETER; + } + if (pTimeout != NULL) + { + Timeout = *pTimeout; + } + + // HECI vendor and device information away + pThis->PciCfg = PCI_LIB_ADDRESS(pThis->Bus, pThis->Dev, pThis->Fun, 0); + pThis->Vid = PciRead16(pThis->PciCfg + HECI_REG_VENDORID); + pThis->Did = PciRead16(pThis->PciCfg + HECI_REG_DEVICEID); + + if (pThis->Vid != 0x8086) + { + printk("[HECI] Init failed, PCI device %d/%d/%d not valid HECI (%2X-%2X)\n", + pThis->Bus, pThis->Dev, pThis->Fun, pThis->Vid, pThis->Did); + return EFI_DEVICE_ERROR; + } + + // Check MBAR, + pAddrPoint = HeciMbarRead(pThis); + pMbarRegs = (HECI_MBAR_REGS*)ioremap_nocache(pAddrPoint, 0x1000); + if (pMbarRegs == NULL) + { + printk("[HECI-%d] Init failed (device disabled)\n", pThis->Fun); + printk("Check MBAR Failed"); + Status = EFI_DEVICE_ERROR; + goto GO_FAIL; + } + + // Set HECI interrupt delivery mode. + sHCsr.DWord = pMbarRegs->H_CSR; + sHCsr.Bits.H_IE = 0; + pMbarRegs->H_CSR = sHCsr.DWord; + PciWrite8(pThis->PciCfg + HECI_REG_HIDM, pThis->Hidm); + + // Check HECI was free + sMeCsr.DWord = pMbarRegs->ME_CSR; + if (!sMeCsr.Bits.ME_RDY) + { + Status = HecClearQue(pThis, &Timeout); + } + else + { + if (!sHCsr.Bits.H_RDY) + { + sHCsr.Bits.H_IG = 1; + sHCsr.Bits.H_RDY = 1; + sHCsr.Bits.H_RST = 0; + pMbarRegs->H_CSR = sHCsr.DWord; + } + pThis->HMtu = sHCsr.Bits.H_CBD * sizeof(UINT32) - sizeof(HECI_MSG_HEADER); + pThis->MeMtu = sMeCsr.Bits.ME_CBD * sizeof(UINT32) - sizeof(HECI_MSG_HEADER); + } + + GO_FAIL: + if (pTimeout != NULL) + { + *pTimeout = Timeout; + } + pThis->Mefs1.DWord = HeciPciReadMefs1(); + iounmap((VOID *)pMbarRegs); + return Status; +} + +EFI_STATUS HecClearQue ( HECI_DEVICE *pThis, + UINT32 *pTimeout) +{ + EFI_STATUS Status; + UINT32 Timeout = 0; + HECI_HOST_CSR sHCsr; + HECI_ME_CSR sMeCsr; + HECI_MBAR_REGS *pMbarRegs; + VOID *pAddrPoint; + + if (pThis == NULL) + { + printk("Failed"); + return EFI_INVALID_PARAMETER; + } + + // Check for HECI availability on PCI + pAddrPoint = HeciMbarRead(pThis); + pMbarRegs = (HECI_MBAR_REGS*)ioremap_nocache(pAddrPoint, 0x1000); + printk("pMbarRegs: %x\n", pMbarRegs); + + if (pMbarRegs == NULL) + { + printk("[HECI-%d] Reset failed (device disabled)\n", pThis->Fun); + printk("Failed"); + return EFI_DEVICE_ERROR; + } + if (pTimeout != NULL) + { + Timeout = *pTimeout; + } + printk("[HECI-%d] Resetting HECI interface (CSR %X/%X)\n", + pThis->Fun, pMbarRegs->H_CSR, pMbarRegs->ME_CSR); + + sHCsr.DWord = pMbarRegs->H_CSR; + if (!sHCsr.Bits.H_RST) + { + sHCsr.Bits.H_RST = 1; + sHCsr.Bits.H_IG = 1; + pMbarRegs->H_CSR = sHCsr.DWord; + } + + // Wait for H_RDY cleared to make sure that the reset started. + while (1) + { + sHCsr.DWord = pMbarRegs->H_CSR; + if (!sHCsr.Bits.H_RDY) + { + break; + } + if (Timeout == 0) + { + printk("[HECI-%d] Reset failed (timeout)(CSR %X/%X)\n", + pThis->Fun, pMbarRegs->H_CSR, pMbarRegs->ME_CSR); + Status = EFI_TIMEOUT; + goto GO_FAIL; + } + MicroSecondDelay(HECI_TIMEOUT_UNIT); + Timeout--; + } + + // Wait for ME to perform reset and signal it is ready. + while (1) + { + sMeCsr.DWord = pMbarRegs->ME_CSR; + if (sMeCsr.Bits.ME_RDY) + { + break; + } + if (Timeout == 0) + { + printk("[HECI-%d] Reset failed (timeout)(CSR %X/%X)\n", + pThis->Fun, pMbarRegs->H_CSR, pMbarRegs->ME_CSR); + Status = EFI_TIMEOUT; + goto GO_FAIL; + } + MicroSecondDelay(HECI_TIMEOUT_UNIT); + Timeout--; + } + + // ME side is ready, signal host side is ready too. + sHCsr.DWord = pMbarRegs->H_CSR; + sHCsr.Bits.H_RST = 0; + sHCsr.Bits.H_RDY = 1; + sHCsr.Bits.H_IG = 1; + pMbarRegs->H_CSR = sHCsr.DWord; + + // Update MTU, ME could change it during reset. + pThis->HMtu = sHCsr.Bits.H_CBD * sizeof(UINT32) - sizeof(HECI_MSG_HEADER); + pThis->MeMtu = sMeCsr.Bits.ME_CBD * sizeof(UINT32) - sizeof(HECI_MSG_HEADER); + Status = EFI_SUCCESS; + +GO_FAIL: + if (pTimeout != NULL) + { + *pTimeout = Timeout; + } + pThis->Mefs1.DWord = HeciPciReadMefs1(); + iounmap((VOID *)pMbarRegs); + return Status; +} + +EFI_STATUS HeciMsgRecv ( HECI_DEVICE *pThis, + UINT32 *pTimeout, + HECI_MSG_HEADER *pMsgBuf, + UINT32 *pBufLen ) +{ + EFI_STATUS Status = EFI_SUCCESS; + UINT32 Timeout = 0; + UINT32 DWord, dwDataReads, dwBufLen; + UINT8 bFilledSlots, bMsgLen = 0; + HECI_HOST_CSR sHCsr; + HECI_ME_CSR sMeCsr; + HECI_MBAR_REGS *pMbarRegs; + VOID *pAddrPoint; + + if (pThis == NULL || pMsgBuf == NULL || + pBufLen == NULL || *pBufLen < sizeof(HECI_MSG_HEADER)) + { + printk("Heci MsgRecv Failed\n"); + return EFI_INVALID_PARAMETER; + } + + // Check for HECI availability on PCI + pAddrPoint = HeciMbarRead(pThis); + pMbarRegs = (HECI_MBAR_REGS*)ioremap_nocache(pAddrPoint, 0x1000); + if (pMbarRegs == NULL) + { + printk("[HECI-%d] Receive failed (device disabled)\n", pThis->Fun); + printk("pMbarRegs Failed\n"); + return EFI_DEVICE_ERROR; + } + if (pTimeout != NULL) + { + Timeout = *pTimeout; + } + + + // read from queue. + dwBufLen = *pBufLen; + *pBufLen = dwDataReads = 0; + while (1) + { + sHCsr.DWord = pMbarRegs->H_CSR; + sMeCsr.DWord = pMbarRegs->ME_CSR; + + bFilledSlots = (UINT8)((INT8)sMeCsr.Bits.ME_CBWP - (INT8)sMeCsr.Bits.ME_CBRP); + // Is it ready ? + if (!sMeCsr.Bits.ME_RDY || !sHCsr.Bits.H_RDY || bFilledSlots > sHCsr.Bits.H_CBD) + { + Status = HecClearQue(pThis, &Timeout); + if (EFI_ERROR(Status)) + { + goto GO_FAIL; + } + continue; + } + + // Read queue + while (bFilledSlots-- > 0) + { + + DWord = pMbarRegs->CB_RW; + if (*pBufLen < dwBufLen) + { + + if (dwDataReads < dwBufLen / sizeof(UINT32)) + { + ((UINT32*)pMsgBuf)[dwDataReads] = DWord; + *pBufLen += sizeof(UINT32); + } + else + { + switch (dwBufLen % sizeof(UINT32)) + { + case 3: ((UINT8*)pMsgBuf)[*pBufLen + 2] = (UINT8)(DWord >> 16); + case 2: ((UINT8*)pMsgBuf)[*pBufLen + 1] = (UINT8)(DWord >> 8); + case 1: ((UINT8*)pMsgBuf)[*pBufLen + 0] = (UINT8)DWord; + } + *pBufLen += dwBufLen % sizeof(UINT32); + } + } + else + { + printk("[HECI-%d] Message 0x%08X exceeds buffer size (%dB)\n", + pThis->Fun, pMsgBuf[0].DWord, dwBufLen); + } + dwDataReads++; + + // Read message length. + if (bMsgLen == 0) + { + bMsgLen = (UINT8)((pMsgBuf[0].Bits.Length + sizeof(UINT32) - 1) / sizeof(UINT32)); + bMsgLen++; // One more double word for message header + // + // Sanity check. If message length exceeds queue length this is + // not valid header. We are out of synch, let's reset the queue. + // + if (bMsgLen > sMeCsr.Bits.ME_CBD) + { + printk("[HECI-%d] 0x%08X does not seem to be msg header, reseting...\n", + pThis->Fun, pMsgBuf[0].DWord); + Status = HecClearQue(pThis, &Timeout); + if (EFI_ERROR(Status)) + { + goto GO_FAIL; + } + *pBufLen = dwDataReads = bMsgLen = 0; + break; // while (bFilledSlots) + } + } + + // If message is complete set interrupt to ME to let it know that next + // message can be sent and exit. + if (dwDataReads >= bMsgLen) + { + + sMeCsr.DWord = pMbarRegs->ME_CSR; + sHCsr.DWord = pMbarRegs->H_CSR; + if (!sMeCsr.Bits.ME_RDY) + { + HecClearQue(pThis, &Timeout); + Status = EFI_ABORTED; + } + else + { + HeciTrace(pThis, " Got msg: ", pMsgBuf, *pBufLen); + sHCsr.Bits.H_IG = 1; + pMbarRegs->H_CSR = sHCsr.DWord; + } + goto GO_FAIL; + } + } + if (Timeout == 0) + { + printk("[HECI-%d] Receive failed (timeout)\n", pThis->Fun); + Status = EFI_TIMEOUT; + goto GO_FAIL; + } + MicroSecondDelay(HECI_TIMEOUT_UNIT); + Timeout--; + } + GO_FAIL: + if (pTimeout != NULL) + { + *pTimeout = Timeout; + } + pThis->Mefs1.DWord = HeciPciReadMefs1(); + iounmap((VOID *)pMbarRegs); + return Status; +} + +EFI_STATUS HeciMsgSend ( HECI_DEVICE *pThis, + UINT32 *pTimeout, + HECI_MSG_HEADER *pMessage) +{ + EFI_STATUS Status; + UINT32 Timeout = 0; + UINT8 bEmptySlots; + UINT8 i, bMsgLen; + HECI_HOST_CSR sHCsr; + HECI_ME_CSR sMeCsr; + HECI_MBAR_REGS *pMbarRegs; + VOID *pAddrPoint; + + if (pThis == NULL || pMessage == NULL) + { + printk("HeciMsgSend Failed\n"); + return EFI_INVALID_PARAMETER; + } + HeciTrace(pThis, "Send msg: ", pMessage, sizeof(HECI_MSG_HEADER) + pMessage->Bits.Length); + + // Check for HECI availability + pAddrPoint = HeciMbarRead(pThis); + pMbarRegs = (HECI_MBAR_REGS*)ioremap_nocache(pAddrPoint, 0x1000); + if (pMbarRegs == NULL) + { + printk("[HECI-%d] Send failed (device disabled)\n", pThis->Fun); + printk("Failed\n"); + return EFI_DEVICE_ERROR; + } + if (pTimeout != NULL) + { + Timeout = *pTimeout; + } + + bMsgLen = (UINT8)((pMessage->Bits.Length + sizeof(UINT32) - 1) / sizeof(UINT32)); + bMsgLen++; //message header + while (1) + { + sHCsr.DWord = pMbarRegs->H_CSR; + sMeCsr.DWord = pMbarRegs->ME_CSR; + + // If message is more than queue length go fail. + if (bMsgLen > sHCsr.Bits.H_CBD) + { + printk("[HECI-%d] Send failed (msg %d B, queue %d B only)\n", + pThis->Fun, pMessage->Bits.Length, sHCsr.Bits.H_CBD * sizeof(UINT32)); + Status = EFI_BAD_BUFFER_SIZE; + goto GO_FAIL; + } + bEmptySlots = (UINT8)sHCsr.Bits.H_CBD - + (UINT8)((INT8)sHCsr.Bits.H_CBWP - (INT8)sHCsr.Bits.H_CBRP); + + // Is it ready ? + if (!sMeCsr.Bits.ME_RDY || !sHCsr.Bits.H_RDY || bEmptySlots > sHCsr.Bits.H_CBD) + { + Status = HecClearQue(pThis, &Timeout); + if (EFI_ERROR(Status)) + { + goto GO_FAIL; + } + continue; + } + + if (bMsgLen <= bEmptySlots) + { + for (i = 0; i < bMsgLen; i++) + { + pMbarRegs->CB_WW = ((UINT32*)pMessage)[i]; + } + + + sMeCsr.DWord = pMbarRegs->ME_CSR; + if (!sMeCsr.Bits.ME_RDY) + { + printk("[HECI-%d] Queue has been reset while sending\n", pThis->Fun); + continue; + } + + sHCsr.DWord = pMbarRegs->H_CSR; + sHCsr.Bits.H_IS = 0; + sHCsr.Bits.H_IG = 1; + pMbarRegs->H_CSR = sHCsr.DWord; + Status = EFI_SUCCESS; + goto GO_FAIL; + } + + + if (Timeout == 0) + { + printk("[HECI-%d] Send failed (timeout)\n", pThis->Fun); + Status = EFI_TIMEOUT; + goto GO_FAIL; + } + MicroSecondDelay(HECI_TIMEOUT_UNIT); + Timeout--; + } + GO_FAIL: + if (pTimeout != NULL) + { + *pTimeout = Timeout; + } + pThis->Mefs1.DWord = HeciPciReadMefs1(); + iounmap((VOID *)pMbarRegs); + return Status; +} + + +VOID *HeciMbarRead(HECI_DEVICE *pThis) +{ + VOID *start; + + UINT16 Cmd; + union + { + UINT64 QWord; + struct + { + UINT32 DWordL; + UINT32 DWordH; + } Bits; + } Mbar; + + // + // Read MBAR. + Mbar.QWord = 0; + Mbar.Bits.DWordL = PciRead32(pThis->PciCfg + HECI_REG_MBAR); + if (Mbar.Bits.DWordL == 0xFFFFFFFF) + { + printk("[HECI-%d] Device disabled\n", pThis->Fun); + Mbar.Bits.DWordL = 0; + goto GO_FAIL; + } + if (Mbar.Bits.DWordL & 0x4) // if 64-bit address add the upper half + { + Mbar.Bits.DWordH = PciRead32(pThis->PciCfg + HECI_REG_MBAR + 4); + } + Mbar.Bits.DWordL &= 0xFFFFFFF0; + if (Mbar.QWord == 0) + { + if (pThis->Mbar == 0) + { + printk("[HECI-%d] MBAR not programmed\n", pThis->Fun); + goto GO_FAIL; + } + else + { + Mbar.QWord = pThis->Mbar; + printk("[HECI-%d] MBAR not programmed, using default 0x%08X%08X\n", + pThis->Fun, Mbar.Bits.DWordH, Mbar.Bits.DWordL); + + // Programm the MBAR, set the 64-bit support bit regardless of the size + // of the address currently used. + PciWrite32(pThis->PciCfg + HECI_REG_MBAR + 4, Mbar.Bits.DWordH); + PciWrite32(pThis->PciCfg + HECI_REG_MBAR, Mbar.Bits.DWordL | 4); + } + } + else + { + pThis->Mbar = Mbar.QWord; + } + + // Enable the MBAR + Cmd = PciRead16(pThis->PciCfg + HECI_REG_COMMAND); + if (!(Cmd & HECI_CMD_MSE)) + { + PciWrite16(pThis->PciCfg + HECI_REG_COMMAND, Cmd | HECI_CMD_BME | HECI_CMD_MSE); + } + GO_FAIL: + return (VOID*)(INTN)Mbar.QWord; +} + + + +VOID HeciTrace( HECI_DEVICE *pThis, + CHAR8 *pPrefix, + HECI_MSG_HEADER *pMsg, + INT32 MsgLen) +{ +#if 0 /// Trace Enable or Disable + if (MsgLen > 4) + { + UINT32 dwLineBreak = 0; + UINT32 dwIndex = 0; + UINT8 *pMsgBody = (UINT8*)&pMsg[1]; + + MsgLen -= 4; + while (MsgLen-- > 0) + { + if (dwLineBreak == 0) + printk("%02x: ", (dwIndex & 0xF0)); + printk("%02x ", pMsgBody[dwIndex++]); + dwLineBreak++; + if (dwLineBreak == 16) + { + printk("\n"); + dwLineBreak = 0; + } + if (dwLineBreak == 8) + { + printk("-"); + } + } + printk("\n"); + } +#endif +} \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_rw.h b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_rw.h new file mode 100644 index 00000000000..a22728c058f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_rw.h @@ -0,0 +1,143 @@ + +#include "i2c-mei_io.h" + +/****** Parameter *****/ + +#define HECI_READ_TIMEOUT 12500000 // 12.5sec +#define HECI_SEND_TIMEOUT 12500000 // 12.5sec +#define HECI_TIMEOUT_UNIT 10 + + +// HECI functions location +#define HECI_BUS 0 +#define HECI_DEV 22 +#define HECI_FUN 0 + +// HECI register +#define HECI_REG_VENDORID 0x00 +#define HECI_REG_DEVICEID 0x02 +#define HECI_REG_COMMAND 0x04 +#define HECI_REG_REVID 0x08 +#define HECI_REG_MBAR 0x10 +#define HECI_REG_IRQ 0x3C +#define HECI_REG_HIDM 0xA0 +#define HECI_REG_HFS 0x40 +#define HECI_REG_MISC_SHDW 0x44 +#define HECI_REG_GS_SHDW 0x48 +#define HECI_REG_H_GS 0x4C +#define HECI_REG_GS_SHDW2 0x60 +#define HECI_REG_GS_SHDW3 0x64 +#define HECI_REG_GS_SHDW4 0x68 +#define HECI_REG_GS_SHDW5 0x6C +#define HECI_REG_H_GS2 0x70 +#define HECI_REG_H_GS3 0x74 +#define HECI_REG_MEFS1 HECI_REG_HFS +#define HECI_REG_MEFS2 HECI_REG_GS_SHDW + +#define HECI_MBAR_DEFAULT 0xFEDB0000 + +// HECI Interrupt Delivery Mode to be set in HECI_REG_HIDM. +#define HECI_HIDM_MSI 0 +#define HECI_HIDM_SCI 1 +#define HECI_HIDM_SMI 2 +#define HECI_HIDM_LAST HECI_HIDM_SMI + +// HECI command register bits +#define HECI_CMD_BME 0x04 // Bus master enable +#define HECI_CMD_MSE 0x02 // Memory space enable + + +/****** Struct *****/ + +typedef union +{ + UINT32 DWord; + struct + { + UINT32 MeAddress : 8, // Addressee on ME side + HostAddress: 8, // Addressee on host siede, zero for BIOS + Length : 9, // Number of bytes following the header + Reserved : 6, + MsgComplete: 1; // Whether this is last fragment of a message + } Bits; +} HECI_MSG_HEADER; + +// ME Firmware Status 1 register basics. offset:40h +typedef union +{ + UINT32 DWord; + struct + { + UINT32 CurrentState : 4, // 0~3 Current ME firmware state + Reserved_5 : 5, // 4~8 + InitComplete : 1, // 9 ME firmware finished initialization + Reserved_10 : 2, // 10~11 + ErrorCode : 4, // 12~15 If set means fatal error + OperatingMode: 4, // 16~19 Current ME operating mode + Reserved_20 : 5, // 20~24 + MsgAckData : 3, // 25~27 MSG ACK Data specific for acknowledged BIOS message + MsgAck : 4; // 28~31 Acknowledge for register based BIOS message + } Bits; +} HECI_MEFS1; + + +typedef struct +{ + + UINT8 Bus; // PCI bus + UINT8 Dev; // PCI device + UINT8 Fun; // PCI function number + + UINTN PciCfg; + UINT16 Vid; // Device ID + UINT16 Did; // Vendor ID + UINT8 Hidm; // interrupt mode + UINT64 Mbar; + UINT32 HMtu; // Max transfer unit configured by ME minus header + UINT32 MeMtu; // Max transfer unit configured by ME minus header + HECI_MEFS1 Mefs1; // ME Firmware Status at recent operation +} HECI_DEVICE; + +/****** Function *****/ + + + +/** + * @param pThis Pointer to HECI device structure + * @param pTimeout On input timeout in ms, on exit time left + */ +EFI_STATUS HeciInit ( HECI_DEVICE *pThis, + UINT32 *pTimeout); + +/** + * @param pThis Pointer to HECI device structure + * @param pTimeout On input timeout in ms, on exit time left + */ +EFI_STATUS HecClearQue ( HECI_DEVICE *pThis, + UINT32 *pTimeout); + +/** + * @param pThis Pointer to HECI device structure + * @param pTimeout On input timeout in ms, on exit time left + * @param pMsgBuf Buffer for the received message + * @param pBufLen On input buffer size, on exit message, in bytes + */ +EFI_STATUS HeciMsgRecv ( HECI_DEVICE *pThis, + UINT32 *pTimeout, + HECI_MSG_HEADER *pMsgBuf, + UINT32 *pBufLen ); + + + +/** + * @param pThis Pointer to HECI device structure + * @param pTimeout On input timeout in ms, on exit time left + * @param pMessage The header of the message to send + */ +EFI_STATUS HeciMsgSend ( HECI_DEVICE *pThis, + UINT32 *pTimeout, + HECI_MSG_HEADER *pMessage); + + + +#define HeciPciReadMefs1() PciRead32(PCI_LIB_ADDRESS(HECI_BUS, HECI_DEV, HECI_FUN, HECI_REG_MEFS1)) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_type.h b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_type.h new file mode 100644 index 00000000000..e9b60c7573d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/i2c-mei_type.h @@ -0,0 +1,448 @@ + +#include +#include +#include +#include +#include +#include +#include + +#ifdef EFIAPI +#define EFIAPI +#endif + + // + // Assume standard AARCH64 alignment. + // + typedef unsigned long long UINT64; + typedef long long INT64; + typedef unsigned int UINT32; + typedef int INT32; + typedef unsigned short UINT16; + typedef unsigned short CHAR16; + typedef short INT16; + typedef unsigned char BOOLEAN; + typedef unsigned char UINT8; + typedef char CHAR8; + typedef signed char INT8; + +/// +/// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions, +/// 8 bytes on supported 64-bit processor instructions) +/// + typedef UINT64 UINTN; + +/// +/// Signed value of native width. (4 bytes on supported 32-bit processor instructions, +/// 8 bytes on supported 64-bit processor instructions) +/// + typedef INT64 INTN; + + + +/* ========== ProcessBind.h ========= */ + +/// +/// A value of native width with the highest bit set. +/// +#define MAX_BIT 0x8000000000000000ULL + + + +/* ========== Base.h ========= */ + +// +// Modifiers to abstract standard types to aid in debug of problems +// + +/// +/// Datum is read-only. +/// +#define CONST const + +/// +/// Datum is scoped to the current file or function. +/// +#define STATIC static + +/// +/// Undeclared type. +/// +#define VOID void + +// +// Modifiers for Data Types used to self document code. +// This concept is borrowed for UEFI specification. +// + +/// +/// Datum is passed to the function. +/// +#define IN + +/// +/// Datum is returned from the function. +/// +#define OUT + +/// +/// Passing the datum to the function is optional, and a NULL +/// is passed if the value is not supplied. +/// +#define OPTIONAL + +// +// UEFI specification claims 1 and 0. We are concerned about the +// complier portability so we did it this way. +// + +/// +/// Boolean true value. UEFI Specification defines this value to be 1, +/// but this form is more portable. +/// +#define TRUE ((BOOLEAN)(1==1)) + +/// +/// Boolean false value. UEFI Specification defines this value to be 0, +/// but this form is more portable. +/// +#define FALSE ((BOOLEAN)(0==1)) + +/// +/// NULL pointer (VOID *) +/// +#define NULL ((VOID *) 0) + +// +// Status codes common to all execution phases +// +typedef UINTN RETURN_STATUS; + +/** + Produces a RETURN_STATUS code with the highest bit set. + + @param StatusCode The status code value to convert into a warning code. + StatusCode must be in the range 0x00000000..0x7FFFFFFF. + + @return The value specified by StatusCode with the highest bit set. + +**/ +#define ENCODE_ERROR(StatusCode) ((RETURN_STATUS)(MAX_BIT | (StatusCode))) + +/** + Produces a RETURN_STATUS code with the highest bit clear. + + @param StatusCode The status code value to convert into a warning code. + StatusCode must be in the range 0x00000000..0x7FFFFFFF. + + @return The value specified by StatusCode with the highest bit clear. + +**/ +#define ENCODE_WARNING(StatusCode) ((RETURN_STATUS)(StatusCode)) + +/** + Returns TRUE if a specified RETURN_STATUS code is an error code. + + This function returns TRUE if StatusCode has the high bit set. Otherwise, FALSE is returned. + + @param StatusCode The status code value to evaluate. + + @retval TRUE The high bit of StatusCode is set. + @retval FALSE The high bit of StatusCode is clear. + +**/ +#define RETURN_ERROR(StatusCode) (((INTN)(RETURN_STATUS)(StatusCode)) < 0) + +/// +/// The operation completed successfully. +/// +#define RETURN_SUCCESS 0 + +/// +/// The image failed to load. +/// +#define RETURN_LOAD_ERROR ENCODE_ERROR (1) + +/// +/// The parameter was incorrect. +/// +#define RETURN_INVALID_PARAMETER ENCODE_ERROR (2) + +/// +/// The operation is not supported. +/// +#define RETURN_UNSUPPORTED ENCODE_ERROR (3) + +/// +/// The buffer was not the proper size for the request. +/// +#define RETURN_BAD_BUFFER_SIZE ENCODE_ERROR (4) + +/// +/// The buffer was not large enough to hold the requested data. +/// The required buffer size is returned in the appropriate +/// parameter when this error occurs. +/// +#define RETURN_BUFFER_TOO_SMALL ENCODE_ERROR (5) + +/// +/// There is no data pending upon return. +/// +#define RETURN_NOT_READY ENCODE_ERROR (6) + +/// +/// The physical device reported an error while attempting the +/// operation. +/// +#define RETURN_DEVICE_ERROR ENCODE_ERROR (7) + +/// +/// The device can not be written to. +/// +#define RETURN_WRITE_PROTECTED ENCODE_ERROR (8) + +/// +/// The resource has run out. +/// +#define RETURN_OUT_OF_RESOURCES ENCODE_ERROR (9) + +/// +/// An inconsistency was detected on the file system causing the +/// operation to fail. +/// +#define RETURN_VOLUME_CORRUPTED ENCODE_ERROR (10) + +/// +/// There is no more space on the file system. +/// +#define RETURN_VOLUME_FULL ENCODE_ERROR (11) + +/// +/// The device does not contain any medium to perform the +/// operation. +/// +#define RETURN_NO_MEDIA ENCODE_ERROR (12) + +/// +/// The medium in the device has changed since the last +/// access. +/// +#define RETURN_MEDIA_CHANGED ENCODE_ERROR (13) + +/// +/// The item was not found. +/// +#define RETURN_NOT_FOUND ENCODE_ERROR (14) + +/// +/// Access was denied. +/// +#define RETURN_ACCESS_DENIED ENCODE_ERROR (15) + +/// +/// The server was not found or did not respond to the request. +/// +#define RETURN_NO_RESPONSE ENCODE_ERROR (16) + +/// +/// A mapping to the device does not exist. +/// +#define RETURN_NO_MAPPING ENCODE_ERROR (17) + +/// +/// A timeout time expired. +/// +#define RETURN_TIMEOUT ENCODE_ERROR (18) + +/// +/// The protocol has not been started. +/// +#define RETURN_NOT_STARTED ENCODE_ERROR (19) + +/// +/// The protocol has already been started. +/// +#define RETURN_ALREADY_STARTED ENCODE_ERROR (20) + +/// +/// The operation was aborted. +/// +#define RETURN_ABORTED ENCODE_ERROR (21) + +/// +/// An ICMP error occurred during the network operation. +/// +#define RETURN_ICMP_ERROR ENCODE_ERROR (22) + +/// +/// A TFTP error occurred during the network operation. +/// +#define RETURN_TFTP_ERROR ENCODE_ERROR (23) + +/// +/// A protocol error occurred during the network operation. +/// +#define RETURN_PROTOCOL_ERROR ENCODE_ERROR (24) + +/// +/// A function encountered an internal version that was +/// incompatible with a version requested by the caller. +/// +#define RETURN_INCOMPATIBLE_VERSION ENCODE_ERROR (25) + +/// +/// The function was not performed due to a security violation. +/// +#define RETURN_SECURITY_VIOLATION ENCODE_ERROR (26) + +/// +/// A CRC error was detected. +/// +#define RETURN_CRC_ERROR ENCODE_ERROR (27) + +/// +/// The beginning or end of media was reached. +/// +#define RETURN_END_OF_MEDIA ENCODE_ERROR (28) + +/// +/// The end of the file was reached. +/// +#define RETURN_END_OF_FILE ENCODE_ERROR (31) + +/// +/// The language specified was invalid. +/// +#define RETURN_INVALID_LANGUAGE ENCODE_ERROR (32) + +/// +/// The security status of the data is unknown or compromised +/// and the data must be updated or replaced to restore a valid +/// security status. +/// +#define RETURN_COMPROMISED_DATA ENCODE_ERROR (33) + +/// +/// The string contained one or more characters that +/// the device could not render and were skipped. +/// +#define RETURN_WARN_UNKNOWN_GLYPH ENCODE_WARNING (1) + +/// +/// The handle was closed, but the file was not deleted. +/// +#define RETURN_WARN_DELETE_FAILURE ENCODE_WARNING (2) + +/// +/// The handle was closed, but the data to the file was not +/// flushed properly. +/// +#define RETURN_WARN_WRITE_FAILURE ENCODE_WARNING (3) + +/// +/// The resulting buffer was too small, and the data was +/// truncated to the buffer size. +/// +#define RETURN_WARN_BUFFER_TOO_SMALL ENCODE_WARNING (4) + +/// +/// The data has not been updated within the timeframe set by +/// local policy for this type of data. +/// +#define RETURN_WARN_STALE_DATA ENCODE_WARNING (5) + + + +/* ========== UefiBaseType.h ========= */ + +/// +/// Function return status for EFI API. +/// +typedef RETURN_STATUS EFI_STATUS; + +/// +/// Enumeration of EFI_STATUS. +///@{ +#define EFI_SUCCESS RETURN_SUCCESS +#define EFI_LOAD_ERROR RETURN_LOAD_ERROR +#define EFI_INVALID_PARAMETER RETURN_INVALID_PARAMETER +#define EFI_UNSUPPORTED RETURN_UNSUPPORTED +#define EFI_BAD_BUFFER_SIZE RETURN_BAD_BUFFER_SIZE +#define EFI_BUFFER_TOO_SMALL RETURN_BUFFER_TOO_SMALL +#define EFI_NOT_READY RETURN_NOT_READY +#define EFI_DEVICE_ERROR RETURN_DEVICE_ERROR +#define EFI_WRITE_PROTECTED RETURN_WRITE_PROTECTED +#define EFI_OUT_OF_RESOURCES RETURN_OUT_OF_RESOURCES +#define EFI_VOLUME_CORRUPTED RETURN_VOLUME_CORRUPTED +#define EFI_VOLUME_FULL RETURN_VOLUME_FULL +#define EFI_NO_MEDIA RETURN_NO_MEDIA +#define EFI_MEDIA_CHANGED RETURN_MEDIA_CHANGED +#define EFI_NOT_FOUND RETURN_NOT_FOUND +#define EFI_ACCESS_DENIED RETURN_ACCESS_DENIED +#define EFI_NO_RESPONSE RETURN_NO_RESPONSE +#define EFI_NO_MAPPING RETURN_NO_MAPPING +#define EFI_TIMEOUT RETURN_TIMEOUT +#define EFI_NOT_STARTED RETURN_NOT_STARTED +#define EFI_ALREADY_STARTED RETURN_ALREADY_STARTED +#define EFI_ABORTED RETURN_ABORTED +#define EFI_ICMP_ERROR RETURN_ICMP_ERROR +#define EFI_TFTP_ERROR RETURN_TFTP_ERROR +#define EFI_PROTOCOL_ERROR RETURN_PROTOCOL_ERROR +#define EFI_INCOMPATIBLE_VERSION RETURN_INCOMPATIBLE_VERSION +#define EFI_SECURITY_VIOLATION RETURN_SECURITY_VIOLATION +#define EFI_CRC_ERROR RETURN_CRC_ERROR +#define EFI_END_OF_MEDIA RETURN_END_OF_MEDIA +#define EFI_END_OF_FILE RETURN_END_OF_FILE +#define EFI_INVALID_LANGUAGE RETURN_INVALID_LANGUAGE +#define EFI_COMPROMISED_DATA RETURN_COMPROMISED_DATA + +#define EFI_WARN_UNKNOWN_GLYPH RETURN_WARN_UNKNOWN_GLYPH +#define EFI_WARN_DELETE_FAILURE RETURN_WARN_DELETE_FAILURE +#define EFI_WARN_WRITE_FAILURE RETURN_WARN_WRITE_FAILURE +#define EFI_WARN_BUFFER_TOO_SMALL RETURN_WARN_BUFFER_TOO_SMALL +#define EFI_WARN_STALE_DATA RETURN_WARN_STALE_DATA +///@} + +/// +/// Define macro to encode the status code. +/// +#define EFIERR(_a) ENCODE_ERROR(_a) + +#define EFI_ERROR(A) RETURN_ERROR(A) + + + +/* ========== BaseLib.h ========= */ + +/// +/// Byte packed structure for EFLAGS/RFLAGS. +/// 32-bits on IA-32. +/// 64-bits on x64. The upper 32-bits on x64 are reserved. +/// +typedef union { + struct { + UINT32 CF:1; ///< Carry Flag. + UINT32 Reserved_0:1; ///< Reserved. + UINT32 PF:1; ///< Parity Flag. + UINT32 Reserved_1:1; ///< Reserved. + UINT32 AF:1; ///< Auxiliary Carry Flag. + UINT32 Reserved_2:1; ///< Reserved. + UINT32 ZF:1; ///< Zero Flag. + UINT32 SF:1; ///< Sign Flag. + UINT32 TF:1; ///< Trap Flag. + UINT32 IF:1; ///< Interrupt Enable Flag. + UINT32 DF:1; ///< Direction Flag. + UINT32 OF:1; ///< Overflow Flag. + UINT32 IOPL:2; ///< I/O Privilege Level. + UINT32 NT:1; ///< Nested Task. + UINT32 Reserved_3:1; ///< Reserved. + UINT32 RF:1; ///< Resume Flag. + UINT32 VM:1; ///< Virtual 8086 Mode. + UINT32 AC:1; ///< Alignment Check. + UINT32 VIF:1; ///< Virtual Interrupt Flag. + UINT32 VIP:1; ///< Virtual Interrupt Pending. + UINT32 ID:1; ///< ID Flag. + UINT32 Reserved_4:10; ///< Reserved. + } Bits; + UINTN UintN; +} IA32_EFLAGS32; \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/mei_dev.h b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/mei_dev.h new file mode 100644 index 00000000000..4250555d5e7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/ag9064/modules/mei_dev.h @@ -0,0 +1,832 @@ +/* + * + * Intel Management Engine Interface (Intel MEI) Linux driver + * Copyright (c) 2003-2012, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#ifndef _MEI_DEV_H_ +#define _MEI_DEV_H_ + +#include +#include +#include +#include +#include + +#include "hw.h" +#include "hbm.h" + +/* + * watch dog definition + */ +#define MEI_WD_HDR_SIZE 4 +#define MEI_WD_STOP_MSG_SIZE MEI_WD_HDR_SIZE +#define MEI_WD_START_MSG_SIZE (MEI_WD_HDR_SIZE + 16) + +#define MEI_WD_DEFAULT_TIMEOUT 120 /* seconds */ +#define MEI_WD_MIN_TIMEOUT 120 /* seconds */ +#define MEI_WD_MAX_TIMEOUT 65535 /* seconds */ + +#define MEI_WD_STOP_TIMEOUT 10 /* msecs */ + +#define MEI_WD_STATE_INDEPENDENCE_MSG_SENT (1 << 0) + +#define MEI_RD_MSG_BUF_SIZE (128 * sizeof(u32)) + + +/* + * AMTHI Client UUID + */ +extern const uuid_le mei_amthif_guid; + +/* + * Watchdog Client UUID + */ +extern const uuid_le mei_wd_guid; + +/* + * Number of Maximum MEI Clients + */ +#define MEI_CLIENTS_MAX 256 + +/* + * maximum number of consecutive resets + */ +#define MEI_MAX_CONSEC_RESET 3 + +/* + * Number of File descriptors/handles + * that can be opened to the driver. + * + * Limit to 255: 256 Total Clients + * minus internal client for MEI Bus Messages + */ +#define MEI_MAX_OPEN_HANDLE_COUNT (MEI_CLIENTS_MAX - 1) + +/* + * Internal Clients Number + */ +#define MEI_HOST_CLIENT_ID_ANY (-1) +#define MEI_HBM_HOST_CLIENT_ID 0 /* not used, just for documentation */ +#define MEI_WD_HOST_CLIENT_ID 1 +#define MEI_IAMTHIF_HOST_CLIENT_ID 2 + + +/* File state */ +enum file_state { + MEI_FILE_INITIALIZING = 0, + MEI_FILE_CONNECTING, + MEI_FILE_CONNECTED, + MEI_FILE_DISCONNECTING, + MEI_FILE_DISCONNECT_REPLY, + MEI_FILE_DISCONNECT_REQUIRED, + MEI_FILE_DISCONNECTED, +}; + +/* MEI device states */ +enum mei_dev_state { + MEI_DEV_INITIALIZING = 0, + MEI_DEV_INIT_CLIENTS, + MEI_DEV_ENABLED, + MEI_DEV_RESETTING, + MEI_DEV_DISABLED, + MEI_DEV_POWER_DOWN, + MEI_DEV_POWER_UP +}; + +const char *mei_dev_state_str(int state); + +enum iamthif_states { + MEI_IAMTHIF_IDLE, + MEI_IAMTHIF_WRITING, + MEI_IAMTHIF_FLOW_CONTROL, + MEI_IAMTHIF_READING, + MEI_IAMTHIF_READ_COMPLETE +}; + +enum mei_file_transaction_states { + MEI_IDLE, + MEI_WRITING, + MEI_WRITE_COMPLETE, + MEI_FLOW_CONTROL, + MEI_READING, + MEI_READ_COMPLETE +}; + +enum mei_wd_states { + MEI_WD_IDLE, + MEI_WD_RUNNING, + MEI_WD_STOPPING, +}; + +/** + * enum mei_cb_file_ops - file operation associated with the callback + * @MEI_FOP_READ: read + * @MEI_FOP_WRITE: write + * @MEI_FOP_CONNECT: connect + * @MEI_FOP_DISCONNECT: disconnect + * @MEI_FOP_DISCONNECT_RSP: disconnect response + * @MEI_FOP_NOTIFY_START: start notification + * @MEI_FOP_NOTIFY_STOP: stop notification + */ +enum mei_cb_file_ops { + MEI_FOP_READ = 0, + MEI_FOP_WRITE, + MEI_FOP_CONNECT, + MEI_FOP_DISCONNECT, + MEI_FOP_DISCONNECT_RSP, + MEI_FOP_NOTIFY_START, + MEI_FOP_NOTIFY_STOP, +}; + +/* + * Intel MEI message data struct + */ +struct mei_msg_data { + u32 size; + unsigned char *data; +}; + +/* Maximum number of processed FW status registers */ +#define MEI_FW_STATUS_MAX 6 +/* Minimal buffer for FW status string (8 bytes in dw + space or '\0') */ +#define MEI_FW_STATUS_STR_SZ (MEI_FW_STATUS_MAX * (8 + 1)) + + +/* + * struct mei_fw_status - storage of FW status data + * + * @count: number of actually available elements in array + * @status: FW status registers + */ +struct mei_fw_status { + int count; + u32 status[MEI_FW_STATUS_MAX]; +}; + +/** + * struct mei_me_client - representation of me (fw) client + * + * @list: link in me client list + * @refcnt: struct reference count + * @props: client properties + * @client_id: me client id + * @mei_flow_ctrl_creds: flow control credits + * @connect_count: number connections to this client + * @bus_added: added to bus + */ +struct mei_me_client { + struct list_head list; + struct kref refcnt; + struct mei_client_properties props; + u8 client_id; + u8 mei_flow_ctrl_creds; + u8 connect_count; + u8 bus_added; +}; + + +struct mei_cl; + +/** + * struct mei_cl_cb - file operation callback structure + * + * @list: link in callback queue + * @cl: file client who is running this operation + * @fop_type: file operation type + * @buf: buffer for data associated with the callback + * @buf_idx: last read index + * @read_time: last read operation time stamp (iamthif) + * @file_object: pointer to file structure + * @status: io status of the cb + * @internal: communication between driver and FW flag + * @completed: the transfer or reception has completed + */ +struct mei_cl_cb { + struct list_head list; + struct mei_cl *cl; + enum mei_cb_file_ops fop_type; + struct mei_msg_data buf; + unsigned long buf_idx; + unsigned long read_time; + struct file *file_object; + int status; + u32 internal:1; + u32 completed:1; +}; + +/** + * struct mei_cl - me client host representation + * carried in file->private_data + * + * @link: link in the clients list + * @dev: mei parent device + * @state: file operation state + * @tx_wait: wait queue for tx completion + * @rx_wait: wait queue for rx completion + * @wait: wait queue for management operation + * @ev_wait: notification wait queue + * @ev_async: event async notification + * @status: connection status + * @me_cl: fw client connected + * @host_client_id: host id + * @mei_flow_ctrl_creds: transmit flow credentials + * @timer_count: watchdog timer for operation completion + * @reserved: reserved for alignment + * @notify_en: notification - enabled/disabled + * @notify_ev: pending notification event + * @writing_state: state of the tx + * @rd_pending: pending read credits + * @rd_completed: completed read + * + * @cldev: device on the mei client bus + */ +struct mei_cl { + struct list_head link; + struct mei_device *dev; + enum file_state state; + wait_queue_head_t tx_wait; + wait_queue_head_t rx_wait; + wait_queue_head_t wait; + wait_queue_head_t ev_wait; + struct fasync_struct *ev_async; + int status; + struct mei_me_client *me_cl; + u8 host_client_id; + u8 mei_flow_ctrl_creds; + u8 timer_count; + u8 reserved; + u8 notify_en; + u8 notify_ev; + enum mei_file_transaction_states writing_state; + struct list_head rd_pending; + struct list_head rd_completed; + + struct mei_cl_device *cldev; +}; + +/** + * struct mei_hw_ops - hw specific ops + * + * @host_is_ready : query for host readiness + * + * @hw_is_ready : query if hw is ready + * @hw_reset : reset hw + * @hw_start : start hw after reset + * @hw_config : configure hw + * + * @fw_status : get fw status registers + * @pg_state : power gating state of the device + * @pg_in_transition : is device now in pg transition + * @pg_is_enabled : is power gating enabled + * + * @intr_clear : clear pending interrupts + * @intr_enable : enable interrupts + * @intr_disable : disable interrupts + * + * @hbuf_free_slots : query for write buffer empty slots + * @hbuf_is_ready : query if write buffer is empty + * @hbuf_max_len : query for write buffer max len + * + * @write : write a message to FW + * + * @rdbuf_full_slots : query how many slots are filled + * + * @read_hdr : get first 4 bytes (header) + * @read : read a buffer from the FW + */ +struct mei_hw_ops { + + bool (*host_is_ready)(struct mei_device *dev); + + bool (*hw_is_ready)(struct mei_device *dev); + int (*hw_reset)(struct mei_device *dev, bool enable); + int (*hw_start)(struct mei_device *dev); + void (*hw_config)(struct mei_device *dev); + + + int (*fw_status)(struct mei_device *dev, struct mei_fw_status *fw_sts); + enum mei_pg_state (*pg_state)(struct mei_device *dev); + bool (*pg_in_transition)(struct mei_device *dev); + bool (*pg_is_enabled)(struct mei_device *dev); + + void (*intr_clear)(struct mei_device *dev); + void (*intr_enable)(struct mei_device *dev); + void (*intr_disable)(struct mei_device *dev); + + int (*hbuf_free_slots)(struct mei_device *dev); + bool (*hbuf_is_ready)(struct mei_device *dev); + size_t (*hbuf_max_len)(const struct mei_device *dev); + + int (*write)(struct mei_device *dev, + struct mei_msg_hdr *hdr, + unsigned char *buf); + + int (*rdbuf_full_slots)(struct mei_device *dev); + + u32 (*read_hdr)(const struct mei_device *dev); + int (*read)(struct mei_device *dev, + unsigned char *buf, unsigned long len); +}; + +/* MEI bus API*/ +void mei_cl_bus_rescan(struct mei_device *bus); +void mei_cl_bus_dev_fixup(struct mei_cl_device *dev); +ssize_t __mei_cl_send(struct mei_cl *cl, u8 *buf, size_t length, + bool blocking); +ssize_t __mei_cl_recv(struct mei_cl *cl, u8 *buf, size_t length); +void mei_cl_bus_rx_event(struct mei_cl *cl); +void mei_cl_bus_notify_event(struct mei_cl *cl); +void mei_cl_bus_remove_devices(struct mei_device *bus); +int mei_cl_bus_init(void); +void mei_cl_bus_exit(void); + +/** + * enum mei_pg_event - power gating transition events + * + * @MEI_PG_EVENT_IDLE: the driver is not in power gating transition + * @MEI_PG_EVENT_WAIT: the driver is waiting for a pg event to complete + * @MEI_PG_EVENT_RECEIVED: the driver received pg event + * @MEI_PG_EVENT_INTR_WAIT: the driver is waiting for a pg event interrupt + * @MEI_PG_EVENT_INTR_RECEIVED: the driver received pg event interrupt + */ +enum mei_pg_event { + MEI_PG_EVENT_IDLE, + MEI_PG_EVENT_WAIT, + MEI_PG_EVENT_RECEIVED, + MEI_PG_EVENT_INTR_WAIT, + MEI_PG_EVENT_INTR_RECEIVED, +}; + +/** + * enum mei_pg_state - device internal power gating state + * + * @MEI_PG_OFF: device is not power gated - it is active + * @MEI_PG_ON: device is power gated - it is in lower power state + */ +enum mei_pg_state { + MEI_PG_OFF = 0, + MEI_PG_ON = 1, +}; + +const char *mei_pg_state_str(enum mei_pg_state state); + +/** + * struct mei_device - MEI private device struct + * + * @dev : device on a bus + * @cdev : character device + * @minor : minor number allocated for device + * + * @write_list : write pending list + * @write_waiting_list : write completion list + * @ctrl_wr_list : pending control write list + * @ctrl_rd_list : pending control read list + * + * @file_list : list of opened handles + * @open_handle_count: number of opened handles + * + * @device_lock : big device lock + * @timer_work : MEI timer delayed work (timeouts) + * + * @recvd_hw_ready : hw ready message received flag + * + * @wait_hw_ready : wait queue for receive HW ready message form FW + * @wait_pg : wait queue for receive PG message from FW + * @wait_hbm_start : wait queue for receive HBM start message from FW + * @wait_stop_wd : wait queue for receive WD stop message from FW + * + * @reset_count : number of consecutive resets + * @dev_state : device state + * @hbm_state : state of host bus message protocol + * @init_clients_timer : HBM init handshake timeout + * + * @pg_event : power gating event + * @pg_domain : runtime PM domain + * + * @rd_msg_buf : control messages buffer + * @rd_msg_hdr : read message header storage + * + * @hbuf_depth : depth of hardware host/write buffer is slots + * @hbuf_is_ready : query if the host host/write buffer is ready + * @wr_msg : the buffer for hbm control messages + * + * @version : HBM protocol version in use + * @hbm_f_pg_supported : hbm feature pgi protocol + * @hbm_f_dc_supported : hbm feature dynamic clients + * @hbm_f_dot_supported : hbm feature disconnect on timeout + * @hbm_f_ev_supported : hbm feature event notification + * + * @me_clients_rwsem: rw lock over me_clients list + * @me_clients : list of FW clients + * @me_clients_map : FW clients bit map + * @host_clients_map : host clients id pool + * @me_client_index : last FW client index in enumeration + * + * @allow_fixed_address: allow user space to connect a fixed client + * + * @wd_cl : watchdog client + * @wd_state : watchdog client state + * @wd_pending : watchdog command is pending + * @wd_timeout : watchdog expiration timeout + * @wd_data : watchdog message buffer + * + * @amthif_cmd_list : amthif list for cmd waiting + * @amthif_rd_complete_list : amthif list for reading completed cmd data + * @iamthif_file_object : file for current amthif operation + * @iamthif_cl : amthif host client + * @iamthif_current_cb : amthif current operation callback + * @iamthif_open_count : number of opened amthif connections + * @iamthif_timer : time stamp of current amthif command completion + * @iamthif_stall_timer : timer to detect amthif hang + * @iamthif_state : amthif processor state + * @iamthif_canceled : current amthif command is canceled + * + * @init_work : work item for the device init + * @reset_work : work item for the device reset + * + * @device_list : mei client bus list + * @cl_bus_lock : client bus list lock + * + * @dbgfs_dir : debugfs mei root directory + * + * @ops: : hw specific operations + * @hw : hw specific data + */ +struct mei_device { + struct device *dev; + struct cdev cdev; + int minor; + + struct mei_cl_cb write_list; + struct mei_cl_cb write_waiting_list; + struct mei_cl_cb ctrl_wr_list; + struct mei_cl_cb ctrl_rd_list; + + struct list_head file_list; + long open_handle_count; + + struct mutex device_lock; + struct delayed_work timer_work; + + bool recvd_hw_ready; + /* + * waiting queue for receive message from FW + */ + wait_queue_head_t wait_hw_ready; + wait_queue_head_t wait_pg; + wait_queue_head_t wait_hbm_start; + wait_queue_head_t wait_stop_wd; + + /* + * mei device states + */ + unsigned long reset_count; + enum mei_dev_state dev_state; + enum mei_hbm_state hbm_state; + u16 init_clients_timer; + + /* + * Power Gating support + */ + enum mei_pg_event pg_event; +#ifdef CONFIG_PM + struct dev_pm_domain pg_domain; +#endif /* CONFIG_PM */ + + unsigned char rd_msg_buf[MEI_RD_MSG_BUF_SIZE]; + u32 rd_msg_hdr; + + /* write buffer */ + u8 hbuf_depth; + bool hbuf_is_ready; + + /* used for control messages */ + struct { + struct mei_msg_hdr hdr; + unsigned char data[128]; + } wr_msg; + + struct hbm_version version; + unsigned int hbm_f_pg_supported:1; + unsigned int hbm_f_dc_supported:1; + unsigned int hbm_f_dot_supported:1; + unsigned int hbm_f_ev_supported:1; + + struct rw_semaphore me_clients_rwsem; + struct list_head me_clients; + DECLARE_BITMAP(me_clients_map, MEI_CLIENTS_MAX); + DECLARE_BITMAP(host_clients_map, MEI_CLIENTS_MAX); + unsigned long me_client_index; + + bool allow_fixed_address; + + struct mei_cl wd_cl; + enum mei_wd_states wd_state; + bool wd_pending; + u16 wd_timeout; + unsigned char wd_data[MEI_WD_START_MSG_SIZE]; + + + /* amthif list for cmd waiting */ + struct mei_cl_cb amthif_cmd_list; + /* driver managed amthif list for reading completed amthif cmd data */ + struct mei_cl_cb amthif_rd_complete_list; + struct file *iamthif_file_object; + struct mei_cl iamthif_cl; + struct mei_cl_cb *iamthif_current_cb; + long iamthif_open_count; + unsigned long iamthif_timer; + u32 iamthif_stall_timer; + enum iamthif_states iamthif_state; + bool iamthif_canceled; + + struct work_struct init_work; + struct work_struct reset_work; + + /* List of bus devices */ + struct list_head device_list; + struct mutex cl_bus_lock; + +#if IS_ENABLED(CONFIG_DEBUG_FS) + struct dentry *dbgfs_dir; +#endif /* CONFIG_DEBUG_FS */ + + + const struct mei_hw_ops *ops; + char hw[0] __aligned(sizeof(void *)); +}; + +static inline unsigned long mei_secs_to_jiffies(unsigned long sec) +{ + return msecs_to_jiffies(sec * MSEC_PER_SEC); +} + +/** + * mei_data2slots - get slots - number of (dwords) from a message length + * + size of the mei header + * + * @length: size of the messages in bytes + * + * Return: number of slots + */ +static inline u32 mei_data2slots(size_t length) +{ + return DIV_ROUND_UP(sizeof(struct mei_msg_hdr) + length, 4); +} + +/** + * mei_slots2data - get data in slots - bytes from slots + * + * @slots: number of available slots + * + * Return: number of bytes in slots + */ +static inline u32 mei_slots2data(int slots) +{ + return slots * 4; +} + +/* + * mei init function prototypes + */ +void mei_device_init(struct mei_device *dev, + struct device *device, + const struct mei_hw_ops *hw_ops); +int mei_reset(struct mei_device *dev); +int mei_start(struct mei_device *dev); +int mei_restart(struct mei_device *dev); +void mei_stop(struct mei_device *dev); +void mei_cancel_work(struct mei_device *dev); + +/* + * MEI interrupt functions prototype + */ + +void mei_timer(struct work_struct *work); +int mei_irq_read_handler(struct mei_device *dev, + struct mei_cl_cb *cmpl_list, s32 *slots); + +int mei_irq_write_handler(struct mei_device *dev, struct mei_cl_cb *cmpl_list); +void mei_irq_compl_handler(struct mei_device *dev, struct mei_cl_cb *cmpl_list); + +/* + * AMTHIF - AMT Host Interface Functions + */ +void mei_amthif_reset_params(struct mei_device *dev); + +int mei_amthif_host_init(struct mei_device *dev, struct mei_me_client *me_cl); + +int mei_amthif_read(struct mei_device *dev, struct file *file, + char __user *ubuf, size_t length, loff_t *offset); + +unsigned int mei_amthif_poll(struct mei_device *dev, + struct file *file, poll_table *wait); + +int mei_amthif_release(struct mei_device *dev, struct file *file); + +struct mei_cl_cb *mei_amthif_find_read_list_entry(struct mei_device *dev, + struct file *file); + +int mei_amthif_write(struct mei_cl *cl, struct mei_cl_cb *cb); +int mei_amthif_run_next_cmd(struct mei_device *dev); +int mei_amthif_irq_write(struct mei_cl *cl, struct mei_cl_cb *cb, + struct mei_cl_cb *cmpl_list); + +void mei_amthif_complete(struct mei_device *dev, struct mei_cl_cb *cb); +int mei_amthif_irq_read_msg(struct mei_cl *cl, + struct mei_msg_hdr *mei_hdr, + struct mei_cl_cb *complete_list); +int mei_amthif_irq_read(struct mei_device *dev, s32 *slots); + +/* + * NFC functions + */ +int mei_nfc_host_init(struct mei_device *dev, struct mei_me_client *me_cl); +void mei_nfc_host_exit(struct mei_device *dev); + +/* + * NFC Client UUID + */ +extern const uuid_le mei_nfc_guid; + +int mei_wd_send(struct mei_device *dev); +int mei_wd_stop(struct mei_device *dev); +int mei_wd_host_init(struct mei_device *dev, struct mei_me_client *me_cl); +/* + * mei_watchdog_register - Registering watchdog interface + * once we got connection to the WD Client + * @dev: mei device + */ +int mei_watchdog_register(struct mei_device *dev); +/* + * mei_watchdog_unregister - Unregistering watchdog interface + * @dev: mei device + */ +void mei_watchdog_unregister(struct mei_device *dev); + +/* + * Register Access Function + */ + + +static inline void mei_hw_config(struct mei_device *dev) +{ + dev->ops->hw_config(dev); +} + +static inline enum mei_pg_state mei_pg_state(struct mei_device *dev) +{ + return dev->ops->pg_state(dev); +} + +static inline bool mei_pg_in_transition(struct mei_device *dev) +{ + return dev->ops->pg_in_transition(dev); +} + +static inline bool mei_pg_is_enabled(struct mei_device *dev) +{ + return dev->ops->pg_is_enabled(dev); +} + +static inline int mei_hw_reset(struct mei_device *dev, bool enable) +{ + return dev->ops->hw_reset(dev, enable); +} + +static inline int mei_hw_start(struct mei_device *dev) +{ + return dev->ops->hw_start(dev); +} + +static inline void mei_clear_interrupts(struct mei_device *dev) +{ + dev->ops->intr_clear(dev); +} + +static inline void mei_enable_interrupts(struct mei_device *dev) +{ + dev->ops->intr_enable(dev); +} + +static inline void mei_disable_interrupts(struct mei_device *dev) +{ + dev->ops->intr_disable(dev); +} + +static inline bool mei_host_is_ready(struct mei_device *dev) +{ + return dev->ops->host_is_ready(dev); +} +static inline bool mei_hw_is_ready(struct mei_device *dev) +{ + return dev->ops->hw_is_ready(dev); +} + +static inline bool mei_hbuf_is_ready(struct mei_device *dev) +{ + return dev->ops->hbuf_is_ready(dev); +} + +static inline int mei_hbuf_empty_slots(struct mei_device *dev) +{ + return dev->ops->hbuf_free_slots(dev); +} + +static inline size_t mei_hbuf_max_len(const struct mei_device *dev) +{ + return dev->ops->hbuf_max_len(dev); +} + +static inline int mei_write_message(struct mei_device *dev, + struct mei_msg_hdr *hdr, + unsigned char *buf) +{ + return dev->ops->write(dev, hdr, buf); +} + +static inline u32 mei_read_hdr(const struct mei_device *dev) +{ + return dev->ops->read_hdr(dev); +} + +static inline void mei_read_slots(struct mei_device *dev, + unsigned char *buf, unsigned long len) +{ + dev->ops->read(dev, buf, len); +} + +static inline int mei_count_full_read_slots(struct mei_device *dev) +{ + return dev->ops->rdbuf_full_slots(dev); +} + +static inline int mei_fw_status(struct mei_device *dev, + struct mei_fw_status *fw_status) +{ + return dev->ops->fw_status(dev, fw_status); +} + +bool mei_hbuf_acquire(struct mei_device *dev); + +bool mei_write_is_idle(struct mei_device *dev); + +#if IS_ENABLED(CONFIG_DEBUG_FS) +int mei_dbgfs_register(struct mei_device *dev, const char *name); +void mei_dbgfs_deregister(struct mei_device *dev); +#else +static inline int mei_dbgfs_register(struct mei_device *dev, const char *name) +{ + return 0; +} +static inline void mei_dbgfs_deregister(struct mei_device *dev) {} +#endif /* CONFIG_DEBUG_FS */ + +int mei_register(struct mei_device *dev, struct device *parent); +void mei_deregister(struct mei_device *dev); + +#define MEI_HDR_FMT "hdr:host=%02d me=%02d len=%d internal=%1d comp=%1d" +#define MEI_HDR_PRM(hdr) \ + (hdr)->host_addr, (hdr)->me_addr, \ + (hdr)->length, (hdr)->internal, (hdr)->msg_complete + +ssize_t mei_fw_status2str(struct mei_fw_status *fw_sts, char *buf, size_t len); +/** + * mei_fw_status_str - fetch and convert fw status registers to printable string + * + * @dev: the device structure + * @buf: string buffer at minimal size MEI_FW_STATUS_STR_SZ + * @len: buffer len must be >= MEI_FW_STATUS_STR_SZ + * + * Return: number of bytes written or < 0 on failure + */ +static inline ssize_t mei_fw_status_str(struct mei_device *dev, + char *buf, size_t len) +{ + struct mei_fw_status fw_status; + int ret; + + buf[0] = '\0'; + + ret = mei_fw_status(dev, &fw_status); + if (ret) + return ret; + + ret = mei_fw_status2str(&fw_status, buf, MEI_FW_STATUS_STR_SZ); + + return ret; +} + + +#endif diff --git a/platform/broadcom/sonic-platform-modules-delta/common/modules/dni_emc2305.c b/platform/broadcom/sonic-platform-modules-delta/common/modules/dni_emc2305.c new file mode 100644 index 00000000000..73d9900af5b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/common/modules/dni_emc2305.c @@ -0,0 +1,381 @@ +/* + * + * + * Copyright (C) 2017 Delta Networks, Inc. + * + * This program is free software; you can redistribute it + * and/or modify it under the terms ofthe GNU General Public License as + * published by the Free Software Foundation; either version 2 of the License, + * or (at your option) any later version. + * + * + * + * + * + * A hwmon driver for the SMSC EMC2305 fan controller + * Complete datasheet is available (6/2013) at: + * http://www.smsc.com/media/Downloads_Public/Data_Sheets/2305.pdf + */ + +#include +#include +#include +#include +#include + + +static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count); +static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, + char *buf); +static ssize_t set_fan(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count); +static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, + char *buf); +static ssize_t set_fan_percentage(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count); +static ssize_t show_fan_percentage(struct device *dev, struct device_attribute * devattr, + char *buf); +static const unsigned short normal_i2c[] = { 0x2C, 0x2D, 0x2E, 0x2F, 0x4C, + 0x4D, I2C_CLIENT_END + }; + + +#define EMC2305_REG_DEVICE 0xFD +#define EMC2305_REG_VENDOR 0xFE + +//#define FAN_MINIMUN 0x33 /*20%*/ +#define FAN_MINIMUN 0x0 /*0%*/ +#define FAN_RPM_BASED 0xAB + +#define EMC2305_REG_FAN_DRIVE(n) (0x30 + 0x10 * n) +#define EMC2305_REG_FAN_MIN_DRIVE(n) (0x38 + 0x10 * n) +#define EMC2305_REG_FAN_TACH(n) (0x3E + 0x10 * n) +#define EMC2305_REG_FAN_CONF(n) (0x32 + 0x10 * n) +#define EMC2305_REG_FAN_REAR_H_RPM(n) (0x3D + 0x10 * n) +#define EMC2305_REG_FAN_REAR_L_RPM(n) (0x3C + 0x10 * n) + +#define EMC2305_DEVICE 0x34 +#define EMC2305_VENDOR 0x5D +#define MAX_FAN_SPEED 23000 + +struct emc2305_data +{ + struct device *hwmon_dev; + struct attribute_group attrs; + struct mutex lock; +}; + +static int emc2305_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int emc2305_detect(struct i2c_client *client, + struct i2c_board_info *info); +static int emc2305_remove(struct i2c_client *client); + +static const struct i2c_device_id emc2305_id[] = +{ + { "emc2305", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, emc2305_id); + +static struct i2c_driver emc2305_driver = +{ + .class = I2C_CLASS_HWMON, + .driver = { + .name = "emc2305", + }, + .probe = emc2305_probe, + .remove = emc2305_remove, + .id_table = emc2305_id, + .detect = emc2305_detect, + .address_list = normal_i2c, +}; + +static SENSOR_DEVICE_ATTR(fan1_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 1); +static SENSOR_DEVICE_ATTR(fan3_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 2); +static SENSOR_DEVICE_ATTR(fan4_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 3); +static SENSOR_DEVICE_ATTR(fan5_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 4); +static SENSOR_DEVICE_ATTR(fan1_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 0); +static SENSOR_DEVICE_ATTR(fan2_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 1); +static SENSOR_DEVICE_ATTR(fan3_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 2); +static SENSOR_DEVICE_ATTR(fan4_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 3); +static SENSOR_DEVICE_ATTR(fan5_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 4); +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 0); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 1); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 2); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 3); +static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 4); + +static struct attribute *emc2305_attr[] = +{ + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan1_input_percentage.dev_attr.attr, + &sensor_dev_attr_fan2_input_percentage.dev_attr.attr, + &sensor_dev_attr_fan3_input_percentage.dev_attr.attr, + &sensor_dev_attr_fan4_input_percentage.dev_attr.attr, + &sensor_dev_attr_fan5_input_percentage.dev_attr.attr, + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, + &sensor_dev_attr_pwm5.dev_attr.attr, + NULL +}; + +static ssize_t show_fan_percentage(struct device *dev, struct device_attribute * devattr, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int val; + + mutex_lock(&data->lock); + val = i2c_smbus_read_word_swapped(client, + EMC2305_REG_FAN_TACH(attr->index)); + mutex_unlock(&data->lock); + /* Left shift 3 bits for showing correct RPM */ + val = val >> 3; + if ((int)(3932160 * 2 / (val > 0 ? val : 1) == 960))return sprintf(buf, "%d\n", 0); + return sprintf(buf, "%d\n", (int)(3932160 * 2 / (val > 0 ? val : 1) * 100 / MAX_FAN_SPEED)); +} + + +static ssize_t set_fan_percentage(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + unsigned long hsb, lsb; + unsigned long tech; + unsigned long val; + int ret; + + ret = kstrtoul(buf, 10, &val); + if (ret) + { + return ret; + } + if (val > 100) + { + return -EINVAL; + } + + if (val <= 5) + { + hsb = 0xff; /*high bit*/ + lsb = 0xe0; /*low bit*/ + } + else + { + val = val * 230; + tech = (3932160 * 2) / (val > 0 ? val : 1); + hsb = (uint8_t)(((tech << 3) >> 8) & 0x0ff); + lsb = (uint8_t)((tech << 3) & 0x0f8); + } + + mutex_lock(&data->lock); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_H_RPM(attr->index), hsb); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_L_RPM(attr->index), lsb); + mutex_unlock(&data->lock); + return count; +} + + +static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int val; + + + mutex_lock(&data->lock); + val = i2c_smbus_read_word_swapped(client, + EMC2305_REG_FAN_TACH(attr->index)); + mutex_unlock(&data->lock); + /* Left shift 3 bits for showing correct RPM */ + val = val >> 3; + return sprintf(buf, "%d\n", 3932160 * 2 / (val > 0 ? val : 1)); +} + +static ssize_t set_fan(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + unsigned long hsb, lsb; + unsigned long tech; + unsigned long val; + int ret; + + ret = kstrtoul(buf, 10, &val); + if (ret) + { + return ret; + } + if (val > 23000) + { + return -EINVAL; + } + + if (val <= 960) + { + hsb = 0xff; /*high bit*/ + lsb = 0xe0; /*low bit*/ + } + else + { + tech = (3932160 * 2) / (val > 0 ? val : 1); + hsb = (uint8_t)(((tech << 3) >> 8) & 0x0ff); + lsb = (uint8_t)((tech << 3) & 0x0f8); + } + + mutex_lock(&data->lock); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_H_RPM(attr->index), hsb); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_L_RPM(attr->index), lsb); + mutex_unlock(&data->lock); + return count; +} + +static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int val; + + mutex_lock(&data->lock); + val = i2c_smbus_read_byte_data(client, + EMC2305_REG_FAN_DRIVE(attr->index)); + mutex_unlock(&data->lock); + return sprintf(buf, "%d\n", val); +} + +static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + unsigned long val; + int ret; + + ret = kstrtoul(buf, 10, &val); + if (ret) + { + return ret; + } + if (val > 255) + { + return -EINVAL; + } + + mutex_lock(&data->lock); + i2c_smbus_write_byte_data(client, + EMC2305_REG_FAN_DRIVE(attr->index), + val); + mutex_unlock(&data->lock); + return count; +} + +static int emc2305_detect(struct i2c_client *client, + struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + int vendor, device; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA)) + { + return -ENODEV; + } + + vendor = i2c_smbus_read_byte_data(client, EMC2305_REG_VENDOR); + if (vendor != EMC2305_VENDOR) + { + return -ENODEV; + } + + device = i2c_smbus_read_byte_data(client, EMC2305_REG_DEVICE); + if (device != EMC2305_DEVICE) + { + return -ENODEV; + } + + strlcpy(info->type, "emc2305", I2C_NAME_SIZE); + + return 0; +} + +static int emc2305_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct emc2305_data *data; + int err; + int i; + + data = devm_kzalloc(&client->dev, sizeof(struct emc2305_data), + GFP_KERNEL); + if (!data) + { + return -ENOMEM; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s chip found\n", client->name); + + data->attrs.attrs = emc2305_attr; + err = sysfs_create_group(&client->dev.kobj, &data->attrs); + if (err) + { + return err; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) + { + err = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + for (i = 0; i < 5; i++) + { + /* set minimum drive to 0% */ + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_MIN_DRIVE(i), FAN_MINIMUN); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_CONF(i), FAN_RPM_BASED); + } + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &data->attrs); + return err; +} + +static int emc2305_remove(struct i2c_client *client) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->attrs); + return 0; +} + +module_i2c_driver(emc2305_driver); + +MODULE_AUTHOR("Neal Tai"); +MODULE_DESCRIPTION("SMSC EMC2305 fan controller driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/changelog b/platform/broadcom/sonic-platform-modules-delta/debian/changelog new file mode 100644 index 00000000000..ec8327e8ae7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/changelog @@ -0,0 +1,5 @@ +sonic-delta-platform-modules (1.1) unstable; urgency=low + + * Initial release + + -- Neal Tai Fri, 21 APR 2017 11:11:11 -0800 diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/compat b/platform/broadcom/sonic-platform-modules-delta/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/control b/platform/broadcom/sonic-platform-modules-delta/debian/control new file mode 100644 index 00000000000..65b01234b4e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/control @@ -0,0 +1,31 @@ +Source: sonic-delta-platform-modules +Section: main +Priority: extra +Maintainer: Neal Tai +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: platform-modules-ag9032v1 +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-ag9064 +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-ag5648 +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-et-6248brb +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-ag9032v2a +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as syseeprom, sfp diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag5648.init b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag5648.init new file mode 100755 index 00000000000..d69534035a5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag5648.init @@ -0,0 +1,49 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup ag5648 board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + depmod -a + rmmod i2c-i801 + rmmod i2c-ismt + modprobe i2c-dev + modprobe i2c-i801 + modprobe i2c-ismt + modprobe i2c-mux-pca954x + modprobe dni_ag5648_psu + modprobe dni_emc2305 + modprobe at24 + modprobe delta_ag5648_platform + + /usr/local/bin/ag5648_platform_init.sh + + echo "done." + ;; + +stop) + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-ag5648.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag5648.install b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag5648.install new file mode 100644 index 00000000000..06d53677016 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag5648.install @@ -0,0 +1,4 @@ +ag5648/scripts/ag5648_platform_init.sh usr/local/bin +ag5648/cfg/ag5648-modules.conf etc/modules-load.d +ag5648/scripts/led_control usr/local/bin +systemd/platform-modules-ag5648.service lib/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9032v1.init b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9032v1.init new file mode 100755 index 00000000000..3734ab362a2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9032v1.init @@ -0,0 +1,49 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup ag9032v1 board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + depmod -a + rmmod i2c-i801 + rmmod i2c-ismt + modprobe i2c-dev + modprobe i2c-i801 + modprobe i2c-ismt + modprobe i2c-mux-pca954x + modprobe dni_ag9032v1_psu + modprobe dni_emc2305 + modprobe at24 + modprobe delta_ag9032v1_platform + modprobe delta_ag9032v1_cpupld + + /usr/local/bin/ag9032v1_platform_init.sh + echo "done." + ;; + +stop) + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-ag9032v1.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9032v2a.init b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9032v2a.init new file mode 100755 index 00000000000..8ff27a87d9c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9032v2a.init @@ -0,0 +1,41 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup ag9032v2a board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + modprobe ipmi_devintf + modprobe ipmi_si ports=0xca2 + modprobe optoe + modprobe delta_ag9032v2a_platform + /usr/local/bin/ag9032v2a_platform_init.sh + + echo "done." + ;; + +stop) + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-ag9032v2a.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9032v2a.install b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9032v2a.install new file mode 100644 index 00000000000..691480c3468 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9032v2a.install @@ -0,0 +1,3 @@ +ag9032v2a/scripts/ag9032v2a_platform_init.sh usr/local/bin +ag9032v2a/cfg/ag9032v2a-modules.conf etc/modules-load.d +systemd/platform-modules-ag9032v2a.service lib/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9064.init b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9064.init new file mode 100755 index 00000000000..74137b8b2dc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9064.init @@ -0,0 +1,64 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup ag9064 board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + if [ `grep -c usemsi /etc/init.d/opennsl-modules` = "0" ]; then + sed -i "s/debug=4 dma_debug=1/debug=4 dma_debug=1 usemsi=1/g" /etc/init.d/opennsl-modules + rmmod linux_knet_cb + rmmod linux_bcm_knet + rmmod linux_user_bde + rmmod linux_kernel_bde + /etc/init.d/opennsl-modules start + modprobe linux_kernel_bde + modprobe linux_user_bde + modprobe linux_bcm_knet + modprobe linux_knet_cb + fi + depmod -a + rmmod i2c-i801 + rmmod i2c-ismt + modprobe i2c-dev + modprobe i2c-i801 + modprobe i2c-ismt + modprobe ipmi_devintf + modprobe ipmi_si ports=0xca2 + modprobe i2c-mei + modprobe i2c-mux-pca954x + modprobe at24 + modprobe delta_ag9064_platform + modprobe delta_ag9064_cpld + modprobe delta_ag9064_swpld + + /usr/local/bin/ag9064_platform_init.sh + + echo "done." + ;; + +stop) + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-ag9064.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9064.install b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9064.install new file mode 100644 index 00000000000..ad7c793da3c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9064.install @@ -0,0 +1,2 @@ +ag9064/cfg/ag9064-modules.conf etc/modules-load.d +systemd/platform-modules-ag9064.service lib/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9064.postinst b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9064.postinst new file mode 100644 index 00000000000..6044de23277 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-ag9064.postinst @@ -0,0 +1,19 @@ +# postinst script for ag9064 + +# Insert kernel module +depmod -a +modprobe i2c-dev +modprobe i2c-i801 +modprobe i2c-ismt +modprobe ipmi_devintf +modprobe ipmi_si ports=0xca2 +modprobe i2c-mei +modprobe i2c-mux-pca954x +modprobe at24 +modprobe optoe +modprobe delta_ag9064_platform +modprobe delta_ag9064_cpld +modprobe delta_ag9064_swpld + +#DEBHELPER# + diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-et-6248brb.init b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-et-6248brb.init new file mode 100755 index 00000000000..64361ced6b6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-et-6248brb.init @@ -0,0 +1,80 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup et-6248brb board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + depmod -a + rmmod i2c-i801 + rmmod i2c-ismt + modprobe i2c-dev + modprobe i2c-i801 + modprobe i2c-ismt + modprobe i2c-mux-pca954x + modprobe i2c-mux-gpio + modprobe dni_gpio + modprobe delta_et-6248brb_platform + + if [ `uname -a | awk '{print $3}'` = "4.9.0-9-2-amd64" ]; then + echo "453" > "/sys/class/gpio/export" + echo "454" > "/sys/class/gpio/export" + echo "455" > "/sys/class/gpio/export" + echo "485" > "/sys/class/gpio/export" + echo "489" > "/sys/class/gpio/export" + echo "494" > "/sys/class/gpio/export" + echo "out" > "/sys/class/gpio/gpio453/direction" + echo "out" > "/sys/class/gpio/gpio454/direction" + echo "out" > "/sys/class/gpio/gpio455/direction" + echo "out" > "/sys/class/gpio/gpio485/direction" + echo "out" > "/sys/class/gpio/gpio489/direction" + echo "out" > "/sys/class/gpio/gpio494/direction" + else + echo "197" > "/sys/class/gpio/export" + echo "198" > "/sys/class/gpio/export" + echo "199" > "/sys/class/gpio/export" + echo "229" > "/sys/class/gpio/export" + echo "233" > "/sys/class/gpio/export" + echo "238" > "/sys/class/gpio/export" + echo "out" > "/sys/class/gpio/gpio197/direction" + echo "out" > "/sys/class/gpio/gpio198/direction" + echo "out" > "/sys/class/gpio/gpio199/direction" + echo "out" > "/sys/class/gpio/gpio229/direction" + echo "out" > "/sys/class/gpio/gpio233/direction" + echo "out" > "/sys/class/gpio/gpio238/direction" + fi + + /usr/local/bin/et-6248brb_platform_init.sh + + sleep 1 + echo "Ethernet48" > "/sys/bus/i2c/devices/4-0050/port_name" + echo "Ethernet49" > "/sys/bus/i2c/devices/5-0050/port_name" + + echo "done." + ;; + +stop) + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-et-6248brb.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-et-6248brb.install b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-et-6248brb.install new file mode 100644 index 00000000000..936c43679d5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/platform-modules-et-6248brb.install @@ -0,0 +1,4 @@ +et-6248brb/scripts/et-6248brb_platform_init.sh usr/local/bin +et-6248brb/cfg/et-6248brb-modules.conf etc/modules-load.d +et-6248brb/scripts/led_status.sh usr/local/bin +systemd/platform-modules-et-6248brb.service lib/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-delta/debian/rules b/platform/broadcom/sonic-platform-modules-delta/debian/rules new file mode 100755 index 00000000000..b8c34c326fd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/debian/rules @@ -0,0 +1,33 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= ag9032v1 ag9064 ag5648 et-6248brb ag9032v2a + +%: + dh $@ --with=systemd + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -pplatform-modules-$${mod} \ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/modules/*.ko \ + debian/platform-modules-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + done) + +override_dh_usrlocal: + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) + diff --git a/platform/broadcom/sonic-platform-modules-delta/et-6248brb/cfg/et-6248brb-modules.conf b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/cfg/et-6248brb-modules.conf new file mode 100644 index 00000000000..552b4103ed0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/cfg/et-6248brb-modules.conf @@ -0,0 +1,13 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus +i2c-mux-gpio +i2c-mux-pca954x diff --git a/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/Makefile b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/Makefile new file mode 100644 index 00000000000..fb5b18ed5b4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := delta_et-6248brb_platform.o dni_gpio.o + diff --git a/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/delta_et-6248brb_platform.c b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/delta_et-6248brb_platform.c new file mode 100644 index 00000000000..72fccd9aa0e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/delta_et-6248brb_platform.c @@ -0,0 +1,918 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#define OPTOE_INFO(data) \ + .type = "optoe2", .addr = 0x50 + +#define et6248brb_i2c_device_num(NUM){ \ + .name = "delta-et6248brb-i2c-device", \ + .id = NUM, \ + .dev = { \ + .platform_data = &et6248brb_i2c_device_platform_data[NUM], \ + .release = device_release, \ + }, \ +} + +#define et6248brb_gpio_num(NUM){ \ + .name = "delta-et6248brb-gpio", \ + .id = NUM, \ + .dev = { \ + .platform_data = &et6248brb_gpio_device_platform_data[NUM], \ + .release = device_release, \ + }, \ +} + +#define PCA9555_A 0x20 +#define PCA9555_B 0x21 +#define PCA9555_C 0x23 + +static struct kobject *kobj_gpio; +static struct kobject *kobj_psu; +static struct kobject *kobj_fan; +static struct kobject *kobj_sfp; +static struct kobject *kobj_others; + +/*Define struct to get client of i2c_new_deivce */ +struct i2c_client * i2c_client_9547; + +enum{ + BUS0 = 0, + BUS1, + BUS2, + BUS3, + BUS4, + BUS5, + BUS6, + BUS7, + BUS8, + BUS9, + BUS10, +}; + +/*---------------- I2C device - start ------------- */ +static void device_release(struct device *dev) +{ + return; +} + +struct i2c_device_platform_data { + int parent; + struct i2c_board_info info; + struct i2c_client *client; +}; +/* pca9547 - add 8 bus */ +static struct pca954x_platform_mode pca954x_mode[] = { + { .adap_id = 2, + .deselect_on_exit = 1, + }, + { .adap_id = 3, + .deselect_on_exit = 1, + }, + { .adap_id = 4, + .deselect_on_exit = 1, + }, + { .adap_id = 5, + .deselect_on_exit = 1, + }, + { .adap_id = 6, + .deselect_on_exit = 1, + }, + { .adap_id = 7, + .deselect_on_exit = 1, + }, + { .adap_id = 8, + .deselect_on_exit = 1, + }, + { .adap_id = 9, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_data pca954x_data = { + .modes = pca954x_mode, + .num_modes = ARRAY_SIZE(pca954x_mode), +}; + +static struct i2c_board_info __initdata i2c_info_pca9547[] = +{ + { + I2C_BOARD_INFO("pca9547", 0x71), + .platform_data = &pca954x_data, + }, +}; + +static struct i2c_device_platform_data et6248brb_i2c_device_platform_data[] = { + { + /* FAN controller (0x2e) */ + .parent = 0, + .info = { I2C_BOARD_INFO("adt7473", 0x2e) }, + .client = NULL, + }, + { + /* tmp75 (0x48) */ + .parent = 0, + .info = { I2C_BOARD_INFO("tmp75", 0x48) }, + .client = NULL, + }, + { + /* EEPROM (0x54) */ + .parent = 1, + .info = { I2C_BOARD_INFO("24c08", 0x54) }, + .client = NULL, + }, + { + /* sfp 1 (0x50) */ + .parent = 4, + .info = { OPTOE_INFO() }, + .client = NULL, + }, + { + /* sfp 2 (0x50) */ + .parent = 5, + .info = { OPTOE_INFO() }, + .client = NULL, + }, + { + /* tmp75 (0x49) */ + .parent = 7, + .info = { I2C_BOARD_INFO("tmp75", 0x49) }, + .client = NULL, + }, + { + /* tmp75 (0x4a) */ + .parent = 8, + .info = { I2C_BOARD_INFO("tmp75", 0x4a) }, + .client = NULL, + }, +}; + +static struct platform_device et6248brb_i2c_device[] = { + et6248brb_i2c_device_num(0), + et6248brb_i2c_device_num(1), + et6248brb_i2c_device_num(2), + et6248brb_i2c_device_num(3), + et6248brb_i2c_device_num(4), + et6248brb_i2c_device_num(5), + et6248brb_i2c_device_num(6), +}; + +/*---------------- I2C device - end ------------- */ +/*---------------- I2C driver - start ------------- */ +static int __init i2c_device_probe(struct platform_device *pdev) +{ + struct i2c_device_platform_data *pdata; + struct i2c_adapter *parent; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -ENODEV; + } + + pdata->client = i2c_new_device(parent, &pdata->info); + if (!pdata->client) { + dev_err(&pdev->dev, "Failed to create i2c client %s at %d\n", + pdata->info.type, pdata->parent); + return -ENODEV; + } + + return 0; +} + +static int __exit i2c_deivce_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent; + struct i2c_device_platform_data *pdata; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + if (pdata->client) { + parent = (pdata->client)->adapter; + i2c_unregister_device(pdata->client); + i2c_put_adapter(parent); + } + + return 0; +} +static struct platform_driver i2c_device_driver = { + .probe = i2c_device_probe, + .remove = __exit_p(i2c_deivce_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-et6248brb-i2c-device", + } +}; +/*---------------- I2C driver - end ------------- */ + +/*---------------- gpio device - start ----------- */ +static struct pca953x_platform_data pca9555_data_0 = { + .gpio_base = 200, +}; +static struct pca953x_platform_data pca9555_data_1 = { + .gpio_base = 216, +}; +static struct pca953x_platform_data pca9555_data_2 = { + .gpio_base = 232, +}; + +static struct i2c_board_info __initdata i2c_info_pca9555[] = +{ + { + I2C_BOARD_INFO("pca9555", 0x20), + .platform_data = &pca9555_data_0, + }, + { + I2C_BOARD_INFO("pca9555", 0x21), + .platform_data = &pca9555_data_1, + }, + { + I2C_BOARD_INFO("pca9555", 0x23), + .platform_data = &pca9555_data_2, + }, +}; + +static struct i2c_device_platform_data et6248brb_gpio_device_platform_data[] = { + { + /* GPIO expander A (0x20) */ + .parent = 0, + .info = { I2C_BOARD_INFO("pca9555", 0x20) }, + .client = NULL, + }, + { + /* GPIO expander B (0x21) */ + .parent = 0, + .info = { I2C_BOARD_INFO("pca9555", 0x21) }, + .client = NULL, + }, + { + /* GPIO expander C (0x23) */ + .parent = 0, + .info = { I2C_BOARD_INFO("pca9555", 0x23) }, + .client = NULL, + }, +}; + +static struct platform_device et6248brb_gpio_device[] = { + et6248brb_gpio_num(0), + et6248brb_gpio_num(1), + et6248brb_gpio_num(2), +}; + +static struct gpio_attribute_data { + uint8_t bus; + uint8_t addr; + uint8_t reg; + uint8_t mask; + char note[150]; +}; + +enum gpio_attributes { + PSU1_SMB_ALERT, + PSU2_SMB_ALERT, + EEPROM_WP, + FAN1_LED_AG, + FAN2_LED_AG, + D_FAN_ALERT, + PSU1_PRES, + PSU2_PRES, + FAN_EEPROM_WP, + D_FAN_M_PRESENT2, + D_FAN_M_PRESENT1, + PSU1_PG, + PSU2_PG, + BCM54282_INT, + SFP_MOD_P1, + SFP_RXLOS_P1, + SFP_MOD_P2, + SFP_RXLOS_P2, + SFP_TX_FAULT_P1, + SFP_TX_FAULT_P2, + SFP_TX_DIS_P1, + SFP_TX_DIS_P2, + OOB_BCM54616S_INT, +}; + +static struct gpio_attribute_data attribute_data[] = { +//PCA9555_A + [PSU1_SMB_ALERT] = { + .bus = BUS0, .addr = PCA9555_A, + .reg = 0x00, .mask = 1 << 0, + .note = "0=PSU1 interrupt is occurr\n1=PSU1 interrupt is NOT occurr" + }, + [PSU2_SMB_ALERT] = { + .bus = BUS0, .addr = PCA9555_A, + .reg = 0x00, .mask = 1 << 3, + .note = "0=PSU2 interrupt is occurr\n1=PSU2 interrupt is NOT occurr" + }, + [EEPROM_WP] = { + .bus = BUS0, .addr = PCA9555_A, + .reg = 0x03, .mask = 1 << 3, + .note = "0=SYS eeprom write protect is disable\n1=SYS eeprom write protect is enable and can not be programmed" + + }, + [FAN1_LED_AG] = { + .bus = BUS0, .addr = PCA9555_A, + .reg = 0x03, .mask = 0x30, + .note = "00=LED off or FAN tray1 is not present\n01=LED Red,FAN tray1 fail\n10=LED Green,FAN tray1 is present\n11=reserved" + }, + [FAN2_LED_AG] = { + .bus = BUS0, .addr = PCA9555_A, + .reg = 0x03, .mask = 0xc0, + .note = "00=LED off or FAN tray1 is not present\n01=LED Red,FAN tray1 fail\n10=LED Green,FAN tray1 is present\n11=reserved" + }, +//PCA9555_B + [D_FAN_ALERT] = { + .bus = BUS0, .addr = PCA9555_B, + .reg = 0x00, .mask = 1 << 0, + .note ="0=FAN is NOT issue the alram\n1=FAN issue the alarm" + + }, + [PSU1_PRES] = { + .bus = BUS0, .addr = PCA9555_B, + .reg = 0x00, .mask = 1 << 2, + .note ="0=PSU1 is present\n1=PSU1 is NOT present" + }, + [PSU2_PRES] = { + .bus = BUS0, .addr = PCA9555_B, + .reg = 0x00, .mask = 1 << 3, + .note ="0=PSU2 is present\n1=PSU2 is NOT present" + }, + [FAN_EEPROM_WP] = { + .bus = BUS0, .addr = PCA9555_B, + .reg = 0x01, .mask = 1 << 1, + .note ="0=FAN eeprom write protect is disable\n1=FAN eeprom write protect is enable and can not be programmed" + }, + [D_FAN_M_PRESENT2] = { + .bus = BUS0, .addr = PCA9555_B, + .reg = 0x01, .mask = 1 << 2, + .note ="0=FAN2 module is present\n1=FAN2 module is NOT present" + }, + [D_FAN_M_PRESENT1] = { + .bus = BUS0, .addr = PCA9555_B, + .reg = 0x01, .mask = 1 << 3, + .note ="0=FAN1 moduel is present\n1=FAN1 module is NOT present" + }, + [PSU1_PG] = { + .bus = BUS0, .addr = PCA9555_B, + .reg = 0x01, .mask = 1 << 4, + .note ="0=PSU1 is FAIL or not present\n1=PSU1 is GOOD" + }, + [PSU2_PG] = { + .bus = BUS0, .addr = PCA9555_B, + .reg = 0x01, .mask = 1 << 5, + .note ="0=PSU2 is FAIL or not present\n1=PSU2 is GOOD" + }, + [BCM54282_INT] = { + .bus = BUS0, .addr = PCA9555_B, + .reg = 0x01, .mask = 1 << 6, + .note ="0=BCM54282 PHY interrupt occurrs\n1=BCM54282 PHY interrupt is not occurrs" + }, +//PCA9555_C + [SFP_MOD_P1] = { + .bus = BUS0, .addr = PCA9555_C, + .reg = 0x00, .mask = 1 << 0, + .note ="0=SFP1 transceiver is present\n1=SFP1 transceiver is NOT present" + }, + [SFP_RXLOS_P1] = { + .bus = BUS0, .addr = PCA9555_C, + .reg = 0x00, .mask = 1 << 1, + .note ="0=SFP1 transceiver is NOT asserted Loss of signal\n1=SFP1 transceiver is asserted Loss of signal" + }, + [SFP_MOD_P2] = { + .bus = BUS0, .addr = PCA9555_C, + .reg = 0x00, .mask = 1 << 2, + .note ="0=SFP1 transceiver is present\n1=SFP1 transceiver is NOT present" + }, + [SFP_RXLOS_P2] = { + .bus = BUS0, .addr = PCA9555_C, + .reg = 0x00, .mask = 1 << 3, + .note ="0=SFP1 transceiver is NOT asserted Loss of signal\n1=SFP1 transceiver is asserted Loss of signal" + }, + [SFP_TX_FAULT_P1] = { + .bus = BUS0, .addr = PCA9555_C, + .reg = 0x00, .mask = 1 << 4, + .note ="0=SFP1 transceiver is NOT asserted TXFAULT signal\n1=SFP1 transceiver is asserted TXFAULT signal" + }, + [SFP_TX_FAULT_P2] = { + .bus = BUS0, .addr = PCA9555_C, + .reg = 0x00, .mask = 1 << 5, + .note ="0=SFP1 transceiver is NOT asserted TXFAULT signal\n1=SFP1 transceiver is asserted TXFAULT signal" + }, + [SFP_TX_DIS_P1] = { + .bus = BUS0, .addr = PCA9555_C, + .reg = 0x02, .mask = 1 << 6, + .note ="0=SFP1 transceiver is turn ON\n1=SFP1 transceiver is turn OFF" + }, + [SFP_TX_DIS_P2] = { + .bus = BUS0, .addr = PCA9555_C, + .reg = 0x02, .mask = 1 << 7, + .note ="0=SFP2 transceiver is turn ON\n1=SFP2 transceiver is turn OFF" + }, + [OOB_BCM54616S_INT] = { + .bus = BUS0, .addr = PCA9555_C, + .reg = 0x01, .mask = 1 << 3, + .note ="0=BCM54616S PHY interrupt occurrs\n1=BCM54616S PHY interrupt is not occurrs" + }, +}; + +unsigned char dni_log2 (unsigned char num){ + unsigned char num_log2 = 0; + while(num > 0){ + num = num >> 1; + num_log2 += 1; + } + return num_log2 -1; +} + +void set_direction(struct i2c_device_platform_data *pdata, unsigned char reg, unsigned char mask){ + + int value; + int read_only; + unsigned char mask_out; + unsigned char set_data; + + read_only = 1; //Configuration:GPI + if (reg > 0x1){ + reg = reg - 0x02; + read_only = 0; //Configuration:GPO + } + + value = i2c_smbus_read_byte_data(pdata->client, reg + 0x06); + mask_out = value & ~(mask); + + if(read_only){ + set_data = mask_out | mask; + } + else{ + set_data = mask_out; + } + + i2c_smbus_write_byte_data(pdata->client, reg + 0x06, set_data); + return; +} + +static ssize_t get_gpio_reg(struct device *dev, struct device_attribute *dev_attr, char *buf) +{ + int ret; + int mask; + int value; + char note[150]; + unsigned char pca9555_num; + unsigned char reg; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct device *i2cdev = kobj_to_dev(kobj_gpio); + struct i2c_device_platform_data *pdata = i2cdev->platform_data; + + switch(attribute_data[attr->index].addr){ + case PCA9555_A: + pca9555_num = 0; + break; + case PCA9555_B: + pca9555_num = 1; + break; + case PCA9555_C: + pca9555_num = 2; + break; + default: + return sprintf(buf, "attribute address error"); + } + + set_direction(&pdata[pca9555_num], attribute_data[attr->index].reg, attribute_data[attr->index].mask); + + switch (attr->index) { + case PSU1_SMB_ALERT ... OOB_BCM54616S_INT: + reg = attribute_data[attr->index].reg; + mask = attribute_data[attr->index].mask; + value = i2c_smbus_read_byte_data(pdata[pca9555_num].client, reg); + sprintf(note, "\n%s\n",attribute_data[attr->index].note); + value = (value & mask); + break; + default: + return sprintf(buf, "%d not found", attr->index); + } + + switch (mask) { + case 0xFF: + return sprintf(buf, "0x%02x%s", value, note); + case 0x0F: + return sprintf(buf, "0x%01x%s", value, note); + case 0xF0: + value = value >> 4; + return sprintf(buf, "0x%01x%s", value, note); + case 0xC0: + value = value >> 6; + return sprintf(buf, "0x%01x%s", value, note); + case 0x30: + value = value >> 4; + return sprintf(buf, "0x%01x%s", value, note); + default : + value = value >> dni_log2(mask); + return sprintf(buf, "%d%s", value, note); + } +} + + +static ssize_t set_gpio_reg(struct device *dev, struct device_attribute *dev_attr, + const char *buf, size_t count) +{ + int err; + int value; + unsigned long set_data; + unsigned char set_reg; + unsigned char mask; + unsigned char mask_out; + unsigned char pca9555_num; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct device *i2cdev = kobj_to_dev(kobj_gpio); + struct i2c_device_platform_data *pdata = i2cdev->platform_data; + + err = kstrtoul(buf, 0, &set_data); + if (err){ + return err; + } + + if (set_data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + return count; + } + + switch(attribute_data[attr->index].addr){ + case PCA9555_A: + pca9555_num = 0; + break; + case PCA9555_B: + pca9555_num = 1; + break; + case PCA9555_C: + pca9555_num = 2; + break; + default: + return sprintf(buf, "attribute address error"); + } + + set_direction(&pdata[pca9555_num], attribute_data[attr->index].reg, attribute_data[attr->index].mask); + + switch (attr->index) { + case PSU1_SMB_ALERT ... OOB_BCM54616S_INT: + set_reg = attribute_data[attr->index].reg; + mask = attribute_data[attr->index].mask; + value = i2c_smbus_read_byte_data(pdata[pca9555_num].client, set_reg); + mask_out = value & ~(mask); + break; + default: + return sprintf(buf, "%d not found", attr->index); + } + + switch (mask) { + case 0xFF: + set_data = mask_out | (set_data & mask); + break; + case 0x0F: + set_data = mask_out | (set_data & mask); + break; + case 0xF0: + set_data = set_data << 4; + set_data = mask_out | (set_data & mask); + break; + case 0xC0: + set_data = set_data << 6; + set_data = mask_out | (set_data & mask); + break; + case 0x30: + set_data = set_data << 4; + set_data = mask_out | (set_data & mask); + break; + default : + set_data = mask_out | (set_data << dni_log2(mask) ); + } + + i2c_smbus_write_byte_data(pdata[pca9555_num].client, set_reg, set_data); + return count; +} +static SENSOR_DEVICE_ATTR(psu1_smb_alert, S_IRUGO, get_gpio_reg, NULL, PSU1_SMB_ALERT); +static SENSOR_DEVICE_ATTR(psu2_smb_alert, S_IRUGO, get_gpio_reg, NULL, PSU2_SMB_ALERT); +static SENSOR_DEVICE_ATTR(eeprom_wp, S_IRUGO | S_IWUSR, get_gpio_reg, set_gpio_reg, EEPROM_WP); +static SENSOR_DEVICE_ATTR(fan1_led_ag, S_IRUGO | S_IWUSR, get_gpio_reg, set_gpio_reg, FAN1_LED_AG); +static SENSOR_DEVICE_ATTR(fan2_led_ag, S_IRUGO | S_IWUSR, get_gpio_reg, set_gpio_reg, FAN2_LED_AG); +static SENSOR_DEVICE_ATTR(d_fan_alert, S_IRUGO, get_gpio_reg, NULL, D_FAN_ALERT); +static SENSOR_DEVICE_ATTR(psu1_pres, S_IRUGO, get_gpio_reg, NULL, PSU1_PRES); +static SENSOR_DEVICE_ATTR(psu2_pres, S_IRUGO, get_gpio_reg, NULL, PSU2_PRES); +static SENSOR_DEVICE_ATTR(fan_eeprom_wp, S_IRUGO | S_IWUSR, get_gpio_reg, set_gpio_reg, FAN_EEPROM_WP); +static SENSOR_DEVICE_ATTR(d_fan_m_present2, S_IRUGO, get_gpio_reg, NULL, D_FAN_M_PRESENT2); +static SENSOR_DEVICE_ATTR(d_fan_m_present1, S_IRUGO, get_gpio_reg, NULL, D_FAN_M_PRESENT1); +static SENSOR_DEVICE_ATTR(psu1_pg, S_IRUGO, get_gpio_reg, NULL, PSU1_PG); +static SENSOR_DEVICE_ATTR(psu2_pg, S_IRUGO, get_gpio_reg, NULL, PSU2_PG); +static SENSOR_DEVICE_ATTR(bcm54282_int, S_IRUGO, get_gpio_reg, NULL, BCM54282_INT); + +static SENSOR_DEVICE_ATTR(sfp_mod_p1, S_IRUGO, get_gpio_reg, NULL, SFP_MOD_P1); +static SENSOR_DEVICE_ATTR(sfp_rxlos_p1, S_IRUGO, get_gpio_reg, NULL, SFP_RXLOS_P1); +static SENSOR_DEVICE_ATTR(sfp_mod_p2, S_IRUGO, get_gpio_reg, NULL, SFP_MOD_P2); +static SENSOR_DEVICE_ATTR(sfp_rxlos_p2, S_IRUGO, get_gpio_reg, NULL, SFP_RXLOS_P2); +static SENSOR_DEVICE_ATTR(sfp_tx_fault_p1, S_IRUGO, get_gpio_reg, NULL, SFP_TX_FAULT_P1); +static SENSOR_DEVICE_ATTR(sfp_tx_fault_p2, S_IRUGO , get_gpio_reg, NULL, SFP_TX_FAULT_P2); +static SENSOR_DEVICE_ATTR(sfp_tx_dis_p1, S_IRUGO | S_IWUSR, get_gpio_reg, set_gpio_reg, SFP_TX_DIS_P1); +static SENSOR_DEVICE_ATTR(sfp_tx_dis_p2, S_IRUGO | S_IWUSR, get_gpio_reg, set_gpio_reg, SFP_TX_DIS_P2); +static SENSOR_DEVICE_ATTR(oob_bcm54616s_int, S_IRUGO, get_gpio_reg, NULL, OOB_BCM54616S_INT); + +static struct attribute *et6248brb_psu_attrs[] = { + &sensor_dev_attr_psu1_smb_alert.dev_attr.attr, + &sensor_dev_attr_psu2_smb_alert.dev_attr.attr, + &sensor_dev_attr_psu1_pres.dev_attr.attr, + &sensor_dev_attr_psu2_pres.dev_attr.attr, + &sensor_dev_attr_psu1_pg.dev_attr.attr, + &sensor_dev_attr_psu2_pg.dev_attr.attr, + NULL, +}; + +static struct attribute *et6248brb_fan_attrs[] = { + &sensor_dev_attr_fan1_led_ag.dev_attr.attr, + &sensor_dev_attr_fan2_led_ag.dev_attr.attr, + &sensor_dev_attr_d_fan_alert.dev_attr.attr, + &sensor_dev_attr_fan_eeprom_wp.dev_attr.attr, + &sensor_dev_attr_d_fan_m_present1.dev_attr.attr, + &sensor_dev_attr_d_fan_m_present2.dev_attr.attr, + NULL, +}; + +static struct attribute *et6248brb_sfp_attrs[] = { + &sensor_dev_attr_sfp_mod_p1.dev_attr.attr, + &sensor_dev_attr_sfp_rxlos_p1.dev_attr.attr, + &sensor_dev_attr_sfp_mod_p2.dev_attr.attr, + &sensor_dev_attr_sfp_rxlos_p2.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault_p1.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault_p2.dev_attr.attr, + &sensor_dev_attr_sfp_tx_dis_p1.dev_attr.attr, + &sensor_dev_attr_sfp_tx_dis_p2.dev_attr.attr, + NULL, +}; + +static struct attribute *et6248brb_others_attrs[] = { + &sensor_dev_attr_eeprom_wp.dev_attr.attr, + &sensor_dev_attr_bcm54282_int.dev_attr.attr, + &sensor_dev_attr_oob_bcm54616s_int.dev_attr.attr, + NULL, +}; + +static struct attribute_group et6248brb_psu_attr_grp = { + .attrs = et6248brb_psu_attrs, +}; + +static struct attribute_group et6248brb_fan_attr_grp = { + .attrs = et6248brb_fan_attrs, + +}; +static struct attribute_group et6248brb_sfp_attr_grp = { + .attrs = et6248brb_sfp_attrs, +}; + +static struct attribute_group et6248brb_others_attr_grp = { + .attrs = et6248brb_others_attrs, +}; +/*---------------- gpio device - end ------------- */ + +/*---------------- gpio driver - start ----------- */ +static int __init gpio_device_probe(struct platform_device *pdev) +{ + struct i2c_device_platform_data *pdata; + struct i2c_adapter *parent; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -ENODEV; + } + + pdata->client = i2c_new_device(parent, &pdata->info); + if (!pdata->client) { + dev_err(&pdev->dev, "Failed to create i2c client %s at %d\n", + pdata->info.type, pdata->parent); + return -ENODEV; + } + + if(pdata->info.addr == PCA9555_A){ + kobj_gpio = &pdev->dev.kobj; + kobj_psu = kobject_create_and_add("PSU", &pdev->dev.kobj); + if (!kobj_psu){ + printk(KERN_WARNING "Fail to create 'PSU' directory"); + goto error; + } + + kobj_fan = kobject_create_and_add("FAN", &pdev->dev.kobj); + if (!kobj_fan){ + printk(KERN_WARNING "Fail to create 'FAN' directory"); + goto error; + } + + kobj_sfp = kobject_create_and_add("SFP", &pdev->dev.kobj); + if (!kobj_sfp){ + printk(KERN_WARNING "Fail to create 'SFP' directory"); + goto error; + } + kobj_others = kobject_create_and_add("Others", &pdev->dev.kobj); + if (!kobj_others){ + printk(KERN_WARNING "Fail to create 'Others' directory"); + goto error; + } + ret = sysfs_create_group(kobj_psu, &et6248brb_psu_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create 'psu' attribute group"); + goto error; + } + ret = sysfs_create_group(kobj_fan, &et6248brb_fan_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create 'fan' attribute group"); + goto error; + } + ret = sysfs_create_group(kobj_sfp, &et6248brb_sfp_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create 'sfp' attribute group"); + goto error; + } + ret = sysfs_create_group(kobj_others, &et6248brb_others_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create 'others' attribute group"); + goto error; + } + } + return 0; + +error: + kobject_put(kobj_gpio); + kobject_put(kobj_psu); + kobject_put(kobj_fan); + kobject_put(kobj_sfp); + kobject_put(kobj_others); + i2c_unregister_device(pdata->client); + i2c_put_adapter(parent); + + return -ENODEV; +} + +static int __exit gpio_deivce_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent; + struct i2c_device_platform_data *pdata; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else if(pdata->info.addr == PCA9555_A){ + sysfs_remove_group(kobj_gpio, &et6248brb_psu_attr_grp); + sysfs_remove_group(kobj_fan, &et6248brb_fan_attr_grp); + sysfs_remove_group(kobj_sfp, &et6248brb_sfp_attr_grp); + sysfs_remove_group(kobj_others, &et6248brb_others_attr_grp); + kobject_put(kobj_gpio); + kobject_put(kobj_fan); + kobject_put(kobj_psu); + kobject_put(kobj_sfp); + kobject_put(kobj_others); + } + + if (pdata->client) { + if (!parent) { + parent = (pdata->client)->adapter; + } + i2c_unregister_device(pdata->client); + } + + i2c_put_adapter(parent); + return 0; +} + +static struct platform_driver gpio_device_driver = { + .probe = gpio_device_probe, + .remove = __exit_p(gpio_deivce_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-et6248brb-gpio", + } +}; +/*---------------- gpio driver - end ------------- */ + +/*---------------- module initialization ------------- */ +static int __init delta_et6248brb_platform_init(void) +{ + struct i2c_adapter *adapter; + + int ret, i = 0, j = 0; + printk("et6248brb_platform module initialization\n"); + + //Use pca9547 in i2c_mux_pca954x.c + adapter = i2c_get_adapter(BUS1); + i2c_client_9547 = i2c_new_device(adapter, &i2c_info_pca9547[0]); + i2c_put_adapter(adapter); + + // register the i2c devices + ret = platform_driver_register(&i2c_device_driver); + if (ret) { + printk(KERN_WARNING "Fail to register i2c device driver\n"); + goto error_i2c_device_driver; + } + + // register the i2c devices + ret = platform_driver_register(&gpio_device_driver); + if (ret) { + printk(KERN_WARNING "Fail to register i2c device driver\n"); + goto error_gpio_device_driver; + } + + for (i = 0; i < ARRAY_SIZE(et6248brb_i2c_device); i++) + { + ret = platform_device_register(&et6248brb_i2c_device[i]); + if (ret) { + printk(KERN_WARNING "Fail to create i2c device %d\n", i); + goto error_et6248brb_i2c_device; + } + } + + for (j = 0; j < ARRAY_SIZE(et6248brb_gpio_device); j++) + { + ret = platform_device_register(&et6248brb_gpio_device[j]); + if (ret) { + printk(KERN_WARNING "Fail to create i2c device %d\n", j); + goto error_et6248brb_gpio_device; + } + } + + return 0; +error_et6248brb_gpio_device: + j--; + for (; j >= 0; j--) { + platform_device_unregister(&et6248brb_gpio_device[j]); + } +error_et6248brb_i2c_device: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&et6248brb_i2c_device[i]); + } + platform_driver_unregister(&gpio_device_driver); +error_gpio_device_driver: + platform_driver_unregister(&i2c_device_driver); +error_i2c_device_driver: + return ret; +} + +static void __exit delta_et6248brb_platform_exit(void) +{ + int i = 0; + + for ( i = 0; i < ARRAY_SIZE(et6248brb_i2c_device); i++ ) { + platform_device_unregister(&et6248brb_i2c_device[i]); + } + + for ( i = 0; i < ARRAY_SIZE(et6248brb_gpio_device); i++ ) { + platform_device_unregister(&et6248brb_gpio_device[i]); + } + platform_driver_unregister(&i2c_device_driver); + platform_driver_unregister(&gpio_device_driver); + i2c_unregister_device(i2c_client_9547); +} + +module_init(delta_et6248brb_platform_init); +module_exit(delta_et6248brb_platform_exit); + +MODULE_DESCRIPTION("DNI et6248brb Platform Support"); +MODULE_AUTHOR("Jacky Liu "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/dni_gpio.c b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/dni_gpio.c new file mode 100644 index 00000000000..127cf6af13a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/modules/dni_gpio.c @@ -0,0 +1,697 @@ +/* + * Intel ICH6-10, Series 5 and 6, Atom C2000 (Avoton/Rangeley) GPIO driver + * + * Copyright (C) 2010 Extreme Engineering Solutions. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) +#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) +#include +#endif // #if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) + +#include +#include +#include +#include +#include + +#define DRV_NAME "gpio_ich" + +/* + * GPIO register offsets in GPIO I/O space. + * Each chunk of 32 GPIOs is manipulated via its own USE_SELx, IO_SELx, and + * LVLx registers. Logic in the read/write functions takes a register and + * an absolute bit number and determines the proper register offset and bit + * number in that register. For example, to read the value of GPIO bit 50 + * the code would access offset ichx_regs[2(=GPIO_LVL)][1(=50/32)], + * bit 18 (50%32). + */ +enum GPIO_REG { + GPIO_USE_SEL = 0, + GPIO_IO_SEL, + GPIO_LVL, + GPO_BLINK +}; + +static const u8 ichx_regs[4][3] = { + {0x00, 0x30, 0x40}, /* USE_SEL[1-3] offsets */ + {0x04, 0x34, 0x44}, /* IO_SEL[1-3] offsets */ + {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */ + {0x18, 0x18, 0x18}, /* BLINK offset */ +}; + +static const u8 ichx_reglen[3] = { + 0x30, 0x10, 0x10, +}; + +static const u8 avoton_regs[4][3] = { + {0x00, 0x80, 0x00}, + {0x04, 0x84, 0x00}, + {0x08, 0x88, 0x00}, +}; + +static const u8 avoton_reglen[3] = { + 0x10, 0x10, 0x00, +}; + +#define ICHX_WRITE(val, reg, base_res) outl(val, (reg) + (base_res)->start) +#define ICHX_READ(reg, base_res) inl((reg) + (base_res)->start) + +struct ichx_desc { + /* Max GPIO pins the chipset can have */ + uint ngpio; + + /* chipset registers */ + const u8 (*regs)[3]; + const u8 *reglen; + + /* GPO_BLINK is available on this chipset */ + bool have_blink; + + /* Whether the chipset has GPIO in GPE0_STS in the PM IO region */ + bool uses_gpe0; + + /* USE_SEL is bogus on some chipsets, eg 3100 */ + u32 use_sel_ignore[3]; + + /* Some chipsets have quirks, let these use their own request/get */ + int (*request)(struct gpio_chip *chip, unsigned offset); + int (*get)(struct gpio_chip *chip, unsigned offset); + + /* + * Some chipsets don't let reading output values on GPIO_LVL register + * this option allows driver caching written output values + */ + bool use_outlvl_cache; +}; + +static struct { + spinlock_t lock; + struct platform_device *dev; + struct gpio_chip chip; + struct resource *gpio_base; /* GPIO IO base */ + struct resource *pm_base; /* Power Mangagment IO base */ + struct ichx_desc *desc; /* Pointer to chipset-specific description */ + u32 orig_gpio_ctrl; /* Orig CTRL value, used to restore on exit */ + u8 use_gpio; /* Which GPIO groups are usable */ + int outlvl_cache[3]; /* cached output values */ +} ichx_priv; + +static int modparam_gpiobase = -1; /* dynamic */ +module_param_named(gpiobase, modparam_gpiobase, int, 0444); +MODULE_PARM_DESC(gpiobase, "The GPIO number base. -1 means dynamic, " + "which is the default."); + +static int ichx_write_bit(int reg, unsigned nr, int val, int verify) +{ + unsigned long flags; + u32 data, tmp; + int reg_nr = nr / 32; + int bit = nr & 0x1f; + int ret = 0; + + spin_lock_irqsave(&ichx_priv.lock, flags); + + if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) + { + data = ichx_priv.outlvl_cache[reg_nr]; + } + else + { + data = ICHX_READ(ichx_priv.desc->regs[reg][reg_nr], + ichx_priv.gpio_base); + } + if (val) + data |= 1 << bit; + else + data &= ~(1 << bit); + + ICHX_WRITE(data, ichx_priv.desc->regs[reg][reg_nr], + ichx_priv.gpio_base); + if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) + ichx_priv.outlvl_cache[reg_nr] = data; + + tmp = ICHX_READ(ichx_priv.desc->regs[reg][reg_nr], + ichx_priv.gpio_base); + if (verify && data != tmp) + ret = -EPERM; + + spin_unlock_irqrestore(&ichx_priv.lock, flags); + + return ret; +} + +static int ichx_read_bit(int reg, unsigned nr) +{ + unsigned long flags; + u32 data; + int reg_nr = nr / 32; + int bit = nr & 0x1f; + + spin_lock_irqsave(&ichx_priv.lock, flags); + + data = ICHX_READ(ichx_priv.desc->regs[reg][reg_nr], + ichx_priv.gpio_base); + + if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) + data = ichx_priv.outlvl_cache[reg_nr] | data; + + spin_unlock_irqrestore(&ichx_priv.lock, flags); + + return data & (1 << bit) ? 1 : 0; +} + +static bool ichx_gpio_check_available(struct gpio_chip *gpio, unsigned nr) +{ + return !!(ichx_priv.use_gpio & (1 << (nr / 32))); +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) +#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) +static int ichx_gpio_get_direction(struct gpio_chip *gpio, unsigned nr) +{ + return ichx_read_bit(GPIO_IO_SEL, nr) ? GPIOF_DIR_IN : GPIOF_DIR_OUT; +} +#endif // #if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) + +static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) +{ + /* + * Try setting pin as an input and verify it worked since many pins + * are output-only. + */ + if (ichx_write_bit(GPIO_IO_SEL, nr, 1, 1)) + return -EINVAL; + + return 0; +} + +static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, + int val) +{ + /* Disable blink hardware which is available for GPIOs from 0 to 31. */ + if (nr < 32 && ichx_priv.desc->have_blink) + ichx_write_bit(GPO_BLINK, nr, 0, 0); + + /* Set GPIO output value. */ + ichx_write_bit(GPIO_LVL, nr, val, 0); + + /* + * Try setting pin as an output and verify it worked since many pins + * are input-only. + */ + if (ichx_write_bit(GPIO_IO_SEL, nr, 0, 1)) + return -EINVAL; + + return 0; +} + +static int ichx_gpio_get(struct gpio_chip *chip, unsigned nr) +{ + return ichx_read_bit(GPIO_LVL, nr); +} + +static int ich6_gpio_get(struct gpio_chip *chip, unsigned nr) +{ + unsigned long flags; + u32 data; + + /* + * GPI 0 - 15 need to be read from the power management registers on + * a ICH6/3100 bridge. + */ + if (nr < 16) { + if (!ichx_priv.pm_base) + return -ENXIO; + + spin_lock_irqsave(&ichx_priv.lock, flags); + + /* GPI 0 - 15 are latched, write 1 to clear*/ + ICHX_WRITE(1 << (16 + nr), 0, ichx_priv.pm_base); + data = ICHX_READ(0, ichx_priv.pm_base); + + spin_unlock_irqrestore(&ichx_priv.lock, flags); + + return (data >> 16) & (1 << nr) ? 1 : 0; + } else { + return ichx_gpio_get(chip, nr); + } +} + +static int ichx_gpio_request(struct gpio_chip *chip, unsigned nr) +{ + if (!ichx_gpio_check_available(chip, nr)) + return -ENXIO; + + /* + * Note we assume the BIOS properly set a bridge's USE value. Some + * chips (eg Intel 3100) have bogus USE values though, so first see if + * the chipset's USE value can be trusted for this specific bit. + * If it can't be trusted, assume that the pin can be used as a GPIO. + */ + if (ichx_priv.desc->use_sel_ignore[nr / 32] & (1 << (nr & 0x1f))) + return 0; + + return ichx_read_bit(GPIO_USE_SEL, nr) ? 0 : -ENODEV; +} + +static int ich6_gpio_request(struct gpio_chip *chip, unsigned nr) +{ + /* + * Fixups for bits 16 and 17 are necessary on the Intel ICH6/3100 + * bridge as they are controlled by USE register bits 0 and 1. See + * "Table 704 GPIO_USE_SEL1 register" in the i3100 datasheet for + * additional info. + */ + if (nr == 16 || nr == 17) + nr -= 16; + + return ichx_gpio_request(chip, nr); +} + +static void ichx_gpio_set(struct gpio_chip *chip, unsigned nr, int val) +{ + ichx_write_bit(GPIO_LVL, nr, val, 0); +} + +static void ichx_gpiolib_setup(struct gpio_chip *chip) +{ + chip->owner = THIS_MODULE; + chip->label = DRV_NAME; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) + chip->dev = &ichx_priv.dev->dev; +#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) + chip->parent = &ichx_priv.dev->dev; + chip->get_direction = ichx_gpio_get_direction; +#endif // #if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) + + /* Allow chip-specific overrides of request()/get() */ + chip->request = ichx_priv.desc->request ? + ichx_priv.desc->request : ichx_gpio_request; + chip->get = ichx_priv.desc->get ? + ichx_priv.desc->get : ichx_gpio_get; + + chip->set = ichx_gpio_set; + chip->direction_input = ichx_gpio_direction_input; + chip->direction_output = ichx_gpio_direction_output; + chip->base = modparam_gpiobase; + chip->ngpio = ichx_priv.desc->ngpio; + chip->can_sleep = false; + chip->dbg_show = NULL; +} + +/* ICH6-based, 631xesb-based */ +static struct ichx_desc ich6_desc = { + /* Bridges using the ICH6 controller need fixups for GPIO 0 - 17 */ + .request = ich6_gpio_request, + .get = ich6_gpio_get, + + /* GPIO 0-15 are read in the GPE0_STS PM register */ + .uses_gpe0 = true, + + .ngpio = 50, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* Intel 3100 */ +static struct ichx_desc i3100_desc = { + /* + * Bits 16,17, 20 of USE_SEL and bit 16 of USE_SEL2 always read 0 on + * the Intel 3100. See "Table 712. GPIO Summary Table" of 3100 + * Datasheet for more info. + */ + .use_sel_ignore = {0x00130000, 0x00010000, 0x0}, + + /* The 3100 needs fixups for GPIO 0 - 17 */ + .request = ich6_gpio_request, + .get = ich6_gpio_get, + + /* GPIO 0-15 are read in the GPE0_STS PM register */ + .uses_gpe0 = true, + + .ngpio = 50, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* ICH7 and ICH8-based */ +static struct ichx_desc ich7_desc = { + .ngpio = 50, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* ICH9-based */ +static struct ichx_desc ich9_desc = { + .ngpio = 61, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* ICH10-based - Consumer/corporate versions have different amount of GPIO */ +static struct ichx_desc ich10_cons_desc = { + .ngpio = 61, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; +static struct ichx_desc ich10_corp_desc = { + .ngpio = 72, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* Intel 5 series, 6 series, 3400 series, and C200 series */ +static struct ichx_desc intel5_desc = { + .ngpio = 76, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* Avoton */ +static struct ichx_desc avoton_desc = { + /* Avoton has only 59 GPIOs, but we assume the first set of register + * (Core) has 32 instead of 31 to keep gpio-ich compliance + */ + .ngpio = 60, + .regs = avoton_regs, + .reglen = avoton_reglen, + .use_outlvl_cache = true, +}; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) +static int ichx_gpio_request_regions(struct resource *res_base, + const char *name, u8 use_gpio) +{ + int i; + + if (!res_base || !res_base->start || !res_base->end) + return -ENODEV; + + for (i = 0; i < ARRAY_SIZE(ichx_priv.desc->regs[0]); i++) { + if (!(use_gpio & (1 << i))) + continue; + if (!request_region( + res_base->start + ichx_priv.desc->regs[0][i], + ichx_priv.desc->reglen[i], name)) + goto request_err; + } + return 0; + +request_err: + /* Clean up: release already requested regions, if any */ + for (i--; i >= 0; i--) { + if (!(use_gpio & (1 << i))) + continue; + release_region(res_base->start + ichx_priv.desc->regs[0][i], + ichx_priv.desc->reglen[i]); + } + return -EBUSY; +} + +static void ichx_gpio_release_regions(struct resource *res_base, u8 use_gpio) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(ichx_priv.desc->regs[0]); i++) { + if (!(use_gpio & (1 << i))) + continue; + release_region(res_base->start + ichx_priv.desc->regs[0][i], + ichx_priv.desc->reglen[i]); + } +} + +static int ichx_gpio_probe(struct platform_device *pdev) +{ + struct resource *res_base, *res_pm; + int err; + struct lpc_ich_info *ich_info = dev_get_platdata(&pdev->dev); + + if (!ich_info) + return -ENODEV; + + ichx_priv.dev = pdev; + + switch (ich_info->gpio_version) { + case ICH_I3100_GPIO: + ichx_priv.desc = &i3100_desc; + break; + case ICH_V5_GPIO: + ichx_priv.desc = &intel5_desc; + break; + case ICH_V6_GPIO: + ichx_priv.desc = &ich6_desc; + break; + case ICH_V7_GPIO: + ichx_priv.desc = &ich7_desc; + break; + case ICH_V9_GPIO: + ichx_priv.desc = &ich9_desc; + break; + case ICH_V10CORP_GPIO: + ichx_priv.desc = &ich10_corp_desc; + break; + case ICH_V10CONS_GPIO: + ichx_priv.desc = &ich10_cons_desc; + break; + case AVOTON_GPIO: + ichx_priv.desc = &avoton_desc; + ichx_priv.outlvl_cache[0] = 0x06; /*core output values*/ + ichx_priv.outlvl_cache[1] = 0x7c0008; /*sus output values*/ + ichx_priv.outlvl_cache[2] = 0x0; /*no used*/ + + break; + default: + return -ENODEV; + } + + spin_lock_init(&ichx_priv.lock); + res_base = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPIO); + ichx_priv.use_gpio = ich_info->use_gpio; + err = ichx_gpio_request_regions(res_base, pdev->name, + ichx_priv.use_gpio); + if (err) + return err; + + ichx_priv.gpio_base = res_base; + + /* + * If necessary, determine the I/O address of ACPI/power management + * registers which are needed to read the the GPE0 register for GPI pins + * 0 - 15 on some chipsets. + */ + if (!ichx_priv.desc->uses_gpe0) + goto init; + + res_pm = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPE0); + if (!res_pm) { + pr_warn("ACPI BAR is unavailable, GPI 0 - 15 unavailable\n"); + goto init; + } + + if (!request_region(res_pm->start, resource_size(res_pm), + pdev->name)) { + pr_warn("ACPI BAR is busy, GPI 0 - 15 unavailable\n"); + goto init; + } + + ichx_priv.pm_base = res_pm; + +init: + ichx_gpiolib_setup(&ichx_priv.chip); + err = gpiochip_add(&ichx_priv.chip); + if (err) { + pr_err("Failed to register GPIOs\n"); + goto add_err; + } + + pr_info("GPIO from %d to %d on %s\n", ichx_priv.chip.base, + ichx_priv.chip.base + ichx_priv.chip.ngpio - 1, DRV_NAME); + + return 0; + +add_err: + ichx_gpio_release_regions(ichx_priv.gpio_base, ichx_priv.use_gpio); + if (ichx_priv.pm_base) + release_region(ichx_priv.pm_base->start, + resource_size(ichx_priv.pm_base)); + return err; +} + +static int ichx_gpio_remove(struct platform_device *pdev) +{ + int err; + + err = gpiochip_remove(&ichx_priv.chip); + if (err) { + dev_err(&pdev->dev, "%s failed, %d\n", + "gpiochip_remove()", err); + return err; + } + + ichx_gpio_release_regions(ichx_priv.gpio_base, ichx_priv.use_gpio); + if (ichx_priv.pm_base) + release_region(ichx_priv.pm_base->start, + resource_size(ichx_priv.pm_base)); + + return 0; +} + +#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) +static int ichx_gpio_request_regions(struct device *dev, + struct resource *res_base, const char *name, u8 use_gpio) +{ + int i; + + if (!res_base || !res_base->start || !res_base->end) + return -ENODEV; + + for (i = 0; i < ARRAY_SIZE(ichx_priv.desc->regs[0]); i++) { + if (!(use_gpio & (1 << i))) + continue; + if (!devm_request_region(dev, + res_base->start + ichx_priv.desc->regs[0][i], + ichx_priv.desc->reglen[i], name)) + return -EBUSY; + } + return 0; +} + +static int ichx_gpio_probe(struct platform_device *pdev) +{ + struct resource *res_base, *res_pm; + int err; + struct lpc_ich_info *ich_info = dev_get_platdata(&pdev->dev); + + if (!ich_info) + return -ENODEV; + + ichx_priv.dev = pdev; + + switch (ich_info->gpio_version) { + case ICH_I3100_GPIO: + ichx_priv.desc = &i3100_desc; + break; + case ICH_V5_GPIO: + ichx_priv.desc = &intel5_desc; + break; + case ICH_V6_GPIO: + ichx_priv.desc = &ich6_desc; + break; + case ICH_V7_GPIO: + ichx_priv.desc = &ich7_desc; + break; + case ICH_V9_GPIO: + ichx_priv.desc = &ich9_desc; + break; + case ICH_V10CORP_GPIO: + ichx_priv.desc = &ich10_corp_desc; + break; + case ICH_V10CONS_GPIO: + ichx_priv.desc = &ich10_cons_desc; + break; + case AVOTON_GPIO: + ichx_priv.desc = &avoton_desc; + ichx_priv.outlvl_cache[0] = 0x06; /*core output values*/ + ichx_priv.outlvl_cache[1] = 0x7c0008; /*sus output values*/ + ichx_priv.outlvl_cache[2] = 0x0; /*no used*/ + break; + default: + return -ENODEV; + } + + spin_lock_init(&ichx_priv.lock); + res_base = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPIO); + ichx_priv.use_gpio = ich_info->use_gpio; + err = ichx_gpio_request_regions(&pdev->dev, res_base, pdev->name, + ichx_priv.use_gpio); + if (err) + return err; + + ichx_priv.gpio_base = res_base; + + /* + * If necessary, determine the I/O address of ACPI/power management + * registers which are needed to read the the GPE0 register for GPI pins + * 0 - 15 on some chipsets. + */ + if (!ichx_priv.desc->uses_gpe0) + goto init; + + res_pm = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPE0); + if (!res_pm) { + pr_warn("ACPI BAR is unavailable, GPI 0 - 15 unavailable\n"); + goto init; + } + + if (!devm_request_region(&pdev->dev, res_pm->start, + resource_size(res_pm), pdev->name)) { + pr_warn("ACPI BAR is busy, GPI 0 - 15 unavailable\n"); + goto init; + } + + ichx_priv.pm_base = res_pm; + +init: + ichx_gpiolib_setup(&ichx_priv.chip); + err = gpiochip_add_data(&ichx_priv.chip, NULL); + if (err) { + pr_err("Failed to register GPIOs\n"); + return err; + } + + pr_info("GPIO from %d to %d on %s\n", ichx_priv.chip.base, + ichx_priv.chip.base + ichx_priv.chip.ngpio - 1, DRV_NAME); + + return 0; +} + +static int ichx_gpio_remove(struct platform_device *pdev) +{ + gpiochip_remove(&ichx_priv.chip); + + return 0; +} +#endif // #if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) + +static struct platform_driver ichx_gpio_driver = { + .driver = { +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) + .owner = THIS_MODULE, +#else // #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,7,0) +#endif // #if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) + .name = DRV_NAME, + }, + .probe = ichx_gpio_probe, + .remove = ichx_gpio_remove, +}; + +module_platform_driver(ichx_gpio_driver); + +MODULE_AUTHOR("Johnson Lu "); +MODULE_DESCRIPTION("GPIO interface for Intel ICH series"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:"DRV_NAME); diff --git a/platform/broadcom/sonic-platform-modules-delta/et-6248brb/scripts/et-6248brb_platform_init.sh b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/scripts/et-6248brb_platform_init.sh new file mode 100755 index 00000000000..3779e4684d8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/scripts/et-6248brb_platform_init.sh @@ -0,0 +1,11 @@ +#!/bin/bash + +#platform init script for Delta et-6248brb + +#fan speed monitol start +/usr/share/sonic/device/x86_64-delta_et-6248brb-r0/fancontrol.service /usr/share/sonic/device/x86_64-delta_et-6248brb-r0/fancontrol & +sh /usr/local/bin/led_status.sh & + + +exit 0 + diff --git a/platform/broadcom/sonic-platform-modules-delta/et-6248brb/scripts/led_status.sh b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/scripts/led_status.sh new file mode 100644 index 00000000000..734a44a6ca9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/et-6248brb/scripts/led_status.sh @@ -0,0 +1,165 @@ +#!/bin/bash + +FAN1_EEPROM="-y 0 0x55 0x0a" +FAN2_EEPROM="-y 0 0x56 0x0a" +FAN1_RPM="/sys/bus/i2c/devices/0-002e/fan1_input" +FAN2_RPM="/sys/bus/i2c/devices/0-002e/fan2_input" +FAN_TRAY1_LED="/sys/devices/platform/delta-et6248brb-gpio.0/FAN/fan1_led_ag" +FAN_TRAY2_LED="/sys/devices/platform/delta-et6248brb-gpio.0/FAN/fan2_led_ag" + +if [ `uname -a | awk '{print $3}'` = "4.9.0-9-2-amd64" ]; then + SYS_LED_G="/sys/class/gpio/gpio453/value" + SYS_LED_R="/sys/class/gpio/gpio454/value" + PWR_LED_G="/sys/class/gpio/gpio455/value" + PWR_LED_R="/sys/class/gpio/gpio489/value" + FAN_LED_G="/sys/class/gpio/gpio485/value" + FAN_LED_R="/sys/class/gpio/gpio494/value" +else + SYS_LED_G="/sys/class/gpio/gpio197/value" + SYS_LED_R="/sys/class/gpio/gpio198/value" + PWR_LED_G="/sys/class/gpio/gpio199/value" + PWR_LED_R="/sys/class/gpio/gpio233/value" + FAN_LED_G="/sys/class/gpio/gpio229/value" + FAN_LED_R="/sys/class/gpio/gpio238/value" +fi + +PSU1_EEPROM="-y 2 0x50 0x00" +PSU2_EEPROM="-y 3 0x51 0x00" +PSU1_PG="/sys/devices/platform/delta-et6248brb-gpio.0/PSU/psu1_pg" +PSU2_PG="/sys/devices/platform/delta-et6248brb-gpio.0/PSU/psu2_pg" + +catfaneeprom(){ + fan_eeprom_num=0 + i2cget $FAN1_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + fan_eeprom_num=$((fan_eeprom_num+1)) + elif [ "`echo $?`" -ne "0" ]; then + fan_eeprom_num=$((fan_eeprom_num)) + fi + + i2cget $FAN2_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + fan_eeprom_num=$((fan_eeprom_num+1)) + elif [ "`echo $?`" -ne "0" ]; then + fan_eeprom_num=$((fan_eeprom_num_num)) + fi +} + +catfanspeed(){ + + fan_rpm_normal_num=0 + fan1_rpm_normal_num=0 + fan1_rpm=`cat $FAN1_RPM` + + if [ "${fan1_rpm}" -ne "960" ] && [ "${fan1_rpm}" -ne "0" ]; then + fan1_rpm_normal_num=$((fan1_rpm_normal_num+1)) + elif [ "${fan1_rpm}" -eq "960" ] || [ "${fan1_rpm}" -eq "0" ]; then + fan1_rpm_normal_num=$((fan1_rpm_normal_num)) + fi + + fan2_rpm_normal_num=0 + fan2_rpm=`cat $FAN2_RPM` + + if [ "${fan2_rpm}" -ne "960" ] && [ "${fan2_rpm}" -ne "0" ]; then + fan2_rpm_normal_num=$((fan2_rpm_normal_num+1)) + elif [ "${fan2_rpm}" -eq "960" ] || [ "${fan2_rpm}" -eq "0" ]; then + fan2_rpm_normal_num=$((fan2_rpm_normal_num)) + fi + + fan_rpm_normal_num=$((fan1_rpm_normal_num+fan2_rpm_normal_num)) +} + +setfanled(){ + if [ "${fan_eeprom_num}" -eq "2" ] && [ "${fan_rpm_normal_num}" -eq "2" ]; then + echo "1" > $FAN_LED_G + echo "0" > $FAN_LED_R + elif [ "${fan_eeprom_num}" -lt "2" ] || [ "${fan_rpm_normal_num}" -lt "2" ]; then + echo "1" > $FAN_LED_R + echo "0" > $FAN_LED_G + fi +} + +setfantrayled(){ + if [ "${fan1_rpm_normal_num}" -eq "1" ]; then + echo "0x02" > $FAN_TRAY1_LED + else + echo "0x01" > $FAN_TRAY1_LED + fi + + if [ "${fan2_rpm_normal_num}" -eq "1" ]; then + echo "0x02" > $FAN_TRAY2_LED + else + echo "0x01" > $FAN_TRAY2_LED + fi +} + +catpsueeprom(){ + psu_eeprom_num=0 + i2cget $PSU1_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + psu_eeprom_num=$((psu_eeprom_num+1)) + elif [ "`echo $?`" -ne "0" ]; then + psu_eeprom_num=$((psu_eeprom_num)) + fi + + i2cget $PSU2_EEPROM > /dev/null 2>&1 + if [ "`echo $?`" -eq "0" ]; then + psu_eeprom_num=$((psu_eeprom_num+1)) + elif [ "`echo $?`" -ne "0" ]; then + psu_eeprom_num=$((psu_eeprom_num)) + fi +} + +catpsupowergood(){ + + psu_normal_num=0 + psu1_normal_num=0 + psu1_good=`cat $PSU1_PG | head -n 1` + + if [ "${psu1_good}" -eq "1" ]; then + psu1_normal_num=$((psu1_normal_num+1)) + elif [ "${psu1_good}" -eq "0" ]; then + psu1_normal_num=$((psu1_normal_num)) + fi + + psu2_normal_num=0 + psu2_good=`cat $PSU2_PG | head -n 1` + + if [ "${psu2_good}" -eq "1" ]; then + psu2_normal_num=$((psu2_normal_num+1)) + elif [ "${psu2_good}" -eq "0" ]; then + psu2_normal_num=$((psu2_normal_num)) + fi + + psu_normal_num=$((psu1_normal_num+psu2_normal_num)) +} + +setpsuled(){ + if [ "${psu_eeprom_num}" -eq "2" ] && [ "${psu_normal_num}" -eq "2" ]; then + echo "1" > $PWR_LED_G + echo "0" > $PWR_LED_R + elif [ "${psu_eeprom_num}" -lt "2" ] || [ "${psu_normal_num}" -lt "2" ]; then + echo "1" > $PWR_LED_R + echo "0" > $PWR_LED_G + fi +} + +platformstatus(){ + echo "1" > $SYS_LED_G + echo "0" > $SYS_LED_R + catfaneeprom + catfanspeed + setfanled + setfantrayled + + catpsueeprom + catpsupowergood + setpsuled +} + +while true +do + platformstatus + sleep 1 +done + diff --git a/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-ag5648.service b/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-ag5648.service new file mode 100644 index 00000000000..7a74c015547 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-ag5648.service @@ -0,0 +1,13 @@ +[Unit] +Description=Delta ag5648 Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-ag5648 start +ExecStop=-/etc/init.d/platform-modules-ag5648 stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-ag9032v1.service b/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-ag9032v1.service new file mode 100644 index 00000000000..bfa0fd296f5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-ag9032v1.service @@ -0,0 +1,13 @@ +[Unit] +Description=Delta ag9032v1 Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-ag9032v1 start +ExecStop=-/etc/init.d/platform-modules-ag9032v1 stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-ag9032v2a.service b/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-ag9032v2a.service new file mode 100644 index 00000000000..0012dbfcbde --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-ag9032v2a.service @@ -0,0 +1,14 @@ +[Unit] +Description=Delta ag9032v2a Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-ag9032v2a start +ExecStop=-/etc/init.d/platform-modules-ag9032v2a stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target + diff --git a/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-ag9064.service b/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-ag9064.service new file mode 100644 index 00000000000..80f6836bfdb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-ag9064.service @@ -0,0 +1,13 @@ +[Unit] +Description=Delta ag9064 Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-ag9064 start +ExecStop=-/etc/init.d/platform-modules-ag9064 stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-et-6248brb.service b/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-et-6248brb.service new file mode 100644 index 00000000000..901bcffaea8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-delta/systemd/platform-modules-et-6248brb.service @@ -0,0 +1,13 @@ +[Unit] +Description=Delta et-6248brb Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-et-6248brb start +ExecStop=-/etc/init.d/platform-modules-et-6248brb stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/.gitignore b/platform/broadcom/sonic-platform-modules-ingrasys/.gitignore new file mode 100644 index 00000000000..7f287d53822 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/.gitignore @@ -0,0 +1,50 @@ +# Object files +*.o +*.ko +*.obj +*.elf + +# Precompiled Headers +*.gch +*.pch + +# Libraries +*.lib +*.a +*.la +*.lo + +# Shared objects (inc. Windows DLLs) +*.dll +*.so +*.so.* +*.dylib + +# Executables +*.exe +*.out +*.app +*.i*86 +*.x86_64 +*.hex + +# Debug files +*.dSYM/ +*.su + +# Kernel Module Compile Results +*.mod* +*.cmd +*.o.d +.tmp_versions/ +modules.order +Module.symvers +Mkfile.old +dkms.conf + +# Debian packaging +*.debhelper.log +*.postinst.debhelper +*.postrm.debhelper +*.prerm.debhelper +*.substvars diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/LICENSE b/platform/broadcom/sonic-platform-modules-ingrasys/LICENSE new file mode 100644 index 00000000000..9cecc1d4669 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/LICENSE @@ -0,0 +1,674 @@ + GNU GENERAL PUBLIC LICENSE + Version 3, 29 June 2007 + + Copyright (C) 2007 Free Software Foundation, Inc. + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The GNU General Public License is a free, copyleft license for +software and other kinds of works. + + The licenses for most software and other practical works are designed +to take away your freedom to share and change the works. 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If not, see . + +Also add information on how to contact you by electronic and paper mail. + + If the program does terminal interaction, make it output a short +notice like this when it starts in an interactive mode: + + {project} Copyright (C) {year} {fullname} + This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, your program's commands +might be different; for a GUI interface, you would use an "about box". + + You should also get your employer (if you work as a programmer) or school, +if any, to sign a "copyright disclaimer" for the program, if necessary. +For more information on this, and how to apply and follow the GNU GPL, see +. + + The GNU General Public License does not permit incorporating your program +into proprietary programs. If your program is a subroutine library, you +may consider it more useful to permit linking proprietary applications with +the library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. But first, please read +. diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/debian/changelog b/platform/broadcom/sonic-platform-modules-ingrasys/debian/changelog new file mode 100644 index 00000000000..338234f97c4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/debian/changelog @@ -0,0 +1,22 @@ +platform-driver (1.1.0) unstable; urgency=low + + * Add support for s9200-64x + + -- developer Fri, 26 May 2017 11:00:00 +0800 + +platform-driver (1.1.0) unstable; urgency=low + + * Add support for s8810-32q + + -- developer Fri, 26 May 2017 11:00:00 +0800 +platform-driver (1.1.0) unstable; urgency=low + + * Add support for s8900 series + + -- developer Wed, 29 Mar 2017 11:00:00 +0800 + +platform-driver (1.0.0) unstable; urgency=low + + * Initial release (Closes: #nnnn) + + -- developer Wed, 05 Oct 2016 16:30:45 +0800 diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/debian/compat b/platform/broadcom/sonic-platform-modules-ingrasys/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/debian/control b/platform/broadcom/sonic-platform-modules-ingrasys/debian/control new file mode 100644 index 00000000000..99c87f772ed --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/debian/control @@ -0,0 +1,26 @@ +Source: platform-driver +Section: unknown +Priority: optional +Maintainer: Wade He +Build-Depends: debhelper (>= 9), dh-systemd +Standards-Version: 1.0.0 + +Package: sonic-platform-ingrasys-s9100 +Architecture: amd64 +Description: This package contains S9100 platform driver utility for SONiC project. + +Package: sonic-platform-ingrasys-s8900-64xc +Architecture: amd64 +Description: This package contains S8900-64XC platform driver utility for SONiC project. + +Package: sonic-platform-ingrasys-s8900-54xc +Architecture: amd64 +Description: This package contains S8900-54XC platform driver utility for SONiC project. + +Package: sonic-platform-ingrasys-s8810-32q +Architecture: amd64 +Description: This package contains S8810-32Q platform driver utility for SONiC project. + +Package: sonic-platform-ingrasys-s9200-64x +Architecture: amd64 +Description: This package contains S9200-64X platform driver utility for SONiC project. diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/debian/rules b/platform/broadcom/sonic-platform-modules-ingrasys/debian/rules new file mode 100755 index 00000000000..759d26c5c4d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/debian/rules @@ -0,0 +1,42 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +PACKAGE_PRE_NAME := sonic-platform-ingrasys +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= s9100 s8900-64xc s8900-54xc s8810-32q s9200-64x +MODULE_DIR := modules +UTILS_DIR := utils +SERVICE_DIR := service +CONF_DIR := conf + +%: + dh $@ --with systemd + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} \ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko \ + debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} usr/sbin; \ + cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/*.sh \ + debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/sbin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} lib/systemd/system; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service \ + debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system; \ + done) + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s8810-32q.init b/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s8810-32q.init new file mode 100644 index 00000000000..19f51c0a966 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s8810-32q.init @@ -0,0 +1,41 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup S8810-32Q board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + + echo "done." + ;; + +stop) + + i2c_utils.sh i2c_deinit + + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/sonic-platform-ingrasys-s8810-32q.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s8900-54xc.init b/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s8900-54xc.init new file mode 100644 index 00000000000..f2e4932b329 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s8900-54xc.init @@ -0,0 +1,41 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup S8900-54XC board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + + echo "done." + ;; + +stop) + + i2c_utils.sh i2c_deinit + + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/sonic-platform-ingrasys-s8900-54xc.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s8900-64xc.init b/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s8900-64xc.init new file mode 100644 index 00000000000..2790ca3517c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s8900-64xc.init @@ -0,0 +1,41 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup S8900-64XC board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + + echo "done." + ;; + +stop) + + i2c_utils.sh i2c_deinit + + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/sonic-platform-ingrasys-s8900-64xc.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9100.init b/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9100.init new file mode 100644 index 00000000000..01770870878 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9100.init @@ -0,0 +1,41 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup S9100 board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + + echo "done." + ;; + +stop) + + i2c_utils.sh i2c_deinit + + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/sonic-platform-ingrasys-s9100.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9200-64x.init b/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9200-64x.init new file mode 100644 index 00000000000..076838e1aa0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9200-64x.init @@ -0,0 +1,41 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup S9200-64X board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + + echo "done." + ;; + +stop) + + i2c_utils.sh i2c_deinit + + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/sonic-platform-ingrasys-s9200-64x.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/README.md b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/README.md new file mode 100644 index 00000000000..dec38cb3339 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/README.md @@ -0,0 +1,185 @@ +# Ingrasys S8810-32Q Platform Driver for SONiC + +Copyright (C) 2016 Ingrasys, Inc. + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + + +## Licensing terms + +The Licensing terms of the files within this project is split 2 parts. +The Linux kernel is released under the GNU General Public License version 2. +All other code is released under the GNU General Public License version 3. +Please see the LICENSE file for copies of both licenses. + +## Contents of this package + + - service/ + > Service config files for platform initialization and monitoring + - utils/ + > Scripts useful during platform bringup and sysfs function + - conf/ + > Platform configure files. + +## Kernel modules and drivers + +The driver for interacting with Ingrasys S8810-32Q is contained in the I2C +kernel module and initialization script. The initialization script loads +the modules in the correct order. It has been built and tested against +the Linux 3.16 kernel. + +The initialization script will modprobe the needed modules, navigate to the +module's device directory in sysfs, and write configuration data to +the kernel module. + +### IGB + +This is OOB Ports on front panel for management plane. + +The IGB module must be loaded first on Ingrasys S8810-32Q platform. + +### I2C i801 + +The I2C i801 on Ingrasys S8810-32Q can be found in +`/sys/bus/i2c/devices/i2c-0/` + +This is I2C bus for Clock Gen, DIMM channel and digital potentiometers. + +The i801 module must be loaded second on Ingrasys S8810-32Q. + +### I2C iSMT + +The I2C iSMT module on S8810-32Q can be found in +`/sys/bus/i2c/devices/i2c-1/` + +This is I2C bus for CPLD, HWM, power controller and I2C Switches. + +The i801 module must be loaded third on Ingrasys S8810-32Q. + +### I2C PCA9548 +The PCA9548 module on S8810-32Q can be found in +`/sys/bus/i2c/devices/i2c-2/` , `/sys/bus/i2c/devices/i2c-3/`, +`/sys/bus/i2c/devices/i2c-4/`, `/sys/bus/i2c/devices/i2c-5/`, +`/sys/bus/i2c/devices/i2c-6/`, `/sys/bus/i2c/devices/i2c-7/`, +`/sys/bus/i2c/devices/i2c-8/`, `/sys/bus/i2c/devices/i2c-9/`. + +The pca9548 module for zQSFP module get/set functions, PSU information, +fan status and EEPROM. + +## Hardware components + +The hardware components are initialized in the init script on S8810-32Q. +The following describes manual initialization as well as interaction. +The examples below are just for Ingrasys S8810-32Q platform. + +### Hardware initialization + +When the sonic-platform-ingrasys-s8810-32q package is installed on the S8810-32Q, +it is automatically initialized. If you want to manual initialization, the +utility command usage as follows: +``` + i2c_utils.sh i2c_init +``` + +### EEPROM + +The EEPROM is including the board SKU, model name, vendor name, serial number, +and other information can be accessed with the specific eeprom kernel module. +After using `modprobe eeprom_mb` to detect the eeprom, it will show up in sysfs. + +The hexdump utility can be used to decode the raw output of the EEPROM. +For example, +``` + bash# echo "mb_eeprom 0x54" > /sys/bus/i2c/devices/i2c-9/new_device + bash# cat /sys/bus/i2c/drivers/mb_eeprom/9-0054/eeprom | hexdump -C +``` + +### Front panel LEDs + +LEDs can be setup on/off by using i2c utility `/usr/sbin/i2c_utils.sh`. +Utility function command usage as follows: + +``` +Status LED: + i2c_utils.sh i2c_sys_led green|amber on|off + +Fan status LED: + i2c_utils.sh i2c_fan_led green|amber on|off + +PSU1 status LED: + i2c_utils.sh i2c_psu1_led green|amber on|off + +PSU2 status LED: + i2c_utils.sh i2c_psu2_led green|amber on|off + +``` +QSFP Module Port LEDs control by ASIC library. + + +### Fan speed + +Fan speed are controlled by the w83795 kernel module. +It can be found in `/sys/class/hwmon/hwmon1/device/`. +If they were compiled as modules, you will need to modprobe w83795 for +their sysfs entries to show up. Each fan has an `fan_input` file +for reading the fan speed. And `pwm1` setting fan1 to fan4, +`pwm2` setting fan5 to fan8. + +There is docker-platform-monitor container installed fancontrol package that can +automatic control platform fan speed. + + +### Temperature sensors + +Temperature sensors are controlled by the w83795 kernel +module. It can be found in `/sys/class/hwmon/hwmon1/device/`. +If they were compiled as modules, then you will need to modprobe w83795 for +their sysfs entries to show up. +`temp1_input` is front MAC temperature sensor. `temp2_input` is rear MAC +temperature sensor. + +There is docker-platform-monitor container installed lm-sensors package that can +monitor platform temperature. And `sensors` command can show each +temperature sensors status. + +### Power supplies + +Power supplies status and its EEPROM info can be used i2c utility +`/usr/sbin/i2c_utils.sh` to get. +The usage as follows: +``` +PSU EEPROM: + i2c_utils.sh i2c_psu_eeprom_get + hexdump -C psu0.rom + hexdump -C psu1.rom + +PSU Status: + i2c_utils.sh i2c_psu_status +``` + +### QSFPs +QSFP modules are managed by the pca9548 kernel driver. +The i2c utility `/usr/sbin/i2c_utils.sh` can be used to get status and +module EEPROM informations. +The usage as follows: +``` +QSFP EEPROM: + i2c_utils.sh i2c_qsfp_eeprom_get [1-32] + +QSFP Insert Event: + i2c_utils.sh i2c_qsfp_eeprom_get [1-32] + 0 => not insert + 1 => inserted +``` + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/modules/Makefile b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/modules/Makefile new file mode 100755 index 00000000000..7c782163f40 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := eeprom_mb.o +obj-m += ingrasys_s8810_32q_psu.o diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/modules/eeprom_mb.c b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/modules/eeprom_mb.c new file mode 100755 index 00000000000..2040e3cfc5d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/modules/eeprom_mb.c @@ -0,0 +1,212 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57, I2C_CLIENT_END }; + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void mb_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t mb_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + mb_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute mb_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = mb_eeprom_read, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int mb_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x50. So decline + attaching to addresses >= 0x51 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int mb_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &mb_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int mb_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &mb_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id mb_eeprom_id[] = { + { "mb_eeprom", 0 }, + { } +}; + +static struct i2c_driver mb_eeprom_driver = { + .driver = { + .name = "mb_eeprom", + }, + .probe = mb_eeprom_probe, + .remove = mb_eeprom_remove, + .id_table = mb_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = mb_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(mb_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("Ingrasys S8810-32Q Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/modules/ingrasys_s8810_32q_platform.h b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/modules/ingrasys_s8810_32q_platform.h new file mode 100644 index 00000000000..a88755946e9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/modules/ingrasys_s8810_32q_platform.h @@ -0,0 +1,148 @@ +#ifndef _S8810_32Q_PLATFORM_H +#define _S8810_32Q_PLATFORM_H + +#include + +// remove debug before release +#define DEBUG + +enum bus_order { + I2C_BUS_MAIN, + MUX_9548_0_CH0, + MUX_9548_0_CH1, + MUX_9548_0_CH2, + MUX_9548_0_CH3, + MUX_9548_0_CH4, + MUX_9548_0_CH5, + MUX_9548_0_CH6, + MUX_9548_0_CH7, + MUX_9548_1_CH0, + MUX_9548_1_CH1, + MUX_9548_1_CH2, + MUX_9548_1_CH3, + MUX_9548_1_CH4, + MUX_9548_1_CH5, + MUX_9548_1_CH6, + MUX_9548_1_CH7, + MUX_9546_0_CH0, + MUX_9546_0_CH1, + MUX_9546_0_CH2, + MUX_9546_0_CH3, + MUX_9546_1_CH0, + MUX_9546_1_CH1, + MUX_9546_1_CH2, + MUX_9546_1_CH3, + MUX_9548_2_CH0, + MUX_9548_2_CH1, + MUX_9548_2_CH2, + MUX_9548_2_CH3, + MUX_9548_2_CH4, + MUX_9548_2_CH5, + MUX_9548_2_CH6, + MUX_9548_2_CH7, + MUX_9548_3_CH0, + MUX_9548_3_CH1, + MUX_9548_3_CH2, + MUX_9548_3_CH3, + MUX_9548_3_CH4, + MUX_9548_3_CH5, + MUX_9548_3_CH6, + MUX_9548_3_CH7, + MUX_9548_4_CH0, + MUX_9548_4_CH1, + MUX_9548_4_CH2, + MUX_9548_4_CH3, + MUX_9548_4_CH4, + MUX_9548_4_CH5, + MUX_9548_4_CH6, + MUX_9548_4_CH7, + MUX_9548_5_CH0, + MUX_9548_5_CH1, + MUX_9548_5_CH2, + MUX_9548_5_CH3, + MUX_9548_5_CH4, + MUX_9548_5_CH5, + MUX_9548_5_CH6, + MUX_9548_5_CH7, + MUX_9548_6_CH0, + MUX_9548_6_CH1, + MUX_9548_6_CH2, + MUX_9548_6_CH3, + MUX_9548_6_CH4, + MUX_9548_6_CH5, + MUX_9548_6_CH6, + MUX_9548_6_CH7, + MUX_9548_7_CH0, + MUX_9548_7_CH1, + MUX_9548_7_CH2, + MUX_9548_7_CH3, + MUX_9548_7_CH4, + MUX_9548_7_CH5, + MUX_9548_7_CH6, + MUX_9548_7_CH7, + MUX_9548_8_CH0, + MUX_9548_8_CH1, + MUX_9548_8_CH2, + MUX_9548_8_CH3, + MUX_9548_8_CH4, + MUX_9548_8_CH5, + MUX_9548_8_CH6, + MUX_9548_8_CH7, + MUX_9548_9_CH0, + MUX_9548_9_CH1, + MUX_9548_9_CH2, + MUX_9548_9_CH3, + MUX_9548_9_CH4, + MUX_9548_9_CH5, + MUX_9548_9_CH6, + MUX_9548_9_CH7, + MUX_9548_10_CH0, + MUX_9548_10_CH1, + MUX_9548_10_CH2, + MUX_9548_10_CH3, + MUX_9548_10_CH4, + MUX_9548_10_CH5, + MUX_9548_10_CH6, + MUX_9548_10_CH7, +}; + +#define I2C_ADDR_MUX_9555_0 (0x20) +#define I2C_ADDR_MUX_9555_1 (0x24) +#define I2C_ADDR_MUX_9555_2 (0x25) +#define I2C_ADDR_MUX_9555_3 (0x26) +#define I2C_ADDR_MUX_9539_0 (0x76) +#define I2C_ADDR_MUX_9539_1 (0x76) +#define I2C_BUS_FAN_STATUS (I2C_BUS_MAIN) +#define I2C_BUS_SYS_LED (MUX_9548_1_CH1) + +#define NUM_OF_I2C_MUX (11) +#define NUM_OF_CPLD (5) +#define NUM_OF_QSFP_PORT (64) +#define NUM_OF_SFP_PORT (2) +#define QSFP_EEPROM_I2C_ADDR (0x50) + +enum gpio_reg { + REG_PORT0_IN, + REG_PORT1_IN, + REG_PORT0_OUT, + REG_PORT1_OUT, + REG_PORT0_POL, + REG_PORT1_POL, + REG_PORT0_DIR, + REG_PORT1_DIR, +}; + +struct ing_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +struct i2c_init_data { + __u16 ch; + __u16 addr; + __u8 reg; + __u8 value; +}; + +#endif diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/modules/ingrasys_s8810_32q_psu.c b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/modules/ingrasys_s8810_32q_psu.c new file mode 100644 index 00000000000..ae34c8eb33e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/modules/ingrasys_s8810_32q_psu.c @@ -0,0 +1,393 @@ +/* + * S8810-32Q PSU driver + * + * Copyright (C) 2017 Ingrasys, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "ingrasys_s8810_32q_platform.h" + +static ssize_t show_psu_eeprom(struct device *dev, + struct device_attribute *da, + char *buf); +static struct s8810_psu_data *s8810_psu_update_status(struct device *dev); +static struct s8810_psu_data *s8810_psu_update_eeprom(struct device *dev); +static int s8810_psu_read_block(struct i2c_client *client, + u8 command, + u8 *data, + int data_len); + + +#define DRIVER_NAME "psu" + +// Addresses scanned +static const unsigned short normal_i2c[] = { 0x51, I2C_CLIENT_END }; + +/* PSU EEPROM SIZE */ +#define EEPROM_SZ 256 +#define READ_EEPROM 1 +#define NREAD_EEPROM 0 + +static struct i2c_client cpld_client; + +/* CPLD Registers */ +#define REG_PSU_PG 0x02 +#define REG_PSU_PRSNT 0x03 + +/* CPLD Pins */ +#define PSU1_PRSNT_L 0 +#define PSU2_PRSNT_L 1 +#define PSU1_PWROK 3 +#define PSU2_PWROK 4 + + +/* Driver Private Data */ +struct s8810_psu_data { + struct mutex lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + char eeprom[EEPROM_SZ]; /* psu eeprom data */ + char psuABS; /* PSU absent */ + char psuPG; /* PSU power good */ +}; + +enum psu_index +{ + s8810_psu1, + s8810_psu2 +}; + +/* + * display power good attribute + */ +static ssize_t +show_psu_pg(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct s8810_psu_data *data = s8810_psu_update_status(dev); + unsigned int value; + + mutex_lock(&data->lock); + value = data->psuPG; + mutex_unlock(&data->lock); + + return sprintf(buf, "%d\n", value); +} + +/* + * display power absent attribute + */ +static ssize_t +show_psu_abs(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct s8810_psu_data *data = s8810_psu_update_status(dev); + unsigned int value; + + mutex_lock(&data->lock); + value = data->psuABS; + mutex_unlock(&data->lock); + + return sprintf(buf, "%d\n", value); +} + + +/* + * sysfs attributes for psu + */ +static DEVICE_ATTR(psu_pg, S_IRUGO, show_psu_pg, NULL); +static DEVICE_ATTR(psu_abs, S_IRUGO, show_psu_abs, NULL); +static DEVICE_ATTR(psu_eeprom, S_IRUGO, show_psu_eeprom, NULL); + +static struct attribute *s8810_psu_attributes[] = { + &dev_attr_psu_pg.attr, + &dev_attr_psu_abs.attr, + &dev_attr_psu_eeprom.attr, + NULL +}; + +/* + * display psu eeprom content + */ +static ssize_t +show_psu_eeprom(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct s8810_psu_data *data = s8810_psu_update_eeprom(dev); + + memcpy(buf, (char *)data->eeprom, EEPROM_SZ); + return EEPROM_SZ; +} + +static const struct attribute_group s8810_psu_group = { + .attrs = s8810_psu_attributes, +}; + +/* + * check gpio expander is accessible + */ +static int +cpld_detect(struct i2c_client *client) +{ + if (i2c_smbus_read_byte_data(client, REG_PSU_PG) < 0) { + return -ENODEV; + } + + return 0; +} + +/* + * client address init + */ +static void +i2c_devices_client_address_init(struct i2c_client *client) +{ + cpld_client = *client; + cpld_client.addr = 0x33; +} + +static int +s8810_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct s8810_psu_data *data; + int status, err; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct s8810_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + memset(data, 0, sizeof(struct s8810_psu_data)); + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->lock); + + i2c_devices_client_address_init(client); + + err = cpld_detect(&cpld_client); + if (err) { + dev_info(&client->dev, "cpld detect failure\n"); + return err; + } + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &s8810_psu_group); + if (status) { + goto exit_free; + } + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &s8810_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int +s8810_psu_remove(struct i2c_client *client) +{ + struct s8810_psu_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &s8810_psu_group); + kfree(data); + + return 0; +} + + +/* + * psu eeprom read utility + */ +static int +s8810_psu_read_block(struct i2c_client *client, + u8 command, + u8 *data, + int data_len) +{ + int i=0, ret=0; + int blk_max = 32; //max block read size + + /* read eeprom, 32 * 8 = 256 bytes */ + for (i=0; i < EEPROM_SZ/blk_max; i++) { + ret = i2c_smbus_read_i2c_block_data(client, (i*blk_max), blk_max, + data + (i*blk_max)); + if (ret < 0) { + return ret; + } + } + return ret; +} + +/* + * update eeprom content + */ +static struct s8810_psu_data +*s8810_psu_update_eeprom(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct s8810_psu_data *data = i2c_get_clientdata(client); + s32 status = 0; + char psu_pg = 0; + char psu_prsnt = 0; + int psu_pwrok = 0; + int psu_prsnt_l = 0; + + mutex_lock(&data->lock); + + if (time_after(jiffies, data->last_updated + 300 * HZ) + || !data->valid) { + + /* Read psu status */ + + psu_pg = i2c_smbus_read_byte_data(&(cpld_client), REG_PSU_PG); + psu_prsnt = i2c_smbus_read_byte_data(&(cpld_client), REG_PSU_PRSNT); + + /*read psu status from io expander*/ + + if (data->index == s8810_psu1) { + psu_pwrok = PSU1_PWROK; + psu_prsnt_l = PSU1_PRSNT_L; + } else { + psu_pwrok = PSU2_PWROK; + psu_prsnt_l = PSU2_PRSNT_L; + } + data->psuPG = (psu_pg >> psu_pwrok) & 0x1; + data->psuABS = (psu_prsnt >> psu_prsnt_l) & 0x1; + + /* Read eeprom */ + if (!data->psuABS) { + //clear local eeprom data + memset(data->eeprom, 0, EEPROM_SZ); + + //read eeprom + status = s8810_psu_read_block(client, 0, data->eeprom, + ARRAY_SIZE(data->eeprom)); + + if (status < 0) { + memset(data->eeprom, 0, EEPROM_SZ); + dev_err(&client->dev, "Read eeprom failed, status=(%d)\n", status); + } else { + data->valid = 1; + } + } else { + memset(data->eeprom, 0, EEPROM_SZ); + } + data->last_updated = jiffies; + } + + mutex_unlock(&data->lock); + + return data; +} + +/* + * update psu status + */ +static struct s8810_psu_data +*s8810_psu_update_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct s8810_psu_data *data = i2c_get_clientdata(client); + char psu_pg = 0; + char psu_prsnt = 0; + int psu_pwrok = 0; + int psu_prsnt_l = 0; + + mutex_lock(&data->lock); + + /* Read psu status */ + + psu_pg = i2c_smbus_read_byte_data(&(cpld_client), REG_PSU_PG); + psu_prsnt = i2c_smbus_read_byte_data(&(cpld_client), REG_PSU_PRSNT); + + /*read psu status from io expander*/ + + if (data->index == s8810_psu1) { + psu_pwrok = PSU1_PWROK; + psu_prsnt_l = PSU1_PRSNT_L; + } else { + psu_pwrok = PSU2_PWROK; + psu_prsnt_l = PSU2_PRSNT_L; + } + data->psuPG = (psu_pg >> psu_pwrok) & 0x1; + data->psuABS = (psu_prsnt >> psu_prsnt_l) & 0x1; + + mutex_unlock(&data->lock); + + return data; +} + +static const struct i2c_device_id s8810_psu_id[] = { + { "psu1", s8810_psu1 }, + { "psu2", s8810_psu2 }, + {} +}; + +MODULE_DEVICE_TABLE(i2c, s8810_psu_id); + +static struct i2c_driver s8810_psu_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = s8810_psu_probe, + .remove = s8810_psu_remove, + .id_table = s8810_psu_id, + .address_list = normal_i2c, +}; + +static int __init s8810_psu_init(void) +{ + return i2c_add_driver(&s8810_psu_driver); +} + +static void __exit s8810_psu_exit(void) +{ + i2c_del_driver(&s8810_psu_driver); +} + +module_init(s8810_psu_init); +module_exit(s8810_psu_exit); + +MODULE_AUTHOR("Jason Tsai "); +MODULE_DESCRIPTION("S8810-32Q psu driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/service/qsfp-monitor.service b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/service/qsfp-monitor.service new file mode 100644 index 00000000000..3d69fdae0f8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/service/qsfp-monitor.service @@ -0,0 +1,15 @@ +[Unit] +Description= This QSFP Monitor service is to setup QSFP SI. +Requires=s8810-32q-monitor.service +After=s8810-32q-monitor.service + +[Service] +ExecStart=/usr/sbin/qsfp_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/service/s8810-32q-monitor.service b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/service/s8810-32q-monitor.service new file mode 100644 index 00000000000..644efe44325 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/service/s8810-32q-monitor.service @@ -0,0 +1,19 @@ +[Unit] +Description= This Platform Monitor service is to initialize platform and monitor platform. +Before=platform-monitor.service +After=sysinit.target +Wants=fancontrol.service +Wants=qsfp-monitor.service +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/sbin/i2c_utils.sh i2c_init +ExecStart=/usr/sbin/s8810_32q_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/utils/i2c_utils.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/utils/i2c_utils.sh new file mode 100644 index 00000000000..416e631423a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/utils/i2c_utils.sh @@ -0,0 +1,1489 @@ +#!/bin/bash + +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# trun on for more debug output +#DEBUG="on" + +VERSION="1.1.0" +TRUE=200 +FALSE=404 + +EXEC_FUNC=${1} +COLOR_LED=${2} +QSFP_PORT=${2} +QSFP_ACTION=${2} +MB_EEPROM_ACTION=${2} +ONOFF_LED=${3} +FAN_TRAY=${4} + +############################################################ +# Distributor ID: Debian +# Description: Debian GNU/Linux 8.6 (jessie) +# Release: 8.6 +# Codename: jessie +# Linux debian 3.16.0-4-amd64 #1 +# SMP Debian 3.16.36-1+deb8u1 (2016-09-03) x86_64 GNU/Linux +############################################################ + +# Color Definition +COLOR_TITLE="\e[1;32m" ### Green ### +COLOR_WARNING="\e[1;33m" ### Yellow ### +COLOR_ERROR="\e[1;31m" ### Red ### +COLOR_END="\e[0m" ### END ### + +NUM_I801_DEVICE=0 +NUM_ISMT_DEVICE=$(( ${NUM_I801_DEVICE} + 1 )) + +#MUX PCA9548#0 +NUM_MUX_9548_0_CHAN0=$(( ${NUM_I801_DEVICE} + 2 )) +NUM_MUX_9548_0_CHAN1=$(( ${NUM_I801_DEVICE} + 3 )) +NUM_MUX_9548_0_CHAN2=$(( ${NUM_I801_DEVICE} + 4 )) +#NUM_MUX_9548_0_CHAN3=$(( ${NUM_I801_DEVICE} + 5 )) +#NUM_MUX_9548_0_CHAN4=$(( ${NUM_I801_DEVICE} + 6 )) +#NUM_MUX_9548_0_CHAN5=$(( ${NUM_I801_DEVICE} + 7 )) +#NUM_MUX_9548_0_CHAN6=$(( ${NUM_I801_DEVICE} + 8 )) +#NUM_MUX_9548_0_CHAN7=$(( ${NUM_I801_DEVICE} + 9 )) + +#MUX PCA9548#1 +NUM_MUX_9548_1_CHAN0=$(( ${NUM_I801_DEVICE} + 10 )) +NUM_MUX_9548_1_CHAN1=$(( ${NUM_I801_DEVICE} + 11 )) +NUM_MUX_9548_1_CHAN2=$(( ${NUM_I801_DEVICE} + 12 )) +NUM_MUX_9548_1_CHAN3=$(( ${NUM_I801_DEVICE} + 13 )) +NUM_MUX_9548_1_CHAN4=$(( ${NUM_I801_DEVICE} + 14 )) +NUM_MUX_9548_1_CHAN5=$(( ${NUM_I801_DEVICE} + 15 )) +NUM_MUX_9548_1_CHAN6=$(( ${NUM_I801_DEVICE} + 16 )) +NUM_MUX_9548_1_CHAN7=$(( ${NUM_I801_DEVICE} + 17 )) + +NUM_MUX_9548_2_CHAN0=$(( ${NUM_I801_DEVICE} + 18 )) +NUM_MUX_9548_3_CHAN0=$(( ${NUM_I801_DEVICE} + 26 )) +NUM_MUX_9548_4_CHAN0=$(( ${NUM_I801_DEVICE} + 34 )) +NUM_MUX_9548_5_CHAN0=$(( ${NUM_I801_DEVICE} + 42 )) + +#MUX Alias +I2C_BUS_PSU1_EEPROM=${NUM_MUX_9548_0_CHAN1} +I2C_BUS_PSU2_EEPROM=${NUM_MUX_9548_0_CHAN2} +I2C_BUS_FAN_STATUS=${NUM_MUX_9548_1_CHAN0} +I2C_BUS_LED_BOARD=${NUM_MUX_9548_1_CHAN0} +I2C_BUS_MB_EEPROM=${NUM_MUX_9548_1_CHAN2} + +PATH_SYS_I2C_DEVICES="/sys/bus/i2c/devices" +PATH_SYS_GPIO="/sys/class/gpio" +PATH_HWMON_ROOT_DEVICES="/sys/class/hwmon" +PATH_HWMON_W83795_DEVICE="${PATH_HWMON_ROOT_DEVICES}/hwmon1" +PATH_I801_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_I801_DEVICE}" +PATH_ISMT_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_ISMT_DEVICE}" +#PATH for MUX PCA9548#0 +PATH_MUX_9548_0_CHAN0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CHAN0}" +PATH_MUX_9548_0_CHAN1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CHAN1}" +PATH_MUX_9548_0_CHAN2="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CHAN2}" +#PATH for MUX PCA9548#1 +PATH_MUX_9548_1_CHAN0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN0}" +PATH_MUX_9548_1_CHAN1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN1}" +PATH_MUX_9548_1_CHAN2="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN2}" +PATH_MUX_9548_1_CHAN3="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN3}" +PATH_MUX_9548_1_CHAN4="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN4}" +PATH_MUX_9548_1_CHAN5="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN5}" +PATH_MUX_9548_1_CHAN6="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN6}" +PATH_MUX_9548_1_CHAN7="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN7}" + +#i2cmap and gpiomap path +PATH_GPIOMAP=/tmp/gpiomap +PATH_I2CMAP=/tmp/i2cmap + +I2C_ADDR_MUX_9548_0=0x70 +I2C_ADDR_MUX_9548_1=0x70 +I2C_ADDR_MUX_9548_2=0x71 +I2C_ADDR_MUX_9548_3=0x71 +I2C_ADDR_MUX_9548_4=0x71 +I2C_ADDR_MUX_9548_5=0x71 +I2C_ADDR_DDR3=0x50 +I2C_ADDR_RTC=0x68 +I2C_ADDR_CPLD=0x33 +I2C_ADDR_HWM=0x2F +I2C_ADDR_MUX_9535_FAN=0x20 +I2C_ADDR_MUX_9535_LED=0x22 +I2C_ADDR_MUX_9535_0=0x20 +I2C_ADDR_MUX_9535_1=0x21 +I2C_ADDR_MUX_9535_2=0x22 +I2C_ADDR_MUX_9535_3=0x23 +I2C_ADDR_MUX_9535_4=0x20 +I2C_ADDR_MUX_9535_5=0x21 +I2C_ADDR_MUX_9535_6=0x22 +I2C_ADDR_MUX_9535_7=0x23 +I2C_ADDR_MUX_9535_8=0x20 +I2C_ADDR_MUX_9535_9=0x21 +I2C_ADDR_MUX_9535_10=0x22 +I2C_ADDR_MB_EEPROM=0x56 +I2C_ADDR_QSFP_EEPROM=0x50 +I2C_ADDR_PSU_EEPROM=0x51 + +#sysfs +PATH_SYSFS_PSU1="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_PSU1_EEPROM}-$(printf "%04x" $I2C_ADDR_PSU_EEPROM)" +PATH_SYSFS_PSU2="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_PSU2_EEPROM}-$(printf "%04x" $I2C_ADDR_PSU_EEPROM)" + +#Active High/Low +ACTIVE_LOW=1 +ACTIVE_HIGH=0 +#GPIO Direction In/Out +DIR_IN=in +DIR_OUT=out + +#Power Supply Status +PSU_DC_ON=1 +PSU_DC_OFF=0 +PSU_EXIST=1 +PSU_NOT_EXIST=0 + +#W83795 Registers +REG_BANK_SEL=0x00 +REG_VOLT_CTRL1=0x02 +REG_VOLT_CTRL2=0x03 +REG_TEMP_CTRL1=0x04 +REG_TEMP_CTRL2=0x05 + +#PCA9535 Registers +REG_IN_0=0 +REG_IN_1=1 +REG_OUT_0=2 +REG_OUT_1=3 +REG_POLARITY_0=4 +REG_POLARITY_1=5 +REG_CFG_0=6 +REG_CFG_1=7 + +#Bit Mask +BIT_MASK=(1 2 4 8 16 32 64 128) + +#GPIO Offset +GPIO_OFFSET=0 + +# Help usage function +function _help { + echo "=========================================================" + echo "# Description: Help Function" + echo "# Version : ${VERSION}" + echo "=========================================================" + echo "----------------------------------------------------" + echo "EX : ${0} help" + echo " : ${0} i2c_init" + echo " : ${0} i2c_deinit" + echo " : ${0} i2c_temp_init" + echo " : ${0} i2c_fan_init" + echo " : ${0} i2c_volmon_init" + echo " : ${0} i2c_io_exp_init" + echo " : ${0} i2c_gpio_init" + echo " : ${0} i2c_gpio_deinit" + echo " : ${0} i2c_psu_eeprom_get" + echo " : ${0} i2c_mb_eeprom_get" + echo " : ${0} i2c_qsfp_eeprom_get [1-32]" + echo " : ${0} i2c_qsfp_eeprom_init new|delete" + echo " : ${0} i2c_mb_eeprom_init new|delete" + echo " : ${0} i2c_qsfp_status_get [1-32]" + echo " : ${0} i2c_qsfp_type_get [1-32]" + echo " : ${0} i2c_board_type_get" + echo " : ${0} i2c_psu_status" + echo " : ${0} i2c_led_psu_status_set" + echo " : ${0} i2c_led_fan_status_set" + echo " : ${0} i2c_led_fan_tray_status_set" + echo " : ${0} i2c_led_fan_tray_test" + echo " : ${0} i2c_cpld_version" + echo " : ${0} i2c_test_all" + echo " : ${0} i2c_led_test" + echo " : ${0} i2c_sys_led green|amber on|off" + echo " : ${0} i2c_fan_led green|amber on|off" + echo " : ${0} i2c_psu1_led green|amber on|off" + echo " : ${0} i2c_psu2_led green|amber on|off" + echo " : ${0} i2c_fan_tray_led green|amber on|off [1-4]" + echo "----------------------------------------------------" +} + +#Pause function +function _pause { + read -p "$*" +} + +#Retry command function +function _retry { + local i + for i in {1..5}; + do + eval "${*}" && break || echo "retry"; sleep 1; + done +} + +#set i2cmap +function _set_i2cmap { + local i2c_n=$1 + local alias=$2 + + #create i2cmap dir if not exist + mkdir -p $PATH_I2CMAP + + #check i2c_n exists in sysfs + if [ ! -L ${PATH_SYS_I2C_DEVICES}/i2c-${i2c_n} ]; then + echo "${PATH_SYS_I2C_DEVICES}/i2c-${i2c_n} does not exist." + return + fi + + #create or update link + ln -sf ${PATH_SYS_I2C_DEVICES}/i2c-${i2c_n} ${PATH_I2CMAP}/${alias} +} + +#clear i2cmap +function _clear_i2cmap { + #delete i2cmap dir + rm -rf ${PATH_I2CMAP}/ +} + + +#I2C Init +function _i2c_init { + echo "=========================================================" + echo "# Description: I2C Init" + echo "=========================================================" + + rmmod i2c_ismt + rmmod i2c_i801 + modprobe i2c_i801 + modprobe i2c_ismt + modprobe i2c_dev + modprobe i2c_mux_pca954x force_deselect_on_exit=1 + + #add MUX PCA9548#0 on I801 + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CHAN0}" ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_0}' > ${PATH_I801_DEVICE}/new_device" + _set_i2cmap ${NUM_MUX_9548_0_CHAN0} "PCA9548_0" + else + echo "pca9548#0 ${I2C_ADDR_MUX_9548_0} already init." + fi + #add MUX PCA9548#1 on ISMT + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN0}" ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_1}' > ${PATH_ISMT_DEVICE}/new_device" + _set_i2cmap ${NUM_MUX_9548_1_CHAN0} "PCA9548_1" + else + echo "pca9548#1 ${I2C_ADDR_MUX_9548_1} already init." + fi + #add MUX PCA9548#2 on PCA9548#1 + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CHAN0}" ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_2}' > ${PATH_MUX_9548_1_CHAN4}/new_device" + _set_i2cmap ${NUM_MUX_9548_2_CHAN0} "PCA9548_2" + else + echo "pca9548#2 ${I2C_ADDR_MUX_9548_2} already init." + fi + #add MUX PCA9548#3 on PCA9548#1 + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_3_CHAN0}" ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_3}' > ${PATH_MUX_9548_1_CHAN5}/new_device" + _set_i2cmap ${NUM_MUX_9548_3_CHAN0} "PCA9548_3" + else + echo "pca9548#3 ${I2C_ADDR_MUX_9548_3} already init." + fi + #add MUX PCA9548#4 on PCA9548#1 + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_4_CHAN0}" ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_4}' > ${PATH_MUX_9548_1_CHAN6}/new_device" + _set_i2cmap ${NUM_MUX_9548_4_CHAN0} "PCA9548_4" + else + echo "pca9548#4 ${I2C_ADDR_MUX_9548_4} already init." + fi + #add MUX PCA9548#5 on PCA9548#1 + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_5_CHAN0}" ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_5}' > ${PATH_MUX_9548_1_CHAN7}/new_device" + _set_i2cmap ${NUM_MUX_9548_5_CHAN0} "PCA9548_5" + else + echo "pca9548#5 ${I2C_ADDR_MUX_9548_5} already init." + fi + #Init CPLD LED_CLR Register (Front Port LED) + i2cset -y ${NUM_I801_DEVICE} ${I2C_ADDR_CPLD} 0x34 0x10 + + rmmod coretemp + rmmod jc42 + rmmod w83795 + _i2c_temp_init + _i2c_volmon_init + modprobe coretemp + modprobe w83795 + modprobe jc42 + modprobe eeprom + modprobe eeprom_mb + modprobe gpio-pca953x + _i2c_fan_init + _i2c_io_exp_init + rmmod gpio_ich + _i2c_gpio_init + modprobe gpio_ich + _i2c_psu_init + _i2c_qsfp_eeprom_init "new" + _i2c_mb_eeprom_init "new" + _i2c_led_psu_status_set + _i2c_led_fan_status_set + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_sys_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_sys_led + _config_rmem +} + +#I2C Deinit +function _i2c_deinit { + _i2c_gpio_deinit + for mod in coretemp jc42 w83795 eeprom_mb gpio-pca953x i2c_mux_pca954x i2c_ismt i2c_i801 ingrasys_s8810_32q_psu; + do + [ "$(lsmod | grep "^$mod ")" != "" ] && rmmod $mod + done + _clear_i2cmap +} + +#Temperature sensor Init +function _i2c_temp_init { + echo -n "TEMP INIT..." + #select bank0 + i2cset -y -r ${NUM_I801_DEVICE} ${I2C_ADDR_HWM} ${REG_BANK_SEL} 0x80 + #enable TR1, TR2, TR3 temperature monitoring + i2cset -y -r ${NUM_I801_DEVICE} ${I2C_ADDR_HWM} ${REG_TEMP_CTRL2} 0x7F + + # CLKIN clock frequency set as 48Mhz + i2cset -y -r ${NUM_I801_DEVICE} ${I2C_ADDR_HWM} 0x01 0x1C +} + +#FAN Init +function _i2c_fan_init { + + local init_fan_speed=120 + echo -n "FAN INIT..." + if [ -e "${PATH_HWMON_W83795_DEVICE}" ]; then + #Init Fan Speed + echo $init_fan_speed > ${PATH_HWMON_W83795_DEVICE}/device/pwm1 + echo $init_fan_speed > ${PATH_HWMON_W83795_DEVICE}/device/pwm2 + echo "SUCCESS" + else + echo "FAIL, W83795 not found in path ${PATH_HWMON_W83795_DEVICE}" + fi +} + +#VOLMON Init +function _i2c_volmon_init { + #3.3V 3VDD + #VSEN1 ROV + #VSEN4 1V + #VSEN5 1.8V + #VSEN7 5V + echo -n "VOLMON INIT..." + #select bank0 + i2cset -y -r ${NUM_I801_DEVICE} ${I2C_ADDR_HWM} ${REG_BANK_SEL} 0x80 + #enable voltage monitoring VSEN1-8 + i2cset -y -r ${NUM_I801_DEVICE} ${I2C_ADDR_HWM} ${REG_VOLT_CTRL1} 0xFF + #enable voltage monitoring 3VDD and 3VBAT + i2cset -y -r ${NUM_I801_DEVICE} ${I2C_ADDR_HWM} ${REG_VOLT_CTRL2} 0x50 + #disable voltage monitoring VSEN12 and VSEN13 + i2cset -y -r ${NUM_I801_DEVICE} ${I2C_ADDR_HWM} ${REG_TEMP_CTRL1} 0x00 + echo "Done" +} + +#IO Expander Init +function _i2c_io_exp_init { + echo "=========================================================" + echo "# Description: I2C IO Expander Init" + echo "=========================================================" + + #SMBUS1 + + echo "Init FAN Status IO Expander" + #PCA9535_FAN FAN_STATUS + #command byte 2/3, output logic level is 0 + #command byte 4/5, polarity is not inverted + #command byte 6/7, direction is input + i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9535_FAN} ${REG_OUT_0} 0x11 + i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9535_FAN} ${REG_OUT_1} 0x11 + i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9535_FAN} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9535_FAN} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9535_FAN} ${REG_CFG_0} 0xCC + i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9535_FAN} ${REG_CFG_1} 0xCC + + echo "Init LED Status IO Expander" + #PCA9535_LED LED_BOARD + #command byte 2/3, output logic level is 0 + #command byte 4/5, polarity is not inverted + #command byte 6/7, direction is output + i2cset -y -r ${I2C_BUS_LED_BOARD} ${I2C_ADDR_MUX_9535_LED} ${REG_OUT_0} 0xFF #active low + i2cset -y -r ${I2C_BUS_LED_BOARD} ${I2C_ADDR_MUX_9535_LED} ${REG_OUT_1} 0xFF #active low + i2cset -y -r ${I2C_BUS_LED_BOARD} ${I2C_ADDR_MUX_9535_LED} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${I2C_BUS_LED_BOARD} ${I2C_ADDR_MUX_9535_LED} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${I2C_BUS_LED_BOARD} ${I2C_ADDR_MUX_9535_LED} ${REG_CFG_0} 0x00 + i2cset -y -r ${I2C_BUS_LED_BOARD} ${I2C_ADDR_MUX_9535_LED} ${REG_CFG_1} 0x00 + + #PCA9535#0-10 zQSFP + + echo "Init ZQSFP IO Expander" + + echo "set ZQSFP ABS" + #zQSFP 0-31 ABS + #command byte 4/5, polarity is not inverted + #command byte 6/7, direction is input + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_0} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_0} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_0} ${REG_CFG_0} 0xFF + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_0} ${REG_CFG_1} 0xFF + + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_1} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_1} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_1} ${REG_CFG_0} 0xFF + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_1} ${REG_CFG_1} 0xFF + + echo "set ZQSFP INT" + #zQSFP 0-31 INT + #command byte 4/5, polarity is not inverted + #command byte 6/7, direction is input + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_2} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_2} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_2} ${REG_CFG_0} 0xFF + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_2} ${REG_CFG_1} 0xFF + + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_3} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_3} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_3} ${REG_CFG_0} 0xFF + i2cset -y -r ${NUM_MUX_9548_1_CHAN1} ${I2C_ADDR_MUX_9535_3} ${REG_CFG_1} 0xFF + + echo "set ZQSFP LP_MODE" + #zQSFP 0-31 LP_MODE + #command byte 2/3, output logic level is 0 + #command byte 4/5, polarity is not inverted + #command byte 6/7, direction is output + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_4} ${REG_OUT_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_4} ${REG_OUT_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_4} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_4} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_4} ${REG_CFG_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_4} ${REG_CFG_1} 0x00 + + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_5} ${REG_OUT_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_5} ${REG_OUT_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_5} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_5} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_5} ${REG_CFG_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_5} ${REG_CFG_1} 0x00 + + echo "set ZQSFP RST" + #zQSFP 0-31 RST + #command byte 2/3, output logic level is 0 + #command byte 4/5, polarity is not inverted + #command byte 6/7, direction is output + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_6} ${REG_OUT_0} 0xFF + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_6} ${REG_OUT_1} 0xFF + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_6} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_6} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_6} ${REG_CFG_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_6} ${REG_CFG_1} 0x00 + + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_7} ${REG_OUT_0} 0xFF + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_7} ${REG_OUT_1} 0xFF + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_7} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_7} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_7} ${REG_CFG_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN2} ${I2C_ADDR_MUX_9535_7} ${REG_CFG_1} 0x00 + + echo "set ZQSFP Mode Select" + #zQSFP 0-31 Mode Select + #command byte 2/3, output logic level is 0 + #command byte 4/5, polarity is not inverted + #command byte 6/7, direction is output + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_8} ${REG_OUT_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_8} ${REG_OUT_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_8} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_8} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_8} ${REG_CFG_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_8} ${REG_CFG_1} 0x00 + + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_9} ${REG_OUT_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_9} ${REG_OUT_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_9} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_9} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_9} ${REG_CFG_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_9} ${REG_CFG_1} 0x00 + + #ZQSFP ABS0_15, ABS16_31, INT0_15, INT16_31, PSU1_PWROFF, PSU2_PWROFF + #command byte 2/3, output logic level is 0 + #command byte 4/5, polarity is not inverted + #command byte 6/7, I/O 1.0 and I/O 1.1 are output, others are input + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_10} ${REG_OUT_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_10} ${REG_OUT_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_10} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_10} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_10} ${REG_CFG_0} 0xFF + i2cset -y -r ${NUM_MUX_9548_1_CHAN3} ${I2C_ADDR_MUX_9535_10} ${REG_CFG_1} 0xFC +} + +#GPIO Init Utility Function +function _gpio_export { + local gpio_n=$1 + local direction=$2 + local active_low=$3 + local value=$4 + + if [ -z "${gpio_n}" ]; then + echo "[_gpio_init] gpio_n(${gpio_n}) is not provided" + return + fi + if [ "${gpio_n}" -lt "0" ] || [ "${gpio_n}" -gt "255" ]; then + echo "[_gpio_init] gpio_n(${gpio_n}) is invalid value" + return + fi + + #export gpio + echo ${gpio_n} > ${PATH_SYS_GPIO}/export + + #set gpio direction + echo ${direction} > ${PATH_SYS_GPIO}/gpio${gpio_n}/direction + + #set gpio active_low + echo ${active_low} > ${PATH_SYS_GPIO}/gpio${gpio_n}/active_low + + #set value + if [ ! -z "${value}" ]; then + echo ${value} > ${PATH_SYS_GPIO}/gpio${gpio_n}/value + fi +} + +#set gpiomap +function _set_gpiomap { + local gpio_n=$1 + local alias=$2 + + #create gpiomap dir if not exist + mkdir -p $PATH_GPIOMAP + + #check gpio_n exists in sysfs + if [ ! -L ${PATH_SYS_GPIO}/gpio${gpio_n} ]; then + echo "${PATH_SYS_GPIO}/gpio${gpio_n} does not exist." + return + fi + + #create or update link + ln -sf ${PATH_SYS_GPIO}/gpio${gpio_n} ${PATH_GPIOMAP}/${alias} +} + +#clear gpiomap +function _clear_gpiomap { + #delete gpiomap dir + rm -rf ${PATH_GPIOMAP} +} + +# To set the global variable GPIO_OFFSET +function _set_gpio_offset { + GPIO_OFFSET=0 + for d in `ls /sys/class/gpio/ | grep gpiochip` + do + gpiochip_no=${d##gpiochip} + if [ $gpiochip_no -gt 255 ]; then + GPIO_OFFSET=256 + break + fi + done + #echo "set GPIO_OFFSET=${GPIO_OFFSET}" +} + +#GPIO Init +function _i2c_gpio_init { + local i=0 + + #ABS Port 0-31 + echo "pca9535 ${I2C_ADDR_MUX_9535_1}" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN1}/new_device + _set_gpio_offset + echo "pca9535 ${I2C_ADDR_MUX_9535_0}" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN1}/new_device + #for i in {224..255} + for((i=${GPIO_OFFSET}+224;i<=${GPIO_OFFSET}+255;i++)); + do + _gpio_export ${i} ${DIR_IN} ${ACTIVE_LOW} + _set_gpiomap ${i} "QSFP$(( i - 223 ))_ABS" + done + + #INT Port 0-31 + echo "pca9535 ${I2C_ADDR_MUX_9535_3}" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN1}/new_device + echo "pca9535 ${I2C_ADDR_MUX_9535_2}" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN1}/new_device + #for i in {192..223} + for((i=${GPIO_OFFSET}+192;i<=${GPIO_OFFSET}+223;i++)); + do + _gpio_export ${i} ${DIR_IN} ${ACTIVE_LOW} + _set_gpiomap ${i} "QSFP$(( i - 191 ))_INT" + done + + #LP Mode Port 0-31 + echo "pca9535 ${I2C_ADDR_MUX_9535_5}" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN2}/new_device + echo "pca9535 ${I2C_ADDR_MUX_9535_4}" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN2}/new_device + #for i in {160..191} + for((i=${GPIO_OFFSET}+160;i<=${GPIO_OFFSET}+191;i++)); + do + _gpio_export ${i} ${DIR_OUT} ${ACTIVE_HIGH} + _set_gpiomap ${i} "QSFP$(( i - 159 ))_LPMODE" + done + + #RST Port 0-31 + echo "pca9535 ${I2C_ADDR_MUX_9535_7}" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN2}/new_device + echo "pca9535 ${I2C_ADDR_MUX_9535_6}" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN2}/new_device + #for i in {128..159} + for((i=${GPIO_OFFSET}+128;i<=${GPIO_OFFSET}+159;i++)); + do + _gpio_export ${i} ${DIR_OUT} ${ACTIVE_LOW} + _set_gpiomap ${i} "QSFP$(( i - 127 ))_RST" + #Reset QSFP + echo "${ACTIVE_LOW}" > ${PATH_SYS_GPIO}/gpio${i}/value + echo "${ACTIVE_HIGH}" > ${PATH_SYS_GPIO}/gpio${i}/value + done + + #MODSEL Port 0-31 + echo "pca9535 ${I2C_ADDR_MUX_9535_9}" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN3}/new_device + echo "pca9535 ${I2C_ADDR_MUX_9535_8}" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN3}/new_device + #for i in {96..127} + for((i=${GPIO_OFFSET}+96;i<=${GPIO_OFFSET}+127;i++)); + do + _gpio_export ${i} ${DIR_OUT} ${ACTIVE_LOW} + _set_gpiomap ${i} "QSFP$(( i - 95 ))_MODSEL" + done +} + +#GPIO DeInit +function _i2c_gpio_deinit { + echo ${I2C_ADDR_MUX_9535_0} > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN1}/delete_device + echo ${I2C_ADDR_MUX_9535_1} > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN1}/delete_device + echo ${I2C_ADDR_MUX_9535_2} > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN1}/delete_device + echo ${I2C_ADDR_MUX_9535_3} > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN1}/delete_device + echo ${I2C_ADDR_MUX_9535_4} > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN2}/delete_device + echo ${I2C_ADDR_MUX_9535_5} > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CHAN2}/delete_device + _clear_gpiomap +} + +#Set FAN Tray LED +function _i2c_led_fan_tray_status_set { + echo "FAN Tray Status Setup" + + #check W83795 exists in hwmon2 + if [ ! -e "${PATH_HWMON_W83795_DEVICE}" ]; then + echo "FAIL, W83795 not found in path ${PATH_HWMON_W83795_DEVICE}" + return + fi + #FAN Status get + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN2_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan2_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN4_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan4_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN6_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan6_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + FAN8_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan8_alarm` + + FAN_TRAY=1 + if [ "${FAN1_ALARM}" == "0" ] && [ "${FAN2_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + FAN_TRAY=2 + if [ "${FAN3_ALARM}" == "0" ] && [ "${FAN4_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + FAN_TRAY=3 + if [ "${FAN5_ALARM}" == "0" ] && [ "${FAN6_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + FAN_TRAY=4 + if [ "${FAN7_ALARM}" == "0" ] && [ "${FAN8_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi +} + +#Test FAN Tray LED +function _i2c_led_fan_tray_test { + echo "FAN Tray LED Test" + + for i in {1..4} + do + FAN_TRAY=$i + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + _pause 'Check Fan Tray ${FAN_TRAY} LED green light and Press [Enter] key to continue...' + + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + _pause 'Check Fan Tray ${FAN_TRAY} LED amber light and Press [Enter] key to continue...' + done +} +#Set FAN LED +function _i2c_led_fan_status_set { + echo "FAN Status Setup" + + #check W83795 exists in hwmon2 + if [ ! -e "${PATH_HWMON_W83795_DEVICE}" ]; then + echo "FAIL, W83795 not found in path ${PATH_HWMON_W83795_DEVICE}" + return + fi + + #PSU Status set + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN2_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan2_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN4_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan4_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN6_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan6_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + FAN8_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan8_alarm` + + if [ "${FAN1_ALARM}" == "0" ] && [ "${FAN2_ALARM}" == "0" ] \ + && [ "${FAN3_ALARM}" == "0" ] && [ "${FAN4_ALARM}" == "0" ] \ + && [ "${FAN5_ALARM}" == "0" ] && [ "${FAN6_ALARM}" == "0" ] \ + && [ "${FAN7_ALARM}" == "0" ] && [ "${FAN8_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + fi +} + +#Set Power Supply LED +function _i2c_led_psu_status_set { + echo "PSU LED Status Setup" + + #PSU Status set + _i2c_psu_status + + #PSU1 Status + if [ "${psu1Exist}" == ${PSU_EXIST} ]; then + if [ "${psu1PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + fi + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + fi + + #PSU2 Status + if [ "${psu2Exist}" == ${PSU_EXIST} ]; then + if [ "${psu2PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + fi + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + fi +} + +#LED Test +function _i2c_led_test { + echo "=========================================================" + echo "# Description: I2C LED TEST..." + echo "=========================================================" + #sys led (green) + _i2c_reset_led + COLOR_LED="green" + ONOFF_LED="on" + _i2c_sys_led + _pause 'Check SYS LED green light and Press [Enter] key to continue...' + #sys led (amber) + _i2c_reset_led + COLOR_LED="amber" + ONOFF_LED="on" + _i2c_sys_led + _pause 'Check SYS LED amber light and Press [Enter] key to continue...' + + #FAN led (green) + _i2c_reset_led + COLOR_LED="green" + ONOFF_LED="on" + _i2c_fan_led + _pause 'Check FAN LED green light and Press [Enter] key to continue...' + #FAN led (amber) + _i2c_reset_led + COLOR_LED="amber" + ONOFF_LED="on" + _i2c_fan_led + _pause 'Check FAN LED amber light and Press [Enter] key to continue...' + + #PSU2 led (green) + _i2c_reset_led + COLOR_LED="green" + ONOFF_LED="on" + _i2c_psu2_led + _pause 'Check PSU2 LED green light and Press [Enter] key to continue...' + #PSU2 led (amber) + _i2c_reset_led + COLOR_LED="amber" + ONOFF_LED="on" + _i2c_psu2_led + _pause 'Check PSU2 LED amber light and Press [Enter] key to continue...' + + #PSU1 led (green) + _i2c_reset_led + COLOR_LED="green" + ONOFF_LED="on" + _i2c_psu1_led + _pause 'Check PSU1 LED green light and Press [Enter] key to continue...' + #PSU1 led (amber) + _i2c_reset_led + COLOR_LED="amber" + ONOFF_LED="on" + _i2c_psu1_led + _pause 'Check PSU1 LED amber light and Press [Enter] key to continue...' + + #Turn OFF All LED + _i2c_reset_led + _pause 'Check turn off all LEDs and Press [Enter] key to continue...' + echo "done..." + + #sys led (green) + COLOR_LED="green" + ONOFF_LED="on" + _i2c_sys_led +} + +#Set QSFP Port variable +function _qsfp_port_i2c_var_set { + local port=$1 + case ${port} in + 1|2|3|4|5|6|7|8) + i2cbus=${NUM_MUX_9548_1_CHAN1} + regAddr=0x20 + dataAddr=0 + eeprombusbase=${NUM_MUX_9548_2_CHAN0} + gpioBase=$((${GPIO_OFFSET}+224)) + #gpioBase=224 + ;; + 9|10|11|12|13|14|15|16) + i2cbus=${NUM_MUX_9548_1_CHAN1} + regAddr=0x20 + dataAddr=1 + eeprombusbase=${NUM_MUX_9548_3_CHAN0} + gpioBase=$((${GPIO_OFFSET}+224)) + #gpioBase=224 + ;; + 17|18|19|20|21|22|23|24) + i2cbus=${NUM_MUX_9548_1_CHAN1} + regAddr=0x21 + dataAddr=0 + eeprombusbase=${NUM_MUX_9548_4_CHAN0} + gpioBase=$((${GPIO_OFFSET}+240)) + #gpioBase=240 + ;; + 25|26|27|28|29|30|31|32) + i2cbus=${NUM_MUX_9548_1_CHAN1} + regAddr=0x21 + dataAddr=1 + eeprombusbase=${NUM_MUX_9548_5_CHAN0} + gpioBase=$((${GPIO_OFFSET}+240)) + #gpioBase=240 + ;; + *) + echo "Please input 1~32" + exit + ;; + esac +} + +#Set QSFP Port variable +function _qsfp_eeprom_var_set { + local port=$1 + eeprombusidx=$(( ${port} % 8)) + case $eeprombusidx in + 1) + eeprombus=$(( $eeprombusbase + 0 )) + ;; + 2) + eeprombus=$(( $eeprombusbase + 1 )) + ;; + 3) + eeprombus=$(( $eeprombusbase + 2 )) + ;; + 4) + eeprombus=$(( $eeprombusbase + 3 )) + ;; + 5) + eeprombus=$(( $eeprombusbase + 4 )) + ;; + 6) + eeprombus=$(( $eeprombusbase + 5 )) + ;; + 7) + eeprombus=$(( $eeprombusbase + 6 )) + ;; + 0) + eeprombus=$(( $eeprombusbase + 7 )) + ;; + esac + eepromAddr=${I2C_ADDR_QSFP_EEPROM} +} + +#Get QSFP EEPROM Information +function _i2c_qsfp_eeprom_get { + + _qsfp_port_i2c_var_set ${QSFP_PORT} + + #status: 0 -> Down, 1 -> Up + status=`cat ${PATH_SYS_GPIO}/gpio$(( gpioBase + (QSFP_PORT-1)%16 ))/value` + echo $status + + if [ $status = 0 ]; then + exit + fi + + _qsfp_eeprom_var_set ${QSFP_PORT} + + cat ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/eeprom | hexdump -C +} + +#Init QSFP EEPROM +function _i2c_qsfp_eeprom_init { + echo -n "QSFP EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init 1-32 ports EEPROM + local i + for i in {1..32}; + do + _qsfp_port_i2c_var_set ${i} + + _qsfp_eeprom_var_set ${i} + + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr) ]; then + echo "sff8436 $eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eeprombus/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr) ]; then + echo "$eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eeprombus/delete_device + fi + done + echo "DONE" +} + +#Init Main Board EEPROM +function _i2c_mb_eeprom_init { + echo -n "Main Board EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init MB EEPROM + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM) ]; then + echo "mb_eeprom ${I2C_ADDR_MB_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_MB_EEPROM}/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM) ]; then + echo "${I2C_ADDR_MB_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_MB_EEPROM}/delete_device + fi + echo "DONE" +} + +#get QSFP Status +function _i2c_qsfp_status_get { + + _qsfp_port_i2c_var_set ${QSFP_PORT} + + #status: 0 -> Down, 1 -> Up + + status=`cat ${PATH_SYS_GPIO}/gpio$(( gpioBase + (QSFP_PORT-1)%16 ))/value` + echo "status=$status" +} + +#get QSFP Type +function _i2c_qsfp_type_get { + + _qsfp_port_i2c_var_set ${QSFP_PORT} + + _qsfp_eeprom_var_set ${QSFP_PORT} + + #Get QSFP EEPROM info + qsfp_info=$(base64 ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/eeprom) + + identifier=$(echo $qsfp_info | base64 -d -i | hexdump -s 128 -n 1 -e '"%x"') + connector=$(echo $qsfp_info | base64 -d -i | hexdump -s 130 -n 1 -e '"%x"') + transceiver=$(echo $qsfp_info | base64 -d -i | hexdump -s 131 -n 1 -e '"%x"') + + echo "identifier=$identifier" + echo "connector=$connector" + echo "transceiver=$transceiver" +} + +#Init PSU Kernel Module +function _i2c_psu_init { + echo "=========================================================" + echo "# Description: I2C PSU Init" + echo "=========================================================" + modprobe ingrasys_s8810_32q_psu + + echo "psu1 ${I2C_ADDR_PSU_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU1_EEPROM}/new_device + echo "psu2 ${I2C_ADDR_PSU_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU2_EEPROM}/new_device +} + +#Get PSU EEPROM Information +function _i2c_psu_eeprom_get { + local eeprom_psu1="" + local eeprom_psu2="" + + echo "=========================================================" + echo "# Description: I2C PSU EEPROM Get..." + echo "=========================================================" + + eeprom_psu1="${PATH_SYSFS_PSU1}/psu_eeprom" + cat ${eeprom_psu1} | hexdump -C + + eeprom_psu2="${PATH_SYSFS_PSU2}/psu_eeprom" + cat ${eeprom_psu2} | hexdump -C +} + +#Get MotherBoard EEPROM Information +function _i2c_mb_eeprom_get { + echo "=========================================================" + echo "# Description: I2C MB EEPROM Get..." + echo "=========================================================" + + ## MB EEPROM + cat ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM)/eeprom | hexdump -C + echo "done..." +} + +#Set FAN Tray LED +function _i2c_fan_tray_led { + local value=0 + case ${FAN_TRAY} in + 1) + ioPort=$REG_OUT_0 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 2) + ioPort=$REG_OUT_0 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + 3) + ioPort=$REG_OUT_1 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 4) + ioPort=$REG_OUT_1 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + *) + echo "Please input 1~4" + exit + ;; + esac + + if [ "${ONOFF_LED}" == "on" ]; then + value=0xFF + elif [ "${ONOFF_LED}" == "off" ]; then + value=0x00 + else + echo "Invalid Parameters ${ONOFF_LED}, Exit!!!" + _help + exit ${FALSE} + fi + i2cset -m $mask -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9535_FAN} $ioPort $value + + #echo "done..." +} + +#Set System Status LED +function _i2c_sys_led { + local green_mask=${BIT_MASK[7]} + local amber_mask=${BIT_MASK[6]} + + _i2c_set_led $green_mask $amber_mask +} + +#Set FAN LED +function _i2c_fan_led { + local green_mask=${BIT_MASK[3]} + local amber_mask=${BIT_MASK[2]} + + _i2c_set_led $green_mask $amber_mask +} + +#Set PSU1 LED +function _i2c_psu1_led { + local green_mask=${BIT_MASK[1]} + local amber_mask=${BIT_MASK[0]} + + _i2c_set_led $green_mask $amber_mask +} + +#Set PSU2 LED +function _i2c_psu2_led { + local green_mask=${BIT_MASK[5]} + local amber_mask=${BIT_MASK[4]} + + _i2c_set_led $green_mask $amber_mask +} + +#Set LEDs in LED Board +function _i2c_set_led { + local green_mask=$1 + local amber_mask=$2 + local mask=0 + local value=0 + + + if [ "${COLOR_LED}" == "green" ]; then + mask=$green_mask + elif [ "${COLOR_LED}" == "amber" ]; then + mask=$amber_mask + else + echo "Invalid Parameters ${COLOR_LED}, Exit!!!" + _help + exit ${FALSE} + fi + + # Singals are active_low + if [ "${ONOFF_LED}" == "on" ]; then + value=0x00 + elif [ "${ONOFF_LED}" == "off" ]; then + value=0xFF + else + echo "Invalid Parameters ${ONOFF_LED}, Exit!!!" + _help + exit ${FALSE} + fi + + i2cset -m $mask -y -r ${I2C_BUS_LED_BOARD} ${I2C_ADDR_MUX_9535_LED} ${REG_OUT_0} $value +} + +#Reset all system leds +function _i2c_reset_led { + i2cset -y ${I2C_BUS_LED_BOARD} ${I2C_ADDR_MUX_9535_LED} ${REG_OUT_0} 0xFF +} + +#Get Board Version and Type +function _i2c_board_type_get { + local reg_board=0x00 + local reg_ext_board=0x07 + local boardType=0 + local boardBuildRev=0 + local boardHwRev=0 + local boardId=0 + local extBoardType=0 + + boardType=`i2cget -y ${NUM_I801_DEVICE} ${I2C_ADDR_CPLD} ${reg_board}` + #Bit 0-1 + boardBuildRev=$((($boardType) & 0x03)) + #Bit 2-3 + boardHwRev=$((($boardType) >> 2 & 0x03)) + #Bit 4-7 + boardId=$((($boardType) >> 4)) + + extBoardType=`i2cget -y ${NUM_I801_DEVICE} ${I2C_ADDR_CPLD} ${reg_ext_board}` + #Bit 0-3 + extBoardType=$((($extBoardType) & 0x0F)) + + printf "BOARD_ID=0x%02x, HW Rev=%d, Build Rev=%d, Ext_BOARD_ID=0x%02x\n" $boardId $boardHwRev $boardBuildRev $extBoardType + +} + +#Get CPLD Version +function _i2c_cpld_version { + local reg_cpld_rev=0x01 + cpldRev=`i2cget -y ${NUM_I801_DEVICE} ${I2C_ADDR_CPLD} ${reg_cpld_rev}` + cpldRelease=$((($cpldRev) >> 6 & 0x01)) + cpldVersion=$((($cpldRev) & 0x3F)) + printf "CPLD is %s version(0:RD 1:Release), Revision is 0x%02x\n" $cpldRelease $cpldVersion + +} + +#Get PSU Status +function _i2c_psu_status { + local psu_abs="" + + psu1PwGood=`cat ${PATH_SYSFS_PSU1}/psu_pg` + psu_abs=`cat ${PATH_SYSFS_PSU1}/psu_abs` + if [ "$psu_abs" == "0" ]; then + psu1Exist=1 + else + psu1Exist=0 + fi + + psu2PwGood=`cat ${PATH_SYSFS_PSU2}/psu_pg` + psu_abs=`cat ${PATH_SYSFS_PSU2}/psu_abs` + if [ "$psu_abs" == "0" ]; then + psu2Exist=1 + else + psu2Exist=0 + fi + + printf "PSU1 Exist:%x PSU1 PW Good:%d\n" $psu1Exist $psu1PwGood + printf "PSU2 Exist:%d PSU2 PW Good:%d\n" $psu2Exist $psu2PwGood +} + +#Increase read socket buffer for CoPP Test +function _config_rmem { + echo "109430400" > /proc/sys/net/core/rmem_max +} + +#Main Function +function _main { + start_time_str=`date` + start_time_sec=$(date +%s) + + _set_gpio_offset + if [ "${EXEC_FUNC}" == "help" ]; then + _help + elif [ "${EXEC_FUNC}" == "i2c_init" ]; then + _i2c_init + elif [ "${EXEC_FUNC}" == "i2c_deinit" ]; then + _i2c_deinit + elif [ "${EXEC_FUNC}" == "i2c_temp_init" ]; then + _i2c_temp_init + elif [ "${EXEC_FUNC}" == "i2c_fan_init" ]; then + _i2c_fan_init + elif [ "${EXEC_FUNC}" == "i2c_volmon_init" ]; then + _i2c_volmon_init + elif [ "${EXEC_FUNC}" == "i2c_io_exp_init" ]; then + _i2c_io_exp_init + elif [ "${EXEC_FUNC}" == "i2c_gpio_init" ]; then + _i2c_gpio_init + elif [ "${EXEC_FUNC}" == "i2c_gpio_deinit" ]; then + _i2c_gpio_deinit + elif [ "${EXEC_FUNC}" == "i2c_led_test" ]; then + _i2c_led_test + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_get" ]; then + _i2c_mb_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_psu_eeprom_get" ]; then + _i2c_psu_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_get" ]; then + _i2c_qsfp_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_init" ]; then + _i2c_qsfp_eeprom_init ${QSFP_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_init" ]; then + _i2c_mb_eeprom_init ${MB_EEPROM_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_qsfp_status_get" ]; then + _i2c_qsfp_status_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_type_get" ]; then + _i2c_qsfp_type_get + elif [ "${EXEC_FUNC}" == "i2c_led_psu_status_set" ]; then + _i2c_led_psu_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_status_set" ]; then + _i2c_led_fan_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_tray_status_set" ]; then + _i2c_led_fan_tray_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_tray_test" ]; then + _i2c_led_fan_tray_test + elif [ "${EXEC_FUNC}" == "i2c_sys_led" ]; then + _i2c_sys_led + elif [ "${EXEC_FUNC}" == "i2c_fan_led" ]; then + _i2c_fan_led + elif [ "${EXEC_FUNC}" == "i2c_fan_tray_led" ]; then + _i2c_fan_tray_led + elif [ "${EXEC_FUNC}" == "i2c_psu1_led" ]; then + _i2c_psu1_led + elif [ "${EXEC_FUNC}" == "i2c_psu2_led" ]; then + _i2c_psu2_led + elif [ "${EXEC_FUNC}" == "i2c_board_type_get" ]; then + _i2c_board_type_get + elif [ "${EXEC_FUNC}" == "i2c_cpld_version" ]; then + _i2c_cpld_version + elif [ "${EXEC_FUNC}" == "i2c_psu_status" ]; then + _i2c_psu_status + elif [ "${EXEC_FUNC}" == "i2c_test_all" ]; then + _i2c_deinit + _i2c_init + _i2c_led_test + _i2c_psu_eeprom_get + _i2c_mb_eeprom_get + _i2c_board_type_get + _i2c_cpld_version + _i2c_psu_status + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + if [ "$DEBUG" == "on" ]; then + echo "-----------------------------------------------------" + end_time_str=`date` + end_time_sec=$(date +%s) + diff_time=$[ ${end_time_sec} - ${start_time_sec} ] + echo "Start Time: ${start_time_str} (${start_time_sec})" + echo "End Time : ${end_time_str} (${end_time_sec})" + echo "Total Execution Time: ${diff_time} sec" + + echo "done!!!" + fi +} + +_main diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/utils/qsfp_monitor.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/utils/qsfp_monitor.sh new file mode 100755 index 00000000000..249f179216a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/utils/qsfp_monitor.sh @@ -0,0 +1,104 @@ +#!/bin/bash +# Copyright (C) 2017 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=3 +I2C_UTILS="/usr/sbin/i2c_utils.sh" +QSFP_SI_SCRIPT="/usr/sbin/qsfp_si_cfg.sh" +QSFP_ARRAY=(0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + +#QSFP SI monitor +function _qsfp_si_monitor { + local i + local status + for i in {0..31}; + do + status=`${I2C_UTILS} i2c_qsfp_status_get $(expr $i + 1) | egrep '^status=.*$' | sed -e 's/status=//g'` + if [ "${status}" == "1" ]; then + _qsfp_type_check $i + fi + done +} + +#QSFP type +function _qsfp_type_check { + local port=$1 + local qsfp_type=`${I2C_UTILS} i2c_qsfp_type_get $(expr $port + 1)` + local identifier=`echo "$qsfp_type" | grep '^identifier=.*$' | sed -e 's/identifier=//g'` + if [ "${identifier}" == "11" ]; then + connector=`echo "$qsfp_type" | grep '^connector=.*$' | sed -e 's/connector=//g'` + case ${connector} in + 21|23) + #DAC + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to DAC" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} dac $port >/dev/null + fi + ;; + *) + #Optical + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to Optical" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} optical $port >/dev/null + fi + ;; + esac + fi +} + +#Docker exist check +function _docker_swss_check { + while true + do + # Check if syncd starts + result=`docker exec -i swss bash -c "echo -en \"SELECT 1\\nHLEN HIDDEN\" | redis-cli | sed -n 2p"` #TBD FIX ME + if [ "$result" == "3" ]; then + return + fi + sleep $INTERVAL + done +} + +#Docker exist check +function _qsfp_si_cfg_script_check { + + if [ -f ${QSFP_SI_SCRIPT} ] && [ -x ${QSFP_SI_SCRIPT} ]; then + echo "SI Script exists. Start monitor." + return + else + echo "SI Script not exist. Exit monitor." + exit + fi +} + +# main function +function _main { + #Check SI Script + _qsfp_si_cfg_script_check + #Check docker swss is running + _docker_swss_check + while true + do + _qsfp_si_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/utils/s8810_32q_monitor.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/utils/s8810_32q_monitor.sh new file mode 100755 index 00000000000..974da6d5001 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8810-32q/utils/s8810_32q_monitor.sh @@ -0,0 +1,39 @@ +#!/bin/bash +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=5 +I2C_UTILS="/usr/sbin/i2c_utils.sh" + + +# LED status monitor +function _led_monitor { + ${I2C_UTILS} i2c_led_fan_status_set >/dev/null + ${I2C_UTILS} i2c_led_psu_status_set >/dev/null + ${I2C_UTILS} i2c_led_fan_tray_status_set >/dev/null +} + +# main function +function _main { + while true + do + _led_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/README.md b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/README.md new file mode 100644 index 00000000000..2042625f631 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/README.md @@ -0,0 +1,185 @@ +# Ingrasys S8900-54XC Platform Driver for SONiC + +Copyright (C) 2016 Ingrasys, Inc. + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + + +## Licensing terms + +The Licensing terms of the files within this project is split 2 parts. +The Linux kernel is released under the GNU General Public License version 2. +All other code is released under the GNU General Public License version 3. +Please see the LICENSE file for copies of both licenses. + +## Contents of this package + + - service/ + > Service config files for platform initialization and monitoring + - utils/ + > Scripts useful during platform bringup and sysfs function + - conf/ + > Platform configure files. + +## Kernel modules and drivers + +The driver for interacting with Ingrasys S8900-54XC is contained in the I2C +kernel module and initialization script. The initialization script loads +the modules in the correct order. It has been built and tested against +the Linux 3.16 kernel. + +The initialization script will modprobe the needed modules, navigate to the +module's device directory in sysfs, and write configuration data to +the kernel module. + +### IGB + +This is OOB Ports on front panel for management plane. + +The IGB module must be loaded first on Ingrasys S8900-54XC platform. + +### I2C i801 + +The I2C i801 on Ingrasys S8900-54XC can be found in +`/sys/bus/i2c/devices/i2c-0/` + +This is I2C bus for Clock Gen, DIMM channel and digital potentiometers. + +The i801 module must be loaded second on Ingrasys S8900-54XC. + +### I2C iSMT + +The I2C iSMT module on S8900-54XC can be found in +`/sys/bus/i2c/devices/i2c-1/` + +This is I2C bus for CPLD, HWM, power controller and I2C Switches. + +The i801 module must be loaded third on Ingrasys S8900-54XC. + +### I2C PCA9548 +The PCA9548 module on S8900-54XC can be found in +`/sys/bus/i2c/devices/i2c-2/` , `/sys/bus/i2c/devices/i2c-3/`, +`/sys/bus/i2c/devices/i2c-4/`, `/sys/bus/i2c/devices/i2c-5/`, +`/sys/bus/i2c/devices/i2c-6/`, `/sys/bus/i2c/devices/i2c-7/`, +`/sys/bus/i2c/devices/i2c-8/`, `/sys/bus/i2c/devices/i2c-9/`. + +The pca9548 module for zQSFP module get/set functions, PSU information, +fan status and EEPROM. + +## Hardware components + +The hardware components are initialized in the init script on S8900-54XC. +The following describes manual initialization as well as interaction. +The examples below are just for Ingrasys S8900-54XC platform. + +### Hardware initialization + +When the sonic-platform-ingrasys-s8900-54xc package is installed on the S8900-54XC, +it is automatically initialized. If you want to manual initialization, the +utility command usage as follows: +``` + i2c_utils.sh i2c_init +``` + +### EEPROM + +The EEPROM is including the board SKU, model name, vendor name, serial number, +and other information can be accessed with the specific eeprom kernel module. +After using `modprobe eeprom_mb` to detect the eeprom, it will show up in sysfs. + +The hexdump utility can be used to decode the raw output of the EEPROM. +For example, +``` + bash# echo "mb_eeprom 0x54" > /sys/bus/i2c/devices/i2c-9/new_device + bash# cat /sys/bus/i2c/drivers/mb_eeprom/9-0054/eeprom | hexdump -C +``` + +### Front panel LEDs + +LEDs can be setup on/off by using i2c utility `/usr/sbin/i2c_utils.sh`. +Utility function command usage as follows: + +``` +Status LED: + i2c_utils.sh i2c_sys_led green|amber on|off + +Fan status LED: + i2c_utils.sh i2c_fan_led green|amber on|off + +PSU1 status LED: + i2c_utils.sh i2c_psu1_led green|amber on|off + +PSU2 status LED: + i2c_utils.sh i2c_psu2_led green|amber on|off + +``` +QSFP Module Port LEDs control by ASIC library. + + +### Fan speed + +Fan speed are controlled by the w83795 kernel module. +It can be found in `/sys/class/hwmon/hwmon1/device/`. +If they were compiled as modules, you will need to modprobe w83795 for +their sysfs entries to show up. Each fan has an `fan_input` file +for reading the fan speed. And `pwm1` setting fan1 to fan4, +`pwm2` setting fan5 to fan8. + +There is docker-platform-monitor container installed fancontrol package that can +automatic control platform fan speed. + + +### Temperature sensors + +Temperature sensors are controlled by the w83795 kernel +module. It can be found in `/sys/class/hwmon/hwmon1/device/`. +If they were compiled as modules, then you will need to modprobe w83795 for +their sysfs entries to show up. +`temp1_input` is front MAC temperature sensor. `temp2_input` is rear MAC +temperature sensor. + +There is docker-platform-monitor container installed lm-sensors package that can +monitor platform temperature. And `sensors` command can show each +temperature sensors status. + +### Power supplies + +Power supplies status and its EEPROM info can be used i2c utility +`/usr/sbin/i2c_utils.sh` to get. +The usage as follows: +``` +PSU EEPROM: + i2c_utils.sh i2c_psu_eeprom_get + hexdump -C psu0.rom + hexdump -C psu1.rom + +PSU Status: + i2c_utils.sh i2c_psu_status +``` + +### QSFPs +QSFP modules are managed by the pca9548 kernel driver. +The i2c utility `/usr/sbin/i2c_utils.sh` can be used to get status and +module EEPROM informations. +The usage as follows: +``` +QSFP EEPROM: + i2c_utils.sh i2c_qsfp_eeprom_get [1-32] + +QSFP Insert Event: + i2c_utils.sh i2c_qsfp_eeprom_get [1-32] + 0 => not insert + 1 => inserted +``` + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/modules/Makefile b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/modules/Makefile new file mode 100644 index 00000000000..a0042543dff --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := eeprom_mb.o +obj-m+= i2c_cpld.o diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/modules/eeprom_mb.c b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/modules/eeprom_mb.c new file mode 100644 index 00000000000..0886cad58eb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/modules/eeprom_mb.c @@ -0,0 +1,212 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57, I2C_CLIENT_END }; + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void mb_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t mb_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + mb_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute mb_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = mb_eeprom_read, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int mb_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x50. So decline + attaching to addresses >= 0x51 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x51) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int mb_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &mb_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int mb_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &mb_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id mb_eeprom_id[] = { + { "mb_eeprom", 0 }, + { } +}; + +static struct i2c_driver mb_eeprom_driver = { + .driver = { + .name = "mb_eeprom", + }, + .probe = mb_eeprom_probe, + .remove = mb_eeprom_remove, + .id_table = mb_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = mb_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(mb_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("Ingrasys S8900 Mother Borad EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/modules/i2c_cpld.c b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/modules/i2c_cpld.c new file mode 100644 index 00000000000..626c63177b5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/modules/i2c_cpld.c @@ -0,0 +1,448 @@ +/* + * S9100-32X I2C CPLD driver + * + * Copyright (C) 2017 Ingrasys, Inc. + * Wade He + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "i2c_cpld.h" + +#ifdef DEBUG + #define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s[%d]: " fmt "\r\n", \ + __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ +} +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ +} + +/* CPLD sysfs attributes index */ +enum i2c_cpld_sysfs_attributes { + CPLD_ACCESS_REG, + CPLD_REGISTER_VAL, + CPLD_PORT_START, + CPLD_PORTS, + CPLD_VERSION, + CPLD_ID, + CPLD_BOARD_TYPE, + CPLD_EXT_BOARD_TYPE, + CPLD_PW_GOOD, + CPLD_PW_ABS, +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_cpld_version(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_board_type(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_ext_board_type(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_pw_good(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_pw_abs(struct device *dev, + struct device_attribute *da, char *buf); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +/* CPLD device id and data */ +static const struct i2c_device_id i2c_cpld_id[] = { + { "i2c_cpld", i2c_cpld }, + {} +}; + +/* Addresses scanned for i2c_cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x33, I2C_CLIENT_END }; +/* platform sysfs object */ +extern struct kobject *s9230_64x_kobj; + + +/* define all support register access of cpld in attribute */ +static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, + read_access_register, write_access_register, CPLD_ACCESS_REG); +static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, + read_register_value, write_register_value, CPLD_REGISTER_VAL); +static SENSOR_DEVICE_ATTR(cpld_version, S_IRUGO, + read_cpld_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(cpld_board_type, S_IRUGO, + read_board_type, NULL, CPLD_BOARD_TYPE); +static SENSOR_DEVICE_ATTR(cpld_ext_board_type, S_IRUGO, + read_ext_board_type, NULL, CPLD_EXT_BOARD_TYPE); +static SENSOR_DEVICE_ATTR(cpld_pw_good, S_IRUGO, + read_pw_good, NULL, CPLD_PW_GOOD); +static SENSOR_DEVICE_ATTR(cpld_pw_abs, S_IRUGO, + read_pw_abs, NULL, CPLD_PW_ABS); + + +/* define support attributes of cpldx , total 5 */ +/* cpld 1 */ +static struct attribute *i2c_cpld_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpld_board_type.dev_attr.attr, + &sensor_dev_attr_cpld_ext_board_type.dev_attr.attr, + &sensor_dev_attr_cpld_pw_good.dev_attr.attr, + &sensor_dev_attr_cpld_pw_abs.dev_attr.attr, + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group i2c_cpld_group = { + .attrs = i2c_cpld_attributes, +}; + +/* read access register from cpld data */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + + return sprintf(buf, "0x%x\n", reg); +} + +/* write access register to cpld data */ +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + + if (kstrtou8(buf, 0, ®) < 0) + return -EINVAL; + + data->access_reg = reg; + return count; +} + +/* read the value of access register in cpld data */ +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (reg_val < 0) + return -1; + + return sprintf(buf, "0x%x\n", reg_val); +} + +/* wrtie the value to access register in cpld data */ +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int ret = -EIO; + u8 reg = data->access_reg; + u8 reg_val; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val); + + return count; +} + +/* get cpdl version register value */ +static ssize_t read_cpld_version(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_VERSION) { + reg = CPLD_VERSION_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get board type register value */ +static ssize_t read_board_type(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_BOARD_TYPE) { + reg = CPLD_BOARD_TYPE_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get extend board type register value */ +static ssize_t read_ext_board_type(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_EXT_BOARD_TYPE) { + reg = CPLD_EXT_BOARD_TYPE_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get extend board type register value */ +static ssize_t read_pw_good(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_PW_GOOD) { + reg = CPLD_PW_GOOD_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get extend board type register value */ +static ssize_t read_pw_abs(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_PW_ABS) { + reg = CPLD_PW_ABS_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* add valid cpld client to list */ +static void i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int i2c_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + + status = sysfs_create_group(&client->dev.kobj,&i2c_cpld_group); + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + i2c_cpld_add_client(client); + + return 0; +exit: + sysfs_remove_group(&client->dev.kobj, &i2c_cpld_group); + return status; +} + +/* cpld drvier remove */ +static int i2c_cpld_remove(struct i2c_client *client) +{ + + sysfs_remove_group(&client->dev.kobj, &i2c_cpld_group); + + i2c_cpld_remove_client(client); + return 0; +} + +MODULE_DEVICE_TABLE(i2c, i2c_cpld_id); + +static struct i2c_driver i2c_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "i2c_cpld", + }, + .probe = i2c_cpld_probe, + .remove = i2c_cpld_remove, + .id_table = i2c_cpld_id, + .address_list = cpld_i2c_addr, +}; + +static int __init i2c_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&i2c_cpld_driver); +} + +static void __exit i2c_cpld_exit(void) +{ + i2c_del_driver(&i2c_cpld_driver); +} + +MODULE_AUTHOR("Wade He "); +MODULE_DESCRIPTION("Ingrasys S9100-32X Platform i2c cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(i2c_cpld_init); +module_exit(i2c_cpld_exit); + + + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/modules/i2c_cpld.h b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/modules/i2c_cpld.h new file mode 100644 index 00000000000..e103b05c717 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/modules/i2c_cpld.h @@ -0,0 +1,197 @@ +/* + * + * S9100-32X I2C CPLD driver header file + * + * Copyright (C) 2017 Ingrasys, Inc. + * Wade He + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef I2C_CPLD_H +#define I2C_CPLD_H + +// remove debug before release +#define DEBUG + +/* CPLD device index value */ +enum cpld_id { + i2c_cpld +}; + +/* port number on CPLD */ +#define CPLD_1_PORT_NUM 12 +#define CPLD_2_PORT_NUM 13 + +/* QSFP port number */ +#define QSFP_MAX_PORT_NUM 64 +#define QSFP_MIN_PORT_NUM 1 + +/* SFP+ port number */ +#define SFP_MAX_PORT_NUM 2 +#define SFP_MIN_PORT_NUM 1 + + +/* CPLD registers */ +#define CPLD_BOARD_TYPE_REG 0x0 +#define CPLD_EXT_BOARD_TYPE_REG 0x7 +#define CPLD_VERSION_REG 0x1 +#define CPLD_PW_GOOD_REG 0x2 +#define CPLD_PW_ABS_REG 0x3 + + +/* bit definition for register value */ + +enum CPLD_RESET_CONTROL_BITS { + CPLD_RESET_CONTROL_SWRST_BIT, + CPLD_RESET_CONTROL_CP2104RST_BIT, + CPLD_RESET_CONTROL_82P33814RST_BIT, + CPLD_RESET_CONTROL_BMCRST_BIT, +}; + +/* bit field structure for register value */ +struct cpld_reg_board_type_t { + u8 build_rev:2; + u8 hw_rev:2; + u8 board_id:4; +}; + +struct cpld_reg_version_t { + u8 revision:6; + u8 release:1; + u8 reserve:1; +}; + +struct cpld_reg_pw_good_t { + u8 reserve1:3; + u8 psu1:1; + u8 psu2:1; + u8 reserve2:3; +}; + +struct cpld_reg_pw_abs_t { + u8 psu1:1; + u8 psu2:1; + u8 reserve:6; +}; + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) +#define READ_BIT(val, bit) ((0u == (val & (1<bf_name) +#define READ_BF_1(bf_struct, val, bf_name, bf_value) \ + bf_struct bf; \ + bf.data = val; \ + bf_value = bf.bf_name +#define BOARD_TYPE_BUILD_REV_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, build_rev, res) +#define BOARD_TYPE_HW_REV_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, hw_rev, res) +#define BOARD_TYPE_BOARD_ID_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, board_id, res) +#define CPLD_VERSION_REV_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, revision, res) +#define CPLD_VERSION_REL_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, release, res) +#define CPLD_PSU1_PW_GOOD_GET(val, res) \ + READ_BF(cpld_reg_pw_good_t, val, psu1, res) +#define CPLD_PSU2_PW_GOOD_GET(val, res) \ + READ_BF(cpld_reg_pw_good_t, val, psu2, res) +#define CPLD_PSU1_PW_ABS_GET(val, res) \ + READ_BF(cpld_reg_pw_abs_t, val, psu1, res) +#define CPLD_PSU2_PW_ABS_GET(val, res) \ + READ_BF(cpld_reg_pw_abs_t, val, psu2, res) +/* QSFP/SFP registers manipulation */ +#define QSFP_TO_CPLD_IDX(qsfp_port, cpld_index, cpld_port) \ +{ \ + if (QSFP_MIN_PORT_NUM <= qsfp_port && qsfp_port <= CPLD_1_PORT_NUM) { \ + cpld_index = cpld1; \ + cpld_port = qsfp_port - 1; \ + } else if (CPLD_1_PORT_NUM < qsfp_port \ + && qsfp_port <= QSFP_MAX_PORT_NUM) { \ + cpld_index = cpld2 + (qsfp_port - 1 - CPLD_1_PORT_NUM) \ + / CPLD_2_PORT_NUM; \ + cpld_port = (qsfp_port - 1 - CPLD_1_PORT_NUM) % \ + CPLD_2_PORT_NUM; \ + } else { \ + cpld_index = 0; \ + cpld_port = 0; \ + } \ +} +#define SFP_TO_CPLD_IDX(sfp_port, cpld_index) \ + (cpld_index = sfp_port - SFP_MIN_PORT_NUM) +#define QSFP_PORT_STATUS_REG(cpld_port) \ + (CPLD_QSFP_PORT_STATUS_BASE_REG + cpld_port) +#define QSFP_PORT_CONFIG_REG(cpld_port) \ + (CPLD_QSFP_PORT_CONFIG_BASE_REG + cpld_port) +#define QSFP_PORT_INT_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_QSFP_PORT_STATUS_INT_BIT) +#define QSFP_PORT_ABS_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_QSFP_PORT_STATUS_ABS_BIT) +#define QSFP_PORT_RESET_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_LPMODE_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define QSFP_PORT_RESET_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_RESET_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_LPMODE_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define QSFP_PORT_LPMODE_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define SFP_PORT_PRESENT_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_STATUS_PRESENT_BIT) + + #define SFP_PORT_TXFAULT_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_STATUS_TXFAULT_BIT) + #define SFP_PORT_RXLOS_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_STATUS_RXLOS_BIT) + #define SFP_PORT_TXDIS_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_CONFIG_TXDIS_BIT) +#define SFP_PORT_RS_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_RS_BIT) +#define SFP_PORT_TS_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TS_BIT) +#define SFP_PORT_TXDIS_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TXDIS_BIT) +#define SFP_PORT_TXDIS_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TXDIS_BIT) +#define SFP_PORT_RS_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_RS_BIT) +#define SFP_PORT_RS_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_RS_BIT) +#define SFP_PORT_TS_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TS_BIT) +#define SFP_PORT_TS_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TS_BIT) + +/* CPLD access functions */ +extern int i2c_cpld_get_qsfp_port_status_val(u8 port_num); +extern int i2c_cpld_get_qsfp_port_config_val(u8 port_num); +extern int i2c_cpld_set_qsfp_port_config_val(u8 port_num, u8 reg_val); +extern int i2c_cpld_get_sfp_port_status_val(u8 port_num); +extern int i2c_cpld_get_sfp_port_config_val(u8 port_num); +extern int i2c_cpld_set_sfp_port_config_val(u8 port_num, u8 reg_val); +extern u8 fp_port_to_phy_port(u8 fp_port); +#endif + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/service/qsfp-monitor.service b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/service/qsfp-monitor.service new file mode 100644 index 00000000000..e33c2fdae12 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/service/qsfp-monitor.service @@ -0,0 +1,15 @@ +[Unit] +Description= This QSFP Monitor service is to setup QSFP SI. +Requires=s8900-54xc-monitor.service +After=s8900-54xc-monitor.service + +[Service] +ExecStart=/usr/sbin/qsfp_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/service/s8900-54xc-monitor.service b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/service/s8900-54xc-monitor.service new file mode 100644 index 00000000000..e43fddc9b85 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/service/s8900-54xc-monitor.service @@ -0,0 +1,18 @@ +[Unit] +Description= This Platform Monitor service is to initialize platform and monitor platform. +Before=platform-monitor.service +After=sysinit.target +Wants=fancontrol.service +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/sbin/i2c_utils.sh i2c_init +ExecStart=/usr/sbin/s8900_54xc_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/utils/i2c_utils.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/utils/i2c_utils.sh new file mode 100644 index 00000000000..dbea6378662 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/utils/i2c_utils.sh @@ -0,0 +1,1561 @@ +#!/bin/bash + +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# trun on for more debug output +#DEBUG="on" + +VERSION="1.1.0" +TRUE=200 +FALSE=404 +PORT_START=1 +PORT_END=54 + +EXEC_FUNC=${1} +COLOR_LED=${2} +QSFP_PORT=${2} +ONOFF_LED=${3} +FAN_TRAY=${4} + +############################################################ +# Distributor ID: Debian +# Description: Debian GNU/Linux 8.6 (jessie) +# Release: 8.6 +# Codename: jessie +# Linux debian 3.16.0-4-amd64 #1 +# SMP Debian 3.16.36-1+deb8u1 (2016-09-03) x86_64 GNU/Linux +############################################################ + +# Color Definition +COLOR_TITLE="\e[1;32m" ### Green ### +COLOR_WARNING="\e[1;33m" ### Yellow ### +COLOR_ERROR="\e[1;31m" ### Red ### +COLOR_END="\e[0m" ### END ### + +NUM_IGB_DEVICE=0 +NUM_I801_DEVICE=0 +NUM_ISMT_DEVICE=$(( ${NUM_I801_DEVICE} + 1 )) +NUM_MUX1_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 2 )) +NUM_MUX1_CHAN1_DEVICE=$(( ${NUM_I801_DEVICE} + 3 )) +NUM_MUX1_CHAN2_DEVICE=$(( ${NUM_I801_DEVICE} + 4 )) +NUM_MUX1_CHAN3_DEVICE=$(( ${NUM_I801_DEVICE} + 5 )) +NUM_MUX1_CHAN4_DEVICE=$(( ${NUM_I801_DEVICE} + 6 )) +NUM_MUX1_CHAN5_DEVICE=$(( ${NUM_I801_DEVICE} + 7 )) +NUM_MUX1_CHAN6_DEVICE=$(( ${NUM_I801_DEVICE} + 8 )) +NUM_MUX1_CHAN7_DEVICE=$(( ${NUM_I801_DEVICE} + 9 )) +NUM_MUX2_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 10 )) +NUM_MUX2_CHAN1_DEVICE=$(( ${NUM_I801_DEVICE} + 11 )) +NUM_MUX2_CHAN2_DEVICE=$(( ${NUM_I801_DEVICE} + 12 )) +NUM_MUX2_CHAN3_DEVICE=$(( ${NUM_I801_DEVICE} + 13 )) +NUM_MUX2_CHAN4_DEVICE=$(( ${NUM_I801_DEVICE} + 14 )) +NUM_MUX2_CHAN5_DEVICE=$(( ${NUM_I801_DEVICE} + 15 )) +NUM_MUX2_CHAN6_DEVICE=$(( ${NUM_I801_DEVICE} + 16 )) +NUM_MUX2_CHAN7_DEVICE=$(( ${NUM_I801_DEVICE} + 17 )) +NUM_MUX3_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 18 )) +NUM_MUX4_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 26 )) +NUM_MUX5_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 34 )) +NUM_MUX6_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 42 )) +NUM_MUX7_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 50 )) +NUM_MUX8_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 58 )) +NUM_MUX9_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 66 )) + +PATH_SYS_I2C_DEVICES="/sys/bus/i2c/devices" +PATH_HWMON_ROOT_DEVICES="/sys/class/hwmon" +PATH_HWMON_W83795_DEVICE="${PATH_HWMON_ROOT_DEVICES}/hwmon1" +PATH_I801_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_I801_DEVICE}" +PATH_ISMT_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_ISMT_DEVICE}" +PATH_MUX_CHAN0_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN0_DEVICE}" +PATH_MUX_CHAN1_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN1_DEVICE}" +PATH_MUX_CHAN2_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN2_DEVICE}" +PATH_MUX_CHAN3_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN3_DEVICE}" +PATH_MUX_CHAN4_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN4_DEVICE}" +PATH_MUX_CHAN5_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN5_DEVICE}" +PATH_MUX_CHAN6_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN6_DEVICE}" +PATH_MUX_CHAN7_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN7_DEVICE}" + +#SFP/QSFP EEPROM i2c bus index +SFP_EEPROM_BUS_IDX=0 + +#Power Supply Status +PSU_DC_ON=1 +PSU_DC_OFF=0 +PSU_EXIST=1 +PSU_NOT_EXIST=0 + +#GPIO Index for QSFP +ZQSFP_PORT0_15_ABS_GPIO_IDX=192 +ZQSFP_PORT16_31_ABS_GPIO_IDX=176 +ZQSFP_PORT32_47_ABS_GPIO_IDX=160 + +#GPIO Offset +GPIO_OFFSET=0 + +# Help usage function +function _help { + echo "=========================================================" + echo "# Description: Help Function" + echo "# Version : ${VERSION}" + echo "=========================================================" + echo "----------------------------------------------------" + echo "EX : ${0} help" + echo " : ${0} i2c_init" + echo " : ${0} i2c_deinit" + echo " : ${0} i2c_temp_init" + echo " : ${0} i2c_fan_init" + echo " : ${0} i2c_volmon_init" + echo " : ${0} i2c_io_exp_init" + echo " : ${0} i2c_gpio_init" + echo " : ${0} i2c_gpio_deinit" + echo " : ${0} i2c_led_test" + echo " : ${0} i2c_psu_eeprom_get" + echo " : ${0} i2c_mb_eeprom_get" + echo " : ${0} i2c_qsfp_eeprom_get [1-54]" + echo " : ${0} i2c_qsfp_status_get [1-54]" + echo " : ${0} i2c_qsfp_type_get [1-54]" + echo " : ${0} i2c_board_type_get" + echo " : ${0} i2c_psu_status" + echo " : ${0} i2c_led_psu_status_set" + echo " : ${0} i2c_led_fan_status_set" + echo " : ${0} i2c_led_fan_tray_status_set" + echo " : ${0} i2c_cpld_version" + echo " : ${0} i2c_front_temp" + echo " : ${0} i2c_rear_temp" + echo " : ${0} i2c_test_all" + echo " : ${0} i2c_sys_led green|amber on|off" + echo " : ${0} i2c_fan_led green|amber on|off" + echo " : ${0} i2c_psu1_led green|amber on|off" + echo " : ${0} i2c_psu2_led green|amber on|off" + echo " : ${0} i2c_fan_tray_led green|amber on|off [1-4]" + echo "----------------------------------------------------" +} + +#Pause function +function _pause { + read -p "$*" +} + +#Retry command function +function _retry { + for i in {1..5}; + do + eval "${*}" && break || echo "retry"; sleep 1; + done +} + + +#I2C Init +function _i2c_init { + echo "=========================================================" + echo "# Description: I2C Init" + echo "=========================================================" + + rmmod i2c_ismt + rmmod i2c_i801 + modprobe i2c_i801 + modprobe i2c_ismt + modprobe i2c_dev + modprobe i2c_mux_pca954x force_deselect_on_exit=1 + + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x70' > ${PATH_ISMT_DEVICE}/new_device" + else + echo "pca9548 0x70 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX2_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x72' > ${PATH_ISMT_DEVICE}/new_device" + else + echo "pca9548 0x72 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX3_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x71' > ${PATH_MUX_CHAN0_DEVICE}/new_device" + else + echo "pca9548 0x71 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX4_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x71' > ${PATH_MUX_CHAN1_DEVICE}/new_device" + else + echo "pca9548 0x71 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX5_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x71' > ${PATH_MUX_CHAN2_DEVICE}/new_device" + else + echo "pca9548 0x71 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX6_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x71' > ${PATH_MUX_CHAN3_DEVICE}/new_device" + else + echo "pca9548 0x71 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX7_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x71' > ${PATH_MUX_CHAN4_DEVICE}/new_device" + else + echo "pca9548 0x71 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX8_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x71' > ${PATH_MUX_CHAN5_DEVICE}/new_device" + else + echo "pca9548 0x71 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX9_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x71' > ${PATH_MUX_CHAN6_DEVICE}/new_device" + else + echo "pca9548 0x71 already init." + fi + + #Init CPLD LED_CLR Register (Front Port LED) + i2cset -y ${NUM_I801_DEVICE} 0x33 0x34 0x10 + + rmmod coretemp + rmmod jc42 + rmmod w83795 + _i2c_temp_init + _i2c_volmon_init + _i2c_hwmon_init + modprobe coretemp + modprobe w83795 + modprobe jc42 + modprobe sff_8436_eeprom + modprobe eeprom + modprobe eeprom_mb + _i2c_fan_init + _i2c_io_exp_init + rmmod gpio_ich + _i2c_gpio_init + modprobe gpio_ich + _i2c_cpld_init + _i2c_psu_eeprom_init + _i2c_led_psu_status_set + _i2c_led_fan_status_set + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_sys_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_sys_led + echo "Mount Main Board EEPROM" + echo "mb_eeprom 0x54" > /sys/bus/i2c/devices/i2c-17/new_device + for (( i=$PORT_START; i<=$PORT_END; i++ )) + do + _i2c_mount_sfp_eeprom $i + done + _config_rmem +} + +#I2C Deinit +function _i2c_deinit { + _i2c_gpio_deinit + for mod in coretemp jc42 w83795 eeprom_mb gpio-pca953x i2c_mux_pca954x i2c_ismt i2c_i801; + do + [ "$(lsmod | grep "^$mod ")" != "" ] && rmmod $mod + done +} + +#Temperature sensor Init +function _i2c_temp_init { + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x00 0x80 + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x05 0x7F + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x04 0x0A + echo "TEMP INIT Done" +} + +#FAN Init +function _i2c_fan_init { + echo -n "FAN INIT..." + if [ -e "${PATH_HWMON_W83795_DEVICE}" ]; then + echo 120 > ${PATH_HWMON_W83795_DEVICE}/device/pwm1 + echo 120 > ${PATH_HWMON_W83795_DEVICE}/device/pwm2 + echo "SUCCESS" + else + echo "FAIL" + fi + +} + +#VOLMON Init +function _i2c_volmon_init { + echo -n "VOLMON INIT..." + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x00 0x80 + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x02 0xFF + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x03 0x50 + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x04 0x0A + echo "Done" +} + +#HWMON Init +function _i2c_hwmon_init { + echo -n "HWMON INIT..." + i2cset -y ${NUM_I801_DEVICE} 0x2F 0x00 0x80 + i2cset -y ${NUM_I801_DEVICE} 0x2F 0x06 0xFF + echo "Done" +} + +#IO Expander Init +function _i2c_io_exp_init { + echo "=========================================================" + echo "# Description: I2C IO Expender Init" + echo "=========================================================" + #SMBUS0 IO_EXPENDER + i2cset -y -r ${NUM_I801_DEVICE} 0x27 4 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x27 5 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x27 6 0xFF + i2cset -y -r ${NUM_I801_DEVICE} 0x27 7 0xFF + + #SMBUS1 + #SFP+ ABS + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x21 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x21 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x22 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x22 5 0x00 + + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x20 6 0xFF + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x20 7 0xFF + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x21 6 0xFF + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x21 7 0xFF + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x22 6 0xFF + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x22 7 0xFF + + #QSFP/ZQSFP ABS + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x23 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x23 6 0xFF + + #QSFP/ZQSFP INT + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x23 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN0_DEVICE} 0x23 7 0xFF + + #SFP+ RX_LOS + i2cset -y -r ${NUM_MUX2_CHAN1_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN1_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN1_DEVICE} 0x21 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN1_DEVICE} 0x21 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN1_DEVICE} 0x22 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN1_DEVICE} 0x22 5 0x00 + + i2cset -y -r ${NUM_MUX2_CHAN1_DEVICE} 0x20 6 0xFF + i2cset -y -r ${NUM_MUX2_CHAN1_DEVICE} 0x20 7 0xFF + i2cset -y -r ${NUM_MUX2_CHAN1_DEVICE} 0x21 6 0xFF + i2cset -y -r ${NUM_MUX2_CHAN1_DEVICE} 0x21 7 0xFF + i2cset -y -r ${NUM_MUX2_CHAN1_DEVICE} 0x22 6 0xFF + i2cset -y -r ${NUM_MUX2_CHAN1_DEVICE} 0x22 7 0xFF + + #SFP+ TX_FAULT + i2cset -y -r ${NUM_MUX2_CHAN2_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN2_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN2_DEVICE} 0x21 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN2_DEVICE} 0x21 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN2_DEVICE} 0x22 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN2_DEVICE} 0x22 5 0x00 + + i2cset -y -r ${NUM_MUX2_CHAN2_DEVICE} 0x20 6 0xFF + i2cset -y -r ${NUM_MUX2_CHAN2_DEVICE} 0x20 7 0xFF + i2cset -y -r ${NUM_MUX2_CHAN2_DEVICE} 0x21 6 0xFF + i2cset -y -r ${NUM_MUX2_CHAN2_DEVICE} 0x21 7 0xFF + i2cset -y -r ${NUM_MUX2_CHAN2_DEVICE} 0x22 6 0xFF + i2cset -y -r ${NUM_MUX2_CHAN2_DEVICE} 0x22 7 0xFF + + #SFP+ TX_RS + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x21 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x21 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x22 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x22 5 0x00 + + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x20 2 0xFF + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x20 3 0xFF + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x21 2 0xFF + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x21 3 0xFF + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x22 2 0xFF + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x22 3 0xFF + + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x20 6 0xFF + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x20 7 0xFF + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x21 6 0xFF + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x21 7 0xFF + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x22 6 0xFF + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x22 7 0xFF + + #QSFP/zQSFP LPMODE + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x23 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x23 2 0x00 + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x23 6 0x00 + + #QSFP/zQSFP MODSEL + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x23 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x23 3 0x00 + i2cset -y -r ${NUM_MUX2_CHAN3_DEVICE} 0x23 7 0x00 + + #SFP+ RX_RS + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x21 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x21 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x22 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x22 5 0x00 + + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x20 2 0xFF + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x20 3 0xFF + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x21 2 0xFF + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x21 3 0xFF + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x22 2 0xFF + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x22 3 0xFF + + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x20 6 0x00 + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x20 7 0x00 + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x21 6 0x00 + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x21 7 0x00 + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x22 6 0x00 + i2cset -y -r ${NUM_MUX2_CHAN4_DEVICE} 0x22 7 0x00 + + #SFP+ TX_DIS + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x21 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x21 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x22 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x22 5 0x00 + + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x20 2 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x20 3 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x21 2 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x21 3 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x22 2 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x22 3 0x00 + + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x20 6 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x20 7 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x21 6 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x21 7 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x22 6 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x22 7 0x00 + + #QSFP/zQSFP RST + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x23 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x23 2 0xFF + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x23 6 0x00 + + #SFP/QSFP/zQSFP I/O + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x24 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x24 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x24 6 0xFF + i2cset -y -r ${NUM_MUX2_CHAN5_DEVICE} 0x24 7 0xFF + + #ZQSFP/SFP+/E-Card General + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x21 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x21 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x21 2 0x00 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x21 3 0x00 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x21 6 0xF4 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x21 7 0xF4 + + #LED board after PVT (S8900_IO_EXP_LED_ID) + echo "Init LED IO Expender" + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 6 0x00 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 7 0x00 + + #PSU I/O (S8900_IO_EXP_PSU_ID) + echo "Init PSU IO Expender" + i2cset -y -r ${NUM_MUX2_CHAN6_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN6_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN6_DEVICE} 0x20 2 0x00 + i2cset -y -r ${NUM_MUX2_CHAN6_DEVICE} 0x20 3 0x00 + i2cset -y -r ${NUM_MUX2_CHAN6_DEVICE} 0x20 6 0xFF + i2cset -y -r ${NUM_MUX2_CHAN6_DEVICE} 0x20 7 0xFF + + #FAN I/O (S8900_IO_EXP_FAN_ID) + echo "Init FAN IO Expender" + i2cset -y -r ${NUM_MUX2_CHAN7_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX2_CHAN7_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX2_CHAN7_DEVICE} 0x20 2 0x11 + i2cset -y -r ${NUM_MUX2_CHAN7_DEVICE} 0x20 3 0x11 + i2cset -y -r ${NUM_MUX2_CHAN7_DEVICE} 0x20 6 0xCC + i2cset -y -r ${NUM_MUX2_CHAN7_DEVICE} 0x20 7 0xCC +} + +function _get_sfp_eeprom_bus_idx { + case $1 in + 1|2|3|4|5|6|7|8) + SFP_EEPROM_BUS_IDX=$(( (${NUM_MUX3_CHAN0_DEVICE} + $1 - 1) )) + ;; + 9|10|11|12|13|14|15|16) + SFP_EEPROM_BUS_IDX=$(( (${NUM_MUX4_CHAN0_DEVICE} + $1 - 9) )) + ;; + 17|18|19|20|21|22|23|24) + SFP_EEPROM_BUS_IDX=$(( (${NUM_MUX5_CHAN0_DEVICE} + $1 - 17) )) + ;; + 25|26|27|28|29|30|31|32) + SFP_EEPROM_BUS_IDX=$(( (${NUM_MUX6_CHAN0_DEVICE} + $1 - 25) )) + ;; + 33|34|35|36|37|38|39|40) + SFP_EEPROM_BUS_IDX=$(( (${NUM_MUX7_CHAN0_DEVICE} + $1 - 33) )) + ;; + 41|42|43|44|45|46|47|48) + SFP_EEPROM_BUS_IDX=$(( (${NUM_MUX8_CHAN0_DEVICE} + $1 - 41) )) + ;; + 49|50|51|52|53|54) + SFP_EEPROM_BUS_IDX=$(( (${NUM_MUX9_CHAN0_DEVICE} + $1 - 49) )) + ;; + *) + SFP_EEPROM_BUS_IDX=-1 + ;; + esac +} + +#Mount SFP/QSFP EEPROM +function _i2c_mount_sfp_eeprom { + _get_sfp_eeprom_bus_idx $1 + eeprombus=${SFP_EEPROM_BUS_IDX} + eepromAddr=0x50 + echo "sff8436 $eepromAddr" > /sys/bus/i2c/devices/i2c-$eeprombus/new_device + echo "Mount Port $1 EEPROM" +} + +#Unmount SFP/QSFP EEPROM +function _i2c_unmount_sfp_eeprom { + _get_sfp_eeprom_bus_idx $1 + eeprombus=${SFP_EEPROM_BUS_IDX} + eepromAddr=0x50 + echo "$eepromAddr" > /sys/bus/i2c/devices/i2c-$eeprombus/new_device + echo "Unmount Port $1 EEPROM" +} + +# To set the global variable GPIO_OFFSET +function _set_gpio_offset { + GPIO_OFFSET=0 + for d in `ls /sys/class/gpio/ | grep gpiochip` + do + gpiochip_no=${d##gpiochip} + if [ $gpiochip_no -gt 255 ]; then + GPIO_OFFSET=256 + break + fi + done + #echo "set GPIO_OFFSET=${GPIO_OFFSET}" +} + +#GPIO Init +function _i2c_gpio_init { + + #QSFP/ZQSFP ABS+INT + echo "pca9535 0x23" > /sys/bus/i2c/devices/i2c-${NUM_MUX2_CHAN0_DEVICE}/new_device + _set_gpio_offset + for((i=${GPIO_OFFSET}+240;i<=${GPIO_OFFSET}+255;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + done + + #_retry "echo 240 > /sys/class/gpio/export" + #echo 241 > /sys/class/gpio/export + #echo 242 > /sys/class/gpio/export + #echo 243 > /sys/class/gpio/export + #echo 244 > /sys/class/gpio/export + #echo 245 > /sys/class/gpio/export + #echo 246 > /sys/class/gpio/export + #echo 247 > /sys/class/gpio/export + #echo 248 > /sys/class/gpio/export + #echo 249 > /sys/class/gpio/export + #echo 250 > /sys/class/gpio/export + #echo 251 > /sys/class/gpio/export + #echo 252 > /sys/class/gpio/export + #echo 253 > /sys/class/gpio/export + #echo 254 > /sys/class/gpio/export + #echo 255 > /sys/class/gpio/export + #echo 1 > /sys/class/gpio/gpio241/active_low #QSFP49 ABS + #echo 1 > /sys/class/gpio/gpio240/active_low #QSFP48 ABS + #echo 1 > /sys/class/gpio/gpio243/active_low #QSFP51 ABS + #echo 1 > /sys/class/gpio/gpio242/active_low #QSFP50 ABS + #echo 1 > /sys/class/gpio/gpio245/active_low #QSFP53 ABS + #echo 1 > /sys/class/gpio/gpio244/active_low #QSFP52 ABS + #echo 1 > /sys/class/gpio/gpio247/active_low #NA + #echo 1 > /sys/class/gpio/gpio246/active_low #NA + #echo 1 > /sys/class/gpio/gpio249/active_low #QSFP49 INT + #echo 1 > /sys/class/gpio/gpio248/active_low #QSFP48 INT + #echo 1 > /sys/class/gpio/gpio251/active_low #QSFP51 INT + #echo 1 > /sys/class/gpio/gpio250/active_low #QSFP50 INT + #echo 1 > /sys/class/gpio/gpio253/active_low #QSFP53 INT + #echo 1 > /sys/class/gpio/gpio252/active_low #QSFP52 INT + #echo 1 > /sys/class/gpio/gpio255/active_low #NA + #echo 1 > /sys/class/gpio/gpio254/active_low #NA + + #QSFP/zQSFP LPMODE+MODSEL + echo "pca9535 0x23" > /sys/bus/i2c/devices/i2c-${NUM_MUX2_CHAN3_DEVICE}/new_device + for((i=${GPIO_OFFSET}+224;i<=${GPIO_OFFSET}+239;i++)); + do + echo $i > /sys/class/gpio/export + echo out > /sys/class/gpio/gpio${i}/direction + done + + #echo 224 > /sys/class/gpio/export #QSFP0 LPMODE + #echo 225 > /sys/class/gpio/export #QSFP1 LPMODE + #echo 226 > /sys/class/gpio/export #QSFP2 LPMODE + #echo 227 > /sys/class/gpio/export #QSFP3 LPMODE + #echo 228 > /sys/class/gpio/export #QSFP4 LPMODE + #echo 229 > /sys/class/gpio/export #QSFP5 LPMODE + #echo 230 > /sys/class/gpio/export #NA + #echo 231 > /sys/class/gpio/export #NA + #echo 232 > /sys/class/gpio/export #QSFP0 MODSEL + #echo 233 > /sys/class/gpio/export #QSFP1 MODSEL + #echo 234 > /sys/class/gpio/export #QSFP2 MODSEL + #echo 235 > /sys/class/gpio/export #QSFP3 MODSEL + #echo 236 > /sys/class/gpio/export #QSFP4 MODSEL + #echo 237 > /sys/class/gpio/export #QSFP5 MODSEL + #echo 238 > /sys/class/gpio/export #NA + #echo 239 > /sys/class/gpio/export #NA + #echo out > /sys/class/gpio/gpio224/direction + #echo out > /sys/class/gpio/gpio225/direction + #echo out > /sys/class/gpio/gpio226/direction + #echo out > /sys/class/gpio/gpio227/direction + #echo out > /sys/class/gpio/gpio228/direction + #echo out > /sys/class/gpio/gpio229/direction + #echo out > /sys/class/gpio/gpio230/direction + #echo out > /sys/class/gpio/gpio231/direction + #echo out > /sys/class/gpio/gpio232/direction + #echo out > /sys/class/gpio/gpio233/direction + #echo out > /sys/class/gpio/gpio234/direction + #echo out > /sys/class/gpio/gpio235/direction + #echo out > /sys/class/gpio/gpio236/direction + #echo out > /sys/class/gpio/gpio237/direction + #echo out > /sys/class/gpio/gpio238/direction + #echo out > /sys/class/gpio/gpio239/direction + + #QSFP RST + echo "pca9535 0x23" > /sys/bus/i2c/devices/i2c-${NUM_MUX2_CHAN5_DEVICE}/new_device + for((i=${GPIO_OFFSET}+208;i<=${GPIO_OFFSET}+213;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + echo low > /sys/class/gpio/gpio${i}/direction + #echo out > /sys/class/gpio/gpio${i}/direction + #echo 0 > /sys/class/gpio/gpio${i}/value + done + for((i=${GPIO_OFFSET}+214;i<=${GPIO_OFFSET}+223;i++)); + do + echo $i > /sys/class/gpio/export + done + + #echo 208 > /sys/class/gpio/export #QSFP0 RST + #echo 209 > /sys/class/gpio/export #QSFP1 RST + #echo 210 > /sys/class/gpio/export #QSFP2 RST + #echo 211 > /sys/class/gpio/export #QSFP3 RST + #echo 212 > /sys/class/gpio/export #QSFP4 RST + #echo 213 > /sys/class/gpio/export #QSFP5 RST + #echo 214 > /sys/class/gpio/export #NA + #echo 215 > /sys/class/gpio/export #NA + #echo 216 > /sys/class/gpio/export #NA + #echo 217 > /sys/class/gpio/export #NA + #echo 218 > /sys/class/gpio/export #NA + #echo 219 > /sys/class/gpio/export #NA + #echo 220 > /sys/class/gpio/export #NA + #echo 221 > /sys/class/gpio/export #NA + #echo 222 > /sys/class/gpio/export #NA + #echo 223 > /sys/class/gpio/export #NA + #echo out > /sys/class/gpio/gpio208/direction + #echo out > /sys/class/gpio/gpio209/direction + #echo out > /sys/class/gpio/gpio210/direction + #echo out > /sys/class/gpio/gpio211/direction + #echo out > /sys/class/gpio/gpio212/direction + #echo out > /sys/class/gpio/gpio213/direction + #echo 1 > /sys/class/gpio/gpio208/active_low + #echo 1 > /sys/class/gpio/gpio209/active_low + #echo 1 > /sys/class/gpio/gpio210/active_low + #echo 1 > /sys/class/gpio/gpio211/active_low + #echo 1 > /sys/class/gpio/gpio212/active_low + #echo 1 > /sys/class/gpio/gpio213/active_low + #echo 0 > /sys/class/gpio/gpio208/value + #echo 0 > /sys/class/gpio/gpio209/value + #echo 0 > /sys/class/gpio/gpio210/value + #echo 0 > /sys/class/gpio/gpio211/value + #echo 0 > /sys/class/gpio/gpio212/value + #echo 0 > /sys/class/gpio/gpio213/value + + + #SFP+ ABS 0-15 + echo "pca9535 0x20" > /sys/bus/i2c/devices/i2c-${NUM_MUX2_CHAN0_DEVICE}/new_device + for((i=${GPIO_OFFSET}+192;i<=${GPIO_OFFSET}+207;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + done + + #echo 192 > /sys/class/gpio/export + #echo 193 > /sys/class/gpio/export + #echo 194 > /sys/class/gpio/export + #echo 195 > /sys/class/gpio/export + #echo 196 > /sys/class/gpio/export + #echo 197 > /sys/class/gpio/export + #echo 198 > /sys/class/gpio/export + #echo 199 > /sys/class/gpio/export + #echo 200 > /sys/class/gpio/export + #echo 201 > /sys/class/gpio/export + #echo 202 > /sys/class/gpio/export + #echo 203 > /sys/class/gpio/export + #echo 204 > /sys/class/gpio/export + #echo 205 > /sys/class/gpio/export + #echo 206 > /sys/class/gpio/export + #echo 207 > /sys/class/gpio/export + #echo 1 > /sys/class/gpio/gpio192/active_low #SFP+00 + #echo 1 > /sys/class/gpio/gpio193/active_low #SFP+01 + #echo 1 > /sys/class/gpio/gpio194/active_low #SFP+02 + #echo 1 > /sys/class/gpio/gpio195/active_low #SFP+03 + #echo 1 > /sys/class/gpio/gpio196/active_low #SFP+04 + #echo 1 > /sys/class/gpio/gpio197/active_low #SFP+05 + #echo 1 > /sys/class/gpio/gpio198/active_low #SFP+06 + #echo 1 > /sys/class/gpio/gpio199/active_low #SFP+07 + #echo 1 > /sys/class/gpio/gpio200/active_low #SFP+08 + #echo 1 > /sys/class/gpio/gpio201/active_low #SFP+09 + #echo 1 > /sys/class/gpio/gpio202/active_low #SFP+10 + #echo 1 > /sys/class/gpio/gpio203/active_low #SFP+11 + #echo 1 > /sys/class/gpio/gpio204/active_low #SFP+12 + #echo 1 > /sys/class/gpio/gpio205/active_low #SFP+13 + #echo 1 > /sys/class/gpio/gpio206/active_low #SFP+14 + #echo 1 > /sys/class/gpio/gpio207/active_low #SFP+15 + + #SFP+ ABS 16-31 + echo "pca9535 0x21" > /sys/bus/i2c/devices/i2c-${NUM_MUX2_CHAN0_DEVICE}/new_device + for((i=${GPIO_OFFSET}+176;i<=${GPIO_OFFSET}+191;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + done + + #echo 176 > /sys/class/gpio/export + #echo 177 > /sys/class/gpio/export + #echo 178 > /sys/class/gpio/export + #echo 179 > /sys/class/gpio/export + #echo 180 > /sys/class/gpio/export + #echo 181 > /sys/class/gpio/export + #echo 182 > /sys/class/gpio/export + #echo 183 > /sys/class/gpio/export + #echo 184 > /sys/class/gpio/export + #echo 185 > /sys/class/gpio/export + #echo 186 > /sys/class/gpio/export + #echo 187 > /sys/class/gpio/export + #echo 188 > /sys/class/gpio/export + #echo 189 > /sys/class/gpio/export + #echo 190 > /sys/class/gpio/export + #echo 191 > /sys/class/gpio/export + #echo 1 > /sys/class/gpio/gpio176/active_low #SFP+16 + #echo 1 > /sys/class/gpio/gpio177/active_low #SFP+17 + #echo 1 > /sys/class/gpio/gpio178/active_low #SFP+18 + #echo 1 > /sys/class/gpio/gpio179/active_low #SFP+19 + #echo 1 > /sys/class/gpio/gpio180/active_low #SFP+20 + #echo 1 > /sys/class/gpio/gpio181/active_low #SFP+21 + #echo 1 > /sys/class/gpio/gpio182/active_low #SFP+22 + #echo 1 > /sys/class/gpio/gpio183/active_low #SFP+23 + #echo 1 > /sys/class/gpio/gpio184/active_low #SFP+24 + #echo 1 > /sys/class/gpio/gpio185/active_low #SFP+25 + #echo 1 > /sys/class/gpio/gpio186/active_low #SFP+26 + #echo 1 > /sys/class/gpio/gpio187/active_low #SFP+27 + #echo 1 > /sys/class/gpio/gpio188/active_low #SFP+28 + #echo 1 > /sys/class/gpio/gpio189/active_low #SFP+29 + #echo 1 > /sys/class/gpio/gpio190/active_low #SFP+30 + #echo 1 > /sys/class/gpio/gpio191/active_low #SFP+31 + + #SFP+ ABS 32-47 + echo "pca9535 0x22" > /sys/bus/i2c/devices/i2c-${NUM_MUX2_CHAN0_DEVICE}/new_device + for((i=${GPIO_OFFSET}+160;i<=${GPIO_OFFSET}+175;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + done + + #echo 160 > /sys/class/gpio/export + #echo 161 > /sys/class/gpio/export + #echo 162 > /sys/class/gpio/export + #echo 163 > /sys/class/gpio/export + #echo 164 > /sys/class/gpio/export + #echo 165 > /sys/class/gpio/export + #echo 166 > /sys/class/gpio/export + #echo 167 > /sys/class/gpio/export + #echo 168 > /sys/class/gpio/export + #echo 169 > /sys/class/gpio/export + #echo 170 > /sys/class/gpio/export + #echo 171 > /sys/class/gpio/export + #echo 172 > /sys/class/gpio/export + #echo 173 > /sys/class/gpio/export + #echo 174 > /sys/class/gpio/export + #echo 175 > /sys/class/gpio/export + #echo 1 > /sys/class/gpio/gpio160/active_low #SFP+32 + #echo 1 > /sys/class/gpio/gpio161/active_low #SFP+33 + #echo 1 > /sys/class/gpio/gpio162/active_low #SFP+34 + #echo 1 > /sys/class/gpio/gpio163/active_low #SFP+35 + #echo 1 > /sys/class/gpio/gpio164/active_low #SFP+36 + #echo 1 > /sys/class/gpio/gpio165/active_low #SFP+37 + #echo 1 > /sys/class/gpio/gpio166/active_low #SFP+38 + #echo 1 > /sys/class/gpio/gpio167/active_low #SFP+39 + #echo 1 > /sys/class/gpio/gpio168/active_low #SFP+40 + #echo 1 > /sys/class/gpio/gpio169/active_low #SFP+41 + #echo 1 > /sys/class/gpio/gpio170/active_low #SFP+42 + #echo 1 > /sys/class/gpio/gpio171/active_low #SFP+43 + #echo 1 > /sys/class/gpio/gpio172/active_low #SFP+44 + #echo 1 > /sys/class/gpio/gpio173/active_low #SFP+45 + #echo 1 > /sys/class/gpio/gpio174/active_low #SFP+46 + #echo 1 > /sys/class/gpio/gpio175/active_low #SFP+47 + +} + +#GPIO DeInit +function _i2c_gpio_deinit { + echo "0x23" > /sys/bus/i2c/devices/i2c-${NUM_MUX2_CHAN0_DEVICE}/delete_device + echo "0x23" > /sys/bus/i2c/devices/i2c-${NUM_MUX2_CHAN3_DEVICE}/delete_device + echo "0x23" > /sys/bus/i2c/devices/i2c-${NUM_MUX2_CHAN5_DEVICE}/delete_device + echo "0x20" > /sys/bus/i2c/devices/i2c-${NUM_MUX2_CHAN0_DEVICE}/delete_device + echo "0x21" > /sys/bus/i2c/devices/i2c-${NUM_MUX2_CHAN0_DEVICE}/delete_device + echo "0x22" > /sys/bus/i2c/devices/i2c-${NUM_MUX2_CHAN0_DEVICE}/delete_device +} + +#I2C CPLD init +function _i2c_cpld_init { + echo "=========================================================" + echo "# Description: I2C CPLD Init..." + echo "=========================================================" + + ## modprobe i2c_cpld + modprobe i2c_cpld + ## Add CPLD device + echo "i2c_cpld 0x33" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_I801_DEVICE}/new_device + + echo "done..." +} + +#Set FAN Tray LED +function _i2c_led_fan_tray_status_set { + echo "FAN Tray Status Setup" + #FAN Status get + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN2_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan2_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN4_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan4_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN6_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan6_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + FAN8_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan8_alarm` + + if [ "${FAN1_ALARM}" == "0" ] && [ "${FAN2_ALARM}" == "0" ]; then + FAN_TRAY=1 + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=1 + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + if [ "${FAN3_ALARM}" == "0" ] && [ "${FAN4_ALARM}" == "0" ]; then + FAN_TRAY=2 + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=2 + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + if [ "${FAN5_ALARM}" == "0" ] && [ "${FAN6_ALARM}" == "0" ]; then + FAN_TRAY=3 + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=3 + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + if [ "${FAN7_ALARM}" == "0" ] && [ "${FAN8_ALARM}" == "0" ]; then + FAN_TRAY=4 + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=4 + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi +} + +#Set FAN LED +function _i2c_led_fan_status_set { + echo "FAN Status Setup" + #PSU Status set + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN2_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan2_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN4_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan4_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN6_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan6_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + FAN8_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan8_alarm` + + if [ "${FAN1_ALARM}" == "0" ] && [ "${FAN2_ALARM}" == "0" ] \ + && [ "${FAN3_ALARM}" == "0" ] && [ "${FAN4_ALARM}" == "0" ] \ + && [ "${FAN5_ALARM}" == "0" ] && [ "${FAN6_ALARM}" == "0" ] \ + && [ "${FAN7_ALARM}" == "0" ] && [ "${FAN8_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + fi +} + +#Set Power Supply LED +function _i2c_led_psu_status_set { + echo "PSU LED Status Setup" + + #PSU Status set + _i2c_psu_status + + #PSU1 Status + if [ "${psu1Exist}" == ${PSU_EXIST} ]; then + if [ "${psu1PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + fi + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + fi + + #PSU2 Status + if [ "${psu2Exist}" == ${PSU_EXIST} ]; then + if [ "${psu2PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + fi + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + fi +} + +#LED Test +function _i2c_led_test { + echo "=========================================================" + echo "# Description: I2C LED TEST..." + echo "=========================================================" + #sys led (green) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x7F + _pause 'Check SYS LED green light and Press [Enter] key to continue...' + #sys led (amber) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xBF + _pause 'Check SYS LED amber light and Press [Enter] key to continue...' + + #FAN led (green) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xF7 + _pause 'Check FAN LED green light and Press [Enter] key to continue...' + #FAN led (amber) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFB + _pause 'Check FAN LED amber light and Press [Enter] key to continue...' + + #PSU2 led (green) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xDF + _pause 'Check PSU2 LED green light and Press [Enter] key to continue...' + #PSU2 led (amber) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xEF + _pause 'Check PSU2 LED amber light and Press [Enter] key to continue...' + + #PSU1 led (green) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFD + _pause 'Check PSU1 LED green light and Press [Enter] key to continue...' + #PSU1 led (amber) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFE + _pause 'Check PSU1 LED amber light and Press [Enter] key to continue...' + + #Turn OFF All LED + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + _pause 'Check turn off all LEDs and Press [Enter] key to continue...' + echo "done..." +} + +#Set QSFP Port variable +function _qsfp_port_i2c_var_set { + local port=$1 + case ${port} in + 1|2|3|4|5|6|7|8) + i2cbus=${NUM_MUX2_CHAN0_DEVICE} + regAddr=0x20 + dataAddr=0 + gpioBase=$((${GPIO_OFFSET}+${ZQSFP_PORT0_15_ABS_GPIO_IDX})) + #gpioBase=${ZQSFP_PORT0_15_ABS_GPIO_IDX} + ;; + 9|10|11|12|13|14|15|16) + i2cbus=${NUM_MUX2_CHAN0_DEVICE} + regAddr=0x20 + dataAddr=1 + gpioBase=$((${GPIO_OFFSET}+${ZQSFP_PORT0_15_ABS_GPIO_IDX})) + #gpioBase=${ZQSFP_PORT0_15_ABS_GPIO_IDX} + ;; + 17|18|19|20|21|22|23|24) + i2cbus=${NUM_MUX2_CHAN0_DEVICE} + regAddr=0x21 + dataAddr=0 + gpioBase=$((${GPIO_OFFSET}+${ZQSFP_PORT16_31_ABS_GPIO_IDX})) + #gpioBase=${ZQSFP_PORT16_31_ABS_GPIO_IDX} + ;; + 25|26|27|28|29|30|31|32) + i2cbus=${NUM_MUX2_CHAN0_DEVICE} + regAddr=0x21 + dataAddr=1 + gpioBase=$((${GPIO_OFFSET}+${ZQSFP_PORT16_31_ABS_GPIO_IDX})) + #gpioBase=${ZQSFP_PORT16_31_ABS_GPIO_IDX} + ;; + 33|34|35|36|37|38|39|40) + i2cbus=${NUM_MUX2_CHAN0_DEVICE} + regAddr=0x22 + dataAddr=0 + gpioBase=$((${GPIO_OFFSET}+${ZQSFP_PORT32_47_ABS_GPIO_IDX})) + #gpioBase=${ZQSFP_PORT32_47_ABS_GPIO_IDX} + ;; + 41|42|43|44|45|46|47|48) + i2cbus=${NUM_MUX2_CHAN0_DEVICE} + regAddr=0x22 + dataAddr=1 + gpioBase=$((${GPIO_OFFSET}+${ZQSFP_PORT32_47_ABS_GPIO_IDX})) + #gpioBase=${ZQSFP_PORT32_47_ABS_GPIO_IDX} + ;; + 49|50|51|52|53|54) + i2cbus=${NUM_MUX2_CHAN0_DEVICE} + regAddr=0x23 + dataAddr=0 + gpioBase=$((${GPIO_OFFSET}+240-48)) + #gpioBase=$((240 - 48)) + ;; + *) + echo "Please input 1~54" + exit ${FALSE} + ;; + esac +} + +#Get QSFP present +function _i2c_qsfp_status_get { + local status + _qsfp_port_i2c_var_set ${QSFP_PORT} + if [ ${QSFP_PORT} -lt 49 ] && [ ${QSFP_PORT} -gt 0 ]; then + status=`cat /sys/class/gpio/gpio$(( $(($gpioBase + (${QSFP_PORT} - 1) % 16 )) ))/value` + elif [ ${QSFP_PORT} -ge 49 ] && [ ${QSFP_PORT} -le 54 ]; then + status=`cat /sys/class/gpio/gpio$(( $(($gpioBase + (${QSFP_PORT} - 1))) ))/value` + fi + + echo "status=$status" +} + +#Get QSFP type +function _i2c_qsfp_type_get { + _get_sfp_eeprom_bus_idx ${QSFP_PORT} + eeprombus=${SFP_EEPROM_BUS_IDX} + eepromAddr=0x50 + qsfp_info=$(base64 ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/eeprom) + + if [ ${QSFP_PORT} -ge 1 ] && [ ${QSFP_PORT} -le 48 ]; then + echo "sfp" + # 1~48 port is sfp port + identifier=$(echo $qsfp_info | base64 -d -i | hexdump -s 0 -n 1 -e '"%x"') + connector=$(echo $qsfp_info | base64 -d -i | hexdump -s 2 -n 1 -e '"%x"') + transceiver=$(echo $qsfp_info | base64 -d -i | hexdump -s 3 -n 1 -e '"%x"') + else + echo "qsfp" + # 49~54 port is qsfp port + identifier=$(echo $qsfp_info | base64 -d -i | hexdump -s 128 -n 1 -e '"%x"') + connector=$(echo $qsfp_info | base64 -d -i | hexdump -s 130 -n 1 -e '"%x"') + transceiver=$(echo $qsfp_info | base64 -d -i | hexdump -s 131 -n 1 -e '"%x"') + fi + + echo "identifier=$identifier" + echo "connector=$connector" + echo "transceiver=$transceiver" +} + +#Get QSFP EEPROM Information +function _i2c_qsfp_eeprom_get { + + _qsfp_port_i2c_var_set ${QSFP_PORT} + + if [ ${QSFP_PORT} -lt 49 ] && [ ${QSFP_PORT} -gt 0 ]; then + + #status: 0 -> Down, 1 -> Up + status=`cat /sys/class/gpio/gpio$(( $(($gpioBase + (${QSFP_PORT} - 1) % 16 )) ))/value` + echo $status + + if [ $status = 0 ]; then + exit + fi + + _get_sfp_eeprom_bus_idx ${QSFP_PORT} + eeprombus=${SFP_EEPROM_BUS_IDX} + eepromAddr=0x50 + cat ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/eeprom | hexdump -C + elif [ ${QSFP_PORT} -ge 49 ] && [ ${QSFP_PORT} -le 54 ]; then + #status: 0 -> Down, 1 -> Up + status=`cat /sys/class/gpio/gpio$(( $(($gpioBase + (${QSFP_PORT} - 1))) ))/value` + echo $status + + if [ $status = 0 ]; then + exit + fi + _get_sfp_eeprom_bus_idx ${QSFP_PORT} + eeprombus=${SFP_EEPROM_BUS_IDX} + eepromAddr=0x50 + cat ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/eeprom | hexdump -C + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi +} + +#PSU EEPROM init +function _i2c_psu_eeprom_init { + echo "=========================================================" + echo "# Description: I2C PSU EEPROM Init..." + echo "=========================================================" + + ## modprobe eeprom + modprobe eeprom + ## PUS(0) EEPROM + echo "eeprom 0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX2_CHAN6_DEVICE}/new_device + + ## PUS(1) EEPROM + echo "eeprom 0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX2_CHAN7_DEVICE}/new_device + + echo "done..." +} + +#Get PSU EEPROM Information +function _i2c_psu_eeprom_get { + echo "=========================================================" + echo "# Description: I2C PSU EEPROM Get..." + echo "=========================================================" + + ## modprobe eeprom + modprobe eeprom + ## PUS(0) EEPROM + cat ${PATH_SYS_I2C_DEVICES}/${NUM_MUX2_CHAN6_DEVICE}-0050/eeprom | hexdump -C + + ## PUS(1) EEPROM + cat ${PATH_SYS_I2C_DEVICES}/${NUM_MUX2_CHAN7_DEVICE}-0050/eeprom | hexdump -C + + echo "done..." +} + +#Get MotherBoard EEPROM Information +function _i2c_mb_eeprom_get { + echo "=========================================================" + echo "# Description: I2C MB EEPROM Get..." + echo "=========================================================" + + ## modprobe eeprom + modprobe eeprom_mb + + ## MB EEPROM + cat ${PATH_SYS_I2C_DEVICES}/${NUM_MUX2_CHAN7_DEVICE}-0054/eeprom | hexdump -C + echo "done..." +} + +#Set System Status LED +function _i2c_sys_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x80 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x80 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x40 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x40 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Set PSU2 LED +function _i2c_psu2_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x20 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x20 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x10 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x10 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Set FAN Tray LED +function _i2c_fan_tray_led { + case ${FAN_TRAY} in + 1) + i2cAddr=0x20 + ioPort=2 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 2) + i2cAddr=0x20 + ioPort=2 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + 3) + i2cAddr=0x20 + ioPort=3 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 4) + i2cAddr=0x20 + ioPort=3 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + *) + echo "Please input 1~4" + exit + ;; + esac + + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m $mask -y -r ${NUM_MUX2_CHAN7_DEVICE} $i2cAddr $ioPort 0x33 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m $mask -y -r ${NUM_MUX2_CHAN7_DEVICE} $i2cAddr $ioPort 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m $mask -y -r ${NUM_MUX2_CHAN7_DEVICE} $i2cAddr $ioPort 0x33 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m $mask -y -r ${NUM_MUX2_CHAN7_DEVICE} $i2cAddr $ioPort 0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Set FAN LED +function _i2c_fan_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x08 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x08 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x04 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x04 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Set PSU1 LED +function _i2c_psu1_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x02 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x02 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x01 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x01 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Get Board Version and Type +function _i2c_board_type_get { + boardType=`cat ${PATH_SYS_I2C_DEVICES}/0-0033/cpld_board_type` + boardBuildRev=$((($boardType) & 0x03)) + boardHwRev=$((($boardType) >> 2 & 0x03)) + boardId=$((($boardType) >> 4)) + printf "BOARD_ID is 0x%02x, HW Rev %d, Build Rev %d\n" $boardId $boardHwRev $boardBuildRev + +} + +#Get CPLD Version +function _i2c_cpld_version { + cpldRev=`cat ${PATH_SYS_I2C_DEVICES}/0-0033/cpld_version` + cpldRelease=$((($cpldRev) >> 6 & 0x01)) + cpldVersion=$((($cpldRev) & 0x3F)) + printf "CPLD is %s version(0:RD 1:Release), Revision is 0x%02x\n" $cpldRelease $cpldVersion + +} + +#Get PSU Status +function _i2c_psu_status { + psuPresent=`cat ${PATH_SYS_I2C_DEVICES}/0-0033/cpld_pw_abs` + psu1Exist=$(($((($psuPresent) & 0x01))?0:1)) + psu2Exist=$(($((($psuPresent) & 0x02))?0:1)) + psuPwGood=`cat ${PATH_SYS_I2C_DEVICES}/0-0033/cpld_pw_good` + psu1PwGood=$(($((($psuPwGood) >> 3 & 0x01))?1:0)) + psu2PwGood=$(($((($psuPwGood) >> 3 & 0x02))?1:0)) + printf "PSU1 Exist:%d PSU1 PW Good:%d\n" $psu1Exist $psu1PwGood + printf "PSU2 Exist:%d PSU2 PW Good:%d\n" $psu2Exist $psu2PwGood +} + +#Get Front Sensor Temperature +function _i2c_front_temp { + #Front MAC + sensors | grep 'Front MAC Temp' -A 1 +} + +#Get Rear Sensor Temperature +function _i2c_rear_temp { + #Rear MAC + sensors | grep 'Rear MAC Temp' -A 1 +} + +#Increase read socket buffer for CoPP Test +function _config_rmem { + echo "109430400" > /proc/sys/net/core/rmem_max +} + +#Main Function +function _main { + tart_time_str=`date` + start_time_sec=$(date +%s) + + _set_gpio_offset + if [ "${EXEC_FUNC}" == "help" ]; then + _help + elif [ "${EXEC_FUNC}" == "i2c_init" ]; then + _i2c_init + elif [ "${EXEC_FUNC}" == "i2c_deinit" ]; then + _i2c_deinit + elif [ "${EXEC_FUNC}" == "i2c_temp_init" ]; then + _i2c_temp_init + elif [ "${EXEC_FUNC}" == "i2c_fan_init" ]; then + _i2c_fan_init + elif [ "${EXEC_FUNC}" == "i2c_volmon_init" ]; then + _i2c_volmon_init + elif [ "${EXEC_FUNC}" == "i2c_io_exp_init" ]; then + _i2c_io_exp_init + elif [ "${EXEC_FUNC}" == "i2c_gpio_init" ]; then + _i2c_gpio_init + elif [ "${EXEC_FUNC}" == "i2c_gpio_deinit" ]; then + _i2c_gpio_deinit + elif [ "${EXEC_FUNC}" == "i2c_led_test" ]; then + _i2c_led_test + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_get" ]; then + _i2c_mb_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_psu_eeprom_get" ]; then + _i2c_psu_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_get" ]; then + _i2c_qsfp_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_status_get" ]; then + _i2c_qsfp_status_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_type_get" ]; then + _i2c_qsfp_type_get + elif [ "${EXEC_FUNC}" == "i2c_led_psu_status_set" ]; then + _i2c_led_psu_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_status_set" ]; then + _i2c_led_fan_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_tray_status_set" ]; then + _i2c_led_fan_tray_status_set + elif [ "${EXEC_FUNC}" == "i2c_sys_led" ]; then + _i2c_sys_led + elif [ "${EXEC_FUNC}" == "i2c_fan_led" ]; then + _i2c_fan_led + elif [ "${EXEC_FUNC}" == "i2c_fan_tray_led" ]; then + _i2c_fan_tray_led + elif [ "${EXEC_FUNC}" == "i2c_psu1_led" ]; then + _i2c_psu1_led + elif [ "${EXEC_FUNC}" == "i2c_psu2_led" ]; then + _i2c_psu2_led + elif [ "${EXEC_FUNC}" == "i2c_board_type_get" ]; then + _i2c_board_type_get + elif [ "${EXEC_FUNC}" == "i2c_cpld_version" ]; then + _i2c_cpld_version + elif [ "${EXEC_FUNC}" == "i2c_psu_status" ]; then + _i2c_psu_status + elif [ "${EXEC_FUNC}" == "i2c_front_temp" ]; then + _i2c_front_temp + elif [ "${EXEC_FUNC}" == "i2c_rear_temp" ]; then + _i2c_rear_temp + elif [ "${EXEC_FUNC}" == "i2c_test_all" ]; then + _i2c_init + _i2c_temp_init + _i2c_fan_init + _i2c_io_exp_init + _i2c_led_test + _i2c_psu_eeprom_get + _i2c_mb_eeprom_get + _i2c_board_type_get + _i2c_cpld_version + _i2c_psu_status + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + if [ "$DEBUG" == "on" ]; then + echo "-----------------------------------------------------" + end_time_str=`date` + end_time_sec=$(date +%s) + diff_time=$[ ${end_time_sec} - ${start_time_sec} ] + echo "Start Time: ${start_time_str} (${start_time_sec})" + echo "End Time : ${end_time_str} (${end_time_sec})" + echo "Total Execution Time: ${diff_time} sec" + + echo "done!!!" + fi +} + +_main diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/utils/qsfp_monitor.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/utils/qsfp_monitor.sh new file mode 100644 index 00000000000..7f50d137bcb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/utils/qsfp_monitor.sh @@ -0,0 +1,106 @@ +#!/bin/bash +# Copyright (C) 2017 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=3 +I2C_UTILS="/usr/sbin/i2c_utils.sh" +QSFP_SI_SCRIPT="/usr/sbin/qsfp_si_cfg.sh" +QSFP_ARRAY=(0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 \ + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ) + +#QSFP SI monitor +function _qsfp_si_monitor { + local i + local status + for i in {0..53}; + do + status=`${I2C_UTILS} i2c_qsfp_status_get $(expr $i + 1) | egrep '^status=.*$' | sed -e 's/status=//g'` + if [ "${status}" == "1" ]; then + _qsfp_type_check $i + fi + done +} + +#QSFP type +function _qsfp_type_check { + local port=$1 + local qsfp_type=`${I2C_UTILS} i2c_qsfp_type_get $(expr $port + 1)` + local identifier=`echo "$qsfp_type" | grep '^identifier=.*$' | sed -e 's/identifier=//g'` + # identifier 11 for qsfp, 3 for sfp + if [ "${identifier}" == "11" ] || [ "${identifier}" == "3" ]; then + connector=`echo "$qsfp_type" | grep '^connector=.*$' | sed -e 's/connector=//g'` + case ${connector} in + 21|23) + #DAC + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to DAC" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} dac $port >/dev/null + fi + ;; + *) + #AOC + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to AOC" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} aoc $port >/dev/null + fi + ;; + esac + fi +} + +#Docker exist check +function _docker_swss_check { + while true + do + # Check if syncd starts + result=`docker exec -i swss bash -c "echo -en \"SELECT 1\\nHLEN HIDDEN\" | redis-cli | sed -n 2p"` #TBD FIX ME + if [ "$result" == "3" ]; then + return + fi + sleep $INTERVAL + done +} + +#Docker exist check +function _qsfp_si_cfg_script_check { + + if [ -f ${QSFP_SI_SCRIPT} ] && [ -x ${QSFP_SI_SCRIPT} ]; then + echo "SI Script exists. Start monitor." + return + else + echo "SI Script not exist. Exit monitor." + exit + fi +} + +# main function +function _main { + #Check SI Script + _qsfp_si_cfg_script_check + #Check docker swss is running + _docker_swss_check + while true + do + _qsfp_si_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/utils/qsfp_si_cfg.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/utils/qsfp_si_cfg.sh new file mode 100644 index 00000000000..6ded3e522bc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/utils/qsfp_si_cfg.sh @@ -0,0 +1,331 @@ +#!/bin/bash +# Copyright (C) 2017 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +VERSION="1.0.0" +TRUE=200 +FALSE=404 + +TYPE=${1} +PORT=${2} + +# port number +MIN_PORT=0 +MAX_PORT=53 + +# INDEX of value field in array +SI_PRE_IDX=1 +SI_POST_IDX=2 +SI_MAIN_IDX=3 +SI_AMP_IDX=4 +SI_DRI_IDX=5 + +# type string +AOC_TYPE="aoc" +DAC_TYPE="dac" + +# si value for bcm command +SI_VAL="" + +# "PRE POST MAIN AMP DRIVERMODE" for each port in array +# TODO: need to change aoc si value when available +xe_aoc_si_value=( + "0x00 0x3e 0x32 0xf 0x0" #port 0 + "0x00 0x3a 0x36 0xf 0x0" #port 1 + "0x00 0x3a 0x36 0xf 0x0" #port 2 + "0x00 0x38 0x38 0xf 0x0" #port 3 + "0x00 0x37 0x39 0xf 0x0" #port 4 + "0x00 0x2e 0x42 0xf 0x0" #port 5 + "0x00 0x33 0x3d 0xf 0x0" #port 6 + "0x00 0x30 0x40 0xc 0x0" #port 7 + "0x00 0x2f 0x43 0xe 0x0" #port 8 + "0x00 0x2d 0x43 0xc 0x0" #port 9 + "0x00 0x2c 0x44 0xc 0x0" #port 10 + "0x00 0x2d 0x43 0xc 0x0" #port 11 + "0x00 0x29 0x47 0xc 0x0" #port 12 + "0x00 0x28 0x48 0xc 0x0" #port 13 + "0x00 0x29 0x47 0xa 0x0" #port 14 + "0x00 0x29 0x47 0xf 0x0" #port 15 + "0x00 0x18 0x58 0x9 0x0" #port 16 + "0x00 0x1d 0x53 0x9 0x0" #port 17 + "0x00 0x1c 0x54 0x9 0x0" #port 18 + "0x00 0x1c 0x54 0x9 0x0" #port 19 + "0x00 0x1c 0x54 0x9 0x0" #port 20 + "0x00 0x1c 0x54 0x9 0x0" #port 21 + "0x00 0x1c 0x54 0x9 0x0" #port 22 + "0x00 0x1c 0x54 0x9 0x0" #port 23 + "0x00 0x1c 0x54 0x8 0x0" #port 24 + "0x00 0x1c 0x54 0x8 0x0" #port 25 + "0x00 0x18 0x58 0x8 0x0" #port 26 + "0x00 0x18 0x58 0x8 0x0" #port 27 + "0x00 0x14 0x5c 0x8 0x0" #port 28 + "0x00 0x19 0x57 0x8 0x0" #port 29 + "0x00 0x19 0x57 0x8 0x0" #port 30 + "0x00 0x19 0x57 0x8 0x0" #port 31 + "0x00 0x19 0x57 0xc 0x0" #port 32 + "0x00 0x20 0x50 0x9 0x0" #port 33 + "0x00 0x21 0x4f 0xc 0x0" #port 34 + "0x00 0x24 0x4c 0xc 0x0" #port 35 + "0x00 0x24 0x4c 0xc 0x0" #port 36 + "0x00 0x24 0x4c 0xc 0x0" #port 37 + "0x00 0x24 0x4c 0xc 0x0" #port 38 + "0x00 0x24 0x4c 0xc 0x0" #port 39 + "0x00 0x28 0x48 0xd 0x0" #port 40 + "0x00 0x28 0x48 0xc 0x0" #port 41 + "0x00 0x29 0x47 0xe 0x0" #port 42 + "0x00 0x29 0x47 0xe 0x0" #port 43 + "0x00 0x29 0x47 0xe 0x0" #port 44 + "0x00 0x28 0x48 0xf 0x0" #port 45 + "0x00 0x28 0x48 0xf 0x0" #port 46 + "0x00 0x30 0x40 0xf 0x0" #port 47 +) + +# TODO: need to change aoc si value when available +ce_aoc_si_value=( + "0x00 0x28 0x48 0xc 0x0" #port 0 lane 0 + "0x00 0x29 0x41 0xc 0x0" #port 0 lane 1 + "0x00 0x29 0x41 0xf 0x0" #port 0 lane 2 + "0x00 0x29 0x41 0xc 0x0" #port 0 lane 3 + "0x00 0x28 0x42 0xc 0x0" #port 1 lane 0 + "0x00 0x3a 0x36 0xf 0x0" #port 1 lane 1 + "0x00 0x2c 0x44 0xc 0x0" #port 1 lane 2 + "0x00 0x2c 0x44 0xc 0x0" #port 1 lane 3 + "0x00 0x2f 0x41 0xc 0x0" #port 2 lane 0 + "0x00 0x38 0x38 0xc 0x0" #port 2 lane 1 + "0x00 0x2f 0x41 0xc 0x0" #port 2 lane 2 + "0x00 0x30 0x40 0xc 0x0" #port 2 lane 3 + "0x00 0x30 0x40 0xc 0x0" #port 3 lane 0 + "0x00 0x3f 0x31 0xf 0x0" #port 3 lane 1 + "0x00 0x31 0x3f 0xc 0x0" #port 3 lane 2 + "0x00 0x30 0x40 0xa 0x0" #port 3 lane 3 + "0x00 0x30 0x40 0xc 0x0" #port 4 lane 0 + "0x00 0x31 0x3f 0xf 0x0" #port 4 lane 1 + "0x00 0x2f 0x41 0xc 0x0" #port 4 lane 2 + "0x00 0x2e 0x42 0xc 0x0" #port 4 lane 3 + "0x00 0x30 0x40 0xe 0x0" #port 5 lane 0 + "0x00 0x3f 0x31 0xf 0x0" #port 5 lane 1 + "0x00 0x38 0x38 0xf 0x0" #port 5 lane 2 + "0x00 0x3f 0x31 0xf 0x0" #port 5 lane 3 +) + +xe_dac_si_value=( + "0x00 0x3e 0x32 0xf 0x0" #port 0 + "0x00 0x3a 0x36 0xf 0x0" #port 1 + "0x00 0x3a 0x36 0xf 0x0" #port 2 + "0x00 0x38 0x38 0xf 0x0" #port 3 + "0x00 0x37 0x39 0xf 0x0" #port 4 + "0x00 0x2e 0x42 0xf 0x0" #port 5 + "0x00 0x33 0x3d 0xf 0x0" #port 6 + "0x00 0x30 0x40 0xc 0x0" #port 7 + "0x00 0x2f 0x43 0xe 0x0" #port 8 + "0x00 0x2d 0x43 0xc 0x0" #port 9 + "0x00 0x2c 0x44 0xc 0x0" #port 10 + "0x00 0x2d 0x43 0xc 0x0" #port 11 + "0x00 0x29 0x47 0xc 0x0" #port 12 + "0x00 0x28 0x48 0xc 0x0" #port 13 + "0x00 0x29 0x47 0xa 0x0" #port 14 + "0x00 0x29 0x47 0xf 0x0" #port 15 + "0x00 0x18 0x58 0x9 0x0" #port 16 + "0x00 0x1d 0x53 0x9 0x0" #port 17 + "0x00 0x1c 0x54 0x9 0x0" #port 18 + "0x00 0x1c 0x54 0x9 0x0" #port 19 + "0x00 0x1c 0x54 0x9 0x0" #port 20 + "0x00 0x1c 0x54 0x9 0x0" #port 21 + "0x00 0x1c 0x54 0x9 0x0" #port 22 + "0x00 0x1c 0x54 0x9 0x0" #port 23 + "0x00 0x1c 0x54 0x8 0x0" #port 24 + "0x00 0x1c 0x54 0x8 0x0" #port 25 + "0x00 0x18 0x58 0x8 0x0" #port 26 + "0x00 0x18 0x58 0x8 0x0" #port 27 + "0x00 0x14 0x5c 0x8 0x0" #port 28 + "0x00 0x19 0x57 0x8 0x0" #port 29 + "0x00 0x19 0x57 0x8 0x0" #port 30 + "0x00 0x19 0x57 0x8 0x0" #port 31 + "0x00 0x19 0x57 0xc 0x0" #port 32 + "0x00 0x20 0x50 0x9 0x0" #port 33 + "0x00 0x21 0x4f 0xc 0x0" #port 34 + "0x00 0x24 0x4c 0xc 0x0" #port 35 + "0x00 0x24 0x4c 0xc 0x0" #port 36 + "0x00 0x24 0x4c 0xc 0x0" #port 37 + "0x00 0x24 0x4c 0xc 0x0" #port 38 + "0x00 0x24 0x4c 0xc 0x0" #port 39 + "0x00 0x28 0x48 0xd 0x0" #port 40 + "0x00 0x28 0x48 0xc 0x0" #port 41 + "0x00 0x29 0x47 0xe 0x0" #port 42 + "0x00 0x29 0x47 0xe 0x0" #port 43 + "0x00 0x29 0x47 0xe 0x0" #port 44 + "0x00 0x28 0x48 0xf 0x0" #port 45 + "0x00 0x28 0x48 0xf 0x0" #port 46 + "0x00 0x30 0x40 0xf 0x0" #port 47 +) + +ce_dac_si_value=( + "0x00 0x28 0x48 0xc 0x0" #port 0 lane 0 + "0x00 0x29 0x41 0xc 0x0" #port 0 lane 1 + "0x00 0x29 0x41 0xf 0x0" #port 0 lane 2 + "0x00 0x29 0x41 0xc 0x0" #port 0 lane 3 + "0x00 0x28 0x42 0xc 0x0" #port 1 lane 0 + "0x00 0x3a 0x36 0xf 0x0" #port 1 lane 1 + "0x00 0x2c 0x44 0xc 0x0" #port 1 lane 2 + "0x00 0x2c 0x44 0xc 0x0" #port 1 lane 3 + "0x00 0x2f 0x41 0xc 0x0" #port 2 lane 0 + "0x00 0x38 0x38 0xc 0x0" #port 2 lane 1 + "0x00 0x2f 0x41 0xc 0x0" #port 2 lane 2 + "0x00 0x30 0x40 0xc 0x0" #port 2 lane 3 + "0x00 0x30 0x40 0xc 0x0" #port 3 lane 0 + "0x00 0x3f 0x31 0xf 0x0" #port 3 lane 1 + "0x00 0x31 0x3f 0xc 0x0" #port 3 lane 2 + "0x00 0x30 0x40 0xa 0x0" #port 3 lane 3 + "0x00 0x30 0x40 0xc 0x0" #port 4 lane 0 + "0x00 0x31 0x3f 0xf 0x0" #port 4 lane 1 + "0x00 0x2f 0x41 0xc 0x0" #port 4 lane 2 + "0x00 0x2e 0x42 0xc 0x0" #port 4 lane 3 + "0x00 0x30 0x40 0xe 0x0" #port 5 lane 0 + "0x00 0x3f 0x31 0xf 0x0" #port 5 lane 1 + "0x00 0x38 0x38 0xf 0x0" #port 5 lane 2 + "0x00 0x3f 0x31 0xf 0x0" #port 5 lane 3 +) + +#get field value in si value array for xe port +function get_xe_si { + local port=$1 + local field=$2 + local type=$3 + local index=$port + if [ "$type" == "${AOC_TYPE}" ]; then + SI_VAL=$(echo "${xe_aoc_si_value[$index]}" | awk '{print $'$field'}') + else + SI_VAL=$(echo "${xe_dac_si_value[$index]}" | awk '{print $'$field'}') + fi +} + +#get field value in si value array for ce port +function get_ce_si { + local port=$1 + local lane=$2 + local field=$3 + local type=$4 + index=$(( (${port}-1)*4+${lane} )) + if [ "$type" == "${AOC_TYPE}" ]; then + SI_VAL=$(echo "${ce_aoc_si_value[$index]}" | awk '{print $'$field'}') + else + SI_VAL=$(echo "${ce_dac_si_value[$index]}" | awk '{print $'$field'}') + fi +} + +# set si value for xe port +function _qsfp_xe_si_set { + # convert PORT to xe port index + local xe_port=$PORT + # generate command for SI PRE value + get_xe_si $xe_port $SI_PRE_IDX $TYPE + local pre_cmd="phy xe${xe_port} CL93N72_UT_CTL2r CL93N72_TXFIR_PRE=${SI_VAL}" + # generate command for SI POST value + get_xe_si $xe_port $SI_POST_IDX $TYPE + local post_cmd="phy xe${xe_port} CL93N72_UT_CTL2r CL93N72_TXFIR_POST=${SI_VAL}" + # generate command for SI MAIN value + get_xe_si $xe_port $SI_MAIN_IDX $TYPE + local main_cmd="phy xe${xe_port} CL93N72_UT_CTL3r CL93N72_TXFIR_MAIN=${SI_VAL}" + # generate command for SI AMP CONTROL value + get_xe_si $xe_port $SI_AMP_IDX $TYPE + local amp_val=$SI_VAL + get_xe_si $xe_port $SI_DRI_IDX $TYPE + local dri_val=$SI_VAL + local amp_cmd="phy xe${xe_port} AMS_TX_CTL2r AMS_TX_AMP_CTL=${amp_val} AMS_TX_DRIVERMODE=${dri_val}" + # apply bcmcmd + bcmcmd "${pre_cmd};${post_cmd};${main_cmd};${amp_cmd}" +} + +# set aoc si value for ce port +function _qsfp_ce_si_set { + # convert PORT to ce port index + local ce_port=$(( $PORT - 48 )) + for lane in {0..3}; + do + # generate command for SI PRE value + get_ce_si $ce_port $lane $SI_PRE_IDX $TYPE + local pre_cmd="phy ce${ce_port} CL93N72_UT_CTL2r.${lane} CL93N72_TXFIR_PRE=${SI_VAL}" + # generate command for SI POST value + get_ce_si $ce_port $lane $SI_POST_IDX $TYPE + local post_cmd="phy ce${ce_port} CL93N72_UT_CTL2r.${lane} CL93N72_TXFIR_POST=${SI_VAL}" + # generate command for SI MAIN value + get_ce_si $ce_port $lane $SI_MAIN_IDX $TYPE + local main_cmd="phy ce${ce_port} CL93N72_UT_CTL3r.${lane} CL93N72_TXFIR_MAIN=${SI_VAL}" + # generate command for SI AMP CONTROL value + get_ce_si $ce_port $lane $SI_AMP_IDX $TYPE + local amp_val=$SI_VAL + get_ce_si $ce_port $lane $SI_AMP_IDX $TYPE + local dri_val=$SI_VAL + local amp_cmd="phy ce${ce_port} AMS_TX_CTL2r.${lane} AMS_TX_AMP_CTL=${amp_val} AMS_TX_DRIVERMODE=${dri_val}" + # apply bcmcmd + bcmcmd "${pre_cmd};${post_cmd};${main_cmd};${amp_cmd}" + done +} + +#QSFP SI value set +function _qsfp_si_set { + if [[ $PORT -le 47 && $PORT -ge 0 ]]; then + # xe port + _qsfp_xe_si_set + else + # ce port + _qsfp_ce_si_set + fi +} + +function _util_input_check { + # input parameter validation + if [[ $1 -lt $2 || $1 -gt $3 ]]; then + echo "Please input number $2~$3" + exit + fi +} + +# Help usage function +function _help { + echo "=========================================================" + echo "# Description: Help Function" + echo "=========================================================" + echo "----------------------------------------------------" + echo "EX : ${0} help" + echo " : ${0} ${AOC_TYPE} [${MIN_PORT}-${MAX_PORT}]" + echo " : ${0} ${DAC_TYPE} [${MIN_PORT}-${MAX_PORT}]" + echo "----------------------------------------------------" +} + +#Main Function +function _main { + + # TODO: remove after SI value ready + #exit ${TRUE} + + if [ -z $PORT ]; then + _help + exit ${FALSE} + fi + + if [ "${TYPE}" == "help" ]; then + _help + elif [ "${TYPE}" == "${AOC_TYPE}" ] || [ "${TYPE}" == "${DAC_TYPE}" ]; then + _util_input_check "$PORT" "$MIN_PORT" "$MAX_PORT" + _qsfp_si_set + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi +} + +_main diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/utils/s8900_54xc_monitor.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/utils/s8900_54xc_monitor.sh new file mode 100755 index 00000000000..974da6d5001 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-54xc/utils/s8900_54xc_monitor.sh @@ -0,0 +1,39 @@ +#!/bin/bash +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=5 +I2C_UTILS="/usr/sbin/i2c_utils.sh" + + +# LED status monitor +function _led_monitor { + ${I2C_UTILS} i2c_led_fan_status_set >/dev/null + ${I2C_UTILS} i2c_led_psu_status_set >/dev/null + ${I2C_UTILS} i2c_led_fan_tray_status_set >/dev/null +} + +# main function +function _main { + while true + do + _led_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/README.md b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/README.md new file mode 100644 index 00000000000..28f395216e3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/README.md @@ -0,0 +1,185 @@ +# Ingrasys S8900-64XC Platform Driver for SONiC + +Copyright (C) 2016 Ingrasys, Inc. + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + + +## Licensing terms + +The Licensing terms of the files within this project is split 2 parts. +The Linux kernel is released under the GNU General Public License version 2. +All other code is released under the GNU General Public License version 3. +Please see the LICENSE file for copies of both licenses. + +## Contents of this package + + - service/ + > Service config files for platform initialization and monitoring + - utils/ + > Scripts useful during platform bringup and sysfs function + - conf/ + > Platform configure files. + +## Kernel modules and drivers + +The driver for interacting with Ingrasys S8900-64XC is contained in the I2C +kernel module and initialization script. The initialization script loads +the modules in the correct order. It has been built and tested against +the Linux 3.16 kernel. + +The initialization script will modprobe the needed modules, navigate to the +module's device directory in sysfs, and write configuration data to +the kernel module. + +### IGB + +This is OOB Ports on front panel for management plane. + +The IGB module must be loaded first on Ingrasys S8900-64XC platform. + +### I2C i801 + +The I2C i801 on Ingrasys S8900-64XC can be found in +`/sys/bus/i2c/devices/i2c-0/` + +This is I2C bus for Clock Gen, DIMM channel and digital potentiometers. + +The i801 module must be loaded second on Ingrasys S8900-64XC. + +### I2C iSMT + +The I2C iSMT module on S8900-64XC can be found in +`/sys/bus/i2c/devices/i2c-1/` + +This is I2C bus for CPLD, HWM, power controller and I2C Switches. + +The i801 module must be loaded third on Ingrasys S8900-64XC. + +### I2C PCA9548 +The PCA9548 module on S8900-64XC can be found in +`/sys/bus/i2c/devices/i2c-2/` , `/sys/bus/i2c/devices/i2c-3/`, +`/sys/bus/i2c/devices/i2c-4/`, `/sys/bus/i2c/devices/i2c-5/`, +`/sys/bus/i2c/devices/i2c-6/`, `/sys/bus/i2c/devices/i2c-7/`, +`/sys/bus/i2c/devices/i2c-8/`, `/sys/bus/i2c/devices/i2c-9/`. + +The pca9548 module for zQSFP module get/set functions, PSU information, +fan status and EEPROM. + +## Hardware components + +The hardware components are initialized in the init script on S8900-64XC. +The following describes manual initialization as well as interaction. +The examples below are just for Ingrasys S8900-64XC platform. + +### Hardware initialization + +When the sonic-platform-ingrasys-s8900-64xc package is installed on the S8900-64XC, +it is automatically initialized. If you want to manual initialization, the +utility command usage as follows: +``` + i2c_utils.sh i2c_init +``` + +### EEPROM + +The EEPROM is including the board SKU, model name, vendor name, serial number, +and other information can be accessed with the specific eeprom kernel module. +After using `modprobe eeprom_mb` to detect the eeprom, it will show up in sysfs. + +The hexdump utility can be used to decode the raw output of the EEPROM. +For example, +``` + bash# echo "mb_eeprom 0x54" > /sys/bus/i2c/devices/i2c-9/new_device + bash# cat /sys/bus/i2c/drivers/mb_eeprom/9-0054/eeprom | hexdump -C +``` + +### Front panel LEDs + +LEDs can be setup on/off by using i2c utility `/usr/sbin/i2c_utils.sh`. +Utility function command usage as follows: + +``` +Status LED: + i2c_utils.sh i2c_sys_led green|amber on|off + +Fan status LED: + i2c_utils.sh i2c_fan_led green|amber on|off + +PSU1 status LED: + i2c_utils.sh i2c_psu1_led green|amber on|off + +PSU2 status LED: + i2c_utils.sh i2c_psu2_led green|amber on|off + +``` +QSFP Module Port LEDs control by ASIC library. + + +### Fan speed + +Fan speed are controlled by the w83795 kernel module. +It can be found in `/sys/class/hwmon/hwmon1/device/`. +If they were compiled as modules, you will need to modprobe w83795 for +their sysfs entries to show up. Each fan has an `fan_input` file +for reading the fan speed. And `pwm1` setting fan1 to fan4, +`pwm2` setting fan5 to fan8. + +There is docker-platform-monitor container installed fancontrol package that can +automatic control platform fan speed. + + +### Temperature sensors + +Temperature sensors are controlled by the w83795 kernel +module. It can be found in `/sys/class/hwmon/hwmon1/device/`. +If they were compiled as modules, then you will need to modprobe w83795 for +their sysfs entries to show up. +`temp1_input` is front MAC temperature sensor. `temp2_input` is rear MAC +temperature sensor. + +There is docker-platform-monitor container installed lm-sensors package that can +monitor platform temperature. And `sensors` command can show each +temperature sensors status. + +### Power supplies + +Power supplies status and its EEPROM info can be used i2c utility +`/usr/sbin/i2c_utils.sh` to get. +The usage as follows: +``` +PSU EEPROM: + i2c_utils.sh i2c_psu_eeprom_get + hexdump -C psu0.rom + hexdump -C psu1.rom + +PSU Status: + i2c_utils.sh i2c_psu_status +``` + +### QSFPs +QSFP modules are managed by the pca9548 kernel driver. +The i2c utility `/usr/sbin/i2c_utils.sh` can be used to get status and +module EEPROM informations. +The usage as follows: +``` +QSFP EEPROM: + i2c_utils.sh i2c_qsfp_eeprom_get [1-32] + +QSFP Insert Event: + i2c_utils.sh i2c_qsfp_eeprom_get [1-32] + 0 => not insert + 1 => inserted +``` + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/Makefile b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/Makefile new file mode 100644 index 00000000000..bf7d4baed71 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/Makefile @@ -0,0 +1,4 @@ +#ccflags-y += -DDEBUG +obj-m := eeprom_mb.o +obj-m+= qsfp_cpld.o +obj-m+= i2c_cpld.o diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/eeprom_mb.c b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/eeprom_mb.c new file mode 100644 index 00000000000..0886cad58eb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/eeprom_mb.c @@ -0,0 +1,212 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57, I2C_CLIENT_END }; + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void mb_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t mb_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + mb_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute mb_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = mb_eeprom_read, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int mb_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x50. So decline + attaching to addresses >= 0x51 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x51) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int mb_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &mb_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int mb_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &mb_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id mb_eeprom_id[] = { + { "mb_eeprom", 0 }, + { } +}; + +static struct i2c_driver mb_eeprom_driver = { + .driver = { + .name = "mb_eeprom", + }, + .probe = mb_eeprom_probe, + .remove = mb_eeprom_remove, + .id_table = mb_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = mb_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(mb_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("Ingrasys S8900 Mother Borad EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/i2c_cpld.c b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/i2c_cpld.c new file mode 100644 index 00000000000..626c63177b5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/i2c_cpld.c @@ -0,0 +1,448 @@ +/* + * S9100-32X I2C CPLD driver + * + * Copyright (C) 2017 Ingrasys, Inc. + * Wade He + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "i2c_cpld.h" + +#ifdef DEBUG + #define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s[%d]: " fmt "\r\n", \ + __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ +} +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ +} + +/* CPLD sysfs attributes index */ +enum i2c_cpld_sysfs_attributes { + CPLD_ACCESS_REG, + CPLD_REGISTER_VAL, + CPLD_PORT_START, + CPLD_PORTS, + CPLD_VERSION, + CPLD_ID, + CPLD_BOARD_TYPE, + CPLD_EXT_BOARD_TYPE, + CPLD_PW_GOOD, + CPLD_PW_ABS, +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_cpld_version(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_board_type(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_ext_board_type(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_pw_good(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_pw_abs(struct device *dev, + struct device_attribute *da, char *buf); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +/* CPLD device id and data */ +static const struct i2c_device_id i2c_cpld_id[] = { + { "i2c_cpld", i2c_cpld }, + {} +}; + +/* Addresses scanned for i2c_cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x33, I2C_CLIENT_END }; +/* platform sysfs object */ +extern struct kobject *s9230_64x_kobj; + + +/* define all support register access of cpld in attribute */ +static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, + read_access_register, write_access_register, CPLD_ACCESS_REG); +static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, + read_register_value, write_register_value, CPLD_REGISTER_VAL); +static SENSOR_DEVICE_ATTR(cpld_version, S_IRUGO, + read_cpld_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(cpld_board_type, S_IRUGO, + read_board_type, NULL, CPLD_BOARD_TYPE); +static SENSOR_DEVICE_ATTR(cpld_ext_board_type, S_IRUGO, + read_ext_board_type, NULL, CPLD_EXT_BOARD_TYPE); +static SENSOR_DEVICE_ATTR(cpld_pw_good, S_IRUGO, + read_pw_good, NULL, CPLD_PW_GOOD); +static SENSOR_DEVICE_ATTR(cpld_pw_abs, S_IRUGO, + read_pw_abs, NULL, CPLD_PW_ABS); + + +/* define support attributes of cpldx , total 5 */ +/* cpld 1 */ +static struct attribute *i2c_cpld_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpld_board_type.dev_attr.attr, + &sensor_dev_attr_cpld_ext_board_type.dev_attr.attr, + &sensor_dev_attr_cpld_pw_good.dev_attr.attr, + &sensor_dev_attr_cpld_pw_abs.dev_attr.attr, + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group i2c_cpld_group = { + .attrs = i2c_cpld_attributes, +}; + +/* read access register from cpld data */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + + return sprintf(buf, "0x%x\n", reg); +} + +/* write access register to cpld data */ +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + + if (kstrtou8(buf, 0, ®) < 0) + return -EINVAL; + + data->access_reg = reg; + return count; +} + +/* read the value of access register in cpld data */ +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (reg_val < 0) + return -1; + + return sprintf(buf, "0x%x\n", reg_val); +} + +/* wrtie the value to access register in cpld data */ +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int ret = -EIO; + u8 reg = data->access_reg; + u8 reg_val; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val); + + return count; +} + +/* get cpdl version register value */ +static ssize_t read_cpld_version(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_VERSION) { + reg = CPLD_VERSION_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get board type register value */ +static ssize_t read_board_type(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_BOARD_TYPE) { + reg = CPLD_BOARD_TYPE_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get extend board type register value */ +static ssize_t read_ext_board_type(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_EXT_BOARD_TYPE) { + reg = CPLD_EXT_BOARD_TYPE_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get extend board type register value */ +static ssize_t read_pw_good(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_PW_GOOD) { + reg = CPLD_PW_GOOD_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get extend board type register value */ +static ssize_t read_pw_abs(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_PW_ABS) { + reg = CPLD_PW_ABS_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* add valid cpld client to list */ +static void i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int i2c_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + + status = sysfs_create_group(&client->dev.kobj,&i2c_cpld_group); + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + i2c_cpld_add_client(client); + + return 0; +exit: + sysfs_remove_group(&client->dev.kobj, &i2c_cpld_group); + return status; +} + +/* cpld drvier remove */ +static int i2c_cpld_remove(struct i2c_client *client) +{ + + sysfs_remove_group(&client->dev.kobj, &i2c_cpld_group); + + i2c_cpld_remove_client(client); + return 0; +} + +MODULE_DEVICE_TABLE(i2c, i2c_cpld_id); + +static struct i2c_driver i2c_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "i2c_cpld", + }, + .probe = i2c_cpld_probe, + .remove = i2c_cpld_remove, + .id_table = i2c_cpld_id, + .address_list = cpld_i2c_addr, +}; + +static int __init i2c_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&i2c_cpld_driver); +} + +static void __exit i2c_cpld_exit(void) +{ + i2c_del_driver(&i2c_cpld_driver); +} + +MODULE_AUTHOR("Wade He "); +MODULE_DESCRIPTION("Ingrasys S9100-32X Platform i2c cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(i2c_cpld_init); +module_exit(i2c_cpld_exit); + + + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/i2c_cpld.h b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/i2c_cpld.h new file mode 100644 index 00000000000..e103b05c717 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/i2c_cpld.h @@ -0,0 +1,197 @@ +/* + * + * S9100-32X I2C CPLD driver header file + * + * Copyright (C) 2017 Ingrasys, Inc. + * Wade He + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef I2C_CPLD_H +#define I2C_CPLD_H + +// remove debug before release +#define DEBUG + +/* CPLD device index value */ +enum cpld_id { + i2c_cpld +}; + +/* port number on CPLD */ +#define CPLD_1_PORT_NUM 12 +#define CPLD_2_PORT_NUM 13 + +/* QSFP port number */ +#define QSFP_MAX_PORT_NUM 64 +#define QSFP_MIN_PORT_NUM 1 + +/* SFP+ port number */ +#define SFP_MAX_PORT_NUM 2 +#define SFP_MIN_PORT_NUM 1 + + +/* CPLD registers */ +#define CPLD_BOARD_TYPE_REG 0x0 +#define CPLD_EXT_BOARD_TYPE_REG 0x7 +#define CPLD_VERSION_REG 0x1 +#define CPLD_PW_GOOD_REG 0x2 +#define CPLD_PW_ABS_REG 0x3 + + +/* bit definition for register value */ + +enum CPLD_RESET_CONTROL_BITS { + CPLD_RESET_CONTROL_SWRST_BIT, + CPLD_RESET_CONTROL_CP2104RST_BIT, + CPLD_RESET_CONTROL_82P33814RST_BIT, + CPLD_RESET_CONTROL_BMCRST_BIT, +}; + +/* bit field structure for register value */ +struct cpld_reg_board_type_t { + u8 build_rev:2; + u8 hw_rev:2; + u8 board_id:4; +}; + +struct cpld_reg_version_t { + u8 revision:6; + u8 release:1; + u8 reserve:1; +}; + +struct cpld_reg_pw_good_t { + u8 reserve1:3; + u8 psu1:1; + u8 psu2:1; + u8 reserve2:3; +}; + +struct cpld_reg_pw_abs_t { + u8 psu1:1; + u8 psu2:1; + u8 reserve:6; +}; + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) +#define READ_BIT(val, bit) ((0u == (val & (1<bf_name) +#define READ_BF_1(bf_struct, val, bf_name, bf_value) \ + bf_struct bf; \ + bf.data = val; \ + bf_value = bf.bf_name +#define BOARD_TYPE_BUILD_REV_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, build_rev, res) +#define BOARD_TYPE_HW_REV_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, hw_rev, res) +#define BOARD_TYPE_BOARD_ID_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, board_id, res) +#define CPLD_VERSION_REV_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, revision, res) +#define CPLD_VERSION_REL_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, release, res) +#define CPLD_PSU1_PW_GOOD_GET(val, res) \ + READ_BF(cpld_reg_pw_good_t, val, psu1, res) +#define CPLD_PSU2_PW_GOOD_GET(val, res) \ + READ_BF(cpld_reg_pw_good_t, val, psu2, res) +#define CPLD_PSU1_PW_ABS_GET(val, res) \ + READ_BF(cpld_reg_pw_abs_t, val, psu1, res) +#define CPLD_PSU2_PW_ABS_GET(val, res) \ + READ_BF(cpld_reg_pw_abs_t, val, psu2, res) +/* QSFP/SFP registers manipulation */ +#define QSFP_TO_CPLD_IDX(qsfp_port, cpld_index, cpld_port) \ +{ \ + if (QSFP_MIN_PORT_NUM <= qsfp_port && qsfp_port <= CPLD_1_PORT_NUM) { \ + cpld_index = cpld1; \ + cpld_port = qsfp_port - 1; \ + } else if (CPLD_1_PORT_NUM < qsfp_port \ + && qsfp_port <= QSFP_MAX_PORT_NUM) { \ + cpld_index = cpld2 + (qsfp_port - 1 - CPLD_1_PORT_NUM) \ + / CPLD_2_PORT_NUM; \ + cpld_port = (qsfp_port - 1 - CPLD_1_PORT_NUM) % \ + CPLD_2_PORT_NUM; \ + } else { \ + cpld_index = 0; \ + cpld_port = 0; \ + } \ +} +#define SFP_TO_CPLD_IDX(sfp_port, cpld_index) \ + (cpld_index = sfp_port - SFP_MIN_PORT_NUM) +#define QSFP_PORT_STATUS_REG(cpld_port) \ + (CPLD_QSFP_PORT_STATUS_BASE_REG + cpld_port) +#define QSFP_PORT_CONFIG_REG(cpld_port) \ + (CPLD_QSFP_PORT_CONFIG_BASE_REG + cpld_port) +#define QSFP_PORT_INT_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_QSFP_PORT_STATUS_INT_BIT) +#define QSFP_PORT_ABS_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_QSFP_PORT_STATUS_ABS_BIT) +#define QSFP_PORT_RESET_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_LPMODE_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define QSFP_PORT_RESET_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_RESET_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_LPMODE_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define QSFP_PORT_LPMODE_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define SFP_PORT_PRESENT_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_STATUS_PRESENT_BIT) + + #define SFP_PORT_TXFAULT_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_STATUS_TXFAULT_BIT) + #define SFP_PORT_RXLOS_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_STATUS_RXLOS_BIT) + #define SFP_PORT_TXDIS_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_CONFIG_TXDIS_BIT) +#define SFP_PORT_RS_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_RS_BIT) +#define SFP_PORT_TS_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TS_BIT) +#define SFP_PORT_TXDIS_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TXDIS_BIT) +#define SFP_PORT_TXDIS_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TXDIS_BIT) +#define SFP_PORT_RS_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_RS_BIT) +#define SFP_PORT_RS_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_RS_BIT) +#define SFP_PORT_TS_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TS_BIT) +#define SFP_PORT_TS_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TS_BIT) + +/* CPLD access functions */ +extern int i2c_cpld_get_qsfp_port_status_val(u8 port_num); +extern int i2c_cpld_get_qsfp_port_config_val(u8 port_num); +extern int i2c_cpld_set_qsfp_port_config_val(u8 port_num, u8 reg_val); +extern int i2c_cpld_get_sfp_port_status_val(u8 port_num); +extern int i2c_cpld_get_sfp_port_config_val(u8 port_num); +extern int i2c_cpld_set_sfp_port_config_val(u8 port_num, u8 reg_val); +extern u8 fp_port_to_phy_port(u8 fp_port); +#endif + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/qsfp_cpld.c b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/qsfp_cpld.c new file mode 100644 index 00000000000..8ec03ecea34 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/modules/qsfp_cpld.c @@ -0,0 +1,1771 @@ +/* + * S8900-64XC QSFP CPLD driver + * + * Copyright (C) 2017 Ingrasys, Inc. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#ifdef DEBUG + #define DEBUG_PRINT(fmt, args...) \ + printk (KERN_INFO "%s[%d]: " fmt "\r\n", \ + __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +#define ERROR_MSG(fmt, args...) \ + printk(KERN_ERR "%s[%d]: " fmt "\r\n", \ + __FUNCTION__, __LINE__, ##args) + + + + +#define SFF_8436_MMAP_SIZE (256) +#define EEPROM_SIZE (5 * 128) /* 640 byte eeprom */ +#define EEPROM_PAGE_SIZE (128) +#define EEPROM_DEFAULT_PAGE (0) +#define I2C_RW_RETRY_COUNT (3) +#define I2C_RW_RETRY_INTERVAL (100) /* ms */ +#define USE_I2C_BLOCK_READ (1) + +#define SFP_EEPROM_A0_I2C_ADDR (0xA0 >> 1) + +#define SFF_8436_PAGE_PROV_ADDR (0xC3) /* Memory Page 01/02 Provided */ +#define SFF_8436_PAGE_01_PRESENT (1 << 6) /* Memory Page 01 present */ +#define SFF_8436_PAGE_02_PRESENT (1 << 7) /* Memory Page 02 present */ +#define SFF_8436_PAGE_SELECT_ADDR (0x7F) +#define SFF_8436_STATUS_ADDR (0x02) +#define SFF_8436_STATUS_PAGE_03_PRESENT_L (1 << 2) /* Flat Memory:0-Paging, 1-Page 0 only */ + +#define S8900_64XC_MUX_BASE_NR 1 +#define S8900_64XC_SFP_EEPROM_BASE_NR 2 +#define CPLD_DEVICE_NUM 3 +#define SFP_CPLD_DEVICE_NUM 2 +#define QSFP_EEPROM_DEVICE_NUM 3 +#define TOTAL_PORT_NUM 64 +#define CPLD_MUX_OFFSET 24 +#define SFP_EEPROM_DEV_NUM 3 +#define SFP_EEPROM_NAME_LEN 16 +/* CPLD registers */ +#define CPLD_REG_REV 0x01 +#define CPLD_REG_ID 0x02 +#define CPLD_MUX_REG 0x4a + +/* QSFP signal bit in register */ +#define BIT_RST 0 +#define BIT_LPM 2 +#define BIT_INT 0 +#define BIT_ABS 1 +#define BIT_ABS_2 5 + +static ssize_t sfp_eeprom_read(struct i2c_client *, loff_t, u8 *,int); +static ssize_t sfp_eeprom_write(struct i2c_client *, loff_t, const char *,int); + + +enum port_numbers { + sfp1, sfp2, sfp3, sfp4, sfp5, sfp6, sfp7, sfp8, + sfp9, sfp10, sfp11, sfp12, sfp13, sfp14, sfp15, sfp16, + sfp17, sfp18, sfp19, sfp20, sfp21, sfp22, sfp23, sfp24, + sfp25, sfp26, sfp27, sfp28, sfp29, sfp30, sfp31, sfp32, + sfp33, sfp34, sfp35, sfp36, sfp37, sfp38, sfp39, sfp40, + sfp41, sfp42, sfp43, sfp44, sfp45, sfp46, sfp47, sfp48, + qsfp49, qsfp50, qsfp51, qsfp52, qsfp53, qsfp54, qsfp55, qsfp56, + qsfp57, qsfp58, qsfp59, qsfp60, qsfp61, qsfp62, qsfp63, qsfp64 +}; + +static const struct platform_device_id qsfp_device_id[] = { + {"sfp1", sfp1}, {"sfp2", sfp2}, {"sfp3", sfp3}, {"sfp4", sfp4}, + {"sfp5", sfp5}, {"sfp6", sfp6}, {"sfp7", sfp7}, {"sfp8", sfp8}, + {"sfp9", sfp9}, {"sfp10", sfp10}, {"sfp11", sfp11}, {"sfp12", sfp12}, + {"sfp13", sfp13}, {"sfp14", sfp14}, {"sfp15", sfp15}, {"sfp16", sfp16}, + {"sfp17", sfp17}, {"sfp18", sfp18}, {"sfp19", sfp19}, {"sfp20", sfp20}, + {"sfp21", sfp21}, {"sfp22", sfp22}, {"sfp23", sfp23}, {"sfp24", sfp24}, + {"sfp25", sfp25}, {"sfp26", sfp26}, {"sfp27", sfp27}, {"sfp28", sfp28}, + {"sfp29", sfp29}, {"sfp30", sfp30}, {"sfp31", sfp31}, {"sfp32", sfp32}, + {"sfp33", sfp33}, {"sfp34", sfp34}, {"sfp35", sfp35}, {"sfp36", sfp36}, + {"sfp37", sfp37}, {"sfp38", sfp38}, {"sfp39", sfp39}, {"sfp40", sfp40}, + {"sfp41", sfp41}, {"sfp42", sfp42}, {"sfp43", sfp43}, {"sfp44", sfp44}, + {"sfp45", sfp45}, {"sfp46", sfp46}, {"sfp47", sfp47}, {"sfp48", sfp48}, + {"qsfp49", qsfp49}, {"qsfp50", qsfp50}, {"qsfp51", qsfp51}, {"qsfp52", qsfp52}, + {"qsfp53", qsfp53}, {"qsfp54", qsfp54}, {"qsfp55", qsfp55}, {"qsfp56", qsfp56}, + {"qsfp57", qsfp57}, {"qsfp58", qsfp58}, {"qsfp59", qsfp59}, {"qsfp60", qsfp60}, + {"qsfp61", qsfp61}, {"qsfp62", qsfp62}, {"qsfp63", qsfp63}, {"qsfp64", qsfp64}, + {} +}; +MODULE_DEVICE_TABLE(platform, qsfp_device_id); + +/* + * list of valid port types + * note OOM_PORT_TYPE_NOT_PRESENT to indicate no + * module is present in this port + */ +typedef enum oom_driver_port_type_e { + OOM_DRIVER_PORT_TYPE_INVALID, + OOM_DRIVER_PORT_TYPE_NOT_PRESENT, + OOM_DRIVER_PORT_TYPE_SFP, + OOM_DRIVER_PORT_TYPE_SFP_PLUS, + OOM_DRIVER_PORT_TYPE_QSFP, + OOM_DRIVER_PORT_TYPE_QSFP_PLUS, + OOM_DRIVER_PORT_TYPE_QSFP28 +} oom_driver_port_type_t; + +enum driver_type_e { + DRIVER_TYPE_SFP_MSA, + DRIVER_TYPE_SFP_DDM, + DRIVER_TYPE_QSFP +}; + +typedef enum eeprom_operation_e { + EEPROM_READ, + EEPROM_WRITE +} eeprom_operation_t; + +/* + * Each client has this additional data + */ +struct eeprom_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + struct bin_attribute bin; /* eeprom data */ +}; + +struct qsfp_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status[3]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss + */ + u8 device_id; + struct eeprom_data eeprom; +}; + +struct sfp_port_data { + struct mutex update_lock; + enum driver_type_e driver_type; + int port; /* CPLD port index */ + oom_driver_port_type_t port_type; + u64 present; /* present status, bit0:port0, bit1:port1 and so on */ + + struct qsfp_data *qsfp; + + struct i2c_client *client; +}; + +enum sfp_sysfs_attributes { + PRESENT, + PRESENT_ALL, + PORT_NUMBER, + PORT_TYPE, + DDM_IMPLEMENTED, + TX_FAULT, + TX_FAULT1, + TX_FAULT2, + TX_FAULT3, + TX_FAULT4, + TX_DISABLE, + TX_DISABLE1, + TX_DISABLE2, + TX_DISABLE3, + TX_DISABLE4, + TX_DISABLE_ALL, + RX_LOS, + RX_LOS1, + RX_LOS2, + RX_LOS3, + RX_LOS4, + RX_LOS_ALL, +}; + +static void device_release(struct device *dev) +{ + return; +} + +/* + * S8900-64XC CPLD register addresses + */ +static const int int_abs_reg[CPLD_DEVICE_NUM][2]= { + {0x20, 0x31}, + {0x20, 0x31}, + {0x20, 0x2F}, +}; + +static const int rst_lp_reg[CPLD_DEVICE_NUM][2]= { + {0xFF, 0xFF}, /*dummy*/ + {0xFF, 0xFF}, /*dummy*/ + {0x30, 0x3F}, +}; + +/* + * S8900-64XC CPLD + */ + +enum cpld_type { + cpld_1, + cpld_2, + cpld_3, +}; + +enum qsfp_signal { + sig_int, + sig_abs, + sig_rst, + sig_lpm +}; + +struct cpld_platform_data { + int reg_addr; + struct i2c_client *client; +}; + +struct sfp_platform_data { + int reg_addr; + int parent; + int cpld_reg; + struct i2c_client *client; +}; + +static struct cpld_platform_data s8900_64xc_cpld_platform_data[] = { + [cpld_1] = { + .reg_addr = 0x33, + }, + + [cpld_2] = { + .reg_addr = 0x33, + }, + + [cpld_3] = { + .reg_addr = 0x33, + } +}; + +static struct sfp_platform_data s8900_64xc_sfp_platform_data[] = { + [sfp1] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x01, + }, + + [sfp2] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x02, + }, + + [sfp3] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x03, + }, + [sfp4] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x04, + }, + + [sfp5] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x05, + }, + + [sfp6] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x06, + }, + [sfp7] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x07, + }, + + [sfp8] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x08, + }, + + [sfp9] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x09, + }, + [sfp10] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x0A, + }, + + [sfp11] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x0B, + }, + + [sfp12] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x0C, + }, + [sfp13] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x0D, + }, + + [sfp14] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x0E, + }, + + [sfp15] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x0F, + }, + [sfp16] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x10, + }, + + [sfp17] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x11, + }, + + [sfp18] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x12, + }, + [sfp19] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x13, + }, + + [sfp20] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x14, + }, + + [sfp21] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x15, + }, + [sfp22] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x16, + }, + + [sfp23] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x17, + }, + + [sfp24] = { + .reg_addr = 0x50, + .parent = 2, + .cpld_reg = 0x18, + }, + [sfp25] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x01, + }, + + [sfp26] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x02, + }, + [sfp27] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x03, + }, + + [sfp28] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x04, + }, + + [sfp29] = { + .reg_addr = 0x50, + + .parent = 3, + .cpld_reg = 0x05, + }, + [sfp30] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x06, + }, + [sfp31] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x07, + }, + [sfp32] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x08, + }, + [sfp33] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x09, + }, + [sfp34] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x0A, + }, + [sfp35] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x0B, + }, + [sfp36] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x0C, + }, + [sfp37] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x0D, + }, + [sfp38] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x0E, + }, + [sfp39] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x0F, + }, + [sfp40] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x10, + }, + [sfp41] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x11, + }, + [sfp42] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x12, + }, + [sfp43] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x13, + }, + [sfp44] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x14, + }, + [sfp45] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x15, + }, + [sfp46] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x16, + }, + [sfp47] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x17, + }, + [sfp48] = { + .reg_addr = 0x50, + .parent = 3, + .cpld_reg = 0x18, + }, + [qsfp49] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x01, + }, + [qsfp50] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x02, + }, + [qsfp51] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x03, + }, + [qsfp52] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x04, + }, + [qsfp53] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x05, + }, + [qsfp54] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x06, + }, + [qsfp55] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x07, + }, + [qsfp56] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x08, + }, + [qsfp57] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x09, + }, + [qsfp58] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x0A, + }, + [qsfp59] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x0B, + }, + [qsfp60] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x0C, + }, + [qsfp61] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x0D, + }, + [qsfp62] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x0E, + }, + [qsfp63] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x0F, + }, + [qsfp64] = { + .reg_addr = 0x50, + .parent = 4, + .cpld_reg = 0x10, + } +}; + +static struct platform_device s8900_64xc_cpld = { + .name = "ingrasys-s8900-64xc-cpld", + .id = 0, + .dev = { + .platform_data = s8900_64xc_cpld_platform_data, + .release = device_release + }, +}; + +static struct platform_device s8900_64xc_sfp = { + .name = "ingrasys-s8900-64xc-sfp", + .id = 0, + .dev = { + .platform_data = s8900_64xc_sfp_platform_data, + .release = device_release + }, +}; + +/* + * S8900-64XC I2C DEVICES + */ + +struct i2c_device_platform_data { + int parent; + struct i2c_board_info info; + struct i2c_client *client; +}; + +/* module_platform_driver */ +static ssize_t +get_prs_cpld_reg(struct device *dev, + struct device_attribute *devattr, + char *buf, int signal) +{ + int ret; + u64 data = 0; + u64 shift = 0; + int i = 0; + int j = 0; + int port = 0; + int bit = 0; + int bit_mask = 0; + int bit_mask_2 = 0; + int (*reg)[CPLD_DEVICE_NUM][2]; + struct cpld_platform_data *pdata = NULL; + + pdata = dev->platform_data; + + switch(signal) { + case sig_int: + bit = BIT_INT; + reg = (typeof(reg)) &int_abs_reg; + break; + case sig_abs: + bit = BIT_ABS; + reg = (typeof(reg)) &int_abs_reg; + break; + default: + return sprintf(buf, "signal/na"); + } + bit_mask = 0x1 << bit; + bit_mask_2 = 0x1 << BIT_ABS_2; + + for (i=0; i= 0x2a && j <= 0x2f && i < SFP_CPLD_DEVICE_NUM) { + continue; + } + ret = i2c_smbus_read_byte_data(pdata[i].client, j); + if (ret < 0) { + return sprintf((char *)buf, "i2c_smbus_read_byte_data/na"); + } + shift = ((u64) ((ret & bit_mask) >> bit)) << port; + data |= shift; + DEBUG_PRINT("port=%d, shift=0x%016llx, ret=%x, bit_mask=%08x, bit=%08x, data=0x%016llx\n", port, shift, ret, bit_mask, bit, data); + /* CPLD2 and CPLD3 have BIT 1 and BIT 5 for present */ + if (i < SFP_CPLD_DEVICE_NUM) { + port++; + shift = ((u64) ((ret & bit_mask_2) >> BIT_ABS_2)) << port; + data |= shift; + DEBUG_PRINT("port=%d, shift=0x%016llx, ret=%x, bit_mask_2=0x%x, bit=%x, data=0x%016llx\n", port, shift, ret, bit_mask_2, bit, data); + } + + port++; + } + } + + return sprintf((char *)buf, "0x%016llx\n", data); +} + +/* module_platform_driver */ +static ssize_t +get_rst_lp_cpld_reg(struct device *dev, + struct device_attribute *devattr, + char *buf, int signal) +{ + int ret; + u64 data = 0; + u64 shift = 0; + int i = 0; + int j = 0; + int port = 0; + int bit = 0; + int bit_mask = 0; + int (*reg)[CPLD_DEVICE_NUM][2]; + struct cpld_platform_data *pdata = NULL; + + pdata = dev->platform_data; + + switch(signal) { + case sig_rst: + bit = BIT_RST; + reg = (typeof(reg)) &rst_lp_reg; + break; + case sig_lpm: + bit = BIT_LPM; + reg = (typeof(reg)) &rst_lp_reg; + break; + default: + return sprintf(buf, "na"); + } + bit_mask = 0x1 << bit; + + for (i=2; i> bit)) << port; + data |= shift; + port++; + } + } + + return sprintf(buf, "0x%04llx\n", data); +} + +static ssize_t +set_rst_lp_cpld_reg(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count, int signal) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + u8 current_reg_val = 0; + u8 new_reg_val = 0; + int value; + int i = 0; + int j = 0; + int port = 0; + int ret = 0; + int bit = 0; + int (*reg)[CPLD_DEVICE_NUM][2]; + + err = kstrtoul(buf, 16, &data); + if (err) + return err; + + switch(signal) { + case sig_rst: + bit = BIT_RST; + reg = (typeof(reg)) &rst_lp_reg; + break; + case sig_lpm: + bit = BIT_LPM; + reg = (typeof(reg)) &rst_lp_reg; + break; + default: + return sprintf((char *)buf, "signal/na"); + } + + for (i=2; i> port) & 0x1; + + //set value on bit N of new_reg_val + if (value > 0) { + new_reg_val = current_reg_val | (u8) (0x1 << bit); + } else { + new_reg_val = current_reg_val & (u8) ~(0x1 << bit); + } + //write reg value if changed + if (current_reg_val != new_reg_val) { + ret = i2c_smbus_write_byte_data(pdata[i].client, j, + (u8)(new_reg_val)); + if (ret < 0){ + return ret; + } + } + port++; + } + } + + return count; +} + +static ssize_t +get_lpmode(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + return get_rst_lp_cpld_reg(dev, devattr, buf, sig_lpm); +} + +static ssize_t +set_lpmode(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + return set_rst_lp_cpld_reg(dev, devattr, buf, count, sig_lpm); +} + +static ssize_t +get_reset(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + return get_rst_lp_cpld_reg(dev, devattr, buf, sig_rst); +} + +static ssize_t +set_reset(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + return set_rst_lp_cpld_reg(dev, devattr, buf, count, sig_rst); +} + +static ssize_t +get_modprs(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + return get_prs_cpld_reg(dev, devattr, buf, sig_abs); +} + +static DEVICE_ATTR(qsfp_modprs, S_IRUGO, get_modprs, NULL); +static DEVICE_ATTR(qsfp_lpmode, S_IRUGO | S_IWUSR, get_lpmode, set_lpmode); +static DEVICE_ATTR(qsfp_reset, S_IRUGO | S_IWUSR, get_reset, set_reset); + +static struct attribute *s8900_64xc_cpld_attrs[] = { + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_reset.attr, + &dev_attr_qsfp_modprs.attr, + NULL, +}; + +static struct attribute_group s8900_64xc_cpld_attr_grp = { + .attrs = s8900_64xc_cpld_attrs, +}; + +/* + * Assumes that sanity checks for offset happened at sysfs-layer. + * Offset within Lower Page 00h and Upper Page 00h are not recomputed + */ +static uint8_t +sff_8436_translate_offset(loff_t *offset) +{ + unsigned page = 0; + + if (*offset < SFF_8436_MMAP_SIZE) { + return 0; + } + + page = (*offset >> 7)-1; + + if (page > 0 ) { + *offset = 0x80 + (*offset & 0x7f); + } else { + *offset &= 0xff; + } + + return page; +} + +static ssize_t +eeprom_read(struct i2c_client *client, + u8 command, const char *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int result, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + result = i2c_smbus_read_i2c_block_data(client, command, + data_len, (u8 *)data); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) { + goto abort; + } + + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + +abort: + return result; +#else + int result, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + result = i2c_smbus_read_byte_data(client, command); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) { + dev_dbg(&client->dev, "sfp read byte data failed, " \\ + "command(0x%2x), data(0x%2x)\r\n", + command, result); + goto abort; + } + + *data = (u8)result; + result = 1; + +abort: + return result; +#endif +} + +static ssize_t +eeprom_write(struct i2c_client *client, + u8 command, const char *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int result, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + result = i2c_smbus_write_i2c_block_data(client, command, data_len, data); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) { + return result; + } + + return data_len; +#else + int result, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + result = i2c_smbus_write_byte_data(client, command, *data); + if (result < 0) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(result < 0)) { + return result; + } + + return 1; +#endif +} + +static ssize_t +sfp_eeprom_read_write(struct i2c_client *client, + eeprom_operation_t op, + loff_t off, + const char *data, + int data_len) +{ + u8 page, phy_page; + u8 val, refresh_page = 0; + int ret; + ssize_t retval = 0; + size_t pending_len = 0, page_len = 0; + loff_t page_offset = 0, page_start_offset = 0; + loff_t phy_offset; + + + if (off > EEPROM_SIZE) { + return 0; + } + + if (off + data_len > EEPROM_SIZE) { + data_len = EEPROM_SIZE - off; + } + + /* + * Refresh pages which covers the requested data + * from offset to off + len + * Only refresh pages which contain requested bytes + * + */ + + pending_len = data_len; + + for (page = off >> 7; page <= (off + data_len - 1) >> 7; page++) { + refresh_page = 0; + switch (page) { + case 0: + /* Lower page 00h */ + refresh_page = 1; + break; + case 1: + /* Upper page 00h */ + refresh_page = 1; + break; + case 2: + /* Upper page 01h */ + ret = eeprom_read(client, SFF_8436_PAGE_PROV_ADDR, &val, sizeof(val)); + if (ret < 0) { + DEBUG_PRINT("Can't read EEPROM offset %d.\n", + SFF_8436_PAGE_PROV_ADDR); + goto error; + } + if (val & SFF_8436_PAGE_01_PRESENT) { + DEBUG_PRINT("Offset:%d Value:(0x%02x & 0x%02x)", + SFF_8436_PAGE_PROV_ADDR, val, + SFF_8436_PAGE_01_PRESENT); + refresh_page = 1; + } + break; + case 3: + /* Upper page 02h */ + ret = eeprom_read(client, SFF_8436_PAGE_PROV_ADDR, &val, sizeof(val)); + if (ret < 0) { + ERROR_MSG("Can't read EEPROM offset %d.\n", + SFF_8436_PAGE_PROV_ADDR); + goto error; + } + if (val & SFF_8436_PAGE_02_PRESENT) { + DEBUG_PRINT("Offset:%d Value:(0x%02x & 0x%02x)", + SFF_8436_PAGE_PROV_ADDR, val, + SFF_8436_PAGE_02_PRESENT); + refresh_page = 1; + } + break; + case 4: + /* Upper page 03h */ + ret = eeprom_read(client, SFF_8436_STATUS_ADDR, &val, sizeof(val)); + if (ret < 0) { + ERROR_MSG("Can't read EEPROM offset %d.\n", + SFF_8436_STATUS_ADDR); + goto error; + } + if (!(val & SFF_8436_STATUS_PAGE_03_PRESENT_L)) { + DEBUG_PRINT("Offset:%d Value:(0x%02x & 0x%02x)", + SFF_8436_STATUS_ADDR, val, + SFF_8436_STATUS_PAGE_03_PRESENT_L); + refresh_page = 1; + } + break; + default: + DEBUG_PRINT("Invalid Page %d\n", page); + ret = retval; + goto error; + break; + } + + if (!refresh_page) { + /* if page is not valid or already refreshed */ + continue; + } + + /* + * Compute the offset and number of bytes to be read/write + * w.r.t requested page + * + * 1. start at offset 0 (within the page), and read/write the entire page + * 2. start at offset 0 (within the page) and read/write less than entire page + * 3. start at an offset not equal to 0 and read/write the rest of the page + * 4. start at an offset not equal to 0 and read/write less than (end of page - offset) + * + */ + page_start_offset = page * EEPROM_PAGE_SIZE; + + if (page_start_offset < off) { + page_offset = off; + if (off + pending_len < page_start_offset + EEPROM_PAGE_SIZE) { + page_len = pending_len; + } else { + page_len = EEPROM_PAGE_SIZE - off; + } + } else { + page_offset = page_start_offset; + if (pending_len > EEPROM_PAGE_SIZE) { + page_len = EEPROM_PAGE_SIZE; + } else { + page_len = pending_len; + } + } + + pending_len = pending_len - page_len; + + /* Change current EEPROM page */ + phy_offset = page_offset; + phy_page = sff_8436_translate_offset(&phy_offset); + if (phy_page > 0) { + ret = eeprom_write(client, SFF_8436_PAGE_SELECT_ADDR, + &phy_page, sizeof(phy_page)); + if (ret < 0) { + ERROR_MSG("Can't write EEPROM offset %d.\n", + SFF_8436_PAGE_SELECT_ADDR); + goto error; + } + } + + /* + * If page_len > 32, I2C client continue read or write EEPROM. + */ + while (page_len) { + if (op == EEPROM_READ) { + ret = eeprom_read(client, phy_offset, data, page_len); + } else if (op == EEPROM_WRITE) { + ret = eeprom_write(client, phy_offset, data, page_len); + } else { + ERROR_MSG("Bad EEPROM operation %d.\n", op); + break; + } + + if (ret <= 0) { + if (retval == 0) { + retval = ret; + } + break; + } + phy_offset += ret; + off += ret; + data += ret; + page_len -= ret; + retval += ret; + } + + /* Restore EEPROM page to default */ + if (phy_page > 0) { + phy_page = EEPROM_DEFAULT_PAGE; + ret = eeprom_write(client, SFF_8436_PAGE_SELECT_ADDR, + &phy_page, sizeof(phy_page)); + if (ret < 0) { + ERROR_MSG("Can't write EEPROM offset %d.\n", + SFF_8436_PAGE_SELECT_ADDR); + goto error; + } + } + } + + return retval; + +error: + return ret; +} + + +static inline ssize_t +sfp_eeprom_read(struct i2c_client *client, + loff_t off, u8 *data, + int data_len) +{ + return sfp_eeprom_read_write(client, EEPROM_READ, + off, data, data_len); +} + + +static inline ssize_t +sfp_eeprom_write(struct i2c_client *client, + loff_t off, const char *data, + int data_len) +{ + return sfp_eeprom_read_write(client, EEPROM_WRITE, + off, data, data_len); +} + +static struct i2c_client * +cpld_sfp_port_client(int port, + int *data_reg) +{ + *data_reg = s8900_64xc_sfp_platform_data[port].cpld_reg; + if (port >= sfp1 && port <= sfp24) { + return s8900_64xc_cpld_platform_data[cpld_1].client; + } else if (port >= sfp25 && port <= sfp48) { + return s8900_64xc_cpld_platform_data[cpld_2].client; + } else if (port >= qsfp49 && port <= qsfp64) { + return s8900_64xc_cpld_platform_data[cpld_3].client; + } else { + ERROR_MSG("Unknown port: %d", port); + return NULL; + } +} + +static ssize_t +sfp_port_read(struct sfp_port_data *data, + char *buf, loff_t off, + size_t count, int port) +{ + ssize_t retval = 0; + int data_reg = 0; + struct i2c_client *cpld_client = NULL; + + if (unlikely(!count)) { + DEBUG_PRINT("Count = 0, return"); + return count; + } + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + //CPLD MUX select + cpld_client = cpld_sfp_port_client(port, &data_reg); + DEBUG_PRINT("data_reg=%d, port=%d", data_reg, port); + if (!cpld_client) { + ERROR_MSG("Error i2c client for port %d", port); + return 0; + } + i2c_smbus_write_byte_data(cpld_client, CPLD_MUX_REG ,data_reg); + + while (count) { + ssize_t status; + + status = sfp_eeprom_read(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + + buf += status; + off += status; + count -= status; + retval += status; + } + + //CPLD MUX deselect + i2c_smbus_write_byte_data(cpld_client, CPLD_MUX_REG ,0x0); + + mutex_unlock(&data->update_lock); + return retval; +} + +static ssize_t +sfp_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct sfp_port_data *data; + struct platform_device_id *dev_id = NULL; + + dev_id = (struct platform_device_id *)attr->private; + + DEBUG_PRINT("offset = (%lld), count = (%ld) dev_port=%d", off, count, (int)dev_id->driver_data); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + + return sfp_port_read(data, buf, off, count, (int)dev_id->driver_data); +} + +static ssize_t +sfp_port_write(struct sfp_port_data *data, + const char *buf, loff_t off, + size_t count, int port) +{ + ssize_t retval = 0; + int data_reg = 0; + struct i2c_client *cpld_client = NULL; + + if (unlikely(!count)) { + return count; + } + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + //CPLD MUX select + cpld_client = cpld_sfp_port_client(port, &data_reg); + DEBUG_PRINT("data_reg=%d, port=%d", data_reg, port); + if (!cpld_client) { + ERROR_MSG("Error i2c client for port %d", port); + } + i2c_smbus_write_byte_data(cpld_client, CPLD_MUX_REG ,data_reg); + + while (count) { + ssize_t status; + + status = sfp_eeprom_write(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + //CPLD MUX deselect + i2c_smbus_write_byte_data(cpld_client, CPLD_MUX_REG ,0x0); + + mutex_unlock(&data->update_lock); + return retval; +} + + +static ssize_t +sfp_bin_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct sfp_port_data *data; + struct platform_device_id *dev_id = NULL; + + dev_id = (struct platform_device_id *)attr->private; + + DEBUG_PRINT("offset = (%lld), count = (%ld) dev_port=%d", + off, count, (int)dev_id->driver_data); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + + return sfp_port_write(data, buf, off, count, (int)dev_id->driver_data); +} + +static int +sfp_sysfs_eeprom_init(struct kobject *kobj, + struct bin_attribute *eeprom, + const struct platform_device_id *dev_id) +{ + int err; + + sysfs_bin_attr_init(eeprom); + eeprom->attr.name = dev_id->name; + eeprom->attr.mode = S_IWUSR | S_IRUGO; + eeprom->read = sfp_bin_read; + eeprom->write = sfp_bin_write; + eeprom->private = (void *)dev_id; + eeprom->size = EEPROM_SIZE; + + /* Create eeprom file */ + err = sysfs_create_bin_file(kobj, eeprom); + if (err) { + DEBUG_PRINT("err=%d", err); + return err; + } + + return 0; +} + +static int +sfp_sysfs_eeprom_cleanup(struct kobject *kobj, + struct bin_attribute *eeprom) +{ + sysfs_remove_bin_file(kobj, eeprom); + + return 0; +} + +static int +sfp_i2c_check_functionality(struct i2c_client *client) +{ +#if USE_I2C_BLOCK_READ + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK); +#else + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA); +#endif +} + +static int +qsfp_probe(struct i2c_client *client, + const struct platform_device_id *dev_id, + struct qsfp_data **data) +{ + int status; + struct qsfp_data *qsfp; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + qsfp = kzalloc(sizeof(struct qsfp_data), GFP_KERNEL); + if (!qsfp) { + status = -ENOMEM; + DEBUG_PRINT("No memory."); + goto exit; + } + + /* Register sysfs hooks */ //TBD: must remove + /* status = sysfs_create_group(&client->dev.kobj, &qsfp_group); + if (status) { + goto exit_free; + } */ + + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &qsfp->eeprom.bin, dev_id); + if (status) { + DEBUG_PRINT("sfp_sysfs_eeprom_init error"); + goto exit_free; + } + + //TBD: Must remove + /*if (s9130_32x_kobj) { + status = sysfs_create_link(s9130_32x_kobj, &client->dev.kobj, client->name); + if (status) { + goto exit_remove; + } + }*/ + + *data = qsfp; + dev_info(&client->dev, "qsfp '%s'\n", client->name); + + return 0; + +exit_free: + kfree(qsfp); +exit: + + return status; +} + +static int +qsfp_device_probe(struct platform_device *pdev) +{ + struct sfp_platform_data *pdata; + struct sfp_port_data *data[TOTAL_PORT_NUM]; + struct i2c_adapter *parent[SFP_EEPROM_DEV_NUM]; + struct i2c_client *sfp_client[SFP_EEPROM_DEV_NUM]; + int i; + int ret=0; + + DEBUG_PRINT("Start"); + + pdata = pdev->dev.platform_data; + if (!pdata) { + ERROR_MSG("Missing platform data\n"); + return -ENODEV; + } + + //New eeprom device + for (i=0; i < SFP_EEPROM_DEV_NUM; i++) { + parent[i] = i2c_get_adapter(i+S8900_64XC_SFP_EEPROM_BASE_NR); + if (!parent[i]) { + ERROR_MSG("Parent adapter (%d) not found\n", i+S8900_64XC_SFP_EEPROM_BASE_NR); + ret=-ENODEV; + goto error; + } + sfp_client[i] = i2c_new_dummy(parent[i], SFP_EEPROM_A0_I2C_ADDR); + if (!sfp_client[i]) { + ERROR_MSG("[%d]: Fail to create dummy i2c client for parent %d addr 0x%x\n", i, i+S8900_64XC_SFP_EEPROM_BASE_NR, SFP_EEPROM_A0_I2C_ADDR); + ret=-ENODEV; + goto error; + } + } + + //Assign client to dummy device + for (i = 0; i < TOTAL_PORT_NUM; i++) { + switch (pdata[i].parent) { + case 2: + pdata[i].client = sfp_client[0]; + break; + case 3: + pdata[i].client = sfp_client[1]; + break; + case 4: + pdata[i].client = sfp_client[2]; + break; + default: + ERROR_MSG("Error parent number: %d, ", i); + break; + } + + if (!pdata[i].client) { + ERROR_MSG("[%d]: Fail to create dummy i2c client for parent %d addr 0x%x\n", i, pdata[i].parent, pdata[i].reg_addr); + ret=-ENODEV; + goto error; + } + } + + + for (i = 0; i < TOTAL_PORT_NUM; i++) { + data[i] = kzalloc(sizeof(struct sfp_port_data), GFP_KERNEL); + if (!data[i]) { + ret=-ENOMEM; + ERROR_MSG("No memory"); + goto error; + } + + i2c_set_clientdata(pdata[i].client, data[i]); + mutex_init(&data[i]->update_lock); + data[i]->port = qsfp_device_id[i].driver_data; + data[i]->client = pdata[i].client; + + DEBUG_PRINT("data[%d]->port=%d", i, data[i]->port); + + if (pdata[i].client->addr != SFP_EEPROM_A0_I2C_ADDR) { + ret=-ENODEV; + ERROR_MSG("Not approve device address"); + goto error; + } + + data[i]->driver_type = DRIVER_TYPE_QSFP; + + ret |= qsfp_probe(pdata[i].client, &qsfp_device_id[i], &data[i]->qsfp); + } + + if (ret) { + ERROR_MSG("qsfp_probe failed someone."); + //goto error; + } + return 0; +error: + DEBUG_PRINT("error start"); + i2c_put_adapter(parent[i]); + i--; + for (; i >= 0; i--) { + if (pdata[i].client) { + i2c_unregister_device(pdata[i].client); + i2c_put_adapter(parent[i]); + } + } + + return ret; +} + +static int +qsfp_remove(struct i2c_client *client, + struct qsfp_data *data) +{ + //TBD: Must remove + /*if (s9130_32x_kobj) { + sysfs_remove_link(s9130_32x_kobj, client->name); + }*/ + + //TBD: Must remove all ports EEPROM BIN + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + //TBD: Must remove sysfs_remove_group(&client->dev.kobj, &qsfp_group); + kfree(data); + + return 0; +} + +static int __exit +qsfp_device_remove(struct platform_device *pdev) +{ + struct sfp_port_data *data = NULL; + struct sfp_platform_data *pdata = pdev->dev.platform_data; + struct i2c_adapter *parent = NULL; + int i; + + + + if (!pdata) { + ERROR_MSG("Missing platform data\n"); + return -ENOENT; + } + + for (i = 0; i < TOTAL_PORT_NUM; i+=CPLD_MUX_OFFSET) { + data = i2c_get_clientdata(pdata[i].client); + if (!data) { + ERROR_MSG("Empty data. skip. i=%d", i); + continue; + } + qsfp_remove(pdata[i].client, data->qsfp); + if (pdata[i].client) { + parent = (pdata[i].client)->adapter; + i2c_unregister_device(pdata[i].client); + i2c_put_adapter(parent); + } + kfree(data); + } + + + return 0; +} + +static int +cpld_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent[CPLD_DEVICE_NUM]; + int i; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + ERROR_MSG("Missing platform data\n"); + return -ENODEV; + } + + for (i = 0; i < CPLD_DEVICE_NUM; i++) { + parent[i] = i2c_get_adapter(S8900_64XC_MUX_BASE_NR + i + 1); + if (!parent[i]) { + ERROR_MSG("Parent adapter (%d) not found\n", + S8900_64XC_MUX_BASE_NR + i + 1); + return -ENODEV; + } + pdata[i].client = i2c_new_dummy(parent[i], pdata[i].reg_addr); + if (!pdata[i].client) { + ERROR_MSG("Fail to create dummy i2c client for addr %d\n", pdata[i].reg_addr); + goto error; + } + } + + ret = sysfs_create_group(&pdev->dev.kobj, &s8900_64xc_cpld_attr_grp); + if (ret) + goto error; + + return 0; + +error: + if (i < CPLD_DEVICE_NUM) { + i2c_put_adapter(parent[i]); + } + i--; + for (; i >= 0; i--) { + if (pdata[i].client) { + i2c_unregister_device(pdata[i].client); + i2c_put_adapter(parent[i]); + } + } + + return -ENODEV; +} + +static int __exit cpld_remove(struct platform_device *pdev) +{ + int i; + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + + sysfs_remove_group(&pdev->dev.kobj, &s8900_64xc_cpld_attr_grp); + + if (!pdata) { + ERROR_MSG("Missing platform data\n"); + } else { + for (i = 0; i < CPLD_DEVICE_NUM; i++) { + if (pdata[i].client) { + parent = (pdata[i].client)->adapter; + i2c_unregister_device(pdata[i].client); + i2c_put_adapter(parent); + } + } + } + + return 0; +} + +static struct platform_driver cpld_driver = { + .probe = cpld_probe, + .remove = __exit_p(cpld_remove), + .driver = { + .owner = THIS_MODULE, + .name = "ingrasys-s8900-64xc-cpld", + }, +}; + +static struct platform_driver qsfp_driver = { + .probe = qsfp_device_probe, + .remove = __exit_p(qsfp_device_remove), + //.id_table = qsfp_device_id, + .driver = { + .owner = THIS_MODULE, + .name = "ingrasys-s8900-64xc-sfp", + }, +}; + + +static int __init ingrasys_s8900_64xc_platform_init(void) +{ + int ret = 0; + + DEBUG_PRINT("ingrasysl_s8900_64xc_platform module initialization\n"); + + //mdelay(10000); + + ret = platform_driver_register(&cpld_driver); + if (ret) { + ERROR_MSG("Fail to register cpld driver\n"); + goto error_cpld_driver; + } + ret = platform_device_register(&s8900_64xc_cpld); + if (ret) { + ERROR_MSG("Fail to create cpld device\n"); + goto error_cpld; + } + + ret = platform_driver_register(&qsfp_driver); + if (ret) { + ERROR_MSG("Fail to register sfp driver\n"); + goto error_cpld_driver; + } + + ret = platform_device_register(&s8900_64xc_sfp); + if (ret) { + ERROR_MSG("Fail to create sfp device\n"); + goto error_cpld; + } + + return 0; + +error_cpld: + platform_driver_unregister(&cpld_driver); + platform_driver_unregister(&qsfp_driver); +error_cpld_driver: + return ret; +} + +static void __exit ingrasys_s8900_64xc_platform_exit(void) +{ + platform_device_unregister(&s8900_64xc_sfp); + platform_device_unregister(&s8900_64xc_cpld); + platform_driver_unregister(&qsfp_driver); + platform_driver_unregister(&cpld_driver); +} + +module_init(ingrasys_s8900_64xc_platform_init); +module_exit(ingrasys_s8900_64xc_platform_exit); + +MODULE_DESCRIPTION("Ingrasys S8900-64XC Platform Support"); +MODULE_AUTHOR("Wade He "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/service/qsfp-monitor.service b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/service/qsfp-monitor.service new file mode 100644 index 00000000000..99c91b98ab5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/service/qsfp-monitor.service @@ -0,0 +1,15 @@ +[Unit] +Description= This QSFP Monitor service is to setup QSFP SI. +Requires=s8900-64xc-monitor.service +After=s8900-64xc-monitor.service + +[Service] +ExecStart=/usr/sbin/qsfp_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/service/s8900-64xc-monitor.service b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/service/s8900-64xc-monitor.service new file mode 100644 index 00000000000..decb0f943a9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/service/s8900-64xc-monitor.service @@ -0,0 +1,18 @@ +[Unit] +Description= This Platform Monitor service is to initialize platform and monitor platform. +Before=platform-monitor.service +After=sysinit.target +Wants=fancontrol.service +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/sbin/i2c_utils.sh i2c_init +ExecStart=/usr/sbin/s8900_64xc_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/utils/i2c_utils.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/utils/i2c_utils.sh new file mode 100644 index 00000000000..e1df54ad0fe --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/utils/i2c_utils.sh @@ -0,0 +1,1163 @@ +#!/bin/bash + +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# trun on for more debug output +#DEBUG="on" + +VERSION="1.0.0" +TRUE=200 +FALSE=404 + +EXEC_FUNC=${1} +COLOR_LED=${2} +QSFP_PORT=${2} +ONOFF_LED=${3} +FAN_TRAY=${4} + +############################################################ +# Distributor ID: Debian +# Description: Debian GNU/Linux 8.6 (jessie) +# Release: 8.6 +# Codename: jessie +# Linux debian 3.16.0-4-amd64 #1 +# SMP Debian 3.16.36-1+deb8u1 (2016-09-03) x86_64 GNU/Linux +############################################################ + +# Color Definition +COLOR_TITLE="\e[1;32m" ### Green ### +COLOR_WARNING="\e[1;33m" ### Yellow ### +COLOR_ERROR="\e[1;31m" ### Red ### +COLOR_END="\e[0m" ### END ### + +NUM_IGB_DEVICE=0 +NUM_I801_DEVICE=0 +NUM_ISMT_DEVICE=$(( ${NUM_I801_DEVICE} + 1 )) +NUM_MUX1_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 2 )) +NUM_MUX1_CHAN1_DEVICE=$(( ${NUM_I801_DEVICE} + 3 )) +NUM_MUX1_CHAN2_DEVICE=$(( ${NUM_I801_DEVICE} + 4 )) +NUM_MUX1_CHAN3_DEVICE=$(( ${NUM_I801_DEVICE} + 5 )) +NUM_MUX1_CHAN4_DEVICE=$(( ${NUM_I801_DEVICE} + 6 )) +NUM_MUX1_CHAN5_DEVICE=$(( ${NUM_I801_DEVICE} + 7 )) +NUM_MUX1_CHAN6_DEVICE=$(( ${NUM_I801_DEVICE} + 8 )) +NUM_MUX1_CHAN7_DEVICE=$(( ${NUM_I801_DEVICE} + 9 )) + +PATH_SYS_I2C_DEVICES="/sys/bus/i2c/devices" +PATH_HWMON_ROOT_DEVICES="/sys/class/hwmon" +PATH_HWMON_W83795_DEVICE="${PATH_HWMON_ROOT_DEVICES}/hwmon1" +PATH_I801_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_I801_DEVICE}" +PATH_ISMT_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_ISMT_DEVICE}" +PATH_MUX_CHAN0_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN0_DEVICE}" +PATH_MUX_CHAN1_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN1_DEVICE}" +PATH_MUX_CHAN2_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN2_DEVICE}" +PATH_MUX_CHAN3_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN3_DEVICE}" +PATH_MUX_CHAN4_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN4_DEVICE}" +PATH_MUX_CHAN5_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN5_DEVICE}" +PATH_MUX_CHAN6_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN6_DEVICE}" +PATH_MUX_CHAN7_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN7_DEVICE}" + +#Power Supply Status +PSU_DC_ON=1 +PSU_DC_OFF=0 +PSU_EXIST=1 +PSU_NOT_EXIST=0 + +# Help usage function +function _help { + echo "=========================================================" + echo "# Description: Help Function" + echo "=========================================================" + echo "----------------------------------------------------" + echo "EX : ${0} help" + echo " : ${0} i2c_init" + echo " : ${0} i2c_temp_init" + echo " : ${0} i2c_fan_init" + echo " : ${0} i2c_volmon_init" + echo " : ${0} i2c_io_exp_init" + echo " : ${0} i2c_led_test" + echo " : ${0} i2c_psu_eeprom_get" + echo " : ${0} i2c_mb_eeprom_get" + echo " : ${0} i2c_qsfp_eeprom_get [1-64]" + echo " : ${0} i2c_qsfp_status_get [1-64]" + echo " : ${0} i2c_qsfp_type_get [1-64]" + echo " : ${0} i2c_qsfp_abs_get [1-64]" + echo " : ${0} i2c_qsfp_rst_get [49-64]" + echo " : ${0} i2c_qsfp_lpmode_get [49-64]" + echo " : ${0} i2c_board_type_get" + echo " : ${0} i2c_psu_status" + echo " : ${0} i2c_led_psu_status_set" + echo " : ${0} i2c_led_fan_status_set" + echo " : ${0} i2c_led_fan_tray_status_set" + echo " : ${0} i2c_cpld_version" + echo " : ${0} i2c_front_temp" + echo " : ${0} i2c_rear_temp" + echo " : ${0} i2c_test_all" + echo " : ${0} i2c_sys_led green|amber on|off" + echo " : ${0} i2c_fan_led green|amber on|off" + echo " : ${0} i2c_psu1_led green|amber on|off" + echo " : ${0} i2c_psu2_led green|amber on|off" + echo " : ${0} i2c_fan_tray_led green|amber on|off [1-5]" + echo "----------------------------------------------------" +} + +#Pause function +function _pause { + read -p "$*" +} + +#Retry command function +function _retry { + for i in {1..5}; + do + eval "${*}" && break || echo "retry"; sleep 1; + done +} + + +#I2C Init +function _i2c_init { + echo "=========================================================" + echo "# Description: I2C Init" + echo "=========================================================" + + rmmod i2c_ismt + rmmod i2c_i801 + modprobe i2c_i801 + modprobe i2c_ismt + modprobe i2c_dev + modprobe i2c_mux_pca954x force_deselect_on_exit=1 + + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x72' > ${PATH_ISMT_DEVICE}/new_device" + else + echo "pca9548 0x72 already init." + fi + #Init CPLD LED_CLR Register (Front Port LED) + i2cset -y ${NUM_I801_DEVICE} 0x33 0x34 0x10 + + rmmod coretemp + rmmod jc42 + rmmod w83795 + rmmod lm75 + _i2c_temp_init + _i2c_volmon_init + _i2c_hwmon_init + modprobe coretemp + modprobe w83795 + modprobe lm75 + modprobe jc42 + modprobe sff_8436_eeprom + modprobe eeprom + modprobe eeprom_mb + modprobe qsfp_cpld + _i2c_fan_init + _i2c_io_exp_init + _i2c_cpld_init + _i2c_psu_eeprom_init + _i2c_led_psu_status_set + _i2c_led_fan_status_set + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_sys_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_sys_led + + echo "tmp75 0x48" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN3_DEVICE}/new_device + echo "tmp75 0x49" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN3_DEVICE}/new_device + echo "Mount Main Board EEPROM" + echo "mb_eeprom 0x54" > /sys/bus/i2c/devices/i2c-7/new_device + + _config_rmem +} + +#I2C Deinit +function _i2c_deinit { + for mod in coretemp jc42 w83795 lm75 eeprom_mb i2c_mux_pca954x i2c_ismt i2c_i801; + do + [ "$(lsmod | grep "^$mod ")" != "" ] && rmmod $mod + done +} + +#Temperature sensor Init +function _i2c_temp_init { + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x00 0x80 + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x05 0xFF + echo "TEMP INIT Done" +} + +#FAN Init +function _i2c_fan_init { + echo -n "FAN INIT..." + if [ -e "${PATH_HWMON_W83795_DEVICE}" ]; then + echo 120 > ${PATH_HWMON_W83795_DEVICE}/device/pwm1 + echo 120 > ${PATH_HWMON_W83795_DEVICE}/device/pwm2 + echo "SUCCESS" + else + echo "FAIL" + fi + +} + +#VOLMON Init +function _i2c_volmon_init { + echo -n "VOLMON INIT..." + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x00 0x80 + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x02 0xFF + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x03 0x50 + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x04 0x0A + echo "Done" +} + +#HWMON Init +function _i2c_hwmon_init { + echo -n "HWMON INIT..." + i2cset -y ${NUM_I801_DEVICE} 0x2f 0x00 0x80 + i2cset -y ${NUM_I801_DEVICE} 0x2f 0x06 0xFF + i2cset -y ${NUM_I801_DEVICE} 0x2f 0x07 0x03 + echo "Done" +} + +#IO Expander Init +function _i2c_io_exp_init { + echo "=========================================================" + echo "# Description: I2C IO Expender Init" + echo "=========================================================" + #SMBUS0 IO_EXPENDER + i2cset -y -r ${NUM_I801_DEVICE} 0x27 4 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x27 5 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x27 2 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x27 3 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x27 6 0xFF + i2cset -y -r ${NUM_I801_DEVICE} 0x27 7 0xFF + + #LED board after PVT (S8900_IO_EXP_LED_ID) + echo "Init LED IO Expender" + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 3 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 6 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 7 0xFF + + #PSU I/O (S8900_IO_EXP_PSU_ID) + echo "Init PSU IO Expender" + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 2 0x44 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 3 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 6 0xBB + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 7 0xFF + + #FAN I/O (S8900_IO_EXP_FAN_ID) + echo "Init FAN1 IO Expender" + i2cset -y -r ${NUM_MUX1_CHAN3_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN3_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN3_DEVICE} 0x20 2 0x11 + i2cset -y -r ${NUM_MUX1_CHAN3_DEVICE} 0x20 3 0x11 + i2cset -y -r ${NUM_MUX1_CHAN3_DEVICE} 0x20 6 0xCC + i2cset -y -r ${NUM_MUX1_CHAN3_DEVICE} 0x20 7 0xCC + + #FAN I/O (S8900_IO_EXP_FAN_ID) + echo "Init FAN2 IO Expender" + i2cset -y -r ${NUM_MUX1_CHAN3_DEVICE} 0x21 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN3_DEVICE} 0x21 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN3_DEVICE} 0x21 2 0x10 + i2cset -y -r ${NUM_MUX1_CHAN3_DEVICE} 0x21 3 0x00 + i2cset -y -r ${NUM_MUX1_CHAN3_DEVICE} 0x21 6 0xCC + i2cset -y -r ${NUM_MUX1_CHAN3_DEVICE} 0x21 7 0xFF +} + +#I2C CPLD init +function _i2c_cpld_init { + echo "=========================================================" + echo "# Description: I2C CPLD Init..." + echo "=========================================================" + + ## modprobe i2c_cpld + modprobe i2c_cpld + ## Add CPLD device + echo "i2c_cpld 0x33" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_I801_DEVICE}/new_device + + echo "done..." +} +#Set FAN Tray LED +function _i2c_led_fan_tray_status_set { + echo "FAN Tray Status Setup" + #FAN Status set + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN2_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan2_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN4_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan4_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN6_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan6_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + FAN8_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan8_alarm` + FAN9_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan9_alarm` + FAN10_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan10_alarm` + + if [ "${FAN1_ALARM}" == "0" ] && [ "${FAN2_ALARM}" == "0" ]; then + FAN_TRAY=1 + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=1 + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + if [ "${FAN3_ALARM}" == "0" ] && [ "${FAN4_ALARM}" == "0" ]; then + FAN_TRAY=2 + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=2 + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + if [ "${FAN5_ALARM}" == "0" ] && [ "${FAN6_ALARM}" == "0" ]; then + FAN_TRAY=3 + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=3 + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + if [ "${FAN7_ALARM}" == "0" ] && [ "${FAN8_ALARM}" == "0" ]; then + FAN_TRAY=4 + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=4 + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + if [ "${FAN9_ALARM}" == "0" ] && [ "${FAN10_ALARM}" == "0" ]; then + FAN_TRAY=5 + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=5 + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi +} + +#Set FAN LED +function _i2c_led_fan_status_set { + echo "FAN Status Setup" + #PSU Status set + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN2_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan2_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN4_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan4_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN6_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan6_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + FAN8_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan8_alarm` + FAN9_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan9_alarm` + FAN10_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan10_alarm` + + if [ "${FAN1_ALARM}" == "0" ] && [ "${FAN2_ALARM}" == "0" ] \ + && [ "${FAN3_ALARM}" == "0" ] && [ "${FAN4_ALARM}" == "0" ] \ + && [ "${FAN5_ALARM}" == "0" ] && [ "${FAN6_ALARM}" == "0" ] \ + && [ "${FAN7_ALARM}" == "0" ] && [ "${FAN8_ALARM}" == "0" ] \ + && [ "${FAN9_ALARM}" == "0" ] && [ "${FAN10_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + fi +} + +#Set Power Supply LED +function _i2c_led_psu_status_set { + echo "PSU LED Status Setup" + + #PSU Status set + _i2c_psu_status + + #PSU1 Status + if [ "${psu1Exist}" == ${PSU_EXIST} ]; then + if [ "${psu1PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + fi + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + fi + + #PSU2 Status + if [ "${psu2Exist}" == ${PSU_EXIST} ]; then + if [ "${psu2PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + fi + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + fi +} + +#LED Test +function _i2c_led_test { + echo "=========================================================" + echo "# Description: I2C LED TEST..." + echo "=========================================================" + #sys led (green) + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xBF + _pause 'Check SYS LED green light and Press [Enter] key to continue...' + #sys led (amber) + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0x7F + _pause 'Check SYS LED amber light and Press [Enter] key to continue...' + + #FAN led (green) + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xEF + _pause 'Check FAN LED green light and Press [Enter] key to continue...' + #FAN led (amber) + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xDF + _pause 'Check FAN LED amber light and Press [Enter] key to continue...' + + #PSU2 led (green) + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFB + _pause 'Check PSU2 LED green light and Press [Enter] key to continue...' + #PSU2 led (amber) + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xF7 + _pause 'Check PSU2 LED amber light and Press [Enter] key to continue...' + + #PSU1 led (green) + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFE + _pause 'Check PSU1 LED green light and Press [Enter] key to continue...' + #PSU1 led (amber) + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFD + _pause 'Check PSU1 LED amber light and Press [Enter] key to continue...' + + #Turn OFF All LED + i2cset -y ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + _pause 'Check turn off all LEDs and Press [Enter] key to continue...' + echo "done..." +} + +#Set QSFP Port variable +function _qsfp_port_i2c_var_set { + local port=$1 + case ${port} in + 1|2|3|4|5|6|7|8) + i2cbus=${NUM_MUX1_CHAN0_DEVICE} + regAddr=0x33 + idx=$(( ((${port} - 1) / 2) )) + dataAddr=$(( (32 + $idx) )) + presentChan=$(( $((${port} % 2)) == 1 ? 0x1 : 0x5 )) + eeprombus=${NUM_MUX1_CHAN0_DEVICE} + eepromidx=${port} + eepromAddr=0x50 + ;; + 9|10|11|12|13|14|15|16) + i2cbus=${NUM_MUX1_CHAN0_DEVICE} + regAddr=0x33 + idx=$(( ((${port} - 1) / 2) )) + dataAddr=$(( (32 + $idx) )) + presentChan=$(( $((${port} % 2)) == 1 ? 0x1 : 0x5 )) + eeprombus=${NUM_MUX1_CHAN0_DEVICE} + eepromidx=${port} + eepromAddr=0x50 + ;; + 17|18|19|20) + i2cbus=${NUM_MUX1_CHAN0_DEVICE} + regAddr=0x33 + idx=$(( ((${port} - 1) / 2) )) + dataAddr=$(( (32 + $idx) )) + presentChan=$(( $((${port} % 2)) == 1 ? 0x1 : 0x5 )) + eeprombus=${NUM_MUX1_CHAN0_DEVICE} + eepromidx=${port} + eepromAddr=0x50 + ;; + 21|22|23|24) + i2cbus=${NUM_MUX1_CHAN0_DEVICE} + regAddr=0x33 + idx=$(( ((${port} - 1) / 2) )) + dataAddr=$(( (38 + $idx) )) + presentChan=$(( $((${port} % 2)) == 1 ? 0x1 : 0x5 )) + eeprombus=${NUM_MUX1_CHAN0_DEVICE} + eepromidx=${port} + eepromAddr=0x50 + ;; + 25|26|27|28|29|30|31|32) + i2cbus=${NUM_MUX1_CHAN1_DEVICE} + regAddr=0x33 + idx=$(( ((${port} - 25) / 2) )) + dataAddr=$(( (32 + $idx) )) + presentChan=$(( $((${port} % 2)) == 1 ? 0x1 : 0x5 )) + eeprombus=${NUM_MUX1_CHAN1_DEVICE} + eepromidx=$(( (${port} - 24) )) + eepromAddr=0x50 + ;; + 33|34|35|36|37|38|39|40) + i2cbus=${NUM_MUX1_CHAN1_DEVICE} + regAddr=0x33 + idx=$(( ((${port} - 25) / 2) )) + dataAddr=$(( (32 + $idx) )) + presentChan=$(( $((${port} % 2)) == 1 ? 0x1 : 0x5 )) + eeprombus=${NUM_MUX1_CHAN1_DEVICE} + eepromidx=$(( (${port} - 24) )) + eepromAddr=0x50 + ;; + 41|42|43|44) + i2cbus=${NUM_MUX1_CHAN1_DEVICE} + regAddr=0x33 + idx=$(( ((${port} - 25) / 2) )) + dataAddr=$(( (32 + $idx) )) + presentChan=$(( $((${port} % 2)) == 1 ? 0x1 : 0x5 )) + eeprombus=${NUM_MUX1_CHAN1_DEVICE} + eepromidx=$(( (${port} - 24) )) + eepromAddr=0x50 + ;; + 45|46|47|48) + i2cbus=${NUM_MUX1_CHAN1_DEVICE} + regAddr=0x33 + idx=$(( ((${port} - 25) / 2) )) + dataAddr=$(( (38 + $idx) )) + presentChan=$(( $((${port} % 2)) == 1 ? 0x1 : 0x5 )) + eeprombus=${NUM_MUX1_CHAN1_DEVICE} + eepromidx=$(( (${port} - 24) )) + eepromAddr=0x50 + ;; + 49|50|51|52|53|54|55|56) + i2cbus=${NUM_MUX1_CHAN2_DEVICE} + regAddr=0x33 + idx=$(( (${port} - 49) )) + dataAddr=$(( (32 + $idx) )) + rstsellpdataAddr=$(( (48 + $idx) )) + intChan=0x0 + rstChan=0x0 + presentChan=0x1 + modselChan=0x1 + lpmodeChan=0x2 + eeprombus=${NUM_MUX1_CHAN2_DEVICE} + eepromidx=$(( (${port} - 48) )) + intabsidx=$(( (${port} - 28) )) + rstsellpidx=$(( (${port} - 18) )) + eepromAddr=0x50 + ;; + 57|58|59|60|61|62|63|64) + i2cbus=${NUM_MUX1_CHAN2_DEVICE} + regAddr=0x33 + idx=$(( (${port} - 49) )) + dataAddr=$(( (32 + $idx) )) + rstsellpdataAddr=$(( (48 + $idx) )) + intChan=0x0 + rstChan=0x0 + presentChan=0x1 + modselChan=0x1 + lpmodeChan=0x2 + eeprombus=${NUM_MUX1_CHAN2_DEVICE} + eepromidx=$(( (${port} - 48) )) + intabsidx=$(( (${port} - 28) )) + rstsellpidx=$(( (${port} - 18) )) + eepromAddr=0x50 + ;; + *) + echo "Please input 1~64" + exit + ;; + esac +} + +#Get SFP/QSFP EEPROM Information +function _i2c_qsfp_eeprom_get { + _qsfp_port_i2c_var_set ${QSFP_PORT} + + regData=`cat /sys/devices/platform/ingrasys-s8900-64xc-cpld.0/qsfp_modprs` + port_num=$(( ${QSFP_PORT} - 1 )) + + #status: 0 -> Down, 1 -> Up + status=$(( $(($regData & ( 1 << $port_num))) != 0 ? 0 : 1 )) + + + if [ $status = 0 ]; then + echo "Module not present." + exit + fi + + #Read SFP/QSFP EEPROM + if [ ${QSFP_PORT} -lt 49 ]; then + cat ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/sfp${QSFP_PORT} | hexdump -C + elif [ ${QSFP_PORT} -ge 49 ]; then + cat ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/qsfp${QSFP_PORT} | hexdump -C + fi +} + +#Get QSFP Status for QSFP monitor service +function _i2c_qsfp_status_get { + _i2c_qsfp_abs_get + echo "status=$status" +} + +#Get QSFP type for QSFP monitor server +function _i2c_qsfp_type_get { + _qsfp_port_i2c_var_set ${QSFP_PORT} + + regData=`cat /sys/devices/platform/ingrasys-s8900-64xc-cpld.0/qsfp_modprs` + port_num=$(( ${QSFP_PORT} - 1 )) + + #status: 0 -> Down, 1 -> Up + status=$(( $(($regData & ( 1 << $port_num))) != 0 ? 0 : 1 )) + + if [ $status = 0 ]; then + echo "Module not present." + exit + fi + + #Read SFP/QSFP EEPROM + if [ ${QSFP_PORT} -lt 49 ]; then + qsfp_info=$(base64 ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/sfp${QSFP_PORT}) + elif [ ${QSFP_PORT} -ge 49 ]; then + qsfp_info=$(base64 ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/qsfp${QSFP_PORT}) + fi + + if [ ${QSFP_PORT} -ge 1 ] && [ ${QSFP_PORT} -le 48 ]; then + echo "sfp" + # 1~48 port is sfp port + identifier=$(echo $qsfp_info | base64 -d -i | hexdump -s 0 -n 1 -e '"%x"') + connector=$(echo $qsfp_info | base64 -d -i | hexdump -s 2 -n 1 -e '"%x"') + transceiver=$(echo $qsfp_info | base64 -d -i | hexdump -s 3 -n 1 -e '"%x"') + else + echo "qsfp" + # 49~64 port is qsfp port + identifier=$(echo $qsfp_info | base64 -d -i | hexdump -s 128 -n 1 -e '"%x"') + connector=$(echo $qsfp_info | base64 -d -i | hexdump -s 130 -n 1 -e '"%x"') + transceiver=$(echo $qsfp_info | base64 -d -i | hexdump -s 131 -n 1 -e '"%x"') + fi + + echo "identifier=$identifier" + echo "connector=$connector" + echo "transceiver=$transceiver" +} + +#Get QSFP ABS +function _i2c_qsfp_abs_get { + _qsfp_port_i2c_var_set ${QSFP_PORT} + + regData=`cat /sys/devices/platform/ingrasys-s8900-64xc-cpld.0/qsfp_modprs` + port_num=$(( ${QSFP_PORT} - 1 )) + + #status: 0 -> Down, 1 -> Up + status=$(( $(($regData & ( 1 << $port_num))) != 0 ? 0 : 1 )) + echo "ABS=$status regData=$regData" + + +} + +#Get QSFP RST +function _i2c_qsfp_rst_get { + + if [ ${QSFP_PORT} -lt 49 ] || [ ${QSFP_PORT} -gt 64 ]; then + echo "Please input 49~64" + exit + fi + _qsfp_port_i2c_var_set ${QSFP_PORT} + + + regData=`cat /sys/devices/platform/ingrasys-s8900-64xc-cpld.0/qsfp_reset` + port_num=$(( ${QSFP_PORT} - 49 )) + + #status: 0 -> Down, 1 -> Up + status=$(( $(($regData & ( 1 << $port_num))) != 0 ? 0 : 1 )) + echo "RST=$status regData=$regData" + +} + +#Get QSFP LPMODE +function _i2c_qsfp_lpmode_get { + + if [ ${QSFP_PORT} -lt 49 ] || [ ${QSFP_PORT} -gt 64 ]; then + echo "Please input 49~64" + exit + fi + _qsfp_port_i2c_var_set ${QSFP_PORT} + + + regData=`cat /sys/devices/platform/ingrasys-s8900-64xc-cpld.0/qsfp_lpmode` + port_num=$(( ${QSFP_PORT} - 49 )) + + #status: 0 -> Down, 1 -> Up + status=$(( $(($regData & ( 1 << $port_num))) != 0 ? 1 : 0 )) + echo "LPMODE=$status regData=$regData" + +} +#PSU EEPROM init +function _i2c_psu_eeprom_init { + echo "=========================================================" + echo "# Description: I2C PSU EEPROM Init..." + echo "=========================================================" + + ## modprobe eeprom + modprobe eeprom + ## PUS(0) EEPROM + echo "eeprom 0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN6_DEVICE}/new_device + + ## PUS(1) EEPROM + echo "eeprom 0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN7_DEVICE}/new_device + + echo "done..." +} + +#Get PSU EEPROM Information +function _i2c_psu_eeprom_get { + echo "=========================================================" + echo "# Description: I2C PSU EEPROM Get..." + echo "=========================================================" + + ## modprobe eeprom + modprobe eeprom + ## PUS(0) EEPROM + cat ${PATH_SYS_I2C_DEVICES}/${NUM_MUX1_CHAN6_DEVICE}-0050/eeprom | hexdump -C + + ## PUS(1) EEPROM + cat ${PATH_SYS_I2C_DEVICES}/${NUM_MUX1_CHAN7_DEVICE}-0050/eeprom | hexdump -C + echo "done..." +} + +#Get MotherBoard EEPROM Information +function _i2c_mb_eeprom_get { + echo "=========================================================" + echo "# Description: I2C MB EEPROM Get..." + echo "=========================================================" + + ## modprobe eeprom + modprobe eeprom_mb + + ## MB EEPROM + cat ${PATH_SYS_I2C_DEVICES}/${NUM_MUX1_CHAN5_DEVICE}-0054/eeprom | hexdump -C + echo "done..." +} + +#Set System Status LED +function _i2c_sys_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x40 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x40 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x80 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x80 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Set PSU2 LED +function _i2c_psu2_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x04 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x04 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x08 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x08 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Set FAN Tray LED +function _i2c_fan_tray_led { + + case ${FAN_TRAY} in + 1) + i2cAddr=0x20 + ioPort=2 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 2) + i2cAddr=0x20 + ioPort=2 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + 3) + i2cAddr=0x20 + ioPort=3 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 4) + i2cAddr=0x20 + ioPort=3 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + 5) + i2cAddr=0x21 + ioPort=2 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + *) + echo "Please input 1~5" + exit + ;; + esac + + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m $mask -y -r ${NUM_MUX1_CHAN3_DEVICE} $i2cAddr $ioPort 0x00 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m $mask -y -r ${NUM_MUX1_CHAN3_DEVICE} $i2cAddr $ioPort 0x33 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m $mask -y -r ${NUM_MUX1_CHAN3_DEVICE} $i2cAddr $ioPort 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m $mask -y -r ${NUM_MUX1_CHAN3_DEVICE} $i2cAddr $ioPort 0x33 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Set FAN LED +function _i2c_fan_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x10 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x10 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x20 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x20 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Set PSU1 LED +function _i2c_psu1_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x01 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x01 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x02 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x02 -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 2 0xFF + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Get Board Version and Type +function _i2c_board_type_get { + boardType=`cat ${PATH_SYS_I2C_DEVICES}/0-0033/cpld_board_type` + boardBuildRev=$((($boardType) & 0x03)) + boardHwRev=$((($boardType) >> 2 & 0x03)) + boardId=$((($boardType) >> 4)) + printf "BOARD_ID is 0x%02x, HW Rev %d, Build Rev %d\n" $boardId $boardHwRev $boardBuildRev + +} + +#Get CPLD Version +function _i2c_cpld_version { + cpldRev=`cat ${PATH_SYS_I2C_DEVICES}/0-0033/cpld_version` + cpldRelease=$((($cpldRev) >> 6 & 0x01)) + cpldVersion=$((($cpldRev) & 0x3F)) + printf "CPLD is %s version(0:RD 1:Release), Revision is 0x%02x\n" $cpldRelease $cpldVersion + +} + +#Get PSU Status +function _i2c_psu_status { + psuPresent=`cat ${PATH_SYS_I2C_DEVICES}/0-0033/cpld_pw_abs` + psu1Exist=$(($((($psuPresent) & 0x01))?0:1)) + psu2Exist=$(($((($psuPresent) & 0x02))?0:1)) + psuPwGood=`cat ${PATH_SYS_I2C_DEVICES}/0-0033/cpld_pw_good` + psu1PwGood=$(($((($psuPwGood) >> 2 & 0x01))?1:0)) + psu2PwGood=$(($((($psuPwGood) >> 2 & 0x02))?1:0)) + printf "PSU1 Exist:%d PSU1 PW Good:%d\n" $psu1Exist $psu1PwGood + printf "PSU2 Exist:%d PSU2 PW Good:%d\n" $psu2Exist $psu2PwGood +} + +#Get Front Sensor Temperature +function _i2c_front_temp { + #Front MAC + sensors | grep 'Front MAC Temp' -A 1 +} + +#Get Rear Sensor Temperature +function _i2c_rear_temp { + #Rear MAC + sensors | grep 'Rear MAC Temp' -A 1 +} + +#Increase read socket buffer for CoPP Test +function _config_rmem { + echo "109430400" > /proc/sys/net/core/rmem_max +} + +#Main Function +function _main { + tart_time_str=`date` + start_time_sec=$(date +%s) + + if [ "${EXEC_FUNC}" == "help" ]; then + _help + elif [ "${EXEC_FUNC}" == "i2c_init" ]; then + _i2c_init + elif [ "${EXEC_FUNC}" == "i2c_deinit" ]; then + _i2c_deinit + elif [ "${EXEC_FUNC}" == "i2c_temp_init" ]; then + _i2c_temp_init + elif [ "${EXEC_FUNC}" == "i2c_fan_init" ]; then + _i2c_fan_init + elif [ "${EXEC_FUNC}" == "i2c_volmon_init" ]; then + _i2c_volmon_init + elif [ "${EXEC_FUNC}" == "i2c_io_exp_init" ]; then + _i2c_io_exp_init + elif [ "${EXEC_FUNC}" == "i2c_led_test" ]; then + _i2c_led_test + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_get" ]; then + _i2c_mb_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_psu_eeprom_get" ]; then + _i2c_psu_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_get" ]; then + _i2c_qsfp_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_status_get" ]; then + _i2c_qsfp_status_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_type_get" ]; then + _i2c_qsfp_type_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_abs_get" ]; then + _i2c_qsfp_abs_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_rst_get" ]; then + _i2c_qsfp_rst_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_lpmode_get" ]; then + _i2c_qsfp_lpmode_get + elif [ "${EXEC_FUNC}" == "i2c_led_psu_status_set" ]; then + _i2c_led_psu_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_status_set" ]; then + _i2c_led_fan_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_tray_status_set" ]; then + _i2c_led_fan_tray_status_set + elif [ "${EXEC_FUNC}" == "i2c_sys_led" ]; then + _i2c_sys_led + elif [ "${EXEC_FUNC}" == "i2c_fan_led" ]; then + _i2c_fan_led + elif [ "${EXEC_FUNC}" == "i2c_fan_tray_led" ]; then + _i2c_fan_tray_led + elif [ "${EXEC_FUNC}" == "i2c_psu1_led" ]; then + _i2c_psu1_led + elif [ "${EXEC_FUNC}" == "i2c_psu2_led" ]; then + _i2c_psu2_led + elif [ "${EXEC_FUNC}" == "i2c_board_type_get" ]; then + _i2c_board_type_get + elif [ "${EXEC_FUNC}" == "i2c_cpld_version" ]; then + _i2c_cpld_version + elif [ "${EXEC_FUNC}" == "i2c_psu_status" ]; then + _i2c_psu_status + elif [ "${EXEC_FUNC}" == "i2c_front_temp" ]; then + _i2c_front_temp + elif [ "${EXEC_FUNC}" == "i2c_rear_temp" ]; then + _i2c_rear_temp + elif [ "${EXEC_FUNC}" == "i2c_test_all" ]; then + _i2c_init + _i2c_temp_init + _i2c_fan_init + _i2c_io_exp_init + _i2c_led_test + _i2c_psu_eeprom_get + _i2c_mb_eeprom_get + _i2c_board_type_get + _i2c_cpld_version + _i2c_psu_status + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + if [ "$DEBUG" == "on" ]; then + echo "-----------------------------------------------------" + end_time_str=`date` + end_time_sec=$(date +%s) + diff_time=$[ ${end_time_sec} - ${start_time_sec} ] + echo "Start Time: ${start_time_str} (${start_time_sec})" + echo "End Time : ${end_time_str} (${end_time_sec})" + echo "Total Execution Time: ${diff_time} sec" + + echo "done!!!" + fi +} + +_main diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/utils/qsfp_monitor.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/utils/qsfp_monitor.sh new file mode 100644 index 00000000000..36f9e53ef10 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/utils/qsfp_monitor.sh @@ -0,0 +1,106 @@ +#!/bin/bash +# Copyright (C) 2017 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=3 +I2C_UTILS="/usr/sbin/i2c_utils.sh" +QSFP_SI_SCRIPT="/usr/sbin/qsfp_si_cfg.sh" +QSFP_ARRAY=(0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 \ + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + +#QSFP SI monitor +function _qsfp_si_monitor { + local i + local status + for i in {0..63}; + do + status=`${I2C_UTILS} i2c_qsfp_status_get $(expr $i + 1) | egrep '^status=.*$' | sed -e 's/status=//g'` + if [ "${status}" == "1" ]; then + _qsfp_type_check $i + fi + done +} + +#QSFP type +function _qsfp_type_check { + local port=$1 + local qsfp_type=`${I2C_UTILS} i2c_qsfp_type_get $(expr $port + 1)` + local identifier=`echo "$qsfp_type" | grep '^identifier=.*$' | sed -e 's/identifier=//g'` + # identifier 11 for qsfp, 3 for sfp + if [ "${identifier}" == "11" ] || [ "${identifier}" == "3" ]; then + connector=`echo "$qsfp_type" | grep '^connector=.*$' | sed -e 's/connector=//g'` + case ${connector} in + 21|23) + #DAC + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to DAC" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} dac $port >/dev/null + fi + ;; + *) + #AOC + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to AOC" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} aoc $port >/dev/null + fi + ;; + esac + fi +} + +#Docker exist check +function _docker_swss_check { + while true + do + # Check if syncd starts + result=`docker exec -i swss bash -c "echo -en \"SELECT 1\\nHLEN HIDDEN\" | redis-cli | sed -n 2p"` #TBD FIX ME + if [ "$result" == "3" ]; then + return + fi + sleep $INTERVAL + done +} + +#Docker exist check +function _qsfp_si_cfg_script_check { + + if [ -f ${QSFP_SI_SCRIPT} ] && [ -x ${QSFP_SI_SCRIPT} ]; then + echo "SI Script exists. Start monitor." + return + else + echo "SI Script not exist. Exit monitor." + exit + fi +} + +# main function +function _main { + #Check SI Script + _qsfp_si_cfg_script_check + #Check docker swss is running + _docker_swss_check + while true + do + _qsfp_si_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/utils/qsfp_si_cfg.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/utils/qsfp_si_cfg.sh new file mode 100644 index 00000000000..3d132641f51 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/utils/qsfp_si_cfg.sh @@ -0,0 +1,409 @@ +#!/bin/bash +# Copyright (C) 2017 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +VERSION="1.0.0" +TRUE=200 +FALSE=404 + +TYPE=${1} +PORT=${2} + +# port number +MIN_PORT=0 +MAX_PORT=63 + +# INDEX of value field in array +SI_PRE_IDX=1 +SI_POST_IDX=2 +SI_MAIN_IDX=3 +SI_AMP_IDX=4 +SI_DRI_IDX=5 + +# type string +AOC_TYPE="aoc" +DAC_TYPE="dac" + +# si value for bcm command +SI_VAL="" + +# "PRE POST MAIN AMP DRIVERMODE" for each port in array +xe_aoc_si_value=( + "0x00 0x30 0x40 0x9 0x0" #port 0 + "0x00 0x30 0x40 0x9 0x0" #port 1 + "0x00 0x30 0x40 0x9 0x0" #port 2 + "0x00 0x2c 0x44 0x9 0x0" #port 3 + "0x00 0x30 0x40 0x9 0x0" #port 4 + "0x00 0x30 0x40 0x9 0x0" #port 5 + "0x00 0x2c 0x44 0x9 0x0" #port 6 + "0x00 0x2c 0x44 0x9 0x0" #port 7 + "0x00 0x2c 0x44 0x9 0x0" #port 8 + "0x00 0x28 0x48 0x9 0x0" #port 9 + "0x00 0x2c 0x44 0x9 0x0" #port 10 + "0x00 0x2c 0x44 0x9 0x0" #port 11 + "0x00 0x2c 0x44 0x9 0x0" #port 12 + "0x00 0x2c 0x44 0x9 0x0" #port 13 + "0x00 0x2c 0x44 0x9 0x0" #port 14 + "0x00 0x2c 0x44 0x9 0x0" #port 15 + "0x00 0x2c 0x44 0xb 0x0" #port 16 + "0x00 0x30 0x40 0xb 0x0" #port 17 + "0x00 0x2c 0x44 0xa 0x0" #port 18 + "0x00 0x2c 0x44 0x9 0x0" #port 19 + "0x00 0x30 0x40 0xa 0x0" #port 20 + "0x00 0x2c 0x44 0x9 0x0" #port 21 + "0x00 0x2c 0x44 0x9 0x0" #port 22 + "0x00 0x30 0x40 0xc 0x0" #port 23 + "0x00 0x30 0x40 0xc 0x0" #port 24 + "0x00 0x2c 0x44 0x9 0x0" #port 25 + "0x00 0x30 0x40 0x9 0x0" #port 26 + "0x00 0x30 0x40 0x9 0x0" #port 27 + "0x00 0x30 0x40 0xa 0x0" #port 28 + "0x00 0x28 0x48 0x9 0x0" #port 29 + "0x00 0x2c 0x44 0x9 0x0" #port 30 + "0x00 0x2c 0x44 0xa 0x0" #port 31 + "0x00 0x28 0x48 0x9 0x0" #port 32 + "0x00 0x28 0x48 0x7 0x0" #port 33 + "0x00 0x28 0x48 0x9 0x0" #port 34 + "0x00 0x28 0x48 0x9 0x0" #port 35 + "0x00 0x28 0x48 0x9 0x0" #port 36 + "0x00 0x2c 0x44 0x9 0x0" #port 37 + "0x00 0x28 0x48 0x9 0x0" #port 38 + "0x00 0x28 0x48 0x9 0x0" #port 39 + "0x00 0x28 0x48 0xa 0x0" #port 40 + "0x00 0x2c 0x44 0x9 0x0" #port 41 + "0x00 0x2c 0x44 0x9 0x0" #port 42 + "0x00 0x2e 0x42 0xa 0x0" #port 43 + "0x00 0x2e 0x42 0xa 0x0" #port 44 + "0x00 0x2c 0x44 0xa 0x0" #port 45 + "0x00 0x2c 0x44 0x9 0x0" #port 46 + "0x00 0x2c 0x44 0x9 0x0" #port 47 +) + +ce_aoc_si_value=( + "0x00 0x2c 0x44 0x9 0x0" #port 0 lane 0 + "0x00 0x34 0x3c 0xf 0x0" #port 0 lane 1 + "0x00 0x2c 0x44 0x9 0x0" #port 0 lane 2 + "0x00 0x2c 0x44 0x9 0x0" #port 0 lane 3 + "0x00 0x28 0x48 0x9 0x0" #port 1 lane 0 + "0x00 0x28 0x48 0x9 0x0" #port 1 lane 1 + "0x00 0x2c 0x44 0x9 0x0" #port 1 lane 2 + "0x00 0x2c 0x44 0xe 0x0" #port 1 lane 3 + "0x00 0x28 0x48 0x9 0x0" #port 2 lane 0 + "0x00 0x34 0x3c 0xf 0x0" #port 2 lane 1 + "0x00 0x28 0x48 0x9 0x0" #port 2 lane 2 + "0x00 0x30 0x40 0xd 0x0" #port 2 lane 3 + "0x00 0x2c 0x44 0x9 0x0" #port 3 lane 0 + "0x00 0x30 0x40 0xd 0x0" #port 3 lane 1 + "0x00 0x2c 0x44 0x9 0x0" #port 3 lane 2 + "0x00 0x30 0x40 0xd 0x0" #port 3 lane 3 + "0x00 0x2c 0x44 0x9 0x0" #port 4 lane 0 + "0x00 0x2c 0x44 0x9 0x0" #port 4 lane 1 + "0x00 0x2c 0x44 0x9 0x0" #port 4 lane 2 + "0x00 0x30 0x40 0xd 0x0" #port 4 lane 3 + "0x00 0x2c 0x44 0x9 0x0" #port 5 lane 0 + "0x00 0x38 0x38 0xf 0x0" #port 5 lane 1 + "0x00 0x2c 0x44 0x9 0x0" #port 5 lane 2 + "0x00 0x2c 0x44 0x9 0x0" #port 5 lane 3 + "0x00 0x2c 0x44 0x9 0x0" #port 6 lane 0 + "0x00 0x2c 0x44 0x9 0x0" #port 6 lane 1 + "0x00 0x2c 0x44 0x9 0x0" #port 6 lane 2 + "0x00 0x30 0x40 0xe 0x0" #port 6 lane 3 + "0x00 0x28 0x48 0x9 0x0" #port 7 lane 0 + "0x00 0x30 0x40 0xa 0x0" #port 7 lane 1 + "0x00 0x2c 0x44 0x9 0x0" #port 7 lane 2 + "0x00 0x34 0x3c 0xe 0x0" #port 7 lane 3 + "0x00 0x2c 0x44 0x9 0x0" #port 8 lane 0 + "0x00 0x30 0x40 0xe 0x0" #port 8 lane 1 + "0x00 0x34 0x3c 0xf 0x0" #port 8 lane 2 + "0x00 0x30 0x40 0xe 0x0" #port 8 lane 3 + "0x00 0x2c 0x44 0x9 0x0" #port 9 lane 0 + "0x00 0x34 0x3c 0xd 0x0" #port 9 lane 1 + "0x00 0x34 0x3c 0xd 0x0" #port 9 lane 2 + "0x00 0x34 0x3c 0xf 0x0" #port 9 lane 3 + "0x00 0x34 0x3c 0xd 0x0" #port 10 lane 0 + "0x00 0x34 0x3c 0xe 0x0" #port 10 lane 1 + "0x00 0x34 0x3c 0xd 0x0" #port 10 lane 2 + "0x00 0x34 0x3c 0xd 0x0" #port 10 lane 3 + "0x00 0x34 0x3c 0xd 0x0" #port 11 lane 0 + "0x00 0x34 0x3c 0xd 0x0" #port 11 lane 1 + "0x00 0x30 0x40 0xd 0x0" #port 11 lane 2 + "0x00 0x30 0x40 0xd 0x0" #port 11 lane 3 + "0x00 0x34 0x3c 0xd 0x0" #port 12 lane 0 + "0x00 0x34 0x3c 0xd 0x0" #port 12 lane 1 + "0x00 0x34 0x3c 0xd 0x0" #port 12 lane 2 + "0x00 0x34 0x3c 0xd 0x0" #port 12 lane 3 + "0x00 0x34 0x3c 0xd 0x0" #port 13 lane 0 + "0x00 0x34 0x3c 0xd 0x0" #port 13 lane 1 + "0x00 0x34 0x3c 0xd 0x0" #port 13 lane 2 + "0x00 0x34 0x3c 0xf 0x0" #port 13 lane 3 + "0x00 0x38 0x38 0xe 0x0" #port 14 lane 0 + "0x00 0x34 0x3c 0xd 0x0" #port 14 lane 1 + "0x00 0x34 0x3c 0xd 0x0" #port 14 lane 2 + "0x00 0x38 0x38 0xe 0x0" #port 14 lane 3 + "0x00 0x34 0x3c 0xd 0x0" #port 15 lane 0 + "0x00 0x30 0x40 0xc 0x0" #port 15 lane 1 + "0x00 0x30 0x40 0xc 0x0" #port 15 lane 2 + "0x00 0x34 0x3c 0xd 0x0" #port 15 lane 3 +) + +xe_dac_si_value=( + "0x14 0x00 0x3c 0xf 0x0" #port 0 + "0x1c 0x00 0x3c 0xf 0x0" #port 1 + "0x08 0x00 0x3c 0xf 0x0" #port 2 + "0x08 0x00 0x3c 0xf 0x0" #port 3 + "0x08 0x00 0x3c 0xf 0x0" #port 4 + "0x10 0x00 0x3c 0xf 0x0" #port 5 + "0x08 0x08 0x3c 0xf 0x0" #port 6 + "0x10 0x04 0x3c 0xf 0x0" #port 7 + "0x08 0x00 0x3c 0x9 0x0" #port 8 + "0x08 0x00 0x3c 0x9 0x0" #port 9 + "0x08 0x00 0x3c 0x9 0x0" #port 10 + "0x08 0x00 0x3c 0x9 0x0" #port 11 + "0x08 0x00 0x3c 0x9 0x0" #port 12 + "0x08 0x00 0x3c 0x9 0x0" #port 13 + "0x08 0x00 0x3c 0x9 0x0" #port 14 + "0x08 0x00 0x3c 0x9 0x0" #port 15 + "0x08 0x0c 0x3c 0xb 0x0" #port 16 + "0x10 0x0c 0x3c 0xb 0x0" #port 17 + "0x08 0x08 0x3c 0xa 0x0" #port 18 + "0x10 0x0c 0x3c 0x9 0x0" #port 19 + "0x08 0x04 0x3c 0xc 0x0" #port 20 + "0x08 0x08 0x3c 0x9 0x0" #port 21 + "0x08 0x08 0x3c 0xc 0x0" #port 22 + "0x10 0x08 0x3c 0xa 0x0" #port 23 + "0x08 0x08 0x3c 0x9 0x0" #port 24 + "0x08 0x04 0x3c 0x9 0x0" #port 25 + "0x08 0x00 0x3c 0x9 0x0" #port 26 + "0x08 0x08 0x3c 0xc 0x0" #port 27 + "0x10 0x00 0x3c 0xa 0x0" #port 28 + "0x10 0x04 0x3c 0x9 0x0" #port 29 + "0x14 0x00 0x3c 0x9 0x0" #port 30 + "0x14 0x00 0x3c 0xa 0x0" #port 31 + "0x08 0x00 0x3c 0x9 0x0" #port 32 + "0x08 0x00 0x3c 0x7 0x0" #port 33 + "0x08 0x00 0x3c 0x9 0x0" #port 34 + "0x08 0x00 0x3c 0x9 0x0" #port 35 + "0x08 0x00 0x3c 0x9 0x0" #port 36 + "0x0c 0x00 0x3c 0x9 0x0" #port 37 + "0x08 0x00 0x3c 0x9 0x0" #port 38 + "0x08 0x00 0x3c 0x9 0x0" #port 39 + "0x10 0x00 0x3c 0xa 0x0" #port 40 + "0x10 0x00 0x3c 0x9 0x0" #port 41 + "0x08 0x08 0x3c 0xc 0x0" #port 42 + "0x10 0x00 0x3c 0xa 0x0" #port 43 + "0x08 0x00 0x3c 0xa 0x0" #port 44 + "0x10 0x00 0x3c 0x9 0x0" #port 45 + "0x08 0x04 0x3c 0x9 0x0" #port 46 + "0x08 0x00 0x3c 0xa 0x0" #port 47 +) + +ce_dac_si_value=( + "0x08 0x00 0x3c 0x9 0x0" #port 0 lane 0 + "0x08 0x00 0x3c 0xf 0x0" #port 0 lane 1 + "0x08 0x00 0x3c 0x9 0x0" #port 0 lane 2 + "0x08 0x00 0x3c 0x9 0x0" #port 0 lane 3 + "0x08 0x00 0x3c 0x9 0x0" #port 1 lane 0 + "0x08 0x00 0x3c 0x9 0x0" #port 1 lane 1 + "0x08 0x00 0x3c 0x9 0x0" #port 1 lane 2 + "0x08 0x00 0x3c 0xe 0x0" #port 1 lane 3 + "0x08 0x00 0x3c 0x9 0x0" #port 2 lane 0 + "0x08 0x00 0x3c 0xf 0x0" #port 2 lane 1 + "0x08 0x00 0x3c 0x9 0x0" #port 2 lane 2 + "0x08 0x00 0x3c 0xd 0x0" #port 2 lane 3 + "0x08 0x00 0x3c 0x9 0x0" #port 3 lane 0 + "0x08 0x00 0x3c 0xd 0x0" #port 3 lane 1 + "0x08 0x00 0x3c 0x9 0x0" #port 3 lane 2 + "0x08 0x00 0x3c 0xd 0x0" #port 3 lane 3 + "0x08 0x00 0x3c 0x9 0x0" #port 4 lane 0 + "0x08 0x00 0x3c 0x9 0x0" #port 4 lane 1 + "0x08 0x00 0x3c 0x9 0x0" #port 4 lane 2 + "0x08 0x00 0x3c 0xd 0x0" #port 4 lane 3 + "0x08 0x00 0x3c 0x9 0x0" #port 5 lane 0 + "0x08 0x00 0x3c 0xf 0x0" #port 5 lane 1 + "0x08 0x00 0x3c 0x9 0x0" #port 5 lane 2 + "0x08 0x00 0x3c 0x9 0x0" #port 5 lane 3 + "0x08 0x00 0x3c 0x9 0x0" #port 6 lane 0 + "0x08 0x00 0x3c 0x9 0x0" #port 6 lane 1 + "0x08 0x00 0x3c 0x9 0x0" #port 6 lane 2 + "0x08 0x00 0x3c 0xe 0x0" #port 6 lane 3 + "0x08 0x00 0x3c 0x9 0x0" #port 7 lane 0 + "0x08 0x00 0x3c 0xa 0x0" #port 7 lane 1 + "0x08 0x00 0x3c 0x9 0x0" #port 7 lane 2 + "0x08 0x00 0x3c 0xe 0x0" #port 7 lane 3 + "0x08 0x04 0x3c 0xf 0x0" #port 8 lane 0 + "0x08 0x00 0x3c 0xf 0x0" #port 8 lane 1 + "0x08 0x04 0x3c 0xf 0x0" #port 8 lane 2 + "0x08 0x00 0x3c 0xf 0x0" #port 8 lane 3 + "0x08 0x04 0x3c 0xf 0x0" #port 9 lane 0 + "0x08 0x04 0x3c 0xf 0x0" #port 9 lane 1 + "0x08 0x04 0x3c 0xf 0x0" #port 9 lane 2 + "0x08 0x04 0x3c 0xf 0x0" #port 9 lane 3 + "0x08 0x04 0x3c 0xf 0x0" #port 10 lane 0 + "0x10 0x08 0x3c 0xf 0x0" #port 10 lane 1 + "0x08 0x04 0x3c 0xf 0x0" #port 10 lane 2 + "0x08 0x04 0x3c 0xf 0x0" #port 10 lane 3 + "0x08 0x08 0x3c 0xf 0x0" #port 11 lane 0 + "0x08 0x04 0x3c 0xf 0x0" #port 11 lane 1 + "0x08 0x04 0x3c 0xf 0x0" #port 11 lane 2 + "0x08 0x04 0x3c 0xf 0x0" #port 11 lane 3 + "0x08 0x0c 0x3c 0xf 0x0" #port 12 lane 0 + "0x08 0x08 0x3c 0xf 0x0" #port 12 lane 1 + "0x08 0x0c 0x3c 0xf 0x0" #port 12 lane 2 + "0x08 0x08 0x3c 0xf 0x0" #port 12 lane 3 + "0x08 0x08 0x3c 0xf 0x0" #port 13 lane 0 + "0x08 0x0c 0x3c 0xf 0x0" #port 13 lane 1 + "0x08 0x08 0x3c 0xf 0x0" #port 13 lane 2 + "0x08 0x0c 0x3c 0xf 0x0" #port 13 lane 3 + "0x10 0x10 0x3c 0xf 0x0" #port 14 lane 0 + "0x08 0x0c 0x3c 0xf 0x0" #port 14 lane 1 + "0x08 0x0c 0x3c 0xf 0x0" #port 14 lane 2 + "0x08 0x0c 0x3c 0xf 0x0" #port 14 lane 3 + "0x08 0x14 0x3c 0xf 0x0" #port 15 lane 0 + "0x08 0x10 0x3c 0xf 0x0" #port 15 lane 1 + "0x08 0x10 0x3c 0xf 0x0" #port 15 lane 2 + "0x08 0x10 0x3c 0xf 0x0" #port 15 lane 3 +) + +#get field value in si value array for xe port +function get_xe_si { + local port=$1 + local field=$2 + local type=$3 + local index=$port + if [ "$type" == "${AOC_TYPE}" ]; then + SI_VAL=$(echo "${xe_aoc_si_value[$index]}" | awk '{print $'$field'}') + else + SI_VAL=$(echo "${xe_dac_si_value[$index]}" | awk '{print $'$field'}') + fi +} + +#get field value in si value array for ce port +function get_ce_si { + local port=$1 + local lane=$2 + local field=$3 + local type=$4 + index=$(( (${port}-1)*4+${lane} )) + if [ "$type" == "${AOC_TYPE}" ]; then + SI_VAL=$(echo "${ce_aoc_si_value[$index]}" | awk '{print $'$field'}') + else + SI_VAL=$(echo "${ce_dac_si_value[$index]}" | awk '{print $'$field'}') + fi +} + +# set si value for xe port +function _qsfp_xe_si_set { + # convert PORT to xe port index + local xe_port=$PORT + # generate command for SI PRE value + get_xe_si $xe_port $SI_PRE_IDX $TYPE + local pre_cmd="phy xe${xe_port} CL93N72_UT_CTL2r CL93N72_TXFIR_PRE=${SI_VAL}" + # generate command for SI POST value + get_xe_si $xe_port $SI_POST_IDX $TYPE + local post_cmd="phy xe${xe_port} CL93N72_UT_CTL2r CL93N72_TXFIR_POST=${SI_VAL}" + # generate command for SI MAIN value + get_xe_si $xe_port $SI_MAIN_IDX $TYPE + local main_cmd="phy xe${xe_port} CL93N72_UT_CTL3r CL93N72_TXFIR_MAIN=${SI_VAL}" + # generate command for SI AMP CONTROL value + get_xe_si $xe_port $SI_AMP_IDX $TYPE + local amp_val=$SI_VAL + get_xe_si $xe_port $SI_DRI_IDX $TYPE + local dri_val=$SI_VAL + local amp_cmd="phy xe${xe_port} AMS_TX_CTL2r AMS_TX_AMP_CTL=${amp_val} AMS_TX_DRIVERMODE=${dri_val}" + # apply bcmcmd + bcmcmd "${pre_cmd};${post_cmd};${main_cmd};${amp_cmd}" +} + +# set aoc si value for ce port +function _qsfp_ce_si_set { + # convert PORT to ce port index + local ce_port=$(( $PORT - 48 )) + for lane in {0..3}; + do + # generate command for SI PRE value + get_ce_si $ce_port $lane $SI_PRE_IDX $TYPE + local pre_cmd="phy ce${ce_port} CL93N72_UT_CTL2r.${lane} CL93N72_TXFIR_PRE=${SI_VAL}" + # generate command for SI POST value + get_ce_si $ce_port $lane $SI_POST_IDX $TYPE + local post_cmd="phy ce${ce_port} CL93N72_UT_CTL2r.${lane} CL93N72_TXFIR_POST=${SI_VAL}" + # generate command for SI MAIN value + get_ce_si $ce_port $lane $SI_MAIN_IDX $TYPE + local main_cmd="phy ce${ce_port} CL93N72_UT_CTL3r.${lane} CL93N72_TXFIR_MAIN=${SI_VAL}" + # generate command for SI AMP CONTROL value + get_ce_si $ce_port $lane $SI_AMP_IDX $TYPE + local amp_val=$SI_VAL + get_ce_si $ce_port $lane $SI_AMP_IDX $TYPE + local dri_val=$SI_VAL + local amp_cmd="phy ce${ce_port} AMS_TX_CTL2r.${lane} AMS_TX_AMP_CTL=${amp_val} AMS_TX_DRIVERMODE=${dri_val}" + # apply bcmcmd + bcmcmd "${pre_cmd};${post_cmd};${main_cmd};${amp_cmd}" + done +} + +#QSFP SI value set +function _qsfp_si_set { + if [[ $PORT -le 47 && $PORT -ge 0 ]]; then + # xe port + _qsfp_xe_si_set + else + # ce port + _qsfp_ce_si_set + fi +} + +function _util_input_check { + # input parameter validation + if [[ $1 -lt $2 || $1 -gt $3 ]]; then + echo "Please input number $2~$3" + exit + fi +} + +# Help usage function +function _help { + echo "=========================================================" + echo "# Description: Help Function" + echo "=========================================================" + echo "----------------------------------------------------" + echo "EX : ${0} help" + echo " : ${0} ${AOC_TYPE} [${MIN_PORT}-${MAX_PORT}]" + echo " : ${0} ${DAC_TYPE} [${MIN_PORT}-${MAX_PORT}]" + echo "----------------------------------------------------" +} + +#Main Function +function _main { + + # TODO: remove after SI value ready + #exit ${TRUE} + + if [ -z $PORT ]; then + _help + exit ${FALSE} + fi + + if [ "${TYPE}" == "help" ]; then + _help + elif [ "${TYPE}" == "${AOC_TYPE}" ] || [ "${TYPE}" == "${DAC_TYPE}" ]; then + _util_input_check "$PORT" "$MIN_PORT" "$MAX_PORT" + _qsfp_si_set + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi +} + +_main diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/utils/s8900_64xc_monitor.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/utils/s8900_64xc_monitor.sh new file mode 100755 index 00000000000..8bfb2232800 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s8900-64xc/utils/s8900_64xc_monitor.sh @@ -0,0 +1,39 @@ +#!/bin/bash +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=5 +I2C_UTILS="/usr/sbin/i2c_utils.sh" + + +# LED status monitor +function _led_monitor { + ${I2C_UTILS} i2c_led_fan_status_set >/dev/null + ${I2C_UTILS} i2c_led_psu_status_set >/dev/null + ${I2C_UTILS} i2c_led_fan_tray_status_set >/dev/null +} + +# main function +function _main { + while true + do + _led_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9100/README.md b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/README.md new file mode 100644 index 00000000000..78f828e2531 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/README.md @@ -0,0 +1,185 @@ +# Ingrasys S9100-32X Platform Driver for SONiC + +Copyright (C) 2016 Ingrasys, Inc. + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + + +## Licensing terms + +The Licensing terms of the files within this project is split 2 parts. +The Linux kernel is released under the GNU General Public License version 2. +All other code is released under the GNU General Public License version 3. +Please see the LICENSE file for copies of both licenses. + +## Contents of this package + + - service/ + > Service config files for platform initialization and monitoring + - utils/ + > Scripts useful during platform bringup and sysfs function + - conf/ + > Platform configure files. + +## Kernel modules and drivers + +The driver for interacting with Ingrasys S9100-32X is contained in the I2C +kernel module and initialization script. The initialization script loads +the modules in the correct order. It has been built and tested against +the Linux 3.16 kernel. + +The initialization script will modprobe the needed modules, navigate to the +module's device directory in sysfs, and write configuration data to +the kernel module. + +### IGB + +This is OOB Ports on front panel for management plane. + +The IGB module must be loaded first on Ingrasys S9100-32X platform. + +### I2C i801 + +The I2C i801 on Ingrasys S9100-32X can be found in +`/sys/bus/i2c/devices/i2c-0/` + +This is I2C bus for Clock Gen, DIMM channel and digital potentiometers. + +The i801 module must be loaded second on Ingrasys S9100-32X. + +### I2C iSMT + +The I2C iSMT module on S9100-32X can be found in +`/sys/bus/i2c/devices/i2c-1/` + +This is I2C bus for CPLD, HWM, power controller and I2C Switches. + +The i801 module must be loaded third on Ingrasys S9100-32X. + +### I2C PCA9548 +The PCA9548 module on S9100-32X can be found in +`/sys/bus/i2c/devices/i2c-2/` , `/sys/bus/i2c/devices/i2c-3/`, +`/sys/bus/i2c/devices/i2c-4/`, `/sys/bus/i2c/devices/i2c-5/`, +`/sys/bus/i2c/devices/i2c-6/`, `/sys/bus/i2c/devices/i2c-7/`, +`/sys/bus/i2c/devices/i2c-8/`, `/sys/bus/i2c/devices/i2c-9/`. + +The pca9548 module for zQSFP module get/set functions, PSU information, +fan status and EEPROM. + +## Hardware components + +The hardware components are initialized in the init script on S9100-32X. +The following describes manual initialization as well as interaction. +The examples below are just for Ingrasys S9100-32X platform. + +### Hardware initialization + +When the sonic-platform-ingrasys-s9100 package is installed on the S9100-32X, +it is automatically initialized. If you want to manual initialization, the +utility command usage as follows: +``` + i2c_utils.sh i2c_init +``` + +### EEPROM + +The EEPROM is including the board SKU, model name, vendor name, serial number, +and other information can be accessed with the specific eeprom kernel module. +After using `modprobe eeprom_mb` to detect the eeprom, it will show up in sysfs. + +The hexdump utility can be used to decode the raw output of the EEPROM. +For example, +``` + bash# echo "mb_eeprom 0x54" > /sys/bus/i2c/devices/i2c-9/new_device + bash# cat /sys/bus/i2c/drivers/mb_eeprom/9-0054/eeprom | hexdump -C +``` + +### Front panel LEDs + +LEDs can be setup on/off by using i2c utility `/usr/sbin/i2c_utils.sh`. +Utility function command usage as follows: + +``` +Status LED: + i2c_utils.sh i2c_sys_led green|amber on|off + +Fan status LED: + i2c_utils.sh i2c_fan_led green|amber on|off + +PSU1 status LED: + i2c_utils.sh i2c_psu1_led green|amber on|off + +PSU2 status LED: + i2c_utils.sh i2c_psu2_led green|amber on|off + +``` +QSFP Module Port LEDs control by ASIC library. + + +### Fan speed + +Fan speed are controlled by the w83795 kernel module. +It can be found in `/sys/class/hwmon/hwmon1/device/`. +If they were compiled as modules, you will need to modprobe w83795 for +their sysfs entries to show up. Each fan has an `fan_input` file +for reading the fan speed. And `pwm1` setting fan1 to fan4, +`pwm2` setting fan5 to fan8. + +There is docker-platform-monitor container installed fancontrol package that can +automatic control platform fan speed. + + +### Temperature sensors + +Temperature sensors are controlled by the w83795 kernel +module. It can be found in `/sys/class/hwmon/hwmon1/device/`. +If they were compiled as modules, then you will need to modprobe w83795 for +their sysfs entries to show up. +`temp1_input` is front MAC temperature sensor. `temp2_input` is rear MAC +temperature sensor. + +There is docker-platform-monitor container installed lm-sensors package that can +monitor platform temperature. And `sensors` command can show each +temperature sensors status. + +### Power supplies + +Power supplies status and its EEPROM info can be used i2c utility +`/usr/sbin/i2c_utils.sh` to get. +The usage as follows: +``` +PSU EEPROM: + i2c_utils.sh i2c_psu_eeprom_get + hexdump -C psu0.rom + hexdump -C psu1.rom + +PSU Status: + i2c_utils.sh i2c_psu_status +``` + +### QSFPs +QSFP modules are managed by the pca9548 kernel driver. +The i2c utility `/usr/sbin/i2c_utils.sh` can be used to get status and +module EEPROM informations. +The usage as follows: +``` +QSFP EEPROM: + i2c_utils.sh i2c_qsfp_eeprom_get [1-32] + +QSFP Insert Event: + i2c_utils.sh i2c_qsfp_eeprom_get [1-32] + 0 => not insert + 1 => inserted +``` + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9100/modules/Makefile b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/modules/Makefile new file mode 100755 index 00000000000..0247bd586f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := eeprom_mb.o +obj-m+= i2c_cpld.o \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9100/modules/eeprom_mb.c b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/modules/eeprom_mb.c new file mode 100755 index 00000000000..01ce44ad3fe --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/modules/eeprom_mb.c @@ -0,0 +1,212 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57, I2C_CLIENT_END }; + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void mb_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t mb_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + mb_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute mb_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = mb_eeprom_read, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int mb_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x50. So decline + attaching to addresses >= 0x51 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x51) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int mb_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &mb_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int mb_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &mb_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id mb_eeprom_id[] = { + { "mb_eeprom", 0 }, + { } +}; + +static struct i2c_driver mb_eeprom_driver = { + .driver = { + .name = "mb_eeprom", + }, + .probe = mb_eeprom_probe, + .remove = mb_eeprom_remove, + .id_table = mb_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = mb_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(mb_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("Ingrasys S9100 Mother Borad EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9100/modules/i2c_cpld.c b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/modules/i2c_cpld.c new file mode 100755 index 00000000000..626c63177b5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/modules/i2c_cpld.c @@ -0,0 +1,448 @@ +/* + * S9100-32X I2C CPLD driver + * + * Copyright (C) 2017 Ingrasys, Inc. + * Wade He + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "i2c_cpld.h" + +#ifdef DEBUG + #define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s[%d]: " fmt "\r\n", \ + __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ +} +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ +} + +/* CPLD sysfs attributes index */ +enum i2c_cpld_sysfs_attributes { + CPLD_ACCESS_REG, + CPLD_REGISTER_VAL, + CPLD_PORT_START, + CPLD_PORTS, + CPLD_VERSION, + CPLD_ID, + CPLD_BOARD_TYPE, + CPLD_EXT_BOARD_TYPE, + CPLD_PW_GOOD, + CPLD_PW_ABS, +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_cpld_version(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_board_type(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_ext_board_type(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_pw_good(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_pw_abs(struct device *dev, + struct device_attribute *da, char *buf); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +/* CPLD device id and data */ +static const struct i2c_device_id i2c_cpld_id[] = { + { "i2c_cpld", i2c_cpld }, + {} +}; + +/* Addresses scanned for i2c_cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x33, I2C_CLIENT_END }; +/* platform sysfs object */ +extern struct kobject *s9230_64x_kobj; + + +/* define all support register access of cpld in attribute */ +static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, + read_access_register, write_access_register, CPLD_ACCESS_REG); +static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, + read_register_value, write_register_value, CPLD_REGISTER_VAL); +static SENSOR_DEVICE_ATTR(cpld_version, S_IRUGO, + read_cpld_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(cpld_board_type, S_IRUGO, + read_board_type, NULL, CPLD_BOARD_TYPE); +static SENSOR_DEVICE_ATTR(cpld_ext_board_type, S_IRUGO, + read_ext_board_type, NULL, CPLD_EXT_BOARD_TYPE); +static SENSOR_DEVICE_ATTR(cpld_pw_good, S_IRUGO, + read_pw_good, NULL, CPLD_PW_GOOD); +static SENSOR_DEVICE_ATTR(cpld_pw_abs, S_IRUGO, + read_pw_abs, NULL, CPLD_PW_ABS); + + +/* define support attributes of cpldx , total 5 */ +/* cpld 1 */ +static struct attribute *i2c_cpld_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpld_board_type.dev_attr.attr, + &sensor_dev_attr_cpld_ext_board_type.dev_attr.attr, + &sensor_dev_attr_cpld_pw_good.dev_attr.attr, + &sensor_dev_attr_cpld_pw_abs.dev_attr.attr, + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group i2c_cpld_group = { + .attrs = i2c_cpld_attributes, +}; + +/* read access register from cpld data */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + + return sprintf(buf, "0x%x\n", reg); +} + +/* write access register to cpld data */ +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + + if (kstrtou8(buf, 0, ®) < 0) + return -EINVAL; + + data->access_reg = reg; + return count; +} + +/* read the value of access register in cpld data */ +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (reg_val < 0) + return -1; + + return sprintf(buf, "0x%x\n", reg_val); +} + +/* wrtie the value to access register in cpld data */ +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int ret = -EIO; + u8 reg = data->access_reg; + u8 reg_val; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val); + + return count; +} + +/* get cpdl version register value */ +static ssize_t read_cpld_version(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_VERSION) { + reg = CPLD_VERSION_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get board type register value */ +static ssize_t read_board_type(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_BOARD_TYPE) { + reg = CPLD_BOARD_TYPE_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get extend board type register value */ +static ssize_t read_ext_board_type(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_EXT_BOARD_TYPE) { + reg = CPLD_EXT_BOARD_TYPE_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get extend board type register value */ +static ssize_t read_pw_good(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_PW_GOOD) { + reg = CPLD_PW_GOOD_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get extend board type register value */ +static ssize_t read_pw_abs(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_PW_ABS) { + reg = CPLD_PW_ABS_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* add valid cpld client to list */ +static void i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int i2c_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + + status = sysfs_create_group(&client->dev.kobj,&i2c_cpld_group); + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + i2c_cpld_add_client(client); + + return 0; +exit: + sysfs_remove_group(&client->dev.kobj, &i2c_cpld_group); + return status; +} + +/* cpld drvier remove */ +static int i2c_cpld_remove(struct i2c_client *client) +{ + + sysfs_remove_group(&client->dev.kobj, &i2c_cpld_group); + + i2c_cpld_remove_client(client); + return 0; +} + +MODULE_DEVICE_TABLE(i2c, i2c_cpld_id); + +static struct i2c_driver i2c_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "i2c_cpld", + }, + .probe = i2c_cpld_probe, + .remove = i2c_cpld_remove, + .id_table = i2c_cpld_id, + .address_list = cpld_i2c_addr, +}; + +static int __init i2c_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&i2c_cpld_driver); +} + +static void __exit i2c_cpld_exit(void) +{ + i2c_del_driver(&i2c_cpld_driver); +} + +MODULE_AUTHOR("Wade He "); +MODULE_DESCRIPTION("Ingrasys S9100-32X Platform i2c cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(i2c_cpld_init); +module_exit(i2c_cpld_exit); + + + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9100/modules/i2c_cpld.h b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/modules/i2c_cpld.h new file mode 100755 index 00000000000..e103b05c717 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/modules/i2c_cpld.h @@ -0,0 +1,197 @@ +/* + * + * S9100-32X I2C CPLD driver header file + * + * Copyright (C) 2017 Ingrasys, Inc. + * Wade He + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef I2C_CPLD_H +#define I2C_CPLD_H + +// remove debug before release +#define DEBUG + +/* CPLD device index value */ +enum cpld_id { + i2c_cpld +}; + +/* port number on CPLD */ +#define CPLD_1_PORT_NUM 12 +#define CPLD_2_PORT_NUM 13 + +/* QSFP port number */ +#define QSFP_MAX_PORT_NUM 64 +#define QSFP_MIN_PORT_NUM 1 + +/* SFP+ port number */ +#define SFP_MAX_PORT_NUM 2 +#define SFP_MIN_PORT_NUM 1 + + +/* CPLD registers */ +#define CPLD_BOARD_TYPE_REG 0x0 +#define CPLD_EXT_BOARD_TYPE_REG 0x7 +#define CPLD_VERSION_REG 0x1 +#define CPLD_PW_GOOD_REG 0x2 +#define CPLD_PW_ABS_REG 0x3 + + +/* bit definition for register value */ + +enum CPLD_RESET_CONTROL_BITS { + CPLD_RESET_CONTROL_SWRST_BIT, + CPLD_RESET_CONTROL_CP2104RST_BIT, + CPLD_RESET_CONTROL_82P33814RST_BIT, + CPLD_RESET_CONTROL_BMCRST_BIT, +}; + +/* bit field structure for register value */ +struct cpld_reg_board_type_t { + u8 build_rev:2; + u8 hw_rev:2; + u8 board_id:4; +}; + +struct cpld_reg_version_t { + u8 revision:6; + u8 release:1; + u8 reserve:1; +}; + +struct cpld_reg_pw_good_t { + u8 reserve1:3; + u8 psu1:1; + u8 psu2:1; + u8 reserve2:3; +}; + +struct cpld_reg_pw_abs_t { + u8 psu1:1; + u8 psu2:1; + u8 reserve:6; +}; + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) +#define READ_BIT(val, bit) ((0u == (val & (1<bf_name) +#define READ_BF_1(bf_struct, val, bf_name, bf_value) \ + bf_struct bf; \ + bf.data = val; \ + bf_value = bf.bf_name +#define BOARD_TYPE_BUILD_REV_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, build_rev, res) +#define BOARD_TYPE_HW_REV_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, hw_rev, res) +#define BOARD_TYPE_BOARD_ID_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, board_id, res) +#define CPLD_VERSION_REV_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, revision, res) +#define CPLD_VERSION_REL_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, release, res) +#define CPLD_PSU1_PW_GOOD_GET(val, res) \ + READ_BF(cpld_reg_pw_good_t, val, psu1, res) +#define CPLD_PSU2_PW_GOOD_GET(val, res) \ + READ_BF(cpld_reg_pw_good_t, val, psu2, res) +#define CPLD_PSU1_PW_ABS_GET(val, res) \ + READ_BF(cpld_reg_pw_abs_t, val, psu1, res) +#define CPLD_PSU2_PW_ABS_GET(val, res) \ + READ_BF(cpld_reg_pw_abs_t, val, psu2, res) +/* QSFP/SFP registers manipulation */ +#define QSFP_TO_CPLD_IDX(qsfp_port, cpld_index, cpld_port) \ +{ \ + if (QSFP_MIN_PORT_NUM <= qsfp_port && qsfp_port <= CPLD_1_PORT_NUM) { \ + cpld_index = cpld1; \ + cpld_port = qsfp_port - 1; \ + } else if (CPLD_1_PORT_NUM < qsfp_port \ + && qsfp_port <= QSFP_MAX_PORT_NUM) { \ + cpld_index = cpld2 + (qsfp_port - 1 - CPLD_1_PORT_NUM) \ + / CPLD_2_PORT_NUM; \ + cpld_port = (qsfp_port - 1 - CPLD_1_PORT_NUM) % \ + CPLD_2_PORT_NUM; \ + } else { \ + cpld_index = 0; \ + cpld_port = 0; \ + } \ +} +#define SFP_TO_CPLD_IDX(sfp_port, cpld_index) \ + (cpld_index = sfp_port - SFP_MIN_PORT_NUM) +#define QSFP_PORT_STATUS_REG(cpld_port) \ + (CPLD_QSFP_PORT_STATUS_BASE_REG + cpld_port) +#define QSFP_PORT_CONFIG_REG(cpld_port) \ + (CPLD_QSFP_PORT_CONFIG_BASE_REG + cpld_port) +#define QSFP_PORT_INT_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_QSFP_PORT_STATUS_INT_BIT) +#define QSFP_PORT_ABS_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_QSFP_PORT_STATUS_ABS_BIT) +#define QSFP_PORT_RESET_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_LPMODE_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define QSFP_PORT_RESET_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_RESET_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_LPMODE_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define QSFP_PORT_LPMODE_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define SFP_PORT_PRESENT_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_STATUS_PRESENT_BIT) + + #define SFP_PORT_TXFAULT_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_STATUS_TXFAULT_BIT) + #define SFP_PORT_RXLOS_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_STATUS_RXLOS_BIT) + #define SFP_PORT_TXDIS_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_CONFIG_TXDIS_BIT) +#define SFP_PORT_RS_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_RS_BIT) +#define SFP_PORT_TS_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TS_BIT) +#define SFP_PORT_TXDIS_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TXDIS_BIT) +#define SFP_PORT_TXDIS_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TXDIS_BIT) +#define SFP_PORT_RS_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_RS_BIT) +#define SFP_PORT_RS_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_RS_BIT) +#define SFP_PORT_TS_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TS_BIT) +#define SFP_PORT_TS_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TS_BIT) + +/* CPLD access functions */ +extern int i2c_cpld_get_qsfp_port_status_val(u8 port_num); +extern int i2c_cpld_get_qsfp_port_config_val(u8 port_num); +extern int i2c_cpld_set_qsfp_port_config_val(u8 port_num, u8 reg_val); +extern int i2c_cpld_get_sfp_port_status_val(u8 port_num); +extern int i2c_cpld_get_sfp_port_config_val(u8 port_num); +extern int i2c_cpld_set_sfp_port_config_val(u8 port_num, u8 reg_val); +extern u8 fp_port_to_phy_port(u8 fp_port); +#endif + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9100/service/qsfp-monitor.service b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/service/qsfp-monitor.service new file mode 100644 index 00000000000..584d6fcae89 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/service/qsfp-monitor.service @@ -0,0 +1,15 @@ +[Unit] +Description= This QSFP Monitor service is to setup QSFP SI. +Requires=s9100-monitor.service +After=s9100-monitor.service + +[Service] +ExecStart=/usr/sbin/qsfp_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9100/service/s9100-monitor.service b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/service/s9100-monitor.service new file mode 100644 index 00000000000..5e074782a85 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/service/s9100-monitor.service @@ -0,0 +1,19 @@ +[Unit] +Description= This Platform Monitor service is to initialize platform and monitor platform. +Before=platform-monitor.service +After=sysinit.target +Wants=fancontrol.service +Wants=qsfp-monitor.service +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/sbin/i2c_utils.sh i2c_init +ExecStart=/usr/sbin/s9100_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9100/utils/i2c_utils.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/utils/i2c_utils.sh new file mode 100755 index 00000000000..4aefe153a67 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/utils/i2c_utils.sh @@ -0,0 +1,1607 @@ +#!/bin/bash + +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# trun on for more debug output +#DEBUG="on" + +VERSION="1.1.0" +TRUE=200 +FALSE=404 + +EXEC_FUNC=${1} +COLOR_LED=${2} +QSFP_PORT=${2} +QSFP_ACTION=${2} +MB_EEPROM_ACTION=${2} +ONOFF_LED=${3} +FAN_TRAY=${4} + +############################################################ +# Distributor ID: Debian +# Description: Debian GNU/Linux 8.6 (jessie) +# Release: 8.6 +# Codename: jessie +# Linux debian 3.16.0-4-amd64 #1 +# SMP Debian 3.16.36-1+deb8u1 (2016-09-03) x86_64 GNU/Linux +############################################################ + +# Color Definition +COLOR_TITLE="\e[1;32m" ### Green ### +COLOR_WARNING="\e[1;33m" ### Yellow ### +COLOR_ERROR="\e[1;31m" ### Red ### +COLOR_END="\e[0m" ### END ### + +NUM_IGB_DEVICE=0 +NUM_I801_DEVICE=0 +NUM_ISMT_DEVICE=$(( ${NUM_I801_DEVICE} + 1 )) +NUM_MUX1_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 2 )) +NUM_MUX1_CHAN1_DEVICE=$(( ${NUM_I801_DEVICE} + 3 )) +NUM_MUX1_CHAN2_DEVICE=$(( ${NUM_I801_DEVICE} + 4 )) +NUM_MUX1_CHAN3_DEVICE=$(( ${NUM_I801_DEVICE} + 5 )) +NUM_MUX1_CHAN4_DEVICE=$(( ${NUM_I801_DEVICE} + 6 )) +NUM_MUX1_CHAN5_DEVICE=$(( ${NUM_I801_DEVICE} + 7 )) +NUM_MUX1_CHAN6_DEVICE=$(( ${NUM_I801_DEVICE} + 8 )) +NUM_MUX1_CHAN7_DEVICE=$(( ${NUM_I801_DEVICE} + 9 )) +NUM_MUX3_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 10 )) +NUM_MUX4_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 18 )) +NUM_MUX5_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 26 )) +NUM_MUX6_CHAN0_DEVICE=$(( ${NUM_I801_DEVICE} + 34 )) + +PATH_SYS_I2C_DEVICES="/sys/bus/i2c/devices" +PATH_HWMON_ROOT_DEVICES="/sys/class/hwmon" +PATH_HWMON_W83795_DEVICE="${PATH_HWMON_ROOT_DEVICES}/hwmon1" +PATH_I801_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_I801_DEVICE}" +PATH_ISMT_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_ISMT_DEVICE}" +PATH_MUX_CHAN0_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN0_DEVICE}" +PATH_MUX_CHAN1_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN1_DEVICE}" +PATH_MUX_CHAN2_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN2_DEVICE}" +PATH_MUX_CHAN3_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN3_DEVICE}" +PATH_MUX_CHAN4_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN4_DEVICE}" +PATH_MUX_CHAN5_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN5_DEVICE}" +PATH_MUX_CHAN6_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN6_DEVICE}" +PATH_MUX_CHAN7_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN7_DEVICE}" + +#Power Supply Status +PSU_DC_ON=1 +PSU_DC_OFF=0 +PSU_EXIST=1 +PSU_NOT_EXIST=0 + +#GPIO Offset +GPIO_OFFSET=0 + +# Help usage function +function _help { + echo "=========================================================" + echo "# Description: Help Function" + echo "# Version : ${VERSION}" + echo "=========================================================" + echo "----------------------------------------------------" + echo "EX : ${0} help" + echo " : ${0} i2c_init" + echo " : ${0} i2c_deinit" + echo " : ${0} i2c_temp_init" + echo " : ${0} i2c_fan_init" + echo " : ${0} i2c_volmon_init" + echo " : ${0} i2c_io_exp_init" + echo " : ${0} i2c_gpio_init" + echo " : ${0} i2c_gpio_deinit" + echo " : ${0} i2c_led_test" + echo " : ${0} i2c_psu_eeprom_get" + echo " : ${0} i2c_mb_eeprom_get" + echo " : ${0} i2c_qsfp_eeprom_get [1-32]" + echo " : ${0} i2c_qsfp_eeprom_init new|delete" + echo " : ${0} i2c_mb_eeprom_init new|delete" + echo " : ${0} i2c_qsfp_status_get [1-32]" + echo " : ${0} i2c_qsfp_type_get [1-32]" + echo " : ${0} i2c_board_type_get" + echo " : ${0} i2c_psu_status" + echo " : ${0} i2c_led_psu_status_set" + echo " : ${0} i2c_led_fan_status_set" + echo " : ${0} i2c_led_fan_tray_status_set" + echo " : ${0} i2c_cpld_version" + echo " : ${0} i2c_front_temp" + echo " : ${0} i2c_rear_temp" + echo " : ${0} i2c_test_all" + echo " : ${0} i2c_sys_led green|amber on|off" + echo " : ${0} i2c_fan_led green|amber on|off" + echo " : ${0} i2c_psu1_led green|amber on|off" + echo " : ${0} i2c_psu2_led green|amber on|off" + echo " : ${0} i2c_fan_tray_led green|amber on|off [1-4]" + echo "----------------------------------------------------" +} + +#Pause function +function _pause { + read -p "$*" +} + +#Retry command function +function _retry { + local i + for i in {1..5}; + do + eval "${*}" && break || echo "retry"; sleep 1; + done +} + +#I2C Init +function _i2c_init { + echo "=========================================================" + echo "# Description: I2C Init" + echo "=========================================================" + + rmmod i2c_ismt + rmmod i2c_i801 + modprobe i2c_i801 + modprobe i2c_ismt + modprobe i2c_dev + modprobe i2c_mux_pca954x force_deselect_on_exit=1 + + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x70' > ${PATH_ISMT_DEVICE}/new_device" + else + echo "pca9548 0x70 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX3_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x71' > ${PATH_MUX_CHAN0_DEVICE}/new_device" + else + echo "pca9548 0x71 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX4_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x72' > ${PATH_MUX_CHAN1_DEVICE}/new_device" + else + echo "pca9548 0x72 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX5_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x73' > ${PATH_MUX_CHAN2_DEVICE}/new_device" + else + echo "pca9548 0x73 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX6_CHAN0_DEVICE}" ]; then + _retry "echo 'pca9548 0x74' > ${PATH_MUX_CHAN3_DEVICE}/new_device" + else + echo "pca9548 0x74 already init." + fi + if [ ! -e "${PATH_SYS_I2C_DEVICES}/${NUM_MUX1_CHAN6_DEVICE}-0075" ]; then + _retry "echo 'pca9546 0x75' > ${PATH_MUX_CHAN6_DEVICE}/new_device" + else + echo "pca9548 0x75 already init." + fi + #Init CPLD LED_CLR Register (Front Port LED) + i2cset -y ${NUM_I801_DEVICE} 0x33 0x34 0x10 + + rmmod coretemp + rmmod jc42 + rmmod w83795 + _i2c_temp_init + _i2c_volmon_init + modprobe coretemp + modprobe w83795 + modprobe jc42 + modprobe eeprom + modprobe eeprom_mb + modprobe gpio-pca953x + _i2c_fan_init + _i2c_io_exp_init + rmmod gpio_ich + _i2c_gpio_init + modprobe gpio_ich + _i2c_cpld_init + _i2c_qsfp_eeprom_init "new" + _i2c_mb_eeprom_init "new" + _i2c_psu_eeprom_init + _i2c_led_psu_status_set + _i2c_led_fan_status_set + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_sys_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_sys_led + _config_rmem +} + +#I2C Deinit +function _i2c_deinit { + _i2c_gpio_deinit + for mod in i2c_cpld coretemp jc42 w83795 eeprom_mb gpio-pca953x i2c_mux_pca954x i2c_ismt i2c_i801; + do + [ "$(lsmod | grep "^$mod ")" != "" ] && rmmod $mod + done +} + +#Temperature sensor Init +function _i2c_temp_init { + echo -n "TEMP INIT..." + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x00 0x80 + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x05 0x7F + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x04 0x0A + echo "Done" +} + +#FAN Init +function _i2c_fan_init { + echo -n "FAN INIT..." + if [ -e "${PATH_HWMON_W83795_DEVICE}" ]; then + echo 120 > ${PATH_HWMON_W83795_DEVICE}/device/pwm1 + echo 120 > ${PATH_HWMON_W83795_DEVICE}/device/pwm2 + echo "SUCCESS" + else + echo "FAIL" + fi + +} + +#VOLMON Init +function _i2c_volmon_init { + echo -n "VOLMON INIT..." + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x00 0x80 + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x02 0xFF + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x03 0x50 + i2cset -y -r ${NUM_I801_DEVICE} 0x2F 0x04 0x0A + echo "Done" +} + +#IO Expander Init +function _i2c_io_exp_init { + echo "=========================================================" + echo "# Description: I2C IO Expender Init" + echo "=========================================================" + #SMBUS0 IO_EXPENDER + i2cset -y -r ${NUM_I801_DEVICE} 0x27 4 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x27 5 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x27 2 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x27 3 0x00 + i2cset -y -r ${NUM_I801_DEVICE} 0x27 6 0xFF + i2cset -y -r ${NUM_I801_DEVICE} 0x27 7 0xFF + + #SMBUS1 + #ABS + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x20 6 0xFF + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x20 7 0xFF + + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x21 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x21 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x21 6 0xFF + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x21 7 0xFF + + #Transcevior INT + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 6 0xFF + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x22 7 0xFF + + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x23 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x23 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x23 6 0xFF + i2cset -y -r ${NUM_MUX1_CHAN4_DEVICE} 0x23 7 0xFF + + echo "Init ZQSFP IO Expender" + echo "set ZQSFP LP_MODE = 0" + #set ZQSFP LP_MODE = 0 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 2 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 3 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 6 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x20 7 0x00 + + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x21 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x21 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x21 2 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x21 3 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x21 6 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x21 7 0x00 + + echo "set ZQSFP RST = 1" + #set ZQSFP RST = 1 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x22 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x22 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x22 2 0xFF + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x22 3 0xFF + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x22 6 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x22 7 0x00 + + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x23 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x23 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x23 2 0xFF + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x23 3 0xFF + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x23 6 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x23 7 0x00 + + echo "set ZQSFP mode" + #ZQSFP mode + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x24 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x24 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x24 2 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x24 3 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x24 6 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x24 7 0x00 + + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x25 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x25 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x25 2 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x25 3 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x25 6 0x00 + i2cset -y -r ${NUM_MUX1_CHAN5_DEVICE} 0x25 7 0x00 + + #ZQSFP/SFP+/E-Card General + i2cset -y -r ${NUM_MUX1_CHAN6_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN6_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN6_DEVICE} 0x20 6 0xFF + i2cset -y -r ${NUM_MUX1_CHAN6_DEVICE} 0x20 7 0xFF + + #LED board after PVT (S9100_IO_EXP_LED_ID) + echo "Init LED IO Expender" + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 6 0x00 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 7 0x00 + + #PSU I/O (S9100_IO_EXP_PSU_ID) + echo "Init PSU IO Expender" + i2cset -y -r ${NUM_MUX1_CHAN6_DEVICE} 0x23 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN6_DEVICE} 0x23 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN6_DEVICE} 0x23 2 0x00 + i2cset -y -r ${NUM_MUX1_CHAN6_DEVICE} 0x23 3 0x00 + i2cset -y -r ${NUM_MUX1_CHAN6_DEVICE} 0x23 6 0xBB + i2cset -y -r ${NUM_MUX1_CHAN6_DEVICE} 0x23 7 0xFF + + #FAN I/O (S9100_IO_EXP_FAN_ID) + echo "Init FAN IO Expender" + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x20 4 0x00 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x20 5 0x00 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x20 2 0x00 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x20 3 0x00 + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x20 6 0xCC + i2cset -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x20 7 0xCC +} + +# To set the global variable GPIO_OFFSET +function _set_gpio_offset { + GPIO_OFFSET=0 + for d in `ls /sys/class/gpio/ | grep gpiochip` + do + gpiochip_no=${d##gpiochip} + if [ $gpiochip_no -gt 255 ]; then + GPIO_OFFSET=256 + break + fi + done + #echo "set GPIO_OFFSET=${GPIO_OFFSET}" +} + +#GPIO Init +function _i2c_gpio_init { + #ABS Port 0-15 (zQSFP00 ~ zQSFP15) + echo "pca9535 0x20" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/new_device + _set_gpio_offset + for((i=${GPIO_OFFSET}+240;i<=${GPIO_OFFSET}+255;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + done + + #echo 240 > /sys/class/gpio/export + #echo 241 > /sys/class/gpio/export + #echo 242 > /sys/class/gpio/export + #echo 243 > /sys/class/gpio/export + #echo 244 > /sys/class/gpio/export + #echo 245 > /sys/class/gpio/export + #echo 246 > /sys/class/gpio/export + #echo 247 > /sys/class/gpio/export + #echo 248 > /sys/class/gpio/export + #echo 249 > /sys/class/gpio/export + #echo 250 > /sys/class/gpio/export + #echo 251 > /sys/class/gpio/export + #echo 252 > /sys/class/gpio/export + #echo 253 > /sys/class/gpio/export + #echo 254 > /sys/class/gpio/export + #echo 255 > /sys/class/gpio/export + #echo 1 > /sys/class/gpio/gpio241/active_low #zQSFP00 + #echo 1 > /sys/class/gpio/gpio240/active_low #zQSFP01 + #echo 1 > /sys/class/gpio/gpio243/active_low #zQSFP02 + #echo 1 > /sys/class/gpio/gpio242/active_low #zQSFP03 + #echo 1 > /sys/class/gpio/gpio245/active_low #zQSFP04 + #echo 1 > /sys/class/gpio/gpio244/active_low #zQSFP05 + #echo 1 > /sys/class/gpio/gpio247/active_low #zQSFP06 + #echo 1 > /sys/class/gpio/gpio246/active_low #zQSFP07 + #echo 1 > /sys/class/gpio/gpio249/active_low #zQSFP08 + #echo 1 > /sys/class/gpio/gpio248/active_low #zQSFP09 + #echo 1 > /sys/class/gpio/gpio251/active_low #zQSFP10 + #echo 1 > /sys/class/gpio/gpio250/active_low #zQSFP11 + #echo 1 > /sys/class/gpio/gpio253/active_low #zQSFP12 + #echo 1 > /sys/class/gpio/gpio252/active_low #zQSFP13 + #echo 1 > /sys/class/gpio/gpio255/active_low #zQSFP14 + #echo 1 > /sys/class/gpio/gpio254/active_low #zQSFP15 + + #ABS Port 16-31 (zQSFP16 ~ zQSFP31) + echo "pca9535 0x21" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/new_device + for((i=${GPIO_OFFSET}+224;i<=${GPIO_OFFSET}+239;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + done + + #echo 224 > /sys/class/gpio/export + #echo 225 > /sys/class/gpio/export + #echo 226 > /sys/class/gpio/export + #echo 227 > /sys/class/gpio/export + #echo 228 > /sys/class/gpio/export + #echo 229 > /sys/class/gpio/export + #echo 230 > /sys/class/gpio/export + #echo 231 > /sys/class/gpio/export + #echo 232 > /sys/class/gpio/export + #echo 233 > /sys/class/gpio/export + #echo 234 > /sys/class/gpio/export + #echo 235 > /sys/class/gpio/export + #echo 236 > /sys/class/gpio/export + #echo 237 > /sys/class/gpio/export + #echo 238 > /sys/class/gpio/export + #echo 239 > /sys/class/gpio/export + #echo 1 > /sys/class/gpio/gpio225/active_low #zQSFP16 + #echo 1 > /sys/class/gpio/gpio224/active_low #zQSFP17 + #echo 1 > /sys/class/gpio/gpio227/active_low #zQSFP18 + #echo 1 > /sys/class/gpio/gpio226/active_low #zQSFP19 + #echo 1 > /sys/class/gpio/gpio229/active_low #zQSFP20 + #echo 1 > /sys/class/gpio/gpio228/active_low #zQSFP21 + #echo 1 > /sys/class/gpio/gpio231/active_low #zQSFP22 + #echo 1 > /sys/class/gpio/gpio230/active_low #zQSFP23 + #echo 1 > /sys/class/gpio/gpio233/active_low #zQSFP24 + #echo 1 > /sys/class/gpio/gpio232/active_low #zQSFP25 + #echo 1 > /sys/class/gpio/gpio235/active_low #zQSFP26 + #echo 1 > /sys/class/gpio/gpio234/active_low #zQSFP27 + #echo 1 > /sys/class/gpio/gpio237/active_low #zQSFP28 + #echo 1 > /sys/class/gpio/gpio236/active_low #zQSFP29 + #echo 1 > /sys/class/gpio/gpio239/active_low #zQSFP30 + #echo 1 > /sys/class/gpio/gpio238/active_low #zQSFP31 + + #INT Port 0-15 (zQSFP00 ~ zQSFP15) + echo "pca9535 0x22" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/new_device + for((i=${GPIO_OFFSET}+208;i<=${GPIO_OFFSET}+223;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + done + + #echo 208 > /sys/class/gpio/export + #echo 209 > /sys/class/gpio/export + #echo 210 > /sys/class/gpio/export + #echo 211 > /sys/class/gpio/export + #echo 212 > /sys/class/gpio/export + #echo 213 > /sys/class/gpio/export + #echo 214 > /sys/class/gpio/export + #echo 215 > /sys/class/gpio/export + #echo 216 > /sys/class/gpio/export + #echo 217 > /sys/class/gpio/export + #echo 218 > /sys/class/gpio/export + #echo 219 > /sys/class/gpio/export + #echo 220 > /sys/class/gpio/export + #echo 221 > /sys/class/gpio/export + #echo 222 > /sys/class/gpio/export + #echo 223 > /sys/class/gpio/export + #echo 1 > /sys/class/gpio/gpio208/active_low + #echo 1 > /sys/class/gpio/gpio209/active_low + #echo 1 > /sys/class/gpio/gpio210/active_low + #echo 1 > /sys/class/gpio/gpio211/active_low + #echo 1 > /sys/class/gpio/gpio212/active_low + #echo 1 > /sys/class/gpio/gpio213/active_low + #echo 1 > /sys/class/gpio/gpio214/active_low + #echo 1 > /sys/class/gpio/gpio215/active_low + #echo 1 > /sys/class/gpio/gpio216/active_low + #echo 1 > /sys/class/gpio/gpio217/active_low + #echo 1 > /sys/class/gpio/gpio218/active_low + #echo 1 > /sys/class/gpio/gpio219/active_low + #echo 1 > /sys/class/gpio/gpio220/active_low + #echo 1 > /sys/class/gpio/gpio221/active_low + #echo 1 > /sys/class/gpio/gpio222/active_low + #echo 1 > /sys/class/gpio/gpio223/active_low + + #INT Port 16-31 (zQSFP16 ~ zQSFP31) + echo "pca9535 0x23" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/new_device + for((i=${GPIO_OFFSET}+192;i<=${GPIO_OFFSET}+207;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + done + + #echo 192 > /sys/class/gpio/export + #echo 193 > /sys/class/gpio/export + #echo 194 > /sys/class/gpio/export + #echo 195 > /sys/class/gpio/export + #echo 196 > /sys/class/gpio/export + #echo 197 > /sys/class/gpio/export + #echo 198 > /sys/class/gpio/export + #echo 199 > /sys/class/gpio/export + #echo 200 > /sys/class/gpio/export + #echo 201 > /sys/class/gpio/export + #echo 202 > /sys/class/gpio/export + #echo 203 > /sys/class/gpio/export + #echo 204 > /sys/class/gpio/export + #echo 205 > /sys/class/gpio/export + #echo 206 > /sys/class/gpio/export + #echo 207 > /sys/class/gpio/export + #echo 1 > /sys/class/gpio/gpio192/active_low + #echo 1 > /sys/class/gpio/gpio193/active_low + #echo 1 > /sys/class/gpio/gpio194/active_low + #echo 1 > /sys/class/gpio/gpio195/active_low + #echo 1 > /sys/class/gpio/gpio196/active_low + #echo 1 > /sys/class/gpio/gpio197/active_low + #echo 1 > /sys/class/gpio/gpio198/active_low + #echo 1 > /sys/class/gpio/gpio199/active_low + #echo 1 > /sys/class/gpio/gpio200/active_low + #echo 1 > /sys/class/gpio/gpio201/active_low + #echo 1 > /sys/class/gpio/gpio202/active_low + #echo 1 > /sys/class/gpio/gpio203/active_low + #echo 1 > /sys/class/gpio/gpio204/active_low + #echo 1 > /sys/class/gpio/gpio205/active_low + #echo 1 > /sys/class/gpio/gpio206/active_low + #echo 1 > /sys/class/gpio/gpio207/active_low + + #LP Mode Port 0-15 + echo "pca9535 0x20" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/new_device + for((i=${GPIO_OFFSET}+176;i<=${GPIO_OFFSET}+191;i++)); + do + echo $i > /sys/class/gpio/export + echo out > /sys/class/gpio/gpio${i}/direction + done + + #echo 176 > /sys/class/gpio/export + #echo 177 > /sys/class/gpio/export + #echo 178 > /sys/class/gpio/export + #echo 179 > /sys/class/gpio/export + #echo 180 > /sys/class/gpio/export + #echo 181 > /sys/class/gpio/export + #echo 182 > /sys/class/gpio/export + #echo 183 > /sys/class/gpio/export + #echo 184 > /sys/class/gpio/export + #echo 185 > /sys/class/gpio/export + #echo 186 > /sys/class/gpio/export + #echo 187 > /sys/class/gpio/export + #echo 188 > /sys/class/gpio/export + #echo 189 > /sys/class/gpio/export + #echo 190 > /sys/class/gpio/export + #echo 191 > /sys/class/gpio/export + #echo out > /sys/class/gpio/gpio176/direction + #echo out > /sys/class/gpio/gpio177/direction + #echo out > /sys/class/gpio/gpio178/direction + #echo out > /sys/class/gpio/gpio179/direction + #echo out > /sys/class/gpio/gpio180/direction + #echo out > /sys/class/gpio/gpio181/direction + #echo out > /sys/class/gpio/gpio182/direction + #echo out > /sys/class/gpio/gpio183/direction + #echo out > /sys/class/gpio/gpio184/direction + #echo out > /sys/class/gpio/gpio185/direction + #echo out > /sys/class/gpio/gpio186/direction + #echo out > /sys/class/gpio/gpio187/direction + #echo out > /sys/class/gpio/gpio188/direction + #echo out > /sys/class/gpio/gpio189/direction + #echo out > /sys/class/gpio/gpio190/direction + #echo out > /sys/class/gpio/gpio191/direction + + #LP Mode Port 16-31 + echo "pca9535 0x21" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/new_device + for((i=${GPIO_OFFSET}+160;i<=${GPIO_OFFSET}+175;i++)); + do + echo $i > /sys/class/gpio/export + echo out > /sys/class/gpio/gpio${i}/direction + done + + #echo 160 > /sys/class/gpio/export + #echo 161 > /sys/class/gpio/export + #echo 162 > /sys/class/gpio/export + #echo 163 > /sys/class/gpio/export + #echo 164 > /sys/class/gpio/export + #echo 165 > /sys/class/gpio/export + #echo 166 > /sys/class/gpio/export + #echo 167 > /sys/class/gpio/export + #echo 168 > /sys/class/gpio/export + #echo 169 > /sys/class/gpio/export + #echo 170 > /sys/class/gpio/export + #echo 171 > /sys/class/gpio/export + #echo 172 > /sys/class/gpio/export + #echo 173 > /sys/class/gpio/export + #echo 174 > /sys/class/gpio/export + #echo 175 > /sys/class/gpio/export + #echo out > /sys/class/gpio/gpio160/direction + #echo out > /sys/class/gpio/gpio161/direction + #echo out > /sys/class/gpio/gpio162/direction + #echo out > /sys/class/gpio/gpio163/direction + #echo out > /sys/class/gpio/gpio164/direction + #echo out > /sys/class/gpio/gpio165/direction + #echo out > /sys/class/gpio/gpio166/direction + #echo out > /sys/class/gpio/gpio167/direction + #echo out > /sys/class/gpio/gpio168/direction + #echo out > /sys/class/gpio/gpio169/direction + #echo out > /sys/class/gpio/gpio170/direction + #echo out > /sys/class/gpio/gpio171/direction + #echo out > /sys/class/gpio/gpio172/direction + #echo out > /sys/class/gpio/gpio173/direction + #echo out > /sys/class/gpio/gpio174/direction + #echo out > /sys/class/gpio/gpio175/direction + + #RST Port 0-15 + echo "pca9535 0x22" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/new_device + for((i=${GPIO_OFFSET}+144;i<=${GPIO_OFFSET}+159;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + echo low > /sys/class/gpio/gpio${i}/direction + #echo out > /sys/class/gpio/gpio${i}/direction + #echo 0 > /sys/class/gpio/gpio${i}/value + done + + #echo 144 > /sys/class/gpio/export + #echo 145 > /sys/class/gpio/export + #echo 146 > /sys/class/gpio/export + #echo 147 > /sys/class/gpio/export + #echo 148 > /sys/class/gpio/export + #echo 149 > /sys/class/gpio/export + #echo 150 > /sys/class/gpio/export + #echo 151 > /sys/class/gpio/export + #echo 152 > /sys/class/gpio/export + #echo 153 > /sys/class/gpio/export + #echo 154 > /sys/class/gpio/export + #echo 155 > /sys/class/gpio/export + #echo 156 > /sys/class/gpio/export + #echo 157 > /sys/class/gpio/export + #echo 158 > /sys/class/gpio/export + #echo 159 > /sys/class/gpio/export + #echo out > /sys/class/gpio/gpio144/direction + #echo out > /sys/class/gpio/gpio145/direction + #echo out > /sys/class/gpio/gpio146/direction + #echo out > /sys/class/gpio/gpio147/direction + #echo out > /sys/class/gpio/gpio148/direction + #echo out > /sys/class/gpio/gpio149/direction + #echo out > /sys/class/gpio/gpio150/direction + #echo out > /sys/class/gpio/gpio151/direction + #echo out > /sys/class/gpio/gpio152/direction + #echo out > /sys/class/gpio/gpio153/direction + #echo out > /sys/class/gpio/gpio154/direction + #echo out > /sys/class/gpio/gpio155/direction + #echo out > /sys/class/gpio/gpio156/direction + #echo out > /sys/class/gpio/gpio157/direction + #echo out > /sys/class/gpio/gpio158/direction + #echo out > /sys/class/gpio/gpio159/direction + #echo 1 > /sys/class/gpio/gpio144/active_low + #echo 1 > /sys/class/gpio/gpio145/active_low + #echo 1 > /sys/class/gpio/gpio146/active_low + #echo 1 > /sys/class/gpio/gpio147/active_low + #echo 1 > /sys/class/gpio/gpio148/active_low + #echo 1 > /sys/class/gpio/gpio149/active_low + #echo 1 > /sys/class/gpio/gpio150/active_low + #echo 1 > /sys/class/gpio/gpio151/active_low + #echo 1 > /sys/class/gpio/gpio152/active_low + #echo 1 > /sys/class/gpio/gpio153/active_low + #echo 1 > /sys/class/gpio/gpio154/active_low + #echo 1 > /sys/class/gpio/gpio155/active_low + #echo 1 > /sys/class/gpio/gpio156/active_low + #echo 1 > /sys/class/gpio/gpio157/active_low + #echo 1 > /sys/class/gpio/gpio158/active_low + #echo 1 > /sys/class/gpio/gpio159/active_low + #echo 0 > /sys/class/gpio/gpio144/value + #echo 0 > /sys/class/gpio/gpio145/value + #echo 0 > /sys/class/gpio/gpio146/value + #echo 0 > /sys/class/gpio/gpio147/value + #echo 0 > /sys/class/gpio/gpio148/value + #echo 0 > /sys/class/gpio/gpio149/value + #echo 0 > /sys/class/gpio/gpio150/value + #echo 0 > /sys/class/gpio/gpio151/value + #echo 0 > /sys/class/gpio/gpio152/value + #echo 0 > /sys/class/gpio/gpio153/value + #echo 0 > /sys/class/gpio/gpio154/value + #echo 0 > /sys/class/gpio/gpio155/value + #echo 0 > /sys/class/gpio/gpio156/value + #echo 0 > /sys/class/gpio/gpio157/value + #echo 0 > /sys/class/gpio/gpio158/value + #echo 0 > /sys/class/gpio/gpio159/value + + #RST Port 16-31 + echo "pca9535 0x23" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/new_device + for((i=${GPIO_OFFSET}+128;i<=${GPIO_OFFSET}+143;i++)); + do + echo $i > /sys/class/gpio/export + echo 1 > /sys/class/gpio/gpio${i}/active_low + echo low > /sys/class/gpio/gpio${i}/direction + #echo out > /sys/class/gpio/gpio${i}/direction + #echo 0 > /sys/class/gpio/gpio${i}/value + done + + #echo 128 > /sys/class/gpio/export + #echo 129 > /sys/class/gpio/export + #echo 130 > /sys/class/gpio/export + #echo 131 > /sys/class/gpio/export + #echo 132 > /sys/class/gpio/export + #echo 133 > /sys/class/gpio/export + #echo 134 > /sys/class/gpio/export + #echo 135 > /sys/class/gpio/export + #echo 136 > /sys/class/gpio/export + #echo 137 > /sys/class/gpio/export + #echo 138 > /sys/class/gpio/export + #echo 139 > /sys/class/gpio/export + #echo 140 > /sys/class/gpio/export + #echo 141 > /sys/class/gpio/export + #echo 142 > /sys/class/gpio/export + #echo 143 > /sys/class/gpio/export + #echo out > /sys/class/gpio/gpio128/direction + #echo out > /sys/class/gpio/gpio129/direction + #echo out > /sys/class/gpio/gpio130/direction + #echo out > /sys/class/gpio/gpio131/direction + #echo out > /sys/class/gpio/gpio132/direction + #echo out > /sys/class/gpio/gpio133/direction + #echo out > /sys/class/gpio/gpio134/direction + #echo out > /sys/class/gpio/gpio135/direction + #echo out > /sys/class/gpio/gpio136/direction + #echo out > /sys/class/gpio/gpio137/direction + #echo out > /sys/class/gpio/gpio138/direction + #echo out > /sys/class/gpio/gpio139/direction + #echo out > /sys/class/gpio/gpio140/direction + #echo out > /sys/class/gpio/gpio141/direction + #echo out > /sys/class/gpio/gpio142/direction + #echo out > /sys/class/gpio/gpio143/direction + #echo 1 > /sys/class/gpio/gpio128/active_low + #echo 1 > /sys/class/gpio/gpio129/active_low + #echo 1 > /sys/class/gpio/gpio130/active_low + #echo 1 > /sys/class/gpio/gpio131/active_low + #echo 1 > /sys/class/gpio/gpio132/active_low + #echo 1 > /sys/class/gpio/gpio133/active_low + #echo 1 > /sys/class/gpio/gpio134/active_low + #echo 1 > /sys/class/gpio/gpio135/active_low + #echo 1 > /sys/class/gpio/gpio136/active_low + #echo 1 > /sys/class/gpio/gpio137/active_low + #echo 1 > /sys/class/gpio/gpio138/active_low + #echo 1 > /sys/class/gpio/gpio139/active_low + #echo 1 > /sys/class/gpio/gpio140/active_low + #echo 1 > /sys/class/gpio/gpio141/active_low + #echo 1 > /sys/class/gpio/gpio142/active_low + #echo 1 > /sys/class/gpio/gpio143/active_low + #echo 0 > /sys/class/gpio/gpio128/value + #echo 0 > /sys/class/gpio/gpio129/value + #echo 0 > /sys/class/gpio/gpio130/value + #echo 0 > /sys/class/gpio/gpio131/value + #echo 0 > /sys/class/gpio/gpio132/value + #echo 0 > /sys/class/gpio/gpio133/value + #echo 0 > /sys/class/gpio/gpio134/value + #echo 0 > /sys/class/gpio/gpio135/value + #echo 0 > /sys/class/gpio/gpio136/value + #echo 0 > /sys/class/gpio/gpio137/value + #echo 0 > /sys/class/gpio/gpio138/value + #echo 0 > /sys/class/gpio/gpio139/value + #echo 0 > /sys/class/gpio/gpio140/value + #echo 0 > /sys/class/gpio/gpio141/value + #echo 0 > /sys/class/gpio/gpio142/value + #echo 0 > /sys/class/gpio/gpio143/value + +} + +#GPIO DeInit +function _i2c_gpio_deinit { + echo "0x20" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/delete_device + echo "0x21" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/delete_device + echo "0x22" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/delete_device + echo "0x23" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN4_DEVICE}/delete_device + echo "0x20" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/delete_device + echo "0x21" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/delete_device + echo "0x22" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/delete_device + echo "0x23" > /sys/bus/i2c/devices/i2c-${NUM_MUX1_CHAN5_DEVICE}/delete_device +} + +#I2C CPLD init +function _i2c_cpld_init { + echo "=========================================================" + echo "# Description: I2C CPLD Init..." + echo "=========================================================" + + ## modprobe i2c_cpld + modprobe i2c_cpld + ## Add CPLD device + echo "i2c_cpld 0x33" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_I801_DEVICE}/new_device + + echo "done..." +} + +#Set FAN Tray LED +function _i2c_led_fan_tray_status_set { + echo "FAN Tray Status Setup" + #FAN Status get + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN2_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan2_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN4_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan4_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN6_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan6_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + FAN8_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan8_alarm` + + if [ "${FAN1_ALARM}" == "0" ] && [ "${FAN2_ALARM}" == "0" ]; then + FAN_TRAY=1 + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=1 + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + if [ "${FAN3_ALARM}" == "0" ] && [ "${FAN4_ALARM}" == "0" ]; then + FAN_TRAY=2 + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=2 + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + if [ "${FAN5_ALARM}" == "0" ] && [ "${FAN6_ALARM}" == "0" ]; then + FAN_TRAY=3 + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=3 + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + if [ "${FAN7_ALARM}" == "0" ] && [ "${FAN8_ALARM}" == "0" ]; then + FAN_TRAY=4 + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=4 + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi +} + +#Set FAN LED +function _i2c_led_fan_status_set { + echo "FAN Status Setup" + #PSU Status set + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN2_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan2_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN4_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan4_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN6_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan6_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + FAN8_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan8_alarm` + + if [ "${FAN1_ALARM}" == "0" ] && [ "${FAN2_ALARM}" == "0" ] \ + && [ "${FAN3_ALARM}" == "0" ] && [ "${FAN4_ALARM}" == "0" ] \ + && [ "${FAN5_ALARM}" == "0" ] && [ "${FAN6_ALARM}" == "0" ] \ + && [ "${FAN7_ALARM}" == "0" ] && [ "${FAN8_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + fi +} + +#Set Power Supply LED +function _i2c_led_psu_status_set { + echo "PSU LED Status Setup" + + #PSU Status set + _i2c_psu_status + + #PSU1 Status + if [ "${psu1Exist}" == ${PSU_EXIST} ]; then + if [ "${psu1PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + fi + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + fi + + #PSU2 Status + if [ "${psu2Exist}" == ${PSU_EXIST} ]; then + if [ "${psu2PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + fi + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + fi +} + +#LED Test +function _i2c_led_test { + echo "=========================================================" + echo "# Description: I2C LED TEST..." + echo "=========================================================" + #sys led (green) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x7F + _pause 'Check SYS LED green light and Press [Enter] key to continue...' + #sys led (amber) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xBF + _pause 'Check SYS LED amber light and Press [Enter] key to continue...' + + #FAN led (green) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xF7 + _pause 'Check FAN LED green light and Press [Enter] key to continue...' + #FAN led (amber) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFB + _pause 'Check FAN LED amber light and Press [Enter] key to continue...' + + #PSU2 led (green) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xDF + _pause 'Check PSU2 LED green light and Press [Enter] key to continue...' + #PSU2 led (amber) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xEF + _pause 'Check PSU2 LED amber light and Press [Enter] key to continue...' + + #PSU1 led (green) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFD + _pause 'Check PSU1 LED green light and Press [Enter] key to continue...' + #PSU1 led (amber) + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFE + _pause 'Check PSU1 LED amber light and Press [Enter] key to continue...' + + #Turn OFF All LED + i2cset -y ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + _pause 'Check turn off all LEDs and Press [Enter] key to continue...' + echo "done..." +} + +#Set QSFP Port variable +function _qsfp_port_i2c_var_set { + local port=$1 + case ${port} in + 1|2|3|4|5|6|7|8) + i2cbus=${NUM_MUX1_CHAN4_DEVICE} + regAddr=0x20 + dataAddr=0 + eeprombusbase=${NUM_MUX3_CHAN0_DEVICE} + gpioBase=$((${GPIO_OFFSET}+240)) + #gpioBase=240 + ;; + 9|10|11|12|13|14|15|16) + i2cbus=${NUM_MUX1_CHAN4_DEVICE} + regAddr=0x20 + dataAddr=1 + eeprombusbase=${NUM_MUX4_CHAN0_DEVICE} + gpioBase=$((${GPIO_OFFSET}+240)) + #gpioBase=240 + ;; + 17|18|19|20|21|22|23|24) + i2cbus=${NUM_MUX1_CHAN4_DEVICE} + regAddr=0x21 + dataAddr=0 + eeprombusbase=${NUM_MUX5_CHAN0_DEVICE} + gpioBase=$((${GPIO_OFFSET}+224-16)) + #gpioBase=$((224 - 16)) + ;; + 25|26|27|28|29|30|31|32) + i2cbus=${NUM_MUX1_CHAN4_DEVICE} + regAddr=0x21 + dataAddr=1 + eeprombusbase=${NUM_MUX6_CHAN0_DEVICE} + gpioBase=$((${GPIO_OFFSET}+224-16)) + #gpioBase=$((224 - 16)) + ;; + #33) + # i2cbus=${NUM_MUX1_CHAN7_DEVICE} + # regAddr=0x22 + # dataAddr=0 + # gpioBase=${GPIO_OFFSET} + #;; + #34) + # i2cbus=${NUM_MUX1_CHAN7_DEVICE} + # regAddr=0x22 + # dataAddr=1 + # gpioBase=${GPIO_OFFSET} + #;; + *) + echo "Please input 1~32" + exit + ;; + esac +} + +#Set QSFP Port variable +function _qsfp_eeprom_var_set { + local port=$1 + eeprombusidx=$(( ${port} % 8)) + case $eeprombusidx in + 1) + eeprombus=$(( $eeprombusbase + 1 )) + eepromAddr=0x50 + ;; + 2) + eeprombus=$(( $eeprombusbase + 0 )) + eepromAddr=0x50 + ;; + 3) + eeprombus=$(( $eeprombusbase + 3 )) + eepromAddr=0x50 + ;; + 4) + eeprombus=$(( $eeprombusbase + 2 )) + eepromAddr=0x50 + ;; + 5) + eeprombus=$(( $eeprombusbase + 5 )) + eepromAddr=0x50 + ;; + 6) + eeprombus=$(( $eeprombusbase + 4 )) + eepromAddr=0x50 + ;; + 7) + eeprombus=$(( $eeprombusbase + 7 )) + eepromAddr=0x50 + ;; + 0) + eeprombus=$(( $eeprombusbase + 6 )) + eepromAddr=0x50 + ;; + esac +} + +#Get QSFP EEPROM Information +function _i2c_qsfp_eeprom_get { + + _qsfp_port_i2c_var_set ${QSFP_PORT} + + #status: 0 -> Down, 1 -> Up + status=`cat /sys/class/gpio/gpio$(( $(($gpioBase + (${QSFP_PORT} - 1) ^ 1)) ))/value` + echo $status + + if [ $status = 0 ]; then + exit + fi + + _qsfp_eeprom_var_set ${QSFP_PORT} + + cat ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/eeprom | hexdump -C +} + +#Init QSFP EEPROM +function _i2c_qsfp_eeprom_init { + echo -n "QSFP EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init 1-32 ports EEPROM + local i + for i in {1..32}; + do + _qsfp_port_i2c_var_set ${i} + + _qsfp_eeprom_var_set ${i} + + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr) ]; then + echo "sff8436 $eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eeprombus/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr) ]; then + echo "$eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eeprombus/delete_device + fi + done + echo "DONE" +} + +#Init Main Board EEPROM +function _i2c_mb_eeprom_init { + echo -n "Main Board EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init 1-32 ports EEPROM + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/${NUM_MUX1_CHAN7_DEVICE}-0054 ]; then + echo "mb_eeprom 0x54" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN7_DEVICE}/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/${NUM_MUX1_CHAN7_DEVICE}-0054 ]; then + echo "0x54" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN7_DEVICE}/delete_device + fi + echo "DONE" +} + +#PSU EEPROM init +function _i2c_psu_eeprom_init { + echo "=========================================================" + echo "# Description: I2C PSU EEPROM Init..." + echo "=========================================================" + + ## modprobe eeprom + modprobe eeprom + ## PUS(0) EEPROM + echo "eeprom 0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN6_DEVICE}/new_device + + ## PUS(1) EEPROM + echo "eeprom 0x50" > ${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX1_CHAN7_DEVICE}/new_device + + echo "done..." +} + +#get QSFP Status +function _i2c_qsfp_status_get { + + _qsfp_port_i2c_var_set ${QSFP_PORT} + + #status: 0 -> Down, 1 -> Up + status=`cat /sys/class/gpio/gpio$(( $(($gpioBase + (${QSFP_PORT} - 1) ^ 1)) ))/value` + echo "status=$status" +} + +#get QSFP Type +function _i2c_qsfp_type_get { + + _qsfp_port_i2c_var_set ${QSFP_PORT} + + _qsfp_eeprom_var_set ${QSFP_PORT} + + #Get QSFP EEPROM info + qsfp_info=$(base64 ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/eeprom) + + identifier=$(echo $qsfp_info | base64 -d -i | hexdump -s 128 -n 1 -e '"%x"') + connector=$(echo $qsfp_info | base64 -d -i | hexdump -s 130 -n 1 -e '"%x"') + transceiver=$(echo $qsfp_info | base64 -d -i | hexdump -s 131 -n 1 -e '"%x"') + + echo "identifier=$identifier" + echo "connector=$connector" + echo "transceiver=$transceiver" +} + +#Get PSU EEPROM Information +function _i2c_psu_eeprom_get { + echo "=========================================================" + echo "# Description: I2C PSU EEPROM Get..." + echo "=========================================================" + + ## modprobe eeprom + modprobe eeprom + ## PUS(0) EEPROM + cat ${PATH_SYS_I2C_DEVICES}/${NUM_MUX1_CHAN6_DEVICE}-0050/eeprom | hexdump -C + + ## PUS(1) EEPROM + cat ${PATH_SYS_I2C_DEVICES}/${NUM_MUX1_CHAN7_DEVICE}-0050/eeprom | hexdump -C + + echo "done..." +} + +#Get MotherBoard EEPROM Information +function _i2c_mb_eeprom_get { + echo "=========================================================" + echo "# Description: I2C MB EEPROM Get..." + echo "=========================================================" + + ## MB EEPROM + cat ${PATH_SYS_I2C_DEVICES}/${NUM_MUX1_CHAN7_DEVICE}-0054/eeprom | hexdump -C + echo "done..." +} + +#Set System Status LED +function _i2c_sys_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x80 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x80 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x40 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x40 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Set PSU2 LED +function _i2c_psu2_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x20 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x20 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x10 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x10 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Set FAN Tray LED +function _i2c_fan_tray_led { + case ${FAN_TRAY} in + 1) + i2cAddr=0x20 + ioPort=2 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 2) + i2cAddr=0x20 + ioPort=2 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + 3) + i2cAddr=0x20 + ioPort=3 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 4) + i2cAddr=0x20 + ioPort=3 + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + *) + echo "Please input 1~4" + exit + ;; + esac + + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m $mask -y -r ${NUM_MUX1_CHAN7_DEVICE} $i2cAddr $ioPort 0x33 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m $mask -y -r ${NUM_MUX1_CHAN7_DEVICE} $i2cAddr $ioPort 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m $mask -y -r ${NUM_MUX1_CHAN7_DEVICE} $i2cAddr $ioPort 0x33 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m $mask -y -r ${NUM_MUX1_CHAN7_DEVICE} $i2cAddr $ioPort 0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Set FAN LED +function _i2c_fan_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x08 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x08 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x04 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x04 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Set PSU1 LED +function _i2c_psu1_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x02 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x02 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + i2cset -m 0x01 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + i2cset -m 0x01 -y -r ${NUM_MUX1_CHAN7_DEVICE} 0x22 2 0xFF + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "done..." +} + +#Get Board Version and Type +function _i2c_board_type_get { + boardType=`cat ${PATH_SYS_I2C_DEVICES}/0-0033/cpld_board_type` + boardBuildRev=$((($boardType) & 0x03)) + boardHwRev=$((($boardType) >> 2 & 0x03)) + boardId=$((($boardType) >> 4)) + printf "BOARD_ID is 0x%02x, HW Rev %d, Build Rev %d\n" $boardId $boardHwRev $boardBuildRev + +} + +#Get CPLD Version +function _i2c_cpld_version { + cpldRev=`cat ${PATH_SYS_I2C_DEVICES}/0-0033/cpld_version` + cpldRelease=$((($cpldRev) >> 6 & 0x01)) + cpldVersion=$((($cpldRev) & 0x3F)) + printf "CPLD is %s version(0:RD 1:Release), Revision is 0x%02x\n" $cpldRelease $cpldVersion + +} + +#Get PSU Status +function _i2c_psu_status { + psuPresent=`cat ${PATH_SYS_I2C_DEVICES}/0-0033/cpld_pw_abs` + psu1Exist=$(($((($psuPresent) & 0x01))?0:1)) + psu2Exist=$(($((($psuPresent) & 0x02))?0:1)) + psuPwGood=`cat ${PATH_SYS_I2C_DEVICES}/0-0033/cpld_pw_good` + psu1PwGood=$(($((($psuPwGood) >> 3 & 0x01))?1:0)) + psu2PwGood=$(($((($psuPwGood) >> 3 & 0x02))?1:0)) + printf "PSU1 Exist:%d PSU1 PW Good:%d\n" $psu1Exist $psu1PwGood + printf "PSU2 Exist:%d PSU2 PW Good:%d\n" $psu2Exist $psu2PwGood +} + +#Get Front Sensor Temperature +function _i2c_front_temp { + #Front MAC + sensors | grep 'Front MAC Temp' -A 1 +} + +#Get Rear Sensor Temperature +function _i2c_rear_temp { + #Rear MAC + sensors | grep 'Rear MAC Temp' -A 1 +} + +#Increase read socket buffer for CoPP Test +function _config_rmem { + echo "109430400" > /proc/sys/net/core/rmem_max +} + +#Main Function +function _main { + tart_time_str=`date` + start_time_sec=$(date +%s) + + _set_gpio_offset + if [ "${EXEC_FUNC}" == "help" ]; then + _help + elif [ "${EXEC_FUNC}" == "i2c_init" ]; then + _i2c_init + elif [ "${EXEC_FUNC}" == "i2c_deinit" ]; then + _i2c_deinit + elif [ "${EXEC_FUNC}" == "i2c_temp_init" ]; then + _i2c_temp_init + elif [ "${EXEC_FUNC}" == "i2c_fan_init" ]; then + _i2c_fan_init + elif [ "${EXEC_FUNC}" == "i2c_volmon_init" ]; then + _i2c_volmon_init + elif [ "${EXEC_FUNC}" == "i2c_io_exp_init" ]; then + _i2c_io_exp_init + elif [ "${EXEC_FUNC}" == "i2c_gpio_init" ]; then + _i2c_gpio_init + elif [ "${EXEC_FUNC}" == "i2c_gpio_deinit" ]; then + _i2c_gpio_deinit + elif [ "${EXEC_FUNC}" == "i2c_led_test" ]; then + _i2c_led_test + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_get" ]; then + _i2c_mb_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_psu_eeprom_get" ]; then + _i2c_psu_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_get" ]; then + _i2c_qsfp_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_init" ]; then + _i2c_qsfp_eeprom_init ${QSFP_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_init" ]; then + _i2c_mb_eeprom_init ${MB_EEPROM_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_qsfp_status_get" ]; then + _i2c_qsfp_status_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_type_get" ]; then + _i2c_qsfp_type_get + elif [ "${EXEC_FUNC}" == "i2c_led_psu_status_set" ]; then + _i2c_led_psu_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_status_set" ]; then + _i2c_led_fan_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_tray_status_set" ]; then + _i2c_led_fan_tray_status_set + elif [ "${EXEC_FUNC}" == "i2c_sys_led" ]; then + _i2c_sys_led + elif [ "${EXEC_FUNC}" == "i2c_fan_led" ]; then + _i2c_fan_led + elif [ "${EXEC_FUNC}" == "i2c_fan_tray_led" ]; then + _i2c_fan_tray_led + elif [ "${EXEC_FUNC}" == "i2c_psu1_led" ]; then + _i2c_psu1_led + elif [ "${EXEC_FUNC}" == "i2c_psu2_led" ]; then + _i2c_psu2_led + elif [ "${EXEC_FUNC}" == "i2c_board_type_get" ]; then + _i2c_board_type_get + elif [ "${EXEC_FUNC}" == "i2c_cpld_version" ]; then + _i2c_cpld_version + elif [ "${EXEC_FUNC}" == "i2c_psu_status" ]; then + _i2c_psu_status + elif [ "${EXEC_FUNC}" == "i2c_front_temp" ]; then + _i2c_front_temp + elif [ "${EXEC_FUNC}" == "i2c_rear_temp" ]; then + _i2c_rear_temp + elif [ "${EXEC_FUNC}" == "i2c_test_all" ]; then + _i2c_init + _i2c_temp_init + _i2c_fan_init + _i2c_io_exp_init + _i2c_led_test + _i2c_psu_eeprom_get + _i2c_mb_eeprom_get + _i2c_board_type_get + _i2c_cpld_version + _i2c_psu_status + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + if [ "$DEBUG" == "on" ]; then + echo "-----------------------------------------------------" + end_time_str=`date` + end_time_sec=$(date +%s) + diff_time=$[ ${end_time_sec} - ${start_time_sec} ] + echo "Start Time: ${start_time_str} (${start_time_sec})" + echo "End Time : ${end_time_str} (${end_time_sec})" + echo "Total Execution Time: ${diff_time} sec" + + echo "done!!!" + fi +} + +_main diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9100/utils/qsfp_monitor.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/utils/qsfp_monitor.sh new file mode 100755 index 00000000000..249f179216a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/utils/qsfp_monitor.sh @@ -0,0 +1,104 @@ +#!/bin/bash +# Copyright (C) 2017 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=3 +I2C_UTILS="/usr/sbin/i2c_utils.sh" +QSFP_SI_SCRIPT="/usr/sbin/qsfp_si_cfg.sh" +QSFP_ARRAY=(0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + +#QSFP SI monitor +function _qsfp_si_monitor { + local i + local status + for i in {0..31}; + do + status=`${I2C_UTILS} i2c_qsfp_status_get $(expr $i + 1) | egrep '^status=.*$' | sed -e 's/status=//g'` + if [ "${status}" == "1" ]; then + _qsfp_type_check $i + fi + done +} + +#QSFP type +function _qsfp_type_check { + local port=$1 + local qsfp_type=`${I2C_UTILS} i2c_qsfp_type_get $(expr $port + 1)` + local identifier=`echo "$qsfp_type" | grep '^identifier=.*$' | sed -e 's/identifier=//g'` + if [ "${identifier}" == "11" ]; then + connector=`echo "$qsfp_type" | grep '^connector=.*$' | sed -e 's/connector=//g'` + case ${connector} in + 21|23) + #DAC + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to DAC" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} dac $port >/dev/null + fi + ;; + *) + #Optical + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to Optical" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} optical $port >/dev/null + fi + ;; + esac + fi +} + +#Docker exist check +function _docker_swss_check { + while true + do + # Check if syncd starts + result=`docker exec -i swss bash -c "echo -en \"SELECT 1\\nHLEN HIDDEN\" | redis-cli | sed -n 2p"` #TBD FIX ME + if [ "$result" == "3" ]; then + return + fi + sleep $INTERVAL + done +} + +#Docker exist check +function _qsfp_si_cfg_script_check { + + if [ -f ${QSFP_SI_SCRIPT} ] && [ -x ${QSFP_SI_SCRIPT} ]; then + echo "SI Script exists. Start monitor." + return + else + echo "SI Script not exist. Exit monitor." + exit + fi +} + +# main function +function _main { + #Check SI Script + _qsfp_si_cfg_script_check + #Check docker swss is running + _docker_swss_check + while true + do + _qsfp_si_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9100/utils/qsfp_si_cfg.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/utils/qsfp_si_cfg.sh new file mode 100755 index 00000000000..f2bf35bc771 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/utils/qsfp_si_cfg.sh @@ -0,0 +1,339 @@ +#!/bin/bash +# Copyright (C) 2017 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +VERSION="1.0.0" +TRUE=200 +FALSE=404 + +TYPE=${1} +PORT=${2} + +#QSFP Optical +function _qsfp_optical_si_set { + case ${PORT} in + 0) + bcmcmd "phy ce0 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x39;phy ce0 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x37;phy ce0 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0;phy ce0 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x39" + bcmcmd "phy ce0 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x37;phy ce0 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0;phy ce0 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x35;phy ce0 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x37" + bcmcmd "phy ce0 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0;phy ce0 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce0 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce0 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + ;; + 1) + bcmcmd "phy ce1 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x3E;phy ce1 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x32;phy ce1 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0;phy ce1 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x38" + bcmcmd "phy ce1 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x38;phy ce1 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xE AMS_TX_DRIVERMODE=0x0;phy ce1 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x33;phy ce1 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3D" + bcmcmd "phy ce1 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0;phy ce1 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x35;phy ce1 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x3B;phy ce1 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xE AMS_TX_DRIVERMODE=0x0" + ;; + 2) + bcmcmd "phy ce2 CL93N72_UT_CTL2r CL93N72_TXFIR_POST=0x35;phy ce2 CL93N72_UT_CTL3r CL93N72_TXFIR_MAIN=0x3B;phy ce2 AMS_TX_CTL2r AMS_TX_AMP_CTL=0xB AMS_TX_DRIVERMODE=0x0" + ;; + 3) + bcmcmd "phy ce3 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x3B;phy ce3 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x35;phy ce3 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0;phy ce3 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x35" + bcmcmd "phy ce3 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x37;phy ce3 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xC AMS_TX_DRIVERMODE=0x0;phy ce3 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x35;phy ce3 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x37" + bcmcmd "phy ce3 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xB AMS_TX_DRIVERMODE=0x0;phy ce3 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x35;phy ce3 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x37;phy ce3 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xB AMS_TX_DRIVERMODE=0x0" + ;; + 4) + bcmcmd "phy ce4 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x30;phy ce4 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x40;phy ce4 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0;phy ce4 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x33" + bcmcmd "phy ce4 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x3D;phy ce4 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0;phy ce4 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x30;phy ce4 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x40" + bcmcmd "phy ce4 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0;phy ce4 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce4 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce4 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0" + ;; + 5) + bcmcmd "phy ce5 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x30;phy ce5 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x40;phy ce5 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0;phy ce5 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x35" + bcmcmd "phy ce5 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x3B;phy ce5 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0;phy ce5 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x30;phy ce5 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x40" + bcmcmd "phy ce5 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0;phy ce5 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce5 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce5 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0" + ;; + 6) + bcmcmd "phy ce6 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x30;phy ce6 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x40;phy ce6 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0;phy ce6 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x36" + bcmcmd "phy ce6 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x3A;phy ce6 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xC AMS_TX_DRIVERMODE=0x0;phy ce6 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x30;phy ce6 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x40" + bcmcmd "phy ce6 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0;phy ce6 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce6 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce6 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0" + ;; + 7) + bcmcmd "phy ce7 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x30;phy ce7 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x40;phy ce7 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce7 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x30" + bcmcmd "phy ce7 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x40;phy ce7 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce7 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x30;phy ce7 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x40" + bcmcmd "phy ce7 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce7 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce7 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce7 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0" + ;; + 8) + bcmcmd "phy ce8 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x25;phy ce8 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x4B;phy ce8 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce8 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x2C" + bcmcmd "phy ce8 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x44;phy ce8 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0;phy ce8 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x25;phy ce8 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x4B" + bcmcmd "phy ce8 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce8 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x25;phy ce8 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x4B;phy ce8 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0" + ;; + 9) + bcmcmd "phy ce9 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x25;phy ce9 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x4B;phy ce9 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce9 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x2B" + bcmcmd "phy ce9 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x45;phy ce9 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0;phy ce9 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x25;phy ce9 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x4B" + bcmcmd "phy ce9 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce9 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x25;phy ce9 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x4B;phy ce9 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0" + ;; + 10) + bcmcmd "phy ce10 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x25;phy ce10 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x4B;phy ce10 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce10 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x2B" + bcmcmd "phy ce10 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x45;phy ce10 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x7 AMS_TX_DRIVERMODE=0x0;phy ce10 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x25;phy ce10 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x4B" + bcmcmd "phy ce10 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce10 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x25;phy ce10 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x4B;phy ce10 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0" + ;; + 11) + bcmcmd "phy ce11 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x25;phy ce11 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x4B;phy ce11 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce11 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x2C" + bcmcmd "phy ce11 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x44;phy ce11 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce11 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x25;phy ce11 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x4B" + bcmcmd "phy ce11 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce11 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x25;phy ce11 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x4B;phy ce11 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0" + ;; + 12) + bcmcmd "phy ce12 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x25;phy ce12 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x4B;phy ce12 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce12 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x25" + bcmcmd "phy ce12 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x4B;phy ce12 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x5 AMS_TX_DRIVERMODE=0x0;phy ce12 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x25;phy ce12 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x4B" + bcmcmd "phy ce12 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce12 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x25;phy ce12 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x4B;phy ce12 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0" + ;; + 13) + bcmcmd "phy ce13 CL93N72_UT_CTL2r CL93N72_TXFIR_POST=0x25;phy ce13 CL93N72_UT_CTL3r CL93N72_TXFIR_MAIN=0x4B;phy ce13 AMS_TX_CTL2r AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0" + ;; + 14) + bcmcmd "phy ce14 CL93N72_UT_CTL2r CL93N72_TXFIR_POST=0x25;phy ce14 CL93N72_UT_CTL3r CL93N72_TXFIR_MAIN=0x4B;phy ce14 AMS_TX_CTL2r AMS_TX_AMP_CTL=0x7 AMS_TX_DRIVERMODE=0x0" + ;; + 15) + bcmcmd "phy ce15 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x25;phy ce15 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x4B;phy ce15 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0x7 AMS_TX_DRIVERMODE=0x0;phy ce15 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x25" + bcmcmd "phy ce15 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x4B;phy ce15 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x5 AMS_TX_DRIVERMODE=0x0;phy ce15 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x25;phy ce15 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x4B" + bcmcmd "phy ce15 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x7 AMS_TX_DRIVERMODE=0x0;phy ce15 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x25;phy ce15 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x4B;phy ce15 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x7 AMS_TX_DRIVERMODE=0x0" + ;; + 16) + bcmcmd "phy ce16 CL93N72_UT_CTL2r CL93N72_TXFIR_POST=0x27;phy ce16 CL93N72_UT_CTL3r CL93N72_TXFIR_MAIN=0x49;phy ce16 AMS_TX_CTL2r AMS_TX_AMP_CTL=0x4 AMS_TX_DRIVERMODE=0x0" + ;; + 17) + bcmcmd "phy ce17 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x25;phy ce17 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x4B;phy ce17 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce17 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x30" + bcmcmd "phy ce17 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x40;phy ce17 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0;phy ce17 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x30;phy ce17 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x40" + bcmcmd "phy ce17 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0;phy ce17 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x30;phy ce17 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x40;phy ce17 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + ;; + 18) + bcmcmd "phy ce18 CL93N72_UT_CTL2r CL93N72_TXFIR_POST=0x20;phy ce18 CL93N72_UT_CTL3r CL93N72_TXFIR_MAIN=0x50;phy ce18 AMS_TX_CTL2r AMS_TX_AMP_CTL=0x2 AMS_TX_DRIVERMODE=0x0" + ;; + 19) + bcmcmd "phy ce19 CL93N72_UT_CTL2r CL93N72_TXFIR_POST=0x20;phy ce19 CL93N72_UT_CTL3r CL93N72_TXFIR_MAIN=0x50;phy ce19 AMS_TX_CTL2r AMS_TX_AMP_CTL=0x2 AMS_TX_DRIVERMODE=0x0" + ;; + 20) + bcmcmd "phy ce20 CL93N72_UT_CTL2r CL93N72_TXFIR_POST=0x20;phy ce20 CL93N72_UT_CTL3r CL93N72_TXFIR_MAIN=0x50;phy ce20 AMS_TX_CTL2r AMS_TX_AMP_CTL=0x2 AMS_TX_DRIVERMODE=0x0" + ;; + 21) + bcmcmd "phy ce21 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x17;phy ce21 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x59;phy ce21 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0x4 AMS_TX_DRIVERMODE=0x0;phy ce21 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x17" + bcmcmd "phy ce21 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x59;phy ce21 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x2 AMS_TX_DRIVERMODE=0x0;phy ce21 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x20;phy ce21 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x50" + bcmcmd "phy ce21 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x2 AMS_TX_DRIVERMODE=0x0;phy ce21 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x20;phy ce21 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x50;phy ce21 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x2 AMS_TX_DRIVERMODE=0x0" + ;; + 22) + bcmcmd "phy ce22 CL93N72_UT_CTL2r CL93N72_TXFIR_POST=0x25;phy ce22 CL93N72_UT_CTL3r CL93N72_TXFIR_MAIN=0x4B;phy ce22 AMS_TX_CTL2r AMS_TX_AMP_CTL=0x7 AMS_TX_DRIVERMODE=0x0" + ;; + 23) + bcmcmd "phy ce23 CL93N72_UT_CTL2r CL93N72_TXFIR_POST=0x25;phy ce23 CL93N72_UT_CTL3r CL93N72_TXFIR_MAIN=0x4B;phy ce23 AMS_TX_CTL2r AMS_TX_AMP_CTL=0x7 AMS_TX_DRIVERMODE=0x0" + ;; + 24) + bcmcmd "phy ce24 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x23;phy ce24 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x4D;phy ce24 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce24 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x29" + bcmcmd "phy ce24 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x47;phy ce24 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce24 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x29;phy ce24 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x47" + bcmcmd "phy ce24 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x4 AMS_TX_DRIVERMODE=0x0;phy ce24 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x29;phy ce24 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x47;phy ce24 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x4 AMS_TX_DRIVERMODE=0x0" + ;; + 25) + bcmcmd "phy ce25 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x29;phy ce25 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x47;phy ce25 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce25 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x29" + bcmcmd "phy ce25 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x47;phy ce25 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce25 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x29;phy ce25 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x47" + bcmcmd "phy ce25 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x4 AMS_TX_DRIVERMODE=0x0;phy ce25 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x29;phy ce25 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x47;phy ce25 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x4 AMS_TX_DRIVERMODE=0x0" + ;; + 26) + bcmcmd "phy ce26 CL93N72_UT_CTL2r CL93N72_TXFIR_POST=0x30;phy ce26 CL93N72_UT_CTL3r CL93N72_TXFIR_MAIN=0x40;phy ce26 AMS_TX_CTL2r AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0" + ;; + 27) + bcmcmd "phy ce27 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x30;phy ce27 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x40;phy ce27 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0;phy ce27 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x30" + bcmcmd "phy ce27 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x40;phy ce27 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0;phy ce27 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x30;phy ce27 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x40" + bcmcmd "phy ce27 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xB AMS_TX_DRIVERMODE=0x0;phy ce27 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce27 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce27 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0" + ;; + 28) + bcmcmd "phy ce28 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x30;phy ce28 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x40;phy ce28 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0;phy ce28 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x30" + bcmcmd "phy ce28 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x40;phy ce28 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0;phy ce28 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x30;phy ce28 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x40" + bcmcmd "phy ce28 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0;phy ce28 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce28 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce28 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0" + ;; + 29) + bcmcmd "phy ce29 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x30;phy ce29 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x40;phy ce29 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0;phy ce29 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x30" + bcmcmd "phy ce29 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x40;phy ce29 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0;phy ce29 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x30;phy ce29 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x40" + bcmcmd "phy ce29 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0;phy ce29 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce29 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce29 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0" + ;; + 30) + bcmcmd "phy ce30 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x30;phy ce30 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x40;phy ce30 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0;phy ce30 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x30" + bcmcmd "phy ce30 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x40;phy ce30 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0;phy ce30 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x30;phy ce30 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x40" + bcmcmd "phy ce30 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0;phy ce30 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce30 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce30 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0" + ;; + 31) + bcmcmd "phy ce31 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x39;phy ce31 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x37;phy ce31 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xC AMS_TX_DRIVERMODE=0x0;phy ce31 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x39" + bcmcmd "phy ce31 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x37;phy ce31 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xC AMS_TX_DRIVERMODE=0x0;phy ce31 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x30;phy ce31 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x40" + bcmcmd "phy ce31 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0;phy ce31 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce31 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce31 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0" + ;; + *) + echo "Unknown Port" + return + ;; + esac +} + +function _qsfp_dac_si_set { + case ${PORT} in + 0) + bcmcmd "phy ce0 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce0 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce0 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce0 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce0 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x1C;phy ce0 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x20;phy ce0 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x34;phy ce0 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce0 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce0 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce0 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce0 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce0 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x18;phy ce0 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x24;phy ce0 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x34;phy ce0 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + ;; + 1) + bcmcmd "phy ce1 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce1 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce1 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce1 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce1 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x1C;phy ce1 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x20;phy ce1 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x34;phy ce1 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce1 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce1 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce1 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce1 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce1 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x1C;phy ce1 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x20;phy ce1 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x34;phy ce1 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + ;; + 2) + bcmcmd "phy ce2 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce2 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce2 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce2 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce2 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x18;phy ce2 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x24;phy ce2 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x34;phy ce2 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xD AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce2 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce2 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce2 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce2 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce2 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x14;phy ce2 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x20;phy ce2 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x3C;phy ce2 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xD AMS_TX_DRIVERMODE=0x0" + ;; + 3) + bcmcmd "phy ce3 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce3 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce3 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce3 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce3 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x14;phy ce3 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x20;phy ce3 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x3C;phy ce3 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xD AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce3 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce3 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce3 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce3 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce3 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x18;phy ce3 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x24;phy ce3 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x34;phy ce3 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xD AMS_TX_DRIVERMODE=0x0" + ;; + 4) + bcmcmd "phy ce4 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce4 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce4 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce4 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce4 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x0;phy ce4 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x33;phy ce4 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x3D;phy ce4 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xB AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce4 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce4 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce4 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce4 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce4 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x0;phy ce4 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce4 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce4 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0" + ;; + 5) + bcmcmd "phy ce5 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce5 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce5 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce5 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce5 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x0;phy ce5 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x30;phy ce5 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x40;phy ce5 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xB AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce5 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce5 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce5 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce5 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce5 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x0;phy ce5 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce5 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce5 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0" + ;; + 6) + bcmcmd "phy ce6 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce6 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce6 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce6 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce6 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x0;phy ce6 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x36;phy ce6 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x3A;phy ce6 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xC AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce6 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce6 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce6 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce6 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce6 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x0;phy ce6 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce6 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce6 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0" + ;; + 7) + bcmcmd "phy ce7 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce7 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce7 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce7 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce7 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x0;phy ce7 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x30;phy ce7 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x40;phy ce7 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce7 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce7 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce7 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce7 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce7 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x0;phy ce7 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce7 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce7 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0" + ;; + 8) + ;; + 9) + ;; + 10) + ;; + 11) + ;; + 12) + ;; + 13) + ;; + 14) + ;; + 15) + ;; + 16) + ;; + 17) + ;; + 18) + ;; + 19) + ;; + 20) + ;; + 21) + ;; + 22) + ;; + 23) + ;; + 24) + bcmcmd "phy ce24 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce24 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce24 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce24 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce24 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x0;phy ce24 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x29;phy ce24 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x47;phy ce24 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce24 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0X1F;phy ce24 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce24 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce24 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce24 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x0;phy ce24 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x29;phy ce24 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x47;phy ce24 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x4 AMS_TX_DRIVERMODE=0x0" + ;; + 25) + bcmcmd "phy ce25 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce25 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce25 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce25 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce25 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x0;phy ce25 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x29;phy ce25 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x47;phy ce25 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x8 AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce25 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce25 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce25 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce25 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce25 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x0;phy ce25 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x29;phy ce25 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x47;phy ce25 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x4 AMS_TX_DRIVERMODE=0x0" + ;; + 26) + bcmcmd "phy ce26 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce26 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce26 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce26 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce26 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x0;phy ce26 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x30;phy ce26 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x40;phy ce26 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xA AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce26 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce26 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce26 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce26 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce26 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x0;phy ce26 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce26 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce26 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0" + ;; + 27) + bcmcmd "phy ce27 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce27 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce27 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce27 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce27 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x0;phy ce27 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x30;phy ce27 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x40;phy ce27 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce27 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce27 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce27 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce27 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce27 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x0;phy ce27 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x30;phy ce27 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x40;phy ce27 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0x9 AMS_TX_DRIVERMODE=0x0" + ;; + 28) + bcmcmd "phy ce28 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce28 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce28 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce28 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce28 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x10;phy ce28 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x18;phy ce28 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x3C;phy ce28 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xC AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce28 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce28 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce28 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce28 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce28 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x10;phy ce28 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x1C;phy ce28 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x3C;phy ce28 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xC AMS_TX_DRIVERMODE=0x0" + ;; + 29) + bcmcmd "phy ce29 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce29 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce29 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce29 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce29 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x10;phy ce29 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x20;phy ce29 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x3C;phy ce29 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xC AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce29 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce29 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce29 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce29 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce29 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x10;phy ce29 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x20;phy ce29 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x3C;phy ce29 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xC AMS_TX_DRIVERMODE=0x0" + ;; + 30) + bcmcmd "phy ce30 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce30 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce30 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce30 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce30 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x10;phy ce30 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x24;phy ce30 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x3C;phy ce30 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xC AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce30 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce30 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce30 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce30 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce30 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x8;phy ce30 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x24;phy ce30 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x3C;phy ce30 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xC AMS_TX_DRIVERMODE=0x0" + ;; + 31) + bcmcmd "phy ce31 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_PRE=0x1F;phy ce31 CL93N72_UT_CTL2r.0 CL93N72_TXFIR_POST=0x15;phy ce31 CL93N72_UT_CTL3r.0 CL93N72_TXFIR_MAIN=0x3C;phy ce31 AMS_TX_CTL2r.0 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce31 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_PRE=0x10;phy ce31 CL93N72_UT_CTL2r.1 CL93N72_TXFIR_POST=0x24;phy ce31 CL93N72_UT_CTL3r.1 CL93N72_TXFIR_MAIN=0x3C;phy ce31 AMS_TX_CTL2r.1 AMS_TX_AMP_CTL=0xC AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce31 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_PRE=0x1F;phy ce31 CL93N72_UT_CTL2r.2 CL93N72_TXFIR_POST=0x15;phy ce31 CL93N72_UT_CTL3r.2 CL93N72_TXFIR_MAIN=0x3C;phy ce31 AMS_TX_CTL2r.2 AMS_TX_AMP_CTL=0xF AMS_TX_DRIVERMODE=0x0" + bcmcmd "phy ce31 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_PRE=0x14;phy ce31 CL93N72_UT_CTL2r.3 CL93N72_TXFIR_POST=0x20;phy ce31 CL93N72_UT_CTL3r.3 CL93N72_TXFIR_MAIN=0x3C;phy ce31 AMS_TX_CTL2r.3 AMS_TX_AMP_CTL=0xE AMS_TX_DRIVERMODE=0x0" + ;; + *) + echo "Unknown Port" + return + ;; + esac +} + +# Help usage function +function _help { + echo "=========================================================" + echo "# Description: Help Function" + echo "=========================================================" + echo "----------------------------------------------------" + echo "EX : ${0} help" + echo " : ${0} optical [0-31]" + echo " : ${0} dac [0-31]" + echo "----------------------------------------------------" +} + +#Main Function +function _main { + + if [ "${TYPE}" == "help" ]; then + _help + elif [ "${TYPE}" == "optical" ]; then + _qsfp_optical_si_set + elif [ "${TYPE}" == "dac" ]; then + _qsfp_dac_si_set + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi +} + +_main diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9100/utils/s9100_monitor.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/utils/s9100_monitor.sh new file mode 100755 index 00000000000..974da6d5001 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9100/utils/s9100_monitor.sh @@ -0,0 +1,39 @@ +#!/bin/bash +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=5 +I2C_UTILS="/usr/sbin/i2c_utils.sh" + + +# LED status monitor +function _led_monitor { + ${I2C_UTILS} i2c_led_fan_status_set >/dev/null + ${I2C_UTILS} i2c_led_psu_status_set >/dev/null + ${I2C_UTILS} i2c_led_fan_tray_status_set >/dev/null +} + +# main function +function _main { + while true + do + _led_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/README.md b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/README.md new file mode 100644 index 00000000000..940d15f497c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/README.md @@ -0,0 +1,184 @@ +# Ingrasys S9200-64X Platform Driver for SONiC + +Copyright (C) 2016 Ingrasys, Inc. + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + + +## Licensing terms + +The Licensing terms of the files within this project is split 2 parts. +The Linux kernel is released under the GNU General Public License version 2. +All other code is released under the GNU General Public License version 3. +Please see the LICENSE file for copies of both licenses. + +## Contents of this package + + - service/ + > Service config files for platform initialization and monitoring + - utils/ + > Scripts useful during platform bringup and sysfs function + - conf/ + > Platform configure files. + +## Kernel modules and drivers + +The driver for interacting with Ingrasys S9200-64X is contained in the I2C +kernel module and initialization script. The initialization script loads +the modules in the correct order. It has been built and tested against +the Linux 3.16 kernel. + +The initialization script will modprobe the needed modules, navigate to the +module's device directory in sysfs, and write configuration data to +the kernel module. + +### IGB + +This is OOB Ports on front panel for management plane. + +The IGB module must be loaded first on Ingrasys S9200-64X platform. + +### I2C i801 + +The I2C i801 on Ingrasys S9200-64X can be found in +`/sys/bus/i2c/devices/i2c-0/` + +This is I2C bus for Clock Gen, DIMM channel and digital potentiometers. + +The i801 module must be loaded second on Ingrasys S9200-64X. + +### I2C iSMT + +The I2C iSMT module on S9200-64X can be found in +`/sys/bus/i2c/devices/i2c-1/` + +This is I2C bus for CPLD, HWM, power controller and I2C Switches. + +The i801 module must be loaded third on Ingrasys S9200-64X. + +### I2C PCA9548 +The PCA9548 module on S9200-64X can be found in +`/sys/bus/i2c/devices/i2c-2/` , `/sys/bus/i2c/devices/i2c-3/`, +`/sys/bus/i2c/devices/i2c-4/`, `/sys/bus/i2c/devices/i2c-5/`, +`/sys/bus/i2c/devices/i2c-6/`, `/sys/bus/i2c/devices/i2c-7/`, +`/sys/bus/i2c/devices/i2c-8/`, `/sys/bus/i2c/devices/i2c-9/`. + +The pca9548 module for zQSFP module get/set functions, PSU information, +fan status and EEPROM. + +## Hardware components + +The hardware components are initialized in the init script on S9200-64X. +The following describes manual initialization as well as interaction. +The examples below are just for Ingrasys S9200-64X platform. + +### Hardware initialization + +When the sonic-platform-ingrasys-s9200-64x package is installed on the S9200-64X, +it is automatically initialized. If you want to manual initialization, the +utility command usage as follows: +``` + i2c_utils.sh i2c_init +``` + +### EEPROM + +The EEPROM is including the board SKU, model name, vendor name, serial number, +and other information can be accessed with the specific eeprom kernel module. +After using `modprobe eeprom_mb` to detect the eeprom, it will show up in sysfs. + +The hexdump utility can be used to decode the raw output of the EEPROM. +For example, +``` + bash# echo "mb_eeprom 0x54" > /sys/bus/i2c/devices/i2c-9/new_device + bash# cat /sys/bus/i2c/drivers/mb_eeprom/9-0054/eeprom | hexdump -C +``` + +### Front panel LEDs + +LEDs can be setup on/off by using i2c utility `/usr/sbin/i2c_utils.sh`. +Utility function command usage as follows: + +``` +Status LED: + i2c_utils.sh i2c_sys_led green|amber + +Fan status LED: + i2c_utils.sh i2c_fan_led green|amber + +PSU1 status LED: + i2c_utils.sh i2c_psu1_led green|amber + +PSU2 status LED: + i2c_utils.sh i2c_psu2_led green|amber + +``` +QSFP Module Port LEDs control by ASIC library. + + +### Fan speed + +Fan speed are controlled by the w83795 kernel module. +It can be found in `/sys/class/hwmon/hwmon5/device/`. +If they were compiled as modules, you will need to modprobe w83795 for +their sysfs entries to show up. Each fan has an `fan_input` file +for reading the fan speed. And `pwm2` setting fan1/fan3/fan5/fan7. + +There is docker-platform-monitor container installed fancontrol package that can +automatic control platform fan speed. + + +### Temperature sensors + +Temperature sensors are controlled by the w83795 kernel +module. It can be found in `/sys/class/hwmon/hwmon5/device/`. +If they were compiled as modules, then you will need to modprobe w83795 for +their sysfs entries to show up. +`temp1_input` is front MAC temperature sensor. `temp2_input` is rear MAC +temperature sensor. + +There is docker-platform-monitor container installed lm-sensors package that can +monitor platform temperature. And `sensors` command can show each +temperature sensors status. + +### Power supplies + +Power supplies status and its EEPROM info can be used i2c utility +`/usr/sbin/i2c_utils.sh` to get. +The usage as follows: +``` +PSU EEPROM: + i2c_utils.sh i2c_psu_eeprom_get + hexdump -C psu0.rom + hexdump -C psu1.rom + +PSU Status: + i2c_utils.sh i2c_psu_status +``` + +### QSFPs +QSFP modules are managed by the pca9548 kernel driver. +The i2c utility `/usr/sbin/i2c_utils.sh` can be used to get status and +module EEPROM informations. +The usage as follows: +``` +QSFP EEPROM: + i2c_utils.sh i2c_qsfp_eeprom_get [1-64] + +QSFP Insert Event: + i2c_utils.sh i2c_qsfp_eeprom_get [1-64] + 0 => not insert + 1 => inserted +``` + diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/Makefile b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/Makefile new file mode 100755 index 00000000000..1a9e4e314e8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/Makefile @@ -0,0 +1,3 @@ +obj-m := eeprom_mb.o +obj-m += cpld.o +obj-m += ingrasys_s9200_64x_psu.o diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/cpld.c b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/cpld.c new file mode 100755 index 00000000000..7b16f5d3e32 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/cpld.c @@ -0,0 +1,498 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define S9200_MUX_BASE_NR 0 +#define CPLD_DEVICE_NUM 5 + +/* CPLD registers */ +#define CPLD_REG_REV 0x01 +#define CPLD_REG_ID 0x02 +#define CPLD_REG_10G_MUX 0x41 + +/* QSFP signal bit in register */ +#define BIT_RST 0 +#define BIT_LPM 2 +#define BIT_INT 0 +#define BIT_ABS 1 + +static void device_release(struct device *dev) +{ + return; +} + +/* + * S9200 CPLD register addresses + */ +static const int int_abs_reg[CPLD_DEVICE_NUM][2]= { + {0x20, 0x2B}, + {0x20, 0x2C}, + {0x20, 0x2C}, + {0x20, 0x2C}, + {0x20, 0x2C} +}; + +static const int rst_lp_reg[CPLD_DEVICE_NUM][2]= { + {0x30, 0x3B}, + {0x30, 0x3C}, + {0x30, 0x3C}, + {0x30, 0x3C}, + {0x30, 0x3C} +}; + +/* + * S9200 CPLD + */ + +enum cpld_type { + cpld_1, + cpld_2, + cpld_3, + cpld_4, + cpld_5, +}; + +enum qsfp_signal { + sig_int, + sig_abs, + sig_rst, + sig_lpm +}; + +struct cpld_platform_data { + int reg_addr; + struct i2c_client *client; +}; + +static struct cpld_platform_data s9200_cpld_platform_data[] = { + [cpld_1] = { + .reg_addr = 0x33, + }, + + [cpld_2] = { + .reg_addr = 0x33, + }, + + [cpld_3] = { + .reg_addr = 0x33, + }, + + [cpld_4] = { + .reg_addr = 0x33, + }, + + [cpld_5] = { + .reg_addr = 0x33, + }, +}; + +static struct platform_device s9200_cpld = { + .name = "ingrasys-s9200-cpld", + .id = 0, + .dev = { + .platform_data = s9200_cpld_platform_data, + .release = device_release + }, +}; + +/* + * S9200 I2C DEVICES + */ + +struct i2c_device_platform_data { + int parent; + struct i2c_board_info info; + struct i2c_client *client; +}; + +/* module_platform_driver */ +static ssize_t get_cpld_reg(struct device *dev, struct device_attribute *devattr, char *buf, int signal) +{ + int ret; + u64 data = 0; + u64 shift = 0; + int i = 0; + int j = 0; + int port = 0; + int bit = 0; + int bit_mask = 0; + int (*reg)[CPLD_DEVICE_NUM][2]; + struct cpld_platform_data *pdata = NULL; + + pdata = dev->platform_data; + + switch(signal) { + case sig_int: + bit = BIT_INT; + reg = (typeof(reg)) &int_abs_reg; + break; + case sig_abs: + bit = BIT_ABS; + reg = (typeof(reg)) &int_abs_reg; + break; + case sig_rst: + bit = BIT_RST; + reg = (typeof(reg)) &rst_lp_reg; + break; + case sig_lpm: + bit = BIT_LPM; + reg = (typeof(reg)) &rst_lp_reg; + break; + default: + return sprintf(buf, "na"); + } + bit_mask = 0x1 << bit; + + for (i=0; i> bit)) << port; + data |= shift; + port++; + } + } + + return sprintf(buf, "0x%016llx\n", data); +} + +static ssize_t set_cpld_reg(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count, int signal) +{ + unsigned long data; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + u8 current_reg_val = 0; + u8 new_reg_val = 0; + int value; + int i = 0; + int j = 0; + int port = 0; + int ret = 0; + int bit = 0; + int (*reg)[CPLD_DEVICE_NUM][2]; + + err = kstrtoul(buf, 16, &data); + if (err) + return err; + + switch(signal) { + case sig_int: + bit = BIT_INT; + reg = (typeof(reg)) &int_abs_reg; + break; + case sig_abs: + bit = BIT_ABS; + reg = (typeof(reg)) &int_abs_reg; + break; + case sig_rst: + bit = BIT_RST; + reg = (typeof(reg)) &rst_lp_reg; + break; + case sig_lpm: + bit = BIT_LPM; + reg = (typeof(reg)) &rst_lp_reg; + break; + default: + return sprintf(buf, "na"); + } + + for (i=0; i> port) & 0x1; + + //set value on bit N of new_reg_val + if (value > 0) { + new_reg_val = current_reg_val | (u8) (0x1 << bit); + } else { + new_reg_val = current_reg_val & (u8) ~(0x1 << bit); + } + //write reg value if changed + if (current_reg_val != new_reg_val) { + ret = i2c_smbus_write_byte_data(pdata[i].client, j, + (u8)(new_reg_val)); + if (ret < 0){ + return ret; + } + } + port++; + } + } + + return count; +} + +static ssize_t get_lpmode(struct device *dev, struct device_attribute *devattr, char *buf) +{ + return get_cpld_reg(dev, devattr, buf, sig_lpm); +} + +static ssize_t set_lpmode(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + return set_cpld_reg(dev, devattr, buf, count, sig_lpm); +} + +static ssize_t get_reset(struct device *dev, struct device_attribute *devattr, char *buf) +{ + return get_cpld_reg(dev, devattr, buf, sig_rst); +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + return set_cpld_reg(dev, devattr, buf, count, sig_rst); +} + +static ssize_t get_modprs(struct device *dev, struct device_attribute *devattr, char *buf) +{ + return get_cpld_reg(dev, devattr, buf, sig_abs); +} + +static ssize_t get_int(struct device *dev, struct device_attribute *devattr, char *buf) +{ + return get_cpld_reg(dev, devattr, buf, sig_int); +} + +static ssize_t get_cpld_version(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int i = 0; + int cnt = 0; + u8 reg_val_rev[CPLD_DEVICE_NUM]; + u8 reg_val_id[CPLD_DEVICE_NUM]; + + struct cpld_platform_data *pdata = dev->platform_data; + + //get reg value + for (i=0; i> 6 & 0x1, + reg_val_id[i] & 0x7); + } + + return cnt; +} + +static ssize_t set_10g_mux(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + u8 data; + u8 current_reg_val = 0; + u8 new_reg_val = 0; + int cpld_dev_num=cpld_1; + int reg_offset=CPLD_REG_10G_MUX; + int err; + struct cpld_platform_data *pdata = dev->platform_data; + int value; + int i = 0; + int port = 0; + int ret = 0; + int bit = 0; + + err = kstrtou8(buf, 16, &new_reg_val); + if (err) + return err; + + //read reg value + current_reg_val = i2c_smbus_read_byte_data(pdata[cpld_dev_num].client, reg_offset); + if (current_reg_val < 0) { + return current_reg_val; + } + + //write reg value if changed + if (current_reg_val != new_reg_val) { + ret = i2c_smbus_write_byte_data(pdata[cpld_dev_num].client, reg_offset, + (u8)(new_reg_val)); + if (ret < 0){ + return ret; + } + } + + return count; +} + +static ssize_t get_10g_mux(struct device *dev, struct device_attribute *devattr, char *buf) +{ + int cpld_dev_num=cpld_1; + int reg_offset=CPLD_REG_10G_MUX; + u8 reg_val=0; + struct cpld_platform_data *pdata = dev->platform_data; + + //read 10G mux register + reg_val = i2c_smbus_read_byte_data(pdata[cpld_dev_num].client, reg_offset); + if (reg_val < 0) { + return sprintf(buf, "na"); + } + + return sprintf(buf, "0x%x\n", reg_val); +} + +static DEVICE_ATTR(qsfp_int, S_IRUGO, get_int, NULL); +static DEVICE_ATTR(qsfp_modprs, S_IRUGO, get_modprs, NULL); +static DEVICE_ATTR(qsfp_lpmode, S_IRUGO | S_IWUSR, get_lpmode, set_lpmode); +static DEVICE_ATTR(qsfp_reset, S_IRUGO | S_IWUSR, get_reset, set_reset); +static DEVICE_ATTR(cpld_version, S_IRUGO, get_cpld_version, NULL); +static DEVICE_ATTR(cpld_10g_mux, S_IRUGO | S_IWUSR, get_10g_mux, set_10g_mux); + +static struct attribute *s9200_cpld_attrs[] = { + &dev_attr_qsfp_int.attr, + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_reset.attr, + &dev_attr_qsfp_modprs.attr, + &dev_attr_cpld_version.attr, + &dev_attr_cpld_10g_mux.attr, + NULL, +}; + +static struct attribute_group s9200_cpld_attr_grp = { + .attrs = s9200_cpld_attrs, +}; + +static int __init cpld_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent[CPLD_DEVICE_NUM]; + int i; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + for (i = 0; i < CPLD_DEVICE_NUM; i++) { + parent[i] = i2c_get_adapter(S9200_MUX_BASE_NR + i + 1); + if (!parent[i]) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", + S9200_MUX_BASE_NR + i + 1); + return -ENODEV; + } + pdata[i].client = i2c_new_dummy(parent[i], pdata[i].reg_addr); + if (!pdata[i].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[i].reg_addr); + goto error; + } + } + + ret = sysfs_create_group(&pdev->dev.kobj, &s9200_cpld_attr_grp); + if (ret) + goto error; + + return 0; + +error: + i2c_put_adapter(parent[i]); + i--; + for (; i >= 0; i--) { + if (pdata[i].client) { + i2c_unregister_device(pdata[i].client); + i2c_put_adapter(parent[i]); + } + } + + return -ENODEV; +} + +static int __exit cpld_remove(struct platform_device *pdev) +{ + int i; + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + + sysfs_remove_group(&pdev->dev.kobj, &s9200_cpld_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } else { + for (i = 0; i < CPLD_DEVICE_NUM; i++) { + if (pdata[i].client) { + parent = (pdata[i].client)->adapter; + i2c_unregister_device(pdata[i].client); + i2c_put_adapter(parent); + } + } + } + + return 0; +} + +static struct platform_driver cpld_driver = { + .probe = cpld_probe, + .remove = __exit_p(cpld_remove), + .driver = { + .owner = THIS_MODULE, + .name = "ingrasys-s9200-cpld", + }, +}; + +static int __init ingrasys_s9200_platform_init(void) +{ + int ret = 0; + + printk("ingrasysl_s9200_platform module initialization\n"); + + mdelay(10000); + + ret = platform_driver_register(&cpld_driver); + if (ret) { + printk(KERN_WARNING "Fail to register cpld driver\n"); + goto error_cpld_driver; + } + ret = platform_device_register(&s9200_cpld); + if (ret) { + printk(KERN_WARNING "Fail to create cpld device\n"); + goto error_cpld; + } + + return 0; + +error_cpld: + platform_driver_unregister(&cpld_driver); +error_cpld_driver: + return ret; +} + +static void __exit ingrasys_s9200_platform_exit(void) +{ + platform_device_unregister(&s9200_cpld); + platform_driver_unregister(&cpld_driver); +} + +module_init(ingrasys_s9200_platform_init); +module_exit(ingrasys_s9200_platform_exit); + +MODULE_DESCRIPTION("Ingrasys S9200 Platform Support"); +MODULE_AUTHOR("Jason Tsai "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/eeprom_mb.c b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/eeprom_mb.c new file mode 100755 index 00000000000..1cdb26658f5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/eeprom_mb.c @@ -0,0 +1,267 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void mb_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t mb_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + mb_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t mb_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "mb_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute mb_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = mb_eeprom_read, + .write = mb_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int mb_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int mb_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &mb_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int mb_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &mb_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id mb_eeprom_id[] = { + { "mb_eeprom", 0 }, + { } +}; + +static struct i2c_driver mb_eeprom_driver = { + .driver = { + .name = "mb_eeprom", + }, + .probe = mb_eeprom_probe, + .remove = mb_eeprom_remove, + .id_table = mb_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = mb_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(mb_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("Ingrasys Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/ingrasys_s9200_64x_platform.h b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/ingrasys_s9200_64x_platform.h new file mode 100644 index 00000000000..8a38965e793 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/ingrasys_s9200_64x_platform.h @@ -0,0 +1,148 @@ +#ifndef _S9200_64X_PLATFORM_H +#define _S9200_64X_PLATFORM_H + +#include + +// remove debug before release +#define DEBUG + +enum bus_order { + I2C_BUS_MAIN, + MUX_9548_0_CH0, + MUX_9548_0_CH1, + MUX_9548_0_CH2, + MUX_9548_0_CH3, + MUX_9548_0_CH4, + MUX_9548_0_CH5, + MUX_9548_0_CH6, + MUX_9548_0_CH7, + MUX_9548_1_CH0, + MUX_9548_1_CH1, + MUX_9548_1_CH2, + MUX_9548_1_CH3, + MUX_9548_1_CH4, + MUX_9548_1_CH5, + MUX_9548_1_CH6, + MUX_9548_1_CH7, + MUX_9546_0_CH0, + MUX_9546_0_CH1, + MUX_9546_0_CH2, + MUX_9546_0_CH3, + MUX_9546_1_CH0, + MUX_9546_1_CH1, + MUX_9546_1_CH2, + MUX_9546_1_CH3, + MUX_9548_2_CH0, + MUX_9548_2_CH1, + MUX_9548_2_CH2, + MUX_9548_2_CH3, + MUX_9548_2_CH4, + MUX_9548_2_CH5, + MUX_9548_2_CH6, + MUX_9548_2_CH7, + MUX_9548_3_CH0, + MUX_9548_3_CH1, + MUX_9548_3_CH2, + MUX_9548_3_CH3, + MUX_9548_3_CH4, + MUX_9548_3_CH5, + MUX_9548_3_CH6, + MUX_9548_3_CH7, + MUX_9548_4_CH0, + MUX_9548_4_CH1, + MUX_9548_4_CH2, + MUX_9548_4_CH3, + MUX_9548_4_CH4, + MUX_9548_4_CH5, + MUX_9548_4_CH6, + MUX_9548_4_CH7, + MUX_9548_5_CH0, + MUX_9548_5_CH1, + MUX_9548_5_CH2, + MUX_9548_5_CH3, + MUX_9548_5_CH4, + MUX_9548_5_CH5, + MUX_9548_5_CH6, + MUX_9548_5_CH7, + MUX_9548_6_CH0, + MUX_9548_6_CH1, + MUX_9548_6_CH2, + MUX_9548_6_CH3, + MUX_9548_6_CH4, + MUX_9548_6_CH5, + MUX_9548_6_CH6, + MUX_9548_6_CH7, + MUX_9548_7_CH0, + MUX_9548_7_CH1, + MUX_9548_7_CH2, + MUX_9548_7_CH3, + MUX_9548_7_CH4, + MUX_9548_7_CH5, + MUX_9548_7_CH6, + MUX_9548_7_CH7, + MUX_9548_8_CH0, + MUX_9548_8_CH1, + MUX_9548_8_CH2, + MUX_9548_8_CH3, + MUX_9548_8_CH4, + MUX_9548_8_CH5, + MUX_9548_8_CH6, + MUX_9548_8_CH7, + MUX_9548_9_CH0, + MUX_9548_9_CH1, + MUX_9548_9_CH2, + MUX_9548_9_CH3, + MUX_9548_9_CH4, + MUX_9548_9_CH5, + MUX_9548_9_CH6, + MUX_9548_9_CH7, + MUX_9548_10_CH0, + MUX_9548_10_CH1, + MUX_9548_10_CH2, + MUX_9548_10_CH3, + MUX_9548_10_CH4, + MUX_9548_10_CH5, + MUX_9548_10_CH6, + MUX_9548_10_CH7, +}; + +#define I2C_ADDR_MUX_9555_0 (0x20) +#define I2C_ADDR_MUX_9555_1 (0x24) +#define I2C_ADDR_MUX_9555_2 (0x25) +#define I2C_ADDR_MUX_9555_3 (0x26) +#define I2C_ADDR_MUX_9539_0 (0x76) +#define I2C_ADDR_MUX_9539_1 (0x76) +#define I2C_BUS_FAN_STATUS (I2C_BUS_MAIN) +#define I2C_BUS_SYS_LED (MUX_9548_1_CH1) + +#define NUM_OF_I2C_MUX (11) +#define NUM_OF_CPLD (5) +#define NUM_OF_QSFP_PORT (64) +#define NUM_OF_SFP_PORT (2) +#define QSFP_EEPROM_I2C_ADDR (0x50) + +enum gpio_reg { + REG_PORT0_IN, + REG_PORT1_IN, + REG_PORT0_OUT, + REG_PORT1_OUT, + REG_PORT0_POL, + REG_PORT1_POL, + REG_PORT0_DIR, + REG_PORT1_DIR, +}; + +struct ing_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +struct i2c_init_data { + __u16 ch; + __u16 addr; + __u8 reg; + __u8 value; +}; + +#endif diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/ingrasys_s9200_64x_psu.c b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/ingrasys_s9200_64x_psu.c new file mode 100644 index 00000000000..46642f1271c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/modules/ingrasys_s9200_64x_psu.c @@ -0,0 +1,389 @@ +/* + * S9200-64X PSU driver + * + * Copyright (C) 2017 Ingrasys, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "ingrasys_s9200_64x_platform.h" + +static ssize_t show_psu_eeprom(struct device *dev, + struct device_attribute *da, + char *buf); +static struct s9200_psu_data *s9200_psu_update_status(struct device *dev); +static struct s9200_psu_data *s9200_psu_update_eeprom(struct device *dev); +static int s9200_psu_read_block(struct i2c_client *client, + u8 command, + u8 *data, + int data_len); + + +#define DRIVER_NAME "psu" + +// Addresses scanned +static const unsigned short normal_i2c[] = { 0x50, I2C_CLIENT_END }; + +/* PSU EEPROM SIZE */ +#define EEPROM_SZ 256 +#define READ_EEPROM 1 +#define NREAD_EEPROM 0 + +static struct i2c_client pca9555_client; + +/* pca9555 gpio pin mapping */ +#define PSU2_PWROK 0 +#define PSU2_PRSNT_L 1 +#define PSU2_PWRON_L 2 +#define PSU1_PWROK 3 +#define PSU1_PRSNT_L 4 +#define PSU1_PWRON_L 5 +#define TMP_75_INT_L 6 + +/* Driver Private Data */ +struct s9200_psu_data { + struct mutex lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + s32 status; /* IO expander value */ + char eeprom[EEPROM_SZ]; /* psu eeprom data */ + char psuABS; /* PSU absent */ + char psuPG; /* PSU power good */ +}; + +enum psu_index +{ + s9200_psu1, + s9200_psu2 +}; + +/* + * display power good attribute + */ +static ssize_t +show_psu_pg(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct s9200_psu_data *data = s9200_psu_update_status(dev); + unsigned int value; + + mutex_lock(&data->lock); + value = data->psuPG; + mutex_unlock(&data->lock); + + return sprintf(buf, "%d\n", value); +} + +/* + * display power absent attribute + */ +static ssize_t +show_psu_abs(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct s9200_psu_data *data = s9200_psu_update_status(dev); + unsigned int value; + + mutex_lock(&data->lock); + value = data->psuABS; + mutex_unlock(&data->lock); + + return sprintf(buf, "%d\n", value); +} + + +/* + * sysfs attributes for psu + */ +static DEVICE_ATTR(psu_pg, S_IRUGO, show_psu_pg, NULL); +static DEVICE_ATTR(psu_abs, S_IRUGO, show_psu_abs, NULL); +static DEVICE_ATTR(psu_eeprom, S_IRUGO, show_psu_eeprom, NULL); + +static struct attribute *s9200_psu_attributes[] = { + &dev_attr_psu_pg.attr, + &dev_attr_psu_abs.attr, + &dev_attr_psu_eeprom.attr, + NULL +}; + +/* + * display psu eeprom content + */ +static ssize_t +show_psu_eeprom(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct s9200_psu_data *data = s9200_psu_update_eeprom(dev); + + memcpy(buf, (char *)data->eeprom, EEPROM_SZ); + return EEPROM_SZ; +} + +static const struct attribute_group s9200_psu_group = { + .attrs = s9200_psu_attributes, +}; + +/* + * check gpio expander is accessible + */ +static int +pca9555_detect(struct i2c_client *client) +{ + if (i2c_smbus_read_byte_data(client, REG_PORT0_DIR) < 0) { + return -ENODEV; + } + + return 0; +} + +/* + * client address init + */ +static void +i2c_devices_client_address_init(struct i2c_client *client) +{ + pca9555_client = *client; + pca9555_client.addr = 0x25; +} + +static int +s9200_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct s9200_psu_data *data; + int status, err; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct s9200_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + memset(data, 0, sizeof(struct s9200_psu_data)); + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->lock); + + i2c_devices_client_address_init(client); + + err = pca9555_detect(&pca9555_client); + if (err) { + dev_info(&client->dev, "pca9555_detect failed\n"); + return err; + } + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &s9200_psu_group); + if (status) { + goto exit_free; + } + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &s9200_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int +s9200_psu_remove(struct i2c_client *client) +{ + struct s9200_psu_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &s9200_psu_group); + kfree(data); + + return 0; +} + + +/* + * psu eeprom read utility + */ +static int +s9200_psu_read_block(struct i2c_client *client, + u8 command, + u8 *data, + int data_len) +{ + int i=0, ret=0; + int blk_max = 32; //max block read size + + /* read eeprom, 32 * 8 = 256 bytes */ + for (i=0; i < EEPROM_SZ/blk_max; i++) { + ret = i2c_smbus_read_i2c_block_data(client, (i*blk_max), blk_max, + data + (i*blk_max)); + if (ret < 0) { + return ret; + } + } + return ret; +} + +/* + * update eeprom content + */ +static struct s9200_psu_data +*s9200_psu_update_eeprom(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct s9200_psu_data *data = i2c_get_clientdata(client); + s32 status = 0; + int psu_pwrok = 0; + int psu_prsnt_l = 0; + + mutex_lock(&data->lock); + + if (time_after(jiffies, data->last_updated + 300 * HZ) + || !data->valid) { + + /* Read psu status */ + + status = i2c_smbus_read_word_data(&(pca9555_client), REG_PORT0_IN); + data->status = status; + + /*read psu status from io expander*/ + + if (data->index == s9200_psu1) { + psu_pwrok = PSU1_PWROK; + psu_prsnt_l = PSU1_PRSNT_L; + } else { + psu_pwrok = PSU2_PWROK; + psu_prsnt_l = PSU2_PRSNT_L; + } + data->psuPG = (status >> psu_pwrok) & 0x1; + data->psuABS = (status >> psu_prsnt_l) & 0x1; + + /* Read eeprom */ + if (!data->psuABS) { + //clear local eeprom data + memset(data->eeprom, 0, EEPROM_SZ); + + //read eeprom + status = s9200_psu_read_block(client, 0, data->eeprom, + ARRAY_SIZE(data->eeprom)); + + if (status < 0) { + memset(data->eeprom, 0, EEPROM_SZ); + dev_err(&client->dev, "Read eeprom failed, status=(%d)\n", status); + } else { + data->valid = 1; + } + } else { + memset(data->eeprom, 0, EEPROM_SZ); + } + data->last_updated = jiffies; + } + + mutex_unlock(&data->lock); + + return data; +} + +/* + * update psu status + */ +static struct s9200_psu_data +*s9200_psu_update_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct s9200_psu_data *data = i2c_get_clientdata(client); + s32 status = 0; + int psu_pwrok = 0; + int psu_prsnt_l = 0; + + mutex_lock(&data->lock); + + /* Read psu status */ + + status = i2c_smbus_read_word_data(&(pca9555_client), REG_PORT0_IN); + data->status = status; + + /*read psu status from io expander*/ + + if (data->index == s9200_psu1) { + psu_pwrok = PSU1_PWROK; + psu_prsnt_l = PSU1_PRSNT_L; + } else { + psu_pwrok = PSU2_PWROK; + psu_prsnt_l = PSU2_PRSNT_L; + } + data->psuPG = (status >> psu_pwrok) & 0x1; + data->psuABS = (status >> psu_prsnt_l) & 0x1; + + mutex_unlock(&data->lock); + + return data; +} + +static const struct i2c_device_id s9200_psu_id[] = { + { "psu1", s9200_psu1 }, + { "psu2", s9200_psu2 }, + {} +}; + +MODULE_DEVICE_TABLE(i2c, s9200_psu_id); + +static struct i2c_driver s9200_psu_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = s9200_psu_probe, + .remove = s9200_psu_remove, + .id_table = s9200_psu_id, + .address_list = normal_i2c, +}; + +static int __init s9200_psu_init(void) +{ + return i2c_add_driver(&s9200_psu_driver); +} + +static void __exit s9200_psu_exit(void) +{ + i2c_del_driver(&s9200_psu_driver); +} + +module_init(s9200_psu_init); +module_exit(s9200_psu_exit); + +MODULE_AUTHOR("Jason Tsai "); +MODULE_DESCRIPTION("S9200-64X psu driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/service/qsfp-monitor.service b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/service/qsfp-monitor.service new file mode 100644 index 00000000000..bcb9beb6a99 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/service/qsfp-monitor.service @@ -0,0 +1,15 @@ +[Unit] +Description= This QSFP Monitor service is to setup QSFP SI. +Requires=s9200-64x-monitor.service +After=s9200-64x-monitor.service + +[Service] +ExecStart=/usr/sbin/qsfp_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/service/s9200-64x-monitor.service b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/service/s9200-64x-monitor.service new file mode 100644 index 00000000000..bd92628a6c3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/service/s9200-64x-monitor.service @@ -0,0 +1,19 @@ +[Unit] +Description= This Platform Monitor service is to initialize platform and monitor platform. +Before=platform-monitor.service +After=sysinit.target +Wants=fancontrol.service +Wants=qsfp-monitor.service +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/sbin/i2c_utils.sh i2c_init +ExecStart=/usr/sbin/s9200_64x_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/utils/i2c_utils.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/utils/i2c_utils.sh new file mode 100644 index 00000000000..dcb6b916798 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/utils/i2c_utils.sh @@ -0,0 +1,1951 @@ +#!/bin/bash + +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# trun on for more debug output +#DEBUG="on" + +VERSION="1.0.0" +TRUE=200 +FALSE=404 + +EXEC_FUNC=${1} +COLOR_LED=${2} +QSFP_PORT=${2} +QSFP_INIT_ACTION=${2} +MB_EEPROM_ACTION=${2} +TARGET_10G_MUX=${2} +QSFP_ACTION=${3} +QSFP_VALUE=${4} +ONOFF_LED=${3} +FAN_TRAY=${4} + +############################################################ +# Distributor ID: Debian +# Description: Debian GNU/Linux 8.6 (jessie) +# Release: 8.6 +# Codename: jessie +# Linux debian 3.16.0-4-amd64 #1 +# SMP Debian 3.16.36-1+deb8u1 (2016-09-03) x86_64 GNU/Linux +############################################################ + +# Color Definition +COLOR_TITLE="\e[1;32m" ### Green ### +COLOR_WARNING="\e[1;33m" ### Yellow ### +COLOR_ERROR="\e[1;31m" ### Red ### +COLOR_END="\e[0m" ### END ### + +I2C_NUM=0 +NUM_I801_DEVICE=$((I2C_NUM++)) #0 + +#MUX PCA9548#0 CPLD (I2C_NUM 1~8) +NUM_MUX_9548_CPLD_CHAN=() +for (( i=0; i<8; ++i )) +do + NUM_MUX_9548_CPLD_CHAN[i]=$((I2C_NUM++)) +done + +#MUX PCA9548#1 UCD (I2C_NUM 9~16) +NUM_MUX_9548_UCD_CHAN=() +for (( i=0; i<8; ++i )) +do + NUM_MUX_9548_UCD_CHAN[i]=$((I2C_NUM++)) +done + +#MUX PCA9545 PSU (I2C_NUM 17~20) +NUM_MUX_9545_PSU_CHAN=() +for (( i=0; i<4; ++i )) +do + NUM_MUX_9545_PSU_CHAN[i]=$((I2C_NUM++)) +done + +#MUX PCA9548 QSFP ROOT (I2C_NUM 21~28) +NUM_MUX_9548_QSFP_ROOT_CHAN=() +for (( i=0; i<8; ++i )) +do + NUM_MUX_9548_QSFP_ROOT_CHAN[i]=$((I2C_NUM++)) +done + +#MUX PCA9548 QSFP Port 0~7 (I2C_NUM 29~36) +NUM_MUX_9548_QSFP_0_CHAN=() +for (( i=0; i<8; ++i )) +do + NUM_MUX_9548_QSFP_0_CHAN[i]=$((I2C_NUM++)) +done + +#MUX PCA9548 QSFP Port 8~15 (I2C_NUM 37~44) +NUM_MUX_9548_QSFP_1_CHAN=() +for (( i=0; i<8; ++i )) +do + NUM_MUX_9548_QSFP_1_CHAN[i]=$((I2C_NUM++)) +done + +#MUX PCA9548 QSFP Port 16~23 (I2C_NUM 45~52) +NUM_MUX_9548_QSFP_2_CHAN=() +for (( i=0; i<8; ++i )) +do + NUM_MUX_9548_QSFP_2_CHAN[i]=$((I2C_NUM++)) +done + +#MUX PCA9548 QSFP Port 24~31 (I2C_NUM 53~60) +NUM_MUX_9548_QSFP_3_CHAN=() +for (( i=0; i<8; ++i )) +do + NUM_MUX_9548_QSFP_3_CHAN[i]=$((I2C_NUM++)) +done + +#MUX PCA9548 QSFP Port 32~39 (I2C_NUM 61~68) +NUM_MUX_9548_QSFP_4_CHAN=() +for (( i=0; i<8; ++i )) +do + NUM_MUX_9548_QSFP_4_CHAN[i]=$((I2C_NUM++)) +done + +#MUX PCA9548 QSFP Port 40~47 (I2C_NUM 69~76) +NUM_MUX_9548_QSFP_5_CHAN=() +for (( i=0; i<8; ++i )) +do + NUM_MUX_9548_QSFP_5_CHAN[i]=$((I2C_NUM++)) +done + +#MUX PCA9548 QSFP Port 48~55 (I2C_NUM 77~84) +NUM_MUX_9548_QSFP_6_CHAN=() +for (( i=0; i<8; ++i )) +do + NUM_MUX_9548_QSFP_6_CHAN[i]=$((I2C_NUM++)) +done + +#MUX PCA9548 QSFP Port 56~63 (I2C_NUM 85~92) +NUM_MUX_9548_QSFP_7_CHAN=() +for (( i=0; i<8; ++i )) +do + NUM_MUX_9548_QSFP_7_CHAN[i]=$((I2C_NUM++)) +done + +#MUX PCA9545 SFP (I2C_NUM 93~96) +NUM_MUX_9545_SFP_CHAN=() +for (( i=0; i<4; ++i )) +do + NUM_MUX_9545_SFP_CHAN[i]=$((I2C_NUM++)) +done + +#MUX PCA9548 CPLD SW Upgrade (I2C_NUM 97~104) +NUM_MUX_9548_CPLD_SW_CHAN=() +for (( i=0; i<8; ++i )) +do + NUM_MUX_9548_CPLD_SW_CHAN[i]=$((I2C_NUM++)) +done + +#MUX Alias +I2C_BUS_PSU1_EEPROM=${NUM_MUX_9545_PSU_CHAN[1]} +I2C_BUS_PSU2_EEPROM=${NUM_MUX_9545_PSU_CHAN[0]} +I2C_BUS_LED_BOARD=${NUM_MUX_9548_UCD_CHAN[1]} +I2C_BUS_ID_GPIO=${NUM_MUX_9548_UCD_CHAN[2]} +I2C_BUS_10GMUX=${NUM_MUX_9548_UCD_CHAN[4]} +I2C_BUS_HWM=${NUM_MUX_9548_UCD_CHAN[7]} +I2C_BUS_FAN_BOARD=${NUM_I801_DEVICE} +I2C_BUS_MB_EEPROM=${NUM_I801_DEVICE} +I2C_BUS_TH_RESET=${NUM_I801_DEVICE} +I2C_BUS_BOARD_TYPE=${NUM_I801_DEVICE} +I2C_BUS_BMC_BOARD_TYPE=${NUM_I801_DEVICE} +I2C_BUS_LM75_MAC=${NUM_MUX_9548_CPLD_CHAN[5]} +I2C_BUS_LM75_FRONT=${NUM_MUX_9548_CPLD_CHAN[6]} +I2C_BUS_LM75_REAR=${NUM_MUX_9548_CPLD_CHAN[5]} +I2C_BUS_PSU_INT=${NUM_I801_DEVICE} +I2C_BUS_PSU_STATUS=${NUM_I801_DEVICE} +I2C_BUS_MUX_RST=${NUM_I801_DEVICE} +#CPU Board +I2C_BUS_CPU_EEPROM=${NUM_I801_DEVICE} +I2C_BUS_CPU_TMP75=${NUM_I801_DEVICE} +I2C_BUS_MUX_CPU_CPLD=${NUM_I801_DEVICE} + +PATH_SYS_I2C_DEVICES="/sys/bus/i2c/devices" +PATH_SYS_CPLD="/sys/devices/platform/ingrasys-s9200-cpld.0" +PATH_HWMON_ROOT_DEVICES="/sys/class/hwmon" +PATH_HWMON_W83795_DEVICE="${PATH_HWMON_ROOT_DEVICES}/hwmon5" +PATH_I801_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_I801_DEVICE}" +PATH_LM75_MAC="${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_LM75_MAC}" +PATH_LM75_FRONT="${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_LM75_FRONT}" +PATH_LM75_REAR="${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_LM75_REAR}" +PATH_CPU_TMP75="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_I801_DEVICE}" +PATH_BMC_TMP75="${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_HWM}" +PATH_PSU1_EERPOM=${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU1_EEPROM} +PATH_PSU2_EEPROM=${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU2_EEPROM} +PATH_10GMUX=${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_10GMUX} +#PATH for MUX PCA9548_QSFP_ROOT +PATH_MUX_9548_QSFP_ROOT="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9545_PSU_CHAN[2]}" +PATH_MUX_9548_QSFP_ROOT_CHAN=() +for (( i=0; i<8; ++i )) +do + PATH_MUX_9548_QSFP_ROOT_CHAN[i]="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_QSFP_ROOT_CHAN[i]}" +done +PATH_MUX_9545_SFP="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9545_PSU_CHAN[3]}" +PATH_MUX_9545_SFP_CHAN=() +for (( i=0; i<4; ++i )) +do + PATH_MUX_9545_SFP_CHAN[i]="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9545_SFP_CHAN[i]}" +done + +#i2cmap and gpiomap path +PATH_I2CMAP=/tmp/i2cmap + +#Mother Board +I2C_ADDR_MUX_9539_TH_RST=0x74 +I2C_ADDR_LED_BOARD=0x75 +I2C_ADDR_FAN_BOARD=0x20 +I2C_ADDR_ID_GPIO=0x27 +I2C_ADDR_MUX_9548_CPLD=0x70 +I2C_ADDR_MUX_9548_UCD=0x76 +I2C_ADDR_MUX_9545_PSU=0x72 +I2C_ADDR_MUX_9548_QSFP_ROOT=0x71 +I2C_ADDR_MUX_9548_QSFP=0x73 +I2C_ADDR_MUX_9545_SFP=0x73 +I2C_ADDR_CPLD=0x33 +I2C_ADDR_MB_EEPROM=0x55 +I2C_ADDR_QSFP_EEPROM=0x50 +I2C_ADDR_PSU_EEPROM=0x50 +I2C_ADDR_LM75_MAC=0x4E +I2C_ADDR_LM75_FRONT=0x4D +I2C_ADDR_LM75_REAR=0x4D +I2C_ADDR_10GMUX=0x67 +#Dummy BMC Board +I2C_ADDR_HWM=0x2F +I2C_ADDR_PSU_INT=0x24 #PSU Interrup on Dummy BMC Board +I2C_ADDR_BMC_BOARD_TYPE=0x24 #PSU Status on Dummy BMC Board +I2C_ADDR_PSU_STATUS=0x25 #PSU Status on Dummy BMC Board +I2C_ADDR_MUX_RST=0x26 #MUX RST on Dummy BMC Board +I2C_ADDR_TMP75_BB=0x4A +#CPU Board +I2C_ADDR_CPU_EEPROM=0x51 +I2C_ADDR_CPU_TMP75=0x4F +I2C_ADDR_MUX_CPU_CPLD=0x77 + +#sysfs +PATH_SYSFS_PSU1="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_PSU1_EEPROM}-$(printf "%04x" $I2C_ADDR_PSU_EEPROM)" +PATH_SYSFS_PSU2="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_PSU2_EEPROM}-$(printf "%04x" $I2C_ADDR_PSU_EEPROM)" + +#Active High/Low +ACTIVE_LOW=1 +ACTIVE_HIGH=0 +#GPIO Direction In/Out +DIR_IN=in +DIR_OUT=out + +#Power Supply Status +PSU_DC_ON=1 +PSU_DC_OFF=0 +PSU_EXIST=1 +PSU_NOT_EXIST=0 + +#W83795 Registers +REG_BANK_SEL=0x00 +REG_VOLT_CTRL1=0x02 +REG_VOLT_CTRL2=0x03 +REG_TEMP_CTRL1=0x04 +REG_TEMP_CTRL2=0x05 + +#PCA9535 Registers +REG_IN_0=0 +REG_IN_1=1 +REG_OUT_0=2 +REG_OUT_1=3 +REG_POLARITY_0=4 +REG_POLARITY_1=5 +REG_CFG_0=6 +REG_CFG_1=7 + +#LM75 Registers +LM75_REG_TEMP=0x00 +LM75_REG_CONF=0x01 +LM75_REG_HYST=0x02 +LM75_REG_TOS=0x03 + +#Bit Mask +BIT_MASK=(1 2 4 8 16 32 64 128) + +#MUX Type +PCA9545="pca9545" +PCA9548="pca9548" + +#PLATFORM Variables +PORT_NUM=64 + +#CPLD Variables +CPLD_QSFP_GROUP=(12 25 38 51 64) +CPLD_QSFP_STATUS_REG_BASE=0x20 +CPLD_QSFP_MODE_SELECT_REG_BASE=0x30 +CPLD_QSFP_ABS="abs" +CPLD_QSFP_INT="int" +CPLD_QSFP_RST="rst" +CPLD_QSFP_LP="lp" + + +# Help usage function +function _help { + echo "=========================================================" + echo "# Description: Help Function" + echo "=========================================================" + echo "----------------------------------------------------" + echo "EX : ${0} help" + echo " : ${0} i2c_init" + echo " : ${0} i2c_deinit" + echo " : ${0} i2c_temp_init" + echo " : ${0} i2c_fan_init" + echo " : ${0} i2c_volmon_init" + echo " : ${0} i2c_io_exp_init" + echo " : ${0} i2c_psu_eeprom_get" + echo " : ${0} i2c_mb_eeprom_get" + echo " : ${0} i2c_cpu_eeprom_get" + echo " : ${0} i2c_qsfp_eeprom_get [1-${PORT_NUM}]" + echo " : ${0} i2c_qsfp_eeprom_init new|delete" + echo " : ${0} i2c_mb_eeprom_init new|delete" + echo " : ${0} i2c_cpu_eeprom_init new|delete" + echo " : ${0} i2c_qsfp_status_get [1-${PORT_NUM}]" + echo " : ${0} i2c_qsfp_type_get [1-${PORT_NUM}]" + echo " : ${0} i2c_qsfp_signal_get [1-${PORT_NUM}] [abs|int|rst|lp]" + echo " : ${0} i2c_qsfp_signal_set [1-${PORT_NUM}] [rst|lp] [0|1] (low_active)" + echo " : ${0} i2c_board_type_get" + echo " : ${0} i2c_bmc_board_type_get" + echo " : ${0} i2c_psu_status" + echo " : ${0} i2c_led_psu_status_set" + echo " : ${0} i2c_led_fan_status_set" + echo " : ${0} i2c_led_fan_tray_status_set" + echo " : ${0} i2c_led_fan_tray_test" + echo " : ${0} i2c_cpld_version" + echo " : ${0} i2c_test_all" + echo " : ${0} i2c_led_test" + echo " : ${0} i2c_sys_led green|amber" + echo " : ${0} i2c_fan_led green|amber" + echo " : ${0} i2c_psu1_led green|amber" + echo " : ${0} i2c_psu2_led green|amber" + echo " : ${0} i2c_fan_tray_led green|amber on|off [1-4]" + echo " : ${0} i2c_10g_mux cpu|fp" + echo "----------------------------------------------------" +} + +#Pause function +function _pause { + read -p "$*" +} + +#Retry command function +function _retry { + local i + for i in {1..5}; + do + eval "${*}" && break || echo "retry"; sleep 1; + done +} + +#logical(front panel) to physical (falcon core) port mapping +function _port_logic2phy { + + local logic_port=$1 + local phy_port=0 + + if (( $logic_port >=1 && $logic_port <= 32 )) ; then + phy_port=$(( (logic_port-1)/2*4 + (logic_port-1)%2 + 1)) + elif (( $logic_port >=33 && $logic_port <= 64 )) ; then + phy_port=$(( (((logic_port-1)%32))/2*4 + (logic_port-1)%2 + 3)) + fi + + echo $phy_port +} + +#set i2cmap +function _set_i2cmap { + local i2c_n=$1 + local alias=$2 + + #create i2cmap dir if not exist + mkdir -p $PATH_I2CMAP + + #check i2c_n exists in sysfs + if [ ! -L ${PATH_SYS_I2C_DEVICES}/i2c-${i2c_n} ]; then + echo "${PATH_SYS_I2C_DEVICES}/i2c-${i2c_n} does not exist." + return + fi + + #create or update link + ln -sf ${PATH_SYS_I2C_DEVICES}/i2c-${i2c_n} ${PATH_I2CMAP}/${alias} +} + +#clear i2cmap +function _clear_i2cmap { + #delete i2cmap dir + rm -rf ${PATH_I2CMAP}/ +} + +#remove kernel module if exists +function _util_rmmod { + local mod=$1 + [ "$(lsmod | grep "^$mod ")" != "" ] && rmmod $mod +} + +function _create_i2c_mux_device { + local mux_type=$1 + local mux_addr=$2 + local mux_parent_chan=$3 + local mux_chan0=$4 + local mux_desc=$5 + + if [ ! -e "${PATH_SYS_I2C_DEVICES}/i2c-${mux_chan0}" ]; then + _retry "echo '$mux_type ${mux_addr}' > ${mux_parent_chan}/new_device" + _set_i2cmap ${mux_chan0} "${mux_desc}" + else + echo "${mux_desc} ${mux_addr} already init." + fi +} + +#I2C Init +function _i2c_init { + echo "=========================================================" + echo "# Description: I2C Init" + echo "=========================================================" + + _util_rmmod i2c_i801 + modprobe i2c_i801 #disable_features=0x10 + modprobe i2c_dev + modprobe i2c_mux_pca954x force_deselect_on_exit=1 + + #add MUX_9548_CPLD on I801 + _create_i2c_mux_device $PCA9548 $I2C_ADDR_MUX_9548_CPLD ${PATH_I801_DEVICE} ${NUM_MUX_9548_CPLD_CHAN[0]} "PCA9548_CPLD" + + #add MUX_9548_UCD on I801 + _create_i2c_mux_device $PCA9548 $I2C_ADDR_MUX_9548_UCD ${PATH_I801_DEVICE} ${NUM_MUX_9548_UCD_CHAN[0]} "PCA9548_UCD" + + #add MUX_9545_PSU on I801 + _create_i2c_mux_device $PCA9545 $I2C_ADDR_MUX_9545_PSU ${PATH_I801_DEVICE} ${NUM_MUX_9545_PSU_CHAN[0]} "PCA9545_PSU" + + #add MUX_9548_QSFP_ROOT on MUX_9545_PSU_CHAN[2] + _create_i2c_mux_device $PCA9548 $I2C_ADDR_MUX_9548_QSFP_ROOT ${PATH_MUX_9548_QSFP_ROOT} ${NUM_MUX_9548_QSFP_ROOT_CHAN[0]} "PCA9548_QSPF_ROOT" + + #add MUX_9548_QSFP_0 on MUX_9548_QSFP_ROOT_CHAN[0] + _create_i2c_mux_device $PCA9548 $I2C_ADDR_MUX_9548_QSFP ${PATH_MUX_9548_QSFP_ROOT_CHAN[0]} ${NUM_MUX_9548_QSFP_0_CHAN[0]} "PCA9548_QSPF_0" + + #add MUX_9548_QSFP_1 on MUX_9548_QSFP_ROOT_CHAN[1] + _create_i2c_mux_device $PCA9548 $I2C_ADDR_MUX_9548_QSFP ${PATH_MUX_9548_QSFP_ROOT_CHAN[1]} ${NUM_MUX_9548_QSFP_1_CHAN[0]} "PCA9548_QSPF_1" + + #add MUX_9548_QSFP_2 on MUX_9548_QSFP_ROOT_CHAN[2] + _create_i2c_mux_device $PCA9548 $I2C_ADDR_MUX_9548_QSFP ${PATH_MUX_9548_QSFP_ROOT_CHAN[2]} ${NUM_MUX_9548_QSFP_2_CHAN[0]} "PCA9548_QSPF_2" + + #add MUX_9548_QSFP_3 on MUX_9548_QSFP_ROOT_CHAN[3] + _create_i2c_mux_device $PCA9548 $I2C_ADDR_MUX_9548_QSFP ${PATH_MUX_9548_QSFP_ROOT_CHAN[3]} ${NUM_MUX_9548_QSFP_3_CHAN[0]} "PCA9548_QSPF_3" + + #add MUX_9548_QSFP_4 on MUX_9548_QSFP_ROOT_CHAN[4] + _create_i2c_mux_device $PCA9548 $I2C_ADDR_MUX_9548_QSFP ${PATH_MUX_9548_QSFP_ROOT_CHAN[4]} ${NUM_MUX_9548_QSFP_4_CHAN[0]} "PCA9548_QSPF_4" + + #add MUX_9548_QSFP_5 on MUX_9548_QSFP_ROOT_CHAN[5] + _create_i2c_mux_device $PCA9548 $I2C_ADDR_MUX_9548_QSFP ${PATH_MUX_9548_QSFP_ROOT_CHAN[5]} ${NUM_MUX_9548_QSFP_5_CHAN[0]} "PCA9548_QSPF_5" + + #add MUX_9548_QSFP_6 on MUX_9548_QSFP_ROOT_CHAN[6] + _create_i2c_mux_device $PCA9548 $I2C_ADDR_MUX_9548_QSFP ${PATH_MUX_9548_QSFP_ROOT_CHAN[6]} ${NUM_MUX_9548_QSFP_6_CHAN[0]} "PCA9548_QSPF_6" + + #add MUX_9548_QSFP_7 on MUX_9548_QSFP_ROOT_CHAN[7] + _create_i2c_mux_device $PCA9548 $I2C_ADDR_MUX_9548_QSFP ${PATH_MUX_9548_QSFP_ROOT_CHAN[7]} ${NUM_MUX_9548_QSFP_7_CHAN[0]} "PCA9548_QSPF_7" + + #add MUX_9545_SFP on QSFP_ROOT + _create_i2c_mux_device $PCA9545 $I2C_ADDR_MUX_9545_SFP ${PATH_MUX_9545_SFP} ${NUM_MUX_9545_SFP_CHAN[0]} "PCA9545_SPF" + + #Init CPLD LED_CLR Register (QSFP LED) + i2cset -y -m ${BIT_MASK[2]} ${NUM_I801_DEVICE} ${I2C_ADDR_MUX_9539_TH_RST} ${REG_OUT_0} 0xFF + + _util_rmmod coretemp + _util_rmmod jc42 + _util_rmmod w83795 + _util_rmmod lm75 + + _i2c_temp_init + _i2c_volmon_init + modprobe coretemp + modprobe lm75 + modprobe jc42 + modprobe eeprom_mb + _i2c_mb_eeprom_init "new" + _i2c_cpu_eeprom_init "new" + modprobe eeprom + modprobe gpio-pca953x + _i2c_sensors_init + _i2c_fan_init + _i2c_io_exp_init + _i2c_psu_init + _i2c_qsfp_eeprom_init "new" + _i2c_led_psu_status_set + _i2c_led_fan_status_set + COLOR_LED="green" + echo "${COLOR_LED}" + _i2c_sys_led + modprobe cpld + _config_rmem +} + +#I2C Deinit +function _i2c_deinit { + for mod in cpld coretemp jc42 w83795 lm75 eeprom eeprom_mb gpio-pca953x i2c_mux_pca954x i2c_i801 ingrasys_s9200_64x_psu; + do + _util_rmmod $mod + done + _clear_i2cmap +} + +#Temperature sensor Init +function _i2c_temp_init { + local lm="lm75" + local tmp="tmp75" + local i2c_bus=${I2C_BUS_HWM} + local i2c_addr=${I2C_ADDR_HWM} + + echo "=========================================================" + echo "# Description: TEMP INIT" + echo "=========================================================" + + # select bank0 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_BANK_SEL} 0x80 + echo "enable VDSEN14, VDSEN15, VDSEN16, and TR4 temperature monitoring" + i2cset -y -r ${i2c_bus=} ${i2c_addr} ${REG_TEMP_CTRL2} 0x6A + + echo "export CPU sensor TMP75 to sysfs" + echo "${tmp} ${I2C_ADDR_CPU_TMP75}" > ${PATH_CPU_TMP75}/new_device + + echo "Add Dummy Board LM75 to sysfs" + echo "${lm} ${I2C_ADDR_LM75_MAC}" > ${PATH_LM75_MAC}/new_device + echo "${lm} ${I2C_ADDR_LM75_FRONT}" > ${PATH_LM75_FRONT}/new_device + echo "${lm} ${I2C_ADDR_LM75_REAR}" > ${PATH_LM75_REAR}/new_device + + echo "CLKIN clock frequency set as 48Mhz" + i2cset -y -r ${i2c_bus} ${i2c_addr} 0x01 0x1C + + # select bank 2 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_BANK_SEL} 0x82 + echo "set PWM mode in FOMC" + i2cset -y -r ${i2c_bus} ${i2c_addr} 0x0F 0x00 +} + +#FAN Init +function _i2c_fan_init { + local init_fan_speed=120 + + echo "=========================================================" + echo "# Description: FAN INIT" + echo "=========================================================" + + if [ -e "${PATH_HWMON_W83795_DEVICE}" ]; then + echo "Init Fan Speed to ${init_fan_speed} (MAX is 255)" + echo $init_fan_speed > ${PATH_HWMON_W83795_DEVICE}/device/pwm1 + echo $init_fan_speed > ${PATH_HWMON_W83795_DEVICE}/device/pwm2 + else + echo "FAIL, W83795 not found in path ${PATH_HWMON_W83795_DEVICE}" + fi +} + +#VOLMON Init +function _i2c_volmon_init { + echo -n "VOLMON INIT" + local i2c_bus=${I2C_BUS_HWM} + local i2c_addr=${I2C_ADDR_HWM} + + #select bank0 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_BANK_SEL} 0x80 + #enable voltage monitoring VSEN 1~8 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_VOLT_CTRL1} 0xFF + #enable voltage monitoring 3VDD and 3VBAT + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_VOLT_CTRL2} 0x50 + #eable voltage monitoring VSEN12 and VSEN13 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_TEMP_CTRL1} 0x0A + + echo "Done" +} + +#IO Expander Init +function _i2c_io_exp_init { + local i2c_bus=0 + local i2c_addr=0 + + echo "=========================================================" + echo "# Description: I2C IO Expander Init" + echo "=========================================================" + + echo "Init PCA9539 TH RESET IO Expander" + #PCA9539 TH RESET + #0.0 TH_RST_L OUT 1 + #0.1 TH_PCIE_RST_L OUT 1 + #0.2 LED_CLR OUT 1 + #0.3 HOST_TO_BMC_I2C_GPIO OUT 0 + #0.4 USB_MUX_SEL OUT 0 + #0.5 UART_MUX_SEL OUT 0 + #0.6 FIN0 OUT 0 + #0.7 FIN7 OUT 0 + #1.0 TH_INT_L IN + #1.1 CPLD4_TO_CPU_INT_L IN + #1.2 CPLD3_TO_CPU_INT_L IN + #1.3 CPLD2_TO_CPU_INT_L IN + #1.4 CPLD1_TO_CPU_INT_L IN + #1.5 REF_SEL OUT 0 + #1.6 I210_PE_RST_L OUT 1 + #1.7 I210_RST_L OUT 1 + i2c_bus=${I2C_BUS_TH_RESET} + i2c_addr=${I2C_ADDR_MUX_9539_TH_RST} + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_OUT_0} $((2#00000111)) + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_OUT_1} $((2#11000000)) + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_0} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_1} $((2#00011111)) + + #PCA9555 on BMC Dummy Board + #set SYSTEM_LED_RST_L before init PCA9539 LED BOARD IO Expander + echo "Init PCA9555 MUX RST IO Expander" + #PCA9555 MUX RST Expander + #0.0 FRU_I2C_MUX_RST_L OUT 1 + #0.1 MAIN_I2C_MUX_RST_L OUT 1 + #0.2 SYSTEM_LED_RST_L OUT 1 + #0.3 BMC_TO_UCD_RST_L OUT 1 + #0.4 BMC_TO_HOST_RST_L OUT 1 + #0.5 ETHX_RST_L OUT 1 + #0.6 GPIOF4 IN + #0.7 N/A + #1.0 CPU_to_FRU_I2C_EN OUT 1 + #1.1 CPU_to_MAIN_I2C_EN OUT 1 + #1.2 P3V3_FAN_EN OUT 1 + #1.3 P3V3_I2C_EN OUT 1 + #1.4 UCD9090_CNTRL OUT 1 + #1.5 UART_MUX_SEL OUT 0 + #1.6 USB_MUX_SEL OUT 0 + #1.7 ETHX_CPU_EEPROM_SEL OUT 0 + i2c_bus=${I2C_BUS_MUX_RST} + i2c_addr=${I2C_ADDR_MUX_RST} + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_OUT_0} $((2#00111111)) + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_OUT_1} $((2#00011111)) + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_0} $((2#01000000)) + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_1} 0x00 + + echo "Init PCA9539 LED BOARD IO Expander" + #PCA9539 LED BOARD + #0.0 SYS_LED_G OUT 1 + #0.1 FAN_LED_EN OUT 1 + #0.2 FAN_LED_Y OUT 0 + #0.3 PSU1_LED_Y OUT 0 + #0.4 PSU0_LED_Y OUT 0 + #0.5~0.7 X + #1.0 PSU1_PWROK OUT 1 + #1.1 PSU0_PWROK OUT 1 + i2c_bus=${I2C_BUS_LED_BOARD} + i2c_addr=${I2C_ADDR_LED_BOARD} + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_OUT_0} $((2#00000011)) + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_OUT_1} $((2#00000011)) + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_0} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_1} 0x00 + + echo "Init PCA9535 ID_GPIO IO Expander" + #PCA9535 ID_GPIO + #0.0 ~ 0.7 X + #1.0 Build_REV_0 IN + #1.1 Build_REV_1 IN + #1.2 HW_REV_0 IN + #1.3 HW_REV_1 IN + #1.4 Board_ID_0 IN + #1.5 Board_ID_1 IN + #1.6 Board_ID_2 IN + #1.7 Board_ID_3 IN + i2c_bus=${I2C_BUS_ID_GPIO} + i2c_addr=${I2C_ADDR_ID_GPIO} + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_0} 0xFF + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_1} 0xFF + + #I2C_ADDR_FAN_BOARD + echo "Init PCA9535 FAN_BOARD IO Expander" + #PCA9535 FAN_BOARD + #0.0 EN_FAN1_LED_G_H OUT 1 + #0.1 EN_FAN1_LED_Y_H OUT 0 + #0.2 FAN1_ABS# IN 0 + #0.3 FAN1_DIR# IN 0 + #0.4 EN_FAN2_LED_G_H OUT 1 + #0.5 EN_FAN2_LED_Y_H OUT 0 + #0.6 FAN2_ABS# IN 0 + #0.7 FAN2_DIR# IN 0 + #1.0 EN_FAN3_LED_G_H OUT 1 + #1.1 EN_FAN3_LED_Y_H OUT 0 + #1.2 FAN3_ABS# IN 0 + #1.3 FAN3_DIR# IN 0 + #1.4 EN_FAN4_LED_G_H OUT 1 + #1.5 EN_FAN4_LED_Y_H OUT 0 + #1.6 FAN4_ABS# IN 0 + #1.7 FAN4_DIR# IN 0 + i2c_bus=${I2C_BUS_FAN_BOARD} + i2c_addr=${I2C_ADDR_FAN_BOARD} + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_OUT_0} $((2#00010001)) + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_OUT_1} $((2#00010001)) + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_0} $((2#11001100)) + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_1} $((2#11001100)) + + #PCA9555 on BMC Dummy Board + echo "Init PCA9555 Interrupt IO Expander" + #PCA9555 Interrupt Expander + #0.0 HWM_INT_L IN + #0.1 UCD9090_INT_L IN + #0.2 ETHX_INT_L IN + #0.3 HOST_TO_BMC_INT_L IN + #0.4 THERMAL_ALT1# IN + #0.5 FAN_STATUS_INT_L IN + #0.6 PSU0_INT_L IN + #0.7 PSU1_INT_L IN + #1.0 Build_REV_0 IN + #1.1 Build_REV_1 IN + #1.2 HW_REV_0 IN + #1.3 HW_REV_1 IN + #1.4 Board_ID_0 IN + #1.5 Board_ID_1 IN + #1.6 Board_ID_2 IN + #1.7 Board_ID_3 IN + i2c_bus=${I2C_BUS_PSU_INT} + i2c_addr=${I2C_ADDR_PSU_INT} + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_0} 0xFF + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_1} 0xFF + + #PCA9555 on BMC Dummy Board + echo "Init PCA9555 PSU0_PWROK IO Expander" + #PCA9555 PSU0_PWROK Expander + #0.0 PSU0_PWROK IN + #0.1 PSU0_PRSNT_L IN + #0.2 PSU0_PWRON_L OUT 0 + #0.3 PSU1_PWROK IN + #0.4 PSU1_PRSNT_L IN + #0.5 PSU1_PWRON_L OUT 0 + #0.6 TMP75_INT_L IN + #0.7 GPIOF7 IN + #1.0 ALL_PWR_GOOD IN + #1.1 CPU_PRSNT_L IN + #1.2 FP_BTN_UARTSEL_EN_L OUT 0 + #1.3 HOST_TO_BMC_I2C_GPIO OUT 0 + #1.4 HOST_CPU_PWRBTN_L OUT 1 + #1.5 N/A + #1.6 N/A + #1.7 N/A + i2c_bus=${I2C_BUS_PSU_STATUS} + i2c_addr=${I2C_ADDR_PSU_STATUS} + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_OUT_0} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_OUT_1} $((2#00010000)) + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_POLARITY_0} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_POLARITY_1} 0x00 + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_0} $((2#11011011)) + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_1} $((2#11100011)) + + #PCA9539 on CPU Board + echo "Init PCA9539 CPLD IO Expander on CPU" + i2c_bus=${I2C_BUS_MUX_CPU_CPLD} + i2c_addr=${I2C_ADDR_MUX_CPU_CPLD} + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_0} 0xFF + i2cset -y -r ${i2c_bus} ${i2c_addr} ${REG_CFG_1} 0xFF +} + +function _i2c_sensors_init { + echo "SENSORS init" + local dev_path + + # add w83795 to sysfs + dev_path="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_HWM}-$(printf "%04x" ${I2C_ADDR_HWM})" + if ! [ -L ${dev_path} ]; then + echo "w83795adg ${I2C_ADDR_HWM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_HWM}/new_device + while [ ! -e "${PATH_HWMON_W83795_DEVICE}" ]; do + sleep 1 + done + else + echo "${dev_path} already exist (w83795)" + fi + + # BMC board thermal + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_I801_DEVICE}-$(printf "%04x" ${I2C_ADDR_TMP75_BB})" + if ! [ -L ${dev_path} ]; then + echo "tmp75 ${I2C_ADDR_TMP75_BB}" > ${PATH_BMC_TMP75}/new_device + else + echo "${dev_path} already exist" + fi + + echo "Done" +} + +#Set FAN Tray LED +function _i2c_led_fan_tray_status_set { + echo "=========================================================" + echo "# Description: FAN Tray Status Setup" + echo "=========================================================" + + #check W83795 exists + if [ ! -e "${PATH_HWMON_W83795_DEVICE}" ]; then + echo "FAIL, W83795 not found in path ${PATH_HWMON_W83795_DEVICE}" + return + fi + #FAN Status get + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + + FAN_TRAY=1 + if [ "${FAN1_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + _i2c_fan_tray_led + + COLOR_LED="amber" + ONOFF_LED="off" + _i2c_fan_tray_led + + echo "set [FAN TRAY 1] [Green]=on [Amber]=off" + else + COLOR_LED="green" + ONOFF_LED="off" + _i2c_fan_tray_led + + COLOR_LED="amber" + ONOFF_LED="on" + _i2c_fan_tray_led + + echo "set [FAN TRAY 1] [Green]=off [Amber]=on" + fi + + FAN_TRAY=2 + if [ "${FAN3_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + _i2c_fan_tray_led + + COLOR_LED="amber" + ONOFF_LED="off" + _i2c_fan_tray_led + + echo "set [FAN TRAY 2] [Green]=on [Amber]=off" + else + COLOR_LED="green" + ONOFF_LED="off" + _i2c_fan_tray_led + + COLOR_LED="amber" + ONOFF_LED="on" + _i2c_fan_tray_led + + echo "set [FAN TRAY 2] [Green]=off [Amber]=on" + fi + + FAN_TRAY=3 + if [ "${FAN5_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + _i2c_fan_tray_led + + COLOR_LED="amber" + ONOFF_LED="off" + _i2c_fan_tray_led + + echo "set [FAN TRAY 3] [Green]=on [Amber]=off" + else + COLOR_LED="green" + ONOFF_LED="off" + _i2c_fan_tray_led + + COLOR_LED="amber" + ONOFF_LED="on" + _i2c_fan_tray_led + + echo "set [FAN TRAY 3] [Green]=off [Amber]=on" + fi + + FAN_TRAY=4 + if [ "${FAN7_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + _i2c_fan_tray_led + + COLOR_LED="amber" + ONOFF_LED="off" + _i2c_fan_tray_led + + echo "set [FAN TRAY 4] [Green]=on [Amber]=off" + else + COLOR_LED="green" + ONOFF_LED="off" + _i2c_fan_tray_led + + COLOR_LED="amber" + ONOFF_LED="on" + _i2c_fan_tray_led + + echo "set [FAN TRAY 4] [Green]=off [Amber]=on" + fi +} + +#Test FAN Tray LED +function _i2c_led_fan_tray_test { + echo "=========================================================" + echo "# Description: FAN Tray LED Test" + echo "=========================================================" + + for i in {1..4} + do + FAN_TRAY=$i + COLOR_LED="green" + ONOFF_LED="on" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + _i2c_fan_tray_led + _pause "Check [Fan Tray ${i} LED] = Green and Press [Enter] key to continue..." + + COLOR_LED="green" + ONOFF_LED="off" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + _i2c_fan_tray_led + _pause "Check [Fan Tray ${i} LED] = Amber and Press [Enter] key to continue..." + done +} +#Set FAN LED +function _i2c_led_fan_status_set { + echo "=========================================================" + echo "# Description: FAN Status Setup" + echo "=========================================================" + + #check W83795 exists in hwmon2 + if [ ! -e "${PATH_HWMON_W83795_DEVICE}" ]; then + echo "FAIL, W83795 not found in path ${PATH_HWMON_W83795_DEVICE}" + return + fi + + #PSU Status set + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + + if [ "${FAN1_ALARM}" == "0" ] \ + && [ "${FAN3_ALARM}" == "0" ] \ + && [ "${FAN5_ALARM}" == "0" ] \ + && [ "${FAN7_ALARM}" == "0" ] ; then + COLOR_LED="green" + _i2c_fan_led + else + COLOR_LED="amber" + _i2c_fan_led + fi + echo "set [FAN LED] = ${COLOR_LED}" +} + +#Set PSU LED on LED Board +function _i2c_led_psu_status_set { + + echo "=========================================================" + echo "# Description: PSU LED Status Setup" + echo "=========================================================" + + #Get PSU Status + _i2c_psu_status + + #PSU1 Status + echo "------------------------------" + if [ "${psu1Exist}" == ${PSU_EXIST} ]; then + if [ "${psu1PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + _i2c_psu1_led + else + COLOR_LED="amber" + _i2c_psu1_led + fi + else + COLOR_LED="amber" + _i2c_psu1_led + fi + echo "set [PSU1 LED] = ${COLOR_LED}" + + #PSU2 Status + echo "------------------------------" + if [ "${psu2Exist}" == ${PSU_EXIST} ]; then + if [ "${psu2PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + _i2c_psu2_led + else + COLOR_LED="amber" + #ONOFF_LED="on" + _i2c_psu2_led + fi + else + COLOR_LED="amber" + _i2c_psu2_led + fi + echo "set [PSU2 LED] = ${COLOR_LED}" +} + +#LED Test +function _i2c_led_test { + echo "=========================================================" + echo "# Description: I2C LED TEST" + echo "=========================================================" + #sys led (green) + _i2c_reset_led + COLOR_LED="green" + _i2c_sys_led + _pause 'Check [SYS LED] = Green and Press [Enter] key to continue...' + #sys led (amber) + _i2c_reset_led + COLOR_LED="amber" + _i2c_sys_led + _pause 'Check [SYS LED] = Amber and Press [Enter] key to continue...' + + #FAN led (green) + _i2c_reset_led + COLOR_LED="green" + _i2c_fan_led + _pause 'Check [FAN LED] Green and Press [Enter] key to continue...' + #FAN led (amber) + _i2c_reset_led + COLOR_LED="amber" + _i2c_fan_led + _pause 'Check [FAN LED] = Amber and Press [Enter] key to continue...' + + #PSU1 led (green) + _i2c_reset_led + COLOR_LED="green" + _i2c_psu1_led + _pause 'Check [PSU1 LED] = Green and Press [Enter] key to continue...' + #PSU1 led (amber) + _i2c_reset_led + COLOR_LED="amber" + _i2c_psu1_led + _pause 'Check [PSU1 LED] = Amber and Press [Enter] key to continue...' + + #PSU2 led (green) + _i2c_reset_led + COLOR_LED="green" + _i2c_psu2_led + _pause 'Check [PSU2 LED] = Green and Press [Enter] key to continue...' + #PSU2 led (amber) + _i2c_reset_led + COLOR_LED="amber" + _i2c_psu2_led + _pause 'Check [PSU2 LED] = Amber and Press [Enter] key to continue...' + + #Turn OFF All LED + _i2c_reset_led + _pause 'Check turn off all LEDs and Press [Enter] key to continue...' +} + +#Set QSFP Port variable +function _qsfp_port_i2c_var_set { + #global variables + cpld_group=0 + cpld_i2c_bus=0 + cpld_i2c_addr=$I2C_ADDR_CPLD + cpld_qsfp_status_reg_offset=0 + cpld_qsfp_mode_reg_offset=0 + + #local variables + local i=0 + local port=$1 + local port_group=$(( (port - 1)/8 )) + + case ${port_group} in + 0) + #the i2c expander base bus num to read qsfp eeprom + eeprombusbase=${NUM_MUX_9548_QSFP_0_CHAN[0]} + ;; + 1) + eeprombusbase=${NUM_MUX_9548_QSFP_1_CHAN[0]} + ;; + 2) + eeprombusbase=${NUM_MUX_9548_QSFP_2_CHAN[0]} + ;; + 3) + eeprombusbase=${NUM_MUX_9548_QSFP_3_CHAN[0]} + ;; + 4) + eeprombusbase=${NUM_MUX_9548_QSFP_4_CHAN[0]} + ;; + 5) + eeprombusbase=${NUM_MUX_9548_QSFP_5_CHAN[0]} + ;; + 6) + eeprombusbase=${NUM_MUX_9548_QSFP_6_CHAN[0]} + ;; + 7) + eeprombusbase=${NUM_MUX_9548_QSFP_7_CHAN[0]} + ;; + *) + echo "Please input 1~${PORT_NUM}" + exit + ;; + esac + + #set cpld_group and cpld_i2c_bus according to port + for ((i=0; i<5; ++i)) + do + if (("${port}" <= "${CPLD_QSFP_GROUP[i]}")); + then + local port_offset=0 + cpld_group=$i + cpld_i2c_bus=${NUM_MUX_9548_CPLD_CHAN[i]} + + if ((i>0)) + then + port_offset=$(( port - CPLD_QSFP_GROUP[i-1] )) + else + port_offset=$port + fi + cpld_qsfp_status_reg_offset=$((CPLD_QSFP_STATUS_REG_BASE + port_offset)) + cpld_qsfp_mode_reg_offset=$((CPLD_QSFP_MODE_SELECT_REG_BASE + port_offset)) + + break + fi + done +} + +function _i2c_get { + local i2c_bus=$1 + local i2c_addr=$2 + local reg=$3 + echo `i2cget -y ${i2c_bus} ${i2c_addr} ${reg}` +} + +function _i2c_set { + local i2c_bus=$1 + local i2c_addr=$2 + local reg=$3 + local mask=$4 + local value=$5 + + echo `i2cset -m $mask -y -r ${i2c_bus} ${i2c_addr} ${reg} ${value}` +} + +#Set QSFP Port variable +function _qsfp_eeprom_var_set { + #local variables + local port=$1 + + #global variables + eeprombusidx=$(( (port - 1)%8 )) + + case $eeprombusidx in + 0) + eeprombus=$(( $eeprombusbase + 0 )) + ;; + 1) + eeprombus=$(( $eeprombusbase + 1 )) + ;; + 2) + eeprombus=$(( $eeprombusbase + 2 )) + ;; + 3) + eeprombus=$(( $eeprombusbase + 3 )) + ;; + 4) + eeprombus=$(( $eeprombusbase + 4 )) + ;; + 5) + eeprombus=$(( $eeprombusbase + 5 )) + ;; + 6) + eeprombus=$(( $eeprombusbase + 6 )) + ;; + 7) + eeprombus=$(( $eeprombusbase + 7 )) + ;; + esac + eepromAddr=${I2C_ADDR_QSFP_EEPROM} +} + +#Get QSFP EEPROM Information +function _i2c_qsfp_eeprom_get { + local value=0 + local status=0 + + echo "=========================================================" + echo "# Description: QSFP EEPROM GET" + echo "=========================================================" + + #status: 0 -> Down, 1 -> Up + _i2c_qsfp_signal_get ${QSFP_PORT} ${CPLD_QSFP_ABS} + + value=$qsfp_signal + status=$(( value?0:1 )) + + if [ $status = 0 ]; then + echo "[Fail] QSFP ${QSFP_PORT} is not present" + exit + fi + + echo "------------------------------" + cat ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/eeprom | hexdump -C +} + +#Init QSFP EEPROM +function _i2c_qsfp_eeprom_init { + echo "=========================================================" + echo "# Description: QSFP EEPROM INIT" + echo "=========================================================" + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init EEPROM + local i + for (( i=1; i<=${PORT_NUM}; i++ )) + do + _qsfp_port_i2c_var_set ${i} + + _qsfp_eeprom_var_set ${i} + + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr) ]; then + echo "sff8436 $eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eeprombus/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr) ]; then + echo "$eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eeprombus/delete_device + fi + done +} + +#get qsfp singals (ABS, INT, RST, LP) from CPLD +function _i2c_qsfp_signal_get { + local port=$1 #port start from 1 + local signal=$2 + local attr_file="" + local phy_port=0 + local active="low_active" + + #global + qsfp_signal=0 + qsfp_signals=0 + + #verify port + if [ -z "${port}" ]; then + echo "No port, skip" + return + fi + + #verify port + if (( $port < 1 || $port > $PORT_NUM )) ; then + echo "invalid port, skip" + fi + + #get physical port + phy_port=$(_port_logic2phy $port) + + _qsfp_port_i2c_var_set ${phy_port} + _qsfp_eeprom_var_set ${phy_port} + + #verify signal + if [ -z "${signal}" ]; then + echo "No signal, skip" + return + elif [ "${signal}" == "${CPLD_QSFP_ABS}" ]; then + attr_file="qsfp_modprs" + elif [ "${signal}" == "${CPLD_QSFP_INT}" ]; then + attr_file="qsfp_int" + elif [ "${signal}" == "${CPLD_QSFP_RST}" ]; then + attr_file="qsfp_reset" + elif [ "${signal}" == "${CPLD_QSFP_LP}" ]; then + attr_file="qsfp_lpmode" + active="high_active" + else + echo "invalid signal ${signal}, skip" + return + fi + + mask=${BIT_MASK[bit_shift]} + + #signals of all ports + qsfp_signals=`cat ${PATH_SYS_CPLD}/${attr_file}` + #signal of single port + qsfp_signal=$(( (qsfp_signals >> (phy_port-1)) & 0x1)) + #print signals + printf "[port]=%d, [signal]=%s, [value]=%d (${active}), [qsfp_signals]=%016x\n" $port $signal $qsfp_signal $qsfp_signals +} + +#set qsfp singals (RST, LP) via CPLD +function _i2c_qsfp_signal_set { + local port=$1 #port start from 1 + local signal=$2 + local value=$3 + local values_ori=0 + local value_ori=0 + local values=0 + local attr_file="" + + #verify port + if [ -z "${port}" ]; then + echo "No port, skip" + return + fi + + #verify port + if (( $port < 1 || $port > $PORT_NUM )) ; then + echo "invalid port, skip" + fi + + #verify signal + if [ -z "${signal}" ]; then + echo "No signal, skip" + return + elif [ "${signal}" == "${CPLD_QSFP_RST}" ]; then + attr_file="qsfp_reset" + elif [ "${signal}" == "${CPLD_QSFP_LP}" ]; then + attr_file="qsfp_lpmode" + else + echo "invalid signal ${signal}, skip" + return + fi + + #get current signal values + _i2c_qsfp_signal_get $port $signal + value_ori=$qsfp_signal + values_ori=$qsfp_signals + + #if signal value is not changed, return + if [ "${value}" == "${value_ori}" ]; then + echo "value not changed, skip set operation" + return + fi + + #toggle the bit for update + values=$(( values_ori ^ (1 << (port-1)))) + + #set value to register + echo "$(printf "%016x" $values)" > ${PATH_SYS_CPLD}/${attr_file} + + #get updated signal values + _i2c_qsfp_signal_get $port $signal + values=$qsfp_signals + + #result + printf "Before: %016x\n" $values_ori + printf "After: %016x\n" $values +} + +#Init EEPROM +function _i2c_eeprom_init { + local i2c_bus=$1 + local i2c_addr=$2 + local action=$3 + local desc=$4 + local sys_i2c_dev=$PATH_SYS_I2C_DEVICES + + echo -n "${desc} EEPROM INIT" + + #Action check + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init EEPROM + if [ "${action}" == "new" ] && \ + ! [ -L ${sys_i2c_dev}/${i2c_bus}-$(printf "%04x" $i2c_addr) ]; then + echo "mb_eeprom ${i2c_addr}" > ${sys_i2c_dev}/i2c-${i2c_bus}/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${sys_i2c_dev}/${i2c_bus}-$(printf "%04x" $i2c_addr) ]; then + echo "${i2c_addr}" > ${sys_i2c_dev}/i2c-${i2c_bus}/delete_device + fi + echo "DONE" +} + +#Init Main Board EEPROM +function _i2c_mb_eeprom_init { + local action=$1 + local i2c_bus=$I2C_BUS_MB_EEPROM + local i2c_addr=$I2C_ADDR_MB_EEPROM + local desc="Main Board" + + _i2c_eeprom_init $i2c_bus $i2c_addr $action $desc +} + +#Init CPU EEPROM +function _i2c_cpu_eeprom_init { + local action=$1 + local i2c_bus=$I2C_BUS_CPU_EEPROM + local i2c_addr=$I2C_ADDR_CPU_EEPROM + local desc="CPU Board" + + _i2c_eeprom_init $i2c_bus $i2c_addr $action $desc +} + +#get QSFP Status +function _i2c_qsfp_status_get { + local value=0 + local status=0 + + #status: 0 -> Down, 1 -> Up + _i2c_qsfp_signal_get ${QSFP_PORT} ${CPLD_QSFP_ABS} + value=$qsfp_signal + status=$(( value?0:1 )) + echo "status=$status" +} + +#get QSFP Type +function _i2c_qsfp_type_get { + local phy_port=0 + local value=0 + local status=0 + + echo "=========================================================" + echo "# Description: QSFP TYPE Get" + echo "=========================================================" + + phy_port=$(_port_logic2phy ${QSFP_PORT}) + _qsfp_port_i2c_var_set ${phy_port} + _qsfp_eeprom_var_set ${phy_port} + + #get abs signal + _i2c_qsfp_signal_get ${QSFP_PORT} ${CPLD_QSFP_ABS} + value=$qsfp_signal + status=$(( value?0:1 )) + + #check qsfp is present + if [ $status = 0 ]; then + echo "[Fail] QSFP ${QSFP_PORT} is not present" + exit + fi + + #Get QSFP EEPROM info + if [ ! -e "${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf '%04x' $eepromAddr)/eeprom" ]; then + echo "FAIL, qsfp eeprom file does not exist. " + echo "qsfp eeprom file path: ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf '%04x' $eepromAddr)/eeprom" + return + fi + + qsfp_info=$(base64 ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/eeprom) + + identifier=$(echo $qsfp_info | base64 -d -i | hexdump -s 128 -n 1 -e '"%x"') + connector=$(echo $qsfp_info | base64 -d -i | hexdump -s 130 -n 1 -e '"%x"') + transceiver=$(echo $qsfp_info | base64 -d -i | hexdump -s 131 -n 1 -e '"%x"') + + echo "------------------------------" + echo "identifier = $identifier" + echo "connector = $connector" + echo "transceiver = $transceiver" +} + +#Init PSU Kernel Module +function _i2c_psu_init { + echo "=========================================================" + echo "# Description: I2C PSU Init" + echo "=========================================================" + modprobe ingrasys_s9200_64x_psu + + echo "psu1 ${I2C_ADDR_PSU_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU1_EEPROM}/new_device + echo "psu2 ${I2C_ADDR_PSU_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU2_EEPROM}/new_device +} + +#Get PSU EEPROM Information +function _i2c_psu_eeprom_get { + local eeprom_psu1="" + local eeprom_psu2="" + + echo "=========================================================" + echo "# Description: I2C PSU EEPROM Get..." + echo "=========================================================" + + echo "PUS1 EEPROM" + eeprom_psu1="${PATH_SYSFS_PSU1}/psu_eeprom" + cat ${eeprom_psu1} | hexdump -C + + echo "------------------------------" + echo "PUS2 EEPROM" + eeprom_psu2="${PATH_SYSFS_PSU2}/psu_eeprom" + cat ${eeprom_psu2} | hexdump -C +} + +#Get MotherBoard EEPROM Information +function _i2c_mb_eeprom_get { + local path_i2c_dev=${PATH_SYS_I2C_DEVICES} + local i2c_bus=${I2C_BUS_MB_EEPROM} + local i2c_addr=${I2C_ADDR_MB_EEPROM} + echo "=========================================================" + echo "# Description: I2C MB EEPROM Get" + echo "=========================================================" + + ## MB EEPROM + cat ${path_i2c_dev}/${i2c_bus}-$(printf "%04x" ${i2c_addr})/eeprom | hexdump -v -C +} + +#Get CPU EEPROM Information +function _i2c_cpu_eeprom_get { + local path_i2c_dev=${PATH_SYS_I2C_DEVICES} + local i2c_bus=${I2C_BUS_CPU_EEPROM} + local i2c_addr=${I2C_ADDR_CPU_EEPROM} + echo "=========================================================" + echo "# Description: I2C CPU EEPROM Get" + echo "=========================================================" + + ## CPU EEPROM + cat ${path_i2c_dev}/${i2c_bus}-$(printf "%04x" ${i2c_addr})/eeprom | hexdump -v -C +} + +#Set FAN Tray LED +function _i2c_fan_tray_led { + local value=0 + + echo "=========================================================" + echo "# Description: Set Fan Tray LED" + echo "=========================================================" + + case ${FAN_TRAY} in + 1) + ioPort=$REG_OUT_0 + if [ "${COLOR_LED}" == "green" ]; then + mask=${BIT_MASK[0]} + elif [ "${COLOR_LED}" == "amber" ]; then + mask=${BIT_MASK[1]} + fi + ;; + 2) + ioPort=$REG_OUT_0 + if [ "${COLOR_LED}" == "green" ]; then + mask=${BIT_MASK[4]} + elif [ "${COLOR_LED}" == "amber" ]; then + mask=${BIT_MASK[5]} + fi + ;; + 3) + ioPort=$REG_OUT_1 + if [ "${COLOR_LED}" == "green" ]; then + mask=${BIT_MASK[0]} + elif [ "${COLOR_LED}" == "amber" ]; then + mask=${BIT_MASK[1]} + fi + ;; + 4) + ioPort=$REG_OUT_1 + if [ "${COLOR_LED}" == "green" ]; then + mask=${BIT_MASK[4]} + elif [ "${COLOR_LED}" == "amber" ]; then + mask=${BIT_MASK[5]} + fi + ;; + *) + echo "Please input 1~4" + exit + ;; + esac + + if [ "${ONOFF_LED}" == "on" ]; then + value=0xFF + elif [ "${ONOFF_LED}" == "off" ]; then + value=0x00 + else + echo "Invalid Parameters ${ONOFF_LED}, Exit!!!" + _help + exit ${FALSE} + fi + i2cset -m $mask -y -r ${I2C_BUS_FAN_BOARD} ${I2C_ADDR_FAN_BOARD} $ioPort $value + +} + +#Set System Status LED +function _i2c_sys_led { + local value=0 + local mask=${BIT_MASK[0]} + + if [ "${COLOR_LED}" == "green" ]; then + value=0xFF + elif [ "${COLOR_LED}" == "amber" ]; then + value=0x00 + else + echo "Invalid Parameters ${COLOR_LED}, Exit!!!" + _help + exit ${FALSE} + fi + + _i2c_set_led $value $mask +} + +#Set FAN LED +function _i2c_fan_led { + local value=0 + local mask=${BIT_MASK[2]} + + if [ "${COLOR_LED}" == "green" ]; then + value=0x00 + elif [ "${COLOR_LED}" == "amber" ]; then + value=0xFF + else + echo "Invalid Parameters ${COLOR_LED}, Exit!!!" + _help + exit ${FALSE} + fi + + _i2c_set_led $value $mask +} + +#Set PSU1 LED +function _i2c_psu1_led { + local value=0 + local mask=${BIT_MASK[3]} + + if [ "${COLOR_LED}" == "green" ]; then + value=0x00 + elif [ "${COLOR_LED}" == "amber" ]; then + value=0xFF + else + echo "Invalid Parameters ${COLOR_LED}, Exit!!!" + _help + exit ${FALSE} + fi + + _i2c_set_led $value $mask +} + +#Set PSU2 LED +function _i2c_psu2_led { + local reg=${REG_OUT_0} + local value=0 + local mask=${BIT_MASK[4]} + + if [ "${COLOR_LED}" == "green" ]; then + value=0x00 + elif [ "${COLOR_LED}" == "amber" ]; then + value=0xFF + else + echo "Invalid Parameters ${COLOR_LED}, Exit!!!" + _help + exit ${FALSE} + fi + + _i2c_set_led $value $mask +} + +#Set LEDs in LED Board +function _i2c_set_led { + local value=$1 + local mask=$2 + local reg=${REG_OUT_0} + local i2c_bus=$I2C_BUS_LED_BOARD + local i2c_addr=$I2C_ADDR_LED_BOARD + + _i2c_set $i2c_bus $i2c_addr $reg $mask $value +} + +#Reset all system leds +function _i2c_reset_led { + local mask=0xFF + local value=$((2#00000011)) + local reg=${REG_OUT_0} + local i2c_bus=$I2C_BUS_LED_BOARD + local i2c_addr=$I2C_ADDR_LED_BOARD + + _i2c_set $i2c_bus $i2c_addr $reg $mask $value +} + +#Get Mother Board Version and Type +function _i2c_board_type_get { + echo "=========================================================" + echo "# Description: I2C MB Board Type Get" + echo "=========================================================" + local i2c_bus=${I2C_BUS_ID_GPIO} + local i2c_addr=${I2C_ADDR_ID_GPIO} + local reg=${REG_IN_1} + local value=0 + + value=$(_i2c_get $i2c_bus $i2c_addr $reg) + + #Bit 0-1 + boardBuildRev=$((value & 0x03)) + #Bit 2-3 + boardHwRev=$((value >> 2 & 0x03)) + #Bit 4-7 + boardId=$((value>>4)) + printf "[MB BOARD_ID] = 0x%02x, [HW Rev] = %d, [Build Rev] = %d\n" $boardId $boardHwRev $boardBuildRev +} + +#Get Board Version and Type from Dummy BMC Board +function _i2c_bmc_board_type_get { + echo "=========================================================" + echo "# Description: I2C BMC Board Type Get" + echo "=========================================================" + + local i2c_bus=${I2C_BUS_BMC_BOARD_TYPE} + local i2c_addr=${I2C_ADDR_BMC_BOARD_TYPE} + local reg=${REG_IN_1} + local value=0 + + value=$(_i2c_get $i2c_bus $i2c_addr $reg) + + #Bit 0-1 + boardBuildRev=$((($value) & 0x03)) + #Bit 2-3 + boardHwRev=$((($value) >> 2 & 0x03)) + #Bit 4-7 + boardId=$((($value) >> 4)) + printf "[BMC BOARD_ID] = 0x%02x, [HW Rev] = %d, [Build Rev] = %d\n" $boardId $boardHwRev $boardBuildRev +} + +#Get CPLD Version +function _i2c_cpld_version { + echo "=========================================================" + echo "# Description: CPLD Version" + echo "=========================================================" + cat ${PATH_SYS_CPLD}/cpld_version +} + +#Get PSU Status +function _i2c_psu_status { + local psu_abs="" + + psu1PwGood=`cat ${PATH_SYSFS_PSU1}/psu_pg` + psu_abs=`cat ${PATH_SYSFS_PSU1}/psu_abs` + if [ "$psu_abs" == "0" ]; then + psu1Exist=1 + else + psu1Exist=0 + fi + + psu2PwGood=`cat ${PATH_SYSFS_PSU2}/psu_pg` + psu_abs=`cat ${PATH_SYSFS_PSU2}/psu_abs` + if [ "$psu_abs" == "0" ]; then + psu2Exist=1 + else + psu2Exist=0 + fi + + printf "PSU1 Exist:%x PSU1 PW Good:%d\n" $psu1Exist $psu1PwGood + printf "PSU2 Exist:%d PSU2 PW Good:%d\n" $psu2Exist $psu2PwGood +} + +#Set 10G Mux to CPU or Front Panel +function _i2c_10g_mux { + + echo "=========================================================" + echo "# Description: 10G Mux" + echo "=========================================================" + + local target=${TARGET_10G_MUX} + local i2c_bus=${I2C_BUS_10GMUX} + local i2c_addr=${I2C_ADDR_10GMUX} + local reg=0 + local mask=0xff + local value=0 + local file_10g_mux="${PATH_SYS_CPLD}/cpld_10g_mux" + + #get current 10g mux register value on CPLD + value=`cat ${file_10g_mux}` + + if [ "${target}" == "cpu" ]; then + #Set XE0: slave address access + _i2c_set $i2c_bus $i2c_addr 0x06 $mask 0x18 + #Set XE0: CH4 D_IN0-S_OUTA0 EQ + _i2c_set $i2c_bus $i2c_addr 0x2c $mask 0x00 + #Set XE0: CH5 NC-S_OUTB0 DEM + _i2c_set $i2c_bus $i2c_addr 0x35 $mask 0x80 + #Set XE0: CH5 NC-S_OUTB0 VOD + _i2c_set $i2c_bus $i2c_addr 0x34 $mask 0xab + #Set XE0: CH1 D_OUT0-S_INB0 EQ + _i2c_set $i2c_bus $i2c_addr 0x16 $mask 0x01 + #Set XE0: CH1 D_OUT0-S_INB0 DEM + _i2c_set $i2c_bus $i2c_addr 0x18 $mask 0x80 + #Set XE0: CH1 D_OUT0-S_INB0 VOD + _i2c_set $i2c_bus $i2c_addr 0x17 $mask 0xab + #Set XE1: CH6 D_IN1-S_OUTA1 EQ + _i2c_set $i2c_bus $i2c_addr 0x3a $mask 0x00 + #Set XE1: CH7 NC-S_OUTB1 EQ + _i2c_set $i2c_bus $i2c_addr 0x41 $mask 0x00 + #Set XE1: CH7 NC-S_OUTB1 DEM + _i2c_set $i2c_bus $i2c_addr 0x43 $mask 0x80 + #Set XE1: CH7 NC-S_OUTB1 VOD + _i2c_set $i2c_bus $i2c_addr 0x42 $mask 0xab + #Set XE1: CH3 D_OUT1-S_INB1 EQ + _i2c_set $i2c_bus $i2c_addr 0x24 $mask 0x01 + #Set XE1: CH3 D_OUT1-S_INB1 DEM + _i2c_set $i2c_bus $i2c_addr 0x26 $mask 0x80 + #Set XE1: CH3 D_OUT1-S_INB1 VOD + _i2c_set $i2c_bus $i2c_addr 0x25 $mask 0xab + #Enable auto negotiation of XE ports + eval "bcmcmd 'port xe0,xe1 an=1 if=kr en=1'" + #delay 1 sec + sleep 1 + + #switch 10G MUX to cpu on CPLD + value=$(( value & 0xf3 )) + echo "$(printf "%x" ${value})" > ${file_10g_mux} + + echo "Switch 10G Mux to [CPU]" + + elif [ "${COLOR_LED}" == "fp" ]; then + #Set XE0: slave address access + _i2c_set $i2c_bus $i2c_addr 0x06 $mask 0x18 + #Set XE0: CH4 D_IN0-S_OUTA0 EQ + _i2c_set $i2c_bus $i2c_addr 0x2c $mask 0x00 + #Set XE0: CH4 D_IN0-S_OUTA0 DEM + _i2c_set $i2c_bus $i2c_addr 0x2e $mask 0x80 + #Set XE0: CH4 D_IN0-S_OUTA0 VOD + _i2c_set $i2c_bus $i2c_addr 0x2d $mask 0xab + #Set XE0: CH0 NC-S_INA0 EQ + _i2c_set $i2c_bus $i2c_addr 0x0f $mask 0x00 + #Set XE0: CH1 D_OUT0-S_INB0 DEM + _i2c_set $i2c_bus $i2c_addr 0x18 $mask 0x80 + #Set XE0: CH1 D_OUT0-S_INB0 VOD + _i2c_set $i2c_bus $i2c_addr 0x17 $mask 0xab + #Set XE1: CH6 D_IN1-S_OUTA1 EQ + _i2c_set $i2c_bus $i2c_addr 0x3a $mask 0x00 + #Set XE1: CH6 D_IN1-S_OUTA1 DEM + _i2c_set $i2c_bus $i2c_addr 0x3c $mask 0x80 + #Set XE1: CH6 D_IN1-S_OUTA1 VOD + _i2c_set $i2c_bus $i2c_addr 0x3b $mask 0xab + #Set XE1: CH2 NC-S_INA1 EQ + _i2c_set $i2c_bus $i2c_addr 0x1d $mask 0x00 + #Set XE1: CH3 D_OUT1-S_INB1 DEM + _i2c_set $i2c_bus $i2c_addr 0x26 $mask 0x80 + #Set XE1: CH3 D_OUT1-S_INB1 VOD + _i2c_set $i2c_bus $i2c_addr 0x25 $mask 0xab + #Enable auto negotiation of XE ports + eval "bcmcmd 'port xe0,xe1 an=0 if=kr en=1'" + #delay 1 sec + sleep 1 + + #switch 10G MUX to front panel on CPLD + value=$(( value | 0x0c )) + echo "$(printf "%x" ${value})" > ${file_10g_mux} + + echo "Switch 10G Mux to [Front Panel]" + else + echo "invalid target, please set target to cpu/fp" + fi +} + +#Increase read socket buffer for CoPP Test +function _config_rmem { + echo "109430400" > /proc/sys/net/core/rmem_max +} + +#Main Function +function _main { + start_time_str=`date` + start_time_sec=$(date +%s) + + if [ "${EXEC_FUNC}" == "help" ]; then + _help + elif [ "${EXEC_FUNC}" == "i2c_init" ]; then + _i2c_init + elif [ "${EXEC_FUNC}" == "i2c_deinit" ]; then + _i2c_deinit + elif [ "${EXEC_FUNC}" == "i2c_temp_init" ]; then + _i2c_temp_init + elif [ "${EXEC_FUNC}" == "i2c_fan_init" ]; then + _i2c_fan_init + elif [ "${EXEC_FUNC}" == "i2c_volmon_init" ]; then + _i2c_volmon_init + elif [ "${EXEC_FUNC}" == "i2c_io_exp_init" ]; then + _i2c_io_exp_init + elif [ "${EXEC_FUNC}" == "i2c_led_test" ]; then + _i2c_led_test + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_get" ]; then + _i2c_mb_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_cpu_eeprom_get" ]; then + _i2c_cpu_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_psu_eeprom_get" ]; then + _i2c_psu_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_get" ]; then + _i2c_qsfp_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_init" ]; then + _i2c_qsfp_eeprom_init ${QSFP_INIT_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_init" ]; then + _i2c_mb_eeprom_init ${MB_EEPROM_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_cpu_eeprom_init" ]; then + _i2c_cpu_eeprom_init ${MB_EEPROM_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_qsfp_status_get" ]; then + _i2c_qsfp_status_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_type_get" ]; then + _i2c_qsfp_type_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_signal_get" ]; then + _i2c_qsfp_signal_get ${QSFP_PORT} ${QSFP_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_qsfp_signal_set" ]; then + _i2c_qsfp_signal_set ${QSFP_PORT} ${QSFP_ACTION} ${QSFP_VALUE} + elif [ "${EXEC_FUNC}" == "i2c_led_psu_status_set" ]; then + _i2c_led_psu_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_status_set" ]; then + _i2c_led_fan_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_tray_status_set" ]; then + _i2c_led_fan_tray_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_tray_test" ]; then + _i2c_led_fan_tray_test + elif [ "${EXEC_FUNC}" == "i2c_sys_led" ]; then + _i2c_sys_led + elif [ "${EXEC_FUNC}" == "i2c_fan_led" ]; then + _i2c_fan_led + elif [ "${EXEC_FUNC}" == "i2c_fan_tray_led" ]; then + _i2c_fan_tray_led + elif [ "${EXEC_FUNC}" == "i2c_psu1_led" ]; then + _i2c_psu1_led + elif [ "${EXEC_FUNC}" == "i2c_psu2_led" ]; then + _i2c_psu2_led + elif [ "${EXEC_FUNC}" == "i2c_board_type_get" ]; then + _i2c_board_type_get + elif [ "${EXEC_FUNC}" == "i2c_bmc_board_type_get" ]; then + _i2c_bmc_board_type_get + elif [ "${EXEC_FUNC}" == "i2c_cpld_version" ]; then + _i2c_cpld_version + elif [ "${EXEC_FUNC}" == "i2c_psu_status" ]; then + _i2c_psu_status + elif [ "${EXEC_FUNC}" == "i2c_test_all" ]; then + _i2c_deinit + _i2c_init + _i2c_led_test + _i2c_psu_eeprom_get + _i2c_mb_eeprom_get + _i2c_cpu_eeprom_get + _i2c_board_type_get + _i2c_bmc_board_type_get + _i2c_cpld_version + _i2c_psu_status + elif [ "${EXEC_FUNC}" == "i2c_10g_mux" ]; then + _i2c_10g_mux + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + if [ "$DEBUG" == "on" ]; then + echo "-----------------------------------------------------" + end_time_str=`date` + end_time_sec=$(date +%s) + diff_time=$[ ${end_time_sec} - ${start_time_sec} ] + echo "Start Time: ${start_time_str} (${start_time_sec})" + echo "End Time : ${end_time_str} (${end_time_sec})" + echo "Total Execution Time: ${diff_time} sec" + + echo "done!!!" + fi +} + +_main diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/utils/qsfp_monitor.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/utils/qsfp_monitor.sh new file mode 100755 index 00000000000..51c49c1152f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/utils/qsfp_monitor.sh @@ -0,0 +1,104 @@ +#!/bin/bash +# Copyright (C) 2017 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=3 +I2C_UTILS="/usr/sbin/i2c_utils.sh" +QSFP_SI_SCRIPT="/usr/sbin/qsfp_si_cfg.sh" +QSFP_ARRAY=(0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 \ + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + +#QSFP SI monitor +function _qsfp_si_monitor { + local i + local status + for i in {0..63}; + do + status=`${I2C_UTILS} i2c_qsfp_status_get $(expr $i + 1) | egrep '^status=.*$' | sed -e 's/status=//g'` + if [ "${status}" == "1" ]; then + _qsfp_type_check $i + fi + done +} + +#QSFP type +function _qsfp_type_check { + local port=$1 + local qsfp_type=`${I2C_UTILS} i2c_qsfp_type_get $(expr $port + 1) ` + local identifier=`echo "$qsfp_type" | egrep -o 'identifier = .*$' | sed -e 's/identifier = //g'` + if [ "${identifier}" == "11" ]; then + connector=`echo "$qsfp_type" | egrep -o 'connector = .*$' | sed -e 's/connector = //g'` + case ${connector} in + 21|23) + #DAC + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to DAC" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} dac $port >/dev/null + fi + ;; + *) + #Optical + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to Optical" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} optical $port >/dev/null + fi + ;; + esac + fi +} + +#Docker exist check +function _docker_swss_check { + while true + do + # Check if syncd starts + result=`docker exec -i swss bash -c "echo -en \"SELECT 1\\nHLEN HIDDEN\" | redis-cli | sed -n 2p"` #TBD FIX ME + if [ "$result" == "3" ]; then + return + fi + sleep $INTERVAL + done +} + +#Docker exist check +function _qsfp_si_cfg_script_check { + + if [ -f ${QSFP_SI_SCRIPT} ] && [ -x ${QSFP_SI_SCRIPT} ]; then + echo "SI Script exists. Start monitor." + return + else + echo "SI Script not exist. Exit monitor." + exit + fi +} + +# main function +function _main { + #Check SI Script + _qsfp_si_cfg_script_check + #Check docker swss is running + _docker_swss_check + while true + do + _qsfp_si_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/utils/qsfp_si_cfg.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/utils/qsfp_si_cfg.sh new file mode 100755 index 00000000000..ba59c50ca7b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/utils/qsfp_si_cfg.sh @@ -0,0 +1,230 @@ +#!/bin/bash +# Copyright (C) 2017 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +VERSION="1.0.0" +TRUE=200 +FALSE=404 + +TYPE=${1} +PORT=${2} + +#FIXME update SI values +#QSFP Optical +function _qsfp_optical_si_set { + local idx=0 + #FIXME + local si=(11 68 13 15 68 15 11 68 9 11 68 13 + 11 68 17 11 68 13 13 68 11 11 68 15 + 11 68 13 11 68 17 11 68 17 13 68 13 + 11 68 15 11 68 9 11 68 9 11 68 7 + 9 68 13 13 68 7 11 68 7 11 68 11 + 11 68 13 11 68 13 9 68 7 11 68 11 + 11 68 9 11 68 15 11 68 9 11 68 9 + 11 68 9 11 68 7 11 68 9 11 68 9 + 13 68 9 13 68 13 13 68 7 13 68 11 + 13 68 5 13 68 11 13 68 5 13 68 11 + + 11 68 3 11 68 9 11 68 5 11 68 13 + 11 68 9 11 68 9 11 68 11 13 68 5 + 13 68 3 11 68 7 11 68 5 11 68 9 + 11 68 9 13 68 9 13 68 1 11 68 11 + 5 68 1 11 68 7 11 68 1 13 68 3 + 11 68 5 11 68 3 11 68 7 11 68 3 + 11 68 3 13 68 11 13 68 1 13 68 3 + 11 68 1 13 68 1 13 68 1 11 68 7 + 11 68 1 11 68 5 11 68 1 9 68 5 + 5 68 1 13 68 1 11 68 5 11 68 3 + + 11 68 1 11 68 11 11 68 1 13 68 7 + 13 68 1 15 68 1 11 68 1 13 68 7 + 13 68 1 11 68 5 11 68 1 11 68 1 + 11 68 5 13 68 3 11 68 5 9 68 1 + 11 68 5 13 68 5 13 68 1 11 68 9 + 13 68 1 11 68 13 13 68 1 11 68 7 + 11 68 1 11 68 1 9 68 1 11 68 1 + 11 68 1 11 68 1 11 68 5 11 68 1 + 13 68 1 11 68 11 11 68 1 11 68 1 + 11 68 1 11 68 15 11 68 1 13 68 5 + + 11 68 1 11 68 1 9 68 1 13 68 1 + 11 68 1 11 68 1 9 68 1 11 68 1 + 11 68 1 13 68 3 11 68 1 13 68 1 + 11 68 1 13 68 1 11 68 1 11 68 13 + 11 68 1 11 68 1 11 68 1 11 68 1 + 11 68 11 11 68 1 13 68 1 11 68 1 + 11 68 1 11 68 9 11 68 1 11 68 7 + 11 68 1 13 68 1 13 68 1 11 68 1 + 11 68 1 11 68 5 11 68 1 13 68 3 + 11 68 3 9 68 1 11 68 3 11 68 1 + + 11 68 7 11 68 9 11 68 1 11 68 9 + 11 68 3 11 68 15 11 68 3 9 68 9 + 9 68 1 11 68 3 11 68 1 11 68 5 + 11 68 5 5 68 5 11 68 5 11 68 1 + 13 68 5 13 68 5 11 68 1 11 68 9 + 11 68 1 11 68 1 11 68 1 13 68 7 + 11 68 1 11 68 5 11 68 1 11 68 3 + 11 68 5 11 68 1 11 68 5 11 68 1 + 11 68 3 11 68 7 11 68 3 11 68 9 + 11 68 1 13 68 7 11 68 1 9 68 9 + + 13 68 1 11 68 5 11 68 3 13 68 5 + 11 68 7 11 68 11 13 68 5 9 68 5 + 11 68 5 11 68 13 13 68 7 11 68 13 + 11 68 7 11 68 11 11 68 5 11 68 11 + 11 68 11 11 68 11 11 68 7 11 68 11 + 11 68 13 11 68 11 11 68 9 15 68 9 + 11 68 11 11 68 5 11 68 7 13 68 11 + 11 68 9 13 68 17 11 68 7 11 68 13 + 11 68 11 11 68 17 11 68 13 11 68 15 + 13 68 9 13 68 11 11 68 11 13 68 7 + + 11 68 13 13 68 9 11 68 9 11 68 9 + 11 68 19 11 68 15 11 68 9 11 68 11 + 13 68 13 13 68 17 13 68 11 11 68 11 + 13 68 9 13 68 13 11 68 11 11 68 9) + + idx=$(( PORT * 12 )) + #FIXEME + #for j in {0..3} + #do + # bcmcmd "phy ce${PORT} CL93N72_UT_CTL2r.${j} CL93N72_TXFIR_POST=${si[idx++]}; phy ce${PORT} CL93N72_UT_CTL3r.${j} CL93N72_TXFIR_MAIN=${si[idx++]}; phy ce${PORT} CL93N72_UT_CTL2r.${j} CL93N72_TXFIR_PRE=${si[idx++]};" + #done +} + +function _qsfp_dac_si_set { + local idx=0 + # each port has 4 lanes, each lane has 3 SI values (post,main,pre), total 4*3=12 + local port_si=12 + + #si[0]: txfir_post for port0 lane0 + #si[1]: txfir_main for port0 lane0 + #si[2]: txfir_pre for port0 lane0 + + #si[3]: txfir_post for port0 lane1 + #si[4]: txfir_main for port0 lane1 + #si[5]: txfir_pre for port0 lane1 + + local si=(11 68 13 15 68 15 11 68 9 11 68 13 + 11 68 17 11 68 13 13 68 11 11 68 15 + 11 68 13 11 68 17 11 68 17 13 68 13 + 11 68 15 11 68 9 11 68 9 11 68 7 + 9 68 13 13 68 7 11 68 7 11 68 11 + 11 68 13 11 68 13 9 68 7 11 68 11 + 11 68 9 11 68 15 11 68 9 11 68 9 + 11 68 9 11 68 7 11 68 9 11 68 9 + 13 68 9 13 68 13 13 68 7 13 68 11 + 13 68 5 13 68 11 13 68 5 13 68 11 + + 11 68 3 11 68 9 11 68 5 11 68 13 + 11 68 9 11 68 9 11 68 11 13 68 5 + 13 68 3 11 68 7 11 68 5 11 68 9 + 11 68 9 13 68 9 13 68 1 11 68 11 + 5 68 1 11 68 7 11 68 1 13 68 3 + 11 68 5 11 68 3 11 68 7 11 68 3 + 11 68 3 13 68 11 13 68 1 13 68 3 + 11 68 1 13 68 1 13 68 1 11 68 7 + 11 68 1 11 68 5 11 68 1 9 68 5 + 5 68 1 13 68 1 11 68 5 11 68 3 + + 11 68 1 11 68 11 11 68 1 13 68 7 + 13 68 1 15 68 1 11 68 1 13 68 7 + 13 68 1 11 68 5 11 68 1 11 68 1 + 11 68 5 13 68 3 11 68 5 9 68 1 + 11 68 5 13 68 5 13 68 1 11 68 9 + 13 68 1 11 68 13 13 68 1 11 68 7 + 11 68 1 11 68 1 9 68 1 11 68 1 + 11 68 1 11 68 1 11 68 5 11 68 1 + 13 68 1 11 68 11 11 68 1 11 68 1 + 11 68 1 11 68 15 11 68 1 13 68 5 + + 11 68 1 11 68 1 9 68 1 13 68 1 + 11 68 1 11 68 1 9 68 1 11 68 1 + 11 68 1 13 68 3 11 68 1 13 68 1 + 11 68 1 13 68 1 11 68 1 11 68 13 + 11 68 1 11 68 1 11 68 1 11 68 1 + 11 68 11 11 68 1 13 68 1 11 68 1 + 11 68 1 11 68 9 11 68 1 11 68 7 + 11 68 1 13 68 1 13 68 1 11 68 1 + 11 68 1 11 68 5 11 68 1 13 68 3 + 11 68 3 9 68 1 11 68 3 11 68 1 + + 11 68 7 11 68 9 11 68 1 11 68 9 + 11 68 3 11 68 15 11 68 3 9 68 9 + 9 68 1 11 68 3 11 68 1 11 68 5 + 11 68 5 5 68 5 11 68 5 11 68 1 + 13 68 5 13 68 5 11 68 1 11 68 9 + 11 68 1 11 68 1 11 68 1 13 68 7 + 11 68 1 11 68 5 11 68 1 11 68 3 + 11 68 5 11 68 1 11 68 5 11 68 1 + 11 68 3 11 68 7 11 68 3 11 68 9 + 11 68 1 13 68 7 11 68 1 9 68 9 + + 13 68 1 11 68 5 11 68 3 13 68 5 + 11 68 7 11 68 11 13 68 5 9 68 5 + 11 68 5 11 68 13 13 68 7 11 68 13 + 11 68 7 11 68 11 11 68 5 11 68 11 + 11 68 11 11 68 11 11 68 7 11 68 11 + 11 68 13 11 68 11 11 68 9 15 68 9 + 11 68 11 11 68 5 11 68 7 13 68 11 + 11 68 9 13 68 17 11 68 7 11 68 13 + 11 68 11 11 68 17 11 68 13 11 68 15 + 13 68 9 13 68 11 11 68 11 13 68 7 + + 11 68 13 13 68 9 11 68 9 11 68 9 + 11 68 19 11 68 15 11 68 9 11 68 11 + 13 68 13 13 68 17 13 68 11 11 68 11 + 13 68 9 13 68 13 11 68 11 11 68 9) + + # get first si index for this port + idx=$(( PORT * port_si )) + + # loop for 4 lanes + for j in {0..3} + do + bcmcmd "phy ce${PORT} CL93N72_UT_CTL2r.${j} CL93N72_TXFIR_POST=${si[idx++]}; phy ce${PORT} CL93N72_UT_CTL3r.${j} CL93N72_TXFIR_MAIN=${si[idx++]}; phy ce${PORT} CL93N72_UT_CTL2r.${j} CL93N72_TXFIR_PRE=${si[idx++]};" + done +} + +# Help usage function +function _help { + echo "=========================================================" + echo "# Description: Help Function" + echo "=========================================================" + echo "----------------------------------------------------" + echo "EX : ${0} help" + echo " : ${0} optical [0-63]" + echo " : ${0} dac [0-63]" + echo "----------------------------------------------------" +} + +#Main Function +function _main { + + if [ "${TYPE}" == "help" ]; then + _help + elif [ "${TYPE}" == "optical" ]; then + _qsfp_optical_si_set + elif [ "${TYPE}" == "dac" ]; then + _qsfp_dac_si_set + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi +} + +_main diff --git a/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/utils/s9200_64x_monitor.sh b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/utils/s9200_64x_monitor.sh new file mode 100755 index 00000000000..974da6d5001 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ingrasys/s9200-64x/utils/s9200_64x_monitor.sh @@ -0,0 +1,39 @@ +#!/bin/bash +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=5 +I2C_UTILS="/usr/sbin/i2c_utils.sh" + + +# LED status monitor +function _led_monitor { + ${I2C_UTILS} i2c_led_fan_status_set >/dev/null + ${I2C_UTILS} i2c_led_psu_status_set >/dev/null + ${I2C_UTILS} i2c_led_fan_tray_status_set >/dev/null +} + +# main function +function _main { + while true + do + _led_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-inventec/.gitignore b/platform/broadcom/sonic-platform-modules-inventec/.gitignore new file mode 100644 index 00000000000..2490baa9d1e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/.gitignore @@ -0,0 +1,59 @@ +# Prerequisites +*.d + +# Object files +*.o +*.ko +*.obj +*.elf + +# Linker output +*.ilk +*.map +*.exp + +# Precompiled Headers +*.gch +*.pch + +# Libraries +*.lib +*.a +*.la +*.lo + +# Shared objects (inc. Windows DLLs) +*.dll +*.so +*.so.* +*.dylib + +# Executables +*.exe +*.out +*.app +*.i*86 +*.x86_64 +*.hex + +# Debug files +*.dSYM/ +*.su +*.idb +*.pdb + +# Kernel Module Compile Results +*.mod* +*.cmd +.tmp_versions/ +modules.order +Module.symvers +Mkfile.old +dkms.conf + +# Debian packaging +*.debhelper.log +*.postinst.debhelper +*.postrm.debhelper +*.prerm.debhelper +*.substvars diff --git a/platform/broadcom/sonic-platform-modules-inventec/LICENSE b/platform/broadcom/sonic-platform-modules-inventec/LICENSE new file mode 100644 index 00000000000..9cecc1d4669 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/LICENSE @@ -0,0 +1,674 @@ + GNU GENERAL PUBLIC LICENSE + Version 3, 29 June 2007 + + Copyright (C) 2007 Free Software Foundation, Inc. + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The GNU General Public License is a free, copyleft license for +software and other kinds of works. + + The licenses for most software and other practical works are designed +to take away your freedom to share and change the works. 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But first, please read +. diff --git a/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/asic_monitor.py b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/asic_monitor.py new file mode 100755 index 00000000000..ba4c580a755 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/asic_monitor.py @@ -0,0 +1,124 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Inventec, Inc. +# +# Editor: James Huang ( Huang.James@inventec.com ) +# +""" +Usage: %(scriptName)s [options] command object + +Auto detecting the Chipset temperature and update + +options: + -h | --help : this help message + -d | --debug : run with debug mode + +""" + +try: + import os + import commands + import sys, getopt + import logging + import re + import time + import syslog + from invCommon import InvPlatform + from sonic_sfp.bcmshell import bcmshell + +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +args = [] +INV_REDWOOD_PLATFORM = "x86_64-inventec_d7032q28b-r0" +INV_CYPRESS_PLATFORM = "x86_64-inventec_d7054q28b-r0" +INV_SEQUOIA_PLATFORM = "x86_64-inventec_d7264q28b-r0" +INV_SEQUOIA_NEW_PLATFORM = "x86_64-inventec_d7264-r0" +INV_MAPLE_PLATFORM = "x86_64-inventec_d6356-r0" +INV_MAPLE_EVT1_PLATFORM = "x86_64-inventec_d6556-r0" +INV_MAPLE_J_PLATFORM = "x86_64-inventec_d6356j-r0" +INV_MAGNOLIA_PLATFORM = "x86_64-inventec_d6254qs-r0" + +PSOC_NAME = "name" +HWMON_PATH = "/sys/class/hwmon" +SWITCH_TEMP_FILE_NAME = "switch_tmp" + +def log_message( level, string ): + syslog.openlog("asic_monitor", syslog.LOG_PID, facility=syslog.LOG_DAEMON) + syslog.syslog( level, string ) + +class BCMUtil(bcmshell): + + asic_temperature = 0 + platform = None + + def get_platform(self): + if self.platform is None: + platfromObj = InvPlatform() + self.platform = platfromObj.get_platform() + return self.platform + + def get_asic_temperature( self ): + return self.asic_temperature + + def set_asic_temperature( self, temp ): + self.asic_temperature = temp + + def parsing_asic_temp(self): + content = self.run("show temp") + for line in content.split("\n"): + TempObject = re.search(r"(average current temperature is)\s+(?P\d+)\.(?P\d+)",line) + if TempObject is not None: + self.set_asic_temperature( int( TempObject.group("temperature_high") ) ) + + def execute_command(self, cmd): + return self.run(cmd) + + +def main(): + + global bcm_obj + bcm_obj = BCMUtil() + log_message( syslog.LOG_INFO, "Object initialed successfully" ) + + if bcm_obj.get_platform() == INV_MAPLE_PLATFORM or bcm_obj.get_platform() == INV_MAPLE_J_PLATFORM : + syslog.closelog() + del bcm_obj + exit(0) + + while 1 : + try: + bcm_obj.parsing_asic_temp() + for index in os.listdir(HWMON_PATH): + if SWITCH_TEMP_FILE_NAME in os.listdir("{0}/{1}".format(HWMON_PATH,index)) : + #print "echo {0} > {1}/{2}/{3}".format( ( bcm_obj.get_asic_temperature() * 1000 ), HWMON_PATH, index, SWITCH_TEMP_FILE_NAME ) + os.system("echo {0} > {1}/{2}/{3}".format( ( bcm_obj.get_asic_temperature() * 1000 ), HWMON_PATH, index, SWITCH_TEMP_FILE_NAME )) + break + else : + file_list = os.listdir("{0}/{1}/device".format(HWMON_PATH,index)) + if PSOC_NAME in file_list : + with open( "{0}/{1}/device/{2}".format(HWMON_PATH, index, PSOC_NAME), 'rb') as readPtr: + content = readPtr.read().strip() + if bcm_obj.get_platform() == INV_SEQUOIA_PLATFORM or bcm_obj.get_platform() == INV_SEQUOIA_NEW_PLATFORM: + if content == "inv_bmc" and SWITCH_TEMP_FILE_NAME in file_list : + os.system("echo {0} > {1}/{2}/device/{3}".format( ( bcm_obj.get_asic_temperature() * 1000 ), HWMON_PATH, index, SWITCH_TEMP_FILE_NAME )) + break + else : + if content == "inv_psoc" and SWITCH_TEMP_FILE_NAME in file_list : + #print "echo {0} > {1}/{2}/device/{3}".format( ( bcm_obj.get_asic_temperature() * 1000 ), HWMON_PATH, index, SWITCH_TEMP_FILE_NAME ) + os.system("echo {0} > {1}/{2}/device/{3}".format( ( bcm_obj.get_asic_temperature() * 1000 ), HWMON_PATH, index, SWITCH_TEMP_FILE_NAME )) + break + except Exception, e: + log_message( syslog.LOG_WARNING, "Exception. The warning is {0}".format(str(e)) ) + raise Exception("[asic_monitor.py] Exception. The warning is {0}".format(str(e))) + + time.sleep(120) + + syslog.closelog() + del bcm_obj + +if __name__ == "__main__": + main() + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/invCommon.py b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/invCommon.py new file mode 100644 index 00000000000..e0a5b3d13aa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/invCommon.py @@ -0,0 +1,28 @@ +#!/usr/bin/python +import sys +import os +import re + + +class InvPlatform(): + # define board type + inv_magnolia = "x86_64-inventec_d6254qs-r0" + inv_redwood = "x86_64-inventec_d7032q28b-r0" + inv_cypress = "x86_64-inventec_d7054q28b-r0" + inv_maple = "x86_64-inventec_d6356-r0" + inv_maple_evt1 = "x86_64-inventec_d6556-r0" + inv_maple_j = "x86_64-inventec_d6356j-r0" + inv_sequoia = "x86_64-inventec_d7264q28b-r0" + inv_sequoia_new = "x86_64-inventec_d7264-r0" + + def get_platform(self): + platform = None + + fileP = "/host/machine.conf" + with open("{0}".format(fileP), 'rb') as content: + for line in content: + reObj = re.search(r"onie_platform=(?P.+)", line) + if reObj is not None: + platform = reObj.group("pName") + + return platform diff --git a/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/inv_led_cb.c b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/inv_led_cb.c new file mode 100644 index 00000000000..215d0e18ccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/inv_led_cb.c @@ -0,0 +1,55 @@ +void inv_ledproc_linkscan_cb(int unit, soc_port_t port, bcm_port_info_t *info) +{ + //int unit = 0; + int speed, up; + bcm_pbmp_t pbmp; + bcm_port_config_t cfg; + bcm_port_config_t_init(&cfg); + bcm_port_config_get(unit, &cfg); + BCM_PBMP_ASSIGN(pbmp, cfg.port); + + BCM_PBMP_ITER(pbmp, port) + { + uint8 led_control_data = 0; + if (port == 66) + continue; + bcm_port_link_status_get(unit, port, &up); + //printf("port = %d, up = %d\n", port, up); + if (up == 1){ + led_control_data |= 0x1; + bcm_port_speed_get(unit, port, &speed); + //printf("port = %d, speed = %d\n", port, speed); + switch (speed) + { + case 10000: + led_control_data |= (1 << 1); + break; + case 25000: + led_control_data |= (2 << 1); + break; + case 40000: + led_control_data |= (3 << 1); + break; + case 100000: + led_control_data |= (4 << 1); + break; + } + } + else{ + led_control_data |= 0; + } + //led_control_data |= 0x10; + //printf("data = %d\n", led_control_data); + if (port >= 67){ + bcm_switch_led_control_data_write(0, 0, (port-3) * sizeof(led_control_data), &led_control_data, sizeof(led_control_data)); + bcm_switch_led_control_data_read(0, 0, (port-3) * sizeof(led_control_data), led_control_data, sizeof(led_control_data)); + } + else{ + bcm_switch_led_control_data_write(0, 0, (port-1) * sizeof(led_control_data), &led_control_data, sizeof(led_control_data)); + bcm_switch_led_control_data_read(0, 0, (port-1) * sizeof(led_control_data), led_control_data, sizeof(led_control_data)); + } + //printf("ctrl_data = %d\n", led_control_data); + } +} + +bcm_linkscan_register(0, inv_ledproc_linkscan_cb); diff --git a/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/led_proc.py b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/led_proc.py new file mode 100755 index 00000000000..c852b215b78 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/led_proc.py @@ -0,0 +1,390 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Inventec, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +import os +import time +import syslog +import re +from sonic_sfp.bcmshell import bcmshell +from invCommon import InvPlatform + +# ===================================================================== +# global variable init +# ===================================================================== +# port object +PORT_LIST = [] +# object is to execute bcm shell command +BCM_SHELL = None +SHELL_READY = False +# port status that is auto update by chip in data ram +STATUS_RX = 1<<0 +STATUS_TX = 1<<1 +# define data ram address +PORT_DATA_OFFSET_ADDR = 0xA0 +# define board type +INV_MAGNOLIA = "x86_64-inventec_d6254qs-r0" +INV_REDWOOD = "x86_64-inventec_d7032q28b-r0" +INV_CYPRESS = "x86_64-inventec_d7054q28b-r0" +INV_MAPLE = "x86_64-inventec_d6356-r0" +INV_MAPLE_J = "x86_64-inventec_d6356j-r0" +INV_MAPLE_EVT1 = "x86_64-inventec_d6556-r0" +INV_SEQUOIA = "x86_64-inventec_d7264q28b-r0" +INV_SEQUOIA_NEW = "x86_64-inventec_d7264-r0" +BOARD_TPYE = "" +EAGLE_CORE = [] +# define port data for bit streaming +BIT_LINK = None +BIT_FAULT = None +BIT_TX = None +BIT_RX = None +BIT_SPEED0 = None +BIT_SPEED1 = None +# define port speed +SPEED_100G = 100 +SPEED_40G = 40 +SPEED_25G = 25 +SPEED_10G = 10 + + +# ===================================================================== +# class object +# ===================================================================== +class Port(): + + port_num = None + name = None + bcm_id = None + led_up = None + s_addr = None + write2_up = None + led_index = None + link_status = None + speed = None + + def write_data_ram(self, data): + BCM_SHELL.cmd("setreg CMIC_LEDUP{0}_DATA_RAM({1}) {2}".format(self.write2_up, self.led_index, data)) + + def read_data_ram(self): + r_string = BCM_SHELL.run("getreg CMIC_LEDUP{0}_DATA_RAM({1})".format(self.led_up, self.s_addr)) + for line in r_string.split("\n"): + re_obj = re.search(r"\.+)\>", line) + if re_obj is not None: + #syslog.syslog(syslog.LOG_DEBUG, "Read Led({0}) data_ram({1}): {2}".format(self.up, addr, re_obj.group("data"))) + return int(re_obj.group("data"), 16) + + + +# ===================================================================== +# Function +# ===================================================================== +def _remap_registers(fp): + + content = fp.readlines() + fp.close() + err = False + + for line in content: + try: + BCM_SHELL.cmd(line.rstrip()) + except Exception, e: + err = True + syslog.syslog(syslog.LOG_ERR, "remap register abnormal: {0}".format(str(e))) + + if not err: + syslog.syslog(syslog.LOG_INFO, "remap Led registers successfully") + + + +def _board_init(): + + global BOARD_TPYE + global BIT_LINK + global BIT_FAULT + global BIT_TX + global BIT_RX + global BIT_SPEED0 + global BIT_SPEED1 + global EAGLE_CORE + global TOTAL_SCAN_BITS + global SYNC_S + global SYNC_P + + platfromObj = InvPlatform() + platform = platfromObj.get_platform() + + if platform.rstrip() == INV_MAGNOLIA: + BOARD_TPYE = "inventec_d6254qs" + BIT_RX = 1<<0 #0x01 + BIT_TX = 1<<1 #0x02 + BIT_SPEED1 = 1<<4 #0x10 + BIT_LINK = 1<<7 #0x80 + fp = open('/usr/share/sonic/device/x86_64-inventec_d6254qs-r0/led_proc_init.soc', "r") + _remap_registers(fp) + + elif platform.rstrip() == INV_REDWOOD: + BOARD_TPYE = "inventec_d7032q28b" + BIT_RX = 1<<0 #0x01 + BIT_TX = 1<<1 #0x02 + BIT_SPEED0 = 1<<3 #0x08 + BIT_SPEED1 = 1<<4 #0x10 + BIT_FAULT = 1<<6 #0x40 + BIT_LINK = 1<<7 #0x80 + EAGLE_CORE = [66, 100] + fp = open('/usr/share/sonic/device/x86_64-inventec_d7032q28b-r0/led_proc_init.soc', "r") + _remap_registers(fp) + + elif platform.rstrip() == INV_CYPRESS: + BOARD_TPYE = "inventec_d7054q28b" + BIT_LINK = 1<<0 #0x01 + BIT_FAULT = 1<<1 #0x02 + BIT_SPEED0 = 1<<2 #0x04 + EAGLE_CORE = [66, 100] + + elif platform.rstrip() == INV_SEQUOIA_NEW: + BOARD_TPYE = "inventec_d7264" + exit(0) + + elif platform.rstrip() == INV_SEQUOIA: + BOARD_TPYE = "inventec_d7264q28b" + #load prog and remap port order in led_proc_init.soc + #led process is controlled by data ram automatically + exit(0) + + elif platform.rstrip() == INV_MAPLE_J: + BOARD_TPYE = "inventec_d6356j" + exit(0) + + elif platform.rstrip() == INV_MAPLE: + BOARD_TPYE = "inventec_d6356" + exit(0) + + elif platform.rstrip() == INV_MAPLE_EVT1: + BOARD_TPYE = "inventec_d6556" + fp = open('/usr/share/sonic/device/x86_64-inventec_d6556-r0/led_proc_init.soc', "r") + _remap_registers(fp) + #led process: m0 led process that is controlled by linkscan_led_fw.bin and custom_led.bin + syslog.syslog(syslog.LOG_INFO, "Found device: {0}".format(BOARD_TPYE)) + exit(0) + + else: + BOARD_TPYE = "not found" + syslog.syslog(syslog.LOG_ERR, "Found device: {0}".format(BOARD_TPYE)) + exit(0) + + syslog.syslog(syslog.LOG_INFO, "Found device: {0}".format(BOARD_TPYE)) + + + +def _lookup_led_index(p): + + index = 0 + if BOARD_TPYE == "inventec_d6254qs": + if 0 <= p.port_num <= 47: + index = p.port_num + (p.port_num / 4) + p.write2_up = 0 + elif 48 <= p.port_num <= 71: + index = p.port_num - 48 + p.write2_up = 1 + if p.led_up == 0: + p.s_addr = p.port_num * 2 + elif p.led_up == 1: + p.s_addr = (p.port_num - 36) * 2 + + elif BOARD_TPYE == "inventec_d7032q28b": + p.write2_up = 0 + index = p.port_num + if 0 <= p.port_num <= 7: + p.s_addr = p.port_num * 8 + elif 8 <= p.port_num <= 23: + p.s_addr = (p.port_num - 8) * 8 + elif 24 <= p.port_num <= 31: + p.s_addr = (p.port_num - 16) * 8 + + else: + p.write2_up = p.led_up + for port in PORT_LIST: + if p.bcm_id == port.bcm_id: + break + if p.led_up == port.led_up: + index += 1 + + return PORT_DATA_OFFSET_ADDR + index + + +def _update_port_list(only_update): + + global PORT_LIST + number = 0 + count = 0 + + content = BCM_SHELL.run("ps") + for line in content.split("\n"): + re_obj = re.search(r"(?P(xe|ce)\d+)\(\s*(?P\d+)\)\s+(?P(up|down|!ena)).+\s+(?P\d+)G", line) + if re_obj is not None: + if int(re_obj.group("bcm_id")) not in EAGLE_CORE: + if only_update: + PORT_LIST[number].link_status = re_obj.group("link") + else: + # create port object while first time + port_obj = Port() + port_obj.port_num = number + port_obj.name = re_obj.group("port_name") + port_obj.bcm_id = int(re_obj.group("bcm_id")) + port_obj.link_status = re_obj.group("link") + port_obj.speed = int(re_obj.group("speed")) + PORT_LIST.append(port_obj) + number += 1 + + if not only_update: + content = BCM_SHELL.run("led status") + for line in content.split("\n"): + re_obj = re.search(r"(?P\d+).+(?P\d)\:", line) + if re_obj is not None: + if int(re_obj.group("bcm_id")) not in EAGLE_CORE: + PORT_LIST[count].led_up = int(re_obj.group("led_up")) + PORT_LIST[count].led_index = _lookup_led_index(PORT_LIST[count]) + count += 1 + + if number is not count: + PORT_LIST = [] + syslog.syslog(syslog.LOG_ERR, "The amount of port is not match") + + + +def sync_bcmsh_socket(): + + global BCM_SHELL + global SHELL_READY + waitSyncd = True + retryCount = 0 + + while waitSyncd: + time.sleep(10) + try: + BCM_SHELL = bcmshell() + BCM_SHELL.run("Echo") + waitSyncd = False + except Exception, e: + print "{0}, Retry times({1})".format(str(e),retryCount) + #syslog.syslog(syslog.LOG_DEBUG, "{0}, Retry times({1})".format(str(e),retryCount)) + retryCount += 1 + + syslog.syslog(syslog.LOG_INFO, "bcmshell socket create successfully") + + if SHELL_READY is False: + SHELL_READY = True + return + elif SHELL_READY is True: + update_led_status() + + + +def update_led_status(): + + led_thread = True # True/False (gate to turn on/off) + reset_sec = 2 + count_down = 0 + queue_active = [] + port_data = None + s_byte = None + + + # thread for keeping update port status in data ram + while led_thread: + try: + if count_down == 0: + queue_active = [] + _update_port_list(1) + for port in PORT_LIST: + if port.link_status == "up": + queue_active.append(port) + else: + port_data = 0 + port.write_data_ram(port_data) + count_down = reset_sec + else: + for port in queue_active: + port_data = 0 + + if BOARD_TPYE == "inventec_d6254qs": + s_byte = port.read_data_ram() + if s_byte&STATUS_RX: + port_data |= BIT_RX + if s_byte&STATUS_TX: + port_data |= BIT_TX + port_data |= BIT_LINK + + elif BOARD_TPYE == "inventec_d7032q28b": + s_byte = port.read_data_ram() + if s_byte&STATUS_RX: + port_data |= BIT_RX + if s_byte&STATUS_TX: + port_data |= BIT_TX + if port.speed == SPEED_100G: + port_data |= BIT_SPEED0 + port_data |= BIT_SPEED1 + elif port.speed == SPEED_40G: + port_data |= BIT_SPEED1 + elif port.speed == SPEED_25G: + port_data |= BIT_SPEED0 + else: + pass + port_data |= BIT_LINK + + elif BOARD_TPYE == "inventec_d7054q28b": + if port.speed != SPEED_100G and port.speed != SPEED_25G: + port_data |= BIT_SPEED0 + + # write data to update data ram for specific port + port.write_data_ram(port_data) + + time.sleep(0.5) + count_down -= 1 + + except Exception, e: + syslog.syslog(syslog.LOG_WARNING, "{0}".format(str(e))) + sync_bcmsh_socket() + + + +def debug_print(): + + for port in PORT_LIST: + output = "" + output += "name:{0} | ".format(port.name) + output += "port_num:{0} | ".format(port.port_num) + output += "bcm_id:{0} | ".format(port.bcm_id) + output += "link_status:{0} | ".format(port.link_status) + output += "speed:{0} | ".format(port.speed) + output += "led_up:{0} | ".format(port.led_up) + output += "s_addr:{0} | ".format(port.s_addr) + output += "write2_up:{0} | ".format(port.write2_up) + output += "led_index:{0} | ".format(port.led_index) + print output + + +if __name__ == "__main__": + + syslog.openlog("led_proc", syslog.LOG_PID, facility=syslog.LOG_DAEMON) + + sync_bcmsh_socket() + _board_init() + _update_port_list(0) + #debug_print() + update_led_status() + + syslog.closelog() diff --git a/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/msgLog.py b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/msgLog.py new file mode 100644 index 00000000000..15a15de8831 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/msgLog.py @@ -0,0 +1,12 @@ +import os +import syslog + +DEBUG = False + +def msg_to_syslog(level, msg): + if level == 'info': + syslog.syslog(syslog.LOG_INFO, msg) + elif level == 'warning': + syslog.syslog(syslog.LOG_WARNING, msg) + elif level == 'debug' and DEBUG: + syslog.syslog(syslog.LOG_DEBUG, msg) diff --git a/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/platfmgr.py b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/platfmgr.py new file mode 100755 index 00000000000..b30867af191 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/platfmgr.py @@ -0,0 +1,310 @@ +#!/usr/bin/python + +# +# Copyright (C) 2018 Inventec, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + + +import sys +import os +import re +import syslog +import time +from sonic_sfp.bcmshell import bcmshell +from swsssdk import SonicV2Connector +from msgLog import msg_to_syslog +from invCommon import InvPlatform + + + +# sleep time check(second) +REDISDBTIMECHECK = 1 +SWSSTIMECHECK = 3 +BCMSHELLTIMECHECK = 5 + +# define board type +INV_MAGNOLIA = "x86_64-inventec_d6254qs-r0" +INV_REDWOOD = "x86_64-inventec_d7032q28b-r0" +INV_CYPRESS = "x86_64-inventec_d7054q28b-r0" +INV_MAPLE_J = "x86_64-inventec_d6356j-r0" +INV_MAPLE = "x86_64-inventec_d6356-r0" +INV_MAPLE_EVT1 = "x86_64-inventec_d6556-r0" +INV_SEQUOIA = "x86_64-inventec_d7264q28b-r0" +INV_SEQUOIA_NEW = "x86_64-inventec_d7264-r0" + +#define daemon +PLATFROM = None +BASE_PATH = None +PID_PATH = '/var/run' +LED_DAEMON = None +LED_PIDFILE = None +ASIC_DAEMON = None +ASIC_PIDFILE = None + + +RDB = None +def rdb_connect(): + RDB.connect(RDB.ASIC_DB) + + +def rdb_get_all(database, key): + """ + parameter: + database -- database name in sonic redis-db + key -- specific key in database + return: + entry -- the content in the key + """ + entry = RDB.get_all(database, key, blocking=True) + return entry + + + +def platform_path_init(): + global PLATFROM + global BASE_PATH + global LED_DAEMON + global LED_PIDFILE + global ASIC_DAEMON + global ASIC_PIDFILE + + invP = InvPlatform() + while True: + platformName = invP.get_platform() + if platformName is not "None": + break + + if platformName.rstrip() == INV_MAGNOLIA: + msg_to_syslog('info', "found platform: {0}".format(INV_MAGNOLIA)) + PLATFROM = INV_MAGNOLIA + BASE_PATH = '/usr/share/sonic/device/{0}/plugins'.format(PLATFROM) + ASIC_DAEMON = '{0}/asic_monitor.py'.format(BASE_PATH) + ASIC_PIDFILE = '{0}/asic_monitor'.format(PID_PATH) + LED_DAEMON = '{0}/led_proc.py'.format(BASE_PATH) + LED_PIDFILE = '{0}/led_proc'.format(PID_PATH) + elif platformName.rstrip() == INV_REDWOOD: + msg_to_syslog('info', "found platform: {0}".format(INV_REDWOOD)) + PLATFROM = INV_REDWOOD + BASE_PATH = '/usr/share/sonic/device/{0}/plugins'.format(PLATFROM) + ASIC_DAEMON = '{0}/asic_monitor.py'.format(BASE_PATH) + ASIC_PIDFILE = '{0}/asic_monitor'.format(PID_PATH) + LED_DAEMON = '{0}/led_proc.py'.format(BASE_PATH) + LED_PIDFILE = '{0}/led_proc'.format(PID_PATH) + elif platformName.rstrip() == INV_CYPRESS: + msg_to_syslog('info', "found platform: {0}".format(INV_CYPRESS)) + PLATFROM = INV_CYPRESS + BASE_PATH = '/usr/share/sonic/device/{0}/plugins'.format(PLATFROM) + ASIC_DAEMON = '{0}/asic_monitor.py'.format(BASE_PATH) + ASIC_PIDFILE = '{0}/asic_monitor'.format(PID_PATH) + LED_DAEMON = '{0}/led_proc.py'.format(BASE_PATH) + LED_PIDFILE = '{0}/led_proc'.format(PID_PATH) + elif platformName.rstrip() == INV_SEQUOIA: + msg_to_syslog('info', "found platform: {0}".format(INV_SEQUOIA)) + PLATFROM = INV_SEQUOIA + BASE_PATH = '/usr/share/sonic/device/{0}/plugins'.format(PLATFROM) + ASIC_DAEMON = '{0}/asic_monitor.py'.format(BASE_PATH) + ASIC_PIDFILE = '{0}/asic_monitor'.format(PID_PATH) + LED_DAEMON = '{0}/led_proc.py'.format(BASE_PATH) + LED_PIDFILE = '{0}/led_proc'.format(PID_PATH) + elif platformName.rstrip() == INV_SEQUOIA_NEW: + msg_to_syslog('info', "found platform: {0}".format(INV_SEQUOIA_NEW)) + PLATFROM = INV_SEQUOIA_NEW + BASE_PATH = '/usr/share/sonic/device/{0}/plugins'.format(PLATFROM) + ASIC_DAEMON = '{0}/asic_monitor.py'.format(BASE_PATH) + ASIC_PIDFILE = '{0}/asic_monitor'.format(PID_PATH) + LED_DAEMON = '{0}/led_proc.py'.format(BASE_PATH) + LED_PIDFILE = '{0}/led_proc'.format(PID_PATH) + elif platformName.rstrip() == INV_MAPLE: + msg_to_syslog('info', "found platform: {0}".format(INV_MAPLE)) + PLATFROM = INV_MAPLE + BASE_PATH = '/usr/share/sonic/device/{0}/plugins'.format(PLATFROM) + ASIC_DAEMON = '' + ASIC_PIDFILE = '' + LED_DAEMON = '' + LED_PIDFILE = '' + elif platformName.rstrip() == INV_MAPLE_J: + msg_to_syslog('info', "found platform: {0}".format(INV_MAPLE_J)) + PLATFROM = INV_MAPLE_J + BASE_PATH = '/usr/share/sonic/device/{0}/plugins'.format(PLATFROM) + ASIC_DAEMON = '' + ASIC_PIDFILE = '' + LED_DAEMON = '' + LED_PIDFILE = '' + elif platformName.rstrip() == INV_MAPLE_EVT1: + msg_to_syslog('info', "found platform: {0}".format(INV_MAPLE_EVT1)) + PLATFROM = INV_MAPLE_EVT1 + BASE_PATH = '/usr/share/sonic/device/{0}/plugins'.format(PLATFROM) + ASIC_DAEMON = '{0}/asic_monitor.py'.format(BASE_PATH) + ASIC_PIDFILE = '{0}/asic_monitor'.format(PID_PATH) + LED_DAEMON = '{0}/led_proc.py'.format(BASE_PATH) + LED_PIDFILE = '{0}/led_proc'.format(PID_PATH) + else: + msg_to_syslog('warning', "platform not found") + + + +def wake_process(): + start = '/sbin/start-stop-daemon --quiet --oknodo --pidfile {0} --make-pidfile --startas {1} --start --background -- $DAEMON_OPTS' + + # daemon list ### xxx = start.format(xxx_PIDFILE, xxx_DAEMON) + asic_monitor = start.format(ASIC_PIDFILE, ASIC_DAEMON) + led_proc = start.format(LED_PIDFILE, LED_DAEMON) + + + # add to the start command list [aaa, bbb, ccc] + cmdList = [asic_monitor, led_proc] + for cmd in cmdList: + os.system(cmd) + msg_to_syslog('debug', cmd) + + msg_to_syslog('info', 'wake all invSyncd sub-daemon') + + + +def kill_process(): + stop = '/sbin/start-stop-daemon --quiet --oknodo --stop --pidfile {0} --retry 10' + + # daemon list ### xxx = stop.format(xxx_PIDFILE) + asic_monitor = stop.format(ASIC_PIDFILE) + led_proc = stop.format(LED_PIDFILE) + + # add to the stop command list [xxx, yyy, zzz] + cmdList = [asic_monitor, led_proc] + for cmd in cmdList: + os.system(cmd) + + msg_to_syslog('info', 'kill all platfmgr sub-daemon') + + + +def sync_bcmsh_socket(): + waitSyncd = True + retryCount = 0 + + # retry new a bcmshell object + try: + shell = bcmshell() + except Exception, e: + msg_to_syslog('debug', "{0}".format(str(e))) + retryCount += 1 + + # retry the socket connection for Echo + while True: + try: + time.sleep(BCMSHELLTIMECHECK) + rv = shell.run("Echo") + msg_to_syslog('debug', 'bcmcmd: {0}'.format(rv)) + if rv.strip() == "Echo": + break + except Exception, e: + msg_to_syslog('debug', "{0}, Retry times({1})".format(str(e),retryCount)) + retryCount += 1 + + msg_to_syslog('info', "bcmshell socket create successfully") + + + +def check_swss_service(): + """ + return: + False -- inactive + True -- active + """ + + status = None + cmd = "service swss status" + nLine = 0 + + # check swss service status + for line in os.popen(cmd).read().split("\n"): + if nLine == 2: + reObj = re.search(r"Active\:.+\((?P\w+)\)", line) + if reObj is not None: + status = reObj.group("status") + elif nLine > 2: + break + nLine += 1 + + if status == "running": + # check swss container and syncd container is ready + cmd = 'docker exec swss echo -ne "SELECT 1\\nHLEN HIDDEN" | redis-cli | sed -n 2p' + while True: + try: + rv = os.popen(cmd).read().rstrip() + if rv.isdigit() and rv in ["3","4","5"] : + content = rdb_get_all(RDB.ASIC_DB, "HIDDEN") + if len(content) >= 3: + break + except Exception as e: + msg_to_syslog('debug', str(e)) + return True + else: + return False + + + +def main(): + syslog.openlog("platfmgr", syslog.LOG_PID, facility=syslog.LOG_DAEMON) + time.sleep(BCMSHELLTIMECHECK) + # check redis Database is ready + global RDB + cmd = 'redis-cli ping | grep -c PONG' + while True: + try: + rv = os.popen(cmd).read() + if int(rv.rstrip()) > 0: + RDB = SonicV2Connector(host="127.0.0.1") + rdb_connect() + msg_to_syslog('debug', 'redis database........ready') + break + except Exception as e: + msg_to_syslog('debug', str(e)) + time.sleep(REDISDBTIMECHECK) + + # init plarform path + platform_path_init() + + # main thread for checing swss status + thread = True + wake = False + while thread: + readyGo = check_swss_service() + + while readyGo: + msg_to_syslog('debug', 'swss active') + # wake process one time + if not wake: + sync_bcmsh_socket() + wake_process() + wake = True + time.sleep(SWSSTIMECHECK) + readyGo = check_swss_service() + + while not readyGo: + msg_to_syslog('debug', 'swss inactive') + # kill process one time + if wake: + kill_process() + wake = False + time.sleep(SWSSTIMECHECK) + readyGo = check_swss_service() + + + syslog.closelog() + + +if __name__ == "__main__": + main() + diff --git a/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/platform_status.py b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/platform_status.py new file mode 100755 index 00000000000..f1e7f7fece7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/common/utils/platform/platform_status.py @@ -0,0 +1,64 @@ +#!/usr/bin/env python + +import os +import socket +from collections import OrderedDict + +# Purpose: Shutdown DUT upon receiving thermaltrip event from kernel (inv_pthread) + +NETLINK_KOBJECT_UEVENT = 15 + +class KernelEventMonitor(object): + + def __init__(self): + self.received_events = OrderedDict() + self.socket = socket.socket(socket.AF_NETLINK, socket.SOCK_DGRAM, NETLINK_KOBJECT_UEVENT) + + def start(self): + self.socket.bind((os.getpid(), -1)) + + def stop(self): + self.socket.close() + + def __enter__(self): + self.start() + return self + + def __exit__(self, exc_type, exc_value, traceback): + self.stop() + + def __iter__(self): + while True: + for item in monitor.next_events(): + yield item + + def next_events(self): + data = self.socket.recv(16384) + event = {} + for item in data.split(b'\x00'): + if not item: + #check if we have an event and if we already received it + if event and event['SEQNUM'] not in self.received_events: + self.received_events[event['SEQNUM']] = None + if (len(self.received_events) > 100): + self.received_events.popitem(last=False) + yield event + event = {} + else: + try: + k, v = item.split(b'=', 1) + event[k.decode('ascii')] = v.decode('ascii') + except ValueError: + pass + +if __name__ == '__main__': + with KernelEventMonitor() as monitor: + for event in monitor: + if event['SUBSYSTEM'] == 'platform_status': + print('subsystem is platform_status') + + # Receive thermaltrip event + if event['ACTION'] == 'remove' and event['DEVPATH'] == '/kernel/platform_status/fan': + os.system("shutdown -h now") + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/Makefile b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/Makefile new file mode 100644 index 00000000000..13fc34c230c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/Makefile @@ -0,0 +1,7 @@ +obj-m += inv_cpld.o inv_psoc.o +obj-m += inv_platform.o +obj-m += inv_eeprom.o +obj-m += swps.o +obj-m += inv_pthread.o +swps-objs := inv_swps.o io_expander.o transceiver.o + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_cpld.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_cpld.c new file mode 100644 index 00000000000..683ffa0ff3c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_cpld.c @@ -0,0 +1,415 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//#include "I2CHostCommunication.h" + +#define USE_SMBUS 1 + +/* definition */ +#define CPLD_INFO_OFFSET 0x00 +#define CPLD_PSU_OFFSET 0x08 +#define CPLD_LED_OFFSET 0x0E +#define CPLD_LED_STATU_OFFSET 0x0D +#define CPLD_CTL_OFFSET 0x0C + + + +/* Each client has this additional data */ +struct cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; +}; + +/*-----------------------------------------------------------------------*/ + +static ssize_t cpld_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg[0].buf = msgbuf; + msg[0].len = 1; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + + status = i2c_transfer(client->adapter, msg, 2); + + if(status == 2) + status = count; + + return status; +#endif +} + +static ssize_t cpld_i2c_write(struct i2c_client *client, char *buf, unsigned offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + + return status; +#endif +} + +/*-----------------------------------------------------------------------*/ + +/* sysfs attributes for hwmon */ + +static ssize_t show_info(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[4]; + + memset(b, 0, 4); + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, b, CPLD_INFO_OFFSET, 4); + mutex_unlock(&data->update_lock); + + if(status != 4) return sprintf(buf, "read cpld info fail\n"); + + status = sprintf (buf, "The CPLD release date is %02d/%02d/%d.\n", b[2] & 0xf, (b[3] & 0x1f), 2014+(b[2] >> 4)); /* mm/dd/yyyy*/ + status = sprintf (buf, "%sThe PCB version is %X%X\n", buf, b[0]>>4, b[0]&0xf); + status = sprintf (buf, "%sThe CPLD version is %d.%d\n", buf, b[1]>>4, b[1]&0xf); + + return strlen(buf); +} + + +static ssize_t show_ctl(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[1]; + + mutex_lock(&data->update_lock); + + status = cpld_i2c_read(client, b, CPLD_CTL_OFFSET, 1); + + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld ctl fail\n"); + + + status = sprintf (buf, "0x%X\n", b[0]); + + return strlen(buf); +} + +static ssize_t set_ctl(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + + u8 temp = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_CTL_OFFSET, 1); + if(temp) byte |= (1<<0); + else byte &= ~(1<<0); + cpld_i2c_write(client, &byte, CPLD_CTL_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + + +static char* led_str[] = { + "OFF", //000 + "0.5 Hz", //001 + "1 Hz", //010 + "2 Hz", //011 + "NA", //100 + "NA", //101 + "NA", //110 + "ON", //111 +}; + +static ssize_t show_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 0)?3:0; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld offset 0x%x\n", CPLD_LED_OFFSET); + + byte = (byte >> shift) & 0x7; + + /* + 0: off + 1: 0.5hz + 2: 1 hz + 3: 2 hz + 4~6: not define + 7: on + */ + + status = sprintf (buf, "%d: %s\n", byte, led_str[byte]); + + return strlen(buf); +} + +static ssize_t set_led(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + u8 temp = simple_strtol(buf, NULL, 16); + u8 byte; + int shift = (attr->index == 0)?3:0; + + temp &= 0x7; + //validate temp value: 0,1,2,3,7, TBD + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + byte &= ~(0x7<update_lock); + + return count; +} + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu0 | psu1 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 1)?0:3; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + + +static SENSOR_DEVICE_ATTR(info, S_IRUGO, show_info, 0, 0); +static SENSOR_DEVICE_ATTR(ctl, S_IWUSR|S_IRUGO, show_ctl, set_ctl, 0); + +static SENSOR_DEVICE_ATTR(grn_led, S_IWUSR|S_IRUGO, show_led, set_led, 0); +static SENSOR_DEVICE_ATTR(red_led, S_IWUSR|S_IRUGO, show_led, set_led, 1); + +static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu, 0, 0); +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu, 0, 1); + +static struct attribute *cpld_attributes[] = { + //info + &sensor_dev_attr_info.dev_attr.attr, + &sensor_dev_attr_ctl.dev_attr.attr, + + &sensor_dev_attr_grn_led.dev_attr.attr, + &sensor_dev_attr_red_led.dev_attr.attr, + + &sensor_dev_attr_psu0.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + + NULL +}; + +static const struct attribute_group cpld_group = { + .attrs = cpld_attributes, +}; + +/*-----------------------------------------------------------------------*/ + +/* device probe and removal */ + +static int +cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct cpld_data *data; + int status; + + printk("+%s\n", __func__); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &cpld_group); + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &cpld_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &cpld_group); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id cpld_ids[] = { + { "inv_cpld", 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, cpld_ids); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_cpld_init(void) +{ + return i2c_add_driver(&cpld_driver); +} + +static void __exit inv_cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("eddie.lan "); +MODULE_DESCRIPTION("inv cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_cpld_init); +module_exit(inv_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_eeprom.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_eeprom.c new file mode 100644 index 00000000000..3d13f3b0471 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_eeprom.c @@ -0,0 +1,181 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void inv_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } + +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t inv_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + inv_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute inv_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = inv_eeprom_read, +}; + +static int inv_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &inv_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int inv_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &inv_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id inv_eeprom_id[] = { + { "inv_eeprom", 0 }, + { } +}; + +static struct i2c_driver inv_eeprom_driver = { + .driver = { + .name = "inv_eeprom", + }, + .probe = inv_eeprom_probe, + .remove = inv_eeprom_remove, + .id_table = inv_eeprom_id, +}; + +module_i2c_driver(inv_eeprom_driver); + +MODULE_AUTHOR("Inventec"); +MODULE_DESCRIPTION("Inventec D7054 Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_mux.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_mux.c new file mode 100644 index 00000000000..a8a9a3c3df7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_mux.c @@ -0,0 +1,280 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include "io_expander.h" +#include "inv_mux.h" + +static struct mux_obj_s *mux_head_p = NULL; + + +/* ========== MUX object functions ========== + */ +int +_common_force_pull_gpio(int mem_addr, + int input, + int bit_offset){ + + unsigned int val = 0; + unsigned int targ = 0; + + /* Get current value */ + val = inl(mem_addr); + if (val == 0) { + SWPS_ERR("%s: inl:%d fail!\n", __func__, val); + return -1; + } + /* Count target value */ + switch (input) { + case 0: /* Pull Low */ + targ = (val & (~(1 << bit_offset))); + break; + case 1: /* Pull high */ + targ = (val | (1 << bit_offset)); + break; + default: + SWPS_ERR("%s: input state:%d incorrect!\n", + __func__, input); + return -1; + } + /* Setup gpio */ + outl(targ, mem_addr); + if (targ != inl(mem_addr)){ + SWPS_ERR("%s: outl:%d fail!\n", __func__, targ); + return -1; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + + +int +rangeley_force_pull_high(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +rangeley_force_pull_low(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +hedera_force_pull_high(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 1, 5); +} + + +int +hedera_force_pull_low(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 0, 5); +} + + +int +normal_gpio_pull_high(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 1); +} + + +int +normal_gpio_pull_low(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 0); +} + + +int +pca9548_reset_mux_all(struct mux_obj_s *self){ + /* [Note] Power-on reset (PCA9548A-NXP) + * When power is applied to VDD, an internal Power-On Reset (POR) + * holds the PCA9548A in a reset condition until VDD has reached + * VPOR. At this point, the reset condition is released and the + * PCA9548A register and I2C-bus state machine are initialized to + * their default states (all zeroes) causing all the channels to + * be deselected. Thereafter, VDD must be lowered below 0.2 V for + * at least 5 us in order to reset the device. + */ + if (self->_pull_low(self) < 0) { + SWPS_ERR("%s: _pull_low fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS); + if (self->_pull_high(self) < 0) { + SWPS_ERR("%s: _pull_high fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS); + return 0; +} + + +int +common_reset_mux_all(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +init_gpio_4_force(struct mux_obj_s *self){ + return 0; +} + + +int +init_gpio_4_normal(struct mux_obj_s *self){ + + int err = 0; + + if (!gpio_is_valid(self->gpio_num)) { + SWPS_ERR("%s: GIPO:%d isn't valid\n", __func__, self->gpio_num); + return -1; + } + err = gpio_request(self->gpio_num, MUX_GPIO_LABEL); + if (err < 0) { + SWPS_ERR("%s: gpio_request fail :%d :%d\n", + __func__, err, self->gpio_num); + return -1; + } + SWPS_DEBUG("%s: gpio_request:%d ok.\n", __func__, self->gpio_num); + return 0; +} + + +static int +_setup_muxctl_cb(struct mux_obj_s *self, + unsigned gpio){ + + char mod_dsc[32] = "ERR"; + + switch (gpio) { + case MUX_RST_GPIO_FORCE_RANGELEY: + self->gpio_num = gpio; + self->_pull_low = rangeley_force_pull_low; + self->_pull_high = rangeley_force_pull_high; + self->_init = init_gpio_4_force; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Rangeley force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_FORCE_HEDERA: + self->gpio_num = gpio; + self->_pull_low = hedera_force_pull_low; + self->_pull_high = hedera_force_pull_high; + self->_init = init_gpio_4_force; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Hedera force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_48_PAC9548: + case MUX_RST_GPIO_69_PAC9548: + case MUX_RST_GPIO_249_PCA9548: + case MUX_RST_GPIO_505_PCA9548: + self->gpio_num = gpio; + self->_pull_low = normal_gpio_pull_low; + self->_pull_high = normal_gpio_pull_high; + self->_init = init_gpio_4_normal; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Normal mode :%d", (int)gpio); + goto ok_setup_muxctl_cb; + + default: + break; + } + SWPS_ERR("%s: Unexpected GPIO:%d\n", __func__, gpio); + return -1; + +ok_setup_muxctl_cb: + SWPS_INFO("muxctl: %s.\n", mod_dsc); + return 0; +} + + +/* ========== MUX public functions ========== + */ +void +clean_mux_gpio(void){ + + if (!mux_head_p) { + SWPS_DEBUG("%s: mux_head_p is NULL\n", __func__); + return; + } + if (gpio_is_valid(mux_head_p->gpio_num)) { + gpio_free(mux_head_p->gpio_num); + } + kfree(mux_head_p); + mux_head_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} + + +int +reset_mux_gpio(void){ + + if (!mux_head_p) { + SWPS_ERR("%s: MUX ctl object doesn't exist!\n", __func__); + return -1; + } + if (mux_head_p->reset(mux_head_p) < 0){ + SWPS_ERR("%s: reset fail!\n", __func__); + return -1; + } + return 0; +} + + +int +init_mux_gpio(unsigned gpio){ + + /* Create MUX control object */ + if (mux_head_p) { + SWPS_DEBUG("%s: mux_head_p is not NULL!\n", __func__); + clean_mux_gpio(); + } + /* Currently, it is using single muxctl architecture. + * In the future, it may use the multi-muxctl if HW add new features. + * (Ex: Port power-status control) + */ + mux_head_p = kzalloc(sizeof(struct mux_obj_s), GFP_KERNEL); + if (!mux_head_p) { + SWPS_ERR("%s: kzalloc fail!\n", __func__); + return -1; + } + /* Initial MUX controller */ + if (_setup_muxctl_cb(mux_head_p, gpio) < 0){ + SWPS_ERR("%s: _setup_muxctl_cb fail!\n", __func__); + return -1; + } + if (mux_head_p->_init(mux_head_p) < 0) { + SWPS_ERR("%s: init() fail\n", __func__); + goto err_init_mux_gpio; + } + /* Setup default value */ + if (mux_head_p->_pull_high(mux_head_p) < 0) { + SWPS_ERR("%s: setup default fail!\n", __func__); + goto err_init_mux_gpio; + } + return 0; + +err_init_mux_gpio: + clean_mux_gpio(); + return -1; +} + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_mux.h b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_mux.h new file mode 100644 index 00000000000..687a11b4e5b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_mux.h @@ -0,0 +1,45 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef INV_MUX_H +#define INV_MUX_H + + +/* MUX basic information */ +#define MUX_GPIO_LABEL "SWPS_RST_MUX" + +/* MUX reset GPIO define */ +#define MUX_RST_GPIO_FORCE (30100) +#define MUX_RST_GPIO_FORCE_RANGELEY (30101) +#define MUX_RST_GPIO_FORCE_HEDERA (30102) +#define MUX_RST_GPIO_48_PAC9548 (48) +#define MUX_RST_GPIO_69_PAC9548 (69) +#define MUX_RST_GPIO_249_PCA9548 (249) +#define MUX_RST_GPIO_505_PCA9548 (505) + +/* MUX relate value define */ +#define MUX_RST_WAIT_MS (1) +#define MUX_RST_MEM_ADDR_RANGELEY (0) // TBD +#define MUX_RST_MEM_ADDR_HEDERA (0x548) + +struct mux_obj_s { + unsigned gpio_num; + int (*_pull_high)(struct mux_obj_s *self); + int (*_pull_low)(struct mux_obj_s *self); + int (*_init)(struct mux_obj_s *self); + int (*reset)(struct mux_obj_s *self); +}; + + +void clean_mux_gpio(void); +int reset_mux_gpio(void); +int init_mux_gpio(unsigned gpio); + + +#endif /* INV_MUX_H */ + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_platform.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_platform.c new file mode 100644 index 00000000000..e69b526f455 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_platform.c @@ -0,0 +1,243 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include + +#include + +struct inv_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +///////////////////////////////////////////////////////////////////////////////////////// +static struct pca954x_platform_mode mux_modes_0[] = { + {.adap_id = 2,}, {.adap_id = 3,}, + {.adap_id = 4,}, {.adap_id = 5,}, + {.adap_id = 6,}, {.adap_id = 7,}, + {.adap_id = 8,}, {.adap_id = 9,}, +}; +static struct pca954x_platform_mode mux_modes_0_0[] = { + {.adap_id = 10,}, {.adap_id = 11,}, + {.adap_id = 12,}, {.adap_id = 13,}, + {.adap_id = 14,}, {.adap_id = 15,}, + {.adap_id = 16,}, {.adap_id = 17,}, +}; + +static struct pca954x_platform_mode mux_modes_0_1[] = { + {.adap_id = 18,}, {.adap_id = 19,}, + {.adap_id = 20,}, {.adap_id = 21,}, + {.adap_id = 22,}, {.adap_id = 23,}, + {.adap_id = 24,}, {.adap_id = 25,}, +}; + +static struct pca954x_platform_mode mux_modes_0_2[] = { + {.adap_id = 26,}, {.adap_id = 27,}, + {.adap_id = 28,}, {.adap_id = 29,}, + {.adap_id = 30,}, {.adap_id = 31,}, + {.adap_id = 32,}, {.adap_id = 33,}, +}; + +static struct pca954x_platform_mode mux_modes_0_3[] = { + {.adap_id = 34,}, {.adap_id = 35,}, + {.adap_id = 36,}, {.adap_id = 37,}, + {.adap_id = 38,}, {.adap_id = 39,}, + {.adap_id = 40,}, {.adap_id = 41,}, +}; + +static struct pca954x_platform_mode mux_modes_0_4[] = { + {.adap_id = 42,}, {.adap_id = 43,}, + {.adap_id = 44,}, {.adap_id = 45,}, + {.adap_id = 46,}, {.adap_id = 47,}, + {.adap_id = 48,}, {.adap_id = 49,}, +}; + +static struct pca954x_platform_mode mux_modes_0_5[] = { + {.adap_id = 50,}, {.adap_id = 51,}, + {.adap_id = 52,}, {.adap_id = 53,}, + {.adap_id = 54,}, {.adap_id = 55,}, + {.adap_id = 56,}, {.adap_id = 57,}, +}; + +static struct pca954x_platform_mode mux_modes_0_6[] = { + {.adap_id = 58,}, {.adap_id = 59,}, + {.adap_id = 60,}, {.adap_id = 61,}, + {.adap_id = 62,}, {.adap_id = 63,}, + {.adap_id = 64,}, {.adap_id = 65,}, +}; + +//no i2c device driver attach to mux 7 + + +static struct pca954x_platform_data mux_data_0 = { + .modes = mux_modes_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_0 = { + .modes = mux_modes_0_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_1 = { + .modes = mux_modes_0_1, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_2 = { + .modes = mux_modes_0_2, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_3 = { + .modes = mux_modes_0_3, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_4 = { + .modes = mux_modes_0_4, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_5 = { + .modes = mux_modes_0_5, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_6 = { + .modes = mux_modes_0_6, + .num_modes = 8, +}; + + +static struct i2c_board_info xlp_i2c_device_info0[] __initdata = { + {"inv_psoc", 0, 0x66, 0, 0, 0},//psoc + {"inv_cpld", 0, 0x55, 0, 0, 0},//cpld + {"pca9548", 0, 0x71, &mux_data_0, 0, 0}, +}; + +static struct i2c_board_info xlp_i2c_device_info1[] __initdata = { + {"inv_psoc", 0, 0x66, 0, 0, 0},//psoc + {"inv_cpld", 0, 0x55, 0, 0, 0},//cpld +}; + +static struct i2c_board_info xlp_i2c_device_info2[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_0, 0, 0}, +}; + +static struct i2c_board_info xlp_i2c_device_info3[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_1, 0, 0}, +}; + +static struct i2c_board_info xlp_i2c_device_info4[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_2, 0, 0}, +}; + +static struct i2c_board_info xlp_i2c_device_info5[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_3, 0, 0}, +}; +static struct i2c_board_info xlp_i2c_device_info6[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_4, 0, 0}, +}; +static struct i2c_board_info xlp_i2c_device_info7[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_5, 0, 0}, +}; +static struct i2c_board_info xlp_i2c_device_info8[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_6, 0, 0}, +}; + + +static struct inv_i2c_board_info i2cdev_list[] = { + {0, ARRAY_SIZE(xlp_i2c_device_info0), xlp_i2c_device_info0 }, //smbus 0 + + {2, ARRAY_SIZE(xlp_i2c_device_info2), xlp_i2c_device_info2 }, //mux 0 + {3, ARRAY_SIZE(xlp_i2c_device_info3), xlp_i2c_device_info3 }, //mux 1 + {4, ARRAY_SIZE(xlp_i2c_device_info4), xlp_i2c_device_info4 }, //mux 2 + {5, ARRAY_SIZE(xlp_i2c_device_info5), xlp_i2c_device_info5 }, //mux 3 + {6, ARRAY_SIZE(xlp_i2c_device_info6), xlp_i2c_device_info6 }, //mux 4 + {7, ARRAY_SIZE(xlp_i2c_device_info7), xlp_i2c_device_info7 }, //mux 5 + {8, ARRAY_SIZE(xlp_i2c_device_info8), xlp_i2c_device_info8 }, //mux 6 +}; + +///////////////////////////////////////////////////////////////////////////////////////// +static struct i2c_gpio_platform_data i2c_gpio_platdata = { + .scl_pin = 8, + .sda_pin = 9, + + .udelay = 5, //5:100kHz + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .scl_is_output_only = 0 +}; + +static struct platform_device magnolia_device_i2c_gpio = { + .name = "i2c-gpio", + .id = 0, // adapter number + .dev.platform_data = &i2c_gpio_platdata, +}; + +#define PLAT_MAX_I2C_CLIENTS 32 +static struct i2c_client *plat_i2c_client[PLAT_MAX_I2C_CLIENTS]; +static int num_i2c_clients = 0; +static int plat_i2c_client_add(struct i2c_client *e) +{ + if (num_i2c_clients >= PLAT_MAX_I2C_CLIENTS) + return -1; + + plat_i2c_client[num_i2c_clients] = e; + num_i2c_clients++; + return num_i2c_clients; +} + +static void plat_i2c_client_remove_all(void) +{ + int i; + for (i = num_i2c_clients-1; i >= 0; i--) + i2c_unregister_device(plat_i2c_client[i]); +} + +static int __init plat_magnolia_init(void) +{ + struct i2c_adapter *adap = NULL; + struct i2c_client *e = NULL; + int ret = 0; + int i,j; + + for(i=0; i +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//#include "I2CHostCommunication.h" + +#define USE_SMBUS 1 + +#define FAN_NUM 4 +#define PSU_NUM 2 + +struct __attribute__ ((__packed__)) psoc_psu_layout { + u16 psu1_iin; + u16 psu2_iin; + u16 psu1_iout; + u16 psu2_iout; + + u16 psu1_pin; + u16 psu2_pin; + u16 psu1_pout; + u16 psu2_pout; + + u16 psu1_vin; + u16 psu2_vin; + u16 psu1_vout; + u16 psu2_vout; + + u8 psu1_vendor[16]; + u8 psu2_vendor[16]; + u8 psu1_model[20]; + u8 psu2_model[20]; + u8 psu1_version[8]; + u8 psu2_version[8]; + u8 psu1_date[6]; + u8 psu2_date[6]; + u8 psu1_sn[20]; + u8 psu2_sn[20]; +}; + +struct __attribute__ ((__packed__)) psoc_layout { + u8 ctl; //offset: 0 + u16 switch_temp; //offset: 1 + u8 reserve0; //offset: 3 + + u8 fw_upgrade; //offset: 4 + + //i2c bridge + u8 i2c_st; //offset: 5 + u8 i2c_ctl; //offset: 6 + u8 i2c_addr; //offset: 7 + u8 i2c_data[0x20]; //offset: 8 + + //gpo + u8 led_ctl; //offset: 28 + + u8 gpio; //offset: 29 + + //pwm duty + u8 pwm[FAN_NUM]; //offset: 2a + u8 pwm_psu[PSU_NUM]; //offset: 2e + + //fan rpm + u16 fan[FAN_NUM*2]; //offset: 30 + + u8 reserve1[4]; //offset: 40 + + //gpi + u8 gpi_fan; //offset: 44 + + //psu state + u8 psu_state; //offset: 45 + + //temperature + u16 temp[5]; //offset: 46 + u16 temp_psu[PSU_NUM]; //offset: 50 + + //version + u8 version[2]; //offset: 54 + + u8 reserve2[4]; //offset: 56 + struct psoc_psu_layout psu_info; //offset: 5a +}; + +/* definition */ +/* definition */ +#define PSOC_OFF(m) offsetof(struct psoc_layout, m) +#define PSOC_PSU_OFF(m) offsetof(struct psoc_psu_layout, m) + +#define SWITCH_TMP_OFFSET PSOC_OFF(switch_temp) +#define PWM_OFFSET PSOC_OFF(pwm) +#define THERMAL_OFFSET PSOC_OFF(temp) +#define RPM_OFFSET PSOC_OFF(fan) +#define DIAG_FLAG_OFFSET PSOC_OFF(ctl) +#define FAN_LED_OFFSET PSOC_OFF(led_ctl) +#define FAN_GPI_OFFSET PSOC_OFF(gpi_fan) +#define PSOC_PSU_OFFSET PSOC_OFF(psu_state) +#define VERSION_OFFSET PSOC_OFF(version) +#define PSU_INFO_OFFSET PSOC_OFF(psu_info) + +/* Each client has this additional data */ +struct psoc_data { + struct device *hwmon_dev; + struct mutex update_lock; + u32 diag; +}; + +/*-----------------------------------------------------------------------*/ + +static ssize_t psoc_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg[0].buf = msgbuf; + msg[0].len = 1; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + + status = i2c_transfer(client->adapter, msg, 2); + + if(status == 2) + status = count; + + return status; +#endif +} + +static ssize_t psoc_i2c_write(struct i2c_client *client, char *buf, unsigned offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + + return status; +#endif +} + +#if 0 +static u32 psoc_read32(struct i2c_client *client, u8 offset) +{ + u32 value = 0; + u8 buf[4]; + + if( psoc_i2c_read(client, buf, offset, 4) == 4) + value = (buf[0]<<24 | buf[1]<<16 | buf[2]<<8 | buf[3]); + + return value; +} +#endif + +static u16 psoc_read16(struct i2c_client *client, u8 offset) +{ + u16 value = 0; + u8 buf[2]; + + if(psoc_i2c_read(client, buf, offset, 2) == 2) + value = (buf[0]<<8 | buf[1]<<0); + + return value; +} + +static u8 psoc_read8(struct i2c_client *client, u8 offset) +{ + u8 value = 0; + u8 buf = 0; + + if(psoc_i2c_read(client, &buf, offset, 1) == 1) + value = buf; + + return value; +} + +//PSOC i2c bridge regsters +#define PSOC_I2C_STATUS 0x05 +#define PSOC_I2C_CNTRL 0x06 +#define PSOC_I2C_ADDR 0x07 +#define PSOC_I2C_DATA 0x08 + +//status bit definition +#define PSOC_I2C_START (1 << 0) +#define PSOC_PMB_SEL (1 << 7) + +//addr bits definition +#define PSOC_I2C_READ (1 << 0) + +//PMBUS registers definition +#define PMBUS_READ_VIN (0x88) +#define PMBUS_READ_IIN (0x89) +#define PMBUS_READ_VOUT (0x8B) +#define PMBUS_READ_IOUT (0x8C) +#define PMBUS_READ_POUT (0x96) +#define PMBUS_READ_PIN (0x97) + +#define PMBUS_MFR_ID (0x99) +#define PMBUS_MFR_MODEL (0x9A) +#define PMBUS_MFR_REVISION (0x9B) +#define PMBUS_MFR_DATE (0x9D) +#define PMBUS_MFR_SERIAL (0x9E) + +static int psoc_i2c_bridge_read(struct i2c_client *client, + unsigned char bus, + unsigned char chip, + char *addr, int alen, + unsigned char *data, int len ) +{ + unsigned char txdata[28], rxdata[28]; + int index, timeout; + + txdata[PSOC_I2C_STATUS] = 0; /* the status */ + txdata[PSOC_I2C_CNTRL] = ((alen & 3) << 5) | (len & 0x1f); /* the sizes */ + txdata[PSOC_I2C_ADDR] = (chip << 1) | PSOC_I2C_READ; /* read address */ + for(index = 0; index < alen; index++) + txdata[PSOC_I2C_DATA + index] = addr[index]; /* the chip address */ + for(; index < alen+len; index++) + txdata[PSOC_I2C_DATA + index] = 0; /* clear the chip data */ + + psoc_i2c_write(client, &txdata[PSOC_I2C_CNTRL], PSOC_I2C_CNTRL, 2 + alen + len); + + //delay a while ??? + //--------------------------------------------------------------------- + //start write + txdata[PSOC_I2C_STATUS] = PSOC_I2C_START | PSOC_PMB_SEL; /* the start bit for the PM bus */ + psoc_i2c_write(client, &txdata[PSOC_I2C_STATUS], PSOC_I2C_STATUS, 1); + + //delay a while + timeout = 40; //40*20==>800 ms + do { + psoc_i2c_read(client, &rxdata[PSOC_I2C_STATUS], PSOC_I2C_STATUS, 1); + + //check rxdata[5] error bit(1) and complete bit(0) ,TBD + if((rxdata[PSOC_I2C_STATUS] & 0x2) == 0x2) { + //printk("i2c bridge fail!!!\n"); + timeout = 0; + break; + } + if((rxdata[PSOC_I2C_STATUS] & PSOC_I2C_START) == 0) { + /* comand complete */ + psoc_i2c_read(client, &rxdata[PSOC_I2C_DATA+alen], PSOC_I2C_DATA+alen, len); + break; + } + + //delay + msleep(20); + } while(timeout--); + + if(timeout <= 0) { + return -1; + } + + //--------------------------------------------------------------------- + + for(index=0; index < len; index++) { + data[index] = rxdata[PSOC_I2C_DATA + alen + index]; + } + + return 0; +} + + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu1 | psu0 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu_st(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 0)?3:0; + + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client, &byte, PSOC_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + +/*-----------------------------------------------------------------------*/ + +/* sysfs attributes for hwmon */ + +static ssize_t show_thermal(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index * 2 + THERMAL_OFFSET; + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + (s8)(status>>8) * 1000 ); +} + + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index + PWM_OFFSET; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t set_pwm(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index + PWM_OFFSET; + + u8 pwm = simple_strtol(buf, NULL, 10); + if(pwm > 255) pwm = 255; + + if(data->diag) { + mutex_lock(&data->update_lock); + psoc_i2c_write(client, &pwm, offset, 1); + mutex_unlock(&data->update_lock); + } + + return count; +} + + +static ssize_t show_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index*2 + RPM_OFFSET; + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t show_switch_tmp(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u16 temp = 0; + + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client, (u8*)&temp, SWITCH_TMP_OFFSET, 2); + mutex_unlock(&data->update_lock); + + status = sprintf (buf, "%d\n", (s8)(temp>>8) * 1000 ); + + return strlen(buf); +} + +static ssize_t set_switch_tmp(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + + long temp = simple_strtol(buf, NULL, 10); + u16 temp2 = ( (temp/1000) <<8 ) & 0xFF00 ; + + //printk("set_switch_tmp temp=%d, temp2=0x%x (%x,%x)\n", temp, temp2, ( ( (temp/1000) <<8 ) & 0xFF00 ), (( (temp%1000) / 10 ) & 0xFF)); + + mutex_lock(&data->update_lock); + psoc_i2c_write(client, (u8*)&temp2, SWITCH_TMP_OFFSET, 2); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_diag(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 diag_flag = 0; + + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client, (u8*)&diag_flag, DIAG_FLAG_OFFSET, 1); + mutex_unlock(&data->update_lock); + + data->diag = (diag_flag & 0x80)?1:0; + status = sprintf (buf, "%d\n", data->diag); + + return strlen(buf); +} + +static ssize_t set_diag(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 value = 0; + u8 diag = simple_strtol(buf, NULL, 10); + + diag = diag?1:0; + data->diag = diag; + + mutex_lock(&data->update_lock); + psoc_i2c_read(client, (u8*)&value, DIAG_FLAG_OFFSET, 1); + if(diag) value |= (1<<7); + else value &= ~(1<<7); + psoc_i2c_write(client, (u8*)&value, DIAG_FLAG_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, VERSION_OFFSET); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "ver: %x.%x\n", (status & 0xFF00)>>8, (status & 0xFF) ); +} + + +static ssize_t show_fan_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 bit = attr->index; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, FAN_LED_OFFSET); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + (status & (1<index; + u8 led_state = 0; + + u8 v = simple_strtol(buf, NULL, 10); + + if(data->diag) { + mutex_lock(&data->update_lock); + led_state = psoc_read8(client, FAN_LED_OFFSET); + if(v) led_state |= (1<update_lock); + } + + return count; +} + +static ssize_t show_value8(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "0x%02X\n", status ); +} + +static long pmbus_reg2data_linear(int data, int linear16) +{ + s16 exponent; + s32 mantissa; + long val; + + if (linear16) { /* LINEAR16 */ + exponent = -9; + mantissa = (u16) data; + } else { /* LINEAR11 */ + exponent = ((s16)data) >> 11; + exponent = ((s16)( data & 0xF800) ) >> 11; + mantissa = ((s32)((data & 0x7ff) << 5)) >> 5; + } + + //printk("data=%d, m=%d, e=%d\n", data, exponent, mantissa); + val = mantissa; + + /* scale result to micro-units for power sensors */ + val = val * 1000L; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +static ssize_t show_psu(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 reg = attr->index & 0xFF; + u8 len = ((attr->index & 0xFF00) >> 8); + u8 chip = (attr->index >> 16)? 0x59:0x58; + u8 bus = 1; + unsigned char value[2] = {0,0};; + + if (len == 2) + { + mutex_lock(&data->update_lock); + psoc_i2c_bridge_read(client, bus, chip, ®, 1, value, 2); + mutex_unlock(&data->update_lock); + + status = value[1]<<8 | value[0]; + //status1 = value[1]<<8 | value[0]; + + return sprintf(buf, "%ld\n", pmbus_reg2data_linear(status, (reg==PMBUS_READ_VOUT)?1:0) ); + } + else + { //len is not defined. + u8 tmpbuf[32]; + mutex_lock(&data->update_lock); + //length of block read + psoc_i2c_bridge_read(client, bus, chip, ®, 1, &len, 1); + //data included length + psoc_i2c_bridge_read(client, bus, chip, ®, 1, tmpbuf, len+1); + mutex_unlock(&data->update_lock); + + memcpy(buf, tmpbuf+1, len); + buf[len]='\n'; + + return len+1; + } +} + +static ssize_t show_psu_psoc(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = (attr->index & 0xFF) + PSU_INFO_OFFSET; + u8 len = (attr->index >> 8)& 0xFF; + u8 rxbuf[21] = {0}; + if (len == 2) + { + mutex_lock(&data->update_lock); + status = psoc_read16(client, offset); + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%ld \n", pmbus_reg2data_linear(status, strstr(attr->dev_attr.attr.name, "vout")? 1:0 )); + } + else + { + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client,rxbuf,offset,len); + mutex_unlock(&data->update_lock); + return sprintf(buf, "%s \n",rxbuf); + } +} + +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_thermal, 0, 0); +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_thermal, 0, 1); +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_thermal, 0, 2); +static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_thermal, 0, 3); +static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_thermal, 0, 4); +static SENSOR_DEVICE_ATTR(thermal_psu1, S_IRUGO, show_thermal, 0, 5); +static SENSOR_DEVICE_ATTR(thermal_psu2, S_IRUGO, show_thermal, 0, 6); + +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 0); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 1); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 2); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 3); +static SENSOR_DEVICE_ATTR(pwm_psu1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 4); +static SENSOR_DEVICE_ATTR(pwm_psu2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 5); + +static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu_st, 0, 0); +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu_st, 0, 1); + +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_rpm, 0, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_rpm, 0, 1); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_rpm, 0, 2); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_rpm, 0, 3); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_rpm, 0, 4); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_rpm, 0, 5); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_rpm, 0, 6); +static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_rpm, 0, 7); +static SENSOR_DEVICE_ATTR(rpm_psu1, S_IRUGO, show_rpm, 0, 8); +static SENSOR_DEVICE_ATTR(rpm_psu2, S_IRUGO, show_rpm, 0, 9); + +static SENSOR_DEVICE_ATTR(switch_tmp, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); +static SENSOR_DEVICE_ATTR(temp6_input, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); + +static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, 0, 0); + +static SENSOR_DEVICE_ATTR(fan_led_grn1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 0); +static SENSOR_DEVICE_ATTR(fan_led_grn2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 1); +static SENSOR_DEVICE_ATTR(fan_led_grn3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 2); +static SENSOR_DEVICE_ATTR(fan_led_grn4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 3); +static SENSOR_DEVICE_ATTR(fan_led_red1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 4); +static SENSOR_DEVICE_ATTR(fan_led_red2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 5); +static SENSOR_DEVICE_ATTR(fan_led_red3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 6); +static SENSOR_DEVICE_ATTR(fan_led_red4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 7); + +static SENSOR_DEVICE_ATTR(fan_gpi, S_IRUGO, show_value8, 0, FAN_GPI_OFFSET); + +static SENSOR_DEVICE_ATTR(psu1_vin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_VIN); +static SENSOR_DEVICE_ATTR(psu1_vout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_VOUT); +static SENSOR_DEVICE_ATTR(psu1_iin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_IIN); +static SENSOR_DEVICE_ATTR(psu1_iout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_IOUT); +static SENSOR_DEVICE_ATTR(psu1_pin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_PIN); +static SENSOR_DEVICE_ATTR(psu1_pout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_POUT); + +static SENSOR_DEVICE_ATTR(psu1_vendor, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_ID); +static SENSOR_DEVICE_ATTR(psu1_model, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu1_version, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu1_date, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_DATE); +static SENSOR_DEVICE_ATTR(psu1_sn, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_SERIAL); + +static SENSOR_DEVICE_ATTR(psu2_vin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_VIN); +static SENSOR_DEVICE_ATTR(psu2_vout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_VOUT); +static SENSOR_DEVICE_ATTR(psu2_iin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_IIN); +static SENSOR_DEVICE_ATTR(psu2_iout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_IOUT); +static SENSOR_DEVICE_ATTR(psu2_pin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_PIN); +static SENSOR_DEVICE_ATTR(psu2_pout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_POUT); + +static SENSOR_DEVICE_ATTR(psu2_vendor, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_ID); +static SENSOR_DEVICE_ATTR(psu2_model, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu2_version, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu2_date, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_DATE); +static SENSOR_DEVICE_ATTR(psu2_sn, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_SERIAL); + +static SENSOR_DEVICE_ATTR(psoc_psu1_vin, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_vout, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu1_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iin, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iout, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu1_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pin, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pout, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu1_pout)); + + +static SENSOR_DEVICE_ATTR(psoc_psu2_vin, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_vout, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu2_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iin, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iout, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu2_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pin, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu2_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pout, S_IRUGO, show_psu_psoc, 0, (0x02<<8)|PSOC_PSU_OFF(psu2_pout)); + +static SENSOR_DEVICE_ATTR(psoc_psu1_vendor, S_IRUGO, show_psu_psoc, 0, (0x10<<8)|PSOC_PSU_OFF(psu1_vendor)); +static SENSOR_DEVICE_ATTR(psoc_psu1_model, S_IRUGO, show_psu_psoc, 0, (0x14<<8)|PSOC_PSU_OFF(psu1_model)); +static SENSOR_DEVICE_ATTR(psoc_psu1_version, S_IRUGO, show_psu_psoc, 0, (0x08<<8)|PSOC_PSU_OFF(psu1_version)); +static SENSOR_DEVICE_ATTR(psoc_psu1_date, S_IRUGO, show_psu_psoc, 0, (0x06<<8)|PSOC_PSU_OFF(psu1_date)); +static SENSOR_DEVICE_ATTR(psoc_psu1_sn, S_IRUGO, show_psu_psoc, 0, (0x14<<8)|PSOC_PSU_OFF(psu1_sn)); +static SENSOR_DEVICE_ATTR(psoc_psu2_vendor, S_IRUGO, show_psu_psoc, 0, (0x10<<8)|PSOC_PSU_OFF(psu2_vendor)); +static SENSOR_DEVICE_ATTR(psoc_psu2_model, S_IRUGO, show_psu_psoc, 0, (0x14<<8)|PSOC_PSU_OFF(psu2_model)); +static SENSOR_DEVICE_ATTR(psoc_psu2_version, S_IRUGO, show_psu_psoc, 0, (0x08<<8)|PSOC_PSU_OFF(psu2_version)); +static SENSOR_DEVICE_ATTR(psoc_psu2_date, S_IRUGO, show_psu_psoc, 0, (0x06<<8)|PSOC_PSU_OFF(psu2_date)); +static SENSOR_DEVICE_ATTR(psoc_psu2_sn, S_IRUGO, show_psu_psoc, 0, (0x14<<8)|PSOC_PSU_OFF(psu2_sn)); + +static struct attribute *psoc_attributes[] = { + //thermal + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_temp4_input.dev_attr.attr, + &sensor_dev_attr_temp5_input.dev_attr.attr, + + &sensor_dev_attr_thermal_psu1.dev_attr.attr, + &sensor_dev_attr_thermal_psu2.dev_attr.attr, + + + //pwm + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, + &sensor_dev_attr_pwm_psu1.dev_attr.attr, + &sensor_dev_attr_pwm_psu2.dev_attr.attr, + + //rpm + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_fan8_input.dev_attr.attr, + + &sensor_dev_attr_rpm_psu1.dev_attr.attr, + &sensor_dev_attr_rpm_psu2.dev_attr.attr, + + //switch temperature + &sensor_dev_attr_switch_tmp.dev_attr.attr, + &sensor_dev_attr_temp6_input.dev_attr.attr, + //diag flag + &sensor_dev_attr_diag.dev_attr.attr, + + //version + &sensor_dev_attr_version.dev_attr.attr, + + //fan led + &sensor_dev_attr_fan_led_grn1.dev_attr.attr, + &sensor_dev_attr_fan_led_grn2.dev_attr.attr, + &sensor_dev_attr_fan_led_grn3.dev_attr.attr, + &sensor_dev_attr_fan_led_grn4.dev_attr.attr, + &sensor_dev_attr_fan_led_red1.dev_attr.attr, + &sensor_dev_attr_fan_led_red2.dev_attr.attr, + &sensor_dev_attr_fan_led_red3.dev_attr.attr, + &sensor_dev_attr_fan_led_red4.dev_attr.attr, + + //fan GPI + &sensor_dev_attr_fan_gpi.dev_attr.attr, + + //psu + &sensor_dev_attr_psu1_vin.dev_attr.attr, + &sensor_dev_attr_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psu1_iin.dev_attr.attr, + &sensor_dev_attr_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psu1_pin.dev_attr.attr, + &sensor_dev_attr_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psu2_vin.dev_attr.attr, + &sensor_dev_attr_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psu2_iin.dev_attr.attr, + &sensor_dev_attr_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psu2_pin.dev_attr.attr, + &sensor_dev_attr_psu2_pout.dev_attr.attr, + + &sensor_dev_attr_psu1_vendor.dev_attr.attr, + &sensor_dev_attr_psu1_model.dev_attr.attr, + &sensor_dev_attr_psu1_version.dev_attr.attr, + &sensor_dev_attr_psu1_date.dev_attr.attr, + &sensor_dev_attr_psu1_sn.dev_attr.attr, + &sensor_dev_attr_psu2_vendor.dev_attr.attr, + &sensor_dev_attr_psu2_model.dev_attr.attr, + &sensor_dev_attr_psu2_version.dev_attr.attr, + &sensor_dev_attr_psu2_date.dev_attr.attr, + &sensor_dev_attr_psu2_sn.dev_attr.attr, + + &sensor_dev_attr_psu0.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + + + //psu_psoc, new added on psoc 1.9 + &sensor_dev_attr_psoc_psu1_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pout.dev_attr.attr, + + //add info + &sensor_dev_attr_psoc_psu1_vendor.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_model.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_version.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_date.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_sn.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vendor.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_model.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_version.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_date.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_sn.dev_attr.attr, + NULL +}; + +static const struct attribute_group psoc_group = { + .attrs = psoc_attributes, +}; + +/*-----------------------------------------------------------------------*/ + +/* device probe and removal */ + +static int +psoc_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct psoc_data *data; + int status; + + printk("+%s\n", __func__); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct psoc_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->diag = 0; + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &psoc_group); + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &psoc_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int psoc_remove(struct i2c_client *client) +{ + struct psoc_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &psoc_group); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id psoc_ids[] = { + { "inv_psoc", 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, psoc_ids); + +static struct i2c_driver psoc_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_psoc", + }, + .probe = psoc_probe, + .remove = psoc_remove, + .id_table = psoc_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_psoc_init(void) +{ + return i2c_add_driver(&psoc_driver); +} + +static void __exit inv_psoc_exit(void) +{ + i2c_del_driver(&psoc_driver); +} + +MODULE_AUTHOR("eddie.lan "); +MODULE_DESCRIPTION("inv psoc driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_psoc_init); +module_exit(inv_psoc_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_pthread.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_pthread.c new file mode 100644 index 00000000000..7d3287a591c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_pthread.c @@ -0,0 +1,1312 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +/***************************** + Magnolia platform +******************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define SHOW_ATTR_WARNING ("N/A") +#define SHOW_ATTR_NOTPRINT ("Not Available") +#define SHOW_ATTR_NOTSUPPORT ("Not Support") + +#define INV_HWMID_MAX (10) +#define INV_HWMID_INIT (-1) + +/*access userspace data to kernel space*/ +#define ACC_R (0) +#define ACC_W (1) + +#define TINY_BUF_SIZE (8) +#define MAX_PATH_SIZE (64) +#define MIN_ACC_SIZE (32) +#define MAX_ACC_SIZE (256) + +/* + * LED definitions + */ +#define STATUS_LED_MODE_AUTO 0 +#define STATUS_LED_MODE_DIAG 1 +#define STATUS_LED_MODE_MANU 2 + +#define STATUS_LED_GRN0 10 // 0 - 000: off +#define STATUS_LED_GRN1 11 // 1 - 001: 0.5hz +#define STATUS_LED_GRN2 12 // 2 - 010: 1 hz +#define STATUS_LED_GRN3 13 // 3 - 011: 2 hz +#define STATUS_LED_GRN7 17 // 7 - 111: on +#define STATUS_LED_RED0 20 // 0 - 000: off +#define STATUS_LED_RED1 21 // 1 - 001: 0.5hz +#define STATUS_LED_RED2 22 // 2 - 010: 1 hz +#define STATUS_LED_RED3 23 // 3 - 011: 2 hz +#define STATUS_LED_RED7 27 // 7 - 111: on +#define STATUS_LED_INVALID 0 // Invalid + +ssize_t status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2); +ssize_t status_led_grn(const char *freq); +ssize_t status_led_red(const char *freq); +ssize_t status_led_diag_mode_enable(void); +ssize_t status_led_diag_mode_disable(void); +int status_led_check_color(void); +int status_led_check_diag_mode(void); + +#if 1 +/* For timestamps in SYSFS_LOG */ +#define SYSFS_LOG printk +#else +//#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[SYSFS] %s/%d: " fmt, __func__, __LINE__, ##args) +#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[p_thread] " fmt, ##args) +#endif + +#define INV_PTHREAD_KERNEL_MODULE (1) +#define SWITCH_HEALTH_LED_CHANGE_VIA_GPIO (1) + +/* inventec_class *********************************/ +static struct kobject *status_kobj; +static struct kset *status_kset; + + +static struct mutex rw_lock; + +static int hwm_psoc = INV_HWMID_INIT; +static int hwm_cpld = INV_HWMID_INIT; + +int get_hwm_psoc(void) +{ + return hwm_psoc; +} + +int get_hwm_cpld(void) +{ + return hwm_cpld; +} + +static ssize_t access_user_space(const char *name, int mode, char *buf, size_t len, loff_t offset) +{ + struct file *fp; + mm_segment_t fs; + loff_t pos = offset; + char *mark = NULL; + ssize_t vfs_ret = 0; + + if (mode == ACC_R) { + fp = filp_open(name, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_read(fp, buf, len, &pos); + + mark = strpbrk(buf, "\n"); + if (mark) + *mark = '\0'; + + filp_close(fp, NULL); + set_fs(fs); + } else if (mode == ACC_W) { + fp = filp_open(name, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_write(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + } + + return vfs_ret; +} + +int inventec_strtol(const char *sbufp, char **endp, unsigned int base) +{ + char *endptr; + int value = simple_strtol(sbufp, &endptr, base); + if (value == 0 && sbufp == endptr) { + *endp = NULL; + return value; + } + *endp = (char*)1; + return value; +} + +int inventec_singlechar_to_int(const char c) +{ + if ((c >= '0') && (c <= '9')) { + return (c - '0'); + } + else + if ((c >= 'a') && (c <= 'f')) { + return (c - 'a' + 10); + } + else + if ((c >= 'A') && (c <= 'F')) { + return (c - 'A' + 10); + } + return -1; +} + +int inventec_store_input(char *inputp, int count) +{ + int i = 0; + while(inputp[i] != '\n' && inputp[i] != '\0' && i < count) { + i++; + } + inputp[i] = '\0'; + return strlen(inputp); +} + +#if 0 +/* + * Time stamps for kernel log on yocto + */ +#include + +void SYSFS_LOG(char *fmt, ...) +{ + char buf[80], ts[32]; + va_list args; + int hlen; + + inventec_tmstmp(&ts[0]); + hlen = sprintf(buf, "[SYSFS] %s ", ts); // Do not edit this line + + va_start(args, fmt); + vsprintf(&buf[hlen-1], fmt, args); + va_end(args); + printk(KERN_WARNING "[p_thread] %s\n", buf); +} +#endif + +ssize_t +inventec_show_attr(char *buf_p, const char *invdevp) +{ + int inv_len = MAX_ACC_SIZE; /* INV driver return max length */ + char tmp_buf[MAX_ACC_SIZE]; + char *str_negative = "-", *mark = NULL; + + /* [Step2] Get data by uaccess */ + memset(tmp_buf, 0, sizeof(tmp_buf)); + mutex_lock(&rw_lock); + if (access_user_space(invdevp, ACC_R, tmp_buf, inv_len, 0) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + mutex_unlock(&rw_lock); + + /* [Step3] Check return value + * - Ex: When transceiver not plugged + * => SWPS return error code "-202" + * => Pic8 need return "NA" (assume) + */ + if (strcspn(tmp_buf, str_negative) == 0) { + /* error case: "-202" */ + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + + /* OK case:*/ + mark = strpbrk(tmp_buf, "\n"); + if (mark) { *mark = '\0'; } + + return sprintf(buf_p, "%s\n", tmp_buf); +} + +ssize_t +inventec_store_attr(const char *buf_p, size_t count, const char *invdevp) +{ + ssize_t ret = 0; + + /* [Step2] Get data by uaccess */ + mutex_lock(&rw_lock); + if ((ret = access_user_space(invdevp, ACC_W, (char*)buf_p, count, 0)) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return -EINVAL; + } + mutex_unlock(&rw_lock); + + /* OK case:*/ + return ret; +} + +int sysfs_detect_hwmon_index(void) +{ + char hwmon_buf[MAX_ACC_SIZE]; + char hwmon_path[MAX_PATH_SIZE]; + int hwid = 0; + + for (hwid = 0; + hwid < INV_HWMID_MAX && (hwm_psoc == INV_HWMID_INIT || hwm_cpld == INV_HWMID_INIT); + hwid++) { + memset(hwmon_buf, 0, sizeof(hwmon_buf)); + sprintf(hwmon_path, "/sys/class/hwmon/hwmon%d/device/name", hwid); + + inventec_show_attr(hwmon_buf, hwmon_path); + if (strncmp(hwmon_buf, "inv_psoc", 8) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_bmc", 7) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_cpld", 8) == 0) { + hwm_cpld = hwid; + } + } + if (hwid >= INV_HWMID_MAX) { + printk(KERN_ERR "[p_thread] detect hwmon index failed, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return -1; + } + printk(KERN_INFO "[p_thread] detect hwmon index success, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return 0; +} + +static int __init +inventec_class_init(void) +{ + mutex_init(&rw_lock); + +#ifdef INV_PTHREAD_KERNEL_MODULE + if (sysfs_detect_hwmon_index() < 0) { + return -1; + } +#endif + + printk(KERN_INFO "[p_thread] [%s/%d] Module initial success.\n",__func__,__LINE__); + + return 0; +} + +static void __exit +inventec_class_exit(void) +{ + printk(KERN_INFO "[p_thread] [%s/%d] Remove module.\n",__func__,__LINE__); +} + +/* fan device *************************************/ +#define FAN_DEV_PATH_STATE "/sys/class/hwmon/hwmon%d/device/fan_gpi" +#define FAN_DEV_PATH_FAN1_INPUT "/sys/class/hwmon/hwmon%d/device/fan1_input" +#define FAN_DEV_PATH_FAN2_INPUT "/sys/class/hwmon/hwmon%d/device/fan2_input" +#define FAN_DEV_PATH_FAN3_INPUT "/sys/class/hwmon/hwmon%d/device/fan3_input" +#define FAN_DEV_PATH_FAN4_INPUT "/sys/class/hwmon/hwmon%d/device/fan4_input" +#define FAN_DEV_PATH_FAN5_INPUT "/sys/class/hwmon/hwmon%d/device/fan5_input" +#define FAN_DEV_PATH_FAN6_INPUT "/sys/class/hwmon/hwmon%d/device/fan6_input" +#define FAN_DEV_PATH_FAN7_INPUT "/sys/class/hwmon/hwmon%d/device/fan7_input" +#define FAN_DEV_PATH_FAN8_INPUT "/sys/class/hwmon/hwmon%d/device/fan8_input" + +static char fan_dev_path_state[MAX_PATH_SIZE]; +static char fan_dev_path_fan1_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan2_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan3_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan4_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan5_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan6_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan7_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan8_input[MAX_PATH_SIZE]; + +void sysfs_fan_path_init(void) +{ + sprintf(&fan_dev_path_state[0], FAN_DEV_PATH_STATE, get_hwm_psoc()); + sprintf(&fan_dev_path_fan1_input[0],FAN_DEV_PATH_FAN1_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan2_input[0],FAN_DEV_PATH_FAN2_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan3_input[0],FAN_DEV_PATH_FAN3_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan4_input[0],FAN_DEV_PATH_FAN4_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan5_input[0],FAN_DEV_PATH_FAN5_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan6_input[0],FAN_DEV_PATH_FAN6_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan7_input[0],FAN_DEV_PATH_FAN7_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan8_input[0],FAN_DEV_PATH_FAN8_INPUT, get_hwm_psoc()); +} + +#define FAN_STATE_NORMAL "normal" +#define FAN_STATE_FAULTY "faulty" +#define FAN_STATE_UNINSTALLED "uninstalled" +#define FAN_STATE_UNKNOW "unknown state" +#define FAN_STATE_INVALID "Invalid state value" +#define FAN_STATE_READ_ERROR "state read error" + +#define FAN_LOG_UNINSTALLED "removed" +#define FAN_LOG_NORMAL "inserted" + +//#define FAN_STATE_BIT_NORMAL 0 +#define FAN_STATE_BIT_FAULTY 0 +#define FAN_STATE_BIT_UNINSTALLED 1 +#define FAN_STATE_BIT_UNKNOW 2 +#define FAN_STATE_BIT_INVALID 3 +#define FAN_STATE_BIT_READ_ERROR 4 + +static struct fans_tbl_s { + char *fan_name; + char *fan_front; + char *fan_rear; + unsigned int fan_state; +} fans_tbl[] = { + {"fan1", fan_dev_path_fan1_input, + fan_dev_path_fan2_input, 0}, + {"fan2", fan_dev_path_fan3_input, + fan_dev_path_fan4_input, 0}, + {"fan3", fan_dev_path_fan5_input, + fan_dev_path_fan6_input, 0}, + {"fan4", fan_dev_path_fan7_input, + fan_dev_path_fan8_input, 0}, +}; +#define FAN_TBL_TOTAL ( sizeof(fans_tbl)/ sizeof(const struct fans_tbl_s) ) + +#define FAN_STATE_CHECK(i,b) (fans_tbl[i].fan_state & (1< 0) + { + printk(KERN_ERR "[p_thread] All fans failed.\n"); + printk(KERN_ERR "[p_thread] System shutdown immediately in %d seconds.\n", cd_shutdown); + } + cd_shutdown -= 1; + } + return ret; +} + +/* End of faninfo_device */ + +static int __init +fan_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_fan_path_init(); +#endif + return 0; +} + + +static void __exit +fan_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove fan module.\n"); +} + +/* psu device *************************************/ +static unsigned int psu_voltin = 0; +#define PSU_VOLTIN_ACDC (70000) + +/* + * normal/unpower/uninstall/fault are PSU states output from driver level + * checkpsu/error are defined by sysfs + */ +#define PSU_STATE_VAL_NORMAL (0) +#define PSU_STATE_VAL_UNPOWER (2) +#define PSU_STATE_VAL_FAULT (4) +#define PSU_STATE_VAL_UNINSTALL (7) +#define PSU_STATE_VAL_CHECKPSU (8) +#define PSU_STATE_VAL_ERROR (9) + +#define PSU_STATE_NORMAL ("0 : normal") +#define PSU_STATE_UNPOWER ("2 : unpowered") +#define PSU_STATE_FAULT ("4 : fault") +#define PSU_STATE_UNINSTALL ("7 : not installed") +#define PSU_STATE_CHECKPSU ("8 : check psu") +#define PSU_STATE_ERROR ("9 : state error") + +#define PSU_STATE_LEN_NORMAL (strlen(PSU_STATE_NORMAL)) +#define PSU_STATE_LEN_UNPOWER (strlen(PSU_STATE_UNPOWER)) +#define PSU_STATE_LEN_FAULT (strlen(PSU_STATE_FAULT)) +#define PSU_STATE_LEN_UNINSTALL (strlen(PSU_STATE_UNINSTALL)) +#define PSU_STATE_LEN_CHECKPSU (strlen(PSU_STATE_CHECKPSU)) + +typedef struct { + char *inv_dev_attrp; + char *inv_dev_pathp; +} psu_dev_t; + +typedef struct { + const char *psu_name; + int psu_major; + dev_t psu_devt; + struct device *psu_dev_p; + psu_dev_t *psu_dev_namep; + int psu_dev_total; + char *psu_inv_pathp; + void *psu_tracking; + char *psu_currentin; + char *psu_currentout; + char *psu_powerin; + char *psu_powerout; + char *psu_voltin; + char *psu_voltout; +} psu_dev_group_t; + +#define PSU_DEV_PATH_TEMPLATE "/sys/class/hwmon/hwmon%d/device/%s" + +static char psu_dev_path_state[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltin[MAX_PATH_SIZE]; +#if 0 +static char psu_dev_path_vendor[MAX_PATH_SIZE]; +static char psu_dev_path_version[MAX_PATH_SIZE]; +static char psu_dev_path_sn[MAX_PATH_SIZE]; +static char psu_dev_path_temperature[MAX_PATH_SIZE]; +static char psu_dev_path_fan_speed[MAX_PATH_SIZE]; +static char psu_dev_path_fan_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_fan_faulty[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_psu_rpm[MAX_PATH_SIZE]; +#endif + +void sysfs_psu_path_init(void) +{ + sprintf(&psu_dev_path_state[0], PSU_DEV_PATH_TEMPLATE, get_hwm_cpld(), "\%s" ); + sprintf(&psu_dev_path_psu_voltin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#if 0 + sprintf(&psu_dev_path_vendor[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_version[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_sn[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_temperature[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_speed[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_faulty[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_voltout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_rpm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#endif +} + +static psu_dev_t psu_dev_name[] = { + { "state", psu_dev_path_state }, // Using cpld + { "psu_voltin", psu_dev_path_psu_voltin }, +#if 0 + { "vendor", psu_dev_path_vendor }, + { "version", psu_dev_path_version }, + { "sn", psu_dev_path_sn }, + { "temperature", psu_dev_path_temperature }, + { "fan_speed", psu_dev_path_fan_speed }, + { "fan_pwm", psu_dev_path_fan_pwm }, + { "fan_faulty", psu_dev_path_fan_faulty }, + { "psu_currentin", psu_dev_path_psu_currentin }, + { "psu_currentout", psu_dev_path_psu_currentout }, + { "psu_powerin", psu_dev_path_psu_powerin }, + { "psu_powerout", psu_dev_path_psu_powerout }, + { "psu_voltout", psu_dev_path_psu_voltout }, + { "psu_pwm", psu_dev_path_psu_pwm }, + { "psu_rpm", psu_dev_path_psu_rpm }, +#endif +}; +#define PSU_DEV_NAME_TOTAL ( sizeof(psu_dev_name) / sizeof(const psu_dev_t) ) + +static psu_dev_group_t psu_dev_group[] = { + { + .psu_name = "psu1", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, + { + .psu_name = "psu2", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, +}; +#define PSU_DEV_GROUP_TOTAL ( sizeof(psu_dev_group)/ sizeof(const psu_dev_group_t) ) + +static char psu_state[4][MIN_ACC_SIZE]; + +static struct psu_wire_tbl_s { + char *psu_attr; + char *psu_name; + char *psu_wire; + char *psu_state; +} psu_wire_tbl[] = { + { "state", "psu1", "psu0", psu_state[0] }, // Using cpld + { "state", "psu2", "psu1", psu_state[1] }, + { "psu_voltin", "psu1", "psoc_psu1_vin", psu_state[2] }, + { "psu_voltin", "psu2", "psoc_psu2_vin", psu_state[3] }, +}; +#define PSU_WIRE_TBL_TOTAL ( sizeof(psu_wire_tbl)/ sizeof(const struct psu_wire_tbl_s) ) + +static char * +psu_attr_get_wirep(const char *psu_attrp, const char *psu_namep, char **psu_statepp) +{ + int i; + + for (i = 0; i < PSU_WIRE_TBL_TOTAL; i++) { + if (strncmp(psu_wire_tbl[i].psu_attr, psu_attrp, strlen(psu_attrp)) == 0 && + strncmp(psu_wire_tbl[i].psu_name, psu_namep, strlen(psu_namep)) == 0) { + if (psu_statepp) { + *psu_statepp = psu_wire_tbl[i].psu_state; + } + return psu_wire_tbl[i].psu_wire; + } + } + return NULL; +} + +int psu_check_state_normal(char *statep) +{ + if (strstr(statep, "normal")) { + return 1; + } + return 0; +} + +#define PSU_ATTR_VOLTIN ("psu_voltin") +#define PSU_ATTR_VOLTIN_LEN (10) + +/* Get PSU voltin for determon AC(110v) or DC(48v) */ +void psu_get_voltin(void) +{ + char acc_path[MAX_PATH_SIZE], volt[MIN_ACC_SIZE]; + psu_dev_t *devnamep; + unsigned int voltin; + char *invwirep; + int i, j; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + //psu_dev_group[i].psu_name; + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_VOLTIN, PSU_ATTR_VOLTIN_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_VOLTIN, psu_dev_group[i].psu_name, NULL); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_DEBUG "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(volt, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + continue; + } + else { + voltin = simple_strtol(&volt[0], NULL, 10); + printk(KERN_DEBUG "[p_thread] Read %s %s = %u\n",acc_path,volt,voltin); + if (voltin > psu_voltin) { + psu_voltin = voltin; + } + } + } + } + } + + SYSFS_LOG("[p_thread] PSU voltin = %u\n", psu_voltin); +} + +#define PSU_ATTR_STATE ("state") +#define PSU_ATTR_STATE_LEN (5) + +/* psus_control() by inv_thread */ +int psus_control(int log_only) +{ + char acc_path[MAX_PATH_SIZE], state[MIN_ACC_SIZE]; + psu_dev_t *devnamep = NULL; + char *invwirep = NULL; + char *psu_statep = NULL; + int i, j, flag = 0; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_STATE, PSU_ATTR_STATE_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_STATE, psu_dev_group[i].psu_name, &psu_statep); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_INFO "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(state, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + if (strncmp(psu_statep, PSU_STATE_ERROR, strlen(PSU_STATE_ERROR)) != 0) { + strcpy(psu_statep, PSU_STATE_ERROR); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_ERROR); + } + flag = 1; + } + else + if (strstr(state, "normal")) { + //printk(KERN_INFO "[p_thread] %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + } + else + if (psu_voltin > PSU_VOLTIN_ACDC) { /* AC PSUS */ + //printk(KERN_INFO "[p_thread] RYU: %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + flag = 1; + } + else { /* DC PSUS */ + if (strncmp(psu_statep, PSU_STATE_CHECKPSU, PSU_STATE_LEN_CHECKPSU) != 0) { + strcpy(psu_statep, PSU_STATE_CHECKPSU); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_CHECKPSU); + } + flag = 1; + } + } + } + } + + if (log_only) { + return 0; + } + + //SYSFS_LOG("[p_thread] RYU: %s: flag = %d\n",psu_wire_tbl[i].psu_name,flag); + if (flag == 1) { + status_led_grn("3"); + return 1; + } + return 0; +} + +/* End of psuinfo_device */ + +static int __init +psu_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_psu_path_init(); +#endif + return 0; +} + + +static void __exit +psu_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove psu module.\n"); +} + +/* led device *************************************/ +#define STATUS_LED_GRN_PATH "/sys/class/hwmon/hwmon%d/device/grn_led" +#define STATUS_LED_RED_PATH "/sys/class/hwmon/hwmon%d/device/red_led" + +#define FAN_LED_GRN1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn1" +#define FAN_LED_GRN2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn2" +#define FAN_LED_GRN3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn3" +#define FAN_LED_GRN4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn4" +#define FAN_LED_RED1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red1" +#define FAN_LED_RED2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red2" +#define FAN_LED_RED3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red3" +#define FAN_LED_RED4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red4" + +#define HWMON_DEVICE_DIAG_PATH "/sys/class/hwmon/hwmon%d/device/diag" +#define HWMON_DEVICE_CTRL_PATH "/sys/class/hwmon/hwmon%d/device/ctl" + +static char status_led_grn_path[MAX_PATH_SIZE]; +static char status_led_red_path[MAX_PATH_SIZE]; +static char fan_led_grn1_path[MAX_PATH_SIZE]; +static char fan_led_grn2_path[MAX_PATH_SIZE]; +static char fan_led_grn3_path[MAX_PATH_SIZE]; +static char fan_led_grn4_path[MAX_PATH_SIZE]; +static char fan_led_red1_path[MAX_PATH_SIZE]; +static char fan_led_red2_path[MAX_PATH_SIZE]; +static char fan_led_red3_path[MAX_PATH_SIZE]; +static char fan_led_red4_path[MAX_PATH_SIZE]; +static char hwmon_device_diag_path[MAX_PATH_SIZE]; +static char hwmon_device_ctrl_path[MAX_PATH_SIZE]; + +void sysfs_led_path_init(void) +{ + sprintf(&status_led_grn_path[0], STATUS_LED_GRN_PATH, get_hwm_cpld()); + sprintf(&status_led_red_path[0], STATUS_LED_RED_PATH, get_hwm_cpld()); + sprintf(&fan_led_grn1_path[0], FAN_LED_GRN1_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn2_path[0], FAN_LED_GRN2_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn3_path[0], FAN_LED_GRN3_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn4_path[0], FAN_LED_GRN4_PATH, get_hwm_psoc()); + sprintf(&fan_led_red1_path[0], FAN_LED_RED1_PATH, get_hwm_psoc()); + sprintf(&fan_led_red2_path[0], FAN_LED_RED2_PATH, get_hwm_psoc()); + sprintf(&fan_led_red3_path[0], FAN_LED_RED3_PATH, get_hwm_psoc()); + sprintf(&fan_led_red4_path[0], FAN_LED_RED4_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_diag_path[0], HWMON_DEVICE_DIAG_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_ctrl_path[0], HWMON_DEVICE_CTRL_PATH, get_hwm_cpld()); +} + +/* return 0/off 1/green 2/red */ +int +status_led_check_color(void) +{ + char tmpbuf[MIN_ACC_SIZE]; + int ret = STATUS_LED_INVALID; + + if (inventec_show_attr(&tmpbuf[0], status_led_grn_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_GRN0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_GRN1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_GRN2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_GRN3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_GRN7; + } + return ret; + } + + if (inventec_show_attr(&tmpbuf[0], status_led_red_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_RED0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_RED1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_RED2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_RED3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_RED7; + } + return ret; + } + return ret; +} + +/* + * Store attr Section + */ +static DEFINE_MUTEX(diag_mutex); + +ssize_t status_led_diag_mode_enable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '0') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("1", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + mutex_unlock(&diag_mutex); + } + + return ret; +} + +ssize_t status_led_diag_mode_disable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '1') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("0", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + mutex_unlock(&diag_mutex); + } + return 1; +} + +ssize_t +status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2) +{ + ssize_t ret; + + ret = inventec_store_attr(tmp1, strlen(tmp1), path1); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(tmp2, strlen(tmp2), path2); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_red(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_grn_path[0]); + + if (ret < 0) { + return ret; + } + + ret = inventec_store_attr(freq, strlen(freq), &status_led_red_path[0]); + + if (ret < 0) { + return ret; + } + + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_grn(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +static int status_led_diag_mode = STATUS_LED_MODE_AUTO; + +int status_led_check_diag_mode(void) +{ + return status_led_diag_mode; +} + +/* End of ledinfo_device */ + +static int __init +led_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); +#endif + return 0; +} + + +static void __exit +led_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove led module.\n"); +} + +/* sensor device **********************************/ +#define SENSOR_DEV_PATH_SWITCH_TEMP "/sys/class/hwmon/hwmon%d/device/switch_tmp" + +static char sensor_dev_path_switch_temp[MAX_PATH_SIZE]; + +void sysfs_sensor_path_init(void) +{ + sprintf(&sensor_dev_path_switch_temp[0], SENSOR_DEV_PATH_SWITCH_TEMP, get_hwm_psoc()); +} + +void switch_temp_update(void) +{ + char buf[MIN_ACC_SIZE]; + ssize_t count = inventec_show_attr(&buf[0], "proc/switch/temp"); + if (count > 0) { + //printk(KERN_ERR "[p_thread] [STEMP] Switch temperature is out of range: %d\n", stemp); + inventec_store_attr(&buf[0], count, sensor_dev_path_switch_temp); + } +} + +/**************************************************/ +/* From system_device */ +static int inv_pthread_control = 1; + +int thread_control(void) +{ + return inv_pthread_control; +} + +void thread_control_set(int val) +{ + inv_pthread_control = val; +} +/* End system_device */ + +#define THREAD_SLEEP_MINS (3) +#define THREAD_DELAY_MINS (THREAD_SLEEP_MINS + THREAD_SLEEP_MINS + 1) + +extern void psu_get_voltin(void); + +static struct task_struct *thread_st; +static int thread_data; + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO +void led_set_gpio_to_change_status_led(void) +{ + ssize_t ret = inventec_store_attr("253", 3, "/sys/class/gpio/export"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 253 to /sys/class/gpio/export failed\n"); + return; + } + + printk("[p_thread] Write 253 to /sys/class/gpio/export\n"); + + ret = inventec_store_attr("out", 3, "/sys/class/gpio/gpio253/direction"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write low to /sys/class/gpio/gpio253/direction failed\n"); + return; + } + + //pull high and then low + ret = inventec_store_attr("1", 1, "sys/class/gpio/gpio253/value"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 1 to sys/class/gpio/gpio253/value failed\n"); + } + + //pull low + ret = inventec_store_attr("0", 1, "sys/class/gpio/gpio253/value"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 0 to sys/class/gpio/gpio253/value failed\n"); + } + + SYSFS_LOG("[p_thread] Set gpio to support status led change successfully\n"); +} +#endif + +// Function executed by kernel thread +static int thread_fn(void *unused) +{ + /* Delay for guarantee HW ready */ + ssleep(THREAD_DELAY_MINS); + +#ifndef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); + sysfs_fan_path_init(); + sysfs_psu_path_init(); +#endif + //sysfs_sensor_path_init(); + + /* Default status init */ + status_led_grn("7"); + + psu_get_voltin(); + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO + led_set_gpio_to_change_status_led(); +#endif + + while (1) + { + ssleep(THREAD_SLEEP_MINS); + + if (thread_control() == 0) { + printk(KERN_INFO "[p_thread] %s/%d: Thread Stop by inv_pthread control\n",__func__,__LINE__); + break; + } + + if (status_led_check_diag_mode() == STATUS_LED_MODE_MANU) { + /* status led in change color/freq mode, higher priority. Ignore fans sttaus */ + continue; + } + + //switch_temp_update(); + + if (fans_control() > 0) { + psus_control(1); + continue; + } + else + if (psus_control(0) > 0) { + continue; + } + + if (status_led_check_color() != STATUS_LED_GRN7) { /* status led red, change it to green */ + status_led_grn("7"); + } + } + +#ifndef INV_PTHREAD_KERNEL_MODULE +err_inv_pthread_fn_1: +#endif + do_exit(0); + printk(KERN_INFO "[p_thread] %s/%d: Thread Stopped\n",__func__,__LINE__); + return 0; +} + + +static ssize_t s_show(struct kobject *kobj, struct attribute *attr, char *buf) +{ + int fan_absence; + size_t count; + + fan_absence = fans_control(); + count += sprintf(&buf[count], "%d\n", fan_absence); + return count; +} + +static ssize_t s_store(struct kobject *kobj, struct attribute *attr, const char *buf, size_t count) +{ + return count; +} + +static struct attribute status_att = { + .name = "fan_absence", + .mode = 0777, +}; + +static const struct sysfs_ops status_ops = { + .show = s_show, + .store = s_store, +}; + +static struct kobj_type status_ktype = { + .sysfs_ops = &status_ops, +}; + + +static int __init inv_pthread_init(void) +{ + int retval; + + status_kobj = kzalloc(sizeof(*status_kobj), GFP_KERNEL); + if(!status_kobj) + return PTR_ERR(status_kobj); + + status_kset = kset_create_and_add("platform_status", NULL, kernel_kobj); + if(!status_kset) + return -1; + + status_kobj->kset = status_kset; + + retval = kobject_init_and_add(status_kobj, &status_ktype, NULL, "fan"); + if(retval) + return retval; + + retval = sysfs_create_file(status_kobj, &status_att); + + + inventec_class_init(); + fan_device_init(); + psu_device_init(); + led_device_init(); + + thread_control_set(1); + + printk(KERN_INFO "[p_thread] %s/%d: Creating Thread\n",__func__,__LINE__); + //Create the kernel thread with name 'inv_pthread' + thread_st = kthread_run(thread_fn, (void*)&thread_data, "inv_pthread"); + if (thread_st) + printk(KERN_INFO "[p_thread] inv_pthread Created successfully\n"); + else + printk(KERN_ERR "[p_thread] inv_pthread creation failed\n"); + + return retval; +} + +static void __exit inv_pthread_exit(void) +{ + thread_control_set(0); + /* Delay for guarantee thread exit */ + ssleep(THREAD_DELAY_MINS); + + fan_device_exit(); + psu_device_exit(); + led_device_exit(); + inventec_class_exit(); + + sysfs_remove_file(status_kobj, &status_att); + kset_unregister(status_kset); + kobject_del(status_kobj); + + printk(KERN_INFO "[p_thread] inv_pthread cleaning Up\n"); +} + +module_init(inv_pthread_init); +module_exit(inv_pthread_exit); + +MODULE_AUTHOR("Robert "); +MODULE_DESCRIPTION("Inventec Platform Management Thread"); +MODULE_VERSION("version 1.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_swps.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_swps.c new file mode 100644 index 00000000000..33074e5856b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_swps.c @@ -0,0 +1,3027 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "inv_swps.h" + +static int ctl_major; +static int port_major; +static int ioexp_total; +static int port_total; +static int auto_config; +static int flag_i2c_reset; +static int flag_mod_state; +static unsigned gpio_rest_mux; +static struct class *swp_class_p = NULL; +static struct inv_platform_s *platform_p = NULL; +static struct inv_ioexp_layout_s *ioexp_layout = NULL; +static struct inv_port_layout_s *port_layout = NULL; + +static void swp_polling_worker(struct work_struct *work); +static DECLARE_DELAYED_WORK(swp_polling, swp_polling_worker); + +static int reset_i2c_topology(void); + + +static int +__swp_match(struct device *dev, +#ifdef SWPS_KERN_VER_BF_3_8 + + const void *data){ +#else + void *data){ +#endif + + char *name = (char *)data; + if (strcmp(dev_name(dev), name) == 0) + return 1; + return 0; +} + + +struct device * +get_swpdev_by_name(char *name){ + struct device *dev = class_find_device(swp_class_p, + NULL, + name, + __swp_match); + return dev; +} + + +static int +sscanf_2_int(const char *buf) { + + int result = -EBFONT; + char *hex_tag = "0x"; + + if (strcspn(buf, hex_tag) == 0) { + if (sscanf(buf,"%x",&result)) { + return result; + } + } else { + if (sscanf(buf,"%d",&result)) { + return result; + } + if(sscanf(buf,"-%d",&result)) { + return -result; + } + if (sscanf(buf,"%x",&result)) { + return result; + } + } + return -EBFONT; +} + + +static int +sscanf_2_binary(const char *buf) { + + int result = sscanf_2_int(buf); + + if (result < 0){ + return -EBFONT; + } + switch (result) { + case 0: + case 1: + return result; + default: + break; + } + return -EBFONT; +} + + +static int +_get_polling_period(void) { + + int retval = 0; + + if (SWP_POLLING_PERIOD == 0) { + return 0; + } + retval = ((SWP_POLLING_PERIOD * HZ) / 1000); + if (retval == 0) { + return 1; + } + return retval; +} + + +static struct transvr_obj_s * +_get_transvr_obj(char *dev_name) { + + struct device *dev_p = NULL; + struct transvr_obj_s *transvr_obj_p = NULL; + + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + return NULL; + } + transvr_obj_p = dev_get_drvdata(dev_p); + if (!transvr_obj_p){ + return NULL; + } + return transvr_obj_p; +} + + +static void +unlock_tobj_all(void) { + + struct transvr_obj_s *tobj_p; + char port_name[32]; + int port_id = 0; + int minor_curr = 0; + + for (minor_curr=0; minor_currauto_config = auto_config; + unlock_transvr_obj(tobj_p); + SWPS_DEBUG("%s: Set %s auto_config=%d\n", + __func__, tobj_p->swp_name, auto_config); + } + return retval; +} + + +/* ========== R/W Functions module control attribute ========== + */ +static ssize_t +show_attr_platform(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 32, "%s\n", platform_p->name); +} + + +static ssize_t +show_attr_version(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%s\n", SWP_VERSION); +} + + +static ssize_t +show_attr_status(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", flag_mod_state); +} + + +static ssize_t +show_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", auto_config); +} + + +static int +_check_reset_pwd(const char *buf_p, + size_t count) { + + int in_max = 64; + int in_len = (int)count; + char in_val[64] = "ERR"; + char *emsg = "ERR"; + + if (in_len >= in_max) { + emsg = "input too much"; + goto err_check_reset_pwd; + } + if (!sscanf(buf_p,"%s",in_val)) { + emsg = "format incorrect"; + goto err_check_reset_pwd; + } + if (strcmp(in_val, SWP_RESET_PWD) != 0) { + emsg = "password incorrect"; + goto err_check_reset_pwd; + } + return 0; + +err_check_reset_pwd: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} + + +static ssize_t +store_attr_reset_i2c(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + /* Polling mode */ + if (SWP_POLLING_ENABLE) { + SWPS_INFO("%s: reset I2C :polling\n", __func__); + flag_i2c_reset = 1; + return count; + } + /* Direct mode */ + SWPS_INFO("%s: reset I2C go. :direct\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset fail!\n", __func__); + return -EIO; + } + SWPS_INFO("%s: reset I2C ok. :direct\n", __func__); + return count; +} + + +static ssize_t +store_attr_reset_swps(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p; + char port_name[32] = "ERR"; + int port_id = 0; + int minor_curr = 0; + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + for (minor_curr=0; minor_currstate = STATE_TRANSVR_DISCONNECTED; + unlock_transvr_obj(tobj_p); + SWPS_INFO("%s: reset:%s\n", __func__, tobj_p->swp_name); + } + return count; +} + + +static ssize_t +store_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if (input_val < 0){ + return -EBFONT; + } + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + auto_config = input_val; + _update_auto_config_2_trnasvr(); + return count; +} + + +/* ========== Show functions: For transceiver attribute ========== + */ +static ssize_t +_show_transvr_hex_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + int result; + + lock_transvr_obj(tobj_p); + result = get_func(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 8, "%d\n", result); + } else { + len = snprintf(buf_p, 8, "0x%02x\n", result); + } + return len; +} + + +static ssize_t +_show_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = snprintf(buf_p, 16, "%d\n", get_func(tobj_p)); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +_show_transvr_str_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p, char* buf), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = get_func(tobj_p, buf_p); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +show_attr_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_id, + buf_p); +} + + +static ssize_t +show_attr_ext_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_ext_id, + buf_p); +} + + +static ssize_t +show_attr_connector(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_connector, + buf_p); +} + + +static ssize_t +show_attr_vendor_name(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_name, + buf_p); +} + + +static ssize_t +show_attr_vendor_pn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_pn, + buf_p); +} + + +static ssize_t +show_attr_vendor_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_rev, + buf_p); +} + + +static ssize_t +show_attr_vendor_sn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_sn, + buf_p); +} + + +static ssize_t +show_attr_power_cls(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + size_t len; + int result; + struct transvr_obj_s *tobj_p; + + tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + lock_transvr_obj(tobj_p); + result = tobj_p->get_power_cls(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 16, "%d\n", result); + } else { + len = snprintf(buf_p, 16, "Power Class %d\n", result); + } + return len; +} + + +static ssize_t +show_attr_br(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_br, + buf_p); +} + + +static ssize_t +show_attr_len_sm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_sm, + buf_p); +} + + +static ssize_t +show_attr_len_smf(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_smf, + buf_p); +} + + +static ssize_t +show_attr_len_om1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om1, + buf_p); +} + + +static ssize_t +show_attr_len_om2(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om2, + buf_p); +} + + +static ssize_t +show_attr_len_om3(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om3, + buf_p); +} + + +static ssize_t +show_attr_len_om4(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om4, + buf_p); +} + + +static ssize_t +show_attr_comp_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_rev, + buf_p); +} + + +static ssize_t +show_attr_comp_eth(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_1, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10_40(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10_40, + buf_p); +} + + +static ssize_t +show_attr_comp_extend(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_extend, + buf_p); +} + + +static ssize_t +show_attr_rate_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_rate_id, + buf_p); +} + + +static ssize_t +show_attr_temperature(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_temp, + buf_p); +} + + +static ssize_t +show_attr_voltage(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_vol, + buf_p); +} + + +static ssize_t +show_attr_tx_bias(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_bias, + buf_p); +} + + +static ssize_t +show_attr_tx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power, + buf_p); +} + + +static ssize_t +show_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_eq, + buf_p); +} + + +static ssize_t +show_attr_rx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power, + buf_p); +} + + +static ssize_t +show_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_am, + buf_p); +} + + +static ssize_t +show_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_em, + buf_p); +} + + +static ssize_t +show_attr_wavelength(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_wavelength, + buf_p); +} + + +static ssize_t +show_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_offset, + buf_p); +} + + +static ssize_t +show_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_reg, + buf_p); +} + + +static ssize_t +show_attr_info(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_info, + buf_p); +} + + +static ssize_t +show_attr_if_type(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_type, + buf_p); +} + + +static ssize_t +show_attr_if_speed(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_speed, + buf_p); +} + + +static ssize_t +show_attr_if_lane(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_lane, + buf_p); +} + + +static ssize_t +show_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_cdr, + buf_p); +} + + +static ssize_t +show_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs0, + buf_p); +} + + +static ssize_t +show_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs1, + buf_p); +} + + +static ssize_t +show_attr_soft_rx_los(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_rx_los, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_auto_tx_disable, + buf_p); +} + + +/* ========== Store functions: transceiver (R/W) attribute ========== + */ +static ssize_t +_store_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_byte_hex_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if ((input < 0) || (input > 0xff)){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_binary_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_binary(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_cdr, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs1, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int check = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((check < 0) || (check > 0xf)){ + return -EBFONT; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_soft_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int err = -EPERM; + int input = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((input < 0) || (input > 0xf)){ + if (input != VAL_TRANSVR_FUNCTION_DISABLE) { + return -EBFONT; + } + } + lock_transvr_obj(tobj_p); + err = tobj_p->set_auto_tx_disable(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_tx_eq, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_am, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_em, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_offset, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_reg, + buf_p, + count); +} + +/* ========== Show functions: For I/O Expander attribute ========== + */ +static ssize_t +_show_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*get_func)(struct ioexp_obj_s *ioexp_p, int voffset), + char *buf_p) { + size_t len; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR(" %s: data corruption! :%s\n", __func__, tobj_p->swp_name); + return -ENODATA; + } + mutex_lock(&ioexp_p->lock); + len = snprintf(buf_p, 8, "%d\n", get_func(ioexp_p, tobj_p->ioexp_virt_offset)); + mutex_unlock(&ioexp_p->lock); + return len; +} + + +static ssize_t +show_attr_present(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_present, + buf_p); +} + + +static ssize_t +show_attr_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_rxlos(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_rxlos, + buf_p); +} + + +static ssize_t +show_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_reset, + buf_p); +} + + +static ssize_t +show_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_lpmod, + buf_p); +} + + +static ssize_t +show_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_modsel, + buf_p); +} + + +static ssize_t +show_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs0, + buf_p); +} + + +static ssize_t +show_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs1, + buf_p); +} + + +/* ========== Store functions: For I/O Expander (R/W) attribute ========== + */ +static ssize_t +_store_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*set_func)(struct ioexp_obj_s *ioexp_p, + int virt_offset, int input_val), + const char *buf_p, + size_t count) { + + int input, err; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR("%s: data corruption! :%s\n", + __func__, tobj_p->swp_name); + return -ENODATA; + } + input = sscanf_2_binary(buf_p); + if (input < 0) { + return -EBFONT; + } + mutex_lock(&ioexp_p->lock); + err = set_func(ioexp_p, tobj_p->ioexp_virt_offset, input); + mutex_unlock(&ioexp_p->lock); + if (err < 0){ + return err; + } + return count; +} + +static ssize_t +store_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_reset, + buf_p, + count); +} + + +static ssize_t +store_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_lpmod, + buf_p, + count); +} + + +static ssize_t +store_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_modsel, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs1, + buf_p, + count); +} + + +/* ========== SWPS attribute: For module control ========== + */ +static DEVICE_ATTR(platform, S_IRUGO, show_attr_platform, NULL); +static DEVICE_ATTR(version, S_IRUGO, show_attr_version, NULL); +static DEVICE_ATTR(status, S_IRUGO, show_attr_status, NULL); +static DEVICE_ATTR(reset_i2c, S_IWUSR, NULL, store_attr_reset_i2c); +static DEVICE_ATTR(reset_swps, S_IWUSR, NULL, store_attr_reset_swps); +static DEVICE_ATTR(auto_config, S_IRUGO|S_IWUSR, show_attr_auto_config, store_attr_auto_config); + +/* ========== Transceiver attribute: from eeprom ========== + */ +static DEVICE_ATTR(id, S_IRUGO, show_attr_id, NULL); +static DEVICE_ATTR(ext_id, S_IRUGO, show_attr_ext_id, NULL); +static DEVICE_ATTR(connector, S_IRUGO, show_attr_connector, NULL); +static DEVICE_ATTR(vendor_name, S_IRUGO, show_attr_vendor_name, NULL); +static DEVICE_ATTR(vendor_pn, S_IRUGO, show_attr_vendor_pn, NULL); +static DEVICE_ATTR(vendor_rev, S_IRUGO, show_attr_vendor_rev, NULL); +static DEVICE_ATTR(vendor_sn, S_IRUGO, show_attr_vendor_sn, NULL); +static DEVICE_ATTR(power_cls, S_IRUGO, show_attr_power_cls, NULL); +static DEVICE_ATTR(br, S_IRUGO, show_attr_br, NULL); +static DEVICE_ATTR(len_sm, S_IRUGO, show_attr_len_sm, NULL); +static DEVICE_ATTR(len_smf, S_IRUGO, show_attr_len_smf, NULL); +static DEVICE_ATTR(len_om1, S_IRUGO, show_attr_len_om1, NULL); +static DEVICE_ATTR(len_om2, S_IRUGO, show_attr_len_om2, NULL); +static DEVICE_ATTR(len_om3, S_IRUGO, show_attr_len_om3, NULL); +static DEVICE_ATTR(len_om4, S_IRUGO, show_attr_len_om4, NULL); +static DEVICE_ATTR(comp_rev, S_IRUGO, show_attr_comp_rev, NULL); +static DEVICE_ATTR(comp_eth, S_IRUGO, show_attr_comp_eth, NULL); +static DEVICE_ATTR(comp_eth_10, S_IRUGO, show_attr_comp_eth_10, NULL); +static DEVICE_ATTR(comp_eth_10_40, S_IRUGO, show_attr_comp_eth_10_40, NULL); +static DEVICE_ATTR(comp_extend, S_IRUGO, show_attr_comp_extend, NULL); +static DEVICE_ATTR(rate_id, S_IRUGO, show_attr_rate_id, NULL); +static DEVICE_ATTR(temperature, S_IRUGO, show_attr_temperature, NULL); +static DEVICE_ATTR(voltage, S_IRUGO, show_attr_voltage, NULL); +static DEVICE_ATTR(tx_bias, S_IRUGO, show_attr_tx_bias, NULL); +static DEVICE_ATTR(tx_power, S_IRUGO, show_attr_tx_power, NULL); +static DEVICE_ATTR(rx_power, S_IRUGO, show_attr_rx_power, NULL); +static DEVICE_ATTR(info, S_IRUGO, show_attr_info, NULL); +static DEVICE_ATTR(if_type, S_IRUGO, show_attr_if_type, NULL); +static DEVICE_ATTR(if_speed, S_IRUGO, show_attr_if_speed, NULL); +static DEVICE_ATTR(if_lane, S_IRUGO, show_attr_if_lane, NULL); +static DEVICE_ATTR(soft_rx_los, S_IRUGO, show_attr_soft_rx_los, NULL); +static DEVICE_ATTR(soft_tx_fault, S_IRUGO, show_attr_soft_tx_fault, NULL); +static DEVICE_ATTR(wavelength, S_IRUGO, show_attr_wavelength, NULL); +static DEVICE_ATTR(tx_eq, S_IRUGO|S_IWUSR, show_attr_tx_eq, store_attr_tx_eq); +static DEVICE_ATTR(rx_am, S_IRUGO|S_IWUSR, show_attr_rx_am, store_attr_rx_am); +static DEVICE_ATTR(rx_em, S_IRUGO|S_IWUSR, show_attr_rx_em, store_attr_rx_em); +static DEVICE_ATTR(cdr, S_IRUGO|S_IWUSR, show_attr_cdr, store_attr_cdr); +static DEVICE_ATTR(soft_rs0, S_IRUGO|S_IWUSR, show_attr_soft_rs0, store_attr_soft_rs0); +static DEVICE_ATTR(soft_rs1, S_IRUGO|S_IWUSR, show_attr_soft_rs1, store_attr_soft_rs1); +static DEVICE_ATTR(soft_tx_disable, S_IRUGO|S_IWUSR, show_attr_soft_tx_disable, store_attr_soft_tx_disable); +static DEVICE_ATTR(auto_tx_disable, S_IRUGO|S_IWUSR, show_attr_auto_tx_disable, store_attr_auto_tx_disable); +static DEVICE_ATTR(extphy_offset, S_IRUGO|S_IWUSR, show_attr_extphy_offset, store_attr_extphy_offset); +static DEVICE_ATTR(extphy_reg, S_IRUGO|S_IWUSR, show_attr_extphy_reg, store_attr_extphy_reg); + +/* ========== IO Expander attribute: from expander ========== + */ +static DEVICE_ATTR(present, S_IRUGO, show_attr_present, NULL); +static DEVICE_ATTR(tx_fault, S_IRUGO, show_attr_tx_fault, NULL); +static DEVICE_ATTR(rxlos, S_IRUGO, show_attr_rxlos, NULL); +static DEVICE_ATTR(tx_disable, S_IRUGO|S_IWUSR, show_attr_tx_disable, store_attr_tx_disable); +static DEVICE_ATTR(reset, S_IRUGO|S_IWUSR, show_attr_reset, store_attr_reset); +static DEVICE_ATTR(lpmod, S_IRUGO|S_IWUSR, show_attr_lpmod, store_attr_lpmod); +static DEVICE_ATTR(modsel, S_IRUGO|S_IWUSR, show_attr_modsel, store_attr_modsel); +static DEVICE_ATTR(hard_rs0, S_IRUGO|S_IWUSR, show_attr_hard_rs0, store_attr_hard_rs0); +static DEVICE_ATTR(hard_rs1, S_IRUGO|S_IWUSR, show_attr_hard_rs1, store_attr_hard_rs1); + +/* ========== Functions for module handling ========== + */ +static void +clean_port_obj(void){ + + dev_t dev_num; + char dev_name[32]; + struct device *device_p; + struct transvr_obj_s *transvr_obj_p; + int minor_curr, port_id; + + for (minor_curr=0; minor_curri2c_client_p); + kfree(transvr_obj_p->vendor_name); + kfree(transvr_obj_p->vendor_pn); + kfree(transvr_obj_p->vendor_rev); + kfree(transvr_obj_p->vendor_sn); + kfree(transvr_obj_p->worker_p); + kfree(transvr_obj_p); + } + dev_num = MKDEV(port_major, minor_curr); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static void +clean_swps_common(void){ + + dev_t dev_num; + struct device *device_p; + + device_p = get_swpdev_by_name(SWP_DEV_MODCTL); + if (device_p){ + dev_num = MKDEV(ctl_major, 1); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + cancel_delayed_work_sync(&swp_polling); + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static int +get_platform_type(void){ + + int i; + int pf_total = ARRAY_SIZE(platform_map); + char log_msg[64] = "ERROR"; + + platform_p = kzalloc(sizeof(struct inv_platform_s), GFP_KERNEL); + if (!platform_p){ + snprintf(log_msg, sizeof(log_msg), "kzalloc fail"); + goto err_get_platform_type_1; + } + memset(platform_p->name, 0, sizeof(platform_p->name)); + + switch (PLATFORM_SETTINGS) { + case PLATFORM_TYPE_AUTO: + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", dmi_get_system_info(DMI_BOARD_NAME)); + for (i=0; iname, platform_map[i].name) == 0) { + platform_p->id = platform_map[i].id; + snprintf(log_msg, sizeof(log_msg), + "Auto detect platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Auto detect fail! detect platform: %s", + platform_p->name); + goto err_get_platform_type_2; + + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + case PLATFORM_TYPE_REDWOOD: + case PLATFORM_TYPE_REDWOOD_FSL: + case PLATFORM_TYPE_HUDSON32I_GA: + case PLATFORM_TYPE_SPRUCE: + case PLATFORM_TYPE_CYPRESS_GA1: + case PLATFORM_TYPE_CYPRESS_GA2: + case PLATFORM_TYPE_CYPRESS_BAI: + case PLATFORM_TYPE_TAHOE: + case PLATFORM_TYPE_SEQUOIA_GA: + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + platform_p->id = PLATFORM_SETTINGS; + for (i=0; iname, (sizeof(platform_p->name) - 1), + "%s", platform_map[i].name); + snprintf(log_msg, sizeof(log_msg), + "User setup platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Internal error, can not map id:%d", + PLATFORM_SETTINGS); + goto err_get_platform_type_2; + + default: + break; + } + snprintf(log_msg, sizeof(log_msg), + "PLATFORM_SETTINGS:%d undefined", PLATFORM_SETTINGS); + goto err_get_platform_type_2; + +ok_get_platform_type_1: + SWPS_DEBUG("%s: %s, :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return 0; + +err_get_platform_type_2: + kfree(platform_p); +err_get_platform_type_1: + SWPS_ERR("%s: %s :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return -1; +} + + +static int +get_layout_info(void){ + + switch (platform_p->id) { +#ifdef SWPS_MAGNOLIA + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + gpio_rest_mux = magnolia_gpio_rest_mux; + ioexp_layout = magnolia_ioexp_layout; + port_layout = magnolia_port_layout; + ioexp_total = ARRAY_SIZE(magnolia_ioexp_layout); + port_total = ARRAY_SIZE(magnolia_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD + case PLATFORM_TYPE_REDWOOD: + gpio_rest_mux = redwood_gpio_rest_mux; + ioexp_layout = redwood_ioexp_layout; + port_layout = redwood_port_layout; + ioexp_total = ARRAY_SIZE(redwood_ioexp_layout); + port_total = ARRAY_SIZE(redwood_port_layout); + break; +#endif +#ifdef SWPS_HUDSON32I_GA + case PLATFORM_TYPE_HUDSON32I_GA: + gpio_rest_mux = hudsin32iga_gpio_rest_mux; + ioexp_layout = hudson32iga_ioexp_layout; + port_layout = hudson32iga_port_layout; + ioexp_total = ARRAY_SIZE(hudson32iga_ioexp_layout); + port_total = ARRAY_SIZE(hudson32iga_port_layout); + break; +#endif +#ifdef SWPS_SPRUCE + case PLATFORM_TYPE_SPRUCE: + gpio_rest_mux = spruce_gpio_rest_mux; + ioexp_layout = spruce_ioexp_layout; + port_layout = spruce_port_layout; + ioexp_total = ARRAY_SIZE(spruce_ioexp_layout); + port_total = ARRAY_SIZE(spruce_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA1 + case PLATFORM_TYPE_CYPRESS_GA1: + gpio_rest_mux = cypress_ga1_gpio_rest_mux; + ioexp_layout = cypress_ga1_ioexp_layout; + port_layout = cypress_ga1_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga1_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga1_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA2 + case PLATFORM_TYPE_CYPRESS_GA2: + gpio_rest_mux = cypress_ga2_gpio_rest_mux; + ioexp_layout = cypress_ga2_ioexp_layout; + port_layout = cypress_ga2_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga2_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga2_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_BAI + case PLATFORM_TYPE_CYPRESS_BAI: + gpio_rest_mux = cypress_b_gpio_rest_mux; + ioexp_layout = cypress_b_ioexp_layout; + port_layout = cypress_b_port_layout; + ioexp_total = ARRAY_SIZE(cypress_b_ioexp_layout); + port_total = ARRAY_SIZE(cypress_b_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD_FSL + case PLATFORM_TYPE_REDWOOD_FSL: + gpio_rest_mux = redwood_fsl_gpio_rest_mux; + ioexp_layout = redwood_fsl_ioexp_layout; + port_layout = redwood_fsl_port_layout; + ioexp_total = ARRAY_SIZE(redwood_fsl_ioexp_layout); + port_total = ARRAY_SIZE(redwood_fsl_port_layout); + break; +#endif +#ifdef SWPS_TAHOE + case PLATFORM_TYPE_TAHOE: + gpio_rest_mux = tahoe_gpio_rest_mux; + ioexp_layout = tahoe_ioexp_layout; + port_layout = tahoe_port_layout; + ioexp_total = ARRAY_SIZE(tahoe_ioexp_layout); + port_total = ARRAY_SIZE(tahoe_port_layout); + break; +#endif +#ifdef SWPS_SEQUOIA + case PLATFORM_TYPE_SEQUOIA_GA: + gpio_rest_mux = sequoia_gpio_rest_mux; + ioexp_layout = sequoia_ioexp_layout; + port_layout = sequoia_port_layout; + ioexp_total = ARRAY_SIZE(sequoia_ioexp_layout); + port_total = ARRAY_SIZE(sequoia_port_layout); + break; +#endif +#ifdef SWPS_LAVENDER + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + gpio_rest_mux = lavender_gpio_rest_mux; + ioexp_layout = lavender_ioexp_layout; + port_layout = lavender_port_layout; + ioexp_total = ARRAY_SIZE(lavender_ioexp_layout); + port_total = ARRAY_SIZE(lavender_port_layout); + break; +#endif + default: + SWPS_ERR(" Invalid platform: %d (%s)\n", + platform_p->id, platform_p->name); + return -1; + } + SWPS_INFO("Start to initial platform: %d (%s)\n", + platform_p->id, platform_p->name); + return 0; +} + + +/* ========== Functions for objects operations ========== + */ +static int +__detect_issues_port(int minor_num) { + + struct transvr_obj_s *tobj_p; + int port_id = port_layout[minor_num].port_id; + char port_name[32] = "ERR"; + char *i2c_emsg = "detected bad transceiver/cable"; + + memset(port_name, 0, sizeof(port_name)); + snprintf(port_name, sizeof(port_name), "%s%d", SWP_DEV_PORT, port_id); + tobj_p = _get_transvr_obj(port_name); + if (!tobj_p) { + SWPS_INFO("%s: tobj_p is NULL :%d\n", __func__, minor_num); + return -1; + } + if (resync_channel_tier_2(tobj_p) < 0) { + if (check_channel_tier_1() < 0) { + alarm_msg_2_user(tobj_p, i2c_emsg); + return -2;; + } + } + return 0; +} + + +static int +_detect_issues_port(void) { + /* OK : retrun -1; + * Fail: return fail at which minor number (0~N) + */ + char *emsg = "ERR"; + int minor = 0; + int minor_2st = 1; + + /* Force moving the initial channel pointer + * Filter out case of fail at minor-0 port + */ + while (minor_2st < port_total) { + minor = minor_2st; + if (__detect_issues_port(minor_2st) < 0) { + emsg = "detect minor_2st fail"; + goto err_p_detect_issues_port; + } + minor_2st += 8; + } + /* Scan all port */ + for (minor=0; minor:%d\n", __func__, emsg, minor_err); + return -1; +} + + +static int +check_transvr_obj_one(char *dev_name){ + /* [Return] + * 0 : Doesn't need to take care + * -1 : Single error + * -2 : Critical error (I2C topology die) + * -9 : Internal error + */ + struct transvr_obj_s *tobj_p = NULL; + int retval = -9; + + tobj_p = _get_transvr_obj(dev_name); + if (!tobj_p) { + SWPS_ERR("%s: %s _get_transvr_obj fail\n", + __func__, dev_name); + return -9; + } + /* Check transceiver current status */ + lock_transvr_obj(tobj_p); + retval = tobj_p->check(tobj_p); + unlock_transvr_obj(tobj_p); + switch (retval) { + case 0: + case ERR_TRANSVR_UNPLUGGED: + case ERR_TRNASVR_BE_ISOLATED: + case ERR_TRANSVR_TASK_BUSY: + return 0; + + case ERR_TRANSVR_I2C_CRASH: + default: + break; + } + /* Identify abnormal case */ + if (check_channel_tier_1() < 0) { + SWPS_DEBUG("%s: %s critical error :%d\n", + __func__, dev_name, retval); + return -2; + } + SWPS_DEBUG("%s: %s single error :%d\n", + __func__, dev_name, retval); + return -1; +} + + +static int +check_transvr_objs(void){ + + char dev_name[32]; + int port_id, err_code; + int minor_curr = 0; + + for (minor_curr=0; minor_curr:%d\n", + __func__, dev_name, err_code); + break; + } + } + return 0; + +err_check_transvr_objs: + SWPS_ERR("%s: %s reset_i2c_topology fail.\n", + __func__, dev_name); + return -1; +} + + +static void +swp_polling_worker(struct work_struct *work){ + + /* Reset I2C */ + if (flag_i2c_reset) { + goto polling_reset_i2c; + } + /* Check IOEXP */ + if (check_ioexp_objs() < 0) { + goto polling_reset_i2c; + } + /* Check transceiver */ + if (check_transvr_objs() < 0) { + SWPS_DEBUG("%s: check_transvr_objs fail.\n", __func__); + flag_i2c_reset = 1; + } + goto polling_schedule_round; + +polling_reset_i2c: + SWPS_DEBUG("%s: reset_i2c_topology start.\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset i2c fail!\n", __func__); + flag_i2c_reset = 1; + } else { + SWPS_DEBUG("%s: reset_i2c_topology OK.\n", __func__); + flag_i2c_reset = 0; + } +polling_schedule_round: + schedule_delayed_work(&swp_polling, _get_polling_period()); +} + + +/* ========== Functions for register something ========== + */ +static int +register_transvr_common_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_id) < 0) { + err_attr = "dev_attr_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_ext_id) < 0) { + err_attr = "dev_attr_ext_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_connector) < 0) { + err_attr = "dev_attr_connector"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_name) < 0) { + err_attr = "dev_attr_vendor_name"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_pn) < 0) { + err_attr = "dev_attr_vendor_pn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_rev) < 0) { + err_attr = "dev_attr_vendor_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_sn) < 0) { + err_attr = "dev_attr_vendor_sn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_br) < 0) { + err_attr = "dev_attr_br"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_smf) < 0) { + err_attr = "dev_attr_len_smf"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om1) < 0) { + err_attr = "dev_attr_len_om1"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om2) < 0) { + err_attr = "dev_attr_len_om2"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om3) < 0) { + err_attr = "dev_attr_len_om3"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om4) < 0) { + err_attr = "dev_attr_len_om4"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_extend) < 0) { + err_attr = "dev_attr_comp_extend"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth) < 0) { + err_attr = "dev_attr_comp_eth"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_rev) < 0) { + err_attr = "dev_attr_comp_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_info) < 0) { + err_attr = "dev_attr_info"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_type) < 0) { + err_attr = "dev_attr_if_type"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_speed) < 0) { + err_attr = "dev_attr_if_speed"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_lane) < 0) { + err_attr = "dev_attr_if_lane"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_temperature) < 0) { + err_attr = "dev_attr_temperature"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_voltage) < 0) { + err_attr = "dev_attr_voltage"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_bias) < 0) { + err_attr = "dev_attr_tx_bias"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power) < 0) { + err_attr = "dev_attr_tx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power) < 0) { + err_attr = "dev_attr_rx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_eq) < 0) { + err_attr = "dev_attr_tx_eq"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_em) < 0) { + err_attr = "dev_attr_rx_em"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_wavelength) < 0) { + err_attr = "dev_attr_wavelength"; + goto err_transvr_comm_attr; + } + return 0; + +err_transvr_comm_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + +static int +register_transvr_sfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10) < 0) { + err_attr = "dev_attr_comp_eth_10"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_len_sm) < 0) { + err_attr = "dev_attr_len_sm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rate_id) < 0) { + err_attr = "dev_attr_rate_id"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs0) < 0) { + err_attr = "dev_attr_soft_rs0"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs1) < 0) { + err_attr = "dev_attr_soft_rs1"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_offset) < 0) { + err_attr = "dev_attr_extphy_offset"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_reg) < 0) { + err_attr = "dev_attr_extphy_reg"; + goto err_transvr_sfp_attr; + } + return 0; + +err_transvr_sfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10_40) < 0) { + err_attr = "dev_attr_comp_eth_10_40"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_power_cls) < 0) { + err_attr = "dev_attr_power_cls"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rx_los) < 0) { + err_attr = "soft_rx_los"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_disable) < 0) { + err_attr = "soft_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_auto_tx_disable) < 0) { + err_attr = "auto_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_fault) < 0) { + err_attr = "soft_tx_fault"; + goto err_transvr_qsfp_attr; + } + return 0; + +err_transvr_qsfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp28_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_qsfp_attr(device_p) < 0){ + err_attr = "register_transvr_qsfp_attr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_cdr) < 0) { + err_attr = "dev_attr_cdr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_rx_am) < 0) { + err_attr = "dev_attr_rx_am"; + goto err_transvr_qsfp28_attr; + } + return 0; + +err_transvr_qsfp28_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + switch (transvr_obj->layout){ + case TRANSVR_TYPE_SFP: + if (register_transvr_sfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + if (register_transvr_qsfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP_28: + if (register_transvr_qsfp28_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + default: + goto err_reg_tvr_attr; + } + return 0; + +err_reg_tvr_attr: + SWPS_ERR("%s: fail! type=%d \n", __func__, transvr_obj->type); + return -1; +} + + +static int +register_ioexp_attr_sfp_1(struct device *device_p){ + /* Support machine type: + * - SFP : Magnolia + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_fault) < 0) { + err_attr = "dev_attr_tx_fault"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_rxlos) < 0) { + err_attr = "dev_attr_rxlos"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_disable) < 0) { + err_attr = "dev_attr_tx_disable"; + goto err_ioexp_sfp1_attr; + } + return 0; + +err_ioexp_sfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_sfp_2(struct device *device_p){ + /* Support machine type: + * - SFP28 : Cypress + */ + char *err_attr = NULL; + + if (register_ioexp_attr_sfp_1(device_p) < 0){ + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs0) < 0) { + err_attr = "dev_attr_hard_rs0"; + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs1) < 0) { + err_attr = "dev_attr_hard_rs1"; + goto err_ioexp_sfp2_attr; + } + return 0; + +err_ioexp_sfp2_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_qsfp_1(struct device *device_p){ + /* Support machine type: + * - QSFP : Magnolia, Redwood, Hudson32i + * - QSFP+ : Magnolia, Redwood, Hudson32i + * - QSFP28: Redwood + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_reset) < 0) { + err_attr = "dev_attr_reset"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_lpmod) < 0) { + err_attr = "dev_attr_lpmod"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_modsel) < 0) { + err_attr = "dev_attr_modsel"; + goto err_ioexp_qsfp1_attr; + } + return 0; + +err_ioexp_qsfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_modctl_attr(struct device *device_p){ + + char *err_msg = NULL; + + if (device_create_file(device_p, &dev_attr_platform) < 0) { + err_msg = "dev_attr_platform"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_version) < 0) { + err_msg = "dev_attr_version"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_status) < 0) { + err_msg = "dev_attr_status"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_i2c) < 0) { + err_msg = "dev_attr_reset_i2c"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_swps) < 0) { + err_msg = "dev_attr_reset_swps"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_auto_config) < 0) { + err_msg = "dev_attr_auto_config"; + goto err_reg_modctl_attr; + } + return 0; + +err_reg_modctl_attr: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_ioexp_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + char *err_msg = "ERR"; + + switch (transvr_obj->ioexp_obj_p->ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + if (register_ioexp_attr_sfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + case IOEXP_TYPE_CYPRESS_NABC: + if (register_ioexp_attr_sfp_2(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_2 fail"; + goto err_reg_ioexp_attr; + } + break; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + if (register_ioexp_attr_qsfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_qsfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + default: + err_msg = "Unknow type"; + goto err_reg_ioexp_attr; + } + return 0; + +err_reg_ioexp_attr: + SWPS_ERR("%s: %s :%d \n", + __func__, err_msg, transvr_obj->ioexp_obj_p->ioexp_type); + return -1; +} + + +static int +register_modctl_device(void) { + + struct device *device_p = NULL; + int minor_comm = 0; /* Default minor number for common device */ + dev_t dev_num = MKDEV(ctl_major, minor_comm); + char *err_msg = "ERROR"; + + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + NULL, /* void *private_data */ + SWP_DEV_MODCTL); /* const char *fmt */ + if (IS_ERR(device_p)){ + err_msg = "device_create fail"; + goto err_register_modctl_device_1; + } + if (register_modctl_attr(device_p) < 0) { + err_msg = "register_modctl_attr fail"; + goto err_register_modctl_device_2; + } + return 0; + +err_register_modctl_device_2: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_register_modctl_device_1: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_port_device(char *dev_name, + dev_t dev_num, + struct transvr_obj_s *transvr_obj){ + + struct device *device_p = NULL; + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + transvr_obj, /* void *private_data */ + dev_name); /* const char *fmt */ + if (IS_ERR(device_p)){ + goto err_regswp_create_dev; + } + if (register_transvr_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + if (register_ioexp_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + return 0; + +err_regswp_reg_attr: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_regswp_create_dev: + SWPS_ERR("%s fail! :%s\n", __func__, dev_name); + return -1; +} + + +static int +register_swp_module(void){ + + dev_t ctl_devt = 0; + dev_t port_devt = 0; + int dev_total = port_total + 1; /* char_dev for module control */ + + /* Register device number */ + if (alloc_chrdev_region(&ctl_devt, 0, 1, SWP_DEV_MODCTL) < 0){ + SWPS_WARN("Allocate CTL MAJOR failure! \n"); + goto err_register_swp_module_1; + } + if (alloc_chrdev_region(&port_devt, 0, dev_total, SWP_CLS_NAME) < 0){ + SWPS_WARN("Allocate PORT MAJOR failure! \n"); + goto err_register_swp_module_2; + } + ctl_major = MAJOR(ctl_devt); + port_major = MAJOR(port_devt); + + /* Create class object */ + swp_class_p = class_create(THIS_MODULE, SWP_CLS_NAME); + if (IS_ERR(swp_class_p)) { + SWPS_ERR("Create class failure! \n"); + goto err_register_swp_module_3; + } + return 0; + +err_register_swp_module_3: + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_register_swp_module_2: + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); +err_register_swp_module_1: + return -1; +} + + +/* ========== Module initial relate ========== + */ +static int +create_ioexp_objs(void) { + + int i, run_mod; + + /* Clean IOEXP object */ + clean_ioexp_objs(); + /* Get running mode */ + run_mod = IOEXP_MODE_DIRECT; + if (SWP_POLLING_ENABLE){ + run_mod = IOEXP_MODE_POLLING; + } + /* Create IOEXP object */ + for(i=0; i devlen_max) { + snprintf(err_msg, sizeof(err_msg), + "SWP_DEV_PORT too long!"); + goto err_initport_create_tranobj; + } + memset(dev_name, 0, sizeof(dev_name)); + snprintf(dev_name, devlen_max, "%s%d", SWP_DEV_PORT, port_id); + /* Create transceiver object */ + ioexp_obj_p = get_ioexp_obj(ioexp_id); + if (!ioexp_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "IOEXP object:%d not exist", ioexp_id); + goto err_initport_create_tranobj; + } + transvr_obj_p = create_transvr_obj(dev_name, chan_id, ioexp_obj_p, + ioexp_virt_offset, transvr_type, + chipset_type, run_mod); + if (!transvr_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "Create transceiver object fail :%s", dev_name); + goto err_initport_create_tranobj; + } + /* Setup Lane_ID mapping */ + i = ARRAY_SIZE(port_layout[minor_curr].lane_id); + j = ARRAY_SIZE(transvr_obj_p->lane_id); + if (i != j) { + snprintf(err_msg, sizeof(err_msg), + "Lane_id size inconsistent %d/%d", i, j); + goto err_initport_reg_device; + } + memcpy(transvr_obj_p->lane_id, port_layout[minor_curr].lane_id, i*sizeof(int)); + /* Create and register device object */ + if (register_port_device(dev_name, MKDEV(port_major, minor_curr), transvr_obj_p) < 0){ + snprintf(err_msg, sizeof(err_msg), + "register_port_device fail"); + goto err_initport_reg_device; + } + /* Setup device_ptr of transvr_obj */ + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + snprintf(err_msg, sizeof(err_msg), + "get_swpdev_by_name fail"); + goto err_initport_reg_device; + } + transvr_obj_p->transvr_dev_p = dev_p; + /* Success */ + ok_count++; + } + SWPS_INFO("%s: initialed %d port-dev",__func__, ok_count); + return 0; + +err_initport_reg_device: + kfree(transvr_obj_p); +err_initport_create_tranobj: + clean_port_obj(); + SWPS_ERR("%s: %s", __func__, err_msg); + SWPS_ERR("Dump: :%d :%d :%d :%d :%d :%d\n", + port_id, chan_id, ioexp_id, ioexp_virt_offset, transvr_type, run_mod); + return -1; +} + + +static int +init_dev_topology(void){ + + int err; + char *emsg = "ERR"; + flag_mod_state = SWP_STATE_NORMAL; + + err = init_ioexp_objs(); + switch(err){ + case 0: /* Normal */ + SWPS_DEBUG("%s: normal case\n", __func__); + break; + + case -1: /* topology error */ + SWPS_DEBUG("%s: detect tier-1 topology initial failure :%d\n", + __func__, err); + /* Reset and isolate */ + err = reset_i2c_topology(); + if (err < 0) { + emsg = "reset i2c topology fail"; + goto err_init_dev_topology; + } + /* Re-initial again */ + err = init_ioexp_objs(); + if (err < 0) { + emsg = "re-init ioexp objects fail"; + goto err_init_dev_topology; + } + break; + + case -2: /* Internal error */ + SWPS_DEBUG("%s: internal error case\n", __func__); + err = -2; + emsg = "internal error"; + goto err_init_dev_topology; + + default: + SWPS_DEBUG("%s: undefined error case\n", __func__); + emsg = "undefined error case"; + goto err_init_dev_topology; + } + SWPS_DEBUG("%s: initial I2C topology success\n", __func__); + return 0; + +err_init_dev_topology: + SWPS_ERR("%s: %s :%d\n", __func__, emsg, err); + return -1; +} + + +static int +init_polling_task(void){ + + if (SWP_POLLING_ENABLE){ + schedule_delayed_work(&swp_polling, _get_polling_period()); + } + return 0; +} + + +static int +init_swps_common(void){ + + char *err_msg = "ERR"; + + auto_config = 0; + if ((SWP_AUTOCONFIG_ENABLE) && (SWP_POLLING_ENABLE)){ + auto_config = 1; + } + if (register_modctl_device() < 0) { + err_msg = "register_modctl_device fail"; + goto err_init_swps_common_1; + } + if (_update_auto_config_2_trnasvr() < 0) { + err_msg = "_update_auto_config_2_trnasvr fail"; + goto err_init_swps_common_1; + } + if (init_polling_task() < 0){ + err_msg = "init_polling_task fail"; + goto err_init_swps_common_1; + } + return 0; + +err_init_swps_common_1: + clean_swps_common(); + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int __init +swp_module_init(void){ + + if (get_platform_type() < 0){ + goto err_init_out; + } + if (get_layout_info() < 0){ + goto err_init_out; + } + if (register_swp_module() < 0){ + goto err_init_out; + } + if (create_ioexp_objs() < 0){ + goto err_init_ioexp; + } + if (create_port_objs() < 0){ + goto err_init_portobj; + } + if (init_mux_gpio(gpio_rest_mux) < 0){ + goto err_init_mux; + } + if (init_dev_topology() < 0){ + goto err_init_topology; + } + if (init_swps_common() < 0){ + goto err_init_topology; + } + SWPS_INFO("Inventec switch-port module V.%s initial success.\n", SWP_VERSION); + return 0; + + +err_init_topology: + clean_mux_gpio(); +err_init_mux: + clean_port_obj(); +err_init_portobj: + clean_ioexp_objs(); +err_init_ioexp: + class_unregister(swp_class_p); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_init_out: + SWPS_ERR("Inventec switch-port module V.%s initial failure.\n", SWP_VERSION); + return -1; +} + + +static void __exit +swp_module_exit(void){ + + clean_swps_common(); + clean_port_obj(); + clean_ioexp_objs(); + clean_mux_gpio(); + class_unregister(swp_class_p); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); + SWPS_INFO("Remove Inventec switch-port module success.\n"); +} + + +/* Module information */ +MODULE_AUTHOR(SWP_AUTHOR); +MODULE_DESCRIPTION(SWP_DESC); +MODULE_VERSION(SWP_VERSION); +MODULE_LICENSE(SWP_LICENSE); + +module_init(swp_module_init); +module_exit(swp_module_exit); + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_swps.h b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_swps.h new file mode 100644 index 00000000000..8e1451d6149 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/inv_swps.h @@ -0,0 +1,1033 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef INV_SWPS_H +#define INV_SWPS_H + +#include "transceiver.h" +#include "io_expander.h" +#include "inv_mux.h" + +/* Module settings */ +#define SWP_CLS_NAME "swps" +#define SWP_DEV_PORT "port" +#define SWP_DEV_MODCTL "module" +#define SWP_RESET_PWD "inventec" +#define SWP_POLLING_PERIOD (300) /* msec */ +#define SWP_POLLING_ENABLE (1) +#define SWP_AUTOCONFIG_ENABLE (1) + +/* Module information */ +#define SWP_AUTHOR "Neil " +#define SWP_DESC "Inventec port and transceiver driver" +#define SWP_VERSION "4.2.7" +#define SWP_LICENSE "GPL" + +/* Module status define */ +#define SWP_STATE_NORMAL (0) +#define SWP_STATE_I2C_DIE (-91) + +/* [Note]: + * Functions and mechanism for auto-detect platform type is ready, + * But HW and BIOS not ready! We need to wait them. + * So, please do not use PLATFORM_TYPE_AUTO until they are ready. + * (2016.06.13) + */ +#define PLATFORM_TYPE_AUTO (100) +#define PLATFORM_TYPE_MAGNOLIA (111) +#define PLATFORM_TYPE_MAGNOLIA_FNC (112) +#define PLATFORM_TYPE_REDWOOD (121) +#define PLATFORM_TYPE_REDWOOD_FSL (122) +#define PLATFORM_TYPE_HUDSON32I_GA (131) +#define PLATFORM_TYPE_SPRUCE (141) +#define PLATFORM_TYPE_CYPRESS_GA1 (151) /* Up -> Down */ +#define PLATFORM_TYPE_CYPRESS_GA2 (152) /* Down -> Up */ +#define PLATFORM_TYPE_CYPRESS_BAI (153) /* Down -> Up */ +#define PLATFORM_TYPE_TAHOE (161) +#define PLATFORM_TYPE_SEQUOIA_GA (171) +#define PLATFORM_TYPE_LAVENDER_GA (181) +#define PLATFORM_TYPE_LAVENDER_ONL (182) +/* Current running platfrom */ +#define PLATFORM_SETTINGS PLATFORM_TYPE_MAGNOLIA + +/* Define platform flag and kernel version */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA_FNC) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD) + #define SWPS_REDWOOD (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD_FSL) + #define SWPS_REDWOOD_FSL (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_HUDSON32I_GA) + #define SWPS_HUDSON32I_GA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SPRUCE) + #define SWPS_SPRUCE (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA1) + #define SWPS_CYPRESS_GA1 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA2) + #define SWPS_CYPRESS_GA2 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_BAI) + #define SWPS_CYPRESS_BAI (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_TAHOE) + #define SWPS_TAHOE (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SEQUOIA_GA) + #define SWPS_SEQUOIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#endif + + +struct inv_platform_s { + int id; + char name[64]; +}; + +struct inv_ioexp_layout_s { + int ioexp_id; + int ioexp_type; + struct ioexp_addr_s addr[4]; +}; + +struct inv_port_layout_s { + int port_id; + int chan_id; + int ioexp_id; + int ioexp_offset; + int transvr_type; + int chipset_type; + int lane_id[8]; +}; + + +/* ========================================== + * Inventec Platform Settings + * ========================================== + */ +struct inv_platform_s platform_map[] = { + {PLATFORM_TYPE_AUTO, "Auto-Detect" }, + {PLATFORM_TYPE_MAGNOLIA, "Magnolia" }, + {PLATFORM_TYPE_MAGNOLIA_FNC, "Magnolia_FNC" }, + {PLATFORM_TYPE_REDWOOD, "Redwood" }, + {PLATFORM_TYPE_REDWOOD_FSL, "Redwood_FSL" }, + {PLATFORM_TYPE_HUDSON32I_GA, "Hudson32i" }, + {PLATFORM_TYPE_SPRUCE, "Spruce" }, + {PLATFORM_TYPE_CYPRESS_GA1, "Cypress_GA1" }, + {PLATFORM_TYPE_CYPRESS_GA2, "Cypress_GA2" }, + {PLATFORM_TYPE_CYPRESS_BAI, "Cypress_BAI" }, + {PLATFORM_TYPE_TAHOE, "Tahoe" }, + {PLATFORM_TYPE_SEQUOIA_GA, "Sequoia_GA" }, + {PLATFORM_TYPE_LAVENDER_GA, "Lavender_GA" }, + {PLATFORM_TYPE_LAVENDER_ONL, "Lavender_ONL" }, +}; + + +/* ========================================== + * Magnolia Layout configuration + * ========================================== + */ +#ifdef SWPS_MAGNOLIA +unsigned magnolia_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s magnolia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAGINOLIA_NAB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {1, IOEXP_TYPE_MAGINOLIA_NAB, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {2, IOEXP_TYPE_MAGINOLIA_NAB, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {3, IOEXP_TYPE_MAGINOLIA_4AB, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf0, 0xff}, {0xf0, 0xff}, }, }, /* addr[1] = I/O Expander 4 B */ + }, + {4, IOEXP_TYPE_MAGINOLIA_NAB, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {5, IOEXP_TYPE_MAGINOLIA_NAB, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {6, IOEXP_TYPE_MAGINOLIA_7AB, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[1] = I/O Expander 7 B */ + }, +}; + +struct inv_port_layout_s magnolia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 16} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 15} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 14} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 13} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 24} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 23} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 22} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 21} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 28} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 27} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 26} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 25} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 32} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 31} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 30} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 29} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 48} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 47} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 46} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 45} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 52} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 51} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 50} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 49} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 56} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 55} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 54} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 53} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 60} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 59} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 58} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 57} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 64} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 63} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 62} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 61} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 68} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 67} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 66} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 65} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 72} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 71} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 70} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 69} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 76} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 75} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 74} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 73} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD +unsigned redwood_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s redwood_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + +struct inv_port_layout_s redwood_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Hudson32i Layout configuration + * ========================================== + */ +#ifdef SWPS_HUDSON32I_GA +unsigned hudsin32iga_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s hudson32iga_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_HUDSON32IGA_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {1, IOEXP_TYPE_HUDSON32IGA_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {2, IOEXP_TYPE_HUDSON32IGA_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, + {3, IOEXP_TYPE_HUDSON32IGA_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, +}; + +struct inv_port_layout_s hudson32iga_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 1, 2, 3, 4} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 5, 6, 7, 8} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 9, 10, 11, 12} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 13, 14, 15, 16} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 17, 18, 19, 20} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 21, 22, 23, 24} }, + { 6, 12, 0, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 25, 26, 27, 28} }, + { 7, 13, 0, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 29, 30, 31, 32} }, + { 8, 14, 1, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 33, 34, 35, 36} }, + { 9, 15, 1, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 37, 38, 39, 40} }, + {10, 16, 1, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 41, 42, 43, 44} }, + {11, 17, 1, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 45, 46, 47, 48} }, + {12, 18, 1, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 49, 50, 51, 52} }, + {13, 19, 1, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 53, 54, 55, 56} }, + {14, 20, 1, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 57, 58, 59, 60} }, + {15, 21, 1, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 61, 62, 63, 64} }, + {16, 22, 2, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 65, 66, 67, 68} }, + {17, 23, 2, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 69, 70, 71, 72} }, + {18, 24, 2, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 73, 74, 75, 76} }, + {19, 25, 2, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {20, 26, 2, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {21, 27, 2, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 85, 86, 87, 88} }, + {22, 28, 2, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 89, 90, 91, 92} }, + {23, 29, 2, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 93, 94, 95, 96} }, + {24, 30, 3, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {25, 31, 3, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {26, 32, 3, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {27, 33, 3, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, + {28, 34, 3, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {113,114,115,116} }, + {29, 35, 3, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {117,118,119,120} }, + {30, 36, 3, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {121,122,123,124} }, + {31, 37, 3, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Spruce Layout configuration + * ========================================== + */ +#ifdef SWPS_SPRUCE +unsigned spruce_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s spruce_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SPRUCE_7AB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[2] = I/O Expander 7B */ + }, +}; + +struct inv_port_layout_s spruce_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Up->Down]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA1 +unsigned cypress_ga1_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; + +struct inv_ioexp_layout_s cypress_ga1_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga1_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Down->Up]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA2 +unsigned cypress_ga2_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_ga2_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga2_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 1, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 2, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 3, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 4, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 5, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 6, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 7, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 8, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + { 9, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {10, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {11, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {12, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {13, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {14, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {15, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {16, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {17, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {18, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {19, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {20, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {21, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {22, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {23, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {24, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {25, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {26, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {27, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {28, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {29, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {30, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {31, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {32, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {33, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {34, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {35, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {36, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {37, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {38, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {39, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {40, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {41, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {42, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {43, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {44, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {45, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {46, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {47, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {48, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {49, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {50, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {51, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {52, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {53, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (BaiDu version) + * ========================================== + */ +#ifdef SWPS_CYPRESS_BAI +unsigned cypress_b_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_b_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_b_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {54, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood_fsl Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD_FSL +unsigned redwood_fsl_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s redwood_fsl_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + + +struct inv_port_layout_s redwood_fsl_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Tahoe Layout configuration + * ========================================== + */ +#ifdef SWPS_TAHOE +unsigned tahoe_gpio_rest_mux = MUX_RST_GPIO_249_PCA9548; + +struct inv_ioexp_layout_s tahoe_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_TAHOE_6ABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {1, IOEXP_TYPE_TAHOE_5A, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[0] = I/O Expander 5 A */ + }, +}; + + +struct inv_port_layout_s tahoe_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 12, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + { 1, 11, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + { 2, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + { 3, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + { 4, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + { 5, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + { 6, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + { 7, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + { 8, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + { 9, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, +}; +#endif + + +/* ========================================== + * Sequoia Layout configuration + * ========================================== + */ +#ifdef SWPS_SEQUOIA +unsigned sequoia_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; + +struct inv_ioexp_layout_s sequoia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { {1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + +struct inv_port_layout_s sequoia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 9, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 1, 10, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 2, 11, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 3, 12, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 4, 13, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + { 5, 14, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 6, 15, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + { 7, 16, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + { 8, 17, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + { 9, 18, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {10, 19, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {11, 20, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {12, 21, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + {13, 22, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + {14, 23, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121, 122, 123, 124} }, + {15, 24, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + {16, 25, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {137, 138, 139, 140} }, + {17, 26, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {129, 130, 131, 132} }, + {18, 27, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {153, 154, 155, 156} }, + {19, 28, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {145, 146, 147, 148} }, + {20, 29, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {169, 170, 171, 172} }, + {21, 30, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {161, 162, 163, 164} }, + {22, 31, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {185, 186, 187, 188} }, + {23, 32, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {177, 178, 179, 180} }, + {24, 33, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {201, 202, 203, 204} }, + {25, 34, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {193, 194, 195, 196} }, + {26, 35, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {217, 218, 219, 220} }, + {27, 36, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {209, 210, 211, 212} }, + {28, 37, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {233, 234, 235, 236} }, + {29, 38, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {225, 226, 227, 228} }, + {30, 39, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {249, 250, 251, 252} }, + {31, 40, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {241, 242, 243, 244} }, + {32, 44, 4, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + {33, 43, 4, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + {34, 42, 4, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + {35, 41, 4, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + {36, 48, 4, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {37, 47, 4, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {38, 46, 4, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {39, 45, 4, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {40, 52, 5, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {41, 51, 5, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {42, 50, 5, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {43, 49, 5, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {44, 56, 5, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, + {45, 55, 5, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + {46, 54, 5, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125, 126, 127, 128} }, + {47, 53, 5, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117, 118, 119, 120} }, + {48, 60, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {141, 142, 143, 144} }, + {49, 59, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {133, 134, 135, 136} }, + {50, 58, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {157, 158, 159, 160} }, + {51, 57, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {149, 150, 151, 152} }, + {52, 64, 6, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {173, 174, 175, 176} }, + {53, 63, 6, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {165, 166, 167, 168} }, + {54, 62, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {189, 190, 191, 192} }, + {55, 61, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {181, 182, 183, 184} }, + {56, 68, 7, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {205, 206, 207, 208} }, + {57, 67, 7, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {197, 198, 199, 200} }, + {58, 66, 7, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {221, 222, 223, 224} }, + {59, 65, 7, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {213, 214, 215, 216} }, + {60, 72, 7, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {237, 238, 239, 240} }, + {61, 71, 7, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {229, 230, 231, 232} }, + {62, 70, 7, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {253, 254, 255, 256} }, + {63, 69, 7, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {245, 246, 247, 248} }, +}; +#endif + + +/* ========================================== + * Lavender Layout configuration + * ========================================== + */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; +#endif + +#ifdef SWPS_LAVENDER +struct inv_ioexp_layout_s lavender_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { { 1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + { 1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { { 2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + { 2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + { 2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { { 3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + { 3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + { 3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { { 4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + { 4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + { 4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { { 9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + { 9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + { 9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, + {8, IOEXP_TYPE_LAVENDER_P65, { { 5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xF6, 0xff}, {0xF8, 0xff}, }, }, /* addr[0] = I/O Expander CPU */ + }, +}; + + +struct inv_port_layout_s lavender_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {188, 189, 190, 191} }, + { 1, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {184, 185, 186, 187} }, + { 2, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {180, 181, 182, 183} }, + { 3, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {176, 177, 178, 179} }, + { 4, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {172, 173, 174, 175} }, + { 5, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {168, 169, 170, 171} }, + { 6, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {164, 165, 166, 167} }, + { 7, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {160, 161, 162, 163} }, + { 8, 25, 1, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {156, 157, 158, 159} }, + { 9, 26, 1, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {152, 153, 154, 155} }, + {10, 27, 1, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {148, 149, 150, 151} }, + {11, 28, 1, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {144, 145, 146, 147} }, + {12, 29, 1, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {140, 141, 142, 143} }, + {13, 30, 1, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {136, 137, 138, 139} }, + {14, 31, 1, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {132, 133, 134, 135} }, + {15, 32, 1, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {128, 129, 130, 131} }, + {16, 33, 2, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 0, 1, 2, 3} }, + {17, 34, 2, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 4, 5, 6, 7} }, + {18, 35, 2, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 8, 9, 10, 11} }, + {19, 36, 2, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 12, 13, 14, 15} }, + {20, 37, 2, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 16, 17, 18, 19} }, + {21, 38, 2, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 20, 21, 22, 23} }, + {22, 39, 2, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 24, 25, 26, 27} }, + {23, 40, 2, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 28, 29, 30, 31} }, + {24, 41, 3, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 32, 33, 34, 35} }, + {25, 42, 3, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 36, 37, 38, 39} }, + {26, 43, 3, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 40, 41, 42, 43} }, + {27, 44, 3, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 44, 45, 46, 47} }, + {28, 45, 3, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 48, 49, 50, 51} }, + {29, 46, 3, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 52, 53, 54, 55} }, + {30, 47, 3, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 56, 57, 58, 59} }, + {31, 48, 3, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 60, 61, 62, 63} }, + {32, 49, 4, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {256, 257, 258, 259} }, + {33, 50, 4, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {260, 261, 262, 263} }, + {34, 51, 4, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {264, 265, 266, 267} }, + {35, 52, 4, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {268, 269, 270, 271} }, + {36, 53, 4, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {272, 273, 274, 275} }, + {37, 54, 4, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {276, 277, 278, 279} }, + {38, 55, 4, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {280, 281, 282, 283} }, + {39, 56, 4, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {284, 285, 286, 287} }, + {40, 57, 5, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {288, 289, 290, 291} }, + {41, 58, 5, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {292, 293, 294, 295} }, + {42, 59, 5, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {296, 297, 298, 299} }, + {43, 60, 5, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {300, 301, 302, 303} }, + {44, 61, 5, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {304, 305, 306, 307} }, + {45, 62, 5, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {308, 309, 310, 311} }, + {46, 63, 5, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {312, 313, 314, 315} }, + {47, 64, 5, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {316, 317, 318, 319} }, + {48, 65, 6, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {444, 445, 446, 447} }, + {49, 66, 6, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {440, 441, 442, 443} }, + {50, 67, 6, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {436, 437, 438, 439} }, + {51, 68, 6, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {432, 433, 434, 435} }, + {52, 69, 6, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {428, 429, 430, 431} }, + {53, 70, 6, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {424, 425, 426, 427} }, + {54, 71, 6, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {420, 421, 422, 423} }, + {55, 72, 6, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {416, 417, 418, 419} }, + {56, 73, 7, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {412, 413, 414, 415} }, + {57, 74, 7, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {408, 409, 410, 411} }, + {58, 75, 7, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {404, 405, 406, 407} }, + {59, 76, 7, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {400, 401, 402, 403} }, + {60, 77, 7, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {396, 397, 398, 399} }, + {61, 78, 7, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {392, 393, 394, 395} }, + {62, 79, 7, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {388, 389, 390, 391} }, + {63, 80, 7, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {384, 385, 386, 387} }, + {64, 5, 8, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 64, 65, 66, 67} }, +}; +#endif + + +#endif /* INV_SWPS_H */ + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/io_expander.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/io_expander.c new file mode 100644 index 00000000000..9f1bbd0e4f2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/io_expander.c @@ -0,0 +1,1885 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include "io_expander.h" + +static struct ioexp_obj_s *ioexp_head_p = NULL; +static struct ioexp_obj_s *ioexp_tail_p = NULL; + + +/* ========== Register IOEXP layout ========== + */ +struct ioexp_map_s ioexp_map_magnolia_nab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_4ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_7ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {1, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {1, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {1, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 2}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 3}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 0, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 0, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 0, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 0, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 0, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 0, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 0, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 1, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 1, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 1, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 1, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 1, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 1, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 1, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 1, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 1, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 1, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {0, 1, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {0, 1, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {1, 1, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {1, 1, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {1, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {1, 1, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_5a = { + + .chip_amount = 1, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_6abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 0}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 3}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 0}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + {2, 1, 5}, /* map_present[8] = MOD_ABS_PORT(X+8) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {1, 0, 1}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 6}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 1, 3}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {2, 0, 1}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {2, 0, 6}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + {2, 1, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 2}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 7}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 1, 4}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {2, 0, 2}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {2, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + {2, 1, 4}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+8) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {1, 0, 0}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 0, 5}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 2}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {2, 0, 0}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {2, 0, 5}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + {2, 1, 2}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_sequoia_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_lavender_p65 = { + + .chip_amount = 1, + .data_width = 1, + + .map_present = { {0, 0, 4}, }, /* map_present[0] = MOD_ABS_PORT(X) */ + .map_reset = { {0, 0, 1}, }, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + .map_lpmod = { {0, 0, 2}, }, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + .map_modsel = { {0, 0, 0}, }, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ +}; + + +/* ========== Private functions ========== + */ +int check_channel_tier_1(void); + +struct i2c_client * +_get_i2c_client(struct ioexp_obj_s *self, + int chip_id){ + + struct ioexp_i2c_s *i2c_curr_p = self->i2c_head_p; + + if (!(i2c_curr_p)){ + SWPS_ERR("%s: i2c_curr_p is NULL\n", __func__); + return NULL; + } + while (i2c_curr_p){ + if ((i2c_curr_p->chip_id) == chip_id){ + return i2c_curr_p->i2c_client_p; + } + i2c_curr_p = i2c_curr_p->next; + } + SWPS_ERR("%s: not exist! :%d\n", __func__, chip_id); + return NULL; +} + + +static int +_common_ioexp_update_one(struct ioexp_obj_s *self, + struct ioexp_addr_s *ioexp_addr, + int chip_id, + int data_width, + int show_err, + char *caller_name) { + int buf = 0; + int err = 0; + int data_id = 0; + int r_offset = 0; + + for(data_id=0; data_idread_offset[data_id]; + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), r_offset); + /* Check error */ + if (buf < 0) { + err = 1; + if (show_err) { + SWPS_INFO("IOEXP-%d read fail! :%d \n", self->ioexp_id, buf); + SWPS_INFO("Dump: :%d :0x%02x :%d, :%s\n", + ioexp_addr->chan_id, ioexp_addr->chip_addr, + ioexp_addr->read_offset[data_id], caller_name); + } + continue; + } + /* Update IOEXP object */ + self->chip_data[chip_id].data[data_id] = (uint8_t)buf; + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +common_ioexp_update_all(struct ioexp_obj_s *self, + int show_err, + char *caller_name){ + + int err = 0; + int chip_id = 0; + int chip_amount = self->ioexp_map_p->chip_amount; + + for (chip_id=0; chip_idioexp_map_p->map_addr[chip_id]), + chip_id, + self->ioexp_map_p->data_width, + show_err, + caller_name) < 0) { + err = 1; + } + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +_common_check_by_mode(struct ioexp_obj_s *self){ + + switch (self->mode){ + case IOEXP_MODE_DIRECT: + return self->fsm_4_direct(self); + + case IOEXP_MODE_POLLING: + if (self->state >= 0){ + return 0; + } + switch (self->state){ + case STATE_IOEXP_INIT: + return ERR_IOEXP_UNINIT; + case STATE_IOEXP_ABNORMAL: + return ERR_IOEXP_ABNORMAL; + default: + return ERR_IOEXP_NOSTATE; + } + break; + + default: + break; + } + SWPS_ERR("%s: Exception occurs. :%d \n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +static int +_common_get_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + char *func_mane){ + uint8_t buf; + int err_code; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Get data form cache */ + buf = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + return (int)(buf >> bitmap_obj_p->bit_shift & 0x01); +} + + +static int +_common_set_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + int input_val, + char *func_mane){ + int err_code, target_offset; + uint8_t origin_byte; + uint8_t modify_byte; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Prepare write date */ + origin_byte = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + switch (input_val) { + case 0: + modify_byte = origin_byte; + SWP_BIT_CLEAR(modify_byte, bitmap_obj_p->bit_shift); + break; + case 1: + modify_byte = origin_byte; + SWP_BIT_SET(modify_byte, bitmap_obj_p->bit_shift); + break; + default: + SWPS_ERR("Input value incorrect! :%d :%d :%s\n", + input_val, self->ioexp_id, func_mane); + return ERR_IOEXP_BADINPUT; + } + /* Setup i2c client */ + target_offset = self->ioexp_map_p->map_addr[bitmap_obj_p->chip_id].write_offset[bitmap_obj_p->ioexp_voffset]; + /* Write byte to chip via I2C */ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, bitmap_obj_p->chip_id), + target_offset, + modify_byte); + /* Update or bollback object */ + if (err_code < 0){ + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = origin_byte; + SWPS_ERR("I2C write fail! :%d :%d :%s :%d\n", + input_val, self->ioexp_id, func_mane, err_code); + return err_code; + } + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = modify_byte; + return 0; +} + + +/* ========== Object public functions ========== + */ +int +common_get_present(struct ioexp_obj_s *self, + int virt_offset){ + + int UNPLUG = 1; + int retval = ERR_IOEXP_UNEXCPT; + + retval = _common_get_bit(self, + &(self->ioexp_map_p->map_present[virt_offset]), + "common_get_present"); + if (retval < 0) { + /* [Note] + * => Transceiver object does not need to handle IOEXP layer issues. + */ + return UNPLUG; + } + return retval; +} + + +int +common_get_tx_fault(struct ioexp_obj_s *self, + int virt_offset){ + /* [Transmit Fault (Tx_Fault)] + * A catastrophic laser fault will activate the transmitter signal, + * TX_FAULT, and disable the laser. This signal is an open collector + * output (pull-up required on the host board). A low signal indicates + * normal laser operation and a high signal indicates a fault. The + * TX_FAULT will be latched high when a laser fault occurs and is + * cleared by toggling the TX_DISABLE input or power cycling the + * transceiver. The transmitter fault condition can also be monitored + * via the two-wire serial interface. + * (address A2, byte 110, bit 2). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_fault[virt_offset]), + "common_get_tx_fault"); +} + + +int +common_get_rxlos(struct ioexp_obj_s *self, + int virt_offset){ + /* [Receiver Loss of Signal (Rx_LOS)] + * The post-amplification IC also includes transition detection circuitry + * which monitors the ac level of incoming optical signals and provides a + * TTL/CMOS compatible status signal to the host (pin 8). An adequate optical + * input results in a low Rx_LOS output while a high Rx_LOS output indicates + * an unusable optical input. The Rx_LOS thresholds are factory set so that + * a high output indicates a definite optical fault has occurred. Rx_LOS can + * also be monitored via the two-wire serial interface + * (address A2h, byte 110, bit 1). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_rxlos[virt_offset]), + "common_get_rxlos"); +} + + +int +common_get_tx_disable(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + "common_get_tx_disable"); +} + + +int +common_get_reset(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + "common_get_reset"); +} + + +int +common_get_lpmod(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + "common_get_lpmod"); +} + + +int +common_get_modsel(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + "common_get_modsel"); +} + + +int +common_get_hard_rs0(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + "common_get_hard_rs0"); +} + + +int +common_get_hard_rs1(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + "common_get_hard_rs1"); +} + + +int +common_set_tx_disable(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + input_val, + "common_set_tx_disable"); +} + + +int +common_set_reset(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + input_val, + "common_set_reset"); +} + + +int +common_set_lpmod(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + input_val, + "common_set_lpmod"); +} + + +int +common_set_modsel(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + input_val, + "common_set_modsel"); +} + + +int +common_set_hard_rs0(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + input_val, + "common_set_hard_rs0"); +} + + +int +common_set_hard_rs1(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + input_val, + "common_set_hard_rs1"); +} + + +int +ioexp_get_not_support(struct ioexp_obj_s *self, + int virt_offset){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +ioexp_set_not_support(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +fake_ioexp_init(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_ioexp_update(struct ioexp_obj_s *self){ + return 1; +} + + +int +fake_update_func(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_get_func(struct ioexp_obj_s *self, + int virt_offset){ + SWPS_WARN("Someone called fake_get_func\n"); + return -1; +} + +int +fake_set_func(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + SWPS_WARN("Someone called fake_set_func\n"); + return -1; +} + + +/* ========== Initial functions for IO Expander ========== + */ +int +common_ioexp_init(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + if (self->mode == IOEXP_MODE_DIRECT) { + goto update_common_ioexp_init; + } + /* Setup default value to each physical IO Expander */ + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + /* Get address mapping */ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("%s: IOEXP config incorrect! :%d \n", + __func__, chip_id); + return -1; + } + /* Setup default value */ + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->write_offset[offset], + addr_p->data_default[offset]); + if (err_code < 0){ + SWPS_ERR("%s: set default fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + } + } +update_common_ioexp_init: + /* Check and update info to object */ + err_code = self->update_all(self, 1, "common_ioexp_init"); + if (err_code < 0) { + SWPS_ERR("%s: update_all() fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +/* ========== Object functions for Final State Machine ========== + */ +int +_is_channel_ready(struct ioexp_obj_s *self){ + + int buf = 0; + int chip_id = 0; /* Use first chip which be registered */ + int data_id = 0; /* Use first byte which be registered */ + struct ioexp_addr_s *ioexp_addr = NULL; + + ioexp_addr = &(self->ioexp_map_p->map_addr[chip_id]); + if (!ioexp_addr){ + SWPS_ERR("%s: config incorrect!\n", __func__); + return ERR_IOEXP_UNEXCPT; + } + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), + ioexp_addr->read_offset[data_id]); + if (buf >= 0){ + return 1; + } + return 0; +} + +int +_ioexp_init_handler(struct ioexp_obj_s *self){ + + int return_val; + + switch (self->mode) { + case IOEXP_MODE_DIRECT: + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + case IOEXP_MODE_POLLING: + /* Check system and channel is ready */ + if (self->state == STATE_IOEXP_INIT){ + if (!_is_channel_ready(self)){ + self->state = STATE_IOEXP_INIT; + SWPS_WARN("%s: IOEXP:%d channel not ready.\n", + __func__, self->ioexp_id); + return 0; + } + } + /* Execute initial callback */ + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + default: + break; + } + SWPS_ERR("%s: exception occur :%d\n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_direct(struct ioexp_obj_s *self){ + + int result_val; + int show_err = 1; + char *func_mane = "common_ioexp_fsm_4_direct"; + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, and return error */ + return ERR_IOEXP_UNINIT; + } + /* Case: Initial done */ + return 0; + + case STATE_IOEXP_NORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + SWPS_INFO("%s: NORMAL -> ABNORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + self->state = STATE_IOEXP_NORMAL; + return 0; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_DEBUG("%s: ABNORMAL -> NORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("%s: Exception occurs :%d\n", + __func__, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_polling(struct ioexp_obj_s *self){ + + int result_val, i, show_e; + int fail_retry = 3; + char *func_name = "common_ioexp_fsm_4_polling"; + +#ifdef DEBUG_SWPS + show_e = 1; +#else + show_e = 0; +#endif + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + /* Case: System (Channel) not ready */ + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, wait and retry */ + return 0; + } + /* Case: Initial done */ + SWPS_INFO("IOEXP-%d: initial done. :%d\n", + self->ioexp_id, self->ioexp_type); + return result_val; + + case STATE_IOEXP_NORMAL: + /* Retry mechanism for case of i2c topology not stable */ + for (i=0; iupdate_all(self, show_e, func_name); + if (result_val >= 0) { + self->state = STATE_IOEXP_NORMAL; + return 0; + } + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: detect I2C crash :%d\n", + __func__, self->ioexp_id); + break; + } + SWPS_DEBUG("IOEXP-%d: unstable :%d\n", + self->ioexp_id, result_val); + } + SWPS_INFO("IOEXP-%d: NORMAL -> ABNORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_e, func_name); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_INFO("IOEXP-%d: ABNORMAL -> NORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("IOEXP-%d: Exception occurs :%d\n", + self->ioexp_id, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +/* ========== Object private functions for check & update ========== + */ +int +common_ioexp_check(struct ioexp_obj_s *self){ + + int result; + + if (self->mode != IOEXP_MODE_POLLING){ + SWPS_ERR("%s: not polling mode :%d\n", + __func__, self->mode); + return ERR_IOEXP_NOTSUPPORT; + } + mutex_lock(&self->lock); + result = self->fsm_4_polling(self); + mutex_unlock(&self->lock); + return result; +} + + +/* ========== Functions for Factory pattern ========== + */ +static struct ioexp_map_s * +get_ioexp_map(int ioexp_type){ + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + return &ioexp_map_magnolia_nab; + case IOEXP_TYPE_MAGINOLIA_4AB: + return &ioexp_map_magnolia_4ab; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + return &ioexp_map_magnolia_7ab; + case IOEXP_TYPE_REDWOOD_P01P08: + return &ioexp_map_redwood_p01p08_p17p24; + case IOEXP_TYPE_REDWOOD_P09P16: + return &ioexp_map_redwood_p09p16_p25p32; + case IOEXP_TYPE_HUDSON32IGA_P01P08: + return &ioexp_map_hudson32iga_p01p08_p17p24; + case IOEXP_TYPE_HUDSON32IGA_P09P16: + return &ioexp_map_hudson32iga_p09p16_p25p32; + case IOEXP_TYPE_CYPRESS_NABC: + return &ioexp_map_cypress_nabc; + case IOEXP_TYPE_CYPRESS_7ABC: + return &ioexp_map_cypress_7abc; + case IOEXP_TYPE_TAHOE_5A: + return &ioexp_map_tahoe_5a; + case IOEXP_TYPE_TAHOE_6ABC: + return &ioexp_map_tahoe_6abc; + case IOEXP_TYPE_SEQUOIA_NABC: + return &ioexp_map_sequoia_nabc; + case IOEXP_TYPE_LAVENDER_P65: + return &ioexp_map_lavender_p65; + default: + return NULL; + } +} + + +int +setup_ioexp_ssize_attr(struct ioexp_obj_s *self, + struct ioexp_map_s *ioexp_map_p, + int ioexp_id, + int ioexp_type, + int run_mode){ + switch (run_mode){ + case IOEXP_MODE_POLLING: /* Direct access device mode */ + case IOEXP_MODE_DIRECT: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = ERR_IOEXP_UNEXCPT; + return ERR_IOEXP_UNEXCPT; + } + /* Setup mapping structure */ + self->ioexp_map_p = kzalloc(sizeof(*ioexp_map_p), GFP_KERNEL); + if (!(self->ioexp_map_p)) { + SWPS_ERR("%s: kzalloc ioexp_map_p fail\n", __func__); + return -1; + } + memcpy(self->ioexp_map_p, ioexp_map_p, sizeof(*ioexp_map_p)); + /* Setup attributes */ + self->ioexp_id = ioexp_id; + self->ioexp_type = ioexp_type; + self->state = STATE_IOEXP_INIT; + mutex_init(&self->lock); + return 0; +} + + +static int +setup_addr_mapping(struct ioexp_obj_s *self, + struct ioexp_addr_s *addr_map_p, + int chip_amount){ + struct ioexp_addr_s *tmp_p; + if (!addr_map_p){ + SWPS_ERR("%s: map is null\n", __func__); + return -1; + } + tmp_p = kzalloc((sizeof(*addr_map_p) * chip_amount), GFP_KERNEL); + if (!tmp_p){ + SWPS_ERR("%s: kzalloc fail.\n", __func__); + return -1; + } + memcpy(tmp_p, addr_map_p, (sizeof(*addr_map_p) * chip_amount)); + self->ioexp_map_p->map_addr = tmp_p; + + return 0; +} + + +static int +setup_ioexp_public_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + case IOEXP_TYPE_CYPRESS_NABC: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = common_get_hard_rs0; + self->get_hard_rs1 = common_get_hard_rs1; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = common_set_hard_rs0; + self->set_hard_rs1 = common_set_hard_rs1; + return 0; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + self->get_present = common_get_present; + self->get_tx_fault = ioexp_get_not_support; + self->get_rxlos = ioexp_get_not_support; + self->get_tx_disable = ioexp_get_not_support; + self->get_reset = common_get_reset; + self->get_lpmod = common_get_lpmod; + self->get_modsel = common_get_modsel; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = ioexp_set_not_support; + self->set_reset = common_set_reset; + self->set_lpmod = common_set_lpmod; + self->set_modsel = common_set_modsel; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_ioexp_private_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_NABC: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + self->init = common_ioexp_init; + self->check = common_ioexp_check; + self->update_all = common_ioexp_update_all; + self->fsm_4_direct = common_ioexp_fsm_4_direct; + self->fsm_4_polling = common_ioexp_fsm_4_polling; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_i2c_client_one(struct ioexp_obj_s *self, + int chip_id){ + + char *err_msg = "ERROR"; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + struct ioexp_i2c_s *i2c_obj_p = NULL; + struct ioexp_i2c_s *i2c_curr_p = NULL; + + int chan_id = self->ioexp_map_p->map_addr[chip_id].chan_id; + adap = i2c_get_adapter(chan_id); + if(!adap){ + err_msg = "Can not get adap!"; + goto err_ioexp_setup_i2c_1; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + err_msg = "Can not kzalloc client!"; + goto err_ioexp_setup_i2c_1; + } + i2c_obj_p = kzalloc(sizeof(*i2c_obj_p), GFP_KERNEL); + if (!i2c_obj_p){ + err_msg = "Can not kzalloc i2c_obj_p!"; + goto err_ioexp_setup_i2c_2; + } + client->adapter = adap; + client->addr = self->ioexp_map_p->map_addr[chip_id].chip_addr; + i2c_obj_p->i2c_client_p = client; + i2c_obj_p->chip_id = chip_id; + i2c_obj_p->next = NULL; + if (!self->i2c_head_p){ + self->i2c_head_p = i2c_obj_p; + } else { + i2c_curr_p = self->i2c_head_p; + while (i2c_curr_p->next){ + i2c_curr_p = i2c_curr_p->next; + } + i2c_curr_p->next = i2c_obj_p; + } + return 0; + +err_ioexp_setup_i2c_2: + kfree(client); +err_ioexp_setup_i2c_1: + SWPS_ERR("%s: %s :%d\n", __func__, err_msg, chan_id); + return -1; +} + + +static int +setup_i2c_client(struct ioexp_obj_s* self){ + + int result; + int chip_id = 0; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + result = setup_i2c_client_one(self, chip_id); + if (result < 0){ + SWPS_ERR("%s fail! :%d\n", __func__, chip_id); + return -1; + } + } + return 0; +} + + +static int +setup_ioexp_config(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("IOEXP config incorrect! :%d \n",chip_id); + return -1; + } + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[offset], + addr_p->conf_default[offset]); + + if (err_code < 0){ + SWPS_INFO("%s: set conf fail! :%d \n", __func__, err_code); + return -2; + } + } + } + return 0; +} + + +struct ioexp_obj_s * +_create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_map_s* ioexp_map_p; + struct ioexp_obj_s* result_p; + struct ioexp_i2c_s *i2c_curr_p; + struct ioexp_i2c_s *i2c_next_p; + + /* Get layout */ + ioexp_map_p = get_ioexp_map(ioexp_type); + if (!ioexp_map_p){ + SWPS_ERR("%s: Invalid ioexp_type\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare IOEXP object */ + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + SWPS_ERR("%s: kzalloc failure!\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare static size attributes */ + if (setup_ioexp_ssize_attr(result_p, + ioexp_map_p, + ioexp_id, + ioexp_type, + run_mode) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + /* Prepare address mapping */ + if (setup_addr_mapping(result_p, addr_map_p, ioexp_map_p->chip_amount) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + if (setup_i2c_client(result_p) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + /* Prepare call back functions of object */ + if (setup_ioexp_public_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + if (setup_ioexp_private_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + return result_p; + +err_create_ioexp_setup_i2c_fail: + i2c_curr_p = result_p->i2c_head_p; + i2c_next_p = result_p->i2c_head_p; + while (i2c_curr_p){ + i2c_next_p = i2c_curr_p->next; + kfree(i2c_curr_p->i2c_client_p); + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } +err_create_ioexp_setup_attr_fail: + kfree(result_p); +err_create_ioexp_fail: + SWPS_ERR("%s: fail! :%d :%d \n", + __func__, ioexp_id, ioexp_type); + return NULL; +} + + +int +create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_obj_s *ioexp_p = NULL; + + ioexp_p = _create_ioexp_obj(ioexp_id, ioexp_type, + addr_map_p, run_mode); + if (!ioexp_p){ + return -1; + } + if (ioexp_head_p == NULL){ + ioexp_head_p = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; + } + ioexp_tail_p->next = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; +} + + +static int +_init_ioexp_obj(struct ioexp_obj_s* self) { + + char *err_msg = "ERR"; + char *func_name = "_init_ioexp_obj"; + + /* Setup IOEXP configure byte */ + if (setup_ioexp_config(self) < 0){ + err_msg = "setup_ioexp_config fail"; + goto err_init_ioexp_obj; + } + /* Setup default data */ + if (_ioexp_init_handler(self) < 0){ + err_msg = "_ioexp_init_handler fail"; + goto err_init_ioexp_obj; + } + /* Update all */ + if (self->state == STATE_IOEXP_NORMAL){ + if (self->update_all(self, 1, func_name) < 0){ + err_msg = "update_all() fail"; + goto err_init_ioexp_obj; + } + } + return 0; + +err_init_ioexp_obj: + SWPS_DEBUG("%s: %s\n", __func__, err_msg); + return -1; +} + + +int +init_ioexp_objs(void){ + /* Return value: + * 0: Success + * -1: Detect topology error + * -2: SWPS internal error + */ + + struct ioexp_obj_s *curr_p = ioexp_head_p; + + if (!curr_p) { + SWPS_ERR("%s: ioexp_head_p is NULL\n", __func__); + return -2; + } + while (curr_p) { + if (_init_ioexp_obj(curr_p) < 0) { + SWPS_DEBUG("%s: _init_ioexp_obj() fail\n", __func__); + return -1; + } + curr_p = curr_p->next; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + + +void +clean_ioexp_objs(void){ + + struct ioexp_i2c_s *i2c_curr_p = NULL; + struct ioexp_i2c_s *i2c_next_p = NULL; + struct ioexp_obj_s *ioexp_next_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + if (ioexp_head_p == NULL){ + ioexp_tail_p = NULL; + return; + } + while(ioexp_curr_p){ + ioexp_next_p = ioexp_curr_p->next; + if (ioexp_curr_p->ioexp_map_p) { + if (ioexp_curr_p->ioexp_map_p->map_addr) { + kfree(ioexp_curr_p->ioexp_map_p->map_addr); + } + kfree(ioexp_curr_p->ioexp_map_p); + } + + i2c_curr_p = ioexp_curr_p->i2c_head_p; + while (i2c_curr_p) { + i2c_next_p = i2c_curr_p->next; + kfree(i2c_curr_p->i2c_client_p); + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } + kfree(ioexp_curr_p); + ioexp_curr_p = ioexp_next_p; + } + ioexp_tail_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} + + +int +check_ioexp_objs(void){ + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while (ioexp_curr_p){ + if ( (ioexp_curr_p->check(ioexp_curr_p)) < 0){ + SWPS_INFO("check IOEXP-%d fail! :%d\n", + ioexp_curr_p->ioexp_id, ioexp_curr_p->ioexp_type); + return -1; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} + + +struct ioexp_obj_s * +get_ioexp_obj(int ioexp_id){ + + struct ioexp_obj_s *result_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + if (ioexp_curr_p->ioexp_id == ioexp_id){ + result_p = ioexp_curr_p; + break; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return result_p; +} + + +void +unlock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_unlock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } +} + + +int +lock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_lock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} + + +int +check_channel_tier_1(void) { + + if ( (!_is_channel_ready(ioexp_head_p)) && + (!_is_channel_ready(ioexp_tail_p)) ){ + return -1; + } + return 0; +} + + +static int +_scan_channel_tier_1(int force, + int show_err) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + int ready = 0; + + if (!ioexp_curr_p) { + goto err_scan_tier_1_channel; + } + while(ioexp_curr_p) { + ready = _is_channel_ready(ioexp_curr_p); + if ((!ready) && (!force)) { + goto err_scan_tier_1_channel; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; + +err_scan_tier_1_channel: + if (show_err) { + if (ioexp_curr_p) { + SWPS_INFO("%s: IOEXP-%d fail\n", __func__, ioexp_curr_p->ioexp_id); + } else { + SWPS_INFO("%s: IOEXP is null.\n", __func__); + } + } + return -1; +} + + +static int +_scan_channel_tier_1_single(void) { + + int ret = 0; + int chan_id = 0; + int fake_cid = 0; + int fake_offs = 0; + int fake_addr = 0; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + + if (ioexp_head_p->ioexp_id != ioexp_tail_p->ioexp_id) { + return 0; + } + /* Setup i2c_client */ + chan_id = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chan_id; + fake_addr = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chip_addr; + adap = i2c_get_adapter((chan_id + 1)); + if(!adap){ + SWPS_INFO("%s: Can not get adap!\n", __func__); + return 0; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + SWPS_INFO("%s: Can not kzalloc client!\n", __func__); + return 0; + } + client->adapter = adap; + client->addr = fake_addr; + /* Fouce move ioexp ptr to next */ + ret = i2c_smbus_read_byte_data(client, fake_offs); + SWPS_DEBUG("%s: move ioexp_ptr done. :%d\n", __func__, ret); + kfree(client); + return 1; +} + + +int +resync_channel_tier_1(void) { + + char *emsg = "ERR"; + + if (!ioexp_head_p) { + emsg = "ioexp_head_p is NULL"; + goto err_resync_ioexp_status_1; + } + /* Run all */ + if (ioexp_head_p->ioexp_id == ioexp_tail_p->ioexp_id) { + _scan_channel_tier_1_single(); + } else { + _scan_channel_tier_1(1, 0); + } + /* Check all */ + if (_scan_channel_tier_1(0, 1) < 0) { + emsg = "resync tier-1 channel fail"; + goto err_resync_ioexp_status_1; + } + return 0; + +err_resync_ioexp_status_1: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/io_expander.h b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/io_expander.h new file mode 100644 index 00000000000..82fef3f7feb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/io_expander.h @@ -0,0 +1,183 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef IO_EXPANDER_H +#define IO_EXPANDER_H + +#include + + +/* IOEXP type define (SFP series) */ +#define IOEXP_TYPE_MAGINOLIA_NAB (10101) +#define IOEXP_TYPE_MAGINOLIA_4AB (10102) +#define IOEXP_TYPE_CYPRESS_NABC (10103) + +/* IOEXP type define (QSFP series) */ +#define IOEXP_TYPE_MAGINOLIA_7AB (10201) +#define IOEXP_TYPE_REDWOOD_P01P08 (10202) +#define IOEXP_TYPE_REDWOOD_P09P16 (10203) +#define IOEXP_TYPE_HUDSON32IGA_P01P08 (10204) +#define IOEXP_TYPE_HUDSON32IGA_P09P16 (10205) +#define IOEXP_TYPE_SPRUCE_7AB (10206) +#define IOEXP_TYPE_CYPRESS_7ABC (10207) +#define IOEXP_TYPE_TAHOE_5A (10208) +#define IOEXP_TYPE_TAHOE_6ABC (10209) +#define IOEXP_TYPE_SEQUOIA_NABC (10210) +#define IOEXP_TYPE_LAVENDER_P65 (10211) + +/* IOEXP mode define */ +#define IOEXP_MODE_POLLING (19000) +#define IOEXP_MODE_DIRECT (19001) + +/* IOEXP state define */ +#define STATE_IOEXP_NORMAL (0) +#define STATE_IOEXP_INIT (-1) +#define STATE_IOEXP_ABNORMAL (-2) + +/* IOEXP error code define */ +#define ERR_IOEXP_NOTSUPPORT (-100) +#define ERR_IOEXP_UNINIT (-101) +#define ERR_IOEXP_BADCONF (-102) +#define ERR_IOEXP_ABNORMAL (-103) +#define ERR_IOEXP_NOSTATE (-104) +#define ERR_IOEXP_BADINPUT (-105) +#define ERR_IOEXP_UNEXCPT (-199) + + +#define SWPS_INFO(fmt, args...) printk( KERN_INFO "[SWPS] " fmt, ##args) +#define SWPS_WARN(fmt, args...) printk( KERN_WARNING "[SWPS] " fmt, ##args) +#define SWPS_ERR(fmt, args...) printk( KERN_ERR "[SWPS] " fmt, ##args) + +#ifdef DEBUG_SWPS +# define SWPS_DEBUG(fmt, args...) printk( KERN_DEBUG "[SWPS] " fmt, ##args) +#else +# define SWPS_DEBUG(fmt, args...) +#endif + + +struct ioexp_addr_s { + int chan_id; + int chip_addr; + int read_offset[8]; + int write_offset[8]; + int conf_offset[8]; + uint8_t data_default[8]; + uint8_t conf_default[8]; +}; + +struct ioexp_i2c_s { + int chip_id; + struct i2c_client *i2c_client_p; + struct ioexp_i2c_s *next; +}; + + +struct ioexp_bitmap_s { + int chip_id; /* IOEXP chip id */ + int ioexp_voffset; /* IOEXP virtual offset */ + int bit_shift; +}; + +struct ioexp_map_s { + int chip_amount; /* Number of chips that IOEXP object content */ + int data_width; /* Number of (Read/Write/Config) bytes */ + struct ioexp_addr_s *map_addr; /* Chip address info */ + struct ioexp_bitmap_s map_present[10]; /* IOEXP for SFP / QSFP */ + struct ioexp_bitmap_s map_tx_disable[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_tx_fault[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_rxlos[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_reset[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_lpmod[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_modsel[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs0[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs1[10]; /* IOEXP for QSFP */ +}; + +struct ioexp_data_s { + uint8_t data[8]; +}; + +struct ioexp_obj_s { + + /* ============================ + * Object public property + * ============================ + */ + int ioexp_id; + int ioexp_type; + + /* ============================ + * Object private property + * ============================ + */ + struct ioexp_data_s chip_data[16]; /* Max: 8-ioexp in one virt-ioexp(ioexp_obj) */ + struct ioexp_map_s *ioexp_map_p; + struct ioexp_obj_s *next; + struct ioexp_i2c_s *i2c_head_p; + struct mutex lock; + int mode; + int state; + + /* =========================================== + * Object public functions + * =========================================== + */ + int (*get_present)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_fault)(struct ioexp_obj_s *self, int virt_offset); + int (*get_rxlos)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_disable)(struct ioexp_obj_s *self, int virt_offset); + int (*get_reset)(struct ioexp_obj_s *self, int virt_offset); + int (*get_lpmod)(struct ioexp_obj_s *self, int virt_offset); + int (*get_modsel)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs0)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs1)(struct ioexp_obj_s *self, int virt_offset); + int (*set_tx_disable)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_reset)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_lpmod)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_modsel)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs0)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs1)(struct ioexp_obj_s *self, int virt_offset, int input_val); + + /* =========================================== + * Object private functions + * =========================================== + */ + int (*init)(struct ioexp_obj_s *self); + int (*check)(struct ioexp_obj_s *self); + int (*update_all)(struct ioexp_obj_s *self, int show_err, char *caller_name); + int (*fsm_4_direct)(struct ioexp_obj_s* self); + int (*fsm_4_polling)(struct ioexp_obj_s* self); +}; + + +struct ioexp_obj_s* get_ioexp_obj(int ioexp_id); +int create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode); +int init_ioexp_objs(void); +int check_ioexp_objs(void); +void clean_ioexp_objs(void); + +void unlock_ioexp_all(void); +int lock_ioexp_all(void); + +int check_channel_tier_1(void); +int resync_channel_tier_1(void); + +/* Macro for bit control */ +#define SWP_BIT_SET(byte_val,bit_shift) ((byte_val) |= (1<<(bit_shift))) +#define SWP_BIT_CLEAR(byte_val,bit_shift) ((byte_val) &= ~(1<<(bit_shift))) + + +#endif /* IO_EXPANDER_H */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/transceiver.c b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/transceiver.c new file mode 100644 index 00000000000..e7f3cf70fa6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/transceiver.c @@ -0,0 +1,8388 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include "io_expander.h" +#include "transceiver.h" + + +/* ========== Register EEPROM address mapping ========== + */ +struct eeprom_map_s eeprom_map_sfp = { + .addr_br =0x50, .page_br =-1, .offset_br =12, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =94, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =-1, .offset_connector =2, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =-1, .offset_diag_type =92 , .length_diag_type =1, + .addr_extbr =-1, .page_extbr =-1, .offset_extbr =-1, .length_extbr =-1, + .addr_ext_id =0x50, .page_ext_id =-1, .offset_ext_id =1, .length_ext_id =1, + .addr_id =0x50, .page_id =-1, .offset_id =0, .length_id =1, + .addr_len_sm =0x50, .page_len_sm =-1, .offset_len_sm =15, .length_len_sm =1, + .addr_len_smf =0x50, .page_len_smf =-1, .offset_len_smf =14, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =-1, .offset_len_om1 =17, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =-1, .offset_len_om2 =16, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =-1, .offset_len_om3 =19, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =-1, .offset_len_om4 =18, .length_len_om4 =1, + .addr_option =0x50, .page_option =-1, .offset_option =64, .length_option =2, + .addr_rate_id =0x50, .page_rate_id =-1, .offset_rate_id =13, .length_rate_id =1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =0x51, .page_rx_em =-1, .offset_rx_em =115, .length_rx_em =1, + .addr_rx_los =-1, .page_rx_los =-1, .offset_rx_los =-1, .length_rx_los =-1, + .addr_rx_power =0x51, .page_rx_power =-1, .offset_rx_power =104, .length_rx_power =2, + .addr_soft_rs0 =0x51, .page_soft_rs0 =-1, .offset_soft_rs0 =110, .length_soft_rs0 =1, + .addr_soft_rs1 =0x51, .page_soft_rs1 =-1, .offset_soft_rs1 =118, .length_soft_rs0 =1, + .addr_temp =0x51, .page_temp =-1, .offset_temp =96, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =-1, .offset_trancomp =3, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =-1, .offset_trancomp_ext =36, .length_trancomp_ext =1, + .addr_tx_bias =0x51, .page_tx_bias =-1, .offset_tx_bias =100, .length_tx_bias =2, + .addr_tx_disable =-1, .page_tx_disable =-1, .offset_tx_disable =-1, .length_tx_disable =-1, + .addr_tx_eq =0x51, .page_tx_eq =-1, .offset_tx_eq =114, .length_tx_eq =1, + .addr_tx_fault =-1, .page_tx_fault =-1, .offset_tx_fault =-1, .length_tx_fault =-1, + .addr_tx_power =0x51, .page_tx_power =-1, .offset_tx_power =102, .length_tx_power =2, + .addr_vendor_name =0x50, .page_vendor_name =-1, .offset_vendor_name =20, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =-1, .offset_vendor_pn =40, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =-1, .offset_vendor_rev =56, .length_vendor_rev =4, + .addr_vendor_sn =0x50, .page_vendor_sn =-1, .offset_vendor_sn =68, .length_vendor_sn =16, + .addr_voltage =0x51, .page_voltage =-1, .offset_voltage =98, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =-1, .offset_wavelength =60, .length_wavelength =2, +}; + +struct eeprom_map_s eeprom_map_qsfp = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =-1, .page_rx_em =-1, .offset_rx_em =-1, .length_rx_em =-1, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =-1, .page_tx_eq =-1, .offset_tx_eq =-1, .length_tx_eq =-1, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, +}; + +struct eeprom_map_s eeprom_map_qsfp28 = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =0x50, .page_cdr =-1, .offset_cdr =98, .length_cdr =1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =0x50, .page_rx_am =3, .offset_rx_am =238, .length_rx_am =2, + .addr_rx_em =0x50, .page_rx_em =3, .offset_rx_em =236, .length_rx_em =2, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =0x50, .page_tx_eq =3, .offset_tx_eq =234, .length_tx_eq =2, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, +}; + + +/* ========== Utility Functions ========== + */ +static int +get_bit(uint8_t origin_byte, int bit_shift) { + return (int)((origin_byte >> bit_shift) & 0x1); +} + +static int +transform_word_to_int(uint8_t hight_byte, + uint8_t low_byte) { + return ((((int)hight_byte) << 8) + (int)low_byte); +} + + +void +alarm_msg_2_user(struct transvr_obj_s *self, + char *emsg) { + + SWPS_ERR("%s on %s.\n", emsg, self->swp_name); +} + + +/* ========== Private functions ========== + */ +static int +_reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self); + +static int +_transvr_init_handler(struct transvr_obj_s *self); + +int +_transvr_clean_handler(struct transvr_obj_s *self); + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self); + + +void +lock_transvr_obj(struct transvr_obj_s *self) { + + mutex_lock(&self->lock); + self->curr_page = VAL_TRANSVR_PAGE_FREE; +} + + +void +unlock_transvr_obj(struct transvr_obj_s *self) { + + self->curr_page = VAL_TRANSVR_PAGE_FREE; + mutex_unlock(&self->lock); +} + + +static int +_check_by_mode(struct transvr_obj_s *self, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + char *caller_name){ + + int return_val = ERR_TRANSVR_UNEXCPT; + + switch (self->mode){ + case TRANSVR_MODE_POLLING: + switch (self->state){ + case STATE_TRANSVR_CONNECTED: + goto ok_check_by_mode_1; + case STATE_TRANSVR_NEW: + case STATE_TRANSVR_INIT: + return ERR_TRANSVR_UNINIT; + case STATE_TRANSVR_DISCONNECTED: + return ERR_TRANSVR_UNPLUGGED; + case STATE_TRANSVR_UNEXCEPTED: + return ERR_TRANSVR_ABNORMAL; + case STATE_TRANSVR_ISOLATED: + return ERR_TRNASVR_BE_ISOLATED; + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + + case TRANSVR_MODE_DIRECT: + return_val = self->fsm_4_direct(self, caller_name); + if (return_val < 0){ + return return_val; + } + goto ok_check_by_mode_1; + + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + +ok_check_by_mode_1: + return attr_update_func(self, 0); + +err_check_by_mode_1: + SWPS_INFO("_check_by_mode: mode:%d state:%d\n", self->mode, self->state); + return ERR_TRANSVR_UNEXCPT; +} + + +static void +_transvr_clean_retry(struct transvr_obj_s *self) { + self->retry = 0; +} + + +static int +_transvr_handle_retry(struct transvr_obj_s *self, int retry) { + /* Return: 0: keep retry + * -1: stop retry + */ + if (self->retry == 0) { + self->retry = retry; + } + self->retry -= 1; + if (self->retry <= 0) { + _transvr_clean_retry(self); + return -1; + } + return 0; +} + + +static int +_common_setup_page(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int show_e) { + /* return: + * 0 : OK + * -1 : EEPROM settings incorrect + * -2 : I2C R/W failure + * -3 : Undefined case + */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Check */ + if ((addr < 0) || (offset < 0) || (len < 0)) { + emsg = "EEPROM settings incorrect"; + retval = -1; + goto err_common_setup_page; + } + /* Case1: continue access */ + if ((self->i2c_client_p->addr == addr) && + (self->curr_page == page)) { + return 0; + } + self->i2c_client_p->addr = addr; + /* Case2: select lower page */ + if (page == -1) { + self->curr_page = page; + return 0; + } + /* Case3: select upper page */ + if (page >= 0) { + goto upper_common_setup_page; + } + /* Unexpected case */ + show_e = 1; + emsg = "Unexpected case"; + retval = -3; + goto err_common_setup_page; + +upper_common_setup_page: + if (i2c_smbus_write_byte_data(self->i2c_client_p, + VAL_TRANSVR_PAGE_SELECT_OFFSET, + page) < 0) { + emsg = "I2C R/W failure"; + retval = -2; + goto err_common_setup_page; + } + self->curr_page = page; + mdelay(VAL_TRANSVR_PAGE_SELECT_DELAY); + return 0; + +err_common_setup_page: + if (show_e) { + SWPS_INFO("%s: %s", __func__, emsg); + SWPS_INFO("%s: :0x%02x :%d :%d :%d\n", + __func__, addr, page, offset, len); + } + return retval; +} + +/* +static int +_common_setup_password(struct transvr_obj_s *self, + int addr, + int page, + int offs, + uint8_t pwd[4], + int show_e) { + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, 4, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_setup_password; + } + for (i=0; i<4; i++) { + err = i2c_smbus_write_byte_data(self->i2c_client_p, + (offs + i), + pwd[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_setup_password; + } + } + return 0; + +err_common_setup_password: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} +*/ + +static int +_common_update_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + uint8_t *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_uint8_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_uint8_attr; + } + buf[i] = err; + } + return 0; + +err_common_update_uint8_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_int_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_int_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_int_attr; + } + buf[i] = (int)err; + } + return 0; + +err_common_update_int_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_INT_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_string_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + char buf[], + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_string_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_string_attr; + } + buf[i] = (char)err; + } + return 0; + +err_common_update_string_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = 'e'; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + uint8_t update, + uint8_t *buf, + char *caller, + int show_e){ + int len = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + if ((*buf) == update){ + return 0; + } + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + err = i2c_smbus_write_byte_data(self->i2c_client_p, + offset, + update); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + (*buf) = update; + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_array(struct transvr_obj_s *self, + int addr, + int page, + int offs, + int len, + uint8_t update[], + uint8_t buf[], + char *caller, + int show_e){ + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + for (i=0; ii2c_client_p, + (offs + i), + update[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + buf[i] = update[i]; + } + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, emsg, caller, err, i); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_attr_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_id, + self->eeprom_map_p->page_id, + self->eeprom_map_p->offset_id, + self->eeprom_map_p->length_id, + &(self->id), + "_common_update_attr_id", + show_err); +} + + +static int +_common_update_attr_extended_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_ext_id, + self->eeprom_map_p->page_ext_id, + self->eeprom_map_p->offset_ext_id, + self->eeprom_map_p->length_ext_id, + &(self->ext_id), + "_common_update_attr_extended_id", + show_err); +} + + +static int +_common_update_attr_connector(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_connector, + self->eeprom_map_p->page_connector, + self->eeprom_map_p->offset_connector, + self->eeprom_map_p->length_connector, + &(self->connector), + "_common_update_attr_connector", + show_err); +} + + +static int +_common_update_attr_transvr_comp(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp, + self->eeprom_map_p->page_trancomp, + self->eeprom_map_p->offset_trancomp, + self->eeprom_map_p->length_trancomp, + self->transvr_comp, + "_common_update_attr_transvr_comp", + show_err); +} + + +static int +_common_update_attr_transvr_comp_ext(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp_ext, + self->eeprom_map_p->page_trancomp_ext, + self->eeprom_map_p->offset_trancomp_ext, + self->eeprom_map_p->length_trancomp_ext, + &(self->transvr_comp_ext), + "_common_update_attr_transvr_comp_ext", + show_err); +} + + +static int +_common_update_attr_vendor_name(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_name, + self->eeprom_map_p->page_vendor_name, + self->eeprom_map_p->offset_vendor_name, + self->eeprom_map_p->length_vendor_name, + self->vendor_name, + "_common_update_attr_vendor_name", + show_err); +} + + +static int +_common_update_attr_vendor_pn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_pn, + self->eeprom_map_p->page_vendor_pn, + self->eeprom_map_p->offset_vendor_pn, + self->eeprom_map_p->length_vendor_pn, + self->vendor_pn, + "_common_update_attr_vendor_pn", + show_err); +} + + +static int +_common_update_attr_vendor_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_rev, + self->eeprom_map_p->page_vendor_rev, + self->eeprom_map_p->offset_vendor_rev, + self->eeprom_map_p->length_vendor_rev, + self->vendor_rev, + "_common_update_attr_vendor_rev", + show_err); +} + + +static int +_common_update_attr_vendor_sn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_sn, + self->eeprom_map_p->page_vendor_sn, + self->eeprom_map_p->offset_vendor_sn, + self->eeprom_map_p->length_vendor_sn, + self->vendor_sn, + "_common_update_attr_vendor_sn", + show_err); +} + + +static int +_common_update_attr_br(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_br, + self->eeprom_map_p->page_br, + self->eeprom_map_p->offset_br, + self->eeprom_map_p->length_br, + &(self->br), + "_common_update_attr_br", + show_err); +} + + +static int +_common_update_attr_len_smf(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_smf, + self->eeprom_map_p->page_len_smf, + self->eeprom_map_p->offset_len_smf, + self->eeprom_map_p->length_len_smf, + &(self->len_smf), + "_common_update_attr_len_smf", + show_err); +} + + +static int +_common_update_attr_len_om1(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om1, + self->eeprom_map_p->page_len_om1, + self->eeprom_map_p->offset_len_om1, + self->eeprom_map_p->length_len_om1, + &(self->len_om1), + "_common_update_attr_len_om1", + show_err); +} + +static int +_common_update_attr_len_om2(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om2, + self->eeprom_map_p->page_len_om2, + self->eeprom_map_p->offset_len_om2, + self->eeprom_map_p->length_len_om2, + &(self->len_om2), + "_common_update_attr_len_om2", + show_err); +} + +static int +_common_update_attr_len_om3(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om3, + self->eeprom_map_p->page_len_om3, + self->eeprom_map_p->offset_len_om3, + self->eeprom_map_p->length_len_om3, + &(self->len_om3), + "_common_update_attr_len_om3", + show_err); +} + + +static int +_common_update_attr_len_om4(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om4, + self->eeprom_map_p->page_len_om4, + self->eeprom_map_p->offset_len_om4, + self->eeprom_map_p->length_len_om4, + &(self->len_om4), + "_common_update_attr_len_om4", + show_err); +} + + +static int +_common_update_attr_option(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_option, + self->eeprom_map_p->page_option, + self->eeprom_map_p->offset_option, + self->eeprom_map_p->length_option, + self->option, + "_common_update_attr_option", + show_err); +} + + +static int +_common_update_attr_comp_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_comp_rev, + self->eeprom_map_p->page_comp_rev, + self->eeprom_map_p->offset_comp_rev, + self->eeprom_map_p->length_comp_rev, + &(self->comp_rev), + "_common_update_attr_comp_rev", + show_err); +} + + +static int +_common_update_attr_diag_type(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_diag_type, + self->eeprom_map_p->page_diag_type, + self->eeprom_map_p->offset_diag_type, + self->eeprom_map_p->length_diag_type, + &(self->diag_type), + "_common_update_attr_diag_type", + show_err); +} + + +static int +_common_update_attr_wavelength(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_wavelength, + self->eeprom_map_p->page_wavelength, + self->eeprom_map_p->offset_wavelength, + self->eeprom_map_p->length_wavelength, + self->wavelength, + "_common_update_attr_wavelength", + show_err); +} + + +int +_common_get_option_value(struct transvr_obj_s *self, + int offset, + int bit_shift) { + /* SFP: + * - option[0] = A0h / 64 + * - option[1] = A0h / 65 + * QSFP: + * - option[0] = 00h / 193 + * - option[1] = 00h / 194 + * - option[2] = 00h / 195 + */ + return (self->option[offset] & (1 << bit_shift)); +} + + +static int +_sfp_update_attr_len_sm(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_sm, + self->eeprom_map_p->page_len_sm, + self->eeprom_map_p->offset_len_sm, + self->eeprom_map_p->length_len_sm, + &(self->len_sm), + "_common_update_attr_len_sm", + show_err); +} + + +static int +_sfp_update_attr_rate_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_rate_id, + self->eeprom_map_p->page_rate_id, + self->eeprom_map_p->offset_rate_id, + self->eeprom_map_p->length_rate_id, + &(self->rate_id), + "_sfp_update_attr_rate_id", + show_err); +} + + +static int +_sfp_update_attr_soft_rs0(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + self->eeprom_map_p->length_soft_rs0, + &(self->soft_rs0), + "_sfp_update_attr_soft_rs0", + show_err); +} + + +static int +_sfp_update_attr_soft_rs1(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + self->eeprom_map_p->length_soft_rs1, + &(self->soft_rs1), + "_sfp_update_attr_soft_rs1", + show_err); +} + + +int +_sfp_is_diag_support(struct transvr_obj_s *self){ + + uint8_t bit_mask = 0xC0; /* 1100 0000 */ + uint8_t en_val = 0x40; /* 0100 0000 */ + uint8_t checkval = (self->diag_type & bit_mask); + + if (checkval == en_val) { + return 1; + } + return 0; +} + + +static int +_sfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_sfp_update_attr_curr_temp", + show_err); +} + + +static int +_sfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_sfp_update_attr_curr_voltage", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_sfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_sfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_sfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_sfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_sfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_sfp_update_attr_rx_em", + show_err); +} + + +static int +_sfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_sfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_cdr(struct transvr_obj_s *self, + int show_err){ + if (self->type != TRANSVR_TYPE_QSFP_28){ + self->cdr = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + self->eeprom_map_p->length_cdr, + &(self->cdr), + "_common_update_attr_cdr", + show_err); +} + + +static int +_qsfg_update_attr_extbr(struct transvr_obj_s *self, + int show_err) { + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_extbr, + self->eeprom_map_p->page_extbr, + self->eeprom_map_p->offset_extbr, + self->eeprom_map_p->length_extbr, + &(self->extbr), + "_common_update_attr_extbr", + show_err); +} + + +static int +_qsfp_is_diag_support(struct transvr_obj_s *self, + int diag_type) { + /* Input Parm: diag_type + * => 1 : temperature + * => 2 : voltage + * => 3 : tx relate + * => 4 : rx relate + */ + uint8_t mask_b2 = 0x04; /* 0000 0100 */ + uint8_t mask_b3 = 0x08; /* 0000 1000 */ + + switch (diag_type) { + case 1: /* temperature */ + case 2: /* voltage */ + /* Direct access target, because of spec not defined */ + return 1; + case 3: + case 4: + /* [Note] + * Due to lot of transceiver vendor defined it not rigorously and + * consider of general support, we seem it as supported if there + * are bit-2 OR bit-3 defined by transceiver vendor. + */ + if ( ((self->diag_type & mask_b2) == mask_b2 ) || + ((self->diag_type & mask_b3) == mask_b3 ) ){ + return 1; + } + return 0; + default: + SWPS_INFO("%s: undefined diag_type:%d\n", + __func__, diag_type); + break; + } + return 0; +} + + +int +_qsfp_is_implement_tx_disable(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-4 + */ + int byte = 2; + int bit = 4; + return _common_get_option_value(self, byte, bit); +} + + +int +_qsfp_is_implement_tx_fault(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-3 + */ + int byte = 2; + int bit = 3; + return _common_get_option_value(self, byte, bit); +} + + +static int +_qsfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + int diag_type = 1; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_qsfp_update_attr_curr_temp", + show_err); +} + + +static int +_qsfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + int diag_type = 2; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_qsfp_update_attr_curr_voltage", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_qsfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_qsfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_qsfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 4; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_qsfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_qsfp_update_attr_soft_rx_los(struct transvr_obj_s *self, + int show_err){ + + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_los, + self->eeprom_map_p->page_rx_los, + self->eeprom_map_p->offset_rx_los, + self->eeprom_map_p->length_rx_los, + &(self->rx_los), + "_qsfp_update_attr_soft_rx_los", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_disable(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_disable(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_update_attr_soft_tx_disable", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_fault(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_fault(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_fault, + self->eeprom_map_p->page_tx_fault, + self->eeprom_map_p->offset_tx_fault, + self->eeprom_map_p->length_tx_fault, + &(self->tx_fault), + "_qsfp_update_attr_soft_tx_fault", + show_err); +} + + +static int +_qsfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_qsfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_rx_am(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + self->rx_am, + "_qsfp_update_attr_rx_am", + show_err); +} + + +static int +_qsfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_qsfp_update_attr_rx_em", + show_err); +} + + +int +_common_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = "err"; + + if (_common_update_attr_id(self, show_err) < 0) { + err_str = "_common_update_attr_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_extended_id(self, show_err) < 0) { + err_str = "_common_update_attr_extended_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_connector(self, show_err) < 0) { + err_str = "_common_update_attr_connector"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp_ext(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp_ext"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_name(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_name"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_pn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_pn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_rev(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_sn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_sn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_br(self, show_err) < 0) { + err_str = "_common_update_attr_br"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_smf(self, show_err) < 0) { + err_str = "_common_update_attr_len_smf"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om1(self, show_err) < 0) { + err_str = "_common_update_attr_len_om1"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om2(self, show_err) < 0) { + err_str = "_common_update_attr_len_om2"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om3(self, show_err) < 0) { + err_str = "_common_update_attr_len_om3"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om4(self, show_err) < 0) { + err_str = "_common_update_attr_len_om4"; + goto err_common_update_attr_all; + } + if (_common_update_attr_option(self, show_err) < 0) { + err_str = "_common_update_attr_option"; + goto err_common_update_attr_all; + } + if (_common_update_attr_comp_rev(self, show_err) < 0) { + err_str = "_common_update_attr_comp_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_diag_type(self, show_err) < 0) { + err_str = "_common_update_attr_diag_type"; + goto err_common_update_attr_all; + } + if (_common_update_attr_wavelength(self, show_err) < 0) { + err_str = "_common_update_attr_wavelength"; + goto err_common_update_attr_all; + } + return 0; + +err_common_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_sfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_len_sm(self, show_err) < 0) { + err_str = "_sfp_update_attr_len_sm"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_rate_id(self, show_err) < 0) { + err_str = "_sfp_update_attr_rate_id"; + goto err_sfp_update_attr_all; + } + if ((self->rate_id) > 0) { + if (_sfp_update_attr_soft_rs0(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs0"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_soft_rs1(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs1"; + goto err_sfp_update_attr_all; + } + } + return 0; + +err_sfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_qsfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_qsfp_update_attr_all; + } + if (_qsfg_update_attr_extbr(self, show_err) < 0) { + err_str = "_qsfg_update_attr_extbr"; + goto err_qsfp_update_attr_all; + } + if (self->type == TRANSVR_TYPE_QSFP_28) { + if (_qsfp_update_attr_cdr(self, 1) < 0) { + err_str = "_qsfp_update_attr_cdr"; + goto err_qsfp_update_attr_all; + } + } + return 0; + +err_qsfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +/* ========== Object functions for common type ========== + */ +int +_common_count_temp(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + int sign = 0; + int high = 0; + int low = 0; + int lmax = 8; + + /* Count high */ + sign = get_bit(high_byte,7); + SWP_BIT_CLEAR(high_byte, 7); + high = (int)high_byte; + if (sign == 1) { + high = 0 - high; + } + /* Count low */ + low = (get_bit(low_byte, 7) * 500); + low += (get_bit(low_byte, 6) * 250); + low += (get_bit(low_byte, 5) * 125); + low += (get_bit(low_byte, 4) * 62); + low = (low / 100); + /* Integrate High and Low */ + return snprintf(buf_p, lmax, "%d.%d\n", high, low); +} + + +int +_common_count_voltage(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note]: + * Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts. Practical + * considerations to be defined by transceiver manufacturer will + * tend to limit the actual bounds of the supply voltage measurement. + * Accuracy is vendor specific but must be better than 3% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. Note that in some transceivers, transmitter supply + * voltage and receiver supply voltage are isolated. In that case, + * only one supply is monitored. Refer to the device specification + * for more detail. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 100 uV (1mV=1000uV) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 Volt */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_tx_bias(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 2 uA (1mA=1000uA) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total*2) / 1000); + val_f = (((total*2) - (val_i*1000)) / 100); + /* Return Unit: 1 mA */ + return snprintf(buf_p, lmax, "%d.%01d\n", val_i, val_f); +} + + +int +_common_count_tx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_rx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_wavelength(struct transvr_obj_s *self, + uint8_t high_byte, + uint8_t low_byte) { + /* [Note] + * SFP : uint 1 um. + * QSFP: unit 0.05 um. + */ + int total = 0; + + total = transform_word_to_int(high_byte, low_byte); + switch (self->type) { + case TRANSVR_TYPE_SFP: + return total; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + return (total/20); + + default: + break; + } + return ERR_TRANSVR_UNDEFINED; +} + + +int +common_get_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_id, + "common_get_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->id; +} + + +int +common_get_ext_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "common_get_ext_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->ext_id; +} + + +int +common_get_connector(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_connector, + "common_get_connector"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->connector; +} + + +int +common_get_vendor_name(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_name, + "common_get_vendor_name"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); +} + + +int +common_get_vendor_pn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_pn, + "common_get_vendor_pn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); +} + + +int +common_get_vendor_rev(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_rev, + "common_get_vendor_rev"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); +} + + +int +common_get_vendor_sn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_sn, + "common_get_vendor_sn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); +} + + +int +common_get_br(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return (int)self->br; + } + err = _check_by_mode(self, + &_common_update_attr_br, + "common_get_br"); + if (err < 0){ + return err; + } + /* Transform to INT to show error case */ + return (int)self->br; +} + + +int +common_get_len_smf(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_smf; + } + err = _check_by_mode(self, + &_common_update_attr_len_smf, + "common_get_len_smf"); + if (err < 0){ + return err; + } + return self->len_smf; +} + + +int +common_get_len_om1(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om1; + } + err = _check_by_mode(self, + &_common_update_attr_len_om1, + "common_get_len_om1"); + if (err < 0){ + return err; + } + return self->len_om1; +} + + +int +common_get_len_om2(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om2; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om2, + "common_get_len_om2"); + if (err < 0){ + return err; + } + return self->len_om2; +} + + +int +common_get_len_om3(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om3; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om3, + "common_get_len_om3"); + if (err < 0){ + return err; + } + return self->len_om3; +} + + +int +common_get_len_om4(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om4; + } + err = _check_by_mode(self, + &_common_update_attr_len_om4, + "common_get_len_om4"); + if (err < 0){ + return err; + } + return self->len_om4; +} + + +int +common_get_comp_extended(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp_ext, + "common_get_comp_extended"); + if (err_code < 0){ + return err_code; + } + return self->transvr_comp_ext; +} + + +int +common_get_comp_rev(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_comp_rev, + "common_get_comp_rev"); + if (err_code < 0){ + return err_code; + } + return self->comp_rev; +} + + +int +common_get_info(struct transvr_obj_s *self){ + + if (self->state != STATE_TRANSVR_CONNECTED) { + return self->state; + } + return self->info; +} + + +int +_common_get_if_lane(struct transvr_obj_s *self, + char *result){ + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_M_STR); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + memset(tmp_str, 0, LEN_TRANSVR_M_STR); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_M_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_M_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_M_STR); + } + if (i == 0) { + return EVENT_TRANSVR_TASK_FAIL; + } + return 0; +} + + +int +common_get_if_lane(struct transvr_obj_s *self, + char *buf_p){ + + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + if (self->ioexp_obj_p->state != STATE_IOEXP_NORMAL) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n", ERR_TRANSVR_ABNORMAL); + } + if (_common_get_if_lane(self, tmp_str) < 0) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n" ,ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%s\n" ,tmp_str); +} + + +int +sfp_get_len_sm(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_len_sm, + "sfp_get_len_sm"); + if (err_code < 0){ + return err_code; + } + return self->len_sm; +} + + +int +sfp_get_rate_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_rate_id, + "sfp_get_rate_id"); + if (err_code < 0){ + return err_code; + } + return self->rate_id; +} + + +int +sfp_get_soft_rs0(struct transvr_obj_s *self){ + /* Note: + * SFP Soft Rate_Select Select [aka. "RS(0)"] address + * A2h, offset: 110, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs0, + "sfp_get_soft_rs0"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs0 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_soft_rs1(struct transvr_obj_s *self){ + /* Note: + * SFP Soft RS(1) Select address + * A2h, offset: 118, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs1, + "sfp_get_soft_rs1"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs1 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_temp, + "sfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +sfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_voltage, + "sfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +sfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_bias, + "sfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->curr_tx_bias[0], + self->curr_tx_bias[1], + buf_p); +} + + +int +sfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_power, + "sfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->curr_tx_power[0], + self->curr_tx_power[1], + buf_p); +} + + +int +sfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_rx_power, + "sfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->curr_rx_power[0], + self->curr_rx_power[0], + buf_p); +} + + +int +sfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->rx_em[0]); +} + + +int +sfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->tx_eq[0]); +} + + +int +_sfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: A0h / 36 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +__sfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* SFP Specification Compliance: A0h / 3-10 + * transvr_comp[0-7] = 3 - 10 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_get_comp_10g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[0] = address A0h / 3 + * + * 3 7: 10G Base-ER + * 3 6: 10GBASE-LRM + * 3 5: 10GBASE-LR + * 3 4: 10GBASE-SR + */ + int bitmask = 0xf0; /* 11110000 */ + return (__sfp_get_comp_attr(self, 0) & bitmask); +} + + +int +_sfp_get_comp_1g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[3] = address A0h / 6 + * + * 6 7: BASE-PX *3 + * 6 6: BASE-BX10 *3 + * 6 5: 100BASE-FX + * 6 4: 100BASE-LX/LX10 + * 6 3: 1000BASE-T + * 6 2: 1000BASE-CX + * 6 1: 1000BASE-LX *3 + * 6 0: 1000BASE-SX + */ + return __sfp_get_comp_attr(self, 3); +} + + +int +_sfp_get_cable_tech(struct transvr_obj_s *self) { + /* transvr_comp[5] = address A0h / 8 + * + * 8 3: Active Cable *8 + * 8 2: Passive Cable *8 + */ + int bitmask = 0x0c; /* 00001100 */ + return (__sfp_get_comp_attr(self, 5) & bitmask); +} + + +int +sfp_get_comp_eth_1(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_1"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_1g_eth_comp(self); +} + + +int +sfp_get_comp_eth_10(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_10"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_10g_eth_comp(self); +} + + +int +_sfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: A0h / 2 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Note] Optical and Cable Variants Specification Compliance (SFF-8472) + * [Addr] A0h, Bytes 60-61 + * [Note] For optical variants, as defined by having zero's in A0h Byte 8 + * bits 2 and 3, Bytes 60 and 61 denote nominal transmitter output + * wavelength at room temperature. 16 bit value with byte 60 as high + * order byte and byte 61 as low order byte. The laser wavelength is + * equal to the 16 bit integer value in nm. This field allows the user + * to read the laser wavelength directly, so it is not necessary to + * infer it from the Transceiver Codes A0h Bytes 3 to 10 (see Table + * 5-3). This also allows specification of wavelengths not covered + * in the Transceiver Codes, such as those used in coarse WDM systems. + * + * For passive and active cable variants, a value of 00h for both A0h + * Byte 60 and Byte 61 denotes laser wavelength or cable specification + * compliance is unspecified. + */ + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +int +sfp_get_1g_rj45_extphy_offset(struct transvr_obj_s *self, char *buf) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%02x\n", self->extphy_offset); +} + + +int +sfp_get_1g_rj45_extphy_reg(struct transvr_obj_s *self, char *buf) { + + int i = 0; + int ret = 0; + int retry = 3; + int delay = 200; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; ii2c_client_p, self->extphy_offset); + if (ret >=0) { + goto ok_sfp_get_1g_rj45_extphy_reg; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; + +ok_sfp_get_1g_rj45_extphy_reg: + ret = ((ret & 0x00ff) << 8) | ((ret & 0xff00) >> 8); + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%04x\n", ret); +} + + +int +__qsfp_get_power_cls(struct transvr_obj_s *self, + int direct_access){ + + int err_code; + uint8_t detect_val; + + /* Detect and Update power class attribute */ + if (direct_access){ + err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_power_cls"); + } else { + err_code = self->ext_id; + } + if (err_code <0){ + return err_code; + } + if (err_code == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data */ + detect_val = self->ext_id; + SWP_BIT_CLEAR(detect_val, 2); /* Bit2: CDR RX present */ + SWP_BIT_CLEAR(detect_val, 3); /* Bit3: CDR TX present */ + SWP_BIT_CLEAR(detect_val, 4); /* Bit4: CLEI present */ + SWP_BIT_CLEAR(detect_val, 5); /* Bit5: reserved */ + /* Identify power class */ + switch (detect_val) { + case 0: /* Class_1: 00000000 */ + return 1; + case 64: /* Class_2: 01000000 */ + return 2; + case 128: /* Class_3: 10000000 */ + return 3; + case 192: /* Class_4: 11000000 */ + return 4; + case 1: /* Class_5: 00000001 */ + case 193: /* Class_5: 11000001 */ + return 5; + case 2: /* Class_6: 00000010 */ + case 194: /* Class_6: 11000010 */ + return 6; + case 3: /* Class_7: 00000011 */ + case 195: /* Class_7: 11000011 */ + return 7; + default: + break; + } + SWPS_INFO("%s: Detect undefined power class:%d\n", __func__, detect_val); + return ERR_TRANSVR_UNDEFINED; +} + + +int +qsfp_get_power_cls(struct transvr_obj_s *self) { + return __qsfp_get_power_cls(self, 1); +} + + +int +__qsfp_get_cdr_present(struct transvr_obj_s *self, + int direct_access){ + + int retval; + int BIT_SHIFT = 2; + int BIT_MASK = 0x3; + + /* Detect and Update power class attribute */ + if (direct_access) { + retval = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_cdr_present"); + if (retval < 0){ + return retval; + } + } + retval = self->ext_id; + if (retval == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data and return */ + return (int)(retval >> BIT_SHIFT & BIT_MASK); +} + + +int +qsfp_get_cdr_present(struct transvr_obj_s *self) { + return __qsfp_get_cdr_present(self, 1); +} + + +int +qsfp_get_cdr(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + "qsfp_get_cdr"); + if (err_code <0){ + return err_code; + } + + return self->cdr; +} + + +int +__qsfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* QSFP Specification Compliance: 00h / 131-138 + * transvr_comp[0-7] = 131 - 138 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_get_comp_10_40_100_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[0] = address 00h / 131 + * + * 131 7: Extended: See section 6.3.23. The Extended Specification Compliance + * Codes are maintained in the Transceiver Management section of SFF- + * 8024. + * 131 6: 10GBASE-LRM + * 131 5: 10GBASE-LR + * 131 4: 10GBASE-SR + * 131 3: 40GBASE-CR4 + * 131 2: 40GBASE-SR4 + * 131 1: 40GBASE-LR4 + * 131 0: 40G Active Cable (XLPPI) + */ + return __qsfp_get_comp_attr(self, 0); +} + + +int +_qsfp_get_comp_sonet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 132 7-3: Reserved + * 132 2: OC 48, long reach + * 132 1: OC 48, intermediate reach + * 132 0: OC 48 short reach + */ + return __qsfp_get_comp_attr(self, 1); +} + + +int +_qsfp_get_comp_sas_sata(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 133 7: SAS 24.0 Gb/s + * 133 6: SAS 12.0 Gb/s + * 133 5: SAS 6.0 Gb/s + * 133 4: SAS 3.0 Gb/s + * 133 3-0: Reserved + */ + return __qsfp_get_comp_attr(self, 2); +} + + +int +_qsfp_get_comp_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 134 7-4: Reserved + * 134 3: 1000BASE-T + * 134 2: 1000BASE-CX + * 134 1: 1000BASE-LX + * 134 0: 1000BASE-SX + */ + return __qsfp_get_comp_attr(self, 3); +} + + +int +_qsfp_get_comp_fc_link_length(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 7: Very long distance (V) + * 135 6: Short distance (S) + * 135 5: Intermediate distance (I) + * 135 4: Long distance (L) + * 135 3: Medium (M) + */ + int mask = 0xFC; /* 11111100 */ + return (__qsfp_get_comp_attr(self, 4) & mask); +} + + +int +_qsfp_get_comp_fc_trans_tech(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 2: Reserved + * 135 1: Longwave laser (LC) + * 135 0: Electrical inter-enclosure (EL) + * + * 136 7: Electrical intra-enclosure + * 136 6: Shortwave laser w/o OFC (SN) + * 136 5: Shortwave laser w OFC (SL) + * 136 4: Longwave Laser (LL) + * 136 3-0: Reserved + * + * return value = [bit 8-15:addr 135][bit 0-7:addr 136] + */ + int mask_135 = 7; /* 00000111 */ + int val_135 = (__qsfp_get_comp_attr(self, 4) & mask_135); + int val_136 = __qsfp_get_comp_attr(self, 5); + return ((val_135 << 7) + val_136); +} + + +int +_qsfp_get_comp_fc_trans_media(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 137 7: Twin Axial Pair (TW) + * 137 6: Shielded Twisted Pair (TP) + * 137 5: Miniature Coax (MI) + * 137 4: Video Coax (TV) + * 137 3: Multi-mode 62.5 m (M6) + * 137 2: Multi-mode 50 m (M5) + * 137 1: Multi-mode 50 um (OM3) + * 137 0: Single Mode (SM) + */ + return __qsfp_get_comp_attr(self, 6); +} + + +int +_qsfp_get_comp_fc_speed(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 138 7: 1200 MBps (per channel) + * 138 6: 800 MBps + * 138 5: 1600 MBps (per channel) + * 138 4: 400 MBps + * 138 3: 3200 MBps (per channel) + * 138 2: 200 MBps + * 138 1: Extended: See section 6.3.23. The Extended Specification + * Compliance Codes are maintained in the Transceiver Management + * section of SFF-8024. + * 138 0: 100 MBps + */ + return __qsfp_get_comp_attr(self, 7); +} + + +int +_qsfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: 00h / 192 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_comp_eth(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_eth"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_ethernet(self); +} + + +int +qsfp_get_comp_10_40(struct transvr_obj_s *self) { + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_10_40"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_10_40_100_ethernet(self); +} + + +int +_qsfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: 00h / 130 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_temp, + "qsfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +qsfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_voltage, + "qsfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +qsfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->tx_eq[0], self->tx_eq[1]); +} + + +int +qsfp_get_transvr_rx_am(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_get_transvr_rx_am"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_am[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_am[0], self->rx_am[1]); +} + + +int +qsfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_em[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_em[0], self->rx_em[1]); +} + + +int +_qsfp_get_channel_diag(uint8_t *data_array, + int (*count_func)(uint8_t high_byte, uint8_t low_byte, char *buf_p), + char *ch_name, + char *result_p) { + int i, high, low; + int len_max = 128; + char ch_buf[4][16] = { DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL }; + + for (i=0; i<4; i++) { + high = (i*2); + low = ((i*2) + 1); + count_func(data_array[high], data_array[low], ch_buf[i]); + } + return snprintf(result_p, len_max, + "%s-%d:%s%s-%d:%s%s-%d:%s%s-%d:%s", + ch_name, 1, ch_buf[0], + ch_name, 2, ch_buf[1], + ch_name, 3, ch_buf[2], + ch_name, 4, ch_buf[3]); +} + + +int +qsfp_get_soft_rx_los(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_rx_los, + "qsfp_get_soft_rx_los"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->rx_los & mask)); +} + + +int +qsfp_get_soft_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_get_soft_tx_disable"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_disable & mask)); +} + + +int +qsfp_get_soft_tx_fault(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_fault, + "qsfp_get_soft_tx_fault"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_fault & mask)); +} + + +int +qsfp_get_auto_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + if (self->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "%d\n", ERR_TRANSVR_FUNC_DISABLE); + } + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "0x%02x\n", self->auto_tx_disable); +} + + +int +qsfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_bias, + "qsfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _qsfp_get_channel_diag(self->curr_tx_bias, + _common_count_tx_bias, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_power, + "qsfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_tx_power, + _common_count_tx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_rx_power, + "qsfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_rx_power, + _common_count_rx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Desc] Wavelength or Copper Cable Attenuation (SFF-8636) + * [Addr] 00h 186-187 + * [Note] + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is + * a 16-bit hex value with Byte 186 as high order byte and Byte 187 as + * low order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. + * If the free side device is identified as copper cable these registers will + * be used to define the cable attenuation. An indication of 0 dB attenuation + * refers to the case where the attenuation is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +/* Public Function for Setup Features + */ +static int +__sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + uint8_t update_val = (*attr_p); + + switch (input_val) { + case 0: + SWP_BIT_CLEAR(update_val, bit_shift); + break; + case 1: + SWP_BIT_SET(update_val, bit_shift); + break; + default: + retval = ERR_TRANSVR_UNEXCPT; + err_code = ERR_TRANSVR_UNEXCPT; + err_msg = "Exception occurs"; + goto err_private_sfp_set_soft_rs_1; + } + err_code = _common_set_uint8_attr(self, + address, + page, + offset, + update_val, + attr_p, + caller, + show_err); + if (err_code < 0) { + retval = err_code; + err_msg = "Write data via i2c fail!"; + goto err_private_sfp_set_soft_rs_1; + } + (*attr_p) = update_val; + return 0; + +err_private_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +static int +_sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + + /* Check input value */ + if ((input_val != 0) && (input_val != 1)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + switch (err_code) { + case 0: + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "Not support this feature"; + break; + case ERR_TRANSVR_UNINIT: + retval = ERR_TRANSVR_UNINIT; + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + retval = ERR_TRANSVR_UNPLUGGED; + err_msg = "Transceiver unplugged!"; + break; + default: + retval = err_code; + err_msg = "Check Rate_ID fail!"; + break; + } + goto err_common_sfp_set_soft_rs_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + attr_update_func, + caller); + if ( (err_code < 0) || + ((*attr_p) == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Generate and update value */ + return __sfp_set_soft_rs(self, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + +err_common_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +sfp_set_soft_rs0(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(0)"] address + * A2h, offset: 110, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + bit_shift, + &_sfp_update_attr_soft_rs0, + &(self->soft_rs0), + "sfp_set_soft_rs0", + show_err); +} + + +int +sfp_set_soft_rs1(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(1)"] address + * A2h, offset: 118, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + bit_shift, + &_sfp_update_attr_soft_rs1, + &(self->soft_rs1), + "sfp_set_soft_rs1", + show_err); +} + + +int +__sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_tx_eq; + } + setv = (uint8_t)input; + if (self->tx_eq[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + setv, + &(self->tx_eq[0]), + "_sfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_tx_eq; + } + return 0; + +err_sfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; itx_eq[0]; + if (_sfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if (self->tx_eq[0] == tmp){ + return 0; + } + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +sfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_tx_eq(self, input, 1); +} + + +int +__sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_rx_em; + } + setv = (uint8_t)input; + if (self->rx_em[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + setv, + &(self->rx_em[0]), + "_sfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_rx_em; + } + return 0; + +err_sfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; irx_em[0]; + if (_sfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if (self->rx_em[0] == tmp){ + return 0; + } + } + return -1; +} + + +int +sfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_rx_em(self, input, 1); +} + + +int +sfp_set_1g_rj45_extphy_offset(struct transvr_obj_s *self, + int input) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xff)) { + return ERR_TRANSVR_BADINPUT; + } + self->extphy_offset = (uint8_t)input; + return 0; +} + + +int +sfp_set_1g_rj45_extphy_reg(struct transvr_obj_s *self, + int input) { + + int i = 0; + int retry = 3; + int delay = 200; + uint16_t tmp = 0; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xffff)) { + return ERR_TRANSVR_BADINPUT; + } + tmp = ((input & 0x00ff) << 8) | ((input & 0xff00) >> 8); + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; i<=retry; i++) { + if (i2c_smbus_write_word_data(self->i2c_client_p, + self->extphy_offset, + tmp) >= 0) { + return 0; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; +} + + +static int +__qsfp_set_cdr(struct transvr_obj_s *self, + int input_val, + int show_err) { + + uint8_t update_val; + int CDR_FEATURE_SUPPORTED = 0x3; + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_name = "__qsfp_set_cdr"; + + /* Check input value */ + if ((input_val < 0) || (input_val > 0xff)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_qsfp_set_cdr_1; + } + update_val = (uint8_t)input_val; + /* Check CDR supported by transceiver */ + err_code = qsfp_get_cdr_present(self); + if (err_code < 0) { + retval = err_code; + switch (err_code) { + case ERR_TRANSVR_UNINIT: + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + err_msg = "Transceiver unplugged!"; + break; + default: + err_msg = "Check CDR present fail!"; + break; + } + goto err_qsfp_set_cdr_1; + } + if (err_code != CDR_FEATURE_SUPPORTED) { + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "This transceiver not support CDR!"; + goto err_qsfp_set_cdr_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + func_name); + if ( (err_code < 0) || + (self->cdr == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_qsfp_set_cdr_1; + } + /* Write input value to transceiver */ + return _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + update_val, + &(self->cdr), + func_name, + show_err); + +err_qsfp_set_cdr_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +qsfp_set_cdr(struct transvr_obj_s *self, + int input_val) { + return __qsfp_set_cdr(self, input_val, 1); +} + + +int +qsfp_set_soft_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int show_err = 1; + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + int update_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_soft_tx_disable"); + if (retval < 0) { + snprintf(err_msg, 63, "Not ready. err:%d", retval); + goto err_qsfp_set_soft_tx_disable; + } + if ((input_val > in_max) || + (input_val < in_min) ){ + retval = ERR_TRANSVR_BADINPUT; + snprintf(err_msg, 63, "Input value:%d incorrect!", input_val); + goto err_qsfp_set_soft_tx_disable; + } + if ((self->tx_disable & 0x0f) == input_val) { + return 0; + } + update_val = ((self->tx_disable & 0xf0) & input_val); + retval = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + input_val, + &(self->tx_disable), + "qsfp_set_tx_disable", + show_err); + if (retval < 0) { + snprintf(err_msg, 63, "_common_set_uint8_attr:%d fail!", retval); + goto err_qsfp_set_soft_tx_disable; + } + return 0; + +err_qsfp_set_soft_tx_disable: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return retval; +} + + +int +_qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + uint8_t update) { + + uint8_t tx_enable = 0x0; + int show_e = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Handle timing issues */ + if (update != tx_enable) { + /* Note: + * Because there are some txvr has timing issues, + * therefore we need to execute reset cycle first. + * (enable -> other settings) + */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + tx_enable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set reset value fail"; + goto err_qsfp_set_auto_tx_disable; + } + mdelay(10); + } + /* Setup target value */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->auto_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set target value fail"; + goto err_qsfp_set_auto_tx_disable; + } + /* Check and update */ + err = _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C get value fail"; + goto err_qsfp_set_auto_tx_disable; + } + if (self->tx_disable != update) { + emsg = "data not become effective"; + goto err_qsfp_set_auto_tx_disable; + } + return 0; + +err_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s\n", + __func__, emsg, self->swp_name); + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Update settings*/ + if (input_val == VAL_TRANSVR_FUNCTION_DISABLE) { + emsg = "User disable auto tx_disable"; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + goto out_qsfp_set_auto_tx_disable; + } + if ((input_val > in_max) || (input_val < in_min) ){ + SWPS_INFO("%s: Input value:%d incorrect! :%s\n", + __func__, input_val, self->swp_name); + return ERR_TRANSVR_BADINPUT; + } + self->auto_tx_disable = input_val; + /* Check current soft tx_disable */ + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_auto_tx_disable"); + switch (retval) { + case 0: + break; + case ERR_TRANSVR_UNPLUGGED: + emsg = "Doesn't need to update"; + goto out_qsfp_set_auto_tx_disable; + default: + SWPS_INFO("%s: setup fail :%d :%s\n", + __func__, retval, self->swp_name); + return retval; + } + return _qsfp_set_auto_tx_disable(self, input_val); + +out_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s :%d\n :%d", + __func__, emsg, self->swp_name, input_val, retval); + return 0; +} + + +int +__qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_tx_eq; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->tx_eq[0] == setv[0]) && + (self->tx_eq[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + setv, + self->tx_eq, + "_qsfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_tx_eq; + } + return 0; + +err_qsfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; itx_eq[0]; + tmp[1] = self->tx_eq[1]; + if (_qsfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if ((self->tx_eq[0] == tmp[0]) && + (self->tx_eq[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_tx_eq(self, input, 1); +} + + +int +__qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_am; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_am[0] == setv[0]) && + (self->rx_am[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + setv, + self->rx_am, + "_qsfp_set_rx_am", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_am; + } + return 0; + +err_qsfp_set_rx_am: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_am[0]; + tmp[1] = self->rx_am[1]; + if (_qsfp_update_attr_rx_am(self, show_e) < 0){ + continue; + } + if ((self->rx_am[0] == tmp[0]) && + (self->rx_am[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_am(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_set_rx_am"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_am(self, input, 1); +} + + +int +__qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_em; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_em[0] == setv[0]) && + (self->rx_em[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + setv, + self->rx_em, + "_qsfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_em; + } + return 0; + +err_qsfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_em[0]; + tmp[1] = self->rx_em[1]; + if (_qsfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if ((self->rx_em[0] == tmp[0]) && + (self->rx_em[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_em(self, input, 1); +} + + +int +common_transvr_dump(struct transvr_obj_s* self){ + + char *type_name = "Undefined"; + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + switch (self->type) { + case TRANSVR_TYPE_SFP: + type_name = STR_TRANSVR_SFP; + break; + case TRANSVR_TYPE_QSFP: + type_name = STR_TRANSVR_QSFP; + break; + case TRANSVR_TYPE_QSFP_PLUS: + type_name = STR_TRANSVR_QSFP_PLUS; + break; + case TRANSVR_TYPE_QSFP_28: + type_name = STR_TRANSVR_QSFP28; + break; + case TRANSVR_TYPE_FAKE: + type_name = "FAKE"; + goto ok_common_transvr_dump; + case TRANSVR_TYPE_UNPLUGGED: + type_name = "UNPLUGGED"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_INCONSISTENT: + type_name = "INCONSISTENT"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_ERROR: + type_name = "ERROR"; + goto err_common_transvr_dump; + + default: + type_name = "UNEXPECTED"; + goto err_common_transvr_dump; + } + printk(KERN_INFO "[SWPS] Dump %s information:\n", self->swp_name); + printk(KERN_INFO " |- :%s\n", type_name); + printk(KERN_INFO " |- :%s\n", self->vendor_name); + printk(KERN_INFO " |- :%s\n", self->vendor_pn); + printk(KERN_INFO " |- :%s\n", self->vendor_rev); + printk(KERN_INFO " |- :%s\n", self->vendor_sn); + printk(KERN_INFO " |- :0x%02x\n", self->br); + printk(KERN_INFO " |- :0x%02x\n", self->comp_rev); + printk(KERN_INFO " |- :%d\n", self->len_om1); + printk(KERN_INFO " |- :%d\n", self->len_om2); + printk(KERN_INFO " |- :%d\n", self->len_om3); + printk(KERN_INFO " |- :%d\n", self->len_om4); + return 0; + +ok_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return 0; + +err_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return -1; +} + + +int +sfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_sm); + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :0x%02x\n", self->rate_id); + return 0; +} + + +int +qsfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :Class_%d\n", __qsfp_get_power_cls(self, 0)); + return 0; +} + + +int +fake_transvr_dump(struct transvr_obj_s* self) { + + printk(KERN_INFO "[SWPS] Dump transceiver information: %s\n", self->swp_name); + printk(KERN_INFO " |- :FAKE\n"); + printk(KERN_INFO " |- :FAKE_VENDER_NAME\n"); + printk(KERN_INFO " |- :FAKE_VENDER_PN\n"); + printk(KERN_INFO " |- :FAKE_VENDER_REV\n"); + printk(KERN_INFO " |- :FAKE_VENDER_SN\n"); + printk(KERN_INFO " |- :0x99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " '- :0x99\n"); + return 0; +} + + +/* ========== Object functions for fake type ========== + */ +int +fake_transvr_update(struct transvr_obj_s *self, + int show_err){ + self->state = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +fake_get_binary(struct transvr_obj_s *self){ + return 1; +} + +int +fake_get_int(struct transvr_obj_s *self){ + return 99; +} + + +int +fake_get_hex(struct transvr_obj_s *self){ + return 0x0f; +} + + +int +fake_get_str(struct transvr_obj_s *self, char *buf) { + return snprintf(buf, 16, "fake_get_str\n"); +} + + +int +fake_set_int(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: %d\n", __func__, input); + return 0; +} + + +int +fake_set_hex(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: 0x%02x\n", __func__, input); + return 0; +} + + +/* ========== Object functions for unsupported ========== + */ +int +unsupported_get_func(struct transvr_obj_s *self){ + return ERR_TRANSVR_NOTSUPPORT; +} + + +int +unsupported_get_func2(struct transvr_obj_s *self, + char *buf_p) { + int len = snprintf(buf_p, 8, "%d\n", ERR_TRANSVR_NOTSUPPORT); + return len; +} + + +int +unsupported_set_func(struct transvr_obj_s *self, + int input_val){ + return ERR_TRANSVR_NOTSUPPORT; +} + + + +/* ========== Object functions for long term task ========== + * + * [Note] + * SWPS transceiver worker is likely the green-thread (coroutine). + * Due to resource and performance considerations. SWPS run all + * features in one kthread at the same time, and handle by it self. + */ + +/* For Transceiver Task Handling + */ +static struct transvr_worker_s * +transvr_task_get(struct transvr_obj_s *self, + char *func_name) { + + struct transvr_worker_s *curr_p = self->worker_p; + + while(curr_p != NULL){ + if (strcmp((curr_p->func_name), func_name) == 0 ) { + return curr_p; + } + curr_p = curr_p->next_p; + } + return NULL; +} + + +static struct transvr_worker_s* +transvr_task_creat(struct transvr_obj_s *self, + int (*main_task)(struct transvr_worker_s *task), + int (*post_task)(struct transvr_worker_s *task), + char *caller) { + + struct transvr_worker_s *task_p = NULL; + struct transvr_worker_s *curr_p = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check task not exist */ + task_p = transvr_task_get(self, caller); + if (task_p) { + snprintf(err_msg, sizeof(err_msg), "Task already created!"); + goto err_transvr_task_creat; + } + /* Create task worker */ + task_p = kzalloc(sizeof(struct transvr_worker_s), GFP_KERNEL); + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_transvr_task_creat; + } + /* Setup task data */ + task_p->transvr_p = self; + task_p->next_p = NULL; + task_p->trigger_time = 0; + task_p->retry = 1; + task_p->state = STATE_T_TASK_INIT; + task_p->main_task = main_task; + task_p->post_task = post_task; + task_p->p_data = NULL; + snprintf(task_p->func_name, sizeof(task_p->func_name), "%s", caller); + /* Setup Link List */ + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p->next_p != NULL) { + curr_p = curr_p->next_p; + } + curr_p->next_p = task_p; + task_p->pre_p = curr_p; + } else { + self->worker_p = task_p; + task_p->pre_p = NULL; + } + return task_p; + +err_transvr_task_creat: + SWPS_ERR("%s: %s :%s :%s\n", + __func__, err_msg, caller, self->swp_name); + return NULL; +} + + +static void +transvr_task_free_one(struct transvr_worker_s *task_p){ + + struct transvr_worker_s *pre_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (task_p) { + pre_p = task_p->pre_p; + next_p = task_p->next_p; + + if ((pre_p) && (next_p)) { + pre_p->next_p = next_p; + next_p->pre_p = pre_p; + + } else if ((!pre_p) && (next_p)) { + next_p->pre_p = NULL; + + } else if ((pre_p) && (!next_p)) { + pre_p->next_p = NULL; + + } else if ((!pre_p) && (!next_p)) { + task_p->transvr_p->worker_p = NULL; + } else { + SWPS_ERR("%s: Unexcept case!\n :%s", + __func__, task_p->transvr_p->swp_name); + } + kfree(task_p->p_data); + kfree(task_p); + } +} + + +static void +transvr_task_free_all(struct transvr_obj_s *self) { + + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p) { + next_p = curr_p->next_p; + transvr_task_free_one(curr_p); + curr_p = next_p; + } + self->worker_p = NULL; + } +} + + +static void +transvr_cache_free_all(struct transvr_obj_s *self) { + + memset(self->vendor_name, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_rev, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_pn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_sn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + self->extphy_offset = 0; +} + +static int +_transvr_task_run_main(struct transvr_worker_s *task_p) { + + int retval = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "main_task is NULL!"); + goto main_transvr_task_err; + } + if ((task_p->trigger_time) == 0){ + goto main_transvr_task_run; + } + if (time_before(jiffies, task_p->trigger_time)){ + goto main_transvr_task_wait; + } + goto main_transvr_task_run; + +main_transvr_task_run: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + task_p->retry -= 1; + } + retval = task_p->main_task(task_p); + if (retval < 0) { + if (task_p->retry > 0) { + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + } + goto main_transvr_task_identify; + +main_transvr_task_identify: + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + + case EVENT_TRANSVR_TASK_DONE: + task_p->state = STATE_T_TASK_DONE; + return EVENT_TRANSVR_TASK_DONE; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + +main_transvr_task_wait: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + +main_transvr_task_err: + task_p->state = STATE_T_TASK_FAIL; + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, retval, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_transvr_task_run_post(struct transvr_worker_s *task_p) { + + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if ((task_p->post_task) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + switch (task_p->state) { + case STATE_T_TASK_WAIT: + case STATE_T_TASK_INIT: + goto post_transvr_task_wait; + + case STATE_T_TASK_DONE: + case STATE_T_TASK_FAIL: + goto post_transvr_task_run; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Unexcept task state"); + goto post_transvr_task_err; + +post_transvr_task_run: + task_p->post_task(task_p); + return EVENT_TRANSVR_TASK_DONE; + +post_transvr_task_wait: + return EVENT_TRANSVR_TASK_WAIT; + +post_transvr_task_err: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, task_p->state, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_one(struct transvr_worker_s *task_p) { + + int retval_main = DEBUG_TRANSVR_INT_VAL; + int retval_post = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval_main = _transvr_task_run_main(task_p); + if (retval_main < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute main_task fail!"); + goto err_transvr_task_run_one; + } + retval_post = _transvr_task_run_post(task_p); + if (retval_post < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute post_task fail!"); + goto err_transvr_task_run_one; + } + return retval_main; + +err_transvr_task_run_one: + SWPS_INFO("%s: %s
:%d :%d :%s :%s\n", + __func__, err_msg, retval_main, retval_post, + task_p->func_name, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_all(struct transvr_obj_s *self) { + + int haserr = 0; + int retval = DEBUG_TRANSVR_INT_VAL; + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if ((self->worker_p) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + curr_p = self->worker_p; + while (curr_p != NULL) { + next_p = curr_p->next_p; + retval = transvr_task_run_one(curr_p); + if (curr_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + curr_p = next_p; + continue; + } + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + break; + case EVENT_TRANSVR_TASK_DONE: + transvr_task_free_one(curr_p); + break; + case EVENT_TRANSVR_TASK_FAIL: + + default: + haserr = 1; + transvr_task_free_one(curr_p); + break; + } + curr_p = next_p; + } + if (haserr) { + return EVENT_TRANSVR_TASK_FAIL; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +static void +transvr_task_set_delay(struct transvr_worker_s *task_p, + unsigned long delay_msec) { + + task_p->trigger_time = (jiffies + (delay_msec * (HZ/1000))); +} + + +static void +transvr_task_set_retry(struct transvr_worker_s *task_p, + unsigned long retry_times) { + + task_p->retry = retry_times; +} + + +/* For Transceiver Post Task + */ +int +taskfunc_post_do_nothing(struct transvr_worker_s *task_p) { + + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_post_handle_task_state(struct transvr_worker_s *task_p) { + + struct transvr_obj_s* tp = task_p->transvr_p; + + switch (task_p->state) { + case STATE_T_TASK_INIT: + case STATE_T_TASK_WAIT: + return EVENT_TRANSVR_TASK_WAIT; + + case STATE_T_TASK_DONE: + tp->state = STATE_TRANSVR_CONNECTED; + tp->send_uevent(tp, KOBJ_ADD); + return EVENT_TRANSVR_TASK_DONE; + + case STATE_T_TASK_FAIL: + tp->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_TASK_FAIL; + + default: + break; + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +/* For Transceiver Main Task + */ +int +_taskfunc_sfp_setup_soft_rs(struct transvr_worker_s *task_p, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller) { + + int show_err = 0; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_soft_rs"; + + err_code = _sfp_update_attr_soft_rs0(task_p->transvr_p, 0); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + err_code = __sfp_set_soft_rs(task_p->transvr_p, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_setup_soft_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_code); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +__taskfunc_sfp_setup_hard_rs(struct transvr_worker_s *task_p, + int input_val, + int (*get_func)(struct ioexp_obj_s *self, int virt_offset), + int (*set_func)(struct ioexp_obj_s *self, int virt_offset, int input_val)) { + + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + + err_val = get_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset); + + if (err_val < 0) { + if (err_val == ERR_IOEXP_NOTSUPPORT) { + return EVENT_TRANSVR_TASK_DONE; + } + err_str = "Get current hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + if (err_val == input_val) { + return EVENT_TRANSVR_TASK_DONE; + } + err_val = set_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_p_taskfunc_sfp_setup_hard_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_hard_rs0(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs0, + task_p->transvr_p->ioexp_obj_p->set_hard_rs0); +} + + +int +_taskfunc_sfp_setup_hard_rs1(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs1, + task_p->transvr_p->ioexp_obj_p->set_hard_rs1); +} + + +int +_taskfunc_sfp_setup_rs0(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs0"; + + err_val = _taskfunc_sfp_setup_hard_rs0(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs0, + task_p->transvr_p->eeprom_map_p->page_soft_rs0, + task_p->transvr_p->eeprom_map_p->offset_soft_rs0, + bit_shift, + &(task_p->transvr_p->soft_rs0), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs0_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs0(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_rs1(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs1"; + + err_val = _taskfunc_sfp_setup_hard_rs1(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs1, + task_p->transvr_p->eeprom_map_p->page_soft_rs1, + task_p->transvr_p->eeprom_map_p->offset_soft_rs1, + bit_shift, + &(task_p->transvr_p->soft_rs1), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs1_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs1(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_sfp_setup_SFF8431_case1(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs0(task_p, update_val); +} + + + +int +taskfunc_sfp_setup_SFF8431_case2(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs1(task_p, update_val); +} + + +int +taskfunc_sfp_setup_SFF8431_case3(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + int update_rs0 = 1; + int update_rs1 = 1; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _taskfunc_sfp_setup_rs0(task_p, update_rs0); + if (err_code < 0) { + return err_code; + } + return _taskfunc_sfp_setup_rs1(task_p, update_rs1); +} + + +int +taskfunc_sfp_handle_1g_rj45(struct transvr_worker_s *task_p) { + + /* Not all of platform support 0x56 for transceiver + * external PHY, Support list as below: + * => 1. Magnolia-PVT (PS: EVT & DVT not ready) + */ + int ext_phy_addr = 0x56; + int ext_phy_page = -1; + int ext_phy_offs = 0x11; + int ext_phy_len = 1; + int lstate_mask = 0x04; /* 00000100 */ + int show_err = 0; + int fail_retry = 5; + int fail_delay = 1000; /* msec */ + int err_code = DEBUG_TRANSVR_INT_VAL; + uint8_t detect_val = DEBUG_TRANSVR_HEX_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + int *tmp_p = NULL; + char *func_name = "taskfunc_sfp_handle_1g_rj45"; + + if (task_p->transvr_p->state != STATE_TRANSVR_CONNECTED) { + return EVENT_TRANSVR_TASK_DONE; + } + if ( (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000) && + (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000_up) ) { + goto err_taskfunc_sfp_handle_1g_rj45_1; + } + err_code = _common_update_uint8_attr(task_p->transvr_p, + ext_phy_addr, + ext_phy_page, + ext_phy_offs, + ext_phy_len, + &detect_val, + func_name, + show_err); + if ( (err_code < 0) || + (detect_val == DEBUG_TRANSVR_HEX_VAL) ) { + snprintf(err_str, sizeof(err_str), "Detect external link status fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + if ((detect_val & lstate_mask) == lstate_mask) { + goto ok_taskfunc_sfp_handle_1g_rj45_link_up; + } + goto ok_taskfunc_sfp_handle_1g_rj45_link_down; + +ok_taskfunc_sfp_handle_1g_rj45_link_up: + /* Filter out noise */ + if (!(task_p->p_data)) { + tmp_p = kzalloc(sizeof(int), GFP_KERNEL); + if (!tmp_p) { + snprintf(err_str, sizeof(err_str), "kzalloc p_data fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + *tmp_p = TRANSVR_CLASS_BASE_T_1000_up; + task_p->p_data = tmp_p; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + } + if ((*(int *)(task_p->p_data)) != TRANSVR_CLASS_BASE_T_1000_up) { + kfree(task_p->p_data); + task_p->p_data = NULL; + snprintf(err_str, sizeof(err_str), "Internal error"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + kfree(task_p->p_data); + task_p->p_data = NULL; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_link_down: + if (task_p->p_data) { + kfree(task_p->p_data); + task_p->p_data = NULL; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_done: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_1: + snprintf(err_str, sizeof(err_str), "Detect transceiver:%d not Base-T, remove task.", + task_p->transvr_p->info); + SWPS_INFO("%s: %s :%s\n", __func__, err_str, task_p->transvr_p->swp_name); + transvr_task_set_retry(task_p, 0); + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_2: + if (task_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, fail_retry); + } + if ((task_p->retry) == 0) { + /* Error case: + * => In this case, SWPS will stop external Link state monitor features + * and keeps transvr_p->info on TRANSVR_CLASS_BASE_T_1000_up. + * Upper layer will see it always Linkup that because of these type of + * transceiver has external phy, BCM chip see it as Loopback transceiver. + */ + SWPS_WARN("%s can not access external PHY of Base-T SFP transceiver\n", + task_p->transvr_p->swp_name); + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + return EVENT_TRANSVR_TASK_DONE; + } else { + transvr_task_set_delay(task_p, fail_delay); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_qsfp_setup_power_mod(struct transvr_obj_s *self, + int setup_val) { + + int curr_val = DEBUG_TRANSVR_INT_VAL; + int err_val = DEBUG_TRANSVR_INT_VAL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + + curr_val = self->ioexp_obj_p->get_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset); + if (curr_val < 0){ + err_msg = "Get current value fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + if (curr_val == setup_val){ + return EVENT_TRANSVR_TASK_DONE; + } + err_val = self->ioexp_obj_p->set_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset, + setup_val); + if (err_val < 0){ + err_msg = "Setup power mode fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_qsfp_setup_power_mod_1: + SWPS_INFO("%s: %s :%d :%d :%d\n", + __func__, err_msg, err_val, curr_val, setup_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_qsfp_handle_tx_disable(struct transvr_worker_s *task_p) { + + int i = 0; + int retry = 5; + int delay_ms = 100; + + if (task_p->transvr_p->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return EVENT_TRANSVR_TASK_DONE; + } + if (!_qsfp_is_implement_tx_disable(task_p->transvr_p)) { + return EVENT_TRANSVR_TASK_DONE; + } + for (i=0; itransvr_p, + task_p->transvr_p->auto_tx_disable) + == EVENT_TRANSVR_TASK_DONE) { + goto ok_taskfunc_qsfp_handle_tx_disable; + } + mdelay(delay_ms); + } + SWPS_INFO("%s auto setup tx_disable:0x%02x fail.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_INIT_FAIL; + +ok_taskfunc_qsfp_handle_tx_disable: + SWPS_INFO("%s auto setup tx_disable:0x%02x ok.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_qsfp_set_hpmod(struct transvr_worker_s *task_p) { + + int err = DEBUG_TRANSVR_INT_VAL; + int HIGH_POWER_MODE = 0; + + /* Handle power mode */ + err = _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + HIGH_POWER_MODE); + if (err < 0) { + SWPS_INFO("%s: setup hpmod fail :%d :%s\n", + __func__, err, task_p->transvr_p->swp_name); + return err; + } + /* Handle auto tx_disable + * [Note] + * => Because there are some transceiver have timing issues or + * setup sequence issues, therefore we handle auto tx_disable + * after handle power mode. + */ + mdelay(100); + return taskfunc_qsfp_handle_tx_disable(task_p); +} + + +int +taskfunc_qsfp_set_lpmod(struct transvr_worker_s *task_p) { + + int LOW_POWER_MODE = 1; + return _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + LOW_POWER_MODE); +} + + +static int +initfunc_sfp_handle_multi_rate_mode(struct transvr_obj_s *self) { + + int task_retry = 3; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "sfp_handle_multi_rate_mode"; + struct transvr_worker_s *task_p = NULL; + + switch (self->rate_id) { + case 0x00: /* Unspecified */ + case 0x03: /* Unspecified */ + case 0x05: /* Unspecified */ + case 0x07: /* Unspecified */ + case 0x09: /* Unspecified */ + case 0x0B: /* Unspecified */ + case 0x0D: /* Unspecified */ + case 0x0F: /* Unspecified */ + goto sfp_handle_multi_rate_mode_4_unspecified; + + case 0x02: /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case1, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x04: /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case2, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x06: /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case3, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x01: /* SFF-8079 (4/2/1G Rate_Select & AS0/AS1) */ + err_str = "SFF-8079 (4/2/1G Rate_Select & AS0/AS1)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x08: /* FC-PI-5 (16/8/4G Rx Rate_select only) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Rx Rate_select only)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0A: /* FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0C: /* FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + */ + err_str = "FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0E: /* 10/8G Rx and Tx Rate_Select controlling the operation or + * locking modes of the internal signal conditioner, retimer + * or CDR, according to the logic table defined in Table 10-2, + * High Bit Rate (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = + * 8.5 Gb/s. In this mode, the default value of bit 110.3 (Soft + * Rate Select RS(0), Table 9-11) and of bit 118.3 (Soft Rate + * Select RS(1), Table 10-1) is 1. + */ + err_str = "cable type: 0x0E"; + goto sfp_handle_multi_rate_mode_4_not_support; + + default: + err_str = "cable type: UNKNOW"; + goto sfp_handle_multi_rate_mode_4_not_support; + } + +sfp_handle_multi_rate_mode_4_sff8431: + if (!task_p) { + err_str = "Create task fail!"; + goto sfp_handle_multi_rate_mode_4_fail_1; + } + transvr_task_set_retry(task_p, task_retry); + return EVENT_TRANSVR_TASK_WAIT; + +sfp_handle_multi_rate_mode_4_unspecified: + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_not_support: + SWPS_INFO("%s: Does not support %s :%s :0x%02x\n", + func_str, err_str, self->swp_name, self->rate_id); + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_fail_1: + SWPS_INFO("%s: %s :%s :0x%02x, :%d\n", + func_str, err_str, self->swp_name, self->rate_id, err_code); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +initfunc_sfp_handle_1g_rj45(struct transvr_obj_s *self) { + + struct transvr_worker_s *task_p = NULL; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_sfp_handle_1g_rj45"; + + + if (self->info == TRANSVR_CLASS_BASE_T_1000) { + task_p = transvr_task_creat(self, + taskfunc_sfp_handle_1g_rj45, + taskfunc_post_do_nothing, + func_str); + if (!task_p) { + snprintf(err_str, sizeof(err_str), "Create task fail"); + goto err_initfunc_sfp_handle_1g_rj45; + } + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_initfunc_sfp_handle_1g_rj45: + SWPS_INFO("%s: %s :%s :%d\n", + __func__, err_str, self->swp_name, detect_cls); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +initfunc_qsfp_handle_power_mode(struct transvr_obj_s *self) { + + int err_code = EVENT_TRANSVR_EXCEP_INIT; + int power_class = DEBUG_TRANSVR_INT_VAL; + int hpmod_retry = 3; + int lpower_config = 1; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + unsigned long hpmod_delay = 500; /* msec */ + struct transvr_worker_s *task_p = NULL; + + /* Handle power mode for IOEXP */ + power_class = __qsfp_get_power_cls(self, 0); + switch (power_class) { + case 1: /* Case: Low power mode (Class = 1) */ + err_code = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (err_code < 0){ + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + return EVENT_TRANSVR_TASK_DONE; + + case 2: /* Case: High power mode (Class > 1) */ + case 3: + case 4: + case 5: + case 6: + case 7: + task_p = transvr_task_creat(self, + taskfunc_qsfp_set_hpmod, + taskfunc_post_handle_task_state, + "transvr_init_qsfp"); + if (!task_p) { + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + transvr_task_set_retry(task_p, hpmod_retry); + transvr_task_set_delay(task_p, hpmod_delay); + return EVENT_TRANSVR_TASK_WAIT; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Exception case"); + goto err_initfunc_qsfp_handle_power_mode; + +err_initfunc_qsfp_handle_power_mode: + SWPS_INFO("%s: %s :%s \n", __func__, err_msg, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +initfunc_qsfp28_handle_cdr(struct transvr_obj_s *self) { + + uint8_t DEFAULT_VAL_CDR = 0xff; + int CDR_FUNC_EXISTED = 0x3; + int show_err = 1; + int err_val = EVENT_TRANSVR_TASK_FAIL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_qsfp28_handle_cdr"; + + err_val = __qsfp_get_cdr_present(self, 0); + if ( (err_val < 0) || + (err_val == DEBUG_TRANSVR_HEX_VAL) ) { + err_msg = "detect cdr_present fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + if (err_val == CDR_FUNC_EXISTED) { + err_val = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->offset_cdr, + DEFAULT_VAL_CDR, + &(self->cdr), + func_str, + show_err); + if (err_val < 0) { + err_msg = "set CDR fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_qsfp_handle_cdr_1: + SWPS_INFO("%s: %s :%d :%s\n", + func_str, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + +/* ========== Object functions for Final State Machine ========== + */ +int +is_plugged(struct transvr_obj_s *self){ + + int limit = 63; + int present = DEBUG_TRANSVR_INT_VAL; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + struct ioexp_obj_s *ioexp_p = self->ioexp_obj_p; + + if (!ioexp_p) { + snprintf(emsg, limit, "ioexp_p is null!"); + goto err_is_plugged_1; + } + present = ioexp_p->get_present(ioexp_p, self->ioexp_virt_offset); + switch (present){ + case 0: + return 1; + case 1: + return 0; + case ERR_IOEXP_UNINIT: + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + default: + if (ioexp_p->state == STATE_IOEXP_INIT){ + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + } + break; + } + SWPS_INFO("%s: Exception case! :%d :%d\n", + __func__, present, ioexp_p->state); + return 0; + +err_is_plugged_1: + SWPS_DEBUG("%s: %s\n", __func__, emsg); + return 0; +} + + +static int +detect_transvr_type(struct transvr_obj_s* self){ + + int type = TRANSVR_TYPE_ERROR; + + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + type = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + + /* Case: 1. Wait transceiver I2C module. + * 2. Transceiver I2C module failure. + * Note: 1. SFF allow maximum transceiver initial time is 2 second. So, there + * are exist some case that we need to wait transceiver. + * For these case, we keeps status on "TRANSVR_TYPE_UNPLUGGED", than + * state machine will keep trace with it. + * 2. There exist some I2C failure case we need to handle. Such as user + * insert the failure transceiver, or any reason cause it abnormal. + */ + if (type < 0){ + switch (type) { + case -EIO: + SWPS_DEBUG("%s: %s smbus return:-5 (I/O error)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + case -ENXIO: + SWPS_DEBUG("%s: %s smbus return:-6 (No such device or address)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + default: + break; + } + SWPS_INFO("%s: %s unexpected smbus return:%d \n", + __func__, self->swp_name, type); + return TRANSVR_TYPE_ERROR; + } + /* Identify valid transceiver type */ + switch (type){ + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + break; + case TRANSVR_TYPE_UNKNOW_1: + case TRANSVR_TYPE_UNKNOW_2: + type = TRANSVR_TYPE_UNKNOW_2; + break; + default: + SWPS_DEBUG("%s: unknow type:0x%02x \n", __func__, type); + type = TRANSVR_TYPE_ERROR; + break; + } + return type; +} + + +static int +detect_transvr_state(struct transvr_obj_s *self, + int result[2]){ + /* [return] [result-0] [result-1] + * 0 STATE_TRANSVR_CONNECTED TRANSVR_TYPE_FAKE + * 0 STATE_TRANSVR_DISCONNECTED TRANSVR_TYPE_UNPLUGGED + * 0 STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * 0 STATE_TRANSVR_INIT / + * 0 STATE_TRANSVR_SWAPPED + * 0 STATE_TRANSVR_CONNECTED + * ERR_TRNASVR_BE_ISOLATED STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_I2C_CRASH STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_UNEXCPT STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_UNKNOW_1/2 + */ + result[0] = STATE_TRANSVR_UNEXCEPTED; /* For return state */ + result[1] = TRANSVR_TYPE_ERROR; /* For return type */ + + /* Case1: Fake type */ + if (self->type == TRANSVR_TYPE_FAKE){ + result[0] = STATE_TRANSVR_CONNECTED; + result[1] = TRANSVR_TYPE_FAKE; + return 0; + } + /* Case2: Transceiver unplugged */ + if (!is_plugged(self)){ + result[0] = STATE_TRANSVR_DISCONNECTED; + result[1] = TRANSVR_TYPE_UNPLUGGED; + return 0; + } + /* Case3: Transceiver be isolated */ + if (self->state == STATE_TRANSVR_ISOLATED){ + result[0] = STATE_TRANSVR_ISOLATED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case4: Transceiver plugged */ + result[1] = detect_transvr_type(self); + /* Case4.1: I2C topology crash + * Note : There are some I2C issues cause by transceiver/cables. + * We need to check topology status when user insert it. + * But in this step, we can't not ensure this is the issues + * port. So, it return the ERR_TRANSVR_I2C_CRASH, then upper + * layer will diagnostic I2C topology. + */ + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: %s detect I2C crash :%d\n", + __func__, self->swp_name, self->state); + result[0] = STATE_TRANSVR_UNEXCEPTED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_I2C_CRASH; + } + /* Case4.2: System initial not ready, + * Note : Sometime i2c channel or transceiver EEPROM will delay that will + * cause system in inconsistent state between EEPROM and IOEXP. + * In this case, SWP transceiver object keep state at LINK_DOWN + * to wait system ready. + * By the way, State Machine will handle these case. + */ + if (result[1] == TRANSVR_TYPE_UNPLUGGED){ + result[0] = STATE_TRANSVR_DISCONNECTED; + return 0; + } + /* Case4.3: Error transceiver type */ + if (result[1] == TRANSVR_TYPE_ERROR){ + result[0] = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s detect error type\n", __func__, self->swp_name); + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard!"); + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case3.3: Unknow transceiver type */ + if ((result[1] == TRANSVR_TYPE_UNKNOW_1) || + (result[1] == TRANSVR_TYPE_UNKNOW_2) ){ + result[0] = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + /* Case3.4: During initial process */ + if (self->state == STATE_TRANSVR_INIT){ + result[0] = STATE_TRANSVR_INIT; + return 0; + } + /* Case3.5: Transceiver be swapped */ + if (self->type != result[1]){ + result[0] = STATE_TRANSVR_SWAPPED; + return 0; + } + /* Case3.6: Link up state */ + result[0] = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +_sfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = _sfp_get_comp_extended(self); + + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_25G_AOC; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_25G_SR; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_25G_LR; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_25G_ER; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x0c: /* 25GBASE-CR CA-S */ + case 0x0d: /* 25GBASE-CR CA-N */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L1_25G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_10_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _sfp_get_comp_10g_eth_comp(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 10G Optical (x1) */ + if ((detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + } + if ((detect_val & 0x80) == 0x80) { /* 10000000 : 10GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_1g = 0x0b; + int upper_bound_1g = 0x1A; + int lower_bound_10g = 0x60; + int upper_bound_10g = 0x75; + int lower_bound_25g = 0xf0; + int upper_bound_25g = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 25G */ + if ((notmal_br >= lower_bound_25g) && + (notmal_br <= upper_bound_25g) ) { + return TRANSVR_CLASS_25G; + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + /* Check 1G */ + if ((notmal_br >= lower_bound_1g) && + (notmal_br <= upper_bound_1g) ) { + return TRANSVR_CLASS_1G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + int speed_br = DEBUG_TRANSVR_INT_VAL; + int speed_tmp = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + + speed_br = _sfp_detect_if_sp_by_br(self); + detect_val = _sfp_get_comp_1g_eth_comp(self); + + if (detect_val < 0) { + snprintf(err_str, sizeof(err_str), "Detect abnormal value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + } + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 1G (x1) */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 1000BASE-SX */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_SX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x02) == 0x02) { /* 00000010 : 1000BASE-LX *3 */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_LX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 1000BASE-CX */ + speed_tmp = TRANSVR_CLASS_COPPER_L1_1G; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + /* Case: 1000 Base-T (x1) */ + if ((detect_val & 0x08) == 0x08) { /* 00001000 : 1000BASE-T */ + return TRANSVR_CLASS_BASE_T_1000; + } + /* Case: 100 Base */ + if ( ((detect_val & 0x10) == 0x10) || /* 00010000 : 100BASE-LX/LX10 */ + ((detect_val & 0x20) == 0x20) || /* 00100000 : 100BASE-FX */ + ((detect_val & 0x40) == 0x40) || /* 01000000 : BASE-BX10 *3 */ + ((detect_val & 0x80) == 0x80) ){ /* 10000000 : BASE-PX *3 */ + return TRANSVR_CLASS_OPTICAL_100; + } + /* Case: ERROR */ + snprintf(err_str, sizeof(err_str), "Case:ERROR, value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + +ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g: + switch (speed_br) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_1G: + return speed_tmp; + case TRANSVR_CLASS_10G: + goto ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G; + } + +ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G: + switch (speed_tmp) { + case TRANSVR_CLASS_OPTICAL_1G_SX: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case TRANSVR_CLASS_OPTICAL_1G_LX: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case TRANSVR_CLASS_COPPER_L1_1G: + return TRANSVR_CLASS_COPPER_L1_10G; + default: + break; + } + snprintf(err_str, sizeof(err_str), "transfer_1to10 fail, speed:%d", speed_tmp); + goto err_p_sfp_detect_class_by_1g_ethernet; + +err_p_sfp_detect_class_by_1g_ethernet: + SWPS_INFO("%s: %s :%s", __func__, err_str, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int is_active = 0; + int conn_val = DEBUG_TRANSVR_INT_VAL; + int check_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _sfp_detect_if_sp_by_br(self); + conn_val = _sfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 */ + case 0x0d: /* MPO 2x16 */ + /* + * ToDo: Need verify Optical Pigtail + */ + goto ok_sfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + /* + * ToDo: Need check ACC use case + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x23: /* No separable connector */ + /* + * ToDo: Standard not clear, not all transceiver vendor + * have the same defined + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_check_active_passive: + check_val = _sfp_get_cable_tech(self); + switch(check_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_unknow; + case 0x04: /* Passive */ + goto ok_sfp_detect_class_by_feature_4_copper; + case 0x08: /* Active */ + is_active = 1; + goto ok_sfp_detect_class_by_feature_4_aoc; + default: + snprintf(err_msg, sizeof(err_msg), + "_sfp_get_cable_tech return Non define value:%d", + check_val); + break; + } + goto err_sfp_detect_class_by_feature_1; + +ok_sfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_25G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_25G_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_25G_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_25G_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_25G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + case TRANSVR_CLASS_1G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_1G_SX; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_1G_LX; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_1G_EX; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_1G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_sfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_OPTICAL_25G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_S_AOC; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_OPTICAL_1G_AOC; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_COPPER_L1_25G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L1_10G; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_COPPER_L1_1G; + default: + return TRANSVR_CLASS_COPPER; + } + +ok_sfp_detect_class_by_feature_4_unknow: + return TRANSVR_CLASS_UNSPECIFIED; + +err_sfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +sft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _sfp_detect_class_by_extend_comp(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 10G Compliance */ + detect_val = _sfp_detect_class_by_10_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 1G Compliance */ + detect_val = _sfp_detect_class_by_1g_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_BASE_T_1000: + case TRANSVR_CLASS_OPTICAL_100: + /* + * ToDo: Need Check 0.1G + */ + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_COPPER_L1_10G: + /* Transfer speed case + * => Example: Raycom 10G DAC + */ + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 1G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check by connector, br, wavelength */ + detect_val = _sfp_detect_class_by_feature(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_OPTICAL_1G: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_COPPER: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_COPPER_L1_10G: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined get_connector:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sft_detect_transceiver_class_1; + +err_sft_detect_transceiver_class_1: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_trident2_if_type_1; + +err_sfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SR); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_KR); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_tomahawk_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_tomahawk_if_type_1; + +err_sfp_set_tomahawk_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_sfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = sft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _sfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TOMAHAWK: + return _sfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _sfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_sfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = sft_detect_transvr_class(self); + switch(detect_val) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_SP_100); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + detect_val); + goto err_sfp_detect_if_speed_1; + } + /* Check by BR */ + detect_val = _sfp_detect_if_sp_by_br(self); + switch (detect_val) { + case TRANSVR_CLASS_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + default: + break; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_detect_if_speed_1; + +err_sfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_extended(self); + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_100G_AOC; + + case 0x06: /* 100G CWDM4 */ + case 0x09: /* Obsolete (assigned before 100G CWDM4 MSA required FEC) */ + case 0x17: /* 100G CLR4 */ + case 0x1A: /* 100GE-DWDM2 */ + return TRANSVR_CLASS_OPTICAL_100G; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_100G_SR4; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_100G_LR4; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_100G_ER4; + + case 0x07: /* 100G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_100G_PSM4; + + case 0x12: /* 40G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_40G; + + case 0x11: /* 4 x 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + + case 0x10: /* 40GBASE-ER4 */ + return TRANSVR_CLASS_OPTICAL_40G_ER4; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L4_100G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_class_by_10_40_100_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_10_40_100_ethernet(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 40G Optical */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 40G Active Cable (XLPPI) */ + return TRANSVR_CLASS_OPTICAL_40G_AOC; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 40GBASE-SR4 */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + } + if ( (detect_val & 0x02) == 0x02) { /* 00000010 : 40GBASE-LR4 */ + return TRANSVR_CLASS_OPTICAL_40G_LR4; + } + if ( (detect_val & 0x08) == 0x08) { /* 00001000 : 40GBASE-CR4 */ + return TRANSVR_CLASS_COPPER_L4_40G; + } + /* Case: 10G Optical */ + if ( (detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + } + /* Case: Extend Compliance */ + if ( ((detect_val & 0x80) == 0x80) ){ /* 10000000 : Use Extend Compliance */ + return TRANSVR_CLASS_EXTEND_COMP; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_10g = 0x10; + int upper_bound_10g = 0x25; + int lower_bound_40g = 0x60; + int upper_bound_40g = 0x75; + int lower_bound_100g = 0x60; + int upper_bound_100g = 0x75; + int used_extend_br = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + int extend_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 40G */ + if ((notmal_br >= lower_bound_40g) && + (notmal_br <= upper_bound_40g) ) { + return TRANSVR_CLASS_40G; + } + /* Check 100G */ + if (notmal_br == used_extend_br) { + extend_br = (int)(self->extbr); /* updated by update_all() */ + if ((extend_br >= lower_bound_100g) && + (extend_br <= upper_bound_100g) ) { + return TRANSVR_CLASS_100G; + } + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_qsfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int conn_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _qsfp_detect_if_sp_by_br(self); + conn_val = _qsfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 (Multifiber Parallel Optic) */ + case 0x0d: /* MPO 2x16 */ + goto ok_qsfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + goto ok_qsfp_detect_class_by_feature_4_copper; + case 0x23: /* No separable connector */ + if ((_qsfp_get_comp_fc_link_length(self) > 0) || + (_qsfp_get_comp_fc_trans_tech(self) > 0) || + (_qsfp_get_comp_fc_trans_media(self) > 0) || + (_qsfp_get_comp_fc_speed(self) > 0) ) { + goto ok_qsfp_detect_class_by_feature_4_aoc; + } + goto ok_qsfp_detect_class_by_feature_4_copper; + default: + snprintf(err_msg, sizeof(err_msg), + "_qsfp_get_connector_type return Non define value:%d", + conn_val); + goto err_qsfp_detect_class_by_feature_1; + } + return TRANSVR_CLASS_UNSPECIFIED; + +ok_qsfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_100G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_100G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_100G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_100G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_100G; + + case TRANSVR_CLASS_40G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_40G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_40G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_40G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_40G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_Q_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_OPTICAL_100G_AOC; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_OPTICAL_40G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_Q_AOC; + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_COPPER_L4_100G; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_COPPER_L4_40G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L4_10G; + default: + return TRANSVR_CLASS_COPPER; + } + +err_qsfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", + __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +qsft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _qsfp_detect_class_by_extend_comp(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_COPPER_L4_100G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check 10/40G/100G Ethernet Compliance */ + detect_val = _qsfp_detect_class_by_10_40_100_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_COPPER_L4_40G: + return detect_val; + case TRANSVR_CLASS_EXTEND_COMP: + /* Format incorrect case (We already checked the Extend + * Compliance is 0 + */ + snprintf(err_msg, sizeof(err_msg), + "Transceiver format incorrect"); + goto err_qsft_detect_transvr_class_1; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10/40/100:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check by Connector type, BR and wavelength */ + detect_val = _qsfp_detect_class_by_feature(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_COPPER_L4_100G: + case TRANSVR_CLASS_COPPER_L4_40G: + case TRANSVR_CLASS_COPPER_L4_10G: + case TRANSVR_CLASS_COPPER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined connector:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), + "Can not identify!"); + goto err_qsft_detect_transvr_class_1; + +err_qsft_detect_transvr_class_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: LR4 or LR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: /* Need Check: ER4 or ER */ + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_KR4); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_qsfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = qsft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _qsfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TOMAHAWK: + return _qsfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _qsfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 8; + char tmp_result[8] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = qsft_detect_transvr_class(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G Copper */ + case TRANSVR_CLASS_COPPER_L4_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + break; + /* Copper */ + case TRANSVR_CLASS_COPPER: + break; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined class case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Check br and extbr */ + detect_val = _qsfp_detect_if_sp_by_br(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + case TRANSVR_CLASS_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined BR case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_detect_if_speed_1; + +err_qsfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_common_set_lane_map_str(struct transvr_obj_s* self, + char *result) { + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + char err_msg[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_L_STR); + snprintf(result, LEN_TRANSVR_L_STR, "%s=", TRANSVR_UEVENT_KEY_LANE); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + if (tmp_val > 256) { + snprintf(err_msg, sizeof(err_msg), + "detect abnormal value:%d", tmp_val); + goto err_common_set_lane_map_str_1; + } + memset(tmp_str, 0, sizeof(tmp_str)); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_L_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_L_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_L_STR); + } + if (i == 0) { + goto err_common_set_lane_map_str_2; + } + return 0; + +err_common_set_lane_map_str_1: + SWPS_INFO("%s: %s", __func__, err_msg); +err_common_set_lane_map_str_2: + snprintf(result, LEN_TRANSVR_L_STR, "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_common_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action, + int (*detect_if_type)(struct transvr_obj_s *self, char *result), + int (*detect_if_speed)(struct transvr_obj_s *self, char *result), + int send_anyway) { + + char *uevent_envp[4]; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + char tmp_str[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_1[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_2[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_3[64] = DEBUG_TRANSVR_STR_VAL; + + if (TRANSVR_UEVENT_ENABLE != 1) { + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_get_if_lane(self, tmp_str) < 0) { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + } else { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, tmp_str); + } + switch (u_action) { + case KOBJ_ADD: + /* Detect type */ + if (detect_if_type(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface type fail!"); + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, tmp_str); + uevent_envp[0] = tmp_str_1; + /* Detect speed */ + if (detect_if_speed(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface speed fail!"); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, tmp_str); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + case KOBJ_REMOVE: + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + default: + snprintf(err_msg, sizeof(err_msg), "kobject_action:%d not support", u_action); + goto private_common_send_uevent_4_fail; + } + snprintf(err_msg, sizeof(err_msg), "%s", "Exception case"); + goto private_common_send_uevent_4_fail; + +private_common_send_uevent_4_fail: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + if (send_anyway) { + goto private_common_send_uevent_4_send; + } + return ERR_TRANSVR_UEVENT_FAIL; + +private_common_send_uevent_4_send: + return kobject_uevent_env(&(self->transvr_dev_p->kobj), + u_action, + uevent_envp); +} + +int +sfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_sfp_detect_if_type, + &_sfp_detect_if_speed, + send_anyway); +} + + +int +qsfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_qsfp_detect_if_type, + &_qsfp_detect_if_speed, + send_anyway); +} + + +int +fake_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + + int err; + int detect_result[2]; + int current_state = STATE_TRANSVR_UNEXCEPTED; + int current_type = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_NEW) { + if (_transvr_init_handler(self) < 0){ + return ERR_TRANSVR_INIT_FAIL; + } + } + err = detect_transvr_state(self, detect_result); + if (err < 0) { + return err; + } + /* In Direct mode, driver only detect transceiver when user call driver interface + * which on sysfs. So it only need consider the state of Transceiver. + */ + current_state = detect_result[0]; + current_type = detect_result[1]; + + switch (current_state){ + + case STATE_TRANSVR_DISCONNECTED: /* Transceiver is not plugged */ + self->state = current_state; + self->type = current_type; + return ERR_TRANSVR_UNPLUGGED; + + case STATE_TRANSVR_INIT: /* Transceiver is plugged, system not ready */ + return ERR_TRANSVR_UNINIT; + + case STATE_TRANSVR_ISOLATED: /* Transceiver is plugged, but has some issues */ + return ERR_TRNASVR_BE_ISOLATED; + + case STATE_TRANSVR_CONNECTED: /* Transceiver is plugged, system is ready */ + self->state = current_state; + self->type = current_type; + return 0; + + case STATE_TRANSVR_SWAPPED: /* Transceiver is plugged, system detect user changed */ + self->type = current_type; + if (reload_transvr_obj(self, current_type) < 0){ + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + self->state = current_state; + return 0; + + case STATE_TRANSVR_UNEXCEPTED: /* Transceiver type or state is unexpected case */ + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_UNEXCPT; + + default: + SWPS_INFO("%s: state:%d not in define.\n", __func__, current_state); + break; + } + return ERR_TRANSVR_UNEXCPT; +} + + +static int +_is_except_happened_4_pmode(struct transvr_obj_s* self, + int new_state) { + + int event_chk = 0; + + if (self->temp == 0){ + return 0; + } + switch (new_state) { + case STATE_TRANSVR_INIT: + event_chk = EVENT_TRANSVR_EXCEP_INIT; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_CONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_UP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_DISCONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_DOWN; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_SWAPPED: + event_chk = EVENT_TRANSVR_EXCEP_SWAP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_UNEXCEPTED: + event_chk = EVENT_TRANSVR_EXCEP_EXCEP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_ISOLATED: + event_chk = EVENT_TRANSVR_EXCEP_ISOLATED; + goto check_event_happened_4_pmode; + + default: + SWPS_INFO("%s: unexcepted case:%d\n", __func__, new_state); + break; + } + return 0; + +check_event_happened_4_pmode: + if (self->temp == event_chk){ + return 1; + } + return 0; +} + + +int +common_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + /* [Return Value]: + * ERR_TRANSVR_UNINIT : (1) Initial not ready + * ERR_TRANSVR_UNPLUGGED : (1) Any -> Down + * ERR_TRANSVR_TASK_BUSY : (1) Wait Initial task + * ERR_TRANSVR_UNEXCPT : (1) Initial fail + * (2) Task fail + * (3) Reload fail + * ERR_TRNASVR_BE_ISOLATED : (1) Already be isolated + * OK Case (return 0) : (1) action_4_connected + * (2) action_4_nothing (initial retry) + */ + int curr_state[2]; + int old_state = self->state; + int old_type = self->type; + int new_state = STATE_TRANSVR_UNEXCEPTED; + int new_type = TRANSVR_TYPE_ERROR; + int return_val = ERR_TRANSVR_UNEXCPT; + + /* Never initial */ + if (self->state == STATE_TRANSVR_NEW) { + goto comfsm_action_4_reinit_obj; + } + /* Detect current state */ + switch (detect_transvr_state(self, curr_state)) { + case 0: + new_state = curr_state[0]; + new_type = curr_state[1]; + break; + + case ERR_TRNASVR_BE_ISOLATED: + new_state = STATE_TRANSVR_ISOLATED; + new_type = old_type; + break; + + case ERR_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case ERR_TRANSVR_UNEXCPT: + default: + new_state = STATE_TRANSVR_UNEXCEPTED; + new_type = old_type; + } + /* State handling */ + switch (old_state) { + case STATE_TRANSVR_INIT: /* INIT -> */ + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 1-1: UP -> INIT */ + SWPS_INFO("Detect %s is present. :1-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 1-2: UP -> UP */ + return_val = 0; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 1-3: UP -> DOWN */ + SWPS_INFO("Detect %s is removed. :1-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 1-4: UP -> SWAP */ + SWPS_INFO("Detect %s is swapped. :1-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 1-5: UP -> UNEXPET */ + SWPS_INFO("Detect %s has error. :1-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 1-6: UP -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :1-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_DISCONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 2-1: DOWN -> INIT */ + SWPS_INFO("Detect %s is present. :2-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 2-2: DOWN -> UP */ + SWPS_INFO("Detect %s is present. :2-2\n",self->swp_name); + goto comfsm_action_4_reinit_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 2-3: DOWN -> DOWN */ + return_val = ERR_TRANSVR_UNPLUGGED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_SWAPPED: /* Case 2-4: DOWN -> SWAP */ + SWPS_INFO("Detect %s is swapped. :2-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 2-5: DOWN -> UNEXPET */ + SWPS_INFO("Detect %s has error. :2-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 2-6: DOWN -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :2-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_UNEXCEPTED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 3-1: UNEXPET -> INIT */ + SWPS_INFO("Detect %s is present. :3-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 3-2: UNEXPET -> UP */ + SWPS_INFO("Detect %s is present. :3-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 3-3: UNEXPET -> DOWN */ + SWPS_INFO("Detect %s is removed. :3-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 3-4: UNEXPET -> SWAP */ + SWPS_INFO("Detect %s is swapped. :3-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 3-5: UNEXPET -> UNEXPET */ + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRANSVR_UNEXCPT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 3-6: UNEXPET -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :3-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 4-1: ISOLATE -> INIT */ + SWPS_INFO("Detect %s internal error. :4-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 4-2: ISOLATE -> UP */ + SWPS_INFO("Detect %s internal error. :4-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 4-3: ISOLATE -> DOWN */ + SWPS_INFO("Detect %s is removed. :4-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 4-4: ISOLATE -> SWAP */ + SWPS_INFO("Detect %s internal error. :4-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 4-5: ISOLATE -> UNEXPET */ + SWPS_INFO("Detect %s internal error. :4-5\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 4-6: ISOLATE -> ISOLATE */ + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + default: + break; + } + goto comfsm_action_4_unexpected; + + default: + break; + } + goto comfsm_action_4_unexpected; + + +comfsm_action_4_keep_state: + return return_val; + +comfsm_action_4_reinit_obj: + SWPS_DEBUG("FSM action: %s re-initial.\n", self->swp_name); + return_val = _transvr_init_handler(self); + goto comfsm_action_4_identify_event; + +comfsm_action_4_reload_obj: + SWPS_DEBUG("FSM action: %s reload.\n", self->swp_name); + self->type = new_type; + return_val = reload_transvr_obj(self, new_type); + goto comfsm_action_4_identify_event; + +comfsm_action_4_identify_event: + switch (return_val) { + case EVENT_TRANSVR_INIT_UP: + case EVENT_TRANSVR_TASK_DONE: + goto comfsm_action_4_connected; + + case EVENT_TRANSVR_INIT_DOWN: + goto comfsm_action_4_disconnected; + + case EVENT_TRANSVR_INIT_REINIT: + goto comfsm_action_4_nothing; + + case EVENT_TRANSVR_TASK_WAIT: + self->state = STATE_TRANSVR_INIT; + return ERR_TRANSVR_TASK_BUSY; + + case EVENT_TRANSVR_TASK_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_TASK_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_INIT_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_INIT_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_RELOAD_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_RELOAD_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case EVENT_TRANSVR_EXCEP_ISOLATED: + goto comfsm_action_4_isolate_obj; + + default: + SWPS_INFO("%s detect undefined event:%d.\n", self->swp_name, return_val); + goto comfsm_action_4_unexpected; + } + +comfsm_action_4_nothing: + SWPS_DEBUG("FSM action: %s do nothing.\n", self->swp_name); + return 0; + +comfsm_action_4_connected: + SWPS_DEBUG("FSM action: %s Connected.\n", self->swp_name); + self->state = STATE_TRANSVR_CONNECTED; + self->type = new_type; + self->send_uevent(self, KOBJ_ADD); + _transvr_clean_retry(self); + return 0; + +comfsm_action_4_disconnected: + SWPS_DEBUG("FSM action: %s Disconnected. \n", self->swp_name); + self->state = STATE_TRANSVR_DISCONNECTED; + self->temp = EVENT_TRANSVR_TASK_DONE; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_retry(self); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNPLUGGED; + +comfsm_action_4_report_i2c_crash: + SWPS_DEBUG("FSM action: %s report I2C crash.\n", self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_I2C_CRASH; + +comfsm_action_4_isolate_obj: + SWPS_DEBUG("FSM action: %s isolate.\n", self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return ERR_TRNASVR_BE_ISOLATED; + +comfsm_action_4_unexpected: + SWPS_INFO("FSM action: %s unexpected.\n", self->swp_name); + SWPS_INFO("Dump: :%d :0x%02x :%d :0x%02x\n", + old_state, old_type, new_state, new_type); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNEXCPT; +} + + +int +fake_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +int +fake_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +/* ========== Object functions for Initial procedure ========== + */ +int +transvr_init_common(struct transvr_obj_s *self){ + /* Nothing to update */ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_fake(struct transvr_obj_s *self){ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_sfp(struct transvr_obj_s *self){ + + int tmp_val = DEBUG_TRANSVR_INT_VAL; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_msg = "ERR"; + + self->info = sft_detect_transvr_class(self); + /* Disable auto_config */ + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + /* Handle multi-rate */ + err_code = initfunc_sfp_handle_multi_rate_mode(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_multi_rate_mode fail!"; + goto err_transvr_init_sfp_1; + } + /* Handle 1G- RJ45 */ + tmp_val = err_code; + err_code = initfunc_sfp_handle_1g_rj45(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_1g_rj45 fail!"; + goto err_transvr_init_sfp_1; + } + tmp_val = (tmp_val > err_code ? tmp_val : err_code); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_sfp_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_code, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp(struct transvr_obj_s *self){ + + int err = EVENT_TRANSVR_EXCEP_EXCEP; + char *emsg = "ERR"; + + self->info = qsft_detect_transvr_class(self); + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + err = initfunc_qsfp_handle_power_mode(self); + if (err < 0){ + emsg = "initfunc_qsfp_handle_tx_disable fail!"; + goto err_transvr_init_qsfp; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, emsg, err, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp28(struct transvr_obj_s *self){ + + int tmp_val = EVENT_TRANSVR_EXCEP_EXCEP; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_msg = "ERR"; + + /* Handle QSFP common */ + err_val = transvr_init_qsfp(self); + if (err_val < 0){ + err_msg = "transvr_init_qsfp fail!"; + goto err_transvr_init_qsfp28_1; + } + /* Disable auto_config */ + if (!self->auto_config) { + return err_val; + } + /* Handle CDR */ + tmp_val = err_val; + err_val = initfunc_qsfp28_handle_cdr(self); + if (err_val < 0){ + err_msg = "Handle CDR fail!"; + goto err_transvr_init_qsfp28_1; + } + tmp_val = (tmp_val > err_val ? tmp_val : err_val); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp28_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object Initial handler ========== + */ +static int +_is_transvr_valid(struct transvr_obj_s *self, + int type, + int state) { + /* [Return] + * 0 : OK, inserted + * EVENT_TRANSVR_INIT_DOWN : OK, removed + * EVENT_TRANSVR_INIT_FAIL : Outside error, type doesn't supported + * EVENT_TRANSVR_EXCEP_INIT : Internal error, state undefined + */ + switch (type) { + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + break; + default: + SWPS_INFO("detect undefined type:0x%02x on %s\n", + type, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; + } + switch (state) { + case STATE_TRANSVR_DISCONNECTED: + return EVENT_TRANSVR_INIT_DOWN; + case STATE_TRANSVR_INIT: + case STATE_TRANSVR_CONNECTED: + case STATE_TRANSVR_SWAPPED: + break; + default: + SWPS_INFO("detect undefined state:%d on %s\n", + state, self->swp_name); + return EVENT_TRANSVR_EXCEP_INIT; + } + return 0; +} + + +static int +_is_transvr_hw_ready(struct transvr_obj_s *self, + int type){ + /* [Return] + * EVENT_TRANSVR_TASK_DONE : Ready + * EVENT_TRANSVR_TASK_WAIT : Not ready + * EVENT_TRANSVR_INIT_FAIL : Error + */ + int addr = DEBUG_TRANSVR_INT_VAL; + int page = DEBUG_TRANSVR_INT_VAL; + int offs = DEBUG_TRANSVR_INT_VAL; + int bit = DEBUG_TRANSVR_INT_VAL; + int ready = DEBUG_TRANSVR_INT_VAL; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t ab_val = DEBUG_TRANSVR_HEX_VAL; + + switch (type) { + case TRANSVR_TYPE_SFP: + addr = VAL_TRANSVR_8472_READY_ADDR; + page = VAL_TRANSVR_8472_READY_PAGE; + offs = VAL_TRANSVR_8472_READY_OFFSET; + bit = VAL_TRANSVR_8472_READY_BIT; + ready = VAL_TRANSVR_8472_READY_VALUE; + ab_val = VAL_TRANSVR_8472_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + addr = VAL_TRANSVR_8436_READY_ADDR; + page = VAL_TRANSVR_8436_READY_PAGE; + offs = VAL_TRANSVR_8436_READY_OFFSET; + bit = VAL_TRANSVR_8436_READY_BIT; + ready = VAL_TRANSVR_8436_READY_VALUE; + ab_val = VAL_TRANSVR_8436_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + return EVENT_TRANSVR_TASK_DONE; + + default: + emsg = "unexpected case"; + goto err_is_transvr_hw_ready; + } + /* Select target page */ + err = _common_setup_page(self, addr, page, offs, 1, 0); + if (err < 0) { + emsg = "setup page fail"; + goto err_is_transvr_hw_ready; + } + /* Check feature supported + * [Note] + * Some of transceiver/cables doesn't support "Status Indicators" + * (ex:DAC, RJ45 copper SFP ...etc). In these case, we bypass the + * step of checking Status Indicators, then state machine will take + * the following handle procedure. + */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (err < 0) { + emsg = "doesn't support Status Indicators"; + goto bypass_is_transvr_hw_ready; + } + /* Filter abnormal case */ + if (err == ab_val) { + emsg = "detect using unusual definition."; + goto bypass_is_transvr_hw_ready; + } + /* Get Status Indicators */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, offs); + if (err < 0) { + emsg = "detect current value fail"; + goto err_is_transvr_hw_ready; + } + if ((err & (1<:%d\n", __func__, emsg, type); + return EVENT_TRANSVR_TASK_DONE; + +err_is_transvr_hw_ready: + SWPS_DEBUG("%s: %s :%d\n", __func__, emsg, type); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self) { + + switch (self->info) { + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return 1; + default: + break; + } + return 0; +} + + +static int +_transvr_init_handler(struct transvr_obj_s *self){ + + int detect[2]; + int d_state = STATE_TRANSVR_UNEXCEPTED; + int d_type = TRANSVR_TYPE_ERROR; + int result = ERR_TRANSVR_UNINIT; + int retry = 6; /* (6+1) x 0.3 = 2.1s > spec:2.0s */ + int elimit = 63; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Clean and check callback */ + self->state = STATE_TRANSVR_INIT; + if (self->init == NULL) { + snprintf(emsg, elimit, "init() is null"); + goto initer_err_case_unexcept_0; + } + if (self->clean == NULL) { + snprintf(emsg, elimit, "clean() is null"); + goto initer_err_case_unexcept_0; + } + self->clean(self); + + /* Detect transceiver information */ + result = detect_transvr_state(self, detect); + if (result < 0) { + snprintf(emsg, elimit, "detect_transvr_state() fail"); + switch (result) { + case ERR_TRANSVR_I2C_CRASH: + goto initer_err_case_i2c_ceash; + case ERR_TRNASVR_BE_ISOLATED: + goto initer_err_case_be_isolated; + + case ERR_TRANSVR_UNEXCPT: + default: + break; + } + goto initer_err_case_retry_1; + } + d_state = detect[0]; + d_type = detect[1]; + + /* Verify transceiver type and state */ + switch (_is_transvr_valid(self, d_type, d_state)) { + case 0: + break; + case EVENT_TRANSVR_INIT_DOWN: + goto initer_ok_case_down;; + case EVENT_TRANSVR_INIT_FAIL: + snprintf(emsg, elimit, "transceiver type doesn't support"); + goto initer_err_case_alarm_to_user; + case EVENT_TRANSVR_EXCEP_INIT: + default: + goto initer_err_case_unexcept_1; + } + + /* Handle reload case */ + if (self->type != d_type){ + /* This is the protect mechanism. Normally, This case will not happen. + * When State machine detect swap event during initial, It will trigger + * reload function to ensure type correct. */ + if (_reload_transvr_obj(self, d_type) < 0){ + snprintf(emsg, elimit, "reload object fail"); + goto initer_err_case_unexcept_1; + } + } + + /* Check transceiver HW initial ready */ + switch (_is_transvr_hw_ready(self, d_type)) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_err_case_retry_1; + case EVENT_TRANSVR_INIT_FAIL: + default: + goto initer_err_case_unexcept_1; + } + + /* Try to update all and check */ + if (self->update_all(self, 1) < 0){ + /* For some transceiver, EEPROME has lag issues during initial stage. + * In this case, we set status back to STATE_TRANSVR_NEW, than it will + * be checked in next polling cycle. */ + goto initer_err_case_retry_1; + } + + /* Execute init() call back */ + result = self->init(self); + switch (result) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_ok_case_wait; + + default: + snprintf(emsg, elimit, "undefined init() return:%d\n", result); + goto initer_err_case_unexcept_1; + } + goto initer_ok_case_up; + + +initer_ok_case_wait: + self->dump_all(self); + return EVENT_TRANSVR_TASK_WAIT; + +initer_ok_case_up: + self->state = STATE_TRANSVR_CONNECTED; + self->temp = 0; + self->dump_all(self); + return EVENT_TRANSVR_INIT_UP; + +initer_ok_case_down: + self->temp = 0; + self->state = STATE_TRANSVR_DISCONNECTED; + return EVENT_TRANSVR_INIT_DOWN; + +initer_err_case_i2c_ceash: + SWPS_DEBUG("%s: %s :%s :I2C crash\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_I2C_CRASH; + +initer_err_case_be_isolated: + SWPS_DEBUG("%s: %s :%s :isolated\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return EVENT_TRANSVR_EXCEP_ISOLATED; + +initer_err_case_retry_1: + SWPS_DEBUG("%s: %s :%s :retry\n", + __func__, emsg, self->swp_name); + if (_transvr_handle_retry(self, retry) == 0) { + self->state = STATE_TRANSVR_NEW; + return EVENT_TRANSVR_INIT_REINIT; + } + goto initer_err_case_alarm_to_user; + +initer_err_case_unexcept_1: + self->clean(self); +initer_err_case_unexcept_0: + self->state = STATE_TRANSVR_UNEXCEPTED; + if (_is_except_happened_4_pmode(self, d_state) && + (self->mode == TRANSVR_MODE_POLLING) ){ + SWPS_INFO("%s: %s :%s\n", __func__, emsg, self->swp_name); + SWPS_INFO("Dump: :%d :%d :%d :%d\n", + self->state, self->type, d_state, d_type); + } + return EVENT_TRANSVR_INIT_FAIL; + +initer_err_case_alarm_to_user: + SWPS_DEBUG("%s: %s :%s :alarm_to_user\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard"); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object functions for Clean procedure ========== + */ +int +_transvr_clean_handler(struct transvr_obj_s *self){ + + int retval = DEBUG_TRANSVR_INT_VAL; + + if (!self->clean) { + SWPS_ERR("%s: %s clean() is NULL.\n", + __func__, self->swp_name); + return EVENT_TRANSVR_TASK_FAIL; + } + retval = self->clean(self); + if (retval != EVENT_TRANSVR_TASK_DONE){ + SWPS_ERR("%s: %s clean() fail. [ERR]:%d\n", + __func__, self->swp_name, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_transvr_clean(struct transvr_obj_s *self){ + + transvr_task_free_all(self); + transvr_cache_free_all(self); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +qsfp_transvr_clean(struct transvr_obj_s *self){ + + int retval; + int lpower_config = 1; + + retval = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (retval < 0){ + SWPS_ERR("%s: Set lpmod fail! :%d\n", + __func__, retval); + return retval; + } + retval = common_transvr_clean(self); + if (retval < 0){ + SWPS_ERR("%s: common_transvr_clean fail! :%d\n", + __func__, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +fake_transvr_clean(struct transvr_obj_s *self){ + + return EVENT_TRANSVR_TASK_DONE; +} + + +/* ========== Object functions for check and update ========== + */ +int +common_transvr_check(struct transvr_obj_s *self){ + + char fun_str[32] = "common_transvr_check"; + + if (self->mode != TRANSVR_MODE_POLLING) { + SWPS_ERR("%s: mode:%d is not TRANSVR_MODE_POLLING\n", + fun_str, self->mode); + return ERR_TRANSVR_UNEXCPT; + } + /* Trigger delay task */ + transvr_task_run_all(self); + /* Trigger state machine to check and update */ + return self->fsm_4_polling(self, fun_str); +} + + +int +fake_transvr_check(struct transvr_obj_s *self){ + return 0; +} + + +/* ========== Functions for Factory pattern ========== + */ +static int +setup_transvr_public_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = unsupported_get_func; + self->get_br = common_get_br; + self->get_len_sm = sfp_get_len_sm; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = sfp_get_comp_eth_1; + self->get_comp_eth_10 = sfp_get_comp_eth_10; + self->get_comp_eth_10_40 = unsupported_get_func; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = sfp_get_rate_id; + self->get_soft_rs0 = sfp_get_soft_rs0; + self->get_soft_rs1 = sfp_get_soft_rs1; + self->get_info = common_get_info; + self->get_if_type = sfp_get_if_type; + self->get_if_speed = sfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = sfp_get_transvr_temp; + self->get_curr_vol = sfp_get_transvr_voltage; + self->get_soft_rx_los = unsupported_get_func2; + self->get_soft_tx_disable = unsupported_get_func2; + self->get_soft_tx_fault = unsupported_get_func2; + self->get_auto_tx_disable = unsupported_get_func2; + self->get_tx_bias = sfp_get_transvr_tx_bias; + self->get_tx_power = sfp_get_transvr_tx_power; + self->get_rx_power = sfp_get_transvr_rx_power; + self->get_tx_eq = sfp_get_transvr_tx_eq; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = sfp_get_transvr_rx_em; + self->get_wavelength = sfp_get_wavelength; + self->get_extphy_offset = sfp_get_1g_rj45_extphy_offset; + self->get_extphy_reg = sfp_get_1g_rj45_extphy_reg; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = sfp_set_soft_rs0; + self->set_soft_rs1 = sfp_set_soft_rs1; + self->set_soft_tx_disable = unsupported_set_func; + self->set_auto_tx_disable = unsupported_set_func; + self->set_tx_eq = sfp_set_tx_eq; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = sfp_set_rx_em; + self->set_extphy_offset = sfp_set_1g_rj45_extphy_offset; + self->set_extphy_reg = sfp_set_1g_rj45_extphy_reg; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = unsupported_get_func2; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = unsupported_get_func2; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = unsupported_set_func; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = unsupported_set_func; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = qsfp_get_cdr; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = qsfp_get_transvr_tx_eq; + self->get_rx_am = qsfp_get_transvr_rx_am; + self->get_rx_em = qsfp_get_transvr_rx_em; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->set_cdr = qsfp_set_cdr; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = qsfp_set_tx_eq; + self->set_rx_am = qsfp_set_rx_am; + self->set_rx_em = qsfp_set_rx_em; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_FAKE: + self->get_id = fake_get_hex; + self->get_ext_id = fake_get_hex; + self->get_connector = fake_get_hex; + self->get_vendor_name = fake_get_str; + self->get_vendor_pn = fake_get_str; + self->get_vendor_rev = fake_get_str; + self->get_vendor_sn = fake_get_str; + self->get_power_cls = fake_get_int; + self->get_br = fake_get_hex; + self->get_len_sm = fake_get_int; + self->get_len_smf = fake_get_int; + self->get_len_om1 = fake_get_int; + self->get_len_om2 = fake_get_int; + self->get_len_om3 = fake_get_int; + self->get_len_om4 = fake_get_int; + self->get_comp_rev = fake_get_hex; + self->get_comp_eth_1 = fake_get_hex; + self->get_comp_eth_10 = fake_get_hex; + self->get_comp_eth_10_40 = fake_get_hex; + self->get_comp_extend = fake_get_hex; + self->get_cdr = fake_get_hex; + self->get_rate_id = fake_get_hex; + self->get_soft_rs0 = fake_get_binary; + self->get_soft_rs1 = fake_get_binary; + self->get_info = fake_get_int; + self->get_if_type = fake_get_str; + self->get_if_speed = fake_get_str; + self->get_if_lane = fake_get_str; + self->get_curr_temp = fake_get_str; + self->get_curr_vol = fake_get_str; + self->get_soft_rx_los = fake_get_str; + self->get_soft_tx_disable = fake_get_str; + self->get_soft_tx_fault = fake_get_str; + self->get_auto_tx_disable = fake_get_str; + self->get_tx_bias = fake_get_str; + self->get_tx_power = fake_get_str; + self->get_rx_power = fake_get_str; + self->get_tx_eq = fake_get_str; + self->get_rx_am = fake_get_str; + self->get_rx_em = fake_get_str; + self->get_wavelength = fake_get_str; + self->get_extphy_offset = fake_get_str; + self->get_extphy_reg = fake_get_str; + self->set_cdr = fake_set_hex; + self->set_soft_rs0 = fake_set_int; + self->set_soft_rs1 = fake_set_int; + self->set_soft_tx_disable = fake_set_int; + self->set_auto_tx_disable = fake_set_int; + self->set_tx_eq = fake_set_int; + self->set_rx_am = fake_set_int; + self->set_rx_em = fake_set_int; + self->set_extphy_offset = fake_set_hex; + self->set_extphy_reg = fake_set_hex; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_transvr_private_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->init = transvr_init_sfp; + self->clean = common_transvr_clean; + self->check = common_transvr_check; + self->update_all = _sfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = sfp_send_uevent; + self->dump_all = sfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->init = transvr_init_qsfp; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->init = transvr_init_qsfp28; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_FAKE: + self->init = transvr_init_fake; + self->clean = fake_transvr_clean; + self->check = fake_transvr_check; + self->update_all = fake_transvr_update; + self->fsm_4_direct = fake_fsm_4_direct_mode; + self->fsm_4_polling = fake_fsm_4_polling_mode; + self->send_uevent = fake_send_uevent; + self->dump_all = fake_transvr_dump; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static struct eeprom_map_s * +get_eeprom_map(int transvr_type){ + + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + return &eeprom_map_sfp; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + return &eeprom_map_qsfp; + case TRANSVR_TYPE_QSFP_28: + return &eeprom_map_qsfp28; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return NULL; +} + + +static int +setup_transvr_ssize_attr(char *swp_name, + struct transvr_obj_s *self, + struct eeprom_map_s *map_p, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int chan_id, + int run_mode){ + switch (run_mode){ + case TRANSVR_MODE_DIRECT: /* Direct access device mode */ + case TRANSVR_MODE_POLLING: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = DEBUG_TRANSVR_INT_VAL; + return -1; + } + self->eeprom_map_p = map_p; + self->ioexp_obj_p = ioexp_obj_p; + self->ioexp_virt_offset = ioexp_virt_offset; + self->chan_id = chan_id; + self->layout = transvr_type; + self->type = transvr_type; + self->chipset_type = chipset_type; + self->state = STATE_TRANSVR_NEW; + self->info = STATE_TRANSVR_NEW; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + strncpy(self->swp_name, swp_name, 32); + mutex_init(&self->lock); + return 0; +} + + +static int +setup_transvr_dsize_attr(struct transvr_obj_s *self){ + + char *emsg = DEBUG_TRANSVR_STR_VAL; + + self->vendor_name = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_name){ + emsg = "vendor_name"; + goto err_setup_d_attr; + } + self->vendor_pn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_pn){ + emsg = "vendor_pn"; + goto err_setup_d_attr; + } + self->vendor_rev = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_rev){ + emsg = "vendor_rev"; + goto err_setup_d_attr; + } + self->vendor_sn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_sn){ + emsg = "vendor_sn"; + goto err_setup_d_attr; + } + self->worker_p = NULL; + return 0; + +err_setup_d_attr: + SWPS_ERR("%s: %s kzalloc fail!", __func__, emsg); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_i2c_client(struct transvr_obj_s *self){ + + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + adap = i2c_get_adapter(self->chan_id); + if(!adap){ + snprintf(err_msg, sizeof(err_msg), + "can not get adap:%d", self->chan_id); + goto err_setup_i2c_client; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + snprintf(err_msg, sizeof(err_msg), + "can not kzalloc client:%d", self->chan_id); + goto err_setup_i2c_client; + } + client->adapter = adap; + self->i2c_client_p = client; + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return ERR_TRANSVR_UNEXCPT; +} + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode){ + + struct transvr_obj_s *result_p; + struct eeprom_map_s *map_p; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Allocate transceiver object */ + map_p = get_eeprom_map(transvr_type); + if (!map_p){ + snprintf(err_msg, sizeof(err_msg), + "Invalid transvr_type:%d", transvr_type); + goto err_create_transvr_fail; + } + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_create_transvr_fail; + } + /* Prepare static size attributes */ + if (setup_transvr_ssize_attr(swp_name, + result_p, + map_p, + ioexp_obj_p, + ioexp_virt_offset, + transvr_type, + chipset_type, + chan_id, + run_mode) < 0){ + goto err_create_transvr_sattr_fail; + } + /* Prepare dynamic size attributes */ + if (setup_transvr_dsize_attr(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_public_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_private_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare i2c client object */ + if (setup_i2c_client(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + return result_p; + +err_create_transvr_dattr_fail: + kfree(result_p->vendor_sn); + kfree(result_p->vendor_rev); + kfree(result_p->vendor_pn); + kfree(result_p->vendor_name); +err_create_transvr_sattr_fail: + kfree(result_p); +err_create_transvr_fail: + SWPS_ERR("%s: %s :%d :%d :%d\n", + __func__, err_msg, chan_id, ioexp_virt_offset, transvr_type); + return NULL; +} + + +static int +_reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + struct eeprom_map_s *new_map_p; + struct eeprom_map_s *old_map_p = self->eeprom_map_p; + struct i2c_client *old_i2c_p = self->i2c_client_p; + int old_type = self->type; + + /* Change state to STATE_TRANSVR_INIT */ + self->state = STATE_TRANSVR_INIT; + self->type = new_type; + /* Replace EEPROME map */ + new_map_p = get_eeprom_map(new_type); + if (!new_map_p){ + goto err_private_reload_func_1; + } + self->eeprom_map_p = new_map_p; + /* Reload i2c client */ + if (setup_i2c_client(self) < 0){ + goto err_private_reload_func_2; + } + /* Replace call back functions */ + if (setup_transvr_public_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + if (setup_transvr_private_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + kfree(old_i2c_p); + return 0; + +err_private_reload_func_3: + SWPS_INFO("%s: init() fail!\n", __func__); + kfree(old_i2c_p); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return -2; + +err_private_reload_func_2: + self->eeprom_map_p = old_map_p; + self->i2c_client_p = old_i2c_p; +err_private_reload_func_1: + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = old_type; + SWPS_INFO("%s fail! :0x%02x\n", __func__, new_type); + return -1; +} + + +static int +reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + int result_val = ERR_TRANSVR_UNEXCPT; + + /* Reload phase */ + result_val = _reload_transvr_obj(self, new_type); + if (result_val < 0){ + SWPS_INFO("%s: reload phase fail! :%d\n", + __func__, result_val); + return EVENT_TRANSVR_RELOAD_FAIL; + } + /* Initial phase */ + result_val = _transvr_init_handler(self); + if (result_val < 0){ + SWPS_INFO("%s: initial phase fail! :%d\n", + __func__, result_val); + } + return result_val; +} + + +int +isolate_transvr_obj(struct transvr_obj_s *self) { + + self->state = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s be isolated\n", __func__, self->swp_name); + return 0; +} + + +int +resync_channel_tier_2(struct transvr_obj_s *self) { + + int val = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_ISOLATED) { + return 0; + } + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + val = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (val < 0) { + return -1; + } + return 0; +} + + +/* ----------------------------------------- + * ToDo List + * ----------------------------------------- + * 1. _sfp_detect_class_by_feature() + * => Need check ACC use case. + * 2. _sfp_detect_class_by_1g_ethernet() + * => Need check 0.1G use case. + * 3. Loopback transceiver use case. + * => Less much data + * 4. _qsfp_detect_class_by_extend_comp() + * => Verify 100G CWDM4 + * => Verify Obsolete (assigned before 100G CWDM4 MSA required FEC) + * => Verify 100G CLR4 + * => Verify 100GE-DWDM2 + * => Verify 40G PSM4 Parallel SMF + * => Verify 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. + * => Verify 100G ACC or 25GAUI C2M ACC. + * => Verify 25GBASE-LR + * => Verify 40G Active Cable (XLPPI) + */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/transceiver.h b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/transceiver.h new file mode 100644 index 00000000000..42e1938670f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/modules/transceiver.h @@ -0,0 +1,814 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef TRANSCEIVER_H +#define TRANSCEIVER_H + +#include + +/* advanced features control */ +#define TRANSVR_INFO_DUMP_ENABLE (1) +#define TRANSVR_INFO_CACHE_ENABLE (1) +#define TRANSVR_UEVENT_ENABLE (1) + +/* Transceiver type define */ +#define TRANSVR_TYPE_UNKNOW_1 (0x00) +#define TRANSVR_TYPE_UNKNOW_2 (0xff) +#define TRANSVR_TYPE_SFP (0x03) /* Define for SFP, SFP+, SFP28 */ +#define TRANSVR_TYPE_QSFP (0x0c) +#define TRANSVR_TYPE_QSFP_PLUS (0x0d) +#define TRANSVR_TYPE_QSFP_28 (0x11) +#define TRANSVR_TYPE_UNPLUGGED (0xfa) /* Define for ERROR handle */ +#define TRANSVR_TYPE_FAKE (0xfc) /* Define for ERROR handle */ +#define TRANSVR_TYPE_INCONSISTENT (0xfd) /* Define for ERROR handle */ +#define TRANSVR_TYPE_ERROR (0xfe) /* Define for ERROR handle */ + +/* Transceiver class for base info */ +#define TRANSVR_CLASS_UNSPECIFIED (0) +#define TRANSVR_CLASS_ERROR (-26001) +#define TRANSVR_CLASS_1G (26001) +#define TRANSVR_CLASS_10G (26011) +#define TRANSVR_CLASS_25G (26021) +#define TRANSVR_CLASS_40G (26041) +#define TRANSVR_CLASS_100G (26101) +#define TRANSVR_CLASS_NO_SPERARABLE (26901) +#define TRANSVR_CLASS_EXTEND_COMP (26902) +/* Transceiver class for Optical 1G */ +#define TRANSVR_CLASS_OPTICAL (27000) +#define TRANSVR_CLASS_OPTICAL_100 (27001) +#define TRANSVR_CLASS_OPTICAL_1G (27002) +#define TRANSVR_CLASS_OPTICAL_1G_AOC (27003) +#define TRANSVR_CLASS_OPTICAL_1G_SX (27004) +#define TRANSVR_CLASS_OPTICAL_1G_LX (27005) +#define TRANSVR_CLASS_OPTICAL_1G_EX (27006) +/* Transceiver class for Optical 10G */ +#define TRANSVR_CLASS_OPTICAL_10G (27010) +#define TRANSVR_CLASS_OPTICAL_10G_S_AOC (27011) +#define TRANSVR_CLASS_OPTICAL_10G_S_SR (27012) +#define TRANSVR_CLASS_OPTICAL_10G_S_LR (27013) +#define TRANSVR_CLASS_OPTICAL_10G_S_ER (27014) +#define TRANSVR_CLASS_OPTICAL_10G_Q_AOC (27015) +#define TRANSVR_CLASS_OPTICAL_10G_Q_SR (27016) +#define TRANSVR_CLASS_OPTICAL_10G_Q_LR (27017) +#define TRANSVR_CLASS_OPTICAL_10G_Q_ER (27018) +/* Transceiver class for Optical 25G */ +#define TRANSVR_CLASS_OPTICAL_25G (27020) +#define TRANSVR_CLASS_OPTICAL_25G_AOC (27021) +#define TRANSVR_CLASS_OPTICAL_25G_SR (27022) +#define TRANSVR_CLASS_OPTICAL_25G_LR (27023) +#define TRANSVR_CLASS_OPTICAL_25G_ER (27024) +/* Transceiver class for Optical 40G */ +#define TRANSVR_CLASS_OPTICAL_40G (27040) +#define TRANSVR_CLASS_OPTICAL_40G_AOC (27041) +#define TRANSVR_CLASS_OPTICAL_40G_SR4 (27042) +#define TRANSVR_CLASS_OPTICAL_40G_LR4 (27043) +#define TRANSVR_CLASS_OPTICAL_40G_ER4 (27044) +/* Transceiver class for Optical 100G */ +#define TRANSVR_CLASS_OPTICAL_100G (27100) +#define TRANSVR_CLASS_OPTICAL_100G_AOC (27101) +#define TRANSVR_CLASS_OPTICAL_100G_SR4 (27102) +#define TRANSVR_CLASS_OPTICAL_100G_LR4 (27103) +#define TRANSVR_CLASS_OPTICAL_100G_ER4 (27104) +#define TRANSVR_CLASS_OPTICAL_100G_PSM4 (27105) +/* Transceiver class for Copper */ +#define TRANSVR_CLASS_COPPER (28000) +#define TRANSVR_CLASS_COPPER_L1_1G (28001) +#define TRANSVR_CLASS_COPPER_L1_10G (28011) +#define TRANSVR_CLASS_COPPER_L4_10G (28012) +#define TRANSVR_CLASS_COPPER_L1_25G (28021) +#define TRANSVR_CLASS_COPPER_L4_40G (28041) +#define TRANSVR_CLASS_COPPER_L4_100G (28101) +/* Transceiver class for Base-T */ +#define TRANSVR_CLASS_BASE_T_1000 (29001) +#define TRANSVR_CLASS_BASE_T_1000_up (29002) +/* For uevent message */ +#define TRANSVR_UEVENT_KEY_IF "IF_TYPE" +#define TRANSVR_UEVENT_KEY_SP "IF_SPEED" +#define TRANSVR_UEVENT_KEY_LANE "IF_LANE" +#define TRANSVR_UEVENT_UNKNOW "UNKNOW" +#define TRANSVR_IF_KR "KR" +#define TRANSVR_IF_KR4 "KR4" +#define TRANSVR_IF_SR "SR" +#define TRANSVR_IF_SR4 "SR4" +#define TRANSVR_IF_SFI "SFI" +#define TRANSVR_IF_IF_GMII "GMII" +#define TRANSVR_IF_IF_XGMII "XGMII" +#define TRANSVR_IF_SP_100 "100" +#define TRANSVR_IF_SP_1G "1000" +#define TRANSVR_IF_SP_10G "10000" +#define TRANSVR_IF_SP_25G "25000" +#define TRANSVR_IF_SP_40G "40000" +#define TRANSVR_IF_SP_100G "100000" + +/* Transceiver mode define */ +#define TRANSVR_MODE_DIRECT (21000) +#define TRANSVR_MODE_POLLING (21001) + +/* Transceiver state define + * [Note] + * 1. State is used to represent the state of "Transceiver" and "Object". + * 2. State for different target has different means. The description as following: + */ +#define STATE_TRANSVR_CONNECTED (0) /* [Transvr]:Be plugged in. [Obj]:Link up, and work normally. */ +#define STATE_TRANSVR_NEW (-100) /* [Transvr]:(Not used) [Obj]:Create */ +#define STATE_TRANSVR_INIT (-101) /* [Transvr]:Be plugged in. [Obj]:Link up, and in initial process. */ +#define STATE_TRANSVR_ISOLATED (-102) /* [Transvr]:Be plugged in. [Obj]:Isolate, and not provide service. */ +#define STATE_TRANSVR_SWAPPED (-200) /* [Transvr]:Be plugged in. [Obj]:(Not used) */ +#define STATE_TRANSVR_DISCONNECTED (-300) /* [Transvr]:Un-plugged. [Obj]:Link down, and not provide service. */ +#define STATE_TRANSVR_UNEXCEPTED (-901) /* [Transvr]:Any [Obj]:Any, and not in expect case. */ + +/* Task state define */ +#define STATE_T_TASK_WAIT (110) +#define STATE_T_TASK_DONE (0) +#define STATE_T_TASK_INIT (-110) +#define STATE_T_TASK_FAIL (-410) + + +/* Event for task handling */ +#define EVENT_TRANSVR_TASK_WAIT (2101) +#define EVENT_TRANSVR_TASK_DONE (0) +#define EVENT_TRANSVR_TASK_FAIL (-2101) +/* Event for initial handling */ +#define EVENT_TRANSVR_INIT_UP (2201) +#define EVENT_TRANSVR_INIT_DOWN (1) +#define EVENT_TRANSVR_INIT_REINIT (-2201) +#define EVENT_TRANSVR_INIT_FAIL (-2202) +/* Event for others */ +#define EVENT_TRANSVR_RELOAD_FAIL (-2301) +#define EVENT_TRANSVR_EXCEP_INIT (-2401) +#define EVENT_TRANSVR_EXCEP_UP (-2402) +#define EVENT_TRANSVR_EXCEP_DOWN (-2403) +#define EVENT_TRANSVR_EXCEP_SWAP (-2404) +#define EVENT_TRANSVR_EXCEP_EXCEP (-2405) +#define EVENT_TRANSVR_EXCEP_ISOLATED (-2406) +#define EVENT_TRANSVR_I2C_CRASH (-2501) + +/* Transceiver error code define */ +#define ERR_TRANSVR_UNINIT (-201) +#define ERR_TRANSVR_UNPLUGGED (-202) +#define ERR_TRANSVR_ABNORMAL (-203) +#define ERR_TRANSVR_NOSTATE (-204) +#define ERR_TRANSVR_NOTSUPPORT (-205) +#define ERR_TRANSVR_BADINPUT (-206) +#define ERR_TRANSVR_UPDATE_FAIL (-207) +#define ERR_TRANSVR_RELOAD_FAIL (-208) +#define ERR_TRANSVR_INIT_FAIL (-209) +#define ERR_TRANSVR_UNDEFINED (-210) +#define ERR_TRANSVR_TASK_FAIL (-211) +#define ERR_TRANSVR_TASK_BUSY (-212) +#define ERR_TRANSVR_UEVENT_FAIL (-213) +#define ERR_TRANSVR_FUNC_DISABLE (-214) +#define ERR_TRANSVR_I2C_CRASH (-297) +#define ERR_TRNASVR_BE_ISOLATED (-298) +#define ERR_TRANSVR_UNEXCPT (-299) + +/* For debug */ +#define DEBUG_TRANSVR_INT_VAL (-99) +#define DEBUG_TRANSVR_HEX_VAL (0xfe) +#define DEBUG_TRANSVR_STR_VAL "ERROR" + +/* For system internal */ +#define VAL_TRANSVR_COMID_ARREESS (0x50) +#define VAL_TRANSVR_COMID_OFFSET (0x00) +#define VAL_TRANSVR_EXTPHY_ADDR_56 (0x56) +#define VAL_TRANSVR_8472_READY_ADDR (0x51) +#define VAL_TRANSVR_8472_READY_PAGE (-1) +#define VAL_TRANSVR_8472_READY_OFFSET (110) +#define VAL_TRANSVR_8472_READY_BIT (0) +#define VAL_TRANSVR_8472_READY_VALUE (0) +#define VAL_TRANSVR_8472_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_READY_ADDR (0x50) +#define VAL_TRANSVR_8436_READY_PAGE (-1) +#define VAL_TRANSVR_8436_READY_OFFSET (2) +#define VAL_TRANSVR_8436_READY_BIT (0) +#define VAL_TRANSVR_8436_READY_VALUE (0) +#define VAL_TRANSVR_8436_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_PWD_ADDR (0x50) +#define VAL_TRANSVR_8436_PWD_PAGE (-1) +#define VAL_TRANSVR_8436_PWD_OFFSET (123) +#define VAL_TRANSVR_PAGE_FREE (-99) +#define VAL_TRANSVR_PAGE_SELECT_OFFSET (127) +#define VAL_TRANSVR_PAGE_SELECT_DELAY (5) +#define VAL_TRANSVR_TASK_RETRY_FOREVER (-999) +#define VAL_TRANSVR_FUNCTION_DISABLE (-1) +#define STR_TRANSVR_SFP "SFP" +#define STR_TRANSVR_QSFP "QSFP" +#define STR_TRANSVR_QSFP_PLUS "QSFP+" +#define STR_TRANSVR_QSFP28 "QSFP28" + +/* For transvr buf len */ +#define LEN_TRANSVR_S_STR (16) +#define LEN_TRANSVR_M_STR (32) +#define LEN_TRANSVR_L_STR (64) + +/* Optical wavelength */ +#define VAL_OPTICAL_WAVELENGTH_SR (850) +#define VAL_OPTICAL_WAVELENGTH_LR (1310) +#define VAL_OPTICAL_WAVELENGTH_ER (1550) + +/* BCM chip type define */ +#define BCM_CHIP_TYPE_TRIDENT_2 (31001) /* Magnolia, Hudson32i, Spruce */ +#define BCM_CHIP_TYPE_TOMAHAWK (31002) /* Redwood, Cypress, Sequoia */ + +#define BF_CHIP_TYPE_TOFINO (31011) /* Lavender */ + +/* Info from transceiver EEPROM */ +struct eeprom_map_s { + int addr_br; int page_br; int offset_br; int length_br; + int addr_cdr; int page_cdr; int offset_cdr; int length_cdr; + int addr_comp_rev; int page_comp_rev; int offset_comp_rev; int length_comp_rev; + int addr_connector; int page_connector; int offset_connector; int length_connector; + int addr_diag_type; int page_diag_type; int offset_diag_type; int length_diag_type; + int addr_extbr; int page_extbr; int offset_extbr; int length_extbr; + int addr_ext_id; int page_ext_id; int offset_ext_id; int length_ext_id; + int addr_id; int page_id; int offset_id; int length_id; + int addr_len_sm; int page_len_sm; int offset_len_sm; int length_len_sm; + int addr_len_smf; int page_len_smf; int offset_len_smf; int length_len_smf; + int addr_len_om1; int page_len_om1; int offset_len_om1; int length_len_om1; + int addr_len_om2; int page_len_om2; int offset_len_om2; int length_len_om2; + int addr_len_om3; int page_len_om3; int offset_len_om3; int length_len_om3; + int addr_len_om4; int page_len_om4; int offset_len_om4; int length_len_om4; + int addr_option; int page_option; int offset_option; int length_option; + int addr_rate_id; int page_rate_id; int offset_rate_id; int length_rate_id; + int addr_rx_am; int page_rx_am; int offset_rx_am; int length_rx_am; + int addr_rx_em; int page_rx_em; int offset_rx_em; int length_rx_em; + int addr_rx_los; int page_rx_los; int offset_rx_los; int length_rx_los; + int addr_rx_power; int page_rx_power; int offset_rx_power; int length_rx_power; + int addr_soft_rs0; int page_soft_rs0; int offset_soft_rs0; int length_soft_rs0; + int addr_soft_rs1; int page_soft_rs1; int offset_soft_rs1; int length_soft_rs1; + int addr_temp; int page_temp; int offset_temp; int length_temp; + int addr_trancomp; int page_trancomp; int offset_trancomp; int length_trancomp; + int addr_trancomp_ext; int page_trancomp_ext; int offset_trancomp_ext; int length_trancomp_ext; + int addr_tx_bias; int page_tx_bias; int offset_tx_bias; int length_tx_bias; + int addr_tx_disable; int page_tx_disable; int offset_tx_disable; int length_tx_disable; + int addr_tx_eq; int page_tx_eq; int offset_tx_eq; int length_tx_eq; + int addr_tx_fault; int page_tx_fault; int offset_tx_fault; int length_tx_fault; + int addr_tx_power; int page_tx_power; int offset_tx_power; int length_tx_power; + int addr_vendor_name; int page_vendor_name; int offset_vendor_name; int length_vendor_name; + int addr_vendor_pn; int page_vendor_pn; int offset_vendor_pn; int length_vendor_pn; + int addr_vendor_rev; int page_vendor_rev; int offset_vendor_rev; int length_vendor_rev; + int addr_vendor_sn; int page_vendor_sn; int offset_vendor_sn; int length_vendor_sn; + int addr_voltage; int page_voltage; int offset_voltage; int length_voltage; + int addr_wavelength; int page_wavelength; int offset_wavelength; int length_wavelength; +}; + + +struct transvr_worker_s; + +/* Class of transceiver object */ +struct transvr_obj_s { + + /* ========== Object private property ========== + * [Prop]: id + * [Desc]: Type of serial transceiver. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh /QSFP28:11h + */ + uint8_t id; + + /* [Prop]: connector + * [Desc]: Connector type. + * [Note]: SFP : A0h / 2 + * QSFP: 00h / 130 + */ + uint8_t connector; + + /* [Prop]: transvr_comp + * [Desc]: Transceiver compliance code. + * [Note]: SFP: SFF-8472 + * - Normal : A0h / offset 3-10 + * - Extended: A0h / offset 36 + * QSFP: SFF-8436 & SFF-8636 + * - Normal : 00h / offset 131-138 + * - Extended: 00h / offset 192 + */ + uint8_t transvr_comp[8]; + uint8_t transvr_comp_ext; + + /* [Prop]: vendor_name + * [Desc]: SFP vendor name (ASCII 16 byte char). + * [Note]: ex:FINISAR CORP. + */ + char *vendor_name; + + /* [Prop]: vendor_pn + * [Desc]: Part number provided by SFP vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_pn; + + /* [Prop]: vendor_rev + * [Desc]: Revision level for part number provided by vendor (ASCII 4 byte char). + * [Note]: + */ + char *vendor_rev; + + /* [Prop]: vendor_sn + * [Desc]: Serial number provided by vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_sn; + + /* [Prop]: Extended identifier + * [Desc]: SFP: + * => None + * + * QSFP: + * => This byte contained two information: + * (1) Power consumption class + * (2) CDR function present + * [Note]: Bit description as below: + * [SFP] + * None + * + * [QSFP] + * (1) Power consumption class: + * Class 1: 1.5W (Bit6-7 = 00:) + * Class 2: 2.0W (Bit6-7 = 01:) + * Class 3: 2.5W (Bit6-7 = 10:) + * Class 4: 3.5W (Bit6-7 = 11:) + * Class 5: 4.0W (Bit0-1 = 01:) + * Class 6: 4.5W (Bit0-1 = 10:) + * Class 7: 5.0W (Bit0-1 = 11:) + * (2) CDR function present: + * Bit2: 0 = No CDR in RX + * 1 = CDR present in RX + * Bit3: 0 = No CDR in TX + * 1 = CDR present in TX + */ + uint8_t ext_id; + + /* [Prop]: br + * [Desc]: Nominal bit rate, units of 100 MBits/sec. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh + * has val: 0x67 + * no val : + */ + uint8_t br; + + /* [Prop]: extbr + * [Desc]: Extended br (00h/222) + * [Desc]: Nominal bit rate per channel, units of 250 Mbps. + * Complements. Byte 140. See Table 32A. + */ + uint8_t extbr; + + /* [Prop]: len_sm + * [Desc]: Length (single mode)-(100's)m + * [Note]: This value specifies the link length that is supported by the transceiver + * while operating in compliance with the applicable standards using single mode + * fiber. The value is in units of 100 meters. A value of 255 means that the + * transceiver supports a link length greater than 25.4 km. A value of zero means + * that the transceiver does not support single mode fiber or that the length + * information must be determined from the transceiver technology. + */ + int len_sm; + + /* [Prop]: len_smf + * [Desc]: Length (single mode)-km + * [Note]: Addition to EEPROM data from original GBIC definition. This value specifies + * the link length that is supported by the transceiver while operating in + * compliance with the applicable standards using single mode fiber. The value + * is in units of kilometers. A value of 255 means that the transceiver supports + * a link length greater than 254 km. A value of zero means that the transceiver + * does not support single mode fiber or that the length information must be + * determined from the transceiver technology. + */ + int len_smf; + + /* [Prop]: len_om1 + * [Desc]: Link length supported for 62.5 um OM1 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om1; + + /* [Prop]: len_om2 + * [Desc]: Link length supported for 50 um OM2 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om2; + + /* [Prop]: len_om3 + * [Desc]: Length (50um, OM3) + * [Note]: This value specifies link length that is supported by the transceiver while + * operating in compliance with applicable standards using 50 micron multimode + * OM3 [2000 MHz*km] fiber. The value is in units of 10 meters. A value of 255 + * means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber + * or that the length information must be determined from the transceiver technology. + */ + int len_om3; + + /* [Prop]: len_om4 + * [Desc]: Length (50um, OM4) and Length (Active Cable or Copper) + * [Note]: For optical links, this value specifies link length that is supported by the + * transceiver while operating in compliance with applicable standards using 50 micron + * multimode OM4 [4700 MHz*km] fiber. The value is in units of 10 meters. A value of + * 255 means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber or that + * the length information must be determined from the transceiver codes specified in Table 5-3. + * + * For copper links, this value specifies minimum link length supported by the transceiver + * while operating in compliance with applicable standards using copper cable. For active + * cable, this value represents actual length. The value is in units of 1 meter. A value of 255 + * means the transceiver supports a link length greater than 254 meters. A value of zero means + * the transceiver does not support copper or active cables or the length information must be + * determined from transceiver technology. Further information about cable design, equalization, + * and connectors is usually required to guarantee meeting a particular length requirement. + */ + int len_om4; + + /* [Prop]: comp_rev + * [Desc]: SFF spec revision compliance + * [Note]: Indicates which revision of SFF SFF-8472 (SFP) / SFF-8636 (QSFP) the transceiver + * complies with. (unsigned integer) + */ + uint8_t comp_rev; + + /* [Prop]: CDR + * [Desc]: For transceivers with CDR capability, setting the CDR to ON engages the internal + * retiming function. Setting the CDR to OFF enables an internal bypassing mode ,which + * directs traffic around the internal CDR. (Reference: SFF-8636) + * [Note]: value=0xff: ON. + * value=0x00: OFF. + */ + uint8_t cdr; + + /* [Prop]: rate_id + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Addr: A0h / Offset: 13 + * 2. Value description: + * 00h Unspecified + * 01h SFF-8079 (4/2/1G Rate_Select & AS0/AS1) + * 02h SFF-8431 (8/4/2G Rx Rate_Select only) + * 03h Unspecified * + * 04h SFF-8431 (8/4/2G Tx Rate_Select only) + * 05h Unspecified * + * 06h SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) + * 07h Unspecified * + * 08h FC-PI-5 (16/8/4G Rx Rate_select only) High=16G only, Low=8G/4G + * 09h Unspecified * + * 0Ah FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) High=16G only, + * Low=8G/4G + * 0Bh Unspecified * + * 0Ch FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + * 0Dh Unspecified * + * 0Eh 10/8G Rx and Tx Rate_Select controlling the operation or locking + * modes of the internal signal conditioner, retimer or CDR, according + * to the logic table defined in Table 10-2, High Bit Rate + * (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = 8.5 Gb/s. In this mode, + * the default value of bit 110.3 (Soft Rate Select RS(0), Table 9-11) + * and of bit 118.3 (Soft Rate Select RS(1), Table 10-1) is 1. + * 0Fh Unspecified * + * 10h-FFh Unallocated + */ + int rate_id; + + /* [Prop]: soft_rs0 + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Writing '1' selects full bandwidth operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(0) or RS(0) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 110 / Bit: 3 + */ + uint8_t soft_rs0; + + /* [Prop]: soft_rs1 + * [Desc]: Soft Rate Select 1(TX). + * [Note]: 1. Writing '1' selects full bandwidth TX operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(1) or RS(1) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 118 / Bit: 3 + */ + uint8_t soft_rs1; + + /* [Prop]: diag_type + * [Desc]: DIAGNOSTIC MONITORING TYPE (A0h/92) + * [Note]: Description in SFF-8472 as below: + * Bit7: Reserved for legacy diagnostic implementations. Must be '0' for compliance + * with this document. + * Bit6: Digital diagnostic monitoring implemented (described in this document). + * Must be '1' for compliance with this document. + * Bit5 Internally calibrated + * Bit4 Externally calibrated + * Bit3 Received power measurement type.0 = OMA, 1 = average power + * Bit2 Address change required see section above, "addressing modes" + * Bit1-0 Unallocated + */ + uint8_t diag_type; + + /* [Prop]: curr_temp + * [Desc]: Transceiver Current Temperature (A2h/96-97) + * [Note]: 1. Dependent on diag_type. + * 2. 96: High byte + * 3. 97: Low byte + * 4. This feature only for SFP + */ + uint8_t curr_temp[2]; + + /* [Prop]: curr_vol + * [Desc]: Transceiver Current Voltage (SFP:A2h/108-109; QSFP:00h/22-23) + * [Note]: 1. Dependent on diag_type. + * 2. 98: High byte + * 3. 99: Low byte + * 4. This feature only for SFP + * 5. Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts + */ + uint8_t curr_voltage[2]; + + /* [Prop]: curr_tx_bias + * [Desc]: Transceiver TX Bias Current (SFP:A2h/100-101; QSFP:00h/26-27) + * [Note]: 1. Dependent on diag_type. + * 2. 100: High byte + * 3. 101: Low byte + * 4. This feature only for SFP + * 5. Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + uint8_t curr_tx_bias[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + uint8_t curr_tx_power[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + uint8_t curr_rx_power[8]; + + /* [Prop]: wavelength + * [Desc]: Wavelength or Copper Cable Attenuation + * [Note]: (Following is info from SFF-8636) + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is a + * 16-bit hex value with Byte 186 as high order byte and Byte 187 as low + * order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. If the free side device is identified as + * copper cable these registers will be used to define the cable attenuation. + * An indication of 0 dB attenuation refers to the case where the attenuation + * is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + uint8_t wavelength[2]; + + /* [Prop]: Amplitude control + * [Desc]: Amplitude control + * [Note]: QSFP28 => SFF-8636 03H Byte-238/239 + */ + uint8_t rx_am[2]; + + /* [Prop]: Emphasis control + * [Desc]: Emphasis control + * [Note]: SFP+/28 => SFF-8472 A2H Byte-115 + * QSFP28 => SFF-8636 03H Byte-236/237 + */ + uint8_t rx_em[2]; + + /* [Prop]: Soft Rx LOS + * [Desc]: Soft Rx LOS which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 3: + * - Bit 0: L-Rx1 LOS + * - Bit 1: L-Rx2 LOS + * - Bit 2: L-Rx3 LOS + * - Bit 3: L-Rx4 LOS + */ + uint8_t rx_los; + + /* [Prop]: Soft Tx Disable + * [Desc]: Soft Tx Disable which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Disable + * - Bit 1: Tx2 Disable + * - Bit 2: Tx3 Disable + * - Bit 3: Tx4 Disable + */ + uint8_t tx_disable; + + /* [Prop]: Soft Tx Fault + * [Desc]: Soft Tx Fault which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Fault + * - Bit 1: Tx2 Fault + * - Bit 2: Tx3 Fault + * - Bit 3: Tx4 Fault + */ + uint8_t tx_fault; + + /* [Prop]: Transceiver EQUALIZATION + * [Desc]: Transceiver EQUALIZATION + * [Note]: SFP+/28 => SFF-8472 A2H Byte-114 + * QSFP28 => SFF-8636 03H Byte-234/235 + */ + uint8_t tx_eq[2]; + + /* [Prop]: OPTION VALUES + * [Desc]: The bits in the option field shall specify the options implemented in the transceiver. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-64/65 + * QSFP+/28 => SFF-8636 00H Byte-193/195 + */ + uint8_t option[3]; + + /* [Prop]: External PHY offset + * [Desc]: It needs to be setup first if you want to access transceiver external phy. + * [Note]: This feature dependent on transceiver. + * Currently, only 1G-RJ45 transceiver supported it. + */ + uint8_t extphy_offset; + + /* ========== Object private property ========== + */ + struct device *transvr_dev_p; + struct eeprom_map_s *eeprom_map_p; + struct i2c_client *i2c_client_p; + struct ioexp_obj_s *ioexp_obj_p; + struct transvr_worker_s *worker_p; + struct mutex lock; + char swp_name[32]; + int auto_config; + int auto_tx_disable; + int chan_id; + int chipset_type; + int curr_page; + int info; + int ioexp_virt_offset; + int lane_id[8]; + int layout; + int mode; + int retry; + int state; + int temp; + int type; + + /* ========== Object public functions ========== + */ + int (*get_id)(struct transvr_obj_s *self); + int (*get_ext_id)(struct transvr_obj_s *self); + int (*get_connector)(struct transvr_obj_s *self); + int (*get_vendor_name)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_pn)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_rev)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_sn)(struct transvr_obj_s *self, char *buf_p); + int (*get_power_cls)(struct transvr_obj_s *self); + int (*get_br)(struct transvr_obj_s *self); + int (*get_len_sm)(struct transvr_obj_s *self); + int (*get_len_smf)(struct transvr_obj_s *self); + int (*get_len_om1)(struct transvr_obj_s *self); + int (*get_len_om2)(struct transvr_obj_s *self); + int (*get_len_om3)(struct transvr_obj_s *self); + int (*get_len_om4)(struct transvr_obj_s *self); + int (*get_comp_rev)(struct transvr_obj_s *self); + int (*get_comp_eth_1)(struct transvr_obj_s *self); + int (*get_comp_eth_10)(struct transvr_obj_s *self); + int (*get_comp_eth_10_40)(struct transvr_obj_s *self); + int (*get_comp_extend)(struct transvr_obj_s *self); + int (*get_cdr)(struct transvr_obj_s *self); + int (*get_rate_id)(struct transvr_obj_s *self); + int (*get_soft_rs0)(struct transvr_obj_s *self); + int (*get_soft_rs1)(struct transvr_obj_s *self); + int (*get_info)(struct transvr_obj_s *self); + int (*get_if_type)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_speed)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_lane)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_temp)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_vol)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_rx_los)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_fault)(struct transvr_obj_s *self, char *buf_p); + int (*get_auto_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_bias)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_eq)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_am)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_em)(struct transvr_obj_s *self, char *buf_p); + int (*get_wavelength)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_offset)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_reg)(struct transvr_obj_s *self, char *buf_p); + int (*set_cdr)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs0)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs1)(struct transvr_obj_s *self, int input_val); + int (*set_soft_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_auto_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_tx_eq)(struct transvr_obj_s *self, int input_val); + int (*set_rx_am)(struct transvr_obj_s *self, int input_val); + int (*set_rx_em)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_offset)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_reg)(struct transvr_obj_s *self, int input_val); + + /* ========== Object private functions ========== + */ + int (*init)(struct transvr_obj_s *self); + int (*clean)(struct transvr_obj_s *self); + int (*check)(struct transvr_obj_s *self); + int (*update_all)(struct transvr_obj_s *self, int show_err); + int (*fsm_4_direct)(struct transvr_obj_s* self, char *caller_name); + int (*fsm_4_polling)(struct transvr_obj_s* self, char *caller_name); + int (*send_uevent)(struct transvr_obj_s* self, enum kobject_action u_action); + int (*dump_all)(struct transvr_obj_s* self); +}; + + +/* For AVL Mapping */ +struct transvr_avl_s { + char vendor_name[32]; + char vendor_pn[32]; + int (*init)(struct transvr_obj_s *self); +}; + + +/* Worker for long term task of transceiver */ +struct transvr_worker_s { + /* Task Parameter */ + struct transvr_obj_s *transvr_p; + struct transvr_worker_s *next_p; + struct transvr_worker_s *pre_p; + unsigned long trigger_time; + char func_name[64]; + int retry; + int state; + + /* Task private data */ + void *p_data; + + /* Call back function */ + int (*main_task)(struct transvr_worker_s *task); + int (*post_task)(struct transvr_worker_s *task); +}; + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode); + +void lock_transvr_obj(struct transvr_obj_s *self); +void unlock_transvr_obj(struct transvr_obj_s *self); +int isolate_transvr_obj(struct transvr_obj_s *self); + +int resync_channel_tier_2(struct transvr_obj_s *self); + +void alarm_msg_2_user(struct transvr_obj_s *self, char *emsg); + +#endif /* TRANSCEIVER_H */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6254qs/utils/inventec_d6254_util.py b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/utils/inventec_d6254_util.py new file mode 100644 index 00000000000..31cf736dafb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6254qs/utils/inventec_d6254_util.py @@ -0,0 +1,239 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Inventec, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install() + elif arg == 'clean': + uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[D6254]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +"with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +instantiate =[ +#'echo pca9548 0x71> /sys/bus/i2c/devices/i2c-0/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-2/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-3/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-4/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-5/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-6/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-7/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-8/new_device', +'echo inv_eeprom 0x53 > /sys/bus/i2c/devices/i2c-0/new_device'] +#'echo inv_psoc 0x66> /sys/bus/i2c/devices/i2c-0/new_device', +#'echo inv_cpld 0x55> /sys/bus/i2c/devices/i2c-0/new_device'] + +drivers =[ +'gpio_ich', +'lpc_ich', +'i2c-i801', +'i2c-mux', +'i2c-mux-pca954x', +'i2c-dev', +'inv_eeprom', +'inv_platform', +'inv_psoc', +'inv_cpld', +'swps', +'inv_pthread'] + + + +def system_install(): + global FORCE + + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("rmmod i2c_ismt ", 1) + status, output = exec_cmd("rmmod i2c-i801 ", 1) + #install drivers + for i in range(0,len(drivers)): + status, output = exec_cmd("modprobe "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + + #instantiate devices + for i in range(0,len(instantiate)): + #time.sleep(1) + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(10,18): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-2/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(18,26): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-3/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(26,34): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-4/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(34,42): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-5/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(42,50): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-6/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(50,58): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-7/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(58,64): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-8/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + + +def system_ready(): + if not device_found(): + return False + return True + +def install(): + if not device_found(): + print "No device, installing...." + status = system_install() + if status: + if FORCE == 0: + return status + else: + print " D6254 devices detected...." + return + +def uninstall(): + global FORCE + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"*0072", 0) + ret2, log = exec_cmd("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/Makefile b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/Makefile new file mode 100755 index 00000000000..33b090c4f8e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/Makefile @@ -0,0 +1,12 @@ +obj-m += gpio-ich.o +obj-m += ucd9000.o +obj-m += i2c-mux-pca9541.o +obj-m += lpc_ich.o +obj-m += inv_cpld.o +obj-m += inv_platform.o +obj-m += inv_eeprom.o +obj-m += inv_psu.o +obj-m += swps.o +obj-m += monitor.o +swps-objs := inv_swps.o inv_mux.o io_expander.o transceiver.o sff_io.o +monitor-objs := inv_monitor.o inv_proxy.o diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/README b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/README new file mode 100644 index 00000000000..91b18941d93 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/README @@ -0,0 +1,961 @@ + ======================================== + * Switch Port Service Driver (SWPS) * + ======================================== + + Latest Version: 4.0 + Update Date: 2016/11/28 + + +1. DESCRIPTION + + SWPS driver is a Linux kernel driver which provide following main features + (1) Standard SFF interface to access transceiver/cables. + (2) Automatic handle mechansim for transceiver/cables. + (3) Automatic handle mechansim for port relate device. + (4) Automatic handle mechansim for I2C topology. + + +2. FEATURES + + SWPS driver has two mode which is POLLING_MODE and NON_POLLING_MODE. There + are some features only for POLLING_MODE(default). The following section will + markup them. + If you want to change the running mode, please reference Note-3.2. + + 2.1 Sysfs Interface (Each Mode) + => SWPS provide the Linux sysfs interface to access and control transceiver relate + features. The access path in Linux environment as below: + # /sys/class/swps/port[X] + + => Example for read data: + # cat /sys/class/swps/port0/id + + => Example for setup feature: + # echo 1 > /sys/class/swps/port0/lpmod + + 2.2 SFP Port Directory Tree and Attributes: + => /sys/class/swps/port + |-- br + |-- comp_eth + |-- comp_eth_10 + |-- comp_extend + |-- comp_rev + |-- connector + |-- hard_rs0 + |-- hard_rs1 + |-- id + |-- if_lane + |-- if_speed + |-- if_type + |-- info + |-- len_sm + |-- len_smf + |-- len_om1 + |-- len_om2 + |-- len_om3 + |-- len_om4 + |-- present + |-- rate_id + |-- rx_power + |-- rxlos + |-- soft_rs0 + |-- soft_rs1 + |-- temperature + |-- tx_bias + |-- tx_disalbe + |-- tx_fault + |-- tx_power + |-- vendor_name + |-- vendor_pn + |-- vendor_rev + |-- vendor_sn + |-- voltage + `-- wavelength + + => ----------------------------------------------------------------------- + | Attribute | | Description | + ----------------------------------------------------------------------- + | br | R | Name: Bit Rate | + | | | Addr: SFF-8472 / A0h / 12 | + | | | Desc: Nominal signalling rate, units of 100MBd. | + ----------------------------------------------------------------------- + | comp_eth | R | Name: Trnasceiver compliance code for 1G | + | | | Addr: SFF-8472 / A0h / 3 | + | | | Desc: Byte-3 Bit 0~3 for 1G defintion | + ----------------------------------------------------------------------- + | comp_eth_10 | R | Name: Trnasceiver compliance code for 10G | + | | | Addr: SFF-8472 / A0h / 3 | + | | | Desc: Byte-3 Bit 5~7 for 10G defintion | + ----------------------------------------------------------------------- + | comp_extend | R | Name: Trnasceiver extended compliance code | + | | | Addr: SFF-8472 / A0h / 36 | + | | | Desc: Byte-36 Bit 0~7 | + ----------------------------------------------------------------------- + | comp_rev | R | Name: SFF-8472 Compliance | + | | | Addr: SFF-8472 / A0h / 94 | + | | | Desc: Indicates which revision of SFF-8472 the | + | | | transceiver complies with. | + ----------------------------------------------------------------------- + | connector | R | Name: Connector | + | | | Addr: SFF-8472 / A0h / 2 | + | | | Desc: Type of connector | + ----------------------------------------------------------------------- + | hard_rs0 | R/W | Name: RX Hard Rate Select (Via IO Expander) | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Read/write bit that allows Hardward rate | + | | | select control. Writing '1' selects full | + | | | bandwidth operation. | + ----------------------------------------------------------------------- + | hard_rs1 | R/W | Name: TX Hard Rate Select (Via IO Expander) | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Read/write bit that allows software rate | + | | | select control. Writing '1' selects full | + | | | bandwidth operation. | + ----------------------------------------------------------------------- + | id | R | Name: Identifier | + | | | Addr: SFF-8472 / A0h / 0 | + | | | Desc: Type of transceiver | + ----------------------------------------------------------------------- + | if_lane | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Type of transceiver | + ----------------------------------------------------------------------- + | if_type | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Provide if_type info for BCM and apps. | + ----------------------------------------------------------------------- + | if_speed | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Provide if_speed info for BCM and apps. | + ----------------------------------------------------------------------- + | info | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Provide detail transceiver and cable type | + | | | for BCM and apps. | + ----------------------------------------------------------------------- + | len_smf | R | Name: Length (single mode)-km | + | | | Addr: SFF-8472 / A0h / 14 | + | | | Desc: Link length supported for single mode. | + | | | units of km. | + ----------------------------------------------------------------------- + | len_sm | R | Name: Length (single mode)-(100's)m | + | | | Addr: SFF-8472 / A0h / 15 | + | | | Desc: Link length supported for single mode. | + | | | units of 100 m. | + ----------------------------------------------------------------------- + | len_om1 | R | Name: Length (62.5um, OM1) | + | | | Addr: SFF-8472 / A0h / 17 | + | | | Desc: Link length supported for OM1 [200 MHz*km | + | | | at 850nm, 500 MHz*km at 1310nm] fiber. | + | | | units of 10 m. | + ----------------------------------------------------------------------- + | len_om2 | R | Name: Length (50um, OM2) | + | | | Addr: SFF-8472 / A0h / 16 | + | | | Desc: Link length supported for OM2 [500MHz*km | + | | | at 850nm] fiber. | + | | | units of 10 m. | + ----------------------------------------------------------------------- + | len_om3 | R | Name: Length (50um, OM3) | + | | | Addr: SFF-8472 / A0h / 19 | + | | | Desc: Link length supported for OM3 [2000 | + | | | MHz*km] fiber | + | | | units of km. | + ----------------------------------------------------------------------- + | len_om4 | R | Name: Length (50um, OM4) and Length (Active | + | | | Cable or Copper) | + | | | Addr: SFF-8472 / A0h / 18 | + | | | Desc: Link length supported for OM4 [4700 MHz* | + | | | km] fiber. | + | | | units of 10 m. | + ----------------------------------------------------------------------- + | present | R | Name: IO Expander present pin | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Show transceiver exist or not | + ---------------------------------------------------------------------- + | rate_id | R | Name: Rate Identifier | + | | | Addr: SFF-8472 / A0h / 13 | + | | | Desc: Type of rate select functionality | + ----------------------------------------------------------------------- + | rx_power | R | Name: RX Power MSB & LSB | + | | | Addr: SFF-8472 / A0h / 104-105 | + | | | Desc: Measured RX input power. Range:0-6.5 mW | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + ----------------------------------------------------------------------- + | rxlos | R | Name: Receiver Loss of Signal | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: An adequate optical input results in a low| + | | | Rx_LOS output while a high Rx_LOS output | + | | | indicates an unusable optical input. | + ----------------------------------------------------------------------- + | soft_rs0 | R/W | Name: RX Soft Rate Select (Transceiver side) | + | | | Addr: SFF-8472 / A2h / 110 bit-3 | + | | | Desc: Read/write bit that allows software rate | + | | | select control. Writing '1' selects full | + | | | bandwidth operation. | + ----------------------------------------------------------------------- + | soft_rs1 | R/W | Name: TX Soft Rate Select (Transceiver side) | + | | | Addr: SFF-8472 / A0h / 118 bit-3 | + | | | Desc: Read/write bit that allows software rate | + | | | select control. Writing '1' selects full | + | | | bandwidth operation. | + ----------------------------------------------------------------------- + | temperature | R | Name: Temperature MSB & LSB | + | | | Addr: SFF-8472 / A2h / 96 | + | | | Desc: Internally measured module temperature. | + | | | Range of -128 ~ +128 (Degrees C) | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + ----------------------------------------------------------------------- + | tx_bias | R | Name: TX Bias MSB & LSB | + | | | Addr: SFF-8472 / A2h / 100-101 | + | | | Desc: Measured transmitter laser bias current. | + | | | Range of 0 to 131 mA. | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + ----------------------------------------------------------------------- + | tx_disalbe | R/W | Name: TX Disable | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Disable Tx output signals. | + | | | 0 is enable, 1 is disable. | + ----------------------------------------------------------------------- + | tx_fault | R | Name: TX Fault | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: The output indicates LOW when the | + | | | transmitter is operating normally, and | + | | | HIGH with a laser fault including laser | + | | | end-of-life. | + ----------------------------------------------------------------------- + | tx_power | R | Name: TX Power MSB & LSB | + | | | Addr: SFF-8472 / A2h / 102-103 | + | | | Desc: Measured TX output power. | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + ----------------------------------------------------------------------- + | vendor_name | R | Name: Vendor name | + | | | Addr: SFF-8472 / A0h / 20-35 | + | | | Desc: SFP vendor name (ASCII) | + ----------------------------------------------------------------------- + | vendor_pn | R | Name: Vendor PN | + | | | Addr: SFF-8472 / A0h / 40-55 | + | | | Desc: Part number provided by SFP vendor (ASCII)| + ----------------------------------------------------------------------- + | vendor_rev | R | Name: Vendor rev | + | | | Addr: SFF-8472 / A0h / 56-59 | + | | | Desc: Revision level for part number provided | + | | | by vendor (ASCII) | + ----------------------------------------------------------------------- + | vendor_sn | R | Name: Vendor SN | + | | | Addr: SFF-8472 / A0h / 68-83 | + | | | Desc: Serial number provided by vendor (ASCII) | + ----------------------------------------------------------------------- + | voltage | R | Name: Vcc MSB & LSB | + | | | Addr: SFF-8472 / A0h / 98-99 | + | | | Desc: Internally measured supply voltage in | + | | | transceiver. | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + ----------------------------------------------------------------------- + | wavelength | R | Name: Laser wavelength | + | | | Addr: SFF-8472 / A0h / 60-61 | + | | | Desc: Laser wavelength (Passive/Active Cable | + | | | Specification Compliance) | + ----------------------------------------------------------------------- + => Note: Some atributes are depend on Hardware (Platform) type. + + + 2.3 QSFP Port Directory Tree and Attributes: + => /sys/class/swps/port + |-- br + |-- cdr (QSFP28 only) + |-- comp_eth + |-- comp_eth_10_40 + |-- comp_extend + |-- comp_rev + |-- connector + |-- id + |-- if_lane + |-- if_speed + |-- if_type + |-- info + |-- len_smf + |-- len_om1 + |-- len_om2 + |-- len_om3 + |-- len_om4 + |-- lpmod + |-- modsel + |-- power_cls + |-- present + |-- reset + |-- rx_power + |-- soft_rx_los + |-- soft_tx_disable + |-- soft_tx_fault + |-- temperature + |-- tx_bias + |-- tx_power + |-- vendor_name + |-- vendor_pn + |-- vendor_rev + |-- vendor_sn + |-- voltage + `-- wavelength + + => --------------------------------------------------------------------------- + | Attribute | | Description | + --------------------------------------------------------------------------- + | br | R | Name: BR, nominal | + | | | Addr: SFF-8636 / 00h / 140 | + | | | Desc: Nominal signalling rate, units of 100MBd. | + --------------------------------------------------------------------------- + | cdr | R/W | Name: CDR control | + | | | Addr: SFF-8636 / 00h / 98 | + | | | Desc: 100G QSFP28 | + --------------------------------------------------------------------------- + | comp_eth | R | Name: Trnasceiver compliance code for 1G | + | | | Addr: SFF-8636 / 00h / 134 | + | | | Desc: Byte-134 Bit 0~3 for 1G defintion | + --------------------------------------------------------------------------- + | comp_eth_10_40 | R | Name: Trnasceiver compliance code for 10/40G | + | | | Addr: SFF-8636 / 00h / 131 | + | | | Desc: 10/40G Ethernet Compliance Codes | + --------------------------------------------------------------------------- + | comp_extend | R | Name: Trnasceiver extended compliance code | + | | | Addr: SFF-8636 / 00h / 192 | + | | | Desc: Extended Specification Compliance Codes | + | | | (See SFF-8024 Transceiver Management) | | + --------------------------------------------------------------------------- + | comp_rev | R | Name: Revision Compliance | + | | | Addr: SFF-8636 / 00h / 1 | + | | | Desc: Indicates which revision of SFF-8472 the | + | | | transceiver complies with. | + --------------------------------------------------------------------------- + | connector | R | Name: Connector | + | | | Addr: SFF-8636 / 00h / 130 | + | | | Desc: Type of connector | + --------------------------------------------------------------------------- + | id | R | Name: Identifier | + | | | Addr: SFF-8636 / 00h / 0 & 128 | + | | | Desc: Type of transceiver | + --------------------------------------------------------------------------- + | if_lane | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Type of transceiver | + --------------------------------------------------------------------------- + | if_type | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Provide if_type info for BCM and apps. | + --------------------------------------------------------------------------- + | if_speed | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Provide if_speed info for BCM and apps. | + --------------------------------------------------------------------------- + | info | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Provide detail transceiver and cable type | + | | | for BCM and apps. | + --------------------------------------------------------------------------- + | len_smf | R | Name: Length (single mode)-km | + | | | Addr: SFF-8636 / 00h / 142 | + | | | Desc: Link length supported for SMF fiber in km | + | | | units of KM. | + --------------------------------------------------------------------------- + | len_om1 | R | Name: Length (62.5um, OM1) | + | | | Addr: SFF-8636 / 00h / 145 | + | | | Desc: Link length supported for OM1 [200 MHz*km | + | | | at 850nm, 500 MHz*km at 1310nm] fiber. | + | | | units of 1 m. | + --------------------------------------------------------------------------- + | len_om2 | R | Name: Length (50um, OM2) | + | | | Addr: SFF-8636 / 00h / 144 | + | | | Desc: Link length supported for OM2 [500MHz*km | + | | | at 850nm] fiber. | + | | | units of 1 m. | + --------------------------------------------------------------------------- + | len_om3 | R | Name: Length (50um, OM3) | + | | | Addr: SFF-8636 / 00h / 143 | + | | | Desc: Link length supported for OM3 [2000 | + | | | MHz*km] fiber | + | | | units of 2m. | + --------------------------------------------------------------------------- + | len_om4 | R | Name: Length (50um, OM4) and Length (Active | + | | | Cable or Copper) | + | | | Addr: SFF-8636 / 00h / 146 | + | | | Desc: Length of passive or active cable assembly| + | | | (units of 1 m) or link length supported | + | | | for OM4 50/125 um fiber (units of 2m) as | + | | | indicated by Byte 147. See 6.3.12. | + --------------------------------------------------------------------------- + | lpmod | R/W | Name: IO Expander lpmod pin | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Please reference SFF-8438 LPMode. | + | | | 1 is Low power mode | + | | | 0 is High power mode | + --------------------------------------------------------------------------- + | modsel | R/W | Name: IO Expander modsel pin | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Please reference SFF-8438 ModSelL. | + | | | The ModSelL is an input pin. When held | + | | | low by the host, the module responds to | + | | | 2-wire serial communication commands. | + --------------------------------------------------------------------------- + | power_cls | R | Name: Thrasceiver Power Class | + | | | Addr: SFF-8636 / 00h / 129 Bit 0-1, 6-7 | + | | | Desc: Class-1 (1.5W) ~ Class-7 (5W) | + --------------------------------------------------------------------------- + | present | R | Name: IO Expander present pin | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Show transceiver exist or not | + --------------------------------------------------------------------------- + | reset | R/W | Name: IO Expander reset pin | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Please reference SFF-8438 ResetL. | + --------------------------------------------------------------------------- + | rx_power | R | Name: RX Power MSB & LSB | + | | | Addr: SFF-8636 / 00h / 34-41 | + | | | Desc: Measured RX input power. Range:0-6.5 mW | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + --------------------------------------------------------------------------- + | soft_rx_los | R | Name: Receiver Loss of Signal (Trnasceiver | + | | | internal) | + | | | Addr: SFF-8636 / 00h / 3 | + | | | Desc: Latched RX LOS indicator. | + | | | Byte 3, Bit 0-3 mapping to channel 1-4 | + --------------------------------------------------------------------------- + | soft_tx_disable | R/W | Name: TX Disable (Trnasceiver internal) | + | | | Addr: SFF-8636 / 00h / 86 | + | | | Desc: Bit 0-3 mapping to channel 1-4 | + --------------------------------------------------------------------------- + | soft_tx_fault | R | Name: TX Fault (Trnasceiver internal) | + | | | Addr: SFF-8636 / 00h / 3 | + | | | Desc: Bit 0-3 mapping to channel 1-4 | + --------------------------------------------------------------------------- + | temperature | R | Name: Temperature MSB & LSB | + | | | Addr: SFF-8636 / 00h / 22-23 | + | | | Desc: Internally measured module temperature. | + | | | Range of -128 ~ +128 (Degrees C) | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + --------------------------------------------------------------------------- + | tx_bias | R | Name: TX Bias MSB & LSB | + | | | Addr: SFF-8636 / 00h / 42-49 | + | | | Desc: Measured transmitter laser bias current. | + | | | Range of 0 to 131 mA. | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + --------------------------------------------------------------------------- + | tx_power | R | Name: TX Power MSB & LSB | + | | | Addr: SFF-8636 / 00h / 50-57 | + | | | Desc: Measured TX output power. | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + --------------------------------------------------------------------------- + | vendor_name | R | Name: Vendor name | + | | | Addr: SFF-8636 / 00h / 148-163 | + | | | Desc: SFP vendor name (ASCII) | + --------------------------------------------------------------------------- + | vendor_pn | R | Name: Vendor PN | + | | | Addr: SFF-8636 / 00h / 168-183 | + | | | Desc: Part number provided by SFP vendor (ASCII)| + --------------------------------------------------------------------------- + | vendor_rev | R | Name: Vendor rev | + | | | Addr: SFF-8636 / 00h / 184-185 | + | | | Desc: Revision level for part number provided | + | | | by vendor (ASCII) | + --------------------------------------------------------------------------- + | vendor_sn | R | Name: Vendor SN | + | | | Addr: SFF-8636 / 00h / 196-211 | + | | | Desc: Serial number provided by vendor (ASCII) | + --------------------------------------------------------------------------- + | voltage | R | Name: Vcc MSB & LSB | + | | | Addr: SFF-8636 / 00h / 26-27 | + | | | Desc: Internally measured supply voltage in | + | | | transceiver. | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + --------------------------------------------------------------------------- + | wavelength | R | Name: Wavelength or Copper Cable Attenuation | + | | | Addr: SFF-8636 / A0h / 186-187 | + | | | Desc: Nominal laser wavelength (wavelength = | + | | | value/20 in nm) or copper cable attenuation in | + | | | dB at 2.5 GHz (Byte 186) and 5.0GHz (Byte 187) | + --------------------------------------------------------------------------- + => Note: Some atributes are depend on Hardware (Platform) type. + + 2.4 SWPS Module Control and Information Interface: + => /sys/class/swps/module + |-- platform + |-- version + `-- reset_swps + + => ----------------------------------------------------------------------- + | Attribute | | Description | + ----------------------------------------------------------------------- + | platform | R | Name: Inventec platform name | + | | | Desc: Provide platform type which SWPS is | + | | | running. | + ----------------------------------------------------------------------- + | version | R | Name: SWPS version | + | | | Desc: Provide SWPS version information. | + ----------------------------------------------------------------------- + | reset_swps | W | Name: SWPS reset interface | + | | | Desc: This interface can trigger SWPS driver to | + | | | re-initial. You should write the correct | + | | | password to this interface, then SWPS | + | | | will re-initial. | + ----------------------------------------------------------------------- + + 2.5 Automatic Event Handling (POLLING_MODE Only) + => When SWPS running on "POLLING_MODE", it will automatic handle event of + user plug/remove/swap transceiver. The descriptions for handling actions + as below: + ======================================================================== + | Event | Handling Actions | + ======================================================================== + | Plug transceiver | 1. Detect and verify. | + | | 2. Adjust system settings (Ex: LP/HP mode) | + | | 3. Setup transceiver functions (Ex: CDR) | + | | 4. Log plug-transceiver event and transceiver | + | | information. | + | | 5. Send uevent to notify userspace. | + ------------------------------------------------------------------------ + | Swap transceiver | 1. Detect and verify. | + | | 2. Renew sysfs interface and internal handling | + | | mechanism. | + | | 3. Log swap-transceiver event and transceiver | + | | information. | + | | 4. Adjust system settings (Ex: LP/HP mode) | + | | 5. Setup transceiver functions (Ex: CDR) | + | | 6. Send uevent to notify userspace. | + ------------------------------------------------------------------------ + | Remove tramsceiver | 1. Log remove-transceiver event. | + | | 2. Send uevent to notify userspace. | + ------------------------------------------------------------------------ + + 2.6 Automatic Power Mode Handling (POLLING_MODE Only) + => When SWPS under "POLLING_MODE", it will detect transceiver power class + then adjust power mode to fit requirement automatically. + The handle rule as below: + ======================================================================== + | Transceiver Power Class | System Power Mode | + ======================================================================== + | Power Class 1 | Low power mode | + ------------------------------------------------------------------------ + | Power Class 2 ~ 7 | High power mode | + ------------------------------------------------------------------------ + + 2.7 Automatic Transceiver Setup (POLLING_MODE Only) + => SWPS will automatic setup pre-define configurations to transceiver when + user plug it. + The pre-define configuration list as below: + ======================================================================== + | Transceiver Type | Pre-define Configuration | + ======================================================================== + | SFP multi-Rate | Dynamic detect and setup transceiver mode | + | | to fit system settings. | + ------------------------------------------------------------------------ + | SFP 1G copper | Dynamic detect and sync up external phy | + | | state. (Need additional user-space app) | | + ------------------------------------------------------------------------ + | QSFP | Dynamic detect and setup power mode. | + ------------------------------------------------------------------------ + | QSFP | Dynamic detect and Setup BCM interface | + | | configurations (Need additional user-space | + | | app) | + ------------------------------------------------------------------------ + | QSFP28-100G | Dynamic detect and CDR enable. | + ------------------------------------------------------------------------ + + 2.8 Transceiver Information Dumper (POLLING_MODE only) + => SWPS driver can dump the transceiver information when it detect user plug + transceiver event, then keeps log data in syslog. + The dump items and example as below: + => Log example: + [SWPS] Dump transceiver information: port52 + => :QSFP+ + => :FINISAR CORP. + => :FTL4C1QE1C + => :A1 + => :UT80G0V + => :Class_4 + => :0x67 + => :0 + => :0 + => :0x00 + + 2.9 Event Notification (POLLING_MODE only) + => SWPS supports Linux uevent mechanism. SWPS will send uevent to notify userspace + when it detect user plug or remove the transceiver. Userspace app can leverage + this feature to know event occurs, and implement additional handle features. + + => Currently, SWPS support two type of uevent transceiver "ADD" and transceiver + "REMOVE". The uevent massage example as below: + + => Example: "ADD" uevent message + add@/devices/virtual/swps/port48 + ACTION=add + DEVPATH=/devices/virtual/swps/port48 + SUBSYSTEM=swps + IF_TYPE=SR4 + IF_SPEED=100000 + IF_LANE=81,82,83,84 + MAJOR=250 + MINOR=48 + DEVNAME=port48 + SEQNUM=4881 + + => Example: "REMOVE" uevent message + remove@/devices/virtual/swps/port48 + ACTION=remove + DEVPATH=/devices/virtual/swps/port48 + SUBSYSTEM=swps + IF_TYPE=UNKNOW + IF_SPEED=UNKNOW + IF_LANE=81,82,83,84 + MAJOR=250 + MINOR=48 + DEVNAME=port48 + SEQNUM=4880 + + 2.10 Automatic Rate Select Handling (POLLING_MODE Only) + => SWPS support automatic rate select handling for muti-rate mode transceiver. It + will automatic enable and setup transceiver Rate_Select function when it detect + multi-rate transceiver been plugged in. The support list as below: + ======================================================================== + | Rate ID | Type | Spec | Description | + ======================================================================== + | 0x02 | SFP | SFF-8431 | SFF-8431 (8/4/2G Rx Rate_Select only) | + ------------------------------------------------------------------------ + | 0x04 | SFP | SFF-8431 | SFF-8431 (8/4/2G Tx Rate_Select only) | + ------------------------------------------------------------------------ + | 0x06 | SFP | SFF-8431 | SFF-8431 (8/4/2G Independent Rx & | + | | | | Tx Rate_select) | + ------------------------------------------------------------------------ + + 2.11 Automatic handle mechansim for I2C topology. + => SWAPS responsible to monitor the status of I2C topology. It will trigger recover + mechanism when it detect the I2C crash event. The recover procedure as below: + (1) SWPS detect I2C crash event + (2) Reset I2C topology. + (3) Find out the root cause port and isolate it. + + +3. NOTE + + 3.1 Supported Platform and Transceiver: + => ======================================================================== + | Platform | Supported Transceiver | + ======================================================================== + | Magnolia | Port 1~48: SFP, SFP+ | + | | Port 49~54: QSFP, QSFP+ | + ------------------------------------------------------------------------ + | Redwood_x86 | Port 1~32: QSFP, QSFP+, QSFP28 | + ------------------------------------------------------------------------ + | Hudson_32i | Port 1~32: QSFP, QSFP+ | + ------------------------------------------------------------------------ + | Spruce | Port 49~54: QSFP, QSFP+ | + ------------------------------------------------------------------------ + | Cypress | Port 1~48: SFP, SFP+, SFP28 | + | | Port 49~54: QSFP, QSFP+, QSFP28 | + ------------------------------------------------------------------------ + + 3.2 Adjust Running Mode + => You can select POLLING_MODE or NON_POLLING_MODE via modify SWP_POLLING_ENABLE + variable which is in inv_swps.h as below: + #define SWP_POLLING_ENABLE (0) /* NON_POLLING_ENABLE */ + #define SWP_POLLING_ENABLE (1) /* POLLING_ENABLE */ + + 3.3 Adjust Platform Type + => You should configure the correct platform type to PLATFORM_SETTINGS variable + which is in inv_swps.h. The following example is Redwood's configuration. + #define PLATFORM_SETTINGS PLATFORM_TYPE_REDWOOD + + +4. CHANGE LOG + ------------------------------------------------------------------------ + * Version: 4.3.1 + * Date : 2018/07/20 + * Bug Fixed:: + 1. Repease procedure and reference count issues. + * New Feature: + 1. Supported new platform: Peony-SFP, Peony-Copper. + 2. Supported SKU auto-detect for Peony. + 3. Supported I2C topology reset via CPLD. + 4. Supported I2C topology handling for RANGELEY platform. + 5. Solved defect of i2c-gpio return abnormal value when I2C crash. + ------------------------------------------------------------------------ + * Version: 4.2.10 + * Date : 2018/06/26 + * New Feature: + 1. Support new platform: Gulmohar. + ------------------------------------------------------------------------ + * Version: 4.2.9 + * Date : 2018/01/19 + * New Feature: + 1. Support new platform: Maple. + ------------------------------------------------------------------------ + * Version: 4.2.8 + * Date : 2018/01/12 + * New Feature: + 1. Support new platform: Cottonwood. + ------------------------------------------------------------------------ + * Version: 4.2.7 + * Date : 2017/11/07 + * New Feature: + 1. New sysfs interface for SFP port: + > extphy_offset, extphy_reg + ------------------------------------------------------------------------ + * Version: 4.2.6 + * Date : 2017/10/25 + * New Feature: + 1. Support new platform: Lavender. + ------------------------------------------------------------------------ + * Version: 4.2.5 + * Date : 2017/10/17 + * Bug Fixed:: + 1. Bug 2647: [Magnolia][Drivers]Sysfs write 0 to tx_enable fail for + ports 29-32. It works for other ports + ------------------------------------------------------------------------ + * Version: 4.2.4 + * Date : 2017/09/06 + * New Feature: + 1. Support new platform: Tahoe, Sequoia. + ------------------------------------------------------------------------ + * Version: 4.2.3 + * Date : 2017/05/31 + * Update: + 1. Cache mode for read vendor relate attributes + ------------------------------------------------------------------------ + * Version: 4.2.2 + * Date : 2017/05/05 + * Update: + 1. I2C topology handle mechanism + - Support all platform: Cypress, Magnolia, Redwood, Spruce, Hudson32i. + + ------------------------------------------------------------------------ + * Version: 4.2.1 + * Date : 2017/04/27 + * Update: + 1. Remove transceiver EQ handle mechanism. + + ------------------------------------------------------------------------ + * Version: 4.0.5 + * Date : 2017/03/27 + * New Feature: + 1. Dynamic adjust transceiver EQ and relate tuning value. + 2. Support all transceiver and AOC of Baidu AVL List-1 & 2. + 3. Auto handling mechanism for tx_disable state. + + * Bug Fixed: + 1. Bug 2271: Transceiver timing issues for QSFP auto tx disable mechanism + ------------------------------------------------------------------------ + * Version: 4.0 + * Date : 2016/11/28 + * New Feature: + 1. I2C topology handle mechanism + - Support platform type: Cypress. + 2. SysFS interface: reset_i2c + + * Update: + 1. Enhance fault tolerance features for transceiver relate issues. + 2. Enhance state machine. + + * Bug Fixed: + 1. I2C relate bugs + ------------------------------------------------------------------------ + * Version: 3.2 + * Date : 2016/09/23 + * New Feature: + 1. Sysfs interface: + > SFP port : + comp_extend + > QSFP port: + soft_rx_los, soft_tx_disable, soft_tx_fault + 2. Support platform type: Redwood FSL, Cypress INV, Cypress Baidu, Magnolia FNC. + 3. Support Linux kernel version 3.10.x ~ 3.16.x + 4. Fault tolerance features for I2C relate issues. + + * Update: + 1. Enhance fault tolerance features for transceiver relate issues. + 2. Enhance state machine. + 3. Modify checking policy of SWPS initial procedure. + > This version, SWPS won't stop initial procedure if user inserted the INVALID + transceiver before bootup switch. + + * Bug Fixed: + 1. Bug 1905 - [Magnolia]When plug in 1G copper SFP, console displays + "i2c_smbus_read_byte_data fail" continuously + ------------------------------------------------------------------------ + * Version: 3.1 + * Date : 2016/06/20 + * New Feature: + 1. Sysfs interface: + > SFP port : + if_lane, len_sm, len_smf, len_om1, len_om2, len_om3, len_om4, + comp_eth, comp_eth_10, ext_id, wavelength, connector + > QSFP port: + if_lane, temperature, voltage, tx_bias, tx_power, rx_power, + len_smf, len_om1, len_om2, len_om3, len_om4, comp_eth, comp_eth_10_40, + ext_id, wavelength, connector + 2. Provide physical port to lane id mapping information. + 3. IO Expander polling retry and handle mechanism for case of i2c smbus unstable. + 4. Provide infomation for iCOS and SWPS user space daemon. + + * Update: + 1. Add new attribute in uevent: + - IF_LANE: Physical port to Lane id information. + 2. Interface rename: + - rev_comp => comp_rev + - len_50um => len_om2 + - len_62_5um => len_om1 + + * Bug Fixed: + 1. None + ------------------------------------------------------------------------ + * Version: 3.0 + * Date : 2016/05/19 + * New Feature: + 1. Sysfs interface: platform, version, reset_swps, info, if_type, + if_speed. + 2. Transceiver and cable identify mechanism. + - QSFP identify features: + > 10G optical: SR, LR, LRM + > 10G copper, DAC + > 40G optical: LR4, SR4, CR4, Active cable, ER4, PSM4 + > 40G copper, DAC + > 100G optical : SR4, LR4, ER4, SR10, CWDM4, PSM4, CLR4 + > 100G copper: ACC, CR4, DAC + - SFP identify features: + > 1G optical: SX, LX, + > 1G copper, CX, BaseT + > 10G optical: SR, LR, LRM, ER, AOC + > 10G copper, DAC + > 25G optical : SR, LR, ER, AOC, + > 25G copper: ACC, CR, + - Connector identify feature: + > LC + > Optical pigtail + > Copper pigtail, + > MPO 1x12 + > MPO 2x16 + > No separable connector + 3. Link state monitor mechanism for RJ-45 transceiver. + + * Update: + 1. Add new attribute in uevent: + - IF_TYPE : BCM interface type. (By chipset) + - IF_SPEED: Transceiver speed information. + 2. Enhance SWPS long-tern task handling. + + * Bug Fixed: + 1. Bug 928 - [Magnolia DVT][Port]Port status display incorrect on 1G + speed mode when plug in "Finisar" and "Delta" copper SFP. + 2. Bug 1133 - [Magnolia DVT][Port]Port status display incorrect on 1G + speed mode when plug in "AVAGO" 1G copper SFP. + 3. Bug 1519 - [Redwood DVT2] [Port mode] DAC cable could not link up on + Redwood 3.2.1.1 + ------------------------------------------------------------------------ + * Version: 2.5 + * Date : 2016/04/06 + * New Feature: + 1. Sysfs interface: temperature, voltage, tx_bias, tx_power, rx_power + 2. Automatic Rate Select handling: + 2.1 SFF-8431 (8/4/2G Rx Rate_Select only) + 2.2 SFF-8431 (8/4/2G Tx Rate_Select only) + 2.3 SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) + * Update: + 1. None + * Bug Fixed: + 1. Bug 1076 - [Magnolia DVT][Transceiver]Finisar FTLX8571D3BCV 1G/10G + Dual-Rate SFP+ transceiver can't link up on 10G mode. + ------------------------------------------------------------------------ + * Version: 2.4 + * Date : 2016/03/30 + * New Feature: + 1. Support platform type: Cypress. + 2. Support transceiver type: SFP28. + 3. Sysfs interface: rate_id, soft_rs0, soft_rs1, hard_rs0, hard_rs1 + * Update: + 1. None + * Bug Fixed: + 1. None + ------------------------------------------------------------------------ + * Version: 2.3 + * Date : 2016/03/14 + * New Feature: + 1. Support platform type: Spruce. + * Update: + 1. None + * Bug Fixed: + 1. None + ------------------------------------------------------------------------ + * Version: 2.2 + * Date : 2016/03/03 + * New Feature: + 1. Support platform type: Hudson32i. + 2. Transceiver Information Dumper. + * Update: + 1. Enhance automatic power mode handling: + => Support special transceiver power_class format (Class 5-7) which + is not following Finisar. + * Bug Fixed: + 1. Bug-1438: [Redwood] [Transceiver] 100G LR4 transceiver can not + link up on Redwood + ------------------------------------------------------------------------ + * Version: 2.1 + * Date : 2016/01/29 + * New Feature: + 1. Event Notification. + 2. Add sysfs interface attribute: power_cls + * Update: + 1. Enhance automatic power mode handling: + => Dynamic power mode control. + => Protect mechanism (delay 0.6 sec to pull high). + * Bug Fixed: + 1. None + ------------------------------------------------------------------------ + * Version: 2.0 + * Date : 2016/01/22 + * New Feature: + 1. Support platform type: Redwood. + 2. Support transceiver type: QSFP28. + 3. Automatic event handling. + 4. Automatic power mode handling. + 5. Automatic transceiver setup. + 6. Add sysfs interface attribute: cdr. + * Update: + 1. None + * Bug Fixed: + 1. Bug-1279: [Magnolia DVT][Transceiver]Finisar LR4 can't link up on + ICOS and BCM mode. + ------------------------------------------------------------------------ + * Version: 1.0 + * Date : 2015/11/24 + * New Feature: + 1. Sysfs interface. + 2. Support platform type: Magnolia. + 3. Support transceiver type: SFP, SFP+, QSFP, QSFP+. + * Update: + 1. None + * Bug Fixed: + 1. None + ------------------------------------------------------------------------ + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/gpio-ich.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/gpio-ich.c new file mode 100644 index 00000000000..687834e3c56 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/gpio-ich.c @@ -0,0 +1,513 @@ +/* + * Intel ICH6-10, Series 5 and 6, Atom C2000 (Avoton/Rangeley) GPIO driver + * + * Copyright (C) 2010 Extreme Engineering Solutions. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "gpio_ich" + +/* + * GPIO register offsets in GPIO I/O space. + * Each chunk of 32 GPIOs is manipulated via its own USE_SELx, IO_SELx, and + * LVLx registers. Logic in the read/write functions takes a register and + * an absolute bit number and determines the proper register offset and bit + * number in that register. For example, to read the value of GPIO bit 50 + * the code would access offset ichx_regs[2(=GPIO_LVL)][1(=50/32)], + * bit 18 (50%32). + */ +enum GPIO_REG { + GPIO_USE_SEL = 0, + GPIO_IO_SEL, + GPIO_LVL, + GPO_BLINK +}; + +static const u8 ichx_regs[4][3] = { + {0x00, 0x30, 0x40}, /* USE_SEL[1-3] offsets */ + {0x04, 0x34, 0x44}, /* IO_SEL[1-3] offsets */ + {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */ + {0x18, 0x18, 0x18}, /* BLINK offset */ +}; + +static const u8 ichx_reglen[3] = { + 0x30, 0x10, 0x10, +}; + +static const u8 avoton_regs[4][3] = { + {0x00, 0x80, 0x00}, + {0x04, 0x84, 0x00}, + {0x08, 0x88, 0x00}, +}; + +static const u8 avoton_reglen[3] = { + 0x10, 0x10, 0x00, +}; + +#define ICHX_WRITE(val, reg, base_res) outl(val, (reg) + (base_res)->start) +#define ICHX_READ(reg, base_res) inl((reg) + (base_res)->start) + +struct ichx_desc { + /* Max GPIO pins the chipset can have */ + uint ngpio; + + /* chipset registers */ + const u8 (*regs)[3]; + const u8 *reglen; + + /* GPO_BLINK is available on this chipset */ + bool have_blink; + + /* Whether the chipset has GPIO in GPE0_STS in the PM IO region */ + bool uses_gpe0; + + /* USE_SEL is bogus on some chipsets, eg 3100 */ + u32 use_sel_ignore[3]; + + /* Some chipsets have quirks, let these use their own request/get */ + int (*request)(struct gpio_chip *chip, unsigned offset); + int (*get)(struct gpio_chip *chip, unsigned offset); + + /* + * Some chipsets don't let reading output values on GPIO_LVL register + * this option allows driver caching written output values + */ + bool use_outlvl_cache; +}; + +static struct { + spinlock_t lock; + struct platform_device *dev; + struct gpio_chip chip; + struct resource *gpio_base; /* GPIO IO base */ + struct resource *pm_base; /* Power Mangagment IO base */ + struct ichx_desc *desc; /* Pointer to chipset-specific description */ + u32 orig_gpio_ctrl; /* Orig CTRL value, used to restore on exit */ + u8 use_gpio; /* Which GPIO groups are usable */ + int outlvl_cache[3]; /* cached output values */ +} ichx_priv; + +static int modparam_gpiobase = 0; /* dynamic */ +module_param_named(gpiobase, modparam_gpiobase, int, 0444); +MODULE_PARM_DESC(gpiobase, "The GPIO number base. -1 means dynamic, " + "which is the default."); + +static int ichx_write_bit(int reg, unsigned nr, int val, int verify) +{ + unsigned long flags; + u32 data, tmp; + int reg_nr = nr / 32; + int bit = nr & 0x1f; + int ret = 0; + + spin_lock_irqsave(&ichx_priv.lock, flags); + + if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) + data = ichx_priv.outlvl_cache[reg_nr]; + else + data = ICHX_READ(ichx_priv.desc->regs[reg][reg_nr], + ichx_priv.gpio_base); + + if (val) + data |= 1 << bit; + else + data &= ~(1 << bit); + ICHX_WRITE(data, ichx_priv.desc->regs[reg][reg_nr], + ichx_priv.gpio_base); + if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) + ichx_priv.outlvl_cache[reg_nr] = data; + + tmp = ICHX_READ(ichx_priv.desc->regs[reg][reg_nr], + ichx_priv.gpio_base); + if (verify && data != tmp) + ret = -EPERM; + + spin_unlock_irqrestore(&ichx_priv.lock, flags); + + return ret; +} + +static int ichx_read_bit(int reg, unsigned nr) +{ + unsigned long flags; + u32 data; + int reg_nr = nr / 32; + int bit = nr & 0x1f; + + spin_lock_irqsave(&ichx_priv.lock, flags); + + data = ICHX_READ(ichx_priv.desc->regs[reg][reg_nr], + ichx_priv.gpio_base); + + if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) + data = ichx_priv.outlvl_cache[reg_nr] | data; + + spin_unlock_irqrestore(&ichx_priv.lock, flags); + + return data & (1 << bit) ? 1 : 0; +} + +static bool ichx_gpio_check_available(struct gpio_chip *gpio, unsigned nr) +{ + return !!(ichx_priv.use_gpio & (1 << (nr / 32))); +} + +static int ichx_gpio_get_direction(struct gpio_chip *gpio, unsigned nr) +{ + return ichx_read_bit(GPIO_IO_SEL, nr) ? GPIOF_DIR_IN : GPIOF_DIR_OUT; +} + +static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) +{ + /* + * Try setting pin as an input and verify it worked since many pins + * are output-only. + */ + if (ichx_write_bit(GPIO_IO_SEL, nr, 1, 1)) + return -EINVAL; + + return 0; +} + +static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, + int val) +{ + /* Disable blink hardware which is available for GPIOs from 0 to 31. */ + if (nr < 32 && ichx_priv.desc->have_blink) + ichx_write_bit(GPO_BLINK, nr, 0, 0); + + /* Set GPIO output value. */ + ichx_write_bit(GPIO_LVL, nr, val, 0); + + /* + * Try setting pin as an output and verify it worked since many pins + * are input-only. + */ + if (ichx_write_bit(GPIO_IO_SEL, nr, 0, 1)) + return -EINVAL; + + return 0; +} + +static int ichx_gpio_get(struct gpio_chip *chip, unsigned nr) +{ + return ichx_read_bit(GPIO_LVL, nr); +} + +static int ich6_gpio_get(struct gpio_chip *chip, unsigned nr) +{ + unsigned long flags; + u32 data; + + /* + * GPI 0 - 15 need to be read from the power management registers on + * a ICH6/3100 bridge. + */ + if (nr < 16) { + if (!ichx_priv.pm_base) + return -ENXIO; + + spin_lock_irqsave(&ichx_priv.lock, flags); + + /* GPI 0 - 15 are latched, write 1 to clear*/ + ICHX_WRITE(1 << (16 + nr), 0, ichx_priv.pm_base); + data = ICHX_READ(0, ichx_priv.pm_base); + + spin_unlock_irqrestore(&ichx_priv.lock, flags); + + return (data >> 16) & (1 << nr) ? 1 : 0; + } else { + return ichx_gpio_get(chip, nr); + } +} + +static int ichx_gpio_request(struct gpio_chip *chip, unsigned nr) +{ + if (!ichx_gpio_check_available(chip, nr)) + return -ENXIO; + + /* + * Note we assume the BIOS properly set a bridge's USE value. Some + * chips (eg Intel 3100) have bogus USE values though, so first see if + * the chipset's USE value can be trusted for this specific bit. + * If it can't be trusted, assume that the pin can be used as a GPIO. + */ + if (ichx_priv.desc->use_sel_ignore[nr / 32] & (1 << (nr & 0x1f))) + return 0; + + return ichx_read_bit(GPIO_USE_SEL, nr) ? 0 : -ENODEV; +} + +static int ich6_gpio_request(struct gpio_chip *chip, unsigned nr) +{ + /* + * Fixups for bits 16 and 17 are necessary on the Intel ICH6/3100 + * bridge as they are controlled by USE register bits 0 and 1. See + * "Table 704 GPIO_USE_SEL1 register" in the i3100 datasheet for + * additional info. + */ + if (nr == 16 || nr == 17) + nr -= 16; + + return ichx_gpio_request(chip, nr); +} + +static void ichx_gpio_set(struct gpio_chip *chip, unsigned nr, int val) +{ + ichx_write_bit(GPIO_LVL, nr, val, 0); +} + +static void ichx_gpiolib_setup(struct gpio_chip *chip) +{ + chip->owner = THIS_MODULE; + chip->label = DRV_NAME; + chip->parent = &ichx_priv.dev->dev; + + /* Allow chip-specific overrides of request()/get() */ + chip->request = ichx_priv.desc->request ? + ichx_priv.desc->request : ichx_gpio_request; + chip->get = ichx_priv.desc->get ? + ichx_priv.desc->get : ichx_gpio_get; + + chip->set = ichx_gpio_set; + chip->get_direction = ichx_gpio_get_direction; + chip->direction_input = ichx_gpio_direction_input; + chip->direction_output = ichx_gpio_direction_output; + chip->base = modparam_gpiobase; + chip->ngpio = ichx_priv.desc->ngpio; + chip->can_sleep = false; + chip->dbg_show = NULL; +} + +/* ICH6-based, 631xesb-based */ +static struct ichx_desc ich6_desc = { + /* Bridges using the ICH6 controller need fixups for GPIO 0 - 17 */ + .request = ich6_gpio_request, + .get = ich6_gpio_get, + + /* GPIO 0-15 are read in the GPE0_STS PM register */ + .uses_gpe0 = true, + + .ngpio = 50, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* Intel 3100 */ +static struct ichx_desc i3100_desc = { + /* + * Bits 16,17, 20 of USE_SEL and bit 16 of USE_SEL2 always read 0 on + * the Intel 3100. See "Table 712. GPIO Summary Table" of 3100 + * Datasheet for more info. + */ + .use_sel_ignore = {0x00130000, 0x00010000, 0x0}, + + /* The 3100 needs fixups for GPIO 0 - 17 */ + .request = ich6_gpio_request, + .get = ich6_gpio_get, + + /* GPIO 0-15 are read in the GPE0_STS PM register */ + .uses_gpe0 = true, + + .ngpio = 50, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* ICH7 and ICH8-based */ +static struct ichx_desc ich7_desc = { + .ngpio = 50, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* ICH9-based */ +static struct ichx_desc ich9_desc = { + .ngpio = 61, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* ICH10-based - Consumer/corporate versions have different amount of GPIO */ +static struct ichx_desc ich10_cons_desc = { + .ngpio = 61, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; +static struct ichx_desc ich10_corp_desc = { + .ngpio = 72, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* Intel 5 series, 6 series, 3400 series, and C200 series */ +static struct ichx_desc intel5_desc = { + .ngpio = 76, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* Avoton */ +static struct ichx_desc avoton_desc = { + /* Avoton has only 59 GPIOs, but we assume the first set of register + * (Core) has 32 instead of 31 to keep gpio-ich compliance + */ + .ngpio = 60, + .regs = avoton_regs, + .reglen = avoton_reglen, + .use_outlvl_cache = true, +}; + +static int ichx_gpio_request_regions(struct device *dev, + struct resource *res_base, const char *name, u8 use_gpio) +{ + int i; + + if (!res_base || !res_base->start || !res_base->end) + return -ENODEV; + + for (i = 0; i < ARRAY_SIZE(ichx_priv.desc->regs[0]); i++) { + if (!(use_gpio & (1 << i))) + continue; + if (!devm_request_region(dev, + res_base->start + ichx_priv.desc->regs[0][i], + ichx_priv.desc->reglen[i], name)) + return -EBUSY; + } + return 0; +} + +static int ichx_gpio_probe(struct platform_device *pdev) +{ + struct resource *res_base, *res_pm; + int err; + struct lpc_ich_info *ich_info = dev_get_platdata(&pdev->dev); + + if (!ich_info) + return -ENODEV; + + ichx_priv.dev = pdev; + + switch (ich_info->gpio_version) { + case ICH_I3100_GPIO: + ichx_priv.desc = &i3100_desc; + break; + case ICH_V5_GPIO: + ichx_priv.desc = &intel5_desc; + break; + case ICH_V6_GPIO: + ichx_priv.desc = &ich6_desc; + break; + case ICH_V7_GPIO: + ichx_priv.desc = &ich7_desc; + break; + case ICH_V9_GPIO: + ichx_priv.desc = &ich9_desc; + break; + case ICH_V10CORP_GPIO: + ichx_priv.desc = &ich10_corp_desc; + break; + case ICH_V10CONS_GPIO: + ichx_priv.desc = &ich10_cons_desc; + break; + case AVOTON_GPIO: + ichx_priv.desc = &avoton_desc; + break; + default: + return -ENODEV; + } + + spin_lock_init(&ichx_priv.lock); + res_base = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPIO); + ichx_priv.use_gpio = ich_info->use_gpio; + err = ichx_gpio_request_regions(&pdev->dev, res_base, pdev->name, + ichx_priv.use_gpio); + if (err) + return err; + + ichx_priv.gpio_base = res_base; + + /* + * If necessary, determine the I/O address of ACPI/power management + * registers which are needed to read the the GPE0 register for GPI pins + * 0 - 15 on some chipsets. + */ + if (!ichx_priv.desc->uses_gpe0) + goto init; + + res_pm = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPE0); + if (!res_pm) { + pr_warn("ACPI BAR is unavailable, GPI 0 - 15 unavailable\n"); + goto init; + } + + if (!devm_request_region(&pdev->dev, res_pm->start, + resource_size(res_pm), pdev->name)) { + pr_warn("ACPI BAR is busy, GPI 0 - 15 unavailable\n"); + goto init; + } + + ichx_priv.pm_base = res_pm; + +init: + ichx_gpiolib_setup(&ichx_priv.chip); + err = gpiochip_add_data(&ichx_priv.chip, NULL); + if (err) { + pr_err("Failed to register GPIOs\n"); + return err; + } + + pr_info("GPIO from %d to %d on %s\n", ichx_priv.chip.base, + ichx_priv.chip.base + ichx_priv.chip.ngpio - 1, DRV_NAME); + + return 0; +} + +static int ichx_gpio_remove(struct platform_device *pdev) +{ + gpiochip_remove(&ichx_priv.chip); + + return 0; +} + +static struct platform_driver ichx_gpio_driver = { + .driver = { + .name = DRV_NAME, + }, + .probe = ichx_gpio_probe, + .remove = ichx_gpio_remove, +}; + +module_platform_driver(ichx_gpio_driver); + +MODULE_AUTHOR("Peter Tyser "); +MODULE_DESCRIPTION("GPIO interface for Intel ICH series"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:"DRV_NAME); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/i2c-mux-pca9541.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/i2c-mux-pca9541.c new file mode 100644 index 00000000000..68c44dbc533 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/i2c-mux-pca9541.c @@ -0,0 +1,573 @@ +/* + * I2C multiplexer driver for PCA9541 bus master selector + * + * Copyright (c) 2010 Ericsson AB. + * + * Author: Guenter Roeck + * + * Derived from: + * pca954x.c + * + * Copyright (c) 2008-2009 Rodolfo Giometti + * Copyright (c) 2008-2009 Eurotech S.p.A. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +/* + * The PCA9541 is a bus master selector. It supports two I2C masters connected + * to a single slave bus. + * + * Before each bus transaction, a master has to acquire bus ownership. After the + * transaction is complete, bus ownership has to be released. This fits well + * into the I2C multiplexer framework, which provides select and release + * functions for this purpose. For this reason, this driver is modeled as + * single-channel I2C bus multiplexer. + * + * This driver assumes that the two bus masters are controlled by two different + * hosts. If a single host controls both masters, platform code has to ensure + * that only one of the masters is instantiated at any given time. + */ + +#define PCA9541_CONTROL 0x01 +#define PCA9541_ISTAT 0x02 + +#define PCA9541_CTL_MYBUS (1 << 0) +#define PCA9541_CTL_NMYBUS (1 << 1) +#define PCA9541_CTL_BUSON (1 << 2) +#define PCA9541_CTL_NBUSON (1 << 3) +#define PCA9541_CTL_BUSINIT (1 << 4) +#define PCA9541_CTL_TESTON (1 << 6) +#define PCA9541_CTL_NTESTON (1 << 7) + +#define PCA9541_ISTAT_INTIN (1 << 0) +#define PCA9541_ISTAT_BUSINIT (1 << 1) +#define PCA9541_ISTAT_BUSOK (1 << 2) +#define PCA9541_ISTAT_BUSLOST (1 << 3) +#define PCA9541_ISTAT_MYTEST (1 << 6) +#define PCA9541_ISTAT_NMYTEST (1 << 7) + +#define PCA9641_ID 0x00 +#define PCA9641_ID_MAGIC 0x38 + +#define PCA9641_CONTROL 0x01 +#define PCA9641_STATUS 0x02 +#define PCA9641_TIME 0x03 + +#define PCA9641_CTL_LOCK_REQ BIT(0) +#define PCA9641_CTL_LOCK_GRANT BIT(1) +#define PCA9641_CTL_BUS_CONNECT BIT(2) +#define PCA9641_CTL_BUS_INIT BIT(3) +#define PCA9641_CTL_SMBUS_SWRST BIT(4) +#define PCA9641_CTL_IDLE_TIMER_DIS BIT(5) +#define PCA9641_CTL_SMBUS_DIS BIT(6) +#define PCA9641_CTL_PRIORITY BIT(7) + +#define PCA9641_STS_OTHER_LOCK BIT(0) +#define PCA9641_STS_BUS_INIT_FAIL BIT(1) +#define PCA9641_STS_BUS_HUNG BIT(2) +#define PCA9641_STS_MBOX_EMPTY BIT(3) +#define PCA9641_STS_MBOX_FULL BIT(4) +#define PCA9641_STS_TEST_INT BIT(5) +#define PCA9641_STS_SCL_IO BIT(6) +#define PCA9641_STS_SDA_IO BIT(7) + +#define PCA9641_RES_TIME 0x03 + + +#define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON) +#define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS) +#define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS) +#define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON) + +#define BUSOFF(x, y) (!((x) & PCA9641_CTL_LOCK_GRANT) && \ + !((y) & PCA9641_STS_OTHER_LOCK)) +#define other_lock(x) ((x) & PCA9641_STS_OTHER_LOCK) +#define lock_grant(x) ((x) & PCA9641_CTL_LOCK_GRANT) + +/* arbitration timeouts, in jiffies */ +#define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */ +#define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */ + +/* arbitration retry delays, in us */ +#define SELECT_DELAY_SHORT 50 +#define SELECT_DELAY_LONG 1000 + +struct pca9541 { + struct i2c_client *client; + unsigned long select_timeout; + unsigned long arb_timeout; +}; + +static const struct i2c_device_id pca9541_id[] = { + {"pca9541", 0}, + {"pca9641", 1}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, pca9541_id); + +#ifdef CONFIG_OF +static const struct of_device_id pca9541_of_match[] = { + { .compatible = "nxp,pca9541" }, + { .compatible = "nxp,pca9641" }, + {} +}; +#endif + +/* + * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer() + * as they will try to lock the adapter a second time. + */ +static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val) +{ + struct i2c_adapter *adap = client->adapter; + int ret; + + if (adap->algo->master_xfer) { + struct i2c_msg msg; + char buf[2]; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = 2; + buf[0] = command; + buf[1] = val; + msg.buf = buf; + ret = __i2c_transfer(adap, &msg, 1); + } else { + union i2c_smbus_data data; + + data.byte = val; + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_WRITE, + command, + I2C_SMBUS_BYTE_DATA, &data); + } + + return ret; +} + +/* + * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer() + * as they will try to lock adapter a second time. + */ +static int pca9541_reg_read(struct i2c_client *client, u8 command) +{ + struct i2c_adapter *adap = client->adapter; + int ret; + u8 val; + + if (adap->algo->master_xfer) { + struct i2c_msg msg[2] = { + { + .addr = client->addr, + .flags = 0, + .len = 1, + .buf = &command + }, + { + .addr = client->addr, + .flags = I2C_M_RD, + .len = 1, + .buf = &val + } + }; + ret = __i2c_transfer(adap, msg, 2); + if (ret == 2) + ret = val; + else if (ret >= 0) + ret = -EIO; + } else { + union i2c_smbus_data data; + + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_READ, + command, + I2C_SMBUS_BYTE_DATA, &data); + if (!ret) + ret = data.byte; + } + return ret; +} + +/* + * Arbitration management functions + */ + +/* Release bus. Also reset NTESTON and BUSINIT if it was set. */ +static void pca9541_release_bus(struct i2c_client *client) +{ + int reg; + + reg = pca9541_reg_read(client, PCA9541_CONTROL); + if (reg >= 0 && !busoff(reg) && mybus(reg)) + pca9541_reg_write(client, PCA9541_CONTROL, + (reg & PCA9541_CTL_NBUSON) >> 1); +} + +/* + * Arbitration is defined as a two-step process. A bus master can only activate + * the slave bus if it owns it; otherwise it has to request ownership first. + * This multi-step process ensures that access contention is resolved + * gracefully. + * + * Bus Ownership Other master Action + * state requested access + * ---------------------------------------------------- + * off - yes wait for arbitration timeout or + * for other master to drop request + * off no no take ownership + * off yes no turn on bus + * on yes - done + * on no - wait for arbitration timeout or + * for other master to release bus + * + * The main contention point occurs if the slave bus is off and both masters + * request ownership at the same time. In this case, one master will turn on + * the slave bus, believing that it owns it. The other master will request + * bus ownership. Result is that the bus is turned on, and master which did + * _not_ own the slave bus before ends up owning it. + */ + +/* Control commands per PCA9541 datasheet */ +static const u8 pca9541_control[16] = { + 4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1 +}; + +/* + * Channel arbitration + * + * Return values: + * <0: error + * 0 : bus not acquired + * 1 : bus acquired + */ +static int pca9541_arbitrate(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca9541 *data = i2c_mux_priv(muxc); + int reg; + + reg = pca9541_reg_read(client, PCA9541_CONTROL); + if (reg < 0) + return reg; + + if (busoff(reg)) { + int istat; + /* + * Bus is off. Request ownership or turn it on unless + * other master requested ownership. + */ + istat = pca9541_reg_read(client, PCA9541_ISTAT); + if (!(istat & PCA9541_ISTAT_NMYTEST) + || time_is_before_eq_jiffies(data->arb_timeout)) { + /* + * Other master did not request ownership, + * or arbitration timeout expired. Take the bus. + */ + pca9541_reg_write(client, + PCA9541_CONTROL, + pca9541_control[reg & 0x0f] + | PCA9541_CTL_NTESTON); + data->select_timeout = SELECT_DELAY_SHORT; + } else { + /* + * Other master requested ownership. + * Set extra long timeout to give it time to acquire it. + */ + data->select_timeout = SELECT_DELAY_LONG * 2; + } + } else if (mybus(reg)) { + /* + * Bus is on, and we own it. We are done with acquisition. + * Reset NTESTON and BUSINIT, then return success. + */ + if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT)) + pca9541_reg_write(client, + PCA9541_CONTROL, + reg & ~(PCA9541_CTL_NTESTON + | PCA9541_CTL_BUSINIT)); + return 1; + } else { + /* + * Other master owns the bus. + * If arbitration timeout has expired, force ownership. + * Otherwise request it. + */ + data->select_timeout = SELECT_DELAY_LONG; + if (time_is_before_eq_jiffies(data->arb_timeout)) { + /* Time is up, take the bus and reset it. */ + pca9541_reg_write(client, + PCA9541_CONTROL, + pca9541_control[reg & 0x0f] + | PCA9541_CTL_BUSINIT + | PCA9541_CTL_NTESTON); + } else { + /* Request bus ownership if needed */ + if (!(reg & PCA9541_CTL_NTESTON)) + pca9541_reg_write(client, + PCA9541_CONTROL, + reg | PCA9541_CTL_NTESTON); + } + } + return 0; +} + +static int pca9541_select_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca9541 *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + int ret; + unsigned long timeout = jiffies + ARB2_TIMEOUT; + /* give up after this time */ + + data->arb_timeout = jiffies + ARB_TIMEOUT; + /* force bus ownership after this time */ + + do { + ret = pca9541_arbitrate(client); + if (ret) + return ret < 0 ? ret : 0; + + if (data->select_timeout == SELECT_DELAY_SHORT) + udelay(data->select_timeout); + else + msleep(data->select_timeout / 1000); + } while (time_is_after_eq_jiffies(timeout)); + + return -ETIMEDOUT; +} + +static int pca9541_release_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca9541 *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + + pca9541_release_bus(client); + return 0; +} + +/* + * Arbitration management functions + */ +static void pca9641_release_bus(struct i2c_client *client) +{ + pca9541_reg_write(client, PCA9641_CONTROL, 0); +} + +/* + * Channel arbitration + * + * Return values: + * <0: error + * 0 : bus not acquired + * 1 : bus acquired + */ +static int pca9641_arbitrate(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca9541 *data = i2c_mux_priv(muxc); + int reg_ctl, reg_sts; + + reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL); + if (reg_ctl < 0) + return reg_ctl; + reg_sts = pca9541_reg_read(client, PCA9641_STATUS); + + if (BUSOFF(reg_ctl, reg_sts)) { + /* + * Bus is off. Request ownership or turn it on unless + * other master requested ownership. + */ + reg_ctl |= PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL); + + if (lock_grant(reg_ctl)) { + /* + * Other master did not request ownership, + * or arbitration timeout expired. Take the bus. + */ + reg_ctl |= PCA9641_CTL_BUS_CONNECT + | PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + data->select_timeout = SELECT_DELAY_SHORT; + + return 1; + } else { + /* + * Other master requested ownership. + * Set extra long timeout to give it time to acquire it. + */ + data->select_timeout = SELECT_DELAY_LONG * 2; + } + } else if (lock_grant(reg_ctl)) { + /* + * Bus is on, and we own it. We are done with acquisition. + */ + reg_ctl |= PCA9641_CTL_BUS_CONNECT | PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + + return 1; + } else if (other_lock(reg_sts)) { + /* + * Other master owns the bus. + * If arbitration timeout has expired, force ownership. + * Otherwise request it. + */ + data->select_timeout = SELECT_DELAY_LONG; + reg_ctl |= PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + } + return 0; +} + +static int pca9641_select_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca9541 *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + int ret; + unsigned long timeout = jiffies + ARB2_TIMEOUT; + /* give up after this time */ + + data->arb_timeout = jiffies + ARB_TIMEOUT; + /* force bus ownership after this time */ + + do { + ret = pca9641_arbitrate(client); + if (ret) + return ret < 0 ? ret : 0; + + if (data->select_timeout == SELECT_DELAY_SHORT) + udelay(data->select_timeout); + else + msleep(data->select_timeout / 1000); + } while (time_is_after_eq_jiffies(timeout)); + + return -ETIMEDOUT; +} + +static int pca9641_release_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca9541 *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + + pca9641_release_bus(client); + return 0; +} + +static int pca9641_detect_id(struct i2c_client *client) +{ + int reg; + + reg = pca9541_reg_read(client, PCA9641_ID); + if (reg == PCA9641_ID_MAGIC) + return 1; + else + return 0; +} + +/* + * I2C init/probing/exit functions + */ +static int pca9541_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = client->adapter; + struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev); + struct i2c_mux_core *muxc; + struct pca9541 *data; + int force; + int ret; + int detect_id; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA)) + return -ENODEV; + + detect_id = pca9641_detect_id(client); + /* + * I2C accesses are unprotected here. + * We have to lock the adapter before releasing the bus. + */ + if (detect_id == 0) { + i2c_lock_adapter(adap); + pca9541_release_bus(client); + i2c_unlock_adapter(adap); + } else { + i2c_lock_adapter(adap); + pca9641_release_bus(client); + i2c_unlock_adapter(adap); + } + + /* Create mux adapter */ + + force = 0; + if (pdata) + force = pdata->modes[0].adap_id; + if (detect_id == 0) { + muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data), + I2C_MUX_ARBITRATOR, + pca9541_select_chan, pca9541_release_chan); + } else { + muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data), + I2C_MUX_ARBITRATOR, + pca9641_select_chan, pca9641_release_chan); + } + if (!muxc) + return -ENOMEM; + + data = i2c_mux_priv(muxc); + data->client = client; + + i2c_set_clientdata(client, muxc); + + ret = i2c_mux_add_adapter(muxc, force, 0, 0); + if (ret) { + dev_err(&client->dev, "failed to register master selector\n"); + return ret; + } + + dev_info(&client->dev, "registered master selector for I2C %s\n", + client->name); + + return 0; +} + +static int pca9541_remove(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + + i2c_mux_del_adapters(muxc); + return 0; +} + +static struct i2c_driver pca9541_driver = { + .driver = { + .name = "pca9541", + .of_match_table = of_match_ptr(pca9541_of_match), + }, + .probe = pca9541_probe, + .remove = pca9541_remove, + .id_table = pca9541_id, +}; + +module_i2c_driver(pca9541_driver); + +MODULE_AUTHOR("Guenter Roeck "); +MODULE_DESCRIPTION("PCA9541 I2C master selector driver"); +MODULE_LICENSE("GPL v2"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_cpld.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_cpld.c new file mode 100644 index 00000000000..8e2693d2e25 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_cpld.c @@ -0,0 +1,1011 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* definition */ +#define CPLD_INFO_OFFSET 0x00 +#define CPLD_BIOSCS_OFFSET 0x04 +#define CPLD_CTL_OFFSET 0x0C +#define CPLD_SYSLED_OFFSET 0x0E +#define CPLD_LED_OFFSET 0x2E +#define CPLD_INT_OFFSET 0x30 +#define CPLD_INTMASK_OFFSET 0x31 +#define CPLD_INT2_OFFSET 0x32 +#define CPLD_INTMASK2_OFFSET 0x33 +#define CPLD_PSU_OFFSET 0x40 +#define CPLD_POWERSTATUS_OFFSET 0x41 +#define CPLD_PWM_OFFSET 0x50 +#define CPLD_RPM_OFFSET 0x55 +#define CPLD_FANSTATUS_OFFSET 0x69 +#define CPLD_FANLED_OFFSET 0x6B +#define CPLD_RESETBUTTONSTATUS_OFFSET 0x75 +#define CPLD_RSTCAUSE_OFFSET 0x76 +#define CPLD_WATCHDOGCOUNTER_OFFSET 0x77 +#define CPLD_WATCHDOGCONFIG_OFFSET 0x78 +#define CPLD_WATCHDOGENABLE_OFFSET 0x79 +#define CPLD_PANICCODE_OFFSET 0x7E +#define CPLD2_ADDRESS 0x33 + +#define FAN_NUM 4 +static u8 hasCPLD2 = 1; +static struct i2c_client *client2; + +/* Each client has this additional data */ +struct cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; + u8 diag; + struct task_struct *tsk; +}; + +/*-----------------------------------------------------------------------*/ +static ssize_t cpld_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) +{ + int i; + s32 temp = 0; + + for(i=0; iuser_msg_data; + + if(recv_msg->msg.data[0]==0 && recv_msg->msg.data_len>0) { + msg_result->result_length=recv_msg->msg.data_len-1; + memcpy(msg_result->result, &recv_msg->msg.data[1], recv_msg->msg.data_len-1); + } + ipmi_free_recv_msg(recv_msg); + mutex_unlock(&ipmi_mutex); + + return; +} + +int start_ipmi_command(char NetFn, char cmd,char *data,int data_length, char* result, int* result_length) +{ + int rv=0,i; + int timeout; + + //wait previous command finish at least 50msec + timeout=50; + while((mutex_is_locked(&ipmi_mutex) == 1 || (mutex_is_locked(&ipmi2_mutex) == 1)) && (--timeout)>0) { usleep_range(1000,1010); } + if(timeout==0) { return -1; } + mutex_lock(&ipmi_mutex); + mutex_lock(&ipmi2_mutex); + + if(ipmi_mh_user == NULL) { + for (i=0,rv=1; i0) { usleep_range(1000,1100);} + if(timeout==0) { + mutex_unlock(&ipmi2_mutex); + return -1; + } + else { + *result_length=ipmiresult.result_length; + memcpy(result,ipmiresult.result,*result_length); + mutex_unlock(&ipmi2_mutex); + return 0; + } + } + return 0; +} +EXPORT_SYMBOL(start_ipmi_command); + +static int cpld_thread(void *p) +{ +#ifndef XORP + struct i2c_client *client = p; + + u8 byte[9]; + uint8_t result[MAX_IPMI_RECV_LENGTH]; + int result_len=0; + + //Handle LED control by the driver + byte[0]=0x01; + cpld_i2c_write(client, byte, CPLD_CTL_OFFSET, 1); + + //Disable BMC Watchdog + byte[0]=0x04; + byte[1]=0x00; + byte[2]=0x00; + byte[3]=0x00; + byte[4]=0x2C; + byte[5]=0x01; + start_ipmi_command(0x06, 0x24, byte, 6, result, &result_len); +#endif + return 0; +} +/*-----------------------------------------------------------------------*/ +/* sysfs attributes for hwmon */ +static ssize_t show_info(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + + u8 byte[4] = {0,0,0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, byte, CPLD_INFO_OFFSET, 4); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + sprintf (buf, "The CPLD release date is %02d/%02d/%d.\n", + byte[2] & 0xf, (byte[3] & 0x1f), 2014+(byte[2] >> 4)); /* mm/dd/yyyy*/ + sprintf (buf, "%sThe PCB version is %X\n", buf, byte[0]&0xf); + sprintf (buf, "%sThe CPLD version is %d.%d\n", buf, byte[1]>>4, byte[1]&0xf); + + if(hasCPLD2) { + mutex_lock(&data->update_lock); + cpld_i2c_read(client2, byte, CPLD_INFO_OFFSET, 4); + mutex_unlock(&data->update_lock); + + sprintf (buf, "%s\nThe CPLD2 release date is %02d/%02d/%d.\n", buf, + byte[2] & 0xf, (byte[3] & 0x1f), 2014+(byte[2] >> 4)); /* mm/dd/yyyy*/ + sprintf (buf, "%sThe CPLD2 version is %d.%d\n", buf, byte[1]>>4, byte[1]&0xf); + } + + return strlen(buf); +} + +static char* powerstatus_str[] = { + "Failed", //0 + "Good", //1 +}; + +static ssize_t show_powerstatus(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte[2] = {0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, byte, CPLD_POWERSTATUS_OFFSET, 2); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + sprintf (buf, "PGD_P5V_STBY: %s\n", powerstatus_str[(byte[0]>>7) & 0x01]); + sprintf (buf, "%sPGD_P3V3_STBY: %s\n", buf, powerstatus_str[(byte[0]>>6) & 0x01]);; + sprintf (buf, "%sPGD_P1V8_A: %s\n", buf, powerstatus_str[(byte[0]>>4) & 0x01]); + sprintf (buf, "%sPGD_P3V3_SYS: %s\n", buf, powerstatus_str[(byte[0]>>3) & 0x01]); + sprintf (buf, "%sPGD_P3V3_A: %s\n", buf, powerstatus_str[(byte[0]>>2) & 0x01]); + sprintf (buf, "%sPGD_P3V3_B: %s\n", buf, powerstatus_str[(byte[0]>>1) & 0x01]); + sprintf (buf, "%sPGD_P1V2: %s\n", buf, powerstatus_str[(byte[0]>>0) & 0x01]); + sprintf (buf, "%sPGD_P0V8_A: %s\n", buf,powerstatus_str[(byte[1]>>7) & 0x01]); + sprintf (buf, "%sPGD_P0V89_ROV: %s\n", buf, powerstatus_str[(byte[1]>>6) & 0x01]); + sprintf (buf, "%sSW_PWR_READY: %s\n", buf, powerstatus_str[(byte[1]>>3) & 0x01]); + sprintf (buf, "%sCPU_STBY_PWROK: %s\n", buf, powerstatus_str[(byte[1]>>0) & 0x01]); + + return strlen(buf); +} + +static ssize_t show_diag(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + uint8_t ipmisend[]= { IPMI_DIAGFLAG_OFFSET, 1}; + uint8_t result[MAX_IPMI_RECV_LENGTH]; + int result_len=0; + start_ipmi_command(NETFN_OEM, CMD_GETDATA,ipmisend, 2, result, &result_len); + data->diag = (result[0] & 0x80) !=0; + return sprintf (buf, "%d\n", data->diag); +} + +static ssize_t set_diag(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + uint8_t ipmisend[]= { IPMI_DIAGFLAG_OFFSET, 0x80}; + uint8_t result[MAX_IPMI_RECV_LENGTH]; + int result_len=0; + u8 diag = simple_strtol(buf, NULL, 10); + data->diag = diag?1:0; + if (data->diag==0) ipmisend[1] = 0x00; + + start_ipmi_command(NETFN_OEM, CMD_SETDATA,ipmisend, 2, result, &result_len); + + return count; +} + +static ssize_t show_thermal(struct device *dev, struct device_attribute *da, + char *buf) +{ + uint8_t ipmisend[]= { IPMI_SWITCHTEMP_OFFSET, 1}; + uint8_t result[MAX_IPMI_RECV_LENGTH]; + int result_len=0; + start_ipmi_command(NETFN_OEM, CMD_GETDATA,ipmisend, 2, result, &result_len); + return sprintf(buf, "%d\n", result[0] * 1000 ); +} + +static char* interrupt_str[] = { + "CPU_SEN_ALERT_N", //0 + "EXT_USB_OC_N", //1 + "", //2 + "", //3 + "PLD_SEN5_ALERT_N", //4 + "PLD_SEN4_ALERT_N", //5 + "PLD_SEN3_ALERT_N", //6 + "UCD90160_TEMP_INT_N", //7 + "RSTBTN_INT_N", //8 + "WDT_IRQ_N", //9 +}; + +static ssize_t show_interrupt(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte[4] = {0,0,0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, byte, CPLD_INT_OFFSET, 4); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + sprintf (buf, "0x%02X 0x%02X:", byte[0],byte[2]); + if(byte[0]==0xff && byte[2]==0x07) sprintf (buf, "%sNone",buf); + if(!(byte[0]&0x01)) sprintf (buf, "%s%s ",buf,interrupt_str[0]); + if(!(byte[0]&0x02)) sprintf (buf, "%s%s ",buf,interrupt_str[1]); + if(!(byte[0]&0x10)) sprintf (buf, "%s%s ",buf,interrupt_str[4]); + if(!(byte[0]&0x20)) sprintf (buf, "%s%s ",buf,interrupt_str[5]); + if(!(byte[0]&0x40)) sprintf (buf, "%s%s ",buf,interrupt_str[6]); + if(!(byte[0]&0x80)) sprintf (buf, "%s%s ",buf,interrupt_str[7]); + if(!(byte[2]&0x01)) sprintf (buf, "%s%s%s ",buf,interrupt_str[8] ,(byte[3]&0x01)?"(Blocked)":""); + if(!(byte[2]&0x02)) sprintf (buf, "%s%s%s ",buf,interrupt_str[9] ,(byte[3]&0x02)?"(Blocked)":""); + + return sprintf (buf, "%s\n", buf); +} + +static char* bios_str[] = { + "BIOS1", //0 + "BIOS2", //1 +}; + +static ssize_t show_bios_cs(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte = 0; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_BIOSCS_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + byte &= 0x01; + + return sprintf (buf, "%d:%s\n", byte,bios_str[byte]); +} + +static ssize_t set_bios_cs(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte = 0; + u8 temp = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_BIOSCS_OFFSET, 1); + if(temp) byte |= 0x01; else byte &= ~(0x01); + cpld_i2c_write(client, &byte, CPLD_BIOSCS_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static char* led_str[] = { + "OFF", //00 + "Green/Blue", //01 + "Yellow/Orange", //10 + "Red", //11 +}; + +static ssize_t show_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte = 0; + int shift = attr->index; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + byte = (byte >> shift) & 0x3; + + return sprintf (buf, "%d:%s\n", byte, led_str[byte]); +} + +static ssize_t set_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + u8 temp = simple_strtol(buf, NULL, 16); + u8 byte = 0; + int shift = attr->index; + temp &= 0x3; + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + byte &= ~(0x3<update_lock); + + return count; +} + +static char* sysled_str[] = { + "OFF", //000 + "0.5 Hz", //001 + "1 Hz", //010 + "2 Hz", //011 + "4 Hz", //100 + "NA", //101 + "NA", //110 + "ON", //111 +}; + +static ssize_t show_sysled(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 0)?3:0; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_SYSLED_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte >> shift) & 0x7; + status = sprintf (buf, "%d:%s\n", byte, sysled_str[byte]); + + return strlen(buf); +} + +static ssize_t set_sysled(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + u8 temp = simple_strtol(buf, NULL, 16); + u8 byte; + int shift = (attr->index == 0)?3:0; + + temp &= 0x7; + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_SYSLED_OFFSET, 1); + byte &= ~(0x7<update_lock); + + return count; +} + +static char* psu_str[] = { + "unpowered", //00 + "normal", //01 + "not installed", //10 + "not installed", //11 +}; + +static ssize_t show_psu(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + int shift = (attr->index == 0)?0:4; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, &byte, CPLD_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + byte = (byte >> shift) & 0x3; + + return sprintf (buf, "%d:%s\n", byte, psu_str[byte]); +} + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + u8 offset = attr->index + CPLD_PWM_OFFSET; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, &byte, offset, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d\n", byte); +} + +static ssize_t set_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 offset = attr->index + CPLD_PWM_OFFSET; + u8 byte = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_write(client2, &byte, offset, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 offset = attr->index*2 + CPLD_RPM_OFFSET; + u8 byte[2] = {0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, byte, offset, 2); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d\n", (byte[0]<<8 | byte[1])); +} + +static char* fantype_str[] = { + "Normal Type", //00 + "REVERSAL Type", //01 + "UNPLUGGED", //10 + "UNPLUGGED", //11 +}; + +static ssize_t show_fantype(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 offset = CPLD_FANSTATUS_OFFSET; + u8 byte[2] = {0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, byte, offset, 2); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + status = (((byte[0] >> attr->index) & 0x01)) | (((byte[1] >> attr->index) & 0x01)<<1); + + return sprintf(buf, "%d:%s\n",status,fantype_str[status]); +} + +static char* fanled_str[] = { + "None", //00 + "Green", //01 + "Red", //10 + "Both", //11 +}; + +static ssize_t show_fanled(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte[2] = {0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, byte, CPLD_FANLED_OFFSET, 2); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + status = (((byte[0] >> attr->index) & 0x01)) | (((byte[1] >> attr->index) & 0x01)<<1); + + return sprintf(buf, "%d:%s\n",status,fanled_str[status]); +} + +static ssize_t set_fanled(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte[2] = {0,0}; + u8 temp = simple_strtol(buf, NULL, 16); + int shift = attr->index; + + temp &= 0x3; + mutex_lock(&data->update_lock); + cpld_i2c_read(client2, byte, CPLD_FANLED_OFFSET, 2); + byte[0] &= ~(1<> 1) & 0x01)<update_lock); + + return count; +} + +static ssize_t set_watchdog_feed(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte=0; + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_WATCHDOGENABLE_OFFSET, 1); + byte |= 0x02; + cpld_i2c_write(client, &byte, CPLD_WATCHDOGENABLE_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t set_watchdog_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte=0x03; + + mutex_lock(&data->update_lock); + cpld_i2c_write(client, &byte, CPLD_WATCHDOGENABLE_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_watchdog_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_WATCHDOGENABLE_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d\n",(byte&0x01)); +} + +static ssize_t set_watchdog_config(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte = simple_strtol(buf, NULL, 10); + + if (byte<6) byte=6; + mutex_lock(&data->update_lock); + cpld_i2c_write(client, &byte, CPLD_WATCHDOGCONFIG_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_watchdog_config(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_WATCHDOGCONFIG_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d seconds\n",byte); +} + +static ssize_t show_watchdog_counter(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_WATCHDOGCOUNTER_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d seconds\n",byte); +} + +static SENSOR_DEVICE_ATTR(info, S_IRUGO, show_info, 0, 0); +static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_thermal, 0, 0); +static SENSOR_DEVICE_ATTR(interrupt, S_IRUGO, show_interrupt, 0, 0); + +static SENSOR_DEVICE_ATTR(fan_led, S_IWUSR|S_IRUGO, show_led, set_led, 2); +static SENSOR_DEVICE_ATTR(power_led, S_IWUSR|S_IRUGO, show_led, set_led, 4); +static SENSOR_DEVICE_ATTR(location_led, S_IWUSR|S_IRUGO, show_led, set_led, 6); + +static SENSOR_DEVICE_ATTR(grn_led, S_IWUSR|S_IRUGO, show_sysled, set_sysled, 0); +static SENSOR_DEVICE_ATTR(red_led, S_IWUSR|S_IRUGO, show_sysled, set_sysled, 1); + +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 0); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 1); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 2); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 3); +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 4); +#endif + +static SENSOR_DEVICE_ATTR(fanmodule1_type, S_IRUGO, show_fantype, 0, 0); +static SENSOR_DEVICE_ATTR(fanmodule2_type, S_IRUGO, show_fantype, 0, 1); +static SENSOR_DEVICE_ATTR(fanmodule3_type, S_IRUGO, show_fantype, 0, 2); +static SENSOR_DEVICE_ATTR(fanmodule4_type, S_IRUGO, show_fantype, 0, 3); +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(fanmodule5_type, S_IRUGO, show_fantype, 0, 4); +#endif + +static SENSOR_DEVICE_ATTR(fanmodule1_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 0); +static SENSOR_DEVICE_ATTR(fanmodule2_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 1); +static SENSOR_DEVICE_ATTR(fanmodule3_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 2); +static SENSOR_DEVICE_ATTR(fanmodule4_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 3); +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(fanmodule5_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 4); +#endif + +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_rpm, 0, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_rpm, 0, 1); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_rpm, 0, 2); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_rpm, 0, 3); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_rpm, 0, 4); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_rpm, 0, 5); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_rpm, 0, 6); +static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_rpm, 0, 7); +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(fan9_input, S_IRUGO, show_rpm, 0, 8); +static SENSOR_DEVICE_ATTR(fan10_input,S_IRUGO, show_rpm, 0, 9); +#endif + +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu, 0, 0); +static SENSOR_DEVICE_ATTR(psu2, S_IRUGO, show_psu, 0, 1); +static SENSOR_DEVICE_ATTR(power_status, S_IRUGO, show_powerstatus, 0, 0); + +static SENSOR_DEVICE_ATTR(watchdog_feed, S_IWUSR, 0, set_watchdog_feed, 0); +static SENSOR_DEVICE_ATTR(watchdog_enable, S_IWUSR|S_IRUGO, show_watchdog_enable, set_watchdog_enable, 0); +static SENSOR_DEVICE_ATTR(watchdog_config, S_IWUSR|S_IRUGO, show_watchdog_config, set_watchdog_config, 0); +static SENSOR_DEVICE_ATTR(watchdog_counter, S_IRUGO, show_watchdog_counter, 0, 0); + +static SENSOR_DEVICE_ATTR(bios_cs, S_IWUSR|S_IRUGO, show_bios_cs, set_bios_cs, 0); + +static struct attribute *cpld_attributes[] = { + &sensor_dev_attr_info.dev_attr.attr, + &sensor_dev_attr_diag.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + + &sensor_dev_attr_fan_led.dev_attr.attr, + &sensor_dev_attr_power_led.dev_attr.attr, + &sensor_dev_attr_location_led.dev_attr.attr, + + &sensor_dev_attr_grn_led.dev_attr.attr, + &sensor_dev_attr_red_led.dev_attr.attr, + + &sensor_dev_attr_interrupt.dev_attr.attr, + + &sensor_dev_attr_psu1.dev_attr.attr, + &sensor_dev_attr_psu2.dev_attr.attr, + &sensor_dev_attr_power_status.dev_attr.attr, + + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, +#if FAN_NUM>4 + &sensor_dev_attr_pwm5.dev_attr.attr, +#endif + &sensor_dev_attr_fanmodule1_type.dev_attr.attr, + &sensor_dev_attr_fanmodule2_type.dev_attr.attr, + &sensor_dev_attr_fanmodule3_type.dev_attr.attr, + &sensor_dev_attr_fanmodule4_type.dev_attr.attr, +#if FAN_NUM>4 + &sensor_dev_attr_fanmodule5_type.dev_attr.attr, +#endif + &sensor_dev_attr_fanmodule1_led.dev_attr.attr, + &sensor_dev_attr_fanmodule2_led.dev_attr.attr, + &sensor_dev_attr_fanmodule3_led.dev_attr.attr, + &sensor_dev_attr_fanmodule4_led.dev_attr.attr, +#if FAN_NUM>4 + &sensor_dev_attr_fanmodule5_led.dev_attr.attr, +#endif + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_fan8_input.dev_attr.attr, +#if FAN_NUM>4 + &sensor_dev_attr_fan9_input.dev_attr.attr, + &sensor_dev_attr_fan10_input.dev_attr.attr, +#endif + &sensor_dev_attr_watchdog_feed.dev_attr.attr, + &sensor_dev_attr_watchdog_enable.dev_attr.attr, + &sensor_dev_attr_watchdog_config.dev_attr.attr, + &sensor_dev_attr_watchdog_counter.dev_attr.attr, + + &sensor_dev_attr_bios_cs.dev_attr.attr, + NULL +}; + +static const struct attribute_group cpld_group = { + .attrs = cpld_attributes, +}; + +/*-----------------------------------------------------------------------*/ +/* device probe and removal */ +static int +cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct cpld_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &cpld_group); + + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + //Check CPLD2 exist or not + client2 = i2c_new_dummy(client->adapter, CPLD2_ADDRESS); + if(!client2) { + hasCPLD2 = 0; + client2 = client; + } else { + status = i2c_smbus_read_byte_data(client2, CPLD_INFO_OFFSET); + if(status<0) { + i2c_unregister_device(client2); + i2c_set_clientdata(client2, NULL); + hasCPLD2 = 0; + client2 = client; + } + } + + data->tsk = kthread_run(cpld_thread,client,"%s",dev_name(data->hwmon_dev)); + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &cpld_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &cpld_group); + hwmon_device_unregister(data->hwmon_dev); + i2c_set_clientdata(client, NULL); + if(hasCPLD2) { + i2c_unregister_device(client2); + i2c_set_clientdata(client2, NULL); + } + + kfree(data); + return 0; +} + +static const struct i2c_device_id cpld_ids[] = { + { "inv_cpld" , 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, cpld_ids); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_cpld_init(void) +{ + return i2c_add_driver(&cpld_driver); +} + +static void __exit inv_cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("jack.ting "); +MODULE_DESCRIPTION("cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_cpld_init); +module_exit(inv_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_eeprom.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_eeprom.c new file mode 100644 index 00000000000..7bb167d2e74 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_eeprom.c @@ -0,0 +1,181 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void inv_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } + +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t inv_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + inv_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute inv_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = inv_eeprom_read, +}; + +static int inv_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &inv_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int inv_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &inv_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id inv_eeprom_id[] = { + { "inv_eeprom", 0 }, + { } +}; + +static struct i2c_driver inv_eeprom_driver = { + .driver = { + .name = "inv_eeprom", + }, + .probe = inv_eeprom_probe, + .remove = inv_eeprom_remove, + .id_table = inv_eeprom_id, +}; + +module_i2c_driver(inv_eeprom_driver); + +MODULE_AUTHOR("Inventec"); +MODULE_DESCRIPTION("Inventec D6556 Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_monitor.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_monitor.c new file mode 100644 index 00000000000..473fd83e8ea --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_monitor.c @@ -0,0 +1,730 @@ +#include "inv_monitor.h" +#include "inv_proxy.h" + +static struct class *core_class_p = NULL; +static struct class *psu_class_p = NULL; +static struct class *fan_class_p = NULL; + +static int psu_major; + +#define NUM_PSU (2) +#define NUM_PSU_TEMP (3) +#define NUM_FAN (4) + +/* CORE */ +#define HWMON_DEV_PATH_CORE0_TEMP "/sys/class/hwmon/hwmon1/temp2_input" +#define HWMON_DEV_PATH_CORE1_TEMP "/sys/class/hwmon/hwmon1/temp3_input" +#define HWMON_DEV_PATH_CORE2_TEMP "/sys/class/hwmon/hwmon1/temp4_input" +#define HWMON_DEV_PATH_CORE3_TEMP "/sys/class/hwmon/hwmon1/temp5_input" + +/* PSU */ +#define HWMON_DEV_PATH_PSU0_PRESENT "/sys/class/hwmon/hwmon2/device/psu1" +#define HWMON_DEV_PATH_PSU1_PRESENT "/sys/class/hwmon/hwmon2/device/psu2" +#define HWMON_DEV_PATH_PSU0_VOLTAGE_IN "/sys/class/hwmon/hwmon7/device/in1_input" +#define HWMON_DEV_PATH_PSU1_VOLTAGE_IN "/sys/class/hwmon/hwmon8/device/in1_input" +#define HWMON_DEV_PATH_PSU0_VOLTAGE_OUT "/sys/class/hwmon/hwmon7/device/in2_input" +#define HWMON_DEV_PATH_PSU1_VOLTAGE_OUT "/sys/class/hwmon/hwmon8/device/in2_input" +#define HWMON_DEV_PATH_PSU0_POWER_IN "/sys/class/hwmon/hwmon7/device/power1_input" +#define HWMON_DEV_PATH_PSU1_POWER_IN "/sys/class/hwmon/hwmon8/device/power1_input" +#define HWMON_DEV_PATH_PSU0_POWER_OUT "/sys/class/hwmon/hwmon7/device/power2_input" +#define HWMON_DEV_PATH_PSU1_POWER_OUT "/sys/class/hwmon/hwmon8/device/power2_input" +#define HWMON_DEV_PATH_PSU0_TEMP1 "/sys/class/hwmon/hwmon7/device/temp1_input" +#define HWMON_DEV_PATH_PSU0_TEMP2 "/sys/class/hwmon/hwmon7/device/temp2_input" +#define HWMON_DEV_PATH_PSU0_TEMP3 "/sys/class/hwmon/hwmon7/device/temp3_input" +#define HWMON_DEV_PATH_PSU1_TEMP1 "/sys/class/hwmon/hwmon8/device/temp1_input" +#define HWMON_DEV_PATH_PSU1_TEMP2 "/sys/class/hwmon/hwmon8/device/temp2_input" +#define HWMON_DEV_PATH_PSU1_TEMP3 "/sys/class/hwmon/hwmon8/device/temp3_input" + +/* FAN */ +#define HWMON_DEV_PATH_FAN1_FRONT_RPM "/sys/class/hwmon/hwmon2/device/fan1_input" +#define HWMON_DEV_PATH_FAN1_REAR_RPM "/sys/class/hwmon/hwmon2/device/fan2_input" +#define HWMON_DEV_PATH_FAN2_FRONT_RPM "/sys/class/hwmon/hwmon2/device/fan3_input" +#define HWMON_DEV_PATH_FAN2_REAR_RPM "/sys/class/hwmon/hwmon2/device/fan4_input" +#define HWMON_DEV_PATH_FAN3_FRONT_RPM "/sys/class/hwmon/hwmon2/device/fan5_input" +#define HWMON_DEV_PATH_FAN3_REAR_RPM "/sys/class/hwmon/hwmon2/device/fan6_input" +#define HWMON_DEV_PATH_FAN4_FRONT_RPM "/sys/class/hwmon/hwmon2/device/fan7_input" +#define HWMON_DEV_PATH_FAN4_REAR_RPM "/sys/class/hwmon/hwmon2/device/fan8_input" +#define HWMON_DEV_PATH_FAN1_PRESENT "/sys/class/hwmon/hwmon2/device/fanmodule1_type" +#define HWMON_DEV_PATH_FAN2_PRESENT "/sys/class/hwmon/hwmon2/device/fanmodule2_type" +#define HWMON_DEV_PATH_FAN3_PRESENT "/sys/class/hwmon/hwmon2/device/fanmodule3_type" +#define HWMON_DEV_PATH_FAN4_PRESENT "/sys/class/hwmon/hwmon2/device/fanmodule4_type" + +struct note +{ + int index; + char *name; + struct device *dev; + char *present; + char *in_voltage; + char *out_voltage; + char *in_power; + char *out_power; + char *temp1; + char *temp2; + char *temp3; +}; + +struct note psu_note[] = { + { 0, "psu1", NULL, HWMON_DEV_PATH_PSU0_PRESENT, \ + HWMON_DEV_PATH_PSU0_VOLTAGE_IN, \ + HWMON_DEV_PATH_PSU0_VOLTAGE_OUT, \ + HWMON_DEV_PATH_PSU0_POWER_IN, \ + HWMON_DEV_PATH_PSU0_POWER_OUT, \ + HWMON_DEV_PATH_PSU0_TEMP1, \ + HWMON_DEV_PATH_PSU0_TEMP2, \ + HWMON_DEV_PATH_PSU0_TEMP3 }, + { 1, "psu2", NULL, HWMON_DEV_PATH_PSU1_PRESENT, \ + HWMON_DEV_PATH_PSU1_VOLTAGE_IN, \ + HWMON_DEV_PATH_PSU1_VOLTAGE_OUT, \ + HWMON_DEV_PATH_PSU1_POWER_IN, \ + HWMON_DEV_PATH_PSU1_POWER_OUT, \ + HWMON_DEV_PATH_PSU1_TEMP1, \ + HWMON_DEV_PATH_PSU1_TEMP2, \ + HWMON_DEV_PATH_PSU1_TEMP3 }, +}; + + +static ssize_t show_attr_psu_temperature(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int integer = 0; + int floater = 0; + int modulus = 0; + int present = DEBUG_INV_INT; + int result = DEBUG_INV_INT; + char name[MAX_PATH_SIZE]; + + memset(name, 0, MAX_PATH_SIZE); + snprintf(name, MAX_PATH_SIZE, "%s", attr->attr.name); + + struct note *notep = NULL ; + notep = dev_get_drvdata(dev); + + if (!notep) + goto err_get_psu_module_temperature; + + present = read_psu_present(notep->present) ; + if ( present == 0 ) + goto err_get_psu_module_temperature; + + if ( strncmp(name, "temp1", strlen(name)) == 0 ) + result = read_psu_temperature(notep->temp1) ; + else if ( strncmp(name, "temp2", strlen(name)) == 0 ) + result = read_psu_temperature(notep->temp2) ; + else if ( strncmp(name, "temp3", strlen(name)) == 0 ) + result = read_psu_temperature(notep->temp3) ; + else + goto err_get_psu_module_temperature; + + if ( result == -1 ) + goto err_get_psu_module_temperature; + + integer = result / 1000 ; + if ( result > 0 ) + { + modulus = result % 1000 ; + floater = modulus / 100 ; + return snprintf(buf, MAX_PATH_SIZE, "+%d.%d C", integer, floater ); + } + else + { + modulus = -result % 1000 ; + floater = modulus / 100 ; + return snprintf(buf, MAX_PATH_SIZE, "%d.0 C", integer, floater ); + } + +err_get_psu_module_temperature : + return sprintf(buf, "N/A"); +} + +static ssize_t show_attr_psu_voltage(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int integer = 0; + int floater = 0; + int modulus = 0; + int present = DEBUG_INV_INT; + int result = DEBUG_INV_INT; + char name[MAX_PATH_SIZE]; + + memset(name, 0, MAX_PATH_SIZE); + snprintf(name, MAX_PATH_SIZE, "%s", attr->attr.name); + + struct note *notep = NULL ; + notep = dev_get_drvdata(dev); + + if (!notep) + goto err_get_psu_module_voltage; + + present = read_psu_present(notep->present) ; + if ( present == 0 ) + goto err_get_psu_module_voltage; + + if ( strncmp(name, "in_voltage", strlen(name)) == 0 ) + result = read_psu_voltage(notep->in_voltage) ; + else if ( strncmp(name, "out_voltage", strlen(name)) == 0 ) + result = read_psu_voltage(notep->out_voltage) ; + else + goto err_get_psu_module_voltage; + + if ( result == -1 ) + goto err_get_psu_module_voltage; + + integer = result / 1000 ; + if ( result > 0 ) + { + modulus = result % 1000 ; + floater = modulus / 10 ; + return snprintf(buf, MAX_PATH_SIZE, "+%d.%02d V", integer, floater); + } + else + { + modulus = -result % 1000 ; + floater = modulus / 10 ; + return snprintf(buf, MAX_PATH_SIZE, "%d.%02d V", integer, floater); + } + +err_get_psu_module_voltage : + return sprintf(buf, "N/A"); +} + +static ssize_t show_attr_psu_power(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int integer = 0; + int floater = 0; + int modulus = 0; + int present = DEBUG_INV_INT; + int result = DEBUG_INV_INT; + char name[MAX_PATH_SIZE]; + + memset(name, 0, MAX_PATH_SIZE); + snprintf(name, MAX_PATH_SIZE, "%s", attr->attr.name); + + struct note *notep = NULL ; + notep = dev_get_drvdata(dev); + + if (!notep) + goto err_get_psu_module_power; + + present = read_psu_present(notep->present) ; + if ( present == 0 ) + goto err_get_psu_module_power; + + if ( strncmp(name, "in_power", strlen(name)) == 0 ) + result = read_psu_power(notep->in_power) ; + else if ( strncmp(name, "out_power", strlen(name)) == 0 ) + result = read_psu_power(notep->out_power) ; + else + goto err_get_psu_module_power; + + if ( result == -1 ) + goto err_get_psu_module_power; + + integer = result / 1000000 ; + if ( result > 0 ) + { + modulus = result % 1000000 ; + floater = modulus / 10000 ; + return snprintf(buf, MAX_PATH_SIZE, "+%d.%02d W", integer, floater); + } + else + { + modulus = -result % 1000000 ; + floater = modulus / 10000 ; + return snprintf(buf, MAX_PATH_SIZE, "%d.%02d W", integer, floater); + } + goto err_get_psu_module_power; + +err_get_psu_module_power : + return sprintf(buf, "N/A"); +} + +static ssize_t show_attr_psu_present(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int result = DEBUG_INV_INT; + + struct note *notep = NULL ; + notep = dev_get_drvdata(dev); + + if (!notep) + goto err_get_psu_module_present; + + result = read_psu_present(notep->present) ; + if ( result > -1 ) + return snprintf(buf, MAX_PATH_SIZE, "%d", result); + else + goto err_get_psu_module_present; + + goto err_get_psu_module_present; + +err_get_psu_module_present : + return sprintf(buf, "N/A"); +} + +static ssize_t show_attr_psu_temperature_number(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + return sprintf(buf, "%d", NUM_PSU_TEMP); +} + +static ssize_t show_attr_psu_number(struct class *class, + struct class_attribute *attr, + char *buf) +{ + return sprintf(buf, "%d", NUM_PSU); +} + +static DEVICE_ATTR(present, S_IRUGO, show_attr_psu_present, NULL); +static DEVICE_ATTR(temp_nm, S_IRUGO, show_attr_psu_temperature_number, NULL); +static DEVICE_ATTR(in_voltage, S_IRUGO, show_attr_psu_voltage, NULL); +static DEVICE_ATTR(out_voltage, S_IRUGO, show_attr_psu_voltage, NULL); +static DEVICE_ATTR(in_power, S_IRUGO, show_attr_psu_power, NULL); +static DEVICE_ATTR(out_power, S_IRUGO, show_attr_psu_power, NULL); +static DEVICE_ATTR(temp1, S_IRUGO, show_attr_psu_temperature, NULL); +static DEVICE_ATTR(temp2, S_IRUGO, show_attr_psu_temperature, NULL); +static DEVICE_ATTR(temp3, S_IRUGO, show_attr_psu_temperature, NULL); + +static int psu_device_match(struct device *dev, const void *data) +{ + return !strcmp(dev_name(dev), (const char *)data); +} + +static int register_psu_device(void) +{ + dev_t psu_devt = 0; + int index = 0 ; + struct device *global_device_p = NULL; + dev_t global_dev_num = 0 ; + + /* Register device number */ + if (alloc_chrdev_region(&psu_devt, 0, NUM_PSU, "psus") < 0){ + MONITOR_ERR("Allocate PSU MAJOR failure! \n"); + goto err_register_psu_module_1; + } + psu_major = MAJOR(psu_devt); + + for ( index ; index < NUM_PSU ; index++ ) + { + // struct note *note=NULL; + struct device *device_p = NULL; + + dev_t dev_num = MKDEV(psu_major, 0); + + dev_num = MKDEV(psu_major, index) ; + + device_p = device_create(psu_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + NULL, /* void *private_data */ + psu_note[index].name); /* const char *fmt */ + + psu_note[index].dev = device_p; + + dev_set_drvdata(device_p, &psu_note[index]); + + MONITOR_INFO("device_create named '%s' \n", psu_note[index].name); + + if (IS_ERR(device_p)){ + MONITOR_ERR("Allocate PSU device_create failure! \n"); + goto err_register_psu_module_2; + } + if (device_create_file(device_p, &dev_attr_present) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'temp3' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_temp_nm) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'temp_nm' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_in_voltage) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'in_voltage' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_out_voltage) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'out_voltage' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_in_power) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'in_power' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_out_power) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'out_power' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_temp1) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'temp1' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_temp2) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'temp2' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_temp3) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'temp3' failed \n"); + goto err_register_psu_module_3; + } + } + return 0; +err_register_psu_module_1: + unregister_chrdev_region(MKDEV(psu_major, 0), NUM_PSU); +err_register_psu_module_2: + return -1; +err_register_psu_module_3: + device_unregister(global_device_p); + device_destroy(psu_class_p, global_dev_num); +} + +int +remove_psu_device(void) +{ + dev_t dev_num; + char dev_name[MAX_PATH_SIZE]; + struct device *device_p; + int minor_curr; + + for ( minor_curr = 0 ; minor_curr < NUM_PSU; minor_curr++ ) + { + memset(dev_name, 0, sizeof(dev_name)); + snprintf(dev_name, sizeof(dev_name), "%s%d", "psu", minor_curr+1); + device_p = class_find_device(psu_class_p, NULL, dev_name, psu_device_match); + if (!device_p){ + continue; + } + dev_num = MKDEV(psu_major, minor_curr); + MONITOR_INFO("Found dev Num is %d \n", dev_num); + // device_unregister(device_p); + device_destroy(psu_class_p, dev_num); + } + MONITOR_INFO("Inventec monitor remove_psu_device success.\n", MONITOR_VERSION); +} + + +static struct class_attribute psu_class_attrs[] = { + __ATTR(psu_nm, S_IRUGO, show_attr_psu_number, NULL), + __ATTR_NULL, +}; + +static ssize_t show_attr_fan_present(struct class *class, + struct class_attribute *attr, + char *buf) +{ + char name[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + + memset(name, 0, MAX_PATH_SIZE); + + snprintf(name, MAX_PATH_SIZE, "%s", attr->attr.name); + + if ( strncmp(name, "fan1_present", strlen(name)) == 0 ) + result = read_fan_present(HWMON_DEV_PATH_FAN1_PRESENT) ; + else if ( strncmp(name, "fan2_present", strlen(name)) == 0 ) + result = read_fan_present(HWMON_DEV_PATH_FAN2_PRESENT) ; + else if ( strncmp(name, "fan3_present", strlen(name)) == 0 ) + result = read_fan_present(HWMON_DEV_PATH_FAN3_PRESENT) ; + else if ( strncmp(name, "fan4_present", strlen(name)) == 0 ) + result = read_fan_present(HWMON_DEV_PATH_FAN4_PRESENT) ; + else + goto err_get_fan_module_present ; + + if ( result > -1 ) + return snprintf(buf, MAX_PATH_SIZE, "%d", result); + else + goto err_get_fan_module_present; + +err_get_fan_module_present : + return sprintf(buf, "N/A"); +} + +static ssize_t show_attr_fan_number(struct class *class, + struct class_attribute *attr, + char *buf) +{ + return sprintf(buf, "%d", NUM_FAN); +} + +static ssize_t show_attr_fan_rpm(struct class *class, + struct class_attribute *attr, + char *buf) +{ + char name[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + int present = DEBUG_INV_INT; + + memset(name, 0, MAX_PATH_SIZE); + + snprintf(name, MAX_PATH_SIZE, "%s", attr->attr.name); + + if ( strncmp(name, "fan1_front", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN1_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN1_FRONT_RPM) ; + } + else if ( strncmp(name, "fan1_rear", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN1_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN1_REAR_RPM) ; + } + else if ( strncmp(name, "fan2_front", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN2_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN2_FRONT_RPM) ; + } + else if ( strncmp(name, "fan2_rear", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN2_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN2_REAR_RPM) ; + } + else if ( strncmp(name, "fan3_front", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN3_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN3_FRONT_RPM) ; + } + else if ( strncmp(name, "fan3_rear", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN3_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN3_REAR_RPM) ; + } + else if ( strncmp(name, "fan4_front", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN4_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN4_FRONT_RPM) ; + } + else if ( strncmp(name, "fan4_rear", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN4_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN4_REAR_RPM) ; + } + else + { + goto err_get_fan_module_rpm ; + } + + if ( result >= 0 ) + return snprintf(buf, MAX_PATH_SIZE, "%d RPM", result); + else + goto err_get_fan_module_rpm; + +err_get_fan_module_rpm : + return sprintf(buf, "N/A"); +} + +static struct class_attribute fan_class_attrs[] = { + __ATTR(fan_nm, S_IRUGO, show_attr_fan_number, NULL), + __ATTR(fan1_front, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan1_rear, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan2_front, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan2_rear, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan3_front, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan3_rear, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan4_front, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan4_rear, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan1_present, S_IRUGO, show_attr_fan_present, NULL), + __ATTR(fan2_present, S_IRUGO, show_attr_fan_present, NULL), + __ATTR(fan3_present, S_IRUGO, show_attr_fan_present, NULL), + __ATTR(fan4_present, S_IRUGO, show_attr_fan_present, NULL), + __ATTR_NULL, +}; + + +static ssize_t show_attr_core_temperature(struct class *class, + struct class_attribute *attr, + char *buf) +{ + char name[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + + memset(name, 0, MAX_PATH_SIZE); + + snprintf(name, MAX_PATH_SIZE, "%s", attr->attr.name); + + if ( strncmp(name, "core0", strlen(name)) == 0 ) + result = read_core_temperature(HWMON_DEV_PATH_CORE0_TEMP) ; + else if ( strncmp(name, "core1", strlen(name)) == 0 ) + result = read_core_temperature(HWMON_DEV_PATH_CORE1_TEMP) ; + else if ( strncmp(name, "core2", strlen(name)) == 0 ) + result = read_core_temperature(HWMON_DEV_PATH_CORE2_TEMP) ; + else if ( strncmp(name, "core3", strlen(name)) == 0 ) + result = read_core_temperature(HWMON_DEV_PATH_CORE3_TEMP) ; + else + goto err_get_core_module_temperature ; + + if ( result == -1 ) + goto err_get_core_module_temperature; + + if ( result > 0 ) + return snprintf(buf, MAX_PATH_SIZE, "+%d.0 C", (result/1000)); + else + return snprintf(buf, MAX_PATH_SIZE, "%d.0 C", (result/1000)); + + goto err_get_core_module_temperature ; + +err_get_core_module_temperature : + return sprintf(buf, "N/A"); +} + +static struct class_attribute core_class_attrs[] = { + __ATTR(core0, S_IRUGO, show_attr_core_temperature, NULL), + __ATTR(core1, S_IRUGO, show_attr_core_temperature, NULL), + __ATTR(core2, S_IRUGO, show_attr_core_temperature, NULL), + __ATTR(core3, S_IRUGO, show_attr_core_temperature, NULL), + __ATTR_NULL, +}; + +struct class core_class = { + .name = CORE_CLS_NAME, + .owner = THIS_MODULE, + .class_attrs = core_class_attrs, +}; + +struct class psu_class = { + .name = PSU_CLS_NAME, + .owner = THIS_MODULE, + .class_attrs = psu_class_attrs, +}; + +struct class fan_class = { + .name = FAN_CLS_NAME, + .owner = THIS_MODULE, + .class_attrs = fan_class_attrs, +}; + +int +core_init(void) { + + int status; + + /* Create core class object and class attribute */ + status = class_register(&core_class); + core_class_p = &core_class; + MONITOR_INFO("core_init result: %d\n", status); + + if (status < 0) + { + MONITOR_ERR("Inventec monitor core class creating failed.\n"); + return status; + } + + return 0 ; +} + +int +psu_init(void) { + + int status; + + /* Create psu class object and class attribute */ + status = class_register(&psu_class); + psu_class_p = &psu_class; + MONITOR_INFO("psu_init result: %d\n", status); + + if (status < 0) + { + MONITOR_ERR("Inventec monitor psu class creating failed.\n"); + return status; + } + + /* Create psu device attribute */ + if ( register_psu_device() < 0 ) + { + MONITOR_ERR("Inventec monitor psu device attribute creating failed.\n"); + return -1; + } + return 0 ; +} + +int +fan_init(void) { + + int status; + int index = 0 ; + + /* Create fan class object and class attribute */ + status = class_register(&fan_class); + fan_class_p = &fan_class; + MONITOR_INFO("fan_init result: %d\n", status); + + if (status < 0) + { + MONITOR_ERR("Inventec monitor fan class creating failed.\n"); + return status; + } + + return 0 ; +} + +static int __init monitor_sysfs_init(void) +{ + int status; + + if (inv_proxy_init() < 0) { + MONITOR_ERR("Inventec monitor inv_proxy_init module initial failed.\n", MONITOR_VERSION); + } + + if (core_init() < 0) { + MONITOR_ERR("Inventec monitor core_init module initial failed.\n", MONITOR_VERSION); + } + + if (psu_init() < 0) { + MONITOR_ERR("Inventec monitor psu_init module initial failed.\n", MONITOR_VERSION); + } + + if (fan_init() < 0) { + MONITOR_ERR("Inventec monitor fan_init module initial failed.\n", MONITOR_VERSION); + } + + MONITOR_INFO("Inventec monitor module V.%s initial success.\n", MONITOR_VERSION); + return 0; +} + +static void __exit monitor_sysfs_exit(void) +{ + class_unregister(core_class_p); + class_unregister(fan_class_p); + remove_psu_device(); + class_unregister(psu_class_p); + unregister_chrdev_region(MKDEV(psu_major, 0), NUM_PSU); + inv_proxy_exit(); + MONITOR_INFO("Inventec monitor module V.%s remove success.\n", MONITOR_VERSION); + return 0; +} + +module_init(monitor_sysfs_init); +module_exit(monitor_sysfs_exit); + +/* Module information */ +MODULE_AUTHOR(MONITOR_AUTHOR); +MODULE_DESCRIPTION(MONITOR_DESC); +MODULE_VERSION(MONITOR_VERSION); +MODULE_LICENSE(MONITOR_LICENSE); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_monitor.h b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_monitor.h new file mode 100644 index 00000000000..473c482519f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_monitor.h @@ -0,0 +1,33 @@ +#ifndef _INV_MONITOR_H_ +#define _INV_MONITOR_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Module information */ +#define MONITOR_AUTHOR "James , Neil " +#define MONITOR_DESC "Inventec HW monitoring SYSFS for JD" +#define MONITOR_VERSION "1.0" +#define MONITOR_LICENSE "GPL" + + +#define CORE_CLS_NAME "core" +#define FAN_CLS_NAME "fan" +#define PSU_CLS_NAME "psus" + + +#define MONITOR_INFO(fmt, args...) printk( KERN_INFO "[MONITOR] " fmt, ##args) +#define MONITOR_WARN(fmt, args...) printk( KERN_WARNING "[MONITOR] " fmt, ##args) +#define MONITOR_ERR(fmt, args...) printk( KERN_ERR "[MONITOR] " fmt, ##args) + +#endif /* _INV_MONITOR_H_ */ + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_mux.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_mux.c new file mode 100644 index 00000000000..143aee309db --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_mux.c @@ -0,0 +1,547 @@ +#include +#include +#include +#include +#include +#include +#include "io_expander.h" +#include "inv_mux.h" + +/* For build single module using (Ex: ONL platform) */ +#include +//#include +//#include + + +static struct mux_obj_s *mux_head_p = NULL; + +/* ========== MUX object functions ========== + */ +static int +_setup_i2c_value(struct mux_obj_s *self, int offset, int value){ + + return i2c_smbus_write_byte_data(self->i2c_client_p, offset, value); +} + + +static int +_setup_i2c_client(struct mux_obj_s *self, int chan_id, int addr){ + + struct i2c_adapter *adap = NULL; + char *emsg = "ERR"; + + adap = i2c_get_adapter(chan_id); + if (!adap){ + emsg = "can't get adapter"; + goto err_setup_i2c_client; + } + self->i2c_client_p = kzalloc(sizeof(*self->i2c_client_p), GFP_KERNEL); + if (!self->i2c_client_p){ + emsg = "can't kzalloc client"; + goto err_setup_i2c_client; + } + self->i2c_client_p->adapter = adap; + self->i2c_client_p->addr = addr; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, emsg); + return ERR_MUX_UNEXCPT; +} + + +int +_common_force_pull_gpio(int mem_addr, + int input, + int bit_offset){ + + unsigned int val = 0; + unsigned int targ = 0; + + /* Get current value */ + val = inl(mem_addr); + if (val == 0) { + SWPS_ERR("%s: inl:%d fail!\n", __func__, val); + return -1; + } + /* Count target value */ + switch (input) { + case 0: /* Pull Low */ + targ = (val & (~(1 << bit_offset))); + break; + case 1: /* Pull high */ + targ = (val | (1 << bit_offset)); + break; + default: + SWPS_ERR("%s: input state:%d incorrect!\n", + __func__, input); + return -1; + } + /* Setup gpio */ + outl(targ, mem_addr); + if (targ != inl(mem_addr)){ + SWPS_ERR("%s: outl:%d fail!\n", __func__, targ); + return -1; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + + +int +rangeley_force_pull_high(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +rangeley_force_pull_low(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +hedera_force_pull_high(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 1, 5); +} + + +int +hedera_force_pull_low(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 0, 5); +} + + +int +normal_gpio_pull_high(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 1); +} + + +int +normal_gpio_pull_low(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 0); +} + + +int +cpld_rst_all_4_pull_low(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto setlow_cpld_rst_all_4_c0_a77_70_74_rst_all; + + default: + break; + } + emsg = "Undefined case"; + goto err_cpld_rst_all_4_pull_low; + +setlow_cpld_rst_all_4_c0_a77_70_74_rst_all: + err = _setup_i2c_value(self, 0x70, 0x0); + if (err < 0) { + emsg = "setup 0x70 fail"; + goto err_cpld_rst_all_4_pull_low; + } + err = _setup_i2c_value(self, 0x74, 0x01); + if (err < 0) { + emsg = "setup 0x74 fail"; + goto err_cpld_rst_all_4_pull_low; + } + return 0; + +err_cpld_rst_all_4_pull_low: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +cpld_rst_all_4_pull_high(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto sethigh_cpld_rst_all_4_c0_a77_70_74_rst_all; + + default: + break; + } + emsg = "Undefined case"; + goto err_cpld_rst_all_4_pull_high; + +sethigh_cpld_rst_all_4_c0_a77_70_74_rst_all: + err = _setup_i2c_value(self, 0x70, 0xfe); + if (err < 0) { + emsg = "setup 0x70 fail"; + goto err_cpld_rst_all_4_pull_high; + } + err = _setup_i2c_value(self, 0x74, 0x03); + if (err < 0) { + emsg = "setup 0x74 fail"; + goto err_cpld_rst_all_4_pull_high; + } + return 0; + +err_cpld_rst_all_4_pull_high: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +pca9548_reset_mux_all(struct mux_obj_s *self){ + /* [Note] Power-on reset (PCA9548A-NXP) + * When power is applied to VDD, an internal Power-On Reset (POR) + * holds the PCA9548A in a reset condition until VDD has reached + * VPOR. At this point, the reset condition is released and the + * PCA9548A register and I2C-bus state machine are initialized to + * their default states (all zeroes) causing all the channels to + * be deselected. Thereafter, VDD must be lowered below 0.2 V for + * at least 5 us in order to reset the device. + */ + if (self->_pull_low(self) < 0) { + SWPS_ERR("%s: _pull_low fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS_PCA9548); + if (self->_pull_high(self) < 0) { + SWPS_ERR("%s: _pull_high fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS_PCA9548); + return 0; +} + + +int +cpld_reset_mux_all(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto reset_cpld_rst_all_4_c0_a77_70_74_rst_all; + + default: + break; + } + emsg = "Undefined case"; + goto err_cpld_reset_mux_all; + +reset_cpld_rst_all_4_c0_a77_70_74_rst_all: + if (self->_pull_low(self) < 0) { + emsg = "_pull_low fail"; + goto err_cpld_reset_mux_all; + } + mdelay(MUX_RST_WAIT_MS_CPLD); + return 0; + +err_cpld_reset_mux_all: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +common_reset_mux_all(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +init_gpio_4_force(struct mux_obj_s *self){ + + if (self->_pull_high(self) < 0) { + SWPS_ERR("%s: setup default fail!\n", __func__); + return -1; + } + return 0; +} + + +int +init_gpio_4_normal(struct mux_obj_s *self){ + + int err = 0; + char *emsg = "ERR"; + + if (!gpio_is_valid(self->gpio_num)) { + emsg = "GPIO invalid"; + goto err_init_gpio_4_normal; + } + err = gpio_request(self->gpio_num, MUX_GPIO_LABEL); + if (err < 0) { + emsg = "gpio_request fail"; + goto err_init_gpio_4_normal; + } + err = self->_pull_high(self); + if (err < 0) { + emsg = "setup default fail"; + goto err_init_gpio_4_normal; + } + SWPS_DEBUG("%s: gpio_request:%d ok.\n", __func__, self->gpio_num); + return 0; + +err_init_gpio_4_normal: + SWPS_ERR("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return -1; +} + + +int +init_cpld_4_rst_all(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + int chan = ERR_MUX_UNEXCPT; + int addr = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto init_cpld_i2c_c0_a77_70_74_rst_all; + + default: + break; + } + emsg = "Undefined case"; + goto err_init_cpld_4_rst_all; + +init_cpld_i2c_c0_a77_70_74_rst_all: + chan = 0; + addr = 0x77; + err = _setup_i2c_client(self, chan, addr); + if (err < 0) { + emsg = "_setup_i2c_client fail"; + goto err_init_cpld_4_rst_all; + } + err = self->_pull_high(self); + if (err < 0) { + emsg = "setup default value fail"; + goto err_init_cpld_4_rst_all; + } + SWPS_DEBUG("%s: init_cpld_i2c_c0_a77_70_74_rst_all ok", __func__); + return 0; + +err_init_cpld_4_rst_all: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +clean_gpio_4_common(struct mux_obj_s *self){ + + if (!self) return 0; + if (!gpio_is_valid(self->gpio_num)) return 0; + self->_pull_high(self); + gpio_free(mux_head_p->gpio_num); + return 0; +} + + +int +clean_cpld_4_rst_all(struct mux_obj_s *self){ + + if (!self) return 0; + self->_pull_high(self); + if (self->i2c_client_p) { + i2c_put_adapter(self->i2c_client_p->adapter); + kfree(self->i2c_client_p); + } + return 0; +} + + +static int +_setup_muxctl_cb(struct mux_obj_s *self, + unsigned gpio){ + + char mod_dsc[32] = "ERR"; + + switch (gpio) { + case MUX_RST_GPIO_FORCE_RANGELEY: + self->gpio_num = gpio; + self->_pull_low = rangeley_force_pull_low; + self->_pull_high = rangeley_force_pull_high; + self->_init = init_gpio_4_force; + self->_clean = clean_gpio_4_common; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Rangeley force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_FORCE_HEDERA: + self->gpio_num = gpio; + self->_pull_low = hedera_force_pull_low; + self->_pull_high = hedera_force_pull_high; + self->_init = init_gpio_4_force; + self->_clean = clean_gpio_4_common; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Hedera force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_48_PCA9548: + case MUX_RST_GPIO_69_PCA9548: + case MUX_RST_GPIO_249_PCA9548: + case MUX_RST_GPIO_500_PCA9548: + case MUX_RST_GPIO_505_PCA9548: + self->gpio_num = gpio; + self->_pull_low = normal_gpio_pull_low; + self->_pull_high = normal_gpio_pull_high; + self->_init = init_gpio_4_normal; + self->_clean = clean_gpio_4_common; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Normal mode :%d", (int)gpio); + goto ok_setup_muxctl_cb; + + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + self->gpio_num = gpio; + self->_pull_low = cpld_rst_all_4_pull_low; + self->_pull_high = cpld_rst_all_4_pull_high; + self->_init = init_cpld_4_rst_all; + self->_clean = clean_cpld_4_rst_all; + self->reset = cpld_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "CPLD mode :%d", (int)gpio); + goto ok_setup_muxctl_cb; + + default: + break; + } + SWPS_ERR("%s: Unexpected GPIO:%d\n", __func__, gpio); + return -1; + +ok_setup_muxctl_cb: + SWPS_INFO("muxctl: %s.\n", mod_dsc); + return 0; +} + + +/* ========== MUX public functions ========== + */ +void +clean_mux_objs(void){ + + struct mux_obj_s *curr_p = mux_head_p; + struct mux_obj_s *next_p = NULL; + + if (!curr_p) { + SWPS_DEBUG("%s: mux_head_p is NULL\n", __func__); + return; + } + while (curr_p) { + next_p = curr_p->next; + curr_p->_clean(curr_p); + kfree(curr_p); + curr_p = next_p; + } + SWPS_DEBUG("%s: done.\n", __func__); +} +EXPORT_SYMBOL(clean_mux_objs); + + +int +reset_mux_objs(void){ + + if (!mux_head_p) { + SWPS_ERR("%s: MUX ctl object doesn't exist!\n", __func__); + return -1; + } + if (mux_head_p->reset(mux_head_p) < 0){ + SWPS_ERR("%s: reset fail!\n", __func__); + return -1; + } + return 0; +} +EXPORT_SYMBOL(reset_mux_objs); + + +struct mux_obj_s * +_create_mux_obj(unsigned gpio){ + + char *emsg = "ERR"; + struct mux_obj_s *obj_p = NULL; + + obj_p = kzalloc(sizeof(struct mux_obj_s), GFP_KERNEL); + if (!obj_p) { + emsg = "kzalloc fail!"; + goto err_create_mux_obj_1; + } + if (_setup_muxctl_cb(obj_p, gpio) < 0){ + emsg = "_setup_muxctl_cb fail!"; + goto err_create_mux_obj_2; + } + if (obj_p->_init(obj_p) < 0) { + emsg = "_init() fail!"; + goto err_create_mux_obj_2; + } + SWPS_DEBUG("%s: created MUX object :%d\n", __func__, gpio); + return obj_p; + +err_create_mux_obj_2: + kfree(obj_p); +err_create_mux_obj_1: + SWPS_ERR("%s: %s :%d\n", __func__, emsg, gpio); + return NULL; +} + + +int +init_mux_objs(unsigned gpio){ + + struct mux_obj_s *curr_p = NULL; + char *emsg = "ERR"; + + /* Create MUX control object */ + if (mux_head_p) { + SWPS_DEBUG("%s: mux_head_p is not NULL!\n", __func__); + clean_mux_objs(); + } + /* Currently, it is using single muxctl architecture. + * In the future, it may use the multi-muxctl. + * (Ex: Gulmohar's advance I2C control / Peony's reset single mux) + */ + curr_p = _create_mux_obj(gpio); + if (!curr_p) { + emsg = "_create_mux_obj fail"; + goto err_init_mux_objs; + } + curr_p->next = NULL; + mux_head_p = curr_p; + SWPS_DEBUG("%s: all done. :%d\n", __func__, gpio); + return 0; + +err_init_mux_objs: + clean_mux_objs(); + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} +EXPORT_SYMBOL(init_mux_objs); + + +/* For single ko module + * => You need to declare MODULE_LICENSE If you want to build single module along. + * => Ex: For ONL platform + */ +MODULE_LICENSE("GPL"); + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_mux.h b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_mux.h new file mode 100644 index 00000000000..a913b24c605 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_mux.h @@ -0,0 +1,51 @@ +#ifndef INV_MUX_H +#define INV_MUX_H + +#include + +/* MUX basic information */ +#define MUX_GPIO_LABEL "SWPS_RST_MUX" + +/* MUX reset GPIO define */ +#define MUX_RST_GPIO_FORCE (30100) +#define MUX_RST_GPIO_FORCE_RANGELEY (30101) +#define MUX_RST_GPIO_FORCE_HEDERA (30102) +#define MUX_RST_GPIO_48_PCA9548 (48) +#define MUX_RST_GPIO_69_PCA9548 (69) +#define MUX_RST_GPIO_249_PCA9548 (249) +#define MUX_RST_GPIO_500_PCA9548 (500) +#define MUX_RST_GPIO_505_PCA9548 (505) +#define MUX_RST_CPLD_C0_A77_70_74_RST_ALL (30201) + +/* MUX relate value define */ +#define MUX_RST_WAIT_MS_PCA9548 (1) +#define MUX_RST_WAIT_MS_CPLD (10) +#define MUX_RST_MEM_ADDR_RANGELEY (0) // TBD +#define MUX_RST_MEM_ADDR_HEDERA (0x548) + +/* MUX error code define */ +#define ERR_MUX_UNEXCPT (-399) + +struct mux_obj_s { + struct i2c_client *i2c_client_p; + struct mux_obj_s *next; + unsigned gpio_num; + int (*_pull_high)(struct mux_obj_s *self); + int (*_pull_low)(struct mux_obj_s *self); + int (*_init)(struct mux_obj_s *self); + int (*_clean)(struct mux_obj_s *self); + int (*reset)(struct mux_obj_s *self); +}; + + +void clean_mux_objs(void); +int reset_mux_objs(void); +int init_mux_objs(unsigned gpio); + + +#endif /* INV_MUX_H */ + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_platform.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_platform.c new file mode 100644 index 00000000000..a4f2b3a2d1f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_platform.c @@ -0,0 +1,297 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +struct inv_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +#define bus_id(id) (id) +static struct pca954x_platform_mode pca9641_modes_1[] = { + {.adap_id = bus_id(2),}, +}; + +static struct pca954x_platform_mode pca9641_modes_2[] = { + {.adap_id = bus_id(5),}, +}; + +static struct pca954x_platform_mode pca9641_modes_3[] = { + {.adap_id = bus_id(3),}, +}; + +static struct pca954x_platform_mode pca9641_modes_4[] = { + {.adap_id = bus_id(4),}, +}; + +static struct pca954x_platform_mode mux_modes_0[] = { + {.adap_id = bus_id(6),}, {.adap_id = bus_id(7),}, + {.adap_id = bus_id(8),}, {.adap_id = bus_id(9),}, + {.adap_id = bus_id(10),}, {.adap_id = bus_id(11),}, + {.adap_id = bus_id(12),}, {.adap_id = bus_id(13),}, +}; +static struct pca954x_platform_mode mux_modes_0_0[] = { + {.adap_id = bus_id(14),}, {.adap_id = bus_id(15),}, + {.adap_id = bus_id(16),}, {.adap_id = bus_id(17),}, + {.adap_id = bus_id(18),}, {.adap_id = bus_id(19),}, + {.adap_id = bus_id(20),}, {.adap_id = bus_id(21),}, +}; + +static struct pca954x_platform_mode mux_modes_0_1[] = { + {.adap_id = bus_id(22),}, {.adap_id = bus_id(23),}, + {.adap_id = bus_id(24),}, {.adap_id = bus_id(25),}, + {.adap_id = bus_id(26),}, {.adap_id = bus_id(27),}, + {.adap_id = bus_id(28),}, {.adap_id = bus_id(29),}, +}; + +static struct pca954x_platform_mode mux_modes_0_2[] = { + {.adap_id = bus_id(30),}, {.adap_id = bus_id(31),}, + {.adap_id = bus_id(32),}, {.adap_id = bus_id(33),}, + {.adap_id = bus_id(34),}, {.adap_id = bus_id(35),}, + {.adap_id = bus_id(36),}, {.adap_id = bus_id(37),}, +}; + +static struct pca954x_platform_mode mux_modes_0_3[] = { + {.adap_id = bus_id(38),}, {.adap_id = bus_id(39),}, + {.adap_id = bus_id(40),}, {.adap_id = bus_id(41),}, + {.adap_id = bus_id(42),}, {.adap_id = bus_id(43),}, + {.adap_id = bus_id(44),}, {.adap_id = bus_id(45),}, +}; + +static struct pca954x_platform_mode mux_modes_0_4[] = { + {.adap_id = bus_id(46),}, {.adap_id = bus_id(47),}, + {.adap_id = bus_id(48),}, {.adap_id = bus_id(49),}, + {.adap_id = bus_id(50),}, {.adap_id = bus_id(51),}, + {.adap_id = bus_id(52),}, {.adap_id = bus_id(53),}, +}; + +static struct pca954x_platform_mode mux_modes_0_5[] = { + {.adap_id = bus_id(54),}, {.adap_id = bus_id(55),}, + {.adap_id = bus_id(56),}, {.adap_id = bus_id(57),}, + {.adap_id = bus_id(58),}, {.adap_id = bus_id(59),}, + {.adap_id = bus_id(60),}, {.adap_id = bus_id(61),}, +}; + +static struct pca954x_platform_mode mux_modes_0_6[] = { + {.adap_id = bus_id(62),}, {.adap_id = bus_id(63),}, + {.adap_id = bus_id(64),}, {.adap_id = bus_id(65),}, + {.adap_id = bus_id(66),}, {.adap_id = bus_id(67),}, + {.adap_id = bus_id(68),}, {.adap_id = bus_id(69),}, +}; + +//no i2c device driver attach to mux 7 + +static struct pca954x_platform_data pca9641_data_1 = { + .modes = pca9641_modes_1, + .num_modes = 1, +}; +static struct pca954x_platform_data pca9641_data_2 = { + .modes = pca9641_modes_2, + .num_modes = 1, +}; +static struct pca954x_platform_data pca9641_data_3 = { + .modes = pca9641_modes_3, + .num_modes = 1, +}; +static struct pca954x_platform_data pca9641_data_4 = { + .modes = pca9641_modes_4, + .num_modes = 1, +}; +static struct pca954x_platform_data mux_data_0 = { + .modes = mux_modes_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_0 = { + .modes = mux_modes_0_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_1 = { + .modes = mux_modes_0_1, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_2 = { + .modes = mux_modes_0_2, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_3 = { + .modes = mux_modes_0_3, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_4 = { + .modes = mux_modes_0_4, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_5 = { + .modes = mux_modes_0_5, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_6 = { + .modes = mux_modes_0_6, + .num_modes = 8, +}; + +static struct i2c_board_info i2c_device_info0[] __initdata = { + {"pca9641", 0, 0x76, &pca9641_data_1, 0, 0}, //PCA9641-1 + {"pca9641", 0, 0x73, &pca9641_data_3, 0, 0}, //PCA9641-3 + {"pca9641", 0, 0x09, &pca9641_data_4, 0, 0}, //PCA9641-4 +}; +static struct i2c_board_info i2c_device_info1[] __initdata = { + {"pca9641", 0, 0x0A, &pca9641_data_2, 0, 0}, //PCA9641-2 +}; +static struct i2c_board_info i2c_device_info2[] __initdata = { + {"inv_cpld", 0, 0x77, 0, 0, 0}, //CPLD +}; +static struct i2c_board_info i2c_device_info3[] __initdata = { + {"tmp75", 0, 0x48, 0, 0, 0}, //CPU Board Temp + {"tmp75", 0, 0x4A, 0, 0, 0}, //Temp + {"tmp75", 0, 0x4D, 0, 0, 0}, //Temp + {"tmp75", 0, 0x4E, 0, 0, 0}, //Temp +}; +static struct i2c_board_info i2c_device_info4[] __initdata = { + {"inv_psu", 0, 0x5B, 0, 0, 0}, //PSU1 + {"inv_psu", 0, 0x5A, 0, 0, 0}, //PSU2 +}; +static struct i2c_board_info i2c_device_info5[] __initdata = { + {"pca9548", 0, 0x70, &mux_data_0, 0, 0}, //mux root +}; +static struct i2c_board_info i2c_device_info6[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_0, 0, 0}, +}; +static struct i2c_board_info i2c_device_info7[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_1, 0, 0}, +}; +static struct i2c_board_info i2c_device_info8[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_2, 0, 0}, +}; +static struct i2c_board_info i2c_device_info9[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_3, 0, 0}, +}; +static struct i2c_board_info i2c_device_info10[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_4, 0, 0}, +}; +static struct i2c_board_info i2c_device_info11[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_5, 0, 0}, +}; +static struct i2c_board_info i2c_device_info12[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_6, 0, 0}, +}; + + +static struct inv_i2c_board_info i2cdev_list[] = { + {bus_id(0), ARRAY_SIZE(i2c_device_info0), i2c_device_info0 }, //SMBus + {bus_id(1), ARRAY_SIZE(i2c_device_info1), i2c_device_info1 }, //pca9641-2 + {bus_id(2), ARRAY_SIZE(i2c_device_info2), i2c_device_info2 }, //pca9641-1 + {bus_id(3), ARRAY_SIZE(i2c_device_info3), i2c_device_info3 }, //pca9641-3 + {bus_id(4), ARRAY_SIZE(i2c_device_info4), i2c_device_info4 }, //pca9641-4 + {bus_id(5), ARRAY_SIZE(i2c_device_info5), i2c_device_info5 }, //mux root + {bus_id(6), ARRAY_SIZE(i2c_device_info6), i2c_device_info6 }, //mux CH0 + {bus_id(7), ARRAY_SIZE(i2c_device_info7), i2c_device_info7 }, //mux CH1 + {bus_id(8), ARRAY_SIZE(i2c_device_info8), i2c_device_info8 }, //mux CH2 + {bus_id(9), ARRAY_SIZE(i2c_device_info9), i2c_device_info9 }, //mux CH3 + {bus_id(10),ARRAY_SIZE(i2c_device_info10), i2c_device_info10}, //mux CH4 + {bus_id(11),ARRAY_SIZE(i2c_device_info11), i2c_device_info11}, //mux CH5 + {bus_id(12),ARRAY_SIZE(i2c_device_info12), i2c_device_info12}, //mux CH6 +}; + +#define INV_PLATFORM_CLIENT_MAX_NUM 50 /*A big enough number for sum of i2cdev_list[i].size */ +static int client_list_index = 0; +static struct i2c_client *client_list[INV_PLATFORM_CLIENT_MAX_NUM] = {0}; + +///////////////////////////////////////////////////////////////////////////////////////// +static struct platform_device *device_i2c_gpio0; +static struct i2c_gpio_platform_data i2c_gpio_platdata0 = { + .scl_pin = 58, //494, + .sda_pin = 75, //511, + + .udelay = 5, //5:100kHz + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .scl_is_output_only = 0 +}; + +static int __init inv_platform_init(void) +{ + struct i2c_adapter *adap = NULL; + struct i2c_client *e = NULL; + int ret = 0; + int i,j,k; + + //printk("%s \n", __func__); + + //use i2c-gpio + //register i2c gpio + //config gpio58,75 to gpio function 58=32+3*8+2 75=32*2+8*1+3 gpio69=32*2+8*0+5 + outl( inl(0x533) | (1<<2), 0x533); //i2c-gpio sdl (GPIO58) + outl( inl(0x541) | (1<<3), 0x541); //i2c-gpio sda (GPIO75) + outl( inl(0x540) | (1<<5), 0x540); //RST_I2C_MUX_N (GPIO69) + outl( inl(0x500) | (1<<7), 0x500); //SYS_RDY_N (GPIO7) + outl( inl(0x501) | (1<<7), 0x501); //BMC_HEART_BEAT (GPIO15) + outl( inl(0x503) | (1<<2)|(1<<3), 0x503); //PSOC_HEART_BEAT(26),CPLD_HEART_BEAT(27) + + device_i2c_gpio0 = platform_device_alloc("i2c-gpio", 1); + if (!device_i2c_gpio0) { + printk(KERN_ERR "i2c-gpio: platform_device_alloc fail\n"); + return -ENOMEM; + } + device_i2c_gpio0->name = "i2c-gpio"; + device_i2c_gpio0->id = 1; + device_i2c_gpio0->dev.platform_data = &i2c_gpio_platdata0; + + ret = platform_device_add(device_i2c_gpio0); + if (ret) { + printk(KERN_ERR "i2c-gpio: platform_device_add fail %d\n", ret); + } + msleep(10); + + for(i=0; i=0; i--) { + i2c_unregister_device(client_list[i]); + } + device_i2c_gpio0->dev.platform_data = NULL; + platform_device_unregister(device_i2c_gpio0); + printk("inv_platform_exit done\n"); +} + +module_init(inv_platform_init); +module_exit(inv_platform_exit); + +MODULE_AUTHOR("Inventec"); +MODULE_DESCRIPTION("Platform devices"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_proxy.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_proxy.c new file mode 100644 index 00000000000..e55db84ab00 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_proxy.c @@ -0,0 +1,991 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include "inv_proxy.h" + +static DEFINE_MUTEX(psoc_lock); +static int flag_psoc_io = 1; + +struct vpd_info_s *vpd = NULL; + + +unsigned long +get_jiffies_after_ms(int ms) { + + int ms_jiffies = 0; + + if (ms == 0) { + return jiffies; + } + ms_jiffies = ((ms * HZ) / 1000); + if (ms_jiffies == 0) { + ms_jiffies = 1; + } + return (jiffies + ms_jiffies); +} + + + +char* str_replace(char* str, char* search, char* replace) +{ + char *buf = DEBUG_INV_STR; + char *pos = DEBUG_INV_STR; + char *in = DEBUG_INV_STR; + char *out = DEBUG_INV_STR; + long slen = strlen(search); + long rlen = strlen(replace); + size_t count = 0; + size_t buf_size = 0; + + /* Calculate the frequency */ + pos = str; + while((pos = strstr(pos, search))) + { + count += 1; + pos += slen; + } + /* Calculate size of new string */ + buf_size = (long)strlen(str) + count*(rlen - slen) + 1; + + /* Copy and replace */ + buf = kzalloc(buf_size, GFP_KERNEL); + if(!buf) { + return NULL; + } + pos = in = str; + out = buf; + while((pos = strstr(pos, search))) + { + strncpy(out, in, pos - in); + out += pos - in; + strcpy(out, replace); + out += rlen; + pos += slen; + in = pos; + } + strcpy(out, in); + return buf; +} + + +void +str_line_to_var(char *str) { + + char *mark = NULL; + mark = strpbrk(str, "\n"); + if (mark) + *mark = '\0'; +} + + +int +sscanf_2_int(const char *buf) { + + int result = -EBFONT; + char *hex_tag = "0x"; + + if (strcspn(buf, hex_tag) == 0) { + if (sscanf(buf,"%x",&result)) { + return result; + } + } else { + if (sscanf(buf,"%d",&result)) { + return result; + } + if (sscanf(buf,"%x",&result)) { + return result; + } + } + return -EBFONT; +} + + +int +is_ufile_exist(const char *path) { + + struct file *fp = filp_open(path, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -1; + filp_close(fp, NULL); + return 0; + +} + + +int +read_ufile(const char *path, + char *buf, + size_t len) { + + struct file *fp; + mm_segment_t fs; + loff_t pos; + + if (len >= MAX_ACC_SIZE) { + len = MAX_ACC_SIZE - 1; + } + fp = filp_open(path, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + fs = get_fs(); + set_fs(KERNEL_DS); + pos = 0; + vfs_read(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + return 0; +} + + +int +write_ufile(const char *path, + char *buf, + size_t len) { + + struct file *fp; + mm_segment_t fs; + loff_t pos; + + if (len >= MAX_ACC_SIZE) { + len = MAX_ACC_SIZE - 1; + } + fp = filp_open(path, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + fs = get_fs(); + set_fs(KERNEL_DS); + pos = 0; + vfs_write(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + return 0; +} + + +int +_is_hwmon_errno(char *result) { + +#if 0 + char *str_eio = "-5\n"; + char *str_enxio = "-6\n"; + char *str_negative = "-"; + char *str_no_ctl = "64250\n"; /* 0xFAFA */ + + if (strcmp(result, str_eio) == 0) { + return -EIO; + } + if (strcmp(result, str_enxio) == 0) { + return -ENXIO; + } + if (strcmp(result, str_no_ctl) == 0) { + return ERR_NO_CTLER; + } + if (strcspn(result, str_negative) == 0) { + /* error case: "-202" */ + return ERR_NEGATIVE_VAL; + } +#endif + return 0; +} + + +int +_is_swps_errno(char *result) { + + char *str_negative = "-"; + + if (strcspn(result, str_negative) == 0) { + /* error case: "-202" */ + return -ENODATA; + } + return 0; +} + + +int +_read_attr_common(char *path, + char *buf, + int buf_len, + int (*check_err)(char* buf), + int (*transform)(char *buf, int buf_len, int err) ){ + + int err = DEBUG_INV_INT; + int acc_len = MAX_ACC_SIZE-1; + + memset(buf, 0, buf_len); + err = read_ufile(path, buf, acc_len); + if (err < 0) { + return err; + } + err = check_err(buf); + if (err < 0) { + return err; + } + err = transform(buf, buf_len, err); + if (err < 0){ + return err; + } + return err; +} + + +int +_write_attr_common(char *path, + const char *buf, + int (*transform)(const char *buf, char *tmp) ){ + + int err = DEBUG_INV_INT; + int acc_len = MAX_ACC_SIZE-1; + char tmp[MAX_LEN_TRNASFORM_W_TMP] = DEBUG_INV_STR; + + memset(tmp, 0, MAX_LEN_TRNASFORM_W_TMP); + err = transform(buf, tmp); + if (err < 0) { + return err; + } + err = write_ufile(path, tmp, acc_len); + if (err < 0){ + return err; + } + return 0; +} + + +void +set_psco_io_flag(int flag) { + + /* IO will be disabled if flag = 0 */ + mutex_lock(&psoc_lock); + flag_psoc_io = flag; + mutex_unlock(&psoc_lock); +} + + +int +get_psco_io_flag(void) { + + int ret = 0; + + mutex_lock(&psoc_lock); + ret = flag_psoc_io; + mutex_unlock(&psoc_lock); + return ret; +} + +int +transform_4_read_uint8(char *buf, + int buf_len, + int err) { + + int limit = 32; + int result = DEBUG_INV_HEX; + + if (err < 0) { + goto err_transform_4_read_uint8; + } + if (sscanf(buf, "%x", &result) != 1) { + err = -EBFONT; + goto err_transform_4_read_uint8; + } + if (result == DEBUG_INV_HEX) { + err = -EBFONT; + goto err_transform_4_read_uint8; + } + memset(buf, 0, buf_len); + snprintf(buf, limit, "%02x \n", result); + return 0; + +err_transform_4_read_uint8: + snprintf(buf, limit, "%d\n", err); + return err; +} + + +int +transform_4_read_int(char *buf, + int buf_len, + int err) { + + int limit = 32; + int result = DEBUG_INV_INT; + + if (err < 0) { + goto err_transform_4_read_int; + } + if (sscanf(buf, "%d", &result) != 1) { + err = -EBFONT; + if( sscanf(buf,"-%d",&result) == 1 ){ + result = -result; + err = 0; + } + else + goto err_transform_4_read_int; + } + if (result == DEBUG_INV_INT) { + err = -EBFONT; + goto err_transform_4_read_int; + } + memset(buf, 0, buf_len); + snprintf(buf, limit, "%d\n", result); + return 0; + +err_transform_4_read_int: + snprintf(buf, limit, "%d\n", err); + return err; +} + + +int +transform_4_read_percent(char *buf, + int buf_len, + int err) { + + int limit = 32; + int result = DEBUG_INV_INT; + int iErrHandle = 0; + + if (err < 0) { + iErrHandle = 1; + } + if (sscanf(buf, "%d", &result) != 1) { + err = -EBFONT; + iErrHandle = 1; + } + if (result == DEBUG_INV_INT) { + err = -EBFONT; + iErrHandle = 1; + } + memset(buf, 0, buf_len); + if( !iErrHandle ){ + result = (result * 100 )/255; + snprintf(buf, limit, "%d\n", result); + return 0; + } + else{ + snprintf(buf, limit, "%d\n", err); + return err; + } +} + +int +transform_4_read_positive(char *buf, + int buf_len, + int err) { + + int result = DEBUG_INV_INT; + int check = transform_4_read_int(buf, buf_len, err); + + if (check < 0) { + return check; + } + if (sscanf(buf, "%d", &result) != 1){ + return -EBFONT; + } + if (result < 0) { + return ERR_NEGATIVE_VAL; + } + if (result == 0) { + return ERR_ZERO_VAL; + } + return 0; +} + + +int +transform_4_read_binary(char *buf, + int buf_len, + int err) { + + int result = DEBUG_INV_INT; + int check = transform_4_read_int(buf, buf_len, err); + + if (check < 0) { + return check; + } + if (sscanf(buf, "%d", &result) != 1){ + return -EBFONT; + } + if ((result == 0) || (result == 1)) { + return 0; + } + return - ERANGE; +} + + +int +transform_4_read_str(char *buf, + int buf_len, + int err) { + + if (err < 0) { + goto err_transform_4_read_str; + } + return 0; + +err_transform_4_read_str: + snprintf(buf, buf_len, "%d\n", err); + return err; +} + + +int +transform_4_write_binary(const char *buf, char *tmp) { + + int input = sscanf_2_int(buf); + + if (input < 0) { + return input; + } + if ( (input == 0) || (input == 1) ) { + goto ok_transform_4_write_binary; + } + return -EBFONT; + +ok_transform_4_write_binary: + memset(tmp, 0, MAX_LEN_TRNASFORM_W_TMP); + snprintf(tmp, MAX_LEN_TRNASFORM_W_TMP, "%d", input); + return 0; +} + + +int +transform_4_write_uint8(const char *buf, char *tmp) { + + int input = sscanf_2_int(buf); + + if (input < 0) { + return input; + } + if ((input >= 0x0) && (input <= 0xff)) { + goto ok_transform_4_write_uint8; + } + return -EBFONT; + +ok_transform_4_write_uint8: + memset(tmp, 0, MAX_LEN_TRNASFORM_W_TMP); + snprintf(tmp, MAX_LEN_TRNASFORM_W_TMP, "%d", input); + return 0; +} +int +transform_4_write_percent(const char *buf, char *tmp) { + + int input = sscanf_2_int(buf); + + if (input < 0) { + return input; + } + if ((input >= 0) && (input <= 100)) { + input = (input *255)/100; + memset(tmp, 0, MAX_LEN_TRNASFORM_W_TMP); + snprintf(tmp, MAX_LEN_TRNASFORM_W_TMP, "%d", input); + return 0; + } + return -EBFONT; + +} + + +int +transform_4_write_int(const char *buf, char *tmp) { + + int input; + + if (sscanf(buf, "%d", &input) == 1){ + goto ok_transform_4_write_int; + } + if (sscanf(buf, "%x", &input) == 1){ + goto ok_transform_4_write_int; + } + return -EBFONT; + +ok_transform_4_write_int: + memset(tmp, 0, MAX_LEN_TRNASFORM_W_TMP); + snprintf(tmp, MAX_LEN_TRNASFORM_W_TMP, "%d", input); + return 0; +} + + +static int +_count_switch_mac(char *base_mac, + char *switch_mac, + int level) { + + int i, ret; + int num[6]; + char *delim = ":"; + char *tmp_str = NULL; + char *tmp_base = NULL; + char tmp_mac[MAX_LEN_VPD_ATTR] = DEBUG_INV_STR; + + if ((level < 0) || (level > 5)) { + goto err_count_switch_mac_1; + } + tmp_base = kzalloc(MAX_LEN_VPD_ATTR, GFP_KERNEL); + if (!tmp_base) { + goto err_count_switch_mac_1; + } + memset(switch_mac, 0, MAX_LEN_VPD_ATTR); + memset(tmp_mac, 0, MAX_LEN_VPD_ATTR); + snprintf(tmp_base, 32, "%s", base_mac); + for (i=0; i<6; i++) { + tmp_str = NULL; + tmp_str = strsep(&tmp_base, delim); + if (!tmp_str) { + goto err_count_switch_mac_2; + } + if (!sscanf(tmp_str,"%x",&(num[i]))) { + goto err_count_switch_mac_2; + } + } + if (num[level] < 0xff) { + num[level] += 1; + snprintf(switch_mac, 32, "%02x:%02x:%02x:%02x:%02x:%02x", + num[0], num[1], num[2], num[3], num[4], num[5]); + ret = 0; + goto ok_count_switch_mac_1; + } else if (num[level] == 0xff) { + num[level] = 0; + level -= 1; + snprintf(tmp_mac, 32, "%02x:%02x:%02x:%02x:%02x:%02x", + num[0], num[1], num[2], num[3], num[4], num[5]); + ret = _count_switch_mac(tmp_mac, switch_mac, level); + goto ok_count_switch_mac_1; + } + goto err_count_switch_mac_2; + +ok_count_switch_mac_1: + if (tmp_base) { + kfree(tmp_base); + } + return ret; + +err_count_switch_mac_2: + if (tmp_base) { + kfree(tmp_base); + } +err_count_switch_mac_1: + return -1; +} + + +static int +_parser_vpd_attr_str(char *line, char *val) { + + int i, off; + int len_result = 0; + int len_ignore = 30; + + if (strlen(line) < len_ignore) { + goto err_parser_vpd_attr_str; + } + len_result = strlen(line) - len_ignore; + if (len_result < strlen(val)) { + PROXY_ERR("detect redundance attribute in VPD."); + goto err_parser_vpd_attr_str; + } + memset(val, 0, MAX_LEN_VPD_ATTR); + for (i=0; i<=len_result; i++) { + off = i + len_ignore; + if ( (line[off] == '\n') || + (line[off] == '\0') || + (i == (len_result)) ){ + val[i] = '\0'; + break; + } + val[i] = line[off]; + } + return 0; + +err_parser_vpd_attr_str: + snprintf(val, MAX_LEN_VPD_ATTR, "NA"); + return -1; +} + + +static int +_parser_vpd_attr_mac(char *line, + char *cpu_mac, + char *switch_mac) { + + int err = _parser_vpd_attr_str(line, cpu_mac); + + if (err < 0) { + PROXY_ERR("%s: Parser CPU MAC fail\n", __func__); + return -1; + } + err = _count_switch_mac(cpu_mac, switch_mac, 5); + if (err < 0) { + PROXY_ERR("%s: Count Switch MAC fail\n", __func__); + return -1; + } + return 0; +} + + +static int +_setup_vpd_attr(char *line) { + + if (strncmp(line, ATTR_VPD_PRODUCT_NAME, strlen(ATTR_VPD_PRODUCT_NAME)) == 0) { + return _parser_vpd_attr_str(line, vpd->product_name); + } + if (strncmp(line, ATTR_VPD_SERIAL_NUM, strlen(ATTR_VPD_SERIAL_NUM)) == 0) { + return _parser_vpd_attr_str(line, vpd->serial_num); + } + if (strncmp(line, ATTR_VPD_VERSION, strlen(ATTR_VPD_VERSION)) == 0) { + return _parser_vpd_attr_str(line, vpd->version); + } + if (strncmp(line, ATTR_VPD_BASE_MAC, strlen(ATTR_VPD_BASE_MAC)) == 0) { + return _parser_vpd_attr_mac(line, vpd->cpu_mac, vpd->switch_mac); + } + if (strncmp(line, ATTR_VPD_DATE, strlen(ATTR_VPD_DATE)) == 0) { + return _parser_vpd_attr_str(line, vpd->date); + } + return 0; +} + + +static int +_read_vpd_attr(char *buf) { + + int ret = 0; + const char *delim = "\n"; + char *vender_name = "Inventec"; + char *line = strsep(&buf, delim); + + while (line != NULL) { + if (_setup_vpd_attr(line) < 0) { + ret = -1; + } + line = strsep(&buf, delim); + } + snprintf(vpd->vendor_name, 32, "%s", vender_name); + return ret; +} + + +static int +_read_vpd_info(void) { + + int err = DEBUG_INV_INT; + char buf[MAX_ACC_SIZE] = DEBUG_INV_STR; + + memset(buf, 0, sizeof(buf)); + err = read_ufile(ATTR_VPD_FILE_PATH, buf, MAX_ACC_SIZE); + if (err < 0) { + PROXY_DEBUG("%s: IO fail. :%d\n", __func__, err); + return err; + } + return _read_vpd_attr(buf); +} + + +struct vpd_info_s * +get_vpd_info(void) { + + int i = 0; + int retry = 5; + int wait_ms = 100; + int err = DEBUG_INV_INT; + + if (vpd) { + return vpd; + } + vpd = kzalloc(sizeof(struct vpd_info_s), GFP_KERNEL); + if (!vpd) { + PROXY_ERR("%s: kzalloc fail. :%d\n", __func__, err); + return NULL; + } + while (i++ < retry) { + if (_read_vpd_info() == 0) { + break; + } + if (i >= retry) { + PROXY_ERR("%s: read VPD fail!\n", __func__); + kfree(vpd); + vpd = NULL; + return NULL; + } + mdelay(wait_ms); + } + PROXY_DEBUG("Get vendor_name : %s\n", vpd->vendor_name); + PROXY_DEBUG("Get product_name : %s\n", vpd->product_name); + PROXY_DEBUG("Get serial_num : %s\n", vpd->serial_num); + PROXY_DEBUG("Get version : %s\n", vpd->version); + PROXY_DEBUG("Get cpu_mac : %s\n", vpd->cpu_mac); + PROXY_DEBUG("Get switch_mac : %s\n", vpd->switch_mac); + PROXY_DEBUG("Get date : %s\n", vpd->date); + return vpd; +} + + +struct i2c_client * +_get_i2c_client(int channel) { + + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + + adap = i2c_get_adapter(VAL_CPLD_CHANNEL); + if(!adap) { + PROXY_ERR("%s: Can't get i2c adap.\n", __func__); + return NULL; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + PROXY_ERR("%s: kzalloc client fail!\n", __func__); + return NULL; + } + client->adapter = adap; + return client; +} + +/* HWMON */ +int +read_hwmon_attr(char *attr, + char *buf, + int buf_len, + int (*transform)(char *buf, int buf_len, int err)) +{ + + int ret = -EIO; + char path[64] = DEBUG_INV_STR; + memset(path, 0, sizeof(path)); + + snprintf(path, sizeof(path), "%s", attr); + ret = _read_attr_common(path, + buf, + buf_len, + _is_hwmon_errno, + transform); +} + +/* PSU */ + +int +read_psu_temperature(char *attr) { + + char tmp[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + memset(tmp, 0, MAX_PATH_SIZE); + + if (read_hwmon_attr(attr, + tmp, + MAX_PATH_SIZE, + transform_4_read_int) < 0) + { + PROXY_ERR("%s: use inv proxy to read path (%s)\n", __func__, attr); + memset(tmp, 0, MAX_PATH_SIZE); + return -1; + } + if (sscanf(tmp, "%d", &result) != 1) + { + if (sscanf(tmp, "-%d", &result) == 1) + { + result = -result; + } + } + return result; +} + +int +read_psu_voltage(char *attr) { + + char tmp[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + memset(tmp, 0, MAX_PATH_SIZE); + + if (read_hwmon_attr(attr, + tmp, + MAX_PATH_SIZE, + transform_4_read_int) < 0) + { + PROXY_ERR("%s: use inv proxy to read path (%s)\n", __func__, attr); + memset(tmp, 0, MAX_PATH_SIZE); + return -1; + } + if (sscanf(tmp, "%d", &result) != 1) + { + if (sscanf(tmp, "-%d", &result) == 1) + { + result = -result; + } + } + return result; +} + +int +read_psu_power(char *attr) { + + char tmp[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + memset(tmp, 0, MAX_PATH_SIZE); + + if (read_hwmon_attr(attr, + tmp, + MAX_PATH_SIZE, + transform_4_read_int) < 0) + { + PROXY_ERR("%s: use inv proxy to read path (%s)\n", __func__, attr); + memset(tmp, 0, MAX_PATH_SIZE); + return -1; + } + if (sscanf(tmp, "%d", &result) != 1) + { + if (sscanf(tmp, "-%d", &result) == 1) + { + result = -result; + } + } + return result; +} + +int +read_psu_present(char *attr) { + + char tmp[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + memset(tmp, 0, MAX_PATH_SIZE); + + if (read_hwmon_attr(attr, + tmp, + MAX_PATH_SIZE, + transform_4_read_str) < 0) + { + PROXY_ERR("%s: use inv proxy to read path (%s)\n", __func__, attr); + memset(tmp, 0, MAX_PATH_SIZE); + return -1; + } + if (sscanf(tmp, "%d:", &result) != 1) + { + return -1; + } + // Default setting from kernel hw driver + // 0 menas "Unpowered" + // 1 means "Normal" + // 2,3 means "Uninstall" + // For the consistency, we will swap them. + // 0 means "Uninstall" + // 1 means "Normal" + // 2 means "Installed but Unpowered" + + if ( result == 0 ) + return 2 ; + if ( result == 2 || result == 3 ) + return 0 ; + return result; +} + +/* FAN */ + +int +read_fan_rpm(char *attr) { + + char tmp[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + memset(tmp, 0, MAX_PATH_SIZE); + + if (read_hwmon_attr(attr, + tmp, + MAX_PATH_SIZE, + transform_4_read_int) < 0) + { + PROXY_ERR("%s: use inv proxy to read path (%s)\n", __func__, attr); + memset(tmp, 0, MAX_PATH_SIZE); + return -1; + } + if (sscanf(tmp, "%d", &result) != 1) + { + return -1; + } + return result; +} + +int +read_fan_present(char *attr) { + + char tmp[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + memset(tmp, 0, MAX_PATH_SIZE); + + if (read_hwmon_attr(attr, + tmp, + MAX_PATH_SIZE, + transform_4_read_str) < 0) + { + PROXY_ERR("%s: use inv proxy to read path (%s)\n", __func__, attr); + memset(tmp, 0, MAX_PATH_SIZE); + return -1; + } + if (sscanf(tmp, "%d:", &result) != 1) + { + return -1; + } + // Default setting from kernel hw driver + // 0 menas "Normal type" + // 1 means "Reversal type" + // 2,3 means "Unplugged" + // For the consistency, we will swap them. + // 0 means "Unplugged" + // 1 means "Normal type" + // 2 means "Reversal type" + if ( result == 0 ) + return 1 ; + if ( result == 1 ) + return 2 ; + if ( result == 2 || result == 3 ) + return 0 ; + return result; +} + +/* CORE */ + +int +read_core_temperature(char *attr) { + + char tmp[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + memset(tmp, 0, MAX_PATH_SIZE); + + if (read_hwmon_attr(attr, + tmp, + MAX_PATH_SIZE, + transform_4_read_int) < 0) + { + PROXY_ERR("%s: use inv proxy to read path (%s)\n", __func__, attr); + memset(tmp, 0, MAX_PATH_SIZE); + return -1 ; + } + if (sscanf(tmp, "%d", &result) != 1) + { + if (sscanf(tmp, "-%d", &result) == 1) + { + result = -result; + } + } + return result; +} + +int +inv_proxy_init(void) { + + if (vpd) { + kfree(vpd); + } + vpd = NULL; + return 0; +} + + +int +inv_proxy_exit(void) { + + if (vpd) { + kfree(vpd); + } + return 0; +} + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_proxy.h b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_proxy.h new file mode 100644 index 00000000000..69a2a0b1c6d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_proxy.h @@ -0,0 +1,126 @@ +#ifndef _INV_PROXY_H_ +#define _INV_PROXY_H_ + +#define MAX_ACC_SIZE (1023) +#define MAX_PATH_SIZE (64) + +/* Alarm define */ +#define ALARM_ASIC_WARN (90) +#define ALARM_CPU_WARN (88) +#define ALARM_ENV_WARN (57) + +/* Val */ +#define VAL_SFP_ID (0x03) +#define VAL_QSFP_ID (0x0c) +#define VAL_QSFP_P_ID (0x0d) +#define VAL_QSFP_28_ID (0x11) +#define VAL_VPD_CHANNEL (0) +#define VAL_VPD_ADDRESS (0x53) +#define VAL_CPLD_CHANNEL (0) +#define VAL_CPLD_ADDRESS (0x55) +#define VAL_SYSLED_MOD_OFFSET (0x0c) +#define VAL_SYSLED_MOD_AUTO "0" /* CPLD_VAL: 0x10 */ +#define VAL_SYSLED_MOD_MANUAL "1" /* CPLD_VAL: 0x11 */ +#define VAL_SYSLED_INV_KEEP_ON (7) +#define VAL_SYSLED_INV_4_HZ (4) +#define VAL_SYSLED_INV_2_HZ (3) +#define VAL_SYSLED_INV_1_HZ (2) +#define VAL_SYSLED_INV_HALF_HZ (1) +#define VAL_SYSLED_INV_OFF (0) +#define VAL_BIOS_MASTER (0x0) +#define VAL_BIOS_SLAVER (0x1) + +/* For uevent attribute key */ +#define UKEY_DEV_TYPE "type" + +/* Private value */ +#define MAX_LEN_TRNASFORM_W_TMP (128) +#define MAX_LEN_VPD_ATTR (32) +#define MAX_LEN_SHOW_NUMBER_BUF (16) +#define MAX_LEN_SHOW_STR_BUF (32) +#define MAX_LEN_SHOW_LSTR_BUF (64) +#define MAX_LEN_SHOW_XLSTR_BUF (128) + +#define DEBUG_INV_HEX (0xfe) +#define DEBUG_INV_INT (-99) +#define DEBUG_INV_STR "INV_DEBUG" + +/* Private error code */ +#define ERR_NOT_OWNER (-10000) +#define ERR_NEGATIVE_VAL (-10001) +#define ERR_ZERO_VAL (-10002) +#define ERR_NO_CTLER (-10003) + +/* VPD info */ +#define ATTR_VPD_FILE_PATH "/tmp/vpd.txt" +//#define ATTR_VPD_VNEDOR_NAME "Vendor Name" +#define ATTR_VPD_PRODUCT_NAME "Product Name" +#define ATTR_VPD_SERIAL_NUM "Serial Number" +#define ATTR_VPD_VERSION "Device Version" +#define ATTR_VPD_BASE_MAC "Base MAC Address" +#define ATTR_VPD_DATE "Manufacture Date" + + +#define PROXY_INFO(fmt, args...) printk( KERN_INFO "[Proxy]: " fmt, ##args) +#define PROXY_ERR(fmt, args...) printk( KERN_ERR "[Proxy]: " fmt, ##args) + +#ifdef DEBUG_PROXY +# define PROXY_DEBUG(fmt, args...) printk( KERN_DEBUG "[Proxy]: " fmt, ##args) +#else +# define PROXY_DEBUG(fmt, args...) +#endif /*DEBUG*/ + + +typedef enum { + INV_PSU_NORMAL = 0, + INV_PSU_UNPOWERED = 2, + INV_PSU_FAULT = 4, + INV_PSU_UNINSTALLED = 7, +}inv_psu_state_t; + +struct vpd_info_s { + char vendor_name[MAX_LEN_VPD_ATTR]; + char product_name[MAX_LEN_VPD_ATTR]; + char serial_num[MAX_LEN_VPD_ATTR]; + char version[MAX_LEN_VPD_ATTR]; + char cpu_mac[MAX_LEN_VPD_ATTR]; + char switch_mac[MAX_LEN_VPD_ATTR]; + char date[MAX_LEN_VPD_ATTR]; +}; + +extern struct vpd_info_s * get_vpd_info(void); +extern char* str_replace(char* str, char* search, char* replace); +extern void str_line_to_var(char *str); +extern void set_psco_io_flag(int flag); +extern int get_psco_io_flag(void); +extern int sscanf_2_int(const char *buf); +extern int is_ufile_exist(const char *path); +extern int transform_4_read_binary(char *buf, int buf_len, int err); +extern int transform_4_read_uint8(char *buf, int buf_len, int err); +extern int transform_4_read_int(char *buf, int buf_len, int err); +extern int transform_4_read_positive(char *buf, int buf_len, int err); +extern int transform_4_read_str(char *buf, int buf_len, int err); +extern int transform_4_write_binary(const char *buf, char *tmp); +extern int transform_4_write_uint8(const char *buf, char *tmp); +extern int transform_4_write_int(const char *buf, char *tmp); +extern int transform_4_read_percent(char *buf, int buf_len, int err); +extern int transform_4_write_percent(const char *buf, char *tmp); +extern int inv_proxy_init(void); +extern int inv_proxy_exit(void); +extern unsigned long get_jiffies_after_ms(int ms); +extern int read_hwmon_attr(char *attr, char *buf, int buf_len, int (*transform)(char *buf, int buf_len, int err)); +extern int read_psu_temperature(char *attr); +extern int read_psu_voltage(char *attr); +extern int read_psu_power(char *attr); +extern int read_psu_present(char *attr); +extern int read_fan_rpm(char *attr); +extern int read_fan_present(char *attr); +extern int read_core_temperature(char *attr); +#endif + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_psu.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_psu.c new file mode 100644 index 00000000000..78e561c194a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_psu.c @@ -0,0 +1,690 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define PMBUS_VOUT_MODE 0x20 +#define PMBUS_FAN_PWM 0x3b +#define PMBUS_READ_VIN 0x88 +#define PMBUS_READ_IIN 0x89 +#define PMBUS_READ_VOUT 0x8b +#define PMBUS_READ_IOUT 0x8c +#define PMBUS_READ_TEMP1 0x8d +#define PMBUS_READ_TEMP2 0x8e +#define PMBUS_READ_TEMP3 0x8f +#define PMBUS_READ_FAN1 0x90 +#define PMBUS_READ_FAN2 0x91 +#define PMBUS_READ_POUT 0x96 +#define PMBUS_READ_PIN 0x97 +#define PMBUS_READ_MFR_ID 0x99 +#define PMBUS_READ_MFR_MODEL 0x9a +#define PMBUS_READ_MFR_REV 0x9b +#define PMBUS_READ_MFR_LOC 0x9c +#define PMBUS_READ_MFR_DATE 0x9d +#define PMBUS_READ_MFR_SERIAL 0x9e + +#define DEFAULT_MFR_FAIL_STR "NA" + +static int retrys = 1; +module_param(retrys, int, 0); +MODULE_PARM_DESC(retrys, "Inventec PSU driver read retry times (default 1)."); + +static int read_only_once = 0; +module_param(read_only_once, int, 0); +MODULE_PARM_DESC(read_only_once, "Inventec PSU driver MFR field read only once flag (default 0)."); + +#define FAN_NUM 2 +#define TMP_NUM 3 + +struct psu_data { + struct device *hwmon_dev; + s32 vin; + s32 vout; + s32 cin; + s32 cout; + s32 pin; + s32 pout; + s32 vout_mode; + s32 rpm[FAN_NUM]; + s32 temp[TMP_NUM]; + s32 pwm; + u8 id[I2C_SMBUS_BLOCK_MAX + 2]; + u8 model[I2C_SMBUS_BLOCK_MAX + 2]; + u8 revision[I2C_SMBUS_BLOCK_MAX + 2]; + u8 location[I2C_SMBUS_BLOCK_MAX + 2]; + u8 date[I2C_SMBUS_BLOCK_MAX + 2]; + u8 serial[I2C_SMBUS_BLOCK_MAX + 2]; +}; + +static s32 reg2data_linear(s32 value, s32 mode, u8 reg) +{ + s16 exponent; + s32 mantissa; + s32 val; + + if (mode) { + s32 parameter = (mode & 0x1f); + exponent = (parameter & 0x10) ? - ((32 - parameter) & 0xf) : (parameter & 0xf); + mantissa = (u16) value; + } else { + exponent = ((s16)value) >> 11; + mantissa = ((s16)((value & 0x7ff) << 5)) >> 5; + } + + val = mantissa; + + if (reg != PMBUS_READ_FAN1 && reg != PMBUS_READ_FAN2 && reg != PMBUS_FAN_PWM) + val = val * 1000; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +static void get_vout_mode(struct i2c_client *client, s32 clean) +{ + struct psu_data *data = i2c_get_clientdata(client); + s32 read = 0, trys = 0; + + if (clean) { + data->vout_mode = 0; + return; + } + + if (data->vout_mode) + return; + + while (trys <= retrys) { + read = i2c_smbus_read_byte_data(client, PMBUS_VOUT_MODE); + if (read < 0) { + trys++; + if (trys > retrys) + return; + continue; + } + break; + } + + data->vout_mode = read; +} + +static ssize_t read_voltage_out(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 vout = 0, trys = 0; + + while (trys <= retrys) { + + vout = i2c_smbus_read_word_data(client, PMBUS_READ_VOUT); + if (vout < 0) { + trys++; + if (trys > retrys) goto fail; + get_vout_mode(client, 1); + continue; + } + + get_vout_mode(client, 0); + + break; + } + + data->vout = reg2data_linear(vout, data->vout_mode, PMBUS_READ_VOUT); + + return sprintf(buf, "%d\n", data->vout); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_voltage_in(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 vin = 0, trys = 0; + + while (trys <= retrys) { + + vin = i2c_smbus_read_word_data(client, PMBUS_READ_VIN); + if (vin < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->vin = reg2data_linear(vin, 0, PMBUS_READ_VIN); + + return sprintf(buf, "%d\n", data->vin); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_current_in(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 cin = 0, trys = 0; + + while (trys <= retrys) { + + cin = i2c_smbus_read_word_data(client, PMBUS_READ_IIN); + if (cin < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->cin = reg2data_linear(cin, 0, PMBUS_READ_IIN); + + return sprintf(buf, "%d\n", data->cin); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_current_out(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 cout = 0, trys = 0; + + while (trys <= retrys) { + + cout = i2c_smbus_read_word_data(client, PMBUS_READ_IOUT); + if (cout < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->cout = reg2data_linear(cout, 0, PMBUS_READ_IOUT); + + return sprintf(buf, "%d\n", data->cout); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_power_in(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 pin = 0, trys = 0; + + while (trys <= retrys) { + + pin = i2c_smbus_read_word_data(client, PMBUS_READ_PIN); + if (pin < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->pin = reg2data_linear(pin, 0, PMBUS_READ_PIN); + + return sprintf(buf, "%d\n", data->pin); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_power_out(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 pout = 0, trys = 0; + + while (trys <= retrys) { + + pout = i2c_smbus_read_word_data(client, PMBUS_READ_POUT); + if (pout < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->pout = reg2data_linear(pout, 0, PMBUS_READ_POUT); + + return sprintf(buf, "%d\n", data->pout); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_temp(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + u8 nr = attr->index; + + while (trys <= retrys) { + + temp = i2c_smbus_read_word_data(client, PMBUS_READ_TEMP1 + nr); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->temp[nr] = reg2data_linear(temp, 0, PMBUS_READ_TEMP1 + nr); + + return sprintf(buf, "%d\n", data->temp[nr]); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_fan(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 rpm = 0, trys = 0; + u8 nr = attr->index; + + while (trys <= retrys) { + + rpm = i2c_smbus_read_word_data(client, PMBUS_READ_FAN1 + nr); + if (rpm < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->rpm[nr] = reg2data_linear(rpm, 0, PMBUS_READ_FAN1 + nr); + + return sprintf(buf, "%d\n", data->rpm[nr]); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_pwm(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 pwm = 0, trys = 0; + + while (trys <= retrys) { + + pwm = i2c_smbus_read_word_data(client, PMBUS_FAN_PWM); + if (pwm < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->pwm = reg2data_linear(pwm, 0, PMBUS_FAN_PWM); + + return sprintf(buf, "%d\n", data->pwm); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + u16 pwm = simple_strtol(buf, NULL, 10); + if(pwm > 100) pwm = 100; + + while (trys <= retrys) { + + temp = i2c_smbus_write_word_data(client, PMBUS_FAN_PWM, pwm); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->pwm = pwm; + + return count; + +fail: + return -1; +} + +static ssize_t read_mfr_id(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->id[0] != 0) + return sprintf(buf, "%s\n", &data->id[1]); + + while (trys <= retrys) { + + temp = i2c_smbus_read_i2c_block_data(client, PMBUS_READ_MFR_ID, I2C_SMBUS_BLOCK_MAX, data->id); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + if(data->id[0]id[data->id[0]+1] = 0; + return sprintf(buf, "%s\n", &data->id[1]); + +fail: + memset(data->id, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_model(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->model[0] != 0) + return sprintf(buf, "%s\n", &data->model[1]); + + while (trys <= retrys) { + + temp = i2c_smbus_read_i2c_block_data(client, PMBUS_READ_MFR_MODEL, I2C_SMBUS_BLOCK_MAX, data->model); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + if(data->model[0]model[data->model[0]+1] = 0; + return sprintf(buf, "%s\n", &data->model[1]); + +fail: + memset(data->model, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_revision(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->revision[0] != 0) + return sprintf(buf, "%s\n", &data->revision[1]); + + while (trys <= retrys) { + + temp = i2c_smbus_read_i2c_block_data(client, PMBUS_READ_MFR_REV, I2C_SMBUS_BLOCK_MAX, data->revision); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + if(data->revision[0]revision[data->revision[0]+1] = 0; + return sprintf(buf, "%s\n", &data->revision[1]); + +fail: + memset(data->revision, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_location(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->location[0] != 0) + return sprintf(buf, "%s\n", &data->location[1]); + + while (trys <= retrys) { + + temp = i2c_smbus_read_i2c_block_data(client, PMBUS_READ_MFR_LOC, I2C_SMBUS_BLOCK_MAX, data->location); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + if(data->location[0]location[data->location[0]+1] = 0; + return sprintf(buf, "%s\n", &data->location[1]); + +fail: + memset(data->location, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_date(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->date[0] != 0) + return sprintf(buf, "%s\n", &data->date[1]); + + while (trys <= retrys) { + + temp = i2c_smbus_read_i2c_block_data(client, PMBUS_READ_MFR_DATE, I2C_SMBUS_BLOCK_MAX, data->date); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + if(data->date[0]date[data->date[0]+1] = 0; + return sprintf(buf, "%s\n", &data->date[1]); + +fail: + memset(data->date, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_sn(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->serial[0] != 0) + return sprintf(buf, "%s\n", &data->serial[1]); + + while (trys <= retrys) { + + temp = i2c_smbus_read_i2c_block_data(client, PMBUS_READ_MFR_SERIAL, I2C_SMBUS_BLOCK_MAX, data->serial); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + if(data->serial[0]serial[data->serial[0]+1] = 0; + return sprintf(buf, "%s\n", &data->serial[1]); + +fail: + memset(data->serial, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, read_voltage_in, 0, 0); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, read_voltage_out, 0, 0); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, read_current_in, 0, 0); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, read_current_out, 0, 0); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, read_power_in, 0, 0); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, read_power_out, 0, 0); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, read_temp, 0, 0); +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, read_temp, 0, 1); +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, read_temp, 0, 2); +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, read_fan, 0, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, read_fan, 0, 1); +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, read_pwm, set_pwm, 0); +static SENSOR_DEVICE_ATTR(mfr_id, S_IRUGO, read_mfr_id, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_model, S_IRUGO, read_mfr_model, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_revision, S_IRUGO, read_mfr_revision, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_location, S_IRUGO, read_mfr_location, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_date, S_IRUGO, read_mfr_date, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_serial_number, S_IRUGO, read_mfr_sn, 0, 0); + +static struct attribute *psu_attributes[] = { + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_mfr_id.dev_attr.attr, + &sensor_dev_attr_mfr_model.dev_attr.attr, + &sensor_dev_attr_mfr_revision.dev_attr.attr, + &sensor_dev_attr_mfr_location.dev_attr.attr, + &sensor_dev_attr_mfr_date.dev_attr.attr, + &sensor_dev_attr_mfr_serial_number.dev_attr.attr, + NULL +}; + +static const struct attribute_group psu_group = { + .attrs = psu_attributes, +}; + +/*-----------------------------------------------------------------------*/ +/* device probe and removal */ +static int +inv_psu_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct psu_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &psu_group); + + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &psu_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int inv_psu_remove(struct i2c_client *client) +{ + struct psu_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &psu_group); + hwmon_device_unregister(data->hwmon_dev); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id inv_psu_ids[] = { + { "inv_psu" , 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, inv_psu_ids); + +static struct i2c_driver psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_psu", + }, + .probe = inv_psu_probe, + .remove = inv_psu_remove, + .id_table = inv_psu_ids, +}; + +static int __init inv_psu_init(void) +{ + return i2c_add_driver(&psu_driver); +} + +static void __exit inv_psu_exit(void) +{ + i2c_del_driver(&psu_driver); +} + +MODULE_AUTHOR("Roger Chang "); +MODULE_DESCRIPTION("inventec psu driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_psu_init); +module_exit(inv_psu_exit); + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_swps.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_swps.c new file mode 100644 index 00000000000..2c343d79005 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_swps.c @@ -0,0 +1,3969 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "inv_swps.h" +#include "sff_io.h" +static int ctl_major; +static int port_major; +static int ioexp_total; +static int port_total; +static int block_polling; +static int auto_config; +static int flag_i2c_reset; +static int flag_mod_state; +static unsigned gpio_rest_mux; +static struct class *swp_class_p = NULL; +static struct inv_platform_s *platform_p = NULL; +static struct inv_ioexp_layout_s *ioexp_layout = NULL; +static struct inv_port_layout_s *port_layout = NULL; +int io_no_init = 0; +module_param(io_no_init, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP); +static void swp_polling_worker(struct work_struct *work); +static DECLARE_DELAYED_WORK(swp_polling, swp_polling_worker); + +static int reset_i2c_topology(void); +static int scan_100ms = 0; +#define PROCESS_TIME (3) +static int process_scan = 0; +#define IOEXP_CHECK_TIME (10) /*100ms * PROCESS_TIME(3) * 1 = >~ 5s*/ +static int transvr_minor_curr = 0; + +static int +__swp_match(struct device *dev, +#ifdef SWPS_KERN_VER_AF_3_10 + + const void *data){ +#else + void *data){ +#endif + + char *name = (char *)data; + if (strcmp(dev_name(dev), name) == 0) + return 1; + return 0; +} + + +struct device * +get_swpdev_by_name(char *name){ + struct device *dev = class_find_device(swp_class_p, + NULL, + name, + __swp_match); + return dev; +} + + +static int +sscanf_2_int(const char *buf) { + + int result = -EBFONT; + char *hex_tag = "0x"; + + if (strcspn(buf, hex_tag) == 0) { + if (sscanf(buf,"%x",&result)) { + return result; + } + } else { + if (sscanf(buf,"%d",&result)) { + return result; + } + if(sscanf(buf,"-%d",&result)) { + return -result; + } + if (sscanf(buf,"%x",&result)) { + return result; + } + } + return -EBFONT; +} + + +static int +sscanf_2_binary(const char *buf) { + + int result = sscanf_2_int(buf); + + if (result < 0){ + return -EBFONT; + } + switch (result) { + case 0: + case 1: + return result; + default: + break; + } + return -EBFONT; +} + + +static int +_get_polling_period(void) { + + int retval = 0; + + if (SWP_POLLING_PERIOD == 0) { + return 0; + } + retval = ((SWP_POLLING_PERIOD * HZ) / 1000); + if (retval == 0) { + return 1; + } + return retval; +} + + +static struct transvr_obj_s * +_get_transvr_obj(char *dev_name) { + + struct device *dev_p = NULL; + struct transvr_obj_s *transvr_obj_p = NULL; + + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + return NULL; + } + transvr_obj_p = dev_get_drvdata(dev_p); + if (!transvr_obj_p){ + return NULL; + } + return transvr_obj_p; +} + + +static int +_is_i2c_target_exist(int chan, int addr) { + /* retval: Exist = 1 / Not exist = 0 / Error < 0 + */ + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + int retval = -1; + int err = -1; + int d_offs = 0; + + adap = i2c_get_adapter(chan); + if (!adap) { + SWPS_DEBUG("%s: can't get adapter\n", __func__); + retval = 0; + goto out_is_i2c_target_exist_1; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client) { + SWPS_ERR("%s: kzalloc fail\n", __func__); + retval = -1; + goto out_is_i2c_target_exist_2; + } + client->adapter = adap; + client->addr = addr; + err = i2c_smbus_read_byte_data(client, d_offs); + if (err < 0) { + retval = 0; + } else { + retval = 1; + } + i2c_put_adapter(adap); + kfree(client); + return retval; + +out_is_i2c_target_exist_2: + i2c_put_adapter(adap); +out_is_i2c_target_exist_1: + return retval; +} + + +static void +unlock_tobj_all(void) { + + struct transvr_obj_s *tobj_p; + char port_name[32]; + int port_id = 0; + int minor_curr = 0; + + for (minor_curr=0; minor_currauto_config = auto_config; + unlock_transvr_obj(tobj_p); + SWPS_DEBUG("%s: Set %s auto_config=%d\n", + __func__, tobj_p->swp_name, auto_config); + } + return retval; +} + + +/* ========== R/W Functions module control attribute ========== + */ +static ssize_t +show_attr_platform(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 32, "%s\n", platform_p->name); +} + + +static ssize_t +show_attr_version(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, PAGE_SIZE, "%s\n", SWP_VERSION); +} + + +static ssize_t +show_attr_status(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", flag_mod_state); +} + + +static ssize_t +show_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", auto_config); +} + + +static ssize_t +show_attr_block_poll(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", block_polling); +} +static ssize_t +show_attr_io_no_init(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", io_no_init); +} + + +static int +_check_reset_pwd(const char *buf_p, + size_t count) { + + int in_max = 64; + int in_len = (int)count; + char in_val[64] = "ERR"; + char *emsg = "ERR"; + + if (in_len >= in_max) { + emsg = "input too much"; + goto err_check_reset_pwd; + } + if (!sscanf(buf_p,"%s",in_val)) { + emsg = "format incorrect"; + goto err_check_reset_pwd; + } + if (strcmp(in_val, SWP_RESET_PWD) != 0) { + emsg = "password incorrect"; + goto err_check_reset_pwd; + } + return 0; + +err_check_reset_pwd: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} + + +static ssize_t +store_attr_reset_i2c(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + /* Polling mode */ + if (SWP_POLLING_ENABLE) { + SWPS_INFO("%s: reset I2C :polling\n", __func__); + flag_i2c_reset = 1; + return count; + } + /* Direct mode */ + SWPS_INFO("%s: reset I2C go. :direct\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset fail!\n", __func__); + return -EIO; + } + SWPS_INFO("%s: reset I2C ok. :direct\n", __func__); + return count; +} + + +static ssize_t +store_attr_reset_swps(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p; + char port_name[32] = "ERR"; + int port_id = 0; + int minor_curr = 0; + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + for (minor_curr=0; minor_currstate = STATE_TRANSVR_DISCONNECTED; + unlock_transvr_obj(tobj_p); + SWPS_INFO("%s: reset:%s\n", __func__, tobj_p->swp_name); + } + return count; +} + + +static ssize_t +store_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if (input_val < 0){ + return -EBFONT; + } + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + auto_config = input_val; + _update_auto_config_2_trnasvr(); + return count; +} + + +static ssize_t +store_attr_block_poll( struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if (input_val < 0){ + return -EBFONT; + } + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + + if(input_val != block_polling){ + block_polling = input_val; + if(block_polling){ + cancel_delayed_work_sync(&swp_polling); + } + else{ + schedule_delayed_work(&swp_polling, _get_polling_period()); + } + } + + return count; +} + +static ssize_t +store_attr_io_no_init( struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + + if(input_val != io_no_init){ + io_no_init = input_val; + } + + return count; +} + +/* ========== Show functions: For transceiver attribute ========== + */ +static ssize_t +_show_transvr_hex_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + int result; + + lock_transvr_obj(tobj_p); + result = get_func(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 8, "%d\n", result); + } else { + len = snprintf(buf_p, 8, "0x%02x\n", result); + } + return len; +} + + +static ssize_t +_show_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = snprintf(buf_p, 16, "%d\n", get_func(tobj_p)); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +_show_transvr_str_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p, char* buf), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = get_func(tobj_p, buf_p); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +show_attr_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_id, + buf_p); +} + + +static ssize_t +show_attr_ext_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_ext_id, + buf_p); +} + + +static ssize_t +show_attr_connector(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_connector, + buf_p); +} + + +static ssize_t +show_attr_vendor_name(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_name, + buf_p); +} + + +static ssize_t +show_attr_vendor_pn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_pn, + buf_p); +} + + +static ssize_t +show_attr_vendor_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_rev, + buf_p); +} + + +static ssize_t +show_attr_vendor_sn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_sn, + buf_p); +} + + +static ssize_t +show_attr_power_cls(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + size_t len; + int result; + struct transvr_obj_s *tobj_p; + + tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + lock_transvr_obj(tobj_p); + result = tobj_p->get_power_cls(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 16, "%d\n", result); + } else { + len = snprintf(buf_p, 16, "Power Class %d\n", result); + } + return len; +} + + +static ssize_t +show_attr_br(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_br, + buf_p); +} + + +static ssize_t +show_attr_len_sm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_sm, + buf_p); +} + + +static ssize_t +show_attr_len_smf(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_smf, + buf_p); +} + + +static ssize_t +show_attr_len_om1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om1, + buf_p); +} + + +static ssize_t +show_attr_len_om2(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om2, + buf_p); +} + + +static ssize_t +show_attr_len_om3(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om3, + buf_p); +} + + +static ssize_t +show_attr_len_om4(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om4, + buf_p); +} + + +static ssize_t +show_attr_comp_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_rev, + buf_p); +} + + +static ssize_t +show_attr_comp_eth(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_1, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10_40(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10_40, + buf_p); +} + + +static ssize_t +show_attr_comp_extend(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_extend, + buf_p); +} + + +static ssize_t +show_attr_rate_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_rate_id, + buf_p); +} + + +static ssize_t +show_attr_temperature(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_temp, + buf_p); +} + + +static ssize_t +show_attr_voltage(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_vol, + buf_p); +} + + +static ssize_t +show_attr_tx_bias(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_bias, + buf_p); +} + + +static ssize_t +show_attr_tx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power, + buf_p); +} + + +static ssize_t +show_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_eq, + buf_p); +} + + +static ssize_t +show_attr_rx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power, + buf_p); +} + + +static ssize_t +show_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_am, + buf_p); +} + + +static ssize_t +show_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_em, + buf_p); +} + + +static ssize_t +show_attr_wavelength(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_wavelength, + buf_p); +} + + +static ssize_t +show_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_offset, + buf_p); +} + + +static ssize_t +show_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_reg, + buf_p); +} + + +static ssize_t +show_attr_info(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_info, + buf_p); +} + + +static ssize_t +show_attr_if_type(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_type, + buf_p); +} + + +static ssize_t +show_attr_if_speed(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_speed, + buf_p); +} + + +static ssize_t +show_attr_if_lane(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_lane, + buf_p); +} + + +static ssize_t +show_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_cdr, + buf_p); +} + + +static ssize_t +show_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs0, + buf_p); +} + + +static ssize_t +show_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs1, + buf_p); +} + + +static ssize_t +show_attr_soft_rx_los(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_rx_los, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_auto_tx_disable, + buf_p); +} + +static ssize_t +show_attr_eeprom(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_eeprom, + buf_p); +} + +static ssize_t +show_attr_eeprom_a0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_eeprom_a0, + buf_p); +} + +static ssize_t +show_attr_eeprom_a2(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_eeprom_a2, + buf_p); +} + +static ssize_t +show_attr_eeprom_page03(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_eeprom_page03, + buf_p); +} + +static ssize_t +show_attr_temp_high_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_temp_high_alarm, + buf_p); +} + +static ssize_t +show_attr_temp_low_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_temp_low_alarm, + buf_p); +} + +static ssize_t +show_attr_voltage_high_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_voltage_high_alarm, + buf_p); +} + +static ssize_t +show_attr_voltage_low_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_voltage_low_alarm, + buf_p); +} + +static ssize_t +show_attr_bias_high_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_bias_high_alarm, + buf_p); +} + +static ssize_t +show_attr_bias_low_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_bias_low_alarm, + buf_p); +} + +static ssize_t +show_attr_rx_power_high_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power_high_alarm, + buf_p); +} + +static ssize_t +show_attr_rx_power_low_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power_low_alarm, + buf_p); +} + +static ssize_t +show_attr_tx_power_high_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power_high_alarm, + buf_p); +} + +static ssize_t +show_attr_tx_power_low_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power_low_alarm, + buf_p); +} + +static ssize_t +show_attr_temp_high_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_temp_high_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_temp_low_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_temp_low_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_voltage_high_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_voltage_high_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_voltage_low_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_voltage_low_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_bias_high_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_bias_high_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_bias_low_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_bias_low_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_rx_power_high_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power_high_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_rx_power_low_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power_low_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_tx_power_high_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power_high_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_tx_power_low_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power_low_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_manufacturing_date(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_manufacturing_date, + buf_p); +} +/* ========== Store functions: transceiver (R/W) attribute ========== + */ +static ssize_t +_store_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_byte_hex_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if ((input < 0) || (input > 0xff)){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_binary_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_binary(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_cdr, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs1, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int check = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((check < 0) || (check > 0xf)){ + return -EBFONT; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_soft_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int err = -EPERM; + int input = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((input < 0) || (input > 0xf)){ + if (input != VAL_TRANSVR_FUNCTION_DISABLE) { + return -EBFONT; + } + } + lock_transvr_obj(tobj_p); + err = tobj_p->set_auto_tx_disable(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_tx_eq, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_am, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_em, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_offset, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_reg, + buf_p, + count); +} + +/* ========== Show functions: For I/O Expander attribute ========== + */ +static ssize_t +_show_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*get_func)(struct ioexp_obj_s *ioexp_p, int voffset), + char *buf_p) { + size_t len; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR(" %s: data corruption! :%s\n", __func__, tobj_p->swp_name); + return -ENODATA; + } + mutex_lock(&ioexp_p->lock); + len = snprintf(buf_p, 8, "%d\n", get_func(ioexp_p, tobj_p->ioexp_virt_offset)); + mutex_unlock(&ioexp_p->lock); + return len; +} + + +static ssize_t +show_attr_present(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + int data = 0; + size_t len; + if (!tobj_p){ + return -ENODEV; + } + data = present_st_get(tobj_p->port_id); + len = snprintf(buf_p, PAGE_SIZE, "%d\n", data); + return len; +#if 0 + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_present, + buf_p); +#endif +} + + +static ssize_t +show_attr_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + int data = 0; + int len; + if (!tobj_p){ + return -ENODEV; + } + + data = txfault_get(tobj_p->port_id); + len = snprintf(buf_p, PAGE_SIZE, "%d\n", data); + return len; +#if 0 + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_fault, + buf_p); +#endif +} + + +static ssize_t +show_attr_rxlos(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + int data = 0; + int len; + if (!tobj_p){ + return -ENODEV; + } + + data = rxlos_get(tobj_p->port_id); + len = snprintf(buf_p, PAGE_SIZE, "%d\n", data); + return len; +#if 0 + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_rxlos, + buf_p); +#endif +} + + +static ssize_t +show_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_reset, + buf_p); +} + + +static ssize_t +show_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_lpmod, + buf_p); +} + + +static ssize_t +show_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_modsel, + buf_p); +} + + +static ssize_t +show_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs0, + buf_p); +} + + +static ssize_t +show_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs1, + buf_p); +} + + +/* ========== Store functions: For I/O Expander (R/W) attribute ========== + */ +static ssize_t +_store_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*set_func)(struct ioexp_obj_s *ioexp_p, + int virt_offset, int input_val), + const char *buf_p, + size_t count) { + + int input, err; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR("%s: data corruption! :%s\n", + __func__, tobj_p->swp_name); + return -ENODATA; + } + input = sscanf_2_binary(buf_p); + if (input < 0) { + return -EBFONT; + } + mutex_lock(&ioexp_p->lock); + err = set_func(ioexp_p, tobj_p->ioexp_virt_offset, input); + mutex_unlock(&ioexp_p->lock); + if (err < 0){ + return err; + } + return count; +} + +static ssize_t +store_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_reset, + buf_p, + count); +} + + +static ssize_t +store_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_lpmod, + buf_p, + count); +} + + +static ssize_t +store_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_modsel, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs1, + buf_p, + count); +} + + +/* ========== SWPS attribute: For module control ========== + */ +static DEVICE_ATTR(platform, S_IRUGO, show_attr_platform, NULL); +static DEVICE_ATTR(version, S_IRUGO, show_attr_version, NULL); +static DEVICE_ATTR(status, S_IRUGO, show_attr_status, NULL); +static DEVICE_ATTR(reset_i2c, S_IWUSR, NULL, store_attr_reset_i2c); +static DEVICE_ATTR(reset_swps, S_IWUSR, NULL, store_attr_reset_swps); +static DEVICE_ATTR(auto_config, S_IRUGO|S_IWUSR, show_attr_auto_config, store_attr_auto_config); +static DEVICE_ATTR(block_poll, S_IRUGO|S_IWUSR, show_attr_block_poll, store_attr_block_poll); +static DEVICE_ATTR(io_no_init, S_IRUGO|S_IWUSR, show_attr_io_no_init, store_attr_io_no_init); + + +/* ========== Transceiver attribute: from eeprom ========== + */ +static DEVICE_ATTR(id, S_IRUGO, show_attr_id, NULL); +static DEVICE_ATTR(ext_id, S_IRUGO, show_attr_ext_id, NULL); +static DEVICE_ATTR(connector, S_IRUGO, show_attr_connector, NULL); +static DEVICE_ATTR(vendor_name, S_IRUGO, show_attr_vendor_name, NULL); +static DEVICE_ATTR(vendor_pn, S_IRUGO, show_attr_vendor_pn, NULL); +static DEVICE_ATTR(vendor_rev, S_IRUGO, show_attr_vendor_rev, NULL); +static DEVICE_ATTR(vendor_sn, S_IRUGO, show_attr_vendor_sn, NULL); +static DEVICE_ATTR(power_cls, S_IRUGO, show_attr_power_cls, NULL); +static DEVICE_ATTR(br, S_IRUGO, show_attr_br, NULL); +static DEVICE_ATTR(len_sm, S_IRUGO, show_attr_len_sm, NULL); +static DEVICE_ATTR(len_smf, S_IRUGO, show_attr_len_smf, NULL); +static DEVICE_ATTR(len_om1, S_IRUGO, show_attr_len_om1, NULL); +static DEVICE_ATTR(len_om2, S_IRUGO, show_attr_len_om2, NULL); +static DEVICE_ATTR(len_om3, S_IRUGO, show_attr_len_om3, NULL); +static DEVICE_ATTR(len_om4, S_IRUGO, show_attr_len_om4, NULL); +static DEVICE_ATTR(comp_rev, S_IRUGO, show_attr_comp_rev, NULL); +static DEVICE_ATTR(comp_eth, S_IRUGO, show_attr_comp_eth, NULL); +static DEVICE_ATTR(comp_eth_10, S_IRUGO, show_attr_comp_eth_10, NULL); +static DEVICE_ATTR(comp_eth_10_40, S_IRUGO, show_attr_comp_eth_10_40, NULL); +static DEVICE_ATTR(comp_extend, S_IRUGO, show_attr_comp_extend, NULL); +static DEVICE_ATTR(rate_id, S_IRUGO, show_attr_rate_id, NULL); +static DEVICE_ATTR(temperature, S_IRUGO, show_attr_temperature, NULL); +static DEVICE_ATTR(voltage, S_IRUGO, show_attr_voltage, NULL); +static DEVICE_ATTR(bias, S_IRUGO, show_attr_tx_bias, NULL); +static DEVICE_ATTR(tx_power, S_IRUGO, show_attr_tx_power, NULL); +static DEVICE_ATTR(rx_power, S_IRUGO, show_attr_rx_power, NULL); +static DEVICE_ATTR(info, S_IRUGO, show_attr_info, NULL); +static DEVICE_ATTR(if_type, S_IRUGO, show_attr_if_type, NULL); +static DEVICE_ATTR(if_speed, S_IRUGO, show_attr_if_speed, NULL); +static DEVICE_ATTR(if_lane, S_IRUGO, show_attr_if_lane, NULL); +static DEVICE_ATTR(soft_tx_fault, S_IRUGO, show_attr_soft_tx_fault, NULL); +static DEVICE_ATTR(wavelength, S_IRUGO, show_attr_wavelength, NULL); +static DEVICE_ATTR(eeprom, S_IRUGO, show_attr_eeprom, NULL); +static DEVICE_ATTR(A0, S_IRUGO, show_attr_eeprom_a0, NULL); +static DEVICE_ATTR(A2, S_IRUGO, show_attr_eeprom_a2, NULL); +static DEVICE_ATTR(Page00, S_IRUGO, show_attr_eeprom, NULL); +static DEVICE_ATTR(Page03, S_IRUGO, show_attr_eeprom_page03, NULL); +static DEVICE_ATTR(soft_rx_los_signal, S_IRUGO, show_attr_soft_rx_los, NULL); +static DEVICE_ATTR(temperature_high_alarm, S_IRUGO, show_attr_temp_high_alarm, NULL); +static DEVICE_ATTR(temperature_low_alarm, S_IRUGO, show_attr_temp_low_alarm, NULL); +static DEVICE_ATTR(voltage_high_alarm, S_IRUGO, show_attr_voltage_high_alarm, NULL); +static DEVICE_ATTR(voltage_low_alarm, S_IRUGO, show_attr_voltage_low_alarm, NULL); +static DEVICE_ATTR(bias_high_alarm, S_IRUGO, show_attr_bias_high_alarm, NULL); +static DEVICE_ATTR(bias_low_alarm, S_IRUGO, show_attr_bias_low_alarm, NULL); +static DEVICE_ATTR(rx_power_high_alarm, S_IRUGO, show_attr_rx_power_high_alarm, NULL); +static DEVICE_ATTR(rx_power_low_alarm, S_IRUGO, show_attr_rx_power_low_alarm, NULL); +static DEVICE_ATTR(tx_power_high_alarm, S_IRUGO, show_attr_tx_power_high_alarm, NULL); +static DEVICE_ATTR(tx_power_low_alarm, S_IRUGO, show_attr_tx_power_low_alarm, NULL); +static DEVICE_ATTR(temperature_high_threshold, S_IRUGO, show_attr_temp_high_alarm_threshold, NULL); +static DEVICE_ATTR(temperature_low_threshold, S_IRUGO, show_attr_temp_low_alarm_threshold, NULL); +static DEVICE_ATTR(voltage_high_threshold, S_IRUGO, show_attr_voltage_high_alarm_threshold, NULL); +static DEVICE_ATTR(voltage_low_threshold, S_IRUGO, show_attr_voltage_low_alarm_threshold, NULL); +static DEVICE_ATTR(bias_high_threshold, S_IRUGO, show_attr_bias_high_alarm_threshold, NULL); +static DEVICE_ATTR(bias_low_threshold, S_IRUGO, show_attr_bias_low_alarm_threshold, NULL); +static DEVICE_ATTR(rx_power_high_threshold, S_IRUGO, show_attr_rx_power_high_alarm_threshold, NULL); +static DEVICE_ATTR(rx_power_low_threshold, S_IRUGO, show_attr_rx_power_low_alarm_threshold, NULL); +static DEVICE_ATTR(tx_power_high_threshold, S_IRUGO, show_attr_tx_power_high_alarm_threshold, NULL); +static DEVICE_ATTR(tx_power_low_threshold, S_IRUGO, show_attr_tx_power_low_alarm_threshold, NULL); +static DEVICE_ATTR(manufacturing_date, S_IRUGO, show_attr_manufacturing_date, NULL); +static DEVICE_ATTR(tx_eq, S_IRUGO|S_IWUSR, show_attr_tx_eq, store_attr_tx_eq); +static DEVICE_ATTR(rx_am, S_IRUGO|S_IWUSR, show_attr_rx_am, store_attr_rx_am); +static DEVICE_ATTR(rx_em, S_IRUGO|S_IWUSR, show_attr_rx_em, store_attr_rx_em); +static DEVICE_ATTR(cdr, S_IRUGO|S_IWUSR, show_attr_cdr, store_attr_cdr); +static DEVICE_ATTR(soft_rs0, S_IRUGO|S_IWUSR, show_attr_soft_rs0, store_attr_soft_rs0); +static DEVICE_ATTR(soft_rs1, S_IRUGO|S_IWUSR, show_attr_soft_rs1, store_attr_soft_rs1); +static DEVICE_ATTR(soft_tx_disable, S_IRUGO|S_IWUSR, show_attr_soft_tx_disable, store_attr_soft_tx_disable); +static DEVICE_ATTR(auto_tx_disable, S_IRUGO|S_IWUSR, show_attr_auto_tx_disable, store_attr_auto_tx_disable); +static DEVICE_ATTR(extphy_offset, S_IRUGO|S_IWUSR, show_attr_extphy_offset, store_attr_extphy_offset); +static DEVICE_ATTR(extphy_reg, S_IRUGO|S_IWUSR, show_attr_extphy_reg, store_attr_extphy_reg); + +/* ========== IO Expander attribute: from expander ========== + */ +static DEVICE_ATTR(present, S_IRUGO, show_attr_present, NULL); +static DEVICE_ATTR(hard_tx_fault, S_IRUGO, show_attr_tx_fault, NULL); +static DEVICE_ATTR(hard_rx_loss_signal, S_IRUGO, show_attr_rxlos, NULL); +static DEVICE_ATTR(tx_disable, S_IRUGO|S_IWUSR, show_attr_tx_disable, store_attr_tx_disable); +static DEVICE_ATTR(reset, S_IRUGO|S_IWUSR, show_attr_reset, store_attr_reset); +static DEVICE_ATTR(lpmod, S_IRUGO|S_IWUSR, show_attr_lpmod, store_attr_lpmod); +static DEVICE_ATTR(modsel, S_IRUGO|S_IWUSR, show_attr_modsel, store_attr_modsel); +static DEVICE_ATTR(hard_rs0, S_IRUGO|S_IWUSR, show_attr_hard_rs0, store_attr_hard_rs0); +static DEVICE_ATTR(hard_rs1, S_IRUGO|S_IWUSR, show_attr_hard_rs1, store_attr_hard_rs1); + +/* ========== Functions for module handling ========== + */ +static void +clean_port_objs(void){ + + dev_t dev_num; + char dev_name[32]; + struct device *device_p; + struct transvr_obj_s *tobj_p; + int minor_curr, port_id; + + for (minor_curr=0; minor_curri2c_client_p) { + i2c_put_adapter(tobj_p->i2c_client_p->adapter); + kfree(tobj_p->i2c_client_p); + } + kfree(tobj_p->vendor_name); + kfree(tobj_p->vendor_pn); + kfree(tobj_p->vendor_rev); + kfree(tobj_p->vendor_sn); + kfree(tobj_p->worker_p); + kfree(tobj_p); + } + dev_num = MKDEV(port_major, minor_curr); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static void +clean_swps_common(void){ + + dev_t dev_num; + struct device *device_p; + + device_p = get_swpdev_by_name(SWP_DEV_MODCTL); + if (device_p){ + dev_num = MKDEV(ctl_major, 1); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + cancel_delayed_work_sync(&swp_polling); + if (platform_p) { + kfree(platform_p); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static int +get_platform_type(void){ + + int i, tmp; + int auto_chan = -1; + int auto_addr = -1; + int pf_total = ARRAY_SIZE(platform_map); + char log_msg[64] = "ERROR"; + + platform_p = kzalloc(sizeof(struct inv_platform_s), GFP_KERNEL); + if (!platform_p){ + snprintf(log_msg, sizeof(log_msg), "kzalloc fail"); + goto err_get_platform_type_1; + } + memset(platform_p->name, 0, sizeof(platform_p->name)); + + switch (PLATFORM_SETTINGS) { + case PLATFORM_TYPE_AUTO: + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", dmi_get_system_info(DMI_BOARD_NAME)); + for (i=0; iname, platform_map[i].name) == 0) { + platform_p->id = platform_map[i].id; + snprintf(log_msg, sizeof(log_msg), + "Auto detect platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Auto detect fail! detect platform: %s", + platform_p->name); + goto err_get_platform_type_2; + + case PLATFORM_TYPE_PEONY_AUTO: +#ifdef SWPS_PEONY_SFP + auto_chan = peony_sfp_ioexp_layout[0].addr[0].chan_id; + auto_addr = peony_sfp_ioexp_layout[0].addr[0].chip_addr; +#endif + tmp = _is_i2c_target_exist(auto_chan, auto_addr); + switch (tmp) { + case 0: /* Copper SKU */ + SWPS_INFO("Auto-detected :Peony :Copper\n"); + platform_p->id = PLATFORM_TYPE_PEONY_COPPER_GA; + goto map_platform_name; + + case 1: /* SFP SKU */ + SWPS_INFO("Auto-detected :Peony :SFP\n"); + platform_p->id = PLATFORM_TYPE_PEONY_SFP_GA; + goto map_platform_name; + + default: + break; + } + snprintf(log_msg, sizeof(log_msg), + "Auto detect Peony SKU fail! :%d", tmp); + goto err_get_platform_type_2; + + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + case PLATFORM_TYPE_REDWOOD: + case PLATFORM_TYPE_REDWOOD_FSL: + case PLATFORM_TYPE_HUDSON32I_GA: + case PLATFORM_TYPE_SPRUCE: + case PLATFORM_TYPE_CYPRESS_GA1: + case PLATFORM_TYPE_CYPRESS_GA2: + case PLATFORM_TYPE_CYPRESS_BAI: + case PLATFORM_TYPE_TAHOE: + case PLATFORM_TYPE_SEQUOIA_GA: + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + case PLATFORM_TYPE_COTTONWOOD_RANGELEY: + case PLATFORM_TYPE_MAPLE_GA: + case PLATFORM_TYPE_MAPLE_B: + case PLATFORM_TYPE_GULMOHAR_GA: + case PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA: + case PLATFORM_TYPE_PEONY_SFP_GA: + case PLATFORM_TYPE_PEONY_COPPER_GA: + platform_p->id = PLATFORM_SETTINGS; + goto map_platform_name; + + default: + break; + } + snprintf(log_msg, sizeof(log_msg), + "PLATFORM_SETTINGS:%d undefined", PLATFORM_SETTINGS); + goto err_get_platform_type_2; + +map_platform_name: + for (i=0; iid == platform_map[i].id) { + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", platform_map[i].name); + snprintf(log_msg, sizeof(log_msg), + "User setup platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Internal error, can not map id:%d", + platform_p->id ); + goto err_get_platform_type_2; + +ok_get_platform_type_1: + SWPS_DEBUG("%s: %s, :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return 0; + +err_get_platform_type_2: + kfree(platform_p); +err_get_platform_type_1: + SWPS_ERR("%s: %s :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return -1; +} + + +static int +get_layout_info(void){ + + switch (platform_p->id) { +#ifdef SWPS_MAGNOLIA + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + gpio_rest_mux = magnolia_gpio_rest_mux; + ioexp_layout = magnolia_ioexp_layout; + port_layout = magnolia_port_layout; + ioexp_total = ARRAY_SIZE(magnolia_ioexp_layout); + port_total = ARRAY_SIZE(magnolia_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD + case PLATFORM_TYPE_REDWOOD: + gpio_rest_mux = redwood_gpio_rest_mux; + ioexp_layout = redwood_ioexp_layout; + port_layout = redwood_port_layout; + ioexp_total = ARRAY_SIZE(redwood_ioexp_layout); + port_total = ARRAY_SIZE(redwood_port_layout); + break; +#endif +#ifdef SWPS_HUDSON32I_GA + case PLATFORM_TYPE_HUDSON32I_GA: + gpio_rest_mux = hudsin32iga_gpio_rest_mux; + ioexp_layout = hudson32iga_ioexp_layout; + port_layout = hudson32iga_port_layout; + ioexp_total = ARRAY_SIZE(hudson32iga_ioexp_layout); + port_total = ARRAY_SIZE(hudson32iga_port_layout); + break; +#endif +#ifdef SWPS_SPRUCE + case PLATFORM_TYPE_SPRUCE: + gpio_rest_mux = spruce_gpio_rest_mux; + ioexp_layout = spruce_ioexp_layout; + port_layout = spruce_port_layout; + ioexp_total = ARRAY_SIZE(spruce_ioexp_layout); + port_total = ARRAY_SIZE(spruce_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA1 + case PLATFORM_TYPE_CYPRESS_GA1: + gpio_rest_mux = cypress_ga1_gpio_rest_mux; + ioexp_layout = cypress_ga1_ioexp_layout; + port_layout = cypress_ga1_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga1_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga1_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA2 + case PLATFORM_TYPE_CYPRESS_GA2: + gpio_rest_mux = cypress_ga2_gpio_rest_mux; + ioexp_layout = cypress_ga2_ioexp_layout; + port_layout = cypress_ga2_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga2_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga2_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_BAI + case PLATFORM_TYPE_CYPRESS_BAI: + gpio_rest_mux = cypress_b_gpio_rest_mux; + ioexp_layout = cypress_b_ioexp_layout; + port_layout = cypress_b_port_layout; + ioexp_total = ARRAY_SIZE(cypress_b_ioexp_layout); + port_total = ARRAY_SIZE(cypress_b_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD_FSL + case PLATFORM_TYPE_REDWOOD_FSL: + gpio_rest_mux = redwood_fsl_gpio_rest_mux; + ioexp_layout = redwood_fsl_ioexp_layout; + port_layout = redwood_fsl_port_layout; + ioexp_total = ARRAY_SIZE(redwood_fsl_ioexp_layout); + port_total = ARRAY_SIZE(redwood_fsl_port_layout); + break; +#endif +#ifdef SWPS_TAHOE + case PLATFORM_TYPE_TAHOE: + gpio_rest_mux = tahoe_gpio_rest_mux; + ioexp_layout = tahoe_ioexp_layout; + port_layout = tahoe_port_layout; + ioexp_total = ARRAY_SIZE(tahoe_ioexp_layout); + port_total = ARRAY_SIZE(tahoe_port_layout); + break; +#endif +#ifdef SWPS_SEQUOIA + case PLATFORM_TYPE_SEQUOIA_GA: + gpio_rest_mux = sequoia_gpio_rest_mux; + ioexp_layout = sequoia_ioexp_layout; + port_layout = sequoia_port_layout; + ioexp_total = ARRAY_SIZE(sequoia_ioexp_layout); + port_total = ARRAY_SIZE(sequoia_port_layout); + break; +#endif +#ifdef SWPS_LAVENDER + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + gpio_rest_mux = lavender_gpio_rest_mux; + ioexp_layout = lavender_ioexp_layout; + port_layout = lavender_port_layout; + ioexp_total = ARRAY_SIZE(lavender_ioexp_layout); + port_total = ARRAY_SIZE(lavender_port_layout); + break; +#endif +#ifdef SWPS_COTTONWOOD_RANGELEY + case PLATFORM_TYPE_COTTONWOOD_RANGELEY: + gpio_rest_mux = cottonwood_rangeley_gpio_rest_mux; + ioexp_layout = cottonwood_rangeley_ioexp_layout; + port_layout = cottonwood_rangeley_port_layout; + ioexp_total = ARRAY_SIZE(cottonwood_rangeley_ioexp_layout); + port_total = ARRAY_SIZE(cottonwood_rangeley_port_layout); + break; +#endif +#ifdef SWPS_MAPLE_GA + case PLATFORM_TYPE_MAPLE_GA: + gpio_rest_mux = maple_ga_gpio_rest_mux; + ioexp_layout = maple_ga_ioexp_layout; + port_layout = maple_ga_port_layout; + ioexp_total = ARRAY_SIZE(maple_ga_ioexp_layout); + port_total = ARRAY_SIZE(maple_ga_port_layout); + break; +#endif +#ifdef SWPS_MAPLE_B + case PLATFORM_TYPE_MAPLE_B: + gpio_rest_mux = maple_b_gpio_rest_mux; + ioexp_layout = maple_b_ioexp_layout; + port_layout = maple_b_port_layout; + ioexp_total = ARRAY_SIZE(maple_b_ioexp_layout); + port_total = ARRAY_SIZE(maple_b_port_layout); + break; +#endif +#ifdef SWPS_GULMOHAR + case PLATFORM_TYPE_GULMOHAR_GA: + gpio_rest_mux = gulmohar_gpio_rest_mux; + ioexp_layout = gulmohar_ioexp_layout; + port_layout = gulmohar_port_layout; + ioexp_total = ARRAY_SIZE(gulmohar_ioexp_layout); + port_total = ARRAY_SIZE(gulmohar_port_layout); + break; +#endif +#ifdef SWPS_GULMOHAR_2T_EVT1 + case PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA: + gpio_rest_mux = gulmohar_2t_evt1_gpio_rest_mux; + ioexp_layout = gulmohar_2t_evt1_ioexp_layout; + port_layout = gulmohar_2t_evt1_port_layout; + ioexp_total = ARRAY_SIZE(gulmohar_2t_evt1_ioexp_layout); + port_total = ARRAY_SIZE(gulmohar_2t_evt1_port_layout); + break; +#endif +#ifdef SWPS_PEONY_SFP + case PLATFORM_TYPE_PEONY_SFP_GA: + gpio_rest_mux = peony_sfp_gpio_rest_mux; + ioexp_layout = peony_sfp_ioexp_layout; + port_layout = peony_sfp_port_layout; + ioexp_total = ARRAY_SIZE(peony_sfp_ioexp_layout); + port_total = ARRAY_SIZE(peony_sfp_port_layout); + break; +#endif +#ifdef SWPS_PEONY_COPPER + case PLATFORM_TYPE_PEONY_COPPER_GA: + gpio_rest_mux = peony_copper_gpio_rest_mux; + ioexp_layout = peony_copper_ioexp_layout; + port_layout = peony_copper_port_layout; + ioexp_total = ARRAY_SIZE(peony_copper_ioexp_layout); + port_total = ARRAY_SIZE(peony_copper_port_layout); + break; +#endif + + default: + SWPS_ERR(" Invalid platform: %d (%s)\n", + platform_p->id, platform_p->name); + return -1; + } + SWPS_INFO("Start to initial platform: %d (%s)\n", + platform_p->id, platform_p->name); + return 0; +} + + +/* ========== Functions for objects operations ========== + */ +static int +__detect_issues_port(int minor_num) { + + struct transvr_obj_s *tobj_p; + int port_id = port_layout[minor_num].port_id; + char port_name[32] = "ERR"; + char *i2c_emsg = "detected bad transceiver/cable"; + + memset(port_name, 0, sizeof(port_name)); + snprintf(port_name, sizeof(port_name), "%s%d", SWP_DEV_PORT, port_id); + tobj_p = _get_transvr_obj(port_name); + if (!tobj_p) { + SWPS_INFO("%s: tobj_p is NULL :%d\n", __func__, minor_num); + return -1; + } + if (resync_channel_tier_2(tobj_p) < 0) { + if (check_channel_tier_1() < 0) { + goto get_target_issues_port; + } + } + /* Re-check again for i2c-gpio special case */ + if (check_channel_tier_1() < 0) { + goto get_target_issues_port; + } + return 0; + +get_target_issues_port: + alarm_msg_2_user(tobj_p, i2c_emsg); + return -2; +} + + +static int +_detect_issues_port(void) { + /* OK : retrun -1; + * Fail: return fail at which minor number (0~N) + */ + char *emsg = "ERR"; + int minor = 0; + int minor_2st = 1; + + /* Force moving the initial channel pointer + * Filter out case of fail at minor-0 port + */ + while (minor_2st < port_total) { + minor = minor_2st; + if (__detect_issues_port(minor_2st) < 0) { + emsg = "detect minor_2st fail"; + goto err_p_detect_issues_port; + } + minor_2st += 8; + } + /* Scan all port */ + for (minor=0; minor:%d\n", __func__, emsg, minor_err); + return -1; +} +static int +transvr_obj_health_mtr(char *dev_name) +{ + + struct transvr_obj_s *tobj_p = NULL; + int retval = -9; + + tobj_p = _get_transvr_obj(dev_name); + if (!tobj_p) { + SWPS_ERR("%s: %s _get_transvr_obj fail\n", + __func__, dev_name); + return -9; + } + /* Check transceiver current status */ + lock_transvr_obj(tobj_p); + retval = transvr_health_mtr(tobj_p); + unlock_transvr_obj(tobj_p); + switch (retval) { + case 0: + case ERR_TRANSVR_UNPLUGGED: + case ERR_TRNASVR_BE_ISOLATED: + case ERR_TRANSVR_TASK_BUSY: + return 0; + + case ERR_TRANSVR_I2C_CRASH: + default: + break; + } + /* Identify abnormal case */ + if (check_channel_tier_1() < 0) { + SWPS_DEBUG("%s: %s critical error :%d\n", + __func__, dev_name, retval); + return -2; + } + SWPS_DEBUG("%s: %s single error :%d\n", + __func__, dev_name, retval); + return -1; + + +} + +static int +check_transvr_obj_one(char *dev_name){ + /* [Return] + * 0 : Doesn't need to take care + * -1 : Single error + * -2 : Critical error (I2C topology die) + * -9 : Internal error + */ + struct transvr_obj_s *tobj_p = NULL; + int retval = -9; + + tobj_p = _get_transvr_obj(dev_name); + if (!tobj_p) { + SWPS_ERR("%s: %s _get_transvr_obj fail\n", + __func__, dev_name); + return -9; + } + /* Check transceiver current status */ + lock_transvr_obj(tobj_p); + retval = tobj_p->check(tobj_p); + unlock_transvr_obj(tobj_p); + switch (retval) { + case 0: + case ERR_TRANSVR_UNPLUGGED: + case ERR_TRNASVR_BE_ISOLATED: + case ERR_TRANSVR_TASK_BUSY: + return 0; + + case ERR_TRANSVR_I2C_CRASH: + default: + break; + } + /* Identify abnormal case */ + if (check_channel_tier_1() < 0) { + SWPS_DEBUG("%s: %s critical error :%d\n", + __func__, dev_name, retval); + return -2; + } + SWPS_DEBUG("%s: %s single error :%d\n", + __func__, dev_name, retval); + return -1; +} +static int +transvr_objs_health_mtr(void) +{ + char dev_name[32]; + int port_id, err_code; +// int minor_curr = 0; + + //for (minor_curr=0; minor_curr:%d\n", + __func__, dev_name, err_code); + break; + } + //} + return 0; + +err_check_transvr_objs: + SWPS_ERR("%s: %s reset_i2c_topology fail.\n", + __func__, dev_name); + return -1; + + + +} + +static int +check_transvr_objs(void){ + + char dev_name[32]; + int port_id, err_code; + int minor_curr = 0; + + for (minor_curr=0; minor_curr:%d\n", + __func__, dev_name, err_code); + break; + } + } + return 0; + +err_check_transvr_objs: + SWPS_ERR("%s: %s reset_i2c_topology fail.\n", + __func__, dev_name); + return -1; +} + + +static void +swp_polling_worker(struct work_struct *work){ + + if (io_exp_isr_handler() < 0) { + goto polling_reset_i2c; + } + /* Reset I2C */ +#if 0 + /* Check IOEXP */ + if (check_ioexp_objs() < 0) { + goto polling_reset_i2c; + } +#endif + if (scan_100ms++ > PROCESS_TIME) { + scan_100ms = 0; + process_scan++; + /* Check transceiver */ + if (check_transvr_objs() < 0) { + SWPS_DEBUG("%s: check_transvr_objs fail.\n", __func__); + flag_i2c_reset = 1; + } + if (transvr_objs_health_mtr() < 0) { + SWPS_DEBUG("%s: transvr_objs health fail.\n", __func__); + flag_i2c_reset = 1; + + } + } + if (process_scan > IOEXP_CHECK_TIME) { + process_scan = 0; + if (io_exps_check() < 0) { + goto polling_reset_i2c; + } + } + if (flag_i2c_reset) { + goto polling_reset_i2c; + } + goto polling_schedule_round; + +polling_reset_i2c: + SWPS_DEBUG("%s: reset_i2c_topology start.\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset i2c fail!\n", __func__); + flag_i2c_reset = 1; + } else { + SWPS_DEBUG("%s: reset_i2c_topology OK.\n", __func__); + flag_i2c_reset = 0; + } +polling_schedule_round: + schedule_delayed_work(&swp_polling, _get_polling_period()); +} + + +/* ========== Functions for register something ========== + */ +static int +register_transvr_common_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_id) < 0) { + err_attr = "dev_attr_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_ext_id) < 0) { + err_attr = "dev_attr_ext_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_connector) < 0) { + err_attr = "dev_attr_connector"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_name) < 0) { + err_attr = "dev_attr_vendor_name"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_eeprom) < 0) { + err_attr = "dev_attr_eeprom"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_pn) < 0) { + err_attr = "dev_attr_vendor_pn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_rev) < 0) { + err_attr = "dev_attr_vendor_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_sn) < 0) { + err_attr = "dev_attr_vendor_sn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_br) < 0) { + err_attr = "dev_attr_br"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_smf) < 0) { + err_attr = "dev_attr_len_smf"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om1) < 0) { + err_attr = "dev_attr_len_om1"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om2) < 0) { + err_attr = "dev_attr_len_om2"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om3) < 0) { + err_attr = "dev_attr_len_om3"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om4) < 0) { + err_attr = "dev_attr_len_om4"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_extend) < 0) { + err_attr = "dev_attr_comp_extend"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth) < 0) { + err_attr = "dev_attr_comp_eth"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_rev) < 0) { + err_attr = "dev_attr_comp_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_info) < 0) { + err_attr = "dev_attr_info"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_type) < 0) { + err_attr = "dev_attr_if_type"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_speed) < 0) { + err_attr = "dev_attr_if_speed"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_lane) < 0) { + err_attr = "dev_attr_if_lane"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_temperature) < 0) { + err_attr = "dev_attr_temperature"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_voltage) < 0) { + err_attr = "dev_attr_voltage"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_bias) < 0) { + err_attr = "dev_attr_bias"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power) < 0) { + err_attr = "dev_attr_tx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power) < 0) { + err_attr = "dev_attr_rx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_eq) < 0) { + err_attr = "dev_attr_tx_eq"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_em) < 0) { + err_attr = "dev_attr_rx_em"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_wavelength) < 0) { + err_attr = "dev_attr_wavelength"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_manufacturing_date) < 0) { + err_attr = "dev_attr_manufacturing_date"; + goto err_transvr_comm_attr; + } + return 0; + +err_transvr_comm_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + +static int +register_transvr_sfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10) < 0) { + err_attr = "dev_attr_comp_eth_10"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_len_sm) < 0) { + err_attr = "dev_attr_len_sm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rate_id) < 0) { + err_attr = "dev_attr_rate_id"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs0) < 0) { + err_attr = "dev_attr_soft_rs0"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs1) < 0) { + err_attr = "dev_attr_soft_rs1"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_offset) < 0) { + err_attr = "dev_attr_extphy_offset"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_reg) < 0) { + err_attr = "dev_attr_extphy_reg"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_A0) < 0) { + err_attr = "dev_attr_A0"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_A2) < 0) { + err_attr = "dev_attr_A2"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_high_alarm) < 0) { + err_attr = "dev_attr_temperature_high_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_low_alarm) < 0) { + err_attr = "dev_attr_temperature_low_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_high_alarm) < 0) { + err_attr = "dev_attr_voltage_high_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_low_alarm) < 0) { + err_attr = "dev_attr_voltage_low_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_high_alarm) < 0) { + err_attr = "dev_attr_bias_high_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_low_alarm) < 0) { + err_attr = "dev_attr_bias_low_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_high_alarm) < 0) { + err_attr = "dev_attr_rx_power_high_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_low_alarm) < 0) { + err_attr = "dev_attr_rx_power_low_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_high_alarm) < 0) { + err_attr = "dev_attr_tx_power_high_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_low_alarm) < 0) { + err_attr = "dev_attr_tx_power_low_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_high_threshold) < 0) { + err_attr = "dev_attr_temperature_high_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_low_threshold) < 0) { + err_attr = "dev_attr_temperature_low_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_high_threshold) < 0) { + err_attr = "dev_attr_voltage_high_hreshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_low_threshold) < 0) { + err_attr = "dev_attr_voltage_low_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_high_threshold) < 0) { + err_attr = "dev_attr_bias_high_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_low_threshold) < 0) { + err_attr = "dev_attr_bias_low_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_high_threshold) < 0) { + err_attr = "dev_attr_rx_power_high_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_low_threshold) < 0) { + err_attr = "dev_attr_rx_power_low_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_high_threshold) < 0) { + err_attr = "dev_attr_tx_power_high_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_low_threshold) < 0) { + err_attr = "dev_attr_tx_power_low_threshold"; + goto err_transvr_sfp_attr; + } + return 0; + +err_transvr_sfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10_40) < 0) { + err_attr = "dev_attr_comp_eth_10_40"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_power_cls) < 0) { + err_attr = "dev_attr_power_cls"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rx_los_signal) < 0) { + err_attr = "soft_rx_los_signal"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_disable) < 0) { + err_attr = "soft_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_auto_tx_disable) < 0) { + err_attr = "auto_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_fault) < 0) { + err_attr = "soft_tx_fault"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_Page00) < 0) { + err_attr = "dev_attr_Page00"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_Page03) < 0) { + err_attr = "dev_attr_Page03"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_high_alarm) < 0) { + err_attr = "dev_attr_temperature_high_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_low_alarm) < 0) { + err_attr = "dev_attr_temperature_low_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_high_alarm) < 0) { + err_attr = "dev_attr_voltage_high_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_low_alarm) < 0) { + err_attr = "dev_attr_voltage_low_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_high_alarm) < 0) { + err_attr = "dev_attr_bias_high_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_low_alarm) < 0) { + err_attr = "dev_attr_bias_low_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_high_alarm) < 0) { + err_attr = "dev_attr_rx_power_high_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_low_alarm) < 0) { + err_attr = "dev_attr_rx_power_low_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_high_alarm) < 0) { + err_attr = "dev_attr_tx_power_high_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_low_alarm) < 0) { + err_attr = "dev_attr_tx_power_low_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_high_threshold) < 0) { + err_attr = "dev_attr_temperature_high_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_low_threshold) < 0) { + err_attr = "dev_attr_temperature_low_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_high_threshold) < 0) { + err_attr = "dev_attr_voltage_high_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_low_threshold) < 0) { + err_attr = "dev_attr_voltage_low_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_high_threshold) < 0) { + err_attr = "dev_attr_bias_high_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_low_threshold) < 0) { + err_attr = "dev_attr_bias_low_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_high_threshold) < 0) { + err_attr = "dev_attr_rx_power_high_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_low_threshold) < 0) { + err_attr = "dev_attr_rx_power_low_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_high_threshold) < 0) { + err_attr = "dev_attr_tx_power_high_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_low_threshold) < 0) { + err_attr = "dev_attr_tx_power_low_threshold"; + goto err_transvr_qsfp_attr; + } + return 0; + +err_transvr_qsfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp28_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_qsfp_attr(device_p) < 0){ + err_attr = "register_transvr_qsfp_attr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_cdr) < 0) { + err_attr = "dev_attr_cdr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_rx_am) < 0) { + err_attr = "dev_attr_rx_am"; + goto err_transvr_qsfp28_attr; + } + return 0; + +err_transvr_qsfp28_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + switch (transvr_obj->layout){ + case TRANSVR_TYPE_SFP: + if (register_transvr_sfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + if (register_transvr_qsfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP_28: + if (register_transvr_qsfp28_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + default: + goto err_reg_tvr_attr; + } + return 0; + +err_reg_tvr_attr: + SWPS_ERR("%s: fail! type=%d \n", __func__, transvr_obj->type); + return -1; +} + + +static int +register_ioexp_attr_sfp_1(struct device *device_p){ + /* Support machine type: + * - SFP : Magnolia + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_hard_tx_fault) < 0) { + err_attr = "dev_attr_hard_tx_fault"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rx_loss_signal) < 0) { + err_attr = "dev_attr_hard_rx_loss_signal"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_disable) < 0) { + err_attr = "dev_attr_tx_disable"; + goto err_ioexp_sfp1_attr; + } + return 0; + +err_ioexp_sfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_sfp_2(struct device *device_p){ + /* Support machine type: + * - SFP28 : Cypress + */ + char *err_attr = NULL; + + if (register_ioexp_attr_sfp_1(device_p) < 0){ + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs0) < 0) { + err_attr = "dev_attr_hard_rs0"; + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs1) < 0) { + err_attr = "dev_attr_hard_rs1"; + goto err_ioexp_sfp2_attr; + } + return 0; + +err_ioexp_sfp2_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_qsfp_1(struct device *device_p){ + /* Support machine type: + * - QSFP : Magnolia, Redwood, Hudson32i + * - QSFP+ : Magnolia, Redwood, Hudson32i + * - QSFP28: Redwood + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_reset) < 0) { + err_attr = "dev_attr_reset"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_lpmod) < 0) { + err_attr = "dev_attr_lpmod"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_modsel) < 0) { + err_attr = "dev_attr_modsel"; + goto err_ioexp_qsfp1_attr; + } + return 0; + +err_ioexp_qsfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_modctl_attr(struct device *device_p){ + + char *err_msg = NULL; + + if (device_create_file(device_p, &dev_attr_platform) < 0) { + err_msg = "dev_attr_platform"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_version) < 0) { + err_msg = "dev_attr_version"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_status) < 0) { + err_msg = "dev_attr_status"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_i2c) < 0) { + err_msg = "dev_attr_reset_i2c"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_swps) < 0) { + err_msg = "dev_attr_reset_swps"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_auto_config) < 0) { + err_msg = "dev_attr_auto_config"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_block_poll) < 0) { + err_msg = "dev_attr_block_poll"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_io_no_init) < 0) { + err_msg = "dev_attr_io_no_init"; + goto err_reg_modctl_attr; + } + + return 0; + +err_reg_modctl_attr: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_ioexp_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + char *err_msg = "ERR"; + + switch (transvr_obj->ioexp_obj_p->ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case CPLD_TYPE_COTTONWOOD: + if (register_ioexp_attr_sfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_GULMOHAR_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + if (register_ioexp_attr_sfp_2(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_2 fail"; + goto err_reg_ioexp_attr; + } + break; + + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case IOEXP_TYPE_MAPLE_0ABC: + case IOEXP_TYPE_GULMOHAR_7ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + if (register_ioexp_attr_qsfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_qsfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + default: + err_msg = "Unknow type"; + goto err_reg_ioexp_attr; + } + return 0; + +err_reg_ioexp_attr: + SWPS_ERR("%s: %s :%d \n", + __func__, err_msg, transvr_obj->ioexp_obj_p->ioexp_type); + return -1; +} + + +static int +register_modctl_device(void) { + + struct device *device_p = NULL; + int minor_comm = 0; /* Default minor number for common device */ + dev_t dev_num = MKDEV(ctl_major, minor_comm); + char *err_msg = "ERROR"; + + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + NULL, /* void *private_data */ + SWP_DEV_MODCTL); /* const char *fmt */ + if (IS_ERR(device_p)){ + err_msg = "device_create fail"; + goto err_register_modctl_device_1; + } + if (register_modctl_attr(device_p) < 0) { + err_msg = "register_modctl_attr fail"; + goto err_register_modctl_device_2; + } + return 0; + +err_register_modctl_device_2: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_register_modctl_device_1: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_port_device(char *dev_name, + dev_t dev_num, + struct transvr_obj_s *transvr_obj){ + + struct device *device_p = NULL; + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + transvr_obj, /* void *private_data */ + dev_name); /* const char *fmt */ + if (IS_ERR(device_p)){ + goto err_regswp_create_dev; + } + if (register_transvr_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + if (register_ioexp_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + return 0; + +err_regswp_reg_attr: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_regswp_create_dev: + SWPS_ERR("%s fail! :%s\n", __func__, dev_name); + return -1; +} + + +static int +register_swp_module(void){ + + dev_t ctl_devt = 0; + dev_t port_devt = 0; + + /* Register device number */ + if (alloc_chrdev_region(&ctl_devt, 0, 1, SWP_DEV_MODCTL) < 0){ + SWPS_WARN("Allocate CTL MAJOR failure! \n"); + goto err_register_swp_module_1; + } + if (alloc_chrdev_region(&port_devt, 0, port_total, SWP_CLS_NAME) < 0){ + SWPS_WARN("Allocate PORT MAJOR failure! \n"); + goto err_register_swp_module_2; + } + ctl_major = MAJOR(ctl_devt); + port_major = MAJOR(port_devt); + + /* Create class object */ + swp_class_p = class_create(THIS_MODULE, SWP_CLS_NAME); + if (IS_ERR(swp_class_p)) { + SWPS_ERR("Create class failure! \n"); + goto err_register_swp_module_3; + } + return 0; + +err_register_swp_module_3: + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_register_swp_module_2: + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); +err_register_swp_module_1: + return -1; +} + + +/* ========== Module initial relate ========== + */ +static int +create_ioexp_objs(void) { + + int i, run_mod; + + /* Clean IOEXP object */ + clean_ioexp_objs(); + /* Get running mode */ + run_mod = IOEXP_MODE_DIRECT; + if (SWP_POLLING_ENABLE){ + run_mod = IOEXP_MODE_POLLING; + } + /* Create IOEXP object */ + for(i=0; i devlen_max) { + snprintf(err_msg, sizeof(err_msg), + "SWP_DEV_PORT too long!"); + goto err_initport_create_tranobj; + } + memset(dev_name, 0, sizeof(dev_name)); + snprintf(dev_name, devlen_max, "%s%d", SWP_DEV_PORT, port_id); + /* Create transceiver object */ + ioexp_obj_p = get_ioexp_obj(ioexp_id); + if (!ioexp_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "IOEXP object:%d not exist", ioexp_id); + goto err_initport_create_tranobj; + } + transvr_obj_p = create_transvr_obj(dev_name, chan_id, ioexp_obj_p, + ioexp_virt_offset, transvr_type, + chipset_type, run_mod, port_id); + if (!transvr_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "Create transceiver object fail :%s", dev_name); + goto err_initport_create_tranobj; + } + /* Setup Lane_ID mapping */ + i = ARRAY_SIZE(port_layout[minor_curr].lane_id); + j = ARRAY_SIZE(transvr_obj_p->lane_id); + if (i != j) { + snprintf(err_msg, sizeof(err_msg), + "Lane_id size inconsistent %d/%d", i, j); + goto err_initport_reg_device; + } + memcpy(transvr_obj_p->lane_id, port_layout[minor_curr].lane_id, i*sizeof(int)); + /* Create and register device object */ + if (register_port_device(dev_name, MKDEV(port_major, minor_curr), transvr_obj_p) < 0){ + snprintf(err_msg, sizeof(err_msg), + "register_port_device fail"); + goto err_initport_reg_device; + } + /* Setup device_ptr of transvr_obj */ + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + snprintf(err_msg, sizeof(err_msg), + "get_swpdev_by_name fail"); + goto err_initport_reg_device; + } + transvr_obj_p->transvr_dev_p = dev_p; + /* Success */ + ok_count++; + } + SWPS_INFO("%s: initialed %d port-dev\n",__func__, ok_count); + return 0; + +err_initport_reg_device: + kfree(transvr_obj_p); +err_initport_create_tranobj: + clean_port_objs(); + SWPS_ERR("%s: %s", __func__, err_msg); + SWPS_ERR("Dump: :%d :%d :%d :%d :%d :%d\n", + port_id, chan_id, ioexp_id, ioexp_virt_offset, transvr_type, run_mod); + return -1; +} + + +static int +init_dev_topology(void){ + + int err; + char *emsg = "ERR"; + flag_mod_state = SWP_STATE_NORMAL; + + err = init_ioexp_objs(); + switch(err){ + case 0: /* Normal */ + SWPS_DEBUG("%s: normal case\n", __func__); + break; + + case -1: /* topology error */ + SWPS_DEBUG("%s: detect tier-1 topology initial failure :%d\n", + __func__, err); + /* Reset and isolate */ + err = reset_i2c_topology(); + if (err < 0) { + emsg = "reset i2c topology fail"; + goto err_init_dev_topology; + } + /* Re-initial again */ + err = init_ioexp_objs(); + if (err < 0) { + emsg = "re-init ioexp objects fail"; + goto err_init_dev_topology; + } + break; + + case -2: /* Internal error */ + SWPS_DEBUG("%s: internal error case\n", __func__); + err = -2; + emsg = "internal error"; + goto err_init_dev_topology; + + default: + SWPS_DEBUG("%s: undefined error case\n", __func__); + emsg = "undefined error case"; + goto err_init_dev_topology; + } + SWPS_DEBUG("%s: initial I2C topology success\n", __func__); + return 0; + +err_init_dev_topology: + SWPS_ERR("%s: %s :%d\n", __func__, emsg, err); + return -1; +} + + +static int +init_polling_task(void){ + + if (SWP_POLLING_ENABLE){ + schedule_delayed_work(&swp_polling, _get_polling_period()); + } + return 0; +} + + +static int +init_swps_common(void){ + + char *err_msg = "ERR"; + + block_polling = 0; + auto_config = 0; + if ((SWP_AUTOCONFIG_ENABLE) && (SWP_POLLING_ENABLE)){ + auto_config = 1; + } + if (register_modctl_device() < 0) { + err_msg = "register_modctl_device fail"; + goto err_init_swps_common_1; + } + if (_update_auto_config_2_trnasvr() < 0) { + err_msg = "_update_auto_config_2_trnasvr fail"; + goto err_init_swps_common_1; + } + if (init_polling_task() < 0){ + err_msg = "init_polling_task fail"; + goto err_init_swps_common_1; + } + return 0; + +err_init_swps_common_1: + clean_swps_common(); + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int __init +swp_module_init(void){ + + if (sff_io_init() < 0) { + + goto err_init_out; + } + if (get_platform_type() < 0){ + goto err_init_out; + } + if (get_layout_info() < 0){ + goto err_init_out; + } + if (register_swp_module() < 0){ + goto err_init_out; + } + if (create_ioexp_objs() < 0){ + goto err_init_ioexp; + } + if (create_port_objs() < 0){ + goto err_init_portobj; + } + if (init_mux_objs(gpio_rest_mux) < 0){ + goto err_init_mux; + } + if (init_dev_topology() < 0){ + goto err_init_topology; + } + if (init_swps_common() < 0){ + goto err_init_topology; + } + if (cpld_ioexp_isr_enable() < 0) { + goto err_init_topology; + } + SWPS_INFO("Inventec switch-port module V.%s initial success.\n", SWP_VERSION); + return 0; + + +err_init_topology: + clean_mux_objs(); +err_init_mux: + clean_port_objs(); +err_init_portobj: + clean_ioexp_objs(); +err_init_ioexp: + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_init_out: + SWPS_ERR("Inventec switch-port module V.%s initial failure.\n", SWP_VERSION); + return -1; +} + + +static void __exit +swp_module_exit(void){ + + clean_swps_common(); + clean_port_objs(); + clean_ioexp_objs(); + clean_mux_objs(); +#if 1 + sff_io_deinit(); +#endif + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); + SWPS_INFO("Remove Inventec switch-port module success.\n"); +} + + +/* Module information */ +MODULE_AUTHOR(SWP_AUTHOR); +MODULE_DESCRIPTION(SWP_DESC); +MODULE_VERSION(SWP_VERSION); +MODULE_LICENSE(SWP_LICENSE); +MODULE_SOFTDEP("pre: inv_platform"); + +module_init(swp_module_init); +module_exit(swp_module_exit); + + + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_swps.h b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_swps.h new file mode 100644 index 00000000000..c14a2f5ae76 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/inv_swps.h @@ -0,0 +1,1621 @@ +#ifndef INV_SWPS_H +#define INV_SWPS_H + +#include "transceiver.h" +#include "io_expander.h" +#include "inv_mux.h" + +/* Module settings */ +#define SWP_CLS_NAME "swps" +#define SWP_DEV_PORT "port" +#define SWP_DEV_MODCTL "module" +#define SWP_RESET_PWD "inventec" +#define SWP_POLLING_PERIOD (100) /* msec */ +#define SWP_POLLING_ENABLE (1) +#define SWP_AUTOCONFIG_ENABLE (1) + +/* Module information */ +#define SWP_AUTHOR "Neil " +#define SWP_DESC "Inventec port and transceiver driver" +#define SWP_VERSION "JD.4.3.8" +#define SWP_LICENSE "GPL" + +/* Module status define */ +#define SWP_STATE_NORMAL (0) +#define SWP_STATE_I2C_DIE (-91) + +/* [Note]: + * Functions and mechanism for auto-detect platform type is ready, + * But HW and BIOS not ready! We need to wait them. + * So, please do not use PLATFORM_TYPE_AUTO until they are ready. + * (2016.06.13) + */ +#define PLATFORM_TYPE_AUTO (100) +#define PLATFORM_TYPE_MAGNOLIA (111) +#define PLATFORM_TYPE_MAGNOLIA_FNC (112) +#define PLATFORM_TYPE_REDWOOD (121) +#define PLATFORM_TYPE_REDWOOD_FSL (122) +#define PLATFORM_TYPE_HUDSON32I_GA (131) +#define PLATFORM_TYPE_SPRUCE (141) +#define PLATFORM_TYPE_CYPRESS_GA1 (151) /* Up -> Down */ +#define PLATFORM_TYPE_CYPRESS_GA2 (152) /* Down -> Up */ +#define PLATFORM_TYPE_CYPRESS_BAI (153) /* Down -> Up */ +#define PLATFORM_TYPE_TAHOE (161) +#define PLATFORM_TYPE_SEQUOIA_GA (171) +#define PLATFORM_TYPE_LAVENDER_GA (181) +#define PLATFORM_TYPE_LAVENDER_ONL (182) +#define PLATFORM_TYPE_COTTONWOOD_RANGELEY (191) +#define PLATFORM_TYPE_MAPLE_GA (201) +#define PLATFORM_TYPE_GULMOHAR_GA (202) +#define PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA (203) +#define PLATFORM_TYPE_PEONY_SFP_GA (204) +#define PLATFORM_TYPE_PEONY_COPPER_GA (205) +#define PLATFORM_TYPE_PEONY_AUTO (206) +#define PLATFORM_TYPE_MAPLE_B (207) +/* Current running platfrom */ +#define PLATFORM_SETTINGS PLATFORM_TYPE_MAPLE_B + +/* Define platform flag and kernel version */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA_FNC) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD) + #define SWPS_REDWOOD (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD_FSL) + #define SWPS_REDWOOD_FSL (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_HUDSON32I_GA) + #define SWPS_HUDSON32I_GA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SPRUCE) + #define SWPS_SPRUCE (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA1) + #define SWPS_CYPRESS_GA1 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA2) + #define SWPS_CYPRESS_GA2 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_BAI) + #define SWPS_CYPRESS_BAI (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_TAHOE) + #define SWPS_TAHOE (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SEQUOIA_GA) + #define SWPS_SEQUOIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_COTTONWOOD_RANGELEY) + #define SWPS_COTTONWOOD_RANGELEY (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAPLE_GA) + #define SWPS_MAPLE_GA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAPLE_B) + #define SWPS_MAPLE_B (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_GULMOHAR_GA) + #define SWPS_GULMOHAR (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA) + #define SWPS_GULMOHAR_2T_EVT1 (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_PEONY_SFP_GA) + #define SWPS_PEONY_SFP (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_PEONY_COPPER_GA) + #define SWPS_PEONY_COPPER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_PEONY_AUTO) + #define SWPS_PEONY_SFP (1) + #define SWPS_PEONY_COPPER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#endif + +struct inv_platform_s { + int id; + char name[64]; +}; + +struct inv_ioexp_layout_s { + int ioexp_id; + int ioexp_type; + struct ioexp_addr_s addr[4]; +}; + +struct inv_port_layout_s { + int port_id; + int chan_id; + int ioexp_id; + int ioexp_offset; + int transvr_type; + int chipset_type; + int lane_id[8]; +}; + + +/* ========================================== + * Inventec Platform Settings + * ========================================== + */ +struct inv_platform_s platform_map[] = { + {PLATFORM_TYPE_AUTO, "Auto-Detect" }, + {PLATFORM_TYPE_MAGNOLIA, "Magnolia" }, + {PLATFORM_TYPE_MAGNOLIA_FNC, "Magnolia_FNC" }, + {PLATFORM_TYPE_REDWOOD, "Redwood" }, + {PLATFORM_TYPE_REDWOOD_FSL, "Redwood_FSL" }, + {PLATFORM_TYPE_HUDSON32I_GA, "Hudson32i" }, + {PLATFORM_TYPE_SPRUCE, "Spruce" }, + {PLATFORM_TYPE_CYPRESS_GA1, "Cypress_GA1" }, + {PLATFORM_TYPE_CYPRESS_GA2, "Cypress_GA2" }, + {PLATFORM_TYPE_CYPRESS_BAI, "Cypress_BAI" }, + {PLATFORM_TYPE_TAHOE, "Tahoe" }, + {PLATFORM_TYPE_SEQUOIA_GA, "Sequoia_GA" }, + {PLATFORM_TYPE_LAVENDER_GA, "Lavender_GA" }, + {PLATFORM_TYPE_LAVENDER_ONL, "Lavender_ONL" }, + {PLATFORM_TYPE_COTTONWOOD_RANGELEY, "Cottonwood_RANGELEY" }, + {PLATFORM_TYPE_MAPLE_GA, "Maple_GA" }, + {PLATFORM_TYPE_MAPLE_B, "Maple_B" }, + {PLATFORM_TYPE_GULMOHAR_GA, "Gulmohar_GA" }, + {PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA, "Gulmohar_2T_EVT1_GA" }, + {PLATFORM_TYPE_PEONY_SFP_GA, "Peony_SFP_GA" }, + {PLATFORM_TYPE_PEONY_COPPER_GA, "Peony_Copper_GA" }, + {PLATFORM_TYPE_PEONY_AUTO, "Peony_Auto_Detect" }, +}; + + +/* ========================================== + * Magnolia Layout configuration + * ========================================== + */ +#ifdef SWPS_MAGNOLIA +unsigned magnolia_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s magnolia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAGINOLIA_NAB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {1, IOEXP_TYPE_MAGINOLIA_NAB, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {2, IOEXP_TYPE_MAGINOLIA_NAB, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {3, IOEXP_TYPE_MAGINOLIA_4AB, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf0, 0xff}, {0xf0, 0xff}, }, }, /* addr[1] = I/O Expander 4 B */ + }, + {4, IOEXP_TYPE_MAGINOLIA_NAB, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {5, IOEXP_TYPE_MAGINOLIA_NAB, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {6, IOEXP_TYPE_MAGINOLIA_7AB, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[1] = I/O Expander 7 B */ + }, +}; + +struct inv_port_layout_s magnolia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 16} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 15} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 14} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 13} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 24} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 23} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 22} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 21} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 28} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 27} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 26} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 25} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 32} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 31} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 30} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 29} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 48} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 47} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 46} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 45} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 52} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 51} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 50} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 49} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 56} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 55} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 54} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 53} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 60} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 59} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 58} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 57} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 64} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 63} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 62} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 61} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 68} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 67} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 66} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 65} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 72} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 71} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 70} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 69} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 76} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 75} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 74} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 73} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD +unsigned redwood_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s redwood_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + +struct inv_port_layout_s redwood_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Hudson32i Layout configuration + * ========================================== + */ +#ifdef SWPS_HUDSON32I_GA +unsigned hudsin32iga_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s hudson32iga_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_HUDSON32IGA_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {1, IOEXP_TYPE_HUDSON32IGA_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {2, IOEXP_TYPE_HUDSON32IGA_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, + {3, IOEXP_TYPE_HUDSON32IGA_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, +}; + +struct inv_port_layout_s hudson32iga_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 1, 2, 3, 4} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 5, 6, 7, 8} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 9, 10, 11, 12} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 13, 14, 15, 16} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 17, 18, 19, 20} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 21, 22, 23, 24} }, + { 6, 12, 0, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 25, 26, 27, 28} }, + { 7, 13, 0, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 29, 30, 31, 32} }, + { 8, 14, 1, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 33, 34, 35, 36} }, + { 9, 15, 1, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 37, 38, 39, 40} }, + {10, 16, 1, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 41, 42, 43, 44} }, + {11, 17, 1, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 45, 46, 47, 48} }, + {12, 18, 1, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 49, 50, 51, 52} }, + {13, 19, 1, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 53, 54, 55, 56} }, + {14, 20, 1, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 57, 58, 59, 60} }, + {15, 21, 1, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 61, 62, 63, 64} }, + {16, 22, 2, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 65, 66, 67, 68} }, + {17, 23, 2, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 69, 70, 71, 72} }, + {18, 24, 2, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 73, 74, 75, 76} }, + {19, 25, 2, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {20, 26, 2, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {21, 27, 2, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 85, 86, 87, 88} }, + {22, 28, 2, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 89, 90, 91, 92} }, + {23, 29, 2, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 93, 94, 95, 96} }, + {24, 30, 3, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {25, 31, 3, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {26, 32, 3, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {27, 33, 3, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, + {28, 34, 3, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {113,114,115,116} }, + {29, 35, 3, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {117,118,119,120} }, + {30, 36, 3, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {121,122,123,124} }, + {31, 37, 3, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Spruce Layout configuration + * ========================================== + */ +#ifdef SWPS_SPRUCE +unsigned spruce_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s spruce_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SPRUCE_7AB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[2] = I/O Expander 7B */ + }, +}; + +struct inv_port_layout_s spruce_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Up->Down]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA1 +unsigned cypress_ga1_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s cypress_ga1_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga1_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Down->Up]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA2 +unsigned cypress_ga2_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_ga2_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga2_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 1, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 2, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 3, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 4, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 5, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 6, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 7, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 8, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + { 9, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {10, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {11, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {12, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {13, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {14, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {15, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {16, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {17, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {18, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {19, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {20, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {21, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {22, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {23, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {24, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {25, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {26, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {27, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {28, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {29, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {30, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {31, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {32, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {33, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {34, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {35, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {36, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {37, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {38, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {39, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {40, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {41, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {42, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {43, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {44, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {45, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {46, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {47, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {48, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {49, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {50, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {51, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {52, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {53, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (BaiDu version) + * ========================================== + */ +#ifdef SWPS_CYPRESS_BAI +unsigned cypress_b_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_b_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_b_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {54, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood_fsl Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD_FSL +unsigned redwood_fsl_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s redwood_fsl_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + + +struct inv_port_layout_s redwood_fsl_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Tahoe Layout configuration + * ========================================== + */ +#ifdef SWPS_TAHOE +unsigned tahoe_gpio_rest_mux = MUX_RST_GPIO_249_PCA9548; + +struct inv_ioexp_layout_s tahoe_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_TAHOE_6ABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {1, IOEXP_TYPE_TAHOE_5A, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[0] = I/O Expander 5 A */ + }, +}; + + +struct inv_port_layout_s tahoe_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 12, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + { 1, 11, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + { 2, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + { 3, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + { 4, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + { 5, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + { 6, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + { 7, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + { 8, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + { 9, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, +}; +#endif + + +/* ========================================== + * Sequoia Layout configuration + * ========================================== + */ +#ifdef SWPS_SEQUOIA +unsigned sequoia_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s sequoia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { {1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + +struct inv_port_layout_s sequoia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 9, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 1, 10, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 2, 11, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 3, 12, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 4, 13, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + { 5, 14, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 6, 15, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + { 7, 16, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + { 8, 17, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + { 9, 18, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {10, 19, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {11, 20, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {12, 21, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + {13, 22, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + {14, 23, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121, 122, 123, 124} }, + {15, 24, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + {16, 25, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {137, 138, 139, 140} }, + {17, 26, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {129, 130, 131, 132} }, + {18, 27, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {153, 154, 155, 156} }, + {19, 28, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {145, 146, 147, 148} }, + {20, 29, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {169, 170, 171, 172} }, + {21, 30, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {161, 162, 163, 164} }, + {22, 31, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {185, 186, 187, 188} }, + {23, 32, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {177, 178, 179, 180} }, + {24, 33, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {201, 202, 203, 204} }, + {25, 34, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {193, 194, 195, 196} }, + {26, 35, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {217, 218, 219, 220} }, + {27, 36, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {209, 210, 211, 212} }, + {28, 37, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {233, 234, 235, 236} }, + {29, 38, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {225, 226, 227, 228} }, + {30, 39, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {249, 250, 251, 252} }, + {31, 40, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {241, 242, 243, 244} }, + {32, 44, 4, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + {33, 43, 4, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + {34, 42, 4, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + {35, 41, 4, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + {36, 48, 4, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {37, 47, 4, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {38, 46, 4, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {39, 45, 4, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {40, 52, 5, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {41, 51, 5, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {42, 50, 5, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {43, 49, 5, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {44, 56, 5, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, + {45, 55, 5, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + {46, 54, 5, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125, 126, 127, 128} }, + {47, 53, 5, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117, 118, 119, 120} }, + {48, 60, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {141, 142, 143, 144} }, + {49, 59, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {133, 134, 135, 136} }, + {50, 58, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {157, 158, 159, 160} }, + {51, 57, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {149, 150, 151, 152} }, + {52, 64, 6, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {173, 174, 175, 176} }, + {53, 63, 6, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {165, 166, 167, 168} }, + {54, 62, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {189, 190, 191, 192} }, + {55, 61, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {181, 182, 183, 184} }, + {56, 68, 7, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {205, 206, 207, 208} }, + {57, 67, 7, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {197, 198, 199, 200} }, + {58, 66, 7, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {221, 222, 223, 224} }, + {59, 65, 7, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {213, 214, 215, 216} }, + {60, 72, 7, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {237, 238, 239, 240} }, + {61, 71, 7, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {229, 230, 231, 232} }, + {62, 70, 7, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {253, 254, 255, 256} }, + {63, 69, 7, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {245, 246, 247, 248} }, +}; +#endif + + +/* ========================================== + * Lavender Layout configuration + * ========================================== + */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; +#endif + +#ifdef SWPS_LAVENDER +struct inv_ioexp_layout_s lavender_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { { 1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + { 1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { { 2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + { 2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + { 2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { { 3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + { 3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + { 3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { { 4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + { 4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + { 4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { { 9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + { 9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + { 9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, + {8, IOEXP_TYPE_LAVENDER_P65, { { 5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xF6, 0xff}, {0xF8, 0xff}, }, }, /* addr[0] = I/O Expander CPU */ + }, +}; + + +struct inv_port_layout_s lavender_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {188, 189, 190, 191} }, + { 1, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {184, 185, 186, 187} }, + { 2, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {180, 181, 182, 183} }, + { 3, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {176, 177, 178, 179} }, + { 4, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {172, 173, 174, 175} }, + { 5, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {168, 169, 170, 171} }, + { 6, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {164, 165, 166, 167} }, + { 7, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {160, 161, 162, 163} }, + { 8, 25, 1, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {156, 157, 158, 159} }, + { 9, 26, 1, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {152, 153, 154, 155} }, + {10, 27, 1, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {148, 149, 150, 151} }, + {11, 28, 1, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {144, 145, 146, 147} }, + {12, 29, 1, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {140, 141, 142, 143} }, + {13, 30, 1, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {136, 137, 138, 139} }, + {14, 31, 1, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {132, 133, 134, 135} }, + {15, 32, 1, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {128, 129, 130, 131} }, + {16, 33, 2, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 0, 1, 2, 3} }, + {17, 34, 2, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 4, 5, 6, 7} }, + {18, 35, 2, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 8, 9, 10, 11} }, + {19, 36, 2, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 12, 13, 14, 15} }, + {20, 37, 2, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 16, 17, 18, 19} }, + {21, 38, 2, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 20, 21, 22, 23} }, + {22, 39, 2, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 24, 25, 26, 27} }, + {23, 40, 2, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 28, 29, 30, 31} }, + {24, 41, 3, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 32, 33, 34, 35} }, + {25, 42, 3, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 36, 37, 38, 39} }, + {26, 43, 3, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 40, 41, 42, 43} }, + {27, 44, 3, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 44, 45, 46, 47} }, + {28, 45, 3, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 48, 49, 50, 51} }, + {29, 46, 3, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 52, 53, 54, 55} }, + {30, 47, 3, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 56, 57, 58, 59} }, + {31, 48, 3, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 60, 61, 62, 63} }, + {32, 49, 4, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {256, 257, 258, 259} }, + {33, 50, 4, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {260, 261, 262, 263} }, + {34, 51, 4, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {264, 265, 266, 267} }, + {35, 52, 4, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {268, 269, 270, 271} }, + {36, 53, 4, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {272, 273, 274, 275} }, + {37, 54, 4, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {276, 277, 278, 279} }, + {38, 55, 4, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {280, 281, 282, 283} }, + {39, 56, 4, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {284, 285, 286, 287} }, + {40, 57, 5, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {288, 289, 290, 291} }, + {41, 58, 5, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {292, 293, 294, 295} }, + {42, 59, 5, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {296, 297, 298, 299} }, + {43, 60, 5, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {300, 301, 302, 303} }, + {44, 61, 5, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {304, 305, 306, 307} }, + {45, 62, 5, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {308, 309, 310, 311} }, + {46, 63, 5, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {312, 313, 314, 315} }, + {47, 64, 5, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {316, 317, 318, 319} }, + {48, 65, 6, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {444, 445, 446, 447} }, + {49, 66, 6, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {440, 441, 442, 443} }, + {50, 67, 6, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {436, 437, 438, 439} }, + {51, 68, 6, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {432, 433, 434, 435} }, + {52, 69, 6, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {428, 429, 430, 431} }, + {53, 70, 6, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {424, 425, 426, 427} }, + {54, 71, 6, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {420, 421, 422, 423} }, + {55, 72, 6, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {416, 417, 418, 419} }, + {56, 73, 7, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {412, 413, 414, 415} }, + {57, 74, 7, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {408, 409, 410, 411} }, + {58, 75, 7, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {404, 405, 406, 407} }, + {59, 76, 7, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {400, 401, 402, 403} }, + {60, 77, 7, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {396, 397, 398, 399} }, + {61, 78, 7, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {392, 393, 394, 395} }, + {62, 79, 7, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {388, 389, 390, 391} }, + {63, 80, 7, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {384, 385, 386, 387} }, + {64, 5, 8, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 64, 65, 66, 67} }, +}; +#endif + +/* =========================================================== + * Cottonwood Layout configuration Rangeley (Rangeley CPU board) + * =========================================================== + */ +#ifdef SWPS_COTTONWOOD_RANGELEY +unsigned cottonwood_rangeley_gpio_rest_mux = MUX_RST_GPIO_500_PCA9548; + +struct inv_ioexp_layout_s cottonwood_rangeley_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, CPLD_TYPE_COTTONWOOD,{ {1, 0x55, {22, 23, 24, 25}, {22, 23, 24, 25}, {-1, -1, -1, -1}, {0xee, 0xee, 0x99, 0x99}, {0x00, 0x00, 0x00, 0x00}, }, + }, + }, +}; + + +struct inv_port_layout_s cottonwood_rangeley_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHI_TYPE / LANE_ID */ + { 0, 2, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 75} }, + { 1, 3, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 77} }, + { 2, 4, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 79} }, + { 3, 5, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, +}; +#endif + +/* =========================================================== + * Maple Layout configuration (Old) + * =========================================================== + */ +#ifdef SWPS_MAPLE_GA +unsigned maple_ga_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; + +struct inv_ioexp_layout_s maple_ga_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAPLE_0ABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_MAPLE_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_MAPLE_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_MAPLE_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_MAPLE_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_MAPLE_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_MAPLE_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s maple_ga_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 1} }, + { 1, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 2} }, + { 2, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 3} }, + { 3, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 4} }, + { 4, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 5} }, + { 5, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 6} }, + { 6, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 7} }, + { 7, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 8} }, + { 8, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 13} }, + { 9, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 14} }, + {10, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 15} }, + {11, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 16} }, + {12, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 21} }, + {13, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 22} }, + {14, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 23} }, + {15, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 24} }, + {16, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 29} }, + {17, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 30} }, + {18, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 31} }, + {19, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 32} }, + {20, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 33} }, + {21, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 34} }, + {22, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 35} }, + {23, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 36} }, + {24, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 41} }, + {25, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 42} }, + {26, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 43} }, + {27, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 44} }, + {28, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 49} }, + {29, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 50} }, + {30, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 51} }, + {31, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 52} }, + {32, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 57} }, + {33, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 58} }, + {34, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 59} }, + {35, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 60} }, + {36, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 61} }, + {37, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 62} }, + {38, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 63} }, + {39, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 64} }, + {40, 58, 6, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 65} }, + {41, 59, 6, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 66} }, + {42, 60, 6, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 67} }, + {43, 61, 6, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 68} }, + {44, 62, 6, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 69} }, + {45, 63, 6, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 70} }, + {46, 64, 6, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 71} }, + {47, 65, 6, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 72} }, + {48, 10, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {49, 11, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {50, 12, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, + {51, 13, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 97, 98, 99,100} }, + {52, 14, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {105,106,107,108} }, + {53, 15, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {113,114,115,116} }, + {54, 16, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {121,122,123,124} }, + {55, 17, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {125,126,127,128} }, +}; +#endif + +/* =========================================================== + * Maple Layout configuration (B version) + * =========================================================== + */ +#ifdef SWPS_MAPLE_B +unsigned maple_b_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s maple_b_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAPLE_0ABC, { { 6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + { 6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_MAPLE_NABC, { { 7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_MAPLE_NABC, { { 8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_MAPLE_NABC, { { 9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_MAPLE_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_MAPLE_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_MAPLE_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s maple_b_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 1, 23, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 2} }, + { 0, 22, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 1} }, + { 3, 25, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 4} }, + { 2, 24, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 3} }, + { 5, 27, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 6} }, + { 4, 26, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 5} }, + { 7, 29, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 8} }, + { 6, 28, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 7} }, + { 9, 31, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 14} }, + { 8, 30, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 13} }, + {11, 33, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 16} }, + {10, 32, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 15} }, + {13, 35, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 22} }, + {12, 34, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 21} }, + {15, 37, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 24} }, + {14, 36, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 23} }, + {17, 39, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 30} }, + {16, 38, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 29} }, + {19, 41, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 32} }, + {18, 40, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 31} }, + {21, 43, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 34} }, + {20, 42, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 33} }, + {23, 45, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 36} }, + {22, 44, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 35} }, + {25, 47, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 42} }, + {24, 46, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 41} }, + {27, 49, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 44} }, + {26, 48, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 43} }, + {29, 51, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 50} }, + {28, 50, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 49} }, + {31, 53, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 52} }, + {30, 52, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 51} }, + {33, 55, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 58} }, + {32, 54, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 57} }, + {35, 57, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 60} }, + {34, 56, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 59} }, + {37, 59, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 62} }, + {36, 58, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 61} }, + {39, 61, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 64} }, + {38, 60, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 63} }, + {41, 63, 6, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 66} }, + {40, 62, 6, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 65} }, + {43, 65, 6, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 68} }, + {42, 64, 6, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 67} }, + {45, 67, 6, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 70} }, + {44, 66, 6, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 69} }, + {47, 69, 6, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 72} }, + {46, 68, 6, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 71} }, + {49, 15, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {48, 14, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {51, 17, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 97, 98, 99,100} }, + {50, 16, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, + {53, 19, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {105,106,107,108} }, + {52, 18, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {113,114,115,116} }, + {55, 21, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {125,126,127,128} }, + {54, 20, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {121,122,123,124} }, +}; +#endif + + +/* ========================================== + * Gulmohar Layout configuration + * ========================================== + */ +#ifdef SWPS_GULMOHAR +unsigned gulmohar_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; + +struct inv_ioexp_layout_s gulmohar_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_GULMOHAR_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_GULMOHAR_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_GULMOHAR_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_GULMOHAR_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_GULMOHAR_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_GULMOHAR_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_GULMOHAR_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + + +struct inv_port_layout_s gulmohar_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 1} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 2} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 3} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 4} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 5} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 6} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 7} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 8} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 9} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 10} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 11} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 12} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 21} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 22} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 23} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 24} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 33} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 34} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 35} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 36} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 37} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 38} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 39} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 40} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 41} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 42} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 43} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 44} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 49} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 50} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 51} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 52} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 53} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 54} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 55} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 56} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 65} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 66} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 67} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 68} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 69} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 70} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 71} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 72} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 81} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 82} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 83} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 84} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 97, 98, 99,100} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 85, 86, 87, 88} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {101,102,103,104} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {105,106,107,108} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {109,110,111,112} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Gulmohar_2T EVT1 Layout configuration + * ========================================== + */ +#ifdef SWPS_GULMOHAR_2T_EVT1 +unsigned gulmohar_2t_evt1_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; + +struct inv_ioexp_layout_s gulmohar_2t_evt1_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC,{ {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC,{ {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC,{ {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xd6, 0xda}, {0x18, 0xe3}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xd6, 0xda}, {0x18, 0xe3}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xd6, 0xff}, {0x18, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + + +struct inv_port_layout_s gulmohar_2t_evt1_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {48, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {49, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {50, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {51, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {52, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {53, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {54, 65, 6, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {55, 64, 6, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, +}; +#endif + + +/* =========================================================== + * Peony-SFP Layout configuration + * =========================================================== + */ +#ifdef SWPS_PEONY_SFP +unsigned peony_sfp_gpio_rest_mux = MUX_RST_CPLD_C0_A77_70_74_RST_ALL; + +struct inv_ioexp_layout_s peony_sfp_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_QSFP_6P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 0 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s peony_sfp_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 20, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 1} }, + { 1, 21, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 2} }, + { 2, 22, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 3} }, + { 3, 23, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 4} }, + { 4, 24, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 5} }, + { 5, 25, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 6} }, + { 6, 26, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 7} }, + { 7, 27, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 8} }, + { 8, 28, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 13} }, + { 9, 29, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 14} }, + {10, 30, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 15} }, + {11, 31, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 16} }, + {12, 32, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 21} }, + {13, 33, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 22} }, + {14, 34, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 23} }, + {15, 35, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 24} }, + {16, 36, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 29} }, + {17, 37, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 30} }, + {18, 38, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 31} }, + {19, 39, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 32} }, + {20, 40, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 33} }, + {21, 41, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 34} }, + {22, 42, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 35} }, + {23, 43, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 36} }, + {24, 44, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 65} }, + {25, 45, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 66} }, + {26, 46, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 67} }, + {27, 47, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 68} }, + {28, 48, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 69} }, + {29, 49, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 70} }, + {30, 50, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 71} }, + {31, 51, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 72} }, + {32, 52, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 97} }, + {33, 53, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 98} }, + {34, 54, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 99} }, + {35, 55, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {100} }, + {36, 56, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {105} }, + {37, 57, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {106} }, + {38, 58, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {107} }, + {39, 59, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {108} }, + {40, 60, 6, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {113} }, + {41, 61, 6, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {114} }, + {42, 62, 6, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {115} }, + {43, 63, 6, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {116} }, + {44, 64, 6, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {121} }, + {45, 65, 6, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {122} }, + {46, 66, 6, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {123} }, + {47, 67, 6, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {124} }, + {48, 12, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 49, 50, 51, 52} }, + {49, 13, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 57, 58, 59, 60} }, + {50, 14, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 61, 62, 63, 64} }, + {51, 15, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {52, 16, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {53, 17, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, +}; +#endif + + +/* =========================================================== + * Peony-Copper Layout configuration + * =========================================================== + */ +#ifdef SWPS_PEONY_COPPER +unsigned peony_copper_gpio_rest_mux = MUX_RST_CPLD_C0_A77_70_74_RST_ALL; + +struct inv_ioexp_layout_s peony_copper_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_QSFP_6P_LAYOUT_1, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 0 A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, +}; + +struct inv_port_layout_s peony_copper_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + {48, 4, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 49, 50, 51, 52} }, + {49, 5, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 57, 58, 59, 60} }, + {50, 6, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 61, 62, 63, 64} }, + {51, 7, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {52, 8, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {53, 9, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, +}; +#endif + + + +#endif /* INV_SWPS_H */ + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_config_maple.h b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_config_maple.h new file mode 100644 index 00000000000..eb71b421c2c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_config_maple.h @@ -0,0 +1,134 @@ +//port info +#ifndef __IO_CONFIG_MAPLE_H +#define __IO_CONFIG_MAPLE_H + + +#define CPLD_EXPANDER_INT_N (12) /*GPIO 12*/ +#define CPLD_I2C_CH (2) +#define CPLD_I2C_ADDR (0x33) +/*reset mux gpio*/ +#define RESET_MUX_GPIO_NUM (69) +#define PORT_NUM (56) +#define END_OF_TABLE (0xff) +/*io expander layout*/ +const int io_i2c_ch_table[] = +{ + 7, + 8, + 9, + 10, + 11, + 12, + 6 +}; + +struct io_exp_input_t io_exp_present[] = +{ + /*sfp*/ + {.ch = 7, .addr = 0x20, .port_min = 0, .bit_min = 4, .bit_max = 7}, + {.ch = 7, .addr = 0x21, .port_min = 4, .bit_min = 4, .bit_max = 7}, + {.ch = 8, .addr = 0x20, .port_min = 8, .bit_min = 4, .bit_max = 7}, + {.ch = 8, .addr = 0x21, .port_min = 12, .bit_min = 4, .bit_max = 7}, + {.ch = 9, .addr = 0x20, .port_min = 16, .bit_min = 4, .bit_max = 7}, + {.ch = 9, .addr = 0x21, .port_min = 20, .bit_min = 4, .bit_max = 7}, + {.ch = 10, .addr = 0x20, .port_min = 24, .bit_min = 4, .bit_max = 7}, + {.ch = 10, .addr = 0x21, .port_min = 28, .bit_min = 4, .bit_max = 7}, + {.ch = 11, .addr = 0x20, .port_min = 32, .bit_min = 4, .bit_max = 7}, + {.ch = 11, .addr = 0x21, .port_min = 36, .bit_min = 4, .bit_max = 7}, + {.ch = 12, .addr = 0x20, .port_min = 40, .bit_min = 4, .bit_max = 7}, + {.ch = 12, .addr = 0x21, .port_min = 44, .bit_min = 4, .bit_max = 7}, + /*qsfp*/ + {.ch = 6, .addr = 0x22, .port_min = 48, .bit_min = 8, .bit_max = 15}, + {.ch = END_OF_TABLE} /*end of table*/ +}; +struct io_exp_input_t io_exp_txfault[] = +{ + /*sfp*/ + {.ch = 7, .addr = 0x20, .port_min = 0, .bit_min = 0, .bit_max = 3}, + {.ch = 7, .addr = 0x21, .port_min = 4, .bit_min = 0, .bit_max = 3}, + {.ch = 8, .addr = 0x20, .port_min = 8, .bit_min = 0, .bit_max = 3}, + {.ch = 8, .addr = 0x21, .port_min = 12, .bit_min = 0, .bit_max = 3}, + {.ch = 9, .addr = 0x20, .port_min = 16, .bit_min = 0, .bit_max = 3}, + {.ch = 9, .addr = 0x21, .port_min = 20, .bit_min = 0, .bit_max = 3}, + {.ch = 10, .addr = 0x20, .port_min = 24, .bit_min = 0, .bit_max = 3}, + {.ch = 10, .addr = 0x21, .port_min = 28, .bit_min = 0, .bit_max = 3}, + {.ch = 11, .addr = 0x20, .port_min = 32, .bit_min = 0, .bit_max = 3}, + {.ch = 11, .addr = 0x21, .port_min = 36, .bit_min = 0, .bit_max = 3}, + {.ch = 12, .addr = 0x20, .port_min = 40, .bit_min = 0, .bit_max = 3}, + {.ch = 12, .addr = 0x21, .port_min = 44, .bit_min = 0, .bit_max = 3}, + {.ch = END_OF_TABLE} /*end of table*/ +}; +struct io_exp_input_t io_exp_rxlos[] = +{ + /*sfp*/ + {.ch = 7, .addr = 0x20, .port_min = 0, .bit_min = 12, .bit_max = 15}, + {.ch = 7, .addr = 0x21, .port_min = 4, .bit_min = 12, .bit_max = 15}, + {.ch = 8, .addr = 0x20, .port_min = 8, .bit_min = 12, .bit_max = 15}, + {.ch = 8, .addr = 0x21, .port_min = 12, .bit_min = 12, .bit_max = 15}, + {.ch = 9, .addr = 0x20, .port_min = 16, .bit_min = 12, .bit_max = 15}, + {.ch = 9, .addr = 0x21, .port_min = 20, .bit_min = 12, .bit_max = 15}, + {.ch = 10, .addr = 0x20, .port_min = 24, .bit_min = 12, .bit_max = 15}, + {.ch = 10, .addr = 0x21, .port_min = 28, .bit_min = 12, .bit_max = 15}, + {.ch = 11, .addr = 0x20, .port_min = 32, .bit_min = 12, .bit_max = 15}, + {.ch = 11, .addr = 0x21, .port_min = 36, .bit_min = 12, .bit_max = 15}, + {.ch = 12, .addr = 0x20, .port_min = 40, .bit_min = 12, .bit_max = 15}, + {.ch = 12, .addr = 0x21, .port_min = 44, .bit_min = 12, .bit_max = 15}, + {.ch = END_OF_TABLE} /*end of table*/ +}; +/*only config input pin for our purpose*/ +struct io_exp_config_t io_exp_config[] = +{ + /*sfp*/ + {.ch = 7, .addr = 0x20, .val = 0xf0ff}, + {.ch = 7, .addr = 0x21, .val = 0xf0ff}, + {.ch = 7, .addr = 0x22, .val = 0x0000}, + {.ch = 8, .addr = 0x20, .val = 0xf0ff}, + {.ch = 8, .addr = 0x21, .val = 0xf0ff}, + {.ch = 8, .addr = 0x22, .val = 0x0000}, + {.ch = 9, .addr = 0x20, .val = 0xf0ff}, + {.ch = 9, .addr = 0x21, .val = 0xf0ff}, + {.ch = 9, .addr = 0x22, .val = 0x0000}, + {.ch = 10, .addr = 0x20, .val = 0xf0ff}, + {.ch = 10, .addr = 0x21, .val = 0xf0ff}, + {.ch = 10, .addr = 0x22, .val = 0x0000}, + {.ch = 11, .addr = 0x20, .val = 0xf0ff}, + {.ch = 11, .addr = 0x21, .val = 0xf0ff}, + {.ch = 11, .addr = 0x22, .val = 0x0000}, + {.ch = 12, .addr = 0x20, .val = 0xf0ff}, + {.ch = 12, .addr = 0x21, .val = 0xf0ff}, + {.ch = 12, .addr = 0x22, .val = 0x0000}, + /*qsfp*/ + {.ch = 6, .addr = 0x20, .val = 0x0000}, + {.ch = 6, .addr = 0x21, .val = 0xff00}, + {.ch = 6, .addr = 0x22, .val = 0xffff}, + {.ch = END_OF_TABLE} /*end of table*/ +}; +/*cpld 0x36, 0x37 maping*/ +int input_change_table[] = +{ + 0, /*port 0~3 , only record first port*/ + 4, + 8, + 12, + 16, + 20, + 24, + 28, + 32, + 36, + 40, + 44, + 48 +}; +int ioexp_port_2_port[PORT_NUM] = +{ + 0, 1, 2, 3 ,4, 5, 6, 7, + 8, 9, 10, 11 ,12, 13, 14, 15, + 16, 17, 18, 19 ,20, 21, 22, 23, + 24, 25, 26, 27 ,28, 29, 30, 31, + 32, 33, 34, 35 ,36, 37, 38, 39, + 40, 41, 42, 43 ,44, 45, 46, 47, + 48, 49, 50, 51 ,52, 53, 54, 55, + +}; +#endif /*__IO_CONFIG_MAPLE_H*/ diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_expander.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_expander.c new file mode 100644 index 00000000000..85e9b2a23a8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_expander.c @@ -0,0 +1,2572 @@ +#include +#include +#include "io_expander.h" +/* For build single module using (Ex: ONL platform) */ +#include +//#include + + +static struct ioexp_obj_s *ioexp_head_p = NULL; +static struct ioexp_obj_s *ioexp_tail_p = NULL; +extern int io_no_init; + +/* ========== Register IOEXP layout ========== + */ +struct ioexp_map_s ioexp_map_magnolia_nab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_4ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_7ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {1, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {1, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {1, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 2}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 3}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 0, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 0, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 0, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 0, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 0, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 0, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 0, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 1, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 1, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 1, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 1, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 1, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 1, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 1, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 1, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 1, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 1, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {0, 1, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {0, 1, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {1, 1, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {1, 1, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {1, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {1, 1, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_5a = { + + .chip_amount = 1, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_6abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 0}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 3}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 0}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + {2, 1, 5}, /* map_present[8] = MOD_ABS_PORT(X+8) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {1, 0, 1}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 6}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 1, 3}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {2, 0, 1}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {2, 0, 6}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + {2, 1, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 2}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 7}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 1, 4}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {2, 0, 2}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {2, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + {2, 1, 4}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+8) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {1, 0, 0}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 0, 5}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 2}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {2, 0, 0}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {2, 0, 5}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + {2, 1, 2}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_sequoia_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_lavender_p65 = { + + .chip_amount = 1, + .data_width = 1, + + .map_present = { {0, 0, 4}, }, /* map_present[0] = MOD_ABS_PORT(X) */ + .map_reset = { {0, 0, 1}, }, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + .map_lpmod = { {0, 0, 2}, }, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + .map_modsel = { {0, 0, 0}, }, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ +}; + + +struct ioexp_map_s cpld_map_cottonwood = { + + .chip_amount = 1, + .data_width = 4, + + .map_present = { {0, 2, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 2, 4}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 3, 0}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 3, 4}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + }, + .map_tx_disable = { {0, 0, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + }, + .map_tx_fault = { {0, 2, 2}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 2, 6}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 3, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 3, 6}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + }, + .map_rxlos = { {0, 2, 1}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 2, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 3, 1}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 3, 5}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + }, + .map_hard_rs0 = { {0, 0, 2}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {0, 0, 6}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {0, 1, 2}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {0, 1, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + }, + .map_hard_rs1 = { {0, 0, 2}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {0, 0, 6}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {0, 1, 2}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {0, 1, 6}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + }, +}; + + +struct ioexp_map_s ioexp_map_maple_0abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_maple_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 4}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 5}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 4}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 5}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 2}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 3}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 2}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 3}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 1}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 1}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 6}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 6}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 2}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 6}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 6}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 2}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 6}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 2}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 6}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 1}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 5}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 1}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 5}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 1}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 5}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 1}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 5}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 4}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 4}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 3}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 3}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 3}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 3}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_1abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 2}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 6}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 6}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 4}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 5}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 1}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 5}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 1}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 5}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 2}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 3}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 1}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 3}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 3}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 6}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_3abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 4}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 5}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 2}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 6}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 2}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 6}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 2}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 3}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 1}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 5}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 1}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 5}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 1}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 4}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 4}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 6}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 3}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 3}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 4}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 1}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 6}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 4}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 1}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {1, 0, 1}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {1, 0, 6}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {1, 1, 3}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + {2, 0, 1}, /* map_reset[6] = QRESET_QSFP_N_P(X+6) */ + {2, 0, 6}, /* map_reset[7] = QRESET_QSFP_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 2}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 7}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 1, 4}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + {2, 0, 2}, /* map_lpmod[6] = LPMODE_QSFP_P(X+6) */ + {2, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {1, 0, 0}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 0, 5}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 2}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + {2, 0, 0}, /* map_modsel[6] = MODSEL_QSFP_N_P(X+6) */ + {2, 0, 5}, /* map_modsel[7] = MODSEL_QSFP_N_P(X+7) */ + }, +}; + + +/* PortType: SFP / 8 port + * Platform: Cypress, Peony_SFP + */ +struct ioexp_map_s ioexp_map_sfp_8p_layout_1 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +/* PortType: QSFP / 6 port + * Platform: Gulmohar, Peony_SFP, Peony_Copper + */ +struct ioexp_map_s ioexp_map_6p_qsfp_type_1 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +/* ========== Private functions ========== + */ +int check_channel_tier_1(void); + +struct i2c_client * +_get_i2c_client(struct ioexp_obj_s *self, + int chip_id){ + + struct ioexp_i2c_s *i2c_curr_p = self->i2c_head_p; + + if (!(i2c_curr_p)){ + SWPS_ERR("%s: i2c_curr_p is NULL\n", __func__); + return NULL; + } + while (i2c_curr_p){ + if ((i2c_curr_p->chip_id) == chip_id){ + return i2c_curr_p->i2c_client_p; + } + i2c_curr_p = i2c_curr_p->next; + } + SWPS_ERR("%s: not exist! :%d\n", __func__, chip_id); + return NULL; +} + + +static int +_common_ioexp_update_one(struct ioexp_obj_s *self, + struct ioexp_addr_s *ioexp_addr, + int chip_id, + int data_width, + int show_err, + char *caller_name) { + int buf = 0; + int err = 0; + int data_id = 0; + int r_offset = 0; + + for(data_id=0; data_idread_offset[data_id]; + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), r_offset); + /* Check error */ + if (buf < 0) { + err = 1; + if (show_err) { + SWPS_INFO("IOEXP-%d read fail! :%d \n", self->ioexp_id, buf); + SWPS_INFO("Dump: :%d :0x%02x :%d, :%s\n", + ioexp_addr->chan_id, ioexp_addr->chip_addr, + ioexp_addr->read_offset[data_id], caller_name); + } + continue; + } + /* Update IOEXP object */ + self->chip_data[chip_id].data[data_id] = (uint8_t)buf; + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +common_ioexp_update_all(struct ioexp_obj_s *self, + int show_err, + char *caller_name){ + + int err = 0; + int chip_id = 0; + int chip_amount = self->ioexp_map_p->chip_amount; + + for (chip_id=0; chip_idioexp_map_p->map_addr[chip_id]), + chip_id, + self->ioexp_map_p->data_width, + show_err, + caller_name) < 0) { + err = 1; + } + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +_common_check_by_mode(struct ioexp_obj_s *self){ + + switch (self->mode){ + case IOEXP_MODE_DIRECT: + return self->fsm_4_direct(self); + + case IOEXP_MODE_POLLING: + if (self->state >= 0){ + return 0; + } + switch (self->state){ + case STATE_IOEXP_INIT: + return ERR_IOEXP_UNINIT; + case STATE_IOEXP_ABNORMAL: + return ERR_IOEXP_ABNORMAL; + default: + return ERR_IOEXP_NOSTATE; + } + break; + + default: + break; + } + SWPS_ERR("%s: Exception occurs. :%d \n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +static int +_common_get_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + char *func_mane){ + uint8_t buf; + int err_code; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Get data form cache */ + buf = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + return (int)(buf >> bitmap_obj_p->bit_shift & 0x01); +} + + +static int +_common_set_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + int input_val, + char *func_mane){ + int err_code, target_offset; + uint8_t origin_byte; + uint8_t modify_byte; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Prepare write date */ + origin_byte = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + switch (input_val) { + case 0: + modify_byte = origin_byte; + SWP_BIT_CLEAR(modify_byte, bitmap_obj_p->bit_shift); + break; + case 1: + modify_byte = origin_byte; + SWP_BIT_SET(modify_byte, bitmap_obj_p->bit_shift); + break; + default: + SWPS_ERR("Input value incorrect! :%d :%d :%s\n", + input_val, self->ioexp_id, func_mane); + return ERR_IOEXP_BADINPUT; + } + /* Setup i2c client */ + target_offset = self->ioexp_map_p->map_addr[bitmap_obj_p->chip_id].write_offset[bitmap_obj_p->ioexp_voffset]; + /* Write byte to chip via I2C */ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, bitmap_obj_p->chip_id), + target_offset, + modify_byte); + /* Update or bollback object */ + if (err_code < 0){ + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = origin_byte; + SWPS_ERR("I2C write fail! :%d :%d :%s :%d\n", + input_val, self->ioexp_id, func_mane, err_code); + return err_code; + } + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = modify_byte; + return 0; +} + + +/* ========== Object public functions ========== + */ +int +common_get_present(struct ioexp_obj_s *self, + int virt_offset){ + + int UNPLUG = 1; + int retval = ERR_IOEXP_UNEXCPT; + + retval = _common_get_bit(self, + &(self->ioexp_map_p->map_present[virt_offset]), + "common_get_present"); + if (retval < 0) { + /* [Note] + * => Transceiver object does not need to handle IOEXP layer issues. + */ + return UNPLUG; + } + return retval; +} + + +int +common_get_tx_fault(struct ioexp_obj_s *self, + int virt_offset){ + /* [Transmit Fault (Tx_Fault)] + * A catastrophic laser fault will activate the transmitter signal, + * TX_FAULT, and disable the laser. This signal is an open collector + * output (pull-up required on the host board). A low signal indicates + * normal laser operation and a high signal indicates a fault. The + * TX_FAULT will be latched high when a laser fault occurs and is + * cleared by toggling the TX_DISABLE input or power cycling the + * transceiver. The transmitter fault condition can also be monitored + * via the two-wire serial interface. + * (address A2, byte 110, bit 2). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_fault[virt_offset]), + "common_get_tx_fault"); +} + + +int +common_get_rxlos(struct ioexp_obj_s *self, + int virt_offset){ + /* [Receiver Loss of Signal (Rx_LOS)] + * The post-amplification IC also includes transition detection circuitry + * which monitors the ac level of incoming optical signals and provides a + * TTL/CMOS compatible status signal to the host (pin 8). An adequate optical + * input results in a low Rx_LOS output while a high Rx_LOS output indicates + * an unusable optical input. The Rx_LOS thresholds are factory set so that + * a high output indicates a definite optical fault has occurred. Rx_LOS can + * also be monitored via the two-wire serial interface + * (address A2h, byte 110, bit 1). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_rxlos[virt_offset]), + "common_get_rxlos"); +} + + +int +common_get_tx_disable(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + "common_get_tx_disable"); +} + + +int +common_get_reset(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + "common_get_reset"); +} + + +int +common_get_lpmod(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + "common_get_lpmod"); +} + + +int +common_get_modsel(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + "common_get_modsel"); +} + + +int +common_get_hard_rs0(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + "common_get_hard_rs0"); +} + + +int +common_get_hard_rs1(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + "common_get_hard_rs1"); +} + + +int +common_set_tx_disable(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + input_val, + "common_set_tx_disable"); +} + + +int +common_set_reset(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + input_val, + "common_set_reset"); +} + + +int +common_set_lpmod(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + input_val, + "common_set_lpmod"); +} + + +int +common_set_modsel(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + input_val, + "common_set_modsel"); +} + + +int +common_set_hard_rs0(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + input_val, + "common_set_hard_rs0"); +} + + +int +common_set_hard_rs1(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + input_val, + "common_set_hard_rs1"); +} + + +int +ioexp_get_not_support(struct ioexp_obj_s *self, + int virt_offset){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +ioexp_set_not_support(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +fake_ioexp_init(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_ioexp_update(struct ioexp_obj_s *self){ + return 1; +} + + +int +fake_update_func(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_get_func(struct ioexp_obj_s *self, + int virt_offset){ + SWPS_WARN("Someone called fake_get_func\n"); + return -1; +} + +int +fake_set_func(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + SWPS_WARN("Someone called fake_set_func\n"); + return -1; +} + + +/* ========== Initial functions for IO Expander ========== + */ +int +common_ioexp_init(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + if (self->mode == IOEXP_MODE_DIRECT) { + goto update_common_ioexp_init; + } + if (!io_no_init) { /*normal init*/ + + /* Setup default value to each physical IO Expander */ + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + /* Get address mapping */ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("%s: IOEXP config incorrect! :%d \n", + __func__, chip_id); + return -1; + } + /* Setup default value */ + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + /* [Desc] Skip the setup default value behavior + [Note] Setup default value = -1 if you don't want to write the value to IOEXP or CPLD + */ + if(addr_p->write_offset[offset] < 0){ + SWPS_DEBUG("skip a write_offset <%d>\n", addr_p->conf_offset[offset]); + continue; + } + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->write_offset[offset], + addr_p->data_default[offset]); + if (err_code < 0){ + SWPS_ERR("%s: set default fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + } + } + } +update_common_ioexp_init: + /* Check and update info to object */ + err_code = self->update_all(self, 1, "common_ioexp_init"); + if (err_code < 0) { + SWPS_ERR("%s: update_all() fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +/* ========== Object functions for Final State Machine ========== + */ +int +_is_channel_ready(struct ioexp_obj_s *self){ + + int chip_id = 0; + int byte_id = 0; + int getval = ERR_IOEXP_UNEXCPT; + int chkval = ERR_IOEXP_UNEXCPT; + char *emsg = "ERR"; + struct ioexp_addr_s *addr_p = NULL; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++) { + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + emsg = "IOEXP config incorrect"; + goto err_is_channel_ready; + } + for (byte_id=0; byte_id<(self->ioexp_map_p->data_width); byte_id++) { + if (addr_p->conf_offset[byte_id] < 0) { + continue; + } + if ((addr_p->conf_default[byte_id]) != 0) { + goto go_is_channel_ready; + } + } + if (chip_id == ((self->ioexp_map_p->chip_amount) - 1)) { + SWPS_DEBUG("%s: no non-zero config", __func__); + break; + } + } + chip_id = 0; + byte_id = 0; + +go_is_channel_ready: + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + chkval = addr_p->conf_default[byte_id]; + getval = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[byte_id]); + + SWPS_DEBUG("%s: target info :%d :%d :%d :%d :%d\n", + __func__, self->ioexp_id, chip_id, byte_id, chkval, getval); + + if ((getval >= 0) && (getval == chkval)) { + return 1; + } + return 0; + +err_is_channel_ready: + SWPS_ERR("%s: %s :%d :%d :%d :%d :%d\n", + __func__, emsg, self->ioexp_id, chip_id, byte_id, chkval, getval); + return ERR_IOEXP_UNEXCPT; +} + + +int +_ioexp_init_handler(struct ioexp_obj_s *self){ + + int return_val; + + switch (self->mode) { + case IOEXP_MODE_DIRECT: + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + case IOEXP_MODE_POLLING: + /* Check system and channel is ready */ + if (self->state == STATE_IOEXP_INIT){ + if (!_is_channel_ready(self)){ + self->state = STATE_IOEXP_INIT; + SWPS_WARN("%s: IOEXP:%d channel not ready.\n", + __func__, self->ioexp_id); + return 0; + } + } + /* Execute initial callback */ + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + default: + break; + } + SWPS_ERR("%s: exception occur :%d\n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_direct(struct ioexp_obj_s *self){ + + int result_val; + int show_err = 1; + char *func_mane = "common_ioexp_fsm_4_direct"; + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, and return error */ + return ERR_IOEXP_UNINIT; + } + /* Case: Initial done */ + return 0; + + case STATE_IOEXP_NORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + SWPS_INFO("%s: NORMAL -> ABNORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + self->state = STATE_IOEXP_NORMAL; + return 0; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_DEBUG("%s: ABNORMAL -> NORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("%s: Exception occurs :%d\n", + __func__, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_polling(struct ioexp_obj_s *self){ + + int result_val, i, show_e; + int fail_retry = 3; + char *func_name = "common_ioexp_fsm_4_polling"; + +#ifdef DEBUG_SWPS + show_e = 1; +#else + show_e = 0; +#endif + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + /* Case: System (Channel) not ready */ + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, wait and retry */ + return 0; + } + /* Case: Initial done */ + SWPS_INFO("IOEXP-%d: initial done. :%d\n", + self->ioexp_id, self->ioexp_type); + return result_val; + + case STATE_IOEXP_NORMAL: + /* Retry mechanism for case of i2c topology not stable */ + for (i=0; iupdate_all(self, show_e, func_name); + if (result_val >= 0) { + self->state = STATE_IOEXP_NORMAL; + return 0; + } + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: detect I2C crash :%d\n", + __func__, self->ioexp_id); + break; + } + SWPS_DEBUG("IOEXP-%d: unstable :%d\n", + self->ioexp_id, result_val); + } + SWPS_INFO("IOEXP-%d: NORMAL -> ABNORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_e, func_name); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_INFO("IOEXP-%d: ABNORMAL -> NORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("IOEXP-%d: Exception occurs :%d\n", + self->ioexp_id, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +/* ========== Object private functions for check & update ========== + */ +int +common_ioexp_check(struct ioexp_obj_s *self){ + + int result; + + if (self->mode != IOEXP_MODE_POLLING){ + SWPS_ERR("%s: not polling mode :%d\n", + __func__, self->mode); + return ERR_IOEXP_NOTSUPPORT; + } + mutex_lock(&self->lock); + result = self->fsm_4_polling(self); + mutex_unlock(&self->lock); + return result; +} + + +/* ========== Functions for Factory pattern ========== + */ +static struct ioexp_map_s * +get_ioexp_map(int ioexp_type){ + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + return &ioexp_map_magnolia_nab; + case IOEXP_TYPE_MAGINOLIA_4AB: + return &ioexp_map_magnolia_4ab; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + return &ioexp_map_magnolia_7ab; + case IOEXP_TYPE_REDWOOD_P01P08: + return &ioexp_map_redwood_p01p08_p17p24; + case IOEXP_TYPE_REDWOOD_P09P16: + return &ioexp_map_redwood_p09p16_p25p32; + case IOEXP_TYPE_HUDSON32IGA_P01P08: + return &ioexp_map_hudson32iga_p01p08_p17p24; + case IOEXP_TYPE_HUDSON32IGA_P09P16: + return &ioexp_map_hudson32iga_p09p16_p25p32; + case IOEXP_TYPE_CYPRESS_7ABC: + return &ioexp_map_cypress_7abc; + case IOEXP_TYPE_TAHOE_5A: + return &ioexp_map_tahoe_5a; + case IOEXP_TYPE_TAHOE_6ABC: + return &ioexp_map_tahoe_6abc; + case IOEXP_TYPE_SEQUOIA_NABC: + return &ioexp_map_sequoia_nabc; + case IOEXP_TYPE_LAVENDER_P65: + return &ioexp_map_lavender_p65; + case CPLD_TYPE_COTTONWOOD: + return &cpld_map_cottonwood; + case IOEXP_TYPE_MAPLE_0ABC: + return &ioexp_map_maple_0abc; + case IOEXP_TYPE_MAPLE_NABC: + return &ioexp_map_maple_nabc; + case IOEXP_TYPE_GULMOHAR_NABC: + return &ioexp_map_gulmohar_nabc; + case IOEXP_TYPE_GULMOHAR_7ABC: + return &ioexp_map_gulmohar_7abc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + return &ioexp_map_gulmohar_2t_evt1_nabc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + return &ioexp_map_gulmohar_2t_evt1_1abc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + return &ioexp_map_gulmohar_2t_evt1_3abc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + return &ioexp_map_gulmohar_2t_evt1_7abc; + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + return &ioexp_map_sfp_8p_layout_1; + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + return &ioexp_map_6p_qsfp_type_1; + default: + return NULL; + } +} + + +int +setup_ioexp_ssize_attr(struct ioexp_obj_s *self, + struct ioexp_map_s *ioexp_map_p, + int ioexp_id, + int ioexp_type, + int run_mode){ + switch (run_mode){ + case IOEXP_MODE_POLLING: /* Direct access device mode */ + case IOEXP_MODE_DIRECT: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = ERR_IOEXP_UNEXCPT; + return ERR_IOEXP_UNEXCPT; + } + /* Setup mapping structure */ + self->ioexp_map_p = kzalloc(sizeof(*ioexp_map_p), GFP_KERNEL); + if (!(self->ioexp_map_p)) { + SWPS_ERR("%s: kzalloc ioexp_map_p fail\n", __func__); + return -1; + } + memcpy(self->ioexp_map_p, ioexp_map_p, sizeof(*ioexp_map_p)); + /* Setup attributes */ + self->ioexp_id = ioexp_id; + self->ioexp_type = ioexp_type; + self->state = STATE_IOEXP_INIT; + mutex_init(&self->lock); + return 0; +} + + +static int +setup_addr_mapping(struct ioexp_obj_s *self, + struct ioexp_addr_s *addr_map_p, + int chip_amount){ + struct ioexp_addr_s *tmp_p; + if (!addr_map_p){ + SWPS_ERR("%s: map is null\n", __func__); + return -1; + } + tmp_p = kzalloc((sizeof(*addr_map_p) * chip_amount), GFP_KERNEL); + if (!tmp_p){ + SWPS_ERR("%s: kzalloc fail.\n", __func__); + return -1; + } + memcpy(tmp_p, addr_map_p, (sizeof(*addr_map_p) * chip_amount)); + self->ioexp_map_p->map_addr = tmp_p; + + return 0; +} + + +static int +setup_ioexp_public_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case CPLD_TYPE_COTTONWOOD: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_GULMOHAR_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = common_get_hard_rs0; + self->get_hard_rs1 = common_get_hard_rs1; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = common_set_hard_rs0; + self->set_hard_rs1 = common_set_hard_rs1; + return 0; + + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case IOEXP_TYPE_MAPLE_0ABC: + case IOEXP_TYPE_GULMOHAR_7ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + self->get_present = common_get_present; + self->get_tx_fault = ioexp_get_not_support; + self->get_rxlos = ioexp_get_not_support; + self->get_tx_disable = ioexp_get_not_support; + self->get_reset = common_get_reset; + self->get_lpmod = common_get_lpmod; + self->get_modsel = common_get_modsel; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = ioexp_set_not_support; + self->set_reset = common_set_reset; + self->set_lpmod = common_set_lpmod; + self->set_modsel = common_set_modsel; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_ioexp_private_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case CPLD_TYPE_COTTONWOOD: + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_MAPLE_0ABC: + case IOEXP_TYPE_GULMOHAR_NABC: + case IOEXP_TYPE_GULMOHAR_7ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + self->init = common_ioexp_init; + self->check = common_ioexp_check; + self->update_all = common_ioexp_update_all; + self->fsm_4_direct = common_ioexp_fsm_4_direct; + self->fsm_4_polling = common_ioexp_fsm_4_polling; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_i2c_client_one(struct ioexp_obj_s *self, + int chip_id){ + + char *err_msg = "ERROR"; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + struct ioexp_i2c_s *i2c_obj_p = NULL; + struct ioexp_i2c_s *i2c_curr_p = NULL; + + int chan_id = self->ioexp_map_p->map_addr[chip_id].chan_id; + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + err_msg = "Can not kzalloc client!"; + goto err_ioexp_setup_i2c_1; + } + i2c_obj_p = kzalloc(sizeof(*i2c_obj_p), GFP_KERNEL); + if (!i2c_obj_p){ + err_msg = "Can not kzalloc i2c_obj_p!"; + goto err_ioexp_setup_i2c_2; + } + adap = i2c_get_adapter(chan_id); + if(!adap){ + err_msg = "Can not get adap!"; + goto err_ioexp_setup_i2c_3; + } + client->adapter = adap; + client->addr = self->ioexp_map_p->map_addr[chip_id].chip_addr; + i2c_obj_p->i2c_client_p = client; + i2c_obj_p->chip_id = chip_id; + i2c_obj_p->next = NULL; + if (!self->i2c_head_p){ + self->i2c_head_p = i2c_obj_p; + } else { + i2c_curr_p = self->i2c_head_p; + while (i2c_curr_p->next){ + i2c_curr_p = i2c_curr_p->next; + } + i2c_curr_p->next = i2c_obj_p; + } + return 0; + +err_ioexp_setup_i2c_3: + kfree(i2c_obj_p); +err_ioexp_setup_i2c_2: + kfree(client); +err_ioexp_setup_i2c_1: + SWPS_ERR("%s: %s :%d\n", __func__, err_msg, chan_id); + return -1; +} + + +static int +setup_i2c_client(struct ioexp_obj_s* self){ + + int result; + int chip_id = 0; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + result = setup_i2c_client_one(self, chip_id); + if (result < 0){ + SWPS_ERR("%s fail! :%d\n", __func__, chip_id); + return -1; + } + } + return 0; +} + + +static int +setup_ioexp_config(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + if (io_no_init) { + + SWPS_INFO("io_no_init:%d \n", io_no_init); + return 0; + } + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("IOEXP config incorrect! :%d \n",chip_id); + return -1; + } + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + /* [Desc] Skip the setup config value behavior + [Note] Setup config value = -1 if you don't want to write the value to IOEXP or CPLD + */ + if(addr_p->conf_offset[offset] < 0){ + SWPS_DEBUG("skip a config_offset <%d>\n", addr_p->conf_offset[offset]); + continue; + } + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[offset], + addr_p->conf_default[offset]); + + if (err_code < 0){ + SWPS_INFO("%s: set conf fail! :%d \n", __func__, err_code); + return -2; + } + } + } + return 0; +} + + +struct ioexp_obj_s * +_create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_map_s* ioexp_map_p; + struct ioexp_obj_s* result_p; + struct ioexp_i2c_s *i2c_curr_p; + struct ioexp_i2c_s *i2c_next_p; + + /* Get layout */ + ioexp_map_p = get_ioexp_map(ioexp_type); + if (!ioexp_map_p){ + SWPS_ERR("%s: Invalid ioexp_type\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare IOEXP object */ + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + SWPS_ERR("%s: kzalloc failure!\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare static size attributes */ + if (setup_ioexp_ssize_attr(result_p, + ioexp_map_p, + ioexp_id, + ioexp_type, + run_mode) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + /* Prepare address mapping */ + if (setup_addr_mapping(result_p, addr_map_p, ioexp_map_p->chip_amount) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + if (setup_i2c_client(result_p) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + /* Prepare call back functions of object */ + if (setup_ioexp_public_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + if (setup_ioexp_private_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + return result_p; + +err_create_ioexp_setup_i2c_fail: + i2c_curr_p = result_p->i2c_head_p; + i2c_next_p = result_p->i2c_head_p; + while (i2c_curr_p){ + i2c_next_p = i2c_curr_p->next; + if (i2c_curr_p->i2c_client_p) { + i2c_put_adapter(i2c_curr_p->i2c_client_p->adapter); + kfree(i2c_curr_p->i2c_client_p); + } + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } +err_create_ioexp_setup_attr_fail: + kfree(result_p); +err_create_ioexp_fail: + SWPS_ERR("%s: fail! :%d :%d \n", + __func__, ioexp_id, ioexp_type); + return NULL; +} + + +int +create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_obj_s *ioexp_p = NULL; + + ioexp_p = _create_ioexp_obj(ioexp_id, ioexp_type, + addr_map_p, run_mode); + if (!ioexp_p){ + return -1; + } + if (ioexp_head_p == NULL){ + ioexp_head_p = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; + } + ioexp_tail_p->next = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; +} +EXPORT_SYMBOL(create_ioexp_obj); + + +static int +_init_ioexp_obj(struct ioexp_obj_s* self) { + + char *err_msg = "ERR"; + char *func_name = "_init_ioexp_obj"; + + /* Setup IOEXP configure byte */ + if (setup_ioexp_config(self) < 0){ + err_msg = "setup_ioexp_config fail"; + goto err_init_ioexp_obj; + } + /* Setup default data */ + if (_ioexp_init_handler(self) < 0){ + err_msg = "_ioexp_init_handler fail"; + goto err_init_ioexp_obj; + } + /* Update all */ + if (self->state == STATE_IOEXP_NORMAL){ + if (self->update_all(self, 1, func_name) < 0){ + err_msg = "update_all() fail"; + goto err_init_ioexp_obj; + } + } + return 0; + +err_init_ioexp_obj: + SWPS_DEBUG("%s: %s\n", __func__, err_msg); + return -1; +} + + +int +init_ioexp_objs(void){ + /* Return value: + * 0: Success + * -1: Detect topology error + * -2: SWPS internal error + */ + struct ioexp_obj_s *curr_p = ioexp_head_p; + + if (!curr_p) { + SWPS_ERR("%s: ioexp_head_p is NULL\n", __func__); + return -2; + } + while (curr_p) { + if (_init_ioexp_obj(curr_p) < 0) { + SWPS_DEBUG("%s: _init_ioexp_obj() fail\n", __func__); + return -1; + } + curr_p = curr_p->next; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} +EXPORT_SYMBOL(init_ioexp_objs); + + +void +clean_ioexp_objs(void){ + + struct ioexp_i2c_s *i2c_curr_p = NULL; + struct ioexp_i2c_s *i2c_next_p = NULL; + struct ioexp_obj_s *ioexp_next_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + if (ioexp_head_p == NULL){ + ioexp_tail_p = NULL; + return; + } + while(ioexp_curr_p){ + ioexp_next_p = ioexp_curr_p->next; + if (ioexp_curr_p->ioexp_map_p) { + if (ioexp_curr_p->ioexp_map_p->map_addr) { + kfree(ioexp_curr_p->ioexp_map_p->map_addr); + } + kfree(ioexp_curr_p->ioexp_map_p); + } + + i2c_curr_p = ioexp_curr_p->i2c_head_p; + while (i2c_curr_p) { + i2c_next_p = i2c_curr_p->next; + if (i2c_curr_p->i2c_client_p) { + i2c_put_adapter(i2c_curr_p->i2c_client_p->adapter); + kfree(i2c_curr_p->i2c_client_p); + } + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } + kfree(ioexp_curr_p); + ioexp_curr_p = ioexp_next_p; + } + ioexp_tail_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} +EXPORT_SYMBOL(clean_ioexp_objs); + + +int +check_ioexp_objs(void){ + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while (ioexp_curr_p){ + if ( (ioexp_curr_p->check(ioexp_curr_p)) < 0){ + SWPS_INFO("check IOEXP-%d fail! :%d\n", + ioexp_curr_p->ioexp_id, ioexp_curr_p->ioexp_type); + return -1; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} +EXPORT_SYMBOL(check_ioexp_objs); + + +struct ioexp_obj_s * +get_ioexp_obj(int ioexp_id){ + + struct ioexp_obj_s *result_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + if (ioexp_curr_p->ioexp_id == ioexp_id){ + result_p = ioexp_curr_p; + break; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return result_p; +} +EXPORT_SYMBOL(get_ioexp_obj); + + +void +unlock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_unlock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } +} +EXPORT_SYMBOL(unlock_ioexp_all); + +int +lock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_lock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} +EXPORT_SYMBOL(lock_ioexp_all); + + +int +check_channel_tier_1(void) { + + if ( (!_is_channel_ready(ioexp_head_p)) && + (!_is_channel_ready(ioexp_tail_p)) ){ + return -1; + } + return 0; +} +EXPORT_SYMBOL(check_channel_tier_1); + + +static int +_scan_channel_tier_1(int force, + int show_err) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + int ready = 0; + + if (!ioexp_curr_p) { + goto err_scan_tier_1_channel; + } + while(ioexp_curr_p) { + ready = _is_channel_ready(ioexp_curr_p); + if ((!ready) && (!force)) { + goto err_scan_tier_1_channel; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; + +err_scan_tier_1_channel: + if (show_err) { + if (ioexp_curr_p) { + SWPS_INFO("%s: IOEXP-%d fail\n", __func__, ioexp_curr_p->ioexp_id); + } else { + SWPS_INFO("%s: IOEXP is null.\n", __func__); + } + } + return -1; +} + + +static int +_scan_channel_tier_1_single(void) { + + int ret = 0; + int chan_id = 0; + int fake_cid = 0; + int fake_offs = 0; + int fake_addr = 0; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + + if (ioexp_head_p->ioexp_id != ioexp_tail_p->ioexp_id) { + return 0; + } + /* Setup i2c_client */ + chan_id = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chan_id; + fake_addr = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chip_addr; + adap = i2c_get_adapter((chan_id + 1)); + if(!adap){ + SWPS_INFO("%s: Can not get adap!\n", __func__); + return 0; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + SWPS_INFO("%s: Can not kzalloc client!\n", __func__); + return 0; + } + client->adapter = adap; + client->addr = fake_addr; + /* Fouce move ioexp ptr to next */ + /*note this one will always fail so, dont need retry*/ + ret = i2c_smbus_read_byte_data(client, fake_offs); + SWPS_DEBUG("%s: move ioexp_ptr done. :%d\n", __func__, ret); + kfree(client); + return 1; +} + + +int +resync_channel_tier_1(void) { + + char *emsg = "ERR"; + + if (!ioexp_head_p) { + emsg = "ioexp_head_p is NULL"; + goto err_resync_ioexp_status_1; + } + /* Run all */ + if (ioexp_head_p->ioexp_id == ioexp_tail_p->ioexp_id) { + _scan_channel_tier_1_single(); + } else { + _scan_channel_tier_1(1, 0); + } + /* Check all */ + if (_scan_channel_tier_1(0, 1) < 0) { + emsg = "resync tier-1 channel fail"; + goto err_resync_ioexp_status_1; + } + return 0; + +err_resync_ioexp_status_1: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} +EXPORT_SYMBOL(resync_channel_tier_1); + + +/* For build single module using (Ex: ONL platform) */ +MODULE_LICENSE("GPL"); + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_expander.h b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_expander.h new file mode 100644 index 00000000000..6f9f7b46291 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/io_expander.h @@ -0,0 +1,189 @@ +#ifndef IO_EXPANDER_H +#define IO_EXPANDER_H + +#include + + +/* IOEXP type define (SFP series) */ +#define IOEXP_TYPE_MAGINOLIA_NAB (10101) +#define IOEXP_TYPE_MAGINOLIA_4AB (10102) +#define IOEXP_TYPE_MAPLE_NABC (10104) +#define IOEXP_TYPE_GULMOHAR_NABC (10105) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC (10106) +#define IOEXP_TYPE_SFP_8P_LAYOUT_1 (10107) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC (10108) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC (10109) + +/* IOEXP type define (QSFP series) */ +#define IOEXP_TYPE_MAGINOLIA_7AB (10201) +#define IOEXP_TYPE_REDWOOD_P01P08 (10202) +#define IOEXP_TYPE_REDWOOD_P09P16 (10203) +#define IOEXP_TYPE_HUDSON32IGA_P01P08 (10204) +#define IOEXP_TYPE_HUDSON32IGA_P09P16 (10205) +#define IOEXP_TYPE_SPRUCE_7AB (10206) +#define IOEXP_TYPE_CYPRESS_7ABC (10207) +#define IOEXP_TYPE_TAHOE_5A (10208) +#define IOEXP_TYPE_TAHOE_6ABC (10209) +#define IOEXP_TYPE_SEQUOIA_NABC (10210) +#define IOEXP_TYPE_LAVENDER_P65 (10211) +#define IOEXP_TYPE_MAPLE_0ABC (10212) +#define IOEXP_TYPE_GULMOHAR_7ABC (10213) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC (10214) +#define IOEXP_TYPE_QSFP_6P_LAYOUT_1 (10215) + +/* CPLD type define */ +#define CPLD_TYPE_COTTONWOOD (10301) + +/* IOEXP mode define */ +#define IOEXP_MODE_POLLING (19000) +#define IOEXP_MODE_DIRECT (19001) + +/* IOEXP state define */ +#define STATE_IOEXP_NORMAL (0) +#define STATE_IOEXP_INIT (-1) +#define STATE_IOEXP_ABNORMAL (-2) + +/* IOEXP error code define */ +#define ERR_IOEXP_NOTSUPPORT (-100) +#define ERR_IOEXP_UNINIT (-101) +#define ERR_IOEXP_BADCONF (-102) +#define ERR_IOEXP_ABNORMAL (-103) +#define ERR_IOEXP_NOSTATE (-104) +#define ERR_IOEXP_BADINPUT (-105) +#define ERR_IOEXP_UNEXCPT (-199) + +#define SWPS_INFO(fmt, args...) printk( KERN_INFO "[SWPS] " fmt, ##args) +#define SWPS_WARN(fmt, args...) printk( KERN_WARNING "[SWPS] " fmt, ##args) +#define SWPS_ERR(fmt, args...) printk( KERN_ERR "[SWPS] " fmt, ##args) + +#ifdef DEBUG_SWPS +# define SWPS_DEBUG(fmt, args...) printk( KERN_DEBUG "[SWPS] " fmt, ##args) +#else +# define SWPS_DEBUG(fmt, args...) +#endif + + +struct ioexp_addr_s { + int chan_id; + int chip_addr; + int read_offset[8]; + int write_offset[8]; + int conf_offset[8]; + uint8_t data_default[8]; + uint8_t conf_default[8]; +}; + +struct ioexp_i2c_s { + int chip_id; + struct i2c_client *i2c_client_p; + struct ioexp_i2c_s *next; +}; + + +struct ioexp_bitmap_s { + int chip_id; /* IOEXP chip id */ + int ioexp_voffset; /* IOEXP virtual offset */ + int bit_shift; +}; + +struct ioexp_map_s { + int chip_amount; /* Number of chips that IOEXP object content */ + int data_width; /* Number of (Read/Write/Config) bytes */ + struct ioexp_addr_s *map_addr; /* Chip address info */ + struct ioexp_bitmap_s map_present[10]; /* IOEXP for SFP / QSFP */ + struct ioexp_bitmap_s map_tx_disable[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_tx_fault[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_rxlos[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_reset[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_lpmod[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_modsel[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs0[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs1[10]; /* IOEXP for QSFP */ +}; + +struct ioexp_data_s { + uint8_t data[8]; +}; + +struct ioexp_obj_s { + + /* ============================ + * Object public property + * ============================ + */ + int ioexp_id; + int ioexp_type; + + /* ============================ + * Object private property + * ============================ + */ + struct ioexp_data_s chip_data[16]; /* Max: 8-ioexp in one virt-ioexp(ioexp_obj) */ + struct ioexp_map_s *ioexp_map_p; + struct ioexp_obj_s *next; + struct ioexp_i2c_s *i2c_head_p; + struct mutex lock; + int mode; + int state; + + /* =========================================== + * Object public functions + * =========================================== + */ + int (*get_present)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_fault)(struct ioexp_obj_s *self, int virt_offset); + int (*get_rxlos)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_disable)(struct ioexp_obj_s *self, int virt_offset); + int (*get_reset)(struct ioexp_obj_s *self, int virt_offset); + int (*get_lpmod)(struct ioexp_obj_s *self, int virt_offset); + int (*get_modsel)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs0)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs1)(struct ioexp_obj_s *self, int virt_offset); + int (*set_tx_disable)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_reset)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_lpmod)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_modsel)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs0)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs1)(struct ioexp_obj_s *self, int virt_offset, int input_val); + + /* =========================================== + * Object private functions + * =========================================== + */ + int (*init)(struct ioexp_obj_s *self); + int (*check)(struct ioexp_obj_s *self); + int (*update_all)(struct ioexp_obj_s *self, int show_err, char *caller_name); + int (*fsm_4_direct)(struct ioexp_obj_s* self); + int (*fsm_4_polling)(struct ioexp_obj_s* self); +}; + + +struct ioexp_obj_s* get_ioexp_obj(int ioexp_id); +int create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode); +int init_ioexp_objs(void); +int check_ioexp_objs(void); +void clean_ioexp_objs(void); + +void unlock_ioexp_all(void); +int lock_ioexp_all(void); + +int check_channel_tier_1(void); +int resync_channel_tier_1(void); + +/* Macro for bit control */ +#define SWP_BIT_SET(byte_val,bit_shift) ((byte_val) |= (1<<(bit_shift))) +#define SWP_BIT_CLEAR(byte_val,bit_shift) ((byte_val) &= ~(1<<(bit_shift))) + + +#endif /* IO_EXPANDER_H */ + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/lpc_ich.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/lpc_ich.c new file mode 100644 index 00000000000..21e4824d6e3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/lpc_ich.c @@ -0,0 +1,1149 @@ +/* + * lpc_ich.c - LPC interface for Intel ICH + * + * LPC bridge function of the Intel ICH contains many other + * functional units, such as Interrupt controllers, Timers, + * Power Management, System Management, GPIO, RTC, and LPC + * Configuration Registers. + * + * This driver is derived from lpc_sch. + + * Copyright (c) 2011 Extreme Engineering Solution, Inc. + * Author: Aaron Sierra + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License 2 as published + * by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + * + * This driver supports the following I/O Controller hubs: + * (See the intel documentation on http://developer.intel.com.) + * document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO) + * document number 290687-002, 298242-027: 82801BA (ICH2) + * document number 290733-003, 290739-013: 82801CA (ICH3-S) + * document number 290716-001, 290718-007: 82801CAM (ICH3-M) + * document number 290744-001, 290745-025: 82801DB (ICH4) + * document number 252337-001, 252663-008: 82801DBM (ICH4-M) + * document number 273599-001, 273645-002: 82801E (C-ICH) + * document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R) + * document number 300641-004, 300884-013: 6300ESB + * document number 301473-002, 301474-026: 82801F (ICH6) + * document number 313082-001, 313075-006: 631xESB, 632xESB + * document number 307013-003, 307014-024: 82801G (ICH7) + * document number 322896-001, 322897-001: NM10 + * document number 313056-003, 313057-017: 82801H (ICH8) + * document number 316972-004, 316973-012: 82801I (ICH9) + * document number 319973-002, 319974-002: 82801J (ICH10) + * document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH) + * document number 320066-003, 320257-008: EP80597 (IICH) + * document number 324645-001, 324646-001: Cougar Point (CPT) + * document number TBD : Patsburg (PBG) + * document number TBD : DH89xxCC + * document number TBD : Panther Point + * document number TBD : Lynx Point + * document number TBD : Lynx Point-LP + * document number TBD : Wellsburg + * document number TBD : Avoton SoC + * document number TBD : Coleto Creek + * document number TBD : Wildcat Point-LP + * document number TBD : 9 Series + * document number TBD : Lewisburg + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include + +#define ACPIBASE 0x40 +#define ACPIBASE_GPE_OFF 0x28 +#define ACPIBASE_GPE_END 0x2f +#define ACPIBASE_SMI_OFF 0x30 +#define ACPIBASE_SMI_END 0x33 +#define ACPIBASE_PMC_OFF 0x08 +#define ACPIBASE_PMC_END 0x0c +#define ACPIBASE_TCO_OFF 0x60 +#define ACPIBASE_TCO_END 0x7f +#define ACPICTRL_PMCBASE 0x44 + +#define ACPIBASE_GCS_OFF 0x3410 +#define ACPIBASE_GCS_END 0x3414 + +#define GPIOBASE_ICH0 0x58 +#define GPIOCTRL_ICH0 0x5C +#define GPIOBASE_ICH6 0x48 +#define GPIOCTRL_ICH6 0x4C + +#define RCBABASE 0xf0 + +#define wdt_io_res(i) wdt_res(0, i) +#define wdt_mem_res(i) wdt_res(ICH_RES_MEM_OFF, i) +#define wdt_res(b, i) (&wdt_ich_res[(b) + (i)]) + +struct lpc_ich_priv { + int chipset; + + int abase; /* ACPI base */ + int actrl_pbase; /* ACPI control or PMC base */ + int gbase; /* GPIO base */ + int gctrl; /* GPIO control */ + + int abase_save; /* Cached ACPI base value */ + int actrl_pbase_save; /* Cached ACPI control or PMC base value */ + int gctrl_save; /* Cached GPIO control value */ +}; + +static struct resource wdt_ich_res[] = { + /* ACPI - TCO */ + { + .flags = IORESOURCE_IO, + }, + /* ACPI - SMI */ + { + .flags = IORESOURCE_IO, + }, + /* GCS or PMC */ + { + .flags = IORESOURCE_MEM, + }, +}; + +static struct resource gpio_ich_res[] = { + /* GPIO */ + { + .flags = IORESOURCE_IO, + }, + /* ACPI - GPE0 */ + { + .flags = IORESOURCE_IO, + }, +}; + +static struct mfd_cell lpc_ich_wdt_cell = { + .name = "iTCO_wdt", + .num_resources = ARRAY_SIZE(wdt_ich_res), + .resources = wdt_ich_res, + .ignore_resource_conflicts = true, +}; + +static struct mfd_cell lpc_ich_gpio_cell = { + .name = "gpio_ich", + .num_resources = ARRAY_SIZE(gpio_ich_res), + .resources = gpio_ich_res, + .ignore_resource_conflicts = true, +}; + +/* chipset related info */ +enum lpc_chipsets { + LPC_ICH = 0, /* ICH */ + LPC_ICH0, /* ICH0 */ + LPC_ICH2, /* ICH2 */ + LPC_ICH2M, /* ICH2-M */ + LPC_ICH3, /* ICH3-S */ + LPC_ICH3M, /* ICH3-M */ + LPC_ICH4, /* ICH4 */ + LPC_ICH4M, /* ICH4-M */ + LPC_CICH, /* C-ICH */ + LPC_ICH5, /* ICH5 & ICH5R */ + LPC_6300ESB, /* 6300ESB */ + LPC_ICH6, /* ICH6 & ICH6R */ + LPC_ICH6M, /* ICH6-M */ + LPC_ICH6W, /* ICH6W & ICH6RW */ + LPC_631XESB, /* 631xESB/632xESB */ + LPC_ICH7, /* ICH7 & ICH7R */ + LPC_ICH7DH, /* ICH7DH */ + LPC_ICH7M, /* ICH7-M & ICH7-U */ + LPC_ICH7MDH, /* ICH7-M DH */ + LPC_NM10, /* NM10 */ + LPC_ICH8, /* ICH8 & ICH8R */ + LPC_ICH8DH, /* ICH8DH */ + LPC_ICH8DO, /* ICH8DO */ + LPC_ICH8M, /* ICH8M */ + LPC_ICH8ME, /* ICH8M-E */ + LPC_ICH9, /* ICH9 */ + LPC_ICH9R, /* ICH9R */ + LPC_ICH9DH, /* ICH9DH */ + LPC_ICH9DO, /* ICH9DO */ + LPC_ICH9M, /* ICH9M */ + LPC_ICH9ME, /* ICH9M-E */ + LPC_ICH10, /* ICH10 */ + LPC_ICH10R, /* ICH10R */ + LPC_ICH10D, /* ICH10D */ + LPC_ICH10DO, /* ICH10DO */ + LPC_PCH, /* PCH Desktop Full Featured */ + LPC_PCHM, /* PCH Mobile Full Featured */ + LPC_P55, /* P55 */ + LPC_PM55, /* PM55 */ + LPC_H55, /* H55 */ + LPC_QM57, /* QM57 */ + LPC_H57, /* H57 */ + LPC_HM55, /* HM55 */ + LPC_Q57, /* Q57 */ + LPC_HM57, /* HM57 */ + LPC_PCHMSFF, /* PCH Mobile SFF Full Featured */ + LPC_QS57, /* QS57 */ + LPC_3400, /* 3400 */ + LPC_3420, /* 3420 */ + LPC_3450, /* 3450 */ + LPC_EP80579, /* EP80579 */ + LPC_CPT, /* Cougar Point */ + LPC_CPTD, /* Cougar Point Desktop */ + LPC_CPTM, /* Cougar Point Mobile */ + LPC_PBG, /* Patsburg */ + LPC_DH89XXCC, /* DH89xxCC */ + LPC_PPT, /* Panther Point */ + LPC_LPT, /* Lynx Point */ + LPC_LPT_LP, /* Lynx Point-LP */ + LPC_WBG, /* Wellsburg */ + LPC_AVN, /* Avoton SoC */ + LPC_BAYTRAIL, /* Bay Trail SoC */ + LPC_COLETO, /* Coleto Creek */ + LPC_WPT_LP, /* Wildcat Point-LP */ + LPC_BRASWELL, /* Braswell SoC */ + LPC_LEWISBURG, /* Lewisburg */ + LPC_9S, /* 9 Series */ + LPC_APL, /* Apollo Lake SoC */ + LPC_GLK, /* Gemini Lake SoC */ + LPC_COUGARMOUNTAIN,/* Cougar Mountain SoC*/ +}; + +static struct lpc_ich_info lpc_chipset_info[] = { + [LPC_ICH] = { + .name = "ICH", + .iTCO_version = 1, + }, + [LPC_ICH0] = { + .name = "ICH0", + .iTCO_version = 1, + }, + [LPC_ICH2] = { + .name = "ICH2", + .iTCO_version = 1, + }, + [LPC_ICH2M] = { + .name = "ICH2-M", + .iTCO_version = 1, + }, + [LPC_ICH3] = { + .name = "ICH3-S", + .iTCO_version = 1, + }, + [LPC_ICH3M] = { + .name = "ICH3-M", + .iTCO_version = 1, + }, + [LPC_ICH4] = { + .name = "ICH4", + .iTCO_version = 1, + }, + [LPC_ICH4M] = { + .name = "ICH4-M", + .iTCO_version = 1, + }, + [LPC_CICH] = { + .name = "C-ICH", + .iTCO_version = 1, + }, + [LPC_ICH5] = { + .name = "ICH5 or ICH5R", + .iTCO_version = 1, + }, + [LPC_6300ESB] = { + .name = "6300ESB", + .iTCO_version = 1, + }, + [LPC_ICH6] = { + .name = "ICH6 or ICH6R", + .iTCO_version = 2, + .gpio_version = ICH_V6_GPIO, + }, + [LPC_ICH6M] = { + .name = "ICH6-M", + .iTCO_version = 2, + .gpio_version = ICH_V6_GPIO, + }, + [LPC_ICH6W] = { + .name = "ICH6W or ICH6RW", + .iTCO_version = 2, + .gpio_version = ICH_V6_GPIO, + }, + [LPC_631XESB] = { + .name = "631xESB/632xESB", + .iTCO_version = 2, + .gpio_version = ICH_V6_GPIO, + }, + [LPC_ICH7] = { + .name = "ICH7 or ICH7R", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH7DH] = { + .name = "ICH7DH", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH7M] = { + .name = "ICH7-M or ICH7-U", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH7MDH] = { + .name = "ICH7-M DH", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_NM10] = { + .name = "NM10", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH8] = { + .name = "ICH8 or ICH8R", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH8DH] = { + .name = "ICH8DH", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH8DO] = { + .name = "ICH8DO", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH8M] = { + .name = "ICH8M", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH8ME] = { + .name = "ICH8M-E", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH9] = { + .name = "ICH9", + .iTCO_version = 2, + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9R] = { + .name = "ICH9R", + .iTCO_version = 2, + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9DH] = { + .name = "ICH9DH", + .iTCO_version = 2, + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9DO] = { + .name = "ICH9DO", + .iTCO_version = 2, + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9M] = { + .name = "ICH9M", + .iTCO_version = 2, + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9ME] = { + .name = "ICH9M-E", + .iTCO_version = 2, + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH10] = { + .name = "ICH10", + .iTCO_version = 2, + .gpio_version = ICH_V10CONS_GPIO, + }, + [LPC_ICH10R] = { + .name = "ICH10R", + .iTCO_version = 2, + .gpio_version = ICH_V10CONS_GPIO, + }, + [LPC_ICH10D] = { + .name = "ICH10D", + .iTCO_version = 2, + .gpio_version = ICH_V10CORP_GPIO, + }, + [LPC_ICH10DO] = { + .name = "ICH10DO", + .iTCO_version = 2, + .gpio_version = ICH_V10CORP_GPIO, + }, + [LPC_PCH] = { + .name = "PCH Desktop Full Featured", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_PCHM] = { + .name = "PCH Mobile Full Featured", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_P55] = { + .name = "P55", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_PM55] = { + .name = "PM55", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_H55] = { + .name = "H55", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_QM57] = { + .name = "QM57", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_H57] = { + .name = "H57", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_HM55] = { + .name = "HM55", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_Q57] = { + .name = "Q57", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_HM57] = { + .name = "HM57", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_PCHMSFF] = { + .name = "PCH Mobile SFF Full Featured", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_QS57] = { + .name = "QS57", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_3400] = { + .name = "3400", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_3420] = { + .name = "3420", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_3450] = { + .name = "3450", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_EP80579] = { + .name = "EP80579", + .iTCO_version = 2, + }, + [LPC_CPT] = { + .name = "Cougar Point", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_CPTD] = { + .name = "Cougar Point Desktop", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_CPTM] = { + .name = "Cougar Point Mobile", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_PBG] = { + .name = "Patsburg", + .iTCO_version = 2, + }, + [LPC_DH89XXCC] = { + .name = "DH89xxCC", + .iTCO_version = 2, + }, + [LPC_PPT] = { + .name = "Panther Point", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_LPT] = { + .name = "Lynx Point", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_LPT_LP] = { + .name = "Lynx Point_LP", + .iTCO_version = 2, + }, + [LPC_WBG] = { + .name = "Wellsburg", + .iTCO_version = 2, + }, + [LPC_AVN] = { + .name = "Avoton SoC", + .iTCO_version = 3, + .gpio_version = AVOTON_GPIO, + }, + [LPC_BAYTRAIL] = { + .name = "Bay Trail SoC", + .iTCO_version = 3, + }, + [LPC_COLETO] = { + .name = "Coleto Creek", + .iTCO_version = 2, + }, + [LPC_WPT_LP] = { + .name = "Wildcat Point_LP", + .iTCO_version = 2, + }, + [LPC_BRASWELL] = { + .name = "Braswell SoC", + .iTCO_version = 3, + }, + [LPC_LEWISBURG] = { + .name = "Lewisburg", + .iTCO_version = 2, + }, + [LPC_9S] = { + .name = "9 Series", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_APL] = { + .name = "Apollo Lake SoC", + .iTCO_version = 5, + }, + [LPC_GLK] = { + .name = "Gemini Lake SoC", + }, + [LPC_COUGARMOUNTAIN] = { + .name = "Cougar Mountain SoC", + .iTCO_version = 3, + }, +}; + +/* + * This data only exists for exporting the supported PCI ids + * via MODULE_DEVICE_TABLE. We do not actually register a + * pci_driver, because the I/O Controller Hub has also other + * functions that probably will be registered by other drivers. + */ +static const struct pci_device_id lpc_ich_ids[] = { + { PCI_VDEVICE(INTEL, 0x0f1c), LPC_BAYTRAIL}, + { PCI_VDEVICE(INTEL, 0x1c41), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c42), LPC_CPTD}, + { PCI_VDEVICE(INTEL, 0x1c43), LPC_CPTM}, + { PCI_VDEVICE(INTEL, 0x1c44), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c45), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c46), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c47), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c48), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c49), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4a), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4b), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4c), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4d), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4e), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4f), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c50), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c51), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c52), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c53), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c54), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c55), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c56), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c57), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c58), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c59), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5a), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5b), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5c), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5d), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5e), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5f), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1d40), LPC_PBG}, + { PCI_VDEVICE(INTEL, 0x1d41), LPC_PBG}, + { PCI_VDEVICE(INTEL, 0x1e40), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e41), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e42), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e43), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e44), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e45), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e46), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e47), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e48), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e49), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4a), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4b), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4c), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4d), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4e), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4f), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e50), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e51), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e52), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e53), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e54), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e55), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e56), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e57), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e58), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e59), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5a), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5b), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5c), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5d), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5e), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5f), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1f38), LPC_AVN}, + { PCI_VDEVICE(INTEL, 0x1f39), LPC_AVN}, + { PCI_VDEVICE(INTEL, 0x1f3a), LPC_AVN}, + { PCI_VDEVICE(INTEL, 0x1f3b), LPC_AVN}, + { PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL}, + { PCI_VDEVICE(INTEL, 0x2310), LPC_DH89XXCC}, + { PCI_VDEVICE(INTEL, 0x2390), LPC_COLETO}, + { PCI_VDEVICE(INTEL, 0x2410), LPC_ICH}, + { PCI_VDEVICE(INTEL, 0x2420), LPC_ICH0}, + { PCI_VDEVICE(INTEL, 0x2440), LPC_ICH2}, + { PCI_VDEVICE(INTEL, 0x244c), LPC_ICH2M}, + { PCI_VDEVICE(INTEL, 0x2450), LPC_CICH}, + { PCI_VDEVICE(INTEL, 0x2480), LPC_ICH3}, + { PCI_VDEVICE(INTEL, 0x248c), LPC_ICH3M}, + { PCI_VDEVICE(INTEL, 0x24c0), LPC_ICH4}, + { PCI_VDEVICE(INTEL, 0x24cc), LPC_ICH4M}, + { PCI_VDEVICE(INTEL, 0x24d0), LPC_ICH5}, + { PCI_VDEVICE(INTEL, 0x25a1), LPC_6300ESB}, + { PCI_VDEVICE(INTEL, 0x2640), LPC_ICH6}, + { PCI_VDEVICE(INTEL, 0x2641), LPC_ICH6M}, + { PCI_VDEVICE(INTEL, 0x2642), LPC_ICH6W}, + { PCI_VDEVICE(INTEL, 0x2670), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2671), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2672), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2673), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2674), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2675), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2676), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2677), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2678), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2679), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267a), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267b), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267c), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267d), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267e), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267f), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x27b0), LPC_ICH7DH}, + { PCI_VDEVICE(INTEL, 0x27b8), LPC_ICH7}, + { PCI_VDEVICE(INTEL, 0x27b9), LPC_ICH7M}, + { PCI_VDEVICE(INTEL, 0x27bc), LPC_NM10}, + { PCI_VDEVICE(INTEL, 0x27bd), LPC_ICH7MDH}, + { PCI_VDEVICE(INTEL, 0x2810), LPC_ICH8}, + { PCI_VDEVICE(INTEL, 0x2811), LPC_ICH8ME}, + { PCI_VDEVICE(INTEL, 0x2812), LPC_ICH8DH}, + { PCI_VDEVICE(INTEL, 0x2814), LPC_ICH8DO}, + { PCI_VDEVICE(INTEL, 0x2815), LPC_ICH8M}, + { PCI_VDEVICE(INTEL, 0x2912), LPC_ICH9DH}, + { PCI_VDEVICE(INTEL, 0x2914), LPC_ICH9DO}, + { PCI_VDEVICE(INTEL, 0x2916), LPC_ICH9R}, + { PCI_VDEVICE(INTEL, 0x2917), LPC_ICH9ME}, + { PCI_VDEVICE(INTEL, 0x2918), LPC_ICH9}, + { PCI_VDEVICE(INTEL, 0x2919), LPC_ICH9M}, + { PCI_VDEVICE(INTEL, 0x3197), LPC_GLK}, + { PCI_VDEVICE(INTEL, 0x2b9c), LPC_COUGARMOUNTAIN}, + { PCI_VDEVICE(INTEL, 0x3a14), LPC_ICH10DO}, + { PCI_VDEVICE(INTEL, 0x3a16), LPC_ICH10R}, + { PCI_VDEVICE(INTEL, 0x3a18), LPC_ICH10}, + { PCI_VDEVICE(INTEL, 0x3a1a), LPC_ICH10D}, + { PCI_VDEVICE(INTEL, 0x3b00), LPC_PCH}, + { PCI_VDEVICE(INTEL, 0x3b01), LPC_PCHM}, + { PCI_VDEVICE(INTEL, 0x3b02), LPC_P55}, + { PCI_VDEVICE(INTEL, 0x3b03), LPC_PM55}, + { PCI_VDEVICE(INTEL, 0x3b06), LPC_H55}, + { PCI_VDEVICE(INTEL, 0x3b07), LPC_QM57}, + { PCI_VDEVICE(INTEL, 0x3b08), LPC_H57}, + { PCI_VDEVICE(INTEL, 0x3b09), LPC_HM55}, + { PCI_VDEVICE(INTEL, 0x3b0a), LPC_Q57}, + { PCI_VDEVICE(INTEL, 0x3b0b), LPC_HM57}, + { PCI_VDEVICE(INTEL, 0x3b0d), LPC_PCHMSFF}, + { PCI_VDEVICE(INTEL, 0x3b0f), LPC_QS57}, + { PCI_VDEVICE(INTEL, 0x3b12), LPC_3400}, + { PCI_VDEVICE(INTEL, 0x3b14), LPC_3420}, + { PCI_VDEVICE(INTEL, 0x3b16), LPC_3450}, + { PCI_VDEVICE(INTEL, 0x5031), LPC_EP80579}, + { PCI_VDEVICE(INTEL, 0x5ae8), LPC_APL}, + { PCI_VDEVICE(INTEL, 0x8c40), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c41), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c42), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c43), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c44), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c45), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c46), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c47), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c48), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c49), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4a), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4b), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4c), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4d), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4e), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4f), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c50), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c51), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c52), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c53), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c54), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c55), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c56), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c57), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c58), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c59), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5a), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5b), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5c), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5d), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5e), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5f), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8cc1), LPC_9S}, + { PCI_VDEVICE(INTEL, 0x8cc2), LPC_9S}, + { PCI_VDEVICE(INTEL, 0x8cc3), LPC_9S}, + { PCI_VDEVICE(INTEL, 0x8cc4), LPC_9S}, + { PCI_VDEVICE(INTEL, 0x8cc6), LPC_9S}, + { PCI_VDEVICE(INTEL, 0x8d40), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d41), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d42), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d43), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d44), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d45), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d46), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d47), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d48), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d49), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4a), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4b), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4c), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4d), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4e), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4f), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d50), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d51), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d52), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d53), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d54), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d55), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d56), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d57), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d58), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d59), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5a), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5b), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5c), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5d), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5e), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5f), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x9c40), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c41), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c42), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c43), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c44), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c45), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c46), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c47), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc1), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc2), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc3), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc5), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc6), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc7), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc9), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0xa1c1), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa1c2), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa1c3), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa1c4), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa1c5), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa1c6), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa1c7), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa242), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa243), LPC_LEWISBURG}, + { 0, }, /* End of list */ +}; +MODULE_DEVICE_TABLE(pci, lpc_ich_ids); + +static void lpc_ich_restore_config_space(struct pci_dev *dev) +{ + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + + if (priv->abase_save >= 0) { + pci_write_config_byte(dev, priv->abase, priv->abase_save); + priv->abase_save = -1; + } + + if (priv->actrl_pbase_save >= 0) { + pci_write_config_byte(dev, priv->actrl_pbase, + priv->actrl_pbase_save); + priv->actrl_pbase_save = -1; + } + + if (priv->gctrl_save >= 0) { + pci_write_config_byte(dev, priv->gctrl, priv->gctrl_save); + priv->gctrl_save = -1; + } +} + +static void lpc_ich_enable_acpi_space(struct pci_dev *dev) +{ + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + u8 reg_save; + + switch (lpc_chipset_info[priv->chipset].iTCO_version) { + case 3: + /* + * Some chipsets (eg Avoton) enable the ACPI space in the + * ACPI BASE register. + */ + pci_read_config_byte(dev, priv->abase, ®_save); + pci_write_config_byte(dev, priv->abase, reg_save | 0x2); + priv->abase_save = reg_save; + break; + default: + /* + * Most chipsets enable the ACPI space in the ACPI control + * register. + */ + pci_read_config_byte(dev, priv->actrl_pbase, ®_save); + pci_write_config_byte(dev, priv->actrl_pbase, reg_save | 0x80); + priv->actrl_pbase_save = reg_save; + break; + } +} + +static void lpc_ich_enable_gpio_space(struct pci_dev *dev) +{ + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + u8 reg_save; + + pci_read_config_byte(dev, priv->gctrl, ®_save); + pci_write_config_byte(dev, priv->gctrl, reg_save | 0x10); + priv->gctrl_save = reg_save; +} + +static void lpc_ich_enable_pmc_space(struct pci_dev *dev) +{ + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + u8 reg_save; + + pci_read_config_byte(dev, priv->actrl_pbase, ®_save); + pci_write_config_byte(dev, priv->actrl_pbase, reg_save | 0x2); + + priv->actrl_pbase_save = reg_save; +} + +static int lpc_ich_finalize_wdt_cell(struct pci_dev *dev) +{ + struct itco_wdt_platform_data *pdata; + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + struct lpc_ich_info *info; + struct mfd_cell *cell = &lpc_ich_wdt_cell; + + pdata = devm_kzalloc(&dev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + info = &lpc_chipset_info[priv->chipset]; + + pdata->version = info->iTCO_version; + strlcpy(pdata->name, info->name, sizeof(pdata->name)); + + cell->platform_data = pdata; + cell->pdata_size = sizeof(*pdata); + return 0; +} + +static void lpc_ich_finalize_gpio_cell(struct pci_dev *dev) +{ + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + struct mfd_cell *cell = &lpc_ich_gpio_cell; + + cell->platform_data = &lpc_chipset_info[priv->chipset]; + cell->pdata_size = sizeof(struct lpc_ich_info); +} + +/* + * We don't check for resource conflict globally. There are 2 or 3 independent + * GPIO groups and it's enough to have access to one of these to instantiate + * the device. + */ +static int lpc_ich_check_conflict_gpio(struct resource *res) +{ + int ret; + u8 use_gpio = 0; + + if (resource_size(res) >= 0x50 && + !acpi_check_region(res->start + 0x40, 0x10, "LPC ICH GPIO3")) + use_gpio |= 1 << 2; + + if (!acpi_check_region(res->start + 0x30, 0x10, "LPC ICH GPIO2")) + use_gpio |= 1 << 1; + + ret = acpi_check_region(res->start + 0x00, 0x30, "LPC ICH GPIO1"); + if (!ret) + use_gpio |= 1 << 0; + + return use_gpio ? use_gpio : ret; +} + +static int lpc_ich_init_gpio(struct pci_dev *dev) +{ + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + u32 base_addr_cfg; + u32 base_addr; + int ret; + bool acpi_conflict = false; + struct resource *res; + + /* Setup power management base register */ + pci_read_config_dword(dev, priv->abase, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + dev_notice(&dev->dev, "I/O space for ACPI uninitialized\n"); + lpc_ich_gpio_cell.num_resources--; + goto gpe0_done; + } + + res = &gpio_ich_res[ICH_RES_GPE0]; + res->start = base_addr + ACPIBASE_GPE_OFF; + res->end = base_addr + ACPIBASE_GPE_END; + ret = acpi_check_resource_conflict(res); + if (ret) { + /* + * This isn't fatal for the GPIO, but we have to make sure that + * the platform_device subsystem doesn't see this resource + * or it will register an invalid region. + */ + lpc_ich_gpio_cell.num_resources--; + acpi_conflict = true; + } else { + lpc_ich_enable_acpi_space(dev); + } + +gpe0_done: + /* Setup GPIO base register */ + pci_read_config_dword(dev, priv->gbase, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + dev_notice(&dev->dev, "I/O space for GPIO uninitialized\n"); + ret = -ENODEV; + goto gpio_done; + } + + /* Older devices provide fewer GPIO and have a smaller resource size. */ + res = &gpio_ich_res[ICH_RES_GPIO]; + res->start = base_addr; + switch (lpc_chipset_info[priv->chipset].gpio_version) { + case ICH_V5_GPIO: + case ICH_V10CORP_GPIO: + res->end = res->start + 128 - 1; + break; + default: + res->end = res->start + 64 - 1; + break; + } + + ret = lpc_ich_check_conflict_gpio(res); + if (ret < 0) { + /* this isn't necessarily fatal for the GPIO */ + acpi_conflict = true; + goto gpio_done; + } + lpc_chipset_info[priv->chipset].use_gpio = ret; + lpc_ich_enable_gpio_space(dev); + + lpc_ich_finalize_gpio_cell(dev); + ret = mfd_add_devices(&dev->dev, PLATFORM_DEVID_AUTO, + &lpc_ich_gpio_cell, 1, NULL, 0, NULL); + +gpio_done: + if (acpi_conflict) + pr_warn("Resource conflict(s) found affecting %s\n", + lpc_ich_gpio_cell.name); + return ret; +} + +static int lpc_ich_init_wdt(struct pci_dev *dev) +{ + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + u32 base_addr_cfg; + u32 base_addr; + int ret; + struct resource *res; + + /* If we have ACPI based watchdog use that instead */ + if (acpi_has_watchdog()) + return -ENODEV; + + /* Setup power management base register */ + pci_read_config_dword(dev, priv->abase, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + dev_notice(&dev->dev, "I/O space for ACPI uninitialized\n"); + ret = -ENODEV; + goto wdt_done; + } + + res = wdt_io_res(ICH_RES_IO_TCO); + res->start = base_addr + ACPIBASE_TCO_OFF; + res->end = base_addr + ACPIBASE_TCO_END; + + res = wdt_io_res(ICH_RES_IO_SMI); + res->start = base_addr + ACPIBASE_SMI_OFF; + res->end = base_addr + ACPIBASE_SMI_END; + + lpc_ich_enable_acpi_space(dev); + + /* + * iTCO v2: + * Get the Memory-Mapped GCS register. To get access to it + * we have to read RCBA from PCI Config space 0xf0 and use + * it as base. GCS = RCBA + ICH6_GCS(0x3410). + * + * iTCO v3: + * Get the Power Management Configuration register. To get access + * to it we have to read the PMC BASE from config space and address + * the register at offset 0x8. + */ + if (lpc_chipset_info[priv->chipset].iTCO_version == 1) { + /* Don't register iomem for TCO ver 1 */ + lpc_ich_wdt_cell.num_resources--; + } else if (lpc_chipset_info[priv->chipset].iTCO_version == 2) { + pci_read_config_dword(dev, RCBABASE, &base_addr_cfg); + base_addr = base_addr_cfg & 0xffffc000; + if (!(base_addr_cfg & 1)) { + dev_notice(&dev->dev, "RCBA is disabled by " + "hardware/BIOS, device disabled\n"); + ret = -ENODEV; + goto wdt_done; + } + res = wdt_mem_res(ICH_RES_MEM_GCS_PMC); + res->start = base_addr + ACPIBASE_GCS_OFF; + res->end = base_addr + ACPIBASE_GCS_END; + } else if (lpc_chipset_info[priv->chipset].iTCO_version == 3) { + lpc_ich_enable_pmc_space(dev); + pci_read_config_dword(dev, ACPICTRL_PMCBASE, &base_addr_cfg); + base_addr = base_addr_cfg & 0xfffffe00; + + res = wdt_mem_res(ICH_RES_MEM_GCS_PMC); + res->start = base_addr + ACPIBASE_PMC_OFF; + res->end = base_addr + ACPIBASE_PMC_END; + } + + ret = lpc_ich_finalize_wdt_cell(dev); + if (ret) + goto wdt_done; + + ret = mfd_add_devices(&dev->dev, PLATFORM_DEVID_AUTO, + &lpc_ich_wdt_cell, 1, NULL, 0, NULL); + +wdt_done: + return ret; +} + +static int lpc_ich_probe(struct pci_dev *dev, + const struct pci_device_id *id) +{ + struct lpc_ich_priv *priv; + int ret; + bool cell_added = false; + + priv = devm_kzalloc(&dev->dev, + sizeof(struct lpc_ich_priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->chipset = id->driver_data; + + priv->actrl_pbase_save = -1; + priv->abase_save = -1; + + priv->abase = ACPIBASE; + priv->actrl_pbase = ACPICTRL_PMCBASE; + + priv->gctrl_save = -1; + if (priv->chipset <= LPC_ICH5) { + priv->gbase = GPIOBASE_ICH0; + priv->gctrl = GPIOCTRL_ICH0; + } else { + priv->gbase = GPIOBASE_ICH6; + priv->gctrl = GPIOCTRL_ICH6; + } + + pci_set_drvdata(dev, priv); + + if (lpc_chipset_info[priv->chipset].iTCO_version) { + ret = lpc_ich_init_wdt(dev); + if (!ret) + cell_added = true; + } + + if (lpc_chipset_info[priv->chipset].gpio_version) { + ret = lpc_ich_init_gpio(dev); + if (!ret) + cell_added = true; + } + + /* + * We only care if at least one or none of the cells registered + * successfully. + */ + if (!cell_added) { + dev_warn(&dev->dev, "No MFD cells added\n"); + lpc_ich_restore_config_space(dev); + return -ENODEV; + } + + return 0; +} + +static void lpc_ich_remove(struct pci_dev *dev) +{ + mfd_remove_devices(&dev->dev); + lpc_ich_restore_config_space(dev); +} + +static struct pci_driver lpc_ich_driver = { + .name = "lpc_ich", + .id_table = lpc_ich_ids, + .probe = lpc_ich_probe, + .remove = lpc_ich_remove, +}; + +module_pci_driver(lpc_ich_driver); + +MODULE_AUTHOR("Aaron Sierra "); +MODULE_DESCRIPTION("LPC interface for Intel ICH"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/pmbus.h new file mode 100644 index 00000000000..4efa2bd4f6d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/pmbus.h @@ -0,0 +1,425 @@ +/* + * pmbus.h - Common defines and structures for PMBus devices + * + * Copyright (c) 2010, 2011 Ericsson AB. + * Copyright (c) 2012 Guenter Roeck + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef PMBUS_H +#define PMBUS_H + +#include +#include + +/* + * Registers + */ +enum pmbus_regs { + PMBUS_PAGE = 0x00, + PMBUS_OPERATION = 0x01, + PMBUS_ON_OFF_CONFIG = 0x02, + PMBUS_CLEAR_FAULTS = 0x03, + PMBUS_PHASE = 0x04, + + PMBUS_CAPABILITY = 0x19, + PMBUS_QUERY = 0x1A, + + PMBUS_VOUT_MODE = 0x20, + PMBUS_VOUT_COMMAND = 0x21, + PMBUS_VOUT_TRIM = 0x22, + PMBUS_VOUT_CAL_OFFSET = 0x23, + PMBUS_VOUT_MAX = 0x24, + PMBUS_VOUT_MARGIN_HIGH = 0x25, + PMBUS_VOUT_MARGIN_LOW = 0x26, + PMBUS_VOUT_TRANSITION_RATE = 0x27, + PMBUS_VOUT_DROOP = 0x28, + PMBUS_VOUT_SCALE_LOOP = 0x29, + PMBUS_VOUT_SCALE_MONITOR = 0x2A, + + PMBUS_COEFFICIENTS = 0x30, + PMBUS_POUT_MAX = 0x31, + + PMBUS_FAN_CONFIG_12 = 0x3A, + PMBUS_FAN_COMMAND_1 = 0x3B, + PMBUS_FAN_COMMAND_2 = 0x3C, + PMBUS_FAN_CONFIG_34 = 0x3D, + PMBUS_FAN_COMMAND_3 = 0x3E, + PMBUS_FAN_COMMAND_4 = 0x3F, + + PMBUS_VOUT_OV_FAULT_LIMIT = 0x40, + PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41, + PMBUS_VOUT_OV_WARN_LIMIT = 0x42, + PMBUS_VOUT_UV_WARN_LIMIT = 0x43, + PMBUS_VOUT_UV_FAULT_LIMIT = 0x44, + PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45, + PMBUS_IOUT_OC_FAULT_LIMIT = 0x46, + PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47, + PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48, + PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49, + PMBUS_IOUT_OC_WARN_LIMIT = 0x4A, + PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B, + PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C, + + PMBUS_OT_FAULT_LIMIT = 0x4F, + PMBUS_OT_FAULT_RESPONSE = 0x50, + PMBUS_OT_WARN_LIMIT = 0x51, + PMBUS_UT_WARN_LIMIT = 0x52, + PMBUS_UT_FAULT_LIMIT = 0x53, + PMBUS_UT_FAULT_RESPONSE = 0x54, + PMBUS_VIN_OV_FAULT_LIMIT = 0x55, + PMBUS_VIN_OV_FAULT_RESPONSE = 0x56, + PMBUS_VIN_OV_WARN_LIMIT = 0x57, + PMBUS_VIN_UV_WARN_LIMIT = 0x58, + PMBUS_VIN_UV_FAULT_LIMIT = 0x59, + + PMBUS_IIN_OC_FAULT_LIMIT = 0x5B, + PMBUS_IIN_OC_WARN_LIMIT = 0x5D, + + PMBUS_POUT_OP_FAULT_LIMIT = 0x68, + PMBUS_POUT_OP_WARN_LIMIT = 0x6A, + PMBUS_PIN_OP_WARN_LIMIT = 0x6B, + + PMBUS_STATUS_BYTE = 0x78, + PMBUS_STATUS_WORD = 0x79, + PMBUS_STATUS_VOUT = 0x7A, + PMBUS_STATUS_IOUT = 0x7B, + PMBUS_STATUS_INPUT = 0x7C, + PMBUS_STATUS_TEMPERATURE = 0x7D, + PMBUS_STATUS_CML = 0x7E, + PMBUS_STATUS_OTHER = 0x7F, + PMBUS_STATUS_MFR_SPECIFIC = 0x80, + PMBUS_STATUS_FAN_12 = 0x81, + PMBUS_STATUS_FAN_34 = 0x82, + + PMBUS_READ_VIN = 0x88, + PMBUS_READ_IIN = 0x89, + PMBUS_READ_VCAP = 0x8A, + PMBUS_READ_VOUT = 0x8B, + PMBUS_READ_IOUT = 0x8C, + PMBUS_READ_TEMPERATURE_1 = 0x8D, + PMBUS_READ_TEMPERATURE_2 = 0x8E, + PMBUS_READ_TEMPERATURE_3 = 0x8F, + PMBUS_READ_FAN_SPEED_1 = 0x90, + PMBUS_READ_FAN_SPEED_2 = 0x91, + PMBUS_READ_FAN_SPEED_3 = 0x92, + PMBUS_READ_FAN_SPEED_4 = 0x93, + PMBUS_READ_DUTY_CYCLE = 0x94, + PMBUS_READ_FREQUENCY = 0x95, + PMBUS_READ_POUT = 0x96, + PMBUS_READ_PIN = 0x97, + + PMBUS_REVISION = 0x98, + PMBUS_MFR_ID = 0x99, + PMBUS_MFR_MODEL = 0x9A, + PMBUS_MFR_REVISION = 0x9B, + PMBUS_MFR_LOCATION = 0x9C, + PMBUS_MFR_DATE = 0x9D, + PMBUS_MFR_SERIAL = 0x9E, + +/* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ + PMBUS_VIRT_BASE = 0x100, + PMBUS_VIRT_READ_TEMP_AVG, + PMBUS_VIRT_READ_TEMP_MIN, + PMBUS_VIRT_READ_TEMP_MAX, + PMBUS_VIRT_RESET_TEMP_HISTORY, + PMBUS_VIRT_READ_VIN_AVG, + PMBUS_VIRT_READ_VIN_MIN, + PMBUS_VIRT_READ_VIN_MAX, + PMBUS_VIRT_RESET_VIN_HISTORY, + PMBUS_VIRT_READ_IIN_AVG, + PMBUS_VIRT_READ_IIN_MIN, + PMBUS_VIRT_READ_IIN_MAX, + PMBUS_VIRT_RESET_IIN_HISTORY, + PMBUS_VIRT_READ_PIN_AVG, + PMBUS_VIRT_READ_PIN_MIN, + PMBUS_VIRT_READ_PIN_MAX, + PMBUS_VIRT_RESET_PIN_HISTORY, + PMBUS_VIRT_READ_POUT_AVG, + PMBUS_VIRT_READ_POUT_MIN, + PMBUS_VIRT_READ_POUT_MAX, + PMBUS_VIRT_RESET_POUT_HISTORY, + PMBUS_VIRT_READ_VOUT_AVG, + PMBUS_VIRT_READ_VOUT_MIN, + PMBUS_VIRT_READ_VOUT_MAX, + PMBUS_VIRT_RESET_VOUT_HISTORY, + PMBUS_VIRT_READ_IOUT_AVG, + PMBUS_VIRT_READ_IOUT_MIN, + PMBUS_VIRT_READ_IOUT_MAX, + PMBUS_VIRT_RESET_IOUT_HISTORY, + PMBUS_VIRT_READ_TEMP2_AVG, + PMBUS_VIRT_READ_TEMP2_MIN, + PMBUS_VIRT_READ_TEMP2_MAX, + PMBUS_VIRT_RESET_TEMP2_HISTORY, + + PMBUS_VIRT_READ_VMON, + PMBUS_VIRT_VMON_UV_WARN_LIMIT, + PMBUS_VIRT_VMON_OV_WARN_LIMIT, + PMBUS_VIRT_VMON_UV_FAULT_LIMIT, + PMBUS_VIRT_VMON_OV_FAULT_LIMIT, + PMBUS_VIRT_STATUS_VMON, +}; + +/* + * OPERATION + */ +#define PB_OPERATION_CONTROL_ON BIT(7) + +/* + * CAPABILITY + */ +#define PB_CAPABILITY_SMBALERT BIT(4) +#define PB_CAPABILITY_ERROR_CHECK BIT(7) + +/* + * VOUT_MODE + */ +#define PB_VOUT_MODE_MODE_MASK 0xe0 +#define PB_VOUT_MODE_PARAM_MASK 0x1f + +#define PB_VOUT_MODE_LINEAR 0x00 +#define PB_VOUT_MODE_VID 0x20 +#define PB_VOUT_MODE_DIRECT 0x40 + +/* + * Fan configuration + */ +#define PB_FAN_2_PULSE_MASK (BIT(0) | BIT(1)) +#define PB_FAN_2_RPM BIT(2) +#define PB_FAN_2_INSTALLED BIT(3) +#define PB_FAN_1_PULSE_MASK (BIT(4) | BIT(5)) +#define PB_FAN_1_RPM BIT(6) +#define PB_FAN_1_INSTALLED BIT(7) + +/* + * STATUS_BYTE, STATUS_WORD (lower) + */ +#define PB_STATUS_NONE_ABOVE BIT(0) +#define PB_STATUS_CML BIT(1) +#define PB_STATUS_TEMPERATURE BIT(2) +#define PB_STATUS_VIN_UV BIT(3) +#define PB_STATUS_IOUT_OC BIT(4) +#define PB_STATUS_VOUT_OV BIT(5) +#define PB_STATUS_OFF BIT(6) +#define PB_STATUS_BUSY BIT(7) + +/* + * STATUS_WORD (upper) + */ +#define PB_STATUS_UNKNOWN BIT(8) +#define PB_STATUS_OTHER BIT(9) +#define PB_STATUS_FANS BIT(10) +#define PB_STATUS_POWER_GOOD_N BIT(11) +#define PB_STATUS_WORD_MFR BIT(12) +#define PB_STATUS_INPUT BIT(13) +#define PB_STATUS_IOUT_POUT BIT(14) +#define PB_STATUS_VOUT BIT(15) + +/* + * STATUS_IOUT + */ +#define PB_POUT_OP_WARNING BIT(0) +#define PB_POUT_OP_FAULT BIT(1) +#define PB_POWER_LIMITING BIT(2) +#define PB_CURRENT_SHARE_FAULT BIT(3) +#define PB_IOUT_UC_FAULT BIT(4) +#define PB_IOUT_OC_WARNING BIT(5) +#define PB_IOUT_OC_LV_FAULT BIT(6) +#define PB_IOUT_OC_FAULT BIT(7) + +/* + * STATUS_VOUT, STATUS_INPUT + */ +#define PB_VOLTAGE_UV_FAULT BIT(4) +#define PB_VOLTAGE_UV_WARNING BIT(5) +#define PB_VOLTAGE_OV_WARNING BIT(6) +#define PB_VOLTAGE_OV_FAULT BIT(7) + +/* + * STATUS_INPUT + */ +#define PB_PIN_OP_WARNING BIT(0) +#define PB_IIN_OC_WARNING BIT(1) +#define PB_IIN_OC_FAULT BIT(2) + +/* + * STATUS_TEMPERATURE + */ +#define PB_TEMP_UT_FAULT BIT(4) +#define PB_TEMP_UT_WARNING BIT(5) +#define PB_TEMP_OT_WARNING BIT(6) +#define PB_TEMP_OT_FAULT BIT(7) + +/* + * STATUS_FAN + */ +#define PB_FAN_AIRFLOW_WARNING BIT(0) +#define PB_FAN_AIRFLOW_FAULT BIT(1) +#define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2) +#define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3) +#define PB_FAN_FAN2_WARNING BIT(4) +#define PB_FAN_FAN1_WARNING BIT(5) +#define PB_FAN_FAN2_FAULT BIT(6) +#define PB_FAN_FAN1_FAULT BIT(7) + +/* + * CML_FAULT_STATUS + */ +#define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0) +#define PB_CML_FAULT_OTHER_COMM BIT(1) +#define PB_CML_FAULT_PROCESSOR BIT(3) +#define PB_CML_FAULT_MEMORY BIT(4) +#define PB_CML_FAULT_PACKET_ERROR BIT(5) +#define PB_CML_FAULT_INVALID_DATA BIT(6) +#define PB_CML_FAULT_INVALID_COMMAND BIT(7) + +enum pmbus_sensor_classes { + PSC_VOLTAGE_IN = 0, + PSC_VOLTAGE_OUT, + PSC_CURRENT_IN, + PSC_CURRENT_OUT, + PSC_POWER, + PSC_TEMPERATURE, + PSC_FAN, + PSC_NUM_CLASSES /* Number of power sensor classes */ +}; + +#define PMBUS_PAGES 32 /* Per PMBus specification */ + +/* Functionality bit mask */ +#define PMBUS_HAVE_VIN BIT(0) +#define PMBUS_HAVE_VCAP BIT(1) +#define PMBUS_HAVE_VOUT BIT(2) +#define PMBUS_HAVE_IIN BIT(3) +#define PMBUS_HAVE_IOUT BIT(4) +#define PMBUS_HAVE_PIN BIT(5) +#define PMBUS_HAVE_POUT BIT(6) +#define PMBUS_HAVE_FAN12 BIT(7) +#define PMBUS_HAVE_FAN34 BIT(8) +#define PMBUS_HAVE_TEMP BIT(9) +#define PMBUS_HAVE_TEMP2 BIT(10) +#define PMBUS_HAVE_TEMP3 BIT(11) +#define PMBUS_HAVE_STATUS_VOUT BIT(12) +#define PMBUS_HAVE_STATUS_IOUT BIT(13) +#define PMBUS_HAVE_STATUS_INPUT BIT(14) +#define PMBUS_HAVE_STATUS_TEMP BIT(15) +#define PMBUS_HAVE_STATUS_FAN12 BIT(16) +#define PMBUS_HAVE_STATUS_FAN34 BIT(17) +#define PMBUS_HAVE_VMON BIT(18) +#define PMBUS_HAVE_STATUS_VMON BIT(19) + +enum pmbus_data_format { linear = 0, direct, vid }; +enum vrm_version { vr11 = 0, vr12, vr13 }; + +struct pmbus_driver_info { + int pages; /* Total number of pages */ + enum pmbus_data_format format[PSC_NUM_CLASSES]; + enum vrm_version vrm_version; + /* + * Support one set of coefficients for each sensor type + * Used for chips providing data in direct mode. + */ + int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ + int b[PSC_NUM_CLASSES]; /* offset */ + int R[PSC_NUM_CLASSES]; /* exponent */ + + u32 func[PMBUS_PAGES]; /* Functionality, per page */ + /* + * The following functions map manufacturing specific register values + * to PMBus standard register values. Specify only if mapping is + * necessary. + * Functions return the register value (read) or zero (write) if + * successful. A return value of -ENODATA indicates that there is no + * manufacturer specific register, but that a standard PMBus register + * may exist. Any other negative return value indicates that the + * register does not exist, and that no attempt should be made to read + * the standard register. + */ + int (*read_byte_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int reg); + int (*write_word_data)(struct i2c_client *client, int page, int reg, + u16 word); + int (*write_byte)(struct i2c_client *client, int page, u8 value); + /* + * The identify function determines supported PMBus functionality. + * This function is only necessary if a chip driver supports multiple + * chips, and the chip functionality is not pre-determined. + */ + int (*identify)(struct i2c_client *client, + struct pmbus_driver_info *info); + + /* Regulator functionality, if supported by this chip driver. */ + int num_regulators; + const struct regulator_desc *reg_desc; +}; + +/* Regulator ops */ + +extern const struct regulator_ops pmbus_regulator_ops; + +/* Macro for filling in array of struct regulator_desc */ +#define PMBUS_REGULATOR(_name, _id) \ + [_id] = { \ + .name = (_name # _id), \ + .id = (_id), \ + .of_match = of_match_ptr(_name # _id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &pmbus_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +/* Function declarations */ + +void pmbus_clear_cache(struct i2c_client *client); +int pmbus_set_page(struct i2c_client *client, u8 page); +int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg); +int pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg, u16 word); +int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); +int pmbus_write_byte(struct i2c_client *client, int page, u8 value); +int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, + u8 value); +int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, + u8 mask, u8 value); +void pmbus_clear_faults(struct i2c_client *client); +bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); +bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); +int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, + struct pmbus_driver_info *info); +int pmbus_do_remove(struct i2c_client *client); +const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client + *client); + +#endif /* PMBUS_H */ diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/sff_io.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/sff_io.c new file mode 100644 index 00000000000..11d09dfc271 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/sff_io.c @@ -0,0 +1,798 @@ +/* + * Sample kobject implementation + * * Copyright (C) 2004-2007 Greg Kroah-Hartman + * Copyright (C) 2007 Novell Inc. + * + * Released under the GPL version 2 only. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +/*work queue*/ +#include +#include + +#include "sff_io.h" +#include "io_config_maple.h" + +#define DEBUG_MODE (0) +//#define TEST_CODE +#if (DEBUG_MODE == 1) +#define SFF_IO_DEBUG(fmt, args...) \ + printk (KERN_INFO "%s: " fmt "\r\n", __FUNCTION__, ##args) +#else + #define SFF_IO_DEBUG(fmt, args...) +#endif +#define SFF_IO_INFO(fmt, args...) \ + printk (KERN_INFO "[SFF_IO]%s: " fmt "\r\n", __FUNCTION__, ##args) +#define SFF_IO_ERR(fmt, args...) \ + printk_ratelimited (KERN_ERR "{SFF_IO]%s: " fmt "\r\n",__FUNCTION__, ##args) + +static unsigned int gpio_ioexpander_int = CPLD_EXPANDER_INT_N; +static int io_exps_id = 0; +static int io_exps_check_fail_count = 0; +//static irq_handler_t ioexpander_irq_handler(unsigned int irq, void *dev_id, struct pt_regs *regs); +static struct i2c_client *Cpld_client = NULL; +static struct mutex cpld_lock; +static int inv_i2c_smbus_read_byte_data(struct i2c_client *client, u8 offset); + +static int present_st[PORT_NUM]; +static int rxlos_st[PORT_NUM]; +static int txfault_st[PORT_NUM]; + +static int port_num_get(void) +{ + return PORT_NUM; +} + +u8 pca9555_input_reg[2] = +{ + 0x00, + 0x01 +}; + +u8 pca9555_output_reg[2] = +{ + 0x02, + 0x03 +}; +u8 pca9555_config_reg[2] = +{ + 0x06, + 0x07 +}; +struct sff_io_client_node { + struct i2c_client *client; + int i2c_ch; + struct list_head list; + struct mutex lock; +}; +static LIST_HEAD(sff_io_client_list); + +static struct sff_io_client_node *sff_io_client_find(int i2c_ch, u8 slave_addr) +{ + struct list_head *list_node = NULL; + struct sff_io_client_node *node = NULL; + int find = 0; + list_for_each(list_node, &sff_io_client_list) + { + node = list_entry(list_node, struct sff_io_client_node, list); + + if (node->i2c_ch == i2c_ch) { + find = 1; + node->client->addr = slave_addr; + break; + } + } + + if(!find) + { + SFF_IO_ERR("%s fail/n", __FUNCTION__); + return NULL; + } + return node; +} + +static int inv_i2c_smbus_read_word_data(struct i2c_client *client, u8 offset) +{ + int ret = 0; + int i = 0; + + for (i = 0; i < RETRY_COUNT; i++) { + + ret = i2c_smbus_read_word_data(client, offset); + if (ret < 0) { + msleep(RETRY_DELAY_MS); + continue; + } + break; + } + + if (i >= RETRY_COUNT) { + SFF_IO_ERR("%s fail:offset:0x%x try %d/%d! Error Code: %d\n", __func__, offset, i, RETRY_COUNT, ret); + } + + return ret; +} + +static int inv_i2c_smbus_write_word_data(struct i2c_client *client, u8 offset, u16 buf) +{ + int i; + int ret = 0; + for(i=0; i< RETRY_COUNT; i++) + { + ret = i2c_smbus_write_word_data(client, offset, buf); + + if (ret < 0) { + msleep(RETRY_DELAY_MS); + continue; + } + break; + } + if (i >= RETRY_COUNT) { + SFF_IO_ERR("%s fail:offset:0x%x try %d/%d! Error Code: %d\n", __func__, offset, i, RETRY_COUNT, ret); + } + return ret; +} +static int inv_i2c_smbus_write_byte_data(struct i2c_client *client, u8 offset, u8 buf) +{ + int i; + int ret = 0; + for(i=0; i< RETRY_COUNT; i++) + { + ret = i2c_smbus_write_byte_data(client, offset, buf); + + if (ret < 0) { + msleep(RETRY_DELAY_MS); + continue; + } + break; + } + if (i >= RETRY_COUNT) { + SFF_IO_ERR("%s fail:offset:0x%x try %d/%d! Error Code: %d\n", __func__, offset, i, RETRY_COUNT, ret); + } + return ret; +} +static int inv_i2c_smbus_read_byte_data(struct i2c_client *client, u8 offset) +{ + int ret = 0; + int i = 0; + + for (i = 0; i < RETRY_COUNT; i++) { + + ret = i2c_smbus_read_byte_data(client, offset); + if (ret < 0) { + msleep(RETRY_DELAY_MS); + continue; + } + break; + } + + if (i >= RETRY_COUNT) { + printk("%s fail:offset:0x%x try %d/%d! Error Code: %d\n", __func__, offset, i, RETRY_COUNT, ret); + } + + return ret; +} +static int pca9555_word_read(u8 ch, u8 addr, u8 offset) +{ + + struct sff_io_client_node *node = NULL; + int ret = 0; + node = sff_io_client_find(ch, addr); + + if(IS_ERR_OR_NULL(node)) + return -1; + mutex_lock(&node->lock); + ret = inv_i2c_smbus_read_word_data(node->client, offset); + mutex_unlock(&node->lock); + + return ret; +} + +static int pca9555_word_write(u8 ch, u8 addr, u8 offset, u16 val) +{ + + struct sff_io_client_node *node = NULL; + int ret = 0; + node = sff_io_client_find(ch, addr); + + if(IS_ERR_OR_NULL(node)) + return -1; + mutex_lock(&node->lock); + ret = inv_i2c_smbus_write_word_data(node->client, offset, val); + mutex_unlock(&node->lock); + + return ret; +} + +static int sff_io_client_create(int ch) +{ + struct i2c_client *client = NULL; + struct sff_io_client_node *node = NULL; + struct i2c_adapter *adap; + + node = kzalloc(sizeof(struct sff_io_client_node), GFP_KERNEL); + if(IS_ERR_OR_NULL(node)) + { + goto exit_err; + } + client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); + if(IS_ERR_OR_NULL(client)) + { + goto exit_kfree_node; + } + + /*get i2c adapter*/ + adap = i2c_get_adapter(ch); + client->adapter = adap; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + { + + SFF_IO_ERR("%s: i2c check fail\n", __FUNCTION__); + goto exit_kfree_sff_io_client; + + } + + node->client = client; + node->i2c_ch = ch; + mutex_init(&node->lock); + list_add(&node->list, &sff_io_client_list); + + SFF_IO_DEBUG("i2c ch:%d\n", ch); + return 0; + + exit_kfree_sff_io_client: + kfree(client); + exit_kfree_node: + kfree(node); + exit_err: + return -1; + +} +static int sff_io_client_create_all(void) +{ + int idx = 0; + int table_size = ARRAY_SIZE(io_i2c_ch_table); + + for(idx = 0; idx < table_size; idx++) { + if(sff_io_client_create(io_i2c_ch_table[idx]) < 0) + { + return -1; + } + } + + return 0; +} + +static int sff_io_client_destroy(int i2c_ch) +{ + struct list_head *list_node = NULL; + struct sff_io_client_node *sff_io_client_node = NULL; + int found = 0; + list_for_each(list_node, &sff_io_client_list) + { + sff_io_client_node = list_entry(list_node, struct sff_io_client_node, list); + if(i2c_ch == sff_io_client_node->i2c_ch) + { + found = 1; + break; + } + } + + if(found) + { + list_del(list_node); + i2c_put_adapter(sff_io_client_node->client->adapter); + kfree(sff_io_client_node->client); + kfree(sff_io_client_node); + + return 0; + } + else + { + SFF_IO_DEBUG("fail\n"); + return -1; + } +} + +static int sff_io_client_destroy_all(void) +{ + int idx = 0; + int table_size = ARRAY_SIZE(io_i2c_ch_table); + for(idx = 0; idx < table_size; idx++) + { + if(sff_io_client_destroy(io_i2c_ch_table[idx]) < 0) + { + return -1; + } + } + + return 0; +} + + +static int cpld_ioexpander_init(void) +{ + int ret = 0; + struct i2c_client *client = NULL; + struct i2c_adapter *adap; + client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); + + if (IS_ERR_OR_NULL(client)) { + goto exit_err; + } + + SFF_IO_INFO("start\n"); + /*get i2c adapter*/ + adap = i2c_get_adapter(CPLD_I2C_CH); + client->adapter = adap; + client->addr = CPLD_I2C_ADDR; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + { + + SFF_IO_ERR("%s: i2c check fail\n", __FUNCTION__); + goto exit_kfree_sff_client; + + } + Cpld_client = client; + + mutex_init(&cpld_lock); + SFF_IO_INFO("init ok\n"); + return 0; + +exit_kfree_sff_client: + kfree(client); + +exit_err: + return -1; + + +} +int cpld_ioexp_isr_enable(void) +{ + int ret = 0; + /*enable cpld ioexpander isr mode*/ + mutex_lock(&cpld_lock); + ret = inv_i2c_smbus_write_byte_data(Cpld_client, 0x37, 0x01); + mutex_unlock(&cpld_lock); + if (ret < 0) + { + return ret; + } + + return 0; + +} +int ioexp_isr_reg_get(int *reg) +{ + int ret = 0; + int sfp = 0; + int qsfp = 0; + + if(IS_ERR_OR_NULL(reg)) + { + SFF_IO_ERR("NULL ptr\n"); + return -1; + } + if(IS_ERR_OR_NULL(Cpld_client)) + { + SFF_IO_ERR("NULL ptr\n"); + return -1; + } + mutex_lock(&cpld_lock); + ret = inv_i2c_smbus_read_word_data(Cpld_client, 0x35); + mutex_unlock(&cpld_lock); + if (ret < 0) + { + SFF_IO_ERR("2 read fail\n"); + return ret; + } + /*sfp 0x35 bit 0:7 0x36 bit 0:4 + * qsfp 0x36 bit 7, merge it into one data*/ + sfp = ret & 0xfff; + qsfp = (ret & 0x8000) >> 3; + + /*bit = 0: interrupt occurs , reverse it for easy logic*/ + + *reg = (~(sfp|qsfp)) & 0x1fff; + return 0; +} + + +int present_st_get(int port) +{ + int new_port = port; + return present_st[new_port]; +} +int rxlos_get(int port) +{ + int new_port = port; + return rxlos_st[new_port]; +} +int txfault_get(int port) +{ + int new_port = port; + return txfault_st[new_port]; +} + +bool sff_io_is_plugged(int port) +{ + int new_port = port; + return ((0 == present_st[new_port]) ? true : false); +} + +struct io_exp_input_t *find_ioexp(struct io_exp_input_t map[], int port_min) { + + int i = 0; + for (i = 0; map[i].ch != END_OF_TABLE; i++) { + + if (port_min == map[i].port_min) { + return &map[i]; + } + } + return NULL; +} + +int io_exps_check(void) +{ + struct io_exp_config_t *config = NULL; + int ret = 0; + int val = 0; + + /*when interrupt gpio is low => input change is hapenning , skip this round check*/ + val = gpio_get_value(gpio_ioexpander_int); + if (0 == val) { + return 0; + } + if (END_OF_TABLE == io_exp_config[io_exps_id].ch) { + if (0 == io_exps_check_fail_count) { + // SFF_IO_INFO("pass idx:%d", io_exps_id); + } + io_exps_id = 0; + io_exps_check_fail_count = 0; + } + + config = &io_exp_config[io_exps_id]; + io_exps_id++; + + ret = pca9555_word_read(config->ch, config->addr, pca9555_config_reg[0]); + if (ret < 0) { + SFF_IO_ERR("io config read fail: ch:0x%x addr:0x%x val:0x%x\n", config->ch, config->addr, config->val); + io_exps_check_fail_count++; + return ret; + } + + if ((u16)ret == config->val) { + + //SFF_IO_INFO("io config read check ok: ch:0x%x addr:0x%x val:0x%x\n", config->ch, config->addr, config->val); + } else { + + SFF_IO_ERR("io config read check fail: ch:0x%x addr:0x%x val:0x%x\n", config->ch, config->addr, config->val); + io_exps_check_fail_count++; + return -1; + } + + return 0; +} +int io_exp_isr_handler(void) +{ + int idx = 0; + int input_change; + int val = 0; + int ret = 0; + int bit = 0; + int bit_min = 0; + int bit_max = 0; + int port= 0; + int new_port = 0; + int size = sizeof(input_change_table)/sizeof(input_change_table[0]); + struct io_exp_input_t *ioexp = NULL; + val = gpio_get_value(gpio_ioexpander_int); + //SFF_IO_INFO("1.gpio:%d level: %d\n", gpio_ioexpander_int, value); + if (val == 0) { + //SFF_IO_INFO("1.gpio:%d level: %d\n", gpio_ioexpander_int, value); + if ((ret = ioexp_isr_reg_get(&input_change)) < 0 ) { + SFF_IO_ERR("read fail\n"); + return ret; + } + + SFF_IO_INFO("input_change:0x%x\n", input_change); + for (idx = 0; idx < size; idx++) { + + if (input_change & (1 << idx)) { + /*present scan*/ + + SFF_IO_DEBUG("input_change_table[%d]:%d\n", idx, input_change_table[idx]); + ioexp = find_ioexp(io_exp_present, input_change_table[idx]); + if (NULL == ioexp) { + + SFF_IO_ERR("cant find io exp present: %d\n", input_change_table[idx]); + break; + } + ret = pca9555_word_read(ioexp->ch, ioexp->addr, pca9555_input_reg[0]); + if (ret < 0) { + SFF_IO_ERR("present read word fail: ch:0x%x addr:0x%x\n", ioexp->ch, ioexp->addr); + return ret; + } + port = ioexp->port_min; + bit_min = ioexp->bit_min; + bit_max = ioexp->bit_max; + + for (bit = bit_min; bit <= bit_max; bit++) { + val = ((ret & (1 << bit)) ? 1 : 0); + new_port = ioexp_port_2_port[port]; + + SFF_IO_DEBUG("new_port:%d", new_port); + if (val != present_st[new_port]) { + + if (!val) { + SFF_IO_INFO("port:%d plug in", new_port+1); + } else { + SFF_IO_INFO("port:%d plug out\n", new_port+1); + } + } + present_st[new_port] = val; + + port++; + } + /*rx_los scan*/ + if (size-1 == idx) { + + SFF_IO_DEBUG("qsfp doesnt have rxlos%d\n", idx); + break; + } + SFF_IO_DEBUG("input_change_table[%d]:%d\n", idx, input_change_table[idx]); + ioexp = find_ioexp(io_exp_rxlos, input_change_table[idx]); + if (NULL == ioexp) { + + SFF_IO_ERR("cant find io exp rxlos: %d\n", input_change_table[idx]); + break; + } + port = ioexp->port_min; + bit_min = ioexp->bit_min; + bit_max = ioexp->bit_max; + + for (bit = bit_min; bit <= bit_max; bit++) { + val = ((ret & (1 << bit)) ? 1 : 0); + new_port = ioexp_port_2_port[port]; + if (val != rxlos_st[new_port]) { + + if (val) { + //SFF_IO_INFO("port:%d rxlos assert", new_port+1); + } else { + //SFF_IO_INFO("port:%d rxlos deassert\n", new_port+1); + } + } + rxlos_st[new_port] = val; + port++; + } + + SFF_IO_DEBUG("input_change_table[%d]:%d\n", idx, input_change_table[idx]); + ioexp = find_ioexp(io_exp_txfault, input_change_table[idx]); + if (NULL == ioexp) { + + SFF_IO_ERR("cant find io exp tx fault: %d\n", input_change_table[idx]); + break; + } + port = ioexp->port_min; + bit_min = ioexp->bit_min; + bit_max = ioexp->bit_max; + + for (bit = bit_min; bit <= bit_max; bit++) { + val = ((ret & (1 << bit)) ? 1 : 0); + new_port = ioexp_port_2_port[port]; + if (val != txfault_st[new_port]) { + + if (val) { + //SFF_IO_INFO("port:%d txfault assert", new_port+1); + } else { + //SFF_IO_INFO("port:%d txfault deassert\n", new_port+1); + } + } + txfault_st[new_port] = val; + port++; + } + + } + } + } + + return ret; +} + +int ioexpander_int_init(void) +{ + int result; + int value = 0x0; + result = gpio_is_valid(gpio_ioexpander_int); + + if (result < 0) { + + SFF_IO_ERR("valid gpio:%d ret:%d\n", gpio_ioexpander_int, result); + return -1; + } + + value = gpio_direction_input(gpio_ioexpander_int); + if (value < 0 ) { + + SFF_IO_ERR("gpio:%d dir set. err code:%d\n", gpio_ioexpander_int, value); + return -1; + + } + value = gpio_get_value(gpio_ioexpander_int); + SFF_IO_INFO("ok gpio:%d value:%d\n", gpio_ioexpander_int, value); + + if (cpld_ioexpander_init() < 0) { + gpio_free(gpio_ioexpander_int); + return -1; + } + return 0; +} + +int ioexpander_int_deinit(void) +{ + if (Cpld_client) { + + i2c_put_adapter(Cpld_client->adapter); + kfree(Cpld_client); + } + gpio_free(gpio_ioexpander_int); + return 0; +} +static int io_exps_config(void) +{ + int count = 0; + int ret = 0; + struct io_exp_config_t *config = NULL; + /*config io exp*/ + for (count = 0; io_exp_config[count].ch != END_OF_TABLE; count++) { + config = &io_exp_config[count]; + ret = pca9555_word_write(config->ch, config->addr, pca9555_config_reg[0], config->val); + if (ret < 0) { + SFF_IO_ERR("io config fail: ch:0x%x addr:0x%x val:0x%x\n", config->ch, config->addr, config->val); + return ret; + } + } + return 0; +} + +int sff_io_init(void) +{ + + int val = 0; + int count = 0; + int port = 0; + int new_port = 0; + int bit = 0; + int bit_min = 0; + int bit_max = 0; + int ret = 0; + struct io_exp_input_t *ioexp = NULL; + //struct io_exp_config_t *config = NULL; + SFF_IO_DEBUG("init start\n"); + if(sff_io_client_create_all() < 0) + return -1; + SFF_IO_DEBUG("sff_io_client_create_all ok\n"); + /* + if(sff_io_mux_init() < 0) + return -1; + */ + /*config io exp*/ + ret = io_exps_config(); + if (ret < 0) { + return ret; + } + /*fist present scan*/ + for (count = 0; io_exp_present[count].ch != END_OF_TABLE; count++) { + ioexp = &io_exp_present[count]; + ret = pca9555_word_read(ioexp->ch, ioexp->addr, pca9555_input_reg[0]); + if (ret < 0) { + SFF_IO_ERR("read word fail: %d\n", ioexp->ch); + return ret; + } + port = ioexp->port_min; + bit_min = ioexp->bit_min; + bit_max = ioexp->bit_max; + for (bit = bit_min; bit <= bit_max; bit++) { + val = ((ret & (1 << bit)) ? 1 : 0); + new_port = ioexp_port_2_port[port]; + + SFF_IO_DEBUG("new_port:%d", new_port); + present_st[new_port] = val; + + port++; + } + } + /*fist rxlos scan*/ + for (count = 0; io_exp_rxlos[count].ch != END_OF_TABLE; count++) { + ioexp = &io_exp_rxlos[count]; + ret = pca9555_word_read(ioexp->ch, ioexp->addr, pca9555_input_reg[0]); + if (ret < 0) { + SFF_IO_ERR("read word fail: %d\n", ioexp->ch); + return ret; + } + port = ioexp->port_min; + bit_min = ioexp->bit_min; + bit_max = ioexp->bit_max; + for (bit = bit_min; bit <= bit_max; bit++) { + val = ((ret & (1 << bit)) ? 1 : 0); + new_port = ioexp_port_2_port[port]; + + SFF_IO_DEBUG("new_port:%d", new_port); + rxlos_st[new_port] = val; + + port++; + } + } + /*fist txfault scan*/ + for (count = 0; io_exp_txfault[count].ch != END_OF_TABLE; count++) { + ioexp = &io_exp_txfault[count]; + ret = pca9555_word_read(ioexp->ch, ioexp->addr, pca9555_input_reg[0]); + if (ret < 0) { + SFF_IO_ERR("read word fail: %d\n", ioexp->ch); + return ret; + } + port = ioexp->port_min; + bit_min = ioexp->bit_min; + bit_max = ioexp->bit_max; + for (bit = bit_min; bit <= bit_max; bit++) { + val = ((ret & (1 << bit)) ? 1 : 0); + new_port = ioexp_port_2_port[port]; + + SFF_IO_DEBUG("new_port:%d", new_port); + txfault_st[new_port] = val; + + port++; + } + } + + if (ioexpander_int_init() < 0) { + return -1; + } + SFF_IO_DEBUG("OK\n"); + return 0; + +} +void sff_io_deinit(void) +{ + ioexpander_int_deinit(); + sff_io_client_destroy_all(); +} +#if 0 +static int __init example_init(void) +{ + return sff_io_init(); +} + +static void __exit example_exit(void) +{ + sff_io_deinit(); +} + +module_init(example_init); +module_exit(example_exit); +#endif +//MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Alang"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/sff_io.h b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/sff_io.h new file mode 100644 index 00000000000..d0dc8c92fbc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/sff_io.h @@ -0,0 +1,44 @@ +//port info +#ifndef __SFF_IO_H +#define __SFF_IO_H + + +#define TEST_CODE +#define DEBUG_MODE (1) + +#define RETRY_COUNT (5) +#define RETRY_DELAY_MS (100) + + +struct io_exp_input_t { + u8 ch; + u8 addr; + int port_min; + int bit_min; + int bit_max; /*reprsent the num of ports*/ +}; +struct io_exp_config_t { + u8 ch; + u8 addr; + u16 val; +}; +#define REC_SFF_IO_UNSUPPORTED (6) + +typedef enum { + SFF_IO_IDLE_EVENT = 0, + SFF_IO_PLUG_IN_EVENT, + SFF_IO_PLUG_OUT_EVENT, +}; + +int sff_io_init(void); +void sff_io_deinit(void); +int io_exp_isr_handler(void); +int present_st_get(int port); +int rxlos_get(int port); +int txfault_get(int port); +bool sff_io_is_plugged(int port); +bool is_any_plug_event(void); +u8 plug_event_get(int port); +int io_exps_check(void); +int cpld_ioexp_isr_enable(void); +#endif /*__SFF_IO_H*/ diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/transceiver.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/transceiver.c new file mode 100644 index 00000000000..cb24c810d01 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/transceiver.c @@ -0,0 +1,10403 @@ +#include +#include +#include +#include +#include "io_expander.h" +#include "transceiver.h" +#include "sff_io.h" +/* For build single module using (Ex: ONL platform) */ +#include +//#include +//#include +extern int io_no_init; +#define DETECT_TYPE_TIMEOUT (20) +#define QSFP_DATA_READY_CHECK_TIMEOUT_MS (1000) +#define QSFP_DATA_READY_CHECK_DELAY_MS (10) +#define QSFP_DATA_READY_CHECK_NUM (QSFP_DATA_READY_CHECK_TIMEOUT_MS / QSFP_DATA_READY_CHECK_DELAY_MS) +/* ========== Register EEPROM address mapping ========== + */ +struct eeprom_map_s eeprom_map_sfp = { + .addr_br =0x50, .page_br =-1, .offset_br =12, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =94, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =-1, .offset_connector =2, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =-1, .offset_diag_type =92 , .length_diag_type =1, + .addr_extbr =-1, .page_extbr =-1, .offset_extbr =-1, .length_extbr =-1, + .addr_ext_id =0x50, .page_ext_id =-1, .offset_ext_id =1, .length_ext_id =1, + .addr_id =0x50, .page_id =-1, .offset_id =0, .length_id =1, + .addr_len_sm =0x50, .page_len_sm =-1, .offset_len_sm =15, .length_len_sm =1, + .addr_len_smf =0x50, .page_len_smf =-1, .offset_len_smf =14, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =-1, .offset_len_om1 =17, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =-1, .offset_len_om2 =16, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =-1, .offset_len_om3 =19, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =-1, .offset_len_om4 =18, .length_len_om4 =1, + .addr_option =0x50, .page_option =-1, .offset_option =64, .length_option =2, + .addr_rate_id =0x50, .page_rate_id =-1, .offset_rate_id =13, .length_rate_id =1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =0x51, .page_rx_em =-1, .offset_rx_em =115, .length_rx_em =1, + .addr_rx_los =-1, .page_rx_los =-1, .offset_rx_los =-1, .length_rx_los =-1, + .addr_rx_power =0x51, .page_rx_power =-1, .offset_rx_power =104, .length_rx_power =2, + .addr_soft_rs0 =0x51, .page_soft_rs0 =-1, .offset_soft_rs0 =110, .length_soft_rs0 =1, + .addr_soft_rs1 =0x51, .page_soft_rs1 =-1, .offset_soft_rs1 =118, .length_soft_rs0 =1, + .addr_temp =0x51, .page_temp =-1, .offset_temp =96, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =-1, .offset_trancomp =3, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =-1, .offset_trancomp_ext =36, .length_trancomp_ext =1, + .addr_tx_bias =0x51, .page_tx_bias =-1, .offset_tx_bias =100, .length_tx_bias =2, + .addr_tx_disable =-1, .page_tx_disable =-1, .offset_tx_disable =-1, .length_tx_disable =-1, + .addr_tx_eq =0x51, .page_tx_eq =-1, .offset_tx_eq =114, .length_tx_eq =1, + .addr_tx_fault =-1, .page_tx_fault =-1, .offset_tx_fault =-1, .length_tx_fault =-1, + .addr_tx_power =0x51, .page_tx_power =-1, .offset_tx_power =102, .length_tx_power =2, + .addr_vendor_name =0x50, .page_vendor_name =-1, .offset_vendor_name =20, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =-1, .offset_vendor_pn =40, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =-1, .offset_vendor_rev =56, .length_vendor_rev =4, + .addr_vendor_sn =0x50, .page_vendor_sn =-1, .offset_vendor_sn =68, .length_vendor_sn =16, + .addr_voltage =0x51, .page_voltage =-1, .offset_voltage =98, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =-1, .offset_wavelength =60, .length_wavelength =2, + .addr_eeprom =0x50, .page_eeprom =-1, .offset_eeprom =0, .length_eeprom =256, + .addr_eeprom_a0 =0x50, .page_eeprom_a0 =-1, .offset_eeprom_a0 =0, .length_eeprom_a0 =128, + .addr_eeprom_a2 =0x51, .page_eeprom_a2 =-1, .offset_eeprom_a2 =0, .length_eeprom_a2 =128, + .addr_alarm_flag_byte_1 =0x51, .page_alarm_flag_byte_1 =-1, .offset_alarm_flag_byte_1 =112, .length_alarm_flag_byte_1 =1, + .addr_alarm_flag_byte_2 =0x51, .page_alarm_flag_byte_2 =-1, .offset_alarm_flag_byte_2 =113, .length_alarm_flag_byte_2 =1, + .addr_temp_high_alarm_threshold =0x51, .page_temp_high_alarm_threshold =-1, .offset_temp_high_alarm_threshold =0, .length_temp_high_alarm_threshold =2, + .addr_temp_low_alarm_threshold =0x51, .page_temp_low_alarm_threshold =-1, .offset_temp_low_alarm_threshold =2, .length_temp_low_alarm_threshold =2, + .addr_voltage_high_alarm_threshold =0x51, .page_voltage_high_alarm_threshold =-1, .offset_voltage_high_alarm_threshold =8, .length_voltage_high_alarm_threshold =2, + .addr_voltage_low_alarm_threshold =0x51, .page_voltage_low_alarm_threshold =-1, .offset_voltage_low_alarm_threshold =10, .length_voltage_low_alarm_threshold =2, + .addr_bias_high_alarm_threshold =0x51, .page_bias_high_alarm_threshold =-1, .offset_bias_high_alarm_threshold =16, .length_bias_high_alarm_threshold =2, + .addr_bias_low_alarm_threshold =0x51, .page_bias_low_alarm_threshold =-1, .offset_bias_low_alarm_threshold =18, .length_bias_low_alarm_threshold =2, + .addr_tx_power_high_alarm_threshold =0x51, .page_tx_power_high_alarm_threshold=-1, .offset_tx_power_high_alarm_threshold=24, .length_tx_power_high_alarm_threshold=2, + .addr_tx_power_low_alarm_threshold =0x51, .page_tx_power_low_alarm_threshold =-1, .offset_tx_power_low_alarm_threshold =26, .length_tx_power_low_alarm_threshold =2, + .addr_rx_power_high_alarm_threshold =0x51, .page_rx_power_high_alarm_threshold=-1, .offset_rx_power_high_alarm_threshold=32, .length_rx_power_high_alarm_threshold=2, + .addr_rx_power_low_alarm_threshold =0x51, .page_rx_power_low_alarm_threshold =-1, .offset_rx_power_low_alarm_threshold =34, .length_rx_power_low_alarm_threshold =2, + .addr_manufacturing_date =0x50, .page_manufacturing_date =-1, .offset_manufacturing_date =84, .length_manufacturing_date =8, +}; + +struct eeprom_map_s eeprom_map_qsfp = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =-1, .page_rx_em =-1, .offset_rx_em =-1, .length_rx_em =-1, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =-1, .page_tx_eq =-1, .offset_tx_eq =-1, .length_tx_eq =-1, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, + .addr_eeprom =0x50, .page_eeprom =0, .offset_eeprom =0, .length_eeprom =256, + .addr_eeprom_page03=0x50, .page_eeprom_page03=3, .offset_eeprom_page03=128, .length_eeprom_page03=128, + .addr_temp_alarm =0x50, .page_temp_alarm =0, .offset_temp_alarm =6, .length_temp_alarm =1, + .addr_voltage_alarm =0x50, .page_voltage_alarm =0, .offset_voltage_alarm =7, .length_voltage_alarm =1, + .addr_rx_power_alarm =0x50, .page_rx_power_alarm =0, .offset_rx_power_alarm =9, .length_rx_power_alarm =2, + .addr_bias_alarm =0x50, .page_bias_alarm =0, .offset_bias_alarm =11, .length_bias_alarm =2, + .addr_tx_power_alarm =0x50, .page_tx_power_alarm =0, .offset_tx_power_alarm =13, .length_tx_power_alarm =2, + .addr_temp_high_alarm_threshold =0x50, .page_temp_high_alarm_threshold =3, .offset_temp_high_alarm_threshold =128, .length_temp_high_alarm_threshold =2, + .addr_temp_low_alarm_threshold =0x50, .page_temp_low_alarm_threshold =3, .offset_temp_low_alarm_threshold =130, .length_temp_low_alarm_threshold =2, + .addr_voltage_high_alarm_threshold =0x50, .page_voltage_high_alarm_threshold =3, .offset_voltage_high_alarm_threshold =144, .length_voltage_high_alarm_threshold =2, + .addr_voltage_low_alarm_threshold =0x50, .page_voltage_low_alarm_threshold =3, .offset_voltage_low_alarm_threshold =146, .length_voltage_low_alarm_threshold =2, + .addr_rx_power_high_alarm_threshold =0x50, .page_rx_power_high_alarm_threshold=3, .offset_rx_power_high_alarm_threshold=176, .length_rx_power_high_alarm_threshold=2, + .addr_rx_power_low_alarm_threshold =0x50, .page_rx_power_low_alarm_threshold =3, .offset_rx_power_low_alarm_threshold =178, .length_rx_power_low_alarm_threshold =2, + .addr_bias_high_alarm_threshold =0x50, .page_bias_high_alarm_threshold =3, .offset_bias_high_alarm_threshold =184, .length_bias_high_alarm_threshold =2, + .addr_bias_low_alarm_threshold =0x50, .page_bias_low_alarm_threshold =3, .offset_bias_low_alarm_threshold =186, .length_bias_low_alarm_threshold =2, + .addr_tx_power_high_alarm_threshold =0x50, .page_tx_power_high_alarm_threshold=3, .offset_tx_power_high_alarm_threshold=192, .length_tx_power_high_alarm_threshold=2, + .addr_tx_power_low_alarm_threshold =0x50, .page_tx_power_low_alarm_threshold =3, .offset_tx_power_low_alarm_threshold =194, .length_tx_power_low_alarm_threshold =2, + .addr_manufacturing_date =0x50, .page_manufacturing_date =0, .offset_manufacturing_date =212, .length_manufacturing_date =8, +}; + +struct eeprom_map_s eeprom_map_qsfp28 = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =0x50, .page_cdr =-1, .offset_cdr =98, .length_cdr =1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =0x50, .page_rx_am =3, .offset_rx_am =238, .length_rx_am =2, + .addr_rx_em =0x50, .page_rx_em =3, .offset_rx_em =236, .length_rx_em =2, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =0x50, .page_tx_eq =3, .offset_tx_eq =234, .length_tx_eq =2, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, + .addr_eeprom =0x50, .page_eeprom =0, .offset_eeprom =0, .length_eeprom =256, + .addr_eeprom_page03=0x50, .page_eeprom_page03=3, .offset_eeprom_page03=128, .length_eeprom_page03=128, + .addr_temp_alarm =0x50, .page_temp_alarm =0, .offset_temp_alarm =6, .length_temp_alarm =1, + .addr_voltage_alarm =0x50, .page_voltage_alarm =0, .offset_voltage_alarm =7, .length_voltage_alarm =1, + .addr_rx_power_alarm =0x50, .page_rx_power_alarm =0, .offset_rx_power_alarm =9, .length_rx_power_alarm =2, + .addr_bias_alarm =0x50, .page_bias_alarm =0, .offset_bias_alarm =11, .length_bias_alarm =2, + .addr_tx_power_alarm =0x50, .page_tx_power_alarm =0, .offset_tx_power_alarm =13, .length_tx_power_alarm =2, + .addr_temp_high_alarm_threshold =0x50, .page_temp_high_alarm_threshold =3, .offset_temp_high_alarm_threshold =128, .length_temp_high_alarm_threshold =2, + .addr_temp_low_alarm_threshold =0x50, .page_temp_low_alarm_threshold =3, .offset_temp_low_alarm_threshold =130, .length_temp_low_alarm_threshold =2, + .addr_voltage_high_alarm_threshold =0x50, .page_voltage_high_alarm_threshold =3, .offset_voltage_high_alarm_threshold =144, .length_voltage_high_alarm_threshold =2, + .addr_voltage_low_alarm_threshold =0x50, .page_voltage_low_alarm_threshold =3, .offset_voltage_low_alarm_threshold =146, .length_voltage_low_alarm_threshold =2, + .addr_rx_power_high_alarm_threshold =0x50, .page_rx_power_high_alarm_threshold=3, .offset_rx_power_high_alarm_threshold=176, .length_rx_power_high_alarm_threshold=2, + .addr_rx_power_low_alarm_threshold =0x50, .page_rx_power_low_alarm_threshold =3, .offset_rx_power_low_alarm_threshold =178, .length_rx_power_low_alarm_threshold =2, + .addr_bias_high_alarm_threshold =0x50, .page_bias_high_alarm_threshold =3, .offset_bias_high_alarm_threshold =184, .length_bias_high_alarm_threshold =2, + .addr_bias_low_alarm_threshold =0x50, .page_bias_low_alarm_threshold =3, .offset_bias_low_alarm_threshold =186, .length_bias_low_alarm_threshold =2, + .addr_tx_power_high_alarm_threshold =0x50, .page_tx_power_high_alarm_threshold=3, .offset_tx_power_high_alarm_threshold=192, .length_tx_power_high_alarm_threshold=2, + .addr_tx_power_low_alarm_threshold =0x50, .page_tx_power_low_alarm_threshold =3, .offset_tx_power_low_alarm_threshold =194, .length_tx_power_low_alarm_threshold =2, + .addr_manufacturing_date =0x50, .page_manufacturing_date =0, .offset_manufacturing_date =212, .length_manufacturing_date =8, +}; + + +/* ========== Utility Functions ========== + */ +static int +get_bit(uint8_t origin_byte, int bit_shift) { + return (int)((origin_byte >> bit_shift) & 0x1); +} + +static int +transform_word_to_int(uint8_t hight_byte, + uint8_t low_byte) { + return ((((int)hight_byte) << 8) + (int)low_byte); +} + +void +alarm_msg_2_user(struct transvr_obj_s *self, + char *emsg) { + + SWPS_ERR("%s on %s.\n", emsg, self->swp_name); +} +EXPORT_SYMBOL(alarm_msg_2_user); + +/* ========== Private functions ========== + */ +static int +_reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +_is_transvr_support_page03(struct transvr_obj_s *self); + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self); + +static int +_transvr_init_handler(struct transvr_obj_s *self); + +int +_transvr_clean_handler(struct transvr_obj_s *self); + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self); + + +void +lock_transvr_obj(struct transvr_obj_s *self) { + + mutex_lock(&self->lock); + self->curr_page = VAL_TRANSVR_PAGE_FREE; +} +EXPORT_SYMBOL(lock_transvr_obj); + + +void +unlock_transvr_obj(struct transvr_obj_s *self) { + + self->curr_page = VAL_TRANSVR_PAGE_FREE; + mutex_unlock(&self->lock); +} +EXPORT_SYMBOL(unlock_transvr_obj); + + +static int +_check_by_mode(struct transvr_obj_s *self, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + char *caller_name){ + + int return_val = ERR_TRANSVR_UNEXCPT; + + switch (self->mode){ + case TRANSVR_MODE_POLLING: + switch (self->state){ + case STATE_TRANSVR_CONNECTED: + goto ok_check_by_mode_1; + case STATE_TRANSVR_NEW: + case STATE_TRANSVR_INIT: + return ERR_TRANSVR_UNINIT; + case STATE_TRANSVR_DISCONNECTED: + return ERR_TRANSVR_UNPLUGGED; + case STATE_TRANSVR_UNEXCEPTED: + return ERR_TRANSVR_ABNORMAL; + case STATE_TRANSVR_ISOLATED: + return ERR_TRNASVR_BE_ISOLATED; + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + + case TRANSVR_MODE_DIRECT: + return_val = self->fsm_4_direct(self, caller_name); + if (return_val < 0){ + return return_val; + } + goto ok_check_by_mode_1; + + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + +ok_check_by_mode_1: + return attr_update_func(self, 0); + +err_check_by_mode_1: + SWPS_INFO("_check_by_mode: mode:%d state:%d\n", self->mode, self->state); + return ERR_TRANSVR_UNEXCPT; +} + + +static void +_transvr_clean_retry(struct transvr_obj_s *self) { + self->retry = 0; +} + + +static int +_transvr_handle_retry(struct transvr_obj_s *self, int retry) { + /* Return: 0: keep retry + * -1: stop retry + */ + if (self->retry == 0) { + self->retry = retry; + } + self->retry -= 1; + if (self->retry <= 0) { + _transvr_clean_retry(self); + return -1; + } + return 0; +} + + +static int +_common_setup_page(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int show_e) { + /* return: + * 0 : OK + * -1 : EEPROM settings incorrect + * -2 : I2C R/W failure + * -3 : Undefined case + */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Check */ + if ((addr < 0) || (offset < 0) || (len < 0)) { + emsg = "EEPROM settings incorrect"; + retval = -1; + goto err_common_setup_page; + } + /* Case1: continue access */ + if ((self->i2c_client_p->addr == addr) && + (self->curr_page == page)) { + return 0; + } + self->i2c_client_p->addr = addr; + /* Case2: select lower page */ + if (page == -1) { + self->curr_page = page; + return 0; + } + /* Case3: select upper page */ + if (page >= 0) { + goto upper_common_setup_page; + } + /* Unexpected case */ + show_e = 1; + emsg = "Unexpected case"; + retval = -3; + goto err_common_setup_page; + +upper_common_setup_page: + if (i2c_smbus_write_byte_data(self->i2c_client_p, + VAL_TRANSVR_PAGE_SELECT_OFFSET, + page) < 0) { + emsg = "I2C R/W failure"; + retval = -2; + goto err_common_setup_page; + } + self->curr_page = page; + mdelay(VAL_TRANSVR_PAGE_SELECT_DELAY); + return 0; + +err_common_setup_page: + if (show_e) { + SWPS_INFO("%s: %s", __func__, emsg); + SWPS_INFO("%s: :0x%02x :%d :%d :%d\n", + __func__, addr, page, offset, len); + } + return retval; +} + +/* +static int +_common_setup_password(struct transvr_obj_s *self, + int addr, + int page, + int offs, + uint8_t pwd[4], + int show_e) { + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, 4, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_setup_password; + } + for (i=0; i<4; i++) { + err = i2c_smbus_write_byte_data(self->i2c_client_p, + (offs + i), + pwd[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_setup_password; + } + } + return 0; + +err_common_setup_password: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} +*/ + +static int +_common_update_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + uint8_t *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_uint8_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_uint8_attr; + } + buf[i] = err; + } + return 0; + +err_common_update_uint8_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_int_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_int_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_int_attr; + } + buf[i] = (int)err; + } + return 0; + +err_common_update_int_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_INT_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_string_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + char buf[], + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_string_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_string_attr; + } + buf[i] = (char)err; + } + return 0; + +err_common_update_string_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = 'e'; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + uint8_t update, + uint8_t *buf, + char *caller, + int show_e){ + int len = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + if ((*buf) == update){ + return 0; + } + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + err = i2c_smbus_write_byte_data(self->i2c_client_p, + offset, + update); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + (*buf) = update; + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_array(struct transvr_obj_s *self, + int addr, + int page, + int offs, + int len, + uint8_t update[], + uint8_t buf[], + char *caller, + int show_e){ + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + for (i=0; ii2c_client_p, + (offs + i), + update[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + buf[i] = update[i]; + } + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, emsg, caller, err, i); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_attr_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_id, + self->eeprom_map_p->page_id, + self->eeprom_map_p->offset_id, + self->eeprom_map_p->length_id, + &(self->id), + "_common_update_attr_id", + show_err); +} + + +static int +_common_update_attr_extended_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_ext_id, + self->eeprom_map_p->page_ext_id, + self->eeprom_map_p->offset_ext_id, + self->eeprom_map_p->length_ext_id, + &(self->ext_id), + "_common_update_attr_extended_id", + show_err); +} + + +static int +_common_update_attr_connector(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_connector, + self->eeprom_map_p->page_connector, + self->eeprom_map_p->offset_connector, + self->eeprom_map_p->length_connector, + &(self->connector), + "_common_update_attr_connector", + show_err); +} + + +static int +_common_update_attr_transvr_comp(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp, + self->eeprom_map_p->page_trancomp, + self->eeprom_map_p->offset_trancomp, + self->eeprom_map_p->length_trancomp, + self->transvr_comp, + "_common_update_attr_transvr_comp", + show_err); +} + + +static int +_common_update_attr_transvr_comp_ext(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp_ext, + self->eeprom_map_p->page_trancomp_ext, + self->eeprom_map_p->offset_trancomp_ext, + self->eeprom_map_p->length_trancomp_ext, + &(self->transvr_comp_ext), + "_common_update_attr_transvr_comp_ext", + show_err); +} + +static int +_common_update_attr_eeprom(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_eeprom, + self->eeprom_map_p->page_eeprom, + self->eeprom_map_p->offset_eeprom, + self->eeprom_map_p->length_eeprom, + self->eeprom, + "_common_update_attr_eeprom", + show_err); +} + +static int +_common_update_attr_vendor_name(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_name, + self->eeprom_map_p->page_vendor_name, + self->eeprom_map_p->offset_vendor_name, + self->eeprom_map_p->length_vendor_name, + self->vendor_name, + "_common_update_attr_vendor_name", + show_err); +} + + +static int +_common_update_attr_vendor_pn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_pn, + self->eeprom_map_p->page_vendor_pn, + self->eeprom_map_p->offset_vendor_pn, + self->eeprom_map_p->length_vendor_pn, + self->vendor_pn, + "_common_update_attr_vendor_pn", + show_err); +} + + +static int +_common_update_attr_vendor_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_rev, + self->eeprom_map_p->page_vendor_rev, + self->eeprom_map_p->offset_vendor_rev, + self->eeprom_map_p->length_vendor_rev, + self->vendor_rev, + "_common_update_attr_vendor_rev", + show_err); +} + + +static int +_common_update_attr_vendor_sn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_sn, + self->eeprom_map_p->page_vendor_sn, + self->eeprom_map_p->offset_vendor_sn, + self->eeprom_map_p->length_vendor_sn, + self->vendor_sn, + "_common_update_attr_vendor_sn", + show_err); +} + + +static int +_common_update_attr_br(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_br, + self->eeprom_map_p->page_br, + self->eeprom_map_p->offset_br, + self->eeprom_map_p->length_br, + &(self->br), + "_common_update_attr_br", + show_err); +} + + +static int +_common_update_attr_len_smf(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_smf, + self->eeprom_map_p->page_len_smf, + self->eeprom_map_p->offset_len_smf, + self->eeprom_map_p->length_len_smf, + &(self->len_smf), + "_common_update_attr_len_smf", + show_err); +} + + +static int +_common_update_attr_len_om1(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om1, + self->eeprom_map_p->page_len_om1, + self->eeprom_map_p->offset_len_om1, + self->eeprom_map_p->length_len_om1, + &(self->len_om1), + "_common_update_attr_len_om1", + show_err); +} + +static int +_common_update_attr_len_om2(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om2, + self->eeprom_map_p->page_len_om2, + self->eeprom_map_p->offset_len_om2, + self->eeprom_map_p->length_len_om2, + &(self->len_om2), + "_common_update_attr_len_om2", + show_err); +} + +static int +_common_update_attr_len_om3(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om3, + self->eeprom_map_p->page_len_om3, + self->eeprom_map_p->offset_len_om3, + self->eeprom_map_p->length_len_om3, + &(self->len_om3), + "_common_update_attr_len_om3", + show_err); +} + + +static int +_common_update_attr_len_om4(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om4, + self->eeprom_map_p->page_len_om4, + self->eeprom_map_p->offset_len_om4, + self->eeprom_map_p->length_len_om4, + &(self->len_om4), + "_common_update_attr_len_om4", + show_err); +} + + +static int +_common_update_attr_option(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_option, + self->eeprom_map_p->page_option, + self->eeprom_map_p->offset_option, + self->eeprom_map_p->length_option, + self->option, + "_common_update_attr_option", + show_err); +} + + +static int +_common_update_attr_comp_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_comp_rev, + self->eeprom_map_p->page_comp_rev, + self->eeprom_map_p->offset_comp_rev, + self->eeprom_map_p->length_comp_rev, + &(self->comp_rev), + "_common_update_attr_comp_rev", + show_err); +} + + +static int +_common_update_attr_diag_type(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_diag_type, + self->eeprom_map_p->page_diag_type, + self->eeprom_map_p->offset_diag_type, + self->eeprom_map_p->length_diag_type, + &(self->diag_type), + "_common_update_attr_diag_type", + show_err); +} + + +static int +_common_update_attr_wavelength(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_wavelength, + self->eeprom_map_p->page_wavelength, + self->eeprom_map_p->offset_wavelength, + self->eeprom_map_p->length_wavelength, + self->wavelength, + "_common_update_attr_wavelength", + show_err); +} + + +int +_common_get_option_value(struct transvr_obj_s *self, + int offset, + int bit_shift) { + /* SFP: + * - option[0] = A0h / 64 + * - option[1] = A0h / 65 + * QSFP: + * - option[0] = 00h / 193 + * - option[1] = 00h / 194 + * - option[2] = 00h / 195 + */ + return (self->option[offset] & (1 << bit_shift)); +} + +static int +_common_update_attr_manufacturing_date(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_manufacturing_date, + self->eeprom_map_p->page_manufacturing_date, + self->eeprom_map_p->offset_manufacturing_date, + self->eeprom_map_p->length_manufacturing_date, + self->manufacturing_date, + "_common_update_attr_manufacturing_date", + show_err); +} + +static int +_sfp_update_attr_eeprom_a0(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_eeprom_a0, + self->eeprom_map_p->page_eeprom_a0, + self->eeprom_map_p->offset_eeprom_a0, + self->eeprom_map_p->length_eeprom_a0, + self->eeprom_a0, + "_sfp_update_attr_eeprom_a0", + show_err); +} + +static int +_sfp_update_attr_len_sm(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_sm, + self->eeprom_map_p->page_len_sm, + self->eeprom_map_p->offset_len_sm, + self->eeprom_map_p->length_len_sm, + &(self->len_sm), + "_common_update_attr_len_sm", + show_err); +} + + +static int +_sfp_update_attr_rate_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_rate_id, + self->eeprom_map_p->page_rate_id, + self->eeprom_map_p->offset_rate_id, + self->eeprom_map_p->length_rate_id, + &(self->rate_id), + "_sfp_update_attr_rate_id", + show_err); +} + + +static int +_sfp_update_attr_soft_rs0(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + self->eeprom_map_p->length_soft_rs0, + &(self->soft_rs0), + "_sfp_update_attr_soft_rs0", + show_err); +} + + +static int +_sfp_update_attr_soft_rs1(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + self->eeprom_map_p->length_soft_rs1, + &(self->soft_rs1), + "_sfp_update_attr_soft_rs1", + show_err); +} + + +int +_sfp_is_diag_support(struct transvr_obj_s *self){ + + uint8_t bit_mask = 0xC0; /* 1100 0000 */ + uint8_t en_val = 0x40; /* 0100 0000 */ + uint8_t checkval = (self->diag_type & bit_mask); + + if (checkval == en_val) { + return 1; + } + return 0; +} + +static int +_sfp_update_attr_alarm_flag_byte_1(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_alarm_flag_byte_1, + self->eeprom_map_p->page_alarm_flag_byte_1, + self->eeprom_map_p->offset_alarm_flag_byte_1, + self->eeprom_map_p->length_alarm_flag_byte_1, + &(self->alarm_flag_byte_1), + "_sfp_update_attr_alarm_flag_byte_1", + show_err); +} + +static int +_sfp_update_attr_alarm_flag_byte_2(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_alarm_flag_byte_2, + self->eeprom_map_p->page_alarm_flag_byte_2, + self->eeprom_map_p->offset_alarm_flag_byte_2, + self->eeprom_map_p->length_alarm_flag_byte_2, + &(self->alarm_flag_byte_2), + "_sfp_update_attr_alarm_flag_byte_2", + show_err); +} + +static int +_sfp_update_attr_temp_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp_high_alarm_threshold, + self->eeprom_map_p->page_temp_high_alarm_threshold, + self->eeprom_map_p->offset_temp_high_alarm_threshold, + self->eeprom_map_p->length_temp_high_alarm_threshold, + self->temp_high_alarm_threshold, + "_sfp_update_attr_temp_high_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_temp_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp_low_alarm_threshold, + self->eeprom_map_p->page_temp_low_alarm_threshold, + self->eeprom_map_p->offset_temp_low_alarm_threshold, + self->eeprom_map_p->length_temp_low_alarm_threshold, + self->temp_low_alarm_threshold, + "_sfp_update_attr_temp_low_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_voltage_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage_high_alarm_threshold, + self->eeprom_map_p->page_voltage_high_alarm_threshold, + self->eeprom_map_p->offset_voltage_high_alarm_threshold, + self->eeprom_map_p->length_voltage_high_alarm_threshold, + self->voltage_high_alarm_threshold, + "_sfp_update_attr_voltage_high_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_voltage_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage_low_alarm_threshold, + self->eeprom_map_p->page_voltage_low_alarm_threshold, + self->eeprom_map_p->offset_voltage_low_alarm_threshold, + self->eeprom_map_p->length_voltage_low_alarm_threshold, + self->voltage_low_alarm_threshold, + "_sfp_update_attr_voltage_low_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_bias_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_bias_high_alarm_threshold, + self->eeprom_map_p->page_bias_high_alarm_threshold, + self->eeprom_map_p->offset_bias_high_alarm_threshold, + self->eeprom_map_p->length_bias_high_alarm_threshold, + self->bias_high_alarm_threshold, + "_sfp_update_attr_bias_high_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_bias_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_bias_low_alarm_threshold, + self->eeprom_map_p->page_bias_low_alarm_threshold, + self->eeprom_map_p->offset_bias_low_alarm_threshold, + self->eeprom_map_p->length_bias_low_alarm_threshold, + self->bias_low_alarm_threshold, + "_sfp_update_attr_bias_low_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_tx_power_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power_high_alarm_threshold, + self->eeprom_map_p->page_tx_power_high_alarm_threshold, + self->eeprom_map_p->offset_tx_power_high_alarm_threshold, + self->eeprom_map_p->length_tx_power_high_alarm_threshold, + self->tx_power_high_alarm_threshold, + "_sfp_update_attr_tx_power_high_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_tx_power_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power_low_alarm_threshold, + self->eeprom_map_p->page_tx_power_low_alarm_threshold, + self->eeprom_map_p->offset_tx_power_low_alarm_threshold, + self->eeprom_map_p->length_tx_power_low_alarm_threshold, + self->tx_power_low_alarm_threshold, + "_sfp_update_attr_tx_power_low_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_rx_power_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power_high_alarm_threshold, + self->eeprom_map_p->page_rx_power_high_alarm_threshold, + self->eeprom_map_p->offset_rx_power_high_alarm_threshold, + self->eeprom_map_p->length_rx_power_high_alarm_threshold, + self->rx_power_high_alarm_threshold, + "_sfp_update_attr_rx_power_high_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_rx_power_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power_low_alarm_threshold, + self->eeprom_map_p->page_rx_power_low_alarm_threshold, + self->eeprom_map_p->offset_rx_power_low_alarm_threshold, + self->eeprom_map_p->length_rx_power_low_alarm_threshold, + self->rx_power_low_alarm_threshold, + "_sfp_update_attr_rx_power_low_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_eeprom_a2(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_string_attr(self, + self->eeprom_map_p->addr_eeprom_a2, + self->eeprom_map_p->page_eeprom_a2, + self->eeprom_map_p->offset_eeprom_a2, + self->eeprom_map_p->length_eeprom_a2, + self->eeprom_a2, + "_sfp_update_attr_eeprom_a2", + show_err); +} + +static int +_sfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_sfp_update_attr_curr_temp", + show_err); +} + + +static int +_sfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_sfp_update_attr_curr_voltage", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_sfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_sfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_sfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_sfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_sfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_sfp_update_attr_rx_em", + show_err); +} + + +static int +_sfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_sfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_cdr(struct transvr_obj_s *self, + int show_err){ + if (self->type != TRANSVR_TYPE_QSFP_28){ + self->cdr = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + self->eeprom_map_p->length_cdr, + &(self->cdr), + "_common_update_attr_cdr", + show_err); +} + + +static int +_qsfg_update_attr_extbr(struct transvr_obj_s *self, + int show_err) { + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_extbr, + self->eeprom_map_p->page_extbr, + self->eeprom_map_p->offset_extbr, + self->eeprom_map_p->length_extbr, + &(self->extbr), + "_common_update_attr_extbr", + show_err); +} + +static int +_qsfp_update_attr_eeprom_page03(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_string_attr(self, + self->eeprom_map_p->addr_eeprom_page03, + self->eeprom_map_p->page_eeprom_page03, + self->eeprom_map_p->offset_eeprom_page03, + self->eeprom_map_p->length_eeprom_page03, + self->eeprom_page03, + "_qsfp_update_attr_eeprom_page03", + show_err); +} + +static int +_qsfp_is_diag_support(struct transvr_obj_s *self, + int diag_type) { + /* Input Parm: diag_type + * => 1 : temperature + * => 2 : voltage + * => 3 : tx relate + * => 4 : rx relate + */ + uint8_t mask_b2 = 0x04; /* 0000 0100 */ + uint8_t mask_b3 = 0x08; /* 0000 1000 */ + + switch (diag_type) { + case 1: /* temperature */ + case 2: /* voltage */ + /* Direct access target, because of spec not defined */ + return 1; + case 3: + case 4: + /* [Note] + * Due to lot of transceiver vendor defined it not rigorously and + * consider of general support, we seem it as supported if there + * are bit-2 OR bit-3 defined by transceiver vendor. + */ + if ( ((self->diag_type & mask_b2) == mask_b2 ) || + ((self->diag_type & mask_b3) == mask_b3 ) ){ + return 1; + } + return 0; + default: + SWPS_INFO("%s: undefined diag_type:%d\n", + __func__, diag_type); + break; + } + return 0; +} + + +int +_qsfp_is_implement_tx_disable(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-4 + */ + int byte = 2; + int bit = 4; + return _common_get_option_value(self, byte, bit); +} + + +int +_qsfp_is_implement_tx_fault(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-3 + */ + int byte = 2; + int bit = 3; + return _common_get_option_value(self, byte, bit); +} + +static int +_qsfp_update_attr_temp_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp_high_alarm_threshold, + self->eeprom_map_p->page_temp_high_alarm_threshold, + self->eeprom_map_p->offset_temp_high_alarm_threshold, + self->eeprom_map_p->length_temp_high_alarm_threshold, + self->temp_high_alarm_threshold, + "_qsfp_update_attr_temp_high_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_temp_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp_low_alarm_threshold, + self->eeprom_map_p->page_temp_low_alarm_threshold, + self->eeprom_map_p->offset_temp_low_alarm_threshold, + self->eeprom_map_p->length_temp_low_alarm_threshold, + self->temp_low_alarm_threshold, + "_qsfp_update_attr_temp_low_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_voltage_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage_high_alarm_threshold, + self->eeprom_map_p->page_voltage_high_alarm_threshold, + self->eeprom_map_p->offset_voltage_high_alarm_threshold, + self->eeprom_map_p->length_voltage_high_alarm_threshold, + self->voltage_high_alarm_threshold, + "_qsfp_update_attr_voltage_high_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_voltage_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage_low_alarm_threshold, + self->eeprom_map_p->page_voltage_low_alarm_threshold, + self->eeprom_map_p->offset_voltage_low_alarm_threshold, + self->eeprom_map_p->length_voltage_low_alarm_threshold, + self->voltage_low_alarm_threshold, + "_qsfp_update_attr_voltage_low_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_bias_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_bias_low_alarm_threshold, + self->eeprom_map_p->page_bias_low_alarm_threshold, + self->eeprom_map_p->offset_bias_low_alarm_threshold, + self->eeprom_map_p->length_bias_low_alarm_threshold, + self->bias_low_alarm_threshold, + "_qsfp_update_attr_bias_low_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_bias_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_bias_high_alarm_threshold, + self->eeprom_map_p->page_bias_high_alarm_threshold, + self->eeprom_map_p->offset_bias_high_alarm_threshold, + self->eeprom_map_p->length_bias_high_alarm_threshold, + self->bias_high_alarm_threshold, + "_qsfp_update_attr_bias_high_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_tx_power_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power_low_alarm_threshold, + self->eeprom_map_p->page_tx_power_low_alarm_threshold, + self->eeprom_map_p->offset_tx_power_low_alarm_threshold, + self->eeprom_map_p->length_tx_power_low_alarm_threshold, + self->tx_power_low_alarm_threshold, + "_qsfp_update_attr_tx_power_low_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_tx_power_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power_high_alarm_threshold, + self->eeprom_map_p->page_tx_power_high_alarm_threshold, + self->eeprom_map_p->offset_tx_power_high_alarm_threshold, + self->eeprom_map_p->length_tx_power_high_alarm_threshold, + self->tx_power_high_alarm_threshold, + "_qsfp_update_attr_tx_power_high_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_rx_power_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power_low_alarm_threshold, + self->eeprom_map_p->page_rx_power_low_alarm_threshold, + self->eeprom_map_p->offset_rx_power_low_alarm_threshold, + self->eeprom_map_p->length_rx_power_low_alarm_threshold, + self->rx_power_low_alarm_threshold, + "_qsfp_update_attr_rx_power_low_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_rx_power_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power_high_alarm_threshold, + self->eeprom_map_p->page_rx_power_high_alarm_threshold, + self->eeprom_map_p->offset_rx_power_high_alarm_threshold, + self->eeprom_map_p->length_rx_power_high_alarm_threshold, + self->rx_power_high_alarm_threshold, + "_qsfp_update_attr_rx_power_high_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_temp_alarm(struct transvr_obj_s *self, + int show_err){ + + int diag_type = 1; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp_alarm, + self->eeprom_map_p->page_temp_alarm, + self->eeprom_map_p->offset_temp_alarm, + self->eeprom_map_p->length_temp_alarm, + &(self->temp_alarm), + "_qsfp_update_attr_temp_alarm", + show_err); +} + +static int +_qsfp_update_attr_voltage_alarm(struct transvr_obj_s *self, + int show_err){ + + int diag_type = 2; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage_alarm, + self->eeprom_map_p->page_voltage_alarm, + self->eeprom_map_p->offset_voltage_alarm, + self->eeprom_map_p->length_voltage_alarm, + &(self->voltage_alarm), + "_qsfp_update_attr_voltage_alarm", + show_err); +} + +static int +_qsfp_update_attr_bias_alarm(struct transvr_obj_s *self, + int show_err){ + + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_bias_alarm, + self->eeprom_map_p->page_bias_alarm, + self->eeprom_map_p->offset_bias_alarm, + self->eeprom_map_p->length_bias_alarm, + self->bias_alarm, + "_qsfp_update_attr_bias_alarm", + show_err); +} + +static int +_qsfp_update_attr_tx_power_alarm(struct transvr_obj_s *self, + int show_err){ + + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power_alarm, + self->eeprom_map_p->page_tx_power_alarm, + self->eeprom_map_p->offset_tx_power_alarm, + self->eeprom_map_p->length_tx_power_alarm, + self->tx_power_alarm, + "_qsfp_update_attr_tx_power_alarm", + show_err); +} + +static int +_qsfp_update_attr_rx_power_alarm(struct transvr_obj_s *self, + int show_err){ + + int diag_type = 4; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power_alarm, + self->eeprom_map_p->page_rx_power_alarm, + self->eeprom_map_p->offset_rx_power_alarm, + self->eeprom_map_p->length_rx_power_alarm, + self->rx_power_alarm, + "_qsfp_update_attr_rx_power_alarm", + show_err); +} + +static int +_qsfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + int diag_type = 1; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_qsfp_update_attr_curr_temp", + show_err); +} + + +static int +_qsfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + int diag_type = 2; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_qsfp_update_attr_curr_voltage", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_qsfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_qsfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_qsfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 4; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_qsfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_qsfp_update_attr_soft_rx_los(struct transvr_obj_s *self, + int show_err){ + + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_los, + self->eeprom_map_p->page_rx_los, + self->eeprom_map_p->offset_rx_los, + self->eeprom_map_p->length_rx_los, + &(self->rx_los), + "_qsfp_update_attr_soft_rx_los", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_disable(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_disable(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_update_attr_soft_tx_disable", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_fault(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_fault(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_fault, + self->eeprom_map_p->page_tx_fault, + self->eeprom_map_p->offset_tx_fault, + self->eeprom_map_p->length_tx_fault, + &(self->tx_fault), + "_qsfp_update_attr_soft_tx_fault", + show_err); +} + + +static int +_qsfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_qsfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_rx_am(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + self->rx_am, + "_qsfp_update_attr_rx_am", + show_err); +} + + +static int +_qsfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_qsfp_update_attr_rx_em", + show_err); +} + + +int +_common_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = "err"; + + if (_common_update_attr_id(self, show_err) < 0) { + err_str = "_common_update_attr_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_extended_id(self, show_err) < 0) { + err_str = "_common_update_attr_extended_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_connector(self, show_err) < 0) { + err_str = "_common_update_attr_connector"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp_ext(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp_ext"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_name(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_name"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_pn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_pn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_rev(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_sn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_sn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_br(self, show_err) < 0) { + err_str = "_common_update_attr_br"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_smf(self, show_err) < 0) { + err_str = "_common_update_attr_len_smf"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om1(self, show_err) < 0) { + err_str = "_common_update_attr_len_om1"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om2(self, show_err) < 0) { + err_str = "_common_update_attr_len_om2"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om3(self, show_err) < 0) { + err_str = "_common_update_attr_len_om3"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om4(self, show_err) < 0) { + err_str = "_common_update_attr_len_om4"; + goto err_common_update_attr_all; + } + if (_common_update_attr_option(self, show_err) < 0) { + err_str = "_common_update_attr_option"; + goto err_common_update_attr_all; + } + if (_common_update_attr_comp_rev(self, show_err) < 0) { + err_str = "_common_update_attr_comp_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_diag_type(self, show_err) < 0) { + err_str = "_common_update_attr_diag_type"; + goto err_common_update_attr_all; + } + if (_common_update_attr_wavelength(self, show_err) < 0) { + err_str = "_common_update_attr_wavelength"; + goto err_common_update_attr_all; + } + return 0; + +err_common_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_sfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_len_sm(self, show_err) < 0) { + err_str = "_sfp_update_attr_len_sm"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_rate_id(self, show_err) < 0) { + err_str = "_sfp_update_attr_rate_id"; + goto err_sfp_update_attr_all; + } + if ((self->rate_id) > 0) { + if (_sfp_update_attr_soft_rs0(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs0"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_soft_rs1(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs1"; + goto err_sfp_update_attr_all; + } + } + return 0; + +err_sfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_qsfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_qsfp_update_attr_all; + } + if (_qsfg_update_attr_extbr(self, show_err) < 0) { + err_str = "_qsfg_update_attr_extbr"; + goto err_qsfp_update_attr_all; + } + if (self->type == TRANSVR_TYPE_QSFP_28) { + if (_qsfp_update_attr_cdr(self, 1) < 0) { + err_str = "_qsfp_update_attr_cdr"; + goto err_qsfp_update_attr_all; + } + } + return 0; + +err_qsfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +/* ========== Object functions for common type ========== + */ +int +_common_count_temp(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + int sign = 0; + int high = 0; + int low = 0; + int lmax = 8; + + /* Count high */ + sign = get_bit(high_byte,7); + SWP_BIT_CLEAR(high_byte, 7); + high = (int)high_byte; + + /* Count low */ + low = (get_bit(low_byte, 7) * 500); + low += (get_bit(low_byte, 6) * 250); + low += (get_bit(low_byte, 5) * 125); + low += (get_bit(low_byte, 4) * 62); + low = (low / 100); + /* Integrate High and Low */ + if (sign == 1) { + high = 0 - (127 - high); + low = 0 - low; + } + return snprintf(buf_p, lmax, "%d.%d\n", high, low); +} + + +int +_common_count_voltage(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note]: + * Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts. Practical + * considerations to be defined by transceiver manufacturer will + * tend to limit the actual bounds of the supply voltage measurement. + * Accuracy is vendor specific but must be better than 3% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. Note that in some transceivers, transmitter supply + * voltage and receiver supply voltage are isolated. In that case, + * only one supply is monitored. Refer to the device specification + * for more detail. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 100 uV (1mV=1000uV) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 Volt */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_tx_bias(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 2 uA (1mA=1000uA) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total*2) / 1000); + val_f = (((total*2) - (val_i*1000)) / 100); + /* Return Unit: 1 mA */ + return snprintf(buf_p, lmax, "%d.%01d\n", val_i, val_f); +} + + +int +_common_count_tx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_rx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_wavelength(struct transvr_obj_s *self, + uint8_t high_byte, + uint8_t low_byte) { + /* [Note] + * SFP : uint 1 um. + * QSFP: unit 0.05 um. + */ + int total = 0; + + total = transform_word_to_int(high_byte, low_byte); + switch (self->type) { + case TRANSVR_TYPE_SFP: + return total; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + return (total/20); + + default: + break; + } + return ERR_TRANSVR_UNDEFINED; +} + + +int +common_get_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_id, + "common_get_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->id; +} + + +int +common_get_ext_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "common_get_ext_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->ext_id; +} + + +int +common_get_connector(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_connector, + "common_get_connector"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->connector; +} + +int +common_get_eeprom(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_common_update_attr_eeprom, + "common_get_eeprom"); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + memset(buf, 0, self->eeprom_map_p->length_eeprom); + memcpy(buf, self->eeprom, self->eeprom_map_p->length_eeprom); + return self->eeprom_map_p->length_eeprom; +} + +int +common_get_vendor_name(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_name, + "common_get_vendor_name"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); +} + + +int +common_get_vendor_pn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_pn, + "common_get_vendor_pn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); +} + + +int +common_get_vendor_rev(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_rev, + "common_get_vendor_rev"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); +} + + +int +common_get_vendor_sn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_sn, + "common_get_vendor_sn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); +} + + +int +common_get_br(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return (int)self->br; + } + err = _check_by_mode(self, + &_common_update_attr_br, + "common_get_br"); + if (err < 0){ + return err; + } + /* Transform to INT to show error case */ + return (int)self->br; +} + + +int +common_get_len_smf(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_smf; + } + err = _check_by_mode(self, + &_common_update_attr_len_smf, + "common_get_len_smf"); + if (err < 0){ + return err; + } + return self->len_smf; +} + + +int +common_get_len_om1(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om1; + } + err = _check_by_mode(self, + &_common_update_attr_len_om1, + "common_get_len_om1"); + if (err < 0){ + return err; + } + return self->len_om1; +} + + +int +common_get_len_om2(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om2; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om2, + "common_get_len_om2"); + if (err < 0){ + return err; + } + return self->len_om2; +} + + +int +common_get_len_om3(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om3; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om3, + "common_get_len_om3"); + if (err < 0){ + return err; + } + return self->len_om3; +} + + +int +common_get_len_om4(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om4; + } + err = _check_by_mode(self, + &_common_update_attr_len_om4, + "common_get_len_om4"); + if (err < 0){ + return err; + } + return self->len_om4; +} + + +int +common_get_comp_extended(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp_ext, + "common_get_comp_extended"); + if (err_code < 0){ + return err_code; + } + return self->transvr_comp_ext; +} + + +int +common_get_comp_rev(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_comp_rev, + "common_get_comp_rev"); + if (err_code < 0){ + return err_code; + } + return self->comp_rev; +} + + +int +common_get_info(struct transvr_obj_s *self){ + + if (self->state != STATE_TRANSVR_CONNECTED) { + return self->state; + } + return self->info; +} + + +int +_common_get_if_lane(struct transvr_obj_s *self, + char *result){ + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_M_STR); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + memset(tmp_str, 0, LEN_TRANSVR_M_STR); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_M_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_M_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_M_STR); + } + if (i == 0) { + return EVENT_TRANSVR_TASK_FAIL; + } + return 0; +} + + +int +common_get_if_lane(struct transvr_obj_s *self, + char *buf_p){ + + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + if (self->ioexp_obj_p->state != STATE_IOEXP_NORMAL) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n", ERR_TRANSVR_ABNORMAL); + } + if (_common_get_if_lane(self, tmp_str) < 0) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n" ,ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%s\n" ,tmp_str); +} + +int +common_get_manufacturing_date(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 16; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_manufacturing_date, + "common_get_manufacturing_date"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ( self->manufacturing_date == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, lmax, "20%c%c-%c%c-%c%c %c%c\n", self->manufacturing_date[0], + self->manufacturing_date[1], + self->manufacturing_date[2], + self->manufacturing_date[3], + self->manufacturing_date[4], + self->manufacturing_date[5], + self->manufacturing_date[6], + self->manufacturing_date[7]); +} + +int +sfp_get_len_sm(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_len_sm, + "sfp_get_len_sm"); + if (err_code < 0){ + return err_code; + } + return self->len_sm; +} + + +int +sfp_get_rate_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_rate_id, + "sfp_get_rate_id"); + if (err_code < 0){ + return err_code; + } + return self->rate_id; +} + + +int +sfp_get_soft_rs0(struct transvr_obj_s *self){ + /* Note: + * SFP Soft Rate_Select Select [aka. "RS(0)"] address + * A2h, offset: 110, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs0, + "sfp_get_soft_rs0"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs0 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_soft_rs1(struct transvr_obj_s *self){ + /* Note: + * SFP Soft RS(1) Select address + * A2h, offset: 118, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs1, + "sfp_get_soft_rs1"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs1 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_temp, + "sfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +sfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_voltage, + "sfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +sfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_bias, + "sfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->curr_tx_bias[0], + self->curr_tx_bias[1], + buf_p); +} + + +int +sfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_power, + "sfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->curr_tx_power[0], + self->curr_tx_power[1], + buf_p); +} + + +int +sfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_rx_power, + "sfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->curr_rx_power[0], + self->curr_rx_power[1], + buf_p); +} + + +int +sfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->rx_em[0]); +} + + +int +sfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->tx_eq[0]); +} + + +int +_sfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: A0h / 36 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +__sfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* SFP Specification Compliance: A0h / 3-10 + * transvr_comp[0-7] = 3 - 10 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_get_comp_10g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[0] = address A0h / 3 + * + * 3 7: 10G Base-ER + * 3 6: 10GBASE-LRM + * 3 5: 10GBASE-LR + * 3 4: 10GBASE-SR + */ + int bitmask = 0xf0; /* 11110000 */ + return (__sfp_get_comp_attr(self, 0) & bitmask); +} + + +int +_sfp_get_comp_1g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[3] = address A0h / 6 + * + * 6 7: BASE-PX *3 + * 6 6: BASE-BX10 *3 + * 6 5: 100BASE-FX + * 6 4: 100BASE-LX/LX10 + * 6 3: 1000BASE-T + * 6 2: 1000BASE-CX + * 6 1: 1000BASE-LX *3 + * 6 0: 1000BASE-SX + */ + return __sfp_get_comp_attr(self, 3); +} + + +int +_sfp_get_cable_tech(struct transvr_obj_s *self) { + /* transvr_comp[5] = address A0h / 8 + * + * 8 3: Active Cable *8 + * 8 2: Passive Cable *8 + */ + int bitmask = 0x0c; /* 00001100 */ + return (__sfp_get_comp_attr(self, 5) & bitmask); +} + + +int +sfp_get_comp_eth_1(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_1"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_1g_eth_comp(self); +} + + +int +sfp_get_comp_eth_10(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_10"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_10g_eth_comp(self); +} + + +int +_sfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: A0h / 2 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Note] Optical and Cable Variants Specification Compliance (SFF-8472) + * [Addr] A0h, Bytes 60-61 + * [Note] For optical variants, as defined by having zero's in A0h Byte 8 + * bits 2 and 3, Bytes 60 and 61 denote nominal transmitter output + * wavelength at room temperature. 16 bit value with byte 60 as high + * order byte and byte 61 as low order byte. The laser wavelength is + * equal to the 16 bit integer value in nm. This field allows the user + * to read the laser wavelength directly, so it is not necessary to + * infer it from the Transceiver Codes A0h Bytes 3 to 10 (see Table + * 5-3). This also allows specification of wavelengths not covered + * in the Transceiver Codes, such as those used in coarse WDM systems. + * + * For passive and active cable variants, a value of 00h for both A0h + * Byte 60 and Byte 61 denotes laser wavelength or cable specification + * compliance is unspecified. + */ + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +int +sfp_get_1g_rj45_extphy_offset(struct transvr_obj_s *self, char *buf) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%02x\n", self->extphy_offset); +} + + +int +sfp_get_1g_rj45_extphy_reg(struct transvr_obj_s *self, char *buf) { + + int i = 0; + int ret = 0; + int retry = 3; + int delay = 200; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; ii2c_client_p, self->extphy_offset); + if (ret >=0) { + goto ok_sfp_get_1g_rj45_extphy_reg; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; + +ok_sfp_get_1g_rj45_extphy_reg: + ret = ((ret & 0x00ff) << 8) | ((ret & 0xff00) >> 8); + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%04x\n", ret); +} + +int +sfp_get_eeprom_a0(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_eeprom_a0, + "sfp_get_eeprom_a0"); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + memset(buf, 0, self->eeprom_map_p->length_eeprom_a0); + memcpy(buf, self->eeprom_a0, self->eeprom_map_p->length_eeprom_a0); + return self->eeprom_map_p->length_eeprom_a0; +} + +int +sfp_get_eeprom_a2(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_eeprom_a2, + "sfp_get_eeprom_a2"); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + memset(buf, 0, self->eeprom_map_p->length_eeprom_a2); + memcpy(buf, self->eeprom_a2, self->eeprom_map_p->length_eeprom_a2); + return self->eeprom_map_p->length_eeprom_a2; +} + +int +sfp_get_temp_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_temp_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,7)); + +} + +int +sfp_get_temp_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_temp_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,6)); + +} + +int +sfp_get_voltage_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_voltage_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,5)); + +} + +int +sfp_get_voltage_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_voltage_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,4)); + +} + +int +sfp_get_bias_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_bias_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,3)); + +} + +int +sfp_get_bias_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_bias_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,2)); + +} + +int +sfp_get_tx_power_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_tx_power_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,1)); + +} + +int +sfp_get_tx_power_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_tx_power_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,0)); + +} + +int +sfp_get_rx_power_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_2, + "sfp_get_rx_power_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_2 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-113 + * Rx Power Alarm Bit-7 + * Rx Power Alarm Bit-6 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_2 ,7)); + +} + +int +sfp_get_rx_power_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_2, + "sfp_get_rx_power_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_2 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-113 + * Rx Power Alarm Bit-7 + * Rx Power Alarm Bit-6 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_2 ,6)); + +} + +int +sfp_get_temp_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_temp_high_alarm_threshold, + "sfp_get_temp_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->temp_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->temp_high_alarm_threshold[0], + self->temp_high_alarm_threshold[1], + buf_p); +} + +int +sfp_get_temp_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_temp_low_alarm_threshold, + "sfp_get_temp_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->temp_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->temp_low_alarm_threshold[0], + self->temp_low_alarm_threshold[1], + buf_p); +} + +int +sfp_get_voltage_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_voltage_high_alarm_threshold, + "sfp_get_voltage_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->voltage_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->voltage_high_alarm_threshold[0], + self->voltage_high_alarm_threshold[1], + buf_p); +} + +int +sfp_get_voltage_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_voltage_low_alarm_threshold, + "sfp_get_voltage_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->voltage_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->voltage_low_alarm_threshold[0], + self->voltage_low_alarm_threshold[1], + buf_p); +} + +int +sfp_get_bias_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_bias_high_alarm_threshold, + "sfp_get_bias_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->bias_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->bias_high_alarm_threshold[0], + self->bias_high_alarm_threshold[1], + buf_p); +} + +int +sfp_get_bias_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_bias_low_alarm_threshold, + "sfp_get_bias_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->bias_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->bias_low_alarm_threshold[0], + self->bias_low_alarm_threshold[1], + buf_p); +} + +int +sfp_get_tx_power_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_tx_power_high_alarm_threshold, + "sfp_get_tx_power_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->tx_power_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->tx_power_high_alarm_threshold[0], + self->tx_power_high_alarm_threshold[1], + buf_p); +} + +int +sfp_get_tx_power_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_tx_power_low_alarm_threshold, + "sfp_get_tx_power_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->tx_power_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->tx_power_low_alarm_threshold[0], + self->tx_power_low_alarm_threshold[1], + buf_p); +} + +int +sfp_get_rx_power_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_rx_power_high_alarm_threshold, + "sfp_get_rx_power_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->rx_power_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->rx_power_high_alarm_threshold[0], + self->rx_power_high_alarm_threshold[1], + buf_p); +} + +int +sfp_get_rx_power_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_rx_power_low_alarm_threshold, + "sfp_get_rx_power_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->rx_power_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->rx_power_low_alarm_threshold[0], + self->rx_power_low_alarm_threshold[1], + buf_p); +} + +int +__qsfp_get_power_cls(struct transvr_obj_s *self, + int direct_access){ + + int err_code; + uint8_t detect_val; + + /* Detect and Update power class attribute */ + if (direct_access){ + err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_power_cls"); + } else { + err_code = self->ext_id; + } + if (err_code <0){ + return err_code; + } + if (err_code == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data */ + detect_val = self->ext_id; + SWP_BIT_CLEAR(detect_val, 2); /* Bit2: CDR RX present */ + SWP_BIT_CLEAR(detect_val, 3); /* Bit3: CDR TX present */ + SWP_BIT_CLEAR(detect_val, 4); /* Bit4: CLEI present */ + SWP_BIT_CLEAR(detect_val, 5); /* Bit5: reserved */ + /* Identify power class */ + switch (detect_val) { + case 0: /* Class_1: 00000000 */ + return 1; + case 64: /* Class_2: 01000000 */ + return 2; + case 128: /* Class_3: 10000000 */ + return 3; + case 192: /* Class_4: 11000000 */ + return 4; + case 1: /* Class_5: 00000001 */ + case 193: /* Class_5: 11000001 */ + return 5; + case 2: /* Class_6: 00000010 */ + case 194: /* Class_6: 11000010 */ + return 6; + case 3: /* Class_7: 00000011 */ + case 195: /* Class_7: 11000011 */ + return 7; + default: + break; + } + SWPS_INFO("%s: Detect undefined power class:%d\n", __func__, detect_val); + return ERR_TRANSVR_UNDEFINED; +} + + +int +qsfp_get_power_cls(struct transvr_obj_s *self) { + return __qsfp_get_power_cls(self, 1); +} + +int +qsfp_get_eeprom_page03(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_eeprom_page03, + "qsfp_get_eeprom_page03"); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + memset(buf, 0, self->eeprom_map_p->length_eeprom_page03); + memcpy(buf, self->eeprom_page03, self->eeprom_map_p->length_eeprom_page03); + return self->eeprom_map_p->length_eeprom_page03; +} + +int +__qsfp_get_cdr_present(struct transvr_obj_s *self, + int direct_access){ + + int retval; + int BIT_SHIFT = 2; + int BIT_MASK = 0x3; + + /* Detect and Update power class attribute */ + if (direct_access) { + retval = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_cdr_present"); + if (retval < 0){ + return retval; + } + } + retval = self->ext_id; + if (retval == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data and return */ + return (int)(retval >> BIT_SHIFT & BIT_MASK); +} + + +int +qsfp_get_cdr_present(struct transvr_obj_s *self) { + return __qsfp_get_cdr_present(self, 1); +} + + +int +qsfp_get_cdr(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + "qsfp_get_cdr"); + if (err_code <0){ + return err_code; + } + + return self->cdr; +} + + +int +__qsfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* QSFP Specification Compliance: 00h / 131-138 + * transvr_comp[0-7] = 131 - 138 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_get_comp_10_40_100_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[0] = address 00h / 131 + * + * 131 7: Extended: See section 6.3.23. The Extended Specification Compliance + * Codes are maintained in the Transceiver Management section of SFF- + * 8024. + * 131 6: 10GBASE-LRM + * 131 5: 10GBASE-LR + * 131 4: 10GBASE-SR + * 131 3: 40GBASE-CR4 + * 131 2: 40GBASE-SR4 + * 131 1: 40GBASE-LR4 + * 131 0: 40G Active Cable (XLPPI) + */ + return __qsfp_get_comp_attr(self, 0); +} + + +int +_qsfp_get_comp_sonet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 132 7-3: Reserved + * 132 2: OC 48, long reach + * 132 1: OC 48, intermediate reach + * 132 0: OC 48 short reach + */ + return __qsfp_get_comp_attr(self, 1); +} + + +int +_qsfp_get_comp_sas_sata(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 133 7: SAS 24.0 Gb/s + * 133 6: SAS 12.0 Gb/s + * 133 5: SAS 6.0 Gb/s + * 133 4: SAS 3.0 Gb/s + * 133 3-0: Reserved + */ + return __qsfp_get_comp_attr(self, 2); +} + + +int +_qsfp_get_comp_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 134 7-4: Reserved + * 134 3: 1000BASE-T + * 134 2: 1000BASE-CX + * 134 1: 1000BASE-LX + * 134 0: 1000BASE-SX + */ + return __qsfp_get_comp_attr(self, 3); +} + + +int +_qsfp_get_comp_fc_link_length(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 7: Very long distance (V) + * 135 6: Short distance (S) + * 135 5: Intermediate distance (I) + * 135 4: Long distance (L) + * 135 3: Medium (M) + */ + int mask = 0xFC; /* 11111100 */ + return (__qsfp_get_comp_attr(self, 4) & mask); +} + + +int +_qsfp_get_comp_fc_trans_tech(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 2: Reserved + * 135 1: Longwave laser (LC) + * 135 0: Electrical inter-enclosure (EL) + * + * 136 7: Electrical intra-enclosure + * 136 6: Shortwave laser w/o OFC (SN) + * 136 5: Shortwave laser w OFC (SL) + * 136 4: Longwave Laser (LL) + * 136 3-0: Reserved + * + * return value = [bit 8-15:addr 135][bit 0-7:addr 136] + */ + int mask_135 = 7; /* 00000111 */ + int val_135 = (__qsfp_get_comp_attr(self, 4) & mask_135); + int val_136 = __qsfp_get_comp_attr(self, 5); + return ((val_135 << 7) + val_136); +} + + +int +_qsfp_get_comp_fc_trans_media(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 137 7: Twin Axial Pair (TW) + * 137 6: Shielded Twisted Pair (TP) + * 137 5: Miniature Coax (MI) + * 137 4: Video Coax (TV) + * 137 3: Multi-mode 62.5 m (M6) + * 137 2: Multi-mode 50 m (M5) + * 137 1: Multi-mode 50 um (OM3) + * 137 0: Single Mode (SM) + */ + return __qsfp_get_comp_attr(self, 6); +} + + +int +_qsfp_get_comp_fc_speed(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 138 7: 1200 MBps (per channel) + * 138 6: 800 MBps + * 138 5: 1600 MBps (per channel) + * 138 4: 400 MBps + * 138 3: 3200 MBps (per channel) + * 138 2: 200 MBps + * 138 1: Extended: See section 6.3.23. The Extended Specification + * Compliance Codes are maintained in the Transceiver Management + * section of SFF-8024. + * 138 0: 100 MBps + */ + return __qsfp_get_comp_attr(self, 7); +} + + +int +_qsfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: 00h / 192 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_comp_eth(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_eth"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_ethernet(self); +} + + +int +qsfp_get_comp_10_40(struct transvr_obj_s *self) { + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_10_40"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_10_40_100_ethernet(self); +} + + +int +_qsfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: 00h / 130 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_temp, + "qsfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +qsfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_voltage, + "qsfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +qsfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->tx_eq[0], self->tx_eq[1]); +} + + +int +qsfp_get_transvr_rx_am(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_get_transvr_rx_am"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_am[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_am[0], self->rx_am[1]); +} + + +int +qsfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_em[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_em[0], self->rx_em[1]); +} + + +int +_qsfp_get_channel_diag(uint8_t *data_array, + int (*count_func)(uint8_t high_byte, uint8_t low_byte, char *buf_p), + char *ch_name, + char *result_p) { + int i, high, low; + int len_max = 128; + char ch_buf[4][16] = { DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL }; + + for (i=0; i<4; i++) { + high = (i*2); + low = ((i*2) + 1); + count_func(data_array[high], data_array[low], ch_buf[i]); + } + return snprintf(result_p, len_max, + "%s-%d:%s%s-%d:%s%s-%d:%s%s-%d:%s", + ch_name, 1, ch_buf[0], + ch_name, 2, ch_buf[1], + ch_name, 3, ch_buf[2], + ch_name, 4, ch_buf[3]); +} + + +int +qsfp_get_soft_rx_los(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_rx_los, + "qsfp_get_soft_rx_los"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->rx_los & mask)); +} + + +int +qsfp_get_soft_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_get_soft_tx_disable"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_disable & mask)); +} + + +int +qsfp_get_soft_tx_fault(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_fault, + "qsfp_get_soft_tx_fault"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_fault & mask)); +} + + +int +qsfp_get_auto_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + if (self->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "%d\n", ERR_TRANSVR_FUNC_DISABLE); + } + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "0x%02x\n", self->auto_tx_disable); +} + + +int +qsfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_bias, + "qsfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _qsfp_get_channel_diag(self->curr_tx_bias, + _common_count_tx_bias, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_power, + "qsfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_tx_power, + _common_count_tx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_rx_power, + "qsfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_rx_power, + _common_count_rx_power, + ch_name, + buf_p); +} + +int +qsfp_get_temp_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_temp_high_alarm_threshold, + "qsfp_get_temp_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->temp_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->temp_high_alarm_threshold[0], + self->temp_high_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_temp_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_temp_low_alarm_threshold, + "qsfp_get_temp_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->temp_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->temp_low_alarm_threshold[0], + self->temp_low_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_voltage_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_voltage_high_alarm_threshold, + "qsfp_get_voltage_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->voltage_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->voltage_high_alarm_threshold[0], + self->voltage_high_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_voltage_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_voltage_low_alarm_threshold, + "qsfp_get_voltage_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->voltage_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->voltage_low_alarm_threshold[0], + self->voltage_low_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_bias_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_bias_low_alarm_threshold, + "qsfp_get_bias_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->bias_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->bias_low_alarm_threshold[0], + self->bias_low_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_bias_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_bias_high_alarm_threshold, + "qsfp_get_bias_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->bias_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->bias_high_alarm_threshold[0], + self->bias_high_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_tx_power_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_tx_power_low_alarm_threshold, + "qsfp_get_tx_power_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->tx_power_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->tx_power_low_alarm_threshold[0], + self->tx_power_low_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_tx_power_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_tx_power_high_alarm_threshold, + "qsfp_get_tx_power_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->tx_power_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->tx_power_high_alarm_threshold[0], + self->tx_power_high_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_rx_power_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_rx_power_low_alarm_threshold, + "qsfp_get_rx_power_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->rx_power_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->rx_power_low_alarm_threshold[0], + self->rx_power_low_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_rx_power_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_rx_power_high_alarm_threshold, + "qsfp_get_rx_power_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->rx_power_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->rx_power_high_alarm_threshold[0], + self->rx_power_high_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_temp_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_temp_alarm, + "qsfp_get_temp_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ( self->temp_alarm == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP Temp Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-6 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + */ + return snprintf(buf_p, lmax, "%d\n", get_bit( self->temp_alarm ,7)); + +} + +int +qsfp_get_temp_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_temp_alarm, + "qsfp_get_temp_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ( self->temp_alarm == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP Temp Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-6 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + */ + return snprintf(buf_p, lmax, "%d\n", get_bit( self->temp_alarm ,6)); + +} + +int +qsfp_get_voltage_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_voltage_alarm, + "qsfp_get_voltage_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ( self->voltage_alarm == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP voltage Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-7 + * voltage High Alarm Bit-7 + * voltage Low Alarm Bit-6 + */ + return snprintf(buf_p, lmax, "%d\n", get_bit( self->voltage_alarm ,7)); + +} + +int +qsfp_get_voltage_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_voltage_alarm, + "qsfp_get_voltage_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ( self->voltage_alarm == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP voltage Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-7 + * voltage High Alarm Bit-7 + * voltage Low Alarm Bit-6 + */ + return snprintf(buf_p, lmax, "%d\n", get_bit( self->voltage_alarm ,6)); + +} + +int +qsfp_get_rx_power_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int len_max = 128; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_rx_power_alarm, + "qsfp_get_rx_power_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->rx_power_alarm[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP RX Power Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-9~10 + * RX1 Power High Alarm Byte-9 Bit-7 + * RX1 Power Low Alarm Byte-9 Bit-6 + * RX2 Power High Alarm Byte-9 Bit-3 + * RX2 Power Low Alarm Byte-9 Bit-2 + * RX3 Power High Alarm Byte-10 Bit-7 + * RX3 Power Low Alarm Byte-10 Bit-6 + * RX4 Power High Alarm Byte-10 Bit-3 + * RX4 Power Low Alarm Byte-10 Bit-2 + */ + return snprintf(buf_p, len_max, "%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n", + ch_name, 1, get_bit( self->rx_power_alarm[0] ,7), + ch_name, 2, get_bit( self->rx_power_alarm[0] ,3), + ch_name, 3, get_bit( self->rx_power_alarm[1] ,7), + ch_name, 4, get_bit( self->rx_power_alarm[1] ,3)); + +} + +int +qsfp_get_rx_power_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int len_max = 128; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_rx_power_alarm, + "qsfp_get_rx_power_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->rx_power_alarm[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP RX Power Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-9~10 + * RX1 Power High Alarm Byte-9 Bit-7 + * RX1 Power Low Alarm Byte-9 Bit-6 + * RX2 Power High Alarm Byte-9 Bit-3 + * RX2 Power Low Alarm Byte-9 Bit-2 + * RX3 Power High Alarm Byte-10 Bit-7 + * RX3 Power Low Alarm Byte-10 Bit-6 + * RX4 Power High Alarm Byte-10 Bit-3 + * RX4 Power Low Alarm Byte-10 Bit-2 + */ + return snprintf(buf_p, len_max, "%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n", + ch_name, 1, get_bit( self->rx_power_alarm[0] ,6), + ch_name, 2, get_bit( self->rx_power_alarm[0] ,2), + ch_name, 3, get_bit( self->rx_power_alarm[1] ,6), + ch_name, 4, get_bit( self->rx_power_alarm[1] ,2)); + +} + +int +qsfp_get_bias_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int len_max = 128; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_rx_power_alarm, + "qsfp_get_bias_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->bias_alarm[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP TX bias Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-11~12 + * TX1 bias High Alarm Byte-11 Bit-7 + * TX1 bias Low Alarm Byte-11 Bit-6 + * TX2 bias High Alarm Byte-11 Bit-3 + * TX2 bias Low Alarm Byte-11 Bit-2 + * TX3 bias High Alarm Byte-12 Bit-7 + * TX3 bias Low Alarm Byte-12 Bit-6 + * TX4 bias High Alarm Byte-12 Bit-3 + * TX4 bias Low Alarm Byte-12 Bit-2 + */ + return snprintf(buf_p, len_max, "%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n", + ch_name, 1, get_bit( self->bias_alarm[0] ,7), + ch_name, 2, get_bit( self->bias_alarm[0] ,3), + ch_name, 3, get_bit( self->bias_alarm[1] ,7), + ch_name, 4, get_bit( self->bias_alarm[1] ,3)); + +} + +int +qsfp_get_bias_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int len_max = 128; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_rx_power_alarm, + "qsfp_get_bias_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->bias_alarm[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP TX bias Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-11~12 + * TX1 bias High Alarm Byte-11 Bit-7 + * TX1 bias Low Alarm Byte-11 Bit-6 + * TX2 bias High Alarm Byte-11 Bit-3 + * TX2 bias Low Alarm Byte-11 Bit-2 + * TX3 bias High Alarm Byte-12 Bit-7 + * TX3 bias Low Alarm Byte-12 Bit-6 + * TX4 bias High Alarm Byte-12 Bit-3 + * TX4 bias Low Alarm Byte-12 Bit-2 + */ + return snprintf(buf_p, len_max, "%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n", + ch_name, 1, get_bit( self->bias_alarm[0] ,6), + ch_name, 2, get_bit( self->bias_alarm[0] ,2), + ch_name, 3, get_bit( self->bias_alarm[1] ,6), + ch_name, 4, get_bit( self->bias_alarm[1] ,2)); + +} + +int +qsfp_get_tx_power_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int len_max = 128; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_tx_power_alarm, + "qsfp_get_tx_power_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->tx_power_alarm[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP TX Power Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-13~14 + * TX1 Power High Alarm Byte-13 Bit-7 + * TX1 Power Low Alarm Byte-13 Bit-6 + * TX2 Power High Alarm Byte-13 Bit-3 + * TX2 Power Low Alarm Byte-13 Bit-2 + * TX3 Power High Alarm Byte-14 Bit-7 + * TX3 Power Low Alarm Byte-14 Bit-6 + * TX4 Power High Alarm Byte-14 Bit-3 + * TX4 Power Low Alarm Byte-14 Bit-2 + */ + return snprintf(buf_p, len_max, "%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n", + ch_name, 1, get_bit( self->tx_power_alarm[0] ,7), + ch_name, 2, get_bit( self->tx_power_alarm[0] ,3), + ch_name, 3, get_bit( self->tx_power_alarm[1] ,7), + ch_name, 4, get_bit( self->tx_power_alarm[1] ,3)); + +} + +int +qsfp_get_tx_power_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int len_max = 128; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_tx_power_alarm, + "qsfp_get_tx_power_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->tx_power_alarm[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP TX Power Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-13~14 + * TX1 Power High Alarm Byte-13 Bit-7 + * TX1 Power Low Alarm Byte-13 Bit-6 + * TX2 Power High Alarm Byte-13 Bit-3 + * TX2 Power Low Alarm Byte-13 Bit-2 + * TX3 Power High Alarm Byte-14 Bit-7 + * TX3 Power Low Alarm Byte-14 Bit-6 + * TX4 Power High Alarm Byte-14 Bit-3 + * TX4 Power Low Alarm Byte-14 Bit-2 + */ + return snprintf(buf_p, len_max, "%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n", + ch_name, 1, get_bit( self->tx_power_alarm[0] ,6), + ch_name, 2, get_bit( self->tx_power_alarm[0] ,2), + ch_name, 3, get_bit( self->tx_power_alarm[1] ,6), + ch_name, 4, get_bit( self->tx_power_alarm[1] ,2)); + +} + +int +qsfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Desc] Wavelength or Copper Cable Attenuation (SFF-8636) + * [Addr] 00h 186-187 + * [Note] + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is + * a 16-bit hex value with Byte 186 as high order byte and Byte 187 as + * low order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. + * If the free side device is identified as copper cable these registers will + * be used to define the cable attenuation. An indication of 0 dB attenuation + * refers to the case where the attenuation is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +/* Public Function for Setup Features + */ +static int +__sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + uint8_t update_val = (*attr_p); + + switch (input_val) { + case 0: + SWP_BIT_CLEAR(update_val, bit_shift); + break; + case 1: + SWP_BIT_SET(update_val, bit_shift); + break; + default: + retval = ERR_TRANSVR_UNEXCPT; + err_code = ERR_TRANSVR_UNEXCPT; + err_msg = "Exception occurs"; + goto err_private_sfp_set_soft_rs_1; + } + err_code = _common_set_uint8_attr(self, + address, + page, + offset, + update_val, + attr_p, + caller, + show_err); + if (err_code < 0) { + retval = err_code; + err_msg = "Write data via i2c fail!"; + goto err_private_sfp_set_soft_rs_1; + } + (*attr_p) = update_val; + return 0; + +err_private_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +static int +_sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + + /* Check input value */ + if ((input_val != 0) && (input_val != 1)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + switch (err_code) { + case 0: + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "Not support this feature"; + break; + case ERR_TRANSVR_UNINIT: + retval = ERR_TRANSVR_UNINIT; + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + retval = ERR_TRANSVR_UNPLUGGED; + err_msg = "Transceiver unplugged!"; + break; + default: + retval = err_code; + err_msg = "Check Rate_ID fail!"; + break; + } + goto err_common_sfp_set_soft_rs_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + attr_update_func, + caller); + if ( (err_code < 0) || + ((*attr_p) == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Generate and update value */ + return __sfp_set_soft_rs(self, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + +err_common_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +sfp_set_soft_rs0(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(0)"] address + * A2h, offset: 110, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + bit_shift, + &_sfp_update_attr_soft_rs0, + &(self->soft_rs0), + "sfp_set_soft_rs0", + show_err); +} + + +int +sfp_set_soft_rs1(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(1)"] address + * A2h, offset: 118, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + bit_shift, + &_sfp_update_attr_soft_rs1, + &(self->soft_rs1), + "sfp_set_soft_rs1", + show_err); +} + + +int +__sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_tx_eq; + } + setv = (uint8_t)input; + if (self->tx_eq[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + setv, + &(self->tx_eq[0]), + "_sfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_tx_eq; + } + return 0; + +err_sfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; itx_eq[0]; + if (_sfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if (self->tx_eq[0] == tmp){ + return 0; + } + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +sfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_tx_eq(self, input, 1); +} + + +int +__sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_rx_em; + } + setv = (uint8_t)input; + if (self->rx_em[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + setv, + &(self->rx_em[0]), + "_sfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_rx_em; + } + return 0; + +err_sfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; irx_em[0]; + if (_sfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if (self->rx_em[0] == tmp){ + return 0; + } + } + return -1; +} + + +int +sfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_rx_em(self, input, 1); +} + + +int +sfp_set_1g_rj45_extphy_offset(struct transvr_obj_s *self, + int input) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xff)) { + return ERR_TRANSVR_BADINPUT; + } + self->extphy_offset = (uint8_t)input; + return 0; +} + + +int +sfp_set_1g_rj45_extphy_reg(struct transvr_obj_s *self, + int input) { + + int i = 0; + int retry = 3; + int delay = 200; + uint16_t tmp = 0; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xffff)) { + return ERR_TRANSVR_BADINPUT; + } + tmp = ((input & 0x00ff) << 8) | ((input & 0xff00) >> 8); + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; i<=retry; i++) { + if (i2c_smbus_write_word_data(self->i2c_client_p, + self->extphy_offset, + tmp) >= 0) { + return 0; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; +} + + +static int +__qsfp_set_cdr(struct transvr_obj_s *self, + int input_val, + int show_err) { + + uint8_t update_val; + int CDR_FEATURE_SUPPORTED = 0x3; + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_name = "__qsfp_set_cdr"; + + /* Check input value */ + if ((input_val < 0) || (input_val > 0xff)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_qsfp_set_cdr_1; + } + update_val = (uint8_t)input_val; + /* Check CDR supported by transceiver */ + err_code = qsfp_get_cdr_present(self); + if (err_code < 0) { + retval = err_code; + switch (err_code) { + case ERR_TRANSVR_UNINIT: + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + err_msg = "Transceiver unplugged!"; + break; + default: + err_msg = "Check CDR present fail!"; + break; + } + goto err_qsfp_set_cdr_1; + } + if (err_code != CDR_FEATURE_SUPPORTED) { + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "This transceiver not support CDR!"; + goto err_qsfp_set_cdr_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + func_name); + if ( (err_code < 0) || + (self->cdr == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_qsfp_set_cdr_1; + } + /* Write input value to transceiver */ + return _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + update_val, + &(self->cdr), + func_name, + show_err); + +err_qsfp_set_cdr_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +qsfp_set_cdr(struct transvr_obj_s *self, + int input_val) { + return __qsfp_set_cdr(self, input_val, 1); +} + + +int +qsfp_set_soft_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int show_err = 1; + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + int update_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_soft_tx_disable"); + if (retval < 0) { + snprintf(err_msg, 63, "Not ready. err:%d", retval); + goto err_qsfp_set_soft_tx_disable; + } + if ((input_val > in_max) || + (input_val < in_min) ){ + retval = ERR_TRANSVR_BADINPUT; + snprintf(err_msg, 63, "Input value:%d incorrect!", input_val); + goto err_qsfp_set_soft_tx_disable; + } + if ((self->tx_disable & 0x0f) == input_val) { + return 0; + } + update_val = ((self->tx_disable & 0xf0) & input_val); + retval = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + input_val, + &(self->tx_disable), + "qsfp_set_tx_disable", + show_err); + if (retval < 0) { + snprintf(err_msg, 63, "_common_set_uint8_attr:%d fail!", retval); + goto err_qsfp_set_soft_tx_disable; + } + return 0; + +err_qsfp_set_soft_tx_disable: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return retval; +} + + +int +_qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + uint8_t update) { + + uint8_t tx_enable = 0x0; + int show_e = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Handle timing issues */ + if (update != tx_enable) { + /* Note: + * Because there are some txvr has timing issues, + * therefore we need to execute reset cycle first. + * (enable -> other settings) + */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + tx_enable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set reset value fail"; + goto err_qsfp_set_auto_tx_disable; + } + mdelay(10); + } + /* Setup target value */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->auto_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set target value fail"; + goto err_qsfp_set_auto_tx_disable; + } + /* Check and update */ + err = _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C get value fail"; + goto err_qsfp_set_auto_tx_disable; + } + if (self->tx_disable != update) { + emsg = "data not become effective"; + goto err_qsfp_set_auto_tx_disable; + } + return 0; + +err_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s\n", + __func__, emsg, self->swp_name); + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Update settings*/ + if (input_val == VAL_TRANSVR_FUNCTION_DISABLE) { + emsg = "User disable auto tx_disable"; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + goto out_qsfp_set_auto_tx_disable; + } + if ((input_val > in_max) || (input_val < in_min) ){ + SWPS_INFO("%s: Input value:%d incorrect! :%s\n", + __func__, input_val, self->swp_name); + return ERR_TRANSVR_BADINPUT; + } + self->auto_tx_disable = input_val; + /* Check current soft tx_disable */ + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_auto_tx_disable"); + switch (retval) { + case 0: + break; + case ERR_TRANSVR_UNPLUGGED: + emsg = "Doesn't need to update"; + goto out_qsfp_set_auto_tx_disable; + default: + SWPS_INFO("%s: setup fail :%d :%s\n", + __func__, retval, self->swp_name); + return retval; + } + return _qsfp_set_auto_tx_disable(self, input_val); + +out_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s :%d\n :%d", + __func__, emsg, self->swp_name, input_val, retval); + return 0; +} + + +int +__qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_tx_eq; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->tx_eq[0] == setv[0]) && + (self->tx_eq[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + setv, + self->tx_eq, + "_qsfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_tx_eq; + } + return 0; + +err_qsfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; itx_eq[0]; + tmp[1] = self->tx_eq[1]; + if (_qsfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if ((self->tx_eq[0] == tmp[0]) && + (self->tx_eq[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_tx_eq(self, input, 1); +} + + +int +__qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_am; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_am[0] == setv[0]) && + (self->rx_am[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + setv, + self->rx_am, + "_qsfp_set_rx_am", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_am; + } + return 0; + +err_qsfp_set_rx_am: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_am[0]; + tmp[1] = self->rx_am[1]; + if (_qsfp_update_attr_rx_am(self, show_e) < 0){ + continue; + } + if ((self->rx_am[0] == tmp[0]) && + (self->rx_am[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_am(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_set_rx_am"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_am(self, input, 1); +} + + +int +__qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_em; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_em[0] == setv[0]) && + (self->rx_em[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + setv, + self->rx_em, + "_qsfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_em; + } + return 0; + +err_qsfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_em[0]; + tmp[1] = self->rx_em[1]; + if (_qsfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if ((self->rx_em[0] == tmp[0]) && + (self->rx_em[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_em(self, input, 1); +} + + +int +common_transvr_dump(struct transvr_obj_s* self){ + + char *type_name = "Undefined"; + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + switch (self->type) { + case TRANSVR_TYPE_SFP: + type_name = STR_TRANSVR_SFP; + break; + case TRANSVR_TYPE_QSFP: + type_name = STR_TRANSVR_QSFP; + break; + case TRANSVR_TYPE_QSFP_PLUS: + type_name = STR_TRANSVR_QSFP_PLUS; + break; + case TRANSVR_TYPE_QSFP_28: + type_name = STR_TRANSVR_QSFP28; + break; + case TRANSVR_TYPE_FAKE: + type_name = "FAKE"; + goto ok_common_transvr_dump; + case TRANSVR_TYPE_UNPLUGGED: + type_name = "UNPLUGGED"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_INCONSISTENT: + type_name = "INCONSISTENT"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_ERROR: + type_name = "ERROR"; + goto err_common_transvr_dump; + + default: + type_name = "UNEXPECTED"; + goto err_common_transvr_dump; + } + printk(KERN_INFO "[SWPS] Dump %s information:\n", self->swp_name); + printk(KERN_INFO " |- :%s\n", type_name); + printk(KERN_INFO " |- :%s\n", self->vendor_name); + printk(KERN_INFO " |- :%s\n", self->vendor_pn); + printk(KERN_INFO " |- :%s\n", self->vendor_rev); + printk(KERN_INFO " |- :%s\n", self->vendor_sn); + printk(KERN_INFO " |- :0x%02x\n", self->br); + printk(KERN_INFO " |- :0x%02x\n", self->comp_rev); + printk(KERN_INFO " |- :%d\n", self->len_om1); + printk(KERN_INFO " |- :%d\n", self->len_om2); + printk(KERN_INFO " |- :%d\n", self->len_om3); + printk(KERN_INFO " |- :%d\n", self->len_om4); + return 0; + +ok_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return 0; + +err_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return -1; +} + + +int +sfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_sm); + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :0x%02x\n", self->rate_id); + return 0; +} + + +int +qsfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :Class_%d\n", __qsfp_get_power_cls(self, 0)); + return 0; +} + + +int +fake_transvr_dump(struct transvr_obj_s* self) { + + printk(KERN_INFO "[SWPS] Dump transceiver information: %s\n", self->swp_name); + printk(KERN_INFO " |- :FAKE\n"); + printk(KERN_INFO " |- :FAKE_VENDER_NAME\n"); + printk(KERN_INFO " |- :FAKE_VENDER_PN\n"); + printk(KERN_INFO " |- :FAKE_VENDER_REV\n"); + printk(KERN_INFO " |- :FAKE_VENDER_SN\n"); + printk(KERN_INFO " |- :0x99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " '- :0x99\n"); + return 0; +} + + +/* ========== Object functions for fake type ========== + */ +int +fake_transvr_update(struct transvr_obj_s *self, + int show_err){ + self->state = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +fake_get_binary(struct transvr_obj_s *self){ + return 1; +} + +int +fake_get_int(struct transvr_obj_s *self){ + return 99; +} + + +int +fake_get_hex(struct transvr_obj_s *self){ + return 0x0f; +} + + +int +fake_get_str(struct transvr_obj_s *self, char *buf) { + return snprintf(buf, 16, "fake_get_str\n"); +} + + +int +fake_set_int(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: %d\n", __func__, input); + return 0; +} + + +int +fake_set_hex(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: 0x%02x\n", __func__, input); + return 0; +} + + +/* ========== Object functions for unsupported ========== + */ +int +unsupported_get_func(struct transvr_obj_s *self){ + return ERR_TRANSVR_NOTSUPPORT; +} + + +int +unsupported_get_func2(struct transvr_obj_s *self, + char *buf_p) { + int len = snprintf(buf_p, 8, "%d\n", ERR_TRANSVR_NOTSUPPORT); + return len; +} + + +int +unsupported_set_func(struct transvr_obj_s *self, + int input_val){ + return ERR_TRANSVR_NOTSUPPORT; +} + + + +/* ========== Object functions for long term task ========== + * + * [Note] + * SWPS transceiver worker is likely the green-thread (coroutine). + * Due to resource and performance considerations. SWPS run all + * features in one kthread at the same time, and handle by it self. + */ + +/* For Transceiver Task Handling + */ +static struct transvr_worker_s * +transvr_task_get(struct transvr_obj_s *self, + char *func_name) { + + struct transvr_worker_s *curr_p = self->worker_p; + + while(curr_p != NULL){ + if (strcmp((curr_p->func_name), func_name) == 0 ) { + return curr_p; + } + curr_p = curr_p->next_p; + } + return NULL; +} + + +static struct transvr_worker_s* +transvr_task_creat(struct transvr_obj_s *self, + int (*main_task)(struct transvr_worker_s *task), + int (*post_task)(struct transvr_worker_s *task), + char *caller) { + + struct transvr_worker_s *task_p = NULL; + struct transvr_worker_s *curr_p = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check task not exist */ + task_p = transvr_task_get(self, caller); + if (task_p) { + snprintf(err_msg, sizeof(err_msg), "Task already created!"); + goto err_transvr_task_creat; + } + /* Create task worker */ + task_p = kzalloc(sizeof(struct transvr_worker_s), GFP_KERNEL); + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_transvr_task_creat; + } + /* Setup task data */ + task_p->transvr_p = self; + task_p->next_p = NULL; + task_p->trigger_time = 0; + task_p->retry = 1; + task_p->state = STATE_T_TASK_INIT; + task_p->main_task = main_task; + task_p->post_task = post_task; + task_p->p_data = NULL; + snprintf(task_p->func_name, sizeof(task_p->func_name), "%s", caller); + /* Setup Link List */ + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p->next_p != NULL) { + curr_p = curr_p->next_p; + } + curr_p->next_p = task_p; + task_p->pre_p = curr_p; + } else { + self->worker_p = task_p; + task_p->pre_p = NULL; + } + return task_p; + +err_transvr_task_creat: + SWPS_ERR("%s: %s :%s :%s\n", + __func__, err_msg, caller, self->swp_name); + return NULL; +} + + +static void +transvr_task_free_one(struct transvr_worker_s *task_p){ + + struct transvr_worker_s *pre_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (task_p) { + pre_p = task_p->pre_p; + next_p = task_p->next_p; + + if ((pre_p) && (next_p)) { + pre_p->next_p = next_p; + next_p->pre_p = pre_p; + + } else if ((!pre_p) && (next_p)) { + next_p->pre_p = NULL; + + } else if ((pre_p) && (!next_p)) { + pre_p->next_p = NULL; + + } else if ((!pre_p) && (!next_p)) { + task_p->transvr_p->worker_p = NULL; + } else { + SWPS_ERR("%s: Unexcept case!\n :%s", + __func__, task_p->transvr_p->swp_name); + } + kfree(task_p->p_data); + kfree(task_p); + } +} + + +static void +transvr_task_free_all(struct transvr_obj_s *self) { + + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p) { + next_p = curr_p->next_p; + transvr_task_free_one(curr_p); + curr_p = next_p; + } + self->worker_p = NULL; + } +} + + +static void +transvr_cache_free_all(struct transvr_obj_s *self) { + + memset(self->vendor_name, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_rev, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_pn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_sn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + self->extphy_offset = 0; +} + +static int +_transvr_task_run_main(struct transvr_worker_s *task_p) { + + int retval = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "main_task is NULL!"); + goto main_transvr_task_err; + } + if ((task_p->trigger_time) == 0){ + goto main_transvr_task_run; + } + if (time_before(jiffies, task_p->trigger_time)){ + goto main_transvr_task_wait; + } + goto main_transvr_task_run; + +main_transvr_task_run: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + task_p->retry -= 1; + } + retval = task_p->main_task(task_p); + if (retval < 0) { + if (task_p->retry > 0) { + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + } + goto main_transvr_task_identify; + +main_transvr_task_identify: + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + + case EVENT_TRANSVR_TASK_DONE: + task_p->state = STATE_T_TASK_DONE; + return EVENT_TRANSVR_TASK_DONE; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + +main_transvr_task_wait: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + +main_transvr_task_err: + if(task_p) { + task_p->state = STATE_T_TASK_FAIL; + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, retval, task_p->transvr_p->swp_name); + } else { + SWPS_INFO("%s: %s :%d\n", + __func__, err_msg, retval); + } + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_transvr_task_run_post(struct transvr_worker_s *task_p) { + + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if ((task_p->post_task) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + switch (task_p->state) { + case STATE_T_TASK_WAIT: + case STATE_T_TASK_INIT: + goto post_transvr_task_wait; + + case STATE_T_TASK_DONE: + case STATE_T_TASK_FAIL: + goto post_transvr_task_run; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Unexcept task state"); + goto post_transvr_task_err; + +post_transvr_task_run: + task_p->post_task(task_p); + return EVENT_TRANSVR_TASK_DONE; + +post_transvr_task_wait: + return EVENT_TRANSVR_TASK_WAIT; + +post_transvr_task_err: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, task_p->state, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_one(struct transvr_worker_s *task_p) { + + int retval_main = DEBUG_TRANSVR_INT_VAL; + int retval_post = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval_main = _transvr_task_run_main(task_p); + if (retval_main < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute main_task fail!"); + goto err_transvr_task_run_one; + } + retval_post = _transvr_task_run_post(task_p); + if (retval_post < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute post_task fail!"); + goto err_transvr_task_run_one; + } + return retval_main; + +err_transvr_task_run_one: + SWPS_INFO("%s: %s
:%d :%d :%s :%s\n", + __func__, err_msg, retval_main, retval_post, + task_p->func_name, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_all(struct transvr_obj_s *self) { + + int haserr = 0; + int retval = DEBUG_TRANSVR_INT_VAL; + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if ((self->worker_p) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + curr_p = self->worker_p; + while (curr_p != NULL) { + next_p = curr_p->next_p; + retval = transvr_task_run_one(curr_p); + if (curr_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + curr_p = next_p; + continue; + } + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + break; + case EVENT_TRANSVR_TASK_DONE: + transvr_task_free_one(curr_p); + break; + case EVENT_TRANSVR_TASK_FAIL: + + default: + haserr = 1; + transvr_task_free_one(curr_p); + break; + } + curr_p = next_p; + } + if (haserr) { + return EVENT_TRANSVR_TASK_FAIL; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +static void +transvr_task_set_delay(struct transvr_worker_s *task_p, + unsigned long delay_msec) { + + task_p->trigger_time = (jiffies + (delay_msec * (HZ/1000))); +} + + +static void +transvr_task_set_retry(struct transvr_worker_s *task_p, + unsigned long retry_times) { + + task_p->retry = retry_times; +} + + +/* For Transceiver Post Task + */ +int +taskfunc_post_do_nothing(struct transvr_worker_s *task_p) { + + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_post_handle_task_state(struct transvr_worker_s *task_p) { + + struct transvr_obj_s* tp = task_p->transvr_p; + + switch (task_p->state) { + case STATE_T_TASK_INIT: + case STATE_T_TASK_WAIT: + return EVENT_TRANSVR_TASK_WAIT; + + case STATE_T_TASK_DONE: + tp->state = STATE_TRANSVR_CONNECTED; + tp->send_uevent(tp, KOBJ_ADD); + return EVENT_TRANSVR_TASK_DONE; + + case STATE_T_TASK_FAIL: + tp->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_TASK_FAIL; + + default: + break; + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +/* For Transceiver Main Task + */ +int +_taskfunc_sfp_setup_soft_rs(struct transvr_worker_s *task_p, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller) { + + int show_err = 0; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_soft_rs"; + + err_code = _sfp_update_attr_soft_rs0(task_p->transvr_p, 0); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + err_code = __sfp_set_soft_rs(task_p->transvr_p, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_setup_soft_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_code); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +__taskfunc_sfp_setup_hard_rs(struct transvr_worker_s *task_p, + int input_val, + int (*get_func)(struct ioexp_obj_s *self, int virt_offset), + int (*set_func)(struct ioexp_obj_s *self, int virt_offset, int input_val)) { + + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + + err_val = get_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset); + + if (err_val < 0) { + if (err_val == ERR_IOEXP_NOTSUPPORT) { + return EVENT_TRANSVR_TASK_DONE; + } + err_str = "Get current hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + if (err_val == input_val) { + return EVENT_TRANSVR_TASK_DONE; + } + err_val = set_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_p_taskfunc_sfp_setup_hard_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_hard_rs0(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs0, + task_p->transvr_p->ioexp_obj_p->set_hard_rs0); +} + + +int +_taskfunc_sfp_setup_hard_rs1(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs1, + task_p->transvr_p->ioexp_obj_p->set_hard_rs1); +} + + +int +_taskfunc_sfp_setup_rs0(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs0"; + + err_val = _taskfunc_sfp_setup_hard_rs0(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs0, + task_p->transvr_p->eeprom_map_p->page_soft_rs0, + task_p->transvr_p->eeprom_map_p->offset_soft_rs0, + bit_shift, + &(task_p->transvr_p->soft_rs0), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs0_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs0(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_rs1(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs1"; + + err_val = _taskfunc_sfp_setup_hard_rs1(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs1, + task_p->transvr_p->eeprom_map_p->page_soft_rs1, + task_p->transvr_p->eeprom_map_p->offset_soft_rs1, + bit_shift, + &(task_p->transvr_p->soft_rs1), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs1_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs1(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_sfp_setup_SFF8431_case1(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs0(task_p, update_val); +} + + + +int +taskfunc_sfp_setup_SFF8431_case2(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs1(task_p, update_val); +} + + +int +taskfunc_sfp_setup_SFF8431_case3(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + int update_rs0 = 1; + int update_rs1 = 1; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _taskfunc_sfp_setup_rs0(task_p, update_rs0); + if (err_code < 0) { + return err_code; + } + return _taskfunc_sfp_setup_rs1(task_p, update_rs1); +} + + +int +taskfunc_sfp_handle_1g_rj45(struct transvr_worker_s *task_p) { + + /* Not all of platform support 0x56 for transceiver + * external PHY, Support list as below: + * => 1. Magnolia-PVT (PS: EVT & DVT not ready) + */ + int ext_phy_addr = 0x56; + int ext_phy_page = -1; + int ext_phy_offs = 0x11; + int ext_phy_len = 1; + int lstate_mask = 0x04; /* 00000100 */ + int show_err = 0; + int fail_retry = 5; + int fail_delay = 1000; /* msec */ + int err_code = DEBUG_TRANSVR_INT_VAL; + uint8_t detect_val = DEBUG_TRANSVR_HEX_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + int *tmp_p = NULL; + char *func_name = "taskfunc_sfp_handle_1g_rj45"; + + if (task_p->transvr_p->state != STATE_TRANSVR_CONNECTED) { + return EVENT_TRANSVR_TASK_DONE; + } + if ( (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000) && + (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000_up) ) { + goto err_taskfunc_sfp_handle_1g_rj45_1; + } + err_code = _common_update_uint8_attr(task_p->transvr_p, + ext_phy_addr, + ext_phy_page, + ext_phy_offs, + ext_phy_len, + &detect_val, + func_name, + show_err); + if ( (err_code < 0) || + (detect_val == DEBUG_TRANSVR_HEX_VAL) ) { + snprintf(err_str, sizeof(err_str), "Detect external link status fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + if ((detect_val & lstate_mask) == lstate_mask) { + goto ok_taskfunc_sfp_handle_1g_rj45_link_up; + } + goto ok_taskfunc_sfp_handle_1g_rj45_link_down; + +ok_taskfunc_sfp_handle_1g_rj45_link_up: + /* Filter out noise */ + if (!(task_p->p_data)) { + tmp_p = kzalloc(sizeof(int), GFP_KERNEL); + if (!tmp_p) { + snprintf(err_str, sizeof(err_str), "kzalloc p_data fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + *tmp_p = TRANSVR_CLASS_BASE_T_1000_up; + task_p->p_data = tmp_p; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + } + if ((*(int *)(task_p->p_data)) != TRANSVR_CLASS_BASE_T_1000_up) { + kfree(task_p->p_data); + task_p->p_data = NULL; + snprintf(err_str, sizeof(err_str), "Internal error"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + kfree(task_p->p_data); + task_p->p_data = NULL; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_link_down: + if (task_p->p_data) { + kfree(task_p->p_data); + task_p->p_data = NULL; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_done: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_1: + snprintf(err_str, sizeof(err_str), "Detect transceiver:%d not Base-T, remove task.", + task_p->transvr_p->info); + SWPS_INFO("%s: %s :%s\n", __func__, err_str, task_p->transvr_p->swp_name); + transvr_task_set_retry(task_p, 0); + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_2: + if (task_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, fail_retry); + } + if ((task_p->retry) == 0) { + /* Error case: + * => In this case, SWPS will stop external Link state monitor features + * and keeps transvr_p->info on TRANSVR_CLASS_BASE_T_1000_up. + * Upper layer will see it always Linkup that because of these type of + * transceiver has external phy, BCM chip see it as Loopback transceiver. + */ + SWPS_WARN("%s can not access external PHY of Base-T SFP transceiver\n", + task_p->transvr_p->swp_name); + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + return EVENT_TRANSVR_TASK_DONE; + } else { + transvr_task_set_delay(task_p, fail_delay); + } + return EVENT_TRANSVR_TASK_FAIL; +} +static int qsfp_data_ready_check(struct transvr_obj_s *self) +{ + + /* [Return] + * EVENT_TRANSVR_TASK_DONE : Ready + * EVENT_TRANSVR_TASK_WAIT : Not ready + * EVENT_TRANSVR_INIT_FAIL : Error + */ + int addr = VAL_TRANSVR_8436_READY_ADDR; + int page = VAL_TRANSVR_8436_READY_PAGE; + int offs = VAL_TRANSVR_8436_READY_OFFSET; + int bit = VAL_TRANSVR_8436_READY_BIT; + int ready = VAL_TRANSVR_8436_READY_VALUE; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Select target page */ + err = _common_setup_page(self, addr, page, offs, 1, 0); + if (err < 0) { + emsg = "setup page fail"; + goto err_data_check; + } + /* Get Status Indicators */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, offs); + if (err < 0) { + emsg = "detect current value fail"; + goto err_data_check; + } + if ((err & (1<swp_name, __func__, emsg, err); + return EVENT_TRANSVR_INIT_FAIL; +} + +int +_taskfunc_qsfp_setup_power_mod(struct transvr_obj_s *self, + int setup_val) { + + int curr_val = DEBUG_TRANSVR_INT_VAL; + int err_val = DEBUG_TRANSVR_INT_VAL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + int i = 0; + int check_num = QSFP_DATA_READY_CHECK_NUM; + if (io_no_init) { + + SWPS_INFO("%s no_io_init\n",__func__); + return EVENT_TRANSVR_TASK_DONE; + } + + curr_val = self->ioexp_obj_p->get_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset); + if (curr_val < 0){ + err_msg = "Get current value fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + if (curr_val == setup_val){ + return EVENT_TRANSVR_TASK_DONE; + } + err_val = self->ioexp_obj_p->set_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset, + setup_val); + if (err_val < 0){ + err_msg = "Setup power mode fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + /*check if data is ready in high power mode*/ + if (0 == setup_val) { + + for (i = 0 ; i < check_num; i++) { + + if ((err_val = qsfp_data_ready_check(self)) == EVENT_TRANSVR_TASK_DONE) { + break; + } + msleep(QSFP_DATA_READY_CHECK_DELAY_MS); + } + if (i >= check_num) { + err_msg = "qsfp_ready_check fail"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } else if (i != 0) { + SWPS_INFO("%s qsfp_data gets ready in %dms\n", self->swp_name, i*QSFP_DATA_READY_CHECK_DELAY_MS); + } + } + + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_qsfp_setup_power_mod_1: + SWPS_INFO("%s %s: %s :%d :%d :%d\n", + __func__, self->swp_name, err_msg, err_val, curr_val, setup_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_qsfp_handle_tx_disable(struct transvr_worker_s *task_p) { + + int i = 0; + int retry = 5; + int delay_ms = 100; + + if (task_p->transvr_p->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return EVENT_TRANSVR_TASK_DONE; + } + if (!_qsfp_is_implement_tx_disable(task_p->transvr_p)) { + return EVENT_TRANSVR_TASK_DONE; + } + for (i=0; itransvr_p, + task_p->transvr_p->auto_tx_disable) + == EVENT_TRANSVR_TASK_DONE) { + goto ok_taskfunc_qsfp_handle_tx_disable; + } + mdelay(delay_ms); + } + SWPS_INFO("%s auto setup tx_disable:0x%02x fail.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_INIT_FAIL; + +ok_taskfunc_qsfp_handle_tx_disable: + SWPS_INFO("%s auto setup tx_disable:0x%02x ok.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_qsfp_set_hpmod(struct transvr_worker_s *task_p) { + + int err = DEBUG_TRANSVR_INT_VAL; + int HIGH_POWER_MODE = 0; + + /* Handle power mode */ + err = _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + HIGH_POWER_MODE); + if (err < 0) { + SWPS_INFO("%s: setup hpmod fail :%d :%s\n", + __func__, err, task_p->transvr_p->swp_name); + return err; + } + /* Handle auto tx_disable + * [Note] + * => Because there are some transceiver have timing issues or + * setup sequence issues, therefore we handle auto tx_disable + * after handle power mode. + */ + mdelay(100); + return taskfunc_qsfp_handle_tx_disable(task_p); +} + + +int +taskfunc_qsfp_set_lpmod(struct transvr_worker_s *task_p) { + + int LOW_POWER_MODE = 1; + return _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + LOW_POWER_MODE); +} + + +static int +initfunc_sfp_handle_multi_rate_mode(struct transvr_obj_s *self) { + + int task_retry = 3; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "sfp_handle_multi_rate_mode"; + struct transvr_worker_s *task_p = NULL; + + switch (self->rate_id) { + case 0x00: /* Unspecified */ + case 0x03: /* Unspecified */ + case 0x05: /* Unspecified */ + case 0x07: /* Unspecified */ + case 0x09: /* Unspecified */ + case 0x0B: /* Unspecified */ + case 0x0D: /* Unspecified */ + case 0x0F: /* Unspecified */ + goto sfp_handle_multi_rate_mode_4_unspecified; + + case 0x02: /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case1, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x04: /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case2, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x06: /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case3, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x01: /* SFF-8079 (4/2/1G Rate_Select & AS0/AS1) */ + err_str = "SFF-8079 (4/2/1G Rate_Select & AS0/AS1)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x08: /* FC-PI-5 (16/8/4G Rx Rate_select only) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Rx Rate_select only)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0A: /* FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0C: /* FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + */ + err_str = "FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0E: /* 10/8G Rx and Tx Rate_Select controlling the operation or + * locking modes of the internal signal conditioner, retimer + * or CDR, according to the logic table defined in Table 10-2, + * High Bit Rate (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = + * 8.5 Gb/s. In this mode, the default value of bit 110.3 (Soft + * Rate Select RS(0), Table 9-11) and of bit 118.3 (Soft Rate + * Select RS(1), Table 10-1) is 1. + */ + err_str = "cable type: 0x0E"; + goto sfp_handle_multi_rate_mode_4_not_support; + + default: + err_str = "cable type: UNKNOW"; + goto sfp_handle_multi_rate_mode_4_not_support; + } + +sfp_handle_multi_rate_mode_4_sff8431: + if (!task_p) { + err_str = "Create task fail!"; + goto sfp_handle_multi_rate_mode_4_fail_1; + } + transvr_task_set_retry(task_p, task_retry); + return EVENT_TRANSVR_TASK_WAIT; + +sfp_handle_multi_rate_mode_4_unspecified: + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_not_support: + SWPS_INFO("%s: Does not support %s :%s :0x%02x\n", + func_str, err_str, self->swp_name, self->rate_id); + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_fail_1: + SWPS_INFO("%s: %s :%s :0x%02x, :%d\n", + func_str, err_str, self->swp_name, self->rate_id, err_code); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +initfunc_sfp_handle_1g_rj45(struct transvr_obj_s *self) { + + struct transvr_worker_s *task_p = NULL; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_sfp_handle_1g_rj45"; + + + if (self->info == TRANSVR_CLASS_BASE_T_1000) { + task_p = transvr_task_creat(self, + taskfunc_sfp_handle_1g_rj45, + taskfunc_post_do_nothing, + func_str); + if (!task_p) { + snprintf(err_str, sizeof(err_str), "Create task fail"); + goto err_initfunc_sfp_handle_1g_rj45; + } + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_initfunc_sfp_handle_1g_rj45: + SWPS_INFO("%s: %s :%s :%d\n", + __func__, err_str, self->swp_name, detect_cls); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +initfunc_qsfp_handle_power_mode(struct transvr_obj_s *self) { + + int err_code = EVENT_TRANSVR_EXCEP_INIT; + int power_class = DEBUG_TRANSVR_INT_VAL; + int hpmod_retry = 3; + int lpower_config = 1; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + unsigned long hpmod_delay = 500; /* msec */ + struct transvr_worker_s *task_p = NULL; + + /* Handle power mode for IOEXP */ + power_class = __qsfp_get_power_cls(self, 0); + switch (power_class) { + case 1: /* Case: Low power mode (Class = 1) */ + err_code = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (err_code < 0){ + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + return EVENT_TRANSVR_TASK_DONE; + + case 2: /* Case: High power mode (Class > 1) */ + case 3: + case 4: + case 5: + case 6: + case 7: + task_p = transvr_task_creat(self, + taskfunc_qsfp_set_hpmod, + taskfunc_post_handle_task_state, + "transvr_init_qsfp"); + if (!task_p) { + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + transvr_task_set_retry(task_p, hpmod_retry); + transvr_task_set_delay(task_p, hpmod_delay); + return EVENT_TRANSVR_TASK_WAIT; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Exception case"); + goto err_initfunc_qsfp_handle_power_mode; + +err_initfunc_qsfp_handle_power_mode: + SWPS_INFO("%s: %s :%s \n", __func__, err_msg, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +initfunc_qsfp28_handle_cdr(struct transvr_obj_s *self) { + + uint8_t DEFAULT_VAL_CDR = 0xff; + int CDR_FUNC_EXISTED = 0x3; + int show_err = 1; + int err_val = EVENT_TRANSVR_TASK_FAIL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_qsfp28_handle_cdr"; + + err_val = __qsfp_get_cdr_present(self, 0); + if ( (err_val < 0) || + (err_val == DEBUG_TRANSVR_HEX_VAL) ) { + err_msg = "detect cdr_present fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + if (err_val == CDR_FUNC_EXISTED) { + err_val = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->offset_cdr, + DEFAULT_VAL_CDR, + &(self->cdr), + func_str, + show_err); + if (err_val < 0) { + err_msg = "set CDR fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_qsfp_handle_cdr_1: + SWPS_INFO("%s: %s :%d :%s\n", + func_str, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + +/* ========== Object functions for Final State Machine ========== + */ +int +is_plugged(struct transvr_obj_s *self){ + + int limit = 63; + int present = DEBUG_TRANSVR_INT_VAL; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + struct ioexp_obj_s *ioexp_p = self->ioexp_obj_p; + + if (!ioexp_p) { + snprintf(emsg, limit, "ioexp_p is null!"); + goto err_is_plugged_1; + } + present = ioexp_p->get_present(ioexp_p, self->ioexp_virt_offset); + switch (present){ + case 0: + return 1; + case 1: + return 0; + case ERR_IOEXP_UNINIT: + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + default: + if (ioexp_p->state == STATE_IOEXP_INIT){ + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + } + break; + } + SWPS_INFO("%s: Exception case! :%d :%d\n", + __func__, present, ioexp_p->state); + return 0; + +err_is_plugged_1: + SWPS_DEBUG("%s: %s\n", __func__, emsg); + return 0; +} + + +static int +detect_transvr_type(struct transvr_obj_s* self){ + + int type = TRANSVR_TYPE_ERROR; + + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + type = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + + /* Case: 1. Wait transceiver I2C module. + * 2. Transceiver I2C module failure. + * Note: 1. SFF allow maximum transceiver initial time is 2 second. So, there + * are exist some case that we need to wait transceiver. + * For these case, we keeps status on "TRANSVR_TYPE_UNPLUGGED", than + * state machine will keep trace with it. + * 2. There exist some I2C failure case we need to handle. Such as user + * insert the failure transceiver, or any reason cause it abnormal. + */ + if (type < 0){ + switch (type) { + case -EIO: + SWPS_DEBUG("%s: %s smbus return:-5 (I/O error)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + case -ENXIO: + SWPS_DEBUG("%s: %s smbus return:-6 (No such device or address)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + default: + break; + } + SWPS_INFO("%s: %s unexpected smbus return:%d \n", + __func__, self->swp_name, type); + return TRANSVR_TYPE_ERROR; + } + /* Identify valid transceiver type */ + switch (type){ + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + break; + case TRANSVR_TYPE_UNKNOW_1: + case TRANSVR_TYPE_UNKNOW_2: + type = TRANSVR_TYPE_UNKNOW_2; + break; + default: + SWPS_DEBUG("%s: unknow type:0x%02x \n", __func__, type); + type = TRANSVR_TYPE_ERROR; + break; + } + return type; +} + +static int +detect_transvr_state(struct transvr_obj_s *self, + int result[2]){ + /* [return] [result-0] [result-1] + * 0 STATE_TRANSVR_CONNECTED TRANSVR_TYPE_FAKE + * 0 STATE_TRANSVR_DISCONNECTED TRANSVR_TYPE_UNPLUGGED + * 0 STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * 0 STATE_TRANSVR_INIT / + * 0 STATE_TRANSVR_SWAPPED + * 0 STATE_TRANSVR_CONNECTED + * ERR_TRNASVR_BE_ISOLATED STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_I2C_CRASH STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_UNEXCPT STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_UNKNOW_1/2 + */ + result[0] = STATE_TRANSVR_UNEXCEPTED; /* For return state */ + result[1] = TRANSVR_TYPE_ERROR; /* For return type */ + + /* Case1: Fake type */ + if (self->type == TRANSVR_TYPE_FAKE){ + result[0] = STATE_TRANSVR_CONNECTED; + result[1] = TRANSVR_TYPE_FAKE; + return 0; + } + /* Case2: Transceiver unplugged */ + #if 0 + if (!is_plugged(self)){ + result[0] = STATE_TRANSVR_DISCONNECTED; + result[1] = TRANSVR_TYPE_UNPLUGGED; + return 0; + } +#endif + + /* Case2: Transceiver unplugged */ + if (!sff_io_is_plugged(self->port_id)){ + result[0] = STATE_TRANSVR_DISCONNECTED; + result[1] = TRANSVR_TYPE_UNPLUGGED; + //SWPS_INFO("%s: %s plug out: port_id:%d\n", __func__, self->swp_name, self->port_id); + return 0; + } + /* Case3: Transceiver be isolated */ + if (self->state == STATE_TRANSVR_ISOLATED){ + result[0] = STATE_TRANSVR_ISOLATED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRNASVR_BE_ISOLATED; + } + + + if (STATE_TRANSVR_CONNECTED != self->state) { + /* Case4: Transceiver plugged */ + result[1] = detect_transvr_type(self); + // SWPS_INFO("detect_type dev_name:%s port_id:%d\n", self->swp_name, self->port_id); + /* Case4.1: I2C topology crash + * Note : There are some I2C issues cause by transceiver/cables. + * We need to check topology status when user insert it. + * But in this step, we can't not ensure this is the issues + * port. So, it return the ERR_TRANSVR_I2C_CRASH, then upper + * layer will diagnostic I2C topology. + */ + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: %s detect I2C crash :%d\n", + __func__, self->swp_name, self->state); + result[0] = STATE_TRANSVR_UNEXCEPTED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_I2C_CRASH; + } + } else { /*connected case*/ + result[0] = STATE_TRANSVR_CONNECTED; + return 0; + + } + /* Case4.2: System initial not ready, + * Note : Sometime i2c channel or transceiver EEPROM will delay that will + * cause system in inconsistent state between EEPROM and IOEXP. + * In this case, SWP transceiver object keep state at LINK_DOWN + * to wait system ready. + * By the way, State Machine will handle these case. + */ + if (result[1] == TRANSVR_TYPE_UNPLUGGED){ + result[0] = STATE_TRANSVR_DISCONNECTED; + return 0; + } + /* Case4.3: Error transceiver type */ + if (result[1] == TRANSVR_TYPE_ERROR){ + result[0] = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s detect error type\n", __func__, self->swp_name); + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard!"); + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case3.3: Unknow transceiver type */ + if ((result[1] == TRANSVR_TYPE_UNKNOW_1) || + (result[1] == TRANSVR_TYPE_UNKNOW_2) ){ + result[0] = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + /* Case3.4: During initial process */ + if (self->state == STATE_TRANSVR_INIT){ + result[0] = STATE_TRANSVR_INIT; + return 0; + } + /* Case3.5: Transceiver be swapped */ + if (self->type != result[1]){ + result[0] = STATE_TRANSVR_SWAPPED; + return 0; + } + /* Case3.6: Link up state */ + result[0] = STATE_TRANSVR_CONNECTED; + return 0; +} + +int +_sfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = _sfp_get_comp_extended(self); + + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_25G_AOC; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_25G_SR; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_25G_LR; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_25G_ER; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x0c: /* 25GBASE-CR CA-S */ + case 0x0d: /* 25GBASE-CR CA-N */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L1_25G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_10_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _sfp_get_comp_10g_eth_comp(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 10G Optical (x1) */ + if ((detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + } + if ((detect_val & 0x80) == 0x80) { /* 10000000 : 10GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_1g = 0x0b; + int upper_bound_1g = 0x1A; + int lower_bound_10g = 0x60; + int upper_bound_10g = 0x75; + int lower_bound_25g = 0xf0; + int upper_bound_25g = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 25G */ + if ((notmal_br >= lower_bound_25g) && + (notmal_br <= upper_bound_25g) ) { + return TRANSVR_CLASS_25G; + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + /* Check 1G */ + if ((notmal_br >= lower_bound_1g) && + (notmal_br <= upper_bound_1g) ) { + return TRANSVR_CLASS_1G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + int speed_br = DEBUG_TRANSVR_INT_VAL; + int speed_tmp = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + + speed_br = _sfp_detect_if_sp_by_br(self); + detect_val = _sfp_get_comp_1g_eth_comp(self); + + if (detect_val < 0) { + snprintf(err_str, sizeof(err_str), "Detect abnormal value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + } + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 1G (x1) */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 1000BASE-SX */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_SX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x02) == 0x02) { /* 00000010 : 1000BASE-LX *3 */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_LX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 1000BASE-CX */ + speed_tmp = TRANSVR_CLASS_COPPER_L1_1G; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + /* Case: 1000 Base-T (x1) */ + if ((detect_val & 0x08) == 0x08) { /* 00001000 : 1000BASE-T */ + return TRANSVR_CLASS_BASE_T_1000; + } + /* Case: 100 Base */ + if ( ((detect_val & 0x10) == 0x10) || /* 00010000 : 100BASE-LX/LX10 */ + ((detect_val & 0x20) == 0x20) || /* 00100000 : 100BASE-FX */ + ((detect_val & 0x40) == 0x40) || /* 01000000 : BASE-BX10 *3 */ + ((detect_val & 0x80) == 0x80) ){ /* 10000000 : BASE-PX *3 */ + return TRANSVR_CLASS_OPTICAL_100; + } + /* Case: ERROR */ + snprintf(err_str, sizeof(err_str), "Case:ERROR, value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + +ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g: + switch (speed_br) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_1G: + return speed_tmp; + case TRANSVR_CLASS_10G: + goto ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G; + } + +ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G: + switch (speed_tmp) { + case TRANSVR_CLASS_OPTICAL_1G_SX: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case TRANSVR_CLASS_OPTICAL_1G_LX: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case TRANSVR_CLASS_COPPER_L1_1G: + return TRANSVR_CLASS_COPPER_L1_10G; + default: + break; + } + snprintf(err_str, sizeof(err_str), "transfer_1to10 fail, speed:%d", speed_tmp); + goto err_p_sfp_detect_class_by_1g_ethernet; + +err_p_sfp_detect_class_by_1g_ethernet: + SWPS_INFO("%s: %s :%s", __func__, err_str, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int is_active = 0; + int conn_val = DEBUG_TRANSVR_INT_VAL; + int check_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _sfp_detect_if_sp_by_br(self); + conn_val = _sfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 */ + case 0x0d: /* MPO 2x16 */ + /* + * ToDo: Need verify Optical Pigtail + */ + goto ok_sfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + /* + * ToDo: Need check ACC use case + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x23: /* No separable connector */ + /* + * ToDo: Standard not clear, not all transceiver vendor + * have the same defined + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_check_active_passive: + check_val = _sfp_get_cable_tech(self); + switch(check_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_unknow; + case 0x04: /* Passive */ + goto ok_sfp_detect_class_by_feature_4_copper; + case 0x08: /* Active */ + is_active = 1; + goto ok_sfp_detect_class_by_feature_4_aoc; + default: + snprintf(err_msg, sizeof(err_msg), + "_sfp_get_cable_tech return Non define value:%d", + check_val); + break; + } + goto err_sfp_detect_class_by_feature_1; + +ok_sfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_25G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_25G_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_25G_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_25G_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_25G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + case TRANSVR_CLASS_1G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_1G_SX; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_1G_LX; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_1G_EX; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_1G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_sfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_OPTICAL_25G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_S_AOC; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_OPTICAL_1G_AOC; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_COPPER_L1_25G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L1_10G; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_COPPER_L1_1G; + default: + return TRANSVR_CLASS_COPPER; + } + +ok_sfp_detect_class_by_feature_4_unknow: + return TRANSVR_CLASS_UNSPECIFIED; + +err_sfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +sft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _sfp_detect_class_by_extend_comp(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 10G Compliance */ + detect_val = _sfp_detect_class_by_10_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 1G Compliance */ + detect_val = _sfp_detect_class_by_1g_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_BASE_T_1000: + case TRANSVR_CLASS_OPTICAL_100: + /* + * ToDo: Need Check 0.1G + */ + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_COPPER_L1_10G: + /* Transfer speed case + * => Example: Raycom 10G DAC + */ + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 1G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check by connector, br, wavelength */ + detect_val = _sfp_detect_class_by_feature(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_OPTICAL_1G: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_COPPER: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_COPPER_L1_10G: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined get_connector:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sft_detect_transceiver_class_1; + +err_sft_detect_transceiver_class_1: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_trident2_if_type_1; + +err_sfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SR); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_KR); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_tomahawk_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_tomahawk_if_type_1; + +err_sfp_set_tomahawk_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_sfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = sft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _sfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TRIDENT_3: + case BCM_CHIP_TYPE_TOMAHAWK: + return _sfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _sfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_sfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = sft_detect_transvr_class(self); + switch(detect_val) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_SP_100); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + detect_val); + goto err_sfp_detect_if_speed_1; + } + /* Check by BR */ + detect_val = _sfp_detect_if_sp_by_br(self); + switch (detect_val) { + case TRANSVR_CLASS_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + default: + break; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_detect_if_speed_1; + +err_sfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_extended(self); + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_100G_AOC; + + case 0x06: /* 100G CWDM4 */ + case 0x09: /* Obsolete (assigned before 100G CWDM4 MSA required FEC) */ + case 0x17: /* 100G CLR4 */ + case 0x1A: /* 100GE-DWDM2 */ + return TRANSVR_CLASS_OPTICAL_100G; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_100G_SR4; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_100G_LR4; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_100G_ER4; + + case 0x07: /* 100G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_100G_PSM4; + + case 0x12: /* 40G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_40G; + + case 0x11: /* 4 x 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + + case 0x10: /* 40GBASE-ER4 */ + return TRANSVR_CLASS_OPTICAL_40G_ER4; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L4_100G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_class_by_10_40_100_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_10_40_100_ethernet(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 40G Optical */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 40G Active Cable (XLPPI) */ + return TRANSVR_CLASS_OPTICAL_40G_AOC; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 40GBASE-SR4 */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + } + if ( (detect_val & 0x02) == 0x02) { /* 00000010 : 40GBASE-LR4 */ + return TRANSVR_CLASS_OPTICAL_40G_LR4; + } + if ( (detect_val & 0x08) == 0x08) { /* 00001000 : 40GBASE-CR4 */ + return TRANSVR_CLASS_COPPER_L4_40G; + } + /* Case: 10G Optical */ + if ( (detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + } + /* Case: Extend Compliance */ + if ( ((detect_val & 0x80) == 0x80) ){ /* 10000000 : Use Extend Compliance */ + return TRANSVR_CLASS_EXTEND_COMP; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_10g = 0x10; + int upper_bound_10g = 0x25; + int lower_bound_40g = 0x60; + int upper_bound_40g = 0x75; + int lower_bound_100g = 0x60; + int upper_bound_100g = 0x75; + int used_extend_br = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + int extend_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 40G */ + if ((notmal_br >= lower_bound_40g) && + (notmal_br <= upper_bound_40g) ) { + return TRANSVR_CLASS_40G; + } + /* Check 100G */ + if (notmal_br == used_extend_br) { + extend_br = (int)(self->extbr); /* updated by update_all() */ + if ((extend_br >= lower_bound_100g) && + (extend_br <= upper_bound_100g) ) { + return TRANSVR_CLASS_100G; + } + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_qsfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int conn_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _qsfp_detect_if_sp_by_br(self); + conn_val = _qsfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 (Multifiber Parallel Optic) */ + case 0x0d: /* MPO 2x16 */ + goto ok_qsfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + goto ok_qsfp_detect_class_by_feature_4_copper; + case 0x23: /* No separable connector */ + if ((_qsfp_get_comp_fc_link_length(self) > 0) || + (_qsfp_get_comp_fc_trans_tech(self) > 0) || + (_qsfp_get_comp_fc_trans_media(self) > 0) || + (_qsfp_get_comp_fc_speed(self) > 0) ) { + goto ok_qsfp_detect_class_by_feature_4_aoc; + } + goto ok_qsfp_detect_class_by_feature_4_copper; + default: + snprintf(err_msg, sizeof(err_msg), + "_qsfp_get_connector_type return Non define value:%d", + conn_val); + goto err_qsfp_detect_class_by_feature_1; + } + return TRANSVR_CLASS_UNSPECIFIED; + +ok_qsfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_100G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_100G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_100G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_100G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_100G; + + case TRANSVR_CLASS_40G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_40G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_40G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_40G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_40G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_Q_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_OPTICAL_100G_AOC; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_OPTICAL_40G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_Q_AOC; + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_COPPER_L4_100G; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_COPPER_L4_40G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L4_10G; + default: + return TRANSVR_CLASS_COPPER; + } + +err_qsfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", + __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +qsft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _qsfp_detect_class_by_extend_comp(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_COPPER_L4_100G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check 10/40G/100G Ethernet Compliance */ + detect_val = _qsfp_detect_class_by_10_40_100_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_COPPER_L4_40G: + return detect_val; + case TRANSVR_CLASS_EXTEND_COMP: + /* Format incorrect case (We already checked the Extend + * Compliance is 0 + */ + snprintf(err_msg, sizeof(err_msg), + "Transceiver format incorrect"); + goto err_qsft_detect_transvr_class_1; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10/40/100:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check by Connector type, BR and wavelength */ + detect_val = _qsfp_detect_class_by_feature(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_COPPER_L4_100G: + case TRANSVR_CLASS_COPPER_L4_40G: + case TRANSVR_CLASS_COPPER_L4_10G: + case TRANSVR_CLASS_COPPER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined connector:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), + "Can not identify!"); + goto err_qsft_detect_transvr_class_1; + +err_qsft_detect_transvr_class_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: LR4 or LR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: /* Need Check: ER4 or ER */ + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_KR4); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_qsfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = qsft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _qsfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TRIDENT_3: + case BCM_CHIP_TYPE_TOMAHAWK: + return _qsfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _qsfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 8; + char tmp_result[8] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = qsft_detect_transvr_class(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G Copper */ + case TRANSVR_CLASS_COPPER_L4_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + break; + /* Copper */ + case TRANSVR_CLASS_COPPER: + break; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined class case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Check br and extbr */ + detect_val = _qsfp_detect_if_sp_by_br(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + case TRANSVR_CLASS_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined BR case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_detect_if_speed_1; + +err_qsfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_common_set_lane_map_str(struct transvr_obj_s* self, + char *result) { + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + char err_msg[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_L_STR); + snprintf(result, LEN_TRANSVR_L_STR, "%s=", TRANSVR_UEVENT_KEY_LANE); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + if (tmp_val > 256) { + snprintf(err_msg, sizeof(err_msg), + "detect abnormal value:%d", tmp_val); + goto err_common_set_lane_map_str_1; + } + memset(tmp_str, 0, sizeof(tmp_str)); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_L_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_L_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_L_STR); + } + if (i == 0) { + goto err_common_set_lane_map_str_2; + } + return 0; + +err_common_set_lane_map_str_1: + SWPS_INFO("%s: %s", __func__, err_msg); +err_common_set_lane_map_str_2: + snprintf(result, LEN_TRANSVR_L_STR, "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_common_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action, + int (*detect_if_type)(struct transvr_obj_s *self, char *result), + int (*detect_if_speed)(struct transvr_obj_s *self, char *result), + int send_anyway) { + + char *uevent_envp[4]; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + char tmp_str[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_1[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_2[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_3[64] = DEBUG_TRANSVR_STR_VAL; + + if (TRANSVR_UEVENT_ENABLE != 1) { + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_get_if_lane(self, tmp_str) < 0) { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + } else { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, tmp_str); + } + switch (u_action) { + case KOBJ_ADD: + /* Detect type */ + if (detect_if_type(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface type fail!"); + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, tmp_str); + uevent_envp[0] = tmp_str_1; + /* Detect speed */ + if (detect_if_speed(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface speed fail!"); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, tmp_str); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + case KOBJ_REMOVE: + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + default: + snprintf(err_msg, sizeof(err_msg), "kobject_action:%d not support", u_action); + goto private_common_send_uevent_4_fail; + } + snprintf(err_msg, sizeof(err_msg), "%s", "Exception case"); + goto private_common_send_uevent_4_fail; + +private_common_send_uevent_4_fail: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + if (send_anyway) { + goto private_common_send_uevent_4_send; + } + return ERR_TRANSVR_UEVENT_FAIL; + +private_common_send_uevent_4_send: + return kobject_uevent_env(&(self->transvr_dev_p->kobj), + u_action, + uevent_envp); +} + +int +sfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_sfp_detect_if_type, + &_sfp_detect_if_speed, + send_anyway); +} + + +int +qsfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_qsfp_detect_if_type, + &_qsfp_detect_if_speed, + send_anyway); +} + + +int +fake_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + + int err; + int detect_result[2]; + int current_state = STATE_TRANSVR_UNEXCEPTED; + int current_type = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_NEW) { + if (_transvr_init_handler(self) < 0){ + return ERR_TRANSVR_INIT_FAIL; + } + } + err = detect_transvr_state(self, detect_result); + if (err < 0) { + return err; + } + /* In Direct mode, driver only detect transceiver when user call driver interface + * which on sysfs. So it only need consider the state of Transceiver. + */ + current_state = detect_result[0]; + current_type = detect_result[1]; + + switch (current_state){ + + case STATE_TRANSVR_DISCONNECTED: /* Transceiver is not plugged */ + self->state = current_state; + self->type = current_type; + return ERR_TRANSVR_UNPLUGGED; + + case STATE_TRANSVR_INIT: /* Transceiver is plugged, system not ready */ + return ERR_TRANSVR_UNINIT; + + case STATE_TRANSVR_ISOLATED: /* Transceiver is plugged, but has some issues */ + return ERR_TRNASVR_BE_ISOLATED; + + case STATE_TRANSVR_CONNECTED: /* Transceiver is plugged, system is ready */ + self->state = current_state; + self->type = current_type; + return 0; + + case STATE_TRANSVR_SWAPPED: /* Transceiver is plugged, system detect user changed */ + self->type = current_type; + if (reload_transvr_obj(self, current_type) < 0){ + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + self->state = current_state; + return 0; + + case STATE_TRANSVR_UNEXCEPTED: /* Transceiver type or state is unexpected case */ + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_UNEXCPT; + + default: + SWPS_INFO("%s: state:%d not in define.\n", __func__, current_state); + break; + } + return ERR_TRANSVR_UNEXCPT; +} + + +static int +_is_except_happened_4_pmode(struct transvr_obj_s* self, + int new_state) { + + int event_chk = 0; + + if (self->temp == 0){ + return 0; + } + switch (new_state) { + case STATE_TRANSVR_INIT: + event_chk = EVENT_TRANSVR_EXCEP_INIT; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_CONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_UP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_DISCONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_DOWN; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_SWAPPED: + event_chk = EVENT_TRANSVR_EXCEP_SWAP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_UNEXCEPTED: + event_chk = EVENT_TRANSVR_EXCEP_EXCEP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_ISOLATED: + event_chk = EVENT_TRANSVR_EXCEP_ISOLATED; + goto check_event_happened_4_pmode; + + default: + SWPS_INFO("%s: unexcepted case:%d\n", __func__, new_state); + break; + } + return 0; + +check_event_happened_4_pmode: + if (self->temp == event_chk){ + return 1; + } + return 0; +} +int transvr_health_mtr(struct transvr_obj_s* self) +{ + + int state = self->state; + int return_val = 0; + /*when transvr is connected , check if it's alive by accessing it at slower frequency*/ + if (state == STATE_TRANSVR_CONNECTED) + { + //SWPS_INFO("%s: %s connected_st :%d detect_type_count:%d\n", + // __func__, self->swp_name, self->state, detect_type_count); + if (self->detect_type_count++ > DETECT_TYPE_TIMEOUT) { + self->detect_type_count = 0; + return_val = detect_transvr_type(self); + if (TRANSVR_TYPE_ERROR == return_val || + TRANSVR_TYPE_UNPLUGGED == return_val) + { + //SWPS_INFO("%s: %s sff type check fail :%d result:%d\n", + // __func__, self->swp_name, self->state, return_val); + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: %s detect I2C crash :%d\n", + __func__, self->swp_name, self->state); + return ERR_TRANSVR_I2C_CRASH; + } + } + //SWPS_INFO("%s: %s still alive :%d result:%d\n", + // __func__, self->swp_name, self->state, return_val); + } + } else { + self->detect_type_count = 0; + } + return 0; +} +int +common_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + /* [Return Value]: + * ERR_TRANSVR_UNINIT : (1) Initial not ready + * ERR_TRANSVR_UNPLUGGED : (1) Any -> Down + * ERR_TRANSVR_TASK_BUSY : (1) Wait Initial task + * ERR_TRANSVR_UNEXCPT : (1) Initial fail + * (2) Task fail + * (3) Reload fail + * ERR_TRNASVR_BE_ISOLATED : (1) Already be isolated + * OK Case (return 0) : (1) action_4_connected + * (2) action_4_nothing (initial retry) + */ + int curr_state[2]; + int old_state = self->state; + int old_type = self->type; + int new_state = STATE_TRANSVR_UNEXCEPTED; + int new_type = TRANSVR_TYPE_ERROR; + int return_val = ERR_TRANSVR_UNEXCPT; + + /* Never initial */ + if (self->state == STATE_TRANSVR_NEW) { + goto comfsm_action_4_reinit_obj; + } + /* Detect current state */ + switch (detect_transvr_state(self, curr_state)) { + case 0: + new_state = curr_state[0]; + new_type = curr_state[1]; + break; + + case ERR_TRNASVR_BE_ISOLATED: + new_state = STATE_TRANSVR_ISOLATED; + new_type = old_type; + break; + + case ERR_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case ERR_TRANSVR_UNEXCPT: + default: + new_state = STATE_TRANSVR_UNEXCEPTED; + new_type = old_type; + } + /* State handling */ + switch (old_state) { + case STATE_TRANSVR_INIT: /* INIT -> */ + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 1-1: UP -> INIT */ + SWPS_INFO("Detect %s is present. :1-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 1-2: UP -> UP */ + return_val = 0; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 1-3: UP -> DOWN */ + SWPS_INFO("Detect %s is removed. :1-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 1-4: UP -> SWAP */ + SWPS_INFO("Detect %s is swapped. :1-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 1-5: UP -> UNEXPET */ + SWPS_INFO("Detect %s has error. :1-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 1-6: UP -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :1-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_DISCONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 2-1: DOWN -> INIT */ + SWPS_INFO("Detect %s is present. :2-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 2-2: DOWN -> UP */ + SWPS_INFO("Detect %s is present. :2-2\n",self->swp_name); + goto comfsm_action_4_reinit_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 2-3: DOWN -> DOWN */ + return_val = ERR_TRANSVR_UNPLUGGED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_SWAPPED: /* Case 2-4: DOWN -> SWAP */ + SWPS_INFO("Detect %s is swapped. :2-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 2-5: DOWN -> UNEXPET */ + SWPS_INFO("Detect %s has error. :2-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 2-6: DOWN -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :2-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_UNEXCEPTED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 3-1: UNEXPET -> INIT */ + SWPS_INFO("Detect %s is present. :3-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 3-2: UNEXPET -> UP */ + SWPS_INFO("Detect %s is present. :3-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 3-3: UNEXPET -> DOWN */ + SWPS_INFO("Detect %s is removed. :3-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 3-4: UNEXPET -> SWAP */ + SWPS_INFO("Detect %s is swapped. :3-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 3-5: UNEXPET -> UNEXPET */ + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRANSVR_UNEXCPT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 3-6: UNEXPET -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :3-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 4-1: ISOLATE -> INIT */ + SWPS_INFO("Detect %s internal error. :4-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 4-2: ISOLATE -> UP */ + SWPS_INFO("Detect %s internal error. :4-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 4-3: ISOLATE -> DOWN */ + SWPS_INFO("Detect %s is removed. :4-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 4-4: ISOLATE -> SWAP */ + SWPS_INFO("Detect %s internal error. :4-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 4-5: ISOLATE -> UNEXPET */ + SWPS_INFO("Detect %s internal error. :4-5\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 4-6: ISOLATE -> ISOLATE */ + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + default: + break; + } + goto comfsm_action_4_unexpected; + + default: + break; + } + goto comfsm_action_4_unexpected; + + +comfsm_action_4_keep_state: + return return_val; + +comfsm_action_4_reinit_obj: + SWPS_DEBUG("FSM action: %s re-initial.\n", self->swp_name); + return_val = _transvr_init_handler(self); + goto comfsm_action_4_identify_event; + +comfsm_action_4_reload_obj: + SWPS_DEBUG("FSM action: %s reload.\n", self->swp_name); + self->type = new_type; + return_val = reload_transvr_obj(self, new_type); + goto comfsm_action_4_identify_event; + +comfsm_action_4_identify_event: + switch (return_val) { + case EVENT_TRANSVR_INIT_UP: + case EVENT_TRANSVR_TASK_DONE: + goto comfsm_action_4_connected; + + case EVENT_TRANSVR_INIT_DOWN: + goto comfsm_action_4_disconnected; + + case EVENT_TRANSVR_INIT_REINIT: + goto comfsm_action_4_nothing; + + case EVENT_TRANSVR_TASK_WAIT: + self->state = STATE_TRANSVR_INIT; + return ERR_TRANSVR_TASK_BUSY; + + case EVENT_TRANSVR_TASK_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_TASK_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_INIT_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_INIT_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_RELOAD_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_RELOAD_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case EVENT_TRANSVR_EXCEP_ISOLATED: + goto comfsm_action_4_isolate_obj; + + default: + SWPS_INFO("%s detect undefined event:%d.\n", self->swp_name, return_val); + goto comfsm_action_4_unexpected; + } + +comfsm_action_4_nothing: + SWPS_DEBUG("FSM action: %s do nothing.\n", self->swp_name); + return 0; + +comfsm_action_4_connected: + SWPS_DEBUG("FSM action: %s Connected.\n", self->swp_name); + self->state = STATE_TRANSVR_CONNECTED; + self->send_uevent(self, KOBJ_ADD); + _transvr_clean_retry(self); + return 0; + +comfsm_action_4_disconnected: + SWPS_DEBUG("FSM action: %s Disconnected. \n", self->swp_name); + self->state = STATE_TRANSVR_DISCONNECTED; + self->temp = EVENT_TRANSVR_TASK_DONE; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_retry(self); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNPLUGGED; + +comfsm_action_4_report_i2c_crash: + SWPS_DEBUG("FSM action: %s report I2C crash.\n", self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_I2C_CRASH; + +comfsm_action_4_isolate_obj: + SWPS_DEBUG("FSM action: %s isolate.\n", self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return ERR_TRNASVR_BE_ISOLATED; + +comfsm_action_4_unexpected: + SWPS_INFO("FSM action: %s unexpected.\n", self->swp_name); + SWPS_INFO("Dump: :%d :0x%02x :%d :0x%02x\n", + old_state, old_type, new_state, new_type); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNEXCPT; +} + + +int +fake_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +int +fake_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +/* ========== Object functions for Initial procedure ========== + */ +int +transvr_init_common(struct transvr_obj_s *self){ + /* Nothing to update */ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_fake(struct transvr_obj_s *self){ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_sfp(struct transvr_obj_s *self){ + + int tmp_val = DEBUG_TRANSVR_INT_VAL; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_msg = "ERR"; + + self->info = sft_detect_transvr_class(self); + /* Disable auto_config */ + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + /* Handle multi-rate */ + err_code = initfunc_sfp_handle_multi_rate_mode(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_multi_rate_mode fail!"; + goto err_transvr_init_sfp_1; + } + /* Handle 1G- RJ45 */ + tmp_val = err_code; + err_code = initfunc_sfp_handle_1g_rj45(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_1g_rj45 fail!"; + goto err_transvr_init_sfp_1; + } + tmp_val = (tmp_val > err_code ? tmp_val : err_code); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_sfp_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_code, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp(struct transvr_obj_s *self){ + + int err = EVENT_TRANSVR_EXCEP_EXCEP; + char *emsg = "ERR"; + + self->info = qsft_detect_transvr_class(self); + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + err = initfunc_qsfp_handle_power_mode(self); + if (err < 0){ + emsg = "initfunc_qsfp_handle_tx_disable fail!"; + goto err_transvr_init_qsfp; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, emsg, err, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp28(struct transvr_obj_s *self){ + + int tmp_val = EVENT_TRANSVR_EXCEP_EXCEP; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_msg = "ERR"; + + /* Handle QSFP common */ + err_val = transvr_init_qsfp(self); + if (err_val < 0){ + err_msg = "transvr_init_qsfp fail!"; + goto err_transvr_init_qsfp28_1; + } + /* Disable auto_config */ + if (!self->auto_config) { + return err_val; + } + /* Handle CDR */ + tmp_val = err_val; + err_val = initfunc_qsfp28_handle_cdr(self); + if (err_val < 0){ + err_msg = "Handle CDR fail!"; + goto err_transvr_init_qsfp28_1; + } + tmp_val = (tmp_val > err_val ? tmp_val : err_val); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp28_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object Initial handler ========== + */ +static int +_is_transvr_valid(struct transvr_obj_s *self, + int type, + int state) { + /* [Return] + * 0 : OK, inserted + * EVENT_TRANSVR_INIT_DOWN : OK, removed + * EVENT_TRANSVR_INIT_FAIL : Outside error, type doesn't supported + * EVENT_TRANSVR_EXCEP_INIT : Internal error, state undefined + */ + switch (type) { + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + break; + default: + SWPS_INFO("detect undefined type:0x%02x on %s\n", + type, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; + } + switch (state) { + case STATE_TRANSVR_DISCONNECTED: + return EVENT_TRANSVR_INIT_DOWN; + case STATE_TRANSVR_INIT: + case STATE_TRANSVR_CONNECTED: + case STATE_TRANSVR_SWAPPED: + break; + default: + SWPS_INFO("detect undefined state:%d on %s\n", + state, self->swp_name); + return EVENT_TRANSVR_EXCEP_INIT; + } + return 0; +} + + +static int +_is_transvr_hw_ready(struct transvr_obj_s *self, + int type){ + /* [Return] + * EVENT_TRANSVR_TASK_DONE : Ready + * EVENT_TRANSVR_TASK_WAIT : Not ready + * EVENT_TRANSVR_INIT_FAIL : Error + */ + int addr = DEBUG_TRANSVR_INT_VAL; + int page = DEBUG_TRANSVR_INT_VAL; + int offs = DEBUG_TRANSVR_INT_VAL; + int bit = DEBUG_TRANSVR_INT_VAL; + int ready = DEBUG_TRANSVR_INT_VAL; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t ab_val = DEBUG_TRANSVR_HEX_VAL; + + switch (type) { + case TRANSVR_TYPE_SFP: + addr = VAL_TRANSVR_8472_READY_ADDR; + page = VAL_TRANSVR_8472_READY_PAGE; + offs = VAL_TRANSVR_8472_READY_OFFSET; + bit = VAL_TRANSVR_8472_READY_BIT; + ready = VAL_TRANSVR_8472_READY_VALUE; + ab_val = VAL_TRANSVR_8472_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + addr = VAL_TRANSVR_8436_READY_ADDR; + page = VAL_TRANSVR_8436_READY_PAGE; + offs = VAL_TRANSVR_8436_READY_OFFSET; + bit = VAL_TRANSVR_8436_READY_BIT; + ready = VAL_TRANSVR_8436_READY_VALUE; + ab_val = VAL_TRANSVR_8436_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + return EVENT_TRANSVR_TASK_DONE; + + default: + emsg = "unexpected case"; + goto err_is_transvr_hw_ready; + } + /* Select target page */ + err = _common_setup_page(self, addr, page, offs, 1, 0); + if (err < 0) { + emsg = "setup page fail"; + goto err_is_transvr_hw_ready; + } + /* Check feature supported + * [Note] + * Some of transceiver/cables doesn't support "Status Indicators" + * (ex:DAC, RJ45 copper SFP ...etc). In these case, we bypass the + * step of checking Status Indicators, then state machine will take + * the following handle procedure. + */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (err < 0) { + emsg = "doesn't support Status Indicators"; + goto bypass_is_transvr_hw_ready; + } + /* Filter abnormal case */ + if (err == ab_val) { + emsg = "detect using unusual definition."; + goto bypass_is_transvr_hw_ready; + } +/*skip data ready check in this stage , move the check in qsfp_data_ready_check() instead*/ +#if 0 + /* Get Status Indicators */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, offs); + if (err < 0) { + emsg = "detect current value fail"; + goto err_is_transvr_hw_ready; + } + if ((err & (1<:%d\n", __func__, emsg, type); + return EVENT_TRANSVR_TASK_DONE; + +err_is_transvr_hw_ready: + SWPS_DEBUG("%s: %s :%d\n", __func__, emsg, type); + return EVENT_TRANSVR_INIT_FAIL; +} + +static int +_is_transvr_support_page03(struct transvr_obj_s *self) { + + switch (self->info) { + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return 1; + default: + break; + } + return 0; +} + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self) { + + switch (self->info) { + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return 1; + default: + break; + } + return 0; +} + + +static int +_transvr_init_handler(struct transvr_obj_s *self){ + + int detect[2]; + int d_state = STATE_TRANSVR_UNEXCEPTED; + int d_type = TRANSVR_TYPE_ERROR; + int result = ERR_TRANSVR_UNINIT; + int retry = 6; /* (6+1) x 0.3 = 2.1s > spec:2.0s */ + int elimit = 63; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Clean and check callback */ + self->state = STATE_TRANSVR_INIT; + if (self->init == NULL) { + snprintf(emsg, elimit, "init() is null"); + goto initer_err_case_unexcept_0; + } + if (self->clean == NULL) { + snprintf(emsg, elimit, "clean() is null"); + goto initer_err_case_unexcept_0; + } + self->clean(self); + + /* Detect transceiver information */ + result = detect_transvr_state(self, detect); + if (result < 0) { + snprintf(emsg, elimit, "detect_transvr_state() fail"); + switch (result) { + case ERR_TRANSVR_I2C_CRASH: + goto initer_err_case_i2c_ceash; + case ERR_TRNASVR_BE_ISOLATED: + goto initer_err_case_be_isolated; + + case ERR_TRANSVR_UNEXCPT: + default: + break; + } + goto initer_err_case_retry_1; + } + d_state = detect[0]; + d_type = detect[1]; + + /* Verify transceiver type and state */ + switch (_is_transvr_valid(self, d_type, d_state)) { + case 0: + break; + case EVENT_TRANSVR_INIT_DOWN: + goto initer_ok_case_down;; + case EVENT_TRANSVR_INIT_FAIL: + snprintf(emsg, elimit, "transceiver type doesn't support"); + goto initer_err_case_alarm_to_user; + case EVENT_TRANSVR_EXCEP_INIT: + default: + goto initer_err_case_unexcept_1; + } + + /* Handle reload case */ + if (self->type != d_type){ + /* This is the protect mechanism. Normally, This case will not happen. + * When State machine detect swap event during initial, It will trigger + * reload function to ensure type correct. */ + if (_reload_transvr_obj(self, d_type) < 0){ + snprintf(emsg, elimit, "reload object fail"); + goto initer_err_case_unexcept_1; + } + } + + /* Check transceiver HW initial ready */ + switch (_is_transvr_hw_ready(self, d_type)) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_err_case_retry_1; + case EVENT_TRANSVR_INIT_FAIL: + default: + goto initer_err_case_unexcept_1; + } + + /* Try to update all and check */ + if (self->update_all(self, 1) < 0){ + /* For some transceiver, EEPROME has lag issues during initial stage. + * In this case, we set status back to STATE_TRANSVR_NEW, than it will + * be checked in next polling cycle. */ + goto initer_err_case_retry_1; + } + + /* Execute init() call back */ + result = self->init(self); + switch (result) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_ok_case_wait; + + default: + snprintf(emsg, elimit, "undefined init() return:%d\n", result); + goto initer_err_case_unexcept_1; + } + goto initer_ok_case_up; + + +initer_ok_case_wait: + self->dump_all(self); + return EVENT_TRANSVR_TASK_WAIT; + +initer_ok_case_up: + self->state = STATE_TRANSVR_CONNECTED; + self->temp = 0; + self->dump_all(self); + return EVENT_TRANSVR_INIT_UP; + +initer_ok_case_down: + self->temp = 0; + self->state = STATE_TRANSVR_DISCONNECTED; + return EVENT_TRANSVR_INIT_DOWN; + +initer_err_case_i2c_ceash: + SWPS_DEBUG("%s: %s :%s :I2C crash\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_I2C_CRASH; + +initer_err_case_be_isolated: + SWPS_DEBUG("%s: %s :%s :isolated\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return EVENT_TRANSVR_EXCEP_ISOLATED; + +initer_err_case_retry_1: + SWPS_DEBUG("%s: %s :%s :retry\n", + __func__, emsg, self->swp_name); + if (_transvr_handle_retry(self, retry) == 0) { + self->state = STATE_TRANSVR_NEW; + return EVENT_TRANSVR_INIT_REINIT; + } + goto initer_err_case_alarm_to_user; + +initer_err_case_unexcept_1: + self->clean(self); +initer_err_case_unexcept_0: + self->state = STATE_TRANSVR_UNEXCEPTED; + if (_is_except_happened_4_pmode(self, d_state) && + (self->mode == TRANSVR_MODE_POLLING) ){ + SWPS_INFO("%s: %s :%s\n", __func__, emsg, self->swp_name); + SWPS_INFO("Dump: :%d :%d :%d :%d\n", + self->state, self->type, d_state, d_type); + } + return EVENT_TRANSVR_INIT_FAIL; + +initer_err_case_alarm_to_user: + SWPS_DEBUG("%s: %s :%s :alarm_to_user\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard"); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object functions for Clean procedure ========== + */ +int +_transvr_clean_handler(struct transvr_obj_s *self){ + + int retval = DEBUG_TRANSVR_INT_VAL; + + if (!self->clean) { + SWPS_ERR("%s: %s clean() is NULL.\n", + __func__, self->swp_name); + return EVENT_TRANSVR_TASK_FAIL; + } + retval = self->clean(self); + if (retval != EVENT_TRANSVR_TASK_DONE){ + SWPS_ERR("%s: %s clean() fail. [ERR]:%d\n", + __func__, self->swp_name, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_transvr_clean(struct transvr_obj_s *self){ + + transvr_task_free_all(self); + transvr_cache_free_all(self); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +qsfp_transvr_clean(struct transvr_obj_s *self){ + + int retval; + int lpower_config = 1; + + retval = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (retval < 0){ + SWPS_ERR("%s: Set lpmod fail! :%d\n", + __func__, retval); + return retval; + } + retval = common_transvr_clean(self); + if (retval < 0){ + SWPS_ERR("%s: common_transvr_clean fail! :%d\n", + __func__, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +fake_transvr_clean(struct transvr_obj_s *self){ + + return EVENT_TRANSVR_TASK_DONE; +} + + +/* ========== Object functions for check and update ========== + */ +int +common_transvr_check(struct transvr_obj_s *self){ + + char fun_str[32] = "common_transvr_check"; + + if (self->mode != TRANSVR_MODE_POLLING) { + SWPS_ERR("%s: mode:%d is not TRANSVR_MODE_POLLING\n", + fun_str, self->mode); + return ERR_TRANSVR_UNEXCPT; + } + /* Trigger delay task */ + transvr_task_run_all(self); + /* Trigger state machine to check and update */ + return self->fsm_4_polling(self, fun_str); +} + + +int +fake_transvr_check(struct transvr_obj_s *self){ + return 0; +} + + +/* ========== Functions for Factory pattern ========== + */ +static int +setup_transvr_public_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->get_id = common_get_id; + self->get_eeprom = common_get_eeprom; + self->get_eeprom_a0 = sfp_get_eeprom_a0; + self->get_eeprom_a2 = sfp_get_eeprom_a2; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = unsupported_get_func; + self->get_br = common_get_br; + self->get_len_sm = sfp_get_len_sm; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = sfp_get_comp_eth_1; + self->get_comp_eth_10 = sfp_get_comp_eth_10; + self->get_comp_eth_10_40 = unsupported_get_func; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = sfp_get_rate_id; + self->get_soft_rs0 = sfp_get_soft_rs0; + self->get_soft_rs1 = sfp_get_soft_rs1; + self->get_info = common_get_info; + self->get_if_type = sfp_get_if_type; + self->get_if_speed = sfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = sfp_get_transvr_temp; + self->get_curr_vol = sfp_get_transvr_voltage; + self->get_soft_rx_los = unsupported_get_func2; + self->get_soft_tx_disable = unsupported_get_func2; + self->get_soft_tx_fault = unsupported_get_func2; + self->get_auto_tx_disable = unsupported_get_func2; + self->get_tx_bias = sfp_get_transvr_tx_bias; + self->get_tx_power = sfp_get_transvr_tx_power; + self->get_rx_power = sfp_get_transvr_rx_power; + self->get_tx_eq = sfp_get_transvr_tx_eq; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = sfp_get_transvr_rx_em; + self->get_wavelength = sfp_get_wavelength; + self->get_extphy_offset = sfp_get_1g_rj45_extphy_offset; + self->get_extphy_reg = sfp_get_1g_rj45_extphy_reg; + self->get_rx_power_low_alarm = sfp_get_rx_power_low_alarm; + self->get_rx_power_high_alarm = sfp_get_rx_power_high_alarm; + self->get_tx_power_low_alarm = sfp_get_tx_power_low_alarm; + self->get_tx_power_high_alarm = sfp_get_tx_power_high_alarm; + self->get_bias_low_alarm = sfp_get_bias_low_alarm; + self->get_bias_high_alarm = sfp_get_bias_high_alarm; + self->get_voltage_low_alarm = sfp_get_voltage_low_alarm; + self->get_voltage_high_alarm = sfp_get_voltage_high_alarm; + self->get_temp_low_alarm = sfp_get_temp_low_alarm; + self->get_temp_high_alarm = sfp_get_temp_high_alarm; + self->get_rx_power_low_alarm_threshold = sfp_get_rx_power_low_alarm_threshold; + self->get_rx_power_high_alarm_threshold = sfp_get_rx_power_high_alarm_threshold; + self->get_tx_power_low_alarm_threshold = sfp_get_tx_power_low_alarm_threshold; + self->get_tx_power_high_alarm_threshold = sfp_get_tx_power_high_alarm_threshold; + self->get_bias_low_alarm_threshold = sfp_get_bias_low_alarm_threshold; + self->get_bias_high_alarm_threshold = sfp_get_bias_high_alarm_threshold; + self->get_voltage_low_alarm_threshold = sfp_get_voltage_low_alarm_threshold; + self->get_voltage_high_alarm_threshold = sfp_get_voltage_high_alarm_threshold; + self->get_temp_low_alarm_threshold = sfp_get_temp_low_alarm_threshold; + self->get_temp_high_alarm_threshold = sfp_get_temp_high_alarm_threshold; + self->get_manufacturing_date = common_get_manufacturing_date; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = sfp_set_soft_rs0; + self->set_soft_rs1 = sfp_set_soft_rs1; + self->set_soft_tx_disable = unsupported_set_func; + self->set_auto_tx_disable = unsupported_set_func; + self->set_tx_eq = sfp_set_tx_eq; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = sfp_set_rx_em; + self->set_extphy_offset = sfp_set_1g_rj45_extphy_offset; + self->set_extphy_reg = sfp_set_1g_rj45_extphy_reg; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->get_id = common_get_id; + self->get_eeprom = common_get_eeprom; + self->get_eeprom_page03 = qsfp_get_eeprom_page03; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = unsupported_get_func2; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = unsupported_get_func2; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->get_rx_power_low_alarm = qsfp_get_rx_power_low_alarm; + self->get_rx_power_high_alarm = qsfp_get_rx_power_high_alarm; + self->get_tx_power_low_alarm = qsfp_get_tx_power_low_alarm; + self->get_tx_power_high_alarm = qsfp_get_tx_power_high_alarm; + self->get_bias_low_alarm = qsfp_get_bias_low_alarm; + self->get_bias_high_alarm = qsfp_get_bias_high_alarm; + self->get_voltage_low_alarm = qsfp_get_voltage_low_alarm; + self->get_voltage_high_alarm = qsfp_get_voltage_high_alarm; + self->get_temp_low_alarm = qsfp_get_temp_low_alarm; + self->get_temp_high_alarm = qsfp_get_temp_high_alarm; + self->get_rx_power_low_alarm_threshold = qsfp_get_rx_power_low_alarm_threshold; + self->get_rx_power_high_alarm_threshold = qsfp_get_rx_power_high_alarm_threshold; + self->get_tx_power_low_alarm_threshold = qsfp_get_tx_power_low_alarm_threshold; + self->get_tx_power_high_alarm_threshold = qsfp_get_tx_power_high_alarm_threshold; + self->get_bias_low_alarm_threshold = qsfp_get_bias_low_alarm_threshold; + self->get_bias_high_alarm_threshold = qsfp_get_bias_high_alarm_threshold; + self->get_voltage_low_alarm_threshold = qsfp_get_voltage_low_alarm_threshold; + self->get_voltage_high_alarm_threshold = qsfp_get_voltage_high_alarm_threshold; + self->get_temp_low_alarm_threshold = qsfp_get_temp_low_alarm_threshold; + self->get_temp_high_alarm_threshold = qsfp_get_temp_high_alarm_threshold; + self->get_manufacturing_date = common_get_manufacturing_date; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = unsupported_set_func; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = unsupported_set_func; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->get_id = common_get_id; + self->get_eeprom = common_get_eeprom; + self->get_eeprom_page03 = qsfp_get_eeprom_page03; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = qsfp_get_cdr; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = qsfp_get_transvr_tx_eq; + self->get_rx_am = qsfp_get_transvr_rx_am; + self->get_rx_em = qsfp_get_transvr_rx_em; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->get_rx_power_low_alarm = qsfp_get_rx_power_low_alarm; + self->get_rx_power_high_alarm = qsfp_get_rx_power_high_alarm; + self->get_tx_power_low_alarm = qsfp_get_tx_power_low_alarm; + self->get_tx_power_high_alarm = qsfp_get_tx_power_high_alarm; + self->get_bias_low_alarm = qsfp_get_bias_low_alarm; + self->get_bias_high_alarm = qsfp_get_bias_high_alarm; + self->get_voltage_low_alarm = qsfp_get_voltage_low_alarm; + self->get_voltage_high_alarm = qsfp_get_voltage_high_alarm; + self->get_temp_low_alarm = qsfp_get_temp_low_alarm; + self->get_temp_high_alarm = qsfp_get_temp_high_alarm; + self->get_rx_power_low_alarm_threshold = qsfp_get_rx_power_low_alarm_threshold; + self->get_rx_power_high_alarm_threshold = qsfp_get_rx_power_high_alarm_threshold; + self->get_tx_power_low_alarm_threshold = qsfp_get_tx_power_low_alarm_threshold; + self->get_tx_power_high_alarm_threshold = qsfp_get_tx_power_high_alarm_threshold; + self->get_bias_low_alarm_threshold = qsfp_get_bias_low_alarm_threshold; + self->get_bias_high_alarm_threshold = qsfp_get_bias_high_alarm_threshold; + self->get_voltage_low_alarm_threshold = qsfp_get_voltage_low_alarm_threshold; + self->get_voltage_high_alarm_threshold = qsfp_get_voltage_high_alarm_threshold; + self->get_temp_low_alarm_threshold = qsfp_get_temp_low_alarm_threshold; + self->get_temp_high_alarm_threshold = qsfp_get_temp_high_alarm_threshold; + self->get_manufacturing_date = common_get_manufacturing_date; + self->set_cdr = qsfp_set_cdr; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = qsfp_set_tx_eq; + self->set_rx_am = qsfp_set_rx_am; + self->set_rx_em = qsfp_set_rx_em; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_FAKE: + self->get_id = fake_get_hex; + self->get_eeprom = fake_get_str; + self->get_eeprom_a0 = fake_get_str; + self->get_eeprom_a2 = fake_get_str; + self->get_eeprom_page03 = fake_get_str; + self->get_ext_id = fake_get_hex; + self->get_connector = fake_get_hex; + self->get_vendor_name = fake_get_str; + self->get_vendor_pn = fake_get_str; + self->get_vendor_rev = fake_get_str; + self->get_vendor_sn = fake_get_str; + self->get_power_cls = fake_get_int; + self->get_br = fake_get_hex; + self->get_len_sm = fake_get_int; + self->get_len_smf = fake_get_int; + self->get_len_om1 = fake_get_int; + self->get_len_om2 = fake_get_int; + self->get_len_om3 = fake_get_int; + self->get_len_om4 = fake_get_int; + self->get_comp_rev = fake_get_hex; + self->get_comp_eth_1 = fake_get_hex; + self->get_comp_eth_10 = fake_get_hex; + self->get_comp_eth_10_40 = fake_get_hex; + self->get_comp_extend = fake_get_hex; + self->get_cdr = fake_get_hex; + self->get_rate_id = fake_get_hex; + self->get_soft_rs0 = fake_get_binary; + self->get_soft_rs1 = fake_get_binary; + self->get_info = fake_get_int; + self->get_if_type = fake_get_str; + self->get_if_speed = fake_get_str; + self->get_if_lane = fake_get_str; + self->get_curr_temp = fake_get_str; + self->get_curr_vol = fake_get_str; + self->get_soft_rx_los = fake_get_str; + self->get_soft_tx_disable = fake_get_str; + self->get_soft_tx_fault = fake_get_str; + self->get_auto_tx_disable = fake_get_str; + self->get_tx_bias = fake_get_str; + self->get_tx_power = fake_get_str; + self->get_rx_power = fake_get_str; + self->get_tx_eq = fake_get_str; + self->get_rx_am = fake_get_str; + self->get_rx_em = fake_get_str; + self->get_wavelength = fake_get_str; + self->get_extphy_offset = fake_get_str; + self->get_extphy_reg = fake_get_str; + self->get_rx_power_low_alarm = fake_get_str; + self->get_rx_power_high_alarm = fake_get_str; + self->get_tx_power_low_alarm = fake_get_str; + self->get_tx_power_high_alarm = fake_get_str; + self->get_bias_low_alarm = fake_get_str; + self->get_bias_high_alarm = fake_get_str; + self->get_voltage_low_alarm = fake_get_str; + self->get_voltage_high_alarm = fake_get_str; + self->get_temp_low_alarm = fake_get_str; + self->get_temp_high_alarm = fake_get_str; + self->get_rx_power_low_alarm_threshold = fake_get_str; + self->get_rx_power_high_alarm_threshold = fake_get_str; + self->get_tx_power_low_alarm_threshold = fake_get_str; + self->get_tx_power_high_alarm_threshold = fake_get_str; + self->get_bias_low_alarm_threshold = fake_get_str; + self->get_bias_high_alarm_threshold = fake_get_str; + self->get_voltage_low_alarm_threshold = fake_get_str; + self->get_voltage_high_alarm_threshold = fake_get_str; + self->get_temp_low_alarm_threshold = fake_get_str; + self->get_temp_high_alarm_threshold = fake_get_str; + self->get_manufacturing_date = fake_get_str; + self->set_cdr = fake_set_hex; + self->set_soft_rs0 = fake_set_int; + self->set_soft_rs1 = fake_set_int; + self->set_soft_tx_disable = fake_set_int; + self->set_auto_tx_disable = fake_set_int; + self->set_tx_eq = fake_set_int; + self->set_rx_am = fake_set_int; + self->set_rx_em = fake_set_int; + self->set_extphy_offset = fake_set_hex; + self->set_extphy_reg = fake_set_hex; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_transvr_private_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->init = transvr_init_sfp; + self->clean = common_transvr_clean; + self->check = common_transvr_check; + self->update_all = _sfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = sfp_send_uevent; + self->dump_all = sfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->init = transvr_init_qsfp; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->init = transvr_init_qsfp28; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_FAKE: + self->init = transvr_init_fake; + self->clean = fake_transvr_clean; + self->check = fake_transvr_check; + self->update_all = fake_transvr_update; + self->fsm_4_direct = fake_fsm_4_direct_mode; + self->fsm_4_polling = fake_fsm_4_polling_mode; + self->send_uevent = fake_send_uevent; + self->dump_all = fake_transvr_dump; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static struct eeprom_map_s * +get_eeprom_map(int transvr_type){ + + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + return &eeprom_map_sfp; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + return &eeprom_map_qsfp; + case TRANSVR_TYPE_QSFP_28: + return &eeprom_map_qsfp28; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return NULL; +} + + +static int +setup_transvr_ssize_attr(char *swp_name, + struct transvr_obj_s *self, + struct eeprom_map_s *map_p, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int chan_id, + int run_mode){ + switch (run_mode){ + case TRANSVR_MODE_DIRECT: /* Direct access device mode */ + case TRANSVR_MODE_POLLING: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = DEBUG_TRANSVR_INT_VAL; + return -1; + } + self->eeprom_map_p = map_p; + self->ioexp_obj_p = ioexp_obj_p; + self->ioexp_virt_offset = ioexp_virt_offset; + self->chan_id = chan_id; + self->layout = transvr_type; + self->type = transvr_type; + self->chipset_type = chipset_type; + self->state = STATE_TRANSVR_NEW; + self->info = STATE_TRANSVR_NEW; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + strncpy(self->swp_name, swp_name, sizeof(self->swp_name)-1); + mutex_init(&self->lock); + return 0; +} + + +static int +setup_transvr_dsize_attr(struct transvr_obj_s *self){ + + char *emsg = DEBUG_TRANSVR_STR_VAL; + + self->vendor_name = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_name){ + emsg = "vendor_name"; + goto err_setup_d_attr; + } + self->vendor_pn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_pn){ + emsg = "vendor_pn"; + goto err_setup_d_attr; + } + self->vendor_rev = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_rev){ + emsg = "vendor_rev"; + goto err_setup_d_attr; + } + self->vendor_sn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_sn){ + emsg = "vendor_sn"; + goto err_setup_d_attr; + } + self->worker_p = NULL; + return 0; + +err_setup_d_attr: + SWPS_ERR("%s: %s kzalloc fail!", __func__, emsg); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_i2c_client(struct transvr_obj_s *self){ + + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + adap = i2c_get_adapter(self->chan_id); + if(!adap){ + snprintf(err_msg, sizeof(err_msg), + "can not get adap:%d", self->chan_id); + goto err_setup_i2c_client; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + snprintf(err_msg, sizeof(err_msg), + "can not kzalloc client:%d", self->chan_id); + goto err_setup_i2c_client; + } + client->adapter = adap; + self->i2c_client_p = client; + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return ERR_TRANSVR_UNEXCPT; +} + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode, + int port_id){ + + struct transvr_obj_s *result_p; + struct eeprom_map_s *map_p; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Allocate transceiver object */ + map_p = get_eeprom_map(transvr_type); + if (!map_p){ + snprintf(err_msg, sizeof(err_msg), + "Invalid transvr_type:%d", transvr_type); + goto err_create_transvr_fail; + } + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_create_transvr_fail; + } + /* Prepare static size attributes */ + if (setup_transvr_ssize_attr(swp_name, + result_p, + map_p, + ioexp_obj_p, + ioexp_virt_offset, + transvr_type, + chipset_type, + chan_id, + run_mode) < 0){ + goto err_create_transvr_sattr_fail; + } + /* Prepare dynamic size attributes */ + if (setup_transvr_dsize_attr(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_public_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_private_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare i2c client object */ + if (setup_i2c_client(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + result_p->port_id = port_id; + return result_p; + +err_create_transvr_dattr_fail: + kfree(result_p->vendor_sn); + kfree(result_p->vendor_rev); + kfree(result_p->vendor_pn); + kfree(result_p->vendor_name); +err_create_transvr_sattr_fail: + kfree(result_p); +err_create_transvr_fail: + SWPS_ERR("%s: %s :%d :%d :%d\n", + __func__, err_msg, chan_id, ioexp_virt_offset, transvr_type); + return NULL; +} +EXPORT_SYMBOL(create_transvr_obj); + + +static int +_reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + struct eeprom_map_s *new_map_p; + struct eeprom_map_s *old_map_p = self->eeprom_map_p; + struct i2c_client *old_i2c_p = self->i2c_client_p; + int old_type = self->type; + + /* Change state to STATE_TRANSVR_INIT */ + self->state = STATE_TRANSVR_INIT; + self->type = new_type; + /* Replace EEPROME map */ + new_map_p = get_eeprom_map(new_type); + if (!new_map_p){ + goto err_private_reload_func_1; + } + self->eeprom_map_p = new_map_p; + /* Reload i2c client */ + if (setup_i2c_client(self) < 0){ + goto err_private_reload_func_2; + } + /* Replace call back functions */ + if (setup_transvr_public_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + if (setup_transvr_private_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + if(old_i2c_p){ + i2c_put_adapter(old_i2c_p->adapter); + } + kfree(old_i2c_p); + return 0; + +err_private_reload_func_3: + SWPS_INFO("%s: init() fail!\n", __func__); + if(old_i2c_p){ + i2c_put_adapter(old_i2c_p->adapter); + } + kfree(old_i2c_p); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return -2; + +err_private_reload_func_2: + self->eeprom_map_p = old_map_p; + self->i2c_client_p = old_i2c_p; +err_private_reload_func_1: + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = old_type; + SWPS_INFO("%s fail! :0x%02x\n", __func__, new_type); + return -1; +} + + +static int +reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + int result_val = ERR_TRANSVR_UNEXCPT; + + /* Reload phase */ + result_val = _reload_transvr_obj(self, new_type); + if (result_val < 0){ + SWPS_INFO("%s: reload phase fail! :%d\n", + __func__, result_val); + return EVENT_TRANSVR_RELOAD_FAIL; + } + /* Initial phase */ + result_val = _transvr_init_handler(self); + if (result_val < 0){ + SWPS_INFO("%s: initial phase fail! :%d\n", + __func__, result_val); + } + return result_val; +} + + +int +isolate_transvr_obj(struct transvr_obj_s *self) { + + self->state = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s be isolated\n", __func__, self->swp_name); + return 0; +} +EXPORT_SYMBOL(isolate_transvr_obj); + + +int +resync_channel_tier_2(struct transvr_obj_s *self) { + + int val = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_ISOLATED) { + return 0; + } + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + val = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (val < 0) { + return -1; + } + return 0; +} +EXPORT_SYMBOL(resync_channel_tier_2); + +/* For build single module using (Ex: ONL platform) */ +MODULE_LICENSE("GPL"); + + +/* ----------------------------------------- + * ToDo List + * ----------------------------------------- + * 1. _sfp_detect_class_by_feature() + * => Need check ACC use case. + * 2. _sfp_detect_class_by_1g_ethernet() + * => Need check 0.1G use case. + * 3. Loopback transceiver use case. + * => Less much data + * 4. _qsfp_detect_class_by_extend_comp() + * => Verify 100G CWDM4 + * => Verify Obsolete (assigned before 100G CWDM4 MSA required FEC) + * => Verify 100G CLR4 + * => Verify 100GE-DWDM2 + * => Verify 40G PSM4 Parallel SMF + * => Verify 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. + * => Verify 100G ACC or 25GAUI C2M ACC. + * => Verify 25GBASE-LR + * => Verify 40G Active Cable (XLPPI) + */ + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/transceiver.h b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/transceiver.h new file mode 100644 index 00000000000..46c173308d1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/transceiver.h @@ -0,0 +1,1041 @@ +#ifndef TRANSCEIVER_H +#define TRANSCEIVER_H + +#include + +/* advanced features control */ +#define TRANSVR_INFO_DUMP_ENABLE (1) +#define TRANSVR_INFO_CACHE_ENABLE (1) +#define TRANSVR_UEVENT_ENABLE (1) + +/* Transceiver type define */ +#define TRANSVR_TYPE_UNKNOW_1 (0x00) +#define TRANSVR_TYPE_UNKNOW_2 (0xff) +#define TRANSVR_TYPE_SFP (0x03) /* Define for SFP, SFP+, SFP28 */ +#define TRANSVR_TYPE_QSFP (0x0c) +#define TRANSVR_TYPE_QSFP_PLUS (0x0d) +#define TRANSVR_TYPE_QSFP_28 (0x11) +#define TRANSVR_TYPE_UNPLUGGED (0xfa) /* Define for ERROR handle */ +#define TRANSVR_TYPE_FAKE (0xfc) /* Define for ERROR handle */ +#define TRANSVR_TYPE_INCONSISTENT (0xfd) /* Define for ERROR handle */ +#define TRANSVR_TYPE_ERROR (0xfe) /* Define for ERROR handle */ + +/* Transceiver class for base info */ +#define TRANSVR_CLASS_UNSPECIFIED (0) +#define TRANSVR_CLASS_ERROR (-26001) +#define TRANSVR_CLASS_1G (26001) +#define TRANSVR_CLASS_10G (26011) +#define TRANSVR_CLASS_25G (26021) +#define TRANSVR_CLASS_40G (26041) +#define TRANSVR_CLASS_100G (26101) +#define TRANSVR_CLASS_NO_SPERARABLE (26901) +#define TRANSVR_CLASS_EXTEND_COMP (26902) +/* Transceiver class for Optical 1G */ +#define TRANSVR_CLASS_OPTICAL (27000) +#define TRANSVR_CLASS_OPTICAL_100 (27001) +#define TRANSVR_CLASS_OPTICAL_1G (27002) +#define TRANSVR_CLASS_OPTICAL_1G_AOC (27003) +#define TRANSVR_CLASS_OPTICAL_1G_SX (27004) +#define TRANSVR_CLASS_OPTICAL_1G_LX (27005) +#define TRANSVR_CLASS_OPTICAL_1G_EX (27006) +/* Transceiver class for Optical 10G */ +#define TRANSVR_CLASS_OPTICAL_10G (27010) +#define TRANSVR_CLASS_OPTICAL_10G_S_AOC (27011) +#define TRANSVR_CLASS_OPTICAL_10G_S_SR (27012) +#define TRANSVR_CLASS_OPTICAL_10G_S_LR (27013) +#define TRANSVR_CLASS_OPTICAL_10G_S_ER (27014) +#define TRANSVR_CLASS_OPTICAL_10G_Q_AOC (27015) +#define TRANSVR_CLASS_OPTICAL_10G_Q_SR (27016) +#define TRANSVR_CLASS_OPTICAL_10G_Q_LR (27017) +#define TRANSVR_CLASS_OPTICAL_10G_Q_ER (27018) +/* Transceiver class for Optical 25G */ +#define TRANSVR_CLASS_OPTICAL_25G (27020) +#define TRANSVR_CLASS_OPTICAL_25G_AOC (27021) +#define TRANSVR_CLASS_OPTICAL_25G_SR (27022) +#define TRANSVR_CLASS_OPTICAL_25G_LR (27023) +#define TRANSVR_CLASS_OPTICAL_25G_ER (27024) +/* Transceiver class for Optical 40G */ +#define TRANSVR_CLASS_OPTICAL_40G (27040) +#define TRANSVR_CLASS_OPTICAL_40G_AOC (27041) +#define TRANSVR_CLASS_OPTICAL_40G_SR4 (27042) +#define TRANSVR_CLASS_OPTICAL_40G_LR4 (27043) +#define TRANSVR_CLASS_OPTICAL_40G_ER4 (27044) +/* Transceiver class for Optical 100G */ +#define TRANSVR_CLASS_OPTICAL_100G (27100) +#define TRANSVR_CLASS_OPTICAL_100G_AOC (27101) +#define TRANSVR_CLASS_OPTICAL_100G_SR4 (27102) +#define TRANSVR_CLASS_OPTICAL_100G_LR4 (27103) +#define TRANSVR_CLASS_OPTICAL_100G_ER4 (27104) +#define TRANSVR_CLASS_OPTICAL_100G_PSM4 (27105) +/* Transceiver class for Copper */ +#define TRANSVR_CLASS_COPPER (28000) +#define TRANSVR_CLASS_COPPER_L1_1G (28001) +#define TRANSVR_CLASS_COPPER_L1_10G (28011) +#define TRANSVR_CLASS_COPPER_L4_10G (28012) +#define TRANSVR_CLASS_COPPER_L1_25G (28021) +#define TRANSVR_CLASS_COPPER_L4_40G (28041) +#define TRANSVR_CLASS_COPPER_L4_100G (28101) +/* Transceiver class for Base-T */ +#define TRANSVR_CLASS_BASE_T_1000 (29001) +#define TRANSVR_CLASS_BASE_T_1000_up (29002) +/* For uevent message */ +#define TRANSVR_UEVENT_KEY_IF "IF_TYPE" +#define TRANSVR_UEVENT_KEY_SP "IF_SPEED" +#define TRANSVR_UEVENT_KEY_LANE "IF_LANE" +#define TRANSVR_UEVENT_UNKNOW "UNKNOW" +#define TRANSVR_IF_KR "KR" +#define TRANSVR_IF_KR4 "KR4" +#define TRANSVR_IF_SR "SR" +#define TRANSVR_IF_SR4 "SR4" +#define TRANSVR_IF_SFI "SFI" +#define TRANSVR_IF_IF_GMII "GMII" +#define TRANSVR_IF_IF_XGMII "XGMII" +#define TRANSVR_IF_SP_100 "100" +#define TRANSVR_IF_SP_1G "1000" +#define TRANSVR_IF_SP_10G "10000" +#define TRANSVR_IF_SP_25G "25000" +#define TRANSVR_IF_SP_40G "40000" +#define TRANSVR_IF_SP_100G "100000" + +/* Transceiver mode define */ +#define TRANSVR_MODE_DIRECT (21000) +#define TRANSVR_MODE_POLLING (21001) + +/* Transceiver state define + * [Note] + * 1. State is used to represent the state of "Transceiver" and "Object". + * 2. State for different target has different means. The description as following: + */ +#define STATE_TRANSVR_CONNECTED (0) /* [Transvr]:Be plugged in. [Obj]:Link up, and work normally. */ +#define STATE_TRANSVR_NEW (-100) /* [Transvr]:(Not used) [Obj]:Create */ +#define STATE_TRANSVR_INIT (-101) /* [Transvr]:Be plugged in. [Obj]:Link up, and in initial process. */ +#define STATE_TRANSVR_ISOLATED (-102) /* [Transvr]:Be plugged in. [Obj]:Isolate, and not provide service. */ +#define STATE_TRANSVR_SWAPPED (-200) /* [Transvr]:Be plugged in. [Obj]:(Not used) */ +#define STATE_TRANSVR_DISCONNECTED (-300) /* [Transvr]:Un-plugged. [Obj]:Link down, and not provide service. */ +#define STATE_TRANSVR_UNEXCEPTED (-901) /* [Transvr]:Any [Obj]:Any, and not in expect case. */ + +/* Task state define */ +#define STATE_T_TASK_WAIT (110) +#define STATE_T_TASK_DONE (0) +#define STATE_T_TASK_INIT (-110) +#define STATE_T_TASK_FAIL (-410) + + +/* Event for task handling */ +#define EVENT_TRANSVR_TASK_WAIT (2101) +#define EVENT_TRANSVR_TASK_DONE (0) +#define EVENT_TRANSVR_TASK_FAIL (-2101) +/* Event for initial handling */ +#define EVENT_TRANSVR_INIT_UP (2201) +#define EVENT_TRANSVR_INIT_DOWN (1) +#define EVENT_TRANSVR_INIT_REINIT (-2201) +#define EVENT_TRANSVR_INIT_FAIL (-2202) +/* Event for others */ +#define EVENT_TRANSVR_RELOAD_FAIL (-2301) +#define EVENT_TRANSVR_EXCEP_INIT (-2401) +#define EVENT_TRANSVR_EXCEP_UP (-2402) +#define EVENT_TRANSVR_EXCEP_DOWN (-2403) +#define EVENT_TRANSVR_EXCEP_SWAP (-2404) +#define EVENT_TRANSVR_EXCEP_EXCEP (-2405) +#define EVENT_TRANSVR_EXCEP_ISOLATED (-2406) +#define EVENT_TRANSVR_I2C_CRASH (-2501) + +/* Transceiver error code define */ +#define ERR_TRANSVR_UNINIT (-201) +#define ERR_TRANSVR_UNPLUGGED (-202) +#define ERR_TRANSVR_ABNORMAL (-203) +#define ERR_TRANSVR_NOSTATE (-204) +#define ERR_TRANSVR_NOTSUPPORT (-205) +#define ERR_TRANSVR_BADINPUT (-206) +#define ERR_TRANSVR_UPDATE_FAIL (-207) +#define ERR_TRANSVR_RELOAD_FAIL (-208) +#define ERR_TRANSVR_INIT_FAIL (-209) +#define ERR_TRANSVR_UNDEFINED (-210) +#define ERR_TRANSVR_TASK_FAIL (-211) +#define ERR_TRANSVR_TASK_BUSY (-212) +#define ERR_TRANSVR_UEVENT_FAIL (-213) +#define ERR_TRANSVR_FUNC_DISABLE (-214) +#define ERR_TRANSVR_I2C_CRASH (-297) +#define ERR_TRNASVR_BE_ISOLATED (-298) +#define ERR_TRANSVR_UNEXCPT (-299) + +/* For debug */ +#define DEBUG_TRANSVR_INT_VAL (-99) +#define DEBUG_TRANSVR_HEX_VAL (0xfe) +#define DEBUG_TRANSVR_STR_VAL "ERROR" + +/* For system internal */ +#define VAL_TRANSVR_COMID_ARREESS (0x50) +#define VAL_TRANSVR_COMID_OFFSET (0x00) +#define VAL_TRANSVR_EXTPHY_ADDR_56 (0x56) +#define VAL_TRANSVR_8472_READY_ADDR (0x51) +#define VAL_TRANSVR_8472_READY_PAGE (-1) +#define VAL_TRANSVR_8472_READY_OFFSET (110) +#define VAL_TRANSVR_8472_READY_BIT (0) +#define VAL_TRANSVR_8472_READY_VALUE (0) +#define VAL_TRANSVR_8472_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_READY_ADDR (0x50) +#define VAL_TRANSVR_8436_READY_PAGE (-1) +#define VAL_TRANSVR_8436_READY_OFFSET (2) +#define VAL_TRANSVR_8436_READY_BIT (0) +#define VAL_TRANSVR_8436_READY_VALUE (0) +#define VAL_TRANSVR_8436_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_PWD_ADDR (0x50) +#define VAL_TRANSVR_8436_PWD_PAGE (-1) +#define VAL_TRANSVR_8436_PWD_OFFSET (123) +#define VAL_TRANSVR_PAGE_FREE (-99) +#define VAL_TRANSVR_PAGE_SELECT_OFFSET (127) +#define VAL_TRANSVR_PAGE_SELECT_DELAY (5) +#define VAL_TRANSVR_TASK_RETRY_FOREVER (-999) +#define VAL_TRANSVR_FUNCTION_DISABLE (-1) +#define STR_TRANSVR_SFP "SFP" +#define STR_TRANSVR_QSFP "QSFP" +#define STR_TRANSVR_QSFP_PLUS "QSFP+" +#define STR_TRANSVR_QSFP28 "QSFP28" + +/* For transvr buf len */ +#define LEN_TRANSVR_S_STR (16) +#define LEN_TRANSVR_M_STR (32) +#define LEN_TRANSVR_L_STR (64) + +/* Optical wavelength */ +#define VAL_OPTICAL_WAVELENGTH_SR (850) +#define VAL_OPTICAL_WAVELENGTH_LR (1310) +#define VAL_OPTICAL_WAVELENGTH_ER (1550) + +/* BCM chip type define */ +#define BCM_CHIP_TYPE_TRIDENT_2 (31001) /* Magnolia, Hudson32i, Spruce */ +#define BCM_CHIP_TYPE_TOMAHAWK (31002) /* Redwood, Cypress, Sequoia */ +#define BCM_CHIP_TYPE_TRIDENT_3 (31003) /* Maple */ + +#define BF_CHIP_TYPE_TOFINO (31011) /* Lavender */ + +/* Info from transceiver EEPROM */ +struct eeprom_map_s { + int addr_br; int page_br; int offset_br; int length_br; + int addr_cdr; int page_cdr; int offset_cdr; int length_cdr; + int addr_comp_rev; int page_comp_rev; int offset_comp_rev; int length_comp_rev; + int addr_connector; int page_connector; int offset_connector; int length_connector; + int addr_diag_type; int page_diag_type; int offset_diag_type; int length_diag_type; + int addr_extbr; int page_extbr; int offset_extbr; int length_extbr; + int addr_ext_id; int page_ext_id; int offset_ext_id; int length_ext_id; + int addr_id; int page_id; int offset_id; int length_id; + int addr_eeprom; int page_eeprom; int offset_eeprom; int length_eeprom; + int addr_eeprom_a0; int page_eeprom_a0; int offset_eeprom_a0; int length_eeprom_a0; + int addr_eeprom_a2; int page_eeprom_a2; int offset_eeprom_a2; int length_eeprom_a2; + int addr_eeprom_page03;int page_eeprom_page03;int offset_eeprom_page03;int length_eeprom_page03; + int addr_len_sm; int page_len_sm; int offset_len_sm; int length_len_sm; + int addr_len_smf; int page_len_smf; int offset_len_smf; int length_len_smf; + int addr_len_om1; int page_len_om1; int offset_len_om1; int length_len_om1; + int addr_len_om2; int page_len_om2; int offset_len_om2; int length_len_om2; + int addr_len_om3; int page_len_om3; int offset_len_om3; int length_len_om3; + int addr_len_om4; int page_len_om4; int offset_len_om4; int length_len_om4; + int addr_option; int page_option; int offset_option; int length_option; + int addr_rate_id; int page_rate_id; int offset_rate_id; int length_rate_id; + int addr_rx_am; int page_rx_am; int offset_rx_am; int length_rx_am; + int addr_rx_em; int page_rx_em; int offset_rx_em; int length_rx_em; + int addr_rx_los; int page_rx_los; int offset_rx_los; int length_rx_los; + int addr_rx_power; int page_rx_power; int offset_rx_power; int length_rx_power; + int addr_soft_rs0; int page_soft_rs0; int offset_soft_rs0; int length_soft_rs0; + int addr_soft_rs1; int page_soft_rs1; int offset_soft_rs1; int length_soft_rs1; + int addr_temp; int page_temp; int offset_temp; int length_temp; + int addr_trancomp; int page_trancomp; int offset_trancomp; int length_trancomp; + int addr_trancomp_ext; int page_trancomp_ext; int offset_trancomp_ext; int length_trancomp_ext; + int addr_tx_bias; int page_tx_bias; int offset_tx_bias; int length_tx_bias; + int addr_tx_disable; int page_tx_disable; int offset_tx_disable; int length_tx_disable; + int addr_tx_eq; int page_tx_eq; int offset_tx_eq; int length_tx_eq; + int addr_tx_fault; int page_tx_fault; int offset_tx_fault; int length_tx_fault; + int addr_tx_power; int page_tx_power; int offset_tx_power; int length_tx_power; + int addr_vendor_name; int page_vendor_name; int offset_vendor_name; int length_vendor_name; + int addr_vendor_pn; int page_vendor_pn; int offset_vendor_pn; int length_vendor_pn; + int addr_vendor_rev; int page_vendor_rev; int offset_vendor_rev; int length_vendor_rev; + int addr_vendor_sn; int page_vendor_sn; int offset_vendor_sn; int length_vendor_sn; + int addr_voltage; int page_voltage; int offset_voltage; int length_voltage; + int addr_wavelength; int page_wavelength; int offset_wavelength; int length_wavelength; + int addr_alarm_flag_byte_1; int page_alarm_flag_byte_1; int offset_alarm_flag_byte_1; int length_alarm_flag_byte_1; + int addr_alarm_flag_byte_2; int page_alarm_flag_byte_2; int offset_alarm_flag_byte_2; int length_alarm_flag_byte_2; + int addr_temp_alarm; int page_temp_alarm; int offset_temp_alarm; int length_temp_alarm; + int addr_voltage_alarm; int page_voltage_alarm; int offset_voltage_alarm; int length_voltage_alarm; + int addr_bias_alarm; int page_bias_alarm; int offset_bias_alarm; int length_bias_alarm; + int addr_tx_power_alarm; int page_tx_power_alarm; int offset_tx_power_alarm; int length_tx_power_alarm; + int addr_rx_power_alarm; int page_rx_power_alarm; int offset_rx_power_alarm; int length_rx_power_alarm; + int addr_temp_high_alarm_threshold; int page_temp_high_alarm_threshold; int offset_temp_high_alarm_threshold; int length_temp_high_alarm_threshold; + int addr_temp_low_alarm_threshold; int page_temp_low_alarm_threshold; int offset_temp_low_alarm_threshold; int length_temp_low_alarm_threshold; + int addr_voltage_high_alarm_threshold; int page_voltage_high_alarm_threshold; int offset_voltage_high_alarm_threshold; int length_voltage_high_alarm_threshold; + int addr_voltage_low_alarm_threshold; int page_voltage_low_alarm_threshold; int offset_voltage_low_alarm_threshold; int length_voltage_low_alarm_threshold; + int addr_bias_high_alarm_threshold; int page_bias_high_alarm_threshold; int offset_bias_high_alarm_threshold; int length_bias_high_alarm_threshold; + int addr_bias_low_alarm_threshold; int page_bias_low_alarm_threshold; int offset_bias_low_alarm_threshold; int length_bias_low_alarm_threshold; + int addr_tx_power_high_alarm_threshold; int page_tx_power_high_alarm_threshold; int offset_tx_power_high_alarm_threshold; int length_tx_power_high_alarm_threshold; + int addr_tx_power_low_alarm_threshold; int page_tx_power_low_alarm_threshold; int offset_tx_power_low_alarm_threshold; int length_tx_power_low_alarm_threshold; + int addr_rx_power_high_alarm_threshold; int page_rx_power_high_alarm_threshold; int offset_rx_power_high_alarm_threshold; int length_rx_power_high_alarm_threshold; + int addr_rx_power_low_alarm_threshold; int page_rx_power_low_alarm_threshold; int offset_rx_power_low_alarm_threshold; int length_rx_power_low_alarm_threshold; + int addr_manufacturing_date; int page_manufacturing_date; int offset_manufacturing_date; int length_manufacturing_date; +}; + + +struct transvr_worker_s; + +/* Class of transceiver object */ +struct transvr_obj_s { + /*io isr mode*/ + int port_id; + int detect_type_count; + /* ========== Object private property ========== + * [Prop]: id + * [Desc]: Type of serial transceiver. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh /QSFP28:11h + */ + uint8_t id; + + /* [Prop]: connector + * [Desc]: Connector type. + * [Note]: SFP : A0h / 2 + * QSFP: 00h / 130 + */ + uint8_t connector; + + /* [Prop]: transvr_comp + * [Desc]: Transceiver compliance code. + * [Note]: SFP: SFF-8472 + * - Normal : A0h / offset 3-10 + * - Extended: A0h / offset 36 + * QSFP: SFF-8436 & SFF-8636 + * - Normal : 00h / offset 131-138 + * - Extended: 00h / offset 192 + */ + uint8_t transvr_comp[8]; + uint8_t transvr_comp_ext; + + /* [Prop]: vendor_name + * [Desc]: SFP vendor name (ASCII 16 byte char). + * [Note]: ex:FINISAR CORP. + */ + char *vendor_name; + + /* [Prop]: vendor_pn + * [Desc]: Part number provided by SFP vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_pn; + + /* [Prop]: vendor_rev + * [Desc]: Revision level for part number provided by vendor (ASCII 4 byte char). + * [Note]: + */ + char *vendor_rev; + + /* [Prop]: vendor_sn + * [Desc]: Serial number provided by vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_sn; + + /* [Prop]: Extended identifier + * [Desc]: SFP: + * => None + * + * QSFP: + * => This byte contained two information: + * (1) Power consumption class + * (2) CDR function present + * [Note]: Bit description as below: + * [SFP] + * None + * + * [QSFP] + * (1) Power consumption class: + * Class 1: 1.5W (Bit6-7 = 00:) + * Class 2: 2.0W (Bit6-7 = 01:) + * Class 3: 2.5W (Bit6-7 = 10:) + * Class 4: 3.5W (Bit6-7 = 11:) + * Class 5: 4.0W (Bit0-1 = 01:) + * Class 6: 4.5W (Bit0-1 = 10:) + * Class 7: 5.0W (Bit0-1 = 11:) + * (2) CDR function present: + * Bit2: 0 = No CDR in RX + * 1 = CDR present in RX + * Bit3: 0 = No CDR in TX + * 1 = CDR present in TX + */ + uint8_t ext_id; + + /* [Prop]: br + * [Desc]: Nominal bit rate, units of 100 MBits/sec. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh + * has val: 0x67 + * no val : + */ + uint8_t br; + + /* [Prop]: extbr + * [Desc]: Extended br (00h/222) + * [Desc]: Nominal bit rate per channel, units of 250 Mbps. + * Complements. Byte 140. See Table 32A. + */ + uint8_t extbr; + + /* [Prop]: len_sm + * [Desc]: Length (single mode)-(100's)m + * [Note]: This value specifies the link length that is supported by the transceiver + * while operating in compliance with the applicable standards using single mode + * fiber. The value is in units of 100 meters. A value of 255 means that the + * transceiver supports a link length greater than 25.4 km. A value of zero means + * that the transceiver does not support single mode fiber or that the length + * information must be determined from the transceiver technology. + */ + int len_sm; + + /* [Prop]: len_smf + * [Desc]: Length (single mode)-km + * [Note]: Addition to EEPROM data from original GBIC definition. This value specifies + * the link length that is supported by the transceiver while operating in + * compliance with the applicable standards using single mode fiber. The value + * is in units of kilometers. A value of 255 means that the transceiver supports + * a link length greater than 254 km. A value of zero means that the transceiver + * does not support single mode fiber or that the length information must be + * determined from the transceiver technology. + */ + int len_smf; + + /* [Prop]: len_om1 + * [Desc]: Link length supported for 62.5 um OM1 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om1; + + /* [Prop]: len_om2 + * [Desc]: Link length supported for 50 um OM2 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om2; + + /* [Prop]: len_om3 + * [Desc]: Length (50um, OM3) + * [Note]: This value specifies link length that is supported by the transceiver while + * operating in compliance with applicable standards using 50 micron multimode + * OM3 [2000 MHz*km] fiber. The value is in units of 10 meters. A value of 255 + * means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber + * or that the length information must be determined from the transceiver technology. + */ + int len_om3; + + /* [Prop]: len_om4 + * [Desc]: Length (50um, OM4) and Length (Active Cable or Copper) + * [Note]: For optical links, this value specifies link length that is supported by the + * transceiver while operating in compliance with applicable standards using 50 micron + * multimode OM4 [4700 MHz*km] fiber. The value is in units of 10 meters. A value of + * 255 means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber or that + * the length information must be determined from the transceiver codes specified in Table 5-3. + * + * For copper links, this value specifies minimum link length supported by the transceiver + * while operating in compliance with applicable standards using copper cable. For active + * cable, this value represents actual length. The value is in units of 1 meter. A value of 255 + * means the transceiver supports a link length greater than 254 meters. A value of zero means + * the transceiver does not support copper or active cables or the length information must be + * determined from transceiver technology. Further information about cable design, equalization, + * and connectors is usually required to guarantee meeting a particular length requirement. + */ + int len_om4; + + /* [Prop]: comp_rev + * [Desc]: SFF spec revision compliance + * [Note]: Indicates which revision of SFF SFF-8472 (SFP) / SFF-8636 (QSFP) the transceiver + * complies with. (unsigned integer) + */ + uint8_t comp_rev; + + /* [Prop]: CDR + * [Desc]: For transceivers with CDR capability, setting the CDR to ON engages the internal + * retiming function. Setting the CDR to OFF enables an internal bypassing mode ,which + * directs traffic around the internal CDR. (Reference: SFF-8636) + * [Note]: value=0xff: ON. + * value=0x00: OFF. + */ + uint8_t cdr; + + /* [Prop]: rate_id + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Addr: A0h / Offset: 13 + * 2. Value description: + * 00h Unspecified + * 01h SFF-8079 (4/2/1G Rate_Select & AS0/AS1) + * 02h SFF-8431 (8/4/2G Rx Rate_Select only) + * 03h Unspecified * + * 04h SFF-8431 (8/4/2G Tx Rate_Select only) + * 05h Unspecified * + * 06h SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) + * 07h Unspecified * + * 08h FC-PI-5 (16/8/4G Rx Rate_select only) High=16G only, Low=8G/4G + * 09h Unspecified * + * 0Ah FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) High=16G only, + * Low=8G/4G + * 0Bh Unspecified * + * 0Ch FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + * 0Dh Unspecified * + * 0Eh 10/8G Rx and Tx Rate_Select controlling the operation or locking + * modes of the internal signal conditioner, retimer or CDR, according + * to the logic table defined in Table 10-2, High Bit Rate + * (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = 8.5 Gb/s. In this mode, + * the default value of bit 110.3 (Soft Rate Select RS(0), Table 9-11) + * and of bit 118.3 (Soft Rate Select RS(1), Table 10-1) is 1. + * 0Fh Unspecified * + * 10h-FFh Unallocated + */ + int rate_id; + + /* [Prop]: soft_rs0 + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Writing '1' selects full bandwidth operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(0) or RS(0) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 110 / Bit: 3 + */ + uint8_t soft_rs0; + + /* [Prop]: soft_rs1 + * [Desc]: Soft Rate Select 1(TX). + * [Note]: 1. Writing '1' selects full bandwidth TX operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(1) or RS(1) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 118 / Bit: 3 + */ + uint8_t soft_rs1; + + /* [Prop]: diag_type + * [Desc]: DIAGNOSTIC MONITORING TYPE (A0h/92) + * [Note]: Description in SFF-8472 as below: + * Bit7: Reserved for legacy diagnostic implementations. Must be '0' for compliance + * with this document. + * Bit6: Digital diagnostic monitoring implemented (described in this document). + * Must be '1' for compliance with this document. + * Bit5 Internally calibrated + * Bit4 Externally calibrated + * Bit3 Received power measurement type.0 = OMA, 1 = average power + * Bit2 Address change required see section above, "addressing modes" + * Bit1-0 Unallocated + */ + uint8_t diag_type; + + /* [Prop]: curr_temp + * [Desc]: Transceiver Current Temperature (A2h/96-97) + * [Note]: 1. Dependent on diag_type. + * 2. 96: High byte + * 3. 97: Low byte + * 4. This feature only for SFP + */ + uint8_t curr_temp[2]; + + /* [Prop]: curr_vol + * [Desc]: Transceiver Current Voltage (SFP:A2h/108-109; QSFP:00h/22-23) + * [Note]: 1. Dependent on diag_type. + * 2. 98: High byte + * 3. 99: Low byte + * 4. This feature only for SFP + * 5. Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts + */ + uint8_t curr_voltage[2]; + + /* [Prop]: curr_tx_bias + * [Desc]: Transceiver TX Bias Current (SFP:A2h/100-101; QSFP:00h/26-27) + * [Note]: 1. Dependent on diag_type. + * 2. 100: High byte + * 3. 101: Low byte + * 4. This feature only for SFP + * 5. Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + uint8_t curr_tx_bias[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + uint8_t curr_tx_power[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + uint8_t curr_rx_power[8]; + + /* [Prop]: wavelength + * [Desc]: Wavelength or Copper Cable Attenuation + * [Note]: (Following is info from SFF-8636) + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is a + * 16-bit hex value with Byte 186 as high order byte and Byte 187 as low + * order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. If the free side device is identified as + * copper cable these registers will be used to define the cable attenuation. + * An indication of 0 dB attenuation refers to the case where the attenuation + * is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + uint8_t wavelength[2]; + + /* [Prop]: Amplitude control + * [Desc]: Amplitude control + * [Note]: QSFP28 => SFF-8636 03H Byte-238/239 + */ + uint8_t rx_am[2]; + + /* [Prop]: Emphasis control + * [Desc]: Emphasis control + * [Note]: SFP+/28 => SFF-8472 A2H Byte-115 + * QSFP28 => SFF-8636 03H Byte-236/237 + */ + uint8_t rx_em[2]; + + /* [Prop]: Soft Rx LOS + * [Desc]: Soft Rx LOS which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 3: + * - Bit 0: L-Rx1 LOS + * - Bit 1: L-Rx2 LOS + * - Bit 2: L-Rx3 LOS + * - Bit 3: L-Rx4 LOS + */ + uint8_t rx_los; + + /* [Prop]: Soft Tx Disable + * [Desc]: Soft Tx Disable which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Disable + * - Bit 1: Tx2 Disable + * - Bit 2: Tx3 Disable + * - Bit 3: Tx4 Disable + */ + uint8_t tx_disable; + + /* [Prop]: Soft Tx Fault + * [Desc]: Soft Tx Fault which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 4: + * - Bit 0: Tx1 Fault + * - Bit 1: Tx2 Fault + * - Bit 2: Tx3 Fault + * - Bit 3: Tx4 Fault + */ + uint8_t tx_fault; + + /* [Prop]: Transceiver EQUALIZATION + * [Desc]: Transceiver EQUALIZATION + * [Note]: SFP+/28 => SFF-8472 A2H Byte-114 + * QSFP28 => SFF-8636 03H Byte-234/235 + */ + uint8_t tx_eq[2]; + + /* [Prop]: OPTION VALUES + * [Desc]: The bits in the option field shall specify the options implemented in the transceiver. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-64/65 + * QSFP+/28 => SFF-8636 00H Byte-193/195 + */ + uint8_t option[3]; + + /* [Prop]: External PHY offset + * [Desc]: It needs to be setup first if you want to access transceiver external phy. + * [Note]: This feature dependent on transceiver. + * Currently, only 1G-RJ45 transceiver supported it. + */ + uint8_t extphy_offset; + + /* [Prop]: EEPROM information + * [Desc]: Dump the original EERPOM hex code. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-0~255 + * QSFP28 => SFF-8636 P0H Byte-0~255 + */ + uint8_t eeprom[256]; + + /* [Prop]: EEPROM information + * [Desc]: Dump the original EERPOM hex code of SFP A0H. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-0~127 + */ + uint8_t eeprom_a0[128]; + + /* [Prop]: EEPROM information + * [Desc]: Dump the original EERPOM hex code of SFP A2H. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-0~127 + */ + uint8_t eeprom_a2[128]; + + /* [Prop]: EEPROM information + * [Desc]: Dump the original EERPOM hex code of QSFP Page 03. + * [Note]: QSFP28 => SFF-8636 P3H Byte-0~127 + */ + uint8_t eeprom_page03[128]; + + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias High Alarm Bit-3 + * Tx Bias Low Alarm Bit-2 + * Tx Power High Alarm Bit-1 + * Tx Power Low Alarm Bit-0 + */ + uint8_t alarm_flag_byte_1; + + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-113 + * Rx Power High Alarm Bit-7 + * Rx Power Low Alarm Bit-6 + */ + uint8_t alarm_flag_byte_2; + + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP Temp Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-6 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + */ + uint8_t temp_alarm; + + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP voltage Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-7 + * voltage High Alarm Bit-7 + * voltage Low Alarm Bit-6 + */ + uint8_t voltage_alarm; + + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP RX Power Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-9~10 + * RX1 Power High Alarm Byte-9 Bit-7 + * RX1 Power Low Alarm Byte-9 Bit-6 + * RX2 Power High Alarm Byte-9 Bit-3 + * RX2 Power Low Alarm Byte-9 Bit-2 + * RX3 Power High Alarm Byte-10 Bit-7 + * RX3 Power Low Alarm Byte-10 Bit-6 + * RX4 Power High Alarm Byte-10 Bit-3 + * RX4 Power Low Alarm Byte-10 Bit-2 + */ + uint8_t rx_power_alarm[2]; + + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP TX bias Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-11~12 + * TX1 bias High Alarm Byte-11 Bit-7 + * TX1 bias Low Alarm Byte-11 Bit-6 + * TX2 bias High Alarm Byte-11 Bit-3 + * TX2 bias Low Alarm Byte-11 Bit-2 + * TX3 bias High Alarm Byte-12 Bit-7 + * TX3 bias Low Alarm Byte-12 Bit-6 + * TX4 bias High Alarm Byte-12 Bit-3 + * TX4 bias Low Alarm Byte-12 Bit-2 + */ + uint8_t bias_alarm[2]; + + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP TX Power Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-13~14 + * TX1 Power High Alarm Byte-13 Bit-7 + * TX1 Power Low Alarm Byte-13 Bit-6 + * TX2 Power High Alarm Byte-13 Bit-3 + * TX2 Power Low Alarm Byte-13 Bit-2 + * TX3 Power High Alarm Byte-14 Bit-7 + * TX3 Power Low Alarm Byte-14 Bit-6 + * TX4 Power High Alarm Byte-14 Bit-3 + * TX4 Power Low Alarm Byte-14 Bit-2 + */ + uint8_t tx_power_alarm[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver temperature high alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-0~1 + * QSFP28 => SFF-8636 P3H Byte-128~129 + */ + uint8_t temp_high_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver temperature low alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-2~3 + * QSFP28 => SFF-8636 P3H Byte-130~131 + */ + uint8_t temp_low_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver voltage high alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-8~9 + * QSFP28 => SFF-8636 P3H Byte-144~145 + */ + uint8_t voltage_high_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver voltage low alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-10~11 + * QSFP28 => SFF-8636 P3H Byte-146~147 + */ + uint8_t voltage_low_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver TX bias high alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-16~17 + * QSFP28 => SFF-8636 P3H Byte-184~185 + */ + uint8_t bias_high_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver TX bias low alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-18~19 + * QSFP28 => SFF-8636 P3H Byte-186~187 + */ + uint8_t bias_low_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver TX power high alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-24~25 + * QSFP28 => SFF-8636 P3H Byte-192~193 + */ + uint8_t tx_power_high_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver TX power low alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-26~27 + * QSFP28 => SFF-8636 P3H Byte-194~195 + */ + uint8_t tx_power_low_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver RX power high alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-36~37 + * QSFP28 => SFF-8636 P3H Byte-176~177 + */ + uint8_t rx_power_high_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver RX power low alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-38~39 + * QSFP28 => SFF-8636 P3H Byte-178~179 + */ + uint8_t rx_power_low_alarm_threshold[2]; + + /* [Prop]: Date code + * [Desc]: Vendor's manufacturing date code. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-84~91 + * QSFP28 => SFF-8636 P0H Byte-212~219 + */ + uint8_t manufacturing_date[8]; + + /* ========== Object private property ========== + */ + struct device *transvr_dev_p; + struct eeprom_map_s *eeprom_map_p; + struct i2c_client *i2c_client_p; + struct ioexp_obj_s *ioexp_obj_p; + struct transvr_worker_s *worker_p; + struct mutex lock; + char swp_name[32]; + int auto_config; + int auto_tx_disable; + int chan_id; + int chipset_type; + int curr_page; + int info; + int ioexp_virt_offset; + int lane_id[8]; + int layout; + int mode; + int retry; + int state; + int temp; + int type; + + /* ========== Object public functions ========== + */ + int (*get_id)(struct transvr_obj_s *self); + int (*get_eeprom)(struct transvr_obj_s *self, char *buf_p); + int (*get_eeprom_a0)(struct transvr_obj_s *self, char *buf_p); + int (*get_eeprom_a2)(struct transvr_obj_s *self, char *buf_p); + int (*get_eeprom_page03)(struct transvr_obj_s *self, char *buf_p); + int (*get_ext_id)(struct transvr_obj_s *self); + int (*get_connector)(struct transvr_obj_s *self); + int (*get_vendor_name)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_pn)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_rev)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_sn)(struct transvr_obj_s *self, char *buf_p); + int (*get_power_cls)(struct transvr_obj_s *self); + int (*get_br)(struct transvr_obj_s *self); + int (*get_len_sm)(struct transvr_obj_s *self); + int (*get_len_smf)(struct transvr_obj_s *self); + int (*get_len_om1)(struct transvr_obj_s *self); + int (*get_len_om2)(struct transvr_obj_s *self); + int (*get_len_om3)(struct transvr_obj_s *self); + int (*get_len_om4)(struct transvr_obj_s *self); + int (*get_comp_rev)(struct transvr_obj_s *self); + int (*get_comp_eth_1)(struct transvr_obj_s *self); + int (*get_comp_eth_10)(struct transvr_obj_s *self); + int (*get_comp_eth_10_40)(struct transvr_obj_s *self); + int (*get_comp_extend)(struct transvr_obj_s *self); + int (*get_cdr)(struct transvr_obj_s *self); + int (*get_rate_id)(struct transvr_obj_s *self); + int (*get_soft_rs0)(struct transvr_obj_s *self); + int (*get_soft_rs1)(struct transvr_obj_s *self); + int (*get_info)(struct transvr_obj_s *self); + int (*get_if_type)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_speed)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_lane)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_temp)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_vol)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_rx_los)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_fault)(struct transvr_obj_s *self, char *buf_p); + int (*get_auto_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_bias)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_eq)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_am)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_em)(struct transvr_obj_s *self, char *buf_p); + int (*get_wavelength)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_offset)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_reg)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power_low_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power_high_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power_low_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power_high_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_bias_low_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_bias_high_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_voltage_low_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_voltage_high_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_temp_low_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_temp_high_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power_low_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power_high_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power_low_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power_high_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_bias_low_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_bias_high_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_voltage_low_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_voltage_high_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_temp_low_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_temp_high_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_manufacturing_date)(struct transvr_obj_s *self, char *buf_p); + int (*set_cdr)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs0)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs1)(struct transvr_obj_s *self, int input_val); + int (*set_soft_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_auto_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_tx_eq)(struct transvr_obj_s *self, int input_val); + int (*set_rx_am)(struct transvr_obj_s *self, int input_val); + int (*set_rx_em)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_offset)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_reg)(struct transvr_obj_s *self, int input_val); + + /* ========== Object private functions ========== + */ + int (*init)(struct transvr_obj_s *self); + int (*clean)(struct transvr_obj_s *self); + int (*check)(struct transvr_obj_s *self); + int (*update_all)(struct transvr_obj_s *self, int show_err); + int (*fsm_4_direct)(struct transvr_obj_s* self, char *caller_name); + int (*fsm_4_polling)(struct transvr_obj_s* self, char *caller_name); + int (*send_uevent)(struct transvr_obj_s* self, enum kobject_action u_action); + int (*dump_all)(struct transvr_obj_s* self); +}; + + +/* For AVL Mapping */ +struct transvr_avl_s { + char vendor_name[32]; + char vendor_pn[32]; + int (*init)(struct transvr_obj_s *self); +}; + + +/* Worker for long term task of transceiver */ +struct transvr_worker_s { + /* Task Parameter */ + struct transvr_obj_s *transvr_p; + struct transvr_worker_s *next_p; + struct transvr_worker_s *pre_p; + unsigned long trigger_time; + char func_name[64]; + int retry; + int state; + + /* Task private data */ + void *p_data; + + /* Call back function */ + int (*main_task)(struct transvr_worker_s *task); + int (*post_task)(struct transvr_worker_s *task); +}; + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode, + int port_id); + +void lock_transvr_obj(struct transvr_obj_s *self); +void unlock_transvr_obj(struct transvr_obj_s *self); +int isolate_transvr_obj(struct transvr_obj_s *self); + +int resync_channel_tier_2(struct transvr_obj_s *self); + +void alarm_msg_2_user(struct transvr_obj_s *self, char *emsg); +int transvr_health_mtr(struct transvr_obj_s* self); +#endif /* TRANSCEIVER_H */ + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/ucd9000.c b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/ucd9000.c new file mode 100644 index 00000000000..3e3aa950277 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/modules/ucd9000.c @@ -0,0 +1,247 @@ +/* + * Hardware monitoring driver for UCD90xxx Sequencer and System Health + * Controller series + * + * Copyright (C) 2011 Ericsson AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "pmbus.h" + +enum chips { ucd9000, ucd90120, ucd90124, ucd90160, ucd9090, ucd90910 }; + +#define UCD9000_MONITOR_CONFIG 0xd5 +#define UCD9000_NUM_PAGES 0xd6 +#define UCD9000_FAN_CONFIG_INDEX 0xe7 +#define UCD9000_FAN_CONFIG 0xe8 +#define UCD9000_DEVICE_ID 0xfd + +#define UCD9000_MON_TYPE(x) (((x) >> 5) & 0x07) +#define UCD9000_MON_PAGE(x) ((x) & 0x0f) + +#define UCD9000_MON_VOLTAGE 1 +#define UCD9000_MON_TEMPERATURE 2 +#define UCD9000_MON_CURRENT 3 +#define UCD9000_MON_VOLTAGE_HW 4 + +#define UCD9000_NUM_FAN 4 + +struct ucd9000_data { + u8 fan_data[UCD9000_NUM_FAN][I2C_SMBUS_BLOCK_MAX]; + struct pmbus_driver_info info; +}; +#define to_ucd9000_data(_info) container_of(_info, struct ucd9000_data, info) + +static int ucd9000_get_fan_config(struct i2c_client *client, int fan) +{ + int fan_config = 0; + struct ucd9000_data *data + = to_ucd9000_data(pmbus_get_driver_info(client)); + + if (data->fan_data[fan][3] & 1) + fan_config |= PB_FAN_2_INSTALLED; /* Use lower bit position */ + + /* Pulses/revolution */ + fan_config |= (data->fan_data[fan][3] & 0x06) >> 1; + + return fan_config; +} + +static int ucd9000_read_byte_data(struct i2c_client *client, int page, int reg) +{ + int ret = 0; + int fan_config; + + switch (reg) { + case PMBUS_FAN_CONFIG_12: + if (page > 0) + return -ENXIO; + + ret = ucd9000_get_fan_config(client, 0); + if (ret < 0) + return ret; + fan_config = ret << 4; + ret = ucd9000_get_fan_config(client, 1); + if (ret < 0) + return ret; + fan_config |= ret; + ret = fan_config; + break; + case PMBUS_FAN_CONFIG_34: + if (page > 0) + return -ENXIO; + + ret = ucd9000_get_fan_config(client, 2); + if (ret < 0) + return ret; + fan_config = ret << 4; + ret = ucd9000_get_fan_config(client, 3); + if (ret < 0) + return ret; + fan_config |= ret; + ret = fan_config; + break; + default: + ret = -ENODATA; + break; + } + return ret; +} + +static const struct i2c_device_id ucd9000_id[] = { + {"ucd9000", ucd9000}, + {"ucd90120", ucd90120}, + {"ucd90124", ucd90124}, + {"ucd90160", ucd90160}, + {"ucd9090", ucd9090}, + {"ucd90910", ucd90910}, + {} +}; +MODULE_DEVICE_TABLE(i2c, ucd9000_id); + +static int ucd9000_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1]; + struct ucd9000_data *data; + struct pmbus_driver_info *info; + const struct i2c_device_id *mid; + int i, ret; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_BLOCK_DATA)) + return -ENODEV; + + ret = i2c_smbus_read_block_data(client, UCD9000_DEVICE_ID, + block_buffer); + if (ret < 0) { + dev_err(&client->dev, "Failed to read device ID\n"); + return ret; + } + block_buffer[ret] = '\0'; + dev_info(&client->dev, "Device ID %s\n", block_buffer); + + for (mid = ucd9000_id; mid->name[0]; mid++) { + if (!strncasecmp(mid->name, block_buffer, strlen(mid->name))) + break; + } + if (!mid->name[0]) { + dev_err(&client->dev, "Unsupported device\n"); + return -ENODEV; + } + + if (id->driver_data != ucd9000 && id->driver_data != mid->driver_data) + dev_notice(&client->dev, + "Device mismatch: Configured %s, detected %s\n", + id->name, mid->name); + + data = devm_kzalloc(&client->dev, sizeof(struct ucd9000_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + info = &data->info; + + ret = i2c_smbus_read_byte_data(client, UCD9000_NUM_PAGES); + if (ret < 0) { + dev_err(&client->dev, + "Failed to read number of active pages\n"); + return ret; + } + info->pages = ret; + if (!info->pages) { + dev_err(&client->dev, "No pages configured\n"); + return -ENODEV; + } + + /* The internal temperature sensor is always active */ + info->func[0] = PMBUS_HAVE_TEMP; + + /* Everything else is configurable */ + ret = i2c_smbus_read_block_data(client, UCD9000_MONITOR_CONFIG, + block_buffer); + if (ret <= 0) { + dev_err(&client->dev, "Failed to read configuration data\n"); + return -ENODEV; + } + for (i = 0; i < ret; i++) { + int page = UCD9000_MON_PAGE(block_buffer[i]); + + if (page >= info->pages) + continue; + + switch (UCD9000_MON_TYPE(block_buffer[i])) { + case UCD9000_MON_VOLTAGE: + case UCD9000_MON_VOLTAGE_HW: + info->func[page] |= PMBUS_HAVE_VOUT + | PMBUS_HAVE_STATUS_VOUT; + break; + case UCD9000_MON_TEMPERATURE: + info->func[page] |= PMBUS_HAVE_TEMP2 + | PMBUS_HAVE_STATUS_TEMP; + break; + case UCD9000_MON_CURRENT: + info->func[page] |= PMBUS_HAVE_IOUT + | PMBUS_HAVE_STATUS_IOUT; + break; + default: + break; + } + } + + /* Fan configuration */ + if (mid->driver_data == ucd90124) { + for (i = 0; i < UCD9000_NUM_FAN; i++) { + i2c_smbus_write_byte_data(client, + UCD9000_FAN_CONFIG_INDEX, i); + ret = i2c_smbus_read_block_data(client, + UCD9000_FAN_CONFIG, + data->fan_data[i]); + if (ret < 0) + return ret; + } + i2c_smbus_write_byte_data(client, UCD9000_FAN_CONFIG_INDEX, 0); + + info->read_byte_data = ucd9000_read_byte_data; + info->func[0] |= PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12 + | PMBUS_HAVE_FAN34 | PMBUS_HAVE_STATUS_FAN34; + } + + return pmbus_do_probe(client, mid, info); +} + +/* This is the driver that will be inserted */ +static struct i2c_driver ucd9000_driver = { + .driver = { + .name = "ucd9000", + }, + .probe = ucd9000_probe, + .remove = pmbus_do_remove, + .id_table = ucd9000_id, +}; + +module_i2c_driver(ucd9000_driver); + +MODULE_AUTHOR("Guenter Roeck"); +MODULE_DESCRIPTION("PMBus driver for TI UCD90xxx"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/setup.py b/platform/broadcom/sonic-platform-modules-inventec/d6356/setup.py new file mode 100644 index 00000000000..8b45987a54e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/setup.py @@ -0,0 +1,15 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='sonic_platform', + version='1.0', + description='Module to initialize Ivnetec D6356 platforms', + + packages=['sonic_platform'], +) + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/__init__.py new file mode 100644 index 00000000000..4bfefa0fb63 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/__init__.py @@ -0,0 +1,3 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import * + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/chassis.py new file mode 100644 index 00000000000..0e84eeebc98 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/chassis.py @@ -0,0 +1,182 @@ +#!/usr/bin/env python +# +# Name: chassis.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + import os + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.eeprom import Eeprom + from sonic_platform.fan import Fan + from sonic_platform.psu import Psu + from sonic_platform.sfp import Sfp + from sonic_platform.qsfp import QSfp + from sonic_platform.thermal import Thermal + from sonic_platform.transceiver_event import TransceiverEvent +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Chassis(ChassisBase): + + def __init__(self): + ChassisBase.__init__(self) + self.__num_of_fans = 4 + self.__num_of_psus = 2 + self.__num_of_sfps = 56 + self.__start_of_qsfp = 48 + self.__num_of_thermals = 5 + + # Initialize EEPROM + self._eeprom = Eeprom() + + # Initialize FAN + for index in range(1, self.__num_of_fans + 1): + fan = Fan(index, False, 0) + self._fan_list.append(fan) + + # Initialize PSU + for index in range(1, self.__num_of_psus + 1): + psu = Psu(index) + self._psu_list.append(psu) + + # Initialize SFP + for index in range(0, self.__num_of_sfps): + if index < self.__start_of_qsfp: + sfp = Sfp(index) + else: + sfp = QSfp(index) + self._sfp_list.append(sfp) + + # Initialize THERMAL + for index in range(0, self.__num_of_thermals): + thermal = Thermal(index) + self._thermal_list.append(thermal) + + # Initialize TRANSCEIVER EVENT MONITOR + self.__xcvr_event = TransceiverEvent() + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self._eeprom.modelstr() + + def get_presence(self): + """ + Retrieves the presence of the chassis + Returns: + bool: True if chassis is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the chassis + Returns: + string: Model/part number of chassis + """ + return self._eeprom.part_number_str() + + def get_serial(self): + """ + Retrieves the serial number of the chassis + Returns: + string: Serial number of chassis + """ + return self._eeprom.serial_number_str() + + def get_status(self): + """ + Retrieves the operational status of the chassis + Returns: + bool: A boolean value, True if chassis is operating properly + False if not + """ + return True + +############################################## +# Chassis methods +############################################## + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.base_mac_address() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.serial_number_str() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821', + '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00', + '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'} + """ + return self._eeprom.system_eeprom_info() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + raise NotImplementedError + +############################################## +# Other methods +############################################## + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - True if call successful, False if not; + - A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, + where device_id is the device ID for this device and + device_event, + status='1' represents device inserted, + status='0' represents device removed. + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}} + indicates that fan 0 has been removed, fan 2 + has been inserted and sfp 11 has been removed. + """ + + rc, xcvr_event = self.__xcvr_event.get_transceiver_change_event(timeout) + + return rc, {'sfp': xcvr_event} diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/eeprom.py new file mode 100644 index 00000000000..5840246fddc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/eeprom.py @@ -0,0 +1,110 @@ +#!/usr/bin/env python +# +# Name: eeprom.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + from sonic_eeprom import eeprom_tlvinfo + import binascii +except ImportError, e: + raise ImportError(str(e) + "- required module not found") + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self): + self.__eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0055/eeprom" + super(Eeprom, self).__init__(self.__eeprom_path, 0, '', True) + self.__eeprom_tlv_dict = dict() + try: + self.__eeprom_data = self.read_eeprom() + except: + self.__eeprom_data = "N/A" + raise RuntimeError("Eeprom is not Programmed") + else: + eeprom = self.__eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + return + + total_length = (ord(eeprom[9]) << 8) | ord(eeprom[10]) + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + ord(eeprom[tlv_index + 1])] + code = "0x%02X" % (ord(tlv[0])) + + if ord(tlv[0]) == self._TLV_CODE_VENDOR_EXT: + value = str((ord(tlv[2]) << 24) | (ord(tlv[3]) << 16) | + (ord(tlv[4]) << 8) | ord(tlv[5])) + value += str(tlv[6:6 + ord(tlv[1])]) + else: + name, value = self.decoder(None, tlv) + + self.__eeprom_tlv_dict[code] = value + if ord(eeprom[tlv_index]) == self._TLV_CODE_CRC_32: + break + + tlv_index += ord(eeprom[tlv_index+1]) + 2 + + def serial_number_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_SERIAL_NUMBER) + if not is_valid: + return "N/A" + return results[2] + + def base_mac_address(self): + (is_valid, t) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_MAC_BASE) + if not is_valid or t[1] != 6: + return super(eeprom_tlvinfo.TlvInfoDecoder, self).switchaddrstr(self.__eeprom_data) + + return ":".join([binascii.b2a_hex(T) for T in t[2]]) + + def modelstr(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_PRODUCT_NAME) + if not is_valid: + return "N/A" + + return results[2] + + def part_number_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_PART_NUMBER) + if not is_valid: + return "N/A" + + return results[2] + + def serial_tag_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_SERVICE_TAG) + if not is_valid: + return "N/A" + + return results[2] + + def revision_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_DEVICE_VERSION) + if not is_valid: + return "N/A" + + return results[2] + + def system_eeprom_info(self): + """ + Returns a dictionary, where keys are the type code defined in + ONIE EEPROM format and values are their corresponding values + found in the system EEPROM. + """ + return self.__eeprom_tlv_dict + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/fan.py new file mode 100644 index 00000000000..a0b99ff3459 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/fan.py @@ -0,0 +1,220 @@ +#!/usr/bin/env python +# +# Name: fan.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + import math + import os + from sonic_platform_base.fan_base import FanBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Fan(FanBase): + + def __init__(self, index, is_psu_fan=False, psu_index=0): + self.__index = index + self.__is_psu_fan = is_psu_fan + + if self.__is_psu_fan: + self.__psu_index = psu_index + self.__presence_attr = "/sys/class/hwmon/hwmon{}/fan{}_input".format((self.__psu_index + 6), self.__index) + self.__speed_rpm_attr = "/sys/class/hwmon/hwmon{}/fan{}_input".format((self.__psu_index + 6), self.__index) + self.__pwm_attr = None + else: + self.__presence_attr = "/sys/class/hwmon/hwmon2/device/fanmodule{}_type".format(self.__index) + self.__speed_front_rpm_attr = "/sys/class/hwmon/hwmon2/device/fan{}_input".format(self.__index*2-1) + self.__speed_rear_rpm_attr = "/sys/class/hwmon/hwmon2/device/fan{}_input".format(self.__index*2) + self.__pwm_attr = "/sys/class/hwmon/hwmon2/device/pwm{}".format(self.__index) + self.__led_attr = "/sys/class/hwmon/hwmon2/device/fanmodule{}_led".format(self.__index) + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + if self.__is_psu_fan: + return "PSU{}-FAN{}".format(self.__psu_index, self.__index) + else: + return "FAN{}".format(self.__index) + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_path = self.__presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (attr_rv == "0:Normal Type" or attr_rv == "1:REVERSAL Type"): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + return "N/A" + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + return "N/A" + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + status = False + front_attr_path = self.__speed_front_rpm_attr + rear_attr_path = self.__speed_rear_rpm_attr + front_attr_rv = self.__get_attr_value(front_attr_path) + rear_attr_rv = self.__get_attr_value(rear_attr_path) + if (front_attr_rv != 'ERR' and rear_attr_rv != 'ERR'): + if (int(front_attr_rv) != 0 and int(rear_attr_rv) != 0): + status = True + return status + +############################################## +# FAN methods +############################################## + + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + raise NotImplementedError + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed = 0 + + if self.__is_psu_fan: + attr_path = self.__speed_rpm_attr + else: + attr_path = self.__pwm_attr + + if self.get_presence() and None != attr_path: + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if self.__is_psu_fan: + fan_speed_rpm = int(attr_rv) + speed = math.ceil(float(fan_speed_rpm) * 100 / 11000) + else: + pwm = int(attr_rv) + speed = math.ceil(float(pwm * 100 / 255)) + + return speed + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + raise NotImplementedError + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + raise NotImplementedError + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + raise NotImplementedError + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + + Args: + color: A string representing the color with which to set the + fan module status LED + + Returns: + bool: True if status LED state is set successfully, False if not + """ + raise NotImplementedError + + def get_status_led(self): + """ + Gets the state of the fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + attr_path = self.__led_attr + attr_rv = self.__get_attr_value(attr_path) + if ( attr_rv != 'ERR'): + if ( attr_rv == "1:Green" ): + return self.STATUS_LED_COLOR_GREEN + elif ( attr_rv == "2:Red" ): + if self.get_presence is True: + return self.STATUS_LED_COLOR_RED + else: + return self.STATUS_LED_COLOR_OFF + return self.STATUS_LED_COLOR_OFF diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/platform.py new file mode 100644 index 00000000000..7d6bda4502d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/platform.py @@ -0,0 +1,20 @@ +#!/usr/bin/env python +# +# Name: platform.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PlatformBase): + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/psu.py new file mode 100644 index 00000000000..3621662c1fa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/psu.py @@ -0,0 +1,202 @@ +#!/usr/bin/env python +# +# Name: psu.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + import os + from sonic_platform_base.psu_base import PsuBase + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Psu(PsuBase): + + def __init__(self, index): + self.__num_of_fans = 1 + self.__index = index + self.__psu_presence_attr = "/sys/class/hwmon/hwmon2/device/psu{}".format(self.__index) + self.__psu_power_in_attr = "/sys/class/hwmon/hwmon{}/device/power1_input".format(self.__index + 6) + self.__psu_power_out_attr = "/sys/class/hwmon/hwmon{}/device/power2_input".format(self.__index + 6) + self.__psu_voltage_out_attr = "/sys/class/hwmon/hwmon{}/device/in2_input".format(self.__index + 6) + self.__psu_current_out_attr = "/sys/class/hwmon/hwmon{}/device/curr2_input".format(self.__index + 6) + + # Overriding _fan_list class variable defined in PsuBase, to make it unique per Psu object + self._fan_list = [] + + # Initialize FAN + for x in range(1, self.__num_of_fans + 1): + fan = Fan(x, True, self.__index) + self._fan_list.append(fan) + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return "PSU{}".format(self.__index) + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_normal = "1:normal" + attr_path = self.__psu_presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (attr_rv == attr_normal): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + return "N/A" + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + return "N/A" + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + status = False + attr_path = self.__psu_power_in_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) != 0): + status = True + + return status + +############################################## +# PSU methods +############################################## + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + voltage_out = 0.0 + attr_path = self.__psu_voltage_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + voltage_out = float(attr_rv) / 1000 + + return voltage_out + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + current_out = 0.0 + attr_path = self.__psu_current_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + current_out = float(attr_rv) / 1000 + + return current_out + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, e.g. 302.6 + """ + power_out = 0.0 + attr_path = self.__psu_power_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + power_out = float(attr_rv) / 1000000 + + return power_out + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + + Args: + color: A string representing the color with which to set the + PSU status LED + + Returns: + bool: True if status LED state is set successfully, False if not + """ + raise NotImplementedError + + def get_status_led(self): + """ + Gets the state of the PSU status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_OFF + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/qsfp.py b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/qsfp.py new file mode 100644 index 00000000000..76ec237aa88 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/qsfp.py @@ -0,0 +1,926 @@ +#!/usr/bin/env python +# +# Name: qsfp.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + import os + import sys + import time + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom + from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +INFO_OFFSET = 128 +THRE_OFFSET = 384 #128*3 +DOM_OFFSET = 0 + +XCVR_INTFACE_BULK_OFFSET = 0 +XCVR_INTFACE_BULK_WIDTH_QSFP = 20 +XCVR_HW_REV_WIDTH_QSFP = 2 +XCVR_CABLE_LENGTH_WIDTH_QSFP = 5 +XCVR_VENDOR_NAME_OFFSET = 20 +XCVR_VENDOR_NAME_WIDTH = 16 +XCVR_VENDOR_OUI_OFFSET = 37 +XCVR_VENDOR_OUI_WIDTH = 3 +XCVR_VENDOR_PN_OFFSET = 40 +XCVR_VENDOR_PN_WIDTH = 16 +XCVR_HW_REV_OFFSET = 56 +XCVR_HW_REV_WIDTH_OSFP = 2 +XCVR_VENDOR_SN_OFFSET = 68 +XCVR_VENDOR_SN_WIDTH = 16 +XCVR_VENDOR_DATE_OFFSET = 84 +XCVR_VENDOR_DATE_WIDTH = 8 +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 1 + +# Offset for values in QSFP eeprom +QSFP_DOM_REV_OFFSET = 1 +QSFP_DOM_REV_WIDTH = 1 +QSFP_TEMPE_OFFSET = 22 +QSFP_TEMPE_WIDTH = 2 +QSFP_VOLT_OFFSET = 26 +QSFP_VOLT_WIDTH = 2 +QSFP_CHANNL_MON_OFFSET = 34 +QSFP_CHANNL_MON_WIDTH = 16 +QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH = 24 +QSFP_CONTROL_OFFSET = 86 +QSFP_CONTROL_WIDTH = 8 +QSFP_CHANNL_RX_LOS_STATUS_OFFSET = 3 +QSFP_CHANNL_RX_LOS_STATUS_WIDTH = 1 +QSFP_CHANNL_TX_FAULT_STATUS_OFFSET = 4 +QSFP_CHANNL_TX_FAULT_STATUS_WIDTH = 1 +QSFP_POWEROVERRIDE_OFFSET = 93 +QSFP_POWEROVERRIDE_WIDTH = 1 +QSFP_MODULE_THRESHOLD_OFFSET = 128 +QSFP_MODULE_THRESHOLD_WIDTH = 24 +QSFP_CHANNEL_THRESHOLD_OFFSET = 176 +QSFP_CHANNEL_THRESHOLD_WIDTH = 16 + +class QSfp(SfpBase): + + def __init__(self, index): + self.__index = index + + self.__platform = "x86_64-inventec_d6356-r0" + self.__hwsku = "INVENTEC-D6356" + + self.__port_to_i2c_mapping = { + 0:22, 1:23, 2:24, 3:25, 4:26, 5:27, 6:28, 7:29, + 8:30, 9:31, 10:32, 11:33, 12:34, 13:35, 14:36, 15:37, + 16:38, 17:39, 18:40, 19:41, 20:42, 21:43, 22:44, 23:45, + 24:46, 25:47, 26:48, 27:49, 28:50, 29:51, 30:52, 31:53, + 32:54, 33:55, 34:56, 35:57, 36:58, 37:59, 38:60, 39:61, + 40:62, 41:63, 42:64, 43:65, 44:66, 45:67, 46:68, 47:69, + 48:14, 49:15, 50:16, 51:17, 52:18, 53:19, 54:20, 55:21 + } + self.__port_end = len(self.__port_to_i2c_mapping) - 1; + + self.__presence_attr = None + self.__eeprom_path = None + if self.__index in range(0, self.__port_end + 1): + self.__presence_attr = "/sys/class/swps/port{}/present".format(self.__index) + self.__lpmode_attr = "/sys/class/swps/port{}/lpmod".format(self.__index) + self.__reset_attr = "/sys/class/swps/port{}/reset".format(self.__index) + self.__eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom".format(self.__port_to_i2c_mapping[self.__index]) + + #print(self.__eeprom_path) + + SfpBase.__init__(self) + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def __is_host(self): + return os.system("docker > /dev/null 2>&1") == 0 + + def __get_path_to_port_config_file(self): + host_platform_root_path = '/usr/share/sonic/device' + docker_hwsku_path = '/usr/share/sonic/hwsku' + + host_platform_path = "/".join([host_platform_root_path, self.__platform]) + hwsku_path = "/".join([host_platform_path, self.__hwsku]) if self.__is_host() else docker_hwsku_path + + return "/".join([hwsku_path, "port_config.ini"]) + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + sysfsfile_eeprom = None + eeprom_raw = [] + + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + sysfs_eeprom_path = self.__eeprom_path + try: + sysfsfile_eeprom = open(sysfs_eeprom_path, mode="rb", buffering=0) + sysfsfile_eeprom.seek(offset) + raw = sysfsfile_eeprom.read(num_bytes) + raw_len = len(raw) + for n in range(0, raw_len): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except: + pass + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + + return eeprom_raw + + def __convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + name = None + + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings(self.__get_path_to_port_config_file()) + name = sfputil_helper.logical[self.__index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_path = self.__presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 0): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("modelname", "N/A") + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("serialnum", "N/A") + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and not self.get_reset_status() + +############################################## +# SFP methods +############################################## + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + mominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + + transceiver_info_dict_keys = ['type', 'hardwarerev', + 'serialnum', 'manufacturename', + 'modelname', 'Connector', + 'encoding', 'ext_identifier', + 'ext_rateselect_compliance', 'cable_type', + 'cable_length', 'nominal_bit_rate', + 'specification_compliance', 'vendor_date', + 'vendor_oui'] + + qsfp_cable_length_tup = ('Length(km)', 'Length OM3(2m)', + 'Length OM2(m)', 'Length OM1(m)', 'Length Cable Assembly(m)') + + qsfp_compliance_code_tup = ('10/40G Ethernet Compliance Code', 'SONET Compliance codes', + 'SAS/SATA compliance codes', 'Gigabit Ethernet Compliant codes', + 'Fibre Channel link length/Transmitter Technology', 'Fibre Channel transmission media', + 'Fibre Channel Speed') + + sfpi_obj = sff8436InterfaceId() + if not self.get_presence() or not sfpi_obj: + return {} + + offset = INFO_OFFSET + + sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes((offset + XCVR_INTFACE_BULK_OFFSET), XCVR_INTFACE_BULK_WIDTH_QSFP) + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw, 0) + + sfp_vendor_name_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) + + sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) + + sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes((offset + XCVR_HW_REV_OFFSET), XCVR_HW_REV_WIDTH_QSFP) + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) + + sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) + + sfp_vendor_oui_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) + if sfp_vendor_oui_raw is not None: + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_vendor_oui_raw, 0) + + sfp_vendor_date_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) + sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_vendor_date_raw, 0) + + transceiver_info_dict = dict.fromkeys(transceiver_info_dict_keys, 'N/A') + + if sfp_interface_bulk_data: + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + transceiver_info_dict['type_abbrv_name'] = sfp_interface_bulk_data['data']['type_abbrv_name']['value'] + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value']) + + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] if sfp_vendor_name_data else 'N/A' + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] if sfp_vendor_pn_data else 'N/A' + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] if sfp_vendor_rev_data else 'N/A' + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] if sfp_vendor_sn_data else 'N/A' + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] if sfp_vendor_oui_data else 'N/A' + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] if sfp_vendor_date_data else 'N/A' + + transceiver_info_dict['cable_type'] = "Unknown" + transceiver_info_dict['cable_length'] = "Unknown" + for key in qsfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + + compliance_code_dict = dict() + for key in qsfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + return transceiver_info_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. + tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. + reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. + lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. + tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. + tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 + | |to channel 3. + temperature |INT |module temperature in Celsius + voltage |INT |supply voltage in mV + txbias |INT |TX Bias Current in mA, n is the channel number, + | |for example, tx2bias stands for tx bias of channel 2. + rxpower |INT |received optical power in mW, n is the channel number, + | |for example, rx2power stands for rx power of channel 2. + txpower |INT |TX output power in mW, n is the channel number, + | |for example, tx2power stands for tx power of channel 2. + ======================================================================== + """ + transceiver_dom_info_dict_keys = ['rx_los', 'tx_fault', + 'reset_status', 'power_lpmode', + 'tx_disable', 'tx_disable_channel', + 'temperature', 'voltage', + 'rx1power', 'rx2power', + 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', + 'tx3bias', 'tx4bias', + 'tx1power', 'tx2power', + 'tx3power', 'tx4power'] + + sfpd_obj = sff8436Dom() + sfpi_obj = sff8436InterfaceId() + + if not self.get_presence() or not sfpi_obj or not sfpd_obj: + return {} + + transceiver_dom_info_dict = dict.fromkeys(transceiver_dom_info_dict_keys, 'N/A') + offset = DOM_OFFSET + offset_xcvr = INFO_OFFSET + + # QSFP capability byte parse, through this byte can know whether it support tx_power or not. + # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, + # need to add more code for determining the capability and version compliance + # in SFF-8636 dom capability definitions evolving with the versions. + qsfp_dom_capability_raw = self.__read_eeprom_specific_bytes((offset_xcvr + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) + if qsfp_dom_capability_raw is not None: + qspf_dom_capability_data = sfpi_obj.parse_qsfp_dom_capability(qsfp_dom_capability_raw, 0) + else: + return None + + dom_temperature_raw = self.__read_eeprom_specific_bytes((offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + + dom_voltage_raw = self.__read_eeprom_specific_bytes((offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + qsfp_dom_rev_raw = self.__read_eeprom_specific_bytes((offset + QSFP_DOM_REV_OFFSET), QSFP_DOM_REV_WIDTH) + if qsfp_dom_rev_raw is not None: + qsfp_dom_rev_data = sfpd_obj.parse_sfp_dom_rev(qsfp_dom_rev_raw, 0) + qsfp_dom_rev = qsfp_dom_rev_data['data']['dom_rev']['value'] + + # The tx_power monitoring is only available on QSFP which compliant with SFF-8636 + # and claimed that it support tx_power with one indicator bit. + dom_channel_monitor_data = {} + dom_channel_monitor_raw = None + qsfp_tx_power_support = qspf_dom_capability_data['data']['Tx_power_support']['value'] + if (qsfp_dom_rev[0:8] != 'SFF-8636' or (qsfp_dom_rev[0:8] == 'SFF-8636' and qsfp_tx_power_support != 'on')): + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + + else: + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0) + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TX1Power']['value'] + transceiver_dom_info_dict['tx2power'] = dom_channel_monitor_data['data']['TX2Power']['value'] + transceiver_dom_info_dict['tx3power'] = dom_channel_monitor_data['data']['TX3Power']['value'] + transceiver_dom_info_dict['tx4power'] = dom_channel_monitor_data['data']['TX4Power']['value'] + + if dom_channel_monitor_raw: + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RX1Power']['value'] + transceiver_dom_info_dict['rx2power'] = dom_channel_monitor_data['data']['RX2Power']['value'] + transceiver_dom_info_dict['rx3power'] = dom_channel_monitor_data['data']['RX3Power']['value'] + transceiver_dom_info_dict['rx4power'] = dom_channel_monitor_data['data']['RX4Power']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value'] + transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value'] + transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value'] + transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value'] + + for key in transceiver_dom_info_dict: + transceiver_dom_info_dict[key] = self.__convert_string_to_num(transceiver_dom_info_dict[key]) + + transceiver_dom_info_dict['rx_los'] = self.get_rx_los() + transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() + transceiver_dom_info_dict['reset_status'] = self.get_reset_status() + transceiver_dom_info_dict['tx_disable'] = self.get_tx_disable() + transceiver_dom_info_dict['tx_disable_channel'] = self.get_tx_disable_channel() + transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() + + + return transceiver_dom_info_dict + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. + templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. + temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. + templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. + vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. + vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. + vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. + vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. + rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. + rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. + rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. + rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. + txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. + txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. + txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. + txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. + txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. + txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. + txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. + txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. + ======================================================================== + """ + transceiver_dom_threshold_info_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning'] + + sfpd_obj = sff8436Dom() + if not self.get_presence() or not sfpd_obj: + return {} + + transceiver_dom_threshold_dict = dict.fromkeys(transceiver_dom_threshold_info_dict_keys, 'N/A') + offset = THRE_OFFSET + + dom_module_threshold_raw = self.__read_eeprom_specific_bytes((offset + QSFP_MODULE_THRESHOLD_OFFSET), QSFP_MODULE_THRESHOLD_WIDTH) + if dom_module_threshold_raw: + module_threshold_values = sfpd_obj.parse_module_threshold_values(dom_module_threshold_raw, 0) + module_threshold_data = module_threshold_values.get('data') + if module_threshold_data: + transceiver_dom_threshold_dict['temphighalarm'] = module_threshold_data['TempHighAlarm']['value'] + transceiver_dom_threshold_dict['templowalarm'] = module_threshold_data['TempLowAlarm']['value'] + transceiver_dom_threshold_dict['temphighwarning'] = module_threshold_data['TempHighWarning']['value'] + transceiver_dom_threshold_dict['templowwarning'] = module_threshold_data['TempLowWarning']['value'] + transceiver_dom_threshold_dict['vcchighalarm'] = module_threshold_data['VccHighAlarm']['value'] + transceiver_dom_threshold_dict['vcclowalarm'] = module_threshold_data['VccLowAlarm']['value'] + transceiver_dom_threshold_dict['vcchighwarning'] = module_threshold_data['VccHighWarning']['value'] + transceiver_dom_threshold_dict['vcclowwarning'] = module_threshold_data['VccLowWarning']['value'] + + dom_channel_thres_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNEL_THRESHOLD_OFFSET), QSFP_CHANNEL_THRESHOLD_WIDTH) + channel_threshold_values = sfpd_obj.parse_channel_threshold_values(dom_channel_thres_raw, 0) + channel_threshold_data = channel_threshold_values.get('data') + if channel_threshold_data: + transceiver_dom_threshold_dict['rxpowerhighalarm'] = channel_threshold_data['RxPowerHighAlarm']['value'] + transceiver_dom_threshold_dict['rxpowerlowalarm'] = channel_threshold_data['RxPowerLowAlarm']['value'] + transceiver_dom_threshold_dict['rxpowerhighwarning'] = channel_threshold_data['RxPowerHighWarning']['value'] + transceiver_dom_threshold_dict['rxpowerlowwarning'] = channel_threshold_data['RxPowerLowWarning']['value'] + transceiver_dom_threshold_dict['txpowerhighalarm'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerlowalarm'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerhighwarning'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerlowwarning'] = "0.0dBm" + transceiver_dom_threshold_dict['txbiashighalarm'] = channel_threshold_data['TxBiasHighAlarm']['value'] + transceiver_dom_threshold_dict['txbiaslowalarm'] = channel_threshold_data['TxBiasLowAlarm']['value'] + transceiver_dom_threshold_dict['txbiashighwarning'] = channel_threshold_data['TxBiasHighWarning']['value'] + transceiver_dom_threshold_dict['txbiaslowwarning'] = channel_threshold_data['TxBiasLowWarning']['value'] + + for key in transceiver_dom_threshold_dict: + transceiver_dom_threshold_dict[key] = self.__convert_string_to_num(transceiver_dom_threshold_dict[key]) + + return transceiver_dom_threshold_dict + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + + Returns: + A Boolean, True if reset enabled, False if disabled + """ + reset_status = False + attr_path = self.__reset_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 0): + reset_status = True + + return reset_status + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + rx_los = False + rx_los_list = [] + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(QSFP_CHANNL_RX_LOS_STATUS_OFFSET, QSFP_CHANNL_RX_LOS_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + rx_los_data = int(dom_channel_monitor_raw[0], 16) + rx_los_list.append(rx_los_data & 0x01 != 0) + rx_los_list.append(rx_los_data & 0x02 != 0) + rx_los_list.append(rx_los_data & 0x04 != 0) + rx_los_list.append(rx_los_data & 0x08 != 0) + rx_los = rx_los_list[0] and rx_los_list[1] and rx_los_list[2] and rx_los_list[3] + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + tx_fault = False + tx_fault_list = [] + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(QSFP_CHANNL_TX_FAULT_STATUS_OFFSET, QSFP_CHANNL_TX_FAULT_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + tx_fault_data = int(dom_channel_monitor_raw[0], 16) + tx_fault_list.append(tx_fault_data & 0x01 != 0) + tx_fault_list.append(tx_fault_data & 0x02 != 0) + tx_fault_list.append(tx_fault_data & 0x04 != 0) + tx_fault_list.append(tx_fault_data & 0x08 != 0) + tx_fault = tx_fault_list[0] and tx_fault_list[1] and tx_fault_list[2] and tx_fault_list[3] + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + """ + tx_disable = False + tx_disable_list = [] + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return tx_disable + + dom_control_raw = self.__read_eeprom_specific_bytes(QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + tx_disable_list.append('On' == dom_control_data['data']['TX1Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX2Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX3Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX4Disable']['value']) + tx_disable = tx_disable_list[0] and tx_disable_list[1] and tx_disable_list[2] and tx_disable_list[3] + + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + tx_disable_channel = 0 + tx_disable_list = [] + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return tx_disable_channel + + dom_control_raw = self.__read_eeprom_specific_bytes(QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + tx_disable_list.append('On' == dom_control_data['data']['TX1Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX2Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX3Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX4Disable']['value']) + + for i in range(len(tx_disable_list)): + if tx_disable_list[i]: + tx_disable_channel |= 1 << i + + return tx_disable_channel + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + lpmode = False + attr_path = self.__lpmode_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 1): + lpmode = True + + return lpmode + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + power_override = False + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return power_override + + dom_control_raw = self.__read_eeprom_specific_bytes(QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + power_override = ('On' == dom_control_data['data']['PowerOverride']['value']) + + return power_override + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + + Returns: + An integer number of current temperature in Celsius + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("temperature", "N/A") + + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + + Returns: + An integer number of supply voltage in mV + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("voltage", "N/A") + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_bs = transceiver_dom_info_dict.get("tx1bias", "N/A") + tx2_bs = transceiver_dom_info_dict.get("tx2bias", "N/A") + tx3_bs = transceiver_dom_info_dict.get("tx3bias", "N/A") + tx4_bs = transceiver_dom_info_dict.get("tx4bias", "N/A") + return [tx1_bs, tx2_bs, tx3_bs, tx4_bs] if transceiver_dom_info_dict else [] + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + rx1_pw = transceiver_dom_info_dict.get("rx1power", "N/A") + rx2_pw = transceiver_dom_info_dict.get("rx2power", "N/A") + rx3_pw = transceiver_dom_info_dict.get("rx3power", "N/A") + rx4_pw = transceiver_dom_info_dict.get("rx4power", "N/A") + return [rx1_pw, rx2_pw, rx3_pw, rx4_pw] if transceiver_dom_info_dict else [] + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_pw = transceiver_dom_info_dict.get("tx1power", "N/A") + tx2_pw = transceiver_dom_info_dict.get("tx2power", "N/A") + tx3_pw = transceiver_dom_info_dict.get("tx3power", "N/A") + tx4_pw = transceiver_dom_info_dict.get("tx4power", "N/A") + return [tx1_pw, tx2_pw, tx3_pw, tx4_pw] + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + + Returns: + A boolean, True if successful, False if not + """ + + try: + reg_file = open(self.__reset_attr, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + try: + reg_file = open(self.__reset_attr, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + sysfs_eeprom_path = self.__eeprom_path + sysfsfile_eeprom = None + try: + tx_disable_ctl = 0xf if tx_disable else 0x0 + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom = open(sysfs_eeprom_path, "r+b") + sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + + Returns: + A boolean, True if successful, False if not + """ + sysfs_eeprom_path = self.__eeprom_path + sysfsfile_eeprom = None + try: + channel_state = self.get_tx_disable_channel() + tx_enable_mask = [0xe, 0xd, 0xb, 0x7] + tx_disable_mask = [0x1, 0x3, 0x7, 0xf] + tx_disable_ctl = channel_state | tx_disable_mask[channel] if disable else channel_state & tx_enable_mask[channel] + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom = open(sysfs_eeprom_path, "r+b") + sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + try: + reg_file = open(self.__lpmode_attr, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + sysfs_eeprom_path = self.__eeprom_path + sysfsfile_eeprom = None + try: + power_override_bit = 0 + if power_override: + power_override_bit |= 1 << 0 + + power_set_bit = 0 + if power_set: + power_set_bit |= 1 << 1 + + buffer = create_string_buffer(1) + buffer[0] = chr(power_override_bit | power_set_bit) + # Write to eeprom + sysfsfile_eeprom = open(sysfs_eeprom_path, "r+b") + sysfsfile_eeprom.seek(QSFP_POWEROVERRIDE_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/sfp.py new file mode 100644 index 00000000000..d8d88a2df2b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/sfp.py @@ -0,0 +1,739 @@ +#!/usr/bin/env python +# +# Name: sfp.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + import os + import sys + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8472 import sff8472Dom + from sonic_platform_base.sonic_sfp.sff8472 import sff8472InterfaceId + from sonic_platform_base.sonic_sfp.sff8472 import sffbase + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +INFO_OFFSET = 0 +DOM_OFFSET = 256 + +XCVR_INTFACE_BULK_OFFSET = 0 +XCVR_INTFACE_BULK_WIDTH_SFP = 21 +XCVR_VENDOR_NAME_OFFSET = 20 +XCVR_VENDOR_NAME_WIDTH = 16 +XCVR_VENDOR_OUI_OFFSET = 37 +XCVR_VENDOR_OUI_WIDTH = 3 +XCVR_VENDOR_PN_OFFSET = 40 +XCVR_VENDOR_PN_WIDTH = 16 +XCVR_HW_REV_OFFSET = 56 +XCVR_HW_REV_WIDTH_SFP = 4 +XCVR_VENDOR_SN_OFFSET = 68 +XCVR_VENDOR_SN_WIDTH = 16 +XCVR_VENDOR_DATE_OFFSET = 84 +XCVR_VENDOR_DATE_WIDTH = 8 +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 1 + +# Offset for values in SFP eeprom +SFP_TEMPE_OFFSET = 96 +SFP_TEMPE_WIDTH = 2 +SFP_VOLT_OFFSET = 98 +SFP_VOLT_WIDTH = 2 +SFP_CHANNL_MON_OFFSET = 100 +SFP_CHANNL_MON_WIDTH = 6 +SFP_MODULE_THRESHOLD_OFFSET = 0 +SFP_MODULE_THRESHOLD_WIDTH = 40 +SFP_CHANNL_THRESHOLD_OFFSET = 112 +SFP_CHANNL_THRESHOLD_WIDTH = 2 +SFP_STATUS_CONTROL_OFFSET = 110 +SFP_STATUS_CONTROL_WIDTH = 1 +SFP_TX_DISABLE_HARD_BIT = 7 +SFP_TX_DISABLE_SOFT_BIT = 6 + +class Sfp(SfpBase): + + def __init__(self, index): + self.__index = index + + self.__platform = "x86_64-inventec_d6356-r0" + self.__hwsku = "INVENTEC-D6356" + + self.__port_to_i2c_mapping = { + 0:22, 1:23, 2:24, 3:25, 4:26, 5:27, 6:28, 7:29, + 8:30, 9:31, 10:32, 11:33, 12:34, 13:35, 14:36, 15:37, + 16:38, 17:39, 18:40, 19:41, 20:42, 21:43, 22:44, 23:45, + 24:46, 25:47, 26:48, 27:49, 28:50, 29:51, 30:52, 31:53, + 32:54, 33:55, 34:56, 35:57, 36:58, 37:59, 38:60, 39:61, + 40:62, 41:63, 42:64, 43:65, 44:66, 45:67, 46:68, 47:69, + 48:14, 49:15, 50:16, 51:17, 52:18, 53:19, 54:20, 55:21 + } + self.__port_end = len(self.__port_to_i2c_mapping) - 1; + + self.__presence_attr = None + self.__eeprom_path = None + if self.__index in range(0, self.__port_end + 1): + self.__presence_attr = "/sys/class/swps/port{}/present".format(self.__index) + self.__eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom".format(self.__port_to_i2c_mapping[self.__index]) + + SfpBase.__init__(self) + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def __is_host(self): + return os.system("docker > /dev/null 2>&1") == 0 + + def __get_path_to_port_config_file(self): + host_platform_root_path = '/usr/share/sonic/device' + docker_hwsku_path = '/usr/share/sonic/hwsku' + + host_platform_path = "/".join([host_platform_root_path, self.__platform]) + hwsku_path = "/".join([host_platform_path, self.__hwsku]) if self.__is_host() else docker_hwsku_path + + return "/".join([hwsku_path, "port_config.ini"]) + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + sysfsfile_eeprom = None + eeprom_raw = [] + + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + sysfs_eeprom_path = self.__eeprom_path + try: + sysfsfile_eeprom = open(sysfs_eeprom_path, mode="rb", buffering=0) + sysfsfile_eeprom.seek(offset) + raw = sysfsfile_eeprom.read(num_bytes) + raw_len = len(raw) + for n in range(0, raw_len): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except: + pass + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + + return eeprom_raw + + def __convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + name = None + + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings(self.__get_path_to_port_config_file()) + name = sfputil_helper.logical[self.__index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_path = self.__presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 0): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("modelname", "N/A") + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("serialnum", "N/A") + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and not self.get_reset_status() + +############################################## +# SFP methods +############################################## + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + mominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + + transceiver_info_dict_keys = ['type', 'hardwarerev', + 'serialnum', 'manufacturename', + 'modelname', 'Connector', + 'encoding', 'ext_identifier', + 'ext_rateselect_compliance', 'cable_type', + 'cable_length', 'nominal_bit_rate', + 'specification_compliance', 'vendor_date', + 'vendor_oui'] + + sfp_cable_length_tup = ('LengthSMFkm-UnitsOfKm', 'LengthSMF(UnitsOf100m)', + 'Length50um(UnitsOf10m)', 'Length62.5um(UnitsOfm)', + 'LengthCable(UnitsOfm)', 'LengthOM3(UnitsOf10m)') + + sfp_compliance_code_tup = ('10GEthernetComplianceCode', 'InfinibandComplianceCode', + 'ESCONComplianceCodes', 'SONETComplianceCodes', + 'EthernetComplianceCodes', 'FibreChannelLinkLength', + 'FibreChannelTechnology', 'SFP+CableTechnology', + 'FibreChannelTransmissionMedia', 'FibreChannelSpeed') + + sfpi_obj = sff8472InterfaceId() + if not self.get_presence() or not sfpi_obj: + return {} + + offset = INFO_OFFSET + + sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes((offset + XCVR_INTFACE_BULK_OFFSET), XCVR_INTFACE_BULK_WIDTH_SFP) + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw, 0) + + sfp_vendor_name_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) + + sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) + + sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes((offset + XCVR_HW_REV_OFFSET), XCVR_HW_REV_WIDTH_SFP) + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) + + sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) + + sfp_vendor_oui_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) + if sfp_vendor_oui_raw is not None: + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_vendor_oui_raw, 0) + + sfp_vendor_date_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) + sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_vendor_date_raw, 0) + + transceiver_info_dict = dict.fromkeys(transceiver_info_dict_keys, 'N/A') + + if sfp_interface_bulk_data: + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + transceiver_info_dict['type_abbrv_name'] = sfp_interface_bulk_data['data']['type_abbrv_name']['value'] + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['NominalSignallingRate(UnitsOf100Mbd)']['value']) + + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] if sfp_vendor_name_data else 'N/A' + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] if sfp_vendor_pn_data else 'N/A' + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] if sfp_vendor_rev_data else 'N/A' + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] if sfp_vendor_sn_data else 'N/A' + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] if sfp_vendor_oui_data else 'N/A' + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] if sfp_vendor_date_data else 'N/A' + + transceiver_info_dict['cable_type'] = "Unknown" + transceiver_info_dict['cable_length'] = "Unknown" + for key in sfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + + compliance_code_dict = dict() + for key in sfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + return transceiver_info_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. + tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. + reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. + lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. + tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. + tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 + | |to channel 3. + temperature |INT |module temperature in Celsius + voltage |INT |supply voltage in mV + txbias |INT |TX Bias Current in mA, n is the channel number, + | |for example, tx2bias stands for tx bias of channel 2. + rxpower |INT |received optical power in mW, n is the channel number, + | |for example, rx2power stands for rx power of channel 2. + txpower |INT |TX output power in mW, n is the channel number, + | |for example, tx2power stands for tx power of channel 2. + ======================================================================== + """ + transceiver_dom_info_dict_keys = ['rx_los', 'tx_fault', + 'reset_status', 'power_lpmode', + 'tx_disable', 'tx_disable_channel', + 'temperature', 'voltage', + 'rx1power', 'rx2power', + 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', + 'tx3bias', 'tx4bias', + 'tx1power', 'tx2power', + 'tx3power', 'tx4power'] + + sfpd_obj = sff8472Dom() + if not self.get_presence() or not sfpd_obj: + return {} + + eeprom_ifraw = self.__read_eeprom_specific_bytes(0, DOM_OFFSET) + sfpi_obj = sff8472InterfaceId(eeprom_ifraw) + cal_type = sfpi_obj.get_calibration_type() + sfpd_obj._calibration_type = cal_type + + offset = DOM_OFFSET + transceiver_dom_info_dict = dict.fromkeys(transceiver_dom_info_dict_keys, 'N/A') + + dom_temperature_raw = self.__read_eeprom_specific_bytes((offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + + dom_voltage_raw = self.__read_eeprom_specific_bytes((offset + SFP_VOLT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes((offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_voltage_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + transceiver_dom_info_dict['tx1power'] = dom_voltage_data['data']['TXPower']['value'] + transceiver_dom_info_dict['rx1power'] = dom_voltage_data['data']['RXPower']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_voltage_data['data']['TXBias']['value'] + + for key in transceiver_dom_info_dict: + transceiver_dom_info_dict[key] = self.__convert_string_to_num(transceiver_dom_info_dict[key]) + + transceiver_dom_info_dict['reset_status'] = self.get_reset_status() + transceiver_dom_info_dict['rx_los'] = self.get_rx_los() + transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() + transceiver_dom_info_dict['tx_disable'] = self.get_tx_disable() + transceiver_dom_info_dict['tx_disable_channel'] = self.get_tx_disable_channel() + transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() + + return transceiver_dom_info_dict + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. + templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. + temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. + templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. + vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. + vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. + vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. + vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. + rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. + rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. + rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. + rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. + txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. + txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. + txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. + txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. + txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. + txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. + txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. + txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. + ======================================================================== + """ + transceiver_dom_threshold_info_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning'] + + sfpd_obj = sff8472Dom() + + if not self.get_presence() and not sfpd_obj: + return {} + + eeprom_ifraw = self.__read_eeprom_specific_bytes(0, DOM_OFFSET) + sfpi_obj = sff8472InterfaceId(eeprom_ifraw) + cal_type = sfpi_obj.get_calibration_type() + sfpd_obj._calibration_type = cal_type + + offset = DOM_OFFSET + transceiver_dom_threshold_info_dict = dict.fromkeys(transceiver_dom_threshold_info_dict_keys, 'N/A') + dom_module_threshold_raw = self.__read_eeprom_specific_bytes((offset + SFP_MODULE_THRESHOLD_OFFSET), SFP_MODULE_THRESHOLD_WIDTH) + if dom_module_threshold_raw is not None: + dom_module_threshold_data = sfpd_obj.parse_alarm_warning_threshold(dom_module_threshold_raw, 0) + + transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] + transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] + transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] + transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] + + transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VoltageHighAlarm']['value'] + transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VoltageLowAlarm']['value'] + transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VoltageHighWarning']['value'] + transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VoltageLowWarning']['value'] + + transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_module_threshold_data['data']['BiasHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_module_threshold_data['data']['BiasLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_module_threshold_data['data']['BiasHighWarning']['value'] + transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_module_threshold_data['data']['BiasLowWarning']['value'] + + transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_module_threshold_data['data']['TXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_module_threshold_data['data']['TXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_module_threshold_data['data']['TXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_module_threshold_data['data']['TXPowerLowWarning']['value'] + + transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_module_threshold_data['data']['RXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_module_threshold_data['data']['RXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_module_threshold_data['data']['RXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_module_threshold_data['data']['RXPowerLowWarning']['value'] + + for key in transceiver_dom_threshold_info_dict: + transceiver_dom_threshold_info_dict[key] = self.__convert_string_to_num(transceiver_dom_threshold_info_dict[key]) + + return transceiver_dom_threshold_info_dict + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + + Returns: + A Boolean, True if reset enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + rx_los = False + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + rx_los = (sffbase().test_bit(data, 1) != 0) + + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + tx_fault = False + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + tx_fault = (sffbase().test_bit(data, 2) != 0) + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + """ + tx_disable = False + tx_fault = False + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + tx_disable_hard = (sffbase().test_bit(data, SFP_TX_DISABLE_HARD_BIT) != 0) + tx_disable_soft = (sffbase().test_bit(data, SFP_TX_DISABLE_SOFT_BIT) != 0) + tx_disable = tx_disable_hard | tx_disable_soft + + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + # SFP doesn't support this feature + return 0 + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + + Returns: + An integer number of current temperature in Celsius + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("temperature", "N/A") + + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + + Returns: + An integer number of supply voltage in mV + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("voltage", "N/A") + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_bs = transceiver_dom_info_dict.get("tx1bias", "N/A") + return [tx1_bs, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + rx1_pw = transceiver_dom_info_dict.get("rx1power", "N/A") + return [rx1_pw, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_pw = transceiver_dom_info_dict.get("tx1power", "N/A") + return [tx1_pw, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + + Returns: + A boolean, True if successful, False if not + """ + # SFP doesn't support this feature + return False + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + sysfs_eeprom_path = self.__eeprom_path + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw is not None: + # Set bit 6 for Soft TX Disable Select + # 01000000 = 64 and 10111111 = 191 + tx_disable_bit = 64 if tx_disable else 191 + status_control = int(status_control_raw[0], 16) + tx_disable_ctl = (status_control | tx_disable_bit) if tx_disable else (status_control & tx_disable_bit) + try: + sysfsfile_eeprom = open(sysfs_eeprom_path, mode="r+b", buffering=0) + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom.seek(SFP_STATUS_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except: + #print("Error: unable to open file: %s" % str(e)) + return False + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + return False + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + + Returns: + A boolean, True if successful, False if not + """ + # SFP doesn't support this feature + return False + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + # SFP doesn't support this feature + return False + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + # SFP doesn't support this feature + return False + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/thermal.py new file mode 100644 index 00000000000..eba7ba728de --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/thermal.py @@ -0,0 +1,170 @@ +#!/usr/bin/env python +# +# Name: thermal.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + import os + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Thermal(ThermalBase): + + def __init__(self, index): + self.__index = index + + #thermal name list + self.__thermal_name_list = [ "PCH Temperature Sensor", + "CPU Board Temperature Sensor", + "FrontSide Temperature Sensor", + "NearASIC Temperature Sensor", + "RearSide Temperature Sensor" ] + + offset = 0 + if 0 != self.__index: + offset = 2 + self.__presence_attr = "/sys/class/hwmon/hwmon{}/temp1_input".format(self.__index + offset) + self.__temperature_attr = "/sys/class/hwmon/hwmon{}/temp1_input".format(self.__index + offset) + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return self.__thermal_name_list[self.__index] or "Unknown" + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_path = self.__presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) != 0): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + return "N/A" + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + return "N/A" + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() + +############################################## +# THERMAL methods +############################################## + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + temperature = 0.0 + attr_path = self.__temperature_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + temperature = float(attr_rv) / 1000 + + return temperature + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + + Returns: + A float number, the high threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + raise NotImplementedError + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + + Returns: + A float number, the low threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + raise NotImplementedError + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + raise NotImplementedError + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + raise NotImplementedError + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/transceiver_event.py b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/transceiver_event.py new file mode 100644 index 00000000000..7105e7f2119 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/sonic_platform/transceiver_event.py @@ -0,0 +1,115 @@ +#!/usr/bin/env python +# +# Name: transceiver_event.py, version: 1.0 +# + +try: + import time + import socket + import re + import os + from collections import OrderedDict +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class NetlinkEventMonitor(object): + __instance = None + + def __new__(cls, *args, **kwargs): + if not cls.__instance: + # print(cls) + cls.__instance = super(NetlinkEventMonitor, cls).__new__(cls) + cls.__instance.__recieved_events = OrderedDict() + return cls.__instance + + def __init__(self, timeout): + # print('__init__', self) + NETLINK_KOBJECT_UEVENT = 15 + self.__socket = socket.socket(socket.AF_NETLINK, socket.SOCK_DGRAM, NETLINK_KOBJECT_UEVENT) + self.__timeout = timeout + + def start(self): + # print('start', self.__timeout) + self.__socket.bind((os.getpid(), -1)) + if 0 == self.__timeout: + self.__socket.settimeout(None) + else: + self.__socket.settimeout(self.__timeout/1000.0) + + def stop(self): + self.__socket.close() + + def __enter__(self): + # print('__enter__', self) + self.start() + return self + + def __exit__(self, exc_type, exc_value, traceback): + # print('__exit__', self) + self.stop() + + def __iter__(self): + # print('__iter__', self) + while True: + for item in self.next_events(): + yield item + + def next_events(self): + try: + data = self.__socket.recv(16384) + event = {} + for item in data.split(b'\x00'): + if not item: + # check if we have an event and if we already received it + if event and 'SEQNUM' in event: + event_seqnum = event['SEQNUM'] + if event_seqnum in self.__recieved_events: + pass + else: + # print("=", event_seqnum) + self.__recieved_events[event_seqnum] = event + length = len(self.__recieved_events) + # print("=", length) + if (length > 100): + self.__recieved_events.popitem(last=False) + yield event + event = {} + else: + try: + k, v = item.split(b'=', 1) + event[k.decode('ascii')] = v.decode('ascii') + # print("=",k,v) + except ValueError: + pass + except Exception: + yield {} + +class TransceiverEvent(object): + + def __init__(self): + pass + + def get_transceiver_change_event(self, timeout=0): + port_dict = {} + with NetlinkEventMonitor(timeout) as netlink_monitor: + for event in netlink_monitor: + if event and 'SUBSYSTEM' in event: + if event['SUBSYSTEM'] == 'swps': + #print('SWPS event. From %s, ACTION %s, IF_TYPE %s, IF_LANE %s' % (event['DEVPATH'], event['ACTION'], event['IF_TYPE'], event['IF_LANE'])) + portname = event['DEVPATH'].split("/")[-1] + rc = re.match(r"port(?P\d+)",portname) + if rc is not None: + if event['ACTION'] == "remove": + remove_num = int(rc.group("num")) + port_dict[remove_num] = "0" + elif event['ACTION'] == "add": + add_num = int(rc.group("num")) + port_dict[add_num] = "1" + return True, port_dict + else: + return False, {} + else: + pass + else: + return True, {} diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356/utils/inventec_d6356_util.py b/platform/broadcom/sonic-platform-modules-inventec/d6356/utils/inventec_d6356_util.py new file mode 100755 index 00000000000..17eac1b0bb1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356/utils/inventec_d6356_util.py @@ -0,0 +1,261 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Inventec, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV: ', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install() + elif arg == 'fast-reboot-install': + install(1) + elif arg == 'clean': + uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[D6356]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +" with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + + +instantiate = [ +'echo inv_eeprom 0x55 > /sys/bus/i2c/devices/i2c-0/i2c-2/new_device' +#'echo inv_cpld 0x33 > /sys/bus/i2c/devices/i2c-0/i2c-2/new_device', +#'echo inv_cpld 0x77 > /sys/bus/i2c/devices/i2c-0/i2c-2/new_device' +] + + +drivers =[ +#kernel-dirvers +'gpio_ich', +'lpc_ich', +'i2c-i801', +'i2c-mux', +'i2c-mux-pca954x', +'i2c-mux-pca9541', +'i2c-dev', +'ucd9000', +#inv-modules +'inv_eeprom', +'inv_cpld', +'lm75', +'inv_psu', +'inv_platform', +'monitor', +'swps'] + + +# Modify for fast-reboot +def system_install(boot_option): + global FORCE + + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("rmmod i2c_ismt ", 1) + status, output = exec_cmd("rmmod i2c-i801 ", 1) + status, output = exec_cmd("rmmod gpio_ich ", 1) + status, output = exec_cmd("rmmod lpc_ich ", 1) + + #insert extra module + #status, output = exec_cmd("insmod /lib/modules/4.9.0-9-2-amd64/kernel/drivers/gpio/gpio-ich.ko gpiobase=0",1) + + #install drivers + ''' boot_option: 0 - normal, 1 - fast-reboot''' + for i in range(0,len(drivers)): + if drivers[i] == "swps": + if boot_option == 1: + status, output = exec_cmd("modprobe swps io_no_init=1", 1) + else: + status, output = exec_cmd("modprobe "+drivers[i], 1) + else: + status, output = exec_cmd("modprobe "+drivers[i], 1) + + if status: + print output + if FORCE == 0: + return status + + #instantiate devices + for i in range(0,len(instantiate)): + #time.sleep(1) + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status +# +# INV_FIX-4037 +# It replaces the original sff8436 driver with the optoe driver +# + #optoe map to i2c-bus + for i in range(14,22): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-6/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(22,30): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-7/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(30,38): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-8/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(38,46): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-9/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(46,54): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-10/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(54,62): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-11/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(62,70): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-12/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + + +def system_ready(): + if not device_found(): + return False + return True + +def install(boot_option=0): + ''' boot_option: 0 - normal, 1 - fast-reboot ''' + if not device_found(): + print "No device, installing...." + status = system_install(boot_option) + if status: + if FORCE == 0: + return status + else: + print "D6356 devices detected...." + return + +def uninstall(): + global FORCE + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"*0072", 0) + ret2, log = exec_cmd("ls "+i2c_prefix+"i2c-5", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/Makefile b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/Makefile new file mode 100755 index 00000000000..33b090c4f8e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/Makefile @@ -0,0 +1,12 @@ +obj-m += gpio-ich.o +obj-m += ucd9000.o +obj-m += i2c-mux-pca9541.o +obj-m += lpc_ich.o +obj-m += inv_cpld.o +obj-m += inv_platform.o +obj-m += inv_eeprom.o +obj-m += inv_psu.o +obj-m += swps.o +obj-m += monitor.o +swps-objs := inv_swps.o inv_mux.o io_expander.o transceiver.o sff_io.o +monitor-objs := inv_monitor.o inv_proxy.o diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/README b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/README new file mode 100644 index 00000000000..91b18941d93 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/README @@ -0,0 +1,961 @@ + ======================================== + * Switch Port Service Driver (SWPS) * + ======================================== + + Latest Version: 4.0 + Update Date: 2016/11/28 + + +1. DESCRIPTION + + SWPS driver is a Linux kernel driver which provide following main features + (1) Standard SFF interface to access transceiver/cables. + (2) Automatic handle mechansim for transceiver/cables. + (3) Automatic handle mechansim for port relate device. + (4) Automatic handle mechansim for I2C topology. + + +2. FEATURES + + SWPS driver has two mode which is POLLING_MODE and NON_POLLING_MODE. There + are some features only for POLLING_MODE(default). The following section will + markup them. + If you want to change the running mode, please reference Note-3.2. + + 2.1 Sysfs Interface (Each Mode) + => SWPS provide the Linux sysfs interface to access and control transceiver relate + features. The access path in Linux environment as below: + # /sys/class/swps/port[X] + + => Example for read data: + # cat /sys/class/swps/port0/id + + => Example for setup feature: + # echo 1 > /sys/class/swps/port0/lpmod + + 2.2 SFP Port Directory Tree and Attributes: + => /sys/class/swps/port + |-- br + |-- comp_eth + |-- comp_eth_10 + |-- comp_extend + |-- comp_rev + |-- connector + |-- hard_rs0 + |-- hard_rs1 + |-- id + |-- if_lane + |-- if_speed + |-- if_type + |-- info + |-- len_sm + |-- len_smf + |-- len_om1 + |-- len_om2 + |-- len_om3 + |-- len_om4 + |-- present + |-- rate_id + |-- rx_power + |-- rxlos + |-- soft_rs0 + |-- soft_rs1 + |-- temperature + |-- tx_bias + |-- tx_disalbe + |-- tx_fault + |-- tx_power + |-- vendor_name + |-- vendor_pn + |-- vendor_rev + |-- vendor_sn + |-- voltage + `-- wavelength + + => ----------------------------------------------------------------------- + | Attribute | | Description | + ----------------------------------------------------------------------- + | br | R | Name: Bit Rate | + | | | Addr: SFF-8472 / A0h / 12 | + | | | Desc: Nominal signalling rate, units of 100MBd. | + ----------------------------------------------------------------------- + | comp_eth | R | Name: Trnasceiver compliance code for 1G | + | | | Addr: SFF-8472 / A0h / 3 | + | | | Desc: Byte-3 Bit 0~3 for 1G defintion | + ----------------------------------------------------------------------- + | comp_eth_10 | R | Name: Trnasceiver compliance code for 10G | + | | | Addr: SFF-8472 / A0h / 3 | + | | | Desc: Byte-3 Bit 5~7 for 10G defintion | + ----------------------------------------------------------------------- + | comp_extend | R | Name: Trnasceiver extended compliance code | + | | | Addr: SFF-8472 / A0h / 36 | + | | | Desc: Byte-36 Bit 0~7 | + ----------------------------------------------------------------------- + | comp_rev | R | Name: SFF-8472 Compliance | + | | | Addr: SFF-8472 / A0h / 94 | + | | | Desc: Indicates which revision of SFF-8472 the | + | | | transceiver complies with. | + ----------------------------------------------------------------------- + | connector | R | Name: Connector | + | | | Addr: SFF-8472 / A0h / 2 | + | | | Desc: Type of connector | + ----------------------------------------------------------------------- + | hard_rs0 | R/W | Name: RX Hard Rate Select (Via IO Expander) | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Read/write bit that allows Hardward rate | + | | | select control. Writing '1' selects full | + | | | bandwidth operation. | + ----------------------------------------------------------------------- + | hard_rs1 | R/W | Name: TX Hard Rate Select (Via IO Expander) | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Read/write bit that allows software rate | + | | | select control. Writing '1' selects full | + | | | bandwidth operation. | + ----------------------------------------------------------------------- + | id | R | Name: Identifier | + | | | Addr: SFF-8472 / A0h / 0 | + | | | Desc: Type of transceiver | + ----------------------------------------------------------------------- + | if_lane | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Type of transceiver | + ----------------------------------------------------------------------- + | if_type | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Provide if_type info for BCM and apps. | + ----------------------------------------------------------------------- + | if_speed | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Provide if_speed info for BCM and apps. | + ----------------------------------------------------------------------- + | info | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Provide detail transceiver and cable type | + | | | for BCM and apps. | + ----------------------------------------------------------------------- + | len_smf | R | Name: Length (single mode)-km | + | | | Addr: SFF-8472 / A0h / 14 | + | | | Desc: Link length supported for single mode. | + | | | units of km. | + ----------------------------------------------------------------------- + | len_sm | R | Name: Length (single mode)-(100's)m | + | | | Addr: SFF-8472 / A0h / 15 | + | | | Desc: Link length supported for single mode. | + | | | units of 100 m. | + ----------------------------------------------------------------------- + | len_om1 | R | Name: Length (62.5um, OM1) | + | | | Addr: SFF-8472 / A0h / 17 | + | | | Desc: Link length supported for OM1 [200 MHz*km | + | | | at 850nm, 500 MHz*km at 1310nm] fiber. | + | | | units of 10 m. | + ----------------------------------------------------------------------- + | len_om2 | R | Name: Length (50um, OM2) | + | | | Addr: SFF-8472 / A0h / 16 | + | | | Desc: Link length supported for OM2 [500MHz*km | + | | | at 850nm] fiber. | + | | | units of 10 m. | + ----------------------------------------------------------------------- + | len_om3 | R | Name: Length (50um, OM3) | + | | | Addr: SFF-8472 / A0h / 19 | + | | | Desc: Link length supported for OM3 [2000 | + | | | MHz*km] fiber | + | | | units of km. | + ----------------------------------------------------------------------- + | len_om4 | R | Name: Length (50um, OM4) and Length (Active | + | | | Cable or Copper) | + | | | Addr: SFF-8472 / A0h / 18 | + | | | Desc: Link length supported for OM4 [4700 MHz* | + | | | km] fiber. | + | | | units of 10 m. | + ----------------------------------------------------------------------- + | present | R | Name: IO Expander present pin | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Show transceiver exist or not | + ---------------------------------------------------------------------- + | rate_id | R | Name: Rate Identifier | + | | | Addr: SFF-8472 / A0h / 13 | + | | | Desc: Type of rate select functionality | + ----------------------------------------------------------------------- + | rx_power | R | Name: RX Power MSB & LSB | + | | | Addr: SFF-8472 / A0h / 104-105 | + | | | Desc: Measured RX input power. Range:0-6.5 mW | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + ----------------------------------------------------------------------- + | rxlos | R | Name: Receiver Loss of Signal | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: An adequate optical input results in a low| + | | | Rx_LOS output while a high Rx_LOS output | + | | | indicates an unusable optical input. | + ----------------------------------------------------------------------- + | soft_rs0 | R/W | Name: RX Soft Rate Select (Transceiver side) | + | | | Addr: SFF-8472 / A2h / 110 bit-3 | + | | | Desc: Read/write bit that allows software rate | + | | | select control. Writing '1' selects full | + | | | bandwidth operation. | + ----------------------------------------------------------------------- + | soft_rs1 | R/W | Name: TX Soft Rate Select (Transceiver side) | + | | | Addr: SFF-8472 / A0h / 118 bit-3 | + | | | Desc: Read/write bit that allows software rate | + | | | select control. Writing '1' selects full | + | | | bandwidth operation. | + ----------------------------------------------------------------------- + | temperature | R | Name: Temperature MSB & LSB | + | | | Addr: SFF-8472 / A2h / 96 | + | | | Desc: Internally measured module temperature. | + | | | Range of -128 ~ +128 (Degrees C) | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + ----------------------------------------------------------------------- + | tx_bias | R | Name: TX Bias MSB & LSB | + | | | Addr: SFF-8472 / A2h / 100-101 | + | | | Desc: Measured transmitter laser bias current. | + | | | Range of 0 to 131 mA. | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + ----------------------------------------------------------------------- + | tx_disalbe | R/W | Name: TX Disable | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Disable Tx output signals. | + | | | 0 is enable, 1 is disable. | + ----------------------------------------------------------------------- + | tx_fault | R | Name: TX Fault | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: The output indicates LOW when the | + | | | transmitter is operating normally, and | + | | | HIGH with a laser fault including laser | + | | | end-of-life. | + ----------------------------------------------------------------------- + | tx_power | R | Name: TX Power MSB & LSB | + | | | Addr: SFF-8472 / A2h / 102-103 | + | | | Desc: Measured TX output power. | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + ----------------------------------------------------------------------- + | vendor_name | R | Name: Vendor name | + | | | Addr: SFF-8472 / A0h / 20-35 | + | | | Desc: SFP vendor name (ASCII) | + ----------------------------------------------------------------------- + | vendor_pn | R | Name: Vendor PN | + | | | Addr: SFF-8472 / A0h / 40-55 | + | | | Desc: Part number provided by SFP vendor (ASCII)| + ----------------------------------------------------------------------- + | vendor_rev | R | Name: Vendor rev | + | | | Addr: SFF-8472 / A0h / 56-59 | + | | | Desc: Revision level for part number provided | + | | | by vendor (ASCII) | + ----------------------------------------------------------------------- + | vendor_sn | R | Name: Vendor SN | + | | | Addr: SFF-8472 / A0h / 68-83 | + | | | Desc: Serial number provided by vendor (ASCII) | + ----------------------------------------------------------------------- + | voltage | R | Name: Vcc MSB & LSB | + | | | Addr: SFF-8472 / A0h / 98-99 | + | | | Desc: Internally measured supply voltage in | + | | | transceiver. | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + ----------------------------------------------------------------------- + | wavelength | R | Name: Laser wavelength | + | | | Addr: SFF-8472 / A0h / 60-61 | + | | | Desc: Laser wavelength (Passive/Active Cable | + | | | Specification Compliance) | + ----------------------------------------------------------------------- + => Note: Some atributes are depend on Hardware (Platform) type. + + + 2.3 QSFP Port Directory Tree and Attributes: + => /sys/class/swps/port + |-- br + |-- cdr (QSFP28 only) + |-- comp_eth + |-- comp_eth_10_40 + |-- comp_extend + |-- comp_rev + |-- connector + |-- id + |-- if_lane + |-- if_speed + |-- if_type + |-- info + |-- len_smf + |-- len_om1 + |-- len_om2 + |-- len_om3 + |-- len_om4 + |-- lpmod + |-- modsel + |-- power_cls + |-- present + |-- reset + |-- rx_power + |-- soft_rx_los + |-- soft_tx_disable + |-- soft_tx_fault + |-- temperature + |-- tx_bias + |-- tx_power + |-- vendor_name + |-- vendor_pn + |-- vendor_rev + |-- vendor_sn + |-- voltage + `-- wavelength + + => --------------------------------------------------------------------------- + | Attribute | | Description | + --------------------------------------------------------------------------- + | br | R | Name: BR, nominal | + | | | Addr: SFF-8636 / 00h / 140 | + | | | Desc: Nominal signalling rate, units of 100MBd. | + --------------------------------------------------------------------------- + | cdr | R/W | Name: CDR control | + | | | Addr: SFF-8636 / 00h / 98 | + | | | Desc: 100G QSFP28 | + --------------------------------------------------------------------------- + | comp_eth | R | Name: Trnasceiver compliance code for 1G | + | | | Addr: SFF-8636 / 00h / 134 | + | | | Desc: Byte-134 Bit 0~3 for 1G defintion | + --------------------------------------------------------------------------- + | comp_eth_10_40 | R | Name: Trnasceiver compliance code for 10/40G | + | | | Addr: SFF-8636 / 00h / 131 | + | | | Desc: 10/40G Ethernet Compliance Codes | + --------------------------------------------------------------------------- + | comp_extend | R | Name: Trnasceiver extended compliance code | + | | | Addr: SFF-8636 / 00h / 192 | + | | | Desc: Extended Specification Compliance Codes | + | | | (See SFF-8024 Transceiver Management) | | + --------------------------------------------------------------------------- + | comp_rev | R | Name: Revision Compliance | + | | | Addr: SFF-8636 / 00h / 1 | + | | | Desc: Indicates which revision of SFF-8472 the | + | | | transceiver complies with. | + --------------------------------------------------------------------------- + | connector | R | Name: Connector | + | | | Addr: SFF-8636 / 00h / 130 | + | | | Desc: Type of connector | + --------------------------------------------------------------------------- + | id | R | Name: Identifier | + | | | Addr: SFF-8636 / 00h / 0 & 128 | + | | | Desc: Type of transceiver | + --------------------------------------------------------------------------- + | if_lane | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Type of transceiver | + --------------------------------------------------------------------------- + | if_type | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Provide if_type info for BCM and apps. | + --------------------------------------------------------------------------- + | if_speed | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Provide if_speed info for BCM and apps. | + --------------------------------------------------------------------------- + | info | R | Name: Inventec Internal Interface | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Provide detail transceiver and cable type | + | | | for BCM and apps. | + --------------------------------------------------------------------------- + | len_smf | R | Name: Length (single mode)-km | + | | | Addr: SFF-8636 / 00h / 142 | + | | | Desc: Link length supported for SMF fiber in km | + | | | units of KM. | + --------------------------------------------------------------------------- + | len_om1 | R | Name: Length (62.5um, OM1) | + | | | Addr: SFF-8636 / 00h / 145 | + | | | Desc: Link length supported for OM1 [200 MHz*km | + | | | at 850nm, 500 MHz*km at 1310nm] fiber. | + | | | units of 1 m. | + --------------------------------------------------------------------------- + | len_om2 | R | Name: Length (50um, OM2) | + | | | Addr: SFF-8636 / 00h / 144 | + | | | Desc: Link length supported for OM2 [500MHz*km | + | | | at 850nm] fiber. | + | | | units of 1 m. | + --------------------------------------------------------------------------- + | len_om3 | R | Name: Length (50um, OM3) | + | | | Addr: SFF-8636 / 00h / 143 | + | | | Desc: Link length supported for OM3 [2000 | + | | | MHz*km] fiber | + | | | units of 2m. | + --------------------------------------------------------------------------- + | len_om4 | R | Name: Length (50um, OM4) and Length (Active | + | | | Cable or Copper) | + | | | Addr: SFF-8636 / 00h / 146 | + | | | Desc: Length of passive or active cable assembly| + | | | (units of 1 m) or link length supported | + | | | for OM4 50/125 um fiber (units of 2m) as | + | | | indicated by Byte 147. See 6.3.12. | + --------------------------------------------------------------------------- + | lpmod | R/W | Name: IO Expander lpmod pin | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Please reference SFF-8438 LPMode. | + | | | 1 is Low power mode | + | | | 0 is High power mode | + --------------------------------------------------------------------------- + | modsel | R/W | Name: IO Expander modsel pin | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Please reference SFF-8438 ModSelL. | + | | | The ModSelL is an input pin. When held | + | | | low by the host, the module responds to | + | | | 2-wire serial communication commands. | + --------------------------------------------------------------------------- + | power_cls | R | Name: Thrasceiver Power Class | + | | | Addr: SFF-8636 / 00h / 129 Bit 0-1, 6-7 | + | | | Desc: Class-1 (1.5W) ~ Class-7 (5W) | + --------------------------------------------------------------------------- + | present | R | Name: IO Expander present pin | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Show transceiver exist or not | + --------------------------------------------------------------------------- + | reset | R/W | Name: IO Expander reset pin | + | | | Addr: Depend on Inventec machine type. | + | | | Desc: Please reference SFF-8438 ResetL. | + --------------------------------------------------------------------------- + | rx_power | R | Name: RX Power MSB & LSB | + | | | Addr: SFF-8636 / 00h / 34-41 | + | | | Desc: Measured RX input power. Range:0-6.5 mW | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + --------------------------------------------------------------------------- + | soft_rx_los | R | Name: Receiver Loss of Signal (Trnasceiver | + | | | internal) | + | | | Addr: SFF-8636 / 00h / 3 | + | | | Desc: Latched RX LOS indicator. | + | | | Byte 3, Bit 0-3 mapping to channel 1-4 | + --------------------------------------------------------------------------- + | soft_tx_disable | R/W | Name: TX Disable (Trnasceiver internal) | + | | | Addr: SFF-8636 / 00h / 86 | + | | | Desc: Bit 0-3 mapping to channel 1-4 | + --------------------------------------------------------------------------- + | soft_tx_fault | R | Name: TX Fault (Trnasceiver internal) | + | | | Addr: SFF-8636 / 00h / 3 | + | | | Desc: Bit 0-3 mapping to channel 1-4 | + --------------------------------------------------------------------------- + | temperature | R | Name: Temperature MSB & LSB | + | | | Addr: SFF-8636 / 00h / 22-23 | + | | | Desc: Internally measured module temperature. | + | | | Range of -128 ~ +128 (Degrees C) | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + --------------------------------------------------------------------------- + | tx_bias | R | Name: TX Bias MSB & LSB | + | | | Addr: SFF-8636 / 00h / 42-49 | + | | | Desc: Measured transmitter laser bias current. | + | | | Range of 0 to 131 mA. | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + --------------------------------------------------------------------------- + | tx_power | R | Name: TX Power MSB & LSB | + | | | Addr: SFF-8636 / 00h / 50-57 | + | | | Desc: Measured TX output power. | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + --------------------------------------------------------------------------- + | vendor_name | R | Name: Vendor name | + | | | Addr: SFF-8636 / 00h / 148-163 | + | | | Desc: SFP vendor name (ASCII) | + --------------------------------------------------------------------------- + | vendor_pn | R | Name: Vendor PN | + | | | Addr: SFF-8636 / 00h / 168-183 | + | | | Desc: Part number provided by SFP vendor (ASCII)| + --------------------------------------------------------------------------- + | vendor_rev | R | Name: Vendor rev | + | | | Addr: SFF-8636 / 00h / 184-185 | + | | | Desc: Revision level for part number provided | + | | | by vendor (ASCII) | + --------------------------------------------------------------------------- + | vendor_sn | R | Name: Vendor SN | + | | | Addr: SFF-8636 / 00h / 196-211 | + | | | Desc: Serial number provided by vendor (ASCII) | + --------------------------------------------------------------------------- + | voltage | R | Name: Vcc MSB & LSB | + | | | Addr: SFF-8636 / 00h / 26-27 | + | | | Desc: Internally measured supply voltage in | + | | | transceiver. | + | | | Note: This feature depend on trnasceiver vendor.| + | | | SWPS will show error code if it detect | + | | | transceiver does not supported. | + --------------------------------------------------------------------------- + | wavelength | R | Name: Wavelength or Copper Cable Attenuation | + | | | Addr: SFF-8636 / A0h / 186-187 | + | | | Desc: Nominal laser wavelength (wavelength = | + | | | value/20 in nm) or copper cable attenuation in | + | | | dB at 2.5 GHz (Byte 186) and 5.0GHz (Byte 187) | + --------------------------------------------------------------------------- + => Note: Some atributes are depend on Hardware (Platform) type. + + 2.4 SWPS Module Control and Information Interface: + => /sys/class/swps/module + |-- platform + |-- version + `-- reset_swps + + => ----------------------------------------------------------------------- + | Attribute | | Description | + ----------------------------------------------------------------------- + | platform | R | Name: Inventec platform name | + | | | Desc: Provide platform type which SWPS is | + | | | running. | + ----------------------------------------------------------------------- + | version | R | Name: SWPS version | + | | | Desc: Provide SWPS version information. | + ----------------------------------------------------------------------- + | reset_swps | W | Name: SWPS reset interface | + | | | Desc: This interface can trigger SWPS driver to | + | | | re-initial. You should write the correct | + | | | password to this interface, then SWPS | + | | | will re-initial. | + ----------------------------------------------------------------------- + + 2.5 Automatic Event Handling (POLLING_MODE Only) + => When SWPS running on "POLLING_MODE", it will automatic handle event of + user plug/remove/swap transceiver. The descriptions for handling actions + as below: + ======================================================================== + | Event | Handling Actions | + ======================================================================== + | Plug transceiver | 1. Detect and verify. | + | | 2. Adjust system settings (Ex: LP/HP mode) | + | | 3. Setup transceiver functions (Ex: CDR) | + | | 4. Log plug-transceiver event and transceiver | + | | information. | + | | 5. Send uevent to notify userspace. | + ------------------------------------------------------------------------ + | Swap transceiver | 1. Detect and verify. | + | | 2. Renew sysfs interface and internal handling | + | | mechanism. | + | | 3. Log swap-transceiver event and transceiver | + | | information. | + | | 4. Adjust system settings (Ex: LP/HP mode) | + | | 5. Setup transceiver functions (Ex: CDR) | + | | 6. Send uevent to notify userspace. | + ------------------------------------------------------------------------ + | Remove tramsceiver | 1. Log remove-transceiver event. | + | | 2. Send uevent to notify userspace. | + ------------------------------------------------------------------------ + + 2.6 Automatic Power Mode Handling (POLLING_MODE Only) + => When SWPS under "POLLING_MODE", it will detect transceiver power class + then adjust power mode to fit requirement automatically. + The handle rule as below: + ======================================================================== + | Transceiver Power Class | System Power Mode | + ======================================================================== + | Power Class 1 | Low power mode | + ------------------------------------------------------------------------ + | Power Class 2 ~ 7 | High power mode | + ------------------------------------------------------------------------ + + 2.7 Automatic Transceiver Setup (POLLING_MODE Only) + => SWPS will automatic setup pre-define configurations to transceiver when + user plug it. + The pre-define configuration list as below: + ======================================================================== + | Transceiver Type | Pre-define Configuration | + ======================================================================== + | SFP multi-Rate | Dynamic detect and setup transceiver mode | + | | to fit system settings. | + ------------------------------------------------------------------------ + | SFP 1G copper | Dynamic detect and sync up external phy | + | | state. (Need additional user-space app) | | + ------------------------------------------------------------------------ + | QSFP | Dynamic detect and setup power mode. | + ------------------------------------------------------------------------ + | QSFP | Dynamic detect and Setup BCM interface | + | | configurations (Need additional user-space | + | | app) | + ------------------------------------------------------------------------ + | QSFP28-100G | Dynamic detect and CDR enable. | + ------------------------------------------------------------------------ + + 2.8 Transceiver Information Dumper (POLLING_MODE only) + => SWPS driver can dump the transceiver information when it detect user plug + transceiver event, then keeps log data in syslog. + The dump items and example as below: + => Log example: + [SWPS] Dump transceiver information: port52 + => :QSFP+ + => :FINISAR CORP. + => :FTL4C1QE1C + => :A1 + => :UT80G0V + => :Class_4 + => :0x67 + => :0 + => :0 + => :0x00 + + 2.9 Event Notification (POLLING_MODE only) + => SWPS supports Linux uevent mechanism. SWPS will send uevent to notify userspace + when it detect user plug or remove the transceiver. Userspace app can leverage + this feature to know event occurs, and implement additional handle features. + + => Currently, SWPS support two type of uevent transceiver "ADD" and transceiver + "REMOVE". The uevent massage example as below: + + => Example: "ADD" uevent message + add@/devices/virtual/swps/port48 + ACTION=add + DEVPATH=/devices/virtual/swps/port48 + SUBSYSTEM=swps + IF_TYPE=SR4 + IF_SPEED=100000 + IF_LANE=81,82,83,84 + MAJOR=250 + MINOR=48 + DEVNAME=port48 + SEQNUM=4881 + + => Example: "REMOVE" uevent message + remove@/devices/virtual/swps/port48 + ACTION=remove + DEVPATH=/devices/virtual/swps/port48 + SUBSYSTEM=swps + IF_TYPE=UNKNOW + IF_SPEED=UNKNOW + IF_LANE=81,82,83,84 + MAJOR=250 + MINOR=48 + DEVNAME=port48 + SEQNUM=4880 + + 2.10 Automatic Rate Select Handling (POLLING_MODE Only) + => SWPS support automatic rate select handling for muti-rate mode transceiver. It + will automatic enable and setup transceiver Rate_Select function when it detect + multi-rate transceiver been plugged in. The support list as below: + ======================================================================== + | Rate ID | Type | Spec | Description | + ======================================================================== + | 0x02 | SFP | SFF-8431 | SFF-8431 (8/4/2G Rx Rate_Select only) | + ------------------------------------------------------------------------ + | 0x04 | SFP | SFF-8431 | SFF-8431 (8/4/2G Tx Rate_Select only) | + ------------------------------------------------------------------------ + | 0x06 | SFP | SFF-8431 | SFF-8431 (8/4/2G Independent Rx & | + | | | | Tx Rate_select) | + ------------------------------------------------------------------------ + + 2.11 Automatic handle mechansim for I2C topology. + => SWAPS responsible to monitor the status of I2C topology. It will trigger recover + mechanism when it detect the I2C crash event. The recover procedure as below: + (1) SWPS detect I2C crash event + (2) Reset I2C topology. + (3) Find out the root cause port and isolate it. + + +3. NOTE + + 3.1 Supported Platform and Transceiver: + => ======================================================================== + | Platform | Supported Transceiver | + ======================================================================== + | Magnolia | Port 1~48: SFP, SFP+ | + | | Port 49~54: QSFP, QSFP+ | + ------------------------------------------------------------------------ + | Redwood_x86 | Port 1~32: QSFP, QSFP+, QSFP28 | + ------------------------------------------------------------------------ + | Hudson_32i | Port 1~32: QSFP, QSFP+ | + ------------------------------------------------------------------------ + | Spruce | Port 49~54: QSFP, QSFP+ | + ------------------------------------------------------------------------ + | Cypress | Port 1~48: SFP, SFP+, SFP28 | + | | Port 49~54: QSFP, QSFP+, QSFP28 | + ------------------------------------------------------------------------ + + 3.2 Adjust Running Mode + => You can select POLLING_MODE or NON_POLLING_MODE via modify SWP_POLLING_ENABLE + variable which is in inv_swps.h as below: + #define SWP_POLLING_ENABLE (0) /* NON_POLLING_ENABLE */ + #define SWP_POLLING_ENABLE (1) /* POLLING_ENABLE */ + + 3.3 Adjust Platform Type + => You should configure the correct platform type to PLATFORM_SETTINGS variable + which is in inv_swps.h. The following example is Redwood's configuration. + #define PLATFORM_SETTINGS PLATFORM_TYPE_REDWOOD + + +4. CHANGE LOG + ------------------------------------------------------------------------ + * Version: 4.3.1 + * Date : 2018/07/20 + * Bug Fixed:: + 1. Repease procedure and reference count issues. + * New Feature: + 1. Supported new platform: Peony-SFP, Peony-Copper. + 2. Supported SKU auto-detect for Peony. + 3. Supported I2C topology reset via CPLD. + 4. Supported I2C topology handling for RANGELEY platform. + 5. Solved defect of i2c-gpio return abnormal value when I2C crash. + ------------------------------------------------------------------------ + * Version: 4.2.10 + * Date : 2018/06/26 + * New Feature: + 1. Support new platform: Gulmohar. + ------------------------------------------------------------------------ + * Version: 4.2.9 + * Date : 2018/01/19 + * New Feature: + 1. Support new platform: Maple. + ------------------------------------------------------------------------ + * Version: 4.2.8 + * Date : 2018/01/12 + * New Feature: + 1. Support new platform: Cottonwood. + ------------------------------------------------------------------------ + * Version: 4.2.7 + * Date : 2017/11/07 + * New Feature: + 1. New sysfs interface for SFP port: + > extphy_offset, extphy_reg + ------------------------------------------------------------------------ + * Version: 4.2.6 + * Date : 2017/10/25 + * New Feature: + 1. Support new platform: Lavender. + ------------------------------------------------------------------------ + * Version: 4.2.5 + * Date : 2017/10/17 + * Bug Fixed:: + 1. Bug 2647: [Magnolia][Drivers]Sysfs write 0 to tx_enable fail for + ports 29-32. It works for other ports + ------------------------------------------------------------------------ + * Version: 4.2.4 + * Date : 2017/09/06 + * New Feature: + 1. Support new platform: Tahoe, Sequoia. + ------------------------------------------------------------------------ + * Version: 4.2.3 + * Date : 2017/05/31 + * Update: + 1. Cache mode for read vendor relate attributes + ------------------------------------------------------------------------ + * Version: 4.2.2 + * Date : 2017/05/05 + * Update: + 1. I2C topology handle mechanism + - Support all platform: Cypress, Magnolia, Redwood, Spruce, Hudson32i. + + ------------------------------------------------------------------------ + * Version: 4.2.1 + * Date : 2017/04/27 + * Update: + 1. Remove transceiver EQ handle mechanism. + + ------------------------------------------------------------------------ + * Version: 4.0.5 + * Date : 2017/03/27 + * New Feature: + 1. Dynamic adjust transceiver EQ and relate tuning value. + 2. Support all transceiver and AOC of Baidu AVL List-1 & 2. + 3. Auto handling mechanism for tx_disable state. + + * Bug Fixed: + 1. Bug 2271: Transceiver timing issues for QSFP auto tx disable mechanism + ------------------------------------------------------------------------ + * Version: 4.0 + * Date : 2016/11/28 + * New Feature: + 1. I2C topology handle mechanism + - Support platform type: Cypress. + 2. SysFS interface: reset_i2c + + * Update: + 1. Enhance fault tolerance features for transceiver relate issues. + 2. Enhance state machine. + + * Bug Fixed: + 1. I2C relate bugs + ------------------------------------------------------------------------ + * Version: 3.2 + * Date : 2016/09/23 + * New Feature: + 1. Sysfs interface: + > SFP port : + comp_extend + > QSFP port: + soft_rx_los, soft_tx_disable, soft_tx_fault + 2. Support platform type: Redwood FSL, Cypress INV, Cypress Baidu, Magnolia FNC. + 3. Support Linux kernel version 3.10.x ~ 3.16.x + 4. Fault tolerance features for I2C relate issues. + + * Update: + 1. Enhance fault tolerance features for transceiver relate issues. + 2. Enhance state machine. + 3. Modify checking policy of SWPS initial procedure. + > This version, SWPS won't stop initial procedure if user inserted the INVALID + transceiver before bootup switch. + + * Bug Fixed: + 1. Bug 1905 - [Magnolia]When plug in 1G copper SFP, console displays + "i2c_smbus_read_byte_data fail" continuously + ------------------------------------------------------------------------ + * Version: 3.1 + * Date : 2016/06/20 + * New Feature: + 1. Sysfs interface: + > SFP port : + if_lane, len_sm, len_smf, len_om1, len_om2, len_om3, len_om4, + comp_eth, comp_eth_10, ext_id, wavelength, connector + > QSFP port: + if_lane, temperature, voltage, tx_bias, tx_power, rx_power, + len_smf, len_om1, len_om2, len_om3, len_om4, comp_eth, comp_eth_10_40, + ext_id, wavelength, connector + 2. Provide physical port to lane id mapping information. + 3. IO Expander polling retry and handle mechanism for case of i2c smbus unstable. + 4. Provide infomation for iCOS and SWPS user space daemon. + + * Update: + 1. Add new attribute in uevent: + - IF_LANE: Physical port to Lane id information. + 2. Interface rename: + - rev_comp => comp_rev + - len_50um => len_om2 + - len_62_5um => len_om1 + + * Bug Fixed: + 1. None + ------------------------------------------------------------------------ + * Version: 3.0 + * Date : 2016/05/19 + * New Feature: + 1. Sysfs interface: platform, version, reset_swps, info, if_type, + if_speed. + 2. Transceiver and cable identify mechanism. + - QSFP identify features: + > 10G optical: SR, LR, LRM + > 10G copper, DAC + > 40G optical: LR4, SR4, CR4, Active cable, ER4, PSM4 + > 40G copper, DAC + > 100G optical : SR4, LR4, ER4, SR10, CWDM4, PSM4, CLR4 + > 100G copper: ACC, CR4, DAC + - SFP identify features: + > 1G optical: SX, LX, + > 1G copper, CX, BaseT + > 10G optical: SR, LR, LRM, ER, AOC + > 10G copper, DAC + > 25G optical : SR, LR, ER, AOC, + > 25G copper: ACC, CR, + - Connector identify feature: + > LC + > Optical pigtail + > Copper pigtail, + > MPO 1x12 + > MPO 2x16 + > No separable connector + 3. Link state monitor mechanism for RJ-45 transceiver. + + * Update: + 1. Add new attribute in uevent: + - IF_TYPE : BCM interface type. (By chipset) + - IF_SPEED: Transceiver speed information. + 2. Enhance SWPS long-tern task handling. + + * Bug Fixed: + 1. Bug 928 - [Magnolia DVT][Port]Port status display incorrect on 1G + speed mode when plug in "Finisar" and "Delta" copper SFP. + 2. Bug 1133 - [Magnolia DVT][Port]Port status display incorrect on 1G + speed mode when plug in "AVAGO" 1G copper SFP. + 3. Bug 1519 - [Redwood DVT2] [Port mode] DAC cable could not link up on + Redwood 3.2.1.1 + ------------------------------------------------------------------------ + * Version: 2.5 + * Date : 2016/04/06 + * New Feature: + 1. Sysfs interface: temperature, voltage, tx_bias, tx_power, rx_power + 2. Automatic Rate Select handling: + 2.1 SFF-8431 (8/4/2G Rx Rate_Select only) + 2.2 SFF-8431 (8/4/2G Tx Rate_Select only) + 2.3 SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) + * Update: + 1. None + * Bug Fixed: + 1. Bug 1076 - [Magnolia DVT][Transceiver]Finisar FTLX8571D3BCV 1G/10G + Dual-Rate SFP+ transceiver can't link up on 10G mode. + ------------------------------------------------------------------------ + * Version: 2.4 + * Date : 2016/03/30 + * New Feature: + 1. Support platform type: Cypress. + 2. Support transceiver type: SFP28. + 3. Sysfs interface: rate_id, soft_rs0, soft_rs1, hard_rs0, hard_rs1 + * Update: + 1. None + * Bug Fixed: + 1. None + ------------------------------------------------------------------------ + * Version: 2.3 + * Date : 2016/03/14 + * New Feature: + 1. Support platform type: Spruce. + * Update: + 1. None + * Bug Fixed: + 1. None + ------------------------------------------------------------------------ + * Version: 2.2 + * Date : 2016/03/03 + * New Feature: + 1. Support platform type: Hudson32i. + 2. Transceiver Information Dumper. + * Update: + 1. Enhance automatic power mode handling: + => Support special transceiver power_class format (Class 5-7) which + is not following Finisar. + * Bug Fixed: + 1. Bug-1438: [Redwood] [Transceiver] 100G LR4 transceiver can not + link up on Redwood + ------------------------------------------------------------------------ + * Version: 2.1 + * Date : 2016/01/29 + * New Feature: + 1. Event Notification. + 2. Add sysfs interface attribute: power_cls + * Update: + 1. Enhance automatic power mode handling: + => Dynamic power mode control. + => Protect mechanism (delay 0.6 sec to pull high). + * Bug Fixed: + 1. None + ------------------------------------------------------------------------ + * Version: 2.0 + * Date : 2016/01/22 + * New Feature: + 1. Support platform type: Redwood. + 2. Support transceiver type: QSFP28. + 3. Automatic event handling. + 4. Automatic power mode handling. + 5. Automatic transceiver setup. + 6. Add sysfs interface attribute: cdr. + * Update: + 1. None + * Bug Fixed: + 1. Bug-1279: [Magnolia DVT][Transceiver]Finisar LR4 can't link up on + ICOS and BCM mode. + ------------------------------------------------------------------------ + * Version: 1.0 + * Date : 2015/11/24 + * New Feature: + 1. Sysfs interface. + 2. Support platform type: Magnolia. + 3. Support transceiver type: SFP, SFP+, QSFP, QSFP+. + * Update: + 1. None + * Bug Fixed: + 1. None + ------------------------------------------------------------------------ + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/gpio-ich.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/gpio-ich.c new file mode 100644 index 00000000000..687834e3c56 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/gpio-ich.c @@ -0,0 +1,513 @@ +/* + * Intel ICH6-10, Series 5 and 6, Atom C2000 (Avoton/Rangeley) GPIO driver + * + * Copyright (C) 2010 Extreme Engineering Solutions. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "gpio_ich" + +/* + * GPIO register offsets in GPIO I/O space. + * Each chunk of 32 GPIOs is manipulated via its own USE_SELx, IO_SELx, and + * LVLx registers. Logic in the read/write functions takes a register and + * an absolute bit number and determines the proper register offset and bit + * number in that register. For example, to read the value of GPIO bit 50 + * the code would access offset ichx_regs[2(=GPIO_LVL)][1(=50/32)], + * bit 18 (50%32). + */ +enum GPIO_REG { + GPIO_USE_SEL = 0, + GPIO_IO_SEL, + GPIO_LVL, + GPO_BLINK +}; + +static const u8 ichx_regs[4][3] = { + {0x00, 0x30, 0x40}, /* USE_SEL[1-3] offsets */ + {0x04, 0x34, 0x44}, /* IO_SEL[1-3] offsets */ + {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */ + {0x18, 0x18, 0x18}, /* BLINK offset */ +}; + +static const u8 ichx_reglen[3] = { + 0x30, 0x10, 0x10, +}; + +static const u8 avoton_regs[4][3] = { + {0x00, 0x80, 0x00}, + {0x04, 0x84, 0x00}, + {0x08, 0x88, 0x00}, +}; + +static const u8 avoton_reglen[3] = { + 0x10, 0x10, 0x00, +}; + +#define ICHX_WRITE(val, reg, base_res) outl(val, (reg) + (base_res)->start) +#define ICHX_READ(reg, base_res) inl((reg) + (base_res)->start) + +struct ichx_desc { + /* Max GPIO pins the chipset can have */ + uint ngpio; + + /* chipset registers */ + const u8 (*regs)[3]; + const u8 *reglen; + + /* GPO_BLINK is available on this chipset */ + bool have_blink; + + /* Whether the chipset has GPIO in GPE0_STS in the PM IO region */ + bool uses_gpe0; + + /* USE_SEL is bogus on some chipsets, eg 3100 */ + u32 use_sel_ignore[3]; + + /* Some chipsets have quirks, let these use their own request/get */ + int (*request)(struct gpio_chip *chip, unsigned offset); + int (*get)(struct gpio_chip *chip, unsigned offset); + + /* + * Some chipsets don't let reading output values on GPIO_LVL register + * this option allows driver caching written output values + */ + bool use_outlvl_cache; +}; + +static struct { + spinlock_t lock; + struct platform_device *dev; + struct gpio_chip chip; + struct resource *gpio_base; /* GPIO IO base */ + struct resource *pm_base; /* Power Mangagment IO base */ + struct ichx_desc *desc; /* Pointer to chipset-specific description */ + u32 orig_gpio_ctrl; /* Orig CTRL value, used to restore on exit */ + u8 use_gpio; /* Which GPIO groups are usable */ + int outlvl_cache[3]; /* cached output values */ +} ichx_priv; + +static int modparam_gpiobase = 0; /* dynamic */ +module_param_named(gpiobase, modparam_gpiobase, int, 0444); +MODULE_PARM_DESC(gpiobase, "The GPIO number base. -1 means dynamic, " + "which is the default."); + +static int ichx_write_bit(int reg, unsigned nr, int val, int verify) +{ + unsigned long flags; + u32 data, tmp; + int reg_nr = nr / 32; + int bit = nr & 0x1f; + int ret = 0; + + spin_lock_irqsave(&ichx_priv.lock, flags); + + if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) + data = ichx_priv.outlvl_cache[reg_nr]; + else + data = ICHX_READ(ichx_priv.desc->regs[reg][reg_nr], + ichx_priv.gpio_base); + + if (val) + data |= 1 << bit; + else + data &= ~(1 << bit); + ICHX_WRITE(data, ichx_priv.desc->regs[reg][reg_nr], + ichx_priv.gpio_base); + if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) + ichx_priv.outlvl_cache[reg_nr] = data; + + tmp = ICHX_READ(ichx_priv.desc->regs[reg][reg_nr], + ichx_priv.gpio_base); + if (verify && data != tmp) + ret = -EPERM; + + spin_unlock_irqrestore(&ichx_priv.lock, flags); + + return ret; +} + +static int ichx_read_bit(int reg, unsigned nr) +{ + unsigned long flags; + u32 data; + int reg_nr = nr / 32; + int bit = nr & 0x1f; + + spin_lock_irqsave(&ichx_priv.lock, flags); + + data = ICHX_READ(ichx_priv.desc->regs[reg][reg_nr], + ichx_priv.gpio_base); + + if (reg == GPIO_LVL && ichx_priv.desc->use_outlvl_cache) + data = ichx_priv.outlvl_cache[reg_nr] | data; + + spin_unlock_irqrestore(&ichx_priv.lock, flags); + + return data & (1 << bit) ? 1 : 0; +} + +static bool ichx_gpio_check_available(struct gpio_chip *gpio, unsigned nr) +{ + return !!(ichx_priv.use_gpio & (1 << (nr / 32))); +} + +static int ichx_gpio_get_direction(struct gpio_chip *gpio, unsigned nr) +{ + return ichx_read_bit(GPIO_IO_SEL, nr) ? GPIOF_DIR_IN : GPIOF_DIR_OUT; +} + +static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) +{ + /* + * Try setting pin as an input and verify it worked since many pins + * are output-only. + */ + if (ichx_write_bit(GPIO_IO_SEL, nr, 1, 1)) + return -EINVAL; + + return 0; +} + +static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, + int val) +{ + /* Disable blink hardware which is available for GPIOs from 0 to 31. */ + if (nr < 32 && ichx_priv.desc->have_blink) + ichx_write_bit(GPO_BLINK, nr, 0, 0); + + /* Set GPIO output value. */ + ichx_write_bit(GPIO_LVL, nr, val, 0); + + /* + * Try setting pin as an output and verify it worked since many pins + * are input-only. + */ + if (ichx_write_bit(GPIO_IO_SEL, nr, 0, 1)) + return -EINVAL; + + return 0; +} + +static int ichx_gpio_get(struct gpio_chip *chip, unsigned nr) +{ + return ichx_read_bit(GPIO_LVL, nr); +} + +static int ich6_gpio_get(struct gpio_chip *chip, unsigned nr) +{ + unsigned long flags; + u32 data; + + /* + * GPI 0 - 15 need to be read from the power management registers on + * a ICH6/3100 bridge. + */ + if (nr < 16) { + if (!ichx_priv.pm_base) + return -ENXIO; + + spin_lock_irqsave(&ichx_priv.lock, flags); + + /* GPI 0 - 15 are latched, write 1 to clear*/ + ICHX_WRITE(1 << (16 + nr), 0, ichx_priv.pm_base); + data = ICHX_READ(0, ichx_priv.pm_base); + + spin_unlock_irqrestore(&ichx_priv.lock, flags); + + return (data >> 16) & (1 << nr) ? 1 : 0; + } else { + return ichx_gpio_get(chip, nr); + } +} + +static int ichx_gpio_request(struct gpio_chip *chip, unsigned nr) +{ + if (!ichx_gpio_check_available(chip, nr)) + return -ENXIO; + + /* + * Note we assume the BIOS properly set a bridge's USE value. Some + * chips (eg Intel 3100) have bogus USE values though, so first see if + * the chipset's USE value can be trusted for this specific bit. + * If it can't be trusted, assume that the pin can be used as a GPIO. + */ + if (ichx_priv.desc->use_sel_ignore[nr / 32] & (1 << (nr & 0x1f))) + return 0; + + return ichx_read_bit(GPIO_USE_SEL, nr) ? 0 : -ENODEV; +} + +static int ich6_gpio_request(struct gpio_chip *chip, unsigned nr) +{ + /* + * Fixups for bits 16 and 17 are necessary on the Intel ICH6/3100 + * bridge as they are controlled by USE register bits 0 and 1. See + * "Table 704 GPIO_USE_SEL1 register" in the i3100 datasheet for + * additional info. + */ + if (nr == 16 || nr == 17) + nr -= 16; + + return ichx_gpio_request(chip, nr); +} + +static void ichx_gpio_set(struct gpio_chip *chip, unsigned nr, int val) +{ + ichx_write_bit(GPIO_LVL, nr, val, 0); +} + +static void ichx_gpiolib_setup(struct gpio_chip *chip) +{ + chip->owner = THIS_MODULE; + chip->label = DRV_NAME; + chip->parent = &ichx_priv.dev->dev; + + /* Allow chip-specific overrides of request()/get() */ + chip->request = ichx_priv.desc->request ? + ichx_priv.desc->request : ichx_gpio_request; + chip->get = ichx_priv.desc->get ? + ichx_priv.desc->get : ichx_gpio_get; + + chip->set = ichx_gpio_set; + chip->get_direction = ichx_gpio_get_direction; + chip->direction_input = ichx_gpio_direction_input; + chip->direction_output = ichx_gpio_direction_output; + chip->base = modparam_gpiobase; + chip->ngpio = ichx_priv.desc->ngpio; + chip->can_sleep = false; + chip->dbg_show = NULL; +} + +/* ICH6-based, 631xesb-based */ +static struct ichx_desc ich6_desc = { + /* Bridges using the ICH6 controller need fixups for GPIO 0 - 17 */ + .request = ich6_gpio_request, + .get = ich6_gpio_get, + + /* GPIO 0-15 are read in the GPE0_STS PM register */ + .uses_gpe0 = true, + + .ngpio = 50, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* Intel 3100 */ +static struct ichx_desc i3100_desc = { + /* + * Bits 16,17, 20 of USE_SEL and bit 16 of USE_SEL2 always read 0 on + * the Intel 3100. See "Table 712. GPIO Summary Table" of 3100 + * Datasheet for more info. + */ + .use_sel_ignore = {0x00130000, 0x00010000, 0x0}, + + /* The 3100 needs fixups for GPIO 0 - 17 */ + .request = ich6_gpio_request, + .get = ich6_gpio_get, + + /* GPIO 0-15 are read in the GPE0_STS PM register */ + .uses_gpe0 = true, + + .ngpio = 50, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* ICH7 and ICH8-based */ +static struct ichx_desc ich7_desc = { + .ngpio = 50, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* ICH9-based */ +static struct ichx_desc ich9_desc = { + .ngpio = 61, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* ICH10-based - Consumer/corporate versions have different amount of GPIO */ +static struct ichx_desc ich10_cons_desc = { + .ngpio = 61, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; +static struct ichx_desc ich10_corp_desc = { + .ngpio = 72, + .have_blink = true, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* Intel 5 series, 6 series, 3400 series, and C200 series */ +static struct ichx_desc intel5_desc = { + .ngpio = 76, + .regs = ichx_regs, + .reglen = ichx_reglen, +}; + +/* Avoton */ +static struct ichx_desc avoton_desc = { + /* Avoton has only 59 GPIOs, but we assume the first set of register + * (Core) has 32 instead of 31 to keep gpio-ich compliance + */ + .ngpio = 60, + .regs = avoton_regs, + .reglen = avoton_reglen, + .use_outlvl_cache = true, +}; + +static int ichx_gpio_request_regions(struct device *dev, + struct resource *res_base, const char *name, u8 use_gpio) +{ + int i; + + if (!res_base || !res_base->start || !res_base->end) + return -ENODEV; + + for (i = 0; i < ARRAY_SIZE(ichx_priv.desc->regs[0]); i++) { + if (!(use_gpio & (1 << i))) + continue; + if (!devm_request_region(dev, + res_base->start + ichx_priv.desc->regs[0][i], + ichx_priv.desc->reglen[i], name)) + return -EBUSY; + } + return 0; +} + +static int ichx_gpio_probe(struct platform_device *pdev) +{ + struct resource *res_base, *res_pm; + int err; + struct lpc_ich_info *ich_info = dev_get_platdata(&pdev->dev); + + if (!ich_info) + return -ENODEV; + + ichx_priv.dev = pdev; + + switch (ich_info->gpio_version) { + case ICH_I3100_GPIO: + ichx_priv.desc = &i3100_desc; + break; + case ICH_V5_GPIO: + ichx_priv.desc = &intel5_desc; + break; + case ICH_V6_GPIO: + ichx_priv.desc = &ich6_desc; + break; + case ICH_V7_GPIO: + ichx_priv.desc = &ich7_desc; + break; + case ICH_V9_GPIO: + ichx_priv.desc = &ich9_desc; + break; + case ICH_V10CORP_GPIO: + ichx_priv.desc = &ich10_corp_desc; + break; + case ICH_V10CONS_GPIO: + ichx_priv.desc = &ich10_cons_desc; + break; + case AVOTON_GPIO: + ichx_priv.desc = &avoton_desc; + break; + default: + return -ENODEV; + } + + spin_lock_init(&ichx_priv.lock); + res_base = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPIO); + ichx_priv.use_gpio = ich_info->use_gpio; + err = ichx_gpio_request_regions(&pdev->dev, res_base, pdev->name, + ichx_priv.use_gpio); + if (err) + return err; + + ichx_priv.gpio_base = res_base; + + /* + * If necessary, determine the I/O address of ACPI/power management + * registers which are needed to read the the GPE0 register for GPI pins + * 0 - 15 on some chipsets. + */ + if (!ichx_priv.desc->uses_gpe0) + goto init; + + res_pm = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPE0); + if (!res_pm) { + pr_warn("ACPI BAR is unavailable, GPI 0 - 15 unavailable\n"); + goto init; + } + + if (!devm_request_region(&pdev->dev, res_pm->start, + resource_size(res_pm), pdev->name)) { + pr_warn("ACPI BAR is busy, GPI 0 - 15 unavailable\n"); + goto init; + } + + ichx_priv.pm_base = res_pm; + +init: + ichx_gpiolib_setup(&ichx_priv.chip); + err = gpiochip_add_data(&ichx_priv.chip, NULL); + if (err) { + pr_err("Failed to register GPIOs\n"); + return err; + } + + pr_info("GPIO from %d to %d on %s\n", ichx_priv.chip.base, + ichx_priv.chip.base + ichx_priv.chip.ngpio - 1, DRV_NAME); + + return 0; +} + +static int ichx_gpio_remove(struct platform_device *pdev) +{ + gpiochip_remove(&ichx_priv.chip); + + return 0; +} + +static struct platform_driver ichx_gpio_driver = { + .driver = { + .name = DRV_NAME, + }, + .probe = ichx_gpio_probe, + .remove = ichx_gpio_remove, +}; + +module_platform_driver(ichx_gpio_driver); + +MODULE_AUTHOR("Peter Tyser "); +MODULE_DESCRIPTION("GPIO interface for Intel ICH series"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:"DRV_NAME); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/i2c-mux-pca9541.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/i2c-mux-pca9541.c new file mode 100644 index 00000000000..68c44dbc533 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/i2c-mux-pca9541.c @@ -0,0 +1,573 @@ +/* + * I2C multiplexer driver for PCA9541 bus master selector + * + * Copyright (c) 2010 Ericsson AB. + * + * Author: Guenter Roeck + * + * Derived from: + * pca954x.c + * + * Copyright (c) 2008-2009 Rodolfo Giometti + * Copyright (c) 2008-2009 Eurotech S.p.A. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +/* + * The PCA9541 is a bus master selector. It supports two I2C masters connected + * to a single slave bus. + * + * Before each bus transaction, a master has to acquire bus ownership. After the + * transaction is complete, bus ownership has to be released. This fits well + * into the I2C multiplexer framework, which provides select and release + * functions for this purpose. For this reason, this driver is modeled as + * single-channel I2C bus multiplexer. + * + * This driver assumes that the two bus masters are controlled by two different + * hosts. If a single host controls both masters, platform code has to ensure + * that only one of the masters is instantiated at any given time. + */ + +#define PCA9541_CONTROL 0x01 +#define PCA9541_ISTAT 0x02 + +#define PCA9541_CTL_MYBUS (1 << 0) +#define PCA9541_CTL_NMYBUS (1 << 1) +#define PCA9541_CTL_BUSON (1 << 2) +#define PCA9541_CTL_NBUSON (1 << 3) +#define PCA9541_CTL_BUSINIT (1 << 4) +#define PCA9541_CTL_TESTON (1 << 6) +#define PCA9541_CTL_NTESTON (1 << 7) + +#define PCA9541_ISTAT_INTIN (1 << 0) +#define PCA9541_ISTAT_BUSINIT (1 << 1) +#define PCA9541_ISTAT_BUSOK (1 << 2) +#define PCA9541_ISTAT_BUSLOST (1 << 3) +#define PCA9541_ISTAT_MYTEST (1 << 6) +#define PCA9541_ISTAT_NMYTEST (1 << 7) + +#define PCA9641_ID 0x00 +#define PCA9641_ID_MAGIC 0x38 + +#define PCA9641_CONTROL 0x01 +#define PCA9641_STATUS 0x02 +#define PCA9641_TIME 0x03 + +#define PCA9641_CTL_LOCK_REQ BIT(0) +#define PCA9641_CTL_LOCK_GRANT BIT(1) +#define PCA9641_CTL_BUS_CONNECT BIT(2) +#define PCA9641_CTL_BUS_INIT BIT(3) +#define PCA9641_CTL_SMBUS_SWRST BIT(4) +#define PCA9641_CTL_IDLE_TIMER_DIS BIT(5) +#define PCA9641_CTL_SMBUS_DIS BIT(6) +#define PCA9641_CTL_PRIORITY BIT(7) + +#define PCA9641_STS_OTHER_LOCK BIT(0) +#define PCA9641_STS_BUS_INIT_FAIL BIT(1) +#define PCA9641_STS_BUS_HUNG BIT(2) +#define PCA9641_STS_MBOX_EMPTY BIT(3) +#define PCA9641_STS_MBOX_FULL BIT(4) +#define PCA9641_STS_TEST_INT BIT(5) +#define PCA9641_STS_SCL_IO BIT(6) +#define PCA9641_STS_SDA_IO BIT(7) + +#define PCA9641_RES_TIME 0x03 + + +#define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON) +#define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS) +#define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS) +#define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON) + +#define BUSOFF(x, y) (!((x) & PCA9641_CTL_LOCK_GRANT) && \ + !((y) & PCA9641_STS_OTHER_LOCK)) +#define other_lock(x) ((x) & PCA9641_STS_OTHER_LOCK) +#define lock_grant(x) ((x) & PCA9641_CTL_LOCK_GRANT) + +/* arbitration timeouts, in jiffies */ +#define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */ +#define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */ + +/* arbitration retry delays, in us */ +#define SELECT_DELAY_SHORT 50 +#define SELECT_DELAY_LONG 1000 + +struct pca9541 { + struct i2c_client *client; + unsigned long select_timeout; + unsigned long arb_timeout; +}; + +static const struct i2c_device_id pca9541_id[] = { + {"pca9541", 0}, + {"pca9641", 1}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, pca9541_id); + +#ifdef CONFIG_OF +static const struct of_device_id pca9541_of_match[] = { + { .compatible = "nxp,pca9541" }, + { .compatible = "nxp,pca9641" }, + {} +}; +#endif + +/* + * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer() + * as they will try to lock the adapter a second time. + */ +static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val) +{ + struct i2c_adapter *adap = client->adapter; + int ret; + + if (adap->algo->master_xfer) { + struct i2c_msg msg; + char buf[2]; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = 2; + buf[0] = command; + buf[1] = val; + msg.buf = buf; + ret = __i2c_transfer(adap, &msg, 1); + } else { + union i2c_smbus_data data; + + data.byte = val; + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_WRITE, + command, + I2C_SMBUS_BYTE_DATA, &data); + } + + return ret; +} + +/* + * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer() + * as they will try to lock adapter a second time. + */ +static int pca9541_reg_read(struct i2c_client *client, u8 command) +{ + struct i2c_adapter *adap = client->adapter; + int ret; + u8 val; + + if (adap->algo->master_xfer) { + struct i2c_msg msg[2] = { + { + .addr = client->addr, + .flags = 0, + .len = 1, + .buf = &command + }, + { + .addr = client->addr, + .flags = I2C_M_RD, + .len = 1, + .buf = &val + } + }; + ret = __i2c_transfer(adap, msg, 2); + if (ret == 2) + ret = val; + else if (ret >= 0) + ret = -EIO; + } else { + union i2c_smbus_data data; + + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_READ, + command, + I2C_SMBUS_BYTE_DATA, &data); + if (!ret) + ret = data.byte; + } + return ret; +} + +/* + * Arbitration management functions + */ + +/* Release bus. Also reset NTESTON and BUSINIT if it was set. */ +static void pca9541_release_bus(struct i2c_client *client) +{ + int reg; + + reg = pca9541_reg_read(client, PCA9541_CONTROL); + if (reg >= 0 && !busoff(reg) && mybus(reg)) + pca9541_reg_write(client, PCA9541_CONTROL, + (reg & PCA9541_CTL_NBUSON) >> 1); +} + +/* + * Arbitration is defined as a two-step process. A bus master can only activate + * the slave bus if it owns it; otherwise it has to request ownership first. + * This multi-step process ensures that access contention is resolved + * gracefully. + * + * Bus Ownership Other master Action + * state requested access + * ---------------------------------------------------- + * off - yes wait for arbitration timeout or + * for other master to drop request + * off no no take ownership + * off yes no turn on bus + * on yes - done + * on no - wait for arbitration timeout or + * for other master to release bus + * + * The main contention point occurs if the slave bus is off and both masters + * request ownership at the same time. In this case, one master will turn on + * the slave bus, believing that it owns it. The other master will request + * bus ownership. Result is that the bus is turned on, and master which did + * _not_ own the slave bus before ends up owning it. + */ + +/* Control commands per PCA9541 datasheet */ +static const u8 pca9541_control[16] = { + 4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1 +}; + +/* + * Channel arbitration + * + * Return values: + * <0: error + * 0 : bus not acquired + * 1 : bus acquired + */ +static int pca9541_arbitrate(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca9541 *data = i2c_mux_priv(muxc); + int reg; + + reg = pca9541_reg_read(client, PCA9541_CONTROL); + if (reg < 0) + return reg; + + if (busoff(reg)) { + int istat; + /* + * Bus is off. Request ownership or turn it on unless + * other master requested ownership. + */ + istat = pca9541_reg_read(client, PCA9541_ISTAT); + if (!(istat & PCA9541_ISTAT_NMYTEST) + || time_is_before_eq_jiffies(data->arb_timeout)) { + /* + * Other master did not request ownership, + * or arbitration timeout expired. Take the bus. + */ + pca9541_reg_write(client, + PCA9541_CONTROL, + pca9541_control[reg & 0x0f] + | PCA9541_CTL_NTESTON); + data->select_timeout = SELECT_DELAY_SHORT; + } else { + /* + * Other master requested ownership. + * Set extra long timeout to give it time to acquire it. + */ + data->select_timeout = SELECT_DELAY_LONG * 2; + } + } else if (mybus(reg)) { + /* + * Bus is on, and we own it. We are done with acquisition. + * Reset NTESTON and BUSINIT, then return success. + */ + if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT)) + pca9541_reg_write(client, + PCA9541_CONTROL, + reg & ~(PCA9541_CTL_NTESTON + | PCA9541_CTL_BUSINIT)); + return 1; + } else { + /* + * Other master owns the bus. + * If arbitration timeout has expired, force ownership. + * Otherwise request it. + */ + data->select_timeout = SELECT_DELAY_LONG; + if (time_is_before_eq_jiffies(data->arb_timeout)) { + /* Time is up, take the bus and reset it. */ + pca9541_reg_write(client, + PCA9541_CONTROL, + pca9541_control[reg & 0x0f] + | PCA9541_CTL_BUSINIT + | PCA9541_CTL_NTESTON); + } else { + /* Request bus ownership if needed */ + if (!(reg & PCA9541_CTL_NTESTON)) + pca9541_reg_write(client, + PCA9541_CONTROL, + reg | PCA9541_CTL_NTESTON); + } + } + return 0; +} + +static int pca9541_select_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca9541 *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + int ret; + unsigned long timeout = jiffies + ARB2_TIMEOUT; + /* give up after this time */ + + data->arb_timeout = jiffies + ARB_TIMEOUT; + /* force bus ownership after this time */ + + do { + ret = pca9541_arbitrate(client); + if (ret) + return ret < 0 ? ret : 0; + + if (data->select_timeout == SELECT_DELAY_SHORT) + udelay(data->select_timeout); + else + msleep(data->select_timeout / 1000); + } while (time_is_after_eq_jiffies(timeout)); + + return -ETIMEDOUT; +} + +static int pca9541_release_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca9541 *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + + pca9541_release_bus(client); + return 0; +} + +/* + * Arbitration management functions + */ +static void pca9641_release_bus(struct i2c_client *client) +{ + pca9541_reg_write(client, PCA9641_CONTROL, 0); +} + +/* + * Channel arbitration + * + * Return values: + * <0: error + * 0 : bus not acquired + * 1 : bus acquired + */ +static int pca9641_arbitrate(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca9541 *data = i2c_mux_priv(muxc); + int reg_ctl, reg_sts; + + reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL); + if (reg_ctl < 0) + return reg_ctl; + reg_sts = pca9541_reg_read(client, PCA9641_STATUS); + + if (BUSOFF(reg_ctl, reg_sts)) { + /* + * Bus is off. Request ownership or turn it on unless + * other master requested ownership. + */ + reg_ctl |= PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL); + + if (lock_grant(reg_ctl)) { + /* + * Other master did not request ownership, + * or arbitration timeout expired. Take the bus. + */ + reg_ctl |= PCA9641_CTL_BUS_CONNECT + | PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + data->select_timeout = SELECT_DELAY_SHORT; + + return 1; + } else { + /* + * Other master requested ownership. + * Set extra long timeout to give it time to acquire it. + */ + data->select_timeout = SELECT_DELAY_LONG * 2; + } + } else if (lock_grant(reg_ctl)) { + /* + * Bus is on, and we own it. We are done with acquisition. + */ + reg_ctl |= PCA9641_CTL_BUS_CONNECT | PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + + return 1; + } else if (other_lock(reg_sts)) { + /* + * Other master owns the bus. + * If arbitration timeout has expired, force ownership. + * Otherwise request it. + */ + data->select_timeout = SELECT_DELAY_LONG; + reg_ctl |= PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + } + return 0; +} + +static int pca9641_select_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca9541 *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + int ret; + unsigned long timeout = jiffies + ARB2_TIMEOUT; + /* give up after this time */ + + data->arb_timeout = jiffies + ARB_TIMEOUT; + /* force bus ownership after this time */ + + do { + ret = pca9641_arbitrate(client); + if (ret) + return ret < 0 ? ret : 0; + + if (data->select_timeout == SELECT_DELAY_SHORT) + udelay(data->select_timeout); + else + msleep(data->select_timeout / 1000); + } while (time_is_after_eq_jiffies(timeout)); + + return -ETIMEDOUT; +} + +static int pca9641_release_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca9541 *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + + pca9641_release_bus(client); + return 0; +} + +static int pca9641_detect_id(struct i2c_client *client) +{ + int reg; + + reg = pca9541_reg_read(client, PCA9641_ID); + if (reg == PCA9641_ID_MAGIC) + return 1; + else + return 0; +} + +/* + * I2C init/probing/exit functions + */ +static int pca9541_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = client->adapter; + struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev); + struct i2c_mux_core *muxc; + struct pca9541 *data; + int force; + int ret; + int detect_id; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA)) + return -ENODEV; + + detect_id = pca9641_detect_id(client); + /* + * I2C accesses are unprotected here. + * We have to lock the adapter before releasing the bus. + */ + if (detect_id == 0) { + i2c_lock_adapter(adap); + pca9541_release_bus(client); + i2c_unlock_adapter(adap); + } else { + i2c_lock_adapter(adap); + pca9641_release_bus(client); + i2c_unlock_adapter(adap); + } + + /* Create mux adapter */ + + force = 0; + if (pdata) + force = pdata->modes[0].adap_id; + if (detect_id == 0) { + muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data), + I2C_MUX_ARBITRATOR, + pca9541_select_chan, pca9541_release_chan); + } else { + muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data), + I2C_MUX_ARBITRATOR, + pca9641_select_chan, pca9641_release_chan); + } + if (!muxc) + return -ENOMEM; + + data = i2c_mux_priv(muxc); + data->client = client; + + i2c_set_clientdata(client, muxc); + + ret = i2c_mux_add_adapter(muxc, force, 0, 0); + if (ret) { + dev_err(&client->dev, "failed to register master selector\n"); + return ret; + } + + dev_info(&client->dev, "registered master selector for I2C %s\n", + client->name); + + return 0; +} + +static int pca9541_remove(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + + i2c_mux_del_adapters(muxc); + return 0; +} + +static struct i2c_driver pca9541_driver = { + .driver = { + .name = "pca9541", + .of_match_table = of_match_ptr(pca9541_of_match), + }, + .probe = pca9541_probe, + .remove = pca9541_remove, + .id_table = pca9541_id, +}; + +module_i2c_driver(pca9541_driver); + +MODULE_AUTHOR("Guenter Roeck "); +MODULE_DESCRIPTION("PCA9541 I2C master selector driver"); +MODULE_LICENSE("GPL v2"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_cpld.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_cpld.c new file mode 100644 index 00000000000..8e2693d2e25 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_cpld.c @@ -0,0 +1,1011 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* definition */ +#define CPLD_INFO_OFFSET 0x00 +#define CPLD_BIOSCS_OFFSET 0x04 +#define CPLD_CTL_OFFSET 0x0C +#define CPLD_SYSLED_OFFSET 0x0E +#define CPLD_LED_OFFSET 0x2E +#define CPLD_INT_OFFSET 0x30 +#define CPLD_INTMASK_OFFSET 0x31 +#define CPLD_INT2_OFFSET 0x32 +#define CPLD_INTMASK2_OFFSET 0x33 +#define CPLD_PSU_OFFSET 0x40 +#define CPLD_POWERSTATUS_OFFSET 0x41 +#define CPLD_PWM_OFFSET 0x50 +#define CPLD_RPM_OFFSET 0x55 +#define CPLD_FANSTATUS_OFFSET 0x69 +#define CPLD_FANLED_OFFSET 0x6B +#define CPLD_RESETBUTTONSTATUS_OFFSET 0x75 +#define CPLD_RSTCAUSE_OFFSET 0x76 +#define CPLD_WATCHDOGCOUNTER_OFFSET 0x77 +#define CPLD_WATCHDOGCONFIG_OFFSET 0x78 +#define CPLD_WATCHDOGENABLE_OFFSET 0x79 +#define CPLD_PANICCODE_OFFSET 0x7E +#define CPLD2_ADDRESS 0x33 + +#define FAN_NUM 4 +static u8 hasCPLD2 = 1; +static struct i2c_client *client2; + +/* Each client has this additional data */ +struct cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; + u8 diag; + struct task_struct *tsk; +}; + +/*-----------------------------------------------------------------------*/ +static ssize_t cpld_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) +{ + int i; + s32 temp = 0; + + for(i=0; iuser_msg_data; + + if(recv_msg->msg.data[0]==0 && recv_msg->msg.data_len>0) { + msg_result->result_length=recv_msg->msg.data_len-1; + memcpy(msg_result->result, &recv_msg->msg.data[1], recv_msg->msg.data_len-1); + } + ipmi_free_recv_msg(recv_msg); + mutex_unlock(&ipmi_mutex); + + return; +} + +int start_ipmi_command(char NetFn, char cmd,char *data,int data_length, char* result, int* result_length) +{ + int rv=0,i; + int timeout; + + //wait previous command finish at least 50msec + timeout=50; + while((mutex_is_locked(&ipmi_mutex) == 1 || (mutex_is_locked(&ipmi2_mutex) == 1)) && (--timeout)>0) { usleep_range(1000,1010); } + if(timeout==0) { return -1; } + mutex_lock(&ipmi_mutex); + mutex_lock(&ipmi2_mutex); + + if(ipmi_mh_user == NULL) { + for (i=0,rv=1; i0) { usleep_range(1000,1100);} + if(timeout==0) { + mutex_unlock(&ipmi2_mutex); + return -1; + } + else { + *result_length=ipmiresult.result_length; + memcpy(result,ipmiresult.result,*result_length); + mutex_unlock(&ipmi2_mutex); + return 0; + } + } + return 0; +} +EXPORT_SYMBOL(start_ipmi_command); + +static int cpld_thread(void *p) +{ +#ifndef XORP + struct i2c_client *client = p; + + u8 byte[9]; + uint8_t result[MAX_IPMI_RECV_LENGTH]; + int result_len=0; + + //Handle LED control by the driver + byte[0]=0x01; + cpld_i2c_write(client, byte, CPLD_CTL_OFFSET, 1); + + //Disable BMC Watchdog + byte[0]=0x04; + byte[1]=0x00; + byte[2]=0x00; + byte[3]=0x00; + byte[4]=0x2C; + byte[5]=0x01; + start_ipmi_command(0x06, 0x24, byte, 6, result, &result_len); +#endif + return 0; +} +/*-----------------------------------------------------------------------*/ +/* sysfs attributes for hwmon */ +static ssize_t show_info(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + + u8 byte[4] = {0,0,0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, byte, CPLD_INFO_OFFSET, 4); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + sprintf (buf, "The CPLD release date is %02d/%02d/%d.\n", + byte[2] & 0xf, (byte[3] & 0x1f), 2014+(byte[2] >> 4)); /* mm/dd/yyyy*/ + sprintf (buf, "%sThe PCB version is %X\n", buf, byte[0]&0xf); + sprintf (buf, "%sThe CPLD version is %d.%d\n", buf, byte[1]>>4, byte[1]&0xf); + + if(hasCPLD2) { + mutex_lock(&data->update_lock); + cpld_i2c_read(client2, byte, CPLD_INFO_OFFSET, 4); + mutex_unlock(&data->update_lock); + + sprintf (buf, "%s\nThe CPLD2 release date is %02d/%02d/%d.\n", buf, + byte[2] & 0xf, (byte[3] & 0x1f), 2014+(byte[2] >> 4)); /* mm/dd/yyyy*/ + sprintf (buf, "%sThe CPLD2 version is %d.%d\n", buf, byte[1]>>4, byte[1]&0xf); + } + + return strlen(buf); +} + +static char* powerstatus_str[] = { + "Failed", //0 + "Good", //1 +}; + +static ssize_t show_powerstatus(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte[2] = {0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, byte, CPLD_POWERSTATUS_OFFSET, 2); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + sprintf (buf, "PGD_P5V_STBY: %s\n", powerstatus_str[(byte[0]>>7) & 0x01]); + sprintf (buf, "%sPGD_P3V3_STBY: %s\n", buf, powerstatus_str[(byte[0]>>6) & 0x01]);; + sprintf (buf, "%sPGD_P1V8_A: %s\n", buf, powerstatus_str[(byte[0]>>4) & 0x01]); + sprintf (buf, "%sPGD_P3V3_SYS: %s\n", buf, powerstatus_str[(byte[0]>>3) & 0x01]); + sprintf (buf, "%sPGD_P3V3_A: %s\n", buf, powerstatus_str[(byte[0]>>2) & 0x01]); + sprintf (buf, "%sPGD_P3V3_B: %s\n", buf, powerstatus_str[(byte[0]>>1) & 0x01]); + sprintf (buf, "%sPGD_P1V2: %s\n", buf, powerstatus_str[(byte[0]>>0) & 0x01]); + sprintf (buf, "%sPGD_P0V8_A: %s\n", buf,powerstatus_str[(byte[1]>>7) & 0x01]); + sprintf (buf, "%sPGD_P0V89_ROV: %s\n", buf, powerstatus_str[(byte[1]>>6) & 0x01]); + sprintf (buf, "%sSW_PWR_READY: %s\n", buf, powerstatus_str[(byte[1]>>3) & 0x01]); + sprintf (buf, "%sCPU_STBY_PWROK: %s\n", buf, powerstatus_str[(byte[1]>>0) & 0x01]); + + return strlen(buf); +} + +static ssize_t show_diag(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + uint8_t ipmisend[]= { IPMI_DIAGFLAG_OFFSET, 1}; + uint8_t result[MAX_IPMI_RECV_LENGTH]; + int result_len=0; + start_ipmi_command(NETFN_OEM, CMD_GETDATA,ipmisend, 2, result, &result_len); + data->diag = (result[0] & 0x80) !=0; + return sprintf (buf, "%d\n", data->diag); +} + +static ssize_t set_diag(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + uint8_t ipmisend[]= { IPMI_DIAGFLAG_OFFSET, 0x80}; + uint8_t result[MAX_IPMI_RECV_LENGTH]; + int result_len=0; + u8 diag = simple_strtol(buf, NULL, 10); + data->diag = diag?1:0; + if (data->diag==0) ipmisend[1] = 0x00; + + start_ipmi_command(NETFN_OEM, CMD_SETDATA,ipmisend, 2, result, &result_len); + + return count; +} + +static ssize_t show_thermal(struct device *dev, struct device_attribute *da, + char *buf) +{ + uint8_t ipmisend[]= { IPMI_SWITCHTEMP_OFFSET, 1}; + uint8_t result[MAX_IPMI_RECV_LENGTH]; + int result_len=0; + start_ipmi_command(NETFN_OEM, CMD_GETDATA,ipmisend, 2, result, &result_len); + return sprintf(buf, "%d\n", result[0] * 1000 ); +} + +static char* interrupt_str[] = { + "CPU_SEN_ALERT_N", //0 + "EXT_USB_OC_N", //1 + "", //2 + "", //3 + "PLD_SEN5_ALERT_N", //4 + "PLD_SEN4_ALERT_N", //5 + "PLD_SEN3_ALERT_N", //6 + "UCD90160_TEMP_INT_N", //7 + "RSTBTN_INT_N", //8 + "WDT_IRQ_N", //9 +}; + +static ssize_t show_interrupt(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte[4] = {0,0,0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, byte, CPLD_INT_OFFSET, 4); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + sprintf (buf, "0x%02X 0x%02X:", byte[0],byte[2]); + if(byte[0]==0xff && byte[2]==0x07) sprintf (buf, "%sNone",buf); + if(!(byte[0]&0x01)) sprintf (buf, "%s%s ",buf,interrupt_str[0]); + if(!(byte[0]&0x02)) sprintf (buf, "%s%s ",buf,interrupt_str[1]); + if(!(byte[0]&0x10)) sprintf (buf, "%s%s ",buf,interrupt_str[4]); + if(!(byte[0]&0x20)) sprintf (buf, "%s%s ",buf,interrupt_str[5]); + if(!(byte[0]&0x40)) sprintf (buf, "%s%s ",buf,interrupt_str[6]); + if(!(byte[0]&0x80)) sprintf (buf, "%s%s ",buf,interrupt_str[7]); + if(!(byte[2]&0x01)) sprintf (buf, "%s%s%s ",buf,interrupt_str[8] ,(byte[3]&0x01)?"(Blocked)":""); + if(!(byte[2]&0x02)) sprintf (buf, "%s%s%s ",buf,interrupt_str[9] ,(byte[3]&0x02)?"(Blocked)":""); + + return sprintf (buf, "%s\n", buf); +} + +static char* bios_str[] = { + "BIOS1", //0 + "BIOS2", //1 +}; + +static ssize_t show_bios_cs(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte = 0; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_BIOSCS_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + byte &= 0x01; + + return sprintf (buf, "%d:%s\n", byte,bios_str[byte]); +} + +static ssize_t set_bios_cs(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte = 0; + u8 temp = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_BIOSCS_OFFSET, 1); + if(temp) byte |= 0x01; else byte &= ~(0x01); + cpld_i2c_write(client, &byte, CPLD_BIOSCS_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static char* led_str[] = { + "OFF", //00 + "Green/Blue", //01 + "Yellow/Orange", //10 + "Red", //11 +}; + +static ssize_t show_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte = 0; + int shift = attr->index; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + byte = (byte >> shift) & 0x3; + + return sprintf (buf, "%d:%s\n", byte, led_str[byte]); +} + +static ssize_t set_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + u8 temp = simple_strtol(buf, NULL, 16); + u8 byte = 0; + int shift = attr->index; + temp &= 0x3; + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + byte &= ~(0x3<update_lock); + + return count; +} + +static char* sysled_str[] = { + "OFF", //000 + "0.5 Hz", //001 + "1 Hz", //010 + "2 Hz", //011 + "4 Hz", //100 + "NA", //101 + "NA", //110 + "ON", //111 +}; + +static ssize_t show_sysled(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 0)?3:0; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_SYSLED_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte >> shift) & 0x7; + status = sprintf (buf, "%d:%s\n", byte, sysled_str[byte]); + + return strlen(buf); +} + +static ssize_t set_sysled(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + u8 temp = simple_strtol(buf, NULL, 16); + u8 byte; + int shift = (attr->index == 0)?3:0; + + temp &= 0x7; + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_SYSLED_OFFSET, 1); + byte &= ~(0x7<update_lock); + + return count; +} + +static char* psu_str[] = { + "unpowered", //00 + "normal", //01 + "not installed", //10 + "not installed", //11 +}; + +static ssize_t show_psu(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + int shift = (attr->index == 0)?0:4; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, &byte, CPLD_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + byte = (byte >> shift) & 0x3; + + return sprintf (buf, "%d:%s\n", byte, psu_str[byte]); +} + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + u8 offset = attr->index + CPLD_PWM_OFFSET; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, &byte, offset, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d\n", byte); +} + +static ssize_t set_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 offset = attr->index + CPLD_PWM_OFFSET; + u8 byte = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_write(client2, &byte, offset, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 offset = attr->index*2 + CPLD_RPM_OFFSET; + u8 byte[2] = {0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, byte, offset, 2); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d\n", (byte[0]<<8 | byte[1])); +} + +static char* fantype_str[] = { + "Normal Type", //00 + "REVERSAL Type", //01 + "UNPLUGGED", //10 + "UNPLUGGED", //11 +}; + +static ssize_t show_fantype(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 offset = CPLD_FANSTATUS_OFFSET; + u8 byte[2] = {0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, byte, offset, 2); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + status = (((byte[0] >> attr->index) & 0x01)) | (((byte[1] >> attr->index) & 0x01)<<1); + + return sprintf(buf, "%d:%s\n",status,fantype_str[status]); +} + +static char* fanled_str[] = { + "None", //00 + "Green", //01 + "Red", //10 + "Both", //11 +}; + +static ssize_t show_fanled(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte[2] = {0,0}; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client2, byte, CPLD_FANLED_OFFSET, 2); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + status = (((byte[0] >> attr->index) & 0x01)) | (((byte[1] >> attr->index) & 0x01)<<1); + + return sprintf(buf, "%d:%s\n",status,fanled_str[status]); +} + +static ssize_t set_fanled(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte[2] = {0,0}; + u8 temp = simple_strtol(buf, NULL, 16); + int shift = attr->index; + + temp &= 0x3; + mutex_lock(&data->update_lock); + cpld_i2c_read(client2, byte, CPLD_FANLED_OFFSET, 2); + byte[0] &= ~(1<> 1) & 0x01)<update_lock); + + return count; +} + +static ssize_t set_watchdog_feed(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte=0; + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_WATCHDOGENABLE_OFFSET, 1); + byte |= 0x02; + cpld_i2c_write(client, &byte, CPLD_WATCHDOGENABLE_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t set_watchdog_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte=0x03; + + mutex_lock(&data->update_lock); + cpld_i2c_write(client, &byte, CPLD_WATCHDOGENABLE_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_watchdog_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_WATCHDOGENABLE_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d\n",(byte&0x01)); +} + +static ssize_t set_watchdog_config(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte = simple_strtol(buf, NULL, 10); + + if (byte<6) byte=6; + mutex_lock(&data->update_lock); + cpld_i2c_write(client, &byte, CPLD_WATCHDOGCONFIG_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_watchdog_config(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_WATCHDOGCONFIG_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d seconds\n",byte); +} + +static ssize_t show_watchdog_counter(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + ssize_t len = 0; + u8 byte=0; + + mutex_lock(&data->update_lock); + len = cpld_i2c_read(client, &byte, CPLD_WATCHDOGCOUNTER_OFFSET, 1); + mutex_unlock(&data->update_lock); + if (len==0) return 0; + + return sprintf(buf, "%d seconds\n",byte); +} + +static SENSOR_DEVICE_ATTR(info, S_IRUGO, show_info, 0, 0); +static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_thermal, 0, 0); +static SENSOR_DEVICE_ATTR(interrupt, S_IRUGO, show_interrupt, 0, 0); + +static SENSOR_DEVICE_ATTR(fan_led, S_IWUSR|S_IRUGO, show_led, set_led, 2); +static SENSOR_DEVICE_ATTR(power_led, S_IWUSR|S_IRUGO, show_led, set_led, 4); +static SENSOR_DEVICE_ATTR(location_led, S_IWUSR|S_IRUGO, show_led, set_led, 6); + +static SENSOR_DEVICE_ATTR(grn_led, S_IWUSR|S_IRUGO, show_sysled, set_sysled, 0); +static SENSOR_DEVICE_ATTR(red_led, S_IWUSR|S_IRUGO, show_sysled, set_sysled, 1); + +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 0); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 1); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 2); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 3); +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 4); +#endif + +static SENSOR_DEVICE_ATTR(fanmodule1_type, S_IRUGO, show_fantype, 0, 0); +static SENSOR_DEVICE_ATTR(fanmodule2_type, S_IRUGO, show_fantype, 0, 1); +static SENSOR_DEVICE_ATTR(fanmodule3_type, S_IRUGO, show_fantype, 0, 2); +static SENSOR_DEVICE_ATTR(fanmodule4_type, S_IRUGO, show_fantype, 0, 3); +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(fanmodule5_type, S_IRUGO, show_fantype, 0, 4); +#endif + +static SENSOR_DEVICE_ATTR(fanmodule1_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 0); +static SENSOR_DEVICE_ATTR(fanmodule2_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 1); +static SENSOR_DEVICE_ATTR(fanmodule3_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 2); +static SENSOR_DEVICE_ATTR(fanmodule4_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 3); +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(fanmodule5_led, S_IWUSR|S_IRUGO, show_fanled, set_fanled, 4); +#endif + +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_rpm, 0, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_rpm, 0, 1); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_rpm, 0, 2); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_rpm, 0, 3); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_rpm, 0, 4); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_rpm, 0, 5); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_rpm, 0, 6); +static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_rpm, 0, 7); +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(fan9_input, S_IRUGO, show_rpm, 0, 8); +static SENSOR_DEVICE_ATTR(fan10_input,S_IRUGO, show_rpm, 0, 9); +#endif + +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu, 0, 0); +static SENSOR_DEVICE_ATTR(psu2, S_IRUGO, show_psu, 0, 1); +static SENSOR_DEVICE_ATTR(power_status, S_IRUGO, show_powerstatus, 0, 0); + +static SENSOR_DEVICE_ATTR(watchdog_feed, S_IWUSR, 0, set_watchdog_feed, 0); +static SENSOR_DEVICE_ATTR(watchdog_enable, S_IWUSR|S_IRUGO, show_watchdog_enable, set_watchdog_enable, 0); +static SENSOR_DEVICE_ATTR(watchdog_config, S_IWUSR|S_IRUGO, show_watchdog_config, set_watchdog_config, 0); +static SENSOR_DEVICE_ATTR(watchdog_counter, S_IRUGO, show_watchdog_counter, 0, 0); + +static SENSOR_DEVICE_ATTR(bios_cs, S_IWUSR|S_IRUGO, show_bios_cs, set_bios_cs, 0); + +static struct attribute *cpld_attributes[] = { + &sensor_dev_attr_info.dev_attr.attr, + &sensor_dev_attr_diag.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + + &sensor_dev_attr_fan_led.dev_attr.attr, + &sensor_dev_attr_power_led.dev_attr.attr, + &sensor_dev_attr_location_led.dev_attr.attr, + + &sensor_dev_attr_grn_led.dev_attr.attr, + &sensor_dev_attr_red_led.dev_attr.attr, + + &sensor_dev_attr_interrupt.dev_attr.attr, + + &sensor_dev_attr_psu1.dev_attr.attr, + &sensor_dev_attr_psu2.dev_attr.attr, + &sensor_dev_attr_power_status.dev_attr.attr, + + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, +#if FAN_NUM>4 + &sensor_dev_attr_pwm5.dev_attr.attr, +#endif + &sensor_dev_attr_fanmodule1_type.dev_attr.attr, + &sensor_dev_attr_fanmodule2_type.dev_attr.attr, + &sensor_dev_attr_fanmodule3_type.dev_attr.attr, + &sensor_dev_attr_fanmodule4_type.dev_attr.attr, +#if FAN_NUM>4 + &sensor_dev_attr_fanmodule5_type.dev_attr.attr, +#endif + &sensor_dev_attr_fanmodule1_led.dev_attr.attr, + &sensor_dev_attr_fanmodule2_led.dev_attr.attr, + &sensor_dev_attr_fanmodule3_led.dev_attr.attr, + &sensor_dev_attr_fanmodule4_led.dev_attr.attr, +#if FAN_NUM>4 + &sensor_dev_attr_fanmodule5_led.dev_attr.attr, +#endif + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_fan8_input.dev_attr.attr, +#if FAN_NUM>4 + &sensor_dev_attr_fan9_input.dev_attr.attr, + &sensor_dev_attr_fan10_input.dev_attr.attr, +#endif + &sensor_dev_attr_watchdog_feed.dev_attr.attr, + &sensor_dev_attr_watchdog_enable.dev_attr.attr, + &sensor_dev_attr_watchdog_config.dev_attr.attr, + &sensor_dev_attr_watchdog_counter.dev_attr.attr, + + &sensor_dev_attr_bios_cs.dev_attr.attr, + NULL +}; + +static const struct attribute_group cpld_group = { + .attrs = cpld_attributes, +}; + +/*-----------------------------------------------------------------------*/ +/* device probe and removal */ +static int +cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct cpld_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &cpld_group); + + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + //Check CPLD2 exist or not + client2 = i2c_new_dummy(client->adapter, CPLD2_ADDRESS); + if(!client2) { + hasCPLD2 = 0; + client2 = client; + } else { + status = i2c_smbus_read_byte_data(client2, CPLD_INFO_OFFSET); + if(status<0) { + i2c_unregister_device(client2); + i2c_set_clientdata(client2, NULL); + hasCPLD2 = 0; + client2 = client; + } + } + + data->tsk = kthread_run(cpld_thread,client,"%s",dev_name(data->hwmon_dev)); + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &cpld_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &cpld_group); + hwmon_device_unregister(data->hwmon_dev); + i2c_set_clientdata(client, NULL); + if(hasCPLD2) { + i2c_unregister_device(client2); + i2c_set_clientdata(client2, NULL); + } + + kfree(data); + return 0; +} + +static const struct i2c_device_id cpld_ids[] = { + { "inv_cpld" , 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, cpld_ids); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_cpld_init(void) +{ + return i2c_add_driver(&cpld_driver); +} + +static void __exit inv_cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("jack.ting "); +MODULE_DESCRIPTION("cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_cpld_init); +module_exit(inv_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_eeprom.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_eeprom.c new file mode 100644 index 00000000000..7bb167d2e74 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_eeprom.c @@ -0,0 +1,181 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void inv_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } + +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t inv_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + inv_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute inv_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = inv_eeprom_read, +}; + +static int inv_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &inv_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int inv_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &inv_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id inv_eeprom_id[] = { + { "inv_eeprom", 0 }, + { } +}; + +static struct i2c_driver inv_eeprom_driver = { + .driver = { + .name = "inv_eeprom", + }, + .probe = inv_eeprom_probe, + .remove = inv_eeprom_remove, + .id_table = inv_eeprom_id, +}; + +module_i2c_driver(inv_eeprom_driver); + +MODULE_AUTHOR("Inventec"); +MODULE_DESCRIPTION("Inventec D6556 Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_monitor.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_monitor.c new file mode 100644 index 00000000000..473fd83e8ea --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_monitor.c @@ -0,0 +1,730 @@ +#include "inv_monitor.h" +#include "inv_proxy.h" + +static struct class *core_class_p = NULL; +static struct class *psu_class_p = NULL; +static struct class *fan_class_p = NULL; + +static int psu_major; + +#define NUM_PSU (2) +#define NUM_PSU_TEMP (3) +#define NUM_FAN (4) + +/* CORE */ +#define HWMON_DEV_PATH_CORE0_TEMP "/sys/class/hwmon/hwmon1/temp2_input" +#define HWMON_DEV_PATH_CORE1_TEMP "/sys/class/hwmon/hwmon1/temp3_input" +#define HWMON_DEV_PATH_CORE2_TEMP "/sys/class/hwmon/hwmon1/temp4_input" +#define HWMON_DEV_PATH_CORE3_TEMP "/sys/class/hwmon/hwmon1/temp5_input" + +/* PSU */ +#define HWMON_DEV_PATH_PSU0_PRESENT "/sys/class/hwmon/hwmon2/device/psu1" +#define HWMON_DEV_PATH_PSU1_PRESENT "/sys/class/hwmon/hwmon2/device/psu2" +#define HWMON_DEV_PATH_PSU0_VOLTAGE_IN "/sys/class/hwmon/hwmon7/device/in1_input" +#define HWMON_DEV_PATH_PSU1_VOLTAGE_IN "/sys/class/hwmon/hwmon8/device/in1_input" +#define HWMON_DEV_PATH_PSU0_VOLTAGE_OUT "/sys/class/hwmon/hwmon7/device/in2_input" +#define HWMON_DEV_PATH_PSU1_VOLTAGE_OUT "/sys/class/hwmon/hwmon8/device/in2_input" +#define HWMON_DEV_PATH_PSU0_POWER_IN "/sys/class/hwmon/hwmon7/device/power1_input" +#define HWMON_DEV_PATH_PSU1_POWER_IN "/sys/class/hwmon/hwmon8/device/power1_input" +#define HWMON_DEV_PATH_PSU0_POWER_OUT "/sys/class/hwmon/hwmon7/device/power2_input" +#define HWMON_DEV_PATH_PSU1_POWER_OUT "/sys/class/hwmon/hwmon8/device/power2_input" +#define HWMON_DEV_PATH_PSU0_TEMP1 "/sys/class/hwmon/hwmon7/device/temp1_input" +#define HWMON_DEV_PATH_PSU0_TEMP2 "/sys/class/hwmon/hwmon7/device/temp2_input" +#define HWMON_DEV_PATH_PSU0_TEMP3 "/sys/class/hwmon/hwmon7/device/temp3_input" +#define HWMON_DEV_PATH_PSU1_TEMP1 "/sys/class/hwmon/hwmon8/device/temp1_input" +#define HWMON_DEV_PATH_PSU1_TEMP2 "/sys/class/hwmon/hwmon8/device/temp2_input" +#define HWMON_DEV_PATH_PSU1_TEMP3 "/sys/class/hwmon/hwmon8/device/temp3_input" + +/* FAN */ +#define HWMON_DEV_PATH_FAN1_FRONT_RPM "/sys/class/hwmon/hwmon2/device/fan1_input" +#define HWMON_DEV_PATH_FAN1_REAR_RPM "/sys/class/hwmon/hwmon2/device/fan2_input" +#define HWMON_DEV_PATH_FAN2_FRONT_RPM "/sys/class/hwmon/hwmon2/device/fan3_input" +#define HWMON_DEV_PATH_FAN2_REAR_RPM "/sys/class/hwmon/hwmon2/device/fan4_input" +#define HWMON_DEV_PATH_FAN3_FRONT_RPM "/sys/class/hwmon/hwmon2/device/fan5_input" +#define HWMON_DEV_PATH_FAN3_REAR_RPM "/sys/class/hwmon/hwmon2/device/fan6_input" +#define HWMON_DEV_PATH_FAN4_FRONT_RPM "/sys/class/hwmon/hwmon2/device/fan7_input" +#define HWMON_DEV_PATH_FAN4_REAR_RPM "/sys/class/hwmon/hwmon2/device/fan8_input" +#define HWMON_DEV_PATH_FAN1_PRESENT "/sys/class/hwmon/hwmon2/device/fanmodule1_type" +#define HWMON_DEV_PATH_FAN2_PRESENT "/sys/class/hwmon/hwmon2/device/fanmodule2_type" +#define HWMON_DEV_PATH_FAN3_PRESENT "/sys/class/hwmon/hwmon2/device/fanmodule3_type" +#define HWMON_DEV_PATH_FAN4_PRESENT "/sys/class/hwmon/hwmon2/device/fanmodule4_type" + +struct note +{ + int index; + char *name; + struct device *dev; + char *present; + char *in_voltage; + char *out_voltage; + char *in_power; + char *out_power; + char *temp1; + char *temp2; + char *temp3; +}; + +struct note psu_note[] = { + { 0, "psu1", NULL, HWMON_DEV_PATH_PSU0_PRESENT, \ + HWMON_DEV_PATH_PSU0_VOLTAGE_IN, \ + HWMON_DEV_PATH_PSU0_VOLTAGE_OUT, \ + HWMON_DEV_PATH_PSU0_POWER_IN, \ + HWMON_DEV_PATH_PSU0_POWER_OUT, \ + HWMON_DEV_PATH_PSU0_TEMP1, \ + HWMON_DEV_PATH_PSU0_TEMP2, \ + HWMON_DEV_PATH_PSU0_TEMP3 }, + { 1, "psu2", NULL, HWMON_DEV_PATH_PSU1_PRESENT, \ + HWMON_DEV_PATH_PSU1_VOLTAGE_IN, \ + HWMON_DEV_PATH_PSU1_VOLTAGE_OUT, \ + HWMON_DEV_PATH_PSU1_POWER_IN, \ + HWMON_DEV_PATH_PSU1_POWER_OUT, \ + HWMON_DEV_PATH_PSU1_TEMP1, \ + HWMON_DEV_PATH_PSU1_TEMP2, \ + HWMON_DEV_PATH_PSU1_TEMP3 }, +}; + + +static ssize_t show_attr_psu_temperature(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int integer = 0; + int floater = 0; + int modulus = 0; + int present = DEBUG_INV_INT; + int result = DEBUG_INV_INT; + char name[MAX_PATH_SIZE]; + + memset(name, 0, MAX_PATH_SIZE); + snprintf(name, MAX_PATH_SIZE, "%s", attr->attr.name); + + struct note *notep = NULL ; + notep = dev_get_drvdata(dev); + + if (!notep) + goto err_get_psu_module_temperature; + + present = read_psu_present(notep->present) ; + if ( present == 0 ) + goto err_get_psu_module_temperature; + + if ( strncmp(name, "temp1", strlen(name)) == 0 ) + result = read_psu_temperature(notep->temp1) ; + else if ( strncmp(name, "temp2", strlen(name)) == 0 ) + result = read_psu_temperature(notep->temp2) ; + else if ( strncmp(name, "temp3", strlen(name)) == 0 ) + result = read_psu_temperature(notep->temp3) ; + else + goto err_get_psu_module_temperature; + + if ( result == -1 ) + goto err_get_psu_module_temperature; + + integer = result / 1000 ; + if ( result > 0 ) + { + modulus = result % 1000 ; + floater = modulus / 100 ; + return snprintf(buf, MAX_PATH_SIZE, "+%d.%d C", integer, floater ); + } + else + { + modulus = -result % 1000 ; + floater = modulus / 100 ; + return snprintf(buf, MAX_PATH_SIZE, "%d.0 C", integer, floater ); + } + +err_get_psu_module_temperature : + return sprintf(buf, "N/A"); +} + +static ssize_t show_attr_psu_voltage(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int integer = 0; + int floater = 0; + int modulus = 0; + int present = DEBUG_INV_INT; + int result = DEBUG_INV_INT; + char name[MAX_PATH_SIZE]; + + memset(name, 0, MAX_PATH_SIZE); + snprintf(name, MAX_PATH_SIZE, "%s", attr->attr.name); + + struct note *notep = NULL ; + notep = dev_get_drvdata(dev); + + if (!notep) + goto err_get_psu_module_voltage; + + present = read_psu_present(notep->present) ; + if ( present == 0 ) + goto err_get_psu_module_voltage; + + if ( strncmp(name, "in_voltage", strlen(name)) == 0 ) + result = read_psu_voltage(notep->in_voltage) ; + else if ( strncmp(name, "out_voltage", strlen(name)) == 0 ) + result = read_psu_voltage(notep->out_voltage) ; + else + goto err_get_psu_module_voltage; + + if ( result == -1 ) + goto err_get_psu_module_voltage; + + integer = result / 1000 ; + if ( result > 0 ) + { + modulus = result % 1000 ; + floater = modulus / 10 ; + return snprintf(buf, MAX_PATH_SIZE, "+%d.%02d V", integer, floater); + } + else + { + modulus = -result % 1000 ; + floater = modulus / 10 ; + return snprintf(buf, MAX_PATH_SIZE, "%d.%02d V", integer, floater); + } + +err_get_psu_module_voltage : + return sprintf(buf, "N/A"); +} + +static ssize_t show_attr_psu_power(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int integer = 0; + int floater = 0; + int modulus = 0; + int present = DEBUG_INV_INT; + int result = DEBUG_INV_INT; + char name[MAX_PATH_SIZE]; + + memset(name, 0, MAX_PATH_SIZE); + snprintf(name, MAX_PATH_SIZE, "%s", attr->attr.name); + + struct note *notep = NULL ; + notep = dev_get_drvdata(dev); + + if (!notep) + goto err_get_psu_module_power; + + present = read_psu_present(notep->present) ; + if ( present == 0 ) + goto err_get_psu_module_power; + + if ( strncmp(name, "in_power", strlen(name)) == 0 ) + result = read_psu_power(notep->in_power) ; + else if ( strncmp(name, "out_power", strlen(name)) == 0 ) + result = read_psu_power(notep->out_power) ; + else + goto err_get_psu_module_power; + + if ( result == -1 ) + goto err_get_psu_module_power; + + integer = result / 1000000 ; + if ( result > 0 ) + { + modulus = result % 1000000 ; + floater = modulus / 10000 ; + return snprintf(buf, MAX_PATH_SIZE, "+%d.%02d W", integer, floater); + } + else + { + modulus = -result % 1000000 ; + floater = modulus / 10000 ; + return snprintf(buf, MAX_PATH_SIZE, "%d.%02d W", integer, floater); + } + goto err_get_psu_module_power; + +err_get_psu_module_power : + return sprintf(buf, "N/A"); +} + +static ssize_t show_attr_psu_present(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int result = DEBUG_INV_INT; + + struct note *notep = NULL ; + notep = dev_get_drvdata(dev); + + if (!notep) + goto err_get_psu_module_present; + + result = read_psu_present(notep->present) ; + if ( result > -1 ) + return snprintf(buf, MAX_PATH_SIZE, "%d", result); + else + goto err_get_psu_module_present; + + goto err_get_psu_module_present; + +err_get_psu_module_present : + return sprintf(buf, "N/A"); +} + +static ssize_t show_attr_psu_temperature_number(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + return sprintf(buf, "%d", NUM_PSU_TEMP); +} + +static ssize_t show_attr_psu_number(struct class *class, + struct class_attribute *attr, + char *buf) +{ + return sprintf(buf, "%d", NUM_PSU); +} + +static DEVICE_ATTR(present, S_IRUGO, show_attr_psu_present, NULL); +static DEVICE_ATTR(temp_nm, S_IRUGO, show_attr_psu_temperature_number, NULL); +static DEVICE_ATTR(in_voltage, S_IRUGO, show_attr_psu_voltage, NULL); +static DEVICE_ATTR(out_voltage, S_IRUGO, show_attr_psu_voltage, NULL); +static DEVICE_ATTR(in_power, S_IRUGO, show_attr_psu_power, NULL); +static DEVICE_ATTR(out_power, S_IRUGO, show_attr_psu_power, NULL); +static DEVICE_ATTR(temp1, S_IRUGO, show_attr_psu_temperature, NULL); +static DEVICE_ATTR(temp2, S_IRUGO, show_attr_psu_temperature, NULL); +static DEVICE_ATTR(temp3, S_IRUGO, show_attr_psu_temperature, NULL); + +static int psu_device_match(struct device *dev, const void *data) +{ + return !strcmp(dev_name(dev), (const char *)data); +} + +static int register_psu_device(void) +{ + dev_t psu_devt = 0; + int index = 0 ; + struct device *global_device_p = NULL; + dev_t global_dev_num = 0 ; + + /* Register device number */ + if (alloc_chrdev_region(&psu_devt, 0, NUM_PSU, "psus") < 0){ + MONITOR_ERR("Allocate PSU MAJOR failure! \n"); + goto err_register_psu_module_1; + } + psu_major = MAJOR(psu_devt); + + for ( index ; index < NUM_PSU ; index++ ) + { + // struct note *note=NULL; + struct device *device_p = NULL; + + dev_t dev_num = MKDEV(psu_major, 0); + + dev_num = MKDEV(psu_major, index) ; + + device_p = device_create(psu_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + NULL, /* void *private_data */ + psu_note[index].name); /* const char *fmt */ + + psu_note[index].dev = device_p; + + dev_set_drvdata(device_p, &psu_note[index]); + + MONITOR_INFO("device_create named '%s' \n", psu_note[index].name); + + if (IS_ERR(device_p)){ + MONITOR_ERR("Allocate PSU device_create failure! \n"); + goto err_register_psu_module_2; + } + if (device_create_file(device_p, &dev_attr_present) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'temp3' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_temp_nm) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'temp_nm' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_in_voltage) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'in_voltage' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_out_voltage) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'out_voltage' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_in_power) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'in_power' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_out_power) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'out_power' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_temp1) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'temp1' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_temp2) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'temp2' failed \n"); + goto err_register_psu_module_3; + } + if (device_create_file(device_p, &dev_attr_temp3) < 0 ){ + MONITOR_ERR("Allocate PSU device attribute named 'temp3' failed \n"); + goto err_register_psu_module_3; + } + } + return 0; +err_register_psu_module_1: + unregister_chrdev_region(MKDEV(psu_major, 0), NUM_PSU); +err_register_psu_module_2: + return -1; +err_register_psu_module_3: + device_unregister(global_device_p); + device_destroy(psu_class_p, global_dev_num); +} + +int +remove_psu_device(void) +{ + dev_t dev_num; + char dev_name[MAX_PATH_SIZE]; + struct device *device_p; + int minor_curr; + + for ( minor_curr = 0 ; minor_curr < NUM_PSU; minor_curr++ ) + { + memset(dev_name, 0, sizeof(dev_name)); + snprintf(dev_name, sizeof(dev_name), "%s%d", "psu", minor_curr+1); + device_p = class_find_device(psu_class_p, NULL, dev_name, psu_device_match); + if (!device_p){ + continue; + } + dev_num = MKDEV(psu_major, minor_curr); + MONITOR_INFO("Found dev Num is %d \n", dev_num); + // device_unregister(device_p); + device_destroy(psu_class_p, dev_num); + } + MONITOR_INFO("Inventec monitor remove_psu_device success.\n", MONITOR_VERSION); +} + + +static struct class_attribute psu_class_attrs[] = { + __ATTR(psu_nm, S_IRUGO, show_attr_psu_number, NULL), + __ATTR_NULL, +}; + +static ssize_t show_attr_fan_present(struct class *class, + struct class_attribute *attr, + char *buf) +{ + char name[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + + memset(name, 0, MAX_PATH_SIZE); + + snprintf(name, MAX_PATH_SIZE, "%s", attr->attr.name); + + if ( strncmp(name, "fan1_present", strlen(name)) == 0 ) + result = read_fan_present(HWMON_DEV_PATH_FAN1_PRESENT) ; + else if ( strncmp(name, "fan2_present", strlen(name)) == 0 ) + result = read_fan_present(HWMON_DEV_PATH_FAN2_PRESENT) ; + else if ( strncmp(name, "fan3_present", strlen(name)) == 0 ) + result = read_fan_present(HWMON_DEV_PATH_FAN3_PRESENT) ; + else if ( strncmp(name, "fan4_present", strlen(name)) == 0 ) + result = read_fan_present(HWMON_DEV_PATH_FAN4_PRESENT) ; + else + goto err_get_fan_module_present ; + + if ( result > -1 ) + return snprintf(buf, MAX_PATH_SIZE, "%d", result); + else + goto err_get_fan_module_present; + +err_get_fan_module_present : + return sprintf(buf, "N/A"); +} + +static ssize_t show_attr_fan_number(struct class *class, + struct class_attribute *attr, + char *buf) +{ + return sprintf(buf, "%d", NUM_FAN); +} + +static ssize_t show_attr_fan_rpm(struct class *class, + struct class_attribute *attr, + char *buf) +{ + char name[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + int present = DEBUG_INV_INT; + + memset(name, 0, MAX_PATH_SIZE); + + snprintf(name, MAX_PATH_SIZE, "%s", attr->attr.name); + + if ( strncmp(name, "fan1_front", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN1_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN1_FRONT_RPM) ; + } + else if ( strncmp(name, "fan1_rear", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN1_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN1_REAR_RPM) ; + } + else if ( strncmp(name, "fan2_front", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN2_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN2_FRONT_RPM) ; + } + else if ( strncmp(name, "fan2_rear", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN2_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN2_REAR_RPM) ; + } + else if ( strncmp(name, "fan3_front", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN3_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN3_FRONT_RPM) ; + } + else if ( strncmp(name, "fan3_rear", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN3_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN3_REAR_RPM) ; + } + else if ( strncmp(name, "fan4_front", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN4_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN4_FRONT_RPM) ; + } + else if ( strncmp(name, "fan4_rear", strlen(name)) == 0 ) + { + present = read_fan_present(HWMON_DEV_PATH_FAN4_PRESENT); + if ( present <= 0 ) + goto err_get_fan_module_rpm ; + else + result = read_fan_rpm(HWMON_DEV_PATH_FAN4_REAR_RPM) ; + } + else + { + goto err_get_fan_module_rpm ; + } + + if ( result >= 0 ) + return snprintf(buf, MAX_PATH_SIZE, "%d RPM", result); + else + goto err_get_fan_module_rpm; + +err_get_fan_module_rpm : + return sprintf(buf, "N/A"); +} + +static struct class_attribute fan_class_attrs[] = { + __ATTR(fan_nm, S_IRUGO, show_attr_fan_number, NULL), + __ATTR(fan1_front, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan1_rear, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan2_front, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan2_rear, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan3_front, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan3_rear, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan4_front, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan4_rear, S_IRUGO, show_attr_fan_rpm, NULL), + __ATTR(fan1_present, S_IRUGO, show_attr_fan_present, NULL), + __ATTR(fan2_present, S_IRUGO, show_attr_fan_present, NULL), + __ATTR(fan3_present, S_IRUGO, show_attr_fan_present, NULL), + __ATTR(fan4_present, S_IRUGO, show_attr_fan_present, NULL), + __ATTR_NULL, +}; + + +static ssize_t show_attr_core_temperature(struct class *class, + struct class_attribute *attr, + char *buf) +{ + char name[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + + memset(name, 0, MAX_PATH_SIZE); + + snprintf(name, MAX_PATH_SIZE, "%s", attr->attr.name); + + if ( strncmp(name, "core0", strlen(name)) == 0 ) + result = read_core_temperature(HWMON_DEV_PATH_CORE0_TEMP) ; + else if ( strncmp(name, "core1", strlen(name)) == 0 ) + result = read_core_temperature(HWMON_DEV_PATH_CORE1_TEMP) ; + else if ( strncmp(name, "core2", strlen(name)) == 0 ) + result = read_core_temperature(HWMON_DEV_PATH_CORE2_TEMP) ; + else if ( strncmp(name, "core3", strlen(name)) == 0 ) + result = read_core_temperature(HWMON_DEV_PATH_CORE3_TEMP) ; + else + goto err_get_core_module_temperature ; + + if ( result == -1 ) + goto err_get_core_module_temperature; + + if ( result > 0 ) + return snprintf(buf, MAX_PATH_SIZE, "+%d.0 C", (result/1000)); + else + return snprintf(buf, MAX_PATH_SIZE, "%d.0 C", (result/1000)); + + goto err_get_core_module_temperature ; + +err_get_core_module_temperature : + return sprintf(buf, "N/A"); +} + +static struct class_attribute core_class_attrs[] = { + __ATTR(core0, S_IRUGO, show_attr_core_temperature, NULL), + __ATTR(core1, S_IRUGO, show_attr_core_temperature, NULL), + __ATTR(core2, S_IRUGO, show_attr_core_temperature, NULL), + __ATTR(core3, S_IRUGO, show_attr_core_temperature, NULL), + __ATTR_NULL, +}; + +struct class core_class = { + .name = CORE_CLS_NAME, + .owner = THIS_MODULE, + .class_attrs = core_class_attrs, +}; + +struct class psu_class = { + .name = PSU_CLS_NAME, + .owner = THIS_MODULE, + .class_attrs = psu_class_attrs, +}; + +struct class fan_class = { + .name = FAN_CLS_NAME, + .owner = THIS_MODULE, + .class_attrs = fan_class_attrs, +}; + +int +core_init(void) { + + int status; + + /* Create core class object and class attribute */ + status = class_register(&core_class); + core_class_p = &core_class; + MONITOR_INFO("core_init result: %d\n", status); + + if (status < 0) + { + MONITOR_ERR("Inventec monitor core class creating failed.\n"); + return status; + } + + return 0 ; +} + +int +psu_init(void) { + + int status; + + /* Create psu class object and class attribute */ + status = class_register(&psu_class); + psu_class_p = &psu_class; + MONITOR_INFO("psu_init result: %d\n", status); + + if (status < 0) + { + MONITOR_ERR("Inventec monitor psu class creating failed.\n"); + return status; + } + + /* Create psu device attribute */ + if ( register_psu_device() < 0 ) + { + MONITOR_ERR("Inventec monitor psu device attribute creating failed.\n"); + return -1; + } + return 0 ; +} + +int +fan_init(void) { + + int status; + int index = 0 ; + + /* Create fan class object and class attribute */ + status = class_register(&fan_class); + fan_class_p = &fan_class; + MONITOR_INFO("fan_init result: %d\n", status); + + if (status < 0) + { + MONITOR_ERR("Inventec monitor fan class creating failed.\n"); + return status; + } + + return 0 ; +} + +static int __init monitor_sysfs_init(void) +{ + int status; + + if (inv_proxy_init() < 0) { + MONITOR_ERR("Inventec monitor inv_proxy_init module initial failed.\n", MONITOR_VERSION); + } + + if (core_init() < 0) { + MONITOR_ERR("Inventec monitor core_init module initial failed.\n", MONITOR_VERSION); + } + + if (psu_init() < 0) { + MONITOR_ERR("Inventec monitor psu_init module initial failed.\n", MONITOR_VERSION); + } + + if (fan_init() < 0) { + MONITOR_ERR("Inventec monitor fan_init module initial failed.\n", MONITOR_VERSION); + } + + MONITOR_INFO("Inventec monitor module V.%s initial success.\n", MONITOR_VERSION); + return 0; +} + +static void __exit monitor_sysfs_exit(void) +{ + class_unregister(core_class_p); + class_unregister(fan_class_p); + remove_psu_device(); + class_unregister(psu_class_p); + unregister_chrdev_region(MKDEV(psu_major, 0), NUM_PSU); + inv_proxy_exit(); + MONITOR_INFO("Inventec monitor module V.%s remove success.\n", MONITOR_VERSION); + return 0; +} + +module_init(monitor_sysfs_init); +module_exit(monitor_sysfs_exit); + +/* Module information */ +MODULE_AUTHOR(MONITOR_AUTHOR); +MODULE_DESCRIPTION(MONITOR_DESC); +MODULE_VERSION(MONITOR_VERSION); +MODULE_LICENSE(MONITOR_LICENSE); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_monitor.h b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_monitor.h new file mode 100644 index 00000000000..473c482519f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_monitor.h @@ -0,0 +1,33 @@ +#ifndef _INV_MONITOR_H_ +#define _INV_MONITOR_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Module information */ +#define MONITOR_AUTHOR "James , Neil " +#define MONITOR_DESC "Inventec HW monitoring SYSFS for JD" +#define MONITOR_VERSION "1.0" +#define MONITOR_LICENSE "GPL" + + +#define CORE_CLS_NAME "core" +#define FAN_CLS_NAME "fan" +#define PSU_CLS_NAME "psus" + + +#define MONITOR_INFO(fmt, args...) printk( KERN_INFO "[MONITOR] " fmt, ##args) +#define MONITOR_WARN(fmt, args...) printk( KERN_WARNING "[MONITOR] " fmt, ##args) +#define MONITOR_ERR(fmt, args...) printk( KERN_ERR "[MONITOR] " fmt, ##args) + +#endif /* _INV_MONITOR_H_ */ + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_mux.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_mux.c new file mode 100644 index 00000000000..143aee309db --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_mux.c @@ -0,0 +1,547 @@ +#include +#include +#include +#include +#include +#include +#include "io_expander.h" +#include "inv_mux.h" + +/* For build single module using (Ex: ONL platform) */ +#include +//#include +//#include + + +static struct mux_obj_s *mux_head_p = NULL; + +/* ========== MUX object functions ========== + */ +static int +_setup_i2c_value(struct mux_obj_s *self, int offset, int value){ + + return i2c_smbus_write_byte_data(self->i2c_client_p, offset, value); +} + + +static int +_setup_i2c_client(struct mux_obj_s *self, int chan_id, int addr){ + + struct i2c_adapter *adap = NULL; + char *emsg = "ERR"; + + adap = i2c_get_adapter(chan_id); + if (!adap){ + emsg = "can't get adapter"; + goto err_setup_i2c_client; + } + self->i2c_client_p = kzalloc(sizeof(*self->i2c_client_p), GFP_KERNEL); + if (!self->i2c_client_p){ + emsg = "can't kzalloc client"; + goto err_setup_i2c_client; + } + self->i2c_client_p->adapter = adap; + self->i2c_client_p->addr = addr; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, emsg); + return ERR_MUX_UNEXCPT; +} + + +int +_common_force_pull_gpio(int mem_addr, + int input, + int bit_offset){ + + unsigned int val = 0; + unsigned int targ = 0; + + /* Get current value */ + val = inl(mem_addr); + if (val == 0) { + SWPS_ERR("%s: inl:%d fail!\n", __func__, val); + return -1; + } + /* Count target value */ + switch (input) { + case 0: /* Pull Low */ + targ = (val & (~(1 << bit_offset))); + break; + case 1: /* Pull high */ + targ = (val | (1 << bit_offset)); + break; + default: + SWPS_ERR("%s: input state:%d incorrect!\n", + __func__, input); + return -1; + } + /* Setup gpio */ + outl(targ, mem_addr); + if (targ != inl(mem_addr)){ + SWPS_ERR("%s: outl:%d fail!\n", __func__, targ); + return -1; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + + +int +rangeley_force_pull_high(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +rangeley_force_pull_low(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +hedera_force_pull_high(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 1, 5); +} + + +int +hedera_force_pull_low(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 0, 5); +} + + +int +normal_gpio_pull_high(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 1); +} + + +int +normal_gpio_pull_low(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 0); +} + + +int +cpld_rst_all_4_pull_low(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto setlow_cpld_rst_all_4_c0_a77_70_74_rst_all; + + default: + break; + } + emsg = "Undefined case"; + goto err_cpld_rst_all_4_pull_low; + +setlow_cpld_rst_all_4_c0_a77_70_74_rst_all: + err = _setup_i2c_value(self, 0x70, 0x0); + if (err < 0) { + emsg = "setup 0x70 fail"; + goto err_cpld_rst_all_4_pull_low; + } + err = _setup_i2c_value(self, 0x74, 0x01); + if (err < 0) { + emsg = "setup 0x74 fail"; + goto err_cpld_rst_all_4_pull_low; + } + return 0; + +err_cpld_rst_all_4_pull_low: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +cpld_rst_all_4_pull_high(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto sethigh_cpld_rst_all_4_c0_a77_70_74_rst_all; + + default: + break; + } + emsg = "Undefined case"; + goto err_cpld_rst_all_4_pull_high; + +sethigh_cpld_rst_all_4_c0_a77_70_74_rst_all: + err = _setup_i2c_value(self, 0x70, 0xfe); + if (err < 0) { + emsg = "setup 0x70 fail"; + goto err_cpld_rst_all_4_pull_high; + } + err = _setup_i2c_value(self, 0x74, 0x03); + if (err < 0) { + emsg = "setup 0x74 fail"; + goto err_cpld_rst_all_4_pull_high; + } + return 0; + +err_cpld_rst_all_4_pull_high: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +pca9548_reset_mux_all(struct mux_obj_s *self){ + /* [Note] Power-on reset (PCA9548A-NXP) + * When power is applied to VDD, an internal Power-On Reset (POR) + * holds the PCA9548A in a reset condition until VDD has reached + * VPOR. At this point, the reset condition is released and the + * PCA9548A register and I2C-bus state machine are initialized to + * their default states (all zeroes) causing all the channels to + * be deselected. Thereafter, VDD must be lowered below 0.2 V for + * at least 5 us in order to reset the device. + */ + if (self->_pull_low(self) < 0) { + SWPS_ERR("%s: _pull_low fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS_PCA9548); + if (self->_pull_high(self) < 0) { + SWPS_ERR("%s: _pull_high fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS_PCA9548); + return 0; +} + + +int +cpld_reset_mux_all(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto reset_cpld_rst_all_4_c0_a77_70_74_rst_all; + + default: + break; + } + emsg = "Undefined case"; + goto err_cpld_reset_mux_all; + +reset_cpld_rst_all_4_c0_a77_70_74_rst_all: + if (self->_pull_low(self) < 0) { + emsg = "_pull_low fail"; + goto err_cpld_reset_mux_all; + } + mdelay(MUX_RST_WAIT_MS_CPLD); + return 0; + +err_cpld_reset_mux_all: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +common_reset_mux_all(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +init_gpio_4_force(struct mux_obj_s *self){ + + if (self->_pull_high(self) < 0) { + SWPS_ERR("%s: setup default fail!\n", __func__); + return -1; + } + return 0; +} + + +int +init_gpio_4_normal(struct mux_obj_s *self){ + + int err = 0; + char *emsg = "ERR"; + + if (!gpio_is_valid(self->gpio_num)) { + emsg = "GPIO invalid"; + goto err_init_gpio_4_normal; + } + err = gpio_request(self->gpio_num, MUX_GPIO_LABEL); + if (err < 0) { + emsg = "gpio_request fail"; + goto err_init_gpio_4_normal; + } + err = self->_pull_high(self); + if (err < 0) { + emsg = "setup default fail"; + goto err_init_gpio_4_normal; + } + SWPS_DEBUG("%s: gpio_request:%d ok.\n", __func__, self->gpio_num); + return 0; + +err_init_gpio_4_normal: + SWPS_ERR("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return -1; +} + + +int +init_cpld_4_rst_all(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + int chan = ERR_MUX_UNEXCPT; + int addr = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto init_cpld_i2c_c0_a77_70_74_rst_all; + + default: + break; + } + emsg = "Undefined case"; + goto err_init_cpld_4_rst_all; + +init_cpld_i2c_c0_a77_70_74_rst_all: + chan = 0; + addr = 0x77; + err = _setup_i2c_client(self, chan, addr); + if (err < 0) { + emsg = "_setup_i2c_client fail"; + goto err_init_cpld_4_rst_all; + } + err = self->_pull_high(self); + if (err < 0) { + emsg = "setup default value fail"; + goto err_init_cpld_4_rst_all; + } + SWPS_DEBUG("%s: init_cpld_i2c_c0_a77_70_74_rst_all ok", __func__); + return 0; + +err_init_cpld_4_rst_all: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +clean_gpio_4_common(struct mux_obj_s *self){ + + if (!self) return 0; + if (!gpio_is_valid(self->gpio_num)) return 0; + self->_pull_high(self); + gpio_free(mux_head_p->gpio_num); + return 0; +} + + +int +clean_cpld_4_rst_all(struct mux_obj_s *self){ + + if (!self) return 0; + self->_pull_high(self); + if (self->i2c_client_p) { + i2c_put_adapter(self->i2c_client_p->adapter); + kfree(self->i2c_client_p); + } + return 0; +} + + +static int +_setup_muxctl_cb(struct mux_obj_s *self, + unsigned gpio){ + + char mod_dsc[32] = "ERR"; + + switch (gpio) { + case MUX_RST_GPIO_FORCE_RANGELEY: + self->gpio_num = gpio; + self->_pull_low = rangeley_force_pull_low; + self->_pull_high = rangeley_force_pull_high; + self->_init = init_gpio_4_force; + self->_clean = clean_gpio_4_common; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Rangeley force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_FORCE_HEDERA: + self->gpio_num = gpio; + self->_pull_low = hedera_force_pull_low; + self->_pull_high = hedera_force_pull_high; + self->_init = init_gpio_4_force; + self->_clean = clean_gpio_4_common; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Hedera force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_48_PCA9548: + case MUX_RST_GPIO_69_PCA9548: + case MUX_RST_GPIO_249_PCA9548: + case MUX_RST_GPIO_500_PCA9548: + case MUX_RST_GPIO_505_PCA9548: + self->gpio_num = gpio; + self->_pull_low = normal_gpio_pull_low; + self->_pull_high = normal_gpio_pull_high; + self->_init = init_gpio_4_normal; + self->_clean = clean_gpio_4_common; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Normal mode :%d", (int)gpio); + goto ok_setup_muxctl_cb; + + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + self->gpio_num = gpio; + self->_pull_low = cpld_rst_all_4_pull_low; + self->_pull_high = cpld_rst_all_4_pull_high; + self->_init = init_cpld_4_rst_all; + self->_clean = clean_cpld_4_rst_all; + self->reset = cpld_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "CPLD mode :%d", (int)gpio); + goto ok_setup_muxctl_cb; + + default: + break; + } + SWPS_ERR("%s: Unexpected GPIO:%d\n", __func__, gpio); + return -1; + +ok_setup_muxctl_cb: + SWPS_INFO("muxctl: %s.\n", mod_dsc); + return 0; +} + + +/* ========== MUX public functions ========== + */ +void +clean_mux_objs(void){ + + struct mux_obj_s *curr_p = mux_head_p; + struct mux_obj_s *next_p = NULL; + + if (!curr_p) { + SWPS_DEBUG("%s: mux_head_p is NULL\n", __func__); + return; + } + while (curr_p) { + next_p = curr_p->next; + curr_p->_clean(curr_p); + kfree(curr_p); + curr_p = next_p; + } + SWPS_DEBUG("%s: done.\n", __func__); +} +EXPORT_SYMBOL(clean_mux_objs); + + +int +reset_mux_objs(void){ + + if (!mux_head_p) { + SWPS_ERR("%s: MUX ctl object doesn't exist!\n", __func__); + return -1; + } + if (mux_head_p->reset(mux_head_p) < 0){ + SWPS_ERR("%s: reset fail!\n", __func__); + return -1; + } + return 0; +} +EXPORT_SYMBOL(reset_mux_objs); + + +struct mux_obj_s * +_create_mux_obj(unsigned gpio){ + + char *emsg = "ERR"; + struct mux_obj_s *obj_p = NULL; + + obj_p = kzalloc(sizeof(struct mux_obj_s), GFP_KERNEL); + if (!obj_p) { + emsg = "kzalloc fail!"; + goto err_create_mux_obj_1; + } + if (_setup_muxctl_cb(obj_p, gpio) < 0){ + emsg = "_setup_muxctl_cb fail!"; + goto err_create_mux_obj_2; + } + if (obj_p->_init(obj_p) < 0) { + emsg = "_init() fail!"; + goto err_create_mux_obj_2; + } + SWPS_DEBUG("%s: created MUX object :%d\n", __func__, gpio); + return obj_p; + +err_create_mux_obj_2: + kfree(obj_p); +err_create_mux_obj_1: + SWPS_ERR("%s: %s :%d\n", __func__, emsg, gpio); + return NULL; +} + + +int +init_mux_objs(unsigned gpio){ + + struct mux_obj_s *curr_p = NULL; + char *emsg = "ERR"; + + /* Create MUX control object */ + if (mux_head_p) { + SWPS_DEBUG("%s: mux_head_p is not NULL!\n", __func__); + clean_mux_objs(); + } + /* Currently, it is using single muxctl architecture. + * In the future, it may use the multi-muxctl. + * (Ex: Gulmohar's advance I2C control / Peony's reset single mux) + */ + curr_p = _create_mux_obj(gpio); + if (!curr_p) { + emsg = "_create_mux_obj fail"; + goto err_init_mux_objs; + } + curr_p->next = NULL; + mux_head_p = curr_p; + SWPS_DEBUG("%s: all done. :%d\n", __func__, gpio); + return 0; + +err_init_mux_objs: + clean_mux_objs(); + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} +EXPORT_SYMBOL(init_mux_objs); + + +/* For single ko module + * => You need to declare MODULE_LICENSE If you want to build single module along. + * => Ex: For ONL platform + */ +MODULE_LICENSE("GPL"); + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_mux.h b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_mux.h new file mode 100644 index 00000000000..a913b24c605 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_mux.h @@ -0,0 +1,51 @@ +#ifndef INV_MUX_H +#define INV_MUX_H + +#include + +/* MUX basic information */ +#define MUX_GPIO_LABEL "SWPS_RST_MUX" + +/* MUX reset GPIO define */ +#define MUX_RST_GPIO_FORCE (30100) +#define MUX_RST_GPIO_FORCE_RANGELEY (30101) +#define MUX_RST_GPIO_FORCE_HEDERA (30102) +#define MUX_RST_GPIO_48_PCA9548 (48) +#define MUX_RST_GPIO_69_PCA9548 (69) +#define MUX_RST_GPIO_249_PCA9548 (249) +#define MUX_RST_GPIO_500_PCA9548 (500) +#define MUX_RST_GPIO_505_PCA9548 (505) +#define MUX_RST_CPLD_C0_A77_70_74_RST_ALL (30201) + +/* MUX relate value define */ +#define MUX_RST_WAIT_MS_PCA9548 (1) +#define MUX_RST_WAIT_MS_CPLD (10) +#define MUX_RST_MEM_ADDR_RANGELEY (0) // TBD +#define MUX_RST_MEM_ADDR_HEDERA (0x548) + +/* MUX error code define */ +#define ERR_MUX_UNEXCPT (-399) + +struct mux_obj_s { + struct i2c_client *i2c_client_p; + struct mux_obj_s *next; + unsigned gpio_num; + int (*_pull_high)(struct mux_obj_s *self); + int (*_pull_low)(struct mux_obj_s *self); + int (*_init)(struct mux_obj_s *self); + int (*_clean)(struct mux_obj_s *self); + int (*reset)(struct mux_obj_s *self); +}; + + +void clean_mux_objs(void); +int reset_mux_objs(void); +int init_mux_objs(unsigned gpio); + + +#endif /* INV_MUX_H */ + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_platform.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_platform.c new file mode 100644 index 00000000000..d1841564b9d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_platform.c @@ -0,0 +1,297 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +struct inv_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +#define bus_id(id) (id) +static struct pca954x_platform_mode pca9641_modes_1[] = { + {.adap_id = bus_id(2),}, +}; + +static struct pca954x_platform_mode pca9641_modes_2[] = { + {.adap_id = bus_id(5),}, +}; + +static struct pca954x_platform_mode pca9641_modes_3[] = { + {.adap_id = bus_id(3),}, +}; + +static struct pca954x_platform_mode pca9641_modes_4[] = { + {.adap_id = bus_id(4),}, +}; + +static struct pca954x_platform_mode mux_modes_0[] = { + {.adap_id = bus_id(6),}, {.adap_id = bus_id(7),}, + {.adap_id = bus_id(8),}, {.adap_id = bus_id(9),}, + {.adap_id = bus_id(10),}, {.adap_id = bus_id(11),}, + {.adap_id = bus_id(12),}, {.adap_id = bus_id(13),}, +}; +static struct pca954x_platform_mode mux_modes_0_0[] = { + {.adap_id = bus_id(14),}, {.adap_id = bus_id(15),}, + {.adap_id = bus_id(16),}, {.adap_id = bus_id(17),}, + {.adap_id = bus_id(18),}, {.adap_id = bus_id(19),}, + {.adap_id = bus_id(20),}, {.adap_id = bus_id(21),}, +}; + +static struct pca954x_platform_mode mux_modes_0_1[] = { + {.adap_id = bus_id(22),}, {.adap_id = bus_id(23),}, + {.adap_id = bus_id(24),}, {.adap_id = bus_id(25),}, + {.adap_id = bus_id(26),}, {.adap_id = bus_id(27),}, + {.adap_id = bus_id(28),}, {.adap_id = bus_id(29),}, +}; + +static struct pca954x_platform_mode mux_modes_0_2[] = { + {.adap_id = bus_id(30),}, {.adap_id = bus_id(31),}, + {.adap_id = bus_id(32),}, {.adap_id = bus_id(33),}, + {.adap_id = bus_id(34),}, {.adap_id = bus_id(35),}, + {.adap_id = bus_id(36),}, {.adap_id = bus_id(37),}, +}; + +static struct pca954x_platform_mode mux_modes_0_3[] = { + {.adap_id = bus_id(38),}, {.adap_id = bus_id(39),}, + {.adap_id = bus_id(40),}, {.adap_id = bus_id(41),}, + {.adap_id = bus_id(42),}, {.adap_id = bus_id(43),}, + {.adap_id = bus_id(44),}, {.adap_id = bus_id(45),}, +}; + +static struct pca954x_platform_mode mux_modes_0_4[] = { + {.adap_id = bus_id(46),}, {.adap_id = bus_id(47),}, + {.adap_id = bus_id(48),}, {.adap_id = bus_id(49),}, + {.adap_id = bus_id(50),}, {.adap_id = bus_id(51),}, + {.adap_id = bus_id(52),}, {.adap_id = bus_id(53),}, +}; + +static struct pca954x_platform_mode mux_modes_0_5[] = { + {.adap_id = bus_id(54),}, {.adap_id = bus_id(55),}, + {.adap_id = bus_id(56),}, {.adap_id = bus_id(57),}, + {.adap_id = bus_id(58),}, {.adap_id = bus_id(59),}, + {.adap_id = bus_id(60),}, {.adap_id = bus_id(61),}, +}; + +static struct pca954x_platform_mode mux_modes_0_6[] = { + {.adap_id = bus_id(62),}, {.adap_id = bus_id(63),}, + {.adap_id = bus_id(64),}, {.adap_id = bus_id(65),}, + {.adap_id = bus_id(66),}, {.adap_id = bus_id(67),}, + {.adap_id = bus_id(68),}, {.adap_id = bus_id(69),}, +}; + +//no i2c device driver attach to mux 7 + +static struct pca954x_platform_data pca9641_data_1 = { + .modes = pca9641_modes_1, + .num_modes = 1, +}; +static struct pca954x_platform_data pca9641_data_2 = { + .modes = pca9641_modes_2, + .num_modes = 1, +}; +static struct pca954x_platform_data pca9641_data_3 = { + .modes = pca9641_modes_3, + .num_modes = 1, +}; +static struct pca954x_platform_data pca9641_data_4 = { + .modes = pca9641_modes_4, + .num_modes = 1, +}; +static struct pca954x_platform_data mux_data_0 = { + .modes = mux_modes_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_0 = { + .modes = mux_modes_0_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_1 = { + .modes = mux_modes_0_1, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_2 = { + .modes = mux_modes_0_2, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_3 = { + .modes = mux_modes_0_3, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_4 = { + .modes = mux_modes_0_4, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_5 = { + .modes = mux_modes_0_5, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_6 = { + .modes = mux_modes_0_6, + .num_modes = 8, +}; + +static struct i2c_board_info i2c_device_info0[] __initdata = { + {"pca9641", 0, 0x76, &pca9641_data_1, 0, 0}, //PCA9641-1 + {"pca9641", 0, 0x73, &pca9641_data_3, 0, 0}, //PCA9641-3 + {"pca9641", 0, 0x09, &pca9641_data_4, 0, 0}, //PCA9641-4 +}; +static struct i2c_board_info i2c_device_info1[] __initdata = { + {"pca9641", 0, 0x0A, &pca9641_data_2, 0, 0}, //PCA9641-2 +}; +static struct i2c_board_info i2c_device_info2[] __initdata = { + {"inv_cpld", 0, 0x77, 0, 0, 0}, //CPLD +}; +static struct i2c_board_info i2c_device_info3[] __initdata = { + {"tmp75", 0, 0x48, 0, 0, 0}, //CPU Board Temp + {"tmp75", 0, 0x4A, 0, 0, 0}, //Temp + {"tmp75", 0, 0x4D, 0, 0, 0}, //Temp + {"tmp75", 0, 0x4E, 0, 0, 0}, //Temp +}; +static struct i2c_board_info i2c_device_info4[] __initdata = { + {"inv_psu", 0, 0x5B, 0, 0, 0}, //PSU1 + {"inv_psu", 0, 0x5A, 0, 0, 0}, //PSU2 +}; +static struct i2c_board_info i2c_device_info5[] __initdata = { + {"pca9548", 0, 0x70, &mux_data_0, 0, 0}, //mux root +}; +static struct i2c_board_info i2c_device_info6[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_0, 0, 0}, +}; +static struct i2c_board_info i2c_device_info7[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_1, 0, 0}, +}; +static struct i2c_board_info i2c_device_info8[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_2, 0, 0}, +}; +static struct i2c_board_info i2c_device_info9[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_3, 0, 0}, +}; +static struct i2c_board_info i2c_device_info10[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_4, 0, 0}, +}; +static struct i2c_board_info i2c_device_info11[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_5, 0, 0}, +}; +static struct i2c_board_info i2c_device_info12[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_6, 0, 0}, +}; + + +static struct inv_i2c_board_info i2cdev_list[] = { + {bus_id(0), ARRAY_SIZE(i2c_device_info0), i2c_device_info0 }, //SMBus + {bus_id(1), ARRAY_SIZE(i2c_device_info1), i2c_device_info1 }, //pca9641-2 + {bus_id(2), ARRAY_SIZE(i2c_device_info2), i2c_device_info2 }, //pca9641-1 + {bus_id(3), ARRAY_SIZE(i2c_device_info3), i2c_device_info3 }, //pca9641-3 + {bus_id(4), ARRAY_SIZE(i2c_device_info4), i2c_device_info4 }, //pca9641-4 + {bus_id(0), ARRAY_SIZE(i2c_device_info5), i2c_device_info5 }, //mux root + {bus_id(6), ARRAY_SIZE(i2c_device_info6), i2c_device_info6 }, //mux CH0 + {bus_id(7), ARRAY_SIZE(i2c_device_info7), i2c_device_info7 }, //mux CH1 + {bus_id(8), ARRAY_SIZE(i2c_device_info8), i2c_device_info8 }, //mux CH2 + {bus_id(9), ARRAY_SIZE(i2c_device_info9), i2c_device_info9 }, //mux CH3 + {bus_id(10),ARRAY_SIZE(i2c_device_info10), i2c_device_info10}, //mux CH4 + {bus_id(11),ARRAY_SIZE(i2c_device_info11), i2c_device_info11}, //mux CH5 + {bus_id(12),ARRAY_SIZE(i2c_device_info12), i2c_device_info12}, //mux CH6 +}; + +#define INV_PLATFORM_CLIENT_MAX_NUM 50 /*A big enough number for sum of i2cdev_list[i].size */ +static int client_list_index = 0; +static struct i2c_client *client_list[INV_PLATFORM_CLIENT_MAX_NUM] = {0}; + +///////////////////////////////////////////////////////////////////////////////////////// +static struct platform_device *device_i2c_gpio0; +static struct i2c_gpio_platform_data i2c_gpio_platdata0 = { + .scl_pin = 58, //494, + .sda_pin = 75, //511, + + .udelay = 5, //5:100kHz + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .scl_is_output_only = 0 +}; + +static int __init inv_platform_init(void) +{ + struct i2c_adapter *adap = NULL; + struct i2c_client *e = NULL; + int ret = 0; + int i,j,k; + + //printk("%s \n", __func__); + + //use i2c-gpio + //register i2c gpio + //config gpio58,75 to gpio function 58=32+3*8+2 75=32*2+8*1+3 gpio69=32*2+8*0+5 + outl( inl(0x533) | (1<<2), 0x533); //i2c-gpio sdl (GPIO58) + outl( inl(0x541) | (1<<3), 0x541); //i2c-gpio sda (GPIO75) + outl( inl(0x540) | (1<<5), 0x540); //RST_I2C_MUX_N (GPIO69) + outl( inl(0x500) | (1<<7), 0x500); //SYS_RDY_N (GPIO7) + outl( inl(0x501) | (1<<7), 0x501); //BMC_HEART_BEAT (GPIO15) + outl( inl(0x503) | (1<<2)|(1<<3), 0x503); //PSOC_HEART_BEAT(26),CPLD_HEART_BEAT(27) + + device_i2c_gpio0 = platform_device_alloc("i2c-gpio", 1); + if (!device_i2c_gpio0) { + printk(KERN_ERR "i2c-gpio: platform_device_alloc fail\n"); + return -ENOMEM; + } + device_i2c_gpio0->name = "i2c-gpio"; + device_i2c_gpio0->id = 1; + device_i2c_gpio0->dev.platform_data = &i2c_gpio_platdata0; + + ret = platform_device_add(device_i2c_gpio0); + if (ret) { + printk(KERN_ERR "i2c-gpio: platform_device_add fail %d\n", ret); + } + msleep(10); + + for(i=0; i=0; i--) { + i2c_unregister_device(client_list[i]); + } + device_i2c_gpio0->dev.platform_data = NULL; + platform_device_unregister(device_i2c_gpio0); + printk("inv_platform_exit done\n"); +} + +module_init(inv_platform_init); +module_exit(inv_platform_exit); + +MODULE_AUTHOR("Inventec"); +MODULE_DESCRIPTION("Platform devices"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_proxy.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_proxy.c new file mode 100644 index 00000000000..e55db84ab00 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_proxy.c @@ -0,0 +1,991 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include "inv_proxy.h" + +static DEFINE_MUTEX(psoc_lock); +static int flag_psoc_io = 1; + +struct vpd_info_s *vpd = NULL; + + +unsigned long +get_jiffies_after_ms(int ms) { + + int ms_jiffies = 0; + + if (ms == 0) { + return jiffies; + } + ms_jiffies = ((ms * HZ) / 1000); + if (ms_jiffies == 0) { + ms_jiffies = 1; + } + return (jiffies + ms_jiffies); +} + + + +char* str_replace(char* str, char* search, char* replace) +{ + char *buf = DEBUG_INV_STR; + char *pos = DEBUG_INV_STR; + char *in = DEBUG_INV_STR; + char *out = DEBUG_INV_STR; + long slen = strlen(search); + long rlen = strlen(replace); + size_t count = 0; + size_t buf_size = 0; + + /* Calculate the frequency */ + pos = str; + while((pos = strstr(pos, search))) + { + count += 1; + pos += slen; + } + /* Calculate size of new string */ + buf_size = (long)strlen(str) + count*(rlen - slen) + 1; + + /* Copy and replace */ + buf = kzalloc(buf_size, GFP_KERNEL); + if(!buf) { + return NULL; + } + pos = in = str; + out = buf; + while((pos = strstr(pos, search))) + { + strncpy(out, in, pos - in); + out += pos - in; + strcpy(out, replace); + out += rlen; + pos += slen; + in = pos; + } + strcpy(out, in); + return buf; +} + + +void +str_line_to_var(char *str) { + + char *mark = NULL; + mark = strpbrk(str, "\n"); + if (mark) + *mark = '\0'; +} + + +int +sscanf_2_int(const char *buf) { + + int result = -EBFONT; + char *hex_tag = "0x"; + + if (strcspn(buf, hex_tag) == 0) { + if (sscanf(buf,"%x",&result)) { + return result; + } + } else { + if (sscanf(buf,"%d",&result)) { + return result; + } + if (sscanf(buf,"%x",&result)) { + return result; + } + } + return -EBFONT; +} + + +int +is_ufile_exist(const char *path) { + + struct file *fp = filp_open(path, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -1; + filp_close(fp, NULL); + return 0; + +} + + +int +read_ufile(const char *path, + char *buf, + size_t len) { + + struct file *fp; + mm_segment_t fs; + loff_t pos; + + if (len >= MAX_ACC_SIZE) { + len = MAX_ACC_SIZE - 1; + } + fp = filp_open(path, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + fs = get_fs(); + set_fs(KERNEL_DS); + pos = 0; + vfs_read(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + return 0; +} + + +int +write_ufile(const char *path, + char *buf, + size_t len) { + + struct file *fp; + mm_segment_t fs; + loff_t pos; + + if (len >= MAX_ACC_SIZE) { + len = MAX_ACC_SIZE - 1; + } + fp = filp_open(path, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + fs = get_fs(); + set_fs(KERNEL_DS); + pos = 0; + vfs_write(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + return 0; +} + + +int +_is_hwmon_errno(char *result) { + +#if 0 + char *str_eio = "-5\n"; + char *str_enxio = "-6\n"; + char *str_negative = "-"; + char *str_no_ctl = "64250\n"; /* 0xFAFA */ + + if (strcmp(result, str_eio) == 0) { + return -EIO; + } + if (strcmp(result, str_enxio) == 0) { + return -ENXIO; + } + if (strcmp(result, str_no_ctl) == 0) { + return ERR_NO_CTLER; + } + if (strcspn(result, str_negative) == 0) { + /* error case: "-202" */ + return ERR_NEGATIVE_VAL; + } +#endif + return 0; +} + + +int +_is_swps_errno(char *result) { + + char *str_negative = "-"; + + if (strcspn(result, str_negative) == 0) { + /* error case: "-202" */ + return -ENODATA; + } + return 0; +} + + +int +_read_attr_common(char *path, + char *buf, + int buf_len, + int (*check_err)(char* buf), + int (*transform)(char *buf, int buf_len, int err) ){ + + int err = DEBUG_INV_INT; + int acc_len = MAX_ACC_SIZE-1; + + memset(buf, 0, buf_len); + err = read_ufile(path, buf, acc_len); + if (err < 0) { + return err; + } + err = check_err(buf); + if (err < 0) { + return err; + } + err = transform(buf, buf_len, err); + if (err < 0){ + return err; + } + return err; +} + + +int +_write_attr_common(char *path, + const char *buf, + int (*transform)(const char *buf, char *tmp) ){ + + int err = DEBUG_INV_INT; + int acc_len = MAX_ACC_SIZE-1; + char tmp[MAX_LEN_TRNASFORM_W_TMP] = DEBUG_INV_STR; + + memset(tmp, 0, MAX_LEN_TRNASFORM_W_TMP); + err = transform(buf, tmp); + if (err < 0) { + return err; + } + err = write_ufile(path, tmp, acc_len); + if (err < 0){ + return err; + } + return 0; +} + + +void +set_psco_io_flag(int flag) { + + /* IO will be disabled if flag = 0 */ + mutex_lock(&psoc_lock); + flag_psoc_io = flag; + mutex_unlock(&psoc_lock); +} + + +int +get_psco_io_flag(void) { + + int ret = 0; + + mutex_lock(&psoc_lock); + ret = flag_psoc_io; + mutex_unlock(&psoc_lock); + return ret; +} + +int +transform_4_read_uint8(char *buf, + int buf_len, + int err) { + + int limit = 32; + int result = DEBUG_INV_HEX; + + if (err < 0) { + goto err_transform_4_read_uint8; + } + if (sscanf(buf, "%x", &result) != 1) { + err = -EBFONT; + goto err_transform_4_read_uint8; + } + if (result == DEBUG_INV_HEX) { + err = -EBFONT; + goto err_transform_4_read_uint8; + } + memset(buf, 0, buf_len); + snprintf(buf, limit, "%02x \n", result); + return 0; + +err_transform_4_read_uint8: + snprintf(buf, limit, "%d\n", err); + return err; +} + + +int +transform_4_read_int(char *buf, + int buf_len, + int err) { + + int limit = 32; + int result = DEBUG_INV_INT; + + if (err < 0) { + goto err_transform_4_read_int; + } + if (sscanf(buf, "%d", &result) != 1) { + err = -EBFONT; + if( sscanf(buf,"-%d",&result) == 1 ){ + result = -result; + err = 0; + } + else + goto err_transform_4_read_int; + } + if (result == DEBUG_INV_INT) { + err = -EBFONT; + goto err_transform_4_read_int; + } + memset(buf, 0, buf_len); + snprintf(buf, limit, "%d\n", result); + return 0; + +err_transform_4_read_int: + snprintf(buf, limit, "%d\n", err); + return err; +} + + +int +transform_4_read_percent(char *buf, + int buf_len, + int err) { + + int limit = 32; + int result = DEBUG_INV_INT; + int iErrHandle = 0; + + if (err < 0) { + iErrHandle = 1; + } + if (sscanf(buf, "%d", &result) != 1) { + err = -EBFONT; + iErrHandle = 1; + } + if (result == DEBUG_INV_INT) { + err = -EBFONT; + iErrHandle = 1; + } + memset(buf, 0, buf_len); + if( !iErrHandle ){ + result = (result * 100 )/255; + snprintf(buf, limit, "%d\n", result); + return 0; + } + else{ + snprintf(buf, limit, "%d\n", err); + return err; + } +} + +int +transform_4_read_positive(char *buf, + int buf_len, + int err) { + + int result = DEBUG_INV_INT; + int check = transform_4_read_int(buf, buf_len, err); + + if (check < 0) { + return check; + } + if (sscanf(buf, "%d", &result) != 1){ + return -EBFONT; + } + if (result < 0) { + return ERR_NEGATIVE_VAL; + } + if (result == 0) { + return ERR_ZERO_VAL; + } + return 0; +} + + +int +transform_4_read_binary(char *buf, + int buf_len, + int err) { + + int result = DEBUG_INV_INT; + int check = transform_4_read_int(buf, buf_len, err); + + if (check < 0) { + return check; + } + if (sscanf(buf, "%d", &result) != 1){ + return -EBFONT; + } + if ((result == 0) || (result == 1)) { + return 0; + } + return - ERANGE; +} + + +int +transform_4_read_str(char *buf, + int buf_len, + int err) { + + if (err < 0) { + goto err_transform_4_read_str; + } + return 0; + +err_transform_4_read_str: + snprintf(buf, buf_len, "%d\n", err); + return err; +} + + +int +transform_4_write_binary(const char *buf, char *tmp) { + + int input = sscanf_2_int(buf); + + if (input < 0) { + return input; + } + if ( (input == 0) || (input == 1) ) { + goto ok_transform_4_write_binary; + } + return -EBFONT; + +ok_transform_4_write_binary: + memset(tmp, 0, MAX_LEN_TRNASFORM_W_TMP); + snprintf(tmp, MAX_LEN_TRNASFORM_W_TMP, "%d", input); + return 0; +} + + +int +transform_4_write_uint8(const char *buf, char *tmp) { + + int input = sscanf_2_int(buf); + + if (input < 0) { + return input; + } + if ((input >= 0x0) && (input <= 0xff)) { + goto ok_transform_4_write_uint8; + } + return -EBFONT; + +ok_transform_4_write_uint8: + memset(tmp, 0, MAX_LEN_TRNASFORM_W_TMP); + snprintf(tmp, MAX_LEN_TRNASFORM_W_TMP, "%d", input); + return 0; +} +int +transform_4_write_percent(const char *buf, char *tmp) { + + int input = sscanf_2_int(buf); + + if (input < 0) { + return input; + } + if ((input >= 0) && (input <= 100)) { + input = (input *255)/100; + memset(tmp, 0, MAX_LEN_TRNASFORM_W_TMP); + snprintf(tmp, MAX_LEN_TRNASFORM_W_TMP, "%d", input); + return 0; + } + return -EBFONT; + +} + + +int +transform_4_write_int(const char *buf, char *tmp) { + + int input; + + if (sscanf(buf, "%d", &input) == 1){ + goto ok_transform_4_write_int; + } + if (sscanf(buf, "%x", &input) == 1){ + goto ok_transform_4_write_int; + } + return -EBFONT; + +ok_transform_4_write_int: + memset(tmp, 0, MAX_LEN_TRNASFORM_W_TMP); + snprintf(tmp, MAX_LEN_TRNASFORM_W_TMP, "%d", input); + return 0; +} + + +static int +_count_switch_mac(char *base_mac, + char *switch_mac, + int level) { + + int i, ret; + int num[6]; + char *delim = ":"; + char *tmp_str = NULL; + char *tmp_base = NULL; + char tmp_mac[MAX_LEN_VPD_ATTR] = DEBUG_INV_STR; + + if ((level < 0) || (level > 5)) { + goto err_count_switch_mac_1; + } + tmp_base = kzalloc(MAX_LEN_VPD_ATTR, GFP_KERNEL); + if (!tmp_base) { + goto err_count_switch_mac_1; + } + memset(switch_mac, 0, MAX_LEN_VPD_ATTR); + memset(tmp_mac, 0, MAX_LEN_VPD_ATTR); + snprintf(tmp_base, 32, "%s", base_mac); + for (i=0; i<6; i++) { + tmp_str = NULL; + tmp_str = strsep(&tmp_base, delim); + if (!tmp_str) { + goto err_count_switch_mac_2; + } + if (!sscanf(tmp_str,"%x",&(num[i]))) { + goto err_count_switch_mac_2; + } + } + if (num[level] < 0xff) { + num[level] += 1; + snprintf(switch_mac, 32, "%02x:%02x:%02x:%02x:%02x:%02x", + num[0], num[1], num[2], num[3], num[4], num[5]); + ret = 0; + goto ok_count_switch_mac_1; + } else if (num[level] == 0xff) { + num[level] = 0; + level -= 1; + snprintf(tmp_mac, 32, "%02x:%02x:%02x:%02x:%02x:%02x", + num[0], num[1], num[2], num[3], num[4], num[5]); + ret = _count_switch_mac(tmp_mac, switch_mac, level); + goto ok_count_switch_mac_1; + } + goto err_count_switch_mac_2; + +ok_count_switch_mac_1: + if (tmp_base) { + kfree(tmp_base); + } + return ret; + +err_count_switch_mac_2: + if (tmp_base) { + kfree(tmp_base); + } +err_count_switch_mac_1: + return -1; +} + + +static int +_parser_vpd_attr_str(char *line, char *val) { + + int i, off; + int len_result = 0; + int len_ignore = 30; + + if (strlen(line) < len_ignore) { + goto err_parser_vpd_attr_str; + } + len_result = strlen(line) - len_ignore; + if (len_result < strlen(val)) { + PROXY_ERR("detect redundance attribute in VPD."); + goto err_parser_vpd_attr_str; + } + memset(val, 0, MAX_LEN_VPD_ATTR); + for (i=0; i<=len_result; i++) { + off = i + len_ignore; + if ( (line[off] == '\n') || + (line[off] == '\0') || + (i == (len_result)) ){ + val[i] = '\0'; + break; + } + val[i] = line[off]; + } + return 0; + +err_parser_vpd_attr_str: + snprintf(val, MAX_LEN_VPD_ATTR, "NA"); + return -1; +} + + +static int +_parser_vpd_attr_mac(char *line, + char *cpu_mac, + char *switch_mac) { + + int err = _parser_vpd_attr_str(line, cpu_mac); + + if (err < 0) { + PROXY_ERR("%s: Parser CPU MAC fail\n", __func__); + return -1; + } + err = _count_switch_mac(cpu_mac, switch_mac, 5); + if (err < 0) { + PROXY_ERR("%s: Count Switch MAC fail\n", __func__); + return -1; + } + return 0; +} + + +static int +_setup_vpd_attr(char *line) { + + if (strncmp(line, ATTR_VPD_PRODUCT_NAME, strlen(ATTR_VPD_PRODUCT_NAME)) == 0) { + return _parser_vpd_attr_str(line, vpd->product_name); + } + if (strncmp(line, ATTR_VPD_SERIAL_NUM, strlen(ATTR_VPD_SERIAL_NUM)) == 0) { + return _parser_vpd_attr_str(line, vpd->serial_num); + } + if (strncmp(line, ATTR_VPD_VERSION, strlen(ATTR_VPD_VERSION)) == 0) { + return _parser_vpd_attr_str(line, vpd->version); + } + if (strncmp(line, ATTR_VPD_BASE_MAC, strlen(ATTR_VPD_BASE_MAC)) == 0) { + return _parser_vpd_attr_mac(line, vpd->cpu_mac, vpd->switch_mac); + } + if (strncmp(line, ATTR_VPD_DATE, strlen(ATTR_VPD_DATE)) == 0) { + return _parser_vpd_attr_str(line, vpd->date); + } + return 0; +} + + +static int +_read_vpd_attr(char *buf) { + + int ret = 0; + const char *delim = "\n"; + char *vender_name = "Inventec"; + char *line = strsep(&buf, delim); + + while (line != NULL) { + if (_setup_vpd_attr(line) < 0) { + ret = -1; + } + line = strsep(&buf, delim); + } + snprintf(vpd->vendor_name, 32, "%s", vender_name); + return ret; +} + + +static int +_read_vpd_info(void) { + + int err = DEBUG_INV_INT; + char buf[MAX_ACC_SIZE] = DEBUG_INV_STR; + + memset(buf, 0, sizeof(buf)); + err = read_ufile(ATTR_VPD_FILE_PATH, buf, MAX_ACC_SIZE); + if (err < 0) { + PROXY_DEBUG("%s: IO fail. :%d\n", __func__, err); + return err; + } + return _read_vpd_attr(buf); +} + + +struct vpd_info_s * +get_vpd_info(void) { + + int i = 0; + int retry = 5; + int wait_ms = 100; + int err = DEBUG_INV_INT; + + if (vpd) { + return vpd; + } + vpd = kzalloc(sizeof(struct vpd_info_s), GFP_KERNEL); + if (!vpd) { + PROXY_ERR("%s: kzalloc fail. :%d\n", __func__, err); + return NULL; + } + while (i++ < retry) { + if (_read_vpd_info() == 0) { + break; + } + if (i >= retry) { + PROXY_ERR("%s: read VPD fail!\n", __func__); + kfree(vpd); + vpd = NULL; + return NULL; + } + mdelay(wait_ms); + } + PROXY_DEBUG("Get vendor_name : %s\n", vpd->vendor_name); + PROXY_DEBUG("Get product_name : %s\n", vpd->product_name); + PROXY_DEBUG("Get serial_num : %s\n", vpd->serial_num); + PROXY_DEBUG("Get version : %s\n", vpd->version); + PROXY_DEBUG("Get cpu_mac : %s\n", vpd->cpu_mac); + PROXY_DEBUG("Get switch_mac : %s\n", vpd->switch_mac); + PROXY_DEBUG("Get date : %s\n", vpd->date); + return vpd; +} + + +struct i2c_client * +_get_i2c_client(int channel) { + + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + + adap = i2c_get_adapter(VAL_CPLD_CHANNEL); + if(!adap) { + PROXY_ERR("%s: Can't get i2c adap.\n", __func__); + return NULL; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + PROXY_ERR("%s: kzalloc client fail!\n", __func__); + return NULL; + } + client->adapter = adap; + return client; +} + +/* HWMON */ +int +read_hwmon_attr(char *attr, + char *buf, + int buf_len, + int (*transform)(char *buf, int buf_len, int err)) +{ + + int ret = -EIO; + char path[64] = DEBUG_INV_STR; + memset(path, 0, sizeof(path)); + + snprintf(path, sizeof(path), "%s", attr); + ret = _read_attr_common(path, + buf, + buf_len, + _is_hwmon_errno, + transform); +} + +/* PSU */ + +int +read_psu_temperature(char *attr) { + + char tmp[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + memset(tmp, 0, MAX_PATH_SIZE); + + if (read_hwmon_attr(attr, + tmp, + MAX_PATH_SIZE, + transform_4_read_int) < 0) + { + PROXY_ERR("%s: use inv proxy to read path (%s)\n", __func__, attr); + memset(tmp, 0, MAX_PATH_SIZE); + return -1; + } + if (sscanf(tmp, "%d", &result) != 1) + { + if (sscanf(tmp, "-%d", &result) == 1) + { + result = -result; + } + } + return result; +} + +int +read_psu_voltage(char *attr) { + + char tmp[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + memset(tmp, 0, MAX_PATH_SIZE); + + if (read_hwmon_attr(attr, + tmp, + MAX_PATH_SIZE, + transform_4_read_int) < 0) + { + PROXY_ERR("%s: use inv proxy to read path (%s)\n", __func__, attr); + memset(tmp, 0, MAX_PATH_SIZE); + return -1; + } + if (sscanf(tmp, "%d", &result) != 1) + { + if (sscanf(tmp, "-%d", &result) == 1) + { + result = -result; + } + } + return result; +} + +int +read_psu_power(char *attr) { + + char tmp[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + memset(tmp, 0, MAX_PATH_SIZE); + + if (read_hwmon_attr(attr, + tmp, + MAX_PATH_SIZE, + transform_4_read_int) < 0) + { + PROXY_ERR("%s: use inv proxy to read path (%s)\n", __func__, attr); + memset(tmp, 0, MAX_PATH_SIZE); + return -1; + } + if (sscanf(tmp, "%d", &result) != 1) + { + if (sscanf(tmp, "-%d", &result) == 1) + { + result = -result; + } + } + return result; +} + +int +read_psu_present(char *attr) { + + char tmp[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + memset(tmp, 0, MAX_PATH_SIZE); + + if (read_hwmon_attr(attr, + tmp, + MAX_PATH_SIZE, + transform_4_read_str) < 0) + { + PROXY_ERR("%s: use inv proxy to read path (%s)\n", __func__, attr); + memset(tmp, 0, MAX_PATH_SIZE); + return -1; + } + if (sscanf(tmp, "%d:", &result) != 1) + { + return -1; + } + // Default setting from kernel hw driver + // 0 menas "Unpowered" + // 1 means "Normal" + // 2,3 means "Uninstall" + // For the consistency, we will swap them. + // 0 means "Uninstall" + // 1 means "Normal" + // 2 means "Installed but Unpowered" + + if ( result == 0 ) + return 2 ; + if ( result == 2 || result == 3 ) + return 0 ; + return result; +} + +/* FAN */ + +int +read_fan_rpm(char *attr) { + + char tmp[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + memset(tmp, 0, MAX_PATH_SIZE); + + if (read_hwmon_attr(attr, + tmp, + MAX_PATH_SIZE, + transform_4_read_int) < 0) + { + PROXY_ERR("%s: use inv proxy to read path (%s)\n", __func__, attr); + memset(tmp, 0, MAX_PATH_SIZE); + return -1; + } + if (sscanf(tmp, "%d", &result) != 1) + { + return -1; + } + return result; +} + +int +read_fan_present(char *attr) { + + char tmp[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + memset(tmp, 0, MAX_PATH_SIZE); + + if (read_hwmon_attr(attr, + tmp, + MAX_PATH_SIZE, + transform_4_read_str) < 0) + { + PROXY_ERR("%s: use inv proxy to read path (%s)\n", __func__, attr); + memset(tmp, 0, MAX_PATH_SIZE); + return -1; + } + if (sscanf(tmp, "%d:", &result) != 1) + { + return -1; + } + // Default setting from kernel hw driver + // 0 menas "Normal type" + // 1 means "Reversal type" + // 2,3 means "Unplugged" + // For the consistency, we will swap them. + // 0 means "Unplugged" + // 1 means "Normal type" + // 2 means "Reversal type" + if ( result == 0 ) + return 1 ; + if ( result == 1 ) + return 2 ; + if ( result == 2 || result == 3 ) + return 0 ; + return result; +} + +/* CORE */ + +int +read_core_temperature(char *attr) { + + char tmp[MAX_PATH_SIZE]; + int result = DEBUG_INV_INT; + memset(tmp, 0, MAX_PATH_SIZE); + + if (read_hwmon_attr(attr, + tmp, + MAX_PATH_SIZE, + transform_4_read_int) < 0) + { + PROXY_ERR("%s: use inv proxy to read path (%s)\n", __func__, attr); + memset(tmp, 0, MAX_PATH_SIZE); + return -1 ; + } + if (sscanf(tmp, "%d", &result) != 1) + { + if (sscanf(tmp, "-%d", &result) == 1) + { + result = -result; + } + } + return result; +} + +int +inv_proxy_init(void) { + + if (vpd) { + kfree(vpd); + } + vpd = NULL; + return 0; +} + + +int +inv_proxy_exit(void) { + + if (vpd) { + kfree(vpd); + } + return 0; +} + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_proxy.h b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_proxy.h new file mode 100644 index 00000000000..69a2a0b1c6d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_proxy.h @@ -0,0 +1,126 @@ +#ifndef _INV_PROXY_H_ +#define _INV_PROXY_H_ + +#define MAX_ACC_SIZE (1023) +#define MAX_PATH_SIZE (64) + +/* Alarm define */ +#define ALARM_ASIC_WARN (90) +#define ALARM_CPU_WARN (88) +#define ALARM_ENV_WARN (57) + +/* Val */ +#define VAL_SFP_ID (0x03) +#define VAL_QSFP_ID (0x0c) +#define VAL_QSFP_P_ID (0x0d) +#define VAL_QSFP_28_ID (0x11) +#define VAL_VPD_CHANNEL (0) +#define VAL_VPD_ADDRESS (0x53) +#define VAL_CPLD_CHANNEL (0) +#define VAL_CPLD_ADDRESS (0x55) +#define VAL_SYSLED_MOD_OFFSET (0x0c) +#define VAL_SYSLED_MOD_AUTO "0" /* CPLD_VAL: 0x10 */ +#define VAL_SYSLED_MOD_MANUAL "1" /* CPLD_VAL: 0x11 */ +#define VAL_SYSLED_INV_KEEP_ON (7) +#define VAL_SYSLED_INV_4_HZ (4) +#define VAL_SYSLED_INV_2_HZ (3) +#define VAL_SYSLED_INV_1_HZ (2) +#define VAL_SYSLED_INV_HALF_HZ (1) +#define VAL_SYSLED_INV_OFF (0) +#define VAL_BIOS_MASTER (0x0) +#define VAL_BIOS_SLAVER (0x1) + +/* For uevent attribute key */ +#define UKEY_DEV_TYPE "type" + +/* Private value */ +#define MAX_LEN_TRNASFORM_W_TMP (128) +#define MAX_LEN_VPD_ATTR (32) +#define MAX_LEN_SHOW_NUMBER_BUF (16) +#define MAX_LEN_SHOW_STR_BUF (32) +#define MAX_LEN_SHOW_LSTR_BUF (64) +#define MAX_LEN_SHOW_XLSTR_BUF (128) + +#define DEBUG_INV_HEX (0xfe) +#define DEBUG_INV_INT (-99) +#define DEBUG_INV_STR "INV_DEBUG" + +/* Private error code */ +#define ERR_NOT_OWNER (-10000) +#define ERR_NEGATIVE_VAL (-10001) +#define ERR_ZERO_VAL (-10002) +#define ERR_NO_CTLER (-10003) + +/* VPD info */ +#define ATTR_VPD_FILE_PATH "/tmp/vpd.txt" +//#define ATTR_VPD_VNEDOR_NAME "Vendor Name" +#define ATTR_VPD_PRODUCT_NAME "Product Name" +#define ATTR_VPD_SERIAL_NUM "Serial Number" +#define ATTR_VPD_VERSION "Device Version" +#define ATTR_VPD_BASE_MAC "Base MAC Address" +#define ATTR_VPD_DATE "Manufacture Date" + + +#define PROXY_INFO(fmt, args...) printk( KERN_INFO "[Proxy]: " fmt, ##args) +#define PROXY_ERR(fmt, args...) printk( KERN_ERR "[Proxy]: " fmt, ##args) + +#ifdef DEBUG_PROXY +# define PROXY_DEBUG(fmt, args...) printk( KERN_DEBUG "[Proxy]: " fmt, ##args) +#else +# define PROXY_DEBUG(fmt, args...) +#endif /*DEBUG*/ + + +typedef enum { + INV_PSU_NORMAL = 0, + INV_PSU_UNPOWERED = 2, + INV_PSU_FAULT = 4, + INV_PSU_UNINSTALLED = 7, +}inv_psu_state_t; + +struct vpd_info_s { + char vendor_name[MAX_LEN_VPD_ATTR]; + char product_name[MAX_LEN_VPD_ATTR]; + char serial_num[MAX_LEN_VPD_ATTR]; + char version[MAX_LEN_VPD_ATTR]; + char cpu_mac[MAX_LEN_VPD_ATTR]; + char switch_mac[MAX_LEN_VPD_ATTR]; + char date[MAX_LEN_VPD_ATTR]; +}; + +extern struct vpd_info_s * get_vpd_info(void); +extern char* str_replace(char* str, char* search, char* replace); +extern void str_line_to_var(char *str); +extern void set_psco_io_flag(int flag); +extern int get_psco_io_flag(void); +extern int sscanf_2_int(const char *buf); +extern int is_ufile_exist(const char *path); +extern int transform_4_read_binary(char *buf, int buf_len, int err); +extern int transform_4_read_uint8(char *buf, int buf_len, int err); +extern int transform_4_read_int(char *buf, int buf_len, int err); +extern int transform_4_read_positive(char *buf, int buf_len, int err); +extern int transform_4_read_str(char *buf, int buf_len, int err); +extern int transform_4_write_binary(const char *buf, char *tmp); +extern int transform_4_write_uint8(const char *buf, char *tmp); +extern int transform_4_write_int(const char *buf, char *tmp); +extern int transform_4_read_percent(char *buf, int buf_len, int err); +extern int transform_4_write_percent(const char *buf, char *tmp); +extern int inv_proxy_init(void); +extern int inv_proxy_exit(void); +extern unsigned long get_jiffies_after_ms(int ms); +extern int read_hwmon_attr(char *attr, char *buf, int buf_len, int (*transform)(char *buf, int buf_len, int err)); +extern int read_psu_temperature(char *attr); +extern int read_psu_voltage(char *attr); +extern int read_psu_power(char *attr); +extern int read_psu_present(char *attr); +extern int read_fan_rpm(char *attr); +extern int read_fan_present(char *attr); +extern int read_core_temperature(char *attr); +#endif + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_psu.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_psu.c new file mode 100644 index 00000000000..78e561c194a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_psu.c @@ -0,0 +1,690 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define PMBUS_VOUT_MODE 0x20 +#define PMBUS_FAN_PWM 0x3b +#define PMBUS_READ_VIN 0x88 +#define PMBUS_READ_IIN 0x89 +#define PMBUS_READ_VOUT 0x8b +#define PMBUS_READ_IOUT 0x8c +#define PMBUS_READ_TEMP1 0x8d +#define PMBUS_READ_TEMP2 0x8e +#define PMBUS_READ_TEMP3 0x8f +#define PMBUS_READ_FAN1 0x90 +#define PMBUS_READ_FAN2 0x91 +#define PMBUS_READ_POUT 0x96 +#define PMBUS_READ_PIN 0x97 +#define PMBUS_READ_MFR_ID 0x99 +#define PMBUS_READ_MFR_MODEL 0x9a +#define PMBUS_READ_MFR_REV 0x9b +#define PMBUS_READ_MFR_LOC 0x9c +#define PMBUS_READ_MFR_DATE 0x9d +#define PMBUS_READ_MFR_SERIAL 0x9e + +#define DEFAULT_MFR_FAIL_STR "NA" + +static int retrys = 1; +module_param(retrys, int, 0); +MODULE_PARM_DESC(retrys, "Inventec PSU driver read retry times (default 1)."); + +static int read_only_once = 0; +module_param(read_only_once, int, 0); +MODULE_PARM_DESC(read_only_once, "Inventec PSU driver MFR field read only once flag (default 0)."); + +#define FAN_NUM 2 +#define TMP_NUM 3 + +struct psu_data { + struct device *hwmon_dev; + s32 vin; + s32 vout; + s32 cin; + s32 cout; + s32 pin; + s32 pout; + s32 vout_mode; + s32 rpm[FAN_NUM]; + s32 temp[TMP_NUM]; + s32 pwm; + u8 id[I2C_SMBUS_BLOCK_MAX + 2]; + u8 model[I2C_SMBUS_BLOCK_MAX + 2]; + u8 revision[I2C_SMBUS_BLOCK_MAX + 2]; + u8 location[I2C_SMBUS_BLOCK_MAX + 2]; + u8 date[I2C_SMBUS_BLOCK_MAX + 2]; + u8 serial[I2C_SMBUS_BLOCK_MAX + 2]; +}; + +static s32 reg2data_linear(s32 value, s32 mode, u8 reg) +{ + s16 exponent; + s32 mantissa; + s32 val; + + if (mode) { + s32 parameter = (mode & 0x1f); + exponent = (parameter & 0x10) ? - ((32 - parameter) & 0xf) : (parameter & 0xf); + mantissa = (u16) value; + } else { + exponent = ((s16)value) >> 11; + mantissa = ((s16)((value & 0x7ff) << 5)) >> 5; + } + + val = mantissa; + + if (reg != PMBUS_READ_FAN1 && reg != PMBUS_READ_FAN2 && reg != PMBUS_FAN_PWM) + val = val * 1000; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +static void get_vout_mode(struct i2c_client *client, s32 clean) +{ + struct psu_data *data = i2c_get_clientdata(client); + s32 read = 0, trys = 0; + + if (clean) { + data->vout_mode = 0; + return; + } + + if (data->vout_mode) + return; + + while (trys <= retrys) { + read = i2c_smbus_read_byte_data(client, PMBUS_VOUT_MODE); + if (read < 0) { + trys++; + if (trys > retrys) + return; + continue; + } + break; + } + + data->vout_mode = read; +} + +static ssize_t read_voltage_out(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 vout = 0, trys = 0; + + while (trys <= retrys) { + + vout = i2c_smbus_read_word_data(client, PMBUS_READ_VOUT); + if (vout < 0) { + trys++; + if (trys > retrys) goto fail; + get_vout_mode(client, 1); + continue; + } + + get_vout_mode(client, 0); + + break; + } + + data->vout = reg2data_linear(vout, data->vout_mode, PMBUS_READ_VOUT); + + return sprintf(buf, "%d\n", data->vout); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_voltage_in(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 vin = 0, trys = 0; + + while (trys <= retrys) { + + vin = i2c_smbus_read_word_data(client, PMBUS_READ_VIN); + if (vin < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->vin = reg2data_linear(vin, 0, PMBUS_READ_VIN); + + return sprintf(buf, "%d\n", data->vin); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_current_in(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 cin = 0, trys = 0; + + while (trys <= retrys) { + + cin = i2c_smbus_read_word_data(client, PMBUS_READ_IIN); + if (cin < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->cin = reg2data_linear(cin, 0, PMBUS_READ_IIN); + + return sprintf(buf, "%d\n", data->cin); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_current_out(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 cout = 0, trys = 0; + + while (trys <= retrys) { + + cout = i2c_smbus_read_word_data(client, PMBUS_READ_IOUT); + if (cout < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->cout = reg2data_linear(cout, 0, PMBUS_READ_IOUT); + + return sprintf(buf, "%d\n", data->cout); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_power_in(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 pin = 0, trys = 0; + + while (trys <= retrys) { + + pin = i2c_smbus_read_word_data(client, PMBUS_READ_PIN); + if (pin < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->pin = reg2data_linear(pin, 0, PMBUS_READ_PIN); + + return sprintf(buf, "%d\n", data->pin); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_power_out(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 pout = 0, trys = 0; + + while (trys <= retrys) { + + pout = i2c_smbus_read_word_data(client, PMBUS_READ_POUT); + if (pout < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->pout = reg2data_linear(pout, 0, PMBUS_READ_POUT); + + return sprintf(buf, "%d\n", data->pout); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_temp(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + u8 nr = attr->index; + + while (trys <= retrys) { + + temp = i2c_smbus_read_word_data(client, PMBUS_READ_TEMP1 + nr); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->temp[nr] = reg2data_linear(temp, 0, PMBUS_READ_TEMP1 + nr); + + return sprintf(buf, "%d\n", data->temp[nr]); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_fan(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 rpm = 0, trys = 0; + u8 nr = attr->index; + + while (trys <= retrys) { + + rpm = i2c_smbus_read_word_data(client, PMBUS_READ_FAN1 + nr); + if (rpm < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->rpm[nr] = reg2data_linear(rpm, 0, PMBUS_READ_FAN1 + nr); + + return sprintf(buf, "%d\n", data->rpm[nr]); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_pwm(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 pwm = 0, trys = 0; + + while (trys <= retrys) { + + pwm = i2c_smbus_read_word_data(client, PMBUS_FAN_PWM); + if (pwm < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->pwm = reg2data_linear(pwm, 0, PMBUS_FAN_PWM); + + return sprintf(buf, "%d\n", data->pwm); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + u16 pwm = simple_strtol(buf, NULL, 10); + if(pwm > 100) pwm = 100; + + while (trys <= retrys) { + + temp = i2c_smbus_write_word_data(client, PMBUS_FAN_PWM, pwm); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->pwm = pwm; + + return count; + +fail: + return -1; +} + +static ssize_t read_mfr_id(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->id[0] != 0) + return sprintf(buf, "%s\n", &data->id[1]); + + while (trys <= retrys) { + + temp = i2c_smbus_read_i2c_block_data(client, PMBUS_READ_MFR_ID, I2C_SMBUS_BLOCK_MAX, data->id); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + if(data->id[0]id[data->id[0]+1] = 0; + return sprintf(buf, "%s\n", &data->id[1]); + +fail: + memset(data->id, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_model(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->model[0] != 0) + return sprintf(buf, "%s\n", &data->model[1]); + + while (trys <= retrys) { + + temp = i2c_smbus_read_i2c_block_data(client, PMBUS_READ_MFR_MODEL, I2C_SMBUS_BLOCK_MAX, data->model); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + if(data->model[0]model[data->model[0]+1] = 0; + return sprintf(buf, "%s\n", &data->model[1]); + +fail: + memset(data->model, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_revision(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->revision[0] != 0) + return sprintf(buf, "%s\n", &data->revision[1]); + + while (trys <= retrys) { + + temp = i2c_smbus_read_i2c_block_data(client, PMBUS_READ_MFR_REV, I2C_SMBUS_BLOCK_MAX, data->revision); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + if(data->revision[0]revision[data->revision[0]+1] = 0; + return sprintf(buf, "%s\n", &data->revision[1]); + +fail: + memset(data->revision, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_location(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->location[0] != 0) + return sprintf(buf, "%s\n", &data->location[1]); + + while (trys <= retrys) { + + temp = i2c_smbus_read_i2c_block_data(client, PMBUS_READ_MFR_LOC, I2C_SMBUS_BLOCK_MAX, data->location); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + if(data->location[0]location[data->location[0]+1] = 0; + return sprintf(buf, "%s\n", &data->location[1]); + +fail: + memset(data->location, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_date(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->date[0] != 0) + return sprintf(buf, "%s\n", &data->date[1]); + + while (trys <= retrys) { + + temp = i2c_smbus_read_i2c_block_data(client, PMBUS_READ_MFR_DATE, I2C_SMBUS_BLOCK_MAX, data->date); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + if(data->date[0]date[data->date[0]+1] = 0; + return sprintf(buf, "%s\n", &data->date[1]); + +fail: + memset(data->date, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_sn(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->serial[0] != 0) + return sprintf(buf, "%s\n", &data->serial[1]); + + while (trys <= retrys) { + + temp = i2c_smbus_read_i2c_block_data(client, PMBUS_READ_MFR_SERIAL, I2C_SMBUS_BLOCK_MAX, data->serial); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + if(data->serial[0]serial[data->serial[0]+1] = 0; + return sprintf(buf, "%s\n", &data->serial[1]); + +fail: + memset(data->serial, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, read_voltage_in, 0, 0); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, read_voltage_out, 0, 0); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, read_current_in, 0, 0); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, read_current_out, 0, 0); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, read_power_in, 0, 0); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, read_power_out, 0, 0); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, read_temp, 0, 0); +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, read_temp, 0, 1); +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, read_temp, 0, 2); +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, read_fan, 0, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, read_fan, 0, 1); +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, read_pwm, set_pwm, 0); +static SENSOR_DEVICE_ATTR(mfr_id, S_IRUGO, read_mfr_id, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_model, S_IRUGO, read_mfr_model, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_revision, S_IRUGO, read_mfr_revision, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_location, S_IRUGO, read_mfr_location, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_date, S_IRUGO, read_mfr_date, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_serial_number, S_IRUGO, read_mfr_sn, 0, 0); + +static struct attribute *psu_attributes[] = { + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_mfr_id.dev_attr.attr, + &sensor_dev_attr_mfr_model.dev_attr.attr, + &sensor_dev_attr_mfr_revision.dev_attr.attr, + &sensor_dev_attr_mfr_location.dev_attr.attr, + &sensor_dev_attr_mfr_date.dev_attr.attr, + &sensor_dev_attr_mfr_serial_number.dev_attr.attr, + NULL +}; + +static const struct attribute_group psu_group = { + .attrs = psu_attributes, +}; + +/*-----------------------------------------------------------------------*/ +/* device probe and removal */ +static int +inv_psu_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct psu_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &psu_group); + + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &psu_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int inv_psu_remove(struct i2c_client *client) +{ + struct psu_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &psu_group); + hwmon_device_unregister(data->hwmon_dev); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id inv_psu_ids[] = { + { "inv_psu" , 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, inv_psu_ids); + +static struct i2c_driver psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_psu", + }, + .probe = inv_psu_probe, + .remove = inv_psu_remove, + .id_table = inv_psu_ids, +}; + +static int __init inv_psu_init(void) +{ + return i2c_add_driver(&psu_driver); +} + +static void __exit inv_psu_exit(void) +{ + i2c_del_driver(&psu_driver); +} + +MODULE_AUTHOR("Roger Chang "); +MODULE_DESCRIPTION("inventec psu driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_psu_init); +module_exit(inv_psu_exit); + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_swps.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_swps.c new file mode 100644 index 00000000000..c996380377d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_swps.c @@ -0,0 +1,3977 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "inv_swps.h" +#include "sff_io.h" +static int ctl_major; +static int port_major; +static int ioexp_total; +static int port_total; +static int block_polling; +static int auto_config; +static int flag_i2c_reset; +static int flag_mod_state; +static unsigned gpio_rest_mux; +static struct class *swp_class_p = NULL; +static struct inv_platform_s *platform_p = NULL; +static struct inv_ioexp_layout_s *ioexp_layout = NULL; +static struct inv_port_layout_s *port_layout = NULL; +int io_no_init = 0; +module_param(io_no_init, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP); +static void swp_polling_worker(struct work_struct *work); +static DECLARE_DELAYED_WORK(swp_polling, swp_polling_worker); + +static int reset_i2c_topology(void); +static int scan_100ms = 0; +#define PROCESS_TIME (3) +static int process_scan = 0; +#define IOEXP_CHECK_TIME (10) /*100ms * PROCESS_TIME(3) * 1 = >~ 5s*/ +static int transvr_minor_curr = 0; + +static int +__swp_match(struct device *dev, +#ifdef SWPS_KERN_VER_AF_3_10 + + const void *data){ +#else + void *data){ +#endif + + char *name = (char *)data; + if (strcmp(dev_name(dev), name) == 0) + return 1; + return 0; +} + + +struct device * +get_swpdev_by_name(char *name){ + struct device *dev = class_find_device(swp_class_p, + NULL, + name, + __swp_match); + return dev; +} + + +static int +sscanf_2_int(const char *buf) { + + int result = -EBFONT; + char *hex_tag = "0x"; + + if (strcspn(buf, hex_tag) == 0) { + if (sscanf(buf,"%x",&result)) { + return result; + } + } else { + if (sscanf(buf,"%d",&result)) { + return result; + } + if(sscanf(buf,"-%d",&result)) { + return -result; + } + if (sscanf(buf,"%x",&result)) { + return result; + } + } + return -EBFONT; +} + + +static int +sscanf_2_binary(const char *buf) { + + int result = sscanf_2_int(buf); + + if (result < 0){ + return -EBFONT; + } + switch (result) { + case 0: + case 1: + return result; + default: + break; + } + return -EBFONT; +} + + +static int +_get_polling_period(void) { + + int retval = 0; + + if (SWP_POLLING_PERIOD == 0) { + return 0; + } + retval = ((SWP_POLLING_PERIOD * HZ) / 1000); + if (retval == 0) { + return 1; + } + return retval; +} + + +static struct transvr_obj_s * +_get_transvr_obj(char *dev_name) { + + struct device *dev_p = NULL; + struct transvr_obj_s *transvr_obj_p = NULL; + + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + return NULL; + } + transvr_obj_p = dev_get_drvdata(dev_p); + if (!transvr_obj_p){ + return NULL; + } + return transvr_obj_p; +} + + +static int +_is_i2c_target_exist(int chan, int addr) { + /* retval: Exist = 1 / Not exist = 0 / Error < 0 + */ + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + int retval = -1; + int err = -1; + int d_offs = 0; + + adap = i2c_get_adapter(chan); + if (!adap) { + SWPS_DEBUG("%s: can't get adapter\n", __func__); + retval = 0; + goto out_is_i2c_target_exist_1; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client) { + SWPS_ERR("%s: kzalloc fail\n", __func__); + retval = -1; + goto out_is_i2c_target_exist_2; + } + client->adapter = adap; + client->addr = addr; + err = i2c_smbus_read_byte_data(client, d_offs); + if (err < 0) { + retval = 0; + } else { + retval = 1; + } + i2c_put_adapter(adap); + kfree(client); + return retval; + +out_is_i2c_target_exist_2: + i2c_put_adapter(adap); +out_is_i2c_target_exist_1: + return retval; +} + + +static void +unlock_tobj_all(void) { + + struct transvr_obj_s *tobj_p; + char port_name[32]; + int port_id = 0; + int minor_curr = 0; + + for (minor_curr=0; minor_currauto_config = auto_config; + unlock_transvr_obj(tobj_p); + SWPS_DEBUG("%s: Set %s auto_config=%d\n", + __func__, tobj_p->swp_name, auto_config); + } + return retval; +} + + +/* ========== R/W Functions module control attribute ========== + */ +static ssize_t +show_attr_platform(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 32, "%s\n", platform_p->name); +} + + +static ssize_t +show_attr_version(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, PAGE_SIZE, "%s\n", SWP_VERSION); +} + + +static ssize_t +show_attr_status(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", flag_mod_state); +} + + +static ssize_t +show_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", auto_config); +} + + +static ssize_t +show_attr_block_poll(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", block_polling); +} +static ssize_t +show_attr_io_no_init(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", io_no_init); +} + + +static int +_check_reset_pwd(const char *buf_p, + size_t count) { + + int in_max = 64; + int in_len = (int)count; + char in_val[64] = "ERR"; + char *emsg = "ERR"; + + if (in_len >= in_max) { + emsg = "input too much"; + goto err_check_reset_pwd; + } + if (!sscanf(buf_p,"%s",in_val)) { + emsg = "format incorrect"; + goto err_check_reset_pwd; + } + if (strcmp(in_val, SWP_RESET_PWD) != 0) { + emsg = "password incorrect"; + goto err_check_reset_pwd; + } + return 0; + +err_check_reset_pwd: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} + + +static ssize_t +store_attr_reset_i2c(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + /* Polling mode */ + if (SWP_POLLING_ENABLE) { + SWPS_INFO("%s: reset I2C :polling\n", __func__); + flag_i2c_reset = 1; + return count; + } + /* Direct mode */ + SWPS_INFO("%s: reset I2C go. :direct\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset fail!\n", __func__); + return -EIO; + } + SWPS_INFO("%s: reset I2C ok. :direct\n", __func__); + return count; +} + + +static ssize_t +store_attr_reset_swps(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p; + char port_name[32] = "ERR"; + int port_id = 0; + int minor_curr = 0; + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + for (minor_curr=0; minor_currstate = STATE_TRANSVR_DISCONNECTED; + unlock_transvr_obj(tobj_p); + SWPS_INFO("%s: reset:%s\n", __func__, tobj_p->swp_name); + } + return count; +} + + +static ssize_t +store_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if (input_val < 0){ + return -EBFONT; + } + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + auto_config = input_val; + _update_auto_config_2_trnasvr(); + return count; +} + + +static ssize_t +store_attr_block_poll( struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if (input_val < 0){ + return -EBFONT; + } + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + + if(input_val != block_polling){ + block_polling = input_val; + if(block_polling){ + cancel_delayed_work_sync(&swp_polling); + } + else{ + schedule_delayed_work(&swp_polling, _get_polling_period()); + } + } + + return count; +} + +static ssize_t +store_attr_io_no_init( struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + + if(input_val != io_no_init){ + io_no_init = input_val; + } + + return count; +} + +/* ========== Show functions: For transceiver attribute ========== + */ +static ssize_t +_show_transvr_hex_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + int result; + + lock_transvr_obj(tobj_p); + result = get_func(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 8, "%d\n", result); + } else { + len = snprintf(buf_p, 8, "0x%02x\n", result); + } + return len; +} + + +static ssize_t +_show_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = snprintf(buf_p, 16, "%d\n", get_func(tobj_p)); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +_show_transvr_str_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p, char* buf), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = get_func(tobj_p, buf_p); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +show_attr_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_id, + buf_p); +} + + +static ssize_t +show_attr_ext_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_ext_id, + buf_p); +} + + +static ssize_t +show_attr_connector(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_connector, + buf_p); +} + + +static ssize_t +show_attr_vendor_name(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_name, + buf_p); +} + + +static ssize_t +show_attr_vendor_pn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_pn, + buf_p); +} + + +static ssize_t +show_attr_vendor_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_rev, + buf_p); +} + + +static ssize_t +show_attr_vendor_sn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_sn, + buf_p); +} + + +static ssize_t +show_attr_power_cls(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + size_t len; + int result; + struct transvr_obj_s *tobj_p; + + tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + lock_transvr_obj(tobj_p); + result = tobj_p->get_power_cls(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 16, "%d\n", result); + } else { + len = snprintf(buf_p, 16, "Power Class %d\n", result); + } + return len; +} + + +static ssize_t +show_attr_br(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_br, + buf_p); +} + + +static ssize_t +show_attr_len_sm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_sm, + buf_p); +} + + +static ssize_t +show_attr_len_smf(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_smf, + buf_p); +} + + +static ssize_t +show_attr_len_om1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om1, + buf_p); +} + + +static ssize_t +show_attr_len_om2(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om2, + buf_p); +} + + +static ssize_t +show_attr_len_om3(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om3, + buf_p); +} + + +static ssize_t +show_attr_len_om4(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om4, + buf_p); +} + + +static ssize_t +show_attr_comp_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_rev, + buf_p); +} + + +static ssize_t +show_attr_comp_eth(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_1, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10_40(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10_40, + buf_p); +} + + +static ssize_t +show_attr_comp_extend(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_extend, + buf_p); +} + + +static ssize_t +show_attr_rate_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_rate_id, + buf_p); +} + + +static ssize_t +show_attr_temperature(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_temp, + buf_p); +} + + +static ssize_t +show_attr_voltage(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_vol, + buf_p); +} + + +static ssize_t +show_attr_tx_bias(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_bias, + buf_p); +} + + +static ssize_t +show_attr_tx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power, + buf_p); +} + + +static ssize_t +show_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_eq, + buf_p); +} + + +static ssize_t +show_attr_rx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power, + buf_p); +} + + +static ssize_t +show_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_am, + buf_p); +} + + +static ssize_t +show_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_em, + buf_p); +} + + +static ssize_t +show_attr_wavelength(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_wavelength, + buf_p); +} + + +static ssize_t +show_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_offset, + buf_p); +} + + +static ssize_t +show_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_reg, + buf_p); +} + + +static ssize_t +show_attr_info(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_info, + buf_p); +} + + +static ssize_t +show_attr_if_type(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_type, + buf_p); +} + + +static ssize_t +show_attr_if_speed(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_speed, + buf_p); +} + + +static ssize_t +show_attr_if_lane(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_lane, + buf_p); +} + + +static ssize_t +show_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_cdr, + buf_p); +} + + +static ssize_t +show_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs0, + buf_p); +} + + +static ssize_t +show_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs1, + buf_p); +} + + +static ssize_t +show_attr_soft_rx_los(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_rx_los, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_auto_tx_disable, + buf_p); +} + +static ssize_t +show_attr_eeprom(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_eeprom, + buf_p); +} + +static ssize_t +show_attr_eeprom_a0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_eeprom_a0, + buf_p); +} + +static ssize_t +show_attr_eeprom_a2(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_eeprom_a2, + buf_p); +} + +static ssize_t +show_attr_eeprom_page03(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_eeprom_page03, + buf_p); +} + +static ssize_t +show_attr_temp_high_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_temp_high_alarm, + buf_p); +} + +static ssize_t +show_attr_temp_low_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_temp_low_alarm, + buf_p); +} + +static ssize_t +show_attr_voltage_high_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_voltage_high_alarm, + buf_p); +} + +static ssize_t +show_attr_voltage_low_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_voltage_low_alarm, + buf_p); +} + +static ssize_t +show_attr_bias_high_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_bias_high_alarm, + buf_p); +} + +static ssize_t +show_attr_bias_low_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_bias_low_alarm, + buf_p); +} + +static ssize_t +show_attr_rx_power_high_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power_high_alarm, + buf_p); +} + +static ssize_t +show_attr_rx_power_low_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power_low_alarm, + buf_p); +} + +static ssize_t +show_attr_tx_power_high_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power_high_alarm, + buf_p); +} + +static ssize_t +show_attr_tx_power_low_alarm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power_low_alarm, + buf_p); +} + +static ssize_t +show_attr_temp_high_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_temp_high_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_temp_low_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_temp_low_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_voltage_high_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_voltage_high_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_voltage_low_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_voltage_low_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_bias_high_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_bias_high_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_bias_low_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_bias_low_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_rx_power_high_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power_high_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_rx_power_low_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power_low_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_tx_power_high_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power_high_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_tx_power_low_alarm_threshold(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power_low_alarm_threshold, + buf_p); +} + +static ssize_t +show_attr_manufacturing_date(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_manufacturing_date, + buf_p); +} +/* ========== Store functions: transceiver (R/W) attribute ========== + */ +static ssize_t +_store_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_byte_hex_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if ((input < 0) || (input > 0xff)){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_binary_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_binary(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_cdr, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs1, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int check = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((check < 0) || (check > 0xf)){ + return -EBFONT; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_soft_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int err = -EPERM; + int input = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((input < 0) || (input > 0xf)){ + if (input != VAL_TRANSVR_FUNCTION_DISABLE) { + return -EBFONT; + } + } + lock_transvr_obj(tobj_p); + err = tobj_p->set_auto_tx_disable(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_tx_eq, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_am, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_em, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_offset, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_reg, + buf_p, + count); +} + +/* ========== Show functions: For I/O Expander attribute ========== + */ +static ssize_t +_show_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*get_func)(struct ioexp_obj_s *ioexp_p, int voffset), + char *buf_p) { + size_t len; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR(" %s: data corruption! :%s\n", __func__, tobj_p->swp_name); + return -ENODATA; + } + mutex_lock(&ioexp_p->lock); + len = snprintf(buf_p, 8, "%d\n", get_func(ioexp_p, tobj_p->ioexp_virt_offset)); + mutex_unlock(&ioexp_p->lock); + return len; +} + + +static ssize_t +show_attr_present(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + int data = 0; + size_t len; + if (!tobj_p){ + return -ENODEV; + } + data = present_st_get(tobj_p->port_id); + len = snprintf(buf_p, PAGE_SIZE, "%d\n", data); + return len; +#if 0 + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_present, + buf_p); +#endif + +} + + +static ssize_t +show_attr_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + int data = 0; + int len; + if (!tobj_p){ + return -ENODEV; + } + + data = txfault_get(tobj_p->port_id); + len = snprintf(buf_p, PAGE_SIZE, "%d\n", data); + return len; +#if 0 + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_fault, + buf_p); +#endif +} + + +static ssize_t +show_attr_rxlos(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + int data = 0; + int len; + if (!tobj_p){ + return -ENODEV; + } + + data = rxlos_get(tobj_p->port_id); + len = snprintf(buf_p, PAGE_SIZE, "%d\n", data); + return len; +#if 0 + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_rxlos, + buf_p); +#endif +} + + +static ssize_t +show_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_reset, + buf_p); +} + + +static ssize_t +show_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_lpmod, + buf_p); +} + + +static ssize_t +show_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_modsel, + buf_p); +} + + +static ssize_t +show_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs0, + buf_p); +} + + +static ssize_t +show_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs1, + buf_p); +} + + +/* ========== Store functions: For I/O Expander (R/W) attribute ========== + */ +static ssize_t +_store_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*set_func)(struct ioexp_obj_s *ioexp_p, + int virt_offset, int input_val), + const char *buf_p, + size_t count) { + + int input, err; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR("%s: data corruption! :%s\n", + __func__, tobj_p->swp_name); + return -ENODATA; + } + input = sscanf_2_binary(buf_p); + if (input < 0) { + return -EBFONT; + } + mutex_lock(&ioexp_p->lock); + err = set_func(ioexp_p, tobj_p->ioexp_virt_offset, input); + mutex_unlock(&ioexp_p->lock); + if (err < 0){ + return err; + } + return count; +} + +static ssize_t +store_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_reset, + buf_p, + count); +} + + +static ssize_t +store_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_lpmod, + buf_p, + count); +} + + +static ssize_t +store_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_modsel, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs1, + buf_p, + count); +} + + +/* ========== SWPS attribute: For module control ========== + */ +static DEVICE_ATTR(platform, S_IRUGO, show_attr_platform, NULL); +static DEVICE_ATTR(version, S_IRUGO, show_attr_version, NULL); +static DEVICE_ATTR(status, S_IRUGO, show_attr_status, NULL); +static DEVICE_ATTR(reset_i2c, S_IWUSR, NULL, store_attr_reset_i2c); +static DEVICE_ATTR(reset_swps, S_IWUSR, NULL, store_attr_reset_swps); +static DEVICE_ATTR(auto_config, S_IRUGO|S_IWUSR, show_attr_auto_config, store_attr_auto_config); +static DEVICE_ATTR(block_poll, S_IRUGO|S_IWUSR, show_attr_block_poll, store_attr_block_poll); +static DEVICE_ATTR(io_no_init, S_IRUGO|S_IWUSR, show_attr_io_no_init, store_attr_io_no_init); + + +/* ========== Transceiver attribute: from eeprom ========== + */ +static DEVICE_ATTR(id, S_IRUGO, show_attr_id, NULL); +static DEVICE_ATTR(ext_id, S_IRUGO, show_attr_ext_id, NULL); +static DEVICE_ATTR(connector, S_IRUGO, show_attr_connector, NULL); +static DEVICE_ATTR(vendor_name, S_IRUGO, show_attr_vendor_name, NULL); +static DEVICE_ATTR(vendor_pn, S_IRUGO, show_attr_vendor_pn, NULL); +static DEVICE_ATTR(vendor_rev, S_IRUGO, show_attr_vendor_rev, NULL); +static DEVICE_ATTR(vendor_sn, S_IRUGO, show_attr_vendor_sn, NULL); +static DEVICE_ATTR(power_cls, S_IRUGO, show_attr_power_cls, NULL); +static DEVICE_ATTR(br, S_IRUGO, show_attr_br, NULL); +static DEVICE_ATTR(len_sm, S_IRUGO, show_attr_len_sm, NULL); +static DEVICE_ATTR(len_smf, S_IRUGO, show_attr_len_smf, NULL); +static DEVICE_ATTR(len_om1, S_IRUGO, show_attr_len_om1, NULL); +static DEVICE_ATTR(len_om2, S_IRUGO, show_attr_len_om2, NULL); +static DEVICE_ATTR(len_om3, S_IRUGO, show_attr_len_om3, NULL); +static DEVICE_ATTR(len_om4, S_IRUGO, show_attr_len_om4, NULL); +static DEVICE_ATTR(comp_rev, S_IRUGO, show_attr_comp_rev, NULL); +static DEVICE_ATTR(comp_eth, S_IRUGO, show_attr_comp_eth, NULL); +static DEVICE_ATTR(comp_eth_10, S_IRUGO, show_attr_comp_eth_10, NULL); +static DEVICE_ATTR(comp_eth_10_40, S_IRUGO, show_attr_comp_eth_10_40, NULL); +static DEVICE_ATTR(comp_extend, S_IRUGO, show_attr_comp_extend, NULL); +static DEVICE_ATTR(rate_id, S_IRUGO, show_attr_rate_id, NULL); +static DEVICE_ATTR(temperature, S_IRUGO, show_attr_temperature, NULL); +static DEVICE_ATTR(voltage, S_IRUGO, show_attr_voltage, NULL); +static DEVICE_ATTR(bias, S_IRUGO, show_attr_tx_bias, NULL); +static DEVICE_ATTR(tx_power, S_IRUGO, show_attr_tx_power, NULL); +static DEVICE_ATTR(rx_power, S_IRUGO, show_attr_rx_power, NULL); +static DEVICE_ATTR(info, S_IRUGO, show_attr_info, NULL); +static DEVICE_ATTR(if_type, S_IRUGO, show_attr_if_type, NULL); +static DEVICE_ATTR(if_speed, S_IRUGO, show_attr_if_speed, NULL); +static DEVICE_ATTR(if_lane, S_IRUGO, show_attr_if_lane, NULL); +static DEVICE_ATTR(soft_tx_fault, S_IRUGO, show_attr_soft_tx_fault, NULL); +static DEVICE_ATTR(wavelength, S_IRUGO, show_attr_wavelength, NULL); +static DEVICE_ATTR(eeprom, S_IRUGO, show_attr_eeprom, NULL); +static DEVICE_ATTR(A0, S_IRUGO, show_attr_eeprom_a0, NULL); +static DEVICE_ATTR(A2, S_IRUGO, show_attr_eeprom_a2, NULL); +static DEVICE_ATTR(Page00, S_IRUGO, show_attr_eeprom, NULL); +static DEVICE_ATTR(Page03, S_IRUGO, show_attr_eeprom_page03, NULL); +static DEVICE_ATTR(soft_rx_los_signal, S_IRUGO, show_attr_soft_rx_los, NULL); +static DEVICE_ATTR(temperature_high_alarm, S_IRUGO, show_attr_temp_high_alarm, NULL); +static DEVICE_ATTR(temperature_low_alarm, S_IRUGO, show_attr_temp_low_alarm, NULL); +static DEVICE_ATTR(voltage_high_alarm, S_IRUGO, show_attr_voltage_high_alarm, NULL); +static DEVICE_ATTR(voltage_low_alarm, S_IRUGO, show_attr_voltage_low_alarm, NULL); +static DEVICE_ATTR(bias_high_alarm, S_IRUGO, show_attr_bias_high_alarm, NULL); +static DEVICE_ATTR(bias_low_alarm, S_IRUGO, show_attr_bias_low_alarm, NULL); +static DEVICE_ATTR(rx_power_high_alarm, S_IRUGO, show_attr_rx_power_high_alarm, NULL); +static DEVICE_ATTR(rx_power_low_alarm, S_IRUGO, show_attr_rx_power_low_alarm, NULL); +static DEVICE_ATTR(tx_power_high_alarm, S_IRUGO, show_attr_tx_power_high_alarm, NULL); +static DEVICE_ATTR(tx_power_low_alarm, S_IRUGO, show_attr_tx_power_low_alarm, NULL); +static DEVICE_ATTR(temperature_high_threshold, S_IRUGO, show_attr_temp_high_alarm_threshold, NULL); +static DEVICE_ATTR(temperature_low_threshold, S_IRUGO, show_attr_temp_low_alarm_threshold, NULL); +static DEVICE_ATTR(voltage_high_threshold, S_IRUGO, show_attr_voltage_high_alarm_threshold, NULL); +static DEVICE_ATTR(voltage_low_threshold, S_IRUGO, show_attr_voltage_low_alarm_threshold, NULL); +static DEVICE_ATTR(bias_high_threshold, S_IRUGO, show_attr_bias_high_alarm_threshold, NULL); +static DEVICE_ATTR(bias_low_threshold, S_IRUGO, show_attr_bias_low_alarm_threshold, NULL); +static DEVICE_ATTR(rx_power_high_threshold, S_IRUGO, show_attr_rx_power_high_alarm_threshold, NULL); +static DEVICE_ATTR(rx_power_low_threshold, S_IRUGO, show_attr_rx_power_low_alarm_threshold, NULL); +static DEVICE_ATTR(tx_power_high_threshold, S_IRUGO, show_attr_tx_power_high_alarm_threshold, NULL); +static DEVICE_ATTR(tx_power_low_threshold, S_IRUGO, show_attr_tx_power_low_alarm_threshold, NULL); +static DEVICE_ATTR(manufacturing_date, S_IRUGO, show_attr_manufacturing_date, NULL); +static DEVICE_ATTR(tx_eq, S_IRUGO|S_IWUSR, show_attr_tx_eq, store_attr_tx_eq); +static DEVICE_ATTR(rx_am, S_IRUGO|S_IWUSR, show_attr_rx_am, store_attr_rx_am); +static DEVICE_ATTR(rx_em, S_IRUGO|S_IWUSR, show_attr_rx_em, store_attr_rx_em); +static DEVICE_ATTR(cdr, S_IRUGO|S_IWUSR, show_attr_cdr, store_attr_cdr); +static DEVICE_ATTR(soft_rs0, S_IRUGO|S_IWUSR, show_attr_soft_rs0, store_attr_soft_rs0); +static DEVICE_ATTR(soft_rs1, S_IRUGO|S_IWUSR, show_attr_soft_rs1, store_attr_soft_rs1); +static DEVICE_ATTR(soft_tx_disable, S_IRUGO|S_IWUSR, show_attr_soft_tx_disable, store_attr_soft_tx_disable); +static DEVICE_ATTR(auto_tx_disable, S_IRUGO|S_IWUSR, show_attr_auto_tx_disable, store_attr_auto_tx_disable); +static DEVICE_ATTR(extphy_offset, S_IRUGO|S_IWUSR, show_attr_extphy_offset, store_attr_extphy_offset); +static DEVICE_ATTR(extphy_reg, S_IRUGO|S_IWUSR, show_attr_extphy_reg, store_attr_extphy_reg); + +/* ========== IO Expander attribute: from expander ========== + */ +static DEVICE_ATTR(present, S_IRUGO, show_attr_present, NULL); +static DEVICE_ATTR(hard_tx_fault, S_IRUGO, show_attr_tx_fault, NULL); +static DEVICE_ATTR(hard_rx_loss_signal, S_IRUGO, show_attr_rxlos, NULL); +static DEVICE_ATTR(tx_disable, S_IRUGO|S_IWUSR, show_attr_tx_disable, store_attr_tx_disable); +static DEVICE_ATTR(reset, S_IRUGO|S_IWUSR, show_attr_reset, store_attr_reset); +static DEVICE_ATTR(lpmod, S_IRUGO|S_IWUSR, show_attr_lpmod, store_attr_lpmod); +static DEVICE_ATTR(modsel, S_IRUGO|S_IWUSR, show_attr_modsel, store_attr_modsel); +static DEVICE_ATTR(hard_rs0, S_IRUGO|S_IWUSR, show_attr_hard_rs0, store_attr_hard_rs0); +static DEVICE_ATTR(hard_rs1, S_IRUGO|S_IWUSR, show_attr_hard_rs1, store_attr_hard_rs1); + +/* ========== Functions for module handling ========== + */ +static void +clean_port_objs(void){ + + dev_t dev_num; + char dev_name[32]; + struct device *device_p; + struct transvr_obj_s *tobj_p; + int minor_curr, port_id; + + for (minor_curr=0; minor_curri2c_client_p) { + i2c_put_adapter(tobj_p->i2c_client_p->adapter); + kfree(tobj_p->i2c_client_p); + } + kfree(tobj_p->vendor_name); + kfree(tobj_p->vendor_pn); + kfree(tobj_p->vendor_rev); + kfree(tobj_p->vendor_sn); + kfree(tobj_p->worker_p); + kfree(tobj_p); + } + dev_num = MKDEV(port_major, minor_curr); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static void +clean_swps_common(void){ + + dev_t dev_num; + struct device *device_p; + + device_p = get_swpdev_by_name(SWP_DEV_MODCTL); + if (device_p){ + dev_num = MKDEV(ctl_major, 1); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + cancel_delayed_work_sync(&swp_polling); + if (platform_p) { + kfree(platform_p); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static int +get_platform_type(void){ + + int i, tmp; + int auto_chan = -1; + int auto_addr = -1; + int pf_total = ARRAY_SIZE(platform_map); + char log_msg[64] = "ERROR"; + + platform_p = kzalloc(sizeof(struct inv_platform_s), GFP_KERNEL); + if (!platform_p){ + snprintf(log_msg, sizeof(log_msg), "kzalloc fail"); + goto err_get_platform_type_1; + } + memset(platform_p->name, 0, sizeof(platform_p->name)); + + switch (PLATFORM_SETTINGS) { + case PLATFORM_TYPE_AUTO: + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", dmi_get_system_info(DMI_BOARD_NAME)); + for (i=0; iname, platform_map[i].name) == 0) { + platform_p->id = platform_map[i].id; + snprintf(log_msg, sizeof(log_msg), + "Auto detect platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Auto detect fail! detect platform: %s", + platform_p->name); + goto err_get_platform_type_2; + + case PLATFORM_TYPE_PEONY_AUTO: +#ifdef SWPS_PEONY_SFP + auto_chan = peony_sfp_ioexp_layout[0].addr[0].chan_id; + auto_addr = peony_sfp_ioexp_layout[0].addr[0].chip_addr; +#endif + tmp = _is_i2c_target_exist(auto_chan, auto_addr); + switch (tmp) { + case 0: /* Copper SKU */ + SWPS_INFO("Auto-detected :Peony :Copper\n"); + platform_p->id = PLATFORM_TYPE_PEONY_COPPER_GA; + goto map_platform_name; + + case 1: /* SFP SKU */ + SWPS_INFO("Auto-detected :Peony :SFP\n"); + platform_p->id = PLATFORM_TYPE_PEONY_SFP_GA; + goto map_platform_name; + + default: + break; + } + snprintf(log_msg, sizeof(log_msg), + "Auto detect Peony SKU fail! :%d", tmp); + goto err_get_platform_type_2; + + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + case PLATFORM_TYPE_REDWOOD: + case PLATFORM_TYPE_REDWOOD_FSL: + case PLATFORM_TYPE_HUDSON32I_GA: + case PLATFORM_TYPE_SPRUCE: + case PLATFORM_TYPE_CYPRESS_GA1: + case PLATFORM_TYPE_CYPRESS_GA2: + case PLATFORM_TYPE_CYPRESS_BAI: + case PLATFORM_TYPE_TAHOE: + case PLATFORM_TYPE_SEQUOIA_GA: + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + case PLATFORM_TYPE_COTTONWOOD_RANGELEY: + case PLATFORM_TYPE_MAPLE_GA: + case PLATFORM_TYPE_MAPLE_B: + case PLATFORM_TYPE_GULMOHAR_GA: + case PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA: + case PLATFORM_TYPE_PEONY_SFP_GA: + case PLATFORM_TYPE_PEONY_COPPER_GA: + platform_p->id = PLATFORM_SETTINGS; + goto map_platform_name; + + default: + break; + } + snprintf(log_msg, sizeof(log_msg), + "PLATFORM_SETTINGS:%d undefined", PLATFORM_SETTINGS); + goto err_get_platform_type_2; + +map_platform_name: + for (i=0; iid == platform_map[i].id) { + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", platform_map[i].name); + snprintf(log_msg, sizeof(log_msg), + "User setup platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Internal error, can not map id:%d", + platform_p->id ); + goto err_get_platform_type_2; + +ok_get_platform_type_1: + SWPS_DEBUG("%s: %s, :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return 0; + +err_get_platform_type_2: + kfree(platform_p); +err_get_platform_type_1: + SWPS_ERR("%s: %s :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return -1; +} + + +static int +get_layout_info(void){ + + switch (platform_p->id) { +#ifdef SWPS_MAGNOLIA + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + gpio_rest_mux = magnolia_gpio_rest_mux; + ioexp_layout = magnolia_ioexp_layout; + port_layout = magnolia_port_layout; + ioexp_total = ARRAY_SIZE(magnolia_ioexp_layout); + port_total = ARRAY_SIZE(magnolia_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD + case PLATFORM_TYPE_REDWOOD: + gpio_rest_mux = redwood_gpio_rest_mux; + ioexp_layout = redwood_ioexp_layout; + port_layout = redwood_port_layout; + ioexp_total = ARRAY_SIZE(redwood_ioexp_layout); + port_total = ARRAY_SIZE(redwood_port_layout); + break; +#endif +#ifdef SWPS_HUDSON32I_GA + case PLATFORM_TYPE_HUDSON32I_GA: + gpio_rest_mux = hudsin32iga_gpio_rest_mux; + ioexp_layout = hudson32iga_ioexp_layout; + port_layout = hudson32iga_port_layout; + ioexp_total = ARRAY_SIZE(hudson32iga_ioexp_layout); + port_total = ARRAY_SIZE(hudson32iga_port_layout); + break; +#endif +#ifdef SWPS_SPRUCE + case PLATFORM_TYPE_SPRUCE: + gpio_rest_mux = spruce_gpio_rest_mux; + ioexp_layout = spruce_ioexp_layout; + port_layout = spruce_port_layout; + ioexp_total = ARRAY_SIZE(spruce_ioexp_layout); + port_total = ARRAY_SIZE(spruce_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA1 + case PLATFORM_TYPE_CYPRESS_GA1: + gpio_rest_mux = cypress_ga1_gpio_rest_mux; + ioexp_layout = cypress_ga1_ioexp_layout; + port_layout = cypress_ga1_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga1_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga1_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA2 + case PLATFORM_TYPE_CYPRESS_GA2: + gpio_rest_mux = cypress_ga2_gpio_rest_mux; + ioexp_layout = cypress_ga2_ioexp_layout; + port_layout = cypress_ga2_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga2_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga2_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_BAI + case PLATFORM_TYPE_CYPRESS_BAI: + gpio_rest_mux = cypress_b_gpio_rest_mux; + ioexp_layout = cypress_b_ioexp_layout; + port_layout = cypress_b_port_layout; + ioexp_total = ARRAY_SIZE(cypress_b_ioexp_layout); + port_total = ARRAY_SIZE(cypress_b_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD_FSL + case PLATFORM_TYPE_REDWOOD_FSL: + gpio_rest_mux = redwood_fsl_gpio_rest_mux; + ioexp_layout = redwood_fsl_ioexp_layout; + port_layout = redwood_fsl_port_layout; + ioexp_total = ARRAY_SIZE(redwood_fsl_ioexp_layout); + port_total = ARRAY_SIZE(redwood_fsl_port_layout); + break; +#endif +#ifdef SWPS_TAHOE + case PLATFORM_TYPE_TAHOE: + gpio_rest_mux = tahoe_gpio_rest_mux; + ioexp_layout = tahoe_ioexp_layout; + port_layout = tahoe_port_layout; + ioexp_total = ARRAY_SIZE(tahoe_ioexp_layout); + port_total = ARRAY_SIZE(tahoe_port_layout); + break; +#endif +#ifdef SWPS_SEQUOIA + case PLATFORM_TYPE_SEQUOIA_GA: + gpio_rest_mux = sequoia_gpio_rest_mux; + ioexp_layout = sequoia_ioexp_layout; + port_layout = sequoia_port_layout; + ioexp_total = ARRAY_SIZE(sequoia_ioexp_layout); + port_total = ARRAY_SIZE(sequoia_port_layout); + break; +#endif +#ifdef SWPS_LAVENDER + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + gpio_rest_mux = lavender_gpio_rest_mux; + ioexp_layout = lavender_ioexp_layout; + port_layout = lavender_port_layout; + ioexp_total = ARRAY_SIZE(lavender_ioexp_layout); + port_total = ARRAY_SIZE(lavender_port_layout); + break; +#endif +#ifdef SWPS_COTTONWOOD_RANGELEY + case PLATFORM_TYPE_COTTONWOOD_RANGELEY: + gpio_rest_mux = cottonwood_rangeley_gpio_rest_mux; + ioexp_layout = cottonwood_rangeley_ioexp_layout; + port_layout = cottonwood_rangeley_port_layout; + ioexp_total = ARRAY_SIZE(cottonwood_rangeley_ioexp_layout); + port_total = ARRAY_SIZE(cottonwood_rangeley_port_layout); + break; +#endif +#ifdef SWPS_MAPLE_GA + case PLATFORM_TYPE_MAPLE_GA: + gpio_rest_mux = maple_ga_gpio_rest_mux; + ioexp_layout = maple_ga_ioexp_layout; + port_layout = maple_ga_port_layout; + ioexp_total = ARRAY_SIZE(maple_ga_ioexp_layout); + port_total = ARRAY_SIZE(maple_ga_port_layout); + break; +#endif +#ifdef SWPS_MAPLE_B + case PLATFORM_TYPE_MAPLE_B: + gpio_rest_mux = maple_b_gpio_rest_mux; + ioexp_layout = maple_b_ioexp_layout; + port_layout = maple_b_port_layout; + ioexp_total = ARRAY_SIZE(maple_b_ioexp_layout); + port_total = ARRAY_SIZE(maple_b_port_layout); + break; +#endif +#ifdef SWPS_GULMOHAR + case PLATFORM_TYPE_GULMOHAR_GA: + gpio_rest_mux = gulmohar_gpio_rest_mux; + ioexp_layout = gulmohar_ioexp_layout; + port_layout = gulmohar_port_layout; + ioexp_total = ARRAY_SIZE(gulmohar_ioexp_layout); + port_total = ARRAY_SIZE(gulmohar_port_layout); + break; +#endif +#ifdef SWPS_GULMOHAR_2T_EVT1 + case PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA: + gpio_rest_mux = gulmohar_2t_evt1_gpio_rest_mux; + ioexp_layout = gulmohar_2t_evt1_ioexp_layout; + port_layout = gulmohar_2t_evt1_port_layout; + ioexp_total = ARRAY_SIZE(gulmohar_2t_evt1_ioexp_layout); + port_total = ARRAY_SIZE(gulmohar_2t_evt1_port_layout); + break; +#endif +#ifdef SWPS_PEONY_SFP + case PLATFORM_TYPE_PEONY_SFP_GA: + gpio_rest_mux = peony_sfp_gpio_rest_mux; + ioexp_layout = peony_sfp_ioexp_layout; + port_layout = peony_sfp_port_layout; + ioexp_total = ARRAY_SIZE(peony_sfp_ioexp_layout); + port_total = ARRAY_SIZE(peony_sfp_port_layout); + break; +#endif +#ifdef SWPS_PEONY_COPPER + case PLATFORM_TYPE_PEONY_COPPER_GA: + gpio_rest_mux = peony_copper_gpio_rest_mux; + ioexp_layout = peony_copper_ioexp_layout; + port_layout = peony_copper_port_layout; + ioexp_total = ARRAY_SIZE(peony_copper_ioexp_layout); + port_total = ARRAY_SIZE(peony_copper_port_layout); + break; +#endif + + default: + SWPS_ERR(" Invalid platform: %d (%s)\n", + platform_p->id, platform_p->name); + return -1; + } + SWPS_INFO("Start to initial platform: %d (%s)\n", + platform_p->id, platform_p->name); + return 0; +} + + +/* ========== Functions for objects operations ========== + */ +static int +__detect_issues_port(int minor_num) { + + struct transvr_obj_s *tobj_p; + int port_id = port_layout[minor_num].port_id; + char port_name[32] = "ERR"; + char *i2c_emsg = "detected bad transceiver/cable"; + + memset(port_name, 0, sizeof(port_name)); + snprintf(port_name, sizeof(port_name), "%s%d", SWP_DEV_PORT, port_id); + tobj_p = _get_transvr_obj(port_name); + if (!tobj_p) { + SWPS_INFO("%s: tobj_p is NULL :%d\n", __func__, minor_num); + return -1; + } + if (resync_channel_tier_2(tobj_p) < 0) { + if (check_channel_tier_1() < 0) { + goto get_target_issues_port; + } + } + /* Re-check again for i2c-gpio special case */ + if (check_channel_tier_1() < 0) { + goto get_target_issues_port; + } + return 0; + +get_target_issues_port: + alarm_msg_2_user(tobj_p, i2c_emsg); + return -2; +} + + +static int +_detect_issues_port(void) { + /* OK : retrun -1; + * Fail: return fail at which minor number (0~N) + */ + char *emsg = "ERR"; + int minor = 0; + int minor_2st = 1; + + /* Force moving the initial channel pointer + * Filter out case of fail at minor-0 port + */ + while (minor_2st < port_total) { + minor = minor_2st; + if (__detect_issues_port(minor_2st) < 0) { + emsg = "detect minor_2st fail"; + goto err_p_detect_issues_port; + } + minor_2st += 8; + } + /* Scan all port */ + for (minor=0; minor:%d\n", __func__, emsg, minor_err); + return -1; +} +static int +transvr_obj_health_mtr(char *dev_name) +{ + + struct transvr_obj_s *tobj_p = NULL; + int retval = -9; + + tobj_p = _get_transvr_obj(dev_name); + if (!tobj_p) { + SWPS_ERR("%s: %s _get_transvr_obj fail\n", + __func__, dev_name); + return -9; + } + /* Check transceiver current status */ + lock_transvr_obj(tobj_p); + retval = transvr_health_mtr(tobj_p); + unlock_transvr_obj(tobj_p); + switch (retval) { + case 0: + case ERR_TRANSVR_UNPLUGGED: + case ERR_TRNASVR_BE_ISOLATED: + case ERR_TRANSVR_TASK_BUSY: + return 0; + + case ERR_TRANSVR_I2C_CRASH: + default: + break; + } + /* Identify abnormal case */ + if (check_channel_tier_1() < 0) { + SWPS_DEBUG("%s: %s critical error :%d\n", + __func__, dev_name, retval); + return -2; + } + SWPS_DEBUG("%s: %s single error :%d\n", + __func__, dev_name, retval); + return -1; + + +} + +static int +check_transvr_obj_one(char *dev_name){ + /* [Return] + * 0 : Doesn't need to take care + * -1 : Single error + * -2 : Critical error (I2C topology die) + * -9 : Internal error + */ + struct transvr_obj_s *tobj_p = NULL; + int retval = -9; + + tobj_p = _get_transvr_obj(dev_name); + if (!tobj_p) { + SWPS_ERR("%s: %s _get_transvr_obj fail\n", + __func__, dev_name); + return -9; + } + /* Check transceiver current status */ + lock_transvr_obj(tobj_p); + retval = tobj_p->check(tobj_p); + unlock_transvr_obj(tobj_p); + switch (retval) { + case 0: + case ERR_TRANSVR_UNPLUGGED: + case ERR_TRNASVR_BE_ISOLATED: + case ERR_TRANSVR_TASK_BUSY: + return 0; + + case ERR_TRANSVR_I2C_CRASH: + default: + break; + } + /* Identify abnormal case */ + if (check_channel_tier_1() < 0) { + SWPS_DEBUG("%s: %s critical error :%d\n", + __func__, dev_name, retval); + return -2; + } + SWPS_DEBUG("%s: %s single error :%d\n", + __func__, dev_name, retval); + return -1; +} +static int +transvr_objs_health_mtr(void) +{ + char dev_name[32]; + int port_id, err_code; +// int minor_curr = 0; + + //for (minor_curr=0; minor_curr:%d\n", + __func__, dev_name, err_code); + break; + } + //} + return 0; + +err_check_transvr_objs: + SWPS_ERR("%s: %s reset_i2c_topology fail.\n", + __func__, dev_name); + return -1; + + + +} + +static int +check_transvr_objs(void){ + + char dev_name[32]; + int port_id, err_code; + int minor_curr = 0; + + for (minor_curr=0; minor_curr:%d\n", + __func__, dev_name, err_code); + break; + } + } + return 0; + +err_check_transvr_objs: + SWPS_ERR("%s: %s reset_i2c_topology fail.\n", + __func__, dev_name); + return -1; +} + + +static void +swp_polling_worker(struct work_struct *work){ + + int next_period = 1; + + if (io_exp_isr_handler() < 0) { + goto polling_reset_i2c; + } + /* Reset I2C */ +#if 0 + /* Check IOEXP */ + if (check_ioexp_objs() < 0) { + goto polling_reset_i2c; + } +#endif + if (scan_100ms++ > PROCESS_TIME) { + scan_100ms = 0; + process_scan++; + /* Check transceiver */ + if (check_transvr_objs() < 0) { + SWPS_DEBUG("%s: check_transvr_objs fail.\n", __func__); + flag_i2c_reset = 1; + } + if (transvr_objs_health_mtr() < 0) { + SWPS_DEBUG("%s: transvr_objs health fail.\n", __func__); + flag_i2c_reset = 1; + + } + } + if (process_scan > IOEXP_CHECK_TIME) { + process_scan = 0; + if (io_exps_check() < 0) { + goto polling_reset_i2c; + } + } + if (flag_i2c_reset) { + goto polling_reset_i2c; + } + goto polling_schedule_round; + +polling_reset_i2c: + SWPS_DEBUG("%s: reset_i2c_topology start.\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset i2c fail!\n", __func__); + flag_i2c_reset = 1; + next_period = _get_polling_period(); + } else { + SWPS_DEBUG("%s: reset_i2c_topology OK.\n", __func__); + flag_i2c_reset = 0; + next_period = 1; + /* Ensure next round will be update */ + scan_100ms = PROCESS_TIME; + process_scan = IOEXP_CHECK_TIME; + } +polling_schedule_round: + schedule_delayed_work(&swp_polling, next_period); +} + + +/* ========== Functions for register something ========== + */ +static int +register_transvr_common_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_id) < 0) { + err_attr = "dev_attr_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_ext_id) < 0) { + err_attr = "dev_attr_ext_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_connector) < 0) { + err_attr = "dev_attr_connector"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_name) < 0) { + err_attr = "dev_attr_vendor_name"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_eeprom) < 0) { + err_attr = "dev_attr_eeprom"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_pn) < 0) { + err_attr = "dev_attr_vendor_pn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_rev) < 0) { + err_attr = "dev_attr_vendor_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_sn) < 0) { + err_attr = "dev_attr_vendor_sn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_br) < 0) { + err_attr = "dev_attr_br"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_smf) < 0) { + err_attr = "dev_attr_len_smf"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om1) < 0) { + err_attr = "dev_attr_len_om1"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om2) < 0) { + err_attr = "dev_attr_len_om2"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om3) < 0) { + err_attr = "dev_attr_len_om3"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om4) < 0) { + err_attr = "dev_attr_len_om4"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_extend) < 0) { + err_attr = "dev_attr_comp_extend"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth) < 0) { + err_attr = "dev_attr_comp_eth"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_rev) < 0) { + err_attr = "dev_attr_comp_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_info) < 0) { + err_attr = "dev_attr_info"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_type) < 0) { + err_attr = "dev_attr_if_type"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_speed) < 0) { + err_attr = "dev_attr_if_speed"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_lane) < 0) { + err_attr = "dev_attr_if_lane"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_temperature) < 0) { + err_attr = "dev_attr_temperature"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_voltage) < 0) { + err_attr = "dev_attr_voltage"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_bias) < 0) { + err_attr = "dev_attr_bias"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power) < 0) { + err_attr = "dev_attr_tx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power) < 0) { + err_attr = "dev_attr_rx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_eq) < 0) { + err_attr = "dev_attr_tx_eq"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_em) < 0) { + err_attr = "dev_attr_rx_em"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_wavelength) < 0) { + err_attr = "dev_attr_wavelength"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_manufacturing_date) < 0) { + err_attr = "dev_attr_manufacturing_date"; + goto err_transvr_comm_attr; + } + return 0; + +err_transvr_comm_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + +static int +register_transvr_sfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10) < 0) { + err_attr = "dev_attr_comp_eth_10"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_len_sm) < 0) { + err_attr = "dev_attr_len_sm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rate_id) < 0) { + err_attr = "dev_attr_rate_id"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs0) < 0) { + err_attr = "dev_attr_soft_rs0"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs1) < 0) { + err_attr = "dev_attr_soft_rs1"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_offset) < 0) { + err_attr = "dev_attr_extphy_offset"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_reg) < 0) { + err_attr = "dev_attr_extphy_reg"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_A0) < 0) { + err_attr = "dev_attr_A0"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_A2) < 0) { + err_attr = "dev_attr_A2"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_high_alarm) < 0) { + err_attr = "dev_attr_temperature_high_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_low_alarm) < 0) { + err_attr = "dev_attr_temperature_low_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_high_alarm) < 0) { + err_attr = "dev_attr_voltage_high_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_low_alarm) < 0) { + err_attr = "dev_attr_voltage_low_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_high_alarm) < 0) { + err_attr = "dev_attr_bias_high_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_low_alarm) < 0) { + err_attr = "dev_attr_bias_low_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_high_alarm) < 0) { + err_attr = "dev_attr_rx_power_high_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_low_alarm) < 0) { + err_attr = "dev_attr_rx_power_low_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_high_alarm) < 0) { + err_attr = "dev_attr_tx_power_high_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_low_alarm) < 0) { + err_attr = "dev_attr_tx_power_low_alarm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_high_threshold) < 0) { + err_attr = "dev_attr_temperature_high_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_low_threshold) < 0) { + err_attr = "dev_attr_temperature_low_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_high_threshold) < 0) { + err_attr = "dev_attr_voltage_high_hreshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_low_threshold) < 0) { + err_attr = "dev_attr_voltage_low_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_high_threshold) < 0) { + err_attr = "dev_attr_bias_high_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_low_threshold) < 0) { + err_attr = "dev_attr_bias_low_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_high_threshold) < 0) { + err_attr = "dev_attr_rx_power_high_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_low_threshold) < 0) { + err_attr = "dev_attr_rx_power_low_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_high_threshold) < 0) { + err_attr = "dev_attr_tx_power_high_threshold"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_low_threshold) < 0) { + err_attr = "dev_attr_tx_power_low_threshold"; + goto err_transvr_sfp_attr; + } + return 0; + +err_transvr_sfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10_40) < 0) { + err_attr = "dev_attr_comp_eth_10_40"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_power_cls) < 0) { + err_attr = "dev_attr_power_cls"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rx_los_signal) < 0) { + err_attr = "soft_rx_los_signal"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_disable) < 0) { + err_attr = "soft_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_auto_tx_disable) < 0) { + err_attr = "auto_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_fault) < 0) { + err_attr = "soft_tx_fault"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_Page00) < 0) { + err_attr = "dev_attr_Page00"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_Page03) < 0) { + err_attr = "dev_attr_Page03"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_high_alarm) < 0) { + err_attr = "dev_attr_temperature_high_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_low_alarm) < 0) { + err_attr = "dev_attr_temperature_low_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_high_alarm) < 0) { + err_attr = "dev_attr_voltage_high_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_low_alarm) < 0) { + err_attr = "dev_attr_voltage_low_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_high_alarm) < 0) { + err_attr = "dev_attr_bias_high_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_low_alarm) < 0) { + err_attr = "dev_attr_bias_low_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_high_alarm) < 0) { + err_attr = "dev_attr_rx_power_high_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_low_alarm) < 0) { + err_attr = "dev_attr_rx_power_low_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_high_alarm) < 0) { + err_attr = "dev_attr_tx_power_high_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_low_alarm) < 0) { + err_attr = "dev_attr_tx_power_low_alarm"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_high_threshold) < 0) { + err_attr = "dev_attr_temperature_high_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_temperature_low_threshold) < 0) { + err_attr = "dev_attr_temperature_low_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_high_threshold) < 0) { + err_attr = "dev_attr_voltage_high_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_voltage_low_threshold) < 0) { + err_attr = "dev_attr_voltage_low_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_high_threshold) < 0) { + err_attr = "dev_attr_bias_high_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_bias_low_threshold) < 0) { + err_attr = "dev_attr_bias_low_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_high_threshold) < 0) { + err_attr = "dev_attr_rx_power_high_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power_low_threshold) < 0) { + err_attr = "dev_attr_rx_power_low_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_high_threshold) < 0) { + err_attr = "dev_attr_tx_power_high_threshold"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power_low_threshold) < 0) { + err_attr = "dev_attr_tx_power_low_threshold"; + goto err_transvr_qsfp_attr; + } + return 0; + +err_transvr_qsfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp28_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_qsfp_attr(device_p) < 0){ + err_attr = "register_transvr_qsfp_attr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_cdr) < 0) { + err_attr = "dev_attr_cdr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_rx_am) < 0) { + err_attr = "dev_attr_rx_am"; + goto err_transvr_qsfp28_attr; + } + return 0; + +err_transvr_qsfp28_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + switch (transvr_obj->layout){ + case TRANSVR_TYPE_SFP: + if (register_transvr_sfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + if (register_transvr_qsfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP_28: + if (register_transvr_qsfp28_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + default: + goto err_reg_tvr_attr; + } + return 0; + +err_reg_tvr_attr: + SWPS_ERR("%s: fail! type=%d \n", __func__, transvr_obj->type); + return -1; +} + + +static int +register_ioexp_attr_sfp_1(struct device *device_p){ + /* Support machine type: + * - SFP : Magnolia + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_hard_tx_fault) < 0) { + err_attr = "dev_attr_hard_tx_fault"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rx_loss_signal) < 0) { + err_attr = "dev_attr_hard_rx_loss_signal"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_disable) < 0) { + err_attr = "dev_attr_tx_disable"; + goto err_ioexp_sfp1_attr; + } + return 0; + +err_ioexp_sfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_sfp_2(struct device *device_p){ + /* Support machine type: + * - SFP28 : Cypress + */ + char *err_attr = NULL; + + if (register_ioexp_attr_sfp_1(device_p) < 0){ + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs0) < 0) { + err_attr = "dev_attr_hard_rs0"; + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs1) < 0) { + err_attr = "dev_attr_hard_rs1"; + goto err_ioexp_sfp2_attr; + } + return 0; + +err_ioexp_sfp2_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_qsfp_1(struct device *device_p){ + /* Support machine type: + * - QSFP : Magnolia, Redwood, Hudson32i + * - QSFP+ : Magnolia, Redwood, Hudson32i + * - QSFP28: Redwood + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_reset) < 0) { + err_attr = "dev_attr_reset"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_lpmod) < 0) { + err_attr = "dev_attr_lpmod"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_modsel) < 0) { + err_attr = "dev_attr_modsel"; + goto err_ioexp_qsfp1_attr; + } + return 0; + +err_ioexp_qsfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_modctl_attr(struct device *device_p){ + + char *err_msg = NULL; + + if (device_create_file(device_p, &dev_attr_platform) < 0) { + err_msg = "dev_attr_platform"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_version) < 0) { + err_msg = "dev_attr_version"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_status) < 0) { + err_msg = "dev_attr_status"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_i2c) < 0) { + err_msg = "dev_attr_reset_i2c"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_swps) < 0) { + err_msg = "dev_attr_reset_swps"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_auto_config) < 0) { + err_msg = "dev_attr_auto_config"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_block_poll) < 0) { + err_msg = "dev_attr_block_poll"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_io_no_init) < 0) { + err_msg = "dev_attr_io_no_init"; + goto err_reg_modctl_attr; + } + + return 0; + +err_reg_modctl_attr: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_ioexp_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + char *err_msg = "ERR"; + + switch (transvr_obj->ioexp_obj_p->ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case CPLD_TYPE_COTTONWOOD: + if (register_ioexp_attr_sfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_GULMOHAR_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + if (register_ioexp_attr_sfp_2(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_2 fail"; + goto err_reg_ioexp_attr; + } + break; + + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case IOEXP_TYPE_MAPLE_0ABC: + case IOEXP_TYPE_GULMOHAR_7ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + if (register_ioexp_attr_qsfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_qsfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + default: + err_msg = "Unknow type"; + goto err_reg_ioexp_attr; + } + return 0; + +err_reg_ioexp_attr: + SWPS_ERR("%s: %s :%d \n", + __func__, err_msg, transvr_obj->ioexp_obj_p->ioexp_type); + return -1; +} + + +static int +register_modctl_device(void) { + + struct device *device_p = NULL; + int minor_comm = 0; /* Default minor number for common device */ + dev_t dev_num = MKDEV(ctl_major, minor_comm); + char *err_msg = "ERROR"; + + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + NULL, /* void *private_data */ + SWP_DEV_MODCTL); /* const char *fmt */ + if (IS_ERR(device_p)){ + err_msg = "device_create fail"; + goto err_register_modctl_device_1; + } + if (register_modctl_attr(device_p) < 0) { + err_msg = "register_modctl_attr fail"; + goto err_register_modctl_device_2; + } + return 0; + +err_register_modctl_device_2: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_register_modctl_device_1: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_port_device(char *dev_name, + dev_t dev_num, + struct transvr_obj_s *transvr_obj){ + + struct device *device_p = NULL; + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + transvr_obj, /* void *private_data */ + dev_name); /* const char *fmt */ + if (IS_ERR(device_p)){ + goto err_regswp_create_dev; + } + if (register_transvr_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + if (register_ioexp_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + return 0; + +err_regswp_reg_attr: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_regswp_create_dev: + SWPS_ERR("%s fail! :%s\n", __func__, dev_name); + return -1; +} + + +static int +register_swp_module(void){ + + dev_t ctl_devt = 0; + dev_t port_devt = 0; + + /* Register device number */ + if (alloc_chrdev_region(&ctl_devt, 0, 1, SWP_DEV_MODCTL) < 0){ + SWPS_WARN("Allocate CTL MAJOR failure! \n"); + goto err_register_swp_module_1; + } + if (alloc_chrdev_region(&port_devt, 0, port_total, SWP_CLS_NAME) < 0){ + SWPS_WARN("Allocate PORT MAJOR failure! \n"); + goto err_register_swp_module_2; + } + ctl_major = MAJOR(ctl_devt); + port_major = MAJOR(port_devt); + + /* Create class object */ + swp_class_p = class_create(THIS_MODULE, SWP_CLS_NAME); + if (IS_ERR(swp_class_p)) { + SWPS_ERR("Create class failure! \n"); + goto err_register_swp_module_3; + } + return 0; + +err_register_swp_module_3: + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_register_swp_module_2: + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); +err_register_swp_module_1: + return -1; +} + + +/* ========== Module initial relate ========== + */ +static int +create_ioexp_objs(void) { + + int i, run_mod; + + /* Clean IOEXP object */ + clean_ioexp_objs(); + /* Get running mode */ + run_mod = IOEXP_MODE_DIRECT; + if (SWP_POLLING_ENABLE){ + run_mod = IOEXP_MODE_POLLING; + } + /* Create IOEXP object */ + for(i=0; i devlen_max) { + snprintf(err_msg, sizeof(err_msg), + "SWP_DEV_PORT too long!"); + goto err_initport_create_tranobj; + } + memset(dev_name, 0, sizeof(dev_name)); + snprintf(dev_name, devlen_max, "%s%d", SWP_DEV_PORT, port_id); + /* Create transceiver object */ + ioexp_obj_p = get_ioexp_obj(ioexp_id); + if (!ioexp_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "IOEXP object:%d not exist", ioexp_id); + goto err_initport_create_tranobj; + } + transvr_obj_p = create_transvr_obj(dev_name, chan_id, ioexp_obj_p, + ioexp_virt_offset, transvr_type, + chipset_type, run_mod, port_id); + if (!transvr_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "Create transceiver object fail :%s", dev_name); + goto err_initport_create_tranobj; + } + /* Setup Lane_ID mapping */ + i = ARRAY_SIZE(port_layout[minor_curr].lane_id); + j = ARRAY_SIZE(transvr_obj_p->lane_id); + if (i != j) { + snprintf(err_msg, sizeof(err_msg), + "Lane_id size inconsistent %d/%d", i, j); + goto err_initport_reg_device; + } + memcpy(transvr_obj_p->lane_id, port_layout[minor_curr].lane_id, i*sizeof(int)); + /* Create and register device object */ + if (register_port_device(dev_name, MKDEV(port_major, minor_curr), transvr_obj_p) < 0){ + snprintf(err_msg, sizeof(err_msg), + "register_port_device fail"); + goto err_initport_reg_device; + } + /* Setup device_ptr of transvr_obj */ + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + snprintf(err_msg, sizeof(err_msg), + "get_swpdev_by_name fail"); + goto err_initport_reg_device; + } + transvr_obj_p->transvr_dev_p = dev_p; + /* Success */ + ok_count++; + } + SWPS_INFO("%s: initialed %d port-dev\n",__func__, ok_count); + return 0; + +err_initport_reg_device: + kfree(transvr_obj_p); +err_initport_create_tranobj: + clean_port_objs(); + SWPS_ERR("%s: %s", __func__, err_msg); + SWPS_ERR("Dump: :%d :%d :%d :%d :%d :%d\n", + port_id, chan_id, ioexp_id, ioexp_virt_offset, transvr_type, run_mod); + return -1; +} + + +static int +init_dev_topology(void){ + + int err; + char *emsg = "ERR"; + flag_mod_state = SWP_STATE_NORMAL; + + err = init_ioexp_objs(); + switch(err){ + case 0: /* Normal */ + SWPS_DEBUG("%s: normal case\n", __func__); + break; + + case -1: /* topology error */ + SWPS_DEBUG("%s: detect tier-1 topology initial failure :%d\n", + __func__, err); + /* Reset and isolate */ + err = reset_i2c_topology(); + if (err < 0) { + emsg = "reset i2c topology fail"; + goto err_init_dev_topology; + } + /* Re-initial again */ + err = init_ioexp_objs(); + if (err < 0) { + emsg = "re-init ioexp objects fail"; + goto err_init_dev_topology; + } + break; + + case -2: /* Internal error */ + SWPS_DEBUG("%s: internal error case\n", __func__); + err = -2; + emsg = "internal error"; + goto err_init_dev_topology; + + default: + SWPS_DEBUG("%s: undefined error case\n", __func__); + emsg = "undefined error case"; + goto err_init_dev_topology; + } + SWPS_DEBUG("%s: initial I2C topology success\n", __func__); + return 0; + +err_init_dev_topology: + SWPS_ERR("%s: %s :%d\n", __func__, emsg, err); + return -1; +} + + +static int +init_polling_task(void){ + + if (SWP_POLLING_ENABLE){ + schedule_delayed_work(&swp_polling, _get_polling_period()); + } + return 0; +} + + +static int +init_swps_common(void){ + + char *err_msg = "ERR"; + + block_polling = 0; + auto_config = 0; + if ((SWP_AUTOCONFIG_ENABLE) && (SWP_POLLING_ENABLE)){ + auto_config = 1; + } + if (register_modctl_device() < 0) { + err_msg = "register_modctl_device fail"; + goto err_init_swps_common_1; + } + if (_update_auto_config_2_trnasvr() < 0) { + err_msg = "_update_auto_config_2_trnasvr fail"; + goto err_init_swps_common_1; + } + if (init_polling_task() < 0){ + err_msg = "init_polling_task fail"; + goto err_init_swps_common_1; + } + return 0; + +err_init_swps_common_1: + clean_swps_common(); + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int __init +swp_module_init(void){ + + if (get_platform_type() < 0){ + goto err_init_out; + } + if (get_layout_info() < 0){ + goto err_init_out; + } + if (register_swp_module() < 0){ + goto err_init_out; + } + if (create_ioexp_objs() < 0){ + goto err_init_ioexp; + } + if (create_port_objs() < 0){ + goto err_init_portobj; + } + if (init_mux_objs(gpio_rest_mux) < 0){ + goto err_init_mux; + } + if (init_dev_topology() < 0){ + goto err_init_topology; + } + if (sff_io_init() < 0) { + goto err_init_topology; + } + if (init_swps_common() < 0){ + goto err_init_topology; + } + if (cpld_ioexp_isr_enable() < 0) { + goto err_init_topology; + } + SWPS_INFO("Inventec switch-port module V.%s initial success.\n", SWP_VERSION); + return 0; + + +err_init_topology: + clean_mux_objs(); +err_init_mux: + clean_port_objs(); +err_init_portobj: + clean_ioexp_objs(); +err_init_ioexp: + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_init_out: + SWPS_ERR("Inventec switch-port module V.%s initial failure.\n", SWP_VERSION); + return -1; +} + + +static void __exit +swp_module_exit(void){ + + clean_swps_common(); + clean_port_objs(); + clean_ioexp_objs(); + clean_mux_objs(); +#if 1 + sff_io_deinit(); +#endif + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); + SWPS_INFO("Remove Inventec switch-port module success.\n"); +} + + +/* Module information */ +MODULE_AUTHOR(SWP_AUTHOR); +MODULE_DESCRIPTION(SWP_DESC); +MODULE_VERSION(SWP_VERSION); +MODULE_LICENSE(SWP_LICENSE); +MODULE_SOFTDEP("pre: inv_platform"); + +module_init(swp_module_init); +module_exit(swp_module_exit); + + + + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_swps.h b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_swps.h new file mode 100644 index 00000000000..7f23ec8f99b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/inv_swps.h @@ -0,0 +1,1621 @@ +#ifndef INV_SWPS_H +#define INV_SWPS_H + +#include "transceiver.h" +#include "io_expander.h" +#include "inv_mux.h" + +/* Module settings */ +#define SWP_CLS_NAME "swps" +#define SWP_DEV_PORT "port" +#define SWP_DEV_MODCTL "module" +#define SWP_RESET_PWD "inventec" +#define SWP_POLLING_PERIOD (100) /* msec */ +#define SWP_POLLING_ENABLE (1) +#define SWP_AUTOCONFIG_ENABLE (1) + +/* Module information */ +#define SWP_AUTHOR "Neil " +#define SWP_DESC "Inventec port and transceiver driver" +#define SWP_VERSION "JD.4.3.10" +#define SWP_LICENSE "GPL" + +/* Module status define */ +#define SWP_STATE_NORMAL (0) +#define SWP_STATE_I2C_DIE (-91) + +/* [Note]: + * Functions and mechanism for auto-detect platform type is ready, + * But HW and BIOS not ready! We need to wait them. + * So, please do not use PLATFORM_TYPE_AUTO until they are ready. + * (2016.06.13) + */ +#define PLATFORM_TYPE_AUTO (100) +#define PLATFORM_TYPE_MAGNOLIA (111) +#define PLATFORM_TYPE_MAGNOLIA_FNC (112) +#define PLATFORM_TYPE_REDWOOD (121) +#define PLATFORM_TYPE_REDWOOD_FSL (122) +#define PLATFORM_TYPE_HUDSON32I_GA (131) +#define PLATFORM_TYPE_SPRUCE (141) +#define PLATFORM_TYPE_CYPRESS_GA1 (151) /* Up -> Down */ +#define PLATFORM_TYPE_CYPRESS_GA2 (152) /* Down -> Up */ +#define PLATFORM_TYPE_CYPRESS_BAI (153) /* Down -> Up */ +#define PLATFORM_TYPE_TAHOE (161) +#define PLATFORM_TYPE_SEQUOIA_GA (171) +#define PLATFORM_TYPE_LAVENDER_GA (181) +#define PLATFORM_TYPE_LAVENDER_ONL (182) +#define PLATFORM_TYPE_COTTONWOOD_RANGELEY (191) +#define PLATFORM_TYPE_MAPLE_GA (201) +#define PLATFORM_TYPE_GULMOHAR_GA (202) +#define PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA (203) +#define PLATFORM_TYPE_PEONY_SFP_GA (204) +#define PLATFORM_TYPE_PEONY_COPPER_GA (205) +#define PLATFORM_TYPE_PEONY_AUTO (206) +#define PLATFORM_TYPE_MAPLE_B (207) +/* Current running platfrom */ +#define PLATFORM_SETTINGS PLATFORM_TYPE_MAPLE_B + +/* Define platform flag and kernel version */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA_FNC) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD) + #define SWPS_REDWOOD (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD_FSL) + #define SWPS_REDWOOD_FSL (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_HUDSON32I_GA) + #define SWPS_HUDSON32I_GA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SPRUCE) + #define SWPS_SPRUCE (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA1) + #define SWPS_CYPRESS_GA1 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA2) + #define SWPS_CYPRESS_GA2 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_BAI) + #define SWPS_CYPRESS_BAI (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_TAHOE) + #define SWPS_TAHOE (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SEQUOIA_GA) + #define SWPS_SEQUOIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_COTTONWOOD_RANGELEY) + #define SWPS_COTTONWOOD_RANGELEY (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAPLE_GA) + #define SWPS_MAPLE_GA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAPLE_B) + #define SWPS_MAPLE_B (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_GULMOHAR_GA) + #define SWPS_GULMOHAR (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA) + #define SWPS_GULMOHAR_2T_EVT1 (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_PEONY_SFP_GA) + #define SWPS_PEONY_SFP (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_PEONY_COPPER_GA) + #define SWPS_PEONY_COPPER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_PEONY_AUTO) + #define SWPS_PEONY_SFP (1) + #define SWPS_PEONY_COPPER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#endif + +struct inv_platform_s { + int id; + char name[64]; +}; + +struct inv_ioexp_layout_s { + int ioexp_id; + int ioexp_type; + struct ioexp_addr_s addr[4]; +}; + +struct inv_port_layout_s { + int port_id; + int chan_id; + int ioexp_id; + int ioexp_offset; + int transvr_type; + int chipset_type; + int lane_id[8]; +}; + + +/* ========================================== + * Inventec Platform Settings + * ========================================== + */ +struct inv_platform_s platform_map[] = { + {PLATFORM_TYPE_AUTO, "Auto-Detect" }, + {PLATFORM_TYPE_MAGNOLIA, "Magnolia" }, + {PLATFORM_TYPE_MAGNOLIA_FNC, "Magnolia_FNC" }, + {PLATFORM_TYPE_REDWOOD, "Redwood" }, + {PLATFORM_TYPE_REDWOOD_FSL, "Redwood_FSL" }, + {PLATFORM_TYPE_HUDSON32I_GA, "Hudson32i" }, + {PLATFORM_TYPE_SPRUCE, "Spruce" }, + {PLATFORM_TYPE_CYPRESS_GA1, "Cypress_GA1" }, + {PLATFORM_TYPE_CYPRESS_GA2, "Cypress_GA2" }, + {PLATFORM_TYPE_CYPRESS_BAI, "Cypress_BAI" }, + {PLATFORM_TYPE_TAHOE, "Tahoe" }, + {PLATFORM_TYPE_SEQUOIA_GA, "Sequoia_GA" }, + {PLATFORM_TYPE_LAVENDER_GA, "Lavender_GA" }, + {PLATFORM_TYPE_LAVENDER_ONL, "Lavender_ONL" }, + {PLATFORM_TYPE_COTTONWOOD_RANGELEY, "Cottonwood_RANGELEY" }, + {PLATFORM_TYPE_MAPLE_GA, "Maple_GA" }, + {PLATFORM_TYPE_MAPLE_B, "Maple_B" }, + {PLATFORM_TYPE_GULMOHAR_GA, "Gulmohar_GA" }, + {PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA, "Gulmohar_2T_EVT1_GA" }, + {PLATFORM_TYPE_PEONY_SFP_GA, "Peony_SFP_GA" }, + {PLATFORM_TYPE_PEONY_COPPER_GA, "Peony_Copper_GA" }, + {PLATFORM_TYPE_PEONY_AUTO, "Peony_Auto_Detect" }, +}; + + +/* ========================================== + * Magnolia Layout configuration + * ========================================== + */ +#ifdef SWPS_MAGNOLIA +unsigned magnolia_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s magnolia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAGINOLIA_NAB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {1, IOEXP_TYPE_MAGINOLIA_NAB, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {2, IOEXP_TYPE_MAGINOLIA_NAB, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {3, IOEXP_TYPE_MAGINOLIA_4AB, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf0, 0xff}, {0xf0, 0xff}, }, }, /* addr[1] = I/O Expander 4 B */ + }, + {4, IOEXP_TYPE_MAGINOLIA_NAB, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {5, IOEXP_TYPE_MAGINOLIA_NAB, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {6, IOEXP_TYPE_MAGINOLIA_7AB, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[1] = I/O Expander 7 B */ + }, +}; + +struct inv_port_layout_s magnolia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 16} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 15} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 14} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 13} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 24} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 23} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 22} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 21} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 28} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 27} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 26} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 25} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 32} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 31} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 30} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 29} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 48} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 47} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 46} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 45} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 52} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 51} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 50} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 49} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 56} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 55} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 54} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 53} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 60} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 59} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 58} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 57} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 64} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 63} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 62} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 61} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 68} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 67} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 66} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 65} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 72} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 71} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 70} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 69} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 76} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 75} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 74} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 73} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD +unsigned redwood_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s redwood_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + +struct inv_port_layout_s redwood_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Hudson32i Layout configuration + * ========================================== + */ +#ifdef SWPS_HUDSON32I_GA +unsigned hudsin32iga_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s hudson32iga_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_HUDSON32IGA_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {1, IOEXP_TYPE_HUDSON32IGA_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {2, IOEXP_TYPE_HUDSON32IGA_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, + {3, IOEXP_TYPE_HUDSON32IGA_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, +}; + +struct inv_port_layout_s hudson32iga_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 1, 2, 3, 4} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 5, 6, 7, 8} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 9, 10, 11, 12} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 13, 14, 15, 16} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 17, 18, 19, 20} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 21, 22, 23, 24} }, + { 6, 12, 0, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 25, 26, 27, 28} }, + { 7, 13, 0, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 29, 30, 31, 32} }, + { 8, 14, 1, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 33, 34, 35, 36} }, + { 9, 15, 1, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 37, 38, 39, 40} }, + {10, 16, 1, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 41, 42, 43, 44} }, + {11, 17, 1, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 45, 46, 47, 48} }, + {12, 18, 1, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 49, 50, 51, 52} }, + {13, 19, 1, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 53, 54, 55, 56} }, + {14, 20, 1, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 57, 58, 59, 60} }, + {15, 21, 1, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 61, 62, 63, 64} }, + {16, 22, 2, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 65, 66, 67, 68} }, + {17, 23, 2, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 69, 70, 71, 72} }, + {18, 24, 2, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 73, 74, 75, 76} }, + {19, 25, 2, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {20, 26, 2, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {21, 27, 2, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 85, 86, 87, 88} }, + {22, 28, 2, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 89, 90, 91, 92} }, + {23, 29, 2, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 93, 94, 95, 96} }, + {24, 30, 3, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {25, 31, 3, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {26, 32, 3, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {27, 33, 3, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, + {28, 34, 3, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {113,114,115,116} }, + {29, 35, 3, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {117,118,119,120} }, + {30, 36, 3, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {121,122,123,124} }, + {31, 37, 3, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Spruce Layout configuration + * ========================================== + */ +#ifdef SWPS_SPRUCE +unsigned spruce_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s spruce_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SPRUCE_7AB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[2] = I/O Expander 7B */ + }, +}; + +struct inv_port_layout_s spruce_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Up->Down]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA1 +unsigned cypress_ga1_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s cypress_ga1_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga1_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Down->Up]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA2 +unsigned cypress_ga2_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_ga2_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga2_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 1, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 2, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 3, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 4, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 5, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 6, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 7, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 8, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + { 9, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {10, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {11, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {12, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {13, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {14, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {15, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {16, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {17, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {18, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {19, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {20, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {21, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {22, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {23, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {24, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {25, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {26, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {27, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {28, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {29, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {30, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {31, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {32, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {33, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {34, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {35, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {36, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {37, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {38, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {39, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {40, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {41, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {42, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {43, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {44, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {45, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {46, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {47, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {48, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {49, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {50, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {51, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {52, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {53, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (BaiDu version) + * ========================================== + */ +#ifdef SWPS_CYPRESS_BAI +unsigned cypress_b_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_b_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_b_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {54, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood_fsl Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD_FSL +unsigned redwood_fsl_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s redwood_fsl_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + + +struct inv_port_layout_s redwood_fsl_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Tahoe Layout configuration + * ========================================== + */ +#ifdef SWPS_TAHOE +unsigned tahoe_gpio_rest_mux = MUX_RST_GPIO_249_PCA9548; + +struct inv_ioexp_layout_s tahoe_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_TAHOE_6ABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {1, IOEXP_TYPE_TAHOE_5A, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[0] = I/O Expander 5 A */ + }, +}; + + +struct inv_port_layout_s tahoe_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 12, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + { 1, 11, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + { 2, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + { 3, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + { 4, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + { 5, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + { 6, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + { 7, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + { 8, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + { 9, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, +}; +#endif + + +/* ========================================== + * Sequoia Layout configuration + * ========================================== + */ +#ifdef SWPS_SEQUOIA +unsigned sequoia_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s sequoia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { {1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + +struct inv_port_layout_s sequoia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 9, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 1, 10, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 2, 11, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 3, 12, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 4, 13, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + { 5, 14, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 6, 15, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + { 7, 16, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + { 8, 17, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + { 9, 18, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {10, 19, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {11, 20, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {12, 21, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + {13, 22, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + {14, 23, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121, 122, 123, 124} }, + {15, 24, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + {16, 25, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {137, 138, 139, 140} }, + {17, 26, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {129, 130, 131, 132} }, + {18, 27, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {153, 154, 155, 156} }, + {19, 28, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {145, 146, 147, 148} }, + {20, 29, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {169, 170, 171, 172} }, + {21, 30, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {161, 162, 163, 164} }, + {22, 31, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {185, 186, 187, 188} }, + {23, 32, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {177, 178, 179, 180} }, + {24, 33, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {201, 202, 203, 204} }, + {25, 34, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {193, 194, 195, 196} }, + {26, 35, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {217, 218, 219, 220} }, + {27, 36, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {209, 210, 211, 212} }, + {28, 37, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {233, 234, 235, 236} }, + {29, 38, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {225, 226, 227, 228} }, + {30, 39, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {249, 250, 251, 252} }, + {31, 40, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {241, 242, 243, 244} }, + {32, 44, 4, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + {33, 43, 4, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + {34, 42, 4, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + {35, 41, 4, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + {36, 48, 4, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {37, 47, 4, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {38, 46, 4, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {39, 45, 4, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {40, 52, 5, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {41, 51, 5, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {42, 50, 5, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {43, 49, 5, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {44, 56, 5, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, + {45, 55, 5, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + {46, 54, 5, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125, 126, 127, 128} }, + {47, 53, 5, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117, 118, 119, 120} }, + {48, 60, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {141, 142, 143, 144} }, + {49, 59, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {133, 134, 135, 136} }, + {50, 58, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {157, 158, 159, 160} }, + {51, 57, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {149, 150, 151, 152} }, + {52, 64, 6, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {173, 174, 175, 176} }, + {53, 63, 6, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {165, 166, 167, 168} }, + {54, 62, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {189, 190, 191, 192} }, + {55, 61, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {181, 182, 183, 184} }, + {56, 68, 7, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {205, 206, 207, 208} }, + {57, 67, 7, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {197, 198, 199, 200} }, + {58, 66, 7, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {221, 222, 223, 224} }, + {59, 65, 7, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {213, 214, 215, 216} }, + {60, 72, 7, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {237, 238, 239, 240} }, + {61, 71, 7, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {229, 230, 231, 232} }, + {62, 70, 7, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {253, 254, 255, 256} }, + {63, 69, 7, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {245, 246, 247, 248} }, +}; +#endif + + +/* ========================================== + * Lavender Layout configuration + * ========================================== + */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; +#endif + +#ifdef SWPS_LAVENDER +struct inv_ioexp_layout_s lavender_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { { 1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + { 1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { { 2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + { 2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + { 2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { { 3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + { 3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + { 3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { { 4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + { 4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + { 4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { { 9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + { 9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + { 9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, + {8, IOEXP_TYPE_LAVENDER_P65, { { 5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xF6, 0xff}, {0xF8, 0xff}, }, }, /* addr[0] = I/O Expander CPU */ + }, +}; + + +struct inv_port_layout_s lavender_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {188, 189, 190, 191} }, + { 1, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {184, 185, 186, 187} }, + { 2, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {180, 181, 182, 183} }, + { 3, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {176, 177, 178, 179} }, + { 4, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {172, 173, 174, 175} }, + { 5, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {168, 169, 170, 171} }, + { 6, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {164, 165, 166, 167} }, + { 7, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {160, 161, 162, 163} }, + { 8, 25, 1, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {156, 157, 158, 159} }, + { 9, 26, 1, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {152, 153, 154, 155} }, + {10, 27, 1, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {148, 149, 150, 151} }, + {11, 28, 1, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {144, 145, 146, 147} }, + {12, 29, 1, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {140, 141, 142, 143} }, + {13, 30, 1, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {136, 137, 138, 139} }, + {14, 31, 1, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {132, 133, 134, 135} }, + {15, 32, 1, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {128, 129, 130, 131} }, + {16, 33, 2, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 0, 1, 2, 3} }, + {17, 34, 2, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 4, 5, 6, 7} }, + {18, 35, 2, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 8, 9, 10, 11} }, + {19, 36, 2, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 12, 13, 14, 15} }, + {20, 37, 2, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 16, 17, 18, 19} }, + {21, 38, 2, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 20, 21, 22, 23} }, + {22, 39, 2, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 24, 25, 26, 27} }, + {23, 40, 2, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 28, 29, 30, 31} }, + {24, 41, 3, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 32, 33, 34, 35} }, + {25, 42, 3, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 36, 37, 38, 39} }, + {26, 43, 3, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 40, 41, 42, 43} }, + {27, 44, 3, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 44, 45, 46, 47} }, + {28, 45, 3, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 48, 49, 50, 51} }, + {29, 46, 3, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 52, 53, 54, 55} }, + {30, 47, 3, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 56, 57, 58, 59} }, + {31, 48, 3, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 60, 61, 62, 63} }, + {32, 49, 4, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {256, 257, 258, 259} }, + {33, 50, 4, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {260, 261, 262, 263} }, + {34, 51, 4, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {264, 265, 266, 267} }, + {35, 52, 4, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {268, 269, 270, 271} }, + {36, 53, 4, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {272, 273, 274, 275} }, + {37, 54, 4, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {276, 277, 278, 279} }, + {38, 55, 4, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {280, 281, 282, 283} }, + {39, 56, 4, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {284, 285, 286, 287} }, + {40, 57, 5, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {288, 289, 290, 291} }, + {41, 58, 5, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {292, 293, 294, 295} }, + {42, 59, 5, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {296, 297, 298, 299} }, + {43, 60, 5, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {300, 301, 302, 303} }, + {44, 61, 5, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {304, 305, 306, 307} }, + {45, 62, 5, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {308, 309, 310, 311} }, + {46, 63, 5, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {312, 313, 314, 315} }, + {47, 64, 5, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {316, 317, 318, 319} }, + {48, 65, 6, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {444, 445, 446, 447} }, + {49, 66, 6, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {440, 441, 442, 443} }, + {50, 67, 6, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {436, 437, 438, 439} }, + {51, 68, 6, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {432, 433, 434, 435} }, + {52, 69, 6, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {428, 429, 430, 431} }, + {53, 70, 6, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {424, 425, 426, 427} }, + {54, 71, 6, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {420, 421, 422, 423} }, + {55, 72, 6, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {416, 417, 418, 419} }, + {56, 73, 7, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {412, 413, 414, 415} }, + {57, 74, 7, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {408, 409, 410, 411} }, + {58, 75, 7, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {404, 405, 406, 407} }, + {59, 76, 7, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {400, 401, 402, 403} }, + {60, 77, 7, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {396, 397, 398, 399} }, + {61, 78, 7, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {392, 393, 394, 395} }, + {62, 79, 7, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {388, 389, 390, 391} }, + {63, 80, 7, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {384, 385, 386, 387} }, + {64, 5, 8, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 64, 65, 66, 67} }, +}; +#endif + +/* =========================================================== + * Cottonwood Layout configuration Rangeley (Rangeley CPU board) + * =========================================================== + */ +#ifdef SWPS_COTTONWOOD_RANGELEY +unsigned cottonwood_rangeley_gpio_rest_mux = MUX_RST_GPIO_500_PCA9548; + +struct inv_ioexp_layout_s cottonwood_rangeley_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, CPLD_TYPE_COTTONWOOD,{ {1, 0x55, {22, 23, 24, 25}, {22, 23, 24, 25}, {-1, -1, -1, -1}, {0xee, 0xee, 0x99, 0x99}, {0x00, 0x00, 0x00, 0x00}, }, + }, + }, +}; + + +struct inv_port_layout_s cottonwood_rangeley_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHI_TYPE / LANE_ID */ + { 0, 2, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 75} }, + { 1, 3, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 77} }, + { 2, 4, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 79} }, + { 3, 5, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, +}; +#endif + +/* =========================================================== + * Maple Layout configuration (Old) + * =========================================================== + */ +#ifdef SWPS_MAPLE_GA +unsigned maple_ga_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; + +struct inv_ioexp_layout_s maple_ga_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAPLE_0ABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_MAPLE_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_MAPLE_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_MAPLE_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_MAPLE_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_MAPLE_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_MAPLE_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s maple_ga_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 1} }, + { 1, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 2} }, + { 2, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 3} }, + { 3, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 4} }, + { 4, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 5} }, + { 5, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 6} }, + { 6, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 7} }, + { 7, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 8} }, + { 8, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 13} }, + { 9, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 14} }, + {10, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 15} }, + {11, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 16} }, + {12, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 21} }, + {13, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 22} }, + {14, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 23} }, + {15, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 24} }, + {16, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 29} }, + {17, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 30} }, + {18, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 31} }, + {19, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 32} }, + {20, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 33} }, + {21, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 34} }, + {22, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 35} }, + {23, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 36} }, + {24, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 41} }, + {25, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 42} }, + {26, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 43} }, + {27, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 44} }, + {28, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 49} }, + {29, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 50} }, + {30, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 51} }, + {31, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 52} }, + {32, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 57} }, + {33, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 58} }, + {34, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 59} }, + {35, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 60} }, + {36, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 61} }, + {37, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 62} }, + {38, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 63} }, + {39, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 64} }, + {40, 58, 6, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 65} }, + {41, 59, 6, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 66} }, + {42, 60, 6, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 67} }, + {43, 61, 6, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 68} }, + {44, 62, 6, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 69} }, + {45, 63, 6, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 70} }, + {46, 64, 6, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 71} }, + {47, 65, 6, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 72} }, + {48, 10, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {49, 11, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {50, 12, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, + {51, 13, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 97, 98, 99,100} }, + {52, 14, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {105,106,107,108} }, + {53, 15, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {113,114,115,116} }, + {54, 16, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {121,122,123,124} }, + {55, 17, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {125,126,127,128} }, +}; +#endif + +/* =========================================================== + * Maple Layout configuration (B version) + * =========================================================== + */ +#ifdef SWPS_MAPLE_B +unsigned maple_b_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s maple_b_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAPLE_0ABC, { { 6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + { 6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_MAPLE_NABC, { { 7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_MAPLE_NABC, { { 8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_MAPLE_NABC, { { 9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_MAPLE_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_MAPLE_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_MAPLE_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s maple_b_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 1, 23, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 2} }, + { 0, 22, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 1} }, + { 3, 25, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 4} }, + { 2, 24, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 3} }, + { 5, 27, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 6} }, + { 4, 26, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 5} }, + { 7, 29, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 8} }, + { 6, 28, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 7} }, + { 9, 31, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 14} }, + { 8, 30, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 13} }, + {11, 33, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 16} }, + {10, 32, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 15} }, + {13, 35, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 22} }, + {12, 34, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 21} }, + {15, 37, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 24} }, + {14, 36, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 23} }, + {17, 39, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 30} }, + {16, 38, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 29} }, + {19, 41, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 32} }, + {18, 40, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 31} }, + {21, 43, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 34} }, + {20, 42, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 33} }, + {23, 45, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 36} }, + {22, 44, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 35} }, + {25, 47, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 42} }, + {24, 46, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 41} }, + {27, 49, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 44} }, + {26, 48, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 43} }, + {29, 51, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 50} }, + {28, 50, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 49} }, + {31, 53, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 52} }, + {30, 52, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 51} }, + {33, 55, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 58} }, + {32, 54, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 57} }, + {35, 57, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 60} }, + {34, 56, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 59} }, + {37, 59, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 62} }, + {36, 58, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 61} }, + {39, 61, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 64} }, + {38, 60, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 63} }, + {41, 63, 6, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 66} }, + {40, 62, 6, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 65} }, + {43, 65, 6, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 68} }, + {42, 64, 6, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 67} }, + {45, 67, 6, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 70} }, + {44, 66, 6, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 69} }, + {47, 69, 6, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 72} }, + {46, 68, 6, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 71} }, + {49, 15, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {48, 14, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {51, 17, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 97, 98, 99,100} }, + {50, 16, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, + {53, 19, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {105,106,107,108} }, + {52, 18, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {113,114,115,116} }, + {55, 21, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {125,126,127,128} }, + {54, 20, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {121,122,123,124} }, +}; +#endif + + +/* ========================================== + * Gulmohar Layout configuration + * ========================================== + */ +#ifdef SWPS_GULMOHAR +unsigned gulmohar_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; + +struct inv_ioexp_layout_s gulmohar_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_GULMOHAR_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_GULMOHAR_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_GULMOHAR_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_GULMOHAR_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_GULMOHAR_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_GULMOHAR_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_GULMOHAR_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + + +struct inv_port_layout_s gulmohar_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 1} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 2} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 3} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 4} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 5} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 6} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 7} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 8} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 9} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 10} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 11} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 12} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 21} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 22} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 23} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 24} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 33} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 34} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 35} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 36} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 37} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 38} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 39} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 40} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 41} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 42} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 43} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 44} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 49} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 50} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 51} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 52} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 53} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 54} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 55} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 56} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 65} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 66} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 67} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 68} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 69} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 70} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 71} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 72} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 81} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 82} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 83} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 84} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 97, 98, 99,100} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 85, 86, 87, 88} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {101,102,103,104} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {105,106,107,108} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {109,110,111,112} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Gulmohar_2T EVT1 Layout configuration + * ========================================== + */ +#ifdef SWPS_GULMOHAR_2T_EVT1 +unsigned gulmohar_2t_evt1_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; + +struct inv_ioexp_layout_s gulmohar_2t_evt1_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC,{ {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC,{ {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC,{ {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xd6, 0xda}, {0x18, 0xe3}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xd6, 0xda}, {0x18, 0xe3}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xd6, 0xff}, {0x18, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + + +struct inv_port_layout_s gulmohar_2t_evt1_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {48, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {49, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {50, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {51, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {52, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {53, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {54, 65, 6, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {55, 64, 6, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, +}; +#endif + + +/* =========================================================== + * Peony-SFP Layout configuration + * =========================================================== + */ +#ifdef SWPS_PEONY_SFP +unsigned peony_sfp_gpio_rest_mux = MUX_RST_CPLD_C0_A77_70_74_RST_ALL; + +struct inv_ioexp_layout_s peony_sfp_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_QSFP_6P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 0 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s peony_sfp_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 20, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 1} }, + { 1, 21, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 2} }, + { 2, 22, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 3} }, + { 3, 23, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 4} }, + { 4, 24, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 5} }, + { 5, 25, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 6} }, + { 6, 26, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 7} }, + { 7, 27, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 8} }, + { 8, 28, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 13} }, + { 9, 29, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 14} }, + {10, 30, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 15} }, + {11, 31, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 16} }, + {12, 32, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 21} }, + {13, 33, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 22} }, + {14, 34, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 23} }, + {15, 35, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 24} }, + {16, 36, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 29} }, + {17, 37, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 30} }, + {18, 38, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 31} }, + {19, 39, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 32} }, + {20, 40, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 33} }, + {21, 41, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 34} }, + {22, 42, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 35} }, + {23, 43, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 36} }, + {24, 44, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 65} }, + {25, 45, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 66} }, + {26, 46, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 67} }, + {27, 47, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 68} }, + {28, 48, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 69} }, + {29, 49, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 70} }, + {30, 50, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 71} }, + {31, 51, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 72} }, + {32, 52, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 97} }, + {33, 53, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 98} }, + {34, 54, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 99} }, + {35, 55, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {100} }, + {36, 56, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {105} }, + {37, 57, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {106} }, + {38, 58, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {107} }, + {39, 59, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {108} }, + {40, 60, 6, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {113} }, + {41, 61, 6, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {114} }, + {42, 62, 6, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {115} }, + {43, 63, 6, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {116} }, + {44, 64, 6, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {121} }, + {45, 65, 6, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {122} }, + {46, 66, 6, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {123} }, + {47, 67, 6, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {124} }, + {48, 12, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 49, 50, 51, 52} }, + {49, 13, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 57, 58, 59, 60} }, + {50, 14, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 61, 62, 63, 64} }, + {51, 15, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {52, 16, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {53, 17, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, +}; +#endif + + +/* =========================================================== + * Peony-Copper Layout configuration + * =========================================================== + */ +#ifdef SWPS_PEONY_COPPER +unsigned peony_copper_gpio_rest_mux = MUX_RST_CPLD_C0_A77_70_74_RST_ALL; + +struct inv_ioexp_layout_s peony_copper_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_QSFP_6P_LAYOUT_1, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 0 A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, +}; + +struct inv_port_layout_s peony_copper_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + {48, 4, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 49, 50, 51, 52} }, + {49, 5, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 57, 58, 59, 60} }, + {50, 6, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 61, 62, 63, 64} }, + {51, 7, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {52, 8, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {53, 9, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, +}; +#endif + + + +#endif /* INV_SWPS_H */ + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/io_config_maple.h b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/io_config_maple.h new file mode 100644 index 00000000000..eb71b421c2c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/io_config_maple.h @@ -0,0 +1,134 @@ +//port info +#ifndef __IO_CONFIG_MAPLE_H +#define __IO_CONFIG_MAPLE_H + + +#define CPLD_EXPANDER_INT_N (12) /*GPIO 12*/ +#define CPLD_I2C_CH (2) +#define CPLD_I2C_ADDR (0x33) +/*reset mux gpio*/ +#define RESET_MUX_GPIO_NUM (69) +#define PORT_NUM (56) +#define END_OF_TABLE (0xff) +/*io expander layout*/ +const int io_i2c_ch_table[] = +{ + 7, + 8, + 9, + 10, + 11, + 12, + 6 +}; + +struct io_exp_input_t io_exp_present[] = +{ + /*sfp*/ + {.ch = 7, .addr = 0x20, .port_min = 0, .bit_min = 4, .bit_max = 7}, + {.ch = 7, .addr = 0x21, .port_min = 4, .bit_min = 4, .bit_max = 7}, + {.ch = 8, .addr = 0x20, .port_min = 8, .bit_min = 4, .bit_max = 7}, + {.ch = 8, .addr = 0x21, .port_min = 12, .bit_min = 4, .bit_max = 7}, + {.ch = 9, .addr = 0x20, .port_min = 16, .bit_min = 4, .bit_max = 7}, + {.ch = 9, .addr = 0x21, .port_min = 20, .bit_min = 4, .bit_max = 7}, + {.ch = 10, .addr = 0x20, .port_min = 24, .bit_min = 4, .bit_max = 7}, + {.ch = 10, .addr = 0x21, .port_min = 28, .bit_min = 4, .bit_max = 7}, + {.ch = 11, .addr = 0x20, .port_min = 32, .bit_min = 4, .bit_max = 7}, + {.ch = 11, .addr = 0x21, .port_min = 36, .bit_min = 4, .bit_max = 7}, + {.ch = 12, .addr = 0x20, .port_min = 40, .bit_min = 4, .bit_max = 7}, + {.ch = 12, .addr = 0x21, .port_min = 44, .bit_min = 4, .bit_max = 7}, + /*qsfp*/ + {.ch = 6, .addr = 0x22, .port_min = 48, .bit_min = 8, .bit_max = 15}, + {.ch = END_OF_TABLE} /*end of table*/ +}; +struct io_exp_input_t io_exp_txfault[] = +{ + /*sfp*/ + {.ch = 7, .addr = 0x20, .port_min = 0, .bit_min = 0, .bit_max = 3}, + {.ch = 7, .addr = 0x21, .port_min = 4, .bit_min = 0, .bit_max = 3}, + {.ch = 8, .addr = 0x20, .port_min = 8, .bit_min = 0, .bit_max = 3}, + {.ch = 8, .addr = 0x21, .port_min = 12, .bit_min = 0, .bit_max = 3}, + {.ch = 9, .addr = 0x20, .port_min = 16, .bit_min = 0, .bit_max = 3}, + {.ch = 9, .addr = 0x21, .port_min = 20, .bit_min = 0, .bit_max = 3}, + {.ch = 10, .addr = 0x20, .port_min = 24, .bit_min = 0, .bit_max = 3}, + {.ch = 10, .addr = 0x21, .port_min = 28, .bit_min = 0, .bit_max = 3}, + {.ch = 11, .addr = 0x20, .port_min = 32, .bit_min = 0, .bit_max = 3}, + {.ch = 11, .addr = 0x21, .port_min = 36, .bit_min = 0, .bit_max = 3}, + {.ch = 12, .addr = 0x20, .port_min = 40, .bit_min = 0, .bit_max = 3}, + {.ch = 12, .addr = 0x21, .port_min = 44, .bit_min = 0, .bit_max = 3}, + {.ch = END_OF_TABLE} /*end of table*/ +}; +struct io_exp_input_t io_exp_rxlos[] = +{ + /*sfp*/ + {.ch = 7, .addr = 0x20, .port_min = 0, .bit_min = 12, .bit_max = 15}, + {.ch = 7, .addr = 0x21, .port_min = 4, .bit_min = 12, .bit_max = 15}, + {.ch = 8, .addr = 0x20, .port_min = 8, .bit_min = 12, .bit_max = 15}, + {.ch = 8, .addr = 0x21, .port_min = 12, .bit_min = 12, .bit_max = 15}, + {.ch = 9, .addr = 0x20, .port_min = 16, .bit_min = 12, .bit_max = 15}, + {.ch = 9, .addr = 0x21, .port_min = 20, .bit_min = 12, .bit_max = 15}, + {.ch = 10, .addr = 0x20, .port_min = 24, .bit_min = 12, .bit_max = 15}, + {.ch = 10, .addr = 0x21, .port_min = 28, .bit_min = 12, .bit_max = 15}, + {.ch = 11, .addr = 0x20, .port_min = 32, .bit_min = 12, .bit_max = 15}, + {.ch = 11, .addr = 0x21, .port_min = 36, .bit_min = 12, .bit_max = 15}, + {.ch = 12, .addr = 0x20, .port_min = 40, .bit_min = 12, .bit_max = 15}, + {.ch = 12, .addr = 0x21, .port_min = 44, .bit_min = 12, .bit_max = 15}, + {.ch = END_OF_TABLE} /*end of table*/ +}; +/*only config input pin for our purpose*/ +struct io_exp_config_t io_exp_config[] = +{ + /*sfp*/ + {.ch = 7, .addr = 0x20, .val = 0xf0ff}, + {.ch = 7, .addr = 0x21, .val = 0xf0ff}, + {.ch = 7, .addr = 0x22, .val = 0x0000}, + {.ch = 8, .addr = 0x20, .val = 0xf0ff}, + {.ch = 8, .addr = 0x21, .val = 0xf0ff}, + {.ch = 8, .addr = 0x22, .val = 0x0000}, + {.ch = 9, .addr = 0x20, .val = 0xf0ff}, + {.ch = 9, .addr = 0x21, .val = 0xf0ff}, + {.ch = 9, .addr = 0x22, .val = 0x0000}, + {.ch = 10, .addr = 0x20, .val = 0xf0ff}, + {.ch = 10, .addr = 0x21, .val = 0xf0ff}, + {.ch = 10, .addr = 0x22, .val = 0x0000}, + {.ch = 11, .addr = 0x20, .val = 0xf0ff}, + {.ch = 11, .addr = 0x21, .val = 0xf0ff}, + {.ch = 11, .addr = 0x22, .val = 0x0000}, + {.ch = 12, .addr = 0x20, .val = 0xf0ff}, + {.ch = 12, .addr = 0x21, .val = 0xf0ff}, + {.ch = 12, .addr = 0x22, .val = 0x0000}, + /*qsfp*/ + {.ch = 6, .addr = 0x20, .val = 0x0000}, + {.ch = 6, .addr = 0x21, .val = 0xff00}, + {.ch = 6, .addr = 0x22, .val = 0xffff}, + {.ch = END_OF_TABLE} /*end of table*/ +}; +/*cpld 0x36, 0x37 maping*/ +int input_change_table[] = +{ + 0, /*port 0~3 , only record first port*/ + 4, + 8, + 12, + 16, + 20, + 24, + 28, + 32, + 36, + 40, + 44, + 48 +}; +int ioexp_port_2_port[PORT_NUM] = +{ + 0, 1, 2, 3 ,4, 5, 6, 7, + 8, 9, 10, 11 ,12, 13, 14, 15, + 16, 17, 18, 19 ,20, 21, 22, 23, + 24, 25, 26, 27 ,28, 29, 30, 31, + 32, 33, 34, 35 ,36, 37, 38, 39, + 40, 41, 42, 43 ,44, 45, 46, 47, + 48, 49, 50, 51 ,52, 53, 54, 55, + +}; +#endif /*__IO_CONFIG_MAPLE_H*/ diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/io_expander.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/io_expander.c new file mode 100644 index 00000000000..85e9b2a23a8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/io_expander.c @@ -0,0 +1,2572 @@ +#include +#include +#include "io_expander.h" +/* For build single module using (Ex: ONL platform) */ +#include +//#include + + +static struct ioexp_obj_s *ioexp_head_p = NULL; +static struct ioexp_obj_s *ioexp_tail_p = NULL; +extern int io_no_init; + +/* ========== Register IOEXP layout ========== + */ +struct ioexp_map_s ioexp_map_magnolia_nab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_4ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_7ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {1, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {1, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {1, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 2}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 3}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 0, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 0, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 0, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 0, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 0, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 0, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 0, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 1, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 1, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 1, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 1, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 1, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 1, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 1, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 1, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 1, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 1, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {0, 1, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {0, 1, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {1, 1, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {1, 1, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {1, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {1, 1, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_5a = { + + .chip_amount = 1, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_6abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 0}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 3}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 0}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + {2, 1, 5}, /* map_present[8] = MOD_ABS_PORT(X+8) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {1, 0, 1}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 6}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 1, 3}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {2, 0, 1}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {2, 0, 6}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + {2, 1, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 2}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 7}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 1, 4}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {2, 0, 2}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {2, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + {2, 1, 4}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+8) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {1, 0, 0}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 0, 5}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 2}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {2, 0, 0}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {2, 0, 5}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + {2, 1, 2}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_sequoia_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_lavender_p65 = { + + .chip_amount = 1, + .data_width = 1, + + .map_present = { {0, 0, 4}, }, /* map_present[0] = MOD_ABS_PORT(X) */ + .map_reset = { {0, 0, 1}, }, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + .map_lpmod = { {0, 0, 2}, }, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + .map_modsel = { {0, 0, 0}, }, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ +}; + + +struct ioexp_map_s cpld_map_cottonwood = { + + .chip_amount = 1, + .data_width = 4, + + .map_present = { {0, 2, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 2, 4}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 3, 0}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 3, 4}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + }, + .map_tx_disable = { {0, 0, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + }, + .map_tx_fault = { {0, 2, 2}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 2, 6}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 3, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 3, 6}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + }, + .map_rxlos = { {0, 2, 1}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 2, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 3, 1}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 3, 5}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + }, + .map_hard_rs0 = { {0, 0, 2}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {0, 0, 6}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {0, 1, 2}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {0, 1, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + }, + .map_hard_rs1 = { {0, 0, 2}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {0, 0, 6}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {0, 1, 2}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {0, 1, 6}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + }, +}; + + +struct ioexp_map_s ioexp_map_maple_0abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_maple_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 4}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 5}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 4}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 5}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 2}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 3}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 2}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 3}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 1}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 1}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 6}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 6}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 2}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 6}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 6}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 2}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 6}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 2}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 6}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 1}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 5}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 1}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 5}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 1}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 5}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 1}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 5}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 4}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 4}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 3}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 3}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 3}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 3}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_1abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 2}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 6}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 6}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 4}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 5}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 1}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 5}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 1}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 5}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 2}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 3}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 1}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 3}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 3}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 6}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_3abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 4}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 5}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 2}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 6}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 2}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 6}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 2}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 3}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 1}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 5}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 1}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 5}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 1}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 4}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 4}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 6}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 3}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 3}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 4}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 1}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 6}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 4}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 1}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {1, 0, 1}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {1, 0, 6}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {1, 1, 3}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + {2, 0, 1}, /* map_reset[6] = QRESET_QSFP_N_P(X+6) */ + {2, 0, 6}, /* map_reset[7] = QRESET_QSFP_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 2}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 7}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 1, 4}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + {2, 0, 2}, /* map_lpmod[6] = LPMODE_QSFP_P(X+6) */ + {2, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {1, 0, 0}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 0, 5}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 2}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + {2, 0, 0}, /* map_modsel[6] = MODSEL_QSFP_N_P(X+6) */ + {2, 0, 5}, /* map_modsel[7] = MODSEL_QSFP_N_P(X+7) */ + }, +}; + + +/* PortType: SFP / 8 port + * Platform: Cypress, Peony_SFP + */ +struct ioexp_map_s ioexp_map_sfp_8p_layout_1 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +/* PortType: QSFP / 6 port + * Platform: Gulmohar, Peony_SFP, Peony_Copper + */ +struct ioexp_map_s ioexp_map_6p_qsfp_type_1 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +/* ========== Private functions ========== + */ +int check_channel_tier_1(void); + +struct i2c_client * +_get_i2c_client(struct ioexp_obj_s *self, + int chip_id){ + + struct ioexp_i2c_s *i2c_curr_p = self->i2c_head_p; + + if (!(i2c_curr_p)){ + SWPS_ERR("%s: i2c_curr_p is NULL\n", __func__); + return NULL; + } + while (i2c_curr_p){ + if ((i2c_curr_p->chip_id) == chip_id){ + return i2c_curr_p->i2c_client_p; + } + i2c_curr_p = i2c_curr_p->next; + } + SWPS_ERR("%s: not exist! :%d\n", __func__, chip_id); + return NULL; +} + + +static int +_common_ioexp_update_one(struct ioexp_obj_s *self, + struct ioexp_addr_s *ioexp_addr, + int chip_id, + int data_width, + int show_err, + char *caller_name) { + int buf = 0; + int err = 0; + int data_id = 0; + int r_offset = 0; + + for(data_id=0; data_idread_offset[data_id]; + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), r_offset); + /* Check error */ + if (buf < 0) { + err = 1; + if (show_err) { + SWPS_INFO("IOEXP-%d read fail! :%d \n", self->ioexp_id, buf); + SWPS_INFO("Dump: :%d :0x%02x :%d, :%s\n", + ioexp_addr->chan_id, ioexp_addr->chip_addr, + ioexp_addr->read_offset[data_id], caller_name); + } + continue; + } + /* Update IOEXP object */ + self->chip_data[chip_id].data[data_id] = (uint8_t)buf; + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +common_ioexp_update_all(struct ioexp_obj_s *self, + int show_err, + char *caller_name){ + + int err = 0; + int chip_id = 0; + int chip_amount = self->ioexp_map_p->chip_amount; + + for (chip_id=0; chip_idioexp_map_p->map_addr[chip_id]), + chip_id, + self->ioexp_map_p->data_width, + show_err, + caller_name) < 0) { + err = 1; + } + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +_common_check_by_mode(struct ioexp_obj_s *self){ + + switch (self->mode){ + case IOEXP_MODE_DIRECT: + return self->fsm_4_direct(self); + + case IOEXP_MODE_POLLING: + if (self->state >= 0){ + return 0; + } + switch (self->state){ + case STATE_IOEXP_INIT: + return ERR_IOEXP_UNINIT; + case STATE_IOEXP_ABNORMAL: + return ERR_IOEXP_ABNORMAL; + default: + return ERR_IOEXP_NOSTATE; + } + break; + + default: + break; + } + SWPS_ERR("%s: Exception occurs. :%d \n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +static int +_common_get_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + char *func_mane){ + uint8_t buf; + int err_code; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Get data form cache */ + buf = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + return (int)(buf >> bitmap_obj_p->bit_shift & 0x01); +} + + +static int +_common_set_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + int input_val, + char *func_mane){ + int err_code, target_offset; + uint8_t origin_byte; + uint8_t modify_byte; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Prepare write date */ + origin_byte = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + switch (input_val) { + case 0: + modify_byte = origin_byte; + SWP_BIT_CLEAR(modify_byte, bitmap_obj_p->bit_shift); + break; + case 1: + modify_byte = origin_byte; + SWP_BIT_SET(modify_byte, bitmap_obj_p->bit_shift); + break; + default: + SWPS_ERR("Input value incorrect! :%d :%d :%s\n", + input_val, self->ioexp_id, func_mane); + return ERR_IOEXP_BADINPUT; + } + /* Setup i2c client */ + target_offset = self->ioexp_map_p->map_addr[bitmap_obj_p->chip_id].write_offset[bitmap_obj_p->ioexp_voffset]; + /* Write byte to chip via I2C */ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, bitmap_obj_p->chip_id), + target_offset, + modify_byte); + /* Update or bollback object */ + if (err_code < 0){ + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = origin_byte; + SWPS_ERR("I2C write fail! :%d :%d :%s :%d\n", + input_val, self->ioexp_id, func_mane, err_code); + return err_code; + } + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = modify_byte; + return 0; +} + + +/* ========== Object public functions ========== + */ +int +common_get_present(struct ioexp_obj_s *self, + int virt_offset){ + + int UNPLUG = 1; + int retval = ERR_IOEXP_UNEXCPT; + + retval = _common_get_bit(self, + &(self->ioexp_map_p->map_present[virt_offset]), + "common_get_present"); + if (retval < 0) { + /* [Note] + * => Transceiver object does not need to handle IOEXP layer issues. + */ + return UNPLUG; + } + return retval; +} + + +int +common_get_tx_fault(struct ioexp_obj_s *self, + int virt_offset){ + /* [Transmit Fault (Tx_Fault)] + * A catastrophic laser fault will activate the transmitter signal, + * TX_FAULT, and disable the laser. This signal is an open collector + * output (pull-up required on the host board). A low signal indicates + * normal laser operation and a high signal indicates a fault. The + * TX_FAULT will be latched high when a laser fault occurs and is + * cleared by toggling the TX_DISABLE input or power cycling the + * transceiver. The transmitter fault condition can also be monitored + * via the two-wire serial interface. + * (address A2, byte 110, bit 2). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_fault[virt_offset]), + "common_get_tx_fault"); +} + + +int +common_get_rxlos(struct ioexp_obj_s *self, + int virt_offset){ + /* [Receiver Loss of Signal (Rx_LOS)] + * The post-amplification IC also includes transition detection circuitry + * which monitors the ac level of incoming optical signals and provides a + * TTL/CMOS compatible status signal to the host (pin 8). An adequate optical + * input results in a low Rx_LOS output while a high Rx_LOS output indicates + * an unusable optical input. The Rx_LOS thresholds are factory set so that + * a high output indicates a definite optical fault has occurred. Rx_LOS can + * also be monitored via the two-wire serial interface + * (address A2h, byte 110, bit 1). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_rxlos[virt_offset]), + "common_get_rxlos"); +} + + +int +common_get_tx_disable(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + "common_get_tx_disable"); +} + + +int +common_get_reset(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + "common_get_reset"); +} + + +int +common_get_lpmod(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + "common_get_lpmod"); +} + + +int +common_get_modsel(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + "common_get_modsel"); +} + + +int +common_get_hard_rs0(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + "common_get_hard_rs0"); +} + + +int +common_get_hard_rs1(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + "common_get_hard_rs1"); +} + + +int +common_set_tx_disable(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + input_val, + "common_set_tx_disable"); +} + + +int +common_set_reset(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + input_val, + "common_set_reset"); +} + + +int +common_set_lpmod(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + input_val, + "common_set_lpmod"); +} + + +int +common_set_modsel(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + input_val, + "common_set_modsel"); +} + + +int +common_set_hard_rs0(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + input_val, + "common_set_hard_rs0"); +} + + +int +common_set_hard_rs1(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + input_val, + "common_set_hard_rs1"); +} + + +int +ioexp_get_not_support(struct ioexp_obj_s *self, + int virt_offset){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +ioexp_set_not_support(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +fake_ioexp_init(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_ioexp_update(struct ioexp_obj_s *self){ + return 1; +} + + +int +fake_update_func(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_get_func(struct ioexp_obj_s *self, + int virt_offset){ + SWPS_WARN("Someone called fake_get_func\n"); + return -1; +} + +int +fake_set_func(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + SWPS_WARN("Someone called fake_set_func\n"); + return -1; +} + + +/* ========== Initial functions for IO Expander ========== + */ +int +common_ioexp_init(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + if (self->mode == IOEXP_MODE_DIRECT) { + goto update_common_ioexp_init; + } + if (!io_no_init) { /*normal init*/ + + /* Setup default value to each physical IO Expander */ + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + /* Get address mapping */ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("%s: IOEXP config incorrect! :%d \n", + __func__, chip_id); + return -1; + } + /* Setup default value */ + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + /* [Desc] Skip the setup default value behavior + [Note] Setup default value = -1 if you don't want to write the value to IOEXP or CPLD + */ + if(addr_p->write_offset[offset] < 0){ + SWPS_DEBUG("skip a write_offset <%d>\n", addr_p->conf_offset[offset]); + continue; + } + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->write_offset[offset], + addr_p->data_default[offset]); + if (err_code < 0){ + SWPS_ERR("%s: set default fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + } + } + } +update_common_ioexp_init: + /* Check and update info to object */ + err_code = self->update_all(self, 1, "common_ioexp_init"); + if (err_code < 0) { + SWPS_ERR("%s: update_all() fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +/* ========== Object functions for Final State Machine ========== + */ +int +_is_channel_ready(struct ioexp_obj_s *self){ + + int chip_id = 0; + int byte_id = 0; + int getval = ERR_IOEXP_UNEXCPT; + int chkval = ERR_IOEXP_UNEXCPT; + char *emsg = "ERR"; + struct ioexp_addr_s *addr_p = NULL; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++) { + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + emsg = "IOEXP config incorrect"; + goto err_is_channel_ready; + } + for (byte_id=0; byte_id<(self->ioexp_map_p->data_width); byte_id++) { + if (addr_p->conf_offset[byte_id] < 0) { + continue; + } + if ((addr_p->conf_default[byte_id]) != 0) { + goto go_is_channel_ready; + } + } + if (chip_id == ((self->ioexp_map_p->chip_amount) - 1)) { + SWPS_DEBUG("%s: no non-zero config", __func__); + break; + } + } + chip_id = 0; + byte_id = 0; + +go_is_channel_ready: + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + chkval = addr_p->conf_default[byte_id]; + getval = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[byte_id]); + + SWPS_DEBUG("%s: target info :%d :%d :%d :%d :%d\n", + __func__, self->ioexp_id, chip_id, byte_id, chkval, getval); + + if ((getval >= 0) && (getval == chkval)) { + return 1; + } + return 0; + +err_is_channel_ready: + SWPS_ERR("%s: %s :%d :%d :%d :%d :%d\n", + __func__, emsg, self->ioexp_id, chip_id, byte_id, chkval, getval); + return ERR_IOEXP_UNEXCPT; +} + + +int +_ioexp_init_handler(struct ioexp_obj_s *self){ + + int return_val; + + switch (self->mode) { + case IOEXP_MODE_DIRECT: + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + case IOEXP_MODE_POLLING: + /* Check system and channel is ready */ + if (self->state == STATE_IOEXP_INIT){ + if (!_is_channel_ready(self)){ + self->state = STATE_IOEXP_INIT; + SWPS_WARN("%s: IOEXP:%d channel not ready.\n", + __func__, self->ioexp_id); + return 0; + } + } + /* Execute initial callback */ + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + default: + break; + } + SWPS_ERR("%s: exception occur :%d\n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_direct(struct ioexp_obj_s *self){ + + int result_val; + int show_err = 1; + char *func_mane = "common_ioexp_fsm_4_direct"; + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, and return error */ + return ERR_IOEXP_UNINIT; + } + /* Case: Initial done */ + return 0; + + case STATE_IOEXP_NORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + SWPS_INFO("%s: NORMAL -> ABNORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + self->state = STATE_IOEXP_NORMAL; + return 0; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_DEBUG("%s: ABNORMAL -> NORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("%s: Exception occurs :%d\n", + __func__, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_polling(struct ioexp_obj_s *self){ + + int result_val, i, show_e; + int fail_retry = 3; + char *func_name = "common_ioexp_fsm_4_polling"; + +#ifdef DEBUG_SWPS + show_e = 1; +#else + show_e = 0; +#endif + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + /* Case: System (Channel) not ready */ + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, wait and retry */ + return 0; + } + /* Case: Initial done */ + SWPS_INFO("IOEXP-%d: initial done. :%d\n", + self->ioexp_id, self->ioexp_type); + return result_val; + + case STATE_IOEXP_NORMAL: + /* Retry mechanism for case of i2c topology not stable */ + for (i=0; iupdate_all(self, show_e, func_name); + if (result_val >= 0) { + self->state = STATE_IOEXP_NORMAL; + return 0; + } + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: detect I2C crash :%d\n", + __func__, self->ioexp_id); + break; + } + SWPS_DEBUG("IOEXP-%d: unstable :%d\n", + self->ioexp_id, result_val); + } + SWPS_INFO("IOEXP-%d: NORMAL -> ABNORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_e, func_name); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_INFO("IOEXP-%d: ABNORMAL -> NORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("IOEXP-%d: Exception occurs :%d\n", + self->ioexp_id, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +/* ========== Object private functions for check & update ========== + */ +int +common_ioexp_check(struct ioexp_obj_s *self){ + + int result; + + if (self->mode != IOEXP_MODE_POLLING){ + SWPS_ERR("%s: not polling mode :%d\n", + __func__, self->mode); + return ERR_IOEXP_NOTSUPPORT; + } + mutex_lock(&self->lock); + result = self->fsm_4_polling(self); + mutex_unlock(&self->lock); + return result; +} + + +/* ========== Functions for Factory pattern ========== + */ +static struct ioexp_map_s * +get_ioexp_map(int ioexp_type){ + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + return &ioexp_map_magnolia_nab; + case IOEXP_TYPE_MAGINOLIA_4AB: + return &ioexp_map_magnolia_4ab; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + return &ioexp_map_magnolia_7ab; + case IOEXP_TYPE_REDWOOD_P01P08: + return &ioexp_map_redwood_p01p08_p17p24; + case IOEXP_TYPE_REDWOOD_P09P16: + return &ioexp_map_redwood_p09p16_p25p32; + case IOEXP_TYPE_HUDSON32IGA_P01P08: + return &ioexp_map_hudson32iga_p01p08_p17p24; + case IOEXP_TYPE_HUDSON32IGA_P09P16: + return &ioexp_map_hudson32iga_p09p16_p25p32; + case IOEXP_TYPE_CYPRESS_7ABC: + return &ioexp_map_cypress_7abc; + case IOEXP_TYPE_TAHOE_5A: + return &ioexp_map_tahoe_5a; + case IOEXP_TYPE_TAHOE_6ABC: + return &ioexp_map_tahoe_6abc; + case IOEXP_TYPE_SEQUOIA_NABC: + return &ioexp_map_sequoia_nabc; + case IOEXP_TYPE_LAVENDER_P65: + return &ioexp_map_lavender_p65; + case CPLD_TYPE_COTTONWOOD: + return &cpld_map_cottonwood; + case IOEXP_TYPE_MAPLE_0ABC: + return &ioexp_map_maple_0abc; + case IOEXP_TYPE_MAPLE_NABC: + return &ioexp_map_maple_nabc; + case IOEXP_TYPE_GULMOHAR_NABC: + return &ioexp_map_gulmohar_nabc; + case IOEXP_TYPE_GULMOHAR_7ABC: + return &ioexp_map_gulmohar_7abc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + return &ioexp_map_gulmohar_2t_evt1_nabc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + return &ioexp_map_gulmohar_2t_evt1_1abc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + return &ioexp_map_gulmohar_2t_evt1_3abc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + return &ioexp_map_gulmohar_2t_evt1_7abc; + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + return &ioexp_map_sfp_8p_layout_1; + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + return &ioexp_map_6p_qsfp_type_1; + default: + return NULL; + } +} + + +int +setup_ioexp_ssize_attr(struct ioexp_obj_s *self, + struct ioexp_map_s *ioexp_map_p, + int ioexp_id, + int ioexp_type, + int run_mode){ + switch (run_mode){ + case IOEXP_MODE_POLLING: /* Direct access device mode */ + case IOEXP_MODE_DIRECT: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = ERR_IOEXP_UNEXCPT; + return ERR_IOEXP_UNEXCPT; + } + /* Setup mapping structure */ + self->ioexp_map_p = kzalloc(sizeof(*ioexp_map_p), GFP_KERNEL); + if (!(self->ioexp_map_p)) { + SWPS_ERR("%s: kzalloc ioexp_map_p fail\n", __func__); + return -1; + } + memcpy(self->ioexp_map_p, ioexp_map_p, sizeof(*ioexp_map_p)); + /* Setup attributes */ + self->ioexp_id = ioexp_id; + self->ioexp_type = ioexp_type; + self->state = STATE_IOEXP_INIT; + mutex_init(&self->lock); + return 0; +} + + +static int +setup_addr_mapping(struct ioexp_obj_s *self, + struct ioexp_addr_s *addr_map_p, + int chip_amount){ + struct ioexp_addr_s *tmp_p; + if (!addr_map_p){ + SWPS_ERR("%s: map is null\n", __func__); + return -1; + } + tmp_p = kzalloc((sizeof(*addr_map_p) * chip_amount), GFP_KERNEL); + if (!tmp_p){ + SWPS_ERR("%s: kzalloc fail.\n", __func__); + return -1; + } + memcpy(tmp_p, addr_map_p, (sizeof(*addr_map_p) * chip_amount)); + self->ioexp_map_p->map_addr = tmp_p; + + return 0; +} + + +static int +setup_ioexp_public_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case CPLD_TYPE_COTTONWOOD: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_GULMOHAR_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = common_get_hard_rs0; + self->get_hard_rs1 = common_get_hard_rs1; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = common_set_hard_rs0; + self->set_hard_rs1 = common_set_hard_rs1; + return 0; + + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case IOEXP_TYPE_MAPLE_0ABC: + case IOEXP_TYPE_GULMOHAR_7ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + self->get_present = common_get_present; + self->get_tx_fault = ioexp_get_not_support; + self->get_rxlos = ioexp_get_not_support; + self->get_tx_disable = ioexp_get_not_support; + self->get_reset = common_get_reset; + self->get_lpmod = common_get_lpmod; + self->get_modsel = common_get_modsel; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = ioexp_set_not_support; + self->set_reset = common_set_reset; + self->set_lpmod = common_set_lpmod; + self->set_modsel = common_set_modsel; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_ioexp_private_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case CPLD_TYPE_COTTONWOOD: + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_MAPLE_0ABC: + case IOEXP_TYPE_GULMOHAR_NABC: + case IOEXP_TYPE_GULMOHAR_7ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + self->init = common_ioexp_init; + self->check = common_ioexp_check; + self->update_all = common_ioexp_update_all; + self->fsm_4_direct = common_ioexp_fsm_4_direct; + self->fsm_4_polling = common_ioexp_fsm_4_polling; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_i2c_client_one(struct ioexp_obj_s *self, + int chip_id){ + + char *err_msg = "ERROR"; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + struct ioexp_i2c_s *i2c_obj_p = NULL; + struct ioexp_i2c_s *i2c_curr_p = NULL; + + int chan_id = self->ioexp_map_p->map_addr[chip_id].chan_id; + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + err_msg = "Can not kzalloc client!"; + goto err_ioexp_setup_i2c_1; + } + i2c_obj_p = kzalloc(sizeof(*i2c_obj_p), GFP_KERNEL); + if (!i2c_obj_p){ + err_msg = "Can not kzalloc i2c_obj_p!"; + goto err_ioexp_setup_i2c_2; + } + adap = i2c_get_adapter(chan_id); + if(!adap){ + err_msg = "Can not get adap!"; + goto err_ioexp_setup_i2c_3; + } + client->adapter = adap; + client->addr = self->ioexp_map_p->map_addr[chip_id].chip_addr; + i2c_obj_p->i2c_client_p = client; + i2c_obj_p->chip_id = chip_id; + i2c_obj_p->next = NULL; + if (!self->i2c_head_p){ + self->i2c_head_p = i2c_obj_p; + } else { + i2c_curr_p = self->i2c_head_p; + while (i2c_curr_p->next){ + i2c_curr_p = i2c_curr_p->next; + } + i2c_curr_p->next = i2c_obj_p; + } + return 0; + +err_ioexp_setup_i2c_3: + kfree(i2c_obj_p); +err_ioexp_setup_i2c_2: + kfree(client); +err_ioexp_setup_i2c_1: + SWPS_ERR("%s: %s :%d\n", __func__, err_msg, chan_id); + return -1; +} + + +static int +setup_i2c_client(struct ioexp_obj_s* self){ + + int result; + int chip_id = 0; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + result = setup_i2c_client_one(self, chip_id); + if (result < 0){ + SWPS_ERR("%s fail! :%d\n", __func__, chip_id); + return -1; + } + } + return 0; +} + + +static int +setup_ioexp_config(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + if (io_no_init) { + + SWPS_INFO("io_no_init:%d \n", io_no_init); + return 0; + } + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("IOEXP config incorrect! :%d \n",chip_id); + return -1; + } + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + /* [Desc] Skip the setup config value behavior + [Note] Setup config value = -1 if you don't want to write the value to IOEXP or CPLD + */ + if(addr_p->conf_offset[offset] < 0){ + SWPS_DEBUG("skip a config_offset <%d>\n", addr_p->conf_offset[offset]); + continue; + } + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[offset], + addr_p->conf_default[offset]); + + if (err_code < 0){ + SWPS_INFO("%s: set conf fail! :%d \n", __func__, err_code); + return -2; + } + } + } + return 0; +} + + +struct ioexp_obj_s * +_create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_map_s* ioexp_map_p; + struct ioexp_obj_s* result_p; + struct ioexp_i2c_s *i2c_curr_p; + struct ioexp_i2c_s *i2c_next_p; + + /* Get layout */ + ioexp_map_p = get_ioexp_map(ioexp_type); + if (!ioexp_map_p){ + SWPS_ERR("%s: Invalid ioexp_type\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare IOEXP object */ + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + SWPS_ERR("%s: kzalloc failure!\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare static size attributes */ + if (setup_ioexp_ssize_attr(result_p, + ioexp_map_p, + ioexp_id, + ioexp_type, + run_mode) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + /* Prepare address mapping */ + if (setup_addr_mapping(result_p, addr_map_p, ioexp_map_p->chip_amount) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + if (setup_i2c_client(result_p) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + /* Prepare call back functions of object */ + if (setup_ioexp_public_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + if (setup_ioexp_private_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + return result_p; + +err_create_ioexp_setup_i2c_fail: + i2c_curr_p = result_p->i2c_head_p; + i2c_next_p = result_p->i2c_head_p; + while (i2c_curr_p){ + i2c_next_p = i2c_curr_p->next; + if (i2c_curr_p->i2c_client_p) { + i2c_put_adapter(i2c_curr_p->i2c_client_p->adapter); + kfree(i2c_curr_p->i2c_client_p); + } + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } +err_create_ioexp_setup_attr_fail: + kfree(result_p); +err_create_ioexp_fail: + SWPS_ERR("%s: fail! :%d :%d \n", + __func__, ioexp_id, ioexp_type); + return NULL; +} + + +int +create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_obj_s *ioexp_p = NULL; + + ioexp_p = _create_ioexp_obj(ioexp_id, ioexp_type, + addr_map_p, run_mode); + if (!ioexp_p){ + return -1; + } + if (ioexp_head_p == NULL){ + ioexp_head_p = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; + } + ioexp_tail_p->next = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; +} +EXPORT_SYMBOL(create_ioexp_obj); + + +static int +_init_ioexp_obj(struct ioexp_obj_s* self) { + + char *err_msg = "ERR"; + char *func_name = "_init_ioexp_obj"; + + /* Setup IOEXP configure byte */ + if (setup_ioexp_config(self) < 0){ + err_msg = "setup_ioexp_config fail"; + goto err_init_ioexp_obj; + } + /* Setup default data */ + if (_ioexp_init_handler(self) < 0){ + err_msg = "_ioexp_init_handler fail"; + goto err_init_ioexp_obj; + } + /* Update all */ + if (self->state == STATE_IOEXP_NORMAL){ + if (self->update_all(self, 1, func_name) < 0){ + err_msg = "update_all() fail"; + goto err_init_ioexp_obj; + } + } + return 0; + +err_init_ioexp_obj: + SWPS_DEBUG("%s: %s\n", __func__, err_msg); + return -1; +} + + +int +init_ioexp_objs(void){ + /* Return value: + * 0: Success + * -1: Detect topology error + * -2: SWPS internal error + */ + struct ioexp_obj_s *curr_p = ioexp_head_p; + + if (!curr_p) { + SWPS_ERR("%s: ioexp_head_p is NULL\n", __func__); + return -2; + } + while (curr_p) { + if (_init_ioexp_obj(curr_p) < 0) { + SWPS_DEBUG("%s: _init_ioexp_obj() fail\n", __func__); + return -1; + } + curr_p = curr_p->next; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} +EXPORT_SYMBOL(init_ioexp_objs); + + +void +clean_ioexp_objs(void){ + + struct ioexp_i2c_s *i2c_curr_p = NULL; + struct ioexp_i2c_s *i2c_next_p = NULL; + struct ioexp_obj_s *ioexp_next_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + if (ioexp_head_p == NULL){ + ioexp_tail_p = NULL; + return; + } + while(ioexp_curr_p){ + ioexp_next_p = ioexp_curr_p->next; + if (ioexp_curr_p->ioexp_map_p) { + if (ioexp_curr_p->ioexp_map_p->map_addr) { + kfree(ioexp_curr_p->ioexp_map_p->map_addr); + } + kfree(ioexp_curr_p->ioexp_map_p); + } + + i2c_curr_p = ioexp_curr_p->i2c_head_p; + while (i2c_curr_p) { + i2c_next_p = i2c_curr_p->next; + if (i2c_curr_p->i2c_client_p) { + i2c_put_adapter(i2c_curr_p->i2c_client_p->adapter); + kfree(i2c_curr_p->i2c_client_p); + } + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } + kfree(ioexp_curr_p); + ioexp_curr_p = ioexp_next_p; + } + ioexp_tail_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} +EXPORT_SYMBOL(clean_ioexp_objs); + + +int +check_ioexp_objs(void){ + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while (ioexp_curr_p){ + if ( (ioexp_curr_p->check(ioexp_curr_p)) < 0){ + SWPS_INFO("check IOEXP-%d fail! :%d\n", + ioexp_curr_p->ioexp_id, ioexp_curr_p->ioexp_type); + return -1; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} +EXPORT_SYMBOL(check_ioexp_objs); + + +struct ioexp_obj_s * +get_ioexp_obj(int ioexp_id){ + + struct ioexp_obj_s *result_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + if (ioexp_curr_p->ioexp_id == ioexp_id){ + result_p = ioexp_curr_p; + break; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return result_p; +} +EXPORT_SYMBOL(get_ioexp_obj); + + +void +unlock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_unlock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } +} +EXPORT_SYMBOL(unlock_ioexp_all); + +int +lock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_lock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} +EXPORT_SYMBOL(lock_ioexp_all); + + +int +check_channel_tier_1(void) { + + if ( (!_is_channel_ready(ioexp_head_p)) && + (!_is_channel_ready(ioexp_tail_p)) ){ + return -1; + } + return 0; +} +EXPORT_SYMBOL(check_channel_tier_1); + + +static int +_scan_channel_tier_1(int force, + int show_err) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + int ready = 0; + + if (!ioexp_curr_p) { + goto err_scan_tier_1_channel; + } + while(ioexp_curr_p) { + ready = _is_channel_ready(ioexp_curr_p); + if ((!ready) && (!force)) { + goto err_scan_tier_1_channel; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; + +err_scan_tier_1_channel: + if (show_err) { + if (ioexp_curr_p) { + SWPS_INFO("%s: IOEXP-%d fail\n", __func__, ioexp_curr_p->ioexp_id); + } else { + SWPS_INFO("%s: IOEXP is null.\n", __func__); + } + } + return -1; +} + + +static int +_scan_channel_tier_1_single(void) { + + int ret = 0; + int chan_id = 0; + int fake_cid = 0; + int fake_offs = 0; + int fake_addr = 0; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + + if (ioexp_head_p->ioexp_id != ioexp_tail_p->ioexp_id) { + return 0; + } + /* Setup i2c_client */ + chan_id = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chan_id; + fake_addr = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chip_addr; + adap = i2c_get_adapter((chan_id + 1)); + if(!adap){ + SWPS_INFO("%s: Can not get adap!\n", __func__); + return 0; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + SWPS_INFO("%s: Can not kzalloc client!\n", __func__); + return 0; + } + client->adapter = adap; + client->addr = fake_addr; + /* Fouce move ioexp ptr to next */ + /*note this one will always fail so, dont need retry*/ + ret = i2c_smbus_read_byte_data(client, fake_offs); + SWPS_DEBUG("%s: move ioexp_ptr done. :%d\n", __func__, ret); + kfree(client); + return 1; +} + + +int +resync_channel_tier_1(void) { + + char *emsg = "ERR"; + + if (!ioexp_head_p) { + emsg = "ioexp_head_p is NULL"; + goto err_resync_ioexp_status_1; + } + /* Run all */ + if (ioexp_head_p->ioexp_id == ioexp_tail_p->ioexp_id) { + _scan_channel_tier_1_single(); + } else { + _scan_channel_tier_1(1, 0); + } + /* Check all */ + if (_scan_channel_tier_1(0, 1) < 0) { + emsg = "resync tier-1 channel fail"; + goto err_resync_ioexp_status_1; + } + return 0; + +err_resync_ioexp_status_1: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} +EXPORT_SYMBOL(resync_channel_tier_1); + + +/* For build single module using (Ex: ONL platform) */ +MODULE_LICENSE("GPL"); + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/io_expander.h b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/io_expander.h new file mode 100644 index 00000000000..6f9f7b46291 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/io_expander.h @@ -0,0 +1,189 @@ +#ifndef IO_EXPANDER_H +#define IO_EXPANDER_H + +#include + + +/* IOEXP type define (SFP series) */ +#define IOEXP_TYPE_MAGINOLIA_NAB (10101) +#define IOEXP_TYPE_MAGINOLIA_4AB (10102) +#define IOEXP_TYPE_MAPLE_NABC (10104) +#define IOEXP_TYPE_GULMOHAR_NABC (10105) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC (10106) +#define IOEXP_TYPE_SFP_8P_LAYOUT_1 (10107) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC (10108) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC (10109) + +/* IOEXP type define (QSFP series) */ +#define IOEXP_TYPE_MAGINOLIA_7AB (10201) +#define IOEXP_TYPE_REDWOOD_P01P08 (10202) +#define IOEXP_TYPE_REDWOOD_P09P16 (10203) +#define IOEXP_TYPE_HUDSON32IGA_P01P08 (10204) +#define IOEXP_TYPE_HUDSON32IGA_P09P16 (10205) +#define IOEXP_TYPE_SPRUCE_7AB (10206) +#define IOEXP_TYPE_CYPRESS_7ABC (10207) +#define IOEXP_TYPE_TAHOE_5A (10208) +#define IOEXP_TYPE_TAHOE_6ABC (10209) +#define IOEXP_TYPE_SEQUOIA_NABC (10210) +#define IOEXP_TYPE_LAVENDER_P65 (10211) +#define IOEXP_TYPE_MAPLE_0ABC (10212) +#define IOEXP_TYPE_GULMOHAR_7ABC (10213) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC (10214) +#define IOEXP_TYPE_QSFP_6P_LAYOUT_1 (10215) + +/* CPLD type define */ +#define CPLD_TYPE_COTTONWOOD (10301) + +/* IOEXP mode define */ +#define IOEXP_MODE_POLLING (19000) +#define IOEXP_MODE_DIRECT (19001) + +/* IOEXP state define */ +#define STATE_IOEXP_NORMAL (0) +#define STATE_IOEXP_INIT (-1) +#define STATE_IOEXP_ABNORMAL (-2) + +/* IOEXP error code define */ +#define ERR_IOEXP_NOTSUPPORT (-100) +#define ERR_IOEXP_UNINIT (-101) +#define ERR_IOEXP_BADCONF (-102) +#define ERR_IOEXP_ABNORMAL (-103) +#define ERR_IOEXP_NOSTATE (-104) +#define ERR_IOEXP_BADINPUT (-105) +#define ERR_IOEXP_UNEXCPT (-199) + +#define SWPS_INFO(fmt, args...) printk( KERN_INFO "[SWPS] " fmt, ##args) +#define SWPS_WARN(fmt, args...) printk( KERN_WARNING "[SWPS] " fmt, ##args) +#define SWPS_ERR(fmt, args...) printk( KERN_ERR "[SWPS] " fmt, ##args) + +#ifdef DEBUG_SWPS +# define SWPS_DEBUG(fmt, args...) printk( KERN_DEBUG "[SWPS] " fmt, ##args) +#else +# define SWPS_DEBUG(fmt, args...) +#endif + + +struct ioexp_addr_s { + int chan_id; + int chip_addr; + int read_offset[8]; + int write_offset[8]; + int conf_offset[8]; + uint8_t data_default[8]; + uint8_t conf_default[8]; +}; + +struct ioexp_i2c_s { + int chip_id; + struct i2c_client *i2c_client_p; + struct ioexp_i2c_s *next; +}; + + +struct ioexp_bitmap_s { + int chip_id; /* IOEXP chip id */ + int ioexp_voffset; /* IOEXP virtual offset */ + int bit_shift; +}; + +struct ioexp_map_s { + int chip_amount; /* Number of chips that IOEXP object content */ + int data_width; /* Number of (Read/Write/Config) bytes */ + struct ioexp_addr_s *map_addr; /* Chip address info */ + struct ioexp_bitmap_s map_present[10]; /* IOEXP for SFP / QSFP */ + struct ioexp_bitmap_s map_tx_disable[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_tx_fault[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_rxlos[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_reset[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_lpmod[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_modsel[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs0[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs1[10]; /* IOEXP for QSFP */ +}; + +struct ioexp_data_s { + uint8_t data[8]; +}; + +struct ioexp_obj_s { + + /* ============================ + * Object public property + * ============================ + */ + int ioexp_id; + int ioexp_type; + + /* ============================ + * Object private property + * ============================ + */ + struct ioexp_data_s chip_data[16]; /* Max: 8-ioexp in one virt-ioexp(ioexp_obj) */ + struct ioexp_map_s *ioexp_map_p; + struct ioexp_obj_s *next; + struct ioexp_i2c_s *i2c_head_p; + struct mutex lock; + int mode; + int state; + + /* =========================================== + * Object public functions + * =========================================== + */ + int (*get_present)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_fault)(struct ioexp_obj_s *self, int virt_offset); + int (*get_rxlos)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_disable)(struct ioexp_obj_s *self, int virt_offset); + int (*get_reset)(struct ioexp_obj_s *self, int virt_offset); + int (*get_lpmod)(struct ioexp_obj_s *self, int virt_offset); + int (*get_modsel)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs0)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs1)(struct ioexp_obj_s *self, int virt_offset); + int (*set_tx_disable)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_reset)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_lpmod)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_modsel)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs0)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs1)(struct ioexp_obj_s *self, int virt_offset, int input_val); + + /* =========================================== + * Object private functions + * =========================================== + */ + int (*init)(struct ioexp_obj_s *self); + int (*check)(struct ioexp_obj_s *self); + int (*update_all)(struct ioexp_obj_s *self, int show_err, char *caller_name); + int (*fsm_4_direct)(struct ioexp_obj_s* self); + int (*fsm_4_polling)(struct ioexp_obj_s* self); +}; + + +struct ioexp_obj_s* get_ioexp_obj(int ioexp_id); +int create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode); +int init_ioexp_objs(void); +int check_ioexp_objs(void); +void clean_ioexp_objs(void); + +void unlock_ioexp_all(void); +int lock_ioexp_all(void); + +int check_channel_tier_1(void); +int resync_channel_tier_1(void); + +/* Macro for bit control */ +#define SWP_BIT_SET(byte_val,bit_shift) ((byte_val) |= (1<<(bit_shift))) +#define SWP_BIT_CLEAR(byte_val,bit_shift) ((byte_val) &= ~(1<<(bit_shift))) + + +#endif /* IO_EXPANDER_H */ + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/lpc_ich.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/lpc_ich.c new file mode 100644 index 00000000000..21e4824d6e3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/lpc_ich.c @@ -0,0 +1,1149 @@ +/* + * lpc_ich.c - LPC interface for Intel ICH + * + * LPC bridge function of the Intel ICH contains many other + * functional units, such as Interrupt controllers, Timers, + * Power Management, System Management, GPIO, RTC, and LPC + * Configuration Registers. + * + * This driver is derived from lpc_sch. + + * Copyright (c) 2011 Extreme Engineering Solution, Inc. + * Author: Aaron Sierra + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License 2 as published + * by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + * + * This driver supports the following I/O Controller hubs: + * (See the intel documentation on http://developer.intel.com.) + * document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO) + * document number 290687-002, 298242-027: 82801BA (ICH2) + * document number 290733-003, 290739-013: 82801CA (ICH3-S) + * document number 290716-001, 290718-007: 82801CAM (ICH3-M) + * document number 290744-001, 290745-025: 82801DB (ICH4) + * document number 252337-001, 252663-008: 82801DBM (ICH4-M) + * document number 273599-001, 273645-002: 82801E (C-ICH) + * document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R) + * document number 300641-004, 300884-013: 6300ESB + * document number 301473-002, 301474-026: 82801F (ICH6) + * document number 313082-001, 313075-006: 631xESB, 632xESB + * document number 307013-003, 307014-024: 82801G (ICH7) + * document number 322896-001, 322897-001: NM10 + * document number 313056-003, 313057-017: 82801H (ICH8) + * document number 316972-004, 316973-012: 82801I (ICH9) + * document number 319973-002, 319974-002: 82801J (ICH10) + * document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH) + * document number 320066-003, 320257-008: EP80597 (IICH) + * document number 324645-001, 324646-001: Cougar Point (CPT) + * document number TBD : Patsburg (PBG) + * document number TBD : DH89xxCC + * document number TBD : Panther Point + * document number TBD : Lynx Point + * document number TBD : Lynx Point-LP + * document number TBD : Wellsburg + * document number TBD : Avoton SoC + * document number TBD : Coleto Creek + * document number TBD : Wildcat Point-LP + * document number TBD : 9 Series + * document number TBD : Lewisburg + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include + +#define ACPIBASE 0x40 +#define ACPIBASE_GPE_OFF 0x28 +#define ACPIBASE_GPE_END 0x2f +#define ACPIBASE_SMI_OFF 0x30 +#define ACPIBASE_SMI_END 0x33 +#define ACPIBASE_PMC_OFF 0x08 +#define ACPIBASE_PMC_END 0x0c +#define ACPIBASE_TCO_OFF 0x60 +#define ACPIBASE_TCO_END 0x7f +#define ACPICTRL_PMCBASE 0x44 + +#define ACPIBASE_GCS_OFF 0x3410 +#define ACPIBASE_GCS_END 0x3414 + +#define GPIOBASE_ICH0 0x58 +#define GPIOCTRL_ICH0 0x5C +#define GPIOBASE_ICH6 0x48 +#define GPIOCTRL_ICH6 0x4C + +#define RCBABASE 0xf0 + +#define wdt_io_res(i) wdt_res(0, i) +#define wdt_mem_res(i) wdt_res(ICH_RES_MEM_OFF, i) +#define wdt_res(b, i) (&wdt_ich_res[(b) + (i)]) + +struct lpc_ich_priv { + int chipset; + + int abase; /* ACPI base */ + int actrl_pbase; /* ACPI control or PMC base */ + int gbase; /* GPIO base */ + int gctrl; /* GPIO control */ + + int abase_save; /* Cached ACPI base value */ + int actrl_pbase_save; /* Cached ACPI control or PMC base value */ + int gctrl_save; /* Cached GPIO control value */ +}; + +static struct resource wdt_ich_res[] = { + /* ACPI - TCO */ + { + .flags = IORESOURCE_IO, + }, + /* ACPI - SMI */ + { + .flags = IORESOURCE_IO, + }, + /* GCS or PMC */ + { + .flags = IORESOURCE_MEM, + }, +}; + +static struct resource gpio_ich_res[] = { + /* GPIO */ + { + .flags = IORESOURCE_IO, + }, + /* ACPI - GPE0 */ + { + .flags = IORESOURCE_IO, + }, +}; + +static struct mfd_cell lpc_ich_wdt_cell = { + .name = "iTCO_wdt", + .num_resources = ARRAY_SIZE(wdt_ich_res), + .resources = wdt_ich_res, + .ignore_resource_conflicts = true, +}; + +static struct mfd_cell lpc_ich_gpio_cell = { + .name = "gpio_ich", + .num_resources = ARRAY_SIZE(gpio_ich_res), + .resources = gpio_ich_res, + .ignore_resource_conflicts = true, +}; + +/* chipset related info */ +enum lpc_chipsets { + LPC_ICH = 0, /* ICH */ + LPC_ICH0, /* ICH0 */ + LPC_ICH2, /* ICH2 */ + LPC_ICH2M, /* ICH2-M */ + LPC_ICH3, /* ICH3-S */ + LPC_ICH3M, /* ICH3-M */ + LPC_ICH4, /* ICH4 */ + LPC_ICH4M, /* ICH4-M */ + LPC_CICH, /* C-ICH */ + LPC_ICH5, /* ICH5 & ICH5R */ + LPC_6300ESB, /* 6300ESB */ + LPC_ICH6, /* ICH6 & ICH6R */ + LPC_ICH6M, /* ICH6-M */ + LPC_ICH6W, /* ICH6W & ICH6RW */ + LPC_631XESB, /* 631xESB/632xESB */ + LPC_ICH7, /* ICH7 & ICH7R */ + LPC_ICH7DH, /* ICH7DH */ + LPC_ICH7M, /* ICH7-M & ICH7-U */ + LPC_ICH7MDH, /* ICH7-M DH */ + LPC_NM10, /* NM10 */ + LPC_ICH8, /* ICH8 & ICH8R */ + LPC_ICH8DH, /* ICH8DH */ + LPC_ICH8DO, /* ICH8DO */ + LPC_ICH8M, /* ICH8M */ + LPC_ICH8ME, /* ICH8M-E */ + LPC_ICH9, /* ICH9 */ + LPC_ICH9R, /* ICH9R */ + LPC_ICH9DH, /* ICH9DH */ + LPC_ICH9DO, /* ICH9DO */ + LPC_ICH9M, /* ICH9M */ + LPC_ICH9ME, /* ICH9M-E */ + LPC_ICH10, /* ICH10 */ + LPC_ICH10R, /* ICH10R */ + LPC_ICH10D, /* ICH10D */ + LPC_ICH10DO, /* ICH10DO */ + LPC_PCH, /* PCH Desktop Full Featured */ + LPC_PCHM, /* PCH Mobile Full Featured */ + LPC_P55, /* P55 */ + LPC_PM55, /* PM55 */ + LPC_H55, /* H55 */ + LPC_QM57, /* QM57 */ + LPC_H57, /* H57 */ + LPC_HM55, /* HM55 */ + LPC_Q57, /* Q57 */ + LPC_HM57, /* HM57 */ + LPC_PCHMSFF, /* PCH Mobile SFF Full Featured */ + LPC_QS57, /* QS57 */ + LPC_3400, /* 3400 */ + LPC_3420, /* 3420 */ + LPC_3450, /* 3450 */ + LPC_EP80579, /* EP80579 */ + LPC_CPT, /* Cougar Point */ + LPC_CPTD, /* Cougar Point Desktop */ + LPC_CPTM, /* Cougar Point Mobile */ + LPC_PBG, /* Patsburg */ + LPC_DH89XXCC, /* DH89xxCC */ + LPC_PPT, /* Panther Point */ + LPC_LPT, /* Lynx Point */ + LPC_LPT_LP, /* Lynx Point-LP */ + LPC_WBG, /* Wellsburg */ + LPC_AVN, /* Avoton SoC */ + LPC_BAYTRAIL, /* Bay Trail SoC */ + LPC_COLETO, /* Coleto Creek */ + LPC_WPT_LP, /* Wildcat Point-LP */ + LPC_BRASWELL, /* Braswell SoC */ + LPC_LEWISBURG, /* Lewisburg */ + LPC_9S, /* 9 Series */ + LPC_APL, /* Apollo Lake SoC */ + LPC_GLK, /* Gemini Lake SoC */ + LPC_COUGARMOUNTAIN,/* Cougar Mountain SoC*/ +}; + +static struct lpc_ich_info lpc_chipset_info[] = { + [LPC_ICH] = { + .name = "ICH", + .iTCO_version = 1, + }, + [LPC_ICH0] = { + .name = "ICH0", + .iTCO_version = 1, + }, + [LPC_ICH2] = { + .name = "ICH2", + .iTCO_version = 1, + }, + [LPC_ICH2M] = { + .name = "ICH2-M", + .iTCO_version = 1, + }, + [LPC_ICH3] = { + .name = "ICH3-S", + .iTCO_version = 1, + }, + [LPC_ICH3M] = { + .name = "ICH3-M", + .iTCO_version = 1, + }, + [LPC_ICH4] = { + .name = "ICH4", + .iTCO_version = 1, + }, + [LPC_ICH4M] = { + .name = "ICH4-M", + .iTCO_version = 1, + }, + [LPC_CICH] = { + .name = "C-ICH", + .iTCO_version = 1, + }, + [LPC_ICH5] = { + .name = "ICH5 or ICH5R", + .iTCO_version = 1, + }, + [LPC_6300ESB] = { + .name = "6300ESB", + .iTCO_version = 1, + }, + [LPC_ICH6] = { + .name = "ICH6 or ICH6R", + .iTCO_version = 2, + .gpio_version = ICH_V6_GPIO, + }, + [LPC_ICH6M] = { + .name = "ICH6-M", + .iTCO_version = 2, + .gpio_version = ICH_V6_GPIO, + }, + [LPC_ICH6W] = { + .name = "ICH6W or ICH6RW", + .iTCO_version = 2, + .gpio_version = ICH_V6_GPIO, + }, + [LPC_631XESB] = { + .name = "631xESB/632xESB", + .iTCO_version = 2, + .gpio_version = ICH_V6_GPIO, + }, + [LPC_ICH7] = { + .name = "ICH7 or ICH7R", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH7DH] = { + .name = "ICH7DH", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH7M] = { + .name = "ICH7-M or ICH7-U", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH7MDH] = { + .name = "ICH7-M DH", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_NM10] = { + .name = "NM10", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH8] = { + .name = "ICH8 or ICH8R", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH8DH] = { + .name = "ICH8DH", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH8DO] = { + .name = "ICH8DO", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH8M] = { + .name = "ICH8M", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH8ME] = { + .name = "ICH8M-E", + .iTCO_version = 2, + .gpio_version = ICH_V7_GPIO, + }, + [LPC_ICH9] = { + .name = "ICH9", + .iTCO_version = 2, + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9R] = { + .name = "ICH9R", + .iTCO_version = 2, + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9DH] = { + .name = "ICH9DH", + .iTCO_version = 2, + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9DO] = { + .name = "ICH9DO", + .iTCO_version = 2, + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9M] = { + .name = "ICH9M", + .iTCO_version = 2, + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH9ME] = { + .name = "ICH9M-E", + .iTCO_version = 2, + .gpio_version = ICH_V9_GPIO, + }, + [LPC_ICH10] = { + .name = "ICH10", + .iTCO_version = 2, + .gpio_version = ICH_V10CONS_GPIO, + }, + [LPC_ICH10R] = { + .name = "ICH10R", + .iTCO_version = 2, + .gpio_version = ICH_V10CONS_GPIO, + }, + [LPC_ICH10D] = { + .name = "ICH10D", + .iTCO_version = 2, + .gpio_version = ICH_V10CORP_GPIO, + }, + [LPC_ICH10DO] = { + .name = "ICH10DO", + .iTCO_version = 2, + .gpio_version = ICH_V10CORP_GPIO, + }, + [LPC_PCH] = { + .name = "PCH Desktop Full Featured", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_PCHM] = { + .name = "PCH Mobile Full Featured", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_P55] = { + .name = "P55", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_PM55] = { + .name = "PM55", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_H55] = { + .name = "H55", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_QM57] = { + .name = "QM57", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_H57] = { + .name = "H57", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_HM55] = { + .name = "HM55", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_Q57] = { + .name = "Q57", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_HM57] = { + .name = "HM57", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_PCHMSFF] = { + .name = "PCH Mobile SFF Full Featured", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_QS57] = { + .name = "QS57", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_3400] = { + .name = "3400", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_3420] = { + .name = "3420", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_3450] = { + .name = "3450", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_EP80579] = { + .name = "EP80579", + .iTCO_version = 2, + }, + [LPC_CPT] = { + .name = "Cougar Point", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_CPTD] = { + .name = "Cougar Point Desktop", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_CPTM] = { + .name = "Cougar Point Mobile", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_PBG] = { + .name = "Patsburg", + .iTCO_version = 2, + }, + [LPC_DH89XXCC] = { + .name = "DH89xxCC", + .iTCO_version = 2, + }, + [LPC_PPT] = { + .name = "Panther Point", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_LPT] = { + .name = "Lynx Point", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_LPT_LP] = { + .name = "Lynx Point_LP", + .iTCO_version = 2, + }, + [LPC_WBG] = { + .name = "Wellsburg", + .iTCO_version = 2, + }, + [LPC_AVN] = { + .name = "Avoton SoC", + .iTCO_version = 3, + .gpio_version = AVOTON_GPIO, + }, + [LPC_BAYTRAIL] = { + .name = "Bay Trail SoC", + .iTCO_version = 3, + }, + [LPC_COLETO] = { + .name = "Coleto Creek", + .iTCO_version = 2, + }, + [LPC_WPT_LP] = { + .name = "Wildcat Point_LP", + .iTCO_version = 2, + }, + [LPC_BRASWELL] = { + .name = "Braswell SoC", + .iTCO_version = 3, + }, + [LPC_LEWISBURG] = { + .name = "Lewisburg", + .iTCO_version = 2, + }, + [LPC_9S] = { + .name = "9 Series", + .iTCO_version = 2, + .gpio_version = ICH_V5_GPIO, + }, + [LPC_APL] = { + .name = "Apollo Lake SoC", + .iTCO_version = 5, + }, + [LPC_GLK] = { + .name = "Gemini Lake SoC", + }, + [LPC_COUGARMOUNTAIN] = { + .name = "Cougar Mountain SoC", + .iTCO_version = 3, + }, +}; + +/* + * This data only exists for exporting the supported PCI ids + * via MODULE_DEVICE_TABLE. We do not actually register a + * pci_driver, because the I/O Controller Hub has also other + * functions that probably will be registered by other drivers. + */ +static const struct pci_device_id lpc_ich_ids[] = { + { PCI_VDEVICE(INTEL, 0x0f1c), LPC_BAYTRAIL}, + { PCI_VDEVICE(INTEL, 0x1c41), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c42), LPC_CPTD}, + { PCI_VDEVICE(INTEL, 0x1c43), LPC_CPTM}, + { PCI_VDEVICE(INTEL, 0x1c44), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c45), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c46), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c47), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c48), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c49), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4a), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4b), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4c), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4d), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4e), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c4f), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c50), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c51), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c52), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c53), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c54), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c55), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c56), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c57), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c58), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c59), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5a), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5b), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5c), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5d), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5e), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1c5f), LPC_CPT}, + { PCI_VDEVICE(INTEL, 0x1d40), LPC_PBG}, + { PCI_VDEVICE(INTEL, 0x1d41), LPC_PBG}, + { PCI_VDEVICE(INTEL, 0x1e40), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e41), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e42), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e43), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e44), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e45), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e46), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e47), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e48), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e49), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4a), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4b), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4c), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4d), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4e), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e4f), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e50), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e51), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e52), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e53), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e54), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e55), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e56), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e57), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e58), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e59), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5a), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5b), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5c), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5d), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5e), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1e5f), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1f38), LPC_AVN}, + { PCI_VDEVICE(INTEL, 0x1f39), LPC_AVN}, + { PCI_VDEVICE(INTEL, 0x1f3a), LPC_AVN}, + { PCI_VDEVICE(INTEL, 0x1f3b), LPC_AVN}, + { PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL}, + { PCI_VDEVICE(INTEL, 0x2310), LPC_DH89XXCC}, + { PCI_VDEVICE(INTEL, 0x2390), LPC_COLETO}, + { PCI_VDEVICE(INTEL, 0x2410), LPC_ICH}, + { PCI_VDEVICE(INTEL, 0x2420), LPC_ICH0}, + { PCI_VDEVICE(INTEL, 0x2440), LPC_ICH2}, + { PCI_VDEVICE(INTEL, 0x244c), LPC_ICH2M}, + { PCI_VDEVICE(INTEL, 0x2450), LPC_CICH}, + { PCI_VDEVICE(INTEL, 0x2480), LPC_ICH3}, + { PCI_VDEVICE(INTEL, 0x248c), LPC_ICH3M}, + { PCI_VDEVICE(INTEL, 0x24c0), LPC_ICH4}, + { PCI_VDEVICE(INTEL, 0x24cc), LPC_ICH4M}, + { PCI_VDEVICE(INTEL, 0x24d0), LPC_ICH5}, + { PCI_VDEVICE(INTEL, 0x25a1), LPC_6300ESB}, + { PCI_VDEVICE(INTEL, 0x2640), LPC_ICH6}, + { PCI_VDEVICE(INTEL, 0x2641), LPC_ICH6M}, + { PCI_VDEVICE(INTEL, 0x2642), LPC_ICH6W}, + { PCI_VDEVICE(INTEL, 0x2670), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2671), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2672), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2673), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2674), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2675), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2676), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2677), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2678), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2679), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267a), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267b), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267c), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267d), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267e), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267f), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x27b0), LPC_ICH7DH}, + { PCI_VDEVICE(INTEL, 0x27b8), LPC_ICH7}, + { PCI_VDEVICE(INTEL, 0x27b9), LPC_ICH7M}, + { PCI_VDEVICE(INTEL, 0x27bc), LPC_NM10}, + { PCI_VDEVICE(INTEL, 0x27bd), LPC_ICH7MDH}, + { PCI_VDEVICE(INTEL, 0x2810), LPC_ICH8}, + { PCI_VDEVICE(INTEL, 0x2811), LPC_ICH8ME}, + { PCI_VDEVICE(INTEL, 0x2812), LPC_ICH8DH}, + { PCI_VDEVICE(INTEL, 0x2814), LPC_ICH8DO}, + { PCI_VDEVICE(INTEL, 0x2815), LPC_ICH8M}, + { PCI_VDEVICE(INTEL, 0x2912), LPC_ICH9DH}, + { PCI_VDEVICE(INTEL, 0x2914), LPC_ICH9DO}, + { PCI_VDEVICE(INTEL, 0x2916), LPC_ICH9R}, + { PCI_VDEVICE(INTEL, 0x2917), LPC_ICH9ME}, + { PCI_VDEVICE(INTEL, 0x2918), LPC_ICH9}, + { PCI_VDEVICE(INTEL, 0x2919), LPC_ICH9M}, + { PCI_VDEVICE(INTEL, 0x3197), LPC_GLK}, + { PCI_VDEVICE(INTEL, 0x2b9c), LPC_COUGARMOUNTAIN}, + { PCI_VDEVICE(INTEL, 0x3a14), LPC_ICH10DO}, + { PCI_VDEVICE(INTEL, 0x3a16), LPC_ICH10R}, + { PCI_VDEVICE(INTEL, 0x3a18), LPC_ICH10}, + { PCI_VDEVICE(INTEL, 0x3a1a), LPC_ICH10D}, + { PCI_VDEVICE(INTEL, 0x3b00), LPC_PCH}, + { PCI_VDEVICE(INTEL, 0x3b01), LPC_PCHM}, + { PCI_VDEVICE(INTEL, 0x3b02), LPC_P55}, + { PCI_VDEVICE(INTEL, 0x3b03), LPC_PM55}, + { PCI_VDEVICE(INTEL, 0x3b06), LPC_H55}, + { PCI_VDEVICE(INTEL, 0x3b07), LPC_QM57}, + { PCI_VDEVICE(INTEL, 0x3b08), LPC_H57}, + { PCI_VDEVICE(INTEL, 0x3b09), LPC_HM55}, + { PCI_VDEVICE(INTEL, 0x3b0a), LPC_Q57}, + { PCI_VDEVICE(INTEL, 0x3b0b), LPC_HM57}, + { PCI_VDEVICE(INTEL, 0x3b0d), LPC_PCHMSFF}, + { PCI_VDEVICE(INTEL, 0x3b0f), LPC_QS57}, + { PCI_VDEVICE(INTEL, 0x3b12), LPC_3400}, + { PCI_VDEVICE(INTEL, 0x3b14), LPC_3420}, + { PCI_VDEVICE(INTEL, 0x3b16), LPC_3450}, + { PCI_VDEVICE(INTEL, 0x5031), LPC_EP80579}, + { PCI_VDEVICE(INTEL, 0x5ae8), LPC_APL}, + { PCI_VDEVICE(INTEL, 0x8c40), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c41), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c42), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c43), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c44), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c45), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c46), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c47), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c48), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c49), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4a), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4b), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4c), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4d), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4e), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c4f), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c50), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c51), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c52), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c53), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c54), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c55), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c56), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c57), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c58), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c59), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5a), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5b), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5c), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5d), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5e), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8c5f), LPC_LPT}, + { PCI_VDEVICE(INTEL, 0x8cc1), LPC_9S}, + { PCI_VDEVICE(INTEL, 0x8cc2), LPC_9S}, + { PCI_VDEVICE(INTEL, 0x8cc3), LPC_9S}, + { PCI_VDEVICE(INTEL, 0x8cc4), LPC_9S}, + { PCI_VDEVICE(INTEL, 0x8cc6), LPC_9S}, + { PCI_VDEVICE(INTEL, 0x8d40), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d41), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d42), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d43), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d44), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d45), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d46), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d47), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d48), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d49), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4a), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4b), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4c), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4d), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4e), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d4f), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d50), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d51), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d52), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d53), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d54), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d55), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d56), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d57), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d58), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d59), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5a), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5b), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5c), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5d), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5e), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x8d5f), LPC_WBG}, + { PCI_VDEVICE(INTEL, 0x9c40), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c41), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c42), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c43), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c44), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c45), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c46), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c47), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc1), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc2), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc3), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc5), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc6), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc7), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc9), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0xa1c1), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa1c2), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa1c3), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa1c4), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa1c5), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa1c6), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa1c7), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa242), LPC_LEWISBURG}, + { PCI_VDEVICE(INTEL, 0xa243), LPC_LEWISBURG}, + { 0, }, /* End of list */ +}; +MODULE_DEVICE_TABLE(pci, lpc_ich_ids); + +static void lpc_ich_restore_config_space(struct pci_dev *dev) +{ + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + + if (priv->abase_save >= 0) { + pci_write_config_byte(dev, priv->abase, priv->abase_save); + priv->abase_save = -1; + } + + if (priv->actrl_pbase_save >= 0) { + pci_write_config_byte(dev, priv->actrl_pbase, + priv->actrl_pbase_save); + priv->actrl_pbase_save = -1; + } + + if (priv->gctrl_save >= 0) { + pci_write_config_byte(dev, priv->gctrl, priv->gctrl_save); + priv->gctrl_save = -1; + } +} + +static void lpc_ich_enable_acpi_space(struct pci_dev *dev) +{ + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + u8 reg_save; + + switch (lpc_chipset_info[priv->chipset].iTCO_version) { + case 3: + /* + * Some chipsets (eg Avoton) enable the ACPI space in the + * ACPI BASE register. + */ + pci_read_config_byte(dev, priv->abase, ®_save); + pci_write_config_byte(dev, priv->abase, reg_save | 0x2); + priv->abase_save = reg_save; + break; + default: + /* + * Most chipsets enable the ACPI space in the ACPI control + * register. + */ + pci_read_config_byte(dev, priv->actrl_pbase, ®_save); + pci_write_config_byte(dev, priv->actrl_pbase, reg_save | 0x80); + priv->actrl_pbase_save = reg_save; + break; + } +} + +static void lpc_ich_enable_gpio_space(struct pci_dev *dev) +{ + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + u8 reg_save; + + pci_read_config_byte(dev, priv->gctrl, ®_save); + pci_write_config_byte(dev, priv->gctrl, reg_save | 0x10); + priv->gctrl_save = reg_save; +} + +static void lpc_ich_enable_pmc_space(struct pci_dev *dev) +{ + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + u8 reg_save; + + pci_read_config_byte(dev, priv->actrl_pbase, ®_save); + pci_write_config_byte(dev, priv->actrl_pbase, reg_save | 0x2); + + priv->actrl_pbase_save = reg_save; +} + +static int lpc_ich_finalize_wdt_cell(struct pci_dev *dev) +{ + struct itco_wdt_platform_data *pdata; + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + struct lpc_ich_info *info; + struct mfd_cell *cell = &lpc_ich_wdt_cell; + + pdata = devm_kzalloc(&dev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + info = &lpc_chipset_info[priv->chipset]; + + pdata->version = info->iTCO_version; + strlcpy(pdata->name, info->name, sizeof(pdata->name)); + + cell->platform_data = pdata; + cell->pdata_size = sizeof(*pdata); + return 0; +} + +static void lpc_ich_finalize_gpio_cell(struct pci_dev *dev) +{ + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + struct mfd_cell *cell = &lpc_ich_gpio_cell; + + cell->platform_data = &lpc_chipset_info[priv->chipset]; + cell->pdata_size = sizeof(struct lpc_ich_info); +} + +/* + * We don't check for resource conflict globally. There are 2 or 3 independent + * GPIO groups and it's enough to have access to one of these to instantiate + * the device. + */ +static int lpc_ich_check_conflict_gpio(struct resource *res) +{ + int ret; + u8 use_gpio = 0; + + if (resource_size(res) >= 0x50 && + !acpi_check_region(res->start + 0x40, 0x10, "LPC ICH GPIO3")) + use_gpio |= 1 << 2; + + if (!acpi_check_region(res->start + 0x30, 0x10, "LPC ICH GPIO2")) + use_gpio |= 1 << 1; + + ret = acpi_check_region(res->start + 0x00, 0x30, "LPC ICH GPIO1"); + if (!ret) + use_gpio |= 1 << 0; + + return use_gpio ? use_gpio : ret; +} + +static int lpc_ich_init_gpio(struct pci_dev *dev) +{ + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + u32 base_addr_cfg; + u32 base_addr; + int ret; + bool acpi_conflict = false; + struct resource *res; + + /* Setup power management base register */ + pci_read_config_dword(dev, priv->abase, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + dev_notice(&dev->dev, "I/O space for ACPI uninitialized\n"); + lpc_ich_gpio_cell.num_resources--; + goto gpe0_done; + } + + res = &gpio_ich_res[ICH_RES_GPE0]; + res->start = base_addr + ACPIBASE_GPE_OFF; + res->end = base_addr + ACPIBASE_GPE_END; + ret = acpi_check_resource_conflict(res); + if (ret) { + /* + * This isn't fatal for the GPIO, but we have to make sure that + * the platform_device subsystem doesn't see this resource + * or it will register an invalid region. + */ + lpc_ich_gpio_cell.num_resources--; + acpi_conflict = true; + } else { + lpc_ich_enable_acpi_space(dev); + } + +gpe0_done: + /* Setup GPIO base register */ + pci_read_config_dword(dev, priv->gbase, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + dev_notice(&dev->dev, "I/O space for GPIO uninitialized\n"); + ret = -ENODEV; + goto gpio_done; + } + + /* Older devices provide fewer GPIO and have a smaller resource size. */ + res = &gpio_ich_res[ICH_RES_GPIO]; + res->start = base_addr; + switch (lpc_chipset_info[priv->chipset].gpio_version) { + case ICH_V5_GPIO: + case ICH_V10CORP_GPIO: + res->end = res->start + 128 - 1; + break; + default: + res->end = res->start + 64 - 1; + break; + } + + ret = lpc_ich_check_conflict_gpio(res); + if (ret < 0) { + /* this isn't necessarily fatal for the GPIO */ + acpi_conflict = true; + goto gpio_done; + } + lpc_chipset_info[priv->chipset].use_gpio = ret; + lpc_ich_enable_gpio_space(dev); + + lpc_ich_finalize_gpio_cell(dev); + ret = mfd_add_devices(&dev->dev, PLATFORM_DEVID_AUTO, + &lpc_ich_gpio_cell, 1, NULL, 0, NULL); + +gpio_done: + if (acpi_conflict) + pr_warn("Resource conflict(s) found affecting %s\n", + lpc_ich_gpio_cell.name); + return ret; +} + +static int lpc_ich_init_wdt(struct pci_dev *dev) +{ + struct lpc_ich_priv *priv = pci_get_drvdata(dev); + u32 base_addr_cfg; + u32 base_addr; + int ret; + struct resource *res; + + /* If we have ACPI based watchdog use that instead */ + if (acpi_has_watchdog()) + return -ENODEV; + + /* Setup power management base register */ + pci_read_config_dword(dev, priv->abase, &base_addr_cfg); + base_addr = base_addr_cfg & 0x0000ff80; + if (!base_addr) { + dev_notice(&dev->dev, "I/O space for ACPI uninitialized\n"); + ret = -ENODEV; + goto wdt_done; + } + + res = wdt_io_res(ICH_RES_IO_TCO); + res->start = base_addr + ACPIBASE_TCO_OFF; + res->end = base_addr + ACPIBASE_TCO_END; + + res = wdt_io_res(ICH_RES_IO_SMI); + res->start = base_addr + ACPIBASE_SMI_OFF; + res->end = base_addr + ACPIBASE_SMI_END; + + lpc_ich_enable_acpi_space(dev); + + /* + * iTCO v2: + * Get the Memory-Mapped GCS register. To get access to it + * we have to read RCBA from PCI Config space 0xf0 and use + * it as base. GCS = RCBA + ICH6_GCS(0x3410). + * + * iTCO v3: + * Get the Power Management Configuration register. To get access + * to it we have to read the PMC BASE from config space and address + * the register at offset 0x8. + */ + if (lpc_chipset_info[priv->chipset].iTCO_version == 1) { + /* Don't register iomem for TCO ver 1 */ + lpc_ich_wdt_cell.num_resources--; + } else if (lpc_chipset_info[priv->chipset].iTCO_version == 2) { + pci_read_config_dword(dev, RCBABASE, &base_addr_cfg); + base_addr = base_addr_cfg & 0xffffc000; + if (!(base_addr_cfg & 1)) { + dev_notice(&dev->dev, "RCBA is disabled by " + "hardware/BIOS, device disabled\n"); + ret = -ENODEV; + goto wdt_done; + } + res = wdt_mem_res(ICH_RES_MEM_GCS_PMC); + res->start = base_addr + ACPIBASE_GCS_OFF; + res->end = base_addr + ACPIBASE_GCS_END; + } else if (lpc_chipset_info[priv->chipset].iTCO_version == 3) { + lpc_ich_enable_pmc_space(dev); + pci_read_config_dword(dev, ACPICTRL_PMCBASE, &base_addr_cfg); + base_addr = base_addr_cfg & 0xfffffe00; + + res = wdt_mem_res(ICH_RES_MEM_GCS_PMC); + res->start = base_addr + ACPIBASE_PMC_OFF; + res->end = base_addr + ACPIBASE_PMC_END; + } + + ret = lpc_ich_finalize_wdt_cell(dev); + if (ret) + goto wdt_done; + + ret = mfd_add_devices(&dev->dev, PLATFORM_DEVID_AUTO, + &lpc_ich_wdt_cell, 1, NULL, 0, NULL); + +wdt_done: + return ret; +} + +static int lpc_ich_probe(struct pci_dev *dev, + const struct pci_device_id *id) +{ + struct lpc_ich_priv *priv; + int ret; + bool cell_added = false; + + priv = devm_kzalloc(&dev->dev, + sizeof(struct lpc_ich_priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->chipset = id->driver_data; + + priv->actrl_pbase_save = -1; + priv->abase_save = -1; + + priv->abase = ACPIBASE; + priv->actrl_pbase = ACPICTRL_PMCBASE; + + priv->gctrl_save = -1; + if (priv->chipset <= LPC_ICH5) { + priv->gbase = GPIOBASE_ICH0; + priv->gctrl = GPIOCTRL_ICH0; + } else { + priv->gbase = GPIOBASE_ICH6; + priv->gctrl = GPIOCTRL_ICH6; + } + + pci_set_drvdata(dev, priv); + + if (lpc_chipset_info[priv->chipset].iTCO_version) { + ret = lpc_ich_init_wdt(dev); + if (!ret) + cell_added = true; + } + + if (lpc_chipset_info[priv->chipset].gpio_version) { + ret = lpc_ich_init_gpio(dev); + if (!ret) + cell_added = true; + } + + /* + * We only care if at least one or none of the cells registered + * successfully. + */ + if (!cell_added) { + dev_warn(&dev->dev, "No MFD cells added\n"); + lpc_ich_restore_config_space(dev); + return -ENODEV; + } + + return 0; +} + +static void lpc_ich_remove(struct pci_dev *dev) +{ + mfd_remove_devices(&dev->dev); + lpc_ich_restore_config_space(dev); +} + +static struct pci_driver lpc_ich_driver = { + .name = "lpc_ich", + .id_table = lpc_ich_ids, + .probe = lpc_ich_probe, + .remove = lpc_ich_remove, +}; + +module_pci_driver(lpc_ich_driver); + +MODULE_AUTHOR("Aaron Sierra "); +MODULE_DESCRIPTION("LPC interface for Intel ICH"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/pmbus.h new file mode 100644 index 00000000000..4efa2bd4f6d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/pmbus.h @@ -0,0 +1,425 @@ +/* + * pmbus.h - Common defines and structures for PMBus devices + * + * Copyright (c) 2010, 2011 Ericsson AB. + * Copyright (c) 2012 Guenter Roeck + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef PMBUS_H +#define PMBUS_H + +#include +#include + +/* + * Registers + */ +enum pmbus_regs { + PMBUS_PAGE = 0x00, + PMBUS_OPERATION = 0x01, + PMBUS_ON_OFF_CONFIG = 0x02, + PMBUS_CLEAR_FAULTS = 0x03, + PMBUS_PHASE = 0x04, + + PMBUS_CAPABILITY = 0x19, + PMBUS_QUERY = 0x1A, + + PMBUS_VOUT_MODE = 0x20, + PMBUS_VOUT_COMMAND = 0x21, + PMBUS_VOUT_TRIM = 0x22, + PMBUS_VOUT_CAL_OFFSET = 0x23, + PMBUS_VOUT_MAX = 0x24, + PMBUS_VOUT_MARGIN_HIGH = 0x25, + PMBUS_VOUT_MARGIN_LOW = 0x26, + PMBUS_VOUT_TRANSITION_RATE = 0x27, + PMBUS_VOUT_DROOP = 0x28, + PMBUS_VOUT_SCALE_LOOP = 0x29, + PMBUS_VOUT_SCALE_MONITOR = 0x2A, + + PMBUS_COEFFICIENTS = 0x30, + PMBUS_POUT_MAX = 0x31, + + PMBUS_FAN_CONFIG_12 = 0x3A, + PMBUS_FAN_COMMAND_1 = 0x3B, + PMBUS_FAN_COMMAND_2 = 0x3C, + PMBUS_FAN_CONFIG_34 = 0x3D, + PMBUS_FAN_COMMAND_3 = 0x3E, + PMBUS_FAN_COMMAND_4 = 0x3F, + + PMBUS_VOUT_OV_FAULT_LIMIT = 0x40, + PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41, + PMBUS_VOUT_OV_WARN_LIMIT = 0x42, + PMBUS_VOUT_UV_WARN_LIMIT = 0x43, + PMBUS_VOUT_UV_FAULT_LIMIT = 0x44, + PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45, + PMBUS_IOUT_OC_FAULT_LIMIT = 0x46, + PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47, + PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48, + PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49, + PMBUS_IOUT_OC_WARN_LIMIT = 0x4A, + PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B, + PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C, + + PMBUS_OT_FAULT_LIMIT = 0x4F, + PMBUS_OT_FAULT_RESPONSE = 0x50, + PMBUS_OT_WARN_LIMIT = 0x51, + PMBUS_UT_WARN_LIMIT = 0x52, + PMBUS_UT_FAULT_LIMIT = 0x53, + PMBUS_UT_FAULT_RESPONSE = 0x54, + PMBUS_VIN_OV_FAULT_LIMIT = 0x55, + PMBUS_VIN_OV_FAULT_RESPONSE = 0x56, + PMBUS_VIN_OV_WARN_LIMIT = 0x57, + PMBUS_VIN_UV_WARN_LIMIT = 0x58, + PMBUS_VIN_UV_FAULT_LIMIT = 0x59, + + PMBUS_IIN_OC_FAULT_LIMIT = 0x5B, + PMBUS_IIN_OC_WARN_LIMIT = 0x5D, + + PMBUS_POUT_OP_FAULT_LIMIT = 0x68, + PMBUS_POUT_OP_WARN_LIMIT = 0x6A, + PMBUS_PIN_OP_WARN_LIMIT = 0x6B, + + PMBUS_STATUS_BYTE = 0x78, + PMBUS_STATUS_WORD = 0x79, + PMBUS_STATUS_VOUT = 0x7A, + PMBUS_STATUS_IOUT = 0x7B, + PMBUS_STATUS_INPUT = 0x7C, + PMBUS_STATUS_TEMPERATURE = 0x7D, + PMBUS_STATUS_CML = 0x7E, + PMBUS_STATUS_OTHER = 0x7F, + PMBUS_STATUS_MFR_SPECIFIC = 0x80, + PMBUS_STATUS_FAN_12 = 0x81, + PMBUS_STATUS_FAN_34 = 0x82, + + PMBUS_READ_VIN = 0x88, + PMBUS_READ_IIN = 0x89, + PMBUS_READ_VCAP = 0x8A, + PMBUS_READ_VOUT = 0x8B, + PMBUS_READ_IOUT = 0x8C, + PMBUS_READ_TEMPERATURE_1 = 0x8D, + PMBUS_READ_TEMPERATURE_2 = 0x8E, + PMBUS_READ_TEMPERATURE_3 = 0x8F, + PMBUS_READ_FAN_SPEED_1 = 0x90, + PMBUS_READ_FAN_SPEED_2 = 0x91, + PMBUS_READ_FAN_SPEED_3 = 0x92, + PMBUS_READ_FAN_SPEED_4 = 0x93, + PMBUS_READ_DUTY_CYCLE = 0x94, + PMBUS_READ_FREQUENCY = 0x95, + PMBUS_READ_POUT = 0x96, + PMBUS_READ_PIN = 0x97, + + PMBUS_REVISION = 0x98, + PMBUS_MFR_ID = 0x99, + PMBUS_MFR_MODEL = 0x9A, + PMBUS_MFR_REVISION = 0x9B, + PMBUS_MFR_LOCATION = 0x9C, + PMBUS_MFR_DATE = 0x9D, + PMBUS_MFR_SERIAL = 0x9E, + +/* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ + PMBUS_VIRT_BASE = 0x100, + PMBUS_VIRT_READ_TEMP_AVG, + PMBUS_VIRT_READ_TEMP_MIN, + PMBUS_VIRT_READ_TEMP_MAX, + PMBUS_VIRT_RESET_TEMP_HISTORY, + PMBUS_VIRT_READ_VIN_AVG, + PMBUS_VIRT_READ_VIN_MIN, + PMBUS_VIRT_READ_VIN_MAX, + PMBUS_VIRT_RESET_VIN_HISTORY, + PMBUS_VIRT_READ_IIN_AVG, + PMBUS_VIRT_READ_IIN_MIN, + PMBUS_VIRT_READ_IIN_MAX, + PMBUS_VIRT_RESET_IIN_HISTORY, + PMBUS_VIRT_READ_PIN_AVG, + PMBUS_VIRT_READ_PIN_MIN, + PMBUS_VIRT_READ_PIN_MAX, + PMBUS_VIRT_RESET_PIN_HISTORY, + PMBUS_VIRT_READ_POUT_AVG, + PMBUS_VIRT_READ_POUT_MIN, + PMBUS_VIRT_READ_POUT_MAX, + PMBUS_VIRT_RESET_POUT_HISTORY, + PMBUS_VIRT_READ_VOUT_AVG, + PMBUS_VIRT_READ_VOUT_MIN, + PMBUS_VIRT_READ_VOUT_MAX, + PMBUS_VIRT_RESET_VOUT_HISTORY, + PMBUS_VIRT_READ_IOUT_AVG, + PMBUS_VIRT_READ_IOUT_MIN, + PMBUS_VIRT_READ_IOUT_MAX, + PMBUS_VIRT_RESET_IOUT_HISTORY, + PMBUS_VIRT_READ_TEMP2_AVG, + PMBUS_VIRT_READ_TEMP2_MIN, + PMBUS_VIRT_READ_TEMP2_MAX, + PMBUS_VIRT_RESET_TEMP2_HISTORY, + + PMBUS_VIRT_READ_VMON, + PMBUS_VIRT_VMON_UV_WARN_LIMIT, + PMBUS_VIRT_VMON_OV_WARN_LIMIT, + PMBUS_VIRT_VMON_UV_FAULT_LIMIT, + PMBUS_VIRT_VMON_OV_FAULT_LIMIT, + PMBUS_VIRT_STATUS_VMON, +}; + +/* + * OPERATION + */ +#define PB_OPERATION_CONTROL_ON BIT(7) + +/* + * CAPABILITY + */ +#define PB_CAPABILITY_SMBALERT BIT(4) +#define PB_CAPABILITY_ERROR_CHECK BIT(7) + +/* + * VOUT_MODE + */ +#define PB_VOUT_MODE_MODE_MASK 0xe0 +#define PB_VOUT_MODE_PARAM_MASK 0x1f + +#define PB_VOUT_MODE_LINEAR 0x00 +#define PB_VOUT_MODE_VID 0x20 +#define PB_VOUT_MODE_DIRECT 0x40 + +/* + * Fan configuration + */ +#define PB_FAN_2_PULSE_MASK (BIT(0) | BIT(1)) +#define PB_FAN_2_RPM BIT(2) +#define PB_FAN_2_INSTALLED BIT(3) +#define PB_FAN_1_PULSE_MASK (BIT(4) | BIT(5)) +#define PB_FAN_1_RPM BIT(6) +#define PB_FAN_1_INSTALLED BIT(7) + +/* + * STATUS_BYTE, STATUS_WORD (lower) + */ +#define PB_STATUS_NONE_ABOVE BIT(0) +#define PB_STATUS_CML BIT(1) +#define PB_STATUS_TEMPERATURE BIT(2) +#define PB_STATUS_VIN_UV BIT(3) +#define PB_STATUS_IOUT_OC BIT(4) +#define PB_STATUS_VOUT_OV BIT(5) +#define PB_STATUS_OFF BIT(6) +#define PB_STATUS_BUSY BIT(7) + +/* + * STATUS_WORD (upper) + */ +#define PB_STATUS_UNKNOWN BIT(8) +#define PB_STATUS_OTHER BIT(9) +#define PB_STATUS_FANS BIT(10) +#define PB_STATUS_POWER_GOOD_N BIT(11) +#define PB_STATUS_WORD_MFR BIT(12) +#define PB_STATUS_INPUT BIT(13) +#define PB_STATUS_IOUT_POUT BIT(14) +#define PB_STATUS_VOUT BIT(15) + +/* + * STATUS_IOUT + */ +#define PB_POUT_OP_WARNING BIT(0) +#define PB_POUT_OP_FAULT BIT(1) +#define PB_POWER_LIMITING BIT(2) +#define PB_CURRENT_SHARE_FAULT BIT(3) +#define PB_IOUT_UC_FAULT BIT(4) +#define PB_IOUT_OC_WARNING BIT(5) +#define PB_IOUT_OC_LV_FAULT BIT(6) +#define PB_IOUT_OC_FAULT BIT(7) + +/* + * STATUS_VOUT, STATUS_INPUT + */ +#define PB_VOLTAGE_UV_FAULT BIT(4) +#define PB_VOLTAGE_UV_WARNING BIT(5) +#define PB_VOLTAGE_OV_WARNING BIT(6) +#define PB_VOLTAGE_OV_FAULT BIT(7) + +/* + * STATUS_INPUT + */ +#define PB_PIN_OP_WARNING BIT(0) +#define PB_IIN_OC_WARNING BIT(1) +#define PB_IIN_OC_FAULT BIT(2) + +/* + * STATUS_TEMPERATURE + */ +#define PB_TEMP_UT_FAULT BIT(4) +#define PB_TEMP_UT_WARNING BIT(5) +#define PB_TEMP_OT_WARNING BIT(6) +#define PB_TEMP_OT_FAULT BIT(7) + +/* + * STATUS_FAN + */ +#define PB_FAN_AIRFLOW_WARNING BIT(0) +#define PB_FAN_AIRFLOW_FAULT BIT(1) +#define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2) +#define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3) +#define PB_FAN_FAN2_WARNING BIT(4) +#define PB_FAN_FAN1_WARNING BIT(5) +#define PB_FAN_FAN2_FAULT BIT(6) +#define PB_FAN_FAN1_FAULT BIT(7) + +/* + * CML_FAULT_STATUS + */ +#define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0) +#define PB_CML_FAULT_OTHER_COMM BIT(1) +#define PB_CML_FAULT_PROCESSOR BIT(3) +#define PB_CML_FAULT_MEMORY BIT(4) +#define PB_CML_FAULT_PACKET_ERROR BIT(5) +#define PB_CML_FAULT_INVALID_DATA BIT(6) +#define PB_CML_FAULT_INVALID_COMMAND BIT(7) + +enum pmbus_sensor_classes { + PSC_VOLTAGE_IN = 0, + PSC_VOLTAGE_OUT, + PSC_CURRENT_IN, + PSC_CURRENT_OUT, + PSC_POWER, + PSC_TEMPERATURE, + PSC_FAN, + PSC_NUM_CLASSES /* Number of power sensor classes */ +}; + +#define PMBUS_PAGES 32 /* Per PMBus specification */ + +/* Functionality bit mask */ +#define PMBUS_HAVE_VIN BIT(0) +#define PMBUS_HAVE_VCAP BIT(1) +#define PMBUS_HAVE_VOUT BIT(2) +#define PMBUS_HAVE_IIN BIT(3) +#define PMBUS_HAVE_IOUT BIT(4) +#define PMBUS_HAVE_PIN BIT(5) +#define PMBUS_HAVE_POUT BIT(6) +#define PMBUS_HAVE_FAN12 BIT(7) +#define PMBUS_HAVE_FAN34 BIT(8) +#define PMBUS_HAVE_TEMP BIT(9) +#define PMBUS_HAVE_TEMP2 BIT(10) +#define PMBUS_HAVE_TEMP3 BIT(11) +#define PMBUS_HAVE_STATUS_VOUT BIT(12) +#define PMBUS_HAVE_STATUS_IOUT BIT(13) +#define PMBUS_HAVE_STATUS_INPUT BIT(14) +#define PMBUS_HAVE_STATUS_TEMP BIT(15) +#define PMBUS_HAVE_STATUS_FAN12 BIT(16) +#define PMBUS_HAVE_STATUS_FAN34 BIT(17) +#define PMBUS_HAVE_VMON BIT(18) +#define PMBUS_HAVE_STATUS_VMON BIT(19) + +enum pmbus_data_format { linear = 0, direct, vid }; +enum vrm_version { vr11 = 0, vr12, vr13 }; + +struct pmbus_driver_info { + int pages; /* Total number of pages */ + enum pmbus_data_format format[PSC_NUM_CLASSES]; + enum vrm_version vrm_version; + /* + * Support one set of coefficients for each sensor type + * Used for chips providing data in direct mode. + */ + int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ + int b[PSC_NUM_CLASSES]; /* offset */ + int R[PSC_NUM_CLASSES]; /* exponent */ + + u32 func[PMBUS_PAGES]; /* Functionality, per page */ + /* + * The following functions map manufacturing specific register values + * to PMBus standard register values. Specify only if mapping is + * necessary. + * Functions return the register value (read) or zero (write) if + * successful. A return value of -ENODATA indicates that there is no + * manufacturer specific register, but that a standard PMBus register + * may exist. Any other negative return value indicates that the + * register does not exist, and that no attempt should be made to read + * the standard register. + */ + int (*read_byte_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int reg); + int (*write_word_data)(struct i2c_client *client, int page, int reg, + u16 word); + int (*write_byte)(struct i2c_client *client, int page, u8 value); + /* + * The identify function determines supported PMBus functionality. + * This function is only necessary if a chip driver supports multiple + * chips, and the chip functionality is not pre-determined. + */ + int (*identify)(struct i2c_client *client, + struct pmbus_driver_info *info); + + /* Regulator functionality, if supported by this chip driver. */ + int num_regulators; + const struct regulator_desc *reg_desc; +}; + +/* Regulator ops */ + +extern const struct regulator_ops pmbus_regulator_ops; + +/* Macro for filling in array of struct regulator_desc */ +#define PMBUS_REGULATOR(_name, _id) \ + [_id] = { \ + .name = (_name # _id), \ + .id = (_id), \ + .of_match = of_match_ptr(_name # _id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &pmbus_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +/* Function declarations */ + +void pmbus_clear_cache(struct i2c_client *client); +int pmbus_set_page(struct i2c_client *client, u8 page); +int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg); +int pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg, u16 word); +int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); +int pmbus_write_byte(struct i2c_client *client, int page, u8 value); +int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, + u8 value); +int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, + u8 mask, u8 value); +void pmbus_clear_faults(struct i2c_client *client); +bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); +bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); +int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, + struct pmbus_driver_info *info); +int pmbus_do_remove(struct i2c_client *client); +const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client + *client); + +#endif /* PMBUS_H */ diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/sff_io.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/sff_io.c new file mode 100644 index 00000000000..25e1f343cd0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/sff_io.c @@ -0,0 +1,801 @@ +/* + * Sample kobject implementation + * * Copyright (C) 2004-2007 Greg Kroah-Hartman + * Copyright (C) 2007 Novell Inc. + * + * Released under the GPL version 2 only. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +/*work queue*/ +#include +#include + +#include "sff_io.h" +#include "io_config_maple.h" + +#define DEBUG_MODE (0) +//#define TEST_CODE +#if (DEBUG_MODE == 1) +#define SFF_IO_DEBUG(fmt, args...) \ + printk (KERN_INFO "%s: " fmt "\r\n", __FUNCTION__, ##args) +#else + #define SFF_IO_DEBUG(fmt, args...) +#endif +#define SFF_IO_INFO(fmt, args...) \ + printk (KERN_INFO "[SFF_IO]%s: " fmt "\r\n", __FUNCTION__, ##args) +#define SFF_IO_ERR(fmt, args...) \ + printk_ratelimited (KERN_ERR "{SFF_IO]%s: " fmt "\r\n",__FUNCTION__, ##args) + +static unsigned int gpio_ioexpander_int = CPLD_EXPANDER_INT_N; +static int io_exps_id = 0; +static int io_exps_check_fail_count = 0; +//static irq_handler_t ioexpander_irq_handler(unsigned int irq, void *dev_id, struct pt_regs *regs); +static struct i2c_client *Cpld_client = NULL; +static struct mutex cpld_lock; +static int inv_i2c_smbus_read_byte_data(struct i2c_client *client, u8 offset); + +static int present_st[PORT_NUM]; +static int rxlos_st[PORT_NUM]; +static int txfault_st[PORT_NUM]; + +static int port_num_get(void) +{ + return PORT_NUM; +} + +u8 pca9555_input_reg[2] = +{ + 0x00, + 0x01 +}; + +u8 pca9555_output_reg[2] = +{ + 0x02, + 0x03 +}; +u8 pca9555_config_reg[2] = +{ + 0x06, + 0x07 +}; +struct sff_io_client_node { + struct i2c_client *client; + int i2c_ch; + struct list_head list; + struct mutex lock; +}; +static LIST_HEAD(sff_io_client_list); + +static struct sff_io_client_node *sff_io_client_find(int i2c_ch, u8 slave_addr) +{ + struct list_head *list_node = NULL; + struct sff_io_client_node *node = NULL; + int find = 0; + list_for_each(list_node, &sff_io_client_list) + { + node = list_entry(list_node, struct sff_io_client_node, list); + + if (node->i2c_ch == i2c_ch) { + find = 1; + node->client->addr = slave_addr; + break; + } + } + + if(!find) + { + SFF_IO_ERR("%s fail/n", __FUNCTION__); + return NULL; + } + return node; +} + +static int inv_i2c_smbus_read_word_data(struct i2c_client *client, u8 offset) +{ + int ret = 0; + int i = 0; + + for (i = 0; i < RETRY_COUNT; i++) { + + ret = i2c_smbus_read_word_data(client, offset); + if (ret < 0) { + msleep(RETRY_DELAY_MS); + continue; + } + break; + } + + if (i >= RETRY_COUNT) { + SFF_IO_INFO("%s fail:offset:0x%x try %d/%d! Error Code: %d\n", __func__, offset, i, RETRY_COUNT, ret); + } + + return ret; +} + +static int inv_i2c_smbus_write_word_data(struct i2c_client *client, u8 offset, u16 buf) +{ + int i; + int ret = 0; + for(i=0; i< RETRY_COUNT; i++) + { + ret = i2c_smbus_write_word_data(client, offset, buf); + + if (ret < 0) { + msleep(RETRY_DELAY_MS); + continue; + } + break; + } + if (i >= RETRY_COUNT) { + SFF_IO_INFO("%s fail:offset:0x%x try %d/%d! Error Code: %d\n", __func__, offset, i, RETRY_COUNT, ret); + } + return ret; +} +static int inv_i2c_smbus_write_byte_data(struct i2c_client *client, u8 offset, u8 buf) +{ + int i; + int ret = 0; + for(i=0; i< RETRY_COUNT; i++) + { + ret = i2c_smbus_write_byte_data(client, offset, buf); + + if (ret < 0) { + msleep(RETRY_DELAY_MS); + continue; + } + break; + } + if (i >= RETRY_COUNT) { + SFF_IO_INFO("%s fail:offset:0x%x try %d/%d! Error Code: %d\n", __func__, offset, i, RETRY_COUNT, ret); + } + return ret; +} +static int inv_i2c_smbus_read_byte_data(struct i2c_client *client, u8 offset) +{ + int ret = 0; + int i = 0; + + for (i = 0; i < RETRY_COUNT; i++) { + + ret = i2c_smbus_read_byte_data(client, offset); + if (ret < 0) { + msleep(RETRY_DELAY_MS); + continue; + } + break; + } + + if (i >= RETRY_COUNT) { + SFF_IO_INFO("%s fail:offset:0x%x try %d/%d! Error Code: %d\n", __func__, offset, i, RETRY_COUNT, ret); + } + + return ret; +} +static int pca9555_word_read(u8 ch, u8 addr, u8 offset) +{ + + struct sff_io_client_node *node = NULL; + int ret = 0; + node = sff_io_client_find(ch, addr); + + if(IS_ERR_OR_NULL(node)) + return -1; + mutex_lock(&node->lock); + ret = inv_i2c_smbus_read_word_data(node->client, offset); + mutex_unlock(&node->lock); + + return ret; +} + +static int pca9555_word_write(u8 ch, u8 addr, u8 offset, u16 val) +{ + + struct sff_io_client_node *node = NULL; + int ret = 0; + node = sff_io_client_find(ch, addr); + + if(IS_ERR_OR_NULL(node)) + return -1; + mutex_lock(&node->lock); + ret = inv_i2c_smbus_write_word_data(node->client, offset, val); + mutex_unlock(&node->lock); + + return ret; +} + +static int sff_io_client_create(int ch) +{ + struct i2c_client *client = NULL; + struct sff_io_client_node *node = NULL; + struct i2c_adapter *adap; + + node = kzalloc(sizeof(struct sff_io_client_node), GFP_KERNEL); + if(IS_ERR_OR_NULL(node)) + { + goto exit_err; + } + client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); + if(IS_ERR_OR_NULL(client)) + { + goto exit_kfree_node; + } + + /*get i2c adapter*/ + adap = i2c_get_adapter(ch); + client->adapter = adap; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + { + + SFF_IO_ERR("%s: i2c check fail\n", __FUNCTION__); + goto exit_kfree_sff_io_client; + + } + + node->client = client; + node->i2c_ch = ch; + mutex_init(&node->lock); + list_add(&node->list, &sff_io_client_list); + + SFF_IO_DEBUG("i2c ch:%d\n", ch); + return 0; + + exit_kfree_sff_io_client: + kfree(client); + exit_kfree_node: + kfree(node); + exit_err: + return -1; + +} +static int sff_io_client_create_all(void) +{ + int idx = 0; + int table_size = ARRAY_SIZE(io_i2c_ch_table); + + for(idx = 0; idx < table_size; idx++) { + if(sff_io_client_create(io_i2c_ch_table[idx]) < 0) + { + return -1; + } + } + + return 0; +} + +static int sff_io_client_destroy(int i2c_ch) +{ + struct list_head *list_node = NULL; + struct sff_io_client_node *sff_io_client_node = NULL; + int found = 0; + list_for_each(list_node, &sff_io_client_list) + { + sff_io_client_node = list_entry(list_node, struct sff_io_client_node, list); + if(i2c_ch == sff_io_client_node->i2c_ch) + { + found = 1; + break; + } + } + + if(found) + { + list_del(list_node); + i2c_put_adapter(sff_io_client_node->client->adapter); + kfree(sff_io_client_node->client); + kfree(sff_io_client_node); + + return 0; + } + else + { + SFF_IO_DEBUG("fail\n"); + return -1; + } +} + +static int sff_io_client_destroy_all(void) +{ + int idx = 0; + int table_size = ARRAY_SIZE(io_i2c_ch_table); + for(idx = 0; idx < table_size; idx++) + { + if(sff_io_client_destroy(io_i2c_ch_table[idx]) < 0) + { + return -1; + } + } + + return 0; +} + + +static int cpld_ioexpander_init(void) +{ + int ret = 0; + struct i2c_client *client = NULL; + struct i2c_adapter *adap; + client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); + + if (IS_ERR_OR_NULL(client)) { + goto exit_err; + } + + SFF_IO_INFO("start\n"); + /*get i2c adapter*/ + adap = i2c_get_adapter(CPLD_I2C_CH); + client->adapter = adap; + client->addr = CPLD_I2C_ADDR; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + { + + SFF_IO_ERR("%s: i2c check fail\n", __FUNCTION__); + goto exit_kfree_sff_client; + + } + Cpld_client = client; + + mutex_init(&cpld_lock); + SFF_IO_INFO("init ok\n"); + return 0; + +exit_kfree_sff_client: + kfree(client); + +exit_err: + return -1; + + +} +int cpld_ioexp_isr_enable(void) +{ + int ret = 0; + /*enable cpld ioexpander isr mode*/ + mutex_lock(&cpld_lock); + ret = inv_i2c_smbus_write_byte_data(Cpld_client, 0x37, 0x01); + mutex_unlock(&cpld_lock); + if (ret < 0) + { + return ret; + } + + return 0; + +} +int ioexp_isr_reg_get(int *reg) +{ + int ret = 0; + int sfp = 0; + int qsfp = 0; + + if(IS_ERR_OR_NULL(reg)) + { + SFF_IO_ERR("NULL ptr\n"); + return -1; + } + if(IS_ERR_OR_NULL(Cpld_client)) + { + SFF_IO_ERR("NULL ptr\n"); + return -1; + } + mutex_lock(&cpld_lock); + ret = inv_i2c_smbus_read_word_data(Cpld_client, 0x35); + mutex_unlock(&cpld_lock); + if (ret < 0) + { + SFF_IO_ERR("2 read fail\n"); + return ret; + } + /*sfp 0x35 bit 0:7 0x36 bit 0:4 + * qsfp 0x36 bit 7, merge it into one data*/ + sfp = ret & 0xfff; + qsfp = (ret & 0x8000) >> 3; + + /*bit = 0: interrupt occurs , reverse it for easy logic*/ + + *reg = (~(sfp|qsfp)) & 0x1fff; + return 0; +} + + +int present_st_get(int port) +{ + int new_port = port; + return present_st[new_port]; +} +int rxlos_get(int port) +{ + int new_port = port; + return rxlos_st[new_port]; +} +int txfault_get(int port) +{ + int new_port = port; + return txfault_st[new_port]; +} + +bool sff_io_is_plugged(int port) +{ + int new_port = port; + return ((0 == present_st[new_port]) ? true : false); +} + +struct io_exp_input_t *find_ioexp(struct io_exp_input_t map[], int port_min) { + + int i = 0; + for (i = 0; map[i].ch != END_OF_TABLE; i++) { + + if (port_min == map[i].port_min) { + return &map[i]; + } + } + return NULL; +} + +int io_exps_check(void) +{ + struct io_exp_config_t *config = NULL; + int ret = 0; + int val = 0; + + /*when interrupt gpio is low => input change is hapenning , skip this round check*/ + val = gpio_get_value(gpio_ioexpander_int); + if (0 == val) { + return 0; + } + if (END_OF_TABLE == io_exp_config[io_exps_id].ch) { + if (0 == io_exps_check_fail_count) { + // SFF_IO_INFO("pass idx:%d", io_exps_id); + } + io_exps_id = 0; + io_exps_check_fail_count = 0; + } + + config = &io_exp_config[io_exps_id]; + io_exps_id++; + + ret = pca9555_word_read(config->ch, config->addr, pca9555_config_reg[0]); + if (ret < 0) { + SFF_IO_ERR("io config read fail: ch:0x%x addr:0x%x val:0x%x\n", config->ch, config->addr, config->val); + io_exps_check_fail_count++; + return ret; + } + + if ((u16)ret == config->val) { + + //SFF_IO_INFO("io config read check ok: ch:0x%x addr:0x%x val:0x%x\n", config->ch, config->addr, config->val); + } else { + + SFF_IO_ERR("io config read check fail: ch:0x%x addr:0x%x val:0x%x\n", config->ch, config->addr, config->val); + io_exps_check_fail_count++; + return -1; + } + + return 0; +} +int io_exp_isr_handler(void) +{ + int idx = 0; + int input_change; + int val = 0; + int ret = 0; + int bit = 0; + int bit_min = 0; + int bit_max = 0; + int port= 0; + int new_port = 0; + int size = sizeof(input_change_table)/sizeof(input_change_table[0]); + struct io_exp_input_t *ioexp = NULL; + val = gpio_get_value(gpio_ioexpander_int); + //SFF_IO_INFO("1.gpio:%d level: %d\n", gpio_ioexpander_int, value); + if (val == 0) { + //SFF_IO_INFO("1.gpio:%d level: %d\n", gpio_ioexpander_int, value); + if ((ret = ioexp_isr_reg_get(&input_change)) < 0 ) { + SFF_IO_INFO("read fail\n"); + return ret; + } + + SFF_IO_INFO("input_change:0x%x\n", input_change); + for (idx = 0; idx < size; idx++) { + + if (input_change & (1 << idx)) { + /*present scan*/ + + SFF_IO_DEBUG("input_change_table[%d]:%d\n", idx, input_change_table[idx]); + ioexp = find_ioexp(io_exp_present, input_change_table[idx]); + if (NULL == ioexp) { + + SFF_IO_INFO("cant find io exp present: %d\n", input_change_table[idx]); + break; + } + ret = pca9555_word_read(ioexp->ch, ioexp->addr, pca9555_input_reg[0]); + if (ret < 0) { + SFF_IO_INFO("present read word fail: ch:0x%x addr:0x%x\n", ioexp->ch, ioexp->addr); + return ret; + } + port = ioexp->port_min; + bit_min = ioexp->bit_min; + bit_max = ioexp->bit_max; + + for (bit = bit_min; bit <= bit_max; bit++) { + val = ((ret & (1 << bit)) ? 1 : 0); + new_port = ioexp_port_2_port[port]; + + SFF_IO_DEBUG("new_port:%d", new_port); + if (val != present_st[new_port]) { + + if (!val) { + SFF_IO_INFO("port:%d plug in", new_port+1); + } else { + SFF_IO_INFO("port:%d plug out\n", new_port+1); + } + } + present_st[new_port] = val; + + port++; + } + /*rx_los scan*/ + if (size-1 == idx) { + + SFF_IO_DEBUG("qsfp doesnt have rxlos%d\n", idx); + break; + } + SFF_IO_DEBUG("input_change_table[%d]:%d\n", idx, input_change_table[idx]); + ioexp = find_ioexp(io_exp_rxlos, input_change_table[idx]); + if (NULL == ioexp) { + + SFF_IO_INFO("cant find io exp rxlos: %d\n", input_change_table[idx]); + break; + } + port = ioexp->port_min; + bit_min = ioexp->bit_min; + bit_max = ioexp->bit_max; + + for (bit = bit_min; bit <= bit_max; bit++) { + val = ((ret & (1 << bit)) ? 1 : 0); + new_port = ioexp_port_2_port[port]; + if (val != rxlos_st[new_port]) { + + if (val) { + //SFF_IO_INFO("port:%d rxlos assert", new_port+1); + } else { + //SFF_IO_INFO("port:%d rxlos deassert\n", new_port+1); + } + } + rxlos_st[new_port] = val; + port++; + } + + SFF_IO_DEBUG("input_change_table[%d]:%d\n", idx, input_change_table[idx]); + ioexp = find_ioexp(io_exp_txfault, input_change_table[idx]); + if (NULL == ioexp) { + + SFF_IO_INFO("cant find io exp tx fault: %d\n", input_change_table[idx]); + break; + } + port = ioexp->port_min; + bit_min = ioexp->bit_min; + bit_max = ioexp->bit_max; + + for (bit = bit_min; bit <= bit_max; bit++) { + val = ((ret & (1 << bit)) ? 1 : 0); + new_port = ioexp_port_2_port[port]; + if (val != txfault_st[new_port]) { + + if (val) { + //SFF_IO_INFO("port:%d txfault assert", new_port+1); + } else { + //SFF_IO_INFO("port:%d txfault deassert\n", new_port+1); + } + } + txfault_st[new_port] = val; + port++; + } + + } + } + } + + return ret; +} + +int ioexpander_int_init(void) +{ + int result; + int value = 0x0; + result = gpio_is_valid(gpio_ioexpander_int); + + if (result < 0) { + + SFF_IO_ERR("valid gpio:%d ret:%d\n", gpio_ioexpander_int, result); + return -1; + } +/*fix autorequest GPIO fail problem , since the direction is determined on BIOS stage + * so dont need to set direction in driver stage*/ +#if 0 + value = gpio_direction_input(gpio_ioexpander_int); + if (value < 0 ) { + + SFF_IO_ERR("gpio:%d dir set. err code:%d\n", gpio_ioexpander_int, value); + return -1; + + } +#endif + value = gpio_get_value(gpio_ioexpander_int); + SFF_IO_INFO("ok gpio:%d value:%d\n", gpio_ioexpander_int, value); + if (cpld_ioexpander_init() < 0) { + gpio_free(gpio_ioexpander_int); + return -1; + } + return 0; +} + +int ioexpander_int_deinit(void) +{ + if (Cpld_client) { + + i2c_put_adapter(Cpld_client->adapter); + kfree(Cpld_client); + } + gpio_free(gpio_ioexpander_int); + return 0; +} +static int io_exps_config(void) +{ + int count = 0; + int ret = 0; + struct io_exp_config_t *config = NULL; + /*config io exp*/ + for (count = 0; io_exp_config[count].ch != END_OF_TABLE; count++) { + config = &io_exp_config[count]; + ret = pca9555_word_write(config->ch, config->addr, pca9555_config_reg[0], config->val); + if (ret < 0) { + SFF_IO_ERR("io config fail: ch:0x%x addr:0x%x val:0x%x\n", config->ch, config->addr, config->val); + return ret; + } + } + return 0; +} + +int sff_io_init(void) +{ + + int val = 0; + int count = 0; + int port = 0; + int new_port = 0; + int bit = 0; + int bit_min = 0; + int bit_max = 0; + int ret = 0; + struct io_exp_input_t *ioexp = NULL; + //struct io_exp_config_t *config = NULL; + SFF_IO_DEBUG("init start\n"); + if(sff_io_client_create_all() < 0) + return -1; + SFF_IO_DEBUG("sff_io_client_create_all ok\n"); + /* + if(sff_io_mux_init() < 0) + return -1; + */ + /*config io exp*/ + ret = io_exps_config(); + if (ret < 0) { + return ret; + } + /*fist present scan*/ + for (count = 0; io_exp_present[count].ch != END_OF_TABLE; count++) { + ioexp = &io_exp_present[count]; + ret = pca9555_word_read(ioexp->ch, ioexp->addr, pca9555_input_reg[0]); + if (ret < 0) { + SFF_IO_ERR("read word fail: %d\n", ioexp->ch); + return ret; + } + port = ioexp->port_min; + bit_min = ioexp->bit_min; + bit_max = ioexp->bit_max; + for (bit = bit_min; bit <= bit_max; bit++) { + val = ((ret & (1 << bit)) ? 1 : 0); + new_port = ioexp_port_2_port[port]; + + SFF_IO_DEBUG("new_port:%d", new_port); + present_st[new_port] = val; + + port++; + } + } + /*fist rxlos scan*/ + for (count = 0; io_exp_rxlos[count].ch != END_OF_TABLE; count++) { + ioexp = &io_exp_rxlos[count]; + ret = pca9555_word_read(ioexp->ch, ioexp->addr, pca9555_input_reg[0]); + if (ret < 0) { + SFF_IO_ERR("read word fail: %d\n", ioexp->ch); + return ret; + } + port = ioexp->port_min; + bit_min = ioexp->bit_min; + bit_max = ioexp->bit_max; + for (bit = bit_min; bit <= bit_max; bit++) { + val = ((ret & (1 << bit)) ? 1 : 0); + new_port = ioexp_port_2_port[port]; + + SFF_IO_DEBUG("new_port:%d", new_port); + rxlos_st[new_port] = val; + + port++; + } + } + /*fist txfault scan*/ + for (count = 0; io_exp_txfault[count].ch != END_OF_TABLE; count++) { + ioexp = &io_exp_txfault[count]; + ret = pca9555_word_read(ioexp->ch, ioexp->addr, pca9555_input_reg[0]); + if (ret < 0) { + SFF_IO_ERR("read word fail: %d\n", ioexp->ch); + return ret; + } + port = ioexp->port_min; + bit_min = ioexp->bit_min; + bit_max = ioexp->bit_max; + for (bit = bit_min; bit <= bit_max; bit++) { + val = ((ret & (1 << bit)) ? 1 : 0); + new_port = ioexp_port_2_port[port]; + + SFF_IO_DEBUG("new_port:%d", new_port); + txfault_st[new_port] = val; + + port++; + } + } + + if (ioexpander_int_init() < 0) { + return -1; + } + SFF_IO_DEBUG("OK\n"); + return 0; + +} +void sff_io_deinit(void) +{ + ioexpander_int_deinit(); + sff_io_client_destroy_all(); +} +#if 0 +static int __init example_init(void) +{ + return sff_io_init(); +} + +static void __exit example_exit(void) +{ + sff_io_deinit(); +} + +module_init(example_init); +module_exit(example_exit); +#endif +//MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Alang"); + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/sff_io.h b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/sff_io.h new file mode 100644 index 00000000000..d0dc8c92fbc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/sff_io.h @@ -0,0 +1,44 @@ +//port info +#ifndef __SFF_IO_H +#define __SFF_IO_H + + +#define TEST_CODE +#define DEBUG_MODE (1) + +#define RETRY_COUNT (5) +#define RETRY_DELAY_MS (100) + + +struct io_exp_input_t { + u8 ch; + u8 addr; + int port_min; + int bit_min; + int bit_max; /*reprsent the num of ports*/ +}; +struct io_exp_config_t { + u8 ch; + u8 addr; + u16 val; +}; +#define REC_SFF_IO_UNSUPPORTED (6) + +typedef enum { + SFF_IO_IDLE_EVENT = 0, + SFF_IO_PLUG_IN_EVENT, + SFF_IO_PLUG_OUT_EVENT, +}; + +int sff_io_init(void); +void sff_io_deinit(void); +int io_exp_isr_handler(void); +int present_st_get(int port); +int rxlos_get(int port); +int txfault_get(int port); +bool sff_io_is_plugged(int port); +bool is_any_plug_event(void); +u8 plug_event_get(int port); +int io_exps_check(void); +int cpld_ioexp_isr_enable(void); +#endif /*__SFF_IO_H*/ diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/transceiver.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/transceiver.c new file mode 100644 index 00000000000..b710f514e41 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/transceiver.c @@ -0,0 +1,10436 @@ +#include +#include +#include +#include +#include "io_expander.h" +#include "transceiver.h" +#include "sff_io.h" +/* For build single module using (Ex: ONL platform) */ +#include +//#include +//#include +extern int io_no_init; +#define DETECT_TYPE_TIMEOUT (20) +#define QSFP_DATA_READY_CHECK_TIMEOUT_MS (1000) +#define QSFP_DATA_READY_CHECK_DELAY_MS (10) +#define QSFP_DATA_READY_CHECK_NUM (QSFP_DATA_READY_CHECK_TIMEOUT_MS / QSFP_DATA_READY_CHECK_DELAY_MS) +/* ========== Register EEPROM address mapping ========== + */ +struct eeprom_map_s eeprom_map_sfp = { + .addr_br =0x50, .page_br =-1, .offset_br =12, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =94, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =-1, .offset_connector =2, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =-1, .offset_diag_type =92 , .length_diag_type =1, + .addr_extbr =-1, .page_extbr =-1, .offset_extbr =-1, .length_extbr =-1, + .addr_ext_id =0x50, .page_ext_id =-1, .offset_ext_id =1, .length_ext_id =1, + .addr_id =0x50, .page_id =-1, .offset_id =0, .length_id =1, + .addr_len_sm =0x50, .page_len_sm =-1, .offset_len_sm =15, .length_len_sm =1, + .addr_len_smf =0x50, .page_len_smf =-1, .offset_len_smf =14, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =-1, .offset_len_om1 =17, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =-1, .offset_len_om2 =16, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =-1, .offset_len_om3 =19, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =-1, .offset_len_om4 =18, .length_len_om4 =1, + .addr_option =0x50, .page_option =-1, .offset_option =64, .length_option =2, + .addr_rate_id =0x50, .page_rate_id =-1, .offset_rate_id =13, .length_rate_id =1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =0x51, .page_rx_em =-1, .offset_rx_em =115, .length_rx_em =1, + .addr_rx_los =-1, .page_rx_los =-1, .offset_rx_los =-1, .length_rx_los =-1, + .addr_rx_power =0x51, .page_rx_power =-1, .offset_rx_power =104, .length_rx_power =2, + .addr_soft_rs0 =0x51, .page_soft_rs0 =-1, .offset_soft_rs0 =110, .length_soft_rs0 =1, + .addr_soft_rs1 =0x51, .page_soft_rs1 =-1, .offset_soft_rs1 =118, .length_soft_rs0 =1, + .addr_temp =0x51, .page_temp =-1, .offset_temp =96, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =-1, .offset_trancomp =3, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =-1, .offset_trancomp_ext =36, .length_trancomp_ext =1, + .addr_tx_bias =0x51, .page_tx_bias =-1, .offset_tx_bias =100, .length_tx_bias =2, + .addr_tx_disable =-1, .page_tx_disable =-1, .offset_tx_disable =-1, .length_tx_disable =-1, + .addr_tx_eq =0x51, .page_tx_eq =-1, .offset_tx_eq =114, .length_tx_eq =1, + .addr_tx_fault =-1, .page_tx_fault =-1, .offset_tx_fault =-1, .length_tx_fault =-1, + .addr_tx_power =0x51, .page_tx_power =-1, .offset_tx_power =102, .length_tx_power =2, + .addr_vendor_name =0x50, .page_vendor_name =-1, .offset_vendor_name =20, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =-1, .offset_vendor_pn =40, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =-1, .offset_vendor_rev =56, .length_vendor_rev =4, + .addr_vendor_sn =0x50, .page_vendor_sn =-1, .offset_vendor_sn =68, .length_vendor_sn =16, + .addr_voltage =0x51, .page_voltage =-1, .offset_voltage =98, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =-1, .offset_wavelength =60, .length_wavelength =2, + .addr_eeprom =0x50, .page_eeprom =-1, .offset_eeprom =0, .length_eeprom =256, + .addr_eeprom_a0 =0x50, .page_eeprom_a0 =-1, .offset_eeprom_a0 =0, .length_eeprom_a0 =128, + .addr_eeprom_a2 =0x51, .page_eeprom_a2 =-1, .offset_eeprom_a2 =0, .length_eeprom_a2 =128, + .addr_alarm_flag_byte_1 =0x51, .page_alarm_flag_byte_1 =-1, .offset_alarm_flag_byte_1 =112, .length_alarm_flag_byte_1 =1, + .addr_alarm_flag_byte_2 =0x51, .page_alarm_flag_byte_2 =-1, .offset_alarm_flag_byte_2 =113, .length_alarm_flag_byte_2 =1, + .addr_temp_high_alarm_threshold =0x51, .page_temp_high_alarm_threshold =-1, .offset_temp_high_alarm_threshold =0, .length_temp_high_alarm_threshold =2, + .addr_temp_low_alarm_threshold =0x51, .page_temp_low_alarm_threshold =-1, .offset_temp_low_alarm_threshold =2, .length_temp_low_alarm_threshold =2, + .addr_voltage_high_alarm_threshold =0x51, .page_voltage_high_alarm_threshold =-1, .offset_voltage_high_alarm_threshold =8, .length_voltage_high_alarm_threshold =2, + .addr_voltage_low_alarm_threshold =0x51, .page_voltage_low_alarm_threshold =-1, .offset_voltage_low_alarm_threshold =10, .length_voltage_low_alarm_threshold =2, + .addr_bias_high_alarm_threshold =0x51, .page_bias_high_alarm_threshold =-1, .offset_bias_high_alarm_threshold =16, .length_bias_high_alarm_threshold =2, + .addr_bias_low_alarm_threshold =0x51, .page_bias_low_alarm_threshold =-1, .offset_bias_low_alarm_threshold =18, .length_bias_low_alarm_threshold =2, + .addr_tx_power_high_alarm_threshold =0x51, .page_tx_power_high_alarm_threshold=-1, .offset_tx_power_high_alarm_threshold=24, .length_tx_power_high_alarm_threshold=2, + .addr_tx_power_low_alarm_threshold =0x51, .page_tx_power_low_alarm_threshold =-1, .offset_tx_power_low_alarm_threshold =26, .length_tx_power_low_alarm_threshold =2, + .addr_rx_power_high_alarm_threshold =0x51, .page_rx_power_high_alarm_threshold=-1, .offset_rx_power_high_alarm_threshold=32, .length_rx_power_high_alarm_threshold=2, + .addr_rx_power_low_alarm_threshold =0x51, .page_rx_power_low_alarm_threshold =-1, .offset_rx_power_low_alarm_threshold =34, .length_rx_power_low_alarm_threshold =2, + .addr_manufacturing_date =0x50, .page_manufacturing_date =-1, .offset_manufacturing_date =84, .length_manufacturing_date =8, +}; + +struct eeprom_map_s eeprom_map_qsfp = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =-1, .page_rx_em =-1, .offset_rx_em =-1, .length_rx_em =-1, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =-1, .page_tx_eq =-1, .offset_tx_eq =-1, .length_tx_eq =-1, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, + .addr_eeprom =0x50, .page_eeprom =0, .offset_eeprom =0, .length_eeprom =256, + .addr_eeprom_page03=0x50, .page_eeprom_page03=3, .offset_eeprom_page03=128, .length_eeprom_page03=128, + .addr_temp_alarm =0x50, .page_temp_alarm =0, .offset_temp_alarm =6, .length_temp_alarm =1, + .addr_voltage_alarm =0x50, .page_voltage_alarm =0, .offset_voltage_alarm =7, .length_voltage_alarm =1, + .addr_rx_power_alarm =0x50, .page_rx_power_alarm =0, .offset_rx_power_alarm =9, .length_rx_power_alarm =2, + .addr_bias_alarm =0x50, .page_bias_alarm =0, .offset_bias_alarm =11, .length_bias_alarm =2, + .addr_tx_power_alarm =0x50, .page_tx_power_alarm =0, .offset_tx_power_alarm =13, .length_tx_power_alarm =2, + .addr_temp_high_alarm_threshold =0x50, .page_temp_high_alarm_threshold =3, .offset_temp_high_alarm_threshold =128, .length_temp_high_alarm_threshold =2, + .addr_temp_low_alarm_threshold =0x50, .page_temp_low_alarm_threshold =3, .offset_temp_low_alarm_threshold =130, .length_temp_low_alarm_threshold =2, + .addr_voltage_high_alarm_threshold =0x50, .page_voltage_high_alarm_threshold =3, .offset_voltage_high_alarm_threshold =144, .length_voltage_high_alarm_threshold =2, + .addr_voltage_low_alarm_threshold =0x50, .page_voltage_low_alarm_threshold =3, .offset_voltage_low_alarm_threshold =146, .length_voltage_low_alarm_threshold =2, + .addr_rx_power_high_alarm_threshold =0x50, .page_rx_power_high_alarm_threshold=3, .offset_rx_power_high_alarm_threshold=176, .length_rx_power_high_alarm_threshold=2, + .addr_rx_power_low_alarm_threshold =0x50, .page_rx_power_low_alarm_threshold =3, .offset_rx_power_low_alarm_threshold =178, .length_rx_power_low_alarm_threshold =2, + .addr_bias_high_alarm_threshold =0x50, .page_bias_high_alarm_threshold =3, .offset_bias_high_alarm_threshold =184, .length_bias_high_alarm_threshold =2, + .addr_bias_low_alarm_threshold =0x50, .page_bias_low_alarm_threshold =3, .offset_bias_low_alarm_threshold =186, .length_bias_low_alarm_threshold =2, + .addr_tx_power_high_alarm_threshold =0x50, .page_tx_power_high_alarm_threshold=3, .offset_tx_power_high_alarm_threshold=192, .length_tx_power_high_alarm_threshold=2, + .addr_tx_power_low_alarm_threshold =0x50, .page_tx_power_low_alarm_threshold =3, .offset_tx_power_low_alarm_threshold =194, .length_tx_power_low_alarm_threshold =2, + .addr_manufacturing_date =0x50, .page_manufacturing_date =0, .offset_manufacturing_date =212, .length_manufacturing_date =8, +}; + +struct eeprom_map_s eeprom_map_qsfp28 = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =0x50, .page_cdr =-1, .offset_cdr =98, .length_cdr =1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =0x50, .page_rx_am =3, .offset_rx_am =238, .length_rx_am =2, + .addr_rx_em =0x50, .page_rx_em =3, .offset_rx_em =236, .length_rx_em =2, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =0x50, .page_tx_eq =3, .offset_tx_eq =234, .length_tx_eq =2, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, + .addr_eeprom =0x50, .page_eeprom =0, .offset_eeprom =0, .length_eeprom =256, + .addr_eeprom_page03=0x50, .page_eeprom_page03=3, .offset_eeprom_page03=128, .length_eeprom_page03=128, + .addr_temp_alarm =0x50, .page_temp_alarm =0, .offset_temp_alarm =6, .length_temp_alarm =1, + .addr_voltage_alarm =0x50, .page_voltage_alarm =0, .offset_voltage_alarm =7, .length_voltage_alarm =1, + .addr_rx_power_alarm =0x50, .page_rx_power_alarm =0, .offset_rx_power_alarm =9, .length_rx_power_alarm =2, + .addr_bias_alarm =0x50, .page_bias_alarm =0, .offset_bias_alarm =11, .length_bias_alarm =2, + .addr_tx_power_alarm =0x50, .page_tx_power_alarm =0, .offset_tx_power_alarm =13, .length_tx_power_alarm =2, + .addr_temp_high_alarm_threshold =0x50, .page_temp_high_alarm_threshold =3, .offset_temp_high_alarm_threshold =128, .length_temp_high_alarm_threshold =2, + .addr_temp_low_alarm_threshold =0x50, .page_temp_low_alarm_threshold =3, .offset_temp_low_alarm_threshold =130, .length_temp_low_alarm_threshold =2, + .addr_voltage_high_alarm_threshold =0x50, .page_voltage_high_alarm_threshold =3, .offset_voltage_high_alarm_threshold =144, .length_voltage_high_alarm_threshold =2, + .addr_voltage_low_alarm_threshold =0x50, .page_voltage_low_alarm_threshold =3, .offset_voltage_low_alarm_threshold =146, .length_voltage_low_alarm_threshold =2, + .addr_rx_power_high_alarm_threshold =0x50, .page_rx_power_high_alarm_threshold=3, .offset_rx_power_high_alarm_threshold=176, .length_rx_power_high_alarm_threshold=2, + .addr_rx_power_low_alarm_threshold =0x50, .page_rx_power_low_alarm_threshold =3, .offset_rx_power_low_alarm_threshold =178, .length_rx_power_low_alarm_threshold =2, + .addr_bias_high_alarm_threshold =0x50, .page_bias_high_alarm_threshold =3, .offset_bias_high_alarm_threshold =184, .length_bias_high_alarm_threshold =2, + .addr_bias_low_alarm_threshold =0x50, .page_bias_low_alarm_threshold =3, .offset_bias_low_alarm_threshold =186, .length_bias_low_alarm_threshold =2, + .addr_tx_power_high_alarm_threshold =0x50, .page_tx_power_high_alarm_threshold=3, .offset_tx_power_high_alarm_threshold=192, .length_tx_power_high_alarm_threshold=2, + .addr_tx_power_low_alarm_threshold =0x50, .page_tx_power_low_alarm_threshold =3, .offset_tx_power_low_alarm_threshold =194, .length_tx_power_low_alarm_threshold =2, + .addr_manufacturing_date =0x50, .page_manufacturing_date =0, .offset_manufacturing_date =212, .length_manufacturing_date =8, +}; + + +/* ========== Utility Functions ========== + */ +static int +get_bit(uint8_t origin_byte, int bit_shift) { + return (int)((origin_byte >> bit_shift) & 0x1); +} + +static int +transform_word_to_int(uint8_t hight_byte, + uint8_t low_byte) { + return ((((int)hight_byte) << 8) + (int)low_byte); +} + +void +alarm_msg_2_user(struct transvr_obj_s *self, + char *emsg) { + + SWPS_ERR("%s on %s.\n", emsg, self->swp_name); +} +EXPORT_SYMBOL(alarm_msg_2_user); + +/* ========== Private functions ========== + */ +static int +_reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +_is_transvr_support_page03(struct transvr_obj_s *self); + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self); + +static int +_transvr_init_handler(struct transvr_obj_s *self); + +int +_transvr_clean_handler(struct transvr_obj_s *self); + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self); + + +void +lock_transvr_obj(struct transvr_obj_s *self) { + + mutex_lock(&self->lock); + self->curr_page = VAL_TRANSVR_PAGE_FREE; +} +EXPORT_SYMBOL(lock_transvr_obj); + + +void +unlock_transvr_obj(struct transvr_obj_s *self) { + + self->curr_page = VAL_TRANSVR_PAGE_FREE; + mutex_unlock(&self->lock); +} +EXPORT_SYMBOL(unlock_transvr_obj); + + +static int +_check_by_mode(struct transvr_obj_s *self, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + char *caller_name){ + + int return_val = ERR_TRANSVR_UNEXCPT; + + switch (self->mode){ + case TRANSVR_MODE_POLLING: + switch (self->state){ + case STATE_TRANSVR_CONNECTED: + goto ok_check_by_mode_1; + case STATE_TRANSVR_NEW: + case STATE_TRANSVR_INIT: + return ERR_TRANSVR_UNINIT; + case STATE_TRANSVR_DISCONNECTED: + return ERR_TRANSVR_UNPLUGGED; + case STATE_TRANSVR_UNEXCEPTED: + return ERR_TRANSVR_ABNORMAL; + case STATE_TRANSVR_ISOLATED: + return ERR_TRNASVR_BE_ISOLATED; + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + + case TRANSVR_MODE_DIRECT: + return_val = self->fsm_4_direct(self, caller_name); + if (return_val < 0){ + return return_val; + } + goto ok_check_by_mode_1; + + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + +ok_check_by_mode_1: + return attr_update_func(self, 0); + +err_check_by_mode_1: + SWPS_INFO("_check_by_mode: mode:%d state:%d\n", self->mode, self->state); + return ERR_TRANSVR_UNEXCPT; +} + + +static void +_transvr_clean_retry(struct transvr_obj_s *self) { + self->retry = 0; +} + + +static int +_transvr_handle_retry(struct transvr_obj_s *self, int retry) { + /* Return: 0: keep retry + * -1: stop retry + */ + if (self->retry == 0) { + self->retry = retry; + } + self->retry -= 1; + if (self->retry <= 0) { + _transvr_clean_retry(self); + return -1; + } + return 0; +} + + +static int +_common_setup_page(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int show_e) { + /* return: + * 0 : OK + * -1 : EEPROM settings incorrect + * -2 : I2C R/W failure + * -3 : Undefined case + */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Check */ + if ((addr < 0) || (offset < 0) || (len < 0)) { + emsg = "EEPROM settings incorrect"; + retval = -1; + goto err_common_setup_page; + } + /* Case1: continue access */ + if ((self->i2c_client_p->addr == addr) && + (self->curr_page == page)) { + return 0; + } + self->i2c_client_p->addr = addr; + /* Case2: select lower page */ + if (page == -1) { + self->curr_page = page; + return 0; + } + /* Case3: select upper page */ + if (page >= 0) { + goto upper_common_setup_page; + } + /* Unexpected case */ + show_e = 1; + emsg = "Unexpected case"; + retval = -3; + goto err_common_setup_page; + +upper_common_setup_page: + if (i2c_smbus_write_byte_data(self->i2c_client_p, + VAL_TRANSVR_PAGE_SELECT_OFFSET, + page) < 0) { + emsg = "I2C R/W failure"; + retval = -2; + goto err_common_setup_page; + } + self->curr_page = page; + mdelay(VAL_TRANSVR_PAGE_SELECT_DELAY); + return 0; + +err_common_setup_page: + if (show_e) { + SWPS_INFO("%s: %s", __func__, emsg); + SWPS_INFO("%s: :0x%02x :%d :%d :%d\n", + __func__, addr, page, offset, len); + } + return retval; +} + +/* +static int +_common_setup_password(struct transvr_obj_s *self, + int addr, + int page, + int offs, + uint8_t pwd[4], + int show_e) { + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, 4, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_setup_password; + } + for (i=0; i<4; i++) { + err = i2c_smbus_write_byte_data(self->i2c_client_p, + (offs + i), + pwd[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_setup_password; + } + } + return 0; + +err_common_setup_password: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} +*/ + +static int +_common_update_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + uint8_t *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_uint8_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_uint8_attr; + } + buf[i] = err; + } + return 0; + +err_common_update_uint8_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_int_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_int_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_int_attr; + } + buf[i] = (int)err; + } + return 0; + +err_common_update_int_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_INT_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_string_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + char buf[], + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_string_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_string_attr; + } + buf[i] = (char)err; + } + return 0; + +err_common_update_string_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = 'e'; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + uint8_t update, + uint8_t *buf, + char *caller, + int show_e){ + int len = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + if ((*buf) == update){ + return 0; + } + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + err = i2c_smbus_write_byte_data(self->i2c_client_p, + offset, + update); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + (*buf) = update; + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_array(struct transvr_obj_s *self, + int addr, + int page, + int offs, + int len, + uint8_t update[], + uint8_t buf[], + char *caller, + int show_e){ + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + for (i=0; ii2c_client_p, + (offs + i), + update[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + buf[i] = update[i]; + } + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, emsg, caller, err, i); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_attr_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_id, + self->eeprom_map_p->page_id, + self->eeprom_map_p->offset_id, + self->eeprom_map_p->length_id, + &(self->id), + "_common_update_attr_id", + show_err); +} + + +static int +_common_update_attr_extended_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_ext_id, + self->eeprom_map_p->page_ext_id, + self->eeprom_map_p->offset_ext_id, + self->eeprom_map_p->length_ext_id, + &(self->ext_id), + "_common_update_attr_extended_id", + show_err); +} + + +static int +_common_update_attr_connector(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_connector, + self->eeprom_map_p->page_connector, + self->eeprom_map_p->offset_connector, + self->eeprom_map_p->length_connector, + &(self->connector), + "_common_update_attr_connector", + show_err); +} + + +static int +_common_update_attr_transvr_comp(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp, + self->eeprom_map_p->page_trancomp, + self->eeprom_map_p->offset_trancomp, + self->eeprom_map_p->length_trancomp, + self->transvr_comp, + "_common_update_attr_transvr_comp", + show_err); +} + + +static int +_common_update_attr_transvr_comp_ext(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp_ext, + self->eeprom_map_p->page_trancomp_ext, + self->eeprom_map_p->offset_trancomp_ext, + self->eeprom_map_p->length_trancomp_ext, + &(self->transvr_comp_ext), + "_common_update_attr_transvr_comp_ext", + show_err); +} + +static int +_common_update_attr_eeprom(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_eeprom, + self->eeprom_map_p->page_eeprom, + self->eeprom_map_p->offset_eeprom, + self->eeprom_map_p->length_eeprom, + self->eeprom, + "_common_update_attr_eeprom", + show_err); +} + +static int +_common_update_attr_vendor_name(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_name, + self->eeprom_map_p->page_vendor_name, + self->eeprom_map_p->offset_vendor_name, + self->eeprom_map_p->length_vendor_name, + self->vendor_name, + "_common_update_attr_vendor_name", + show_err); +} + + +static int +_common_update_attr_vendor_pn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_pn, + self->eeprom_map_p->page_vendor_pn, + self->eeprom_map_p->offset_vendor_pn, + self->eeprom_map_p->length_vendor_pn, + self->vendor_pn, + "_common_update_attr_vendor_pn", + show_err); +} + + +static int +_common_update_attr_vendor_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_rev, + self->eeprom_map_p->page_vendor_rev, + self->eeprom_map_p->offset_vendor_rev, + self->eeprom_map_p->length_vendor_rev, + self->vendor_rev, + "_common_update_attr_vendor_rev", + show_err); +} + + +static int +_common_update_attr_vendor_sn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_sn, + self->eeprom_map_p->page_vendor_sn, + self->eeprom_map_p->offset_vendor_sn, + self->eeprom_map_p->length_vendor_sn, + self->vendor_sn, + "_common_update_attr_vendor_sn", + show_err); +} + + +static int +_common_update_attr_br(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_br, + self->eeprom_map_p->page_br, + self->eeprom_map_p->offset_br, + self->eeprom_map_p->length_br, + &(self->br), + "_common_update_attr_br", + show_err); +} + + +static int +_common_update_attr_len_smf(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_smf, + self->eeprom_map_p->page_len_smf, + self->eeprom_map_p->offset_len_smf, + self->eeprom_map_p->length_len_smf, + &(self->len_smf), + "_common_update_attr_len_smf", + show_err); +} + + +static int +_common_update_attr_len_om1(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om1, + self->eeprom_map_p->page_len_om1, + self->eeprom_map_p->offset_len_om1, + self->eeprom_map_p->length_len_om1, + &(self->len_om1), + "_common_update_attr_len_om1", + show_err); +} + +static int +_common_update_attr_len_om2(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om2, + self->eeprom_map_p->page_len_om2, + self->eeprom_map_p->offset_len_om2, + self->eeprom_map_p->length_len_om2, + &(self->len_om2), + "_common_update_attr_len_om2", + show_err); +} + +static int +_common_update_attr_len_om3(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om3, + self->eeprom_map_p->page_len_om3, + self->eeprom_map_p->offset_len_om3, + self->eeprom_map_p->length_len_om3, + &(self->len_om3), + "_common_update_attr_len_om3", + show_err); +} + + +static int +_common_update_attr_len_om4(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om4, + self->eeprom_map_p->page_len_om4, + self->eeprom_map_p->offset_len_om4, + self->eeprom_map_p->length_len_om4, + &(self->len_om4), + "_common_update_attr_len_om4", + show_err); +} + + +static int +_common_update_attr_option(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_option, + self->eeprom_map_p->page_option, + self->eeprom_map_p->offset_option, + self->eeprom_map_p->length_option, + self->option, + "_common_update_attr_option", + show_err); +} + + +static int +_common_update_attr_comp_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_comp_rev, + self->eeprom_map_p->page_comp_rev, + self->eeprom_map_p->offset_comp_rev, + self->eeprom_map_p->length_comp_rev, + &(self->comp_rev), + "_common_update_attr_comp_rev", + show_err); +} + + +static int +_common_update_attr_diag_type(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_diag_type, + self->eeprom_map_p->page_diag_type, + self->eeprom_map_p->offset_diag_type, + self->eeprom_map_p->length_diag_type, + &(self->diag_type), + "_common_update_attr_diag_type", + show_err); +} + + +static int +_common_update_attr_wavelength(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_wavelength, + self->eeprom_map_p->page_wavelength, + self->eeprom_map_p->offset_wavelength, + self->eeprom_map_p->length_wavelength, + self->wavelength, + "_common_update_attr_wavelength", + show_err); +} + + +int +_common_get_option_value(struct transvr_obj_s *self, + int offset, + int bit_shift) { + /* SFP: + * - option[0] = A0h / 64 + * - option[1] = A0h / 65 + * QSFP: + * - option[0] = 00h / 193 + * - option[1] = 00h / 194 + * - option[2] = 00h / 195 + */ + return (self->option[offset] & (1 << bit_shift)); +} + +static int +_common_update_attr_manufacturing_date(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_manufacturing_date, + self->eeprom_map_p->page_manufacturing_date, + self->eeprom_map_p->offset_manufacturing_date, + self->eeprom_map_p->length_manufacturing_date, + self->manufacturing_date, + "_common_update_attr_manufacturing_date", + show_err); +} + +static int +_sfp_update_attr_eeprom_a0(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_eeprom_a0, + self->eeprom_map_p->page_eeprom_a0, + self->eeprom_map_p->offset_eeprom_a0, + self->eeprom_map_p->length_eeprom_a0, + self->eeprom_a0, + "_sfp_update_attr_eeprom_a0", + show_err); +} + +static int +_sfp_update_attr_len_sm(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_sm, + self->eeprom_map_p->page_len_sm, + self->eeprom_map_p->offset_len_sm, + self->eeprom_map_p->length_len_sm, + &(self->len_sm), + "_common_update_attr_len_sm", + show_err); +} + + +static int +_sfp_update_attr_rate_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_rate_id, + self->eeprom_map_p->page_rate_id, + self->eeprom_map_p->offset_rate_id, + self->eeprom_map_p->length_rate_id, + &(self->rate_id), + "_sfp_update_attr_rate_id", + show_err); +} + + +static int +_sfp_update_attr_soft_rs0(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + self->eeprom_map_p->length_soft_rs0, + &(self->soft_rs0), + "_sfp_update_attr_soft_rs0", + show_err); +} + + +static int +_sfp_update_attr_soft_rs1(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + self->eeprom_map_p->length_soft_rs1, + &(self->soft_rs1), + "_sfp_update_attr_soft_rs1", + show_err); +} + + +int +_sfp_is_diag_support(struct transvr_obj_s *self){ + + uint8_t bit_mask = 0xC0; /* 1100 0000 */ + uint8_t en_val = 0x40; /* 0100 0000 */ + uint8_t checkval = (self->diag_type & bit_mask); + + if (checkval == en_val) { + return 1; + } + return 0; +} + +static int +_sfp_update_attr_alarm_flag_byte_1(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_alarm_flag_byte_1, + self->eeprom_map_p->page_alarm_flag_byte_1, + self->eeprom_map_p->offset_alarm_flag_byte_1, + self->eeprom_map_p->length_alarm_flag_byte_1, + &(self->alarm_flag_byte_1), + "_sfp_update_attr_alarm_flag_byte_1", + show_err); +} + +static int +_sfp_update_attr_alarm_flag_byte_2(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_alarm_flag_byte_2, + self->eeprom_map_p->page_alarm_flag_byte_2, + self->eeprom_map_p->offset_alarm_flag_byte_2, + self->eeprom_map_p->length_alarm_flag_byte_2, + &(self->alarm_flag_byte_2), + "_sfp_update_attr_alarm_flag_byte_2", + show_err); +} + +static int +_sfp_update_attr_temp_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp_high_alarm_threshold, + self->eeprom_map_p->page_temp_high_alarm_threshold, + self->eeprom_map_p->offset_temp_high_alarm_threshold, + self->eeprom_map_p->length_temp_high_alarm_threshold, + self->temp_high_alarm_threshold, + "_sfp_update_attr_temp_high_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_temp_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp_low_alarm_threshold, + self->eeprom_map_p->page_temp_low_alarm_threshold, + self->eeprom_map_p->offset_temp_low_alarm_threshold, + self->eeprom_map_p->length_temp_low_alarm_threshold, + self->temp_low_alarm_threshold, + "_sfp_update_attr_temp_low_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_voltage_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage_high_alarm_threshold, + self->eeprom_map_p->page_voltage_high_alarm_threshold, + self->eeprom_map_p->offset_voltage_high_alarm_threshold, + self->eeprom_map_p->length_voltage_high_alarm_threshold, + self->voltage_high_alarm_threshold, + "_sfp_update_attr_voltage_high_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_voltage_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage_low_alarm_threshold, + self->eeprom_map_p->page_voltage_low_alarm_threshold, + self->eeprom_map_p->offset_voltage_low_alarm_threshold, + self->eeprom_map_p->length_voltage_low_alarm_threshold, + self->voltage_low_alarm_threshold, + "_sfp_update_attr_voltage_low_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_bias_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_bias_high_alarm_threshold, + self->eeprom_map_p->page_bias_high_alarm_threshold, + self->eeprom_map_p->offset_bias_high_alarm_threshold, + self->eeprom_map_p->length_bias_high_alarm_threshold, + self->bias_high_alarm_threshold, + "_sfp_update_attr_bias_high_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_bias_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_bias_low_alarm_threshold, + self->eeprom_map_p->page_bias_low_alarm_threshold, + self->eeprom_map_p->offset_bias_low_alarm_threshold, + self->eeprom_map_p->length_bias_low_alarm_threshold, + self->bias_low_alarm_threshold, + "_sfp_update_attr_bias_low_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_tx_power_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power_high_alarm_threshold, + self->eeprom_map_p->page_tx_power_high_alarm_threshold, + self->eeprom_map_p->offset_tx_power_high_alarm_threshold, + self->eeprom_map_p->length_tx_power_high_alarm_threshold, + self->tx_power_high_alarm_threshold, + "_sfp_update_attr_tx_power_high_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_tx_power_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power_low_alarm_threshold, + self->eeprom_map_p->page_tx_power_low_alarm_threshold, + self->eeprom_map_p->offset_tx_power_low_alarm_threshold, + self->eeprom_map_p->length_tx_power_low_alarm_threshold, + self->tx_power_low_alarm_threshold, + "_sfp_update_attr_tx_power_low_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_rx_power_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power_high_alarm_threshold, + self->eeprom_map_p->page_rx_power_high_alarm_threshold, + self->eeprom_map_p->offset_rx_power_high_alarm_threshold, + self->eeprom_map_p->length_rx_power_high_alarm_threshold, + self->rx_power_high_alarm_threshold, + "_sfp_update_attr_rx_power_high_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_rx_power_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power_low_alarm_threshold, + self->eeprom_map_p->page_rx_power_low_alarm_threshold, + self->eeprom_map_p->offset_rx_power_low_alarm_threshold, + self->eeprom_map_p->length_rx_power_low_alarm_threshold, + self->rx_power_low_alarm_threshold, + "_sfp_update_attr_rx_power_low_alarm_threshold", + show_err); +} + +static int +_sfp_update_attr_eeprom_a2(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_string_attr(self, + self->eeprom_map_p->addr_eeprom_a2, + self->eeprom_map_p->page_eeprom_a2, + self->eeprom_map_p->offset_eeprom_a2, + self->eeprom_map_p->length_eeprom_a2, + self->eeprom_a2, + "_sfp_update_attr_eeprom_a2", + show_err); +} + +static int +_sfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_sfp_update_attr_curr_temp", + show_err); +} + + +static int +_sfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_sfp_update_attr_curr_voltage", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_sfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_sfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_sfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_sfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_sfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_sfp_update_attr_rx_em", + show_err); +} + + +static int +_sfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_sfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_cdr(struct transvr_obj_s *self, + int show_err){ + if (self->type != TRANSVR_TYPE_QSFP_28){ + self->cdr = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + self->eeprom_map_p->length_cdr, + &(self->cdr), + "_common_update_attr_cdr", + show_err); +} + + +static int +_qsfg_update_attr_extbr(struct transvr_obj_s *self, + int show_err) { + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_extbr, + self->eeprom_map_p->page_extbr, + self->eeprom_map_p->offset_extbr, + self->eeprom_map_p->length_extbr, + &(self->extbr), + "_common_update_attr_extbr", + show_err); +} + +static int +_qsfp_update_attr_eeprom_page03(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_string_attr(self, + self->eeprom_map_p->addr_eeprom_page03, + self->eeprom_map_p->page_eeprom_page03, + self->eeprom_map_p->offset_eeprom_page03, + self->eeprom_map_p->length_eeprom_page03, + self->eeprom_page03, + "_qsfp_update_attr_eeprom_page03", + show_err); +} + +static int +_qsfp_is_diag_support(struct transvr_obj_s *self, + int diag_type) { + /* Input Parm: diag_type + * => 1 : temperature + * => 2 : voltage + * => 3 : tx relate + * => 4 : rx relate + */ + uint8_t mask_b2 = 0x04; /* 0000 0100 */ + uint8_t mask_b3 = 0x08; /* 0000 1000 */ + + switch (diag_type) { + case 1: /* temperature */ + case 2: /* voltage */ + /* Direct access target, because of spec not defined */ + return 1; + case 3: + case 4: + /* [Note] + * Due to lot of transceiver vendor defined it not rigorously and + * consider of general support, we seem it as supported if there + * are bit-2 OR bit-3 defined by transceiver vendor. + */ + if ( ((self->diag_type & mask_b2) == mask_b2 ) || + ((self->diag_type & mask_b3) == mask_b3 ) ){ + return 1; + } + return 0; + default: + SWPS_INFO("%s: undefined diag_type:%d\n", + __func__, diag_type); + break; + } + return 0; +} + + +int +_qsfp_is_implement_tx_disable(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-4 + */ + int byte = 2; + int bit = 4; + return _common_get_option_value(self, byte, bit); +} + + +int +_qsfp_is_implement_tx_fault(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-3 + */ + int byte = 2; + int bit = 3; + return _common_get_option_value(self, byte, bit); +} + +static int +_qsfp_update_attr_temp_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp_high_alarm_threshold, + self->eeprom_map_p->page_temp_high_alarm_threshold, + self->eeprom_map_p->offset_temp_high_alarm_threshold, + self->eeprom_map_p->length_temp_high_alarm_threshold, + self->temp_high_alarm_threshold, + "_qsfp_update_attr_temp_high_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_temp_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp_low_alarm_threshold, + self->eeprom_map_p->page_temp_low_alarm_threshold, + self->eeprom_map_p->offset_temp_low_alarm_threshold, + self->eeprom_map_p->length_temp_low_alarm_threshold, + self->temp_low_alarm_threshold, + "_qsfp_update_attr_temp_low_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_voltage_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage_high_alarm_threshold, + self->eeprom_map_p->page_voltage_high_alarm_threshold, + self->eeprom_map_p->offset_voltage_high_alarm_threshold, + self->eeprom_map_p->length_voltage_high_alarm_threshold, + self->voltage_high_alarm_threshold, + "_qsfp_update_attr_voltage_high_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_voltage_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage_low_alarm_threshold, + self->eeprom_map_p->page_voltage_low_alarm_threshold, + self->eeprom_map_p->offset_voltage_low_alarm_threshold, + self->eeprom_map_p->length_voltage_low_alarm_threshold, + self->voltage_low_alarm_threshold, + "_qsfp_update_attr_voltage_low_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_bias_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_bias_low_alarm_threshold, + self->eeprom_map_p->page_bias_low_alarm_threshold, + self->eeprom_map_p->offset_bias_low_alarm_threshold, + self->eeprom_map_p->length_bias_low_alarm_threshold, + self->bias_low_alarm_threshold, + "_qsfp_update_attr_bias_low_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_bias_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_bias_high_alarm_threshold, + self->eeprom_map_p->page_bias_high_alarm_threshold, + self->eeprom_map_p->offset_bias_high_alarm_threshold, + self->eeprom_map_p->length_bias_high_alarm_threshold, + self->bias_high_alarm_threshold, + "_qsfp_update_attr_bias_high_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_tx_power_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power_low_alarm_threshold, + self->eeprom_map_p->page_tx_power_low_alarm_threshold, + self->eeprom_map_p->offset_tx_power_low_alarm_threshold, + self->eeprom_map_p->length_tx_power_low_alarm_threshold, + self->tx_power_low_alarm_threshold, + "_qsfp_update_attr_tx_power_low_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_tx_power_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power_high_alarm_threshold, + self->eeprom_map_p->page_tx_power_high_alarm_threshold, + self->eeprom_map_p->offset_tx_power_high_alarm_threshold, + self->eeprom_map_p->length_tx_power_high_alarm_threshold, + self->tx_power_high_alarm_threshold, + "_qsfp_update_attr_tx_power_high_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_rx_power_low_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power_low_alarm_threshold, + self->eeprom_map_p->page_rx_power_low_alarm_threshold, + self->eeprom_map_p->offset_rx_power_low_alarm_threshold, + self->eeprom_map_p->length_rx_power_low_alarm_threshold, + self->rx_power_low_alarm_threshold, + "_qsfp_update_attr_rx_power_low_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_rx_power_high_alarm_threshold(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_page03(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power_high_alarm_threshold, + self->eeprom_map_p->page_rx_power_high_alarm_threshold, + self->eeprom_map_p->offset_rx_power_high_alarm_threshold, + self->eeprom_map_p->length_rx_power_high_alarm_threshold, + self->rx_power_high_alarm_threshold, + "_qsfp_update_attr_rx_power_high_alarm_threshold", + show_err); +} + +static int +_qsfp_update_attr_temp_alarm(struct transvr_obj_s *self, + int show_err){ + + int diag_type = 1; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp_alarm, + self->eeprom_map_p->page_temp_alarm, + self->eeprom_map_p->offset_temp_alarm, + self->eeprom_map_p->length_temp_alarm, + &(self->temp_alarm), + "_qsfp_update_attr_temp_alarm", + show_err); +} + +static int +_qsfp_update_attr_voltage_alarm(struct transvr_obj_s *self, + int show_err){ + + int diag_type = 2; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage_alarm, + self->eeprom_map_p->page_voltage_alarm, + self->eeprom_map_p->offset_voltage_alarm, + self->eeprom_map_p->length_voltage_alarm, + &(self->voltage_alarm), + "_qsfp_update_attr_voltage_alarm", + show_err); +} + +static int +_qsfp_update_attr_bias_alarm(struct transvr_obj_s *self, + int show_err){ + + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_bias_alarm, + self->eeprom_map_p->page_bias_alarm, + self->eeprom_map_p->offset_bias_alarm, + self->eeprom_map_p->length_bias_alarm, + self->bias_alarm, + "_qsfp_update_attr_bias_alarm", + show_err); +} + +static int +_qsfp_update_attr_tx_power_alarm(struct transvr_obj_s *self, + int show_err){ + + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power_alarm, + self->eeprom_map_p->page_tx_power_alarm, + self->eeprom_map_p->offset_tx_power_alarm, + self->eeprom_map_p->length_tx_power_alarm, + self->tx_power_alarm, + "_qsfp_update_attr_tx_power_alarm", + show_err); +} + +static int +_qsfp_update_attr_rx_power_alarm(struct transvr_obj_s *self, + int show_err){ + + int diag_type = 4; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power_alarm, + self->eeprom_map_p->page_rx_power_alarm, + self->eeprom_map_p->offset_rx_power_alarm, + self->eeprom_map_p->length_rx_power_alarm, + self->rx_power_alarm, + "_qsfp_update_attr_rx_power_alarm", + show_err); +} + +static int +_qsfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + int diag_type = 1; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_qsfp_update_attr_curr_temp", + show_err); +} + + +static int +_qsfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + int diag_type = 2; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_qsfp_update_attr_curr_voltage", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_qsfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_qsfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_qsfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 4; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_qsfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_qsfp_update_attr_soft_rx_los(struct transvr_obj_s *self, + int show_err){ + + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_los, + self->eeprom_map_p->page_rx_los, + self->eeprom_map_p->offset_rx_los, + self->eeprom_map_p->length_rx_los, + &(self->rx_los), + "_qsfp_update_attr_soft_rx_los", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_disable(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_disable(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_update_attr_soft_tx_disable", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_fault(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_fault(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_fault, + self->eeprom_map_p->page_tx_fault, + self->eeprom_map_p->offset_tx_fault, + self->eeprom_map_p->length_tx_fault, + &(self->tx_fault), + "_qsfp_update_attr_soft_tx_fault", + show_err); +} + + +static int +_qsfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_qsfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_rx_am(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + self->rx_am, + "_qsfp_update_attr_rx_am", + show_err); +} + + +static int +_qsfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_qsfp_update_attr_rx_em", + show_err); +} + + +int +_common_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = "err"; + + if (_common_update_attr_id(self, show_err) < 0) { + err_str = "_common_update_attr_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_extended_id(self, show_err) < 0) { + err_str = "_common_update_attr_extended_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_connector(self, show_err) < 0) { + err_str = "_common_update_attr_connector"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp_ext(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp_ext"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_name(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_name"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_pn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_pn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_rev(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_sn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_sn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_br(self, show_err) < 0) { + err_str = "_common_update_attr_br"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_smf(self, show_err) < 0) { + err_str = "_common_update_attr_len_smf"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om1(self, show_err) < 0) { + err_str = "_common_update_attr_len_om1"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om2(self, show_err) < 0) { + err_str = "_common_update_attr_len_om2"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om3(self, show_err) < 0) { + err_str = "_common_update_attr_len_om3"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om4(self, show_err) < 0) { + err_str = "_common_update_attr_len_om4"; + goto err_common_update_attr_all; + } + if (_common_update_attr_option(self, show_err) < 0) { + err_str = "_common_update_attr_option"; + goto err_common_update_attr_all; + } + if (_common_update_attr_comp_rev(self, show_err) < 0) { + err_str = "_common_update_attr_comp_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_diag_type(self, show_err) < 0) { + err_str = "_common_update_attr_diag_type"; + goto err_common_update_attr_all; + } + if (_common_update_attr_wavelength(self, show_err) < 0) { + err_str = "_common_update_attr_wavelength"; + goto err_common_update_attr_all; + } + return 0; + +err_common_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_sfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_len_sm(self, show_err) < 0) { + err_str = "_sfp_update_attr_len_sm"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_rate_id(self, show_err) < 0) { + err_str = "_sfp_update_attr_rate_id"; + goto err_sfp_update_attr_all; + } + if ((self->rate_id) > 0) { + if (_sfp_update_attr_soft_rs0(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs0"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_soft_rs1(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs1"; + goto err_sfp_update_attr_all; + } + } + return 0; + +err_sfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_qsfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_qsfp_update_attr_all; + } + if (_qsfg_update_attr_extbr(self, show_err) < 0) { + err_str = "_qsfg_update_attr_extbr"; + goto err_qsfp_update_attr_all; + } + if (self->type == TRANSVR_TYPE_QSFP_28) { + if (_qsfp_update_attr_cdr(self, 1) < 0) { + err_str = "_qsfp_update_attr_cdr"; + goto err_qsfp_update_attr_all; + } + } + return 0; + +err_qsfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +/* ========== Object functions for common type ========== + */ +int +_common_count_temp(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + int sign = 0; + int high = 0; + int low = 0; + int lmax = 8; + + /* Count high */ + sign = get_bit(high_byte,7); + SWP_BIT_CLEAR(high_byte, 7); + high = (int)high_byte; + + /* Count low */ + low = (get_bit(low_byte, 7) * 500); + low += (get_bit(low_byte, 6) * 250); + low += (get_bit(low_byte, 5) * 125); + low += (get_bit(low_byte, 4) * 62); + low = (low / 100); + /* Integrate High and Low */ + if (sign == 1) { + high = 0 - (127 - high); + low = 0 - low; + } + return snprintf(buf_p, lmax, "%d.%d\n", high, low); +} + + +int +_common_count_voltage(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note]: + * Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts. Practical + * considerations to be defined by transceiver manufacturer will + * tend to limit the actual bounds of the supply voltage measurement. + * Accuracy is vendor specific but must be better than 3% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. Note that in some transceivers, transmitter supply + * voltage and receiver supply voltage are isolated. In that case, + * only one supply is monitored. Refer to the device specification + * for more detail. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 100 uV (1mV=1000uV) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 Volt */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_tx_bias(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 2 uA (1mA=1000uA) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total*2) / 1000); + val_f = (((total*2) - (val_i*1000)) / 100); + /* Return Unit: 1 mA */ + return snprintf(buf_p, lmax, "%d.%01d\n", val_i, val_f); +} + + +int +_common_count_tx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_rx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_wavelength(struct transvr_obj_s *self, + uint8_t high_byte, + uint8_t low_byte) { + /* [Note] + * SFP : uint 1 um. + * QSFP: unit 0.05 um. + */ + int total = 0; + + total = transform_word_to_int(high_byte, low_byte); + switch (self->type) { + case TRANSVR_TYPE_SFP: + return total; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + return (total/20); + + default: + break; + } + return ERR_TRANSVR_UNDEFINED; +} + + +int +common_get_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_id, + "common_get_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->id; +} + + +int +common_get_ext_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "common_get_ext_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->ext_id; +} + + +int +common_get_connector(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_connector, + "common_get_connector"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->connector; +} + +int +common_get_eeprom(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_common_update_attr_eeprom, + "common_get_eeprom"); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + memset(buf, 0, self->eeprom_map_p->length_eeprom); + memcpy(buf, self->eeprom, self->eeprom_map_p->length_eeprom); + return self->eeprom_map_p->length_eeprom; +} + +int +common_get_vendor_name(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_name, + "common_get_vendor_name"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); +} + + +int +common_get_vendor_pn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_pn, + "common_get_vendor_pn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); +} + + +int +common_get_vendor_rev(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_rev, + "common_get_vendor_rev"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); +} + + +int +common_get_vendor_sn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_sn, + "common_get_vendor_sn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); +} + + +int +common_get_br(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return (int)self->br; + } + err = _check_by_mode(self, + &_common_update_attr_br, + "common_get_br"); + if (err < 0){ + return err; + } + /* Transform to INT to show error case */ + return (int)self->br; +} + + +int +common_get_len_smf(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_smf; + } + err = _check_by_mode(self, + &_common_update_attr_len_smf, + "common_get_len_smf"); + if (err < 0){ + return err; + } + return self->len_smf; +} + + +int +common_get_len_om1(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om1; + } + err = _check_by_mode(self, + &_common_update_attr_len_om1, + "common_get_len_om1"); + if (err < 0){ + return err; + } + return self->len_om1; +} + + +int +common_get_len_om2(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om2; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om2, + "common_get_len_om2"); + if (err < 0){ + return err; + } + return self->len_om2; +} + + +int +common_get_len_om3(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om3; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om3, + "common_get_len_om3"); + if (err < 0){ + return err; + } + return self->len_om3; +} + + +int +common_get_len_om4(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om4; + } + err = _check_by_mode(self, + &_common_update_attr_len_om4, + "common_get_len_om4"); + if (err < 0){ + return err; + } + return self->len_om4; +} + + +int +common_get_comp_extended(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp_ext, + "common_get_comp_extended"); + if (err_code < 0){ + return err_code; + } + return self->transvr_comp_ext; +} + + +int +common_get_comp_rev(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_comp_rev, + "common_get_comp_rev"); + if (err_code < 0){ + return err_code; + } + return self->comp_rev; +} + + +int +common_get_info(struct transvr_obj_s *self){ + + if (self->state != STATE_TRANSVR_CONNECTED) { + return self->state; + } + return self->info; +} + + +int +_common_get_if_lane(struct transvr_obj_s *self, + char *result){ + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_M_STR); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + memset(tmp_str, 0, LEN_TRANSVR_M_STR); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_M_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_M_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_M_STR); + } + if (i == 0) { + return EVENT_TRANSVR_TASK_FAIL; + } + return 0; +} + + +int +common_get_if_lane(struct transvr_obj_s *self, + char *buf_p){ + + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + if (self->ioexp_obj_p->state != STATE_IOEXP_NORMAL) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n", ERR_TRANSVR_ABNORMAL); + } + if (_common_get_if_lane(self, tmp_str) < 0) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n" ,ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%s\n" ,tmp_str); +} + +int +common_get_manufacturing_date(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 16; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_manufacturing_date, + "common_get_manufacturing_date"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ( self->manufacturing_date == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, lmax, "20%c%c-%c%c-%c%c %c%c\n", self->manufacturing_date[0], + self->manufacturing_date[1], + self->manufacturing_date[2], + self->manufacturing_date[3], + self->manufacturing_date[4], + self->manufacturing_date[5], + self->manufacturing_date[6], + self->manufacturing_date[7]); +} + +int +sfp_get_len_sm(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_len_sm, + "sfp_get_len_sm"); + if (err_code < 0){ + return err_code; + } + return self->len_sm; +} + + +int +sfp_get_rate_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_rate_id, + "sfp_get_rate_id"); + if (err_code < 0){ + return err_code; + } + return self->rate_id; +} + + +int +sfp_get_soft_rs0(struct transvr_obj_s *self){ + /* Note: + * SFP Soft Rate_Select Select [aka. "RS(0)"] address + * A2h, offset: 110, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs0, + "sfp_get_soft_rs0"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs0 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_soft_rs1(struct transvr_obj_s *self){ + /* Note: + * SFP Soft RS(1) Select address + * A2h, offset: 118, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs1, + "sfp_get_soft_rs1"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs1 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_temp, + "sfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +sfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_voltage, + "sfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +sfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_bias, + "sfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->curr_tx_bias[0], + self->curr_tx_bias[1], + buf_p); +} + + +int +sfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_power, + "sfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->curr_tx_power[0], + self->curr_tx_power[1], + buf_p); +} + + +int +sfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_rx_power, + "sfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->curr_rx_power[0], + self->curr_rx_power[1], + buf_p); +} + + +int +sfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->rx_em[0]); +} + + +int +sfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->tx_eq[0]); +} + + +int +_sfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: A0h / 36 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +__sfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* SFP Specification Compliance: A0h / 3-10 + * transvr_comp[0-7] = 3 - 10 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_get_comp_10g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[0] = address A0h / 3 + * + * 3 7: 10G Base-ER + * 3 6: 10GBASE-LRM + * 3 5: 10GBASE-LR + * 3 4: 10GBASE-SR + */ + int bitmask = 0xf0; /* 11110000 */ + return (__sfp_get_comp_attr(self, 0) & bitmask); +} + + +int +_sfp_get_comp_1g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[3] = address A0h / 6 + * + * 6 7: BASE-PX *3 + * 6 6: BASE-BX10 *3 + * 6 5: 100BASE-FX + * 6 4: 100BASE-LX/LX10 + * 6 3: 1000BASE-T + * 6 2: 1000BASE-CX + * 6 1: 1000BASE-LX *3 + * 6 0: 1000BASE-SX + */ + return __sfp_get_comp_attr(self, 3); +} + + +int +_sfp_get_cable_tech(struct transvr_obj_s *self) { + /* transvr_comp[5] = address A0h / 8 + * + * 8 3: Active Cable *8 + * 8 2: Passive Cable *8 + */ + int bitmask = 0x0c; /* 00001100 */ + return (__sfp_get_comp_attr(self, 5) & bitmask); +} + + +int +sfp_get_comp_eth_1(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_1"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_1g_eth_comp(self); +} + + +int +sfp_get_comp_eth_10(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_10"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_10g_eth_comp(self); +} + + +int +_sfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: A0h / 2 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Note] Optical and Cable Variants Specification Compliance (SFF-8472) + * [Addr] A0h, Bytes 60-61 + * [Note] For optical variants, as defined by having zero's in A0h Byte 8 + * bits 2 and 3, Bytes 60 and 61 denote nominal transmitter output + * wavelength at room temperature. 16 bit value with byte 60 as high + * order byte and byte 61 as low order byte. The laser wavelength is + * equal to the 16 bit integer value in nm. This field allows the user + * to read the laser wavelength directly, so it is not necessary to + * infer it from the Transceiver Codes A0h Bytes 3 to 10 (see Table + * 5-3). This also allows specification of wavelengths not covered + * in the Transceiver Codes, such as those used in coarse WDM systems. + * + * For passive and active cable variants, a value of 00h for both A0h + * Byte 60 and Byte 61 denotes laser wavelength or cable specification + * compliance is unspecified. + */ + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +int +sfp_get_1g_rj45_extphy_offset(struct transvr_obj_s *self, char *buf) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%02x\n", self->extphy_offset); +} + + +int +sfp_get_1g_rj45_extphy_reg(struct transvr_obj_s *self, char *buf) { + + int i = 0; + int ret = 0; + int retry = 3; + int delay = 200; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; ii2c_client_p, self->extphy_offset); + if (ret >=0) { + goto ok_sfp_get_1g_rj45_extphy_reg; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; + +ok_sfp_get_1g_rj45_extphy_reg: + ret = ((ret & 0x00ff) << 8) | ((ret & 0xff00) >> 8); + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%04x\n", ret); +} + +int +sfp_get_eeprom_a0(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_eeprom_a0, + "sfp_get_eeprom_a0"); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + memset(buf, 0, self->eeprom_map_p->length_eeprom_a0); + memcpy(buf, self->eeprom_a0, self->eeprom_map_p->length_eeprom_a0); + return self->eeprom_map_p->length_eeprom_a0; +} + +int +sfp_get_eeprom_a2(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_eeprom_a2, + "sfp_get_eeprom_a2"); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + memset(buf, 0, self->eeprom_map_p->length_eeprom_a2); + memcpy(buf, self->eeprom_a2, self->eeprom_map_p->length_eeprom_a2); + return self->eeprom_map_p->length_eeprom_a2; +} + +int +sfp_get_temp_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_temp_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,7)); + +} + +int +sfp_get_temp_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_temp_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,6)); + +} + +int +sfp_get_voltage_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_voltage_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,5)); + +} + +int +sfp_get_voltage_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_voltage_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,4)); + +} + +int +sfp_get_bias_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_bias_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,3)); + +} + +int +sfp_get_bias_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_bias_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,2)); + +} + +int +sfp_get_tx_power_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_tx_power_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,1)); + +} + +int +sfp_get_tx_power_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_1, + "sfp_get_tx_power_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_1 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias Alarm Bit-3 + * Tx Bias Alarm Bit-2 + * Tx Power Alarm Bit-1 + * Tx Power Alarm Bit-0 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_1 ,0)); + +} + +int +sfp_get_rx_power_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_2, + "sfp_get_rx_power_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_2 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-113 + * Rx Power Alarm Bit-7 + * Rx Power Alarm Bit-6 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_2 ,7)); + +} + +int +sfp_get_rx_power_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_alarm_flag_byte_2, + "sfp_get_rx_power_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, limt, "%d\n", err_code); + } + if ( self->alarm_flag_byte_2 == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-113 + * Rx Power Alarm Bit-7 + * Rx Power Alarm Bit-6 + */ + return snprintf(buf_p, limt, "%d\n", get_bit( self->alarm_flag_byte_2 ,6)); + +} + +int +sfp_get_temp_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_temp_high_alarm_threshold, + "sfp_get_temp_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->temp_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->temp_high_alarm_threshold[0], + self->temp_high_alarm_threshold[1], + buf_p); +} + +int +sfp_get_temp_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_temp_low_alarm_threshold, + "sfp_get_temp_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->temp_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->temp_low_alarm_threshold[0], + self->temp_low_alarm_threshold[1], + buf_p); +} + +int +sfp_get_voltage_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_voltage_high_alarm_threshold, + "sfp_get_voltage_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->voltage_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->voltage_high_alarm_threshold[0], + self->voltage_high_alarm_threshold[1], + buf_p); +} + +int +sfp_get_voltage_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_voltage_low_alarm_threshold, + "sfp_get_voltage_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->voltage_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->voltage_low_alarm_threshold[0], + self->voltage_low_alarm_threshold[1], + buf_p); +} + +int +sfp_get_bias_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_bias_high_alarm_threshold, + "sfp_get_bias_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->bias_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->bias_high_alarm_threshold[0], + self->bias_high_alarm_threshold[1], + buf_p); +} + +int +sfp_get_bias_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_bias_low_alarm_threshold, + "sfp_get_bias_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->bias_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->bias_low_alarm_threshold[0], + self->bias_low_alarm_threshold[1], + buf_p); +} + +int +sfp_get_tx_power_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_tx_power_high_alarm_threshold, + "sfp_get_tx_power_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->tx_power_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->tx_power_high_alarm_threshold[0], + self->tx_power_high_alarm_threshold[1], + buf_p); +} + +int +sfp_get_tx_power_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_tx_power_low_alarm_threshold, + "sfp_get_tx_power_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->tx_power_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->tx_power_low_alarm_threshold[0], + self->tx_power_low_alarm_threshold[1], + buf_p); +} + +int +sfp_get_rx_power_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_rx_power_high_alarm_threshold, + "sfp_get_rx_power_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->rx_power_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->rx_power_high_alarm_threshold[0], + self->rx_power_high_alarm_threshold[1], + buf_p); +} + +int +sfp_get_rx_power_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_rx_power_low_alarm_threshold, + "sfp_get_rx_power_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->rx_power_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->rx_power_low_alarm_threshold[0], + self->rx_power_low_alarm_threshold[1], + buf_p); +} + +int +__qsfp_get_power_cls(struct transvr_obj_s *self, + int direct_access){ + + int err_code; + uint8_t detect_val; + + /* Detect and Update power class attribute */ + if (direct_access){ + err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_power_cls"); + } else { + err_code = self->ext_id; + } + if (err_code <0){ + return err_code; + } + if (err_code == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data */ + detect_val = self->ext_id; + SWP_BIT_CLEAR(detect_val, 2); /* Bit2: CDR RX present */ + SWP_BIT_CLEAR(detect_val, 3); /* Bit3: CDR TX present */ + SWP_BIT_CLEAR(detect_val, 4); /* Bit4: CLEI present */ + SWP_BIT_CLEAR(detect_val, 5); /* Bit5: reserved */ + /* Identify power class */ + switch (detect_val) { + case 0: /* Class_1: 00000000 */ + return 1; + case 64: /* Class_2: 01000000 */ + return 2; + case 128: /* Class_3: 10000000 */ + return 3; + case 192: /* Class_4: 11000000 */ + return 4; + case 1: /* Class_5: 00000001 */ + case 193: /* Class_5: 11000001 */ + return 5; + case 2: /* Class_6: 00000010 */ + case 194: /* Class_6: 11000010 */ + return 6; + case 3: /* Class_7: 00000011 */ + case 195: /* Class_7: 11000011 */ + return 7; + default: + break; + } + SWPS_INFO("%s: Detect undefined power class:%d\n", __func__, detect_val); + return ERR_TRANSVR_UNDEFINED; +} + + +int +qsfp_get_power_cls(struct transvr_obj_s *self) { + return __qsfp_get_power_cls(self, 1); +} + +int +qsfp_get_eeprom_page03(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_eeprom_page03, + "qsfp_get_eeprom_page03"); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + memset(buf, 0, self->eeprom_map_p->length_eeprom_page03); + memcpy(buf, self->eeprom_page03, self->eeprom_map_p->length_eeprom_page03); + return self->eeprom_map_p->length_eeprom_page03; +} + +int +__qsfp_get_cdr_present(struct transvr_obj_s *self, + int direct_access){ + + int retval; + int BIT_SHIFT = 2; + int BIT_MASK = 0x3; + + /* Detect and Update power class attribute */ + if (direct_access) { + retval = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_cdr_present"); + if (retval < 0){ + return retval; + } + } + retval = self->ext_id; + if (retval == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data and return */ + return (int)(retval >> BIT_SHIFT & BIT_MASK); +} + + +int +qsfp_get_cdr_present(struct transvr_obj_s *self) { + return __qsfp_get_cdr_present(self, 1); +} + + +int +qsfp_get_cdr(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + "qsfp_get_cdr"); + if (err_code <0){ + return err_code; + } + + return self->cdr; +} + + +int +__qsfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* QSFP Specification Compliance: 00h / 131-138 + * transvr_comp[0-7] = 131 - 138 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_get_comp_10_40_100_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[0] = address 00h / 131 + * + * 131 7: Extended: See section 6.3.23. The Extended Specification Compliance + * Codes are maintained in the Transceiver Management section of SFF- + * 8024. + * 131 6: 10GBASE-LRM + * 131 5: 10GBASE-LR + * 131 4: 10GBASE-SR + * 131 3: 40GBASE-CR4 + * 131 2: 40GBASE-SR4 + * 131 1: 40GBASE-LR4 + * 131 0: 40G Active Cable (XLPPI) + */ + return __qsfp_get_comp_attr(self, 0); +} + + +int +_qsfp_get_comp_sonet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 132 7-3: Reserved + * 132 2: OC 48, long reach + * 132 1: OC 48, intermediate reach + * 132 0: OC 48 short reach + */ + return __qsfp_get_comp_attr(self, 1); +} + + +int +_qsfp_get_comp_sas_sata(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 133 7: SAS 24.0 Gb/s + * 133 6: SAS 12.0 Gb/s + * 133 5: SAS 6.0 Gb/s + * 133 4: SAS 3.0 Gb/s + * 133 3-0: Reserved + */ + return __qsfp_get_comp_attr(self, 2); +} + + +int +_qsfp_get_comp_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 134 7-4: Reserved + * 134 3: 1000BASE-T + * 134 2: 1000BASE-CX + * 134 1: 1000BASE-LX + * 134 0: 1000BASE-SX + */ + return __qsfp_get_comp_attr(self, 3); +} + + +int +_qsfp_get_comp_fc_link_length(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 7: Very long distance (V) + * 135 6: Short distance (S) + * 135 5: Intermediate distance (I) + * 135 4: Long distance (L) + * 135 3: Medium (M) + */ + int mask = 0xFC; /* 11111100 */ + return (__qsfp_get_comp_attr(self, 4) & mask); +} + + +int +_qsfp_get_comp_fc_trans_tech(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 2: Reserved + * 135 1: Longwave laser (LC) + * 135 0: Electrical inter-enclosure (EL) + * + * 136 7: Electrical intra-enclosure + * 136 6: Shortwave laser w/o OFC (SN) + * 136 5: Shortwave laser w OFC (SL) + * 136 4: Longwave Laser (LL) + * 136 3-0: Reserved + * + * return value = [bit 8-15:addr 135][bit 0-7:addr 136] + */ + int mask_135 = 7; /* 00000111 */ + int val_135 = (__qsfp_get_comp_attr(self, 4) & mask_135); + int val_136 = __qsfp_get_comp_attr(self, 5); + return ((val_135 << 7) + val_136); +} + + +int +_qsfp_get_comp_fc_trans_media(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 137 7: Twin Axial Pair (TW) + * 137 6: Shielded Twisted Pair (TP) + * 137 5: Miniature Coax (MI) + * 137 4: Video Coax (TV) + * 137 3: Multi-mode 62.5 m (M6) + * 137 2: Multi-mode 50 m (M5) + * 137 1: Multi-mode 50 um (OM3) + * 137 0: Single Mode (SM) + */ + return __qsfp_get_comp_attr(self, 6); +} + + +int +_qsfp_get_comp_fc_speed(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 138 7: 1200 MBps (per channel) + * 138 6: 800 MBps + * 138 5: 1600 MBps (per channel) + * 138 4: 400 MBps + * 138 3: 3200 MBps (per channel) + * 138 2: 200 MBps + * 138 1: Extended: See section 6.3.23. The Extended Specification + * Compliance Codes are maintained in the Transceiver Management + * section of SFF-8024. + * 138 0: 100 MBps + */ + return __qsfp_get_comp_attr(self, 7); +} + + +int +_qsfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: 00h / 192 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_comp_eth(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_eth"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_ethernet(self); +} + + +int +qsfp_get_comp_10_40(struct transvr_obj_s *self) { + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_10_40"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_10_40_100_ethernet(self); +} + + +int +_qsfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: 00h / 130 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_temp, + "qsfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +qsfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_voltage, + "qsfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +qsfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->tx_eq[0], self->tx_eq[1]); +} + + +int +qsfp_get_transvr_rx_am(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_get_transvr_rx_am"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_am[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_am[0], self->rx_am[1]); +} + + +int +qsfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_em[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_em[0], self->rx_em[1]); +} + + +int +_qsfp_get_channel_diag(uint8_t *data_array, + int (*count_func)(uint8_t high_byte, uint8_t low_byte, char *buf_p), + char *ch_name, + char *result_p) { + int i, high, low; + int len_max = 128; + char ch_buf[4][16] = { DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL }; + + for (i=0; i<4; i++) { + high = (i*2); + low = ((i*2) + 1); + count_func(data_array[high], data_array[low], ch_buf[i]); + } + return snprintf(result_p, len_max, + "%s-%d:%s%s-%d:%s%s-%d:%s%s-%d:%s", + ch_name, 1, ch_buf[0], + ch_name, 2, ch_buf[1], + ch_name, 3, ch_buf[2], + ch_name, 4, ch_buf[3]); +} + + +int +qsfp_get_soft_rx_los(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_rx_los, + "qsfp_get_soft_rx_los"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->rx_los & mask)); +} + + +int +qsfp_get_soft_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_get_soft_tx_disable"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_disable & mask)); +} + + +int +qsfp_get_soft_tx_fault(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_fault, + "qsfp_get_soft_tx_fault"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_fault & mask)); +} + + +int +qsfp_get_auto_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + if (self->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "%d\n", ERR_TRANSVR_FUNC_DISABLE); + } + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "0x%02x\n", self->auto_tx_disable); +} + + +int +qsfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_bias, + "qsfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _qsfp_get_channel_diag(self->curr_tx_bias, + _common_count_tx_bias, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_power, + "qsfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_tx_power, + _common_count_tx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_rx_power, + "qsfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_rx_power, + _common_count_rx_power, + ch_name, + buf_p); +} + +int +qsfp_get_temp_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_temp_high_alarm_threshold, + "qsfp_get_temp_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->temp_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->temp_high_alarm_threshold[0], + self->temp_high_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_temp_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_temp_low_alarm_threshold, + "qsfp_get_temp_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->temp_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->temp_low_alarm_threshold[0], + self->temp_low_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_voltage_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_voltage_high_alarm_threshold, + "qsfp_get_voltage_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->voltage_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->voltage_high_alarm_threshold[0], + self->voltage_high_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_voltage_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_voltage_low_alarm_threshold, + "qsfp_get_voltage_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->voltage_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->voltage_low_alarm_threshold[0], + self->voltage_low_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_bias_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_bias_low_alarm_threshold, + "qsfp_get_bias_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->bias_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->bias_low_alarm_threshold[0], + self->bias_low_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_bias_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_bias_high_alarm_threshold, + "qsfp_get_bias_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->bias_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->bias_high_alarm_threshold[0], + self->bias_high_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_tx_power_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_tx_power_low_alarm_threshold, + "qsfp_get_tx_power_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->tx_power_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->tx_power_low_alarm_threshold[0], + self->tx_power_low_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_tx_power_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_tx_power_high_alarm_threshold, + "qsfp_get_tx_power_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->tx_power_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->tx_power_high_alarm_threshold[0], + self->tx_power_high_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_rx_power_low_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_rx_power_low_alarm_threshold, + "qsfp_get_rx_power_low_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->rx_power_low_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->rx_power_low_alarm_threshold[0], + self->rx_power_low_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_rx_power_high_alarm_threshold(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_rx_power_high_alarm_threshold, + "qsfp_get_rx_power_high_alarm_threshold"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->rx_power_high_alarm_threshold[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->rx_power_high_alarm_threshold[0], + self->rx_power_high_alarm_threshold[1], + buf_p); +} + +int +qsfp_get_temp_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_temp_alarm, + "qsfp_get_temp_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ( self->temp_alarm == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP Temp Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-6 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + */ + return snprintf(buf_p, lmax, "%d\n", get_bit( self->temp_alarm ,7)); + +} + +int +qsfp_get_temp_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_temp_alarm, + "qsfp_get_temp_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ( self->temp_alarm == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP Temp Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-6 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + */ + return snprintf(buf_p, lmax, "%d\n", get_bit( self->temp_alarm ,6)); + +} + +int +qsfp_get_voltage_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_voltage_alarm, + "qsfp_get_voltage_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ( self->voltage_alarm == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP voltage Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-7 + * voltage High Alarm Bit-7 + * voltage Low Alarm Bit-6 + */ + return snprintf(buf_p, lmax, "%d\n", get_bit( self->voltage_alarm ,7)); + +} + +int +qsfp_get_voltage_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_voltage_alarm, + "qsfp_get_voltage_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ( self->voltage_alarm == DEBUG_TRANSVR_HEX_VAL ) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP voltage Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-7 + * voltage High Alarm Bit-7 + * voltage Low Alarm Bit-6 + */ + return snprintf(buf_p, lmax, "%d\n", get_bit( self->voltage_alarm ,6)); + +} + +int +qsfp_get_rx_power_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int len_max = 128; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_rx_power_alarm, + "qsfp_get_rx_power_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->rx_power_alarm[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP RX Power Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-9~10 + * RX1 Power High Alarm Byte-9 Bit-7 + * RX1 Power Low Alarm Byte-9 Bit-6 + * RX2 Power High Alarm Byte-9 Bit-3 + * RX2 Power Low Alarm Byte-9 Bit-2 + * RX3 Power High Alarm Byte-10 Bit-7 + * RX3 Power Low Alarm Byte-10 Bit-6 + * RX4 Power High Alarm Byte-10 Bit-3 + * RX4 Power Low Alarm Byte-10 Bit-2 + */ + return snprintf(buf_p, len_max, "%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n", + ch_name, 1, get_bit( self->rx_power_alarm[0] ,7), + ch_name, 2, get_bit( self->rx_power_alarm[0] ,3), + ch_name, 3, get_bit( self->rx_power_alarm[1] ,7), + ch_name, 4, get_bit( self->rx_power_alarm[1] ,3)); + +} + +int +qsfp_get_rx_power_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int len_max = 128; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_rx_power_alarm, + "qsfp_get_rx_power_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->rx_power_alarm[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP RX Power Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-9~10 + * RX1 Power High Alarm Byte-9 Bit-7 + * RX1 Power Low Alarm Byte-9 Bit-6 + * RX2 Power High Alarm Byte-9 Bit-3 + * RX2 Power Low Alarm Byte-9 Bit-2 + * RX3 Power High Alarm Byte-10 Bit-7 + * RX3 Power Low Alarm Byte-10 Bit-6 + * RX4 Power High Alarm Byte-10 Bit-3 + * RX4 Power Low Alarm Byte-10 Bit-2 + */ + return snprintf(buf_p, len_max, "%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n", + ch_name, 1, get_bit( self->rx_power_alarm[0] ,6), + ch_name, 2, get_bit( self->rx_power_alarm[0] ,2), + ch_name, 3, get_bit( self->rx_power_alarm[1] ,6), + ch_name, 4, get_bit( self->rx_power_alarm[1] ,2)); + +} + +int +qsfp_get_bias_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int len_max = 128; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_rx_power_alarm, + "qsfp_get_bias_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->bias_alarm[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP TX bias Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-11~12 + * TX1 bias High Alarm Byte-11 Bit-7 + * TX1 bias Low Alarm Byte-11 Bit-6 + * TX2 bias High Alarm Byte-11 Bit-3 + * TX2 bias Low Alarm Byte-11 Bit-2 + * TX3 bias High Alarm Byte-12 Bit-7 + * TX3 bias Low Alarm Byte-12 Bit-6 + * TX4 bias High Alarm Byte-12 Bit-3 + * TX4 bias Low Alarm Byte-12 Bit-2 + */ + return snprintf(buf_p, len_max, "%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n", + ch_name, 1, get_bit( self->bias_alarm[0] ,7), + ch_name, 2, get_bit( self->bias_alarm[0] ,3), + ch_name, 3, get_bit( self->bias_alarm[1] ,7), + ch_name, 4, get_bit( self->bias_alarm[1] ,3)); + +} + +int +qsfp_get_bias_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int len_max = 128; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_rx_power_alarm, + "qsfp_get_bias_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->bias_alarm[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP TX bias Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-11~12 + * TX1 bias High Alarm Byte-11 Bit-7 + * TX1 bias Low Alarm Byte-11 Bit-6 + * TX2 bias High Alarm Byte-11 Bit-3 + * TX2 bias Low Alarm Byte-11 Bit-2 + * TX3 bias High Alarm Byte-12 Bit-7 + * TX3 bias Low Alarm Byte-12 Bit-6 + * TX4 bias High Alarm Byte-12 Bit-3 + * TX4 bias Low Alarm Byte-12 Bit-2 + */ + return snprintf(buf_p, len_max, "%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n", + ch_name, 1, get_bit( self->bias_alarm[0] ,6), + ch_name, 2, get_bit( self->bias_alarm[0] ,2), + ch_name, 3, get_bit( self->bias_alarm[1] ,6), + ch_name, 4, get_bit( self->bias_alarm[1] ,2)); + +} + +int +qsfp_get_tx_power_high_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int len_max = 128; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_tx_power_alarm, + "qsfp_get_tx_power_high_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->tx_power_alarm[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP TX Power Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-13~14 + * TX1 Power High Alarm Byte-13 Bit-7 + * TX1 Power Low Alarm Byte-13 Bit-6 + * TX2 Power High Alarm Byte-13 Bit-3 + * TX2 Power Low Alarm Byte-13 Bit-2 + * TX3 Power High Alarm Byte-14 Bit-7 + * TX3 Power Low Alarm Byte-14 Bit-6 + * TX4 Power High Alarm Byte-14 Bit-3 + * TX4 Power Low Alarm Byte-14 Bit-2 + */ + return snprintf(buf_p, len_max, "%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n", + ch_name, 1, get_bit( self->tx_power_alarm[0] ,7), + ch_name, 2, get_bit( self->tx_power_alarm[0] ,3), + ch_name, 3, get_bit( self->tx_power_alarm[1] ,7), + ch_name, 4, get_bit( self->tx_power_alarm[1] ,3)); + +} + +int +qsfp_get_tx_power_low_alarm(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int len_max = 128; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_tx_power_alarm, + "qsfp_get_tx_power_low_alarm"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->tx_power_alarm[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP TX Power Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-13~14 + * TX1 Power High Alarm Byte-13 Bit-7 + * TX1 Power Low Alarm Byte-13 Bit-6 + * TX2 Power High Alarm Byte-13 Bit-3 + * TX2 Power Low Alarm Byte-13 Bit-2 + * TX3 Power High Alarm Byte-14 Bit-7 + * TX3 Power Low Alarm Byte-14 Bit-6 + * TX4 Power High Alarm Byte-14 Bit-3 + * TX4 Power Low Alarm Byte-14 Bit-2 + */ + return snprintf(buf_p, len_max, "%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n%s-%d:%d\n", + ch_name, 1, get_bit( self->tx_power_alarm[0] ,6), + ch_name, 2, get_bit( self->tx_power_alarm[0] ,2), + ch_name, 3, get_bit( self->tx_power_alarm[1] ,6), + ch_name, 4, get_bit( self->tx_power_alarm[1] ,2)); + +} + +int +qsfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Desc] Wavelength or Copper Cable Attenuation (SFF-8636) + * [Addr] 00h 186-187 + * [Note] + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is + * a 16-bit hex value with Byte 186 as high order byte and Byte 187 as + * low order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. + * If the free side device is identified as copper cable these registers will + * be used to define the cable attenuation. An indication of 0 dB attenuation + * refers to the case where the attenuation is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +/* Public Function for Setup Features + */ +static int +__sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + uint8_t update_val = (*attr_p); + + switch (input_val) { + case 0: + SWP_BIT_CLEAR(update_val, bit_shift); + break; + case 1: + SWP_BIT_SET(update_val, bit_shift); + break; + default: + retval = ERR_TRANSVR_UNEXCPT; + err_code = ERR_TRANSVR_UNEXCPT; + err_msg = "Exception occurs"; + goto err_private_sfp_set_soft_rs_1; + } + err_code = _common_set_uint8_attr(self, + address, + page, + offset, + update_val, + attr_p, + caller, + show_err); + if (err_code < 0) { + retval = err_code; + err_msg = "Write data via i2c fail!"; + goto err_private_sfp_set_soft_rs_1; + } + (*attr_p) = update_val; + return 0; + +err_private_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +static int +_sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + + /* Check input value */ + if ((input_val != 0) && (input_val != 1)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + switch (err_code) { + case 0: + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "Not support this feature"; + break; + case ERR_TRANSVR_UNINIT: + retval = ERR_TRANSVR_UNINIT; + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + retval = ERR_TRANSVR_UNPLUGGED; + err_msg = "Transceiver unplugged!"; + break; + default: + retval = err_code; + err_msg = "Check Rate_ID fail!"; + break; + } + goto err_common_sfp_set_soft_rs_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + attr_update_func, + caller); + if ( (err_code < 0) || + ((*attr_p) == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Generate and update value */ + return __sfp_set_soft_rs(self, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + +err_common_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +sfp_set_soft_rs0(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(0)"] address + * A2h, offset: 110, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + bit_shift, + &_sfp_update_attr_soft_rs0, + &(self->soft_rs0), + "sfp_set_soft_rs0", + show_err); +} + + +int +sfp_set_soft_rs1(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(1)"] address + * A2h, offset: 118, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + bit_shift, + &_sfp_update_attr_soft_rs1, + &(self->soft_rs1), + "sfp_set_soft_rs1", + show_err); +} + + +int +__sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_tx_eq; + } + setv = (uint8_t)input; + if (self->tx_eq[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + setv, + &(self->tx_eq[0]), + "_sfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_tx_eq; + } + return 0; + +err_sfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; itx_eq[0]; + if (_sfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if (self->tx_eq[0] == tmp){ + return 0; + } + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +sfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_tx_eq(self, input, 1); +} + + +int +__sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_rx_em; + } + setv = (uint8_t)input; + if (self->rx_em[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + setv, + &(self->rx_em[0]), + "_sfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_rx_em; + } + return 0; + +err_sfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; irx_em[0]; + if (_sfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if (self->rx_em[0] == tmp){ + return 0; + } + } + return -1; +} + + +int +sfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_rx_em(self, input, 1); +} + + +int +sfp_set_1g_rj45_extphy_offset(struct transvr_obj_s *self, + int input) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xff)) { + return ERR_TRANSVR_BADINPUT; + } + self->extphy_offset = (uint8_t)input; + return 0; +} + + +int +sfp_set_1g_rj45_extphy_reg(struct transvr_obj_s *self, + int input) { + + int i = 0; + int retry = 3; + int delay = 200; + uint16_t tmp = 0; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xffff)) { + return ERR_TRANSVR_BADINPUT; + } + tmp = ((input & 0x00ff) << 8) | ((input & 0xff00) >> 8); + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; i<=retry; i++) { + if (i2c_smbus_write_word_data(self->i2c_client_p, + self->extphy_offset, + tmp) >= 0) { + return 0; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; +} + + +static int +__qsfp_set_cdr(struct transvr_obj_s *self, + int input_val, + int show_err) { + + uint8_t update_val; + int CDR_FEATURE_SUPPORTED = 0x3; + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_name = "__qsfp_set_cdr"; + + /* Check input value */ + if ((input_val < 0) || (input_val > 0xff)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_qsfp_set_cdr_1; + } + update_val = (uint8_t)input_val; + /* Check CDR supported by transceiver */ + err_code = qsfp_get_cdr_present(self); + if (err_code < 0) { + retval = err_code; + switch (err_code) { + case ERR_TRANSVR_UNINIT: + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + err_msg = "Transceiver unplugged!"; + break; + default: + err_msg = "Check CDR present fail!"; + break; + } + goto err_qsfp_set_cdr_1; + } + if (err_code != CDR_FEATURE_SUPPORTED) { + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "This transceiver not support CDR!"; + goto err_qsfp_set_cdr_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + func_name); + if ( (err_code < 0) || + (self->cdr == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_qsfp_set_cdr_1; + } + /* Write input value to transceiver */ + return _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + update_val, + &(self->cdr), + func_name, + show_err); + +err_qsfp_set_cdr_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +qsfp_set_cdr(struct transvr_obj_s *self, + int input_val) { + return __qsfp_set_cdr(self, input_val, 1); +} + + +int +qsfp_set_soft_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int show_err = 1; + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + int update_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_soft_tx_disable"); + if (retval < 0) { + snprintf(err_msg, 63, "Not ready. err:%d", retval); + goto err_qsfp_set_soft_tx_disable; + } + if ((input_val > in_max) || + (input_val < in_min) ){ + retval = ERR_TRANSVR_BADINPUT; + snprintf(err_msg, 63, "Input value:%d incorrect!", input_val); + goto err_qsfp_set_soft_tx_disable; + } + if ((self->tx_disable & 0x0f) == input_val) { + return 0; + } + update_val = ((self->tx_disable & 0xf0) & input_val); + retval = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + input_val, + &(self->tx_disable), + "qsfp_set_tx_disable", + show_err); + if (retval < 0) { + snprintf(err_msg, 63, "_common_set_uint8_attr:%d fail!", retval); + goto err_qsfp_set_soft_tx_disable; + } + return 0; + +err_qsfp_set_soft_tx_disable: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return retval; +} + + +int +_qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + uint8_t update) { + + uint8_t tx_enable = 0x0; + int show_e = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Handle timing issues */ + if (update != tx_enable) { + /* Note: + * Because there are some txvr has timing issues, + * therefore we need to execute reset cycle first. + * (enable -> other settings) + */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + tx_enable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set reset value fail"; + goto err_qsfp_set_auto_tx_disable; + } + mdelay(10); + } + /* Setup target value */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->auto_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set target value fail"; + goto err_qsfp_set_auto_tx_disable; + } + /* Check and update */ + err = _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C get value fail"; + goto err_qsfp_set_auto_tx_disable; + } + if (self->tx_disable != update) { + emsg = "data not become effective"; + goto err_qsfp_set_auto_tx_disable; + } + return 0; + +err_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s\n", + __func__, emsg, self->swp_name); + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Update settings*/ + if (input_val == VAL_TRANSVR_FUNCTION_DISABLE) { + emsg = "User disable auto tx_disable"; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + goto out_qsfp_set_auto_tx_disable; + } + if ((input_val > in_max) || (input_val < in_min) ){ + SWPS_INFO("%s: Input value:%d incorrect! :%s\n", + __func__, input_val, self->swp_name); + return ERR_TRANSVR_BADINPUT; + } + self->auto_tx_disable = input_val; + /* Check current soft tx_disable */ + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_auto_tx_disable"); + switch (retval) { + case 0: + break; + case ERR_TRANSVR_UNPLUGGED: + emsg = "Doesn't need to update"; + goto out_qsfp_set_auto_tx_disable; + default: + SWPS_INFO("%s: setup fail :%d :%s\n", + __func__, retval, self->swp_name); + return retval; + } + return _qsfp_set_auto_tx_disable(self, input_val); + +out_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s :%d\n :%d", + __func__, emsg, self->swp_name, input_val, retval); + return 0; +} + + +int +__qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_tx_eq; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->tx_eq[0] == setv[0]) && + (self->tx_eq[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + setv, + self->tx_eq, + "_qsfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_tx_eq; + } + return 0; + +err_qsfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; itx_eq[0]; + tmp[1] = self->tx_eq[1]; + if (_qsfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if ((self->tx_eq[0] == tmp[0]) && + (self->tx_eq[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_tx_eq(self, input, 1); +} + + +int +__qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_am; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_am[0] == setv[0]) && + (self->rx_am[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + setv, + self->rx_am, + "_qsfp_set_rx_am", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_am; + } + return 0; + +err_qsfp_set_rx_am: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_am[0]; + tmp[1] = self->rx_am[1]; + if (_qsfp_update_attr_rx_am(self, show_e) < 0){ + continue; + } + if ((self->rx_am[0] == tmp[0]) && + (self->rx_am[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_am(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_set_rx_am"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_am(self, input, 1); +} + + +int +__qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_em; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_em[0] == setv[0]) && + (self->rx_em[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + setv, + self->rx_em, + "_qsfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_em; + } + return 0; + +err_qsfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_em[0]; + tmp[1] = self->rx_em[1]; + if (_qsfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if ((self->rx_em[0] == tmp[0]) && + (self->rx_em[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_em(self, input, 1); +} + + +int +common_transvr_dump(struct transvr_obj_s* self){ + + char *type_name = "Undefined"; + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + switch (self->type) { + case TRANSVR_TYPE_SFP: + type_name = STR_TRANSVR_SFP; + break; + case TRANSVR_TYPE_QSFP: + type_name = STR_TRANSVR_QSFP; + break; + case TRANSVR_TYPE_QSFP_PLUS: + type_name = STR_TRANSVR_QSFP_PLUS; + break; + case TRANSVR_TYPE_QSFP_28: + type_name = STR_TRANSVR_QSFP28; + break; + case TRANSVR_TYPE_FAKE: + type_name = "FAKE"; + goto ok_common_transvr_dump; + case TRANSVR_TYPE_UNPLUGGED: + type_name = "UNPLUGGED"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_INCONSISTENT: + type_name = "INCONSISTENT"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_ERROR: + type_name = "ERROR"; + goto err_common_transvr_dump; + + default: + type_name = "UNEXPECTED"; + goto err_common_transvr_dump; + } + printk(KERN_INFO "[SWPS] Dump %s information:\n", self->swp_name); + printk(KERN_INFO " |- :%s\n", type_name); + printk(KERN_INFO " |- :%s\n", self->vendor_name); + printk(KERN_INFO " |- :%s\n", self->vendor_pn); + printk(KERN_INFO " |- :%s\n", self->vendor_rev); + printk(KERN_INFO " |- :%s\n", self->vendor_sn); + printk(KERN_INFO " |- :0x%02x\n", self->br); + printk(KERN_INFO " |- :0x%02x\n", self->comp_rev); + printk(KERN_INFO " |- :%d\n", self->len_om1); + printk(KERN_INFO " |- :%d\n", self->len_om2); + printk(KERN_INFO " |- :%d\n", self->len_om3); + printk(KERN_INFO " |- :%d\n", self->len_om4); + return 0; + +ok_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return 0; + +err_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return -1; +} + + +int +sfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_sm); + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :0x%02x\n", self->rate_id); + return 0; +} + + +int +qsfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :Class_%d\n", __qsfp_get_power_cls(self, 0)); + return 0; +} + + +int +fake_transvr_dump(struct transvr_obj_s* self) { + + printk(KERN_INFO "[SWPS] Dump transceiver information: %s\n", self->swp_name); + printk(KERN_INFO " |- :FAKE\n"); + printk(KERN_INFO " |- :FAKE_VENDER_NAME\n"); + printk(KERN_INFO " |- :FAKE_VENDER_PN\n"); + printk(KERN_INFO " |- :FAKE_VENDER_REV\n"); + printk(KERN_INFO " |- :FAKE_VENDER_SN\n"); + printk(KERN_INFO " |- :0x99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " '- :0x99\n"); + return 0; +} + + +/* ========== Object functions for fake type ========== + */ +int +fake_transvr_update(struct transvr_obj_s *self, + int show_err){ + self->state = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +fake_get_binary(struct transvr_obj_s *self){ + return 1; +} + +int +fake_get_int(struct transvr_obj_s *self){ + return 99; +} + + +int +fake_get_hex(struct transvr_obj_s *self){ + return 0x0f; +} + + +int +fake_get_str(struct transvr_obj_s *self, char *buf) { + return snprintf(buf, 16, "fake_get_str\n"); +} + + +int +fake_set_int(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: %d\n", __func__, input); + return 0; +} + + +int +fake_set_hex(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: 0x%02x\n", __func__, input); + return 0; +} + + +/* ========== Object functions for unsupported ========== + */ +int +unsupported_get_func(struct transvr_obj_s *self){ + return ERR_TRANSVR_NOTSUPPORT; +} + + +int +unsupported_get_func2(struct transvr_obj_s *self, + char *buf_p) { + int len = snprintf(buf_p, 8, "%d\n", ERR_TRANSVR_NOTSUPPORT); + return len; +} + + +int +unsupported_set_func(struct transvr_obj_s *self, + int input_val){ + return ERR_TRANSVR_NOTSUPPORT; +} + + + +/* ========== Object functions for long term task ========== + * + * [Note] + * SWPS transceiver worker is likely the green-thread (coroutine). + * Due to resource and performance considerations. SWPS run all + * features in one kthread at the same time, and handle by it self. + */ + +/* For Transceiver Task Handling + */ +static struct transvr_worker_s * +transvr_task_get(struct transvr_obj_s *self, + char *func_name) { + + struct transvr_worker_s *curr_p = self->worker_p; + + while(curr_p != NULL){ + if (strcmp((curr_p->func_name), func_name) == 0 ) { + return curr_p; + } + curr_p = curr_p->next_p; + } + return NULL; +} + + +static struct transvr_worker_s* +transvr_task_creat(struct transvr_obj_s *self, + int (*main_task)(struct transvr_worker_s *task), + int (*post_task)(struct transvr_worker_s *task), + char *caller) { + + struct transvr_worker_s *task_p = NULL; + struct transvr_worker_s *curr_p = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check task not exist */ + task_p = transvr_task_get(self, caller); + if (task_p) { + snprintf(err_msg, sizeof(err_msg), "Task already created!"); + goto err_transvr_task_creat; + } + /* Create task worker */ + task_p = kzalloc(sizeof(struct transvr_worker_s), GFP_KERNEL); + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_transvr_task_creat; + } + /* Setup task data */ + task_p->transvr_p = self; + task_p->next_p = NULL; + task_p->trigger_time = 0; + task_p->retry = 1; + task_p->state = STATE_T_TASK_INIT; + task_p->main_task = main_task; + task_p->post_task = post_task; + task_p->p_data = NULL; + snprintf(task_p->func_name, sizeof(task_p->func_name), "%s", caller); + /* Setup Link List */ + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p->next_p != NULL) { + curr_p = curr_p->next_p; + } + curr_p->next_p = task_p; + task_p->pre_p = curr_p; + } else { + self->worker_p = task_p; + task_p->pre_p = NULL; + } + return task_p; + +err_transvr_task_creat: + SWPS_ERR("%s: %s :%s :%s\n", + __func__, err_msg, caller, self->swp_name); + return NULL; +} + + +static void +transvr_task_free_one(struct transvr_worker_s *task_p){ + + struct transvr_worker_s *pre_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (task_p) { + pre_p = task_p->pre_p; + next_p = task_p->next_p; + + if ((pre_p) && (next_p)) { + pre_p->next_p = next_p; + next_p->pre_p = pre_p; + + } else if ((!pre_p) && (next_p)) { + next_p->pre_p = NULL; + + } else if ((pre_p) && (!next_p)) { + pre_p->next_p = NULL; + + } else if ((!pre_p) && (!next_p)) { + task_p->transvr_p->worker_p = NULL; + } else { + SWPS_ERR("%s: Unexcept case!\n :%s", + __func__, task_p->transvr_p->swp_name); + } + kfree(task_p->p_data); + kfree(task_p); + } +} + + +static void +transvr_task_free_all(struct transvr_obj_s *self) { + + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p) { + next_p = curr_p->next_p; + transvr_task_free_one(curr_p); + curr_p = next_p; + } + self->worker_p = NULL; + } +} + + +static void +transvr_cache_free_all(struct transvr_obj_s *self) { + + memset(self->vendor_name, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_rev, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_pn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_sn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + self->extphy_offset = 0; +} + +static int +_transvr_task_run_main(struct transvr_worker_s *task_p) { + + int retval = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "main_task is NULL!"); + goto main_transvr_task_err; + } + if ((task_p->trigger_time) == 0){ + goto main_transvr_task_run; + } + if (time_before(jiffies, task_p->trigger_time)){ + goto main_transvr_task_wait; + } + goto main_transvr_task_run; + +main_transvr_task_run: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + task_p->retry -= 1; + } + retval = task_p->main_task(task_p); + if (retval < 0) { + if (task_p->retry > 0) { + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + } + goto main_transvr_task_identify; + +main_transvr_task_identify: + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + + case EVENT_TRANSVR_TASK_DONE: + task_p->state = STATE_T_TASK_DONE; + return EVENT_TRANSVR_TASK_DONE; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + +main_transvr_task_wait: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + +main_transvr_task_err: + if(task_p) { + task_p->state = STATE_T_TASK_FAIL; + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, retval, task_p->transvr_p->swp_name); + } else { + SWPS_INFO("%s: %s :%d\n", + __func__, err_msg, retval); + } + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_transvr_task_run_post(struct transvr_worker_s *task_p) { + + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if ((task_p->post_task) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + switch (task_p->state) { + case STATE_T_TASK_WAIT: + case STATE_T_TASK_INIT: + goto post_transvr_task_wait; + + case STATE_T_TASK_DONE: + case STATE_T_TASK_FAIL: + goto post_transvr_task_run; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Unexcept task state"); + goto post_transvr_task_err; + +post_transvr_task_run: + task_p->post_task(task_p); + return EVENT_TRANSVR_TASK_DONE; + +post_transvr_task_wait: + return EVENT_TRANSVR_TASK_WAIT; + +post_transvr_task_err: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, task_p->state, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_one(struct transvr_worker_s *task_p) { + + int retval_main = DEBUG_TRANSVR_INT_VAL; + int retval_post = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval_main = _transvr_task_run_main(task_p); + if (retval_main < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute main_task fail!"); + goto err_transvr_task_run_one; + } + retval_post = _transvr_task_run_post(task_p); + if (retval_post < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute post_task fail!"); + goto err_transvr_task_run_one; + } + return retval_main; + +err_transvr_task_run_one: + SWPS_INFO("%s: %s
:%d :%d :%s :%s\n", + __func__, err_msg, retval_main, retval_post, + task_p->func_name, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_all(struct transvr_obj_s *self) { + + int haserr = 0; + int retval = DEBUG_TRANSVR_INT_VAL; + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if ((self->worker_p) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + curr_p = self->worker_p; + while (curr_p != NULL) { + next_p = curr_p->next_p; + retval = transvr_task_run_one(curr_p); + if (curr_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + curr_p = next_p; + continue; + } + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + break; + case EVENT_TRANSVR_TASK_DONE: + transvr_task_free_one(curr_p); + break; + case EVENT_TRANSVR_TASK_FAIL: + + default: + haserr = 1; + transvr_task_free_one(curr_p); + break; + } + curr_p = next_p; + } + if (haserr) { + return EVENT_TRANSVR_TASK_FAIL; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +static void +transvr_task_set_delay(struct transvr_worker_s *task_p, + unsigned long delay_msec) { + + task_p->trigger_time = (jiffies + (delay_msec * (HZ/1000))); +} + + +static void +transvr_task_set_retry(struct transvr_worker_s *task_p, + unsigned long retry_times) { + + task_p->retry = retry_times; +} + + +/* For Transceiver Post Task + */ +int +taskfunc_post_do_nothing(struct transvr_worker_s *task_p) { + + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_post_handle_task_state(struct transvr_worker_s *task_p) { + + struct transvr_obj_s* tp = task_p->transvr_p; + + switch (task_p->state) { + case STATE_T_TASK_INIT: + case STATE_T_TASK_WAIT: + return EVENT_TRANSVR_TASK_WAIT; + + case STATE_T_TASK_DONE: + tp->state = STATE_TRANSVR_CONNECTED; + tp->send_uevent(tp, KOBJ_ADD); + return EVENT_TRANSVR_TASK_DONE; + + case STATE_T_TASK_FAIL: + tp->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_TASK_FAIL; + + default: + break; + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +/* For Transceiver Main Task + */ +int +_taskfunc_sfp_setup_soft_rs(struct transvr_worker_s *task_p, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller) { + + int show_err = 0; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_soft_rs"; + + err_code = _sfp_update_attr_soft_rs0(task_p->transvr_p, 0); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + err_code = __sfp_set_soft_rs(task_p->transvr_p, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_setup_soft_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_code); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +__taskfunc_sfp_setup_hard_rs(struct transvr_worker_s *task_p, + int input_val, + int (*get_func)(struct ioexp_obj_s *self, int virt_offset), + int (*set_func)(struct ioexp_obj_s *self, int virt_offset, int input_val)) { + + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + + err_val = get_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset); + + if (err_val < 0) { + if (err_val == ERR_IOEXP_NOTSUPPORT) { + return EVENT_TRANSVR_TASK_DONE; + } + err_str = "Get current hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + if (err_val == input_val) { + return EVENT_TRANSVR_TASK_DONE; + } + err_val = set_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_p_taskfunc_sfp_setup_hard_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_hard_rs0(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs0, + task_p->transvr_p->ioexp_obj_p->set_hard_rs0); +} + + +int +_taskfunc_sfp_setup_hard_rs1(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs1, + task_p->transvr_p->ioexp_obj_p->set_hard_rs1); +} + + +int +_taskfunc_sfp_setup_rs0(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs0"; + + err_val = _taskfunc_sfp_setup_hard_rs0(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs0, + task_p->transvr_p->eeprom_map_p->page_soft_rs0, + task_p->transvr_p->eeprom_map_p->offset_soft_rs0, + bit_shift, + &(task_p->transvr_p->soft_rs0), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs0_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs0(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_rs1(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs1"; + + err_val = _taskfunc_sfp_setup_hard_rs1(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs1, + task_p->transvr_p->eeprom_map_p->page_soft_rs1, + task_p->transvr_p->eeprom_map_p->offset_soft_rs1, + bit_shift, + &(task_p->transvr_p->soft_rs1), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs1_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs1(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_sfp_setup_SFF8431_case1(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs0(task_p, update_val); +} + + + +int +taskfunc_sfp_setup_SFF8431_case2(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs1(task_p, update_val); +} + + +int +taskfunc_sfp_setup_SFF8431_case3(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + int update_rs0 = 1; + int update_rs1 = 1; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _taskfunc_sfp_setup_rs0(task_p, update_rs0); + if (err_code < 0) { + return err_code; + } + return _taskfunc_sfp_setup_rs1(task_p, update_rs1); +} + + +int +taskfunc_sfp_handle_1g_rj45(struct transvr_worker_s *task_p) { + + /* Not all of platform support 0x56 for transceiver + * external PHY, Support list as below: + * => 1. Magnolia-PVT (PS: EVT & DVT not ready) + */ + int ext_phy_addr = 0x56; + int ext_phy_page = -1; + int ext_phy_offs = 0x11; + int ext_phy_len = 1; + int lstate_mask = 0x04; /* 00000100 */ + int show_err = 0; + int fail_retry = 5; + int fail_delay = 1000; /* msec */ + int err_code = DEBUG_TRANSVR_INT_VAL; + uint8_t detect_val = DEBUG_TRANSVR_HEX_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + int *tmp_p = NULL; + char *func_name = "taskfunc_sfp_handle_1g_rj45"; + + if (task_p->transvr_p->state != STATE_TRANSVR_CONNECTED) { + return EVENT_TRANSVR_TASK_DONE; + } + if ( (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000) && + (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000_up) ) { + goto err_taskfunc_sfp_handle_1g_rj45_1; + } + err_code = _common_update_uint8_attr(task_p->transvr_p, + ext_phy_addr, + ext_phy_page, + ext_phy_offs, + ext_phy_len, + &detect_val, + func_name, + show_err); + if ( (err_code < 0) || + (detect_val == DEBUG_TRANSVR_HEX_VAL) ) { + snprintf(err_str, sizeof(err_str), "Detect external link status fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + if ((detect_val & lstate_mask) == lstate_mask) { + goto ok_taskfunc_sfp_handle_1g_rj45_link_up; + } + goto ok_taskfunc_sfp_handle_1g_rj45_link_down; + +ok_taskfunc_sfp_handle_1g_rj45_link_up: + /* Filter out noise */ + if (!(task_p->p_data)) { + tmp_p = kzalloc(sizeof(int), GFP_KERNEL); + if (!tmp_p) { + snprintf(err_str, sizeof(err_str), "kzalloc p_data fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + *tmp_p = TRANSVR_CLASS_BASE_T_1000_up; + task_p->p_data = tmp_p; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + } + if ((*(int *)(task_p->p_data)) != TRANSVR_CLASS_BASE_T_1000_up) { + kfree(task_p->p_data); + task_p->p_data = NULL; + snprintf(err_str, sizeof(err_str), "Internal error"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + kfree(task_p->p_data); + task_p->p_data = NULL; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_link_down: + if (task_p->p_data) { + kfree(task_p->p_data); + task_p->p_data = NULL; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_done: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_1: + snprintf(err_str, sizeof(err_str), "Detect transceiver:%d not Base-T, remove task.", + task_p->transvr_p->info); + SWPS_INFO("%s: %s :%s\n", __func__, err_str, task_p->transvr_p->swp_name); + transvr_task_set_retry(task_p, 0); + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_2: + if (task_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, fail_retry); + } + if ((task_p->retry) == 0) { + /* Error case: + * => In this case, SWPS will stop external Link state monitor features + * and keeps transvr_p->info on TRANSVR_CLASS_BASE_T_1000_up. + * Upper layer will see it always Linkup that because of these type of + * transceiver has external phy, BCM chip see it as Loopback transceiver. + */ + SWPS_WARN("%s can not access external PHY of Base-T SFP transceiver\n", + task_p->transvr_p->swp_name); + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + return EVENT_TRANSVR_TASK_DONE; + } else { + transvr_task_set_delay(task_p, fail_delay); + } + return EVENT_TRANSVR_TASK_FAIL; +} +static int qsfp_data_ready_check(struct transvr_obj_s *self) +{ + + /* [Return] + * EVENT_TRANSVR_TASK_DONE : Ready + * EVENT_TRANSVR_TASK_WAIT : Not ready + * EVENT_TRANSVR_INIT_FAIL : Error + */ + int addr = VAL_TRANSVR_8436_READY_ADDR; + int page = VAL_TRANSVR_8436_READY_PAGE; + int offs = VAL_TRANSVR_8436_READY_OFFSET; + int bit = VAL_TRANSVR_8436_READY_BIT; + int ready = VAL_TRANSVR_8436_READY_VALUE; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Select target page */ + err = _common_setup_page(self, addr, page, offs, 1, 0); + if (err < 0) { + emsg = "setup page fail"; + goto err_data_check; + } + /* Get Status Indicators */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, offs); + if (err < 0) { + emsg = "detect current value fail"; + goto err_data_check; + } + if ((err & (1<swp_name, __func__, emsg, err); + return EVENT_TRANSVR_INIT_FAIL; +} + +int +_taskfunc_qsfp_setup_power_mod(struct transvr_obj_s *self, + int setup_val) { + + int curr_val = DEBUG_TRANSVR_INT_VAL; + int err_val = DEBUG_TRANSVR_INT_VAL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + int i = 0; + int check_num = QSFP_DATA_READY_CHECK_NUM; + if (io_no_init) { + + SWPS_INFO("%s no_io_init\n",__func__); + return EVENT_TRANSVR_TASK_DONE; + } + + curr_val = self->ioexp_obj_p->get_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset); + if (curr_val < 0){ + err_msg = "Get current value fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + if (curr_val == setup_val){ + return EVENT_TRANSVR_TASK_DONE; + } + err_val = self->ioexp_obj_p->set_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset, + setup_val); + if (err_val < 0){ + err_msg = "Setup power mode fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + /*check if data is ready in high power mode*/ + if (0 == setup_val) { + + for (i = 0 ; i < check_num; i++) { + + if ((err_val = qsfp_data_ready_check(self)) == EVENT_TRANSVR_TASK_DONE) { + break; + } + msleep(QSFP_DATA_READY_CHECK_DELAY_MS); + } + if (i >= check_num) { + err_msg = "qsfp_ready_check fail"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } else if (i != 0) { + SWPS_INFO("%s qsfp_data gets ready in %dms\n", self->swp_name, i*QSFP_DATA_READY_CHECK_DELAY_MS); + } + } + + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_qsfp_setup_power_mod_1: + SWPS_INFO("%s %s: %s :%d :%d :%d\n", + __func__, self->swp_name, err_msg, err_val, curr_val, setup_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_qsfp_handle_tx_disable(struct transvr_worker_s *task_p) { + + int i = 0; + int retry = 5; + int delay_ms = 100; + + if (task_p->transvr_p->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return EVENT_TRANSVR_TASK_DONE; + } + if (!_qsfp_is_implement_tx_disable(task_p->transvr_p)) { + return EVENT_TRANSVR_TASK_DONE; + } + for (i=0; itransvr_p, + task_p->transvr_p->auto_tx_disable) + == EVENT_TRANSVR_TASK_DONE) { + goto ok_taskfunc_qsfp_handle_tx_disable; + } + mdelay(delay_ms); + } + SWPS_INFO("%s auto setup tx_disable:0x%02x fail.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_INIT_FAIL; + +ok_taskfunc_qsfp_handle_tx_disable: + SWPS_INFO("%s auto setup tx_disable:0x%02x ok.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_qsfp_set_hpmod(struct transvr_worker_s *task_p) { + + int err = DEBUG_TRANSVR_INT_VAL; + int HIGH_POWER_MODE = 0; + + /* Handle power mode */ + err = _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + HIGH_POWER_MODE); + if (err < 0) { + SWPS_INFO("%s: setup hpmod fail :%d :%s\n", + __func__, err, task_p->transvr_p->swp_name); + return err; + } + /* Handle auto tx_disable + * [Note] + * => Because there are some transceiver have timing issues or + * setup sequence issues, therefore we handle auto tx_disable + * after handle power mode. + */ + mdelay(100); + return taskfunc_qsfp_handle_tx_disable(task_p); +} + + +int +taskfunc_qsfp_set_lpmod(struct transvr_worker_s *task_p) { + + int LOW_POWER_MODE = 1; + return _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + LOW_POWER_MODE); +} + + +static int +initfunc_sfp_handle_multi_rate_mode(struct transvr_obj_s *self) { + + int task_retry = 3; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "sfp_handle_multi_rate_mode"; + struct transvr_worker_s *task_p = NULL; + + switch (self->rate_id) { + case 0x00: /* Unspecified */ + case 0x03: /* Unspecified */ + case 0x05: /* Unspecified */ + case 0x07: /* Unspecified */ + case 0x09: /* Unspecified */ + case 0x0B: /* Unspecified */ + case 0x0D: /* Unspecified */ + case 0x0F: /* Unspecified */ + goto sfp_handle_multi_rate_mode_4_unspecified; + + case 0x02: /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case1, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x04: /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case2, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x06: /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case3, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x01: /* SFF-8079 (4/2/1G Rate_Select & AS0/AS1) */ + err_str = "SFF-8079 (4/2/1G Rate_Select & AS0/AS1)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x08: /* FC-PI-5 (16/8/4G Rx Rate_select only) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Rx Rate_select only)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0A: /* FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0C: /* FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + */ + err_str = "FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0E: /* 10/8G Rx and Tx Rate_Select controlling the operation or + * locking modes of the internal signal conditioner, retimer + * or CDR, according to the logic table defined in Table 10-2, + * High Bit Rate (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = + * 8.5 Gb/s. In this mode, the default value of bit 110.3 (Soft + * Rate Select RS(0), Table 9-11) and of bit 118.3 (Soft Rate + * Select RS(1), Table 10-1) is 1. + */ + err_str = "cable type: 0x0E"; + goto sfp_handle_multi_rate_mode_4_not_support; + + default: + err_str = "cable type: UNKNOW"; + goto sfp_handle_multi_rate_mode_4_not_support; + } + +sfp_handle_multi_rate_mode_4_sff8431: + if (!task_p) { + err_str = "Create task fail!"; + goto sfp_handle_multi_rate_mode_4_fail_1; + } + transvr_task_set_retry(task_p, task_retry); + return EVENT_TRANSVR_TASK_WAIT; + +sfp_handle_multi_rate_mode_4_unspecified: + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_not_support: + SWPS_INFO("%s: Does not support %s :%s :0x%02x\n", + func_str, err_str, self->swp_name, self->rate_id); + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_fail_1: + SWPS_INFO("%s: %s :%s :0x%02x, :%d\n", + func_str, err_str, self->swp_name, self->rate_id, err_code); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +initfunc_sfp_handle_1g_rj45(struct transvr_obj_s *self) { + + struct transvr_worker_s *task_p = NULL; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_sfp_handle_1g_rj45"; + + + if (self->info == TRANSVR_CLASS_BASE_T_1000) { + task_p = transvr_task_creat(self, + taskfunc_sfp_handle_1g_rj45, + taskfunc_post_do_nothing, + func_str); + if (!task_p) { + snprintf(err_str, sizeof(err_str), "Create task fail"); + goto err_initfunc_sfp_handle_1g_rj45; + } + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_initfunc_sfp_handle_1g_rj45: + SWPS_INFO("%s: %s :%s :%d\n", + __func__, err_str, self->swp_name, detect_cls); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +initfunc_qsfp_handle_power_mode(struct transvr_obj_s *self) { + + int err_code = EVENT_TRANSVR_EXCEP_INIT; + int power_class = DEBUG_TRANSVR_INT_VAL; + int hpmod_retry = 3; + int lpower_config = 1; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + unsigned long hpmod_delay = 500; /* msec */ + struct transvr_worker_s *task_p = NULL; + + /* Handle power mode for IOEXP */ + power_class = __qsfp_get_power_cls(self, 0); + switch (power_class) { + case 1: /* Case: Low power mode (Class = 1) */ + err_code = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (err_code < 0){ + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + return EVENT_TRANSVR_TASK_DONE; + + case 2: /* Case: High power mode (Class > 1) */ + case 3: + case 4: + case 5: + case 6: + case 7: + task_p = transvr_task_creat(self, + taskfunc_qsfp_set_hpmod, + taskfunc_post_handle_task_state, + "transvr_init_qsfp"); + if (!task_p) { + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + transvr_task_set_retry(task_p, hpmod_retry); + transvr_task_set_delay(task_p, hpmod_delay); + return EVENT_TRANSVR_TASK_WAIT; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Exception case"); + goto err_initfunc_qsfp_handle_power_mode; + +err_initfunc_qsfp_handle_power_mode: + SWPS_INFO("%s: %s :%s \n", __func__, err_msg, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +initfunc_qsfp28_handle_cdr(struct transvr_obj_s *self) { + + uint8_t DEFAULT_VAL_CDR = 0xff; + int CDR_FUNC_EXISTED = 0x3; + int show_err = 1; + int err_val = EVENT_TRANSVR_TASK_FAIL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_qsfp28_handle_cdr"; + + err_val = __qsfp_get_cdr_present(self, 0); + if ( (err_val < 0) || + (err_val == DEBUG_TRANSVR_HEX_VAL) ) { + err_msg = "detect cdr_present fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + if (err_val == CDR_FUNC_EXISTED) { + err_val = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->offset_cdr, + DEFAULT_VAL_CDR, + &(self->cdr), + func_str, + show_err); + if (err_val < 0) { + err_msg = "set CDR fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_qsfp_handle_cdr_1: + SWPS_INFO("%s: %s :%d :%s\n", + func_str, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + +/* ========== Object functions for Final State Machine ========== + */ +int +is_plugged(struct transvr_obj_s *self){ + + int limit = 63; + int present = DEBUG_TRANSVR_INT_VAL; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + struct ioexp_obj_s *ioexp_p = self->ioexp_obj_p; + + if (!ioexp_p) { + snprintf(emsg, limit, "ioexp_p is null!"); + goto err_is_plugged_1; + } + present = ioexp_p->get_present(ioexp_p, self->ioexp_virt_offset); + switch (present){ + case 0: + return 1; + case 1: + return 0; + case ERR_IOEXP_UNINIT: + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + default: + if (ioexp_p->state == STATE_IOEXP_INIT){ + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + } + break; + } + SWPS_INFO("%s: Exception case! :%d :%d\n", + __func__, present, ioexp_p->state); + return 0; + +err_is_plugged_1: + SWPS_DEBUG("%s: %s\n", __func__, emsg); + return 0; +} + + +static int +detect_transvr_type(struct transvr_obj_s* self){ + + int type = TRANSVR_TYPE_ERROR; + + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + type = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + + /* Case: 1. Wait transceiver I2C module. + * 2. Transceiver I2C module failure. + * Note: 1. SFF allow maximum transceiver initial time is 2 second. So, there + * are exist some case that we need to wait transceiver. + * For these case, we keeps status on "TRANSVR_TYPE_UNPLUGGED", than + * state machine will keep trace with it. + * 2. There exist some I2C failure case we need to handle. Such as user + * insert the failure transceiver, or any reason cause it abnormal. + */ + if (type < 0){ + switch (type) { + case -EIO: + SWPS_DEBUG("%s: %s smbus return:-5 (I/O error)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + case -ENXIO: + SWPS_DEBUG("%s: %s smbus return:-6 (No such device or address)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + default: + break; + } + SWPS_INFO("%s: %s unexpected smbus return:%d \n", + __func__, self->swp_name, type); + return TRANSVR_TYPE_ERROR; + } + /* Identify valid transceiver type */ + switch (type){ + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + break; + case TRANSVR_TYPE_UNKNOW_1: + case TRANSVR_TYPE_UNKNOW_2: + type = TRANSVR_TYPE_UNKNOW_2; + break; + default: + SWPS_DEBUG("%s: unknow type:0x%02x \n", __func__, type); + type = TRANSVR_TYPE_ERROR; + break; + } + return type; +} + +static int +detect_transvr_state(struct transvr_obj_s *self, + int result[2]){ + /* [return] [result-0] [result-1] + * 0 STATE_TRANSVR_CONNECTED TRANSVR_TYPE_FAKE + * 0 STATE_TRANSVR_DISCONNECTED TRANSVR_TYPE_UNPLUGGED + * 0 STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * 0 STATE_TRANSVR_INIT / + * 0 STATE_TRANSVR_SWAPPED + * 0 STATE_TRANSVR_CONNECTED + * ERR_TRNASVR_BE_ISOLATED STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_I2C_CRASH STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_UNEXCPT STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_UNKNOW_1/2 + */ + result[0] = STATE_TRANSVR_UNEXCEPTED; /* For return state */ + result[1] = TRANSVR_TYPE_ERROR; /* For return type */ + + /* Case1: Fake type */ + if (self->type == TRANSVR_TYPE_FAKE){ + result[0] = STATE_TRANSVR_CONNECTED; + result[1] = TRANSVR_TYPE_FAKE; + return 0; + } + /* Case2: Transceiver unplugged */ + #if 0 + if (!is_plugged(self)){ + result[0] = STATE_TRANSVR_DISCONNECTED; + result[1] = TRANSVR_TYPE_UNPLUGGED; + return 0; + } +#endif + + /* Case2: Transceiver unplugged */ + if (!sff_io_is_plugged(self->port_id)){ + result[0] = STATE_TRANSVR_DISCONNECTED; + result[1] = TRANSVR_TYPE_UNPLUGGED; + //SWPS_INFO("%s: %s plug out: port_id:%d\n", __func__, self->swp_name, self->port_id); + return 0; + } + /* Case3: Transceiver be isolated */ + if (self->state == STATE_TRANSVR_ISOLATED){ + result[0] = STATE_TRANSVR_ISOLATED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRNASVR_BE_ISOLATED; + } + + + if (STATE_TRANSVR_CONNECTED != self->state) { + /* Case4: Transceiver plugged */ + result[1] = detect_transvr_type(self); + // SWPS_INFO("detect_type dev_name:%s port_id:%d\n", self->swp_name, self->port_id); + /* Case4.1: I2C topology crash + * Note : There are some I2C issues cause by transceiver/cables. + * We need to check topology status when user insert it. + * But in this step, we can't not ensure this is the issues + * port. So, it return the ERR_TRANSVR_I2C_CRASH, then upper + * layer will diagnostic I2C topology. + */ + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: %s detect I2C crash :%d\n", + __func__, self->swp_name, self->state); + result[0] = STATE_TRANSVR_UNEXCEPTED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_I2C_CRASH; + } + } else { /*connected case*/ + result[0] = STATE_TRANSVR_CONNECTED; + return 0; + + } + /* Case4.2: System initial not ready, + * Note : Sometime i2c channel or transceiver EEPROM will delay that will + * cause system in inconsistent state between EEPROM and IOEXP. + * In this case, SWP transceiver object keep state at LINK_DOWN + * to wait system ready. + * By the way, State Machine will handle these case. + */ + if (result[1] == TRANSVR_TYPE_UNPLUGGED){ + result[0] = STATE_TRANSVR_DISCONNECTED; + return 0; + } + /* Case4.3: Error transceiver type */ + if (result[1] == TRANSVR_TYPE_ERROR){ + result[0] = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s detect error type\n", __func__, self->swp_name); + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard!"); + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case3.3: Unknow transceiver type */ + if ((result[1] == TRANSVR_TYPE_UNKNOW_1) || + (result[1] == TRANSVR_TYPE_UNKNOW_2) ){ + result[0] = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + /* Case3.4: During initial process */ + if (self->state == STATE_TRANSVR_INIT){ + result[0] = STATE_TRANSVR_INIT; + return 0; + } + /* Case3.5: Transceiver be swapped */ + if (self->type != result[1]){ + result[0] = STATE_TRANSVR_SWAPPED; + return 0; + } + /* Case3.6: Link up state */ + result[0] = STATE_TRANSVR_CONNECTED; + return 0; +} + +int +_sfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = _sfp_get_comp_extended(self); + + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_25G_AOC; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_25G_SR; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_25G_LR; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_25G_ER; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x0c: /* 25GBASE-CR CA-S */ + case 0x0d: /* 25GBASE-CR CA-N */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L1_25G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_10_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _sfp_get_comp_10g_eth_comp(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 10G Optical (x1) */ + if ((detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + } + if ((detect_val & 0x80) == 0x80) { /* 10000000 : 10GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_1g = 0x0b; + int upper_bound_1g = 0x1A; + int lower_bound_10g = 0x60; + int upper_bound_10g = 0x75; + int lower_bound_25g = 0xf0; + int upper_bound_25g = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 25G */ + if ((notmal_br >= lower_bound_25g) && + (notmal_br <= upper_bound_25g) ) { + return TRANSVR_CLASS_25G; + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + /* Check 1G */ + if ((notmal_br >= lower_bound_1g) && + (notmal_br <= upper_bound_1g) ) { + return TRANSVR_CLASS_1G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + int speed_br = DEBUG_TRANSVR_INT_VAL; + int speed_tmp = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + + speed_br = _sfp_detect_if_sp_by_br(self); + detect_val = _sfp_get_comp_1g_eth_comp(self); + + if (detect_val < 0) { + snprintf(err_str, sizeof(err_str), "Detect abnormal value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + } + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 1G (x1) */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 1000BASE-SX */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_SX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x02) == 0x02) { /* 00000010 : 1000BASE-LX *3 */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_LX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 1000BASE-CX */ + speed_tmp = TRANSVR_CLASS_COPPER_L1_1G; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + /* Case: 1000 Base-T (x1) */ + if ((detect_val & 0x08) == 0x08) { /* 00001000 : 1000BASE-T */ + return TRANSVR_CLASS_BASE_T_1000; + } + /* Case: 100 Base */ + if ( ((detect_val & 0x10) == 0x10) || /* 00010000 : 100BASE-LX/LX10 */ + ((detect_val & 0x20) == 0x20) || /* 00100000 : 100BASE-FX */ + ((detect_val & 0x40) == 0x40) || /* 01000000 : BASE-BX10 *3 */ + ((detect_val & 0x80) == 0x80) ){ /* 10000000 : BASE-PX *3 */ + return TRANSVR_CLASS_OPTICAL_100; + } + /* Case: ERROR */ + snprintf(err_str, sizeof(err_str), "Case:ERROR, value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + +ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g: + switch (speed_br) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_1G: + return speed_tmp; + case TRANSVR_CLASS_10G: + goto ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G; + } + +ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G: + switch (speed_tmp) { + case TRANSVR_CLASS_OPTICAL_1G_SX: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case TRANSVR_CLASS_OPTICAL_1G_LX: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case TRANSVR_CLASS_COPPER_L1_1G: + return TRANSVR_CLASS_COPPER_L1_10G; + default: + break; + } + snprintf(err_str, sizeof(err_str), "transfer_1to10 fail, speed:%d", speed_tmp); + goto err_p_sfp_detect_class_by_1g_ethernet; + +err_p_sfp_detect_class_by_1g_ethernet: + SWPS_INFO("%s: %s :%s", __func__, err_str, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int is_active = 0; + int conn_val = DEBUG_TRANSVR_INT_VAL; + int check_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _sfp_detect_if_sp_by_br(self); + conn_val = _sfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 */ + case 0x0d: /* MPO 2x16 */ + /* + * ToDo: Need verify Optical Pigtail + */ + goto ok_sfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + /* + * ToDo: Need check ACC use case + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x23: /* No separable connector */ + /* + * ToDo: Standard not clear, not all transceiver vendor + * have the same defined + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_check_active_passive: + check_val = _sfp_get_cable_tech(self); + switch(check_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_unknow; + case 0x04: /* Passive */ + goto ok_sfp_detect_class_by_feature_4_copper; + case 0x08: /* Active */ + is_active = 1; + goto ok_sfp_detect_class_by_feature_4_aoc; + default: + snprintf(err_msg, sizeof(err_msg), + "_sfp_get_cable_tech return Non define value:%d", + check_val); + break; + } + goto err_sfp_detect_class_by_feature_1; + +ok_sfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_25G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_25G_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_25G_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_25G_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_25G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + case TRANSVR_CLASS_1G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_1G_SX; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_1G_LX; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_1G_EX; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_1G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_sfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_OPTICAL_25G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_S_AOC; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_OPTICAL_1G_AOC; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_COPPER_L1_25G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L1_10G; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_COPPER_L1_1G; + default: + return TRANSVR_CLASS_COPPER; + } + +ok_sfp_detect_class_by_feature_4_unknow: + return TRANSVR_CLASS_UNSPECIFIED; + +err_sfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +sft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _sfp_detect_class_by_extend_comp(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 10G Compliance */ + detect_val = _sfp_detect_class_by_10_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 1G Compliance */ + detect_val = _sfp_detect_class_by_1g_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_BASE_T_1000: + case TRANSVR_CLASS_OPTICAL_100: + /* + * ToDo: Need Check 0.1G + */ + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_COPPER_L1_10G: + /* Transfer speed case + * => Example: Raycom 10G DAC + */ + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 1G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check by connector, br, wavelength */ + detect_val = _sfp_detect_class_by_feature(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_OPTICAL_1G: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_COPPER: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_COPPER_L1_10G: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined get_connector:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sft_detect_transceiver_class_1; + +err_sft_detect_transceiver_class_1: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_trident2_if_type_1; + +err_sfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SR); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_KR); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_tomahawk_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_tomahawk_if_type_1; + +err_sfp_set_tomahawk_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_sfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = sft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _sfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TRIDENT_3: + case BCM_CHIP_TYPE_TOMAHAWK: + return _sfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _sfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_sfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = sft_detect_transvr_class(self); + switch(detect_val) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_SP_100); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + detect_val); + goto err_sfp_detect_if_speed_1; + } + /* Check by BR */ + detect_val = _sfp_detect_if_sp_by_br(self); + switch (detect_val) { + case TRANSVR_CLASS_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + default: + break; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_detect_if_speed_1; + +err_sfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_extended(self); + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_100G_AOC; + + case 0x06: /* 100G CWDM4 */ + case 0x09: /* Obsolete (assigned before 100G CWDM4 MSA required FEC) */ + case 0x17: /* 100G CLR4 */ + case 0x1A: /* 100GE-DWDM2 */ + return TRANSVR_CLASS_OPTICAL_100G; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_100G_SR4; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_100G_LR4; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_100G_ER4; + + case 0x07: /* 100G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_100G_PSM4; + + case 0x12: /* 40G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_40G; + + case 0x11: /* 4 x 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + + case 0x10: /* 40GBASE-ER4 */ + return TRANSVR_CLASS_OPTICAL_40G_ER4; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L4_100G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_class_by_10_40_100_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_10_40_100_ethernet(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 40G Optical */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 40G Active Cable (XLPPI) */ + return TRANSVR_CLASS_OPTICAL_40G_AOC; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 40GBASE-SR4 */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + } + if ( (detect_val & 0x02) == 0x02) { /* 00000010 : 40GBASE-LR4 */ + return TRANSVR_CLASS_OPTICAL_40G_LR4; + } + if ( (detect_val & 0x08) == 0x08) { /* 00001000 : 40GBASE-CR4 */ + return TRANSVR_CLASS_COPPER_L4_40G; + } + /* Case: 10G Optical */ + if ( (detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + } + /* Case: Extend Compliance */ + if ( ((detect_val & 0x80) == 0x80) ){ /* 10000000 : Use Extend Compliance */ + return TRANSVR_CLASS_EXTEND_COMP; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_10g = 0x10; + int upper_bound_10g = 0x25; + int lower_bound_40g = 0x60; + int upper_bound_40g = 0x75; + int lower_bound_100g = 0x60; + int upper_bound_100g = 0x75; + int used_extend_br = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + int extend_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 40G */ + if ((notmal_br >= lower_bound_40g) && + (notmal_br <= upper_bound_40g) ) { + return TRANSVR_CLASS_40G; + } + /* Check 100G */ + if (notmal_br == used_extend_br) { + extend_br = (int)(self->extbr); /* updated by update_all() */ + if ((extend_br >= lower_bound_100g) && + (extend_br <= upper_bound_100g) ) { + return TRANSVR_CLASS_100G; + } + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_qsfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int conn_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _qsfp_detect_if_sp_by_br(self); + conn_val = _qsfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 (Multifiber Parallel Optic) */ + case 0x0d: /* MPO 2x16 */ + goto ok_qsfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + goto ok_qsfp_detect_class_by_feature_4_copper; + case 0x23: /* No separable connector */ + if ((_qsfp_get_comp_fc_link_length(self) > 0) || + (_qsfp_get_comp_fc_trans_tech(self) > 0) || + (_qsfp_get_comp_fc_trans_media(self) > 0) || + (_qsfp_get_comp_fc_speed(self) > 0) ) { + goto ok_qsfp_detect_class_by_feature_4_aoc; + } + goto ok_qsfp_detect_class_by_feature_4_copper; + default: + snprintf(err_msg, sizeof(err_msg), + "_qsfp_get_connector_type return Non define value:%d", + conn_val); + goto err_qsfp_detect_class_by_feature_1; + } + return TRANSVR_CLASS_UNSPECIFIED; + +ok_qsfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_100G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_100G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_100G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_100G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_100G; + + case TRANSVR_CLASS_40G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_40G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_40G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_40G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_40G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_Q_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_OPTICAL_100G_AOC; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_OPTICAL_40G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_Q_AOC; + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_COPPER_L4_100G; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_COPPER_L4_40G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L4_10G; + default: + return TRANSVR_CLASS_COPPER; + } + +err_qsfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", + __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +qsft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _qsfp_detect_class_by_extend_comp(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_COPPER_L4_100G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check 10/40G/100G Ethernet Compliance */ + detect_val = _qsfp_detect_class_by_10_40_100_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_COPPER_L4_40G: + return detect_val; + case TRANSVR_CLASS_EXTEND_COMP: + /* Format incorrect case (We already checked the Extend + * Compliance is 0 + */ + snprintf(err_msg, sizeof(err_msg), + "Transceiver format incorrect"); + goto err_qsft_detect_transvr_class_1; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10/40/100:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check by Connector type, BR and wavelength */ + detect_val = _qsfp_detect_class_by_feature(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_COPPER_L4_100G: + case TRANSVR_CLASS_COPPER_L4_40G: + case TRANSVR_CLASS_COPPER_L4_10G: + case TRANSVR_CLASS_COPPER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined connector:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), + "Can not identify!"); + goto err_qsft_detect_transvr_class_1; + +err_qsft_detect_transvr_class_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: LR4 or LR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: /* Need Check: ER4 or ER */ + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_KR4); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_qsfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = qsft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _qsfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TRIDENT_3: + case BCM_CHIP_TYPE_TOMAHAWK: + return _qsfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _qsfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 8; + char tmp_result[8] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = qsft_detect_transvr_class(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G Copper */ + case TRANSVR_CLASS_COPPER_L4_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + break; + /* Copper */ + case TRANSVR_CLASS_COPPER: + break; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined class case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Check br and extbr */ + detect_val = _qsfp_detect_if_sp_by_br(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + case TRANSVR_CLASS_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined BR case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_detect_if_speed_1; + +err_qsfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_common_set_lane_map_str(struct transvr_obj_s* self, + char *result) { + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + char err_msg[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_L_STR); + snprintf(result, LEN_TRANSVR_L_STR, "%s=", TRANSVR_UEVENT_KEY_LANE); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + if (tmp_val > 256) { + snprintf(err_msg, sizeof(err_msg), + "detect abnormal value:%d", tmp_val); + goto err_common_set_lane_map_str_1; + } + memset(tmp_str, 0, sizeof(tmp_str)); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_L_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_L_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_L_STR); + } + if (i == 0) { + goto err_common_set_lane_map_str_2; + } + return 0; + +err_common_set_lane_map_str_1: + SWPS_INFO("%s: %s", __func__, err_msg); +err_common_set_lane_map_str_2: + snprintf(result, LEN_TRANSVR_L_STR, "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_common_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action, + int (*detect_if_type)(struct transvr_obj_s *self, char *result), + int (*detect_if_speed)(struct transvr_obj_s *self, char *result), + int send_anyway) { + + char *uevent_envp[4]; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + char tmp_str[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_1[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_2[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_3[64] = DEBUG_TRANSVR_STR_VAL; + + if (TRANSVR_UEVENT_ENABLE != 1) { + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_get_if_lane(self, tmp_str) < 0) { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + } else { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, tmp_str); + } + switch (u_action) { + case KOBJ_ADD: + /* Detect type */ + if (detect_if_type(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface type fail!"); + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, tmp_str); + uevent_envp[0] = tmp_str_1; + /* Detect speed */ + if (detect_if_speed(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface speed fail!"); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, tmp_str); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + case KOBJ_REMOVE: + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + default: + snprintf(err_msg, sizeof(err_msg), "kobject_action:%d not support", u_action); + goto private_common_send_uevent_4_fail; + } + snprintf(err_msg, sizeof(err_msg), "%s", "Exception case"); + goto private_common_send_uevent_4_fail; + +private_common_send_uevent_4_fail: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + if (send_anyway) { + goto private_common_send_uevent_4_send; + } + return ERR_TRANSVR_UEVENT_FAIL; + +private_common_send_uevent_4_send: + return kobject_uevent_env(&(self->transvr_dev_p->kobj), + u_action, + uevent_envp); +} + + +int +_isolate_send_uevent(struct transvr_obj_s* self) { + + enum kobject_action u_action = KOBJ_ADD; + char *uevent_envp[4]; + char tmp_str[64] = DEBUG_TRANSVR_STR_VAL; + char str_if_info[32] = DEBUG_TRANSVR_STR_VAL; + char str_sp_info[32] = DEBUG_TRANSVR_STR_VAL; + char str_ln_info[64] = DEBUG_TRANSVR_STR_VAL; + + if (_common_get_if_lane(self, tmp_str) < 0) { + snprintf(str_ln_info, sizeof(str_ln_info), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + } else { + snprintf(str_ln_info, sizeof(str_ln_info), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, tmp_str); + } + snprintf(str_if_info, sizeof(str_if_info), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_ISOLATED); + snprintf(str_sp_info, sizeof(str_sp_info), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_ISOLATED); + + uevent_envp[0] = str_if_info; + uevent_envp[1] = str_sp_info; + uevent_envp[2] = str_ln_info; + uevent_envp[3] = NULL; + + return kobject_uevent_env(&(self->transvr_dev_p->kobj), + u_action, + uevent_envp); +} + +int +sfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_sfp_detect_if_type, + &_sfp_detect_if_speed, + send_anyway); +} + + +int +qsfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_qsfp_detect_if_type, + &_qsfp_detect_if_speed, + send_anyway); +} + + +int +fake_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + + int err; + int detect_result[2]; + int current_state = STATE_TRANSVR_UNEXCEPTED; + int current_type = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_NEW) { + if (_transvr_init_handler(self) < 0){ + return ERR_TRANSVR_INIT_FAIL; + } + } + err = detect_transvr_state(self, detect_result); + if (err < 0) { + return err; + } + /* In Direct mode, driver only detect transceiver when user call driver interface + * which on sysfs. So it only need consider the state of Transceiver. + */ + current_state = detect_result[0]; + current_type = detect_result[1]; + + switch (current_state){ + + case STATE_TRANSVR_DISCONNECTED: /* Transceiver is not plugged */ + self->state = current_state; + self->type = current_type; + return ERR_TRANSVR_UNPLUGGED; + + case STATE_TRANSVR_INIT: /* Transceiver is plugged, system not ready */ + return ERR_TRANSVR_UNINIT; + + case STATE_TRANSVR_ISOLATED: /* Transceiver is plugged, but has some issues */ + return ERR_TRNASVR_BE_ISOLATED; + + case STATE_TRANSVR_CONNECTED: /* Transceiver is plugged, system is ready */ + self->state = current_state; + self->type = current_type; + return 0; + + case STATE_TRANSVR_SWAPPED: /* Transceiver is plugged, system detect user changed */ + self->type = current_type; + if (reload_transvr_obj(self, current_type) < 0){ + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + self->state = current_state; + return 0; + + case STATE_TRANSVR_UNEXCEPTED: /* Transceiver type or state is unexpected case */ + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_UNEXCPT; + + default: + SWPS_INFO("%s: state:%d not in define.\n", __func__, current_state); + break; + } + return ERR_TRANSVR_UNEXCPT; +} + + +static int +_is_except_happened_4_pmode(struct transvr_obj_s* self, + int new_state) { + + int event_chk = 0; + + if (self->temp == 0){ + return 0; + } + switch (new_state) { + case STATE_TRANSVR_INIT: + event_chk = EVENT_TRANSVR_EXCEP_INIT; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_CONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_UP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_DISCONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_DOWN; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_SWAPPED: + event_chk = EVENT_TRANSVR_EXCEP_SWAP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_UNEXCEPTED: + event_chk = EVENT_TRANSVR_EXCEP_EXCEP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_ISOLATED: + event_chk = EVENT_TRANSVR_EXCEP_ISOLATED; + goto check_event_happened_4_pmode; + + default: + SWPS_INFO("%s: unexcepted case:%d\n", __func__, new_state); + break; + } + return 0; + +check_event_happened_4_pmode: + if (self->temp == event_chk){ + return 1; + } + return 0; +} +int transvr_health_mtr(struct transvr_obj_s* self) +{ + + int state = self->state; + int return_val = 0; + /*when transvr is connected , check if it's alive by accessing it at slower frequency*/ + if (state == STATE_TRANSVR_CONNECTED) + { + //SWPS_INFO("%s: %s connected_st :%d detect_type_count:%d\n", + // __func__, self->swp_name, self->state, detect_type_count); + if (self->detect_type_count++ > DETECT_TYPE_TIMEOUT) { + self->detect_type_count = 0; + return_val = detect_transvr_type(self); + if (TRANSVR_TYPE_ERROR == return_val || + TRANSVR_TYPE_UNPLUGGED == return_val) + { + //SWPS_INFO("%s: %s sff type check fail :%d result:%d\n", + // __func__, self->swp_name, self->state, return_val); + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: %s detect I2C crash :%d\n", + __func__, self->swp_name, self->state); + return ERR_TRANSVR_I2C_CRASH; + } + } + //SWPS_INFO("%s: %s still alive :%d result:%d\n", + // __func__, self->swp_name, self->state, return_val); + } + } else { + self->detect_type_count = 0; + } + return 0; +} +int +common_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + /* [Return Value]: + * ERR_TRANSVR_UNINIT : (1) Initial not ready + * ERR_TRANSVR_UNPLUGGED : (1) Any -> Down + * ERR_TRANSVR_TASK_BUSY : (1) Wait Initial task + * ERR_TRANSVR_UNEXCPT : (1) Initial fail + * (2) Task fail + * (3) Reload fail + * ERR_TRNASVR_BE_ISOLATED : (1) Already be isolated + * OK Case (return 0) : (1) action_4_connected + * (2) action_4_nothing (initial retry) + */ + int curr_state[2]; + int old_state = self->state; + int old_type = self->type; + int new_state = STATE_TRANSVR_UNEXCEPTED; + int new_type = TRANSVR_TYPE_ERROR; + int return_val = ERR_TRANSVR_UNEXCPT; + + /* Never initial */ + if (self->state == STATE_TRANSVR_NEW) { + goto comfsm_action_4_reinit_obj; + } + /* Detect current state */ + switch (detect_transvr_state(self, curr_state)) { + case 0: + new_state = curr_state[0]; + new_type = curr_state[1]; + break; + + case ERR_TRNASVR_BE_ISOLATED: + new_state = STATE_TRANSVR_ISOLATED; + new_type = old_type; + break; + + case ERR_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case ERR_TRANSVR_UNEXCPT: + default: + new_state = STATE_TRANSVR_UNEXCEPTED; + new_type = old_type; + } + /* State handling */ + switch (old_state) { + case STATE_TRANSVR_INIT: /* INIT -> */ + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 1-1: UP -> INIT */ + SWPS_INFO("Detect %s is present. :1-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 1-2: UP -> UP */ + return_val = 0; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 1-3: UP -> DOWN */ + SWPS_INFO("Detect %s is removed. :1-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 1-4: UP -> SWAP */ + SWPS_INFO("Detect %s is swapped. :1-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 1-5: UP -> UNEXPET */ + SWPS_INFO("Detect %s has error. :1-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 1-6: UP -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :1-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_DISCONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 2-1: DOWN -> INIT */ + SWPS_INFO("Detect %s is present. :2-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 2-2: DOWN -> UP */ + SWPS_INFO("Detect %s is present. :2-2\n",self->swp_name); + goto comfsm_action_4_reinit_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 2-3: DOWN -> DOWN */ + return_val = ERR_TRANSVR_UNPLUGGED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_SWAPPED: /* Case 2-4: DOWN -> SWAP */ + SWPS_INFO("Detect %s is swapped. :2-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 2-5: DOWN -> UNEXPET */ + SWPS_INFO("Detect %s has error. :2-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 2-6: DOWN -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :2-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_UNEXCEPTED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 3-1: UNEXPET -> INIT */ + SWPS_INFO("Detect %s is present. :3-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 3-2: UNEXPET -> UP */ + SWPS_INFO("Detect %s is present. :3-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 3-3: UNEXPET -> DOWN */ + SWPS_INFO("Detect %s is removed. :3-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 3-4: UNEXPET -> SWAP */ + SWPS_INFO("Detect %s is swapped. :3-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 3-5: UNEXPET -> UNEXPET */ + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRANSVR_UNEXCPT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 3-6: UNEXPET -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :3-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 4-1: ISOLATE -> INIT */ + SWPS_INFO("Detect %s internal error. :4-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 4-2: ISOLATE -> UP */ + SWPS_INFO("Detect %s internal error. :4-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 4-3: ISOLATE -> DOWN */ + SWPS_INFO("Detect %s is removed. :4-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 4-4: ISOLATE -> SWAP */ + SWPS_INFO("Detect %s internal error. :4-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 4-5: ISOLATE -> UNEXPET */ + SWPS_INFO("Detect %s internal error. :4-5\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 4-6: ISOLATE -> ISOLATE */ + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + default: + break; + } + goto comfsm_action_4_unexpected; + + default: + break; + } + goto comfsm_action_4_unexpected; + + +comfsm_action_4_keep_state: + return return_val; + +comfsm_action_4_reinit_obj: + SWPS_DEBUG("FSM action: %s re-initial.\n", self->swp_name); + return_val = _transvr_init_handler(self); + goto comfsm_action_4_identify_event; + +comfsm_action_4_reload_obj: + SWPS_DEBUG("FSM action: %s reload.\n", self->swp_name); + self->type = new_type; + return_val = reload_transvr_obj(self, new_type); + goto comfsm_action_4_identify_event; + +comfsm_action_4_identify_event: + switch (return_val) { + case EVENT_TRANSVR_INIT_UP: + case EVENT_TRANSVR_TASK_DONE: + goto comfsm_action_4_connected; + + case EVENT_TRANSVR_INIT_DOWN: + goto comfsm_action_4_disconnected; + + case EVENT_TRANSVR_INIT_REINIT: + goto comfsm_action_4_nothing; + + case EVENT_TRANSVR_TASK_WAIT: + self->state = STATE_TRANSVR_INIT; + return ERR_TRANSVR_TASK_BUSY; + + case EVENT_TRANSVR_TASK_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_TASK_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_INIT_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_INIT_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_RELOAD_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_RELOAD_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case EVENT_TRANSVR_EXCEP_ISOLATED: + goto comfsm_action_4_isolate_obj; + + default: + SWPS_INFO("%s detect undefined event:%d.\n", self->swp_name, return_val); + goto comfsm_action_4_unexpected; + } + +comfsm_action_4_nothing: + SWPS_DEBUG("FSM action: %s do nothing.\n", self->swp_name); + return 0; + +comfsm_action_4_connected: + SWPS_DEBUG("FSM action: %s Connected.\n", self->swp_name); + self->state = STATE_TRANSVR_CONNECTED; + self->send_uevent(self, KOBJ_ADD); + _transvr_clean_retry(self); + return 0; + +comfsm_action_4_disconnected: + SWPS_DEBUG("FSM action: %s Disconnected. \n", self->swp_name); + self->state = STATE_TRANSVR_DISCONNECTED; + self->temp = EVENT_TRANSVR_TASK_DONE; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_retry(self); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNPLUGGED; + +comfsm_action_4_report_i2c_crash: + SWPS_DEBUG("FSM action: %s report I2C crash.\n", self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_I2C_CRASH; + +comfsm_action_4_isolate_obj: + SWPS_DEBUG("FSM action: %s isolate.\n", self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return ERR_TRNASVR_BE_ISOLATED; + +comfsm_action_4_unexpected: + SWPS_INFO("FSM action: %s unexpected.\n", self->swp_name); + SWPS_INFO("Dump: :%d :0x%02x :%d :0x%02x\n", + old_state, old_type, new_state, new_type); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNEXCPT; +} + + +int +fake_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +int +fake_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +/* ========== Object functions for Initial procedure ========== + */ +int +transvr_init_common(struct transvr_obj_s *self){ + /* Nothing to update */ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_fake(struct transvr_obj_s *self){ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_sfp(struct transvr_obj_s *self){ + + int tmp_val = DEBUG_TRANSVR_INT_VAL; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_msg = "ERR"; + + self->info = sft_detect_transvr_class(self); + /* Disable auto_config */ + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + /* Handle multi-rate */ + err_code = initfunc_sfp_handle_multi_rate_mode(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_multi_rate_mode fail!"; + goto err_transvr_init_sfp_1; + } + /* Handle 1G- RJ45 */ + tmp_val = err_code; + err_code = initfunc_sfp_handle_1g_rj45(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_1g_rj45 fail!"; + goto err_transvr_init_sfp_1; + } + tmp_val = (tmp_val > err_code ? tmp_val : err_code); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_sfp_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_code, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp(struct transvr_obj_s *self){ + + int err = EVENT_TRANSVR_EXCEP_EXCEP; + char *emsg = "ERR"; + + self->info = qsft_detect_transvr_class(self); + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + err = initfunc_qsfp_handle_power_mode(self); + if (err < 0){ + emsg = "initfunc_qsfp_handle_tx_disable fail!"; + goto err_transvr_init_qsfp; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, emsg, err, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp28(struct transvr_obj_s *self){ + + int tmp_val = EVENT_TRANSVR_EXCEP_EXCEP; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_msg = "ERR"; + + /* Handle QSFP common */ + err_val = transvr_init_qsfp(self); + if (err_val < 0){ + err_msg = "transvr_init_qsfp fail!"; + goto err_transvr_init_qsfp28_1; + } + /* Disable auto_config */ + if (!self->auto_config) { + return err_val; + } + /* Handle CDR */ + tmp_val = err_val; + err_val = initfunc_qsfp28_handle_cdr(self); + if (err_val < 0){ + err_msg = "Handle CDR fail!"; + goto err_transvr_init_qsfp28_1; + } + tmp_val = (tmp_val > err_val ? tmp_val : err_val); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp28_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object Initial handler ========== + */ +static int +_is_transvr_valid(struct transvr_obj_s *self, + int type, + int state) { + /* [Return] + * 0 : OK, inserted + * EVENT_TRANSVR_INIT_DOWN : OK, removed + * EVENT_TRANSVR_INIT_FAIL : Outside error, type doesn't supported + * EVENT_TRANSVR_EXCEP_INIT : Internal error, state undefined + */ + switch (type) { + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + break; + default: + SWPS_INFO("detect undefined type:0x%02x on %s\n", + type, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; + } + switch (state) { + case STATE_TRANSVR_DISCONNECTED: + return EVENT_TRANSVR_INIT_DOWN; + case STATE_TRANSVR_INIT: + case STATE_TRANSVR_CONNECTED: + case STATE_TRANSVR_SWAPPED: + break; + default: + SWPS_INFO("detect undefined state:%d on %s\n", + state, self->swp_name); + return EVENT_TRANSVR_EXCEP_INIT; + } + return 0; +} + + +static int +_is_transvr_hw_ready(struct transvr_obj_s *self, + int type){ + /* [Return] + * EVENT_TRANSVR_TASK_DONE : Ready + * EVENT_TRANSVR_TASK_WAIT : Not ready + * EVENT_TRANSVR_INIT_FAIL : Error + */ + int addr = DEBUG_TRANSVR_INT_VAL; + int page = DEBUG_TRANSVR_INT_VAL; + int offs = DEBUG_TRANSVR_INT_VAL; + int bit = DEBUG_TRANSVR_INT_VAL; + int ready = DEBUG_TRANSVR_INT_VAL; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t ab_val = DEBUG_TRANSVR_HEX_VAL; + + switch (type) { + case TRANSVR_TYPE_SFP: + addr = VAL_TRANSVR_8472_READY_ADDR; + page = VAL_TRANSVR_8472_READY_PAGE; + offs = VAL_TRANSVR_8472_READY_OFFSET; + bit = VAL_TRANSVR_8472_READY_BIT; + ready = VAL_TRANSVR_8472_READY_VALUE; + ab_val = VAL_TRANSVR_8472_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + addr = VAL_TRANSVR_8436_READY_ADDR; + page = VAL_TRANSVR_8436_READY_PAGE; + offs = VAL_TRANSVR_8436_READY_OFFSET; + bit = VAL_TRANSVR_8436_READY_BIT; + ready = VAL_TRANSVR_8436_READY_VALUE; + ab_val = VAL_TRANSVR_8436_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + return EVENT_TRANSVR_TASK_DONE; + + default: + emsg = "unexpected case"; + goto err_is_transvr_hw_ready; + } + /* Select target page */ + err = _common_setup_page(self, addr, page, offs, 1, 0); + if (err < 0) { + emsg = "setup page fail"; + goto err_is_transvr_hw_ready; + } + /* Check feature supported + * [Note] + * Some of transceiver/cables doesn't support "Status Indicators" + * (ex:DAC, RJ45 copper SFP ...etc). In these case, we bypass the + * step of checking Status Indicators, then state machine will take + * the following handle procedure. + */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (err < 0) { + emsg = "doesn't support Status Indicators"; + goto bypass_is_transvr_hw_ready; + } + /* Filter abnormal case */ + if (err == ab_val) { + emsg = "detect using unusual definition."; + goto bypass_is_transvr_hw_ready; + } +/*skip data ready check in this stage , move the check in qsfp_data_ready_check() instead*/ +#if 0 + /* Get Status Indicators */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, offs); + if (err < 0) { + emsg = "detect current value fail"; + goto err_is_transvr_hw_ready; + } + if ((err & (1<:%d\n", __func__, emsg, type); + return EVENT_TRANSVR_TASK_DONE; + +err_is_transvr_hw_ready: + SWPS_DEBUG("%s: %s :%d\n", __func__, emsg, type); + return EVENT_TRANSVR_INIT_FAIL; +} + +static int +_is_transvr_support_page03(struct transvr_obj_s *self) { + + switch (self->info) { + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return 1; + default: + break; + } + return 0; +} + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self) { + + switch (self->info) { + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return 1; + default: + break; + } + return 0; +} + + +static int +_transvr_init_handler(struct transvr_obj_s *self){ + + int detect[2]; + int d_state = STATE_TRANSVR_UNEXCEPTED; + int d_type = TRANSVR_TYPE_ERROR; + int result = ERR_TRANSVR_UNINIT; + int retry = 6; /* (6+1) x 0.3 = 2.1s > spec:2.0s */ + int elimit = 63; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Clean and check callback */ + self->state = STATE_TRANSVR_INIT; + if (self->init == NULL) { + snprintf(emsg, elimit, "init() is null"); + goto initer_err_case_unexcept_0; + } + if (self->clean == NULL) { + snprintf(emsg, elimit, "clean() is null"); + goto initer_err_case_unexcept_0; + } + self->clean(self); + + /* Detect transceiver information */ + result = detect_transvr_state(self, detect); + if (result < 0) { + snprintf(emsg, elimit, "detect_transvr_state() fail"); + switch (result) { + case ERR_TRANSVR_I2C_CRASH: + goto initer_err_case_i2c_ceash; + case ERR_TRNASVR_BE_ISOLATED: + goto initer_err_case_be_isolated; + + case ERR_TRANSVR_UNEXCPT: + default: + break; + } + goto initer_err_case_retry_1; + } + d_state = detect[0]; + d_type = detect[1]; + + /* Verify transceiver type and state */ + switch (_is_transvr_valid(self, d_type, d_state)) { + case 0: + break; + case EVENT_TRANSVR_INIT_DOWN: + goto initer_ok_case_down;; + case EVENT_TRANSVR_INIT_FAIL: + snprintf(emsg, elimit, "transceiver type doesn't support"); + goto initer_err_case_alarm_to_user; + case EVENT_TRANSVR_EXCEP_INIT: + default: + goto initer_err_case_unexcept_1; + } + + /* Handle reload case */ + if (self->type != d_type){ + /* This is the protect mechanism. Normally, This case will not happen. + * When State machine detect swap event during initial, It will trigger + * reload function to ensure type correct. */ + if (_reload_transvr_obj(self, d_type) < 0){ + snprintf(emsg, elimit, "reload object fail"); + goto initer_err_case_unexcept_1; + } + } + + /* Check transceiver HW initial ready */ + switch (_is_transvr_hw_ready(self, d_type)) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_err_case_retry_1; + case EVENT_TRANSVR_INIT_FAIL: + default: + goto initer_err_case_unexcept_1; + } + + /* Try to update all and check */ + if (self->update_all(self, 1) < 0){ + /* For some transceiver, EEPROME has lag issues during initial stage. + * In this case, we set status back to STATE_TRANSVR_NEW, than it will + * be checked in next polling cycle. */ + goto initer_err_case_retry_1; + } + + /* Execute init() call back */ + result = self->init(self); + switch (result) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_ok_case_wait; + + default: + snprintf(emsg, elimit, "undefined init() return:%d\n", result); + goto initer_err_case_unexcept_1; + } + goto initer_ok_case_up; + + +initer_ok_case_wait: + self->dump_all(self); + return EVENT_TRANSVR_TASK_WAIT; + +initer_ok_case_up: + self->state = STATE_TRANSVR_CONNECTED; + self->temp = 0; + self->dump_all(self); + return EVENT_TRANSVR_INIT_UP; + +initer_ok_case_down: + self->temp = 0; + self->state = STATE_TRANSVR_DISCONNECTED; + return EVENT_TRANSVR_INIT_DOWN; + +initer_err_case_i2c_ceash: + SWPS_DEBUG("%s: %s :%s :I2C crash\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_I2C_CRASH; + +initer_err_case_be_isolated: + SWPS_DEBUG("%s: %s :%s :isolated\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return EVENT_TRANSVR_EXCEP_ISOLATED; + +initer_err_case_retry_1: + SWPS_DEBUG("%s: %s :%s :retry\n", + __func__, emsg, self->swp_name); + if (_transvr_handle_retry(self, retry) == 0) { + self->state = STATE_TRANSVR_NEW; + return EVENT_TRANSVR_INIT_REINIT; + } + goto initer_err_case_alarm_to_user; + +initer_err_case_unexcept_1: + self->clean(self); +initer_err_case_unexcept_0: + self->state = STATE_TRANSVR_UNEXCEPTED; + if (_is_except_happened_4_pmode(self, d_state) && + (self->mode == TRANSVR_MODE_POLLING) ){ + SWPS_INFO("%s: %s :%s\n", __func__, emsg, self->swp_name); + SWPS_INFO("Dump: :%d :%d :%d :%d\n", + self->state, self->type, d_state, d_type); + } + return EVENT_TRANSVR_INIT_FAIL; + +initer_err_case_alarm_to_user: + SWPS_DEBUG("%s: %s :%s :alarm_to_user\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard"); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object functions for Clean procedure ========== + */ +int +_transvr_clean_handler(struct transvr_obj_s *self){ + + int retval = DEBUG_TRANSVR_INT_VAL; + + if (!self->clean) { + SWPS_ERR("%s: %s clean() is NULL.\n", + __func__, self->swp_name); + return EVENT_TRANSVR_TASK_FAIL; + } + retval = self->clean(self); + if (retval != EVENT_TRANSVR_TASK_DONE){ + SWPS_ERR("%s: %s clean() fail. [ERR]:%d\n", + __func__, self->swp_name, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_transvr_clean(struct transvr_obj_s *self){ + + transvr_task_free_all(self); + transvr_cache_free_all(self); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +qsfp_transvr_clean(struct transvr_obj_s *self){ + + int retval; + int lpower_config = 1; + + retval = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (retval < 0){ + SWPS_ERR("%s: Set lpmod fail! :%d\n", + __func__, retval); + return retval; + } + retval = common_transvr_clean(self); + if (retval < 0){ + SWPS_ERR("%s: common_transvr_clean fail! :%d\n", + __func__, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +fake_transvr_clean(struct transvr_obj_s *self){ + + return EVENT_TRANSVR_TASK_DONE; +} + + +/* ========== Object functions for check and update ========== + */ +int +common_transvr_check(struct transvr_obj_s *self){ + + char fun_str[32] = "common_transvr_check"; + + if (self->mode != TRANSVR_MODE_POLLING) { + SWPS_ERR("%s: mode:%d is not TRANSVR_MODE_POLLING\n", + fun_str, self->mode); + return ERR_TRANSVR_UNEXCPT; + } + /* Trigger delay task */ + transvr_task_run_all(self); + /* Trigger state machine to check and update */ + return self->fsm_4_polling(self, fun_str); +} + + +int +fake_transvr_check(struct transvr_obj_s *self){ + return 0; +} + + +/* ========== Functions for Factory pattern ========== + */ +static int +setup_transvr_public_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->get_id = common_get_id; + self->get_eeprom = common_get_eeprom; + self->get_eeprom_a0 = sfp_get_eeprom_a0; + self->get_eeprom_a2 = sfp_get_eeprom_a2; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = unsupported_get_func; + self->get_br = common_get_br; + self->get_len_sm = sfp_get_len_sm; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = sfp_get_comp_eth_1; + self->get_comp_eth_10 = sfp_get_comp_eth_10; + self->get_comp_eth_10_40 = unsupported_get_func; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = sfp_get_rate_id; + self->get_soft_rs0 = sfp_get_soft_rs0; + self->get_soft_rs1 = sfp_get_soft_rs1; + self->get_info = common_get_info; + self->get_if_type = sfp_get_if_type; + self->get_if_speed = sfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = sfp_get_transvr_temp; + self->get_curr_vol = sfp_get_transvr_voltage; + self->get_soft_rx_los = unsupported_get_func2; + self->get_soft_tx_disable = unsupported_get_func2; + self->get_soft_tx_fault = unsupported_get_func2; + self->get_auto_tx_disable = unsupported_get_func2; + self->get_tx_bias = sfp_get_transvr_tx_bias; + self->get_tx_power = sfp_get_transvr_tx_power; + self->get_rx_power = sfp_get_transvr_rx_power; + self->get_tx_eq = sfp_get_transvr_tx_eq; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = sfp_get_transvr_rx_em; + self->get_wavelength = sfp_get_wavelength; + self->get_extphy_offset = sfp_get_1g_rj45_extphy_offset; + self->get_extphy_reg = sfp_get_1g_rj45_extphy_reg; + self->get_rx_power_low_alarm = sfp_get_rx_power_low_alarm; + self->get_rx_power_high_alarm = sfp_get_rx_power_high_alarm; + self->get_tx_power_low_alarm = sfp_get_tx_power_low_alarm; + self->get_tx_power_high_alarm = sfp_get_tx_power_high_alarm; + self->get_bias_low_alarm = sfp_get_bias_low_alarm; + self->get_bias_high_alarm = sfp_get_bias_high_alarm; + self->get_voltage_low_alarm = sfp_get_voltage_low_alarm; + self->get_voltage_high_alarm = sfp_get_voltage_high_alarm; + self->get_temp_low_alarm = sfp_get_temp_low_alarm; + self->get_temp_high_alarm = sfp_get_temp_high_alarm; + self->get_rx_power_low_alarm_threshold = sfp_get_rx_power_low_alarm_threshold; + self->get_rx_power_high_alarm_threshold = sfp_get_rx_power_high_alarm_threshold; + self->get_tx_power_low_alarm_threshold = sfp_get_tx_power_low_alarm_threshold; + self->get_tx_power_high_alarm_threshold = sfp_get_tx_power_high_alarm_threshold; + self->get_bias_low_alarm_threshold = sfp_get_bias_low_alarm_threshold; + self->get_bias_high_alarm_threshold = sfp_get_bias_high_alarm_threshold; + self->get_voltage_low_alarm_threshold = sfp_get_voltage_low_alarm_threshold; + self->get_voltage_high_alarm_threshold = sfp_get_voltage_high_alarm_threshold; + self->get_temp_low_alarm_threshold = sfp_get_temp_low_alarm_threshold; + self->get_temp_high_alarm_threshold = sfp_get_temp_high_alarm_threshold; + self->get_manufacturing_date = common_get_manufacturing_date; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = sfp_set_soft_rs0; + self->set_soft_rs1 = sfp_set_soft_rs1; + self->set_soft_tx_disable = unsupported_set_func; + self->set_auto_tx_disable = unsupported_set_func; + self->set_tx_eq = sfp_set_tx_eq; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = sfp_set_rx_em; + self->set_extphy_offset = sfp_set_1g_rj45_extphy_offset; + self->set_extphy_reg = sfp_set_1g_rj45_extphy_reg; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->get_id = common_get_id; + self->get_eeprom = common_get_eeprom; + self->get_eeprom_page03 = qsfp_get_eeprom_page03; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = unsupported_get_func2; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = unsupported_get_func2; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->get_rx_power_low_alarm = qsfp_get_rx_power_low_alarm; + self->get_rx_power_high_alarm = qsfp_get_rx_power_high_alarm; + self->get_tx_power_low_alarm = qsfp_get_tx_power_low_alarm; + self->get_tx_power_high_alarm = qsfp_get_tx_power_high_alarm; + self->get_bias_low_alarm = qsfp_get_bias_low_alarm; + self->get_bias_high_alarm = qsfp_get_bias_high_alarm; + self->get_voltage_low_alarm = qsfp_get_voltage_low_alarm; + self->get_voltage_high_alarm = qsfp_get_voltage_high_alarm; + self->get_temp_low_alarm = qsfp_get_temp_low_alarm; + self->get_temp_high_alarm = qsfp_get_temp_high_alarm; + self->get_rx_power_low_alarm_threshold = qsfp_get_rx_power_low_alarm_threshold; + self->get_rx_power_high_alarm_threshold = qsfp_get_rx_power_high_alarm_threshold; + self->get_tx_power_low_alarm_threshold = qsfp_get_tx_power_low_alarm_threshold; + self->get_tx_power_high_alarm_threshold = qsfp_get_tx_power_high_alarm_threshold; + self->get_bias_low_alarm_threshold = qsfp_get_bias_low_alarm_threshold; + self->get_bias_high_alarm_threshold = qsfp_get_bias_high_alarm_threshold; + self->get_voltage_low_alarm_threshold = qsfp_get_voltage_low_alarm_threshold; + self->get_voltage_high_alarm_threshold = qsfp_get_voltage_high_alarm_threshold; + self->get_temp_low_alarm_threshold = qsfp_get_temp_low_alarm_threshold; + self->get_temp_high_alarm_threshold = qsfp_get_temp_high_alarm_threshold; + self->get_manufacturing_date = common_get_manufacturing_date; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = unsupported_set_func; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = unsupported_set_func; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->get_id = common_get_id; + self->get_eeprom = common_get_eeprom; + self->get_eeprom_page03 = qsfp_get_eeprom_page03; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = qsfp_get_cdr; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = qsfp_get_transvr_tx_eq; + self->get_rx_am = qsfp_get_transvr_rx_am; + self->get_rx_em = qsfp_get_transvr_rx_em; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->get_rx_power_low_alarm = qsfp_get_rx_power_low_alarm; + self->get_rx_power_high_alarm = qsfp_get_rx_power_high_alarm; + self->get_tx_power_low_alarm = qsfp_get_tx_power_low_alarm; + self->get_tx_power_high_alarm = qsfp_get_tx_power_high_alarm; + self->get_bias_low_alarm = qsfp_get_bias_low_alarm; + self->get_bias_high_alarm = qsfp_get_bias_high_alarm; + self->get_voltage_low_alarm = qsfp_get_voltage_low_alarm; + self->get_voltage_high_alarm = qsfp_get_voltage_high_alarm; + self->get_temp_low_alarm = qsfp_get_temp_low_alarm; + self->get_temp_high_alarm = qsfp_get_temp_high_alarm; + self->get_rx_power_low_alarm_threshold = qsfp_get_rx_power_low_alarm_threshold; + self->get_rx_power_high_alarm_threshold = qsfp_get_rx_power_high_alarm_threshold; + self->get_tx_power_low_alarm_threshold = qsfp_get_tx_power_low_alarm_threshold; + self->get_tx_power_high_alarm_threshold = qsfp_get_tx_power_high_alarm_threshold; + self->get_bias_low_alarm_threshold = qsfp_get_bias_low_alarm_threshold; + self->get_bias_high_alarm_threshold = qsfp_get_bias_high_alarm_threshold; + self->get_voltage_low_alarm_threshold = qsfp_get_voltage_low_alarm_threshold; + self->get_voltage_high_alarm_threshold = qsfp_get_voltage_high_alarm_threshold; + self->get_temp_low_alarm_threshold = qsfp_get_temp_low_alarm_threshold; + self->get_temp_high_alarm_threshold = qsfp_get_temp_high_alarm_threshold; + self->get_manufacturing_date = common_get_manufacturing_date; + self->set_cdr = qsfp_set_cdr; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = qsfp_set_tx_eq; + self->set_rx_am = qsfp_set_rx_am; + self->set_rx_em = qsfp_set_rx_em; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_FAKE: + self->get_id = fake_get_hex; + self->get_eeprom = fake_get_str; + self->get_eeprom_a0 = fake_get_str; + self->get_eeprom_a2 = fake_get_str; + self->get_eeprom_page03 = fake_get_str; + self->get_ext_id = fake_get_hex; + self->get_connector = fake_get_hex; + self->get_vendor_name = fake_get_str; + self->get_vendor_pn = fake_get_str; + self->get_vendor_rev = fake_get_str; + self->get_vendor_sn = fake_get_str; + self->get_power_cls = fake_get_int; + self->get_br = fake_get_hex; + self->get_len_sm = fake_get_int; + self->get_len_smf = fake_get_int; + self->get_len_om1 = fake_get_int; + self->get_len_om2 = fake_get_int; + self->get_len_om3 = fake_get_int; + self->get_len_om4 = fake_get_int; + self->get_comp_rev = fake_get_hex; + self->get_comp_eth_1 = fake_get_hex; + self->get_comp_eth_10 = fake_get_hex; + self->get_comp_eth_10_40 = fake_get_hex; + self->get_comp_extend = fake_get_hex; + self->get_cdr = fake_get_hex; + self->get_rate_id = fake_get_hex; + self->get_soft_rs0 = fake_get_binary; + self->get_soft_rs1 = fake_get_binary; + self->get_info = fake_get_int; + self->get_if_type = fake_get_str; + self->get_if_speed = fake_get_str; + self->get_if_lane = fake_get_str; + self->get_curr_temp = fake_get_str; + self->get_curr_vol = fake_get_str; + self->get_soft_rx_los = fake_get_str; + self->get_soft_tx_disable = fake_get_str; + self->get_soft_tx_fault = fake_get_str; + self->get_auto_tx_disable = fake_get_str; + self->get_tx_bias = fake_get_str; + self->get_tx_power = fake_get_str; + self->get_rx_power = fake_get_str; + self->get_tx_eq = fake_get_str; + self->get_rx_am = fake_get_str; + self->get_rx_em = fake_get_str; + self->get_wavelength = fake_get_str; + self->get_extphy_offset = fake_get_str; + self->get_extphy_reg = fake_get_str; + self->get_rx_power_low_alarm = fake_get_str; + self->get_rx_power_high_alarm = fake_get_str; + self->get_tx_power_low_alarm = fake_get_str; + self->get_tx_power_high_alarm = fake_get_str; + self->get_bias_low_alarm = fake_get_str; + self->get_bias_high_alarm = fake_get_str; + self->get_voltage_low_alarm = fake_get_str; + self->get_voltage_high_alarm = fake_get_str; + self->get_temp_low_alarm = fake_get_str; + self->get_temp_high_alarm = fake_get_str; + self->get_rx_power_low_alarm_threshold = fake_get_str; + self->get_rx_power_high_alarm_threshold = fake_get_str; + self->get_tx_power_low_alarm_threshold = fake_get_str; + self->get_tx_power_high_alarm_threshold = fake_get_str; + self->get_bias_low_alarm_threshold = fake_get_str; + self->get_bias_high_alarm_threshold = fake_get_str; + self->get_voltage_low_alarm_threshold = fake_get_str; + self->get_voltage_high_alarm_threshold = fake_get_str; + self->get_temp_low_alarm_threshold = fake_get_str; + self->get_temp_high_alarm_threshold = fake_get_str; + self->get_manufacturing_date = fake_get_str; + self->set_cdr = fake_set_hex; + self->set_soft_rs0 = fake_set_int; + self->set_soft_rs1 = fake_set_int; + self->set_soft_tx_disable = fake_set_int; + self->set_auto_tx_disable = fake_set_int; + self->set_tx_eq = fake_set_int; + self->set_rx_am = fake_set_int; + self->set_rx_em = fake_set_int; + self->set_extphy_offset = fake_set_hex; + self->set_extphy_reg = fake_set_hex; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_transvr_private_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->init = transvr_init_sfp; + self->clean = common_transvr_clean; + self->check = common_transvr_check; + self->update_all = _sfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = sfp_send_uevent; + self->dump_all = sfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->init = transvr_init_qsfp; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->init = transvr_init_qsfp28; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_FAKE: + self->init = transvr_init_fake; + self->clean = fake_transvr_clean; + self->check = fake_transvr_check; + self->update_all = fake_transvr_update; + self->fsm_4_direct = fake_fsm_4_direct_mode; + self->fsm_4_polling = fake_fsm_4_polling_mode; + self->send_uevent = fake_send_uevent; + self->dump_all = fake_transvr_dump; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static struct eeprom_map_s * +get_eeprom_map(int transvr_type){ + + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + return &eeprom_map_sfp; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + return &eeprom_map_qsfp; + case TRANSVR_TYPE_QSFP_28: + return &eeprom_map_qsfp28; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return NULL; +} + + +static int +setup_transvr_ssize_attr(char *swp_name, + struct transvr_obj_s *self, + struct eeprom_map_s *map_p, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int chan_id, + int run_mode){ + switch (run_mode){ + case TRANSVR_MODE_DIRECT: /* Direct access device mode */ + case TRANSVR_MODE_POLLING: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = DEBUG_TRANSVR_INT_VAL; + return -1; + } + self->eeprom_map_p = map_p; + self->ioexp_obj_p = ioexp_obj_p; + self->ioexp_virt_offset = ioexp_virt_offset; + self->chan_id = chan_id; + self->layout = transvr_type; + self->type = transvr_type; + self->chipset_type = chipset_type; + self->state = STATE_TRANSVR_NEW; + self->info = STATE_TRANSVR_NEW; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + strncpy(self->swp_name, swp_name, sizeof(self->swp_name)-1); + mutex_init(&self->lock); + return 0; +} + + +static int +setup_transvr_dsize_attr(struct transvr_obj_s *self){ + + char *emsg = DEBUG_TRANSVR_STR_VAL; + + self->vendor_name = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_name){ + emsg = "vendor_name"; + goto err_setup_d_attr; + } + self->vendor_pn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_pn){ + emsg = "vendor_pn"; + goto err_setup_d_attr; + } + self->vendor_rev = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_rev){ + emsg = "vendor_rev"; + goto err_setup_d_attr; + } + self->vendor_sn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_sn){ + emsg = "vendor_sn"; + goto err_setup_d_attr; + } + self->worker_p = NULL; + return 0; + +err_setup_d_attr: + SWPS_ERR("%s: %s kzalloc fail!", __func__, emsg); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_i2c_client(struct transvr_obj_s *self){ + + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + adap = i2c_get_adapter(self->chan_id); + if(!adap){ + snprintf(err_msg, sizeof(err_msg), + "can not get adap:%d", self->chan_id); + goto err_setup_i2c_client; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + snprintf(err_msg, sizeof(err_msg), + "can not kzalloc client:%d", self->chan_id); + goto err_setup_i2c_client; + } + client->adapter = adap; + self->i2c_client_p = client; + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return ERR_TRANSVR_UNEXCPT; +} + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode, + int port_id){ + + struct transvr_obj_s *result_p; + struct eeprom_map_s *map_p; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Allocate transceiver object */ + map_p = get_eeprom_map(transvr_type); + if (!map_p){ + snprintf(err_msg, sizeof(err_msg), + "Invalid transvr_type:%d", transvr_type); + goto err_create_transvr_fail; + } + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_create_transvr_fail; + } + /* Prepare static size attributes */ + if (setup_transvr_ssize_attr(swp_name, + result_p, + map_p, + ioexp_obj_p, + ioexp_virt_offset, + transvr_type, + chipset_type, + chan_id, + run_mode) < 0){ + goto err_create_transvr_sattr_fail; + } + /* Prepare dynamic size attributes */ + if (setup_transvr_dsize_attr(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_public_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_private_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare i2c client object */ + if (setup_i2c_client(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + result_p->port_id = port_id; + return result_p; + +err_create_transvr_dattr_fail: + kfree(result_p->vendor_sn); + kfree(result_p->vendor_rev); + kfree(result_p->vendor_pn); + kfree(result_p->vendor_name); +err_create_transvr_sattr_fail: + kfree(result_p); +err_create_transvr_fail: + SWPS_ERR("%s: %s :%d :%d :%d\n", + __func__, err_msg, chan_id, ioexp_virt_offset, transvr_type); + return NULL; +} +EXPORT_SYMBOL(create_transvr_obj); + + +static int +_reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + struct eeprom_map_s *new_map_p; + struct eeprom_map_s *old_map_p = self->eeprom_map_p; + struct i2c_client *old_i2c_p = self->i2c_client_p; + int old_type = self->type; + + /* Change state to STATE_TRANSVR_INIT */ + self->state = STATE_TRANSVR_INIT; + self->type = new_type; + /* Replace EEPROME map */ + new_map_p = get_eeprom_map(new_type); + if (!new_map_p){ + goto err_private_reload_func_1; + } + self->eeprom_map_p = new_map_p; + /* Reload i2c client */ + if (setup_i2c_client(self) < 0){ + goto err_private_reload_func_2; + } + /* Replace call back functions */ + if (setup_transvr_public_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + if (setup_transvr_private_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + if(old_i2c_p){ + i2c_put_adapter(old_i2c_p->adapter); + } + kfree(old_i2c_p); + return 0; + +err_private_reload_func_3: + SWPS_INFO("%s: init() fail!\n", __func__); + if(old_i2c_p){ + i2c_put_adapter(old_i2c_p->adapter); + } + kfree(old_i2c_p); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return -2; + +err_private_reload_func_2: + self->eeprom_map_p = old_map_p; + self->i2c_client_p = old_i2c_p; +err_private_reload_func_1: + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = old_type; + SWPS_INFO("%s fail! :0x%02x\n", __func__, new_type); + return -1; +} + + +static int +reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + int result_val = ERR_TRANSVR_UNEXCPT; + + /* Reload phase */ + result_val = _reload_transvr_obj(self, new_type); + if (result_val < 0){ + SWPS_INFO("%s: reload phase fail! :%d\n", + __func__, result_val); + return EVENT_TRANSVR_RELOAD_FAIL; + } + /* Initial phase */ + result_val = _transvr_init_handler(self); + if (result_val < 0){ + SWPS_INFO("%s: initial phase fail! :%d\n", + __func__, result_val); + } + return result_val; +} + + +int +isolate_transvr_obj(struct transvr_obj_s *self) { + + self->state = STATE_TRANSVR_ISOLATED; + _isolate_send_uevent(self); + SWPS_INFO("%s: %s be isolated\n", __func__, self->swp_name); + return 0; +} +EXPORT_SYMBOL(isolate_transvr_obj); + + +int +resync_channel_tier_2(struct transvr_obj_s *self) { + + int val = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_ISOLATED) { + return 0; + } + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + val = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (val < 0) { + return -1; + } + return 0; +} +EXPORT_SYMBOL(resync_channel_tier_2); + +/* For build single module using (Ex: ONL platform) */ +MODULE_LICENSE("GPL"); + + +/* ----------------------------------------- + * ToDo List + * ----------------------------------------- + * 1. _sfp_detect_class_by_feature() + * => Need check ACC use case. + * 2. _sfp_detect_class_by_1g_ethernet() + * => Need check 0.1G use case. + * 3. Loopback transceiver use case. + * => Less much data + * 4. _qsfp_detect_class_by_extend_comp() + * => Verify 100G CWDM4 + * => Verify Obsolete (assigned before 100G CWDM4 MSA required FEC) + * => Verify 100G CLR4 + * => Verify 100GE-DWDM2 + * => Verify 40G PSM4 Parallel SMF + * => Verify 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. + * => Verify 100G ACC or 25GAUI C2M ACC. + * => Verify 25GBASE-LR + * => Verify 40G Active Cable (XLPPI) + */ + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/transceiver.h b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/transceiver.h new file mode 100644 index 00000000000..935c72d14cc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/transceiver.h @@ -0,0 +1,1043 @@ +#ifndef TRANSCEIVER_H +#define TRANSCEIVER_H + +#include + +/* advanced features control */ +#define TRANSVR_INFO_DUMP_ENABLE (1) +#define TRANSVR_INFO_CACHE_ENABLE (1) +#define TRANSVR_UEVENT_ENABLE (1) + +/* Transceiver type define */ +#define TRANSVR_TYPE_UNKNOW_1 (0x00) +#define TRANSVR_TYPE_UNKNOW_2 (0xff) +#define TRANSVR_TYPE_SFP (0x03) /* Define for SFP, SFP+, SFP28 */ +#define TRANSVR_TYPE_QSFP (0x0c) +#define TRANSVR_TYPE_QSFP_PLUS (0x0d) +#define TRANSVR_TYPE_QSFP_28 (0x11) +#define TRANSVR_TYPE_UNPLUGGED (0xfa) /* Define for ERROR handle */ +#define TRANSVR_TYPE_FAKE (0xfc) /* Define for ERROR handle */ +#define TRANSVR_TYPE_INCONSISTENT (0xfd) /* Define for ERROR handle */ +#define TRANSVR_TYPE_ERROR (0xfe) /* Define for ERROR handle */ + +/* Transceiver class for base info */ +#define TRANSVR_CLASS_UNSPECIFIED (0) +#define TRANSVR_CLASS_ERROR (-26001) +#define TRANSVR_CLASS_1G (26001) +#define TRANSVR_CLASS_10G (26011) +#define TRANSVR_CLASS_25G (26021) +#define TRANSVR_CLASS_40G (26041) +#define TRANSVR_CLASS_100G (26101) +#define TRANSVR_CLASS_NO_SPERARABLE (26901) +#define TRANSVR_CLASS_EXTEND_COMP (26902) +/* Transceiver class for Optical 1G */ +#define TRANSVR_CLASS_OPTICAL (27000) +#define TRANSVR_CLASS_OPTICAL_100 (27001) +#define TRANSVR_CLASS_OPTICAL_1G (27002) +#define TRANSVR_CLASS_OPTICAL_1G_AOC (27003) +#define TRANSVR_CLASS_OPTICAL_1G_SX (27004) +#define TRANSVR_CLASS_OPTICAL_1G_LX (27005) +#define TRANSVR_CLASS_OPTICAL_1G_EX (27006) +/* Transceiver class for Optical 10G */ +#define TRANSVR_CLASS_OPTICAL_10G (27010) +#define TRANSVR_CLASS_OPTICAL_10G_S_AOC (27011) +#define TRANSVR_CLASS_OPTICAL_10G_S_SR (27012) +#define TRANSVR_CLASS_OPTICAL_10G_S_LR (27013) +#define TRANSVR_CLASS_OPTICAL_10G_S_ER (27014) +#define TRANSVR_CLASS_OPTICAL_10G_Q_AOC (27015) +#define TRANSVR_CLASS_OPTICAL_10G_Q_SR (27016) +#define TRANSVR_CLASS_OPTICAL_10G_Q_LR (27017) +#define TRANSVR_CLASS_OPTICAL_10G_Q_ER (27018) +/* Transceiver class for Optical 25G */ +#define TRANSVR_CLASS_OPTICAL_25G (27020) +#define TRANSVR_CLASS_OPTICAL_25G_AOC (27021) +#define TRANSVR_CLASS_OPTICAL_25G_SR (27022) +#define TRANSVR_CLASS_OPTICAL_25G_LR (27023) +#define TRANSVR_CLASS_OPTICAL_25G_ER (27024) +/* Transceiver class for Optical 40G */ +#define TRANSVR_CLASS_OPTICAL_40G (27040) +#define TRANSVR_CLASS_OPTICAL_40G_AOC (27041) +#define TRANSVR_CLASS_OPTICAL_40G_SR4 (27042) +#define TRANSVR_CLASS_OPTICAL_40G_LR4 (27043) +#define TRANSVR_CLASS_OPTICAL_40G_ER4 (27044) +/* Transceiver class for Optical 100G */ +#define TRANSVR_CLASS_OPTICAL_100G (27100) +#define TRANSVR_CLASS_OPTICAL_100G_AOC (27101) +#define TRANSVR_CLASS_OPTICAL_100G_SR4 (27102) +#define TRANSVR_CLASS_OPTICAL_100G_LR4 (27103) +#define TRANSVR_CLASS_OPTICAL_100G_ER4 (27104) +#define TRANSVR_CLASS_OPTICAL_100G_PSM4 (27105) +/* Transceiver class for Copper */ +#define TRANSVR_CLASS_COPPER (28000) +#define TRANSVR_CLASS_COPPER_L1_1G (28001) +#define TRANSVR_CLASS_COPPER_L1_10G (28011) +#define TRANSVR_CLASS_COPPER_L4_10G (28012) +#define TRANSVR_CLASS_COPPER_L1_25G (28021) +#define TRANSVR_CLASS_COPPER_L4_40G (28041) +#define TRANSVR_CLASS_COPPER_L4_100G (28101) +/* Transceiver class for Base-T */ +#define TRANSVR_CLASS_BASE_T_1000 (29001) +#define TRANSVR_CLASS_BASE_T_1000_up (29002) +/* For uevent message */ +#define TRANSVR_UEVENT_KEY_IF "IF_TYPE" +#define TRANSVR_UEVENT_KEY_SP "IF_SPEED" +#define TRANSVR_UEVENT_KEY_LANE "IF_LANE" +#define TRANSVR_UEVENT_UNKNOW "UNKNOW" +#define TRANSVR_UEVENT_ISOLATED "ISOLATED" +#define TRANSVR_IF_KR "KR" +#define TRANSVR_IF_KR4 "KR4" +#define TRANSVR_IF_SR "SR" +#define TRANSVR_IF_SR4 "SR4" +#define TRANSVR_IF_SFI "SFI" +#define TRANSVR_IF_IF_GMII "GMII" +#define TRANSVR_IF_IF_XGMII "XGMII" +#define TRANSVR_IF_SP_100 "100" +#define TRANSVR_IF_SP_1G "1000" +#define TRANSVR_IF_SP_10G "10000" +#define TRANSVR_IF_SP_25G "25000" +#define TRANSVR_IF_SP_40G "40000" +#define TRANSVR_IF_SP_100G "100000" + +/* Transceiver mode define */ +#define TRANSVR_MODE_DIRECT (21000) +#define TRANSVR_MODE_POLLING (21001) + +/* Transceiver state define + * [Note] + * 1. State is used to represent the state of "Transceiver" and "Object". + * 2. State for different target has different means. The description as following: + */ +#define STATE_TRANSVR_CONNECTED (0) /* [Transvr]:Be plugged in. [Obj]:Link up, and work normally. */ +#define STATE_TRANSVR_NEW (-100) /* [Transvr]:(Not used) [Obj]:Create */ +#define STATE_TRANSVR_INIT (-101) /* [Transvr]:Be plugged in. [Obj]:Link up, and in initial process. */ +#define STATE_TRANSVR_ISOLATED (-102) /* [Transvr]:Be plugged in. [Obj]:Isolate, and not provide service. */ +#define STATE_TRANSVR_SWAPPED (-200) /* [Transvr]:Be plugged in. [Obj]:(Not used) */ +#define STATE_TRANSVR_DISCONNECTED (-300) /* [Transvr]:Un-plugged. [Obj]:Link down, and not provide service. */ +#define STATE_TRANSVR_UNEXCEPTED (-901) /* [Transvr]:Any [Obj]:Any, and not in expect case. */ + +/* Task state define */ +#define STATE_T_TASK_WAIT (110) +#define STATE_T_TASK_DONE (0) +#define STATE_T_TASK_INIT (-110) +#define STATE_T_TASK_FAIL (-410) + + +/* Event for task handling */ +#define EVENT_TRANSVR_TASK_WAIT (2101) +#define EVENT_TRANSVR_TASK_DONE (0) +#define EVENT_TRANSVR_TASK_FAIL (-2101) +/* Event for initial handling */ +#define EVENT_TRANSVR_INIT_UP (2201) +#define EVENT_TRANSVR_INIT_DOWN (1) +#define EVENT_TRANSVR_INIT_REINIT (-2201) +#define EVENT_TRANSVR_INIT_FAIL (-2202) +/* Event for others */ +#define EVENT_TRANSVR_RELOAD_FAIL (-2301) +#define EVENT_TRANSVR_EXCEP_INIT (-2401) +#define EVENT_TRANSVR_EXCEP_UP (-2402) +#define EVENT_TRANSVR_EXCEP_DOWN (-2403) +#define EVENT_TRANSVR_EXCEP_SWAP (-2404) +#define EVENT_TRANSVR_EXCEP_EXCEP (-2405) +#define EVENT_TRANSVR_EXCEP_ISOLATED (-2406) +#define EVENT_TRANSVR_I2C_CRASH (-2501) + +/* Transceiver error code define */ +#define ERR_TRANSVR_UNINIT (-201) +#define ERR_TRANSVR_UNPLUGGED (-202) +#define ERR_TRANSVR_ABNORMAL (-203) +#define ERR_TRANSVR_NOSTATE (-204) +#define ERR_TRANSVR_NOTSUPPORT (-205) +#define ERR_TRANSVR_BADINPUT (-206) +#define ERR_TRANSVR_UPDATE_FAIL (-207) +#define ERR_TRANSVR_RELOAD_FAIL (-208) +#define ERR_TRANSVR_INIT_FAIL (-209) +#define ERR_TRANSVR_UNDEFINED (-210) +#define ERR_TRANSVR_TASK_FAIL (-211) +#define ERR_TRANSVR_TASK_BUSY (-212) +#define ERR_TRANSVR_UEVENT_FAIL (-213) +#define ERR_TRANSVR_FUNC_DISABLE (-214) +#define ERR_TRANSVR_I2C_CRASH (-297) +#define ERR_TRNASVR_BE_ISOLATED (-298) +#define ERR_TRANSVR_UNEXCPT (-299) + +/* For debug */ +#define DEBUG_TRANSVR_INT_VAL (-99) +#define DEBUG_TRANSVR_HEX_VAL (0xfe) +#define DEBUG_TRANSVR_STR_VAL "ERROR" + +/* For system internal */ +#define VAL_TRANSVR_COMID_ARREESS (0x50) +#define VAL_TRANSVR_COMID_OFFSET (0x00) +#define VAL_TRANSVR_EXTPHY_ADDR_56 (0x56) +#define VAL_TRANSVR_8472_READY_ADDR (0x51) +#define VAL_TRANSVR_8472_READY_PAGE (-1) +#define VAL_TRANSVR_8472_READY_OFFSET (110) +#define VAL_TRANSVR_8472_READY_BIT (0) +#define VAL_TRANSVR_8472_READY_VALUE (0) +#define VAL_TRANSVR_8472_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_READY_ADDR (0x50) +#define VAL_TRANSVR_8436_READY_PAGE (-1) +#define VAL_TRANSVR_8436_READY_OFFSET (2) +#define VAL_TRANSVR_8436_READY_BIT (0) +#define VAL_TRANSVR_8436_READY_VALUE (0) +#define VAL_TRANSVR_8436_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_PWD_ADDR (0x50) +#define VAL_TRANSVR_8436_PWD_PAGE (-1) +#define VAL_TRANSVR_8436_PWD_OFFSET (123) +#define VAL_TRANSVR_PAGE_FREE (-99) +#define VAL_TRANSVR_PAGE_SELECT_OFFSET (127) +#define VAL_TRANSVR_PAGE_SELECT_DELAY (5) +#define VAL_TRANSVR_TASK_RETRY_FOREVER (-999) +#define VAL_TRANSVR_FUNCTION_DISABLE (-1) +#define STR_TRANSVR_SFP "SFP" +#define STR_TRANSVR_QSFP "QSFP" +#define STR_TRANSVR_QSFP_PLUS "QSFP+" +#define STR_TRANSVR_QSFP28 "QSFP28" + +/* For transvr buf len */ +#define LEN_TRANSVR_S_STR (16) +#define LEN_TRANSVR_M_STR (32) +#define LEN_TRANSVR_L_STR (64) + +/* Optical wavelength */ +#define VAL_OPTICAL_WAVELENGTH_SR (850) +#define VAL_OPTICAL_WAVELENGTH_LR (1310) +#define VAL_OPTICAL_WAVELENGTH_ER (1550) + +/* BCM chip type define */ +#define BCM_CHIP_TYPE_TRIDENT_2 (31001) /* Magnolia, Hudson32i, Spruce */ +#define BCM_CHIP_TYPE_TOMAHAWK (31002) /* Redwood, Cypress, Sequoia */ +#define BCM_CHIP_TYPE_TRIDENT_3 (31003) /* Maple */ + +#define BF_CHIP_TYPE_TOFINO (31011) /* Lavender */ + +/* Info from transceiver EEPROM */ +struct eeprom_map_s { + int addr_br; int page_br; int offset_br; int length_br; + int addr_cdr; int page_cdr; int offset_cdr; int length_cdr; + int addr_comp_rev; int page_comp_rev; int offset_comp_rev; int length_comp_rev; + int addr_connector; int page_connector; int offset_connector; int length_connector; + int addr_diag_type; int page_diag_type; int offset_diag_type; int length_diag_type; + int addr_extbr; int page_extbr; int offset_extbr; int length_extbr; + int addr_ext_id; int page_ext_id; int offset_ext_id; int length_ext_id; + int addr_id; int page_id; int offset_id; int length_id; + int addr_eeprom; int page_eeprom; int offset_eeprom; int length_eeprom; + int addr_eeprom_a0; int page_eeprom_a0; int offset_eeprom_a0; int length_eeprom_a0; + int addr_eeprom_a2; int page_eeprom_a2; int offset_eeprom_a2; int length_eeprom_a2; + int addr_eeprom_page03;int page_eeprom_page03;int offset_eeprom_page03;int length_eeprom_page03; + int addr_len_sm; int page_len_sm; int offset_len_sm; int length_len_sm; + int addr_len_smf; int page_len_smf; int offset_len_smf; int length_len_smf; + int addr_len_om1; int page_len_om1; int offset_len_om1; int length_len_om1; + int addr_len_om2; int page_len_om2; int offset_len_om2; int length_len_om2; + int addr_len_om3; int page_len_om3; int offset_len_om3; int length_len_om3; + int addr_len_om4; int page_len_om4; int offset_len_om4; int length_len_om4; + int addr_option; int page_option; int offset_option; int length_option; + int addr_rate_id; int page_rate_id; int offset_rate_id; int length_rate_id; + int addr_rx_am; int page_rx_am; int offset_rx_am; int length_rx_am; + int addr_rx_em; int page_rx_em; int offset_rx_em; int length_rx_em; + int addr_rx_los; int page_rx_los; int offset_rx_los; int length_rx_los; + int addr_rx_power; int page_rx_power; int offset_rx_power; int length_rx_power; + int addr_soft_rs0; int page_soft_rs0; int offset_soft_rs0; int length_soft_rs0; + int addr_soft_rs1; int page_soft_rs1; int offset_soft_rs1; int length_soft_rs1; + int addr_temp; int page_temp; int offset_temp; int length_temp; + int addr_trancomp; int page_trancomp; int offset_trancomp; int length_trancomp; + int addr_trancomp_ext; int page_trancomp_ext; int offset_trancomp_ext; int length_trancomp_ext; + int addr_tx_bias; int page_tx_bias; int offset_tx_bias; int length_tx_bias; + int addr_tx_disable; int page_tx_disable; int offset_tx_disable; int length_tx_disable; + int addr_tx_eq; int page_tx_eq; int offset_tx_eq; int length_tx_eq; + int addr_tx_fault; int page_tx_fault; int offset_tx_fault; int length_tx_fault; + int addr_tx_power; int page_tx_power; int offset_tx_power; int length_tx_power; + int addr_vendor_name; int page_vendor_name; int offset_vendor_name; int length_vendor_name; + int addr_vendor_pn; int page_vendor_pn; int offset_vendor_pn; int length_vendor_pn; + int addr_vendor_rev; int page_vendor_rev; int offset_vendor_rev; int length_vendor_rev; + int addr_vendor_sn; int page_vendor_sn; int offset_vendor_sn; int length_vendor_sn; + int addr_voltage; int page_voltage; int offset_voltage; int length_voltage; + int addr_wavelength; int page_wavelength; int offset_wavelength; int length_wavelength; + int addr_alarm_flag_byte_1; int page_alarm_flag_byte_1; int offset_alarm_flag_byte_1; int length_alarm_flag_byte_1; + int addr_alarm_flag_byte_2; int page_alarm_flag_byte_2; int offset_alarm_flag_byte_2; int length_alarm_flag_byte_2; + int addr_temp_alarm; int page_temp_alarm; int offset_temp_alarm; int length_temp_alarm; + int addr_voltage_alarm; int page_voltage_alarm; int offset_voltage_alarm; int length_voltage_alarm; + int addr_bias_alarm; int page_bias_alarm; int offset_bias_alarm; int length_bias_alarm; + int addr_tx_power_alarm; int page_tx_power_alarm; int offset_tx_power_alarm; int length_tx_power_alarm; + int addr_rx_power_alarm; int page_rx_power_alarm; int offset_rx_power_alarm; int length_rx_power_alarm; + int addr_temp_high_alarm_threshold; int page_temp_high_alarm_threshold; int offset_temp_high_alarm_threshold; int length_temp_high_alarm_threshold; + int addr_temp_low_alarm_threshold; int page_temp_low_alarm_threshold; int offset_temp_low_alarm_threshold; int length_temp_low_alarm_threshold; + int addr_voltage_high_alarm_threshold; int page_voltage_high_alarm_threshold; int offset_voltage_high_alarm_threshold; int length_voltage_high_alarm_threshold; + int addr_voltage_low_alarm_threshold; int page_voltage_low_alarm_threshold; int offset_voltage_low_alarm_threshold; int length_voltage_low_alarm_threshold; + int addr_bias_high_alarm_threshold; int page_bias_high_alarm_threshold; int offset_bias_high_alarm_threshold; int length_bias_high_alarm_threshold; + int addr_bias_low_alarm_threshold; int page_bias_low_alarm_threshold; int offset_bias_low_alarm_threshold; int length_bias_low_alarm_threshold; + int addr_tx_power_high_alarm_threshold; int page_tx_power_high_alarm_threshold; int offset_tx_power_high_alarm_threshold; int length_tx_power_high_alarm_threshold; + int addr_tx_power_low_alarm_threshold; int page_tx_power_low_alarm_threshold; int offset_tx_power_low_alarm_threshold; int length_tx_power_low_alarm_threshold; + int addr_rx_power_high_alarm_threshold; int page_rx_power_high_alarm_threshold; int offset_rx_power_high_alarm_threshold; int length_rx_power_high_alarm_threshold; + int addr_rx_power_low_alarm_threshold; int page_rx_power_low_alarm_threshold; int offset_rx_power_low_alarm_threshold; int length_rx_power_low_alarm_threshold; + int addr_manufacturing_date; int page_manufacturing_date; int offset_manufacturing_date; int length_manufacturing_date; +}; + + +struct transvr_worker_s; + +/* Class of transceiver object */ +struct transvr_obj_s { + /*io isr mode*/ + int port_id; + int detect_type_count; + /* ========== Object private property ========== + * [Prop]: id + * [Desc]: Type of serial transceiver. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh /QSFP28:11h + */ + uint8_t id; + + /* [Prop]: connector + * [Desc]: Connector type. + * [Note]: SFP : A0h / 2 + * QSFP: 00h / 130 + */ + uint8_t connector; + + /* [Prop]: transvr_comp + * [Desc]: Transceiver compliance code. + * [Note]: SFP: SFF-8472 + * - Normal : A0h / offset 3-10 + * - Extended: A0h / offset 36 + * QSFP: SFF-8436 & SFF-8636 + * - Normal : 00h / offset 131-138 + * - Extended: 00h / offset 192 + */ + uint8_t transvr_comp[8]; + uint8_t transvr_comp_ext; + + /* [Prop]: vendor_name + * [Desc]: SFP vendor name (ASCII 16 byte char). + * [Note]: ex:FINISAR CORP. + */ + char *vendor_name; + + /* [Prop]: vendor_pn + * [Desc]: Part number provided by SFP vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_pn; + + /* [Prop]: vendor_rev + * [Desc]: Revision level for part number provided by vendor (ASCII 4 byte char). + * [Note]: + */ + char *vendor_rev; + + /* [Prop]: vendor_sn + * [Desc]: Serial number provided by vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_sn; + + /* [Prop]: Extended identifier + * [Desc]: SFP: + * => None + * + * QSFP: + * => This byte contained two information: + * (1) Power consumption class + * (2) CDR function present + * [Note]: Bit description as below: + * [SFP] + * None + * + * [QSFP] + * (1) Power consumption class: + * Class 1: 1.5W (Bit6-7 = 00:) + * Class 2: 2.0W (Bit6-7 = 01:) + * Class 3: 2.5W (Bit6-7 = 10:) + * Class 4: 3.5W (Bit6-7 = 11:) + * Class 5: 4.0W (Bit0-1 = 01:) + * Class 6: 4.5W (Bit0-1 = 10:) + * Class 7: 5.0W (Bit0-1 = 11:) + * (2) CDR function present: + * Bit2: 0 = No CDR in RX + * 1 = CDR present in RX + * Bit3: 0 = No CDR in TX + * 1 = CDR present in TX + */ + uint8_t ext_id; + + /* [Prop]: br + * [Desc]: Nominal bit rate, units of 100 MBits/sec. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh + * has val: 0x67 + * no val : + */ + uint8_t br; + + /* [Prop]: extbr + * [Desc]: Extended br (00h/222) + * [Desc]: Nominal bit rate per channel, units of 250 Mbps. + * Complements. Byte 140. See Table 32A. + */ + uint8_t extbr; + + /* [Prop]: len_sm + * [Desc]: Length (single mode)-(100's)m + * [Note]: This value specifies the link length that is supported by the transceiver + * while operating in compliance with the applicable standards using single mode + * fiber. The value is in units of 100 meters. A value of 255 means that the + * transceiver supports a link length greater than 25.4 km. A value of zero means + * that the transceiver does not support single mode fiber or that the length + * information must be determined from the transceiver technology. + */ + int len_sm; + + /* [Prop]: len_smf + * [Desc]: Length (single mode)-km + * [Note]: Addition to EEPROM data from original GBIC definition. This value specifies + * the link length that is supported by the transceiver while operating in + * compliance with the applicable standards using single mode fiber. The value + * is in units of kilometers. A value of 255 means that the transceiver supports + * a link length greater than 254 km. A value of zero means that the transceiver + * does not support single mode fiber or that the length information must be + * determined from the transceiver technology. + */ + int len_smf; + + /* [Prop]: len_om1 + * [Desc]: Link length supported for 62.5 um OM1 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om1; + + /* [Prop]: len_om2 + * [Desc]: Link length supported for 50 um OM2 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om2; + + /* [Prop]: len_om3 + * [Desc]: Length (50um, OM3) + * [Note]: This value specifies link length that is supported by the transceiver while + * operating in compliance with applicable standards using 50 micron multimode + * OM3 [2000 MHz*km] fiber. The value is in units of 10 meters. A value of 255 + * means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber + * or that the length information must be determined from the transceiver technology. + */ + int len_om3; + + /* [Prop]: len_om4 + * [Desc]: Length (50um, OM4) and Length (Active Cable or Copper) + * [Note]: For optical links, this value specifies link length that is supported by the + * transceiver while operating in compliance with applicable standards using 50 micron + * multimode OM4 [4700 MHz*km] fiber. The value is in units of 10 meters. A value of + * 255 means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber or that + * the length information must be determined from the transceiver codes specified in Table 5-3. + * + * For copper links, this value specifies minimum link length supported by the transceiver + * while operating in compliance with applicable standards using copper cable. For active + * cable, this value represents actual length. The value is in units of 1 meter. A value of 255 + * means the transceiver supports a link length greater than 254 meters. A value of zero means + * the transceiver does not support copper or active cables or the length information must be + * determined from transceiver technology. Further information about cable design, equalization, + * and connectors is usually required to guarantee meeting a particular length requirement. + */ + int len_om4; + + /* [Prop]: comp_rev + * [Desc]: SFF spec revision compliance + * [Note]: Indicates which revision of SFF SFF-8472 (SFP) / SFF-8636 (QSFP) the transceiver + * complies with. (unsigned integer) + */ + uint8_t comp_rev; + + /* [Prop]: CDR + * [Desc]: For transceivers with CDR capability, setting the CDR to ON engages the internal + * retiming function. Setting the CDR to OFF enables an internal bypassing mode ,which + * directs traffic around the internal CDR. (Reference: SFF-8636) + * [Note]: value=0xff: ON. + * value=0x00: OFF. + */ + uint8_t cdr; + + /* [Prop]: rate_id + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Addr: A0h / Offset: 13 + * 2. Value description: + * 00h Unspecified + * 01h SFF-8079 (4/2/1G Rate_Select & AS0/AS1) + * 02h SFF-8431 (8/4/2G Rx Rate_Select only) + * 03h Unspecified * + * 04h SFF-8431 (8/4/2G Tx Rate_Select only) + * 05h Unspecified * + * 06h SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) + * 07h Unspecified * + * 08h FC-PI-5 (16/8/4G Rx Rate_select only) High=16G only, Low=8G/4G + * 09h Unspecified * + * 0Ah FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) High=16G only, + * Low=8G/4G + * 0Bh Unspecified * + * 0Ch FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + * 0Dh Unspecified * + * 0Eh 10/8G Rx and Tx Rate_Select controlling the operation or locking + * modes of the internal signal conditioner, retimer or CDR, according + * to the logic table defined in Table 10-2, High Bit Rate + * (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = 8.5 Gb/s. In this mode, + * the default value of bit 110.3 (Soft Rate Select RS(0), Table 9-11) + * and of bit 118.3 (Soft Rate Select RS(1), Table 10-1) is 1. + * 0Fh Unspecified * + * 10h-FFh Unallocated + */ + int rate_id; + + /* [Prop]: soft_rs0 + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Writing '1' selects full bandwidth operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(0) or RS(0) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 110 / Bit: 3 + */ + uint8_t soft_rs0; + + /* [Prop]: soft_rs1 + * [Desc]: Soft Rate Select 1(TX). + * [Note]: 1. Writing '1' selects full bandwidth TX operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(1) or RS(1) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 118 / Bit: 3 + */ + uint8_t soft_rs1; + + /* [Prop]: diag_type + * [Desc]: DIAGNOSTIC MONITORING TYPE (A0h/92) + * [Note]: Description in SFF-8472 as below: + * Bit7: Reserved for legacy diagnostic implementations. Must be '0' for compliance + * with this document. + * Bit6: Digital diagnostic monitoring implemented (described in this document). + * Must be '1' for compliance with this document. + * Bit5 Internally calibrated + * Bit4 Externally calibrated + * Bit3 Received power measurement type.0 = OMA, 1 = average power + * Bit2 Address change required see section above, "addressing modes" + * Bit1-0 Unallocated + */ + uint8_t diag_type; + + /* [Prop]: curr_temp + * [Desc]: Transceiver Current Temperature (A2h/96-97) + * [Note]: 1. Dependent on diag_type. + * 2. 96: High byte + * 3. 97: Low byte + * 4. This feature only for SFP + */ + uint8_t curr_temp[2]; + + /* [Prop]: curr_vol + * [Desc]: Transceiver Current Voltage (SFP:A2h/108-109; QSFP:00h/22-23) + * [Note]: 1. Dependent on diag_type. + * 2. 98: High byte + * 3. 99: Low byte + * 4. This feature only for SFP + * 5. Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts + */ + uint8_t curr_voltage[2]; + + /* [Prop]: curr_tx_bias + * [Desc]: Transceiver TX Bias Current (SFP:A2h/100-101; QSFP:00h/26-27) + * [Note]: 1. Dependent on diag_type. + * 2. 100: High byte + * 3. 101: Low byte + * 4. This feature only for SFP + * 5. Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + uint8_t curr_tx_bias[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + uint8_t curr_tx_power[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + uint8_t curr_rx_power[8]; + + /* [Prop]: wavelength + * [Desc]: Wavelength or Copper Cable Attenuation + * [Note]: (Following is info from SFF-8636) + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is a + * 16-bit hex value with Byte 186 as high order byte and Byte 187 as low + * order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. If the free side device is identified as + * copper cable these registers will be used to define the cable attenuation. + * An indication of 0 dB attenuation refers to the case where the attenuation + * is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + uint8_t wavelength[2]; + + /* [Prop]: Amplitude control + * [Desc]: Amplitude control + * [Note]: QSFP28 => SFF-8636 03H Byte-238/239 + */ + uint8_t rx_am[2]; + + /* [Prop]: Emphasis control + * [Desc]: Emphasis control + * [Note]: SFP+/28 => SFF-8472 A2H Byte-115 + * QSFP28 => SFF-8636 03H Byte-236/237 + */ + uint8_t rx_em[2]; + + /* [Prop]: Soft Rx LOS + * [Desc]: Soft Rx LOS which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 3: + * - Bit 0: L-Rx1 LOS + * - Bit 1: L-Rx2 LOS + * - Bit 2: L-Rx3 LOS + * - Bit 3: L-Rx4 LOS + */ + uint8_t rx_los; + + /* [Prop]: Soft Tx Disable + * [Desc]: Soft Tx Disable which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Disable + * - Bit 1: Tx2 Disable + * - Bit 2: Tx3 Disable + * - Bit 3: Tx4 Disable + */ + uint8_t tx_disable; + + /* [Prop]: Soft Tx Fault + * [Desc]: Soft Tx Fault which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 4: + * - Bit 0: Tx1 Fault + * - Bit 1: Tx2 Fault + * - Bit 2: Tx3 Fault + * - Bit 3: Tx4 Fault + */ + uint8_t tx_fault; + + /* [Prop]: Transceiver EQUALIZATION + * [Desc]: Transceiver EQUALIZATION + * [Note]: SFP+/28 => SFF-8472 A2H Byte-114 + * QSFP28 => SFF-8636 03H Byte-234/235 + */ + uint8_t tx_eq[2]; + + /* [Prop]: OPTION VALUES + * [Desc]: The bits in the option field shall specify the options implemented in the transceiver. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-64/65 + * QSFP+/28 => SFF-8636 00H Byte-193/195 + */ + uint8_t option[3]; + + /* [Prop]: External PHY offset + * [Desc]: It needs to be setup first if you want to access transceiver external phy. + * [Note]: This feature dependent on transceiver. + * Currently, only 1G-RJ45 transceiver supported it. + */ + uint8_t extphy_offset; + + /* [Prop]: EEPROM information + * [Desc]: Dump the original EERPOM hex code. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-0~255 + * QSFP28 => SFF-8636 P0H Byte-0~255 + */ + uint8_t eeprom[256]; + + /* [Prop]: EEPROM information + * [Desc]: Dump the original EERPOM hex code of SFP A0H. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-0~127 + */ + uint8_t eeprom_a0[128]; + + /* [Prop]: EEPROM information + * [Desc]: Dump the original EERPOM hex code of SFP A2H. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-0~127 + */ + uint8_t eeprom_a2[128]; + + /* [Prop]: EEPROM information + * [Desc]: Dump the original EERPOM hex code of QSFP Page 03. + * [Note]: QSFP28 => SFF-8636 P3H Byte-0~127 + */ + uint8_t eeprom_page03[128]; + + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-112 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + * Vcc High Alarm Bit-5 + * Vcc Low Alarm Bit-4 + * Tx Bias High Alarm Bit-3 + * Tx Bias Low Alarm Bit-2 + * Tx Power High Alarm Bit-1 + * Tx Power Low Alarm Bit-0 + */ + uint8_t alarm_flag_byte_1; + + /* [Prop]: SFP Alarm Flag bit + * [Desc]: SFP Alarm Flag bit + * [Note]: SFP+/28 => SFF-8472 A2H Byte-113 + * Rx Power High Alarm Bit-7 + * Rx Power Low Alarm Bit-6 + */ + uint8_t alarm_flag_byte_2; + + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP Temp Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-6 + * Temp High Alarm Bit-7 + * Temp Low Alarm Bit-6 + */ + uint8_t temp_alarm; + + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP voltage Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-7 + * voltage High Alarm Bit-7 + * voltage Low Alarm Bit-6 + */ + uint8_t voltage_alarm; + + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP RX Power Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-9~10 + * RX1 Power High Alarm Byte-9 Bit-7 + * RX1 Power Low Alarm Byte-9 Bit-6 + * RX2 Power High Alarm Byte-9 Bit-3 + * RX2 Power Low Alarm Byte-9 Bit-2 + * RX3 Power High Alarm Byte-10 Bit-7 + * RX3 Power Low Alarm Byte-10 Bit-6 + * RX4 Power High Alarm Byte-10 Bit-3 + * RX4 Power Low Alarm Byte-10 Bit-2 + */ + uint8_t rx_power_alarm[2]; + + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP TX bias Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-11~12 + * TX1 bias High Alarm Byte-11 Bit-7 + * TX1 bias Low Alarm Byte-11 Bit-6 + * TX2 bias High Alarm Byte-11 Bit-3 + * TX2 bias Low Alarm Byte-11 Bit-2 + * TX3 bias High Alarm Byte-12 Bit-7 + * TX3 bias Low Alarm Byte-12 Bit-6 + * TX4 bias High Alarm Byte-12 Bit-3 + * TX4 bias Low Alarm Byte-12 Bit-2 + */ + uint8_t bias_alarm[2]; + + /* [Prop]: QSFP Alarm Flag bit + * [Desc]: QSFP TX Power Alarm Flag bit + * [Note]: QSFP+/28 => SFF-8636 Page 00H Byte-13~14 + * TX1 Power High Alarm Byte-13 Bit-7 + * TX1 Power Low Alarm Byte-13 Bit-6 + * TX2 Power High Alarm Byte-13 Bit-3 + * TX2 Power Low Alarm Byte-13 Bit-2 + * TX3 Power High Alarm Byte-14 Bit-7 + * TX3 Power Low Alarm Byte-14 Bit-6 + * TX4 Power High Alarm Byte-14 Bit-3 + * TX4 Power Low Alarm Byte-14 Bit-2 + */ + uint8_t tx_power_alarm[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver temperature high alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-0~1 + * QSFP28 => SFF-8636 P3H Byte-128~129 + */ + uint8_t temp_high_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver temperature low alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-2~3 + * QSFP28 => SFF-8636 P3H Byte-130~131 + */ + uint8_t temp_low_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver voltage high alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-8~9 + * QSFP28 => SFF-8636 P3H Byte-144~145 + */ + uint8_t voltage_high_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver voltage low alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-10~11 + * QSFP28 => SFF-8636 P3H Byte-146~147 + */ + uint8_t voltage_low_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver TX bias high alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-16~17 + * QSFP28 => SFF-8636 P3H Byte-184~185 + */ + uint8_t bias_high_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver TX bias low alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-18~19 + * QSFP28 => SFF-8636 P3H Byte-186~187 + */ + uint8_t bias_low_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver TX power high alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-24~25 + * QSFP28 => SFF-8636 P3H Byte-192~193 + */ + uint8_t tx_power_high_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver TX power low alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-26~27 + * QSFP28 => SFF-8636 P3H Byte-194~195 + */ + uint8_t tx_power_low_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver RX power high alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-36~37 + * QSFP28 => SFF-8636 P3H Byte-176~177 + */ + uint8_t rx_power_high_alarm_threshold[2]; + + /* [Prop]: Alarm thresholds + * [Desc]: Transceiver RX power low alarm threshold. + * [Note]: SFP+/28 => SFF-8472 A2H Byte-38~39 + * QSFP28 => SFF-8636 P3H Byte-178~179 + */ + uint8_t rx_power_low_alarm_threshold[2]; + + /* [Prop]: Date code + * [Desc]: Vendor's manufacturing date code. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-84~91 + * QSFP28 => SFF-8636 P0H Byte-212~219 + */ + uint8_t manufacturing_date[8]; + + /* ========== Object private property ========== + */ + struct device *transvr_dev_p; + struct eeprom_map_s *eeprom_map_p; + struct i2c_client *i2c_client_p; + struct ioexp_obj_s *ioexp_obj_p; + struct transvr_worker_s *worker_p; + struct mutex lock; + char swp_name[32]; + int auto_config; + int auto_tx_disable; + int chan_id; + int chipset_type; + int curr_page; + int info; + int ioexp_virt_offset; + int lane_id[8]; + int layout; + int mode; + int retry; + int state; + int temp; + int type; + + /* ========== Object public functions ========== + */ + int (*get_id)(struct transvr_obj_s *self); + int (*get_eeprom)(struct transvr_obj_s *self, char *buf_p); + int (*get_eeprom_a0)(struct transvr_obj_s *self, char *buf_p); + int (*get_eeprom_a2)(struct transvr_obj_s *self, char *buf_p); + int (*get_eeprom_page03)(struct transvr_obj_s *self, char *buf_p); + int (*get_ext_id)(struct transvr_obj_s *self); + int (*get_connector)(struct transvr_obj_s *self); + int (*get_vendor_name)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_pn)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_rev)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_sn)(struct transvr_obj_s *self, char *buf_p); + int (*get_power_cls)(struct transvr_obj_s *self); + int (*get_br)(struct transvr_obj_s *self); + int (*get_len_sm)(struct transvr_obj_s *self); + int (*get_len_smf)(struct transvr_obj_s *self); + int (*get_len_om1)(struct transvr_obj_s *self); + int (*get_len_om2)(struct transvr_obj_s *self); + int (*get_len_om3)(struct transvr_obj_s *self); + int (*get_len_om4)(struct transvr_obj_s *self); + int (*get_comp_rev)(struct transvr_obj_s *self); + int (*get_comp_eth_1)(struct transvr_obj_s *self); + int (*get_comp_eth_10)(struct transvr_obj_s *self); + int (*get_comp_eth_10_40)(struct transvr_obj_s *self); + int (*get_comp_extend)(struct transvr_obj_s *self); + int (*get_cdr)(struct transvr_obj_s *self); + int (*get_rate_id)(struct transvr_obj_s *self); + int (*get_soft_rs0)(struct transvr_obj_s *self); + int (*get_soft_rs1)(struct transvr_obj_s *self); + int (*get_info)(struct transvr_obj_s *self); + int (*get_if_type)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_speed)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_lane)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_temp)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_vol)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_rx_los)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_fault)(struct transvr_obj_s *self, char *buf_p); + int (*get_auto_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_bias)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_eq)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_am)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_em)(struct transvr_obj_s *self, char *buf_p); + int (*get_wavelength)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_offset)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_reg)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power_low_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power_high_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power_low_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power_high_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_bias_low_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_bias_high_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_voltage_low_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_voltage_high_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_temp_low_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_temp_high_alarm)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power_low_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power_high_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power_low_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power_high_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_bias_low_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_bias_high_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_voltage_low_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_voltage_high_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_temp_low_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_temp_high_alarm_threshold)(struct transvr_obj_s *self, char *buf_p); + int (*get_manufacturing_date)(struct transvr_obj_s *self, char *buf_p); + int (*set_cdr)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs0)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs1)(struct transvr_obj_s *self, int input_val); + int (*set_soft_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_auto_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_tx_eq)(struct transvr_obj_s *self, int input_val); + int (*set_rx_am)(struct transvr_obj_s *self, int input_val); + int (*set_rx_em)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_offset)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_reg)(struct transvr_obj_s *self, int input_val); + + /* ========== Object private functions ========== + */ + int (*init)(struct transvr_obj_s *self); + int (*clean)(struct transvr_obj_s *self); + int (*check)(struct transvr_obj_s *self); + int (*update_all)(struct transvr_obj_s *self, int show_err); + int (*fsm_4_direct)(struct transvr_obj_s* self, char *caller_name); + int (*fsm_4_polling)(struct transvr_obj_s* self, char *caller_name); + int (*send_uevent)(struct transvr_obj_s* self, enum kobject_action u_action); + int (*dump_all)(struct transvr_obj_s* self); +}; + + +/* For AVL Mapping */ +struct transvr_avl_s { + char vendor_name[32]; + char vendor_pn[32]; + int (*init)(struct transvr_obj_s *self); +}; + + +/* Worker for long term task of transceiver */ +struct transvr_worker_s { + /* Task Parameter */ + struct transvr_obj_s *transvr_p; + struct transvr_worker_s *next_p; + struct transvr_worker_s *pre_p; + unsigned long trigger_time; + char func_name[64]; + int retry; + int state; + + /* Task private data */ + void *p_data; + + /* Call back function */ + int (*main_task)(struct transvr_worker_s *task); + int (*post_task)(struct transvr_worker_s *task); +}; + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode, + int port_id); + +void lock_transvr_obj(struct transvr_obj_s *self); +void unlock_transvr_obj(struct transvr_obj_s *self); +int isolate_transvr_obj(struct transvr_obj_s *self); + +int resync_channel_tier_2(struct transvr_obj_s *self); + +void alarm_msg_2_user(struct transvr_obj_s *self, char *emsg); +int transvr_health_mtr(struct transvr_obj_s* self); +#endif /* TRANSCEIVER_H */ + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/ucd9000.c b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/ucd9000.c new file mode 100644 index 00000000000..3e3aa950277 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/modules/ucd9000.c @@ -0,0 +1,247 @@ +/* + * Hardware monitoring driver for UCD90xxx Sequencer and System Health + * Controller series + * + * Copyright (C) 2011 Ericsson AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "pmbus.h" + +enum chips { ucd9000, ucd90120, ucd90124, ucd90160, ucd9090, ucd90910 }; + +#define UCD9000_MONITOR_CONFIG 0xd5 +#define UCD9000_NUM_PAGES 0xd6 +#define UCD9000_FAN_CONFIG_INDEX 0xe7 +#define UCD9000_FAN_CONFIG 0xe8 +#define UCD9000_DEVICE_ID 0xfd + +#define UCD9000_MON_TYPE(x) (((x) >> 5) & 0x07) +#define UCD9000_MON_PAGE(x) ((x) & 0x0f) + +#define UCD9000_MON_VOLTAGE 1 +#define UCD9000_MON_TEMPERATURE 2 +#define UCD9000_MON_CURRENT 3 +#define UCD9000_MON_VOLTAGE_HW 4 + +#define UCD9000_NUM_FAN 4 + +struct ucd9000_data { + u8 fan_data[UCD9000_NUM_FAN][I2C_SMBUS_BLOCK_MAX]; + struct pmbus_driver_info info; +}; +#define to_ucd9000_data(_info) container_of(_info, struct ucd9000_data, info) + +static int ucd9000_get_fan_config(struct i2c_client *client, int fan) +{ + int fan_config = 0; + struct ucd9000_data *data + = to_ucd9000_data(pmbus_get_driver_info(client)); + + if (data->fan_data[fan][3] & 1) + fan_config |= PB_FAN_2_INSTALLED; /* Use lower bit position */ + + /* Pulses/revolution */ + fan_config |= (data->fan_data[fan][3] & 0x06) >> 1; + + return fan_config; +} + +static int ucd9000_read_byte_data(struct i2c_client *client, int page, int reg) +{ + int ret = 0; + int fan_config; + + switch (reg) { + case PMBUS_FAN_CONFIG_12: + if (page > 0) + return -ENXIO; + + ret = ucd9000_get_fan_config(client, 0); + if (ret < 0) + return ret; + fan_config = ret << 4; + ret = ucd9000_get_fan_config(client, 1); + if (ret < 0) + return ret; + fan_config |= ret; + ret = fan_config; + break; + case PMBUS_FAN_CONFIG_34: + if (page > 0) + return -ENXIO; + + ret = ucd9000_get_fan_config(client, 2); + if (ret < 0) + return ret; + fan_config = ret << 4; + ret = ucd9000_get_fan_config(client, 3); + if (ret < 0) + return ret; + fan_config |= ret; + ret = fan_config; + break; + default: + ret = -ENODATA; + break; + } + return ret; +} + +static const struct i2c_device_id ucd9000_id[] = { + {"ucd9000", ucd9000}, + {"ucd90120", ucd90120}, + {"ucd90124", ucd90124}, + {"ucd90160", ucd90160}, + {"ucd9090", ucd9090}, + {"ucd90910", ucd90910}, + {} +}; +MODULE_DEVICE_TABLE(i2c, ucd9000_id); + +static int ucd9000_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1]; + struct ucd9000_data *data; + struct pmbus_driver_info *info; + const struct i2c_device_id *mid; + int i, ret; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_BLOCK_DATA)) + return -ENODEV; + + ret = i2c_smbus_read_block_data(client, UCD9000_DEVICE_ID, + block_buffer); + if (ret < 0) { + dev_err(&client->dev, "Failed to read device ID\n"); + return ret; + } + block_buffer[ret] = '\0'; + dev_info(&client->dev, "Device ID %s\n", block_buffer); + + for (mid = ucd9000_id; mid->name[0]; mid++) { + if (!strncasecmp(mid->name, block_buffer, strlen(mid->name))) + break; + } + if (!mid->name[0]) { + dev_err(&client->dev, "Unsupported device\n"); + return -ENODEV; + } + + if (id->driver_data != ucd9000 && id->driver_data != mid->driver_data) + dev_notice(&client->dev, + "Device mismatch: Configured %s, detected %s\n", + id->name, mid->name); + + data = devm_kzalloc(&client->dev, sizeof(struct ucd9000_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + info = &data->info; + + ret = i2c_smbus_read_byte_data(client, UCD9000_NUM_PAGES); + if (ret < 0) { + dev_err(&client->dev, + "Failed to read number of active pages\n"); + return ret; + } + info->pages = ret; + if (!info->pages) { + dev_err(&client->dev, "No pages configured\n"); + return -ENODEV; + } + + /* The internal temperature sensor is always active */ + info->func[0] = PMBUS_HAVE_TEMP; + + /* Everything else is configurable */ + ret = i2c_smbus_read_block_data(client, UCD9000_MONITOR_CONFIG, + block_buffer); + if (ret <= 0) { + dev_err(&client->dev, "Failed to read configuration data\n"); + return -ENODEV; + } + for (i = 0; i < ret; i++) { + int page = UCD9000_MON_PAGE(block_buffer[i]); + + if (page >= info->pages) + continue; + + switch (UCD9000_MON_TYPE(block_buffer[i])) { + case UCD9000_MON_VOLTAGE: + case UCD9000_MON_VOLTAGE_HW: + info->func[page] |= PMBUS_HAVE_VOUT + | PMBUS_HAVE_STATUS_VOUT; + break; + case UCD9000_MON_TEMPERATURE: + info->func[page] |= PMBUS_HAVE_TEMP2 + | PMBUS_HAVE_STATUS_TEMP; + break; + case UCD9000_MON_CURRENT: + info->func[page] |= PMBUS_HAVE_IOUT + | PMBUS_HAVE_STATUS_IOUT; + break; + default: + break; + } + } + + /* Fan configuration */ + if (mid->driver_data == ucd90124) { + for (i = 0; i < UCD9000_NUM_FAN; i++) { + i2c_smbus_write_byte_data(client, + UCD9000_FAN_CONFIG_INDEX, i); + ret = i2c_smbus_read_block_data(client, + UCD9000_FAN_CONFIG, + data->fan_data[i]); + if (ret < 0) + return ret; + } + i2c_smbus_write_byte_data(client, UCD9000_FAN_CONFIG_INDEX, 0); + + info->read_byte_data = ucd9000_read_byte_data; + info->func[0] |= PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12 + | PMBUS_HAVE_FAN34 | PMBUS_HAVE_STATUS_FAN34; + } + + return pmbus_do_probe(client, mid, info); +} + +/* This is the driver that will be inserted */ +static struct i2c_driver ucd9000_driver = { + .driver = { + .name = "ucd9000", + }, + .probe = ucd9000_probe, + .remove = pmbus_do_remove, + .id_table = ucd9000_id, +}; + +module_i2c_driver(ucd9000_driver); + +MODULE_AUTHOR("Guenter Roeck"); +MODULE_DESCRIPTION("PMBus driver for TI UCD90xxx"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/setup.py b/platform/broadcom/sonic-platform-modules-inventec/d6356j/setup.py new file mode 100644 index 00000000000..0da6329545c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/setup.py @@ -0,0 +1,15 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='sonic_platform', + version='1.0', + description='Module to initialize Ivnetec D6356J platforms', + + packages=['sonic_platform'], +) + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/__init__.py new file mode 100644 index 00000000000..4bfefa0fb63 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/__init__.py @@ -0,0 +1,3 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import * + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/chassis.py new file mode 100644 index 00000000000..0e84eeebc98 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/chassis.py @@ -0,0 +1,182 @@ +#!/usr/bin/env python +# +# Name: chassis.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + import os + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.eeprom import Eeprom + from sonic_platform.fan import Fan + from sonic_platform.psu import Psu + from sonic_platform.sfp import Sfp + from sonic_platform.qsfp import QSfp + from sonic_platform.thermal import Thermal + from sonic_platform.transceiver_event import TransceiverEvent +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Chassis(ChassisBase): + + def __init__(self): + ChassisBase.__init__(self) + self.__num_of_fans = 4 + self.__num_of_psus = 2 + self.__num_of_sfps = 56 + self.__start_of_qsfp = 48 + self.__num_of_thermals = 5 + + # Initialize EEPROM + self._eeprom = Eeprom() + + # Initialize FAN + for index in range(1, self.__num_of_fans + 1): + fan = Fan(index, False, 0) + self._fan_list.append(fan) + + # Initialize PSU + for index in range(1, self.__num_of_psus + 1): + psu = Psu(index) + self._psu_list.append(psu) + + # Initialize SFP + for index in range(0, self.__num_of_sfps): + if index < self.__start_of_qsfp: + sfp = Sfp(index) + else: + sfp = QSfp(index) + self._sfp_list.append(sfp) + + # Initialize THERMAL + for index in range(0, self.__num_of_thermals): + thermal = Thermal(index) + self._thermal_list.append(thermal) + + # Initialize TRANSCEIVER EVENT MONITOR + self.__xcvr_event = TransceiverEvent() + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self._eeprom.modelstr() + + def get_presence(self): + """ + Retrieves the presence of the chassis + Returns: + bool: True if chassis is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the chassis + Returns: + string: Model/part number of chassis + """ + return self._eeprom.part_number_str() + + def get_serial(self): + """ + Retrieves the serial number of the chassis + Returns: + string: Serial number of chassis + """ + return self._eeprom.serial_number_str() + + def get_status(self): + """ + Retrieves the operational status of the chassis + Returns: + bool: A boolean value, True if chassis is operating properly + False if not + """ + return True + +############################################## +# Chassis methods +############################################## + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.base_mac_address() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.serial_number_str() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821', + '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00', + '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'} + """ + return self._eeprom.system_eeprom_info() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + raise NotImplementedError + +############################################## +# Other methods +############################################## + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - True if call successful, False if not; + - A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, + where device_id is the device ID for this device and + device_event, + status='1' represents device inserted, + status='0' represents device removed. + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}} + indicates that fan 0 has been removed, fan 2 + has been inserted and sfp 11 has been removed. + """ + + rc, xcvr_event = self.__xcvr_event.get_transceiver_change_event(timeout) + + return rc, {'sfp': xcvr_event} diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/eeprom.py new file mode 100644 index 00000000000..5840246fddc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/eeprom.py @@ -0,0 +1,110 @@ +#!/usr/bin/env python +# +# Name: eeprom.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + from sonic_eeprom import eeprom_tlvinfo + import binascii +except ImportError, e: + raise ImportError(str(e) + "- required module not found") + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self): + self.__eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0055/eeprom" + super(Eeprom, self).__init__(self.__eeprom_path, 0, '', True) + self.__eeprom_tlv_dict = dict() + try: + self.__eeprom_data = self.read_eeprom() + except: + self.__eeprom_data = "N/A" + raise RuntimeError("Eeprom is not Programmed") + else: + eeprom = self.__eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + return + + total_length = (ord(eeprom[9]) << 8) | ord(eeprom[10]) + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + ord(eeprom[tlv_index + 1])] + code = "0x%02X" % (ord(tlv[0])) + + if ord(tlv[0]) == self._TLV_CODE_VENDOR_EXT: + value = str((ord(tlv[2]) << 24) | (ord(tlv[3]) << 16) | + (ord(tlv[4]) << 8) | ord(tlv[5])) + value += str(tlv[6:6 + ord(tlv[1])]) + else: + name, value = self.decoder(None, tlv) + + self.__eeprom_tlv_dict[code] = value + if ord(eeprom[tlv_index]) == self._TLV_CODE_CRC_32: + break + + tlv_index += ord(eeprom[tlv_index+1]) + 2 + + def serial_number_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_SERIAL_NUMBER) + if not is_valid: + return "N/A" + return results[2] + + def base_mac_address(self): + (is_valid, t) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_MAC_BASE) + if not is_valid or t[1] != 6: + return super(eeprom_tlvinfo.TlvInfoDecoder, self).switchaddrstr(self.__eeprom_data) + + return ":".join([binascii.b2a_hex(T) for T in t[2]]) + + def modelstr(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_PRODUCT_NAME) + if not is_valid: + return "N/A" + + return results[2] + + def part_number_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_PART_NUMBER) + if not is_valid: + return "N/A" + + return results[2] + + def serial_tag_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_SERVICE_TAG) + if not is_valid: + return "N/A" + + return results[2] + + def revision_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_DEVICE_VERSION) + if not is_valid: + return "N/A" + + return results[2] + + def system_eeprom_info(self): + """ + Returns a dictionary, where keys are the type code defined in + ONIE EEPROM format and values are their corresponding values + found in the system EEPROM. + """ + return self.__eeprom_tlv_dict + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/fan.py new file mode 100644 index 00000000000..a0b99ff3459 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/fan.py @@ -0,0 +1,220 @@ +#!/usr/bin/env python +# +# Name: fan.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + import math + import os + from sonic_platform_base.fan_base import FanBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Fan(FanBase): + + def __init__(self, index, is_psu_fan=False, psu_index=0): + self.__index = index + self.__is_psu_fan = is_psu_fan + + if self.__is_psu_fan: + self.__psu_index = psu_index + self.__presence_attr = "/sys/class/hwmon/hwmon{}/fan{}_input".format((self.__psu_index + 6), self.__index) + self.__speed_rpm_attr = "/sys/class/hwmon/hwmon{}/fan{}_input".format((self.__psu_index + 6), self.__index) + self.__pwm_attr = None + else: + self.__presence_attr = "/sys/class/hwmon/hwmon2/device/fanmodule{}_type".format(self.__index) + self.__speed_front_rpm_attr = "/sys/class/hwmon/hwmon2/device/fan{}_input".format(self.__index*2-1) + self.__speed_rear_rpm_attr = "/sys/class/hwmon/hwmon2/device/fan{}_input".format(self.__index*2) + self.__pwm_attr = "/sys/class/hwmon/hwmon2/device/pwm{}".format(self.__index) + self.__led_attr = "/sys/class/hwmon/hwmon2/device/fanmodule{}_led".format(self.__index) + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + if self.__is_psu_fan: + return "PSU{}-FAN{}".format(self.__psu_index, self.__index) + else: + return "FAN{}".format(self.__index) + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_path = self.__presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (attr_rv == "0:Normal Type" or attr_rv == "1:REVERSAL Type"): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + return "N/A" + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + return "N/A" + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + status = False + front_attr_path = self.__speed_front_rpm_attr + rear_attr_path = self.__speed_rear_rpm_attr + front_attr_rv = self.__get_attr_value(front_attr_path) + rear_attr_rv = self.__get_attr_value(rear_attr_path) + if (front_attr_rv != 'ERR' and rear_attr_rv != 'ERR'): + if (int(front_attr_rv) != 0 and int(rear_attr_rv) != 0): + status = True + return status + +############################################## +# FAN methods +############################################## + + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + raise NotImplementedError + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed = 0 + + if self.__is_psu_fan: + attr_path = self.__speed_rpm_attr + else: + attr_path = self.__pwm_attr + + if self.get_presence() and None != attr_path: + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if self.__is_psu_fan: + fan_speed_rpm = int(attr_rv) + speed = math.ceil(float(fan_speed_rpm) * 100 / 11000) + else: + pwm = int(attr_rv) + speed = math.ceil(float(pwm * 100 / 255)) + + return speed + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + raise NotImplementedError + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + raise NotImplementedError + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + raise NotImplementedError + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + + Args: + color: A string representing the color with which to set the + fan module status LED + + Returns: + bool: True if status LED state is set successfully, False if not + """ + raise NotImplementedError + + def get_status_led(self): + """ + Gets the state of the fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + attr_path = self.__led_attr + attr_rv = self.__get_attr_value(attr_path) + if ( attr_rv != 'ERR'): + if ( attr_rv == "1:Green" ): + return self.STATUS_LED_COLOR_GREEN + elif ( attr_rv == "2:Red" ): + if self.get_presence is True: + return self.STATUS_LED_COLOR_RED + else: + return self.STATUS_LED_COLOR_OFF + return self.STATUS_LED_COLOR_OFF diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/platform.py new file mode 100644 index 00000000000..7d6bda4502d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/platform.py @@ -0,0 +1,20 @@ +#!/usr/bin/env python +# +# Name: platform.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PlatformBase): + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/psu.py new file mode 100644 index 00000000000..3621662c1fa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/psu.py @@ -0,0 +1,202 @@ +#!/usr/bin/env python +# +# Name: psu.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + import os + from sonic_platform_base.psu_base import PsuBase + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Psu(PsuBase): + + def __init__(self, index): + self.__num_of_fans = 1 + self.__index = index + self.__psu_presence_attr = "/sys/class/hwmon/hwmon2/device/psu{}".format(self.__index) + self.__psu_power_in_attr = "/sys/class/hwmon/hwmon{}/device/power1_input".format(self.__index + 6) + self.__psu_power_out_attr = "/sys/class/hwmon/hwmon{}/device/power2_input".format(self.__index + 6) + self.__psu_voltage_out_attr = "/sys/class/hwmon/hwmon{}/device/in2_input".format(self.__index + 6) + self.__psu_current_out_attr = "/sys/class/hwmon/hwmon{}/device/curr2_input".format(self.__index + 6) + + # Overriding _fan_list class variable defined in PsuBase, to make it unique per Psu object + self._fan_list = [] + + # Initialize FAN + for x in range(1, self.__num_of_fans + 1): + fan = Fan(x, True, self.__index) + self._fan_list.append(fan) + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return "PSU{}".format(self.__index) + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_normal = "1:normal" + attr_path = self.__psu_presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (attr_rv == attr_normal): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + return "N/A" + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + return "N/A" + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + status = False + attr_path = self.__psu_power_in_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) != 0): + status = True + + return status + +############################################## +# PSU methods +############################################## + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + voltage_out = 0.0 + attr_path = self.__psu_voltage_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + voltage_out = float(attr_rv) / 1000 + + return voltage_out + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + current_out = 0.0 + attr_path = self.__psu_current_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + current_out = float(attr_rv) / 1000 + + return current_out + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, e.g. 302.6 + """ + power_out = 0.0 + attr_path = self.__psu_power_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + power_out = float(attr_rv) / 1000000 + + return power_out + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + + Args: + color: A string representing the color with which to set the + PSU status LED + + Returns: + bool: True if status LED state is set successfully, False if not + """ + raise NotImplementedError + + def get_status_led(self): + """ + Gets the state of the PSU status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_OFF + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/qsfp.py b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/qsfp.py new file mode 100644 index 00000000000..4bd53b82b05 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/qsfp.py @@ -0,0 +1,1021 @@ +#!/usr/bin/env python +# +# Name: qsfp.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + import os + import sys + import time + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom + from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +INFO_OFFSET = 128 +THRE_OFFSET = 384 #128*3 +DOM_OFFSET = 0 + +XCVR_INTFACE_BULK_OFFSET = 0 +XCVR_INTFACE_BULK_WIDTH_QSFP = 20 +XCVR_HW_REV_WIDTH_QSFP = 2 +XCVR_CABLE_LENGTH_WIDTH_QSFP = 5 +XCVR_VENDOR_NAME_OFFSET = 20 +XCVR_VENDOR_NAME_WIDTH = 16 +XCVR_VENDOR_OUI_OFFSET = 37 +XCVR_VENDOR_OUI_WIDTH = 3 +XCVR_VENDOR_PN_OFFSET = 40 +XCVR_VENDOR_PN_WIDTH = 16 +XCVR_HW_REV_OFFSET = 56 +XCVR_HW_REV_WIDTH_OSFP = 2 +XCVR_VENDOR_SN_OFFSET = 68 +XCVR_VENDOR_SN_WIDTH = 16 +XCVR_VENDOR_DATE_OFFSET = 84 +XCVR_VENDOR_DATE_WIDTH = 8 +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 1 + +# Offset for values in QSFP eeprom +QSFP_DOM_REV_OFFSET = 1 +QSFP_DOM_REV_WIDTH = 1 +QSFP_TEMPE_OFFSET = 22 +QSFP_TEMPE_WIDTH = 2 +QSFP_VOLT_OFFSET = 26 +QSFP_VOLT_WIDTH = 2 +QSFP_CHANNL_MON_OFFSET = 34 +QSFP_CHANNL_MON_WIDTH = 16 +QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH = 24 +QSFP_CONTROL_OFFSET = 86 +QSFP_CONTROL_WIDTH = 8 +QSFP_CHANNL_RX_LOS_STATUS_OFFSET = 3 +QSFP_CHANNL_RX_LOS_STATUS_WIDTH = 1 +QSFP_CHANNL_TX_FAULT_STATUS_OFFSET = 4 +QSFP_CHANNL_TX_FAULT_STATUS_WIDTH = 1 +QSFP_POWEROVERRIDE_OFFSET = 93 +QSFP_POWEROVERRIDE_WIDTH = 1 +QSFP_MODULE_THRESHOLD_OFFSET = 128 +QSFP_MODULE_THRESHOLD_WIDTH = 24 +QSFP_CHANNEL_THRESHOLD_OFFSET = 176 +QSFP_CHANNEL_THRESHOLD_WIDTH = 16 +SFP_TYPE = "SFP" +QSFP_TYPE = "QSFP" + +class QSfp(SfpBase): + + def __init__(self, index): + self.__index = index + self.sfp_type = QSFP_TYPE + self.__platform = "x86_64-inventec_d6356j-r0" + self.__hwsku = "INVENTEC-D6356J" + + self.__port_to_i2c_mapping = { + 0:22, 1:23, 2:24, 3:25, 4:26, 5:27, 6:28, 7:29, + 8:30, 9:31, 10:32, 11:33, 12:34, 13:35, 14:36, 15:37, + 16:38, 17:39, 18:40, 19:41, 20:42, 21:43, 22:44, 23:45, + 24:46, 25:47, 26:48, 27:49, 28:50, 29:51, 30:52, 31:53, + 32:54, 33:55, 34:56, 35:57, 36:58, 37:59, 38:60, 39:61, + 40:62, 41:63, 42:64, 43:65, 44:66, 45:67, 46:68, 47:69, + 48:14, 49:15, 50:16, 51:17, 52:18, 53:19, 54:20, 55:21 + } + self.__port_end = len(self.__port_to_i2c_mapping) - 1; + + self.__presence_attr = None + self.__eeprom_path = None + if self.__index in range(0, self.__port_end + 1): + self.__presence_attr = "/sys/class/swps/port{}/present".format(self.__index) + self.__lpmode_attr = "/sys/class/swps/port{}/lpmod".format(self.__index) + self.__reset_attr = "/sys/class/swps/port{}/reset".format(self.__index) + self.__port_info_attr = "/sys/class/swps/port{}/info".format(self.__index) + self.__eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom".format(self.__port_to_i2c_mapping[self.__index]) + + SfpBase.__init__(self) + + def __is_isolated(self): + SWPS_PORT_STATUS_ISOLATED = "-102" + + if self.__port_info_attr == None: + return False + rv_str = self.__get_attr_value(self.__port_info_attr) + if SWPS_PORT_STATUS_ISOLATED in rv_str: + return True + return False + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def __is_host(self): + return os.system("docker > /dev/null 2>&1") == 0 + + def __get_path_to_port_config_file(self): + host_platform_root_path = '/usr/share/sonic/device' + docker_hwsku_path = '/usr/share/sonic/hwsku' + + host_platform_path = "/".join([host_platform_root_path, self.__platform]) + hwsku_path = "/".join([host_platform_path, self.__hwsku]) if self.__is_host() else docker_hwsku_path + + return "/".join([hwsku_path, "port_config.ini"]) + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + sysfsfile_eeprom = None + eeprom_raw = [] + + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + if self.__is_isolated(): + return eeprom_raw + + sysfs_eeprom_path = self.__eeprom_path + try: + sysfsfile_eeprom = open(sysfs_eeprom_path, mode="rb", buffering=0) + sysfsfile_eeprom.seek(offset) + raw = sysfsfile_eeprom.read(num_bytes) + raw_len = len(raw) + for n in range(0, raw_len): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except: + pass + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + + return eeprom_raw + + def __convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + name = None + + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings(self.__get_path_to_port_config_file()) + name = sfputil_helper.logical[self.__index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_path = self.__presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 0): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("modelname", "N/A") + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("serialnum", "N/A") + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and not self.get_reset_status() + +############################################## +# SFP methods +############################################## + + def _dummy_xcvr_info_dict(self, xcvr_info_keys): + xcvr_info = dict.fromkeys(xcvr_info_keys, "0") + xcvr_info['nominal_bit_rate'] = "255" + xcvr_info['type'] = "QSFP28 or later" + xcvr_info['type_abbrv_name'] = "QSFP28" + xcvr_info['manufacturename'] = "I2C N/G" + xcvr_info['modelname'] = "I2C N/G" + xcvr_info['serialnum'] = "I2C N/G" + xcvr_info['specification_compliance'] = "{}" + return xcvr_info + + def _dummy_xcvr_dom_dict(self, xcvr_dom_keys): + xcvr_dom = dict.fromkeys(xcvr_dom_keys, "N/A") + return xcvr_dom + + def _dummy_xcvr_threshold(self, xcvr_th_keys): + xcvr_th_info = dict.fromkeys(xcvr_th_keys, "N/A") + return xcvr_th_info + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + mominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + + transceiver_info_dict_keys = ['type', 'hardwarerev', + 'serialnum', 'manufacturename', + 'modelname', 'Connector', + 'encoding', 'ext_identifier', + 'ext_rateselect_compliance', 'cable_type', + 'cable_length', 'nominal_bit_rate', + 'specification_compliance', 'vendor_date', + 'vendor_oui'] + + qsfp_cable_length_tup = ('Length(km)', 'Length OM3(2m)', + 'Length OM2(m)', 'Length OM1(m)', 'Length Cable Assembly(m)') + + qsfp_compliance_code_tup = ('10/40G Ethernet Compliance Code', 'SONET Compliance codes', + 'SAS/SATA compliance codes', 'Gigabit Ethernet Compliant codes', + 'Fibre Channel link length/Transmitter Technology', 'Fibre Channel transmission media', + 'Fibre Channel Speed') + + sfpi_obj = sff8436InterfaceId() + if not self.get_presence() or not sfpi_obj: + return {} + + if self.__is_isolated(): + return self._dummy_xcvr_info_dict(transceiver_info_dict_keys) + + offset = INFO_OFFSET + + sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes((offset + XCVR_INTFACE_BULK_OFFSET), XCVR_INTFACE_BULK_WIDTH_QSFP) + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw, 0) + + sfp_vendor_name_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) + + sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) + + sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes((offset + XCVR_HW_REV_OFFSET), XCVR_HW_REV_WIDTH_QSFP) + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) + + sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) + + sfp_vendor_oui_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) + if sfp_vendor_oui_raw is not None: + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_vendor_oui_raw, 0) + + sfp_vendor_date_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) + sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_vendor_date_raw, 0) + + transceiver_info_dict = dict.fromkeys(transceiver_info_dict_keys, 'N/A') + + if sfp_interface_bulk_data: + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + transceiver_info_dict['type_abbrv_name'] = sfp_interface_bulk_data['data']['type_abbrv_name']['value'] + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value']) + + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] if sfp_vendor_name_data else 'N/A' + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] if sfp_vendor_pn_data else 'N/A' + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] if sfp_vendor_rev_data else 'N/A' + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] if sfp_vendor_sn_data else 'N/A' + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] if sfp_vendor_oui_data else 'N/A' + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] if sfp_vendor_date_data else 'N/A' + + transceiver_info_dict['cable_type'] = "Unknown" + transceiver_info_dict['cable_length'] = "Unknown" + for key in qsfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + + compliance_code_dict = dict() + for key in qsfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + return transceiver_info_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. + tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. + reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. + lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. + tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. + tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 + | |to channel 3. + temperature |INT |module temperature in Celsius + voltage |INT |supply voltage in mV + txbias |INT |TX Bias Current in mA, n is the channel number, + | |for example, tx2bias stands for tx bias of channel 2. + rxpower |INT |received optical power in mW, n is the channel number, + | |for example, rx2power stands for rx power of channel 2. + txpower |INT |TX output power in mW, n is the channel number, + | |for example, tx2power stands for tx power of channel 2. + ======================================================================== + """ + transceiver_dom_info_dict_keys = ['rx_los', 'tx_fault', + 'reset_status', 'power_lpmode', + 'tx_disable', 'tx_disable_channel', + 'temperature', 'voltage', + 'rx1power', 'rx2power', + 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', + 'tx3bias', 'tx4bias', + 'tx1power', 'tx2power', + 'tx3power', 'tx4power'] + + sfpd_obj = sff8436Dom() + sfpi_obj = sff8436InterfaceId() + + if not self.get_presence() or not sfpi_obj or not sfpd_obj: + return {} + + if self.__is_isolated(): + return self._dummy_xcvr_dom_dict(transceiver_dom_info_dict_keys) + + transceiver_dom_info_dict = dict.fromkeys(transceiver_dom_info_dict_keys, 'N/A') + offset = DOM_OFFSET + offset_xcvr = INFO_OFFSET + + # QSFP capability byte parse, through this byte can know whether it support tx_power or not. + # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, + # need to add more code for determining the capability and version compliance + # in SFF-8636 dom capability definitions evolving with the versions. + qsfp_dom_capability_raw = self.__read_eeprom_specific_bytes((offset_xcvr + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) + if qsfp_dom_capability_raw is not None: + qspf_dom_capability_data = sfpi_obj.parse_qsfp_dom_capability(qsfp_dom_capability_raw, 0) + else: + return None + + dom_temperature_raw = self.__read_eeprom_specific_bytes((offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + + dom_voltage_raw = self.__read_eeprom_specific_bytes((offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + qsfp_dom_rev_raw = self.__read_eeprom_specific_bytes((offset + QSFP_DOM_REV_OFFSET), QSFP_DOM_REV_WIDTH) + if qsfp_dom_rev_raw is not None: + qsfp_dom_rev_data = sfpd_obj.parse_sfp_dom_rev(qsfp_dom_rev_raw, 0) + qsfp_dom_rev = qsfp_dom_rev_data['data']['dom_rev']['value'] + + # The tx_power monitoring is only available on QSFP which compliant with SFF-8636 + # and claimed that it support tx_power with one indicator bit. + dom_channel_monitor_data = {} + dom_channel_monitor_raw = None + qsfp_tx_power_support = qspf_dom_capability_data['data']['Tx_power_support']['value'] + if (qsfp_dom_rev[0:8] != 'SFF-8636' or (qsfp_dom_rev[0:8] == 'SFF-8636' and qsfp_tx_power_support != 'on')): + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + + else: + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0) + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TX1Power']['value'] + transceiver_dom_info_dict['tx2power'] = dom_channel_monitor_data['data']['TX2Power']['value'] + transceiver_dom_info_dict['tx3power'] = dom_channel_monitor_data['data']['TX3Power']['value'] + transceiver_dom_info_dict['tx4power'] = dom_channel_monitor_data['data']['TX4Power']['value'] + + if dom_channel_monitor_raw: + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RX1Power']['value'] + transceiver_dom_info_dict['rx2power'] = dom_channel_monitor_data['data']['RX2Power']['value'] + transceiver_dom_info_dict['rx3power'] = dom_channel_monitor_data['data']['RX3Power']['value'] + transceiver_dom_info_dict['rx4power'] = dom_channel_monitor_data['data']['RX4Power']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value'] + transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value'] + transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value'] + transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value'] + + for key in transceiver_dom_info_dict: + transceiver_dom_info_dict[key] = self.__convert_string_to_num(transceiver_dom_info_dict[key]) + + transceiver_dom_info_dict['rx_los'] = self.get_rx_los() + transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() + transceiver_dom_info_dict['reset_status'] = self.get_reset_status() + transceiver_dom_info_dict['tx_disable'] = self.get_tx_disable() + transceiver_dom_info_dict['tx_disable_channel'] = self.get_tx_disable_channel() + transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() + + + return transceiver_dom_info_dict + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. + templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. + temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. + templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. + vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. + vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. + vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. + vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. + rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. + rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. + rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. + rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. + txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. + txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. + txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. + txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. + txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. + txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. + txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. + txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. + ======================================================================== + """ + transceiver_dom_threshold_info_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning'] + + sfpd_obj = sff8436Dom() + if not self.get_presence() or not sfpd_obj: + return {} + + if self.__is_isolated(): + return self._dummy_xcvr_threshold(transceiver_dom_threshold_info_dict_keys) + + transceiver_dom_threshold_dict = dict.fromkeys(transceiver_dom_threshold_info_dict_keys, 'N/A') + offset = THRE_OFFSET + + dom_module_threshold_raw = self.__read_eeprom_specific_bytes((offset + QSFP_MODULE_THRESHOLD_OFFSET), QSFP_MODULE_THRESHOLD_WIDTH) + if dom_module_threshold_raw: + module_threshold_values = sfpd_obj.parse_module_threshold_values(dom_module_threshold_raw, 0) + module_threshold_data = module_threshold_values.get('data') + if module_threshold_data: + transceiver_dom_threshold_dict['temphighalarm'] = module_threshold_data['TempHighAlarm']['value'] + transceiver_dom_threshold_dict['templowalarm'] = module_threshold_data['TempLowAlarm']['value'] + transceiver_dom_threshold_dict['temphighwarning'] = module_threshold_data['TempHighWarning']['value'] + transceiver_dom_threshold_dict['templowwarning'] = module_threshold_data['TempLowWarning']['value'] + transceiver_dom_threshold_dict['vcchighalarm'] = module_threshold_data['VccHighAlarm']['value'] + transceiver_dom_threshold_dict['vcclowalarm'] = module_threshold_data['VccLowAlarm']['value'] + transceiver_dom_threshold_dict['vcchighwarning'] = module_threshold_data['VccHighWarning']['value'] + transceiver_dom_threshold_dict['vcclowwarning'] = module_threshold_data['VccLowWarning']['value'] + + dom_channel_thres_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNEL_THRESHOLD_OFFSET), QSFP_CHANNEL_THRESHOLD_WIDTH) + channel_threshold_values = sfpd_obj.parse_channel_threshold_values(dom_channel_thres_raw, 0) + channel_threshold_data = channel_threshold_values.get('data') + if channel_threshold_data: + transceiver_dom_threshold_dict['rxpowerhighalarm'] = channel_threshold_data['RxPowerHighAlarm']['value'] + transceiver_dom_threshold_dict['rxpowerlowalarm'] = channel_threshold_data['RxPowerLowAlarm']['value'] + transceiver_dom_threshold_dict['rxpowerhighwarning'] = channel_threshold_data['RxPowerHighWarning']['value'] + transceiver_dom_threshold_dict['rxpowerlowwarning'] = channel_threshold_data['RxPowerLowWarning']['value'] + transceiver_dom_threshold_dict['txpowerhighalarm'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerlowalarm'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerhighwarning'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerlowwarning'] = "0.0dBm" + transceiver_dom_threshold_dict['txbiashighalarm'] = channel_threshold_data['TxBiasHighAlarm']['value'] + transceiver_dom_threshold_dict['txbiaslowalarm'] = channel_threshold_data['TxBiasLowAlarm']['value'] + transceiver_dom_threshold_dict['txbiashighwarning'] = channel_threshold_data['TxBiasHighWarning']['value'] + transceiver_dom_threshold_dict['txbiaslowwarning'] = channel_threshold_data['TxBiasLowWarning']['value'] + + for key in transceiver_dom_threshold_dict: + transceiver_dom_threshold_dict[key] = self.__convert_string_to_num(transceiver_dom_threshold_dict[key]) + + return transceiver_dom_threshold_dict + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + + Returns: + A Boolean, True if reset enabled, False if disabled + """ + reset_status = False + attr_path = self.__reset_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 0): + reset_status = True + + return reset_status + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + rx_los = False + rx_los_list = [] + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(QSFP_CHANNL_RX_LOS_STATUS_OFFSET, QSFP_CHANNL_RX_LOS_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + rx_los_data = int(dom_channel_monitor_raw[0], 16) + rx_los_list.append(rx_los_data & 0x01 != 0) + rx_los_list.append(rx_los_data & 0x02 != 0) + rx_los_list.append(rx_los_data & 0x04 != 0) + rx_los_list.append(rx_los_data & 0x08 != 0) + rx_los = rx_los_list[0] and rx_los_list[1] and rx_los_list[2] and rx_los_list[3] + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + tx_fault = False + tx_fault_list = [] + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(QSFP_CHANNL_TX_FAULT_STATUS_OFFSET, QSFP_CHANNL_TX_FAULT_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + tx_fault_data = int(dom_channel_monitor_raw[0], 16) + tx_fault_list.append(tx_fault_data & 0x01 != 0) + tx_fault_list.append(tx_fault_data & 0x02 != 0) + tx_fault_list.append(tx_fault_data & 0x04 != 0) + tx_fault_list.append(tx_fault_data & 0x08 != 0) + tx_fault = tx_fault_list[0] and tx_fault_list[1] and tx_fault_list[2] and tx_fault_list[3] + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + """ + tx_disable = False + tx_disable_list = [] + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return tx_disable + + dom_control_raw = self.__read_eeprom_specific_bytes(QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + tx_disable_list.append('On' == dom_control_data['data']['TX1Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX2Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX3Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX4Disable']['value']) + tx_disable = tx_disable_list[0] and tx_disable_list[1] and tx_disable_list[2] and tx_disable_list[3] + + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + tx_disable_channel = 0 + tx_disable_list = [] + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return tx_disable_channel + + dom_control_raw = self.__read_eeprom_specific_bytes(QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + tx_disable_list.append('On' == dom_control_data['data']['TX1Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX2Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX3Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX4Disable']['value']) + + for i in range(len(tx_disable_list)): + if tx_disable_list[i]: + tx_disable_channel |= 1 << i + + return tx_disable_channel + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + lpmode = False + attr_path = self.__lpmode_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 1): + lpmode = True + + return lpmode + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + power_override = False + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return power_override + + dom_control_raw = self.__read_eeprom_specific_bytes(QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + power_override = ('On' == dom_control_data['data']['PowerOverride']['value']) + + return power_override + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + + Returns: + An integer number of current temperature in Celsius + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("temperature", "N/A") + + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + + Returns: + An integer number of supply voltage in mV + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("voltage", "N/A") + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_bs = transceiver_dom_info_dict.get("tx1bias", "N/A") + tx2_bs = transceiver_dom_info_dict.get("tx2bias", "N/A") + tx3_bs = transceiver_dom_info_dict.get("tx3bias", "N/A") + tx4_bs = transceiver_dom_info_dict.get("tx4bias", "N/A") + return [tx1_bs, tx2_bs, tx3_bs, tx4_bs] if transceiver_dom_info_dict else [] + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + rx1_pw = transceiver_dom_info_dict.get("rx1power", "N/A") + rx2_pw = transceiver_dom_info_dict.get("rx2power", "N/A") + rx3_pw = transceiver_dom_info_dict.get("rx3power", "N/A") + rx4_pw = transceiver_dom_info_dict.get("rx4power", "N/A") + return [rx1_pw, rx2_pw, rx3_pw, rx4_pw] if transceiver_dom_info_dict else [] + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_pw = transceiver_dom_info_dict.get("tx1power", "N/A") + tx2_pw = transceiver_dom_info_dict.get("tx2power", "N/A") + tx3_pw = transceiver_dom_info_dict.get("tx3power", "N/A") + tx4_pw = transceiver_dom_info_dict.get("tx4power", "N/A") + return [tx1_pw, tx2_pw, tx3_pw, tx4_pw] + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + + Returns: + A boolean, True if successful, False if not + """ + + try: + reg_file = open(self.__reset_attr, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + try: + reg_file = open(self.__reset_attr, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + sysfs_eeprom_path = self.__eeprom_path + sysfsfile_eeprom = None + + if self.__is_isolated(): + print("Error: detected port-{} be isolated".format(self.__index)) + return False + + try: + tx_disable_ctl = 0xf if tx_disable else 0x0 + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom = open(sysfs_eeprom_path, "r+b") + sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + + Returns: + A boolean, True if successful, False if not + """ + sysfs_eeprom_path = self.__eeprom_path + sysfsfile_eeprom = None + + if self.__is_isolated(): + print("Error: detected port-{} be isolated".format(self.__index)) + return False + + try: + channel_state = self.get_tx_disable_channel() + tx_enable_mask = [0xe, 0xd, 0xb, 0x7] + tx_disable_mask = [0x1, 0x3, 0x7, 0xf] + tx_disable_ctl = channel_state | tx_disable_mask[channel] if disable else channel_state & tx_enable_mask[channel] + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom = open(sysfs_eeprom_path, "r+b") + sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + try: + reg_file = open(self.__lpmode_attr, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + sysfs_eeprom_path = self.__eeprom_path + sysfsfile_eeprom = None + + if self.__is_isolated(): + print("Error: detected port-{} be isolated".format(self.__index)) + return False + + try: + power_override_bit = 0 + if power_override: + power_override_bit |= 1 << 0 + + power_set_bit = 0 + if power_set: + power_set_bit |= 1 << 1 + + buffer = create_string_buffer(1) + buffer[0] = chr(power_override_bit | power_set_bit) + # Write to eeprom + sysfsfile_eeprom = open(sysfs_eeprom_path, "r+b") + sysfsfile_eeprom.seek(QSFP_POWEROVERRIDE_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def get_eeprom_raw(self): + """ get eeprom data""" + eeprom_raw_0 = [] + eeprom_raw_1 = [] + file_eeprom_0 = None + file_eeprom_1 = None + for i in range(0, 128): + eeprom_raw_0.append("0x00") + eeprom_raw_1.append("0x00") + + if self.__is_isolated(): + return (eeprom_raw_0, eeprom_raw_1) + + try: + if self.sfp_type == SFP_TYPE: + file_eeprom = open(self.__eeprom_path, mode="rb", buffering=0) + file_eeprom.seek(0) + raw0 = file_eeprom.read(128) + file_eeprom.seek(256) + raw1 = file_eeprom.read(128) + elif self.sfp_type == QSFP_TYPE: + file_eeprom = open(self.__eeprom_path, mode="rb", buffering=0) + file_eeprom.seek(0) + raw0 = file_eeprom.read(128) + file_eeprom.seek(128) + raw1 = file_eeprom.read(128) + for i in range(0, 128): + eeprom_raw_0[i] = hex(ord(raw0[i]))[2:].zfill(2) + eeprom_raw_1[i] = hex(ord(raw1[i]))[2:].zfill(2) + except Exception as e: + print("get_eeprom_raw failed due to {}".format(repr(e))) + pass + + finally: + if file_eeprom: + file_eeprom.close() + return (eeprom_raw_0, eeprom_raw_1) + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/sfp.py new file mode 100644 index 00000000000..4fabcc4838c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/sfp.py @@ -0,0 +1,821 @@ +#!/uso/bin/env python +# +# Name: sfp.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + import os + import sys + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8472 import sff8472Dom + from sonic_platform_base.sonic_sfp.sff8472 import sff8472InterfaceId + from sonic_platform_base.sonic_sfp.sff8472 import sffbase + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +INFO_OFFSET = 0 +DOM_OFFSET = 256 + +XCVR_INTFACE_BULK_OFFSET = 0 +XCVR_INTFACE_BULK_WIDTH_SFP = 21 +XCVR_VENDOR_NAME_OFFSET = 20 +XCVR_VENDOR_NAME_WIDTH = 16 +XCVR_VENDOR_OUI_OFFSET = 37 +XCVR_VENDOR_OUI_WIDTH = 3 +XCVR_VENDOR_PN_OFFSET = 40 +XCVR_VENDOR_PN_WIDTH = 16 +XCVR_HW_REV_OFFSET = 56 +XCVR_HW_REV_WIDTH_SFP = 4 +XCVR_VENDOR_SN_OFFSET = 68 +XCVR_VENDOR_SN_WIDTH = 16 +XCVR_VENDOR_DATE_OFFSET = 84 +XCVR_VENDOR_DATE_WIDTH = 8 +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 1 + +# Offset for values in SFP eeprom +SFP_TEMPE_OFFSET = 96 +SFP_TEMPE_WIDTH = 2 +SFP_VOLT_OFFSET = 98 +SFP_VOLT_WIDTH = 2 +SFP_CHANNL_MON_OFFSET = 100 +SFP_CHANNL_MON_WIDTH = 6 +SFP_MODULE_THRESHOLD_OFFSET = 0 +SFP_MODULE_THRESHOLD_WIDTH = 40 +SFP_CHANNL_THRESHOLD_OFFSET = 112 +SFP_CHANNL_THRESHOLD_WIDTH = 2 +SFP_STATUS_CONTROL_OFFSET = 110 +SFP_STATUS_CONTROL_WIDTH = 1 +SFP_TX_DISABLE_HARD_BIT = 7 +SFP_TX_DISABLE_SOFT_BIT = 6 +SFP_TYPE = "SFP" +QSFP_TYPE = "QSFP" + +class Sfp(SfpBase): + + def __init__(self, index): + self.__index = index + self.sfp_type = SFP_TYPE + self.__platform = "x86_64-inventec_d6356j-r0" + self.__hwsku = "INVENTEC-D6356J" + + self.__port_to_i2c_mapping = { + 0:22, 1:23, 2:24, 3:25, 4:26, 5:27, 6:28, 7:29, + 8:30, 9:31, 10:32, 11:33, 12:34, 13:35, 14:36, 15:37, + 16:38, 17:39, 18:40, 19:41, 20:42, 21:43, 22:44, 23:45, + 24:46, 25:47, 26:48, 27:49, 28:50, 29:51, 30:52, 31:53, + 32:54, 33:55, 34:56, 35:57, 36:58, 37:59, 38:60, 39:61, + 40:62, 41:63, 42:64, 43:65, 44:66, 45:67, 46:68, 47:69, + 48:14, 49:15, 50:16, 51:17, 52:18, 53:19, 54:20, 55:21 + } + self.__port_end = len(self.__port_to_i2c_mapping) - 1; + + self.__presence_attr = None + self.__eeprom_path = None + self.__port_info_attr = None + if self.__index in range(0, self.__port_end + 1): + self.__presence_attr = "/sys/class/swps/port{}/present".format(self.__index) + self.__port_info_attr = "/sys/class/swps/port{}/info".format(self.__index) + self.__eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom".format(self.__port_to_i2c_mapping[self.__index]) + + SfpBase.__init__(self) + + def __is_isolated(self): + SWPS_PORT_STATUS_ISOLATED = "-102" + + if self.__port_info_attr == None: + return False + rv_str = self.__get_attr_value(self.__port_info_attr) + if SWPS_PORT_STATUS_ISOLATED in rv_str: + return True + return False + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def __is_host(self): + return os.system("docker > /dev/null 2>&1") == 0 + + def __get_path_to_port_config_file(self): + host_platform_root_path = '/usr/share/sonic/device' + docker_hwsku_path = '/usr/share/sonic/hwsku' + + host_platform_path = "/".join([host_platform_root_path, self.__platform]) + hwsku_path = "/".join([host_platform_path, self.__hwsku]) if self.__is_host() else docker_hwsku_path + + return "/".join([hwsku_path, "port_config.ini"]) + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + sysfsfile_eeprom = None + eeprom_raw = [] + + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + if self.__is_isolated(): + return eeprom_raw + + sysfs_eeprom_path = self.__eeprom_path + try: + sysfsfile_eeprom = open(sysfs_eeprom_path, mode="rb", buffering=0) + sysfsfile_eeprom.seek(offset) + raw = sysfsfile_eeprom.read(num_bytes) + raw_len = len(raw) + for n in range(0, raw_len): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except: + pass + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + + return eeprom_raw + + def __convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + name = None + + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings(self.__get_path_to_port_config_file()) + name = sfputil_helper.logical[self.__index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_path = self.__presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 0): + presence = True + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("modelname", "N/A") + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("serialnum", "N/A") + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and not self.get_reset_status() + +############################################## +# SFP methods +############################################## + + def _dummy_xcvr_info_dict(self, xcvr_info_keys): + xcvr_info = dict.fromkeys(xcvr_info_keys, "0") + xcvr_info['nominal_bit_rate'] = "255" + xcvr_info['type'] = "SFP/SFP+/SFP28" + xcvr_info['type_abbrv_name'] = "SFP" + xcvr_info['manufacturename'] = "I2C N/G" + xcvr_info['modelname'] = "I2C N/G" + xcvr_info['serialnum'] = "I2C N/G" + xcvr_info['specification_compliance'] = "{}" + return xcvr_info + + def _dummy_xcvr_dom_dict(self, xcvr_dom_keys): + xcvr_dom = dict.fromkeys(xcvr_dom_keys, "N/A") + xcvr_dom['reset_status'] = self.get_reset_status() + xcvr_dom['rx_los'] = self.get_rx_los() + xcvr_dom['tx_fault'] = self.get_tx_fault() + xcvr_dom['tx_disable'] = self.get_tx_disable() + xcvr_dom['tx_disable_channel'] = self.get_tx_disable_channel() + xcvr_dom['lp_mode'] = self.get_lpmode() + return xcvr_dom + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + mominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + + transceiver_info_dict_keys = ['type', 'hardwarerev', + 'serialnum', 'manufacturename', + 'modelname', 'Connector', + 'encoding', 'ext_identifier', + 'ext_rateselect_compliance', 'cable_type', + 'cable_length', 'nominal_bit_rate', + 'specification_compliance', 'vendor_date', + 'vendor_oui'] + + sfp_cable_length_tup = ('LengthSMFkm-UnitsOfKm', 'LengthSMF(UnitsOf100m)', + 'Length50um(UnitsOf10m)', 'Length62.5um(UnitsOfm)', + 'LengthCable(UnitsOfm)', 'LengthOM3(UnitsOf10m)') + + sfp_compliance_code_tup = ('10GEthernetComplianceCode', 'InfinibandComplianceCode', + 'ESCONComplianceCodes', 'SONETComplianceCodes', + 'EthernetComplianceCodes', 'FibreChannelLinkLength', + 'FibreChannelTechnology', 'SFP+CableTechnology', + 'FibreChannelTransmissionMedia', 'FibreChannelSpeed') + + sfpi_obj = sff8472InterfaceId() + if not self.get_presence() or not sfpi_obj: + return {} + + if self.__is_isolated(): + return self._dummy_xcvr_info_dict(transceiver_info_dict_keys) + + offset = INFO_OFFSET + + sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes((offset + XCVR_INTFACE_BULK_OFFSET), XCVR_INTFACE_BULK_WIDTH_SFP) + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw, 0) + + sfp_vendor_name_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) + + sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) + + sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes((offset + XCVR_HW_REV_OFFSET), XCVR_HW_REV_WIDTH_SFP) + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) + + sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) + + sfp_vendor_oui_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) + if sfp_vendor_oui_raw is not None: + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_vendor_oui_raw, 0) + + sfp_vendor_date_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) + sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_vendor_date_raw, 0) + + transceiver_info_dict = dict.fromkeys(transceiver_info_dict_keys, 'N/A') + + if sfp_interface_bulk_data: + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + transceiver_info_dict['type_abbrv_name'] = sfp_interface_bulk_data['data']['type_abbrv_name']['value'] + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['NominalSignallingRate(UnitsOf100Mbd)']['value']) + + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] if sfp_vendor_name_data else 'N/A' + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] if sfp_vendor_pn_data else 'N/A' + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] if sfp_vendor_rev_data else 'N/A' + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] if sfp_vendor_sn_data else 'N/A' + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] if sfp_vendor_oui_data else 'N/A' + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] if sfp_vendor_date_data else 'N/A' + + transceiver_info_dict['cable_type'] = "Unknown" + transceiver_info_dict['cable_length'] = "Unknown" + for key in sfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + + compliance_code_dict = dict() + for key in sfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + return transceiver_info_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. + tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. + reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. + lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. + tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. + tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 + | |to channel 3. + temperature |INT |module temperature in Celsius + voltage |INT |supply voltage in mV + txbias |INT |TX Bias Current in mA, n is the channel number, + | |for example, tx2bias stands for tx bias of channel 2. + rxpower |INT |received optical power in mW, n is the channel number, + | |for example, rx2power stands for rx power of channel 2. + txpower |INT |TX output power in mW, n is the channel number, + | |for example, tx2power stands for tx power of channel 2. + ======================================================================== + """ + transceiver_dom_info_dict_keys = ['rx_los', 'tx_fault', + 'reset_status', 'power_lpmode', + 'tx_disable', 'tx_disable_channel', + 'temperature', 'voltage', + 'rx1power', 'rx2power', + 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', + 'tx3bias', 'tx4bias', + 'tx1power', 'tx2power', + 'tx3power', 'tx4power'] + + sfpd_obj = sff8472Dom() + if not self.get_presence() or not sfpd_obj: + return {} + + if self.__is_isolated(): + return self._dummy_xcvr_dom_dict(transceiver_dom_info_dict_keys) + + eeprom_ifraw = self.__read_eeprom_specific_bytes(0, DOM_OFFSET) + sfpi_obj = sff8472InterfaceId(eeprom_ifraw) + cal_type = sfpi_obj.get_calibration_type() + sfpd_obj._calibration_type = cal_type + + offset = DOM_OFFSET + transceiver_dom_info_dict = dict.fromkeys(transceiver_dom_info_dict_keys, 'N/A') + + dom_temperature_raw = self.__read_eeprom_specific_bytes((offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + + dom_voltage_raw = self.__read_eeprom_specific_bytes((offset + SFP_VOLT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes((offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_voltage_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + transceiver_dom_info_dict['tx1power'] = dom_voltage_data['data']['TXPower']['value'] + transceiver_dom_info_dict['rx1power'] = dom_voltage_data['data']['RXPower']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_voltage_data['data']['TXBias']['value'] + + for key in transceiver_dom_info_dict: + transceiver_dom_info_dict[key] = self.__convert_string_to_num(transceiver_dom_info_dict[key]) + + transceiver_dom_info_dict['reset_status'] = self.get_reset_status() + transceiver_dom_info_dict['rx_los'] = self.get_rx_los() + transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() + transceiver_dom_info_dict['tx_disable'] = self.get_tx_disable() + transceiver_dom_info_dict['tx_disable_channel'] = self.get_tx_disable_channel() + transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() + + return transceiver_dom_info_dict + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. + templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. + temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. + templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. + vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. + vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. + vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. + vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. + rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. + rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. + rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. + rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. + txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. + txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. + txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. + txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. + txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. + txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. + txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. + txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. + ======================================================================== + """ + transceiver_dom_threshold_info_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning'] + + sfpd_obj = sff8472Dom() + + if not self.get_presence() and not sfpd_obj: + return {} + + eeprom_ifraw = self.__read_eeprom_specific_bytes(0, DOM_OFFSET) + sfpi_obj = sff8472InterfaceId(eeprom_ifraw) + cal_type = sfpi_obj.get_calibration_type() + sfpd_obj._calibration_type = cal_type + + offset = DOM_OFFSET + transceiver_dom_threshold_info_dict = dict.fromkeys(transceiver_dom_threshold_info_dict_keys, 'N/A') + dom_module_threshold_raw = self.__read_eeprom_specific_bytes((offset + SFP_MODULE_THRESHOLD_OFFSET), SFP_MODULE_THRESHOLD_WIDTH) + if dom_module_threshold_raw is not None: + dom_module_threshold_data = sfpd_obj.parse_alarm_warning_threshold(dom_module_threshold_raw, 0) + + transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] + transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] + transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] + transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] + + transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VoltageHighAlarm']['value'] + transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VoltageLowAlarm']['value'] + transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VoltageHighWarning']['value'] + transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VoltageLowWarning']['value'] + + transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_module_threshold_data['data']['BiasHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_module_threshold_data['data']['BiasLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_module_threshold_data['data']['BiasHighWarning']['value'] + transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_module_threshold_data['data']['BiasLowWarning']['value'] + + transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_module_threshold_data['data']['TXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_module_threshold_data['data']['TXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_module_threshold_data['data']['TXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_module_threshold_data['data']['TXPowerLowWarning']['value'] + + transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_module_threshold_data['data']['RXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_module_threshold_data['data']['RXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_module_threshold_data['data']['RXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_module_threshold_data['data']['RXPowerLowWarning']['value'] + + for key in transceiver_dom_threshold_info_dict: + transceiver_dom_threshold_info_dict[key] = self.__convert_string_to_num(transceiver_dom_threshold_info_dict[key]) + + return transceiver_dom_threshold_info_dict + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + + Returns: + A Boolean, True if reset enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + rx_los = False + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + rx_los = (sffbase().test_bit(data, 1) != 0) + + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + tx_fault = False + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + tx_fault = (sffbase().test_bit(data, 2) != 0) + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + """ + tx_disable = False + tx_fault = False + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + tx_disable_hard = (sffbase().test_bit(data, SFP_TX_DISABLE_HARD_BIT) != 0) + tx_disable_soft = (sffbase().test_bit(data, SFP_TX_DISABLE_SOFT_BIT) != 0) + tx_disable = tx_disable_hard | tx_disable_soft + + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + # SFP doesn't support this feature + return 0 + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + + Returns: + An integer number of current temperature in Celsius + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("temperature", "N/A") + + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + + Returns: + An integer number of supply voltage in mV + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("voltage", "N/A") + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_bs = transceiver_dom_info_dict.get("tx1bias", "N/A") + return [tx1_bs, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + rx1_pw = transceiver_dom_info_dict.get("rx1power", "N/A") + return [rx1_pw, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_pw = transceiver_dom_info_dict.get("tx1power", "N/A") + return [tx1_pw, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + + Returns: + A boolean, True if successful, False if not + """ + # SFP doesn't support this feature + return False + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + + # Neil + if self.__is_isolated(): + return False + + sysfs_eeprom_path = self.__eeprom_path + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw is not None: + # Set bit 6 for Soft TX Disable Select + # 01000000 = 64 and 10111111 = 191 + tx_disable_bit = 64 if tx_disable else 191 + status_control = int(status_control_raw[0], 16) + tx_disable_ctl = (status_control | tx_disable_bit) if tx_disable else (status_control & tx_disable_bit) + try: + sysfsfile_eeprom = open(sysfs_eeprom_path, mode="r+b", buffering=0) + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom.seek(SFP_STATUS_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except: + #print("Error: unable to open file: %s" % str(e)) + return False + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + return False + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + + Returns: + A boolean, True if successful, False if not + """ + # SFP doesn't support this feature + return False + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + # SFP doesn't support this feature + return False + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + # SFP doesn't support this feature + return False + + def get_eeprom_raw(self): + """ get eeprom data""" + eeprom_raw_0 = [] + eeprom_raw_1 = [] + file_eeprom_0 = None + file_eeprom_1 = None + for i in range(0, 128): + eeprom_raw_0.append("0x00"); + eeprom_raw_1.append("0x00") + try: + file_eeprom = open(self.__eeprom_path, mode="rb", buffering=0) + if self.sfp_type == SFP_TYPE: + file_eeprom.seek(0) + raw0 = file_eeprom.read(128) + file_eeprom.seek(256) + raw1 = file_eeprom.read(128) + elif self.sfp_type == QSFP_TYPE: + file_eeprom.seek(0) + raw0 = file_eeprom.read(128) + file_eeprom.seek(128) + raw1 = file_eeprom.read(128) + for i in range(0, 128): + eeprom_raw_0[i] = hex(ord(raw0[i]))[2:].zfill(2) + eeprom_raw_1[i] = hex(ord(raw1[i]))[2:].zfill(2) + except Exception as e: + print("get_eeprom_raw failed due to {}".format(repr(e))) + pass + + finally: + if file_eeprom: + file_eeprom.close() + return (eeprom_raw_0, eeprom_raw_1) + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/thermal.py new file mode 100644 index 00000000000..eba7ba728de --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/thermal.py @@ -0,0 +1,170 @@ +#!/usr/bin/env python +# +# Name: thermal.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + import os + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Thermal(ThermalBase): + + def __init__(self, index): + self.__index = index + + #thermal name list + self.__thermal_name_list = [ "PCH Temperature Sensor", + "CPU Board Temperature Sensor", + "FrontSide Temperature Sensor", + "NearASIC Temperature Sensor", + "RearSide Temperature Sensor" ] + + offset = 0 + if 0 != self.__index: + offset = 2 + self.__presence_attr = "/sys/class/hwmon/hwmon{}/temp1_input".format(self.__index + offset) + self.__temperature_attr = "/sys/class/hwmon/hwmon{}/temp1_input".format(self.__index + offset) + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return self.__thermal_name_list[self.__index] or "Unknown" + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_path = self.__presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) != 0): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + return "N/A" + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + return "N/A" + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() + +############################################## +# THERMAL methods +############################################## + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + temperature = 0.0 + attr_path = self.__temperature_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + temperature = float(attr_rv) / 1000 + + return temperature + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + + Returns: + A float number, the high threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + raise NotImplementedError + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + + Returns: + A float number, the low threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + raise NotImplementedError + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + raise NotImplementedError + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + raise NotImplementedError + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/transceiver_event.py b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/transceiver_event.py new file mode 100644 index 00000000000..e07f49e3a9c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/sonic_platform/transceiver_event.py @@ -0,0 +1,157 @@ +#!/usr/bin/env python +# +# Name: transceiver_event.py, version: 1.0 +# + +try: + import time + import socket + import re + import os + import sys + from collections import OrderedDict +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class NetlinkEventMonitor(object): + __instance = None + + def __new__(cls, *args, **kwargs): + if not cls.__instance: + # print(cls) + cls.__instance = super(NetlinkEventMonitor, cls).__new__(cls) + cls.__instance.__recieved_events = OrderedDict() + return cls.__instance + + def __init__(self, timeout): + # print('__init__', self) + NETLINK_KOBJECT_UEVENT = 15 + self.__socket = socket.socket(socket.AF_NETLINK, socket.SOCK_DGRAM, NETLINK_KOBJECT_UEVENT) + self.__timeout = timeout + + def start(self): + # print('start', self.__timeout) + self.__socket.bind((os.getpid(), -1)) + if 0 == self.__timeout: + self.__socket.settimeout(None) + else: + self.__socket.settimeout(self.__timeout/1000.0) + + def stop(self): + self.__socket.close() + + def __enter__(self): + # print('__enter__', self) + self.start() + return self + + def __exit__(self, exc_type, exc_value, traceback): + # print('__exit__', self) + self.stop() + + def __iter__(self): + # print('__iter__', self) + while True: + for item in self.next_events(): + yield item + + def next_events(self): + try: + data = self.__socket.recv(16384) + event = {} + for item in data.split(b'\x00'): + if not item: + # check if we have an event and if we already received it + if event and 'SEQNUM' in event: + event_seqnum = event['SEQNUM'] + if event_seqnum in self.__recieved_events: + pass + else: + # print("=", event_seqnum) + self.__recieved_events[event_seqnum] = event + length = len(self.__recieved_events) + # print("=", length) + if (length > 100): + self.__recieved_events.popitem(last=False) + yield event + event = {} + else: + try: + k, v = item.split(b'=', 1) + event[k.decode('ascii')] = v.decode('ascii') + # print("=",k,v) + except ValueError: + pass + except Exception: + yield {} + +class TransceiverEvent(object): + + def __init__(self): + pass + + @staticmethod + def _read_attr_value(attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + print("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + + @staticmethod + def handle_update_time_gap(swps_port_num): + cycle_limit = 10 + cycle_period = 0.1 + present_now = "ERR" + present_up = "0" + present_path = "/sys/class/swps/{}/present".format(swps_port_num) + + for i in range(0, cycle_limit): + present_now = TransceiverEvent._read_attr_value(present_path) + if present_up in present_now: + return True + time.sleep(cycle_period) + + print("handle_update_time_gap timeout!") + return False + + + @staticmethod + def get_transceiver_change_event(timeout=0): + STR_SWPS_MOD_NAME = "swps" + STR_EVENT_REMOVE = "remove" + STR_EVENT_ADD = "add" + STR_EVENT_ISOLATED = "ISOLATED" + + port_dict = {} + with NetlinkEventMonitor(timeout) as netlink_monitor: + for event in netlink_monitor: + if event and 'SUBSYSTEM' in event: + if event['SUBSYSTEM'] == STR_SWPS_MOD_NAME: + portname = event['DEVPATH'].split("/")[-1] + rc = re.match(r"port(?P\d+)",portname) + if rc is not None: + if event['ACTION'] == STR_EVENT_REMOVE: + remove_num = int(rc.group("num")) + port_dict[remove_num] = "0" + elif event['ACTION'] == STR_EVENT_ADD: + add_num = int(rc.group("num")) + port_dict[add_num] = "1" + if event['IF_TYPE'] == STR_EVENT_ISOLATED: + if not TransceiverEvent.handle_update_time_gap(event['DEVNAME']): + return True, {} + else: + port_dict = {} + return True, port_dict + return True, {} + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6356j/utils/inventec_d6356j_util.py b/platform/broadcom/sonic-platform-modules-inventec/d6356j/utils/inventec_d6356j_util.py new file mode 100755 index 00000000000..7f0ad5dbd19 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6356j/utils/inventec_d6356j_util.py @@ -0,0 +1,261 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Inventec, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV: ', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install() + elif arg == 'fast-reboot-install': + install(1) + elif arg == 'clean': + uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[D6356J]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +" with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + + +instantiate = [ +'echo inv_eeprom 0x55 > /sys/bus/i2c/devices/i2c-0/i2c-2/new_device' +#'echo inv_cpld 0x33 > /sys/bus/i2c/devices/i2c-0/i2c-2/new_device', +#'echo inv_cpld 0x77 > /sys/bus/i2c/devices/i2c-0/i2c-2/new_device' +] + + +drivers =[ +#kernel-dirvers +'gpio_ich', +'lpc_ich', +'i2c-i801', +'i2c-mux', +'i2c-mux-pca954x', +'i2c-mux-pca9541', +'i2c-dev', +'ucd9000', +#inv-modules +'inv_eeprom', +'inv_cpld', +'lm75', +'inv_psu', +'inv_platform', +'monitor', +'swps'] + + +# Modify for fast-reboot +def system_install(boot_option): + global FORCE + + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("rmmod i2c_ismt ", 1) + status, output = exec_cmd("rmmod i2c-i801 ", 1) + status, output = exec_cmd("rmmod gpio_ich ", 1) + status, output = exec_cmd("rmmod lpc_ich ", 1) + + #insert extra module + #status, output = exec_cmd("insmod /lib/modules/4.9.0-9-2-amd64/kernel/drivers/gpio/gpio-ich.ko gpiobase=0",1) + + #install drivers + ''' boot_option: 0 - normal, 1 - fast-reboot''' + for i in range(0,len(drivers)): + if drivers[i] == "swps": + if boot_option == 1: + status, output = exec_cmd("modprobe swps io_no_init=1", 1) + else: + status, output = exec_cmd("modprobe "+drivers[i], 1) + else: + status, output = exec_cmd("modprobe "+drivers[i], 1) + + if status: + print output + if FORCE == 0: + return status + + #instantiate devices + for i in range(0,len(instantiate)): + #time.sleep(1) + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status +# +# INV_FIX-4037 +# It replaces the original sff8436 driver with the optoe driver +# + #optoe map to i2c-bus + for i in range(14,22): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-6/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(22,30): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-7/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(30,38): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-8/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(38,46): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-9/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(46,54): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-10/i2c-10/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(54,62): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-11/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(62,70): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-12/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + + +def system_ready(): + if not device_found(): + return False + return True + +def install(boot_option=0): + ''' boot_option: 0 - normal, 1 - fast-reboot ''' + if not device_found(): + print "No device, installing...." + status = system_install(boot_option) + if status: + if FORCE == 0: + return status + else: + print "D6356J devices detected...." + return + +def uninstall(): + global FORCE + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"*0072", 0) + ret2, log = exec_cmd("ls "+i2c_prefix+"i2c-5", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/Makefile b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/Makefile new file mode 100644 index 00000000000..c13abd37e12 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/Makefile @@ -0,0 +1,6 @@ +obj-m += inv_cpld.o inv_psoc.o +obj-m += inv_platform.o +obj-m += inv_eeprom.o +obj-m += swps.o +obj-m += inv_pthread.o +swps-objs := inv_swps.o inv_mux.o io_expander.o transceiver.o diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_cpld.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_cpld.c new file mode 100644 index 00000000000..5ee4b26cdab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_cpld.c @@ -0,0 +1,526 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//#include "I2CHostCommunication.h" + +#define USE_SMBUS 1 + +/* definition */ +#define CPLD_INFO_OFFSET 0x00 +#define CPLD_PSU_OFFSET 0x08 +#define CPLD_LED_OFFSET 0x0E +#define CPLD_LED_STATU_OFFSET 0x0D +#define CPLD_CTL_OFFSET 0x0C +#define CPLD_BIOSCS_OFFSET 0x04 +#define CPLD_PSUFANLED_OFFSET 0x75 + +/* Each client has this additional data */ +struct cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; +}; + +/*-----------------------------------------------------------------------*/ + +static ssize_t cpld_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg[0].buf = msgbuf; + msg[0].len = 1; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + + status = i2c_transfer(client->adapter, msg, 2); + + if(status == 2) + status = count; + + return status; +#endif +} + +static ssize_t cpld_i2c_write(struct i2c_client *client, char *buf, unsigned offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + + return status; +#endif +} + +/*-----------------------------------------------------------------------*/ + +/* sysfs attributes for hwmon */ + +static ssize_t show_info(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[4]; + + memset(b, 0, 4); + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, b, CPLD_INFO_OFFSET, 4); + mutex_unlock(&data->update_lock); + + if(status != 4) return sprintf(buf, "read cpld info fail\n"); + + status = sprintf (buf, "The CPLD release date is %02d/%02d/%d.\n", b[2] & 0xf, (b[3] & 0x1f), 2014+(b[2] >> 4)); /* mm/dd/yyyy*/ + status = sprintf (buf, "%sThe PCB version is %X%X\n", buf, b[0]>>4, b[0]&0xf); + status = sprintf (buf, "%sThe CPLD version is %d.%d\n", buf, b[1]>>4, b[1]&0xf); + + return strlen(buf); +} + + +static ssize_t show_ctl(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[1]; + + mutex_lock(&data->update_lock); + + status = cpld_i2c_read(client, b, CPLD_CTL_OFFSET, 1); + + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld ctl fail\n"); + + + status = sprintf (buf, "0x%X\n", b[0]); + + return strlen(buf); +} + +static ssize_t set_ctl(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + + u8 temp = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_CTL_OFFSET, 1); + if(temp) byte |= (1<<0); + else byte &= ~(1<<0); + cpld_i2c_write(client, &byte, CPLD_CTL_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_bios_cs(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[1]; + + mutex_lock(&data->update_lock); + + status = cpld_i2c_read(client, b, CPLD_BIOSCS_OFFSET, 1); + + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld BIOS_CS fail\n"); + + + status = sprintf (buf, "0x%X\n", b[0] & 0x01); + + return strlen(buf); +} + +static ssize_t set_bios_cs(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + + u8 temp = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_BIOSCS_OFFSET, 1); + if(temp) byte |= 0x01; + else byte &= ~(0x01); + cpld_i2c_write(client, &byte, CPLD_BIOSCS_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + + +static char* led_str[] = { + "OFF", //000 + "0.5 Hz", //001 + "1 Hz", //010 + "2 Hz", //011 + "4 Hz", //100 + "NA", //101 + "NA", //110 + "ON", //111 +}; + +static ssize_t show_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 0)?3:0; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld offset 0x%x\n", CPLD_LED_OFFSET); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d: %s\n", byte, led_str[byte]); + + return strlen(buf); +} + +static ssize_t set_led(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + u8 temp = simple_strtol(buf, NULL, 16); + u8 byte; + int shift = (attr->index == 0)?3:0; + + temp &= 0x7; + //validate temp value: 0,1,2,3,7, TBD + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + byte &= ~(0x7<update_lock); + + return count; +} + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu0 | psu1 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 1)?0:3; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + +static char* status_psufan_str[] = { + "OFF", //00 + "ON", //01 + "1 Hz", //10 + "2 Hz", //11 +}; + +static ssize_t show_psufan_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 red_status, grn_status, byte; + int shift = (attr->index == 0)?0:2; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_PSUFANLED_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte>>shift) & 0x33; + grn_status = byte >> 4; + red_status = byte & 0x03; + + return sprintf (buf, "0x%02x: Green %s , Red %s\n", byte, status_psufan_str[grn_status],status_psufan_str[red_status]); +} + +static ssize_t set_psufan_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int shift = (attr->index == 0)?0:2; + int mask = (attr->index == 0)?0xcc:0x33; + u8 temp = simple_strtol(buf, NULL, 16) & 0x33; + u8 byte = 0; + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_PSUFANLED_OFFSET, 1); + byte &= mask; + byte |= (temp<update_lock); + + return count; +} + + +static SENSOR_DEVICE_ATTR(info, S_IRUGO, show_info, 0, 0); +static SENSOR_DEVICE_ATTR(ctl, S_IWUSR|S_IRUGO, show_ctl, set_ctl, 0); + +static SENSOR_DEVICE_ATTR(grn_led, S_IWUSR|S_IRUGO, show_led, set_led, 0); +static SENSOR_DEVICE_ATTR(red_led, S_IWUSR|S_IRUGO, show_led, set_led, 1); + +static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu, 0, 0); +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu, 0, 1); + +static SENSOR_DEVICE_ATTR(fan_led, S_IWUSR|S_IRUGO, show_psufan_led, set_psufan_led, 0); +static SENSOR_DEVICE_ATTR(psu_led, S_IWUSR|S_IRUGO, show_psufan_led, set_psufan_led, 1); + +static SENSOR_DEVICE_ATTR(bios_cs, S_IWUSR|S_IRUGO, show_bios_cs, set_bios_cs, 0); + +static struct attribute *cpld_attributes[] = { + //info + &sensor_dev_attr_info.dev_attr.attr, + &sensor_dev_attr_ctl.dev_attr.attr, + + &sensor_dev_attr_grn_led.dev_attr.attr, + &sensor_dev_attr_red_led.dev_attr.attr, + + &sensor_dev_attr_psu0.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + + &sensor_dev_attr_fan_led.dev_attr.attr, + &sensor_dev_attr_psu_led.dev_attr.attr, + + &sensor_dev_attr_bios_cs.dev_attr.attr, + + NULL +}; + +static const struct attribute_group cpld_group = { + .attrs = cpld_attributes, +}; + +static struct attribute *cpld2_attributes[] = { + //info + &sensor_dev_attr_info.dev_attr.attr, + + NULL +}; + +static const struct attribute_group cpld2_group = { + .attrs = cpld2_attributes, +}; + + +/*-----------------------------------------------------------------------*/ + +/* device probe and removal */ + +static int +cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct cpld_data *data; + int status; + +// printk("+%s \n", __func__); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* Register sysfs hooks */ + if(id->driver_data==1) // CPLD2 + status = sysfs_create_group(&client->dev.kobj, &cpld2_group); + else // default CPLD1 + status = sysfs_create_group(&client->dev.kobj, &cpld_group); + + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &cpld_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &cpld_group); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id cpld_ids[] = { + { "inv_cpld" , 0, }, + { "inv_cpld2", 1, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, cpld_ids); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_cpld_init(void) +{ + return i2c_add_driver(&cpld_driver); +} + +static void __exit inv_cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("eddie.lan "); +MODULE_DESCRIPTION("inv cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_cpld_init); +module_exit(inv_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_eeprom.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_eeprom.c new file mode 100644 index 00000000000..7bb167d2e74 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_eeprom.c @@ -0,0 +1,181 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void inv_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } + +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t inv_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + inv_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute inv_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = inv_eeprom_read, +}; + +static int inv_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &inv_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int inv_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &inv_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id inv_eeprom_id[] = { + { "inv_eeprom", 0 }, + { } +}; + +static struct i2c_driver inv_eeprom_driver = { + .driver = { + .name = "inv_eeprom", + }, + .probe = inv_eeprom_probe, + .remove = inv_eeprom_remove, + .id_table = inv_eeprom_id, +}; + +module_i2c_driver(inv_eeprom_driver); + +MODULE_AUTHOR("Inventec"); +MODULE_DESCRIPTION("Inventec D6556 Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_mux.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_mux.c new file mode 100644 index 00000000000..a303527bec4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_mux.c @@ -0,0 +1,281 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include "io_expander.h" +#include "inv_mux.h" + +static struct mux_obj_s *mux_head_p = NULL; + + +/* ========== MUX object functions ========== + */ +int +_common_force_pull_gpio(int mem_addr, + int input, + int bit_offset){ + + unsigned int val = 0; + unsigned int targ = 0; + + /* Get current value */ + val = inl(mem_addr); + if (val == 0) { + SWPS_ERR("%s: inl:%d fail!\n", __func__, val); + return -1; + } + /* Count target value */ + switch (input) { + case 0: /* Pull Low */ + targ = (val & (~(1 << bit_offset))); + break; + case 1: /* Pull high */ + targ = (val | (1 << bit_offset)); + break; + default: + SWPS_ERR("%s: input state:%d incorrect!\n", + __func__, input); + return -1; + } + /* Setup gpio */ + outl(targ, mem_addr); + if (targ != inl(mem_addr)){ + SWPS_ERR("%s: outl:%d fail!\n", __func__, targ); + return -1; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + + +int +rangeley_force_pull_high(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +rangeley_force_pull_low(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +hedera_force_pull_high(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 1, 5); +} + + +int +hedera_force_pull_low(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 0, 5); +} + + +int +normal_gpio_pull_high(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 1); +} + + +int +normal_gpio_pull_low(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 0); +} + + +int +pca9548_reset_mux_all(struct mux_obj_s *self){ + /* [Note] Power-on reset (PCA9548A-NXP) + * When power is applied to VDD, an internal Power-On Reset (POR) + * holds the PCA9548A in a reset condition until VDD has reached + * VPOR. At this point, the reset condition is released and the + * PCA9548A register and I2C-bus state machine are initialized to + * their default states (all zeroes) causing all the channels to + * be deselected. Thereafter, VDD must be lowered below 0.2 V for + * at least 5 us in order to reset the device. + */ + if (self->_pull_low(self) < 0) { + SWPS_ERR("%s: _pull_low fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS); + if (self->_pull_high(self) < 0) { + SWPS_ERR("%s: _pull_high fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS); + return 0; +} + + +int +common_reset_mux_all(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +init_gpio_4_force(struct mux_obj_s *self){ + return 0; +} + + +int +init_gpio_4_normal(struct mux_obj_s *self){ + + int err = 0; + + if (!gpio_is_valid(self->gpio_num)) { + SWPS_ERR("%s: GIPO:%d isn't valid\n", __func__, self->gpio_num); + return -1; + } + err = gpio_request(self->gpio_num, MUX_GPIO_LABEL); + if (err < 0) { + SWPS_ERR("%s: gpio_request fail :%d :%d\n", + __func__, err, self->gpio_num); + return -1; + } + SWPS_DEBUG("%s: gpio_request:%d ok.\n", __func__, self->gpio_num); + return 0; +} + + +static int +_setup_muxctl_cb(struct mux_obj_s *self, + unsigned gpio){ + + char mod_dsc[32] = "ERR"; + + switch (gpio) { + case MUX_RST_GPIO_FORCE_RANGELEY: + self->gpio_num = gpio; + self->_pull_low = rangeley_force_pull_low; + self->_pull_high = rangeley_force_pull_high; + self->_init = init_gpio_4_force; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Rangeley force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_FORCE_HEDERA: + self->gpio_num = gpio; + self->_pull_low = hedera_force_pull_low; + self->_pull_high = hedera_force_pull_high; + self->_init = init_gpio_4_force; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Hedera force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_48_PAC9548: + case MUX_RST_GPIO_69_PAC9548: + case MUX_RST_GPIO_249_PCA9548: + case MUX_RST_GPIO_500_PAC9548: + case MUX_RST_GPIO_505_PCA9548: + self->gpio_num = gpio; + self->_pull_low = normal_gpio_pull_low; + self->_pull_high = normal_gpio_pull_high; + self->_init = init_gpio_4_normal; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Normal mode :%d", (int)gpio); + goto ok_setup_muxctl_cb; + + default: + break; + } + SWPS_ERR("%s: Unexpected GPIO:%d\n", __func__, gpio); + return -1; + +ok_setup_muxctl_cb: + SWPS_INFO("muxctl: %s.\n", mod_dsc); + return 0; +} + + +/* ========== MUX public functions ========== + */ +void +clean_mux_gpio(void){ + + if (!mux_head_p) { + SWPS_DEBUG("%s: mux_head_p is NULL\n", __func__); + return; + } + if (gpio_is_valid(mux_head_p->gpio_num)) { + gpio_free(mux_head_p->gpio_num); + } + kfree(mux_head_p); + mux_head_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} + + +int +reset_mux_gpio(void){ + + if (!mux_head_p) { + SWPS_ERR("%s: MUX ctl object doesn't exist!\n", __func__); + return -1; + } + if (mux_head_p->reset(mux_head_p) < 0){ + SWPS_ERR("%s: reset fail!\n", __func__); + return -1; + } + return 0; +} + + +int +init_mux_gpio(unsigned gpio){ + + /* Create MUX control object */ + if (mux_head_p) { + SWPS_DEBUG("%s: mux_head_p is not NULL!\n", __func__); + clean_mux_gpio(); + } + /* Currently, it is using single muxctl architecture. + * In the future, it may use the multi-muxctl if HW add new features. + * (Ex: Port power-status control) + */ + mux_head_p = kzalloc(sizeof(struct mux_obj_s), GFP_KERNEL); + if (!mux_head_p) { + SWPS_ERR("%s: kzalloc fail!\n", __func__); + return -1; + } + /* Initial MUX controller */ + if (_setup_muxctl_cb(mux_head_p, gpio) < 0){ + SWPS_ERR("%s: _setup_muxctl_cb fail!\n", __func__); + return -1; + } + if (mux_head_p->_init(mux_head_p) < 0) { + SWPS_ERR("%s: init() fail\n", __func__); + goto err_init_mux_gpio; + } + /* Setup default value */ + if (mux_head_p->_pull_high(mux_head_p) < 0) { + SWPS_ERR("%s: setup default fail!\n", __func__); + goto err_init_mux_gpio; + } + return 0; + +err_init_mux_gpio: + clean_mux_gpio(); + return -1; +} + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_mux.h b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_mux.h new file mode 100644 index 00000000000..f981a304644 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_mux.h @@ -0,0 +1,47 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef INV_MUX_H +#define INV_MUX_H + + +/* MUX basic information */ +#define MUX_GPIO_LABEL "SWPS_RST_MUX" + +/* MUX reset GPIO define */ +#define MUX_RST_GPIO_FORCE (30100) +#define MUX_RST_GPIO_FORCE_RANGELEY (30101) +#define MUX_RST_GPIO_FORCE_HEDERA (30102) +#define MUX_RST_GPIO_48_PAC9548 (48) +#define MUX_RST_GPIO_69_PAC9548 (69) +#define MUX_RST_GPIO_249_PCA9548 (249) +#define MUX_RST_GPIO_500_PAC9548 (500) +#define MUX_RST_GPIO_505_PCA9548 (505) + +/* MUX relate value define */ +#define MUX_RST_WAIT_MS (1) +#define MUX_RST_MEM_ADDR_RANGELEY (0) // TBD +#define MUX_RST_MEM_ADDR_HEDERA (0x548) + +struct mux_obj_s { + unsigned gpio_num; + int (*_pull_high)(struct mux_obj_s *self); + int (*_pull_low)(struct mux_obj_s *self); + int (*_init)(struct mux_obj_s *self); + int (*reset)(struct mux_obj_s *self); +}; + + +void clean_mux_gpio(void); +int reset_mux_gpio(void); +int init_mux_gpio(unsigned gpio); + + +#endif /* INV_MUX_H */ + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_platform.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_platform.c new file mode 100644 index 00000000000..26bd47300da --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_platform.c @@ -0,0 +1,215 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +struct inv_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +#define bus_id(id) (id) +static struct pca954x_platform_mode mux_modes_0[] = { + {.adap_id = bus_id(2),}, {.adap_id = bus_id(3),}, + {.adap_id = bus_id(4),}, {.adap_id = bus_id(5),}, + {.adap_id = bus_id(6),}, {.adap_id = bus_id(7),}, + {.adap_id = bus_id(8),}, {.adap_id = bus_id(9),}, +}; +static struct pca954x_platform_mode mux_modes_0_0[] = { + {.adap_id = bus_id(10),}, {.adap_id = bus_id(11),}, + {.adap_id = bus_id(12),}, {.adap_id = bus_id(13),}, + {.adap_id = bus_id(14),}, {.adap_id = bus_id(15),}, + {.adap_id = bus_id(16),}, {.adap_id = bus_id(17),}, +}; + +static struct pca954x_platform_mode mux_modes_0_1[] = { + {.adap_id = bus_id(18),}, {.adap_id = bus_id(19),}, + {.adap_id = bus_id(20),}, {.adap_id = bus_id(21),}, + {.adap_id = bus_id(22),}, {.adap_id = bus_id(23),}, + {.adap_id = bus_id(24),}, {.adap_id = bus_id(25),}, +}; + +static struct pca954x_platform_mode mux_modes_0_2[] = { + {.adap_id = bus_id(26),}, {.adap_id = bus_id(27),}, + {.adap_id = bus_id(28),}, {.adap_id = bus_id(29),}, + {.adap_id = bus_id(30),}, {.adap_id = bus_id(31),}, + {.adap_id = bus_id(32),}, {.adap_id = bus_id(33),}, +}; + +static struct pca954x_platform_mode mux_modes_0_3[] = { + {.adap_id = bus_id(34),}, {.adap_id = bus_id(35),}, + {.adap_id = bus_id(36),}, {.adap_id = bus_id(37),}, + {.adap_id = bus_id(38),}, {.adap_id = bus_id(39),}, + {.adap_id = bus_id(40),}, {.adap_id = bus_id(41),}, +}; + +static struct pca954x_platform_mode mux_modes_0_4[] = { + {.adap_id = bus_id(42),}, {.adap_id = bus_id(43),}, + {.adap_id = bus_id(44),}, {.adap_id = bus_id(45),}, + {.adap_id = bus_id(46),}, {.adap_id = bus_id(47),}, + {.adap_id = bus_id(48),}, {.adap_id = bus_id(49),}, +}; + +static struct pca954x_platform_mode mux_modes_0_5[] = { + {.adap_id = bus_id(50),}, {.adap_id = bus_id(51),}, + {.adap_id = bus_id(52),}, {.adap_id = bus_id(53),}, + {.adap_id = bus_id(54),}, {.adap_id = bus_id(55),}, + {.adap_id = bus_id(56),}, {.adap_id = bus_id(57),}, +}; + +static struct pca954x_platform_mode mux_modes_0_6[] = { + {.adap_id = bus_id(58),}, {.adap_id = bus_id(59),}, + {.adap_id = bus_id(60),}, {.adap_id = bus_id(61),}, + {.adap_id = bus_id(62),}, {.adap_id = bus_id(63),}, + {.adap_id = bus_id(64),}, {.adap_id = bus_id(65),}, +}; + +//no i2c device driver attach to mux 7 + + +static struct pca954x_platform_data mux_data_0 = { + .modes = mux_modes_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_0 = { + .modes = mux_modes_0_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_1 = { + .modes = mux_modes_0_1, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_2 = { + .modes = mux_modes_0_2, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_3 = { + .modes = mux_modes_0_3, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_4 = { + .modes = mux_modes_0_4, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_5 = { + .modes = mux_modes_0_5, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_6 = { + .modes = mux_modes_0_6, + .num_modes = 8, +}; + +static struct i2c_board_info i2c_device_info0[] __initdata = { + {"pca9548", 0, 0x70, &mux_data_0, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info2[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_0, 0, 0}, +}; +static struct i2c_board_info i2c_device_info3[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_1, 0, 0}, +}; +static struct i2c_board_info i2c_device_info4[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_2, 0, 0}, +}; +static struct i2c_board_info i2c_device_info5[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_3, 0, 0}, +}; +static struct i2c_board_info i2c_device_info6[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_4, 0, 0}, +}; +static struct i2c_board_info i2c_device_info7[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_5, 0, 0}, +}; +static struct i2c_board_info i2c_device_info8[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_6, 0, 0}, +}; + + +static struct inv_i2c_board_info i2cdev_list[] = { + {bus_id(1), ARRAY_SIZE(i2c_device_info0), i2c_device_info0 }, //mux root + + {bus_id(2), ARRAY_SIZE(i2c_device_info2), i2c_device_info2 }, //mux 0 + {bus_id(3), ARRAY_SIZE(i2c_device_info3), i2c_device_info3 }, //mux 1 + {bus_id(4), ARRAY_SIZE(i2c_device_info4), i2c_device_info4 }, //mux 2 + {bus_id(5), ARRAY_SIZE(i2c_device_info5), i2c_device_info5 }, //mux 3 + {bus_id(6), ARRAY_SIZE(i2c_device_info6), i2c_device_info6 }, //mux 4 + {bus_id(7), ARRAY_SIZE(i2c_device_info7), i2c_device_info7 }, //mux 5 + {bus_id(8), ARRAY_SIZE(i2c_device_info8), i2c_device_info8 }, //mux 6 +}; + +///////////////////////////////////////////////////////////////////////////////////////// +static struct i2c_gpio_platform_data i2c_gpio_platdata0 = { + .scl_pin = 238, + .sda_pin = 255, + + .udelay = 5, //5:100kHz + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .scl_is_output_only = 0 +}; + +static struct platform_device device_i2c_gpio0 = { + .name = "i2c-gpio", + .id = 1, // adapter number + .dev.platform_data = &i2c_gpio_platdata0, +}; + +static int __init inv_platform_init(void) +{ + struct i2c_adapter *adap = NULL; + struct i2c_client *e = NULL; + int ret = 0; + int i,j,k; + + //use i2c-gpio + //register i2c gpio + //config gpio58,75 to gpio function 58=32+3*8+2 75=32*2+8*1+3 gpio69=32*2+8*0+5 + outl( inl(0x533) | (1<<2), 0x533); + outl( inl(0x541) | (1<<3), 0x541); + outl( inl(0x540) | (1<<5), 0x540); //RST_I2C_MUX_N (GPIO69) + outl( inl(0x500) | (1<<7), 0x500); //SYS_RDY_N (GPIO7) + outl( inl(0x501) | (1<<7), 0x501); //BMC_HEART_BEAT (GPIO15) + outl( inl(0x503) | (1<<2)|(1<<3), 0x503); //PSOC_HEART_BEAT(26),CPLD_HEART_BEAT(27) + + + ret = platform_device_register(&device_i2c_gpio0); + if (ret) { + printk(KERN_ERR "i2c-gpio: device_i2c_gpio0 register fail %d\n", ret); + } + mdelay(500); //wait for device_i2c_gpio register successfully + + for(i=0; i +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#define SWITCH_TEMPERATURE_SOCK "/proc/switch/temp" +#define PSOC_POLLING_PERIOD 1000 + +#include +#include +#include +#include + +#define IPMI_MAX_INTF (4) +#define NETFN_OEM 0x30 +#define CMD_GETDATA 0x31 +#define CMD_SETDATA 0x32 +#define FAN_NUM 4 +#define PSU_NUM 2 + +#define FAN_CLEI_SUPPORT 1 +#define PSU_CLEI_SUPPORT 0 + +#define PSU1 0x5800 +#define PSU2 0x5900 +#define BMC_PMBusNumber 3 +#define PMBus_Vendor 0x99 +#define PMBus_Serial 0x9E +#define PMBus_Temp2 0x8E +#define PMBus_Version 0x9B +#define MaxLeng_Result 0x40 + +#define BMC_FanCLEIBusNumber 9 +#define DEVICE_CLEI_ADDR 0x52,0x53,0x54,0x55,0x56,0x50,0x51 + +#define MAX_IPMI_RECV_LENGTH 0xff +static char CLEI_ADDR[]={DEVICE_CLEI_ADDR}; +struct task_struct *kthread_auto_update; +static long pmbus_reg2data_linear(int data, int linear16); +struct ipmi_result{ + char result[MAX_IPMI_RECV_LENGTH]; + int result_length; +}; + +DEFINE_MUTEX(ipmi_mutex); +DEFINE_MUTEX(ipmi2_mutex); +static struct ipmi_result ipmiresult; +static struct device *hwmon_dev; +static struct kobject *device_kobj; +static ipmi_user_t ipmi_mh_user = NULL; +static void msg_handler(struct ipmi_recv_msg *msg,void* handler_data); +static struct ipmi_user_hndl ipmi_hndlrs = { .ipmi_recv_hndl = msg_handler,}; + +static atomic_t dummy_count = ATOMIC_INIT(0); +static void dummy_smi_free(struct ipmi_smi_msg *msg) +{ + atomic_dec(&dummy_count); +} +static void dummy_recv_free(struct ipmi_recv_msg *msg) +{ + atomic_dec(&dummy_count); +} +static struct ipmi_smi_msg halt_smi_msg = { + .done = dummy_smi_free +}; +static struct ipmi_recv_msg halt_recv_msg = { + .done = dummy_recv_free +}; + +struct __attribute__ ((__packed__)) psoc_psu_layout { + u16 psu1_iin; + u16 psu2_iin; + u16 psu1_iout; + u16 psu2_iout; + + u16 psu1_pin; + u16 psu2_pin; + u16 psu1_pout; + u16 psu2_pout; + + u16 psu1_vin; + u16 psu2_vin; + u16 psu1_vout; + u16 psu2_vout; +}; + +struct __attribute__ ((__packed__)) clei { + u8 issue_number[3]; + u8 abbreviation_number[9]; + u8 fc_number[10]; + u8 clei_code[10]; + u8 product_year_and_month[5]; + u8 label_location_code[2]; + u8 serial_number[5]; + u8 pcb_revision[5]; + u8 vendor_name[10]; + u8 reserved[5]; +}; + +struct __attribute__ ((__packed__)) psoc_layout { + u8 ctl; //offset: 0 + u16 switch_temp; //offset: 1 + + // BYTE[03:20] - voltage + u16 voltage[15]; //offset: 0x03-0x20 + + // BYTE[21:27] - ExtFan + u8 led_ctl2; //offset: 21 + u8 ext_pwm; //offset: 22 + u16 ext_rpm[2]; //offset: 23 + u8 gpi_fan2; //offset: 27 + + //gpo + u8 led_ctl; //offset: 28 + + u8 gpio; //offset: 29 + + //pwm duty + u8 pwm[4]; //offset: 2a + u8 pwm_psu[2]; //offset: 2e + + //fan rpm + u16 fan[4*2]; //offset: 30 + + u8 reserve1[4]; //offset: 40 + + //gpi + u8 gpi_fan; //offset: 44 + + //psu state + u8 psu_state; //offset: 45 + + //temperature + u16 temp[5]; //offset: 46 + u16 temp_psu[2]; //offset: 50 + + //version + u8 version[2]; //offset: 54 + + u8 reserve2[4]; //offset: 56 + struct psoc_psu_layout psu_info; //offset: 5a +}; + +/* definition */ +#define PSOC_OFF(m) offsetof(struct psoc_layout, m) +#define PSOC_PSU_OFF(m) offsetof(struct psoc_psu_layout, m) + +#define SWITCH_TMP_OFFSET PSOC_OFF(switch_temp) +#define PWM_OFFSET PSOC_OFF(pwm) +#define THERMAL_OFFSET PSOC_OFF(temp) +#define RPM_OFFSET PSOC_OFF(fan) +#define DIAG_FLAG_OFFSET PSOC_OFF(ctl) +#define FAN_LED_OFFSET PSOC_OFF(led_ctl) +#define FAN_GPI_OFFSET PSOC_OFF(gpi_fan) +#define PSOC_PSU_OFFSET PSOC_OFF(psu_state) +#define VERSION_OFFSET PSOC_OFF(version) +#define PSU_INFO_OFFSET PSOC_OFF(psu_info) + +#define PWM2_OFFSET PSOC_OFF(ext_pwm) +#define RPM2_OFFSET PSOC_OFF(ext_rpm) +#define FAN_LED2_OFFSET PSOC_OFF(led_ctl2) +#define FAN_GPI2_OFFSET PSOC_OFF(gpi_fan2) + +#define CLEI_OFF(m) offsetof(struct clei, m) +#define FAN1_CLEI_INDEX 0 +#define FAN2_CLEI_INDEX 1 +#define FAN3_CLEI_INDEX 2 +#define FAN4_CLEI_INDEX 3 +#define FAN5_CLEI_INDEX 4 +#define PSU1_CLEI_INDEX 5 +#define PSU2_CLEI_INDEX 6 + +static void msg_handler(struct ipmi_recv_msg *recv_msg,void* handler_data) +{ + struct ipmi_result *msg_result = recv_msg->user_msg_data; + + if(recv_msg->msg.data[0]==0 && recv_msg->msg.data_len>0) { + msg_result->result_length=recv_msg->msg.data_len-1; + memcpy(msg_result->result, &recv_msg->msg.data[1], recv_msg->msg.data_len-1); + } + ipmi_free_recv_msg(recv_msg); + mutex_unlock(&ipmi_mutex); + + return; +} + +int start_ipmi_command(char NetFn, char cmd,char *data,int data_length, char* result, int* result_length) +{ + int rv=0,i; + int timeout; + + //wait previous command finish at least 50msec + timeout=50; + while((mutex_is_locked(&ipmi_mutex) == 1 || (mutex_is_locked(&ipmi2_mutex) == 1)) && (--timeout)>0) { usleep_range(1000,1010); } + if(timeout==0) { return -1; } + mutex_lock(&ipmi_mutex); + mutex_lock(&ipmi2_mutex); + + if(ipmi_mh_user == NULL) { + for (i=0,rv=1; i0) { usleep_range(1000,1100);} + if(timeout==0) { + mutex_unlock(&ipmi2_mutex); + return -1; + } + else { + *result_length=ipmiresult.result_length; + memcpy(result,ipmiresult.result,*result_length); + mutex_unlock(&ipmi2_mutex); + return 0; + } + } + return 0; +} +EXPORT_SYMBOL(start_ipmi_command); + +static ssize_t psoc_ipmi_read(u8 *buf, u8 offset, size_t count) +{ + uint8_t data[2]; + int result_len=0; + int rv; + + data[0] = offset; + data[1] = count; + + rv=start_ipmi_command(NETFN_OEM, CMD_GETDATA,data,2, buf, &result_len); + + return result_len; +} + +static ssize_t psoc_ipmi_write(char *buf, unsigned offset, size_t count) +{ + uint8_t data[count+1],result[1]; + int result_len; + + data[0] = offset; + memcpy(&data[1],buf,count); + + start_ipmi_command(NETFN_OEM, CMD_SETDATA,data,count+1, result, &result_len); + return count; +} + + +static u16 psoc_read16(u8 offset) +{ + u16 value = 0; + u8 buf[]={0,0}; + + if(psoc_ipmi_read(buf, offset, 2) == 2) + value = (buf[0]<<8 | buf[1]<<0); + + return value; +} + +static u8 psoc_read8(u8 offset) +{ + u8 value = 0; + u8 buf = 0; + + if(psoc_ipmi_read(&buf, offset, 1) == 1) + value = buf; + + return value; +} + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu1 | psu0 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu_st(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 byte=0; + int shift = (attr->index == 0)?3:0; + + status = psoc_ipmi_read(&byte, PSOC_PSU_OFFSET, 1); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + +static ssize_t show_ipmi_pmbus(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + uint8_t data[4],result[MaxLeng_Result]; + int result_len=0; + + data[0] = BMC_PMBusNumber; + data[1] = (attr->index & 0xFF00 ) >>7; + data[3] = attr->index & 0xff; + if(data[3]==PMBus_Temp2) + {data[2]=2;} + else + {data[2]=MaxLeng_Result;} + + if(start_ipmi_command(0x06, 0x52,data,4, result, &result_len)==0) + { + if(data[3]==PMBus_Temp2) + { + return sprintf(buf, "%ld \n", pmbus_reg2data_linear(result[0] | (result[1]<<8), 0 )); + } + result[result[0]+1]='\0'; + return sprintf(buf, "%s\n",&result[1] ); + } + else + { + return 0; + } +} + +static ssize_t show_clei(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 device_index = attr->index & 0xFF; + + uint8_t data[5],result[MaxLeng_Result]; + int result_len=0; + + data[0] = (device_index<=FAN5_CLEI_INDEX) ? BMC_FanCLEIBusNumber:BMC_PMBusNumber; + data[1] = CLEI_ADDR[device_index]<<1; + data[2] = sizeof(struct clei); + data[3] = (device_index<=FAN5_CLEI_INDEX) ? 0x00 : 0x01; //PSU CLEI will start from 0x0100 + data[4] = 0; + + if(start_ipmi_command(0x06, 0x52,data,5, result, &result_len)==0) + { + if(result_len < sizeof(struct clei)) memset(result, 0, sizeof(struct clei)); + sprintf (buf, "Issue Number: %.3s\n", &result[CLEI_OFF(issue_number)]); + sprintf (buf, "%sAbbreviation Number: %.9s\n", buf, &result[CLEI_OFF(abbreviation_number)]); + sprintf (buf, "%sFC Number: %.10s\n", buf, &result[CLEI_OFF(fc_number)]); + sprintf (buf, "%sCLEI Code: %.10s\n", buf, &result[CLEI_OFF(clei_code)]); + sprintf (buf, "%sProduct Year and Month: %.5s\n", buf, &result[CLEI_OFF(product_year_and_month)]); + sprintf (buf, "%s2D Label Location Code: %.2s\n", buf, &result[CLEI_OFF(label_location_code)]); + sprintf (buf, "%sSerial Number: %.5s\n", buf, &result[CLEI_OFF(serial_number)]); + sprintf (buf, "%sPCB Revision: %.5s\n", buf, &result[CLEI_OFF(pcb_revision)]); + sprintf (buf, "%sVendor Name: %.10s\n", buf, &result[CLEI_OFF(vendor_name)]); + return strlen(buf); + } + else + { + return sprintf(buf, "NONE\n"); + } +} + +static ssize_t show_thermal(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index * 2 + THERMAL_OFFSET; + + status = psoc_read16(offset); + + return sprintf(buf, "%d\n", + (s8)(status>>8) * 1000 ); +} + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index; + + status = psoc_read8(offset); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t set_pwm(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index; + u8 pwm = simple_strtol(buf, NULL, 10); + if(pwm > 255) pwm = 255; + psoc_ipmi_write(&pwm, offset, 1); + + return count; +} + + +static ssize_t show_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index; + status = psoc_read16(offset); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t show_switch_tmp(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + u16 temp = 0; + + status = psoc_ipmi_read((u8*)&temp, SWITCH_TMP_OFFSET, 2); + + status = sprintf (buf, "%d\n", (s8)(temp>>8) * 1000 ); + + return strlen(buf); +} + +static ssize_t set_switch_tmp(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + long temp = simple_strtol(buf, NULL, 10); + u16 temp2 = ( (temp/1000) <<8 ) & 0xFF00 ; + + psoc_ipmi_write((u8*)&temp2, SWITCH_TMP_OFFSET, 2); + + + return count; +} + +static ssize_t show_diag(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + u8 diag_flag = 0; + + status = psoc_ipmi_read((u8*)&diag_flag, DIAG_FLAG_OFFSET, 1); + + status = sprintf (buf, "%d\n", ((diag_flag & 0x80)?1:0)); + + return strlen(buf); +} + +static ssize_t set_diag(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + u8 value = 0; + u8 diag = simple_strtol(buf, NULL, 10); + + diag = diag?1:0; + + psoc_ipmi_read((u8*)&value, DIAG_FLAG_OFFSET, 1); + if(diag) value |= (1<<7); + else value &= ~(1<<7); + psoc_ipmi_write((u8*)&value, DIAG_FLAG_OFFSET, 1); + + return count; +} + +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + + status = psoc_read16(VERSION_OFFSET); + + return sprintf(buf, "ver: %x.%x\n", (status & 0xFF00)>>8, (status & 0xFF) ); +} + + +static ssize_t show_fan_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 bit = attr->index; + + if(bit < 8) { status = psoc_read8(FAN_LED_OFFSET); } +#if FAN_NUM>4 + if(bit >= 8) { status = psoc_read8(FAN_LED2_OFFSET); bit-=8; } +#endif + + return sprintf(buf, "%d\n", + (status & (1<index; + u8 led_state = 0; + + u8 v = simple_strtol(buf, NULL, 10); + + if(attr->index < 8) { led_state = psoc_read8(FAN_LED_OFFSET ); } +#if FAN_NUM>4 + if(attr->index >= 8) { led_state = psoc_read8(FAN_LED2_OFFSET); bit-=8; } +#endif + if(v) led_state |= (1<index < 8) { psoc_ipmi_write(&led_state, FAN_LED_OFFSET, 1);} +#if FAN_NUM>4 + if(attr->index >= 8) { psoc_ipmi_write(&led_state, FAN_LED2_OFFSET,1);} +#endif + return count; +} + +static ssize_t show_value8(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index; + + status = psoc_read8(offset); + + return sprintf(buf, "0x%02X\n", status ); +} + +static long pmbus_reg2data_linear(int data, int linear16) +{ + s16 exponent; + s32 mantissa; + long val; + + if (linear16) { /* LINEAR16 */ + exponent = -9; + mantissa = (u16) data; + } else { /* LINEAR11 */ + exponent = ((s16)data) >> 11; + exponent = ((s16)( data & 0xF800) ) >> 11; + mantissa = ((s32)((data & 0x7ff) << 5)) >> 5; + } + + //printk("data=%d, m=%d, e=%d\n", data, exponent, mantissa); + val = mantissa; + + /* scale result to micro-units for power sensors */ + val = val * 1000L; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +static ssize_t show_psu_psoc(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index + PSU_INFO_OFFSET; + + status = psoc_read16(offset); + + if((strstr(attr->dev_attr.attr.name, "vout")!=NULL)|(strstr(attr->dev_attr.attr.name, "in3")!=NULL)|(strstr(attr->dev_attr.attr.name, "in4")!=NULL)) { + offset=1; + } + else { + offset=0; + } + + return sprintf(buf, "%ld \n", pmbus_reg2data_linear(status, offset )); +} + +static ssize_t show_name(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + return sprintf(buf, "inv_psoc\n"); +} + +static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_thermal, 0, 0); +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_thermal, 0, 1); +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_thermal, 0, 2); +static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_thermal, 0, 3); +static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_thermal, 0, 4); +static SENSOR_DEVICE_ATTR(thermal_psu1, S_IRUGO, show_thermal, 0, 5); +static SENSOR_DEVICE_ATTR(thermal_psu2, S_IRUGO, show_thermal, 0, 6); +static SENSOR_DEVICE_ATTR(temp7_input, S_IRUGO, show_thermal, 0, 5); +static SENSOR_DEVICE_ATTR(temp8_input, S_IRUGO, show_thermal, 0, 6); + +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 0 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 1 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 2 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 3 + PWM_OFFSET); +#if FAN_NUM > 4 +static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 0 + PWM2_OFFSET); +#endif +static SENSOR_DEVICE_ATTR(pwm_psu1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 4 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm_psu2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 5 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm6, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 4 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm7, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 5 + PWM_OFFSET); + +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu_st, 0, 0); +static SENSOR_DEVICE_ATTR(psu2, S_IRUGO, show_psu_st, 0, 1); + +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_rpm, 0, 0*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_rpm, 0, 1*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_rpm, 0, 2*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_rpm, 0, 3*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_rpm, 0, 4*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_rpm, 0, 5*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_rpm, 0, 6*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_rpm, 0, 7*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(rpm_psu1, S_IRUGO, show_rpm, 0, 8*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(rpm_psu2, S_IRUGO, show_rpm, 0, 9*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan11_input, S_IRUGO, show_rpm, 0, 8*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan12_input, S_IRUGO, show_rpm, 0, 9*2 + RPM_OFFSET); + +#if FAN_NUM > 4 +static SENSOR_DEVICE_ATTR(fan9_input , S_IRUGO, show_rpm, 0,0*2 + RPM2_OFFSET); +static SENSOR_DEVICE_ATTR(fan10_input, S_IRUGO, show_rpm, 0,1*2 + RPM2_OFFSET); +#endif + +static SENSOR_DEVICE_ATTR(switch_tmp, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); +static SENSOR_DEVICE_ATTR(temp6_input, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); + +static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, 0, 0); + +static SENSOR_DEVICE_ATTR(fan_led_grn1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 0); +static SENSOR_DEVICE_ATTR(fan_led_grn2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 1); +static SENSOR_DEVICE_ATTR(fan_led_grn3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 2); +static SENSOR_DEVICE_ATTR(fan_led_grn4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 3); +static SENSOR_DEVICE_ATTR(fan_led_red1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 4); +static SENSOR_DEVICE_ATTR(fan_led_red2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 5); +static SENSOR_DEVICE_ATTR(fan_led_red3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 6); +static SENSOR_DEVICE_ATTR(fan_led_red4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 7); + +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(fan_led_grn5, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 8); +static SENSOR_DEVICE_ATTR(fan_led_red5, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 12); +static SENSOR_DEVICE_ATTR(fan_gpi2, S_IRUGO, show_value8, 0, FAN_GPI2_OFFSET); +#endif + +static SENSOR_DEVICE_ATTR(fan_gpi, S_IRUGO, show_value8, 0, FAN_GPI_OFFSET); +static SENSOR_DEVICE_ATTR(psoc_psu1_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pout)); + +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vout)); +static SENSOR_DEVICE_ATTR(curr3_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iout)); +static SENSOR_DEVICE_ATTR(power3_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pout)); + +static SENSOR_DEVICE_ATTR(psoc_psu2_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pout)); + +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); +static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vout)); +static SENSOR_DEVICE_ATTR(curr4_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iout)); +static SENSOR_DEVICE_ATTR(power4_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pout)); + +//IPMI +static SENSOR_DEVICE_ATTR(thermal2_psu1, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Temp2); +static SENSOR_DEVICE_ATTR(temp9_input, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Temp2); + +static SENSOR_DEVICE_ATTR(psoc_psu1_vendor, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Vendor); +static SENSOR_DEVICE_ATTR(psoc_psu1_serial, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Serial); +static SENSOR_DEVICE_ATTR(psoc_psu1_version, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Version); + +static SENSOR_DEVICE_ATTR(thermal2_psu2, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Temp2); +static SENSOR_DEVICE_ATTR(temp10_input, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Temp2); +static SENSOR_DEVICE_ATTR(psoc_psu2_vendor, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Vendor); +static SENSOR_DEVICE_ATTR(psoc_psu2_serial, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Serial); +static SENSOR_DEVICE_ATTR(psoc_psu2_version, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Version); + +//CLEI +#if FAN_CLEI_SUPPORT +static SENSOR_DEVICE_ATTR(fan1_clei, S_IRUGO, show_clei, 0, FAN1_CLEI_INDEX ); +static SENSOR_DEVICE_ATTR(fan2_clei, S_IRUGO, show_clei, 0, FAN2_CLEI_INDEX ); +static SENSOR_DEVICE_ATTR(fan3_clei, S_IRUGO, show_clei, 0, FAN3_CLEI_INDEX ); +static SENSOR_DEVICE_ATTR(fan4_clei, S_IRUGO, show_clei, 0, FAN4_CLEI_INDEX ); +#if FAN_NUM > 4 +static SENSOR_DEVICE_ATTR(fan5_clei, S_IRUGO, show_clei, 0, FAN5_CLEI_INDEX ); +#endif +#endif + +#if PSU_CLEI_SUPPORT +static SENSOR_DEVICE_ATTR(psu1_clei, S_IRUGO, show_clei, 0, PSU1_CLEI_INDEX ); +static SENSOR_DEVICE_ATTR(psu2_clei, S_IRUGO, show_clei, 0, PSU2_CLEI_INDEX ); +#endif + +static struct attribute *psoc_attributes[] = { + //name + &dev_attr_name.attr, + //thermal + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_temp4_input.dev_attr.attr, + &sensor_dev_attr_temp5_input.dev_attr.attr, + &sensor_dev_attr_thermal_psu1.dev_attr.attr, + &sensor_dev_attr_thermal_psu2.dev_attr.attr, + + &sensor_dev_attr_temp7_input.dev_attr.attr, + &sensor_dev_attr_temp8_input.dev_attr.attr, + + //pwm + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, +#if FAN_NUM > 4 + &sensor_dev_attr_pwm5.dev_attr.attr, +#endif + &sensor_dev_attr_pwm_psu1.dev_attr.attr, + &sensor_dev_attr_pwm_psu2.dev_attr.attr, + &sensor_dev_attr_pwm6.dev_attr.attr, + &sensor_dev_attr_pwm7.dev_attr.attr, + + //rpm + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_fan8_input.dev_attr.attr, +#if FAN_NUM > 4 + &sensor_dev_attr_fan9_input.dev_attr.attr, + &sensor_dev_attr_fan10_input.dev_attr.attr, +#endif + &sensor_dev_attr_rpm_psu1.dev_attr.attr, + &sensor_dev_attr_rpm_psu2.dev_attr.attr, + &sensor_dev_attr_fan11_input.dev_attr.attr, + &sensor_dev_attr_fan12_input.dev_attr.attr, + //switch temperature + &sensor_dev_attr_switch_tmp.dev_attr.attr, + &sensor_dev_attr_temp6_input.dev_attr.attr, + + //diag flag + &sensor_dev_attr_diag.dev_attr.attr, + + //version + &sensor_dev_attr_version.dev_attr.attr, + + //fan led + &sensor_dev_attr_fan_led_grn1.dev_attr.attr, + &sensor_dev_attr_fan_led_grn2.dev_attr.attr, + &sensor_dev_attr_fan_led_grn3.dev_attr.attr, + &sensor_dev_attr_fan_led_grn4.dev_attr.attr, + &sensor_dev_attr_fan_led_red1.dev_attr.attr, + &sensor_dev_attr_fan_led_red2.dev_attr.attr, + &sensor_dev_attr_fan_led_red3.dev_attr.attr, + &sensor_dev_attr_fan_led_red4.dev_attr.attr, +#if FAN_NUM >4 + &sensor_dev_attr_fan_led_grn5.dev_attr.attr, + &sensor_dev_attr_fan_led_red5.dev_attr.attr, + &sensor_dev_attr_fan_gpi2.dev_attr.attr, +#endif + //fan GPI + &sensor_dev_attr_fan_gpi.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + &sensor_dev_attr_psu2.dev_attr.attr, + + + //psu_psoc + &sensor_dev_attr_psoc_psu1_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pout.dev_attr.attr, + + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_in3_input.dev_attr.attr, + &sensor_dev_attr_curr3_input.dev_attr.attr, + &sensor_dev_attr_power3_input.dev_attr.attr, + &sensor_dev_attr_in4_input.dev_attr.attr, + &sensor_dev_attr_curr4_input.dev_attr.attr, + &sensor_dev_attr_power4_input.dev_attr.attr, + + //ipmi_i2c_command + &sensor_dev_attr_thermal2_psu1.dev_attr.attr, + &sensor_dev_attr_temp9_input.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_vendor.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_serial.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_version.dev_attr.attr, + + &sensor_dev_attr_thermal2_psu2.dev_attr.attr, + &sensor_dev_attr_temp10_input.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vendor.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_serial.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_version.dev_attr.attr, + + //clei +#if FAN_CLEI_SUPPORT + &sensor_dev_attr_fan1_clei.dev_attr.attr, + &sensor_dev_attr_fan2_clei.dev_attr.attr, + &sensor_dev_attr_fan3_clei.dev_attr.attr, + &sensor_dev_attr_fan4_clei.dev_attr.attr, +#if FAN_NUM > 4 + &sensor_dev_attr_fan5_clei.dev_attr.attr, +#endif +#endif + +#if PSU_CLEI_SUPPORT + &sensor_dev_attr_psu1_clei.dev_attr.attr, + &sensor_dev_attr_psu2_clei.dev_attr.attr, +#endif + NULL +}; + +static const struct attribute_group psoc_group = { + .attrs = psoc_attributes, +}; + +//================================= +static void check_switch_temp(void) +{ + static struct file *f; + mm_segment_t old_fs; + + set_fs(get_ds()); + f = filp_open(SWITCH_TEMPERATURE_SOCK,O_RDONLY,0644); + if(IS_ERR(f)) { + return; + } + else { + char temp_str[]={0,0,0,0,0,0,0}; + loff_t pos = 0; + u16 temp2 = 0; + old_fs = get_fs(); + set_fs(KERNEL_DS); + vfs_read(f, temp_str,6,&pos); + temp2 = ((simple_strtoul(temp_str,NULL,10)/1000) <<8 ) & 0xFF00 ; + psoc_ipmi_write((u8*)&temp2, SWITCH_TMP_OFFSET, 2); + } + filp_close(f,NULL); + set_fs(old_fs); +} + +static int psoc_polling_thread(void *p) +{ + while (!kthread_should_stop()) + { + check_switch_temp(); + set_current_state(TASK_INTERRUPTIBLE); + if(kthread_should_stop()) + break; + + schedule_timeout(msecs_to_jiffies(PSOC_POLLING_PERIOD)); + } + return 0; +} + +static int __init inv_psoc_init(void) +{ + int ret; + + hwmon_dev = hwmon_device_register(NULL); + if (IS_ERR(hwmon_dev)) { + goto fail_hwmon_device_register; + } + + device_kobj = kobject_create_and_add("device", &hwmon_dev->kobj); + if(!device_kobj) { + goto fail_hwmon_device_register; + } + + ret = sysfs_create_group(device_kobj, &psoc_group); + if (ret) { + goto fail_create_group_hwmon; + } + + ret = sysfs_create_group(&hwmon_dev->kobj, &psoc_group); + if (ret) { + goto fail_create_group_hwmon; + } + + kthread_auto_update = kthread_run(psoc_polling_thread,NULL,"BMC_DRIVER"); + if (IS_ERR(kthread_auto_update)) { + goto fail_create_group_hwmon; + } + return ret; + +fail_create_group_hwmon: + hwmon_device_unregister(hwmon_dev); +fail_hwmon_device_register: + return -ENOMEM; +} + +static void __exit inv_psoc_exit(void) +{ + kthread_stop(kthread_auto_update); + if(ipmi_mh_user!=NULL) {ipmi_destroy_user(ipmi_mh_user);} + if(hwmon_dev != NULL) hwmon_device_unregister(hwmon_dev); + sysfs_remove_group(device_kobj, &psoc_group); +} + +MODULE_AUTHOR("Ting.Jack "); +MODULE_DESCRIPTION("inv psoc driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_psoc_init); +module_exit(inv_psoc_exit); + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_pthread.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_pthread.c new file mode 100644 index 00000000000..e3b180cd5ea --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_pthread.c @@ -0,0 +1,1459 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +/***************************** + Maple platform +******************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define SHOW_ATTR_WARNING ("N/A") +#define SHOW_ATTR_NOTPRINT ("Not Available") +#define SHOW_ATTR_NOTSUPPORT ("Not Support") + +#define INV_HWMID_MAX (10) +#define INV_HWMID_INIT (-1) + +/*access userspace data to kernel space*/ +#define ACC_R (0) +#define ACC_W (1) + +#define TINY_BUF_SIZE (8) +#define MAX_PATH_SIZE (64) +#define MIN_ACC_SIZE (32) +#define MAX_ACC_SIZE (256) + +/* + * LED definitions + */ +#define STATUS_LED_MODE_AUTO 0 +#define STATUS_LED_MODE_DIAG 1 +#define STATUS_LED_MODE_MANU 2 + +#define STATUS_LED_GRN0 10 // 0 - 000: off +#define STATUS_LED_GRN1 11 // 1 - 001: 0.5hz +#define STATUS_LED_GRN2 12 // 2 - 010: 1 hz +#define STATUS_LED_GRN3 13 // 3 - 011: 2 hz +#define STATUS_LED_GRN7 17 // 7 - 111: on +#define STATUS_LED_RED0 20 // 0 - 000: off +#define STATUS_LED_RED1 21 // 1 - 001: 0.5hz +#define STATUS_LED_RED2 22 // 2 - 010: 1 hz +#define STATUS_LED_RED3 23 // 3 - 011: 2 hz +#define STATUS_LED_RED7 27 // 7 - 111: on +#define STATUS_LED_INVALID 0 // Invalid + +ssize_t status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2); +ssize_t status_led_grn(const char *freq); +ssize_t status_led_red(const char *freq); +ssize_t status_led_diag_mode_enable(void); +ssize_t status_led_diag_mode_disable(void); +int status_led_check_color(void); +int status_led_check_diag_mode(void); + +int status_led_psu_control(void); +ssize_t status_fan_led(const char *freq); +ssize_t status_psu_led(const char *freq); + +#if 1 +/* For timestamps in SYSFS_LOG */ +#define SYSFS_LOG printk +#else +//#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[SYSFS] %s/%d: " fmt, __func__, __LINE__, ##args) +#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[p_thread] " fmt, ##args) +#endif + +#define INV_PTHREAD_KERNEL_MODULE (1) + +/* inventec_class *********************************/ +static struct kobject *status_kobj; +static struct kset *status_kset; + + +static struct mutex rw_lock; + +static int hwm_psoc = INV_HWMID_INIT; +static int hwm_cpld = INV_HWMID_INIT; + +int get_hwm_psoc(void) +{ + return hwm_psoc; +} + +int get_hwm_cpld(void) +{ + return hwm_cpld; +} + +static ssize_t access_user_space(const char *name, int mode, char *buf, size_t len, loff_t offset) +{ + struct file *fp; + mm_segment_t fs; + loff_t pos = offset; + char *mark = NULL; + ssize_t vfs_ret = 0; + + if (mode == ACC_R) { + fp = filp_open(name, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_read(fp, buf, len, &pos); + + mark = strpbrk(buf, "\n"); + if (mark) + *mark = '\0'; + + filp_close(fp, NULL); + set_fs(fs); + } else if (mode == ACC_W) { + fp = filp_open(name, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_write(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + } + + return vfs_ret; +} + +int inventec_strtol(const char *sbufp, char **endp, unsigned int base) +{ + char *endptr; + int value = simple_strtol(sbufp, &endptr, base); + if (value == 0 && sbufp == endptr) { + *endp = NULL; + return value; + } + *endp = (char*)1; + return value; +} + +int inventec_singlechar_to_int(const char c) +{ + if ((c >= '0') && (c <= '9')) { + return (c - '0'); + } + else + if ((c >= 'a') && (c <= 'f')) { + return (c - 'a' + 10); + } + else + if ((c >= 'A') && (c <= 'F')) { + return (c - 'A' + 10); + } + return -1; +} + +int inventec_store_input(char *inputp, int count) +{ + int i = 0; + while(inputp[i] != '\n' && inputp[i] != '\0' && i < count) { + i++; + } + inputp[i] = '\0'; + return strlen(inputp); +} + +#if 0 +/* + * Time stamps for kernel log on yocto + */ +#include + +void SYSFS_LOG(char *fmt, ...) +{ + char buf[80], ts[32]; + va_list args; + int hlen; + + inventec_tmstmp(&ts[0]); + hlen = sprintf(buf, "[SYSFS] %s ", ts); // Do not edit this line + + va_start(args, fmt); + vsprintf(&buf[hlen-1], fmt, args); + va_end(args); + printk(KERN_WARNING "[p_thread] %s\n", buf); +} +#endif + +ssize_t +inventec_show_attr(char *buf_p, const char *invdevp) +{ + int inv_len = MAX_ACC_SIZE; /* INV driver return max length */ + char tmp_buf[MAX_ACC_SIZE]; + char *str_negative = "-", *mark = NULL; + + /* [Step2] Get data by uaccess */ + memset(tmp_buf, 0, sizeof(tmp_buf)); + mutex_lock(&rw_lock); + if (access_user_space(invdevp, ACC_R, tmp_buf, inv_len, 0) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + mutex_unlock(&rw_lock); + + /* [Step3] Check return value + * - Ex: When transceiver not plugged + * => SWPS return error code "-202" + * => Pic8 need return "NA" (assume) + */ + if (strcspn(tmp_buf, str_negative) == 0) { + /* error case: "-202" */ + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + + /* OK case:*/ + mark = strpbrk(tmp_buf, "\n"); + if (mark) { *mark = '\0'; } + + return sprintf(buf_p, "%s\n", tmp_buf); +} + +ssize_t +inventec_store_attr(const char *buf_p, size_t count, const char *invdevp) +{ + ssize_t ret = 0; + + /* [Step2] Get data by uaccess */ + mutex_lock(&rw_lock); + if ((ret = access_user_space(invdevp, ACC_W, (char*)buf_p, count, 0)) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return -EINVAL; + } + mutex_unlock(&rw_lock); + + /* OK case:*/ + return ret; +} + +int sysfs_detect_hwmon_index(void) +{ + char hwmon_buf[MAX_ACC_SIZE]; + char hwmon_path[MAX_PATH_SIZE]; + char hwmon_dev_path[MAX_PATH_SIZE]; + int hwid = 0; + + for (hwid = 0; + hwid < INV_HWMID_MAX && (hwm_psoc == INV_HWMID_INIT || hwm_cpld == INV_HWMID_INIT); + hwid++) { + memset(hwmon_buf, 0, sizeof(hwmon_buf)); + sprintf(hwmon_path, "/sys/class/hwmon/hwmon%d/name", hwid); + + inventec_show_attr(hwmon_buf, hwmon_path); + if (strncmp(hwmon_buf, "inv_psoc", 8) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_bmc", 7) == 0) { + hwm_psoc = hwid; + } + + sprintf(hwmon_dev_path, "/sys/class/hwmon/hwmon%d/device/name", hwid); + inventec_show_attr(hwmon_buf, hwmon_dev_path); + if (strncmp(hwmon_buf, "inv_cpld", 8) == 0) { + hwm_cpld = hwid; + } + } + if (hwid >= INV_HWMID_MAX) { + printk(KERN_ERR "[p_thread] detect hwmon index failed, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return -1; + } + printk(KERN_INFO "[p_thread] detect hwmon index success, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return 0; +} + +static int __init +inventec_class_init(void) +{ + mutex_init(&rw_lock); + +#ifdef INV_PTHREAD_KERNEL_MODULE + if (sysfs_detect_hwmon_index() < 0) { + return -1; + } +#endif + + printk(KERN_INFO "[p_thread] [%s/%d] Module initial success.\n",__func__,__LINE__); + + return 0; +} + +static void __exit +inventec_class_exit(void) +{ + printk(KERN_INFO "[p_thread] [%s/%d] Remove module.\n",__func__,__LINE__); +} + +/* fan device *************************************/ +#define FAN_DEV_PATH_STATE "/sys/class/hwmon/hwmon%d/device/fan_gpi" +#define FAN_DEV_PATH_FAN1_INPUT "/sys/class/hwmon/hwmon%d/device/fan1_input" +#define FAN_DEV_PATH_FAN2_INPUT "/sys/class/hwmon/hwmon%d/device/fan2_input" +#define FAN_DEV_PATH_FAN3_INPUT "/sys/class/hwmon/hwmon%d/device/fan3_input" +#define FAN_DEV_PATH_FAN4_INPUT "/sys/class/hwmon/hwmon%d/device/fan4_input" +#define FAN_DEV_PATH_FAN5_INPUT "/sys/class/hwmon/hwmon%d/device/fan5_input" +#define FAN_DEV_PATH_FAN6_INPUT "/sys/class/hwmon/hwmon%d/device/fan6_input" +#define FAN_DEV_PATH_FAN7_INPUT "/sys/class/hwmon/hwmon%d/device/fan7_input" +#define FAN_DEV_PATH_FAN8_INPUT "/sys/class/hwmon/hwmon%d/device/fan8_input" + +static char fan_dev_path_state[MAX_PATH_SIZE]; +static char fan_dev_path_fan1_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan2_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan3_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan4_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan5_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan6_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan7_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan8_input[MAX_PATH_SIZE]; + +void sysfs_fan_path_init(void) +{ + sprintf(&fan_dev_path_state[0], FAN_DEV_PATH_STATE, get_hwm_psoc()); + sprintf(&fan_dev_path_fan1_input[0],FAN_DEV_PATH_FAN1_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan2_input[0],FAN_DEV_PATH_FAN2_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan3_input[0],FAN_DEV_PATH_FAN3_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan4_input[0],FAN_DEV_PATH_FAN4_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan5_input[0],FAN_DEV_PATH_FAN5_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan6_input[0],FAN_DEV_PATH_FAN6_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan7_input[0],FAN_DEV_PATH_FAN7_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan8_input[0],FAN_DEV_PATH_FAN8_INPUT, get_hwm_psoc()); +} + +#define FAN_STATE_NORMAL "normal" +#define FAN_STATE_FAULTY "faulty" +#define FAN_STATE_UNINSTALLED "uninstalled" +#define FAN_STATE_UNKNOW "unknown state" +#define FAN_STATE_INVALID "Invalid state value" +#define FAN_STATE_READ_ERROR "state read error" + +#define FAN_LOG_UNINSTALLED "removed" +#define FAN_LOG_NORMAL "inserted" + +//#define FAN_STATE_BIT_NORMAL 0 +#define FAN_STATE_BIT_FAULTY 0 +#define FAN_STATE_BIT_UNINSTALLED 1 +#define FAN_STATE_BIT_UNKNOW 2 +#define FAN_STATE_BIT_INVALID 3 +#define FAN_STATE_BIT_READ_ERROR 4 + +static struct fans_tbl_s { + char *fan_name; + char *fan_front; + char *fan_rear; + unsigned int fan_state; +} fans_tbl[] = { + {"fan1", fan_dev_path_fan1_input, + fan_dev_path_fan2_input, 0}, + {"fan2", fan_dev_path_fan3_input, + fan_dev_path_fan4_input, 0}, + {"fan3", fan_dev_path_fan5_input, + fan_dev_path_fan6_input, 0}, + {"fan4", fan_dev_path_fan7_input, + fan_dev_path_fan8_input, 0}, +}; +#define FAN_TBL_TOTAL ( sizeof(fans_tbl)/ sizeof(const struct fans_tbl_s) ) + +#define FAN_STATE_CHECK(i,b) (fans_tbl[i].fan_state & (1< 0) + { + printk(KERN_ERR "[p_thread] All fans failed.\n"); + printk(KERN_ERR "[p_thread] System shutdown immediately in %d seconds.\n", cd_shutdown); + } + cd_shutdown -= 1; + } + return ret; +} + +/* End of faninfo_device */ + +static int __init +fan_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_fan_path_init(); +#endif + return 0; +} + + +static void __exit +fan_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove fan module.\n"); +} + +/* psu device *************************************/ +static unsigned int psu_voltin = 0; +#define PSU_VOLTIN_ACDC (70000) + +/* + * normal/unpower/uninstall/fault are PSU states output from driver level + * checkpsu/error are defined by sysfs + */ +#define PSU_STATE_VAL_NORMAL (0) +#define PSU_STATE_VAL_UNPOWER (2) +#define PSU_STATE_VAL_FAULT (4) +#define PSU_STATE_VAL_UNINSTALL (7) +#define PSU_STATE_VAL_CHECKPSU (8) +#define PSU_STATE_VAL_ERROR (9) + +#define PSU_STATE_NORMAL ("0 : normal") +#define PSU_STATE_UNPOWER ("2 : unnormal") +#define PSU_STATE_FAULT ("4 : fault") +#define PSU_STATE_UNINSTALL ("7 : not installed") +#define PSU_STATE_CHECKPSU ("8 : check psu") +#define PSU_STATE_ERROR ("9 : state error") + +#define PSU_STATE_LEN_NORMAL (strlen(PSU_STATE_NORMAL)) +#define PSU_STATE_LEN_UNPOWER (strlen(PSU_STATE_UNPOWER)) +#define PSU_STATE_LEN_FAULT (strlen(PSU_STATE_FAULT)) +#define PSU_STATE_LEN_UNINSTALL (strlen(PSU_STATE_UNINSTALL)) +#define PSU_STATE_LEN_CHECKPSU (strlen(PSU_STATE_CHECKPSU)) + +typedef struct { + char *inv_dev_attrp; + char *inv_dev_pathp; +} psu_dev_t; + +typedef struct { + const char *psu_name; + int psu_major; + dev_t psu_devt; + struct device *psu_dev_p; + psu_dev_t *psu_dev_namep; + int psu_dev_total; + char *psu_inv_pathp; + void *psu_tracking; + char *psu_currentin; + char *psu_currentout; + char *psu_powerin; + char *psu_powerout; + char *psu_voltin; + char *psu_voltout; +} psu_dev_group_t; + +#define PSU_DEV_PATH_TEMPLATE "/sys/class/hwmon/hwmon%d/device/%s" + +static char psu_dev_path_state[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltin[MAX_PATH_SIZE]; + +static char psu_0_dev_path_state[MAX_PATH_SIZE]; +static char psu_1_dev_path_state[MAX_PATH_SIZE]; + +#if 0 +static char psu_dev_path_vendor[MAX_PATH_SIZE]; +static char psu_dev_path_version[MAX_PATH_SIZE]; +static char psu_dev_path_sn[MAX_PATH_SIZE]; +static char psu_dev_path_temperature[MAX_PATH_SIZE]; +static char psu_dev_path_fan_speed[MAX_PATH_SIZE]; +static char psu_dev_path_fan_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_fan_faulty[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_psu_rpm[MAX_PATH_SIZE]; +#endif + +void sysfs_psu_path_init(void) +{ + sprintf(&psu_dev_path_state[0], PSU_DEV_PATH_TEMPLATE, get_hwm_cpld(), "\%s" ); + sprintf(&psu_dev_path_psu_voltin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + + sprintf(&psu_0_dev_path_state[0], PSU_DEV_PATH_TEMPLATE, get_hwm_cpld(), "psu0" ); + sprintf(&psu_1_dev_path_state[0], PSU_DEV_PATH_TEMPLATE, get_hwm_cpld(), "psu1" ); + +#if 0 + sprintf(&psu_dev_path_vendor[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_version[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_sn[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_temperature[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_speed[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_faulty[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_voltout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_rpm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#endif +} + +static psu_dev_t psu_dev_name[] = { + { "state", psu_dev_path_state }, // Using cpld + { "psu_voltin", psu_dev_path_psu_voltin }, +#if 0 + { "vendor", psu_dev_path_vendor }, + { "version", psu_dev_path_version }, + { "sn", psu_dev_path_sn }, + { "temperature", psu_dev_path_temperature }, + { "fan_speed", psu_dev_path_fan_speed }, + { "fan_pwm", psu_dev_path_fan_pwm }, + { "fan_faulty", psu_dev_path_fan_faulty }, + { "psu_currentin", psu_dev_path_psu_currentin }, + { "psu_currentout", psu_dev_path_psu_currentout }, + { "psu_powerin", psu_dev_path_psu_powerin }, + { "psu_powerout", psu_dev_path_psu_powerout }, + { "psu_voltout", psu_dev_path_psu_voltout }, + { "psu_pwm", psu_dev_path_psu_pwm }, + { "psu_rpm", psu_dev_path_psu_rpm }, +#endif +}; +#define PSU_DEV_NAME_TOTAL ( sizeof(psu_dev_name) / sizeof(const psu_dev_t) ) + +static psu_dev_group_t psu_dev_group[] = { + { + .psu_name = "psu1", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, + { + .psu_name = "psu2", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, +}; +#define PSU_DEV_GROUP_TOTAL ( sizeof(psu_dev_group)/ sizeof(const psu_dev_group_t) ) + +static char psu_state[4][MIN_ACC_SIZE]; + +static struct psu_wire_tbl_s { + char *psu_attr; + char *psu_name; + char *psu_wire; + char *psu_state; +} psu_wire_tbl[] = { + { "state", "psu1", "psu0", psu_state[0] }, // Using cpld + { "state", "psu2", "psu1", psu_state[1] }, + { "psu_voltin", "psu1", "psoc_psu1_vin", psu_state[2] }, + { "psu_voltin", "psu2", "psoc_psu2_vin", psu_state[3] }, +}; +#define PSU_WIRE_TBL_TOTAL ( sizeof(psu_wire_tbl)/ sizeof(const struct psu_wire_tbl_s) ) + +static char * +psu_attr_get_wirep(const char *psu_attrp, const char *psu_namep, char **psu_statepp) +{ + int i; + + for (i = 0; i < PSU_WIRE_TBL_TOTAL; i++) { + if (strncmp(psu_wire_tbl[i].psu_attr, psu_attrp, strlen(psu_attrp)) == 0 && + strncmp(psu_wire_tbl[i].psu_name, psu_namep, strlen(psu_namep)) == 0) { + if (psu_statepp) { + *psu_statepp = psu_wire_tbl[i].psu_state; + } + return psu_wire_tbl[i].psu_wire; + } + } + return NULL; +} + +int psu_check_state_normal(char *statep) +{ + if (strstr(statep, "normal")) { + return 1; + } + return 0; +} + +#define PSU_ATTR_VOLTIN ("psu_voltin") +#define PSU_ATTR_VOLTIN_LEN (10) + +/* Get PSU voltin for determon AC(110v) or DC(48v) */ +void psu_get_voltin(void) +{ + char acc_path[MAX_PATH_SIZE], volt[MIN_ACC_SIZE]; + psu_dev_t *devnamep; + unsigned int voltin; + char *invwirep; + int i, j; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + //psu_dev_group[i].psu_name; + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_VOLTIN, PSU_ATTR_VOLTIN_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_VOLTIN, psu_dev_group[i].psu_name, NULL); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_DEBUG "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(volt, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + continue; + } + else { + voltin = simple_strtol(&volt[0], NULL, 10); + printk(KERN_DEBUG "[p_thread] Read %s %s = %u\n",acc_path,volt,voltin); + if (voltin > psu_voltin) { + psu_voltin = voltin; + } + } + } + } + } + + SYSFS_LOG("[p_thread] PSU voltin = %u\n", psu_voltin); +} + +#define PSU_ATTR_STATE ("state") +#define PSU_ATTR_STATE_LEN (5) + +/* psus_control() by inv_thread */ +int psus_control(int log_only) +{ + char acc_path[MAX_PATH_SIZE], state[MIN_ACC_SIZE]; + psu_dev_t *devnamep = NULL; + char *invwirep = NULL; + char *psu_statep = NULL; + int i, j, flag = 0; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_STATE, PSU_ATTR_STATE_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_STATE, psu_dev_group[i].psu_name, &psu_statep); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_INFO "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(state, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + if (strncmp(psu_statep, PSU_STATE_ERROR, strlen(PSU_STATE_ERROR)) != 0) { + strcpy(psu_statep, PSU_STATE_ERROR); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_ERROR); + } + flag = 1; + } + else + if (strstr(state, "normal")) { + //printk(KERN_INFO "[p_thread] %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + } + else + if (psu_voltin > PSU_VOLTIN_ACDC) { /* AC PSUS */ + //printk(KERN_INFO "[p_thread] RYU: %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + flag = 1; + } + else { /* DC PSUS */ + if (strncmp(psu_statep, PSU_STATE_CHECKPSU, PSU_STATE_LEN_CHECKPSU) != 0) { + strcpy(psu_statep, PSU_STATE_CHECKPSU); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_CHECKPSU); + } + flag = 1; + } + } + } + } + + if (log_only) { + return 0; + } + + //SYSFS_LOG("[p_thread] RYU: %s: flag = %d\n",psu_wire_tbl[i].psu_name,flag); + if (flag == 1) { + status_psu_led("0x20"); + return 1; + } + return 0; +} + +int status_led_psu_control(void) +{ + int retVal = 0; //no issue + + char buf[MAX_ACC_SIZE]; + + int normal_psu_cnt = 0; //normal + + int fault_psu_cnt = 0; + + //read fan status one by one + //read psu 0 status + if (inventec_show_attr(&buf[0], psu_0_dev_path_state) > 0) + { + if(buf[0] == '0') //normal + { + normal_psu_cnt = normal_psu_cnt + 1; + } + else if (buf[0] == '4') // psu fault + { + fault_psu_cnt = fault_psu_cnt + 1; + } + + //Check 2nd psu + if(inventec_show_attr(&buf[0], psu_1_dev_path_state) > 0) + { + if(buf[0] == '0') //normal + { + normal_psu_cnt = normal_psu_cnt + 1; + } + else if (buf[0] == '4') // psu fault + { + fault_psu_cnt = fault_psu_cnt + 1; + } + } + } + + if (normal_psu_cnt == 0) + { + status_psu_led("0"); + retVal = 1; + } + else + { + if( fault_psu_cnt > 0) + { + status_psu_led("0x01"); //Red lit + retVal = 1; + } + else if (normal_psu_cnt == 1) + { + status_psu_led("0x20"); // Green blink + retVal = 1; + } + else if (normal_psu_cnt == 2) + { + status_psu_led("0x10"); // Green Lit + retVal = 0; + } + } + + return retVal; +} + + +/* End of psuinfo_device */ + +static int __init +psu_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_psu_path_init(); +#endif + return 0; +} + + +static void __exit +psu_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove psu module.\n"); +} + +/* led device *************************************/ +#define STATUS_LED_GRN_PATH "/sys/class/hwmon/hwmon%d/device/grn_led" +#define STATUS_LED_RED_PATH "/sys/class/hwmon/hwmon%d/device/red_led" + +#define STATUS_LED_FAN_PATH "/sys/class/hwmon/hwmon%d/device/fan_led" +#define STATUS_LED_PSU_PATH "/sys/class/hwmon/hwmon%d/device/psu_led" + +#define FAN_LED_GRN1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn1" +#define FAN_LED_GRN2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn2" +#define FAN_LED_GRN3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn3" +#define FAN_LED_GRN4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn4" +#define FAN_LED_RED1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red1" +#define FAN_LED_RED2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red2" +#define FAN_LED_RED3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red3" +#define FAN_LED_RED4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red4" + +#define HWMON_DEVICE_DIAG_PATH "/sys/class/hwmon/hwmon%d/device/diag" +#define HWMON_DEVICE_CTRL_PATH "/sys/class/hwmon/hwmon%d/device/ctl" + +static char status_led_grn_path[MAX_PATH_SIZE]; +static char status_led_red_path[MAX_PATH_SIZE]; +static char status_led_fan_path[MAX_PATH_SIZE]; +static char status_led_psu_path[MAX_PATH_SIZE]; + +static char fan_led_grn1_path[MAX_PATH_SIZE]; +static char fan_led_grn2_path[MAX_PATH_SIZE]; +static char fan_led_grn3_path[MAX_PATH_SIZE]; +static char fan_led_grn4_path[MAX_PATH_SIZE]; +static char fan_led_red1_path[MAX_PATH_SIZE]; +static char fan_led_red2_path[MAX_PATH_SIZE]; +static char fan_led_red3_path[MAX_PATH_SIZE]; +static char fan_led_red4_path[MAX_PATH_SIZE]; +static char hwmon_device_diag_path[MAX_PATH_SIZE]; +static char hwmon_device_ctrl_path[MAX_PATH_SIZE]; + +void sysfs_led_path_init(void) +{ + sprintf(&status_led_grn_path[0], STATUS_LED_GRN_PATH, get_hwm_cpld()); + sprintf(&status_led_red_path[0], STATUS_LED_RED_PATH, get_hwm_cpld()); + sprintf(&status_led_fan_path[0], STATUS_LED_FAN_PATH, get_hwm_cpld()); + sprintf(&status_led_psu_path[0], STATUS_LED_PSU_PATH, get_hwm_cpld()); + + sprintf(&fan_led_grn1_path[0], FAN_LED_GRN1_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn2_path[0], FAN_LED_GRN2_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn3_path[0], FAN_LED_GRN3_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn4_path[0], FAN_LED_GRN4_PATH, get_hwm_psoc()); + sprintf(&fan_led_red1_path[0], FAN_LED_RED1_PATH, get_hwm_psoc()); + sprintf(&fan_led_red2_path[0], FAN_LED_RED2_PATH, get_hwm_psoc()); + sprintf(&fan_led_red3_path[0], FAN_LED_RED3_PATH, get_hwm_psoc()); + sprintf(&fan_led_red4_path[0], FAN_LED_RED4_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_diag_path[0], HWMON_DEVICE_DIAG_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_ctrl_path[0], HWMON_DEVICE_CTRL_PATH, get_hwm_cpld()); +} + +/* return 0/off 1/green 2/red */ +int +status_led_check_color(void) +{ + char tmpbuf[MIN_ACC_SIZE]; + int ret = STATUS_LED_INVALID; + + if (inventec_show_attr(&tmpbuf[0], status_led_grn_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_GRN0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_GRN1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_GRN2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_GRN3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_GRN7; + } + return ret; + } + + if (inventec_show_attr(&tmpbuf[0], status_led_red_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_RED0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_RED1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_RED2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_RED3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_RED7; + } + return ret; + } + return ret; +} + +/* + * Store attr Section + */ +static DEFINE_MUTEX(diag_mutex); + +ssize_t status_led_diag_mode_enable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '0') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("1", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + mutex_unlock(&diag_mutex); + } + + return ret; +} + +ssize_t status_led_diag_mode_disable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '1') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("0", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + mutex_unlock(&diag_mutex); + } + return 1; +} + +ssize_t +status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2) +{ + ssize_t ret; + + ret = inventec_store_attr(tmp1, strlen(tmp1), path1); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(tmp2, strlen(tmp2), path2); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_red(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_grn_path[0]); + + if (ret < 0) { + return ret; + } + + ret = inventec_store_attr(freq, strlen(freq), &status_led_red_path[0]); + + if (ret < 0) { + return ret; + } + + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_grn(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +static int status_led_diag_mode = STATUS_LED_MODE_AUTO; + +int status_led_check_diag_mode(void) +{ + return status_led_diag_mode; +} + +//status led: FAN & PSU +ssize_t +status_fan_led(const char *freq) +{ + ssize_t ret; + ret = inventec_store_attr(freq, strlen(freq), &status_led_fan_path[0]); + if (ret < 0) { + return ret; + } + + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_psu_led(const char *freq) +{ + ssize_t ret; + ret = inventec_store_attr(freq, strlen(freq), &status_led_psu_path[0]); + if (ret < 0) { + return ret; + } + + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +/* End of ledinfo_device */ + +static int __init +led_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); +#endif + return 0; +} + + +static void __exit +led_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove led module.\n"); +} + +/* sensor device **********************************/ +#define SENSOR_DEV_PATH_SWITCH_TEMP "/sys/class/hwmon/hwmon%d/device/switch_tmp" + +static char sensor_dev_path_switch_temp[MAX_PATH_SIZE]; + +void sysfs_sensor_path_init(void) +{ + sprintf(&sensor_dev_path_switch_temp[0], SENSOR_DEV_PATH_SWITCH_TEMP, get_hwm_psoc()); +} + +void switch_temp_update(void) +{ + char buf[MIN_ACC_SIZE]; + ssize_t count = inventec_show_attr(&buf[0], "proc/switch/temp"); + if (count > 0) { + //printk(KERN_ERR "[p_thread] [STEMP] Switch temperature is out of range: %d\n", stemp); + inventec_store_attr(&buf[0], count, sensor_dev_path_switch_temp); + } +} + +/**************************************************/ +/* From system_device */ +static int inv_pthread_control = 1; + +int thread_control(void) +{ + return inv_pthread_control; +} + +void thread_control_set(int val) +{ + inv_pthread_control = val; +} +/* End system_device */ + +#define THREAD_SLEEP_MINS (3) +#define THREAD_DELAY_MINS (THREAD_SLEEP_MINS + THREAD_SLEEP_MINS + 1) + +extern void psu_get_voltin(void); + +static struct task_struct *thread_st; +static int thread_data; + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO +void led_set_gpio_to_change_status_led(void) +{ + ssize_t ret = inventec_store_attr("253", 2, "/sys/class/gpio/export"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 253 to /sys/class/gpio/export failed\n"); + return; + } + + printk("[p_thread] Write 253 to /sys/class/gpio/export\n"); + + ret = inventec_store_attr("out", 3, "/sys/class/gpio/gpio253/direction"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write low to /sys/class/gpio/gpio253/direction failed\n"); + return; + } + + //pull high and then low + ret = inventec_store_attr("1", 1, "sys/class/gpio/gpio253/value"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 1 to sys/class/gpio/gpio253/value failed\n"); + } + + //pull low + ret = inventec_store_attr("0", 1, "sys/class/gpio/gpio253/value"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 0 to sys/class/gpio/gpio253/value failed\n"); + } + + SYSFS_LOG("[p_thread] Set gpio to support status led change successfully\n"); +} +#endif + +// Function executed by kernel thread +static int thread_fn(void *unused) +{ + bool fan_issue = false; + bool psu_issue = false; + bool psu_number_issue = false; + + /* Delay for guarantee HW ready */ + ssleep(THREAD_DELAY_MINS); + +#ifndef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); + sysfs_fan_path_init(); + sysfs_psu_path_init(); +#endif + //sysfs_sensor_path_init(); + + /* Default status init */ + status_led_grn("7"); + + psu_get_voltin(); + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO + led_set_gpio_to_change_status_led(); +#endif + + while (1) + { + ssleep(THREAD_SLEEP_MINS); + + if (thread_control() == 0) { + printk(KERN_INFO "[p_thread] %s/%d: Thread Stop by inv_pthread control\n",__func__,__LINE__); + break; + } + + if (status_led_check_diag_mode() == STATUS_LED_MODE_MANU) { + /* status led in change color/freq mode, higher priority. Ignore fans sttaus */ + continue; + } + + //switch_temp_update(); + + if (fans_control() > 0) //has at least one failed fan + { + psus_control(0); //now we have separate led for FAN and PSU + fan_issue = true; + } + + if (psus_control(1) > 0) + { + psu_issue = true; + } + + if (status_led_psu_control() > 0) + { + psu_number_issue = true; + } + + if(fan_issue || psu_issue || psu_number_issue) + { + continue; + } + + if (status_led_check_color() != STATUS_LED_GRN7) { /* status led red, change it to green */ + status_led_grn("7"); + } + } + +#ifndef INV_PTHREAD_KERNEL_MODULE +err_inv_pthread_fn_1: +#endif + do_exit(0); + printk(KERN_INFO "[p_thread] %s/%d: Thread Stopped\n",__func__,__LINE__); + return 0; +} + + +static ssize_t s_show(struct kobject *kobj, struct attribute *attr, char *buf) +{ + int fan_absence; + size_t count; + + fan_absence = fans_control(); + count += sprintf(&buf[count], "%d\n", fan_absence); + return count; +} + +static ssize_t s_store(struct kobject *kobj, struct attribute *attr, const char *buf, size_t count) +{ + return count; +} + +static struct attribute status_att = { + .name = "fan_absence", + .mode = 0777, +}; + +static const struct sysfs_ops status_ops = { + .show = s_show, + .store = s_store, +}; + +static struct kobj_type status_ktype = { + .sysfs_ops = &status_ops, +}; + + +static int __init inv_pthread_init(void) +{ + int retval; + + status_kobj = kzalloc(sizeof(*status_kobj), GFP_KERNEL); + if(!status_kobj) + return PTR_ERR(status_kobj); + + status_kset = kset_create_and_add("platform_status", NULL, kernel_kobj); + if(!status_kset) + return -1; + + status_kobj->kset = status_kset; + + retval = kobject_init_and_add(status_kobj, &status_ktype, NULL, "fan"); + if(retval) + return retval; + + retval = sysfs_create_file(status_kobj, &status_att); + + + inventec_class_init(); + fan_device_init(); + psu_device_init(); + led_device_init(); + + thread_control_set(1); + + printk(KERN_INFO "[p_thread] %s/%d: Creating Thread\n",__func__,__LINE__); + //Create the kernel thread with name 'inv_pthread' + thread_st = kthread_run(thread_fn, (void*)&thread_data, "inv_pthread"); + if (thread_st) + printk(KERN_INFO "[p_thread] inv_pthread Created successfully\n"); + else + printk(KERN_ERR "[p_thread] inv_pthread creation failed\n"); + + return retval; +} + +static void __exit inv_pthread_exit(void) +{ + thread_control_set(0); + /* Delay for guarantee thread exit */ + ssleep(THREAD_DELAY_MINS); + + fan_device_exit(); + psu_device_exit(); + led_device_exit(); + inventec_class_exit(); + + sysfs_remove_file(status_kobj, &status_att); + kset_unregister(status_kset); + kobject_del(status_kobj); + + printk(KERN_INFO "[p_thread] inv_pthread cleaning Up\n"); +} + +module_init(inv_pthread_init); +module_exit(inv_pthread_exit); + +MODULE_AUTHOR("Robert "); +MODULE_DESCRIPTION("Inventec Platform Management Thread"); +MODULE_VERSION("version 1.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_swps.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_swps.c new file mode 100644 index 00000000000..cbb22fba297 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_swps.c @@ -0,0 +1,3049 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "inv_swps.h" + +static int ctl_major; +static int port_major; +static int ioexp_total; +static int port_total; +static int auto_config; +static int flag_i2c_reset; +static int flag_mod_state; +static unsigned gpio_rest_mux; +static struct class *swp_class_p = NULL; +static struct inv_platform_s *platform_p = NULL; +static struct inv_ioexp_layout_s *ioexp_layout = NULL; +static struct inv_port_layout_s *port_layout = NULL; + +static void swp_polling_worker(struct work_struct *work); +static DECLARE_DELAYED_WORK(swp_polling, swp_polling_worker); + +static int reset_i2c_topology(void); + + +static int +__swp_match(struct device *dev, +#ifdef SWPS_KERN_VER_AF_3_10 + + const void *data){ +#else + void *data){ +#endif + + char *name = (char *)data; + if (strcmp(dev_name(dev), name) == 0) + return 1; + return 0; +} + + +struct device * +get_swpdev_by_name(char *name){ + struct device *dev = class_find_device(swp_class_p, + NULL, + name, + __swp_match); + return dev; +} + + +static int +sscanf_2_int(const char *buf) { + + int result = -EBFONT; + char *hex_tag = "0x"; + + if (strcspn(buf, hex_tag) == 0) { + if (sscanf(buf,"%x",&result)) { + return result; + } + } else { + if (sscanf(buf,"%d",&result)) { + return result; + } + if(sscanf(buf,"-%d",&result)) { + return -result; + } + if (sscanf(buf,"%x",&result)) { + return result; + } + } + return -EBFONT; +} + + +static int +sscanf_2_binary(const char *buf) { + + int result = sscanf_2_int(buf); + + if (result < 0){ + return -EBFONT; + } + switch (result) { + case 0: + case 1: + return result; + default: + break; + } + return -EBFONT; +} + + +static int +_get_polling_period(void) { + + int retval = 0; + + if (SWP_POLLING_PERIOD == 0) { + return 0; + } + retval = ((SWP_POLLING_PERIOD * HZ) / 1000); + if (retval == 0) { + return 1; + } + return retval; +} + + +static struct transvr_obj_s * +_get_transvr_obj(char *dev_name) { + + struct device *dev_p = NULL; + struct transvr_obj_s *transvr_obj_p = NULL; + + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + return NULL; + } + transvr_obj_p = dev_get_drvdata(dev_p); + if (!transvr_obj_p){ + return NULL; + } + return transvr_obj_p; +} + + +static void +unlock_tobj_all(void) { + + struct transvr_obj_s *tobj_p; + char port_name[32]; + int port_id = 0; + int minor_curr = 0; + + for (minor_curr=0; minor_currauto_config = auto_config; + unlock_transvr_obj(tobj_p); + SWPS_DEBUG("%s: Set %s auto_config=%d\n", + __func__, tobj_p->swp_name, auto_config); + } + return retval; +} + + +/* ========== R/W Functions module control attribute ========== + */ +static ssize_t +show_attr_platform(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 32, "%s\n", platform_p->name); +} + + +static ssize_t +show_attr_version(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%s\n", SWP_VERSION); +} + + +static ssize_t +show_attr_status(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", flag_mod_state); +} + + +static ssize_t +show_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", auto_config); +} + + +static int +_check_reset_pwd(const char *buf_p, + size_t count) { + + int in_max = 64; + int in_len = (int)count; + char in_val[64] = "ERR"; + char *emsg = "ERR"; + + if (in_len >= in_max) { + emsg = "input too much"; + goto err_check_reset_pwd; + } + if (!sscanf(buf_p,"%s",in_val)) { + emsg = "format incorrect"; + goto err_check_reset_pwd; + } + if (strcmp(in_val, SWP_RESET_PWD) != 0) { + emsg = "password incorrect"; + goto err_check_reset_pwd; + } + return 0; + +err_check_reset_pwd: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} + + +static ssize_t +store_attr_reset_i2c(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + /* Polling mode */ + if (SWP_POLLING_ENABLE) { + SWPS_INFO("%s: reset I2C :polling\n", __func__); + flag_i2c_reset = 1; + return count; + } + /* Direct mode */ + SWPS_INFO("%s: reset I2C go. :direct\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset fail!\n", __func__); + return -EIO; + } + SWPS_INFO("%s: reset I2C ok. :direct\n", __func__); + return count; +} + + +static ssize_t +store_attr_reset_swps(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p; + char port_name[32] = "ERR"; + int port_id = 0; + int minor_curr = 0; + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + for (minor_curr=0; minor_currstate = STATE_TRANSVR_DISCONNECTED; + unlock_transvr_obj(tobj_p); + SWPS_INFO("%s: reset:%s\n", __func__, tobj_p->swp_name); + } + return count; +} + + +static ssize_t +store_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if (input_val < 0){ + return -EBFONT; + } + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + auto_config = input_val; + _update_auto_config_2_trnasvr(); + return count; +} + + +/* ========== Show functions: For transceiver attribute ========== + */ +static ssize_t +_show_transvr_hex_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + int result; + + lock_transvr_obj(tobj_p); + result = get_func(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 8, "%d\n", result); + } else { + len = snprintf(buf_p, 8, "0x%02x\n", result); + } + return len; +} + + +static ssize_t +_show_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = snprintf(buf_p, 16, "%d\n", get_func(tobj_p)); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +_show_transvr_str_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p, char* buf), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = get_func(tobj_p, buf_p); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +show_attr_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_id, + buf_p); +} + + +static ssize_t +show_attr_ext_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_ext_id, + buf_p); +} + + +static ssize_t +show_attr_connector(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_connector, + buf_p); +} + + +static ssize_t +show_attr_vendor_name(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_name, + buf_p); +} + + +static ssize_t +show_attr_vendor_pn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_pn, + buf_p); +} + + +static ssize_t +show_attr_vendor_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_rev, + buf_p); +} + + +static ssize_t +show_attr_vendor_sn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_sn, + buf_p); +} + + +static ssize_t +show_attr_power_cls(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + size_t len; + int result; + struct transvr_obj_s *tobj_p; + + tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + lock_transvr_obj(tobj_p); + result = tobj_p->get_power_cls(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 16, "%d\n", result); + } else { + len = snprintf(buf_p, 16, "Power Class %d\n", result); + } + return len; +} + + +static ssize_t +show_attr_br(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_br, + buf_p); +} + + +static ssize_t +show_attr_len_sm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_sm, + buf_p); +} + + +static ssize_t +show_attr_len_smf(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_smf, + buf_p); +} + + +static ssize_t +show_attr_len_om1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om1, + buf_p); +} + + +static ssize_t +show_attr_len_om2(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om2, + buf_p); +} + + +static ssize_t +show_attr_len_om3(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om3, + buf_p); +} + + +static ssize_t +show_attr_len_om4(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om4, + buf_p); +} + + +static ssize_t +show_attr_comp_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_rev, + buf_p); +} + + +static ssize_t +show_attr_comp_eth(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_1, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10_40(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10_40, + buf_p); +} + + +static ssize_t +show_attr_comp_extend(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_extend, + buf_p); +} + + +static ssize_t +show_attr_rate_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_rate_id, + buf_p); +} + + +static ssize_t +show_attr_temperature(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_temp, + buf_p); +} + + +static ssize_t +show_attr_voltage(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_vol, + buf_p); +} + + +static ssize_t +show_attr_tx_bias(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_bias, + buf_p); +} + + +static ssize_t +show_attr_tx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power, + buf_p); +} + + +static ssize_t +show_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_eq, + buf_p); +} + + +static ssize_t +show_attr_rx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power, + buf_p); +} + + +static ssize_t +show_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_am, + buf_p); +} + + +static ssize_t +show_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_em, + buf_p); +} + + +static ssize_t +show_attr_wavelength(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_wavelength, + buf_p); +} + + +static ssize_t +show_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_offset, + buf_p); +} + + +static ssize_t +show_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_reg, + buf_p); +} + + +static ssize_t +show_attr_info(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_info, + buf_p); +} + + +static ssize_t +show_attr_if_type(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_type, + buf_p); +} + + +static ssize_t +show_attr_if_speed(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_speed, + buf_p); +} + + +static ssize_t +show_attr_if_lane(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_lane, + buf_p); +} + + +static ssize_t +show_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_cdr, + buf_p); +} + + +static ssize_t +show_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs0, + buf_p); +} + + +static ssize_t +show_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs1, + buf_p); +} + + +static ssize_t +show_attr_soft_rx_los(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_rx_los, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_auto_tx_disable, + buf_p); +} + + +/* ========== Store functions: transceiver (R/W) attribute ========== + */ +static ssize_t +_store_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_byte_hex_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if ((input < 0) || (input > 0xff)){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_binary_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_binary(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_cdr, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs1, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int check = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((check < 0) || (check > 0xf)){ + return -EBFONT; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_soft_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int err = -EPERM; + int input = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((input < 0) || (input > 0xf)){ + if (input != VAL_TRANSVR_FUNCTION_DISABLE) { + return -EBFONT; + } + } + lock_transvr_obj(tobj_p); + err = tobj_p->set_auto_tx_disable(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_tx_eq, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_am, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_em, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_offset, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_reg, + buf_p, + count); +} + +/* ========== Show functions: For I/O Expander attribute ========== + */ +static ssize_t +_show_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*get_func)(struct ioexp_obj_s *ioexp_p, int voffset), + char *buf_p) { + size_t len; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR(" %s: data corruption! :%s\n", __func__, tobj_p->swp_name); + return -ENODATA; + } + mutex_lock(&ioexp_p->lock); + len = snprintf(buf_p, 8, "%d\n", get_func(ioexp_p, tobj_p->ioexp_virt_offset)); + mutex_unlock(&ioexp_p->lock); + return len; +} + + +static ssize_t +show_attr_present(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_present, + buf_p); +} + + +static ssize_t +show_attr_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_rxlos(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_rxlos, + buf_p); +} + + +static ssize_t +show_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_reset, + buf_p); +} + + +static ssize_t +show_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_lpmod, + buf_p); +} + + +static ssize_t +show_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_modsel, + buf_p); +} + + +static ssize_t +show_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs0, + buf_p); +} + + +static ssize_t +show_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs1, + buf_p); +} + + +/* ========== Store functions: For I/O Expander (R/W) attribute ========== + */ +static ssize_t +_store_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*set_func)(struct ioexp_obj_s *ioexp_p, + int virt_offset, int input_val), + const char *buf_p, + size_t count) { + + int input, err; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR("%s: data corruption! :%s\n", + __func__, tobj_p->swp_name); + return -ENODATA; + } + input = sscanf_2_binary(buf_p); + if (input < 0) { + return -EBFONT; + } + mutex_lock(&ioexp_p->lock); + err = set_func(ioexp_p, tobj_p->ioexp_virt_offset, input); + mutex_unlock(&ioexp_p->lock); + if (err < 0){ + return err; + } + return count; +} + +static ssize_t +store_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_reset, + buf_p, + count); +} + + +static ssize_t +store_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_lpmod, + buf_p, + count); +} + + +static ssize_t +store_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_modsel, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs1, + buf_p, + count); +} + + +/* ========== SWPS attribute: For module control ========== + */ +static DEVICE_ATTR(platform, S_IRUGO, show_attr_platform, NULL); +static DEVICE_ATTR(version, S_IRUGO, show_attr_version, NULL); +static DEVICE_ATTR(status, S_IRUGO, show_attr_status, NULL); +static DEVICE_ATTR(reset_i2c, S_IWUSR, NULL, store_attr_reset_i2c); +static DEVICE_ATTR(reset_swps, S_IWUSR, NULL, store_attr_reset_swps); +static DEVICE_ATTR(auto_config, S_IRUGO|S_IWUSR, show_attr_auto_config, store_attr_auto_config); + +/* ========== Transceiver attribute: from eeprom ========== + */ +static DEVICE_ATTR(id, S_IRUGO, show_attr_id, NULL); +static DEVICE_ATTR(ext_id, S_IRUGO, show_attr_ext_id, NULL); +static DEVICE_ATTR(connector, S_IRUGO, show_attr_connector, NULL); +static DEVICE_ATTR(vendor_name, S_IRUGO, show_attr_vendor_name, NULL); +static DEVICE_ATTR(vendor_pn, S_IRUGO, show_attr_vendor_pn, NULL); +static DEVICE_ATTR(vendor_rev, S_IRUGO, show_attr_vendor_rev, NULL); +static DEVICE_ATTR(vendor_sn, S_IRUGO, show_attr_vendor_sn, NULL); +static DEVICE_ATTR(power_cls, S_IRUGO, show_attr_power_cls, NULL); +static DEVICE_ATTR(br, S_IRUGO, show_attr_br, NULL); +static DEVICE_ATTR(len_sm, S_IRUGO, show_attr_len_sm, NULL); +static DEVICE_ATTR(len_smf, S_IRUGO, show_attr_len_smf, NULL); +static DEVICE_ATTR(len_om1, S_IRUGO, show_attr_len_om1, NULL); +static DEVICE_ATTR(len_om2, S_IRUGO, show_attr_len_om2, NULL); +static DEVICE_ATTR(len_om3, S_IRUGO, show_attr_len_om3, NULL); +static DEVICE_ATTR(len_om4, S_IRUGO, show_attr_len_om4, NULL); +static DEVICE_ATTR(comp_rev, S_IRUGO, show_attr_comp_rev, NULL); +static DEVICE_ATTR(comp_eth, S_IRUGO, show_attr_comp_eth, NULL); +static DEVICE_ATTR(comp_eth_10, S_IRUGO, show_attr_comp_eth_10, NULL); +static DEVICE_ATTR(comp_eth_10_40, S_IRUGO, show_attr_comp_eth_10_40, NULL); +static DEVICE_ATTR(comp_extend, S_IRUGO, show_attr_comp_extend, NULL); +static DEVICE_ATTR(rate_id, S_IRUGO, show_attr_rate_id, NULL); +static DEVICE_ATTR(temperature, S_IRUGO, show_attr_temperature, NULL); +static DEVICE_ATTR(voltage, S_IRUGO, show_attr_voltage, NULL); +static DEVICE_ATTR(tx_bias, S_IRUGO, show_attr_tx_bias, NULL); +static DEVICE_ATTR(tx_power, S_IRUGO, show_attr_tx_power, NULL); +static DEVICE_ATTR(rx_power, S_IRUGO, show_attr_rx_power, NULL); +static DEVICE_ATTR(info, S_IRUGO, show_attr_info, NULL); +static DEVICE_ATTR(if_type, S_IRUGO, show_attr_if_type, NULL); +static DEVICE_ATTR(if_speed, S_IRUGO, show_attr_if_speed, NULL); +static DEVICE_ATTR(if_lane, S_IRUGO, show_attr_if_lane, NULL); +static DEVICE_ATTR(soft_rx_los, S_IRUGO, show_attr_soft_rx_los, NULL); +static DEVICE_ATTR(soft_tx_fault, S_IRUGO, show_attr_soft_tx_fault, NULL); +static DEVICE_ATTR(wavelength, S_IRUGO, show_attr_wavelength, NULL); +static DEVICE_ATTR(tx_eq, S_IRUGO|S_IWUSR, show_attr_tx_eq, store_attr_tx_eq); +static DEVICE_ATTR(rx_am, S_IRUGO|S_IWUSR, show_attr_rx_am, store_attr_rx_am); +static DEVICE_ATTR(rx_em, S_IRUGO|S_IWUSR, show_attr_rx_em, store_attr_rx_em); +static DEVICE_ATTR(cdr, S_IRUGO|S_IWUSR, show_attr_cdr, store_attr_cdr); +static DEVICE_ATTR(soft_rs0, S_IRUGO|S_IWUSR, show_attr_soft_rs0, store_attr_soft_rs0); +static DEVICE_ATTR(soft_rs1, S_IRUGO|S_IWUSR, show_attr_soft_rs1, store_attr_soft_rs1); +static DEVICE_ATTR(soft_tx_disable, S_IRUGO|S_IWUSR, show_attr_soft_tx_disable, store_attr_soft_tx_disable); +static DEVICE_ATTR(auto_tx_disable, S_IRUGO|S_IWUSR, show_attr_auto_tx_disable, store_attr_auto_tx_disable); +static DEVICE_ATTR(extphy_offset, S_IRUGO|S_IWUSR, show_attr_extphy_offset, store_attr_extphy_offset); +static DEVICE_ATTR(extphy_reg, S_IRUGO|S_IWUSR, show_attr_extphy_reg, store_attr_extphy_reg); + +/* ========== IO Expander attribute: from expander ========== + */ +static DEVICE_ATTR(present, S_IRUGO, show_attr_present, NULL); +static DEVICE_ATTR(tx_fault, S_IRUGO, show_attr_tx_fault, NULL); +static DEVICE_ATTR(rxlos, S_IRUGO, show_attr_rxlos, NULL); +static DEVICE_ATTR(tx_disable, S_IRUGO|S_IWUSR, show_attr_tx_disable, store_attr_tx_disable); +static DEVICE_ATTR(reset, S_IRUGO|S_IWUSR, show_attr_reset, store_attr_reset); +static DEVICE_ATTR(lpmod, S_IRUGO|S_IWUSR, show_attr_lpmod, store_attr_lpmod); +static DEVICE_ATTR(modsel, S_IRUGO|S_IWUSR, show_attr_modsel, store_attr_modsel); +static DEVICE_ATTR(hard_rs0, S_IRUGO|S_IWUSR, show_attr_hard_rs0, store_attr_hard_rs0); +static DEVICE_ATTR(hard_rs1, S_IRUGO|S_IWUSR, show_attr_hard_rs1, store_attr_hard_rs1); + +/* ========== Functions for module handling ========== + */ +static void +clean_port_obj(void){ + + dev_t dev_num; + char dev_name[32]; + struct device *device_p; + struct transvr_obj_s *transvr_obj_p; + int minor_curr, port_id; + + for (minor_curr=0; minor_curri2c_client_p); + kfree(transvr_obj_p->vendor_name); + kfree(transvr_obj_p->vendor_pn); + kfree(transvr_obj_p->vendor_rev); + kfree(transvr_obj_p->vendor_sn); + kfree(transvr_obj_p->worker_p); + kfree(transvr_obj_p); + } + dev_num = MKDEV(port_major, minor_curr); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static void +clean_swps_common(void){ + + dev_t dev_num; + struct device *device_p; + + device_p = get_swpdev_by_name(SWP_DEV_MODCTL); + if (device_p){ + dev_num = MKDEV(ctl_major, 1); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + cancel_delayed_work_sync(&swp_polling); + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static int +get_platform_type(void){ + + int i; + int pf_total = ARRAY_SIZE(platform_map); + char log_msg[64] = "ERROR"; + + platform_p = kzalloc(sizeof(struct inv_platform_s), GFP_KERNEL); + if (!platform_p){ + snprintf(log_msg, sizeof(log_msg), "kzalloc fail"); + goto err_get_platform_type_1; + } + memset(platform_p->name, 0, sizeof(platform_p->name)); + + switch (PLATFORM_SETTINGS) { + case PLATFORM_TYPE_AUTO: + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", dmi_get_system_info(DMI_BOARD_NAME)); + for (i=0; iname, platform_map[i].name) == 0) { + platform_p->id = platform_map[i].id; + snprintf(log_msg, sizeof(log_msg), + "Auto detect platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Auto detect fail! detect platform: %s", + platform_p->name); + goto err_get_platform_type_2; + + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + case PLATFORM_TYPE_REDWOOD: + case PLATFORM_TYPE_REDWOOD_FSL: + case PLATFORM_TYPE_HUDSON32I_GA: + case PLATFORM_TYPE_SPRUCE: + case PLATFORM_TYPE_CYPRESS_GA1: + case PLATFORM_TYPE_CYPRESS_GA2: + case PLATFORM_TYPE_CYPRESS_BAI: + case PLATFORM_TYPE_TAHOE: + case PLATFORM_TYPE_SEQUOIA_GA: + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + case PLATFORM_TYPE_COTTONWOOD_RANGELEY: + case PLATFORM_TYPE_MAPLE: + platform_p->id = PLATFORM_SETTINGS; + for (i=0; iname, (sizeof(platform_p->name) - 1), + "%s", platform_map[i].name); + snprintf(log_msg, sizeof(log_msg), + "User setup platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Internal error, can not map id:%d", + PLATFORM_SETTINGS); + goto err_get_platform_type_2; + + default: + break; + } + snprintf(log_msg, sizeof(log_msg), + "PLATFORM_SETTINGS:%d undefined", PLATFORM_SETTINGS); + goto err_get_platform_type_2; + +ok_get_platform_type_1: + SWPS_DEBUG("%s: %s, :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return 0; + +err_get_platform_type_2: + kfree(platform_p); +err_get_platform_type_1: + SWPS_ERR("%s: %s :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return -1; +} + + +static int +get_layout_info(void){ + + switch (platform_p->id) { +#ifdef SWPS_MAGNOLIA + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + gpio_rest_mux = magnolia_gpio_rest_mux; + ioexp_layout = magnolia_ioexp_layout; + port_layout = magnolia_port_layout; + ioexp_total = ARRAY_SIZE(magnolia_ioexp_layout); + port_total = ARRAY_SIZE(magnolia_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD + case PLATFORM_TYPE_REDWOOD: + gpio_rest_mux = redwood_gpio_rest_mux; + ioexp_layout = redwood_ioexp_layout; + port_layout = redwood_port_layout; + ioexp_total = ARRAY_SIZE(redwood_ioexp_layout); + port_total = ARRAY_SIZE(redwood_port_layout); + break; +#endif +#ifdef SWPS_HUDSON32I_GA + case PLATFORM_TYPE_HUDSON32I_GA: + gpio_rest_mux = hudsin32iga_gpio_rest_mux; + ioexp_layout = hudson32iga_ioexp_layout; + port_layout = hudson32iga_port_layout; + ioexp_total = ARRAY_SIZE(hudson32iga_ioexp_layout); + port_total = ARRAY_SIZE(hudson32iga_port_layout); + break; +#endif +#ifdef SWPS_SPRUCE + case PLATFORM_TYPE_SPRUCE: + gpio_rest_mux = spruce_gpio_rest_mux; + ioexp_layout = spruce_ioexp_layout; + port_layout = spruce_port_layout; + ioexp_total = ARRAY_SIZE(spruce_ioexp_layout); + port_total = ARRAY_SIZE(spruce_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA1 + case PLATFORM_TYPE_CYPRESS_GA1: + gpio_rest_mux = cypress_ga1_gpio_rest_mux; + ioexp_layout = cypress_ga1_ioexp_layout; + port_layout = cypress_ga1_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga1_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga1_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA2 + case PLATFORM_TYPE_CYPRESS_GA2: + gpio_rest_mux = cypress_ga2_gpio_rest_mux; + ioexp_layout = cypress_ga2_ioexp_layout; + port_layout = cypress_ga2_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga2_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga2_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_BAI + case PLATFORM_TYPE_CYPRESS_BAI: + gpio_rest_mux = cypress_b_gpio_rest_mux; + ioexp_layout = cypress_b_ioexp_layout; + port_layout = cypress_b_port_layout; + ioexp_total = ARRAY_SIZE(cypress_b_ioexp_layout); + port_total = ARRAY_SIZE(cypress_b_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD_FSL + case PLATFORM_TYPE_REDWOOD_FSL: + gpio_rest_mux = redwood_fsl_gpio_rest_mux; + ioexp_layout = redwood_fsl_ioexp_layout; + port_layout = redwood_fsl_port_layout; + ioexp_total = ARRAY_SIZE(redwood_fsl_ioexp_layout); + port_total = ARRAY_SIZE(redwood_fsl_port_layout); + break; +#endif +#ifdef SWPS_TAHOE + case PLATFORM_TYPE_TAHOE: + gpio_rest_mux = tahoe_gpio_rest_mux; + ioexp_layout = tahoe_ioexp_layout; + port_layout = tahoe_port_layout; + ioexp_total = ARRAY_SIZE(tahoe_ioexp_layout); + port_total = ARRAY_SIZE(tahoe_port_layout); + break; +#endif +#ifdef SWPS_SEQUOIA + case PLATFORM_TYPE_SEQUOIA_GA: + gpio_rest_mux = sequoia_gpio_rest_mux; + ioexp_layout = sequoia_ioexp_layout; + port_layout = sequoia_port_layout; + ioexp_total = ARRAY_SIZE(sequoia_ioexp_layout); + port_total = ARRAY_SIZE(sequoia_port_layout); + break; +#endif +#ifdef SWPS_LAVENDER + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + gpio_rest_mux = lavender_gpio_rest_mux; + ioexp_layout = lavender_ioexp_layout; + port_layout = lavender_port_layout; + ioexp_total = ARRAY_SIZE(lavender_ioexp_layout); + port_total = ARRAY_SIZE(lavender_port_layout); + break; +#endif +#ifdef SWPS_COTTONWOOD_RANGELEY + case PLATFORM_TYPE_COTTONWOOD_RANGELEY: + gpio_rest_mux = cottonwood_rangeley_gpio_rest_mux; + ioexp_layout = cottonwood_rangeley_ioexp_layout; + port_layout = cottonwood_rangeley_port_layout; + ioexp_total = ARRAY_SIZE(cottonwood_rangeley_ioexp_layout); + port_total = ARRAY_SIZE(cottonwood_rangeley_port_layout); + break; +#endif +#ifdef SWPS_MAPLE + case PLATFORM_TYPE_MAPLE: + gpio_rest_mux = maple_gpio_rest_mux; + ioexp_layout = maple_ioexp_layout; + port_layout = maple_port_layout; + ioexp_total = ARRAY_SIZE(maple_ioexp_layout); + port_total = ARRAY_SIZE(maple_port_layout); + break; +#endif + default: + SWPS_ERR(" Invalid platform: %d (%s)\n", + platform_p->id, platform_p->name); + return -1; + } + SWPS_INFO("Start to initial platform: %d (%s)\n", + platform_p->id, platform_p->name); + return 0; +} + + +/* ========== Functions for objects operations ========== + */ +static int +__detect_issues_port(int minor_num) { + + struct transvr_obj_s *tobj_p; + int port_id = port_layout[minor_num].port_id; + char port_name[32] = "ERR"; + char *i2c_emsg = "detected bad transceiver/cable"; + + memset(port_name, 0, sizeof(port_name)); + snprintf(port_name, sizeof(port_name), "%s%d", SWP_DEV_PORT, port_id); + tobj_p = _get_transvr_obj(port_name); + if (!tobj_p) { + SWPS_INFO("%s: tobj_p is NULL :%d\n", __func__, minor_num); + return -1; + } + if (resync_channel_tier_2(tobj_p) < 0) { + if (check_channel_tier_1() < 0) { + alarm_msg_2_user(tobj_p, i2c_emsg); + return -2;; + } + } + return 0; +} + + +static int +_detect_issues_port(void) { + /* OK : retrun -1; + * Fail: return fail at which minor number (0~N) + */ + char *emsg = "ERR"; + int minor = 0; + int minor_2st = 1; + + /* Force moving the initial channel pointer + * Filter out case of fail at minor-0 port + */ + while (minor_2st < port_total) { + minor = minor_2st; + if (__detect_issues_port(minor_2st) < 0) { + emsg = "detect minor_2st fail"; + goto err_p_detect_issues_port; + } + minor_2st += 8; + } + /* Scan all port */ + for (minor=0; minor:%d\n", __func__, emsg, minor_err); + return -1; +} + + +static int +check_transvr_obj_one(char *dev_name){ + /* [Return] + * 0 : Doesn't need to take care + * -1 : Single error + * -2 : Critical error (I2C topology die) + * -9 : Internal error + */ + struct transvr_obj_s *tobj_p = NULL; + int retval = -9; + + tobj_p = _get_transvr_obj(dev_name); + if (!tobj_p) { + SWPS_ERR("%s: %s _get_transvr_obj fail\n", + __func__, dev_name); + return -9; + } + /* Check transceiver current status */ + lock_transvr_obj(tobj_p); + retval = tobj_p->check(tobj_p); + unlock_transvr_obj(tobj_p); + switch (retval) { + case 0: + case ERR_TRANSVR_UNPLUGGED: + case ERR_TRNASVR_BE_ISOLATED: + case ERR_TRANSVR_TASK_BUSY: + return 0; + + case ERR_TRANSVR_I2C_CRASH: + default: + break; + } + /* Identify abnormal case */ + if (check_channel_tier_1() < 0) { + SWPS_DEBUG("%s: %s critical error :%d\n", + __func__, dev_name, retval); + return -2; + } + SWPS_DEBUG("%s: %s single error :%d\n", + __func__, dev_name, retval); + return -1; +} + + +static int +check_transvr_objs(void){ + + char dev_name[32]; + int port_id, err_code; + int minor_curr = 0; + + for (minor_curr=0; minor_curr:%d\n", + __func__, dev_name, err_code); + break; + } + } + return 0; + +err_check_transvr_objs: + SWPS_ERR("%s: %s reset_i2c_topology fail.\n", + __func__, dev_name); + return -1; +} + + +static void +swp_polling_worker(struct work_struct *work){ + + /* Reset I2C */ + if (flag_i2c_reset) { + goto polling_reset_i2c; + } + /* Check IOEXP */ + if (check_ioexp_objs() < 0) { + goto polling_reset_i2c; + } + /* Check transceiver */ + if (check_transvr_objs() < 0) { + SWPS_DEBUG("%s: check_transvr_objs fail.\n", __func__); + flag_i2c_reset = 1; + } + goto polling_schedule_round; + +polling_reset_i2c: + SWPS_DEBUG("%s: reset_i2c_topology start.\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset i2c fail!\n", __func__); + flag_i2c_reset = 1; + } else { + SWPS_DEBUG("%s: reset_i2c_topology OK.\n", __func__); + flag_i2c_reset = 0; + } +polling_schedule_round: + schedule_delayed_work(&swp_polling, _get_polling_period()); +} + + +/* ========== Functions for register something ========== + */ +static int +register_transvr_common_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_id) < 0) { + err_attr = "dev_attr_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_ext_id) < 0) { + err_attr = "dev_attr_ext_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_connector) < 0) { + err_attr = "dev_attr_connector"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_name) < 0) { + err_attr = "dev_attr_vendor_name"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_pn) < 0) { + err_attr = "dev_attr_vendor_pn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_rev) < 0) { + err_attr = "dev_attr_vendor_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_sn) < 0) { + err_attr = "dev_attr_vendor_sn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_br) < 0) { + err_attr = "dev_attr_br"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_smf) < 0) { + err_attr = "dev_attr_len_smf"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om1) < 0) { + err_attr = "dev_attr_len_om1"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om2) < 0) { + err_attr = "dev_attr_len_om2"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om3) < 0) { + err_attr = "dev_attr_len_om3"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om4) < 0) { + err_attr = "dev_attr_len_om4"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_extend) < 0) { + err_attr = "dev_attr_comp_extend"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth) < 0) { + err_attr = "dev_attr_comp_eth"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_rev) < 0) { + err_attr = "dev_attr_comp_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_info) < 0) { + err_attr = "dev_attr_info"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_type) < 0) { + err_attr = "dev_attr_if_type"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_speed) < 0) { + err_attr = "dev_attr_if_speed"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_lane) < 0) { + err_attr = "dev_attr_if_lane"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_temperature) < 0) { + err_attr = "dev_attr_temperature"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_voltage) < 0) { + err_attr = "dev_attr_voltage"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_bias) < 0) { + err_attr = "dev_attr_tx_bias"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power) < 0) { + err_attr = "dev_attr_tx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power) < 0) { + err_attr = "dev_attr_rx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_eq) < 0) { + err_attr = "dev_attr_tx_eq"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_em) < 0) { + err_attr = "dev_attr_rx_em"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_wavelength) < 0) { + err_attr = "dev_attr_wavelength"; + goto err_transvr_comm_attr; + } + return 0; + +err_transvr_comm_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + +static int +register_transvr_sfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10) < 0) { + err_attr = "dev_attr_comp_eth_10"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_len_sm) < 0) { + err_attr = "dev_attr_len_sm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rate_id) < 0) { + err_attr = "dev_attr_rate_id"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs0) < 0) { + err_attr = "dev_attr_soft_rs0"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs1) < 0) { + err_attr = "dev_attr_soft_rs1"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_offset) < 0) { + err_attr = "dev_attr_extphy_offset"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_reg) < 0) { + err_attr = "dev_attr_extphy_reg"; + goto err_transvr_sfp_attr; + } + return 0; + +err_transvr_sfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10_40) < 0) { + err_attr = "dev_attr_comp_eth_10_40"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_power_cls) < 0) { + err_attr = "dev_attr_power_cls"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rx_los) < 0) { + err_attr = "soft_rx_los"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_disable) < 0) { + err_attr = "soft_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_auto_tx_disable) < 0) { + err_attr = "auto_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_fault) < 0) { + err_attr = "soft_tx_fault"; + goto err_transvr_qsfp_attr; + } + return 0; + +err_transvr_qsfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp28_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_qsfp_attr(device_p) < 0){ + err_attr = "register_transvr_qsfp_attr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_cdr) < 0) { + err_attr = "dev_attr_cdr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_rx_am) < 0) { + err_attr = "dev_attr_rx_am"; + goto err_transvr_qsfp28_attr; + } + return 0; + +err_transvr_qsfp28_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + switch (transvr_obj->layout){ + case TRANSVR_TYPE_SFP: + if (register_transvr_sfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + if (register_transvr_qsfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP_28: + if (register_transvr_qsfp28_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + default: + goto err_reg_tvr_attr; + } + return 0; + +err_reg_tvr_attr: + SWPS_ERR("%s: fail! type=%d \n", __func__, transvr_obj->type); + return -1; +} + + +static int +register_ioexp_attr_sfp_1(struct device *device_p){ + /* Support machine type: + * - SFP : Magnolia + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_fault) < 0) { + err_attr = "dev_attr_tx_fault"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_rxlos) < 0) { + err_attr = "dev_attr_rxlos"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_disable) < 0) { + err_attr = "dev_attr_tx_disable"; + goto err_ioexp_sfp1_attr; + } + return 0; + +err_ioexp_sfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_sfp_2(struct device *device_p){ + /* Support machine type: + * - SFP28 : Cypress + */ + char *err_attr = NULL; + + if (register_ioexp_attr_sfp_1(device_p) < 0){ + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs0) < 0) { + err_attr = "dev_attr_hard_rs0"; + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs1) < 0) { + err_attr = "dev_attr_hard_rs1"; + goto err_ioexp_sfp2_attr; + } + return 0; + +err_ioexp_sfp2_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_qsfp_1(struct device *device_p){ + /* Support machine type: + * - QSFP : Magnolia, Redwood, Hudson32i + * - QSFP+ : Magnolia, Redwood, Hudson32i + * - QSFP28: Redwood + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_reset) < 0) { + err_attr = "dev_attr_reset"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_lpmod) < 0) { + err_attr = "dev_attr_lpmod"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_modsel) < 0) { + err_attr = "dev_attr_modsel"; + goto err_ioexp_qsfp1_attr; + } + return 0; + +err_ioexp_qsfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_modctl_attr(struct device *device_p){ + + char *err_msg = NULL; + + if (device_create_file(device_p, &dev_attr_platform) < 0) { + err_msg = "dev_attr_platform"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_version) < 0) { + err_msg = "dev_attr_version"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_status) < 0) { + err_msg = "dev_attr_status"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_i2c) < 0) { + err_msg = "dev_attr_reset_i2c"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_swps) < 0) { + err_msg = "dev_attr_reset_swps"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_auto_config) < 0) { + err_msg = "dev_attr_auto_config"; + goto err_reg_modctl_attr; + } + return 0; + +err_reg_modctl_attr: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_ioexp_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + char *err_msg = "ERR"; + + switch (transvr_obj->ioexp_obj_p->ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case CPLD_TYPE_COTTONWOOD: + if (register_ioexp_attr_sfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + case IOEXP_TYPE_CYPRESS_NABC: + case IOEXP_TYPE_MAPLE_NABC: + if (register_ioexp_attr_sfp_2(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_2 fail"; + goto err_reg_ioexp_attr; + } + break; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case IOEXP_TYPE_MAPLE_0ABC: + if (register_ioexp_attr_qsfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_qsfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + default: + err_msg = "Unknow type"; + goto err_reg_ioexp_attr; + } + return 0; + +err_reg_ioexp_attr: + SWPS_ERR("%s: %s :%d \n", + __func__, err_msg, transvr_obj->ioexp_obj_p->ioexp_type); + return -1; +} + + +static int +register_modctl_device(void) { + + struct device *device_p = NULL; + int minor_comm = 0; /* Default minor number for common device */ + dev_t dev_num = MKDEV(ctl_major, minor_comm); + char *err_msg = "ERROR"; + + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + NULL, /* void *private_data */ + SWP_DEV_MODCTL); /* const char *fmt */ + if (IS_ERR(device_p)){ + err_msg = "device_create fail"; + goto err_register_modctl_device_1; + } + if (register_modctl_attr(device_p) < 0) { + err_msg = "register_modctl_attr fail"; + goto err_register_modctl_device_2; + } + return 0; + +err_register_modctl_device_2: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_register_modctl_device_1: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_port_device(char *dev_name, + dev_t dev_num, + struct transvr_obj_s *transvr_obj){ + + struct device *device_p = NULL; + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + transvr_obj, /* void *private_data */ + dev_name); /* const char *fmt */ + if (IS_ERR(device_p)){ + goto err_regswp_create_dev; + } + if (register_transvr_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + if (register_ioexp_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + return 0; + +err_regswp_reg_attr: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_regswp_create_dev: + SWPS_ERR("%s fail! :%s\n", __func__, dev_name); + return -1; +} + + +static int +register_swp_module(void){ + + dev_t ctl_devt = 0; + dev_t port_devt = 0; + int dev_total = port_total + 1; /* char_dev for module control */ + + /* Register device number */ + if (alloc_chrdev_region(&ctl_devt, 0, 1, SWP_DEV_MODCTL) < 0){ + SWPS_WARN("Allocate CTL MAJOR failure! \n"); + goto err_register_swp_module_1; + } + if (alloc_chrdev_region(&port_devt, 0, dev_total, SWP_CLS_NAME) < 0){ + SWPS_WARN("Allocate PORT MAJOR failure! \n"); + goto err_register_swp_module_2; + } + ctl_major = MAJOR(ctl_devt); + port_major = MAJOR(port_devt); + + /* Create class object */ + swp_class_p = class_create(THIS_MODULE, SWP_CLS_NAME); + if (IS_ERR(swp_class_p)) { + SWPS_ERR("Create class failure! \n"); + goto err_register_swp_module_3; + } + return 0; + +err_register_swp_module_3: + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_register_swp_module_2: + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); +err_register_swp_module_1: + return -1; +} + + +/* ========== Module initial relate ========== + */ +static int +create_ioexp_objs(void) { + + int i, run_mod; + + /* Clean IOEXP object */ + clean_ioexp_objs(); + /* Get running mode */ + run_mod = IOEXP_MODE_DIRECT; + if (SWP_POLLING_ENABLE){ + run_mod = IOEXP_MODE_POLLING; + } + /* Create IOEXP object */ + for(i=0; i devlen_max) { + snprintf(err_msg, sizeof(err_msg), + "SWP_DEV_PORT too long!"); + goto err_initport_create_tranobj; + } + memset(dev_name, 0, sizeof(dev_name)); + snprintf(dev_name, devlen_max, "%s%d", SWP_DEV_PORT, port_id); + /* Create transceiver object */ + ioexp_obj_p = get_ioexp_obj(ioexp_id); + if (!ioexp_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "IOEXP object:%d not exist", ioexp_id); + goto err_initport_create_tranobj; + } + transvr_obj_p = create_transvr_obj(dev_name, chan_id, ioexp_obj_p, + ioexp_virt_offset, transvr_type, + chipset_type, run_mod); + if (!transvr_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "Create transceiver object fail :%s", dev_name); + goto err_initport_create_tranobj; + } + /* Setup Lane_ID mapping */ + i = ARRAY_SIZE(port_layout[minor_curr].lane_id); + j = ARRAY_SIZE(transvr_obj_p->lane_id); + if (i != j) { + snprintf(err_msg, sizeof(err_msg), + "Lane_id size inconsistent %d/%d", i, j); + goto err_initport_reg_device; + } + memcpy(transvr_obj_p->lane_id, port_layout[minor_curr].lane_id, i*sizeof(int)); + /* Create and register device object */ + if (register_port_device(dev_name, MKDEV(port_major, minor_curr), transvr_obj_p) < 0){ + snprintf(err_msg, sizeof(err_msg), + "register_port_device fail"); + goto err_initport_reg_device; + } + /* Setup device_ptr of transvr_obj */ + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + snprintf(err_msg, sizeof(err_msg), + "get_swpdev_by_name fail"); + goto err_initport_reg_device; + } + transvr_obj_p->transvr_dev_p = dev_p; + /* Success */ + ok_count++; + } + SWPS_INFO("%s: initialed %d port-dev",__func__, ok_count); + return 0; + +err_initport_reg_device: + kfree(transvr_obj_p); +err_initport_create_tranobj: + clean_port_obj(); + SWPS_ERR("%s: %s", __func__, err_msg); + SWPS_ERR("Dump: :%d :%d :%d :%d :%d :%d\n", + port_id, chan_id, ioexp_id, ioexp_virt_offset, transvr_type, run_mod); + return -1; +} + + +static int +init_dev_topology(void){ + + int err; + char *emsg = "ERR"; + flag_mod_state = SWP_STATE_NORMAL; + + err = init_ioexp_objs(); + switch(err){ + case 0: /* Normal */ + SWPS_DEBUG("%s: normal case\n", __func__); + break; + + case -1: /* topology error */ + SWPS_DEBUG("%s: detect tier-1 topology initial failure :%d\n", + __func__, err); + /* Reset and isolate */ + err = reset_i2c_topology(); + if (err < 0) { + emsg = "reset i2c topology fail"; + goto err_init_dev_topology; + } + /* Re-initial again */ + err = init_ioexp_objs(); + if (err < 0) { + emsg = "re-init ioexp objects fail"; + goto err_init_dev_topology; + } + break; + + case -2: /* Internal error */ + SWPS_DEBUG("%s: internal error case\n", __func__); + err = -2; + emsg = "internal error"; + goto err_init_dev_topology; + + default: + SWPS_DEBUG("%s: undefined error case\n", __func__); + emsg = "undefined error case"; + goto err_init_dev_topology; + } + SWPS_DEBUG("%s: initial I2C topology success\n", __func__); + return 0; + +err_init_dev_topology: + SWPS_ERR("%s: %s :%d\n", __func__, emsg, err); + return -1; +} + + +static int +init_polling_task(void){ + + if (SWP_POLLING_ENABLE){ + schedule_delayed_work(&swp_polling, _get_polling_period()); + } + return 0; +} + + +static int +init_swps_common(void){ + + char *err_msg = "ERR"; + + auto_config = 0; + if ((SWP_AUTOCONFIG_ENABLE) && (SWP_POLLING_ENABLE)){ + auto_config = 1; + } + if (register_modctl_device() < 0) { + err_msg = "register_modctl_device fail"; + goto err_init_swps_common_1; + } + if (_update_auto_config_2_trnasvr() < 0) { + err_msg = "_update_auto_config_2_trnasvr fail"; + goto err_init_swps_common_1; + } + if (init_polling_task() < 0){ + err_msg = "init_polling_task fail"; + goto err_init_swps_common_1; + } + return 0; + +err_init_swps_common_1: + clean_swps_common(); + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int __init +swp_module_init(void){ + + if (get_platform_type() < 0){ + goto err_init_out; + } + if (get_layout_info() < 0){ + goto err_init_out; + } + if (register_swp_module() < 0){ + goto err_init_out; + } + if (create_ioexp_objs() < 0){ + goto err_init_ioexp; + } + if (create_port_objs() < 0){ + goto err_init_portobj; + } + if (init_mux_gpio(gpio_rest_mux) < 0){ + goto err_init_mux; + } + if (init_dev_topology() < 0){ + goto err_init_topology; + } + if (init_swps_common() < 0){ + goto err_init_topology; + } + SWPS_INFO("Inventec switch-port module V.%s initial success.\n", SWP_VERSION); + return 0; + + +err_init_topology: + clean_mux_gpio(); +err_init_mux: + clean_port_obj(); +err_init_portobj: + clean_ioexp_objs(); +err_init_ioexp: + class_unregister(swp_class_p); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_init_out: + SWPS_ERR("Inventec switch-port module V.%s initial failure.\n", SWP_VERSION); + return -1; +} + + +static void __exit +swp_module_exit(void){ + + clean_swps_common(); + clean_port_obj(); + clean_ioexp_objs(); + clean_mux_gpio(); + class_unregister(swp_class_p); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); + SWPS_INFO("Remove Inventec switch-port module success.\n"); +} + + +/* Module information */ +MODULE_AUTHOR(SWP_AUTHOR); +MODULE_DESCRIPTION(SWP_DESC); +MODULE_VERSION(SWP_VERSION); +MODULE_LICENSE(SWP_LICENSE); + +module_init(swp_module_init); +module_exit(swp_module_exit); + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_swps.h b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_swps.h new file mode 100644 index 00000000000..d28a0a3c968 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/inv_swps.h @@ -0,0 +1,1164 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef INV_SWPS_H +#define INV_SWPS_H + +#include "transceiver.h" +#include "io_expander.h" +#include "inv_mux.h" + +/* Module settings */ +#define SWP_CLS_NAME "swps" +#define SWP_DEV_PORT "port" +#define SWP_DEV_MODCTL "module" +#define SWP_RESET_PWD "inventec" +#define SWP_POLLING_PERIOD (300) /* msec */ +#define SWP_POLLING_ENABLE (1) +#define SWP_AUTOCONFIG_ENABLE (1) + +/* Module information */ +#define SWP_AUTHOR "Neil " +#define SWP_DESC "Inventec port and transceiver driver" +#define SWP_VERSION "4.2.9" +#define SWP_LICENSE "GPL" + +/* Module status define */ +#define SWP_STATE_NORMAL (0) +#define SWP_STATE_I2C_DIE (-91) + +/* [Note]: + * Functions and mechanism for auto-detect platform type is ready, + * But HW and BIOS not ready! We need to wait them. + * So, please do not use PLATFORM_TYPE_AUTO until they are ready. + * (2016.06.13) + */ +#define PLATFORM_TYPE_AUTO (100) +#define PLATFORM_TYPE_MAGNOLIA (111) +#define PLATFORM_TYPE_MAGNOLIA_FNC (112) +#define PLATFORM_TYPE_REDWOOD (121) +#define PLATFORM_TYPE_REDWOOD_FSL (122) +#define PLATFORM_TYPE_HUDSON32I_GA (131) +#define PLATFORM_TYPE_SPRUCE (141) +#define PLATFORM_TYPE_CYPRESS_GA1 (151) /* Up -> Down */ +#define PLATFORM_TYPE_CYPRESS_GA2 (152) /* Down -> Up */ +#define PLATFORM_TYPE_CYPRESS_BAI (153) /* Down -> Up */ +#define PLATFORM_TYPE_TAHOE (161) +#define PLATFORM_TYPE_SEQUOIA_GA (171) +#define PLATFORM_TYPE_LAVENDER_GA (181) +#define PLATFORM_TYPE_LAVENDER_ONL (182) +#define PLATFORM_TYPE_COTTONWOOD_RANGELEY (191) +#define PLATFORM_TYPE_MAPLE (201) +/* Current running platfrom */ +#define PLATFORM_SETTINGS PLATFORM_TYPE_MAPLE + +/* Define platform flag and kernel version */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA_FNC) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD) + #define SWPS_REDWOOD (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD_FSL) + #define SWPS_REDWOOD_FSL (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_HUDSON32I_GA) + #define SWPS_HUDSON32I_GA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SPRUCE) + #define SWPS_SPRUCE (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA1) + #define SWPS_CYPRESS_GA1 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA2) + #define SWPS_CYPRESS_GA2 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_BAI) + #define SWPS_CYPRESS_BAI (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_TAHOE) + #define SWPS_TAHOE (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SEQUOIA_GA) + #define SWPS_SEQUOIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_COTTONWOOD_RANGELEY) + #define SWPS_COTTONWOOD_RANGELEY (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAPLE) + #define SWPS_MAPLE (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#endif + + +struct inv_platform_s { + int id; + char name[64]; +}; + +struct inv_ioexp_layout_s { + int ioexp_id; + int ioexp_type; + struct ioexp_addr_s addr[4]; +}; + +struct inv_port_layout_s { + int port_id; + int chan_id; + int ioexp_id; + int ioexp_offset; + int transvr_type; + int chipset_type; + int lane_id[8]; +}; + + +/* ========================================== + * Inventec Platform Settings + * ========================================== + */ +struct inv_platform_s platform_map[] = { + {PLATFORM_TYPE_AUTO, "Auto-Detect" }, + {PLATFORM_TYPE_MAGNOLIA, "Magnolia" }, + {PLATFORM_TYPE_MAGNOLIA_FNC, "Magnolia_FNC" }, + {PLATFORM_TYPE_REDWOOD, "Redwood" }, + {PLATFORM_TYPE_REDWOOD_FSL, "Redwood_FSL" }, + {PLATFORM_TYPE_HUDSON32I_GA, "Hudson32i" }, + {PLATFORM_TYPE_SPRUCE, "Spruce" }, + {PLATFORM_TYPE_CYPRESS_GA1, "Cypress_GA1" }, + {PLATFORM_TYPE_CYPRESS_GA2, "Cypress_GA2" }, + {PLATFORM_TYPE_CYPRESS_BAI, "Cypress_BAI" }, + {PLATFORM_TYPE_TAHOE, "Tahoe" }, + {PLATFORM_TYPE_SEQUOIA_GA, "Sequoia_GA" }, + {PLATFORM_TYPE_LAVENDER_GA, "Lavender_GA" }, + {PLATFORM_TYPE_LAVENDER_ONL, "Lavender_ONL" }, + {PLATFORM_TYPE_COTTONWOOD_RANGELEY, "Cottonwood_RANGELEY" }, + {PLATFORM_TYPE_MAPLE, "Maple" }, +}; + + +/* ========================================== + * Magnolia Layout configuration + * ========================================== + */ +#ifdef SWPS_MAGNOLIA +unsigned magnolia_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s magnolia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAGINOLIA_NAB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {1, IOEXP_TYPE_MAGINOLIA_NAB, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {2, IOEXP_TYPE_MAGINOLIA_NAB, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {3, IOEXP_TYPE_MAGINOLIA_4AB, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf0, 0xff}, {0xf0, 0xff}, }, }, /* addr[1] = I/O Expander 4 B */ + }, + {4, IOEXP_TYPE_MAGINOLIA_NAB, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {5, IOEXP_TYPE_MAGINOLIA_NAB, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {6, IOEXP_TYPE_MAGINOLIA_7AB, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[1] = I/O Expander 7 B */ + }, +}; + +struct inv_port_layout_s magnolia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 16} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 15} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 14} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 13} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 24} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 23} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 22} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 21} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 28} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 27} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 26} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 25} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 32} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 31} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 30} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 29} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 48} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 47} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 46} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 45} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 52} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 51} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 50} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 49} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 56} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 55} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 54} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 53} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 60} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 59} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 58} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 57} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 64} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 63} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 62} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 61} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 68} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 67} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 66} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 65} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 72} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 71} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 70} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 69} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 76} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 75} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 74} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 73} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD +unsigned redwood_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s redwood_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + +struct inv_port_layout_s redwood_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Hudson32i Layout configuration + * ========================================== + */ +#ifdef SWPS_HUDSON32I_GA +unsigned hudsin32iga_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s hudson32iga_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_HUDSON32IGA_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {1, IOEXP_TYPE_HUDSON32IGA_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {2, IOEXP_TYPE_HUDSON32IGA_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, + {3, IOEXP_TYPE_HUDSON32IGA_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, +}; + +struct inv_port_layout_s hudson32iga_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 1, 2, 3, 4} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 5, 6, 7, 8} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 9, 10, 11, 12} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 13, 14, 15, 16} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 17, 18, 19, 20} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 21, 22, 23, 24} }, + { 6, 12, 0, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 25, 26, 27, 28} }, + { 7, 13, 0, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 29, 30, 31, 32} }, + { 8, 14, 1, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 33, 34, 35, 36} }, + { 9, 15, 1, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 37, 38, 39, 40} }, + {10, 16, 1, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 41, 42, 43, 44} }, + {11, 17, 1, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 45, 46, 47, 48} }, + {12, 18, 1, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 49, 50, 51, 52} }, + {13, 19, 1, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 53, 54, 55, 56} }, + {14, 20, 1, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 57, 58, 59, 60} }, + {15, 21, 1, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 61, 62, 63, 64} }, + {16, 22, 2, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 65, 66, 67, 68} }, + {17, 23, 2, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 69, 70, 71, 72} }, + {18, 24, 2, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 73, 74, 75, 76} }, + {19, 25, 2, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {20, 26, 2, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {21, 27, 2, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 85, 86, 87, 88} }, + {22, 28, 2, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 89, 90, 91, 92} }, + {23, 29, 2, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 93, 94, 95, 96} }, + {24, 30, 3, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {25, 31, 3, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {26, 32, 3, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {27, 33, 3, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, + {28, 34, 3, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {113,114,115,116} }, + {29, 35, 3, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {117,118,119,120} }, + {30, 36, 3, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {121,122,123,124} }, + {31, 37, 3, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Spruce Layout configuration + * ========================================== + */ +#ifdef SWPS_SPRUCE +unsigned spruce_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s spruce_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SPRUCE_7AB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[2] = I/O Expander 7B */ + }, +}; + +struct inv_port_layout_s spruce_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Up->Down]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA1 +unsigned cypress_ga1_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; + +struct inv_ioexp_layout_s cypress_ga1_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga1_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Down->Up]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA2 +unsigned cypress_ga2_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_ga2_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga2_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 1, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 2, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 3, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 4, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 5, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 6, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 7, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 8, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + { 9, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {10, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {11, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {12, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {13, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {14, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {15, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {16, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {17, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {18, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {19, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {20, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {21, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {22, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {23, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {24, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {25, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {26, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {27, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {28, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {29, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {30, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {31, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {32, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {33, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {34, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {35, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {36, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {37, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {38, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {39, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {40, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {41, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {42, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {43, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {44, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {45, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {46, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {47, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {48, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {49, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {50, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {51, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {52, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {53, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (BaiDu version) + * ========================================== + */ +#ifdef SWPS_CYPRESS_BAI +unsigned cypress_b_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_b_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_b_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {54, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood_fsl Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD_FSL +unsigned redwood_fsl_gpio_rest_mux = MUX_RST_GPIO_48_PAC9548; + +struct inv_ioexp_layout_s redwood_fsl_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + + +struct inv_port_layout_s redwood_fsl_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Tahoe Layout configuration + * ========================================== + */ +#ifdef SWPS_TAHOE +unsigned tahoe_gpio_rest_mux = MUX_RST_GPIO_249_PCA9548; + +struct inv_ioexp_layout_s tahoe_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_TAHOE_6ABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {1, IOEXP_TYPE_TAHOE_5A, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[0] = I/O Expander 5 A */ + }, +}; + + +struct inv_port_layout_s tahoe_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 12, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + { 1, 11, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + { 2, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + { 3, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + { 4, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + { 5, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + { 6, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + { 7, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + { 8, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + { 9, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, +}; +#endif + + +/* ========================================== + * Sequoia Layout configuration + * ========================================== + */ +#ifdef SWPS_SEQUOIA +unsigned sequoia_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; + +struct inv_ioexp_layout_s sequoia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { {1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + +struct inv_port_layout_s sequoia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 9, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 1, 10, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 2, 11, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 3, 12, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 4, 13, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + { 5, 14, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 6, 15, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + { 7, 16, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + { 8, 17, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + { 9, 18, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {10, 19, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {11, 20, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {12, 21, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + {13, 22, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + {14, 23, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121, 122, 123, 124} }, + {15, 24, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + {16, 25, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {137, 138, 139, 140} }, + {17, 26, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {129, 130, 131, 132} }, + {18, 27, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {153, 154, 155, 156} }, + {19, 28, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {145, 146, 147, 148} }, + {20, 29, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {169, 170, 171, 172} }, + {21, 30, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {161, 162, 163, 164} }, + {22, 31, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {185, 186, 187, 188} }, + {23, 32, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {177, 178, 179, 180} }, + {24, 33, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {201, 202, 203, 204} }, + {25, 34, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {193, 194, 195, 196} }, + {26, 35, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {217, 218, 219, 220} }, + {27, 36, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {209, 210, 211, 212} }, + {28, 37, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {233, 234, 235, 236} }, + {29, 38, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {225, 226, 227, 228} }, + {30, 39, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {249, 250, 251, 252} }, + {31, 40, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {241, 242, 243, 244} }, + {32, 44, 4, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + {33, 43, 4, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + {34, 42, 4, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + {35, 41, 4, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + {36, 48, 4, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {37, 47, 4, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {38, 46, 4, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {39, 45, 4, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {40, 52, 5, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {41, 51, 5, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {42, 50, 5, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {43, 49, 5, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {44, 56, 5, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, + {45, 55, 5, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + {46, 54, 5, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125, 126, 127, 128} }, + {47, 53, 5, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117, 118, 119, 120} }, + {48, 60, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {141, 142, 143, 144} }, + {49, 59, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {133, 134, 135, 136} }, + {50, 58, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {157, 158, 159, 160} }, + {51, 57, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {149, 150, 151, 152} }, + {52, 64, 6, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {173, 174, 175, 176} }, + {53, 63, 6, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {165, 166, 167, 168} }, + {54, 62, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {189, 190, 191, 192} }, + {55, 61, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {181, 182, 183, 184} }, + {56, 68, 7, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {205, 206, 207, 208} }, + {57, 67, 7, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {197, 198, 199, 200} }, + {58, 66, 7, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {221, 222, 223, 224} }, + {59, 65, 7, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {213, 214, 215, 216} }, + {60, 72, 7, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {237, 238, 239, 240} }, + {61, 71, 7, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {229, 230, 231, 232} }, + {62, 70, 7, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {253, 254, 255, 256} }, + {63, 69, 7, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {245, 246, 247, 248} }, +}; +#endif + + +/* ========================================== + * Lavender Layout configuration + * ========================================== + */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_69_PAC9548; +#endif + +#ifdef SWPS_LAVENDER +struct inv_ioexp_layout_s lavender_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { { 1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + { 1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { { 2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + { 2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + { 2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { { 3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + { 3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + { 3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { { 4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + { 4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + { 4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { { 9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + { 9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + { 9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, + {8, IOEXP_TYPE_LAVENDER_P65, { { 5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xF6, 0xff}, {0xF8, 0xff}, }, }, /* addr[0] = I/O Expander CPU */ + }, +}; + + +struct inv_port_layout_s lavender_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {188, 189, 190, 191} }, + { 1, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {184, 185, 186, 187} }, + { 2, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {180, 181, 182, 183} }, + { 3, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {176, 177, 178, 179} }, + { 4, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {172, 173, 174, 175} }, + { 5, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {168, 169, 170, 171} }, + { 6, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {164, 165, 166, 167} }, + { 7, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {160, 161, 162, 163} }, + { 8, 25, 1, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {156, 157, 158, 159} }, + { 9, 26, 1, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {152, 153, 154, 155} }, + {10, 27, 1, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {148, 149, 150, 151} }, + {11, 28, 1, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {144, 145, 146, 147} }, + {12, 29, 1, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {140, 141, 142, 143} }, + {13, 30, 1, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {136, 137, 138, 139} }, + {14, 31, 1, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {132, 133, 134, 135} }, + {15, 32, 1, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {128, 129, 130, 131} }, + {16, 33, 2, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 0, 1, 2, 3} }, + {17, 34, 2, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 4, 5, 6, 7} }, + {18, 35, 2, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 8, 9, 10, 11} }, + {19, 36, 2, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 12, 13, 14, 15} }, + {20, 37, 2, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 16, 17, 18, 19} }, + {21, 38, 2, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 20, 21, 22, 23} }, + {22, 39, 2, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 24, 25, 26, 27} }, + {23, 40, 2, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 28, 29, 30, 31} }, + {24, 41, 3, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 32, 33, 34, 35} }, + {25, 42, 3, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 36, 37, 38, 39} }, + {26, 43, 3, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 40, 41, 42, 43} }, + {27, 44, 3, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 44, 45, 46, 47} }, + {28, 45, 3, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 48, 49, 50, 51} }, + {29, 46, 3, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 52, 53, 54, 55} }, + {30, 47, 3, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 56, 57, 58, 59} }, + {31, 48, 3, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 60, 61, 62, 63} }, + {32, 49, 4, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {256, 257, 258, 259} }, + {33, 50, 4, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {260, 261, 262, 263} }, + {34, 51, 4, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {264, 265, 266, 267} }, + {35, 52, 4, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {268, 269, 270, 271} }, + {36, 53, 4, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {272, 273, 274, 275} }, + {37, 54, 4, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {276, 277, 278, 279} }, + {38, 55, 4, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {280, 281, 282, 283} }, + {39, 56, 4, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {284, 285, 286, 287} }, + {40, 57, 5, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {288, 289, 290, 291} }, + {41, 58, 5, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {292, 293, 294, 295} }, + {42, 59, 5, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {296, 297, 298, 299} }, + {43, 60, 5, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {300, 301, 302, 303} }, + {44, 61, 5, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {304, 305, 306, 307} }, + {45, 62, 5, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {308, 309, 310, 311} }, + {46, 63, 5, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {312, 313, 314, 315} }, + {47, 64, 5, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {316, 317, 318, 319} }, + {48, 65, 6, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {444, 445, 446, 447} }, + {49, 66, 6, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {440, 441, 442, 443} }, + {50, 67, 6, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {436, 437, 438, 439} }, + {51, 68, 6, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {432, 433, 434, 435} }, + {52, 69, 6, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {428, 429, 430, 431} }, + {53, 70, 6, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {424, 425, 426, 427} }, + {54, 71, 6, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {420, 421, 422, 423} }, + {55, 72, 6, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {416, 417, 418, 419} }, + {56, 73, 7, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {412, 413, 414, 415} }, + {57, 74, 7, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {408, 409, 410, 411} }, + {58, 75, 7, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {404, 405, 406, 407} }, + {59, 76, 7, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {400, 401, 402, 403} }, + {60, 77, 7, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {396, 397, 398, 399} }, + {61, 78, 7, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {392, 393, 394, 395} }, + {62, 79, 7, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {388, 389, 390, 391} }, + {63, 80, 7, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {384, 385, 386, 387} }, + {64, 5, 8, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 64, 65, 66, 67} }, +}; +#endif + +/* =========================================================== + * Cottonwood Layout configuration Rangeley (Rangeley CPU board) + * =========================================================== + */ +#ifdef SWPS_COTTONWOOD_RANGELEY +unsigned cottonwood_rangeley_gpio_rest_mux = MUX_RST_GPIO_500_PAC9548; + +struct inv_ioexp_layout_s cottonwood_rangeley_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, CPLD_TYPE_COTTONWOOD,{ {1, 0x55, {22, 23, 24, 25}, {22, 23, 24, 25}, {-1, -1, -1, -1}, {0xee, 0xee, 0x99, 0x99}, {0x00, 0x00, 0x00, 0x00}, }, + }, + }, +}; + + +struct inv_port_layout_s cottonwood_rangeley_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHI_TYPE / LANE_ID */ + { 0, 2, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 75} }, + { 1, 3, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 77} }, + { 2, 4, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 79} }, + { 3, 5, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, +}; +#endif + +/* =========================================================== + * Maple Layout configuration + * =========================================================== + */ +#ifdef SWPS_MAPLE +unsigned maple_gpio_rest_mux = 249; + +struct inv_ioexp_layout_s maple_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAPLE_0ABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_MAPLE_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_MAPLE_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_MAPLE_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_MAPLE_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_MAPLE_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_MAPLE_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s maple_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 1} }, + { 1, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 2} }, + { 2, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 3} }, + { 3, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 4} }, + { 4, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 5} }, + { 5, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 6} }, + { 6, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 7} }, + { 7, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 8} }, + { 8, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 13} }, + { 9, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 14} }, + {10, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 15} }, + {11, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 16} }, + {12, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 21} }, + {13, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 22} }, + {14, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 23} }, + {15, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 24} }, + {16, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 29} }, + {17, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 30} }, + {18, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 31} }, + {19, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 32} }, + {20, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 33} }, + {21, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 34} }, + {22, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 35} }, + {23, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 36} }, + {24, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 41} }, + {25, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 42} }, + {26, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 43} }, + {27, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 44} }, + {28, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 49} }, + {29, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 50} }, + {30, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 51} }, + {31, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 52} }, + {32, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 57} }, + {33, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 58} }, + {34, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 59} }, + {35, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 60} }, + {36, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 61} }, + {37, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 62} }, + {38, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 63} }, + {39, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 64} }, + {40, 58, 6, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 65} }, + {41, 59, 6, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 66} }, + {42, 60, 6, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 67} }, + {43, 61, 6, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 68} }, + {44, 62, 6, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 69} }, + {45, 63, 6, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 70} }, + {46, 64, 6, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 71} }, + {47, 65, 6, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 72} }, + {48, 10, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {49, 11, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {50, 12, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, + {51, 13, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 97, 98, 99,100} }, + {52, 14, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {105,106,107,108} }, + {53, 15, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {113,114,115,116} }, + {54, 16, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {121,122,123,124} }, + {55, 17, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {125,126,127,128} }, +}; +#endif + +#endif /* INV_SWPS_H */ + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/io_expander.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/io_expander.c new file mode 100644 index 00000000000..4564b5855fd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/io_expander.c @@ -0,0 +1,2046 @@ +#include +#include +#include "io_expander.h" + +static struct ioexp_obj_s *ioexp_head_p = NULL; +static struct ioexp_obj_s *ioexp_tail_p = NULL; + + +/* ========== Register IOEXP layout ========== + */ +struct ioexp_map_s ioexp_map_magnolia_nab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_4ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_7ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {1, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {1, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {1, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 2}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 3}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 0, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 0, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 0, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 0, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 0, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 0, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 0, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 1, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 1, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 1, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 1, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 1, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 1, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 1, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 1, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 1, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 1, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {0, 1, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {0, 1, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {1, 1, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {1, 1, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {1, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {1, 1, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_5a = { + + .chip_amount = 1, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_6abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 0}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 3}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 0}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + {2, 1, 5}, /* map_present[8] = MOD_ABS_PORT(X+8) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {1, 0, 1}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 6}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 1, 3}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {2, 0, 1}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {2, 0, 6}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + {2, 1, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 2}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 7}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 1, 4}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {2, 0, 2}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {2, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + {2, 1, 4}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+8) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {1, 0, 0}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 0, 5}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 2}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {2, 0, 0}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {2, 0, 5}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + {2, 1, 2}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_sequoia_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_lavender_p65 = { + + .chip_amount = 1, + .data_width = 1, + + .map_present = { {0, 0, 4}, }, /* map_present[0] = MOD_ABS_PORT(X) */ + .map_reset = { {0, 0, 1}, }, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + .map_lpmod = { {0, 0, 2}, }, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + .map_modsel = { {0, 0, 0}, }, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ +}; + + +struct ioexp_map_s cpld_map_cottonwood = { + + .chip_amount = 1, + .data_width = 4, + + .map_present = { {0, 2, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 2, 4}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 3, 0}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 3, 4}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + }, + .map_tx_disable = { {0, 0, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + }, + .map_tx_fault = { {0, 2, 2}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 2, 6}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 3, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 3, 6}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + }, + .map_rxlos = { {0, 2, 1}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 2, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 3, 1}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 3, 5}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + }, + .map_hard_rs0 = { {0, 0, 2}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {0, 0, 6}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {0, 1, 2}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {0, 1, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + }, + .map_hard_rs1 = { {0, 0, 2}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {0, 0, 6}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {0, 1, 2}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {0, 1, 6}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + }, +}; + +struct ioexp_map_s ioexp_map_maple_0abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP_N_P(X+7) */ + }, +}; + +struct ioexp_map_s ioexp_map_maple_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + +/* ========== Private functions ========== + */ +int check_channel_tier_1(void); + +struct i2c_client * +_get_i2c_client(struct ioexp_obj_s *self, + int chip_id){ + + struct ioexp_i2c_s *i2c_curr_p = self->i2c_head_p; + + if (!(i2c_curr_p)){ + SWPS_ERR("%s: i2c_curr_p is NULL\n", __func__); + return NULL; + } + while (i2c_curr_p){ + if ((i2c_curr_p->chip_id) == chip_id){ + return i2c_curr_p->i2c_client_p; + } + i2c_curr_p = i2c_curr_p->next; + } + SWPS_ERR("%s: not exist! :%d\n", __func__, chip_id); + return NULL; +} + + +static int +_common_ioexp_update_one(struct ioexp_obj_s *self, + struct ioexp_addr_s *ioexp_addr, + int chip_id, + int data_width, + int show_err, + char *caller_name) { + int buf = 0; + int err = 0; + int data_id = 0; + int r_offset = 0; + + for(data_id=0; data_idread_offset[data_id]; + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), r_offset); + /* Check error */ + if (buf < 0) { + err = 1; + if (show_err) { + SWPS_INFO("IOEXP-%d read fail! :%d \n", self->ioexp_id, buf); + SWPS_INFO("Dump: :%d :0x%02x :%d, :%s\n", + ioexp_addr->chan_id, ioexp_addr->chip_addr, + ioexp_addr->read_offset[data_id], caller_name); + } + continue; + } + /* Update IOEXP object */ + self->chip_data[chip_id].data[data_id] = (uint8_t)buf; + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +common_ioexp_update_all(struct ioexp_obj_s *self, + int show_err, + char *caller_name){ + + int err = 0; + int chip_id = 0; + int chip_amount = self->ioexp_map_p->chip_amount; + + for (chip_id=0; chip_idioexp_map_p->map_addr[chip_id]), + chip_id, + self->ioexp_map_p->data_width, + show_err, + caller_name) < 0) { + err = 1; + } + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +_common_check_by_mode(struct ioexp_obj_s *self){ + + switch (self->mode){ + case IOEXP_MODE_DIRECT: + return self->fsm_4_direct(self); + + case IOEXP_MODE_POLLING: + if (self->state >= 0){ + return 0; + } + switch (self->state){ + case STATE_IOEXP_INIT: + return ERR_IOEXP_UNINIT; + case STATE_IOEXP_ABNORMAL: + return ERR_IOEXP_ABNORMAL; + default: + return ERR_IOEXP_NOSTATE; + } + break; + + default: + break; + } + SWPS_ERR("%s: Exception occurs. :%d \n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +static int +_common_get_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + char *func_mane){ + uint8_t buf; + int err_code; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Get data form cache */ + buf = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + return (int)(buf >> bitmap_obj_p->bit_shift & 0x01); +} + + +static int +_common_set_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + int input_val, + char *func_mane){ + int err_code, target_offset; + uint8_t origin_byte; + uint8_t modify_byte; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Prepare write date */ + origin_byte = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + switch (input_val) { + case 0: + modify_byte = origin_byte; + SWP_BIT_CLEAR(modify_byte, bitmap_obj_p->bit_shift); + break; + case 1: + modify_byte = origin_byte; + SWP_BIT_SET(modify_byte, bitmap_obj_p->bit_shift); + break; + default: + SWPS_ERR("Input value incorrect! :%d :%d :%s\n", + input_val, self->ioexp_id, func_mane); + return ERR_IOEXP_BADINPUT; + } + /* Setup i2c client */ + target_offset = self->ioexp_map_p->map_addr[bitmap_obj_p->chip_id].write_offset[bitmap_obj_p->ioexp_voffset]; + /* Write byte to chip via I2C */ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, bitmap_obj_p->chip_id), + target_offset, + modify_byte); + /* Update or bollback object */ + if (err_code < 0){ + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = origin_byte; + SWPS_ERR("I2C write fail! :%d :%d :%s :%d\n", + input_val, self->ioexp_id, func_mane, err_code); + return err_code; + } + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = modify_byte; + return 0; +} + + +/* ========== Object public functions ========== + */ +int +common_get_present(struct ioexp_obj_s *self, + int virt_offset){ + + int UNPLUG = 1; + int retval = ERR_IOEXP_UNEXCPT; + + retval = _common_get_bit(self, + &(self->ioexp_map_p->map_present[virt_offset]), + "common_get_present"); + if (retval < 0) { + /* [Note] + * => Transceiver object does not need to handle IOEXP layer issues. + */ + return UNPLUG; + } + return retval; +} + + +int +common_get_tx_fault(struct ioexp_obj_s *self, + int virt_offset){ + /* [Transmit Fault (Tx_Fault)] + * A catastrophic laser fault will activate the transmitter signal, + * TX_FAULT, and disable the laser. This signal is an open collector + * output (pull-up required on the host board). A low signal indicates + * normal laser operation and a high signal indicates a fault. The + * TX_FAULT will be latched high when a laser fault occurs and is + * cleared by toggling the TX_DISABLE input or power cycling the + * transceiver. The transmitter fault condition can also be monitored + * via the two-wire serial interface. + * (address A2, byte 110, bit 2). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_fault[virt_offset]), + "common_get_tx_fault"); +} + + +int +common_get_rxlos(struct ioexp_obj_s *self, + int virt_offset){ + /* [Receiver Loss of Signal (Rx_LOS)] + * The post-amplification IC also includes transition detection circuitry + * which monitors the ac level of incoming optical signals and provides a + * TTL/CMOS compatible status signal to the host (pin 8). An adequate optical + * input results in a low Rx_LOS output while a high Rx_LOS output indicates + * an unusable optical input. The Rx_LOS thresholds are factory set so that + * a high output indicates a definite optical fault has occurred. Rx_LOS can + * also be monitored via the two-wire serial interface + * (address A2h, byte 110, bit 1). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_rxlos[virt_offset]), + "common_get_rxlos"); +} + + +int +common_get_tx_disable(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + "common_get_tx_disable"); +} + + +int +common_get_reset(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + "common_get_reset"); +} + + +int +common_get_lpmod(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + "common_get_lpmod"); +} + + +int +common_get_modsel(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + "common_get_modsel"); +} + + +int +common_get_hard_rs0(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + "common_get_hard_rs0"); +} + + +int +common_get_hard_rs1(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + "common_get_hard_rs1"); +} + + +int +common_set_tx_disable(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + input_val, + "common_set_tx_disable"); +} + + +int +common_set_reset(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + input_val, + "common_set_reset"); +} + + +int +common_set_lpmod(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + input_val, + "common_set_lpmod"); +} + + +int +common_set_modsel(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + input_val, + "common_set_modsel"); +} + + +int +common_set_hard_rs0(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + input_val, + "common_set_hard_rs0"); +} + + +int +common_set_hard_rs1(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + input_val, + "common_set_hard_rs1"); +} + + +int +ioexp_get_not_support(struct ioexp_obj_s *self, + int virt_offset){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +ioexp_set_not_support(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +fake_ioexp_init(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_ioexp_update(struct ioexp_obj_s *self){ + return 1; +} + + +int +fake_update_func(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_get_func(struct ioexp_obj_s *self, + int virt_offset){ + SWPS_WARN("Someone called fake_get_func\n"); + return -1; +} + +int +fake_set_func(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + SWPS_WARN("Someone called fake_set_func\n"); + return -1; +} + + +/* ========== Initial functions for IO Expander ========== + */ +int +common_ioexp_init(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + if (self->mode == IOEXP_MODE_DIRECT) { + goto update_common_ioexp_init; + } + /* Setup default value to each physical IO Expander */ + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + /* Get address mapping */ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("%s: IOEXP config incorrect! :%d \n", + __func__, chip_id); + return -1; + } + /* Setup default value */ + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + /* [Desc] Skip the setup default value behavior + [Note] Setup default value = -1 if you don't want to write the value to IOEXP or CPLD + */ + if(addr_p->write_offset[offset] < 0){ + SWPS_DEBUG("skip a write_offset <%d>\n", addr_p->conf_offset[offset]); + continue; + } + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->write_offset[offset], + addr_p->data_default[offset]); + if (err_code < 0){ + SWPS_ERR("%s: set default fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + } + } +update_common_ioexp_init: + /* Check and update info to object */ + err_code = self->update_all(self, 1, "common_ioexp_init"); + if (err_code < 0) { + SWPS_ERR("%s: update_all() fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +/* ========== Object functions for Final State Machine ========== + */ +int +_is_channel_ready(struct ioexp_obj_s *self){ + + int buf = 0; + int chip_id = 0; /* Use first chip which be registered */ + int data_id = 0; /* Use first byte which be registered */ + struct ioexp_addr_s *ioexp_addr = NULL; + + ioexp_addr = &(self->ioexp_map_p->map_addr[chip_id]); + if (!ioexp_addr){ + SWPS_ERR("%s: config incorrect!\n", __func__); + return ERR_IOEXP_UNEXCPT; + } + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), + ioexp_addr->read_offset[data_id]); + if (buf >= 0){ + return 1; + } + return 0; +} + +int +_ioexp_init_handler(struct ioexp_obj_s *self){ + + int return_val; + + switch (self->mode) { + case IOEXP_MODE_DIRECT: + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + case IOEXP_MODE_POLLING: + /* Check system and channel is ready */ + if (self->state == STATE_IOEXP_INIT){ + if (!_is_channel_ready(self)){ + self->state = STATE_IOEXP_INIT; + SWPS_WARN("%s: IOEXP:%d channel not ready.\n", + __func__, self->ioexp_id); + return 0; + } + } + /* Execute initial callback */ + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + default: + break; + } + SWPS_ERR("%s: exception occur :%d\n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_direct(struct ioexp_obj_s *self){ + + int result_val; + int show_err = 1; + char *func_mane = "common_ioexp_fsm_4_direct"; + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, and return error */ + return ERR_IOEXP_UNINIT; + } + /* Case: Initial done */ + return 0; + + case STATE_IOEXP_NORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + SWPS_INFO("%s: NORMAL -> ABNORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + self->state = STATE_IOEXP_NORMAL; + return 0; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_DEBUG("%s: ABNORMAL -> NORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("%s: Exception occurs :%d\n", + __func__, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_polling(struct ioexp_obj_s *self){ + + int result_val, i, show_e; + int fail_retry = 3; + char *func_name = "common_ioexp_fsm_4_polling"; + +#ifdef DEBUG_SWPS + show_e = 1; +#else + show_e = 0; +#endif + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + /* Case: System (Channel) not ready */ + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, wait and retry */ + return 0; + } + /* Case: Initial done */ + SWPS_INFO("IOEXP-%d: initial done. :%d\n", + self->ioexp_id, self->ioexp_type); + return result_val; + + case STATE_IOEXP_NORMAL: + /* Retry mechanism for case of i2c topology not stable */ + for (i=0; iupdate_all(self, show_e, func_name); + if (result_val >= 0) { + self->state = STATE_IOEXP_NORMAL; + return 0; + } + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: detect I2C crash :%d\n", + __func__, self->ioexp_id); + break; + } + SWPS_DEBUG("IOEXP-%d: unstable :%d\n", + self->ioexp_id, result_val); + } + SWPS_INFO("IOEXP-%d: NORMAL -> ABNORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_e, func_name); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_INFO("IOEXP-%d: ABNORMAL -> NORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("IOEXP-%d: Exception occurs :%d\n", + self->ioexp_id, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +/* ========== Object private functions for check & update ========== + */ +int +common_ioexp_check(struct ioexp_obj_s *self){ + + int result; + + if (self->mode != IOEXP_MODE_POLLING){ + SWPS_ERR("%s: not polling mode :%d\n", + __func__, self->mode); + return ERR_IOEXP_NOTSUPPORT; + } + mutex_lock(&self->lock); + result = self->fsm_4_polling(self); + mutex_unlock(&self->lock); + return result; +} + + +/* ========== Functions for Factory pattern ========== + */ +static struct ioexp_map_s * +get_ioexp_map(int ioexp_type){ + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + return &ioexp_map_magnolia_nab; + case IOEXP_TYPE_MAGINOLIA_4AB: + return &ioexp_map_magnolia_4ab; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + return &ioexp_map_magnolia_7ab; + case IOEXP_TYPE_REDWOOD_P01P08: + return &ioexp_map_redwood_p01p08_p17p24; + case IOEXP_TYPE_REDWOOD_P09P16: + return &ioexp_map_redwood_p09p16_p25p32; + case IOEXP_TYPE_HUDSON32IGA_P01P08: + return &ioexp_map_hudson32iga_p01p08_p17p24; + case IOEXP_TYPE_HUDSON32IGA_P09P16: + return &ioexp_map_hudson32iga_p09p16_p25p32; + case IOEXP_TYPE_CYPRESS_NABC: + return &ioexp_map_cypress_nabc; + case IOEXP_TYPE_CYPRESS_7ABC: + return &ioexp_map_cypress_7abc; + case IOEXP_TYPE_TAHOE_5A: + return &ioexp_map_tahoe_5a; + case IOEXP_TYPE_TAHOE_6ABC: + return &ioexp_map_tahoe_6abc; + case IOEXP_TYPE_SEQUOIA_NABC: + return &ioexp_map_sequoia_nabc; + case IOEXP_TYPE_LAVENDER_P65: + return &ioexp_map_lavender_p65; + case CPLD_TYPE_COTTONWOOD: + return &cpld_map_cottonwood; + case IOEXP_TYPE_MAPLE_0ABC: + return &ioexp_map_maple_0abc; + case IOEXP_TYPE_MAPLE_NABC: + return &ioexp_map_maple_nabc; + default: + return NULL; + } +} + + +int +setup_ioexp_ssize_attr(struct ioexp_obj_s *self, + struct ioexp_map_s *ioexp_map_p, + int ioexp_id, + int ioexp_type, + int run_mode){ + switch (run_mode){ + case IOEXP_MODE_POLLING: /* Direct access device mode */ + case IOEXP_MODE_DIRECT: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = ERR_IOEXP_UNEXCPT; + return ERR_IOEXP_UNEXCPT; + } + /* Setup mapping structure */ + self->ioexp_map_p = kzalloc(sizeof(*ioexp_map_p), GFP_KERNEL); + if (!(self->ioexp_map_p)) { + SWPS_ERR("%s: kzalloc ioexp_map_p fail\n", __func__); + return -1; + } + memcpy(self->ioexp_map_p, ioexp_map_p, sizeof(*ioexp_map_p)); + /* Setup attributes */ + self->ioexp_id = ioexp_id; + self->ioexp_type = ioexp_type; + self->state = STATE_IOEXP_INIT; + mutex_init(&self->lock); + return 0; +} + + +static int +setup_addr_mapping(struct ioexp_obj_s *self, + struct ioexp_addr_s *addr_map_p, + int chip_amount){ + struct ioexp_addr_s *tmp_p; + if (!addr_map_p){ + SWPS_ERR("%s: map is null\n", __func__); + return -1; + } + tmp_p = kzalloc((sizeof(*addr_map_p) * chip_amount), GFP_KERNEL); + if (!tmp_p){ + SWPS_ERR("%s: kzalloc fail.\n", __func__); + return -1; + } + memcpy(tmp_p, addr_map_p, (sizeof(*addr_map_p) * chip_amount)); + self->ioexp_map_p->map_addr = tmp_p; + + return 0; +} + + +static int +setup_ioexp_public_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case CPLD_TYPE_COTTONWOOD: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + case IOEXP_TYPE_CYPRESS_NABC: + case IOEXP_TYPE_MAPLE_NABC: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = common_get_hard_rs0; + self->get_hard_rs1 = common_get_hard_rs1; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = common_set_hard_rs0; + self->set_hard_rs1 = common_set_hard_rs1; + return 0; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case IOEXP_TYPE_MAPLE_0ABC: + self->get_present = common_get_present; + self->get_tx_fault = ioexp_get_not_support; + self->get_rxlos = ioexp_get_not_support; + self->get_tx_disable = ioexp_get_not_support; + self->get_reset = common_get_reset; + self->get_lpmod = common_get_lpmod; + self->get_modsel = common_get_modsel; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = ioexp_set_not_support; + self->set_reset = common_set_reset; + self->set_lpmod = common_set_lpmod; + self->set_modsel = common_set_modsel; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_ioexp_private_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_NABC: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case CPLD_TYPE_COTTONWOOD: + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_MAPLE_0ABC: + self->init = common_ioexp_init; + self->check = common_ioexp_check; + self->update_all = common_ioexp_update_all; + self->fsm_4_direct = common_ioexp_fsm_4_direct; + self->fsm_4_polling = common_ioexp_fsm_4_polling; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_i2c_client_one(struct ioexp_obj_s *self, + int chip_id){ + + char *err_msg = "ERROR"; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + struct ioexp_i2c_s *i2c_obj_p = NULL; + struct ioexp_i2c_s *i2c_curr_p = NULL; + + int chan_id = self->ioexp_map_p->map_addr[chip_id].chan_id; + adap = i2c_get_adapter(chan_id); + if(!adap){ + err_msg = "Can not get adap!"; + goto err_ioexp_setup_i2c_1; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + err_msg = "Can not kzalloc client!"; + goto err_ioexp_setup_i2c_1; + } + i2c_obj_p = kzalloc(sizeof(*i2c_obj_p), GFP_KERNEL); + if (!i2c_obj_p){ + err_msg = "Can not kzalloc i2c_obj_p!"; + goto err_ioexp_setup_i2c_2; + } + client->adapter = adap; + client->addr = self->ioexp_map_p->map_addr[chip_id].chip_addr; + i2c_obj_p->i2c_client_p = client; + i2c_obj_p->chip_id = chip_id; + i2c_obj_p->next = NULL; + if (!self->i2c_head_p){ + self->i2c_head_p = i2c_obj_p; + } else { + i2c_curr_p = self->i2c_head_p; + while (i2c_curr_p->next){ + i2c_curr_p = i2c_curr_p->next; + } + i2c_curr_p->next = i2c_obj_p; + } + return 0; + +err_ioexp_setup_i2c_2: + kfree(client); +err_ioexp_setup_i2c_1: + SWPS_ERR("%s: %s :%d\n", __func__, err_msg, chan_id); + return -1; +} + + +static int +setup_i2c_client(struct ioexp_obj_s* self){ + + int result; + int chip_id = 0; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + result = setup_i2c_client_one(self, chip_id); + if (result < 0){ + SWPS_ERR("%s fail! :%d\n", __func__, chip_id); + return -1; + } + } + return 0; +} + + +static int +setup_ioexp_config(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("IOEXP config incorrect! :%d \n",chip_id); + return -1; + } + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + /* [Desc] Skip the setup config value behavior + [Note] Setup config value = -1 if you don't want to write the value to IOEXP or CPLD + */ + if(addr_p->conf_offset[offset] < 0){ + SWPS_DEBUG("skip a config_offset <%d>\n", addr_p->conf_offset[offset]); + continue; + } + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[offset], + addr_p->conf_default[offset]); + + if (err_code < 0){ + SWPS_INFO("%s: set conf fail! :%d \n", __func__, err_code); + return -2; + } + } + } + return 0; +} + + +struct ioexp_obj_s * +_create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_map_s* ioexp_map_p; + struct ioexp_obj_s* result_p; + struct ioexp_i2c_s *i2c_curr_p; + struct ioexp_i2c_s *i2c_next_p; + + /* Get layout */ + ioexp_map_p = get_ioexp_map(ioexp_type); + if (!ioexp_map_p){ + SWPS_ERR("%s: Invalid ioexp_type\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare IOEXP object */ + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + SWPS_ERR("%s: kzalloc failure!\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare static size attributes */ + if (setup_ioexp_ssize_attr(result_p, + ioexp_map_p, + ioexp_id, + ioexp_type, + run_mode) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + /* Prepare address mapping */ + if (setup_addr_mapping(result_p, addr_map_p, ioexp_map_p->chip_amount) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + if (setup_i2c_client(result_p) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + /* Prepare call back functions of object */ + if (setup_ioexp_public_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + if (setup_ioexp_private_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + return result_p; + +err_create_ioexp_setup_i2c_fail: + i2c_curr_p = result_p->i2c_head_p; + i2c_next_p = result_p->i2c_head_p; + while (i2c_curr_p){ + i2c_next_p = i2c_curr_p->next; + kfree(i2c_curr_p->i2c_client_p); + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } +err_create_ioexp_setup_attr_fail: + kfree(result_p); +err_create_ioexp_fail: + SWPS_ERR("%s: fail! :%d :%d \n", + __func__, ioexp_id, ioexp_type); + return NULL; +} + + +int +create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_obj_s *ioexp_p = NULL; + + ioexp_p = _create_ioexp_obj(ioexp_id, ioexp_type, + addr_map_p, run_mode); + if (!ioexp_p){ + return -1; + } + if (ioexp_head_p == NULL){ + ioexp_head_p = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; + } + ioexp_tail_p->next = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; +} + + +static int +_init_ioexp_obj(struct ioexp_obj_s* self) { + + char *err_msg = "ERR"; + char *func_name = "_init_ioexp_obj"; + + /* Setup IOEXP configure byte */ + if (setup_ioexp_config(self) < 0){ + err_msg = "setup_ioexp_config fail"; + goto err_init_ioexp_obj; + } + /* Setup default data */ + if (_ioexp_init_handler(self) < 0){ + err_msg = "_ioexp_init_handler fail"; + goto err_init_ioexp_obj; + } + /* Update all */ + if (self->state == STATE_IOEXP_NORMAL){ + if (self->update_all(self, 1, func_name) < 0){ + err_msg = "update_all() fail"; + goto err_init_ioexp_obj; + } + } + return 0; + +err_init_ioexp_obj: + SWPS_DEBUG("%s: %s\n", __func__, err_msg); + return -1; +} + + +int +init_ioexp_objs(void){ + /* Return value: + * 0: Success + * -1: Detect topology error + * -2: SWPS internal error + */ + + struct ioexp_obj_s *curr_p = ioexp_head_p; + + if (!curr_p) { + SWPS_ERR("%s: ioexp_head_p is NULL\n", __func__); + return -2; + } + while (curr_p) { + if (_init_ioexp_obj(curr_p) < 0) { + SWPS_DEBUG("%s: _init_ioexp_obj() fail\n", __func__); + return -1; + } + curr_p = curr_p->next; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + + +void +clean_ioexp_objs(void){ + + struct ioexp_i2c_s *i2c_curr_p = NULL; + struct ioexp_i2c_s *i2c_next_p = NULL; + struct ioexp_obj_s *ioexp_next_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + if (ioexp_head_p == NULL){ + ioexp_tail_p = NULL; + return; + } + while(ioexp_curr_p){ + ioexp_next_p = ioexp_curr_p->next; + if (ioexp_curr_p->ioexp_map_p) { + if (ioexp_curr_p->ioexp_map_p->map_addr) { + kfree(ioexp_curr_p->ioexp_map_p->map_addr); + } + kfree(ioexp_curr_p->ioexp_map_p); + } + + i2c_curr_p = ioexp_curr_p->i2c_head_p; + while (i2c_curr_p) { + i2c_next_p = i2c_curr_p->next; + kfree(i2c_curr_p->i2c_client_p); + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } + kfree(ioexp_curr_p); + ioexp_curr_p = ioexp_next_p; + } + ioexp_tail_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} + + +int +check_ioexp_objs(void){ + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while (ioexp_curr_p){ + if ( (ioexp_curr_p->check(ioexp_curr_p)) < 0){ + SWPS_INFO("check IOEXP-%d fail! :%d\n", + ioexp_curr_p->ioexp_id, ioexp_curr_p->ioexp_type); + return -1; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} + + +struct ioexp_obj_s * +get_ioexp_obj(int ioexp_id){ + + struct ioexp_obj_s *result_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + if (ioexp_curr_p->ioexp_id == ioexp_id){ + result_p = ioexp_curr_p; + break; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return result_p; +} + + +void +unlock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_unlock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } +} + + +int +lock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_lock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} + + +int +check_channel_tier_1(void) { + + if ( (!_is_channel_ready(ioexp_head_p)) && + (!_is_channel_ready(ioexp_tail_p)) ){ + return -1; + } + return 0; +} + + +static int +_scan_channel_tier_1(int force, + int show_err) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + int ready = 0; + + if (!ioexp_curr_p) { + goto err_scan_tier_1_channel; + } + while(ioexp_curr_p) { + ready = _is_channel_ready(ioexp_curr_p); + if ((!ready) && (!force)) { + goto err_scan_tier_1_channel; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; + +err_scan_tier_1_channel: + if (show_err) { + if (ioexp_curr_p) { + SWPS_INFO("%s: IOEXP-%d fail\n", __func__, ioexp_curr_p->ioexp_id); + } else { + SWPS_INFO("%s: IOEXP is null.\n", __func__); + } + } + return -1; +} + + +static int +_scan_channel_tier_1_single(void) { + + int ret = 0; + int chan_id = 0; + int fake_cid = 0; + int fake_offs = 0; + int fake_addr = 0; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + + if (ioexp_head_p->ioexp_id != ioexp_tail_p->ioexp_id) { + return 0; + } + /* Setup i2c_client */ + chan_id = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chan_id; + fake_addr = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chip_addr; + adap = i2c_get_adapter((chan_id + 1)); + if(!adap){ + SWPS_INFO("%s: Can not get adap!\n", __func__); + return 0; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + SWPS_INFO("%s: Can not kzalloc client!\n", __func__); + return 0; + } + client->adapter = adap; + client->addr = fake_addr; + /* Fouce move ioexp ptr to next */ + ret = i2c_smbus_read_byte_data(client, fake_offs); + SWPS_DEBUG("%s: move ioexp_ptr done. :%d\n", __func__, ret); + kfree(client); + return 1; +} + + +int +resync_channel_tier_1(void) { + + char *emsg = "ERR"; + + if (!ioexp_head_p) { + emsg = "ioexp_head_p is NULL"; + goto err_resync_ioexp_status_1; + } + /* Run all */ + if (ioexp_head_p->ioexp_id == ioexp_tail_p->ioexp_id) { + _scan_channel_tier_1_single(); + } else { + _scan_channel_tier_1(1, 0); + } + /* Check all */ + if (_scan_channel_tier_1(0, 1) < 0) { + emsg = "resync tier-1 channel fail"; + goto err_resync_ioexp_status_1; + } + return 0; + +err_resync_ioexp_status_1: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/io_expander.h b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/io_expander.h new file mode 100644 index 00000000000..1af909e2466 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/io_expander.h @@ -0,0 +1,187 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef IO_EXPANDER_H +#define IO_EXPANDER_H + +#include + + +/* IOEXP type define (SFP series) */ +#define IOEXP_TYPE_MAGINOLIA_NAB (10101) +#define IOEXP_TYPE_MAGINOLIA_4AB (10102) +#define IOEXP_TYPE_CYPRESS_NABC (10103) +#define IOEXP_TYPE_MAPLE_NABC (10104) + +/* IOEXP type define (QSFP series) */ +#define IOEXP_TYPE_MAGINOLIA_7AB (10201) +#define IOEXP_TYPE_REDWOOD_P01P08 (10202) +#define IOEXP_TYPE_REDWOOD_P09P16 (10203) +#define IOEXP_TYPE_HUDSON32IGA_P01P08 (10204) +#define IOEXP_TYPE_HUDSON32IGA_P09P16 (10205) +#define IOEXP_TYPE_SPRUCE_7AB (10206) +#define IOEXP_TYPE_CYPRESS_7ABC (10207) +#define IOEXP_TYPE_TAHOE_5A (10208) +#define IOEXP_TYPE_TAHOE_6ABC (10209) +#define IOEXP_TYPE_SEQUOIA_NABC (10210) +#define IOEXP_TYPE_LAVENDER_P65 (10211) +#define IOEXP_TYPE_MAPLE_0ABC (10212) + +/* CPLD type define */ +#define CPLD_TYPE_COTTONWOOD (10301) + +/* IOEXP mode define */ +#define IOEXP_MODE_POLLING (19000) +#define IOEXP_MODE_DIRECT (19001) + +/* IOEXP state define */ +#define STATE_IOEXP_NORMAL (0) +#define STATE_IOEXP_INIT (-1) +#define STATE_IOEXP_ABNORMAL (-2) + +/* IOEXP error code define */ +#define ERR_IOEXP_NOTSUPPORT (-100) +#define ERR_IOEXP_UNINIT (-101) +#define ERR_IOEXP_BADCONF (-102) +#define ERR_IOEXP_ABNORMAL (-103) +#define ERR_IOEXP_NOSTATE (-104) +#define ERR_IOEXP_BADINPUT (-105) +#define ERR_IOEXP_UNEXCPT (-199) + +#define SWPS_INFO(fmt, args...) printk( KERN_INFO "[SWPS] " fmt, ##args) +#define SWPS_WARN(fmt, args...) printk( KERN_WARNING "[SWPS] " fmt, ##args) +#define SWPS_ERR(fmt, args...) printk( KERN_ERR "[SWPS] " fmt, ##args) + +#ifdef DEBUG_SWPS +# define SWPS_DEBUG(fmt, args...) printk( KERN_DEBUG "[SWPS] " fmt, ##args) +#else +# define SWPS_DEBUG(fmt, args...) +#endif + + +struct ioexp_addr_s { + int chan_id; + int chip_addr; + int read_offset[8]; + int write_offset[8]; + int conf_offset[8]; + uint8_t data_default[8]; + uint8_t conf_default[8]; +}; + +struct ioexp_i2c_s { + int chip_id; + struct i2c_client *i2c_client_p; + struct ioexp_i2c_s *next; +}; + + +struct ioexp_bitmap_s { + int chip_id; /* IOEXP chip id */ + int ioexp_voffset; /* IOEXP virtual offset */ + int bit_shift; +}; + +struct ioexp_map_s { + int chip_amount; /* Number of chips that IOEXP object content */ + int data_width; /* Number of (Read/Write/Config) bytes */ + struct ioexp_addr_s *map_addr; /* Chip address info */ + struct ioexp_bitmap_s map_present[10]; /* IOEXP for SFP / QSFP */ + struct ioexp_bitmap_s map_tx_disable[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_tx_fault[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_rxlos[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_reset[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_lpmod[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_modsel[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs0[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs1[10]; /* IOEXP for QSFP */ +}; + +struct ioexp_data_s { + uint8_t data[8]; +}; + +struct ioexp_obj_s { + + /* ============================ + * Object public property + * ============================ + */ + int ioexp_id; + int ioexp_type; + + /* ============================ + * Object private property + * ============================ + */ + struct ioexp_data_s chip_data[16]; /* Max: 8-ioexp in one virt-ioexp(ioexp_obj) */ + struct ioexp_map_s *ioexp_map_p; + struct ioexp_obj_s *next; + struct ioexp_i2c_s *i2c_head_p; + struct mutex lock; + int mode; + int state; + + /* =========================================== + * Object public functions + * =========================================== + */ + int (*get_present)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_fault)(struct ioexp_obj_s *self, int virt_offset); + int (*get_rxlos)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_disable)(struct ioexp_obj_s *self, int virt_offset); + int (*get_reset)(struct ioexp_obj_s *self, int virt_offset); + int (*get_lpmod)(struct ioexp_obj_s *self, int virt_offset); + int (*get_modsel)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs0)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs1)(struct ioexp_obj_s *self, int virt_offset); + int (*set_tx_disable)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_reset)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_lpmod)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_modsel)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs0)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs1)(struct ioexp_obj_s *self, int virt_offset, int input_val); + + /* =========================================== + * Object private functions + * =========================================== + */ + int (*init)(struct ioexp_obj_s *self); + int (*check)(struct ioexp_obj_s *self); + int (*update_all)(struct ioexp_obj_s *self, int show_err, char *caller_name); + int (*fsm_4_direct)(struct ioexp_obj_s* self); + int (*fsm_4_polling)(struct ioexp_obj_s* self); +}; + + +struct ioexp_obj_s* get_ioexp_obj(int ioexp_id); +int create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode); +int init_ioexp_objs(void); +int check_ioexp_objs(void); +void clean_ioexp_objs(void); + +void unlock_ioexp_all(void); +int lock_ioexp_all(void); + +int check_channel_tier_1(void); +int resync_channel_tier_1(void); + +/* Macro for bit control */ +#define SWP_BIT_SET(byte_val,bit_shift) ((byte_val) |= (1<<(bit_shift))) +#define SWP_BIT_CLEAR(byte_val,bit_shift) ((byte_val) &= ~(1<<(bit_shift))) + + +#endif /* IO_EXPANDER_H */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/transceiver.c b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/transceiver.c new file mode 100644 index 00000000000..6fe8f599fb4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/transceiver.c @@ -0,0 +1,8389 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include "io_expander.h" +#include "transceiver.h" + + +/* ========== Register EEPROM address mapping ========== + */ +struct eeprom_map_s eeprom_map_sfp = { + .addr_br =0x50, .page_br =-1, .offset_br =12, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =94, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =-1, .offset_connector =2, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =-1, .offset_diag_type =92 , .length_diag_type =1, + .addr_extbr =-1, .page_extbr =-1, .offset_extbr =-1, .length_extbr =-1, + .addr_ext_id =0x50, .page_ext_id =-1, .offset_ext_id =1, .length_ext_id =1, + .addr_id =0x50, .page_id =-1, .offset_id =0, .length_id =1, + .addr_len_sm =0x50, .page_len_sm =-1, .offset_len_sm =15, .length_len_sm =1, + .addr_len_smf =0x50, .page_len_smf =-1, .offset_len_smf =14, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =-1, .offset_len_om1 =17, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =-1, .offset_len_om2 =16, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =-1, .offset_len_om3 =19, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =-1, .offset_len_om4 =18, .length_len_om4 =1, + .addr_option =0x50, .page_option =-1, .offset_option =64, .length_option =2, + .addr_rate_id =0x50, .page_rate_id =-1, .offset_rate_id =13, .length_rate_id =1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =0x51, .page_rx_em =-1, .offset_rx_em =115, .length_rx_em =1, + .addr_rx_los =-1, .page_rx_los =-1, .offset_rx_los =-1, .length_rx_los =-1, + .addr_rx_power =0x51, .page_rx_power =-1, .offset_rx_power =104, .length_rx_power =2, + .addr_soft_rs0 =0x51, .page_soft_rs0 =-1, .offset_soft_rs0 =110, .length_soft_rs0 =1, + .addr_soft_rs1 =0x51, .page_soft_rs1 =-1, .offset_soft_rs1 =118, .length_soft_rs0 =1, + .addr_temp =0x51, .page_temp =-1, .offset_temp =96, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =-1, .offset_trancomp =3, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =-1, .offset_trancomp_ext =36, .length_trancomp_ext =1, + .addr_tx_bias =0x51, .page_tx_bias =-1, .offset_tx_bias =100, .length_tx_bias =2, + .addr_tx_disable =-1, .page_tx_disable =-1, .offset_tx_disable =-1, .length_tx_disable =-1, + .addr_tx_eq =0x51, .page_tx_eq =-1, .offset_tx_eq =114, .length_tx_eq =1, + .addr_tx_fault =-1, .page_tx_fault =-1, .offset_tx_fault =-1, .length_tx_fault =-1, + .addr_tx_power =0x51, .page_tx_power =-1, .offset_tx_power =102, .length_tx_power =2, + .addr_vendor_name =0x50, .page_vendor_name =-1, .offset_vendor_name =20, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =-1, .offset_vendor_pn =40, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =-1, .offset_vendor_rev =56, .length_vendor_rev =4, + .addr_vendor_sn =0x50, .page_vendor_sn =-1, .offset_vendor_sn =68, .length_vendor_sn =16, + .addr_voltage =0x51, .page_voltage =-1, .offset_voltage =98, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =-1, .offset_wavelength =60, .length_wavelength =2, +}; + +struct eeprom_map_s eeprom_map_qsfp = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =-1, .page_rx_em =-1, .offset_rx_em =-1, .length_rx_em =-1, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =-1, .page_tx_eq =-1, .offset_tx_eq =-1, .length_tx_eq =-1, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, +}; + +struct eeprom_map_s eeprom_map_qsfp28 = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =0x50, .page_cdr =-1, .offset_cdr =98, .length_cdr =1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =0x50, .page_rx_am =3, .offset_rx_am =238, .length_rx_am =2, + .addr_rx_em =0x50, .page_rx_em =3, .offset_rx_em =236, .length_rx_em =2, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =0x50, .page_tx_eq =3, .offset_tx_eq =234, .length_tx_eq =2, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, +}; + + +/* ========== Utility Functions ========== + */ +static int +get_bit(uint8_t origin_byte, int bit_shift) { + return (int)((origin_byte >> bit_shift) & 0x1); +} + +static int +transform_word_to_int(uint8_t hight_byte, + uint8_t low_byte) { + return ((((int)hight_byte) << 8) + (int)low_byte); +} + +void +alarm_msg_2_user(struct transvr_obj_s *self, + char *emsg) { + + SWPS_ERR("%s on %s.\n", emsg, self->swp_name); +} + + +/* ========== Private functions ========== + */ +static int +_reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self); + +static int +_transvr_init_handler(struct transvr_obj_s *self); + +int +_transvr_clean_handler(struct transvr_obj_s *self); + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self); + + +void +lock_transvr_obj(struct transvr_obj_s *self) { + + mutex_lock(&self->lock); + self->curr_page = VAL_TRANSVR_PAGE_FREE; +} + + +void +unlock_transvr_obj(struct transvr_obj_s *self) { + + self->curr_page = VAL_TRANSVR_PAGE_FREE; + mutex_unlock(&self->lock); +} + + +static int +_check_by_mode(struct transvr_obj_s *self, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + char *caller_name){ + + int return_val = ERR_TRANSVR_UNEXCPT; + + switch (self->mode){ + case TRANSVR_MODE_POLLING: + switch (self->state){ + case STATE_TRANSVR_CONNECTED: + goto ok_check_by_mode_1; + case STATE_TRANSVR_NEW: + case STATE_TRANSVR_INIT: + return ERR_TRANSVR_UNINIT; + case STATE_TRANSVR_DISCONNECTED: + return ERR_TRANSVR_UNPLUGGED; + case STATE_TRANSVR_UNEXCEPTED: + return ERR_TRANSVR_ABNORMAL; + case STATE_TRANSVR_ISOLATED: + return ERR_TRNASVR_BE_ISOLATED; + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + + case TRANSVR_MODE_DIRECT: + return_val = self->fsm_4_direct(self, caller_name); + if (return_val < 0){ + return return_val; + } + goto ok_check_by_mode_1; + + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + +ok_check_by_mode_1: + return attr_update_func(self, 0); + +err_check_by_mode_1: + SWPS_INFO("_check_by_mode: mode:%d state:%d\n", self->mode, self->state); + return ERR_TRANSVR_UNEXCPT; +} + + +static void +_transvr_clean_retry(struct transvr_obj_s *self) { + self->retry = 0; +} + + +static int +_transvr_handle_retry(struct transvr_obj_s *self, int retry) { + /* Return: 0: keep retry + * -1: stop retry + */ + if (self->retry == 0) { + self->retry = retry; + } + self->retry -= 1; + if (self->retry <= 0) { + _transvr_clean_retry(self); + return -1; + } + return 0; +} + + +static int +_common_setup_page(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int show_e) { + /* return: + * 0 : OK + * -1 : EEPROM settings incorrect + * -2 : I2C R/W failure + * -3 : Undefined case + */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Check */ + if ((addr < 0) || (offset < 0) || (len < 0)) { + emsg = "EEPROM settings incorrect"; + retval = -1; + goto err_common_setup_page; + } + /* Case1: continue access */ + if ((self->i2c_client_p->addr == addr) && + (self->curr_page == page)) { + return 0; + } + self->i2c_client_p->addr = addr; + /* Case2: select lower page */ + if (page == -1) { + self->curr_page = page; + return 0; + } + /* Case3: select upper page */ + if (page >= 0) { + goto upper_common_setup_page; + } + /* Unexpected case */ + show_e = 1; + emsg = "Unexpected case"; + retval = -3; + goto err_common_setup_page; + +upper_common_setup_page: + if (i2c_smbus_write_byte_data(self->i2c_client_p, + VAL_TRANSVR_PAGE_SELECT_OFFSET, + page) < 0) { + emsg = "I2C R/W failure"; + retval = -2; + goto err_common_setup_page; + } + self->curr_page = page; + mdelay(VAL_TRANSVR_PAGE_SELECT_DELAY); + return 0; + +err_common_setup_page: + if (show_e) { + SWPS_INFO("%s: %s", __func__, emsg); + SWPS_INFO("%s: :0x%02x :%d :%d :%d\n", + __func__, addr, page, offset, len); + } + return retval; +} + +/* +static int +_common_setup_password(struct transvr_obj_s *self, + int addr, + int page, + int offs, + uint8_t pwd[4], + int show_e) { + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, 4, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_setup_password; + } + for (i=0; i<4; i++) { + err = i2c_smbus_write_byte_data(self->i2c_client_p, + (offs + i), + pwd[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_setup_password; + } + } + return 0; + +err_common_setup_password: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} +*/ + +static int +_common_update_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + uint8_t *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_uint8_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_uint8_attr; + } + buf[i] = err; + } + return 0; + +err_common_update_uint8_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_int_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_int_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_int_attr; + } + buf[i] = (int)err; + } + return 0; + +err_common_update_int_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_INT_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_string_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + char buf[], + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_string_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_string_attr; + } + buf[i] = (char)err; + } + return 0; + +err_common_update_string_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = 'e'; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + uint8_t update, + uint8_t *buf, + char *caller, + int show_e){ + int len = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + if ((*buf) == update){ + return 0; + } + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + err = i2c_smbus_write_byte_data(self->i2c_client_p, + offset, + update); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + (*buf) = update; + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_array(struct transvr_obj_s *self, + int addr, + int page, + int offs, + int len, + uint8_t update[], + uint8_t buf[], + char *caller, + int show_e){ + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + for (i=0; ii2c_client_p, + (offs + i), + update[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + buf[i] = update[i]; + } + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, emsg, caller, err, i); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_attr_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_id, + self->eeprom_map_p->page_id, + self->eeprom_map_p->offset_id, + self->eeprom_map_p->length_id, + &(self->id), + "_common_update_attr_id", + show_err); +} + + +static int +_common_update_attr_extended_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_ext_id, + self->eeprom_map_p->page_ext_id, + self->eeprom_map_p->offset_ext_id, + self->eeprom_map_p->length_ext_id, + &(self->ext_id), + "_common_update_attr_extended_id", + show_err); +} + + +static int +_common_update_attr_connector(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_connector, + self->eeprom_map_p->page_connector, + self->eeprom_map_p->offset_connector, + self->eeprom_map_p->length_connector, + &(self->connector), + "_common_update_attr_connector", + show_err); +} + + +static int +_common_update_attr_transvr_comp(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp, + self->eeprom_map_p->page_trancomp, + self->eeprom_map_p->offset_trancomp, + self->eeprom_map_p->length_trancomp, + self->transvr_comp, + "_common_update_attr_transvr_comp", + show_err); +} + + +static int +_common_update_attr_transvr_comp_ext(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp_ext, + self->eeprom_map_p->page_trancomp_ext, + self->eeprom_map_p->offset_trancomp_ext, + self->eeprom_map_p->length_trancomp_ext, + &(self->transvr_comp_ext), + "_common_update_attr_transvr_comp_ext", + show_err); +} + + +static int +_common_update_attr_vendor_name(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_name, + self->eeprom_map_p->page_vendor_name, + self->eeprom_map_p->offset_vendor_name, + self->eeprom_map_p->length_vendor_name, + self->vendor_name, + "_common_update_attr_vendor_name", + show_err); +} + + +static int +_common_update_attr_vendor_pn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_pn, + self->eeprom_map_p->page_vendor_pn, + self->eeprom_map_p->offset_vendor_pn, + self->eeprom_map_p->length_vendor_pn, + self->vendor_pn, + "_common_update_attr_vendor_pn", + show_err); +} + + +static int +_common_update_attr_vendor_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_rev, + self->eeprom_map_p->page_vendor_rev, + self->eeprom_map_p->offset_vendor_rev, + self->eeprom_map_p->length_vendor_rev, + self->vendor_rev, + "_common_update_attr_vendor_rev", + show_err); +} + + +static int +_common_update_attr_vendor_sn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_sn, + self->eeprom_map_p->page_vendor_sn, + self->eeprom_map_p->offset_vendor_sn, + self->eeprom_map_p->length_vendor_sn, + self->vendor_sn, + "_common_update_attr_vendor_sn", + show_err); +} + + +static int +_common_update_attr_br(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_br, + self->eeprom_map_p->page_br, + self->eeprom_map_p->offset_br, + self->eeprom_map_p->length_br, + &(self->br), + "_common_update_attr_br", + show_err); +} + + +static int +_common_update_attr_len_smf(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_smf, + self->eeprom_map_p->page_len_smf, + self->eeprom_map_p->offset_len_smf, + self->eeprom_map_p->length_len_smf, + &(self->len_smf), + "_common_update_attr_len_smf", + show_err); +} + + +static int +_common_update_attr_len_om1(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om1, + self->eeprom_map_p->page_len_om1, + self->eeprom_map_p->offset_len_om1, + self->eeprom_map_p->length_len_om1, + &(self->len_om1), + "_common_update_attr_len_om1", + show_err); +} + +static int +_common_update_attr_len_om2(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om2, + self->eeprom_map_p->page_len_om2, + self->eeprom_map_p->offset_len_om2, + self->eeprom_map_p->length_len_om2, + &(self->len_om2), + "_common_update_attr_len_om2", + show_err); +} + +static int +_common_update_attr_len_om3(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om3, + self->eeprom_map_p->page_len_om3, + self->eeprom_map_p->offset_len_om3, + self->eeprom_map_p->length_len_om3, + &(self->len_om3), + "_common_update_attr_len_om3", + show_err); +} + + +static int +_common_update_attr_len_om4(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om4, + self->eeprom_map_p->page_len_om4, + self->eeprom_map_p->offset_len_om4, + self->eeprom_map_p->length_len_om4, + &(self->len_om4), + "_common_update_attr_len_om4", + show_err); +} + + +static int +_common_update_attr_option(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_option, + self->eeprom_map_p->page_option, + self->eeprom_map_p->offset_option, + self->eeprom_map_p->length_option, + self->option, + "_common_update_attr_option", + show_err); +} + + +static int +_common_update_attr_comp_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_comp_rev, + self->eeprom_map_p->page_comp_rev, + self->eeprom_map_p->offset_comp_rev, + self->eeprom_map_p->length_comp_rev, + &(self->comp_rev), + "_common_update_attr_comp_rev", + show_err); +} + + +static int +_common_update_attr_diag_type(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_diag_type, + self->eeprom_map_p->page_diag_type, + self->eeprom_map_p->offset_diag_type, + self->eeprom_map_p->length_diag_type, + &(self->diag_type), + "_common_update_attr_diag_type", + show_err); +} + + +static int +_common_update_attr_wavelength(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_wavelength, + self->eeprom_map_p->page_wavelength, + self->eeprom_map_p->offset_wavelength, + self->eeprom_map_p->length_wavelength, + self->wavelength, + "_common_update_attr_wavelength", + show_err); +} + + +int +_common_get_option_value(struct transvr_obj_s *self, + int offset, + int bit_shift) { + /* SFP: + * - option[0] = A0h / 64 + * - option[1] = A0h / 65 + * QSFP: + * - option[0] = 00h / 193 + * - option[1] = 00h / 194 + * - option[2] = 00h / 195 + */ + return (self->option[offset] & (1 << bit_shift)); +} + + +static int +_sfp_update_attr_len_sm(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_sm, + self->eeprom_map_p->page_len_sm, + self->eeprom_map_p->offset_len_sm, + self->eeprom_map_p->length_len_sm, + &(self->len_sm), + "_common_update_attr_len_sm", + show_err); +} + + +static int +_sfp_update_attr_rate_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_rate_id, + self->eeprom_map_p->page_rate_id, + self->eeprom_map_p->offset_rate_id, + self->eeprom_map_p->length_rate_id, + &(self->rate_id), + "_sfp_update_attr_rate_id", + show_err); +} + + +static int +_sfp_update_attr_soft_rs0(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + self->eeprom_map_p->length_soft_rs0, + &(self->soft_rs0), + "_sfp_update_attr_soft_rs0", + show_err); +} + + +static int +_sfp_update_attr_soft_rs1(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + self->eeprom_map_p->length_soft_rs1, + &(self->soft_rs1), + "_sfp_update_attr_soft_rs1", + show_err); +} + + +int +_sfp_is_diag_support(struct transvr_obj_s *self){ + + uint8_t bit_mask = 0xC0; /* 1100 0000 */ + uint8_t en_val = 0x40; /* 0100 0000 */ + uint8_t checkval = (self->diag_type & bit_mask); + + if (checkval == en_val) { + return 1; + } + return 0; +} + + +static int +_sfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_sfp_update_attr_curr_temp", + show_err); +} + + +static int +_sfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_sfp_update_attr_curr_voltage", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_sfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_sfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_sfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_sfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_sfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_sfp_update_attr_rx_em", + show_err); +} + + +static int +_sfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_sfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_cdr(struct transvr_obj_s *self, + int show_err){ + if (self->type != TRANSVR_TYPE_QSFP_28){ + self->cdr = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + self->eeprom_map_p->length_cdr, + &(self->cdr), + "_common_update_attr_cdr", + show_err); +} + + +static int +_qsfg_update_attr_extbr(struct transvr_obj_s *self, + int show_err) { + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_extbr, + self->eeprom_map_p->page_extbr, + self->eeprom_map_p->offset_extbr, + self->eeprom_map_p->length_extbr, + &(self->extbr), + "_common_update_attr_extbr", + show_err); +} + + +static int +_qsfp_is_diag_support(struct transvr_obj_s *self, + int diag_type) { + /* Input Parm: diag_type + * => 1 : temperature + * => 2 : voltage + * => 3 : tx relate + * => 4 : rx relate + */ + uint8_t mask_b2 = 0x04; /* 0000 0100 */ + uint8_t mask_b3 = 0x08; /* 0000 1000 */ + + switch (diag_type) { + case 1: /* temperature */ + case 2: /* voltage */ + /* Direct access target, because of spec not defined */ + return 1; + case 3: + case 4: + /* [Note] + * Due to lot of transceiver vendor defined it not rigorously and + * consider of general support, we seem it as supported if there + * are bit-2 OR bit-3 defined by transceiver vendor. + */ + if ( ((self->diag_type & mask_b2) == mask_b2 ) || + ((self->diag_type & mask_b3) == mask_b3 ) ){ + return 1; + } + return 0; + default: + SWPS_INFO("%s: undefined diag_type:%d\n", + __func__, diag_type); + break; + } + return 0; +} + + +int +_qsfp_is_implement_tx_disable(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-4 + */ + int byte = 2; + int bit = 4; + return _common_get_option_value(self, byte, bit); +} + + +int +_qsfp_is_implement_tx_fault(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-3 + */ + int byte = 2; + int bit = 3; + return _common_get_option_value(self, byte, bit); +} + + +static int +_qsfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + int diag_type = 1; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_qsfp_update_attr_curr_temp", + show_err); +} + + +static int +_qsfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + int diag_type = 2; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_qsfp_update_attr_curr_voltage", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_qsfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_qsfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_qsfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 4; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_qsfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_qsfp_update_attr_soft_rx_los(struct transvr_obj_s *self, + int show_err){ + + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_los, + self->eeprom_map_p->page_rx_los, + self->eeprom_map_p->offset_rx_los, + self->eeprom_map_p->length_rx_los, + &(self->rx_los), + "_qsfp_update_attr_soft_rx_los", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_disable(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_disable(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_update_attr_soft_tx_disable", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_fault(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_fault(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_fault, + self->eeprom_map_p->page_tx_fault, + self->eeprom_map_p->offset_tx_fault, + self->eeprom_map_p->length_tx_fault, + &(self->tx_fault), + "_qsfp_update_attr_soft_tx_fault", + show_err); +} + + +static int +_qsfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_qsfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_rx_am(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + self->rx_am, + "_qsfp_update_attr_rx_am", + show_err); +} + + +static int +_qsfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_qsfp_update_attr_rx_em", + show_err); +} + + +int +_common_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = "err"; + + if (_common_update_attr_id(self, show_err) < 0) { + err_str = "_common_update_attr_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_extended_id(self, show_err) < 0) { + err_str = "_common_update_attr_extended_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_connector(self, show_err) < 0) { + err_str = "_common_update_attr_connector"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp_ext(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp_ext"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_name(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_name"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_pn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_pn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_rev(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_sn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_sn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_br(self, show_err) < 0) { + err_str = "_common_update_attr_br"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_smf(self, show_err) < 0) { + err_str = "_common_update_attr_len_smf"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om1(self, show_err) < 0) { + err_str = "_common_update_attr_len_om1"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om2(self, show_err) < 0) { + err_str = "_common_update_attr_len_om2"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om3(self, show_err) < 0) { + err_str = "_common_update_attr_len_om3"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om4(self, show_err) < 0) { + err_str = "_common_update_attr_len_om4"; + goto err_common_update_attr_all; + } + if (_common_update_attr_option(self, show_err) < 0) { + err_str = "_common_update_attr_option"; + goto err_common_update_attr_all; + } + if (_common_update_attr_comp_rev(self, show_err) < 0) { + err_str = "_common_update_attr_comp_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_diag_type(self, show_err) < 0) { + err_str = "_common_update_attr_diag_type"; + goto err_common_update_attr_all; + } + if (_common_update_attr_wavelength(self, show_err) < 0) { + err_str = "_common_update_attr_wavelength"; + goto err_common_update_attr_all; + } + return 0; + +err_common_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_sfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_len_sm(self, show_err) < 0) { + err_str = "_sfp_update_attr_len_sm"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_rate_id(self, show_err) < 0) { + err_str = "_sfp_update_attr_rate_id"; + goto err_sfp_update_attr_all; + } + if ((self->rate_id) > 0) { + if (_sfp_update_attr_soft_rs0(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs0"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_soft_rs1(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs1"; + goto err_sfp_update_attr_all; + } + } + return 0; + +err_sfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_qsfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_qsfp_update_attr_all; + } + if (_qsfg_update_attr_extbr(self, show_err) < 0) { + err_str = "_qsfg_update_attr_extbr"; + goto err_qsfp_update_attr_all; + } + if (self->type == TRANSVR_TYPE_QSFP_28) { + if (_qsfp_update_attr_cdr(self, 1) < 0) { + err_str = "_qsfp_update_attr_cdr"; + goto err_qsfp_update_attr_all; + } + } + return 0; + +err_qsfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +/* ========== Object functions for common type ========== + */ +int +_common_count_temp(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + int sign = 0; + int high = 0; + int low = 0; + int lmax = 8; + + /* Count high */ + sign = get_bit(high_byte,7); + SWP_BIT_CLEAR(high_byte, 7); + high = (int)high_byte; + if (sign == 1) { + high = 0 - high; + } + /* Count low */ + low = (get_bit(low_byte, 7) * 500); + low += (get_bit(low_byte, 6) * 250); + low += (get_bit(low_byte, 5) * 125); + low += (get_bit(low_byte, 4) * 62); + low = (low / 100); + /* Integrate High and Low */ + return snprintf(buf_p, lmax, "%d.%d\n", high, low); +} + + +int +_common_count_voltage(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note]: + * Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts. Practical + * considerations to be defined by transceiver manufacturer will + * tend to limit the actual bounds of the supply voltage measurement. + * Accuracy is vendor specific but must be better than 3% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. Note that in some transceivers, transmitter supply + * voltage and receiver supply voltage are isolated. In that case, + * only one supply is monitored. Refer to the device specification + * for more detail. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 100 uV (1mV=1000uV) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 Volt */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_tx_bias(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 2 uA (1mA=1000uA) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total*2) / 1000); + val_f = (((total*2) - (val_i*1000)) / 100); + /* Return Unit: 1 mA */ + return snprintf(buf_p, lmax, "%d.%01d\n", val_i, val_f); +} + + +int +_common_count_tx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_rx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_wavelength(struct transvr_obj_s *self, + uint8_t high_byte, + uint8_t low_byte) { + /* [Note] + * SFP : uint 1 um. + * QSFP: unit 0.05 um. + */ + int total = 0; + + total = transform_word_to_int(high_byte, low_byte); + switch (self->type) { + case TRANSVR_TYPE_SFP: + return total; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + return (total/20); + + default: + break; + } + return ERR_TRANSVR_UNDEFINED; +} + + +int +common_get_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_id, + "common_get_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->id; +} + + +int +common_get_ext_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "common_get_ext_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->ext_id; +} + + +int +common_get_connector(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_connector, + "common_get_connector"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->connector; +} + + +int +common_get_vendor_name(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_name, + "common_get_vendor_name"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); +} + + +int +common_get_vendor_pn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_pn, + "common_get_vendor_pn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); +} + + +int +common_get_vendor_rev(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_rev, + "common_get_vendor_rev"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); +} + + +int +common_get_vendor_sn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_sn, + "common_get_vendor_sn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); +} + + +int +common_get_br(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return (int)self->br; + } + err = _check_by_mode(self, + &_common_update_attr_br, + "common_get_br"); + if (err < 0){ + return err; + } + /* Transform to INT to show error case */ + return (int)self->br; +} + + +int +common_get_len_smf(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_smf; + } + err = _check_by_mode(self, + &_common_update_attr_len_smf, + "common_get_len_smf"); + if (err < 0){ + return err; + } + return self->len_smf; +} + + +int +common_get_len_om1(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om1; + } + err = _check_by_mode(self, + &_common_update_attr_len_om1, + "common_get_len_om1"); + if (err < 0){ + return err; + } + return self->len_om1; +} + + +int +common_get_len_om2(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om2; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om2, + "common_get_len_om2"); + if (err < 0){ + return err; + } + return self->len_om2; +} + + +int +common_get_len_om3(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om3; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om3, + "common_get_len_om3"); + if (err < 0){ + return err; + } + return self->len_om3; +} + + +int +common_get_len_om4(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om4; + } + err = _check_by_mode(self, + &_common_update_attr_len_om4, + "common_get_len_om4"); + if (err < 0){ + return err; + } + return self->len_om4; +} + + +int +common_get_comp_extended(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp_ext, + "common_get_comp_extended"); + if (err_code < 0){ + return err_code; + } + return self->transvr_comp_ext; +} + + +int +common_get_comp_rev(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_comp_rev, + "common_get_comp_rev"); + if (err_code < 0){ + return err_code; + } + return self->comp_rev; +} + + +int +common_get_info(struct transvr_obj_s *self){ + + if (self->state != STATE_TRANSVR_CONNECTED) { + return self->state; + } + return self->info; +} + + +int +_common_get_if_lane(struct transvr_obj_s *self, + char *result){ + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_M_STR); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + memset(tmp_str, 0, LEN_TRANSVR_M_STR); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_M_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_M_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_M_STR); + } + if (i == 0) { + return EVENT_TRANSVR_TASK_FAIL; + } + return 0; +} + + +int +common_get_if_lane(struct transvr_obj_s *self, + char *buf_p){ + + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + if (self->ioexp_obj_p->state != STATE_IOEXP_NORMAL) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n", ERR_TRANSVR_ABNORMAL); + } + if (_common_get_if_lane(self, tmp_str) < 0) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n" ,ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%s\n" ,tmp_str); +} + + +int +sfp_get_len_sm(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_len_sm, + "sfp_get_len_sm"); + if (err_code < 0){ + return err_code; + } + return self->len_sm; +} + + +int +sfp_get_rate_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_rate_id, + "sfp_get_rate_id"); + if (err_code < 0){ + return err_code; + } + return self->rate_id; +} + + +int +sfp_get_soft_rs0(struct transvr_obj_s *self){ + /* Note: + * SFP Soft Rate_Select Select [aka. "RS(0)"] address + * A2h, offset: 110, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs0, + "sfp_get_soft_rs0"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs0 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_soft_rs1(struct transvr_obj_s *self){ + /* Note: + * SFP Soft RS(1) Select address + * A2h, offset: 118, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs1, + "sfp_get_soft_rs1"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs1 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_temp, + "sfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +sfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_voltage, + "sfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +sfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_bias, + "sfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->curr_tx_bias[0], + self->curr_tx_bias[1], + buf_p); +} + + +int +sfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_power, + "sfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->curr_tx_power[0], + self->curr_tx_power[1], + buf_p); +} + + +int +sfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_rx_power, + "sfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->curr_rx_power[0], + self->curr_rx_power[0], + buf_p); +} + + +int +sfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->rx_em[0]); +} + + +int +sfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->tx_eq[0]); +} + + +int +_sfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: A0h / 36 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +__sfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* SFP Specification Compliance: A0h / 3-10 + * transvr_comp[0-7] = 3 - 10 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_get_comp_10g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[0] = address A0h / 3 + * + * 3 7: 10G Base-ER + * 3 6: 10GBASE-LRM + * 3 5: 10GBASE-LR + * 3 4: 10GBASE-SR + */ + int bitmask = 0xf0; /* 11110000 */ + return (__sfp_get_comp_attr(self, 0) & bitmask); +} + + +int +_sfp_get_comp_1g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[3] = address A0h / 6 + * + * 6 7: BASE-PX *3 + * 6 6: BASE-BX10 *3 + * 6 5: 100BASE-FX + * 6 4: 100BASE-LX/LX10 + * 6 3: 1000BASE-T + * 6 2: 1000BASE-CX + * 6 1: 1000BASE-LX *3 + * 6 0: 1000BASE-SX + */ + return __sfp_get_comp_attr(self, 3); +} + + +int +_sfp_get_cable_tech(struct transvr_obj_s *self) { + /* transvr_comp[5] = address A0h / 8 + * + * 8 3: Active Cable *8 + * 8 2: Passive Cable *8 + */ + int bitmask = 0x0c; /* 00001100 */ + return (__sfp_get_comp_attr(self, 5) & bitmask); +} + + +int +sfp_get_comp_eth_1(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_1"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_1g_eth_comp(self); +} + + +int +sfp_get_comp_eth_10(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_10"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_10g_eth_comp(self); +} + + +int +_sfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: A0h / 2 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Note] Optical and Cable Variants Specification Compliance (SFF-8472) + * [Addr] A0h, Bytes 60-61 + * [Note] For optical variants, as defined by having zero's in A0h Byte 8 + * bits 2 and 3, Bytes 60 and 61 denote nominal transmitter output + * wavelength at room temperature. 16 bit value with byte 60 as high + * order byte and byte 61 as low order byte. The laser wavelength is + * equal to the 16 bit integer value in nm. This field allows the user + * to read the laser wavelength directly, so it is not necessary to + * infer it from the Transceiver Codes A0h Bytes 3 to 10 (see Table + * 5-3). This also allows specification of wavelengths not covered + * in the Transceiver Codes, such as those used in coarse WDM systems. + * + * For passive and active cable variants, a value of 00h for both A0h + * Byte 60 and Byte 61 denotes laser wavelength or cable specification + * compliance is unspecified. + */ + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +int +sfp_get_1g_rj45_extphy_offset(struct transvr_obj_s *self, char *buf) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%02x\n", self->extphy_offset); +} + + +int +sfp_get_1g_rj45_extphy_reg(struct transvr_obj_s *self, char *buf) { + + int i = 0; + int ret = 0; + int retry = 3; + int delay = 200; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; ii2c_client_p, self->extphy_offset); + if (ret >=0) { + goto ok_sfp_get_1g_rj45_extphy_reg; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; + +ok_sfp_get_1g_rj45_extphy_reg: + ret = ((ret & 0x00ff) << 8) | ((ret & 0xff00) >> 8); + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%04x\n", ret); +} + + +int +__qsfp_get_power_cls(struct transvr_obj_s *self, + int direct_access){ + + int err_code; + uint8_t detect_val; + + /* Detect and Update power class attribute */ + if (direct_access){ + err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_power_cls"); + } else { + err_code = self->ext_id; + } + if (err_code <0){ + return err_code; + } + if (err_code == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data */ + detect_val = self->ext_id; + SWP_BIT_CLEAR(detect_val, 2); /* Bit2: CDR RX present */ + SWP_BIT_CLEAR(detect_val, 3); /* Bit3: CDR TX present */ + SWP_BIT_CLEAR(detect_val, 4); /* Bit4: CLEI present */ + SWP_BIT_CLEAR(detect_val, 5); /* Bit5: reserved */ + /* Identify power class */ + switch (detect_val) { + case 0: /* Class_1: 00000000 */ + return 1; + case 64: /* Class_2: 01000000 */ + return 2; + case 128: /* Class_3: 10000000 */ + return 3; + case 192: /* Class_4: 11000000 */ + return 4; + case 1: /* Class_5: 00000001 */ + case 193: /* Class_5: 11000001 */ + return 5; + case 2: /* Class_6: 00000010 */ + case 194: /* Class_6: 11000010 */ + return 6; + case 3: /* Class_7: 00000011 */ + case 195: /* Class_7: 11000011 */ + return 7; + default: + break; + } + SWPS_INFO("%s: Detect undefined power class:%d\n", __func__, detect_val); + return ERR_TRANSVR_UNDEFINED; +} + + +int +qsfp_get_power_cls(struct transvr_obj_s *self) { + return __qsfp_get_power_cls(self, 1); +} + + +int +__qsfp_get_cdr_present(struct transvr_obj_s *self, + int direct_access){ + + int retval; + int BIT_SHIFT = 2; + int BIT_MASK = 0x3; + + /* Detect and Update power class attribute */ + if (direct_access) { + retval = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_cdr_present"); + if (retval < 0){ + return retval; + } + } + retval = self->ext_id; + if (retval == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data and return */ + return (int)(retval >> BIT_SHIFT & BIT_MASK); +} + + +int +qsfp_get_cdr_present(struct transvr_obj_s *self) { + return __qsfp_get_cdr_present(self, 1); +} + + +int +qsfp_get_cdr(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + "qsfp_get_cdr"); + if (err_code <0){ + return err_code; + } + + return self->cdr; +} + + +int +__qsfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* QSFP Specification Compliance: 00h / 131-138 + * transvr_comp[0-7] = 131 - 138 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_get_comp_10_40_100_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[0] = address 00h / 131 + * + * 131 7: Extended: See section 6.3.23. The Extended Specification Compliance + * Codes are maintained in the Transceiver Management section of SFF- + * 8024. + * 131 6: 10GBASE-LRM + * 131 5: 10GBASE-LR + * 131 4: 10GBASE-SR + * 131 3: 40GBASE-CR4 + * 131 2: 40GBASE-SR4 + * 131 1: 40GBASE-LR4 + * 131 0: 40G Active Cable (XLPPI) + */ + return __qsfp_get_comp_attr(self, 0); +} + + +int +_qsfp_get_comp_sonet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 132 7-3: Reserved + * 132 2: OC 48, long reach + * 132 1: OC 48, intermediate reach + * 132 0: OC 48 short reach + */ + return __qsfp_get_comp_attr(self, 1); +} + + +int +_qsfp_get_comp_sas_sata(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 133 7: SAS 24.0 Gb/s + * 133 6: SAS 12.0 Gb/s + * 133 5: SAS 6.0 Gb/s + * 133 4: SAS 3.0 Gb/s + * 133 3-0: Reserved + */ + return __qsfp_get_comp_attr(self, 2); +} + + +int +_qsfp_get_comp_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 134 7-4: Reserved + * 134 3: 1000BASE-T + * 134 2: 1000BASE-CX + * 134 1: 1000BASE-LX + * 134 0: 1000BASE-SX + */ + return __qsfp_get_comp_attr(self, 3); +} + + +int +_qsfp_get_comp_fc_link_length(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 7: Very long distance (V) + * 135 6: Short distance (S) + * 135 5: Intermediate distance (I) + * 135 4: Long distance (L) + * 135 3: Medium (M) + */ + int mask = 0xFC; /* 11111100 */ + return (__qsfp_get_comp_attr(self, 4) & mask); +} + + +int +_qsfp_get_comp_fc_trans_tech(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 2: Reserved + * 135 1: Longwave laser (LC) + * 135 0: Electrical inter-enclosure (EL) + * + * 136 7: Electrical intra-enclosure + * 136 6: Shortwave laser w/o OFC (SN) + * 136 5: Shortwave laser w OFC (SL) + * 136 4: Longwave Laser (LL) + * 136 3-0: Reserved + * + * return value = [bit 8-15:addr 135][bit 0-7:addr 136] + */ + int mask_135 = 7; /* 00000111 */ + int val_135 = (__qsfp_get_comp_attr(self, 4) & mask_135); + int val_136 = __qsfp_get_comp_attr(self, 5); + return ((val_135 << 7) + val_136); +} + + +int +_qsfp_get_comp_fc_trans_media(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 137 7: Twin Axial Pair (TW) + * 137 6: Shielded Twisted Pair (TP) + * 137 5: Miniature Coax (MI) + * 137 4: Video Coax (TV) + * 137 3: Multi-mode 62.5 m (M6) + * 137 2: Multi-mode 50 m (M5) + * 137 1: Multi-mode 50 um (OM3) + * 137 0: Single Mode (SM) + */ + return __qsfp_get_comp_attr(self, 6); +} + + +int +_qsfp_get_comp_fc_speed(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 138 7: 1200 MBps (per channel) + * 138 6: 800 MBps + * 138 5: 1600 MBps (per channel) + * 138 4: 400 MBps + * 138 3: 3200 MBps (per channel) + * 138 2: 200 MBps + * 138 1: Extended: See section 6.3.23. The Extended Specification + * Compliance Codes are maintained in the Transceiver Management + * section of SFF-8024. + * 138 0: 100 MBps + */ + return __qsfp_get_comp_attr(self, 7); +} + + +int +_qsfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: 00h / 192 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_comp_eth(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_eth"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_ethernet(self); +} + + +int +qsfp_get_comp_10_40(struct transvr_obj_s *self) { + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_10_40"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_10_40_100_ethernet(self); +} + + +int +_qsfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: 00h / 130 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_temp, + "qsfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +qsfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_voltage, + "qsfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +qsfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->tx_eq[0], self->tx_eq[1]); +} + + +int +qsfp_get_transvr_rx_am(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_get_transvr_rx_am"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_am[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_am[0], self->rx_am[1]); +} + + +int +qsfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_em[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_em[0], self->rx_em[1]); +} + + +int +_qsfp_get_channel_diag(uint8_t *data_array, + int (*count_func)(uint8_t high_byte, uint8_t low_byte, char *buf_p), + char *ch_name, + char *result_p) { + int i, high, low; + int len_max = 128; + char ch_buf[4][16] = { DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL }; + + for (i=0; i<4; i++) { + high = (i*2); + low = ((i*2) + 1); + count_func(data_array[high], data_array[low], ch_buf[i]); + } + return snprintf(result_p, len_max, + "%s-%d:%s%s-%d:%s%s-%d:%s%s-%d:%s", + ch_name, 1, ch_buf[0], + ch_name, 2, ch_buf[1], + ch_name, 3, ch_buf[2], + ch_name, 4, ch_buf[3]); +} + + +int +qsfp_get_soft_rx_los(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_rx_los, + "qsfp_get_soft_rx_los"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->rx_los & mask)); +} + + +int +qsfp_get_soft_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_get_soft_tx_disable"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_disable & mask)); +} + + +int +qsfp_get_soft_tx_fault(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_fault, + "qsfp_get_soft_tx_fault"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_fault & mask)); +} + + +int +qsfp_get_auto_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + if (self->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "%d\n", ERR_TRANSVR_FUNC_DISABLE); + } + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "0x%02x\n", self->auto_tx_disable); +} + + +int +qsfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_bias, + "qsfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _qsfp_get_channel_diag(self->curr_tx_bias, + _common_count_tx_bias, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_power, + "qsfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_tx_power, + _common_count_tx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_rx_power, + "qsfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_rx_power, + _common_count_rx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Desc] Wavelength or Copper Cable Attenuation (SFF-8636) + * [Addr] 00h 186-187 + * [Note] + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is + * a 16-bit hex value with Byte 186 as high order byte and Byte 187 as + * low order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. + * If the free side device is identified as copper cable these registers will + * be used to define the cable attenuation. An indication of 0 dB attenuation + * refers to the case where the attenuation is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +/* Public Function for Setup Features + */ +static int +__sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + uint8_t update_val = (*attr_p); + + switch (input_val) { + case 0: + SWP_BIT_CLEAR(update_val, bit_shift); + break; + case 1: + SWP_BIT_SET(update_val, bit_shift); + break; + default: + retval = ERR_TRANSVR_UNEXCPT; + err_code = ERR_TRANSVR_UNEXCPT; + err_msg = "Exception occurs"; + goto err_private_sfp_set_soft_rs_1; + } + err_code = _common_set_uint8_attr(self, + address, + page, + offset, + update_val, + attr_p, + caller, + show_err); + if (err_code < 0) { + retval = err_code; + err_msg = "Write data via i2c fail!"; + goto err_private_sfp_set_soft_rs_1; + } + (*attr_p) = update_val; + return 0; + +err_private_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +static int +_sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + + /* Check input value */ + if ((input_val != 0) && (input_val != 1)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + switch (err_code) { + case 0: + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "Not support this feature"; + break; + case ERR_TRANSVR_UNINIT: + retval = ERR_TRANSVR_UNINIT; + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + retval = ERR_TRANSVR_UNPLUGGED; + err_msg = "Transceiver unplugged!"; + break; + default: + retval = err_code; + err_msg = "Check Rate_ID fail!"; + break; + } + goto err_common_sfp_set_soft_rs_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + attr_update_func, + caller); + if ( (err_code < 0) || + ((*attr_p) == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Generate and update value */ + return __sfp_set_soft_rs(self, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + +err_common_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +sfp_set_soft_rs0(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(0)"] address + * A2h, offset: 110, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + bit_shift, + &_sfp_update_attr_soft_rs0, + &(self->soft_rs0), + "sfp_set_soft_rs0", + show_err); +} + + +int +sfp_set_soft_rs1(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(1)"] address + * A2h, offset: 118, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + bit_shift, + &_sfp_update_attr_soft_rs1, + &(self->soft_rs1), + "sfp_set_soft_rs1", + show_err); +} + + +int +__sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_tx_eq; + } + setv = (uint8_t)input; + if (self->tx_eq[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + setv, + &(self->tx_eq[0]), + "_sfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_tx_eq; + } + return 0; + +err_sfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; itx_eq[0]; + if (_sfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if (self->tx_eq[0] == tmp){ + return 0; + } + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +sfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_tx_eq(self, input, 1); +} + + +int +__sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_rx_em; + } + setv = (uint8_t)input; + if (self->rx_em[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + setv, + &(self->rx_em[0]), + "_sfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_rx_em; + } + return 0; + +err_sfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; irx_em[0]; + if (_sfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if (self->rx_em[0] == tmp){ + return 0; + } + } + return -1; +} + + +int +sfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_rx_em(self, input, 1); +} + + +int +sfp_set_1g_rj45_extphy_offset(struct transvr_obj_s *self, + int input) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xff)) { + return ERR_TRANSVR_BADINPUT; + } + self->extphy_offset = (uint8_t)input; + return 0; +} + + +int +sfp_set_1g_rj45_extphy_reg(struct transvr_obj_s *self, + int input) { + + int i = 0; + int retry = 3; + int delay = 200; + uint16_t tmp = 0; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xffff)) { + return ERR_TRANSVR_BADINPUT; + } + tmp = ((input & 0x00ff) << 8) | ((input & 0xff00) >> 8); + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; i<=retry; i++) { + if (i2c_smbus_write_word_data(self->i2c_client_p, + self->extphy_offset, + tmp) >= 0) { + return 0; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; +} + + +static int +__qsfp_set_cdr(struct transvr_obj_s *self, + int input_val, + int show_err) { + + uint8_t update_val; + int CDR_FEATURE_SUPPORTED = 0x3; + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_name = "__qsfp_set_cdr"; + + /* Check input value */ + if ((input_val < 0) || (input_val > 0xff)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_qsfp_set_cdr_1; + } + update_val = (uint8_t)input_val; + /* Check CDR supported by transceiver */ + err_code = qsfp_get_cdr_present(self); + if (err_code < 0) { + retval = err_code; + switch (err_code) { + case ERR_TRANSVR_UNINIT: + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + err_msg = "Transceiver unplugged!"; + break; + default: + err_msg = "Check CDR present fail!"; + break; + } + goto err_qsfp_set_cdr_1; + } + if (err_code != CDR_FEATURE_SUPPORTED) { + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "This transceiver not support CDR!"; + goto err_qsfp_set_cdr_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + func_name); + if ( (err_code < 0) || + (self->cdr == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_qsfp_set_cdr_1; + } + /* Write input value to transceiver */ + return _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + update_val, + &(self->cdr), + func_name, + show_err); + +err_qsfp_set_cdr_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +qsfp_set_cdr(struct transvr_obj_s *self, + int input_val) { + return __qsfp_set_cdr(self, input_val, 1); +} + + +int +qsfp_set_soft_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int show_err = 1; + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + int update_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_soft_tx_disable"); + if (retval < 0) { + snprintf(err_msg, 63, "Not ready. err:%d", retval); + goto err_qsfp_set_soft_tx_disable; + } + if ((input_val > in_max) || + (input_val < in_min) ){ + retval = ERR_TRANSVR_BADINPUT; + snprintf(err_msg, 63, "Input value:%d incorrect!", input_val); + goto err_qsfp_set_soft_tx_disable; + } + if ((self->tx_disable & 0x0f) == input_val) { + return 0; + } + update_val = ((self->tx_disable & 0xf0) & input_val); + retval = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + input_val, + &(self->tx_disable), + "qsfp_set_tx_disable", + show_err); + if (retval < 0) { + snprintf(err_msg, 63, "_common_set_uint8_attr:%d fail!", retval); + goto err_qsfp_set_soft_tx_disable; + } + return 0; + +err_qsfp_set_soft_tx_disable: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return retval; +} + + +int +_qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + uint8_t update) { + + uint8_t tx_enable = 0x0; + int show_e = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Handle timing issues */ + if (update != tx_enable) { + /* Note: + * Because there are some txvr has timing issues, + * therefore we need to execute reset cycle first. + * (enable -> other settings) + */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + tx_enable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set reset value fail"; + goto err_qsfp_set_auto_tx_disable; + } + mdelay(10); + } + /* Setup target value */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->auto_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set target value fail"; + goto err_qsfp_set_auto_tx_disable; + } + /* Check and update */ + err = _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C get value fail"; + goto err_qsfp_set_auto_tx_disable; + } + if (self->tx_disable != update) { + emsg = "data not become effective"; + goto err_qsfp_set_auto_tx_disable; + } + return 0; + +err_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s\n", + __func__, emsg, self->swp_name); + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Update settings*/ + if (input_val == VAL_TRANSVR_FUNCTION_DISABLE) { + emsg = "User disable auto tx_disable"; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + goto out_qsfp_set_auto_tx_disable; + } + if ((input_val > in_max) || (input_val < in_min) ){ + SWPS_INFO("%s: Input value:%d incorrect! :%s\n", + __func__, input_val, self->swp_name); + return ERR_TRANSVR_BADINPUT; + } + self->auto_tx_disable = input_val; + /* Check current soft tx_disable */ + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_auto_tx_disable"); + switch (retval) { + case 0: + break; + case ERR_TRANSVR_UNPLUGGED: + emsg = "Doesn't need to update"; + goto out_qsfp_set_auto_tx_disable; + default: + SWPS_INFO("%s: setup fail :%d :%s\n", + __func__, retval, self->swp_name); + return retval; + } + return _qsfp_set_auto_tx_disable(self, input_val); + +out_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s :%d\n :%d", + __func__, emsg, self->swp_name, input_val, retval); + return 0; +} + + +int +__qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_tx_eq; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->tx_eq[0] == setv[0]) && + (self->tx_eq[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + setv, + self->tx_eq, + "_qsfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_tx_eq; + } + return 0; + +err_qsfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; itx_eq[0]; + tmp[1] = self->tx_eq[1]; + if (_qsfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if ((self->tx_eq[0] == tmp[0]) && + (self->tx_eq[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_tx_eq(self, input, 1); +} + + +int +__qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_am; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_am[0] == setv[0]) && + (self->rx_am[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + setv, + self->rx_am, + "_qsfp_set_rx_am", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_am; + } + return 0; + +err_qsfp_set_rx_am: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_am[0]; + tmp[1] = self->rx_am[1]; + if (_qsfp_update_attr_rx_am(self, show_e) < 0){ + continue; + } + if ((self->rx_am[0] == tmp[0]) && + (self->rx_am[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_am(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_set_rx_am"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_am(self, input, 1); +} + + +int +__qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_em; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_em[0] == setv[0]) && + (self->rx_em[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + setv, + self->rx_em, + "_qsfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_em; + } + return 0; + +err_qsfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_em[0]; + tmp[1] = self->rx_em[1]; + if (_qsfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if ((self->rx_em[0] == tmp[0]) && + (self->rx_em[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_em(self, input, 1); +} + + +int +common_transvr_dump(struct transvr_obj_s* self){ + + char *type_name = "Undefined"; + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + switch (self->type) { + case TRANSVR_TYPE_SFP: + type_name = STR_TRANSVR_SFP; + break; + case TRANSVR_TYPE_QSFP: + type_name = STR_TRANSVR_QSFP; + break; + case TRANSVR_TYPE_QSFP_PLUS: + type_name = STR_TRANSVR_QSFP_PLUS; + break; + case TRANSVR_TYPE_QSFP_28: + type_name = STR_TRANSVR_QSFP28; + break; + case TRANSVR_TYPE_FAKE: + type_name = "FAKE"; + goto ok_common_transvr_dump; + case TRANSVR_TYPE_UNPLUGGED: + type_name = "UNPLUGGED"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_INCONSISTENT: + type_name = "INCONSISTENT"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_ERROR: + type_name = "ERROR"; + goto err_common_transvr_dump; + + default: + type_name = "UNEXPECTED"; + goto err_common_transvr_dump; + } + printk(KERN_INFO "[SWPS] Dump %s information:\n", self->swp_name); + printk(KERN_INFO " |- :%s\n", type_name); + printk(KERN_INFO " |- :%s\n", self->vendor_name); + printk(KERN_INFO " |- :%s\n", self->vendor_pn); + printk(KERN_INFO " |- :%s\n", self->vendor_rev); + printk(KERN_INFO " |- :%s\n", self->vendor_sn); + printk(KERN_INFO " |- :0x%02x\n", self->br); + printk(KERN_INFO " |- :0x%02x\n", self->comp_rev); + printk(KERN_INFO " |- :%d\n", self->len_om1); + printk(KERN_INFO " |- :%d\n", self->len_om2); + printk(KERN_INFO " |- :%d\n", self->len_om3); + printk(KERN_INFO " |- :%d\n", self->len_om4); + return 0; + +ok_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return 0; + +err_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return -1; +} + + +int +sfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_sm); + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :0x%02x\n", self->rate_id); + return 0; +} + + +int +qsfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :Class_%d\n", __qsfp_get_power_cls(self, 0)); + return 0; +} + + +int +fake_transvr_dump(struct transvr_obj_s* self) { + + printk(KERN_INFO "[SWPS] Dump transceiver information: %s\n", self->swp_name); + printk(KERN_INFO " |- :FAKE\n"); + printk(KERN_INFO " |- :FAKE_VENDER_NAME\n"); + printk(KERN_INFO " |- :FAKE_VENDER_PN\n"); + printk(KERN_INFO " |- :FAKE_VENDER_REV\n"); + printk(KERN_INFO " |- :FAKE_VENDER_SN\n"); + printk(KERN_INFO " |- :0x99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " '- :0x99\n"); + return 0; +} + + +/* ========== Object functions for fake type ========== + */ +int +fake_transvr_update(struct transvr_obj_s *self, + int show_err){ + self->state = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +fake_get_binary(struct transvr_obj_s *self){ + return 1; +} + +int +fake_get_int(struct transvr_obj_s *self){ + return 99; +} + + +int +fake_get_hex(struct transvr_obj_s *self){ + return 0x0f; +} + + +int +fake_get_str(struct transvr_obj_s *self, char *buf) { + return snprintf(buf, 16, "fake_get_str\n"); +} + + +int +fake_set_int(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: %d\n", __func__, input); + return 0; +} + + +int +fake_set_hex(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: 0x%02x\n", __func__, input); + return 0; +} + + +/* ========== Object functions for unsupported ========== + */ +int +unsupported_get_func(struct transvr_obj_s *self){ + return ERR_TRANSVR_NOTSUPPORT; +} + + +int +unsupported_get_func2(struct transvr_obj_s *self, + char *buf_p) { + int len = snprintf(buf_p, 8, "%d\n", ERR_TRANSVR_NOTSUPPORT); + return len; +} + + +int +unsupported_set_func(struct transvr_obj_s *self, + int input_val){ + return ERR_TRANSVR_NOTSUPPORT; +} + + + +/* ========== Object functions for long term task ========== + * + * [Note] + * SWPS transceiver worker is likely the green-thread (coroutine). + * Due to resource and performance considerations. SWPS run all + * features in one kthread at the same time, and handle by it self. + */ + +/* For Transceiver Task Handling + */ +static struct transvr_worker_s * +transvr_task_get(struct transvr_obj_s *self, + char *func_name) { + + struct transvr_worker_s *curr_p = self->worker_p; + + while(curr_p != NULL){ + if (strcmp((curr_p->func_name), func_name) == 0 ) { + return curr_p; + } + curr_p = curr_p->next_p; + } + return NULL; +} + + +static struct transvr_worker_s* +transvr_task_creat(struct transvr_obj_s *self, + int (*main_task)(struct transvr_worker_s *task), + int (*post_task)(struct transvr_worker_s *task), + char *caller) { + + struct transvr_worker_s *task_p = NULL; + struct transvr_worker_s *curr_p = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check task not exist */ + task_p = transvr_task_get(self, caller); + if (task_p) { + snprintf(err_msg, sizeof(err_msg), "Task already created!"); + goto err_transvr_task_creat; + } + /* Create task worker */ + task_p = kzalloc(sizeof(struct transvr_worker_s), GFP_KERNEL); + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_transvr_task_creat; + } + /* Setup task data */ + task_p->transvr_p = self; + task_p->next_p = NULL; + task_p->trigger_time = 0; + task_p->retry = 1; + task_p->state = STATE_T_TASK_INIT; + task_p->main_task = main_task; + task_p->post_task = post_task; + task_p->p_data = NULL; + snprintf(task_p->func_name, sizeof(task_p->func_name), "%s", caller); + /* Setup Link List */ + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p->next_p != NULL) { + curr_p = curr_p->next_p; + } + curr_p->next_p = task_p; + task_p->pre_p = curr_p; + } else { + self->worker_p = task_p; + task_p->pre_p = NULL; + } + return task_p; + +err_transvr_task_creat: + SWPS_ERR("%s: %s :%s :%s\n", + __func__, err_msg, caller, self->swp_name); + return NULL; +} + + +static void +transvr_task_free_one(struct transvr_worker_s *task_p){ + + struct transvr_worker_s *pre_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (task_p) { + pre_p = task_p->pre_p; + next_p = task_p->next_p; + + if ((pre_p) && (next_p)) { + pre_p->next_p = next_p; + next_p->pre_p = pre_p; + + } else if ((!pre_p) && (next_p)) { + next_p->pre_p = NULL; + + } else if ((pre_p) && (!next_p)) { + pre_p->next_p = NULL; + + } else if ((!pre_p) && (!next_p)) { + task_p->transvr_p->worker_p = NULL; + } else { + SWPS_ERR("%s: Unexcept case!\n :%s", + __func__, task_p->transvr_p->swp_name); + } + kfree(task_p->p_data); + kfree(task_p); + } +} + + +static void +transvr_task_free_all(struct transvr_obj_s *self) { + + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p) { + next_p = curr_p->next_p; + transvr_task_free_one(curr_p); + curr_p = next_p; + } + self->worker_p = NULL; + } +} + + +static void +transvr_cache_free_all(struct transvr_obj_s *self) { + + memset(self->vendor_name, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_rev, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_pn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_sn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + self->extphy_offset = 0; +} + +static int +_transvr_task_run_main(struct transvr_worker_s *task_p) { + + int retval = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "main_task is NULL!"); + goto main_transvr_task_err; + } + if ((task_p->trigger_time) == 0){ + goto main_transvr_task_run; + } + if (time_before(jiffies, task_p->trigger_time)){ + goto main_transvr_task_wait; + } + goto main_transvr_task_run; + +main_transvr_task_run: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + task_p->retry -= 1; + } + retval = task_p->main_task(task_p); + if (retval < 0) { + if (task_p->retry > 0) { + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + } + goto main_transvr_task_identify; + +main_transvr_task_identify: + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + + case EVENT_TRANSVR_TASK_DONE: + task_p->state = STATE_T_TASK_DONE; + return EVENT_TRANSVR_TASK_DONE; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + +main_transvr_task_wait: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + +main_transvr_task_err: + task_p->state = STATE_T_TASK_FAIL; + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, retval, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_transvr_task_run_post(struct transvr_worker_s *task_p) { + + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if ((task_p->post_task) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + switch (task_p->state) { + case STATE_T_TASK_WAIT: + case STATE_T_TASK_INIT: + goto post_transvr_task_wait; + + case STATE_T_TASK_DONE: + case STATE_T_TASK_FAIL: + goto post_transvr_task_run; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Unexcept task state"); + goto post_transvr_task_err; + +post_transvr_task_run: + task_p->post_task(task_p); + return EVENT_TRANSVR_TASK_DONE; + +post_transvr_task_wait: + return EVENT_TRANSVR_TASK_WAIT; + +post_transvr_task_err: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, task_p->state, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_one(struct transvr_worker_s *task_p) { + + int retval_main = DEBUG_TRANSVR_INT_VAL; + int retval_post = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval_main = _transvr_task_run_main(task_p); + if (retval_main < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute main_task fail!"); + goto err_transvr_task_run_one; + } + retval_post = _transvr_task_run_post(task_p); + if (retval_post < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute post_task fail!"); + goto err_transvr_task_run_one; + } + return retval_main; + +err_transvr_task_run_one: + SWPS_INFO("%s: %s
:%d :%d :%s :%s\n", + __func__, err_msg, retval_main, retval_post, + task_p->func_name, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_all(struct transvr_obj_s *self) { + + int haserr = 0; + int retval = DEBUG_TRANSVR_INT_VAL; + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if ((self->worker_p) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + curr_p = self->worker_p; + while (curr_p != NULL) { + next_p = curr_p->next_p; + retval = transvr_task_run_one(curr_p); + if (curr_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + curr_p = next_p; + continue; + } + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + break; + case EVENT_TRANSVR_TASK_DONE: + transvr_task_free_one(curr_p); + break; + case EVENT_TRANSVR_TASK_FAIL: + + default: + haserr = 1; + transvr_task_free_one(curr_p); + break; + } + curr_p = next_p; + } + if (haserr) { + return EVENT_TRANSVR_TASK_FAIL; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +static void +transvr_task_set_delay(struct transvr_worker_s *task_p, + unsigned long delay_msec) { + + task_p->trigger_time = (jiffies + (delay_msec * (HZ/1000))); +} + + +static void +transvr_task_set_retry(struct transvr_worker_s *task_p, + unsigned long retry_times) { + + task_p->retry = retry_times; +} + + +/* For Transceiver Post Task + */ +int +taskfunc_post_do_nothing(struct transvr_worker_s *task_p) { + + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_post_handle_task_state(struct transvr_worker_s *task_p) { + + struct transvr_obj_s* tp = task_p->transvr_p; + + switch (task_p->state) { + case STATE_T_TASK_INIT: + case STATE_T_TASK_WAIT: + return EVENT_TRANSVR_TASK_WAIT; + + case STATE_T_TASK_DONE: + tp->state = STATE_TRANSVR_CONNECTED; + tp->send_uevent(tp, KOBJ_ADD); + return EVENT_TRANSVR_TASK_DONE; + + case STATE_T_TASK_FAIL: + tp->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_TASK_FAIL; + + default: + break; + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +/* For Transceiver Main Task + */ +int +_taskfunc_sfp_setup_soft_rs(struct transvr_worker_s *task_p, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller) { + + int show_err = 0; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_soft_rs"; + + err_code = _sfp_update_attr_soft_rs0(task_p->transvr_p, 0); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + err_code = __sfp_set_soft_rs(task_p->transvr_p, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_setup_soft_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_code); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +__taskfunc_sfp_setup_hard_rs(struct transvr_worker_s *task_p, + int input_val, + int (*get_func)(struct ioexp_obj_s *self, int virt_offset), + int (*set_func)(struct ioexp_obj_s *self, int virt_offset, int input_val)) { + + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + + err_val = get_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset); + + if (err_val < 0) { + if (err_val == ERR_IOEXP_NOTSUPPORT) { + return EVENT_TRANSVR_TASK_DONE; + } + err_str = "Get current hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + if (err_val == input_val) { + return EVENT_TRANSVR_TASK_DONE; + } + err_val = set_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_p_taskfunc_sfp_setup_hard_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_hard_rs0(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs0, + task_p->transvr_p->ioexp_obj_p->set_hard_rs0); +} + + +int +_taskfunc_sfp_setup_hard_rs1(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs1, + task_p->transvr_p->ioexp_obj_p->set_hard_rs1); +} + + +int +_taskfunc_sfp_setup_rs0(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs0"; + + err_val = _taskfunc_sfp_setup_hard_rs0(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs0, + task_p->transvr_p->eeprom_map_p->page_soft_rs0, + task_p->transvr_p->eeprom_map_p->offset_soft_rs0, + bit_shift, + &(task_p->transvr_p->soft_rs0), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs0_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs0(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_rs1(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs1"; + + err_val = _taskfunc_sfp_setup_hard_rs1(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs1, + task_p->transvr_p->eeprom_map_p->page_soft_rs1, + task_p->transvr_p->eeprom_map_p->offset_soft_rs1, + bit_shift, + &(task_p->transvr_p->soft_rs1), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs1_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs1(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_sfp_setup_SFF8431_case1(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs0(task_p, update_val); +} + + + +int +taskfunc_sfp_setup_SFF8431_case2(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs1(task_p, update_val); +} + + +int +taskfunc_sfp_setup_SFF8431_case3(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + int update_rs0 = 1; + int update_rs1 = 1; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _taskfunc_sfp_setup_rs0(task_p, update_rs0); + if (err_code < 0) { + return err_code; + } + return _taskfunc_sfp_setup_rs1(task_p, update_rs1); +} + + +int +taskfunc_sfp_handle_1g_rj45(struct transvr_worker_s *task_p) { + + /* Not all of platform support 0x56 for transceiver + * external PHY, Support list as below: + * => 1. Magnolia-PVT (PS: EVT & DVT not ready) + */ + int ext_phy_addr = 0x56; + int ext_phy_page = -1; + int ext_phy_offs = 0x11; + int ext_phy_len = 1; + int lstate_mask = 0x04; /* 00000100 */ + int show_err = 0; + int fail_retry = 5; + int fail_delay = 1000; /* msec */ + int err_code = DEBUG_TRANSVR_INT_VAL; + uint8_t detect_val = DEBUG_TRANSVR_HEX_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + int *tmp_p = NULL; + char *func_name = "taskfunc_sfp_handle_1g_rj45"; + + if (task_p->transvr_p->state != STATE_TRANSVR_CONNECTED) { + return EVENT_TRANSVR_TASK_DONE; + } + if ( (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000) && + (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000_up) ) { + goto err_taskfunc_sfp_handle_1g_rj45_1; + } + err_code = _common_update_uint8_attr(task_p->transvr_p, + ext_phy_addr, + ext_phy_page, + ext_phy_offs, + ext_phy_len, + &detect_val, + func_name, + show_err); + if ( (err_code < 0) || + (detect_val == DEBUG_TRANSVR_HEX_VAL) ) { + snprintf(err_str, sizeof(err_str), "Detect external link status fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + if ((detect_val & lstate_mask) == lstate_mask) { + goto ok_taskfunc_sfp_handle_1g_rj45_link_up; + } + goto ok_taskfunc_sfp_handle_1g_rj45_link_down; + +ok_taskfunc_sfp_handle_1g_rj45_link_up: + /* Filter out noise */ + if (!(task_p->p_data)) { + tmp_p = kzalloc(sizeof(int), GFP_KERNEL); + if (!tmp_p) { + snprintf(err_str, sizeof(err_str), "kzalloc p_data fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + *tmp_p = TRANSVR_CLASS_BASE_T_1000_up; + task_p->p_data = tmp_p; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + } + if ((*(int *)(task_p->p_data)) != TRANSVR_CLASS_BASE_T_1000_up) { + kfree(task_p->p_data); + task_p->p_data = NULL; + snprintf(err_str, sizeof(err_str), "Internal error"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + kfree(task_p->p_data); + task_p->p_data = NULL; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_link_down: + if (task_p->p_data) { + kfree(task_p->p_data); + task_p->p_data = NULL; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_done: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_1: + snprintf(err_str, sizeof(err_str), "Detect transceiver:%d not Base-T, remove task.", + task_p->transvr_p->info); + SWPS_INFO("%s: %s :%s\n", __func__, err_str, task_p->transvr_p->swp_name); + transvr_task_set_retry(task_p, 0); + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_2: + if (task_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, fail_retry); + } + if ((task_p->retry) == 0) { + /* Error case: + * => In this case, SWPS will stop external Link state monitor features + * and keeps transvr_p->info on TRANSVR_CLASS_BASE_T_1000_up. + * Upper layer will see it always Linkup that because of these type of + * transceiver has external phy, BCM chip see it as Loopback transceiver. + */ + SWPS_WARN("%s can not access external PHY of Base-T SFP transceiver\n", + task_p->transvr_p->swp_name); + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + return EVENT_TRANSVR_TASK_DONE; + } else { + transvr_task_set_delay(task_p, fail_delay); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_qsfp_setup_power_mod(struct transvr_obj_s *self, + int setup_val) { + + int curr_val = DEBUG_TRANSVR_INT_VAL; + int err_val = DEBUG_TRANSVR_INT_VAL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + + curr_val = self->ioexp_obj_p->get_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset); + if (curr_val < 0){ + err_msg = "Get current value fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + if (curr_val == setup_val){ + return EVENT_TRANSVR_TASK_DONE; + } + err_val = self->ioexp_obj_p->set_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset, + setup_val); + if (err_val < 0){ + err_msg = "Setup power mode fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_qsfp_setup_power_mod_1: + SWPS_INFO("%s: %s :%d :%d :%d\n", + __func__, err_msg, err_val, curr_val, setup_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_qsfp_handle_tx_disable(struct transvr_worker_s *task_p) { + + int i = 0; + int retry = 5; + int delay_ms = 100; + + if (task_p->transvr_p->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return EVENT_TRANSVR_TASK_DONE; + } + if (!_qsfp_is_implement_tx_disable(task_p->transvr_p)) { + return EVENT_TRANSVR_TASK_DONE; + } + for (i=0; itransvr_p, + task_p->transvr_p->auto_tx_disable) + == EVENT_TRANSVR_TASK_DONE) { + goto ok_taskfunc_qsfp_handle_tx_disable; + } + mdelay(delay_ms); + } + SWPS_INFO("%s auto setup tx_disable:0x%02x fail.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_INIT_FAIL; + +ok_taskfunc_qsfp_handle_tx_disable: + SWPS_INFO("%s auto setup tx_disable:0x%02x ok.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_qsfp_set_hpmod(struct transvr_worker_s *task_p) { + + int err = DEBUG_TRANSVR_INT_VAL; + int HIGH_POWER_MODE = 0; + + /* Handle power mode */ + err = _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + HIGH_POWER_MODE); + if (err < 0) { + SWPS_INFO("%s: setup hpmod fail :%d :%s\n", + __func__, err, task_p->transvr_p->swp_name); + return err; + } + /* Handle auto tx_disable + * [Note] + * => Because there are some transceiver have timing issues or + * setup sequence issues, therefore we handle auto tx_disable + * after handle power mode. + */ + mdelay(100); + return taskfunc_qsfp_handle_tx_disable(task_p); +} + + +int +taskfunc_qsfp_set_lpmod(struct transvr_worker_s *task_p) { + + int LOW_POWER_MODE = 1; + return _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + LOW_POWER_MODE); +} + + +static int +initfunc_sfp_handle_multi_rate_mode(struct transvr_obj_s *self) { + + int task_retry = 3; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "sfp_handle_multi_rate_mode"; + struct transvr_worker_s *task_p = NULL; + + switch (self->rate_id) { + case 0x00: /* Unspecified */ + case 0x03: /* Unspecified */ + case 0x05: /* Unspecified */ + case 0x07: /* Unspecified */ + case 0x09: /* Unspecified */ + case 0x0B: /* Unspecified */ + case 0x0D: /* Unspecified */ + case 0x0F: /* Unspecified */ + goto sfp_handle_multi_rate_mode_4_unspecified; + + case 0x02: /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case1, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x04: /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case2, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x06: /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case3, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x01: /* SFF-8079 (4/2/1G Rate_Select & AS0/AS1) */ + err_str = "SFF-8079 (4/2/1G Rate_Select & AS0/AS1)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x08: /* FC-PI-5 (16/8/4G Rx Rate_select only) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Rx Rate_select only)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0A: /* FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0C: /* FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + */ + err_str = "FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0E: /* 10/8G Rx and Tx Rate_Select controlling the operation or + * locking modes of the internal signal conditioner, retimer + * or CDR, according to the logic table defined in Table 10-2, + * High Bit Rate (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = + * 8.5 Gb/s. In this mode, the default value of bit 110.3 (Soft + * Rate Select RS(0), Table 9-11) and of bit 118.3 (Soft Rate + * Select RS(1), Table 10-1) is 1. + */ + err_str = "cable type: 0x0E"; + goto sfp_handle_multi_rate_mode_4_not_support; + + default: + err_str = "cable type: UNKNOW"; + goto sfp_handle_multi_rate_mode_4_not_support; + } + +sfp_handle_multi_rate_mode_4_sff8431: + if (!task_p) { + err_str = "Create task fail!"; + goto sfp_handle_multi_rate_mode_4_fail_1; + } + transvr_task_set_retry(task_p, task_retry); + return EVENT_TRANSVR_TASK_WAIT; + +sfp_handle_multi_rate_mode_4_unspecified: + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_not_support: + SWPS_INFO("%s: Does not support %s :%s :0x%02x\n", + func_str, err_str, self->swp_name, self->rate_id); + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_fail_1: + SWPS_INFO("%s: %s :%s :0x%02x, :%d\n", + func_str, err_str, self->swp_name, self->rate_id, err_code); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +initfunc_sfp_handle_1g_rj45(struct transvr_obj_s *self) { + + struct transvr_worker_s *task_p = NULL; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_sfp_handle_1g_rj45"; + + + if (self->info == TRANSVR_CLASS_BASE_T_1000) { + task_p = transvr_task_creat(self, + taskfunc_sfp_handle_1g_rj45, + taskfunc_post_do_nothing, + func_str); + if (!task_p) { + snprintf(err_str, sizeof(err_str), "Create task fail"); + goto err_initfunc_sfp_handle_1g_rj45; + } + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_initfunc_sfp_handle_1g_rj45: + SWPS_INFO("%s: %s :%s :%d\n", + __func__, err_str, self->swp_name, detect_cls); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +initfunc_qsfp_handle_power_mode(struct transvr_obj_s *self) { + + int err_code = EVENT_TRANSVR_EXCEP_INIT; + int power_class = DEBUG_TRANSVR_INT_VAL; + int hpmod_retry = 3; + int lpower_config = 1; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + unsigned long hpmod_delay = 500; /* msec */ + struct transvr_worker_s *task_p = NULL; + + /* Handle power mode for IOEXP */ + power_class = __qsfp_get_power_cls(self, 0); + switch (power_class) { + case 1: /* Case: Low power mode (Class = 1) */ + err_code = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (err_code < 0){ + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + return EVENT_TRANSVR_TASK_DONE; + + case 2: /* Case: High power mode (Class > 1) */ + case 3: + case 4: + case 5: + case 6: + case 7: + task_p = transvr_task_creat(self, + taskfunc_qsfp_set_hpmod, + taskfunc_post_handle_task_state, + "transvr_init_qsfp"); + if (!task_p) { + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + transvr_task_set_retry(task_p, hpmod_retry); + transvr_task_set_delay(task_p, hpmod_delay); + return EVENT_TRANSVR_TASK_WAIT; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Exception case"); + goto err_initfunc_qsfp_handle_power_mode; + +err_initfunc_qsfp_handle_power_mode: + SWPS_INFO("%s: %s :%s \n", __func__, err_msg, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +initfunc_qsfp28_handle_cdr(struct transvr_obj_s *self) { + + uint8_t DEFAULT_VAL_CDR = 0xff; + int CDR_FUNC_EXISTED = 0x3; + int show_err = 1; + int err_val = EVENT_TRANSVR_TASK_FAIL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_qsfp28_handle_cdr"; + + err_val = __qsfp_get_cdr_present(self, 0); + if ( (err_val < 0) || + (err_val == DEBUG_TRANSVR_HEX_VAL) ) { + err_msg = "detect cdr_present fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + if (err_val == CDR_FUNC_EXISTED) { + err_val = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->offset_cdr, + DEFAULT_VAL_CDR, + &(self->cdr), + func_str, + show_err); + if (err_val < 0) { + err_msg = "set CDR fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_qsfp_handle_cdr_1: + SWPS_INFO("%s: %s :%d :%s\n", + func_str, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + +/* ========== Object functions for Final State Machine ========== + */ +int +is_plugged(struct transvr_obj_s *self){ + + int limit = 63; + int present = DEBUG_TRANSVR_INT_VAL; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + struct ioexp_obj_s *ioexp_p = self->ioexp_obj_p; + + if (!ioexp_p) { + snprintf(emsg, limit, "ioexp_p is null!"); + goto err_is_plugged_1; + } + present = ioexp_p->get_present(ioexp_p, self->ioexp_virt_offset); + switch (present){ + case 0: + return 1; + case 1: + return 0; + case ERR_IOEXP_UNINIT: + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + default: + if (ioexp_p->state == STATE_IOEXP_INIT){ + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + } + break; + } + SWPS_INFO("%s: Exception case! :%d :%d\n", + __func__, present, ioexp_p->state); + return 0; + +err_is_plugged_1: + SWPS_DEBUG("%s: %s\n", __func__, emsg); + return 0; +} + + +static int +detect_transvr_type(struct transvr_obj_s* self){ + + int type = TRANSVR_TYPE_ERROR; + + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + type = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + + /* Case: 1. Wait transceiver I2C module. + * 2. Transceiver I2C module failure. + * Note: 1. SFF allow maximum transceiver initial time is 2 second. So, there + * are exist some case that we need to wait transceiver. + * For these case, we keeps status on "TRANSVR_TYPE_UNPLUGGED", than + * state machine will keep trace with it. + * 2. There exist some I2C failure case we need to handle. Such as user + * insert the failure transceiver, or any reason cause it abnormal. + */ + if (type < 0){ + switch (type) { + case -EIO: + SWPS_DEBUG("%s: %s smbus return:-5 (I/O error)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + case -ENXIO: + SWPS_DEBUG("%s: %s smbus return:-6 (No such device or address)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + default: + break; + } + SWPS_INFO("%s: %s unexpected smbus return:%d \n", + __func__, self->swp_name, type); + return TRANSVR_TYPE_ERROR; + } + /* Identify valid transceiver type */ + switch (type){ + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + break; + case TRANSVR_TYPE_UNKNOW_1: + case TRANSVR_TYPE_UNKNOW_2: + type = TRANSVR_TYPE_UNKNOW_2; + break; + default: + SWPS_DEBUG("%s: unknow type:0x%02x \n", __func__, type); + type = TRANSVR_TYPE_ERROR; + break; + } + return type; +} + + +static int +detect_transvr_state(struct transvr_obj_s *self, + int result[2]){ + /* [return] [result-0] [result-1] + * 0 STATE_TRANSVR_CONNECTED TRANSVR_TYPE_FAKE + * 0 STATE_TRANSVR_DISCONNECTED TRANSVR_TYPE_UNPLUGGED + * 0 STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * 0 STATE_TRANSVR_INIT / + * 0 STATE_TRANSVR_SWAPPED + * 0 STATE_TRANSVR_CONNECTED + * ERR_TRNASVR_BE_ISOLATED STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_I2C_CRASH STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_UNEXCPT STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_UNKNOW_1/2 + */ + result[0] = STATE_TRANSVR_UNEXCEPTED; /* For return state */ + result[1] = TRANSVR_TYPE_ERROR; /* For return type */ + + /* Case1: Fake type */ + if (self->type == TRANSVR_TYPE_FAKE){ + result[0] = STATE_TRANSVR_CONNECTED; + result[1] = TRANSVR_TYPE_FAKE; + return 0; + } + /* Case2: Transceiver unplugged */ + if (!is_plugged(self)){ + result[0] = STATE_TRANSVR_DISCONNECTED; + result[1] = TRANSVR_TYPE_UNPLUGGED; + return 0; + } + /* Case3: Transceiver be isolated */ + if (self->state == STATE_TRANSVR_ISOLATED){ + result[0] = STATE_TRANSVR_ISOLATED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case4: Transceiver plugged */ + result[1] = detect_transvr_type(self); + /* Case4.1: I2C topology crash + * Note : There are some I2C issues cause by transceiver/cables. + * We need to check topology status when user insert it. + * But in this step, we can't not ensure this is the issues + * port. So, it return the ERR_TRANSVR_I2C_CRASH, then upper + * layer will diagnostic I2C topology. + */ + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: %s detect I2C crash :%d\n", + __func__, self->swp_name, self->state); + result[0] = STATE_TRANSVR_UNEXCEPTED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_I2C_CRASH; + } + /* Case4.2: System initial not ready, + * Note : Sometime i2c channel or transceiver EEPROM will delay that will + * cause system in inconsistent state between EEPROM and IOEXP. + * In this case, SWP transceiver object keep state at LINK_DOWN + * to wait system ready. + * By the way, State Machine will handle these case. + */ + if (result[1] == TRANSVR_TYPE_UNPLUGGED){ + result[0] = STATE_TRANSVR_DISCONNECTED; + return 0; + } + /* Case4.3: Error transceiver type */ + if (result[1] == TRANSVR_TYPE_ERROR){ + result[0] = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s detect error type\n", __func__, self->swp_name); + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard!"); + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case3.3: Unknow transceiver type */ + if ((result[1] == TRANSVR_TYPE_UNKNOW_1) || + (result[1] == TRANSVR_TYPE_UNKNOW_2) ){ + result[0] = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + /* Case3.4: During initial process */ + if (self->state == STATE_TRANSVR_INIT){ + result[0] = STATE_TRANSVR_INIT; + return 0; + } + /* Case3.5: Transceiver be swapped */ + if (self->type != result[1]){ + result[0] = STATE_TRANSVR_SWAPPED; + return 0; + } + /* Case3.6: Link up state */ + result[0] = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +_sfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = _sfp_get_comp_extended(self); + + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_25G_AOC; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_25G_SR; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_25G_LR; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_25G_ER; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x0c: /* 25GBASE-CR CA-S */ + case 0x0d: /* 25GBASE-CR CA-N */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L1_25G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_10_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _sfp_get_comp_10g_eth_comp(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 10G Optical (x1) */ + if ((detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + } + if ((detect_val & 0x80) == 0x80) { /* 10000000 : 10GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_1g = 0x0b; + int upper_bound_1g = 0x1A; + int lower_bound_10g = 0x60; + int upper_bound_10g = 0x75; + int lower_bound_25g = 0xf0; + int upper_bound_25g = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 25G */ + if ((notmal_br >= lower_bound_25g) && + (notmal_br <= upper_bound_25g) ) { + return TRANSVR_CLASS_25G; + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + /* Check 1G */ + if ((notmal_br >= lower_bound_1g) && + (notmal_br <= upper_bound_1g) ) { + return TRANSVR_CLASS_1G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + int speed_br = DEBUG_TRANSVR_INT_VAL; + int speed_tmp = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + + speed_br = _sfp_detect_if_sp_by_br(self); + detect_val = _sfp_get_comp_1g_eth_comp(self); + + if (detect_val < 0) { + snprintf(err_str, sizeof(err_str), "Detect abnormal value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + } + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 1G (x1) */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 1000BASE-SX */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_SX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x02) == 0x02) { /* 00000010 : 1000BASE-LX *3 */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_LX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 1000BASE-CX */ + speed_tmp = TRANSVR_CLASS_COPPER_L1_1G; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + /* Case: 1000 Base-T (x1) */ + if ((detect_val & 0x08) == 0x08) { /* 00001000 : 1000BASE-T */ + return TRANSVR_CLASS_BASE_T_1000; + } + /* Case: 100 Base */ + if ( ((detect_val & 0x10) == 0x10) || /* 00010000 : 100BASE-LX/LX10 */ + ((detect_val & 0x20) == 0x20) || /* 00100000 : 100BASE-FX */ + ((detect_val & 0x40) == 0x40) || /* 01000000 : BASE-BX10 *3 */ + ((detect_val & 0x80) == 0x80) ){ /* 10000000 : BASE-PX *3 */ + return TRANSVR_CLASS_OPTICAL_100; + } + /* Case: ERROR */ + snprintf(err_str, sizeof(err_str), "Case:ERROR, value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + +ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g: + switch (speed_br) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_1G: + return speed_tmp; + case TRANSVR_CLASS_10G: + goto ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G; + } + +ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G: + switch (speed_tmp) { + case TRANSVR_CLASS_OPTICAL_1G_SX: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case TRANSVR_CLASS_OPTICAL_1G_LX: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case TRANSVR_CLASS_COPPER_L1_1G: + return TRANSVR_CLASS_COPPER_L1_10G; + default: + break; + } + snprintf(err_str, sizeof(err_str), "transfer_1to10 fail, speed:%d", speed_tmp); + goto err_p_sfp_detect_class_by_1g_ethernet; + +err_p_sfp_detect_class_by_1g_ethernet: + SWPS_INFO("%s: %s :%s", __func__, err_str, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int is_active = 0; + int conn_val = DEBUG_TRANSVR_INT_VAL; + int check_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _sfp_detect_if_sp_by_br(self); + conn_val = _sfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 */ + case 0x0d: /* MPO 2x16 */ + /* + * ToDo: Need verify Optical Pigtail + */ + goto ok_sfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + /* + * ToDo: Need check ACC use case + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x23: /* No separable connector */ + /* + * ToDo: Standard not clear, not all transceiver vendor + * have the same defined + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_check_active_passive: + check_val = _sfp_get_cable_tech(self); + switch(check_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_unknow; + case 0x04: /* Passive */ + goto ok_sfp_detect_class_by_feature_4_copper; + case 0x08: /* Active */ + is_active = 1; + goto ok_sfp_detect_class_by_feature_4_aoc; + default: + snprintf(err_msg, sizeof(err_msg), + "_sfp_get_cable_tech return Non define value:%d", + check_val); + break; + } + goto err_sfp_detect_class_by_feature_1; + +ok_sfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_25G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_25G_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_25G_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_25G_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_25G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + case TRANSVR_CLASS_1G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_1G_SX; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_1G_LX; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_1G_EX; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_1G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_sfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_OPTICAL_25G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_S_AOC; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_OPTICAL_1G_AOC; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_COPPER_L1_25G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L1_10G; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_COPPER_L1_1G; + default: + return TRANSVR_CLASS_COPPER; + } + +ok_sfp_detect_class_by_feature_4_unknow: + return TRANSVR_CLASS_UNSPECIFIED; + +err_sfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +sft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _sfp_detect_class_by_extend_comp(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 10G Compliance */ + detect_val = _sfp_detect_class_by_10_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 1G Compliance */ + detect_val = _sfp_detect_class_by_1g_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_BASE_T_1000: + case TRANSVR_CLASS_OPTICAL_100: + /* + * ToDo: Need Check 0.1G + */ + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_COPPER_L1_10G: + /* Transfer speed case + * => Example: Raycom 10G DAC + */ + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 1G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check by connector, br, wavelength */ + detect_val = _sfp_detect_class_by_feature(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_OPTICAL_1G: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_COPPER: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_COPPER_L1_10G: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined get_connector:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sft_detect_transceiver_class_1; + +err_sft_detect_transceiver_class_1: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_trident2_if_type_1; + +err_sfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SR); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_KR); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_tomahawk_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_tomahawk_if_type_1; + +err_sfp_set_tomahawk_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_sfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = sft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _sfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TRIDENT_3: + case BCM_CHIP_TYPE_TOMAHAWK: + return _sfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _sfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_sfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = sft_detect_transvr_class(self); + switch(detect_val) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_SP_100); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + detect_val); + goto err_sfp_detect_if_speed_1; + } + /* Check by BR */ + detect_val = _sfp_detect_if_sp_by_br(self); + switch (detect_val) { + case TRANSVR_CLASS_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + default: + break; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_detect_if_speed_1; + +err_sfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_extended(self); + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_100G_AOC; + + case 0x06: /* 100G CWDM4 */ + case 0x09: /* Obsolete (assigned before 100G CWDM4 MSA required FEC) */ + case 0x17: /* 100G CLR4 */ + case 0x1A: /* 100GE-DWDM2 */ + return TRANSVR_CLASS_OPTICAL_100G; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_100G_SR4; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_100G_LR4; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_100G_ER4; + + case 0x07: /* 100G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_100G_PSM4; + + case 0x12: /* 40G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_40G; + + case 0x11: /* 4 x 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + + case 0x10: /* 40GBASE-ER4 */ + return TRANSVR_CLASS_OPTICAL_40G_ER4; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L4_100G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_class_by_10_40_100_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_10_40_100_ethernet(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 40G Optical */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 40G Active Cable (XLPPI) */ + return TRANSVR_CLASS_OPTICAL_40G_AOC; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 40GBASE-SR4 */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + } + if ( (detect_val & 0x02) == 0x02) { /* 00000010 : 40GBASE-LR4 */ + return TRANSVR_CLASS_OPTICAL_40G_LR4; + } + if ( (detect_val & 0x08) == 0x08) { /* 00001000 : 40GBASE-CR4 */ + return TRANSVR_CLASS_COPPER_L4_40G; + } + /* Case: 10G Optical */ + if ( (detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + } + /* Case: Extend Compliance */ + if ( ((detect_val & 0x80) == 0x80) ){ /* 10000000 : Use Extend Compliance */ + return TRANSVR_CLASS_EXTEND_COMP; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_10g = 0x10; + int upper_bound_10g = 0x25; + int lower_bound_40g = 0x60; + int upper_bound_40g = 0x75; + int lower_bound_100g = 0x60; + int upper_bound_100g = 0x75; + int used_extend_br = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + int extend_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 40G */ + if ((notmal_br >= lower_bound_40g) && + (notmal_br <= upper_bound_40g) ) { + return TRANSVR_CLASS_40G; + } + /* Check 100G */ + if (notmal_br == used_extend_br) { + extend_br = (int)(self->extbr); /* updated by update_all() */ + if ((extend_br >= lower_bound_100g) && + (extend_br <= upper_bound_100g) ) { + return TRANSVR_CLASS_100G; + } + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_qsfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int conn_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _qsfp_detect_if_sp_by_br(self); + conn_val = _qsfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 (Multifiber Parallel Optic) */ + case 0x0d: /* MPO 2x16 */ + goto ok_qsfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + goto ok_qsfp_detect_class_by_feature_4_copper; + case 0x23: /* No separable connector */ + if ((_qsfp_get_comp_fc_link_length(self) > 0) || + (_qsfp_get_comp_fc_trans_tech(self) > 0) || + (_qsfp_get_comp_fc_trans_media(self) > 0) || + (_qsfp_get_comp_fc_speed(self) > 0) ) { + goto ok_qsfp_detect_class_by_feature_4_aoc; + } + goto ok_qsfp_detect_class_by_feature_4_copper; + default: + snprintf(err_msg, sizeof(err_msg), + "_qsfp_get_connector_type return Non define value:%d", + conn_val); + goto err_qsfp_detect_class_by_feature_1; + } + return TRANSVR_CLASS_UNSPECIFIED; + +ok_qsfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_100G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_100G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_100G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_100G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_100G; + + case TRANSVR_CLASS_40G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_40G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_40G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_40G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_40G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_Q_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_OPTICAL_100G_AOC; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_OPTICAL_40G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_Q_AOC; + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_COPPER_L4_100G; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_COPPER_L4_40G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L4_10G; + default: + return TRANSVR_CLASS_COPPER; + } + +err_qsfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", + __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +qsft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _qsfp_detect_class_by_extend_comp(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_COPPER_L4_100G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check 10/40G/100G Ethernet Compliance */ + detect_val = _qsfp_detect_class_by_10_40_100_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_COPPER_L4_40G: + return detect_val; + case TRANSVR_CLASS_EXTEND_COMP: + /* Format incorrect case (We already checked the Extend + * Compliance is 0 + */ + snprintf(err_msg, sizeof(err_msg), + "Transceiver format incorrect"); + goto err_qsft_detect_transvr_class_1; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10/40/100:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check by Connector type, BR and wavelength */ + detect_val = _qsfp_detect_class_by_feature(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_COPPER_L4_100G: + case TRANSVR_CLASS_COPPER_L4_40G: + case TRANSVR_CLASS_COPPER_L4_10G: + case TRANSVR_CLASS_COPPER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined connector:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), + "Can not identify!"); + goto err_qsft_detect_transvr_class_1; + +err_qsft_detect_transvr_class_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: LR4 or LR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: /* Need Check: ER4 or ER */ + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_KR4); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_qsfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = qsft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _qsfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TRIDENT_3: + case BCM_CHIP_TYPE_TOMAHAWK: + return _qsfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _qsfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 8; + char tmp_result[8] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = qsft_detect_transvr_class(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G Copper */ + case TRANSVR_CLASS_COPPER_L4_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + break; + /* Copper */ + case TRANSVR_CLASS_COPPER: + break; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined class case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Check br and extbr */ + detect_val = _qsfp_detect_if_sp_by_br(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + case TRANSVR_CLASS_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined BR case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_detect_if_speed_1; + +err_qsfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_common_set_lane_map_str(struct transvr_obj_s* self, + char *result) { + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + char err_msg[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_L_STR); + snprintf(result, LEN_TRANSVR_L_STR, "%s=", TRANSVR_UEVENT_KEY_LANE); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + if (tmp_val > 256) { + snprintf(err_msg, sizeof(err_msg), + "detect abnormal value:%d", tmp_val); + goto err_common_set_lane_map_str_1; + } + memset(tmp_str, 0, sizeof(tmp_str)); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_L_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_L_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_L_STR); + } + if (i == 0) { + goto err_common_set_lane_map_str_2; + } + return 0; + +err_common_set_lane_map_str_1: + SWPS_INFO("%s: %s", __func__, err_msg); +err_common_set_lane_map_str_2: + snprintf(result, LEN_TRANSVR_L_STR, "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_common_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action, + int (*detect_if_type)(struct transvr_obj_s *self, char *result), + int (*detect_if_speed)(struct transvr_obj_s *self, char *result), + int send_anyway) { + + char *uevent_envp[4]; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + char tmp_str[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_1[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_2[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_3[64] = DEBUG_TRANSVR_STR_VAL; + + if (TRANSVR_UEVENT_ENABLE != 1) { + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_get_if_lane(self, tmp_str) < 0) { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + } else { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, tmp_str); + } + switch (u_action) { + case KOBJ_ADD: + /* Detect type */ + if (detect_if_type(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface type fail!"); + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, tmp_str); + uevent_envp[0] = tmp_str_1; + /* Detect speed */ + if (detect_if_speed(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface speed fail!"); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, tmp_str); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + case KOBJ_REMOVE: + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + default: + snprintf(err_msg, sizeof(err_msg), "kobject_action:%d not support", u_action); + goto private_common_send_uevent_4_fail; + } + snprintf(err_msg, sizeof(err_msg), "%s", "Exception case"); + goto private_common_send_uevent_4_fail; + +private_common_send_uevent_4_fail: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + if (send_anyway) { + goto private_common_send_uevent_4_send; + } + return ERR_TRANSVR_UEVENT_FAIL; + +private_common_send_uevent_4_send: + return kobject_uevent_env(&(self->transvr_dev_p->kobj), + u_action, + uevent_envp); +} + +int +sfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_sfp_detect_if_type, + &_sfp_detect_if_speed, + send_anyway); +} + + +int +qsfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_qsfp_detect_if_type, + &_qsfp_detect_if_speed, + send_anyway); +} + + +int +fake_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + + int err; + int detect_result[2]; + int current_state = STATE_TRANSVR_UNEXCEPTED; + int current_type = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_NEW) { + if (_transvr_init_handler(self) < 0){ + return ERR_TRANSVR_INIT_FAIL; + } + } + err = detect_transvr_state(self, detect_result); + if (err < 0) { + return err; + } + /* In Direct mode, driver only detect transceiver when user call driver interface + * which on sysfs. So it only need consider the state of Transceiver. + */ + current_state = detect_result[0]; + current_type = detect_result[1]; + + switch (current_state){ + + case STATE_TRANSVR_DISCONNECTED: /* Transceiver is not plugged */ + self->state = current_state; + self->type = current_type; + return ERR_TRANSVR_UNPLUGGED; + + case STATE_TRANSVR_INIT: /* Transceiver is plugged, system not ready */ + return ERR_TRANSVR_UNINIT; + + case STATE_TRANSVR_ISOLATED: /* Transceiver is plugged, but has some issues */ + return ERR_TRNASVR_BE_ISOLATED; + + case STATE_TRANSVR_CONNECTED: /* Transceiver is plugged, system is ready */ + self->state = current_state; + self->type = current_type; + return 0; + + case STATE_TRANSVR_SWAPPED: /* Transceiver is plugged, system detect user changed */ + self->type = current_type; + if (reload_transvr_obj(self, current_type) < 0){ + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + self->state = current_state; + return 0; + + case STATE_TRANSVR_UNEXCEPTED: /* Transceiver type or state is unexpected case */ + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_UNEXCPT; + + default: + SWPS_INFO("%s: state:%d not in define.\n", __func__, current_state); + break; + } + return ERR_TRANSVR_UNEXCPT; +} + + +static int +_is_except_happened_4_pmode(struct transvr_obj_s* self, + int new_state) { + + int event_chk = 0; + + if (self->temp == 0){ + return 0; + } + switch (new_state) { + case STATE_TRANSVR_INIT: + event_chk = EVENT_TRANSVR_EXCEP_INIT; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_CONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_UP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_DISCONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_DOWN; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_SWAPPED: + event_chk = EVENT_TRANSVR_EXCEP_SWAP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_UNEXCEPTED: + event_chk = EVENT_TRANSVR_EXCEP_EXCEP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_ISOLATED: + event_chk = EVENT_TRANSVR_EXCEP_ISOLATED; + goto check_event_happened_4_pmode; + + default: + SWPS_INFO("%s: unexcepted case:%d\n", __func__, new_state); + break; + } + return 0; + +check_event_happened_4_pmode: + if (self->temp == event_chk){ + return 1; + } + return 0; +} + + +int +common_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + /* [Return Value]: + * ERR_TRANSVR_UNINIT : (1) Initial not ready + * ERR_TRANSVR_UNPLUGGED : (1) Any -> Down + * ERR_TRANSVR_TASK_BUSY : (1) Wait Initial task + * ERR_TRANSVR_UNEXCPT : (1) Initial fail + * (2) Task fail + * (3) Reload fail + * ERR_TRNASVR_BE_ISOLATED : (1) Already be isolated + * OK Case (return 0) : (1) action_4_connected + * (2) action_4_nothing (initial retry) + */ + int curr_state[2]; + int old_state = self->state; + int old_type = self->type; + int new_state = STATE_TRANSVR_UNEXCEPTED; + int new_type = TRANSVR_TYPE_ERROR; + int return_val = ERR_TRANSVR_UNEXCPT; + + /* Never initial */ + if (self->state == STATE_TRANSVR_NEW) { + goto comfsm_action_4_reinit_obj; + } + /* Detect current state */ + switch (detect_transvr_state(self, curr_state)) { + case 0: + new_state = curr_state[0]; + new_type = curr_state[1]; + break; + + case ERR_TRNASVR_BE_ISOLATED: + new_state = STATE_TRANSVR_ISOLATED; + new_type = old_type; + break; + + case ERR_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case ERR_TRANSVR_UNEXCPT: + default: + new_state = STATE_TRANSVR_UNEXCEPTED; + new_type = old_type; + } + /* State handling */ + switch (old_state) { + case STATE_TRANSVR_INIT: /* INIT -> */ + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 1-1: UP -> INIT */ + SWPS_INFO("Detect %s is present. :1-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 1-2: UP -> UP */ + return_val = 0; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 1-3: UP -> DOWN */ + SWPS_INFO("Detect %s is removed. :1-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 1-4: UP -> SWAP */ + SWPS_INFO("Detect %s is swapped. :1-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 1-5: UP -> UNEXPET */ + SWPS_INFO("Detect %s has error. :1-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 1-6: UP -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :1-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_DISCONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 2-1: DOWN -> INIT */ + SWPS_INFO("Detect %s is present. :2-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 2-2: DOWN -> UP */ + SWPS_INFO("Detect %s is present. :2-2\n",self->swp_name); + goto comfsm_action_4_reinit_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 2-3: DOWN -> DOWN */ + return_val = ERR_TRANSVR_UNPLUGGED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_SWAPPED: /* Case 2-4: DOWN -> SWAP */ + SWPS_INFO("Detect %s is swapped. :2-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 2-5: DOWN -> UNEXPET */ + SWPS_INFO("Detect %s has error. :2-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 2-6: DOWN -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :2-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_UNEXCEPTED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 3-1: UNEXPET -> INIT */ + SWPS_INFO("Detect %s is present. :3-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 3-2: UNEXPET -> UP */ + SWPS_INFO("Detect %s is present. :3-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 3-3: UNEXPET -> DOWN */ + SWPS_INFO("Detect %s is removed. :3-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 3-4: UNEXPET -> SWAP */ + SWPS_INFO("Detect %s is swapped. :3-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 3-5: UNEXPET -> UNEXPET */ + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRANSVR_UNEXCPT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 3-6: UNEXPET -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :3-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 4-1: ISOLATE -> INIT */ + SWPS_INFO("Detect %s internal error. :4-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 4-2: ISOLATE -> UP */ + SWPS_INFO("Detect %s internal error. :4-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 4-3: ISOLATE -> DOWN */ + SWPS_INFO("Detect %s is removed. :4-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 4-4: ISOLATE -> SWAP */ + SWPS_INFO("Detect %s internal error. :4-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 4-5: ISOLATE -> UNEXPET */ + SWPS_INFO("Detect %s internal error. :4-5\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 4-6: ISOLATE -> ISOLATE */ + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + default: + break; + } + goto comfsm_action_4_unexpected; + + default: + break; + } + goto comfsm_action_4_unexpected; + + +comfsm_action_4_keep_state: + return return_val; + +comfsm_action_4_reinit_obj: + SWPS_DEBUG("FSM action: %s re-initial.\n", self->swp_name); + return_val = _transvr_init_handler(self); + goto comfsm_action_4_identify_event; + +comfsm_action_4_reload_obj: + SWPS_DEBUG("FSM action: %s reload.\n", self->swp_name); + self->type = new_type; + return_val = reload_transvr_obj(self, new_type); + goto comfsm_action_4_identify_event; + +comfsm_action_4_identify_event: + switch (return_val) { + case EVENT_TRANSVR_INIT_UP: + case EVENT_TRANSVR_TASK_DONE: + goto comfsm_action_4_connected; + + case EVENT_TRANSVR_INIT_DOWN: + goto comfsm_action_4_disconnected; + + case EVENT_TRANSVR_INIT_REINIT: + goto comfsm_action_4_nothing; + + case EVENT_TRANSVR_TASK_WAIT: + self->state = STATE_TRANSVR_INIT; + return ERR_TRANSVR_TASK_BUSY; + + case EVENT_TRANSVR_TASK_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_TASK_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_INIT_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_INIT_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_RELOAD_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_RELOAD_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case EVENT_TRANSVR_EXCEP_ISOLATED: + goto comfsm_action_4_isolate_obj; + + default: + SWPS_INFO("%s detect undefined event:%d.\n", self->swp_name, return_val); + goto comfsm_action_4_unexpected; + } + +comfsm_action_4_nothing: + SWPS_DEBUG("FSM action: %s do nothing.\n", self->swp_name); + return 0; + +comfsm_action_4_connected: + SWPS_DEBUG("FSM action: %s Connected.\n", self->swp_name); + self->state = STATE_TRANSVR_CONNECTED; + self->type = new_type; + self->send_uevent(self, KOBJ_ADD); + _transvr_clean_retry(self); + return 0; + +comfsm_action_4_disconnected: + SWPS_DEBUG("FSM action: %s Disconnected. \n", self->swp_name); + self->state = STATE_TRANSVR_DISCONNECTED; + self->temp = EVENT_TRANSVR_TASK_DONE; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_retry(self); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNPLUGGED; + +comfsm_action_4_report_i2c_crash: + SWPS_DEBUG("FSM action: %s report I2C crash.\n", self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_I2C_CRASH; + +comfsm_action_4_isolate_obj: + SWPS_DEBUG("FSM action: %s isolate.\n", self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return ERR_TRNASVR_BE_ISOLATED; + +comfsm_action_4_unexpected: + SWPS_INFO("FSM action: %s unexpected.\n", self->swp_name); + SWPS_INFO("Dump: :%d :0x%02x :%d :0x%02x\n", + old_state, old_type, new_state, new_type); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNEXCPT; +} + + +int +fake_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +int +fake_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +/* ========== Object functions for Initial procedure ========== + */ +int +transvr_init_common(struct transvr_obj_s *self){ + /* Nothing to update */ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_fake(struct transvr_obj_s *self){ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_sfp(struct transvr_obj_s *self){ + + int tmp_val = DEBUG_TRANSVR_INT_VAL; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_msg = "ERR"; + + self->info = sft_detect_transvr_class(self); + /* Disable auto_config */ + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + /* Handle multi-rate */ + err_code = initfunc_sfp_handle_multi_rate_mode(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_multi_rate_mode fail!"; + goto err_transvr_init_sfp_1; + } + /* Handle 1G- RJ45 */ + tmp_val = err_code; + err_code = initfunc_sfp_handle_1g_rj45(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_1g_rj45 fail!"; + goto err_transvr_init_sfp_1; + } + tmp_val = (tmp_val > err_code ? tmp_val : err_code); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_sfp_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_code, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp(struct transvr_obj_s *self){ + + int err = EVENT_TRANSVR_EXCEP_EXCEP; + char *emsg = "ERR"; + + self->info = qsft_detect_transvr_class(self); + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + err = initfunc_qsfp_handle_power_mode(self); + if (err < 0){ + emsg = "initfunc_qsfp_handle_tx_disable fail!"; + goto err_transvr_init_qsfp; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, emsg, err, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp28(struct transvr_obj_s *self){ + + int tmp_val = EVENT_TRANSVR_EXCEP_EXCEP; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_msg = "ERR"; + + /* Handle QSFP common */ + err_val = transvr_init_qsfp(self); + if (err_val < 0){ + err_msg = "transvr_init_qsfp fail!"; + goto err_transvr_init_qsfp28_1; + } + /* Disable auto_config */ + if (!self->auto_config) { + return err_val; + } + /* Handle CDR */ + tmp_val = err_val; + err_val = initfunc_qsfp28_handle_cdr(self); + if (err_val < 0){ + err_msg = "Handle CDR fail!"; + goto err_transvr_init_qsfp28_1; + } + tmp_val = (tmp_val > err_val ? tmp_val : err_val); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp28_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object Initial handler ========== + */ +static int +_is_transvr_valid(struct transvr_obj_s *self, + int type, + int state) { + /* [Return] + * 0 : OK, inserted + * EVENT_TRANSVR_INIT_DOWN : OK, removed + * EVENT_TRANSVR_INIT_FAIL : Outside error, type doesn't supported + * EVENT_TRANSVR_EXCEP_INIT : Internal error, state undefined + */ + switch (type) { + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + break; + default: + SWPS_INFO("detect undefined type:0x%02x on %s\n", + type, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; + } + switch (state) { + case STATE_TRANSVR_DISCONNECTED: + return EVENT_TRANSVR_INIT_DOWN; + case STATE_TRANSVR_INIT: + case STATE_TRANSVR_CONNECTED: + case STATE_TRANSVR_SWAPPED: + break; + default: + SWPS_INFO("detect undefined state:%d on %s\n", + state, self->swp_name); + return EVENT_TRANSVR_EXCEP_INIT; + } + return 0; +} + + +static int +_is_transvr_hw_ready(struct transvr_obj_s *self, + int type){ + /* [Return] + * EVENT_TRANSVR_TASK_DONE : Ready + * EVENT_TRANSVR_TASK_WAIT : Not ready + * EVENT_TRANSVR_INIT_FAIL : Error + */ + int addr = DEBUG_TRANSVR_INT_VAL; + int page = DEBUG_TRANSVR_INT_VAL; + int offs = DEBUG_TRANSVR_INT_VAL; + int bit = DEBUG_TRANSVR_INT_VAL; + int ready = DEBUG_TRANSVR_INT_VAL; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t ab_val = DEBUG_TRANSVR_HEX_VAL; + + switch (type) { + case TRANSVR_TYPE_SFP: + addr = VAL_TRANSVR_8472_READY_ADDR; + page = VAL_TRANSVR_8472_READY_PAGE; + offs = VAL_TRANSVR_8472_READY_OFFSET; + bit = VAL_TRANSVR_8472_READY_BIT; + ready = VAL_TRANSVR_8472_READY_VALUE; + ab_val = VAL_TRANSVR_8472_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + addr = VAL_TRANSVR_8436_READY_ADDR; + page = VAL_TRANSVR_8436_READY_PAGE; + offs = VAL_TRANSVR_8436_READY_OFFSET; + bit = VAL_TRANSVR_8436_READY_BIT; + ready = VAL_TRANSVR_8436_READY_VALUE; + ab_val = VAL_TRANSVR_8436_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + return EVENT_TRANSVR_TASK_DONE; + + default: + emsg = "unexpected case"; + goto err_is_transvr_hw_ready; + } + /* Select target page */ + err = _common_setup_page(self, addr, page, offs, 1, 0); + if (err < 0) { + emsg = "setup page fail"; + goto err_is_transvr_hw_ready; + } + /* Check feature supported + * [Note] + * Some of transceiver/cables doesn't support "Status Indicators" + * (ex:DAC, RJ45 copper SFP ...etc). In these case, we bypass the + * step of checking Status Indicators, then state machine will take + * the following handle procedure. + */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (err < 0) { + emsg = "doesn't support Status Indicators"; + goto bypass_is_transvr_hw_ready; + } + /* Filter abnormal case */ + if (err == ab_val) { + emsg = "detect using unusual definition."; + goto bypass_is_transvr_hw_ready; + } + /* Get Status Indicators */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, offs); + if (err < 0) { + emsg = "detect current value fail"; + goto err_is_transvr_hw_ready; + } + if ((err & (1<:%d\n", __func__, emsg, type); + return EVENT_TRANSVR_TASK_DONE; + +err_is_transvr_hw_ready: + SWPS_DEBUG("%s: %s :%d\n", __func__, emsg, type); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self) { + + switch (self->info) { + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return 1; + default: + break; + } + return 0; +} + + +static int +_transvr_init_handler(struct transvr_obj_s *self){ + + int detect[2]; + int d_state = STATE_TRANSVR_UNEXCEPTED; + int d_type = TRANSVR_TYPE_ERROR; + int result = ERR_TRANSVR_UNINIT; + int retry = 6; /* (6+1) x 0.3 = 2.1s > spec:2.0s */ + int elimit = 63; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Clean and check callback */ + self->state = STATE_TRANSVR_INIT; + if (self->init == NULL) { + snprintf(emsg, elimit, "init() is null"); + goto initer_err_case_unexcept_0; + } + if (self->clean == NULL) { + snprintf(emsg, elimit, "clean() is null"); + goto initer_err_case_unexcept_0; + } + self->clean(self); + + /* Detect transceiver information */ + result = detect_transvr_state(self, detect); + if (result < 0) { + snprintf(emsg, elimit, "detect_transvr_state() fail"); + switch (result) { + case ERR_TRANSVR_I2C_CRASH: + goto initer_err_case_i2c_ceash; + case ERR_TRNASVR_BE_ISOLATED: + goto initer_err_case_be_isolated; + + case ERR_TRANSVR_UNEXCPT: + default: + break; + } + goto initer_err_case_retry_1; + } + d_state = detect[0]; + d_type = detect[1]; + + /* Verify transceiver type and state */ + switch (_is_transvr_valid(self, d_type, d_state)) { + case 0: + break; + case EVENT_TRANSVR_INIT_DOWN: + goto initer_ok_case_down;; + case EVENT_TRANSVR_INIT_FAIL: + snprintf(emsg, elimit, "transceiver type doesn't support"); + goto initer_err_case_alarm_to_user; + case EVENT_TRANSVR_EXCEP_INIT: + default: + goto initer_err_case_unexcept_1; + } + + /* Handle reload case */ + if (self->type != d_type){ + /* This is the protect mechanism. Normally, This case will not happen. + * When State machine detect swap event during initial, It will trigger + * reload function to ensure type correct. */ + if (_reload_transvr_obj(self, d_type) < 0){ + snprintf(emsg, elimit, "reload object fail"); + goto initer_err_case_unexcept_1; + } + } + + /* Check transceiver HW initial ready */ + switch (_is_transvr_hw_ready(self, d_type)) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_err_case_retry_1; + case EVENT_TRANSVR_INIT_FAIL: + default: + goto initer_err_case_unexcept_1; + } + + /* Try to update all and check */ + if (self->update_all(self, 1) < 0){ + /* For some transceiver, EEPROME has lag issues during initial stage. + * In this case, we set status back to STATE_TRANSVR_NEW, than it will + * be checked in next polling cycle. */ + goto initer_err_case_retry_1; + } + + /* Execute init() call back */ + result = self->init(self); + switch (result) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_ok_case_wait; + + default: + snprintf(emsg, elimit, "undefined init() return:%d\n", result); + goto initer_err_case_unexcept_1; + } + goto initer_ok_case_up; + + +initer_ok_case_wait: + self->dump_all(self); + return EVENT_TRANSVR_TASK_WAIT; + +initer_ok_case_up: + self->state = STATE_TRANSVR_CONNECTED; + self->temp = 0; + self->dump_all(self); + return EVENT_TRANSVR_INIT_UP; + +initer_ok_case_down: + self->temp = 0; + self->state = STATE_TRANSVR_DISCONNECTED; + return EVENT_TRANSVR_INIT_DOWN; + +initer_err_case_i2c_ceash: + SWPS_DEBUG("%s: %s :%s :I2C crash\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_I2C_CRASH; + +initer_err_case_be_isolated: + SWPS_DEBUG("%s: %s :%s :isolated\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return EVENT_TRANSVR_EXCEP_ISOLATED; + +initer_err_case_retry_1: + SWPS_DEBUG("%s: %s :%s :retry\n", + __func__, emsg, self->swp_name); + if (_transvr_handle_retry(self, retry) == 0) { + self->state = STATE_TRANSVR_NEW; + return EVENT_TRANSVR_INIT_REINIT; + } + goto initer_err_case_alarm_to_user; + +initer_err_case_unexcept_1: + self->clean(self); +initer_err_case_unexcept_0: + self->state = STATE_TRANSVR_UNEXCEPTED; + if (_is_except_happened_4_pmode(self, d_state) && + (self->mode == TRANSVR_MODE_POLLING) ){ + SWPS_INFO("%s: %s :%s\n", __func__, emsg, self->swp_name); + SWPS_INFO("Dump: :%d :%d :%d :%d\n", + self->state, self->type, d_state, d_type); + } + return EVENT_TRANSVR_INIT_FAIL; + +initer_err_case_alarm_to_user: + SWPS_DEBUG("%s: %s :%s :alarm_to_user\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard"); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object functions for Clean procedure ========== + */ +int +_transvr_clean_handler(struct transvr_obj_s *self){ + + int retval = DEBUG_TRANSVR_INT_VAL; + + if (!self->clean) { + SWPS_ERR("%s: %s clean() is NULL.\n", + __func__, self->swp_name); + return EVENT_TRANSVR_TASK_FAIL; + } + retval = self->clean(self); + if (retval != EVENT_TRANSVR_TASK_DONE){ + SWPS_ERR("%s: %s clean() fail. [ERR]:%d\n", + __func__, self->swp_name, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_transvr_clean(struct transvr_obj_s *self){ + + transvr_task_free_all(self); + transvr_cache_free_all(self); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +qsfp_transvr_clean(struct transvr_obj_s *self){ + + int retval; + int lpower_config = 1; + + retval = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (retval < 0){ + SWPS_ERR("%s: Set lpmod fail! :%d\n", + __func__, retval); + return retval; + } + retval = common_transvr_clean(self); + if (retval < 0){ + SWPS_ERR("%s: common_transvr_clean fail! :%d\n", + __func__, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +fake_transvr_clean(struct transvr_obj_s *self){ + + return EVENT_TRANSVR_TASK_DONE; +} + + +/* ========== Object functions for check and update ========== + */ +int +common_transvr_check(struct transvr_obj_s *self){ + + char fun_str[32] = "common_transvr_check"; + + if (self->mode != TRANSVR_MODE_POLLING) { + SWPS_ERR("%s: mode:%d is not TRANSVR_MODE_POLLING\n", + fun_str, self->mode); + return ERR_TRANSVR_UNEXCPT; + } + /* Trigger delay task */ + transvr_task_run_all(self); + /* Trigger state machine to check and update */ + return self->fsm_4_polling(self, fun_str); +} + + +int +fake_transvr_check(struct transvr_obj_s *self){ + return 0; +} + + +/* ========== Functions for Factory pattern ========== + */ +static int +setup_transvr_public_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = unsupported_get_func; + self->get_br = common_get_br; + self->get_len_sm = sfp_get_len_sm; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = sfp_get_comp_eth_1; + self->get_comp_eth_10 = sfp_get_comp_eth_10; + self->get_comp_eth_10_40 = unsupported_get_func; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = sfp_get_rate_id; + self->get_soft_rs0 = sfp_get_soft_rs0; + self->get_soft_rs1 = sfp_get_soft_rs1; + self->get_info = common_get_info; + self->get_if_type = sfp_get_if_type; + self->get_if_speed = sfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = sfp_get_transvr_temp; + self->get_curr_vol = sfp_get_transvr_voltage; + self->get_soft_rx_los = unsupported_get_func2; + self->get_soft_tx_disable = unsupported_get_func2; + self->get_soft_tx_fault = unsupported_get_func2; + self->get_auto_tx_disable = unsupported_get_func2; + self->get_tx_bias = sfp_get_transvr_tx_bias; + self->get_tx_power = sfp_get_transvr_tx_power; + self->get_rx_power = sfp_get_transvr_rx_power; + self->get_tx_eq = sfp_get_transvr_tx_eq; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = sfp_get_transvr_rx_em; + self->get_wavelength = sfp_get_wavelength; + self->get_extphy_offset = sfp_get_1g_rj45_extphy_offset; + self->get_extphy_reg = sfp_get_1g_rj45_extphy_reg; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = sfp_set_soft_rs0; + self->set_soft_rs1 = sfp_set_soft_rs1; + self->set_soft_tx_disable = unsupported_set_func; + self->set_auto_tx_disable = unsupported_set_func; + self->set_tx_eq = sfp_set_tx_eq; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = sfp_set_rx_em; + self->set_extphy_offset = sfp_set_1g_rj45_extphy_offset; + self->set_extphy_reg = sfp_set_1g_rj45_extphy_reg; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = unsupported_get_func2; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = unsupported_get_func2; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = unsupported_set_func; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = unsupported_set_func; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = qsfp_get_cdr; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = qsfp_get_transvr_tx_eq; + self->get_rx_am = qsfp_get_transvr_rx_am; + self->get_rx_em = qsfp_get_transvr_rx_em; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->set_cdr = qsfp_set_cdr; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = qsfp_set_tx_eq; + self->set_rx_am = qsfp_set_rx_am; + self->set_rx_em = qsfp_set_rx_em; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_FAKE: + self->get_id = fake_get_hex; + self->get_ext_id = fake_get_hex; + self->get_connector = fake_get_hex; + self->get_vendor_name = fake_get_str; + self->get_vendor_pn = fake_get_str; + self->get_vendor_rev = fake_get_str; + self->get_vendor_sn = fake_get_str; + self->get_power_cls = fake_get_int; + self->get_br = fake_get_hex; + self->get_len_sm = fake_get_int; + self->get_len_smf = fake_get_int; + self->get_len_om1 = fake_get_int; + self->get_len_om2 = fake_get_int; + self->get_len_om3 = fake_get_int; + self->get_len_om4 = fake_get_int; + self->get_comp_rev = fake_get_hex; + self->get_comp_eth_1 = fake_get_hex; + self->get_comp_eth_10 = fake_get_hex; + self->get_comp_eth_10_40 = fake_get_hex; + self->get_comp_extend = fake_get_hex; + self->get_cdr = fake_get_hex; + self->get_rate_id = fake_get_hex; + self->get_soft_rs0 = fake_get_binary; + self->get_soft_rs1 = fake_get_binary; + self->get_info = fake_get_int; + self->get_if_type = fake_get_str; + self->get_if_speed = fake_get_str; + self->get_if_lane = fake_get_str; + self->get_curr_temp = fake_get_str; + self->get_curr_vol = fake_get_str; + self->get_soft_rx_los = fake_get_str; + self->get_soft_tx_disable = fake_get_str; + self->get_soft_tx_fault = fake_get_str; + self->get_auto_tx_disable = fake_get_str; + self->get_tx_bias = fake_get_str; + self->get_tx_power = fake_get_str; + self->get_rx_power = fake_get_str; + self->get_tx_eq = fake_get_str; + self->get_rx_am = fake_get_str; + self->get_rx_em = fake_get_str; + self->get_wavelength = fake_get_str; + self->get_extphy_offset = fake_get_str; + self->get_extphy_reg = fake_get_str; + self->set_cdr = fake_set_hex; + self->set_soft_rs0 = fake_set_int; + self->set_soft_rs1 = fake_set_int; + self->set_soft_tx_disable = fake_set_int; + self->set_auto_tx_disable = fake_set_int; + self->set_tx_eq = fake_set_int; + self->set_rx_am = fake_set_int; + self->set_rx_em = fake_set_int; + self->set_extphy_offset = fake_set_hex; + self->set_extphy_reg = fake_set_hex; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_transvr_private_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->init = transvr_init_sfp; + self->clean = common_transvr_clean; + self->check = common_transvr_check; + self->update_all = _sfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = sfp_send_uevent; + self->dump_all = sfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->init = transvr_init_qsfp; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->init = transvr_init_qsfp28; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_FAKE: + self->init = transvr_init_fake; + self->clean = fake_transvr_clean; + self->check = fake_transvr_check; + self->update_all = fake_transvr_update; + self->fsm_4_direct = fake_fsm_4_direct_mode; + self->fsm_4_polling = fake_fsm_4_polling_mode; + self->send_uevent = fake_send_uevent; + self->dump_all = fake_transvr_dump; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static struct eeprom_map_s * +get_eeprom_map(int transvr_type){ + + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + return &eeprom_map_sfp; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + return &eeprom_map_qsfp; + case TRANSVR_TYPE_QSFP_28: + return &eeprom_map_qsfp28; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return NULL; +} + + +static int +setup_transvr_ssize_attr(char *swp_name, + struct transvr_obj_s *self, + struct eeprom_map_s *map_p, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int chan_id, + int run_mode){ + switch (run_mode){ + case TRANSVR_MODE_DIRECT: /* Direct access device mode */ + case TRANSVR_MODE_POLLING: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = DEBUG_TRANSVR_INT_VAL; + return -1; + } + self->eeprom_map_p = map_p; + self->ioexp_obj_p = ioexp_obj_p; + self->ioexp_virt_offset = ioexp_virt_offset; + self->chan_id = chan_id; + self->layout = transvr_type; + self->type = transvr_type; + self->chipset_type = chipset_type; + self->state = STATE_TRANSVR_NEW; + self->info = STATE_TRANSVR_NEW; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + strncpy(self->swp_name, swp_name, 32); + mutex_init(&self->lock); + return 0; +} + + +static int +setup_transvr_dsize_attr(struct transvr_obj_s *self){ + + char *emsg = DEBUG_TRANSVR_STR_VAL; + + self->vendor_name = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_name){ + emsg = "vendor_name"; + goto err_setup_d_attr; + } + self->vendor_pn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_pn){ + emsg = "vendor_pn"; + goto err_setup_d_attr; + } + self->vendor_rev = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_rev){ + emsg = "vendor_rev"; + goto err_setup_d_attr; + } + self->vendor_sn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_sn){ + emsg = "vendor_sn"; + goto err_setup_d_attr; + } + self->worker_p = NULL; + return 0; + +err_setup_d_attr: + SWPS_ERR("%s: %s kzalloc fail!", __func__, emsg); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_i2c_client(struct transvr_obj_s *self){ + + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + adap = i2c_get_adapter(self->chan_id); + if(!adap){ + snprintf(err_msg, sizeof(err_msg), + "can not get adap:%d", self->chan_id); + goto err_setup_i2c_client; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + snprintf(err_msg, sizeof(err_msg), + "can not kzalloc client:%d", self->chan_id); + goto err_setup_i2c_client; + } + client->adapter = adap; + self->i2c_client_p = client; + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return ERR_TRANSVR_UNEXCPT; +} + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode){ + + struct transvr_obj_s *result_p; + struct eeprom_map_s *map_p; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Allocate transceiver object */ + map_p = get_eeprom_map(transvr_type); + if (!map_p){ + snprintf(err_msg, sizeof(err_msg), + "Invalid transvr_type:%d", transvr_type); + goto err_create_transvr_fail; + } + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_create_transvr_fail; + } + /* Prepare static size attributes */ + if (setup_transvr_ssize_attr(swp_name, + result_p, + map_p, + ioexp_obj_p, + ioexp_virt_offset, + transvr_type, + chipset_type, + chan_id, + run_mode) < 0){ + goto err_create_transvr_sattr_fail; + } + /* Prepare dynamic size attributes */ + if (setup_transvr_dsize_attr(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_public_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_private_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare i2c client object */ + if (setup_i2c_client(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + return result_p; + +err_create_transvr_dattr_fail: + kfree(result_p->vendor_sn); + kfree(result_p->vendor_rev); + kfree(result_p->vendor_pn); + kfree(result_p->vendor_name); +err_create_transvr_sattr_fail: + kfree(result_p); +err_create_transvr_fail: + SWPS_ERR("%s: %s :%d :%d :%d\n", + __func__, err_msg, chan_id, ioexp_virt_offset, transvr_type); + return NULL; +} + + +static int +_reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + struct eeprom_map_s *new_map_p; + struct eeprom_map_s *old_map_p = self->eeprom_map_p; + struct i2c_client *old_i2c_p = self->i2c_client_p; + int old_type = self->type; + + /* Change state to STATE_TRANSVR_INIT */ + self->state = STATE_TRANSVR_INIT; + self->type = new_type; + /* Replace EEPROME map */ + new_map_p = get_eeprom_map(new_type); + if (!new_map_p){ + goto err_private_reload_func_1; + } + self->eeprom_map_p = new_map_p; + /* Reload i2c client */ + if (setup_i2c_client(self) < 0){ + goto err_private_reload_func_2; + } + /* Replace call back functions */ + if (setup_transvr_public_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + if (setup_transvr_private_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + kfree(old_i2c_p); + return 0; + +err_private_reload_func_3: + SWPS_INFO("%s: init() fail!\n", __func__); + kfree(old_i2c_p); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return -2; + +err_private_reload_func_2: + self->eeprom_map_p = old_map_p; + self->i2c_client_p = old_i2c_p; +err_private_reload_func_1: + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = old_type; + SWPS_INFO("%s fail! :0x%02x\n", __func__, new_type); + return -1; +} + + +static int +reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + int result_val = ERR_TRANSVR_UNEXCPT; + + /* Reload phase */ + result_val = _reload_transvr_obj(self, new_type); + if (result_val < 0){ + SWPS_INFO("%s: reload phase fail! :%d\n", + __func__, result_val); + return EVENT_TRANSVR_RELOAD_FAIL; + } + /* Initial phase */ + result_val = _transvr_init_handler(self); + if (result_val < 0){ + SWPS_INFO("%s: initial phase fail! :%d\n", + __func__, result_val); + } + return result_val; +} + + +int +isolate_transvr_obj(struct transvr_obj_s *self) { + + self->state = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s be isolated\n", __func__, self->swp_name); + return 0; +} + + +int +resync_channel_tier_2(struct transvr_obj_s *self) { + + int val = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_ISOLATED) { + return 0; + } + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + val = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (val < 0) { + return -1; + } + return 0; +} + + +/* ----------------------------------------- + * ToDo List + * ----------------------------------------- + * 1. _sfp_detect_class_by_feature() + * => Need check ACC use case. + * 2. _sfp_detect_class_by_1g_ethernet() + * => Need check 0.1G use case. + * 3. Loopback transceiver use case. + * => Less much data + * 4. _qsfp_detect_class_by_extend_comp() + * => Verify 100G CWDM4 + * => Verify Obsolete (assigned before 100G CWDM4 MSA required FEC) + * => Verify 100G CLR4 + * => Verify 100GE-DWDM2 + * => Verify 40G PSM4 Parallel SMF + * => Verify 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. + * => Verify 100G ACC or 25GAUI C2M ACC. + * => Verify 25GBASE-LR + * => Verify 40G Active Cable (XLPPI) + */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/transceiver.h b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/transceiver.h new file mode 100644 index 00000000000..f17b7fde71b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/modules/transceiver.h @@ -0,0 +1,815 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef TRANSCEIVER_H +#define TRANSCEIVER_H + +#include + +/* advanced features control */ +#define TRANSVR_INFO_DUMP_ENABLE (1) +#define TRANSVR_INFO_CACHE_ENABLE (1) +#define TRANSVR_UEVENT_ENABLE (1) + +/* Transceiver type define */ +#define TRANSVR_TYPE_UNKNOW_1 (0x00) +#define TRANSVR_TYPE_UNKNOW_2 (0xff) +#define TRANSVR_TYPE_SFP (0x03) /* Define for SFP, SFP+, SFP28 */ +#define TRANSVR_TYPE_QSFP (0x0c) +#define TRANSVR_TYPE_QSFP_PLUS (0x0d) +#define TRANSVR_TYPE_QSFP_28 (0x11) +#define TRANSVR_TYPE_UNPLUGGED (0xfa) /* Define for ERROR handle */ +#define TRANSVR_TYPE_FAKE (0xfc) /* Define for ERROR handle */ +#define TRANSVR_TYPE_INCONSISTENT (0xfd) /* Define for ERROR handle */ +#define TRANSVR_TYPE_ERROR (0xfe) /* Define for ERROR handle */ + +/* Transceiver class for base info */ +#define TRANSVR_CLASS_UNSPECIFIED (0) +#define TRANSVR_CLASS_ERROR (-26001) +#define TRANSVR_CLASS_1G (26001) +#define TRANSVR_CLASS_10G (26011) +#define TRANSVR_CLASS_25G (26021) +#define TRANSVR_CLASS_40G (26041) +#define TRANSVR_CLASS_100G (26101) +#define TRANSVR_CLASS_NO_SPERARABLE (26901) +#define TRANSVR_CLASS_EXTEND_COMP (26902) +/* Transceiver class for Optical 1G */ +#define TRANSVR_CLASS_OPTICAL (27000) +#define TRANSVR_CLASS_OPTICAL_100 (27001) +#define TRANSVR_CLASS_OPTICAL_1G (27002) +#define TRANSVR_CLASS_OPTICAL_1G_AOC (27003) +#define TRANSVR_CLASS_OPTICAL_1G_SX (27004) +#define TRANSVR_CLASS_OPTICAL_1G_LX (27005) +#define TRANSVR_CLASS_OPTICAL_1G_EX (27006) +/* Transceiver class for Optical 10G */ +#define TRANSVR_CLASS_OPTICAL_10G (27010) +#define TRANSVR_CLASS_OPTICAL_10G_S_AOC (27011) +#define TRANSVR_CLASS_OPTICAL_10G_S_SR (27012) +#define TRANSVR_CLASS_OPTICAL_10G_S_LR (27013) +#define TRANSVR_CLASS_OPTICAL_10G_S_ER (27014) +#define TRANSVR_CLASS_OPTICAL_10G_Q_AOC (27015) +#define TRANSVR_CLASS_OPTICAL_10G_Q_SR (27016) +#define TRANSVR_CLASS_OPTICAL_10G_Q_LR (27017) +#define TRANSVR_CLASS_OPTICAL_10G_Q_ER (27018) +/* Transceiver class for Optical 25G */ +#define TRANSVR_CLASS_OPTICAL_25G (27020) +#define TRANSVR_CLASS_OPTICAL_25G_AOC (27021) +#define TRANSVR_CLASS_OPTICAL_25G_SR (27022) +#define TRANSVR_CLASS_OPTICAL_25G_LR (27023) +#define TRANSVR_CLASS_OPTICAL_25G_ER (27024) +/* Transceiver class for Optical 40G */ +#define TRANSVR_CLASS_OPTICAL_40G (27040) +#define TRANSVR_CLASS_OPTICAL_40G_AOC (27041) +#define TRANSVR_CLASS_OPTICAL_40G_SR4 (27042) +#define TRANSVR_CLASS_OPTICAL_40G_LR4 (27043) +#define TRANSVR_CLASS_OPTICAL_40G_ER4 (27044) +/* Transceiver class for Optical 100G */ +#define TRANSVR_CLASS_OPTICAL_100G (27100) +#define TRANSVR_CLASS_OPTICAL_100G_AOC (27101) +#define TRANSVR_CLASS_OPTICAL_100G_SR4 (27102) +#define TRANSVR_CLASS_OPTICAL_100G_LR4 (27103) +#define TRANSVR_CLASS_OPTICAL_100G_ER4 (27104) +#define TRANSVR_CLASS_OPTICAL_100G_PSM4 (27105) +/* Transceiver class for Copper */ +#define TRANSVR_CLASS_COPPER (28000) +#define TRANSVR_CLASS_COPPER_L1_1G (28001) +#define TRANSVR_CLASS_COPPER_L1_10G (28011) +#define TRANSVR_CLASS_COPPER_L4_10G (28012) +#define TRANSVR_CLASS_COPPER_L1_25G (28021) +#define TRANSVR_CLASS_COPPER_L4_40G (28041) +#define TRANSVR_CLASS_COPPER_L4_100G (28101) +/* Transceiver class for Base-T */ +#define TRANSVR_CLASS_BASE_T_1000 (29001) +#define TRANSVR_CLASS_BASE_T_1000_up (29002) +/* For uevent message */ +#define TRANSVR_UEVENT_KEY_IF "IF_TYPE" +#define TRANSVR_UEVENT_KEY_SP "IF_SPEED" +#define TRANSVR_UEVENT_KEY_LANE "IF_LANE" +#define TRANSVR_UEVENT_UNKNOW "UNKNOW" +#define TRANSVR_IF_KR "KR" +#define TRANSVR_IF_KR4 "KR4" +#define TRANSVR_IF_SR "SR" +#define TRANSVR_IF_SR4 "SR4" +#define TRANSVR_IF_SFI "SFI" +#define TRANSVR_IF_IF_GMII "GMII" +#define TRANSVR_IF_IF_XGMII "XGMII" +#define TRANSVR_IF_SP_100 "100" +#define TRANSVR_IF_SP_1G "1000" +#define TRANSVR_IF_SP_10G "10000" +#define TRANSVR_IF_SP_25G "25000" +#define TRANSVR_IF_SP_40G "40000" +#define TRANSVR_IF_SP_100G "100000" + +/* Transceiver mode define */ +#define TRANSVR_MODE_DIRECT (21000) +#define TRANSVR_MODE_POLLING (21001) + +/* Transceiver state define + * [Note] + * 1. State is used to represent the state of "Transceiver" and "Object". + * 2. State for different target has different means. The description as following: + */ +#define STATE_TRANSVR_CONNECTED (0) /* [Transvr]:Be plugged in. [Obj]:Link up, and work normally. */ +#define STATE_TRANSVR_NEW (-100) /* [Transvr]:(Not used) [Obj]:Create */ +#define STATE_TRANSVR_INIT (-101) /* [Transvr]:Be plugged in. [Obj]:Link up, and in initial process. */ +#define STATE_TRANSVR_ISOLATED (-102) /* [Transvr]:Be plugged in. [Obj]:Isolate, and not provide service. */ +#define STATE_TRANSVR_SWAPPED (-200) /* [Transvr]:Be plugged in. [Obj]:(Not used) */ +#define STATE_TRANSVR_DISCONNECTED (-300) /* [Transvr]:Un-plugged. [Obj]:Link down, and not provide service. */ +#define STATE_TRANSVR_UNEXCEPTED (-901) /* [Transvr]:Any [Obj]:Any, and not in expect case. */ + +/* Task state define */ +#define STATE_T_TASK_WAIT (110) +#define STATE_T_TASK_DONE (0) +#define STATE_T_TASK_INIT (-110) +#define STATE_T_TASK_FAIL (-410) + + +/* Event for task handling */ +#define EVENT_TRANSVR_TASK_WAIT (2101) +#define EVENT_TRANSVR_TASK_DONE (0) +#define EVENT_TRANSVR_TASK_FAIL (-2101) +/* Event for initial handling */ +#define EVENT_TRANSVR_INIT_UP (2201) +#define EVENT_TRANSVR_INIT_DOWN (1) +#define EVENT_TRANSVR_INIT_REINIT (-2201) +#define EVENT_TRANSVR_INIT_FAIL (-2202) +/* Event for others */ +#define EVENT_TRANSVR_RELOAD_FAIL (-2301) +#define EVENT_TRANSVR_EXCEP_INIT (-2401) +#define EVENT_TRANSVR_EXCEP_UP (-2402) +#define EVENT_TRANSVR_EXCEP_DOWN (-2403) +#define EVENT_TRANSVR_EXCEP_SWAP (-2404) +#define EVENT_TRANSVR_EXCEP_EXCEP (-2405) +#define EVENT_TRANSVR_EXCEP_ISOLATED (-2406) +#define EVENT_TRANSVR_I2C_CRASH (-2501) + +/* Transceiver error code define */ +#define ERR_TRANSVR_UNINIT (-201) +#define ERR_TRANSVR_UNPLUGGED (-202) +#define ERR_TRANSVR_ABNORMAL (-203) +#define ERR_TRANSVR_NOSTATE (-204) +#define ERR_TRANSVR_NOTSUPPORT (-205) +#define ERR_TRANSVR_BADINPUT (-206) +#define ERR_TRANSVR_UPDATE_FAIL (-207) +#define ERR_TRANSVR_RELOAD_FAIL (-208) +#define ERR_TRANSVR_INIT_FAIL (-209) +#define ERR_TRANSVR_UNDEFINED (-210) +#define ERR_TRANSVR_TASK_FAIL (-211) +#define ERR_TRANSVR_TASK_BUSY (-212) +#define ERR_TRANSVR_UEVENT_FAIL (-213) +#define ERR_TRANSVR_FUNC_DISABLE (-214) +#define ERR_TRANSVR_I2C_CRASH (-297) +#define ERR_TRNASVR_BE_ISOLATED (-298) +#define ERR_TRANSVR_UNEXCPT (-299) + +/* For debug */ +#define DEBUG_TRANSVR_INT_VAL (-99) +#define DEBUG_TRANSVR_HEX_VAL (0xfe) +#define DEBUG_TRANSVR_STR_VAL "ERROR" + +/* For system internal */ +#define VAL_TRANSVR_COMID_ARREESS (0x50) +#define VAL_TRANSVR_COMID_OFFSET (0x00) +#define VAL_TRANSVR_EXTPHY_ADDR_56 (0x56) +#define VAL_TRANSVR_8472_READY_ADDR (0x51) +#define VAL_TRANSVR_8472_READY_PAGE (-1) +#define VAL_TRANSVR_8472_READY_OFFSET (110) +#define VAL_TRANSVR_8472_READY_BIT (0) +#define VAL_TRANSVR_8472_READY_VALUE (0) +#define VAL_TRANSVR_8472_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_READY_ADDR (0x50) +#define VAL_TRANSVR_8436_READY_PAGE (-1) +#define VAL_TRANSVR_8436_READY_OFFSET (2) +#define VAL_TRANSVR_8436_READY_BIT (0) +#define VAL_TRANSVR_8436_READY_VALUE (0) +#define VAL_TRANSVR_8436_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_PWD_ADDR (0x50) +#define VAL_TRANSVR_8436_PWD_PAGE (-1) +#define VAL_TRANSVR_8436_PWD_OFFSET (123) +#define VAL_TRANSVR_PAGE_FREE (-99) +#define VAL_TRANSVR_PAGE_SELECT_OFFSET (127) +#define VAL_TRANSVR_PAGE_SELECT_DELAY (5) +#define VAL_TRANSVR_TASK_RETRY_FOREVER (-999) +#define VAL_TRANSVR_FUNCTION_DISABLE (-1) +#define STR_TRANSVR_SFP "SFP" +#define STR_TRANSVR_QSFP "QSFP" +#define STR_TRANSVR_QSFP_PLUS "QSFP+" +#define STR_TRANSVR_QSFP28 "QSFP28" + +/* For transvr buf len */ +#define LEN_TRANSVR_S_STR (16) +#define LEN_TRANSVR_M_STR (32) +#define LEN_TRANSVR_L_STR (64) + +/* Optical wavelength */ +#define VAL_OPTICAL_WAVELENGTH_SR (850) +#define VAL_OPTICAL_WAVELENGTH_LR (1310) +#define VAL_OPTICAL_WAVELENGTH_ER (1550) + +/* BCM chip type define */ +#define BCM_CHIP_TYPE_TRIDENT_2 (31001) /* Magnolia, Hudson32i, Spruce */ +#define BCM_CHIP_TYPE_TOMAHAWK (31002) /* Redwood, Cypress, Sequoia */ +#define BCM_CHIP_TYPE_TRIDENT_3 (31003) /* Maple */ + +#define BF_CHIP_TYPE_TOFINO (31011) /* Lavender */ + +/* Info from transceiver EEPROM */ +struct eeprom_map_s { + int addr_br; int page_br; int offset_br; int length_br; + int addr_cdr; int page_cdr; int offset_cdr; int length_cdr; + int addr_comp_rev; int page_comp_rev; int offset_comp_rev; int length_comp_rev; + int addr_connector; int page_connector; int offset_connector; int length_connector; + int addr_diag_type; int page_diag_type; int offset_diag_type; int length_diag_type; + int addr_extbr; int page_extbr; int offset_extbr; int length_extbr; + int addr_ext_id; int page_ext_id; int offset_ext_id; int length_ext_id; + int addr_id; int page_id; int offset_id; int length_id; + int addr_len_sm; int page_len_sm; int offset_len_sm; int length_len_sm; + int addr_len_smf; int page_len_smf; int offset_len_smf; int length_len_smf; + int addr_len_om1; int page_len_om1; int offset_len_om1; int length_len_om1; + int addr_len_om2; int page_len_om2; int offset_len_om2; int length_len_om2; + int addr_len_om3; int page_len_om3; int offset_len_om3; int length_len_om3; + int addr_len_om4; int page_len_om4; int offset_len_om4; int length_len_om4; + int addr_option; int page_option; int offset_option; int length_option; + int addr_rate_id; int page_rate_id; int offset_rate_id; int length_rate_id; + int addr_rx_am; int page_rx_am; int offset_rx_am; int length_rx_am; + int addr_rx_em; int page_rx_em; int offset_rx_em; int length_rx_em; + int addr_rx_los; int page_rx_los; int offset_rx_los; int length_rx_los; + int addr_rx_power; int page_rx_power; int offset_rx_power; int length_rx_power; + int addr_soft_rs0; int page_soft_rs0; int offset_soft_rs0; int length_soft_rs0; + int addr_soft_rs1; int page_soft_rs1; int offset_soft_rs1; int length_soft_rs1; + int addr_temp; int page_temp; int offset_temp; int length_temp; + int addr_trancomp; int page_trancomp; int offset_trancomp; int length_trancomp; + int addr_trancomp_ext; int page_trancomp_ext; int offset_trancomp_ext; int length_trancomp_ext; + int addr_tx_bias; int page_tx_bias; int offset_tx_bias; int length_tx_bias; + int addr_tx_disable; int page_tx_disable; int offset_tx_disable; int length_tx_disable; + int addr_tx_eq; int page_tx_eq; int offset_tx_eq; int length_tx_eq; + int addr_tx_fault; int page_tx_fault; int offset_tx_fault; int length_tx_fault; + int addr_tx_power; int page_tx_power; int offset_tx_power; int length_tx_power; + int addr_vendor_name; int page_vendor_name; int offset_vendor_name; int length_vendor_name; + int addr_vendor_pn; int page_vendor_pn; int offset_vendor_pn; int length_vendor_pn; + int addr_vendor_rev; int page_vendor_rev; int offset_vendor_rev; int length_vendor_rev; + int addr_vendor_sn; int page_vendor_sn; int offset_vendor_sn; int length_vendor_sn; + int addr_voltage; int page_voltage; int offset_voltage; int length_voltage; + int addr_wavelength; int page_wavelength; int offset_wavelength; int length_wavelength; +}; + + +struct transvr_worker_s; + +/* Class of transceiver object */ +struct transvr_obj_s { + + /* ========== Object private property ========== + * [Prop]: id + * [Desc]: Type of serial transceiver. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh /QSFP28:11h + */ + uint8_t id; + + /* [Prop]: connector + * [Desc]: Connector type. + * [Note]: SFP : A0h / 2 + * QSFP: 00h / 130 + */ + uint8_t connector; + + /* [Prop]: transvr_comp + * [Desc]: Transceiver compliance code. + * [Note]: SFP: SFF-8472 + * - Normal : A0h / offset 3-10 + * - Extended: A0h / offset 36 + * QSFP: SFF-8436 & SFF-8636 + * - Normal : 00h / offset 131-138 + * - Extended: 00h / offset 192 + */ + uint8_t transvr_comp[8]; + uint8_t transvr_comp_ext; + + /* [Prop]: vendor_name + * [Desc]: SFP vendor name (ASCII 16 byte char). + * [Note]: ex:FINISAR CORP. + */ + char *vendor_name; + + /* [Prop]: vendor_pn + * [Desc]: Part number provided by SFP vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_pn; + + /* [Prop]: vendor_rev + * [Desc]: Revision level for part number provided by vendor (ASCII 4 byte char). + * [Note]: + */ + char *vendor_rev; + + /* [Prop]: vendor_sn + * [Desc]: Serial number provided by vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_sn; + + /* [Prop]: Extended identifier + * [Desc]: SFP: + * => None + * + * QSFP: + * => This byte contained two information: + * (1) Power consumption class + * (2) CDR function present + * [Note]: Bit description as below: + * [SFP] + * None + * + * [QSFP] + * (1) Power consumption class: + * Class 1: 1.5W (Bit6-7 = 00:) + * Class 2: 2.0W (Bit6-7 = 01:) + * Class 3: 2.5W (Bit6-7 = 10:) + * Class 4: 3.5W (Bit6-7 = 11:) + * Class 5: 4.0W (Bit0-1 = 01:) + * Class 6: 4.5W (Bit0-1 = 10:) + * Class 7: 5.0W (Bit0-1 = 11:) + * (2) CDR function present: + * Bit2: 0 = No CDR in RX + * 1 = CDR present in RX + * Bit3: 0 = No CDR in TX + * 1 = CDR present in TX + */ + uint8_t ext_id; + + /* [Prop]: br + * [Desc]: Nominal bit rate, units of 100 MBits/sec. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh + * has val: 0x67 + * no val : + */ + uint8_t br; + + /* [Prop]: extbr + * [Desc]: Extended br (00h/222) + * [Desc]: Nominal bit rate per channel, units of 250 Mbps. + * Complements. Byte 140. See Table 32A. + */ + uint8_t extbr; + + /* [Prop]: len_sm + * [Desc]: Length (single mode)-(100's)m + * [Note]: This value specifies the link length that is supported by the transceiver + * while operating in compliance with the applicable standards using single mode + * fiber. The value is in units of 100 meters. A value of 255 means that the + * transceiver supports a link length greater than 25.4 km. A value of zero means + * that the transceiver does not support single mode fiber or that the length + * information must be determined from the transceiver technology. + */ + int len_sm; + + /* [Prop]: len_smf + * [Desc]: Length (single mode)-km + * [Note]: Addition to EEPROM data from original GBIC definition. This value specifies + * the link length that is supported by the transceiver while operating in + * compliance with the applicable standards using single mode fiber. The value + * is in units of kilometers. A value of 255 means that the transceiver supports + * a link length greater than 254 km. A value of zero means that the transceiver + * does not support single mode fiber or that the length information must be + * determined from the transceiver technology. + */ + int len_smf; + + /* [Prop]: len_om1 + * [Desc]: Link length supported for 62.5 um OM1 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om1; + + /* [Prop]: len_om2 + * [Desc]: Link length supported for 50 um OM2 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om2; + + /* [Prop]: len_om3 + * [Desc]: Length (50um, OM3) + * [Note]: This value specifies link length that is supported by the transceiver while + * operating in compliance with applicable standards using 50 micron multimode + * OM3 [2000 MHz*km] fiber. The value is in units of 10 meters. A value of 255 + * means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber + * or that the length information must be determined from the transceiver technology. + */ + int len_om3; + + /* [Prop]: len_om4 + * [Desc]: Length (50um, OM4) and Length (Active Cable or Copper) + * [Note]: For optical links, this value specifies link length that is supported by the + * transceiver while operating in compliance with applicable standards using 50 micron + * multimode OM4 [4700 MHz*km] fiber. The value is in units of 10 meters. A value of + * 255 means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber or that + * the length information must be determined from the transceiver codes specified in Table 5-3. + * + * For copper links, this value specifies minimum link length supported by the transceiver + * while operating in compliance with applicable standards using copper cable. For active + * cable, this value represents actual length. The value is in units of 1 meter. A value of 255 + * means the transceiver supports a link length greater than 254 meters. A value of zero means + * the transceiver does not support copper or active cables or the length information must be + * determined from transceiver technology. Further information about cable design, equalization, + * and connectors is usually required to guarantee meeting a particular length requirement. + */ + int len_om4; + + /* [Prop]: comp_rev + * [Desc]: SFF spec revision compliance + * [Note]: Indicates which revision of SFF SFF-8472 (SFP) / SFF-8636 (QSFP) the transceiver + * complies with. (unsigned integer) + */ + uint8_t comp_rev; + + /* [Prop]: CDR + * [Desc]: For transceivers with CDR capability, setting the CDR to ON engages the internal + * retiming function. Setting the CDR to OFF enables an internal bypassing mode ,which + * directs traffic around the internal CDR. (Reference: SFF-8636) + * [Note]: value=0xff: ON. + * value=0x00: OFF. + */ + uint8_t cdr; + + /* [Prop]: rate_id + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Addr: A0h / Offset: 13 + * 2. Value description: + * 00h Unspecified + * 01h SFF-8079 (4/2/1G Rate_Select & AS0/AS1) + * 02h SFF-8431 (8/4/2G Rx Rate_Select only) + * 03h Unspecified * + * 04h SFF-8431 (8/4/2G Tx Rate_Select only) + * 05h Unspecified * + * 06h SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) + * 07h Unspecified * + * 08h FC-PI-5 (16/8/4G Rx Rate_select only) High=16G only, Low=8G/4G + * 09h Unspecified * + * 0Ah FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) High=16G only, + * Low=8G/4G + * 0Bh Unspecified * + * 0Ch FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + * 0Dh Unspecified * + * 0Eh 10/8G Rx and Tx Rate_Select controlling the operation or locking + * modes of the internal signal conditioner, retimer or CDR, according + * to the logic table defined in Table 10-2, High Bit Rate + * (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = 8.5 Gb/s. In this mode, + * the default value of bit 110.3 (Soft Rate Select RS(0), Table 9-11) + * and of bit 118.3 (Soft Rate Select RS(1), Table 10-1) is 1. + * 0Fh Unspecified * + * 10h-FFh Unallocated + */ + int rate_id; + + /* [Prop]: soft_rs0 + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Writing '1' selects full bandwidth operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(0) or RS(0) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 110 / Bit: 3 + */ + uint8_t soft_rs0; + + /* [Prop]: soft_rs1 + * [Desc]: Soft Rate Select 1(TX). + * [Note]: 1. Writing '1' selects full bandwidth TX operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(1) or RS(1) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 118 / Bit: 3 + */ + uint8_t soft_rs1; + + /* [Prop]: diag_type + * [Desc]: DIAGNOSTIC MONITORING TYPE (A0h/92) + * [Note]: Description in SFF-8472 as below: + * Bit7: Reserved for legacy diagnostic implementations. Must be '0' for compliance + * with this document. + * Bit6: Digital diagnostic monitoring implemented (described in this document). + * Must be '1' for compliance with this document. + * Bit5 Internally calibrated + * Bit4 Externally calibrated + * Bit3 Received power measurement type.0 = OMA, 1 = average power + * Bit2 Address change required see section above, "addressing modes" + * Bit1-0 Unallocated + */ + uint8_t diag_type; + + /* [Prop]: curr_temp + * [Desc]: Transceiver Current Temperature (A2h/96-97) + * [Note]: 1. Dependent on diag_type. + * 2. 96: High byte + * 3. 97: Low byte + * 4. This feature only for SFP + */ + uint8_t curr_temp[2]; + + /* [Prop]: curr_vol + * [Desc]: Transceiver Current Voltage (SFP:A2h/108-109; QSFP:00h/22-23) + * [Note]: 1. Dependent on diag_type. + * 2. 98: High byte + * 3. 99: Low byte + * 4. This feature only for SFP + * 5. Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts + */ + uint8_t curr_voltage[2]; + + /* [Prop]: curr_tx_bias + * [Desc]: Transceiver TX Bias Current (SFP:A2h/100-101; QSFP:00h/26-27) + * [Note]: 1. Dependent on diag_type. + * 2. 100: High byte + * 3. 101: Low byte + * 4. This feature only for SFP + * 5. Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + uint8_t curr_tx_bias[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + uint8_t curr_tx_power[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + uint8_t curr_rx_power[8]; + + /* [Prop]: wavelength + * [Desc]: Wavelength or Copper Cable Attenuation + * [Note]: (Following is info from SFF-8636) + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is a + * 16-bit hex value with Byte 186 as high order byte and Byte 187 as low + * order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. If the free side device is identified as + * copper cable these registers will be used to define the cable attenuation. + * An indication of 0 dB attenuation refers to the case where the attenuation + * is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + uint8_t wavelength[2]; + + /* [Prop]: Amplitude control + * [Desc]: Amplitude control + * [Note]: QSFP28 => SFF-8636 03H Byte-238/239 + */ + uint8_t rx_am[2]; + + /* [Prop]: Emphasis control + * [Desc]: Emphasis control + * [Note]: SFP+/28 => SFF-8472 A2H Byte-115 + * QSFP28 => SFF-8636 03H Byte-236/237 + */ + uint8_t rx_em[2]; + + /* [Prop]: Soft Rx LOS + * [Desc]: Soft Rx LOS which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 3: + * - Bit 0: L-Rx1 LOS + * - Bit 1: L-Rx2 LOS + * - Bit 2: L-Rx3 LOS + * - Bit 3: L-Rx4 LOS + */ + uint8_t rx_los; + + /* [Prop]: Soft Tx Disable + * [Desc]: Soft Tx Disable which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Disable + * - Bit 1: Tx2 Disable + * - Bit 2: Tx3 Disable + * - Bit 3: Tx4 Disable + */ + uint8_t tx_disable; + + /* [Prop]: Soft Tx Fault + * [Desc]: Soft Tx Fault which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Fault + * - Bit 1: Tx2 Fault + * - Bit 2: Tx3 Fault + * - Bit 3: Tx4 Fault + */ + uint8_t tx_fault; + + /* [Prop]: Transceiver EQUALIZATION + * [Desc]: Transceiver EQUALIZATION + * [Note]: SFP+/28 => SFF-8472 A2H Byte-114 + * QSFP28 => SFF-8636 03H Byte-234/235 + */ + uint8_t tx_eq[2]; + + /* [Prop]: OPTION VALUES + * [Desc]: The bits in the option field shall specify the options implemented in the transceiver. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-64/65 + * QSFP+/28 => SFF-8636 00H Byte-193/195 + */ + uint8_t option[3]; + + /* [Prop]: External PHY offset + * [Desc]: It needs to be setup first if you want to access transceiver external phy. + * [Note]: This feature dependent on transceiver. + * Currently, only 1G-RJ45 transceiver supported it. + */ + uint8_t extphy_offset; + + /* ========== Object private property ========== + */ + struct device *transvr_dev_p; + struct eeprom_map_s *eeprom_map_p; + struct i2c_client *i2c_client_p; + struct ioexp_obj_s *ioexp_obj_p; + struct transvr_worker_s *worker_p; + struct mutex lock; + char swp_name[32]; + int auto_config; + int auto_tx_disable; + int chan_id; + int chipset_type; + int curr_page; + int info; + int ioexp_virt_offset; + int lane_id[8]; + int layout; + int mode; + int retry; + int state; + int temp; + int type; + + /* ========== Object public functions ========== + */ + int (*get_id)(struct transvr_obj_s *self); + int (*get_ext_id)(struct transvr_obj_s *self); + int (*get_connector)(struct transvr_obj_s *self); + int (*get_vendor_name)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_pn)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_rev)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_sn)(struct transvr_obj_s *self, char *buf_p); + int (*get_power_cls)(struct transvr_obj_s *self); + int (*get_br)(struct transvr_obj_s *self); + int (*get_len_sm)(struct transvr_obj_s *self); + int (*get_len_smf)(struct transvr_obj_s *self); + int (*get_len_om1)(struct transvr_obj_s *self); + int (*get_len_om2)(struct transvr_obj_s *self); + int (*get_len_om3)(struct transvr_obj_s *self); + int (*get_len_om4)(struct transvr_obj_s *self); + int (*get_comp_rev)(struct transvr_obj_s *self); + int (*get_comp_eth_1)(struct transvr_obj_s *self); + int (*get_comp_eth_10)(struct transvr_obj_s *self); + int (*get_comp_eth_10_40)(struct transvr_obj_s *self); + int (*get_comp_extend)(struct transvr_obj_s *self); + int (*get_cdr)(struct transvr_obj_s *self); + int (*get_rate_id)(struct transvr_obj_s *self); + int (*get_soft_rs0)(struct transvr_obj_s *self); + int (*get_soft_rs1)(struct transvr_obj_s *self); + int (*get_info)(struct transvr_obj_s *self); + int (*get_if_type)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_speed)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_lane)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_temp)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_vol)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_rx_los)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_fault)(struct transvr_obj_s *self, char *buf_p); + int (*get_auto_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_bias)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_eq)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_am)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_em)(struct transvr_obj_s *self, char *buf_p); + int (*get_wavelength)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_offset)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_reg)(struct transvr_obj_s *self, char *buf_p); + int (*set_cdr)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs0)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs1)(struct transvr_obj_s *self, int input_val); + int (*set_soft_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_auto_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_tx_eq)(struct transvr_obj_s *self, int input_val); + int (*set_rx_am)(struct transvr_obj_s *self, int input_val); + int (*set_rx_em)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_offset)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_reg)(struct transvr_obj_s *self, int input_val); + + /* ========== Object private functions ========== + */ + int (*init)(struct transvr_obj_s *self); + int (*clean)(struct transvr_obj_s *self); + int (*check)(struct transvr_obj_s *self); + int (*update_all)(struct transvr_obj_s *self, int show_err); + int (*fsm_4_direct)(struct transvr_obj_s* self, char *caller_name); + int (*fsm_4_polling)(struct transvr_obj_s* self, char *caller_name); + int (*send_uevent)(struct transvr_obj_s* self, enum kobject_action u_action); + int (*dump_all)(struct transvr_obj_s* self); +}; + + +/* For AVL Mapping */ +struct transvr_avl_s { + char vendor_name[32]; + char vendor_pn[32]; + int (*init)(struct transvr_obj_s *self); +}; + + +/* Worker for long term task of transceiver */ +struct transvr_worker_s { + /* Task Parameter */ + struct transvr_obj_s *transvr_p; + struct transvr_worker_s *next_p; + struct transvr_worker_s *pre_p; + unsigned long trigger_time; + char func_name[64]; + int retry; + int state; + + /* Task private data */ + void *p_data; + + /* Call back function */ + int (*main_task)(struct transvr_worker_s *task); + int (*post_task)(struct transvr_worker_s *task); +}; + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode); + +void lock_transvr_obj(struct transvr_obj_s *self); +void unlock_transvr_obj(struct transvr_obj_s *self); +int isolate_transvr_obj(struct transvr_obj_s *self); + +int resync_channel_tier_2(struct transvr_obj_s *self); + +void alarm_msg_2_user(struct transvr_obj_s *self, char *emsg); + +#endif /* TRANSCEIVER_H */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d6556/utils/inventec_d6556_util.py b/platform/broadcom/sonic-platform-modules-inventec/d6556/utils/inventec_d6556_util.py new file mode 100644 index 00000000000..2ca077945f5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d6556/utils/inventec_d6556_util.py @@ -0,0 +1,238 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Inventec, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV: ', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install() + elif arg == 'clean': + uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[D6556]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +" with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + + +instantiate = [ +'echo inv_eeprom 0x53 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo inv_cpld 0x55 > /sys/bus/i2c/devices/i2c-0/new_device'] + + +drivers =[ +'gpio_ich', +'lpc_ich', +'i2c-i801', +'i2c-mux', +'i2c-mux-pca954x', +'i2c-dev', +'inv_eeprom', +'inv_platform', +'inv_psoc', +'inv_cpld', +'swps', +'inv_pthread'] + + + +def system_install(): + global FORCE + + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("rmmod i2c_ismt ", 1) + status, output = exec_cmd("rmmod i2c-i801 ", 1) + status, output = exec_cmd("rmmod gpio_ich ", 1) + status, output = exec_cmd("rmmod lpc_ich ", 1) + + + #install drivers + for i in range(0,len(drivers)): + status, output = exec_cmd("modprobe "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + + #instantiate devices + for i in range(0,len(instantiate)): + #time.sleep(1) + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status + + + for i in range(10,18): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-2/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(18,26): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-3/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(26,34): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-4/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(34,42): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-5/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(42,50): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-6/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(50,58): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-7/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(58,66): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-1/i2c-8/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + + +def system_ready(): + if not device_found(): + return False + return True + +def install(): + if not device_found(): + print "No device, installing...." + status = system_install() + if status: + if FORCE == 0: + return status + else: + print "D6556 devices detected...." + return + +def uninstall(): + global FORCE + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"*0072", 0) + ret2, log = exec_cmd("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/Makefile b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/Makefile new file mode 100755 index 00000000000..b596d1c4bc4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/Makefile @@ -0,0 +1,8 @@ +obj-m += inv_cpld.o inv_psoc.o +obj-m += inv_platform.o +obj-m += inv_eeprom.o +obj-m += swps.o +obj-m += inv_pthread.o +swps-objs := inv_swps.o io_expander.o transceiver.o + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_cpld.c b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_cpld.c new file mode 100644 index 00000000000..028e24b9eb8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_cpld.c @@ -0,0 +1,456 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//#include "I2CHostCommunication.h" + +#define USE_SMBUS 1 + +/* definition */ +#define CPLD_INFO_OFFSET 0x00 +#define CPLD_RESET_OFFSET 0x08 +#define CPLD_PSU_OFFSET 0x09 +#define CPLD_LED_OFFSET 0x0E +#define CPLD_LED_STATU_OFFSET 0x0D +#define CPLD_CTL_OFFSET 0x0C + + + +/* Each client has this additional data */ +struct cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; +}; + +/*-----------------------------------------------------------------------*/ + +static ssize_t cpld_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg[0].buf = msgbuf; + msg[0].len = 1; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + + status = i2c_transfer(client->adapter, msg, 2); + + if(status == 2) + status = count; + + return status; +#endif +} + +static ssize_t cpld_i2c_write(struct i2c_client *client, char *buf, unsigned offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + + return status; +#endif +} + +/*-----------------------------------------------------------------------*/ + +/* sysfs attributes for hwmon */ + +static ssize_t show_info(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[4]; + + memset(b, 0, 4); + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, b, CPLD_INFO_OFFSET, 4); + mutex_unlock(&data->update_lock); + + if(status != 4) return sprintf(buf, "read cpld info fail\n"); + + status = sprintf (buf, "The CPLD release date is %02d/%02d/%d.\n", b[2] & 0xf, (b[3] & 0x1f), 2014+(b[2] >> 4)); /* mm/dd/yyyy*/ + status = sprintf (buf, "%sThe PCB version is %X%X\n", buf, b[0]>>4, b[0]&0xf); + status = sprintf (buf, "%sThe CPLD version is %d.%d\n", buf, b[1]>>4, b[1]&0xf); + + return strlen(buf); +} + +static ssize_t show_reset(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[1]; + + mutex_lock(&data->update_lock); + + status = cpld_i2c_read(client, b, CPLD_RESET_OFFSET, 1); + + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld reset fail\n"); + + + status = sprintf (buf, "The CPLD 1 cpld_reset = %d\n", b[0]); + + return strlen(buf); +} + +static ssize_t set_reset(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + u8 temp = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_write(client, &temp, CPLD_RESET_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_ctl(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[1]; + + mutex_lock(&data->update_lock); + + status = cpld_i2c_read(client, b, CPLD_CTL_OFFSET, 1); + + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld ctl fail\n"); + + + status = sprintf (buf, "0x%X\n", b[0]); + + return strlen(buf); +} + +static ssize_t set_ctl(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + + u8 temp = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_CTL_OFFSET, 1); + if(temp) byte |= (1<<0); + else byte &= ~(1<<0); + cpld_i2c_write(client, &byte, CPLD_CTL_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static char* led_str[] = { + "OFF", //000 + "0.5 Hz", //001 + "1 Hz", //010 + "2 Hz", //011 + "NA", //100 + "NA", //101 + "NA", //110 + "ON", //111 +}; + +static ssize_t show_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 0)?3:0; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld offset 0x%x\n", CPLD_LED_OFFSET); + + byte = (byte >> shift) & 0x7; + + /* + 0: off + 1: 0.5hz + 2: 1 hz + 3: 2 hz + 4~6: not define + 7: on + */ + + status = sprintf (buf, "%d: %s\n", byte, led_str[byte]); + + return strlen(buf); +} + +static ssize_t set_led(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + u8 temp = simple_strtol(buf, NULL, 16); + u8 byte; + int shift = (attr->index == 0)?3:0; + + temp &= 0x7; + //validate temp value: 0,1,2,3,7, TBD + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + byte &= ~(0x7<update_lock); + + return count; +} + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu0 | psu1 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 1)?0:3; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + + +static SENSOR_DEVICE_ATTR(info, S_IRUGO, show_info, 0, 0); +static SENSOR_DEVICE_ATTR(reset, S_IWUSR|S_IRUGO, show_reset, set_reset, 0); +static SENSOR_DEVICE_ATTR(ctl, S_IWUSR|S_IRUGO, show_ctl, set_ctl, 0); + +static SENSOR_DEVICE_ATTR(grn_led, S_IWUSR|S_IRUGO, show_led, set_led, 0); +static SENSOR_DEVICE_ATTR(red_led, S_IWUSR|S_IRUGO, show_led, set_led, 1); + +static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu, 0, 0); +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu, 0, 1); + +static struct attribute *cpld_attributes[] = { + //info + &sensor_dev_attr_info.dev_attr.attr, + &sensor_dev_attr_reset.dev_attr.attr, + &sensor_dev_attr_ctl.dev_attr.attr, + + &sensor_dev_attr_grn_led.dev_attr.attr, + &sensor_dev_attr_red_led.dev_attr.attr, + + &sensor_dev_attr_psu0.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + + NULL +}; + +static const struct attribute_group cpld_group = { + .attrs = cpld_attributes, +}; + +/*-----------------------------------------------------------------------*/ + +/* device probe and removal */ + +static int +cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct cpld_data *data; + int status; + + printk("+%s\n", __func__); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &cpld_group); + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &cpld_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &cpld_group); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id cpld_ids[] = { + { "inv_cpld", 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, cpld_ids); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_cpld_init(void) +{ + return i2c_add_driver(&cpld_driver); +} + +static void __exit inv_cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("eddie.lan "); +MODULE_DESCRIPTION("inv cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_cpld_init); +module_exit(inv_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_eeprom.c b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_eeprom.c new file mode 100644 index 00000000000..b2dde612b61 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_eeprom.c @@ -0,0 +1,181 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void inv_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } + +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t inv_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + inv_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute inv_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = inv_eeprom_read, +}; + +static int inv_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &inv_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int inv_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &inv_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id inv_eeprom_id[] = { + { "inv_eeprom", 0 }, + { } +}; + +static struct i2c_driver inv_eeprom_driver = { + .driver = { + .name = "inv_eeprom", + }, + .probe = inv_eeprom_probe, + .remove = inv_eeprom_remove, + .id_table = inv_eeprom_id, +}; + +module_i2c_driver(inv_eeprom_driver); + +MODULE_AUTHOR("Inventec"); +MODULE_DESCRIPTION("Inventec D7032 Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_platform.c b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_platform.c new file mode 100644 index 00000000000..52f6a5691d3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_platform.c @@ -0,0 +1,198 @@ +#include +//#include +#include +#include +#include +#include +#include + +#include +#include +#include + +//#include +#define IO_EXPAND_BASE 64 +#define IO_EXPAND_NGPIO 16 + +struct inv_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +#define bus_id(id) (id) +static struct pca954x_platform_mode mux_modes_0[] = { + {.adap_id = bus_id(2),}, {.adap_id = bus_id(3),}, + {.adap_id = bus_id(4),}, {.adap_id = bus_id(5),}, +}; +static struct pca954x_platform_mode mux_modes_0_0[] = { + {.adap_id = bus_id(6),}, {.adap_id = bus_id(7),}, + {.adap_id = bus_id(8),}, {.adap_id = bus_id(9),}, + {.adap_id = bus_id(10),}, {.adap_id = bus_id(11),}, + {.adap_id = bus_id(12),}, {.adap_id = bus_id(13),}, +}; + +static struct pca954x_platform_mode mux_modes_0_1[] = { + {.adap_id = bus_id(14),}, {.adap_id = bus_id(15),}, + {.adap_id = bus_id(16),}, {.adap_id = bus_id(17),}, + {.adap_id = bus_id(18),}, {.adap_id = bus_id(19),}, + {.adap_id = bus_id(20),}, {.adap_id = bus_id(21),}, +}; + +static struct pca954x_platform_mode mux_modes_0_2[] = { + {.adap_id = bus_id(22),}, {.adap_id = bus_id(23),}, + {.adap_id = bus_id(24),}, {.adap_id = bus_id(25),}, + {.adap_id = bus_id(26),}, {.adap_id = bus_id(27),}, + {.adap_id = bus_id(28),}, {.adap_id = bus_id(29),}, +}; + +static struct pca954x_platform_mode mux_modes_0_3[] = { + {.adap_id = bus_id(30),}, {.adap_id = bus_id(31),}, + {.adap_id = bus_id(32),}, {.adap_id = bus_id(33),}, + {.adap_id = bus_id(34),}, {.adap_id = bus_id(35),}, + {.adap_id = bus_id(36),}, {.adap_id = bus_id(37),}, +}; + +static struct pca954x_platform_data mux_data_0 = { + .modes = mux_modes_0, + .num_modes = 4, +}; +static struct pca954x_platform_data mux_data_0_0 = { + .modes = mux_modes_0_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_1 = { + .modes = mux_modes_0_1, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_2 = { + .modes = mux_modes_0_2, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_3 = { + .modes = mux_modes_0_3, + .num_modes = 8, +}; + +static struct i2c_board_info i2c_device_info0[] __initdata = { + {"inv_psoc", 0, 0x66, 0, 0, 0},//psoc + {"inv_cpld", 0, 0x55, 0, 0, 0},//cpld + {"pca9545", 0, 0x70, &mux_data_0, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info1[] __initdata = { + {"pca9545", 0, 0x70, &mux_data_0, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info2[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_0, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info3[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_1, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info4[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_2, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info5[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_3, 0, 0}, +}; + + +static struct inv_i2c_board_info i2cdev_list[] = { + {0, ARRAY_SIZE(i2c_device_info0), i2c_device_info0 }, //smbus 0 + {1, ARRAY_SIZE(i2c_device_info1), i2c_device_info1 }, //smbus 1 or gpio11+12 + + {bus_id(2), ARRAY_SIZE(i2c_device_info2), i2c_device_info2 }, //mux 0 + {bus_id(3), ARRAY_SIZE(i2c_device_info3), i2c_device_info3 }, //mux 1 + {bus_id(4), ARRAY_SIZE(i2c_device_info4), i2c_device_info4 }, //mux 2 + {bus_id(5), ARRAY_SIZE(i2c_device_info5), i2c_device_info5 }, //mux 3 +}; + +///////////////////////////////////////////////////////////////////////////////////////// +static struct i2c_gpio_platform_data i2c_gpio_platdata0 = { + .scl_pin = 8, + .sda_pin = 9, + + .udelay = 5, //5:100kHz + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .scl_is_output_only = 0 +}; + +static struct i2c_gpio_platform_data i2c_gpio_platdata1 = { + .scl_pin = 12, + .sda_pin = 11, + + .udelay = 5, //5:100kHz + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .scl_is_output_only = 0 +}; + +static struct platform_device device_i2c_gpio0 = { + .name = "i2c-gpio", + .id = 0, // adapter number + .dev.platform_data = &i2c_gpio_platdata0, +}; + +static struct platform_device device_i2c_gpio1 = { + .name = "i2c-gpio", + .id = 1, // adapter number + .dev.platform_data = &i2c_gpio_platdata1, +}; + +static int __init plat_redwood_x86_init(void) +{ + struct i2c_adapter *adap = NULL; + struct i2c_client *e = NULL; + int ret = 0; + int i,j; + + printk("el6661 plat_redwood_x86_init \n"); + +#if 0 //disable for ICOS + //use i2c-gpio + //register i2c gpio + //config gpio8,9 to gpio function + outl( inl(0x500) | (1<<8 | 1<<9), 0x500); + + ret = platform_device_register(&device_i2c_gpio0); + if (ret) { + printk(KERN_ERR "i2c-gpio: device_i2c_gpio0 register fail %d\n", ret); + } + + outl( inl(0x500) | (1<<11 | 1<<12), 0x500); + ret = platform_device_register(&device_i2c_gpio1); + if (ret) { + printk(KERN_ERR "i2c-gpio: device_i2c_gpio1 register fail %d\n", ret); + } +#endif + + for(i=0; i +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//#include "I2CHostCommunication.h" + +#define USE_SMBUS 1 + +//#define offsetof(st, m) ((size_t)(&((st *)0)->m)) +#define FAN_NUM 5 +#define PSU_NUM 2 + +struct __attribute__ ((__packed__)) psoc_psu_layout { + u16 psu1_iin; + u16 psu2_iin; + u16 psu1_iout; + u16 psu2_iout; + + u16 psu1_pin; + u16 psu2_pin; + u16 psu1_pout; + u16 psu2_pout; + + u16 psu1_vin; + u16 psu2_vin; + u16 psu1_vout; + u16 psu2_vout; +}; + +struct __attribute__ ((__packed__)) psoc_layout { + u8 ctl; //offset: 0 + u16 switch_temp; //offset: 1 + u8 reserve1; //offset: 3 + + u8 fw_upgrade; //offset: 4 + + //i2c bridge + u8 i2c_st; //offset: 5 + u8 i2c_ctl; //offset: 6 + u8 i2c_addr; //offset: 7 + u8 i2c_data[0x20]; //offset: 8 + + //gpo + u8 led_grn; //offset: 28 + u8 led_red; //offset: 29 + + //pwm duty + u8 pwm[FAN_NUM]; //offset: 2a + u8 pwm_psu[PSU_NUM]; //offset: 2f + + //fan rpm + u16 fan[FAN_NUM*2]; //offset: 31 + //u16 fan_psu[PSU_NUM]; + + //gpi + u8 gpi_fan; //offset: 45 + + //psu state + u8 psu_state; //offset: 46 + + //temperature + u16 temp[5]; //offset: 47 + u16 temp_psu[PSU_NUM]; //offset: 51 + + //version + u8 version[2]; //offset: 55 + + u8 reserve2[3]; //offset: 57 + struct psoc_psu_layout psu_info; //offset: 5a +}; + + +/* definition */ +#define PSOC_OFF(m) offsetof(struct psoc_layout, m) +#define PSOC_PSU_OFF(m) offsetof(struct psoc_psu_layout, m) + +#define SWITCH_TMP_OFFSET PSOC_OFF(switch_temp) //0x01 +#define PWM_OFFSET PSOC_OFF(pwm) +#define PWM_PSU_OFFSET PSOC_OFF(pwm_psu) +#define THERMAL_OFFSET PSOC_OFF(temp) +#define RPM_OFFSET PSOC_OFF(fan) +//#define RPM_PSU_OFFSET PSOC_OFF(fan_psu) +#define DIAG_FLAG_OFFSET PSOC_OFF(ctl) +#define FAN_LED_OFFSET PSOC_OFF(led_grn) +#define FAN_GPI_OFFSET PSOC_OFF(gpi_fan) +#define PSOC_PSU_OFFSET PSOC_OFF(psu_state) +#define VERSION_OFFSET PSOC_OFF(version) +#define PSU_INFO_OFFSET PSOC_OFF(psu_info) + + +/* Each client has this additional data */ +struct psoc_data { + struct device *hwmon_dev; + struct mutex update_lock; + u32 diag; +}; + +/*-----------------------------------------------------------------------*/ + +static ssize_t psoc_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg[0].buf = msgbuf; + msg[0].len = 1; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + + status = i2c_transfer(client->adapter, msg, 2); + + if(status == 2) + status = count; + + return status; +#endif +} + +static ssize_t psoc_i2c_write(struct i2c_client *client, char *buf, unsigned offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + + return status; +#endif +} + +static u32 psoc_read32(struct i2c_client *client, u8 offset) +{ + u32 value = 0; + u8 buf[4]; + + if( psoc_i2c_read(client, buf, offset, 4) == 4) + value = (buf[0]<<24 | buf[1]<<16 | buf[2]<<8 | buf[3]); + + return value; +} + +static u16 psoc_read16(struct i2c_client *client, u8 offset) +{ + u16 value = 0; + u8 buf[2]; + + if(psoc_i2c_read(client, buf, offset, 2) == 2) + value = (buf[0]<<8 | buf[1]<<0); + + return value; +} + +static u8 psoc_read8(struct i2c_client *client, u8 offset) +{ + u8 value = 0; + u8 buf = 0; + + if(psoc_i2c_read(client, &buf, offset, 1) == 1) + value = buf; + + return value; +} + +static int psoc_write_value(struct i2c_client *client, unsigned offset, u16 value) +{ + //TBD + return 0; +} + + +//PSOC i2c bridge regsters +#define PSOC_I2C_STATUS PSOC_OFF(i2c_st) +#define PSOC_I2C_CNTRL PSOC_OFF(i2c_ctl) +#define PSOC_I2C_ADDR PSOC_OFF(i2c_addr) +#define PSOC_I2C_DATA PSOC_OFF(i2c_data) + +//status bit definition +#define PSOC_I2C_START (1 << 0) +#define PSOC_PMB_SEL (1 << 7) + +//addr bits definition +#define PSOC_I2C_READ (1 << 0) + +//PMBUS registers definition +#define PMBUS_READ_VIN (0x88) +#define PMBUS_READ_IIN (0x89) +#define PMBUS_READ_VOUT (0x8B) +#define PMBUS_READ_IOUT (0x8C) +#define PMBUS_READ_POUT (0x96) +#define PMBUS_READ_PIN (0x97) + +#define PMBUS_MFR_ID (0x99) +#define PMBUS_MFR_MODEL (0x9A) +#define PMBUS_MFR_REVISION (0x9B) +#define PMBUS_MFR_DATE (0x9D) +#define PMBUS_MFR_SERIAL (0x9E) + +static int psoc_i2c_bridge_read(struct i2c_client *client, + unsigned char bus, + unsigned char chip, + char *addr, int alen, + unsigned char *data, int len ) +{ + unsigned char txdata[28], rxdata[28]; + int index, timeout; + + txdata[PSOC_I2C_STATUS] = 0; /* the status */ + txdata[PSOC_I2C_CNTRL] = ((alen & 3) << 5) | (len & 0x1f); /* the sizes */ + txdata[PSOC_I2C_ADDR] = (chip << 1) | PSOC_I2C_READ; /* read address */ + for(index = 0; index < alen; index++) + txdata[PSOC_I2C_DATA + index] = addr[index]; /* the chip address */ + for(; index < alen+len; index++) + txdata[PSOC_I2C_DATA + index] = 0; /* clear the chip data */ + + psoc_i2c_write(client, &txdata[PSOC_I2C_CNTRL], PSOC_I2C_CNTRL, 2 + alen + len); + + //delay a while ??? + //--------------------------------------------------------------------- + //start write + txdata[PSOC_I2C_STATUS] = PSOC_I2C_START; /* the start bit*/ + if(bus) + txdata[PSOC_I2C_STATUS] |= PSOC_PMB_SEL;/* bus id */ + psoc_i2c_write(client, &txdata[PSOC_I2C_STATUS], PSOC_I2C_STATUS, 1); + + //delay a while + timeout = 40; //40*20==>800 ms + do { + psoc_i2c_read(client, &rxdata[PSOC_I2C_STATUS], PSOC_I2C_STATUS, 1); + + //check rxdata[5] error bit(1) and complete bit(0) ,TBD + if((rxdata[PSOC_I2C_STATUS] & 0x2) == 0x2) { + //printk("i2c bridge fail!!!\n"); + timeout = 0; + break; + } + if((rxdata[PSOC_I2C_STATUS] & PSOC_I2C_START) == 0) { + /* comand complete */ + psoc_i2c_read(client, &rxdata[PSOC_I2C_DATA+alen], PSOC_I2C_DATA+alen, len); + break; + } + + //delay + msleep(20); + } while(timeout--); + + if(timeout <= 0) { + return -1; + } + + //--------------------------------------------------------------------- + + for(index=0; index < len; index++) { + data[index] = rxdata[PSOC_I2C_DATA + alen + index]; + } + + return 0; +} + + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu1 | psu0 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu_st(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 0)?3:0; + + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client, &byte, PSOC_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + +/*-----------------------------------------------------------------------*/ + +/* sysfs attributes for hwmon */ + +static ssize_t show_thermal(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index * 2 + THERMAL_OFFSET; + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, offset); + status = __swab16(status); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + (s8)(status>>8) * 1000 ); +} + + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t set_pwm(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index; + + u8 pwm = simple_strtol(buf, NULL, 10); + if(pwm > 255) pwm = 255; + + if(data->diag) { + mutex_lock(&data->update_lock); + psoc_i2c_write(client, &pwm, offset, 1); + mutex_unlock(&data->update_lock); + } + + return count; +} + + +static ssize_t show_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index; + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, offset); + status = __swab16(status); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + status); +} +static ssize_t show_fan_type(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 index = attr->index; + int type = -1; + + mutex_lock(&data->update_lock); + status = psoc_read8(client, FAN_GPI_OFFSET); + mutex_unlock(&data->update_lock); + + if( (status & 1<update_lock); + status = psoc_i2c_read(client, (u8*)&temp, SWITCH_TMP_OFFSET, 2); + status = __swab16(status); + mutex_unlock(&data->update_lock); + + status = sprintf (buf, "%d\n", (s8)(temp>>8) * 1000 ); + + return strlen(buf); +} + +static ssize_t set_switch_tmp(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + long temp = simple_strtol(buf, NULL, 10); + u16 temp2 = ( (temp/1000) <<8 ) & 0xFF00 ; + + //printk("set_switch_tmp temp=%d, temp2=0x%x (%x,%x)\n", temp, temp2, ( ( (temp/1000) <<8 ) & 0xFF00 ), (( (temp%1000) / 10 ) & 0xFF)); + + mutex_lock(&data->update_lock); + psoc_i2c_write(client, (u8*)&temp2, SWITCH_TMP_OFFSET, 2); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_diag(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 diag_flag = 0; + + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client, (u8*)&diag_flag, DIAG_FLAG_OFFSET, 1); + mutex_unlock(&data->update_lock); + + data->diag = (diag_flag & 0x80)?1:0; + status = sprintf (buf, "%d\n", data->diag); + + return strlen(buf); +} + +static ssize_t set_diag(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 value = 0; + u8 diag = simple_strtol(buf, NULL, 10); + + diag = diag?1:0; + data->diag = diag; + + mutex_lock(&data->update_lock); + psoc_i2c_read(client, (u8*)&value, DIAG_FLAG_OFFSET, 1); + if(diag) value |= (1<<7); + else value &= ~(1<<7); + psoc_i2c_write(client, (u8*)&value, DIAG_FLAG_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, VERSION_OFFSET); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "ver: %x.%x\n", (status & 0xFF00)>>8, (status & 0xFF) ); +} + + +static ssize_t show_fan_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 bit = attr->index; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, FAN_LED_OFFSET); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + (status & (1<index; + u8 led_state = 0; + + u8 v = simple_strtol(buf, NULL, 10); + + if(data->diag) { + mutex_lock(&data->update_lock); + led_state = psoc_read8(client, FAN_LED_OFFSET); + if(v) led_state |= (1<update_lock); + } + + return count; +} + +static ssize_t show_value8(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "0x%02X\n", status ); +} + +static long pmbus_reg2data_linear(int data, int linear16) +{ + s16 exponent; + s32 mantissa; + long val; + + if (linear16) { /* LINEAR16 */ + exponent = -9; + mantissa = (u16) data; + } else { /* LINEAR11 */ + exponent = ((s16)data) >> 11; + exponent = ((s16)( data & 0xF800) ) >> 11; + mantissa = ((s32)((data & 0x7ff) << 5)) >> 5; + } + + //printk("data=%d, m=%d, e=%d\n", data, exponent, mantissa); + val = mantissa; + + /* scale result to micro-units for power sensors */ + val = val * 1000L; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +static ssize_t show_psu(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 reg = attr->index & 0xFF; + u8 len = ((attr->index & 0xFF00) >> 8); + u8 chip = (attr->index >> 16)? 0x59:0x58; + u8 bus = 1; + unsigned char value[2] = {0,0};; + + if (len == 2) + { + mutex_lock(&data->update_lock); + psoc_i2c_bridge_read(client, bus, chip, ®, 1, value, 2); + mutex_unlock(&data->update_lock); + + status = value[1]<<8 | value[0]; + //status1 = value[1]<<8 | value[0]; + + return sprintf(buf, "%ld\n", pmbus_reg2data_linear(status, (reg==PMBUS_READ_VOUT)?1:0) ); + } + else + { //len is not defined. + u8 tmpbuf[32]; + mutex_lock(&data->update_lock); + //length of block read + psoc_i2c_bridge_read(client, bus, chip, ®, 1, &len, 1); + //data included length + psoc_i2c_bridge_read(client, bus, chip, ®, 1, tmpbuf, len+1); + mutex_unlock(&data->update_lock); + + memcpy(buf, tmpbuf+1, len); + buf[len]='\n'; + + return len+1; + } +} + +static ssize_t show_psu_psoc(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index + PSU_INFO_OFFSET; + + mutex_lock(&data->update_lock); + status = psoc_read16(client, offset); + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%ld \n", pmbus_reg2data_linear(status, strstr(attr->dev_attr.attr.name, "vout")? 1:0 )); +} + + +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_thermal, 0, 0); +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_thermal, 0, 1); +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_thermal, 0, 2); +static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_thermal, 0, 3); +static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_thermal, 0, 4); +static SENSOR_DEVICE_ATTR(thermal_psu1, S_IRUGO, show_thermal, 0, 5); +static SENSOR_DEVICE_ATTR(thermal_psu2, S_IRUGO, show_thermal, 0, 6); + +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+0); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+1); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+2); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+3); +#if (FAN_NUM >= 5) +static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_OFFSET+4); +#endif +static SENSOR_DEVICE_ATTR(pwm_psu1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_PSU_OFFSET+0); +static SENSOR_DEVICE_ATTR(pwm_psu2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, PWM_PSU_OFFSET+1); + +static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu_st, 0, 0); +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu_st, 0, 1); + +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_rpm, 0, 0*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_rpm, 0, 1*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_rpm, 0, 2*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_rpm, 0, 3*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_rpm, 0, 4*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_rpm, 0, 5*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_rpm, 0, 6*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_rpm, 0, 7*2 + RPM_OFFSET); +#if (FAN_NUM >= 5) +static SENSOR_DEVICE_ATTR(fan9_input, S_IRUGO, show_rpm, 0, 8*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan10_input, S_IRUGO, show_rpm, 0, 9*2 + RPM_OFFSET); +#endif +static SENSOR_DEVICE_ATTR(rpm_psu1, S_IRUGO, show_rpm, 0, 8*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(rpm_psu2, S_IRUGO, show_rpm, 0, 9*2 + RPM_OFFSET); + +static SENSOR_DEVICE_ATTR(switch_tmp, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); +static SENSOR_DEVICE_ATTR(temp6_input, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); + +static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, 0, 0); + +static SENSOR_DEVICE_ATTR(fan_led_grn1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 0); +static SENSOR_DEVICE_ATTR(fan_led_grn2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 1); +static SENSOR_DEVICE_ATTR(fan_led_grn3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 2); +static SENSOR_DEVICE_ATTR(fan_led_grn4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 3); +static SENSOR_DEVICE_ATTR(fan_led_red1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 4); +static SENSOR_DEVICE_ATTR(fan_led_red2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 5); +static SENSOR_DEVICE_ATTR(fan_led_red3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 6); +static SENSOR_DEVICE_ATTR(fan_led_red4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 7); + +static SENSOR_DEVICE_ATTR(fan_gpi, S_IRUGO, show_value8, 0, FAN_GPI_OFFSET); +static SENSOR_DEVICE_ATTR(fan1_type, S_IRUGO, show_fan_type, 0, 0); +static SENSOR_DEVICE_ATTR(fan2_type, S_IRUGO, show_fan_type, 0, 1); +static SENSOR_DEVICE_ATTR(fan3_type, S_IRUGO, show_fan_type, 0, 2); +static SENSOR_DEVICE_ATTR(fan4_type, S_IRUGO, show_fan_type, 0, 3); + +static SENSOR_DEVICE_ATTR(psu1_vin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_VIN); +static SENSOR_DEVICE_ATTR(psu1_vout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_VOUT); +static SENSOR_DEVICE_ATTR(psu1_iin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_IIN); +static SENSOR_DEVICE_ATTR(psu1_iout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_IOUT); +static SENSOR_DEVICE_ATTR(psu1_pin, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_PIN); +static SENSOR_DEVICE_ATTR(psu1_pout, S_IRUGO, show_psu, 0, (0<<16) | (2<<8) | PMBUS_READ_POUT); + +static SENSOR_DEVICE_ATTR(psu1_vendor, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_ID); +static SENSOR_DEVICE_ATTR(psu1_model, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu1_version, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu1_date, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_DATE); +static SENSOR_DEVICE_ATTR(psu1_sn, S_IRUGO, show_psu, 0, (0<<16) | (0<<8) | PMBUS_MFR_SERIAL); + +static SENSOR_DEVICE_ATTR(psu2_vin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_VIN); +static SENSOR_DEVICE_ATTR(psu2_vout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_VOUT); +static SENSOR_DEVICE_ATTR(psu2_iin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_IIN); +static SENSOR_DEVICE_ATTR(psu2_iout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_IOUT); +static SENSOR_DEVICE_ATTR(psu2_pin, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_PIN); +static SENSOR_DEVICE_ATTR(psu2_pout, S_IRUGO, show_psu, 0, (1<<16) | (2<<8) | PMBUS_READ_POUT); + +static SENSOR_DEVICE_ATTR(psu2_vendor, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_ID); +static SENSOR_DEVICE_ATTR(psu2_model, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu2_version, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu2_date, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_DATE); +static SENSOR_DEVICE_ATTR(psu2_sn, S_IRUGO, show_psu, 0, (1<<16) | (0<<8) | PMBUS_MFR_SERIAL); + +static SENSOR_DEVICE_ATTR(psoc_psu1_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pout)); + + +static SENSOR_DEVICE_ATTR(psoc_psu2_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pout)); + +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); + + + +static struct attribute *psoc_attributes[] = { + //thermal + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_temp4_input.dev_attr.attr, + &sensor_dev_attr_temp5_input.dev_attr.attr, + + &sensor_dev_attr_thermal_psu1.dev_attr.attr, + &sensor_dev_attr_thermal_psu2.dev_attr.attr, + + + //pwm + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, +#if (FAN_NUM >= 5) + //&sensor_dev_attr_pwm5.dev_attr.attr, +#endif + &sensor_dev_attr_pwm_psu1.dev_attr.attr, + &sensor_dev_attr_pwm_psu2.dev_attr.attr, + + //rpm + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_fan8_input.dev_attr.attr, +#if (FAN_NUM >= 5) + //&sensor_dev_attr_fan9_input.dev_attr.attr, + //&sensor_dev_attr_fan10_input.dev_attr.attr, +#endif + + &sensor_dev_attr_rpm_psu1.dev_attr.attr, + &sensor_dev_attr_rpm_psu2.dev_attr.attr, + + //switch temperature + &sensor_dev_attr_switch_tmp.dev_attr.attr, + &sensor_dev_attr_temp6_input.dev_attr.attr, + + //diag flag + &sensor_dev_attr_diag.dev_attr.attr, + + //version + &sensor_dev_attr_version.dev_attr.attr, + + //fan led + &sensor_dev_attr_fan_led_grn1.dev_attr.attr, + &sensor_dev_attr_fan_led_grn2.dev_attr.attr, + &sensor_dev_attr_fan_led_grn3.dev_attr.attr, + &sensor_dev_attr_fan_led_grn4.dev_attr.attr, + &sensor_dev_attr_fan_led_red1.dev_attr.attr, + &sensor_dev_attr_fan_led_red2.dev_attr.attr, + &sensor_dev_attr_fan_led_red3.dev_attr.attr, + &sensor_dev_attr_fan_led_red4.dev_attr.attr, + + //fan GPI + &sensor_dev_attr_fan_gpi.dev_attr.attr, + + //fan type + &sensor_dev_attr_fan1_type.dev_attr.attr, + &sensor_dev_attr_fan2_type.dev_attr.attr, + &sensor_dev_attr_fan3_type.dev_attr.attr, + &sensor_dev_attr_fan4_type.dev_attr.attr, + + //psu + &sensor_dev_attr_psu1_vin.dev_attr.attr, + &sensor_dev_attr_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psu1_iin.dev_attr.attr, + &sensor_dev_attr_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psu1_pin.dev_attr.attr, + &sensor_dev_attr_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psu2_vin.dev_attr.attr, + &sensor_dev_attr_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psu2_iin.dev_attr.attr, + &sensor_dev_attr_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psu2_pin.dev_attr.attr, + &sensor_dev_attr_psu2_pout.dev_attr.attr, + + &sensor_dev_attr_psu1_vendor.dev_attr.attr, + &sensor_dev_attr_psu1_model.dev_attr.attr, + &sensor_dev_attr_psu1_version.dev_attr.attr, + &sensor_dev_attr_psu1_date.dev_attr.attr, + &sensor_dev_attr_psu1_sn.dev_attr.attr, + &sensor_dev_attr_psu2_vendor.dev_attr.attr, + &sensor_dev_attr_psu2_model.dev_attr.attr, + &sensor_dev_attr_psu2_version.dev_attr.attr, + &sensor_dev_attr_psu2_date.dev_attr.attr, + &sensor_dev_attr_psu2_sn.dev_attr.attr, + + &sensor_dev_attr_psu0.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + + //psu_psoc, new added on psoc 1.9 + &sensor_dev_attr_psoc_psu1_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pout.dev_attr.attr, + + // Add new fields which matching standard + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + + NULL +}; + +static const struct attribute_group psoc_group = { + .attrs = psoc_attributes, +}; + +/*-----------------------------------------------------------------------*/ + +/* device probe and removal */ + +static int +psoc_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct psoc_data *data; + int status; + + printk("+%s\n", __func__); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct psoc_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->diag = 0; + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &psoc_group); + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &psoc_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int psoc_remove(struct i2c_client *client) +{ + struct psoc_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &psoc_group); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id psoc_ids[] = { + { "inv_psoc", 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, psoc_ids); + +static struct i2c_driver psoc_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_psoc", + }, + .probe = psoc_probe, + .remove = psoc_remove, + .id_table = psoc_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_psoc_init(void) +{ + return i2c_add_driver(&psoc_driver); +} + +static void __exit inv_psoc_exit(void) +{ + i2c_del_driver(&psoc_driver); +} + +MODULE_AUTHOR("eddie.lan "); +MODULE_DESCRIPTION("inv psoc driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_psoc_init); +module_exit(inv_psoc_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_pthread.c b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_pthread.c new file mode 100644 index 00000000000..b0f905d6a7d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_pthread.c @@ -0,0 +1,1305 @@ +/***************************** + Redwood platform +******************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define SHOW_ATTR_WARNING ("N/A") +#define SHOW_ATTR_NOTPRINT ("Not Available") +#define SHOW_ATTR_NOTSUPPORT ("Not Support") + +#define INV_HWMID_MAX (10) +#define INV_HWMID_INIT (-1) + +/*access userspace data to kernel space*/ +#define ACC_R (0) +#define ACC_W (1) + +#define TINY_BUF_SIZE (8) +#define MAX_PATH_SIZE (64) +#define MIN_ACC_SIZE (32) +#define MAX_ACC_SIZE (256) + +/* + * LED definitions + */ +#define STATUS_LED_MODE_AUTO 0 +#define STATUS_LED_MODE_DIAG 1 +#define STATUS_LED_MODE_MANU 2 + +#define STATUS_LED_GRN0 10 // 0 - 000: off +#define STATUS_LED_GRN1 11 // 1 - 001: 0.5hz +#define STATUS_LED_GRN2 12 // 2 - 010: 1 hz +#define STATUS_LED_GRN3 13 // 3 - 011: 2 hz +#define STATUS_LED_GRN7 17 // 7 - 111: on +#define STATUS_LED_RED0 20 // 0 - 000: off +#define STATUS_LED_RED1 21 // 1 - 001: 0.5hz +#define STATUS_LED_RED2 22 // 2 - 010: 1 hz +#define STATUS_LED_RED3 23 // 3 - 011: 2 hz +#define STATUS_LED_RED7 27 // 7 - 111: on +#define STATUS_LED_INVALID 0 // Invalid + +ssize_t status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2); +ssize_t status_led_grn(const char *freq); +ssize_t status_led_red(const char *freq); +ssize_t status_led_diag_mode_enable(void); +ssize_t status_led_diag_mode_disable(void); +int status_led_check_color(void); +int status_led_check_diag_mode(void); + +#if 1 +/* For timestamps in SYSFS_LOG */ +#define SYSFS_LOG printk +#else +//#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[SYSFS] %s/%d: " fmt, __func__, __LINE__, ##args) +#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[p_thread] " fmt, ##args) +#endif + +#define INV_PTHREAD_KERNEL_MODULE (1) +#define SWITCH_HEALTH_LED_CHANGE_VIA_GPIO (1) + +/* inventec_class *********************************/ +static struct kobject *status_kobj; +static struct kset *status_kset; + + +static struct mutex rw_lock; + +static int hwm_psoc = INV_HWMID_INIT; +static int hwm_cpld = INV_HWMID_INIT; + +int get_hwm_psoc(void) +{ + return hwm_psoc; +} + +int get_hwm_cpld(void) +{ + return hwm_cpld; +} + +static ssize_t access_user_space(const char *name, int mode, char *buf, size_t len, loff_t offset) +{ + struct file *fp; + mm_segment_t fs; + loff_t pos = offset; + char *mark = NULL; + ssize_t vfs_ret = 0; + + if (mode == ACC_R) { + fp = filp_open(name, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_read(fp, buf, len, &pos); + + mark = strpbrk(buf, "\n"); + if (mark) + *mark = '\0'; + + filp_close(fp, NULL); + set_fs(fs); + } else if (mode == ACC_W) { + fp = filp_open(name, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_write(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + } + + return vfs_ret; +} + +int inventec_strtol(const char *sbufp, char **endp, unsigned int base) +{ + char *endptr; + int value = simple_strtol(sbufp, &endptr, base); + if (value == 0 && sbufp == endptr) { + *endp = NULL; + return value; + } + *endp = (char*)1; + return value; +} + +int inventec_singlechar_to_int(const char c) +{ + if ((c >= '0') && (c <= '9')) { + return (c - '0'); + } + else + if ((c >= 'a') && (c <= 'f')) { + return (c - 'a' + 10); + } + else + if ((c >= 'A') && (c <= 'F')) { + return (c - 'A' + 10); + } + return -1; +} + +int inventec_store_input(char *inputp, int count) +{ + int i = 0; + while(inputp[i] != '\n' && inputp[i] != '\0' && i < count) { + i++; + } + inputp[i] = '\0'; + return strlen(inputp); +} + +#if 0 +/* + * Time stamps for kernel log on yocto + */ +#include + +void SYSFS_LOG(char *fmt, ...) +{ + char buf[80], ts[32]; + va_list args; + int hlen; + + inventec_tmstmp(&ts[0]); + hlen = sprintf(buf, "[SYSFS] %s ", ts); // Do not edit this line + + va_start(args, fmt); + vsprintf(&buf[hlen-1], fmt, args); + va_end(args); + printk(KERN_WARNING "[p_thread] %s\n", buf); +} +#endif + +ssize_t +inventec_show_attr(char *buf_p, const char *invdevp) +{ + int inv_len = MAX_ACC_SIZE; /* INV driver return max length */ + char tmp_buf[MAX_ACC_SIZE]; + char *str_negative = "-", *mark = NULL; + + /* [Step2] Get data by uaccess */ + memset(tmp_buf, 0, sizeof(tmp_buf)); + mutex_lock(&rw_lock); + if (access_user_space(invdevp, ACC_R, tmp_buf, inv_len, 0) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + mutex_unlock(&rw_lock); + + /* [Step3] Check return value + * - Ex: When transceiver not plugged + * => SWPS return error code "-202" + * => Pic8 need return "NA" (assume) + */ + if (strcspn(tmp_buf, str_negative) == 0) { + /* error case: "-202" */ + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + + /* OK case:*/ + mark = strpbrk(tmp_buf, "\n"); + if (mark) { *mark = '\0'; } + + return sprintf(buf_p, "%s\n", tmp_buf); +} + +ssize_t +inventec_store_attr(const char *buf_p, size_t count, const char *invdevp) +{ + ssize_t ret = 0; + + /* [Step2] Get data by uaccess */ + mutex_lock(&rw_lock); + if ((ret = access_user_space(invdevp, ACC_W, (char*)buf_p, count, 0)) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return -EINVAL; + } + mutex_unlock(&rw_lock); + + /* OK case:*/ + return ret; +} + +int sysfs_detect_hwmon_index(void) +{ + char hwmon_buf[MAX_ACC_SIZE]; + char hwmon_path[MAX_PATH_SIZE]; + int hwid = 0; + + for (hwid = 0; + hwid < INV_HWMID_MAX && (hwm_psoc == INV_HWMID_INIT || hwm_cpld == INV_HWMID_INIT); + hwid++) { + memset(hwmon_buf, 0, sizeof(hwmon_buf)); + sprintf(hwmon_path, "/sys/class/hwmon/hwmon%d/device/name", hwid); + + inventec_show_attr(hwmon_buf, hwmon_path); + if (strncmp(hwmon_buf, "inv_psoc", 8) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_bmc", 7) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_cpld", 8) == 0) { + hwm_cpld = hwid; + } + } + if (hwid >= INV_HWMID_MAX) { + printk(KERN_ERR "[p_thread] detect hwmon index failed, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return -1; + } + printk(KERN_INFO "[p_thread] detect hwmon index success, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return 0; +} + +static int __init +inventec_class_init(void) +{ + mutex_init(&rw_lock); + +#ifdef INV_PTHREAD_KERNEL_MODULE + if (sysfs_detect_hwmon_index() < 0) { + return -1; + } +#endif + + printk(KERN_INFO "[p_thread] [%s/%d] Module initial success.\n",__func__,__LINE__); + + return 0; +} + +static void __exit +inventec_class_exit(void) +{ + printk(KERN_INFO "[p_thread] [%s/%d] Remove module.\n",__func__,__LINE__); +} + +/* fan device *************************************/ +#define FAN_DEV_PATH_STATE "/sys/class/hwmon/hwmon%d/device/fan_gpi" +#define FAN_DEV_PATH_FAN1_INPUT "/sys/class/hwmon/hwmon%d/device/fan1_input" +#define FAN_DEV_PATH_FAN2_INPUT "/sys/class/hwmon/hwmon%d/device/fan2_input" +#define FAN_DEV_PATH_FAN3_INPUT "/sys/class/hwmon/hwmon%d/device/fan3_input" +#define FAN_DEV_PATH_FAN4_INPUT "/sys/class/hwmon/hwmon%d/device/fan4_input" +#define FAN_DEV_PATH_FAN5_INPUT "/sys/class/hwmon/hwmon%d/device/fan5_input" +#define FAN_DEV_PATH_FAN6_INPUT "/sys/class/hwmon/hwmon%d/device/fan6_input" +#define FAN_DEV_PATH_FAN7_INPUT "/sys/class/hwmon/hwmon%d/device/fan7_input" +#define FAN_DEV_PATH_FAN8_INPUT "/sys/class/hwmon/hwmon%d/device/fan8_input" + +static char fan_dev_path_state[MAX_PATH_SIZE]; +static char fan_dev_path_fan1_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan2_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan3_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan4_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan5_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan6_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan7_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan8_input[MAX_PATH_SIZE]; + +void sysfs_fan_path_init(void) +{ + sprintf(&fan_dev_path_state[0], FAN_DEV_PATH_STATE, get_hwm_psoc()); + sprintf(&fan_dev_path_fan1_input[0],FAN_DEV_PATH_FAN1_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan2_input[0],FAN_DEV_PATH_FAN2_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan3_input[0],FAN_DEV_PATH_FAN3_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan4_input[0],FAN_DEV_PATH_FAN4_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan5_input[0],FAN_DEV_PATH_FAN5_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan6_input[0],FAN_DEV_PATH_FAN6_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan7_input[0],FAN_DEV_PATH_FAN7_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan8_input[0],FAN_DEV_PATH_FAN8_INPUT, get_hwm_psoc()); +} + +#define FAN_STATE_NORMAL "normal" +#define FAN_STATE_FAULTY "faulty" +#define FAN_STATE_UNINSTALLED "uninstalled" +#define FAN_STATE_UNKNOW "unknown state" +#define FAN_STATE_INVALID "Invalid state value" +#define FAN_STATE_READ_ERROR "state read error" + +#define FAN_LOG_UNINSTALLED "removed" +#define FAN_LOG_NORMAL "inserted" + +//#define FAN_STATE_BIT_NORMAL 0 +#define FAN_STATE_BIT_FAULTY 0 +#define FAN_STATE_BIT_UNINSTALLED 1 +#define FAN_STATE_BIT_UNKNOW 2 +#define FAN_STATE_BIT_INVALID 3 +#define FAN_STATE_BIT_READ_ERROR 4 + +static struct fans_tbl_s { + char *fan_name; + char *fan_front; + char *fan_rear; + unsigned int fan_state; +} fans_tbl[] = { + {"fan1", fan_dev_path_fan1_input, + fan_dev_path_fan2_input, 0}, + {"fan2", fan_dev_path_fan3_input, + fan_dev_path_fan4_input, 0}, + {"fan3", fan_dev_path_fan5_input, + fan_dev_path_fan6_input, 0}, + {"fan4", fan_dev_path_fan7_input, + fan_dev_path_fan8_input, 0}, +}; +#define FAN_TBL_TOTAL ( sizeof(fans_tbl)/ sizeof(const struct fans_tbl_s) ) + +#define FAN_STATE_CHECK(i,b) (fans_tbl[i].fan_state & (1< 0) + { + printk(KERN_ERR "[p_thread] All fans failed.\n"); + printk(KERN_ERR "[p_thread] System shutdown immediately in %d seconds.\n", cd_shutdown); + } + cd_shutdown -= 1; + } + return ret; +} + +/* End of faninfo_device */ + +static int __init +fan_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_fan_path_init(); +#endif + return 0; +} + + +static void __exit +fan_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove fan module.\n"); +} + +/* psu device *************************************/ +static unsigned int psu_voltin = 0; +#define PSU_VOLTIN_ACDC (70000) + +/* + * normal/unpower/uninstall/fault are PSU states output from driver level + * checkpsu/error are defined by sysfs + */ +#define PSU_STATE_VAL_NORMAL (0) +#define PSU_STATE_VAL_UNPOWER (2) +#define PSU_STATE_VAL_FAULT (4) +#define PSU_STATE_VAL_UNINSTALL (7) +#define PSU_STATE_VAL_CHECKPSU (8) +#define PSU_STATE_VAL_ERROR (9) + +#define PSU_STATE_NORMAL ("0 : normal") +#define PSU_STATE_UNPOWER ("2 : unpowered") +#define PSU_STATE_FAULT ("4 : fault") +#define PSU_STATE_UNINSTALL ("7 : not installed") +#define PSU_STATE_CHECKPSU ("8 : check psu") +#define PSU_STATE_ERROR ("9 : state error") + +#define PSU_STATE_LEN_NORMAL (strlen(PSU_STATE_NORMAL)) +#define PSU_STATE_LEN_UNPOWER (strlen(PSU_STATE_UNPOWER)) +#define PSU_STATE_LEN_FAULT (strlen(PSU_STATE_FAULT)) +#define PSU_STATE_LEN_UNINSTALL (strlen(PSU_STATE_UNINSTALL)) +#define PSU_STATE_LEN_CHECKPSU (strlen(PSU_STATE_CHECKPSU)) + +typedef struct { + char *inv_dev_attrp; + char *inv_dev_pathp; +} psu_dev_t; + +typedef struct { + const char *psu_name; + int psu_major; + dev_t psu_devt; + struct device *psu_dev_p; + psu_dev_t *psu_dev_namep; + int psu_dev_total; + char *psu_inv_pathp; + void *psu_tracking; + char *psu_currentin; + char *psu_currentout; + char *psu_powerin; + char *psu_powerout; + char *psu_voltin; + char *psu_voltout; +} psu_dev_group_t; + +#define PSU_DEV_PATH_TEMPLATE "/sys/class/hwmon/hwmon%d/device/%s" + +static char psu_dev_path_state[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltin[MAX_PATH_SIZE]; +#if 0 +static char psu_dev_path_vendor[MAX_PATH_SIZE]; +static char psu_dev_path_version[MAX_PATH_SIZE]; +static char psu_dev_path_sn[MAX_PATH_SIZE]; +static char psu_dev_path_temperature[MAX_PATH_SIZE]; +static char psu_dev_path_fan_speed[MAX_PATH_SIZE]; +static char psu_dev_path_fan_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_fan_faulty[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_psu_rpm[MAX_PATH_SIZE]; +#endif + +void sysfs_psu_path_init(void) +{ + sprintf(&psu_dev_path_state[0], PSU_DEV_PATH_TEMPLATE, get_hwm_cpld(), "\%s" ); + sprintf(&psu_dev_path_psu_voltin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#if 0 + sprintf(&psu_dev_path_vendor[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_version[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_sn[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_temperature[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_speed[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_faulty[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_voltout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_rpm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#endif +} + +static psu_dev_t psu_dev_name[] = { + { "state", psu_dev_path_state }, // Using cpld + { "psu_voltin", psu_dev_path_psu_voltin }, +#if 0 + { "vendor", psu_dev_path_vendor }, + { "version", psu_dev_path_version }, + { "sn", psu_dev_path_sn }, + { "temperature", psu_dev_path_temperature }, + { "fan_speed", psu_dev_path_fan_speed }, + { "fan_pwm", psu_dev_path_fan_pwm }, + { "fan_faulty", psu_dev_path_fan_faulty }, + { "psu_currentin", psu_dev_path_psu_currentin }, + { "psu_currentout", psu_dev_path_psu_currentout }, + { "psu_powerin", psu_dev_path_psu_powerin }, + { "psu_powerout", psu_dev_path_psu_powerout }, + { "psu_voltout", psu_dev_path_psu_voltout }, + { "psu_pwm", psu_dev_path_psu_pwm }, + { "psu_rpm", psu_dev_path_psu_rpm }, +#endif +}; +#define PSU_DEV_NAME_TOTAL ( sizeof(psu_dev_name) / sizeof(const psu_dev_t) ) + +static psu_dev_group_t psu_dev_group[] = { + { + .psu_name = "psu1", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, + { + .psu_name = "psu2", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, +}; +#define PSU_DEV_GROUP_TOTAL ( sizeof(psu_dev_group)/ sizeof(const psu_dev_group_t) ) + +static char psu_state[4][MIN_ACC_SIZE]; + +static struct psu_wire_tbl_s { + char *psu_attr; + char *psu_name; + char *psu_wire; + char *psu_state; +} psu_wire_tbl[] = { + { "state", "psu1", "psu0", psu_state[0] }, // Using cpld + { "state", "psu2", "psu1", psu_state[1] }, + { "psu_voltin", "psu1", "psoc_psu1_vin", psu_state[2] }, + { "psu_voltin", "psu2", "psoc_psu2_vin", psu_state[3] }, +}; +#define PSU_WIRE_TBL_TOTAL ( sizeof(psu_wire_tbl)/ sizeof(const struct psu_wire_tbl_s) ) + +static char * +psu_attr_get_wirep(const char *psu_attrp, const char *psu_namep, char **psu_statepp) +{ + int i; + + for (i = 0; i < PSU_WIRE_TBL_TOTAL; i++) { + if (strncmp(psu_wire_tbl[i].psu_attr, psu_attrp, strlen(psu_attrp)) == 0 && + strncmp(psu_wire_tbl[i].psu_name, psu_namep, strlen(psu_namep)) == 0) { + if (psu_statepp) { + *psu_statepp = psu_wire_tbl[i].psu_state; + } + return psu_wire_tbl[i].psu_wire; + } + } + return NULL; +} + +int psu_check_state_normal(char *statep) +{ + if (strstr(statep, "normal")) { + return 1; + } + return 0; +} + +#define PSU_ATTR_VOLTIN ("psu_voltin") +#define PSU_ATTR_VOLTIN_LEN (10) + +/* Get PSU voltin for determon AC(110v) or DC(48v) */ +void psu_get_voltin(void) +{ + char acc_path[MAX_PATH_SIZE], volt[MIN_ACC_SIZE]; + psu_dev_t *devnamep; + unsigned int voltin; + char *invwirep; + int i, j; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + //psu_dev_group[i].psu_name; + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_VOLTIN, PSU_ATTR_VOLTIN_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_VOLTIN, psu_dev_group[i].psu_name, NULL); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_DEBUG "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(volt, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + continue; + } + else { + voltin = simple_strtol(&volt[0], NULL, 10); + printk(KERN_DEBUG "[p_thread] Read %s %s = %u\n",acc_path,volt,voltin); + if (voltin > psu_voltin) { + psu_voltin = voltin; + } + } + } + } + } + + SYSFS_LOG("[p_thread] PSU voltin = %u\n", psu_voltin); +} + +#define PSU_ATTR_STATE ("state") +#define PSU_ATTR_STATE_LEN (5) + +/* psus_control() by inv_thread */ +int psus_control(int log_only) +{ + char acc_path[MAX_PATH_SIZE], state[MIN_ACC_SIZE]; + psu_dev_t *devnamep = NULL; + char *invwirep = NULL; + char *psu_statep = NULL; + int i, j, flag = 0; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_STATE, PSU_ATTR_STATE_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_STATE, psu_dev_group[i].psu_name, &psu_statep); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_INFO "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(state, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + if (strncmp(psu_statep, PSU_STATE_ERROR, strlen(PSU_STATE_ERROR)) != 0) { + strcpy(psu_statep, PSU_STATE_ERROR); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_ERROR); + } + flag = 1; + } + else + if (strstr(state, "normal")) { + //printk(KERN_INFO "[p_thread] %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + } + else + if (psu_voltin > PSU_VOLTIN_ACDC) { /* AC PSUS */ + //printk(KERN_INFO "[p_thread] RYU: %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + flag = 1; + } + else { /* DC PSUS */ + if (strncmp(psu_statep, PSU_STATE_CHECKPSU, PSU_STATE_LEN_CHECKPSU) != 0) { + strcpy(psu_statep, PSU_STATE_CHECKPSU); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_CHECKPSU); + } + flag = 1; + } + } + } + } + + if (log_only) { + return 0; + } + + //SYSFS_LOG("[p_thread] RYU: %s: flag = %d\n",psu_wire_tbl[i].psu_name,flag); + if (flag == 1) { + status_led_grn("3"); + return 1; + } + return 0; +} + +/* End of psuinfo_device */ + +static int __init +psu_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_psu_path_init(); +#endif + return 0; +} + + +static void __exit +psu_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove psu module.\n"); +} + +/* led device *************************************/ +#define STATUS_LED_GRN_PATH "/sys/class/hwmon/hwmon%d/device/grn_led" +#define STATUS_LED_RED_PATH "/sys/class/hwmon/hwmon%d/device/red_led" + +#define FAN_LED_GRN1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn1" +#define FAN_LED_GRN2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn2" +#define FAN_LED_GRN3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn3" +#define FAN_LED_GRN4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn4" +#define FAN_LED_RED1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red1" +#define FAN_LED_RED2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red2" +#define FAN_LED_RED3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red3" +#define FAN_LED_RED4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red4" + +#define HWMON_DEVICE_DIAG_PATH "/sys/class/hwmon/hwmon%d/device/diag" +#define HWMON_DEVICE_CTRL_PATH "/sys/class/hwmon/hwmon%d/device/ctl" + +static char status_led_grn_path[MAX_PATH_SIZE]; +static char status_led_red_path[MAX_PATH_SIZE]; +static char fan_led_grn1_path[MAX_PATH_SIZE]; +static char fan_led_grn2_path[MAX_PATH_SIZE]; +static char fan_led_grn3_path[MAX_PATH_SIZE]; +static char fan_led_grn4_path[MAX_PATH_SIZE]; +static char fan_led_red1_path[MAX_PATH_SIZE]; +static char fan_led_red2_path[MAX_PATH_SIZE]; +static char fan_led_red3_path[MAX_PATH_SIZE]; +static char fan_led_red4_path[MAX_PATH_SIZE]; +static char hwmon_device_diag_path[MAX_PATH_SIZE]; +static char hwmon_device_ctrl_path[MAX_PATH_SIZE]; + +void sysfs_led_path_init(void) +{ + sprintf(&status_led_grn_path[0], STATUS_LED_GRN_PATH, get_hwm_cpld()); + sprintf(&status_led_red_path[0], STATUS_LED_RED_PATH, get_hwm_cpld()); + sprintf(&fan_led_grn1_path[0], FAN_LED_GRN1_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn2_path[0], FAN_LED_GRN2_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn3_path[0], FAN_LED_GRN3_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn4_path[0], FAN_LED_GRN4_PATH, get_hwm_psoc()); + sprintf(&fan_led_red1_path[0], FAN_LED_RED1_PATH, get_hwm_psoc()); + sprintf(&fan_led_red2_path[0], FAN_LED_RED2_PATH, get_hwm_psoc()); + sprintf(&fan_led_red3_path[0], FAN_LED_RED3_PATH, get_hwm_psoc()); + sprintf(&fan_led_red4_path[0], FAN_LED_RED4_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_diag_path[0], HWMON_DEVICE_DIAG_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_ctrl_path[0], HWMON_DEVICE_CTRL_PATH, get_hwm_cpld()); +} + +/* return 0/off 1/green 2/red */ +int +status_led_check_color(void) +{ + char tmpbuf[MIN_ACC_SIZE]; + int ret = STATUS_LED_INVALID; + + if (inventec_show_attr(&tmpbuf[0], status_led_grn_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_GRN0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_GRN1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_GRN2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_GRN3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_GRN7; + } + return ret; + } + + if (inventec_show_attr(&tmpbuf[0], status_led_red_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_RED0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_RED1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_RED2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_RED3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_RED7; + } + return ret; + } + return ret; +} + +/* + * Store attr Section + */ +static DEFINE_MUTEX(diag_mutex); + +ssize_t status_led_diag_mode_enable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '0') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("1", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + mutex_unlock(&diag_mutex); + } + + return ret; +} + +ssize_t status_led_diag_mode_disable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '1') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("0", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + mutex_unlock(&diag_mutex); + } + return 1; +} + +ssize_t +status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2) +{ + ssize_t ret; + + ret = inventec_store_attr(tmp1, strlen(tmp1), path1); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(tmp2, strlen(tmp2), path2); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_red(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_grn_path[0]); + + if (ret < 0) { + return ret; + } + + ret = inventec_store_attr(freq, strlen(freq), &status_led_red_path[0]); + + if (ret < 0) { + return ret; + } + + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_grn(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +static int status_led_diag_mode = STATUS_LED_MODE_AUTO; + +int status_led_check_diag_mode(void) +{ + return status_led_diag_mode; +} + +/* End of ledinfo_device */ + +static int __init +led_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); +#endif + return 0; +} + + +static void __exit +led_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove led module.\n"); +} + +/* sensor device **********************************/ +#define SENSOR_DEV_PATH_SWITCH_TEMP "/sys/class/hwmon/hwmon%d/device/switch_tmp" + +static char sensor_dev_path_switch_temp[MAX_PATH_SIZE]; + +void sysfs_sensor_path_init(void) +{ + sprintf(&sensor_dev_path_switch_temp[0], SENSOR_DEV_PATH_SWITCH_TEMP, get_hwm_psoc()); +} + +void switch_temp_update(void) +{ + char buf[MIN_ACC_SIZE]; + ssize_t count = inventec_show_attr(&buf[0], "proc/switch/temp"); + if (count > 0) { + //printk(KERN_ERR "[p_thread] [STEMP] Switch temperature is out of range: %d\n", stemp); + inventec_store_attr(&buf[0], count, sensor_dev_path_switch_temp); + } +} + +/**************************************************/ +/* From system_device */ +static int inv_pthread_control = 1; + +int thread_control(void) +{ + return inv_pthread_control; +} + +void thread_control_set(int val) +{ + inv_pthread_control = val; +} +/* End system_device */ + +#define THREAD_SLEEP_MINS (3) +#define THREAD_DELAY_MINS (THREAD_SLEEP_MINS + THREAD_SLEEP_MINS + 1) + +extern void psu_get_voltin(void); + +static struct task_struct *thread_st; +static int thread_data; + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO +void led_set_gpio_to_change_status_led(void) +{ + ssize_t ret = inventec_store_attr("253", 3, "/sys/class/gpio/export"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 253 to /sys/class/gpio/export failed\n"); + return; + } + + printk("[p_thread] Write 253 to /sys/class/gpio/export\n"); + + ret = inventec_store_attr("out", 3, "/sys/class/gpio/gpio253/direction"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write low to /sys/class/gpio/gpio253/direction failed\n"); + return; + } + + //pull high and then low + ret = inventec_store_attr("1", 1, "sys/class/gpio/gpio253/value"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 1 to sys/class/gpio/gpio253/value failed\n"); + } + + //pull low + ret = inventec_store_attr("0", 1, "sys/class/gpio/gpio253/value"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 0 to sys/class/gpio/gpio253/value failed\n"); + } + + SYSFS_LOG("[p_thread] Set gpio to support status led change successfully\n"); +} +#endif + +// Function executed by kernel thread +static int thread_fn(void *unused) +{ + /* Delay for guarantee HW ready */ + ssleep(THREAD_DELAY_MINS); + +#ifndef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); + sysfs_fan_path_init(); + sysfs_psu_path_init(); +#endif + //sysfs_sensor_path_init(); + + /* Default status init */ + status_led_grn("7"); + + psu_get_voltin(); + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO + led_set_gpio_to_change_status_led(); +#endif + + while (1) + { + ssleep(THREAD_SLEEP_MINS); + + if (thread_control() == 0) { + printk(KERN_INFO "[p_thread] %s/%d: Thread Stop by inv_pthread control\n",__func__,__LINE__); + break; + } + + if (status_led_check_diag_mode() == STATUS_LED_MODE_MANU) { + /* status led in change color/freq mode, higher priority. Ignore fans sttaus */ + continue; + } + + // switch_temp_update(); + + if (fans_control() > 0) { + psus_control(1); + continue; + } + else + if (psus_control(0) > 0) { + continue; + } + + if (status_led_check_color() != STATUS_LED_GRN7) { /* status led red, change it to green */ + status_led_grn("7"); + } + } + +#ifndef INV_PTHREAD_KERNEL_MODULE +err_inv_pthread_fn_1: +#endif + do_exit(0); + printk(KERN_INFO "[p_thread] %s/%d: Thread Stopped\n",__func__,__LINE__); + return 0; +} + + +static ssize_t s_show(struct kobject *kobj, struct attribute *attr, char *buf) +{ + int fan_absence; + size_t count; + + fan_absence = fans_control(); + count += sprintf(&buf[count], "%d\n", fan_absence); + return count; +} + +static ssize_t s_store(struct kobject *kobj, struct attribute *attr, const char *buf, size_t count) +{ + return count; +} + +static struct attribute status_att = { + .name = "fan_absence", + .mode = 0777, +}; + +static const struct sysfs_ops status_ops = { + .show = s_show, + .store = s_store, +}; + +static struct kobj_type status_ktype = { + .sysfs_ops = &status_ops, +}; + + +static int __init inv_pthread_init(void) +{ + int retval; + + status_kobj = kzalloc(sizeof(*status_kobj), GFP_KERNEL); + if(!status_kobj) + return PTR_ERR(status_kobj); + + status_kset = kset_create_and_add("platform_status", NULL, kernel_kobj); + if(!status_kset) + return -1; + + status_kobj->kset = status_kset; + + retval = kobject_init_and_add(status_kobj, &status_ktype, NULL, "fan"); + if(retval) + return retval; + + retval = sysfs_create_file(status_kobj, &status_att); + + + inventec_class_init(); + fan_device_init(); + psu_device_init(); + led_device_init(); + + thread_control_set(1); + + printk(KERN_INFO "[p_thread] %s/%d: Creating Thread\n",__func__,__LINE__); + //Create the kernel thread with name 'inv_pthread' + thread_st = kthread_run(thread_fn, (void*)&thread_data, "inv_pthread"); + if (thread_st) + printk(KERN_INFO "[p_thread] inv_pthread Created successfully\n"); + else + printk(KERN_ERR "[p_thread] inv_pthread creation failed\n"); + + return retval; +} + +static void __exit inv_pthread_exit(void) +{ + thread_control_set(0); + /* Delay for guarantee thread exit */ + ssleep(THREAD_DELAY_MINS); + + fan_device_exit(); + psu_device_exit(); + led_device_exit(); + inventec_class_exit(); + + sysfs_remove_file(status_kobj, &status_att); + kset_unregister(status_kset); + kobject_del(status_kobj); + + printk(KERN_INFO "[p_thread] inv_pthread cleaning Up\n"); +} + +module_init(inv_pthread_init); +module_exit(inv_pthread_exit); + +MODULE_AUTHOR("Robert "); +MODULE_DESCRIPTION("Inventec Platform Management Thread"); +MODULE_VERSION("version 1.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_swps.c b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_swps.c new file mode 100644 index 00000000000..03ef85a0443 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_swps.c @@ -0,0 +1,618 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "inv_swps.h" + +static int port_major; +static int ioexp_total; +static int port_total; +static struct class *swp_class_p = NULL; +static struct inv_platform_s *platform_p = NULL; +static struct inv_ioexp_layout_s *ioexp_layout = NULL; +static struct inv_port_layout_s *port_layout = NULL; + +static int +__swp_match(struct device *dev, +#ifdef SWPS_KERN_VER_AF_3_10 + + const void *data){ +#else + void *data){ +#endif + + char *name = (char *)data; + if (strcmp(dev_name(dev), name) == 0) + return 1; + return 0; +} + + +struct device * +get_swpdev_by_name(char *name){ + struct device *dev = class_find_device(swp_class_p, + NULL, + name, + (const void *)__swp_match); + return dev; +} + + +static int +sscanf_2_int(const char *buf) { + + int result = -EBFONT; + char *hex_tag = "0x"; + + if (strcspn(buf, hex_tag) == 0) { + if (sscanf(buf,"%x",&result)) { + return result; + } + } else { + if (sscanf(buf,"%d",&result)) { + return result; + } + if(sscanf(buf,"-%d",&result)) { + return -result; + } + if (sscanf(buf,"%x",&result)) { + return result; + } + } + return -EBFONT; +} + + +static int +sscanf_2_binary(const char *buf) { + + int result = sscanf_2_int(buf); + + if (result < 0){ + return -EBFONT; + } + switch (result) { + case 0: + case 1: + return result; + default: + break; + } + return -EBFONT; +} + +/* ========== Show functions: For I/O Expander attribute ========== + */ +static ssize_t +_show_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*get_func)(struct ioexp_obj_s *ioexp_p, int voffset), + char *buf_p) { + size_t len; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR(" %s: data corruption! :%s\n", __func__, tobj_p->swp_name); + return -ENODATA; + } + mutex_lock(&ioexp_p->lock); + len = snprintf(buf_p, 8, "%d\n", get_func(ioexp_p, tobj_p->ioexp_virt_offset)); + mutex_unlock(&ioexp_p->lock); + return len; +} + + +static ssize_t +show_attr_present(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_present, + buf_p); +} + +static ssize_t +show_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_reset, + buf_p); +} + +static ssize_t +show_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_lpmod, + buf_p); +} + + +static ssize_t +show_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_modsel, + buf_p); +} + +/* ========== Store functions: For I/O Expander (R/W) attribute ========== + */ +static ssize_t +_store_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*set_func)(struct ioexp_obj_s *ioexp_p, + int virt_offset, int input_val), + const char *buf_p, + size_t count) { + + int input, err; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR("%s: data corruption! :%s\n", + __func__, tobj_p->swp_name); + return -ENODATA; + } + input = sscanf_2_binary(buf_p); + if (input < 0) { + return -EBFONT; + } + mutex_lock(&ioexp_p->lock); + err = set_func(ioexp_p, tobj_p->ioexp_virt_offset, input); + mutex_unlock(&ioexp_p->lock); + if (err < 0){ + return err; + } + return count; +} + +static ssize_t +store_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_reset, + buf_p, + count); +} + + +static ssize_t +store_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_lpmod, + buf_p, + count); +} + + +static ssize_t +store_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_modsel, + buf_p, + count); +} + +/* ========== IO Expander attribute: from expander ========== + */ +static DEVICE_ATTR(present, S_IRUGO, show_attr_present, NULL); +static DEVICE_ATTR(reset, S_IRUGO|S_IWUSR, show_attr_reset, store_attr_reset); +static DEVICE_ATTR(lpmod, S_IRUGO|S_IWUSR, show_attr_lpmod, store_attr_lpmod); +static DEVICE_ATTR(modsel, S_IRUGO|S_IWUSR, show_attr_modsel, store_attr_modsel); + +/* ========== Functions for module handling ========== + */ +static void +clean_port_obj(void){ + + dev_t dev_num; + char dev_name[32]; + struct device *device_p; + struct transvr_obj_s *transvr_obj_p; + int minor_curr, port_id; + + for (minor_curr=0; minor_curri2c_client_p); + kfree(transvr_obj_p); + } + dev_num = MKDEV(port_major, minor_curr); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static int +get_platform_type(void){ + + char log_msg[64] = "ERROR"; + + platform_p = kzalloc(sizeof(struct inv_platform_s), GFP_KERNEL); + if (!platform_p){ + snprintf(log_msg, sizeof(log_msg), "kzalloc fail"); + goto err_get_platform_type_1; + } + platform_p->id = PLATFORM_SETTINGS; + memset(platform_p->name, 0, sizeof(platform_p->name)); + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", platform_map.name); + snprintf(log_msg, sizeof(log_msg), + "User setup platform: %d (%s)", + platform_p->id, platform_p->name); + SWPS_DEBUG("%s: %s, :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return 0; + +err_get_platform_type_1: + SWPS_ERR("%s: %s :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return -1; +} + + +static int +get_layout_info(void){ + + ioexp_layout = redwood_ioexp_layout; + port_layout = redwood_port_layout; + ioexp_total = ARRAY_SIZE(redwood_ioexp_layout); + port_total = ARRAY_SIZE(redwood_port_layout); + + SWPS_INFO("Start to initial platform: %d (%s)\n", + platform_p->id, platform_p->name); + return 0; +} + +/* ========== Functions for register something ========== + */ + +static int +register_ioexp_attr_qsfp_1(struct device *device_p){ + /* Support machine type: + * - QSFP : Magnolia, Redwood, Hudson32i + * - QSFP+ : Magnolia, Redwood, Hudson32i + * - QSFP28: Redwood + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_reset) < 0) { + err_attr = "dev_attr_reset"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_lpmod) < 0) { + err_attr = "dev_attr_lpmod"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_modsel) < 0) { + err_attr = "dev_attr_modsel"; + goto err_ioexp_qsfp1_attr; + } + return 0; + +err_ioexp_qsfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + +static int +register_ioexp_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + char *err_msg = "ERR"; + + switch (transvr_obj->ioexp_obj_p->ioexp_type){ + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + if (register_ioexp_attr_qsfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_qsfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + default: + err_msg = "Unknow type"; + goto err_reg_ioexp_attr; + } + return 0; + +err_reg_ioexp_attr: + SWPS_ERR("%s: %s :%d \n", + __func__, err_msg, transvr_obj->ioexp_obj_p->ioexp_type); + return -1; +} + + +static int +register_port_device(char *dev_name, + dev_t dev_num, + struct transvr_obj_s *transvr_obj){ + + struct device *device_p = NULL; + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + transvr_obj, /* void *private_data */ + dev_name); /* const char *fmt */ + if (IS_ERR(device_p)){ + goto err_regswp_create_dev; + } + if (register_ioexp_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + return 0; + +err_regswp_reg_attr: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_regswp_create_dev: + SWPS_ERR("%s fail! :%s\n", __func__, dev_name); + return -1; +} + + +static int +register_swp_module(void){ + + dev_t port_devt = 0; + int dev_total = port_total + 1; /* char_dev for module control */ + + if (alloc_chrdev_region(&port_devt, 0, dev_total, SWP_CLS_NAME) < 0){ + SWPS_WARN("Allocate PORT MAJOR failure! \n"); + goto err_register_swp_module_3; + } + port_major = MAJOR(port_devt); + + /* Create class object */ + swp_class_p = class_create(THIS_MODULE, SWP_CLS_NAME); + if (IS_ERR(swp_class_p)) { + SWPS_ERR("Create class failure! \n"); + goto err_register_swp_module_3; + } + return 0; + +err_register_swp_module_3: + unregister_chrdev_region(MKDEV(port_major, 0), port_total); + return -1; +} + + +/* ========== Module initial relate ========== + */ +static int +create_ioexp_objs(void) { + + int i, run_mod; + + /* Clean IOEXP object */ + clean_ioexp_objs(); + /* Get running mode */ + run_mod = IOEXP_MODE_DIRECT; + /* Create IOEXP object */ + for(i=0; i devlen_max) { + snprintf(err_msg, sizeof(err_msg), + "SWP_DEV_PORT too long!"); + goto err_initport_create_tranobj; + } + memset(dev_name, 0, sizeof(dev_name)); + snprintf(dev_name, devlen_max, "%s%d", SWP_DEV_PORT, port_id); + /* Create transceiver object */ + ioexp_obj_p = get_ioexp_obj(ioexp_id); + if (!ioexp_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "IOEXP object:%d not exist", ioexp_id); + goto err_initport_create_tranobj; + } + transvr_obj_p = create_transvr_obj(dev_name, chan_id, ioexp_obj_p, + ioexp_virt_offset, transvr_type, + chipset_type, run_mod); + if (!transvr_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "Create transceiver object fail :%s", dev_name); + goto err_initport_create_tranobj; + } + /* Setup Lane_ID mapping */ + i = ARRAY_SIZE(port_layout[minor_curr].lane_id); + j = ARRAY_SIZE(transvr_obj_p->lane_id); + if (i != j) { + snprintf(err_msg, sizeof(err_msg), + "Lane_id size inconsistent %d/%d", i, j); + goto err_initport_reg_device; + } + memcpy(transvr_obj_p->lane_id, port_layout[minor_curr].lane_id, i*sizeof(int)); + /* Create and register device object */ + if (register_port_device(dev_name, MKDEV(port_major, minor_curr), transvr_obj_p) < 0){ + snprintf(err_msg, sizeof(err_msg), + "register_port_device fail"); + goto err_initport_reg_device; + } + /* Setup device_ptr of transvr_obj */ + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + snprintf(err_msg, sizeof(err_msg), + "get_swpdev_by_name fail"); + goto err_initport_reg_device; + } + transvr_obj_p->transvr_dev_p = dev_p; + /* Success */ + ok_count++; + } + SWPS_INFO("%s: initialed %d port-dev",__func__, ok_count); + return 0; + +err_initport_reg_device: + kfree(transvr_obj_p); +err_initport_create_tranobj: + clean_port_obj(); + SWPS_ERR("%s: %s", __func__, err_msg); + SWPS_ERR("Dump: :%d :%d :%d :%d :%d :%d\n", + port_id, chan_id, ioexp_id, ioexp_virt_offset, transvr_type, run_mod); + return -1; +} + +static int __init +swp_module_init(void){ + + if (get_platform_type() < 0){ + goto err_init_out; + } + if (get_layout_info() < 0){ + goto err_init_out; + } + if (register_swp_module() < 0){ + goto err_init_out; + } + if (create_ioexp_objs() < 0){ + goto err_init_ioexp; + } + if (create_port_objs() < 0){ + goto err_init_portobj; + } + if (init_ioexp_objs() < 0){ + goto err_init_portobj; + } + SWPS_INFO("Inventec switch-port module V.%s initial success.\n", SWP_VERSION); + return 0; + + +err_init_portobj: + clean_ioexp_objs(); +err_init_ioexp: + class_unregister(swp_class_p); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_init_out: + SWPS_ERR("Inventec switch-port module V.%s initial failure.\n", SWP_VERSION); + return -1; +} + + +static void __exit +swp_module_exit(void){ + clean_port_obj(); + clean_ioexp_objs(); + class_unregister(swp_class_p); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); + SWPS_INFO("Remove Inventec switch-port module success.\n"); +} + + +/* Module information */ +MODULE_AUTHOR(SWP_AUTHOR); +MODULE_DESCRIPTION(SWP_DESC); +MODULE_VERSION(SWP_VERSION); +MODULE_LICENSE(SWP_LICENSE); + +module_init(swp_module_init); +module_exit(swp_module_exit); + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_swps.h b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_swps.h new file mode 100644 index 00000000000..b186c220238 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/inv_swps.h @@ -0,0 +1,131 @@ +#ifndef INV_SWPS_H +#define INV_SWPS_H + +#include "transceiver.h" +#include "io_expander.h" + +/* Module settings */ +#define SWP_CLS_NAME "swps" +#define SWP_DEV_PORT "port" +#define SWP_AUTOCONFIG_ENABLE (1) + +/* Module information */ +#define SWP_AUTHOR "Neil " +#define SWP_DESC "Inventec port and transceiver driver" +#define SWP_VERSION "4.2.3" +#define SWP_LICENSE "GPL" + +/* Module status define */ +#define SWP_STATE_NORMAL (0) +#define SWP_STATE_I2C_DIE (-91) + +/* [Note]: + * Functions and mechanism for auto-detect platform type is ready, + * But HW and BIOS not ready! We need to wait them. + * So, please do not use PLATFORM_TYPE_AUTO until they are ready. + * (2016.06.13) + */ +#define PLATFORM_TYPE_REDWOOD (121) +/* Current running platfrom */ +#define PLATFORM_SETTINGS PLATFORM_TYPE_REDWOOD + +/* Define platform flag and kernel version */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD) + #define SWPS_KERN_VER_BF_3_8 (1) +#endif + +struct inv_platform_s { + int id; + char name[64]; +}; + +struct inv_ioexp_layout_s { + int ioexp_id; + int ioexp_type; + struct ioexp_addr_s addr[4]; +}; + +struct inv_port_layout_s { + int port_id; + int chan_id; + int ioexp_id; + int ioexp_offset; + int transvr_type; + int chipset_type; + int lane_id[8]; +}; + +/* ========================================== + * Inventec Platform Settings + * ========================================== + */ +struct inv_platform_s platform_map = {PLATFORM_TYPE_REDWOOD, "D7032Q28B" }; + +/* ========================================== + * Redwood Layout configuration + * ========================================== + */ +struct inv_ioexp_layout_s redwood_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + +struct inv_port_layout_s redwood_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; + +#endif /* INV_SWPS_H */ + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/io_expander.c b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/io_expander.c new file mode 100644 index 00000000000..7c9f8a66aec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/io_expander.c @@ -0,0 +1,887 @@ +#include +#include +#include +#include "io_expander.h" + +static struct ioexp_obj_s *ioexp_head_p = NULL; +static struct ioexp_obj_s *ioexp_tail_p = NULL; + +struct ioexp_map_s ioexp_map_redwood_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + +/* ========== Private functions ========== + */ +int check_channel_tier_1(void); + +struct i2c_client * +_get_i2c_client(struct ioexp_obj_s *self, + int chip_id){ + + struct ioexp_i2c_s *i2c_curr_p = self->i2c_head_p; + + if (!(i2c_curr_p)){ + SWPS_ERR("%s: i2c_curr_p is NULL\n", __func__); + return NULL; + } + while (i2c_curr_p){ + if ((i2c_curr_p->chip_id) == chip_id){ + return i2c_curr_p->i2c_client_p; + } + i2c_curr_p = i2c_curr_p->next; + } + SWPS_ERR("%s: not exist! :%d\n", __func__, chip_id); + return NULL; +} + + +static int +_common_ioexp_update_one(struct ioexp_obj_s *self, + struct ioexp_addr_s *ioexp_addr, + int chip_id, + int data_width, + int show_err, + char *caller_name) { + int buf = 0; + int err = 0; + int data_id = 0; + int r_offset = 0; + + for(data_id=0; data_idread_offset[data_id]; + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), r_offset); + /* Check error */ + if (buf < 0) { + err = 1; + if (show_err) { + SWPS_INFO("IOEXP-%d read fail! :%d \n", self->ioexp_id, buf); + SWPS_INFO("Dump: :%d :0x%02x :%d, :%s\n", + ioexp_addr->chan_id, ioexp_addr->chip_addr, + ioexp_addr->read_offset[data_id], caller_name); + } + continue; + } + /* Update IOEXP object */ + self->chip_data[chip_id].data[data_id] = (uint8_t)buf; + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +common_ioexp_update_all(struct ioexp_obj_s *self, + int show_err, + char *caller_name){ + + int err = 0; + int chip_id = 0; + int chip_amount = self->ioexp_map_p->chip_amount; + + for (chip_id=0; chip_idioexp_map_p->map_addr[chip_id]), + chip_id, + self->ioexp_map_p->data_width, + show_err, + caller_name) < 0) { + err = 1; + } + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + +static int +_common_get_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + char *func_mane){ + uint8_t buf; + int err_code; + + /* Get address */ + err_code = self->fsm_4_direct(self); + if (err_code < 0){ + return err_code; + } + + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Get data form cache */ + buf = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + return (int)(buf >> bitmap_obj_p->bit_shift & 0x01); +} + + +static int +_common_set_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + int input_val, + char *func_mane){ + int err_code, target_offset; + uint8_t origin_byte; + uint8_t modify_byte; + + /* Get address */ + err_code = self->fsm_4_direct(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Prepare write date */ + origin_byte = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + switch (input_val) { + case 0: + modify_byte = origin_byte; + SWP_BIT_CLEAR(modify_byte, bitmap_obj_p->bit_shift); + break; + case 1: + modify_byte = origin_byte; + SWP_BIT_SET(modify_byte, bitmap_obj_p->bit_shift); + break; + default: + SWPS_ERR("Input value incorrect! :%d :%d :%s\n", + input_val, self->ioexp_id, func_mane); + return ERR_IOEXP_BADINPUT; + } + /* Setup i2c client */ + target_offset = self->ioexp_map_p->map_addr[bitmap_obj_p->chip_id].write_offset[bitmap_obj_p->ioexp_voffset]; + /* Write byte to chip via I2C */ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, bitmap_obj_p->chip_id), + target_offset, + modify_byte); + /* Update or bollback object */ + if (err_code < 0){ + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = origin_byte; + SWPS_ERR("I2C write fail! :%d :%d :%s :%d\n", + input_val, self->ioexp_id, func_mane, err_code); + return err_code; + } + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = modify_byte; + return 0; +} + + +/* ========== Object public functions ========== + */ +int +common_get_present(struct ioexp_obj_s *self, + int virt_offset){ + + int UNPLUG = 1; + int retval = ERR_IOEXP_UNEXCPT; + + retval = _common_get_bit(self, + &(self->ioexp_map_p->map_present[virt_offset]), + "common_get_present"); + if (retval < 0) { + /* [Note] + * => Transceiver object does not need to handle IOEXP layer issues. + */ + return UNPLUG; + } + return retval; +} + + +int +common_get_reset(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + "common_get_reset"); +} + + +int +common_get_lpmod(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + "common_get_lpmod"); +} + + +int +common_get_modsel(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + "common_get_modsel"); +} + +int +common_set_reset(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + input_val, + "common_set_reset"); +} + + +int +common_set_lpmod(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + input_val, + "common_set_lpmod"); +} + + +int +common_set_modsel(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + input_val, + "common_set_modsel"); +} + +int +ioexp_get_not_support(struct ioexp_obj_s *self, + int virt_offset){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +ioexp_set_not_support(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + return ERR_IOEXP_NOTSUPPORT; +} + +/* ========== Initial functions for IO Expander ========== + */ +int +common_ioexp_init(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + if (self->mode == IOEXP_MODE_DIRECT) { ///important + goto update_common_ioexp_init; + } + /* Setup default value to each physical IO Expander */ + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + /* Get address mapping */ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("%s: IOEXP config incorrect! :%d \n", + __func__, chip_id); + return -1; + } + /* Setup default value */ + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->write_offset[offset], + addr_p->data_default[offset]); + if (err_code < 0){ + SWPS_ERR("%s: set default fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + } + } + +update_common_ioexp_init: + /* Check and update info to object */ + err_code = self->update_all(self, 1, "common_ioexp_init"); + if (err_code < 0) { + SWPS_ERR("%s: update_all() fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +/* ========== Object functions for Final State Machine ========== + */ +int +_is_channel_ready(struct ioexp_obj_s *self){ + + int buf = 0; + int chip_id = 0; /* Use first chip which be registered */ + int data_id = 0; /* Use first byte which be registered */ + struct ioexp_addr_s *ioexp_addr = NULL; + + ioexp_addr = &(self->ioexp_map_p->map_addr[chip_id]); + if (!ioexp_addr){ + SWPS_ERR("%s: config incorrect!\n", __func__); + return ERR_IOEXP_UNEXCPT; + } + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), + ioexp_addr->read_offset[data_id]); + if (buf >= 0){ + return 1; + } + return 0; +} + +int +_ioexp_init_handler(struct ioexp_obj_s *self){ + + int return_val; + + switch (self->mode) { + case IOEXP_MODE_DIRECT: + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + default: + break; + } + SWPS_ERR("%s: exception occur :%d\n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_direct(struct ioexp_obj_s *self){ + + int result_val; + int show_err = 1; + char *func_mane = "common_ioexp_fsm_4_direct"; + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, and return error */ + return ERR_IOEXP_UNINIT; + } + /* Case: Initial done */ + return 0; + + case STATE_IOEXP_NORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + SWPS_INFO("%s: NORMAL -> ABNORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + self->state = STATE_IOEXP_NORMAL; + return 0; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_DEBUG("%s: ABNORMAL -> NORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("%s: Exception occurs :%d\n", + __func__, self->state); + return ERR_IOEXP_UNEXCPT; +} + +/* ========== Functions for Factory pattern ========== + */ +static struct ioexp_map_s * +get_ioexp_map(int ioexp_type){ + switch (ioexp_type){ + case IOEXP_TYPE_REDWOOD_P01P08: + return &ioexp_map_redwood_p01p08_p17p24; + case IOEXP_TYPE_REDWOOD_P09P16: + return &ioexp_map_redwood_p09p16_p25p32; + default: + return NULL; + } +} + + +int +setup_ioexp_ssize_attr(struct ioexp_obj_s *self, + struct ioexp_map_s *ioexp_map_p, + int ioexp_id, + int ioexp_type, + int run_mode){ + switch (run_mode){ + case IOEXP_MODE_DIRECT: /* Direct access device mode */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = ERR_IOEXP_UNEXCPT; + return ERR_IOEXP_UNEXCPT; + } + self->ioexp_id = ioexp_id; + self->ioexp_type = ioexp_type; + self->ioexp_map_p = ioexp_map_p; + self->state = STATE_IOEXP_INIT; + mutex_init(&self->lock); + return 0; +} + + +static int +setup_addr_mapping(struct ioexp_obj_s *self, + struct ioexp_addr_s *addr_map_p){ + if (!addr_map_p){ + SWPS_ERR("%s: map is null\n", __func__); + return -1; + } + self->ioexp_map_p->map_addr = addr_map_p; + return 0; +} + + +static int +setup_ioexp_public_cb(struct ioexp_obj_s *self, + int ioexp_type){ + switch (ioexp_type){ + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + self->get_present = common_get_present; + self->get_reset = common_get_reset; + self->get_lpmod = common_get_lpmod; + self->get_modsel = common_get_modsel; + self->set_reset = common_set_reset; + self->set_lpmod = common_set_lpmod; + self->set_modsel = common_set_modsel; + return 0; + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_ioexp_private_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + + self->init = common_ioexp_init; + self->update_all = common_ioexp_update_all; + self->fsm_4_direct = common_ioexp_fsm_4_direct; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_i2c_client_one(struct ioexp_obj_s *self, + int chip_id){ + + char *err_msg = "ERROR"; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + struct ioexp_i2c_s *i2c_obj_p = NULL; + struct ioexp_i2c_s *i2c_curr_p = NULL; + + int chan_id = self->ioexp_map_p->map_addr[chip_id].chan_id; + adap = i2c_get_adapter(chan_id); + if(!adap){ + err_msg = "Can not get adap!"; + goto err_ioexp_setup_i2c_1; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + err_msg = "Can not kzalloc client!"; + goto err_ioexp_setup_i2c_1; + } + i2c_obj_p = kzalloc(sizeof(*i2c_obj_p), GFP_KERNEL); + if (!i2c_obj_p){ + err_msg = "Can not kzalloc i2c_obj_p!"; + goto err_ioexp_setup_i2c_2; + } + client->adapter = adap; + client->addr = self->ioexp_map_p->map_addr[chip_id].chip_addr; + i2c_obj_p->i2c_client_p = client; + i2c_obj_p->chip_id = chip_id; + i2c_obj_p->next = NULL; + if (!self->i2c_head_p){ + self->i2c_head_p = i2c_obj_p; + } else { + i2c_curr_p = self->i2c_head_p; + while (i2c_curr_p->next){ + i2c_curr_p = i2c_curr_p->next; + } + i2c_curr_p->next = i2c_obj_p; + } + return 0; + +err_ioexp_setup_i2c_2: + kfree(client); +err_ioexp_setup_i2c_1: + SWPS_ERR("%s: %s :%d\n", __func__, err_msg, chan_id); + return -1; +} + + +static int +setup_i2c_client(struct ioexp_obj_s* self){ + + int result; + int chip_id = 0; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + result = setup_i2c_client_one(self, chip_id); + if (result < 0){ + SWPS_ERR("%s fail! :%d\n", __func__, chip_id); + return -1; + } + } + return 0; +} + +static int +setup_ioexp_config(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("IOEXP config incorrect! :%d \n",chip_id); + return -1; + } + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[offset], + addr_p->conf_default[offset]); + + if (err_code < 0){ + SWPS_INFO("%s: set conf fail! :%d \n", __func__, err_code); + return -2; + } + } + } + return 0; +} + +struct ioexp_obj_s * +_create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_map_s* ioexp_map_p; + struct ioexp_obj_s* result_p; + struct ioexp_i2c_s *i2c_curr_p; + struct ioexp_i2c_s *i2c_next_p; + + /* Get layout */ + ioexp_map_p = get_ioexp_map(ioexp_type); + if (!ioexp_map_p){ + SWPS_ERR("%s: Invalid ioexp_type\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare IOEXP object */ + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + SWPS_ERR("%s: kzalloc failure!\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare static size attributes */ + if (setup_ioexp_ssize_attr(result_p, + ioexp_map_p, + ioexp_id, + ioexp_type, + run_mode) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + /* Prepare address mapping */ + if (setup_addr_mapping(result_p, addr_map_p) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + if (setup_i2c_client(result_p) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + /* Prepare call back functions of object */ + if (setup_ioexp_public_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + if (setup_ioexp_private_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + return result_p; + +err_create_ioexp_setup_i2c_fail: + i2c_curr_p = result_p->i2c_head_p; + i2c_next_p = result_p->i2c_head_p; + while (i2c_curr_p){ + i2c_next_p = i2c_curr_p->next; + kfree(i2c_curr_p->i2c_client_p); + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } +err_create_ioexp_setup_attr_fail: + kfree(result_p); +err_create_ioexp_fail: + SWPS_ERR("%s: fail! :%d :%d \n", + __func__, ioexp_id, ioexp_type); + return NULL; +} + + +int +create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_obj_s *ioexp_p = NULL; + + ioexp_p = _create_ioexp_obj(ioexp_id, ioexp_type, + addr_map_p, run_mode); + if (!ioexp_p){ + return -1; + } + if (ioexp_head_p == NULL){ + ioexp_head_p = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; + } + ioexp_tail_p->next = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; +} + +static int +_init_ioexp_obj(struct ioexp_obj_s* self) { + + char *err_msg = "ERR"; + char *func_name = "_init_ioexp_obj"; + + /* Setup IOEXP configure byte */ + if (setup_ioexp_config(self) < 0){ + err_msg = "setup_ioexp_config fail"; + goto err_init_ioexp_obj; + } + /* Setup default data */ + if (_ioexp_init_handler(self) < 0){ + err_msg = "_ioexp_init_handler fail"; + goto err_init_ioexp_obj; + } + /* Update all */ + if (self->state == STATE_IOEXP_NORMAL){ + if (self->update_all(self, 1, func_name) < 0){ + err_msg = "update_all() fail"; + goto err_init_ioexp_obj; + } + } + return 0; + +err_init_ioexp_obj: + SWPS_DEBUG("%s: %s\n", __func__, err_msg); + return -1; +} + +int +init_ioexp_objs(void){ + /* Return value: + * 0: Success + * -1: Detect topology error + * -2: SWPS internal error + */ + + struct ioexp_obj_s *curr_p = ioexp_head_p; + + if (!curr_p) { + SWPS_ERR("%s: ioexp_head_p is NULL\n", __func__); + return -2; + } + while (curr_p) { + if (_init_ioexp_obj(curr_p) < 0) { + SWPS_DEBUG("%s: _init_ioexp_obj() fail\n", __func__); + return -1; + } + curr_p = curr_p->next; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + +void +clean_ioexp_objs(void){ + + struct ioexp_i2c_s *i2c_curr_p = NULL; + struct ioexp_i2c_s *i2c_next_p = NULL; + struct ioexp_obj_s *ioexp_next_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + if (ioexp_head_p == NULL){ + ioexp_tail_p = NULL; + return; + } + while(ioexp_curr_p){ + ioexp_next_p = ioexp_curr_p->next; + i2c_curr_p = ioexp_curr_p->i2c_head_p; + while (i2c_curr_p) { + i2c_next_p = i2c_curr_p->next; + kfree(i2c_curr_p->i2c_client_p); + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } + kfree(ioexp_curr_p); + ioexp_curr_p = ioexp_next_p; + } + ioexp_tail_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} + +struct ioexp_obj_s * +get_ioexp_obj(int ioexp_id){ + + struct ioexp_obj_s *result_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + if (ioexp_curr_p->ioexp_id == ioexp_id){ + result_p = ioexp_curr_p; + break; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return result_p; +} +int +check_channel_tier_1(void) { + + if ( (!_is_channel_ready(ioexp_head_p)) && + (!_is_channel_ready(ioexp_tail_p)) ){ + return -1; + } + return 0; +} + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/io_expander.h b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/io_expander.h new file mode 100644 index 00000000000..8c51b4f6d94 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/io_expander.h @@ -0,0 +1,136 @@ +#ifndef IO_EXPANDER_H +#define IO_EXPANDER_H + +#include + +/* IOEXP type define (QSFP series) */ +#define IOEXP_TYPE_REDWOOD_P01P08 (10202) +#define IOEXP_TYPE_REDWOOD_P09P16 (10203) + +/* IOEXP mode define */ +#define IOEXP_MODE_DIRECT (19001) + +/* IOEXP state define */ +#define STATE_IOEXP_NORMAL (0) +#define STATE_IOEXP_INIT (-1) +#define STATE_IOEXP_ABNORMAL (-2) + +/* IOEXP error code define */ +#define ERR_IOEXP_NOTSUPPORT (-100) +#define ERR_IOEXP_UNINIT (-101) +#define ERR_IOEXP_BADCONF (-102) +#define ERR_IOEXP_BADINPUT (-105) +#define ERR_IOEXP_UNEXCPT (-199) + + +#define SWPS_INFO(fmt, args...) printk( KERN_INFO "[SWPS] " fmt, ##args) +#define SWPS_WARN(fmt, args...) printk( KERN_WARNING "[SWPS] " fmt, ##args) +#define SWPS_ERR(fmt, args...) printk( KERN_ERR "[SWPS] " fmt, ##args) + +#ifdef DEBUG_SWPS +# define SWPS_DEBUG(fmt, args...) printk( KERN_DEBUG "[SWPS] " fmt, ##args) +#else +# define SWPS_DEBUG(fmt, args...) +#endif + + +struct ioexp_addr_s { + int chan_id; + int chip_addr; + int read_offset[8]; + int write_offset[8]; + int conf_offset[8]; + uint8_t data_default[8]; + uint8_t conf_default[8]; +}; + +struct ioexp_i2c_s { + int chip_id; + struct i2c_client *i2c_client_p; + struct ioexp_i2c_s *next; +}; + + +struct ioexp_bitmap_s { + int chip_id; /* IOEXP chip id */ + int ioexp_voffset; /* IOEXP virtual offset */ + int bit_shift; +}; + +struct ioexp_map_s { + int chip_amount; /* Number of chips that IOEXP object content */ + int data_width; /* Number of (Read/Write/Config) bytes */ + struct ioexp_addr_s *map_addr; /* Chip address info */ + struct ioexp_bitmap_s map_present[8]; /* IOEXP for SFP / QSFP */ + struct ioexp_bitmap_s map_reset[8]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_lpmod[8]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_modsel[8]; /* IOEXP for QSFP */ +}; + +struct ioexp_data_s { + uint8_t data[8]; +}; + +struct ioexp_obj_s { + + /* ============================ + * Object public property + * ============================ + */ + int ioexp_id; + int ioexp_type; + + /* ============================ + * Object private property + * ============================ + */ + struct ioexp_data_s chip_data[16]; /* Max: 8-ioexp in one virt-ioexp(ioexp_obj) */ + struct ioexp_map_s *ioexp_map_p; + struct ioexp_obj_s *next; + struct ioexp_i2c_s *i2c_head_p; + struct mutex lock; + int mode; + int state; + + /* =========================================== + * Object public functions + * =========================================== + */ + int (*get_present)(struct ioexp_obj_s *self, int virt_offset); + int (*get_reset)(struct ioexp_obj_s *self, int virt_offset); + int (*get_lpmod)(struct ioexp_obj_s *self, int virt_offset); + int (*get_modsel)(struct ioexp_obj_s *self, int virt_offset); + int (*set_reset)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_lpmod)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_modsel)(struct ioexp_obj_s *self, int virt_offset, int input_val); + + /* =========================================== + * Object private functions + * =========================================== + */ + int (*init)(struct ioexp_obj_s *self); + int (*update_all)(struct ioexp_obj_s *self, int show_err, char *caller_name); + int (*fsm_4_direct)(struct ioexp_obj_s* self); +}; + + +struct ioexp_obj_s* get_ioexp_obj(int ioexp_id); +int create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode); +int init_ioexp_objs(void); +void clean_ioexp_objs(void); + +int check_channel_tier_1(void); + +/* Macro for bit control */ +#define SWP_BIT_SET(byte_val,bit_shift) ((byte_val) |= (1<<(bit_shift))) +#define SWP_BIT_CLEAR(byte_val,bit_shift) ((byte_val) &= ~(1<<(bit_shift))) + + +#endif /* IO_EXPANDER_H */ + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/transceiver.c b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/transceiver.c new file mode 100644 index 00000000000..36ccc45a921 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/transceiver.c @@ -0,0 +1,898 @@ +#include +#include +#include +#include +#include "io_expander.h" +#include "transceiver.h" + + +/* ========== Register EEPROM address mapping ========== + */ +struct eeprom_map_s eeprom_map_qsfp = { + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, +}; + +struct eeprom_map_s eeprom_map_qsfp28 = { + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, +}; + + +/* ========== Utility Functions ========== + */ +void +alarm_msg_2_user(struct transvr_obj_s *self, + char *emsg) { + + SWPS_ERR("%s on %s.\n", emsg, self->swp_name); +} + + +/* ========== Private functions ========== + */ +static int +_reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +_transvr_init_handler(struct transvr_obj_s *self); + +static void +_transvr_clean_retry(struct transvr_obj_s *self) { + self->retry = 0; +} + + +static int +_transvr_handle_retry(struct transvr_obj_s *self, int retry) { + /* Return: 0: keep retry + * -1: stop retry + */ + if (self->retry == 0) { + self->retry = retry; + } + self->retry -= 1; + if (self->retry <= 0) { + _transvr_clean_retry(self); + return -1; + } + return 0; +} + +static int +_common_setup_page(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int show_e) { + /* return: + * 0 : OK + * -1 : EEPROM settings incorrect + * -2 : I2C R/W failure + * -3 : Undefined case + */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Check */ + if ((addr < 0) || (offset < 0) || (len < 0)) { + emsg = "EEPROM settings incorrect"; + retval = -1; + goto err_common_setup_page; + } + /* Case1: continue access */ + if ((self->i2c_client_p->addr == addr) && + (self->curr_page == page)) { + return 0; + } + self->i2c_client_p->addr = addr; + /* Case2: select lower page */ + if (page == -1) { + self->curr_page = page; + return 0; + } + /* Case3: select upper page */ + if (page >= 0) { + goto upper_common_setup_page; + } + /* Unexpected case */ + show_e = 1; + emsg = "Unexpected case"; + retval = -3; + goto err_common_setup_page; + +upper_common_setup_page: + if (i2c_smbus_write_byte_data(self->i2c_client_p, + VAL_TRANSVR_PAGE_SELECT_OFFSET, + page) < 0) { + emsg = "I2C R/W failure"; + retval = -2; + goto err_common_setup_page; + } + self->curr_page = page; + mdelay(VAL_TRANSVR_PAGE_SELECT_DELAY); + return 0; + +err_common_setup_page: + if (show_e) { + SWPS_INFO("%s: %s", __func__, emsg); + SWPS_INFO("%s: :0x%02x :%d :%d :%d\n", + __func__, addr, page, offset, len); + } + return retval; +} + +/* ========== Object functions for Final State Machine ========== + */ +int +is_plugged(struct transvr_obj_s *self){ + + int limit = 63; + int present = DEBUG_TRANSVR_INT_VAL; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + struct ioexp_obj_s *ioexp_p = self->ioexp_obj_p; + + if (!ioexp_p) { + snprintf(emsg, limit, "ioexp_p is null!"); + goto err_is_plugged_1; + } + present = ioexp_p->get_present(ioexp_p, self->ioexp_virt_offset); + switch (present){ + case 0: + return 1; + case 1: + return 0; + case ERR_IOEXP_UNINIT: + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + default: + if (ioexp_p->state == STATE_IOEXP_INIT){ + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + } + break; + } + SWPS_INFO("%s: Exception case! :%d :%d\n", + __func__, present, ioexp_p->state); + return 0; + +err_is_plugged_1: + SWPS_DEBUG("%s: %s\n", __func__, emsg); + return 0; +} + + +static int +detect_transvr_type(struct transvr_obj_s* self){ + + int type = TRANSVR_TYPE_ERROR; + + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + type = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + + /* Case: 1. Wait transceiver I2C module. + * 2. Transceiver I2C module failure. + * Note: 1. SFF allow maximum transceiver initial time is 2 second. So, there + * are exist some case that we need to wait transceiver. + * For these case, we keeps status on "TRANSVR_TYPE_UNPLUGGED", than + * state machine will keep trace with it. + * 2. There exist some I2C failure case we need to handle. Such as user + * insert the failure transceiver, or any reason cause it abnormal. + */ + if (type < 0){ + switch (type) { + case -EIO: + SWPS_DEBUG("%s: %s smbus return:-5 (I/O error)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + case -ENXIO: + SWPS_DEBUG("%s: %s smbus return:-6 (No such device or address)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + default: + break; + } + SWPS_INFO("%s: %s unexpected smbus return:%d \n", + __func__, self->swp_name, type); + return TRANSVR_TYPE_ERROR; + } + /* Identify valid transceiver type */ + switch (type){ + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + break; + case TRANSVR_TYPE_UNKNOW_1: + case TRANSVR_TYPE_UNKNOW_2: + type = TRANSVR_TYPE_UNKNOW_2; + break; + default: + SWPS_DEBUG("%s: unknow type:0x%02x \n", __func__, type); + type = TRANSVR_TYPE_ERROR; + break; + } + return type; +} + + +static int +detect_transvr_state(struct transvr_obj_s *self, + int result[2]){ + /* [return] [result-0] [result-1] + * 0 STATE_TRANSVR_CONNECTED TRANSVR_TYPE_FAKE + * 0 STATE_TRANSVR_DISCONNECTED TRANSVR_TYPE_UNPLUGGED + * 0 STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * 0 STATE_TRANSVR_INIT / + * 0 STATE_TRANSVR_SWAPPED + * 0 STATE_TRANSVR_CONNECTED + * ERR_TRNASVR_BE_ISOLATED STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_I2C_CRASH STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_UNEXCPT STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_UNKNOW_1/2 + */ + result[0] = STATE_TRANSVR_UNEXCEPTED; /* For return state */ + result[1] = TRANSVR_TYPE_ERROR; /* For return type */ + + /* Case1: Fake type */ + if (self->type == TRANSVR_TYPE_FAKE){ + result[0] = STATE_TRANSVR_CONNECTED; + result[1] = TRANSVR_TYPE_FAKE; + return 0; + } + /* Case2: Transceiver unplugged */ + if (!is_plugged(self)){ + result[0] = STATE_TRANSVR_DISCONNECTED; + result[1] = TRANSVR_TYPE_UNPLUGGED; + return 0; + } + /* Case3: Transceiver be isolated */ + if (self->state == STATE_TRANSVR_ISOLATED){ + result[0] = STATE_TRANSVR_ISOLATED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case4: Transceiver plugged */ + result[1] = detect_transvr_type(self); + /* Case4.1: I2C topology crash + * Note : There are some I2C issues cause by transceiver/cables. + * We need to check topology status when user insert it. + * But in this step, we can't not ensure this is the issues + * port. So, it return the ERR_TRANSVR_I2C_CRASH, then upper + * layer will diagnostic I2C topology. + */ + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: %s detect I2C crash :%d\n", + __func__, self->swp_name, self->state); + result[0] = STATE_TRANSVR_UNEXCEPTED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_I2C_CRASH; + } + /* Case4.2: System initial not ready, + * Note : Sometime i2c channel or transceiver EEPROM will delay that will + * cause system in inconsistent state between EEPROM and IOEXP. + * In this case, SWP transceiver object keep state at LINK_DOWN + * to wait system ready. + * By the way, State Machine will handle these case. + */ + if (result[1] == TRANSVR_TYPE_UNPLUGGED){ + result[0] = STATE_TRANSVR_DISCONNECTED; + return 0; + } + /* Case4.3: Error transceiver type */ + if (result[1] == TRANSVR_TYPE_ERROR){ + result[0] = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s detect error type\n", __func__, self->swp_name); + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard!"); + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case3.3: Unknow transceiver type */ + if ((result[1] == TRANSVR_TYPE_UNKNOW_1) || + (result[1] == TRANSVR_TYPE_UNKNOW_2) ){ + result[0] = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + /* Case3.4: During initial process */ + if (self->state == STATE_TRANSVR_INIT){ + result[0] = STATE_TRANSVR_INIT; + return 0; + } + /* Case3.5: Transceiver be swapped */ + if (self->type != result[1]){ + result[0] = STATE_TRANSVR_SWAPPED; + return 0; + } + /* Case3.6: Link up state */ + result[0] = STATE_TRANSVR_CONNECTED; + return 0; +} +int +common_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + + int err; + int detect_result[2]; + int current_state = STATE_TRANSVR_UNEXCEPTED; + int current_type = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_NEW) { + if (_transvr_init_handler(self) < 0){ + return ERR_TRANSVR_INIT_FAIL; + } + } + err = detect_transvr_state(self, detect_result); + if (err < 0) { + return err; + } + /* In Direct mode, driver only detect transceiver when user call driver interface + * which on sysfs. So it only need consider the state of Transceiver. + */ + current_state = detect_result[0]; + current_type = detect_result[1]; + + switch (current_state){ + + case STATE_TRANSVR_DISCONNECTED: /* Transceiver is not plugged */ + self->state = current_state; + self->type = current_type; + return ERR_TRANSVR_UNPLUGGED; + + case STATE_TRANSVR_INIT: /* Transceiver is plugged, system not ready */ + return ERR_TRANSVR_UNINIT; + + case STATE_TRANSVR_ISOLATED: /* Transceiver is plugged, but has some issues */ + return ERR_TRNASVR_BE_ISOLATED; + + case STATE_TRANSVR_CONNECTED: /* Transceiver is plugged, system is ready */ + self->state = current_state; + self->type = current_type; + return 0; + + case STATE_TRANSVR_SWAPPED: /* Transceiver is plugged, system detect user changed */ + self->type = current_type; + if (reload_transvr_obj(self, current_type) < 0){ + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + self->state = current_state; + return 0; + + case STATE_TRANSVR_UNEXCEPTED: /* Transceiver type or state is unexpected case */ + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_UNEXCPT; + + default: + SWPS_INFO("%s: state:%d not in define.\n", __func__, current_state); + break; + } + return ERR_TRANSVR_UNEXCPT; +} + +int +fake_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + +/* ========== Object Initial handler ========== + */ +static int +_is_transvr_valid(struct transvr_obj_s *self, + int type, + int state) { + /* [Return] + * 0 : OK, inserted + * EVENT_TRANSVR_INIT_DOWN : OK, removed + * EVENT_TRANSVR_INIT_FAIL : Outside error, type doesn't supported + * EVENT_TRANSVR_EXCEP_INIT : Internal error, state undefined + */ + switch (type) { + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + break; + default: + SWPS_INFO("detect undefined type:0x%02x on %s\n", + type, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; + } + switch (state) { + case STATE_TRANSVR_DISCONNECTED: + return EVENT_TRANSVR_INIT_DOWN; + case STATE_TRANSVR_INIT: + case STATE_TRANSVR_CONNECTED: + case STATE_TRANSVR_SWAPPED: + break; + default: + SWPS_INFO("detect undefined state:%d on %s\n", + state, self->swp_name); + return EVENT_TRANSVR_EXCEP_INIT; + } + return 0; +} + + +static int +_is_transvr_hw_ready(struct transvr_obj_s *self, + int type){ + /* [Return] + * EVENT_TRANSVR_TASK_DONE : Ready + * EVENT_TRANSVR_TASK_WAIT : Not ready + * EVENT_TRANSVR_INIT_FAIL : Error + */ + int addr = DEBUG_TRANSVR_INT_VAL; + int page = DEBUG_TRANSVR_INT_VAL; + int offs = DEBUG_TRANSVR_INT_VAL; + int bit = DEBUG_TRANSVR_INT_VAL; + int ready = DEBUG_TRANSVR_INT_VAL; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t ab_val = DEBUG_TRANSVR_HEX_VAL; + + switch (type) { + case TRANSVR_TYPE_SFP: + addr = VAL_TRANSVR_8472_READY_ADDR; + page = VAL_TRANSVR_8472_READY_PAGE; + offs = VAL_TRANSVR_8472_READY_OFFSET; + bit = VAL_TRANSVR_8472_READY_BIT; + ready = VAL_TRANSVR_8472_READY_VALUE; + ab_val = VAL_TRANSVR_8472_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + addr = VAL_TRANSVR_8436_READY_ADDR; + page = VAL_TRANSVR_8436_READY_PAGE; + offs = VAL_TRANSVR_8436_READY_OFFSET; + bit = VAL_TRANSVR_8436_READY_BIT; + ready = VAL_TRANSVR_8436_READY_VALUE; + ab_val = VAL_TRANSVR_8436_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + return EVENT_TRANSVR_TASK_DONE; + + default: + emsg = "unexpected case"; + goto err_is_transvr_hw_ready; + } + /* Select target page */ + err = _common_setup_page(self, addr, page, offs, 1, 0); + if (err < 0) { + emsg = "setup page fail"; + goto err_is_transvr_hw_ready; + } + /* Check feature supported + * [Note] + * Some of transceiver/cables doesn't support "Status Indicators" + * (ex:DAC, RJ45 copper SFP ...etc). In these case, we bypass the + * step of checking Status Indicators, then state machine will take + * the following handle procedure. + */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (err < 0) { + emsg = "doesn't support Status Indicators"; + goto bypass_is_transvr_hw_ready; + } + /* Filter abnormal case */ + if (err == ab_val) { + emsg = "detect using unusual definition."; + goto bypass_is_transvr_hw_ready; + } + /* Get Status Indicators */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, offs); + if (err < 0) { + emsg = "detect current value fail"; + goto err_is_transvr_hw_ready; + } + if ((err & (1<:%d\n", __func__, emsg, type); + return EVENT_TRANSVR_TASK_DONE; + +err_is_transvr_hw_ready: + SWPS_DEBUG("%s: %s :%d\n", __func__, emsg, type); + return EVENT_TRANSVR_INIT_FAIL; +} + +static int +_transvr_init_handler(struct transvr_obj_s *self){ + + int detect[2]; + int d_state = STATE_TRANSVR_UNEXCEPTED; + int d_type = TRANSVR_TYPE_ERROR; + int result = ERR_TRANSVR_UNINIT; + int retry = 6; /* (6+1) x 0.3 = 2.1s > spec:2.0s */ + int elimit = 63; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Clean and check callback */ + self->state = STATE_TRANSVR_INIT; + if (self->init == NULL) { + snprintf(emsg, elimit, "init() is null"); + goto initer_err_case_unexcept_0; + } + /* Detect transceiver information */ + result = detect_transvr_state(self, detect); + if (result < 0) { + snprintf(emsg, elimit, "detect_transvr_state() fail"); + switch (result) { + case ERR_TRANSVR_I2C_CRASH: + goto initer_err_case_i2c_ceash; + case ERR_TRNASVR_BE_ISOLATED: + goto initer_err_case_be_isolated; + + case ERR_TRANSVR_UNEXCPT: + default: + break; + } + goto initer_err_case_retry_1; + } + d_state = detect[0]; + d_type = detect[1]; + + /* Verify transceiver type and state */ + switch (_is_transvr_valid(self, d_type, d_state)) { + case 0: + break; + case EVENT_TRANSVR_INIT_DOWN: + goto initer_ok_case_down;; + case EVENT_TRANSVR_INIT_FAIL: + snprintf(emsg, elimit, "transceiver type doesn't support"); + goto initer_err_case_alarm_to_user; + case EVENT_TRANSVR_EXCEP_INIT: + default: + goto initer_err_case_unexcept_0; + } + + /* Handle reload case */ + if (self->type != d_type){ + /* This is the protect mechanism. Normally, This case will not happen. + * When State machine detect swap event during initial, It will trigger + * reload function to ensure type correct. */ + if (_reload_transvr_obj(self, d_type) < 0){ + snprintf(emsg, elimit, "reload object fail"); + goto initer_err_case_unexcept_0; + } + } + + /* Check transceiver HW initial ready */ + switch (_is_transvr_hw_ready(self, d_type)) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_err_case_retry_1; + case EVENT_TRANSVR_INIT_FAIL: + default: + goto initer_err_case_unexcept_0; + } + + /* Try to update all and check */ + if (self->update_all(self, 1) < 0){ + /* For some transceiver, EEPROME has lag issues during initial stage. + * In this case, we set status back to STATE_TRANSVR_NEW, than it will + * be checked in next polling cycle. */ + goto initer_err_case_retry_1; + } + + /* Execute init() call back */ + result = self->init(self); + switch (result) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_ok_case_wait; + + default: + snprintf(emsg, elimit, "undefined init() return:%d\n", result); + goto initer_err_case_unexcept_0; + } + goto initer_ok_case_up; + + +initer_ok_case_wait: + return EVENT_TRANSVR_TASK_WAIT; + +initer_ok_case_up: + self->state = STATE_TRANSVR_CONNECTED; + self->temp = 0; + return EVENT_TRANSVR_INIT_UP; + +initer_ok_case_down: + self->temp = 0; + self->state = STATE_TRANSVR_DISCONNECTED; + return EVENT_TRANSVR_INIT_DOWN; + +initer_err_case_i2c_ceash: + SWPS_DEBUG("%s: %s :%s :I2C crash\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_I2C_CRASH; + +initer_err_case_be_isolated: + SWPS_DEBUG("%s: %s :%s :isolated\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return EVENT_TRANSVR_EXCEP_ISOLATED; + +initer_err_case_retry_1: + SWPS_DEBUG("%s: %s :%s :retry\n", + __func__, emsg, self->swp_name); + if (_transvr_handle_retry(self, retry) == 0) { + self->state = STATE_TRANSVR_NEW; + return EVENT_TRANSVR_INIT_REINIT; + } + goto initer_err_case_alarm_to_user; + +initer_err_case_unexcept_0: + self->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_INIT_FAIL; + +initer_err_case_alarm_to_user: + SWPS_DEBUG("%s: %s :%s :alarm_to_user\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard"); + return EVENT_TRANSVR_INIT_FAIL; +} + +static int +setup_transvr_private_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->fsm_4_direct = common_fsm_4_direct_mode; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->fsm_4_direct = common_fsm_4_direct_mode; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->fsm_4_direct = common_fsm_4_direct_mode; + return 0; + + case TRANSVR_TYPE_FAKE: + self->fsm_4_direct = fake_fsm_4_direct_mode; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static struct eeprom_map_s * +get_eeprom_map(int transvr_type){ + + switch (transvr_type){ + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + return &eeprom_map_qsfp; + case TRANSVR_TYPE_QSFP_28: + return &eeprom_map_qsfp28; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return NULL; +} + + +static int +setup_transvr_ssize_attr(char *swp_name, + struct transvr_obj_s *self, + struct eeprom_map_s *map_p, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int chan_id, + int run_mode){ + switch (run_mode){ + case TRANSVR_MODE_DIRECT: /* Direct access device mode */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = DEBUG_TRANSVR_INT_VAL; + return -1; + } + self->eeprom_map_p = map_p; + self->ioexp_obj_p = ioexp_obj_p; + self->ioexp_virt_offset = ioexp_virt_offset; + self->chan_id = chan_id; + self->layout = transvr_type; + self->type = transvr_type; + self->chipset_type = chipset_type; + self->state = STATE_TRANSVR_NEW; + self->info = STATE_TRANSVR_NEW; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + strncpy(self->swp_name, swp_name, 32); + mutex_init(&self->lock); + return 0; +} + + + +static int +setup_i2c_client(struct transvr_obj_s *self){ + + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + adap = i2c_get_adapter(self->chan_id); + if(!adap){ + snprintf(err_msg, sizeof(err_msg), + "can not get adap:%d", self->chan_id); + goto err_setup_i2c_client; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + snprintf(err_msg, sizeof(err_msg), + "can not kzalloc client:%d", self->chan_id); + goto err_setup_i2c_client; + } + client->adapter = adap; + self->i2c_client_p = client; + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return ERR_TRANSVR_UNEXCPT; +} + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode){ + + struct transvr_obj_s *result_p; + struct eeprom_map_s *map_p; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Allocate transceiver object */ + map_p = get_eeprom_map(transvr_type); + if (!map_p){ + snprintf(err_msg, sizeof(err_msg), + "Invalid transvr_type:%d", transvr_type); + goto err_create_transvr_fail; + } + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_create_transvr_fail; + } + /* Prepare static size attributes */ + if (setup_transvr_ssize_attr(swp_name, + result_p, + map_p, + ioexp_obj_p, + ioexp_virt_offset, + transvr_type, + chipset_type, + chan_id, + run_mode) < 0){ + goto err_create_transvr_sattr_fail; + } + + /* Prepare call back functions of object */ + if (setup_transvr_private_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_sattr_fail; + } + /* Prepare i2c client object */ + if (setup_i2c_client(result_p) < 0){ + goto err_create_transvr_sattr_fail; + } + return result_p; +err_create_transvr_sattr_fail: + kfree(result_p); +err_create_transvr_fail: + SWPS_ERR("%s: %s :%d :%d :%d\n", + __func__, err_msg, chan_id, ioexp_virt_offset, transvr_type); + return NULL; +} + + +static int +_reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + struct eeprom_map_s *new_map_p; + struct eeprom_map_s *old_map_p = self->eeprom_map_p; + struct i2c_client *old_i2c_p = self->i2c_client_p; + int old_type = self->type; + + /* Change state to STATE_TRANSVR_INIT */ + self->state = STATE_TRANSVR_INIT; + self->type = new_type; + /* Replace EEPROME map */ + new_map_p = get_eeprom_map(new_type); + if (!new_map_p){ + goto err_private_reload_func_1; + } + self->eeprom_map_p = new_map_p; + /* Reload i2c client */ + if (setup_i2c_client(self) < 0){ + goto err_private_reload_func_2; + } + if (setup_transvr_private_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + kfree(old_i2c_p); + return 0; + +err_private_reload_func_3: + SWPS_INFO("%s: init() fail!\n", __func__); + kfree(old_i2c_p); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return -2; + +err_private_reload_func_2: + self->eeprom_map_p = old_map_p; + self->i2c_client_p = old_i2c_p; +err_private_reload_func_1: + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = old_type; + SWPS_INFO("%s fail! :0x%02x\n", __func__, new_type); + return -1; +} + + +static int +reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + int result_val = ERR_TRANSVR_UNEXCPT; + + /* Reload phase */ + result_val = _reload_transvr_obj(self, new_type); + if (result_val < 0){ + SWPS_INFO("%s: reload phase fail! :%d\n", + __func__, result_val); + return EVENT_TRANSVR_RELOAD_FAIL; + } + /* Initial phase */ + result_val = _transvr_init_handler(self); + if (result_val < 0){ + SWPS_INFO("%s: initial phase fail! :%d\n", + __func__, result_val); + } + return result_val; +} + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/transceiver.h b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/transceiver.h new file mode 100644 index 00000000000..487fcdd7677 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/modules/transceiver.h @@ -0,0 +1,167 @@ +#ifndef TRANSCEIVER_H +#define TRANSCEIVER_H + +#include + +/* Transceiver type define */ +#define TRANSVR_TYPE_UNKNOW_1 (0x00) +#define TRANSVR_TYPE_UNKNOW_2 (0xff) +#define TRANSVR_TYPE_SFP (0x03) /* Define for SFP, SFP+, SFP28 */ +#define TRANSVR_TYPE_QSFP (0x0c) +#define TRANSVR_TYPE_QSFP_PLUS (0x0d) +#define TRANSVR_TYPE_QSFP_28 (0x11) +#define TRANSVR_TYPE_UNPLUGGED (0xfa) /* Define for ERROR handle */ +#define TRANSVR_TYPE_FAKE (0xfc) /* Define for ERROR handle */ +#define TRANSVR_TYPE_INCONSISTENT (0xfd) /* Define for ERROR handle */ +#define TRANSVR_TYPE_ERROR (0xfe) /* Define for ERROR handle */ + +/* Transceiver mode define */ +#define TRANSVR_MODE_DIRECT (21000) + +/* Transceiver state define + * [Note] + * 1. State is used to represent the state of "Transceiver" and "Object". + * 2. State for different target has different means. The description as following: + */ +#define STATE_TRANSVR_CONNECTED (0) /* [Transvr]:Be plugged in. [Obj]:Link up, and work normally. */ +#define STATE_TRANSVR_NEW (-100) /* [Transvr]:(Not used) [Obj]:Create */ +#define STATE_TRANSVR_INIT (-101) /* [Transvr]:Be plugged in. [Obj]:Link up, and in initial process. */ +#define STATE_TRANSVR_ISOLATED (-102) /* [Transvr]:Be plugged in. [Obj]:Isolate, and not provide service. */ +#define STATE_TRANSVR_SWAPPED (-200) /* [Transvr]:Be plugged in. [Obj]:(Not used) */ +#define STATE_TRANSVR_DISCONNECTED (-300) /* [Transvr]:Un-plugged. [Obj]:Link down, and not provide service. */ +#define STATE_TRANSVR_UNEXCEPTED (-901) /* [Transvr]:Any [Obj]:Any, and not in expect case. */ + +/* Event for task handling */ +#define EVENT_TRANSVR_TASK_WAIT (2101) +#define EVENT_TRANSVR_TASK_DONE (0) +#define EVENT_TRANSVR_TASK_FAIL (-2101) +/* Event for initial handling */ +#define EVENT_TRANSVR_INIT_UP (2201) +#define EVENT_TRANSVR_INIT_DOWN (1) +#define EVENT_TRANSVR_INIT_REINIT (-2201) +#define EVENT_TRANSVR_INIT_FAIL (-2202) +/* Event for others */ +#define EVENT_TRANSVR_RELOAD_FAIL (-2301) +#define EVENT_TRANSVR_EXCEP_INIT (-2401) +#define EVENT_TRANSVR_EXCEP_UP (-2402) +#define EVENT_TRANSVR_EXCEP_DOWN (-2403) +#define EVENT_TRANSVR_EXCEP_SWAP (-2404) +#define EVENT_TRANSVR_EXCEP_EXCEP (-2405) +#define EVENT_TRANSVR_EXCEP_ISOLATED (-2406) +#define EVENT_TRANSVR_I2C_CRASH (-2501) + +/* Transceiver error code define */ +#define ERR_TRANSVR_UNINIT (-201) +#define ERR_TRANSVR_UNPLUGGED (-202) +#define ERR_TRANSVR_ABNORMAL (-203) +#define ERR_TRANSVR_NOSTATE (-204) +#define ERR_TRANSVR_NOTSUPPORT (-205) +#define ERR_TRANSVR_BADINPUT (-206) +#define ERR_TRANSVR_UPDATE_FAIL (-207) +#define ERR_TRANSVR_RELOAD_FAIL (-208) +#define ERR_TRANSVR_INIT_FAIL (-209) +#define ERR_TRANSVR_UNDEFINED (-210) +#define ERR_TRANSVR_TASK_FAIL (-211) +#define ERR_TRANSVR_TASK_BUSY (-212) +#define ERR_TRANSVR_FUNC_DISABLE (-214) +#define ERR_TRANSVR_I2C_CRASH (-297) +#define ERR_TRNASVR_BE_ISOLATED (-298) +#define ERR_TRANSVR_UNEXCPT (-299) + +/* For debug */ +#define DEBUG_TRANSVR_INT_VAL (-99) +#define DEBUG_TRANSVR_HEX_VAL (0xfe) +#define DEBUG_TRANSVR_STR_VAL "ERROR" + +/* For system internal */ +#define VAL_TRANSVR_COMID_ARREESS (0x50) +#define VAL_TRANSVR_COMID_OFFSET (0x00) +#define VAL_TRANSVR_8472_READY_ADDR (0x51) +#define VAL_TRANSVR_8472_READY_PAGE (-1) +#define VAL_TRANSVR_8472_READY_OFFSET (110) +#define VAL_TRANSVR_8472_READY_BIT (0) +#define VAL_TRANSVR_8472_READY_VALUE (0) +#define VAL_TRANSVR_8472_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_READY_ADDR (0x50) +#define VAL_TRANSVR_8436_READY_PAGE (-1) +#define VAL_TRANSVR_8436_READY_OFFSET (2) +#define VAL_TRANSVR_8436_READY_BIT (0) +#define VAL_TRANSVR_8436_READY_VALUE (0) +#define VAL_TRANSVR_8436_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_PWD_ADDR (0x50) +#define VAL_TRANSVR_8436_PWD_PAGE (-1) +#define VAL_TRANSVR_8436_PWD_OFFSET (123) +#define VAL_TRANSVR_PAGE_FREE (-99) +#define VAL_TRANSVR_PAGE_SELECT_OFFSET (127) +#define VAL_TRANSVR_PAGE_SELECT_DELAY (5) +#define VAL_TRANSVR_TASK_RETRY_FOREVER (-999) +#define VAL_TRANSVR_FUNCTION_DISABLE (-1) +#define STR_TRANSVR_QSFP "QSFP" +#define STR_TRANSVR_QSFP_PLUS "QSFP+" +#define STR_TRANSVR_QSFP28 "QSFP28" + +/* BCM chip type define */ +#define BCM_CHIP_TYPE_TOMAHAWK (31002) /* Redwood, Cypress */ + +/* Info from transceiver EEPROM */ +struct eeprom_map_s { + int addr_rx_los; int page_rx_los; int offset_rx_los; int length_rx_los; + int addr_tx_disable; int page_tx_disable; int offset_tx_disable; int length_tx_disable; + int addr_tx_fault; int page_tx_fault; int offset_tx_fault; int length_tx_fault; +}; + +/* Class of transceiver object */ +struct transvr_obj_s { + /* ========== Object private property ========== + */ + struct device *transvr_dev_p; + struct eeprom_map_s *eeprom_map_p; + struct i2c_client *i2c_client_p; + struct ioexp_obj_s *ioexp_obj_p; + struct mutex lock; + char swp_name[32]; + int auto_tx_disable; + int chan_id; + int chipset_type; + int curr_page; + int info; + int ioexp_virt_offset; + int lane_id[8]; + int layout; + int mode; + int retry; + int state; + int temp; + int type; + + /* ========== Object private functions ========== + */ + int (*init)(struct transvr_obj_s *self); + int (*update_all)(struct transvr_obj_s *self, int show_err); + int (*fsm_4_direct)(struct transvr_obj_s* self, char *caller_name); +}; + + +/* For AVL Mapping */ +struct transvr_avl_s { + char vendor_name[32]; + char vendor_pn[32]; + int (*init)(struct transvr_obj_s *self); +}; + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode); + +void alarm_msg_2_user(struct transvr_obj_s *self, char *emsg); + +#endif /* TRANSCEIVER_H */ + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/utils/inventec_d7032_util.py b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/utils/inventec_d7032_util.py new file mode 100755 index 00000000000..6625efc00ed --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7032q28b/utils/inventec_d7032_util.py @@ -0,0 +1,222 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Inventec, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install() + elif arg == 'clean': + uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[D7032]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +"with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +instantiate =[ +#'echo pca9545 0x70> /sys/bus/i2c/devices/i2c-0/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-1/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-2/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-3/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-4/new_device', +#'echo inv_psoc 0x66> /sys/bus/i2c/devices/i2c-5/new_device', +#'echo inv_cpld 0x55> /sys/bus/i2c/devices/i2c-5/new_device', +'echo inv_eeprom 0x53> /sys/bus/i2c/devices/i2c-0/new_device'] + +drivers =[ +'lpc_ich', +'i2c-i801', +'i2c-mux', +'i2c-mux-pca954x', +'i2c-dev', +'inv_eeprom', +'inv_platform', +'inv_psoc', +'inv_cpld', +'swps', +'inv_pthread'] + + + +def system_install(): + global FORCE + + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("rmmod i2c_ismt ", 1) + status, output = exec_cmd("rmmod i2c-i801 ", 1) + status, output = exec_cmd("rmmod gpio_ich",1) + status, output = exec_cmd("insmod /lib/modules/3.16.0-5-amd64/extra/gpio-ich.ko gpiobase=0",1) + + #install drivers + for i in range(0,len(drivers)): + status, output = exec_cmd("modprobe "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + + #instantiate devices + for i in range(0,len(instantiate)): + time.sleep(1) + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(22,30): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-4/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(30,38): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-5/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(6,14): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-2/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(14,22): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-3/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + + +def system_ready(): + if not device_found(): + return False + return True + +def install(): + if not device_found(): + print "No device, installing...." + status = system_install() + if status: + if FORCE == 0: + return status + else: + print " D7032 devices detected...." + return + +def uninstall(): + global FORCE + exec_cmd("rmmod gpio_ich",1) + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"*0072", 0) + ret2, log = exec_cmd("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/Makefile b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/Makefile new file mode 100755 index 00000000000..37cbc2f4e8b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/Makefile @@ -0,0 +1,7 @@ +obj-m += inv_cpld.o inv_psoc.o +obj-m += inv_platform.o +obj-m += inv_pthread.o +obj-m += inv_eeprom.o +obj-m += swps.o +swps-objs := inv_swps.o io_expander.o transceiver.o + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_cpld.c b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_cpld.c new file mode 100644 index 00000000000..683ffa0ff3c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_cpld.c @@ -0,0 +1,415 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//#include "I2CHostCommunication.h" + +#define USE_SMBUS 1 + +/* definition */ +#define CPLD_INFO_OFFSET 0x00 +#define CPLD_PSU_OFFSET 0x08 +#define CPLD_LED_OFFSET 0x0E +#define CPLD_LED_STATU_OFFSET 0x0D +#define CPLD_CTL_OFFSET 0x0C + + + +/* Each client has this additional data */ +struct cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; +}; + +/*-----------------------------------------------------------------------*/ + +static ssize_t cpld_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg[0].buf = msgbuf; + msg[0].len = 1; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + + status = i2c_transfer(client->adapter, msg, 2); + + if(status == 2) + status = count; + + return status; +#endif +} + +static ssize_t cpld_i2c_write(struct i2c_client *client, char *buf, unsigned offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + + return status; +#endif +} + +/*-----------------------------------------------------------------------*/ + +/* sysfs attributes for hwmon */ + +static ssize_t show_info(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[4]; + + memset(b, 0, 4); + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, b, CPLD_INFO_OFFSET, 4); + mutex_unlock(&data->update_lock); + + if(status != 4) return sprintf(buf, "read cpld info fail\n"); + + status = sprintf (buf, "The CPLD release date is %02d/%02d/%d.\n", b[2] & 0xf, (b[3] & 0x1f), 2014+(b[2] >> 4)); /* mm/dd/yyyy*/ + status = sprintf (buf, "%sThe PCB version is %X%X\n", buf, b[0]>>4, b[0]&0xf); + status = sprintf (buf, "%sThe CPLD version is %d.%d\n", buf, b[1]>>4, b[1]&0xf); + + return strlen(buf); +} + + +static ssize_t show_ctl(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[1]; + + mutex_lock(&data->update_lock); + + status = cpld_i2c_read(client, b, CPLD_CTL_OFFSET, 1); + + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld ctl fail\n"); + + + status = sprintf (buf, "0x%X\n", b[0]); + + return strlen(buf); +} + +static ssize_t set_ctl(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + + u8 temp = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_CTL_OFFSET, 1); + if(temp) byte |= (1<<0); + else byte &= ~(1<<0); + cpld_i2c_write(client, &byte, CPLD_CTL_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + + +static char* led_str[] = { + "OFF", //000 + "0.5 Hz", //001 + "1 Hz", //010 + "2 Hz", //011 + "NA", //100 + "NA", //101 + "NA", //110 + "ON", //111 +}; + +static ssize_t show_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 0)?3:0; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld offset 0x%x\n", CPLD_LED_OFFSET); + + byte = (byte >> shift) & 0x7; + + /* + 0: off + 1: 0.5hz + 2: 1 hz + 3: 2 hz + 4~6: not define + 7: on + */ + + status = sprintf (buf, "%d: %s\n", byte, led_str[byte]); + + return strlen(buf); +} + +static ssize_t set_led(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + u8 temp = simple_strtol(buf, NULL, 16); + u8 byte; + int shift = (attr->index == 0)?3:0; + + temp &= 0x7; + //validate temp value: 0,1,2,3,7, TBD + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + byte &= ~(0x7<update_lock); + + return count; +} + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu0 | psu1 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 1)?0:3; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + + +static SENSOR_DEVICE_ATTR(info, S_IRUGO, show_info, 0, 0); +static SENSOR_DEVICE_ATTR(ctl, S_IWUSR|S_IRUGO, show_ctl, set_ctl, 0); + +static SENSOR_DEVICE_ATTR(grn_led, S_IWUSR|S_IRUGO, show_led, set_led, 0); +static SENSOR_DEVICE_ATTR(red_led, S_IWUSR|S_IRUGO, show_led, set_led, 1); + +static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu, 0, 0); +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu, 0, 1); + +static struct attribute *cpld_attributes[] = { + //info + &sensor_dev_attr_info.dev_attr.attr, + &sensor_dev_attr_ctl.dev_attr.attr, + + &sensor_dev_attr_grn_led.dev_attr.attr, + &sensor_dev_attr_red_led.dev_attr.attr, + + &sensor_dev_attr_psu0.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + + NULL +}; + +static const struct attribute_group cpld_group = { + .attrs = cpld_attributes, +}; + +/*-----------------------------------------------------------------------*/ + +/* device probe and removal */ + +static int +cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct cpld_data *data; + int status; + + printk("+%s\n", __func__); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &cpld_group); + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &cpld_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &cpld_group); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id cpld_ids[] = { + { "inv_cpld", 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, cpld_ids); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_cpld_init(void) +{ + return i2c_add_driver(&cpld_driver); +} + +static void __exit inv_cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("eddie.lan "); +MODULE_DESCRIPTION("inv cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_cpld_init); +module_exit(inv_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_eeprom.c b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_eeprom.c new file mode 100644 index 00000000000..3d13f3b0471 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_eeprom.c @@ -0,0 +1,181 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void inv_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } + +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t inv_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + inv_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute inv_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = inv_eeprom_read, +}; + +static int inv_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &inv_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int inv_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &inv_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id inv_eeprom_id[] = { + { "inv_eeprom", 0 }, + { } +}; + +static struct i2c_driver inv_eeprom_driver = { + .driver = { + .name = "inv_eeprom", + }, + .probe = inv_eeprom_probe, + .remove = inv_eeprom_remove, + .id_table = inv_eeprom_id, +}; + +module_i2c_driver(inv_eeprom_driver); + +MODULE_AUTHOR("Inventec"); +MODULE_DESCRIPTION("Inventec D7054 Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_platform.c b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_platform.c new file mode 100644 index 00000000000..ea26970075b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_platform.c @@ -0,0 +1,219 @@ +#include +//#include +#include +#include +#include +#include +#include + +#include +//#include +//#include + +//#include +//#define IO_EXPAND_BASE 64 +//#define IO_EXPAND_NGPIO 16 + +struct inv_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +#define bus_id(id) (id) +static struct pca954x_platform_mode mux_modes_0[] = { + {.adap_id = bus_id(2),}, {.adap_id = bus_id(3),}, + {.adap_id = bus_id(4),}, {.adap_id = bus_id(5),}, + {.adap_id = bus_id(6),}, {.adap_id = bus_id(7),}, + {.adap_id = bus_id(8),}, {.adap_id = bus_id(9),}, +}; +static struct pca954x_platform_mode mux_modes_0_0[] = { + {.adap_id = bus_id(10),}, {.adap_id = bus_id(11),}, + {.adap_id = bus_id(12),}, {.adap_id = bus_id(13),}, + {.adap_id = bus_id(14),}, {.adap_id = bus_id(15),}, + {.adap_id = bus_id(16),}, {.adap_id = bus_id(17),}, +}; + +static struct pca954x_platform_mode mux_modes_0_1[] = { + {.adap_id = bus_id(18),}, {.adap_id = bus_id(19),}, + {.adap_id = bus_id(20),}, {.adap_id = bus_id(21),}, + {.adap_id = bus_id(22),}, {.adap_id = bus_id(23),}, + {.adap_id = bus_id(24),}, {.adap_id = bus_id(25),}, +}; + +static struct pca954x_platform_mode mux_modes_0_2[] = { + {.adap_id = bus_id(26),}, {.adap_id = bus_id(27),}, + {.adap_id = bus_id(28),}, {.adap_id = bus_id(29),}, + {.adap_id = bus_id(30),}, {.adap_id = bus_id(31),}, + {.adap_id = bus_id(32),}, {.adap_id = bus_id(33),}, +}; + +static struct pca954x_platform_mode mux_modes_0_3[] = { + {.adap_id = bus_id(34),}, {.adap_id = bus_id(35),}, + {.adap_id = bus_id(36),}, {.adap_id = bus_id(37),}, + {.adap_id = bus_id(38),}, {.adap_id = bus_id(39),}, + {.adap_id = bus_id(40),}, {.adap_id = bus_id(41),}, +}; + +static struct pca954x_platform_mode mux_modes_0_4[] = { + {.adap_id = bus_id(42),}, {.adap_id = bus_id(43),}, + {.adap_id = bus_id(44),}, {.adap_id = bus_id(45),}, + {.adap_id = bus_id(46),}, {.adap_id = bus_id(47),}, + {.adap_id = bus_id(48),}, {.adap_id = bus_id(49),}, +}; + +static struct pca954x_platform_mode mux_modes_0_5[] = { + {.adap_id = bus_id(50),}, {.adap_id = bus_id(51),}, + {.adap_id = bus_id(52),}, {.adap_id = bus_id(53),}, + {.adap_id = bus_id(54),}, {.adap_id = bus_id(55),}, + {.adap_id = bus_id(56),}, {.adap_id = bus_id(57),}, +}; + +static struct pca954x_platform_mode mux_modes_0_6[] = { + {.adap_id = bus_id(58),}, {.adap_id = bus_id(59),}, + {.adap_id = bus_id(60),}, {.adap_id = bus_id(61),}, + {.adap_id = bus_id(62),}, {.adap_id = bus_id(63),}, + {.adap_id = bus_id(64),}, {.adap_id = bus_id(65),}, +}; + +//no i2c device driver attach to mux 7 + + +static struct pca954x_platform_data mux_data_0 = { + .modes = mux_modes_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_0 = { + .modes = mux_modes_0_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_1 = { + .modes = mux_modes_0_1, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_2 = { + .modes = mux_modes_0_2, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_3 = { + .modes = mux_modes_0_3, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_4 = { + .modes = mux_modes_0_4, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_5 = { + .modes = mux_modes_0_5, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_6 = { + .modes = mux_modes_0_6, + .num_modes = 8, +}; + +static struct i2c_board_info i2c_device_info0[] __initdata = { + {"inv_psoc", 0, 0x66, 0, 0, 0},//psoc + {"inv_cpld", 0, 0x55, 0, 0, 0},//cpld + {"pca9548", 0, 0x71, &mux_data_0, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info2[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_0, 0, 0}, +}; +static struct i2c_board_info i2c_device_info3[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_1, 0, 0}, +}; +static struct i2c_board_info i2c_device_info4[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_2, 0, 0}, +}; +static struct i2c_board_info i2c_device_info5[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_3, 0, 0}, +}; +static struct i2c_board_info i2c_device_info6[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_4, 0, 0}, +}; +static struct i2c_board_info i2c_device_info7[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_5, 0, 0}, +}; +static struct i2c_board_info i2c_device_info8[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_6, 0, 0}, +}; + + +static struct inv_i2c_board_info i2cdev_list[] = { + {0, ARRAY_SIZE(i2c_device_info0), i2c_device_info0 }, //smbus 0 + + {bus_id(2), ARRAY_SIZE(i2c_device_info2), i2c_device_info2 }, //mux 0 + {bus_id(3), ARRAY_SIZE(i2c_device_info3), i2c_device_info3 }, //mux 1 + {bus_id(4), ARRAY_SIZE(i2c_device_info4), i2c_device_info4 }, //mux 2 + {bus_id(5), ARRAY_SIZE(i2c_device_info5), i2c_device_info5 }, //mux 3 + {bus_id(6), ARRAY_SIZE(i2c_device_info6), i2c_device_info6 }, //mux 4 + {bus_id(7), ARRAY_SIZE(i2c_device_info7), i2c_device_info7 }, //mux 5 + {bus_id(8), ARRAY_SIZE(i2c_device_info8), i2c_device_info8 }, //mux 6 + +}; + +///////////////////////////////////////////////////////////////////////////////////////// +#if 0 +static struct i2c_gpio_platform_data i2c_gpio_platdata0 = { + .scl_pin = 58, + .sda_pin = 75, + + .udelay = 5, //5:100kHz + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .scl_is_output_only = 0 +}; + +static struct platform_device device_i2c_gpio0 = { + .name = "i2c-gpio", + .id = 0, // adapter number + .dev.platform_data = &i2c_gpio_platdata0, +}; +#endif +static int __init inv_platform_init(void) +{ + struct i2c_adapter *adap = NULL; + struct i2c_client *e = NULL; + int ret = 0; + int i,j; + + printk("%s \n", __func__); + +#if 0 + //use i2c-gpio + //register i2c gpio + //config gpio58,75 to gpio function 58=32+3*8+2 75=32*2+8*1+3 + outl( inl(0x533) | (1<<2), 0x533); + outl( inl(0x541) | (1<<3), 0x541); + + ret = platform_device_register(&device_i2c_gpio0); + if (ret) { + printk(KERN_ERR "i2c-gpio: device_i2c_gpio0 register fail %d\n", ret); + } + #endif + for(i=0; i +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//#include "I2CHostCommunication.h" + +#define IMPLEMENT_IPMI_CODE 1 +int USE_IPMI=0; +//================================= +#if IMPLEMENT_IPMI_CODE +#include +#include +#include +#include + +#define IPMI_MAX_INTF (4) +#define NETFN_OEM 0x30 +#define CMD_GETDATA 0x31 +#define CMD_SETDATA 0x32 + +struct mutex ipmi_mutex; + +static void msg_handler(struct ipmi_recv_msg *msg,void* handler_data); +static ipmi_user_t ipmi_mh_user = NULL; +static struct ipmi_user_hndl ipmi_hndlrs = { .ipmi_recv_hndl = msg_handler,}; + +static atomic_t dummy_count = ATOMIC_INIT(0); +static void dummy_smi_free(struct ipmi_smi_msg *msg) +{ + atomic_dec(&dummy_count); +} +static void dummy_recv_free(struct ipmi_recv_msg *msg) +{ + atomic_dec(&dummy_count); +} +static struct ipmi_smi_msg halt_smi_msg = { + .done = dummy_smi_free +}; +static struct ipmi_recv_msg halt_recv_msg = { + .done = dummy_recv_free +}; +#endif +//================================= + +#define USE_SMBUS 1 + +#define FAN_NUM 4 +#define PSU_NUM 2 + +struct __attribute__ ((__packed__)) psoc_psu_layout { + u16 psu1_iin; + u16 psu2_iin; + u16 psu1_iout; + u16 psu2_iout; + + u16 psu1_pin; + u16 psu2_pin; + u16 psu1_pout; + u16 psu2_pout; + + u16 psu1_vin; + u16 psu2_vin; + u16 psu1_vout; + u16 psu2_vout; +}; + +struct __attribute__ ((__packed__)) psoc_layout { + u8 ctl; //offset: 0 + u16 switch_temp; //offset: 1 + u8 reserve0; //offset: 3 + + u8 fw_upgrade; //offset: 4 + + //i2c bridge + u8 i2c_st; //offset: 5 + u8 i2c_ctl; //offset: 6 + u8 i2c_addr; //offset: 7 + u8 i2c_data[0x20]; //offset: 8 + + //gpo + u8 led_ctl; //offset: 28 + + u8 gpio; //offset: 29 + + //pwm duty + u8 pwm[FAN_NUM]; //offset: 2a + u8 pwm_psu[PSU_NUM]; //offset: 2e + + //fan rpm + u16 fan[FAN_NUM*2]; //offset: 30 + + u8 reserve1[4]; //offset: 40 + + //gpi + u8 gpi_fan; //offset: 44 + + //psu state + u8 psu_state; //offset: 45 + + //temperature + u16 temp[5]; //offset: 46 + u16 temp_psu[PSU_NUM]; //offset: 50 + + //version + u8 version[2]; //offset: 54 + + u8 reserve2[4]; //offset: 56 + struct psoc_psu_layout psu_info; //offset: 5a +}; + +/* definition */ +/* definition */ +#define PSOC_OFF(m) offsetof(struct psoc_layout, m) +#define PSOC_PSU_OFF(m) offsetof(struct psoc_psu_layout, m) + +#define SWITCH_TMP_OFFSET PSOC_OFF(switch_temp) +#define PWM_OFFSET PSOC_OFF(pwm) +#define THERMAL_OFFSET PSOC_OFF(temp) +#define RPM_OFFSET PSOC_OFF(fan) +#define DIAG_FLAG_OFFSET PSOC_OFF(ctl) +#define FAN_LED_OFFSET PSOC_OFF(led_ctl) +#define FAN_GPI_OFFSET PSOC_OFF(gpi_fan) +#define PSOC_PSU_OFFSET PSOC_OFF(psu_state) +#define VERSION_OFFSET PSOC_OFF(version) +#define PSU_INFO_OFFSET PSOC_OFF(psu_info) + +/* Each client has this additional data */ +struct psoc_data { + struct device *hwmon_dev; + struct mutex update_lock; + u32 diag; +}; + +/*-----------------------------------------------------------------------*/ +#if IMPLEMENT_IPMI_CODE +static void msg_handler(struct ipmi_recv_msg *recv_msg,void* handler_data) +{ + struct completion *comp = recv_msg->user_msg_data; + if (comp) + complete(comp); + else + ipmi_free_recv_msg(recv_msg); + return; +} + +int ipmi_command(char NetFn, char cmd,char *data,int data_length, char* result, int* result_length) +{ + int rv=0,i; + struct ipmi_system_interface_addr addr; + uint8_t _data[data_length]; + struct kernel_ipmi_msg msg; + struct completion comp; + + if(!mutex_trylock(&ipmi_mutex)) return 0; + +// for (i=0,rv=1; iaddr; + msg[0].buf = msgbuf; + msg[0].len = 1; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + + status = i2c_transfer(client->adapter, msg, 2); + + if(status == 2) + status = count; + + return status; +#endif +} + +static ssize_t psoc_i2c_write(struct i2c_client *client, char *buf, unsigned offset, size_t count) +{ +#if USE_SMBUS +if(USE_IPMI==0) +{ + int i; + + for(i=0; iaddr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + + return status; +#endif +} + +#if 0 +static u32 psoc_read32(struct i2c_client *client, u8 offset) +{ + u32 value = 0; + u8 buf[4]; + + if( psoc_i2c_read(client, buf, offset, 4) == 4) + value = (buf[0]<<24 | buf[1]<<16 | buf[2]<<8 | buf[3]); + + return value; +} +#endif + +static u16 psoc_read16(struct i2c_client *client, u8 offset) +{ + u16 value = 0; + u8 buf[2]; + + if(psoc_i2c_read(client, buf, offset, 2) == 2) + value = (buf[0]<<8 | buf[1]<<0); + + return value; +} + +static u8 psoc_read8(struct i2c_client *client, u8 offset) +{ + u8 value = 0; + u8 buf = 0; + + if(psoc_i2c_read(client, &buf, offset, 1) == 1) + value = buf; + + return value; +} + +//PSOC i2c bridge regsters +#define PSOC_I2C_STATUS 0x05 +#define PSOC_I2C_CNTRL 0x06 +#define PSOC_I2C_ADDR 0x07 +#define PSOC_I2C_DATA 0x08 + +//status bit definition +#define PSOC_I2C_START (1 << 0) +#define PSOC_PMB_SEL (1 << 7) + +//addr bits definition +#define PSOC_I2C_READ (1 << 0) + +//PMBUS registers definition +#define PMBUS_READ_VIN (0x88) +#define PMBUS_READ_IIN (0x89) +#define PMBUS_READ_VOUT (0x8B) +#define PMBUS_READ_IOUT (0x8C) +#define PMBUS_READ_POUT (0x96) +#define PMBUS_READ_PIN (0x97) + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu1 | psu0 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu_st(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 0)?3:0; + + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client, &byte, PSOC_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + +/*-----------------------------------------------------------------------*/ + +/* sysfs attributes for hwmon */ +#define PSU1 0x5800 +#define PSU2 0x5900 +#define BMC_I2cBus 3 //BMC's I2C-1 +#define PMBus_Vender 0x99 +#define PMBus_Serial 0x9E +#define PMBus_Temp2 0x8E +#define PMBus_Version 0x9B +#define MaxLeng_Result 0x20 +#define MaxLog +static long pmbus_reg2data_linear(int data, int linear16); + + +static ssize_t show_ipmi_i2c(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + uint8_t data[4],result[MaxLeng_Result]; + int result_len; + + data[0] = BMC_I2cBus; + data[1] = (attr->index & 0xFF00 ) >>7; + data[3] = attr->index & 0xff; + if(data[3]==PMBus_Temp2) + data[2]=2; + else + data[2]=MaxLeng_Result; + + if(ipmi_command(0x06, 0x52,data,4, result, &result_len)==0) + { + if(data[3]==PMBus_Temp2) + { + return sprintf(buf, "%ld \n", pmbus_reg2data_linear(result[0] | (result[1]<<8), 0 )); + } + result[result[0]+1]='\0'; + + return sprintf(buf, "%s\n",&result[1] ); + } + else + return 0; +} + +static ssize_t show_ipmi_sollog(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + uint8_t data[5],result[256]; + int result_len; + uint32_t i; + + for(i=0;i<0xffffff;i+=255) + { + data[0] = attr->index; + data[1] = (i & 0x0000ff); + data[2] = (i & 0x00ff00)>>8; + data[3] = (i & 0xff0000)>>16; + data[4] = 0; + + result_len=0; + + if(ipmi_command(0x32, 0xFE, data, 5, result, &result_len)==0) + { + if(result_len==0) break; + result[result_len+1]='\0'; + printk("%s",result); + } + else break; + + if(result_len==0) break; + } + + return 0; +} + +static ssize_t show_thermal(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index * 2 + THERMAL_OFFSET; + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + (s8)(status>>8) * 1000 ); +} + + + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index + PWM_OFFSET; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t set_pwm(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index + PWM_OFFSET; + + u8 pwm = simple_strtol(buf, NULL, 10); + if(pwm > 255) pwm = 255; + + if(data->diag) { + mutex_lock(&data->update_lock); + psoc_i2c_write(client, &pwm, offset, 1); + mutex_unlock(&data->update_lock); + } + + return count; +} + + +static ssize_t show_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index*2 + RPM_OFFSET; + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t show_switch_tmp(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u16 temp = 0; + + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client, (u8*)&temp, SWITCH_TMP_OFFSET, 2); + mutex_unlock(&data->update_lock); + + status = sprintf (buf, "%d\n", (s8)(temp>>8) * 1000 ); + + return strlen(buf); +} + +static ssize_t set_switch_tmp(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + + long temp = simple_strtol(buf, NULL, 10); + u16 temp2 = ( (temp/1000) <<8 ) & 0xFF00 ; + + //printk("set_switch_tmp temp=%d, temp2=0x%x (%x,%x)\n", temp, temp2, ( ( (temp/1000) <<8 ) & 0xFF00 ), (( (temp%1000) / 10 ) & 0xFF)); + + mutex_lock(&data->update_lock); + psoc_i2c_write(client, (u8*)&temp2, SWITCH_TMP_OFFSET, 2); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_diag(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 diag_flag = 0; + + mutex_lock(&data->update_lock); + status = psoc_i2c_read(client, (u8*)&diag_flag, DIAG_FLAG_OFFSET, 1); + mutex_unlock(&data->update_lock); + + data->diag = (diag_flag & 0x80)?1:0; + status = sprintf (buf, "%d\n", data->diag); + + return strlen(buf); +} + +static ssize_t set_diag(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 value = 0; + u8 diag = simple_strtol(buf, NULL, 10); + + diag = diag?1:0; + data->diag = diag; + + mutex_lock(&data->update_lock); + psoc_i2c_read(client, (u8*)&value, DIAG_FLAG_OFFSET, 1); + if(diag) value |= (1<<7); + else value &= ~(1<<7); + psoc_i2c_write(client, (u8*)&value, DIAG_FLAG_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + status = psoc_read16(client, VERSION_OFFSET); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "ver: %x.%x\n", (status & 0xFF00)>>8, (status & 0xFF) ); +} + + +static ssize_t show_fan_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 bit = attr->index; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, FAN_LED_OFFSET); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%d\n", + (status & (1<index; + u8 led_state = 0; + + u8 v = simple_strtol(buf, NULL, 10); + + if(data->diag) { + mutex_lock(&data->update_lock); + led_state = psoc_read8(client, FAN_LED_OFFSET); + if(v) led_state |= (1<update_lock); + } + + return count; +} + +static ssize_t show_value8(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index; + + mutex_lock(&data->update_lock); + + status = psoc_read8(client, offset); + + mutex_unlock(&data->update_lock); + + return sprintf(buf, "0x%02X\n", status ); +} + +static long pmbus_reg2data_linear(int data, int linear16) +{ + s16 exponent; + s32 mantissa; + long val; + + if (linear16) { /* LINEAR16 */ + exponent = -9; + mantissa = (u16) data; + } else { /* LINEAR11 */ + exponent = ((s16)data) >> 11; + exponent = ((s16)( data & 0xF800) ) >> 11; + mantissa = ((s32)((data & 0x7ff) << 5)) >> 5; + } + + //printk("data=%d, m=%d, e=%d\n", data, exponent, mantissa); + val = mantissa; + + /* scale result to micro-units for power sensors */ + val = val * 1000L; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +static ssize_t show_psu_psoc(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psoc_data *data = i2c_get_clientdata(client); + u8 offset = attr->index + PSU_INFO_OFFSET; + + mutex_lock(&data->update_lock); + status = psoc_read16(client, offset); + mutex_unlock(&data->update_lock); + + return sprintf(buf, "%ld \n", pmbus_reg2data_linear(status, strstr(attr->dev_attr.attr.name, "vout")? 1:0 )); +} + + + +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_thermal, 0, 0); +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_thermal, 0, 1); +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_thermal, 0, 2); +static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_thermal, 0, 3); +static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_thermal, 0, 4); +static SENSOR_DEVICE_ATTR(thermal_psu1, S_IRUGO, show_thermal, 0, 5); +static SENSOR_DEVICE_ATTR(thermal_psu2, S_IRUGO, show_thermal, 0, 6); + +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 0); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 1); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 2); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 3); +static SENSOR_DEVICE_ATTR(pwm_psu1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 4); +static SENSOR_DEVICE_ATTR(pwm_psu2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 5); + +static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu_st, 0, 0); +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu_st, 0, 1); + +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_rpm, 0, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_rpm, 0, 1); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_rpm, 0, 2); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_rpm, 0, 3); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_rpm, 0, 4); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_rpm, 0, 5); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_rpm, 0, 6); +static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_rpm, 0, 7); +static SENSOR_DEVICE_ATTR(rpm_psu1, S_IRUGO, show_rpm, 0, 8); +static SENSOR_DEVICE_ATTR(rpm_psu2, S_IRUGO, show_rpm, 0, 9); + +static SENSOR_DEVICE_ATTR(switch_tmp, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); +static SENSOR_DEVICE_ATTR(temp6_input, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); + +static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, 0, 0); + +static SENSOR_DEVICE_ATTR(fan_led_grn1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 0); +static SENSOR_DEVICE_ATTR(fan_led_grn2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 1); +static SENSOR_DEVICE_ATTR(fan_led_grn3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 2); +static SENSOR_DEVICE_ATTR(fan_led_grn4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 3); +static SENSOR_DEVICE_ATTR(fan_led_red1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 4); +static SENSOR_DEVICE_ATTR(fan_led_red2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 5); +static SENSOR_DEVICE_ATTR(fan_led_red3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 6); +static SENSOR_DEVICE_ATTR(fan_led_red4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 7); + +static SENSOR_DEVICE_ATTR(fan_gpi, S_IRUGO, show_value8, 0, FAN_GPI_OFFSET); +static SENSOR_DEVICE_ATTR(psoc_psu1_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pout)); + + +static SENSOR_DEVICE_ATTR(psoc_psu2_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pout)); + +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); + + +//IPMI +static SENSOR_DEVICE_ATTR(thermal2_psu1, S_IRUGO, show_ipmi_i2c, 0, PSU1 | PMBus_Temp2); +static SENSOR_DEVICE_ATTR(psoc_psu1_vender, S_IRUGO, show_ipmi_i2c, 0, PSU1 | PMBus_Vender); +static SENSOR_DEVICE_ATTR(psoc_psu1_serial, S_IRUGO, show_ipmi_i2c, 0, PSU1 | PMBus_Serial); +static SENSOR_DEVICE_ATTR(psoc_psu1_version, S_IRUGO, show_ipmi_i2c, 0, PSU1 | PMBus_Version); + +static SENSOR_DEVICE_ATTR(thermal2_psu2, S_IRUGO, show_ipmi_i2c, 0, PSU2 | PMBus_Temp2); +static SENSOR_DEVICE_ATTR(psoc_psu2_vender, S_IRUGO, show_ipmi_i2c, 0, PSU2 | PMBus_Vender); +static SENSOR_DEVICE_ATTR(psoc_psu2_serial, S_IRUGO, show_ipmi_i2c, 0, PSU2 | PMBus_Serial); +static SENSOR_DEVICE_ATTR(psoc_psu2_version, S_IRUGO, show_ipmi_i2c, 0, PSU2 | PMBus_Version); + +static SENSOR_DEVICE_ATTR(sollog1, S_IRUGO, show_ipmi_sollog, 0, 1); +static SENSOR_DEVICE_ATTR(sollog2, S_IRUGO, show_ipmi_sollog, 0, 2); + +static struct attribute *psoc_attributes[] = { + //thermal + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_temp4_input.dev_attr.attr, + &sensor_dev_attr_temp5_input.dev_attr.attr, + + &sensor_dev_attr_thermal_psu1.dev_attr.attr, + &sensor_dev_attr_thermal_psu2.dev_attr.attr, + + + //pwm + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, + &sensor_dev_attr_pwm_psu1.dev_attr.attr, + &sensor_dev_attr_pwm_psu2.dev_attr.attr, + + //rpm + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_fan8_input.dev_attr.attr, + + &sensor_dev_attr_rpm_psu1.dev_attr.attr, + &sensor_dev_attr_rpm_psu2.dev_attr.attr, + + //switch temperature + &sensor_dev_attr_switch_tmp.dev_attr.attr, + &sensor_dev_attr_temp6_input.dev_attr.attr, + + //diag flag + &sensor_dev_attr_diag.dev_attr.attr, + + //version + &sensor_dev_attr_version.dev_attr.attr, + + //fan led + &sensor_dev_attr_fan_led_grn1.dev_attr.attr, + &sensor_dev_attr_fan_led_grn2.dev_attr.attr, + &sensor_dev_attr_fan_led_grn3.dev_attr.attr, + &sensor_dev_attr_fan_led_grn4.dev_attr.attr, + &sensor_dev_attr_fan_led_red1.dev_attr.attr, + &sensor_dev_attr_fan_led_red2.dev_attr.attr, + &sensor_dev_attr_fan_led_red3.dev_attr.attr, + &sensor_dev_attr_fan_led_red4.dev_attr.attr, + + //fan GPI + &sensor_dev_attr_fan_gpi.dev_attr.attr, + &sensor_dev_attr_psu0.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + + + //psu_psoc, new added on psoc 1.9 + &sensor_dev_attr_psoc_psu1_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pout.dev_attr.attr, + + // Add new fields which matching standard + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + + //ipmi_command + &sensor_dev_attr_thermal2_psu1.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_vender.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_serial.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_version.dev_attr.attr, + + &sensor_dev_attr_thermal2_psu2.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vender.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_serial.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_version.dev_attr.attr, + + &sensor_dev_attr_sollog1.dev_attr.attr, + &sensor_dev_attr_sollog2.dev_attr.attr, + + NULL +}; + +static const struct attribute_group psoc_group = { + .attrs = psoc_attributes, +}; + +/*-----------------------------------------------------------------------*/ + +/* device probe and removal */ + +static int +psoc_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct psoc_data *data; + int status,i,rv; + + printk("+%s\n", __func__); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct psoc_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->diag = 0; + +#if IMPLEMENT_IPMI_CODE + for (i=0,rv=1; idev.kobj, &psoc_group); + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &psoc_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int psoc_remove(struct i2c_client *client) +{ + struct psoc_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &psoc_group); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id psoc_ids[] = { + { "inv_psoc", 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, psoc_ids); + +static struct i2c_driver psoc_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_psoc", + }, + .probe = psoc_probe, + .remove = psoc_remove, + .id_table = psoc_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_psoc_init(void) +{ + return i2c_add_driver(&psoc_driver); +} + +static void __exit inv_psoc_exit(void) +{ + i2c_del_driver(&psoc_driver); +} + +MODULE_AUTHOR("eddie.lan "); +MODULE_DESCRIPTION("inv psoc driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_psoc_init); +module_exit(inv_psoc_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_pthread.c b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_pthread.c new file mode 100644 index 00000000000..4ca41e432be --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_pthread.c @@ -0,0 +1,1284 @@ +/***************************** + Cypress platform +******************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define INV_PTHREAD_KERNEL_MODULE + +#define SHOW_ATTR_WARNING ("N/A") +#define SHOW_ATTR_NOTPRINT ("Not Available") +#define SHOW_ATTR_NOTSUPPORT ("Not Support") + +#define INV_HWMID_MAX (10) +#define INV_HWMID_INIT (-1) + +/*access userspace data to kernel space*/ +#define ACC_R (0) +#define ACC_W (1) + +#define TINY_BUF_SIZE (8) +#define MAX_PATH_SIZE (64) +#define MIN_ACC_SIZE (32) +#define MAX_ACC_SIZE (256) + +/* + * LED definitions + */ +#define STATUS_LED_MODE_AUTO 0 +#define STATUS_LED_MODE_DIAG 1 +#define STATUS_LED_MODE_MANU 2 + +#define STATUS_LED_GRN0 10 // 0 - 000: off +#define STATUS_LED_GRN1 11 // 1 - 001: 0.5hz +#define STATUS_LED_GRN2 12 // 2 - 010: 1 hz +#define STATUS_LED_GRN3 13 // 3 - 011: 2 hz +#define STATUS_LED_GRN7 17 // 7 - 111: on +#define STATUS_LED_RED0 20 // 0 - 000: off +#define STATUS_LED_RED1 21 // 1 - 001: 0.5hz +#define STATUS_LED_RED2 22 // 2 - 010: 1 hz +#define STATUS_LED_RED3 23 // 3 - 011: 2 hz +#define STATUS_LED_RED7 27 // 7 - 111: on +#define STATUS_LED_INVALID 0 // Invalid + +ssize_t status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2); +ssize_t status_led_grn(const char *freq); +ssize_t status_led_red(const char *freq); +ssize_t status_led_diag_mode_enable(void); +ssize_t status_led_diag_mode_disable(void); +int status_led_check_color(void); +int status_led_check_diag_mode(void); + +#if 1 +/* For timestamps in SYSFS_LOG */ +#define SYSFS_LOG printk +#else +//#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[SYSFS] %s/%d: " fmt, __func__, __LINE__, ##args) +#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[p_thread] " fmt, ##args) +#endif + + +/* inventec_class *********************************/ +static struct kobject *status_kobj; +static struct kset *status_kset; + + +static struct mutex rw_lock; + +static int hwm_psoc = INV_HWMID_INIT; +static int hwm_cpld = INV_HWMID_INIT; + +int get_hwm_psoc(void) +{ + return hwm_psoc; +} + +int get_hwm_cpld(void) +{ + return hwm_cpld; +} + +static ssize_t access_user_space(const char *name, int mode, char *buf, size_t len, loff_t offset) +{ + struct file *fp; + mm_segment_t fs; + loff_t pos = offset; + char *mark = NULL; + ssize_t vfs_ret = 0; + + if (mode == ACC_R) { + fp = filp_open(name, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_read(fp, buf, len, &pos); + + mark = strpbrk(buf, "\n"); + if (mark) + *mark = '\0'; + + filp_close(fp, NULL); + set_fs(fs); + } else if (mode == ACC_W) { + fp = filp_open(name, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_write(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + } + + return vfs_ret; +} + +int inventec_strtol(const char *sbufp, char **endp, unsigned int base) +{ + char *endptr; + int value = simple_strtol(sbufp, &endptr, base); + if (value == 0 && sbufp == endptr) { + *endp = NULL; + return value; + } + *endp = (char*)1; + return value; +} + +int inventec_singlechar_to_int(const char c) +{ + if ((c >= '0') && (c <= '9')) { + return (c - '0'); + } + else + if ((c >= 'a') && (c <= 'f')) { + return (c - 'a' + 10); + } + else + if ((c >= 'A') && (c <= 'F')) { + return (c - 'A' + 10); + } + return -1; +} + +int inventec_store_input(char *inputp, int count) +{ + int i = 0; + while(inputp[i] != '\n' && inputp[i] != '\0' && i < count) { + i++; + } + inputp[i] = '\0'; + return strlen(inputp); +} + +#if 0 +/* + * Time stamps for kernel log on yocto + */ +#include + +void SYSFS_LOG(char *fmt, ...) +{ + char buf[80], ts[32]; + va_list args; + int hlen; + + inventec_tmstmp(&ts[0]); + hlen = sprintf(buf, "[SYSFS] %s ", ts); // Do not edit this line + + va_start(args, fmt); + vsprintf(&buf[hlen-1], fmt, args); + va_end(args); + printk(KERN_WARNING "[p_thread] %s\n", buf); +} +#endif + +ssize_t +inventec_show_attr(char *buf_p, const char *invdevp) +{ + int inv_len = MAX_ACC_SIZE; /* INV driver return max length */ + char tmp_buf[MAX_ACC_SIZE]; + char *str_negative = "-", *mark = NULL; + + /* [Step2] Get data by uaccess */ + memset(tmp_buf, 0, sizeof(tmp_buf)); + mutex_lock(&rw_lock); + if (access_user_space(invdevp, ACC_R, tmp_buf, inv_len, 0) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + mutex_unlock(&rw_lock); + + /* [Step3] Check return value + * - Ex: When transceiver not plugged + * => SWPS return error code "-202" + * => Pic8 need return "NA" (assume) + */ + if (strcspn(tmp_buf, str_negative) == 0) { + /* error case: "-202" */ + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + + /* OK case:*/ + mark = strpbrk(tmp_buf, "\n"); + if (mark) { *mark = '\0'; } + + return sprintf(buf_p, "%s\n", tmp_buf); +} + +ssize_t +inventec_store_attr(const char *buf_p, size_t count, const char *invdevp) +{ + ssize_t ret = 0; + + /* [Step2] Get data by uaccess */ + mutex_lock(&rw_lock); + if ((ret = access_user_space(invdevp, ACC_W, (char*)buf_p, count, 0)) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return -EINVAL; + } + mutex_unlock(&rw_lock); + + /* OK case:*/ + return ret; +} + +int sysfs_detect_hwmon_index(void) +{ + char hwmon_buf[MAX_ACC_SIZE]; + char hwmon_path[MAX_PATH_SIZE]; + int hwid = 0; + + for (hwid = 0; + hwid < INV_HWMID_MAX && (hwm_psoc == INV_HWMID_INIT || hwm_cpld == INV_HWMID_INIT); + hwid++) { + memset(hwmon_buf, 0, sizeof(hwmon_buf)); + sprintf(hwmon_path, "/sys/class/hwmon/hwmon%d/device/name", hwid); + + inventec_show_attr(hwmon_buf, hwmon_path); + if (strncmp(hwmon_buf, "inv_psoc", 8) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_bmc", 7) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_cpld", 8) == 0) { + hwm_cpld = hwid; + } + } + if (hwid >= INV_HWMID_MAX) { + printk(KERN_ERR "[p_thread] detect hwmon index failed, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return -1; + } + printk(KERN_INFO "[p_thread] detect hwmon index success, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return 0; +} + +static int __init +inventec_class_init(void) +{ + mutex_init(&rw_lock); + +#ifdef INV_PTHREAD_KERNEL_MODULE + if (sysfs_detect_hwmon_index() < 0) { + return -1; + } +#endif + + printk(KERN_INFO "[p_thread] [%s/%d] Module initial success.\n",__func__,__LINE__); + + return 0; +} + +static void __exit +inventec_class_exit(void) +{ + printk(KERN_INFO "[p_thread] [%s/%d] Remove module.\n",__func__,__LINE__); +} + +/* fan device *************************************/ +#define FAN_DEV_PATH_STATE "/sys/class/hwmon/hwmon%d/device/fan_gpi" +#define FAN_DEV_PATH_FAN1_INPUT "/sys/class/hwmon/hwmon%d/device/fan1_input" +#define FAN_DEV_PATH_FAN2_INPUT "/sys/class/hwmon/hwmon%d/device/fan2_input" +#define FAN_DEV_PATH_FAN3_INPUT "/sys/class/hwmon/hwmon%d/device/fan3_input" +#define FAN_DEV_PATH_FAN4_INPUT "/sys/class/hwmon/hwmon%d/device/fan4_input" +#define FAN_DEV_PATH_FAN5_INPUT "/sys/class/hwmon/hwmon%d/device/fan5_input" +#define FAN_DEV_PATH_FAN6_INPUT "/sys/class/hwmon/hwmon%d/device/fan6_input" +#define FAN_DEV_PATH_FAN7_INPUT "/sys/class/hwmon/hwmon%d/device/fan7_input" +#define FAN_DEV_PATH_FAN8_INPUT "/sys/class/hwmon/hwmon%d/device/fan8_input" + +static char fan_dev_path_state[MAX_PATH_SIZE]; +static char fan_dev_path_fan1_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan2_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan3_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan4_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan5_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan6_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan7_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan8_input[MAX_PATH_SIZE]; + +void sysfs_fan_path_init(void) +{ + sprintf(&fan_dev_path_state[0], FAN_DEV_PATH_STATE, get_hwm_psoc()); + sprintf(&fan_dev_path_fan1_input[0],FAN_DEV_PATH_FAN1_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan2_input[0],FAN_DEV_PATH_FAN2_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan3_input[0],FAN_DEV_PATH_FAN3_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan4_input[0],FAN_DEV_PATH_FAN4_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan5_input[0],FAN_DEV_PATH_FAN5_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan6_input[0],FAN_DEV_PATH_FAN6_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan7_input[0],FAN_DEV_PATH_FAN7_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan8_input[0],FAN_DEV_PATH_FAN8_INPUT, get_hwm_psoc()); +} + +#define FAN_STATE_NORMAL "normal" +#define FAN_STATE_FAULTY "faulty" +#define FAN_STATE_UNINSTALLED "uninstalled" +#define FAN_STATE_UNKNOW "unknown state" +#define FAN_STATE_INVALID "Invalid state value" +#define FAN_STATE_READ_ERROR "state read error" + +#define FAN_LOG_UNINSTALLED "removed" +#define FAN_LOG_NORMAL "inserted" + +//#define FAN_STATE_BIT_NORMAL 0 +#define FAN_STATE_BIT_FAULTY 0 +#define FAN_STATE_BIT_UNINSTALLED 1 +#define FAN_STATE_BIT_UNKNOW 2 +#define FAN_STATE_BIT_INVALID 3 +#define FAN_STATE_BIT_READ_ERROR 4 + +static struct fans_tbl_s { + char *fan_name; + char *fan_front; + char *fan_rear; + unsigned int fan_state; +} fans_tbl[] = { + {"fan1", fan_dev_path_fan1_input, + fan_dev_path_fan2_input, 0}, + {"fan2", fan_dev_path_fan3_input, + fan_dev_path_fan4_input, 0}, + {"fan3", fan_dev_path_fan5_input, + fan_dev_path_fan6_input, 0}, + {"fan4", fan_dev_path_fan7_input, + fan_dev_path_fan8_input, 0}, +}; +#define FAN_TBL_TOTAL ( sizeof(fans_tbl)/ sizeof(const struct fans_tbl_s) ) + +#define FAN_STATE_CHECK(i,b) (fans_tbl[i].fan_state & (1< 0) + { + printk(KERN_ERR "[p_thread] All fans failed.\n"); + printk(KERN_ERR "[p_thread] System shutdown immediately in %d seconds.\n", cd_shutdown); + } + cd_shutdown -= 1; + } + return ret; +} + +/* End of faninfo_device */ + +static int __init +fan_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_fan_path_init(); +#endif + return 0; +} + + +static void __exit +fan_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove fan module.\n"); +} + +/* psu device *************************************/ +static unsigned int psu_voltin = 0; +#define PSU_VOLTIN_ACDC (70000) + +/* + * normal/unpower/uninstall/fault are PSU states output from driver level + * checkpsu/error are defined by sysfs + */ +#define PSU_STATE_VAL_NORMAL (0) +#define PSU_STATE_VAL_UNPOWER (2) +#define PSU_STATE_VAL_FAULT (4) +#define PSU_STATE_VAL_UNINSTALL (7) +#define PSU_STATE_VAL_CHECKPSU (8) +#define PSU_STATE_VAL_ERROR (9) + +#define PSU_STATE_NORMAL ("0 : normal") +#define PSU_STATE_UNPOWER ("2 : unpowered") +#define PSU_STATE_FAULT ("4 : fault") +#define PSU_STATE_UNINSTALL ("7 : not installed") +#define PSU_STATE_CHECKPSU ("8 : check psu") +#define PSU_STATE_ERROR ("9 : state error") + +#define PSU_STATE_LEN_NORMAL (strlen(PSU_STATE_NORMAL)) +#define PSU_STATE_LEN_UNPOWER (strlen(PSU_STATE_UNPOWER)) +#define PSU_STATE_LEN_FAULT (strlen(PSU_STATE_FAULT)) +#define PSU_STATE_LEN_UNINSTALL (strlen(PSU_STATE_UNINSTALL)) +#define PSU_STATE_LEN_CHECKPSU (strlen(PSU_STATE_CHECKPSU)) + +typedef struct { + char *inv_dev_attrp; + char *inv_dev_pathp; +} psu_dev_t; + +typedef struct { + const char *psu_name; + int psu_major; + dev_t psu_devt; + struct device *psu_dev_p; + psu_dev_t *psu_dev_namep; + int psu_dev_total; + char *psu_inv_pathp; + void *psu_tracking; + char *psu_currentin; + char *psu_currentout; + char *psu_powerin; + char *psu_powerout; + char *psu_voltin; + char *psu_voltout; +} psu_dev_group_t; + +#define PSU_DEV_PATH_TEMPLATE "/sys/class/hwmon/hwmon%d/device/%s" + +static char psu_dev_path_state[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltin[MAX_PATH_SIZE]; +#if 0 +static char psu_dev_path_vendor[MAX_PATH_SIZE]; +static char psu_dev_path_version[MAX_PATH_SIZE]; +static char psu_dev_path_sn[MAX_PATH_SIZE]; +static char psu_dev_path_temperature[MAX_PATH_SIZE]; +static char psu_dev_path_fan_speed[MAX_PATH_SIZE]; +static char psu_dev_path_fan_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_fan_faulty[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_psu_rpm[MAX_PATH_SIZE]; +#endif + +void sysfs_psu_path_init(void) +{ + sprintf(&psu_dev_path_state[0], PSU_DEV_PATH_TEMPLATE, get_hwm_cpld(), "\%s" ); + sprintf(&psu_dev_path_psu_voltin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#if 0 + sprintf(&psu_dev_path_vendor[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_version[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_sn[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_temperature[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_speed[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_faulty[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_voltout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_rpm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#endif +} + +static psu_dev_t psu_dev_name[] = { + { "state", psu_dev_path_state }, // Using cpld + { "psu_voltin", psu_dev_path_psu_voltin }, +#if 0 + { "vendor", psu_dev_path_vendor }, + { "version", psu_dev_path_version }, + { "sn", psu_dev_path_sn }, + { "temperature", psu_dev_path_temperature }, + { "fan_speed", psu_dev_path_fan_speed }, + { "fan_pwm", psu_dev_path_fan_pwm }, + { "fan_faulty", psu_dev_path_fan_faulty }, + { "psu_currentin", psu_dev_path_psu_currentin }, + { "psu_currentout", psu_dev_path_psu_currentout }, + { "psu_powerin", psu_dev_path_psu_powerin }, + { "psu_powerout", psu_dev_path_psu_powerout }, + { "psu_voltout", psu_dev_path_psu_voltout }, + { "psu_pwm", psu_dev_path_psu_pwm }, + { "psu_rpm", psu_dev_path_psu_rpm }, +#endif +}; +#define PSU_DEV_NAME_TOTAL ( sizeof(psu_dev_name) / sizeof(const psu_dev_t) ) + +static psu_dev_group_t psu_dev_group[] = { + { + .psu_name = "psu1", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, + { + .psu_name = "psu2", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, +}; +#define PSU_DEV_GROUP_TOTAL ( sizeof(psu_dev_group)/ sizeof(const psu_dev_group_t) ) + +static char psu_state[4][MIN_ACC_SIZE]; + +static struct psu_wire_tbl_s { + char *psu_attr; + char *psu_name; + char *psu_wire; + char *psu_state; +} psu_wire_tbl[] = { + { "state", "psu1", "psu0", psu_state[0] }, // Using cpld + { "state", "psu2", "psu1", psu_state[1] }, + { "psu_voltin", "psu1", "psoc_psu1_vin", psu_state[2] }, + { "psu_voltin", "psu2", "psoc_psu2_vin", psu_state[3] }, +}; +#define PSU_WIRE_TBL_TOTAL ( sizeof(psu_wire_tbl)/ sizeof(const struct psu_wire_tbl_s) ) + +static char * +psu_attr_get_wirep(const char *psu_attrp, const char *psu_namep, char **psu_statepp) +{ + int i; + + for (i = 0; i < PSU_WIRE_TBL_TOTAL; i++) { + if (strncmp(psu_wire_tbl[i].psu_attr, psu_attrp, strlen(psu_attrp)) == 0 && + strncmp(psu_wire_tbl[i].psu_name, psu_namep, strlen(psu_namep)) == 0) { + if (psu_statepp) { + *psu_statepp = psu_wire_tbl[i].psu_state; + } + return psu_wire_tbl[i].psu_wire; + } + } + return NULL; +} + +int psu_check_state_normal(char *statep) +{ + if (strstr(statep, "normal")) { + return 1; + } + return 0; +} + +#define PSU_ATTR_VOLTIN ("psu_voltin") +#define PSU_ATTR_VOLTIN_LEN (10) + +/* Get PSU voltin for determon AC(110v) or DC(48v) */ +void psu_get_voltin(void) +{ + char acc_path[MAX_PATH_SIZE], volt[MIN_ACC_SIZE]; + psu_dev_t *devnamep; + unsigned int voltin; + char *invwirep; + int i, j; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + //psu_dev_group[i].psu_name; + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_VOLTIN, PSU_ATTR_VOLTIN_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_VOLTIN, psu_dev_group[i].psu_name, NULL); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_DEBUG "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(volt, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + continue; + } + else { + voltin = simple_strtol(&volt[0], NULL, 10); + printk(KERN_DEBUG "[p_thread] Read %s %s = %u\n",acc_path,volt,voltin); + if (voltin > psu_voltin) { + psu_voltin = voltin; + } + } + } + } + } + + SYSFS_LOG("[p_thread] PSU voltin = %u\n", psu_voltin); +} + +#define PSU_ATTR_STATE ("state") +#define PSU_ATTR_STATE_LEN (5) + +/* psus_control() by inv_thread */ +int psus_control(int log_only) +{ + char acc_path[MAX_PATH_SIZE], state[MIN_ACC_SIZE]; + psu_dev_t *devnamep = NULL; + char *invwirep = NULL; + char *psu_statep = NULL; + int i, j, flag = 0; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_STATE, PSU_ATTR_STATE_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_STATE, psu_dev_group[i].psu_name, &psu_statep); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_INFO "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(state, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + if (strncmp(psu_statep, PSU_STATE_ERROR, strlen(PSU_STATE_ERROR)) != 0) { + strcpy(psu_statep, PSU_STATE_ERROR); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_ERROR); + } + flag = 1; + } + else + if (strstr(state, "normal")) { + //printk(KERN_INFO "[p_thread] %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + } + else + if (psu_voltin > PSU_VOLTIN_ACDC) { /* AC PSUS */ + //printk(KERN_INFO "[p_thread] RYU: %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + flag = 1; + } + else { /* DC PSUS */ + if (strncmp(psu_statep, PSU_STATE_CHECKPSU, PSU_STATE_LEN_CHECKPSU) != 0) { + strcpy(psu_statep, PSU_STATE_CHECKPSU); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_CHECKPSU); + } + flag = 1; + } + } + } + } + + if (log_only) { + return 0; + } + + //SYSFS_LOG("[p_thread] RYU: %s: flag = %d\n",psu_wire_tbl[i].psu_name,flag); + if (flag == 1) { + status_led_grn("3"); + return 1; + } + return 0; +} + +/* End of psuinfo_device */ + +static int __init +psu_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_psu_path_init(); +#endif + return 0; +} + + +static void __exit +psu_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove psu module.\n"); +} + +/* led device *************************************/ +#define STATUS_LED_GRN_PATH "/sys/class/hwmon/hwmon%d/device/grn_led" +#define STATUS_LED_RED_PATH "/sys/class/hwmon/hwmon%d/device/red_led" + +#define FAN_LED_GRN1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn1" +#define FAN_LED_GRN2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn2" +#define FAN_LED_GRN3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn3" +#define FAN_LED_GRN4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn4" +#define FAN_LED_RED1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red1" +#define FAN_LED_RED2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red2" +#define FAN_LED_RED3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red3" +#define FAN_LED_RED4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red4" + +#define HWMON_DEVICE_DIAG_PATH "/sys/class/hwmon/hwmon%d/device/diag" +#define HWMON_DEVICE_CTRL_PATH "/sys/class/hwmon/hwmon%d/device/ctl" + +static char status_led_grn_path[MAX_PATH_SIZE]; +static char status_led_red_path[MAX_PATH_SIZE]; +static char fan_led_grn1_path[MAX_PATH_SIZE]; +static char fan_led_grn2_path[MAX_PATH_SIZE]; +static char fan_led_grn3_path[MAX_PATH_SIZE]; +static char fan_led_grn4_path[MAX_PATH_SIZE]; +static char fan_led_red1_path[MAX_PATH_SIZE]; +static char fan_led_red2_path[MAX_PATH_SIZE]; +static char fan_led_red3_path[MAX_PATH_SIZE]; +static char fan_led_red4_path[MAX_PATH_SIZE]; +static char hwmon_device_diag_path[MAX_PATH_SIZE]; +static char hwmon_device_ctrl_path[MAX_PATH_SIZE]; + +void sysfs_led_path_init(void) +{ + sprintf(&status_led_grn_path[0], STATUS_LED_GRN_PATH, get_hwm_cpld()); + sprintf(&status_led_red_path[0], STATUS_LED_RED_PATH, get_hwm_cpld()); + sprintf(&fan_led_grn1_path[0], FAN_LED_GRN1_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn2_path[0], FAN_LED_GRN2_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn3_path[0], FAN_LED_GRN3_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn4_path[0], FAN_LED_GRN4_PATH, get_hwm_psoc()); + sprintf(&fan_led_red1_path[0], FAN_LED_RED1_PATH, get_hwm_psoc()); + sprintf(&fan_led_red2_path[0], FAN_LED_RED2_PATH, get_hwm_psoc()); + sprintf(&fan_led_red3_path[0], FAN_LED_RED3_PATH, get_hwm_psoc()); + sprintf(&fan_led_red4_path[0], FAN_LED_RED4_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_diag_path[0], HWMON_DEVICE_DIAG_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_ctrl_path[0], HWMON_DEVICE_CTRL_PATH, get_hwm_cpld()); +} + +/* return 0/off 1/green 2/red */ +int +status_led_check_color(void) +{ + char tmpbuf[MIN_ACC_SIZE]; + int ret = STATUS_LED_INVALID; + + if (inventec_show_attr(&tmpbuf[0], status_led_grn_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_GRN0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_GRN1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_GRN2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_GRN3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_GRN7; + } + return ret; + } + + if (inventec_show_attr(&tmpbuf[0], status_led_red_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_RED0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_RED1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_RED2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_RED3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_RED7; + } + return ret; + } + return ret; +} + +/* + * Store attr Section + */ +static DEFINE_MUTEX(diag_mutex); + +ssize_t status_led_diag_mode_enable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '0') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("1", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + mutex_unlock(&diag_mutex); + } + + return ret; +} + +ssize_t status_led_diag_mode_disable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '1') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("0", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + mutex_unlock(&diag_mutex); + } + return 1; +} + +ssize_t +status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2) +{ + ssize_t ret; + + ret = inventec_store_attr(tmp1, strlen(tmp1), path1); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(tmp2, strlen(tmp2), path2); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_red(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_grn(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +static int status_led_diag_mode = STATUS_LED_MODE_AUTO; + +int status_led_check_diag_mode(void) +{ + return status_led_diag_mode; +} + +/* End of ledinfo_device */ + +static int __init +led_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); +#endif + return 0; +} + + +static void __exit +led_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove led module.\n"); +} + +/* sensor device **********************************/ +#define SENSOR_DEV_PATH_SWITCH_TEMP "/sys/class/hwmon/hwmon%d/device/switch_tmp" + +static char sensor_dev_path_switch_temp[MAX_PATH_SIZE]; + +void sysfs_sensor_path_init(void) +{ + sprintf(&sensor_dev_path_switch_temp[0], SENSOR_DEV_PATH_SWITCH_TEMP, get_hwm_psoc()); +} + +void switch_temp_update(void) +{ + char buf[MIN_ACC_SIZE]; + ssize_t count = inventec_show_attr(&buf[0], "proc/switch/temp"); + if (count > 0) { + //printk(KERN_ERR "[p_thread] [STEMP] Switch temperature is out of range: %d\n", stemp); + inventec_store_attr(&buf[0], count, sensor_dev_path_switch_temp); + } +} + +/**************************************************/ +/* From system_device */ +static int inv_pthread_control = 1; + +int thread_control(void) +{ + return inv_pthread_control; +} + +void thread_control_set(int val) +{ + inv_pthread_control = val; +} +/* End system_device */ + +#define THREAD_SLEEP_MINS (3) +#define THREAD_DELAY_MINS (THREAD_SLEEP_MINS + THREAD_SLEEP_MINS + 1) + +extern void psu_get_voltin(void); + +static struct task_struct *thread_st; +static int thread_data; + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO +void led_set_gpio_to_change_status_led(void) +{ + ssize_t ret = inventec_store_attr("57", 2, "/sys/class/gpio/export"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 57 to /sys/class/gpio/export failed\n"); + return; + } + ret = inventec_store_attr("low", 3, "/sys/class/gpio/gpio57/direction"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write low to /sys/class/gpio/gpio57/direction failed\n"); + return; + } + SYSFS_LOG("[p_thread] Set gpio to support status led change successfully\n"); +} +#endif + +// Function executed by kernel thread +static int thread_fn(void *unused) +{ + /* Delay for guarantee HW ready */ + ssleep(THREAD_DELAY_MINS); + +#ifndef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); + sysfs_fan_path_init(); + sysfs_psu_path_init(); +#endif + //sysfs_sensor_path_init(); + + /* Default status init */ + status_led_grn("7"); + + psu_get_voltin(); + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO + led_set_gpio_to_change_status_led(); +#endif + + while (1) + { + ssleep(THREAD_SLEEP_MINS); + + if (thread_control() == 0) { + printk(KERN_INFO "[p_thread] %s/%d: Thread Stop by inv_pthread control\n",__func__,__LINE__); + break; + } + + if (status_led_check_diag_mode() == STATUS_LED_MODE_MANU) { + /* status led in change color/freq mode, higher priority. Ignore fans sttaus */ + continue; + } + + //switch_temp_update(); + + if (fans_control() > 0) { + psus_control(1); + continue; + } + else + if (psus_control(0) > 0) { + continue; + } + + if (status_led_check_color() != STATUS_LED_GRN7) { /* status led red, change it to green */ + status_led_grn("7"); + } + } + +#ifndef INV_PTHREAD_KERNEL_MODULE +err_inv_pthread_fn_1: +#endif + do_exit(0); + printk(KERN_INFO "[p_thread] %s/%d: Thread Stopped\n",__func__,__LINE__); + return 0; +} + + +static ssize_t s_show(struct kobject *kobj, struct attribute *attr, char *buf) +{ + int fan_absence; + size_t count; + + fan_absence = fans_control(); + count += sprintf(&buf[count], "%d\n", fan_absence); + return count; +} + +static ssize_t s_store(struct kobject *kobj, struct attribute *attr, const char *buf, size_t count) +{ + return count; +} + +static struct attribute status_att = { + .name = "fan_absence", + .mode = 0777, +}; + +static const struct sysfs_ops status_ops = { + .show = s_show, + .store = s_store, +}; + +static struct kobj_type status_ktype = { + .sysfs_ops = &status_ops, +}; + + +static int __init inv_pthread_init(void) +{ + int retval; + + status_kobj = kzalloc(sizeof(*status_kobj), GFP_KERNEL); + if(!status_kobj) + return PTR_ERR(status_kobj); + + status_kset = kset_create_and_add("platform_status", NULL, kernel_kobj); + if(!status_kset) + return -1; + + status_kobj->kset = status_kset; + + retval = kobject_init_and_add(status_kobj, &status_ktype, NULL, "fan"); + if(retval) + return retval; + + retval = sysfs_create_file(status_kobj, &status_att); + + + inventec_class_init(); + fan_device_init(); + psu_device_init(); + led_device_init(); + + thread_control_set(1); + + printk(KERN_INFO "[p_thread] %s/%d: Creating Thread\n",__func__,__LINE__); + //Create the kernel thread with name 'inv_pthread' + thread_st = kthread_run(thread_fn, (void*)&thread_data, "inv_pthread"); + if (thread_st) + printk(KERN_INFO "[p_thread] inv_pthread Created successfully\n"); + else + printk(KERN_ERR "[p_thread] inv_pthread creation failed\n"); + + return retval; +} + +static void __exit inv_pthread_exit(void) +{ + thread_control_set(0); + /* Delay for guarantee thread exit */ + ssleep(THREAD_DELAY_MINS); + + fan_device_exit(); + psu_device_exit(); + led_device_exit(); + inventec_class_exit(); + + sysfs_remove_file(status_kobj, &status_att); + kset_unregister(status_kset); + kobject_del(status_kobj); + + printk(KERN_INFO "[p_thread] inv_pthread cleaning Up\n"); +} + +module_init(inv_pthread_init); +module_exit(inv_pthread_exit); + +MODULE_AUTHOR("Robert "); +MODULE_DESCRIPTION("Inventec Platform Management Thread"); +MODULE_VERSION("version 1.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_swps.c b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_swps.c new file mode 100644 index 00000000000..08bd490e63b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_swps.c @@ -0,0 +1,730 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "inv_swps.h" + +static int port_major; +static int ioexp_total; +static int port_total; +static struct class *swp_class_p = NULL; +static struct inv_platform_s *platform_p = NULL; +static struct inv_ioexp_layout_s *ioexp_layout = NULL; +static struct inv_port_layout_s *port_layout = NULL; + +static int +__swp_match(struct device *dev, +#ifdef SWPS_KERN_VER_AF_3_10 + + const void *data){ +#else + void *data){ +#endif + + char *name = (char *)data; + if (strcmp(dev_name(dev), name) == 0) + return 1; + return 0; +} + + +struct device * +get_swpdev_by_name(char *name){ + struct device *dev = class_find_device(swp_class_p, + NULL, + name, + (const void *)__swp_match); + return dev; +} + + +static int +sscanf_2_int(const char *buf) { + + int result = -EBFONT; + char *hex_tag = "0x"; + + if (strcspn(buf, hex_tag) == 0) { + if (sscanf(buf,"%x",&result)) { + return result; + } + } else { + if (sscanf(buf,"%d",&result)) { + return result; + } + if(sscanf(buf,"-%d",&result)) { + return -result; + } + if (sscanf(buf,"%x",&result)) { + return result; + } + } + return -EBFONT; +} + + +static int +sscanf_2_binary(const char *buf) { + + int result = sscanf_2_int(buf); + + if (result < 0){ + return -EBFONT; + } + switch (result) { + case 0: + case 1: + return result; + default: + break; + } + return -EBFONT; +} + +/* ========== Show functions: For I/O Expander attribute ========== + */ +static ssize_t +_show_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*get_func)(struct ioexp_obj_s *ioexp_p, int voffset), + char *buf_p) { + size_t len; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR(" %s: data corruption! :%s\n", __func__, tobj_p->swp_name); + return -ENODATA; + } + mutex_lock(&ioexp_p->lock); + len = snprintf(buf_p, 8, "%d\n", get_func(ioexp_p, tobj_p->ioexp_virt_offset)); + mutex_unlock(&ioexp_p->lock); + return len; +} + + +static ssize_t +show_attr_present(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_present, + buf_p); +} + +static ssize_t +show_attr_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_fault, + buf_p); +} + +static ssize_t +show_attr_rxlos(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_rxlos, + buf_p); +} + +static ssize_t +show_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_disable, + buf_p); +} + +static ssize_t +show_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_reset, + buf_p); +} + +static ssize_t +show_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_lpmod, + buf_p); +} + + +static ssize_t +show_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_modsel, + buf_p); +} + +/* ========== Store functions: For I/O Expander (R/W) attribute ========== + */ +static ssize_t +_store_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*set_func)(struct ioexp_obj_s *ioexp_p, + int virt_offset, int input_val), + const char *buf_p, + size_t count) { + + int input, err; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR("%s: data corruption! :%s\n", + __func__, tobj_p->swp_name); + return -ENODATA; + } + input = sscanf_2_binary(buf_p); + if (input < 0) { + return -EBFONT; + } + mutex_lock(&ioexp_p->lock); + err = set_func(ioexp_p, tobj_p->ioexp_virt_offset, input); + mutex_unlock(&ioexp_p->lock); + if (err < 0){ + return err; + } + return count; +} + +static ssize_t +store_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_tx_disable, + buf_p, + count); +} + +static ssize_t +store_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_reset, + buf_p, + count); +} + + +static ssize_t +store_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_lpmod, + buf_p, + count); +} + + +static ssize_t +store_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_modsel, + buf_p, + count); +} + +/* ========== IO Expander attribute: from expander ========== + */ +static DEVICE_ATTR(present, S_IRUGO, show_attr_present, NULL); +static DEVICE_ATTR(tx_fault, S_IRUGO, show_attr_tx_fault, NULL); +static DEVICE_ATTR(rxlos, S_IRUGO, show_attr_rxlos, NULL); +static DEVICE_ATTR(tx_disable, S_IRUGO|S_IWUSR, show_attr_tx_disable, store_attr_tx_disable); +static DEVICE_ATTR(reset, S_IRUGO|S_IWUSR, show_attr_reset, store_attr_reset); +static DEVICE_ATTR(lpmod, S_IRUGO|S_IWUSR, show_attr_lpmod, store_attr_lpmod); +static DEVICE_ATTR(modsel, S_IRUGO|S_IWUSR, show_attr_modsel, store_attr_modsel); + +/* ========== Functions for module handling ========== + */ +static void +clean_port_obj(void){ + + dev_t dev_num; + char dev_name[32]; + struct device *device_p; + struct transvr_obj_s *transvr_obj_p; + int minor_curr, port_id; + + for (minor_curr=0; minor_curri2c_client_p); + kfree(transvr_obj_p); + } + dev_num = MKDEV(port_major, minor_curr); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static int +get_platform_type(void){ + + char log_msg[64] = "ERROR"; + + platform_p = kzalloc(sizeof(struct inv_platform_s), GFP_KERNEL); + if (!platform_p){ + snprintf(log_msg, sizeof(log_msg), "kzalloc fail"); + goto err_get_platform_type_1; + } + platform_p->id = PLATFORM_SETTINGS; + memset(platform_p->name, 0, sizeof(platform_p->name)); + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", platform_map.name); + snprintf(log_msg, sizeof(log_msg), + "User setup platform: %d (%s)", + platform_p->id, platform_p->name); + SWPS_DEBUG("%s: %s, :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return 0; + +err_get_platform_type_1: + SWPS_ERR("%s: %s :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return -1; +} + + +static int +get_layout_info(void){ + ioexp_layout = cypress_ga2_ioexp_layout; + port_layout = cypress_ga2_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga2_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga2_port_layout); + + SWPS_INFO("Start to initial platform: %d (%s)\n", + platform_p->id, platform_p->name); + return 0; +} + +/* ========== Functions for register something ========== + */ + +static int +register_ioexp_attr_sfp_1(struct device *device_p){ + /* Support machine type: + * - SFP : Magnolia + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_fault) < 0) { + err_attr = "dev_attr_tx_fault"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_rxlos) < 0) { + err_attr = "dev_attr_rxlos"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_disable) < 0) { + err_attr = "dev_attr_tx_disable"; + goto err_ioexp_sfp1_attr; + } + return 0; + +err_ioexp_sfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + +static int +register_ioexp_attr_sfp_2(struct device *device_p){ + /* Support machine type: + * - SFP28 : Cypress + */ + char *err_attr = NULL; + + if (register_ioexp_attr_sfp_1(device_p) < 0){ + goto err_ioexp_sfp2_attr; + } + return 0; + +err_ioexp_sfp2_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + +static int +register_ioexp_attr_qsfp_1(struct device *device_p){ + /* Support machine type: + * - QSFP : Magnolia, Redwood, Hudson32i + * - QSFP+ : Magnolia, Redwood, Hudson32i + * - QSFP28: Redwood + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_reset) < 0) { + err_attr = "dev_attr_reset"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_lpmod) < 0) { + err_attr = "dev_attr_lpmod"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_modsel) < 0) { + err_attr = "dev_attr_modsel"; + goto err_ioexp_qsfp1_attr; + } + return 0; + +err_ioexp_qsfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + +static int +register_ioexp_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + char *err_msg = "ERR"; + + switch (transvr_obj->ioexp_obj_p->ioexp_type){ + case IOEXP_TYPE_CYPRESS_NABC: + if (register_ioexp_attr_sfp_2(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_2 fail"; + goto err_reg_ioexp_attr; + } + break; + case IOEXP_TYPE_CYPRESS_7ABC: + if (register_ioexp_attr_qsfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_qsfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + default: + err_msg = "Unknow type"; + goto err_reg_ioexp_attr; + } + return 0; + +err_reg_ioexp_attr: + SWPS_ERR("%s: %s :%d \n", + __func__, err_msg, transvr_obj->ioexp_obj_p->ioexp_type); + return -1; +} + + +static int +register_port_device(char *dev_name, + dev_t dev_num, + struct transvr_obj_s *transvr_obj){ + + struct device *device_p = NULL; + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + transvr_obj, /* void *private_data */ + dev_name); /* const char *fmt */ + if (IS_ERR(device_p)){ + goto err_regswp_create_dev; + } + if (register_ioexp_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + return 0; + +err_regswp_reg_attr: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_regswp_create_dev: + SWPS_ERR("%s fail! :%s\n", __func__, dev_name); + return -1; +} + + +static int +register_swp_module(void){ + + dev_t port_devt = 0; + int dev_total = port_total + 1; /* char_dev for module control */ + + if (alloc_chrdev_region(&port_devt, 0, dev_total, SWP_CLS_NAME) < 0){ + SWPS_WARN("Allocate PORT MAJOR failure! \n"); + goto err_register_swp_module_3; + } + port_major = MAJOR(port_devt); + + /* Create class object */ + swp_class_p = class_create(THIS_MODULE, SWP_CLS_NAME); + if (IS_ERR(swp_class_p)) { + SWPS_ERR("Create class failure! \n"); + goto err_register_swp_module_3; + } + return 0; + +err_register_swp_module_3: + unregister_chrdev_region(MKDEV(port_major, 0), port_total); + return -1; +} + + +/* ========== Module initial relate ========== + */ +static int +create_ioexp_objs(void) { + + int i, run_mod; + + /* Clean IOEXP object */ + clean_ioexp_objs(); + /* Get running mode */ + run_mod = IOEXP_MODE_DIRECT; + /* Create IOEXP object */ + for(i=0; i devlen_max) { + snprintf(err_msg, sizeof(err_msg), + "SWP_DEV_PORT too long!"); + goto err_initport_create_tranobj; + } + memset(dev_name, 0, sizeof(dev_name)); + snprintf(dev_name, devlen_max, "%s%d", SWP_DEV_PORT, port_id); + /* Create transceiver object */ + ioexp_obj_p = get_ioexp_obj(ioexp_id); + if (!ioexp_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "IOEXP object:%d not exist", ioexp_id); + goto err_initport_create_tranobj; + } + transvr_obj_p = create_transvr_obj(dev_name, chan_id, ioexp_obj_p, + ioexp_virt_offset, transvr_type, + chipset_type, run_mod); + if (!transvr_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "Create transceiver object fail :%s", dev_name); + goto err_initport_create_tranobj; + } + /* Setup Lane_ID mapping */ + i = ARRAY_SIZE(port_layout[minor_curr].lane_id); + j = ARRAY_SIZE(transvr_obj_p->lane_id); + if (i != j) { + snprintf(err_msg, sizeof(err_msg), + "Lane_id size inconsistent %d/%d", i, j); + goto err_initport_reg_device; + } + memcpy(transvr_obj_p->lane_id, port_layout[minor_curr].lane_id, i*sizeof(int)); + /* Create and register device object */ + if (register_port_device(dev_name, MKDEV(port_major, minor_curr), transvr_obj_p) < 0){ + snprintf(err_msg, sizeof(err_msg), + "register_port_device fail"); + goto err_initport_reg_device; + } + /* Setup device_ptr of transvr_obj */ + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + snprintf(err_msg, sizeof(err_msg), + "get_swpdev_by_name fail"); + goto err_initport_reg_device; + } + transvr_obj_p->transvr_dev_p = dev_p; + /* Success */ + ok_count++; + } + SWPS_INFO("%s: initialed %d port-dev",__func__, ok_count); + return 0; + +err_initport_reg_device: + kfree(transvr_obj_p); +err_initport_create_tranobj: + clean_port_obj(); + SWPS_ERR("%s: %s", __func__, err_msg); + SWPS_ERR("Dump: :%d :%d :%d :%d :%d :%d\n", + port_id, chan_id, ioexp_id, ioexp_virt_offset, transvr_type, run_mod); + return -1; +} + +static int __init +swp_module_init(void){ + + if (get_platform_type() < 0){ + goto err_init_out; + } + if (get_layout_info() < 0){ + goto err_init_out; + } + if (register_swp_module() < 0){ + goto err_init_out; + } + if (create_ioexp_objs() < 0){ + goto err_init_ioexp; + } + if (create_port_objs() < 0){ + goto err_init_portobj; + } + if (init_ioexp_objs() < 0){ + goto err_init_portobj; + } + SWPS_INFO("Inventec switch-port module V.%s initial success.\n", SWP_VERSION); + return 0; + + +err_init_portobj: + clean_ioexp_objs(); +err_init_ioexp: + class_unregister(swp_class_p); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_init_out: + SWPS_ERR("Inventec switch-port module V.%s initial failure.\n", SWP_VERSION); + return -1; +} + + +static void __exit +swp_module_exit(void){ + clean_port_obj(); + clean_ioexp_objs(); + class_unregister(swp_class_p); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); + SWPS_INFO("Remove Inventec switch-port module success.\n"); +} + + +/* Module information */ +MODULE_AUTHOR(SWP_AUTHOR); +MODULE_DESCRIPTION(SWP_DESC); +MODULE_VERSION(SWP_VERSION); +MODULE_LICENSE(SWP_LICENSE); + +module_init(swp_module_init); +module_exit(swp_module_exit); + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_swps.h b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_swps.h new file mode 100644 index 00000000000..f37fd387e4a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/inv_swps.h @@ -0,0 +1,170 @@ +#ifndef INV_SWPS_H +#define INV_SWPS_H + +#include "transceiver.h" +#include "io_expander.h" + +/* Module settings */ +#define SWP_CLS_NAME "swps" +#define SWP_DEV_PORT "port" +#define SWP_AUTOCONFIG_ENABLE (1) + +/* Module information */ +#define SWP_AUTHOR "Neil " +#define SWP_DESC "Inventec port and transceiver driver" +#define SWP_VERSION "4.2.3" +#define SWP_LICENSE "GPL" + +/* Module status define */ +#define SWP_STATE_NORMAL (0) +#define SWP_STATE_I2C_DIE (-91) + +/* [Note]: + * Functions and mechanism for auto-detect platform type is ready, + * But HW and BIOS not ready! We need to wait them. + * So, please do not use PLATFORM_TYPE_AUTO until they are ready. + * (2016.06.13) + */ +#define PLATFORM_TYPE_CYPRESS_GA2 (152) /* Down -> Up */ +#define PLATFORM_TYPE_CYPRESS_BAI (153) /* Down -> Up */ + +/* Current running platfrom */ +#define PLATFORM_SETTINGS PLATFORM_TYPE_CYPRESS_GA2 + +/* Define platform flag and kernel version */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA2) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_BAI) + #define SWPS_KERN_VER_AF_3_10 (1) +#endif + + +struct inv_platform_s { + int id; + char name[64]; +}; + +struct inv_ioexp_layout_s { + int ioexp_id; + int ioexp_type; + struct ioexp_addr_s addr[4]; +}; + +struct inv_port_layout_s { + int port_id; + int chan_id; + int ioexp_id; + int ioexp_offset; + int transvr_type; + int chipset_type; + int lane_id[8]; +}; + +/* ========================================== + * Inventec Platform Settings + * ========================================== + */ +struct inv_platform_s platform_map = {PLATFORM_TYPE_CYPRESS_GA2, "D7054Q28B" }; + +/* ========================================== + * Cypress Layout configuration (Inventec version [Down->Up]) + * ========================================== + */ +struct inv_ioexp_layout_s cypress_ga2_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CYPRESS_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_CYPRESS_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_CYPRESS_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_CYPRESS_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_CYPRESS_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_CYPRESS_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga2_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 1, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 2, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 3, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 4, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 5, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 6, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 7, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 8, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + { 9, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {10, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {11, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {12, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {13, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {14, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {15, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {16, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {17, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {18, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {19, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {20, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {21, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {22, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {23, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {24, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {25, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {26, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {27, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {28, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {29, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {30, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {31, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {32, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {33, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {34, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {35, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {36, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {37, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {38, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {39, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {40, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {41, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {42, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {43, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {44, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {45, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {46, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {47, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {48, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {49, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {50, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {51, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {52, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {53, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; + + +#endif /* SFP_DRIVER_H */ + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/io_expander.c b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/io_expander.c new file mode 100644 index 00000000000..057995e4551 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/io_expander.c @@ -0,0 +1,944 @@ +#include +#include +#include "io_expander.h" + +static struct ioexp_obj_s *ioexp_head_p = NULL; +static struct ioexp_obj_s *ioexp_tail_p = NULL; + +struct ioexp_map_s ioexp_map_cypress_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + +struct ioexp_map_s ioexp_map_cypress_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 1, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 1, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 1, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {0, 1, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {0, 1, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {1, 1, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {1, 1, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {1, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {1, 1, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + + +/* ========== Private functions ========== + */ +int check_channel_tier_1(void); + +struct i2c_client * +_get_i2c_client(struct ioexp_obj_s *self, + int chip_id){ + + struct ioexp_i2c_s *i2c_curr_p = self->i2c_head_p; + + if (!(i2c_curr_p)){ + SWPS_ERR("%s: i2c_curr_p is NULL\n", __func__); + return NULL; + } + while (i2c_curr_p){ + if ((i2c_curr_p->chip_id) == chip_id){ + return i2c_curr_p->i2c_client_p; + } + i2c_curr_p = i2c_curr_p->next; + } + SWPS_ERR("%s: not exist! :%d\n", __func__, chip_id); + return NULL; +} + + +static int +_common_ioexp_update_one(struct ioexp_obj_s *self, + struct ioexp_addr_s *ioexp_addr, + int chip_id, + int data_width, + int show_err, + char *caller_name) { + int buf = 0; + int err = 0; + int data_id = 0; + int r_offset = 0; + + for(data_id=0; data_idread_offset[data_id]; + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), r_offset); + /* Check error */ + if (buf < 0) { + err = 1; + if (show_err) { + SWPS_INFO("IOEXP-%d read fail! :%d \n", self->ioexp_id, buf); + SWPS_INFO("Dump: :%d :0x%02x :%d, :%s\n", + ioexp_addr->chan_id, ioexp_addr->chip_addr, + ioexp_addr->read_offset[data_id], caller_name); + } + continue; + } + /* Update IOEXP object */ + self->chip_data[chip_id].data[data_id] = (uint8_t)buf; + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +common_ioexp_update_all(struct ioexp_obj_s *self, + int show_err, + char *caller_name){ + + int err = 0; + int chip_id = 0; + int chip_amount = self->ioexp_map_p->chip_amount; + + for (chip_id=0; chip_idioexp_map_p->map_addr[chip_id]), + chip_id, + self->ioexp_map_p->data_width, + show_err, + caller_name) < 0) { + err = 1; + } + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + +static int +_common_get_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + char *func_mane){ + uint8_t buf; + int err_code; + + /* Get address */ + err_code = self->fsm_4_direct(self); + if (err_code < 0){ + return err_code; + } + + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Get data form cache */ + buf = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + return (int)(buf >> bitmap_obj_p->bit_shift & 0x01); +} + + +static int +_common_set_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + int input_val, + char *func_mane){ + int err_code, target_offset; + uint8_t origin_byte; + uint8_t modify_byte; + + /* Get address */ + err_code = self->fsm_4_direct(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Prepare write date */ + origin_byte = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + switch (input_val) { + case 0: + modify_byte = origin_byte; + SWP_BIT_CLEAR(modify_byte, bitmap_obj_p->bit_shift); + break; + case 1: + modify_byte = origin_byte; + SWP_BIT_SET(modify_byte, bitmap_obj_p->bit_shift); + break; + default: + SWPS_ERR("Input value incorrect! :%d :%d :%s\n", + input_val, self->ioexp_id, func_mane); + return ERR_IOEXP_BADINPUT; + } + /* Setup i2c client */ + target_offset = self->ioexp_map_p->map_addr[bitmap_obj_p->chip_id].write_offset[bitmap_obj_p->ioexp_voffset]; + /* Write byte to chip via I2C */ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, bitmap_obj_p->chip_id), + target_offset, + modify_byte); + /* Update or bollback object */ + if (err_code < 0){ + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = origin_byte; + SWPS_ERR("I2C write fail! :%d :%d :%s :%d\n", + input_val, self->ioexp_id, func_mane, err_code); + return err_code; + } + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = modify_byte; + return 0; +} + + +/* ========== Object public functions ========== + */ +int +common_get_present(struct ioexp_obj_s *self, + int virt_offset){ + + int UNPLUG = 1; + int retval = ERR_IOEXP_UNEXCPT; + + retval = _common_get_bit(self, + &(self->ioexp_map_p->map_present[virt_offset]), + "common_get_present"); + if (retval < 0) { + /* [Note] + * => Transceiver object does not need to handle IOEXP layer issues. + */ + return UNPLUG; + } + return retval; +} + +int +common_get_tx_fault(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_fault[virt_offset]), + "common_get_tx_fault"); +} + +int +common_get_rxlos(struct ioexp_obj_s *self, + int virt_offset){ + /* [Receiver Loss of Signal (Rx_LOS)] + * The post-amplification IC also includes transition detection circuitry + * which monitors the ac level of incoming optical signals and provides a + * TTL/CMOS compatible status signal to the host (pin 8). An adequate optical + * input results in a low Rx_LOS output while a high Rx_LOS output indicates + * an unusable optical input. The Rx_LOS thresholds are factory set so that + * a high output indicates a definite optical fault has occurred. Rx_LOS can + * also be monitored via the two-wire serial interface + * (address A2h, byte 110, bit 1). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_rxlos[virt_offset]), + "common_get_rxlos"); +} + + +int +common_get_tx_disable(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + "common_get_tx_disable"); +} + +int +common_get_reset(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + "common_get_reset"); +} + + +int +common_get_lpmod(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + "common_get_lpmod"); +} + + +int +common_get_modsel(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + "common_get_modsel"); +} + +int +common_set_tx_disable(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + input_val, + "common_set_tx_disable"); +} + +int +common_set_reset(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + input_val, + "common_set_reset"); +} + + +int +common_set_lpmod(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + input_val, + "common_set_lpmod"); +} + + +int +common_set_modsel(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + input_val, + "common_set_modsel"); +} + +int +ioexp_get_not_support(struct ioexp_obj_s *self, + int virt_offset){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +ioexp_set_not_support(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + return ERR_IOEXP_NOTSUPPORT; +} + +/* ========== Initial functions for IO Expander ========== + */ +int +common_ioexp_init(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + if (self->mode == IOEXP_MODE_DIRECT) { ///important + goto update_common_ioexp_init; + } + /* Setup default value to each physical IO Expander */ + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + /* Get address mapping */ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("%s: IOEXP config incorrect! :%d \n", + __func__, chip_id); + return -1; + } + /* Setup default value */ + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->write_offset[offset], + addr_p->data_default[offset]); + if (err_code < 0){ + SWPS_ERR("%s: set default fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + } + } + +update_common_ioexp_init: + /* Check and update info to object */ + err_code = self->update_all(self, 1, "common_ioexp_init"); + if (err_code < 0) { + SWPS_ERR("%s: update_all() fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +/* ========== Object functions for Final State Machine ========== + */ +int +_is_channel_ready(struct ioexp_obj_s *self){ + + int buf = 0; + int chip_id = 0; /* Use first chip which be registered */ + int data_id = 0; /* Use first byte which be registered */ + struct ioexp_addr_s *ioexp_addr = NULL; + + ioexp_addr = &(self->ioexp_map_p->map_addr[chip_id]); + if (!ioexp_addr){ + SWPS_ERR("%s: config incorrect!\n", __func__); + return ERR_IOEXP_UNEXCPT; + } + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), + ioexp_addr->read_offset[data_id]); + if (buf >= 0){ + return 1; + } + return 0; +} + +int +_ioexp_init_handler(struct ioexp_obj_s *self){ + + int return_val; + + switch (self->mode) { + case IOEXP_MODE_DIRECT: + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + default: + break; + } + SWPS_ERR("%s: exception occur :%d\n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_direct(struct ioexp_obj_s *self){ + + int result_val; + int show_err = 1; + char *func_mane = "common_ioexp_fsm_4_direct"; + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, and return error */ + return ERR_IOEXP_UNINIT; + } + /* Case: Initial done */ + return 0; + + case STATE_IOEXP_NORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + SWPS_INFO("%s: NORMAL -> ABNORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + self->state = STATE_IOEXP_NORMAL; + return 0; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_DEBUG("%s: ABNORMAL -> NORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("%s: Exception occurs :%d\n", + __func__, self->state); + return ERR_IOEXP_UNEXCPT; +} + +/* ========== Functions for Factory pattern ========== + */ +static struct ioexp_map_s * +get_ioexp_map(int ioexp_type){ + switch (ioexp_type){ + case IOEXP_TYPE_CYPRESS_NABC: + return &ioexp_map_cypress_nabc; + case IOEXP_TYPE_CYPRESS_7ABC: + return &ioexp_map_cypress_7abc; + default: + return NULL; + } +} + + +int +setup_ioexp_ssize_attr(struct ioexp_obj_s *self, + struct ioexp_map_s *ioexp_map_p, + int ioexp_id, + int ioexp_type, + int run_mode){ + switch (run_mode){ + case IOEXP_MODE_DIRECT: /* Direct access device mode */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = ERR_IOEXP_UNEXCPT; + return ERR_IOEXP_UNEXCPT; + } + self->ioexp_id = ioexp_id; + self->ioexp_type = ioexp_type; + self->ioexp_map_p = ioexp_map_p; + self->state = STATE_IOEXP_INIT; + mutex_init(&self->lock); + return 0; +} + + +static int +setup_addr_mapping(struct ioexp_obj_s *self, + struct ioexp_addr_s *addr_map_p){ + if (!addr_map_p){ + SWPS_ERR("%s: map is null\n", __func__); + return -1; + } + self->ioexp_map_p->map_addr = addr_map_p; + return 0; +} + + +static int +setup_ioexp_public_cb(struct ioexp_obj_s *self, + int ioexp_type){ + switch (ioexp_type){ + case IOEXP_TYPE_CYPRESS_NABC: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + return 0; + case IOEXP_TYPE_CYPRESS_7ABC: + self->get_present = common_get_present; + self->get_tx_fault = ioexp_get_not_support; + self->get_rxlos = ioexp_get_not_support; + self->get_tx_disable = ioexp_get_not_support; + self->get_reset = common_get_reset; + self->get_lpmod = common_get_lpmod; + self->get_modsel = common_get_modsel; + self->set_tx_disable = ioexp_set_not_support; + self->set_reset = common_set_reset; + self->set_lpmod = common_set_lpmod; + self->set_modsel = common_set_modsel; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_ioexp_private_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_CYPRESS_NABC: + case IOEXP_TYPE_CYPRESS_7ABC: + self->init = common_ioexp_init; + self->update_all = common_ioexp_update_all; + self->fsm_4_direct = common_ioexp_fsm_4_direct; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_i2c_client_one(struct ioexp_obj_s *self, + int chip_id){ + + char *err_msg = "ERROR"; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + struct ioexp_i2c_s *i2c_obj_p = NULL; + struct ioexp_i2c_s *i2c_curr_p = NULL; + + int chan_id = self->ioexp_map_p->map_addr[chip_id].chan_id; + adap = i2c_get_adapter(chan_id); + if(!adap){ + err_msg = "Can not get adap!"; + goto err_ioexp_setup_i2c_1; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + err_msg = "Can not kzalloc client!"; + goto err_ioexp_setup_i2c_1; + } + i2c_obj_p = kzalloc(sizeof(*i2c_obj_p), GFP_KERNEL); + if (!i2c_obj_p){ + err_msg = "Can not kzalloc i2c_obj_p!"; + goto err_ioexp_setup_i2c_2; + } + client->adapter = adap; + client->addr = self->ioexp_map_p->map_addr[chip_id].chip_addr; + i2c_obj_p->i2c_client_p = client; + i2c_obj_p->chip_id = chip_id; + i2c_obj_p->next = NULL; + if (!self->i2c_head_p){ + self->i2c_head_p = i2c_obj_p; + } else { + i2c_curr_p = self->i2c_head_p; + while (i2c_curr_p->next){ + i2c_curr_p = i2c_curr_p->next; + } + i2c_curr_p->next = i2c_obj_p; + } + return 0; + +err_ioexp_setup_i2c_2: + kfree(client); +err_ioexp_setup_i2c_1: + SWPS_ERR("%s: %s :%d\n", __func__, err_msg, chan_id); + return -1; +} + + +static int +setup_i2c_client(struct ioexp_obj_s* self){ + + int result; + int chip_id = 0; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + result = setup_i2c_client_one(self, chip_id); + if (result < 0){ + SWPS_ERR("%s fail! :%d\n", __func__, chip_id); + return -1; + } + } + return 0; +} + +static int +setup_ioexp_config(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("IOEXP config incorrect! :%d \n",chip_id); + return -1; + } + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[offset], + addr_p->conf_default[offset]); + + if (err_code < 0){ + SWPS_INFO("%s: set conf fail! :%d \n", __func__, err_code); + return -2; + } + } + } + return 0; +} + +struct ioexp_obj_s * +_create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_map_s* ioexp_map_p; + struct ioexp_obj_s* result_p; + struct ioexp_i2c_s *i2c_curr_p; + struct ioexp_i2c_s *i2c_next_p; + + /* Get layout */ + ioexp_map_p = get_ioexp_map(ioexp_type); + if (!ioexp_map_p){ + SWPS_ERR("%s: Invalid ioexp_type\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare IOEXP object */ + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + SWPS_ERR("%s: kzalloc failure!\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare static size attributes */ + if (setup_ioexp_ssize_attr(result_p, + ioexp_map_p, + ioexp_id, + ioexp_type, + run_mode) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + /* Prepare address mapping */ + if (setup_addr_mapping(result_p, addr_map_p) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + if (setup_i2c_client(result_p) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + /* Prepare call back functions of object */ + if (setup_ioexp_public_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + if (setup_ioexp_private_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + return result_p; + +err_create_ioexp_setup_i2c_fail: + i2c_curr_p = result_p->i2c_head_p; + i2c_next_p = result_p->i2c_head_p; + while (i2c_curr_p){ + i2c_next_p = i2c_curr_p->next; + kfree(i2c_curr_p->i2c_client_p); + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } +err_create_ioexp_setup_attr_fail: + kfree(result_p); +err_create_ioexp_fail: + SWPS_ERR("%s: fail! :%d :%d \n", + __func__, ioexp_id, ioexp_type); + return NULL; +} + + +int +create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_obj_s *ioexp_p = NULL; + + ioexp_p = _create_ioexp_obj(ioexp_id, ioexp_type, + addr_map_p, run_mode); + if (!ioexp_p){ + return -1; + } + if (ioexp_head_p == NULL){ + ioexp_head_p = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; + } + ioexp_tail_p->next = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; +} + +static int +_init_ioexp_obj(struct ioexp_obj_s* self) { + + char *err_msg = "ERR"; + char *func_name = "_init_ioexp_obj"; + + /* Setup IOEXP configure byte */ + if (setup_ioexp_config(self) < 0){ + err_msg = "setup_ioexp_config fail"; + goto err_init_ioexp_obj; + } + /* Setup default data */ + if (_ioexp_init_handler(self) < 0){ + err_msg = "_ioexp_init_handler fail"; + goto err_init_ioexp_obj; + } + /* Update all */ + if (self->state == STATE_IOEXP_NORMAL){ + if (self->update_all(self, 1, func_name) < 0){ + err_msg = "update_all() fail"; + goto err_init_ioexp_obj; + } + } + return 0; + +err_init_ioexp_obj: + SWPS_DEBUG("%s: %s\n", __func__, err_msg); + return -1; +} + +int +init_ioexp_objs(void){ + /* Return value: + * 0: Success + * -1: Detect topology error + * -2: SWPS internal error + */ + + struct ioexp_obj_s *curr_p = ioexp_head_p; + + if (!curr_p) { + SWPS_ERR("%s: ioexp_head_p is NULL\n", __func__); + return -2; + } + while (curr_p) { + if (_init_ioexp_obj(curr_p) < 0) { + SWPS_DEBUG("%s: _init_ioexp_obj() fail\n", __func__); + return -1; + } + curr_p = curr_p->next; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + +void +clean_ioexp_objs(void){ + + struct ioexp_i2c_s *i2c_curr_p = NULL; + struct ioexp_i2c_s *i2c_next_p = NULL; + struct ioexp_obj_s *ioexp_next_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + if (ioexp_head_p == NULL){ + ioexp_tail_p = NULL; + return; + } + while(ioexp_curr_p){ + ioexp_next_p = ioexp_curr_p->next; + i2c_curr_p = ioexp_curr_p->i2c_head_p; + while (i2c_curr_p) { + i2c_next_p = i2c_curr_p->next; + kfree(i2c_curr_p->i2c_client_p); + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } + kfree(ioexp_curr_p); + ioexp_curr_p = ioexp_next_p; + } + ioexp_tail_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} + +struct ioexp_obj_s * +get_ioexp_obj(int ioexp_id){ + + struct ioexp_obj_s *result_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + if (ioexp_curr_p->ioexp_id == ioexp_id){ + result_p = ioexp_curr_p; + break; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return result_p; +} +int +check_channel_tier_1(void) { + + if ( (!_is_channel_ready(ioexp_head_p)) && + (!_is_channel_ready(ioexp_tail_p)) ){ + return -1; + } + return 0; +} + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/io_expander.h b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/io_expander.h new file mode 100644 index 00000000000..a5541617dd0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/io_expander.h @@ -0,0 +1,143 @@ +#ifndef IO_EXPANDER_H +#define IO_EXPANDER_H + +#include + +/* IOEXP type define (QSFP series) */ +#define IOEXP_TYPE_CYPRESS_NABC (10102) +#define IOEXP_TYPE_CYPRESS_7ABC (10207) + +/* IOEXP mode define */ +#define IOEXP_MODE_DIRECT (19001) + +/* IOEXP state define */ +#define STATE_IOEXP_NORMAL (0) +#define STATE_IOEXP_INIT (-1) +#define STATE_IOEXP_ABNORMAL (-2) + +/* IOEXP error code define */ +#define ERR_IOEXP_NOTSUPPORT (-100) +#define ERR_IOEXP_UNINIT (-101) +#define ERR_IOEXP_BADCONF (-102) +#define ERR_IOEXP_BADINPUT (-105) +#define ERR_IOEXP_UNEXCPT (-199) + + +#define SWPS_INFO(fmt, args...) printk( KERN_INFO "[SWPS] " fmt, ##args) +#define SWPS_WARN(fmt, args...) printk( KERN_WARNING "[SWPS] " fmt, ##args) +#define SWPS_ERR(fmt, args...) printk( KERN_ERR "[SWPS] " fmt, ##args) + +#ifdef DEBUG_SWPS +# define SWPS_DEBUG(fmt, args...) printk( KERN_DEBUG "[SWPS] " fmt, ##args) +#else +# define SWPS_DEBUG(fmt, args...) +#endif + + +struct ioexp_addr_s { + int chan_id; + int chip_addr; + int read_offset[8]; + int write_offset[8]; + int conf_offset[8]; + uint8_t data_default[8]; + uint8_t conf_default[8]; +}; + +struct ioexp_i2c_s { + int chip_id; + struct i2c_client *i2c_client_p; + struct ioexp_i2c_s *next; +}; + + +struct ioexp_bitmap_s { + int chip_id; /* IOEXP chip id */ + int ioexp_voffset; /* IOEXP virtual offset */ + int bit_shift; +}; + +struct ioexp_map_s { + int chip_amount; /* Number of chips that IOEXP object content */ + int data_width; /* Number of (Read/Write/Config) bytes */ + struct ioexp_addr_s *map_addr; /* Chip address info */ + struct ioexp_bitmap_s map_present[8]; /* IOEXP for SFP / QSFP */ + struct ioexp_bitmap_s map_tx_disable[8]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_tx_fault[8]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_rxlos[8]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_reset[8]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_lpmod[8]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_modsel[8]; /* IOEXP for QSFP */ +}; + +struct ioexp_data_s { + uint8_t data[8]; +}; + +struct ioexp_obj_s { + + /* ============================ + * Object public property + * ============================ + */ + int ioexp_id; + int ioexp_type; + + /* ============================ + * Object private property + * ============================ + */ + struct ioexp_data_s chip_data[16]; /* Max: 8-ioexp in one virt-ioexp(ioexp_obj) */ + struct ioexp_map_s *ioexp_map_p; + struct ioexp_obj_s *next; + struct ioexp_i2c_s *i2c_head_p; + struct mutex lock; + int mode; + int state; + + /* =========================================== + * Object public functions + * =========================================== + */ + int (*get_present)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_fault)(struct ioexp_obj_s *self, int virt_offset); + int (*get_rxlos)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_disable)(struct ioexp_obj_s *self, int virt_offset); + int (*get_reset)(struct ioexp_obj_s *self, int virt_offset); + int (*get_lpmod)(struct ioexp_obj_s *self, int virt_offset); + int (*get_modsel)(struct ioexp_obj_s *self, int virt_offset); + int (*set_tx_disable)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_reset)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_lpmod)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_modsel)(struct ioexp_obj_s *self, int virt_offset, int input_val); + + /* =========================================== + * Object private functions + * =========================================== + */ + int (*init)(struct ioexp_obj_s *self); + int (*update_all)(struct ioexp_obj_s *self, int show_err, char *caller_name); + int (*fsm_4_direct)(struct ioexp_obj_s* self); +}; + + +struct ioexp_obj_s* get_ioexp_obj(int ioexp_id); +int create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode); +int init_ioexp_objs(void); +void clean_ioexp_objs(void); + +int check_channel_tier_1(void); + +/* Macro for bit control */ +#define SWP_BIT_SET(byte_val,bit_shift) ((byte_val) |= (1<<(bit_shift))) +#define SWP_BIT_CLEAR(byte_val,bit_shift) ((byte_val) &= ~(1<<(bit_shift))) + + +#endif /* IO_EXPANDER_H */ + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/transceiver.c b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/transceiver.c new file mode 100644 index 00000000000..368e412b19e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/transceiver.c @@ -0,0 +1,906 @@ +#include +#include +#include +#include +#include "io_expander.h" +#include "transceiver.h" + + +/* ========== Register EEPROM address mapping ========== + */ +struct eeprom_map_s eeprom_map_sfp = { + .addr_rx_los =-1, .page_rx_los =-1, .offset_rx_los =-1, .length_rx_los =-1, + .addr_tx_disable =-1, .page_tx_disable =-1, .offset_tx_disable =-1, .length_tx_disable =-1, + .addr_tx_fault =-1, .page_tx_fault =-1, .offset_tx_fault =-1, .length_tx_fault =-1, +}; + +struct eeprom_map_s eeprom_map_qsfp = { + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, +}; + +struct eeprom_map_s eeprom_map_qsfp28 = { + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, +}; + + +/* ========== Utility Functions ========== + */ +void +alarm_msg_2_user(struct transvr_obj_s *self, + char *emsg) { + + SWPS_ERR("%s on %s.\n", emsg, self->swp_name); +} + + +/* ========== Private functions ========== + */ +static int +_reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +_transvr_init_handler(struct transvr_obj_s *self); + +static void +_transvr_clean_retry(struct transvr_obj_s *self) { + self->retry = 0; +} + + +static int +_transvr_handle_retry(struct transvr_obj_s *self, int retry) { + /* Return: 0: keep retry + * -1: stop retry + */ + if (self->retry == 0) { + self->retry = retry; + } + self->retry -= 1; + if (self->retry <= 0) { + _transvr_clean_retry(self); + return -1; + } + return 0; +} + +static int +_common_setup_page(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int show_e) { + /* return: + * 0 : OK + * -1 : EEPROM settings incorrect + * -2 : I2C R/W failure + * -3 : Undefined case + */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Check */ + if ((addr < 0) || (offset < 0) || (len < 0)) { + emsg = "EEPROM settings incorrect"; + retval = -1; + goto err_common_setup_page; + } + /* Case1: continue access */ + if ((self->i2c_client_p->addr == addr) && + (self->curr_page == page)) { + return 0; + } + self->i2c_client_p->addr = addr; + /* Case2: select lower page */ + if (page == -1) { + self->curr_page = page; + return 0; + } + /* Case3: select upper page */ + if (page >= 0) { + goto upper_common_setup_page; + } + /* Unexpected case */ + show_e = 1; + emsg = "Unexpected case"; + retval = -3; + goto err_common_setup_page; + +upper_common_setup_page: + if (i2c_smbus_write_byte_data(self->i2c_client_p, + VAL_TRANSVR_PAGE_SELECT_OFFSET, + page) < 0) { + emsg = "I2C R/W failure"; + retval = -2; + goto err_common_setup_page; + } + self->curr_page = page; + mdelay(VAL_TRANSVR_PAGE_SELECT_DELAY); + return 0; + +err_common_setup_page: + if (show_e) { + SWPS_INFO("%s: %s", __func__, emsg); + SWPS_INFO("%s: :0x%02x :%d :%d :%d\n", + __func__, addr, page, offset, len); + } + return retval; +} + +/* ========== Object functions for Final State Machine ========== + */ +int +is_plugged(struct transvr_obj_s *self){ + + int limit = 63; + int present = DEBUG_TRANSVR_INT_VAL; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + struct ioexp_obj_s *ioexp_p = self->ioexp_obj_p; + + if (!ioexp_p) { + snprintf(emsg, limit, "ioexp_p is null!"); + goto err_is_plugged_1; + } + present = ioexp_p->get_present(ioexp_p, self->ioexp_virt_offset); + switch (present){ + case 0: + return 1; + case 1: + return 0; + case ERR_IOEXP_UNINIT: + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + default: + if (ioexp_p->state == STATE_IOEXP_INIT){ + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + } + break; + } + SWPS_INFO("%s: Exception case! :%d :%d\n", + __func__, present, ioexp_p->state); + return 0; + +err_is_plugged_1: + SWPS_DEBUG("%s: %s\n", __func__, emsg); + return 0; +} + + +static int +detect_transvr_type(struct transvr_obj_s* self){ + + int type = TRANSVR_TYPE_ERROR; + + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + type = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + + /* Case: 1. Wait transceiver I2C module. + * 2. Transceiver I2C module failure. + * Note: 1. SFF allow maximum transceiver initial time is 2 second. So, there + * are exist some case that we need to wait transceiver. + * For these case, we keeps status on "TRANSVR_TYPE_UNPLUGGED", than + * state machine will keep trace with it. + * 2. There exist some I2C failure case we need to handle. Such as user + * insert the failure transceiver, or any reason cause it abnormal. + */ + if (type < 0){ + switch (type) { + case -EIO: + SWPS_DEBUG("%s: %s smbus return:-5 (I/O error)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + case -ENXIO: + SWPS_DEBUG("%s: %s smbus return:-6 (No such device or address)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + default: + break; + } + SWPS_INFO("%s: %s unexpected smbus return:%d \n", + __func__, self->swp_name, type); + return TRANSVR_TYPE_ERROR; + } + /* Identify valid transceiver type */ + switch (type){ + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + break; + case TRANSVR_TYPE_UNKNOW_1: + case TRANSVR_TYPE_UNKNOW_2: + type = TRANSVR_TYPE_UNKNOW_2; + break; + default: + SWPS_DEBUG("%s: unknow type:0x%02x \n", __func__, type); + type = TRANSVR_TYPE_ERROR; + break; + } + return type; +} + + +static int +detect_transvr_state(struct transvr_obj_s *self, + int result[2]){ + /* [return] [result-0] [result-1] + * 0 STATE_TRANSVR_CONNECTED TRANSVR_TYPE_FAKE + * 0 STATE_TRANSVR_DISCONNECTED TRANSVR_TYPE_UNPLUGGED + * 0 STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * 0 STATE_TRANSVR_INIT / + * 0 STATE_TRANSVR_SWAPPED + * 0 STATE_TRANSVR_CONNECTED + * ERR_TRNASVR_BE_ISOLATED STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_I2C_CRASH STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_UNEXCPT STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_UNKNOW_1/2 + */ + result[0] = STATE_TRANSVR_UNEXCEPTED; /* For return state */ + result[1] = TRANSVR_TYPE_ERROR; /* For return type */ + + /* Case1: Fake type */ + if (self->type == TRANSVR_TYPE_FAKE){ + result[0] = STATE_TRANSVR_CONNECTED; + result[1] = TRANSVR_TYPE_FAKE; + return 0; + } + /* Case2: Transceiver unplugged */ + if (!is_plugged(self)){ + result[0] = STATE_TRANSVR_DISCONNECTED; + result[1] = TRANSVR_TYPE_UNPLUGGED; + return 0; + } + /* Case3: Transceiver be isolated */ + if (self->state == STATE_TRANSVR_ISOLATED){ + result[0] = STATE_TRANSVR_ISOLATED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case4: Transceiver plugged */ + result[1] = detect_transvr_type(self); + /* Case4.1: I2C topology crash + * Note : There are some I2C issues cause by transceiver/cables. + * We need to check topology status when user insert it. + * But in this step, we can't not ensure this is the issues + * port. So, it return the ERR_TRANSVR_I2C_CRASH, then upper + * layer will diagnostic I2C topology. + */ + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: %s detect I2C crash :%d\n", + __func__, self->swp_name, self->state); + result[0] = STATE_TRANSVR_UNEXCEPTED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_I2C_CRASH; + } + /* Case4.2: System initial not ready, + * Note : Sometime i2c channel or transceiver EEPROM will delay that will + * cause system in inconsistent state between EEPROM and IOEXP. + * In this case, SWP transceiver object keep state at LINK_DOWN + * to wait system ready. + * By the way, State Machine will handle these case. + */ + if (result[1] == TRANSVR_TYPE_UNPLUGGED){ + result[0] = STATE_TRANSVR_DISCONNECTED; + return 0; + } + /* Case4.3: Error transceiver type */ + if (result[1] == TRANSVR_TYPE_ERROR){ + result[0] = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s detect error type\n", __func__, self->swp_name); + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard!"); + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case3.3: Unknow transceiver type */ + if ((result[1] == TRANSVR_TYPE_UNKNOW_1) || + (result[1] == TRANSVR_TYPE_UNKNOW_2) ){ + result[0] = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + /* Case3.4: During initial process */ + if (self->state == STATE_TRANSVR_INIT){ + result[0] = STATE_TRANSVR_INIT; + return 0; + } + /* Case3.5: Transceiver be swapped */ + if (self->type != result[1]){ + result[0] = STATE_TRANSVR_SWAPPED; + return 0; + } + /* Case3.6: Link up state */ + result[0] = STATE_TRANSVR_CONNECTED; + return 0; +} +int +common_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + + int err; + int detect_result[2]; + int current_state = STATE_TRANSVR_UNEXCEPTED; + int current_type = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_NEW) { + if (_transvr_init_handler(self) < 0){ + return ERR_TRANSVR_INIT_FAIL; + } + } + err = detect_transvr_state(self, detect_result); + if (err < 0) { + return err; + } + /* In Direct mode, driver only detect transceiver when user call driver interface + * which on sysfs. So it only need consider the state of Transceiver. + */ + current_state = detect_result[0]; + current_type = detect_result[1]; + + switch (current_state){ + + case STATE_TRANSVR_DISCONNECTED: /* Transceiver is not plugged */ + self->state = current_state; + self->type = current_type; + return ERR_TRANSVR_UNPLUGGED; + + case STATE_TRANSVR_INIT: /* Transceiver is plugged, system not ready */ + return ERR_TRANSVR_UNINIT; + + case STATE_TRANSVR_ISOLATED: /* Transceiver is plugged, but has some issues */ + return ERR_TRNASVR_BE_ISOLATED; + + case STATE_TRANSVR_CONNECTED: /* Transceiver is plugged, system is ready */ + self->state = current_state; + self->type = current_type; + return 0; + + case STATE_TRANSVR_SWAPPED: /* Transceiver is plugged, system detect user changed */ + self->type = current_type; + if (reload_transvr_obj(self, current_type) < 0){ + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + self->state = current_state; + return 0; + + case STATE_TRANSVR_UNEXCEPTED: /* Transceiver type or state is unexpected case */ + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_UNEXCPT; + + default: + SWPS_INFO("%s: state:%d not in define.\n", __func__, current_state); + break; + } + return ERR_TRANSVR_UNEXCPT; +} + +int +fake_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + +/* ========== Object Initial handler ========== + */ +static int +_is_transvr_valid(struct transvr_obj_s *self, + int type, + int state) { + /* [Return] + * 0 : OK, inserted + * EVENT_TRANSVR_INIT_DOWN : OK, removed + * EVENT_TRANSVR_INIT_FAIL : Outside error, type doesn't supported + * EVENT_TRANSVR_EXCEP_INIT : Internal error, state undefined + */ + switch (type) { + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + break; + default: + SWPS_INFO("detect undefined type:0x%02x on %s\n", + type, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; + } + switch (state) { + case STATE_TRANSVR_DISCONNECTED: + return EVENT_TRANSVR_INIT_DOWN; + case STATE_TRANSVR_INIT: + case STATE_TRANSVR_CONNECTED: + case STATE_TRANSVR_SWAPPED: + break; + default: + SWPS_INFO("detect undefined state:%d on %s\n", + state, self->swp_name); + return EVENT_TRANSVR_EXCEP_INIT; + } + return 0; +} + + +static int +_is_transvr_hw_ready(struct transvr_obj_s *self, + int type){ + /* [Return] + * EVENT_TRANSVR_TASK_DONE : Ready + * EVENT_TRANSVR_TASK_WAIT : Not ready + * EVENT_TRANSVR_INIT_FAIL : Error + */ + int addr = DEBUG_TRANSVR_INT_VAL; + int page = DEBUG_TRANSVR_INT_VAL; + int offs = DEBUG_TRANSVR_INT_VAL; + int bit = DEBUG_TRANSVR_INT_VAL; + int ready = DEBUG_TRANSVR_INT_VAL; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t ab_val = DEBUG_TRANSVR_HEX_VAL; + + switch (type) { + case TRANSVR_TYPE_SFP: + addr = VAL_TRANSVR_8472_READY_ADDR; + page = VAL_TRANSVR_8472_READY_PAGE; + offs = VAL_TRANSVR_8472_READY_OFFSET; + bit = VAL_TRANSVR_8472_READY_BIT; + ready = VAL_TRANSVR_8472_READY_VALUE; + ab_val = VAL_TRANSVR_8472_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + addr = VAL_TRANSVR_8436_READY_ADDR; + page = VAL_TRANSVR_8436_READY_PAGE; + offs = VAL_TRANSVR_8436_READY_OFFSET; + bit = VAL_TRANSVR_8436_READY_BIT; + ready = VAL_TRANSVR_8436_READY_VALUE; + ab_val = VAL_TRANSVR_8436_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + return EVENT_TRANSVR_TASK_DONE; + + default: + emsg = "unexpected case"; + goto err_is_transvr_hw_ready; + } + /* Select target page */ + err = _common_setup_page(self, addr, page, offs, 1, 0); + if (err < 0) { + emsg = "setup page fail"; + goto err_is_transvr_hw_ready; + } + /* Check feature supported + * [Note] + * Some of transceiver/cables doesn't support "Status Indicators" + * (ex:DAC, RJ45 copper SFP ...etc). In these case, we bypass the + * step of checking Status Indicators, then state machine will take + * the following handle procedure. + */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (err < 0) { + emsg = "doesn't support Status Indicators"; + goto bypass_is_transvr_hw_ready; + } + /* Filter abnormal case */ + if (err == ab_val) { + emsg = "detect using unusual definition."; + goto bypass_is_transvr_hw_ready; + } + /* Get Status Indicators */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, offs); + if (err < 0) { + emsg = "detect current value fail"; + goto err_is_transvr_hw_ready; + } + if ((err & (1<:%d\n", __func__, emsg, type); + return EVENT_TRANSVR_TASK_DONE; + +err_is_transvr_hw_ready: + SWPS_DEBUG("%s: %s :%d\n", __func__, emsg, type); + return EVENT_TRANSVR_INIT_FAIL; +} + +static int +_transvr_init_handler(struct transvr_obj_s *self){ + + int detect[2]; + int d_state = STATE_TRANSVR_UNEXCEPTED; + int d_type = TRANSVR_TYPE_ERROR; + int result = ERR_TRANSVR_UNINIT; + int retry = 6; /* (6+1) x 0.3 = 2.1s > spec:2.0s */ + int elimit = 63; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Clean and check callback */ + self->state = STATE_TRANSVR_INIT; + if (self->init == NULL) { + snprintf(emsg, elimit, "init() is null"); + goto initer_err_case_unexcept_0; + } + /* Detect transceiver information */ + result = detect_transvr_state(self, detect); + if (result < 0) { + snprintf(emsg, elimit, "detect_transvr_state() fail"); + switch (result) { + case ERR_TRANSVR_I2C_CRASH: + goto initer_err_case_i2c_ceash; + case ERR_TRNASVR_BE_ISOLATED: + goto initer_err_case_be_isolated; + + case ERR_TRANSVR_UNEXCPT: + default: + break; + } + goto initer_err_case_retry_1; + } + d_state = detect[0]; + d_type = detect[1]; + + /* Verify transceiver type and state */ + switch (_is_transvr_valid(self, d_type, d_state)) { + case 0: + break; + case EVENT_TRANSVR_INIT_DOWN: + goto initer_ok_case_down;; + case EVENT_TRANSVR_INIT_FAIL: + snprintf(emsg, elimit, "transceiver type doesn't support"); + goto initer_err_case_alarm_to_user; + case EVENT_TRANSVR_EXCEP_INIT: + default: + goto initer_err_case_unexcept_0; + } + + /* Handle reload case */ + if (self->type != d_type){ + /* This is the protect mechanism. Normally, This case will not happen. + * When State machine detect swap event during initial, It will trigger + * reload function to ensure type correct. */ + if (_reload_transvr_obj(self, d_type) < 0){ + snprintf(emsg, elimit, "reload object fail"); + goto initer_err_case_unexcept_0; + } + } + + /* Check transceiver HW initial ready */ + switch (_is_transvr_hw_ready(self, d_type)) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_err_case_retry_1; + case EVENT_TRANSVR_INIT_FAIL: + default: + goto initer_err_case_unexcept_0; + } + + /* Try to update all and check */ + if (self->update_all(self, 1) < 0){ + /* For some transceiver, EEPROME has lag issues during initial stage. + * In this case, we set status back to STATE_TRANSVR_NEW, than it will + * be checked in next polling cycle. */ + goto initer_err_case_retry_1; + } + + /* Execute init() call back */ + result = self->init(self); + switch (result) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_ok_case_wait; + + default: + snprintf(emsg, elimit, "undefined init() return:%d\n", result); + goto initer_err_case_unexcept_0; + } + goto initer_ok_case_up; + + +initer_ok_case_wait: + return EVENT_TRANSVR_TASK_WAIT; + +initer_ok_case_up: + self->state = STATE_TRANSVR_CONNECTED; + self->temp = 0; + return EVENT_TRANSVR_INIT_UP; + +initer_ok_case_down: + self->temp = 0; + self->state = STATE_TRANSVR_DISCONNECTED; + return EVENT_TRANSVR_INIT_DOWN; + +initer_err_case_i2c_ceash: + SWPS_DEBUG("%s: %s :%s :I2C crash\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_I2C_CRASH; + +initer_err_case_be_isolated: + SWPS_DEBUG("%s: %s :%s :isolated\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return EVENT_TRANSVR_EXCEP_ISOLATED; + +initer_err_case_retry_1: + SWPS_DEBUG("%s: %s :%s :retry\n", + __func__, emsg, self->swp_name); + if (_transvr_handle_retry(self, retry) == 0) { + self->state = STATE_TRANSVR_NEW; + return EVENT_TRANSVR_INIT_REINIT; + } + goto initer_err_case_alarm_to_user; + +initer_err_case_unexcept_0: + self->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_INIT_FAIL; + +initer_err_case_alarm_to_user: + SWPS_DEBUG("%s: %s :%s :alarm_to_user\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard"); + return EVENT_TRANSVR_INIT_FAIL; +} + +static int +setup_transvr_private_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->fsm_4_direct = common_fsm_4_direct_mode; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->fsm_4_direct = common_fsm_4_direct_mode; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->fsm_4_direct = common_fsm_4_direct_mode; + return 0; + + case TRANSVR_TYPE_FAKE: + self->fsm_4_direct = fake_fsm_4_direct_mode; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static struct eeprom_map_s * +get_eeprom_map(int transvr_type){ + + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + return &eeprom_map_sfp; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + return &eeprom_map_qsfp; + case TRANSVR_TYPE_QSFP_28: + return &eeprom_map_qsfp28; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return NULL; +} + + +static int +setup_transvr_ssize_attr(char *swp_name, + struct transvr_obj_s *self, + struct eeprom_map_s *map_p, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int chan_id, + int run_mode){ + switch (run_mode){ + case TRANSVR_MODE_DIRECT: /* Direct access device mode */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = DEBUG_TRANSVR_INT_VAL; + return -1; + } + self->eeprom_map_p = map_p; + self->ioexp_obj_p = ioexp_obj_p; + self->ioexp_virt_offset = ioexp_virt_offset; + self->chan_id = chan_id; + self->layout = transvr_type; + self->type = transvr_type; + self->chipset_type = chipset_type; + self->state = STATE_TRANSVR_NEW; + self->info = STATE_TRANSVR_NEW; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + strncpy(self->swp_name, swp_name, 32); + mutex_init(&self->lock); + return 0; +} + + + +static int +setup_i2c_client(struct transvr_obj_s *self){ + + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + adap = i2c_get_adapter(self->chan_id); + if(!adap){ + snprintf(err_msg, sizeof(err_msg), + "can not get adap:%d", self->chan_id); + goto err_setup_i2c_client; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + snprintf(err_msg, sizeof(err_msg), + "can not kzalloc client:%d", self->chan_id); + goto err_setup_i2c_client; + } + client->adapter = adap; + self->i2c_client_p = client; + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return ERR_TRANSVR_UNEXCPT; +} + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode){ + + struct transvr_obj_s *result_p; + struct eeprom_map_s *map_p; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Allocate transceiver object */ + map_p = get_eeprom_map(transvr_type); + if (!map_p){ + snprintf(err_msg, sizeof(err_msg), + "Invalid transvr_type:%d", transvr_type); + goto err_create_transvr_fail; + } + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_create_transvr_fail; + } + /* Prepare static size attributes */ + if (setup_transvr_ssize_attr(swp_name, + result_p, + map_p, + ioexp_obj_p, + ioexp_virt_offset, + transvr_type, + chipset_type, + chan_id, + run_mode) < 0){ + goto err_create_transvr_sattr_fail; + } + + /* Prepare call back functions of object */ + if (setup_transvr_private_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_sattr_fail; + } + /* Prepare i2c client object */ + if (setup_i2c_client(result_p) < 0){ + goto err_create_transvr_sattr_fail; + } + return result_p; +err_create_transvr_sattr_fail: + kfree(result_p); +err_create_transvr_fail: + SWPS_ERR("%s: %s :%d :%d :%d\n", + __func__, err_msg, chan_id, ioexp_virt_offset, transvr_type); + return NULL; +} + + +static int +_reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + struct eeprom_map_s *new_map_p; + struct eeprom_map_s *old_map_p = self->eeprom_map_p; + struct i2c_client *old_i2c_p = self->i2c_client_p; + int old_type = self->type; + + /* Change state to STATE_TRANSVR_INIT */ + self->state = STATE_TRANSVR_INIT; + self->type = new_type; + /* Replace EEPROME map */ + new_map_p = get_eeprom_map(new_type); + if (!new_map_p){ + goto err_private_reload_func_1; + } + self->eeprom_map_p = new_map_p; + /* Reload i2c client */ + if (setup_i2c_client(self) < 0){ + goto err_private_reload_func_2; + } + if (setup_transvr_private_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + kfree(old_i2c_p); + return 0; + +err_private_reload_func_3: + SWPS_INFO("%s: init() fail!\n", __func__); + kfree(old_i2c_p); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return -2; + +err_private_reload_func_2: + self->eeprom_map_p = old_map_p; + self->i2c_client_p = old_i2c_p; +err_private_reload_func_1: + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = old_type; + SWPS_INFO("%s fail! :0x%02x\n", __func__, new_type); + return -1; +} + + +static int +reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + int result_val = ERR_TRANSVR_UNEXCPT; + + /* Reload phase */ + result_val = _reload_transvr_obj(self, new_type); + if (result_val < 0){ + SWPS_INFO("%s: reload phase fail! :%d\n", + __func__, result_val); + return EVENT_TRANSVR_RELOAD_FAIL; + } + /* Initial phase */ + result_val = _transvr_init_handler(self); + if (result_val < 0){ + SWPS_INFO("%s: initial phase fail! :%d\n", + __func__, result_val); + } + return result_val; +} + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/transceiver.h b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/transceiver.h new file mode 100644 index 00000000000..0e79f0b9027 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/modules/transceiver.h @@ -0,0 +1,168 @@ +#ifndef TRANSCEIVER_H +#define TRANSCEIVER_H + +#include + +/* Transceiver type define */ +#define TRANSVR_TYPE_UNKNOW_1 (0x00) +#define TRANSVR_TYPE_UNKNOW_2 (0xff) +#define TRANSVR_TYPE_SFP (0x03) /* Define for SFP, SFP+, SFP28 */ +#define TRANSVR_TYPE_QSFP (0x0c) +#define TRANSVR_TYPE_QSFP_PLUS (0x0d) +#define TRANSVR_TYPE_QSFP_28 (0x11) +#define TRANSVR_TYPE_UNPLUGGED (0xfa) /* Define for ERROR handle */ +#define TRANSVR_TYPE_FAKE (0xfc) /* Define for ERROR handle */ +#define TRANSVR_TYPE_INCONSISTENT (0xfd) /* Define for ERROR handle */ +#define TRANSVR_TYPE_ERROR (0xfe) /* Define for ERROR handle */ + +/* Transceiver mode define */ +#define TRANSVR_MODE_DIRECT (21000) + +/* Transceiver state define + * [Note] + * 1. State is used to represent the state of "Transceiver" and "Object". + * 2. State for different target has different means. The description as following: + */ +#define STATE_TRANSVR_CONNECTED (0) /* [Transvr]:Be plugged in. [Obj]:Link up, and work normally. */ +#define STATE_TRANSVR_NEW (-100) /* [Transvr]:(Not used) [Obj]:Create */ +#define STATE_TRANSVR_INIT (-101) /* [Transvr]:Be plugged in. [Obj]:Link up, and in initial process. */ +#define STATE_TRANSVR_ISOLATED (-102) /* [Transvr]:Be plugged in. [Obj]:Isolate, and not provide service. */ +#define STATE_TRANSVR_SWAPPED (-200) /* [Transvr]:Be plugged in. [Obj]:(Not used) */ +#define STATE_TRANSVR_DISCONNECTED (-300) /* [Transvr]:Un-plugged. [Obj]:Link down, and not provide service. */ +#define STATE_TRANSVR_UNEXCEPTED (-901) /* [Transvr]:Any [Obj]:Any, and not in expect case. */ + +/* Event for task handling */ +#define EVENT_TRANSVR_TASK_WAIT (2101) +#define EVENT_TRANSVR_TASK_DONE (0) +#define EVENT_TRANSVR_TASK_FAIL (-2101) +/* Event for initial handling */ +#define EVENT_TRANSVR_INIT_UP (2201) +#define EVENT_TRANSVR_INIT_DOWN (1) +#define EVENT_TRANSVR_INIT_REINIT (-2201) +#define EVENT_TRANSVR_INIT_FAIL (-2202) +/* Event for others */ +#define EVENT_TRANSVR_RELOAD_FAIL (-2301) +#define EVENT_TRANSVR_EXCEP_INIT (-2401) +#define EVENT_TRANSVR_EXCEP_UP (-2402) +#define EVENT_TRANSVR_EXCEP_DOWN (-2403) +#define EVENT_TRANSVR_EXCEP_SWAP (-2404) +#define EVENT_TRANSVR_EXCEP_EXCEP (-2405) +#define EVENT_TRANSVR_EXCEP_ISOLATED (-2406) +#define EVENT_TRANSVR_I2C_CRASH (-2501) + +/* Transceiver error code define */ +#define ERR_TRANSVR_UNINIT (-201) +#define ERR_TRANSVR_UNPLUGGED (-202) +#define ERR_TRANSVR_ABNORMAL (-203) +#define ERR_TRANSVR_NOSTATE (-204) +#define ERR_TRANSVR_NOTSUPPORT (-205) +#define ERR_TRANSVR_BADINPUT (-206) +#define ERR_TRANSVR_UPDATE_FAIL (-207) +#define ERR_TRANSVR_RELOAD_FAIL (-208) +#define ERR_TRANSVR_INIT_FAIL (-209) +#define ERR_TRANSVR_UNDEFINED (-210) +#define ERR_TRANSVR_TASK_FAIL (-211) +#define ERR_TRANSVR_TASK_BUSY (-212) +#define ERR_TRANSVR_FUNC_DISABLE (-214) +#define ERR_TRANSVR_I2C_CRASH (-297) +#define ERR_TRNASVR_BE_ISOLATED (-298) +#define ERR_TRANSVR_UNEXCPT (-299) + +/* For debug */ +#define DEBUG_TRANSVR_INT_VAL (-99) +#define DEBUG_TRANSVR_HEX_VAL (0xfe) +#define DEBUG_TRANSVR_STR_VAL "ERROR" + +/* For system internal */ +#define VAL_TRANSVR_COMID_ARREESS (0x50) +#define VAL_TRANSVR_COMID_OFFSET (0x00) +#define VAL_TRANSVR_8472_READY_ADDR (0x51) +#define VAL_TRANSVR_8472_READY_PAGE (-1) +#define VAL_TRANSVR_8472_READY_OFFSET (110) +#define VAL_TRANSVR_8472_READY_BIT (0) +#define VAL_TRANSVR_8472_READY_VALUE (0) +#define VAL_TRANSVR_8472_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_READY_ADDR (0x50) +#define VAL_TRANSVR_8436_READY_PAGE (-1) +#define VAL_TRANSVR_8436_READY_OFFSET (2) +#define VAL_TRANSVR_8436_READY_BIT (0) +#define VAL_TRANSVR_8436_READY_VALUE (0) +#define VAL_TRANSVR_8436_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_PWD_ADDR (0x50) +#define VAL_TRANSVR_8436_PWD_PAGE (-1) +#define VAL_TRANSVR_8436_PWD_OFFSET (123) +#define VAL_TRANSVR_PAGE_FREE (-99) +#define VAL_TRANSVR_PAGE_SELECT_OFFSET (127) +#define VAL_TRANSVR_PAGE_SELECT_DELAY (5) +#define VAL_TRANSVR_TASK_RETRY_FOREVER (-999) +#define VAL_TRANSVR_FUNCTION_DISABLE (-1) +#define STR_TRANSVR_SFP "SFP" +#define STR_TRANSVR_QSFP "QSFP" +#define STR_TRANSVR_QSFP_PLUS "QSFP+" +#define STR_TRANSVR_QSFP28 "QSFP28" + +/* BCM chip type define */ +#define BCM_CHIP_TYPE_TOMAHAWK (31002) /* Redwood, Cypress */ + +/* Info from transceiver EEPROM */ +struct eeprom_map_s { + int addr_rx_los; int page_rx_los; int offset_rx_los; int length_rx_los; + int addr_tx_disable; int page_tx_disable; int offset_tx_disable; int length_tx_disable; + int addr_tx_fault; int page_tx_fault; int offset_tx_fault; int length_tx_fault; +}; + +/* Class of transceiver object */ +struct transvr_obj_s { + /* ========== Object private property ========== + */ + struct device *transvr_dev_p; + struct eeprom_map_s *eeprom_map_p; + struct i2c_client *i2c_client_p; + struct ioexp_obj_s *ioexp_obj_p; + struct mutex lock; + char swp_name[32]; + int auto_tx_disable; + int chan_id; + int chipset_type; + int curr_page; + int info; + int ioexp_virt_offset; + int lane_id[8]; + int layout; + int mode; + int retry; + int state; + int temp; + int type; + + /* ========== Object private functions ========== + */ + int (*init)(struct transvr_obj_s *self); + int (*update_all)(struct transvr_obj_s *self, int show_err); + int (*fsm_4_direct)(struct transvr_obj_s* self, char *caller_name); +}; + + +/* For AVL Mapping */ +struct transvr_avl_s { + char vendor_name[32]; + char vendor_pn[32]; + int (*init)(struct transvr_obj_s *self); +}; + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode); + +void alarm_msg_2_user(struct transvr_obj_s *self, char *emsg); + +#endif /* TRANSCEIVER_H */ + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/setup.py b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/setup.py new file mode 100644 index 00000000000..3bd7b4825f4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/setup.py @@ -0,0 +1,15 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='sonic_platform', + version='1.0', + description='Module to initialize Inventec D7054Q28B platforms', + + packages=['sonic_platform'], +) + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/__init__.py new file mode 100644 index 00000000000..4bfefa0fb63 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/__init__.py @@ -0,0 +1,3 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import * + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/chassis.py new file mode 100644 index 00000000000..b5053cf4e2b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/chassis.py @@ -0,0 +1,155 @@ +#!/usr/bin/env python +# +# Name: chassis.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + import os + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.eeprom import Eeprom + from sonic_platform.psu import Psu + from sonic_platform.sfp import Sfp + from sonic_platform.fan import Fan + from sonic_platform.watchdog import Watchdog + from sonic_platform.thermal import Thermal + +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Chassis(ChassisBase): + + def __init__(self): + ChassisBase.__init__(self) + self.__num_of_psus = 2 + self.__num_of_ports = 54 + self.__num_of_sfps = 48 + self.__num_of_fans = 4 + self.__num_of_thermals = 6 + + # Initialize EEPROM + self._eeprom = Eeprom() + + # Initialize watchdog + #self._watchdog = Watchdog() + + # Initialize FAN + for index in range(1, self.__num_of_fans + 1): + fan = Fan(index) + self._fan_list.append(fan) + + # Initialize thermal + for index in range(1, self.__num_of_thermals + 1): + thermal = Thermal(index) + self._thermal_list.append(thermal) + + # Initialize PSU and PSU_FAN + for index in range(1, self.__num_of_psus + 1): + psu = Psu(index) + self._psu_list.append(psu) + fan = Fan(index, True) + self._fan_list.append(fan) + + # Initialize SFP + for index in range(0, self.__num_of_ports): + if index in range(0,self.__num_of_sfps): + sfp = Sfp(index, 'SFP') + else: + sfp = Sfp(index, 'QSFP') + + self._sfp_list.append(sfp) + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self._eeprom.modelstr() + + def get_presence(self): + """ + Retrieves the presence of the chassis + Returns: + bool: True if chassis is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the chassis + Returns: + string: Model/part number of chassis + """ + return self._eeprom.part_number_str() + + def get_serial(self): + """ + Retrieves the serial number of the chassis + Returns: + string: Serial number of chassis + """ + return self._eeprom.serial_number_str() + + def get_status(self): + """ + Retrieves the operational status of the chassis + Returns: + bool: A boolean value, True if chassis is operating properly + False if not + """ + return True + +############################################## +# Chassis methods +############################################## + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.base_mac_addr() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.serial_number_str() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821', + '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00', + '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'} + """ + return self._eeprom.system_eeprom_info() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/eeprom.py new file mode 100644 index 00000000000..b0ebee54ee2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/eeprom.py @@ -0,0 +1,110 @@ +#!/usr/bin/env python +# +# Name: eeprom.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + from sonic_eeprom import eeprom_tlvinfo + import binascii +except ImportError, e: + raise ImportError(str(e) + "- required module not found") + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self): + self.__eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0053/eeprom" + super(Eeprom, self).__init__(self.__eeprom_path, 0, '', True) + self.__eeprom_tlv_dict = dict() + try: + self.__eeprom_data = self.read_eeprom() + except: + self.__eeprom_data = "N/A" + raise RuntimeError("Eeprom is not Programmed") + else: + eeprom = self.__eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + return + + total_length = (ord(eeprom[9]) << 8) | ord(eeprom[10]) + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + ord(eeprom[tlv_index + 1])] + code = "0x%02X" % (ord(tlv[0])) + + if ord(tlv[0]) == self._TLV_CODE_VENDOR_EXT: + value = str((ord(tlv[2]) << 24) | (ord(tlv[3]) << 16) | + (ord(tlv[4]) << 8) | ord(tlv[5])) + value += str(tlv[6:6 + ord(tlv[1])]) + else: + name, value = self.decoder(None, tlv) + + self.__eeprom_tlv_dict[code] = value + if ord(eeprom[tlv_index]) == self._TLV_CODE_CRC_32: + break + + tlv_index += ord(eeprom[tlv_index+1]) + 2 + + def serial_number_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_SERIAL_NUMBER) + if not is_valid: + return "N/A" + return results[2] + + def base_mac_addr(self): + (is_valid, t) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_MAC_BASE) + if not is_valid or t[1] != 6: + return super(TlvInfoDecoder, self).switchaddrstr(e) + + return ":".join([binascii.b2a_hex(T) for T in t[2]]) + + def modelstr(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_PRODUCT_NAME) + if not is_valid: + return "N/A" + + return results[2] + + def part_number_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_PART_NUMBER) + if not is_valid: + return "N/A" + + return results[2] + + def serial_tag_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_SERVICE_TAG) + if not is_valid: + return "N/A" + + return results[2] + + def revision_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_DEVICE_VERSION) + if not is_valid: + return "N/A" + + return results[2] + + def system_eeprom_info(self): + """ + Returns a dictionary, where keys are the type code defined in + ONIE EEPROM format and values are their corresponding values + found in the system EEPROM. + """ + return self.__eeprom_tlv_dict + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/fan.py new file mode 100644 index 00000000000..ecfbfe2d876 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/fan.py @@ -0,0 +1,213 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the FAN information +# +############################################################################# + +try: + import os + from sonic_platform_base.fan_base import FanBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +############### +# Global +############### +FAN_DIR = "/sys/bus/i2c/devices/0-0066/" +MAX_PWM = 255 +class Fan(FanBase): + """Platform-specific Fan class""" + + def __init__(self, index, is_psu_fan=False): + self.is_psu_fan = is_psu_fan + + self.fan_gpi = "fan_gpi" + self.fan_index = index + if self.is_psu_fan: + self.fan_pwm = "pwm_psu{}".format(self.fan_index) + self.psu_fan_rpm = "rpm_psu{}".format(self.fan_index) + else: + self.fan_pwm = "pwm{}".format(self.fan_index) + self.fan_status_led_green_color = "fan_led_grn{}".format(self.fan_index) + self.fan_status_led_red_color = "fan_led_red{}".format(self.fan_index) + self.fan_front_rpm = "fan{}_input".format(self.fan_index * 2 - 1) + self.fan_rear_rpm = "fan{}_input".format(self.fan_index * 2) + + +####################### +# private function +####################### + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + + #################### + # Device base + #################### + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + if self.is_psu_fan: + return "PSU-{}_FAN".format(self.fan_index) + else: + return "FAN-{}".format(self.fan_index) + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + + Note: + fan_gpi define 8 bits + low byte means fan presense + high byte means fan direction + """ + presence = False + attr_path = FAN_DIR + self.fan_gpi + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + not_presence_bit = 1 << (self.fan_index - 1) + if not (int(attr_rv,16) and not_presence_bit): + presence = True + + return presence + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + if not self.is_psu_fan: + status = False + attr_grn_path = FAN_DIR + self.fan_status_led_green_color + + attr_grn_rv = self.__get_attr_value(attr_grn_path) + if (attr_grn_rv != 'ERR' and attr_grn_rv == '1'): + status = True + return status + + ################# + # fan base + ################# + + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + + Note: + fan_gpi define 8 bits + low byte means fan presense + high byte means fan direction + """ + direction = self.FAN_DIRECTION_INTAKE + attr_path = FAN_DIR + self.fan_gpi + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + #attr_rv = attr_rv >> 4 + direction_bit = 1 << ((self.fan_index - 1)+4) + if not (int(attr_rv,16) and direction_bit): + direction = self.FAN_DIRECTION_EXHAUST + + return direction + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed = 0 + attr_path = FAN_DIR + self.fan_pwm + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + pwm = int(attr_rv,10)if attr_rv else 0 + speed = float(pwm*100/MAX_PWM) + + return int(speed) + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed = 0 + attr_path = FAN_DIR + self.fan_pwm + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + pwm = int(attr_rv,10)if attr_rv else 0 + speed = float(pwm*100/MAX_PWM) + + return int(speed) + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + return 20 + + def get_status_led(self): + """ + Gets the state of the fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.is_psu_fan: + return self.STATUS_LED_COLOR_OFF + + attr_grn_path = FAN_DIR + self.fan_status_led_green_color + attr_red_path = FAN_DIR + self.fan_status_led_red_color + + attr_grn_rv = self.__get_attr_value(attr_grn_path) + attr_red_rv = self.__get_attr_value(attr_red_path) + if (attr_grn_rv != 'ERR' and attr_red_rv != 'ERR'): + if (attr_grn_rv == '1'): + return self.STATUS_LED_COLOR_GREEN + elif (attr_red_rv == '1'): + return self.STATUS_LED_COLOR_RED + else: + return self.STATUS_LED_COLOR_OFF diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/platform.py new file mode 100644 index 00000000000..ddad8c4c578 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/platform.py @@ -0,0 +1,20 @@ +#!/usr/bin/env python +# +# Name: platform.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PlatformBase): + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/psu.py new file mode 100644 index 00000000000..52dd2b12fb2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/psu.py @@ -0,0 +1,196 @@ +#!/usr/bin/env python +# +# Name: psu.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# + +try: + import os + from sonic_platform_base.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +PSU_DIR = "/sys/bus/i2c/devices/0-0066/" + +class Psu(PsuBase): + def __init__(self, index): + self.index = index + self.psu_presence_attr = "psu{}".format(self.index-1) + self.psu_status_attr = "psoc_psu{}_iout".format(self.index) + self.psu_power_in_attr = "power{}_input".format(self.index) + self.psu_power_out_attr = "power{}_input".format(self.index) + self.psu_voltage_out_attr = "psoc_psu{}_vin".format(self.index) + self.psu_current_out_attr = "psoc_psu{}_iout".format(self.index) + self.psu_serial_attr = "psoc_psu{}_serial".format(self.index) + self.psu_model_attr = "psoc_psu{}_vender".format(self.index) + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return "PSU{}".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_path = PSU_DIR+self.psu_presence_attr + attr_normal = "0 : normal" + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (attr_rv == attr_normal): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + model = "N/A" + attr_path = PSU_DIR+self.psu_model_attr + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + model = attr_rv + + return model + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + serial = "N/A" + attr_path = PSU_DIR+self.psu_serial_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + serial = attr_rv + + return serial + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + status = False + attr_path = PSU_DIR+self.psu_status_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) != 0): + status = True + + return status + +############################################## +# PSU methods +############################################## + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + voltage_out = 0.0 + attr_path = PSU_DIR+self.psu_voltage_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + voltage_out = float(attr_rv) / 1000 + + return voltage_out + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + current_out = 0.0 + attr_path = PSU_DIR+self.psu_current_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + current_out = float(attr_rv) / 1000 + + return current_out + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, e.g. 302.6 + """ + power_out = 0.0 + attr_path = PSU_DIR+self.psu_power_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + power_out = float(attr_rv) / 1000000 + + return power_out + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def get_status_led(self): + """ + Gets the state of the PSU status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_OFF + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/sfp.py new file mode 100644 index 00000000000..47d88afa13a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/sfp.py @@ -0,0 +1,1285 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Sfp contains an implementation of SONiC Platform Base API and +# provides the sfp device status which are available in the platform +# +############################################################################# + +import os +import time +import subprocess +import sonic_device_util +from ctypes import create_string_buffer + +try: + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_eeprom import eeprom_dts + from sonic_platform_base.sonic_sfp.sff8472 import sff8472InterfaceId + from sonic_platform_base.sonic_sfp.sff8472 import sff8472Dom + from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom + from sonic_platform_base.sonic_sfp.inf8628 import inf8628InterfaceId + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +INFO_OFFSET = 128 +DOM_OFFSET = 0 + +# definitions of the offset and width for values in XCVR info eeprom +XCVR_INTFACE_BULK_OFFSET = 0 +XCVR_INTFACE_BULK_WIDTH_QSFP = 20 +XCVR_INTFACE_BULK_WIDTH_SFP = 21 +XCVR_TYPE_OFFSET = 0 +XCVR_TYPE_WIDTH = 1 +XCVR_EXT_TYPE_OFFSET = 1 +XCVR_EXT_TYPE_WIDTH = 1 +XCVR_CONNECTOR_OFFSET = 2 +XCVR_CONNECTOR_WIDTH = 1 +XCVR_COMPLIANCE_CODE_OFFSET = 3 +XCVR_COMPLIANCE_CODE_WIDTH = 8 +XCVR_ENCODING_OFFSET = 11 +XCVR_ENCODING_WIDTH = 1 +XCVR_NBR_OFFSET = 12 +XCVR_NBR_WIDTH = 1 +XCVR_EXT_RATE_SEL_OFFSET = 13 +XCVR_EXT_RATE_SEL_WIDTH = 1 +XCVR_CABLE_LENGTH_OFFSET = 14 +XCVR_CABLE_LENGTH_WIDTH_QSFP = 5 +XCVR_CABLE_LENGTH_WIDTH_SFP = 6 +XCVR_VENDOR_NAME_OFFSET = 20 +XCVR_VENDOR_NAME_WIDTH = 16 +XCVR_VENDOR_OUI_OFFSET = 37 +XCVR_VENDOR_OUI_WIDTH = 3 +XCVR_VENDOR_PN_OFFSET = 40 +XCVR_VENDOR_PN_WIDTH = 16 +XCVR_HW_REV_OFFSET = 56 +XCVR_HW_REV_WIDTH_OSFP = 2 +XCVR_HW_REV_WIDTH_QSFP = 2 +XCVR_HW_REV_WIDTH_SFP = 4 +XCVR_VENDOR_SN_OFFSET = 68 +XCVR_VENDOR_SN_WIDTH = 16 +XCVR_VENDOR_DATE_OFFSET = 84 +XCVR_VENDOR_DATE_WIDTH = 8 +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 2 + +XCVR_INTERFACE_DATA_START = 0 +XCVR_INTERFACE_DATA_SIZE = 92 + +QSFP_DOM_BULK_DATA_START = 22 +QSFP_DOM_BULK_DATA_SIZE = 36 +SFP_DOM_BULK_DATA_START = 96 +SFP_DOM_BULK_DATA_SIZE = 10 + +# definitions of the offset for values in OSFP info eeprom +OSFP_TYPE_OFFSET = 0 +OSFP_VENDOR_NAME_OFFSET = 129 +OSFP_VENDOR_PN_OFFSET = 148 +OSFP_HW_REV_OFFSET = 164 +OSFP_VENDOR_SN_OFFSET = 166 + +# Offset for values in QSFP eeprom +QSFP_DOM_REV_OFFSET = 1 +QSFP_DOM_REV_WIDTH = 1 +QSFP_TEMPE_OFFSET = 22 +QSFP_TEMPE_WIDTH = 2 +QSFP_VOLT_OFFSET = 26 +QSFP_VOLT_WIDTH = 2 +QSFP_VERSION_COMPLIANCE_OFFSET = 1 +QSFP_VERSION_COMPLIANCE_WIDTH = 1 +QSFP_CHANNL_MON_OFFSET = 34 +QSFP_CHANNL_MON_WIDTH = 16 +QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH = 24 +QSFP_CHANNL_DISABLE_STATUS_OFFSET = 86 +QSFP_CHANNL_DISABLE_STATUS_WIDTH = 1 +QSFP_CHANNL_RX_LOS_STATUS_OFFSET = 3 +QSFP_CHANNL_RX_LOS_STATUS_WIDTH = 1 +QSFP_CHANNL_TX_FAULT_STATUS_OFFSET = 4 +QSFP_CHANNL_TX_FAULT_STATUS_WIDTH = 1 +QSFP_CONTROL_OFFSET = 86 +QSFP_CONTROL_WIDTH = 8 +QSFP_MODULE_MONITOR_OFFSET = 0 +QSFP_MODULE_MONITOR_WIDTH = 9 +QSFP_POWEROVERRIDE_OFFSET = 93 +QSFP_POWEROVERRIDE_WIDTH = 1 +QSFP_POWEROVERRIDE_BIT = 0 +QSFP_POWERSET_BIT = 1 +QSFP_OPTION_VALUE_OFFSET = 192 +QSFP_OPTION_VALUE_WIDTH = 4 + +SFP_TEMPE_OFFSET = 96 +SFP_TEMPE_WIDTH = 2 +SFP_VOLT_OFFSET = 98 +SFP_VOLT_WIDTH = 2 +SFP_CHANNL_MON_OFFSET = 100 +SFP_CHANNL_MON_WIDTH = 6 +SFP_CHANNL_STATUS_OFFSET = 110 +SFP_CHANNL_STATUS_WIDTH = 1 + +qsfp_cable_length_tup = ('Length(km)', 'Length OM3(2m)', + 'Length OM2(m)', 'Length OM1(m)', + 'Length Cable Assembly(m)') + +sfp_cable_length_tup = ('LengthSMFkm-UnitsOfKm', 'LengthSMF(UnitsOf100m)', + 'Length50um(UnitsOf10m)', 'Length62.5um(UnitsOfm)', + 'LengthCable(UnitsOfm)', 'LengthOM3(UnitsOf10m)') + +sfp_compliance_code_tup = ('10GEthernetComplianceCode', 'InfinibandComplianceCode', + 'ESCONComplianceCodes', 'SONETComplianceCodes', + 'EthernetComplianceCodes','FibreChannelLinkLength', + 'FibreChannelTechnology', 'SFP+CableTechnology', + 'FibreChannelTransmissionMedia','FibreChannelSpeed') + +qsfp_compliance_code_tup = ('10/40G Ethernet Compliance Code', 'SONET Compliance codes', + 'SAS/SATA compliance codes', 'Gigabit Ethernet Compliant codes', + 'Fibre Channel link length/Transmitter Technology', + 'Fibre Channel transmission media', 'Fibre Channel Speed') + +SFP_TYPE = "SFP" +QSFP_TYPE = "QSFP" +OSFP_TYPE = "OSFP" + + +class Sfp(SfpBase): + """Platform-specific Sfp class""" + + # Port number + PORT_START = 0 + PORT_END = 53 + + # Path to QSFP sysfs + PLATFORM_ROOT_PATH = "/usr/share/sonic/device" + PMON_HWSKU_PATH = "/usr/share/sonic/hwsku" + HOST_CHK_CMD = "docker > /dev/null 2>&1" + + PLATFORM = "x86_64-inventec_d7054q28b-r0" + HWSKU = "INVENTEC-D7054Q28B-S48-Q6" + + def __init__(self, sfp_index, sfp_type): + # Init index + self.index = sfp_index + self.port_num = self.index + self.dom_supported = False + self.sfp_type = sfp_type + self.__sfp_presence_attr = "/sys/class/swps/port{}/present".format(self.index) + self.__sfp_lpmode_attr = "/sys/class/swps/port{}/lpmod".format(self.index) + self.__sfp_reset_attr = "/sys/class/swps/port{}/reset".format(self.index) + # Init eeprom path + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + self.port_to_eeprom_mapping = {} + self.port_to_i2c_mapping = { + 0: 10, + 1: 11, + 2: 12, + 3: 13, + 4: 14, + 5: 15, + 6: 16, + 7: 17, + 8: 18, + 9: 19, + 10: 20, + 11: 21, + 12: 22, + 13: 23, + 14: 24, + 15: 25, + 16: 26, + 17: 27, + 18: 28, + 19: 29, + 20: 30, + 21: 31, + 22: 32, + 23: 33, + 24: 34, + 25: 35, + 26: 36, + 27: 37, + 28: 38, + 29: 39, + 30: 40, + 31: 41, + 32: 42, + 33: 43, + 34: 44, + 35: 45, + 36: 46, + 37: 47, + 38: 48, + 39: 49, + 40: 50, + 41: 51, + 42: 52, + 43: 53, + 44: 54, + 45: 55, + 46: 56, + 47: 57, + 48: 58, + 49: 59, + 50: 60, + 51: 61, + 52: 62, + 53: 63 + } + + for x in range(self.PORT_START, self.PORT_END + 1): + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + + self.info_dict_keys = ['type', 'hardwarerev', 'serialnum', 'manufacturename', 'modelname', 'Connector', 'encoding', 'ext_identifier', + 'ext_rateselect_compliance', 'cable_type', 'cable_length', 'nominal_bit_rate', 'specification_compliance', 'vendor_date', 'vendor_oui'] + + self.dom_dict_keys = ['rx_los', 'tx_fault', 'reset_status', 'power_lpmode', 'tx_disable', 'tx_disable_channel', 'temperature', 'voltage', + 'rx1power', 'rx2power', 'rx3power', 'rx4power', 'tx1bias', 'tx2bias', 'tx3bias', 'tx4bias', 'tx1power', 'tx2power', 'tx3power', 'tx4power'] + + self.threshold_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', 'rxpowerhighalarm', 'rxpowerhighwarning', + 'rxpowerlowalarm', 'rxpowerlowwarning', 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning'] + + SfpBase.__init__(self) + + def __get_attr_value(self, attr_path): + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def _convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + + def __read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return "" + + def __is_host(self): + return os.system(self.HOST_CHK_CMD) == 0 + + def __get_path_to_port_config_file(self): + platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.PLATFORM]) + hwsku_path = "/".join([platform_path, self.HWSKU] + ) if self.__is_host() else self.PMON_HWSKU_PATH + return "/".join([hwsku_path, "port_config.ini"]) + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + presence = False + attr_path = self.__sfp_presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 0): + presence = True + + return presence + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + sysfsfile_eeprom = None + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[self.port_num] + try: + sysfsfile_eeprom = open( + sysfs_sfp_i2c_client_eeprom_path, mode="rb", buffering=0) + sysfsfile_eeprom.seek(offset) + raw = sysfsfile_eeprom.read(num_bytes) + for n in range(0, num_bytes): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except: + pass + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + + return eeprom_raw + + def _dom_capability_detect(self): + if not self.get_presence(): + self.dom_supported = False + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + self.calibration = 0 + return + + if self.sfp_type == "QSFP": + self.calibration = 1 + sfpi_obj = sff8436InterfaceId() + if sfpi_obj is None: + self.dom_supported = False + offset = 128 + + # QSFP capability byte parse, through this byte can know whether it support tx_power or not. + # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, + # need to add more code for determining the capability and version compliance + # in SFF-8636 dom capability definitions evolving with the versions. + qsfp_dom_capability_raw = self.__read_eeprom_specific_bytes((offset + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) + if qsfp_dom_capability_raw is not None: + qsfp_version_compliance_raw = self.__read_eeprom_specific_bytes(QSFP_VERSION_COMPLIANCE_OFFSET, QSFP_VERSION_COMPLIANCE_OFFSET) + qsfp_version_compliance = int(qsfp_version_compliance_raw[0], 16) + qspf_dom_capability = int(qsfp_dom_capability_raw[0], 16) + if qsfp_version_compliance >= 0x08: + self.dom_temp_supported = (qspf_dom_capability & 0x20 != 0) + self.dom_volt_supported = (qspf_dom_capability & 0x10 != 0) + self.dom_rx_power_supported = (qspf_dom_capability & 0x08 != 0) + self.dom_tx_power_supported = (qspf_dom_capability & 0x04 != 0) + else: + self.dom_temp_supported = True + self.dom_volt_supported = True + self.dom_rx_power_supported = (qspf_dom_capability & 0x08 != 0) + self.dom_tx_power_supported = True + self.dom_supported = True + self.calibration = 1 + qsfp_option_value_raw = self.__read_eeprom_specific_bytes(QSFP_OPTION_VALUE_OFFSET, QSFP_OPTION_VALUE_WIDTH) + if qsfp_option_value_raw is not None: + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + self.optional_capability = sfpd_obj.parse_option_params(qsfp_option_value_raw, 0) + self.dom_tx_disable_supported = self.optional_capability['data']['TxDisable']['value'] == 'On' + else: + self.dom_supported = False + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + self.calibration = 0 + elif self.sfp_type == "SFP": + sfpi_obj = sff8472InterfaceId() + if sfpi_obj is None: + return None + sfp_dom_capability_raw = self.__read_eeprom_specific_bytes(XCVR_DOM_CAPABILITY_OFFSET, XCVR_DOM_CAPABILITY_WIDTH) + if sfp_dom_capability_raw is not None: + sfp_dom_capability = int(sfp_dom_capability_raw[0], 16) + self.dom_supported = (sfp_dom_capability & 0x40 != 0) + if self.dom_supported: + self.dom_temp_supported = True + self.dom_volt_supported = True + self.dom_rx_power_supported = True + self.dom_tx_power_supported = True + if sfp_dom_capability & 0x20 != 0: + self.calibration = 1 + elif sfp_dom_capability & 0x10 != 0: + self.calibration = 2 + else: + self.calibration = 0 + else: + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + self.calibration = 0 + self.dom_tx_disable_supported = (int(sfp_dom_capability_raw[1], 16) & 0x40 != 0) + else: + self.dom_supported = False + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + nominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + transceiver_info_dict = {} + compliance_code_dict = {} + + # ToDo: OSFP tranceiver info parsing not fully supported. + # in inf8628.py lack of some memory map definition + # will be implemented when the inf8628 memory map ready + if self.sfp_type == OSFP_TYPE: + offset = 0 + vendor_rev_width = XCVR_HW_REV_WIDTH_OSFP + + sfpi_obj = inf8628InterfaceId() + if sfpi_obj is None: + return None + + sfp_type_raw = self.__read_eeprom_specific_bytes((offset + OSFP_TYPE_OFFSET), XCVR_TYPE_WIDTH) + if sfp_type_raw is not None: + sfp_type_data = sfpi_obj.parse_sfp_type(sfp_type_raw, 0) + else: + return None + + sfp_vendor_name_raw = self.__read_eeprom_specific_bytes((offset + OSFP_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + if sfp_vendor_name_raw is not None: + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) + else: + return None + + sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes((offset + OSFP_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + if sfp_vendor_pn_raw is not None: + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) + else: + return None + + sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes((offset + OSFP_HW_REV_OFFSET), vendor_rev_width) + if sfp_vendor_rev_raw is not None: + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) + else: + return None + + sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes((offset + OSFP_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + if sfp_vendor_sn_raw is not None: + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) + else: + return None + + transceiver_info_dict['type'] = sfp_type_data['data']['type']['value'] + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] + transceiver_info_dict['vendor_oui'] = 'N/A' + transceiver_info_dict['vendor_date'] = 'N/A' + transceiver_info_dict['Connector'] = 'N/A' + transceiver_info_dict['encoding'] = 'N/A' + transceiver_info_dict['ext_identifier'] = 'N/A' + transceiver_info_dict['ext_rateselect_compliance'] = 'N/A' + transceiver_info_dict['cable_type'] = 'N/A' + transceiver_info_dict['cable_length'] = 'N/A' + transceiver_info_dict['specification_compliance'] = 'N/A' + transceiver_info_dict['nominal_bit_rate'] = 'N/A' + + else: + if self.sfp_type == QSFP_TYPE: + offset = 128 + vendor_rev_width = XCVR_HW_REV_WIDTH_QSFP + cable_length_width = XCVR_CABLE_LENGTH_WIDTH_QSFP + interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_QSFP + sfp_type = 'QSFP' + + sfpi_obj = sff8436InterfaceId() + if sfpi_obj is None: + print("Error: sfp_object open failed") + return None + + else: + offset = 0 + vendor_rev_width = XCVR_HW_REV_WIDTH_SFP + cable_length_width = XCVR_CABLE_LENGTH_WIDTH_SFP + interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_SFP + sfp_type = 'SFP' + + sfpi_obj = sff8472InterfaceId() + if sfpi_obj is None: + print("Error: sfp_object open failed") + return None + sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes(offset + XCVR_INTERFACE_DATA_START, XCVR_INTERFACE_DATA_SIZE) + if sfp_interface_bulk_raw is None: + return None + + start = XCVR_INTFACE_BULK_OFFSET - XCVR_INTERFACE_DATA_START + end = start + interface_info_bulk_width + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw[start : end], 0) + + start = XCVR_VENDOR_NAME_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_NAME_WIDTH + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_interface_bulk_raw[start : end], 0) + + start = XCVR_VENDOR_PN_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_PN_WIDTH + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_interface_bulk_raw[start : end], 0) + + start = XCVR_HW_REV_OFFSET - XCVR_INTERFACE_DATA_START + end = start + vendor_rev_width + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_interface_bulk_raw[start : end], 0) + + start = XCVR_VENDOR_SN_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_SN_WIDTH + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_interface_bulk_raw[start : end], 0) + + start = XCVR_VENDOR_OUI_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_OUI_WIDTH + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_interface_bulk_raw[start : end], 0) + + start = XCVR_VENDOR_DATE_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_DATE_WIDTH + sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_interface_bulk_raw[start : end], 0) + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + if self.sfp_type == QSFP_TYPE: + for key in qsfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + + for key in qsfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value']) + else: + for key in sfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + + for key in sfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['NominalSignallingRate(UnitsOf100Mbd)']['value']) + + return transceiver_info_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. + tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. + reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. + lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. + tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. + tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 + | |to channel 3. + temperature |INT |module temperature in Celsius + voltage |INT |supply voltage in mV + txbias |INT |TX Bias Current in mA, n is the channel number, + | |for example, tx2bias stands for tx bias of channel 2. + rxpower |INT |received optical power in mW, n is the channel number, + | |for example, rx2power stands for rx power of channel 2. + txpower |INT |TX output power in mW, n is the channel number, + | |for example, tx2power stands for tx power of channel 2. + ======================================================================== + """ + # check present status + sfpd_obj = sff8436Dom() + sfpi_obj = sff8436InterfaceId() + + if not self.get_presence() or not sfpi_obj or not sfpd_obj: + return {} + + transceiver_dom_info_dict = dict.fromkeys(self.dom_dict_keys, 'N/A') + offset = DOM_OFFSET + offset_xcvr = INFO_OFFSET + + # QSFP capability byte parse, through this byte can know whether it support tx_power or not. + # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, + # need to add more code for determining the capability and version compliance + # in SFF-8636 dom capability definitions evolving with the versions. + qsfp_dom_capability_raw = self.__read_eeprom_specific_bytes( + (offset_xcvr + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) + if qsfp_dom_capability_raw is not None: + qspf_dom_capability_data = sfpi_obj.parse_qsfp_dom_capability( + qsfp_dom_capability_raw, 0) + else: + return None + + dom_temperature_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature( + dom_temperature_raw, 0) + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + + dom_voltage_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + qsfp_dom_rev_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_DOM_REV_OFFSET), QSFP_DOM_REV_WIDTH) + if qsfp_dom_rev_raw is not None: + qsfp_dom_rev_data = sfpd_obj.parse_sfp_dom_rev(qsfp_dom_rev_raw, 0) + qsfp_dom_rev = qsfp_dom_rev_data['data']['dom_rev']['value'] + + # The tx_power monitoring is only available on QSFP which compliant with SFF-8636 + # and claimed that it support tx_power with one indicator bit. + dom_channel_monitor_data = {} + dom_channel_monitor_raw = None + qsfp_tx_power_support = qspf_dom_capability_data['data']['Tx_power_support']['value'] + if (qsfp_dom_rev[0:8] != 'SFF-8636' or (qsfp_dom_rev[0:8] == 'SFF-8636' and qsfp_tx_power_support != 'on')): + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params( + dom_channel_monitor_raw, 0) + + else: + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power( + dom_channel_monitor_raw, 0) + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TX1Power']['value'] + transceiver_dom_info_dict['tx2power'] = dom_channel_monitor_data['data']['TX2Power']['value'] + transceiver_dom_info_dict['tx3power'] = dom_channel_monitor_data['data']['TX3Power']['value'] + transceiver_dom_info_dict['tx4power'] = dom_channel_monitor_data['data']['TX4Power']['value'] + + if dom_channel_monitor_raw: + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RX1Power']['value'] + transceiver_dom_info_dict['rx2power'] = dom_channel_monitor_data['data']['RX2Power']['value'] + transceiver_dom_info_dict['rx3power'] = dom_channel_monitor_data['data']['RX3Power']['value'] + transceiver_dom_info_dict['rx4power'] = dom_channel_monitor_data['data']['RX4Power']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value'] + transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value'] + transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value'] + transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value'] + + for key in transceiver_dom_info_dict: + transceiver_dom_info_dict[key] = self._convert_string_to_num( + transceiver_dom_info_dict[key]) + + transceiver_dom_info_dict['rx_los'] = self.get_rx_los() + transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() + transceiver_dom_info_dict['reset_status'] = self.get_reset_status() + transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() + + return transceiver_dom_info_dict + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + Returns: + A Boolean, True if reset enabled, False if disabled + """ + if not self.dom_supported: + return False + + if self.sfp_type == OSFP_TYPE: + return False + elif self.sfp_type == QSFP_TYPE: + offset = 0 + sfpd_obj = sff8436Dom() + dom_module_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_MODULE_MONITOR_OFFSET), QSFP_MODULE_MONITOR_WIDTH) + + if dom_module_monitor_raw is not None: + return True + else: + return False + elif self.sfp_type == SFP_TYPE: + offset = 0 + sfpd_obj = sff8472Dom() + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) + + if dom_channel_monitor_raw is not None: + return True + else: + return False + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + if not self.dom_supported: + return None + + rx_los_list = [] + if self.sfp_type == OSFP_TYPE: + return None + elif self.sfp_type == QSFP_TYPE: + offset = 0 + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_RX_LOS_STATUS_OFFSET), QSFP_CHANNL_RX_LOS_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + rx_los_data = int(dom_channel_monitor_raw[0], 16) + rx_los_list.append(rx_los_data & 0x01 != 0) + rx_los_list.append(rx_los_data & 0x02 != 0) + rx_los_list.append(rx_los_data & 0x04 != 0) + rx_los_list.append(rx_los_data & 0x08 != 0) + else: + offset = 256 + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + rx_los_data = int(dom_channel_monitor_raw[0], 16) + rx_los_list.append(rx_los_data & 0x02 != 0) + else: + return None + return rx_los_list + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + if not self.dom_supported: + return None + + tx_fault_list = [] + if self.sfp_type == OSFP_TYPE: + return None + elif self.sfp_type == QSFP_TYPE: + offset = 0 + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_TX_FAULT_STATUS_OFFSET), QSFP_CHANNL_TX_FAULT_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + tx_fault_data = int(dom_channel_monitor_raw[0], 16) + tx_fault_list.append(tx_fault_data & 0x01 != 0) + tx_fault_list.append(tx_fault_data & 0x02 != 0) + tx_fault_list.append(tx_fault_data & 0x04 != 0) + tx_fault_list.append(tx_fault_data & 0x08 != 0) + else: + offset = 256 + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + tx_fault_data = int(dom_channel_monitor_raw[0], 16) + tx_fault_list.append(tx_fault_data & 0x04 != 0) + else: + return None + return tx_fault_list + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + """ + if not self.dom_supported: + return None + + tx_disable_list = [] + if self.sfp_type == OSFP_TYPE: + return None + elif self.sfp_type == QSFP_TYPE: + offset = 0 + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_DISABLE_STATUS_OFFSET), QSFP_CHANNL_DISABLE_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + tx_disable_data = int(dom_channel_monitor_raw[0], 16) + tx_disable_list.append(tx_disable_data & 0x01 != 0) + tx_disable_list.append(tx_disable_data & 0x02 != 0) + tx_disable_list.append(tx_disable_data & 0x04 != 0) + tx_disable_list.append(tx_disable_data & 0x08 != 0) + else: + offset = 256 + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + tx_disable_data = int(dom_channel_monitor_raw[0], 16) + tx_disable_list.append(tx_disable_data & 0xC0 != 0) + else: + return None + return tx_disable_list + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + tx_disable_list = self.get_tx_disable() + if tx_disable_list is None: + return 0 + tx_disabled = 0 + for i in range(len(tx_disable_list)): + if tx_disable_list[i]: + tx_disabled |= 1 << i + return tx_disabled + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + lpmode = False + attr_path = self.__sfp_lpmode_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 0): + lpmode = True + + return lpmode + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + if self.sfp_type == QSFP_TYPE: + offset = 0 + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return False + + dom_control_raw = self._read_eeprom_specific_bytes((offset + QSFP_CONTROL_OFFSET), QSFP_CONTROL_WIDTH) + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + return ('On' == dom_control_data['data']['PowerOverride']) + else: + return NotImplementedError + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + Returns: + An integer number of current temperature in Celsius + """ + if not self.dom_supported: + return None + if self.sfp_type == QSFP_TYPE: + offset = 0 + offset_xcvr = 128 + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + + if self.dom_temp_supported: + dom_temperature_raw = self._read_eeprom_specific_bytes((offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value']) + return temp + else: + return None + else: + offset = 256 + sfpd_obj = sff8472Dom() + if sfpd_obj is None: + return None + sfpd_obj._calibration_type = 1 + + dom_temperature_raw = self._read_eeprom_specific_bytes((offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value']) + return temp + else: + return None + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + Returns: + An integer number of supply voltage in mV + """ + if not self.dom_supported: + return None + if self.sfp_type == QSFP_TYPE: + offset = 0 + offset_xcvr = 128 + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + + if self.dom_volt_supported: + dom_voltage_raw = self._read_eeprom_specific_bytes((offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + voltage = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value']) + return voltage + else: + return None + else: + offset = 256 + + sfpd_obj = sff8472Dom() + if sfpd_obj is None: + return None + + sfpd_obj._calibration_type = self.calibration + + dom_voltage_raw = self._read_eeprom_specific_bytes((offset + SFP_VOLT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + voltage = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value']) + return voltage + else: + return None + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + tx_bias_list = [] + if self.sfp_type == QSFP_TYPE: + offset = 0 + offset_xcvr = 128 + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0) + tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX1Bias']['value'])) + tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX2Bias']['value'])) + tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX3Bias']['value'])) + tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX4Bias']['value'])) + else: + offset = 256 + + sfpd_obj = sff8472Dom() + if sfpd_obj is None: + return None + sfpd_obj._calibration_type = self.calibration + + if self.dom_supported: + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TXBias']['value'])) + else: + return None + else: + return None + + return tx_bias_list + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + rx_power_list = [] + if self.sfp_type == OSFP_TYPE: + # OSFP not supported on our platform yet. + return None + + elif self.sfp_type == QSFP_TYPE: + offset = 0 + offset_xcvr = 128 + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + + if self.dom_rx_power_supported: + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0) + rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX1Power']['value'])) + rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX2Power']['value'])) + rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX3Power']['value'])) + rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX4Power']['value'])) + else: + return None + else: + return None + else: + offset = 256 + + sfpd_obj = sff8472Dom() + if sfpd_obj is None: + return None + + if self.dom_supported: + sfpd_obj._calibration_type = self.calibration + + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RXPower']['value'])) + else: + return None + else: + return None + + return rx_power_list + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + tx_power_list = [] + if self.sfp_type == OSFP_TYPE: + # OSFP not supported on our platform yet. + return None + + elif self.sfp_type == QSFP_TYPE: + offset = 0 + offset_xcvr = 128 + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + + if self.dom_tx_power_supported: + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0) + tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX1Power']['value'])) + tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX2Power']['value'])) + tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX3Power']['value'])) + tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX4Power']['value'])) + else: + return None + else: + return None + else: + offset = 256 + sfpd_obj = sff8472Dom() + if sfpd_obj is None: + return None + + if self.dom_supported: + sfpd_obj._calibration_type = self.calibration + + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TXPower']['value'])) + else: + return None + else: + return None + return tx_power_list + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + Returns: + A boolean, True if successful, False if not + """ + try: + reg_file = open(self.__sfp_reset_attr, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 seconds to allow it to settle + time.sleep(2) + + # Flip the value back write back to the register to take port out of reset + try: + reg_file = open(self.__sfp_reset_attr, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + if self.sfp_type == SFP_TYPE: + if self.dom_tx_disable_supported: + handle = self._open_sdk() + if handle is None: + return False + + tx_disable_mask = 1 << MCIA_ADDR_TX_DISABLE_BIT + if tx_disable: + tx_disable_bit = tx_disable_mask + else: + tx_disable_bit = 0 + + return self._write_i2c_via_mcia(2, 0x51, MCIA_ADDR_TX_DISABLE, tx_disable_bit, tx_disable_mask) + else: + return False + elif self.sfp_type == QSFP_TYPE: + if self.dom_tx_disable_supported: + channel_mask = 0x0f + if tx_disable: + disable_flag = channel_mask + else: + disable_flag = 0 + + return self._write_i2c_via_mcia(0, 0x50, MCIA_ADDR_TX_CHANNEL_DISABLE, disable_flag, channel_mask) + else: + return False + else: + return NotImplementedError + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + Returns: + A boolean, True if successful, False if not + """ + sysfsfile_eeprom = None + try: + channel_state = self.get_tx_disable_channel() + tx_enable_mask = [0xe, 0xd, 0xb, 0x7] + tx_disable_mask = [0x1, 0x3, 0x7, 0xf] + tx_disable_ctl = channel_state | tx_disable_mask[ + channel] if disable else channel_state & tx_enable_mask[channel] + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom = open( + self.port_to_eeprom_mapping[self.port_num], "r+b") + sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + return True + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + try: + power_override_bit = 0 + if power_override: + power_override_bit |= 1 << 0 + + power_set_bit = 0 + if power_set: + power_set_bit |= 1 << 1 + + buffer = create_string_buffer(1) + buffer[0] = chr(power_override_bit | power_set_bit) + # Write to eeprom + sysfsfile_eeprom = open( + self.port_to_eeprom_mapping[self.port_num], "r+b") + sysfsfile_eeprom.seek(QSFP_POWEROVERRIDE_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings( + self.__get_path_to_port_config_file()) + #print "self.index{}".format(self.index) + name = sfputil_helper.logical[self.index] or "Unknown" + return name + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/thermal.py new file mode 100644 index 00000000000..03906742832 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/sonic_platform/thermal.py @@ -0,0 +1,100 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Thermal information +# +############################################################################# + +import os + +try: + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +THERMAL_PATH = "/sys/bus/i2c/devices/0-0066/" + +thermal_name_tup = ( + "FrontSide Temperature", + "FanBoard Temperature", + "NearASIC Temperature", + "Center(U10) Temperature", + "CPU Board Temperature", + "ASIC Temperature" +) + +class Thermal(ThermalBase): + """Platform-specific Thermal class""" + + def __init__(self, thermal_index): + self.index = thermal_index-1 + self.thermal_tmp = "temp{}_input".format(self.index) + + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return thermal_name_tup[self.index] + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + attr_path = THERMAL_PATH + self.thermal_tmp + return os.path.isfile(attr_path) + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + status = False + if (self.get_temperature() > 0): + status = True + + return status + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + temperature = 0.0 + attr_path = THERMAL_PATH + self.thermal_tmp + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + temperature = float(attr_rv) / 1000 + + return temperature + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/utils/inventec_d7054_util.py b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/utils/inventec_d7054_util.py new file mode 100755 index 00000000000..246893ba05b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7054q28b/utils/inventec_d7054_util.py @@ -0,0 +1,235 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Inventec, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install() + elif arg == 'clean': + uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[D7032]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +"with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +instantiate =[ +#'echo pca9548 0x71> /sys/bus/i2c/devices/i2c-0/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-2/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-3/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-4/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-5/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-6/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-7/new_device', +#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-0/i2c-8/new_device', +'echo inv_eeprom 0x53 > /sys/bus/i2c/devices/i2c-0/new_device'] +#'echo inv_psoc 0x66> /sys/bus/i2c/devices/i2c-0/new_device', +#'echo inv_cpld 0x55> /sys/bus/i2c/devices/i2c-0/new_device'] + +drivers =[ +'lpc_ich', +'i2c-i801', +'i2c-mux', +'i2c-mux-pca954x', +'i2c-dev', +'inv_eeprom', +'inv_platform', +'inv_psoc', +'inv_cpld', +'inv_pthread', +'swps'] + + + +def system_install(): + global FORCE + + #install drivers + for i in range(0,len(drivers)): + status, output = exec_cmd("modprobe "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + + #instantiate devices + for i in range(0,len(instantiate)): + #time.sleep(1) + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(10,18): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-2/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(18,26): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-3/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(26,34): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-4/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(34,42): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-5/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(42,50): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-6/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(50,58): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-7/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(58,64): + status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-8/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + + +def system_ready(): + if not device_found(): + return False + return True + +def install(): + if not device_found(): + print "No device, installing...." + status = system_install() + if status: + if FORCE == 0: + return status + else: + print " D7054 devices detected...." + return + +def uninstall(): + global FORCE + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"*0072", 0) + ret2, log = exec_cmd("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/Makefile b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/Makefile new file mode 100755 index 00000000000..5d3ca32d827 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/Makefile @@ -0,0 +1,13 @@ +obj-m += i2c-mux-pca954x.o +obj-m += i2c-mux-pca9541.o +obj-m += inv_psu.o +obj-m += inv_tmp75.o +obj-m += inv_ucd90160.o +obj-m += inv_cpld.o +obj-m += inv_psoc.o +obj-m += inv_platform.o +obj-m += inv_eeprom.o +obj-m += inv_pthread.o +obj-m += swps.o +swps-objs := inv_swps.o inv_mux.o io_expander.o transceiver.o + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/i2c-mux-pca9541.c b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/i2c-mux-pca9541.c new file mode 100644 index 00000000000..68c44dbc533 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/i2c-mux-pca9541.c @@ -0,0 +1,573 @@ +/* + * I2C multiplexer driver for PCA9541 bus master selector + * + * Copyright (c) 2010 Ericsson AB. + * + * Author: Guenter Roeck + * + * Derived from: + * pca954x.c + * + * Copyright (c) 2008-2009 Rodolfo Giometti + * Copyright (c) 2008-2009 Eurotech S.p.A. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +/* + * The PCA9541 is a bus master selector. It supports two I2C masters connected + * to a single slave bus. + * + * Before each bus transaction, a master has to acquire bus ownership. After the + * transaction is complete, bus ownership has to be released. This fits well + * into the I2C multiplexer framework, which provides select and release + * functions for this purpose. For this reason, this driver is modeled as + * single-channel I2C bus multiplexer. + * + * This driver assumes that the two bus masters are controlled by two different + * hosts. If a single host controls both masters, platform code has to ensure + * that only one of the masters is instantiated at any given time. + */ + +#define PCA9541_CONTROL 0x01 +#define PCA9541_ISTAT 0x02 + +#define PCA9541_CTL_MYBUS (1 << 0) +#define PCA9541_CTL_NMYBUS (1 << 1) +#define PCA9541_CTL_BUSON (1 << 2) +#define PCA9541_CTL_NBUSON (1 << 3) +#define PCA9541_CTL_BUSINIT (1 << 4) +#define PCA9541_CTL_TESTON (1 << 6) +#define PCA9541_CTL_NTESTON (1 << 7) + +#define PCA9541_ISTAT_INTIN (1 << 0) +#define PCA9541_ISTAT_BUSINIT (1 << 1) +#define PCA9541_ISTAT_BUSOK (1 << 2) +#define PCA9541_ISTAT_BUSLOST (1 << 3) +#define PCA9541_ISTAT_MYTEST (1 << 6) +#define PCA9541_ISTAT_NMYTEST (1 << 7) + +#define PCA9641_ID 0x00 +#define PCA9641_ID_MAGIC 0x38 + +#define PCA9641_CONTROL 0x01 +#define PCA9641_STATUS 0x02 +#define PCA9641_TIME 0x03 + +#define PCA9641_CTL_LOCK_REQ BIT(0) +#define PCA9641_CTL_LOCK_GRANT BIT(1) +#define PCA9641_CTL_BUS_CONNECT BIT(2) +#define PCA9641_CTL_BUS_INIT BIT(3) +#define PCA9641_CTL_SMBUS_SWRST BIT(4) +#define PCA9641_CTL_IDLE_TIMER_DIS BIT(5) +#define PCA9641_CTL_SMBUS_DIS BIT(6) +#define PCA9641_CTL_PRIORITY BIT(7) + +#define PCA9641_STS_OTHER_LOCK BIT(0) +#define PCA9641_STS_BUS_INIT_FAIL BIT(1) +#define PCA9641_STS_BUS_HUNG BIT(2) +#define PCA9641_STS_MBOX_EMPTY BIT(3) +#define PCA9641_STS_MBOX_FULL BIT(4) +#define PCA9641_STS_TEST_INT BIT(5) +#define PCA9641_STS_SCL_IO BIT(6) +#define PCA9641_STS_SDA_IO BIT(7) + +#define PCA9641_RES_TIME 0x03 + + +#define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON) +#define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS) +#define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS) +#define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON) + +#define BUSOFF(x, y) (!((x) & PCA9641_CTL_LOCK_GRANT) && \ + !((y) & PCA9641_STS_OTHER_LOCK)) +#define other_lock(x) ((x) & PCA9641_STS_OTHER_LOCK) +#define lock_grant(x) ((x) & PCA9641_CTL_LOCK_GRANT) + +/* arbitration timeouts, in jiffies */ +#define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */ +#define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */ + +/* arbitration retry delays, in us */ +#define SELECT_DELAY_SHORT 50 +#define SELECT_DELAY_LONG 1000 + +struct pca9541 { + struct i2c_client *client; + unsigned long select_timeout; + unsigned long arb_timeout; +}; + +static const struct i2c_device_id pca9541_id[] = { + {"pca9541", 0}, + {"pca9641", 1}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, pca9541_id); + +#ifdef CONFIG_OF +static const struct of_device_id pca9541_of_match[] = { + { .compatible = "nxp,pca9541" }, + { .compatible = "nxp,pca9641" }, + {} +}; +#endif + +/* + * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer() + * as they will try to lock the adapter a second time. + */ +static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val) +{ + struct i2c_adapter *adap = client->adapter; + int ret; + + if (adap->algo->master_xfer) { + struct i2c_msg msg; + char buf[2]; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = 2; + buf[0] = command; + buf[1] = val; + msg.buf = buf; + ret = __i2c_transfer(adap, &msg, 1); + } else { + union i2c_smbus_data data; + + data.byte = val; + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_WRITE, + command, + I2C_SMBUS_BYTE_DATA, &data); + } + + return ret; +} + +/* + * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer() + * as they will try to lock adapter a second time. + */ +static int pca9541_reg_read(struct i2c_client *client, u8 command) +{ + struct i2c_adapter *adap = client->adapter; + int ret; + u8 val; + + if (adap->algo->master_xfer) { + struct i2c_msg msg[2] = { + { + .addr = client->addr, + .flags = 0, + .len = 1, + .buf = &command + }, + { + .addr = client->addr, + .flags = I2C_M_RD, + .len = 1, + .buf = &val + } + }; + ret = __i2c_transfer(adap, msg, 2); + if (ret == 2) + ret = val; + else if (ret >= 0) + ret = -EIO; + } else { + union i2c_smbus_data data; + + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_READ, + command, + I2C_SMBUS_BYTE_DATA, &data); + if (!ret) + ret = data.byte; + } + return ret; +} + +/* + * Arbitration management functions + */ + +/* Release bus. Also reset NTESTON and BUSINIT if it was set. */ +static void pca9541_release_bus(struct i2c_client *client) +{ + int reg; + + reg = pca9541_reg_read(client, PCA9541_CONTROL); + if (reg >= 0 && !busoff(reg) && mybus(reg)) + pca9541_reg_write(client, PCA9541_CONTROL, + (reg & PCA9541_CTL_NBUSON) >> 1); +} + +/* + * Arbitration is defined as a two-step process. A bus master can only activate + * the slave bus if it owns it; otherwise it has to request ownership first. + * This multi-step process ensures that access contention is resolved + * gracefully. + * + * Bus Ownership Other master Action + * state requested access + * ---------------------------------------------------- + * off - yes wait for arbitration timeout or + * for other master to drop request + * off no no take ownership + * off yes no turn on bus + * on yes - done + * on no - wait for arbitration timeout or + * for other master to release bus + * + * The main contention point occurs if the slave bus is off and both masters + * request ownership at the same time. In this case, one master will turn on + * the slave bus, believing that it owns it. The other master will request + * bus ownership. Result is that the bus is turned on, and master which did + * _not_ own the slave bus before ends up owning it. + */ + +/* Control commands per PCA9541 datasheet */ +static const u8 pca9541_control[16] = { + 4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1 +}; + +/* + * Channel arbitration + * + * Return values: + * <0: error + * 0 : bus not acquired + * 1 : bus acquired + */ +static int pca9541_arbitrate(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca9541 *data = i2c_mux_priv(muxc); + int reg; + + reg = pca9541_reg_read(client, PCA9541_CONTROL); + if (reg < 0) + return reg; + + if (busoff(reg)) { + int istat; + /* + * Bus is off. Request ownership or turn it on unless + * other master requested ownership. + */ + istat = pca9541_reg_read(client, PCA9541_ISTAT); + if (!(istat & PCA9541_ISTAT_NMYTEST) + || time_is_before_eq_jiffies(data->arb_timeout)) { + /* + * Other master did not request ownership, + * or arbitration timeout expired. Take the bus. + */ + pca9541_reg_write(client, + PCA9541_CONTROL, + pca9541_control[reg & 0x0f] + | PCA9541_CTL_NTESTON); + data->select_timeout = SELECT_DELAY_SHORT; + } else { + /* + * Other master requested ownership. + * Set extra long timeout to give it time to acquire it. + */ + data->select_timeout = SELECT_DELAY_LONG * 2; + } + } else if (mybus(reg)) { + /* + * Bus is on, and we own it. We are done with acquisition. + * Reset NTESTON and BUSINIT, then return success. + */ + if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT)) + pca9541_reg_write(client, + PCA9541_CONTROL, + reg & ~(PCA9541_CTL_NTESTON + | PCA9541_CTL_BUSINIT)); + return 1; + } else { + /* + * Other master owns the bus. + * If arbitration timeout has expired, force ownership. + * Otherwise request it. + */ + data->select_timeout = SELECT_DELAY_LONG; + if (time_is_before_eq_jiffies(data->arb_timeout)) { + /* Time is up, take the bus and reset it. */ + pca9541_reg_write(client, + PCA9541_CONTROL, + pca9541_control[reg & 0x0f] + | PCA9541_CTL_BUSINIT + | PCA9541_CTL_NTESTON); + } else { + /* Request bus ownership if needed */ + if (!(reg & PCA9541_CTL_NTESTON)) + pca9541_reg_write(client, + PCA9541_CONTROL, + reg | PCA9541_CTL_NTESTON); + } + } + return 0; +} + +static int pca9541_select_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca9541 *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + int ret; + unsigned long timeout = jiffies + ARB2_TIMEOUT; + /* give up after this time */ + + data->arb_timeout = jiffies + ARB_TIMEOUT; + /* force bus ownership after this time */ + + do { + ret = pca9541_arbitrate(client); + if (ret) + return ret < 0 ? ret : 0; + + if (data->select_timeout == SELECT_DELAY_SHORT) + udelay(data->select_timeout); + else + msleep(data->select_timeout / 1000); + } while (time_is_after_eq_jiffies(timeout)); + + return -ETIMEDOUT; +} + +static int pca9541_release_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca9541 *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + + pca9541_release_bus(client); + return 0; +} + +/* + * Arbitration management functions + */ +static void pca9641_release_bus(struct i2c_client *client) +{ + pca9541_reg_write(client, PCA9641_CONTROL, 0); +} + +/* + * Channel arbitration + * + * Return values: + * <0: error + * 0 : bus not acquired + * 1 : bus acquired + */ +static int pca9641_arbitrate(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca9541 *data = i2c_mux_priv(muxc); + int reg_ctl, reg_sts; + + reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL); + if (reg_ctl < 0) + return reg_ctl; + reg_sts = pca9541_reg_read(client, PCA9641_STATUS); + + if (BUSOFF(reg_ctl, reg_sts)) { + /* + * Bus is off. Request ownership or turn it on unless + * other master requested ownership. + */ + reg_ctl |= PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL); + + if (lock_grant(reg_ctl)) { + /* + * Other master did not request ownership, + * or arbitration timeout expired. Take the bus. + */ + reg_ctl |= PCA9641_CTL_BUS_CONNECT + | PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + data->select_timeout = SELECT_DELAY_SHORT; + + return 1; + } else { + /* + * Other master requested ownership. + * Set extra long timeout to give it time to acquire it. + */ + data->select_timeout = SELECT_DELAY_LONG * 2; + } + } else if (lock_grant(reg_ctl)) { + /* + * Bus is on, and we own it. We are done with acquisition. + */ + reg_ctl |= PCA9641_CTL_BUS_CONNECT | PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + + return 1; + } else if (other_lock(reg_sts)) { + /* + * Other master owns the bus. + * If arbitration timeout has expired, force ownership. + * Otherwise request it. + */ + data->select_timeout = SELECT_DELAY_LONG; + reg_ctl |= PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + } + return 0; +} + +static int pca9641_select_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca9541 *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + int ret; + unsigned long timeout = jiffies + ARB2_TIMEOUT; + /* give up after this time */ + + data->arb_timeout = jiffies + ARB_TIMEOUT; + /* force bus ownership after this time */ + + do { + ret = pca9641_arbitrate(client); + if (ret) + return ret < 0 ? ret : 0; + + if (data->select_timeout == SELECT_DELAY_SHORT) + udelay(data->select_timeout); + else + msleep(data->select_timeout / 1000); + } while (time_is_after_eq_jiffies(timeout)); + + return -ETIMEDOUT; +} + +static int pca9641_release_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca9541 *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + + pca9641_release_bus(client); + return 0; +} + +static int pca9641_detect_id(struct i2c_client *client) +{ + int reg; + + reg = pca9541_reg_read(client, PCA9641_ID); + if (reg == PCA9641_ID_MAGIC) + return 1; + else + return 0; +} + +/* + * I2C init/probing/exit functions + */ +static int pca9541_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = client->adapter; + struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev); + struct i2c_mux_core *muxc; + struct pca9541 *data; + int force; + int ret; + int detect_id; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA)) + return -ENODEV; + + detect_id = pca9641_detect_id(client); + /* + * I2C accesses are unprotected here. + * We have to lock the adapter before releasing the bus. + */ + if (detect_id == 0) { + i2c_lock_adapter(adap); + pca9541_release_bus(client); + i2c_unlock_adapter(adap); + } else { + i2c_lock_adapter(adap); + pca9641_release_bus(client); + i2c_unlock_adapter(adap); + } + + /* Create mux adapter */ + + force = 0; + if (pdata) + force = pdata->modes[0].adap_id; + if (detect_id == 0) { + muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data), + I2C_MUX_ARBITRATOR, + pca9541_select_chan, pca9541_release_chan); + } else { + muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data), + I2C_MUX_ARBITRATOR, + pca9641_select_chan, pca9641_release_chan); + } + if (!muxc) + return -ENOMEM; + + data = i2c_mux_priv(muxc); + data->client = client; + + i2c_set_clientdata(client, muxc); + + ret = i2c_mux_add_adapter(muxc, force, 0, 0); + if (ret) { + dev_err(&client->dev, "failed to register master selector\n"); + return ret; + } + + dev_info(&client->dev, "registered master selector for I2C %s\n", + client->name); + + return 0; +} + +static int pca9541_remove(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + + i2c_mux_del_adapters(muxc); + return 0; +} + +static struct i2c_driver pca9541_driver = { + .driver = { + .name = "pca9541", + .of_match_table = of_match_ptr(pca9541_of_match), + }, + .probe = pca9541_probe, + .remove = pca9541_remove, + .id_table = pca9541_id, +}; + +module_i2c_driver(pca9541_driver); + +MODULE_AUTHOR("Guenter Roeck "); +MODULE_DESCRIPTION("PCA9541 I2C master selector driver"); +MODULE_LICENSE("GPL v2"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/i2c-mux-pca954x.c b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/i2c-mux-pca954x.c new file mode 100644 index 00000000000..49490dfde70 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/i2c-mux-pca954x.c @@ -0,0 +1,342 @@ +/* + * I2C multiplexer + * + * Copyright (c) 2008-2009 Rodolfo Giometti + * Copyright (c) 2008-2009 Eurotech S.p.A. + * + * This module supports the PCA954x series of I2C multiplexer/switch chips + * made by Philips Semiconductors. + * This includes the: + * PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547 + * and PCA9548. + * + * These chips are all controlled via the I2C bus itself, and all have a + * single 8-bit register. The upstream "parent" bus fans out to two, + * four, or eight downstream busses or channels; which of these + * are selected is determined by the chip type and register contents. A + * mux can select only one sub-bus at a time; a switch can select any + * combination simultaneously. + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PCA954X_MAX_NCHANS 8 + +enum pca_type { + pca_9540, + pca_9542, + pca_9543, + pca_9544, + pca_9545, + pca_9546, + pca_9547, + pca_9548, +}; + +struct chip_desc { + u8 nchans; + u8 enable; /* used for muxes only */ + enum muxtype { + pca954x_ismux = 0, + pca954x_isswi + } muxtype; +}; + +struct pca954x { + const struct chip_desc *chip; + + u8 last_chan; /* last register value */ + u8 deselect; + struct i2c_client *client; +}; + +/* Provide specs for the PCA954x types we know about */ +static const struct chip_desc chips[] = { + [pca_9540] = { + .nchans = 2, + .enable = 0x4, + .muxtype = pca954x_ismux, + }, + [pca_9543] = { + .nchans = 2, + .muxtype = pca954x_isswi, + }, + [pca_9544] = { + .nchans = 4, + .enable = 0x4, + .muxtype = pca954x_ismux, + }, + [pca_9545] = { + .nchans = 4, + .muxtype = pca954x_isswi, + }, + [pca_9547] = { + .nchans = 8, + .enable = 0x8, + .muxtype = pca954x_ismux, + }, + [pca_9548] = { + .nchans = 8, + .muxtype = pca954x_isswi, + }, +}; + +static const struct i2c_device_id pca954x_id[] = { + { "pca9540", pca_9540 }, + { "pca9542", pca_9540 }, + { "pca9543", pca_9543 }, + { "pca9544", pca_9544 }, + { "pca9545", pca_9545 }, + { "pca9546", pca_9545 }, + { "pca9547", pca_9547 }, + { "pca9548", pca_9548 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, pca954x_id); + +/* Force deselect-on-exit feature for PCA954X devices. Default is disabled. */ +static unsigned int force_deselect_on_exit = 0; +module_param(force_deselect_on_exit, uint, S_IRUGO); +MODULE_PARM_DESC(force_deselect_on_exit, "Force deselect-on-exit feature for PCA954X devices. Default is disabled."); + +#ifdef CONFIG_OF +static const struct of_device_id pca954x_of_match[] = { + { .compatible = "nxp,pca9540", .data = &chips[pca_9540] }, + { .compatible = "nxp,pca9542", .data = &chips[pca_9542] }, + { .compatible = "nxp,pca9543", .data = &chips[pca_9543] }, + { .compatible = "nxp,pca9544", .data = &chips[pca_9544] }, + { .compatible = "nxp,pca9545", .data = &chips[pca_9545] }, + { .compatible = "nxp,pca9546", .data = &chips[pca_9546] }, + { .compatible = "nxp,pca9547", .data = &chips[pca_9547] }, + { .compatible = "nxp,pca9548", .data = &chips[pca_9548] }, + {} +}; +#endif + +/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() + for this as they will try to lock adapter a second time */ +static int pca954x_reg_write(struct i2c_adapter *adap, + struct i2c_client *client, u8 val) +{ + int ret = -ENODEV; + + if (adap->algo->master_xfer) { + struct i2c_msg msg; + char buf[1]; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = 1; + buf[0] = val; + msg.buf = buf; + ret = __i2c_transfer(adap, &msg, 1); + + if (ret >= 0 && ret != 1) + ret = -EREMOTEIO; + } else { + union i2c_smbus_data data; + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_WRITE, + val, I2C_SMBUS_BYTE, &data); + } + + return ret; +} + +static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca954x *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + const struct chip_desc *chip = data->chip; + u8 regval; + int ret = 0; + + /* we make switches look like muxes, not sure how to be smarter */ + if (chip->muxtype == pca954x_ismux) + regval = chan | chip->enable; + else + regval = 1 << chan; + + /* Only select the channel if its different from the last channel */ + if (data->last_chan != regval) { + ret = pca954x_reg_write(muxc->parent, client, regval); + data->last_chan = ret < 0 ? 0 : regval; + } + + return ret; +} + +static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca954x *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + + if (!(data->deselect & (1 << chan))) + return 0; + + /* Deselect active channel */ + data->last_chan = 0; + return pca954x_reg_write(muxc->parent, client, data->last_chan); +} + +/* + * I2C init/probing/exit functions + */ +static int pca954x_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev); + struct device_node *of_node = client->dev.of_node; + bool idle_disconnect_dt; + struct gpio_desc *gpio; + int num, force, class; + struct i2c_mux_core *muxc; + struct pca954x *data; + const struct of_device_id *match; + int ret; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + return -ENODEV; + + muxc = i2c_mux_alloc(adap, &client->dev, + PCA954X_MAX_NCHANS, sizeof(*data), 0, + pca954x_select_chan, pca954x_deselect_mux); + if (!muxc) + return -ENOMEM; + data = i2c_mux_priv(muxc); + + i2c_set_clientdata(client, muxc); + data->client = client; + + /* Get the mux out of reset if a reset GPIO is specified. */ + gpio = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_LOW); + if (IS_ERR(gpio)) + return PTR_ERR(gpio); + + /* Write the mux register at addr to verify + * that the mux is in fact present. This also + * initializes the mux to disconnected state. + */ +// if (i2c_smbus_write_byte(client, 0) < 0) { +// dev_warn(&client->dev, "probe failed\n"); +// return -ENODEV; +// } + + match = of_match_device(of_match_ptr(pca954x_of_match), &client->dev); + if (match) + data->chip = of_device_get_match_data(&client->dev); + else + data->chip = &chips[id->driver_data]; + + data->last_chan = 0; /* force the first selection */ + + idle_disconnect_dt = of_node && + of_property_read_bool(of_node, "i2c-mux-idle-disconnect"); + + /* Now create an adapter for each channel */ + for (num = 0; num < data->chip->nchans; num++) { + bool idle_disconnect_pd = false; + + force = 0; /* dynamic adap number */ + class = 0; /* no class by default */ + if (pdata) { + if (num < pdata->num_modes) { + /* force static number */ + force = pdata->modes[num].adap_id; + class = pdata->modes[num].class; + } else + /* discard unconfigured channels */ + break; + idle_disconnect_pd = pdata->modes[num].deselect_on_exit; + } + data->deselect |= (idle_disconnect_pd || + idle_disconnect_dt || force_deselect_on_exit) << num; + + ret = i2c_mux_add_adapter(muxc, force, num, class); + + if (ret) { + dev_err(&client->dev, + "failed to register multiplexed adapter" + " %d as bus %d\n", num, force); + goto virt_reg_failed; + } + } + + dev_info(&client->dev, + "registered %d multiplexed busses for I2C %s %s\n", + num, data->chip->muxtype == pca954x_ismux + ? "mux" : "switch", client->name); + + return 0; + +virt_reg_failed: + i2c_mux_del_adapters(muxc); + return ret; +} + +static int pca954x_remove(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + + i2c_mux_del_adapters(muxc); + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int pca954x_resume(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca954x *data = i2c_mux_priv(muxc); + + data->last_chan = 0; + return i2c_smbus_write_byte(client, 0); +} +#endif + +static SIMPLE_DEV_PM_OPS(pca954x_pm, NULL, pca954x_resume); + +static struct i2c_driver pca954x_driver = { + .driver = { + .name = "pca954x", + .pm = &pca954x_pm, + .of_match_table = of_match_ptr(pca954x_of_match), + }, + .probe = pca954x_probe, + .remove = pca954x_remove, + .id_table = pca954x_id, +}; + +module_i2c_driver(pca954x_driver); + +MODULE_AUTHOR("Rodolfo Giometti "); +MODULE_DESCRIPTION("PCA954x I2C mux/switch driver"); +MODULE_LICENSE("GPL v2"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_cpld.c b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_cpld.c new file mode 100644 index 00000000000..df43e48aca8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_cpld.c @@ -0,0 +1,760 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* definition */ +#define CPLD_INFO_OFFSET 0x00 +#define CPLD_BIOSCS_OFFSET 0x04 +#define CPLD_PSU_OFFSET 0x08 +#define CPLD_CTL_OFFSET 0x0C +#define CPLD_SYSSTATUSLED_OFFSET 0x0E +#define CPLD_SYSLED_OFFSET CPLD_SYSSTATUSLED_OFFSET +#define CPLD_FANLED_OFFSET CPLD_SYSSTATUSLED_OFFSET +#define CPLD_PSULED_OFFSET CPLD_SYSSTATUSLED_OFFSET +#define CPLD_BEACONLED_OFFSET CPLD_SYSSTATUSLED_OFFSET +#define CPLD2_ADDRESS 0x77 + +static u8 hasCPLD2 = 1; +static struct i2c_client *client2; + +/* Each client has this additional data */ +struct cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; + u8 diag; +}; + +/*-----------------------------------------------------------------------*/ +static ssize_t cpld_i2c_read (struct i2c_client *client, u8 * buf, u8 offset, + size_t count) +{ + int i; + s32 temp = 0; + + for (i = 0; i < count; i++) + { + temp = i2c_smbus_read_byte_data (client, offset + i); + if (temp < 0) + { +// printk("CPLD Read fail! Error Code: %d\n",temp); + return 0; + } + buf[i] = temp & 0xff; + } + return count; +} + +static ssize_t cpld_i2c_write (struct i2c_client *client, char *buf, + unsigned offset, size_t count) +{ + int i; + + for (i = 0; i < count; i++) + { + i2c_smbus_write_byte_data (client, offset + i, buf[i]); + } + return count; +} + +/*-----------------------IPMI API--------------------------------------*/ +#define MAX_IPMI_RECV_LENGTH 0xFF +#define IPMI_MAX_INTF 4 +#define NETFN_OEM 0x30 +#define CMD_GETDATA 0x31 +#define CMD_SETDATA 0x32 +#define IPMI_DIAGFLAG_OFFSET 0x00 + +struct ipmi_result { + char result[MAX_IPMI_RECV_LENGTH]; + int result_length; +}; + +DEFINE_MUTEX (ipmi_mutex); +DEFINE_MUTEX (ipmi2_mutex); +static struct ipmi_result ipmiresult; +static ipmi_user_t ipmi_mh_user = NULL; +static void msg_handler (struct ipmi_recv_msg *msg, void *handler_data); +static struct ipmi_user_hndl ipmi_hndlrs = {.ipmi_recv_hndl = msg_handler, }; + +static atomic_t dummy_count = ATOMIC_INIT (0); +static void dummy_smi_free (struct ipmi_smi_msg *msg) +{ + atomic_dec (&dummy_count); +} + +static void dummy_recv_free (struct ipmi_recv_msg *msg) +{ + atomic_dec (&dummy_count); +} + +static struct ipmi_smi_msg halt_smi_msg = { + .done = dummy_smi_free +}; + +static struct ipmi_recv_msg halt_recv_msg = { + .done = dummy_recv_free +}; + +static void msg_handler (struct ipmi_recv_msg *recv_msg, void *handler_data) +{ + struct ipmi_result *msg_result = recv_msg->user_msg_data; + + if (recv_msg->msg.data[0] == 0 && recv_msg->msg.data_len > 0) + { + msg_result->result_length = recv_msg->msg.data_len - 1; + memcpy (msg_result->result, &recv_msg->msg.data[1], + recv_msg->msg.data_len - 1); + } + ipmi_free_recv_msg (recv_msg); + mutex_unlock (&ipmi_mutex); + + return; +} + +int start_ipmi_command (char NetFn, char cmd, char *data, int data_length, + char *result, int *result_length) +{ + int rv = 0, i; + int timeout; + + //wait previous command finish at least 50msec + timeout = 50; + while ((mutex_is_locked (&ipmi_mutex) == 1 + || (mutex_is_locked (&ipmi2_mutex) == 1)) && (--timeout) > 0) + { + usleep_range (1000, 1010); + } + if (timeout == 0) + { + return -1; + } + mutex_lock (&ipmi_mutex); + mutex_lock (&ipmi2_mutex); + + if (ipmi_mh_user == NULL) + { + for (i = 0, rv = 1; i < IPMI_MAX_INTF && rv; i++) + { + rv = ipmi_create_user (i, &ipmi_hndlrs, NULL, &ipmi_mh_user); + } + } + + if (rv < 0) + { + mutex_unlock (&ipmi_mutex); + mutex_unlock (&ipmi2_mutex); + return rv; + } + else + { + struct ipmi_system_interface_addr addr; + struct kernel_ipmi_msg msg; + uint8_t msg_data[data_length]; + + memcpy (msg_data, data, data_length); + addr.addr_type = IPMI_SYSTEM_INTERFACE_ADDR_TYPE; + addr.channel = IPMI_BMC_CHANNEL; + addr.lun = 0; + + msg.netfn = NetFn; + msg.cmd = cmd; + msg.data = msg_data; + msg.data_len = data_length; + + rv = ipmi_request_supply_msgs (ipmi_mh_user, (struct ipmi_addr *)&addr, + 0, &msg, &ipmiresult, &halt_smi_msg, + &halt_recv_msg, 0); + if (rv) + { + mutex_unlock (&ipmi_mutex); + mutex_unlock (&ipmi2_mutex); + return -6; + } + + //skip command if 1sec no response from remote + timeout = 1000; + while (mutex_is_locked (&ipmi_mutex) == 1 && (--timeout) > 0) + { + usleep_range (1000, 1100); + } + if (timeout == 0) + { + mutex_unlock (&ipmi2_mutex); + return -1; + } + else + { + *result_length = ipmiresult.result_length; + memcpy (result, ipmiresult.result, *result_length); + mutex_unlock (&ipmi2_mutex); + return 0; + } + } + return 0; +} + +EXPORT_SYMBOL (start_ipmi_command); + +/*-----------------------------------------------------------------------*/ +/* sysfs attributes for hwmon */ +static ssize_t show_info (struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client (dev); + struct cpld_data *data = i2c_get_clientdata (client); + ssize_t len = 0; + + u8 byte[4] = { 0, 0, 0, 0 }; + + mutex_lock (&data->update_lock); + len = cpld_i2c_read (client, byte, CPLD_INFO_OFFSET, 4); + mutex_unlock (&data->update_lock); + if (len == 0) + return 0; + + sprintf (buf, "The CPLD release date is %02d/%02d/%d.\n", byte[2] & 0xf, (byte[3] & 0x1f), 2014 + (byte[2] >> 4)); /* mm/dd/yyyy */ + sprintf (buf, "%sThe PCB version is %X\n", buf, byte[0] & 0xf); + sprintf (buf, "%sThe CPLD version is %d.%d\n", buf, byte[1] >> 4, + byte[1] & 0xf); + + if (hasCPLD2) + { + mutex_lock (&data->update_lock); + cpld_i2c_read (client2, byte, CPLD_INFO_OFFSET, 4); + mutex_unlock (&data->update_lock); + + sprintf (buf, "%s\nThe CPLD2 release date is %02d/%02d/%d.\n", buf, byte[2] & 0xf, (byte[3] & 0x1f), 2014 + (byte[2] >> 4)); /* mm/dd/yyyy */ + sprintf (buf, "%sThe CPLD version is %d.%d\n", buf, byte[1] >> 4, + byte[1] & 0xf); + } + + return strlen (buf); +} + +static ssize_t show_diag (struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client (dev); + struct cpld_data *data = i2c_get_clientdata (client); + uint8_t ipmisend[] = { IPMI_DIAGFLAG_OFFSET, 1 }; + uint8_t result[MAX_IPMI_RECV_LENGTH]; + int result_len = 0; + start_ipmi_command (NETFN_OEM, CMD_GETDATA, ipmisend, 2, result, + &result_len); + data->diag = (result[0] & 0x80) != 0; + return sprintf (buf, "%d\n", data->diag); +} + +static ssize_t set_diag (struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client (dev); + struct cpld_data *data = i2c_get_clientdata (client); + uint8_t ipmisend[] = { IPMI_DIAGFLAG_OFFSET, 0x80 }; + uint8_t result[MAX_IPMI_RECV_LENGTH]; + int result_len = 0; + u8 diag = simple_strtol (buf, NULL, 10); + data->diag = diag ? 1 : 0; + if (data->diag == 0) + ipmisend[1] = 0x00; + + start_ipmi_command (NETFN_OEM, CMD_SETDATA, ipmisend, 2, result, + &result_len); + + return count; +} + +static char *bios_str[] = { + "BIOS1", //0 + "BIOS2", //1 +}; + +static ssize_t show_bios_cs (struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client (dev); + struct cpld_data *data = i2c_get_clientdata (client); + ssize_t len = 0; + u8 byte = 0; + + mutex_lock (&data->update_lock); + len = cpld_i2c_read (client, &byte, CPLD_BIOSCS_OFFSET, 1); + mutex_unlock (&data->update_lock); + if (len == 0) + return 0; + + byte &= 0x01; + + return sprintf (buf, "%d:%s\n", byte, bios_str[byte]); +} + +static ssize_t set_bios_cs (struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client (dev); + struct cpld_data *data = i2c_get_clientdata (client); + u8 byte = 0; + u8 temp = simple_strtol (buf, NULL, 10); + + mutex_lock (&data->update_lock); + cpld_i2c_read (client, &byte, CPLD_BIOSCS_OFFSET, 1); + if (temp) + byte |= 0x01; + else + byte &= ~(0x01); + cpld_i2c_write (client, &byte, CPLD_BIOSCS_OFFSET, 1); + mutex_unlock (&data->update_lock); + + return count; +} + +static char *sysled_str[] = { + "Off", //00 + "Green", //01 + "Red", //10 + "Green Blinking", //11 +}; + +static ssize_t show_sysled (struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct i2c_client *client = to_i2c_client (dev); + struct cpld_data *data = i2c_get_clientdata (client); + + u8 byte = 0; + int shift = 0; + + mutex_lock (&data->update_lock); + status = cpld_i2c_read (client, &byte, CPLD_SYSLED_OFFSET, 1); + mutex_unlock (&data->update_lock); + + byte >>= shift; + byte &= 0x3; + status = sprintf (buf, "%s\n", sysled_str[byte]); + + return strlen (buf); +} + +static ssize_t set_sysled (struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr (devattr); + struct i2c_client *client = to_i2c_client (dev); + struct cpld_data *data = i2c_get_clientdata (client); + + u8 byte = 0; + u8 temp = simple_strtol (buf, NULL, 16); + int shift = 0; + + mutex_lock (&data->update_lock); + cpld_i2c_read (client, &byte, CPLD_SYSLED_OFFSET, 1); + byte &= ~(0x3 << shift); + if (temp != 0) + byte |= (attr->index & 0x3) << shift; + cpld_i2c_write (client, &byte, CPLD_SYSLED_OFFSET, 1); + mutex_unlock (&data->update_lock); + + return count; +} + +static char *fanled_str[] = { + "Off", //00 + "Green", //01 + "Red", //10 + "Amber", //11 +}; + +static ssize_t show_fanled (struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct i2c_client *client = to_i2c_client (dev); + struct cpld_data *data = i2c_get_clientdata (client); + + u8 byte = 0; + int shift = 2; + + mutex_lock (&data->update_lock); + status = cpld_i2c_read (client, &byte, CPLD_FANLED_OFFSET, 1); + mutex_unlock (&data->update_lock); + + byte >>= shift; + byte &= 0x3; + status = sprintf (buf, "%s\n", fanled_str[byte]); + + return strlen (buf); +} + +static ssize_t set_fanled (struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr (devattr); + struct i2c_client *client = to_i2c_client (dev); + struct cpld_data *data = i2c_get_clientdata (client); + + u8 byte = 0; + u8 temp = simple_strtol (buf, NULL, 16); + int shift = 2; + + mutex_lock (&data->update_lock); + cpld_i2c_read (client, &byte, CPLD_FANLED_OFFSET, 1); + byte &= ~(0x3 << shift); + if (temp != 0) + byte |= (attr->index & 0x3) << shift; + cpld_i2c_write (client, &byte, CPLD_FANLED_OFFSET, 1); + mutex_unlock (&data->update_lock); + + return count; +} + +static char *psuled_str[] = { + "Off", //00 + "Green", //01 + "Red", //10 + "Amber", //11 +}; + +static ssize_t show_psuled (struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct i2c_client *client = to_i2c_client (dev); + struct cpld_data *data = i2c_get_clientdata (client); + + u8 byte = 0; + int shift = 4; + + mutex_lock (&data->update_lock); + status = cpld_i2c_read (client, &byte, CPLD_PSULED_OFFSET, 1); + mutex_unlock (&data->update_lock); + + byte >>= shift; + byte &= 0x3; + status = sprintf (buf, "%s\n", psuled_str[byte]); + + return strlen (buf); +} + +static ssize_t set_psuled (struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr (devattr); + struct i2c_client *client = to_i2c_client (dev); + struct cpld_data *data = i2c_get_clientdata (client); + + u8 byte = 0; + u8 temp = simple_strtol (buf, NULL, 16); + int shift = 4; + + mutex_lock (&data->update_lock); + cpld_i2c_read (client, &byte, CPLD_PSULED_OFFSET, 1); + byte &= ~(0x3 << shift); + if (temp != 0) + byte |= (attr->index & 0x3) << shift; + cpld_i2c_write (client, &byte, CPLD_PSULED_OFFSET, 1); + mutex_unlock (&data->update_lock); + + return count; +} + +static char *beaconled_str[] = { + "Off", //00 + "Blue", //01 + "N/A", //10 + "Blue Blinking", //11 +}; + +static ssize_t show_beaconled (struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct i2c_client *client = to_i2c_client (dev); + struct cpld_data *data = i2c_get_clientdata (client); + + u8 byte = 0; + int shift = 6; + + mutex_lock (&data->update_lock); + status = cpld_i2c_read (client, &byte, CPLD_BEACONLED_OFFSET, 1); + mutex_unlock (&data->update_lock); + + byte >>= shift; + byte &= 0x3; + status = sprintf (buf, "%s\n", beaconled_str[byte]); + + return strlen (buf); +} + +static ssize_t set_beaconled (struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr (devattr); + struct i2c_client *client = to_i2c_client (dev); + struct cpld_data *data = i2c_get_clientdata (client); + + u8 byte = 0; + u8 temp = simple_strtol (buf, NULL, 16); + int shift = 6; + + mutex_lock (&data->update_lock); + cpld_i2c_read (client, &byte, CPLD_BEACONLED_OFFSET, 1); + byte &= ~(0x3 << shift); + if (temp != 0) + byte |= (attr->index & 0x3) << shift; + cpld_i2c_write (client, &byte, CPLD_BEACONLED_OFFSET, 1); + mutex_unlock (&data->update_lock); + + return count; +} + +static char *psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "psu fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu (struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr (da); + struct i2c_client *client = to_i2c_client (dev); + struct cpld_data *data = i2c_get_clientdata (client); + ssize_t len = 0; + u8 byte = 0; + int shift = (attr->index == 0) ? 0 : 4; + + mutex_lock (&data->update_lock); + len = cpld_i2c_read (client, &byte, CPLD_PSU_OFFSET, 1); + mutex_unlock (&data->update_lock); + if (len == 0) + return 0; + + byte = (byte >> shift) & 0x7; + + return sprintf (buf, "%d:%s\n", byte, psu_str[byte]); +} + +static SENSOR_DEVICE_ATTR (info, S_IRUGO, show_info, 0, 0); +static SENSOR_DEVICE_ATTR (diag, S_IWUSR | S_IRUGO, show_diag, set_diag, 0); + +static SENSOR_DEVICE_ATTR (sys_grn_led, S_IWUSR | S_IRUGO, show_sysled, + set_sysled, 0x1); +static SENSOR_DEVICE_ATTR (sys_red_led, S_IWUSR | S_IRUGO, show_sysled, + set_sysled, 0x2); +static SENSOR_DEVICE_ATTR (sys_grn_blink_led, S_IWUSR | S_IRUGO, show_sysled, + set_sysled, 0x3); + +static SENSOR_DEVICE_ATTR (fan_grn_led, S_IWUSR | S_IRUGO, show_fanled, + set_fanled, 0x1); +static SENSOR_DEVICE_ATTR (fan_red_led, S_IWUSR | S_IRUGO, show_fanled, + set_fanled, 0x2); +static SENSOR_DEVICE_ATTR (fan_amber_led, S_IWUSR | S_IRUGO, show_fanled, + set_fanled, 0x3); + +static SENSOR_DEVICE_ATTR (psu_grn_led, S_IWUSR | S_IRUGO, show_psuled, + set_psuled, 0x1); +static SENSOR_DEVICE_ATTR (psu_red_led, S_IWUSR | S_IRUGO, show_psuled, + set_psuled, 0x2); +static SENSOR_DEVICE_ATTR (psu_amber_led, S_IWUSR | S_IRUGO, show_psuled, + set_psuled, 0x3); + +static SENSOR_DEVICE_ATTR (beacon_led, S_IWUSR | S_IRUGO, show_beaconled, + set_beaconled, 0x1); +static SENSOR_DEVICE_ATTR (beacon_blink_led, S_IWUSR | S_IRUGO, show_beaconled, + set_beaconled, 0x3); + +static SENSOR_DEVICE_ATTR (psu1, S_IRUGO, show_psu, 0, 0); +static SENSOR_DEVICE_ATTR (psu2, S_IRUGO, show_psu, 0, 1); + +static SENSOR_DEVICE_ATTR (bios_cs, S_IWUSR | S_IRUGO, show_bios_cs, + set_bios_cs, 0); + +static struct attribute *cpld_attributes[] = { + &sensor_dev_attr_info.dev_attr.attr, + &sensor_dev_attr_diag.dev_attr.attr, + + &sensor_dev_attr_sys_grn_led.dev_attr.attr, + &sensor_dev_attr_sys_red_led.dev_attr.attr, + &sensor_dev_attr_sys_grn_blink_led.dev_attr.attr, + + &sensor_dev_attr_fan_grn_led.dev_attr.attr, + &sensor_dev_attr_fan_red_led.dev_attr.attr, + &sensor_dev_attr_fan_amber_led.dev_attr.attr, + + &sensor_dev_attr_psu_grn_led.dev_attr.attr, + &sensor_dev_attr_psu_red_led.dev_attr.attr, + &sensor_dev_attr_psu_amber_led.dev_attr.attr, + + &sensor_dev_attr_beacon_led.dev_attr.attr, + &sensor_dev_attr_beacon_blink_led.dev_attr.attr, + + &sensor_dev_attr_psu1.dev_attr.attr, + &sensor_dev_attr_psu2.dev_attr.attr, + + &sensor_dev_attr_bios_cs.dev_attr.attr, + NULL +}; + +static const struct attribute_group cpld_group = { + .attrs = cpld_attributes, +}; + +/*-----------------------------------------------------------------------*/ +/* device probe and removal */ +static int +cpld_probe (struct i2c_client *client, const struct i2c_device_id *id) +{ + struct cpld_data *data; + int status; + u8 byte[5]; + + if (!i2c_check_functionality (client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc (sizeof (struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata (client, data); + mutex_init (&data->update_lock); + + /* Register sysfs hooks */ + status = sysfs_create_group (&client->dev.kobj, &cpld_group); + + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register (&client->dev); + if (IS_ERR (data->hwmon_dev)) + { + status = PTR_ERR (data->hwmon_dev); + goto exit_remove; + } + + //Check CPLD2 exist or not + client2 = i2c_new_dummy (client->adapter, CPLD2_ADDRESS); + if (!client2) + { + hasCPLD2 = 0; + client2 = client; + } + else + { + status = i2c_smbus_read_byte_data (client2, CPLD_INFO_OFFSET); + if (status < 0) + { + i2c_unregister_device (client2); + i2c_set_clientdata (client2, NULL); + hasCPLD2 = 0; + client2 = client; + } + } + + //Handle LED control by the driver + byte[0] = 0x01; + cpld_i2c_write (client, byte, CPLD_CTL_OFFSET, 1); + + dev_info (&client->dev, "%s: sensor '%s'\n", + dev_name (data->hwmon_dev), client->name); + + return 0; + + exit_remove: + sysfs_remove_group (&client->dev.kobj, &cpld_group); + exit_free: + i2c_set_clientdata (client, NULL); + kfree (data); + return status; +} + +static int cpld_remove (struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata (client); + + sysfs_remove_group (&client->dev.kobj, &cpld_group); + hwmon_device_unregister (data->hwmon_dev); + i2c_set_clientdata (client, NULL); + if (hasCPLD2) + { + i2c_unregister_device (client2); + i2c_set_clientdata (client2, NULL); + } + kfree (data); + return 0; +} + +static const struct i2c_device_id cpld_ids[] = { + {"inv_cpld", 0,}, + { /* LIST END */ } +}; + +MODULE_DEVICE_TABLE (i2c, cpld_ids); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_cpld_init (void) +{ + return i2c_add_driver (&cpld_driver); +} + +static void __exit inv_cpld_exit (void) +{ + i2c_del_driver (&cpld_driver); +} + +MODULE_AUTHOR ("jack.ting "); +MODULE_DESCRIPTION ("cpld driver"); +MODULE_LICENSE ("GPL"); + +module_init (inv_cpld_init); +module_exit (inv_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_eeprom.c b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_eeprom.c new file mode 100644 index 00000000000..3d13f3b0471 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_eeprom.c @@ -0,0 +1,181 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void inv_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } + +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t inv_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + inv_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute inv_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = inv_eeprom_read, +}; + +static int inv_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &inv_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int inv_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &inv_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id inv_eeprom_id[] = { + { "inv_eeprom", 0 }, + { } +}; + +static struct i2c_driver inv_eeprom_driver = { + .driver = { + .name = "inv_eeprom", + }, + .probe = inv_eeprom_probe, + .remove = inv_eeprom_remove, + .id_table = inv_eeprom_id, +}; + +module_i2c_driver(inv_eeprom_driver); + +MODULE_AUTHOR("Inventec"); +MODULE_DESCRIPTION("Inventec D7054 Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_mux.c b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_mux.c new file mode 100644 index 00000000000..d38e32f0f9b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_mux.c @@ -0,0 +1,588 @@ +#include +#include +#include +#include +#include +#include +#include "io_expander.h" +#include "inv_mux.h" + +/* For build single module using (Ex: ONL platform) */ +#include +//#include +//#include + +static struct mux_obj_s *mux_head_p = NULL; + +/* ========== MUX object functions ========== + */ +static int +_setup_i2c_value(struct mux_obj_s *self, int offset, int value){ + + return i2c_smbus_write_byte_data(self->i2c_client_p, offset, value); +} + + +static int +_setup_i2c_client(struct mux_obj_s *self, int chan_id, int addr){ + + struct i2c_adapter *adap = NULL; + char *emsg = "ERR"; + + adap = i2c_get_adapter(chan_id); + if (!adap){ + emsg = "can't get adapter"; + goto err_setup_i2c_client; + } + self->i2c_client_p = kzalloc(sizeof(*self->i2c_client_p), GFP_KERNEL); + if (!self->i2c_client_p){ + emsg = "can't kzalloc client"; + goto err_setup_i2c_client; + } + self->i2c_client_p->adapter = adap; + self->i2c_client_p->addr = addr; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, emsg); + return ERR_MUX_UNEXCPT; +} + + +int +_common_force_pull_gpio(int mem_addr, + int input, + int bit_offset){ + + unsigned int val = 0; + unsigned int targ = 0; + + /* Get current value */ + val = inl(mem_addr); + if (val == 0) { + SWPS_ERR("%s: inl:%d fail!\n", __func__, val); + return -1; + } + /* Count target value */ + switch (input) { + case 0: /* Pull Low */ + targ = (val & (~(1 << bit_offset))); + break; + case 1: /* Pull high */ + targ = (val | (1 << bit_offset)); + break; + default: + SWPS_ERR("%s: input state:%d incorrect!\n", + __func__, input); + return -1; + } + /* Setup gpio */ + outl(targ, mem_addr); + if (targ != inl(mem_addr)){ + SWPS_ERR("%s: outl:%d fail!\n", __func__, targ); + return -1; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + + +int +rangeley_force_pull_high(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +rangeley_force_pull_low(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +hedera_force_pull_high(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 1, 5); +} + + +int +hedera_force_pull_low(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 0, 5); +} + + +int +normal_gpio_pull_high(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 1); +} + + +int +normal_gpio_pull_low(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 0); +} + + +int +cpld_rst_all_4_pull_low(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto setlow_cpld_rst_all_4_c0_a77_70_74_rst_all; + + case MUX_RST_CPLD_COTTONWOOD: + goto setlow_cpld_rst_all_4_cott_lite; + + default: + break; + } + emsg = "Undefined case"; + goto err_cpld_rst_all_4_pull_low; + +setlow_cpld_rst_all_4_c0_a77_70_74_rst_all: + err = _setup_i2c_value(self, 0x70, 0x0); + if (err < 0) { + emsg = "setup 0x70 fail"; + goto err_cpld_rst_all_4_pull_low; + } + err = _setup_i2c_value(self, 0x74, 0x01); + if (err < 0) { + emsg = "setup 0x74 fail"; + goto err_cpld_rst_all_4_pull_low; + } + return 0; + +setlow_cpld_rst_all_4_cott_lite: + err = _setup_i2c_value(self, 0x29, 0x00); + if (err < 0) { + emsg = "setup 0x29 fail"; + goto err_cpld_rst_all_4_pull_low; + } + return 0; + +err_cpld_rst_all_4_pull_low: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +cpld_rst_all_4_pull_high(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto sethigh_cpld_rst_all_4_c0_a77_70_74_rst_all; + + case MUX_RST_CPLD_COTTONWOOD: + goto sethigh_cpld_rst_all_4_cott_lite; + + default: + break; + } + emsg = "Undefined case"; + goto err_cpld_rst_all_4_pull_high; + +sethigh_cpld_rst_all_4_c0_a77_70_74_rst_all: + err = _setup_i2c_value(self, 0x70, 0xfe); + if (err < 0) { + emsg = "setup 0x70 fail"; + goto err_cpld_rst_all_4_pull_high; + } + err = _setup_i2c_value(self, 0x74, 0x03); + if (err < 0) { + emsg = "setup 0x74 fail"; + goto err_cpld_rst_all_4_pull_high; + } + return 0; + +sethigh_cpld_rst_all_4_cott_lite: + err = _setup_i2c_value(self, 0x29, 0x01); + if (err < 0) { + emsg = "setup 0x29 fail"; + goto err_cpld_rst_all_4_pull_high; + } + return 0; + +err_cpld_rst_all_4_pull_high: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +pca9548_reset_mux_all(struct mux_obj_s *self){ + /* [Note] Power-on reset (PCA9548A-NXP) + * When power is applied to VDD, an internal Power-On Reset (POR) + * holds the PCA9548A in a reset condition until VDD has reached + * VPOR. At this point, the reset condition is released and the + * PCA9548A register and I2C-bus state machine are initialized to + * their default states (all zeroes) causing all the channels to + * be deselected. Thereafter, VDD must be lowered below 0.2 V for + * at least 5 us in order to reset the device. + */ + if (self->_pull_low(self) < 0) { + SWPS_ERR("%s: _pull_low fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS_PCA9548); + if (self->_pull_high(self) < 0) { + SWPS_ERR("%s: _pull_high fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS_PCA9548); + return 0; +} + + +int +cpld_reset_mux_all(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + case MUX_RST_CPLD_COTTONWOOD: + goto reset_cpld_rst_all_4_c0_a77_70_74_rst_all; + + default: + break; + } + emsg = "Undefined case"; + goto err_cpld_reset_mux_all; + +reset_cpld_rst_all_4_c0_a77_70_74_rst_all: + if (self->_pull_low(self) < 0) { + emsg = "_pull_low fail"; + goto err_cpld_reset_mux_all; + } + mdelay(MUX_RST_WAIT_MS_CPLD); + return 0; + +err_cpld_reset_mux_all: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +common_reset_mux_all(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +init_gpio_4_force(struct mux_obj_s *self){ + + if (self->_pull_high(self) < 0) { + SWPS_ERR("%s: setup default fail!\n", __func__); + return -1; + } + return 0; +} + + +int +init_gpio_4_normal(struct mux_obj_s *self){ + + int err = 0; + char *emsg = "ERR"; + + if (!gpio_is_valid(self->gpio_num)) { + emsg = "GPIO invalid"; + goto err_init_gpio_4_normal; + } + err = gpio_request(self->gpio_num, MUX_GPIO_LABEL); + if (err < 0) { + emsg = "gpio_request fail"; + goto err_init_gpio_4_normal; + } + err = self->_pull_high(self); + if (err < 0) { + emsg = "setup default fail"; + goto err_init_gpio_4_normal; + } + SWPS_DEBUG("%s: gpio_request:%d ok.\n", __func__, self->gpio_num); + return 0; + +err_init_gpio_4_normal: + SWPS_ERR("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return -1; +} + + +int +init_cpld_4_rst_all(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + int chan = ERR_MUX_UNEXCPT; + int addr = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto init_cpld_i2c_c0_a77_70_74_rst_all; + + case MUX_RST_CPLD_COTTONWOOD: + goto init_cpld_rst_all_4_cott_lite; + + default: + break; + } + emsg = "Undefined case"; + goto err_init_cpld_4_rst_all; + +init_cpld_i2c_c0_a77_70_74_rst_all: + chan = 0; + addr = 0x77; + err = _setup_i2c_client(self, chan, addr); + if (err < 0) { + emsg = "_setup_i2c_client fail"; + goto err_init_cpld_4_rst_all; + } + err = self->_pull_high(self); + if (err < 0) { + emsg = "setup default value fail"; + goto err_init_cpld_4_rst_all; + } + SWPS_DEBUG("%s: init_cpld_i2c_c0_a77_70_74_rst_all ok", __func__); + return 0; + +init_cpld_rst_all_4_cott_lite: + chan = 0; + addr = 0x55; + err = _setup_i2c_client(self, chan, addr); + if (err < 0) { + emsg = "_setup_i2c_client fail"; + goto err_init_cpld_4_rst_all; + } + err = self->_pull_high(self); + if (err < 0) { + emsg = "setup default value fail"; + goto err_init_cpld_4_rst_all; + } + SWPS_DEBUG("%s: init_cpld_rst_all_4_cott_lite ok", __func__); + return 0; + +err_init_cpld_4_rst_all: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +clean_gpio_4_common(struct mux_obj_s *self){ + + if (!self) return 0; + if (!gpio_is_valid(self->gpio_num)) return 0; + self->_pull_high(self); + gpio_free(mux_head_p->gpio_num); + return 0; +} + + +int +clean_cpld_4_rst_all(struct mux_obj_s *self){ + + if (!self) return 0; + self->_pull_high(self); + if (self->i2c_client_p) { + i2c_put_adapter(self->i2c_client_p->adapter); + kfree(self->i2c_client_p); + } + return 0; +} + + +static int +_setup_muxctl_cb(struct mux_obj_s *self, + unsigned gpio){ + + char mod_dsc[32] = "ERR"; + + switch (gpio) { + case MUX_RST_GPIO_FORCE_RANGELEY: + self->gpio_num = gpio; + self->_pull_low = rangeley_force_pull_low; + self->_pull_high = rangeley_force_pull_high; + self->_init = init_gpio_4_force; + self->_clean = clean_gpio_4_common; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Rangeley force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_FORCE_HEDERA: + self->gpio_num = gpio; + self->_pull_low = hedera_force_pull_low; + self->_pull_high = hedera_force_pull_high; + self->_init = init_gpio_4_force; + self->_clean = clean_gpio_4_common; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Hedera force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_48_PCA9548: + case MUX_RST_GPIO_69_PCA9548: + case MUX_RST_GPIO_249_PCA9548: + case MUX_RST_GPIO_500_PCA9548: + case MUX_RST_GPIO_505_PCA9548: + self->gpio_num = gpio; + self->_pull_low = normal_gpio_pull_low; + self->_pull_high = normal_gpio_pull_high; + self->_init = init_gpio_4_normal; + self->_clean = clean_gpio_4_common; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Normal mode :%d", (int)gpio); + goto ok_setup_muxctl_cb; + + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + case MUX_RST_CPLD_COTTONWOOD: + self->gpio_num = gpio; + self->_pull_low = cpld_rst_all_4_pull_low; + self->_pull_high = cpld_rst_all_4_pull_high; + self->_init = init_cpld_4_rst_all; + self->_clean = clean_cpld_4_rst_all; + self->reset = cpld_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "CPLD mode :%d", (int)gpio); + goto ok_setup_muxctl_cb; + + default: + break; + } + SWPS_ERR("%s: Unexpected GPIO:%d\n", __func__, gpio); + return -1; + +ok_setup_muxctl_cb: + SWPS_INFO("muxctl: %s.\n", mod_dsc); + return 0; +} + + +/* ========== MUX public functions ========== + */ +void +clean_mux_objs(void){ + + struct mux_obj_s *curr_p = mux_head_p; + struct mux_obj_s *next_p = NULL; + + if (!curr_p) { + SWPS_DEBUG("%s: mux_head_p is NULL\n", __func__); + return; + } + while (curr_p) { + next_p = curr_p->next; + curr_p->_clean(curr_p); + kfree(curr_p); + curr_p = next_p; + } + SWPS_DEBUG("%s: done.\n", __func__); +} +EXPORT_SYMBOL(clean_mux_objs); + + +int +reset_mux_objs(void){ + + if (!mux_head_p) { + SWPS_ERR("%s: MUX ctl object doesn't exist!\n", __func__); + return -1; + } + if (mux_head_p->reset(mux_head_p) < 0){ + SWPS_ERR("%s: reset fail!\n", __func__); + return -1; + } + return 0; +} +EXPORT_SYMBOL(reset_mux_objs); + + +struct mux_obj_s * +_create_mux_obj(unsigned gpio){ + + char *emsg = "ERR"; + struct mux_obj_s *obj_p = NULL; + + obj_p = kzalloc(sizeof(struct mux_obj_s), GFP_KERNEL); + if (!obj_p) { + emsg = "kzalloc fail!"; + goto err_create_mux_obj_1; + } + if (_setup_muxctl_cb(obj_p, gpio) < 0){ + emsg = "_setup_muxctl_cb fail!"; + goto err_create_mux_obj_2; + } + if (obj_p->_init(obj_p) < 0) { + emsg = "_init() fail!"; + goto err_create_mux_obj_2; + } + SWPS_DEBUG("%s: created MUX object :%d\n", __func__, gpio); + return obj_p; + +err_create_mux_obj_2: + kfree(obj_p); +err_create_mux_obj_1: + SWPS_ERR("%s: %s :%d\n", __func__, emsg, gpio); + return NULL; +} + + +int +init_mux_objs(unsigned gpio){ + + struct mux_obj_s *curr_p = NULL; + char *emsg = "ERR"; + + /* Create MUX control object */ + if (mux_head_p) { + SWPS_DEBUG("%s: mux_head_p is not NULL!\n", __func__); + clean_mux_objs(); + } + /* Currently, it is using single muxctl architecture. + * In the future, it may use the multi-muxctl. + * (Ex: Gulmohar's advance I2C control / Peony's reset single mux) + */ + curr_p = _create_mux_obj(gpio); + if (!curr_p) { + emsg = "_create_mux_obj fail"; + goto err_init_mux_objs; + } + curr_p->next = NULL; + mux_head_p = curr_p; + SWPS_DEBUG("%s: all done. :%d\n", __func__, gpio); + return 0; + +err_init_mux_objs: + clean_mux_objs(); + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} +EXPORT_SYMBOL(init_mux_objs); + + +/* For single ko module + * => You need to declare MODULE_LICENSE If you want to build single module along. + * => Ex: For ONL platform + */ +MODULE_LICENSE("GPL"); + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_mux.h b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_mux.h new file mode 100644 index 00000000000..cd86aefa6f1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_mux.h @@ -0,0 +1,52 @@ +#ifndef INV_MUX_H +#define INV_MUX_H + +#include + +/* MUX basic information */ +#define MUX_GPIO_LABEL "SWPS_RST_MUX" + +/* MUX reset GPIO define */ +#define MUX_RST_GPIO_FORCE (30100) +#define MUX_RST_GPIO_FORCE_RANGELEY (30101) +#define MUX_RST_GPIO_FORCE_HEDERA (30102) +#define MUX_RST_GPIO_48_PCA9548 (48) +#define MUX_RST_GPIO_69_PCA9548 (69) +#define MUX_RST_GPIO_249_PCA9548 (249) +#define MUX_RST_GPIO_500_PCA9548 (500) +#define MUX_RST_GPIO_505_PCA9548 (505) +#define MUX_RST_CPLD_C0_A77_70_74_RST_ALL (30201) +#define MUX_RST_CPLD_COTTONWOOD (30301) + +/* MUX relate value define */ +#define MUX_RST_WAIT_MS_PCA9548 (1) +#define MUX_RST_WAIT_MS_CPLD (10) +#define MUX_RST_MEM_ADDR_RANGELEY (0) // TBD +#define MUX_RST_MEM_ADDR_HEDERA (0x548) + +/* MUX error code define */ +#define ERR_MUX_UNEXCPT (-399) + +struct mux_obj_s { + struct i2c_client *i2c_client_p; + struct mux_obj_s *next; + unsigned gpio_num; + int (*_pull_high)(struct mux_obj_s *self); + int (*_pull_low)(struct mux_obj_s *self); + int (*_init)(struct mux_obj_s *self); + int (*_clean)(struct mux_obj_s *self); + int (*reset)(struct mux_obj_s *self); +}; + + +void clean_mux_objs(void); +int reset_mux_objs(void); +int init_mux_objs(unsigned gpio); + + +#endif /* INV_MUX_H */ + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_platform.c b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_platform.c new file mode 100644 index 00000000000..30563855e82 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_platform.c @@ -0,0 +1,365 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +struct inv_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +#define bus_id(id) (id) +static struct pca954x_platform_mode pca9641_modes_2[] = { + {.adap_id = bus_id (2),}, +}; + +static struct pca954x_platform_mode pca9641_modes_3[] = { + {.adap_id = bus_id (3),}, +}; + +static struct pca954x_platform_mode pca9641_modes_4[] = { + {.adap_id = bus_id (4),}, +}; + +static struct pca954x_platform_mode pca9641_modes_5[] = { + {.adap_id = bus_id (5),}, +}; + +static struct pca954x_platform_mode pca9641_modes_6[] = { + {.adap_id = bus_id (6),}, +}; + +static struct pca954x_platform_mode mux_modes_0[] = { + {.adap_id = bus_id (7),}, {.adap_id = bus_id (8),}, + {.adap_id = bus_id (9),}, {.adap_id = bus_id (10),}, + {.adap_id = bus_id (11),}, {.adap_id = bus_id (12),}, + {.adap_id = bus_id (13),}, {.adap_id = bus_id (14),}, +}; + +static struct pca954x_platform_mode mux_modes_0_0[] = { + {.adap_id = bus_id (100),}, {.adap_id = bus_id (101),}, + {.adap_id = bus_id (102),}, {.adap_id = bus_id (103),}, + {.adap_id = bus_id (104),}, {.adap_id = bus_id (105),}, + {.adap_id = bus_id (106),}, {.adap_id = bus_id (107),}, +}; + +static struct pca954x_platform_mode mux_modes_0_1[] = { + {.adap_id = bus_id (108),}, {.adap_id = bus_id (109),}, + {.adap_id = bus_id (110),}, {.adap_id = bus_id (111),}, + {.adap_id = bus_id (112),}, {.adap_id = bus_id (113),}, + {.adap_id = bus_id (114),}, {.adap_id = bus_id (115),}, +}; + +static struct pca954x_platform_mode mux_modes_0_2[] = { + {.adap_id = bus_id (116),}, {.adap_id = bus_id (117),}, + {.adap_id = bus_id (118),}, {.adap_id = bus_id (119),}, + {.adap_id = bus_id (120),}, {.adap_id = bus_id (121),}, + {.adap_id = bus_id (122),}, {.adap_id = bus_id (123),}, +}; + +static struct pca954x_platform_mode mux_modes_0_3[] = { + {.adap_id = bus_id (124),}, {.adap_id = bus_id (125),}, + {.adap_id = bus_id (126),}, {.adap_id = bus_id (127),}, + {.adap_id = bus_id (128),}, {.adap_id = bus_id (129),}, + {.adap_id = bus_id (130),}, {.adap_id = bus_id (131),}, +}; + +static struct pca954x_platform_mode mux_modes_0_4[] = { + {.adap_id = bus_id (132),}, {.adap_id = bus_id (133),}, + {.adap_id = bus_id (134),}, {.adap_id = bus_id (135),}, + {.adap_id = bus_id (136),}, {.adap_id = bus_id (137),}, + {.adap_id = bus_id (138),}, {.adap_id = bus_id (139),}, +}; + +static struct pca954x_platform_mode mux_modes_0_5[] = { + {.adap_id = bus_id (140),}, {.adap_id = bus_id (141),}, + {.adap_id = bus_id (142),}, {.adap_id = bus_id (143),}, + {.adap_id = bus_id (144),}, {.adap_id = bus_id (145),}, + {.adap_id = bus_id (146),}, {.adap_id = bus_id (147),}, +}; + +static struct pca954x_platform_mode mux_modes_0_6[] = { + {.adap_id = bus_id (148),}, {.adap_id = bus_id (149),}, + {.adap_id = bus_id (150),}, {.adap_id = bus_id (151),}, + {.adap_id = bus_id (152),}, {.adap_id = bus_id (153),}, + {.adap_id = bus_id (154),}, {.adap_id = bus_id (155),}, +}; + +static struct pca954x_platform_mode mux_modes_0_7[] = { + {.adap_id = bus_id (156),}, {.adap_id = bus_id (157),}, + {.adap_id = bus_id (158),}, {.adap_id = bus_id (159),}, + {.adap_id = bus_id (160),}, {.adap_id = bus_id (161),}, + {.adap_id = bus_id (162),}, {.adap_id = bus_id (163),}, +}; + +static struct pca954x_platform_data pca9641_data_2 = { + .modes = pca9641_modes_2, + .num_modes = 1, +}; + +static struct pca954x_platform_data pca9641_data_3 = { + .modes = pca9641_modes_3, + .num_modes = 1, +}; + +static struct pca954x_platform_data pca9641_data_4 = { + .modes = pca9641_modes_4, + .num_modes = 1, +}; + +static struct pca954x_platform_data pca9641_data_5 = { + .modes = pca9641_modes_5, + .num_modes = 1, +}; + +static struct pca954x_platform_data pca9641_data_6 = { + .modes = pca9641_modes_6, + .num_modes = 1, +}; + +static struct pca954x_platform_data mux_data_0 = { + .modes = mux_modes_0, + .num_modes = 8, +}; + +static struct pca954x_platform_data mux_data_0_0 = { + .modes = mux_modes_0_0, + .num_modes = 8, +}; + +static struct pca954x_platform_data mux_data_0_1 = { + .modes = mux_modes_0_1, + .num_modes = 8, +}; + +static struct pca954x_platform_data mux_data_0_2 = { + .modes = mux_modes_0_2, + .num_modes = 8, +}; + +static struct pca954x_platform_data mux_data_0_3 = { + .modes = mux_modes_0_3, + .num_modes = 8, +}; + +static struct pca954x_platform_data mux_data_0_4 = { + .modes = mux_modes_0_4, + .num_modes = 8, +}; + +static struct pca954x_platform_data mux_data_0_5 = { + .modes = mux_modes_0_5, + .num_modes = 8, +}; + +static struct pca954x_platform_data mux_data_0_6 = { + .modes = mux_modes_0_6, + .num_modes = 8, +}; + +static struct pca954x_platform_data mux_data_0_7 = { + .modes = mux_modes_0_7, + .num_modes = 8, +}; + +static struct i2c_board_info i2c_device_info0[] __initdata = { + {"pca9641", 0, 0x74, &pca9641_data_2, 0, 0}, //PCA9641 //i2c-2 + {"pca9641", 0, 0x76, &pca9641_data_3, 0, 0}, //PCA9641 //i2c-3 + {"pca9641", 0, 0x73, &pca9641_data_4, 0, 0}, //PCA9641 //i2c-4 + {"pca9641", 0, 0x75, &pca9641_data_5, 0, 0}, //PCA9641 //i2c-5 +}; + +static struct i2c_board_info i2c_device_info1[] __initdata = { + {"pca9641", 0, 0x75, &pca9641_data_6, 0, 0}, //PCA9641 //i2c-6 +}; + +static struct i2c_board_info i2c_device_info2[] __initdata = { + {"inv_cpld", 0, 0x55, 0, 0, 0}, //CPLD-eeprom +}; + +static struct i2c_board_info i2c_device_info3[] __initdata = { + {"inv_psu", 0, 0x58, 0, 0, 0}, //psu + {"inv_psu", 0, 0x59, 0, 0, 0}, //psu + {"inv_ucd90160", 0, 0x34, 0, 0, 0}, //power monitor + {"inv_ucd90160", 0, 0x6B, 0, 0, 0}, //power monitor(cpu board) +}; + +static struct i2c_board_info i2c_device_info4[] __initdata = { + {"adm1275", 0, 0x10, 0, 0, 0}, //hot plug IC + {"inv_tmp75", 0, 0x49, 0, 0, 0}, //u9 + {"inv_tmp75", 0, 0x4A, 0, 0, 0}, //u10 + {"inv_tmp75", 0, 0x4B, 0, 0, 0}, //u8 + {"inv_tmp75", 0, 0x48, 0, 0, 0}, //cpu board + {"inv_tmp75", 0, 0x4F, 0, 0, 0}, //fan board +}; + +static struct i2c_board_info i2c_device_info5[] __initdata = { + {"pca9548", 0, 0x70, &mux_data_0, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info6[] __initdata = { +}; + +static struct i2c_board_info i2c_device_info7[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_0, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info8[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_1, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info9[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_2, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info10[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_3, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info11[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_4, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info12[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_5, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info13[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_6, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info14[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_7, 0, 0}, +}; + +static struct inv_i2c_board_info i2cdev_list[] = { + {bus_id (0), ARRAY_SIZE (i2c_device_info0), i2c_device_info0}, //SMBUS0 + {bus_id (1), ARRAY_SIZE (i2c_device_info1), i2c_device_info1}, //SML1 + {bus_id (2), ARRAY_SIZE (i2c_device_info2), i2c_device_info2}, + {bus_id (3), ARRAY_SIZE (i2c_device_info3), i2c_device_info3}, + {bus_id (4), ARRAY_SIZE (i2c_device_info4), i2c_device_info4}, + {bus_id (5), ARRAY_SIZE (i2c_device_info5), i2c_device_info5}, + {bus_id (6), ARRAY_SIZE (i2c_device_info6), i2c_device_info6}, + {bus_id (7), ARRAY_SIZE (i2c_device_info7), i2c_device_info7}, + {bus_id (8), ARRAY_SIZE (i2c_device_info8), i2c_device_info8}, + {bus_id (9), ARRAY_SIZE (i2c_device_info9), i2c_device_info9}, + {bus_id (10), ARRAY_SIZE (i2c_device_info10), i2c_device_info10}, + {bus_id (11), ARRAY_SIZE (i2c_device_info11), i2c_device_info11}, + {bus_id (12), ARRAY_SIZE (i2c_device_info12), i2c_device_info12}, + {bus_id (13), ARRAY_SIZE (i2c_device_info13), i2c_device_info13}, + {bus_id (14), ARRAY_SIZE (i2c_device_info14), i2c_device_info14}, +}; + +#define INV_PLATFORM_CLIENT_MAX_NUM 50 /*A big enough number for sum of i2cdev_list[i].size */ +static int client_list_index = 0; +static struct i2c_client *client_list[INV_PLATFORM_CLIENT_MAX_NUM] = { 0 }; + +///////////////////////////////////////////////////////////////////////////////////////// +static struct platform_device *device_i2c_gpio0; +static struct i2c_gpio_platform_data i2c_gpio_platdata0 = { + .scl_pin = 58, //494, + .sda_pin = 75, //511, + + .udelay = 5, //5:100kHz + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .scl_is_output_only = 0 +}; + +static int __init inv_platform_init (void) +{ + struct i2c_adapter *adap = NULL; + struct i2c_client *e = NULL; + int ret = 0; + int i, j, k; + + //printk("%s \n", __func__); + + //use i2c-gpio + //register i2c gpio + //config gpio58,75 to gpio function 58=32+3*8+2 75=32*2+8*1+3 gpio69=32*2+8*0+5 + outl (inl (0x533) | (1 << 2), 0x533); //i2c-gpio sdl (GPIO58) + outl (inl (0x541) | (1 << 3), 0x541); //i2c-gpio sda (GPIO75) + outl (inl (0x540) | (1 << 5), 0x540); //RST_I2C_MUX_N (GPIO69) + outl (inl (0x500) | (1 << 7), 0x500); //SYS_RDY_N (GPIO7) + outl (inl (0x501) | (1 << 7), 0x501); //BMC_HEART_BEAT (GPIO15) + outl (inl (0x503) | (1 << 2) | (1 << 3), 0x503); //PSOC_HEART_BEAT(26),CPLD_HEART_BEAT(27) + + device_i2c_gpio0 = platform_device_alloc ("i2c-gpio", 1); + if (!device_i2c_gpio0) + { + printk (KERN_ERR "i2c-gpio: platform_device_alloc fail\n"); + return -ENOMEM; + } + device_i2c_gpio0->name = "i2c-gpio"; + device_i2c_gpio0->id = 1; + device_i2c_gpio0->dev.platform_data = &i2c_gpio_platdata0; + + ret = platform_device_add (device_i2c_gpio0); + if (ret) + { + printk (KERN_ERR "i2c-gpio: platform_device_add fail %d\n", ret); + } + msleep (10); + + for (i = 0; i < ARRAY_SIZE (i2cdev_list); i++) + { + adap = i2c_get_adapter (i2cdev_list[i].ch); + if (adap == NULL) + { + printk ("platform get channel %d adapter fail\n", i); + continue; + } + i2c_put_adapter (adap); + for (j = 0; j < i2cdev_list[i].size; j++) + { + for (k = 0; k < 300; k++) + { + e = i2c_new_device (adap, &i2cdev_list[i].board_info[j]); + if (e == NULL) + { + msleep (10); + } + else + { + client_list[client_list_index] = e; + client_list_index++; + break; + } + } + if (k == 300) + { + printk ("[%d][%d] i2c device load fail\n", i, j); + } + } + } + printk ("inv_platform_init done\n"); + return ret; +} + +static void __exit inv_platform_exit (void) +{ + int i; + + for (i = client_list_index - 1; i >= 0; i--) + { + i2c_unregister_device (client_list[i]); + } + device_i2c_gpio0->dev.platform_data = NULL; + platform_device_unregister (device_i2c_gpio0); + printk ("inv_platform_exit done\n"); +} + +module_init (inv_platform_init); +module_exit (inv_platform_exit); + +MODULE_SOFTDEP("pre: inv_psoc"); + +MODULE_AUTHOR ("Inventec"); +MODULE_DESCRIPTION ("Platform devices"); +MODULE_LICENSE ("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_psoc.c b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_psoc.c new file mode 100644 index 00000000000..d40b17a8035 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_psoc.c @@ -0,0 +1,982 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#define SWITCH_TEMPERATURE_SOCK "/proc/switch/temp" +#define PSOC_POLLING_PERIOD 1000 + +#include +#include +#include +#include + +#define IPMI_MAX_INTF (4) +#define NETFN_OEM 0x30 +#define CMD_GETDATA 0x31 +#define CMD_SETDATA 0x32 +#define FAN_NUM 4 +#define PSU_NUM 2 + +#define FAN_CLEI_SUPPORT 0 +#define PSU_CLEI_SUPPORT 0 + +#define PSU1 0x5800 +#define PSU2 0x5900 +#define BMC_PMBusNumber 3 +#define PMBus_Vendor 0x99 +#define PMBus_Serial 0x9E +#define PMBus_Temp2 0x8E +#define PMBus_Version 0x9B +#define MaxLeng_Result 0x40 + +#define BMC_FanCLEIBusNumber 9 +#define DEVICE_CLEI_ADDR 0x52,0x53,0x54,0x55,0x56,0x50,0x51 + +#define MAX_IPMI_RECV_LENGTH 0xff +static char CLEI_ADDR[]={DEVICE_CLEI_ADDR}; +struct task_struct *kthread_auto_update; +static long pmbus_reg2data_linear(int data, int linear16); +struct ipmi_result{ + char result[MAX_IPMI_RECV_LENGTH]; + int result_length; +}; + +extern struct mutex ipmi_mutex; +extern struct mutex ipmi2_mutex; +extern int start_ipmi_command (char NetFn, char cmd, char *data, int data_length,char *result, int *result_length); + +static struct ipmi_result ipmiresult; +static struct device *hwmon_dev; +static struct kobject *device_kobj; +static ipmi_user_t ipmi_mh_user = NULL; +static void msg_handler(struct ipmi_recv_msg *msg,void* handler_data); +static struct ipmi_user_hndl ipmi_hndlrs = { .ipmi_recv_hndl = msg_handler,}; + +static atomic_t dummy_count = ATOMIC_INIT(0); +static void dummy_smi_free(struct ipmi_smi_msg *msg) +{ + atomic_dec(&dummy_count); +} +static void dummy_recv_free(struct ipmi_recv_msg *msg) +{ + atomic_dec(&dummy_count); +} +static struct ipmi_smi_msg halt_smi_msg = { + .done = dummy_smi_free +}; +static struct ipmi_recv_msg halt_recv_msg = { + .done = dummy_recv_free +}; + +struct __attribute__ ((__packed__)) psoc_psu_layout { + u16 psu1_iin; + u16 psu2_iin; + u16 psu1_iout; + u16 psu2_iout; + + u16 psu1_pin; + u16 psu2_pin; + u16 psu1_pout; + u16 psu2_pout; + + u16 psu1_vin; + u16 psu2_vin; + u16 psu1_vout; + u16 psu2_vout; +}; + +struct __attribute__ ((__packed__)) clei { + u8 issue_number[3]; + u8 abbreviation_number[9]; + u8 fc_number[10]; + u8 clei_code[10]; + u8 product_year_and_month[5]; + u8 label_location_code[2]; + u8 serial_number[5]; + u8 pcb_revision[5]; + u8 vendor_name[10]; + u8 reserved[5]; +}; + +struct __attribute__ ((__packed__)) psoc_layout { + u8 ctl; //offset: 0 + u16 switch_temp; //offset: 1 + + // BYTE[03:20] - voltage + u16 voltage[15]; //offset: 0x03-0x20 + + // BYTE[21:27] - ExtFan + u8 led_ctl2; //offset: 21 + u8 ext_pwm; //offset: 22 + u16 ext_rpm[2]; //offset: 23 + u8 gpi_fan2; //offset: 27 + + //gpo + u8 led_ctl; //offset: 28 + + u8 gpio; //offset: 29 + + //pwm duty + u8 pwm[4]; //offset: 2a + u8 pwm_psu[2]; //offset: 2e + + //fan rpm + u16 fan[4*2]; //offset: 30 + + u8 reserve1[4]; //offset: 40 + + //gpi + u8 gpi_fan; //offset: 44 + + //psu state + u8 psu_state; //offset: 45 + + //temperature + u16 temp[5]; //offset: 46 + u16 temp_psu[2]; //offset: 50 + + //version + u8 version[2]; //offset: 54 + + u8 reserve2[4]; //offset: 56 + struct psoc_psu_layout psu_info; //offset: 5a +}; + +/* definition */ +#define PSOC_OFF(m) offsetof(struct psoc_layout, m) +#define PSOC_PSU_OFF(m) offsetof(struct psoc_psu_layout, m) + +#define SWITCH_TMP_OFFSET PSOC_OFF(switch_temp) +#define PWM_OFFSET PSOC_OFF(pwm) +#define THERMAL_OFFSET PSOC_OFF(temp) +#define RPM_OFFSET PSOC_OFF(fan) +#define DIAG_FLAG_OFFSET PSOC_OFF(ctl) +#define FAN_LED_OFFSET PSOC_OFF(led_ctl) +#define FAN_GPI_OFFSET PSOC_OFF(gpi_fan) +#define PSOC_PSU_OFFSET PSOC_OFF(psu_state) +#define VERSION_OFFSET PSOC_OFF(version) +#define PSU_INFO_OFFSET PSOC_OFF(psu_info) + +#define PWM2_OFFSET PSOC_OFF(ext_pwm) +#define RPM2_OFFSET PSOC_OFF(ext_rpm) +#define FAN_LED2_OFFSET PSOC_OFF(led_ctl2) +#define FAN_GPI2_OFFSET PSOC_OFF(gpi_fan2) + +#define CLEI_OFF(m) offsetof(struct clei, m) +#define FAN1_CLEI_INDEX 0 +#define FAN2_CLEI_INDEX 1 +#define FAN3_CLEI_INDEX 2 +#define FAN4_CLEI_INDEX 3 +#define FAN5_CLEI_INDEX 4 +#define PSU1_CLEI_INDEX 5 +#define PSU2_CLEI_INDEX 6 + +static void msg_handler(struct ipmi_recv_msg *recv_msg,void* handler_data) +{ + struct ipmi_result *msg_result = recv_msg->user_msg_data; + + msg_result->result_length=recv_msg->msg.data_len-1; + memcpy(msg_result->result, &recv_msg->msg.data[1], recv_msg->msg.data_len-1); + + ipmi_free_recv_msg(recv_msg); + mutex_unlock(&ipmi_mutex); + + return; +} + +static ssize_t psoc_ipmi_read(u8 *buf, u8 offset, size_t count) +{ + uint8_t data[2]; + int result_len=0; + int rv; + + data[0] = offset; + data[1] = count; + + rv=start_ipmi_command(NETFN_OEM, CMD_GETDATA,data,2, buf, &result_len); + + return result_len; +} + +static ssize_t psoc_ipmi_write(char *buf, unsigned offset, size_t count) +{ + uint8_t data[count+1],result[1]; + int result_len; + + data[0] = offset; + memcpy(&data[1],buf,count); + + start_ipmi_command(NETFN_OEM, CMD_SETDATA,data,count+1, result, &result_len); + return count; +} + + +static u16 psoc_read16(u8 offset) +{ + u16 value = 0; + u8 buf[]={0,0}; + + if(psoc_ipmi_read(buf, offset, 2) == 2) + value = (buf[0]<<8 | buf[1]<<0); + + return value; +} + +static u8 psoc_read8(u8 offset) +{ + u8 value = 0; + u8 buf = 0; + + if(psoc_ipmi_read(&buf, offset, 1) == 1) + value = buf; + + return value; +} + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu1 | psu0 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu_st(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 byte=0; + int shift = (attr->index == 0)?3:0; + + status = psoc_ipmi_read(&byte, PSOC_PSU_OFFSET, 1); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + +static ssize_t show_ipmi_pmbus(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + uint8_t data[4],result[MaxLeng_Result]; + int result_len=0; + + data[0] = BMC_PMBusNumber; + data[1] = (attr->index & 0xFF00 ) >>7; + data[3] = attr->index & 0xff; + if(data[3]==PMBus_Temp2) + {data[2]=2;} + else + {data[2]=MaxLeng_Result;} + + if(start_ipmi_command(0x06, 0x52,data,4, result, &result_len)==0) + { + if(data[3]==PMBus_Temp2) + { + return sprintf(buf, "%ld \n", ((result_len==2)?(pmbus_reg2data_linear(result[0] | (result[1]<<8), 0 )):0)); + } + else + { + if(result_len==0) result[0]=0; + result[result[0]+1]='\0'; + return sprintf(buf, "%s\n",&result[1]); + } + } + else + { + return 0; + } +} + +static ssize_t show_clei(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 device_index = attr->index & 0xFF; + + uint8_t data[5],result[MaxLeng_Result]; + int result_len=0; + + data[0] = (device_index<=FAN5_CLEI_INDEX) ? BMC_FanCLEIBusNumber:BMC_PMBusNumber; + data[1] = CLEI_ADDR[device_index]<<1; + data[2] = sizeof(struct clei); + data[3] = (device_index<=FAN5_CLEI_INDEX) ? 0x00 : 0x01; //PSU CLEI will start from 0x0100 + data[4] = 0; + + if(start_ipmi_command(0x06, 0x52,data,5, result, &result_len)==0) + { + if(result_len < sizeof(struct clei)) memset(result, 0, sizeof(struct clei)); + sprintf (buf, "Issue Number: %.3s\n", &result[CLEI_OFF(issue_number)]); + sprintf (buf, "%sAbbreviation Number: %.9s\n", buf, &result[CLEI_OFF(abbreviation_number)]); + sprintf (buf, "%sFC Number: %.10s\n", buf, &result[CLEI_OFF(fc_number)]); + sprintf (buf, "%sCLEI Code: %.10s\n", buf, &result[CLEI_OFF(clei_code)]); + sprintf (buf, "%sProduct Year and Month: %.5s\n", buf, &result[CLEI_OFF(product_year_and_month)]); + sprintf (buf, "%s2D Label Location Code: %.2s\n", buf, &result[CLEI_OFF(label_location_code)]); + sprintf (buf, "%sSerial Number: %.5s\n", buf, &result[CLEI_OFF(serial_number)]); + sprintf (buf, "%sPCB Revision: %.5s\n", buf, &result[CLEI_OFF(pcb_revision)]); + sprintf (buf, "%sVendor Name: %.10s\n", buf, &result[CLEI_OFF(vendor_name)]); + return strlen(buf); + } + else + { + return sprintf(buf, "NONE\n"); + } +} + +static ssize_t show_thermal(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index * 2 + THERMAL_OFFSET; + + status = psoc_read16(offset); + + return sprintf(buf, "%d\n", + (s8)(status>>8) * 1000 ); +} + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index; + + status = psoc_read8(offset); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t set_pwm(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index; + u8 pwm = simple_strtol(buf, NULL, 10); + if(pwm > 255) pwm = 255; + psoc_ipmi_write(&pwm, offset, 1); + + return count; +} + + +static ssize_t show_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index; + status = psoc_read16(offset); + + return sprintf(buf, "%d\n", + status); +} + +static char* fantype_str[] = { + "UNPLUGGED", //00 + "Normal Type", //01 + "REVERSAL Type", //10 +}; + +static ssize_t show_fan_type(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 index = attr->index; + int type = -1; + + if (attr->index < 4){ + status = psoc_read8(FAN_GPI_OFFSET); + } + else { + status = psoc_read8(FAN_GPI2_OFFSET); + index-=4; + } + + if( (status & 1<>8) * 1000 ); + + return strlen(buf); +} + +static ssize_t set_switch_tmp(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + long temp = simple_strtol(buf, NULL, 10); + u16 temp2 = ( (temp/1000) <<8 ) & 0xFF00 ; + + psoc_ipmi_write((u8*)&temp2, SWITCH_TMP_OFFSET, 2); + + + return count; +} + +static ssize_t show_diag(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + u8 diag_flag = 0; + + status = psoc_ipmi_read((u8*)&diag_flag, DIAG_FLAG_OFFSET, 1); + + status = sprintf (buf, "%d\n", ((diag_flag & 0x80)?1:0)); + + return strlen(buf); +} + +static ssize_t set_diag(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + u8 value = 0; + u8 diag = simple_strtol(buf, NULL, 10); + + diag = diag?1:0; + + psoc_ipmi_read((u8*)&value, DIAG_FLAG_OFFSET, 1); + if(diag) value |= (1<<7); + else value &= ~(1<<7); + psoc_ipmi_write((u8*)&value, DIAG_FLAG_OFFSET, 1); + + return count; +} + +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + + status = psoc_read16(VERSION_OFFSET); + + return sprintf(buf, "ver: %x.%x\n", (status & 0xFF00)>>8, (status & 0xFF) ); +} + + +static ssize_t show_fan_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 bit = attr->index; + + if(bit < 8) { status = psoc_read8(FAN_LED_OFFSET); } +#if FAN_NUM>4 + if(bit >= 8) { status = psoc_read8(FAN_LED2_OFFSET); bit-=8; } +#endif + + return sprintf(buf, "%d\n", + (status & (1<index; + u8 led_state = 0; + + u8 v = simple_strtol(buf, NULL, 10); + + if(attr->index < 8) { led_state = psoc_read8(FAN_LED_OFFSET ); } +#if FAN_NUM>4 + if(attr->index >= 8) { led_state = psoc_read8(FAN_LED2_OFFSET); bit-=8; } +#endif + if(v) led_state |= (1<index < 8) { psoc_ipmi_write(&led_state, FAN_LED_OFFSET, 1);} +#if FAN_NUM>4 + if(attr->index >= 8) { psoc_ipmi_write(&led_state, FAN_LED2_OFFSET,1);} +#endif + return count; +} + +static ssize_t show_value8(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index; + + status = psoc_read8(offset); + + return sprintf(buf, "0x%02X\n", status ); +} + +static long pmbus_reg2data_linear(int data, int linear16) +{ + s16 exponent; + s32 mantissa; + long val; + + if (linear16) { /* LINEAR16 */ + exponent = -9; + mantissa = (u16) data; + } else { /* LINEAR11 */ + exponent = ((s16)data) >> 11; + exponent = ((s16)( data & 0xF800) ) >> 11; + mantissa = ((s32)((data & 0x7ff) << 5)) >> 5; + } + + //printk("data=%d, m=%d, e=%d\n", data, exponent, mantissa); + val = mantissa; + + /* scale result to micro-units for power sensors */ + val = val * 1000L; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +static ssize_t show_psu_psoc(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index + PSU_INFO_OFFSET; + + status = psoc_read16(offset); + + if((strstr(attr->dev_attr.attr.name, "vout")!=NULL)|(strstr(attr->dev_attr.attr.name, "in3")!=NULL)|(strstr(attr->dev_attr.attr.name, "in4")!=NULL)) { + offset=1; + } + else { + offset=0; + } + + return sprintf(buf, "%ld \n", pmbus_reg2data_linear(status, offset )); +} + +static ssize_t show_name(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + return sprintf(buf, "inv_psoc\n"); +} + +static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_thermal, 0, 0); +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_thermal, 0, 1); +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_thermal, 0, 2); +static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_thermal, 0, 3); +static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_thermal, 0, 4); +static SENSOR_DEVICE_ATTR(thermal_psu1, S_IRUGO, show_thermal, 0, 5); +static SENSOR_DEVICE_ATTR(thermal_psu2, S_IRUGO, show_thermal, 0, 6); +static SENSOR_DEVICE_ATTR(temp7_input, S_IRUGO, show_thermal, 0, 5); +static SENSOR_DEVICE_ATTR(temp8_input, S_IRUGO, show_thermal, 0, 6); + +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 0 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 1 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 2 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 3 + PWM_OFFSET); +#if FAN_NUM > 4 +static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 0 + PWM2_OFFSET); +#endif +static SENSOR_DEVICE_ATTR(pwm_psu1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 4 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm_psu2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 5 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm6, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 4 + PWM_OFFSET); +static SENSOR_DEVICE_ATTR(pwm7, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 5 + PWM_OFFSET); + +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu_st, 0, 0); +static SENSOR_DEVICE_ATTR(psu2, S_IRUGO, show_psu_st, 0, 1); + +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_rpm, 0, 0*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_rpm, 0, 1*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_rpm, 0, 2*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_rpm, 0, 3*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_rpm, 0, 4*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_rpm, 0, 5*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_rpm, 0, 6*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_rpm, 0, 7*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(rpm_psu1, S_IRUGO, show_rpm, 0, 8*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(rpm_psu2, S_IRUGO, show_rpm, 0, 9*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan11_input, S_IRUGO, show_rpm, 0, 8*2 + RPM_OFFSET); +static SENSOR_DEVICE_ATTR(fan12_input, S_IRUGO, show_rpm, 0, 9*2 + RPM_OFFSET); + +#if FAN_NUM > 4 +static SENSOR_DEVICE_ATTR(fan9_input , S_IRUGO, show_rpm, 0,0*2 + RPM2_OFFSET); +static SENSOR_DEVICE_ATTR(fan10_input, S_IRUGO, show_rpm, 0,1*2 + RPM2_OFFSET); +#endif + +static SENSOR_DEVICE_ATTR(switch_tmp, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); +static SENSOR_DEVICE_ATTR(temp6_input, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); + +static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, 0, 0); + +static SENSOR_DEVICE_ATTR(fan_led_grn1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 0); +static SENSOR_DEVICE_ATTR(fan_led_grn2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 1); +static SENSOR_DEVICE_ATTR(fan_led_grn3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 2); +static SENSOR_DEVICE_ATTR(fan_led_grn4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 3); +static SENSOR_DEVICE_ATTR(fan_led_red1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 4); +static SENSOR_DEVICE_ATTR(fan_led_red2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 5); +static SENSOR_DEVICE_ATTR(fan_led_red3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 6); +static SENSOR_DEVICE_ATTR(fan_led_red4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 7); + +#if FAN_NUM>4 +static SENSOR_DEVICE_ATTR(fan_led_grn5, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 8); +static SENSOR_DEVICE_ATTR(fan_led_red5, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 12); +static SENSOR_DEVICE_ATTR(fan_gpi2, S_IRUGO, show_value8, 0, FAN_GPI2_OFFSET); +#endif + +static SENSOR_DEVICE_ATTR(fan_gpi, S_IRUGO, show_value8, 0, FAN_GPI_OFFSET); +static SENSOR_DEVICE_ATTR(fan1_type, S_IRUGO, show_fan_type, 0, 0); +static SENSOR_DEVICE_ATTR(fan2_type, S_IRUGO, show_fan_type, 0, 1); +static SENSOR_DEVICE_ATTR(fan3_type, S_IRUGO, show_fan_type, 0, 2); +static SENSOR_DEVICE_ATTR(fan4_type, S_IRUGO, show_fan_type, 0, 3); +static SENSOR_DEVICE_ATTR(psoc_psu1_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pout)); + +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vout)); +static SENSOR_DEVICE_ATTR(curr3_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iout)); +static SENSOR_DEVICE_ATTR(power3_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pout)); + +static SENSOR_DEVICE_ATTR(psoc_psu2_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pout)); + +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); +static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vout)); +static SENSOR_DEVICE_ATTR(curr4_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iout)); +static SENSOR_DEVICE_ATTR(power4_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pout)); + +//IPMI +static SENSOR_DEVICE_ATTR(thermal2_psu1, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Temp2); +static SENSOR_DEVICE_ATTR(temp9_input, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Temp2); + +static SENSOR_DEVICE_ATTR(psoc_psu1_vendor, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Vendor); +static SENSOR_DEVICE_ATTR(psoc_psu1_serial, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Serial); +static SENSOR_DEVICE_ATTR(psoc_psu1_version, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Version); + +static SENSOR_DEVICE_ATTR(thermal2_psu2, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Temp2); +static SENSOR_DEVICE_ATTR(temp10_input, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Temp2); +static SENSOR_DEVICE_ATTR(psoc_psu2_vendor, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Vendor); +static SENSOR_DEVICE_ATTR(psoc_psu2_serial, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Serial); +static SENSOR_DEVICE_ATTR(psoc_psu2_version, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Version); + +//CLEI +#if FAN_CLEI_SUPPORT +static SENSOR_DEVICE_ATTR(fan1_clei, S_IRUGO, show_clei, 0, FAN1_CLEI_INDEX ); +static SENSOR_DEVICE_ATTR(fan2_clei, S_IRUGO, show_clei, 0, FAN2_CLEI_INDEX ); +static SENSOR_DEVICE_ATTR(fan3_clei, S_IRUGO, show_clei, 0, FAN3_CLEI_INDEX ); +static SENSOR_DEVICE_ATTR(fan4_clei, S_IRUGO, show_clei, 0, FAN4_CLEI_INDEX ); +#if FAN_NUM > 4 +static SENSOR_DEVICE_ATTR(fan5_clei, S_IRUGO, show_clei, 0, FAN5_CLEI_INDEX ); +#endif +#endif + +#if PSU_CLEI_SUPPORT +static SENSOR_DEVICE_ATTR(psu1_clei, S_IRUGO, show_clei, 0, PSU1_CLEI_INDEX ); +static SENSOR_DEVICE_ATTR(psu2_clei, S_IRUGO, show_clei, 0, PSU2_CLEI_INDEX ); +#endif + +static struct attribute *psoc_attributes[] = { + //name + &dev_attr_name.attr, + //thermal + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_temp4_input.dev_attr.attr, + &sensor_dev_attr_temp5_input.dev_attr.attr, + &sensor_dev_attr_thermal_psu1.dev_attr.attr, + &sensor_dev_attr_thermal_psu2.dev_attr.attr, + + &sensor_dev_attr_temp7_input.dev_attr.attr, + &sensor_dev_attr_temp8_input.dev_attr.attr, + + //pwm + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, +#if FAN_NUM > 4 + &sensor_dev_attr_pwm5.dev_attr.attr, +#endif + &sensor_dev_attr_pwm_psu1.dev_attr.attr, + &sensor_dev_attr_pwm_psu2.dev_attr.attr, + &sensor_dev_attr_pwm6.dev_attr.attr, + &sensor_dev_attr_pwm7.dev_attr.attr, + + //rpm + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_fan8_input.dev_attr.attr, +#if FAN_NUM > 4 + &sensor_dev_attr_fan9_input.dev_attr.attr, + &sensor_dev_attr_fan10_input.dev_attr.attr, +#endif + &sensor_dev_attr_rpm_psu1.dev_attr.attr, + &sensor_dev_attr_rpm_psu2.dev_attr.attr, + &sensor_dev_attr_fan11_input.dev_attr.attr, + &sensor_dev_attr_fan12_input.dev_attr.attr, + //switch temperature + &sensor_dev_attr_switch_tmp.dev_attr.attr, + &sensor_dev_attr_temp6_input.dev_attr.attr, + + //diag flag + ///&sensor_dev_attr_diag.dev_attr.attr, + + //version + &sensor_dev_attr_version.dev_attr.attr, + + //fan led + &sensor_dev_attr_fan_led_grn1.dev_attr.attr, + &sensor_dev_attr_fan_led_grn2.dev_attr.attr, + &sensor_dev_attr_fan_led_grn3.dev_attr.attr, + &sensor_dev_attr_fan_led_grn4.dev_attr.attr, + &sensor_dev_attr_fan_led_red1.dev_attr.attr, + &sensor_dev_attr_fan_led_red2.dev_attr.attr, + &sensor_dev_attr_fan_led_red3.dev_attr.attr, + &sensor_dev_attr_fan_led_red4.dev_attr.attr, +#if FAN_NUM >4 + &sensor_dev_attr_fan_led_grn5.dev_attr.attr, + &sensor_dev_attr_fan_led_red5.dev_attr.attr, + &sensor_dev_attr_fan_gpi2.dev_attr.attr, +#endif + //fan GPI + &sensor_dev_attr_fan_gpi.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + &sensor_dev_attr_psu2.dev_attr.attr, + + //fan type + &sensor_dev_attr_fan1_type.dev_attr.attr, + &sensor_dev_attr_fan2_type.dev_attr.attr, + &sensor_dev_attr_fan3_type.dev_attr.attr, + &sensor_dev_attr_fan4_type.dev_attr.attr, + + //psu_psoc + &sensor_dev_attr_psoc_psu1_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pout.dev_attr.attr, + + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_in3_input.dev_attr.attr, + &sensor_dev_attr_curr3_input.dev_attr.attr, + &sensor_dev_attr_power3_input.dev_attr.attr, + &sensor_dev_attr_in4_input.dev_attr.attr, + &sensor_dev_attr_curr4_input.dev_attr.attr, + &sensor_dev_attr_power4_input.dev_attr.attr, + + //ipmi_i2c_command + &sensor_dev_attr_thermal2_psu1.dev_attr.attr, + &sensor_dev_attr_temp9_input.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_vendor.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_serial.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_version.dev_attr.attr, + + &sensor_dev_attr_thermal2_psu2.dev_attr.attr, + &sensor_dev_attr_temp10_input.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vendor.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_serial.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_version.dev_attr.attr, + + //clei +#if FAN_CLEI_SUPPORT + &sensor_dev_attr_fan1_clei.dev_attr.attr, + &sensor_dev_attr_fan2_clei.dev_attr.attr, + &sensor_dev_attr_fan3_clei.dev_attr.attr, + &sensor_dev_attr_fan4_clei.dev_attr.attr, +#if FAN_NUM > 4 + &sensor_dev_attr_fan5_clei.dev_attr.attr, +#endif +#endif + +#if PSU_CLEI_SUPPORT + &sensor_dev_attr_psu1_clei.dev_attr.attr, + &sensor_dev_attr_psu2_clei.dev_attr.attr, +#endif + NULL +}; + +static const struct attribute_group psoc_group = { + .attrs = psoc_attributes, +}; + +//================================= +static void check_switch_temp(void) +{ + static struct file *f; + mm_segment_t old_fs; + + set_fs(get_ds()); + f = filp_open(SWITCH_TEMPERATURE_SOCK,O_RDONLY,0644); + if(IS_ERR(f)) { + return; + } + else { + char temp_str[]={0,0,0,0,0,0,0}; + loff_t pos = 0; + u16 temp2 = 0; + old_fs = get_fs(); + set_fs(KERNEL_DS); + vfs_read(f, temp_str,6,&pos); + temp2 = ((simple_strtoul(temp_str,NULL,10)/1000) <<8 ) & 0xFF00 ; + psoc_ipmi_write((u8*)&temp2, SWITCH_TMP_OFFSET, 2); + } + filp_close(f,NULL); + set_fs(old_fs); +} + +static int psoc_polling_thread(void *p) +{ + while (!kthread_should_stop()) + { + check_switch_temp(); + set_current_state(TASK_INTERRUPTIBLE); + if(kthread_should_stop()) + break; + + schedule_timeout(msecs_to_jiffies(PSOC_POLLING_PERIOD)); + } + return 0; +} + +static int __init inv_psoc_init(void) +{ + int ret; + + hwmon_dev = hwmon_device_register(NULL); + if (IS_ERR(hwmon_dev)) { + goto fail_hwmon_device_register; + } + + device_kobj = kobject_create_and_add("device", &hwmon_dev->kobj); + if(!device_kobj) { + goto fail_hwmon_device_register; + } + + ret = sysfs_create_group(device_kobj, &psoc_group); + if (ret) { + goto fail_create_group_hwmon; + } + + ret = sysfs_create_group(&hwmon_dev->kobj, &psoc_group); + if (ret) { + goto fail_create_group_hwmon; + } + + kthread_auto_update = kthread_run(psoc_polling_thread,NULL,"BMC_DRIVER"); + if (IS_ERR(kthread_auto_update)) { + goto fail_create_group_hwmon; + } + return ret; + +fail_create_group_hwmon: + hwmon_device_unregister(hwmon_dev); +fail_hwmon_device_register: + return -ENOMEM; +} + +static void __exit inv_psoc_exit(void) +{ + kthread_stop(kthread_auto_update); + if(ipmi_mh_user!=NULL) {ipmi_destroy_user(ipmi_mh_user);} + sysfs_remove_group(device_kobj, &psoc_group); + if(hwmon_dev != NULL) hwmon_device_unregister(hwmon_dev); +} + +MODULE_AUTHOR("Ting.Jack "); +MODULE_DESCRIPTION("inv psoc driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_psoc_init); +module_exit(inv_psoc_exit); + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_psu.c b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_psu.c new file mode 100644 index 00000000000..5becce5a63d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_psu.c @@ -0,0 +1,689 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define PMBUS_VOUT_MODE 0x20 +#define PMBUS_FAN_PWM 0x3b +#define PMBUS_READ_VIN 0x88 +#define PMBUS_READ_IIN 0x89 +#define PMBUS_READ_VOUT 0x8b +#define PMBUS_READ_IOUT 0x8c +#define PMBUS_READ_TEMP1 0x8d +#define PMBUS_READ_TEMP2 0x8e +#define PMBUS_READ_TEMP3 0x8f +#define PMBUS_READ_FAN1 0x90 +#define PMBUS_READ_FAN2 0x91 +#define PMBUS_READ_POUT 0x96 +#define PMBUS_READ_PIN 0x97 +#define PMBUS_READ_MFR_ID 0x99 +#define PMBUS_READ_MFR_MODEL 0x9a +#define PMBUS_READ_MFR_REV 0x9b +#define PMBUS_READ_MFR_LOC 0x9c +#define PMBUS_READ_MFR_DATE 0x9d +#define PMBUS_READ_MFR_SERIAL 0x9e + +#define DEFAULT_MFR_FAIL_STR "NA" + +static int retrys = 1; +module_param(retrys, int, 0); +MODULE_PARM_DESC(retrys, "Inventec PSU driver read retry times (default 1)."); + +static int read_only_once = 0; +module_param(read_only_once, int, 0); +MODULE_PARM_DESC(read_only_once, "Inventec PSU driver MFR field read only once flag (default 0)."); + +#define FAN_NUM 2 +#define TMP_NUM 3 + +struct psu_data { + struct device *hwmon_dev; + s32 vin; + s32 vout; + s32 cin; + s32 cout; + s32 pin; + s32 pout; + s32 vout_mode; + s32 rpm[FAN_NUM]; + s32 temp[TMP_NUM]; + s32 pwm; + u8 id[I2C_SMBUS_BLOCK_MAX + 2]; + u8 model[I2C_SMBUS_BLOCK_MAX + 2]; + u8 revision[I2C_SMBUS_BLOCK_MAX + 2]; + u8 location[I2C_SMBUS_BLOCK_MAX + 2]; + u8 date[I2C_SMBUS_BLOCK_MAX + 2]; + u8 serial[I2C_SMBUS_BLOCK_MAX + 2]; +}; + +static s32 reg2data_linear(s32 value, s32 mode, u8 reg) +{ + s16 exponent; + s32 mantissa; + s32 val; + + if (mode) { + s32 parameter = (mode & 0x1f); + exponent = (parameter & 0x10) ? - ((32 - parameter) & 0xf) : (parameter & 0xf); + mantissa = (u16) value; + } else { + exponent = ((s16)value) >> 11; + mantissa = ((s16)((value & 0x7ff) << 5)) >> 5; + } + + val = mantissa; + + if (reg != PMBUS_READ_FAN1 && reg != PMBUS_READ_FAN2 && reg != PMBUS_FAN_PWM) + val = val * 1000; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +static void get_vout_mode(struct i2c_client *client, s32 clean) +{ + struct psu_data *data = i2c_get_clientdata(client); + s32 read = 0, trys = 0; + + if (clean) { + data->vout_mode = 0; + return; + } + + if (data->vout_mode) + return; + + while (trys <= retrys) { + read = i2c_smbus_read_byte_data(client, PMBUS_VOUT_MODE); + if (read < 0) { + trys++; + if (trys > retrys) + return; + continue; + } + break; + } + + data->vout_mode = read; +} + +static ssize_t read_voltage_out(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 vout = 0, vout_mode = 0, trys = 0; + + while (trys <= retrys) { + + vout = i2c_smbus_read_word_data(client, PMBUS_READ_VOUT); + if (vout < 0) { + trys++; + if (trys > retrys) goto fail; + get_vout_mode(client, 1); + continue; + } + + get_vout_mode(client, 0); + + break; + } + + data->vout = reg2data_linear(vout, vout_mode, PMBUS_READ_VOUT); + + return sprintf(buf, "%d\n", data->vout); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_voltage_in(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 vin = 0, trys = 0; + + while (trys <= retrys) { + + vin = i2c_smbus_read_word_data(client, PMBUS_READ_VIN); + if (vin < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->vin = reg2data_linear(vin, 0, PMBUS_READ_VIN); + + return sprintf(buf, "%d\n", data->vin); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_current_in(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 cin = 0, trys = 0; + + while (trys <= retrys) { + + cin = i2c_smbus_read_word_data(client, PMBUS_READ_IIN); + if (cin < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->cin = reg2data_linear(cin, 0, PMBUS_READ_IIN); + + return sprintf(buf, "%d\n", data->cin); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_current_out(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 cout = 0, trys = 0; + + while (trys <= retrys) { + + cout = i2c_smbus_read_word_data(client, PMBUS_READ_IOUT); + if (cout < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->cout = reg2data_linear(cout, 0, PMBUS_READ_IOUT); + + return sprintf(buf, "%d\n", data->cout); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_power_in(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 pin = 0, trys = 0; + + while (trys <= retrys) { + + pin = i2c_smbus_read_word_data(client, PMBUS_READ_PIN); + if (pin < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->pin = reg2data_linear(pin, 0, PMBUS_READ_PIN); + + return sprintf(buf, "%d\n", data->pin); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_power_out(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 pout = 0, trys = 0; + + while (trys <= retrys) { + + pout = i2c_smbus_read_word_data(client, PMBUS_READ_POUT); + if (pout < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->pout = reg2data_linear(pout, 0, PMBUS_READ_POUT); + + return sprintf(buf, "%d\n", data->pout); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_temp(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + u8 nr = attr->index; + + while (trys <= retrys) { + + temp = i2c_smbus_read_word_data(client, PMBUS_READ_TEMP1 + nr); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->temp[nr] = reg2data_linear(temp, 0, PMBUS_READ_TEMP1 + nr); + + return sprintf(buf, "%d\n", data->temp[nr]); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_fan(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 rpm = 0, trys = 0; + u8 nr = attr->index; + + while (trys <= retrys) { + + rpm = i2c_smbus_read_word_data(client, PMBUS_READ_FAN1 + nr); + if (rpm < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->rpm[nr] = reg2data_linear(rpm, 0, PMBUS_READ_FAN1 + nr); + + return sprintf(buf, "%d\n", data->rpm[nr]); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t read_pwm(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 pwm = 0, trys = 0; + + while (trys <= retrys) { + + pwm = i2c_smbus_read_word_data(client, PMBUS_FAN_PWM); + if (pwm < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->pwm = reg2data_linear(pwm, 0, PMBUS_FAN_PWM); + + return sprintf(buf, "%d\n", data->pwm); + +fail: + return sprintf(buf, "0\n"); +} + +static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + u16 pwm = simple_strtol(buf, NULL, 10); + if(pwm > 100) pwm = 100; + + while (trys <= retrys) { + + temp = i2c_smbus_write_word_data(client, PMBUS_FAN_PWM, pwm); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->pwm = pwm; + + return count; + +fail: + return -1; +} + +static ssize_t read_mfr_id(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->id[0] != 0) + return sprintf(buf, "%s\n", data->id); + + while (trys <= retrys) { + + temp = i2c_smbus_read_block_data(client, PMBUS_READ_MFR_ID, data->id); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + return sprintf(buf, "%s\n", data->id); + +fail: + memset(data->id, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_model(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->model[0] != 0) + return sprintf(buf, "%s\n", data->model); + + while (trys <= retrys) { + + temp = i2c_smbus_read_block_data(client, PMBUS_READ_MFR_MODEL, data->model); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + return sprintf(buf, "%s\n", data->model); + +fail: + memset(data->model, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_revision(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->revision[0] != 0) + return sprintf(buf, "%s\n", data->revision); + + while (trys <= retrys) { + + temp = i2c_smbus_read_block_data(client, PMBUS_READ_MFR_REV, data->revision); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + return sprintf(buf, "%s\n", data->revision); + +fail: + memset(data->revision, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_location(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->location[0] != 0) + return sprintf(buf, "%s\n", data->location); + + while (trys <= retrys) { + + temp = i2c_smbus_read_block_data(client, PMBUS_READ_MFR_LOC, data->location); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + return sprintf(buf, "%s\n", data->location); + +fail: + memset(data->location, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_date(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->date[0] != 0) + return sprintf(buf, "%s\n", data->date); + + while (trys <= retrys) { + + temp = i2c_smbus_read_block_data(client, PMBUS_READ_MFR_DATE, data->date); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + return sprintf(buf, "%s\n", data->date); + +fail: + memset(data->date, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static ssize_t read_mfr_sn(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + s32 temp = 0, trys = 0; + + if (read_only_once && data->serial[0] != 0) + return sprintf(buf, "%s\n", data->serial); + + while (trys <= retrys) { + + temp = i2c_smbus_read_block_data(client, PMBUS_READ_MFR_SERIAL, data->serial); + if (temp < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + return sprintf(buf, "%s\n", data->serial); + +fail: + memset(data->serial, 0, I2C_SMBUS_BLOCK_MAX + 2); + return sprintf(buf, "%s\n", DEFAULT_MFR_FAIL_STR); +} + +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, read_voltage_in, 0, 0); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, read_voltage_out, 0, 0); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, read_current_in, 0, 0); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, read_current_out, 0, 0); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, read_power_in, 0, 0); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, read_power_out, 0, 0); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, read_temp, 0, 0); +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, read_temp, 0, 1); +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, read_temp, 0, 2); +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, read_fan, 0, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, read_fan, 0, 1); +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, read_pwm, set_pwm, 0); +static SENSOR_DEVICE_ATTR(mfr_id, S_IRUGO, read_mfr_id, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_model, S_IRUGO, read_mfr_model, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_revision, S_IRUGO, read_mfr_revision, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_location, S_IRUGO, read_mfr_location, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_date, S_IRUGO, read_mfr_date, 0, 0); +static SENSOR_DEVICE_ATTR(mfr_serial_number, S_IRUGO, read_mfr_sn, 0, 0); + +static struct attribute *psu_attributes[] = { + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_mfr_id.dev_attr.attr, + &sensor_dev_attr_mfr_model.dev_attr.attr, + &sensor_dev_attr_mfr_revision.dev_attr.attr, + &sensor_dev_attr_mfr_location.dev_attr.attr, + &sensor_dev_attr_mfr_date.dev_attr.attr, + &sensor_dev_attr_mfr_serial_number.dev_attr.attr, + NULL +}; + +static const struct attribute_group psu_group = { + .attrs = psu_attributes, +}; + +/*-----------------------------------------------------------------------*/ +/* device probe and removal */ +static int +inv_psu_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct psu_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &psu_group); + + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &psu_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int inv_psu_remove(struct i2c_client *client) +{ + struct psu_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &psu_group); + hwmon_device_unregister(data->hwmon_dev); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id inv_psu_ids[] = { + { "inv_psu" , 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, inv_psu_ids); + +static struct i2c_driver psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_psu", + }, + .probe = inv_psu_probe, + .remove = inv_psu_remove, + .id_table = inv_psu_ids, +}; + +static int __init inv_psu_init(void) +{ + return i2c_add_driver(&psu_driver); +} + +static void __exit inv_psu_exit(void) +{ + i2c_del_driver(&psu_driver); +} + +MODULE_AUTHOR("Roger Chang "); +MODULE_DESCRIPTION("inventec psu driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_psu_init); +module_exit(inv_psu_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_pthread.c b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_pthread.c new file mode 100644 index 00000000000..878eb9659a4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_pthread.c @@ -0,0 +1,1509 @@ +/***************************** + Sequoia platform +******************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define INV_PTHREAD_KERNEL_MODULE + +#define SHOW_ATTR_WARNING ("N/A") +#define SHOW_ATTR_NOTPRINT ("Not Available") +#define SHOW_ATTR_NOTSUPPORT ("Not Support") + +#define INV_HWMID_MAX (10) +#define INV_HWMID_INIT (-1) + +/*access userspace data to kernel space*/ +#define ACC_R (0) +#define ACC_W (1) + +#define TINY_BUF_SIZE (8) +#define MAX_PATH_SIZE (64) +#define MIN_ACC_SIZE (32) +#define MAX_ACC_SIZE (256) + +/************************* + * LED definitions + ************************/ +#define SINGLE_STATUS_LED 0 // 1:true 0:false(4 status leds) + +#define STATUS_LED_MODE_AUTO 0 +#define STATUS_LED_MODE_DIAG 1 +#define STATUS_LED_MODE_MANU 2 + +#define STATUS_LED_GRN0 10 // 0 - 000: off +#define STATUS_LED_GRN1 11 // 1 - 001: 0.5hz +#define STATUS_LED_GRN2 12 // 2 - 010: 1 hz +#define STATUS_LED_GRN3 13 // 3 - 011: 2 hz +#define STATUS_LED_GRN7 17 // 7 - 111: on +#define STATUS_LED_RED0 20 // 0 - 000: off +#define STATUS_LED_RED1 21 // 1 - 001: 0.5hz +#define STATUS_LED_RED2 22 // 2 - 010: 1 hz +#define STATUS_LED_RED3 23 // 3 - 011: 2 hz +#define STATUS_LED_RED7 27 // 7 - 111: on +#define STATUS_LED_INVALID -1 // Invalid + +// led code for psu, fan, beacon +#define STATUS_LED_OFF ("0") // 0 -- 00: off +#define STATUS_LED_GRN ("1") // 1 -- 01: green +#define STATUS_LED_RED ("2") // 2 -- 10: red +#define STATUS_LED_AMBER ("3") // 3 -- 11: amber + +#define STATUS_SYS_LED ("sys_led") +#define STATUS_FAN_LED ("fan_led") +#define STATUS_PSU_LED ("psu_led") +#define STATUS_BEACON_LED ("beacon_led") + +#if SINGLE_STATUS_LED +ssize_t status_led_grn(const char *freq); +ssize_t status_led_red(const char *freq); +int status_led_check_color(void); +ssize_t status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2); +ssize_t status_led_diag_mode_enable(void); +ssize_t status_led_diag_mode_disable(void); +#else +static int sys_led_grn = 1; +static int fan_led_grn = 1; +static int psu_led_grn = 1; +ssize_t set_status_led(const char *color, const char *led_type); +int status_led_check_color(const char *led_type); +#endif +int status_led_check_diag_mode(void); + + +#if 1 +/* For timestamps in SYSFS_LOG */ +#define SYSFS_LOG printk +#else +//#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[SYSFS] %s/%d: " fmt, __func__, __LINE__, ##args) +#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[p_thread] " fmt, ##args) +#endif + + +/* inventec_class *********************************/ +static struct mutex rw_lock; + +static int hwm_psoc = INV_HWMID_INIT; +static int hwm_cpld = INV_HWMID_INIT; +static int hwm_cpld2 = INV_HWMID_INIT; + +int get_hwm_psoc(void) +{ + return hwm_psoc; +} + +int get_hwm_cpld(void) +{ + return hwm_cpld; +} + +static ssize_t access_user_space(const char *name, int mode, char *buf, size_t len, loff_t offset) +{ + struct file *fp; + mm_segment_t fs; + loff_t pos = offset; + char *mark = NULL; + ssize_t vfs_ret = 0; + + if (mode == ACC_R) { + fp = filp_open(name, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_read(fp, buf, len, &pos); + + mark = strpbrk(buf, "\n"); + if (mark) + *mark = '\0'; + + filp_close(fp, NULL); + set_fs(fs); + } else if (mode == ACC_W) { + fp = filp_open(name, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_write(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + } + + return vfs_ret; +} + +int inventec_strtol(const char *sbufp, char **endp, unsigned int base) +{ + char *endptr; + int value = simple_strtol(sbufp, &endptr, base); + + if (value == 0 && sbufp == endptr) { + *endp = NULL; + return value; + } + *endp = (char*)1; + return value; +} + +int inventec_singlechar_to_int(const char c) +{ + if ((c >= '0') && (c <= '9')) { + return (c - '0'); + } + else if ((c >= 'a') && (c <= 'f')) { + return (c - 'a' + 10); + } + else if ((c >= 'A') && (c <= 'F')) { + return (c - 'A' + 10); + } + return -1; +} + +int inventec_store_input(char *inputp, int count) +{ + int i = 0; + while(inputp[i] != '\n' && inputp[i] != '\0' && i < count) { + i++; + } + inputp[i] = '\0'; + return strlen(inputp); +} + +#if 0 +/* + * Time stamps for kernel log on yocto + */ +#include + +void SYSFS_LOG(char *fmt, ...) +{ + char buf[80], ts[32]; + va_list args; + int hlen; + + inventec_tmstmp(&ts[0]); + hlen = sprintf(buf, "[SYSFS] %s ", ts); // Do not edit this line + + va_start(args, fmt); + vsprintf(&buf[hlen-1], fmt, args); + va_end(args); + printk(KERN_WARNING "[p_thread] %s\n", buf); +} +#endif + +ssize_t +inventec_show_attr(char *buf_p, const char *invdevp) +{ + int inv_len = MAX_ACC_SIZE; /* INV driver return max length */ + char tmp_buf[MAX_ACC_SIZE]; + char *str_negative = "-", *mark = NULL; + + /* [Step2] Get data by uaccess */ + memset(tmp_buf, 0, sizeof(tmp_buf)); + mutex_lock(&rw_lock); + if (access_user_space(invdevp, ACC_R, tmp_buf, inv_len, 0) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + mutex_unlock(&rw_lock); + + /* [Step3] Check return value + * - Ex: When transceiver not plugged + * => SWPS return error code "-202" + * => Pic8 need return "NA" (assume) + */ + if (strcspn(tmp_buf, str_negative) == 0) { + /* error case: "-202" */ + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + + /* OK case:*/ + mark = strpbrk(tmp_buf, "\n"); + if (mark) { *mark = '\0'; } + + return sprintf(buf_p, "%s\n", tmp_buf); +} + +ssize_t +inventec_store_attr(const char *buf_p, size_t count, const char *invdevp) +{ + ssize_t ret = 0; + + /* [Step2] Get data by uaccess */ + mutex_lock(&rw_lock); + if ((ret = access_user_space(invdevp, ACC_W, (char*)buf_p, count, 0)) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return -EINVAL; + } + mutex_unlock(&rw_lock); + + /* OK case:*/ + return ret; +} + +int sysfs_detect_hwmon_index(void) +{ + char hwmon_buf[MAX_ACC_SIZE]; + char hwmon_path[MAX_PATH_SIZE]; + int hwid = 0; + + for (hwid = 0; hwid < INV_HWMID_MAX && (hwm_psoc == INV_HWMID_INIT || hwm_cpld == INV_HWMID_INIT); hwid++) { + memset(hwmon_buf, 0, sizeof(hwmon_buf)); + sprintf(hwmon_path, "/sys/class/hwmon/hwmon%d/name", hwid); + + inventec_show_attr(hwmon_buf, hwmon_path); + if (strncmp(hwmon_buf, "inv_psoc", 8) == 0) { + hwm_psoc = hwid; + } + else if (strncmp(hwmon_buf, "inv_bmc", 7) == 0) { + hwm_psoc = hwid; + } + + sprintf(hwmon_path, "/sys/class/hwmon/hwmon%d/device/name", hwid); + inventec_show_attr(hwmon_buf, hwmon_path); + if (strncmp(hwmon_buf, "inv_cpld2", 9) == 0) { + hwm_cpld2 = hwid; + } + else if (strncmp(hwmon_buf, "inv_cpld", 8) == 0) { + hwm_cpld = hwid; + } + } + + if (hwid >= INV_HWMID_MAX) { + printk(KERN_ERR "[p_thread] detect hwmon index failed, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return -1; + } + printk(KERN_INFO "[p_thread] detect hwmon index success, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return 0; +} + +static int __init +inventec_class_init(void) +{ + mutex_init(&rw_lock); + +#ifdef INV_PTHREAD_KERNEL_MODULE + if (sysfs_detect_hwmon_index() < 0) { + return -1; + } +#endif + + printk(KERN_INFO "[p_thread] [%s/%d] Module initial success.\n",__func__,__LINE__); + + return 0; +} + +static void __exit +inventec_class_exit(void) +{ + printk(KERN_INFO "[p_thread] [%s/%d] Remove module.\n",__func__,__LINE__); +} + + +/****************************************************************** + fan device +******************************************************************/ +#define FAN_DEV_PATH_STATE "/sys/class/hwmon/hwmon%d/fan_gpi" +#define FAN_DEV_PATH_FAN1_INPUT "/sys/class/hwmon/hwmon%d/fan1_input" +#define FAN_DEV_PATH_FAN2_INPUT "/sys/class/hwmon/hwmon%d/fan2_input" +#define FAN_DEV_PATH_FAN3_INPUT "/sys/class/hwmon/hwmon%d/fan3_input" +#define FAN_DEV_PATH_FAN4_INPUT "/sys/class/hwmon/hwmon%d/fan4_input" +#define FAN_DEV_PATH_FAN5_INPUT "/sys/class/hwmon/hwmon%d/fan5_input" +#define FAN_DEV_PATH_FAN6_INPUT "/sys/class/hwmon/hwmon%d/fan6_input" +#define FAN_DEV_PATH_FAN7_INPUT "/sys/class/hwmon/hwmon%d/fan7_input" +#define FAN_DEV_PATH_FAN8_INPUT "/sys/class/hwmon/hwmon%d/fan8_input" + +static char fan_dev_path_state[MAX_PATH_SIZE]; +static char fan_dev_path_fan1_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan2_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan3_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan4_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan5_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan6_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan7_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan8_input[MAX_PATH_SIZE]; + +void sysfs_fan_path_init(void) +{ + sprintf(&fan_dev_path_state[0], FAN_DEV_PATH_STATE, get_hwm_psoc()); + sprintf(&fan_dev_path_fan1_input[0],FAN_DEV_PATH_FAN1_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan2_input[0],FAN_DEV_PATH_FAN2_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan3_input[0],FAN_DEV_PATH_FAN3_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan4_input[0],FAN_DEV_PATH_FAN4_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan5_input[0],FAN_DEV_PATH_FAN5_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan6_input[0],FAN_DEV_PATH_FAN6_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan7_input[0],FAN_DEV_PATH_FAN7_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan8_input[0],FAN_DEV_PATH_FAN8_INPUT, get_hwm_psoc()); +} + +// fan state +#define FAN_STATE_NORMAL "normal" +#define FAN_STATE_FAULTY "faulty" +#define FAN_STATE_UNINSTALLED "uninstalled" +#define FAN_STATE_UNKNOW "unknown state" +#define FAN_STATE_INVALID "Invalid state value" +#define FAN_STATE_READ_ERROR "state read error" + +#define FAN_STATE_RETRY 3 + +// fan module change event +#define FAN_LOG_UNINSTALLED "removed" +#define FAN_LOG_NORMAL "inserted" + +// fan state bit check +#define FAN_STATE_BIT_FAULTY 0 +#define FAN_STATE_BIT_UNINSTALLED 1 +#define FAN_STATE_BIT_UNKNOW 2 +#define FAN_STATE_BIT_INVALID 3 +#define FAN_STATE_BIT_READ_ERROR 4 + +static struct fans_tbl_s { + char *fan_name; + char *fan_front; + char *fan_rear; + unsigned int fan_state; + int retry; +} fans_tbl[] = { + {"fan1", fan_dev_path_fan1_input, fan_dev_path_fan2_input, 0, 0}, + {"fan2", fan_dev_path_fan3_input, fan_dev_path_fan4_input, 0, 0}, + {"fan3", fan_dev_path_fan5_input, fan_dev_path_fan6_input, 0, 0}, + {"fan4", fan_dev_path_fan7_input, fan_dev_path_fan8_input, 0, 0}, +}; + +#define FAN_TBL_TOTAL ( sizeof(fans_tbl)/ sizeof(const struct fans_tbl_s) ) + +#define FAN_STATE_CHECK(i,b) (fans_tbl[i].fan_state & (1<inv_dev_attrp, PSU_ATTR_VOLTIN, PSU_ATTR_VOLTIN_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_VOLTIN, psu_dev_group[i].psu_name, NULL); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_DEBUG "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(volt, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + continue; + } + else { + voltin = simple_strtol(&volt[0], NULL, 10); + printk(KERN_DEBUG "[p_thread] Read %s %s = %u\n", acc_path, volt, voltin); + if (voltin > psu_voltin) { + psu_voltin = voltin; + } + } + } + } + } + + SYSFS_LOG("[p_thread] PSU voltin = %u\n", psu_voltin); +} + +#define PSU_ATTR_STATE ("state") +#define PSU_ATTR_STATE_LEN (5) + +/* psus_control() by inv_thread */ +int psus_control(int log_only) +{ + char acc_path[MAX_PATH_SIZE], state[MIN_ACC_SIZE]; + psu_dev_t *devnamep = NULL; + char *invwirep = NULL; + char *psu_statep = NULL; + int i, j, flag = 0; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_STATE, PSU_ATTR_STATE_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_STATE, psu_dev_group[i].psu_name, &psu_statep); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_INFO "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(state, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + if (strncmp(psu_statep, PSU_STATE_ERROR, strlen(PSU_STATE_ERROR)) != 0) { + strcpy(psu_statep, PSU_STATE_ERROR); + SYSFS_LOG("[p_thread] %s: %s\n", psu_dev_group[i].psu_name, PSU_STATE_ERROR); + } + flag = 1; + } + else if (strstr(state, "normal")) { + //printk(KERN_INFO "[p_thread] %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG(KERN_INFO "[p_thread] %s: %s\n", psu_dev_group[i].psu_name, state); + } + } + else if (psu_voltin > PSU_VOLTIN_ACDC) { + /* AC PSUS */ + //printk(KERN_INFO "[p_thread] RYU: %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n", psu_dev_group[i].psu_name, state); + } + flag = 1; + } + else { + /* DC PSUS */ + if (strncmp(psu_statep, PSU_STATE_CHECKPSU, PSU_STATE_LEN_CHECKPSU) != 0) { + strcpy(psu_statep, PSU_STATE_CHECKPSU); + SYSFS_LOG("[p_thread] %s: %s\n", psu_dev_group[i].psu_name, PSU_STATE_CHECKPSU); + } + flag = 1; + } + } + } + } + + if (log_only) { + return 0; + } + + //SYSFS_LOG("[p_thread] RYU: %s: flag = %d\n",psu_wire_tbl[i].psu_name,flag); + if (flag == 1) { +#if SINGLE_STATUS_LED + status_led_grn("3"); + return 1; + } +#else + set_status_led(STATUS_LED_AMBER, STATUS_PSU_LED); + psu_led_grn = 0; + return 1; + } + else { + if (status_led_check_color(STATUS_PSU_LED)) + set_status_led(STATUS_LED_GRN, STATUS_PSU_LED); + psu_led_grn = 1; + } +#endif + + return 0; +} +/* End of psuinfo_device */ + +static int __init +psu_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_psu_path_init(); +#endif + return 0; +} + +static void __exit +psu_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove psu module.\n"); +} + + +/****************************************************************** + led device +******************************************************************/ +#if SINGLE_STATUS_LED +#define STATUS_LED_GRN_PATH "/sys/class/hwmon/hwmon%d/device/grn_led" +#define STATUS_LED_RED_PATH "/sys/class/hwmon/hwmon%d/device/red_led" + +#define FAN_LED_GRN1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn1" +#define FAN_LED_GRN2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn2" +#define FAN_LED_GRN3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn3" +#define FAN_LED_GRN4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn4" +#define FAN_LED_RED1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red1" +#define FAN_LED_RED2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red2" +#define FAN_LED_RED3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red3" +#define FAN_LED_RED4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red4" + +static char status_led_grn_path[MAX_PATH_SIZE]; +static char status_led_red_path[MAX_PATH_SIZE]; +static char fan_led_grn1_path[MAX_PATH_SIZE]; +static char fan_led_grn2_path[MAX_PATH_SIZE]; +static char fan_led_grn3_path[MAX_PATH_SIZE]; +static char fan_led_grn4_path[MAX_PATH_SIZE]; +static char fan_led_red1_path[MAX_PATH_SIZE]; +static char fan_led_red2_path[MAX_PATH_SIZE]; +static char fan_led_red3_path[MAX_PATH_SIZE]; +static char fan_led_red4_path[MAX_PATH_SIZE]; + +// diag +#define HWMON_DEVICE_DIAG_PATH "/sys/class/hwmon/hwmon%d/device/diag" +#define HWMON_DEVICE_CTRL_PATH "/sys/class/hwmon/hwmon%d/device/ctl" +static char hwmon_device_diag_path[MAX_PATH_SIZE]; +static char hwmon_device_ctrl_path[MAX_PATH_SIZE]; + +void sysfs_led_path_init(void) +{ + sprintf(&status_led_grn_path[0], STATUS_LED_GRN_PATH, get_hwm_cpld()); + sprintf(&status_led_red_path[0], STATUS_LED_RED_PATH, get_hwm_cpld()); + sprintf(&fan_led_grn1_path[0], FAN_LED_GRN1_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn2_path[0], FAN_LED_GRN2_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn3_path[0], FAN_LED_GRN3_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn4_path[0], FAN_LED_GRN4_PATH, get_hwm_psoc()); + sprintf(&fan_led_red1_path[0], FAN_LED_RED1_PATH, get_hwm_psoc()); + sprintf(&fan_led_red2_path[0], FAN_LED_RED2_PATH, get_hwm_psoc()); + sprintf(&fan_led_red3_path[0], FAN_LED_RED3_PATH, get_hwm_psoc()); + sprintf(&fan_led_red4_path[0], FAN_LED_RED4_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_diag_path[0], HWMON_DEVICE_DIAG_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_ctrl_path[0], HWMON_DEVICE_CTRL_PATH, get_hwm_cpld()); +} + +int +status_led_check_color(void) +{ + char tmpbuf[MIN_ACC_SIZE]; + int ret = STATUS_LED_INVALID; + + if (inventec_show_attr(&tmpbuf[0], status_led_grn_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_GRN0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_GRN1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_GRN2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_GRN3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_GRN7; + } + return ret; + } + + if (inventec_show_attr(&tmpbuf[0], status_led_red_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_RED0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_RED1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_RED2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_RED3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_RED7; + } + return ret; + } + return ret; +} +#else // else SINGLE_STATUS_LED + +// sys led +#define SYS_STATUS_LED_GRN_PATH "/sys/class/hwmon/hwmon%d/device/sys_grn_led" +static char sys_status_led_grn_path[MAX_PATH_SIZE]; + +// fan led +#define FAN_STATUS_LED_GRN_PATH "/sys/class/hwmon/hwmon%d/device/fan_grn_led" +#define FAN_STATUS_LED_RED_PATH "/sys/class/hwmon/hwmon%d/device/fan_red_led" +#define FAN_STATUS_LED_AMBER_PATH "/sys/class/hwmon/hwmon%d/device/fan_amber_led" +#define FAN_MODULE_LED_GRN1_PATH "/sys/class/hwmon/hwmon%d/fan_led_grn1" +#define FAN_MODULE_LED_GRN2_PATH "/sys/class/hwmon/hwmon%d/fan_led_grn2" +#define FAN_MODULE_LED_GRN3_PATH "/sys/class/hwmon/hwmon%d/fan_led_grn3" +#define FAN_MODULE_LED_GRN4_PATH "/sys/class/hwmon/hwmon%d/fan_led_grn4" +#define FAN_MODULE_LED_RED1_PATH "/sys/class/hwmon/hwmon%d/fan_led_red1" +#define FAN_MODULE_LED_RED2_PATH "/sys/class/hwmon/hwmon%d/fan_led_red2" +#define FAN_MODULE_LED_RED3_PATH "/sys/class/hwmon/hwmon%d/fan_led_red3" +#define FAN_MODULE_LED_RED4_PATH "/sys/class/hwmon/hwmon%d/fan_led_red4" +static char fan_status_led_grn_path[MAX_PATH_SIZE]; +static char fan_status_led_red_path[MAX_PATH_SIZE]; +static char fan_status_led_amber_path[MAX_PATH_SIZE]; +static char fan_module_led_grn1_path[MAX_PATH_SIZE]; +static char fan_module_led_grn2_path[MAX_PATH_SIZE]; +static char fan_module_led_grn3_path[MAX_PATH_SIZE]; +static char fan_module_led_grn4_path[MAX_PATH_SIZE]; +static char fan_module_led_red1_path[MAX_PATH_SIZE]; +static char fan_module_led_red2_path[MAX_PATH_SIZE]; +static char fan_module_led_red3_path[MAX_PATH_SIZE]; +static char fan_module_led_red4_path[MAX_PATH_SIZE]; + +// psu led +#define PSU_STATUS_LED_GRN_PATH "/sys/class/hwmon/hwmon%d/device/psu_grn_led" +#define PSU_STATUS_LED_RED_PATH "/sys/class/hwmon/hwmon%d/device/psu_red_led" +#define PSU_STATUS_LED_AMBER_PATH "/sys/class/hwmon/hwmon%d/device/psu_amber_led" +static char psu_status_led_grn_path[MAX_PATH_SIZE]; +static char psu_status_led_red_path[MAX_PATH_SIZE]; +static char psu_status_led_amber_path[MAX_PATH_SIZE]; + +// diag +#define HWMON_DEVICE_DIAG_PATH "/sys/class/hwmon/hwmon%d/device/diag" +//#define HWMON_DEVICE_CTRL_PATH "/sys/class/hwmon/hwmon%d/device/ctl" +static char hwmon_device_diag_path[MAX_PATH_SIZE]; +//static char hwmon_device_ctrl_path[MAX_PATH_SIZE]; + +void sysfs_led_path_init(void) +{ + // sys + sprintf(&sys_status_led_grn_path[0], SYS_STATUS_LED_GRN_PATH, get_hwm_cpld()); + // fan + sprintf(&fan_status_led_grn_path[0], FAN_STATUS_LED_GRN_PATH, get_hwm_cpld()); + sprintf(&fan_status_led_red_path[0], FAN_STATUS_LED_RED_PATH, get_hwm_cpld()); + sprintf(&fan_status_led_amber_path[0], FAN_STATUS_LED_AMBER_PATH, get_hwm_cpld()); + sprintf(&fan_module_led_grn1_path[0], FAN_MODULE_LED_GRN1_PATH, get_hwm_psoc()); + sprintf(&fan_module_led_grn2_path[0], FAN_MODULE_LED_GRN2_PATH, get_hwm_psoc()); + sprintf(&fan_module_led_grn3_path[0], FAN_MODULE_LED_GRN3_PATH, get_hwm_psoc()); + sprintf(&fan_module_led_grn4_path[0], FAN_MODULE_LED_GRN4_PATH, get_hwm_psoc()); + sprintf(&fan_module_led_red1_path[0], FAN_MODULE_LED_RED1_PATH, get_hwm_psoc()); + sprintf(&fan_module_led_red2_path[0], FAN_MODULE_LED_RED2_PATH, get_hwm_psoc()); + sprintf(&fan_module_led_red3_path[0], FAN_MODULE_LED_RED3_PATH, get_hwm_psoc()); + sprintf(&fan_module_led_red4_path[0], FAN_MODULE_LED_RED4_PATH, get_hwm_psoc()); + // psu + sprintf(&psu_status_led_grn_path[0], PSU_STATUS_LED_GRN_PATH, get_hwm_cpld()); + sprintf(&psu_status_led_red_path[0], PSU_STATUS_LED_RED_PATH, get_hwm_cpld()); + sprintf(&psu_status_led_amber_path[0], PSU_STATUS_LED_AMBER_PATH, get_hwm_cpld()); + // diag + sprintf(&hwmon_device_diag_path[0], HWMON_DEVICE_DIAG_PATH, get_hwm_psoc()); +// sprintf(&hwmon_device_ctrl_path[0], HWMON_DEVICE_CTRL_PATH, get_hwm_cpld()); +} + +int +status_led_check_color(const char *led_type) +{ +// char tmpbuf[MIN_ACC_SIZE]; + int ret = 0; + + if (led_type == STATUS_FAN_LED) { + if (fan_led_grn != 1) { + ret = 1; + } + } + else if (led_type == STATUS_PSU_LED) { + if (psu_led_grn != 1) { + ret = 1; + } + } + return ret; + +/* + if (inventec_show_attr(&tmpbuf[0], fan_status_led_grn_path) > 0) { + if (tmpbuf[0] == STATUS_LED_GRN) { + ret = STATUS_LED_GRN0; + } + if (tmpbuf[0] == STATUS_LED_RED) { + ret = STATUS_LED_GRN1; + } + if (tmpbuf[0] == STATUS_LED_AMBER) { + ret = STATUS_LED_GRN2; + } + } + + if (inventec_show_attr(&tmpbuf[0], fan_status_led_amber_path) > 0) { + if (tmpbuf[0] == STATUS_LED_GRN) { + ret = STATUS_LED_GRN0; + } + if (tmpbuf[0] == STATUS_LED_RED) { + ret = STATUS_LED_GRN1; + } + if (tmpbuf[0] == STATUS_LED_AMBER) { + ret = STATUS_LED_GRN2; + } + } + + if (inventec_show_attr(&tmpbuf[0], fan_status_led_red_path) > 0) { + if (tmpbuf[0] == STATUS_LED_GRN) { + ret = STATUS_LED_GRN0; + } + if (tmpbuf[0] == STATUS_LED_RED) { + ret = STATUS_LED_GRN1; + } + if (tmpbuf[0] == STATUS_LED_AMBER) { + ret = STATUS_LED_GRN2; + } + } +*/ +} +#endif //end of SINGLE_STATUS_LED + + +#if SINGLE_STATUS_LED +/* + * Store attr Section + */ +static DEFINE_MUTEX(diag_mutex); + +ssize_t status_led_diag_mode_enable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '0') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("1", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + mutex_unlock(&diag_mutex); + } + + return ret; +} + +ssize_t status_led_diag_mode_disable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '1') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("0", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + mutex_unlock(&diag_mutex); + } + return 1; +} + +ssize_t +status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2) +{ + ssize_t ret; + + ret = inventec_store_attr(tmp1, strlen(tmp1), path1); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(tmp2, strlen(tmp2), path2); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_red(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr(STATUS_LED_OFF, 1, &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_grn(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr(STATUS_LED_OFF, 1, &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} +#else // else SINGLE_STATUS_LED + +ssize_t +set_status_led(const char *color, const char *led_type) +{ + ssize_t ret; + char *grn_path; + char *red_path; + char *amber_path; + + if (led_type == STATUS_FAN_LED) { + grn_path = &fan_status_led_grn_path[0]; + red_path = &fan_status_led_red_path[0]; + amber_path = &fan_status_led_amber_path[0]; + } + else if (led_type == STATUS_PSU_LED) { + grn_path = &psu_status_led_grn_path[0]; + red_path = &psu_status_led_red_path[0]; + amber_path = &psu_status_led_amber_path[0]; + } + else if (led_type == STATUS_SYS_LED) { + grn_path = &sys_status_led_grn_path[0]; + if ((ret = inventec_store_attr(STATUS_LED_GRN, 1, grn_path)) < 0) { return ret; } + } + else { + return -1; + } + + if (color == STATUS_LED_GRN) { + if ((ret = inventec_store_attr(STATUS_LED_OFF, 1, red_path)) < 0) { return ret; } + if ((ret = inventec_store_attr(STATUS_LED_OFF, 1, amber_path)) < 0) { return ret; } + if ((ret = inventec_store_attr(STATUS_LED_GRN, 1, grn_path)) < 0) { return ret; } + } + else if (color == STATUS_LED_AMBER) { + if ((ret = inventec_store_attr(STATUS_LED_OFF, 1, grn_path)) < 0) { return ret; } + if ((ret = inventec_store_attr(STATUS_LED_OFF, 1, red_path)) < 0) { return ret; } + if ((ret = inventec_store_attr(STATUS_LED_AMBER, 1, amber_path)) < 0) { return ret; } + } + else if (color == STATUS_LED_RED) { + if ((ret = inventec_store_attr(STATUS_LED_OFF, 1, grn_path)) < 0) { return ret; } + if ((ret = inventec_store_attr(STATUS_LED_OFF, 1, amber_path)) < 0) { return ret; } + if ((ret = inventec_store_attr(STATUS_LED_RED, 1, red_path)) < 0) { return ret; } + } + else { + ret = -1; + } +/* + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } +*/ + return ret; +} +#endif //end of SINGLE_STATUS_LED + +static int status_led_diag_mode = STATUS_LED_MODE_AUTO; + +int status_led_check_diag_mode(void) +{ + return status_led_diag_mode; +} + +#if SINGLE_STATUS_LED +void sys_ready(void) +{ + ssize_t ret; + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + SYSFS_LOG("[p_thread] set ctl fail"); + } + SYSFS_LOG("[p_thread] set ctl successfully"); +} +#endif +/* End of ledinfo_device */ + +static int __init +led_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); +#if SINGLE_STATUS_LED + sys_ready(); +#endif +#endif + return 0; +} + +static void __exit +led_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove led module.\n"); +} + + +/* sensor device **********************************/ +#define SENSOR_DEV_PATH_SWITCH_TEMP "/sys/class/hwmon/hwmon%d/device/switch_tmp" + +static char sensor_dev_path_switch_temp[MAX_PATH_SIZE]; + +void sysfs_sensor_path_init(void) +{ + sprintf(&sensor_dev_path_switch_temp[0], SENSOR_DEV_PATH_SWITCH_TEMP, get_hwm_psoc()); +} + +void switch_temp_update(void) +{ + char buf[MIN_ACC_SIZE]; + ssize_t count = inventec_show_attr(&buf[0], "proc/switch/temp"); + if (count > 0) { + //printk(KERN_ERR "[p_thread] [STEMP] Switch temperature is out of range: %d\n", stemp); + inventec_store_attr(&buf[0], count, sensor_dev_path_switch_temp); + } +} + + +/**************************************************/ +/* From system_device */ +static int inv_pthread_control = 1; + +int thread_control(void) +{ + return inv_pthread_control; +} + +void thread_control_set(int val) +{ + inv_pthread_control = val; +} +/* End system_device */ + +#define THREAD_SLEEP_MINS (3) +#define THREAD_DELAY_MINS (THREAD_SLEEP_MINS + THREAD_SLEEP_MINS + 1) + +extern void psu_get_voltin(void); + +static struct task_struct *thread_st; +static int thread_data; + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO +void led_set_gpio_to_change_status_led(void) +{ + ssize_t ret = inventec_store_attr("57", 2, "/sys/class/gpio/export"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 57 to /sys/class/gpio/export failed\n"); + return; + } + ret = inventec_store_attr("low", 3, "/sys/class/gpio/gpio57/direction"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write low to /sys/class/gpio/gpio57/direction failed\n"); + return; + } + SYSFS_LOG("[p_thread] Set gpio to support status led change successfully\n"); +} +#endif + +// Function executed by kernel thread +static int thread_fn(void *unused) +{ + /* Delay for guarantee HW ready */ + ssleep(THREAD_DELAY_MINS); + + /* Default status init */ +#if SINGLE_STATUS_LED + status_led_grn("7"); +#else + set_status_led(STATUS_LED_GRN, STATUS_SYS_LED); + set_status_led(STATUS_LED_GRN, STATUS_FAN_LED); + set_status_led(STATUS_LED_GRN, STATUS_PSU_LED); +#endif + psu_get_voltin(); + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO + led_set_gpio_to_change_status_led(); +#endif + + printk(KERN_INFO "[p_thread] %s/%d: Thread Starting\n",__func__,__LINE__); + while (1) + { + ssleep(THREAD_SLEEP_MINS); + + if (thread_control() == 0) { + printk(KERN_INFO "[p_thread] %s/%d: Thread Stop by inv_pthread control\n",__func__,__LINE__); + break; + } + + if (status_led_check_diag_mode() == STATUS_LED_MODE_MANU) { + /* status led in change color/freq mode, higher priority. Ignore fans sttaus */ + continue; + } + + //switch_temp_update(); + +#if SINGLE_STATUS_LED + /* check fan and psu state */ + if (fans_control() > 0) { + psus_control(1); + continue; + } + else if (psus_control(0) > 0) { + continue; + } + + /* status led red, change it to green */ + if (status_led_check_color() != STATUS_LED_GRN7) { + status_led_grn("7"); + } +#else + fans_control(); + psus_control(0); +#endif + } + + do_exit(0); + printk(KERN_INFO "[p_thread] %s/%d: Thread Stopped\n",__func__,__LINE__); + return 0; +} + +//module init +static int __init inv_pthread_init(void) +{ + inventec_class_init(); + fan_device_init(); + psu_device_init(); + led_device_init(); + + thread_control_set(1); + + printk(KERN_INFO "[p_thread] %s/%d: Creating Thread\n",__func__,__LINE__); + //Create the kernel thread with name 'inv_pthread' + thread_st = kthread_run(thread_fn, (void*)&thread_data, "inv_pthread"); + if (thread_st) + printk(KERN_INFO "[p_thread] inv_pthread Created successfully\n"); + else + printk(KERN_ERR "[p_thread] inv_pthread creation failed\n"); + + return 0; +} + +//module exit +static void __exit inv_pthread_exit(void) +{ + thread_control_set(0); + /* Delay for guarantee thread exit */ + ssleep(THREAD_DELAY_MINS); + + fan_device_exit(); + psu_device_exit(); + led_device_exit(); + inventec_class_exit(); + + printk(KERN_INFO "[p_thread] inv_pthread cleaning Up\n"); +} + +module_init(inv_pthread_init); +module_exit(inv_pthread_exit); + +MODULE_AUTHOR("Robert "); +MODULE_DESCRIPTION("Inventec Platform Management Thread"); +MODULE_VERSION("version 1.1"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_swps.c b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_swps.c new file mode 100644 index 00000000000..ddb958031e3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_swps.c @@ -0,0 +1,3327 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "inv_swps.h" + +static int ctl_major; +static int port_major; +static int ioexp_total; +static int port_total; +static int block_polling; +static int auto_config; +static int flag_i2c_reset; +static int flag_mod_state; +static unsigned gpio_rest_mux; +static int gpio_base = 0; +static struct class *swp_class_p = NULL; +static struct inv_platform_s *platform_p = NULL; +static struct inv_ioexp_layout_s *ioexp_layout = NULL; +static struct inv_port_layout_s *port_layout = NULL; +int io_no_init = 0; +module_param(io_no_init, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP); +static void swp_polling_worker(struct work_struct *work); +static DECLARE_DELAYED_WORK(swp_polling, swp_polling_worker); + +static int reset_i2c_topology(void); + +static int +__swp_match(struct device *dev, +#ifdef SWPS_KERN_VER_AF_3_10 + + const void *data){ +#else + void *data){ +#endif + + char *name = (char *)data; + if (strcmp(dev_name(dev), name) == 0) + return 1; + return 0; +} + + +struct device * +get_swpdev_by_name(char *name){ + struct device *dev = class_find_device(swp_class_p, + NULL, + name, + __swp_match); + return dev; +} + + +static int +sscanf_2_int(const char *buf) { + + int result = -EBFONT; + char *hex_tag = "0x"; + + if (strcspn(buf, hex_tag) == 0) { + if (sscanf(buf,"%x",&result)) { + return result; + } + } else { + if (sscanf(buf,"%d",&result)) { + return result; + } + if(sscanf(buf,"-%d",&result)) { + return -result; + } + if (sscanf(buf,"%x",&result)) { + return result; + } + } + return -EBFONT; +} + + +static int +sscanf_2_binary(const char *buf) { + + int result = sscanf_2_int(buf); + + if (result < 0){ + return -EBFONT; + } + switch (result) { + case 0: + case 1: + return result; + default: + break; + } + return -EBFONT; +} + + +static int +_get_polling_period(void) { + + int retval = 0; + + if (SWP_POLLING_PERIOD == 0) { + return 0; + } + retval = ((SWP_POLLING_PERIOD * HZ) / 1000); + if (retval == 0) { + return 1; + } + return retval; +} + + +static struct transvr_obj_s * +_get_transvr_obj(char *dev_name) { + + struct device *dev_p = NULL; + struct transvr_obj_s *transvr_obj_p = NULL; + + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + return NULL; + } + transvr_obj_p = dev_get_drvdata(dev_p); + if (!transvr_obj_p){ + return NULL; + } + return transvr_obj_p; +} + + +static int +_is_i2c_target_exist(int chan, int addr) { + /* retval: Exist = 1 / Not exist = 0 / Error < 0 + */ + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + int retval = -1; + int err = -1; + int d_offs = 0; + + adap = i2c_get_adapter(chan); + if (!adap) { + SWPS_DEBUG("%s: can't get adapter\n", __func__); + retval = 0; + goto out_is_i2c_target_exist_1; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client) { + SWPS_ERR("%s: kzalloc fail\n", __func__); + retval = -1; + goto out_is_i2c_target_exist_2; + } + client->adapter = adap; + client->addr = addr; + err = i2c_smbus_read_byte_data(client, d_offs); + if (err < 0) { + retval = 0; + } else { + retval = 1; + } + i2c_put_adapter(adap); + kfree(client); + return retval; + +out_is_i2c_target_exist_2: + i2c_put_adapter(adap); +out_is_i2c_target_exist_1: + return retval; +} + + +static void +unlock_tobj_all(void) { + + struct transvr_obj_s *tobj_p; + char port_name[32]; + int port_id = 0; + int minor_curr = 0; + + for (minor_curr=0; minor_currauto_config = auto_config; + unlock_transvr_obj(tobj_p); + SWPS_DEBUG("%s: Set %s auto_config=%d\n", + __func__, tobj_p->swp_name, auto_config); + } + return retval; +} + + +/* ========== R/W Functions module control attribute ========== + */ +static ssize_t +show_attr_platform(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 32, "%s\n", platform_p->name); +} + + +static ssize_t +show_attr_version(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%s\n", SWP_VERSION); +} + + +static ssize_t +show_attr_status(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", flag_mod_state); +} + + +static ssize_t +show_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", auto_config); +} + + +static ssize_t +show_attr_block_poll(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", block_polling); +} +static ssize_t +show_attr_io_no_init(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", io_no_init); +} + + +static int +_check_reset_pwd(const char *buf_p, + size_t count) { + + int in_max = 64; + int in_len = (int)count; + char in_val[64] = "ERR"; + char *emsg = "ERR"; + + if (in_len >= in_max) { + emsg = "input too much"; + goto err_check_reset_pwd; + } + if (!sscanf(buf_p,"%s",in_val)) { + emsg = "format incorrect"; + goto err_check_reset_pwd; + } + if (strcmp(in_val, SWP_RESET_PWD) != 0) { + emsg = "password incorrect"; + goto err_check_reset_pwd; + } + return 0; + +err_check_reset_pwd: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} + + +static ssize_t +store_attr_reset_i2c(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + /* Polling mode */ + if (SWP_POLLING_ENABLE) { + SWPS_INFO("%s: reset I2C :polling\n", __func__); + flag_i2c_reset = 1; + return count; + } + /* Direct mode */ + SWPS_INFO("%s: reset I2C go. :direct\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset fail!\n", __func__); + return -EIO; + } + SWPS_INFO("%s: reset I2C ok. :direct\n", __func__); + return count; +} + + +static ssize_t +store_attr_reset_swps(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p; + char port_name[32] = "ERR"; + int port_id = 0; + int minor_curr = 0; + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + for (minor_curr=0; minor_currstate = STATE_TRANSVR_DISCONNECTED; + unlock_transvr_obj(tobj_p); + SWPS_INFO("%s: reset:%s\n", __func__, tobj_p->swp_name); + } + return count; +} + + +static ssize_t +store_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if (input_val < 0){ + return -EBFONT; + } + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + auto_config = input_val; + _update_auto_config_2_trnasvr(); + return count; +} + + +static ssize_t +store_attr_block_poll( struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if (input_val < 0){ + return -EBFONT; + } + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + + if(input_val != block_polling){ + block_polling = input_val; + if(block_polling){ + cancel_delayed_work_sync(&swp_polling); + } + else{ + schedule_delayed_work(&swp_polling, _get_polling_period()); + } + } + + return count; +} + +static ssize_t +store_attr_io_no_init( struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + + if(input_val != io_no_init){ + io_no_init = input_val; + } + + return count; +} + +/* ========== Show functions: For transceiver attribute ========== + */ +static ssize_t +_show_transvr_hex_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + int result; + + lock_transvr_obj(tobj_p); + result = get_func(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 8, "%d\n", result); + } else { + len = snprintf(buf_p, 8, "0x%02x\n", result); + } + return len; +} + + +static ssize_t +_show_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = snprintf(buf_p, 16, "%d\n", get_func(tobj_p)); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +_show_transvr_str_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p, char* buf), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = get_func(tobj_p, buf_p); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +show_attr_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_id, + buf_p); +} + + +static ssize_t +show_attr_ext_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_ext_id, + buf_p); +} + + +static ssize_t +show_attr_connector(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_connector, + buf_p); +} + + +static ssize_t +show_attr_vendor_name(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_name, + buf_p); +} + + +static ssize_t +show_attr_vendor_pn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_pn, + buf_p); +} + + +static ssize_t +show_attr_vendor_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_rev, + buf_p); +} + + +static ssize_t +show_attr_vendor_sn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_sn, + buf_p); +} + + +static ssize_t +show_attr_power_cls(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + size_t len; + int result; + struct transvr_obj_s *tobj_p; + + tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + lock_transvr_obj(tobj_p); + result = tobj_p->get_power_cls(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 16, "%d\n", result); + } else { + len = snprintf(buf_p, 16, "Power Class %d\n", result); + } + return len; +} + + +static ssize_t +show_attr_br(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_br, + buf_p); +} + + +static ssize_t +show_attr_len_sm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_sm, + buf_p); +} + + +static ssize_t +show_attr_len_smf(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_smf, + buf_p); +} + + +static ssize_t +show_attr_len_om1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om1, + buf_p); +} + + +static ssize_t +show_attr_len_om2(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om2, + buf_p); +} + + +static ssize_t +show_attr_len_om3(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om3, + buf_p); +} + + +static ssize_t +show_attr_len_om4(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om4, + buf_p); +} + + +static ssize_t +show_attr_comp_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_rev, + buf_p); +} + + +static ssize_t +show_attr_comp_eth(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_1, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10_40(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10_40, + buf_p); +} + + +static ssize_t +show_attr_comp_extend(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_extend, + buf_p); +} + + +static ssize_t +show_attr_rate_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_rate_id, + buf_p); +} + + +static ssize_t +show_attr_temperature(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_temp, + buf_p); +} + + +static ssize_t +show_attr_voltage(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_vol, + buf_p); +} + + +static ssize_t +show_attr_tx_bias(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_bias, + buf_p); +} + + +static ssize_t +show_attr_tx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power, + buf_p); +} + + +static ssize_t +show_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_eq, + buf_p); +} + + +static ssize_t +show_attr_rx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power, + buf_p); +} + + +static ssize_t +show_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_am, + buf_p); +} + + +static ssize_t +show_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_em, + buf_p); +} + + +static ssize_t +show_attr_wavelength(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_wavelength, + buf_p); +} + + +static ssize_t +show_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_offset, + buf_p); +} + + +static ssize_t +show_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_reg, + buf_p); +} + + +static ssize_t +show_attr_info(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_info, + buf_p); +} + + +static ssize_t +show_attr_if_type(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_type, + buf_p); +} + + +static ssize_t +show_attr_if_speed(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_speed, + buf_p); +} + + +static ssize_t +show_attr_if_lane(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_lane, + buf_p); +} + + +static ssize_t +show_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_cdr, + buf_p); +} + + +static ssize_t +show_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs0, + buf_p); +} + + +static ssize_t +show_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs1, + buf_p); +} + + +static ssize_t +show_attr_soft_rx_los(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_rx_los, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_auto_tx_disable, + buf_p); +} + + +/* ========== Store functions: transceiver (R/W) attribute ========== + */ +static ssize_t +_store_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_byte_hex_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if ((input < 0) || (input > 0xff)){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_binary_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_binary(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_cdr, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs1, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int check = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((check < 0) || (check > 0xf)){ + return -EBFONT; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_soft_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int err = -EPERM; + int input = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((input < 0) || (input > 0xf)){ + if (input != VAL_TRANSVR_FUNCTION_DISABLE) { + return -EBFONT; + } + } + lock_transvr_obj(tobj_p); + err = tobj_p->set_auto_tx_disable(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_tx_eq, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_am, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_em, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_offset, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_reg, + buf_p, + count); +} + +/* ========== Show functions: For I/O Expander attribute ========== + */ +static ssize_t +_show_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*get_func)(struct ioexp_obj_s *ioexp_p, int voffset), + char *buf_p) { + size_t len; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR(" %s: data corruption! :%s\n", __func__, tobj_p->swp_name); + return -ENODATA; + } + mutex_lock(&ioexp_p->lock); + len = snprintf(buf_p, 8, "%d\n", get_func(ioexp_p, tobj_p->ioexp_virt_offset)); + mutex_unlock(&ioexp_p->lock); + return len; +} + + +static ssize_t +show_attr_present(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_present, + buf_p); +} + + +static ssize_t +show_attr_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_rxlos(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_rxlos, + buf_p); +} + + +static ssize_t +show_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_reset, + buf_p); +} + + +static ssize_t +show_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_lpmod, + buf_p); +} + + +static ssize_t +show_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_modsel, + buf_p); +} + + +static ssize_t +show_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs0, + buf_p); +} + + +static ssize_t +show_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs1, + buf_p); +} + + +/* ========== Store functions: For I/O Expander (R/W) attribute ========== + */ +static ssize_t +_store_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*set_func)(struct ioexp_obj_s *ioexp_p, + int virt_offset, int input_val), + const char *buf_p, + size_t count) { + + int input, err; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR("%s: data corruption! :%s\n", + __func__, tobj_p->swp_name); + return -ENODATA; + } + input = sscanf_2_binary(buf_p); + if (input < 0) { + return -EBFONT; + } + mutex_lock(&ioexp_p->lock); + err = set_func(ioexp_p, tobj_p->ioexp_virt_offset, input); + mutex_unlock(&ioexp_p->lock); + if (err < 0){ + return err; + } + return count; +} + +static ssize_t +store_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_reset, + buf_p, + count); +} + + +static ssize_t +store_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_lpmod, + buf_p, + count); +} + + +static ssize_t +store_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_modsel, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs1, + buf_p, + count); +} + + +/* ========== SWPS attribute: For module control ========== + */ +static DEVICE_ATTR(platform, S_IRUGO, show_attr_platform, NULL); +static DEVICE_ATTR(version, S_IRUGO, show_attr_version, NULL); +static DEVICE_ATTR(status, S_IRUGO, show_attr_status, NULL); +static DEVICE_ATTR(reset_i2c, S_IWUSR, NULL, store_attr_reset_i2c); +static DEVICE_ATTR(reset_swps, S_IWUSR, NULL, store_attr_reset_swps); +static DEVICE_ATTR(auto_config, S_IRUGO|S_IWUSR, show_attr_auto_config, store_attr_auto_config); +static DEVICE_ATTR(block_poll, S_IRUGO|S_IWUSR, show_attr_block_poll, store_attr_block_poll); +static DEVICE_ATTR(io_no_init, S_IRUGO|S_IWUSR, show_attr_io_no_init, store_attr_io_no_init); + + +/* ========== Transceiver attribute: from eeprom ========== + */ +static DEVICE_ATTR(id, S_IRUGO, show_attr_id, NULL); +static DEVICE_ATTR(ext_id, S_IRUGO, show_attr_ext_id, NULL); +static DEVICE_ATTR(connector, S_IRUGO, show_attr_connector, NULL); +static DEVICE_ATTR(vendor_name, S_IRUGO, show_attr_vendor_name, NULL); +static DEVICE_ATTR(vendor_pn, S_IRUGO, show_attr_vendor_pn, NULL); +static DEVICE_ATTR(vendor_rev, S_IRUGO, show_attr_vendor_rev, NULL); +static DEVICE_ATTR(vendor_sn, S_IRUGO, show_attr_vendor_sn, NULL); +static DEVICE_ATTR(power_cls, S_IRUGO, show_attr_power_cls, NULL); +static DEVICE_ATTR(br, S_IRUGO, show_attr_br, NULL); +static DEVICE_ATTR(len_sm, S_IRUGO, show_attr_len_sm, NULL); +static DEVICE_ATTR(len_smf, S_IRUGO, show_attr_len_smf, NULL); +static DEVICE_ATTR(len_om1, S_IRUGO, show_attr_len_om1, NULL); +static DEVICE_ATTR(len_om2, S_IRUGO, show_attr_len_om2, NULL); +static DEVICE_ATTR(len_om3, S_IRUGO, show_attr_len_om3, NULL); +static DEVICE_ATTR(len_om4, S_IRUGO, show_attr_len_om4, NULL); +static DEVICE_ATTR(comp_rev, S_IRUGO, show_attr_comp_rev, NULL); +static DEVICE_ATTR(comp_eth, S_IRUGO, show_attr_comp_eth, NULL); +static DEVICE_ATTR(comp_eth_10, S_IRUGO, show_attr_comp_eth_10, NULL); +static DEVICE_ATTR(comp_eth_10_40, S_IRUGO, show_attr_comp_eth_10_40, NULL); +static DEVICE_ATTR(comp_extend, S_IRUGO, show_attr_comp_extend, NULL); +static DEVICE_ATTR(rate_id, S_IRUGO, show_attr_rate_id, NULL); +static DEVICE_ATTR(temperature, S_IRUGO, show_attr_temperature, NULL); +static DEVICE_ATTR(voltage, S_IRUGO, show_attr_voltage, NULL); +static DEVICE_ATTR(tx_bias, S_IRUGO, show_attr_tx_bias, NULL); +static DEVICE_ATTR(tx_power, S_IRUGO, show_attr_tx_power, NULL); +static DEVICE_ATTR(rx_power, S_IRUGO, show_attr_rx_power, NULL); +static DEVICE_ATTR(info, S_IRUGO, show_attr_info, NULL); +static DEVICE_ATTR(if_type, S_IRUGO, show_attr_if_type, NULL); +static DEVICE_ATTR(if_speed, S_IRUGO, show_attr_if_speed, NULL); +static DEVICE_ATTR(if_lane, S_IRUGO, show_attr_if_lane, NULL); +static DEVICE_ATTR(soft_rx_los, S_IRUGO, show_attr_soft_rx_los, NULL); +static DEVICE_ATTR(soft_tx_fault, S_IRUGO, show_attr_soft_tx_fault, NULL); +static DEVICE_ATTR(wavelength, S_IRUGO, show_attr_wavelength, NULL); +static DEVICE_ATTR(tx_eq, S_IRUGO|S_IWUSR, show_attr_tx_eq, store_attr_tx_eq); +static DEVICE_ATTR(rx_am, S_IRUGO|S_IWUSR, show_attr_rx_am, store_attr_rx_am); +static DEVICE_ATTR(rx_em, S_IRUGO|S_IWUSR, show_attr_rx_em, store_attr_rx_em); +static DEVICE_ATTR(cdr, S_IRUGO|S_IWUSR, show_attr_cdr, store_attr_cdr); +static DEVICE_ATTR(soft_rs0, S_IRUGO|S_IWUSR, show_attr_soft_rs0, store_attr_soft_rs0); +static DEVICE_ATTR(soft_rs1, S_IRUGO|S_IWUSR, show_attr_soft_rs1, store_attr_soft_rs1); +static DEVICE_ATTR(soft_tx_disable, S_IRUGO|S_IWUSR, show_attr_soft_tx_disable, store_attr_soft_tx_disable); +static DEVICE_ATTR(auto_tx_disable, S_IRUGO|S_IWUSR, show_attr_auto_tx_disable, store_attr_auto_tx_disable); +static DEVICE_ATTR(extphy_offset, S_IRUGO|S_IWUSR, show_attr_extphy_offset, store_attr_extphy_offset); +static DEVICE_ATTR(extphy_reg, S_IRUGO|S_IWUSR, show_attr_extphy_reg, store_attr_extphy_reg); + +/* ========== IO Expander attribute: from expander ========== + */ +static DEVICE_ATTR(present, S_IRUGO, show_attr_present, NULL); +static DEVICE_ATTR(tx_fault, S_IRUGO, show_attr_tx_fault, NULL); +static DEVICE_ATTR(rxlos, S_IRUGO, show_attr_rxlos, NULL); +static DEVICE_ATTR(tx_disable, S_IRUGO|S_IWUSR, show_attr_tx_disable, store_attr_tx_disable); +static DEVICE_ATTR(reset, S_IRUGO|S_IWUSR, show_attr_reset, store_attr_reset); +static DEVICE_ATTR(lpmod, S_IRUGO|S_IWUSR, show_attr_lpmod, store_attr_lpmod); +static DEVICE_ATTR(modsel, S_IRUGO|S_IWUSR, show_attr_modsel, store_attr_modsel); +static DEVICE_ATTR(hard_rs0, S_IRUGO|S_IWUSR, show_attr_hard_rs0, store_attr_hard_rs0); +static DEVICE_ATTR(hard_rs1, S_IRUGO|S_IWUSR, show_attr_hard_rs1, store_attr_hard_rs1); + +/* ========== Functions for module handling ========== + */ +static void +clean_port_objs(void){ + + dev_t dev_num; + char dev_name[32]; + struct device *device_p; + struct transvr_obj_s *tobj_p; + int minor_curr, port_id; + + for (minor_curr=0; minor_curri2c_client_p) { + i2c_put_adapter(tobj_p->i2c_client_p->adapter); + kfree(tobj_p->i2c_client_p); + } + kfree(tobj_p->vendor_name); + kfree(tobj_p->vendor_pn); + kfree(tobj_p->vendor_rev); + kfree(tobj_p->vendor_sn); + kfree(tobj_p->worker_p); + kfree(tobj_p); + } + dev_num = MKDEV(port_major, minor_curr); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static void +clean_swps_common(void){ + + dev_t dev_num; + struct device *device_p; + + device_p = get_swpdev_by_name(SWP_DEV_MODCTL); + if (device_p){ + dev_num = MKDEV(ctl_major, 1); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + cancel_delayed_work_sync(&swp_polling); + if (platform_p) { + kfree(platform_p); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static int +get_platform_type(void){ + + int i, tmp; + int auto_chan = -1; + int auto_addr = -1; + int pf_total = ARRAY_SIZE(platform_map); + char log_msg[64] = "ERROR"; + + platform_p = kzalloc(sizeof(struct inv_platform_s), GFP_KERNEL); + if (!platform_p){ + snprintf(log_msg, sizeof(log_msg), "kzalloc fail"); + goto err_get_platform_type_1; + } + memset(platform_p->name, 0, sizeof(platform_p->name)); + + switch (PLATFORM_SETTINGS) { + case PLATFORM_TYPE_AUTO: + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", dmi_get_system_info(DMI_BOARD_NAME)); + for (i=0; iname, platform_map[i].name) == 0) { + platform_p->id = platform_map[i].id; + snprintf(log_msg, sizeof(log_msg), + "Auto detect platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Auto detect fail! detect platform: %s", + platform_p->name); + goto err_get_platform_type_2; + + case PLATFORM_TYPE_PEONY_AUTO: +#ifdef SWPS_PEONY_SFP + auto_chan = peony_sfp_ioexp_layout[0].addr[0].chan_id; + auto_addr = peony_sfp_ioexp_layout[0].addr[0].chip_addr; +#endif + tmp = _is_i2c_target_exist(auto_chan, auto_addr); + switch (tmp) { + case 0: /* Copper SKU */ + SWPS_INFO("Auto-detected :Peony :Copper\n"); + platform_p->id = PLATFORM_TYPE_PEONY_COPPER_GA; + goto map_platform_name; + + case 1: /* SFP SKU */ + SWPS_INFO("Auto-detected :Peony :SFP\n"); + platform_p->id = PLATFORM_TYPE_PEONY_SFP_GA; + goto map_platform_name; + + default: + break; + } + snprintf(log_msg, sizeof(log_msg), + "Auto detect Peony SKU fail! :%d", tmp); + goto err_get_platform_type_2; + + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + case PLATFORM_TYPE_REDWOOD: + case PLATFORM_TYPE_REDWOOD_FSL: + case PLATFORM_TYPE_HUDSON32I_GA: + case PLATFORM_TYPE_SPRUCE: + case PLATFORM_TYPE_CYPRESS_GA1: + case PLATFORM_TYPE_CYPRESS_GA2: + case PLATFORM_TYPE_CYPRESS_BAI: + case PLATFORM_TYPE_TAHOE: + case PLATFORM_TYPE_SEQUOIA_GA: + case PLATFORM_TYPE_SEQUOIA_B0: + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + case PLATFORM_TYPE_COTTONWOOD_RANGELEY: + case PLATFORM_TYPE_COTTONWOOD_LITE: + case PLATFORM_TYPE_MAPLE_GA: + case PLATFORM_TYPE_MAPLE_B: + case PLATFORM_TYPE_MAPLE_J: + case PLATFORM_TYPE_GULMOHAR_GA: + case PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA: + case PLATFORM_TYPE_PEONY_SFP_GA: + case PLATFORM_TYPE_PEONY_COPPER_GA: + case PLATFORM_TYPE_CEDAR_GA: + platform_p->id = PLATFORM_SETTINGS; + goto map_platform_name; + + default: + break; + } + snprintf(log_msg, sizeof(log_msg), + "PLATFORM_SETTINGS:%d undefined", PLATFORM_SETTINGS); + goto err_get_platform_type_2; + +map_platform_name: + for (i=0; iid == platform_map[i].id) { + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", platform_map[i].name); + snprintf(log_msg, sizeof(log_msg), + "User setup platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Internal error, can not map id:%d", + platform_p->id ); + goto err_get_platform_type_2; + +ok_get_platform_type_1: + SWPS_DEBUG("%s: %s, :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return 0; + +err_get_platform_type_2: + kfree(platform_p); +err_get_platform_type_1: + SWPS_ERR("%s: %s :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return -1; +} + + +static int +get_layout_info(void){ + + switch (platform_p->id) { +#ifdef SWPS_MAGNOLIA + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + gpio_rest_mux = gpio_base + magnolia_gpio_rest_mux; + ioexp_layout = magnolia_ioexp_layout; + port_layout = magnolia_port_layout; + ioexp_total = ARRAY_SIZE(magnolia_ioexp_layout); + port_total = ARRAY_SIZE(magnolia_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD + case PLATFORM_TYPE_REDWOOD: + gpio_rest_mux = gpio_base + redwood_gpio_rest_mux; + ioexp_layout = redwood_ioexp_layout; + port_layout = redwood_port_layout; + ioexp_total = ARRAY_SIZE(redwood_ioexp_layout); + port_total = ARRAY_SIZE(redwood_port_layout); + break; +#endif +#ifdef SWPS_HUDSON32I_GA + case PLATFORM_TYPE_HUDSON32I_GA: + gpio_rest_mux = gpio_base + hudsin32iga_gpio_rest_mux; + ioexp_layout = hudson32iga_ioexp_layout; + port_layout = hudson32iga_port_layout; + ioexp_total = ARRAY_SIZE(hudson32iga_ioexp_layout); + port_total = ARRAY_SIZE(hudson32iga_port_layout); + break; +#endif +#ifdef SWPS_SPRUCE + case PLATFORM_TYPE_SPRUCE: + gpio_rest_mux = gpio_base + spruce_gpio_rest_mux; + ioexp_layout = spruce_ioexp_layout; + port_layout = spruce_port_layout; + ioexp_total = ARRAY_SIZE(spruce_ioexp_layout); + port_total = ARRAY_SIZE(spruce_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA1 + case PLATFORM_TYPE_CYPRESS_GA1: + gpio_rest_mux = gpio_base + cypress_ga1_gpio_rest_mux; + ioexp_layout = cypress_ga1_ioexp_layout; + port_layout = cypress_ga1_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga1_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga1_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA2 + case PLATFORM_TYPE_CYPRESS_GA2: + gpio_rest_mux = gpio_base + cypress_ga2_gpio_rest_mux; + ioexp_layout = cypress_ga2_ioexp_layout; + port_layout = cypress_ga2_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga2_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga2_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_BAI + case PLATFORM_TYPE_CYPRESS_BAI: + gpio_rest_mux = gpio_base + cypress_b_gpio_rest_mux; + ioexp_layout = cypress_b_ioexp_layout; + port_layout = cypress_b_port_layout; + ioexp_total = ARRAY_SIZE(cypress_b_ioexp_layout); + port_total = ARRAY_SIZE(cypress_b_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD_FSL + case PLATFORM_TYPE_REDWOOD_FSL: + gpio_rest_mux = gpio_base + redwood_fsl_gpio_rest_mux; + ioexp_layout = redwood_fsl_ioexp_layout; + port_layout = redwood_fsl_port_layout; + ioexp_total = ARRAY_SIZE(redwood_fsl_ioexp_layout); + port_total = ARRAY_SIZE(redwood_fsl_port_layout); + break; +#endif +#ifdef SWPS_TAHOE + case PLATFORM_TYPE_TAHOE: + gpio_rest_mux = gpio_base + tahoe_gpio_rest_mux; + ioexp_layout = tahoe_ioexp_layout; + port_layout = tahoe_port_layout; + ioexp_total = ARRAY_SIZE(tahoe_ioexp_layout); + port_total = ARRAY_SIZE(tahoe_port_layout); + break; +#endif +#ifdef SWPS_SEQUOIA + case PLATFORM_TYPE_SEQUOIA_GA: + gpio_rest_mux = gpio_base + sequoia_gpio_rest_mux; + ioexp_layout = sequoia_ioexp_layout; + port_layout = sequoia_port_layout; + ioexp_total = ARRAY_SIZE(sequoia_ioexp_layout); + port_total = ARRAY_SIZE(sequoia_port_layout); + break; +#endif +#ifdef SWPS_SEQUOIA_B0 + case PLATFORM_TYPE_SEQUOIA_B0: + gpio_rest_mux = gpio_base + sequoia_b0_gpio_rest_mux; + ioexp_layout = sequoia_b0_ioexp_layout; + port_layout = sequoia_b0_port_layout; + ioexp_total = ARRAY_SIZE(sequoia_b0_ioexp_layout); + port_total = ARRAY_SIZE(sequoia_b0_port_layout); + break; +#endif +#ifdef SWPS_LAVENDER + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + gpio_rest_mux = gpio_base + lavender_gpio_rest_mux; + ioexp_layout = lavender_ioexp_layout; + port_layout = lavender_port_layout; + ioexp_total = ARRAY_SIZE(lavender_ioexp_layout); + port_total = ARRAY_SIZE(lavender_port_layout); + break; +#endif +#ifdef SWPS_COTTONWOOD_RANGELEY + case PLATFORM_TYPE_COTTONWOOD_RANGELEY: + gpio_rest_mux = gpio_base + cottonwood_rangeley_gpio_rest_mux; + ioexp_layout = cottonwood_rangeley_ioexp_layout; + port_layout = cottonwood_rangeley_port_layout; + ioexp_total = ARRAY_SIZE(cottonwood_rangeley_ioexp_layout); + port_total = ARRAY_SIZE(cottonwood_rangeley_port_layout); + break; +#endif +#ifdef SWPS_COTTONWOOD_LITE + case PLATFORM_TYPE_COTTONWOOD_LITE: + gpio_rest_mux = gpio_base + cottonwood_lite_gpio_rest_mux; + ioexp_layout = cottonwood_lite_ioexp_layout; + port_layout = cottonwood_lite_port_layout; + ioexp_total = ARRAY_SIZE(cottonwood_lite_ioexp_layout); + port_total = ARRAY_SIZE(cottonwood_lite_port_layout); + break; +#endif +#ifdef SWPS_MAPLE_GA + case PLATFORM_TYPE_MAPLE_GA: + gpio_rest_mux = gpio_base + maple_ga_gpio_rest_mux; + ioexp_layout = maple_ga_ioexp_layout; + port_layout = maple_ga_port_layout; + ioexp_total = ARRAY_SIZE(maple_ga_ioexp_layout); + port_total = ARRAY_SIZE(maple_ga_port_layout); + break; +#endif +#ifdef SWPS_MAPLE_B + case PLATFORM_TYPE_MAPLE_B: + gpio_rest_mux = gpio_base + maple_b_gpio_rest_mux; + ioexp_layout = maple_b_ioexp_layout; + port_layout = maple_b_port_layout; + ioexp_total = ARRAY_SIZE(maple_b_ioexp_layout); + port_total = ARRAY_SIZE(maple_b_port_layout); + break; +#endif +#ifdef SWPS_MAPLE_J + case PLATFORM_TYPE_MAPLE_J: + gpio_rest_mux = gpio_base + maple_j_gpio_rest_mux; + ioexp_layout = maple_j_ioexp_layout; + port_layout = maple_j_port_layout; + ioexp_total = ARRAY_SIZE(maple_j_ioexp_layout); + port_total = ARRAY_SIZE(maple_j_port_layout); + break; +#endif +#ifdef SWPS_GULMOHAR + case PLATFORM_TYPE_GULMOHAR_GA: + gpio_rest_mux = gpio_base + gulmohar_gpio_rest_mux; + ioexp_layout = gulmohar_ioexp_layout; + port_layout = gulmohar_port_layout; + ioexp_total = ARRAY_SIZE(gulmohar_ioexp_layout); + port_total = ARRAY_SIZE(gulmohar_port_layout); + break; +#endif +#ifdef SWPS_GULMOHAR_2T_EVT1 + case PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA: + gpio_rest_mux = gpio_base + gulmohar_2t_evt1_gpio_rest_mux; + ioexp_layout = gulmohar_2t_evt1_ioexp_layout; + port_layout = gulmohar_2t_evt1_port_layout; + ioexp_total = ARRAY_SIZE(gulmohar_2t_evt1_ioexp_layout); + port_total = ARRAY_SIZE(gulmohar_2t_evt1_port_layout); + break; +#endif +#ifdef SWPS_PEONY_SFP + case PLATFORM_TYPE_PEONY_SFP_GA: + gpio_rest_mux = gpio_base + peony_sfp_gpio_rest_mux; + ioexp_layout = peony_sfp_ioexp_layout; + port_layout = peony_sfp_port_layout; + ioexp_total = ARRAY_SIZE(peony_sfp_ioexp_layout); + port_total = ARRAY_SIZE(peony_sfp_port_layout); + break; +#endif +#ifdef SWPS_PEONY_COPPER + case PLATFORM_TYPE_PEONY_COPPER_GA: + gpio_rest_mux = gpio_base + peony_copper_gpio_rest_mux; + ioexp_layout = peony_copper_ioexp_layout; + port_layout = peony_copper_port_layout; + ioexp_total = ARRAY_SIZE(peony_copper_ioexp_layout); + port_total = ARRAY_SIZE(peony_copper_port_layout); + break; +#endif +#ifdef SWPS_CEDAR_GA + case PLATFORM_TYPE_CEDAR_GA: + gpio_rest_mux = gpio_base + cedar_ga_gpio_rest_mux; + ioexp_layout = cedar_ga_ioexp_layout; + port_layout = cedar_ga_port_layout; + ioexp_total = ARRAY_SIZE(cedar_ga_ioexp_layout); + port_total = ARRAY_SIZE(cedar_ga_port_layout); + break; +#endif + + default: + SWPS_ERR(" Invalid platform: %d (%s)\n", + platform_p->id, platform_p->name); + return -1; + } + SWPS_INFO("Start to initial platform: %d (%s)\n", + platform_p->id, platform_p->name); + return 0; +} + + +/* ========== Functions for objects operations ========== + */ +static int +__detect_issues_port(int minor_num) { + + struct transvr_obj_s *tobj_p; + int port_id = port_layout[minor_num].port_id; + char port_name[32] = "ERR"; + char *i2c_emsg = "detected bad transceiver/cable"; + + memset(port_name, 0, sizeof(port_name)); + snprintf(port_name, sizeof(port_name), "%s%d", SWP_DEV_PORT, port_id); + tobj_p = _get_transvr_obj(port_name); + if (!tobj_p) { + SWPS_INFO("%s: tobj_p is NULL :%d\n", __func__, minor_num); + return -1; + } + if (resync_channel_tier_2(tobj_p) < 0) { + if (check_channel_tier_1() < 0) { + goto get_target_issues_port; + } + } + /* Re-check again for i2c-gpio special case */ + if (check_channel_tier_1() < 0) { + goto get_target_issues_port; + } + return 0; + +get_target_issues_port: + alarm_msg_2_user(tobj_p, i2c_emsg); + return -2; +} + + +static int +_detect_issues_port(void) { + /* OK : retrun -1; + * Fail: return fail at which minor number (0~N) + */ + char *emsg = "ERR"; + int minor = 0; + int minor_2st = 1; + + /* Force moving the initial channel pointer + * Filter out case of fail at minor-0 port + */ + while (minor_2st < port_total) { + minor = minor_2st; + if (__detect_issues_port(minor_2st) < 0) { + emsg = "detect minor_2st fail"; + goto err_p_detect_issues_port; + } + minor_2st += 8; + } + /* Scan all port */ + for (minor=0; minor:%d\n", __func__, emsg, minor_err); + return -1; +} + + +static int +check_transvr_obj_one(char *dev_name){ + /* [Return] + * 0 : Doesn't need to take care + * -1 : Single error + * -2 : Critical error (I2C topology die) + * -9 : Internal error + */ + struct transvr_obj_s *tobj_p = NULL; + int retval = -9; + + tobj_p = _get_transvr_obj(dev_name); + if (!tobj_p) { + SWPS_ERR("%s: %s _get_transvr_obj fail\n", + __func__, dev_name); + return -9; + } + /* Check transceiver current status */ + lock_transvr_obj(tobj_p); + retval = tobj_p->check(tobj_p); + unlock_transvr_obj(tobj_p); + switch (retval) { + case 0: + case ERR_TRANSVR_UNPLUGGED: + case ERR_TRNASVR_BE_ISOLATED: + case ERR_TRANSVR_TASK_BUSY: + return 0; + + case ERR_TRANSVR_I2C_CRASH: + default: + break; + } + /* Identify abnormal case */ + if (check_channel_tier_1() < 0) { + SWPS_DEBUG("%s: %s critical error :%d\n", + __func__, dev_name, retval); + return -2; + } + SWPS_DEBUG("%s: %s single error :%d\n", + __func__, dev_name, retval); + return -1; +} + +static int +check_transvr_obj_one_with_measuring(char *dev_name){ + struct timeval begin, end; + unsigned long val; + int err_code; + const int WARNING_TIME_MS = 100; + + do_gettimeofday(&begin); + err_code = check_transvr_obj_one(dev_name); + do_gettimeofday(&end); + val = (end.tv_sec - begin.tv_sec) * 1000; + val += ((end.tv_usec - begin.tv_usec) / 1000); + if (val > WARNING_TIME_MS) { + SWPS_INFO("%s takes %lums\n", dev_name, val); + } + + return err_code; +} + +static int +check_transvr_objs(void){ + + char dev_name[32]; + int port_id, err_code; + int minor_curr = 0; + + for (minor_curr=0; minor_curr:%d\n", + __func__, dev_name, err_code); + break; + } + } + return 0; + +err_check_transvr_objs: + SWPS_ERR("%s: %s reset_i2c_topology fail.\n", + __func__, dev_name); + return -1; +} + + +static void +swp_polling_worker(struct work_struct *work){ + + /* Reset I2C */ + if (flag_i2c_reset) { + goto polling_reset_i2c; + } + /* Check IOEXP */ + if (check_ioexp_objs() < 0) { + goto polling_reset_i2c; + } + /* Check transceiver */ + if (check_transvr_objs() < 0) { + SWPS_DEBUG("%s: check_transvr_objs fail.\n", __func__); + flag_i2c_reset = 1; + } + goto polling_schedule_round; + +polling_reset_i2c: + SWPS_DEBUG("%s: reset_i2c_topology start.\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset i2c fail!\n", __func__); + flag_i2c_reset = 1; + } else { + SWPS_DEBUG("%s: reset_i2c_topology OK.\n", __func__); + flag_i2c_reset = 0; + } +polling_schedule_round: + schedule_delayed_work(&swp_polling, _get_polling_period()); +} + + +/* ========== Functions for register something ========== + */ +static int +register_transvr_common_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_id) < 0) { + err_attr = "dev_attr_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_ext_id) < 0) { + err_attr = "dev_attr_ext_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_connector) < 0) { + err_attr = "dev_attr_connector"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_name) < 0) { + err_attr = "dev_attr_vendor_name"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_pn) < 0) { + err_attr = "dev_attr_vendor_pn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_rev) < 0) { + err_attr = "dev_attr_vendor_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_sn) < 0) { + err_attr = "dev_attr_vendor_sn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_br) < 0) { + err_attr = "dev_attr_br"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_smf) < 0) { + err_attr = "dev_attr_len_smf"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om1) < 0) { + err_attr = "dev_attr_len_om1"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om2) < 0) { + err_attr = "dev_attr_len_om2"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om3) < 0) { + err_attr = "dev_attr_len_om3"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om4) < 0) { + err_attr = "dev_attr_len_om4"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_extend) < 0) { + err_attr = "dev_attr_comp_extend"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth) < 0) { + err_attr = "dev_attr_comp_eth"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_rev) < 0) { + err_attr = "dev_attr_comp_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_info) < 0) { + err_attr = "dev_attr_info"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_type) < 0) { + err_attr = "dev_attr_if_type"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_speed) < 0) { + err_attr = "dev_attr_if_speed"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_lane) < 0) { + err_attr = "dev_attr_if_lane"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_temperature) < 0) { + err_attr = "dev_attr_temperature"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_voltage) < 0) { + err_attr = "dev_attr_voltage"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_bias) < 0) { + err_attr = "dev_attr_tx_bias"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power) < 0) { + err_attr = "dev_attr_tx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power) < 0) { + err_attr = "dev_attr_rx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_eq) < 0) { + err_attr = "dev_attr_tx_eq"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_em) < 0) { + err_attr = "dev_attr_rx_em"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_wavelength) < 0) { + err_attr = "dev_attr_wavelength"; + goto err_transvr_comm_attr; + } + return 0; + +err_transvr_comm_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + +static int +register_transvr_sfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10) < 0) { + err_attr = "dev_attr_comp_eth_10"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_len_sm) < 0) { + err_attr = "dev_attr_len_sm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rate_id) < 0) { + err_attr = "dev_attr_rate_id"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs0) < 0) { + err_attr = "dev_attr_soft_rs0"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs1) < 0) { + err_attr = "dev_attr_soft_rs1"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_offset) < 0) { + err_attr = "dev_attr_extphy_offset"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_reg) < 0) { + err_attr = "dev_attr_extphy_reg"; + goto err_transvr_sfp_attr; + } + return 0; + +err_transvr_sfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10_40) < 0) { + err_attr = "dev_attr_comp_eth_10_40"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_power_cls) < 0) { + err_attr = "dev_attr_power_cls"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rx_los) < 0) { + err_attr = "soft_rx_los"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_disable) < 0) { + err_attr = "soft_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_auto_tx_disable) < 0) { + err_attr = "auto_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_fault) < 0) { + err_attr = "soft_tx_fault"; + goto err_transvr_qsfp_attr; + } + return 0; + +err_transvr_qsfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp28_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_qsfp_attr(device_p) < 0){ + err_attr = "register_transvr_qsfp_attr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_cdr) < 0) { + err_attr = "dev_attr_cdr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_rx_am) < 0) { + err_attr = "dev_attr_rx_am"; + goto err_transvr_qsfp28_attr; + } + return 0; + +err_transvr_qsfp28_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + switch (transvr_obj->layout){ + case TRANSVR_TYPE_SFP: + if (register_transvr_sfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + if (register_transvr_qsfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP_28: + if (register_transvr_qsfp28_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + default: + goto err_reg_tvr_attr; + } + return 0; + +err_reg_tvr_attr: + SWPS_ERR("%s: fail! type=%d \n", __func__, transvr_obj->type); + return -1; +} + + +static int +register_ioexp_attr_sfp_1(struct device *device_p){ + /* Support machine type: + * - SFP : Magnolia + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_fault) < 0) { + err_attr = "dev_attr_tx_fault"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_rxlos) < 0) { + err_attr = "dev_attr_rxlos"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_disable) < 0) { + err_attr = "dev_attr_tx_disable"; + goto err_ioexp_sfp1_attr; + } + return 0; + +err_ioexp_sfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_sfp_2(struct device *device_p){ + /* Support machine type: + * - SFP28 : Cypress + */ + char *err_attr = NULL; + + if (register_ioexp_attr_sfp_1(device_p) < 0){ + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs0) < 0) { + err_attr = "dev_attr_hard_rs0"; + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs1) < 0) { + err_attr = "dev_attr_hard_rs1"; + goto err_ioexp_sfp2_attr; + } + return 0; + +err_ioexp_sfp2_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_qsfp_1(struct device *device_p){ + /* Support machine type: + * - QSFP : Magnolia, Redwood, Hudson32i + * - QSFP+ : Magnolia, Redwood, Hudson32i + * - QSFP28: Redwood + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_reset) < 0) { + err_attr = "dev_attr_reset"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_lpmod) < 0) { + err_attr = "dev_attr_lpmod"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_modsel) < 0) { + err_attr = "dev_attr_modsel"; + goto err_ioexp_qsfp1_attr; + } + return 0; + +err_ioexp_qsfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_modctl_attr(struct device *device_p){ + + char *err_msg = NULL; + + if (device_create_file(device_p, &dev_attr_platform) < 0) { + err_msg = "dev_attr_platform"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_version) < 0) { + err_msg = "dev_attr_version"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_status) < 0) { + err_msg = "dev_attr_status"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_i2c) < 0) { + err_msg = "dev_attr_reset_i2c"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_swps) < 0) { + err_msg = "dev_attr_reset_swps"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_auto_config) < 0) { + err_msg = "dev_attr_auto_config"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_block_poll) < 0) { + err_msg = "dev_attr_block_poll"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_io_no_init) < 0) { + err_msg = "dev_attr_io_no_init"; + goto err_reg_modctl_attr; + } + + return 0; + +err_reg_modctl_attr: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_ioexp_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + char *err_msg = "ERR"; + + switch (transvr_obj->ioexp_obj_p->ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + if (register_ioexp_attr_sfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_GULMOHAR_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + case CPLD_TYPE_COTTONWOOD: + if (register_ioexp_attr_sfp_2(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_2 fail"; + goto err_reg_ioexp_attr; + } + break; + + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_SEQUOIA_P56P63: + case IOEXP_TYPE_LAVENDER_P65: + case IOEXP_TYPE_MAPLE_0ABC: + case IOEXP_TYPE_GULMOHAR_7ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + case IOEXP_TYPE_CEDAR_0ABC: + if (register_ioexp_attr_qsfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_qsfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + default: + err_msg = "Unknow type"; + goto err_reg_ioexp_attr; + } + return 0; + +err_reg_ioexp_attr: + SWPS_ERR("%s: %s :%d \n", + __func__, err_msg, transvr_obj->ioexp_obj_p->ioexp_type); + return -1; +} + + +static int +register_modctl_device(void) { + + struct device *device_p = NULL; + int minor_comm = 0; /* Default minor number for common device */ + dev_t dev_num = MKDEV(ctl_major, minor_comm); + char *err_msg = "ERROR"; + + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + NULL, /* void *private_data */ + SWP_DEV_MODCTL); /* const char *fmt */ + if (IS_ERR(device_p)){ + err_msg = "device_create fail"; + goto err_register_modctl_device_1; + } + if (register_modctl_attr(device_p) < 0) { + err_msg = "register_modctl_attr fail"; + goto err_register_modctl_device_2; + } + return 0; + +err_register_modctl_device_2: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_register_modctl_device_1: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_port_device(char *dev_name, + dev_t dev_num, + struct transvr_obj_s *transvr_obj){ + + struct device *device_p = NULL; + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + transvr_obj, /* void *private_data */ + dev_name); /* const char *fmt */ + if (IS_ERR(device_p)){ + goto err_regswp_create_dev; + } + if (register_transvr_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + if (register_ioexp_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + return 0; + +err_regswp_reg_attr: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_regswp_create_dev: + SWPS_ERR("%s fail! :%s\n", __func__, dev_name); + return -1; +} + + +static int +register_swp_module(void){ + + dev_t ctl_devt = 0; + dev_t port_devt = 0; + //int dev_total = port_total + 1; /* char_dev for module control */ + + /* Register device number */ + if (alloc_chrdev_region(&ctl_devt, 0, 1, SWP_DEV_MODCTL) < 0){ + SWPS_WARN("Allocate CTL MAJOR failure! \n"); + goto err_register_swp_module_1; + } + if (alloc_chrdev_region(&port_devt, 0, port_total, SWP_CLS_NAME) < 0){ + SWPS_WARN("Allocate PORT MAJOR failure! \n"); + goto err_register_swp_module_2; + } + ctl_major = MAJOR(ctl_devt); + port_major = MAJOR(port_devt); + + /* Create class object */ + swp_class_p = class_create(THIS_MODULE, SWP_CLS_NAME); + if (IS_ERR(swp_class_p)) { + SWPS_ERR("Create class failure! \n"); + goto err_register_swp_module_3; + } + return 0; + +err_register_swp_module_3: + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_register_swp_module_2: + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); +err_register_swp_module_1: + return -1; +} + + +/* ========== Module initial relate ========== + */ +static int +create_ioexp_objs(void) { + + int i, run_mod; + + /* Clean IOEXP object */ + clean_ioexp_objs(); + /* Get running mode */ + run_mod = IOEXP_MODE_DIRECT; + if (SWP_POLLING_ENABLE){ + run_mod = IOEXP_MODE_POLLING; + } + /* Create IOEXP object */ + for(i=0; i devlen_max) { + snprintf(err_msg, sizeof(err_msg), + "SWP_DEV_PORT too long!"); + goto err_initport_create_tranobj; + } + memset(dev_name, 0, sizeof(dev_name)); + snprintf(dev_name, devlen_max, "%s%d", SWP_DEV_PORT, port_id); + /* Create transceiver object */ + ioexp_obj_p = get_ioexp_obj(ioexp_id); + if (!ioexp_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "IOEXP object:%d not exist", ioexp_id); + goto err_initport_create_tranobj; + } + transvr_obj_p = create_transvr_obj(dev_name, chan_id, ioexp_obj_p, + ioexp_virt_offset, transvr_type, + chipset_type, run_mod); + if (!transvr_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "Create transceiver object fail :%s", dev_name); + goto err_initport_create_tranobj; + } + /* Setup Lane_ID mapping */ + i = ARRAY_SIZE(port_layout[minor_curr].lane_id); + j = ARRAY_SIZE(transvr_obj_p->lane_id); + if (i != j) { + snprintf(err_msg, sizeof(err_msg), + "Lane_id size inconsistent %d/%d", i, j); + goto err_initport_reg_device; + } + memcpy(transvr_obj_p->lane_id, port_layout[minor_curr].lane_id, i*sizeof(int)); + /* Create and register device object */ + if (register_port_device(dev_name, MKDEV(port_major, minor_curr), transvr_obj_p) < 0){ + snprintf(err_msg, sizeof(err_msg), + "register_port_device fail"); + goto err_initport_reg_device; + } + /* Setup device_ptr of transvr_obj */ + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + snprintf(err_msg, sizeof(err_msg), + "get_swpdev_by_name fail"); + goto err_initport_reg_device; + } + transvr_obj_p->transvr_dev_p = dev_p; + /* Success */ + ok_count++; + } + SWPS_INFO("%s: initialed %d port-dev\n",__func__, ok_count); + return 0; + +err_initport_reg_device: + kfree(transvr_obj_p); +err_initport_create_tranobj: + clean_port_objs(); + SWPS_ERR("%s: %s", __func__, err_msg); + SWPS_ERR("Dump: :%d :%d :%d :%d :%d :%d\n", + port_id, chan_id, ioexp_id, ioexp_virt_offset, transvr_type, run_mod); + return -1; +} + + +static int +init_dev_topology(void){ + + int err; + char *emsg = "ERR"; + flag_mod_state = SWP_STATE_NORMAL; + + err = init_ioexp_objs(); + switch(err){ + case 0: /* Normal */ + SWPS_DEBUG("%s: normal case\n", __func__); + break; + + case -1: /* topology error */ + SWPS_DEBUG("%s: detect tier-1 topology initial failure :%d\n", + __func__, err); + /* Reset and isolate */ + err = reset_i2c_topology(); + if (err < 0) { + emsg = "reset i2c topology fail"; + goto err_init_dev_topology; + } + /* Re-initial again */ + err = init_ioexp_objs(); + if (err < 0) { + emsg = "re-init ioexp objects fail"; + goto err_init_dev_topology; + } + break; + + case -2: /* Internal error */ + SWPS_DEBUG("%s: internal error case\n", __func__); + err = -2; + emsg = "internal error"; + goto err_init_dev_topology; + + default: + SWPS_DEBUG("%s: undefined error case\n", __func__); + emsg = "undefined error case"; + goto err_init_dev_topology; + } + SWPS_DEBUG("%s: initial I2C topology success\n", __func__); + return 0; + +err_init_dev_topology: + SWPS_ERR("%s: %s :%d\n", __func__, emsg, err); + return -1; +} + + +static int +init_polling_task(void){ + + if (SWP_POLLING_ENABLE){ + schedule_delayed_work(&swp_polling, _get_polling_period()); + } + return 0; +} + + +static int +init_swps_common(void){ + + char *err_msg = "ERR"; + + block_polling = 0; + auto_config = 0; + if ((SWP_AUTOCONFIG_ENABLE) && (SWP_POLLING_ENABLE)){ + auto_config = 1; + } + if (register_modctl_device() < 0) { + err_msg = "register_modctl_device fail"; + goto err_init_swps_common_1; + } + if (_update_auto_config_2_trnasvr() < 0) { + err_msg = "_update_auto_config_2_trnasvr fail"; + goto err_init_swps_common_1; + } + if (init_polling_task() < 0){ + err_msg = "init_polling_task fail"; + goto err_init_swps_common_1; + } + return 0; + +err_init_swps_common_1: + clean_swps_common(); + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int __init +swp_module_init(void){ + + if (get_platform_type() < 0){ + goto err_init_out; + } + if (get_layout_info() < 0){ + goto err_init_out; + } + if (register_swp_module() < 0){ + goto err_init_out; + } + if (create_ioexp_objs() < 0){ + goto err_init_ioexp; + } + if (create_port_objs() < 0){ + goto err_init_portobj; + } + if (init_mux_objs(gpio_rest_mux) < 0){ + goto err_init_mux; + } + if (init_dev_topology() < 0){ + goto err_init_topology; + } + if (init_swps_common() < 0){ + goto err_init_topology; + } + SWPS_INFO("Inventec switch-port module V.%s initial success.\n", SWP_VERSION); + return 0; + + +err_init_topology: + clean_mux_objs(); +err_init_mux: + clean_port_objs(); +err_init_portobj: + clean_ioexp_objs(); +err_init_ioexp: + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_init_out: + SWPS_ERR("Inventec switch-port module V.%s initial failure.\n", SWP_VERSION); + return -1; +} + + +static void __exit +swp_module_exit(void){ + + clean_swps_common(); + clean_port_objs(); + clean_ioexp_objs(); + clean_mux_objs(); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); + SWPS_INFO("Remove Inventec switch-port module success.\n"); +} + + +/* Module information */ +MODULE_AUTHOR(SWP_AUTHOR); +MODULE_DESCRIPTION(SWP_DESC); +MODULE_VERSION(SWP_VERSION); +MODULE_LICENSE(SWP_LICENSE); +MODULE_SOFTDEP("pre: inv_platform"); +module_param(gpio_base, int, S_IRUGO); + +module_init(swp_module_init); +module_exit(swp_module_exit); + + + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_swps.h b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_swps.h new file mode 100644 index 00000000000..dfab000c367 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_swps.h @@ -0,0 +1,1940 @@ +#ifndef INV_SWPS_H +#define INV_SWPS_H + +#include "transceiver.h" +#include "io_expander.h" +#include "inv_mux.h" + +/* Module settings */ +#define SWP_CLS_NAME "swps" +#define SWP_DEV_PORT "port" +#define SWP_DEV_MODCTL "module" +#define SWP_RESET_PWD "inventec" +#define SWP_POLLING_PERIOD (300) /* msec */ +#define SWP_POLLING_ENABLE (1) +#define SWP_AUTOCONFIG_ENABLE (1) + +/* Module information */ +#define SWP_AUTHOR "Neil " +#define SWP_DESC "Inventec port and transceiver driver" +#define SWP_VERSION "4.4.1" +#define SWP_LICENSE "GPL" + +/* Module status define */ +#define SWP_STATE_NORMAL (0) +#define SWP_STATE_I2C_DIE (-91) + +/* [Note]: + * Functions and mechanism for auto-detect platform type is ready, + * But HW and BIOS not ready! We need to wait them. + * So, please do not use PLATFORM_TYPE_AUTO until they are ready. + * (2016.06.13) + */ +#define PLATFORM_TYPE_AUTO (100) +#define PLATFORM_TYPE_MAGNOLIA (111) +#define PLATFORM_TYPE_MAGNOLIA_FNC (112) +#define PLATFORM_TYPE_REDWOOD (121) +#define PLATFORM_TYPE_REDWOOD_FSL (122) +#define PLATFORM_TYPE_HUDSON32I_GA (131) +#define PLATFORM_TYPE_SPRUCE (141) +#define PLATFORM_TYPE_CYPRESS_GA1 (151) /* Up -> Down */ +#define PLATFORM_TYPE_CYPRESS_GA2 (152) /* Down -> Up */ +#define PLATFORM_TYPE_CYPRESS_BAI (153) /* Down -> Up */ +#define PLATFORM_TYPE_TAHOE (161) +#define PLATFORM_TYPE_SEQUOIA_GA (171) +#define PLATFORM_TYPE_SEQUOIA_B0 (172) +#define PLATFORM_TYPE_LAVENDER_GA (181) +#define PLATFORM_TYPE_LAVENDER_ONL (182) +#define PLATFORM_TYPE_COTTONWOOD_RANGELEY (191) +#define PLATFORM_TYPE_COTTONWOOD_LITE (192) +#define PLATFORM_TYPE_MAPLE_GA (201) +#define PLATFORM_TYPE_GULMOHAR_GA (202) +#define PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA (203) +#define PLATFORM_TYPE_PEONY_SFP_GA (204) +#define PLATFORM_TYPE_PEONY_COPPER_GA (205) +#define PLATFORM_TYPE_PEONY_AUTO (206) +#define PLATFORM_TYPE_MAPLE_B (207) +#define PLATFORM_TYPE_MAPLE_J (208) +#define PLATFORM_TYPE_CEDAR_GA (209) +/* Current running platfrom */ +#define PLATFORM_SETTINGS PLATFORM_TYPE_SEQUOIA_B0 + +/* Define platform flag and kernel version */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA_FNC) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD) + #define SWPS_REDWOOD (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD_FSL) + #define SWPS_REDWOOD_FSL (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_HUDSON32I_GA) + #define SWPS_HUDSON32I_GA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SPRUCE) + #define SWPS_SPRUCE (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA1) + #define SWPS_CYPRESS_GA1 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA2) + #define SWPS_CYPRESS_GA2 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_BAI) + #define SWPS_CYPRESS_BAI (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_TAHOE) + #define SWPS_TAHOE (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SEQUOIA_GA) + #define SWPS_SEQUOIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_COTTONWOOD_RANGELEY) + #define SWPS_COTTONWOOD_RANGELEY (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_COTTONWOOD_LITE) + #define SWPS_COTTONWOOD_LITE (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAPLE_GA) + #define SWPS_MAPLE_GA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAPLE_B) + #define SWPS_MAPLE_B (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAPLE_J) + #define SWPS_MAPLE_J (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_GULMOHAR_GA) + #define SWPS_GULMOHAR (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA) + #define SWPS_GULMOHAR_2T_EVT1 (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_PEONY_SFP_GA) + #define SWPS_PEONY_SFP (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_PEONY_COPPER_GA) + #define SWPS_PEONY_COPPER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_PEONY_AUTO) + #define SWPS_PEONY_SFP (1) + #define SWPS_PEONY_COPPER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CEDAR_GA) + #define SWPS_CEDAR_GA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SEQUOIA_B0) + #define SWPS_SEQUOIA_B0 (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#endif + +struct inv_platform_s { + int id; + char name[64]; +}; + +struct inv_ioexp_layout_s { + int ioexp_id; + int ioexp_type; + struct ioexp_addr_s addr[4]; +}; + +struct inv_port_layout_s { + int port_id; + int chan_id; + int ioexp_id; + int ioexp_offset; + int transvr_type; + int chipset_type; + int lane_id[8]; +}; + + +/* ========================================== + * Inventec Platform Settings + * ========================================== + */ +struct inv_platform_s platform_map[] = { + {PLATFORM_TYPE_AUTO, "Auto-Detect" }, + {PLATFORM_TYPE_MAGNOLIA, "Magnolia" }, + {PLATFORM_TYPE_MAGNOLIA_FNC, "Magnolia_FNC" }, + {PLATFORM_TYPE_REDWOOD, "Redwood" }, + {PLATFORM_TYPE_REDWOOD_FSL, "Redwood_FSL" }, + {PLATFORM_TYPE_HUDSON32I_GA, "Hudson32i" }, + {PLATFORM_TYPE_SPRUCE, "Spruce" }, + {PLATFORM_TYPE_CYPRESS_GA1, "Cypress_GA1" }, + {PLATFORM_TYPE_CYPRESS_GA2, "Cypress_GA2" }, + {PLATFORM_TYPE_CYPRESS_BAI, "Cypress_BAI" }, + {PLATFORM_TYPE_TAHOE, "Tahoe" }, + {PLATFORM_TYPE_SEQUOIA_GA, "Sequoia_GA" }, + {PLATFORM_TYPE_SEQUOIA_B0, "Sequoia_B0" }, + {PLATFORM_TYPE_LAVENDER_GA, "Lavender_GA" }, + {PLATFORM_TYPE_LAVENDER_ONL, "Lavender_ONL" }, + {PLATFORM_TYPE_COTTONWOOD_RANGELEY, "Cottonwood_RANGELEY" }, + {PLATFORM_TYPE_COTTONWOOD_LITE, "Cottonwood_Lite" }, + {PLATFORM_TYPE_MAPLE_GA, "Maple_GA" }, + {PLATFORM_TYPE_MAPLE_B, "Maple_B" }, + {PLATFORM_TYPE_MAPLE_J, "Maple_J" }, + {PLATFORM_TYPE_GULMOHAR_GA, "Gulmohar_GA" }, + {PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA, "Gulmohar_2T_EVT1_GA" }, + {PLATFORM_TYPE_PEONY_SFP_GA, "Peony_SFP_GA" }, + {PLATFORM_TYPE_PEONY_COPPER_GA, "Peony_Copper_GA" }, + {PLATFORM_TYPE_PEONY_AUTO, "Peony_Auto_Detect" }, + {PLATFORM_TYPE_CEDAR_GA, "Cedar_GA" }, +}; + + +/* ========================================== + * Magnolia Layout configuration + * ========================================== + */ +#ifdef SWPS_MAGNOLIA +unsigned magnolia_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s magnolia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAGINOLIA_NAB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {1, IOEXP_TYPE_MAGINOLIA_NAB, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {2, IOEXP_TYPE_MAGINOLIA_NAB, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {3, IOEXP_TYPE_MAGINOLIA_4AB, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf0, 0xff}, {0xf0, 0xff}, }, }, /* addr[1] = I/O Expander 4 B */ + }, + {4, IOEXP_TYPE_MAGINOLIA_NAB, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {5, IOEXP_TYPE_MAGINOLIA_NAB, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {6, IOEXP_TYPE_MAGINOLIA_7AB, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[1] = I/O Expander 7 B */ + }, +}; + +struct inv_port_layout_s magnolia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 16} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 15} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 14} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 13} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 24} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 23} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 22} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 21} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 28} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 27} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 26} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 25} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 32} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 31} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 30} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 29} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 48} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 47} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 46} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 45} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 52} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 51} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 50} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 49} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 56} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 55} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 54} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 53} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 60} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 59} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 58} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 57} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 64} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 63} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 62} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 61} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 68} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 67} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 66} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 65} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 72} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 71} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 70} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 69} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 76} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 75} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 74} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAGNOLIA, { 73} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP, CHIP_TYPE_MAGNOLIA, { 81, 82, 83, 84} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP, CHIP_TYPE_MAGNOLIA, { 77, 78, 79, 80} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP, CHIP_TYPE_MAGNOLIA, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP, CHIP_TYPE_MAGNOLIA, {101,102,103,104} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP, CHIP_TYPE_MAGNOLIA, {105,106,107,108} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP, CHIP_TYPE_MAGNOLIA, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD +unsigned redwood_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s redwood_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + +struct inv_port_layout_s redwood_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Hudson32i Layout configuration + * ========================================== + */ +#ifdef SWPS_HUDSON32I_GA +unsigned hudsin32iga_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s hudson32iga_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_HUDSON32IGA_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {1, IOEXP_TYPE_HUDSON32IGA_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {2, IOEXP_TYPE_HUDSON32IGA_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, + {3, IOEXP_TYPE_HUDSON32IGA_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, +}; + +struct inv_port_layout_s hudson32iga_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 1, 2, 3, 4} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 5, 6, 7, 8} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 9, 10, 11, 12} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 13, 14, 15, 16} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 17, 18, 19, 20} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 21, 22, 23, 24} }, + { 6, 12, 0, 6, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 25, 26, 27, 28} }, + { 7, 13, 0, 7, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 29, 30, 31, 32} }, + { 8, 14, 1, 0, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 33, 34, 35, 36} }, + { 9, 15, 1, 1, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 37, 38, 39, 40} }, + {10, 16, 1, 2, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 41, 42, 43, 44} }, + {11, 17, 1, 3, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 45, 46, 47, 48} }, + {12, 18, 1, 4, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 49, 50, 51, 52} }, + {13, 19, 1, 5, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 53, 54, 55, 56} }, + {14, 20, 1, 6, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 57, 58, 59, 60} }, + {15, 21, 1, 7, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 61, 62, 63, 64} }, + {16, 22, 2, 0, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 65, 66, 67, 68} }, + {17, 23, 2, 1, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 69, 70, 71, 72} }, + {18, 24, 2, 2, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 73, 74, 75, 76} }, + {19, 25, 2, 3, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 77, 78, 79, 80} }, + {20, 26, 2, 4, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 81, 82, 83, 84} }, + {21, 27, 2, 5, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 85, 86, 87, 88} }, + {22, 28, 2, 6, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 89, 90, 91, 92} }, + {23, 29, 2, 7, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 93, 94, 95, 96} }, + {24, 30, 3, 0, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 97, 98, 99,100} }, + {25, 31, 3, 1, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, {101,102,103,104} }, + {26, 32, 3, 2, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, {105,106,107,108} }, + {27, 33, 3, 3, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, {109,110,111,112} }, + {28, 34, 3, 4, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, {113,114,115,116} }, + {29, 35, 3, 5, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, {117,118,119,120} }, + {30, 36, 3, 6, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, {121,122,123,124} }, + {31, 37, 3, 7, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Spruce Layout configuration + * ========================================== + */ +#ifdef SWPS_SPRUCE +unsigned spruce_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s spruce_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SPRUCE_7AB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[2] = I/O Expander 7B */ + }, +}; + +struct inv_port_layout_s spruce_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 81, 82, 83, 84} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 77, 78, 79, 80} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, { 97, 98, 99,100} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, {101,102,103,104} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, {105,106,107,108} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, CHIP_TYPE_MAGNOLIA, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Up->Down]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA1 +unsigned cypress_ga1_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s cypress_ga1_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga1_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 1} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 2} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 3} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 4} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 5} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 6} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 7} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 8} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 9} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 10} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 11} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 12} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 21} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 22} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 23} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 24} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 33} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 34} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 35} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 36} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 37} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 38} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 39} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 40} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 41} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 42} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 43} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 44} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 49} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 50} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 51} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 52} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 53} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 54} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 55} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 56} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 65} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 66} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 67} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 68} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 69} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 70} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 71} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 72} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 81} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 82} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 83} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 84} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 97, 98, 99,100} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 85, 86, 87, 88} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {101,102,103,104} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {105,106,107,108} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {109,110,111,112} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {117,118,119,120} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Down->Up]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA2 +unsigned cypress_ga2_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_ga2_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga2_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 11, 0, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 2} }, + { 1, 10, 0, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 1} }, + { 2, 13, 0, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 4} }, + { 3, 12, 0, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 3} }, + { 4, 15, 0, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 6} }, + { 5, 14, 0, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 5} }, + { 6, 17, 0, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 8} }, + { 7, 16, 0, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 7} }, + { 8, 19, 1, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 10} }, + { 9, 18, 1, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 9} }, + {10, 21, 1, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 12} }, + {11, 20, 1, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 11} }, + {12, 23, 1, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 22} }, + {13, 22, 1, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 21} }, + {14, 25, 1, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 24} }, + {15, 24, 1, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 23} }, + {16, 27, 2, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 34} }, + {17, 26, 2, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 33} }, + {18, 29, 2, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 36} }, + {19, 28, 2, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 35} }, + {20, 31, 2, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 38} }, + {21, 30, 2, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 37} }, + {22, 33, 2, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 40} }, + {23, 32, 2, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 39} }, + {24, 35, 3, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 42} }, + {25, 34, 3, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 41} }, + {26, 37, 3, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 44} }, + {27, 36, 3, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 43} }, + {28, 39, 3, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 50} }, + {29, 38, 3, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 49} }, + {30, 41, 3, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 52} }, + {31, 40, 3, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 51} }, + {32, 43, 4, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 54} }, + {33, 42, 4, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 53} }, + {34, 45, 4, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 56} }, + {35, 44, 4, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 55} }, + {36, 47, 4, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 66} }, + {37, 46, 4, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 65} }, + {38, 49, 4, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 68} }, + {39, 48, 4, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 67} }, + {40, 51, 5, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 70} }, + {41, 50, 5, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 69} }, + {42, 53, 5, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 72} }, + {43, 52, 5, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 71} }, + {44, 55, 5, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 82} }, + {45, 54, 5, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 81} }, + {46, 57, 5, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 84} }, + {47, 56, 5, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 83} }, + {48, 59, 6, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 85, 86, 87, 88} }, + {49, 58, 6, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 97, 98, 99,100} }, + {50, 61, 6, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {105,106,107,108} }, + {51, 60, 6, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {101,102,103,104} }, + {52, 63, 6, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {117,118,119,120} }, + {53, 62, 6, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (C1 version) + * ========================================== + */ +#ifdef SWPS_CYPRESS_BAI +unsigned cypress_b_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_b_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_b_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 2} }, + { 2, 10, 0, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 1} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 4} }, + { 4, 12, 0, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 3} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 6} }, + { 6, 14, 0, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 5} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 8} }, + { 8, 16, 0, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 7} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 10} }, + {10, 18, 1, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 9} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 12} }, + {12, 20, 1, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 11} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 22} }, + {14, 22, 1, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 21} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 24} }, + {16, 24, 1, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 23} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 34} }, + {18, 26, 2, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 33} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 36} }, + {20, 28, 2, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 35} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 38} }, + {22, 30, 2, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 37} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 40} }, + {24, 32, 2, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 39} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 42} }, + {26, 34, 3, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 41} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 44} }, + {28, 36, 3, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 43} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 50} }, + {30, 38, 3, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 49} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 52} }, + {32, 40, 3, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 51} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 54} }, + {34, 42, 4, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 53} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 56} }, + {36, 44, 4, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 55} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 66} }, + {38, 46, 4, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 65} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 68} }, + {40, 48, 4, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 67} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 70} }, + {42, 50, 5, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 69} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 72} }, + {44, 52, 5, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 71} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 82} }, + {46, 54, 5, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 81} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 84} }, + {48, 56, 5, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 83} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 85, 86, 87, 88} }, + {50, 58, 6, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {105,106,107,108} }, + {52, 60, 6, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {101,102,103,104} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {117,118,119,120} }, + {54, 62, 6, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood_fsl Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD_FSL +unsigned redwood_fsl_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s redwood_fsl_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + + +struct inv_port_layout_s redwood_fsl_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Tahoe Layout configuration + * ========================================== + */ +#ifdef SWPS_TAHOE +unsigned tahoe_gpio_rest_mux = MUX_RST_GPIO_249_PCA9548; + +struct inv_ioexp_layout_s tahoe_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_TAHOE_6ABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {1, IOEXP_TYPE_TAHOE_5A, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[0] = I/O Expander 5 A */ + }, +}; + + +struct inv_port_layout_s tahoe_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 12, 1, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 65, 66, 67, 68} }, + { 1, 11, 1, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 53, 54, 55, 56} }, + { 2, 22, 0, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 69, 70, 71, 72} }, + { 3, 21, 0, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 81, 82, 83, 84} }, + { 4, 24, 0, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 97, 98, 99, 100} }, + { 5, 23, 0, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 85, 86, 87, 88} }, + { 6, 18, 0, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {101, 102, 103, 104} }, + { 7, 17, 0, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {105, 106, 107, 108} }, + { 8, 20, 0, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {113, 114, 115, 116} }, + { 9, 19, 0, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {109, 110, 111, 112} }, +}; +#endif + + +/* ========================================== + * Sequoia Layout configuration + * ========================================== + */ +#ifdef SWPS_SEQUOIA +unsigned sequoia_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s sequoia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { {1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + +struct inv_port_layout_s sequoia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 9, 0, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 9, 10, 11, 12} }, + { 1, 10, 0, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 1, 2, 3, 4} }, + { 2, 11, 0, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 25, 26, 27, 28} }, + { 3, 12, 0, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 17, 18, 19, 20} }, + { 4, 13, 0, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 41, 42, 43, 44} }, + { 5, 14, 0, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 33, 34, 35, 36} }, + { 6, 15, 0, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 57, 58, 59, 60} }, + { 7, 16, 0, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 49, 50, 51, 52} }, + { 8, 17, 1, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 73, 74, 75, 76} }, + { 9, 18, 1, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 65, 66, 67, 68} }, + {10, 19, 1, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 89, 90, 91, 92} }, + {11, 20, 1, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 81, 82, 83, 84} }, + {12, 21, 1, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {105, 106, 107, 108} }, + {13, 22, 1, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 97, 98, 99, 100} }, + {14, 23, 1, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {121, 122, 123, 124} }, + {15, 24, 1, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {113, 114, 115, 116} }, + {16, 25, 2, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {137, 138, 139, 140} }, + {17, 26, 2, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {129, 130, 131, 132} }, + {18, 27, 2, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {153, 154, 155, 156} }, + {19, 28, 2, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {145, 146, 147, 148} }, + {20, 29, 2, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {169, 170, 171, 172} }, + {21, 30, 2, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {161, 162, 163, 164} }, + {22, 31, 2, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {185, 186, 187, 188} }, + {23, 32, 2, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {177, 178, 179, 180} }, + {24, 33, 3, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {201, 202, 203, 204} }, + {25, 34, 3, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {193, 194, 195, 196} }, + {26, 35, 3, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {217, 218, 219, 220} }, + {27, 36, 3, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {209, 210, 211, 212} }, + {28, 37, 3, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {233, 234, 235, 236} }, + {29, 38, 3, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {225, 226, 227, 228} }, + {30, 39, 3, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {249, 250, 251, 252} }, + {31, 40, 3, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {241, 242, 243, 244} }, + {32, 44, 4, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 13, 14, 15, 16} }, + {33, 43, 4, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 5, 6, 7, 8} }, + {34, 42, 4, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 29, 30, 31, 32} }, + {35, 41, 4, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 21, 22, 23, 24} }, + {36, 48, 4, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 45, 46, 47, 48} }, + {37, 47, 4, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 37, 38, 39, 40} }, + {38, 46, 4, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 61, 62, 63, 64} }, + {39, 45, 4, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 53, 54, 55, 56} }, + {40, 52, 5, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 77, 78, 79, 80} }, + {41, 51, 5, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 69, 70, 71, 72} }, + {42, 50, 5, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 93, 94, 95, 96} }, + {43, 49, 5, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 85, 86, 87, 88} }, + {44, 56, 5, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {109, 110, 111, 112} }, + {45, 55, 5, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {101, 102, 103, 104} }, + {46, 54, 5, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {125, 126, 127, 128} }, + {47, 53, 5, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {117, 118, 119, 120} }, + {48, 60, 6, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {141, 142, 143, 144} }, + {49, 59, 6, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {133, 134, 135, 136} }, + {50, 58, 6, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {157, 158, 159, 160} }, + {51, 57, 6, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {149, 150, 151, 152} }, + {52, 64, 6, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {173, 174, 175, 176} }, + {53, 63, 6, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {165, 166, 167, 168} }, + {54, 62, 6, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {189, 190, 191, 192} }, + {55, 61, 6, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {181, 182, 183, 184} }, + {56, 68, 7, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {205, 206, 207, 208} }, + {57, 67, 7, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {197, 198, 199, 200} }, + {58, 66, 7, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {221, 222, 223, 224} }, + {59, 65, 7, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {213, 214, 215, 216} }, + {60, 72, 7, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {237, 238, 239, 240} }, + {61, 71, 7, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {229, 230, 231, 232} }, + {62, 70, 7, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {253, 254, 255, 256} }, + {63, 69, 7, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {245, 246, 247, 248} }, +}; +#endif + +/* ========================================== + * Sequoia B0 Layout configuration + * ========================================== + */ +#ifdef SWPS_SEQUOIA_B0 +unsigned sequoia_b0_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s sequoia_b0_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { {9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + {9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + {9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {13, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {13, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {13, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_P56P63, { {14, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {14, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {14, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + +struct inv_port_layout_s sequoia_b0_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 100, 0, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 9, 10, 11, 12} }, + { 1, 101, 0, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 1, 2, 3, 4} }, + { 2, 102, 0, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 25, 26, 27, 28} }, + { 3, 103, 0, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 17, 18, 19, 20} }, + { 4, 104, 0, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 41, 42, 43, 44} }, + { 5, 105, 0, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 33, 34, 35, 36} }, + { 6, 106, 0, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 57, 58, 59, 60} }, + { 7, 107, 0, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 49, 50, 51, 52} }, + { 8, 108, 1, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 73, 74, 75, 76} }, + { 9, 109, 1, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 65, 66, 67, 68} }, + {10, 110, 1, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 89, 90, 91, 92} }, + {11, 111, 1, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 81, 82, 83, 84} }, + {12, 112, 1, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {105, 106, 107, 108} }, + {13, 113, 1, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 97, 98, 99, 100} }, + {14, 114, 1, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {121, 122, 123, 124} }, + {15, 115, 1, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {113, 114, 115, 116} }, + {16, 116, 2, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {137, 138, 139, 140} }, + {17, 117, 2, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {129, 130, 131, 132} }, + {18, 118, 2, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {153, 154, 155, 156} }, + {19, 119, 2, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {145, 146, 147, 148} }, + {20, 120, 2, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {169, 170, 171, 172} }, + {21, 121, 2, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {161, 162, 163, 164} }, + {22, 122, 2, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {185, 186, 187, 188} }, + {23, 123, 2, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {177, 178, 179, 180} }, + {24, 124, 3, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {201, 202, 203, 204} }, + {25, 125, 3, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {193, 194, 195, 196} }, + {26, 126, 3, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {217, 218, 219, 220} }, + {27, 127, 3, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {209, 210, 211, 212} }, + {28, 128, 3, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {233, 234, 235, 236} }, + {29, 129, 3, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {225, 226, 227, 228} }, + {30, 130, 3, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {249, 250, 251, 252} }, + {31, 131, 3, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {241, 242, 243, 244} }, + {32, 135, 4, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 13, 14, 15, 16} }, + {33, 134, 4, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 5, 6, 7, 8} }, + {34, 133, 4, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 29, 30, 31, 32} }, + {35, 132, 4, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 21, 22, 23, 24} }, + {36, 139, 4, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 45, 46, 47, 48} }, + {37, 138, 4, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 37, 38, 39, 40} }, + {38, 137, 4, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 61, 62, 63, 64} }, + {39, 136, 4, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 53, 54, 55, 56} }, + {40, 143, 5, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 77, 78, 79, 80} }, + {41, 142, 5, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 69, 70, 71, 72} }, + {42, 141, 5, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 93, 94, 95, 96} }, + {43, 140, 5, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, { 85, 86, 87, 88} }, + {44, 147, 5, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {109, 110, 111, 112} }, + {45, 146, 5, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {101, 102, 103, 104} }, + {46, 145, 5, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {125, 126, 127, 128} }, + {47, 144, 5, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {117, 118, 119, 120} }, + {48, 151, 6, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {141, 142, 143, 144} }, + {49, 150, 6, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {133, 134, 135, 136} }, + {50, 149, 6, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {157, 158, 159, 160} }, + {51, 148, 6, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {149, 150, 151, 152} }, + {52, 155, 6, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {173, 174, 175, 176} }, + {53, 154, 6, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {165, 166, 167, 168} }, + {54, 153, 6, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {189, 190, 191, 192} }, + {55, 152, 6, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {181, 182, 183, 184} }, + {56, 159, 7, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {205, 206, 207, 208} }, + {57, 158, 7, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {197, 198, 199, 200} }, + {58, 157, 7, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {221, 222, 223, 224} }, + {59, 156, 7, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {213, 214, 215, 216} }, + {60, 163, 7, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {237, 238, 239, 240} }, + {61, 162, 7, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {229, 230, 231, 232} }, + {62, 161, 7, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {253, 254, 255, 256} }, + {63, 160, 7, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_REDWOOD, {245, 246, 247, 248} }, +}; +#endif + +/* ========================================== + * Lavender Layout configuration + * ========================================== + */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; +#endif + +#ifdef SWPS_LAVENDER +struct inv_ioexp_layout_s lavender_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { { 1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + { 1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { { 2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + { 2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + { 2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { { 3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + { 3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + { 3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { { 4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + { 4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + { 4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { { 9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + { 9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + { 9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, + {8, IOEXP_TYPE_LAVENDER_P65, { { 5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xF6, 0xff}, {0xF8, 0xff}, }, }, /* addr[0] = I/O Expander CPU */ + }, +}; + + +struct inv_port_layout_s lavender_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 17, 0, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {188, 189, 190, 191} }, + { 1, 18, 0, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {184, 185, 186, 187} }, + { 2, 19, 0, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {180, 181, 182, 183} }, + { 3, 20, 0, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {176, 177, 178, 179} }, + { 4, 21, 0, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {172, 173, 174, 175} }, + { 5, 22, 0, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {168, 169, 170, 171} }, + { 6, 23, 0, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {164, 165, 166, 167} }, + { 7, 24, 0, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {160, 161, 162, 163} }, + { 8, 25, 1, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {156, 157, 158, 159} }, + { 9, 26, 1, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {152, 153, 154, 155} }, + {10, 27, 1, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {148, 149, 150, 151} }, + {11, 28, 1, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {144, 145, 146, 147} }, + {12, 29, 1, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {140, 141, 142, 143} }, + {13, 30, 1, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {136, 137, 138, 139} }, + {14, 31, 1, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {132, 133, 134, 135} }, + {15, 32, 1, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {128, 129, 130, 131} }, + {16, 33, 2, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 0, 1, 2, 3} }, + {17, 34, 2, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 4, 5, 6, 7} }, + {18, 35, 2, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 8, 9, 10, 11} }, + {19, 36, 2, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 12, 13, 14, 15} }, + {20, 37, 2, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 16, 17, 18, 19} }, + {21, 38, 2, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 20, 21, 22, 23} }, + {22, 39, 2, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 24, 25, 26, 27} }, + {23, 40, 2, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 28, 29, 30, 31} }, + {24, 41, 3, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 32, 33, 34, 35} }, + {25, 42, 3, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 36, 37, 38, 39} }, + {26, 43, 3, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 40, 41, 42, 43} }, + {27, 44, 3, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 44, 45, 46, 47} }, + {28, 45, 3, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 48, 49, 50, 51} }, + {29, 46, 3, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 52, 53, 54, 55} }, + {30, 47, 3, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 56, 57, 58, 59} }, + {31, 48, 3, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 60, 61, 62, 63} }, + {32, 49, 4, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {256, 257, 258, 259} }, + {33, 50, 4, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {260, 261, 262, 263} }, + {34, 51, 4, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {264, 265, 266, 267} }, + {35, 52, 4, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {268, 269, 270, 271} }, + {36, 53, 4, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {272, 273, 274, 275} }, + {37, 54, 4, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {276, 277, 278, 279} }, + {38, 55, 4, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {280, 281, 282, 283} }, + {39, 56, 4, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {284, 285, 286, 287} }, + {40, 57, 5, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {288, 289, 290, 291} }, + {41, 58, 5, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {292, 293, 294, 295} }, + {42, 59, 5, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {296, 297, 298, 299} }, + {43, 60, 5, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {300, 301, 302, 303} }, + {44, 61, 5, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {304, 305, 306, 307} }, + {45, 62, 5, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {308, 309, 310, 311} }, + {46, 63, 5, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {312, 313, 314, 315} }, + {47, 64, 5, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {316, 317, 318, 319} }, + {48, 65, 6, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {444, 445, 446, 447} }, + {49, 66, 6, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {440, 441, 442, 443} }, + {50, 67, 6, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {436, 437, 438, 439} }, + {51, 68, 6, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {432, 433, 434, 435} }, + {52, 69, 6, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {428, 429, 430, 431} }, + {53, 70, 6, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {424, 425, 426, 427} }, + {54, 71, 6, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {420, 421, 422, 423} }, + {55, 72, 6, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {416, 417, 418, 419} }, + {56, 73, 7, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {412, 413, 414, 415} }, + {57, 74, 7, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {408, 409, 410, 411} }, + {58, 75, 7, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {404, 405, 406, 407} }, + {59, 76, 7, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {400, 401, 402, 403} }, + {60, 77, 7, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {396, 397, 398, 399} }, + {61, 78, 7, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {392, 393, 394, 395} }, + {62, 79, 7, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {388, 389, 390, 391} }, + {63, 80, 7, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {384, 385, 386, 387} }, + {64, 5, 8, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 64, 65, 66, 67} }, +}; +#endif + +/* =========================================================== + * Cottonwood Layout configuration Rangeley (Rangeley CPU board) + * =========================================================== + */ +#ifdef SWPS_COTTONWOOD_RANGELEY +unsigned cottonwood_rangeley_gpio_rest_mux = MUX_RST_GPIO_500_PCA9548; + +struct inv_ioexp_layout_s cottonwood_rangeley_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, CPLD_TYPE_COTTONWOOD,{ {1, 0x55, {22, 23, 24, 25}, {22, 23, 24, 25}, {-1, -1, -1, -1}, {0xee, 0xee, 0x99, 0x99}, {0x00, 0x00, 0x00, 0x00}, }, + }, + }, +}; + + +struct inv_port_layout_s cottonwood_rangeley_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 2, 0, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 75} }, + { 1, 3, 0, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 77} }, + { 2, 4, 0, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 79} }, + { 3, 5, 0, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_REDWOOD, { 81} }, +}; +#endif + +/* =========================================================== + * Cottonwood-Lite Layout configuration + * =========================================================== + */ +#ifdef SWPS_COTTONWOOD_LITE +unsigned cottonwood_lite_gpio_rest_mux = MUX_RST_CPLD_COTTONWOOD; + +struct inv_ioexp_layout_s cottonwood_lite_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, CPLD_TYPE_COTTONWOOD,{ {0, 0x55, {0x16, 0x17, 0x18, 0x19}, {0x16, 0x17, 0x18, 0x19}, {-1, -1, -1, -1}, {0xee, 0xee, 0x99, 0x99}, {0x00, 0x00, 0x00, 0x00}, }, + }, + }, +}; + + +struct inv_port_layout_s cottonwood_lite_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 2, 0, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_COTTONWOOD_LITE, { 42} }, + { 1, 3, 0, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_COTTONWOOD_LITE, { 43} }, + { 2, 4, 0, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_COTTONWOOD_LITE, { 44} }, + { 3, 5, 0, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_COTTONWOOD_LITE, { 45} }, +}; +#endif + +/* =========================================================== + * Maple Layout configuration (Old) + * =========================================================== + */ +#ifdef SWPS_MAPLE_GA +unsigned maple_ga_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s maple_ga_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAPLE_0ABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_MAPLE_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_MAPLE_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_MAPLE_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_MAPLE_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_MAPLE_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_MAPLE_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s maple_ga_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 18, 1, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 1} }, + { 1, 19, 1, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 2} }, + { 2, 20, 1, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 3} }, + { 3, 21, 1, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 4} }, + { 4, 22, 1, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 5} }, + { 5, 23, 1, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 6} }, + { 6, 24, 1, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 7} }, + { 7, 25, 1, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 8} }, + { 8, 26, 2, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 13} }, + { 9, 27, 2, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 14} }, + {10, 28, 2, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 15} }, + {11, 29, 2, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 16} }, + {12, 30, 2, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 21} }, + {13, 31, 2, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 22} }, + {14, 32, 2, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 23} }, + {15, 33, 2, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 24} }, + {16, 34, 3, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 29} }, + {17, 35, 3, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 30} }, + {18, 36, 3, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 31} }, + {19, 37, 3, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 32} }, + {20, 38, 3, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 33} }, + {21, 39, 3, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 34} }, + {22, 40, 3, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 35} }, + {23, 41, 3, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 36} }, + {24, 42, 4, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 41} }, + {25, 43, 4, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 42} }, + {26, 44, 4, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 43} }, + {27, 45, 4, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 44} }, + {28, 46, 4, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 49} }, + {29, 47, 4, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 50} }, + {30, 48, 4, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 51} }, + {31, 49, 4, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 52} }, + {32, 50, 5, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 57} }, + {33, 51, 5, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 58} }, + {34, 52, 5, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 59} }, + {35, 53, 5, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 60} }, + {36, 54, 5, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 61} }, + {37, 55, 5, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 62} }, + {38, 56, 5, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 63} }, + {39, 57, 5, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 64} }, + {40, 58, 6, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 65} }, + {41, 59, 6, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 66} }, + {42, 60, 6, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 67} }, + {43, 61, 6, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 68} }, + {44, 62, 6, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 69} }, + {45, 63, 6, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 70} }, + {46, 64, 6, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 71} }, + {47, 65, 6, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 72} }, + {48, 10, 0, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 77, 78, 79, 80} }, + {49, 11, 0, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 85, 86, 87, 88} }, + {50, 12, 0, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 93, 94, 95, 96} }, + {51, 13, 0, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 97, 98, 99,100} }, + {52, 14, 0, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, {105,106,107,108} }, + {53, 15, 0, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, {113,114,115,116} }, + {54, 16, 0, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, {121,122,123,124} }, + {55, 17, 0, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, {125,126,127,128} }, +}; +#endif + +/* =========================================================== + * Maple Layout configuration (B version) + * =========================================================== + */ +#ifdef SWPS_MAPLE_B +unsigned maple_b_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s maple_b_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAPLE_0ABC, { { 6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + { 6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_MAPLE_NABC, { { 7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_MAPLE_NABC, { { 8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_MAPLE_NABC, { { 9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_MAPLE_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_MAPLE_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_MAPLE_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s maple_b_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 1, 23, 1, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 2} }, + { 2, 22, 1, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 1} }, + { 3, 25, 1, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 4} }, + { 4, 24, 1, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 3} }, + { 5, 27, 1, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 6} }, + { 6, 26, 1, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 5} }, + { 7, 29, 1, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 8} }, + { 8, 28, 1, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 7} }, + { 9, 31, 2, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 14} }, + {10, 30, 2, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 13} }, + {11, 33, 2, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 16} }, + {12, 32, 2, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 15} }, + {13, 35, 2, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 22} }, + {14, 34, 2, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 21} }, + {15, 37, 2, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 24} }, + {16, 36, 2, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 23} }, + {17, 39, 3, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 30} }, + {18, 38, 3, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 29} }, + {19, 41, 3, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 32} }, + {20, 40, 3, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 31} }, + {21, 43, 3, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 34} }, + {22, 42, 3, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 33} }, + {23, 45, 3, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 36} }, + {24, 44, 3, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 35} }, + {25, 47, 4, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 42} }, + {26, 46, 4, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 41} }, + {27, 49, 4, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 44} }, + {28, 48, 4, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 43} }, + {29, 51, 4, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 50} }, + {30, 50, 4, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 49} }, + {31, 53, 4, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 52} }, + {32, 52, 4, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 51} }, + {33, 55, 5, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 58} }, + {34, 54, 5, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 57} }, + {35, 57, 5, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 60} }, + {36, 56, 5, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 59} }, + {37, 59, 5, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 62} }, + {38, 58, 5, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 61} }, + {39, 61, 5, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 64} }, + {40, 60, 5, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 63} }, + {41, 63, 6, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 66} }, + {42, 62, 6, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 65} }, + {43, 65, 6, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 68} }, + {44, 64, 6, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 67} }, + {45, 67, 6, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 70} }, + {46, 66, 6, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 69} }, + {47, 69, 6, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 72} }, + {48, 68, 6, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 71} }, + {49, 15, 0, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 77, 78, 79, 80} }, + {50, 14, 0, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 85, 86, 87, 88} }, + {51, 17, 0, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 97, 98, 99,100} }, + {52, 16, 0, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 93, 94, 95, 96} }, + {53, 19, 0, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, {105,106,107,108} }, + {54, 18, 0, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, {113,114,115,116} }, + {55, 21, 0, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, {125,126,127,128} }, + {56, 20, 0, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, {121,122,123,124} }, +}; +#endif + +/* =========================================================== + * Maple Layout configuration (J version) + * =========================================================== + */ +#ifdef SWPS_MAPLE_J +unsigned maple_j_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s maple_j_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAPLE_0ABC, { { 6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + { 6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_MAPLE_NABC, { { 7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_MAPLE_NABC, { { 8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_MAPLE_NABC, { { 9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_MAPLE_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_MAPLE_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_MAPLE_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s maple_j_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 22, 1, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 1} }, + { 1, 23, 1, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 2} }, + { 2, 24, 1, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 3} }, + { 3, 25, 1, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 4} }, + { 4, 26, 1, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 5} }, + { 5, 27, 1, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 6} }, + { 6, 28, 1, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 7} }, + { 7, 29, 1, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 8} }, + { 8, 30, 2, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 13} }, + { 9, 31, 2, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 14} }, + {10, 32, 2, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 15} }, + {11, 33, 2, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 16} }, + {12, 34, 2, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 21} }, + {13, 35, 2, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 22} }, + {14, 36, 2, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 23} }, + {15, 37, 2, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 24} }, + {16, 38, 3, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 29} }, + {17, 39, 3, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 30} }, + {18, 40, 3, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 31} }, + {19, 41, 3, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 32} }, + {20, 42, 3, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 33} }, + {21, 43, 3, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 34} }, + {22, 44, 3, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 35} }, + {23, 45, 3, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 36} }, + {24, 46, 4, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 41} }, + {25, 47, 4, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 42} }, + {26, 48, 4, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 43} }, + {27, 49, 4, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 44} }, + {28, 50, 4, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 49} }, + {29, 51, 4, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 50} }, + {30, 52, 4, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 51} }, + {31, 53, 4, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 52} }, + {32, 54, 5, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 57} }, + {33, 55, 5, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 58} }, + {34, 56, 5, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 59} }, + {35, 57, 5, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 60} }, + {36, 58, 5, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 61} }, + {37, 59, 5, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 62} }, + {38, 60, 5, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 63} }, + {39, 61, 5, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 64} }, + {40, 62, 6, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 65} }, + {41, 63, 6, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 66} }, + {42, 64, 6, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 67} }, + {43, 65, 6, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 68} }, + {44, 66, 6, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 69} }, + {45, 67, 6, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 70} }, + {46, 68, 6, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 71} }, + {47, 69, 6, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 72} }, + {48, 14, 0, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 85, 86, 87, 88} }, + {49, 15, 0, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 77, 78, 79, 80} }, + {50, 16, 0, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 93, 94, 95, 96} }, + {51, 17, 0, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 97, 98, 99,100} }, + {52, 18, 0, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, {113,114,115,116} }, + {53, 19, 0, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, {105,106,107,108} }, + {54, 20, 0, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, {121,122,123,124} }, + {55, 21, 0, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, {125,126,127,128} }, +}; +#endif + +/* ========================================== + * Gulmohar Layout configuration + * ========================================== + */ +#ifdef SWPS_GULMOHAR +unsigned gulmohar_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; + +struct inv_ioexp_layout_s gulmohar_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_GULMOHAR_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_GULMOHAR_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_GULMOHAR_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_GULMOHAR_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_GULMOHAR_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_GULMOHAR_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_GULMOHAR_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + + +struct inv_port_layout_s gulmohar_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 1} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 2} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 3} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 4} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 5} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 6} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 7} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 8} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 9} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 10} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 11} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 12} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 21} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 22} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 23} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 24} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 33} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 34} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 35} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 36} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 37} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 38} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 39} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 40} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 41} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 42} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 43} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 44} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 49} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 50} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 51} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 52} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 53} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 54} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 55} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 56} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 65} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 66} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 67} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 68} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 69} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 70} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 71} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 72} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 81} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 82} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 83} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, { 84} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 97, 98, 99,100} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, { 85, 86, 87, 88} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {101,102,103,104} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {105,106,107,108} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {109,110,111,112} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Gulmohar_2T EVT1 Layout configuration + * ========================================== + */ +#ifdef SWPS_GULMOHAR_2T_EVT1 +unsigned gulmohar_2t_evt1_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; + +struct inv_ioexp_layout_s gulmohar_2t_evt1_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC,{ {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC,{ {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC,{ {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xd6, 0xda}, {0x18, 0xe3}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xd6, 0xda}, {0x18, 0xe3}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xd6, 0xff}, {0x18, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + + +struct inv_port_layout_s gulmohar_2t_evt1_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_LAVENDER, {-99} }, + {48, 59, 6, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {-99,-99,-99,-99} }, + {49, 58, 6, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {-99,-99,-99,-99} }, + {50, 61, 6, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {-99,-99,-99,-99} }, + {51, 60, 6, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {-99,-99,-99,-99} }, + {52, 63, 6, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {-99,-99,-99,-99} }, + {53, 62, 6, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {-99,-99,-99,-99} }, + {54, 65, 6, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {-99,-99,-99,-99} }, + {55, 64, 6, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_LAVENDER, {-99,-99,-99,-99} }, +}; +#endif + + +/* =========================================================== + * Peony-SFP Layout configuration + * =========================================================== + */ +#ifdef SWPS_PEONY_SFP +unsigned peony_sfp_gpio_rest_mux = MUX_RST_CPLD_C0_A77_70_74_RST_ALL; + +struct inv_ioexp_layout_s peony_sfp_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_QSFP_6P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 0 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s peony_sfp_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 20, 1, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 1} }, + { 1, 21, 1, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 2} }, + { 2, 22, 1, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 3} }, + { 3, 23, 1, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 4} }, + { 4, 24, 1, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 5} }, + { 5, 25, 1, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 6} }, + { 6, 26, 1, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 7} }, + { 7, 27, 1, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 8} }, + { 8, 28, 2, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 13} }, + { 9, 29, 2, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 14} }, + {10, 30, 2, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 15} }, + {11, 31, 2, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 16} }, + {12, 32, 2, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 21} }, + {13, 33, 2, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 22} }, + {14, 34, 2, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 23} }, + {15, 35, 2, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 24} }, + {16, 36, 3, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 29} }, + {17, 37, 3, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 30} }, + {18, 38, 3, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 31} }, + {19, 39, 3, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 32} }, + {20, 40, 3, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 33} }, + {21, 41, 3, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 34} }, + {22, 42, 3, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 35} }, + {23, 43, 3, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 36} }, + {24, 44, 4, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 65} }, + {25, 45, 4, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 66} }, + {26, 46, 4, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 67} }, + {27, 47, 4, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 68} }, + {28, 48, 4, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 69} }, + {29, 49, 4, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 70} }, + {30, 50, 4, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 71} }, + {31, 51, 4, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 72} }, + {32, 52, 5, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 97} }, + {33, 53, 5, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 98} }, + {34, 54, 5, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, { 99} }, + {35, 55, 5, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, {100} }, + {36, 56, 5, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, {105} }, + {37, 57, 5, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, {106} }, + {38, 58, 5, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, {107} }, + {39, 59, 5, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, {108} }, + {40, 60, 6, 0, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, {113} }, + {41, 61, 6, 1, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, {114} }, + {42, 62, 6, 2, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, {115} }, + {43, 63, 6, 3, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, {116} }, + {44, 64, 6, 4, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, {121} }, + {45, 65, 6, 5, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, {122} }, + {46, 66, 6, 6, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, {123} }, + {47, 67, 6, 7, TRANSVR_TYPE_SFP, CHIP_TYPE_MAPLE, {124} }, + {48, 12, 0, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 49, 50, 51, 52} }, + {49, 13, 0, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 57, 58, 59, 60} }, + {50, 14, 0, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 61, 62, 63, 64} }, + {51, 15, 0, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 77, 78, 79, 80} }, + {52, 16, 0, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 85, 86, 87, 88} }, + {53, 17, 0, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 93, 94, 95, 96} }, +}; +#endif + + +/* =========================================================== + * Peony-Copper Layout configuration + * =========================================================== + */ +#ifdef SWPS_PEONY_COPPER +unsigned peony_copper_gpio_rest_mux = MUX_RST_CPLD_C0_A77_70_74_RST_ALL; + +struct inv_ioexp_layout_s peony_copper_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_QSFP_6P_LAYOUT_1, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 0 A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, +}; + +struct inv_port_layout_s peony_copper_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + {48, 4, 0, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 49, 50, 51, 52} }, + {49, 5, 0, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 57, 58, 59, 60} }, + {50, 6, 0, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 61, 62, 63, 64} }, + {51, 7, 0, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 77, 78, 79, 80} }, + {52, 8, 0, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 85, 86, 87, 88} }, + {53, 9, 0, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 93, 94, 95, 96} }, +}; +#endif + + +/* =========================================================== + * Cedar Layout configuration + * =========================================================== + */ +#ifdef SWPS_CEDAR_GA +unsigned cedar_ga_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s cedar_ga_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_CEDAR_0ABC, { { 4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 4, 0x21, {0,-1}, {1,-1}, {3,-1}, {0xff }, {0x00 }, }, /* addr[1] = I/O Expander 0 B */ + { 4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_CEDAR_0ABC, { { 5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 5, 0x21, {0,-1}, {1,-1}, {3,-1}, {0xff }, {0x00 }, }, /* addr[1] = I/O Expander 0 B */ + { 5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {2, IOEXP_TYPE_CEDAR_0ABC, { { 6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 6, 0x21, {0,-1}, {1,-1}, {3,-1}, {0xff }, {0x00 }, }, /* addr[1] = I/O Expander 0 B */ + { 6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {3, IOEXP_TYPE_CEDAR_0ABC, { { 7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 7, 0x21, {0,-1}, {1,-1}, {3,-1}, {0xff }, {0x00 }, }, /* addr[1] = I/O Expander 0 B */ + { 7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, +}; + +struct inv_port_layout_s cedar_ga_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / CHIP_TYPE / LANE_ID */ + { 0, 12, 0, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 21, 22, 23, 24} }, + { 1, 13, 0, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 17, 18, 19, 20} }, + { 2, 14, 0, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 25, 26, 27, 28} }, + { 3, 15, 0, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 29, 30, 31, 32} }, + { 4, 16, 0, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 37, 38, 39, 40} }, + { 5, 17, 0, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 33, 34, 35, 36} }, + { 6, 18, 0, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 41, 42, 43, 44} }, + { 7, 19, 0, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 45, 46, 47, 48} }, + { 8, 20, 1, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 5, 6, 7, 8} }, + { 9, 21, 1, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 1, 2, 3, 4} }, + {10, 22, 1, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 9, 10, 11, 12} }, + {11, 23, 1, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 13, 14, 15, 16} }, + {12, 24, 1, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 53, 54, 55, 56} }, + {13, 25, 1, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 49, 50, 51, 52} }, + {14, 26, 1, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 57, 58, 59, 60} }, + {15, 27, 1, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 61, 62, 63, 64} }, + {16, 28, 2, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 71, 72, 73, 74} }, + {17, 29, 2, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 67, 68, 69, 70} }, + {18, 30, 2, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 75, 76, 77, 78} }, + {19, 31, 2, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 79, 80, 81, 82} }, + {20, 32, 2, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 119, 120, 121, 122} }, + {21, 33, 2, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 115, 116, 117, 118} }, + {22, 34, 2, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 123, 124, 125, 126} }, + {23, 35, 2, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 127, 128, 129, 130} }, + {24, 36, 3, 0, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 87, 88, 89, 90} }, + {25, 37, 3, 1, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 83, 84, 85, 86} }, + {26, 38, 3, 2, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 91, 92, 93, 94} }, + {27, 39, 3, 3, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 95, 96, 97, 98} }, + {28, 40, 3, 4, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 103, 104, 105, 106} }, + {29, 41, 3, 5, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 99, 100, 101, 102} }, + {30, 42, 3, 6, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 107, 108, 109, 110} }, + {31, 43, 3, 7, TRANSVR_TYPE_QSFP_28, CHIP_TYPE_MAPLE, { 111, 112, 113, 114} }, +}; +#endif + + +#endif /* INV_SWPS_H */ + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_tmp75.c b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_tmp75.c new file mode 100644 index 00000000000..1e728b14b4f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_tmp75.c @@ -0,0 +1,125 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include + +struct tmp75_data { + struct device *hwmon_dev; + u8 last_value; +}; + +static ssize_t read_temperature(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + s32 temp = i2c_smbus_read_word_data(client, 0); + if(temp<0) + { + return sprintf(buf, "0\n"); + } + return sprintf(buf, "%d\n", ((temp & 0xff) * 1000 + ((temp>>14 & 0x03)*250)*((temp & 0x80)?-1:1))); +} + +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, read_temperature, 0, 0); + +static struct attribute *tmp75_attributes[] = { + &sensor_dev_attr_temp1_input.dev_attr.attr, + NULL +}; + +static const struct attribute_group tmp75_group = { + .attrs = tmp75_attributes, +}; + +/*-----------------------------------------------------------------------*/ +/* device probe and removal */ +static int +inv_tmp75_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct tmp75_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct tmp75_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &tmp75_group); + + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &tmp75_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int inv_tmp75_remove(struct i2c_client *client) +{ + struct tmp75_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &tmp75_group); + hwmon_device_unregister(data->hwmon_dev); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id inv_tmp75_ids[] = { + { "inv_tmp75" , 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, inv_tmp75_ids); + +static struct i2c_driver tmp75_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_tmp75", + }, + .probe = inv_tmp75_probe, + .remove = inv_tmp75_remove, + .id_table = inv_tmp75_ids, +}; + +static int __init inv_tmp75_init(void) +{ + return i2c_add_driver(&tmp75_driver); +} + +static void __exit inv_tmp75_exit(void) +{ + i2c_del_driver(&tmp75_driver); +} + +MODULE_AUTHOR("jack.ting "); +MODULE_DESCRIPTION("inventec tmp75 driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_tmp75_init); +module_exit(inv_tmp75_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_ucd90160.c b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_ucd90160.c new file mode 100644 index 00000000000..da976f950d5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/inv_ucd90160.c @@ -0,0 +1,259 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define PMBUS_PAGE 0x0 +#define PMBUS_VOUT_MODE 0x20 +#define PMBUS_READ_VOUT 0x8b + + +static int retrys = 1; +module_param(retrys, int, 0); +MODULE_PARM_DESC(retrys, "Inventec UCD90160 read retry times (default 1)."); + +struct ucd90160_data { + struct device *hwmon_dev; + s32 vout[16]; + s32 vout_mode[16]; + s32 pvout[16]; +}; + +static s32 calc_voltage(struct device *dev, s32 vout, s32 vout_mode) +{ + s32 mode = (vout_mode & 0xe0) >> 5; + s32 parameter = (vout_mode & 0x1f); + + switch (mode) { + case 0: + { + s32 exp = (parameter & 0x10) ? - ((32 - parameter) & 0xf) : (parameter & 0xf); + if (exp >= 0) + return ((vout * 1000) << exp); + else + return ((vout * 1000) >> -exp); + } + case 1: + dev_err(dev, "Not Support for VID mode"); + return 0; + case 2: + dev_err(dev, "Not Support for Direct mode"); + return 0; + default: + dev_err(dev, "Unknown Mode"); + return 0; + } +} + +static void update_vout_mode(struct i2c_client *client, u8 page, s32 clean) +{ + struct ucd90160_data *data = i2c_get_clientdata(client); + s32 temp = 0, read = 0, trys = 0; + + if (clean) { + data->vout_mode[page] = 0; + return; + } + + if (data->vout_mode[page]) + return; + + while (trys <= retrys) { + read = i2c_smbus_read_byte_data(client, PMBUS_VOUT_MODE); + temp = i2c_smbus_read_byte_data(client, PMBUS_PAGE); + if (page != temp) { + trys++; + if (trys > retrys) + return; + continue; + } + break; + } + + data->vout_mode[page] = read; +} + +static ssize_t read_voltage_out(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct ucd90160_data *data = i2c_get_clientdata(client); + s32 temp = 0, vout = 0, trys = 0; + u8 page = attr->index; + + while (trys <= retrys) { + temp = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page); + if (temp < 0) { + update_vout_mode(client, page, 1); + trys++; + if (trys > retrys) goto absent; + continue; + } + + update_vout_mode(client, page, 0); + vout = i2c_smbus_read_word_data(client, PMBUS_READ_VOUT); + if (vout < 0) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + temp = i2c_smbus_read_byte_data(client, PMBUS_PAGE); + if (page != temp) { + trys++; + if (trys > retrys) goto fail; + continue; + } + + break; + } + + data->pvout[page] = data->vout[page]; + data->vout[page] = calc_voltage(dev, vout, data->vout_mode[page]); + + return sprintf(buf, "%d\n", data->vout[page]); + +fail: + return sprintf(buf, "%d\n", data->pvout[page]); + +absent: + return sprintf(buf, "0\n"); +} + +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, read_voltage_out, 0, 0); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, read_voltage_out, 0, 1); +static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, read_voltage_out, 0, 2); +static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, read_voltage_out, 0, 3); +static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, read_voltage_out, 0, 4); +static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, read_voltage_out, 0, 5); +static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, read_voltage_out, 0, 6); +static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, read_voltage_out, 0, 7); +static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, read_voltage_out, 0, 8); +static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, read_voltage_out, 0, 9); +static SENSOR_DEVICE_ATTR(in11_input, S_IRUGO, read_voltage_out, 0, 10); +static SENSOR_DEVICE_ATTR(in12_input, S_IRUGO, read_voltage_out, 0, 11); +static SENSOR_DEVICE_ATTR(in13_input, S_IRUGO, read_voltage_out, 0, 12); +static SENSOR_DEVICE_ATTR(in14_input, S_IRUGO, read_voltage_out, 0, 13); +static SENSOR_DEVICE_ATTR(in15_input, S_IRUGO, read_voltage_out, 0, 14); +static SENSOR_DEVICE_ATTR(in16_input, S_IRUGO, read_voltage_out, 0, 15); + +static struct attribute *ucd90160_attributes[] = { + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_in3_input.dev_attr.attr, + &sensor_dev_attr_in4_input.dev_attr.attr, + &sensor_dev_attr_in5_input.dev_attr.attr, + &sensor_dev_attr_in6_input.dev_attr.attr, + &sensor_dev_attr_in7_input.dev_attr.attr, + &sensor_dev_attr_in8_input.dev_attr.attr, + &sensor_dev_attr_in9_input.dev_attr.attr, + &sensor_dev_attr_in10_input.dev_attr.attr, + &sensor_dev_attr_in11_input.dev_attr.attr, + &sensor_dev_attr_in12_input.dev_attr.attr, + &sensor_dev_attr_in13_input.dev_attr.attr, + &sensor_dev_attr_in14_input.dev_attr.attr, + &sensor_dev_attr_in15_input.dev_attr.attr, + &sensor_dev_attr_in16_input.dev_attr.attr, + NULL +}; + +static const struct attribute_group ucd90160_group = { + .attrs = ucd90160_attributes, +}; + +/*-----------------------------------------------------------------------*/ +/* device probe and removal */ +static int +inv_ucd90160_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct ucd90160_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct ucd90160_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &ucd90160_group); + + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &ucd90160_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int inv_ucd90160_remove(struct i2c_client *client) +{ + struct ucd90160_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &ucd90160_group); + hwmon_device_unregister(data->hwmon_dev); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id inv_ucd90160_ids[] = { + { "inv_ucd90160" , 0, }, + { "inv_ucd90160_cpu" , 0, }, + { "inv_ucd90160_switch" , 0, }, + { "inv_ucd90160_line" , 0, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, inv_ucd90160_ids); + +static struct i2c_driver ucd90160_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_ucd90160", + }, + .probe = inv_ucd90160_probe, + .remove = inv_ucd90160_remove, + .id_table = inv_ucd90160_ids, +}; + +static int __init inv_ucd90160_init(void) +{ + return i2c_add_driver(&ucd90160_driver); +} + +static void __exit inv_ucd90160_exit(void) +{ + i2c_del_driver(&ucd90160_driver); +} + +MODULE_AUTHOR("Roger Chang "); +MODULE_DESCRIPTION("inventec ucd90160 driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_ucd90160_init); +module_exit(inv_ucd90160_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/io_expander.c b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/io_expander.c new file mode 100644 index 00000000000..397da4b3136 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/io_expander.c @@ -0,0 +1,2627 @@ +#include +#include +#include "io_expander.h" + +/* For build single module using (Ex: ONL platform) */ +#include +//#include + + +static struct ioexp_obj_s *ioexp_head_p = NULL; +static struct ioexp_obj_s *ioexp_tail_p = NULL; +extern int io_no_init; + +/* ========== Register IOEXP layout ========== + */ +struct ioexp_map_s ioexp_map_magnolia_nab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_4ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_7ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {1, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {1, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {1, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 2}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 3}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 0, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 0, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 0, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 0, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 0, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 0, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 0, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 1, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 1, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 1, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 1, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 1, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 1, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 1, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 1, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 1, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 1, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {0, 1, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {0, 1, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {1, 1, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {1, 1, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {1, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {1, 1, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_5a = { + + .chip_amount = 1, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_6abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 0}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 3}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 0}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + {2, 1, 5}, /* map_present[8] = MOD_ABS_PORT(X+8) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {1, 0, 1}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 6}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 1, 3}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {2, 0, 1}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {2, 0, 6}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + {2, 1, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 2}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 7}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 1, 4}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {2, 0, 2}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {2, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + {2, 1, 4}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+8) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {1, 0, 0}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 0, 5}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 2}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {2, 0, 0}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {2, 0, 5}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + {2, 1, 2}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_sequoia_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_sequoia_p56p63 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 3}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {1, 0, 2}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {1, 0, 1}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 0}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 7}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 6}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 5}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 4}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_lavender_p65 = { + + .chip_amount = 1, + .data_width = 1, + + .map_present = { {0, 0, 4}, }, /* map_present[0] = MOD_ABS_PORT(X) */ + .map_reset = { {0, 0, 1}, }, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + .map_lpmod = { {0, 0, 2}, }, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + .map_modsel = { {0, 0, 0}, }, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ +}; + + +struct ioexp_map_s cpld_map_cottonwood = { + + .chip_amount = 1, + .data_width = 4, + + .map_present = { {0, 2, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 2, 4}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 3, 0}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 3, 4}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + }, + .map_tx_disable = { {0, 0, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + }, + .map_tx_fault = { {0, 2, 2}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 2, 6}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 3, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 3, 6}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + }, + .map_rxlos = { {0, 2, 1}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 2, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 3, 1}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 3, 5}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + }, + .map_hard_rs0 = { {0, 0, 2}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {0, 0, 6}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {0, 1, 2}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {0, 1, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + }, + .map_hard_rs1 = { {0, 0, 2}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {0, 0, 6}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {0, 1, 2}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {0, 1, 6}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + }, +}; + + +struct ioexp_map_s ioexp_map_maple_0abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_maple_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 4}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 5}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 4}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 5}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 2}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 3}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 2}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 3}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 1}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 1}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 6}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 6}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 2}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 6}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 6}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 2}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 6}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 2}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 6}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 1}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 5}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 1}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 5}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 1}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 5}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 1}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 5}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 4}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 4}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 3}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 3}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 3}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 3}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_1abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 2}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 6}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 6}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 4}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 5}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 1}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 5}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 1}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 5}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 2}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 3}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 1}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 3}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 3}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 6}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_3abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 4}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 5}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 2}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 6}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 2}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 6}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 2}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 3}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 1}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 5}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 1}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 5}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 1}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 4}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 4}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 6}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 3}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 3}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 4}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 1}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 6}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 4}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 1}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {1, 0, 1}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {1, 0, 6}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {1, 1, 3}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + {2, 0, 1}, /* map_reset[6] = QRESET_QSFP_N_P(X+6) */ + {2, 0, 6}, /* map_reset[7] = QRESET_QSFP_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 2}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 7}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 1, 4}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + {2, 0, 2}, /* map_lpmod[6] = LPMODE_QSFP_P(X+6) */ + {2, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {1, 0, 0}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 0, 5}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 2}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + {2, 0, 0}, /* map_modsel[6] = MODSEL_QSFP_N_P(X+6) */ + {2, 0, 5}, /* map_modsel[7] = MODSEL_QSFP_N_P(X+7) */ + }, +}; + + +/* PortType: SFP / 8 port + * Platform: Cypress, Peony_SFP + */ +struct ioexp_map_s ioexp_map_sfp_8p_layout_1 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +/* PortType: QSFP / 6 port + * Platform: Gulmohar, Peony_SFP, Peony_Copper + */ +struct ioexp_map_s ioexp_map_6p_qsfp_type_1 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +/* ========== Private functions ========== + */ +int check_channel_tier_1(void); + +struct i2c_client * +_get_i2c_client(struct ioexp_obj_s *self, + int chip_id){ + + struct ioexp_i2c_s *i2c_curr_p = self->i2c_head_p; + + if (!(i2c_curr_p)){ + SWPS_ERR("%s: i2c_curr_p is NULL\n", __func__); + return NULL; + } + while (i2c_curr_p){ + if ((i2c_curr_p->chip_id) == chip_id){ + return i2c_curr_p->i2c_client_p; + } + i2c_curr_p = i2c_curr_p->next; + } + SWPS_ERR("%s: not exist! :%d\n", __func__, chip_id); + return NULL; +} + + +static int +_common_ioexp_update_one(struct ioexp_obj_s *self, + struct ioexp_addr_s *ioexp_addr, + int chip_id, + int data_width, + int show_err, + char *caller_name) { + int buf = 0; + int err = 0; + int data_id = 0; + int r_offset = 0; + + for(data_id=0; data_idread_offset[data_id]; + if (r_offset < 0) { + SWPS_DEBUG("skip a read_offset <%d>\n", r_offset); + continue; + } + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), r_offset); + /* Check error */ + if (buf < 0) { + err = 1; + if (show_err) { + SWPS_INFO("IOEXP-%d read fail! :%d \n", self->ioexp_id, buf); + SWPS_INFO("Dump: :%d :0x%02x :%d, :%s\n", + ioexp_addr->chan_id, ioexp_addr->chip_addr, + ioexp_addr->read_offset[data_id], caller_name); + } + continue; + } + /* Update IOEXP object */ + self->chip_data[chip_id].data[data_id] = (uint8_t)buf; + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +common_ioexp_update_all(struct ioexp_obj_s *self, + int show_err, + char *caller_name){ + + int err = 0; + int chip_id = 0; + int chip_amount = self->ioexp_map_p->chip_amount; + + for (chip_id=0; chip_idioexp_map_p->map_addr[chip_id]), + chip_id, + self->ioexp_map_p->data_width, + show_err, + caller_name) < 0) { + err = 1; + } + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +_common_check_by_mode(struct ioexp_obj_s *self){ + + switch (self->mode){ + case IOEXP_MODE_DIRECT: + return self->fsm_4_direct(self); + + case IOEXP_MODE_POLLING: + if (self->state >= 0){ + return 0; + } + switch (self->state){ + case STATE_IOEXP_INIT: + return ERR_IOEXP_UNINIT; + case STATE_IOEXP_ABNORMAL: + return ERR_IOEXP_ABNORMAL; + default: + return ERR_IOEXP_NOSTATE; + } + break; + + default: + break; + } + SWPS_ERR("%s: Exception occurs. :%d \n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +static int +_common_get_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + char *func_mane){ + uint8_t buf; + int err_code; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Get data form cache */ + buf = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + return (int)(buf >> bitmap_obj_p->bit_shift & 0x01); +} + + +static int +_common_set_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + int input_val, + char *func_mane){ + int err_code, target_offset; + uint8_t origin_byte; + uint8_t modify_byte; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Prepare write date */ + origin_byte = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + switch (input_val) { + case 0: + modify_byte = origin_byte; + SWP_BIT_CLEAR(modify_byte, bitmap_obj_p->bit_shift); + break; + case 1: + modify_byte = origin_byte; + SWP_BIT_SET(modify_byte, bitmap_obj_p->bit_shift); + break; + default: + SWPS_ERR("Input value incorrect! :%d :%d :%s\n", + input_val, self->ioexp_id, func_mane); + return ERR_IOEXP_BADINPUT; + } + /* Setup i2c client */ + target_offset = self->ioexp_map_p->map_addr[bitmap_obj_p->chip_id].write_offset[bitmap_obj_p->ioexp_voffset]; + /* Write byte to chip via I2C */ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, bitmap_obj_p->chip_id), + target_offset, + modify_byte); + /* Update or bollback object */ + if (err_code < 0){ + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = origin_byte; + SWPS_ERR("I2C write fail! :%d :%d :%s :%d\n", + input_val, self->ioexp_id, func_mane, err_code); + return err_code; + } + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = modify_byte; + return 0; +} + + +/* ========== Object public functions ========== + */ +int +common_get_present(struct ioexp_obj_s *self, + int virt_offset){ + + int UNPLUG = 1; + int retval = ERR_IOEXP_UNEXCPT; + + retval = _common_get_bit(self, + &(self->ioexp_map_p->map_present[virt_offset]), + "common_get_present"); + if (retval < 0) { + /* [Note] + * => Transceiver object does not need to handle IOEXP layer issues. + */ + return UNPLUG; + } + return retval; +} + + +int +common_get_tx_fault(struct ioexp_obj_s *self, + int virt_offset){ + /* [Transmit Fault (Tx_Fault)] + * A catastrophic laser fault will activate the transmitter signal, + * TX_FAULT, and disable the laser. This signal is an open collector + * output (pull-up required on the host board). A low signal indicates + * normal laser operation and a high signal indicates a fault. The + * TX_FAULT will be latched high when a laser fault occurs and is + * cleared by toggling the TX_DISABLE input or power cycling the + * transceiver. The transmitter fault condition can also be monitored + * via the two-wire serial interface. + * (address A2, byte 110, bit 2). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_fault[virt_offset]), + "common_get_tx_fault"); +} + + +int +common_get_rxlos(struct ioexp_obj_s *self, + int virt_offset){ + /* [Receiver Loss of Signal (Rx_LOS)] + * The post-amplification IC also includes transition detection circuitry + * which monitors the ac level of incoming optical signals and provides a + * TTL/CMOS compatible status signal to the host (pin 8). An adequate optical + * input results in a low Rx_LOS output while a high Rx_LOS output indicates + * an unusable optical input. The Rx_LOS thresholds are factory set so that + * a high output indicates a definite optical fault has occurred. Rx_LOS can + * also be monitored via the two-wire serial interface + * (address A2h, byte 110, bit 1). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_rxlos[virt_offset]), + "common_get_rxlos"); +} + + +int +common_get_tx_disable(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + "common_get_tx_disable"); +} + + +int +common_get_reset(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + "common_get_reset"); +} + + +int +common_get_lpmod(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + "common_get_lpmod"); +} + + +int +common_get_modsel(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + "common_get_modsel"); +} + + +int +common_get_hard_rs0(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + "common_get_hard_rs0"); +} + + +int +common_get_hard_rs1(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + "common_get_hard_rs1"); +} + + +int +common_set_tx_disable(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + input_val, + "common_set_tx_disable"); +} + + +int +common_set_reset(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + input_val, + "common_set_reset"); +} + + +int +common_set_lpmod(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + input_val, + "common_set_lpmod"); +} + + +int +common_set_modsel(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + input_val, + "common_set_modsel"); +} + + +int +common_set_hard_rs0(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + input_val, + "common_set_hard_rs0"); +} + + +int +common_set_hard_rs1(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + input_val, + "common_set_hard_rs1"); +} + + +int +ioexp_get_not_support(struct ioexp_obj_s *self, + int virt_offset){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +ioexp_set_not_support(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +fake_ioexp_init(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_ioexp_update(struct ioexp_obj_s *self){ + return 1; +} + + +int +fake_update_func(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_get_func(struct ioexp_obj_s *self, + int virt_offset){ + SWPS_WARN("Someone called fake_get_func\n"); + return -1; +} + +int +fake_set_func(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + SWPS_WARN("Someone called fake_set_func\n"); + return -1; +} + + +/* ========== Initial functions for IO Expander ========== + */ +int +common_ioexp_init(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + if (self->mode == IOEXP_MODE_DIRECT) { + goto update_common_ioexp_init; + } + if (!io_no_init) { /*normal init*/ + + /* Setup default value to each physical IO Expander */ + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + /* Get address mapping */ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("%s: IOEXP config incorrect! :%d \n", + __func__, chip_id); + return -1; + } + /* Setup default value */ + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + /* [Desc] Skip the setup default value behavior + [Note] Setup default value = -1 if you don't want to write the value to IOEXP or CPLD + */ + if(addr_p->write_offset[offset] < 0){ + SWPS_DEBUG("skip a write_offset <%d>\n", addr_p->conf_offset[offset]); + continue; + } + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->write_offset[offset], + addr_p->data_default[offset]); + if (err_code < 0){ + SWPS_ERR("%s: set default fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + } + } + } +update_common_ioexp_init: + /* Check and update info to object */ + err_code = self->update_all(self, 1, "common_ioexp_init"); + if (err_code < 0) { + SWPS_ERR("%s: update_all() fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +/* ========== Object functions for Final State Machine ========== + */ +int +_is_channel_ready(struct ioexp_obj_s *self){ + + int chip_id = 0; + int byte_id = 0; + int getval = ERR_IOEXP_UNEXCPT; + int chkval = ERR_IOEXP_UNEXCPT; + char *emsg = "ERR"; + struct ioexp_addr_s *addr_p = NULL; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++) { + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + emsg = "IOEXP config incorrect"; + goto err_is_channel_ready; + } + for (byte_id=0; byte_id<(self->ioexp_map_p->data_width); byte_id++) { + if (addr_p->conf_offset[byte_id] < 0) { + continue; + } + if ((addr_p->conf_default[byte_id]) != 0) { + goto go_is_channel_ready; + } + } + if (chip_id == ((self->ioexp_map_p->chip_amount) - 1)) { + SWPS_DEBUG("%s: no non-zero config", __func__); + break; + } + } + chip_id = 0; + byte_id = 0; + +go_is_channel_ready: + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + chkval = addr_p->conf_default[byte_id]; + getval = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[byte_id]); + + SWPS_DEBUG("%s: target info :%d :%d :%d :%d :%d\n", + __func__, self->ioexp_id, chip_id, byte_id, chkval, getval); + + if ((getval >= 0) && (getval == chkval)) { + return 1; + } + return 0; + +err_is_channel_ready: + SWPS_ERR("%s: %s :%d :%d :%d :%d :%d\n", + __func__, emsg, self->ioexp_id, chip_id, byte_id, chkval, getval); + return ERR_IOEXP_UNEXCPT; +} + + +int +_ioexp_init_handler(struct ioexp_obj_s *self){ + + int return_val; + + switch (self->mode) { + case IOEXP_MODE_DIRECT: + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + case IOEXP_MODE_POLLING: + /* Check system and channel is ready */ + if (self->state == STATE_IOEXP_INIT){ + if (!_is_channel_ready(self)){ + self->state = STATE_IOEXP_INIT; + SWPS_WARN("%s: IOEXP:%d channel not ready.\n", + __func__, self->ioexp_id); + return 0; + } + } + /* Execute initial callback */ + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + default: + break; + } + SWPS_ERR("%s: exception occur :%d\n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_direct(struct ioexp_obj_s *self){ + + int result_val; + int show_err = 1; + char *func_mane = "common_ioexp_fsm_4_direct"; + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, and return error */ + return ERR_IOEXP_UNINIT; + } + /* Case: Initial done */ + return 0; + + case STATE_IOEXP_NORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + SWPS_INFO("%s: NORMAL -> ABNORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + self->state = STATE_IOEXP_NORMAL; + return 0; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_DEBUG("%s: ABNORMAL -> NORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("%s: Exception occurs :%d\n", + __func__, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_polling(struct ioexp_obj_s *self){ + + int result_val, i, show_e; + int fail_retry = 3; + char *func_name = "common_ioexp_fsm_4_polling"; + +#ifdef DEBUG_SWPS + show_e = 1; +#else + show_e = 0; +#endif + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + /* Case: System (Channel) not ready */ + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, wait and retry */ + return 0; + } + /* Case: Initial done */ + SWPS_INFO("IOEXP-%d: initial done. :%d\n", + self->ioexp_id, self->ioexp_type); + return result_val; + + case STATE_IOEXP_NORMAL: + /* Retry mechanism for case of i2c topology not stable */ + for (i=0; iupdate_all(self, show_e, func_name); + if (result_val >= 0) { + self->state = STATE_IOEXP_NORMAL; + return 0; + } + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: detect I2C crash :%d\n", + __func__, self->ioexp_id); + break; + } + SWPS_DEBUG("IOEXP-%d: unstable :%d\n", + self->ioexp_id, result_val); + } + SWPS_INFO("IOEXP-%d: NORMAL -> ABNORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_e, func_name); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_INFO("IOEXP-%d: ABNORMAL -> NORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("IOEXP-%d: Exception occurs :%d\n", + self->ioexp_id, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +/* ========== Object private functions for check & update ========== + */ +int +common_ioexp_check(struct ioexp_obj_s *self){ + + int result; + + if (self->mode != IOEXP_MODE_POLLING){ + SWPS_ERR("%s: not polling mode :%d\n", + __func__, self->mode); + return ERR_IOEXP_NOTSUPPORT; + } + mutex_lock(&self->lock); + result = self->fsm_4_polling(self); + mutex_unlock(&self->lock); + return result; +} + + +/* ========== Functions for Factory pattern ========== + */ +static struct ioexp_map_s * +get_ioexp_map(int ioexp_type){ + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + return &ioexp_map_magnolia_nab; + case IOEXP_TYPE_MAGINOLIA_4AB: + return &ioexp_map_magnolia_4ab; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + return &ioexp_map_magnolia_7ab; + case IOEXP_TYPE_REDWOOD_P01P08: + return &ioexp_map_redwood_p01p08_p17p24; + case IOEXP_TYPE_REDWOOD_P09P16: + return &ioexp_map_redwood_p09p16_p25p32; + case IOEXP_TYPE_HUDSON32IGA_P01P08: + return &ioexp_map_hudson32iga_p01p08_p17p24; + case IOEXP_TYPE_HUDSON32IGA_P09P16: + return &ioexp_map_hudson32iga_p09p16_p25p32; + case IOEXP_TYPE_CYPRESS_7ABC: + return &ioexp_map_cypress_7abc; + case IOEXP_TYPE_TAHOE_5A: + return &ioexp_map_tahoe_5a; + case IOEXP_TYPE_TAHOE_6ABC: + return &ioexp_map_tahoe_6abc; + case IOEXP_TYPE_SEQUOIA_NABC: + return &ioexp_map_sequoia_nabc; + case IOEXP_TYPE_SEQUOIA_P56P63: + return &ioexp_map_sequoia_p56p63; + case IOEXP_TYPE_LAVENDER_P65: + return &ioexp_map_lavender_p65; + case CPLD_TYPE_COTTONWOOD: + return &cpld_map_cottonwood; + case IOEXP_TYPE_MAPLE_0ABC: + case IOEXP_TYPE_CEDAR_0ABC: + return &ioexp_map_maple_0abc; + case IOEXP_TYPE_MAPLE_NABC: + return &ioexp_map_maple_nabc; + case IOEXP_TYPE_GULMOHAR_NABC: + return &ioexp_map_gulmohar_nabc; + case IOEXP_TYPE_GULMOHAR_7ABC: + return &ioexp_map_gulmohar_7abc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + return &ioexp_map_gulmohar_2t_evt1_nabc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + return &ioexp_map_gulmohar_2t_evt1_1abc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + return &ioexp_map_gulmohar_2t_evt1_3abc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + return &ioexp_map_gulmohar_2t_evt1_7abc; + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + return &ioexp_map_sfp_8p_layout_1; + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + return &ioexp_map_6p_qsfp_type_1; + default: + return NULL; + } +} + + +int +setup_ioexp_ssize_attr(struct ioexp_obj_s *self, + struct ioexp_map_s *ioexp_map_p, + int ioexp_id, + int ioexp_type, + int run_mode){ + switch (run_mode){ + case IOEXP_MODE_POLLING: /* Direct access device mode */ + case IOEXP_MODE_DIRECT: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = ERR_IOEXP_UNEXCPT; + return ERR_IOEXP_UNEXCPT; + } + /* Setup mapping structure */ + self->ioexp_map_p = kzalloc(sizeof(*ioexp_map_p), GFP_KERNEL); + if (!(self->ioexp_map_p)) { + SWPS_ERR("%s: kzalloc ioexp_map_p fail\n", __func__); + return -1; + } + memcpy(self->ioexp_map_p, ioexp_map_p, sizeof(*ioexp_map_p)); + /* Setup attributes */ + self->ioexp_id = ioexp_id; + self->ioexp_type = ioexp_type; + self->state = STATE_IOEXP_INIT; + mutex_init(&self->lock); + return 0; +} + + +static int +setup_addr_mapping(struct ioexp_obj_s *self, + struct ioexp_addr_s *addr_map_p, + int chip_amount){ + struct ioexp_addr_s *tmp_p; + if (!addr_map_p){ + SWPS_ERR("%s: map is null\n", __func__); + return -1; + } + tmp_p = kzalloc((sizeof(*addr_map_p) * chip_amount), GFP_KERNEL); + if (!tmp_p){ + SWPS_ERR("%s: kzalloc fail.\n", __func__); + return -1; + } + memcpy(tmp_p, addr_map_p, (sizeof(*addr_map_p) * chip_amount)); + self->ioexp_map_p->map_addr = tmp_p; + + return 0; +} + + +static int +setup_ioexp_public_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_GULMOHAR_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + case CPLD_TYPE_COTTONWOOD: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = common_get_hard_rs0; + self->get_hard_rs1 = common_get_hard_rs1; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = common_set_hard_rs0; + self->set_hard_rs1 = common_set_hard_rs1; + return 0; + + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_SEQUOIA_P56P63: + case IOEXP_TYPE_LAVENDER_P65: + case IOEXP_TYPE_MAPLE_0ABC: + case IOEXP_TYPE_GULMOHAR_7ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + case IOEXP_TYPE_CEDAR_0ABC: + self->get_present = common_get_present; + self->get_tx_fault = ioexp_get_not_support; + self->get_rxlos = ioexp_get_not_support; + self->get_tx_disable = ioexp_get_not_support; + self->get_reset = common_get_reset; + self->get_lpmod = common_get_lpmod; + self->get_modsel = common_get_modsel; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = ioexp_set_not_support; + self->set_reset = common_set_reset; + self->set_lpmod = common_set_lpmod; + self->set_modsel = common_set_modsel; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_ioexp_private_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_SEQUOIA_P56P63: + case IOEXP_TYPE_LAVENDER_P65: + case CPLD_TYPE_COTTONWOOD: + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_MAPLE_0ABC: + case IOEXP_TYPE_GULMOHAR_NABC: + case IOEXP_TYPE_GULMOHAR_7ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + case IOEXP_TYPE_CEDAR_0ABC: + self->init = common_ioexp_init; + self->check = common_ioexp_check; + self->update_all = common_ioexp_update_all; + self->fsm_4_direct = common_ioexp_fsm_4_direct; + self->fsm_4_polling = common_ioexp_fsm_4_polling; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_i2c_client_one(struct ioexp_obj_s *self, + int chip_id){ + + char *err_msg = "ERROR"; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + struct ioexp_i2c_s *i2c_obj_p = NULL; + struct ioexp_i2c_s *i2c_curr_p = NULL; + + int chan_id = self->ioexp_map_p->map_addr[chip_id].chan_id; + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + err_msg = "Can not kzalloc client!"; + goto err_ioexp_setup_i2c_1; + } + i2c_obj_p = kzalloc(sizeof(*i2c_obj_p), GFP_KERNEL); + if (!i2c_obj_p){ + err_msg = "Can not kzalloc i2c_obj_p!"; + goto err_ioexp_setup_i2c_2; + } + adap = i2c_get_adapter(chan_id); + if(!adap){ + err_msg = "Can not get adap!"; + goto err_ioexp_setup_i2c_3; + } + client->adapter = adap; + client->addr = self->ioexp_map_p->map_addr[chip_id].chip_addr; + i2c_obj_p->i2c_client_p = client; + i2c_obj_p->chip_id = chip_id; + i2c_obj_p->next = NULL; + if (!self->i2c_head_p){ + self->i2c_head_p = i2c_obj_p; + } else { + i2c_curr_p = self->i2c_head_p; + while (i2c_curr_p->next){ + i2c_curr_p = i2c_curr_p->next; + } + i2c_curr_p->next = i2c_obj_p; + } + return 0; + +err_ioexp_setup_i2c_3: + kfree(i2c_obj_p); +err_ioexp_setup_i2c_2: + kfree(client); +err_ioexp_setup_i2c_1: + SWPS_ERR("%s: %s :%d\n", __func__, err_msg, chan_id); + return -1; +} + + +static int +setup_i2c_client(struct ioexp_obj_s* self){ + + int result; + int chip_id = 0; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + result = setup_i2c_client_one(self, chip_id); + if (result < 0){ + SWPS_ERR("%s fail! :%d\n", __func__, chip_id); + return -1; + } + } + return 0; +} + + +static int +setup_ioexp_config(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + if (io_no_init) { + + SWPS_INFO("io_no_init:%d \n", io_no_init); + return 0; + } + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("IOEXP config incorrect! :%d \n",chip_id); + return -1; + } + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + /* [Desc] Skip the setup config value behavior + [Note] Setup config value = -1 if you don't want to write the value to IOEXP or CPLD + */ + if(addr_p->conf_offset[offset] < 0){ + SWPS_DEBUG("skip a config_offset <%d>\n", addr_p->conf_offset[offset]); + continue; + } + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[offset], + addr_p->conf_default[offset]); + + if (err_code < 0){ + SWPS_INFO("%s: set conf fail! :%d \n", __func__, err_code); + return -2; + } + } + } + return 0; +} + + +struct ioexp_obj_s * +_create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_map_s* ioexp_map_p; + struct ioexp_obj_s* result_p; + struct ioexp_i2c_s *i2c_curr_p; + struct ioexp_i2c_s *i2c_next_p; + + /* Get layout */ + ioexp_map_p = get_ioexp_map(ioexp_type); + if (!ioexp_map_p){ + SWPS_ERR("%s: Invalid ioexp_type\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare IOEXP object */ + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + SWPS_ERR("%s: kzalloc failure!\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare static size attributes */ + if (setup_ioexp_ssize_attr(result_p, + ioexp_map_p, + ioexp_id, + ioexp_type, + run_mode) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + /* Prepare address mapping */ + if (setup_addr_mapping(result_p, addr_map_p, ioexp_map_p->chip_amount) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + if (setup_i2c_client(result_p) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + /* Prepare call back functions of object */ + if (setup_ioexp_public_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + if (setup_ioexp_private_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + return result_p; + +err_create_ioexp_setup_i2c_fail: + i2c_curr_p = result_p->i2c_head_p; + i2c_next_p = result_p->i2c_head_p; + while (i2c_curr_p){ + i2c_next_p = i2c_curr_p->next; + if (i2c_curr_p->i2c_client_p) { + i2c_put_adapter(i2c_curr_p->i2c_client_p->adapter); + kfree(i2c_curr_p->i2c_client_p); + } + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } +err_create_ioexp_setup_attr_fail: + kfree(result_p); +err_create_ioexp_fail: + SWPS_ERR("%s: fail! :%d :%d \n", + __func__, ioexp_id, ioexp_type); + return NULL; +} + + +int +create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_obj_s *ioexp_p = NULL; + + ioexp_p = _create_ioexp_obj(ioexp_id, ioexp_type, + addr_map_p, run_mode); + if (!ioexp_p){ + return -1; + } + if (ioexp_head_p == NULL){ + ioexp_head_p = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; + } + ioexp_tail_p->next = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; +} +EXPORT_SYMBOL(create_ioexp_obj); + + +static int +_init_ioexp_obj(struct ioexp_obj_s* self) { + + char *err_msg = "ERR"; + char *func_name = "_init_ioexp_obj"; + + /* Setup IOEXP configure byte */ + if (setup_ioexp_config(self) < 0){ + err_msg = "setup_ioexp_config fail"; + goto err_init_ioexp_obj; + } + /* Setup default data */ + if (_ioexp_init_handler(self) < 0){ + err_msg = "_ioexp_init_handler fail"; + goto err_init_ioexp_obj; + } + /* Update all */ + if (self->state == STATE_IOEXP_NORMAL){ + if (self->update_all(self, 1, func_name) < 0){ + err_msg = "update_all() fail"; + goto err_init_ioexp_obj; + } + } + return 0; + +err_init_ioexp_obj: + SWPS_DEBUG("%s: %s\n", __func__, err_msg); + return -1; +} + + +int +init_ioexp_objs(void){ + /* Return value: + * 0: Success + * -1: Detect topology error + * -2: SWPS internal error + */ + struct ioexp_obj_s *curr_p = ioexp_head_p; + + if (!curr_p) { + SWPS_ERR("%s: ioexp_head_p is NULL\n", __func__); + return -2; + } + while (curr_p) { + if (_init_ioexp_obj(curr_p) < 0) { + SWPS_DEBUG("%s: _init_ioexp_obj() fail\n", __func__); + return -1; + } + curr_p = curr_p->next; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} +EXPORT_SYMBOL(init_ioexp_objs); + + +void +clean_ioexp_objs(void){ + + struct ioexp_i2c_s *i2c_curr_p = NULL; + struct ioexp_i2c_s *i2c_next_p = NULL; + struct ioexp_obj_s *ioexp_next_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + if (ioexp_head_p == NULL){ + ioexp_tail_p = NULL; + return; + } + while(ioexp_curr_p){ + ioexp_next_p = ioexp_curr_p->next; + if (ioexp_curr_p->ioexp_map_p) { + if (ioexp_curr_p->ioexp_map_p->map_addr) { + kfree(ioexp_curr_p->ioexp_map_p->map_addr); + } + kfree(ioexp_curr_p->ioexp_map_p); + } + + i2c_curr_p = ioexp_curr_p->i2c_head_p; + while (i2c_curr_p) { + i2c_next_p = i2c_curr_p->next; + if (i2c_curr_p->i2c_client_p) { + i2c_put_adapter(i2c_curr_p->i2c_client_p->adapter); + kfree(i2c_curr_p->i2c_client_p); + } + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } + kfree(ioexp_curr_p); + ioexp_curr_p = ioexp_next_p; + } + ioexp_tail_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} +EXPORT_SYMBOL(clean_ioexp_objs); + + +int +check_ioexp_objs(void){ + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while (ioexp_curr_p){ + if ( (ioexp_curr_p->check(ioexp_curr_p)) < 0){ + SWPS_INFO("check IOEXP-%d fail! :%d\n", + ioexp_curr_p->ioexp_id, ioexp_curr_p->ioexp_type); + return -1; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} +EXPORT_SYMBOL(check_ioexp_objs); + + +struct ioexp_obj_s * +get_ioexp_obj(int ioexp_id){ + + struct ioexp_obj_s *result_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + if (ioexp_curr_p->ioexp_id == ioexp_id){ + result_p = ioexp_curr_p; + break; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return result_p; +} +EXPORT_SYMBOL(get_ioexp_obj); + + +void +unlock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_unlock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } +} +EXPORT_SYMBOL(unlock_ioexp_all); + +int +lock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_lock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} +EXPORT_SYMBOL(lock_ioexp_all); + + +int +check_channel_tier_1(void) { + + if ( (!_is_channel_ready(ioexp_head_p)) && + (!_is_channel_ready(ioexp_tail_p)) ){ + return -1; + } + return 0; +} +EXPORT_SYMBOL(check_channel_tier_1); + + +static int +_scan_channel_tier_1(int force, + int show_err) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + int ready = 0; + + if (!ioexp_curr_p) { + goto err_scan_tier_1_channel; + } + while(ioexp_curr_p) { + ready = _is_channel_ready(ioexp_curr_p); + if ((!ready) && (!force)) { + goto err_scan_tier_1_channel; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; + +err_scan_tier_1_channel: + if (show_err) { + if (ioexp_curr_p) { + SWPS_INFO("%s: IOEXP-%d fail\n", __func__, ioexp_curr_p->ioexp_id); + } else { + SWPS_INFO("%s: IOEXP is null.\n", __func__); + } + } + return -1; +} + + +static int +_scan_channel_tier_1_single(void) { + + int ret = 0; + int chan_id = 0; + int fake_cid = 0; + int fake_offs = 0; + int fake_addr = 0; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + + if (ioexp_head_p->ioexp_id != ioexp_tail_p->ioexp_id) { + return 0; + } + /* Setup i2c_client */ + chan_id = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chan_id; + fake_addr = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chip_addr; + adap = i2c_get_adapter((chan_id + 1)); + if(!adap){ + SWPS_INFO("%s: Can not get adap!\n", __func__); + return 0; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + SWPS_INFO("%s: Can not kzalloc client!\n", __func__); + return 0; + } + client->adapter = adap; + client->addr = fake_addr; + /* Fouce move ioexp ptr to next */ + ret = i2c_smbus_read_byte_data(client, fake_offs); + SWPS_DEBUG("%s: move ioexp_ptr done. :%d\n", __func__, ret); + kfree(client); + return 1; +} + + +int +resync_channel_tier_1(void) { + + char *emsg = "ERR"; + + if (!ioexp_head_p) { + emsg = "ioexp_head_p is NULL"; + goto err_resync_ioexp_status_1; + } + /* Run all */ + if (ioexp_head_p->ioexp_id == ioexp_tail_p->ioexp_id) { + _scan_channel_tier_1_single(); + } else { + _scan_channel_tier_1(1, 0); + } + /* Check all */ + if (_scan_channel_tier_1(0, 1) < 0) { + emsg = "resync tier-1 channel fail"; + goto err_resync_ioexp_status_1; + } + return 0; + +err_resync_ioexp_status_1: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} +EXPORT_SYMBOL(resync_channel_tier_1); + + +/* For build single module using (Ex: ONL platform) */ +MODULE_LICENSE("GPL"); + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/io_expander.h b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/io_expander.h new file mode 100644 index 00000000000..7c446ad073d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/io_expander.h @@ -0,0 +1,190 @@ +#ifndef IO_EXPANDER_H +#define IO_EXPANDER_H + +#include + + +/* IOEXP type define (SFP series) */ +#define IOEXP_TYPE_MAGINOLIA_NAB (10101) +#define IOEXP_TYPE_MAGINOLIA_4AB (10102) +#define IOEXP_TYPE_MAPLE_NABC (10104) +#define IOEXP_TYPE_GULMOHAR_NABC (10105) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC (10106) +#define IOEXP_TYPE_SFP_8P_LAYOUT_1 (10107) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC (10108) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC (10109) + +/* IOEXP type define (QSFP series) */ +#define IOEXP_TYPE_MAGINOLIA_7AB (10201) +#define IOEXP_TYPE_REDWOOD_P01P08 (10202) +#define IOEXP_TYPE_REDWOOD_P09P16 (10203) +#define IOEXP_TYPE_HUDSON32IGA_P01P08 (10204) +#define IOEXP_TYPE_HUDSON32IGA_P09P16 (10205) +#define IOEXP_TYPE_SPRUCE_7AB (10206) +#define IOEXP_TYPE_CYPRESS_7ABC (10207) +#define IOEXP_TYPE_TAHOE_5A (10208) +#define IOEXP_TYPE_TAHOE_6ABC (10209) +#define IOEXP_TYPE_SEQUOIA_NABC (10210) +#define IOEXP_TYPE_LAVENDER_P65 (10211) +#define IOEXP_TYPE_MAPLE_0ABC (10212) +#define IOEXP_TYPE_GULMOHAR_7ABC (10213) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC (10214) +#define IOEXP_TYPE_QSFP_6P_LAYOUT_1 (10215) +#define IOEXP_TYPE_CEDAR_0ABC (10216) +#define IOEXP_TYPE_SEQUOIA_P56P63 (10217) + +/* CPLD type define */ +#define CPLD_TYPE_COTTONWOOD (10301) + +/* IOEXP mode define */ +#define IOEXP_MODE_POLLING (19000) +#define IOEXP_MODE_DIRECT (19001) + +/* IOEXP state define */ +#define STATE_IOEXP_NORMAL (0) +#define STATE_IOEXP_INIT (-1) +#define STATE_IOEXP_ABNORMAL (-2) + +/* IOEXP error code define */ +#define ERR_IOEXP_NOTSUPPORT (-100) +#define ERR_IOEXP_UNINIT (-101) +#define ERR_IOEXP_BADCONF (-102) +#define ERR_IOEXP_ABNORMAL (-103) +#define ERR_IOEXP_NOSTATE (-104) +#define ERR_IOEXP_BADINPUT (-105) +#define ERR_IOEXP_UNEXCPT (-199) + +#define SWPS_INFO(fmt, args...) printk( KERN_INFO "[SWPS] " fmt, ##args) +#define SWPS_WARN(fmt, args...) printk( KERN_WARNING "[SWPS] " fmt, ##args) +#define SWPS_ERR(fmt, args...) printk( KERN_ERR "[SWPS] " fmt, ##args) + +#ifdef DEBUG_SWPS +# define SWPS_DEBUG(fmt, args...) printk( KERN_DEBUG "[SWPS] " fmt, ##args) +#else +# define SWPS_DEBUG(fmt, args...) +#endif + +struct ioexp_addr_s { + int chan_id; + int chip_addr; + int read_offset[8]; + int write_offset[8]; + int conf_offset[8]; + uint8_t data_default[8]; + uint8_t conf_default[8]; +}; + +struct ioexp_i2c_s { + int chip_id; + struct i2c_client *i2c_client_p; + struct ioexp_i2c_s *next; +}; + + +struct ioexp_bitmap_s { + int chip_id; /* IOEXP chip id */ + int ioexp_voffset; /* IOEXP virtual offset */ + int bit_shift; +}; + +struct ioexp_map_s { + int chip_amount; /* Number of chips that IOEXP object content */ + int data_width; /* Number of (Read/Write/Config) bytes */ + struct ioexp_addr_s *map_addr; /* Chip address info */ + struct ioexp_bitmap_s map_present[10]; /* IOEXP for SFP / QSFP */ + struct ioexp_bitmap_s map_tx_disable[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_tx_fault[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_rxlos[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_reset[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_lpmod[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_modsel[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs0[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs1[10]; /* IOEXP for QSFP */ +}; + +struct ioexp_data_s { + uint8_t data[8]; +}; + +struct ioexp_obj_s { + + /* ============================ + * Object public property + * ============================ + */ + int ioexp_id; + int ioexp_type; + + /* ============================ + * Object private property + * ============================ + */ + struct ioexp_data_s chip_data[16]; /* Max: 8-ioexp in one virt-ioexp(ioexp_obj) */ + struct ioexp_map_s *ioexp_map_p; + struct ioexp_obj_s *next; + struct ioexp_i2c_s *i2c_head_p; + struct mutex lock; + int mode; + int state; + + /* =========================================== + * Object public functions + * =========================================== + */ + int (*get_present)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_fault)(struct ioexp_obj_s *self, int virt_offset); + int (*get_rxlos)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_disable)(struct ioexp_obj_s *self, int virt_offset); + int (*get_reset)(struct ioexp_obj_s *self, int virt_offset); + int (*get_lpmod)(struct ioexp_obj_s *self, int virt_offset); + int (*get_modsel)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs0)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs1)(struct ioexp_obj_s *self, int virt_offset); + int (*set_tx_disable)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_reset)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_lpmod)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_modsel)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs0)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs1)(struct ioexp_obj_s *self, int virt_offset, int input_val); + + /* =========================================== + * Object private functions + * =========================================== + */ + int (*init)(struct ioexp_obj_s *self); + int (*check)(struct ioexp_obj_s *self); + int (*update_all)(struct ioexp_obj_s *self, int show_err, char *caller_name); + int (*fsm_4_direct)(struct ioexp_obj_s* self); + int (*fsm_4_polling)(struct ioexp_obj_s* self); +}; + + +struct ioexp_obj_s* get_ioexp_obj(int ioexp_id); +int create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode); +int init_ioexp_objs(void); +int check_ioexp_objs(void); +void clean_ioexp_objs(void); + +void unlock_ioexp_all(void); +int lock_ioexp_all(void); + +int check_channel_tier_1(void); +int resync_channel_tier_1(void); + +/* Macro for bit control */ +#define SWP_BIT_SET(byte_val,bit_shift) ((byte_val) |= (1<<(bit_shift))) +#define SWP_BIT_CLEAR(byte_val,bit_shift) ((byte_val) &= ~(1<<(bit_shift))) + + +#endif /* IO_EXPANDER_H */ + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/release_note b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/release_note new file mode 100644 index 00000000000..61a7b28d21e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/release_note @@ -0,0 +1,28 @@ +Repository : onie +Branch : uefi +machine_folder : machine/inventec/sequoia_b0_bde + +Title : [sequoia_b0] psu id start from 1, sync with other project +Commit : 86f38f4f10f27c330b1cc24fb1c5af98f95769e5 + +inv_cpld.c +inv_platform.c +inv_psoc.c +inv_psu.c +inv_tmp75.c +inv_ucd90160.c + +====================================================================== +Repository : swps-driver +Branch : maple_c1 + +[swps] +version : 4.4.1 +Commit : 60b9e66f97d1a89df3c5a021d6d580bc238523ac + +======================================================================= +[kernel driver 4.9.0.8-amd64 ] + +i2c-mux-pca9541 (modified) +ucd9000 (original) +pmbus.h (original) diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/transceiver.c b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/transceiver.c new file mode 100644 index 00000000000..e5fe89504a8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/transceiver.c @@ -0,0 +1,8443 @@ +#include +#include +#include +#include +#include "io_expander.h" +#include "transceiver.h" + +/* For build single module using (Ex: ONL platform) */ +#include +//#include +//#include + +extern int io_no_init; +/* ========== Register EEPROM address mapping ========== + */ +struct eeprom_map_s eeprom_map_sfp = { + .addr_br =0x50, .page_br =-1, .offset_br =12, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =94, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =-1, .offset_connector =2, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =-1, .offset_diag_type =92 , .length_diag_type =1, + .addr_extbr =-1, .page_extbr =-1, .offset_extbr =-1, .length_extbr =-1, + .addr_ext_id =0x50, .page_ext_id =-1, .offset_ext_id =1, .length_ext_id =1, + .addr_id =0x50, .page_id =-1, .offset_id =0, .length_id =1, + .addr_len_sm =0x50, .page_len_sm =-1, .offset_len_sm =15, .length_len_sm =1, + .addr_len_smf =0x50, .page_len_smf =-1, .offset_len_smf =14, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =-1, .offset_len_om1 =17, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =-1, .offset_len_om2 =16, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =-1, .offset_len_om3 =19, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =-1, .offset_len_om4 =18, .length_len_om4 =1, + .addr_option =0x50, .page_option =-1, .offset_option =64, .length_option =2, + .addr_rate_id =0x50, .page_rate_id =-1, .offset_rate_id =13, .length_rate_id =1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =0x51, .page_rx_em =-1, .offset_rx_em =115, .length_rx_em =1, + .addr_rx_los =-1, .page_rx_los =-1, .offset_rx_los =-1, .length_rx_los =-1, + .addr_rx_power =0x51, .page_rx_power =-1, .offset_rx_power =104, .length_rx_power =2, + .addr_soft_rs0 =0x51, .page_soft_rs0 =-1, .offset_soft_rs0 =110, .length_soft_rs0 =1, + .addr_soft_rs1 =0x51, .page_soft_rs1 =-1, .offset_soft_rs1 =118, .length_soft_rs0 =1, + .addr_temp =0x51, .page_temp =-1, .offset_temp =96, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =-1, .offset_trancomp =3, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =-1, .offset_trancomp_ext =36, .length_trancomp_ext =1, + .addr_tx_bias =0x51, .page_tx_bias =-1, .offset_tx_bias =100, .length_tx_bias =2, + .addr_tx_disable =-1, .page_tx_disable =-1, .offset_tx_disable =-1, .length_tx_disable =-1, + .addr_tx_eq =0x51, .page_tx_eq =-1, .offset_tx_eq =114, .length_tx_eq =1, + .addr_tx_fault =-1, .page_tx_fault =-1, .offset_tx_fault =-1, .length_tx_fault =-1, + .addr_tx_power =0x51, .page_tx_power =-1, .offset_tx_power =102, .length_tx_power =2, + .addr_vendor_name =0x50, .page_vendor_name =-1, .offset_vendor_name =20, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =-1, .offset_vendor_pn =40, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =-1, .offset_vendor_rev =56, .length_vendor_rev =4, + .addr_vendor_sn =0x50, .page_vendor_sn =-1, .offset_vendor_sn =68, .length_vendor_sn =16, + .addr_voltage =0x51, .page_voltage =-1, .offset_voltage =98, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =-1, .offset_wavelength =60, .length_wavelength =2, +}; + +struct eeprom_map_s eeprom_map_qsfp = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =-1, .page_rx_em =-1, .offset_rx_em =-1, .length_rx_em =-1, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =-1, .page_tx_eq =-1, .offset_tx_eq =-1, .length_tx_eq =-1, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, +}; + +struct eeprom_map_s eeprom_map_qsfp28 = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =0x50, .page_cdr =-1, .offset_cdr =98, .length_cdr =1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =0x50, .page_rx_am =3, .offset_rx_am =238, .length_rx_am =2, + .addr_rx_em =0x50, .page_rx_em =3, .offset_rx_em =236, .length_rx_em =2, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =0x50, .page_tx_eq =3, .offset_tx_eq =234, .length_tx_eq =2, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, +}; + + +/* ========== Utility Functions ========== + */ +static int +get_bit(uint8_t origin_byte, int bit_shift) { + return (int)((origin_byte >> bit_shift) & 0x1); +} + +static int +transform_word_to_int(uint8_t hight_byte, + uint8_t low_byte) { + return ((((int)hight_byte) << 8) + (int)low_byte); +} + +void +alarm_msg_2_user(struct transvr_obj_s *self, + char *emsg) { + + SWPS_ERR("%s on %s.\n", emsg, self->swp_name); +} +EXPORT_SYMBOL(alarm_msg_2_user); + +/* ========== Private functions ========== + */ +static int +_reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self); + +static int +_transvr_init_handler(struct transvr_obj_s *self); + +int +_transvr_clean_handler(struct transvr_obj_s *self); + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self); + +#define I2C_BLOCK_READ_ENABLE +#define I2C_RETRY_COUNT (3) +#define I2C_RETRY_DELAY_MS (10) +static int inv_i2c_smbus_read_block_data(struct i2c_client *client, u8 offset, int len, u8 *buf) +{ + int ret = 0; + int i = 0; + + for (i = 0; i < I2C_RETRY_COUNT; i++) { + // Notes: The maximum length of the block read is 32 bytes. + // If the data size is greater than 32 bytes, please divided into multiple reads. + ret = i2c_smbus_read_i2c_block_data(client, offset, len, buf); + if (ret < 0) { + msleep(I2C_RETRY_DELAY_MS); + continue; + } + break; + } + + if (i >= I2C_RETRY_COUNT) { + SWPS_ERR("%s fail:offset:0x%x try %d/%d! Error Code: %d\n", __func__, offset, i, I2C_RETRY_COUNT, ret); + } + + return ret; +} + +void +lock_transvr_obj(struct transvr_obj_s *self) { + + mutex_lock(&self->lock); + self->curr_page = VAL_TRANSVR_PAGE_FREE; +} +EXPORT_SYMBOL(lock_transvr_obj); + + +void +unlock_transvr_obj(struct transvr_obj_s *self) { + + self->curr_page = VAL_TRANSVR_PAGE_FREE; + mutex_unlock(&self->lock); +} +EXPORT_SYMBOL(unlock_transvr_obj); + + +static int +_check_by_mode(struct transvr_obj_s *self, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + char *caller_name){ + + int return_val = ERR_TRANSVR_UNEXCPT; + + switch (self->mode){ + case TRANSVR_MODE_POLLING: + switch (self->state){ + case STATE_TRANSVR_CONNECTED: + goto ok_check_by_mode_1; + case STATE_TRANSVR_NEW: + case STATE_TRANSVR_INIT: + return ERR_TRANSVR_UNINIT; + case STATE_TRANSVR_DISCONNECTED: + return ERR_TRANSVR_UNPLUGGED; + case STATE_TRANSVR_UNEXCEPTED: + return ERR_TRANSVR_ABNORMAL; + case STATE_TRANSVR_ISOLATED: + return ERR_TRNASVR_BE_ISOLATED; + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + + case TRANSVR_MODE_DIRECT: + return_val = self->fsm_4_direct(self, caller_name); + if (return_val < 0){ + return return_val; + } + goto ok_check_by_mode_1; + + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + +ok_check_by_mode_1: + return attr_update_func(self, 0); + +err_check_by_mode_1: + SWPS_INFO("_check_by_mode: mode:%d state:%d\n", self->mode, self->state); + return ERR_TRANSVR_UNEXCPT; +} + + +static void +_transvr_clean_retry(struct transvr_obj_s *self) { + self->retry = 0; +} + + +static int +_transvr_handle_retry(struct transvr_obj_s *self, int retry) { + /* Return: 0: keep retry + * -1: stop retry + */ + if (self->retry == 0) { + self->retry = retry; + } + self->retry -= 1; + if (self->retry <= 0) { + _transvr_clean_retry(self); + return -1; + } + return 0; +} + + +static int +_common_setup_page(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int show_e) { + /* return: + * 0 : OK + * -1 : EEPROM settings incorrect + * -2 : I2C R/W failure + * -3 : Undefined case + */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Check */ + if ((addr < 0) || (offset < 0) || (len < 0)) { + emsg = "EEPROM settings incorrect"; + retval = -1; + goto err_common_setup_page; + } + /* Case1: continue access */ + if ((self->i2c_client_p->addr == addr) && + (self->curr_page == page)) { + return 0; + } + self->i2c_client_p->addr = addr; + /* Case2: select lower page */ + if (page == -1) { + self->curr_page = page; + return 0; + } + /* Case3: select upper page */ + if (page >= 0) { + goto upper_common_setup_page; + } + /* Unexpected case */ + show_e = 1; + emsg = "Unexpected case"; + retval = -3; + goto err_common_setup_page; + +upper_common_setup_page: + if (i2c_smbus_write_byte_data(self->i2c_client_p, + VAL_TRANSVR_PAGE_SELECT_OFFSET, + page) < 0) { + emsg = "I2C R/W failure"; + retval = -2; + goto err_common_setup_page; + } + self->curr_page = page; + mdelay(VAL_TRANSVR_PAGE_SELECT_DELAY); + return 0; + +err_common_setup_page: + if (show_e) { + SWPS_INFO("%s: %s", __func__, emsg); + SWPS_INFO("%s: :0x%02x :%d :%d :%d\n", + __func__, addr, page, offset, len); + } + return retval; +} + +/* +static int +_common_setup_password(struct transvr_obj_s *self, + int addr, + int page, + int offs, + uint8_t pwd[4], + int show_e) { + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, 4, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_setup_password; + } + for (i=0; i<4; i++) { + err = i2c_smbus_write_byte_data(self->i2c_client_p, + (offs + i), + pwd[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_setup_password; + } + } + return 0; + +err_common_setup_password: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} +*/ + +static int +_common_update_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + uint8_t *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_uint8_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_uint8_attr; + } + buf[i] = err; + } + return 0; + +err_common_update_uint8_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_int_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_int_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_int_attr; + } + buf[i] = (int)err; + } + return 0; + +err_common_update_int_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_INT_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_string_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + char buf[], + char *caller, + int show_e){ + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_string_attr; + } + #ifndef I2C_BLOCK_READ_ENABLE + int i; + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_string_attr; + } + buf[i] = (char)err; + } + #else + err = inv_i2c_smbus_read_block_data(self->i2c_client_p, offset, len, buf); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_string_attr; + } + #endif + return 0; + +err_common_update_string_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = 'e'; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + uint8_t update, + uint8_t *buf, + char *caller, + int show_e){ + int len = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + if ((*buf) == update){ + return 0; + } + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + err = i2c_smbus_write_byte_data(self->i2c_client_p, + offset, + update); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + (*buf) = update; + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_array(struct transvr_obj_s *self, + int addr, + int page, + int offs, + int len, + uint8_t update[], + uint8_t buf[], + char *caller, + int show_e){ + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + for (i=0; ii2c_client_p, + (offs + i), + update[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + buf[i] = update[i]; + } + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, emsg, caller, err, i); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_attr_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_id, + self->eeprom_map_p->page_id, + self->eeprom_map_p->offset_id, + self->eeprom_map_p->length_id, + &(self->id), + "_common_update_attr_id", + show_err); +} + + +static int +_common_update_attr_extended_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_ext_id, + self->eeprom_map_p->page_ext_id, + self->eeprom_map_p->offset_ext_id, + self->eeprom_map_p->length_ext_id, + &(self->ext_id), + "_common_update_attr_extended_id", + show_err); +} + + +static int +_common_update_attr_connector(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_connector, + self->eeprom_map_p->page_connector, + self->eeprom_map_p->offset_connector, + self->eeprom_map_p->length_connector, + &(self->connector), + "_common_update_attr_connector", + show_err); +} + + +static int +_common_update_attr_transvr_comp(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp, + self->eeprom_map_p->page_trancomp, + self->eeprom_map_p->offset_trancomp, + self->eeprom_map_p->length_trancomp, + self->transvr_comp, + "_common_update_attr_transvr_comp", + show_err); +} + + +static int +_common_update_attr_transvr_comp_ext(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp_ext, + self->eeprom_map_p->page_trancomp_ext, + self->eeprom_map_p->offset_trancomp_ext, + self->eeprom_map_p->length_trancomp_ext, + &(self->transvr_comp_ext), + "_common_update_attr_transvr_comp_ext", + show_err); +} + + +static int +_common_update_attr_vendor_name(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_name, + self->eeprom_map_p->page_vendor_name, + self->eeprom_map_p->offset_vendor_name, + self->eeprom_map_p->length_vendor_name, + self->vendor_name, + "_common_update_attr_vendor_name", + show_err); +} + + +static int +_common_update_attr_vendor_pn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_pn, + self->eeprom_map_p->page_vendor_pn, + self->eeprom_map_p->offset_vendor_pn, + self->eeprom_map_p->length_vendor_pn, + self->vendor_pn, + "_common_update_attr_vendor_pn", + show_err); +} + + +static int +_common_update_attr_vendor_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_rev, + self->eeprom_map_p->page_vendor_rev, + self->eeprom_map_p->offset_vendor_rev, + self->eeprom_map_p->length_vendor_rev, + self->vendor_rev, + "_common_update_attr_vendor_rev", + show_err); +} + + +static int +_common_update_attr_vendor_sn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_sn, + self->eeprom_map_p->page_vendor_sn, + self->eeprom_map_p->offset_vendor_sn, + self->eeprom_map_p->length_vendor_sn, + self->vendor_sn, + "_common_update_attr_vendor_sn", + show_err); +} + + +static int +_common_update_attr_br(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_br, + self->eeprom_map_p->page_br, + self->eeprom_map_p->offset_br, + self->eeprom_map_p->length_br, + &(self->br), + "_common_update_attr_br", + show_err); +} + + +static int +_common_update_attr_len_smf(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_smf, + self->eeprom_map_p->page_len_smf, + self->eeprom_map_p->offset_len_smf, + self->eeprom_map_p->length_len_smf, + &(self->len_smf), + "_common_update_attr_len_smf", + show_err); +} + + +static int +_common_update_attr_len_om1(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om1, + self->eeprom_map_p->page_len_om1, + self->eeprom_map_p->offset_len_om1, + self->eeprom_map_p->length_len_om1, + &(self->len_om1), + "_common_update_attr_len_om1", + show_err); +} + +static int +_common_update_attr_len_om2(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om2, + self->eeprom_map_p->page_len_om2, + self->eeprom_map_p->offset_len_om2, + self->eeprom_map_p->length_len_om2, + &(self->len_om2), + "_common_update_attr_len_om2", + show_err); +} + +static int +_common_update_attr_len_om3(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om3, + self->eeprom_map_p->page_len_om3, + self->eeprom_map_p->offset_len_om3, + self->eeprom_map_p->length_len_om3, + &(self->len_om3), + "_common_update_attr_len_om3", + show_err); +} + + +static int +_common_update_attr_len_om4(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om4, + self->eeprom_map_p->page_len_om4, + self->eeprom_map_p->offset_len_om4, + self->eeprom_map_p->length_len_om4, + &(self->len_om4), + "_common_update_attr_len_om4", + show_err); +} + + +static int +_common_update_attr_option(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_option, + self->eeprom_map_p->page_option, + self->eeprom_map_p->offset_option, + self->eeprom_map_p->length_option, + self->option, + "_common_update_attr_option", + show_err); +} + + +static int +_common_update_attr_comp_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_comp_rev, + self->eeprom_map_p->page_comp_rev, + self->eeprom_map_p->offset_comp_rev, + self->eeprom_map_p->length_comp_rev, + &(self->comp_rev), + "_common_update_attr_comp_rev", + show_err); +} + + +static int +_common_update_attr_diag_type(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_diag_type, + self->eeprom_map_p->page_diag_type, + self->eeprom_map_p->offset_diag_type, + self->eeprom_map_p->length_diag_type, + &(self->diag_type), + "_common_update_attr_diag_type", + show_err); +} + + +static int +_common_update_attr_wavelength(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_wavelength, + self->eeprom_map_p->page_wavelength, + self->eeprom_map_p->offset_wavelength, + self->eeprom_map_p->length_wavelength, + self->wavelength, + "_common_update_attr_wavelength", + show_err); +} + + +int +_common_get_option_value(struct transvr_obj_s *self, + int offset, + int bit_shift) { + /* SFP: + * - option[0] = A0h / 64 + * - option[1] = A0h / 65 + * QSFP: + * - option[0] = 00h / 193 + * - option[1] = 00h / 194 + * - option[2] = 00h / 195 + */ + return (self->option[offset] & (1 << bit_shift)); +} + + +static int +_sfp_update_attr_len_sm(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_sm, + self->eeprom_map_p->page_len_sm, + self->eeprom_map_p->offset_len_sm, + self->eeprom_map_p->length_len_sm, + &(self->len_sm), + "_common_update_attr_len_sm", + show_err); +} + + +static int +_sfp_update_attr_rate_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_rate_id, + self->eeprom_map_p->page_rate_id, + self->eeprom_map_p->offset_rate_id, + self->eeprom_map_p->length_rate_id, + &(self->rate_id), + "_sfp_update_attr_rate_id", + show_err); +} + + +static int +_sfp_update_attr_soft_rs0(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + self->eeprom_map_p->length_soft_rs0, + &(self->soft_rs0), + "_sfp_update_attr_soft_rs0", + show_err); +} + + +static int +_sfp_update_attr_soft_rs1(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + self->eeprom_map_p->length_soft_rs1, + &(self->soft_rs1), + "_sfp_update_attr_soft_rs1", + show_err); +} + + +int +_sfp_is_diag_support(struct transvr_obj_s *self){ + + uint8_t bit_mask = 0xC0; /* 1100 0000 */ + uint8_t en_val = 0x40; /* 0100 0000 */ + uint8_t checkval = (self->diag_type & bit_mask); + + if (checkval == en_val) { + return 1; + } + return 0; +} + + +static int +_sfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_sfp_update_attr_curr_temp", + show_err); +} + + +static int +_sfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_sfp_update_attr_curr_voltage", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_sfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_sfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_sfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_sfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_sfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_sfp_update_attr_rx_em", + show_err); +} + + +static int +_sfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_sfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_cdr(struct transvr_obj_s *self, + int show_err){ + if (self->type != TRANSVR_TYPE_QSFP_28){ + self->cdr = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + self->eeprom_map_p->length_cdr, + &(self->cdr), + "_common_update_attr_cdr", + show_err); +} + + +static int +_qsfg_update_attr_extbr(struct transvr_obj_s *self, + int show_err) { + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_extbr, + self->eeprom_map_p->page_extbr, + self->eeprom_map_p->offset_extbr, + self->eeprom_map_p->length_extbr, + &(self->extbr), + "_common_update_attr_extbr", + show_err); +} + + +static int +_qsfp_is_diag_support(struct transvr_obj_s *self, + int diag_type) { + /* Input Parm: diag_type + * => 1 : temperature + * => 2 : voltage + * => 3 : tx relate + * => 4 : rx relate + */ + uint8_t mask_b2 = 0x04; /* 0000 0100 */ + uint8_t mask_b3 = 0x08; /* 0000 1000 */ + + switch (diag_type) { + case 1: /* temperature */ + case 2: /* voltage */ + /* Direct access target, because of spec not defined */ + return 1; + case 3: + case 4: + /* [Note] + * Due to lot of transceiver vendor defined it not rigorously and + * consider of general support, we seem it as supported if there + * are bit-2 OR bit-3 defined by transceiver vendor. + */ + if ( ((self->diag_type & mask_b2) == mask_b2 ) || + ((self->diag_type & mask_b3) == mask_b3 ) ){ + return 1; + } + return 0; + default: + SWPS_INFO("%s: undefined diag_type:%d\n", + __func__, diag_type); + break; + } + return 0; +} + + +int +_qsfp_is_implement_tx_disable(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-4 + */ + int byte = 2; + int bit = 4; + return _common_get_option_value(self, byte, bit); +} + + +int +_qsfp_is_implement_tx_fault(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-3 + */ + int byte = 2; + int bit = 3; + return _common_get_option_value(self, byte, bit); +} + + +static int +_qsfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + int diag_type = 1; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_qsfp_update_attr_curr_temp", + show_err); +} + + +static int +_qsfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + int diag_type = 2; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_qsfp_update_attr_curr_voltage", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_qsfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_qsfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_qsfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 4; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_qsfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_qsfp_update_attr_soft_rx_los(struct transvr_obj_s *self, + int show_err){ + + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_los, + self->eeprom_map_p->page_rx_los, + self->eeprom_map_p->offset_rx_los, + self->eeprom_map_p->length_rx_los, + &(self->rx_los), + "_qsfp_update_attr_soft_rx_los", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_disable(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_disable(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_update_attr_soft_tx_disable", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_fault(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_fault(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_fault, + self->eeprom_map_p->page_tx_fault, + self->eeprom_map_p->offset_tx_fault, + self->eeprom_map_p->length_tx_fault, + &(self->tx_fault), + "_qsfp_update_attr_soft_tx_fault", + show_err); +} + + +static int +_qsfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_qsfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_rx_am(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + self->rx_am, + "_qsfp_update_attr_rx_am", + show_err); +} + + +static int +_qsfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_qsfp_update_attr_rx_em", + show_err); +} + + +int +_common_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = "err"; + + if (_common_update_attr_id(self, show_err) < 0) { + err_str = "_common_update_attr_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_extended_id(self, show_err) < 0) { + err_str = "_common_update_attr_extended_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_connector(self, show_err) < 0) { + err_str = "_common_update_attr_connector"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp_ext(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp_ext"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_name(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_name"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_pn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_pn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_rev(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_sn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_sn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_br(self, show_err) < 0) { + err_str = "_common_update_attr_br"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_smf(self, show_err) < 0) { + err_str = "_common_update_attr_len_smf"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om1(self, show_err) < 0) { + err_str = "_common_update_attr_len_om1"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om2(self, show_err) < 0) { + err_str = "_common_update_attr_len_om2"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om3(self, show_err) < 0) { + err_str = "_common_update_attr_len_om3"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om4(self, show_err) < 0) { + err_str = "_common_update_attr_len_om4"; + goto err_common_update_attr_all; + } + if (_common_update_attr_option(self, show_err) < 0) { + err_str = "_common_update_attr_option"; + goto err_common_update_attr_all; + } + if (_common_update_attr_comp_rev(self, show_err) < 0) { + err_str = "_common_update_attr_comp_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_diag_type(self, show_err) < 0) { + err_str = "_common_update_attr_diag_type"; + goto err_common_update_attr_all; + } + if (_common_update_attr_wavelength(self, show_err) < 0) { + err_str = "_common_update_attr_wavelength"; + goto err_common_update_attr_all; + } + return 0; + +err_common_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_sfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_len_sm(self, show_err) < 0) { + err_str = "_sfp_update_attr_len_sm"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_rate_id(self, show_err) < 0) { + err_str = "_sfp_update_attr_rate_id"; + goto err_sfp_update_attr_all; + } + if ((self->rate_id) > 0) { + if (_sfp_update_attr_soft_rs0(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs0"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_soft_rs1(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs1"; + goto err_sfp_update_attr_all; + } + } + return 0; + +err_sfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_qsfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_qsfp_update_attr_all; + } + if (_qsfg_update_attr_extbr(self, show_err) < 0) { + err_str = "_qsfg_update_attr_extbr"; + goto err_qsfp_update_attr_all; + } + if (self->type == TRANSVR_TYPE_QSFP_28) { + if (_qsfp_update_attr_cdr(self, 1) < 0) { + err_str = "_qsfp_update_attr_cdr"; + goto err_qsfp_update_attr_all; + } + } + return 0; + +err_qsfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +/* ========== Object functions for common type ========== + */ +int +_common_count_temp(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + int sign = 0; + int high = 0; + int low = 0; + int lmax = 8; + + /* Count high */ + sign = get_bit(high_byte,7); + SWP_BIT_CLEAR(high_byte, 7); + high = (int)high_byte; + if (sign == 1) { + high = 0 - high; + } + /* Count low */ + low = (get_bit(low_byte, 7) * 500); + low += (get_bit(low_byte, 6) * 250); + low += (get_bit(low_byte, 5) * 125); + low += (get_bit(low_byte, 4) * 62); + low = (low / 100); + /* Integrate High and Low */ + return snprintf(buf_p, lmax, "%d.%d\n", high, low); +} + + +int +_common_count_voltage(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note]: + * Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts. Practical + * considerations to be defined by transceiver manufacturer will + * tend to limit the actual bounds of the supply voltage measurement. + * Accuracy is vendor specific but must be better than 3% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. Note that in some transceivers, transmitter supply + * voltage and receiver supply voltage are isolated. In that case, + * only one supply is monitored. Refer to the device specification + * for more detail. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 100 uV (1mV=1000uV) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 Volt */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_tx_bias(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 2 uA (1mA=1000uA) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total*2) / 1000); + val_f = (((total*2) - (val_i*1000)) / 100); + /* Return Unit: 1 mA */ + return snprintf(buf_p, lmax, "%d.%01d\n", val_i, val_f); +} + + +int +_common_count_tx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_rx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_wavelength(struct transvr_obj_s *self, + uint8_t high_byte, + uint8_t low_byte) { + /* [Note] + * SFP : uint 1 um. + * QSFP: unit 0.05 um. + */ + int total = 0; + + total = transform_word_to_int(high_byte, low_byte); + switch (self->type) { + case TRANSVR_TYPE_SFP: + return total; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + return (total/20); + + default: + break; + } + return ERR_TRANSVR_UNDEFINED; +} + + +int +common_get_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_id, + "common_get_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->id; +} + + +int +common_get_ext_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "common_get_ext_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->ext_id; +} + + +int +common_get_connector(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_connector, + "common_get_connector"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->connector; +} + + +int +common_get_vendor_name(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_name, + "common_get_vendor_name"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); +} + + +int +common_get_vendor_pn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_pn, + "common_get_vendor_pn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); +} + + +int +common_get_vendor_rev(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_rev, + "common_get_vendor_rev"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); +} + + +int +common_get_vendor_sn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_sn, + "common_get_vendor_sn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); +} + + +int +common_get_br(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return (int)self->br; + } + err = _check_by_mode(self, + &_common_update_attr_br, + "common_get_br"); + if (err < 0){ + return err; + } + /* Transform to INT to show error case */ + return (int)self->br; +} + + +int +common_get_len_smf(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_smf; + } + err = _check_by_mode(self, + &_common_update_attr_len_smf, + "common_get_len_smf"); + if (err < 0){ + return err; + } + return self->len_smf; +} + + +int +common_get_len_om1(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om1; + } + err = _check_by_mode(self, + &_common_update_attr_len_om1, + "common_get_len_om1"); + if (err < 0){ + return err; + } + return self->len_om1; +} + + +int +common_get_len_om2(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om2; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om2, + "common_get_len_om2"); + if (err < 0){ + return err; + } + return self->len_om2; +} + + +int +common_get_len_om3(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om3; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om3, + "common_get_len_om3"); + if (err < 0){ + return err; + } + return self->len_om3; +} + + +int +common_get_len_om4(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om4; + } + err = _check_by_mode(self, + &_common_update_attr_len_om4, + "common_get_len_om4"); + if (err < 0){ + return err; + } + return self->len_om4; +} + + +int +common_get_comp_extended(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp_ext, + "common_get_comp_extended"); + if (err_code < 0){ + return err_code; + } + return self->transvr_comp_ext; +} + + +int +common_get_comp_rev(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_comp_rev, + "common_get_comp_rev"); + if (err_code < 0){ + return err_code; + } + return self->comp_rev; +} + + +int +common_get_info(struct transvr_obj_s *self){ + + if (self->state != STATE_TRANSVR_CONNECTED) { + return self->state; + } + return self->info; +} + + +int +_common_get_if_lane(struct transvr_obj_s *self, + char *result){ + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_M_STR); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + memset(tmp_str, 0, LEN_TRANSVR_M_STR); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_M_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_M_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_M_STR); + } + if (i == 0) { + return EVENT_TRANSVR_TASK_FAIL; + } + return 0; +} + + +int +common_get_if_lane(struct transvr_obj_s *self, + char *buf_p){ + + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + if (self->ioexp_obj_p->state != STATE_IOEXP_NORMAL) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n", ERR_TRANSVR_ABNORMAL); + } + if (_common_get_if_lane(self, tmp_str) < 0) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n" ,ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%s\n" ,tmp_str); +} + + +int +sfp_get_len_sm(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_len_sm, + "sfp_get_len_sm"); + if (err_code < 0){ + return err_code; + } + return self->len_sm; +} + + +int +sfp_get_rate_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_rate_id, + "sfp_get_rate_id"); + if (err_code < 0){ + return err_code; + } + return self->rate_id; +} + + +int +sfp_get_soft_rs0(struct transvr_obj_s *self){ + /* Note: + * SFP Soft Rate_Select Select [aka. "RS(0)"] address + * A2h, offset: 110, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs0, + "sfp_get_soft_rs0"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs0 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_soft_rs1(struct transvr_obj_s *self){ + /* Note: + * SFP Soft RS(1) Select address + * A2h, offset: 118, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs1, + "sfp_get_soft_rs1"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs1 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_temp, + "sfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +sfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_voltage, + "sfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +sfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_bias, + "sfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->curr_tx_bias[0], + self->curr_tx_bias[1], + buf_p); +} + + +int +sfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_power, + "sfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->curr_tx_power[0], + self->curr_tx_power[1], + buf_p); +} + + +int +sfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_rx_power, + "sfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->curr_rx_power[0], + self->curr_rx_power[1], + buf_p); +} + + +int +sfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->rx_em[0]); +} + + +int +sfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->tx_eq[0]); +} + + +int +_sfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: A0h / 36 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +__sfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* SFP Specification Compliance: A0h / 3-10 + * transvr_comp[0-7] = 3 - 10 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_get_comp_10g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[0] = address A0h / 3 + * + * 3 7: 10G Base-ER + * 3 6: 10GBASE-LRM + * 3 5: 10GBASE-LR + * 3 4: 10GBASE-SR + */ + int bitmask = 0xf0; /* 11110000 */ + return (__sfp_get_comp_attr(self, 0) & bitmask); +} + + +int +_sfp_get_comp_1g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[3] = address A0h / 6 + * + * 6 7: BASE-PX *3 + * 6 6: BASE-BX10 *3 + * 6 5: 100BASE-FX + * 6 4: 100BASE-LX/LX10 + * 6 3: 1000BASE-T + * 6 2: 1000BASE-CX + * 6 1: 1000BASE-LX *3 + * 6 0: 1000BASE-SX + */ + return __sfp_get_comp_attr(self, 3); +} + + +int +_sfp_get_cable_tech(struct transvr_obj_s *self) { + /* transvr_comp[5] = address A0h / 8 + * + * 8 3: Active Cable *8 + * 8 2: Passive Cable *8 + */ + int bitmask = 0x0c; /* 00001100 */ + return (__sfp_get_comp_attr(self, 5) & bitmask); +} + + +int +sfp_get_comp_eth_1(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_1"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_1g_eth_comp(self); +} + + +int +sfp_get_comp_eth_10(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_10"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_10g_eth_comp(self); +} + + +int +_sfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: A0h / 2 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Note] Optical and Cable Variants Specification Compliance (SFF-8472) + * [Addr] A0h, Bytes 60-61 + * [Note] For optical variants, as defined by having zero's in A0h Byte 8 + * bits 2 and 3, Bytes 60 and 61 denote nominal transmitter output + * wavelength at room temperature. 16 bit value with byte 60 as high + * order byte and byte 61 as low order byte. The laser wavelength is + * equal to the 16 bit integer value in nm. This field allows the user + * to read the laser wavelength directly, so it is not necessary to + * infer it from the Transceiver Codes A0h Bytes 3 to 10 (see Table + * 5-3). This also allows specification of wavelengths not covered + * in the Transceiver Codes, such as those used in coarse WDM systems. + * + * For passive and active cable variants, a value of 00h for both A0h + * Byte 60 and Byte 61 denotes laser wavelength or cable specification + * compliance is unspecified. + */ + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +int +sfp_get_1g_rj45_extphy_offset(struct transvr_obj_s *self, char *buf) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%02x\n", self->extphy_offset); +} + + +int +sfp_get_1g_rj45_extphy_reg(struct transvr_obj_s *self, char *buf) { + + int i = 0; + int ret = 0; + int retry = 3; + int delay = 200; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; ii2c_client_p, self->extphy_offset); + if (ret >=0) { + goto ok_sfp_get_1g_rj45_extphy_reg; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; + +ok_sfp_get_1g_rj45_extphy_reg: + ret = ((ret & 0x00ff) << 8) | ((ret & 0xff00) >> 8); + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%04x\n", ret); +} + + +int +__qsfp_get_power_cls(struct transvr_obj_s *self, + int direct_access){ + + int err_code; + uint8_t detect_val; + + /* Detect and Update power class attribute */ + if (direct_access){ + err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_power_cls"); + } else { + err_code = self->ext_id; + } + if (err_code <0){ + return err_code; + } + if (err_code == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data */ + detect_val = self->ext_id; + SWP_BIT_CLEAR(detect_val, 2); /* Bit2: CDR RX present */ + SWP_BIT_CLEAR(detect_val, 3); /* Bit3: CDR TX present */ + SWP_BIT_CLEAR(detect_val, 4); /* Bit4: CLEI present */ + SWP_BIT_CLEAR(detect_val, 5); /* Bit5: reserved */ + /* Identify power class */ + switch (detect_val) { + case 0: /* Class_1: 00000000 */ + return 1; + case 64: /* Class_2: 01000000 */ + return 2; + case 128: /* Class_3: 10000000 */ + return 3; + case 192: /* Class_4: 11000000 */ + return 4; + case 1: /* Class_5: 00000001 */ + case 193: /* Class_5: 11000001 */ + return 5; + case 2: /* Class_6: 00000010 */ + case 194: /* Class_6: 11000010 */ + return 6; + case 3: /* Class_7: 00000011 */ + case 195: /* Class_7: 11000011 */ + return 7; + default: + break; + } + SWPS_INFO("%s: Detect undefined power class:%d\n", __func__, detect_val); + return ERR_TRANSVR_UNDEFINED; +} + + +int +qsfp_get_power_cls(struct transvr_obj_s *self) { + return __qsfp_get_power_cls(self, 1); +} + + +int +__qsfp_get_cdr_present(struct transvr_obj_s *self, + int direct_access){ + + int retval; + int BIT_SHIFT = 2; + int BIT_MASK = 0x3; + + /* Detect and Update power class attribute */ + if (direct_access) { + retval = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_cdr_present"); + if (retval < 0){ + return retval; + } + } + retval = self->ext_id; + if (retval == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data and return */ + return (int)(retval >> BIT_SHIFT & BIT_MASK); +} + + +int +qsfp_get_cdr_present(struct transvr_obj_s *self) { + return __qsfp_get_cdr_present(self, 1); +} + + +int +qsfp_get_cdr(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + "qsfp_get_cdr"); + if (err_code <0){ + return err_code; + } + + return self->cdr; +} + + +int +__qsfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* QSFP Specification Compliance: 00h / 131-138 + * transvr_comp[0-7] = 131 - 138 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_get_comp_10_40_100_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[0] = address 00h / 131 + * + * 131 7: Extended: See section 6.3.23. The Extended Specification Compliance + * Codes are maintained in the Transceiver Management section of SFF- + * 8024. + * 131 6: 10GBASE-LRM + * 131 5: 10GBASE-LR + * 131 4: 10GBASE-SR + * 131 3: 40GBASE-CR4 + * 131 2: 40GBASE-SR4 + * 131 1: 40GBASE-LR4 + * 131 0: 40G Active Cable (XLPPI) + */ + return __qsfp_get_comp_attr(self, 0); +} + + +int +_qsfp_get_comp_sonet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 132 7-3: Reserved + * 132 2: OC 48, long reach + * 132 1: OC 48, intermediate reach + * 132 0: OC 48 short reach + */ + return __qsfp_get_comp_attr(self, 1); +} + + +int +_qsfp_get_comp_sas_sata(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 133 7: SAS 24.0 Gb/s + * 133 6: SAS 12.0 Gb/s + * 133 5: SAS 6.0 Gb/s + * 133 4: SAS 3.0 Gb/s + * 133 3-0: Reserved + */ + return __qsfp_get_comp_attr(self, 2); +} + + +int +_qsfp_get_comp_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 134 7-4: Reserved + * 134 3: 1000BASE-T + * 134 2: 1000BASE-CX + * 134 1: 1000BASE-LX + * 134 0: 1000BASE-SX + */ + return __qsfp_get_comp_attr(self, 3); +} + + +int +_qsfp_get_comp_fc_link_length(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 7: Very long distance (V) + * 135 6: Short distance (S) + * 135 5: Intermediate distance (I) + * 135 4: Long distance (L) + * 135 3: Medium (M) + */ + int mask = 0xFC; /* 11111100 */ + return (__qsfp_get_comp_attr(self, 4) & mask); +} + + +int +_qsfp_get_comp_fc_trans_tech(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 2: Reserved + * 135 1: Longwave laser (LC) + * 135 0: Electrical inter-enclosure (EL) + * + * 136 7: Electrical intra-enclosure + * 136 6: Shortwave laser w/o OFC (SN) + * 136 5: Shortwave laser w OFC (SL) + * 136 4: Longwave Laser (LL) + * 136 3-0: Reserved + * + * return value = [bit 8-15:addr 135][bit 0-7:addr 136] + */ + int mask_135 = 7; /* 00000111 */ + int val_135 = (__qsfp_get_comp_attr(self, 4) & mask_135); + int val_136 = __qsfp_get_comp_attr(self, 5); + return ((val_135 << 7) + val_136); +} + + +int +_qsfp_get_comp_fc_trans_media(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 137 7: Twin Axial Pair (TW) + * 137 6: Shielded Twisted Pair (TP) + * 137 5: Miniature Coax (MI) + * 137 4: Video Coax (TV) + * 137 3: Multi-mode 62.5 m (M6) + * 137 2: Multi-mode 50 m (M5) + * 137 1: Multi-mode 50 um (OM3) + * 137 0: Single Mode (SM) + */ + return __qsfp_get_comp_attr(self, 6); +} + + +int +_qsfp_get_comp_fc_speed(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 138 7: 1200 MBps (per channel) + * 138 6: 800 MBps + * 138 5: 1600 MBps (per channel) + * 138 4: 400 MBps + * 138 3: 3200 MBps (per channel) + * 138 2: 200 MBps + * 138 1: Extended: See section 6.3.23. The Extended Specification + * Compliance Codes are maintained in the Transceiver Management + * section of SFF-8024. + * 138 0: 100 MBps + */ + return __qsfp_get_comp_attr(self, 7); +} + + +int +_qsfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: 00h / 192 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_comp_eth(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_eth"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_ethernet(self); +} + + +int +qsfp_get_comp_10_40(struct transvr_obj_s *self) { + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_10_40"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_10_40_100_ethernet(self); +} + + +int +_qsfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: 00h / 130 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_temp, + "qsfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +qsfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_voltage, + "qsfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +qsfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->tx_eq[0], self->tx_eq[1]); +} + + +int +qsfp_get_transvr_rx_am(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_get_transvr_rx_am"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_am[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_am[0], self->rx_am[1]); +} + + +int +qsfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_em[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_em[0], self->rx_em[1]); +} + + +int +_qsfp_get_channel_diag(uint8_t *data_array, + int (*count_func)(uint8_t high_byte, uint8_t low_byte, char *buf_p), + char *ch_name, + char *result_p) { + int i, high, low; + int len_max = 128; + char ch_buf[4][16] = { DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL }; + + for (i=0; i<4; i++) { + high = (i*2); + low = ((i*2) + 1); + count_func(data_array[high], data_array[low], ch_buf[i]); + } + return snprintf(result_p, len_max, + "%s-%d:%s%s-%d:%s%s-%d:%s%s-%d:%s", + ch_name, 1, ch_buf[0], + ch_name, 2, ch_buf[1], + ch_name, 3, ch_buf[2], + ch_name, 4, ch_buf[3]); +} + + +int +qsfp_get_soft_rx_los(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_rx_los, + "qsfp_get_soft_rx_los"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->rx_los & mask)); +} + + +int +qsfp_get_soft_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_get_soft_tx_disable"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_disable & mask)); +} + + +int +qsfp_get_soft_tx_fault(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_fault, + "qsfp_get_soft_tx_fault"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_fault & mask)); +} + + +int +qsfp_get_auto_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + if (self->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "%d\n", ERR_TRANSVR_FUNC_DISABLE); + } + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "0x%02x\n", self->auto_tx_disable); +} + + +int +qsfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_bias, + "qsfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _qsfp_get_channel_diag(self->curr_tx_bias, + _common_count_tx_bias, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_power, + "qsfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_tx_power, + _common_count_tx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_rx_power, + "qsfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_rx_power, + _common_count_rx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Desc] Wavelength or Copper Cable Attenuation (SFF-8636) + * [Addr] 00h 186-187 + * [Note] + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is + * a 16-bit hex value with Byte 186 as high order byte and Byte 187 as + * low order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. + * If the free side device is identified as copper cable these registers will + * be used to define the cable attenuation. An indication of 0 dB attenuation + * refers to the case where the attenuation is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +/* Public Function for Setup Features + */ +static int +__sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + uint8_t update_val = (*attr_p); + + switch (input_val) { + case 0: + SWP_BIT_CLEAR(update_val, bit_shift); + break; + case 1: + SWP_BIT_SET(update_val, bit_shift); + break; + default: + retval = ERR_TRANSVR_UNEXCPT; + err_code = ERR_TRANSVR_UNEXCPT; + err_msg = "Exception occurs"; + goto err_private_sfp_set_soft_rs_1; + } + err_code = _common_set_uint8_attr(self, + address, + page, + offset, + update_val, + attr_p, + caller, + show_err); + if (err_code < 0) { + retval = err_code; + err_msg = "Write data via i2c fail!"; + goto err_private_sfp_set_soft_rs_1; + } + (*attr_p) = update_val; + return 0; + +err_private_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +static int +_sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + + /* Check input value */ + if ((input_val != 0) && (input_val != 1)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + switch (err_code) { + case 0: + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "Not support this feature"; + break; + case ERR_TRANSVR_UNINIT: + retval = ERR_TRANSVR_UNINIT; + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + retval = ERR_TRANSVR_UNPLUGGED; + err_msg = "Transceiver unplugged!"; + break; + default: + retval = err_code; + err_msg = "Check Rate_ID fail!"; + break; + } + goto err_common_sfp_set_soft_rs_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + attr_update_func, + caller); + if ( (err_code < 0) || + ((*attr_p) == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Generate and update value */ + return __sfp_set_soft_rs(self, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + +err_common_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +sfp_set_soft_rs0(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(0)"] address + * A2h, offset: 110, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + bit_shift, + &_sfp_update_attr_soft_rs0, + &(self->soft_rs0), + "sfp_set_soft_rs0", + show_err); +} + + +int +sfp_set_soft_rs1(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(1)"] address + * A2h, offset: 118, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + bit_shift, + &_sfp_update_attr_soft_rs1, + &(self->soft_rs1), + "sfp_set_soft_rs1", + show_err); +} + + +int +__sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_tx_eq; + } + setv = (uint8_t)input; + if (self->tx_eq[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + setv, + &(self->tx_eq[0]), + "_sfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_tx_eq; + } + return 0; + +err_sfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; itx_eq[0]; + if (_sfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if (self->tx_eq[0] == tmp){ + return 0; + } + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +sfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_tx_eq(self, input, 1); +} + + +int +__sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_rx_em; + } + setv = (uint8_t)input; + if (self->rx_em[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + setv, + &(self->rx_em[0]), + "_sfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_rx_em; + } + return 0; + +err_sfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; irx_em[0]; + if (_sfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if (self->rx_em[0] == tmp){ + return 0; + } + } + return -1; +} + + +int +sfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_rx_em(self, input, 1); +} + + +int +sfp_set_1g_rj45_extphy_offset(struct transvr_obj_s *self, + int input) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xff)) { + return ERR_TRANSVR_BADINPUT; + } + self->extphy_offset = (uint8_t)input; + return 0; +} + + +int +sfp_set_1g_rj45_extphy_reg(struct transvr_obj_s *self, + int input) { + + int i = 0; + int retry = 3; + int delay = 200; + uint16_t tmp = 0; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xffff)) { + return ERR_TRANSVR_BADINPUT; + } + tmp = ((input & 0x00ff) << 8) | ((input & 0xff00) >> 8); + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; i<=retry; i++) { + if (i2c_smbus_write_word_data(self->i2c_client_p, + self->extphy_offset, + tmp) >= 0) { + return 0; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; +} + + +static int +__qsfp_set_cdr(struct transvr_obj_s *self, + int input_val, + int show_err) { + + uint8_t update_val; + int CDR_FEATURE_SUPPORTED = 0x3; + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_name = "__qsfp_set_cdr"; + + /* Check input value */ + if ((input_val < 0) || (input_val > 0xff)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_qsfp_set_cdr_1; + } + update_val = (uint8_t)input_val; + /* Check CDR supported by transceiver */ + err_code = qsfp_get_cdr_present(self); + if (err_code < 0) { + retval = err_code; + switch (err_code) { + case ERR_TRANSVR_UNINIT: + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + err_msg = "Transceiver unplugged!"; + break; + default: + err_msg = "Check CDR present fail!"; + break; + } + goto err_qsfp_set_cdr_1; + } + if (err_code != CDR_FEATURE_SUPPORTED) { + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "This transceiver not support CDR!"; + goto err_qsfp_set_cdr_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + func_name); + if ( (err_code < 0) || + (self->cdr == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_qsfp_set_cdr_1; + } + /* Write input value to transceiver */ + return _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + update_val, + &(self->cdr), + func_name, + show_err); + +err_qsfp_set_cdr_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +qsfp_set_cdr(struct transvr_obj_s *self, + int input_val) { + return __qsfp_set_cdr(self, input_val, 1); +} + + +int +qsfp_set_soft_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int show_err = 1; + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + int update_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_soft_tx_disable"); + if (retval < 0) { + snprintf(err_msg, 63, "Not ready. err:%d", retval); + goto err_qsfp_set_soft_tx_disable; + } + if ((input_val > in_max) || + (input_val < in_min) ){ + retval = ERR_TRANSVR_BADINPUT; + snprintf(err_msg, 63, "Input value:%d incorrect!", input_val); + goto err_qsfp_set_soft_tx_disable; + } + if ((self->tx_disable & 0x0f) == input_val) { + return 0; + } + update_val = ((self->tx_disable & 0xf0) & input_val); + retval = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + input_val, + &(self->tx_disable), + "qsfp_set_tx_disable", + show_err); + if (retval < 0) { + snprintf(err_msg, 63, "_common_set_uint8_attr:%d fail!", retval); + goto err_qsfp_set_soft_tx_disable; + } + return 0; + +err_qsfp_set_soft_tx_disable: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return retval; +} + + +int +_qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + uint8_t update) { + + uint8_t tx_enable = 0x0; + int show_e = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Handle timing issues */ + if (update != tx_enable) { + /* Note: + * Because there are some txvr has timing issues, + * therefore we need to execute reset cycle first. + * (enable -> other settings) + */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + tx_enable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set reset value fail"; + goto err_qsfp_set_auto_tx_disable; + } + mdelay(10); + } + /* Setup target value */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->auto_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set target value fail"; + goto err_qsfp_set_auto_tx_disable; + } + /* Check and update */ + err = _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C get value fail"; + goto err_qsfp_set_auto_tx_disable; + } + if (self->tx_disable != update) { + emsg = "data not become effective"; + goto err_qsfp_set_auto_tx_disable; + } + return 0; + +err_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s\n", + __func__, emsg, self->swp_name); + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Update settings*/ + if (input_val == VAL_TRANSVR_FUNCTION_DISABLE) { + emsg = "User disable auto tx_disable"; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + goto out_qsfp_set_auto_tx_disable; + } + if ((input_val > in_max) || (input_val < in_min) ){ + SWPS_INFO("%s: Input value:%d incorrect! :%s\n", + __func__, input_val, self->swp_name); + return ERR_TRANSVR_BADINPUT; + } + self->auto_tx_disable = input_val; + /* Check current soft tx_disable */ + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_auto_tx_disable"); + switch (retval) { + case 0: + break; + case ERR_TRANSVR_UNPLUGGED: + emsg = "Doesn't need to update"; + goto out_qsfp_set_auto_tx_disable; + default: + SWPS_INFO("%s: setup fail :%d :%s\n", + __func__, retval, self->swp_name); + return retval; + } + return _qsfp_set_auto_tx_disable(self, input_val); + +out_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s :%d\n :%d", + __func__, emsg, self->swp_name, input_val, retval); + return 0; +} + + +int +__qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_tx_eq; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->tx_eq[0] == setv[0]) && + (self->tx_eq[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + setv, + self->tx_eq, + "_qsfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_tx_eq; + } + return 0; + +err_qsfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; itx_eq[0]; + tmp[1] = self->tx_eq[1]; + if (_qsfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if ((self->tx_eq[0] == tmp[0]) && + (self->tx_eq[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_tx_eq(self, input, 1); +} + + +int +__qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_am; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_am[0] == setv[0]) && + (self->rx_am[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + setv, + self->rx_am, + "_qsfp_set_rx_am", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_am; + } + return 0; + +err_qsfp_set_rx_am: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_am[0]; + tmp[1] = self->rx_am[1]; + if (_qsfp_update_attr_rx_am(self, show_e) < 0){ + continue; + } + if ((self->rx_am[0] == tmp[0]) && + (self->rx_am[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_am(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_set_rx_am"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_am(self, input, 1); +} + + +int +__qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_em; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_em[0] == setv[0]) && + (self->rx_em[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + setv, + self->rx_em, + "_qsfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_em; + } + return 0; + +err_qsfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_em[0]; + tmp[1] = self->rx_em[1]; + if (_qsfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if ((self->rx_em[0] == tmp[0]) && + (self->rx_em[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_em(self, input, 1); +} + + +int +common_transvr_dump(struct transvr_obj_s* self){ + + char *type_name = "Undefined"; + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + switch (self->type) { + case TRANSVR_TYPE_SFP: + type_name = STR_TRANSVR_SFP; + break; + case TRANSVR_TYPE_QSFP: + type_name = STR_TRANSVR_QSFP; + break; + case TRANSVR_TYPE_QSFP_PLUS: + type_name = STR_TRANSVR_QSFP_PLUS; + break; + case TRANSVR_TYPE_QSFP_28: + type_name = STR_TRANSVR_QSFP28; + break; + case TRANSVR_TYPE_FAKE: + type_name = "FAKE"; + goto ok_common_transvr_dump; + case TRANSVR_TYPE_UNPLUGGED: + type_name = "UNPLUGGED"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_INCONSISTENT: + type_name = "INCONSISTENT"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_ERROR: + type_name = "ERROR"; + goto err_common_transvr_dump; + + default: + type_name = "UNEXPECTED"; + goto err_common_transvr_dump; + } + printk(KERN_INFO "[SWPS] Dump %s information:\n", self->swp_name); + printk(KERN_INFO " |- :%s\n", type_name); + printk(KERN_INFO " |- :%s\n", self->vendor_name); + printk(KERN_INFO " |- :%s\n", self->vendor_pn); + printk(KERN_INFO " |- :%s\n", self->vendor_rev); + printk(KERN_INFO " |- :%s\n", self->vendor_sn); + printk(KERN_INFO " |- :0x%02x\n", self->br); + printk(KERN_INFO " |- :0x%02x\n", self->comp_rev); + printk(KERN_INFO " |- :%d\n", self->len_om1); + printk(KERN_INFO " |- :%d\n", self->len_om2); + printk(KERN_INFO " |- :%d\n", self->len_om3); + printk(KERN_INFO " |- :%d\n", self->len_om4); + return 0; + +ok_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return 0; + +err_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return -1; +} + + +int +sfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_sm); + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :0x%02x\n", self->rate_id); + return 0; +} + + +int +qsfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :Class_%d\n", __qsfp_get_power_cls(self, 0)); + return 0; +} + + +int +fake_transvr_dump(struct transvr_obj_s* self) { + + printk(KERN_INFO "[SWPS] Dump transceiver information: %s\n", self->swp_name); + printk(KERN_INFO " |- :FAKE\n"); + printk(KERN_INFO " |- :FAKE_VENDER_NAME\n"); + printk(KERN_INFO " |- :FAKE_VENDER_PN\n"); + printk(KERN_INFO " |- :FAKE_VENDER_REV\n"); + printk(KERN_INFO " |- :FAKE_VENDER_SN\n"); + printk(KERN_INFO " |- :0x99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " '- :0x99\n"); + return 0; +} + + +/* ========== Object functions for fake type ========== + */ +int +fake_transvr_update(struct transvr_obj_s *self, + int show_err){ + self->state = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +fake_get_binary(struct transvr_obj_s *self){ + return 1; +} + +int +fake_get_int(struct transvr_obj_s *self){ + return 99; +} + + +int +fake_get_hex(struct transvr_obj_s *self){ + return 0x0f; +} + + +int +fake_get_str(struct transvr_obj_s *self, char *buf) { + return snprintf(buf, 16, "fake_get_str\n"); +} + + +int +fake_set_int(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: %d\n", __func__, input); + return 0; +} + + +int +fake_set_hex(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: 0x%02x\n", __func__, input); + return 0; +} + + +/* ========== Object functions for unsupported ========== + */ +int +unsupported_get_func(struct transvr_obj_s *self){ + return ERR_TRANSVR_NOTSUPPORT; +} + + +int +unsupported_get_func2(struct transvr_obj_s *self, + char *buf_p) { + int len = snprintf(buf_p, 8, "%d\n", ERR_TRANSVR_NOTSUPPORT); + return len; +} + + +int +unsupported_set_func(struct transvr_obj_s *self, + int input_val){ + return ERR_TRANSVR_NOTSUPPORT; +} + + + +/* ========== Object functions for long term task ========== + * + * [Note] + * SWPS transceiver worker is likely the green-thread (coroutine). + * Due to resource and performance considerations. SWPS run all + * features in one kthread at the same time, and handle by it self. + */ + +/* For Transceiver Task Handling + */ +static struct transvr_worker_s * +transvr_task_get(struct transvr_obj_s *self, + char *func_name) { + + struct transvr_worker_s *curr_p = self->worker_p; + + while(curr_p != NULL){ + if (strcmp((curr_p->func_name), func_name) == 0 ) { + return curr_p; + } + curr_p = curr_p->next_p; + } + return NULL; +} + + +static struct transvr_worker_s* +transvr_task_creat(struct transvr_obj_s *self, + int (*main_task)(struct transvr_worker_s *task), + int (*post_task)(struct transvr_worker_s *task), + char *caller) { + + struct transvr_worker_s *task_p = NULL; + struct transvr_worker_s *curr_p = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check task not exist */ + task_p = transvr_task_get(self, caller); + if (task_p) { + snprintf(err_msg, sizeof(err_msg), "Task already created!"); + goto err_transvr_task_creat; + } + /* Create task worker */ + task_p = kzalloc(sizeof(struct transvr_worker_s), GFP_KERNEL); + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_transvr_task_creat; + } + /* Setup task data */ + task_p->transvr_p = self; + task_p->next_p = NULL; + task_p->trigger_time = 0; + task_p->retry = 1; + task_p->state = STATE_T_TASK_INIT; + task_p->main_task = main_task; + task_p->post_task = post_task; + task_p->p_data = NULL; + snprintf(task_p->func_name, sizeof(task_p->func_name), "%s", caller); + /* Setup Link List */ + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p->next_p != NULL) { + curr_p = curr_p->next_p; + } + curr_p->next_p = task_p; + task_p->pre_p = curr_p; + } else { + self->worker_p = task_p; + task_p->pre_p = NULL; + } + return task_p; + +err_transvr_task_creat: + SWPS_ERR("%s: %s :%s :%s\n", + __func__, err_msg, caller, self->swp_name); + return NULL; +} + + +static void +transvr_task_free_one(struct transvr_worker_s *task_p){ + + struct transvr_worker_s *pre_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (task_p) { + pre_p = task_p->pre_p; + next_p = task_p->next_p; + + if ((pre_p) && (next_p)) { + pre_p->next_p = next_p; + next_p->pre_p = pre_p; + + } else if ((!pre_p) && (next_p)) { + next_p->pre_p = NULL; + + } else if ((pre_p) && (!next_p)) { + pre_p->next_p = NULL; + + } else if ((!pre_p) && (!next_p)) { + task_p->transvr_p->worker_p = NULL; + } else { + SWPS_ERR("%s: Unexcept case!\n :%s", + __func__, task_p->transvr_p->swp_name); + } + kfree(task_p->p_data); + kfree(task_p); + } +} + + +static void +transvr_task_free_all(struct transvr_obj_s *self) { + + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p) { + next_p = curr_p->next_p; + transvr_task_free_one(curr_p); + curr_p = next_p; + } + self->worker_p = NULL; + } +} + + +static void +transvr_cache_free_all(struct transvr_obj_s *self) { + + memset(self->vendor_name, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_rev, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_pn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_sn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + self->extphy_offset = 0; +} + +static int +_transvr_task_run_main(struct transvr_worker_s *task_p) { + + int retval = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "main_task is NULL!"); + goto main_transvr_task_err; + } + if ((task_p->trigger_time) == 0){ + goto main_transvr_task_run; + } + if (time_before(jiffies, task_p->trigger_time)){ + goto main_transvr_task_wait; + } + goto main_transvr_task_run; + +main_transvr_task_run: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + task_p->retry -= 1; + } + retval = task_p->main_task(task_p); + if (retval < 0) { + if (task_p->retry > 0) { + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + } + goto main_transvr_task_identify; + +main_transvr_task_identify: + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + + case EVENT_TRANSVR_TASK_DONE: + task_p->state = STATE_T_TASK_DONE; + return EVENT_TRANSVR_TASK_DONE; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + +main_transvr_task_wait: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + +main_transvr_task_err: + task_p->state = STATE_T_TASK_FAIL; + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, retval, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_transvr_task_run_post(struct transvr_worker_s *task_p) { + + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if ((task_p->post_task) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + switch (task_p->state) { + case STATE_T_TASK_WAIT: + case STATE_T_TASK_INIT: + goto post_transvr_task_wait; + + case STATE_T_TASK_DONE: + case STATE_T_TASK_FAIL: + goto post_transvr_task_run; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Unexcept task state"); + goto post_transvr_task_err; + +post_transvr_task_run: + task_p->post_task(task_p); + return EVENT_TRANSVR_TASK_DONE; + +post_transvr_task_wait: + return EVENT_TRANSVR_TASK_WAIT; + +post_transvr_task_err: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, task_p->state, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_one(struct transvr_worker_s *task_p) { + + int retval_main = DEBUG_TRANSVR_INT_VAL; + int retval_post = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval_main = _transvr_task_run_main(task_p); + if (retval_main < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute main_task fail!"); + goto err_transvr_task_run_one; + } + retval_post = _transvr_task_run_post(task_p); + if (retval_post < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute post_task fail!"); + goto err_transvr_task_run_one; + } + return retval_main; + +err_transvr_task_run_one: + SWPS_INFO("%s: %s
:%d :%d :%s :%s\n", + __func__, err_msg, retval_main, retval_post, + task_p->func_name, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_all(struct transvr_obj_s *self) { + + int haserr = 0; + int retval = DEBUG_TRANSVR_INT_VAL; + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if ((self->worker_p) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + curr_p = self->worker_p; + while (curr_p != NULL) { + next_p = curr_p->next_p; + retval = transvr_task_run_one(curr_p); + if (curr_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + curr_p = next_p; + continue; + } + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + break; + case EVENT_TRANSVR_TASK_DONE: + transvr_task_free_one(curr_p); + break; + case EVENT_TRANSVR_TASK_FAIL: + + default: + haserr = 1; + transvr_task_free_one(curr_p); + break; + } + curr_p = next_p; + } + if (haserr) { + return EVENT_TRANSVR_TASK_FAIL; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +static void +transvr_task_set_delay(struct transvr_worker_s *task_p, + unsigned long delay_msec) { + + task_p->trigger_time = (jiffies + (delay_msec * (HZ/1000))); +} + + +static void +transvr_task_set_retry(struct transvr_worker_s *task_p, + unsigned long retry_times) { + + task_p->retry = retry_times; +} + + +/* For Transceiver Post Task + */ +int +taskfunc_post_do_nothing(struct transvr_worker_s *task_p) { + + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_post_handle_task_state(struct transvr_worker_s *task_p) { + + struct transvr_obj_s* tp = task_p->transvr_p; + + switch (task_p->state) { + case STATE_T_TASK_INIT: + case STATE_T_TASK_WAIT: + return EVENT_TRANSVR_TASK_WAIT; + + case STATE_T_TASK_DONE: + tp->state = STATE_TRANSVR_CONNECTED; + tp->send_uevent(tp, KOBJ_ADD); + return EVENT_TRANSVR_TASK_DONE; + + case STATE_T_TASK_FAIL: + tp->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_TASK_FAIL; + + default: + break; + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +/* For Transceiver Main Task + */ +int +_taskfunc_sfp_setup_soft_rs(struct transvr_worker_s *task_p, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller) { + + int show_err = 0; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_soft_rs"; + + err_code = _sfp_update_attr_soft_rs0(task_p->transvr_p, 0); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + err_code = __sfp_set_soft_rs(task_p->transvr_p, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_setup_soft_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_code); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +__taskfunc_sfp_setup_hard_rs(struct transvr_worker_s *task_p, + int input_val, + int (*get_func)(struct ioexp_obj_s *self, int virt_offset), + int (*set_func)(struct ioexp_obj_s *self, int virt_offset, int input_val)) { + + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + + err_val = get_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset); + + if (err_val < 0) { + if (err_val == ERR_IOEXP_NOTSUPPORT) { + return EVENT_TRANSVR_TASK_DONE; + } + err_str = "Get current hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + if (err_val == input_val) { + return EVENT_TRANSVR_TASK_DONE; + } + err_val = set_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_p_taskfunc_sfp_setup_hard_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_hard_rs0(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs0, + task_p->transvr_p->ioexp_obj_p->set_hard_rs0); +} + + +int +_taskfunc_sfp_setup_hard_rs1(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs1, + task_p->transvr_p->ioexp_obj_p->set_hard_rs1); +} + + +int +_taskfunc_sfp_setup_rs0(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs0"; + + err_val = _taskfunc_sfp_setup_hard_rs0(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs0, + task_p->transvr_p->eeprom_map_p->page_soft_rs0, + task_p->transvr_p->eeprom_map_p->offset_soft_rs0, + bit_shift, + &(task_p->transvr_p->soft_rs0), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs0_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs0(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_rs1(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs1"; + + err_val = _taskfunc_sfp_setup_hard_rs1(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs1, + task_p->transvr_p->eeprom_map_p->page_soft_rs1, + task_p->transvr_p->eeprom_map_p->offset_soft_rs1, + bit_shift, + &(task_p->transvr_p->soft_rs1), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs1_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs1(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_sfp_setup_SFF8431_case1(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs0(task_p, update_val); +} + + + +int +taskfunc_sfp_setup_SFF8431_case2(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs1(task_p, update_val); +} + + +int +taskfunc_sfp_setup_SFF8431_case3(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + int update_rs0 = 1; + int update_rs1 = 1; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _taskfunc_sfp_setup_rs0(task_p, update_rs0); + if (err_code < 0) { + return err_code; + } + return _taskfunc_sfp_setup_rs1(task_p, update_rs1); +} + + +int +taskfunc_sfp_handle_1g_rj45(struct transvr_worker_s *task_p) { + + /* Not all of platform support 0x56 for transceiver + * external PHY, Support list as below: + * => 1. Magnolia-PVT (PS: EVT & DVT not ready) + */ + int ext_phy_addr = 0x56; + int ext_phy_page = -1; + int ext_phy_offs = 0x11; + int ext_phy_len = 1; + int lstate_mask = 0x04; /* 00000100 */ + int show_err = 0; + int fail_retry = 5; + int fail_delay = 1000; /* msec */ + int err_code = DEBUG_TRANSVR_INT_VAL; + uint8_t detect_val = DEBUG_TRANSVR_HEX_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + int *tmp_p = NULL; + char *func_name = "taskfunc_sfp_handle_1g_rj45"; + + if (task_p->transvr_p->state != STATE_TRANSVR_CONNECTED) { + return EVENT_TRANSVR_TASK_DONE; + } + if ( (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000) && + (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000_up) ) { + goto err_taskfunc_sfp_handle_1g_rj45_1; + } + err_code = _common_update_uint8_attr(task_p->transvr_p, + ext_phy_addr, + ext_phy_page, + ext_phy_offs, + ext_phy_len, + &detect_val, + func_name, + show_err); + if ( (err_code < 0) || + (detect_val == DEBUG_TRANSVR_HEX_VAL) ) { + snprintf(err_str, sizeof(err_str), "Detect external link status fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + if ((detect_val & lstate_mask) == lstate_mask) { + goto ok_taskfunc_sfp_handle_1g_rj45_link_up; + } + goto ok_taskfunc_sfp_handle_1g_rj45_link_down; + +ok_taskfunc_sfp_handle_1g_rj45_link_up: + /* Filter out noise */ + if (!(task_p->p_data)) { + tmp_p = kzalloc(sizeof(int), GFP_KERNEL); + if (!tmp_p) { + snprintf(err_str, sizeof(err_str), "kzalloc p_data fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + *tmp_p = TRANSVR_CLASS_BASE_T_1000_up; + task_p->p_data = tmp_p; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + } + if ((*(int *)(task_p->p_data)) != TRANSVR_CLASS_BASE_T_1000_up) { + kfree(task_p->p_data); + task_p->p_data = NULL; + snprintf(err_str, sizeof(err_str), "Internal error"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + kfree(task_p->p_data); + task_p->p_data = NULL; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_link_down: + if (task_p->p_data) { + kfree(task_p->p_data); + task_p->p_data = NULL; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_done: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_1: + snprintf(err_str, sizeof(err_str), "Detect transceiver:%d not Base-T, remove task.", + task_p->transvr_p->info); + SWPS_INFO("%s: %s :%s\n", __func__, err_str, task_p->transvr_p->swp_name); + transvr_task_set_retry(task_p, 0); + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_2: + if (task_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, fail_retry); + } + if ((task_p->retry) == 0) { + /* Error case: + * => In this case, SWPS will stop external Link state monitor features + * and keeps transvr_p->info on TRANSVR_CLASS_BASE_T_1000_up. + * Upper layer will see it always Linkup that because of these type of + * transceiver has external phy, switch chip see it as Loopback transceiver. + */ + SWPS_WARN("%s can not access external PHY of Base-T SFP transceiver\n", + task_p->transvr_p->swp_name); + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + return EVENT_TRANSVR_TASK_DONE; + } else { + transvr_task_set_delay(task_p, fail_delay); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_qsfp_setup_power_mod(struct transvr_obj_s *self, + int setup_val) { + + int curr_val = DEBUG_TRANSVR_INT_VAL; + int err_val = DEBUG_TRANSVR_INT_VAL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + if (io_no_init) { + + SWPS_INFO("%s no_io_init\n",__func__); + return EVENT_TRANSVR_TASK_DONE; + } + + curr_val = self->ioexp_obj_p->get_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset); + if (curr_val < 0){ + err_msg = "Get current value fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + if (curr_val == setup_val){ + return EVENT_TRANSVR_TASK_DONE; + } + err_val = self->ioexp_obj_p->set_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset, + setup_val); + if (err_val < 0){ + err_msg = "Setup power mode fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_qsfp_setup_power_mod_1: + SWPS_INFO("%s: %s :%d :%d :%d\n", + __func__, err_msg, err_val, curr_val, setup_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_qsfp_handle_tx_disable(struct transvr_worker_s *task_p) { + + int i = 0; + int retry = 5; + int delay_ms = 100; + + if (task_p->transvr_p->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return EVENT_TRANSVR_TASK_DONE; + } + if (!_qsfp_is_implement_tx_disable(task_p->transvr_p)) { + return EVENT_TRANSVR_TASK_DONE; + } + for (i=0; itransvr_p, + task_p->transvr_p->auto_tx_disable) + == EVENT_TRANSVR_TASK_DONE) { + goto ok_taskfunc_qsfp_handle_tx_disable; + } + mdelay(delay_ms); + } + SWPS_INFO("%s auto setup tx_disable:0x%02x fail.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_INIT_FAIL; + +ok_taskfunc_qsfp_handle_tx_disable: + SWPS_INFO("%s auto setup tx_disable:0x%02x ok.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_qsfp_set_hpmod(struct transvr_worker_s *task_p) { + + int err = DEBUG_TRANSVR_INT_VAL; + int HIGH_POWER_MODE = 0; + + /* Handle power mode */ + err = _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + HIGH_POWER_MODE); + if (err < 0) { + SWPS_INFO("%s: setup hpmod fail :%d :%s\n", + __func__, err, task_p->transvr_p->swp_name); + return err; + } + /* Handle auto tx_disable + * [Note] + * => Because there are some transceiver have timing issues or + * setup sequence issues, therefore we handle auto tx_disable + * after handle power mode. + */ + mdelay(100); + return taskfunc_qsfp_handle_tx_disable(task_p); +} + + +int +taskfunc_qsfp_set_lpmod(struct transvr_worker_s *task_p) { + + int LOW_POWER_MODE = 1; + return _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + LOW_POWER_MODE); +} + + +static int +initfunc_sfp_handle_multi_rate_mode(struct transvr_obj_s *self) { + + int task_retry = 3; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "sfp_handle_multi_rate_mode"; + struct transvr_worker_s *task_p = NULL; + + switch (self->rate_id) { + case 0x00: /* Unspecified */ + case 0x03: /* Unspecified */ + case 0x05: /* Unspecified */ + case 0x07: /* Unspecified */ + case 0x09: /* Unspecified */ + case 0x0B: /* Unspecified */ + case 0x0D: /* Unspecified */ + case 0x0F: /* Unspecified */ + goto sfp_handle_multi_rate_mode_4_unspecified; + + case 0x02: /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case1, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x04: /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case2, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x06: /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case3, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x01: /* SFF-8079 (4/2/1G Rate_Select & AS0/AS1) */ + err_str = "SFF-8079 (4/2/1G Rate_Select & AS0/AS1)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x08: /* FC-PI-5 (16/8/4G Rx Rate_select only) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Rx Rate_select only)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0A: /* FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0C: /* FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + */ + err_str = "FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0E: /* 10/8G Rx and Tx Rate_Select controlling the operation or + * locking modes of the internal signal conditioner, retimer + * or CDR, according to the logic table defined in Table 10-2, + * High Bit Rate (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = + * 8.5 Gb/s. In this mode, the default value of bit 110.3 (Soft + * Rate Select RS(0), Table 9-11) and of bit 118.3 (Soft Rate + * Select RS(1), Table 10-1) is 1. + */ + err_str = "cable type: 0x0E"; + goto sfp_handle_multi_rate_mode_4_not_support; + + default: + err_str = "cable type: UNKNOW"; + goto sfp_handle_multi_rate_mode_4_not_support; + } + +sfp_handle_multi_rate_mode_4_sff8431: + if (!task_p) { + err_str = "Create task fail!"; + goto sfp_handle_multi_rate_mode_4_fail_1; + } + transvr_task_set_retry(task_p, task_retry); + return EVENT_TRANSVR_TASK_WAIT; + +sfp_handle_multi_rate_mode_4_unspecified: + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_not_support: + SWPS_INFO("%s: Does not support %s :%s :0x%02x\n", + func_str, err_str, self->swp_name, self->rate_id); + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_fail_1: + SWPS_INFO("%s: %s :%s :0x%02x, :%d\n", + func_str, err_str, self->swp_name, self->rate_id, err_code); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +initfunc_sfp_handle_1g_rj45(struct transvr_obj_s *self) { + + struct transvr_worker_s *task_p = NULL; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_sfp_handle_1g_rj45"; + + + if (self->info == TRANSVR_CLASS_BASE_T_1000) { + task_p = transvr_task_creat(self, + taskfunc_sfp_handle_1g_rj45, + taskfunc_post_do_nothing, + func_str); + if (!task_p) { + snprintf(err_str, sizeof(err_str), "Create task fail"); + goto err_initfunc_sfp_handle_1g_rj45; + } + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_initfunc_sfp_handle_1g_rj45: + SWPS_INFO("%s: %s :%s :%d\n", + __func__, err_str, self->swp_name, detect_cls); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +initfunc_qsfp_handle_power_mode(struct transvr_obj_s *self) { + + int err_code = EVENT_TRANSVR_EXCEP_INIT; + int power_class = DEBUG_TRANSVR_INT_VAL; + int hpmod_retry = 3; + int lpower_config = 1; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + unsigned long hpmod_delay = 500; /* msec */ + struct transvr_worker_s *task_p = NULL; + + /* Handle power mode for IOEXP */ + power_class = __qsfp_get_power_cls(self, 0); + switch (power_class) { + case 1: /* Case: Low power mode (Class = 1) */ + err_code = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (err_code < 0){ + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + return EVENT_TRANSVR_TASK_DONE; + + case 2: /* Case: High power mode (Class > 1) */ + case 3: + case 4: + case 5: + case 6: + case 7: + task_p = transvr_task_creat(self, + taskfunc_qsfp_set_hpmod, + taskfunc_post_handle_task_state, + "transvr_init_qsfp"); + if (!task_p) { + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + transvr_task_set_retry(task_p, hpmod_retry); + transvr_task_set_delay(task_p, hpmod_delay); + return EVENT_TRANSVR_TASK_WAIT; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Exception case"); + goto err_initfunc_qsfp_handle_power_mode; + +err_initfunc_qsfp_handle_power_mode: + SWPS_INFO("%s: %s :%s \n", __func__, err_msg, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +initfunc_qsfp28_handle_cdr(struct transvr_obj_s *self) { + + uint8_t DEFAULT_VAL_CDR = 0xff; + int CDR_FUNC_EXISTED = 0x3; + int show_err = 1; + int err_val = EVENT_TRANSVR_TASK_FAIL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_qsfp28_handle_cdr"; + + err_val = __qsfp_get_cdr_present(self, 0); + if ( (err_val < 0) || + (err_val == DEBUG_TRANSVR_HEX_VAL) ) { + err_msg = "detect cdr_present fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + if (err_val == CDR_FUNC_EXISTED) { + err_val = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->offset_cdr, + DEFAULT_VAL_CDR, + &(self->cdr), + func_str, + show_err); + if (err_val < 0) { + err_msg = "set CDR fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_qsfp_handle_cdr_1: + SWPS_INFO("%s: %s :%d :%s\n", + func_str, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + +/* ========== Object functions for Final State Machine ========== + */ +int +is_plugged(struct transvr_obj_s *self){ + + int limit = 63; + int present = DEBUG_TRANSVR_INT_VAL; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + struct ioexp_obj_s *ioexp_p = self->ioexp_obj_p; + + if (!ioexp_p) { + snprintf(emsg, limit, "ioexp_p is null!"); + goto err_is_plugged_1; + } + present = ioexp_p->get_present(ioexp_p, self->ioexp_virt_offset); + switch (present){ + case 0: + return 1; + case 1: + return 0; + case ERR_IOEXP_UNINIT: + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + default: + if (ioexp_p->state == STATE_IOEXP_INIT){ + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + } + break; + } + SWPS_INFO("%s: Exception case! :%d :%d\n", + __func__, present, ioexp_p->state); + return 0; + +err_is_plugged_1: + SWPS_DEBUG("%s: %s\n", __func__, emsg); + return 0; +} + + +static int +detect_transvr_type(struct transvr_obj_s* self){ + + int type = TRANSVR_TYPE_ERROR; + + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + type = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + + /* Case: 1. Wait transceiver I2C module. + * 2. Transceiver I2C module failure. + * Note: 1. SFF allow maximum transceiver initial time is 2 second. So, there + * are exist some case that we need to wait transceiver. + * For these case, we keeps status on "TRANSVR_TYPE_UNPLUGGED", than + * state machine will keep trace with it. + * 2. There exist some I2C failure case we need to handle. Such as user + * insert the failure transceiver, or any reason cause it abnormal. + */ + if (type < 0){ + switch (type) { + case -EIO: + SWPS_DEBUG("%s: %s smbus return:-5 (I/O error)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + case -ENXIO: + SWPS_DEBUG("%s: %s smbus return:-6 (No such device or address)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + default: + break; + } + SWPS_INFO("%s: %s unexpected smbus return:%d \n", + __func__, self->swp_name, type); + return TRANSVR_TYPE_ERROR; + } + /* Identify valid transceiver type */ + switch (type){ + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + break; + case TRANSVR_TYPE_UNKNOW_1: + case TRANSVR_TYPE_UNKNOW_2: + type = TRANSVR_TYPE_UNKNOW_2; + break; + default: + SWPS_DEBUG("%s: unknow type:0x%02x \n", __func__, type); + type = TRANSVR_TYPE_ERROR; + break; + } + return type; +} + + +static int +detect_transvr_state(struct transvr_obj_s *self, + int result[2]){ + /* [return] [result-0] [result-1] + * 0 STATE_TRANSVR_CONNECTED TRANSVR_TYPE_FAKE + * 0 STATE_TRANSVR_DISCONNECTED TRANSVR_TYPE_UNPLUGGED + * 0 STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * 0 STATE_TRANSVR_INIT / + * 0 STATE_TRANSVR_SWAPPED + * 0 STATE_TRANSVR_CONNECTED + * ERR_TRNASVR_BE_ISOLATED STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_I2C_CRASH STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_UNEXCPT STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_UNKNOW_1/2 + */ + result[0] = STATE_TRANSVR_UNEXCEPTED; /* For return state */ + result[1] = TRANSVR_TYPE_ERROR; /* For return type */ + + /* Case1: Fake type */ + if (self->type == TRANSVR_TYPE_FAKE){ + result[0] = STATE_TRANSVR_CONNECTED; + result[1] = TRANSVR_TYPE_FAKE; + return 0; + } + /* Case2: Transceiver unplugged */ + if (!is_plugged(self)){ + result[0] = STATE_TRANSVR_DISCONNECTED; + result[1] = TRANSVR_TYPE_UNPLUGGED; + return 0; + } + /* Case3: Transceiver be isolated */ + if (self->state == STATE_TRANSVR_ISOLATED){ + result[0] = STATE_TRANSVR_ISOLATED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case4: Transceiver plugged */ + result[1] = detect_transvr_type(self); + /* Case4.1: I2C topology crash + * Note : There are some I2C issues cause by transceiver/cables. + * We need to check topology status when user insert it. + * But in this step, we can't not ensure this is the issues + * port. So, it return the ERR_TRANSVR_I2C_CRASH, then upper + * layer will diagnostic I2C topology. + */ + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: %s detect I2C crash :%d\n", + __func__, self->swp_name, self->state); + result[0] = STATE_TRANSVR_UNEXCEPTED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_I2C_CRASH; + } + /* Case4.2: System initial not ready, + * Note : Sometime i2c channel or transceiver EEPROM will delay that will + * cause system in inconsistent state between EEPROM and IOEXP. + * In this case, SWP transceiver object keep state at LINK_DOWN + * to wait system ready. + * By the way, State Machine will handle these case. + */ + if (result[1] == TRANSVR_TYPE_UNPLUGGED){ + result[0] = STATE_TRANSVR_DISCONNECTED; + return 0; + } + /* Case4.3: Error transceiver type */ + if (result[1] == TRANSVR_TYPE_ERROR){ + result[0] = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s detect error type\n", __func__, self->swp_name); + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard!"); + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case3.3: Unknow transceiver type */ + if ((result[1] == TRANSVR_TYPE_UNKNOW_1) || + (result[1] == TRANSVR_TYPE_UNKNOW_2) ){ + result[0] = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + /* Case3.4: During initial process */ + if (self->state == STATE_TRANSVR_INIT){ + result[0] = STATE_TRANSVR_INIT; + return 0; + } + /* Case3.5: Transceiver be swapped */ + if (self->type != result[1]){ + result[0] = STATE_TRANSVR_SWAPPED; + return 0; + } + /* Case3.6: Link up state */ + result[0] = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +_sfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = _sfp_get_comp_extended(self); + + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_25G_AOC; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_25G_SR; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_25G_LR; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_25G_ER; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x0c: /* 25GBASE-CR CA-S */ + case 0x0d: /* 25GBASE-CR CA-N */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L1_25G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_10_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _sfp_get_comp_10g_eth_comp(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 10G Optical (x1) */ + if ((detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + } + if ((detect_val & 0x80) == 0x80) { /* 10000000 : 10GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_1g = 0x0b; + int upper_bound_1g = 0x1A; + int lower_bound_10g = 0x60; + int upper_bound_10g = 0x75; + int lower_bound_25g = 0xf0; + int upper_bound_25g = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 25G */ + if ((notmal_br >= lower_bound_25g) && + (notmal_br <= upper_bound_25g) ) { + return TRANSVR_CLASS_25G; + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + /* Check 1G */ + if ((notmal_br >= lower_bound_1g) && + (notmal_br <= upper_bound_1g) ) { + return TRANSVR_CLASS_1G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + int speed_br = DEBUG_TRANSVR_INT_VAL; + int speed_tmp = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + + speed_br = _sfp_detect_if_sp_by_br(self); + detect_val = _sfp_get_comp_1g_eth_comp(self); + + if (detect_val < 0) { + snprintf(err_str, sizeof(err_str), "Detect abnormal value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + } + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 1G (x1) */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 1000BASE-SX */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_SX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x02) == 0x02) { /* 00000010 : 1000BASE-LX *3 */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_LX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 1000BASE-CX */ + speed_tmp = TRANSVR_CLASS_COPPER_L1_1G; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + /* Case: 1000 Base-T (x1) */ + if ((detect_val & 0x08) == 0x08) { /* 00001000 : 1000BASE-T */ + return TRANSVR_CLASS_BASE_T_1000; + } + /* Case: 100 Base */ + if ( ((detect_val & 0x10) == 0x10) || /* 00010000 : 100BASE-LX/LX10 */ + ((detect_val & 0x20) == 0x20) || /* 00100000 : 100BASE-FX */ + ((detect_val & 0x40) == 0x40) || /* 01000000 : BASE-BX10 *3 */ + ((detect_val & 0x80) == 0x80) ){ /* 10000000 : BASE-PX *3 */ + return TRANSVR_CLASS_OPTICAL_100; + } + /* Case: ERROR */ + snprintf(err_str, sizeof(err_str), "Case:ERROR, value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + +ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g: + switch (speed_br) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_1G: + return speed_tmp; + case TRANSVR_CLASS_10G: + goto ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G; + } + +ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G: + switch (speed_tmp) { + case TRANSVR_CLASS_OPTICAL_1G_SX: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case TRANSVR_CLASS_OPTICAL_1G_LX: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case TRANSVR_CLASS_COPPER_L1_1G: + return TRANSVR_CLASS_COPPER_L1_10G; + default: + break; + } + snprintf(err_str, sizeof(err_str), "transfer_1to10 fail, speed:%d", speed_tmp); + goto err_p_sfp_detect_class_by_1g_ethernet; + +err_p_sfp_detect_class_by_1g_ethernet: + SWPS_INFO("%s: %s :%s", __func__, err_str, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int is_active = 0; + int conn_val = DEBUG_TRANSVR_INT_VAL; + int check_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _sfp_detect_if_sp_by_br(self); + conn_val = _sfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 */ + case 0x0d: /* MPO 2x16 */ + /* + * ToDo: Need verify Optical Pigtail + */ + goto ok_sfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + /* + * ToDo: Need check ACC use case + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x23: /* No separable connector */ + /* + * ToDo: Standard not clear, not all transceiver vendor + * have the same defined + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_check_active_passive: + check_val = _sfp_get_cable_tech(self); + switch(check_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_unknow; + case 0x04: /* Passive */ + goto ok_sfp_detect_class_by_feature_4_copper; + case 0x08: /* Active */ + is_active = 1; + goto ok_sfp_detect_class_by_feature_4_aoc; + default: + snprintf(err_msg, sizeof(err_msg), + "_sfp_get_cable_tech return Non define value:%d", + check_val); + break; + } + goto err_sfp_detect_class_by_feature_1; + +ok_sfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_25G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_25G_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_25G_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_25G_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_25G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + case TRANSVR_CLASS_1G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_1G_SX; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_1G_LX; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_1G_EX; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_1G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_sfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_OPTICAL_25G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_S_AOC; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_OPTICAL_1G_AOC; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_COPPER_L1_25G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L1_10G; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_COPPER_L1_1G; + default: + return TRANSVR_CLASS_COPPER; + } + +ok_sfp_detect_class_by_feature_4_unknow: + return TRANSVR_CLASS_UNSPECIFIED; + +err_sfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +sft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _sfp_detect_class_by_extend_comp(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 10G Compliance */ + detect_val = _sfp_detect_class_by_10_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 1G Compliance */ + detect_val = _sfp_detect_class_by_1g_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_BASE_T_1000: + case TRANSVR_CLASS_OPTICAL_100: + /* + * ToDo: Need Check 0.1G + */ + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_COPPER_L1_10G: + /* Transfer speed case + * => Example: Raycom 10G DAC + */ + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 1G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check by connector, br, wavelength */ + detect_val = _sfp_detect_class_by_feature(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_OPTICAL_1G: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_COPPER: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_COPPER_L1_10G: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined get_connector:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sft_detect_transceiver_class_1; + +err_sft_detect_transceiver_class_1: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_set_magnolia_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_magnolia_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_magnolia_if_type_1; + +err_sfp_set_magnolia_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_redwood_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SR); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_KR); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_redwood_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_redwood_if_type_1; + +err_sfp_set_redwood_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_lavender_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to 'LAV' looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_sfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = sft_detect_transvr_class(self); + switch (self->chipset_type) { + case CHIP_TYPE_MAGNOLIA: + return _sfp_set_magnolia_if_type(self, detect_cls, result); + + case CHIP_TYPE_MAPLE: + case CHIP_TYPE_REDWOOD: + case CHIP_TYPE_COTTONWOOD_LITE: + return _sfp_set_redwood_if_type(self, detect_cls, result); + + case CHIP_TYPE_LAVENDER: + return _sfp_set_lavender_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_sfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = sft_detect_transvr_class(self); + switch(detect_val) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_SP_100); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + detect_val); + goto err_sfp_detect_if_speed_1; + } + /* Check by BR */ + detect_val = _sfp_detect_if_sp_by_br(self); + switch (detect_val) { + case TRANSVR_CLASS_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + default: + break; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_detect_if_speed_1; + +err_sfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_extended(self); + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_100G_AOC; + + case 0x06: /* 100G CWDM4 */ + case 0x09: /* Obsolete (assigned before 100G CWDM4 MSA required FEC) */ + case 0x17: /* 100G CLR4 */ + case 0x1A: /* 100GE-DWDM2 */ + return TRANSVR_CLASS_OPTICAL_100G; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_100G_SR4; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_100G_LR4; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_100G_ER4; + + case 0x07: /* 100G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_100G_PSM4; + + case 0x12: /* 40G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_40G; + + case 0x11: /* 4 x 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + + case 0x10: /* 40GBASE-ER4 */ + return TRANSVR_CLASS_OPTICAL_40G_ER4; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L4_100G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_class_by_10_40_100_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_10_40_100_ethernet(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 40G Optical */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 40G Active Cable (XLPPI) */ + return TRANSVR_CLASS_OPTICAL_40G_AOC; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 40GBASE-SR4 */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + } + if ( (detect_val & 0x02) == 0x02) { /* 00000010 : 40GBASE-LR4 */ + return TRANSVR_CLASS_OPTICAL_40G_LR4; + } + if ( (detect_val & 0x08) == 0x08) { /* 00001000 : 40GBASE-CR4 */ + return TRANSVR_CLASS_COPPER_L4_40G; + } + /* Case: 10G Optical */ + if ( (detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + } + /* Case: Extend Compliance */ + if ( ((detect_val & 0x80) == 0x80) ){ /* 10000000 : Use Extend Compliance */ + return TRANSVR_CLASS_EXTEND_COMP; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_10g = 0x10; + int upper_bound_10g = 0x25; + int lower_bound_40g = 0x60; + int upper_bound_40g = 0x75; + int lower_bound_100g = 0x60; + int upper_bound_100g = 0x75; + int used_extend_br = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + int extend_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 40G */ + if ((notmal_br >= lower_bound_40g) && + (notmal_br <= upper_bound_40g) ) { + return TRANSVR_CLASS_40G; + } + /* Check 100G */ + if (notmal_br == used_extend_br) { + extend_br = (int)(self->extbr); /* updated by update_all() */ + if ((extend_br >= lower_bound_100g) && + (extend_br <= upper_bound_100g) ) { + return TRANSVR_CLASS_100G; + } + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_qsfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int conn_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _qsfp_detect_if_sp_by_br(self); + conn_val = _qsfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 (Multifiber Parallel Optic) */ + case 0x0d: /* MPO 2x16 */ + goto ok_qsfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + goto ok_qsfp_detect_class_by_feature_4_copper; + case 0x23: /* No separable connector */ + if ((_qsfp_get_comp_fc_link_length(self) > 0) || + (_qsfp_get_comp_fc_trans_tech(self) > 0) || + (_qsfp_get_comp_fc_trans_media(self) > 0) || + (_qsfp_get_comp_fc_speed(self) > 0) ) { + goto ok_qsfp_detect_class_by_feature_4_aoc; + } + goto ok_qsfp_detect_class_by_feature_4_copper; + default: + snprintf(err_msg, sizeof(err_msg), + "_qsfp_get_connector_type return Non define value:%d", + conn_val); + goto err_qsfp_detect_class_by_feature_1; + } + return TRANSVR_CLASS_UNSPECIFIED; + +ok_qsfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_100G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_100G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_100G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_100G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_100G; + + case TRANSVR_CLASS_40G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_40G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_40G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_40G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_40G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_Q_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_OPTICAL_100G_AOC; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_OPTICAL_40G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_Q_AOC; + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_COPPER_L4_100G; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_COPPER_L4_40G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L4_10G; + default: + return TRANSVR_CLASS_COPPER; + } + +err_qsfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", + __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +qsft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _qsfp_detect_class_by_extend_comp(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_COPPER_L4_100G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check 10/40G/100G Ethernet Compliance */ + detect_val = _qsfp_detect_class_by_10_40_100_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_COPPER_L4_40G: + return detect_val; + case TRANSVR_CLASS_EXTEND_COMP: + /* Format incorrect case (We already checked the Extend + * Compliance is 0 + */ + snprintf(err_msg, sizeof(err_msg), + "Transceiver format incorrect"); + goto err_qsft_detect_transvr_class_1; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10/40/100:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check by Connector type, BR and wavelength */ + detect_val = _qsfp_detect_class_by_feature(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_COPPER_L4_100G: + case TRANSVR_CLASS_COPPER_L4_40G: + case TRANSVR_CLASS_COPPER_L4_10G: + case TRANSVR_CLASS_COPPER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined connector:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), + "Can not identify!"); + goto err_qsft_detect_transvr_class_1; + +err_qsft_detect_transvr_class_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_set_magnolia_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: LR4 or LR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: /* Need Check: ER4 or ER */ + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_magnolia_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_magnolia_if_type_1; + +err_qsfp_set_magnolia_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_redwood_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_KR4); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_magnolia_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_magnolia_if_type_1; + +err_qsfp_set_magnolia_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_lavender_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to 'LAV' looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_qsfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = qsft_detect_transvr_class(self); + switch (self->chipset_type) { + case CHIP_TYPE_MAGNOLIA: + return _qsfp_set_magnolia_if_type(self, detect_cls, result); + + case CHIP_TYPE_MAPLE: + case CHIP_TYPE_REDWOOD: + return _qsfp_set_redwood_if_type(self, detect_cls, result); + + case CHIP_TYPE_LAVENDER: + return _qsfp_set_lavender_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 8; + char tmp_result[8] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = qsft_detect_transvr_class(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G Copper */ + case TRANSVR_CLASS_COPPER_L4_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + break; + /* Copper */ + case TRANSVR_CLASS_COPPER: + break; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined class case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Check br and extbr */ + detect_val = _qsfp_detect_if_sp_by_br(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + case TRANSVR_CLASS_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined BR case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_detect_if_speed_1; + +err_qsfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_common_set_lane_map_str(struct transvr_obj_s* self, + char *result) { + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + char err_msg[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_L_STR); + snprintf(result, LEN_TRANSVR_L_STR, "%s=", TRANSVR_UEVENT_KEY_LANE); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + if (tmp_val > 256) { + snprintf(err_msg, sizeof(err_msg), + "detect abnormal value:%d", tmp_val); + goto err_common_set_lane_map_str_1; + } + memset(tmp_str, 0, sizeof(tmp_str)); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_L_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_L_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_L_STR); + } + if (i == 0) { + goto err_common_set_lane_map_str_2; + } + return 0; + +err_common_set_lane_map_str_1: + SWPS_INFO("%s: %s", __func__, err_msg); +err_common_set_lane_map_str_2: + snprintf(result, LEN_TRANSVR_L_STR, "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_common_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action, + int (*detect_if_type)(struct transvr_obj_s *self, char *result), + int (*detect_if_speed)(struct transvr_obj_s *self, char *result), + int send_anyway) { + + char *uevent_envp[4]; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + char tmp_str[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_1[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_2[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_3[64] = DEBUG_TRANSVR_STR_VAL; + + if (TRANSVR_UEVENT_ENABLE != 1) { + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_get_if_lane(self, tmp_str) < 0) { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + } else { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, tmp_str); + } + switch (u_action) { + case KOBJ_ADD: + /* Detect type */ + if (detect_if_type(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface type fail!"); + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, tmp_str); + uevent_envp[0] = tmp_str_1; + /* Detect speed */ + if (detect_if_speed(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface speed fail!"); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, tmp_str); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + case KOBJ_REMOVE: + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + default: + snprintf(err_msg, sizeof(err_msg), "kobject_action:%d not support", u_action); + goto private_common_send_uevent_4_fail; + } + snprintf(err_msg, sizeof(err_msg), "%s", "Exception case"); + goto private_common_send_uevent_4_fail; + +private_common_send_uevent_4_fail: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + if (send_anyway) { + goto private_common_send_uevent_4_send; + } + return ERR_TRANSVR_UEVENT_FAIL; + +private_common_send_uevent_4_send: + return kobject_uevent_env(&(self->transvr_dev_p->kobj), + u_action, + uevent_envp); +} + +int +sfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_sfp_detect_if_type, + &_sfp_detect_if_speed, + send_anyway); +} + + +int +qsfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_qsfp_detect_if_type, + &_qsfp_detect_if_speed, + send_anyway); +} + + +int +fake_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + + int err; + int detect_result[2]; + int current_state = STATE_TRANSVR_UNEXCEPTED; + int current_type = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_NEW) { + if (_transvr_init_handler(self) < 0){ + return ERR_TRANSVR_INIT_FAIL; + } + } + err = detect_transvr_state(self, detect_result); + if (err < 0) { + return err; + } + /* In Direct mode, driver only detect transceiver when user call driver interface + * which on sysfs. So it only need consider the state of Transceiver. + */ + current_state = detect_result[0]; + current_type = detect_result[1]; + + switch (current_state){ + + case STATE_TRANSVR_DISCONNECTED: /* Transceiver is not plugged */ + self->state = current_state; + self->type = current_type; + return ERR_TRANSVR_UNPLUGGED; + + case STATE_TRANSVR_INIT: /* Transceiver is plugged, system not ready */ + return ERR_TRANSVR_UNINIT; + + case STATE_TRANSVR_ISOLATED: /* Transceiver is plugged, but has some issues */ + return ERR_TRNASVR_BE_ISOLATED; + + case STATE_TRANSVR_CONNECTED: /* Transceiver is plugged, system is ready */ + self->state = current_state; + self->type = current_type; + return 0; + + case STATE_TRANSVR_SWAPPED: /* Transceiver is plugged, system detect user changed */ + self->type = current_type; + if (reload_transvr_obj(self, current_type) < 0){ + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + self->state = current_state; + return 0; + + case STATE_TRANSVR_UNEXCEPTED: /* Transceiver type or state is unexpected case */ + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_UNEXCPT; + + default: + SWPS_INFO("%s: state:%d not in define.\n", __func__, current_state); + break; + } + return ERR_TRANSVR_UNEXCPT; +} + + +static int +_is_except_happened_4_pmode(struct transvr_obj_s* self, + int new_state) { + + int event_chk = 0; + + if (self->temp == 0){ + return 0; + } + switch (new_state) { + case STATE_TRANSVR_INIT: + event_chk = EVENT_TRANSVR_EXCEP_INIT; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_CONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_UP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_DISCONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_DOWN; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_SWAPPED: + event_chk = EVENT_TRANSVR_EXCEP_SWAP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_UNEXCEPTED: + event_chk = EVENT_TRANSVR_EXCEP_EXCEP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_ISOLATED: + event_chk = EVENT_TRANSVR_EXCEP_ISOLATED; + goto check_event_happened_4_pmode; + + default: + SWPS_INFO("%s: unexcepted case:%d\n", __func__, new_state); + break; + } + return 0; + +check_event_happened_4_pmode: + if (self->temp == event_chk){ + return 1; + } + return 0; +} + + +int +common_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + /* [Return Value]: + * ERR_TRANSVR_UNINIT : (1) Initial not ready + * ERR_TRANSVR_UNPLUGGED : (1) Any -> Down + * ERR_TRANSVR_TASK_BUSY : (1) Wait Initial task + * ERR_TRANSVR_UNEXCPT : (1) Initial fail + * (2) Task fail + * (3) Reload fail + * ERR_TRNASVR_BE_ISOLATED : (1) Already be isolated + * OK Case (return 0) : (1) action_4_connected + * (2) action_4_nothing (initial retry) + */ + int curr_state[2]; + int old_state = self->state; + int old_type = self->type; + int new_state = STATE_TRANSVR_UNEXCEPTED; + int new_type = TRANSVR_TYPE_ERROR; + int return_val = ERR_TRANSVR_UNEXCPT; + + /* Never initial */ + if (self->state == STATE_TRANSVR_NEW) { + goto comfsm_action_4_reinit_obj; + } + /* Detect current state */ + switch (detect_transvr_state(self, curr_state)) { + case 0: + new_state = curr_state[0]; + new_type = curr_state[1]; + break; + + case ERR_TRNASVR_BE_ISOLATED: + new_state = STATE_TRANSVR_ISOLATED; + new_type = old_type; + break; + + case ERR_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case ERR_TRANSVR_UNEXCPT: + default: + new_state = STATE_TRANSVR_UNEXCEPTED; + new_type = old_type; + } + /* State handling */ + switch (old_state) { + case STATE_TRANSVR_INIT: /* INIT -> */ + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 1-1: UP -> INIT */ + SWPS_INFO("Detect %s is present. :1-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 1-2: UP -> UP */ + return_val = 0; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 1-3: UP -> DOWN */ + SWPS_INFO("Detect %s is removed. :1-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 1-4: UP -> SWAP */ + SWPS_INFO("Detect %s is swapped. :1-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 1-5: UP -> UNEXPET */ + SWPS_INFO("Detect %s has error. :1-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 1-6: UP -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :1-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_DISCONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 2-1: DOWN -> INIT */ + SWPS_INFO("Detect %s is present. :2-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 2-2: DOWN -> UP */ + SWPS_INFO("Detect %s is present. :2-2\n",self->swp_name); + goto comfsm_action_4_reinit_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 2-3: DOWN -> DOWN */ + return_val = ERR_TRANSVR_UNPLUGGED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_SWAPPED: /* Case 2-4: DOWN -> SWAP */ + SWPS_INFO("Detect %s is swapped. :2-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 2-5: DOWN -> UNEXPET */ + SWPS_INFO("Detect %s has error. :2-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 2-6: DOWN -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :2-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_UNEXCEPTED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 3-1: UNEXPET -> INIT */ + SWPS_INFO("Detect %s is present. :3-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 3-2: UNEXPET -> UP */ + SWPS_INFO("Detect %s is present. :3-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 3-3: UNEXPET -> DOWN */ + SWPS_INFO("Detect %s is removed. :3-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 3-4: UNEXPET -> SWAP */ + SWPS_INFO("Detect %s is swapped. :3-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 3-5: UNEXPET -> UNEXPET */ + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRANSVR_UNEXCPT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 3-6: UNEXPET -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :3-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 4-1: ISOLATE -> INIT */ + SWPS_INFO("Detect %s internal error. :4-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 4-2: ISOLATE -> UP */ + SWPS_INFO("Detect %s internal error. :4-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 4-3: ISOLATE -> DOWN */ + SWPS_INFO("Detect %s is removed. :4-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 4-4: ISOLATE -> SWAP */ + SWPS_INFO("Detect %s internal error. :4-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 4-5: ISOLATE -> UNEXPET */ + SWPS_INFO("Detect %s internal error. :4-5\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 4-6: ISOLATE -> ISOLATE */ + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + default: + break; + } + goto comfsm_action_4_unexpected; + + default: + break; + } + goto comfsm_action_4_unexpected; + + +comfsm_action_4_keep_state: + return return_val; + +comfsm_action_4_reinit_obj: + SWPS_DEBUG("FSM action: %s re-initial.\n", self->swp_name); + return_val = _transvr_init_handler(self); + goto comfsm_action_4_identify_event; + +comfsm_action_4_reload_obj: + SWPS_DEBUG("FSM action: %s reload.\n", self->swp_name); + self->type = new_type; + return_val = reload_transvr_obj(self, new_type); + goto comfsm_action_4_identify_event; + +comfsm_action_4_identify_event: + switch (return_val) { + case EVENT_TRANSVR_INIT_UP: + case EVENT_TRANSVR_TASK_DONE: + goto comfsm_action_4_connected; + + case EVENT_TRANSVR_INIT_DOWN: + goto comfsm_action_4_disconnected; + + case EVENT_TRANSVR_INIT_REINIT: + goto comfsm_action_4_nothing; + + case EVENT_TRANSVR_TASK_WAIT: + self->state = STATE_TRANSVR_INIT; + return ERR_TRANSVR_TASK_BUSY; + + case EVENT_TRANSVR_TASK_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_TASK_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_INIT_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_INIT_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_RELOAD_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_RELOAD_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case EVENT_TRANSVR_EXCEP_ISOLATED: + goto comfsm_action_4_isolate_obj; + + default: + SWPS_INFO("%s detect undefined event:%d.\n", self->swp_name, return_val); + goto comfsm_action_4_unexpected; + } + +comfsm_action_4_nothing: + SWPS_DEBUG("FSM action: %s do nothing.\n", self->swp_name); + return 0; + +comfsm_action_4_connected: + SWPS_DEBUG("FSM action: %s Connected.\n", self->swp_name); + self->state = STATE_TRANSVR_CONNECTED; + self->type = new_type; + self->send_uevent(self, KOBJ_ADD); + _transvr_clean_retry(self); + return 0; + +comfsm_action_4_disconnected: + SWPS_DEBUG("FSM action: %s Disconnected. \n", self->swp_name); + self->state = STATE_TRANSVR_DISCONNECTED; + self->temp = EVENT_TRANSVR_TASK_DONE; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_retry(self); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNPLUGGED; + +comfsm_action_4_report_i2c_crash: + SWPS_DEBUG("FSM action: %s report I2C crash.\n", self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_I2C_CRASH; + +comfsm_action_4_isolate_obj: + SWPS_DEBUG("FSM action: %s isolate.\n", self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return ERR_TRNASVR_BE_ISOLATED; + +comfsm_action_4_unexpected: + SWPS_INFO("FSM action: %s unexpected.\n", self->swp_name); + SWPS_INFO("Dump: :%d :0x%02x :%d :0x%02x\n", + old_state, old_type, new_state, new_type); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNEXCPT; +} + + +int +fake_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +int +fake_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +/* ========== Object functions for Initial procedure ========== + */ +int +transvr_init_common(struct transvr_obj_s *self){ + /* Nothing to update */ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_fake(struct transvr_obj_s *self){ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_sfp(struct transvr_obj_s *self){ + + int tmp_val = DEBUG_TRANSVR_INT_VAL; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_msg = "ERR"; + + self->info = sft_detect_transvr_class(self); + /* Disable auto_config */ + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + /* Handle multi-rate */ + err_code = initfunc_sfp_handle_multi_rate_mode(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_multi_rate_mode fail!"; + goto err_transvr_init_sfp_1; + } + /* Handle 1G- RJ45 */ + tmp_val = err_code; + err_code = initfunc_sfp_handle_1g_rj45(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_1g_rj45 fail!"; + goto err_transvr_init_sfp_1; + } + tmp_val = (tmp_val > err_code ? tmp_val : err_code); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_sfp_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_code, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp(struct transvr_obj_s *self){ + + int err = EVENT_TRANSVR_EXCEP_EXCEP; + char *emsg = "ERR"; + + self->info = qsft_detect_transvr_class(self); + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + err = initfunc_qsfp_handle_power_mode(self); + if (err < 0){ + emsg = "initfunc_qsfp_handle_tx_disable fail!"; + goto err_transvr_init_qsfp; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, emsg, err, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp28(struct transvr_obj_s *self){ + + int tmp_val = EVENT_TRANSVR_EXCEP_EXCEP; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_msg = "ERR"; + + /* Handle QSFP common */ + err_val = transvr_init_qsfp(self); + if (err_val < 0){ + err_msg = "transvr_init_qsfp fail!"; + goto err_transvr_init_qsfp28_1; + } + /* Disable auto_config */ + if (!self->auto_config) { + return err_val; + } + /* Handle CDR */ + tmp_val = err_val; + err_val = initfunc_qsfp28_handle_cdr(self); + if (err_val < 0){ + err_msg = "Handle CDR fail!"; + goto err_transvr_init_qsfp28_1; + } + tmp_val = (tmp_val > err_val ? tmp_val : err_val); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp28_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object Initial handler ========== + */ +static int +_is_transvr_valid(struct transvr_obj_s *self, + int type, + int state) { + /* [Return] + * 0 : OK, inserted + * EVENT_TRANSVR_INIT_DOWN : OK, removed + * EVENT_TRANSVR_INIT_FAIL : Outside error, type doesn't supported + * EVENT_TRANSVR_EXCEP_INIT : Internal error, state undefined + */ + switch (type) { + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + break; + default: + SWPS_INFO("detect undefined type:0x%02x on %s\n", + type, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; + } + switch (state) { + case STATE_TRANSVR_DISCONNECTED: + return EVENT_TRANSVR_INIT_DOWN; + case STATE_TRANSVR_INIT: + case STATE_TRANSVR_CONNECTED: + case STATE_TRANSVR_SWAPPED: + break; + default: + SWPS_INFO("detect undefined state:%d on %s\n", + state, self->swp_name); + return EVENT_TRANSVR_EXCEP_INIT; + } + return 0; +} + + +static int +_is_transvr_hw_ready(struct transvr_obj_s *self, + int type){ + /* [Return] + * EVENT_TRANSVR_TASK_DONE : Ready + * EVENT_TRANSVR_TASK_WAIT : Not ready + * EVENT_TRANSVR_INIT_FAIL : Error + */ + int addr = DEBUG_TRANSVR_INT_VAL; + int page = DEBUG_TRANSVR_INT_VAL; + int offs = DEBUG_TRANSVR_INT_VAL; + int bit = DEBUG_TRANSVR_INT_VAL; + int ready = DEBUG_TRANSVR_INT_VAL; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t ab_val = DEBUG_TRANSVR_HEX_VAL; + + switch (type) { + case TRANSVR_TYPE_SFP: + addr = VAL_TRANSVR_8472_READY_ADDR; + page = VAL_TRANSVR_8472_READY_PAGE; + offs = VAL_TRANSVR_8472_READY_OFFSET; + bit = VAL_TRANSVR_8472_READY_BIT; + ready = VAL_TRANSVR_8472_READY_VALUE; + ab_val = VAL_TRANSVR_8472_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + addr = VAL_TRANSVR_8436_READY_ADDR; + page = VAL_TRANSVR_8436_READY_PAGE; + offs = VAL_TRANSVR_8436_READY_OFFSET; + bit = VAL_TRANSVR_8436_READY_BIT; + ready = VAL_TRANSVR_8436_READY_VALUE; + ab_val = VAL_TRANSVR_8436_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + return EVENT_TRANSVR_TASK_DONE; + + default: + emsg = "unexpected case"; + goto err_is_transvr_hw_ready; + } + /* Select target page */ + err = _common_setup_page(self, addr, page, offs, 1, 0); + if (err < 0) { + emsg = "setup page fail"; + goto err_is_transvr_hw_ready; + } + /* Check feature supported + * [Note] + * Some of transceiver/cables doesn't support "Status Indicators" + * (ex:DAC, RJ45 copper SFP ...etc). In these case, we bypass the + * step of checking Status Indicators, then state machine will take + * the following handle procedure. + */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (err < 0) { + emsg = "doesn't support Status Indicators"; + goto bypass_is_transvr_hw_ready; + } + /* Filter abnormal case */ + if (err == ab_val) { + emsg = "detect using unusual definition."; + goto bypass_is_transvr_hw_ready; + } + /* Get Status Indicators */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, offs); + if (err < 0) { + emsg = "detect current value fail"; + goto err_is_transvr_hw_ready; + } + + if ((err & (1<:%d\n", __func__, emsg, type); + return EVENT_TRANSVR_TASK_DONE; + +err_is_transvr_hw_ready: + SWPS_DEBUG("%s: %s :%d\n", __func__, emsg, type); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self) { + + switch (self->info) { + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return 1; + default: + break; + } + return 0; +} + + +static int +_transvr_init_handler(struct transvr_obj_s *self){ + + int detect[2]; + int d_state = STATE_TRANSVR_UNEXCEPTED; + int d_type = TRANSVR_TYPE_ERROR; + int result = ERR_TRANSVR_UNINIT; + int retry = 6; /* (6+1) x 0.3 = 2.1s > spec:2.0s */ + int elimit = 63; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Clean and check callback */ + self->state = STATE_TRANSVR_INIT; + if (self->init == NULL) { + snprintf(emsg, elimit, "init() is null"); + goto initer_err_case_unexcept_0; + } + if (self->clean == NULL) { + snprintf(emsg, elimit, "clean() is null"); + goto initer_err_case_unexcept_0; + } + self->clean(self); + + /* Detect transceiver information */ + result = detect_transvr_state(self, detect); + if (result < 0) { + snprintf(emsg, elimit, "detect_transvr_state() fail"); + switch (result) { + case ERR_TRANSVR_I2C_CRASH: + goto initer_err_case_i2c_ceash; + case ERR_TRNASVR_BE_ISOLATED: + goto initer_err_case_be_isolated; + + case ERR_TRANSVR_UNEXCPT: + default: + break; + } + goto initer_err_case_retry_1; + } + d_state = detect[0]; + d_type = detect[1]; + + /* Verify transceiver type and state */ + switch (_is_transvr_valid(self, d_type, d_state)) { + case 0: + break; + case EVENT_TRANSVR_INIT_DOWN: + goto initer_ok_case_down;; + case EVENT_TRANSVR_INIT_FAIL: + snprintf(emsg, elimit, "transceiver type doesn't support"); + goto initer_err_case_alarm_to_user; + case EVENT_TRANSVR_EXCEP_INIT: + default: + goto initer_err_case_unexcept_1; + } + + /* Handle reload case */ + if (self->type != d_type){ + /* This is the protect mechanism. Normally, This case will not happen. + * When State machine detect swap event during initial, It will trigger + * reload function to ensure type correct. */ + if (_reload_transvr_obj(self, d_type) < 0){ + snprintf(emsg, elimit, "reload object fail"); + goto initer_err_case_unexcept_1; + } + } + + /* Check transceiver HW initial ready */ + switch (_is_transvr_hw_ready(self, d_type)) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_err_case_retry_1; + case EVENT_TRANSVR_INIT_FAIL: + default: + goto initer_err_case_unexcept_1; + } + + /* Try to update all and check */ + if (self->update_all(self, 1) < 0){ + /* For some transceiver, EEPROME has lag issues during initial stage. + * In this case, we set status back to STATE_TRANSVR_NEW, than it will + * be checked in next polling cycle. */ + goto initer_err_case_retry_1; + } + + /* Execute init() call back */ + result = self->init(self); + switch (result) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_ok_case_wait; + + default: + snprintf(emsg, elimit, "undefined init() return:%d\n", result); + goto initer_err_case_unexcept_1; + } + goto initer_ok_case_up; + + +initer_ok_case_wait: + self->dump_all(self); + return EVENT_TRANSVR_TASK_WAIT; + +initer_ok_case_up: + self->state = STATE_TRANSVR_CONNECTED; + self->temp = 0; + self->dump_all(self); + return EVENT_TRANSVR_INIT_UP; + +initer_ok_case_down: + self->temp = 0; + self->state = STATE_TRANSVR_DISCONNECTED; + return EVENT_TRANSVR_INIT_DOWN; + +initer_err_case_i2c_ceash: + SWPS_DEBUG("%s: %s :%s :I2C crash\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_I2C_CRASH; + +initer_err_case_be_isolated: + SWPS_DEBUG("%s: %s :%s :isolated\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return EVENT_TRANSVR_EXCEP_ISOLATED; + +initer_err_case_retry_1: + SWPS_DEBUG("%s: %s :%s :retry\n", + __func__, emsg, self->swp_name); + if (_transvr_handle_retry(self, retry) == 0) { + self->state = STATE_TRANSVR_NEW; + return EVENT_TRANSVR_INIT_REINIT; + } + goto initer_err_case_alarm_to_user; + +initer_err_case_unexcept_1: + self->clean(self); +initer_err_case_unexcept_0: + self->state = STATE_TRANSVR_UNEXCEPTED; + if (_is_except_happened_4_pmode(self, d_state) && + (self->mode == TRANSVR_MODE_POLLING) ){ + SWPS_INFO("%s: %s :%s\n", __func__, emsg, self->swp_name); + SWPS_INFO("Dump: :%d :%d :%d :%d\n", + self->state, self->type, d_state, d_type); + } + return EVENT_TRANSVR_INIT_FAIL; + +initer_err_case_alarm_to_user: + SWPS_DEBUG("%s: %s :%s :alarm_to_user\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard"); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object functions for Clean procedure ========== + */ +int +_transvr_clean_handler(struct transvr_obj_s *self){ + + int retval = DEBUG_TRANSVR_INT_VAL; + + if (!self->clean) { + SWPS_ERR("%s: %s clean() is NULL.\n", + __func__, self->swp_name); + return EVENT_TRANSVR_TASK_FAIL; + } + retval = self->clean(self); + if (retval != EVENT_TRANSVR_TASK_DONE){ + SWPS_ERR("%s: %s clean() fail. [ERR]:%d\n", + __func__, self->swp_name, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_transvr_clean(struct transvr_obj_s *self){ + + transvr_task_free_all(self); + transvr_cache_free_all(self); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +qsfp_transvr_clean(struct transvr_obj_s *self){ + + int retval; + int lpower_config = 1; + + retval = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (retval < 0){ + SWPS_ERR("%s: Set lpmod fail! :%d\n", + __func__, retval); + return retval; + } + retval = common_transvr_clean(self); + if (retval < 0){ + SWPS_ERR("%s: common_transvr_clean fail! :%d\n", + __func__, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +fake_transvr_clean(struct transvr_obj_s *self){ + + return EVENT_TRANSVR_TASK_DONE; +} + + +/* ========== Object functions for check and update ========== + */ +int +common_transvr_check(struct transvr_obj_s *self){ + + char fun_str[32] = "common_transvr_check"; + + if (self->mode != TRANSVR_MODE_POLLING) { + SWPS_ERR("%s: mode:%d is not TRANSVR_MODE_POLLING\n", + fun_str, self->mode); + return ERR_TRANSVR_UNEXCPT; + } + /* Trigger delay task */ + transvr_task_run_all(self); + /* Trigger state machine to check and update */ + return self->fsm_4_polling(self, fun_str); +} + + +int +fake_transvr_check(struct transvr_obj_s *self){ + return 0; +} + + +/* ========== Functions for Factory pattern ========== + */ +static int +setup_transvr_public_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = unsupported_get_func; + self->get_br = common_get_br; + self->get_len_sm = sfp_get_len_sm; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = sfp_get_comp_eth_1; + self->get_comp_eth_10 = sfp_get_comp_eth_10; + self->get_comp_eth_10_40 = unsupported_get_func; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = sfp_get_rate_id; + self->get_soft_rs0 = sfp_get_soft_rs0; + self->get_soft_rs1 = sfp_get_soft_rs1; + self->get_info = common_get_info; + self->get_if_type = sfp_get_if_type; + self->get_if_speed = sfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = sfp_get_transvr_temp; + self->get_curr_vol = sfp_get_transvr_voltage; + self->get_soft_rx_los = unsupported_get_func2; + self->get_soft_tx_disable = unsupported_get_func2; + self->get_soft_tx_fault = unsupported_get_func2; + self->get_auto_tx_disable = unsupported_get_func2; + self->get_tx_bias = sfp_get_transvr_tx_bias; + self->get_tx_power = sfp_get_transvr_tx_power; + self->get_rx_power = sfp_get_transvr_rx_power; + self->get_tx_eq = sfp_get_transvr_tx_eq; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = sfp_get_transvr_rx_em; + self->get_wavelength = sfp_get_wavelength; + self->get_extphy_offset = sfp_get_1g_rj45_extphy_offset; + self->get_extphy_reg = sfp_get_1g_rj45_extphy_reg; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = sfp_set_soft_rs0; + self->set_soft_rs1 = sfp_set_soft_rs1; + self->set_soft_tx_disable = unsupported_set_func; + self->set_auto_tx_disable = unsupported_set_func; + self->set_tx_eq = sfp_set_tx_eq; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = sfp_set_rx_em; + self->set_extphy_offset = sfp_set_1g_rj45_extphy_offset; + self->set_extphy_reg = sfp_set_1g_rj45_extphy_reg; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = unsupported_get_func2; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = unsupported_get_func2; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = unsupported_set_func; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = unsupported_set_func; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = qsfp_get_cdr; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = qsfp_get_transvr_tx_eq; + self->get_rx_am = qsfp_get_transvr_rx_am; + self->get_rx_em = qsfp_get_transvr_rx_em; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->set_cdr = qsfp_set_cdr; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = qsfp_set_tx_eq; + self->set_rx_am = qsfp_set_rx_am; + self->set_rx_em = qsfp_set_rx_em; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_FAKE: + self->get_id = fake_get_hex; + self->get_ext_id = fake_get_hex; + self->get_connector = fake_get_hex; + self->get_vendor_name = fake_get_str; + self->get_vendor_pn = fake_get_str; + self->get_vendor_rev = fake_get_str; + self->get_vendor_sn = fake_get_str; + self->get_power_cls = fake_get_int; + self->get_br = fake_get_hex; + self->get_len_sm = fake_get_int; + self->get_len_smf = fake_get_int; + self->get_len_om1 = fake_get_int; + self->get_len_om2 = fake_get_int; + self->get_len_om3 = fake_get_int; + self->get_len_om4 = fake_get_int; + self->get_comp_rev = fake_get_hex; + self->get_comp_eth_1 = fake_get_hex; + self->get_comp_eth_10 = fake_get_hex; + self->get_comp_eth_10_40 = fake_get_hex; + self->get_comp_extend = fake_get_hex; + self->get_cdr = fake_get_hex; + self->get_rate_id = fake_get_hex; + self->get_soft_rs0 = fake_get_binary; + self->get_soft_rs1 = fake_get_binary; + self->get_info = fake_get_int; + self->get_if_type = fake_get_str; + self->get_if_speed = fake_get_str; + self->get_if_lane = fake_get_str; + self->get_curr_temp = fake_get_str; + self->get_curr_vol = fake_get_str; + self->get_soft_rx_los = fake_get_str; + self->get_soft_tx_disable = fake_get_str; + self->get_soft_tx_fault = fake_get_str; + self->get_auto_tx_disable = fake_get_str; + self->get_tx_bias = fake_get_str; + self->get_tx_power = fake_get_str; + self->get_rx_power = fake_get_str; + self->get_tx_eq = fake_get_str; + self->get_rx_am = fake_get_str; + self->get_rx_em = fake_get_str; + self->get_wavelength = fake_get_str; + self->get_extphy_offset = fake_get_str; + self->get_extphy_reg = fake_get_str; + self->set_cdr = fake_set_hex; + self->set_soft_rs0 = fake_set_int; + self->set_soft_rs1 = fake_set_int; + self->set_soft_tx_disable = fake_set_int; + self->set_auto_tx_disable = fake_set_int; + self->set_tx_eq = fake_set_int; + self->set_rx_am = fake_set_int; + self->set_rx_em = fake_set_int; + self->set_extphy_offset = fake_set_hex; + self->set_extphy_reg = fake_set_hex; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_transvr_private_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->init = transvr_init_sfp; + self->clean = common_transvr_clean; + self->check = common_transvr_check; + self->update_all = _sfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = sfp_send_uevent; + self->dump_all = sfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->init = transvr_init_qsfp; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->init = transvr_init_qsfp28; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_FAKE: + self->init = transvr_init_fake; + self->clean = fake_transvr_clean; + self->check = fake_transvr_check; + self->update_all = fake_transvr_update; + self->fsm_4_direct = fake_fsm_4_direct_mode; + self->fsm_4_polling = fake_fsm_4_polling_mode; + self->send_uevent = fake_send_uevent; + self->dump_all = fake_transvr_dump; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static struct eeprom_map_s * +get_eeprom_map(int transvr_type){ + + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + return &eeprom_map_sfp; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + return &eeprom_map_qsfp; + case TRANSVR_TYPE_QSFP_28: + return &eeprom_map_qsfp28; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return NULL; +} + + +static int +setup_transvr_ssize_attr(char *swp_name, + struct transvr_obj_s *self, + struct eeprom_map_s *map_p, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int chan_id, + int run_mode){ + switch (run_mode){ + case TRANSVR_MODE_DIRECT: /* Direct access device mode */ + case TRANSVR_MODE_POLLING: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = DEBUG_TRANSVR_INT_VAL; + return -1; + } + self->eeprom_map_p = map_p; + self->ioexp_obj_p = ioexp_obj_p; + self->ioexp_virt_offset = ioexp_virt_offset; + self->chan_id = chan_id; + self->layout = transvr_type; + self->type = transvr_type; + self->chipset_type = chipset_type; + self->state = STATE_TRANSVR_NEW; + self->info = STATE_TRANSVR_NEW; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + strncpy(self->swp_name, swp_name, 32); + mutex_init(&self->lock); + return 0; +} + + +static int +setup_transvr_dsize_attr(struct transvr_obj_s *self){ + + char *emsg = DEBUG_TRANSVR_STR_VAL; + + self->vendor_name = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_name){ + emsg = "vendor_name"; + goto err_setup_d_attr; + } + self->vendor_pn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_pn){ + emsg = "vendor_pn"; + goto err_setup_d_attr; + } + self->vendor_rev = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_rev){ + emsg = "vendor_rev"; + goto err_setup_d_attr; + } + self->vendor_sn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_sn){ + emsg = "vendor_sn"; + goto err_setup_d_attr; + } + self->worker_p = NULL; + return 0; + +err_setup_d_attr: + SWPS_ERR("%s: %s kzalloc fail!", __func__, emsg); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_i2c_client(struct transvr_obj_s *self){ + + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + adap = i2c_get_adapter(self->chan_id); + if(!adap){ + snprintf(err_msg, sizeof(err_msg), + "can not get adap:%d", self->chan_id); + goto err_setup_i2c_client; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + snprintf(err_msg, sizeof(err_msg), + "can not kzalloc client:%d", self->chan_id); + goto err_setup_i2c_client; + } + client->adapter = adap; + self->i2c_client_p = client; + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return ERR_TRANSVR_UNEXCPT; +} + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode){ + + struct transvr_obj_s *result_p; + struct eeprom_map_s *map_p; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Allocate transceiver object */ + map_p = get_eeprom_map(transvr_type); + if (!map_p){ + snprintf(err_msg, sizeof(err_msg), + "Invalid transvr_type:%d", transvr_type); + goto err_create_transvr_fail; + } + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_create_transvr_fail; + } + /* Prepare static size attributes */ + if (setup_transvr_ssize_attr(swp_name, + result_p, + map_p, + ioexp_obj_p, + ioexp_virt_offset, + transvr_type, + chipset_type, + chan_id, + run_mode) < 0){ + goto err_create_transvr_sattr_fail; + } + /* Prepare dynamic size attributes */ + if (setup_transvr_dsize_attr(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_public_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_private_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare i2c client object */ + if (setup_i2c_client(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + return result_p; + +err_create_transvr_dattr_fail: + kfree(result_p->vendor_sn); + kfree(result_p->vendor_rev); + kfree(result_p->vendor_pn); + kfree(result_p->vendor_name); +err_create_transvr_sattr_fail: + kfree(result_p); +err_create_transvr_fail: + SWPS_ERR("%s: %s :%d :%d :%d\n", + __func__, err_msg, chan_id, ioexp_virt_offset, transvr_type); + return NULL; +} +EXPORT_SYMBOL(create_transvr_obj); + + +static int +_reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + struct eeprom_map_s *new_map_p; + struct eeprom_map_s *old_map_p = self->eeprom_map_p; + struct i2c_client *old_i2c_p = self->i2c_client_p; + int old_type = self->type; + + /* Change state to STATE_TRANSVR_INIT */ + self->state = STATE_TRANSVR_INIT; + self->type = new_type; + /* Replace EEPROME map */ + new_map_p = get_eeprom_map(new_type); + if (!new_map_p){ + goto err_private_reload_func_1; + } + self->eeprom_map_p = new_map_p; + /* Reload i2c client */ + if (setup_i2c_client(self) < 0){ + goto err_private_reload_func_2; + } + /* Replace call back functions */ + if (setup_transvr_public_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + if (setup_transvr_private_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + if(old_i2c_p){ + i2c_put_adapter(old_i2c_p->adapter); + } + kfree(old_i2c_p); + return 0; + +err_private_reload_func_3: + SWPS_INFO("%s: init() fail!\n", __func__); + if(old_i2c_p){ + i2c_put_adapter(old_i2c_p->adapter); + } + kfree(old_i2c_p); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return -2; + +err_private_reload_func_2: + self->eeprom_map_p = old_map_p; + self->i2c_client_p = old_i2c_p; +err_private_reload_func_1: + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = old_type; + SWPS_INFO("%s fail! :0x%02x\n", __func__, new_type); + return -1; +} + + +static int +reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + int result_val = ERR_TRANSVR_UNEXCPT; + + /* Reload phase */ + result_val = _reload_transvr_obj(self, new_type); + if (result_val < 0){ + SWPS_INFO("%s: reload phase fail! :%d\n", + __func__, result_val); + return EVENT_TRANSVR_RELOAD_FAIL; + } + /* Initial phase */ + result_val = _transvr_init_handler(self); + if (result_val < 0){ + SWPS_INFO("%s: initial phase fail! :%d\n", + __func__, result_val); + } + return result_val; +} + + +int +isolate_transvr_obj(struct transvr_obj_s *self) { + + self->state = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s be isolated\n", __func__, self->swp_name); + return 0; +} +EXPORT_SYMBOL(isolate_transvr_obj); + + +int +resync_channel_tier_2(struct transvr_obj_s *self) { + + int val = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_ISOLATED) { + return 0; + } + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + val = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (val < 0) { + return -1; + } + return 0; +} +EXPORT_SYMBOL(resync_channel_tier_2); + +/* For build single module using (Ex: ONL platform) */ +MODULE_LICENSE("GPL"); + + +/* ----------------------------------------- + * ToDo List + * ----------------------------------------- + * 1. _sfp_detect_class_by_feature() + * => Need check ACC use case. + * 2. _sfp_detect_class_by_1g_ethernet() + * => Need check 0.1G use case. + * 3. Loopback transceiver use case. + * => Less much data + * 4. _qsfp_detect_class_by_extend_comp() + * => Verify 100G CWDM4 + * => Verify Obsolete (assigned before 100G CWDM4 MSA required FEC) + * => Verify 100G CLR4 + * => Verify 100GE-DWDM2 + * => Verify 40G PSM4 Parallel SMF + * => Verify 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. + * => Verify 100G ACC or 25GAUI C2M ACC. + * => Verify 25GBASE-LR + * => Verify 40G Active Cable (XLPPI) + */ + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/transceiver.h b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/transceiver.h new file mode 100644 index 00000000000..86bc9be8627 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/modules/transceiver.h @@ -0,0 +1,811 @@ +#ifndef TRANSCEIVER_H +#define TRANSCEIVER_H + +#include + +/* advanced features control */ +#define TRANSVR_INFO_DUMP_ENABLE (1) +#define TRANSVR_INFO_CACHE_ENABLE (1) +#define TRANSVR_UEVENT_ENABLE (1) + +/* Transceiver type define */ +#define TRANSVR_TYPE_UNKNOW_1 (0x00) +#define TRANSVR_TYPE_UNKNOW_2 (0xff) +#define TRANSVR_TYPE_SFP (0x03) /* Define for SFP, SFP+, SFP28 */ +#define TRANSVR_TYPE_QSFP (0x0c) +#define TRANSVR_TYPE_QSFP_PLUS (0x0d) +#define TRANSVR_TYPE_QSFP_28 (0x11) +#define TRANSVR_TYPE_UNPLUGGED (0xfa) /* Define for ERROR handle */ +#define TRANSVR_TYPE_FAKE (0xfc) /* Define for ERROR handle */ +#define TRANSVR_TYPE_INCONSISTENT (0xfd) /* Define for ERROR handle */ +#define TRANSVR_TYPE_ERROR (0xfe) /* Define for ERROR handle */ + +/* Transceiver class for base info */ +#define TRANSVR_CLASS_UNSPECIFIED (0) +#define TRANSVR_CLASS_ERROR (-26001) +#define TRANSVR_CLASS_1G (26001) +#define TRANSVR_CLASS_10G (26011) +#define TRANSVR_CLASS_25G (26021) +#define TRANSVR_CLASS_40G (26041) +#define TRANSVR_CLASS_100G (26101) +#define TRANSVR_CLASS_NO_SPERARABLE (26901) +#define TRANSVR_CLASS_EXTEND_COMP (26902) +/* Transceiver class for Optical 1G */ +#define TRANSVR_CLASS_OPTICAL (27000) +#define TRANSVR_CLASS_OPTICAL_100 (27001) +#define TRANSVR_CLASS_OPTICAL_1G (27002) +#define TRANSVR_CLASS_OPTICAL_1G_AOC (27003) +#define TRANSVR_CLASS_OPTICAL_1G_SX (27004) +#define TRANSVR_CLASS_OPTICAL_1G_LX (27005) +#define TRANSVR_CLASS_OPTICAL_1G_EX (27006) +/* Transceiver class for Optical 10G */ +#define TRANSVR_CLASS_OPTICAL_10G (27010) +#define TRANSVR_CLASS_OPTICAL_10G_S_AOC (27011) +#define TRANSVR_CLASS_OPTICAL_10G_S_SR (27012) +#define TRANSVR_CLASS_OPTICAL_10G_S_LR (27013) +#define TRANSVR_CLASS_OPTICAL_10G_S_ER (27014) +#define TRANSVR_CLASS_OPTICAL_10G_Q_AOC (27015) +#define TRANSVR_CLASS_OPTICAL_10G_Q_SR (27016) +#define TRANSVR_CLASS_OPTICAL_10G_Q_LR (27017) +#define TRANSVR_CLASS_OPTICAL_10G_Q_ER (27018) +/* Transceiver class for Optical 25G */ +#define TRANSVR_CLASS_OPTICAL_25G (27020) +#define TRANSVR_CLASS_OPTICAL_25G_AOC (27021) +#define TRANSVR_CLASS_OPTICAL_25G_SR (27022) +#define TRANSVR_CLASS_OPTICAL_25G_LR (27023) +#define TRANSVR_CLASS_OPTICAL_25G_ER (27024) +/* Transceiver class for Optical 40G */ +#define TRANSVR_CLASS_OPTICAL_40G (27040) +#define TRANSVR_CLASS_OPTICAL_40G_AOC (27041) +#define TRANSVR_CLASS_OPTICAL_40G_SR4 (27042) +#define TRANSVR_CLASS_OPTICAL_40G_LR4 (27043) +#define TRANSVR_CLASS_OPTICAL_40G_ER4 (27044) +/* Transceiver class for Optical 100G */ +#define TRANSVR_CLASS_OPTICAL_100G (27100) +#define TRANSVR_CLASS_OPTICAL_100G_AOC (27101) +#define TRANSVR_CLASS_OPTICAL_100G_SR4 (27102) +#define TRANSVR_CLASS_OPTICAL_100G_LR4 (27103) +#define TRANSVR_CLASS_OPTICAL_100G_ER4 (27104) +#define TRANSVR_CLASS_OPTICAL_100G_PSM4 (27105) +/* Transceiver class for Copper */ +#define TRANSVR_CLASS_COPPER (28000) +#define TRANSVR_CLASS_COPPER_L1_1G (28001) +#define TRANSVR_CLASS_COPPER_L1_10G (28011) +#define TRANSVR_CLASS_COPPER_L4_10G (28012) +#define TRANSVR_CLASS_COPPER_L1_25G (28021) +#define TRANSVR_CLASS_COPPER_L4_40G (28041) +#define TRANSVR_CLASS_COPPER_L4_100G (28101) +/* Transceiver class for Base-T */ +#define TRANSVR_CLASS_BASE_T_1000 (29001) +#define TRANSVR_CLASS_BASE_T_1000_up (29002) +/* For uevent message */ +#define TRANSVR_UEVENT_KEY_IF "IF_TYPE" +#define TRANSVR_UEVENT_KEY_SP "IF_SPEED" +#define TRANSVR_UEVENT_KEY_LANE "IF_LANE" +#define TRANSVR_UEVENT_UNKNOW "UNKNOW" +#define TRANSVR_IF_KR "KR" +#define TRANSVR_IF_KR4 "KR4" +#define TRANSVR_IF_SR "SR" +#define TRANSVR_IF_SR4 "SR4" +#define TRANSVR_IF_SFI "SFI" +#define TRANSVR_IF_IF_GMII "GMII" +#define TRANSVR_IF_IF_XGMII "XGMII" +#define TRANSVR_IF_SP_100 "100" +#define TRANSVR_IF_SP_1G "1000" +#define TRANSVR_IF_SP_10G "10000" +#define TRANSVR_IF_SP_25G "25000" +#define TRANSVR_IF_SP_40G "40000" +#define TRANSVR_IF_SP_100G "100000" + +/* Transceiver mode define */ +#define TRANSVR_MODE_DIRECT (21000) +#define TRANSVR_MODE_POLLING (21001) + +/* Transceiver state define + * [Note] + * 1. State is used to represent the state of "Transceiver" and "Object". + * 2. State for different target has different means. The description as following: + */ +#define STATE_TRANSVR_CONNECTED (0) /* [Transvr]:Be plugged in. [Obj]:Link up, and work normally. */ +#define STATE_TRANSVR_NEW (-100) /* [Transvr]:(Not used) [Obj]:Create */ +#define STATE_TRANSVR_INIT (-101) /* [Transvr]:Be plugged in. [Obj]:Link up, and in initial process. */ +#define STATE_TRANSVR_ISOLATED (-102) /* [Transvr]:Be plugged in. [Obj]:Isolate, and not provide service. */ +#define STATE_TRANSVR_SWAPPED (-200) /* [Transvr]:Be plugged in. [Obj]:(Not used) */ +#define STATE_TRANSVR_DISCONNECTED (-300) /* [Transvr]:Un-plugged. [Obj]:Link down, and not provide service. */ +#define STATE_TRANSVR_UNEXCEPTED (-901) /* [Transvr]:Any [Obj]:Any, and not in expect case. */ + +/* Task state define */ +#define STATE_T_TASK_WAIT (110) +#define STATE_T_TASK_DONE (0) +#define STATE_T_TASK_INIT (-110) +#define STATE_T_TASK_FAIL (-410) + + +/* Event for task handling */ +#define EVENT_TRANSVR_TASK_WAIT (2101) +#define EVENT_TRANSVR_TASK_DONE (0) +#define EVENT_TRANSVR_TASK_FAIL (-2101) +/* Event for initial handling */ +#define EVENT_TRANSVR_INIT_UP (2201) +#define EVENT_TRANSVR_INIT_DOWN (1) +#define EVENT_TRANSVR_INIT_REINIT (-2201) +#define EVENT_TRANSVR_INIT_FAIL (-2202) +/* Event for others */ +#define EVENT_TRANSVR_RELOAD_FAIL (-2301) +#define EVENT_TRANSVR_EXCEP_INIT (-2401) +#define EVENT_TRANSVR_EXCEP_UP (-2402) +#define EVENT_TRANSVR_EXCEP_DOWN (-2403) +#define EVENT_TRANSVR_EXCEP_SWAP (-2404) +#define EVENT_TRANSVR_EXCEP_EXCEP (-2405) +#define EVENT_TRANSVR_EXCEP_ISOLATED (-2406) +#define EVENT_TRANSVR_I2C_CRASH (-2501) + +/* Transceiver error code define */ +#define ERR_TRANSVR_UNINIT (-201) +#define ERR_TRANSVR_UNPLUGGED (-202) +#define ERR_TRANSVR_ABNORMAL (-203) +#define ERR_TRANSVR_NOSTATE (-204) +#define ERR_TRANSVR_NOTSUPPORT (-205) +#define ERR_TRANSVR_BADINPUT (-206) +#define ERR_TRANSVR_UPDATE_FAIL (-207) +#define ERR_TRANSVR_RELOAD_FAIL (-208) +#define ERR_TRANSVR_INIT_FAIL (-209) +#define ERR_TRANSVR_UNDEFINED (-210) +#define ERR_TRANSVR_TASK_FAIL (-211) +#define ERR_TRANSVR_TASK_BUSY (-212) +#define ERR_TRANSVR_UEVENT_FAIL (-213) +#define ERR_TRANSVR_FUNC_DISABLE (-214) +#define ERR_TRANSVR_I2C_CRASH (-297) +#define ERR_TRNASVR_BE_ISOLATED (-298) +#define ERR_TRANSVR_UNEXCPT (-299) + +/* For debug */ +#define DEBUG_TRANSVR_INT_VAL (-99) +#define DEBUG_TRANSVR_HEX_VAL (0xfe) +#define DEBUG_TRANSVR_STR_VAL "ERROR" + +/* For system internal */ +#define VAL_TRANSVR_COMID_ARREESS (0x50) +#define VAL_TRANSVR_COMID_OFFSET (0x00) +#define VAL_TRANSVR_EXTPHY_ADDR_56 (0x56) +#define VAL_TRANSVR_8472_READY_ADDR (0x51) +#define VAL_TRANSVR_8472_READY_PAGE (-1) +#define VAL_TRANSVR_8472_READY_OFFSET (110) +#define VAL_TRANSVR_8472_READY_BIT (0) +#define VAL_TRANSVR_8472_READY_VALUE (0) +#define VAL_TRANSVR_8472_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_READY_ADDR (0x50) +#define VAL_TRANSVR_8436_READY_PAGE (-1) +#define VAL_TRANSVR_8436_READY_OFFSET (2) +#define VAL_TRANSVR_8436_READY_BIT (0) +#define VAL_TRANSVR_8436_READY_VALUE (0) +#define VAL_TRANSVR_8436_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_PWD_ADDR (0x50) +#define VAL_TRANSVR_8436_PWD_PAGE (-1) +#define VAL_TRANSVR_8436_PWD_OFFSET (123) +#define VAL_TRANSVR_PAGE_FREE (-99) +#define VAL_TRANSVR_PAGE_SELECT_OFFSET (127) +#define VAL_TRANSVR_PAGE_SELECT_DELAY (5) +#define VAL_TRANSVR_TASK_RETRY_FOREVER (-999) +#define VAL_TRANSVR_FUNCTION_DISABLE (-1) +#define STR_TRANSVR_SFP "SFP" +#define STR_TRANSVR_QSFP "QSFP" +#define STR_TRANSVR_QSFP_PLUS "QSFP+" +#define STR_TRANSVR_QSFP28 "QSFP28" + +/* For transvr buf len */ +#define LEN_TRANSVR_S_STR (16) +#define LEN_TRANSVR_M_STR (32) +#define LEN_TRANSVR_L_STR (64) + +/* Optical wavelength */ +#define VAL_OPTICAL_WAVELENGTH_SR (850) +#define VAL_OPTICAL_WAVELENGTH_LR (1310) +#define VAL_OPTICAL_WAVELENGTH_ER (1550) + +/* Switch chip type define */ +#define CHIP_TYPE_MAGNOLIA (31001) /* Magnolia, Hudson32i, Spruce */ +#define CHIP_TYPE_REDWOOD (31002) /* Redwood, Cypress, Sequoia */ +#define CHIP_TYPE_MAPLE (31003) /* Maple */ + +#define CHIP_TYPE_LAVENDER (31011) /* Lavender */ + +#define CHIP_TYPE_COTTONWOOD_LITE (31021) /* Cottonwood-Lite */ + +/* Info from transceiver EEPROM */ +struct eeprom_map_s { + int addr_br; int page_br; int offset_br; int length_br; + int addr_cdr; int page_cdr; int offset_cdr; int length_cdr; + int addr_comp_rev; int page_comp_rev; int offset_comp_rev; int length_comp_rev; + int addr_connector; int page_connector; int offset_connector; int length_connector; + int addr_diag_type; int page_diag_type; int offset_diag_type; int length_diag_type; + int addr_extbr; int page_extbr; int offset_extbr; int length_extbr; + int addr_ext_id; int page_ext_id; int offset_ext_id; int length_ext_id; + int addr_id; int page_id; int offset_id; int length_id; + int addr_len_sm; int page_len_sm; int offset_len_sm; int length_len_sm; + int addr_len_smf; int page_len_smf; int offset_len_smf; int length_len_smf; + int addr_len_om1; int page_len_om1; int offset_len_om1; int length_len_om1; + int addr_len_om2; int page_len_om2; int offset_len_om2; int length_len_om2; + int addr_len_om3; int page_len_om3; int offset_len_om3; int length_len_om3; + int addr_len_om4; int page_len_om4; int offset_len_om4; int length_len_om4; + int addr_option; int page_option; int offset_option; int length_option; + int addr_rate_id; int page_rate_id; int offset_rate_id; int length_rate_id; + int addr_rx_am; int page_rx_am; int offset_rx_am; int length_rx_am; + int addr_rx_em; int page_rx_em; int offset_rx_em; int length_rx_em; + int addr_rx_los; int page_rx_los; int offset_rx_los; int length_rx_los; + int addr_rx_power; int page_rx_power; int offset_rx_power; int length_rx_power; + int addr_soft_rs0; int page_soft_rs0; int offset_soft_rs0; int length_soft_rs0; + int addr_soft_rs1; int page_soft_rs1; int offset_soft_rs1; int length_soft_rs1; + int addr_temp; int page_temp; int offset_temp; int length_temp; + int addr_trancomp; int page_trancomp; int offset_trancomp; int length_trancomp; + int addr_trancomp_ext; int page_trancomp_ext; int offset_trancomp_ext; int length_trancomp_ext; + int addr_tx_bias; int page_tx_bias; int offset_tx_bias; int length_tx_bias; + int addr_tx_disable; int page_tx_disable; int offset_tx_disable; int length_tx_disable; + int addr_tx_eq; int page_tx_eq; int offset_tx_eq; int length_tx_eq; + int addr_tx_fault; int page_tx_fault; int offset_tx_fault; int length_tx_fault; + int addr_tx_power; int page_tx_power; int offset_tx_power; int length_tx_power; + int addr_vendor_name; int page_vendor_name; int offset_vendor_name; int length_vendor_name; + int addr_vendor_pn; int page_vendor_pn; int offset_vendor_pn; int length_vendor_pn; + int addr_vendor_rev; int page_vendor_rev; int offset_vendor_rev; int length_vendor_rev; + int addr_vendor_sn; int page_vendor_sn; int offset_vendor_sn; int length_vendor_sn; + int addr_voltage; int page_voltage; int offset_voltage; int length_voltage; + int addr_wavelength; int page_wavelength; int offset_wavelength; int length_wavelength; +}; + + +struct transvr_worker_s; + +/* Class of transceiver object */ +struct transvr_obj_s { + + /* ========== Object private property ========== + * [Prop]: id + * [Desc]: Type of serial transceiver. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh /QSFP28:11h + */ + uint8_t id; + + /* [Prop]: connector + * [Desc]: Connector type. + * [Note]: SFP : A0h / 2 + * QSFP: 00h / 130 + */ + uint8_t connector; + + /* [Prop]: transvr_comp + * [Desc]: Transceiver compliance code. + * [Note]: SFP: SFF-8472 + * - Normal : A0h / offset 3-10 + * - Extended: A0h / offset 36 + * QSFP: SFF-8436 & SFF-8636 + * - Normal : 00h / offset 131-138 + * - Extended: 00h / offset 192 + */ + uint8_t transvr_comp[8]; + uint8_t transvr_comp_ext; + + /* [Prop]: vendor_name + * [Desc]: SFP vendor name (ASCII 16 byte char). + * [Note]: ex:FINISAR CORP. + */ + char *vendor_name; + + /* [Prop]: vendor_pn + * [Desc]: Part number provided by SFP vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_pn; + + /* [Prop]: vendor_rev + * [Desc]: Revision level for part number provided by vendor (ASCII 4 byte char). + * [Note]: + */ + char *vendor_rev; + + /* [Prop]: vendor_sn + * [Desc]: Serial number provided by vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_sn; + + /* [Prop]: Extended identifier + * [Desc]: SFP: + * => None + * + * QSFP: + * => This byte contained two information: + * (1) Power consumption class + * (2) CDR function present + * [Note]: Bit description as below: + * [SFP] + * None + * + * [QSFP] + * (1) Power consumption class: + * Class 1: 1.5W (Bit6-7 = 00:) + * Class 2: 2.0W (Bit6-7 = 01:) + * Class 3: 2.5W (Bit6-7 = 10:) + * Class 4: 3.5W (Bit6-7 = 11:) + * Class 5: 4.0W (Bit0-1 = 01:) + * Class 6: 4.5W (Bit0-1 = 10:) + * Class 7: 5.0W (Bit0-1 = 11:) + * (2) CDR function present: + * Bit2: 0 = No CDR in RX + * 1 = CDR present in RX + * Bit3: 0 = No CDR in TX + * 1 = CDR present in TX + */ + uint8_t ext_id; + + /* [Prop]: br + * [Desc]: Nominal bit rate, units of 100 MBits/sec. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh + * has val: 0x67 + * no val : + */ + uint8_t br; + + /* [Prop]: extbr + * [Desc]: Extended br (00h/222) + * [Desc]: Nominal bit rate per channel, units of 250 Mbps. + * Complements. Byte 140. See Table 32A. + */ + uint8_t extbr; + + /* [Prop]: len_sm + * [Desc]: Length (single mode)-(100's)m + * [Note]: This value specifies the link length that is supported by the transceiver + * while operating in compliance with the applicable standards using single mode + * fiber. The value is in units of 100 meters. A value of 255 means that the + * transceiver supports a link length greater than 25.4 km. A value of zero means + * that the transceiver does not support single mode fiber or that the length + * information must be determined from the transceiver technology. + */ + int len_sm; + + /* [Prop]: len_smf + * [Desc]: Length (single mode)-km + * [Note]: Addition to EEPROM data from original GBIC definition. This value specifies + * the link length that is supported by the transceiver while operating in + * compliance with the applicable standards using single mode fiber. The value + * is in units of kilometers. A value of 255 means that the transceiver supports + * a link length greater than 254 km. A value of zero means that the transceiver + * does not support single mode fiber or that the length information must be + * determined from the transceiver technology. + */ + int len_smf; + + /* [Prop]: len_om1 + * [Desc]: Link length supported for 62.5 um OM1 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om1; + + /* [Prop]: len_om2 + * [Desc]: Link length supported for 50 um OM2 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om2; + + /* [Prop]: len_om3 + * [Desc]: Length (50um, OM3) + * [Note]: This value specifies link length that is supported by the transceiver while + * operating in compliance with applicable standards using 50 micron multimode + * OM3 [2000 MHz*km] fiber. The value is in units of 10 meters. A value of 255 + * means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber + * or that the length information must be determined from the transceiver technology. + */ + int len_om3; + + /* [Prop]: len_om4 + * [Desc]: Length (50um, OM4) and Length (Active Cable or Copper) + * [Note]: For optical links, this value specifies link length that is supported by the + * transceiver while operating in compliance with applicable standards using 50 micron + * multimode OM4 [4700 MHz*km] fiber. The value is in units of 10 meters. A value of + * 255 means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber or that + * the length information must be determined from the transceiver codes specified in Table 5-3. + * + * For copper links, this value specifies minimum link length supported by the transceiver + * while operating in compliance with applicable standards using copper cable. For active + * cable, this value represents actual length. The value is in units of 1 meter. A value of 255 + * means the transceiver supports a link length greater than 254 meters. A value of zero means + * the transceiver does not support copper or active cables or the length information must be + * determined from transceiver technology. Further information about cable design, equalization, + * and connectors is usually required to guarantee meeting a particular length requirement. + */ + int len_om4; + + /* [Prop]: comp_rev + * [Desc]: SFF spec revision compliance + * [Note]: Indicates which revision of SFF SFF-8472 (SFP) / SFF-8636 (QSFP) the transceiver + * complies with. (unsigned integer) + */ + uint8_t comp_rev; + + /* [Prop]: CDR + * [Desc]: For transceivers with CDR capability, setting the CDR to ON engages the internal + * retiming function. Setting the CDR to OFF enables an internal bypassing mode ,which + * directs traffic around the internal CDR. (Reference: SFF-8636) + * [Note]: value=0xff: ON. + * value=0x00: OFF. + */ + uint8_t cdr; + + /* [Prop]: rate_id + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Addr: A0h / Offset: 13 + * 2. Value description: + * 00h Unspecified + * 01h SFF-8079 (4/2/1G Rate_Select & AS0/AS1) + * 02h SFF-8431 (8/4/2G Rx Rate_Select only) + * 03h Unspecified * + * 04h SFF-8431 (8/4/2G Tx Rate_Select only) + * 05h Unspecified * + * 06h SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) + * 07h Unspecified * + * 08h FC-PI-5 (16/8/4G Rx Rate_select only) High=16G only, Low=8G/4G + * 09h Unspecified * + * 0Ah FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) High=16G only, + * Low=8G/4G + * 0Bh Unspecified * + * 0Ch FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + * 0Dh Unspecified * + * 0Eh 10/8G Rx and Tx Rate_Select controlling the operation or locking + * modes of the internal signal conditioner, retimer or CDR, according + * to the logic table defined in Table 10-2, High Bit Rate + * (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = 8.5 Gb/s. In this mode, + * the default value of bit 110.3 (Soft Rate Select RS(0), Table 9-11) + * and of bit 118.3 (Soft Rate Select RS(1), Table 10-1) is 1. + * 0Fh Unspecified * + * 10h-FFh Unallocated + */ + int rate_id; + + /* [Prop]: soft_rs0 + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Writing '1' selects full bandwidth operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(0) or RS(0) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 110 / Bit: 3 + */ + uint8_t soft_rs0; + + /* [Prop]: soft_rs1 + * [Desc]: Soft Rate Select 1(TX). + * [Note]: 1. Writing '1' selects full bandwidth TX operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(1) or RS(1) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 118 / Bit: 3 + */ + uint8_t soft_rs1; + + /* [Prop]: diag_type + * [Desc]: DIAGNOSTIC MONITORING TYPE (A0h/92) + * [Note]: Description in SFF-8472 as below: + * Bit7: Reserved for legacy diagnostic implementations. Must be '0' for compliance + * with this document. + * Bit6: Digital diagnostic monitoring implemented (described in this document). + * Must be '1' for compliance with this document. + * Bit5 Internally calibrated + * Bit4 Externally calibrated + * Bit3 Received power measurement type.0 = OMA, 1 = average power + * Bit2 Address change required see section above, "addressing modes" + * Bit1-0 Unallocated + */ + uint8_t diag_type; + + /* [Prop]: curr_temp + * [Desc]: Transceiver Current Temperature (A2h/96-97) + * [Note]: 1. Dependent on diag_type. + * 2. 96: High byte + * 3. 97: Low byte + * 4. This feature only for SFP + */ + uint8_t curr_temp[2]; + + /* [Prop]: curr_vol + * [Desc]: Transceiver Current Voltage (SFP:A2h/108-109; QSFP:00h/22-23) + * [Note]: 1. Dependent on diag_type. + * 2. 98: High byte + * 3. 99: Low byte + * 4. This feature only for SFP + * 5. Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts + */ + uint8_t curr_voltage[2]; + + /* [Prop]: curr_tx_bias + * [Desc]: Transceiver TX Bias Current (SFP:A2h/100-101; QSFP:00h/26-27) + * [Note]: 1. Dependent on diag_type. + * 2. 100: High byte + * 3. 101: Low byte + * 4. This feature only for SFP + * 5. Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + uint8_t curr_tx_bias[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + uint8_t curr_tx_power[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + uint8_t curr_rx_power[8]; + + /* [Prop]: wavelength + * [Desc]: Wavelength or Copper Cable Attenuation + * [Note]: (Following is info from SFF-8636) + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is a + * 16-bit hex value with Byte 186 as high order byte and Byte 187 as low + * order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. If the free side device is identified as + * copper cable these registers will be used to define the cable attenuation. + * An indication of 0 dB attenuation refers to the case where the attenuation + * is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + uint8_t wavelength[2]; + + /* [Prop]: Amplitude control + * [Desc]: Amplitude control + * [Note]: QSFP28 => SFF-8636 03H Byte-238/239 + */ + uint8_t rx_am[2]; + + /* [Prop]: Emphasis control + * [Desc]: Emphasis control + * [Note]: SFP+/28 => SFF-8472 A2H Byte-115 + * QSFP28 => SFF-8636 03H Byte-236/237 + */ + uint8_t rx_em[2]; + + /* [Prop]: Soft Rx LOS + * [Desc]: Soft Rx LOS which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 3: + * - Bit 0: L-Rx1 LOS + * - Bit 1: L-Rx2 LOS + * - Bit 2: L-Rx3 LOS + * - Bit 3: L-Rx4 LOS + */ + uint8_t rx_los; + + /* [Prop]: Soft Tx Disable + * [Desc]: Soft Tx Disable which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Disable + * - Bit 1: Tx2 Disable + * - Bit 2: Tx3 Disable + * - Bit 3: Tx4 Disable + */ + uint8_t tx_disable; + + /* [Prop]: Soft Tx Fault + * [Desc]: Soft Tx Fault which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Fault + * - Bit 1: Tx2 Fault + * - Bit 2: Tx3 Fault + * - Bit 3: Tx4 Fault + */ + uint8_t tx_fault; + + /* [Prop]: Transceiver EQUALIZATION + * [Desc]: Transceiver EQUALIZATION + * [Note]: SFP+/28 => SFF-8472 A2H Byte-114 + * QSFP28 => SFF-8636 03H Byte-234/235 + */ + uint8_t tx_eq[2]; + + /* [Prop]: OPTION VALUES + * [Desc]: The bits in the option field shall specify the options implemented in the transceiver. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-64/65 + * QSFP+/28 => SFF-8636 00H Byte-193/195 + */ + uint8_t option[3]; + + /* [Prop]: External PHY offset + * [Desc]: It needs to be setup first if you want to access transceiver external phy. + * [Note]: This feature dependent on transceiver. + * Currently, only 1G-RJ45 transceiver supported it. + */ + uint8_t extphy_offset; + + /* ========== Object private property ========== + */ + struct device *transvr_dev_p; + struct eeprom_map_s *eeprom_map_p; + struct i2c_client *i2c_client_p; + struct ioexp_obj_s *ioexp_obj_p; + struct transvr_worker_s *worker_p; + struct mutex lock; + char swp_name[32]; + int auto_config; + int auto_tx_disable; + int chan_id; + int chipset_type; + int curr_page; + int info; + int ioexp_virt_offset; + int lane_id[8]; + int layout; + int mode; + int retry; + int state; + int temp; + int type; + + /* ========== Object public functions ========== + */ + int (*get_id)(struct transvr_obj_s *self); + int (*get_ext_id)(struct transvr_obj_s *self); + int (*get_connector)(struct transvr_obj_s *self); + int (*get_vendor_name)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_pn)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_rev)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_sn)(struct transvr_obj_s *self, char *buf_p); + int (*get_power_cls)(struct transvr_obj_s *self); + int (*get_br)(struct transvr_obj_s *self); + int (*get_len_sm)(struct transvr_obj_s *self); + int (*get_len_smf)(struct transvr_obj_s *self); + int (*get_len_om1)(struct transvr_obj_s *self); + int (*get_len_om2)(struct transvr_obj_s *self); + int (*get_len_om3)(struct transvr_obj_s *self); + int (*get_len_om4)(struct transvr_obj_s *self); + int (*get_comp_rev)(struct transvr_obj_s *self); + int (*get_comp_eth_1)(struct transvr_obj_s *self); + int (*get_comp_eth_10)(struct transvr_obj_s *self); + int (*get_comp_eth_10_40)(struct transvr_obj_s *self); + int (*get_comp_extend)(struct transvr_obj_s *self); + int (*get_cdr)(struct transvr_obj_s *self); + int (*get_rate_id)(struct transvr_obj_s *self); + int (*get_soft_rs0)(struct transvr_obj_s *self); + int (*get_soft_rs1)(struct transvr_obj_s *self); + int (*get_info)(struct transvr_obj_s *self); + int (*get_if_type)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_speed)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_lane)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_temp)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_vol)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_rx_los)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_fault)(struct transvr_obj_s *self, char *buf_p); + int (*get_auto_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_bias)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_eq)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_am)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_em)(struct transvr_obj_s *self, char *buf_p); + int (*get_wavelength)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_offset)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_reg)(struct transvr_obj_s *self, char *buf_p); + int (*set_cdr)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs0)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs1)(struct transvr_obj_s *self, int input_val); + int (*set_soft_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_auto_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_tx_eq)(struct transvr_obj_s *self, int input_val); + int (*set_rx_am)(struct transvr_obj_s *self, int input_val); + int (*set_rx_em)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_offset)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_reg)(struct transvr_obj_s *self, int input_val); + + /* ========== Object private functions ========== + */ + int (*init)(struct transvr_obj_s *self); + int (*clean)(struct transvr_obj_s *self); + int (*check)(struct transvr_obj_s *self); + int (*update_all)(struct transvr_obj_s *self, int show_err); + int (*fsm_4_direct)(struct transvr_obj_s* self, char *caller_name); + int (*fsm_4_polling)(struct transvr_obj_s* self, char *caller_name); + int (*send_uevent)(struct transvr_obj_s* self, enum kobject_action u_action); + int (*dump_all)(struct transvr_obj_s* self); +}; + + +/* For AVL Mapping */ +struct transvr_avl_s { + char vendor_name[32]; + char vendor_pn[32]; + int (*init)(struct transvr_obj_s *self); +}; + + +/* Worker for long term task of transceiver */ +struct transvr_worker_s { + /* Task Parameter */ + struct transvr_obj_s *transvr_p; + struct transvr_worker_s *next_p; + struct transvr_worker_s *pre_p; + unsigned long trigger_time; + char func_name[64]; + int retry; + int state; + + /* Task private data */ + void *p_data; + + /* Call back function */ + int (*main_task)(struct transvr_worker_s *task); + int (*post_task)(struct transvr_worker_s *task); +}; + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode); + +void lock_transvr_obj(struct transvr_obj_s *self); +void unlock_transvr_obj(struct transvr_obj_s *self); +int isolate_transvr_obj(struct transvr_obj_s *self); + +int resync_channel_tier_2(struct transvr_obj_s *self); + +void alarm_msg_2_user(struct transvr_obj_s *self, char *emsg); + +#endif /* TRANSCEIVER_H */ + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/setup.py b/platform/broadcom/sonic-platform-modules-inventec/d7264/setup.py new file mode 100644 index 00000000000..b5d2d146354 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/setup.py @@ -0,0 +1,14 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='sonic_platform', + version='1.0', + description='Module to initialize Ivnetec D7264 platforms', + + packages=['sonic_platform'], +) diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/__init__.py new file mode 100644 index 00000000000..d82f3749319 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import * diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/chassis.py new file mode 100644 index 00000000000..ec3876fa4d0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/chassis.py @@ -0,0 +1,210 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Chassis information +# +# version: 1.0 +############################################################################# + +try: + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.component import Component + from sonic_platform.eeprom import Eeprom + from sonic_platform.watchdog import Watchdog + from sonic_platform.psu import Psu + from sonic_platform.fan import Fan + from sonic_platform.sfp import Sfp + from sonic_platform.qsfp import QSfp + from sonic_platform.thermal import Thermal + from sonic_platform.transceiver_event import TransceiverEvent +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +############### +# Global +############### +NUM_PSU = 2 +NUM_FAN_TRAY = 4 +NUM_PORTS = 64 +QSFP_START = 0 +NUM_THERMAL = 6 +NUM_COMPONENT = 2 + +class Chassis(ChassisBase): + """Platform-specific Chassis class""" + + def __init__(self): + ChassisBase.__init__(self) + + # Initialize EEPROM and watchdog + self._eeprom = Eeprom() +# self._watchdog = Watchdog() + + #Initialize FAN object + for index in range(0, NUM_FAN_TRAY): + fan = Fan(index) + self._fan_list.append(fan) + + # Initialize PSU and PSU_fan object + for index in range(0, NUM_PSU): + psu = Psu(index) + self._psu_list.append(psu) + fan = Fan(index, True) + self._fan_list.append(fan) + + # Initialize SFP/QSFP object + for index in range(0, NUM_PORTS): + if index < QSFP_START: + sfp = Sfp(index) + else: + sfp = QSfp(index) + self._sfp_list.append(sfp) + + # Initialize Thermal object + for index in range(0, NUM_THERMAL): + thermal = Thermal(index) + self._thermal_list.append(thermal) + + # Initialize Component object + for index in range(0, NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Initialize TRANSCEIVER EVENT MONITOR + self.__xcvr_event = TransceiverEvent() + + #################### + # Device base + #################### + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return self._eeprom.modelstr() + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + return self._eeprom.part_number_str() + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + return self._eeprom.serial_number_str() + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + return True + + + #################### + # chassis base + #################### + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.base_mac_addr() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.serial_number_str() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821', + '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00', + '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'} + """ + return self._eeprom.system_eeprom_info() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + raise NotImplementedError + + + ############################################## + # Other methods + ############################################## + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + + Returns: + (bool, dict): + - True if call successful, False if not; + - A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, + where device_id is the device ID for this device and + device_event, + status='1' represents device inserted, + status='0' represents device removed. + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}} + indicates that fan 0 has been removed, fan 2 + has been inserted and sfp 11 has been removed. + """ + rc, xcvr_event = self.__xcvr_event.get_transceiver_change_event(timeout) + + return rc, {'sfp': xcvr_event} diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/component.py new file mode 100644 index 00000000000..0c5fe6a5a92 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/component.py @@ -0,0 +1,135 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Component information +# +# version: 1.0 +############################################################################# + +try: + import os + import re + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +############### +# Global +############### +HWMON_CPLD1_PATH = "/sys/class/hwmon/hwmon3/device/" +DMI_PATH = "/sys/class/dmi/id/" + +COMPONENT_NAME_LIST = [ + "CPLD_1", + "BIOS" +] + +COMPONENT_DESC_LIST = [ + "platform management and control LED", + "platform interrupt event handle", + "Basic Input/Output System" +] + + + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + self.index = component_index + + + ####################### + # private function + ####################### + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def __get_cpld_version(self): + cpld_version = None + attr_cpld_version = "info" + + if COMPONENT_NAME_LIST[self.index] == "CPLD_1": + attr_path = HWMON_CPLD1_PATH + attr_cpld_version + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + for line in attr_rv.split("\n"): + re_rv = re.search(r"The CPLD version is (?P.+)", line) + if re_rv is not None: + cpld_version = re_rv.group("version") + + return cpld_version + + #################### + # Device base + #################### + + def get_name(self): + """ + Retrieves the name of the component + + Returns: + A string containing the name of the component + """ + return COMPONENT_NAME_LIST[self.index] + + def get_description(self): + """ + Retrieves the description of the component + + Returns: + A string containing the description of the component + """ + return COMPONENT_DESC_LIST[self.index] + + def get_firmware_version(self): + """ + Retrieves the firmware version of the component + + Returns: + A string containing the firmware version of the component + """ + version = None + attr_bios_version = "bios_date" + + if "CPLD" in COMPONENT_NAME_LIST[self.index]: + version = self.__get_cpld_version() + elif COMPONENT_NAME_LIST[self.index] == "BIOS": + attr_path = DMI_PATH + attr_bios_version + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + version = attr_rv + + return version + + def install_firmware(self, image_path): + """ + Installs firmware to the component + + Args: + image_path: A string, path to firmware image + + Returns: + A boolean, True if install was successful, False if not + """ + raise NotImplementedError \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/eeprom.py new file mode 100644 index 00000000000..210ce02db94 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/eeprom.py @@ -0,0 +1,114 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the eeprom information +# +# version: 1.0 +############################################################################# + + +try: + from sonic_eeprom import eeprom_tlvinfo + import binascii +except ImportError, e: + raise ImportError(str(e) + "- required module not found") + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self): + self.__eeprom_path = "/sys/class/i2c-adapter/i2c-0/i2c-2/2-0053/eeprom" + super(Eeprom, self).__init__(self.__eeprom_path, 0, '', True) + self.__eeprom_tlv_dict = dict() + try: + self.__eeprom_data = self.read_eeprom() + except: + self.__eeprom_data = "N/A" + raise RuntimeError("Eeprom is not Programmed") + else: + eeprom = self.__eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + return + + total_length = (ord(eeprom[9]) << 8) | ord(eeprom[10]) + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + ord(eeprom[tlv_index + 1])] + code = "0x%02X" % (ord(tlv[0])) + + if ord(tlv[0]) == self._TLV_CODE_VENDOR_EXT: + value = str((ord(tlv[2]) << 24) | (ord(tlv[3]) << 16) | + (ord(tlv[4]) << 8) | ord(tlv[5])) + value += str(tlv[6:6 + ord(tlv[1])]) + else: + name, value = self.decoder(None, tlv) + + self.__eeprom_tlv_dict[code] = value + if ord(eeprom[tlv_index]) == self._TLV_CODE_CRC_32: + break + + tlv_index += ord(eeprom[tlv_index+1]) + 2 + + def serial_number_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_SERIAL_NUMBER) + if not is_valid: + return "N/A" + return results[2] + + def base_mac_addr(self): + (is_valid, t) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_MAC_BASE) + if not is_valid or t[1] != 6: + return super(eeprom_tlvinfo.TlvInfoDecoder, self).switchaddrstr(e) + + return ":".join([binascii.b2a_hex(T) for T in t[2]]) + + def modelstr(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_PRODUCT_NAME) + if not is_valid: + return "N/A" + + return results[2] + + def part_number_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_PART_NUMBER) + if not is_valid: + return "N/A" + + return results[2] + + def serial_tag_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_SERVICE_TAG) + if not is_valid: + return "N/A" + + return results[2] + + def revision_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_DEVICE_VERSION) + if not is_valid: + return "N/A" + + return results[2] + + def system_eeprom_info(self): + """ + Returns a dictionary, where keys are the type code defined in + ONIE EEPROM format and values are their corresponding values + found in the system EEPROM. + """ + return self.__eeprom_tlv_dict diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/fan.py new file mode 100644 index 00000000000..3cf160be5eb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/fan.py @@ -0,0 +1,274 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the FAN information +# +# version: 1.0 +############################################################################# + +try: + import os + import math + from sonic_platform_base.fan_base import FanBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +############### +# Global +############### +HWMON_PATH = "/sys/class/hwmon/hwmon2/" + +class Fan(FanBase): + """Platform-specific Fan class""" + + def __init__(self, index, is_psu_fan=False): + self.is_psu_fan = is_psu_fan + + if self.is_psu_fan: + self.psu_index = index + 1 + self.psu_fan_pwm = "pwm_psu{}".format(self.psu_index) + self.psu_fan_rpm = "rpm_psu{}".format(self.psu_index) + else: + self.fan_index = index + 1 + self.fan_pwm = "pwm{}".format(self.fan_index) + self.fan_status_led_green_color = "fan_led_grn{}".format(self.fan_index) + self.fan_status_led_red_color = "fan_led_red{}".format(self.fan_index) + self.fan_front_rpm = "fan{}_input".format(self.fan_index * 2 - 1) + self.fan_rear_rpm = "fan{}_input".format(self.fan_index * 2) + self.fan_gpi = "fan_gpi" + + +####################### +# private function +####################### + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + + #################### + # Device base + #################### + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + if self.is_psu_fan: + return "PSU-{}_FAN".format(self.psu_index) + else: + return "FAN-{}".format(self.fan_index) + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + + Note: + fan_gpi define 8 bits + low byte means fan presense + high byte means fan direction + """ + if self.is_psu_fan: + return True + + presence = False + attr_path = HWMON_PATH + self.fan_gpi + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + not_presence_bit = 1 << (self.fan_index - 1) + if not (int(attr_rv, 16) & not_presence_bit): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + raise NotImplementedError + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + raise NotImplementedError + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + status = False + + if self.is_psu_fan: + attr_path_1 = HWMON_PATH + self.psu_fan_rpm + attr_path_2 = HWMON_PATH + self.psu_fan_rpm + else: + attr_path_1 = HWMON_PATH + self.fan_front_rpm + attr_path_2 = HWMON_PATH + self.fan_rear_rpm + + attr_rv_1 = self.__get_attr_value(attr_path_1) + attr_rv_2 = self.__get_attr_value(attr_path_2) + if (attr_rv_1 != 'ERR' and attr_rv_2 != 'ERR'): + if (attr_rv_1 > 0 and attr_rv_2 > 0): + status = True + + return status + + + ################# + # fan base + ################# + + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + + Note: + fan_gpi define 8 bits + low byte means fan presense + high byte means fan direction + """ + if self.is_psu_fan: + return "unknown" + + direction = self.FAN_DIRECTION_INTAKE + attr_path = HWMON_PATH + self.fan_gpi + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + attr_rv = int(attr_rv,16) >> 4 + direction_bit = 1 << (self.fan_index - 1) + if (attr_rv & direction_bit): + direction = self.FAN_DIRECTION_EXHAUST + + return direction + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + pwm = 0 + pwm_range = 255 #0-255 + speed = 0 + + if self.is_psu_fan: + attr_path = HWMON_PATH + self.psu_fan_pwm + else: + attr_path = HWMON_PATH + self.fan_pwm + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + pwm = int(attr_rv) + speed = math.ceil(float(pwm * 100 / pwm_range)) + + return int(speed) + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + raise NotImplementedError + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + raise NotImplementedError + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + raise NotImplementedError + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + + Args: + color: A string representing the color with which to set the + fan module status LED + + Returns: + bool: True if status LED state is set successfully, False if not + """ + raise NotImplementedError + + def get_status_led(self): + """ + Gets the state of the fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.is_psu_fan: + return "unknown" + + on = "1" + attr_grn_path = HWMON_PATH + self.fan_status_led_green_color + attr_red_path = HWMON_PATH + self.fan_status_led_red_color + + attr_grn_rv = self.__get_attr_value(attr_grn_path) + attr_red_rv = self.__get_attr_value(attr_red_path) + if (attr_grn_rv != 'ERR' and attr_red_rv != 'ERR'): + if (attr_grn_rv == on): + return self.STATUS_LED_COLOR_GREEN + elif (attr_red_rv == on): + return self.STATUS_LED_COLOR_RED + else: + return self.STATUS_LED_COLOR_OFF diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/platform.py new file mode 100644 index 00000000000..688d3f361b0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/platform.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Platform information +# +# version: 1.0 +############################################################################# + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PlatformBase): + """Platform-specific Platform class""" + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/psu.py new file mode 100644 index 00000000000..9ffdb4e78f7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/psu.py @@ -0,0 +1,238 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSU information +# +# version: 1.0 +############################################################################# + +try: + import os + from sonic_platform_base.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +############### +# Global +############### +HWMON_PATH = "/sys/class/hwmon/hwmon2/" + +class Psu(PsuBase): + """Inventec Platform-specific PSU class""" + + def __init__(self, psu_index): + self.index = psu_index + 1 + self.psu_presence_attr = "psu{}".format(self.index) + self.psu_power_in_attr = "psoc_psu{}_pin".format(self.index) + self.psu_power_out_attr = "psoc_psu{}_pout".format(self.index) + self.psu_voltage_in_attr = "psoc_psu{}_vin".format(self.index) + self.psu_voltage_out_attr = "psoc_psu{}_vout".format(self.index) + self.psu_current_in_attr = "psoc_psu{}_iin".format(self.index) + self.psu_current_out_attr = "psoc_psu{}_iout".format(self.index) + self.psu_serial_attr = "psoc_psu{}_serial".format(self.index) + self.psu_model_attr = "psoc_psu{}_version".format(self.index) + + + ####################### + # private function + ####################### + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + + #################### + # Device base + #################### + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return "PSU-{}".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + + Note: + CPLD report the PSU{} status in psoc driver + 000 = PSU normal operation string = "0 : normal" + 100 = PSU fault string = "4 : fault" + 010 = PSU unpowered string = "2 : unpowered" + 111 = PSU not installed string = "7 : not installed" + """ + presence = False + attr_not_installed = "0 : not installed" + attr_path = HWMON_PATH + self.psu_presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (attr_rv != attr_not_installed): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + model_str = "" + attr_path = HWMON_PATH + self.psu_model_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + model_str = attr_rv + + return model_str + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + serial_no = "" + attr_path = HWMON_PATH + self.psu_serial_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + serial_no = attr_rv + + return serial_no + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + Note: + CPLD report the PSU{} status in psoc driver + 000 = PSU normal operation string = "0 : normal" + 100 = PSU fault string = "4 : fault" + 010 = PSU unpowered string = "2 : unpowered" + 111 = PSU not installed string = "7 : not installed" + """ + status = False + attr_not_installed = "0 : normal" + attr_path = HWMON_PATH + self.psu_presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (attr_rv == attr_not_installed): + status = True + + return status + + + ################# + # psu base + ################# + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + voltage_out = 0.0 + attr_path = HWMON_PATH + self.psu_voltage_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + voltage_out = float(attr_rv) / 1000 + + return voltage_out + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + current_in = 0.0 + attr_path = HWMON_PATH + self.psu_current_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + current_in = float(attr_rv) / 1000 + + return current_in + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, e.g. 302.6 + """ + power_out = 0.0 + attr_path = HWMON_PATH + self.psu_power_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + power_out = float(attr_rv) / 1000 + + return power_out + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + + Args: + color: A string representing the color with which to set the + PSU status LED + + Returns: + bool: True if status LED state is set successfully, False if not + """ + raise NotImplementedError + + def get_status_led(self): + """ + Gets the state of the PSU status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/qsfp.py b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/qsfp.py new file mode 100644 index 00000000000..4b0ec7b8ee8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/qsfp.py @@ -0,0 +1,930 @@ +#!/usr/bin/env python +# +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the QSFP information +# +# version: 1.0 +############################################################################# + +try: + import os + import sys + import time + from ctypes import create_string_buffer + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom + from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +INFO_OFFSET = 128 +THRE_OFFSET = 384 #128*3 +DOM_OFFSET = 0 + +XCVR_INTFACE_BULK_OFFSET = 0 +XCVR_INTFACE_BULK_WIDTH_QSFP = 20 +XCVR_HW_REV_WIDTH_QSFP = 2 +XCVR_CABLE_LENGTH_WIDTH_QSFP = 5 +XCVR_VENDOR_NAME_OFFSET = 20 +XCVR_VENDOR_NAME_WIDTH = 16 +XCVR_VENDOR_OUI_OFFSET = 37 +XCVR_VENDOR_OUI_WIDTH = 3 +XCVR_VENDOR_PN_OFFSET = 40 +XCVR_VENDOR_PN_WIDTH = 16 +XCVR_HW_REV_OFFSET = 56 +XCVR_HW_REV_WIDTH_OSFP = 2 +XCVR_VENDOR_SN_OFFSET = 68 +XCVR_VENDOR_SN_WIDTH = 16 +XCVR_VENDOR_DATE_OFFSET = 84 +XCVR_VENDOR_DATE_WIDTH = 8 +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 1 + +# Offset for values in QSFP eeprom +QSFP_DOM_REV_OFFSET = 1 +QSFP_DOM_REV_WIDTH = 1 +QSFP_TEMPE_OFFSET = 22 +QSFP_TEMPE_WIDTH = 2 +QSFP_VOLT_OFFSET = 26 +QSFP_VOLT_WIDTH = 2 +QSFP_CHANNL_MON_OFFSET = 34 +QSFP_CHANNL_MON_WIDTH = 16 +QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH = 24 +QSFP_CONTROL_OFFSET = 86 +QSFP_CONTROL_WIDTH = 8 +QSFP_CHANNL_RX_LOS_STATUS_OFFSET = 3 +QSFP_CHANNL_RX_LOS_STATUS_WIDTH = 1 +QSFP_CHANNL_TX_FAULT_STATUS_OFFSET = 4 +QSFP_CHANNL_TX_FAULT_STATUS_WIDTH = 1 +QSFP_POWEROVERRIDE_OFFSET = 93 +QSFP_POWEROVERRIDE_WIDTH = 1 +QSFP_MODULE_THRESHOLD_OFFSET = 128 +QSFP_MODULE_THRESHOLD_WIDTH = 24 +QSFP_CHANNEL_THRESHOLD_OFFSET = 176 +QSFP_CHANNEL_THRESHOLD_WIDTH = 16 + +class QSfp(SfpBase): + + def __init__(self, index): + self.__index = index + + self.__platform = "x86_64-inventec_d7264-r0" + self.__hwsku = "INVENTEC-D7264" + + self.__port_to_i2c_mapping = { + 0:100, 1:101, 2:102, 3:103, 4:104, 5:105, 6:106, 7:107, + 8:108, 9:109, 10:110, 11:111, 12:112, 13:113, 14:114, 15:115, + 16:116, 17:117, 18:118, 19:119, 20:120, 21:121, 22:122, 23:123, + 24:124, 25:125, 26:126, 27:127, 28:128, 29:129, 30:130, 31:131, + 32:135, 33:134, 34:133, 35:132, 36:139, 37:138, 38:137, 39:136, + 40:143, 41:142, 42:141, 43:140, 44:147, 45:146, 46:145, 47:144, + 48:151, 49:150, 50:149, 51:148, 52:155, 53:154, 54:153, 55:152, + 56:159, 57:158, 58:157, 59:156, 60:163, 61:162, 62:161, 63:160 + } + self.__port_end = len(self.__port_to_i2c_mapping) - 1; + + self.__presence_attr = None + self.__eeprom_path = None + if self.__index in range(0, self.__port_end + 1): + self.__presence_attr = "/sys/class/swps/port{}/present".format(self.__index) + self.__lpmode_attr = "/sys/class/swps/port{}/lpmod".format(self.__index) + self.__reset_attr = "/sys/class/swps/port{}/reset".format(self.__index) + self.__eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom".format(self.__port_to_i2c_mapping[self.__index]) + + SfpBase.__init__(self) + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def __is_host(self): + return os.system("docker > /dev/null 2>&1") == 0 + + def __get_path_to_port_config_file(self): + host_platform_root_path = '/usr/share/sonic/device' + docker_hwsku_path = '/usr/share/sonic/hwsku' + + host_platform_path = "/".join([host_platform_root_path, self.__platform]) + hwsku_path = "/".join([host_platform_path, self.__hwsku]) if self.__is_host() else docker_hwsku_path + + return "/".join([hwsku_path, "port_config.ini"]) + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + sysfsfile_eeprom = None + eeprom_raw = [] + + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + sysfs_eeprom_path = self.__eeprom_path + try: + sysfsfile_eeprom = open(sysfs_eeprom_path, mode="rb", buffering=0) + sysfsfile_eeprom.seek(offset) + raw = sysfsfile_eeprom.read(num_bytes) + raw_len = len(raw) + for n in range(0, raw_len): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except: + pass + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + + return eeprom_raw + + def __convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + name = None + + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings(self.__get_path_to_port_config_file()) + name = sfputil_helper.logical[self.__index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_path = self.__presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 0): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("modelname", "N/A") + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("serialnum", "N/A") + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and not self.get_reset_status() + +############################################## +# SFP methods +############################################## + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + mominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + + transceiver_info_dict_keys = ['type', 'hardwarerev', + 'serialnum', 'manufacturename', + 'modelname', 'Connector', + 'encoding', 'ext_identifier', + 'ext_rateselect_compliance', 'cable_type', + 'cable_length', 'nominal_bit_rate', + 'specification_compliance', 'vendor_date', + 'vendor_oui'] + + qsfp_cable_length_tup = ('Length(km)', 'Length OM3(2m)', + 'Length OM2(m)', 'Length OM1(m)', 'Length Cable Assembly(m)') + + qsfp_compliance_code_tup = ('10/40G Ethernet Compliance Code', 'SONET Compliance codes', + 'SAS/SATA compliance codes', 'Gigabit Ethernet Compliant codes', + 'Fibre Channel link length/Transmitter Technology', 'Fibre Channel transmission media', + 'Fibre Channel Speed') + + sfpi_obj = sff8436InterfaceId() + if not self.get_presence() or not sfpi_obj: + return {} + + offset = INFO_OFFSET + + sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes((offset + XCVR_INTFACE_BULK_OFFSET), XCVR_INTFACE_BULK_WIDTH_QSFP) + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw, 0) + + sfp_vendor_name_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) + + sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) + + sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes((offset + XCVR_HW_REV_OFFSET), XCVR_HW_REV_WIDTH_QSFP) + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) + + sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) + + sfp_vendor_oui_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) + if sfp_vendor_oui_raw is not None: + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_vendor_oui_raw, 0) + + sfp_vendor_date_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) + sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_vendor_date_raw, 0) + + transceiver_info_dict = dict.fromkeys(transceiver_info_dict_keys, 'N/A') + + if sfp_interface_bulk_data: + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + transceiver_info_dict['type_abbrv_name'] = sfp_interface_bulk_data['data']['type_abbrv_name']['value'] + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value']) + + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] if sfp_vendor_name_data else 'N/A' + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] if sfp_vendor_pn_data else 'N/A' + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] if sfp_vendor_rev_data else 'N/A' + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] if sfp_vendor_sn_data else 'N/A' + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] if sfp_vendor_oui_data else 'N/A' + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] if sfp_vendor_date_data else 'N/A' + + transceiver_info_dict['cable_type'] = "Unknown" + transceiver_info_dict['cable_length'] = "Unknown" + for key in qsfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + + compliance_code_dict = dict() + for key in qsfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + return transceiver_info_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. + tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. + reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. + lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. + tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. + tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 + | |to channel 3. + temperature |INT |module temperature in Celsius + voltage |INT |supply voltage in mV + txbias |INT |TX Bias Current in mA, n is the channel number, + | |for example, tx2bias stands for tx bias of channel 2. + rxpower |INT |received optical power in mW, n is the channel number, + | |for example, rx2power stands for rx power of channel 2. + txpower |INT |TX output power in mW, n is the channel number, + | |for example, tx2power stands for tx power of channel 2. + ======================================================================== + """ + transceiver_dom_info_dict_keys = ['rx_los', 'tx_fault', + 'reset_status', 'power_lpmode', + 'tx_disable', 'tx_disable_channel', + 'temperature', 'voltage', + 'rx1power', 'rx2power', + 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', + 'tx3bias', 'tx4bias', + 'tx1power', 'tx2power', + 'tx3power', 'tx4power'] + + sfpd_obj = sff8436Dom() + sfpi_obj = sff8436InterfaceId() + + if not self.get_presence() or not sfpi_obj or not sfpd_obj: + return {} + + transceiver_dom_info_dict = dict.fromkeys(transceiver_dom_info_dict_keys, 'N/A') + offset = DOM_OFFSET + offset_xcvr = INFO_OFFSET + + # QSFP capability byte parse, through this byte can know whether it support tx_power or not. + # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, + # need to add more code for determining the capability and version compliance + # in SFF-8636 dom capability definitions evolving with the versions. + qsfp_dom_capability_raw = self.__read_eeprom_specific_bytes((offset_xcvr + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) + if qsfp_dom_capability_raw is not None: + qspf_dom_capability_data = sfpi_obj.parse_qsfp_dom_capability(qsfp_dom_capability_raw, 0) + else: + return None + + dom_temperature_raw = self.__read_eeprom_specific_bytes((offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + + dom_voltage_raw = self.__read_eeprom_specific_bytes((offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + qsfp_dom_rev_raw = self.__read_eeprom_specific_bytes((offset + QSFP_DOM_REV_OFFSET), QSFP_DOM_REV_WIDTH) + if qsfp_dom_rev_raw is not None: + qsfp_dom_rev_data = sfpd_obj.parse_sfp_dom_rev(qsfp_dom_rev_raw, 0) + qsfp_dom_rev = qsfp_dom_rev_data['data']['dom_rev']['value'] + + # The tx_power monitoring is only available on QSFP which compliant with SFF-8636 + # and claimed that it support tx_power with one indicator bit. + dom_channel_monitor_data = {} + dom_channel_monitor_raw = None + qsfp_tx_power_support = qspf_dom_capability_data['data']['Tx_power_support']['value'] + if (qsfp_dom_rev[0:8] != 'SFF-8636' or (qsfp_dom_rev[0:8] == 'SFF-8636' and qsfp_tx_power_support != 'on')): + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + + else: + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0) + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TX1Power']['value'] + transceiver_dom_info_dict['tx2power'] = dom_channel_monitor_data['data']['TX2Power']['value'] + transceiver_dom_info_dict['tx3power'] = dom_channel_monitor_data['data']['TX3Power']['value'] + transceiver_dom_info_dict['tx4power'] = dom_channel_monitor_data['data']['TX4Power']['value'] + + if dom_channel_monitor_raw: + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RX1Power']['value'] + transceiver_dom_info_dict['rx2power'] = dom_channel_monitor_data['data']['RX2Power']['value'] + transceiver_dom_info_dict['rx3power'] = dom_channel_monitor_data['data']['RX3Power']['value'] + transceiver_dom_info_dict['rx4power'] = dom_channel_monitor_data['data']['RX4Power']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value'] + transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value'] + transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value'] + transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value'] + + for key in transceiver_dom_info_dict: + transceiver_dom_info_dict[key] = self.__convert_string_to_num(transceiver_dom_info_dict[key]) + + transceiver_dom_info_dict['rx_los'] = self.get_rx_los() + transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() + transceiver_dom_info_dict['reset_status'] = self.get_reset_status() + transceiver_dom_info_dict['tx_disable'] = self.get_tx_disable() + transceiver_dom_info_dict['tx_disable_channel'] = self.get_tx_disable_channel() + transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() + + + return transceiver_dom_info_dict + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. + templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. + temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. + templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. + vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. + vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. + vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. + vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. + rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. + rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. + rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. + rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. + txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. + txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. + txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. + txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. + txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. + txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. + txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. + txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. + ======================================================================== + """ + transceiver_dom_threshold_info_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning'] + + sfpd_obj = sff8436Dom() + if not self.get_presence() or not sfpd_obj: + return {} + + transceiver_dom_threshold_dict = dict.fromkeys(transceiver_dom_threshold_info_dict_keys, 'N/A') + offset = THRE_OFFSET + + dom_module_threshold_raw = self.__read_eeprom_specific_bytes((offset + QSFP_MODULE_THRESHOLD_OFFSET), QSFP_MODULE_THRESHOLD_WIDTH) + if dom_module_threshold_raw: + module_threshold_values = sfpd_obj.parse_module_threshold_values(dom_module_threshold_raw, 0) + module_threshold_data = module_threshold_values.get('data') + if module_threshold_data: + transceiver_dom_threshold_dict['temphighalarm'] = module_threshold_data['TempHighAlarm']['value'] + transceiver_dom_threshold_dict['templowalarm'] = module_threshold_data['TempLowAlarm']['value'] + transceiver_dom_threshold_dict['temphighwarning'] = module_threshold_data['TempHighWarning']['value'] + transceiver_dom_threshold_dict['templowwarning'] = module_threshold_data['TempLowWarning']['value'] + transceiver_dom_threshold_dict['vcchighalarm'] = module_threshold_data['VccHighAlarm']['value'] + transceiver_dom_threshold_dict['vcclowalarm'] = module_threshold_data['VccLowAlarm']['value'] + transceiver_dom_threshold_dict['vcchighwarning'] = module_threshold_data['VccHighWarning']['value'] + transceiver_dom_threshold_dict['vcclowwarning'] = module_threshold_data['VccLowWarning']['value'] + + dom_channel_thres_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNEL_THRESHOLD_OFFSET), QSFP_CHANNEL_THRESHOLD_WIDTH) + channel_threshold_values = sfpd_obj.parse_channel_threshold_values(dom_channel_thres_raw, 0) + channel_threshold_data = channel_threshold_values.get('data') + if channel_threshold_data: + transceiver_dom_threshold_dict['rxpowerhighalarm'] = channel_threshold_data['RxPowerHighAlarm']['value'] + transceiver_dom_threshold_dict['rxpowerlowalarm'] = channel_threshold_data['RxPowerLowAlarm']['value'] + transceiver_dom_threshold_dict['rxpowerhighwarning'] = channel_threshold_data['RxPowerHighWarning']['value'] + transceiver_dom_threshold_dict['rxpowerlowwarning'] = channel_threshold_data['RxPowerLowWarning']['value'] + transceiver_dom_threshold_dict['txpowerhighalarm'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerlowalarm'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerhighwarning'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerlowwarning'] = "0.0dBm" + transceiver_dom_threshold_dict['txbiashighalarm'] = channel_threshold_data['TxBiasHighAlarm']['value'] + transceiver_dom_threshold_dict['txbiaslowalarm'] = channel_threshold_data['TxBiasLowAlarm']['value'] + transceiver_dom_threshold_dict['txbiashighwarning'] = channel_threshold_data['TxBiasHighWarning']['value'] + transceiver_dom_threshold_dict['txbiaslowwarning'] = channel_threshold_data['TxBiasLowWarning']['value'] + + for key in transceiver_dom_threshold_dict: + transceiver_dom_threshold_dict[key] = self.__convert_string_to_num(transceiver_dom_threshold_dict[key]) + + return transceiver_dom_threshold_dict + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + + Returns: + A Boolean, True if reset enabled, False if disabled + """ + reset_status = False + attr_path = self.__reset_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 0): + reset_status = True + + return reset_status + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + rx_los = False + rx_los_list = [] + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(QSFP_CHANNL_RX_LOS_STATUS_OFFSET, QSFP_CHANNL_RX_LOS_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + rx_los_data = int(dom_channel_monitor_raw[0], 16) + rx_los_list.append(rx_los_data & 0x01 != 0) + rx_los_list.append(rx_los_data & 0x02 != 0) + rx_los_list.append(rx_los_data & 0x04 != 0) + rx_los_list.append(rx_los_data & 0x08 != 0) + rx_los = rx_los_list[0] and rx_los_list[1] and rx_los_list[2] and rx_los_list[3] + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + tx_fault = False + tx_fault_list = [] + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(QSFP_CHANNL_TX_FAULT_STATUS_OFFSET, QSFP_CHANNL_TX_FAULT_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + tx_fault_data = int(dom_channel_monitor_raw[0], 16) + tx_fault_list.append(tx_fault_data & 0x01 != 0) + tx_fault_list.append(tx_fault_data & 0x02 != 0) + tx_fault_list.append(tx_fault_data & 0x04 != 0) + tx_fault_list.append(tx_fault_data & 0x08 != 0) + tx_fault = tx_fault_list[0] and tx_fault_list[1] and tx_fault_list[2] and tx_fault_list[3] + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + """ + tx_disable = False + tx_disable_list = [] + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return tx_disable + + dom_control_raw = self.__read_eeprom_specific_bytes(QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + tx_disable_list.append('On' == dom_control_data['data']['TX1Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX2Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX3Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX4Disable']['value']) + tx_disable = tx_disable_list[0] and tx_disable_list[1] and tx_disable_list[2] and tx_disable_list[3] + + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + tx_disable_channel = 0 + tx_disable_list = [] + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return tx_disable_channel + + dom_control_raw = self.__read_eeprom_specific_bytes(QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + tx_disable_list.append('On' == dom_control_data['data']['TX1Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX2Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX3Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX4Disable']['value']) + + for i in range(len(tx_disable_list)): + if tx_disable_list[i]: + tx_disable_channel |= 1 << i + + return tx_disable_channel + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + lpmode = False + attr_path = self.__lpmode_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 1): + lpmode = True + + return lpmode + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + power_override = False + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return power_override + + dom_control_raw = self.__read_eeprom_specific_bytes(QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + power_override = ('On' == dom_control_data['data']['PowerOverride']['value']) + + return power_override + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + + Returns: + An integer number of current temperature in Celsius + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("temperature", "N/A") + + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + + Returns: + An integer number of supply voltage in mV + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("voltage", "N/A") + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_bs = transceiver_dom_info_dict.get("tx1bias", "N/A") + tx2_bs = transceiver_dom_info_dict.get("tx2bias", "N/A") + tx3_bs = transceiver_dom_info_dict.get("tx3bias", "N/A") + tx4_bs = transceiver_dom_info_dict.get("tx4bias", "N/A") + return [tx1_bs, tx2_bs, tx3_bs, tx4_bs] if transceiver_dom_info_dict else [] + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + rx1_pw = transceiver_dom_info_dict.get("rx1power", "N/A") + rx2_pw = transceiver_dom_info_dict.get("rx2power", "N/A") + rx3_pw = transceiver_dom_info_dict.get("rx3power", "N/A") + rx4_pw = transceiver_dom_info_dict.get("rx4power", "N/A") + return [rx1_pw, rx2_pw, rx3_pw, rx4_pw] if transceiver_dom_info_dict else [] + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_pw = transceiver_dom_info_dict.get("tx1power", "N/A") + tx2_pw = transceiver_dom_info_dict.get("tx2power", "N/A") + tx3_pw = transceiver_dom_info_dict.get("tx3power", "N/A") + tx4_pw = transceiver_dom_info_dict.get("tx4power", "N/A") + return [tx1_pw, tx2_pw, tx3_pw, tx4_pw] + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + + Returns: + A boolean, True if successful, False if not + """ + + try: + reg_file = open(self.__reset_attr, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + try: + reg_file = open(self.__reset_attr, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + sysfs_eeprom_path = self.__eeprom_path + sysfsfile_eeprom = None + try: + tx_disable_ctl = 0xf if tx_disable else 0x0 + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom = open(sysfs_eeprom_path, "r+b") + sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + + Returns: + A boolean, True if successful, False if not + """ + sysfs_eeprom_path = self.__eeprom_path + sysfsfile_eeprom = None + try: + channel_state = self.get_tx_disable_channel() + tx_enable_mask = [0xe, 0xd, 0xb, 0x7] + tx_disable_mask = [0x1, 0x3, 0x7, 0xf] + tx_disable_ctl = channel_state | tx_disable_mask[channel] if disable else channel_state & tx_enable_mask[channel] + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom = open(sysfs_eeprom_path, "r+b") + sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + try: + reg_file = open(self.__lpmode_attr, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + sysfs_eeprom_path = self.__eeprom_path + sysfsfile_eeprom = None + try: + power_override_bit = 0 + if power_override: + power_override_bit |= 1 << 0 + + power_set_bit = 0 + if power_set: + power_set_bit |= 1 << 1 + + buffer = create_string_buffer(1) + buffer[0] = chr(power_override_bit | power_set_bit) + # Write to eeprom + sysfsfile_eeprom = open(sysfs_eeprom_path, "r+b") + sysfsfile_eeprom.seek(QSFP_POWEROVERRIDE_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/sfp.py new file mode 100644 index 00000000000..637a59d1b49 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/sfp.py @@ -0,0 +1,745 @@ +#!/usr/bin/env python +# +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the QSFP information +# +# version: 1.0 +############################################################################# + +try: + import os + import sys + from ctypes import create_string_buffer + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8472 import sff8472Dom + from sonic_platform_base.sonic_sfp.sff8472 import sff8472InterfaceId + from sonic_platform_base.sonic_sfp.sff8472 import sffbase + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +INFO_OFFSET = 0 +DOM_OFFSET = 256 + +XCVR_INTFACE_BULK_OFFSET = 0 +XCVR_INTFACE_BULK_WIDTH_SFP = 21 +XCVR_VENDOR_NAME_OFFSET = 20 +XCVR_VENDOR_NAME_WIDTH = 16 +XCVR_VENDOR_OUI_OFFSET = 37 +XCVR_VENDOR_OUI_WIDTH = 3 +XCVR_VENDOR_PN_OFFSET = 40 +XCVR_VENDOR_PN_WIDTH = 16 +XCVR_HW_REV_OFFSET = 56 +XCVR_HW_REV_WIDTH_SFP = 4 +XCVR_VENDOR_SN_OFFSET = 68 +XCVR_VENDOR_SN_WIDTH = 16 +XCVR_VENDOR_DATE_OFFSET = 84 +XCVR_VENDOR_DATE_WIDTH = 8 +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 1 + +# Offset for values in SFP eeprom +SFP_TEMPE_OFFSET = 96 +SFP_TEMPE_WIDTH = 2 +SFP_VOLT_OFFSET = 98 +SFP_VOLT_WIDTH = 2 +SFP_CHANNL_MON_OFFSET = 100 +SFP_CHANNL_MON_WIDTH = 6 +SFP_MODULE_THRESHOLD_OFFSET = 0 +SFP_MODULE_THRESHOLD_WIDTH = 40 +SFP_CHANNL_THRESHOLD_OFFSET = 112 +SFP_CHANNL_THRESHOLD_WIDTH = 2 +SFP_STATUS_CONTROL_OFFSET = 110 +SFP_STATUS_CONTROL_WIDTH = 1 +SFP_TX_DISABLE_HARD_BIT = 7 +SFP_TX_DISABLE_SOFT_BIT = 6 + +class Sfp(SfpBase): + + def __init__(self, index): + self.__index = index + + self.__platform = "x86_64-inventec_d7264-r0" + self.__hwsku = "INVENTEC-D7264" + + self.__port_to_i2c_mapping = { + 0:100, 1:101, 2:102, 3:103, 4:104, 5:105, 6:106, 7:107, + 8:108, 9:109, 10:110, 11:111, 12:112, 13:113, 14:114, 15:115, + 16:116, 17:117, 18:118, 19:119, 20:120, 21:121, 22:122, 23:123, + 24:124, 25:125, 26:126, 27:127, 28:128, 29:129, 30:130, 31:131, + 32:135, 33:134, 34:133, 35:132, 36:139, 37:138, 38:137, 39:136, + 40:143, 41:142, 42:141, 43:140, 44:147, 45:146, 46:145, 47:144, + 48:151, 49:150, 50:149, 51:148, 52:155, 53:154, 54:153, 55:152, + 56:159, 57:158, 58:157, 59:156, 60:163, 61:162, 62:161, 63:160 + } + self.__port_end = len(self.__port_to_i2c_mapping) - 1; + + self.__presence_attr = None + self.__eeprom_path = None + if self.__index in range(0, self.__port_end + 1): + self.__presence_attr = "/sys/class/swps/port{}/present".format(self.__index) + self.__eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom".format(self.__port_to_i2c_mapping[self.__index]) + + SfpBase.__init__(self) + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def __is_host(self): + return os.system("docker > /dev/null 2>&1") == 0 + + def __get_path_to_port_config_file(self): + host_platform_root_path = '/usr/share/sonic/device' + docker_hwsku_path = '/usr/share/sonic/hwsku' + + host_platform_path = "/".join([host_platform_root_path, self.__platform]) + hwsku_path = "/".join([host_platform_path, self.__hwsku]) if self.__is_host() else docker_hwsku_path + + return "/".join([hwsku_path, "port_config.ini"]) + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + sysfsfile_eeprom = None + eeprom_raw = [] + + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + sysfs_eeprom_path = self.__eeprom_path + try: + sysfsfile_eeprom = open(sysfs_eeprom_path, mode="rb", buffering=0) + sysfsfile_eeprom.seek(offset) + raw = sysfsfile_eeprom.read(num_bytes) + raw_len = len(raw) + for n in range(0, raw_len): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except: + pass + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + + return eeprom_raw + + def __convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + name = None + + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings(self.__get_path_to_port_config_file()) + name = sfputil_helper.logical[self.__index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_path = self.__presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 0): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("modelname", "N/A") + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("serialnum", "N/A") + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and not self.get_reset_status() + +############################################## +# SFP methods +############################################## + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + mominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + + transceiver_info_dict_keys = ['type', 'hardwarerev', + 'serialnum', 'manufacturename', + 'modelname', 'Connector', + 'encoding', 'ext_identifier', + 'ext_rateselect_compliance', 'cable_type', + 'cable_length', 'nominal_bit_rate', + 'specification_compliance', 'vendor_date', + 'vendor_oui'] + + sfp_cable_length_tup = ('LengthSMFkm-UnitsOfKm', 'LengthSMF(UnitsOf100m)', + 'Length50um(UnitsOf10m)', 'Length62.5um(UnitsOfm)', + 'LengthCable(UnitsOfm)', 'LengthOM3(UnitsOf10m)') + + sfp_compliance_code_tup = ('10GEthernetComplianceCode', 'InfinibandComplianceCode', + 'ESCONComplianceCodes', 'SONETComplianceCodes', + 'EthernetComplianceCodes', 'FibreChannelLinkLength', + 'FibreChannelTechnology', 'SFP+CableTechnology', + 'FibreChannelTransmissionMedia', 'FibreChannelSpeed') + + sfpi_obj = sff8472InterfaceId() + if not self.get_presence() or not sfpi_obj: + return {} + + offset = INFO_OFFSET + + sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes((offset + XCVR_INTFACE_BULK_OFFSET), XCVR_INTFACE_BULK_WIDTH_SFP) + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw, 0) + + sfp_vendor_name_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) + + sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) + + sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes((offset + XCVR_HW_REV_OFFSET), XCVR_HW_REV_WIDTH_SFP) + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) + + sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) + + sfp_vendor_oui_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) + if sfp_vendor_oui_raw is not None: + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_vendor_oui_raw, 0) + + sfp_vendor_date_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) + sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_vendor_date_raw, 0) + + transceiver_info_dict = dict.fromkeys(transceiver_info_dict_keys, 'N/A') + + if sfp_interface_bulk_data: + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + transceiver_info_dict['type_abbrv_name'] = sfp_interface_bulk_data['data']['type_abbrv_name']['value'] + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['NominalSignallingRate(UnitsOf100Mbd)']['value']) + + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] if sfp_vendor_name_data else 'N/A' + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] if sfp_vendor_pn_data else 'N/A' + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] if sfp_vendor_rev_data else 'N/A' + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] if sfp_vendor_sn_data else 'N/A' + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] if sfp_vendor_oui_data else 'N/A' + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] if sfp_vendor_date_data else 'N/A' + + transceiver_info_dict['cable_type'] = "Unknown" + transceiver_info_dict['cable_length'] = "Unknown" + for key in sfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + + compliance_code_dict = dict() + for key in sfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + return transceiver_info_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. + tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. + reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. + lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. + tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. + tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 + | |to channel 3. + temperature |INT |module temperature in Celsius + voltage |INT |supply voltage in mV + txbias |INT |TX Bias Current in mA, n is the channel number, + | |for example, tx2bias stands for tx bias of channel 2. + rxpower |INT |received optical power in mW, n is the channel number, + | |for example, rx2power stands for rx power of channel 2. + txpower |INT |TX output power in mW, n is the channel number, + | |for example, tx2power stands for tx power of channel 2. + ======================================================================== + """ + transceiver_dom_info_dict_keys = ['rx_los', 'tx_fault', + 'reset_status', 'power_lpmode', + 'tx_disable', 'tx_disable_channel', + 'temperature', 'voltage', + 'rx1power', 'rx2power', + 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', + 'tx3bias', 'tx4bias', + 'tx1power', 'tx2power', + 'tx3power', 'tx4power'] + + sfpd_obj = sff8472Dom() + if not self.get_presence() or not sfpd_obj: + return {} + + eeprom_ifraw = self.__read_eeprom_specific_bytes(0, DOM_OFFSET) + sfpi_obj = sff8472InterfaceId(eeprom_ifraw) + cal_type = sfpi_obj.get_calibration_type() + sfpd_obj._calibration_type = cal_type + + offset = DOM_OFFSET + transceiver_dom_info_dict = dict.fromkeys(transceiver_dom_info_dict_keys, 'N/A') + + dom_temperature_raw = self.__read_eeprom_specific_bytes((offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + + dom_voltage_raw = self.__read_eeprom_specific_bytes((offset + SFP_VOLT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes((offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_voltage_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + transceiver_dom_info_dict['tx1power'] = dom_voltage_data['data']['TXPower']['value'] + transceiver_dom_info_dict['rx1power'] = dom_voltage_data['data']['RXPower']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_voltage_data['data']['TXBias']['value'] + + for key in transceiver_dom_info_dict: + transceiver_dom_info_dict[key] = self.__convert_string_to_num(transceiver_dom_info_dict[key]) + + transceiver_dom_info_dict['reset_status'] = self.get_reset_status() + transceiver_dom_info_dict['rx_los'] = self.get_rx_los() + transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() + transceiver_dom_info_dict['tx_disable'] = self.get_tx_disable() + transceiver_dom_info_dict['tx_disable_channel'] = self.get_tx_disable_channel() + transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() + + return transceiver_dom_info_dict + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. + templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. + temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. + templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. + vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. + vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. + vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. + vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. + rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. + rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. + rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. + rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. + txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. + txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. + txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. + txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. + txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. + txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. + txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. + txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. + ======================================================================== + """ + transceiver_dom_threshold_info_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning'] + + sfpd_obj = sff8472Dom() + + if not self.get_presence() and not sfpd_obj: + return {} + + eeprom_ifraw = self.__read_eeprom_specific_bytes(0, DOM_OFFSET) + sfpi_obj = sff8472InterfaceId(eeprom_ifraw) + cal_type = sfpi_obj.get_calibration_type() + sfpd_obj._calibration_type = cal_type + + offset = DOM_OFFSET + transceiver_dom_threshold_info_dict = dict.fromkeys(transceiver_dom_threshold_info_dict_keys, 'N/A') + dom_module_threshold_raw = self.__read_eeprom_specific_bytes((offset + SFP_MODULE_THRESHOLD_OFFSET), SFP_MODULE_THRESHOLD_WIDTH) + if dom_module_threshold_raw is not None: + dom_module_threshold_data = sfpd_obj.parse_alarm_warning_threshold(dom_module_threshold_raw, 0) + + transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] + transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] + transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] + transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] + + transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VoltageHighAlarm']['value'] + transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VoltageLowAlarm']['value'] + transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VoltageHighWarning']['value'] + transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VoltageLowWarning']['value'] + + transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_module_threshold_data['data']['BiasHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_module_threshold_data['data']['BiasLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_module_threshold_data['data']['BiasHighWarning']['value'] + transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_module_threshold_data['data']['BiasLowWarning']['value'] + + transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_module_threshold_data['data']['TXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_module_threshold_data['data']['TXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_module_threshold_data['data']['TXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_module_threshold_data['data']['TXPowerLowWarning']['value'] + + transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_module_threshold_data['data']['RXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_module_threshold_data['data']['RXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_module_threshold_data['data']['RXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_module_threshold_data['data']['RXPowerLowWarning']['value'] + + for key in transceiver_dom_threshold_info_dict: + transceiver_dom_threshold_info_dict[key] = self.__convert_string_to_num(transceiver_dom_threshold_info_dict[key]) + + return transceiver_dom_threshold_info_dict + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + + Returns: + A Boolean, True if reset enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + rx_los = False + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + rx_los = (sffbase().test_bit(data, 1) != 0) + + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + tx_fault = False + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + tx_fault = (sffbase().test_bit(data, 2) != 0) + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + """ + tx_disable = False + tx_fault = False + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + tx_disable_hard = (sffbase().test_bit(data, SFP_TX_DISABLE_HARD_BIT) != 0) + tx_disable_soft = (sffbase().test_bit(data, SFP_TX_DISABLE_SOFT_BIT) != 0) + tx_disable = tx_disable_hard | tx_disable_soft + + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + # SFP doesn't support this feature + return 0 + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + + Returns: + An integer number of current temperature in Celsius + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("temperature", "N/A") + + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + + Returns: + An integer number of supply voltage in mV + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("voltage", "N/A") + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_bs = transceiver_dom_info_dict.get("tx1bias", "N/A") + return [tx1_bs, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + rx1_pw = transceiver_dom_info_dict.get("rx1power", "N/A") + return [rx1_pw, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_pw = transceiver_dom_info_dict.get("tx1power", "N/A") + return [tx1_pw, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + + Returns: + A boolean, True if successful, False if not + """ + # SFP doesn't support this feature + return False + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + sysfs_eeprom_path = self.__eeprom_path + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw is not None: + # Set bit 6 for Soft TX Disable Select + # 01000000 = 64 and 10111111 = 191 + tx_disable_bit = 64 if tx_disable else 191 + status_control = int(status_control_raw[0], 16) + tx_disable_ctl = (status_control | tx_disable_bit) if tx_disable else (status_control & tx_disable_bit) + try: + sysfsfile_eeprom = open(sysfs_eeprom_path, mode="r+b", buffering=0) + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom.seek(SFP_STATUS_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except: + #print("Error: unable to open file: %s" % str(e)) + return False + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + return False + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + + Returns: + A boolean, True if successful, False if not + """ + # SFP doesn't support this feature + return False + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + # SFP doesn't support this feature + return False + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + # SFP doesn't support this feature + return False + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/thermal.py new file mode 100644 index 00000000000..d92769858c3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/thermal.py @@ -0,0 +1,183 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Thermal information +# +# version: 1.0 +############################################################################# + +import os + +try: + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +############### +# Global +############### +HWMON_PATH = "/sys/class/hwmon/hwmon2/" +THERMAL_NAME_LIST = [ + "FrontSide Temperature", + "FanBoard Temperature", + "NearASIC Temperature", + "Center(U10) Temperature", + "CPU Board Temperature", + "ASIC Temperature" +] + +class Thermal(ThermalBase): + """Platform-specific Thermal class""" + + def __init__(self, thermal_index): + self.index = thermal_index + self.thermal_tmp = "temp{}_input".format(self.index+1) + + + ####################### + # private function + ####################### + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + + #################### + # Device base + #################### + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return THERMAL_NAME_LIST[self.index] + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + attr_path = HWMON_PATH + self.thermal_tmp + return os.path.isfile(attr_path) + + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + raise NotImplementedError + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + raise NotImplementedError + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + status = False + if (self.get_presence and self.get_temperature > 0): + status = True + + return status + + + #################### + # Device base + #################### + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + temperature = 0.0 + attr_path = HWMON_PATH + self.thermal_tmp + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + temperature = float(attr_rv) / 1000 + + return temperature + + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + + Returns: + A float number, the high threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + raise NotImplementedError + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + + Returns: + A float number, the low threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + raise NotImplementedError + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + raise NotImplementedError + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/transceiver_event.py b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/transceiver_event.py new file mode 100644 index 00000000000..7105e7f2119 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/transceiver_event.py @@ -0,0 +1,115 @@ +#!/usr/bin/env python +# +# Name: transceiver_event.py, version: 1.0 +# + +try: + import time + import socket + import re + import os + from collections import OrderedDict +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class NetlinkEventMonitor(object): + __instance = None + + def __new__(cls, *args, **kwargs): + if not cls.__instance: + # print(cls) + cls.__instance = super(NetlinkEventMonitor, cls).__new__(cls) + cls.__instance.__recieved_events = OrderedDict() + return cls.__instance + + def __init__(self, timeout): + # print('__init__', self) + NETLINK_KOBJECT_UEVENT = 15 + self.__socket = socket.socket(socket.AF_NETLINK, socket.SOCK_DGRAM, NETLINK_KOBJECT_UEVENT) + self.__timeout = timeout + + def start(self): + # print('start', self.__timeout) + self.__socket.bind((os.getpid(), -1)) + if 0 == self.__timeout: + self.__socket.settimeout(None) + else: + self.__socket.settimeout(self.__timeout/1000.0) + + def stop(self): + self.__socket.close() + + def __enter__(self): + # print('__enter__', self) + self.start() + return self + + def __exit__(self, exc_type, exc_value, traceback): + # print('__exit__', self) + self.stop() + + def __iter__(self): + # print('__iter__', self) + while True: + for item in self.next_events(): + yield item + + def next_events(self): + try: + data = self.__socket.recv(16384) + event = {} + for item in data.split(b'\x00'): + if not item: + # check if we have an event and if we already received it + if event and 'SEQNUM' in event: + event_seqnum = event['SEQNUM'] + if event_seqnum in self.__recieved_events: + pass + else: + # print("=", event_seqnum) + self.__recieved_events[event_seqnum] = event + length = len(self.__recieved_events) + # print("=", length) + if (length > 100): + self.__recieved_events.popitem(last=False) + yield event + event = {} + else: + try: + k, v = item.split(b'=', 1) + event[k.decode('ascii')] = v.decode('ascii') + # print("=",k,v) + except ValueError: + pass + except Exception: + yield {} + +class TransceiverEvent(object): + + def __init__(self): + pass + + def get_transceiver_change_event(self, timeout=0): + port_dict = {} + with NetlinkEventMonitor(timeout) as netlink_monitor: + for event in netlink_monitor: + if event and 'SUBSYSTEM' in event: + if event['SUBSYSTEM'] == 'swps': + #print('SWPS event. From %s, ACTION %s, IF_TYPE %s, IF_LANE %s' % (event['DEVPATH'], event['ACTION'], event['IF_TYPE'], event['IF_LANE'])) + portname = event['DEVPATH'].split("/")[-1] + rc = re.match(r"port(?P\d+)",portname) + if rc is not None: + if event['ACTION'] == "remove": + remove_num = int(rc.group("num")) + port_dict[remove_num] = "0" + elif event['ACTION'] == "add": + add_num = int(rc.group("num")) + port_dict[add_num] = "1" + return True, port_dict + else: + return False, {} + else: + pass + else: + return True, {} diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/watchdog.py new file mode 100644 index 00000000000..b7e91ba124c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/sonic_platform/watchdog.py @@ -0,0 +1,235 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Watchdog information +# +############################################################################# + +import ctypes +import fcntl +import os +import subprocess +import time +import array + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +""" ioctl constants """ +IO_WRITE = 0x40000000 +IO_READ = 0x80000000 +IO_READ_WRITE = 0xC0000000 +IO_SIZE_INT = 0x00040000 +IO_SIZE_40 = 0x00280000 +IO_TYPE_WATCHDOG = ord('W') << 8 + +WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG +WDR_40 = IO_READ | IO_SIZE_40 | IO_TYPE_WATCHDOG +WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG + +""" Watchdog ioctl commands """ +WDIOC_GETSUPPORT = 0 | WDR_40 +WDIOC_GETSTATUS = 1 | WDR_INT +WDIOC_GETBOOTSTATUS = 2 | WDR_INT +WDIOC_GETTEMP = 3 | WDR_INT +WDIOC_SETOPTIONS = 4 | WDR_INT +WDIOC_KEEPALIVE = 5 | WDR_INT +WDIOC_SETTIMEOUT = 6 | WDWR_INT +WDIOC_GETTIMEOUT = 7 | WDR_INT +WDIOC_SETPRETIMEOUT = 8 | WDWR_INT +WDIOC_GETPRETIMEOUT = 9 | WDR_INT +WDIOC_GETTIMELEFT = 10 | WDR_INT + +""" Watchdog status constants """ +WDIOS_DISABLECARD = 0x0001 +WDIOS_ENABLECARD = 0x0002 + +WDT_COMMON_ERROR = -1 +WD_MAIN_IDENTITY = "iTCO_wdt" +WDT_SYSFS_PATH = "/sys/class/watchdog/" + + +class Watchdog(WatchdogBase): + + def __init__(self): + + self.watchdog, self.wdt_main_dev_name = self._get_wdt() + self.status_path = "/sys/class/watchdog/%s/status" % self.wdt_main_dev_name + self.state_path = "/sys/class/watchdog/%s/state" % self.wdt_main_dev_name + self.timeout_path = "/sys/class/watchdog/%s/timeout" % self.wdt_main_dev_name + # Set default value + self._disable() + self.armed = False + self.timeout = self._gettimeout(self.timeout_path) + + def _is_wd_main(self, dev): + """ + Checks watchdog identity + """ + identity = self._read_file( + "{}/{}/identity".format(WDT_SYSFS_PATH, dev)) + return identity == WD_MAIN_IDENTITY + + def _get_wdt(self): + """ + Retrieves watchdog device + """ + wdt_main_dev_list = [dev for dev in os.listdir( + "/dev/") if dev.startswith("watchdog") and self._is_wd_main(dev)] + if not wdt_main_dev_list: + return None + wdt_main_dev_name = wdt_main_dev_list[0] + watchdog_device_path = "/dev/{}".format(wdt_main_dev_name) + watchdog = os.open(watchdog_device_path, os.O_RDWR) + return watchdog, wdt_main_dev_name + + def _read_file(self, file_path): + """ + Read text file + """ + try: + with open(file_path, "r") as fd: + txt = fd.read() + except IOError: + return WDT_COMMON_ERROR + return txt.strip() + + def _enable(self): + """ + Turn on the watchdog timer + """ + req = array.array('h', [WDIOS_ENABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _disable(self): + """ + Turn off the watchdog timer + """ + req = array.array('h', [WDIOS_DISABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE) + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + req = array.array('I', [seconds]) + fcntl.ioctl(self.watchdog, WDIOC_SETTIMEOUT, req, True) + return int(req[0]) + + def _gettimeout(self, timeout_path): + """ + Get watchdog timeout + @return watchdog timeout + """ + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMEOUT, req, True) + + return int(req[0]) + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMELEFT, req, True) + + return int(req[0]) + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + if self.armed: + self._keepalive() + else: + self._enable() + self.armed = True + ret = self.timeout + except IOError as e: + pass + + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + self._disable() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + + timeleft = WDT_COMMON_ERROR + + if self.armed: + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft + + def __del__(self): + """ + Close watchdog + """ + + os.close(self.watchdog) diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264/utils/inventec_d7264_util.py b/platform/broadcom/sonic-platform-modules-inventec/d7264/utils/inventec_d7264_util.py new file mode 100755 index 00000000000..225ff35d84b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264/utils/inventec_d7264_util.py @@ -0,0 +1,262 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Inventec, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install(0) + elif arg == 'fast-reboot-install': + install(1) + elif arg == 'clean': + uninstall() + else: + show_help() + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[D7264]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +"with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +instantiate =[ +'echo inv_eeprom 0x53> /sys/bus/i2c/devices/i2c-0/i2c-2/new_device'] + +# driver list that is needed, include kernal driver and inventec inventec +drivers =[ + 'gpio-ich', + 'lpc_ich', + 'i2c-i801', + 'i2c-mux', + 'i2c-mux-pca954x', + 'i2c-mux-pca9541', + 'i2c-dev', + 'inv_eeprom', + 'inv_psoc', + 'inv_platform', +# 'inv_cpld', # triggered by inv_platform +# 'inv_psu', # triggered by inv_platform +# 'inv_tmp75', # triggered by inv_platform +# 'inv_ucd90160', # triggered by inv_platform + 'inv_pthread', + 'swps' +] + +# modified kernel driver by inventec +kernal_drivers = [ + 'i2c-mux-pca954x', + 'i2c-mux-pca9541' +] + + +def system_install(boot_option): + global FORCE + inv_module_path = "/lib/modules/4.9.0-9-2-amd64/extra" + + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("rmmod i2c_ismt ", 1) + status, output = exec_cmd("rmmod i2c-i801 ", 1) + status, output = exec_cmd("rmmod gpio-ich ", 1) + status, output = exec_cmd("rmmod lpc_ich ", 1) + + #install drivers + for i in range(0,len(drivers)): + if drivers[i] == "gpio-ich": + status, output = exec_cmd("modprobe gpio-ich gpiobase=0", 1) + elif drivers[i] == "swps": + if boot_option == 1: + status, output = exec_cmd("modprobe swps io_no_init=1", 1) + else: + status, output = exec_cmd("modprobe "+drivers[i], 1) + elif drivers[i] in kernal_drivers: + status, output = exec_cmd("insmod {}/{}.ko".format(inv_module_path, drivers[i]), 1) + else: + status, output = exec_cmd("modprobe "+drivers[i], 1) + + if status: + print output + if FORCE == 0: + return status + + #instantiate devices + for i in range(0,len(instantiate)): + time.sleep(1) + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(100,108): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-5/i2c-7/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(108,116): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-5/i2c-8/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(116,124): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-5/i2c-9/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(124,132): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-5/i2c-10/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(132,140): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-5/i2c-11/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(140,148): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-5/i2c-12/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(148,156): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-5/i2c-13/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(156,164): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-5/i2c-14/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + + +def system_ready(): + if not device_found(): + return False + return True + +def install(boot_option=0): + ''' boot_option: 0 - normal, 1 - fast-reboot ''' + if not device_found(): + print "No device, installing...." + status = system_install(boot_option) + if status: + if FORCE == 0: + return status + else: + print " D7264 devices detected...." + return + +def uninstall(): + global FORCE + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + status, output = exec_cmd("rmmod gpio_ich ", 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"*0072", 0) + ret2, log = exec_cmd("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/Makefile b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/Makefile new file mode 100755 index 00000000000..40f2186b3a8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/Makefile @@ -0,0 +1,7 @@ +obj-m += inv_platform.o +obj-m += inv_cpld.o +obj-m += inv_psoc.o +obj-m += inv_eeprom.o +obj-m += inv_pthread.o +obj-m += swps.o +swps-objs := inv_swps.o inv_mux.o io_expander.o transceiver.o diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_cpld.c b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_cpld.c new file mode 100644 index 00000000000..42401d62667 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_cpld.c @@ -0,0 +1,470 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//#include "I2CHostCommunication.h" + +#define USE_SMBUS 1 + +/* definition */ +#define CPLD_INFO_OFFSET 0x00 +#define CPLD_PSU_OFFSET 0x08 +#define CPLD_LED_OFFSET 0x0E +#define CPLD_LED_STATU_OFFSET 0x0D +#define CPLD_CTL_OFFSET 0x0C +#define CPLD_BIOSCS_OFFSET 0x04 + + +/* Each client has this additional data */ +struct cpld_data { + struct device *hwmon_dev; + struct mutex update_lock; +}; + +/*-----------------------------------------------------------------------*/ + +static ssize_t cpld_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg[0].buf = msgbuf; + msg[0].len = 1; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].buf = buf; + msg[1].len = count; + + status = i2c_transfer(client->adapter, msg, 2); + + if(status == 2) + status = count; + + return status; +#endif +} + +static ssize_t cpld_i2c_write(struct i2c_client *client, char *buf, unsigned offset, size_t count) +{ +#if USE_SMBUS + int i; + + for(i=0; iaddr; + msg.flags = 0; + + /* msg.buf is u8 and casts will mask the values */ + msg.buf = writebuf; + + msg.buf[i++] = offset; + memcpy(&msg.buf[i], buf, count); + msg.len = i + count; + + status = i2c_transfer(client->adapter, &msg, 1); + if (status == 1) + status = count; + + return status; +#endif +} + +/*-----------------------------------------------------------------------*/ + +/* sysfs attributes for hwmon */ + +static ssize_t show_info(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[4]; + + memset(b, 0, 4); + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, b, CPLD_INFO_OFFSET, 4); + mutex_unlock(&data->update_lock); + + if(status != 4) return sprintf(buf, "read cpld info fail\n"); + + status = sprintf (buf, "The CPLD release date is %02d/%02d/%d.\n", b[2] & 0xf, (b[3] & 0x1f), 2014+(b[2] >> 4)); /* mm/dd/yyyy*/ + status = sprintf (buf, "%sThe PCB version is %X%X\n", buf, b[0]>>4, b[0]&0xf); + status = sprintf (buf, "%sThe CPLD version is %d.%d\n", buf, b[1]>>4, b[1]&0xf); + + return strlen(buf); +} + + +static ssize_t show_ctl(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[1]; + + mutex_lock(&data->update_lock); + + status = cpld_i2c_read(client, b, CPLD_CTL_OFFSET, 1); + + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld ctl fail\n"); + + + status = sprintf (buf, "0x%X\n", b[0]); + + return strlen(buf); +} + +static ssize_t set_ctl(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + + u8 temp = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_CTL_OFFSET, 1); + if(temp) byte |= (1<<0); + else byte &= ~(1<<0); + cpld_i2c_write(client, &byte, CPLD_CTL_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_bios_cs(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + //struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 b[1]; + + mutex_lock(&data->update_lock); + + status = cpld_i2c_read(client, b, CPLD_BIOSCS_OFFSET, 1); + + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld BIOS_CS fail\n"); + + + status = sprintf (buf, "0x%X\n", b[0] & 0x01); + + return strlen(buf); +} + +static ssize_t set_bios_cs(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + //struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + + u8 temp = simple_strtol(buf, NULL, 10); + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_BIOSCS_OFFSET, 1); + if(temp) byte |= 0x01; + else byte &= ~(0x01); + cpld_i2c_write(client, &byte, CPLD_BIOSCS_OFFSET, 1); + mutex_unlock(&data->update_lock); + + return count; +} + + +static char* led_str[] = { + "OFF", //000 + "0.5 Hz", //001 + "1 Hz", //010 + "2 Hz", //011 + "4 Hz", //100 + "NA", //101 + "NA", //110 + "ON", //111 +}; + +static ssize_t show_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 0)?3:0; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + mutex_unlock(&data->update_lock); + + if(status != 1) return sprintf(buf, "read cpld offset 0x%x\n", CPLD_LED_OFFSET); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d: %s\n", byte, led_str[byte]); + + return strlen(buf); +} + +static ssize_t set_led(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + u8 temp = simple_strtol(buf, NULL, 16); + u8 byte; + int shift = (attr->index == 0)?3:0; + + temp &= 0x7; + //validate temp value: 0,1,2,3,7, TBD + + mutex_lock(&data->update_lock); + cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1); + byte &= ~(0x7<update_lock); + + return count; +} + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu0 | psu1 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 byte; + int shift = (attr->index == 1)?0:3; + + mutex_lock(&data->update_lock); + status = cpld_i2c_read(client, &byte, CPLD_PSU_OFFSET, 1); + mutex_unlock(&data->update_lock); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + + +static SENSOR_DEVICE_ATTR(info, S_IRUGO, show_info, 0, 0); +static SENSOR_DEVICE_ATTR(ctl, S_IWUSR|S_IRUGO, show_ctl, set_ctl, 0); + +static SENSOR_DEVICE_ATTR(grn_led, S_IWUSR|S_IRUGO, show_led, set_led, 0); +static SENSOR_DEVICE_ATTR(red_led, S_IWUSR|S_IRUGO, show_led, set_led, 1); + +static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu, 0, 0); +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu, 0, 1); + +static SENSOR_DEVICE_ATTR(bios_cs, S_IWUSR|S_IRUGO, show_bios_cs, set_bios_cs, 0); + +static struct attribute *cpld_attributes[] = { + //info + &sensor_dev_attr_info.dev_attr.attr, + &sensor_dev_attr_ctl.dev_attr.attr, + + &sensor_dev_attr_grn_led.dev_attr.attr, + &sensor_dev_attr_red_led.dev_attr.attr, + + &sensor_dev_attr_psu0.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + + &sensor_dev_attr_bios_cs.dev_attr.attr, + NULL +}; + +static const struct attribute_group cpld_group = { + .attrs = cpld_attributes, +}; + +static struct attribute *cpld2_attributes[] = { + //info + &sensor_dev_attr_info.dev_attr.attr, + + NULL +}; + +static const struct attribute_group cpld2_group = { + .attrs = cpld2_attributes, +}; + + +/*-----------------------------------------------------------------------*/ + +/* device probe and removal */ + +static int +cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct cpld_data *data; + int status; + +// printk("+%s \n", __func__); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* Register sysfs hooks */ + if(id->driver_data==1) // CPLD2 + status = sysfs_create_group(&client->dev.kobj, &cpld2_group); + else // default CPLD1 + status = sysfs_create_group(&client->dev.kobj, &cpld_group); + + if (status) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &cpld_group); +exit_free: + i2c_set_clientdata(client, NULL); + kfree(data); + return status; +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &cpld_group); + i2c_set_clientdata(client, NULL); + kfree(data); + return 0; +} + +static const struct i2c_device_id cpld_ids[] = { + { "inv_cpld" , 0, }, + { "inv_cpld2", 1, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, cpld_ids); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "inv_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_ids, +}; + +/*-----------------------------------------------------------------------*/ + +/* module glue */ + +static int __init inv_cpld_init(void) +{ + return i2c_add_driver(&cpld_driver); +} + +static void __exit inv_cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("eddie.lan "); +MODULE_DESCRIPTION("inv cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_cpld_init); +module_exit(inv_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_eeprom.c b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_eeprom.c new file mode 100644 index 00000000000..3d13f3b0471 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_eeprom.c @@ -0,0 +1,181 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void inv_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } + +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t inv_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + inv_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute inv_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = inv_eeprom_read, +}; + +static int inv_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &inv_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int inv_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &inv_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id inv_eeprom_id[] = { + { "inv_eeprom", 0 }, + { } +}; + +static struct i2c_driver inv_eeprom_driver = { + .driver = { + .name = "inv_eeprom", + }, + .probe = inv_eeprom_probe, + .remove = inv_eeprom_remove, + .id_table = inv_eeprom_id, +}; + +module_i2c_driver(inv_eeprom_driver); + +MODULE_AUTHOR("Inventec"); +MODULE_DESCRIPTION("Inventec D7054 Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_mux.c b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_mux.c new file mode 100644 index 00000000000..143aee309db --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_mux.c @@ -0,0 +1,547 @@ +#include +#include +#include +#include +#include +#include +#include "io_expander.h" +#include "inv_mux.h" + +/* For build single module using (Ex: ONL platform) */ +#include +//#include +//#include + + +static struct mux_obj_s *mux_head_p = NULL; + +/* ========== MUX object functions ========== + */ +static int +_setup_i2c_value(struct mux_obj_s *self, int offset, int value){ + + return i2c_smbus_write_byte_data(self->i2c_client_p, offset, value); +} + + +static int +_setup_i2c_client(struct mux_obj_s *self, int chan_id, int addr){ + + struct i2c_adapter *adap = NULL; + char *emsg = "ERR"; + + adap = i2c_get_adapter(chan_id); + if (!adap){ + emsg = "can't get adapter"; + goto err_setup_i2c_client; + } + self->i2c_client_p = kzalloc(sizeof(*self->i2c_client_p), GFP_KERNEL); + if (!self->i2c_client_p){ + emsg = "can't kzalloc client"; + goto err_setup_i2c_client; + } + self->i2c_client_p->adapter = adap; + self->i2c_client_p->addr = addr; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, emsg); + return ERR_MUX_UNEXCPT; +} + + +int +_common_force_pull_gpio(int mem_addr, + int input, + int bit_offset){ + + unsigned int val = 0; + unsigned int targ = 0; + + /* Get current value */ + val = inl(mem_addr); + if (val == 0) { + SWPS_ERR("%s: inl:%d fail!\n", __func__, val); + return -1; + } + /* Count target value */ + switch (input) { + case 0: /* Pull Low */ + targ = (val & (~(1 << bit_offset))); + break; + case 1: /* Pull high */ + targ = (val | (1 << bit_offset)); + break; + default: + SWPS_ERR("%s: input state:%d incorrect!\n", + __func__, input); + return -1; + } + /* Setup gpio */ + outl(targ, mem_addr); + if (targ != inl(mem_addr)){ + SWPS_ERR("%s: outl:%d fail!\n", __func__, targ); + return -1; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} + + +int +rangeley_force_pull_high(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +rangeley_force_pull_low(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +hedera_force_pull_high(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 1, 5); +} + + +int +hedera_force_pull_low(struct mux_obj_s *self){ + return _common_force_pull_gpio(MUX_RST_MEM_ADDR_HEDERA, 0, 5); +} + + +int +normal_gpio_pull_high(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 1); +} + + +int +normal_gpio_pull_low(struct mux_obj_s *self){ + return gpio_direction_output(self->gpio_num, 0); +} + + +int +cpld_rst_all_4_pull_low(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto setlow_cpld_rst_all_4_c0_a77_70_74_rst_all; + + default: + break; + } + emsg = "Undefined case"; + goto err_cpld_rst_all_4_pull_low; + +setlow_cpld_rst_all_4_c0_a77_70_74_rst_all: + err = _setup_i2c_value(self, 0x70, 0x0); + if (err < 0) { + emsg = "setup 0x70 fail"; + goto err_cpld_rst_all_4_pull_low; + } + err = _setup_i2c_value(self, 0x74, 0x01); + if (err < 0) { + emsg = "setup 0x74 fail"; + goto err_cpld_rst_all_4_pull_low; + } + return 0; + +err_cpld_rst_all_4_pull_low: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +cpld_rst_all_4_pull_high(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto sethigh_cpld_rst_all_4_c0_a77_70_74_rst_all; + + default: + break; + } + emsg = "Undefined case"; + goto err_cpld_rst_all_4_pull_high; + +sethigh_cpld_rst_all_4_c0_a77_70_74_rst_all: + err = _setup_i2c_value(self, 0x70, 0xfe); + if (err < 0) { + emsg = "setup 0x70 fail"; + goto err_cpld_rst_all_4_pull_high; + } + err = _setup_i2c_value(self, 0x74, 0x03); + if (err < 0) { + emsg = "setup 0x74 fail"; + goto err_cpld_rst_all_4_pull_high; + } + return 0; + +err_cpld_rst_all_4_pull_high: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +pca9548_reset_mux_all(struct mux_obj_s *self){ + /* [Note] Power-on reset (PCA9548A-NXP) + * When power is applied to VDD, an internal Power-On Reset (POR) + * holds the PCA9548A in a reset condition until VDD has reached + * VPOR. At this point, the reset condition is released and the + * PCA9548A register and I2C-bus state machine are initialized to + * their default states (all zeroes) causing all the channels to + * be deselected. Thereafter, VDD must be lowered below 0.2 V for + * at least 5 us in order to reset the device. + */ + if (self->_pull_low(self) < 0) { + SWPS_ERR("%s: _pull_low fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS_PCA9548); + if (self->_pull_high(self) < 0) { + SWPS_ERR("%s: _pull_high fail!\n", __func__); + return -1; + } + mdelay(MUX_RST_WAIT_MS_PCA9548); + return 0; +} + + +int +cpld_reset_mux_all(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto reset_cpld_rst_all_4_c0_a77_70_74_rst_all; + + default: + break; + } + emsg = "Undefined case"; + goto err_cpld_reset_mux_all; + +reset_cpld_rst_all_4_c0_a77_70_74_rst_all: + if (self->_pull_low(self) < 0) { + emsg = "_pull_low fail"; + goto err_cpld_reset_mux_all; + } + mdelay(MUX_RST_WAIT_MS_CPLD); + return 0; + +err_cpld_reset_mux_all: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +common_reset_mux_all(struct mux_obj_s *self){ + SWPS_ERR("%s: not ready!\n", __func__); + return -1; +} + + +int +init_gpio_4_force(struct mux_obj_s *self){ + + if (self->_pull_high(self) < 0) { + SWPS_ERR("%s: setup default fail!\n", __func__); + return -1; + } + return 0; +} + + +int +init_gpio_4_normal(struct mux_obj_s *self){ + + int err = 0; + char *emsg = "ERR"; + + if (!gpio_is_valid(self->gpio_num)) { + emsg = "GPIO invalid"; + goto err_init_gpio_4_normal; + } + err = gpio_request(self->gpio_num, MUX_GPIO_LABEL); + if (err < 0) { + emsg = "gpio_request fail"; + goto err_init_gpio_4_normal; + } + err = self->_pull_high(self); + if (err < 0) { + emsg = "setup default fail"; + goto err_init_gpio_4_normal; + } + SWPS_DEBUG("%s: gpio_request:%d ok.\n", __func__, self->gpio_num); + return 0; + +err_init_gpio_4_normal: + SWPS_ERR("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return -1; +} + + +int +init_cpld_4_rst_all(struct mux_obj_s *self){ + + char *emsg = "ERR"; + int err = ERR_MUX_UNEXCPT; + int chan = ERR_MUX_UNEXCPT; + int addr = ERR_MUX_UNEXCPT; + + switch(self->gpio_num) { + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + goto init_cpld_i2c_c0_a77_70_74_rst_all; + + default: + break; + } + emsg = "Undefined case"; + goto err_init_cpld_4_rst_all; + +init_cpld_i2c_c0_a77_70_74_rst_all: + chan = 0; + addr = 0x77; + err = _setup_i2c_client(self, chan, addr); + if (err < 0) { + emsg = "_setup_i2c_client fail"; + goto err_init_cpld_4_rst_all; + } + err = self->_pull_high(self); + if (err < 0) { + emsg = "setup default value fail"; + goto err_init_cpld_4_rst_all; + } + SWPS_DEBUG("%s: init_cpld_i2c_c0_a77_70_74_rst_all ok", __func__); + return 0; + +err_init_cpld_4_rst_all: + SWPS_INFO("%s: %s :%d :%d\n", + __func__, emsg, self->gpio_num, err); + return ERR_MUX_UNEXCPT; +} + + +int +clean_gpio_4_common(struct mux_obj_s *self){ + + if (!self) return 0; + if (!gpio_is_valid(self->gpio_num)) return 0; + self->_pull_high(self); + gpio_free(mux_head_p->gpio_num); + return 0; +} + + +int +clean_cpld_4_rst_all(struct mux_obj_s *self){ + + if (!self) return 0; + self->_pull_high(self); + if (self->i2c_client_p) { + i2c_put_adapter(self->i2c_client_p->adapter); + kfree(self->i2c_client_p); + } + return 0; +} + + +static int +_setup_muxctl_cb(struct mux_obj_s *self, + unsigned gpio){ + + char mod_dsc[32] = "ERR"; + + switch (gpio) { + case MUX_RST_GPIO_FORCE_RANGELEY: + self->gpio_num = gpio; + self->_pull_low = rangeley_force_pull_low; + self->_pull_high = rangeley_force_pull_high; + self->_init = init_gpio_4_force; + self->_clean = clean_gpio_4_common; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Rangeley force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_FORCE_HEDERA: + self->gpio_num = gpio; + self->_pull_low = hedera_force_pull_low; + self->_pull_high = hedera_force_pull_high; + self->_init = init_gpio_4_force; + self->_clean = clean_gpio_4_common; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Hedera force mode"); + goto ok_setup_muxctl_cb; + + case MUX_RST_GPIO_48_PCA9548: + case MUX_RST_GPIO_69_PCA9548: + case MUX_RST_GPIO_249_PCA9548: + case MUX_RST_GPIO_500_PCA9548: + case MUX_RST_GPIO_505_PCA9548: + self->gpio_num = gpio; + self->_pull_low = normal_gpio_pull_low; + self->_pull_high = normal_gpio_pull_high; + self->_init = init_gpio_4_normal; + self->_clean = clean_gpio_4_common; + self->reset = pca9548_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "Normal mode :%d", (int)gpio); + goto ok_setup_muxctl_cb; + + case MUX_RST_CPLD_C0_A77_70_74_RST_ALL: + self->gpio_num = gpio; + self->_pull_low = cpld_rst_all_4_pull_low; + self->_pull_high = cpld_rst_all_4_pull_high; + self->_init = init_cpld_4_rst_all; + self->_clean = clean_cpld_4_rst_all; + self->reset = cpld_reset_mux_all; + memset(mod_dsc, 0, 32); + snprintf(mod_dsc, 31, "CPLD mode :%d", (int)gpio); + goto ok_setup_muxctl_cb; + + default: + break; + } + SWPS_ERR("%s: Unexpected GPIO:%d\n", __func__, gpio); + return -1; + +ok_setup_muxctl_cb: + SWPS_INFO("muxctl: %s.\n", mod_dsc); + return 0; +} + + +/* ========== MUX public functions ========== + */ +void +clean_mux_objs(void){ + + struct mux_obj_s *curr_p = mux_head_p; + struct mux_obj_s *next_p = NULL; + + if (!curr_p) { + SWPS_DEBUG("%s: mux_head_p is NULL\n", __func__); + return; + } + while (curr_p) { + next_p = curr_p->next; + curr_p->_clean(curr_p); + kfree(curr_p); + curr_p = next_p; + } + SWPS_DEBUG("%s: done.\n", __func__); +} +EXPORT_SYMBOL(clean_mux_objs); + + +int +reset_mux_objs(void){ + + if (!mux_head_p) { + SWPS_ERR("%s: MUX ctl object doesn't exist!\n", __func__); + return -1; + } + if (mux_head_p->reset(mux_head_p) < 0){ + SWPS_ERR("%s: reset fail!\n", __func__); + return -1; + } + return 0; +} +EXPORT_SYMBOL(reset_mux_objs); + + +struct mux_obj_s * +_create_mux_obj(unsigned gpio){ + + char *emsg = "ERR"; + struct mux_obj_s *obj_p = NULL; + + obj_p = kzalloc(sizeof(struct mux_obj_s), GFP_KERNEL); + if (!obj_p) { + emsg = "kzalloc fail!"; + goto err_create_mux_obj_1; + } + if (_setup_muxctl_cb(obj_p, gpio) < 0){ + emsg = "_setup_muxctl_cb fail!"; + goto err_create_mux_obj_2; + } + if (obj_p->_init(obj_p) < 0) { + emsg = "_init() fail!"; + goto err_create_mux_obj_2; + } + SWPS_DEBUG("%s: created MUX object :%d\n", __func__, gpio); + return obj_p; + +err_create_mux_obj_2: + kfree(obj_p); +err_create_mux_obj_1: + SWPS_ERR("%s: %s :%d\n", __func__, emsg, gpio); + return NULL; +} + + +int +init_mux_objs(unsigned gpio){ + + struct mux_obj_s *curr_p = NULL; + char *emsg = "ERR"; + + /* Create MUX control object */ + if (mux_head_p) { + SWPS_DEBUG("%s: mux_head_p is not NULL!\n", __func__); + clean_mux_objs(); + } + /* Currently, it is using single muxctl architecture. + * In the future, it may use the multi-muxctl. + * (Ex: Gulmohar's advance I2C control / Peony's reset single mux) + */ + curr_p = _create_mux_obj(gpio); + if (!curr_p) { + emsg = "_create_mux_obj fail"; + goto err_init_mux_objs; + } + curr_p->next = NULL; + mux_head_p = curr_p; + SWPS_DEBUG("%s: all done. :%d\n", __func__, gpio); + return 0; + +err_init_mux_objs: + clean_mux_objs(); + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} +EXPORT_SYMBOL(init_mux_objs); + + +/* For single ko module + * => You need to declare MODULE_LICENSE If you want to build single module along. + * => Ex: For ONL platform + */ +MODULE_LICENSE("GPL"); + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_mux.h b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_mux.h new file mode 100644 index 00000000000..a913b24c605 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_mux.h @@ -0,0 +1,51 @@ +#ifndef INV_MUX_H +#define INV_MUX_H + +#include + +/* MUX basic information */ +#define MUX_GPIO_LABEL "SWPS_RST_MUX" + +/* MUX reset GPIO define */ +#define MUX_RST_GPIO_FORCE (30100) +#define MUX_RST_GPIO_FORCE_RANGELEY (30101) +#define MUX_RST_GPIO_FORCE_HEDERA (30102) +#define MUX_RST_GPIO_48_PCA9548 (48) +#define MUX_RST_GPIO_69_PCA9548 (69) +#define MUX_RST_GPIO_249_PCA9548 (249) +#define MUX_RST_GPIO_500_PCA9548 (500) +#define MUX_RST_GPIO_505_PCA9548 (505) +#define MUX_RST_CPLD_C0_A77_70_74_RST_ALL (30201) + +/* MUX relate value define */ +#define MUX_RST_WAIT_MS_PCA9548 (1) +#define MUX_RST_WAIT_MS_CPLD (10) +#define MUX_RST_MEM_ADDR_RANGELEY (0) // TBD +#define MUX_RST_MEM_ADDR_HEDERA (0x548) + +/* MUX error code define */ +#define ERR_MUX_UNEXCPT (-399) + +struct mux_obj_s { + struct i2c_client *i2c_client_p; + struct mux_obj_s *next; + unsigned gpio_num; + int (*_pull_high)(struct mux_obj_s *self); + int (*_pull_low)(struct mux_obj_s *self); + int (*_init)(struct mux_obj_s *self); + int (*_clean)(struct mux_obj_s *self); + int (*reset)(struct mux_obj_s *self); +}; + + +void clean_mux_objs(void); +int reset_mux_objs(void); +int init_mux_objs(unsigned gpio); + + +#endif /* INV_MUX_H */ + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_platform.c b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_platform.c new file mode 100644 index 00000000000..90aceaa9267 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_platform.c @@ -0,0 +1,274 @@ +#include +//#include +#include +#include +#include +#include +#include +#include +#include +//#include +//#include + +//#include +//#define IO_EXPAND_BASE 64 +//#define IO_EXPAND_NGPIO 16 + +struct inv_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +#define bus_id(id) (id) +static struct pca954x_platform_mode mux_modes_0[] = { + {.adap_id = bus_id(2),}, {.adap_id = bus_id(3),}, + {.adap_id = bus_id(4),}, {.adap_id = bus_id(5),}, + {.adap_id = bus_id(6),}, {.adap_id = bus_id(7),}, + {.adap_id = bus_id(8),}, {.adap_id = bus_id(9),}, +}; +static struct pca954x_platform_mode mux_modes_0_0[] = { + {.adap_id = bus_id(10),}, {.adap_id = bus_id(11),}, + {.adap_id = bus_id(12),}, {.adap_id = bus_id(13),}, + {.adap_id = bus_id(14),}, {.adap_id = bus_id(15),}, + {.adap_id = bus_id(16),}, {.adap_id = bus_id(17),}, +}; + +static struct pca954x_platform_mode mux_modes_0_1[] = { + {.adap_id = bus_id(18),}, {.adap_id = bus_id(19),}, + {.adap_id = bus_id(20),}, {.adap_id = bus_id(21),}, + {.adap_id = bus_id(22),}, {.adap_id = bus_id(23),}, + {.adap_id = bus_id(24),}, {.adap_id = bus_id(25),}, +}; + +static struct pca954x_platform_mode mux_modes_0_2[] = { + {.adap_id = bus_id(26),}, {.adap_id = bus_id(27),}, + {.adap_id = bus_id(28),}, {.adap_id = bus_id(29),}, + {.adap_id = bus_id(30),}, {.adap_id = bus_id(31),}, + {.adap_id = bus_id(32),}, {.adap_id = bus_id(33),}, +}; + +static struct pca954x_platform_mode mux_modes_0_3[] = { + {.adap_id = bus_id(34),}, {.adap_id = bus_id(35),}, + {.adap_id = bus_id(36),}, {.adap_id = bus_id(37),}, + {.adap_id = bus_id(38),}, {.adap_id = bus_id(39),}, + {.adap_id = bus_id(40),}, {.adap_id = bus_id(41),}, +}; + +static struct pca954x_platform_mode mux_modes_0_4[] = { + {.adap_id = bus_id(42),}, {.adap_id = bus_id(43),}, + {.adap_id = bus_id(44),}, {.adap_id = bus_id(45),}, + {.adap_id = bus_id(46),}, {.adap_id = bus_id(47),}, + {.adap_id = bus_id(48),}, {.adap_id = bus_id(49),}, +}; + +static struct pca954x_platform_mode mux_modes_0_5[] = { + {.adap_id = bus_id(50),}, {.adap_id = bus_id(51),}, + {.adap_id = bus_id(52),}, {.adap_id = bus_id(53),}, + {.adap_id = bus_id(54),}, {.adap_id = bus_id(55),}, + {.adap_id = bus_id(56),}, {.adap_id = bus_id(57),}, +}; + +static struct pca954x_platform_mode mux_modes_0_6[] = { + {.adap_id = bus_id(58),}, {.adap_id = bus_id(59),}, + {.adap_id = bus_id(60),}, {.adap_id = bus_id(61),}, + {.adap_id = bus_id(62),}, {.adap_id = bus_id(63),}, + {.adap_id = bus_id(64),}, {.adap_id = bus_id(65),}, +}; + +static struct pca954x_platform_mode mux_modes_0_7[] = { + {.adap_id = bus_id(66),}, {.adap_id = bus_id(67),}, + {.adap_id = bus_id(68),}, {.adap_id = bus_id(69),}, + {.adap_id = bus_id(70),}, {.adap_id = bus_id(71),}, + {.adap_id = bus_id(72),}, {.adap_id = bus_id(73),}, +}; + +//no i2c device driver attach to mux 7 + + +static struct pca954x_platform_data mux_data_0 = { + .modes = mux_modes_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_0 = { + .modes = mux_modes_0_0, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_1 = { + .modes = mux_modes_0_1, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_2 = { + .modes = mux_modes_0_2, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_3 = { + .modes = mux_modes_0_3, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_4 = { + .modes = mux_modes_0_4, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_5 = { + .modes = mux_modes_0_5, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_6 = { + .modes = mux_modes_0_6, + .num_modes = 8, +}; +static struct pca954x_platform_data mux_data_0_7 = { + .modes = mux_modes_0_7, + .num_modes = 8, +}; + +static struct i2c_board_info i2c_device_info0[] __initdata = { +// {"inv_psoc", 0, 0x66, 0, 0, 0},//psoc + {"inv_cpld", 0, 0x55, 0, 0, 0},//cpld + {"inv_cpld2", 0, 0x77, 0, 0, 0},//cpld2 + {"pca9548", 0, 0x70, &mux_data_0, 0, 0}, +}; + +static struct i2c_board_info i2c_device_info2[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_0, 0, 0}, +}; +static struct i2c_board_info i2c_device_info3[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_1, 0, 0}, +}; +static struct i2c_board_info i2c_device_info4[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_2, 0, 0}, +}; +static struct i2c_board_info i2c_device_info5[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_3, 0, 0}, +}; +static struct i2c_board_info i2c_device_info6[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_4, 0, 0}, +}; +static struct i2c_board_info i2c_device_info7[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_5, 0, 0}, +}; +static struct i2c_board_info i2c_device_info8[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_6, 0, 0}, +}; +static struct i2c_board_info i2c_device_info9[] __initdata = { + {"pca9548", 0, 0x72, &mux_data_0_7, 0, 0}, +}; + + +static struct inv_i2c_board_info i2cdev_list[] = { + {0, ARRAY_SIZE(i2c_device_info0), i2c_device_info0 }, //smbus 0 + + {bus_id(2), ARRAY_SIZE(i2c_device_info2), i2c_device_info2 }, //mux 0 + {bus_id(3), ARRAY_SIZE(i2c_device_info3), i2c_device_info3 }, //mux 1 + {bus_id(4), ARRAY_SIZE(i2c_device_info4), i2c_device_info4 }, //mux 2 + {bus_id(5), ARRAY_SIZE(i2c_device_info5), i2c_device_info5 }, //mux 3 + {bus_id(6), ARRAY_SIZE(i2c_device_info6), i2c_device_info6 }, //mux 4 + {bus_id(7), ARRAY_SIZE(i2c_device_info7), i2c_device_info7 }, //mux 5 + {bus_id(8), ARRAY_SIZE(i2c_device_info8), i2c_device_info8 }, //mux 6 + {bus_id(9), ARRAY_SIZE(i2c_device_info9), i2c_device_info9 }, //mux 7 + +}; + +///////////////////////////////////////////////////////////////////////////////////////// +#if 0 +static struct i2c_gpio_platform_data i2c_gpio_platdata0 = { + .scl_pin = 58, + .sda_pin = 75, + + .udelay = 5, //5:100kHz + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .scl_is_output_only = 0 +}; + +static struct platform_device device_i2c_gpio0 = { + .name = "i2c-gpio", + .id = 1, // adapter number + .dev.platform_data = &i2c_gpio_platdata0, +}; +#endif + + + +#define PLAT_MAX_I2C_CLIENTS 32 +static struct i2c_client *plat_i2c_client[PLAT_MAX_I2C_CLIENTS]; +static int num_i2c_clients = 0; +static int plat_i2c_client_add(struct i2c_client *e) +{ + if (num_i2c_clients >= PLAT_MAX_I2C_CLIENTS) + return -1; + + plat_i2c_client[num_i2c_clients] = e; + num_i2c_clients++; + return num_i2c_clients; +} + +static void plat_i2c_client_remove_all(void) +{ + int i; + for (i = num_i2c_clients-1; i >= 0; i--) + i2c_unregister_device(plat_i2c_client[i]); +} + +static int __init inv_platform_init(void) +{ + struct i2c_adapter *adap = NULL; + struct i2c_client *e = NULL; + int ret = 0; + int i,j,k; + + printk("%s \n", __func__); + +#if 0 + //use i2c-gpio + //register i2c gpio + //config gpio58,75 to gpio function 58=32+3*8+2 75=32*2+8*1+3 gpio69=32*2+8*0+5 + outl( inl(0x533) | (1<<2), 0x533); + outl( inl(0x541) | (1<<3), 0x541); + outl( inl(0x540) | (1<<5), 0x540); //RST_I2C_MUX_N (GPIO69) + outl( inl(0x500) | (1<<7), 0x500); //SYS_RDY_N (GPIO7) + outl( inl(0x501) | (1<<7), 0x501); //BMC_HEART_BEAT (GPIO15) + outl( inl(0x503) | (1<<2)|(1<<3), 0x503); //PSOC_HEART_BEAT(26),CPLD_HEART_BEAT(27) + + ret = platform_device_register(&device_i2c_gpio0); + if (ret) { + printk(KERN_ERR "i2c-gpio: device_i2c_gpio0 register fail %d\n", ret); + } +#endif + for(i=0; i +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//================================= +#include +#include +#include +#include + +#define IPMI_MAX_INTF (4) +#define NETFN_OEM 0x30 +#define CMD_GETDATA 0x31 +#define CMD_SETDATA 0x32 +#define FAN_NUM 4 +#define PSU_NUM 2 + +#define PSU1 0x5800 +#define PSU2 0x5900 +#define BMC_PMBusNumber 3 +#define PMBus_Vender 0x99 +#define PMBus_Serial 0x9E +#define PMBus_Temp2 0x8E +#define PMBus_Version 0x9B +#define MaxLeng_Result 0x20 + +#define MAX_IPMI_RECV_LENGTH 0xff + +static long pmbus_reg2data_linear(int data, int linear16); +struct ipmi_result{ + char result[MAX_IPMI_RECV_LENGTH]; + int result_length; +}; + +DEFINE_MUTEX(ipmi_mutex); +DEFINE_MUTEX(ipmi2_mutex); +static struct ipmi_result ipmiresult; +static struct device *hwmon_dev; +static ipmi_user_t ipmi_mh_user = NULL; +static void msg_handler(struct ipmi_recv_msg *msg,void* handler_data); +static struct ipmi_user_hndl ipmi_hndlrs = { .ipmi_recv_hndl = msg_handler,}; + +static atomic_t dummy_count = ATOMIC_INIT(0); +static void dummy_smi_free(struct ipmi_smi_msg *msg) +{ + atomic_dec(&dummy_count); +} +static void dummy_recv_free(struct ipmi_recv_msg *msg) +{ + atomic_dec(&dummy_count); +} +static struct ipmi_smi_msg halt_smi_msg = { + .done = dummy_smi_free +}; +static struct ipmi_recv_msg halt_recv_msg = { + .done = dummy_recv_free +}; + +struct __attribute__ ((__packed__)) psoc_psu_layout { + u16 psu1_iin; + u16 psu2_iin; + u16 psu1_iout; + u16 psu2_iout; + + u16 psu1_pin; + u16 psu2_pin; + u16 psu1_pout; + u16 psu2_pout; + + u16 psu1_vin; + u16 psu2_vin; + u16 psu1_vout; + u16 psu2_vout; +}; + +struct __attribute__ ((__packed__)) psoc_layout { + u8 ctl; //offset: 0 + u16 switch_temp; //offset: 1 + u8 reserve0; //offset: 3 + + u8 fw_upgrade; //offset: 4 + + //i2c bridge + u8 i2c_st; //offset: 5 + u8 i2c_ctl; //offset: 6 + u8 i2c_addr; //offset: 7 + u8 i2c_data[0x20]; //offset: 8 + + //gpo + u8 led_ctl; //offset: 28 + + u8 gpio; //offset: 29 + + //pwm duty + u8 pwm[FAN_NUM]; //offset: 2a + u8 pwm_psu[PSU_NUM]; //offset: 2e + + //fan rpm + u16 fan[FAN_NUM*2]; //offset: 30 + + u8 reserve1[4]; //offset: 40 + + //gpi + u8 gpi_fan; //offset: 44 + + //psu state + u8 psu_state; //offset: 45 + + //temperature + u16 temp[5]; //offset: 46 + u16 temp_psu[PSU_NUM]; //offset: 50 + + //version + u8 version[2]; //offset: 54 + + u8 reserve2[4]; //offset: 56 + struct psoc_psu_layout psu_info; //offset: 5a +}; + +/* definition */ +/* definition */ +#define PSOC_OFF(m) offsetof(struct psoc_layout, m) +#define PSOC_PSU_OFF(m) offsetof(struct psoc_psu_layout, m) + +#define SWITCH_TMP_OFFSET PSOC_OFF(switch_temp) +#define PWM_OFFSET PSOC_OFF(pwm) +#define THERMAL_OFFSET PSOC_OFF(temp) +#define RPM_OFFSET PSOC_OFF(fan) +#define DIAG_FLAG_OFFSET PSOC_OFF(ctl) +#define FAN_LED_OFFSET PSOC_OFF(led_ctl) +#define FAN_GPI_OFFSET PSOC_OFF(gpi_fan) +#define PSOC_PSU_OFFSET PSOC_OFF(psu_state) +#define VERSION_OFFSET PSOC_OFF(version) +#define PSU_INFO_OFFSET PSOC_OFF(psu_info) + + +static void msg_handler(struct ipmi_recv_msg *recv_msg,void* handler_data) +{ + struct ipmi_result *msg_result = recv_msg->user_msg_data; + + if(recv_msg->msg.data[0]==0 && recv_msg->msg.data_len>0) { + msg_result->result_length=recv_msg->msg.data_len-1; + memcpy(msg_result->result, &recv_msg->msg.data[1], recv_msg->msg.data_len-1); + } + ipmi_free_recv_msg(recv_msg); + mutex_unlock(&ipmi_mutex); + + return; +} + +int start_ipmi_command(char NetFn, char cmd,char *data,int data_length, char* result, int* result_length) +{ + int rv=0,i; + int timeout; + + //wait previous command finish at least 50msec + timeout=50; + while((mutex_is_locked(&ipmi_mutex) == 1 || (mutex_is_locked(&ipmi2_mutex) == 1)) && (--timeout)>0) { usleep_range(1000,1010); } + if(timeout==0) { return -1; } + mutex_lock(&ipmi_mutex); + mutex_lock(&ipmi2_mutex); + + if(ipmi_mh_user == NULL) { + for (i=0,rv=1; i0) { usleep_range(1000,1100);} + if(timeout==0) { + mutex_unlock(&ipmi2_mutex); + return -1; + } + else { + *result_length=ipmiresult.result_length; + memcpy(result,ipmiresult.result,*result_length); + mutex_unlock(&ipmi2_mutex); + return 0; + } + } + return 0; +} +EXPORT_SYMBOL(start_ipmi_command); + +static ssize_t psoc_ipmi_read(u8 *buf, u8 offset, size_t count) +{ + uint8_t data[2]; + int result_len=0; + int rv; + + data[0] = offset; + data[1] = count; + + rv=start_ipmi_command(NETFN_OEM, CMD_GETDATA,data,2, buf, &result_len); + + return result_len; +} + +static ssize_t psoc_ipmi_write(char *buf, unsigned offset, size_t count) +{ + uint8_t data[count+1],result[1]; + int result_len; + + data[0] = offset; + memcpy(&data[1],buf,count); + + start_ipmi_command(NETFN_OEM, CMD_SETDATA,data,count+1, result, &result_len); + return count; +} + + +static u16 psoc_read16(u8 offset) +{ + u16 value = 0; + u8 buf[]={0,0}; + + if(psoc_ipmi_read(buf, offset, 2) == 2) + value = (buf[0]<<8 | buf[1]<<0); + + return value; +} + +static u8 psoc_read8(u8 offset) +{ + u8 value = 0; + u8 buf = 0; + + if(psoc_ipmi_read(&buf, offset, 1) == 1) + value = buf; + + return value; +} + +/* +CPLD report the PSU0 status +000 = PSU normal operation +100 = PSU fault +010 = PSU unpowered +111 = PSU not installed + +7 6 | 5 4 3 | 2 1 0 +---------------------- + | psu1 | psu0 +*/ +static char* psu_str[] = { + "normal", //000 + "NA", //001 + "unpowered", //010 + "NA", //011 + "fault", //100 + "NA", //101 + "NA", //110 + "not installed", //111 +}; + +static ssize_t show_psu_st(struct device *dev, struct device_attribute *da, + char *buf) +{ + u32 status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 byte=0; + int shift = (attr->index == 0)?3:0; + + status = psoc_ipmi_read(&byte, PSOC_PSU_OFFSET, 1); + + byte = (byte >> shift) & 0x7; + + status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]); + + return strlen(buf); +} + +static ssize_t show_ipmi_pmbus(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + uint8_t data[4],result[MaxLeng_Result]; + int result_len=0; + + data[0] = BMC_PMBusNumber; + data[1] = (attr->index & 0xFF00 ) >>7; + data[3] = attr->index & 0xff; + if(data[3]==PMBus_Temp2) + {data[2]=2;} + else + {data[2]=MaxLeng_Result;} + + if(start_ipmi_command(0x06, 0x52,data,4, result, &result_len)==0) + { + if(data[3]==PMBus_Temp2) + { + return sprintf(buf, "%ld \n", pmbus_reg2data_linear(result[0] | (result[1]<<8), 0 )); + } + result[result[0]+1]='\0'; + return sprintf(buf, "%s\n",&result[1] ); + } + else + { + return 0; + } +} + +static ssize_t show_thermal(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index * 2 + THERMAL_OFFSET; + + status = psoc_read16(offset); + + return sprintf(buf, "%d\n", + (s8)(status>>8) * 1000 ); +} + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index + PWM_OFFSET; + + status = psoc_read8(offset); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t set_pwm(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index + PWM_OFFSET; + + u8 pwm = simple_strtol(buf, NULL, 10); + if(pwm > 255) pwm = 255; + + psoc_ipmi_write(&pwm, offset, 1); + + return count; +} + + +static ssize_t show_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index*2 + RPM_OFFSET; + + status = psoc_read16(offset); + + return sprintf(buf, "%d\n", + status); +} + +static ssize_t show_switch_tmp(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + u16 temp = 0; + + status = psoc_ipmi_read((u8*)&temp, SWITCH_TMP_OFFSET, 2); + + status = sprintf (buf, "%d\n", (s8)(temp>>8) * 1000 ); + + return strlen(buf); +} + +static ssize_t set_switch_tmp(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + long temp = simple_strtol(buf, NULL, 10); + u16 temp2 = ( (temp/1000) <<8 ) & 0xFF00 ; + + //printk("set_switch_tmp temp=%d, temp2=0x%x (%x,%x)\n", temp, temp2, ( ( (temp/1000) <<8 ) & 0xFF00 ), (( (temp%1000) / 10 ) & 0xFF)); + psoc_ipmi_write((u8*)&temp2, SWITCH_TMP_OFFSET, 2); + + + return count; +} + +static ssize_t show_diag(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + u8 diag_flag = 0; + + status = psoc_ipmi_read((u8*)&diag_flag, DIAG_FLAG_OFFSET, 1); + + status = sprintf (buf, "%d\n", ((diag_flag & 0x80)?1:0)); + + return strlen(buf); +} + +static ssize_t set_diag(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + u8 value = 0; + u8 diag = simple_strtol(buf, NULL, 10); + + diag = diag?1:0; + + psoc_ipmi_read((u8*)&value, DIAG_FLAG_OFFSET, 1); + if(diag) value |= (1<<7); + else value &= ~(1<<7); + psoc_ipmi_write((u8*)&value, DIAG_FLAG_OFFSET, 1); + + return count; +} + +static ssize_t show_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + + status = psoc_read16(VERSION_OFFSET); + + return sprintf(buf, "ver: %x.%x\n", (status & 0xFF00)>>8, (status & 0xFF) ); +} + +static ssize_t show_name(struct device *dev, struct device_attribute *da, + char *buf) +{ + return sprintf (buf, "inv_psoc\n"); +} + + +static ssize_t show_fan_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 bit = attr->index; + + status = psoc_read8(FAN_LED_OFFSET); + + return sprintf(buf, "%d\n", + (status & (1<index; + u8 led_state = 0; + + u8 v = simple_strtol(buf, NULL, 10); + + led_state = psoc_read8(FAN_LED_OFFSET); + if(v) led_state |= (1<index; + + status = psoc_read8(offset); + + return sprintf(buf, "0x%02X\n", status ); +} + +static long pmbus_reg2data_linear(int data, int linear16) +{ + s16 exponent; + s32 mantissa; + long val; + + if (linear16) { /* LINEAR16 */ + exponent = -9; + mantissa = (u16) data; + } else { /* LINEAR11 */ + exponent = ((s16)data) >> 11; + exponent = ((s16)( data & 0xF800) ) >> 11; + mantissa = ((s32)((data & 0x7ff) << 5)) >> 5; + } + + //printk("data=%d, m=%d, e=%d\n", data, exponent, mantissa); + val = mantissa; + + /* scale result to micro-units for power sensors */ + val = val * 1000L; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +static ssize_t show_psu_psoc(struct device *dev, struct device_attribute *da, + char *buf) +{ + u16 status=0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 offset = attr->index + PSU_INFO_OFFSET; + + status = psoc_read16(offset); + + return sprintf(buf, "%ld \n", pmbus_reg2data_linear(status, strstr(attr->dev_attr.attr.name, "vout")? 1:0 )); +} + + +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_thermal, 0, 0); +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_thermal, 0, 1); +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_thermal, 0, 2); +static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_thermal, 0, 3); +static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_thermal, 0, 4); +static SENSOR_DEVICE_ATTR(thermal_psu1, S_IRUGO, show_thermal, 0, 5); +static SENSOR_DEVICE_ATTR(thermal_psu2, S_IRUGO, show_thermal, 0, 6); + +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 0); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 1); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 2); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 3); +static SENSOR_DEVICE_ATTR(pwm_psu1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 4); +static SENSOR_DEVICE_ATTR(pwm_psu2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 5); + +static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu_st, 0, 0); +static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu_st, 0, 1); + +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_rpm, 0, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_rpm, 0, 1); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_rpm, 0, 2); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_rpm, 0, 3); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_rpm, 0, 4); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_rpm, 0, 5); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_rpm, 0, 6); +static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_rpm, 0, 7); +static SENSOR_DEVICE_ATTR(rpm_psu1, S_IRUGO, show_rpm, 0, 8); +static SENSOR_DEVICE_ATTR(rpm_psu2, S_IRUGO, show_rpm, 0, 9); + +static SENSOR_DEVICE_ATTR(switch_tmp, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); +static SENSOR_DEVICE_ATTR(temp6_input, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0); + +static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0); +static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, 0, 0); +static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, 0); + +static SENSOR_DEVICE_ATTR(fan_led_grn1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 0); +static SENSOR_DEVICE_ATTR(fan_led_grn2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 1); +static SENSOR_DEVICE_ATTR(fan_led_grn3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 2); +static SENSOR_DEVICE_ATTR(fan_led_grn4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 3); +static SENSOR_DEVICE_ATTR(fan_led_red1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 4); +static SENSOR_DEVICE_ATTR(fan_led_red2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 5); +static SENSOR_DEVICE_ATTR(fan_led_red3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 6); +static SENSOR_DEVICE_ATTR(fan_led_red4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 7); + +static SENSOR_DEVICE_ATTR(fan_gpi, S_IRUGO, show_value8, 0, FAN_GPI_OFFSET); +static SENSOR_DEVICE_ATTR(psoc_psu1_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu1_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pout)); + + +static SENSOR_DEVICE_ATTR(psoc_psu2_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iout)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); +static SENSOR_DEVICE_ATTR(psoc_psu2_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pout)); + +static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin)); +static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin)); +static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin)); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin)); +static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin)); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin)); + +//IPMI +static SENSOR_DEVICE_ATTR(thermal2_psu1, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Temp2); +static SENSOR_DEVICE_ATTR(psoc_psu1_vender, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Vender); +static SENSOR_DEVICE_ATTR(psoc_psu1_serial, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Serial); +static SENSOR_DEVICE_ATTR(psoc_psu1_version, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Version); + +static SENSOR_DEVICE_ATTR(thermal2_psu2, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Temp2); +static SENSOR_DEVICE_ATTR(psoc_psu2_vender, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Vender); +static SENSOR_DEVICE_ATTR(psoc_psu2_serial, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Serial); +static SENSOR_DEVICE_ATTR(psoc_psu2_version, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Version); + + +static struct attribute *psoc_attributes[] = { + //thermal + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_temp4_input.dev_attr.attr, + &sensor_dev_attr_temp5_input.dev_attr.attr, + + &sensor_dev_attr_thermal_psu1.dev_attr.attr, + &sensor_dev_attr_thermal_psu2.dev_attr.attr, + + + //pwm + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, + &sensor_dev_attr_pwm_psu1.dev_attr.attr, + &sensor_dev_attr_pwm_psu2.dev_attr.attr, + + //rpm + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_fan8_input.dev_attr.attr, + + &sensor_dev_attr_rpm_psu1.dev_attr.attr, + &sensor_dev_attr_rpm_psu2.dev_attr.attr, + + //switch temperature + &sensor_dev_attr_switch_tmp.dev_attr.attr, + &sensor_dev_attr_temp6_input.dev_attr.attr, + //diag flag + &sensor_dev_attr_diag.dev_attr.attr, + + //version + &sensor_dev_attr_version.dev_attr.attr, + + //fan led + &sensor_dev_attr_fan_led_grn1.dev_attr.attr, + &sensor_dev_attr_fan_led_grn2.dev_attr.attr, + &sensor_dev_attr_fan_led_grn3.dev_attr.attr, + &sensor_dev_attr_fan_led_grn4.dev_attr.attr, + &sensor_dev_attr_fan_led_red1.dev_attr.attr, + &sensor_dev_attr_fan_led_red2.dev_attr.attr, + &sensor_dev_attr_fan_led_red3.dev_attr.attr, + &sensor_dev_attr_fan_led_red4.dev_attr.attr, + + //fan GPI + &sensor_dev_attr_fan_gpi.dev_attr.attr, + &sensor_dev_attr_psu0.dev_attr.attr, + &sensor_dev_attr_psu1.dev_attr.attr, + + + //psu_psoc + &sensor_dev_attr_psoc_psu1_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pin.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_pout.dev_attr.attr, + + // Add new fields which matching standard + &sensor_dev_attr_in1_input.dev_attr.attr, + &sensor_dev_attr_in2_input.dev_attr.attr, + &sensor_dev_attr_curr1_input.dev_attr.attr, + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_power1_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + + //ipmi_i2c_command + &sensor_dev_attr_thermal2_psu1.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_vender.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_serial.dev_attr.attr, + &sensor_dev_attr_psoc_psu1_version.dev_attr.attr, + + &sensor_dev_attr_thermal2_psu2.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_vender.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_serial.dev_attr.attr, + &sensor_dev_attr_psoc_psu2_version.dev_attr.attr, + + &sensor_dev_attr_name.dev_attr.attr, + + NULL +}; + +static const struct attribute_group psoc_group = { + .attrs = psoc_attributes, +}; + +static int __init inv_psoc_init(void) +{ + int ret; + + printk("+%s\n", __func__); + + hwmon_dev = hwmon_device_register(NULL); + if (IS_ERR(hwmon_dev)) { + goto fail_hwmon_device_register; + } + + ret = sysfs_create_group(&hwmon_dev->kobj, &psoc_group); + if (ret) { + goto fail_create_group_hwmon; + } + + printk(" Enable IPMI PSoC protocol.\n"); + return ret; + +fail_create_group_hwmon: + hwmon_device_unregister(hwmon_dev); +fail_hwmon_device_register: + return -ENOMEM; +} + +static void __exit inv_psoc_exit(void) +{ + sysfs_remove_group(&hwmon_dev->kobj, &psoc_group); + + if(ipmi_mh_user!=NULL) {ipmi_destroy_user(ipmi_mh_user);} + if(hwmon_dev != NULL) hwmon_device_unregister(hwmon_dev); +} + +MODULE_AUTHOR("Ting.Jack "); +MODULE_DESCRIPTION("inv psoc driver"); +MODULE_LICENSE("GPL"); + +module_init(inv_psoc_init); +module_exit(inv_psoc_exit); + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_pthread.c b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_pthread.c new file mode 100644 index 00000000000..a86b48613a5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_pthread.c @@ -0,0 +1,1303 @@ +/***************************** + Sequoia platform +******************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define INV_PTHREAD_KERNEL_MODULE + +#define SHOW_ATTR_WARNING ("N/A") +#define SHOW_ATTR_NOTPRINT ("Not Available") +#define SHOW_ATTR_NOTSUPPORT ("Not Support") + +#define INV_HWMID_MAX (10) +#define INV_HWMID_INIT (-1) + +/*access userspace data to kernel space*/ +#define ACC_R (0) +#define ACC_W (1) + +#define TINY_BUF_SIZE (8) +#define MAX_PATH_SIZE (64) +#define MIN_ACC_SIZE (32) +#define MAX_ACC_SIZE (256) + +/* + * LED definitions + */ +#define STATUS_LED_MODE_AUTO 0 +#define STATUS_LED_MODE_DIAG 1 +#define STATUS_LED_MODE_MANU 2 + +#define STATUS_LED_GRN0 10 // 0 - 000: off +#define STATUS_LED_GRN1 11 // 1 - 001: 0.5hz +#define STATUS_LED_GRN2 12 // 2 - 010: 1 hz +#define STATUS_LED_GRN3 13 // 3 - 011: 2 hz +#define STATUS_LED_GRN7 17 // 7 - 111: on +#define STATUS_LED_RED0 20 // 0 - 000: off +#define STATUS_LED_RED1 21 // 1 - 001: 0.5hz +#define STATUS_LED_RED2 22 // 2 - 010: 1 hz +#define STATUS_LED_RED3 23 // 3 - 011: 2 hz +#define STATUS_LED_RED7 27 // 7 - 111: on +#define STATUS_LED_INVALID 0 // Invalid + +ssize_t status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2); +ssize_t status_led_grn(const char *freq); +ssize_t status_led_red(const char *freq); +ssize_t status_led_diag_mode_enable(void); +ssize_t status_led_diag_mode_disable(void); +int status_led_check_color(void); +int status_led_check_diag_mode(void); + +#if 1 +/* For timestamps in SYSFS_LOG */ +#define SYSFS_LOG printk +#else +//#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[SYSFS] %s/%d: " fmt, __func__, __LINE__, ##args) +#define SYSFS_LOG(fmt, args...) printk(KERN_WARNING "[p_thread] " fmt, ##args) +#endif + + +/* inventec_class *********************************/ +static struct kobject *status_kobj; +static struct kset *status_kset; + + +static struct mutex rw_lock; + +static int hwm_psoc = INV_HWMID_INIT; +static int hwm_cpld = INV_HWMID_INIT; +static int hwm_cpld2 = INV_HWMID_INIT; + +int get_hwm_psoc(void) +{ + return hwm_psoc; +} + +int get_hwm_cpld(void) +{ + return hwm_cpld; +} + +static ssize_t access_user_space(const char *name, int mode, char *buf, size_t len, loff_t offset) +{ + struct file *fp; + mm_segment_t fs; + loff_t pos = offset; + char *mark = NULL; + ssize_t vfs_ret = 0; + + if (mode == ACC_R) { + fp = filp_open(name, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_read(fp, buf, len, &pos); + + mark = strpbrk(buf, "\n"); + if (mark) + *mark = '\0'; + + filp_close(fp, NULL); + set_fs(fs); + } else if (mode == ACC_W) { + fp = filp_open(name, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)) + return -ENODEV; + + fs = get_fs(); + set_fs(KERNEL_DS); + + vfs_ret = vfs_write(fp, buf, len, &pos); + filp_close(fp, NULL); + set_fs(fs); + } + + return vfs_ret; +} + +int inventec_strtol(const char *sbufp, char **endp, unsigned int base) +{ + char *endptr; + int value = simple_strtol(sbufp, &endptr, base); + if (value == 0 && sbufp == endptr) { + *endp = NULL; + return value; + } + *endp = (char*)1; + return value; +} + +int inventec_singlechar_to_int(const char c) +{ + if ((c >= '0') && (c <= '9')) { + return (c - '0'); + } + else + if ((c >= 'a') && (c <= 'f')) { + return (c - 'a' + 10); + } + else + if ((c >= 'A') && (c <= 'F')) { + return (c - 'A' + 10); + } + return -1; +} + +int inventec_store_input(char *inputp, int count) +{ + int i = 0; + while(inputp[i] != '\n' && inputp[i] != '\0' && i < count) { + i++; + } + inputp[i] = '\0'; + return strlen(inputp); +} + +#if 0 +/* + * Time stamps for kernel log on yocto + */ +#include + +void SYSFS_LOG(char *fmt, ...) +{ + char buf[80], ts[32]; + va_list args; + int hlen; + + inventec_tmstmp(&ts[0]); + hlen = sprintf(buf, "[SYSFS] %s ", ts); // Do not edit this line + + va_start(args, fmt); + vsprintf(&buf[hlen-1], fmt, args); + va_end(args); + printk(KERN_WARNING "[p_thread] %s\n", buf); +} +#endif + +ssize_t +inventec_show_attr(char *buf_p, const char *invdevp) +{ + int inv_len = MAX_ACC_SIZE; /* INV driver return max length */ + char tmp_buf[MAX_ACC_SIZE]; + char *str_negative = "-", *mark = NULL; + + /* [Step2] Get data by uaccess */ + memset(tmp_buf, 0, sizeof(tmp_buf)); + mutex_lock(&rw_lock); + if (access_user_space(invdevp, ACC_R, tmp_buf, inv_len, 0) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + mutex_unlock(&rw_lock); + + /* [Step3] Check return value + * - Ex: When transceiver not plugged + * => SWPS return error code "-202" + * => Pic8 need return "NA" (assume) + */ + if (strcspn(tmp_buf, str_negative) == 0) { + /* error case: "-202" */ + return sprintf(buf_p, "%s\n", SHOW_ATTR_WARNING); + } + + /* OK case:*/ + mark = strpbrk(tmp_buf, "\n"); + if (mark) { *mark = '\0'; } + + return sprintf(buf_p, "%s\n", tmp_buf); +} + +ssize_t +inventec_store_attr(const char *buf_p, size_t count, const char *invdevp) +{ + ssize_t ret = 0; + + /* [Step2] Get data by uaccess */ + mutex_lock(&rw_lock); + if ((ret = access_user_space(invdevp, ACC_W, (char*)buf_p, count, 0)) < 0) { + /* u_access fail */ + mutex_unlock(&rw_lock); + return -EINVAL; + } + mutex_unlock(&rw_lock); + + /* OK case:*/ + return ret; +} + +int sysfs_detect_hwmon_index(void) +{ + char hwmon_buf[MAX_ACC_SIZE]; + char hwmon_path[MAX_PATH_SIZE]; + int hwid = 0; + + for (hwid = 0; + hwid < INV_HWMID_MAX && (hwm_psoc == INV_HWMID_INIT || hwm_cpld == INV_HWMID_INIT); + hwid++) { + memset(hwmon_buf, 0, sizeof(hwmon_buf)); + sprintf(hwmon_path, "/sys/class/hwmon/hwmon%d/name", hwid); + + inventec_show_attr(hwmon_buf, hwmon_path); + if (strncmp(hwmon_buf, "inv_psoc", 8) == 0) { + hwm_psoc = hwid; + } + else + if (strncmp(hwmon_buf, "inv_bmc", 7) == 0) { + hwm_psoc = hwid; + } + + sprintf(hwmon_path, "/sys/class/hwmon/hwmon%d/device/name", hwid); + inventec_show_attr(hwmon_buf, hwmon_path); + if (strncmp(hwmon_buf, "inv_cpld2", 9) == 0) { + hwm_cpld2 = hwid; + } + else + if (strncmp(hwmon_buf, "inv_cpld", 8) == 0) { + hwm_cpld = hwid; + } + } + if (hwid >= INV_HWMID_MAX) { + printk(KERN_ERR "[p_thread] detect hwmon index failed, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return -1; + } + printk(KERN_INFO "[p_thread] detect hwmon index success, psoc = %d, cpld = %d\n", hwm_psoc, hwm_cpld); + return 0; +} + +static int __init +inventec_class_init(void) +{ + mutex_init(&rw_lock); + +#ifdef INV_PTHREAD_KERNEL_MODULE + if (sysfs_detect_hwmon_index() < 0) { + return -1; + } +#endif + + printk(KERN_INFO "[p_thread] [%s/%d] Module initial success.\n",__func__,__LINE__); + + return 0; +} + +static void __exit +inventec_class_exit(void) +{ + printk(KERN_INFO "[p_thread] [%s/%d] Remove module.\n",__func__,__LINE__); +} + +/* fan device *************************************/ +#define FAN_DEV_PATH_STATE "/sys/class/hwmon/hwmon%d/fan_gpi" +#define FAN_DEV_PATH_FAN1_INPUT "/sys/class/hwmon/hwmon%d/fan1_input" +#define FAN_DEV_PATH_FAN2_INPUT "/sys/class/hwmon/hwmon%d/fan2_input" +#define FAN_DEV_PATH_FAN3_INPUT "/sys/class/hwmon/hwmon%d/fan3_input" +#define FAN_DEV_PATH_FAN4_INPUT "/sys/class/hwmon/hwmon%d/fan4_input" +#define FAN_DEV_PATH_FAN5_INPUT "/sys/class/hwmon/hwmon%d/fan5_input" +#define FAN_DEV_PATH_FAN6_INPUT "/sys/class/hwmon/hwmon%d/fan6_input" +#define FAN_DEV_PATH_FAN7_INPUT "/sys/class/hwmon/hwmon%d/fan7_input" +#define FAN_DEV_PATH_FAN8_INPUT "/sys/class/hwmon/hwmon%d/fan8_input" + +static char fan_dev_path_state[MAX_PATH_SIZE]; +static char fan_dev_path_fan1_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan2_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan3_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan4_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan5_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan6_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan7_input[MAX_PATH_SIZE]; +static char fan_dev_path_fan8_input[MAX_PATH_SIZE]; + +void sysfs_fan_path_init(void) +{ + sprintf(&fan_dev_path_state[0], FAN_DEV_PATH_STATE, get_hwm_psoc()); + sprintf(&fan_dev_path_fan1_input[0],FAN_DEV_PATH_FAN1_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan2_input[0],FAN_DEV_PATH_FAN2_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan3_input[0],FAN_DEV_PATH_FAN3_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan4_input[0],FAN_DEV_PATH_FAN4_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan5_input[0],FAN_DEV_PATH_FAN5_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan6_input[0],FAN_DEV_PATH_FAN6_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan7_input[0],FAN_DEV_PATH_FAN7_INPUT, get_hwm_psoc()); + sprintf(&fan_dev_path_fan8_input[0],FAN_DEV_PATH_FAN8_INPUT, get_hwm_psoc()); +} + +#define FAN_STATE_NORMAL "normal" +#define FAN_STATE_FAULTY "faulty" +#define FAN_STATE_UNINSTALLED "uninstalled" +#define FAN_STATE_UNKNOW "unknown state" +#define FAN_STATE_INVALID "Invalid state value" +#define FAN_STATE_READ_ERROR "state read error" + +#define FAN_LOG_UNINSTALLED "removed" +#define FAN_LOG_NORMAL "inserted" + +//#define FAN_STATE_BIT_NORMAL 0 +#define FAN_STATE_BIT_FAULTY 0 +#define FAN_STATE_BIT_UNINSTALLED 1 +#define FAN_STATE_BIT_UNKNOW 2 +#define FAN_STATE_BIT_INVALID 3 +#define FAN_STATE_BIT_READ_ERROR 4 + +static struct fans_tbl_s { + char *fan_name; + char *fan_front; + char *fan_rear; + unsigned int fan_state; +} fans_tbl[] = { + {"fan1", fan_dev_path_fan1_input, + fan_dev_path_fan2_input, 0}, + {"fan2", fan_dev_path_fan3_input, + fan_dev_path_fan4_input, 0}, + {"fan3", fan_dev_path_fan5_input, + fan_dev_path_fan6_input, 0}, + {"fan4", fan_dev_path_fan7_input, + fan_dev_path_fan8_input, 0}, +}; +#define FAN_TBL_TOTAL ( sizeof(fans_tbl)/ sizeof(const struct fans_tbl_s) ) + +#define FAN_STATE_CHECK(i,b) (fans_tbl[i].fan_state & (1< 0) + { + printk(KERN_ERR "[p_thread] All fans failed.\n"); + printk(KERN_ERR "[p_thread] System is going to shutdown immediately in %d seconds.\n", cd_shutdown); + } + cd_shutdown -= 1; + } + return ret; +} + +/* End of faninfo_device */ + +static int __init +fan_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_fan_path_init(); +#endif + return 0; +} + + +static void __exit +fan_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove fan module.\n"); +} + +/* psu device *************************************/ +static unsigned int psu_voltin = 0; +#define PSU_VOLTIN_ACDC (70000) + +/* + * normal/unpower/uninstall/fault are PSU states output from driver level + * checkpsu/error are defined by sysfs + */ +#define PSU_STATE_VAL_NORMAL (0) +#define PSU_STATE_VAL_UNPOWER (2) +#define PSU_STATE_VAL_FAULT (4) +#define PSU_STATE_VAL_UNINSTALL (7) +#define PSU_STATE_VAL_CHECKPSU (8) +#define PSU_STATE_VAL_ERROR (9) + +#define PSU_STATE_NORMAL ("0 : normal") +#define PSU_STATE_UNPOWER ("2 : unpowered") +#define PSU_STATE_FAULT ("4 : fault") +#define PSU_STATE_UNINSTALL ("7 : not installed") +#define PSU_STATE_CHECKPSU ("8 : check psu") +#define PSU_STATE_ERROR ("9 : state error") + +#define PSU_STATE_LEN_NORMAL (strlen(PSU_STATE_NORMAL)) +#define PSU_STATE_LEN_UNPOWER (strlen(PSU_STATE_UNPOWER)) +#define PSU_STATE_LEN_FAULT (strlen(PSU_STATE_FAULT)) +#define PSU_STATE_LEN_UNINSTALL (strlen(PSU_STATE_UNINSTALL)) +#define PSU_STATE_LEN_CHECKPSU (strlen(PSU_STATE_CHECKPSU)) + +typedef struct { + char *inv_dev_attrp; + char *inv_dev_pathp; +} psu_dev_t; + +typedef struct { + const char *psu_name; + int psu_major; + dev_t psu_devt; + struct device *psu_dev_p; + psu_dev_t *psu_dev_namep; + int psu_dev_total; + char *psu_inv_pathp; + void *psu_tracking; + char *psu_currentin; + char *psu_currentout; + char *psu_powerin; + char *psu_powerout; + char *psu_voltin; + char *psu_voltout; +} psu_dev_group_t; + +#define PSU_PSOC_DEV_PATH_TEMPLATE "/sys/class/hwmon/hwmon%d/%s" +#define PSU_CPLD_DEV_PATH_TEMPLATE "/sys/class/hwmon/hwmon%d/device/%s" + +static char psu_dev_path_state[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltin[MAX_PATH_SIZE]; +#if 0 +static char psu_dev_path_vendor[MAX_PATH_SIZE]; +static char psu_dev_path_version[MAX_PATH_SIZE]; +static char psu_dev_path_sn[MAX_PATH_SIZE]; +static char psu_dev_path_temperature[MAX_PATH_SIZE]; +static char psu_dev_path_fan_speed[MAX_PATH_SIZE]; +static char psu_dev_path_fan_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_fan_faulty[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_currentout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerin[MAX_PATH_SIZE]; +static char psu_dev_path_psu_powerout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_voltout[MAX_PATH_SIZE]; +static char psu_dev_path_psu_pwm[MAX_PATH_SIZE]; +static char psu_dev_path_psu_rpm[MAX_PATH_SIZE]; +#endif + +void sysfs_psu_path_init(void) +{ + sprintf(&psu_dev_path_state[0], PSU_CPLD_DEV_PATH_TEMPLATE, get_hwm_cpld(), "\%s" ); + sprintf(&psu_dev_path_psu_voltin[0], PSU_PSOC_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#if 0 + sprintf(&psu_dev_path_vendor[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_version[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_sn[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_temperature[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_speed[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_fan_faulty[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_currentout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerin[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_powerout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_voltout[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_pwm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); + sprintf(&psu_dev_path_psu_rpm[0], PSU_DEV_PATH_TEMPLATE, get_hwm_psoc(), "\%s" ); +#endif +} + +static psu_dev_t psu_dev_name[] = { + { "state", psu_dev_path_state }, // Using cpld + { "psu_voltin", psu_dev_path_psu_voltin }, +#if 0 + { "vendor", psu_dev_path_vendor }, + { "version", psu_dev_path_version }, + { "sn", psu_dev_path_sn }, + { "temperature", psu_dev_path_temperature }, + { "fan_speed", psu_dev_path_fan_speed }, + { "fan_pwm", psu_dev_path_fan_pwm }, + { "fan_faulty", psu_dev_path_fan_faulty }, + { "psu_currentin", psu_dev_path_psu_currentin }, + { "psu_currentout", psu_dev_path_psu_currentout }, + { "psu_powerin", psu_dev_path_psu_powerin }, + { "psu_powerout", psu_dev_path_psu_powerout }, + { "psu_voltout", psu_dev_path_psu_voltout }, + { "psu_pwm", psu_dev_path_psu_pwm }, + { "psu_rpm", psu_dev_path_psu_rpm }, +#endif +}; +#define PSU_DEV_NAME_TOTAL ( sizeof(psu_dev_name) / sizeof(const psu_dev_t) ) + +static psu_dev_group_t psu_dev_group[] = { + { + .psu_name = "psu1", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, + { + .psu_name = "psu2", + .psu_dev_namep = &psu_dev_name[0], + .psu_dev_total = sizeof(psu_dev_name) / sizeof(const psu_dev_t), + }, +}; +#define PSU_DEV_GROUP_TOTAL ( sizeof(psu_dev_group)/ sizeof(const psu_dev_group_t) ) + +static char psu_state[4][MIN_ACC_SIZE]; + +static struct psu_wire_tbl_s { + char *psu_attr; + char *psu_name; + char *psu_wire; + char *psu_state; +} psu_wire_tbl[] = { + { "state", "psu1", "psu0", psu_state[0] }, // Using cpld + { "state", "psu2", "psu1", psu_state[1] }, + { "psu_voltin", "psu1", "psoc_psu1_vin", psu_state[2] }, + { "psu_voltin", "psu2", "psoc_psu2_vin", psu_state[3] }, +}; +#define PSU_WIRE_TBL_TOTAL ( sizeof(psu_wire_tbl)/ sizeof(const struct psu_wire_tbl_s) ) + +static char * +psu_attr_get_wirep(const char *psu_attrp, const char *psu_namep, char **psu_statepp) +{ + int i; + + for (i = 0; i < PSU_WIRE_TBL_TOTAL; i++) { + if (strncmp(psu_wire_tbl[i].psu_attr, psu_attrp, strlen(psu_attrp)) == 0 && + strncmp(psu_wire_tbl[i].psu_name, psu_namep, strlen(psu_namep)) == 0) { + if (psu_statepp) { + *psu_statepp = psu_wire_tbl[i].psu_state; + } + return psu_wire_tbl[i].psu_wire; + } + } + return NULL; +} + +int psu_check_state_normal(char *statep) +{ + if (strstr(statep, "normal")) { + return 1; + } + return 0; +} + +#define PSU_ATTR_VOLTIN ("psu_voltin") +#define PSU_ATTR_VOLTIN_LEN (10) + +/* Get PSU voltin for determon AC(110v) or DC(48v) */ +void psu_get_voltin(void) +{ + char acc_path[MAX_PATH_SIZE], volt[MIN_ACC_SIZE]; + psu_dev_t *devnamep; + unsigned int voltin; + char *invwirep; + int i, j; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + //psu_dev_group[i].psu_name; + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_VOLTIN, PSU_ATTR_VOLTIN_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_VOLTIN, psu_dev_group[i].psu_name, NULL); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_DEBUG "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(volt, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + continue; + } + else { + voltin = simple_strtol(&volt[0], NULL, 10); + printk(KERN_DEBUG "[p_thread] Read %s %s = %u\n",acc_path,volt,voltin); + if (voltin > psu_voltin) { + psu_voltin = voltin; + } + } + } + } + } + + SYSFS_LOG("[p_thread] PSU voltin = %u\n", psu_voltin); +} + +#define PSU_ATTR_STATE ("state") +#define PSU_ATTR_STATE_LEN (5) + +/* psus_control() by inv_thread */ +int psus_control(int log_only) +{ + char acc_path[MAX_PATH_SIZE], state[MIN_ACC_SIZE]; + psu_dev_t *devnamep = NULL; + char *invwirep = NULL; + char *psu_statep = NULL; + int i, j, flag = 0; + + for (i = 0; i < PSU_DEV_GROUP_TOTAL; i++) { + devnamep = psu_dev_group[i].psu_dev_namep; + for (j = 0; j < psu_dev_group[i].psu_dev_total; j++, devnamep++) { + if (strncmp(devnamep->inv_dev_attrp, PSU_ATTR_STATE, PSU_ATTR_STATE_LEN) == 0) { + invwirep = psu_attr_get_wirep(PSU_ATTR_STATE, psu_dev_group[i].psu_name, &psu_statep); + if (invwirep == NULL) { + printk(KERN_DEBUG "[p_thread] Invalid psuname: %s\n", psu_dev_group[i].psu_name); + continue; + } + sprintf(acc_path, devnamep->inv_dev_pathp, invwirep); + //printk(KERN_INFO "[p_thread] RYU: %s/%d: acc_path = %s\n",__func__,__LINE__,acc_path); + if (inventec_show_attr(state, acc_path) <= 0) { + printk(KERN_DEBUG "[p_thread] Read %s failed\n", acc_path); + if (strncmp(psu_statep, PSU_STATE_ERROR, strlen(PSU_STATE_ERROR)) != 0) { + strcpy(psu_statep, PSU_STATE_ERROR); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_ERROR); + } + flag = 1; + } + else + if (strstr(state, "normal")) { + //printk(KERN_INFO "[p_thread] %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + } + else + if (psu_voltin > PSU_VOLTIN_ACDC) { /* AC PSUS */ + //printk(KERN_INFO "[p_thread] RYU: %s: %s\n", psu_dev_group[i].psu_name, state); + if (strncmp(psu_statep, state, strlen(state)) != 0) { + strcpy(psu_statep, state); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,state); + } + flag = 1; + } + else { /* DC PSUS */ + if (strncmp(psu_statep, PSU_STATE_CHECKPSU, PSU_STATE_LEN_CHECKPSU) != 0) { + strcpy(psu_statep, PSU_STATE_CHECKPSU); + SYSFS_LOG("[p_thread] %s: %s\n",psu_dev_group[i].psu_name,PSU_STATE_CHECKPSU); + } + flag = 1; + } + } + } + } + + if (log_only) { + return 0; + } + + //SYSFS_LOG("[p_thread] RYU: %s: flag = %d\n",psu_wire_tbl[i].psu_name,flag); + if (flag == 1) { + status_led_grn("3"); + return 1; + } + return 0; +} + +/* End of psuinfo_device */ + +static int __init +psu_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_psu_path_init(); +#endif + return 0; +} + + +static void __exit +psu_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove psu module.\n"); +} + +/* led device *************************************/ +#define STATUS_LED_GRN_PATH "/sys/class/hwmon/hwmon%d/device/grn_led" +#define STATUS_LED_RED_PATH "/sys/class/hwmon/hwmon%d/device/red_led" + +#define FAN_LED_GRN1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn1" +#define FAN_LED_GRN2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn2" +#define FAN_LED_GRN3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn3" +#define FAN_LED_GRN4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_grn4" +#define FAN_LED_RED1_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red1" +#define FAN_LED_RED2_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red2" +#define FAN_LED_RED3_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red3" +#define FAN_LED_RED4_PATH "/sys/class/hwmon/hwmon%d/device/fan_led_red4" + +#define HWMON_DEVICE_DIAG_PATH "/sys/class/hwmon/hwmon%d/device/diag" +#define HWMON_DEVICE_CTRL_PATH "/sys/class/hwmon/hwmon%d/device/ctl" + +static char status_led_grn_path[MAX_PATH_SIZE]; +static char status_led_red_path[MAX_PATH_SIZE]; +static char fan_led_grn1_path[MAX_PATH_SIZE]; +static char fan_led_grn2_path[MAX_PATH_SIZE]; +static char fan_led_grn3_path[MAX_PATH_SIZE]; +static char fan_led_grn4_path[MAX_PATH_SIZE]; +static char fan_led_red1_path[MAX_PATH_SIZE]; +static char fan_led_red2_path[MAX_PATH_SIZE]; +static char fan_led_red3_path[MAX_PATH_SIZE]; +static char fan_led_red4_path[MAX_PATH_SIZE]; +static char hwmon_device_diag_path[MAX_PATH_SIZE]; +static char hwmon_device_ctrl_path[MAX_PATH_SIZE]; + +void sysfs_led_path_init(void) +{ + sprintf(&status_led_grn_path[0], STATUS_LED_GRN_PATH, get_hwm_cpld()); + sprintf(&status_led_red_path[0], STATUS_LED_RED_PATH, get_hwm_cpld()); + sprintf(&fan_led_grn1_path[0], FAN_LED_GRN1_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn2_path[0], FAN_LED_GRN2_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn3_path[0], FAN_LED_GRN3_PATH, get_hwm_psoc()); + sprintf(&fan_led_grn4_path[0], FAN_LED_GRN4_PATH, get_hwm_psoc()); + sprintf(&fan_led_red1_path[0], FAN_LED_RED1_PATH, get_hwm_psoc()); + sprintf(&fan_led_red2_path[0], FAN_LED_RED2_PATH, get_hwm_psoc()); + sprintf(&fan_led_red3_path[0], FAN_LED_RED3_PATH, get_hwm_psoc()); + sprintf(&fan_led_red4_path[0], FAN_LED_RED4_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_diag_path[0], HWMON_DEVICE_DIAG_PATH, get_hwm_psoc()); + sprintf(&hwmon_device_ctrl_path[0], HWMON_DEVICE_CTRL_PATH, get_hwm_cpld()); +} + +/* return 0/off 1/green 2/red */ +int +status_led_check_color(void) +{ + char tmpbuf[MIN_ACC_SIZE]; + int ret = STATUS_LED_INVALID; + + if (inventec_show_attr(&tmpbuf[0], status_led_grn_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_GRN0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_GRN1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_GRN2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_GRN3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_GRN7; + } + return ret; + } + + if (inventec_show_attr(&tmpbuf[0], status_led_red_path) > 0) { + if (tmpbuf[0] == '0') { + ret = STATUS_LED_RED0; + } + if (tmpbuf[0] == '1') { + ret = STATUS_LED_RED1; + } + if (tmpbuf[0] == '2') { + ret = STATUS_LED_RED2; + } + if (tmpbuf[0] == '3') { + ret = STATUS_LED_RED3; + } + if (tmpbuf[0] == '7') { + ret = STATUS_LED_RED7; + } + return ret; + } + return ret; +} + +/* + * Store attr Section + */ +static DEFINE_MUTEX(diag_mutex); + +ssize_t status_led_diag_mode_enable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '0') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("1", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return ret; + } + mutex_unlock(&diag_mutex); + } + + return ret; +} + +ssize_t status_led_diag_mode_disable(void) +{ + char tmp[MIN_ACC_SIZE]; + ssize_t ret; + + ret = inventec_show_attr(&tmp[0], hwmon_device_diag_path); + if (ret <= 0) { + return ret; + } + + if (tmp[0] == '1') { + mutex_lock(&diag_mutex); + ret = inventec_store_attr("0", 1, hwmon_device_diag_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + mutex_unlock(&diag_mutex); + return 1; + } + mutex_unlock(&diag_mutex); + } + return 1; +} + +ssize_t +status_led_change(const char *path1, const char *tmp1, const char *path2, const char *tmp2) +{ + ssize_t ret; + + ret = inventec_store_attr(tmp1, strlen(tmp1), path1); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(tmp2, strlen(tmp2), path2); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_red(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +ssize_t +status_led_grn(const char *freq) +{ + ssize_t ret; + + ret = inventec_store_attr("0", 1, &status_led_red_path[0]); + if (ret < 0) { + return ret; + } + ret = inventec_store_attr(freq, strlen(freq), &status_led_grn_path[0]); + if (ret < 0) { + return ret; + } + if ((ret = status_led_diag_mode_enable()) <= 0) { + return ret; + } + ssleep(1); + if ((ret = status_led_diag_mode_disable()) <= 0) { + return ret; + } + return ret; +} + +static int status_led_diag_mode = STATUS_LED_MODE_AUTO; + +int status_led_check_diag_mode(void) +{ + return status_led_diag_mode; +} + +void sys_ready(void) +{ + ssize_t ret; + ret = inventec_store_attr("1", 1, hwmon_device_ctrl_path); + if (ret < 0) { + SYSFS_LOG("[p_thread] set ctl fail"); + } + SYSFS_LOG("[p_thread] set ctl successfully"); +} + +/* End of ledinfo_device */ + +static int __init +led_device_init(void) +{ +#ifdef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); + sys_ready(); +#endif + return 0; +} + + +static void __exit +led_device_exit(void) +{ + printk(KERN_INFO "[p_thread] Remove led module.\n"); +} + +/* sensor device **********************************/ +#define SENSOR_DEV_PATH_SWITCH_TEMP "/sys/class/hwmon/hwmon%d/device/switch_tmp" + +static char sensor_dev_path_switch_temp[MAX_PATH_SIZE]; + +void sysfs_sensor_path_init(void) +{ + sprintf(&sensor_dev_path_switch_temp[0], SENSOR_DEV_PATH_SWITCH_TEMP, get_hwm_psoc()); +} + +void switch_temp_update(void) +{ + char buf[MIN_ACC_SIZE]; + ssize_t count = inventec_show_attr(&buf[0], "proc/switch/temp"); + if (count > 0) { + //printk(KERN_ERR "[p_thread] [STEMP] Switch temperature is out of range: %d\n", stemp); + inventec_store_attr(&buf[0], count, sensor_dev_path_switch_temp); + } +} + +/**************************************************/ +/* From system_device */ +static int inv_pthread_control = 1; + +int thread_control(void) +{ + return inv_pthread_control; +} + +void thread_control_set(int val) +{ + inv_pthread_control = val; +} +/* End system_device */ + +#define THREAD_SLEEP_MINS (3) +#define THREAD_DELAY_MINS (THREAD_SLEEP_MINS + THREAD_SLEEP_MINS + 1) + +extern void psu_get_voltin(void); + +static struct task_struct *thread_st; +static int thread_data; + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO +void led_set_gpio_to_change_status_led(void) +{ + ssize_t ret = inventec_store_attr("57", 2, "/sys/class/gpio/export"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write 57 to /sys/class/gpio/export failed\n"); + return; + } + ret = inventec_store_attr("low", 3, "/sys/class/gpio/gpio57/direction"); + if (ret < 0) { + SYSFS_LOG("[p_thread] Write low to /sys/class/gpio/gpio57/direction failed\n"); + return; + } + SYSFS_LOG("[p_thread] Set gpio to support status led change successfully\n"); +} +#endif + +// Function executed by kernel thread +static int thread_fn(void *unused) +{ + /* Delay for guarantee HW ready */ + ssleep(THREAD_DELAY_MINS); + +#ifndef INV_PTHREAD_KERNEL_MODULE + sysfs_led_path_init(); + sysfs_fan_path_init(); + sysfs_psu_path_init(); +#endif + //sysfs_sensor_path_init(); + + /* Default status init */ + status_led_grn("7"); + + psu_get_voltin(); + +#ifdef SWITCH_HEALTH_LED_CHANGE_VIA_GPIO + led_set_gpio_to_change_status_led(); +#endif + + while (1) + { + ssleep(THREAD_SLEEP_MINS); + + if (thread_control() == 0) { + printk(KERN_INFO "[p_thread] %s/%d: Thread Stop by inv_pthread control\n",__func__,__LINE__); + break; + } + + if (status_led_check_diag_mode() == STATUS_LED_MODE_MANU) { + /* status led in change color/freq mode, higher priority. Ignore fans sttaus */ + continue; + } + + //switch_temp_update(); + + if (fans_control() > 0) { + psus_control(1); + continue; + } + else + if (psus_control(0) > 0) { + continue; + } + + if (status_led_check_color() != STATUS_LED_GRN7) { /* status led red, change it to green */ + status_led_grn("7"); + } + } + +#ifndef INV_PTHREAD_KERNEL_MODULE +err_inv_pthread_fn_1: +#endif + do_exit(0); + printk(KERN_INFO "[p_thread] %s/%d: Thread Stopped\n",__func__,__LINE__); + return 0; +} + + +static ssize_t s_show(struct kobject *kobj, struct attribute *attr, char *buf) +{ + int fan_absence; + size_t count; + + fan_absence = fans_control(); + count += sprintf(&buf[count], "%d\n", fan_absence); + return count; +} + +static ssize_t s_store(struct kobject *kobj, struct attribute *attr, const char *buf, size_t count) +{ + return count; +} + +static struct attribute status_att = { + .name = "fan_absence", + .mode = 0777, +}; + +static const struct sysfs_ops status_ops = { + .show = s_show, + .store = s_store, +}; + +static struct kobj_type status_ktype = { + .sysfs_ops = &status_ops, +}; + + +static int __init inv_pthread_init(void) +{ + int retval; + + status_kobj = kzalloc(sizeof(*status_kobj), GFP_KERNEL); + if(!status_kobj) + return PTR_ERR(status_kobj); + + status_kset = kset_create_and_add("platform_status", NULL, kernel_kobj); + if(!status_kset) + return -1; + + status_kobj->kset = status_kset; + + retval = kobject_init_and_add(status_kobj, &status_ktype, NULL, "fan"); + if(retval) + return retval; + + retval = sysfs_create_file(status_kobj, &status_att); + + + inventec_class_init(); + fan_device_init(); + psu_device_init(); + led_device_init(); + + thread_control_set(1); + + printk(KERN_INFO "[p_thread] %s/%d: Creating Thread\n",__func__,__LINE__); + //Create the kernel thread with name 'inv_pthread' + thread_st = kthread_run(thread_fn, (void*)&thread_data, "inv_pthread"); + if (thread_st) + printk(KERN_INFO "[p_thread] inv_pthread Created successfully\n"); + else + printk(KERN_ERR "[p_thread] inv_pthread creation failed\n"); + + return retval; +} + +static void __exit inv_pthread_exit(void) +{ + thread_control_set(0); + /* Delay for guarantee thread exit */ + ssleep(THREAD_DELAY_MINS); + + fan_device_exit(); + psu_device_exit(); + led_device_exit(); + inventec_class_exit(); + + sysfs_remove_file(status_kobj, &status_att); + kset_unregister(status_kset); + kobject_del(status_kobj); + + printk(KERN_INFO "[p_thread] inv_pthread cleaning Up\n"); +} + +module_init(inv_pthread_init); +module_exit(inv_pthread_exit); + +MODULE_AUTHOR("Robert "); +MODULE_DESCRIPTION("Inventec Platform Management Thread"); +MODULE_VERSION("version 1.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_swps.c b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_swps.c new file mode 100644 index 00000000000..11b60f78ae9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_swps.c @@ -0,0 +1,3266 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "inv_swps.h" + +static int ctl_major; +static int port_major; +static int ioexp_total; +static int port_total; +static int block_polling; +static int auto_config; +static int flag_i2c_reset; +static int flag_mod_state; +static unsigned gpio_rest_mux; +static struct class *swp_class_p = NULL; +static struct inv_platform_s *platform_p = NULL; +static struct inv_ioexp_layout_s *ioexp_layout = NULL; +static struct inv_port_layout_s *port_layout = NULL; +int io_no_init = 0; +module_param(io_no_init, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP); +static void swp_polling_worker(struct work_struct *work); +static DECLARE_DELAYED_WORK(swp_polling, swp_polling_worker); + +static int reset_i2c_topology(void); + + +static int +__swp_match(struct device *dev, +#ifdef SWPS_KERN_VER_AF_3_10 + + const void *data){ +#else + void *data){ +#endif + + char *name = (char *)data; + if (strcmp(dev_name(dev), name) == 0) + return 1; + return 0; +} + + +struct device * +get_swpdev_by_name(char *name){ + struct device *dev = class_find_device(swp_class_p, + NULL, + name, + __swp_match); + return dev; +} + + +static int +sscanf_2_int(const char *buf) { + + int result = -EBFONT; + char *hex_tag = "0x"; + + if (strcspn(buf, hex_tag) == 0) { + if (sscanf(buf,"%x",&result)) { + return result; + } + } else { + if (sscanf(buf,"%d",&result)) { + return result; + } + if(sscanf(buf,"-%d",&result)) { + return -result; + } + if (sscanf(buf,"%x",&result)) { + return result; + } + } + return -EBFONT; +} + + +static int +sscanf_2_binary(const char *buf) { + + int result = sscanf_2_int(buf); + + if (result < 0){ + return -EBFONT; + } + switch (result) { + case 0: + case 1: + return result; + default: + break; + } + return -EBFONT; +} + + +static int +_get_polling_period(void) { + + int retval = 0; + + if (SWP_POLLING_PERIOD == 0) { + return 0; + } + retval = ((SWP_POLLING_PERIOD * HZ) / 1000); + if (retval == 0) { + return 1; + } + return retval; +} + + +static struct transvr_obj_s * +_get_transvr_obj(char *dev_name) { + + struct device *dev_p = NULL; + struct transvr_obj_s *transvr_obj_p = NULL; + + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + return NULL; + } + transvr_obj_p = dev_get_drvdata(dev_p); + if (!transvr_obj_p){ + return NULL; + } + return transvr_obj_p; +} + + +static int +_is_i2c_target_exist(int chan, int addr) { + /* retval: Exist = 1 / Not exist = 0 / Error < 0 + */ + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + int retval = -1; + int err = -1; + int d_offs = 0; + + adap = i2c_get_adapter(chan); + if (!adap) { + SWPS_DEBUG("%s: can't get adapter\n", __func__); + retval = 0; + goto out_is_i2c_target_exist_1; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client) { + SWPS_ERR("%s: kzalloc fail\n", __func__); + retval = -1; + goto out_is_i2c_target_exist_2; + } + client->adapter = adap; + client->addr = addr; + err = i2c_smbus_read_byte_data(client, d_offs); + if (err < 0) { + retval = 0; + } else { + retval = 1; + } + i2c_put_adapter(adap); + kfree(client); + return retval; + +out_is_i2c_target_exist_2: + i2c_put_adapter(adap); +out_is_i2c_target_exist_1: + return retval; +} + + +static void +unlock_tobj_all(void) { + + struct transvr_obj_s *tobj_p; + char port_name[32]; + int port_id = 0; + int minor_curr = 0; + + for (minor_curr=0; minor_currauto_config = auto_config; + unlock_transvr_obj(tobj_p); + SWPS_DEBUG("%s: Set %s auto_config=%d\n", + __func__, tobj_p->swp_name, auto_config); + } + return retval; +} + + +/* ========== R/W Functions module control attribute ========== + */ +static ssize_t +show_attr_platform(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 32, "%s\n", platform_p->name); +} + + +static ssize_t +show_attr_version(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%s\n", SWP_VERSION); +} + + +static ssize_t +show_attr_status(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", flag_mod_state); +} + + +static ssize_t +show_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", auto_config); +} + + +static ssize_t +show_attr_block_poll(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", block_polling); +} +static ssize_t +show_attr_io_no_init(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + return snprintf(buf_p, 8, "%d\n", io_no_init); +} + + +static int +_check_reset_pwd(const char *buf_p, + size_t count) { + + int in_max = 64; + int in_len = (int)count; + char in_val[64] = "ERR"; + char *emsg = "ERR"; + + if (in_len >= in_max) { + emsg = "input too much"; + goto err_check_reset_pwd; + } + if (!sscanf(buf_p,"%s",in_val)) { + emsg = "format incorrect"; + goto err_check_reset_pwd; + } + if (strcmp(in_val, SWP_RESET_PWD) != 0) { + emsg = "password incorrect"; + goto err_check_reset_pwd; + } + return 0; + +err_check_reset_pwd: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} + + +static ssize_t +store_attr_reset_i2c(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + /* Polling mode */ + if (SWP_POLLING_ENABLE) { + SWPS_INFO("%s: reset I2C :polling\n", __func__); + flag_i2c_reset = 1; + return count; + } + /* Direct mode */ + SWPS_INFO("%s: reset I2C go. :direct\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset fail!\n", __func__); + return -EIO; + } + SWPS_INFO("%s: reset I2C ok. :direct\n", __func__); + return count; +} + + +static ssize_t +store_attr_reset_swps(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p; + char port_name[32] = "ERR"; + int port_id = 0; + int minor_curr = 0; + + if (_check_reset_pwd(buf_p, count) < 0) { + return -EBFONT; + } + for (minor_curr=0; minor_currstate = STATE_TRANSVR_DISCONNECTED; + unlock_transvr_obj(tobj_p); + SWPS_INFO("%s: reset:%s\n", __func__, tobj_p->swp_name); + } + return count; +} + + +static ssize_t +store_attr_auto_config(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if (input_val < 0){ + return -EBFONT; + } + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + auto_config = input_val; + _update_auto_config_2_trnasvr(); + return count; +} + + +static ssize_t +store_attr_block_poll( struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if (input_val < 0){ + return -EBFONT; + } + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + + if(input_val != block_polling){ + block_polling = input_val; + if(block_polling){ + cancel_delayed_work_sync(&swp_polling); + } + else{ + schedule_delayed_work(&swp_polling, _get_polling_period()); + } + } + + return count; +} + +static ssize_t +store_attr_io_no_init( struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + int input_val = sscanf_2_int(buf_p); + + if ((input_val != 0) && (input_val != 1)) { + return -EBFONT; + } + + if(input_val != io_no_init){ + io_no_init = input_val; + } + + return count; +} + +/* ========== Show functions: For transceiver attribute ========== + */ +static ssize_t +_show_transvr_hex_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + int result; + + lock_transvr_obj(tobj_p); + result = get_func(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 8, "%d\n", result); + } else { + len = snprintf(buf_p, 8, "0x%02x\n", result); + } + return len; +} + + +static ssize_t +_show_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = snprintf(buf_p, 16, "%d\n", get_func(tobj_p)); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +_show_transvr_str_attr(struct transvr_obj_s* tobj_p, + int (*get_func)(struct transvr_obj_s* tobj_p, char* buf), + char *buf_p) { + size_t len; + + lock_transvr_obj(tobj_p); + len = get_func(tobj_p, buf_p); + unlock_transvr_obj(tobj_p); + return len; +} + + +static ssize_t +show_attr_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_id, + buf_p); +} + + +static ssize_t +show_attr_ext_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_ext_id, + buf_p); +} + + +static ssize_t +show_attr_connector(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_connector, + buf_p); +} + + +static ssize_t +show_attr_vendor_name(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_name, + buf_p); +} + + +static ssize_t +show_attr_vendor_pn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_pn, + buf_p); +} + + +static ssize_t +show_attr_vendor_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_rev, + buf_p); +} + + +static ssize_t +show_attr_vendor_sn(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_vendor_sn, + buf_p); +} + + +static ssize_t +show_attr_power_cls(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + size_t len; + int result; + struct transvr_obj_s *tobj_p; + + tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + lock_transvr_obj(tobj_p); + result = tobj_p->get_power_cls(tobj_p); + unlock_transvr_obj(tobj_p); + if (result < 0){ + len = snprintf(buf_p, 16, "%d\n", result); + } else { + len = snprintf(buf_p, 16, "Power Class %d\n", result); + } + return len; +} + + +static ssize_t +show_attr_br(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_br, + buf_p); +} + + +static ssize_t +show_attr_len_sm(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_sm, + buf_p); +} + + +static ssize_t +show_attr_len_smf(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_smf, + buf_p); +} + + +static ssize_t +show_attr_len_om1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om1, + buf_p); +} + + +static ssize_t +show_attr_len_om2(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om2, + buf_p); +} + + +static ssize_t +show_attr_len_om3(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om3, + buf_p); +} + + +static ssize_t +show_attr_len_om4(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_len_om4, + buf_p); +} + + +static ssize_t +show_attr_comp_rev(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_rev, + buf_p); +} + + +static ssize_t +show_attr_comp_eth(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_1, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10, + buf_p); +} + + +static ssize_t +show_attr_comp_eth_10_40(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_eth_10_40, + buf_p); +} + + +static ssize_t +show_attr_comp_extend(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_comp_extend, + buf_p); +} + + +static ssize_t +show_attr_rate_id(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_rate_id, + buf_p); +} + + +static ssize_t +show_attr_temperature(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_temp, + buf_p); +} + + +static ssize_t +show_attr_voltage(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_curr_vol, + buf_p); +} + + +static ssize_t +show_attr_tx_bias(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_bias, + buf_p); +} + + +static ssize_t +show_attr_tx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_power, + buf_p); +} + + +static ssize_t +show_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_tx_eq, + buf_p); +} + + +static ssize_t +show_attr_rx_power(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_power, + buf_p); +} + + +static ssize_t +show_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_am, + buf_p); +} + + +static ssize_t +show_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_rx_em, + buf_p); +} + + +static ssize_t +show_attr_wavelength(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_wavelength, + buf_p); +} + + +static ssize_t +show_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_offset, + buf_p); +} + + +static ssize_t +show_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_extphy_reg, + buf_p); +} + + +static ssize_t +show_attr_info(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_info, + buf_p); +} + + +static ssize_t +show_attr_if_type(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_type, + buf_p); +} + + +static ssize_t +show_attr_if_speed(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_speed, + buf_p); +} + + +static ssize_t +show_attr_if_lane(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_if_lane, + buf_p); +} + + +static ssize_t +show_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_hex_attr(tobj_p, + tobj_p->get_cdr, + buf_p); +} + + +static ssize_t +show_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs0, + buf_p); +} + + +static ssize_t +show_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_int_attr(tobj_p, + tobj_p->get_soft_rs1, + buf_p); +} + + +static ssize_t +show_attr_soft_rx_los(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_rx_los, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_soft_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_soft_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if(!tobj_p){ + return -ENODEV; + } + return _show_transvr_str_attr(tobj_p, + tobj_p->get_auto_tx_disable, + buf_p); +} + + +/* ========== Store functions: transceiver (R/W) attribute ========== + */ +static ssize_t +_store_transvr_int_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_byte_hex_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_int(buf_p); + if ((input < 0) || (input > 0xff)){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +_store_transvr_binary_attr(struct transvr_obj_s* tobj_p, + int (*set_func)(struct transvr_obj_s *tobj_p, int input_val), + const char *buf_p, + size_t count) { + int input, err; + + input = sscanf_2_binary(buf_p); + if (input < 0){ + return -EBFONT; + } + lock_transvr_obj(tobj_p); + err = set_func(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_cdr(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_cdr, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_binary_attr(tobj_p, + tobj_p->set_soft_rs1, + buf_p, + count); +} + + +static ssize_t +store_attr_soft_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int check = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((check < 0) || (check > 0xf)){ + return -EBFONT; + } + return _store_transvr_byte_hex_attr(tobj_p, + tobj_p->set_soft_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_auto_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count) { + + int err = -EPERM; + int input = sscanf_2_int(buf_p); + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + if ((input < 0) || (input > 0xf)){ + if (input != VAL_TRANSVR_FUNCTION_DISABLE) { + return -EBFONT; + } + } + lock_transvr_obj(tobj_p); + err = tobj_p->set_auto_tx_disable(tobj_p, input); + unlock_transvr_obj(tobj_p); + if (err < 0){ + return err; + } + return count; +} + + +static ssize_t +store_attr_tx_eq(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_tx_eq, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_am(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_am, + buf_p, + count); +} + + +static ssize_t +store_attr_rx_em(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_rx_em, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_offset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_offset, + buf_p, + count); +} + + +static ssize_t +store_attr_extphy_reg(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _store_transvr_int_attr(tobj_p, + tobj_p->set_extphy_reg, + buf_p, + count); +} + +/* ========== Show functions: For I/O Expander attribute ========== + */ +static ssize_t +_show_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*get_func)(struct ioexp_obj_s *ioexp_p, int voffset), + char *buf_p) { + size_t len; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR(" %s: data corruption! :%s\n", __func__, tobj_p->swp_name); + return -ENODATA; + } + mutex_lock(&ioexp_p->lock); + len = snprintf(buf_p, 8, "%d\n", get_func(ioexp_p, tobj_p->ioexp_virt_offset)); + mutex_unlock(&ioexp_p->lock); + return len; +} + + +static ssize_t +show_attr_present(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_present, + buf_p); +} + + +static ssize_t +show_attr_tx_fault(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_fault, + buf_p); +} + + +static ssize_t +show_attr_rxlos(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_rxlos, + buf_p); +} + + +static ssize_t +show_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_tx_disable, + buf_p); +} + + +static ssize_t +show_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_reset, + buf_p); +} + + +static ssize_t +show_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_lpmod, + buf_p); +} + + +static ssize_t +show_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_modsel, + buf_p); +} + + +static ssize_t +show_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs0, + buf_p); +} + + +static ssize_t +show_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + char *buf_p){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p){ + return -ENODEV; + } + return _show_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->get_hard_rs1, + buf_p); +} + + +/* ========== Store functions: For I/O Expander (R/W) attribute ========== + */ +static ssize_t +_store_ioexp_binary_attr(struct transvr_obj_s *tobj_p, + int (*set_func)(struct ioexp_obj_s *ioexp_p, + int virt_offset, int input_val), + const char *buf_p, + size_t count) { + + int input, err; + struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p; + + if (!ioexp_p) { + SWPS_ERR("%s: data corruption! :%s\n", + __func__, tobj_p->swp_name); + return -ENODATA; + } + input = sscanf_2_binary(buf_p); + if (input < 0) { + return -EBFONT; + } + mutex_lock(&ioexp_p->lock); + err = set_func(ioexp_p, tobj_p->ioexp_virt_offset, input); + mutex_unlock(&ioexp_p->lock); + if (err < 0){ + return err; + } + return count; +} + +static ssize_t +store_attr_tx_disable(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_tx_disable, + buf_p, + count); +} + + +static ssize_t +store_attr_reset(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_reset, + buf_p, + count); +} + + +static ssize_t +store_attr_lpmod(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_lpmod, + buf_p, + count); +} + + +static ssize_t +store_attr_modsel(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_modsel, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs0(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs0, + buf_p, + count); +} + + +static ssize_t +store_attr_hard_rs1(struct device *dev_p, + struct device_attribute *attr_p, + const char *buf_p, + size_t count){ + + struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p); + if (!tobj_p) { + return -ENODEV; + } + return _store_ioexp_binary_attr(tobj_p, + tobj_p->ioexp_obj_p->set_hard_rs1, + buf_p, + count); +} + + +/* ========== SWPS attribute: For module control ========== + */ +static DEVICE_ATTR(platform, S_IRUGO, show_attr_platform, NULL); +static DEVICE_ATTR(version, S_IRUGO, show_attr_version, NULL); +static DEVICE_ATTR(status, S_IRUGO, show_attr_status, NULL); +static DEVICE_ATTR(reset_i2c, S_IWUSR, NULL, store_attr_reset_i2c); +static DEVICE_ATTR(reset_swps, S_IWUSR, NULL, store_attr_reset_swps); +static DEVICE_ATTR(auto_config, S_IRUGO|S_IWUSR, show_attr_auto_config, store_attr_auto_config); +static DEVICE_ATTR(block_poll, S_IRUGO|S_IWUSR, show_attr_block_poll, store_attr_block_poll); +static DEVICE_ATTR(io_no_init, S_IRUGO|S_IWUSR, show_attr_io_no_init, store_attr_io_no_init); + + +/* ========== Transceiver attribute: from eeprom ========== + */ +static DEVICE_ATTR(id, S_IRUGO, show_attr_id, NULL); +static DEVICE_ATTR(ext_id, S_IRUGO, show_attr_ext_id, NULL); +static DEVICE_ATTR(connector, S_IRUGO, show_attr_connector, NULL); +static DEVICE_ATTR(vendor_name, S_IRUGO, show_attr_vendor_name, NULL); +static DEVICE_ATTR(vendor_pn, S_IRUGO, show_attr_vendor_pn, NULL); +static DEVICE_ATTR(vendor_rev, S_IRUGO, show_attr_vendor_rev, NULL); +static DEVICE_ATTR(vendor_sn, S_IRUGO, show_attr_vendor_sn, NULL); +static DEVICE_ATTR(power_cls, S_IRUGO, show_attr_power_cls, NULL); +static DEVICE_ATTR(br, S_IRUGO, show_attr_br, NULL); +static DEVICE_ATTR(len_sm, S_IRUGO, show_attr_len_sm, NULL); +static DEVICE_ATTR(len_smf, S_IRUGO, show_attr_len_smf, NULL); +static DEVICE_ATTR(len_om1, S_IRUGO, show_attr_len_om1, NULL); +static DEVICE_ATTR(len_om2, S_IRUGO, show_attr_len_om2, NULL); +static DEVICE_ATTR(len_om3, S_IRUGO, show_attr_len_om3, NULL); +static DEVICE_ATTR(len_om4, S_IRUGO, show_attr_len_om4, NULL); +static DEVICE_ATTR(comp_rev, S_IRUGO, show_attr_comp_rev, NULL); +static DEVICE_ATTR(comp_eth, S_IRUGO, show_attr_comp_eth, NULL); +static DEVICE_ATTR(comp_eth_10, S_IRUGO, show_attr_comp_eth_10, NULL); +static DEVICE_ATTR(comp_eth_10_40, S_IRUGO, show_attr_comp_eth_10_40, NULL); +static DEVICE_ATTR(comp_extend, S_IRUGO, show_attr_comp_extend, NULL); +static DEVICE_ATTR(rate_id, S_IRUGO, show_attr_rate_id, NULL); +static DEVICE_ATTR(temperature, S_IRUGO, show_attr_temperature, NULL); +static DEVICE_ATTR(voltage, S_IRUGO, show_attr_voltage, NULL); +static DEVICE_ATTR(tx_bias, S_IRUGO, show_attr_tx_bias, NULL); +static DEVICE_ATTR(tx_power, S_IRUGO, show_attr_tx_power, NULL); +static DEVICE_ATTR(rx_power, S_IRUGO, show_attr_rx_power, NULL); +static DEVICE_ATTR(info, S_IRUGO, show_attr_info, NULL); +static DEVICE_ATTR(if_type, S_IRUGO, show_attr_if_type, NULL); +static DEVICE_ATTR(if_speed, S_IRUGO, show_attr_if_speed, NULL); +static DEVICE_ATTR(if_lane, S_IRUGO, show_attr_if_lane, NULL); +static DEVICE_ATTR(soft_rx_los, S_IRUGO, show_attr_soft_rx_los, NULL); +static DEVICE_ATTR(soft_tx_fault, S_IRUGO, show_attr_soft_tx_fault, NULL); +static DEVICE_ATTR(wavelength, S_IRUGO, show_attr_wavelength, NULL); +static DEVICE_ATTR(tx_eq, S_IRUGO|S_IWUSR, show_attr_tx_eq, store_attr_tx_eq); +static DEVICE_ATTR(rx_am, S_IRUGO|S_IWUSR, show_attr_rx_am, store_attr_rx_am); +static DEVICE_ATTR(rx_em, S_IRUGO|S_IWUSR, show_attr_rx_em, store_attr_rx_em); +static DEVICE_ATTR(cdr, S_IRUGO|S_IWUSR, show_attr_cdr, store_attr_cdr); +static DEVICE_ATTR(soft_rs0, S_IRUGO|S_IWUSR, show_attr_soft_rs0, store_attr_soft_rs0); +static DEVICE_ATTR(soft_rs1, S_IRUGO|S_IWUSR, show_attr_soft_rs1, store_attr_soft_rs1); +static DEVICE_ATTR(soft_tx_disable, S_IRUGO|S_IWUSR, show_attr_soft_tx_disable, store_attr_soft_tx_disable); +static DEVICE_ATTR(auto_tx_disable, S_IRUGO|S_IWUSR, show_attr_auto_tx_disable, store_attr_auto_tx_disable); +static DEVICE_ATTR(extphy_offset, S_IRUGO|S_IWUSR, show_attr_extphy_offset, store_attr_extphy_offset); +static DEVICE_ATTR(extphy_reg, S_IRUGO|S_IWUSR, show_attr_extphy_reg, store_attr_extphy_reg); + +/* ========== IO Expander attribute: from expander ========== + */ +static DEVICE_ATTR(present, S_IRUGO, show_attr_present, NULL); +static DEVICE_ATTR(tx_fault, S_IRUGO, show_attr_tx_fault, NULL); +static DEVICE_ATTR(rxlos, S_IRUGO, show_attr_rxlos, NULL); +static DEVICE_ATTR(tx_disable, S_IRUGO|S_IWUSR, show_attr_tx_disable, store_attr_tx_disable); +static DEVICE_ATTR(reset, S_IRUGO|S_IWUSR, show_attr_reset, store_attr_reset); +static DEVICE_ATTR(lpmod, S_IRUGO|S_IWUSR, show_attr_lpmod, store_attr_lpmod); +static DEVICE_ATTR(modsel, S_IRUGO|S_IWUSR, show_attr_modsel, store_attr_modsel); +static DEVICE_ATTR(hard_rs0, S_IRUGO|S_IWUSR, show_attr_hard_rs0, store_attr_hard_rs0); +static DEVICE_ATTR(hard_rs1, S_IRUGO|S_IWUSR, show_attr_hard_rs1, store_attr_hard_rs1); + +/* ========== Functions for module handling ========== + */ +static void +clean_port_objs(void){ + + dev_t dev_num; + char dev_name[32]; + struct device *device_p; + struct transvr_obj_s *tobj_p; + int minor_curr, port_id; + + for (minor_curr=0; minor_curri2c_client_p) { + i2c_put_adapter(tobj_p->i2c_client_p->adapter); + kfree(tobj_p->i2c_client_p); + } + kfree(tobj_p->vendor_name); + kfree(tobj_p->vendor_pn); + kfree(tobj_p->vendor_rev); + kfree(tobj_p->vendor_sn); + kfree(tobj_p->worker_p); + kfree(tobj_p); + } + dev_num = MKDEV(port_major, minor_curr); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static void +clean_swps_common(void){ + + dev_t dev_num; + struct device *device_p; + + device_p = get_swpdev_by_name(SWP_DEV_MODCTL); + if (device_p){ + dev_num = MKDEV(ctl_major, 1); + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); + } + cancel_delayed_work_sync(&swp_polling); + if (platform_p) { + kfree(platform_p); + } + SWPS_DEBUG("%s: done.\n", __func__); +} + + +static int +get_platform_type(void){ + + int i, tmp; + int auto_chan = -1; + int auto_addr = -1; + int pf_total = ARRAY_SIZE(platform_map); + char log_msg[64] = "ERROR"; + + platform_p = kzalloc(sizeof(struct inv_platform_s), GFP_KERNEL); + if (!platform_p){ + snprintf(log_msg, sizeof(log_msg), "kzalloc fail"); + goto err_get_platform_type_1; + } + memset(platform_p->name, 0, sizeof(platform_p->name)); + + switch (PLATFORM_SETTINGS) { + case PLATFORM_TYPE_AUTO: + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", dmi_get_system_info(DMI_BOARD_NAME)); + for (i=0; iname, platform_map[i].name) == 0) { + platform_p->id = platform_map[i].id; + snprintf(log_msg, sizeof(log_msg), + "Auto detect platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Auto detect fail! detect platform: %s", + platform_p->name); + goto err_get_platform_type_2; + + case PLATFORM_TYPE_PEONY_AUTO: +#ifdef SWPS_PEONY_SFP + auto_chan = peony_sfp_ioexp_layout[0].addr[0].chan_id; + auto_addr = peony_sfp_ioexp_layout[0].addr[0].chip_addr; +#endif + tmp = _is_i2c_target_exist(auto_chan, auto_addr); + switch (tmp) { + case 0: /* Copper SKU */ + SWPS_INFO("Auto-detected :Peony :Copper\n"); + platform_p->id = PLATFORM_TYPE_PEONY_COPPER_GA; + goto map_platform_name; + + case 1: /* SFP SKU */ + SWPS_INFO("Auto-detected :Peony :SFP\n"); + platform_p->id = PLATFORM_TYPE_PEONY_SFP_GA; + goto map_platform_name; + + default: + break; + } + snprintf(log_msg, sizeof(log_msg), + "Auto detect Peony SKU fail! :%d", tmp); + goto err_get_platform_type_2; + + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + case PLATFORM_TYPE_REDWOOD: + case PLATFORM_TYPE_REDWOOD_FSL: + case PLATFORM_TYPE_HUDSON32I_GA: + case PLATFORM_TYPE_SPRUCE: + case PLATFORM_TYPE_CYPRESS_GA1: + case PLATFORM_TYPE_CYPRESS_GA2: + case PLATFORM_TYPE_CYPRESS_BAI: + case PLATFORM_TYPE_TAHOE: + case PLATFORM_TYPE_SEQUOIA_GA: + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + case PLATFORM_TYPE_COTTONWOOD_RANGELEY: + case PLATFORM_TYPE_MAPLE_GA: + case PLATFORM_TYPE_MAPLE_B: + case PLATFORM_TYPE_GULMOHAR_GA: + case PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA: + case PLATFORM_TYPE_PEONY_SFP_GA: + case PLATFORM_TYPE_PEONY_COPPER_GA: + platform_p->id = PLATFORM_SETTINGS; + goto map_platform_name; + + default: + break; + } + snprintf(log_msg, sizeof(log_msg), + "PLATFORM_SETTINGS:%d undefined", PLATFORM_SETTINGS); + goto err_get_platform_type_2; + +map_platform_name: + for (i=0; iid == platform_map[i].id) { + snprintf(platform_p->name, (sizeof(platform_p->name) - 1), + "%s", platform_map[i].name); + snprintf(log_msg, sizeof(log_msg), + "User setup platform: %d (%s)", + platform_p->id, platform_p->name); + goto ok_get_platform_type_1; + } + } + snprintf(log_msg, sizeof(log_msg), + "Internal error, can not map id:%d", + platform_p->id ); + goto err_get_platform_type_2; + +ok_get_platform_type_1: + SWPS_DEBUG("%s: %s, :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return 0; + +err_get_platform_type_2: + kfree(platform_p); +err_get_platform_type_1: + SWPS_ERR("%s: %s :%d\n", __func__, log_msg, PLATFORM_SETTINGS); + return -1; +} + + +static int +get_layout_info(void){ + + switch (platform_p->id) { +#ifdef SWPS_MAGNOLIA + case PLATFORM_TYPE_MAGNOLIA: + case PLATFORM_TYPE_MAGNOLIA_FNC: + gpio_rest_mux = magnolia_gpio_rest_mux; + ioexp_layout = magnolia_ioexp_layout; + port_layout = magnolia_port_layout; + ioexp_total = ARRAY_SIZE(magnolia_ioexp_layout); + port_total = ARRAY_SIZE(magnolia_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD + case PLATFORM_TYPE_REDWOOD: + gpio_rest_mux = redwood_gpio_rest_mux; + ioexp_layout = redwood_ioexp_layout; + port_layout = redwood_port_layout; + ioexp_total = ARRAY_SIZE(redwood_ioexp_layout); + port_total = ARRAY_SIZE(redwood_port_layout); + break; +#endif +#ifdef SWPS_HUDSON32I_GA + case PLATFORM_TYPE_HUDSON32I_GA: + gpio_rest_mux = hudsin32iga_gpio_rest_mux; + ioexp_layout = hudson32iga_ioexp_layout; + port_layout = hudson32iga_port_layout; + ioexp_total = ARRAY_SIZE(hudson32iga_ioexp_layout); + port_total = ARRAY_SIZE(hudson32iga_port_layout); + break; +#endif +#ifdef SWPS_SPRUCE + case PLATFORM_TYPE_SPRUCE: + gpio_rest_mux = spruce_gpio_rest_mux; + ioexp_layout = spruce_ioexp_layout; + port_layout = spruce_port_layout; + ioexp_total = ARRAY_SIZE(spruce_ioexp_layout); + port_total = ARRAY_SIZE(spruce_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA1 + case PLATFORM_TYPE_CYPRESS_GA1: + gpio_rest_mux = cypress_ga1_gpio_rest_mux; + ioexp_layout = cypress_ga1_ioexp_layout; + port_layout = cypress_ga1_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga1_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga1_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_GA2 + case PLATFORM_TYPE_CYPRESS_GA2: + gpio_rest_mux = cypress_ga2_gpio_rest_mux; + ioexp_layout = cypress_ga2_ioexp_layout; + port_layout = cypress_ga2_port_layout; + ioexp_total = ARRAY_SIZE(cypress_ga2_ioexp_layout); + port_total = ARRAY_SIZE(cypress_ga2_port_layout); + break; +#endif +#ifdef SWPS_CYPRESS_BAI + case PLATFORM_TYPE_CYPRESS_BAI: + gpio_rest_mux = cypress_b_gpio_rest_mux; + ioexp_layout = cypress_b_ioexp_layout; + port_layout = cypress_b_port_layout; + ioexp_total = ARRAY_SIZE(cypress_b_ioexp_layout); + port_total = ARRAY_SIZE(cypress_b_port_layout); + break; +#endif +#ifdef SWPS_REDWOOD_FSL + case PLATFORM_TYPE_REDWOOD_FSL: + gpio_rest_mux = redwood_fsl_gpio_rest_mux; + ioexp_layout = redwood_fsl_ioexp_layout; + port_layout = redwood_fsl_port_layout; + ioexp_total = ARRAY_SIZE(redwood_fsl_ioexp_layout); + port_total = ARRAY_SIZE(redwood_fsl_port_layout); + break; +#endif +#ifdef SWPS_TAHOE + case PLATFORM_TYPE_TAHOE: + gpio_rest_mux = tahoe_gpio_rest_mux; + ioexp_layout = tahoe_ioexp_layout; + port_layout = tahoe_port_layout; + ioexp_total = ARRAY_SIZE(tahoe_ioexp_layout); + port_total = ARRAY_SIZE(tahoe_port_layout); + break; +#endif +#ifdef SWPS_SEQUOIA + case PLATFORM_TYPE_SEQUOIA_GA: + gpio_rest_mux = sequoia_gpio_rest_mux; + ioexp_layout = sequoia_ioexp_layout; + port_layout = sequoia_port_layout; + ioexp_total = ARRAY_SIZE(sequoia_ioexp_layout); + port_total = ARRAY_SIZE(sequoia_port_layout); + break; +#endif +#ifdef SWPS_LAVENDER + case PLATFORM_TYPE_LAVENDER_GA: + case PLATFORM_TYPE_LAVENDER_ONL: + gpio_rest_mux = lavender_gpio_rest_mux; + ioexp_layout = lavender_ioexp_layout; + port_layout = lavender_port_layout; + ioexp_total = ARRAY_SIZE(lavender_ioexp_layout); + port_total = ARRAY_SIZE(lavender_port_layout); + break; +#endif +#ifdef SWPS_COTTONWOOD_RANGELEY + case PLATFORM_TYPE_COTTONWOOD_RANGELEY: + gpio_rest_mux = cottonwood_rangeley_gpio_rest_mux; + ioexp_layout = cottonwood_rangeley_ioexp_layout; + port_layout = cottonwood_rangeley_port_layout; + ioexp_total = ARRAY_SIZE(cottonwood_rangeley_ioexp_layout); + port_total = ARRAY_SIZE(cottonwood_rangeley_port_layout); + break; +#endif +#ifdef SWPS_MAPLE_GA + case PLATFORM_TYPE_MAPLE_GA: + gpio_rest_mux = maple_ga_gpio_rest_mux; + ioexp_layout = maple_ga_ioexp_layout; + port_layout = maple_ga_port_layout; + ioexp_total = ARRAY_SIZE(maple_ga_ioexp_layout); + port_total = ARRAY_SIZE(maple_ga_port_layout); + break; +#endif +#ifdef SWPS_MAPLE_B + case PLATFORM_TYPE_MAPLE_B: + gpio_rest_mux = maple_b_gpio_rest_mux; + ioexp_layout = maple_b_ioexp_layout; + port_layout = maple_b_port_layout; + ioexp_total = ARRAY_SIZE(maple_b_ioexp_layout); + port_total = ARRAY_SIZE(maple_b_port_layout); + break; +#endif +#ifdef SWPS_GULMOHAR + case PLATFORM_TYPE_GULMOHAR_GA: + gpio_rest_mux = gulmohar_gpio_rest_mux; + ioexp_layout = gulmohar_ioexp_layout; + port_layout = gulmohar_port_layout; + ioexp_total = ARRAY_SIZE(gulmohar_ioexp_layout); + port_total = ARRAY_SIZE(gulmohar_port_layout); + break; +#endif +#ifdef SWPS_GULMOHAR_2T_EVT1 + case PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA: + gpio_rest_mux = gulmohar_2t_evt1_gpio_rest_mux; + ioexp_layout = gulmohar_2t_evt1_ioexp_layout; + port_layout = gulmohar_2t_evt1_port_layout; + ioexp_total = ARRAY_SIZE(gulmohar_2t_evt1_ioexp_layout); + port_total = ARRAY_SIZE(gulmohar_2t_evt1_port_layout); + break; +#endif +#ifdef SWPS_PEONY_SFP + case PLATFORM_TYPE_PEONY_SFP_GA: + gpio_rest_mux = peony_sfp_gpio_rest_mux; + ioexp_layout = peony_sfp_ioexp_layout; + port_layout = peony_sfp_port_layout; + ioexp_total = ARRAY_SIZE(peony_sfp_ioexp_layout); + port_total = ARRAY_SIZE(peony_sfp_port_layout); + break; +#endif +#ifdef SWPS_PEONY_COPPER + case PLATFORM_TYPE_PEONY_COPPER_GA: + gpio_rest_mux = peony_copper_gpio_rest_mux; + ioexp_layout = peony_copper_ioexp_layout; + port_layout = peony_copper_port_layout; + ioexp_total = ARRAY_SIZE(peony_copper_ioexp_layout); + port_total = ARRAY_SIZE(peony_copper_port_layout); + break; +#endif + + default: + SWPS_ERR(" Invalid platform: %d (%s)\n", + platform_p->id, platform_p->name); + return -1; + } + SWPS_INFO("Start to initial platform: %d (%s)\n", + platform_p->id, platform_p->name); + return 0; +} + + +/* ========== Functions for objects operations ========== + */ +static int +__detect_issues_port(int minor_num) { + + struct transvr_obj_s *tobj_p; + int port_id = port_layout[minor_num].port_id; + char port_name[32] = "ERR"; + char *i2c_emsg = "detected bad transceiver/cable"; + + memset(port_name, 0, sizeof(port_name)); + snprintf(port_name, sizeof(port_name), "%s%d", SWP_DEV_PORT, port_id); + tobj_p = _get_transvr_obj(port_name); + if (!tobj_p) { + SWPS_INFO("%s: tobj_p is NULL :%d\n", __func__, minor_num); + return -1; + } + if (resync_channel_tier_2(tobj_p) < 0) { + if (check_channel_tier_1() < 0) { + goto get_target_issues_port; + } + } + /* Re-check again for i2c-gpio special case */ + if (check_channel_tier_1() < 0) { + goto get_target_issues_port; + } + return 0; + +get_target_issues_port: + alarm_msg_2_user(tobj_p, i2c_emsg); + return -2; +} + + +static int +_detect_issues_port(void) { + /* OK : retrun -1; + * Fail: return fail at which minor number (0~N) + */ + char *emsg = "ERR"; + int minor = 0; + int minor_2st = 1; + + /* Force moving the initial channel pointer + * Filter out case of fail at minor-0 port + */ + while (minor_2st < port_total) { + minor = minor_2st; + if (__detect_issues_port(minor_2st) < 0) { + emsg = "detect minor_2st fail"; + goto err_p_detect_issues_port; + } + minor_2st += 8; + } + /* Scan all port */ + for (minor=0; minor:%d\n", __func__, emsg, minor_err); + return -1; +} + + +static int +check_transvr_obj_one(char *dev_name){ + /* [Return] + * 0 : Doesn't need to take care + * -1 : Single error + * -2 : Critical error (I2C topology die) + * -9 : Internal error + */ + struct transvr_obj_s *tobj_p = NULL; + int retval = -9; + + tobj_p = _get_transvr_obj(dev_name); + if (!tobj_p) { + SWPS_ERR("%s: %s _get_transvr_obj fail\n", + __func__, dev_name); + return -9; + } + /* Check transceiver current status */ + lock_transvr_obj(tobj_p); + retval = tobj_p->check(tobj_p); + unlock_transvr_obj(tobj_p); + switch (retval) { + case 0: + case ERR_TRANSVR_UNPLUGGED: + case ERR_TRNASVR_BE_ISOLATED: + case ERR_TRANSVR_TASK_BUSY: + return 0; + + case ERR_TRANSVR_I2C_CRASH: + default: + break; + } + /* Identify abnormal case */ + if (check_channel_tier_1() < 0) { + SWPS_DEBUG("%s: %s critical error :%d\n", + __func__, dev_name, retval); + return -2; + } + SWPS_DEBUG("%s: %s single error :%d\n", + __func__, dev_name, retval); + return -1; +} + + +static int +check_transvr_objs(void){ + + char dev_name[32]; + int port_id, err_code; + int minor_curr = 0; + + for (minor_curr=0; minor_curr:%d\n", + __func__, dev_name, err_code); + break; + } + } + return 0; + +err_check_transvr_objs: + SWPS_ERR("%s: %s reset_i2c_topology fail.\n", + __func__, dev_name); + return -1; +} + + +static void +swp_polling_worker(struct work_struct *work){ + + /* Reset I2C */ + if (flag_i2c_reset) { + goto polling_reset_i2c; + } + /* Check IOEXP */ + if (check_ioexp_objs() < 0) { + goto polling_reset_i2c; + } + /* Check transceiver */ + if (check_transvr_objs() < 0) { + SWPS_DEBUG("%s: check_transvr_objs fail.\n", __func__); + flag_i2c_reset = 1; + } + goto polling_schedule_round; + +polling_reset_i2c: + SWPS_DEBUG("%s: reset_i2c_topology start.\n", __func__); + if (reset_i2c_topology() < 0) { + SWPS_ERR("%s: reset i2c fail!\n", __func__); + flag_i2c_reset = 1; + } else { + SWPS_DEBUG("%s: reset_i2c_topology OK.\n", __func__); + flag_i2c_reset = 0; + } +polling_schedule_round: + schedule_delayed_work(&swp_polling, _get_polling_period()); +} + + +/* ========== Functions for register something ========== + */ +static int +register_transvr_common_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_id) < 0) { + err_attr = "dev_attr_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_ext_id) < 0) { + err_attr = "dev_attr_ext_id"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_connector) < 0) { + err_attr = "dev_attr_connector"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_name) < 0) { + err_attr = "dev_attr_vendor_name"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_pn) < 0) { + err_attr = "dev_attr_vendor_pn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_rev) < 0) { + err_attr = "dev_attr_vendor_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_vendor_sn) < 0) { + err_attr = "dev_attr_vendor_sn"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_br) < 0) { + err_attr = "dev_attr_br"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_smf) < 0) { + err_attr = "dev_attr_len_smf"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om1) < 0) { + err_attr = "dev_attr_len_om1"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om2) < 0) { + err_attr = "dev_attr_len_om2"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om3) < 0) { + err_attr = "dev_attr_len_om3"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_len_om4) < 0) { + err_attr = "dev_attr_len_om4"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_extend) < 0) { + err_attr = "dev_attr_comp_extend"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth) < 0) { + err_attr = "dev_attr_comp_eth"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_comp_rev) < 0) { + err_attr = "dev_attr_comp_rev"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_info) < 0) { + err_attr = "dev_attr_info"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_type) < 0) { + err_attr = "dev_attr_if_type"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_speed) < 0) { + err_attr = "dev_attr_if_speed"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_if_lane) < 0) { + err_attr = "dev_attr_if_lane"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_temperature) < 0) { + err_attr = "dev_attr_temperature"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_voltage) < 0) { + err_attr = "dev_attr_voltage"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_bias) < 0) { + err_attr = "dev_attr_tx_bias"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_power) < 0) { + err_attr = "dev_attr_tx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_power) < 0) { + err_attr = "dev_attr_rx_power"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_tx_eq) < 0) { + err_attr = "dev_attr_tx_eq"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_rx_em) < 0) { + err_attr = "dev_attr_rx_em"; + goto err_transvr_comm_attr; + } + if (device_create_file(device_p, &dev_attr_wavelength) < 0) { + err_attr = "dev_attr_wavelength"; + goto err_transvr_comm_attr; + } + return 0; + +err_transvr_comm_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + +static int +register_transvr_sfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10) < 0) { + err_attr = "dev_attr_comp_eth_10"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_len_sm) < 0) { + err_attr = "dev_attr_len_sm"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_rate_id) < 0) { + err_attr = "dev_attr_rate_id"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs0) < 0) { + err_attr = "dev_attr_soft_rs0"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rs1) < 0) { + err_attr = "dev_attr_soft_rs1"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_offset) < 0) { + err_attr = "dev_attr_extphy_offset"; + goto err_transvr_sfp_attr; + } + if (device_create_file(device_p, &dev_attr_extphy_reg) < 0) { + err_attr = "dev_attr_extphy_reg"; + goto err_transvr_sfp_attr; + } + return 0; + +err_transvr_sfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_common_attr(device_p) < 0) { + err_attr = "register_transvr_common_attr"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_comp_eth_10_40) < 0) { + err_attr = "dev_attr_comp_eth_10_40"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_power_cls) < 0) { + err_attr = "dev_attr_power_cls"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_rx_los) < 0) { + err_attr = "soft_rx_los"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_disable) < 0) { + err_attr = "soft_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_auto_tx_disable) < 0) { + err_attr = "auto_tx_disable"; + goto err_transvr_qsfp_attr; + } + if (device_create_file(device_p, &dev_attr_soft_tx_fault) < 0) { + err_attr = "soft_tx_fault"; + goto err_transvr_qsfp_attr; + } + return 0; + +err_transvr_qsfp_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_qsfp28_attr(struct device *device_p){ + + char *err_attr = NULL; + + if (register_transvr_qsfp_attr(device_p) < 0){ + err_attr = "register_transvr_qsfp_attr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_cdr) < 0) { + err_attr = "dev_attr_cdr"; + goto err_transvr_qsfp28_attr; + } + if (device_create_file(device_p, &dev_attr_rx_am) < 0) { + err_attr = "dev_attr_rx_am"; + goto err_transvr_qsfp28_attr; + } + return 0; + +err_transvr_qsfp28_attr: + SWPS_ERR("%s: %s\n", __func__, err_attr); + return -1; +} + + +static int +register_transvr_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + switch (transvr_obj->layout){ + case TRANSVR_TYPE_SFP: + if (register_transvr_sfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + if (register_transvr_qsfp_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + case TRANSVR_TYPE_QSFP_28: + if (register_transvr_qsfp28_attr(device_p) < 0){ + goto err_reg_tvr_attr; + } + break; + default: + goto err_reg_tvr_attr; + } + return 0; + +err_reg_tvr_attr: + SWPS_ERR("%s: fail! type=%d \n", __func__, transvr_obj->type); + return -1; +} + + +static int +register_ioexp_attr_sfp_1(struct device *device_p){ + /* Support machine type: + * - SFP : Magnolia + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_fault) < 0) { + err_attr = "dev_attr_tx_fault"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_rxlos) < 0) { + err_attr = "dev_attr_rxlos"; + goto err_ioexp_sfp1_attr; + } + if (device_create_file(device_p, &dev_attr_tx_disable) < 0) { + err_attr = "dev_attr_tx_disable"; + goto err_ioexp_sfp1_attr; + } + return 0; + +err_ioexp_sfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_sfp_2(struct device *device_p){ + /* Support machine type: + * - SFP28 : Cypress + */ + char *err_attr = NULL; + + if (register_ioexp_attr_sfp_1(device_p) < 0){ + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs0) < 0) { + err_attr = "dev_attr_hard_rs0"; + goto err_ioexp_sfp2_attr; + } + if (device_create_file(device_p, &dev_attr_hard_rs1) < 0) { + err_attr = "dev_attr_hard_rs1"; + goto err_ioexp_sfp2_attr; + } + return 0; + +err_ioexp_sfp2_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_ioexp_attr_qsfp_1(struct device *device_p){ + /* Support machine type: + * - QSFP : Magnolia, Redwood, Hudson32i + * - QSFP+ : Magnolia, Redwood, Hudson32i + * - QSFP28: Redwood + */ + char *err_attr = NULL; + + if (device_create_file(device_p, &dev_attr_present) < 0) { + err_attr = "dev_attr_present"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_reset) < 0) { + err_attr = "dev_attr_reset"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_lpmod) < 0) { + err_attr = "dev_attr_lpmod"; + goto err_ioexp_qsfp1_attr; + } + if (device_create_file(device_p, &dev_attr_modsel) < 0) { + err_attr = "dev_attr_modsel"; + goto err_ioexp_qsfp1_attr; + } + return 0; + +err_ioexp_qsfp1_attr: + SWPS_ERR("Add device attribute:%s failure! \n",err_attr); + return -1; +} + + +static int +register_modctl_attr(struct device *device_p){ + + char *err_msg = NULL; + + if (device_create_file(device_p, &dev_attr_platform) < 0) { + err_msg = "dev_attr_platform"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_version) < 0) { + err_msg = "dev_attr_version"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_status) < 0) { + err_msg = "dev_attr_status"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_i2c) < 0) { + err_msg = "dev_attr_reset_i2c"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_reset_swps) < 0) { + err_msg = "dev_attr_reset_swps"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_auto_config) < 0) { + err_msg = "dev_attr_auto_config"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_block_poll) < 0) { + err_msg = "dev_attr_block_poll"; + goto err_reg_modctl_attr; + } + if (device_create_file(device_p, &dev_attr_io_no_init) < 0) { + err_msg = "dev_attr_io_no_init"; + goto err_reg_modctl_attr; + } + + return 0; + +err_reg_modctl_attr: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_ioexp_attr(struct device *device_p, + struct transvr_obj_s *transvr_obj){ + + char *err_msg = "ERR"; + + switch (transvr_obj->ioexp_obj_p->ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case CPLD_TYPE_COTTONWOOD: + if (register_ioexp_attr_sfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_GULMOHAR_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + if (register_ioexp_attr_sfp_2(device_p) < 0){ + err_msg = "register_ioexp_attr_sfp_2 fail"; + goto err_reg_ioexp_attr; + } + break; + + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case IOEXP_TYPE_MAPLE_0ABC: + case IOEXP_TYPE_GULMOHAR_7ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + if (register_ioexp_attr_qsfp_1(device_p) < 0){ + err_msg = "register_ioexp_attr_qsfp_1 fail"; + goto err_reg_ioexp_attr; + } + break; + + default: + err_msg = "Unknow type"; + goto err_reg_ioexp_attr; + } + return 0; + +err_reg_ioexp_attr: + SWPS_ERR("%s: %s :%d \n", + __func__, err_msg, transvr_obj->ioexp_obj_p->ioexp_type); + return -1; +} + + +static int +register_modctl_device(void) { + + struct device *device_p = NULL; + int minor_comm = 0; /* Default minor number for common device */ + dev_t dev_num = MKDEV(ctl_major, minor_comm); + char *err_msg = "ERROR"; + + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + NULL, /* void *private_data */ + SWP_DEV_MODCTL); /* const char *fmt */ + if (IS_ERR(device_p)){ + err_msg = "device_create fail"; + goto err_register_modctl_device_1; + } + if (register_modctl_attr(device_p) < 0) { + err_msg = "register_modctl_attr fail"; + goto err_register_modctl_device_2; + } + return 0; + +err_register_modctl_device_2: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_register_modctl_device_1: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int +register_port_device(char *dev_name, + dev_t dev_num, + struct transvr_obj_s *transvr_obj){ + + struct device *device_p = NULL; + device_p = device_create(swp_class_p, /* struct class *cls */ + NULL, /* struct device *parent */ + dev_num, /* dev_t devt */ + transvr_obj, /* void *private_data */ + dev_name); /* const char *fmt */ + if (IS_ERR(device_p)){ + goto err_regswp_create_dev; + } + if (register_transvr_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + if (register_ioexp_attr(device_p, transvr_obj) < 0){ + goto err_regswp_reg_attr; + } + return 0; + +err_regswp_reg_attr: + device_unregister(device_p); + device_destroy(swp_class_p, dev_num); +err_regswp_create_dev: + SWPS_ERR("%s fail! :%s\n", __func__, dev_name); + return -1; +} + + +static int +register_swp_module(void){ + + dev_t ctl_devt = 0; + dev_t port_devt = 0; + int dev_total = port_total + 1; /* char_dev for module control */ + + /* Register device number */ + if (alloc_chrdev_region(&ctl_devt, 0, 1, SWP_DEV_MODCTL) < 0){ + SWPS_WARN("Allocate CTL MAJOR failure! \n"); + goto err_register_swp_module_1; + } + if (alloc_chrdev_region(&port_devt, 0, port_total, SWP_CLS_NAME) < 0){ + SWPS_WARN("Allocate PORT MAJOR failure! \n"); + goto err_register_swp_module_2; + } + ctl_major = MAJOR(ctl_devt); + port_major = MAJOR(port_devt); + + /* Create class object */ + swp_class_p = class_create(THIS_MODULE, SWP_CLS_NAME); + if (IS_ERR(swp_class_p)) { + SWPS_ERR("Create class failure! \n"); + goto err_register_swp_module_3; + } + return 0; + +err_register_swp_module_3: + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_register_swp_module_2: + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); +err_register_swp_module_1: + return -1; +} + + +/* ========== Module initial relate ========== + */ +static int +create_ioexp_objs(void) { + + int i, run_mod; + + /* Clean IOEXP object */ + clean_ioexp_objs(); + /* Get running mode */ + run_mod = IOEXP_MODE_DIRECT; + if (SWP_POLLING_ENABLE){ + run_mod = IOEXP_MODE_POLLING; + } + /* Create IOEXP object */ + for(i=0; i devlen_max) { + snprintf(err_msg, sizeof(err_msg), + "SWP_DEV_PORT too long!"); + goto err_initport_create_tranobj; + } + memset(dev_name, 0, sizeof(dev_name)); + snprintf(dev_name, devlen_max, "%s%d", SWP_DEV_PORT, port_id); + /* Create transceiver object */ + ioexp_obj_p = get_ioexp_obj(ioexp_id); + if (!ioexp_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "IOEXP object:%d not exist", ioexp_id); + goto err_initport_create_tranobj; + } + transvr_obj_p = create_transvr_obj(dev_name, chan_id, ioexp_obj_p, + ioexp_virt_offset, transvr_type, + chipset_type, run_mod); + if (!transvr_obj_p){ + snprintf(err_msg, sizeof(err_msg), + "Create transceiver object fail :%s", dev_name); + goto err_initport_create_tranobj; + } + /* Setup Lane_ID mapping */ + i = ARRAY_SIZE(port_layout[minor_curr].lane_id); + j = ARRAY_SIZE(transvr_obj_p->lane_id); + if (i != j) { + snprintf(err_msg, sizeof(err_msg), + "Lane_id size inconsistent %d/%d", i, j); + goto err_initport_reg_device; + } + memcpy(transvr_obj_p->lane_id, port_layout[minor_curr].lane_id, i*sizeof(int)); + /* Create and register device object */ + if (register_port_device(dev_name, MKDEV(port_major, minor_curr), transvr_obj_p) < 0){ + snprintf(err_msg, sizeof(err_msg), + "register_port_device fail"); + goto err_initport_reg_device; + } + /* Setup device_ptr of transvr_obj */ + dev_p = get_swpdev_by_name(dev_name); + if (!dev_p){ + snprintf(err_msg, sizeof(err_msg), + "get_swpdev_by_name fail"); + goto err_initport_reg_device; + } + transvr_obj_p->transvr_dev_p = dev_p; + /* Success */ + ok_count++; + } + SWPS_INFO("%s: initialed %d port-dev\n",__func__, ok_count); + return 0; + +err_initport_reg_device: + kfree(transvr_obj_p); +err_initport_create_tranobj: + clean_port_objs(); + SWPS_ERR("%s: %s", __func__, err_msg); + SWPS_ERR("Dump: :%d :%d :%d :%d :%d :%d\n", + port_id, chan_id, ioexp_id, ioexp_virt_offset, transvr_type, run_mod); + return -1; +} + + +static int +init_dev_topology(void){ + + int err; + char *emsg = "ERR"; + flag_mod_state = SWP_STATE_NORMAL; + + err = init_ioexp_objs(); + switch(err){ + case 0: /* Normal */ + SWPS_DEBUG("%s: normal case\n", __func__); + break; + + case -1: /* topology error */ + SWPS_DEBUG("%s: detect tier-1 topology initial failure :%d\n", + __func__, err); + /* Reset and isolate */ + err = reset_i2c_topology(); + if (err < 0) { + emsg = "reset i2c topology fail"; + goto err_init_dev_topology; + } + /* Re-initial again */ + err = init_ioexp_objs(); + if (err < 0) { + emsg = "re-init ioexp objects fail"; + goto err_init_dev_topology; + } + break; + + case -2: /* Internal error */ + SWPS_DEBUG("%s: internal error case\n", __func__); + err = -2; + emsg = "internal error"; + goto err_init_dev_topology; + + default: + SWPS_DEBUG("%s: undefined error case\n", __func__); + emsg = "undefined error case"; + goto err_init_dev_topology; + } + SWPS_DEBUG("%s: initial I2C topology success\n", __func__); + return 0; + +err_init_dev_topology: + SWPS_ERR("%s: %s :%d\n", __func__, emsg, err); + return -1; +} + + +static int +init_polling_task(void){ + + if (SWP_POLLING_ENABLE){ + schedule_delayed_work(&swp_polling, _get_polling_period()); + } + return 0; +} + + +static int +init_swps_common(void){ + + char *err_msg = "ERR"; + + block_polling = 0; + auto_config = 0; + if ((SWP_AUTOCONFIG_ENABLE) && (SWP_POLLING_ENABLE)){ + auto_config = 1; + } + if (register_modctl_device() < 0) { + err_msg = "register_modctl_device fail"; + goto err_init_swps_common_1; + } + if (_update_auto_config_2_trnasvr() < 0) { + err_msg = "_update_auto_config_2_trnasvr fail"; + goto err_init_swps_common_1; + } + if (init_polling_task() < 0){ + err_msg = "init_polling_task fail"; + goto err_init_swps_common_1; + } + return 0; + +err_init_swps_common_1: + clean_swps_common(); + SWPS_ERR("%s: %s\n", __func__, err_msg); + return -1; +} + + +static int __init +swp_module_init(void){ + + if (get_platform_type() < 0){ + goto err_init_out; + } + if (get_layout_info() < 0){ + goto err_init_out; + } + if (register_swp_module() < 0){ + goto err_init_out; + } + if (create_ioexp_objs() < 0){ + goto err_init_ioexp; + } + if (create_port_objs() < 0){ + goto err_init_portobj; + } + if (init_mux_objs(gpio_rest_mux) < 0){ + goto err_init_mux; + } + if (init_dev_topology() < 0){ + goto err_init_topology; + } + if (init_swps_common() < 0){ + goto err_init_topology; + } + SWPS_INFO("Inventec switch-port module V.%s initial success.\n", SWP_VERSION); + return 0; + + +err_init_topology: + clean_mux_objs(); +err_init_mux: + clean_port_objs(); +err_init_portobj: + clean_ioexp_objs(); +err_init_ioexp: + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); +err_init_out: + SWPS_ERR("Inventec switch-port module V.%s initial failure.\n", SWP_VERSION); + return -1; +} + + +static void __exit +swp_module_exit(void){ + + clean_swps_common(); + clean_port_objs(); + clean_ioexp_objs(); + clean_mux_objs(); + class_destroy(swp_class_p); + unregister_chrdev_region(MKDEV(ctl_major, 0), 1); + unregister_chrdev_region(MKDEV(port_major, 0), port_total); + SWPS_INFO("Remove Inventec switch-port module success.\n"); +} + + +/* Module information */ +MODULE_AUTHOR(SWP_AUTHOR); +MODULE_DESCRIPTION(SWP_DESC); +MODULE_VERSION(SWP_VERSION); +MODULE_LICENSE(SWP_LICENSE); +MODULE_SOFTDEP("pre: inv_platform"); + +module_init(swp_module_init); +module_exit(swp_module_exit); + + + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_swps.h b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_swps.h new file mode 100644 index 00000000000..da6e9920432 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_swps.h @@ -0,0 +1,1621 @@ +#ifndef INV_SWPS_H +#define INV_SWPS_H + +#include "transceiver.h" +#include "io_expander.h" +#include "inv_mux.h" + +/* Module settings */ +#define SWP_CLS_NAME "swps" +#define SWP_DEV_PORT "port" +#define SWP_DEV_MODCTL "module" +#define SWP_RESET_PWD "inventec" +#define SWP_POLLING_PERIOD (300) /* msec */ +#define SWP_POLLING_ENABLE (1) +#define SWP_AUTOCONFIG_ENABLE (1) + +/* Module information */ +#define SWP_AUTHOR "Neil " +#define SWP_DESC "Inventec port and transceiver driver" +#define SWP_VERSION "C1-4.3.5" +#define SWP_LICENSE "GPL" + +/* Module status define */ +#define SWP_STATE_NORMAL (0) +#define SWP_STATE_I2C_DIE (-91) + +/* [Note]: + * Functions and mechanism for auto-detect platform type is ready, + * But HW and BIOS not ready! We need to wait them. + * So, please do not use PLATFORM_TYPE_AUTO until they are ready. + * (2016.06.13) + */ +#define PLATFORM_TYPE_AUTO (100) +#define PLATFORM_TYPE_MAGNOLIA (111) +#define PLATFORM_TYPE_MAGNOLIA_FNC (112) +#define PLATFORM_TYPE_REDWOOD (121) +#define PLATFORM_TYPE_REDWOOD_FSL (122) +#define PLATFORM_TYPE_HUDSON32I_GA (131) +#define PLATFORM_TYPE_SPRUCE (141) +#define PLATFORM_TYPE_CYPRESS_GA1 (151) /* Up -> Down */ +#define PLATFORM_TYPE_CYPRESS_GA2 (152) /* Down -> Up */ +#define PLATFORM_TYPE_CYPRESS_BAI (153) /* Down -> Up */ +#define PLATFORM_TYPE_TAHOE (161) +#define PLATFORM_TYPE_SEQUOIA_GA (171) +#define PLATFORM_TYPE_LAVENDER_GA (181) +#define PLATFORM_TYPE_LAVENDER_ONL (182) +#define PLATFORM_TYPE_COTTONWOOD_RANGELEY (191) +#define PLATFORM_TYPE_MAPLE_GA (201) +#define PLATFORM_TYPE_GULMOHAR_GA (202) +#define PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA (203) +#define PLATFORM_TYPE_PEONY_SFP_GA (204) +#define PLATFORM_TYPE_PEONY_COPPER_GA (205) +#define PLATFORM_TYPE_PEONY_AUTO (206) +#define PLATFORM_TYPE_MAPLE_B (207) +/* Current running platfrom */ +#define PLATFORM_SETTINGS PLATFORM_TYPE_SEQUOIA_GA + +/* Define platform flag and kernel version */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAGNOLIA_FNC) + #define SWPS_MAGNOLIA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD) + #define SWPS_REDWOOD (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_REDWOOD_FSL) + #define SWPS_REDWOOD_FSL (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_HUDSON32I_GA) + #define SWPS_HUDSON32I_GA (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SPRUCE) + #define SWPS_SPRUCE (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA1) + #define SWPS_CYPRESS_GA1 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_GA2) + #define SWPS_CYPRESS_GA2 (1) + #define SWPS_KERN_VER_BF_3_8 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_CYPRESS_BAI) + #define SWPS_CYPRESS_BAI (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_TAHOE) + #define SWPS_TAHOE (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_SEQUOIA_GA) + #define SWPS_SEQUOIA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) + #define SWPS_LAVENDER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_COTTONWOOD_RANGELEY) + #define SWPS_COTTONWOOD_RANGELEY (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAPLE_GA) + #define SWPS_MAPLE_GA (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_MAPLE_B) + #define SWPS_MAPLE_B (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_GULMOHAR_GA) + #define SWPS_GULMOHAR (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA) + #define SWPS_GULMOHAR_2T_EVT1 (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_PEONY_SFP_GA) + #define SWPS_PEONY_SFP (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_PEONY_COPPER_GA) + #define SWPS_PEONY_COPPER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_PEONY_AUTO) + #define SWPS_PEONY_SFP (1) + #define SWPS_PEONY_COPPER (1) + #define SWPS_KERN_VER_AF_3_10 (1) +#endif + +struct inv_platform_s { + int id; + char name[64]; +}; + +struct inv_ioexp_layout_s { + int ioexp_id; + int ioexp_type; + struct ioexp_addr_s addr[4]; +}; + +struct inv_port_layout_s { + int port_id; + int chan_id; + int ioexp_id; + int ioexp_offset; + int transvr_type; + int chipset_type; + int lane_id[8]; +}; + + +/* ========================================== + * Inventec Platform Settings + * ========================================== + */ +struct inv_platform_s platform_map[] = { + {PLATFORM_TYPE_AUTO, "Auto-Detect" }, + {PLATFORM_TYPE_MAGNOLIA, "Magnolia" }, + {PLATFORM_TYPE_MAGNOLIA_FNC, "Magnolia_FNC" }, + {PLATFORM_TYPE_REDWOOD, "Redwood" }, + {PLATFORM_TYPE_REDWOOD_FSL, "Redwood_FSL" }, + {PLATFORM_TYPE_HUDSON32I_GA, "Hudson32i" }, + {PLATFORM_TYPE_SPRUCE, "Spruce" }, + {PLATFORM_TYPE_CYPRESS_GA1, "Cypress_GA1" }, + {PLATFORM_TYPE_CYPRESS_GA2, "Cypress_GA2" }, + {PLATFORM_TYPE_CYPRESS_BAI, "Cypress_BAI" }, + {PLATFORM_TYPE_TAHOE, "Tahoe" }, + {PLATFORM_TYPE_SEQUOIA_GA, "Sequoia_GA" }, + {PLATFORM_TYPE_LAVENDER_GA, "Lavender_GA" }, + {PLATFORM_TYPE_LAVENDER_ONL, "Lavender_ONL" }, + {PLATFORM_TYPE_COTTONWOOD_RANGELEY, "Cottonwood_RANGELEY" }, + {PLATFORM_TYPE_MAPLE_GA, "Maple_GA" }, + {PLATFORM_TYPE_MAPLE_B, "Maple_B" }, + {PLATFORM_TYPE_GULMOHAR_GA, "Gulmohar_GA" }, + {PLATFORM_TYPE_GULMOHAR_2T_EVT1_GA, "Gulmohar_2T_EVT1_GA" }, + {PLATFORM_TYPE_PEONY_SFP_GA, "Peony_SFP_GA" }, + {PLATFORM_TYPE_PEONY_COPPER_GA, "Peony_Copper_GA" }, + {PLATFORM_TYPE_PEONY_AUTO, "Peony_Auto_Detect" }, +}; + + +/* ========================================== + * Magnolia Layout configuration + * ========================================== + */ +#ifdef SWPS_MAGNOLIA +unsigned magnolia_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s magnolia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAGINOLIA_NAB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {1, IOEXP_TYPE_MAGINOLIA_NAB, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {2, IOEXP_TYPE_MAGINOLIA_NAB, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {3, IOEXP_TYPE_MAGINOLIA_4AB, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander 4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf0, 0xff}, {0xf0, 0xff}, }, }, /* addr[1] = I/O Expander 4 B */ + }, + {4, IOEXP_TYPE_MAGINOLIA_NAB, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {5, IOEXP_TYPE_MAGINOLIA_NAB, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, }, /* addr[1] = I/O Expander N B */ + }, + {6, IOEXP_TYPE_MAGINOLIA_7AB, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[1] = I/O Expander 7 B */ + }, +}; + +struct inv_port_layout_s magnolia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 16} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 15} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 14} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 13} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 24} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 23} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 22} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 21} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 28} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 27} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 26} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 25} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 32} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 31} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 30} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 29} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 48} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 47} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 46} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 45} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 52} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 51} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 50} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 49} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 56} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 55} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 54} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 53} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 60} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 59} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 58} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 57} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 64} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 63} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 62} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 61} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 68} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 67} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 66} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 65} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 72} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 71} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 70} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 69} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 76} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 75} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 74} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_2, { 73} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD +unsigned redwood_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s redwood_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + +struct inv_port_layout_s redwood_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Hudson32i Layout configuration + * ========================================== + */ +#ifdef SWPS_HUDSON32I_GA +unsigned hudsin32iga_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s hudson32iga_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_HUDSON32IGA_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {1, IOEXP_TYPE_HUDSON32IGA_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x24 */ + }, + {2, IOEXP_TYPE_HUDSON32IGA_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, + {3, IOEXP_TYPE_HUDSON32IGA_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0x25 */ + }, +}; + +struct inv_port_layout_s hudson32iga_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 1, 2, 3, 4} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 5, 6, 7, 8} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 9, 10, 11, 12} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 13, 14, 15, 16} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 17, 18, 19, 20} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 21, 22, 23, 24} }, + { 6, 12, 0, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 25, 26, 27, 28} }, + { 7, 13, 0, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 29, 30, 31, 32} }, + { 8, 14, 1, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 33, 34, 35, 36} }, + { 9, 15, 1, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 37, 38, 39, 40} }, + {10, 16, 1, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 41, 42, 43, 44} }, + {11, 17, 1, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 45, 46, 47, 48} }, + {12, 18, 1, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 49, 50, 51, 52} }, + {13, 19, 1, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 53, 54, 55, 56} }, + {14, 20, 1, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 57, 58, 59, 60} }, + {15, 21, 1, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 61, 62, 63, 64} }, + {16, 22, 2, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 65, 66, 67, 68} }, + {17, 23, 2, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 69, 70, 71, 72} }, + {18, 24, 2, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 73, 74, 75, 76} }, + {19, 25, 2, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + {20, 26, 2, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + {21, 27, 2, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 85, 86, 87, 88} }, + {22, 28, 2, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 89, 90, 91, 92} }, + {23, 29, 2, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 93, 94, 95, 96} }, + {24, 30, 3, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + {25, 31, 3, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + {26, 32, 3, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + {27, 33, 3, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, + {28, 34, 3, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {113,114,115,116} }, + {29, 35, 3, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {117,118,119,120} }, + {30, 36, 3, 6, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {121,122,123,124} }, + {31, 37, 3, 7, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Spruce Layout configuration + * ========================================== + */ +#ifdef SWPS_SPRUCE +unsigned spruce_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s spruce_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SPRUCE_7AB, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 7A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xf0, 0x33}, }, }, /* addr[2] = I/O Expander 7B */ + }, +}; + +struct inv_port_layout_s spruce_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 6, 0, 0, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 81, 82, 83, 84} }, + { 1, 7, 0, 1, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 77, 78, 79, 80} }, + { 2, 8, 0, 2, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, { 97, 98, 99,100} }, + { 3, 9, 0, 3, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {101,102,103,104} }, + { 4, 10, 0, 4, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {105,106,107,108} }, + { 5, 11, 0, 5, TRANSVR_TYPE_QSFP_PLUS, BCM_CHIP_TYPE_TRIDENT_2, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Up->Down]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA1 +unsigned cypress_ga1_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s cypress_ga1_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga1_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (Inventec version [Down->Up]) + * ========================================== + */ +#ifdef SWPS_CYPRESS_GA2 +unsigned cypress_ga2_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_ga2_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_ga2_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 1, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 2, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 3, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 4, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 5, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 6, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 7, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 8, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + { 9, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {10, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {11, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {12, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {13, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {14, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {15, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {16, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {17, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {18, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {19, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {20, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {21, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {22, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {23, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {24, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {25, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {26, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {27, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {28, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {29, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {30, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {31, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {32, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {33, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {34, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {35, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {36, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {37, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {38, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {39, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {40, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {41, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {42, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {43, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {44, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {45, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {46, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {47, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {48, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {49, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {50, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {51, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {52, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {53, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Cypress Layout configuration (BaiDu version) + * ========================================== + */ +#ifdef SWPS_CYPRESS_BAI +unsigned cypress_b_gpio_rest_mux = MUX_RST_GPIO_FORCE_HEDERA; + +struct inv_ioexp_layout_s cypress_b_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_CYPRESS_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xc0}, {0xff, 0xc0}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + +struct inv_port_layout_s cypress_b_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 2} }, + { 2, 10, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 1} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 4} }, + { 4, 12, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 3} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 6} }, + { 6, 14, 0, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 5} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 8} }, + { 8, 16, 0, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 7} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 10} }, + {10, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 9} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 12} }, + {12, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 11} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 22} }, + {14, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 21} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 24} }, + {16, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 23} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 34} }, + {18, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 33} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 36} }, + {20, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 35} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 38} }, + {22, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 37} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 40} }, + {24, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 39} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 42} }, + {26, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 41} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 44} }, + {28, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 43} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 50} }, + {30, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 49} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 52} }, + {32, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 51} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 54} }, + {34, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 53} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 56} }, + {36, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 55} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 66} }, + {38, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 65} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 68} }, + {40, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 67} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 70} }, + {42, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 69} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 72} }, + {44, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 71} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 82} }, + {46, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 84} }, + {48, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 83} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {50, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {52, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {54, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Redwood_fsl Layout configuration + * ========================================== + */ +#ifdef SWPS_REDWOOD_FSL +unsigned redwood_fsl_gpio_rest_mux = MUX_RST_GPIO_48_PCA9548; + +struct inv_ioexp_layout_s redwood_fsl_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_REDWOOD_P01P08, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {1, IOEXP_TYPE_REDWOOD_P09P16, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x25, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {2, IOEXP_TYPE_REDWOOD_P01P08, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, + {3, IOEXP_TYPE_REDWOOD_P09P16, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[0] = I/O Expander 1-4 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0x0f}, }, /* addr[1] = I/O Expander 1-4 B */ + {0, 0x24, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 B */ + }, +}; + + +struct inv_port_layout_s redwood_fsl_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 22, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 1, 23, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + { 2, 24, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 3, 25, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + { 4, 26, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 5, 27, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + { 6, 28, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 7, 29, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + { 8, 30, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 9, 31, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {10, 32, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + {11, 33, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {12, 34, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + {13, 35, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {14, 36, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + {15, 37, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {16, 6, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {17, 7, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {18, 8, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + {19, 9, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {20, 10, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {21, 11, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {22, 12, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {23, 13, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {24, 14, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99,100} }, + {25, 15, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101,102,103,104} }, + {26, 16, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105,106,107,108} }, + {27, 17, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109,110,111,112} }, + {28, 18, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113,114,115,116} }, + {29, 19, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117,118,119,120} }, + {30, 20, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121,122,123,124} }, + {31, 21, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125,126,127,128} }, +}; +#endif + + +/* ========================================== + * Tahoe Layout configuration + * ========================================== + */ +#ifdef SWPS_TAHOE +unsigned tahoe_gpio_rest_mux = MUX_RST_GPIO_249_PCA9548; + +struct inv_ioexp_layout_s tahoe_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_TAHOE_6ABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[0] = I/O Expander 6 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, /* addr[1] = I/O Expander 6 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {1, IOEXP_TYPE_TAHOE_5A, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xce, 0xb9}, {0x18, 0xe3}, }, }, /* addr[0] = I/O Expander 5 A */ + }, +}; + + +struct inv_port_layout_s tahoe_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 12, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + { 1, 11, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + { 2, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + { 3, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + { 4, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + { 5, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + { 6, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + { 7, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + { 8, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + { 9, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, +}; +#endif + + +/* ========================================== + * Sequoia Layout configuration + * ========================================== + */ +#ifdef SWPS_SEQUOIA +unsigned sequoia_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s sequoia_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + +struct inv_port_layout_s sequoia_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} }, + { 1, 11, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} }, + { 2, 12, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} }, + { 3, 13, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} }, + { 4, 14, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} }, + { 5, 15, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} }, + { 6, 16, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} }, + { 7, 17, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} }, + { 8, 18, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} }, + { 9, 19, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} }, + {10, 20, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} }, + {11, 21, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} }, + {12, 22, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} }, + {13, 23, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} }, + {14, 24, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121, 122, 123, 124} }, + {15, 25, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} }, + {16, 26, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {137, 138, 139, 140} }, + {17, 27, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {129, 130, 131, 132} }, + {18, 28, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {153, 154, 155, 156} }, + {19, 29, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {145, 146, 147, 148} }, + {20, 30, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {169, 170, 171, 172} }, + {21, 31, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {161, 162, 163, 164} }, + {22, 32, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {185, 186, 187, 188} }, + {23, 33, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {177, 178, 179, 180} }, + {24, 34, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {201, 202, 203, 204} }, + {25, 35, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {193, 194, 195, 196} }, + {26, 36, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {217, 218, 219, 220} }, + {27, 37, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {209, 210, 211, 212} }, + {28, 38, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {233, 234, 235, 236} }, + {29, 39, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {225, 226, 227, 228} }, + {30, 40, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {249, 250, 251, 252} }, + {31, 41, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {241, 242, 243, 244} }, + {32, 45, 4, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} }, + {33, 44, 4, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} }, + {34, 43, 4, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} }, + {35, 42, 4, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} }, + {36, 49, 4, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} }, + {37, 48, 4, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} }, + {38, 47, 4, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} }, + {39, 46, 4, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} }, + {40, 53, 5, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} }, + {41, 52, 5, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} }, + {42, 51, 5, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} }, + {43, 50, 5, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} }, + {44, 57, 5, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} }, + {45, 56, 5, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} }, + {46, 55, 5, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125, 126, 127, 128} }, + {47, 54, 5, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117, 118, 119, 120} }, + {48, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {141, 142, 143, 144} }, + {49, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {133, 134, 135, 136} }, + {50, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {157, 158, 159, 160} }, + {51, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {149, 150, 151, 152} }, + {52, 65, 6, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {173, 174, 175, 176} }, + {53, 64, 6, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {165, 166, 167, 168} }, + {54, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {189, 190, 191, 192} }, + {55, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {181, 182, 183, 184} }, + {56, 69, 7, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {205, 206, 207, 208} }, + {57, 68, 7, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {197, 198, 199, 200} }, + {58, 67, 7, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {221, 222, 223, 224} }, + {59, 66, 7, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {213, 214, 215, 216} }, + {60, 73, 7, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {237, 238, 239, 240} }, + {61, 72, 7, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {229, 230, 231, 232} }, + {62, 71, 7, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {253, 254, 255, 256} }, + {63, 70, 7, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {245, 246, 247, 248} }, +}; +#endif + + +/* ========================================== + * Lavender Layout configuration + * ========================================== + */ +#if (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_GA) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; +#elif (PLATFORM_SETTINGS == PLATFORM_TYPE_LAVENDER_ONL) +unsigned lavender_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; +#endif + +#ifdef SWPS_LAVENDER +struct inv_ioexp_layout_s lavender_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_SEQUOIA_NABC, { { 1, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 1, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + { 1, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SEQUOIA_NABC, { { 2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */ + { 2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */ + { 2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */ + }, + {2, IOEXP_TYPE_SEQUOIA_NABC, { { 3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */ + { 3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */ + { 3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */ + }, + {3, IOEXP_TYPE_SEQUOIA_NABC, { { 4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */ + { 4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */ + { 4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */ + }, + {4, IOEXP_TYPE_SEQUOIA_NABC, { { 9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */ + { 9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */ + { 9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */ + }, + {5, IOEXP_TYPE_SEQUOIA_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */ + }, + {6, IOEXP_TYPE_SEQUOIA_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */ + }, + {7, IOEXP_TYPE_SEQUOIA_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, + {8, IOEXP_TYPE_LAVENDER_P65, { { 5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xF6, 0xff}, {0xF8, 0xff}, }, }, /* addr[0] = I/O Expander CPU */ + }, +}; + + +struct inv_port_layout_s lavender_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 17, 0, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {188, 189, 190, 191} }, + { 1, 18, 0, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {184, 185, 186, 187} }, + { 2, 19, 0, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {180, 181, 182, 183} }, + { 3, 20, 0, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {176, 177, 178, 179} }, + { 4, 21, 0, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {172, 173, 174, 175} }, + { 5, 22, 0, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {168, 169, 170, 171} }, + { 6, 23, 0, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {164, 165, 166, 167} }, + { 7, 24, 0, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {160, 161, 162, 163} }, + { 8, 25, 1, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {156, 157, 158, 159} }, + { 9, 26, 1, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {152, 153, 154, 155} }, + {10, 27, 1, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {148, 149, 150, 151} }, + {11, 28, 1, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {144, 145, 146, 147} }, + {12, 29, 1, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {140, 141, 142, 143} }, + {13, 30, 1, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {136, 137, 138, 139} }, + {14, 31, 1, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {132, 133, 134, 135} }, + {15, 32, 1, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {128, 129, 130, 131} }, + {16, 33, 2, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 0, 1, 2, 3} }, + {17, 34, 2, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 4, 5, 6, 7} }, + {18, 35, 2, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 8, 9, 10, 11} }, + {19, 36, 2, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 12, 13, 14, 15} }, + {20, 37, 2, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 16, 17, 18, 19} }, + {21, 38, 2, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 20, 21, 22, 23} }, + {22, 39, 2, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 24, 25, 26, 27} }, + {23, 40, 2, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 28, 29, 30, 31} }, + {24, 41, 3, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 32, 33, 34, 35} }, + {25, 42, 3, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 36, 37, 38, 39} }, + {26, 43, 3, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 40, 41, 42, 43} }, + {27, 44, 3, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 44, 45, 46, 47} }, + {28, 45, 3, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 48, 49, 50, 51} }, + {29, 46, 3, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 52, 53, 54, 55} }, + {30, 47, 3, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 56, 57, 58, 59} }, + {31, 48, 3, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 60, 61, 62, 63} }, + {32, 49, 4, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {256, 257, 258, 259} }, + {33, 50, 4, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {260, 261, 262, 263} }, + {34, 51, 4, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {264, 265, 266, 267} }, + {35, 52, 4, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {268, 269, 270, 271} }, + {36, 53, 4, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {272, 273, 274, 275} }, + {37, 54, 4, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {276, 277, 278, 279} }, + {38, 55, 4, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {280, 281, 282, 283} }, + {39, 56, 4, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {284, 285, 286, 287} }, + {40, 57, 5, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {288, 289, 290, 291} }, + {41, 58, 5, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {292, 293, 294, 295} }, + {42, 59, 5, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {296, 297, 298, 299} }, + {43, 60, 5, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {300, 301, 302, 303} }, + {44, 61, 5, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {304, 305, 306, 307} }, + {45, 62, 5, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {308, 309, 310, 311} }, + {46, 63, 5, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {312, 313, 314, 315} }, + {47, 64, 5, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {316, 317, 318, 319} }, + {48, 65, 6, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {444, 445, 446, 447} }, + {49, 66, 6, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {440, 441, 442, 443} }, + {50, 67, 6, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {436, 437, 438, 439} }, + {51, 68, 6, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {432, 433, 434, 435} }, + {52, 69, 6, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {428, 429, 430, 431} }, + {53, 70, 6, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {424, 425, 426, 427} }, + {54, 71, 6, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {420, 421, 422, 423} }, + {55, 72, 6, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {416, 417, 418, 419} }, + {56, 73, 7, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {412, 413, 414, 415} }, + {57, 74, 7, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {408, 409, 410, 411} }, + {58, 75, 7, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {404, 405, 406, 407} }, + {59, 76, 7, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {400, 401, 402, 403} }, + {60, 77, 7, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {396, 397, 398, 399} }, + {61, 78, 7, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {392, 393, 394, 395} }, + {62, 79, 7, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {388, 389, 390, 391} }, + {63, 80, 7, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {384, 385, 386, 387} }, + {64, 5, 8, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 64, 65, 66, 67} }, +}; +#endif + +/* =========================================================== + * Cottonwood Layout configuration Rangeley (Rangeley CPU board) + * =========================================================== + */ +#ifdef SWPS_COTTONWOOD_RANGELEY +unsigned cottonwood_rangeley_gpio_rest_mux = MUX_RST_GPIO_500_PCA9548; + +struct inv_ioexp_layout_s cottonwood_rangeley_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, CPLD_TYPE_COTTONWOOD,{ {1, 0x55, {22, 23, 24, 25}, {22, 23, 24, 25}, {-1, -1, -1, -1}, {0xee, 0xee, 0x99, 0x99}, {0x00, 0x00, 0x00, 0x00}, }, + }, + }, +}; + + +struct inv_port_layout_s cottonwood_rangeley_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHI_TYPE / LANE_ID */ + { 0, 2, 0, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 75} }, + { 1, 3, 0, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 77} }, + { 2, 4, 0, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 79} }, + { 3, 5, 0, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TOMAHAWK, { 81} }, +}; +#endif + +/* =========================================================== + * Maple Layout configuration (Old) + * =========================================================== + */ +#ifdef SWPS_MAPLE_GA +unsigned maple_ga_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; + +struct inv_ioexp_layout_s maple_ga_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAPLE_0ABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_MAPLE_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_MAPLE_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_MAPLE_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_MAPLE_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_MAPLE_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_MAPLE_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s maple_ga_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 18, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 1} }, + { 1, 19, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 2} }, + { 2, 20, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 3} }, + { 3, 21, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 4} }, + { 4, 22, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 5} }, + { 5, 23, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 6} }, + { 6, 24, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 7} }, + { 7, 25, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 8} }, + { 8, 26, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 13} }, + { 9, 27, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 14} }, + {10, 28, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 15} }, + {11, 29, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 16} }, + {12, 30, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 21} }, + {13, 31, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 22} }, + {14, 32, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 23} }, + {15, 33, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 24} }, + {16, 34, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 29} }, + {17, 35, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 30} }, + {18, 36, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 31} }, + {19, 37, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 32} }, + {20, 38, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 33} }, + {21, 39, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 34} }, + {22, 40, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 35} }, + {23, 41, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 36} }, + {24, 42, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 41} }, + {25, 43, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 42} }, + {26, 44, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 43} }, + {27, 45, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 44} }, + {28, 46, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 49} }, + {29, 47, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 50} }, + {30, 48, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 51} }, + {31, 49, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 52} }, + {32, 50, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 57} }, + {33, 51, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 58} }, + {34, 52, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 59} }, + {35, 53, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 60} }, + {36, 54, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 61} }, + {37, 55, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 62} }, + {38, 56, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 63} }, + {39, 57, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 64} }, + {40, 58, 6, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 65} }, + {41, 59, 6, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 66} }, + {42, 60, 6, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 67} }, + {43, 61, 6, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 68} }, + {44, 62, 6, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 69} }, + {45, 63, 6, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 70} }, + {46, 64, 6, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 71} }, + {47, 65, 6, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 72} }, + {48, 10, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {49, 11, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {50, 12, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, + {51, 13, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 97, 98, 99,100} }, + {52, 14, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {105,106,107,108} }, + {53, 15, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {113,114,115,116} }, + {54, 16, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {121,122,123,124} }, + {55, 17, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {125,126,127,128} }, +}; +#endif + +/* =========================================================== + * Maple Layout configuration (B version) + * =========================================================== + */ +#ifdef SWPS_MAPLE_B +unsigned maple_b_gpio_rest_mux = MUX_RST_GPIO_69_PCA9548; + +struct inv_ioexp_layout_s maple_b_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_MAPLE_0ABC, { { 6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */ + { 6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + { 6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_MAPLE_NABC, { { 7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_MAPLE_NABC, { { 8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_MAPLE_NABC, { { 9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + { 9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + { 9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_MAPLE_NABC, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_MAPLE_NABC, { {11, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {11, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {11, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_MAPLE_NABC, { {12, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {12, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {12, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s maple_b_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 1, 23, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 2} }, + { 2, 22, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 1} }, + { 3, 25, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 4} }, + { 4, 24, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 3} }, + { 5, 27, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 6} }, + { 6, 26, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 5} }, + { 7, 29, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 8} }, + { 8, 28, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 7} }, + { 9, 31, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 14} }, + {10, 30, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 13} }, + {11, 33, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 16} }, + {12, 32, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 15} }, + {13, 35, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 22} }, + {14, 34, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 21} }, + {15, 37, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 24} }, + {16, 36, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 23} }, + {17, 39, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 30} }, + {18, 38, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 29} }, + {19, 41, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 32} }, + {20, 40, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 31} }, + {21, 43, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 34} }, + {22, 42, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 33} }, + {23, 45, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 36} }, + {24, 44, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 35} }, + {25, 47, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 42} }, + {26, 46, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 41} }, + {27, 49, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 44} }, + {28, 48, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 43} }, + {29, 51, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 50} }, + {30, 50, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 49} }, + {31, 53, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 52} }, + {32, 52, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 51} }, + {33, 55, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 58} }, + {34, 54, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 57} }, + {35, 57, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 60} }, + {36, 56, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 59} }, + {37, 59, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 62} }, + {38, 58, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 61} }, + {39, 61, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 64} }, + {40, 60, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 63} }, + {41, 63, 6, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 66} }, + {42, 62, 6, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 65} }, + {43, 65, 6, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 68} }, + {44, 64, 6, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 67} }, + {45, 67, 6, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 70} }, + {46, 66, 6, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 69} }, + {47, 69, 6, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 72} }, + {48, 68, 6, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 71} }, + {49, 15, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {50, 14, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {51, 17, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 97, 98, 99,100} }, + {52, 16, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, + {53, 19, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {105,106,107,108} }, + {54, 18, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {113,114,115,116} }, + {55, 21, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {125,126,127,128} }, + {56, 20, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, {121,122,123,124} }, +}; +#endif + + +/* ========================================== + * Gulmohar Layout configuration + * ========================================== + */ +#ifdef SWPS_GULMOHAR +unsigned gulmohar_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; + +struct inv_ioexp_layout_s gulmohar_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_GULMOHAR_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_GULMOHAR_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_GULMOHAR_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_GULMOHAR_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_GULMOHAR_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_GULMOHAR_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_GULMOHAR_7ABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xff}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + + +struct inv_port_layout_s gulmohar_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 1} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 2} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 3} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 4} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 5} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 6} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 7} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 8} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 9} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 10} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 11} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 12} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 21} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 22} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 23} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 24} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 33} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 34} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 35} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 36} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 37} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 38} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 39} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 40} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 41} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 42} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 43} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 44} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 49} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 50} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 51} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 52} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 53} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 54} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 55} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 56} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 65} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 66} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 67} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 68} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 69} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 70} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 71} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 72} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 81} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 82} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 83} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, { 84} }, + {48, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 97, 98, 99,100} }, + {49, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, { 85, 86, 87, 88} }, + {50, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {101,102,103,104} }, + {51, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {105,106,107,108} }, + {52, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {109,110,111,112} }, + {53, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {109,110,111,112} }, +}; +#endif + + +/* ========================================== + * Gulmohar_2T EVT1 Layout configuration + * ========================================== + */ +#ifdef SWPS_GULMOHAR_2T_EVT1 +unsigned gulmohar_2t_evt1_gpio_rest_mux = MUX_RST_GPIO_505_PCA9548; + +struct inv_ioexp_layout_s gulmohar_2t_evt1_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {1, IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC,{ {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[1] = I/O Expander N B */ + {3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC,{ {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xf3, 0xf3}, {0xf3, 0xf3}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC,{ {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xdd, 0xdd}, {0xdd, 0xdd}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC,{ {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xd6, 0xda}, {0x18, 0xe3}, }, /* addr[0] = I/O Expander 7 A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xd6, 0xda}, {0x18, 0xe3}, }, /* addr[1] = I/O Expander 7 B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xd6, 0xff}, {0x18, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */ + }, +}; + + + +struct inv_port_layout_s gulmohar_2t_evt1_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 10, 0, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 1, 11, 0, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 2, 12, 0, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 3, 13, 0, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 4, 14, 0, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 5, 15, 0, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 6, 16, 0, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 7, 17, 0, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 8, 18, 1, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + { 9, 19, 1, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {10, 20, 1, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {11, 21, 1, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {12, 22, 1, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {13, 23, 1, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {14, 24, 1, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {15, 25, 1, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {16, 26, 2, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {17, 27, 2, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {18, 28, 2, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {19, 29, 2, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {20, 30, 2, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {21, 31, 2, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {22, 32, 2, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {23, 33, 2, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {24, 34, 3, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {25, 35, 3, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {26, 36, 3, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {27, 37, 3, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {28, 38, 3, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {29, 39, 3, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {30, 40, 3, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {31, 41, 3, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {32, 42, 4, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {33, 43, 4, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {34, 44, 4, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {35, 45, 4, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {36, 46, 4, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {37, 47, 4, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {38, 48, 4, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {39, 49, 4, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {40, 50, 5, 0, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {41, 51, 5, 1, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {42, 52, 5, 2, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {43, 53, 5, 3, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {44, 54, 5, 4, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {45, 55, 5, 5, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {46, 56, 5, 6, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {47, 57, 5, 7, TRANSVR_TYPE_SFP, BF_CHIP_TYPE_TOFINO, {-99} }, + {48, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {49, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {50, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {51, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {52, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {53, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {54, 65, 6, 7, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, + {55, 64, 6, 6, TRANSVR_TYPE_QSFP_28, BF_CHIP_TYPE_TOFINO, {-99,-99,-99,-99} }, +}; +#endif + + +/* =========================================================== + * Peony-SFP Layout configuration + * =========================================================== + */ +#ifdef SWPS_PEONY_SFP +unsigned peony_sfp_gpio_rest_mux = MUX_RST_CPLD_C0_A77_70_74_RST_ALL; + +struct inv_ioexp_layout_s peony_sfp_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_QSFP_6P_LAYOUT_1, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 0 A */ + {4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, + {1, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {2, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {3, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {4, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {5, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, + {6, IOEXP_TYPE_SFP_8P_LAYOUT_1, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[0] = I/O Expander N A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xf0}, {0xff, 0xf0}, }, /* addr[1] = I/O Expander N B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0x00, 0x00}, }, }, /* addr[2] = I/O Expander N C */ + }, +}; + +struct inv_port_layout_s peony_sfp_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + { 0, 20, 1, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 1} }, + { 1, 21, 1, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 2} }, + { 2, 22, 1, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 3} }, + { 3, 23, 1, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 4} }, + { 4, 24, 1, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 5} }, + { 5, 25, 1, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 6} }, + { 6, 26, 1, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 7} }, + { 7, 27, 1, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 8} }, + { 8, 28, 2, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 13} }, + { 9, 29, 2, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 14} }, + {10, 30, 2, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 15} }, + {11, 31, 2, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 16} }, + {12, 32, 2, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 21} }, + {13, 33, 2, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 22} }, + {14, 34, 2, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 23} }, + {15, 35, 2, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 24} }, + {16, 36, 3, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 29} }, + {17, 37, 3, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 30} }, + {18, 38, 3, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 31} }, + {19, 39, 3, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 32} }, + {20, 40, 3, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 33} }, + {21, 41, 3, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 34} }, + {22, 42, 3, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 35} }, + {23, 43, 3, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 36} }, + {24, 44, 4, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 65} }, + {25, 45, 4, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 66} }, + {26, 46, 4, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 67} }, + {27, 47, 4, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 68} }, + {28, 48, 4, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 69} }, + {29, 49, 4, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 70} }, + {30, 50, 4, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 71} }, + {31, 51, 4, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 72} }, + {32, 52, 5, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 97} }, + {33, 53, 5, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 98} }, + {34, 54, 5, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, { 99} }, + {35, 55, 5, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {100} }, + {36, 56, 5, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {105} }, + {37, 57, 5, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {106} }, + {38, 58, 5, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {107} }, + {39, 59, 5, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {108} }, + {40, 60, 6, 0, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {113} }, + {41, 61, 6, 1, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {114} }, + {42, 62, 6, 2, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {115} }, + {43, 63, 6, 3, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {116} }, + {44, 64, 6, 4, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {121} }, + {45, 65, 6, 5, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {122} }, + {46, 66, 6, 6, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {123} }, + {47, 67, 6, 7, TRANSVR_TYPE_SFP, BCM_CHIP_TYPE_TRIDENT_3, {124} }, + {48, 12, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 49, 50, 51, 52} }, + {49, 13, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 57, 58, 59, 60} }, + {50, 14, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 61, 62, 63, 64} }, + {51, 15, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {52, 16, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {53, 17, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, +}; +#endif + + +/* =========================================================== + * Peony-Copper Layout configuration + * =========================================================== + */ +#ifdef SWPS_PEONY_COPPER +unsigned peony_copper_gpio_rest_mux = MUX_RST_CPLD_C0_A77_70_74_RST_ALL; + +struct inv_ioexp_layout_s peony_copper_ioexp_layout[] = { + /* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */ + {0, IOEXP_TYPE_QSFP_6P_LAYOUT_1, { {10, 0x20, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xc0, 0xc0}, }, /* addr[0] = I/O Expander 0 A */ + {10, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0xff}, {0xc0, 0xff}, }, /* addr[1] = I/O Expander 0 B */ + {10, 0x22, {0, 1}, {2, 3}, {6, 7}, {0xc0, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */ + }, +}; + +struct inv_port_layout_s peony_copper_port_layout[] = { + /* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */ + {48, 4, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 49, 50, 51, 52} }, + {49, 5, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 57, 58, 59, 60} }, + {50, 6, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 61, 62, 63, 64} }, + {51, 7, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 77, 78, 79, 80} }, + {52, 8, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 85, 86, 87, 88} }, + {53, 9, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TRIDENT_3, { 93, 94, 95, 96} }, +}; +#endif + + + +#endif /* INV_SWPS_H */ + + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/io_expander.c b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/io_expander.c new file mode 100644 index 00000000000..985bfbb45eb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/io_expander.c @@ -0,0 +1,2572 @@ +#include +#include +#include "io_expander.h" + +/* For build single module using (Ex: ONL platform) */ +#include +//#include + + +static struct ioexp_obj_s *ioexp_head_p = NULL; +static struct ioexp_obj_s *ioexp_tail_p = NULL; +extern int io_no_init; + +/* ========== Register IOEXP layout ========== + */ +struct ioexp_map_s ioexp_map_magnolia_nab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_4ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_magnolia_7ab = { + + .chip_amount = 2, + .data_width = 2, + + .map_present = { {1, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {1, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {1, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 2}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 3}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_redwood_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p01p08_p17p24 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 0, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 0, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 0, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 0, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 0, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 0, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 0, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_hudson32iga_p09p16_p25p32 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MODABS_QSFP(X) */ + {2, 1, 1}, /* map_present[1] = MODABS_QSFP(X+1) */ + {2, 1, 2}, /* map_present[2] = MODABS_QSFP(X+2) */ + {2, 1, 3}, /* map_present[3] = MODABS_QSFP(X+3) */ + {2, 1, 4}, /* map_present[4] = MODABS_QSFP(X+4) */ + {2, 1, 5}, /* map_present[5] = MODABS_QSFP(X+5) */ + {2, 1, 6}, /* map_present[6] = MODABS_QSFP(X+6) */ + {2, 1, 7}, /* map_present[7] = MODABS_QSFP(X+7) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP(X+3) */ + {1, 0, 0}, /* map_reset[4] = QRESET_QSFP(X+4) */ + {1, 0, 1}, /* map_reset[5] = QRESET_QSFP(X+5) */ + {1, 0, 2}, /* map_reset[6] = QRESET_QSFP(X+6) */ + {1, 0, 3}, /* map_reset[7] = QRESET_QSFP(X+7) */ + }, + .map_lpmod = { {0, 0, 4}, /* map_lpmod[0] = LPMODE_QSFP(X) */ + {0, 0, 5}, /* map_lpmod[1] = LPMODE_QSFP(X+1) */ + {0, 0, 6}, /* map_lpmod[2] = LPMODE_QSFP(X+2) */ + {0, 0, 7}, /* map_lpmod[3] = LPMODE_QSFP(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP(X+7) */ + }, + .map_modsel = { {0, 1, 4}, /* map_modsel[0] = MODSEL_QSFP(X) */ + {0, 1, 5}, /* map_modsel[1] = MODSEL_QSFP(X+1) */ + {0, 1, 6}, /* map_modsel[2] = MODSEL_QSFP(X+2) */ + {0, 1, 7}, /* map_modsel[3] = MODSEL_QSFP(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP(X+5) */ + {1, 1, 6}, /* map_modsel[6] = MODSEL_QSFP(X+6) */ + {1, 1, 7}, /* map_modsel[7] = MODSEL_QSFP(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_cypress_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 0, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 0, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 0, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 0, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {0, 1, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 1, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {0, 1, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {0, 1, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {0, 1, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {1, 1, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {1, 1, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {1, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {1, 1, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 1, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_5a = { + + .chip_amount = 1, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + }, +}; + + +struct ioexp_map_s ioexp_map_tahoe_6abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 3}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 0}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 5}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 0}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 3}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 0}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + {2, 1, 5}, /* map_present[8] = MOD_ABS_PORT(X+8) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {1, 0, 1}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {1, 0, 6}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {1, 1, 3}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {2, 0, 1}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {2, 0, 6}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + {2, 1, 3}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 2}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 7}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 1, 4}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {2, 0, 2}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {2, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + {2, 1, 4}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+8) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {1, 0, 0}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {1, 0, 5}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {1, 1, 2}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {2, 0, 0}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {2, 0, 5}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + {2, 1, 2}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_sequoia_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP28_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP28_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP28_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP28_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP28_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP28_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP28_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP28_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP28_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP28_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP28_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP28_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP28_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP28_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP28_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP28_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP28_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP28_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP28_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP28_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP28_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_lavender_p65 = { + + .chip_amount = 1, + .data_width = 1, + + .map_present = { {0, 0, 4}, }, /* map_present[0] = MOD_ABS_PORT(X) */ + .map_reset = { {0, 0, 1}, }, /* map_reset[0] = QRESET_QSFP28_N_P(X) */ + .map_lpmod = { {0, 0, 2}, }, /* map_lpmod[0] = LPMODE_QSFP28_P(X) */ + .map_modsel = { {0, 0, 0}, }, /* map_modsel[0] = MODSEL_QSFP28_N_P(X) */ +}; + + +struct ioexp_map_s cpld_map_cottonwood = { + + .chip_amount = 1, + .data_width = 4, + + .map_present = { {0, 2, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 2, 4}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 3, 0}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 3, 4}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + }, + .map_tx_disable = { {0, 0, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + }, + .map_tx_fault = { {0, 2, 2}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 2, 6}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 3, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 3, 6}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + }, + .map_rxlos = { {0, 2, 1}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 2, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 3, 1}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 3, 5}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + }, + .map_hard_rs0 = { {0, 0, 2}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {0, 0, 6}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {0, 1, 2}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {0, 1, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + }, + .map_hard_rs1 = { {0, 0, 2}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {0, 0, 6}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {0, 1, 2}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {0, 1, 6}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + }, +}; + + +struct ioexp_map_s ioexp_map_maple_0abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 1, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + {0, 1, 6}, /* map_reset[6] = QRESET_QSFP_N_P(X+6) */ + {0, 1, 7}, /* map_reset[7] = QRESET_QSFP_N_P(X+7) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + {1, 0, 6}, /* map_lpmod[6] = LPMODE_QSFP_P(X+6) */ + {1, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + {0, 0, 6}, /* map_modsel[6] = MODSEL_QSFP_N_P(X+6) */ + {0, 0, 7}, /* map_modsel[7] = MODSEL_QSFP_N_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_maple_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 4}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 5}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 4}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 5}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 2}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 3}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 2}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 3}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 1}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 1}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 6}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 6}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_nabc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 2}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 6}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 6}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 2}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 6}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 2}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 6}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 1}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 5}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 1}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 5}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 1}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 5}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 1}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 5}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 4}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 4}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 3}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 3}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 3}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 3}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_1abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 2}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 6}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 6}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 4}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 5}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 1}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 5}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 1}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 5}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 2}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 3}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 4}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 4}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 1}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 3}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 3}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 6}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_3abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 4}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 1, 5}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 2}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 6}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 1, 2}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 1, 6}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 0, 2}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 0, 3}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 0, 1}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 0, 5}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 1}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 5}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 1, 0}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 1, 1}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 4}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 1, 0}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 1, 4}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 0, 6}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 0, 7}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 0, 3}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 0, 7}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 3}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + + +struct ioexp_map_s ioexp_map_gulmohar_2t_evt1_7abc = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 1, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {1, 0, 4}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 1, 1}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 1, 6}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {2, 0, 4}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {2, 1, 1}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_reset = { {0, 0, 1}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 0, 6}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 3}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {1, 0, 1}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {1, 0, 6}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {1, 1, 3}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + {2, 0, 1}, /* map_reset[6] = QRESET_QSFP_N_P(X+6) */ + {2, 0, 6}, /* map_reset[7] = QRESET_QSFP_N_P(X+7) */ + }, + .map_lpmod = { {0, 0, 2}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {0, 0, 7}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {0, 1, 4}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 2}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 7}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 1, 4}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + {2, 0, 2}, /* map_lpmod[6] = LPMODE_QSFP_P(X+6) */ + {2, 0, 7}, /* map_lpmod[7] = LPMODE_QSFP_P(X+7) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 5}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {1, 0, 0}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {1, 0, 5}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {1, 1, 2}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + {2, 0, 0}, /* map_modsel[6] = MODSEL_QSFP_N_P(X+6) */ + {2, 0, 5}, /* map_modsel[7] = MODSEL_QSFP_N_P(X+7) */ + }, +}; + + +/* PortType: SFP / 8 port + * Platform: Cypress, Peony_SFP + */ +struct ioexp_map_s ioexp_map_sfp_8p_layout_1 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {0, 0, 4}, /* map_present[0] = MOD_ABS_PORT(X) */ + {0, 0, 5}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {0, 0, 6}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {0, 0, 7}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {1, 0, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {1, 0, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + {1, 0, 6}, /* map_present[6] = MOD_ABS_PORT(X+6) */ + {1, 0, 7}, /* map_present[7] = MOD_ABS_PORT(X+7) */ + }, + .map_tx_disable = { {0, 1, 0}, /* map_tx_disable[0] = TXDISABLE_SFP+_P(X) */ + {0, 1, 1}, /* map_tx_disable[1] = TXDISABLE_SFP+_P(X+1) */ + {0, 1, 2}, /* map_tx_disable[2] = TXDISABLE_SFP+_P(X+2) */ + {0, 1, 3}, /* map_tx_disable[3] = TXDISABLE_SFP+_P(X+3) */ + {1, 1, 0}, /* map_tx_disable[4] = TXDISABLE_SFP+_P(X+4) */ + {1, 1, 1}, /* map_tx_disable[5] = TXDISABLE_SFP+_P(X+5) */ + {1, 1, 2}, /* map_tx_disable[6] = TXDISABLE_SFP+_P(X+6) */ + {1, 1, 3}, /* map_tx_disable[7] = TXDISABLE_SFP+_P(X+7) */ + }, + .map_tx_fault = { {0, 0, 0}, /* map_tx_fault[0] = TXFAULT_SFP+_P(X) */ + {0, 0, 1}, /* map_tx_fault[1] = TXFAULT_SFP+_P(X+1) */ + {0, 0, 2}, /* map_tx_fault[2] = TXFAULT_SFP+_P(X+2) */ + {0, 0, 3}, /* map_tx_fault[3] = TXFAULT_SFP+_P(X+3) */ + {1, 0, 0}, /* map_tx_fault[4] = TXFAULT_SFP+_P(X+4) */ + {1, 0, 1}, /* map_tx_fault[5] = TXFAULT_SFP+_P(X+5) */ + {1, 0, 2}, /* map_tx_fault[6] = TXFAULT_SFP+_P(X+6) */ + {1, 0, 3}, /* map_tx_fault[7] = TXFAULT_SFP+_P(X+7) */ + }, + .map_rxlos = { {0, 1, 4}, /* map_rxlos[0] = OPRXLOS_PORT(X) */ + {0, 1, 5}, /* map_rxlos[1] = OPRXLOS_PORT(X+1) */ + {0, 1, 6}, /* map_rxlos[2] = OPRXLOS_PORT(X+2) */ + {0, 1, 7}, /* map_rxlos[3] = OPRXLOS_PORT(X+3) */ + {1, 1, 4}, /* map_rxlos[4] = OPRXLOS_PORT(X+4) */ + {1, 1, 5}, /* map_rxlos[5] = OPRXLOS_PORT(X+5) */ + {1, 1, 6}, /* map_rxlos[6] = OPRXLOS_PORT(X+6) */ + {1, 1, 7}, /* map_rxlos[7] = OPRXLOS_PORT(X+7) */ + }, + .map_hard_rs0 = { {2, 0, 0}, /* map_hard_rs0[0] = RS0_SFP28_P(X) */ + {2, 0, 2}, /* map_hard_rs0[1] = RS0_SFP28_P(X+1) */ + {2, 0, 4}, /* map_hard_rs0[2] = RS0_SFP28_P(X+2) */ + {2, 0, 6}, /* map_hard_rs0[3] = RS0_SFP28_P(X+3) */ + {2, 1, 0}, /* map_hard_rs0[4] = RS0_SFP28_P(X+4) */ + {2, 1, 2}, /* map_hard_rs0[5] = RS0_SFP28_P(X+5) */ + {2, 1, 4}, /* map_hard_rs0[6] = RS0_SFP28_P(X+6) */ + {2, 1, 6}, /* map_hard_rs0[7] = RS0_SFP28_P(X+7) */ + }, + .map_hard_rs1 = { {2, 0, 1}, /* map_hard_rs1[0] = RS1_SFP28_P(X) */ + {2, 0, 3}, /* map_hard_rs1[1] = RS1_SFP28_P(X+1) */ + {2, 0, 5}, /* map_hard_rs1[2] = RS1_SFP28_P(X+2) */ + {2, 0, 7}, /* map_hard_rs1[3] = RS1_SFP28_P(X+3) */ + {2, 1, 1}, /* map_hard_rs1[4] = RS1_SFP28_P(X+4) */ + {2, 1, 3}, /* map_hard_rs1[5] = RS1_SFP28_P(X+5) */ + {2, 1, 5}, /* map_hard_rs1[6] = RS1_SFP28_P(X+6) */ + {2, 1, 7}, /* map_hard_rs1[7] = RS1_SFP28_P(X+7) */ + }, +}; + + +/* PortType: QSFP / 6 port + * Platform: Gulmohar, Peony_SFP, Peony_Copper + */ +struct ioexp_map_s ioexp_map_6p_qsfp_type_1 = { + + .chip_amount = 3, + .data_width = 2, + + .map_present = { {2, 1, 0}, /* map_present[0] = MOD_ABS_PORT(X) */ + {2, 1, 1}, /* map_present[1] = MOD_ABS_PORT(X+1) */ + {2, 1, 2}, /* map_present[2] = MOD_ABS_PORT(X+2) */ + {2, 1, 3}, /* map_present[3] = MOD_ABS_PORT(X+3) */ + {2, 1, 4}, /* map_present[4] = MOD_ABS_PORT(X+4) */ + {2, 1, 5}, /* map_present[5] = MOD_ABS_PORT(X+5) */ + }, + .map_reset = { {0, 1, 0}, /* map_reset[0] = QRESET_QSFP_N_P(X) */ + {0, 1, 1}, /* map_reset[1] = QRESET_QSFP_N_P(X+1) */ + {0, 1, 2}, /* map_reset[2] = QRESET_QSFP_N_P(X+2) */ + {0, 1, 3}, /* map_reset[3] = QRESET_QSFP_N_P(X+3) */ + {0, 1, 4}, /* map_reset[4] = QRESET_QSFP_N_P(X+4) */ + {0, 1, 5}, /* map_reset[5] = QRESET_QSFP_N_P(X+5) */ + }, + .map_lpmod = { {1, 0, 0}, /* map_lpmod[0] = LPMODE_QSFP_P(X) */ + {1, 0, 1}, /* map_lpmod[1] = LPMODE_QSFP_P(X+1) */ + {1, 0, 2}, /* map_lpmod[2] = LPMODE_QSFP_P(X+2) */ + {1, 0, 3}, /* map_lpmod[3] = LPMODE_QSFP_P(X+3) */ + {1, 0, 4}, /* map_lpmod[4] = LPMODE_QSFP_P(X+4) */ + {1, 0, 5}, /* map_lpmod[5] = LPMODE_QSFP_P(X+5) */ + }, + .map_modsel = { {0, 0, 0}, /* map_modsel[0] = MODSEL_QSFP_N_P(X) */ + {0, 0, 1}, /* map_modsel[1] = MODSEL_QSFP_N_P(X+1) */ + {0, 0, 2}, /* map_modsel[2] = MODSEL_QSFP_N_P(X+2) */ + {0, 0, 3}, /* map_modsel[3] = MODSEL_QSFP_N_P(X+3) */ + {0, 0, 4}, /* map_modsel[4] = MODSEL_QSFP_N_P(X+4) */ + {0, 0, 5}, /* map_modsel[5] = MODSEL_QSFP_N_P(X+5) */ + }, +}; + + +/* ========== Private functions ========== + */ +int check_channel_tier_1(void); + +struct i2c_client * +_get_i2c_client(struct ioexp_obj_s *self, + int chip_id){ + + struct ioexp_i2c_s *i2c_curr_p = self->i2c_head_p; + + if (!(i2c_curr_p)){ + SWPS_ERR("%s: i2c_curr_p is NULL\n", __func__); + return NULL; + } + while (i2c_curr_p){ + if ((i2c_curr_p->chip_id) == chip_id){ + return i2c_curr_p->i2c_client_p; + } + i2c_curr_p = i2c_curr_p->next; + } + SWPS_ERR("%s: not exist! :%d\n", __func__, chip_id); + return NULL; +} + + +static int +_common_ioexp_update_one(struct ioexp_obj_s *self, + struct ioexp_addr_s *ioexp_addr, + int chip_id, + int data_width, + int show_err, + char *caller_name) { + int buf = 0; + int err = 0; + int data_id = 0; + int r_offset = 0; + + for(data_id=0; data_idread_offset[data_id]; + buf = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), r_offset); + /* Check error */ + if (buf < 0) { + err = 1; + if (show_err) { + SWPS_INFO("IOEXP-%d read fail! :%d \n", self->ioexp_id, buf); + SWPS_INFO("Dump: :%d :0x%02x :%d, :%s\n", + ioexp_addr->chan_id, ioexp_addr->chip_addr, + ioexp_addr->read_offset[data_id], caller_name); + } + continue; + } + /* Update IOEXP object */ + self->chip_data[chip_id].data[data_id] = (uint8_t)buf; + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +common_ioexp_update_all(struct ioexp_obj_s *self, + int show_err, + char *caller_name){ + + int err = 0; + int chip_id = 0; + int chip_amount = self->ioexp_map_p->chip_amount; + + for (chip_id=0; chip_idioexp_map_p->map_addr[chip_id]), + chip_id, + self->ioexp_map_p->data_width, + show_err, + caller_name) < 0) { + err = 1; + } + } + if (err) { + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +static int +_common_check_by_mode(struct ioexp_obj_s *self){ + + switch (self->mode){ + case IOEXP_MODE_DIRECT: + return self->fsm_4_direct(self); + + case IOEXP_MODE_POLLING: + if (self->state >= 0){ + return 0; + } + switch (self->state){ + case STATE_IOEXP_INIT: + return ERR_IOEXP_UNINIT; + case STATE_IOEXP_ABNORMAL: + return ERR_IOEXP_ABNORMAL; + default: + return ERR_IOEXP_NOSTATE; + } + break; + + default: + break; + } + SWPS_ERR("%s: Exception occurs. :%d \n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +static int +_common_get_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + char *func_mane){ + uint8_t buf; + int err_code; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Get data form cache */ + buf = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + return (int)(buf >> bitmap_obj_p->bit_shift & 0x01); +} + + +static int +_common_set_bit(struct ioexp_obj_s *self, + struct ioexp_bitmap_s *bitmap_obj_p, + int input_val, + char *func_mane){ + int err_code, target_offset; + uint8_t origin_byte; + uint8_t modify_byte; + + /* Check and get address */ + err_code = _common_check_by_mode(self); + if (err_code < 0){ + return err_code; + } + if (!bitmap_obj_p){ + SWPS_ERR("Layout config incorrect! :%d :%s\n", + self->ioexp_id, func_mane); + return ERR_IOEXP_BADCONF; + } + /* Prepare write date */ + origin_byte = self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset]; + switch (input_val) { + case 0: + modify_byte = origin_byte; + SWP_BIT_CLEAR(modify_byte, bitmap_obj_p->bit_shift); + break; + case 1: + modify_byte = origin_byte; + SWP_BIT_SET(modify_byte, bitmap_obj_p->bit_shift); + break; + default: + SWPS_ERR("Input value incorrect! :%d :%d :%s\n", + input_val, self->ioexp_id, func_mane); + return ERR_IOEXP_BADINPUT; + } + /* Setup i2c client */ + target_offset = self->ioexp_map_p->map_addr[bitmap_obj_p->chip_id].write_offset[bitmap_obj_p->ioexp_voffset]; + /* Write byte to chip via I2C */ + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, bitmap_obj_p->chip_id), + target_offset, + modify_byte); + /* Update or bollback object */ + if (err_code < 0){ + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = origin_byte; + SWPS_ERR("I2C write fail! :%d :%d :%s :%d\n", + input_val, self->ioexp_id, func_mane, err_code); + return err_code; + } + self->chip_data[bitmap_obj_p->chip_id].data[bitmap_obj_p->ioexp_voffset] = modify_byte; + return 0; +} + + +/* ========== Object public functions ========== + */ +int +common_get_present(struct ioexp_obj_s *self, + int virt_offset){ + + int UNPLUG = 1; + int retval = ERR_IOEXP_UNEXCPT; + + retval = _common_get_bit(self, + &(self->ioexp_map_p->map_present[virt_offset]), + "common_get_present"); + if (retval < 0) { + /* [Note] + * => Transceiver object does not need to handle IOEXP layer issues. + */ + return UNPLUG; + } + return retval; +} + + +int +common_get_tx_fault(struct ioexp_obj_s *self, + int virt_offset){ + /* [Transmit Fault (Tx_Fault)] + * A catastrophic laser fault will activate the transmitter signal, + * TX_FAULT, and disable the laser. This signal is an open collector + * output (pull-up required on the host board). A low signal indicates + * normal laser operation and a high signal indicates a fault. The + * TX_FAULT will be latched high when a laser fault occurs and is + * cleared by toggling the TX_DISABLE input or power cycling the + * transceiver. The transmitter fault condition can also be monitored + * via the two-wire serial interface. + * (address A2, byte 110, bit 2). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_fault[virt_offset]), + "common_get_tx_fault"); +} + + +int +common_get_rxlos(struct ioexp_obj_s *self, + int virt_offset){ + /* [Receiver Loss of Signal (Rx_LOS)] + * The post-amplification IC also includes transition detection circuitry + * which monitors the ac level of incoming optical signals and provides a + * TTL/CMOS compatible status signal to the host (pin 8). An adequate optical + * input results in a low Rx_LOS output while a high Rx_LOS output indicates + * an unusable optical input. The Rx_LOS thresholds are factory set so that + * a high output indicates a definite optical fault has occurred. Rx_LOS can + * also be monitored via the two-wire serial interface + * (address A2h, byte 110, bit 1). + * + * 0: Normal + * 1: Abnormal + */ + return _common_get_bit(self, + &(self->ioexp_map_p->map_rxlos[virt_offset]), + "common_get_rxlos"); +} + + +int +common_get_tx_disable(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + "common_get_tx_disable"); +} + + +int +common_get_reset(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + "common_get_reset"); +} + + +int +common_get_lpmod(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + "common_get_lpmod"); +} + + +int +common_get_modsel(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + "common_get_modsel"); +} + + +int +common_get_hard_rs0(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + "common_get_hard_rs0"); +} + + +int +common_get_hard_rs1(struct ioexp_obj_s *self, + int virt_offset){ + + return _common_get_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + "common_get_hard_rs1"); +} + + +int +common_set_tx_disable(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_tx_disable[virt_offset]), + input_val, + "common_set_tx_disable"); +} + + +int +common_set_reset(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_reset[virt_offset]), + input_val, + "common_set_reset"); +} + + +int +common_set_lpmod(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_lpmod[virt_offset]), + input_val, + "common_set_lpmod"); +} + + +int +common_set_modsel(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_modsel[virt_offset]), + input_val, + "common_set_modsel"); +} + + +int +common_set_hard_rs0(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs0[virt_offset]), + input_val, + "common_set_hard_rs0"); +} + + +int +common_set_hard_rs1(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + + return _common_set_bit(self, + &(self->ioexp_map_p->map_hard_rs1[virt_offset]), + input_val, + "common_set_hard_rs1"); +} + + +int +ioexp_get_not_support(struct ioexp_obj_s *self, + int virt_offset){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +ioexp_set_not_support(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + return ERR_IOEXP_NOTSUPPORT; +} + + +int +fake_ioexp_init(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_ioexp_update(struct ioexp_obj_s *self){ + return 1; +} + + +int +fake_update_func(struct ioexp_obj_s *self){ + return 1; +} + +int +fake_get_func(struct ioexp_obj_s *self, + int virt_offset){ + SWPS_WARN("Someone called fake_get_func\n"); + return -1; +} + +int +fake_set_func(struct ioexp_obj_s *self, + int virt_offset, + int input_val){ + SWPS_WARN("Someone called fake_set_func\n"); + return -1; +} + + +/* ========== Initial functions for IO Expander ========== + */ +int +common_ioexp_init(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + + if (self->mode == IOEXP_MODE_DIRECT) { + goto update_common_ioexp_init; + } + if (!io_no_init) { /*normal init*/ + + /* Setup default value to each physical IO Expander */ + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + /* Get address mapping */ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("%s: IOEXP config incorrect! :%d \n", + __func__, chip_id); + return -1; + } + /* Setup default value */ + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + /* [Desc] Skip the setup default value behavior + [Note] Setup default value = -1 if you don't want to write the value to IOEXP or CPLD + */ + if(addr_p->write_offset[offset] < 0){ + SWPS_DEBUG("skip a write_offset <%d>\n", addr_p->conf_offset[offset]); + continue; + } + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->write_offset[offset], + addr_p->data_default[offset]); + if (err_code < 0){ + SWPS_ERR("%s: set default fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + } + } + } +update_common_ioexp_init: + /* Check and update info to object */ + err_code = self->update_all(self, 1, "common_ioexp_init"); + if (err_code < 0) { + SWPS_ERR("%s: update_all() fail! :%d \n", + __func__, err_code); + return ERR_IOEXP_UNEXCPT; + } + return 0; +} + + +/* ========== Object functions for Final State Machine ========== + */ +int +_is_channel_ready(struct ioexp_obj_s *self){ + + int chip_id = 0; + int byte_id = 0; + int getval = ERR_IOEXP_UNEXCPT; + int chkval = ERR_IOEXP_UNEXCPT; + char *emsg = "ERR"; + struct ioexp_addr_s *addr_p = NULL; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++) { + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + emsg = "IOEXP config incorrect"; + goto err_is_channel_ready; + } + for (byte_id=0; byte_id<(self->ioexp_map_p->data_width); byte_id++) { + if (addr_p->conf_offset[byte_id] < 0) { + continue; + } + if ((addr_p->conf_default[byte_id]) != 0) { + goto go_is_channel_ready; + } + } + if (chip_id == ((self->ioexp_map_p->chip_amount) - 1)) { + SWPS_DEBUG("%s: no non-zero config", __func__); + break; + } + } + chip_id = 0; + byte_id = 0; + +go_is_channel_ready: + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + chkval = addr_p->conf_default[byte_id]; + getval = i2c_smbus_read_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[byte_id]); + + SWPS_DEBUG("%s: target info :%d :%d :%d :%d :%d\n", + __func__, self->ioexp_id, chip_id, byte_id, chkval, getval); + + if ((getval >= 0) && (getval == chkval)) { + return 1; + } + return 0; + +err_is_channel_ready: + SWPS_ERR("%s: %s :%d :%d :%d :%d :%d\n", + __func__, emsg, self->ioexp_id, chip_id, byte_id, chkval, getval); + return ERR_IOEXP_UNEXCPT; +} + + +int +_ioexp_init_handler(struct ioexp_obj_s *self){ + + int return_val; + + switch (self->mode) { + case IOEXP_MODE_DIRECT: + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + case IOEXP_MODE_POLLING: + /* Check system and channel is ready */ + if (self->state == STATE_IOEXP_INIT){ + if (!_is_channel_ready(self)){ + self->state = STATE_IOEXP_INIT; + SWPS_WARN("%s: IOEXP:%d channel not ready.\n", + __func__, self->ioexp_id); + return 0; + } + } + /* Execute initial callback */ + return_val = self->init(self); + if (return_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + } else { + self->state = STATE_IOEXP_NORMAL; + } + return return_val; + + default: + break; + } + SWPS_ERR("%s: exception occur :%d\n", __func__, self->mode); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_direct(struct ioexp_obj_s *self){ + + int result_val; + int show_err = 1; + char *func_mane = "common_ioexp_fsm_4_direct"; + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, and return error */ + return ERR_IOEXP_UNINIT; + } + /* Case: Initial done */ + return 0; + + case STATE_IOEXP_NORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + SWPS_INFO("%s: NORMAL -> ABNORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + self->state = STATE_IOEXP_NORMAL; + return 0; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_err, func_mane); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_DEBUG("%s: ABNORMAL -> NORMAL :%d\n", + __func__, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("%s: Exception occurs :%d\n", + __func__, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +int +common_ioexp_fsm_4_polling(struct ioexp_obj_s *self){ + + int result_val, i, show_e; + int fail_retry = 3; + char *func_name = "common_ioexp_fsm_4_polling"; + +#ifdef DEBUG_SWPS + show_e = 1; +#else + show_e = 0; +#endif + + switch (self->state){ + case STATE_IOEXP_INIT: + result_val = _ioexp_init_handler(self); + /* Exception case: terminate initial procedure */ + if(result_val < 0){ + /* Initial fail */ + return result_val; + } + /* Case: System (Channel) not ready */ + if(self->state == STATE_IOEXP_INIT){ + /* Keep in INIT state, wait and retry */ + return 0; + } + /* Case: Initial done */ + SWPS_INFO("IOEXP-%d: initial done. :%d\n", + self->ioexp_id, self->ioexp_type); + return result_val; + + case STATE_IOEXP_NORMAL: + /* Retry mechanism for case of i2c topology not stable */ + for (i=0; iupdate_all(self, show_e, func_name); + if (result_val >= 0) { + self->state = STATE_IOEXP_NORMAL; + return 0; + } + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: detect I2C crash :%d\n", + __func__, self->ioexp_id); + break; + } + SWPS_DEBUG("IOEXP-%d: unstable :%d\n", + self->ioexp_id, result_val); + } + SWPS_INFO("IOEXP-%d: NORMAL -> ABNORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + + case STATE_IOEXP_ABNORMAL: + result_val = self->update_all(self, show_e, func_name); + if (result_val < 0){ + self->state = STATE_IOEXP_ABNORMAL; + return result_val; + } + SWPS_INFO("IOEXP-%d: ABNORMAL -> NORMAL :%d\n", + self->ioexp_id, result_val); + self->state = STATE_IOEXP_NORMAL; + return 0; + + default: + break; + } + SWPS_ERR("IOEXP-%d: Exception occurs :%d\n", + self->ioexp_id, self->state); + return ERR_IOEXP_UNEXCPT; +} + + +/* ========== Object private functions for check & update ========== + */ +int +common_ioexp_check(struct ioexp_obj_s *self){ + + int result; + + if (self->mode != IOEXP_MODE_POLLING){ + SWPS_ERR("%s: not polling mode :%d\n", + __func__, self->mode); + return ERR_IOEXP_NOTSUPPORT; + } + mutex_lock(&self->lock); + result = self->fsm_4_polling(self); + mutex_unlock(&self->lock); + return result; +} + + +/* ========== Functions for Factory pattern ========== + */ +static struct ioexp_map_s * +get_ioexp_map(int ioexp_type){ + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + return &ioexp_map_magnolia_nab; + case IOEXP_TYPE_MAGINOLIA_4AB: + return &ioexp_map_magnolia_4ab; + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + return &ioexp_map_magnolia_7ab; + case IOEXP_TYPE_REDWOOD_P01P08: + return &ioexp_map_redwood_p01p08_p17p24; + case IOEXP_TYPE_REDWOOD_P09P16: + return &ioexp_map_redwood_p09p16_p25p32; + case IOEXP_TYPE_HUDSON32IGA_P01P08: + return &ioexp_map_hudson32iga_p01p08_p17p24; + case IOEXP_TYPE_HUDSON32IGA_P09P16: + return &ioexp_map_hudson32iga_p09p16_p25p32; + case IOEXP_TYPE_CYPRESS_7ABC: + return &ioexp_map_cypress_7abc; + case IOEXP_TYPE_TAHOE_5A: + return &ioexp_map_tahoe_5a; + case IOEXP_TYPE_TAHOE_6ABC: + return &ioexp_map_tahoe_6abc; + case IOEXP_TYPE_SEQUOIA_NABC: + return &ioexp_map_sequoia_nabc; + case IOEXP_TYPE_LAVENDER_P65: + return &ioexp_map_lavender_p65; + case CPLD_TYPE_COTTONWOOD: + return &cpld_map_cottonwood; + case IOEXP_TYPE_MAPLE_0ABC: + return &ioexp_map_maple_0abc; + case IOEXP_TYPE_MAPLE_NABC: + return &ioexp_map_maple_nabc; + case IOEXP_TYPE_GULMOHAR_NABC: + return &ioexp_map_gulmohar_nabc; + case IOEXP_TYPE_GULMOHAR_7ABC: + return &ioexp_map_gulmohar_7abc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + return &ioexp_map_gulmohar_2t_evt1_nabc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + return &ioexp_map_gulmohar_2t_evt1_1abc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + return &ioexp_map_gulmohar_2t_evt1_3abc; + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + return &ioexp_map_gulmohar_2t_evt1_7abc; + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + return &ioexp_map_sfp_8p_layout_1; + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + return &ioexp_map_6p_qsfp_type_1; + default: + return NULL; + } +} + + +int +setup_ioexp_ssize_attr(struct ioexp_obj_s *self, + struct ioexp_map_s *ioexp_map_p, + int ioexp_id, + int ioexp_type, + int run_mode){ + switch (run_mode){ + case IOEXP_MODE_POLLING: /* Direct access device mode */ + case IOEXP_MODE_DIRECT: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = ERR_IOEXP_UNEXCPT; + return ERR_IOEXP_UNEXCPT; + } + /* Setup mapping structure */ + self->ioexp_map_p = kzalloc(sizeof(*ioexp_map_p), GFP_KERNEL); + if (!(self->ioexp_map_p)) { + SWPS_ERR("%s: kzalloc ioexp_map_p fail\n", __func__); + return -1; + } + memcpy(self->ioexp_map_p, ioexp_map_p, sizeof(*ioexp_map_p)); + /* Setup attributes */ + self->ioexp_id = ioexp_id; + self->ioexp_type = ioexp_type; + self->state = STATE_IOEXP_INIT; + mutex_init(&self->lock); + return 0; +} + + +static int +setup_addr_mapping(struct ioexp_obj_s *self, + struct ioexp_addr_s *addr_map_p, + int chip_amount){ + struct ioexp_addr_s *tmp_p; + if (!addr_map_p){ + SWPS_ERR("%s: map is null\n", __func__); + return -1; + } + tmp_p = kzalloc((sizeof(*addr_map_p) * chip_amount), GFP_KERNEL); + if (!tmp_p){ + SWPS_ERR("%s: kzalloc fail.\n", __func__); + return -1; + } + memcpy(tmp_p, addr_map_p, (sizeof(*addr_map_p) * chip_amount)); + self->ioexp_map_p->map_addr = tmp_p; + + return 0; +} + + +static int +setup_ioexp_public_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case CPLD_TYPE_COTTONWOOD: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_GULMOHAR_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + self->get_present = common_get_present; + self->get_tx_fault = common_get_tx_fault; + self->get_rxlos = common_get_rxlos; + self->get_tx_disable = common_get_tx_disable; + self->get_reset = ioexp_get_not_support; + self->get_lpmod = ioexp_get_not_support; + self->get_modsel = ioexp_get_not_support; + self->get_hard_rs0 = common_get_hard_rs0; + self->get_hard_rs1 = common_get_hard_rs1; + self->set_tx_disable = common_set_tx_disable; + self->set_reset = ioexp_set_not_support; + self->set_lpmod = ioexp_set_not_support; + self->set_modsel = ioexp_set_not_support; + self->set_hard_rs0 = common_set_hard_rs0; + self->set_hard_rs1 = common_set_hard_rs1; + return 0; + + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case IOEXP_TYPE_MAPLE_0ABC: + case IOEXP_TYPE_GULMOHAR_7ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + self->get_present = common_get_present; + self->get_tx_fault = ioexp_get_not_support; + self->get_rxlos = ioexp_get_not_support; + self->get_tx_disable = ioexp_get_not_support; + self->get_reset = common_get_reset; + self->get_lpmod = common_get_lpmod; + self->get_modsel = common_get_modsel; + self->get_hard_rs0 = ioexp_get_not_support; + self->get_hard_rs1 = ioexp_get_not_support; + self->set_tx_disable = ioexp_set_not_support; + self->set_reset = common_set_reset; + self->set_lpmod = common_set_lpmod; + self->set_modsel = common_set_modsel; + self->set_hard_rs0 = ioexp_set_not_support; + self->set_hard_rs1 = ioexp_set_not_support; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_ioexp_private_cb(struct ioexp_obj_s *self, + int ioexp_type){ + + switch (ioexp_type){ + case IOEXP_TYPE_MAGINOLIA_NAB: + case IOEXP_TYPE_MAGINOLIA_4AB: + case IOEXP_TYPE_MAGINOLIA_7AB: + case IOEXP_TYPE_SPRUCE_7AB: + case IOEXP_TYPE_REDWOOD_P01P08: + case IOEXP_TYPE_REDWOOD_P09P16: + case IOEXP_TYPE_HUDSON32IGA_P01P08: + case IOEXP_TYPE_HUDSON32IGA_P09P16: + case IOEXP_TYPE_CYPRESS_7ABC: + case IOEXP_TYPE_TAHOE_5A: + case IOEXP_TYPE_TAHOE_6ABC: + case IOEXP_TYPE_SEQUOIA_NABC: + case IOEXP_TYPE_LAVENDER_P65: + case CPLD_TYPE_COTTONWOOD: + case IOEXP_TYPE_MAPLE_NABC: + case IOEXP_TYPE_MAPLE_0ABC: + case IOEXP_TYPE_GULMOHAR_NABC: + case IOEXP_TYPE_GULMOHAR_7ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC: + case IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC: + case IOEXP_TYPE_SFP_8P_LAYOUT_1: + case IOEXP_TYPE_QSFP_6P_LAYOUT_1: + self->init = common_ioexp_init; + self->check = common_ioexp_check; + self->update_all = common_ioexp_update_all; + self->fsm_4_direct = common_ioexp_fsm_4_direct; + self->fsm_4_polling = common_ioexp_fsm_4_polling; + return 0; + + default: + SWPS_ERR("%s: type:%d incorrect!\n", __func__, ioexp_type); + break; + } + return ERR_IOEXP_UNEXCPT; +} + + +static int +setup_i2c_client_one(struct ioexp_obj_s *self, + int chip_id){ + + char *err_msg = "ERROR"; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + struct ioexp_i2c_s *i2c_obj_p = NULL; + struct ioexp_i2c_s *i2c_curr_p = NULL; + + int chan_id = self->ioexp_map_p->map_addr[chip_id].chan_id; + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + err_msg = "Can not kzalloc client!"; + goto err_ioexp_setup_i2c_1; + } + i2c_obj_p = kzalloc(sizeof(*i2c_obj_p), GFP_KERNEL); + if (!i2c_obj_p){ + err_msg = "Can not kzalloc i2c_obj_p!"; + goto err_ioexp_setup_i2c_2; + } + adap = i2c_get_adapter(chan_id); + if(!adap){ + err_msg = "Can not get adap!"; + goto err_ioexp_setup_i2c_3; + } + client->adapter = adap; + client->addr = self->ioexp_map_p->map_addr[chip_id].chip_addr; + i2c_obj_p->i2c_client_p = client; + i2c_obj_p->chip_id = chip_id; + i2c_obj_p->next = NULL; + if (!self->i2c_head_p){ + self->i2c_head_p = i2c_obj_p; + } else { + i2c_curr_p = self->i2c_head_p; + while (i2c_curr_p->next){ + i2c_curr_p = i2c_curr_p->next; + } + i2c_curr_p->next = i2c_obj_p; + } + return 0; + +err_ioexp_setup_i2c_3: + kfree(i2c_obj_p); +err_ioexp_setup_i2c_2: + kfree(client); +err_ioexp_setup_i2c_1: + SWPS_ERR("%s: %s :%d\n", __func__, err_msg, chan_id); + return -1; +} + + +static int +setup_i2c_client(struct ioexp_obj_s* self){ + + int result; + int chip_id = 0; + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + result = setup_i2c_client_one(self, chip_id); + if (result < 0){ + SWPS_ERR("%s fail! :%d\n", __func__, chip_id); + return -1; + } + } + return 0; +} + + +static int +setup_ioexp_config(struct ioexp_obj_s *self) { + + int chip_id, offset, err_code; + struct ioexp_addr_s *addr_p; + if (io_no_init) { + + SWPS_INFO("io_no_init:%d \n", io_no_init); + return 0; + } + + for (chip_id=0; chip_id<(self->ioexp_map_p->chip_amount); chip_id++){ + addr_p = &(self->ioexp_map_p->map_addr[chip_id]); + if (!addr_p){ + SWPS_ERR("IOEXP config incorrect! :%d \n",chip_id); + return -1; + } + for (offset=0; offset<(self->ioexp_map_p->data_width); offset++){ + + /* [Desc] Skip the setup config value behavior + [Note] Setup config value = -1 if you don't want to write the value to IOEXP or CPLD + */ + if(addr_p->conf_offset[offset] < 0){ + SWPS_DEBUG("skip a config_offset <%d>\n", addr_p->conf_offset[offset]); + continue; + } + err_code = i2c_smbus_write_byte_data(_get_i2c_client(self, chip_id), + addr_p->conf_offset[offset], + addr_p->conf_default[offset]); + + if (err_code < 0){ + SWPS_INFO("%s: set conf fail! :%d \n", __func__, err_code); + return -2; + } + } + } + return 0; +} + + +struct ioexp_obj_s * +_create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_map_s* ioexp_map_p; + struct ioexp_obj_s* result_p; + struct ioexp_i2c_s *i2c_curr_p; + struct ioexp_i2c_s *i2c_next_p; + + /* Get layout */ + ioexp_map_p = get_ioexp_map(ioexp_type); + if (!ioexp_map_p){ + SWPS_ERR("%s: Invalid ioexp_type\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare IOEXP object */ + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + SWPS_ERR("%s: kzalloc failure!\n", __func__); + goto err_create_ioexp_fail; + } + /* Prepare static size attributes */ + if (setup_ioexp_ssize_attr(result_p, + ioexp_map_p, + ioexp_id, + ioexp_type, + run_mode) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + /* Prepare address mapping */ + if (setup_addr_mapping(result_p, addr_map_p, ioexp_map_p->chip_amount) < 0){ + goto err_create_ioexp_setup_attr_fail; + } + if (setup_i2c_client(result_p) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + /* Prepare call back functions of object */ + if (setup_ioexp_public_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + if (setup_ioexp_private_cb(result_p, ioexp_type) < 0){ + goto err_create_ioexp_setup_i2c_fail; + } + return result_p; + +err_create_ioexp_setup_i2c_fail: + i2c_curr_p = result_p->i2c_head_p; + i2c_next_p = result_p->i2c_head_p; + while (i2c_curr_p){ + i2c_next_p = i2c_curr_p->next; + if (i2c_curr_p->i2c_client_p) { + i2c_put_adapter(i2c_curr_p->i2c_client_p->adapter); + kfree(i2c_curr_p->i2c_client_p); + } + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } +err_create_ioexp_setup_attr_fail: + kfree(result_p); +err_create_ioexp_fail: + SWPS_ERR("%s: fail! :%d :%d \n", + __func__, ioexp_id, ioexp_type); + return NULL; +} + + +int +create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode){ + + struct ioexp_obj_s *ioexp_p = NULL; + + ioexp_p = _create_ioexp_obj(ioexp_id, ioexp_type, + addr_map_p, run_mode); + if (!ioexp_p){ + return -1; + } + if (ioexp_head_p == NULL){ + ioexp_head_p = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; + } + ioexp_tail_p->next = ioexp_p; + ioexp_tail_p = ioexp_p; + return 0; +} +EXPORT_SYMBOL(create_ioexp_obj); + + +static int +_init_ioexp_obj(struct ioexp_obj_s* self) { + + char *err_msg = "ERR"; + char *func_name = "_init_ioexp_obj"; + + /* Setup IOEXP configure byte */ + if (setup_ioexp_config(self) < 0){ + err_msg = "setup_ioexp_config fail"; + goto err_init_ioexp_obj; + } + /* Setup default data */ + if (_ioexp_init_handler(self) < 0){ + err_msg = "_ioexp_init_handler fail"; + goto err_init_ioexp_obj; + } + /* Update all */ + if (self->state == STATE_IOEXP_NORMAL){ + if (self->update_all(self, 1, func_name) < 0){ + err_msg = "update_all() fail"; + goto err_init_ioexp_obj; + } + } + return 0; + +err_init_ioexp_obj: + SWPS_DEBUG("%s: %s\n", __func__, err_msg); + return -1; +} + + +int +init_ioexp_objs(void){ + /* Return value: + * 0: Success + * -1: Detect topology error + * -2: SWPS internal error + */ + struct ioexp_obj_s *curr_p = ioexp_head_p; + + if (!curr_p) { + SWPS_ERR("%s: ioexp_head_p is NULL\n", __func__); + return -2; + } + while (curr_p) { + if (_init_ioexp_obj(curr_p) < 0) { + SWPS_DEBUG("%s: _init_ioexp_obj() fail\n", __func__); + return -1; + } + curr_p = curr_p->next; + } + SWPS_DEBUG("%s: done.\n", __func__); + return 0; +} +EXPORT_SYMBOL(init_ioexp_objs); + + +void +clean_ioexp_objs(void){ + + struct ioexp_i2c_s *i2c_curr_p = NULL; + struct ioexp_i2c_s *i2c_next_p = NULL; + struct ioexp_obj_s *ioexp_next_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + if (ioexp_head_p == NULL){ + ioexp_tail_p = NULL; + return; + } + while(ioexp_curr_p){ + ioexp_next_p = ioexp_curr_p->next; + if (ioexp_curr_p->ioexp_map_p) { + if (ioexp_curr_p->ioexp_map_p->map_addr) { + kfree(ioexp_curr_p->ioexp_map_p->map_addr); + } + kfree(ioexp_curr_p->ioexp_map_p); + } + + i2c_curr_p = ioexp_curr_p->i2c_head_p; + while (i2c_curr_p) { + i2c_next_p = i2c_curr_p->next; + if (i2c_curr_p->i2c_client_p) { + i2c_put_adapter(i2c_curr_p->i2c_client_p->adapter); + kfree(i2c_curr_p->i2c_client_p); + } + kfree(i2c_curr_p); + i2c_curr_p = i2c_next_p; + } + kfree(ioexp_curr_p); + ioexp_curr_p = ioexp_next_p; + } + ioexp_tail_p = NULL; + SWPS_DEBUG("%s: done.\n", __func__); +} +EXPORT_SYMBOL(clean_ioexp_objs); + + +int +check_ioexp_objs(void){ + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while (ioexp_curr_p){ + if ( (ioexp_curr_p->check(ioexp_curr_p)) < 0){ + SWPS_INFO("check IOEXP-%d fail! :%d\n", + ioexp_curr_p->ioexp_id, ioexp_curr_p->ioexp_type); + return -1; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} +EXPORT_SYMBOL(check_ioexp_objs); + + +struct ioexp_obj_s * +get_ioexp_obj(int ioexp_id){ + + struct ioexp_obj_s *result_p = NULL; + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + if (ioexp_curr_p->ioexp_id == ioexp_id){ + result_p = ioexp_curr_p; + break; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return result_p; +} +EXPORT_SYMBOL(get_ioexp_obj); + + +void +unlock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_unlock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } +} +EXPORT_SYMBOL(unlock_ioexp_all); + +int +lock_ioexp_all(void) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + + while(ioexp_curr_p){ + mutex_lock(&ioexp_curr_p->lock); + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; +} +EXPORT_SYMBOL(lock_ioexp_all); + + +int +check_channel_tier_1(void) { + + if ( (!_is_channel_ready(ioexp_head_p)) && + (!_is_channel_ready(ioexp_tail_p)) ){ + return -1; + } + return 0; +} +EXPORT_SYMBOL(check_channel_tier_1); + + +static int +_scan_channel_tier_1(int force, + int show_err) { + + struct ioexp_obj_s *ioexp_curr_p = ioexp_head_p; + int ready = 0; + + if (!ioexp_curr_p) { + goto err_scan_tier_1_channel; + } + while(ioexp_curr_p) { + ready = _is_channel_ready(ioexp_curr_p); + if ((!ready) && (!force)) { + goto err_scan_tier_1_channel; + } + ioexp_curr_p = ioexp_curr_p->next; + } + return 0; + +err_scan_tier_1_channel: + if (show_err) { + if (ioexp_curr_p) { + SWPS_INFO("%s: IOEXP-%d fail\n", __func__, ioexp_curr_p->ioexp_id); + } else { + SWPS_INFO("%s: IOEXP is null.\n", __func__); + } + } + return -1; +} + + +static int +_scan_channel_tier_1_single(void) { + + int ret = 0; + int chan_id = 0; + int fake_cid = 0; + int fake_offs = 0; + int fake_addr = 0; + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + + if (ioexp_head_p->ioexp_id != ioexp_tail_p->ioexp_id) { + return 0; + } + /* Setup i2c_client */ + chan_id = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chan_id; + fake_addr = ioexp_head_p->ioexp_map_p->map_addr[fake_cid].chip_addr; + adap = i2c_get_adapter((chan_id + 1)); + if(!adap){ + SWPS_INFO("%s: Can not get adap!\n", __func__); + return 0; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + SWPS_INFO("%s: Can not kzalloc client!\n", __func__); + return 0; + } + client->adapter = adap; + client->addr = fake_addr; + /* Fouce move ioexp ptr to next */ + ret = i2c_smbus_read_byte_data(client, fake_offs); + SWPS_DEBUG("%s: move ioexp_ptr done. :%d\n", __func__, ret); + kfree(client); + return 1; +} + + +int +resync_channel_tier_1(void) { + + char *emsg = "ERR"; + + if (!ioexp_head_p) { + emsg = "ioexp_head_p is NULL"; + goto err_resync_ioexp_status_1; + } + /* Run all */ + if (ioexp_head_p->ioexp_id == ioexp_tail_p->ioexp_id) { + _scan_channel_tier_1_single(); + } else { + _scan_channel_tier_1(1, 0); + } + /* Check all */ + if (_scan_channel_tier_1(0, 1) < 0) { + emsg = "resync tier-1 channel fail"; + goto err_resync_ioexp_status_1; + } + return 0; + +err_resync_ioexp_status_1: + SWPS_ERR("%s: %s\n", __func__, emsg); + return -1; +} +EXPORT_SYMBOL(resync_channel_tier_1); + + +/* For build single module using (Ex: ONL platform) */ +MODULE_LICENSE("GPL"); + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/io_expander.h b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/io_expander.h new file mode 100644 index 00000000000..6f9f7b46291 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/io_expander.h @@ -0,0 +1,189 @@ +#ifndef IO_EXPANDER_H +#define IO_EXPANDER_H + +#include + + +/* IOEXP type define (SFP series) */ +#define IOEXP_TYPE_MAGINOLIA_NAB (10101) +#define IOEXP_TYPE_MAGINOLIA_4AB (10102) +#define IOEXP_TYPE_MAPLE_NABC (10104) +#define IOEXP_TYPE_GULMOHAR_NABC (10105) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_NABC (10106) +#define IOEXP_TYPE_SFP_8P_LAYOUT_1 (10107) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_1ABC (10108) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_3ABC (10109) + +/* IOEXP type define (QSFP series) */ +#define IOEXP_TYPE_MAGINOLIA_7AB (10201) +#define IOEXP_TYPE_REDWOOD_P01P08 (10202) +#define IOEXP_TYPE_REDWOOD_P09P16 (10203) +#define IOEXP_TYPE_HUDSON32IGA_P01P08 (10204) +#define IOEXP_TYPE_HUDSON32IGA_P09P16 (10205) +#define IOEXP_TYPE_SPRUCE_7AB (10206) +#define IOEXP_TYPE_CYPRESS_7ABC (10207) +#define IOEXP_TYPE_TAHOE_5A (10208) +#define IOEXP_TYPE_TAHOE_6ABC (10209) +#define IOEXP_TYPE_SEQUOIA_NABC (10210) +#define IOEXP_TYPE_LAVENDER_P65 (10211) +#define IOEXP_TYPE_MAPLE_0ABC (10212) +#define IOEXP_TYPE_GULMOHAR_7ABC (10213) +#define IOEXP_TYPE_GULMOHAR_2T_EVT1_7ABC (10214) +#define IOEXP_TYPE_QSFP_6P_LAYOUT_1 (10215) + +/* CPLD type define */ +#define CPLD_TYPE_COTTONWOOD (10301) + +/* IOEXP mode define */ +#define IOEXP_MODE_POLLING (19000) +#define IOEXP_MODE_DIRECT (19001) + +/* IOEXP state define */ +#define STATE_IOEXP_NORMAL (0) +#define STATE_IOEXP_INIT (-1) +#define STATE_IOEXP_ABNORMAL (-2) + +/* IOEXP error code define */ +#define ERR_IOEXP_NOTSUPPORT (-100) +#define ERR_IOEXP_UNINIT (-101) +#define ERR_IOEXP_BADCONF (-102) +#define ERR_IOEXP_ABNORMAL (-103) +#define ERR_IOEXP_NOSTATE (-104) +#define ERR_IOEXP_BADINPUT (-105) +#define ERR_IOEXP_UNEXCPT (-199) + +#define SWPS_INFO(fmt, args...) printk( KERN_INFO "[SWPS] " fmt, ##args) +#define SWPS_WARN(fmt, args...) printk( KERN_WARNING "[SWPS] " fmt, ##args) +#define SWPS_ERR(fmt, args...) printk( KERN_ERR "[SWPS] " fmt, ##args) + +#ifdef DEBUG_SWPS +# define SWPS_DEBUG(fmt, args...) printk( KERN_DEBUG "[SWPS] " fmt, ##args) +#else +# define SWPS_DEBUG(fmt, args...) +#endif + + +struct ioexp_addr_s { + int chan_id; + int chip_addr; + int read_offset[8]; + int write_offset[8]; + int conf_offset[8]; + uint8_t data_default[8]; + uint8_t conf_default[8]; +}; + +struct ioexp_i2c_s { + int chip_id; + struct i2c_client *i2c_client_p; + struct ioexp_i2c_s *next; +}; + + +struct ioexp_bitmap_s { + int chip_id; /* IOEXP chip id */ + int ioexp_voffset; /* IOEXP virtual offset */ + int bit_shift; +}; + +struct ioexp_map_s { + int chip_amount; /* Number of chips that IOEXP object content */ + int data_width; /* Number of (Read/Write/Config) bytes */ + struct ioexp_addr_s *map_addr; /* Chip address info */ + struct ioexp_bitmap_s map_present[10]; /* IOEXP for SFP / QSFP */ + struct ioexp_bitmap_s map_tx_disable[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_tx_fault[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_rxlos[10]; /* IOEXP for SFP */ + struct ioexp_bitmap_s map_reset[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_lpmod[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_modsel[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs0[10]; /* IOEXP for QSFP */ + struct ioexp_bitmap_s map_hard_rs1[10]; /* IOEXP for QSFP */ +}; + +struct ioexp_data_s { + uint8_t data[8]; +}; + +struct ioexp_obj_s { + + /* ============================ + * Object public property + * ============================ + */ + int ioexp_id; + int ioexp_type; + + /* ============================ + * Object private property + * ============================ + */ + struct ioexp_data_s chip_data[16]; /* Max: 8-ioexp in one virt-ioexp(ioexp_obj) */ + struct ioexp_map_s *ioexp_map_p; + struct ioexp_obj_s *next; + struct ioexp_i2c_s *i2c_head_p; + struct mutex lock; + int mode; + int state; + + /* =========================================== + * Object public functions + * =========================================== + */ + int (*get_present)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_fault)(struct ioexp_obj_s *self, int virt_offset); + int (*get_rxlos)(struct ioexp_obj_s *self, int virt_offset); + int (*get_tx_disable)(struct ioexp_obj_s *self, int virt_offset); + int (*get_reset)(struct ioexp_obj_s *self, int virt_offset); + int (*get_lpmod)(struct ioexp_obj_s *self, int virt_offset); + int (*get_modsel)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs0)(struct ioexp_obj_s *self, int virt_offset); + int (*get_hard_rs1)(struct ioexp_obj_s *self, int virt_offset); + int (*set_tx_disable)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_reset)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_lpmod)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_modsel)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs0)(struct ioexp_obj_s *self, int virt_offset, int input_val); + int (*set_hard_rs1)(struct ioexp_obj_s *self, int virt_offset, int input_val); + + /* =========================================== + * Object private functions + * =========================================== + */ + int (*init)(struct ioexp_obj_s *self); + int (*check)(struct ioexp_obj_s *self); + int (*update_all)(struct ioexp_obj_s *self, int show_err, char *caller_name); + int (*fsm_4_direct)(struct ioexp_obj_s* self); + int (*fsm_4_polling)(struct ioexp_obj_s* self); +}; + + +struct ioexp_obj_s* get_ioexp_obj(int ioexp_id); +int create_ioexp_obj(int ioexp_id, + int ioexp_type, + struct ioexp_addr_s *addr_map_p, + int run_mode); +int init_ioexp_objs(void); +int check_ioexp_objs(void); +void clean_ioexp_objs(void); + +void unlock_ioexp_all(void); +int lock_ioexp_all(void); + +int check_channel_tier_1(void); +int resync_channel_tier_1(void); + +/* Macro for bit control */ +#define SWP_BIT_SET(byte_val,bit_shift) ((byte_val) |= (1<<(bit_shift))) +#define SWP_BIT_CLEAR(byte_val,bit_shift) ((byte_val) &= ~(1<<(bit_shift))) + + +#endif /* IO_EXPANDER_H */ + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/release_note b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/release_note new file mode 100644 index 00000000000..e6202bea9ad --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/release_note @@ -0,0 +1,25 @@ +Repository : onie +Branch : tao +machine_folder : machine/inventec/sequoia_bde + +Commit : f5ed9a6b5695e7ed8b42d833353ea6a62a5bb9fe +Date : 2019-05-31 + +inv_platform.c +inv_cpld.c +inv_psoc.c + +====================================================================== +Repository : swps-driver +Branch : master + +[swps] +version : 4.3.2 +Commit : de743435b452a7a2d34e8161587e2df54cac633a +Date : 2019-01-02 + +======================================================================= +[kernel driver 4.9.0.8-amd64 ] + +gpio-ich (original) +lpc_ich (modified) diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/transceiver.c b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/transceiver.c new file mode 100644 index 00000000000..27c45173eef --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/transceiver.c @@ -0,0 +1,8408 @@ +#include +#include +#include +#include +#include "io_expander.h" +#include "transceiver.h" + +/* For build single module using (Ex: ONL platform) */ +#include +//#include +//#include + +extern int io_no_init; +/* ========== Register EEPROM address mapping ========== + */ +struct eeprom_map_s eeprom_map_sfp = { + .addr_br =0x50, .page_br =-1, .offset_br =12, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =94, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =-1, .offset_connector =2, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =-1, .offset_diag_type =92 , .length_diag_type =1, + .addr_extbr =-1, .page_extbr =-1, .offset_extbr =-1, .length_extbr =-1, + .addr_ext_id =0x50, .page_ext_id =-1, .offset_ext_id =1, .length_ext_id =1, + .addr_id =0x50, .page_id =-1, .offset_id =0, .length_id =1, + .addr_len_sm =0x50, .page_len_sm =-1, .offset_len_sm =15, .length_len_sm =1, + .addr_len_smf =0x50, .page_len_smf =-1, .offset_len_smf =14, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =-1, .offset_len_om1 =17, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =-1, .offset_len_om2 =16, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =-1, .offset_len_om3 =19, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =-1, .offset_len_om4 =18, .length_len_om4 =1, + .addr_option =0x50, .page_option =-1, .offset_option =64, .length_option =2, + .addr_rate_id =0x50, .page_rate_id =-1, .offset_rate_id =13, .length_rate_id =1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =0x51, .page_rx_em =-1, .offset_rx_em =115, .length_rx_em =1, + .addr_rx_los =-1, .page_rx_los =-1, .offset_rx_los =-1, .length_rx_los =-1, + .addr_rx_power =0x51, .page_rx_power =-1, .offset_rx_power =104, .length_rx_power =2, + .addr_soft_rs0 =0x51, .page_soft_rs0 =-1, .offset_soft_rs0 =110, .length_soft_rs0 =1, + .addr_soft_rs1 =0x51, .page_soft_rs1 =-1, .offset_soft_rs1 =118, .length_soft_rs0 =1, + .addr_temp =0x51, .page_temp =-1, .offset_temp =96, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =-1, .offset_trancomp =3, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =-1, .offset_trancomp_ext =36, .length_trancomp_ext =1, + .addr_tx_bias =0x51, .page_tx_bias =-1, .offset_tx_bias =100, .length_tx_bias =2, + .addr_tx_disable =-1, .page_tx_disable =-1, .offset_tx_disable =-1, .length_tx_disable =-1, + .addr_tx_eq =0x51, .page_tx_eq =-1, .offset_tx_eq =114, .length_tx_eq =1, + .addr_tx_fault =-1, .page_tx_fault =-1, .offset_tx_fault =-1, .length_tx_fault =-1, + .addr_tx_power =0x51, .page_tx_power =-1, .offset_tx_power =102, .length_tx_power =2, + .addr_vendor_name =0x50, .page_vendor_name =-1, .offset_vendor_name =20, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =-1, .offset_vendor_pn =40, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =-1, .offset_vendor_rev =56, .length_vendor_rev =4, + .addr_vendor_sn =0x50, .page_vendor_sn =-1, .offset_vendor_sn =68, .length_vendor_sn =16, + .addr_voltage =0x51, .page_voltage =-1, .offset_voltage =98, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =-1, .offset_wavelength =60, .length_wavelength =2, +}; + +struct eeprom_map_s eeprom_map_qsfp = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =-1, .page_cdr =-1, .offset_cdr =-1, .length_cdr =-1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =-1, .page_rx_am =-1, .offset_rx_am =-1, .length_rx_am =-1, + .addr_rx_em =-1, .page_rx_em =-1, .offset_rx_em =-1, .length_rx_em =-1, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =-1, .page_tx_eq =-1, .offset_tx_eq =-1, .length_tx_eq =-1, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, +}; + +struct eeprom_map_s eeprom_map_qsfp28 = { + .addr_br =0x50, .page_br =0, .offset_br =140, .length_br =1, + .addr_cdr =0x50, .page_cdr =-1, .offset_cdr =98, .length_cdr =1, + .addr_comp_rev =0x50, .page_comp_rev =-1, .offset_comp_rev =1, .length_comp_rev =1, + .addr_connector =0x50, .page_connector =0, .offset_connector =130, .length_connector =1, + .addr_diag_type =0x50, .page_diag_type =0, .offset_diag_type =220, .length_diag_type =1, + .addr_extbr =0x50, .page_extbr =0, .offset_extbr =222, .length_extbr =1, + .addr_ext_id =0x50, .page_ext_id =0, .offset_ext_id =129, .length_ext_id =1, + .addr_id =0x50, .page_id =0, .offset_id =128, .length_id =1, + .addr_len_sm =-1, .page_len_sm =-1, .offset_len_sm =-1, .length_len_sm =-1, + .addr_len_smf =0x50, .page_len_smf =0, .offset_len_smf =142, .length_len_smf =1, + .addr_len_om1 =0x50, .page_len_om1 =0, .offset_len_om1 =145, .length_len_om1 =1, + .addr_len_om2 =0x50, .page_len_om2 =0, .offset_len_om2 =144, .length_len_om2 =1, + .addr_len_om3 =0x50, .page_len_om3 =0, .offset_len_om3 =143, .length_len_om3 =1, + .addr_len_om4 =0x50, .page_len_om4 =0, .offset_len_om4 =146, .length_len_om4 =1, + .addr_option =0x50, .page_option =0, .offset_option =193, .length_option =3, + .addr_rate_id =-1, .page_rate_id =-1, .offset_rate_id =-1, .length_rate_id =-1, + .addr_rx_am =0x50, .page_rx_am =3, .offset_rx_am =238, .length_rx_am =2, + .addr_rx_em =0x50, .page_rx_em =3, .offset_rx_em =236, .length_rx_em =2, + .addr_rx_los =0x50, .page_rx_los =-1, .offset_rx_los =3, .length_rx_los =1, + .addr_rx_power =0x50, .page_rx_power =-1, .offset_rx_power =34, .length_rx_power =8, + .addr_soft_rs0 =-1, .page_soft_rs0 =-1, .offset_soft_rs0 =-1, .length_soft_rs0 =-1, + .addr_soft_rs1 =-1, .page_soft_rs1 =-1, .offset_soft_rs1 =-1, .length_soft_rs0 =-1, + .addr_temp =0x50, .page_temp =-1, .offset_temp =22, .length_temp =2, + .addr_trancomp =0x50, .page_trancomp =0, .offset_trancomp =131, .length_trancomp =8, + .addr_trancomp_ext =0x50, .page_trancomp_ext =0, .offset_trancomp_ext =192, .length_trancomp_ext =1, + .addr_tx_bias =0x50, .page_tx_bias =-1, .offset_tx_bias =42, .length_tx_bias =8, + .addr_tx_disable =0x50, .page_tx_disable =-1, .offset_tx_disable =86, .length_tx_disable =1, + .addr_tx_eq =0x50, .page_tx_eq =3, .offset_tx_eq =234, .length_tx_eq =2, + .addr_tx_fault =0x50, .page_tx_fault =-1, .offset_tx_fault =4, .length_tx_fault =1, + .addr_tx_power =0x50, .page_tx_power =-1, .offset_tx_power =50, .length_tx_power =8, + .addr_vendor_name =0x50, .page_vendor_name =0, .offset_vendor_name =148, .length_vendor_name =16, + .addr_vendor_pn =0x50, .page_vendor_pn =0, .offset_vendor_pn =168, .length_vendor_pn =16, + .addr_vendor_rev =0x50, .page_vendor_rev =0, .offset_vendor_rev =184, .length_vendor_rev =2, + .addr_vendor_sn =0x50, .page_vendor_sn =0, .offset_vendor_sn =196, .length_vendor_sn =16, + .addr_voltage =0x50, .page_voltage =-1, .offset_voltage =26, .length_voltage =2, + .addr_wavelength =0x50, .page_wavelength =0, .offset_wavelength =186, .length_wavelength =2, +}; + + +/* ========== Utility Functions ========== + */ +static int +get_bit(uint8_t origin_byte, int bit_shift) { + return (int)((origin_byte >> bit_shift) & 0x1); +} + +static int +transform_word_to_int(uint8_t hight_byte, + uint8_t low_byte) { + return ((((int)hight_byte) << 8) + (int)low_byte); +} + +void +alarm_msg_2_user(struct transvr_obj_s *self, + char *emsg) { + + SWPS_ERR("%s on %s.\n", emsg, self->swp_name); +} +EXPORT_SYMBOL(alarm_msg_2_user); + +/* ========== Private functions ========== + */ +static int +_reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +reload_transvr_obj(struct transvr_obj_s *self,int new_type); + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self); + +static int +_transvr_init_handler(struct transvr_obj_s *self); + +int +_transvr_clean_handler(struct transvr_obj_s *self); + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self); + + +void +lock_transvr_obj(struct transvr_obj_s *self) { + + mutex_lock(&self->lock); + self->curr_page = VAL_TRANSVR_PAGE_FREE; +} +EXPORT_SYMBOL(lock_transvr_obj); + + +void +unlock_transvr_obj(struct transvr_obj_s *self) { + + self->curr_page = VAL_TRANSVR_PAGE_FREE; + mutex_unlock(&self->lock); +} +EXPORT_SYMBOL(unlock_transvr_obj); + + +static int +_check_by_mode(struct transvr_obj_s *self, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + char *caller_name){ + + int return_val = ERR_TRANSVR_UNEXCPT; + + switch (self->mode){ + case TRANSVR_MODE_POLLING: + switch (self->state){ + case STATE_TRANSVR_CONNECTED: + goto ok_check_by_mode_1; + case STATE_TRANSVR_NEW: + case STATE_TRANSVR_INIT: + return ERR_TRANSVR_UNINIT; + case STATE_TRANSVR_DISCONNECTED: + return ERR_TRANSVR_UNPLUGGED; + case STATE_TRANSVR_UNEXCEPTED: + return ERR_TRANSVR_ABNORMAL; + case STATE_TRANSVR_ISOLATED: + return ERR_TRNASVR_BE_ISOLATED; + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + + case TRANSVR_MODE_DIRECT: + return_val = self->fsm_4_direct(self, caller_name); + if (return_val < 0){ + return return_val; + } + goto ok_check_by_mode_1; + + default: + goto err_check_by_mode_1; + } + goto ok_check_by_mode_1; + +ok_check_by_mode_1: + return attr_update_func(self, 0); + +err_check_by_mode_1: + SWPS_INFO("_check_by_mode: mode:%d state:%d\n", self->mode, self->state); + return ERR_TRANSVR_UNEXCPT; +} + + +static void +_transvr_clean_retry(struct transvr_obj_s *self) { + self->retry = 0; +} + + +static int +_transvr_handle_retry(struct transvr_obj_s *self, int retry) { + /* Return: 0: keep retry + * -1: stop retry + */ + if (self->retry == 0) { + self->retry = retry; + } + self->retry -= 1; + if (self->retry <= 0) { + _transvr_clean_retry(self); + return -1; + } + return 0; +} + + +static int +_common_setup_page(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int show_e) { + /* return: + * 0 : OK + * -1 : EEPROM settings incorrect + * -2 : I2C R/W failure + * -3 : Undefined case + */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Check */ + if ((addr < 0) || (offset < 0) || (len < 0)) { + emsg = "EEPROM settings incorrect"; + retval = -1; + goto err_common_setup_page; + } + /* Case1: continue access */ + if ((self->i2c_client_p->addr == addr) && + (self->curr_page == page)) { + return 0; + } + self->i2c_client_p->addr = addr; + /* Case2: select lower page */ + if (page == -1) { + self->curr_page = page; + return 0; + } + /* Case3: select upper page */ + if (page >= 0) { + goto upper_common_setup_page; + } + /* Unexpected case */ + show_e = 1; + emsg = "Unexpected case"; + retval = -3; + goto err_common_setup_page; + +upper_common_setup_page: + if (i2c_smbus_write_byte_data(self->i2c_client_p, + VAL_TRANSVR_PAGE_SELECT_OFFSET, + page) < 0) { + emsg = "I2C R/W failure"; + retval = -2; + goto err_common_setup_page; + } + self->curr_page = page; + mdelay(VAL_TRANSVR_PAGE_SELECT_DELAY); + return 0; + +err_common_setup_page: + if (show_e) { + SWPS_INFO("%s: %s", __func__, emsg); + SWPS_INFO("%s: :0x%02x :%d :%d :%d\n", + __func__, addr, page, offset, len); + } + return retval; +} + +/* +static int +_common_setup_password(struct transvr_obj_s *self, + int addr, + int page, + int offs, + uint8_t pwd[4], + int show_e) { + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, 4, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_setup_password; + } + for (i=0; i<4; i++) { + err = i2c_smbus_write_byte_data(self->i2c_client_p, + (offs + i), + pwd[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_setup_password; + } + } + return 0; + +err_common_setup_password: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} +*/ + +static int +_common_update_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + uint8_t *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_uint8_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_uint8_attr; + } + buf[i] = err; + } + return 0; + +err_common_update_uint8_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_int_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + int *buf, + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_int_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_int_attr; + } + buf[i] = (int)err; + } + return 0; + +err_common_update_int_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = DEBUG_TRANSVR_INT_VAL; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_string_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + int len, + char buf[], + char *caller, + int show_e){ + + int i; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_update_string_attr; + } + for (i=0; ii2c_client_p, (offset + i)); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_update_string_attr; + } + buf[i] = (char)err; + } + return 0; + +err_common_update_string_attr: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + buf[0] = 'e'; + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_attr(struct transvr_obj_s *self, + int addr, + int page, + int offset, + uint8_t update, + uint8_t *buf, + char *caller, + int show_e){ + int len = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + if ((*buf) == update){ + return 0; + } + err = _common_setup_page(self, addr, page, offset, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + err = i2c_smbus_write_byte_data(self->i2c_client_p, + offset, + update); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + (*buf) = update; + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d\n", + __func__, emsg, caller, err); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_set_uint8_array(struct transvr_obj_s *self, + int addr, + int page, + int offs, + int len, + uint8_t update[], + uint8_t buf[], + char *caller, + int show_e){ + int i = 0; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + err = _common_setup_page(self, addr, page, offs, len, show_e); + if (err < 0){ + emsg = "setup EEPROM page fail"; + goto err_common_set_uint8_attr_1; + } + for (i=0; ii2c_client_p, + (offs + i), + update[i]); + if (err < 0){ + emsg = "I2C R/W fail!"; + goto err_common_set_uint8_attr_1; + } + buf[i] = update[i]; + } + return 0; + +err_common_set_uint8_attr_1: + if (show_e) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, emsg, caller, err, i); + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +static int +_common_update_attr_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_id, + self->eeprom_map_p->page_id, + self->eeprom_map_p->offset_id, + self->eeprom_map_p->length_id, + &(self->id), + "_common_update_attr_id", + show_err); +} + + +static int +_common_update_attr_extended_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_ext_id, + self->eeprom_map_p->page_ext_id, + self->eeprom_map_p->offset_ext_id, + self->eeprom_map_p->length_ext_id, + &(self->ext_id), + "_common_update_attr_extended_id", + show_err); +} + + +static int +_common_update_attr_connector(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_connector, + self->eeprom_map_p->page_connector, + self->eeprom_map_p->offset_connector, + self->eeprom_map_p->length_connector, + &(self->connector), + "_common_update_attr_connector", + show_err); +} + + +static int +_common_update_attr_transvr_comp(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp, + self->eeprom_map_p->page_trancomp, + self->eeprom_map_p->offset_trancomp, + self->eeprom_map_p->length_trancomp, + self->transvr_comp, + "_common_update_attr_transvr_comp", + show_err); +} + + +static int +_common_update_attr_transvr_comp_ext(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_trancomp_ext, + self->eeprom_map_p->page_trancomp_ext, + self->eeprom_map_p->offset_trancomp_ext, + self->eeprom_map_p->length_trancomp_ext, + &(self->transvr_comp_ext), + "_common_update_attr_transvr_comp_ext", + show_err); +} + + +static int +_common_update_attr_vendor_name(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_name, + self->eeprom_map_p->page_vendor_name, + self->eeprom_map_p->offset_vendor_name, + self->eeprom_map_p->length_vendor_name, + self->vendor_name, + "_common_update_attr_vendor_name", + show_err); +} + + +static int +_common_update_attr_vendor_pn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_pn, + self->eeprom_map_p->page_vendor_pn, + self->eeprom_map_p->offset_vendor_pn, + self->eeprom_map_p->length_vendor_pn, + self->vendor_pn, + "_common_update_attr_vendor_pn", + show_err); +} + + +static int +_common_update_attr_vendor_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_rev, + self->eeprom_map_p->page_vendor_rev, + self->eeprom_map_p->offset_vendor_rev, + self->eeprom_map_p->length_vendor_rev, + self->vendor_rev, + "_common_update_attr_vendor_rev", + show_err); +} + + +static int +_common_update_attr_vendor_sn(struct transvr_obj_s *self, + int show_err){ + return _common_update_string_attr(self, + self->eeprom_map_p->addr_vendor_sn, + self->eeprom_map_p->page_vendor_sn, + self->eeprom_map_p->offset_vendor_sn, + self->eeprom_map_p->length_vendor_sn, + self->vendor_sn, + "_common_update_attr_vendor_sn", + show_err); +} + + +static int +_common_update_attr_br(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_br, + self->eeprom_map_p->page_br, + self->eeprom_map_p->offset_br, + self->eeprom_map_p->length_br, + &(self->br), + "_common_update_attr_br", + show_err); +} + + +static int +_common_update_attr_len_smf(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_smf, + self->eeprom_map_p->page_len_smf, + self->eeprom_map_p->offset_len_smf, + self->eeprom_map_p->length_len_smf, + &(self->len_smf), + "_common_update_attr_len_smf", + show_err); +} + + +static int +_common_update_attr_len_om1(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om1, + self->eeprom_map_p->page_len_om1, + self->eeprom_map_p->offset_len_om1, + self->eeprom_map_p->length_len_om1, + &(self->len_om1), + "_common_update_attr_len_om1", + show_err); +} + +static int +_common_update_attr_len_om2(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om2, + self->eeprom_map_p->page_len_om2, + self->eeprom_map_p->offset_len_om2, + self->eeprom_map_p->length_len_om2, + &(self->len_om2), + "_common_update_attr_len_om2", + show_err); +} + +static int +_common_update_attr_len_om3(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om3, + self->eeprom_map_p->page_len_om3, + self->eeprom_map_p->offset_len_om3, + self->eeprom_map_p->length_len_om3, + &(self->len_om3), + "_common_update_attr_len_om3", + show_err); +} + + +static int +_common_update_attr_len_om4(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_om4, + self->eeprom_map_p->page_len_om4, + self->eeprom_map_p->offset_len_om4, + self->eeprom_map_p->length_len_om4, + &(self->len_om4), + "_common_update_attr_len_om4", + show_err); +} + + +static int +_common_update_attr_option(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_option, + self->eeprom_map_p->page_option, + self->eeprom_map_p->offset_option, + self->eeprom_map_p->length_option, + self->option, + "_common_update_attr_option", + show_err); +} + + +static int +_common_update_attr_comp_rev(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_comp_rev, + self->eeprom_map_p->page_comp_rev, + self->eeprom_map_p->offset_comp_rev, + self->eeprom_map_p->length_comp_rev, + &(self->comp_rev), + "_common_update_attr_comp_rev", + show_err); +} + + +static int +_common_update_attr_diag_type(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_diag_type, + self->eeprom_map_p->page_diag_type, + self->eeprom_map_p->offset_diag_type, + self->eeprom_map_p->length_diag_type, + &(self->diag_type), + "_common_update_attr_diag_type", + show_err); +} + + +static int +_common_update_attr_wavelength(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_wavelength, + self->eeprom_map_p->page_wavelength, + self->eeprom_map_p->offset_wavelength, + self->eeprom_map_p->length_wavelength, + self->wavelength, + "_common_update_attr_wavelength", + show_err); +} + + +int +_common_get_option_value(struct transvr_obj_s *self, + int offset, + int bit_shift) { + /* SFP: + * - option[0] = A0h / 64 + * - option[1] = A0h / 65 + * QSFP: + * - option[0] = 00h / 193 + * - option[1] = 00h / 194 + * - option[2] = 00h / 195 + */ + return (self->option[offset] & (1 << bit_shift)); +} + + +static int +_sfp_update_attr_len_sm(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_len_sm, + self->eeprom_map_p->page_len_sm, + self->eeprom_map_p->offset_len_sm, + self->eeprom_map_p->length_len_sm, + &(self->len_sm), + "_common_update_attr_len_sm", + show_err); +} + + +static int +_sfp_update_attr_rate_id(struct transvr_obj_s *self, + int show_err){ + return _common_update_int_attr(self, + self->eeprom_map_p->addr_rate_id, + self->eeprom_map_p->page_rate_id, + self->eeprom_map_p->offset_rate_id, + self->eeprom_map_p->length_rate_id, + &(self->rate_id), + "_sfp_update_attr_rate_id", + show_err); +} + + +static int +_sfp_update_attr_soft_rs0(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + self->eeprom_map_p->length_soft_rs0, + &(self->soft_rs0), + "_sfp_update_attr_soft_rs0", + show_err); +} + + +static int +_sfp_update_attr_soft_rs1(struct transvr_obj_s *self, + int show_err){ + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + self->eeprom_map_p->length_soft_rs1, + &(self->soft_rs1), + "_sfp_update_attr_soft_rs1", + show_err); +} + + +int +_sfp_is_diag_support(struct transvr_obj_s *self){ + + uint8_t bit_mask = 0xC0; /* 1100 0000 */ + uint8_t en_val = 0x40; /* 0100 0000 */ + uint8_t checkval = (self->diag_type & bit_mask); + + if (checkval == en_val) { + return 1; + } + return 0; +} + + +static int +_sfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_sfp_update_attr_curr_temp", + show_err); +} + + +static int +_sfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_sfp_update_attr_curr_voltage", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_sfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_sfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_sfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_sfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + + if (!(_sfp_is_diag_support(self))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_sfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_sfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_sfp_update_attr_rx_em", + show_err); +} + + +static int +_sfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_sfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_cdr(struct transvr_obj_s *self, + int show_err){ + if (self->type != TRANSVR_TYPE_QSFP_28){ + self->cdr = DEBUG_TRANSVR_HEX_VAL; + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + self->eeprom_map_p->length_cdr, + &(self->cdr), + "_common_update_attr_cdr", + show_err); +} + + +static int +_qsfg_update_attr_extbr(struct transvr_obj_s *self, + int show_err) { + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_extbr, + self->eeprom_map_p->page_extbr, + self->eeprom_map_p->offset_extbr, + self->eeprom_map_p->length_extbr, + &(self->extbr), + "_common_update_attr_extbr", + show_err); +} + + +static int +_qsfp_is_diag_support(struct transvr_obj_s *self, + int diag_type) { + /* Input Parm: diag_type + * => 1 : temperature + * => 2 : voltage + * => 3 : tx relate + * => 4 : rx relate + */ + uint8_t mask_b2 = 0x04; /* 0000 0100 */ + uint8_t mask_b3 = 0x08; /* 0000 1000 */ + + switch (diag_type) { + case 1: /* temperature */ + case 2: /* voltage */ + /* Direct access target, because of spec not defined */ + return 1; + case 3: + case 4: + /* [Note] + * Due to lot of transceiver vendor defined it not rigorously and + * consider of general support, we seem it as supported if there + * are bit-2 OR bit-3 defined by transceiver vendor. + */ + if ( ((self->diag_type & mask_b2) == mask_b2 ) || + ((self->diag_type & mask_b3) == mask_b3 ) ){ + return 1; + } + return 0; + default: + SWPS_INFO("%s: undefined diag_type:%d\n", + __func__, diag_type); + break; + } + return 0; +} + + +int +_qsfp_is_implement_tx_disable(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-4 + */ + int byte = 2; + int bit = 4; + return _common_get_option_value(self, byte, bit); +} + + +int +_qsfp_is_implement_tx_fault(struct transvr_obj_s *self) { + /* + * 00h / Byte-195 / Bit-3 + */ + int byte = 2; + int bit = 3; + return _common_get_option_value(self, byte, bit); +} + + +static int +_qsfp_update_attr_curr_temp(struct transvr_obj_s *self, + int show_err){ + int diag_type = 1; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_temp, + self->eeprom_map_p->page_temp, + self->eeprom_map_p->offset_temp, + self->eeprom_map_p->length_temp, + self->curr_temp, + "_qsfp_update_attr_curr_temp", + show_err); +} + + +static int +_qsfp_update_attr_curr_voltage(struct transvr_obj_s *self, + int show_err){ + int diag_type = 2; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_voltage, + self->eeprom_map_p->page_voltage, + self->eeprom_map_p->offset_voltage, + self->eeprom_map_p->length_voltage, + self->curr_voltage, + "_qsfp_update_attr_curr_voltage", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_bias(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_bias, + self->eeprom_map_p->page_tx_bias, + self->eeprom_map_p->offset_tx_bias, + self->eeprom_map_p->length_tx_bias, + self->curr_tx_bias, + "_qsfp_update_attr_curr_tx_bias", + show_err); +} + + +static int +_qsfp_update_attr_curr_tx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 3; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_power, + self->eeprom_map_p->page_tx_power, + self->eeprom_map_p->offset_tx_power, + self->eeprom_map_p->length_tx_power, + self->curr_tx_power, + "_qsfp_update_attr_curr_tx_power", + show_err); +} + + +static int +_qsfp_update_attr_curr_rx_power(struct transvr_obj_s *self, + int show_err){ + int diag_type = 4; + + if (!(_qsfp_is_diag_support(self, diag_type))) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_power, + self->eeprom_map_p->page_rx_power, + self->eeprom_map_p->offset_rx_power, + self->eeprom_map_p->length_rx_power, + self->curr_rx_power, + "_qsfp_update_attr_curr_rx_power", + show_err); +} + + +static int +_qsfp_update_attr_soft_rx_los(struct transvr_obj_s *self, + int show_err){ + + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_los, + self->eeprom_map_p->page_rx_los, + self->eeprom_map_p->offset_rx_los, + self->eeprom_map_p->length_rx_los, + &(self->rx_los), + "_qsfp_update_attr_soft_rx_los", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_disable(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_disable(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_update_attr_soft_tx_disable", + show_err); +} + + +static int +_qsfp_update_attr_soft_tx_fault(struct transvr_obj_s *self, + int show_err){ + + if (!_qsfp_is_implement_tx_fault(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_fault, + self->eeprom_map_p->page_tx_fault, + self->eeprom_map_p->offset_tx_fault, + self->eeprom_map_p->length_tx_fault, + &(self->tx_fault), + "_qsfp_update_attr_soft_tx_fault", + show_err); +} + + +static int +_qsfp_update_attr_tx_eq(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + self->tx_eq, + "_qsfp_update_attr_tx_eq", + show_err); +} + + +static int +_qsfp_update_attr_rx_am(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + self->rx_am, + "_qsfp_update_attr_rx_am", + show_err); +} + + +static int +_qsfp_update_attr_rx_em(struct transvr_obj_s *self, + int show_err){ + + if (!_is_transvr_support_ctle(self)) { + return ERR_TRANSVR_NOTSUPPORT; + } + return _common_update_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + self->rx_em, + "_qsfp_update_attr_rx_em", + show_err); +} + + +int +_common_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = "err"; + + if (_common_update_attr_id(self, show_err) < 0) { + err_str = "_common_update_attr_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_extended_id(self, show_err) < 0) { + err_str = "_common_update_attr_extended_id"; + goto err_common_update_attr_all; + } + if (_common_update_attr_connector(self, show_err) < 0) { + err_str = "_common_update_attr_connector"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp"; + goto err_common_update_attr_all; + } + if (_common_update_attr_transvr_comp_ext(self, show_err) < 0) { + err_str = "_common_update_attr_transvr_comp_ext"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_name(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_name"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_pn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_pn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_rev(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_vendor_sn(self, show_err) < 0) { + err_str = "_common_update_attr_vendor_sn"; + goto err_common_update_attr_all; + } + if (_common_update_attr_br(self, show_err) < 0) { + err_str = "_common_update_attr_br"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_smf(self, show_err) < 0) { + err_str = "_common_update_attr_len_smf"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om1(self, show_err) < 0) { + err_str = "_common_update_attr_len_om1"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om2(self, show_err) < 0) { + err_str = "_common_update_attr_len_om2"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om3(self, show_err) < 0) { + err_str = "_common_update_attr_len_om3"; + goto err_common_update_attr_all; + } + if (_common_update_attr_len_om4(self, show_err) < 0) { + err_str = "_common_update_attr_len_om4"; + goto err_common_update_attr_all; + } + if (_common_update_attr_option(self, show_err) < 0) { + err_str = "_common_update_attr_option"; + goto err_common_update_attr_all; + } + if (_common_update_attr_comp_rev(self, show_err) < 0) { + err_str = "_common_update_attr_comp_rev"; + goto err_common_update_attr_all; + } + if (_common_update_attr_diag_type(self, show_err) < 0) { + err_str = "_common_update_attr_diag_type"; + goto err_common_update_attr_all; + } + if (_common_update_attr_wavelength(self, show_err) < 0) { + err_str = "_common_update_attr_wavelength"; + goto err_common_update_attr_all; + } + return 0; + +err_common_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_sfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_len_sm(self, show_err) < 0) { + err_str = "_sfp_update_attr_len_sm"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_rate_id(self, show_err) < 0) { + err_str = "_sfp_update_attr_rate_id"; + goto err_sfp_update_attr_all; + } + if ((self->rate_id) > 0) { + if (_sfp_update_attr_soft_rs0(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs0"; + goto err_sfp_update_attr_all; + } + if (_sfp_update_attr_soft_rs1(self, show_err) < 0) { + err_str = "_sfp_update_attr_soft_rs1"; + goto err_sfp_update_attr_all; + } + } + return 0; + +err_sfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +int +_qsfp_update_attr_all(struct transvr_obj_s *self, + int show_err){ + + char *err_str = DEBUG_TRANSVR_STR_VAL; + + if (_common_update_attr_all(self, show_err) < 0){ + err_str = "_common_update_attr_all"; + goto err_qsfp_update_attr_all; + } + if (_qsfg_update_attr_extbr(self, show_err) < 0) { + err_str = "_qsfg_update_attr_extbr"; + goto err_qsfp_update_attr_all; + } + if (self->type == TRANSVR_TYPE_QSFP_28) { + if (_qsfp_update_attr_cdr(self, 1) < 0) { + err_str = "_qsfp_update_attr_cdr"; + goto err_qsfp_update_attr_all; + } + } + return 0; + +err_qsfp_update_attr_all: + if (show_err){ + SWPS_INFO("%s: fail at:%s :%s\n", __func__, err_str, self->swp_name); + } + return -1; +} + + +/* ========== Object functions for common type ========== + */ +int +_common_count_temp(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + int sign = 0; + int high = 0; + int low = 0; + int lmax = 8; + + /* Count high */ + sign = get_bit(high_byte,7); + SWP_BIT_CLEAR(high_byte, 7); + high = (int)high_byte; + if (sign == 1) { + high = 0 - high; + } + /* Count low */ + low = (get_bit(low_byte, 7) * 500); + low += (get_bit(low_byte, 6) * 250); + low += (get_bit(low_byte, 5) * 125); + low += (get_bit(low_byte, 4) * 62); + low = (low / 100); + /* Integrate High and Low */ + return snprintf(buf_p, lmax, "%d.%d\n", high, low); +} + + +int +_common_count_voltage(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note]: + * Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts. Practical + * considerations to be defined by transceiver manufacturer will + * tend to limit the actual bounds of the supply voltage measurement. + * Accuracy is vendor specific but must be better than 3% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. Note that in some transceivers, transmitter supply + * voltage and receiver supply voltage are isolated. In that case, + * only one supply is monitored. Refer to the device specification + * for more detail. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 100 uV (1mV=1000uV) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 Volt */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_tx_bias(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 2 uA (1mA=1000uA) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total*2) / 1000); + val_f = (((total*2) - (val_i*1000)) / 100); + /* Return Unit: 1 mA */ + return snprintf(buf_p, lmax, "%d.%01d\n", val_i, val_f); +} + + +int +_common_count_tx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_rx_power(uint8_t high_byte, + uint8_t low_byte, + char *buf_p) { + /* [Note] + * Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + int total = 0; + int lmax = 8; + int val_i = 0; + int val_f = 0; + /* unit: 0.1 uW (1mW=1000uW) */ + total = transform_word_to_int(high_byte, low_byte); + val_i = ((total/10) / 1000); + val_f = ((total/10) - (val_i*1000)); + /* Return Unit: 1 mW */ + return snprintf(buf_p, lmax, "%d.%03d\n", val_i, val_f); +} + + +int +_common_count_wavelength(struct transvr_obj_s *self, + uint8_t high_byte, + uint8_t low_byte) { + /* [Note] + * SFP : uint 1 um. + * QSFP: unit 0.05 um. + */ + int total = 0; + + total = transform_word_to_int(high_byte, low_byte); + switch (self->type) { + case TRANSVR_TYPE_SFP: + return total; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + return (total/20); + + default: + break; + } + return ERR_TRANSVR_UNDEFINED; +} + + +int +common_get_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_id, + "common_get_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->id; +} + + +int +common_get_ext_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "common_get_ext_id"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->ext_id; +} + + +int +common_get_connector(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_connector, + "common_get_connector"); + if (err_code < 0){ + return err_code; + } + /* Transform to INT to show error case */ + return (int)self->connector; +} + + +int +common_get_vendor_name(struct transvr_obj_s *self, char *buf){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_name, + "common_get_vendor_name"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_name); +} + + +int +common_get_vendor_pn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_pn, + "common_get_vendor_pn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_pn); +} + + +int +common_get_vendor_rev(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_rev, + "common_get_vendor_rev"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_rev); +} + + +int +common_get_vendor_sn(struct transvr_obj_s *self, char *buf) { + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); + } + err = _check_by_mode(self, + &_common_update_attr_vendor_sn, + "common_get_vendor_sn"); + memset(buf, 0, LEN_TRANSVR_M_STR); + if (err < 0){ + return snprintf(buf, LEN_TRANSVR_M_STR, "%d\n", err); + } + return snprintf(buf, LEN_TRANSVR_M_STR, "%s\n", self->vendor_sn); +} + + +int +common_get_br(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return (int)self->br; + } + err = _check_by_mode(self, + &_common_update_attr_br, + "common_get_br"); + if (err < 0){ + return err; + } + /* Transform to INT to show error case */ + return (int)self->br; +} + + +int +common_get_len_smf(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_smf; + } + err = _check_by_mode(self, + &_common_update_attr_len_smf, + "common_get_len_smf"); + if (err < 0){ + return err; + } + return self->len_smf; +} + + +int +common_get_len_om1(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om1; + } + err = _check_by_mode(self, + &_common_update_attr_len_om1, + "common_get_len_om1"); + if (err < 0){ + return err; + } + return self->len_om1; +} + + +int +common_get_len_om2(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om2; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om2, + "common_get_len_om2"); + if (err < 0){ + return err; + } + return self->len_om2; +} + + +int +common_get_len_om3(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om3; + } + + err = _check_by_mode(self, + &_common_update_attr_len_om3, + "common_get_len_om3"); + if (err < 0){ + return err; + } + return self->len_om3; +} + + +int +common_get_len_om4(struct transvr_obj_s *self){ + + int err = DEBUG_TRANSVR_INT_VAL; + + if (self->state == STATE_TRANSVR_CONNECTED && + self->mode == TRANSVR_MODE_POLLING && + TRANSVR_INFO_CACHE_ENABLE) { + return self->len_om4; + } + err = _check_by_mode(self, + &_common_update_attr_len_om4, + "common_get_len_om4"); + if (err < 0){ + return err; + } + return self->len_om4; +} + + +int +common_get_comp_extended(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp_ext, + "common_get_comp_extended"); + if (err_code < 0){ + return err_code; + } + return self->transvr_comp_ext; +} + + +int +common_get_comp_rev(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_comp_rev, + "common_get_comp_rev"); + if (err_code < 0){ + return err_code; + } + return self->comp_rev; +} + + +int +common_get_info(struct transvr_obj_s *self){ + + if (self->state != STATE_TRANSVR_CONNECTED) { + return self->state; + } + return self->info; +} + + +int +_common_get_if_lane(struct transvr_obj_s *self, + char *result){ + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_M_STR); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + memset(tmp_str, 0, LEN_TRANSVR_M_STR); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_M_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_M_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_M_STR); + } + if (i == 0) { + return EVENT_TRANSVR_TASK_FAIL; + } + return 0; +} + + +int +common_get_if_lane(struct transvr_obj_s *self, + char *buf_p){ + + char tmp_str[LEN_TRANSVR_M_STR] = DEBUG_TRANSVR_STR_VAL; + + if (self->ioexp_obj_p->state != STATE_IOEXP_NORMAL) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n", ERR_TRANSVR_ABNORMAL); + } + if (_common_get_if_lane(self, tmp_str) < 0) { + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%d\n" ,ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, LEN_TRANSVR_M_STR, "%s\n" ,tmp_str); +} + + +int +sfp_get_len_sm(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_len_sm, + "sfp_get_len_sm"); + if (err_code < 0){ + return err_code; + } + return self->len_sm; +} + + +int +sfp_get_rate_id(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_sfp_update_attr_rate_id, + "sfp_get_rate_id"); + if (err_code < 0){ + return err_code; + } + return self->rate_id; +} + + +int +sfp_get_soft_rs0(struct transvr_obj_s *self){ + /* Note: + * SFP Soft Rate_Select Select [aka. "RS(0)"] address + * A2h, offset: 110, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs0, + "sfp_get_soft_rs0"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs0 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_soft_rs1(struct transvr_obj_s *self){ + /* Note: + * SFP Soft RS(1) Select address + * A2h, offset: 118, bit 3 (begin form 0) + */ + int err_code = DEBUG_TRANSVR_INT_VAL; + int bit_shift = 3; + uint8_t result = 0x00; + uint8_t bitmask = (1 << bit_shift); + + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + return ERR_TRANSVR_NOTSUPPORT; + } + /* Update and check */ + err_code = _check_by_mode(self, + &_sfp_update_attr_soft_rs1, + "sfp_get_soft_rs1"); + if (err_code <0){ + return err_code; + } + result = (self->soft_rs1 & bitmask); + if (result == bitmask) { + return 1; + } + if (result == 0) { + return 0; + } + return ERR_TRANSVR_UNEXCPT; +} + + +int +sfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_temp, + "sfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +sfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_voltage, + "sfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +sfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_bias, + "sfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _common_count_tx_bias(self->curr_tx_bias[0], + self->curr_tx_bias[1], + buf_p); +} + + +int +sfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_tx_power, + "sfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_tx_power(self->curr_tx_power[0], + self->curr_tx_power[1], + buf_p); +} + + +int +sfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_sfp_update_attr_curr_rx_power, + "sfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _common_count_rx_power(self->curr_rx_power[0], + self->curr_rx_power[0], + buf_p); +} + + +int +sfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->rx_em[0]); +} + + +int +sfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x\n", self->tx_eq[0]); +} + + +int +_sfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: A0h / 36 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +__sfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* SFP Specification Compliance: A0h / 3-10 + * transvr_comp[0-7] = 3 - 10 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_get_comp_10g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[0] = address A0h / 3 + * + * 3 7: 10G Base-ER + * 3 6: 10GBASE-LRM + * 3 5: 10GBASE-LR + * 3 4: 10GBASE-SR + */ + int bitmask = 0xf0; /* 11110000 */ + return (__sfp_get_comp_attr(self, 0) & bitmask); +} + + +int +_sfp_get_comp_1g_eth_comp(struct transvr_obj_s *self) { + /* transvr_comp[3] = address A0h / 6 + * + * 6 7: BASE-PX *3 + * 6 6: BASE-BX10 *3 + * 6 5: 100BASE-FX + * 6 4: 100BASE-LX/LX10 + * 6 3: 1000BASE-T + * 6 2: 1000BASE-CX + * 6 1: 1000BASE-LX *3 + * 6 0: 1000BASE-SX + */ + return __sfp_get_comp_attr(self, 3); +} + + +int +_sfp_get_cable_tech(struct transvr_obj_s *self) { + /* transvr_comp[5] = address A0h / 8 + * + * 8 3: Active Cable *8 + * 8 2: Passive Cable *8 + */ + int bitmask = 0x0c; /* 00001100 */ + return (__sfp_get_comp_attr(self, 5) & bitmask); +} + + +int +sfp_get_comp_eth_1(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_1"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_1g_eth_comp(self); +} + + +int +sfp_get_comp_eth_10(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "sfp_get_comp_eth_10"); + if (err_code < 0){ + return err_code; + } + return _sfp_get_comp_10g_eth_comp(self); +} + + +int +_sfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: A0h / 2 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Note] Optical and Cable Variants Specification Compliance (SFF-8472) + * [Addr] A0h, Bytes 60-61 + * [Note] For optical variants, as defined by having zero's in A0h Byte 8 + * bits 2 and 3, Bytes 60 and 61 denote nominal transmitter output + * wavelength at room temperature. 16 bit value with byte 60 as high + * order byte and byte 61 as low order byte. The laser wavelength is + * equal to the 16 bit integer value in nm. This field allows the user + * to read the laser wavelength directly, so it is not necessary to + * infer it from the Transceiver Codes A0h Bytes 3 to 10 (see Table + * 5-3). This also allows specification of wavelengths not covered + * in the Transceiver Codes, such as those used in coarse WDM systems. + * + * For passive and active cable variants, a value of 00h for both A0h + * Byte 60 and Byte 61 denotes laser wavelength or cable specification + * compliance is unspecified. + */ + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +int +sfp_get_1g_rj45_extphy_offset(struct transvr_obj_s *self, char *buf) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%02x\n", self->extphy_offset); +} + + +int +sfp_get_1g_rj45_extphy_reg(struct transvr_obj_s *self, char *buf) { + + int i = 0; + int ret = 0; + int retry = 3; + int delay = 200; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; ii2c_client_p, self->extphy_offset); + if (ret >=0) { + goto ok_sfp_get_1g_rj45_extphy_reg; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; + +ok_sfp_get_1g_rj45_extphy_reg: + ret = ((ret & 0x00ff) << 8) | ((ret & 0xff00) >> 8); + return snprintf(buf, LEN_TRANSVR_S_STR, "0x%04x\n", ret); +} + + +int +__qsfp_get_power_cls(struct transvr_obj_s *self, + int direct_access){ + + int err_code; + uint8_t detect_val; + + /* Detect and Update power class attribute */ + if (direct_access){ + err_code = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_power_cls"); + } else { + err_code = self->ext_id; + } + if (err_code <0){ + return err_code; + } + if (err_code == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data */ + detect_val = self->ext_id; + SWP_BIT_CLEAR(detect_val, 2); /* Bit2: CDR RX present */ + SWP_BIT_CLEAR(detect_val, 3); /* Bit3: CDR TX present */ + SWP_BIT_CLEAR(detect_val, 4); /* Bit4: CLEI present */ + SWP_BIT_CLEAR(detect_val, 5); /* Bit5: reserved */ + /* Identify power class */ + switch (detect_val) { + case 0: /* Class_1: 00000000 */ + return 1; + case 64: /* Class_2: 01000000 */ + return 2; + case 128: /* Class_3: 10000000 */ + return 3; + case 192: /* Class_4: 11000000 */ + return 4; + case 1: /* Class_5: 00000001 */ + case 193: /* Class_5: 11000001 */ + return 5; + case 2: /* Class_6: 00000010 */ + case 194: /* Class_6: 11000010 */ + return 6; + case 3: /* Class_7: 00000011 */ + case 195: /* Class_7: 11000011 */ + return 7; + default: + break; + } + SWPS_INFO("%s: Detect undefined power class:%d\n", __func__, detect_val); + return ERR_TRANSVR_UNDEFINED; +} + + +int +qsfp_get_power_cls(struct transvr_obj_s *self) { + return __qsfp_get_power_cls(self, 1); +} + + +int +__qsfp_get_cdr_present(struct transvr_obj_s *self, + int direct_access){ + + int retval; + int BIT_SHIFT = 2; + int BIT_MASK = 0x3; + + /* Detect and Update power class attribute */ + if (direct_access) { + retval = _check_by_mode(self, + &_common_update_attr_extended_id, + "__qsfp_get_cdr_present"); + if (retval < 0){ + return retval; + } + } + retval = self->ext_id; + if (retval == DEBUG_TRANSVR_HEX_VAL){ + return ERR_TRANSVR_UPDATE_FAIL; + } + /* Clean data and return */ + return (int)(retval >> BIT_SHIFT & BIT_MASK); +} + + +int +qsfp_get_cdr_present(struct transvr_obj_s *self) { + return __qsfp_get_cdr_present(self, 1); +} + + +int +qsfp_get_cdr(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + "qsfp_get_cdr"); + if (err_code <0){ + return err_code; + } + + return self->cdr; +} + + +int +__qsfp_get_comp_attr(struct transvr_obj_s *self, + int array_offset) { + /* QSFP Specification Compliance: 00h / 131-138 + * transvr_comp[0-7] = 131 - 138 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp[array_offset]); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_get_comp_10_40_100_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[0] = address 00h / 131 + * + * 131 7: Extended: See section 6.3.23. The Extended Specification Compliance + * Codes are maintained in the Transceiver Management section of SFF- + * 8024. + * 131 6: 10GBASE-LRM + * 131 5: 10GBASE-LR + * 131 4: 10GBASE-SR + * 131 3: 40GBASE-CR4 + * 131 2: 40GBASE-SR4 + * 131 1: 40GBASE-LR4 + * 131 0: 40G Active Cable (XLPPI) + */ + return __qsfp_get_comp_attr(self, 0); +} + + +int +_qsfp_get_comp_sonet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 132 7-3: Reserved + * 132 2: OC 48, long reach + * 132 1: OC 48, intermediate reach + * 132 0: OC 48 short reach + */ + return __qsfp_get_comp_attr(self, 1); +} + + +int +_qsfp_get_comp_sas_sata(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 133 7: SAS 24.0 Gb/s + * 133 6: SAS 12.0 Gb/s + * 133 5: SAS 6.0 Gb/s + * 133 4: SAS 3.0 Gb/s + * 133 3-0: Reserved + */ + return __qsfp_get_comp_attr(self, 2); +} + + +int +_qsfp_get_comp_ethernet(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 134 7-4: Reserved + * 134 3: 1000BASE-T + * 134 2: 1000BASE-CX + * 134 1: 1000BASE-LX + * 134 0: 1000BASE-SX + */ + return __qsfp_get_comp_attr(self, 3); +} + + +int +_qsfp_get_comp_fc_link_length(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 7: Very long distance (V) + * 135 6: Short distance (S) + * 135 5: Intermediate distance (I) + * 135 4: Long distance (L) + * 135 3: Medium (M) + */ + int mask = 0xFC; /* 11111100 */ + return (__qsfp_get_comp_attr(self, 4) & mask); +} + + +int +_qsfp_get_comp_fc_trans_tech(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 135 2: Reserved + * 135 1: Longwave laser (LC) + * 135 0: Electrical inter-enclosure (EL) + * + * 136 7: Electrical intra-enclosure + * 136 6: Shortwave laser w/o OFC (SN) + * 136 5: Shortwave laser w OFC (SL) + * 136 4: Longwave Laser (LL) + * 136 3-0: Reserved + * + * return value = [bit 8-15:addr 135][bit 0-7:addr 136] + */ + int mask_135 = 7; /* 00000111 */ + int val_135 = (__qsfp_get_comp_attr(self, 4) & mask_135); + int val_136 = __qsfp_get_comp_attr(self, 5); + return ((val_135 << 7) + val_136); +} + + +int +_qsfp_get_comp_fc_trans_media(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 137 7: Twin Axial Pair (TW) + * 137 6: Shielded Twisted Pair (TP) + * 137 5: Miniature Coax (MI) + * 137 4: Video Coax (TV) + * 137 3: Multi-mode 62.5 m (M6) + * 137 2: Multi-mode 50 m (M5) + * 137 1: Multi-mode 50 um (OM3) + * 137 0: Single Mode (SM) + */ + return __qsfp_get_comp_attr(self, 6); +} + + +int +_qsfp_get_comp_fc_speed(struct transvr_obj_s *self) { + /* transvr_comp[1] = address 00h / 132 + * + * 138 7: 1200 MBps (per channel) + * 138 6: 800 MBps + * 138 5: 1600 MBps (per channel) + * 138 4: 400 MBps + * 138 3: 3200 MBps (per channel) + * 138 2: 200 MBps + * 138 1: Extended: See section 6.3.23. The Extended Specification + * Compliance Codes are maintained in the Transceiver Management + * section of SFF-8024. + * 138 0: 100 MBps + */ + return __qsfp_get_comp_attr(self, 7); +} + + +int +_qsfp_get_comp_extended(struct transvr_obj_s *self) { + /* Address: 00h / 192 + * Reference: SFF-8024 TABLE 4-4 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->transvr_comp_ext); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_comp_eth(struct transvr_obj_s *self){ + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_eth"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_ethernet(self); +} + + +int +qsfp_get_comp_10_40(struct transvr_obj_s *self) { + + int err_code = _check_by_mode(self, + &_common_update_attr_transvr_comp, + "qsfp_get_comp_10_40"); + if (err_code < 0){ + return err_code; + } + return _qsfp_get_comp_10_40_100_ethernet(self); +} + + +int +_qsfp_get_connector_type(struct transvr_obj_s *self) { + /* Address: 00h / 130 + * Reference: SFF-8024 TABLE 4-3 + */ + if ((self->state == STATE_TRANSVR_CONNECTED) || + (self->state == STATE_TRANSVR_INIT) ) { + return (int)(self->connector); + } + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_transvr_temp(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_temp, + "qsfp_get_transvr_temp"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_temp[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return _common_count_temp(self->curr_temp[0], + self->curr_temp[1], + buf_p); +} + + +int +qsfp_get_transvr_voltage(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_voltage, + "qsfp_get_transvr_voltage"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_voltage[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 Volt */ + return _common_count_voltage(self->curr_voltage[0], + self->curr_voltage[1], + buf_p); +} + + +int +qsfp_get_transvr_tx_eq(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_get_transvr_tx_eq"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->tx_eq[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->tx_eq[0], self->tx_eq[1]); +} + + +int +qsfp_get_transvr_rx_am(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_get_transvr_rx_am"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_am[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_am[0], self->rx_am[1]); +} + + +int +qsfp_get_transvr_rx_em(struct transvr_obj_s *self, + char *buf_p) { + + int limt = 8; + int err = DEBUG_TRANSVR_INT_VAL; + + err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_get_transvr_rx_em"); + if (err < 0) { + return snprintf(buf_p, limt, "%d\n", err); + } + if ((self->rx_em[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, limt, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + return snprintf(buf_p, limt, "0x%02x%02x\n", + self->rx_em[0], self->rx_em[1]); +} + + +int +_qsfp_get_channel_diag(uint8_t *data_array, + int (*count_func)(uint8_t high_byte, uint8_t low_byte, char *buf_p), + char *ch_name, + char *result_p) { + int i, high, low; + int len_max = 128; + char ch_buf[4][16] = { DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL, + DEBUG_TRANSVR_STR_VAL }; + + for (i=0; i<4; i++) { + high = (i*2); + low = ((i*2) + 1); + count_func(data_array[high], data_array[low], ch_buf[i]); + } + return snprintf(result_p, len_max, + "%s-%d:%s%s-%d:%s%s-%d:%s%s-%d:%s", + ch_name, 1, ch_buf[0], + ch_name, 2, ch_buf[1], + ch_name, 3, ch_buf[2], + ch_name, 4, ch_buf[3]); +} + + +int +qsfp_get_soft_rx_los(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_rx_los, + "qsfp_get_soft_rx_los"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->rx_los & mask)); +} + + +int +qsfp_get_soft_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_get_soft_tx_disable"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_disable & mask)); +} + + +int +qsfp_get_soft_tx_fault(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int mask = 0x0f; /* Bit 0 ~ Bit 3 */ + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_fault, + "qsfp_get_soft_tx_fault"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + return snprintf(buf_p, lmax, "0x%02x\n", (self->tx_fault & mask)); +} + + +int +qsfp_get_auto_tx_disable(struct transvr_obj_s *self, + char *buf_p) { + + if (self->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "%d\n", ERR_TRANSVR_FUNC_DISABLE); + } + return snprintf(buf_p, LEN_TRANSVR_S_STR, + "0x%02x\n", self->auto_tx_disable); +} + + +int +qsfp_get_transvr_tx_bias(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_bias, + "qsfp_get_transvr_tx_bias"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_bias[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mA */ + return _qsfp_get_channel_diag(self->curr_tx_bias, + _common_count_tx_bias, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_tx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "TX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_tx_power, + "qsfp_get_transvr_tx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_tx_power, + _common_count_tx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_transvr_rx_power(struct transvr_obj_s *self, + char *buf_p) { + + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *ch_name = "RX"; + + err_code = _check_by_mode(self, + &_qsfp_update_attr_curr_rx_power, + "qsfp_get_transvr_rx_power"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->curr_tx_power[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* Return Unit: 1 mW */ + return _qsfp_get_channel_diag(self->curr_rx_power, + _common_count_rx_power, + ch_name, + buf_p); +} + + +int +qsfp_get_wavelength(struct transvr_obj_s *self, + char *buf_p) { + /* [Desc] Wavelength or Copper Cable Attenuation (SFF-8636) + * [Addr] 00h 186-187 + * [Note] + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is + * a 16-bit hex value with Byte 186 as high order byte and Byte 187 as + * low order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. + * If the free side device is identified as copper cable these registers will + * be used to define the cable attenuation. An indication of 0 dB attenuation + * refers to the case where the attenuation is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + int lmax = 8; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _check_by_mode(self, + &_common_update_attr_wavelength, + "common_get_wavelength"); + if (err_code < 0) { + return snprintf(buf_p, lmax, "%d\n", err_code); + } + if ((self->wavelength[0]) == DEBUG_TRANSVR_HEX_VAL) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_UPDATE_FAIL); + } + /* unit: 1 um */ + return snprintf(buf_p, lmax, "%d\n", + _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1])); +} + + +/* Public Function for Setup Features + */ +static int +__sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + uint8_t update_val = (*attr_p); + + switch (input_val) { + case 0: + SWP_BIT_CLEAR(update_val, bit_shift); + break; + case 1: + SWP_BIT_SET(update_val, bit_shift); + break; + default: + retval = ERR_TRANSVR_UNEXCPT; + err_code = ERR_TRANSVR_UNEXCPT; + err_msg = "Exception occurs"; + goto err_private_sfp_set_soft_rs_1; + } + err_code = _common_set_uint8_attr(self, + address, + page, + offset, + update_val, + attr_p, + caller, + show_err); + if (err_code < 0) { + retval = err_code; + err_msg = "Write data via i2c fail!"; + goto err_private_sfp_set_soft_rs_1; + } + (*attr_p) = update_val; + return 0; + +err_private_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +static int +_sfp_set_soft_rs(struct transvr_obj_s *self, + int input_val, + int address, + int page, + int offset, + int bit_shift, + int (*attr_update_func)(struct transvr_obj_s *self, int show_err), + uint8_t *attr_p, + char *caller, + int show_err) { + + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + + /* Check input value */ + if ((input_val != 0) && (input_val != 1)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Check rate identifier is supported */ + err_code = self->get_rate_id(self); + if (err_code <= 0) { + switch (err_code) { + case 0: + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "Not support this feature"; + break; + case ERR_TRANSVR_UNINIT: + retval = ERR_TRANSVR_UNINIT; + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + retval = ERR_TRANSVR_UNPLUGGED; + err_msg = "Transceiver unplugged!"; + break; + default: + retval = err_code; + err_msg = "Check Rate_ID fail!"; + break; + } + goto err_common_sfp_set_soft_rs_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + attr_update_func, + caller); + if ( (err_code < 0) || + ((*attr_p) == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_common_sfp_set_soft_rs_1; + } + /* Generate and update value */ + return __sfp_set_soft_rs(self, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + +err_common_sfp_set_soft_rs_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +sfp_set_soft_rs0(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(0)"] address + * A2h, offset: 110, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs0, + self->eeprom_map_p->page_soft_rs0, + self->eeprom_map_p->offset_soft_rs0, + bit_shift, + &_sfp_update_attr_soft_rs0, + &(self->soft_rs0), + "sfp_set_soft_rs0", + show_err); +} + + +int +sfp_set_soft_rs1(struct transvr_obj_s *self, + int input_val) { + /* Note: + * SFP Soft Rate_Select Select RX ["RS(1)"] address + * A2h, offset: 118, bit 3 + */ + int bit_shift = 3; + int show_err = 1; + return _sfp_set_soft_rs(self, + input_val, + self->eeprom_map_p->addr_soft_rs1, + self->eeprom_map_p->page_soft_rs1, + self->eeprom_map_p->offset_soft_rs1, + bit_shift, + &_sfp_update_attr_soft_rs1, + &(self->soft_rs1), + "sfp_set_soft_rs1", + show_err); +} + + +int +__sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_tx_eq; + } + setv = (uint8_t)input; + if (self->tx_eq[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + setv, + &(self->tx_eq[0]), + "_sfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_tx_eq; + } + return 0; + +err_sfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; itx_eq[0]; + if (_sfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if (self->tx_eq[0] == tmp){ + return 0; + } + } + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +sfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_tx_eq, + "sfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_tx_eq(self, input, 1); +} + + +int +__sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv = DEBUG_TRANSVR_HEX_VAL; + + if ((input < 0) || (input > 0xFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_sfp_set_rx_em; + } + setv = (uint8_t)input; + if (self->rx_em[0] == setv) { + return 0; + } + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + setv, + &(self->rx_em[0]), + "_sfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_attr fail"; + goto err_sfp_set_rx_em; + } + return 0; + +err_sfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_sfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + uint8_t tmp; + int i = 0; + int retry = 3; + + for (i=0; irx_em[0]; + if (_sfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if (self->rx_em[0] == tmp){ + return 0; + } + } + return -1; +} + + +int +sfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_sfp_update_attr_rx_em, + "sfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _sfp_set_rx_em(self, input, 1); +} + + +int +sfp_set_1g_rj45_extphy_offset(struct transvr_obj_s *self, + int input) { + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xff)) { + return ERR_TRANSVR_BADINPUT; + } + self->extphy_offset = (uint8_t)input; + return 0; +} + + +int +sfp_set_1g_rj45_extphy_reg(struct transvr_obj_s *self, + int input) { + + int i = 0; + int retry = 3; + int delay = 200; + uint16_t tmp = 0; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return ERR_TRANSVR_UNPLUGGED; + } + if ((self->info != TRANSVR_CLASS_BASE_T_1000) && + (self->info != TRANSVR_CLASS_BASE_T_1000_up) ){ + return ERR_TRANSVR_NOTSUPPORT; + } + if ((input < 0) || (input > 0xffff)) { + return ERR_TRANSVR_BADINPUT; + } + tmp = ((input & 0x00ff) << 8) | ((input & 0xff00) >> 8); + if (_common_setup_page(self, VAL_TRANSVR_EXTPHY_ADDR_56, + -1, self->extphy_offset, 1, 0) < 0) { + return -EIO; + } + for (i=0; i<=retry; i++) { + if (i2c_smbus_write_word_data(self->i2c_client_p, + self->extphy_offset, + tmp) >= 0) { + return 0; + } + msleep(delay); + } + SWPS_INFO("%s: retry:%d fail :%s :0x%02x\n", + __func__, retry, self->swp_name, self->extphy_offset); + return -EIO; +} + + +static int +__qsfp_set_cdr(struct transvr_obj_s *self, + int input_val, + int show_err) { + + uint8_t update_val; + int CDR_FEATURE_SUPPORTED = 0x3; + int retval = ERR_TRANSVR_UNEXCPT; + int err_code = ERR_TRANSVR_UNEXCPT; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_name = "__qsfp_set_cdr"; + + /* Check input value */ + if ((input_val < 0) || (input_val > 0xff)){ + retval = ERR_TRANSVR_BADINPUT; + err_code = ERR_TRANSVR_BADINPUT; + err_msg = "Input range incorrect!"; + goto err_qsfp_set_cdr_1; + } + update_val = (uint8_t)input_val; + /* Check CDR supported by transceiver */ + err_code = qsfp_get_cdr_present(self); + if (err_code < 0) { + retval = err_code; + switch (err_code) { + case ERR_TRANSVR_UNINIT: + err_msg = "Check CDR present fail!"; + break; + case ERR_TRANSVR_UNPLUGGED: + err_msg = "Transceiver unplugged!"; + break; + default: + err_msg = "Check CDR present fail!"; + break; + } + goto err_qsfp_set_cdr_1; + } + if (err_code != CDR_FEATURE_SUPPORTED) { + retval = ERR_TRANSVR_NOTSUPPORT; + err_msg = "This transceiver not support CDR!"; + goto err_qsfp_set_cdr_1; + } + /* Check and update */ + err_code = _check_by_mode(self, + &_qsfp_update_attr_cdr, + func_name); + if ( (err_code < 0) || + (self->cdr == DEBUG_TRANSVR_HEX_VAL) ){ + retval = err_code; + err_msg = "Get current value fail!"; + goto err_qsfp_set_cdr_1; + } + /* Write input value to transceiver */ + return _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->page_cdr, + self->eeprom_map_p->offset_cdr, + update_val, + &(self->cdr), + func_name, + show_err); + +err_qsfp_set_cdr_1: + if (show_err) { + SWPS_INFO("%s: %s :%d :%s\n :%d\n", + __func__, err_msg, err_code, self->swp_name, input_val); + } + return retval; +} + + +int +qsfp_set_cdr(struct transvr_obj_s *self, + int input_val) { + return __qsfp_set_cdr(self, input_val, 1); +} + + +int +qsfp_set_soft_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int show_err = 1; + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + int update_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_soft_tx_disable"); + if (retval < 0) { + snprintf(err_msg, 63, "Not ready. err:%d", retval); + goto err_qsfp_set_soft_tx_disable; + } + if ((input_val > in_max) || + (input_val < in_min) ){ + retval = ERR_TRANSVR_BADINPUT; + snprintf(err_msg, 63, "Input value:%d incorrect!", input_val); + goto err_qsfp_set_soft_tx_disable; + } + if ((self->tx_disable & 0x0f) == input_val) { + return 0; + } + update_val = ((self->tx_disable & 0xf0) & input_val); + retval = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + input_val, + &(self->tx_disable), + "qsfp_set_tx_disable", + show_err); + if (retval < 0) { + snprintf(err_msg, 63, "_common_set_uint8_attr:%d fail!", retval); + goto err_qsfp_set_soft_tx_disable; + } + return 0; + +err_qsfp_set_soft_tx_disable: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return retval; +} + + +int +_qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + uint8_t update) { + + uint8_t tx_enable = 0x0; + int show_e = 1; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Handle timing issues */ + if (update != tx_enable) { + /* Note: + * Because there are some txvr has timing issues, + * therefore we need to execute reset cycle first. + * (enable -> other settings) + */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + tx_enable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set reset value fail"; + goto err_qsfp_set_auto_tx_disable; + } + mdelay(10); + } + /* Setup target value */ + err = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->auto_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C set target value fail"; + goto err_qsfp_set_auto_tx_disable; + } + /* Check and update */ + err = _common_update_uint8_attr(self, + self->eeprom_map_p->addr_tx_disable, + self->eeprom_map_p->page_tx_disable, + self->eeprom_map_p->offset_tx_disable, + self->eeprom_map_p->length_tx_disable, + &(self->tx_disable), + "_qsfp_set_auto_tx_disable", + show_e); + if (err < 0) { + emsg = "I2C get value fail"; + goto err_qsfp_set_auto_tx_disable; + } + if (self->tx_disable != update) { + emsg = "data not become effective"; + goto err_qsfp_set_auto_tx_disable; + } + return 0; + +err_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s\n", + __func__, emsg, self->swp_name); + return ERR_TRANSVR_UPDATE_FAIL; +} + + +int +qsfp_set_auto_tx_disable(struct transvr_obj_s *self, + int input_val) { + + int in_max = 0xf; /* 1111 */ + int in_min = 0x0; /* 0000 */ + int retval = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + + /* Update settings*/ + if (input_val == VAL_TRANSVR_FUNCTION_DISABLE) { + emsg = "User disable auto tx_disable"; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + goto out_qsfp_set_auto_tx_disable; + } + if ((input_val > in_max) || (input_val < in_min) ){ + SWPS_INFO("%s: Input value:%d incorrect! :%s\n", + __func__, input_val, self->swp_name); + return ERR_TRANSVR_BADINPUT; + } + self->auto_tx_disable = input_val; + /* Check current soft tx_disable */ + retval = _check_by_mode(self, + &_qsfp_update_attr_soft_tx_disable, + "qsfp_set_auto_tx_disable"); + switch (retval) { + case 0: + break; + case ERR_TRANSVR_UNPLUGGED: + emsg = "Doesn't need to update"; + goto out_qsfp_set_auto_tx_disable; + default: + SWPS_INFO("%s: setup fail :%d :%s\n", + __func__, retval, self->swp_name); + return retval; + } + return _qsfp_set_auto_tx_disable(self, input_val); + +out_qsfp_set_auto_tx_disable: + SWPS_DEBUG("%s: %s :%s :%d\n :%d", + __func__, emsg, self->swp_name, input_val, retval); + return 0; +} + + +int +__qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_tx_eq; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->tx_eq[0] == setv[0]) && + (self->tx_eq[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_tx_eq, + self->eeprom_map_p->page_tx_eq, + self->eeprom_map_p->offset_tx_eq, + self->eeprom_map_p->length_tx_eq, + setv, + self->tx_eq, + "_qsfp_set_tx_eq", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_tx_eq; + } + return 0; + +err_qsfp_set_tx_eq: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_tx_eq(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; itx_eq[0]; + tmp[1] = self->tx_eq[1]; + if (_qsfp_update_attr_tx_eq(self, show_e) < 0){ + continue; + } + if ((self->tx_eq[0] == tmp[0]) && + (self->tx_eq[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_tx_eq(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_tx_eq, + "qsfp_set_tx_eq"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_tx_eq(self, input, 1); +} + + +int +__qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_am; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_am[0] == setv[0]) && + (self->rx_am[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_am, + self->eeprom_map_p->page_rx_am, + self->eeprom_map_p->offset_rx_am, + self->eeprom_map_p->length_rx_am, + setv, + self->rx_am, + "_qsfp_set_rx_am", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_am; + } + return 0; + +err_qsfp_set_rx_am: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_am(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_am[0]; + tmp[1] = self->rx_am[1]; + if (_qsfp_update_attr_rx_am(self, show_e) < 0){ + continue; + } + if ((self->rx_am[0] == tmp[0]) && + (self->rx_am[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_am(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_am, + "qsfp_set_rx_am"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_am(self, input, 1); +} + + +int +__qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + /* [Note] + * 0x + */ + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t setv[2] = {0x00, 0x00}; + + if ((input < 0) || (input > 0xFFFF)) { + emsg = "input incorrect"; + err = ERR_TRANSVR_BADINPUT; + goto err_qsfp_set_rx_em; + } + setv[0] = (uint8_t)((input & 0xFF00) >> 8); + setv[1] = (uint8_t)(input & 0xFF); + if ((self->rx_em[0] == setv[0]) && + (self->rx_em[1] == setv[1]) ) { + return 0; + } + err = _common_set_uint8_array(self, + self->eeprom_map_p->addr_rx_em, + self->eeprom_map_p->page_rx_em, + self->eeprom_map_p->offset_rx_em, + self->eeprom_map_p->length_rx_em, + setv, + self->rx_em, + "_qsfp_set_rx_em", + show_e); + if (err < 0) { + emsg = "set_uint8_array fail"; + goto err_qsfp_set_rx_em; + } + return 0; + +err_qsfp_set_rx_em: + if (show_e) { + SWPS_INFO("%s: %s :%d\n", __func__, emsg, input); + } + return err; +} + + +int +_qsfp_set_rx_em(struct transvr_obj_s *self, + int input, + int show_e) { + + int i = 0; + int retry = 3; + uint8_t tmp[2]; + + for (i=0; irx_em[0]; + tmp[1] = self->rx_em[1]; + if (_qsfp_update_attr_rx_em(self, show_e) < 0){ + continue; + } + if ((self->rx_em[0] == tmp[0]) && + (self->rx_em[1] == tmp[1]) ){ + return 0; + } + } + return -1; +} + + +int +qsfp_set_rx_em(struct transvr_obj_s *self, + int input) { + + int err = _check_by_mode(self, + &_qsfp_update_attr_rx_em, + "qsfp_set_rx_em"); + if (err < 0) { + SWPS_DEBUG("%s: check fail :%d\n", __func__, err); + return err; + } + return _qsfp_set_rx_em(self, input, 1); +} + + +int +common_transvr_dump(struct transvr_obj_s* self){ + + char *type_name = "Undefined"; + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + switch (self->type) { + case TRANSVR_TYPE_SFP: + type_name = STR_TRANSVR_SFP; + break; + case TRANSVR_TYPE_QSFP: + type_name = STR_TRANSVR_QSFP; + break; + case TRANSVR_TYPE_QSFP_PLUS: + type_name = STR_TRANSVR_QSFP_PLUS; + break; + case TRANSVR_TYPE_QSFP_28: + type_name = STR_TRANSVR_QSFP28; + break; + case TRANSVR_TYPE_FAKE: + type_name = "FAKE"; + goto ok_common_transvr_dump; + case TRANSVR_TYPE_UNPLUGGED: + type_name = "UNPLUGGED"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_INCONSISTENT: + type_name = "INCONSISTENT"; + goto err_common_transvr_dump; + case TRANSVR_TYPE_ERROR: + type_name = "ERROR"; + goto err_common_transvr_dump; + + default: + type_name = "UNEXPECTED"; + goto err_common_transvr_dump; + } + printk(KERN_INFO "[SWPS] Dump %s information:\n", self->swp_name); + printk(KERN_INFO " |- :%s\n", type_name); + printk(KERN_INFO " |- :%s\n", self->vendor_name); + printk(KERN_INFO " |- :%s\n", self->vendor_pn); + printk(KERN_INFO " |- :%s\n", self->vendor_rev); + printk(KERN_INFO " |- :%s\n", self->vendor_sn); + printk(KERN_INFO " |- :0x%02x\n", self->br); + printk(KERN_INFO " |- :0x%02x\n", self->comp_rev); + printk(KERN_INFO " |- :%d\n", self->len_om1); + printk(KERN_INFO " |- :%d\n", self->len_om2); + printk(KERN_INFO " |- :%d\n", self->len_om3); + printk(KERN_INFO " |- :%d\n", self->len_om4); + return 0; + +ok_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return 0; + +err_common_transvr_dump: + SWPS_INFO("%s: %s is %s\n", __func__, self->swp_name, type_name); + return -1; +} + + +int +sfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_sm); + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :0x%02x\n", self->rate_id); + return 0; +} + + +int +qsfp_transvr_dump(struct transvr_obj_s* self) { + + if (TRANSVR_INFO_DUMP_ENABLE != 1) { + return 0; + } + if (common_transvr_dump(self) < 0) { + return -1; + } + printk(KERN_INFO " |- :%d\n", self->len_smf); + printk(KERN_INFO " '- :Class_%d\n", __qsfp_get_power_cls(self, 0)); + return 0; +} + + +int +fake_transvr_dump(struct transvr_obj_s* self) { + + printk(KERN_INFO "[SWPS] Dump transceiver information: %s\n", self->swp_name); + printk(KERN_INFO " |- :FAKE\n"); + printk(KERN_INFO " |- :FAKE_VENDER_NAME\n"); + printk(KERN_INFO " |- :FAKE_VENDER_PN\n"); + printk(KERN_INFO " |- :FAKE_VENDER_REV\n"); + printk(KERN_INFO " |- :FAKE_VENDER_SN\n"); + printk(KERN_INFO " |- :0x99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " |- :99\n"); + printk(KERN_INFO " '- :0x99\n"); + return 0; +} + + +/* ========== Object functions for fake type ========== + */ +int +fake_transvr_update(struct transvr_obj_s *self, + int show_err){ + self->state = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +fake_get_binary(struct transvr_obj_s *self){ + return 1; +} + +int +fake_get_int(struct transvr_obj_s *self){ + return 99; +} + + +int +fake_get_hex(struct transvr_obj_s *self){ + return 0x0f; +} + + +int +fake_get_str(struct transvr_obj_s *self, char *buf) { + return snprintf(buf, 16, "fake_get_str\n"); +} + + +int +fake_set_int(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: %d\n", __func__, input); + return 0; +} + + +int +fake_set_hex(struct transvr_obj_s *self, int input){ + SWPS_INFO("%s: 0x%02x\n", __func__, input); + return 0; +} + + +/* ========== Object functions for unsupported ========== + */ +int +unsupported_get_func(struct transvr_obj_s *self){ + return ERR_TRANSVR_NOTSUPPORT; +} + + +int +unsupported_get_func2(struct transvr_obj_s *self, + char *buf_p) { + int len = snprintf(buf_p, 8, "%d\n", ERR_TRANSVR_NOTSUPPORT); + return len; +} + + +int +unsupported_set_func(struct transvr_obj_s *self, + int input_val){ + return ERR_TRANSVR_NOTSUPPORT; +} + + + +/* ========== Object functions for long term task ========== + * + * [Note] + * SWPS transceiver worker is likely the green-thread (coroutine). + * Due to resource and performance considerations. SWPS run all + * features in one kthread at the same time, and handle by it self. + */ + +/* For Transceiver Task Handling + */ +static struct transvr_worker_s * +transvr_task_get(struct transvr_obj_s *self, + char *func_name) { + + struct transvr_worker_s *curr_p = self->worker_p; + + while(curr_p != NULL){ + if (strcmp((curr_p->func_name), func_name) == 0 ) { + return curr_p; + } + curr_p = curr_p->next_p; + } + return NULL; +} + + +static struct transvr_worker_s* +transvr_task_creat(struct transvr_obj_s *self, + int (*main_task)(struct transvr_worker_s *task), + int (*post_task)(struct transvr_worker_s *task), + char *caller) { + + struct transvr_worker_s *task_p = NULL; + struct transvr_worker_s *curr_p = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check task not exist */ + task_p = transvr_task_get(self, caller); + if (task_p) { + snprintf(err_msg, sizeof(err_msg), "Task already created!"); + goto err_transvr_task_creat; + } + /* Create task worker */ + task_p = kzalloc(sizeof(struct transvr_worker_s), GFP_KERNEL); + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_transvr_task_creat; + } + /* Setup task data */ + task_p->transvr_p = self; + task_p->next_p = NULL; + task_p->trigger_time = 0; + task_p->retry = 1; + task_p->state = STATE_T_TASK_INIT; + task_p->main_task = main_task; + task_p->post_task = post_task; + task_p->p_data = NULL; + snprintf(task_p->func_name, sizeof(task_p->func_name), "%s", caller); + /* Setup Link List */ + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p->next_p != NULL) { + curr_p = curr_p->next_p; + } + curr_p->next_p = task_p; + task_p->pre_p = curr_p; + } else { + self->worker_p = task_p; + task_p->pre_p = NULL; + } + return task_p; + +err_transvr_task_creat: + SWPS_ERR("%s: %s :%s :%s\n", + __func__, err_msg, caller, self->swp_name); + return NULL; +} + + +static void +transvr_task_free_one(struct transvr_worker_s *task_p){ + + struct transvr_worker_s *pre_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (task_p) { + pre_p = task_p->pre_p; + next_p = task_p->next_p; + + if ((pre_p) && (next_p)) { + pre_p->next_p = next_p; + next_p->pre_p = pre_p; + + } else if ((!pre_p) && (next_p)) { + next_p->pre_p = NULL; + + } else if ((pre_p) && (!next_p)) { + pre_p->next_p = NULL; + + } else if ((!pre_p) && (!next_p)) { + task_p->transvr_p->worker_p = NULL; + } else { + SWPS_ERR("%s: Unexcept case!\n :%s", + __func__, task_p->transvr_p->swp_name); + } + kfree(task_p->p_data); + kfree(task_p); + } +} + + +static void +transvr_task_free_all(struct transvr_obj_s *self) { + + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if (self->worker_p) { + curr_p = self->worker_p; + while(curr_p) { + next_p = curr_p->next_p; + transvr_task_free_one(curr_p); + curr_p = next_p; + } + self->worker_p = NULL; + } +} + + +static void +transvr_cache_free_all(struct transvr_obj_s *self) { + + memset(self->vendor_name, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_rev, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_pn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + memset(self->vendor_sn, 0, (LEN_TRANSVR_M_STR * sizeof(char)) ); + self->extphy_offset = 0; +} + +static int +_transvr_task_run_main(struct transvr_worker_s *task_p) { + + int retval = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if (!task_p){ + snprintf(err_msg, sizeof(err_msg), "main_task is NULL!"); + goto main_transvr_task_err; + } + if ((task_p->trigger_time) == 0){ + goto main_transvr_task_run; + } + if (time_before(jiffies, task_p->trigger_time)){ + goto main_transvr_task_wait; + } + goto main_transvr_task_run; + +main_transvr_task_run: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + task_p->retry -= 1; + } + retval = task_p->main_task(task_p); + if (retval < 0) { + if (task_p->retry > 0) { + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + } + goto main_transvr_task_identify; + +main_transvr_task_identify: + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + + case EVENT_TRANSVR_TASK_DONE: + task_p->state = STATE_T_TASK_DONE; + return EVENT_TRANSVR_TASK_DONE; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Run main_task fail!"); + goto main_transvr_task_err; + +main_transvr_task_wait: + task_p->state = STATE_T_TASK_WAIT; + return EVENT_TRANSVR_TASK_WAIT; + +main_transvr_task_err: + task_p->state = STATE_T_TASK_FAIL; + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, retval, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_transvr_task_run_post(struct transvr_worker_s *task_p) { + + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + if ((task_p->post_task) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + switch (task_p->state) { + case STATE_T_TASK_WAIT: + case STATE_T_TASK_INIT: + goto post_transvr_task_wait; + + case STATE_T_TASK_DONE: + case STATE_T_TASK_FAIL: + goto post_transvr_task_run; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Unexcept task state"); + goto post_transvr_task_err; + +post_transvr_task_run: + task_p->post_task(task_p); + return EVENT_TRANSVR_TASK_DONE; + +post_transvr_task_wait: + return EVENT_TRANSVR_TASK_WAIT; + +post_transvr_task_err: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, task_p->state, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_one(struct transvr_worker_s *task_p) { + + int retval_main = DEBUG_TRANSVR_INT_VAL; + int retval_post = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + retval_main = _transvr_task_run_main(task_p); + if (retval_main < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute main_task fail!"); + goto err_transvr_task_run_one; + } + retval_post = _transvr_task_run_post(task_p); + if (retval_post < 0) { + snprintf(err_msg, sizeof(err_msg), "Execute post_task fail!"); + goto err_transvr_task_run_one; + } + return retval_main; + +err_transvr_task_run_one: + SWPS_INFO("%s: %s
:%d :%d :%s :%s\n", + __func__, err_msg, retval_main, retval_post, + task_p->func_name, task_p->transvr_p->swp_name); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +transvr_task_run_all(struct transvr_obj_s *self) { + + int haserr = 0; + int retval = DEBUG_TRANSVR_INT_VAL; + struct transvr_worker_s *curr_p = NULL; + struct transvr_worker_s *next_p = NULL; + + if ((self->worker_p) == NULL) { + return EVENT_TRANSVR_TASK_DONE; + } + curr_p = self->worker_p; + while (curr_p != NULL) { + next_p = curr_p->next_p; + retval = transvr_task_run_one(curr_p); + if (curr_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + curr_p = next_p; + continue; + } + switch (retval) { + case EVENT_TRANSVR_TASK_WAIT: + break; + case EVENT_TRANSVR_TASK_DONE: + transvr_task_free_one(curr_p); + break; + case EVENT_TRANSVR_TASK_FAIL: + + default: + haserr = 1; + transvr_task_free_one(curr_p); + break; + } + curr_p = next_p; + } + if (haserr) { + return EVENT_TRANSVR_TASK_FAIL; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +static void +transvr_task_set_delay(struct transvr_worker_s *task_p, + unsigned long delay_msec) { + + task_p->trigger_time = (jiffies + (delay_msec * (HZ/1000))); +} + + +static void +transvr_task_set_retry(struct transvr_worker_s *task_p, + unsigned long retry_times) { + + task_p->retry = retry_times; +} + + +/* For Transceiver Post Task + */ +int +taskfunc_post_do_nothing(struct transvr_worker_s *task_p) { + + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_post_handle_task_state(struct transvr_worker_s *task_p) { + + struct transvr_obj_s* tp = task_p->transvr_p; + + switch (task_p->state) { + case STATE_T_TASK_INIT: + case STATE_T_TASK_WAIT: + return EVENT_TRANSVR_TASK_WAIT; + + case STATE_T_TASK_DONE: + tp->state = STATE_TRANSVR_CONNECTED; + tp->send_uevent(tp, KOBJ_ADD); + return EVENT_TRANSVR_TASK_DONE; + + case STATE_T_TASK_FAIL: + tp->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_TASK_FAIL; + + default: + break; + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +/* For Transceiver Main Task + */ +int +_taskfunc_sfp_setup_soft_rs(struct transvr_worker_s *task_p, + int input_val, + int address, + int page, + int offset, + int bit_shift, + uint8_t *attr_p, + char *caller) { + + int show_err = 0; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_soft_rs"; + + err_code = _sfp_update_attr_soft_rs0(task_p->transvr_p, 0); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + err_code = __sfp_set_soft_rs(task_p->transvr_p, + input_val, + address, + page, + offset, + bit_shift, + attr_p, + caller, + show_err); + if (err_code < 0) { + err_str = "Get current soft_rs0 fail!"; + goto err_taskfunc_sfp_setup_soft_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_setup_soft_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_code); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +__taskfunc_sfp_setup_hard_rs(struct transvr_worker_s *task_p, + int input_val, + int (*get_func)(struct ioexp_obj_s *self, int virt_offset), + int (*set_func)(struct ioexp_obj_s *self, int virt_offset, int input_val)) { + + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + + err_val = get_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset); + + if (err_val < 0) { + if (err_val == ERR_IOEXP_NOTSUPPORT) { + return EVENT_TRANSVR_TASK_DONE; + } + err_str = "Get current hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + if (err_val == input_val) { + return EVENT_TRANSVR_TASK_DONE; + } + err_val = set_func(task_p->transvr_p->ioexp_obj_p, + task_p->transvr_p->ioexp_virt_offset, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs fail!"; + goto err_p_taskfunc_sfp_setup_hard_rs_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_p_taskfunc_sfp_setup_hard_rs_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + __func__, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_hard_rs0(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs0, + task_p->transvr_p->ioexp_obj_p->set_hard_rs0); +} + + +int +_taskfunc_sfp_setup_hard_rs1(struct transvr_worker_s *task_p, + int input_val) { + + return __taskfunc_sfp_setup_hard_rs(task_p, + input_val, + task_p->transvr_p->ioexp_obj_p->get_hard_rs1, + task_p->transvr_p->ioexp_obj_p->set_hard_rs1); +} + + +int +_taskfunc_sfp_setup_rs0(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs0"; + + err_val = _taskfunc_sfp_setup_hard_rs0(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs0, + task_p->transvr_p->eeprom_map_p->page_soft_rs0, + task_p->transvr_p->eeprom_map_p->offset_soft_rs0, + bit_shift, + &(task_p->transvr_p->soft_rs0), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs0 fail!"; + goto err_private_taskfunc_sfp_setup_rs0_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs0_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs0(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_sfp_setup_rs1(struct transvr_worker_s *task_p, + int input_val) { + + int bit_shift = 3; + int old_val = DEBUG_TRANSVR_INT_VAL; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "_taskfunc_sfp_setup_rs1"; + + err_val = _taskfunc_sfp_setup_hard_rs1(task_p, + input_val); + if (err_val < 0) { + err_str = "Setup hard_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + old_val = err_val; + err_val = _taskfunc_sfp_setup_soft_rs(task_p, + input_val, + task_p->transvr_p->eeprom_map_p->addr_soft_rs1, + task_p->transvr_p->eeprom_map_p->page_soft_rs1, + task_p->transvr_p->eeprom_map_p->offset_soft_rs1, + bit_shift, + &(task_p->transvr_p->soft_rs1), + func_str); + if (err_val < 0) { + err_str = "Setup soft_rs1 fail!"; + goto err_private_taskfunc_sfp_setup_rs1_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_sfp_setup_rs1_1: + if ((task_p->retry) == 0) { + SWPS_INFO("%s: %s :%s :%d :%d\n", + func_str, err_str, task_p->transvr_p->swp_name, input_val, err_val); + } + _taskfunc_sfp_setup_hard_rs1(task_p, old_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_sfp_setup_SFF8431_case1(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs0(task_p, update_val); +} + + + +int +taskfunc_sfp_setup_SFF8431_case2(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + int update_val = 1; + + return _taskfunc_sfp_setup_rs1(task_p, update_val); +} + + +int +taskfunc_sfp_setup_SFF8431_case3(struct transvr_worker_s *task_p) { + /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + int update_rs0 = 1; + int update_rs1 = 1; + int err_code = DEBUG_TRANSVR_INT_VAL; + + err_code = _taskfunc_sfp_setup_rs0(task_p, update_rs0); + if (err_code < 0) { + return err_code; + } + return _taskfunc_sfp_setup_rs1(task_p, update_rs1); +} + + +int +taskfunc_sfp_handle_1g_rj45(struct transvr_worker_s *task_p) { + + /* Not all of platform support 0x56 for transceiver + * external PHY, Support list as below: + * => 1. Magnolia-PVT (PS: EVT & DVT not ready) + */ + int ext_phy_addr = 0x56; + int ext_phy_page = -1; + int ext_phy_offs = 0x11; + int ext_phy_len = 1; + int lstate_mask = 0x04; /* 00000100 */ + int show_err = 0; + int fail_retry = 5; + int fail_delay = 1000; /* msec */ + int err_code = DEBUG_TRANSVR_INT_VAL; + uint8_t detect_val = DEBUG_TRANSVR_HEX_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + int *tmp_p = NULL; + char *func_name = "taskfunc_sfp_handle_1g_rj45"; + + if (task_p->transvr_p->state != STATE_TRANSVR_CONNECTED) { + return EVENT_TRANSVR_TASK_DONE; + } + if ( (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000) && + (task_p->transvr_p->info != TRANSVR_CLASS_BASE_T_1000_up) ) { + goto err_taskfunc_sfp_handle_1g_rj45_1; + } + err_code = _common_update_uint8_attr(task_p->transvr_p, + ext_phy_addr, + ext_phy_page, + ext_phy_offs, + ext_phy_len, + &detect_val, + func_name, + show_err); + if ( (err_code < 0) || + (detect_val == DEBUG_TRANSVR_HEX_VAL) ) { + snprintf(err_str, sizeof(err_str), "Detect external link status fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + if ((detect_val & lstate_mask) == lstate_mask) { + goto ok_taskfunc_sfp_handle_1g_rj45_link_up; + } + goto ok_taskfunc_sfp_handle_1g_rj45_link_down; + +ok_taskfunc_sfp_handle_1g_rj45_link_up: + /* Filter out noise */ + if (!(task_p->p_data)) { + tmp_p = kzalloc(sizeof(int), GFP_KERNEL); + if (!tmp_p) { + snprintf(err_str, sizeof(err_str), "kzalloc p_data fail"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + *tmp_p = TRANSVR_CLASS_BASE_T_1000_up; + task_p->p_data = tmp_p; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + } + if ((*(int *)(task_p->p_data)) != TRANSVR_CLASS_BASE_T_1000_up) { + kfree(task_p->p_data); + task_p->p_data = NULL; + snprintf(err_str, sizeof(err_str), "Internal error"); + goto err_taskfunc_sfp_handle_1g_rj45_2; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + kfree(task_p->p_data); + task_p->p_data = NULL; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_link_down: + if (task_p->p_data) { + kfree(task_p->p_data); + task_p->p_data = NULL; + } + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000; + goto ok_taskfunc_sfp_handle_1g_rj45_done; + +ok_taskfunc_sfp_handle_1g_rj45_done: + if (task_p->retry != VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_1: + snprintf(err_str, sizeof(err_str), "Detect transceiver:%d not Base-T, remove task.", + task_p->transvr_p->info); + SWPS_INFO("%s: %s :%s\n", __func__, err_str, task_p->transvr_p->swp_name); + transvr_task_set_retry(task_p, 0); + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_sfp_handle_1g_rj45_2: + if (task_p->retry == VAL_TRANSVR_TASK_RETRY_FOREVER) { + transvr_task_set_retry(task_p, fail_retry); + } + if ((task_p->retry) == 0) { + /* Error case: + * => In this case, SWPS will stop external Link state monitor features + * and keeps transvr_p->info on TRANSVR_CLASS_BASE_T_1000_up. + * Upper layer will see it always Linkup that because of these type of + * transceiver has external phy, BCM chip see it as Loopback transceiver. + */ + SWPS_WARN("%s can not access external PHY of Base-T SFP transceiver\n", + task_p->transvr_p->swp_name); + task_p->transvr_p->info = TRANSVR_CLASS_BASE_T_1000_up; + return EVENT_TRANSVR_TASK_DONE; + } else { + transvr_task_set_delay(task_p, fail_delay); + } + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_taskfunc_qsfp_setup_power_mod(struct transvr_obj_s *self, + int setup_val) { + + int curr_val = DEBUG_TRANSVR_INT_VAL; + int err_val = DEBUG_TRANSVR_INT_VAL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + if (io_no_init) { + + SWPS_INFO("%s no_io_init\n",__func__); + return EVENT_TRANSVR_TASK_DONE; + } + + curr_val = self->ioexp_obj_p->get_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset); + if (curr_val < 0){ + err_msg = "Get current value fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + if (curr_val == setup_val){ + return EVENT_TRANSVR_TASK_DONE; + } + err_val = self->ioexp_obj_p->set_lpmod(self->ioexp_obj_p, + self->ioexp_virt_offset, + setup_val); + if (err_val < 0){ + err_msg = "Setup power mode fail!"; + goto err_private_taskfunc_qsfp_setup_power_mod_1; + } + return EVENT_TRANSVR_TASK_DONE; + +err_private_taskfunc_qsfp_setup_power_mod_1: + SWPS_INFO("%s: %s :%d :%d :%d\n", + __func__, err_msg, err_val, curr_val, setup_val); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +taskfunc_qsfp_handle_tx_disable(struct transvr_worker_s *task_p) { + + int i = 0; + int retry = 5; + int delay_ms = 100; + + if (task_p->transvr_p->auto_tx_disable == VAL_TRANSVR_FUNCTION_DISABLE) { + return EVENT_TRANSVR_TASK_DONE; + } + if (!_qsfp_is_implement_tx_disable(task_p->transvr_p)) { + return EVENT_TRANSVR_TASK_DONE; + } + for (i=0; itransvr_p, + task_p->transvr_p->auto_tx_disable) + == EVENT_TRANSVR_TASK_DONE) { + goto ok_taskfunc_qsfp_handle_tx_disable; + } + mdelay(delay_ms); + } + SWPS_INFO("%s auto setup tx_disable:0x%02x fail.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_INIT_FAIL; + +ok_taskfunc_qsfp_handle_tx_disable: + SWPS_INFO("%s auto setup tx_disable:0x%02x ok.\n", + task_p->transvr_p->swp_name, + task_p->transvr_p->auto_tx_disable); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +taskfunc_qsfp_set_hpmod(struct transvr_worker_s *task_p) { + + int err = DEBUG_TRANSVR_INT_VAL; + int HIGH_POWER_MODE = 0; + + /* Handle power mode */ + err = _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + HIGH_POWER_MODE); + if (err < 0) { + SWPS_INFO("%s: setup hpmod fail :%d :%s\n", + __func__, err, task_p->transvr_p->swp_name); + return err; + } + /* Handle auto tx_disable + * [Note] + * => Because there are some transceiver have timing issues or + * setup sequence issues, therefore we handle auto tx_disable + * after handle power mode. + */ + mdelay(100); + return taskfunc_qsfp_handle_tx_disable(task_p); +} + + +int +taskfunc_qsfp_set_lpmod(struct transvr_worker_s *task_p) { + + int LOW_POWER_MODE = 1; + return _taskfunc_qsfp_setup_power_mod(task_p->transvr_p, + LOW_POWER_MODE); +} + + +static int +initfunc_sfp_handle_multi_rate_mode(struct transvr_obj_s *self) { + + int task_retry = 3; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_str = DEBUG_TRANSVR_STR_VAL; + char *func_str = "sfp_handle_multi_rate_mode"; + struct transvr_worker_s *task_p = NULL; + + switch (self->rate_id) { + case 0x00: /* Unspecified */ + case 0x03: /* Unspecified */ + case 0x05: /* Unspecified */ + case 0x07: /* Unspecified */ + case 0x09: /* Unspecified */ + case 0x0B: /* Unspecified */ + case 0x0D: /* Unspecified */ + case 0x0F: /* Unspecified */ + goto sfp_handle_multi_rate_mode_4_unspecified; + + case 0x02: /* SFF-8431 (8/4/2G Rx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case1, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x04: /* SFF-8431 (8/4/2G Tx Rate_Select only) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case2, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x06: /* SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) */ + task_p = transvr_task_creat(self, + taskfunc_sfp_setup_SFF8431_case3, + taskfunc_post_handle_task_state, + func_str); + goto sfp_handle_multi_rate_mode_4_sff8431; + + case 0x01: /* SFF-8079 (4/2/1G Rate_Select & AS0/AS1) */ + err_str = "SFF-8079 (4/2/1G Rate_Select & AS0/AS1)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x08: /* FC-PI-5 (16/8/4G Rx Rate_select only) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Rx Rate_select only)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0A: /* FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) + * High=16G only, Low=8G/4G + */ + err_str = "FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0C: /* FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + */ + err_str = "FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select)"; + goto sfp_handle_multi_rate_mode_4_not_support; + + case 0x0E: /* 10/8G Rx and Tx Rate_Select controlling the operation or + * locking modes of the internal signal conditioner, retimer + * or CDR, according to the logic table defined in Table 10-2, + * High Bit Rate (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = + * 8.5 Gb/s. In this mode, the default value of bit 110.3 (Soft + * Rate Select RS(0), Table 9-11) and of bit 118.3 (Soft Rate + * Select RS(1), Table 10-1) is 1. + */ + err_str = "cable type: 0x0E"; + goto sfp_handle_multi_rate_mode_4_not_support; + + default: + err_str = "cable type: UNKNOW"; + goto sfp_handle_multi_rate_mode_4_not_support; + } + +sfp_handle_multi_rate_mode_4_sff8431: + if (!task_p) { + err_str = "Create task fail!"; + goto sfp_handle_multi_rate_mode_4_fail_1; + } + transvr_task_set_retry(task_p, task_retry); + return EVENT_TRANSVR_TASK_WAIT; + +sfp_handle_multi_rate_mode_4_unspecified: + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_not_support: + SWPS_INFO("%s: Does not support %s :%s :0x%02x\n", + func_str, err_str, self->swp_name, self->rate_id); + return EVENT_TRANSVR_TASK_DONE; + +sfp_handle_multi_rate_mode_4_fail_1: + SWPS_INFO("%s: %s :%s :0x%02x, :%d\n", + func_str, err_str, self->swp_name, self->rate_id, err_code); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +initfunc_sfp_handle_1g_rj45(struct transvr_obj_s *self) { + + struct transvr_worker_s *task_p = NULL; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_sfp_handle_1g_rj45"; + + + if (self->info == TRANSVR_CLASS_BASE_T_1000) { + task_p = transvr_task_creat(self, + taskfunc_sfp_handle_1g_rj45, + taskfunc_post_do_nothing, + func_str); + if (!task_p) { + snprintf(err_str, sizeof(err_str), "Create task fail"); + goto err_initfunc_sfp_handle_1g_rj45; + } + transvr_task_set_retry(task_p, VAL_TRANSVR_TASK_RETRY_FOREVER); + } + return EVENT_TRANSVR_TASK_DONE; + +err_initfunc_sfp_handle_1g_rj45: + SWPS_INFO("%s: %s :%s :%d\n", + __func__, err_str, self->swp_name, detect_cls); + return EVENT_TRANSVR_TASK_FAIL; +} + + +static int +initfunc_qsfp_handle_power_mode(struct transvr_obj_s *self) { + + int err_code = EVENT_TRANSVR_EXCEP_INIT; + int power_class = DEBUG_TRANSVR_INT_VAL; + int hpmod_retry = 3; + int lpower_config = 1; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + unsigned long hpmod_delay = 500; /* msec */ + struct transvr_worker_s *task_p = NULL; + + /* Handle power mode for IOEXP */ + power_class = __qsfp_get_power_cls(self, 0); + switch (power_class) { + case 1: /* Case: Low power mode (Class = 1) */ + err_code = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (err_code < 0){ + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + return EVENT_TRANSVR_TASK_DONE; + + case 2: /* Case: High power mode (Class > 1) */ + case 3: + case 4: + case 5: + case 6: + case 7: + task_p = transvr_task_creat(self, + taskfunc_qsfp_set_hpmod, + taskfunc_post_handle_task_state, + "transvr_init_qsfp"); + if (!task_p) { + snprintf(err_msg, sizeof(err_msg), "Setup lpmod fail :%d", err_code); + goto err_initfunc_qsfp_handle_power_mode; + } + transvr_task_set_retry(task_p, hpmod_retry); + transvr_task_set_delay(task_p, hpmod_delay); + return EVENT_TRANSVR_TASK_WAIT; + + default: + break; + } + snprintf(err_msg, sizeof(err_msg), "Exception case"); + goto err_initfunc_qsfp_handle_power_mode; + +err_initfunc_qsfp_handle_power_mode: + SWPS_INFO("%s: %s :%s \n", __func__, err_msg, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +initfunc_qsfp28_handle_cdr(struct transvr_obj_s *self) { + + uint8_t DEFAULT_VAL_CDR = 0xff; + int CDR_FUNC_EXISTED = 0x3; + int show_err = 1; + int err_val = EVENT_TRANSVR_TASK_FAIL; + char *err_msg = DEBUG_TRANSVR_STR_VAL; + char *func_str = "initfunc_qsfp28_handle_cdr"; + + err_val = __qsfp_get_cdr_present(self, 0); + if ( (err_val < 0) || + (err_val == DEBUG_TRANSVR_HEX_VAL) ) { + err_msg = "detect cdr_present fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + if (err_val == CDR_FUNC_EXISTED) { + err_val = _common_set_uint8_attr(self, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->addr_cdr, + self->eeprom_map_p->offset_cdr, + DEFAULT_VAL_CDR, + &(self->cdr), + func_str, + show_err); + if (err_val < 0) { + err_msg = "set CDR fail!"; + goto err_taskfunc_qsfp_handle_cdr_1; + } + } + return EVENT_TRANSVR_TASK_DONE; + +err_taskfunc_qsfp_handle_cdr_1: + SWPS_INFO("%s: %s :%d :%s\n", + func_str, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + +/* ========== Object functions for Final State Machine ========== + */ +int +is_plugged(struct transvr_obj_s *self){ + + int limit = 63; + int present = DEBUG_TRANSVR_INT_VAL; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + struct ioexp_obj_s *ioexp_p = self->ioexp_obj_p; + + if (!ioexp_p) { + snprintf(emsg, limit, "ioexp_p is null!"); + goto err_is_plugged_1; + } + present = ioexp_p->get_present(ioexp_p, self->ioexp_virt_offset); + switch (present){ + case 0: + return 1; + case 1: + return 0; + case ERR_IOEXP_UNINIT: + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + default: + if (ioexp_p->state == STATE_IOEXP_INIT){ + snprintf(emsg, limit, "ioexp_p not ready!"); + goto err_is_plugged_1; + } + break; + } + SWPS_INFO("%s: Exception case! :%d :%d\n", + __func__, present, ioexp_p->state); + return 0; + +err_is_plugged_1: + SWPS_DEBUG("%s: %s\n", __func__, emsg); + return 0; +} + + +static int +detect_transvr_type(struct transvr_obj_s* self){ + + int type = TRANSVR_TYPE_ERROR; + + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + type = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + + /* Case: 1. Wait transceiver I2C module. + * 2. Transceiver I2C module failure. + * Note: 1. SFF allow maximum transceiver initial time is 2 second. So, there + * are exist some case that we need to wait transceiver. + * For these case, we keeps status on "TRANSVR_TYPE_UNPLUGGED", than + * state machine will keep trace with it. + * 2. There exist some I2C failure case we need to handle. Such as user + * insert the failure transceiver, or any reason cause it abnormal. + */ + if (type < 0){ + switch (type) { + case -EIO: + SWPS_DEBUG("%s: %s smbus return:-5 (I/O error)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + case -ENXIO: + SWPS_DEBUG("%s: %s smbus return:-6 (No such device or address)\n", + __func__, self->swp_name); + return TRANSVR_TYPE_UNPLUGGED; + default: + break; + } + SWPS_INFO("%s: %s unexpected smbus return:%d \n", + __func__, self->swp_name, type); + return TRANSVR_TYPE_ERROR; + } + /* Identify valid transceiver type */ + switch (type){ + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + break; + case TRANSVR_TYPE_UNKNOW_1: + case TRANSVR_TYPE_UNKNOW_2: + type = TRANSVR_TYPE_UNKNOW_2; + break; + default: + SWPS_DEBUG("%s: unknow type:0x%02x \n", __func__, type); + type = TRANSVR_TYPE_ERROR; + break; + } + return type; +} + + +static int +detect_transvr_state(struct transvr_obj_s *self, + int result[2]){ + /* [return] [result-0] [result-1] + * 0 STATE_TRANSVR_CONNECTED TRANSVR_TYPE_FAKE + * 0 STATE_TRANSVR_DISCONNECTED TRANSVR_TYPE_UNPLUGGED + * 0 STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * 0 STATE_TRANSVR_INIT / + * 0 STATE_TRANSVR_SWAPPED + * 0 STATE_TRANSVR_CONNECTED + * ERR_TRNASVR_BE_ISOLATED STATE_TRANSVR_ISOLATED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_I2C_CRASH STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_ERROR + * ERR_TRANSVR_UNEXCPT STATE_TRANSVR_UNEXCEPTED TRANSVR_TYPE_UNKNOW_1/2 + */ + result[0] = STATE_TRANSVR_UNEXCEPTED; /* For return state */ + result[1] = TRANSVR_TYPE_ERROR; /* For return type */ + + /* Case1: Fake type */ + if (self->type == TRANSVR_TYPE_FAKE){ + result[0] = STATE_TRANSVR_CONNECTED; + result[1] = TRANSVR_TYPE_FAKE; + return 0; + } + /* Case2: Transceiver unplugged */ + if (!is_plugged(self)){ + result[0] = STATE_TRANSVR_DISCONNECTED; + result[1] = TRANSVR_TYPE_UNPLUGGED; + return 0; + } + /* Case3: Transceiver be isolated */ + if (self->state == STATE_TRANSVR_ISOLATED){ + result[0] = STATE_TRANSVR_ISOLATED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case4: Transceiver plugged */ + result[1] = detect_transvr_type(self); + /* Case4.1: I2C topology crash + * Note : There are some I2C issues cause by transceiver/cables. + * We need to check topology status when user insert it. + * But in this step, we can't not ensure this is the issues + * port. So, it return the ERR_TRANSVR_I2C_CRASH, then upper + * layer will diagnostic I2C topology. + */ + if (check_channel_tier_1() < 0) { + SWPS_INFO("%s: %s detect I2C crash :%d\n", + __func__, self->swp_name, self->state); + result[0] = STATE_TRANSVR_UNEXCEPTED; + result[1] = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_I2C_CRASH; + } + /* Case4.2: System initial not ready, + * Note : Sometime i2c channel or transceiver EEPROM will delay that will + * cause system in inconsistent state between EEPROM and IOEXP. + * In this case, SWP transceiver object keep state at LINK_DOWN + * to wait system ready. + * By the way, State Machine will handle these case. + */ + if (result[1] == TRANSVR_TYPE_UNPLUGGED){ + result[0] = STATE_TRANSVR_DISCONNECTED; + return 0; + } + /* Case4.3: Error transceiver type */ + if (result[1] == TRANSVR_TYPE_ERROR){ + result[0] = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s detect error type\n", __func__, self->swp_name); + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard!"); + return ERR_TRNASVR_BE_ISOLATED; + } + /* Case3.3: Unknow transceiver type */ + if ((result[1] == TRANSVR_TYPE_UNKNOW_1) || + (result[1] == TRANSVR_TYPE_UNKNOW_2) ){ + result[0] = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + /* Case3.4: During initial process */ + if (self->state == STATE_TRANSVR_INIT){ + result[0] = STATE_TRANSVR_INIT; + return 0; + } + /* Case3.5: Transceiver be swapped */ + if (self->type != result[1]){ + result[0] = STATE_TRANSVR_SWAPPED; + return 0; + } + /* Case3.6: Link up state */ + result[0] = STATE_TRANSVR_CONNECTED; + return 0; +} + + +int +_sfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = _sfp_get_comp_extended(self); + + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_25G_AOC; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_25G_SR; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_25G_LR; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_25G_ER; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x0c: /* 25GBASE-CR CA-S */ + case 0x0d: /* 25GBASE-CR CA-N */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L1_25G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_10_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _sfp_get_comp_10g_eth_comp(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 10G Optical (x1) */ + if ((detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + } + if ((detect_val & 0x80) == 0x80) { /* 10000000 : 10GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_1g = 0x0b; + int upper_bound_1g = 0x1A; + int lower_bound_10g = 0x60; + int upper_bound_10g = 0x75; + int lower_bound_25g = 0xf0; + int upper_bound_25g = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 25G */ + if ((notmal_br >= lower_bound_25g) && + (notmal_br <= upper_bound_25g) ) { + return TRANSVR_CLASS_25G; + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + /* Check 1G */ + if ((notmal_br >= lower_bound_1g) && + (notmal_br <= upper_bound_1g) ) { + return TRANSVR_CLASS_1G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_sfp_detect_class_by_1g_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + int speed_br = DEBUG_TRANSVR_INT_VAL; + int speed_tmp = DEBUG_TRANSVR_INT_VAL; + char err_str[64] = DEBUG_TRANSVR_STR_VAL; + + speed_br = _sfp_detect_if_sp_by_br(self); + detect_val = _sfp_get_comp_1g_eth_comp(self); + + if (detect_val < 0) { + snprintf(err_str, sizeof(err_str), "Detect abnormal value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + } + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 1G (x1) */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 1000BASE-SX */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_SX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x02) == 0x02) { /* 00000010 : 1000BASE-LX *3 */ + speed_tmp = TRANSVR_CLASS_OPTICAL_1G_LX; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 1000BASE-CX */ + speed_tmp = TRANSVR_CLASS_COPPER_L1_1G; + goto ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g; + } + /* Case: 1000 Base-T (x1) */ + if ((detect_val & 0x08) == 0x08) { /* 00001000 : 1000BASE-T */ + return TRANSVR_CLASS_BASE_T_1000; + } + /* Case: 100 Base */ + if ( ((detect_val & 0x10) == 0x10) || /* 00010000 : 100BASE-LX/LX10 */ + ((detect_val & 0x20) == 0x20) || /* 00100000 : 100BASE-FX */ + ((detect_val & 0x40) == 0x40) || /* 01000000 : BASE-BX10 *3 */ + ((detect_val & 0x80) == 0x80) ){ /* 10000000 : BASE-PX *3 */ + return TRANSVR_CLASS_OPTICAL_100; + } + /* Case: ERROR */ + snprintf(err_str, sizeof(err_str), "Case:ERROR, value:%d", detect_val); + goto err_p_sfp_detect_class_by_1g_ethernet; + +ok_sfp_detect_class_by_1g_ethernet_4_check_br_10g: + switch (speed_br) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_1G: + return speed_tmp; + case TRANSVR_CLASS_10G: + goto ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G; + } + +ok_sfp_detect_class_by_1g_ethernet_4_transfer_10G: + switch (speed_tmp) { + case TRANSVR_CLASS_OPTICAL_1G_SX: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case TRANSVR_CLASS_OPTICAL_1G_LX: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case TRANSVR_CLASS_COPPER_L1_1G: + return TRANSVR_CLASS_COPPER_L1_10G; + default: + break; + } + snprintf(err_str, sizeof(err_str), "transfer_1to10 fail, speed:%d", speed_tmp); + goto err_p_sfp_detect_class_by_1g_ethernet; + +err_p_sfp_detect_class_by_1g_ethernet: + SWPS_INFO("%s: %s :%s", __func__, err_str, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int is_active = 0; + int conn_val = DEBUG_TRANSVR_INT_VAL; + int check_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _sfp_detect_if_sp_by_br(self); + conn_val = _sfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 */ + case 0x0d: /* MPO 2x16 */ + /* + * ToDo: Need verify Optical Pigtail + */ + goto ok_sfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + /* + * ToDo: Need check ACC use case + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + case 0x23: /* No separable connector */ + /* + * ToDo: Standard not clear, not all transceiver vendor + * have the same defined + */ + goto ok_sfp_detect_class_by_feature_4_check_active_passive; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_check_active_passive: + check_val = _sfp_get_cable_tech(self); + switch(check_val) { + case 0x00: /* Unspecified */ + goto ok_sfp_detect_class_by_feature_4_unknow; + case 0x04: /* Passive */ + goto ok_sfp_detect_class_by_feature_4_copper; + case 0x08: /* Active */ + is_active = 1; + goto ok_sfp_detect_class_by_feature_4_aoc; + default: + snprintf(err_msg, sizeof(err_msg), + "_sfp_get_cable_tech return Non define value:%d", + check_val); + break; + } + goto err_sfp_detect_class_by_feature_1; + +ok_sfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_25G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_25G_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_25G_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_25G_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_25G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_S_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_S_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_S_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + case TRANSVR_CLASS_1G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_1G_SX; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_1G_LX; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_1G_EX; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_1G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_sfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_OPTICAL_25G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_S_AOC; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_OPTICAL_1G_AOC; + default: + break; + } + goto ok_sfp_detect_class_by_feature_4_unknow; + +ok_sfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_25G: + return TRANSVR_CLASS_COPPER_L1_25G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L1_10G; + case TRANSVR_CLASS_1G: + return TRANSVR_CLASS_COPPER_L1_1G; + default: + return TRANSVR_CLASS_COPPER; + } + +ok_sfp_detect_class_by_feature_4_unknow: + return TRANSVR_CLASS_UNSPECIFIED; + +err_sfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +sft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _sfp_detect_class_by_extend_comp(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 10G Compliance */ + detect_val = _sfp_detect_class_by_10_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check 1G Compliance */ + detect_val = _sfp_detect_class_by_1g_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_BASE_T_1000: + case TRANSVR_CLASS_OPTICAL_100: + /* + * ToDo: Need Check 0.1G + */ + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_COPPER_L1_10G: + /* Transfer speed case + * => Example: Raycom 10G DAC + */ + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 1G_eth:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Check by connector, br, wavelength */ + detect_val = _sfp_detect_class_by_feature(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_OPTICAL_1G: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_COPPER: + case TRANSVR_CLASS_COPPER_L1_1G: + case TRANSVR_CLASS_COPPER_L1_10G: + case TRANSVR_CLASS_COPPER_L1_25G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined get_connector:%d", + detect_val); + goto err_sft_detect_transceiver_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sft_detect_transceiver_class_1; + +err_sft_detect_transceiver_class_1: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_sfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_trident2_if_type_1; + +err_sfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch(transvr_cls) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SR); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_KR); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SFI); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_IF_GMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_sfp_set_tomahawk_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_set_tomahawk_if_type_1; + +err_sfp_set_tomahawk_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_sfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_sfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = sft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _sfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TRIDENT_3: + case BCM_CHIP_TYPE_TOMAHAWK: + return _sfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _sfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_sfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = sft_detect_transvr_class(self); + switch(detect_val) { + case TRANSVR_CLASS_ERROR: + case TRANSVR_CLASS_UNSPECIFIED: + break; + /* 25G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 25G COPPER */ + case TRANSVR_CLASS_COPPER_L1_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + /* 10G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_10G_S_AOC: + case TRANSVR_CLASS_OPTICAL_10G_S_SR: + case TRANSVR_CLASS_OPTICAL_10G_S_LR: + case TRANSVR_CLASS_OPTICAL_10G_S_ER: + case TRANSVR_CLASS_OPTICAL_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G COPPER */ + case TRANSVR_CLASS_COPPER_L1_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 1G OPTICAL */ + case TRANSVR_CLASS_OPTICAL_1G_AOC: + case TRANSVR_CLASS_OPTICAL_1G_SX: + case TRANSVR_CLASS_OPTICAL_1G_LX: + case TRANSVR_CLASS_OPTICAL_1G_EX: + case TRANSVR_CLASS_OPTICAL_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G COPPER */ + case TRANSVR_CLASS_COPPER_L1_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 1G BASE_T */ + case TRANSVR_CLASS_BASE_T_1000: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + /* 100 Base */ + case TRANSVR_CLASS_OPTICAL_100: + return snprintf(result, lmax, TRANSVR_IF_SP_100); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + detect_val); + goto err_sfp_detect_if_speed_1; + } + /* Check by BR */ + detect_val = _sfp_detect_if_sp_by_br(self); + switch (detect_val) { + case TRANSVR_CLASS_25G: + return snprintf(result, lmax, TRANSVR_IF_SP_25G); + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_1G: + return snprintf(result, lmax, TRANSVR_IF_SP_1G); + default: + break; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_sfp_detect_if_speed_1; + +err_sfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +sfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_sfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_class_by_extend_comp(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_extended(self); + switch(detect_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + + case 0x01: /* 100G AOC (Active Optical Cable) or 25GAUI C2M */ + case 0x18: /* 100G AOC or 25GAUI C2M AOC. */ + return TRANSVR_CLASS_OPTICAL_100G_AOC; + + case 0x06: /* 100G CWDM4 */ + case 0x09: /* Obsolete (assigned before 100G CWDM4 MSA required FEC) */ + case 0x17: /* 100G CLR4 */ + case 0x1A: /* 100GE-DWDM2 */ + return TRANSVR_CLASS_OPTICAL_100G; + + case 0x02: /* 100GBASE-SR4 or 25GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_100G_SR4; + + case 0x03: /* 100GBASE-LR4 or 25GBASE-LR */ + return TRANSVR_CLASS_OPTICAL_100G_LR4; + + case 0x04: /* 100GBASE-ER4 or 25GBASE-ER */ + return TRANSVR_CLASS_OPTICAL_100G_ER4; + + case 0x07: /* 100G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_100G_PSM4; + + case 0x12: /* 40G PSM4 Parallel SMF */ + return TRANSVR_CLASS_OPTICAL_40G; + + case 0x11: /* 4 x 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + + case 0x10: /* 40GBASE-ER4 */ + return TRANSVR_CLASS_OPTICAL_40G_ER4; + + case 0x08: /* 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. */ + case 0x0b: /* 100GBASE-CR4 or 25GBASE-CR CA-L */ + case 0x19: /* 100G ACC or 25GAUI C2M ACC. */ + return TRANSVR_CLASS_COPPER_L4_100G; + + default: + break; + } + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_class_by_10_40_100_ethernet(struct transvr_obj_s* self) { + /* Reference: SFF-8472 (v12.2) + */ + int detect_val = DEBUG_TRANSVR_INT_VAL; + + detect_val = _qsfp_get_comp_10_40_100_ethernet(self); + /* Case: Unspecified */ + if (detect_val == 0x00) { + return TRANSVR_CLASS_UNSPECIFIED; + } + /* Case: 40G Optical */ + if ((detect_val & 0x01) == 0x01) { /* 00000001 : 40G Active Cable (XLPPI) */ + return TRANSVR_CLASS_OPTICAL_40G_AOC; + } + if ((detect_val & 0x04) == 0x04) { /* 00000100 : 40GBASE-SR4 */ + return TRANSVR_CLASS_OPTICAL_40G_SR4; + } + if ( (detect_val & 0x02) == 0x02) { /* 00000010 : 40GBASE-LR4 */ + return TRANSVR_CLASS_OPTICAL_40G_LR4; + } + if ( (detect_val & 0x08) == 0x08) { /* 00001000 : 40GBASE-CR4 */ + return TRANSVR_CLASS_COPPER_L4_40G; + } + /* Case: 10G Optical */ + if ( (detect_val & 0x10) == 0x10) { /* 00010000 : 10GBASE-SR */ + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + } + if ( ((detect_val & 0x20) == 0x20) || /* 00100000 : 10GBASE-LR */ + ((detect_val & 0x40) == 0x40) ){ /* 01000000 : 10GBASE-LRM */ + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + } + /* Case: Extend Compliance */ + if ( ((detect_val & 0x80) == 0x80) ){ /* 10000000 : Use Extend Compliance */ + return TRANSVR_CLASS_EXTEND_COMP; + } + /* Case: ERROR */ + SWPS_INFO("%s: Unexcept value:0x%02x\n :%s", + __func__, detect_val, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_detect_if_sp_by_br(struct transvr_obj_s* self) { + + int lower_bound_10g = 0x10; + int upper_bound_10g = 0x25; + int lower_bound_40g = 0x60; + int upper_bound_40g = 0x75; + int lower_bound_100g = 0x60; + int upper_bound_100g = 0x75; + int used_extend_br = 0xff; + int notmal_br = DEBUG_TRANSVR_INT_VAL; + int extend_br = DEBUG_TRANSVR_INT_VAL; + + notmal_br = (int)(self->br); /* updated by update_all() */ + /* Check 40G */ + if ((notmal_br >= lower_bound_40g) && + (notmal_br <= upper_bound_40g) ) { + return TRANSVR_CLASS_40G; + } + /* Check 100G */ + if (notmal_br == used_extend_br) { + extend_br = (int)(self->extbr); /* updated by update_all() */ + if ((extend_br >= lower_bound_100g) && + (extend_br <= upper_bound_100g) ) { + return TRANSVR_CLASS_100G; + } + } + /* Check 10G */ + if ((notmal_br >= lower_bound_10g) && + (notmal_br <= upper_bound_10g) ) { + return TRANSVR_CLASS_10G; + } + return TRANSVR_CLASS_UNSPECIFIED; +} + + +int +_qsfp_detect_class_by_feature(struct transvr_obj_s* self) { + /* Reference: SFF-8024 (v3.8) + */ + int conn_val = DEBUG_TRANSVR_INT_VAL; + int wave_len = DEBUG_TRANSVR_INT_VAL; + int speed_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + speed_val = _qsfp_detect_if_sp_by_br(self); + conn_val = _qsfp_get_connector_type(self); + + switch(conn_val) { + case 0x00: /* Unspecified */ + return TRANSVR_CLASS_UNSPECIFIED; + case 0x07: /* LC (Lucent Connector) */ + case 0x0b: /* Optical Pigtail */ + case 0x0c: /* MPO 1x12 (Multifiber Parallel Optic) */ + case 0x0d: /* MPO 2x16 */ + goto ok_qsfp_detect_class_by_feature_4_optiocal; + case 0x21: /* Copper pigtail */ + goto ok_qsfp_detect_class_by_feature_4_copper; + case 0x23: /* No separable connector */ + if ((_qsfp_get_comp_fc_link_length(self) > 0) || + (_qsfp_get_comp_fc_trans_tech(self) > 0) || + (_qsfp_get_comp_fc_trans_media(self) > 0) || + (_qsfp_get_comp_fc_speed(self) > 0) ) { + goto ok_qsfp_detect_class_by_feature_4_aoc; + } + goto ok_qsfp_detect_class_by_feature_4_copper; + default: + snprintf(err_msg, sizeof(err_msg), + "_qsfp_get_connector_type return Non define value:%d", + conn_val); + goto err_qsfp_detect_class_by_feature_1; + } + return TRANSVR_CLASS_UNSPECIFIED; + +ok_qsfp_detect_class_by_feature_4_optiocal: + wave_len = _common_count_wavelength(self, + self->wavelength[0], + self->wavelength[1]); + switch(speed_val) { + case TRANSVR_CLASS_100G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_100G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_100G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_100G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_100G; + + case TRANSVR_CLASS_40G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_40G_SR4; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_40G_LR4; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_40G_ER4; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_40G; + + case TRANSVR_CLASS_10G: + switch (wave_len) { + case VAL_OPTICAL_WAVELENGTH_SR: + return TRANSVR_CLASS_OPTICAL_10G_Q_SR; + case VAL_OPTICAL_WAVELENGTH_LR: + return TRANSVR_CLASS_OPTICAL_10G_Q_LR; + case VAL_OPTICAL_WAVELENGTH_ER: + return TRANSVR_CLASS_OPTICAL_10G_Q_ER; + default: + break; + } + return TRANSVR_CLASS_OPTICAL_10G; + + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_aoc: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_OPTICAL_100G_AOC; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_OPTICAL_40G_AOC; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_OPTICAL_10G_Q_AOC; + default: + return TRANSVR_CLASS_OPTICAL; + } + +ok_qsfp_detect_class_by_feature_4_copper: + switch(speed_val) { + case TRANSVR_CLASS_100G: + return TRANSVR_CLASS_COPPER_L4_100G; + case TRANSVR_CLASS_40G: + return TRANSVR_CLASS_COPPER_L4_40G; + case TRANSVR_CLASS_10G: + return TRANSVR_CLASS_COPPER_L4_10G; + default: + return TRANSVR_CLASS_COPPER; + } + +err_qsfp_detect_class_by_feature_1: + SWPS_INFO("%s: %s\n :%s", + __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +qsft_detect_transvr_class(struct transvr_obj_s* self) { + + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Check Extended Compliance */ + detect_val = _qsfp_detect_class_by_extend_comp(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_COPPER_L4_100G: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined extend_comp:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check 10/40G/100G Ethernet Compliance */ + detect_val = _qsfp_detect_class_by_10_40_100_ethernet(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_COPPER_L4_40G: + return detect_val; + case TRANSVR_CLASS_EXTEND_COMP: + /* Format incorrect case (We already checked the Extend + * Compliance is 0 + */ + snprintf(err_msg, sizeof(err_msg), + "Transceiver format incorrect"); + goto err_qsft_detect_transvr_class_1; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined 10/40/100:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Check by Connector type, BR and wavelength */ + detect_val = _qsfp_detect_class_by_feature(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL: + case TRANSVR_CLASS_COPPER_L4_100G: + case TRANSVR_CLASS_COPPER_L4_40G: + case TRANSVR_CLASS_COPPER_L4_10G: + case TRANSVR_CLASS_COPPER: + return detect_val; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined connector:%d", + detect_val); + goto err_qsft_detect_transvr_class_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), + "Can not identify!"); + goto err_qsft_detect_transvr_class_1; + +err_qsft_detect_transvr_class_1: + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return TRANSVR_CLASS_ERROR; +} + + +int +_qsfp_set_trident2_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: LR4 or LR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: /* Need Check: ER4 or ER */ + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_IF_XGMII); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_tomahawk_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result){ + + int lmax = 8; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + switch (transvr_cls) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_KR4); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + return snprintf(result, lmax, TRANSVR_IF_SR4); + /* Copper */ + case TRANSVR_CLASS_COPPER: + return snprintf(result, lmax, TRANSVR_IF_KR4); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined value:%d", + transvr_cls); + goto err_qsfp_set_trident2_if_type_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_set_trident2_if_type_1; + +err_qsfp_set_trident2_if_type_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s\n :%s", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +_qsfp_set_bf_tofino_if_type(struct transvr_obj_s* self, + int transvr_cls, + char *result) { + /* (TBD) + * Due to BF looks like doesn't have interface type. + * We bypass it currently. + */ + int lmax = 8; + return snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); +} + + +int +_qsfp_detect_if_type(struct transvr_obj_s* self, + char *result){ + + int lmax = 8; + int detect_cls = DEBUG_TRANSVR_INT_VAL; + + detect_cls = qsft_detect_transvr_class(self); + switch (self->chipset_type) { + case BCM_CHIP_TYPE_TRIDENT_2: + return _qsfp_set_trident2_if_type(self, detect_cls, result); + + case BCM_CHIP_TYPE_TRIDENT_3: + case BCM_CHIP_TYPE_TOMAHAWK: + return _qsfp_set_tomahawk_if_type(self, detect_cls, result); + + case BF_CHIP_TYPE_TOFINO: + return _qsfp_set_bf_tofino_if_type(self, detect_cls, result); + + default: + SWPS_INFO("%s: non-defined chipset_type:%d :%s\n", + __func__, self->chipset_type, self->swp_name); + break; + } + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_type(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 8; + char tmp_result[8] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_type(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_qsfp_detect_if_speed(struct transvr_obj_s* self, + char *result){ + int lmax = 16; + int detect_val = DEBUG_TRANSVR_INT_VAL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + detect_val = qsft_detect_transvr_class(self); + switch (detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + case TRANSVR_CLASS_ERROR: + break; + /* 100G Optical */ + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 100G Copper */ + case TRANSVR_CLASS_COPPER_L4_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + /* 40G Optical */ + case TRANSVR_CLASS_OPTICAL_40G: + case TRANSVR_CLASS_OPTICAL_40G_AOC: + case TRANSVR_CLASS_OPTICAL_40G_SR4: + case TRANSVR_CLASS_OPTICAL_40G_LR4: + case TRANSVR_CLASS_OPTICAL_40G_ER4: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 40G Copper */ + case TRANSVR_CLASS_COPPER_L4_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + /* 10G Optical */ + case TRANSVR_CLASS_OPTICAL_10G: + case TRANSVR_CLASS_OPTICAL_10G_Q_AOC: + case TRANSVR_CLASS_OPTICAL_10G_Q_SR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_LR: /* Need Check: SR4 or SR */ + case TRANSVR_CLASS_OPTICAL_10G_Q_ER: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* 10G Copper */ + case TRANSVR_CLASS_COPPER_L4_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + /* Optical */ + case TRANSVR_CLASS_OPTICAL: + break; + /* Copper */ + case TRANSVR_CLASS_COPPER: + break; + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined class case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Check br and extbr */ + detect_val = _qsfp_detect_if_sp_by_br(self); + switch(detect_val) { + case TRANSVR_CLASS_UNSPECIFIED: + break; + case TRANSVR_CLASS_10G: + return snprintf(result, lmax, TRANSVR_IF_SP_10G); + case TRANSVR_CLASS_40G: + return snprintf(result, lmax, TRANSVR_IF_SP_40G); + case TRANSVR_CLASS_100G: + return snprintf(result, lmax, TRANSVR_IF_SP_100G); + default: + snprintf(err_msg, sizeof(err_msg), + "Detect undefined BR case:%d", + detect_val); + goto err_qsfp_detect_if_speed_1; + } + /* Exception case: Can't verify */ + snprintf(err_msg, sizeof(err_msg), "Can not identify!"); + goto err_qsfp_detect_if_speed_1; + +err_qsfp_detect_if_speed_1: + snprintf(result, lmax, TRANSVR_UEVENT_UNKNOW); + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + return ERR_TRANSVR_ABNORMAL; +} + + +int +qsfp_get_if_speed(struct transvr_obj_s *self, + char *buf_p){ + + int lmax = 16; + char tmp_result[16] = DEBUG_TRANSVR_STR_VAL; + + if (self->state != STATE_TRANSVR_CONNECTED) { + return snprintf(buf_p, lmax, "%d\n", self->state); + } + if (_qsfp_detect_if_speed(self, tmp_result) < 0) { + return snprintf(buf_p, lmax, "%d\n", ERR_TRANSVR_ABNORMAL); + } + return snprintf(buf_p, lmax, "%s\n", tmp_result); +} + + +int +_common_set_lane_map_str(struct transvr_obj_s* self, + char *result) { + int i = 0; + int tmp_val = 0; + char tmp_str[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + char err_msg[LEN_TRANSVR_L_STR] = DEBUG_TRANSVR_STR_VAL; + + memset(result, 0, LEN_TRANSVR_L_STR); + snprintf(result, LEN_TRANSVR_L_STR, "%s=", TRANSVR_UEVENT_KEY_LANE); + + for (i=0; ilane_id); i++) { + tmp_val = self->lane_id[i]; + if (tmp_val < 1) { + break; + } + if (tmp_val > 256) { + snprintf(err_msg, sizeof(err_msg), + "detect abnormal value:%d", tmp_val); + goto err_common_set_lane_map_str_1; + } + memset(tmp_str, 0, sizeof(tmp_str)); + if (i == 0) { + snprintf(tmp_str, LEN_TRANSVR_L_STR, "%d", tmp_val); + } else { + snprintf(tmp_str, LEN_TRANSVR_L_STR, ",%d", tmp_val); + } + strncat(result, tmp_str, LEN_TRANSVR_L_STR); + } + if (i == 0) { + goto err_common_set_lane_map_str_2; + } + return 0; + +err_common_set_lane_map_str_1: + SWPS_INFO("%s: %s", __func__, err_msg); +err_common_set_lane_map_str_2: + snprintf(result, LEN_TRANSVR_L_STR, "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + return EVENT_TRANSVR_TASK_FAIL; +} + + +int +_common_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action, + int (*detect_if_type)(struct transvr_obj_s *self, char *result), + int (*detect_if_speed)(struct transvr_obj_s *self, char *result), + int send_anyway) { + + char *uevent_envp[4]; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + char tmp_str[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_1[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_2[32] = DEBUG_TRANSVR_STR_VAL; + char tmp_str_3[64] = DEBUG_TRANSVR_STR_VAL; + + if (TRANSVR_UEVENT_ENABLE != 1) { + return ERR_TRANSVR_NOTSUPPORT; + } + if (_common_get_if_lane(self, tmp_str) < 0) { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, TRANSVR_UEVENT_UNKNOW); + } else { + snprintf(tmp_str_3, sizeof(tmp_str_3), + "%s=%s", TRANSVR_UEVENT_KEY_LANE, tmp_str); + } + switch (u_action) { + case KOBJ_ADD: + /* Detect type */ + if (detect_if_type(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface type fail!"); + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, tmp_str); + uevent_envp[0] = tmp_str_1; + /* Detect speed */ + if (detect_if_speed(self, tmp_str) < 0) { + snprintf(err_msg, sizeof(err_msg), "%s", "Detect interface speed fail!"); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_fail; + } + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, tmp_str); + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + case KOBJ_REMOVE: + snprintf(tmp_str_1, sizeof(tmp_str_1), "%s=%s", TRANSVR_UEVENT_KEY_IF, TRANSVR_UEVENT_UNKNOW); + snprintf(tmp_str_2, sizeof(tmp_str_2), "%s=%s", TRANSVR_UEVENT_KEY_SP, TRANSVR_UEVENT_UNKNOW); + uevent_envp[0] = tmp_str_1; + uevent_envp[1] = tmp_str_2; + uevent_envp[2] = tmp_str_3; + uevent_envp[3] = NULL; + goto private_common_send_uevent_4_send; + + default: + snprintf(err_msg, sizeof(err_msg), "kobject_action:%d not support", u_action); + goto private_common_send_uevent_4_fail; + } + snprintf(err_msg, sizeof(err_msg), "%s", "Exception case"); + goto private_common_send_uevent_4_fail; + +private_common_send_uevent_4_fail: + SWPS_INFO("%s: %s :%s\n", __func__, err_msg, self->swp_name); + if (send_anyway) { + goto private_common_send_uevent_4_send; + } + return ERR_TRANSVR_UEVENT_FAIL; + +private_common_send_uevent_4_send: + return kobject_uevent_env(&(self->transvr_dev_p->kobj), + u_action, + uevent_envp); +} + +int +sfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_sfp_detect_if_type, + &_sfp_detect_if_speed, + send_anyway); +} + + +int +qsfp_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + int send_anyway = 1; + return _common_send_uevent(self, + u_action, + &_qsfp_detect_if_type, + &_qsfp_detect_if_speed, + send_anyway); +} + + +int +fake_send_uevent(struct transvr_obj_s* self, + enum kobject_action u_action) { + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + + int err; + int detect_result[2]; + int current_state = STATE_TRANSVR_UNEXCEPTED; + int current_type = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_NEW) { + if (_transvr_init_handler(self) < 0){ + return ERR_TRANSVR_INIT_FAIL; + } + } + err = detect_transvr_state(self, detect_result); + if (err < 0) { + return err; + } + /* In Direct mode, driver only detect transceiver when user call driver interface + * which on sysfs. So it only need consider the state of Transceiver. + */ + current_state = detect_result[0]; + current_type = detect_result[1]; + + switch (current_state){ + + case STATE_TRANSVR_DISCONNECTED: /* Transceiver is not plugged */ + self->state = current_state; + self->type = current_type; + return ERR_TRANSVR_UNPLUGGED; + + case STATE_TRANSVR_INIT: /* Transceiver is plugged, system not ready */ + return ERR_TRANSVR_UNINIT; + + case STATE_TRANSVR_ISOLATED: /* Transceiver is plugged, but has some issues */ + return ERR_TRNASVR_BE_ISOLATED; + + case STATE_TRANSVR_CONNECTED: /* Transceiver is plugged, system is ready */ + self->state = current_state; + self->type = current_type; + return 0; + + case STATE_TRANSVR_SWAPPED: /* Transceiver is plugged, system detect user changed */ + self->type = current_type; + if (reload_transvr_obj(self, current_type) < 0){ + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_UNEXCPT; + } + self->state = current_state; + return 0; + + case STATE_TRANSVR_UNEXCEPTED: /* Transceiver type or state is unexpected case */ + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return ERR_TRANSVR_UNEXCPT; + + default: + SWPS_INFO("%s: state:%d not in define.\n", __func__, current_state); + break; + } + return ERR_TRANSVR_UNEXCPT; +} + + +static int +_is_except_happened_4_pmode(struct transvr_obj_s* self, + int new_state) { + + int event_chk = 0; + + if (self->temp == 0){ + return 0; + } + switch (new_state) { + case STATE_TRANSVR_INIT: + event_chk = EVENT_TRANSVR_EXCEP_INIT; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_CONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_UP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_DISCONNECTED: + event_chk = EVENT_TRANSVR_EXCEP_DOWN; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_SWAPPED: + event_chk = EVENT_TRANSVR_EXCEP_SWAP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_UNEXCEPTED: + event_chk = EVENT_TRANSVR_EXCEP_EXCEP; + goto check_event_happened_4_pmode; + + case STATE_TRANSVR_ISOLATED: + event_chk = EVENT_TRANSVR_EXCEP_ISOLATED; + goto check_event_happened_4_pmode; + + default: + SWPS_INFO("%s: unexcepted case:%d\n", __func__, new_state); + break; + } + return 0; + +check_event_happened_4_pmode: + if (self->temp == event_chk){ + return 1; + } + return 0; +} + + +int +common_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + /* [Return Value]: + * ERR_TRANSVR_UNINIT : (1) Initial not ready + * ERR_TRANSVR_UNPLUGGED : (1) Any -> Down + * ERR_TRANSVR_TASK_BUSY : (1) Wait Initial task + * ERR_TRANSVR_UNEXCPT : (1) Initial fail + * (2) Task fail + * (3) Reload fail + * ERR_TRNASVR_BE_ISOLATED : (1) Already be isolated + * OK Case (return 0) : (1) action_4_connected + * (2) action_4_nothing (initial retry) + */ + int curr_state[2]; + int old_state = self->state; + int old_type = self->type; + int new_state = STATE_TRANSVR_UNEXCEPTED; + int new_type = TRANSVR_TYPE_ERROR; + int return_val = ERR_TRANSVR_UNEXCPT; + + /* Never initial */ + if (self->state == STATE_TRANSVR_NEW) { + goto comfsm_action_4_reinit_obj; + } + /* Detect current state */ + switch (detect_transvr_state(self, curr_state)) { + case 0: + new_state = curr_state[0]; + new_type = curr_state[1]; + break; + + case ERR_TRNASVR_BE_ISOLATED: + new_state = STATE_TRANSVR_ISOLATED; + new_type = old_type; + break; + + case ERR_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case ERR_TRANSVR_UNEXCPT: + default: + new_state = STATE_TRANSVR_UNEXCEPTED; + new_type = old_type; + } + /* State handling */ + switch (old_state) { + case STATE_TRANSVR_INIT: /* INIT -> */ + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 1-1: UP -> INIT */ + SWPS_INFO("Detect %s is present. :1-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 1-2: UP -> UP */ + return_val = 0; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 1-3: UP -> DOWN */ + SWPS_INFO("Detect %s is removed. :1-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 1-4: UP -> SWAP */ + SWPS_INFO("Detect %s is swapped. :1-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 1-5: UP -> UNEXPET */ + SWPS_INFO("Detect %s has error. :1-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 1-6: UP -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :1-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_DISCONNECTED: + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 2-1: DOWN -> INIT */ + SWPS_INFO("Detect %s is present. :2-1\n",self->swp_name); + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 2-2: DOWN -> UP */ + SWPS_INFO("Detect %s is present. :2-2\n",self->swp_name); + goto comfsm_action_4_reinit_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 2-3: DOWN -> DOWN */ + return_val = ERR_TRANSVR_UNPLUGGED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_SWAPPED: /* Case 2-4: DOWN -> SWAP */ + SWPS_INFO("Detect %s is swapped. :2-4\n",self->swp_name); + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 2-5: DOWN -> UNEXPET */ + SWPS_INFO("Detect %s has error. :2-5\n",self->swp_name); + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: /* Case 2-6: DOWN -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :2-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_UNEXCEPTED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 3-1: UNEXPET -> INIT */ + SWPS_INFO("Detect %s is present. :3-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRANSVR_UNINIT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 3-2: UNEXPET -> UP */ + SWPS_INFO("Detect %s is present. :3-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_DISCONNECTED: /* Case 3-3: UNEXPET -> DOWN */ + SWPS_INFO("Detect %s is removed. :3-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 3-4: UNEXPET -> SWAP */ + SWPS_INFO("Detect %s is swapped. :3-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + goto comfsm_action_4_reload_obj; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 3-5: UNEXPET -> UNEXPET */ + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRANSVR_UNEXCPT; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 3-6: UNEXPET -> ISOLATE */ + SWPS_INFO("Detect %s be isolated. :3-6\n",self->swp_name); + goto comfsm_action_4_isolate_obj; + + default: + break; + } + goto comfsm_action_4_unexpected; + + case STATE_TRANSVR_ISOLATED: + /* Filter out re-action */ + if (_is_except_happened_4_pmode(self, new_state)) { + goto comfsm_action_4_keep_state; + } + /* First action */ + switch (new_state) { + case STATE_TRANSVR_INIT: /* Case 4-1: ISOLATE -> INIT */ + SWPS_INFO("Detect %s internal error. :4-1\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_INIT; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_CONNECTED: /* Case 4-2: ISOLATE -> UP */ + SWPS_INFO("Detect %s internal error. :4-2\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_UP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_DISCONNECTED: /* Case 4-3: ISOLATE -> DOWN */ + SWPS_INFO("Detect %s is removed. :4-3\n",self->swp_name); + goto comfsm_action_4_disconnected; + + case STATE_TRANSVR_SWAPPED: /* Case 4-4: ISOLATE -> SWAP */ + SWPS_INFO("Detect %s internal error. :4-4\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_SWAP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_UNEXCEPTED: /* Case 4-5: ISOLATE -> UNEXPET */ + SWPS_INFO("Detect %s internal error. :4-5\n",self->swp_name); + self->temp = EVENT_TRANSVR_EXCEP_EXCEP; + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + case STATE_TRANSVR_ISOLATED: /* Case 4-6: ISOLATE -> ISOLATE */ + return_val = ERR_TRNASVR_BE_ISOLATED; + goto comfsm_action_4_keep_state; + + default: + break; + } + goto comfsm_action_4_unexpected; + + default: + break; + } + goto comfsm_action_4_unexpected; + + +comfsm_action_4_keep_state: + return return_val; + +comfsm_action_4_reinit_obj: + SWPS_DEBUG("FSM action: %s re-initial.\n", self->swp_name); + return_val = _transvr_init_handler(self); + goto comfsm_action_4_identify_event; + +comfsm_action_4_reload_obj: + SWPS_DEBUG("FSM action: %s reload.\n", self->swp_name); + self->type = new_type; + return_val = reload_transvr_obj(self, new_type); + goto comfsm_action_4_identify_event; + +comfsm_action_4_identify_event: + switch (return_val) { + case EVENT_TRANSVR_INIT_UP: + case EVENT_TRANSVR_TASK_DONE: + goto comfsm_action_4_connected; + + case EVENT_TRANSVR_INIT_DOWN: + goto comfsm_action_4_disconnected; + + case EVENT_TRANSVR_INIT_REINIT: + goto comfsm_action_4_nothing; + + case EVENT_TRANSVR_TASK_WAIT: + self->state = STATE_TRANSVR_INIT; + return ERR_TRANSVR_TASK_BUSY; + + case EVENT_TRANSVR_TASK_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_TASK_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_INIT_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_INIT_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_RELOAD_FAIL: + SWPS_INFO("%s detect EVENT_TRANSVR_RELOAD_FAIL.\n", self->swp_name); + goto comfsm_action_4_unexpected; + + case EVENT_TRANSVR_I2C_CRASH: + goto comfsm_action_4_report_i2c_crash; + + case EVENT_TRANSVR_EXCEP_ISOLATED: + goto comfsm_action_4_isolate_obj; + + default: + SWPS_INFO("%s detect undefined event:%d.\n", self->swp_name, return_val); + goto comfsm_action_4_unexpected; + } + +comfsm_action_4_nothing: + SWPS_DEBUG("FSM action: %s do nothing.\n", self->swp_name); + return 0; + +comfsm_action_4_connected: + SWPS_DEBUG("FSM action: %s Connected.\n", self->swp_name); + self->state = STATE_TRANSVR_CONNECTED; + self->type = new_type; + self->send_uevent(self, KOBJ_ADD); + _transvr_clean_retry(self); + return 0; + +comfsm_action_4_disconnected: + SWPS_DEBUG("FSM action: %s Disconnected. \n", self->swp_name); + self->state = STATE_TRANSVR_DISCONNECTED; + self->temp = EVENT_TRANSVR_TASK_DONE; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_retry(self); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNPLUGGED; + +comfsm_action_4_report_i2c_crash: + SWPS_DEBUG("FSM action: %s report I2C crash.\n", self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return ERR_TRANSVR_I2C_CRASH; + +comfsm_action_4_isolate_obj: + SWPS_DEBUG("FSM action: %s isolate.\n", self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return ERR_TRNASVR_BE_ISOLATED; + +comfsm_action_4_unexpected: + SWPS_INFO("FSM action: %s unexpected.\n", self->swp_name); + SWPS_INFO("Dump: :%d :0x%02x :%d :0x%02x\n", + old_state, old_type, new_state, new_type); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->send_uevent(self, KOBJ_REMOVE); + _transvr_clean_handler(self); + return ERR_TRANSVR_UNEXCPT; +} + + +int +fake_fsm_4_direct_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +int +fake_fsm_4_polling_mode(struct transvr_obj_s* self, + char *caller_name){ + self->state = STATE_TRANSVR_CONNECTED; + self->type = TRANSVR_TYPE_FAKE; + return 0; +} + + +/* ========== Object functions for Initial procedure ========== + */ +int +transvr_init_common(struct transvr_obj_s *self){ + /* Nothing to update */ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_fake(struct transvr_obj_s *self){ + return EVENT_TRANSVR_TASK_DONE; +} + + +int +transvr_init_sfp(struct transvr_obj_s *self){ + + int tmp_val = DEBUG_TRANSVR_INT_VAL; + int err_code = DEBUG_TRANSVR_INT_VAL; + char *err_msg = "ERR"; + + self->info = sft_detect_transvr_class(self); + /* Disable auto_config */ + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + /* Handle multi-rate */ + err_code = initfunc_sfp_handle_multi_rate_mode(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_multi_rate_mode fail!"; + goto err_transvr_init_sfp_1; + } + /* Handle 1G- RJ45 */ + tmp_val = err_code; + err_code = initfunc_sfp_handle_1g_rj45(self); + if (err_code < 0) { + err_msg = "initfunc_sfp_handle_1g_rj45 fail!"; + goto err_transvr_init_sfp_1; + } + tmp_val = (tmp_val > err_code ? tmp_val : err_code); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_sfp_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_code, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp(struct transvr_obj_s *self){ + + int err = EVENT_TRANSVR_EXCEP_EXCEP; + char *emsg = "ERR"; + + self->info = qsft_detect_transvr_class(self); + if (!self->auto_config) { + return EVENT_TRANSVR_TASK_DONE; + } + err = initfunc_qsfp_handle_power_mode(self); + if (err < 0){ + emsg = "initfunc_qsfp_handle_tx_disable fail!"; + goto err_transvr_init_qsfp; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, emsg, err, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +int +transvr_init_qsfp28(struct transvr_obj_s *self){ + + int tmp_val = EVENT_TRANSVR_EXCEP_EXCEP; + int err_val = EVENT_TRANSVR_EXCEP_EXCEP; + char *err_msg = "ERR"; + + /* Handle QSFP common */ + err_val = transvr_init_qsfp(self); + if (err_val < 0){ + err_msg = "transvr_init_qsfp fail!"; + goto err_transvr_init_qsfp28_1; + } + /* Disable auto_config */ + if (!self->auto_config) { + return err_val; + } + /* Handle CDR */ + tmp_val = err_val; + err_val = initfunc_qsfp28_handle_cdr(self); + if (err_val < 0){ + err_msg = "Handle CDR fail!"; + goto err_transvr_init_qsfp28_1; + } + tmp_val = (tmp_val > err_val ? tmp_val : err_val); + if (tmp_val > EVENT_TRANSVR_TASK_DONE) { + return tmp_val; + } + return EVENT_TRANSVR_TASK_DONE; + +err_transvr_init_qsfp28_1: + SWPS_INFO("%s: %s :%d :%s\n", + __func__, err_msg, err_val, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object Initial handler ========== + */ +static int +_is_transvr_valid(struct transvr_obj_s *self, + int type, + int state) { + /* [Return] + * 0 : OK, inserted + * EVENT_TRANSVR_INIT_DOWN : OK, removed + * EVENT_TRANSVR_INIT_FAIL : Outside error, type doesn't supported + * EVENT_TRANSVR_EXCEP_INIT : Internal error, state undefined + */ + switch (type) { + case TRANSVR_TYPE_SFP: + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + break; + default: + SWPS_INFO("detect undefined type:0x%02x on %s\n", + type, self->swp_name); + return EVENT_TRANSVR_INIT_FAIL; + } + switch (state) { + case STATE_TRANSVR_DISCONNECTED: + return EVENT_TRANSVR_INIT_DOWN; + case STATE_TRANSVR_INIT: + case STATE_TRANSVR_CONNECTED: + case STATE_TRANSVR_SWAPPED: + break; + default: + SWPS_INFO("detect undefined state:%d on %s\n", + state, self->swp_name); + return EVENT_TRANSVR_EXCEP_INIT; + } + return 0; +} + + +static int +_is_transvr_hw_ready(struct transvr_obj_s *self, + int type){ + /* [Return] + * EVENT_TRANSVR_TASK_DONE : Ready + * EVENT_TRANSVR_TASK_WAIT : Not ready + * EVENT_TRANSVR_INIT_FAIL : Error + */ + int addr = DEBUG_TRANSVR_INT_VAL; + int page = DEBUG_TRANSVR_INT_VAL; + int offs = DEBUG_TRANSVR_INT_VAL; + int bit = DEBUG_TRANSVR_INT_VAL; + int ready = DEBUG_TRANSVR_INT_VAL; + int err = DEBUG_TRANSVR_INT_VAL; + char *emsg = DEBUG_TRANSVR_STR_VAL; + uint8_t ab_val = DEBUG_TRANSVR_HEX_VAL; + + switch (type) { + case TRANSVR_TYPE_SFP: + addr = VAL_TRANSVR_8472_READY_ADDR; + page = VAL_TRANSVR_8472_READY_PAGE; + offs = VAL_TRANSVR_8472_READY_OFFSET; + bit = VAL_TRANSVR_8472_READY_BIT; + ready = VAL_TRANSVR_8472_READY_VALUE; + ab_val = VAL_TRANSVR_8472_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + case TRANSVR_TYPE_QSFP_28: + addr = VAL_TRANSVR_8436_READY_ADDR; + page = VAL_TRANSVR_8436_READY_PAGE; + offs = VAL_TRANSVR_8436_READY_OFFSET; + bit = VAL_TRANSVR_8436_READY_BIT; + ready = VAL_TRANSVR_8436_READY_VALUE; + ab_val = VAL_TRANSVR_8436_READY_ABNORMAL; + break; + + case TRANSVR_TYPE_UNPLUGGED: + case TRANSVR_TYPE_FAKE: + return EVENT_TRANSVR_TASK_DONE; + + default: + emsg = "unexpected case"; + goto err_is_transvr_hw_ready; + } + /* Select target page */ + err = _common_setup_page(self, addr, page, offs, 1, 0); + if (err < 0) { + emsg = "setup page fail"; + goto err_is_transvr_hw_ready; + } + /* Check feature supported + * [Note] + * Some of transceiver/cables doesn't support "Status Indicators" + * (ex:DAC, RJ45 copper SFP ...etc). In these case, we bypass the + * step of checking Status Indicators, then state machine will take + * the following handle procedure. + */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (err < 0) { + emsg = "doesn't support Status Indicators"; + goto bypass_is_transvr_hw_ready; + } + /* Filter abnormal case */ + if (err == ab_val) { + emsg = "detect using unusual definition."; + goto bypass_is_transvr_hw_ready; + } + /* Get Status Indicators */ + err = i2c_smbus_read_byte_data(self->i2c_client_p, offs); + if (err < 0) { + emsg = "detect current value fail"; + goto err_is_transvr_hw_ready; + } + if ((err & (1<:%d\n", __func__, emsg, type); + return EVENT_TRANSVR_TASK_DONE; + +err_is_transvr_hw_ready: + SWPS_DEBUG("%s: %s :%d\n", __func__, emsg, type); + return EVENT_TRANSVR_INIT_FAIL; +} + + +static int +_is_transvr_support_ctle(struct transvr_obj_s *self) { + + switch (self->info) { + case TRANSVR_CLASS_OPTICAL_25G: + case TRANSVR_CLASS_OPTICAL_25G_AOC: + case TRANSVR_CLASS_OPTICAL_25G_SR: + case TRANSVR_CLASS_OPTICAL_25G_LR: + case TRANSVR_CLASS_OPTICAL_25G_ER: + case TRANSVR_CLASS_OPTICAL_100G: + case TRANSVR_CLASS_OPTICAL_100G_AOC: + case TRANSVR_CLASS_OPTICAL_100G_SR4: + case TRANSVR_CLASS_OPTICAL_100G_LR4: + case TRANSVR_CLASS_OPTICAL_100G_ER4: + case TRANSVR_CLASS_OPTICAL_100G_PSM4: + return 1; + default: + break; + } + return 0; +} + + +static int +_transvr_init_handler(struct transvr_obj_s *self){ + + int detect[2]; + int d_state = STATE_TRANSVR_UNEXCEPTED; + int d_type = TRANSVR_TYPE_ERROR; + int result = ERR_TRANSVR_UNINIT; + int retry = 6; /* (6+1) x 0.3 = 2.1s > spec:2.0s */ + int elimit = 63; + char emsg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Clean and check callback */ + self->state = STATE_TRANSVR_INIT; + if (self->init == NULL) { + snprintf(emsg, elimit, "init() is null"); + goto initer_err_case_unexcept_0; + } + if (self->clean == NULL) { + snprintf(emsg, elimit, "clean() is null"); + goto initer_err_case_unexcept_0; + } + self->clean(self); + + /* Detect transceiver information */ + result = detect_transvr_state(self, detect); + if (result < 0) { + snprintf(emsg, elimit, "detect_transvr_state() fail"); + switch (result) { + case ERR_TRANSVR_I2C_CRASH: + goto initer_err_case_i2c_ceash; + case ERR_TRNASVR_BE_ISOLATED: + goto initer_err_case_be_isolated; + + case ERR_TRANSVR_UNEXCPT: + default: + break; + } + goto initer_err_case_retry_1; + } + d_state = detect[0]; + d_type = detect[1]; + + /* Verify transceiver type and state */ + switch (_is_transvr_valid(self, d_type, d_state)) { + case 0: + break; + case EVENT_TRANSVR_INIT_DOWN: + goto initer_ok_case_down;; + case EVENT_TRANSVR_INIT_FAIL: + snprintf(emsg, elimit, "transceiver type doesn't support"); + goto initer_err_case_alarm_to_user; + case EVENT_TRANSVR_EXCEP_INIT: + default: + goto initer_err_case_unexcept_1; + } + + /* Handle reload case */ + if (self->type != d_type){ + /* This is the protect mechanism. Normally, This case will not happen. + * When State machine detect swap event during initial, It will trigger + * reload function to ensure type correct. */ + if (_reload_transvr_obj(self, d_type) < 0){ + snprintf(emsg, elimit, "reload object fail"); + goto initer_err_case_unexcept_1; + } + } + + /* Check transceiver HW initial ready */ + switch (_is_transvr_hw_ready(self, d_type)) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_err_case_retry_1; + case EVENT_TRANSVR_INIT_FAIL: + default: + goto initer_err_case_unexcept_1; + } + + /* Try to update all and check */ + if (self->update_all(self, 1) < 0){ + /* For some transceiver, EEPROME has lag issues during initial stage. + * In this case, we set status back to STATE_TRANSVR_NEW, than it will + * be checked in next polling cycle. */ + goto initer_err_case_retry_1; + } + + /* Execute init() call back */ + result = self->init(self); + switch (result) { + case EVENT_TRANSVR_TASK_DONE: + break; + case EVENT_TRANSVR_TASK_WAIT: + goto initer_ok_case_wait; + + default: + snprintf(emsg, elimit, "undefined init() return:%d\n", result); + goto initer_err_case_unexcept_1; + } + goto initer_ok_case_up; + + +initer_ok_case_wait: + self->dump_all(self); + return EVENT_TRANSVR_TASK_WAIT; + +initer_ok_case_up: + self->state = STATE_TRANSVR_CONNECTED; + self->temp = 0; + self->dump_all(self); + return EVENT_TRANSVR_INIT_UP; + +initer_ok_case_down: + self->temp = 0; + self->state = STATE_TRANSVR_DISCONNECTED; + return EVENT_TRANSVR_INIT_DOWN; + +initer_err_case_i2c_ceash: + SWPS_DEBUG("%s: %s :%s :I2C crash\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + return EVENT_TRANSVR_I2C_CRASH; + +initer_err_case_be_isolated: + SWPS_DEBUG("%s: %s :%s :isolated\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_ISOLATED; + return EVENT_TRANSVR_EXCEP_ISOLATED; + +initer_err_case_retry_1: + SWPS_DEBUG("%s: %s :%s :retry\n", + __func__, emsg, self->swp_name); + if (_transvr_handle_retry(self, retry) == 0) { + self->state = STATE_TRANSVR_NEW; + return EVENT_TRANSVR_INIT_REINIT; + } + goto initer_err_case_alarm_to_user; + +initer_err_case_unexcept_1: + self->clean(self); +initer_err_case_unexcept_0: + self->state = STATE_TRANSVR_UNEXCEPTED; + if (_is_except_happened_4_pmode(self, d_state) && + (self->mode == TRANSVR_MODE_POLLING) ){ + SWPS_INFO("%s: %s :%s\n", __func__, emsg, self->swp_name); + SWPS_INFO("Dump: :%d :%d :%d :%d\n", + self->state, self->type, d_state, d_type); + } + return EVENT_TRANSVR_INIT_FAIL; + +initer_err_case_alarm_to_user: + SWPS_DEBUG("%s: %s :%s :alarm_to_user\n", + __func__, emsg, self->swp_name); + self->state = STATE_TRANSVR_UNEXCEPTED; + alarm_msg_2_user(self, "detected transceiver/cables not meet SFF standard"); + return EVENT_TRANSVR_INIT_FAIL; +} + + +/* ========== Object functions for Clean procedure ========== + */ +int +_transvr_clean_handler(struct transvr_obj_s *self){ + + int retval = DEBUG_TRANSVR_INT_VAL; + + if (!self->clean) { + SWPS_ERR("%s: %s clean() is NULL.\n", + __func__, self->swp_name); + return EVENT_TRANSVR_TASK_FAIL; + } + retval = self->clean(self); + if (retval != EVENT_TRANSVR_TASK_DONE){ + SWPS_ERR("%s: %s clean() fail. [ERR]:%d\n", + __func__, self->swp_name, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +common_transvr_clean(struct transvr_obj_s *self){ + + transvr_task_free_all(self); + transvr_cache_free_all(self); + return EVENT_TRANSVR_TASK_DONE; +} + + +int +qsfp_transvr_clean(struct transvr_obj_s *self){ + + int retval; + int lpower_config = 1; + + retval = _taskfunc_qsfp_setup_power_mod(self, lpower_config); + if (retval < 0){ + SWPS_ERR("%s: Set lpmod fail! :%d\n", + __func__, retval); + return retval; + } + retval = common_transvr_clean(self); + if (retval < 0){ + SWPS_ERR("%s: common_transvr_clean fail! :%d\n", + __func__, retval); + return retval; + } + return EVENT_TRANSVR_TASK_DONE; +} + + +int +fake_transvr_clean(struct transvr_obj_s *self){ + + return EVENT_TRANSVR_TASK_DONE; +} + + +/* ========== Object functions for check and update ========== + */ +int +common_transvr_check(struct transvr_obj_s *self){ + + char fun_str[32] = "common_transvr_check"; + + if (self->mode != TRANSVR_MODE_POLLING) { + SWPS_ERR("%s: mode:%d is not TRANSVR_MODE_POLLING\n", + fun_str, self->mode); + return ERR_TRANSVR_UNEXCPT; + } + /* Trigger delay task */ + transvr_task_run_all(self); + /* Trigger state machine to check and update */ + return self->fsm_4_polling(self, fun_str); +} + + +int +fake_transvr_check(struct transvr_obj_s *self){ + return 0; +} + + +/* ========== Functions for Factory pattern ========== + */ +static int +setup_transvr_public_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = unsupported_get_func; + self->get_br = common_get_br; + self->get_len_sm = sfp_get_len_sm; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = sfp_get_comp_eth_1; + self->get_comp_eth_10 = sfp_get_comp_eth_10; + self->get_comp_eth_10_40 = unsupported_get_func; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = sfp_get_rate_id; + self->get_soft_rs0 = sfp_get_soft_rs0; + self->get_soft_rs1 = sfp_get_soft_rs1; + self->get_info = common_get_info; + self->get_if_type = sfp_get_if_type; + self->get_if_speed = sfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = sfp_get_transvr_temp; + self->get_curr_vol = sfp_get_transvr_voltage; + self->get_soft_rx_los = unsupported_get_func2; + self->get_soft_tx_disable = unsupported_get_func2; + self->get_soft_tx_fault = unsupported_get_func2; + self->get_auto_tx_disable = unsupported_get_func2; + self->get_tx_bias = sfp_get_transvr_tx_bias; + self->get_tx_power = sfp_get_transvr_tx_power; + self->get_rx_power = sfp_get_transvr_rx_power; + self->get_tx_eq = sfp_get_transvr_tx_eq; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = sfp_get_transvr_rx_em; + self->get_wavelength = sfp_get_wavelength; + self->get_extphy_offset = sfp_get_1g_rj45_extphy_offset; + self->get_extphy_reg = sfp_get_1g_rj45_extphy_reg; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = sfp_set_soft_rs0; + self->set_soft_rs1 = sfp_set_soft_rs1; + self->set_soft_tx_disable = unsupported_set_func; + self->set_auto_tx_disable = unsupported_set_func; + self->set_tx_eq = sfp_set_tx_eq; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = sfp_set_rx_em; + self->set_extphy_offset = sfp_set_1g_rj45_extphy_offset; + self->set_extphy_reg = sfp_set_1g_rj45_extphy_reg; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = unsupported_get_func; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = unsupported_get_func2; + self->get_rx_am = unsupported_get_func2; + self->get_rx_em = unsupported_get_func2; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->set_cdr = unsupported_set_func; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = unsupported_set_func; + self->set_rx_am = unsupported_set_func; + self->set_rx_em = unsupported_set_func; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->get_id = common_get_id; + self->get_ext_id = common_get_ext_id; + self->get_connector = common_get_connector; + self->get_vendor_name = common_get_vendor_name; + self->get_vendor_pn = common_get_vendor_pn; + self->get_vendor_rev = common_get_vendor_rev; + self->get_vendor_sn = common_get_vendor_sn; + self->get_power_cls = qsfp_get_power_cls; + self->get_br = common_get_br; + self->get_len_sm = unsupported_get_func; + self->get_len_smf = common_get_len_smf; + self->get_len_om1 = common_get_len_om1; + self->get_len_om2 = common_get_len_om2; + self->get_len_om3 = common_get_len_om3; + self->get_len_om4 = common_get_len_om4; + self->get_comp_rev = common_get_comp_rev; + self->get_comp_eth_1 = qsfp_get_comp_eth; + self->get_comp_eth_10 = unsupported_get_func; + self->get_comp_eth_10_40 = qsfp_get_comp_10_40; + self->get_comp_extend = common_get_comp_extended; + self->get_cdr = qsfp_get_cdr; + self->get_rate_id = unsupported_get_func; + self->get_soft_rs0 = unsupported_get_func; /* TBD */ + self->get_soft_rs1 = unsupported_get_func; /* TBD */ + self->get_info = common_get_info; + self->get_if_type = qsfp_get_if_type; + self->get_if_speed = qsfp_get_if_speed; + self->get_if_lane = common_get_if_lane; + self->get_curr_temp = qsfp_get_transvr_temp; + self->get_curr_vol = qsfp_get_transvr_voltage; + self->get_soft_rx_los = qsfp_get_soft_rx_los; + self->get_soft_tx_disable = qsfp_get_soft_tx_disable; + self->get_soft_tx_fault = qsfp_get_soft_tx_fault; + self->get_auto_tx_disable = qsfp_get_auto_tx_disable; + self->get_tx_bias = qsfp_get_transvr_tx_bias; + self->get_tx_power = qsfp_get_transvr_tx_power; + self->get_rx_power = qsfp_get_transvr_rx_power; + self->get_tx_eq = qsfp_get_transvr_tx_eq; + self->get_rx_am = qsfp_get_transvr_rx_am; + self->get_rx_em = qsfp_get_transvr_rx_em; + self->get_wavelength = qsfp_get_wavelength; + self->get_extphy_offset = unsupported_get_func2; + self->get_extphy_reg = unsupported_get_func2; + self->set_cdr = qsfp_set_cdr; + self->set_soft_rs0 = unsupported_set_func; /* TBD */ + self->set_soft_rs1 = unsupported_set_func; /* TBD */ + self->set_soft_tx_disable = qsfp_set_soft_tx_disable; + self->set_auto_tx_disable = qsfp_set_auto_tx_disable; + self->set_tx_eq = qsfp_set_tx_eq; + self->set_rx_am = qsfp_set_rx_am; + self->set_rx_em = qsfp_set_rx_em; + self->set_extphy_offset = unsupported_set_func; + self->set_extphy_reg = unsupported_set_func; + return 0; + + case TRANSVR_TYPE_FAKE: + self->get_id = fake_get_hex; + self->get_ext_id = fake_get_hex; + self->get_connector = fake_get_hex; + self->get_vendor_name = fake_get_str; + self->get_vendor_pn = fake_get_str; + self->get_vendor_rev = fake_get_str; + self->get_vendor_sn = fake_get_str; + self->get_power_cls = fake_get_int; + self->get_br = fake_get_hex; + self->get_len_sm = fake_get_int; + self->get_len_smf = fake_get_int; + self->get_len_om1 = fake_get_int; + self->get_len_om2 = fake_get_int; + self->get_len_om3 = fake_get_int; + self->get_len_om4 = fake_get_int; + self->get_comp_rev = fake_get_hex; + self->get_comp_eth_1 = fake_get_hex; + self->get_comp_eth_10 = fake_get_hex; + self->get_comp_eth_10_40 = fake_get_hex; + self->get_comp_extend = fake_get_hex; + self->get_cdr = fake_get_hex; + self->get_rate_id = fake_get_hex; + self->get_soft_rs0 = fake_get_binary; + self->get_soft_rs1 = fake_get_binary; + self->get_info = fake_get_int; + self->get_if_type = fake_get_str; + self->get_if_speed = fake_get_str; + self->get_if_lane = fake_get_str; + self->get_curr_temp = fake_get_str; + self->get_curr_vol = fake_get_str; + self->get_soft_rx_los = fake_get_str; + self->get_soft_tx_disable = fake_get_str; + self->get_soft_tx_fault = fake_get_str; + self->get_auto_tx_disable = fake_get_str; + self->get_tx_bias = fake_get_str; + self->get_tx_power = fake_get_str; + self->get_rx_power = fake_get_str; + self->get_tx_eq = fake_get_str; + self->get_rx_am = fake_get_str; + self->get_rx_em = fake_get_str; + self->get_wavelength = fake_get_str; + self->get_extphy_offset = fake_get_str; + self->get_extphy_reg = fake_get_str; + self->set_cdr = fake_set_hex; + self->set_soft_rs0 = fake_set_int; + self->set_soft_rs1 = fake_set_int; + self->set_soft_tx_disable = fake_set_int; + self->set_auto_tx_disable = fake_set_int; + self->set_tx_eq = fake_set_int; + self->set_rx_am = fake_set_int; + self->set_rx_em = fake_set_int; + self->set_extphy_offset = fake_set_hex; + self->set_extphy_reg = fake_set_hex; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_transvr_private_cb(struct transvr_obj_s *self, + int transvr_type){ + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + self->init = transvr_init_sfp; + self->clean = common_transvr_clean; + self->check = common_transvr_check; + self->update_all = _sfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = sfp_send_uevent; + self->dump_all = sfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + self->init = transvr_init_qsfp; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_QSFP_28: + self->init = transvr_init_qsfp28; + self->clean = qsfp_transvr_clean; + self->check = common_transvr_check; + self->update_all = _qsfp_update_attr_all; + self->fsm_4_direct = common_fsm_4_direct_mode; + self->fsm_4_polling = common_fsm_4_polling_mode; + self->send_uevent = qsfp_send_uevent; + self->dump_all = qsfp_transvr_dump; + return 0; + + case TRANSVR_TYPE_FAKE: + self->init = transvr_init_fake; + self->clean = fake_transvr_clean; + self->check = fake_transvr_check; + self->update_all = fake_transvr_update; + self->fsm_4_direct = fake_fsm_4_direct_mode; + self->fsm_4_polling = fake_fsm_4_polling_mode; + self->send_uevent = fake_send_uevent; + self->dump_all = fake_transvr_dump; + return 0; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return ERR_TRANSVR_UNEXCPT; +} + + +static struct eeprom_map_s * +get_eeprom_map(int transvr_type){ + + switch (transvr_type){ + case TRANSVR_TYPE_SFP: + return &eeprom_map_sfp; + case TRANSVR_TYPE_QSFP: + case TRANSVR_TYPE_QSFP_PLUS: + return &eeprom_map_qsfp; + case TRANSVR_TYPE_QSFP_28: + return &eeprom_map_qsfp28; + + default: + break; + } + SWPS_WARN("%s: Detect non-defined type:%d\n", __func__, transvr_type); + return NULL; +} + + +static int +setup_transvr_ssize_attr(char *swp_name, + struct transvr_obj_s *self, + struct eeprom_map_s *map_p, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int chan_id, + int run_mode){ + switch (run_mode){ + case TRANSVR_MODE_DIRECT: /* Direct access device mode */ + case TRANSVR_MODE_POLLING: /* Polling mode, read from cache */ + self->mode = run_mode; + break; + default: + SWPS_ERR("%s: non-defined run_mode:%d\n", + __func__, run_mode); + self->mode = DEBUG_TRANSVR_INT_VAL; + return -1; + } + self->eeprom_map_p = map_p; + self->ioexp_obj_p = ioexp_obj_p; + self->ioexp_virt_offset = ioexp_virt_offset; + self->chan_id = chan_id; + self->layout = transvr_type; + self->type = transvr_type; + self->chipset_type = chipset_type; + self->state = STATE_TRANSVR_NEW; + self->info = STATE_TRANSVR_NEW; + self->auto_tx_disable = VAL_TRANSVR_FUNCTION_DISABLE; + strncpy(self->swp_name, swp_name, 32); + mutex_init(&self->lock); + return 0; +} + + +static int +setup_transvr_dsize_attr(struct transvr_obj_s *self){ + + char *emsg = DEBUG_TRANSVR_STR_VAL; + + self->vendor_name = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_name){ + emsg = "vendor_name"; + goto err_setup_d_attr; + } + self->vendor_pn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_pn){ + emsg = "vendor_pn"; + goto err_setup_d_attr; + } + self->vendor_rev = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_rev){ + emsg = "vendor_rev"; + goto err_setup_d_attr; + } + self->vendor_sn = kzalloc((LEN_TRANSVR_M_STR * sizeof(char)), GFP_KERNEL); + if (!self->vendor_sn){ + emsg = "vendor_sn"; + goto err_setup_d_attr; + } + self->worker_p = NULL; + return 0; + +err_setup_d_attr: + SWPS_ERR("%s: %s kzalloc fail!", __func__, emsg); + return ERR_TRANSVR_UNEXCPT; +} + + +static int +setup_i2c_client(struct transvr_obj_s *self){ + + struct i2c_adapter *adap = NULL; + struct i2c_client *client = NULL; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + adap = i2c_get_adapter(self->chan_id); + if(!adap){ + snprintf(err_msg, sizeof(err_msg), + "can not get adap:%d", self->chan_id); + goto err_setup_i2c_client; + } + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client){ + snprintf(err_msg, sizeof(err_msg), + "can not kzalloc client:%d", self->chan_id); + goto err_setup_i2c_client; + } + client->adapter = adap; + self->i2c_client_p = client; + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + return 0; + +err_setup_i2c_client: + SWPS_ERR("%s: %s\n", __func__, err_msg); + return ERR_TRANSVR_UNEXCPT; +} + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode){ + + struct transvr_obj_s *result_p; + struct eeprom_map_s *map_p; + char err_msg[64] = DEBUG_TRANSVR_STR_VAL; + + /* Allocate transceiver object */ + map_p = get_eeprom_map(transvr_type); + if (!map_p){ + snprintf(err_msg, sizeof(err_msg), + "Invalid transvr_type:%d", transvr_type); + goto err_create_transvr_fail; + } + result_p = kzalloc(sizeof(*result_p), GFP_KERNEL); + if (!result_p){ + snprintf(err_msg, sizeof(err_msg), "kzalloc fail"); + goto err_create_transvr_fail; + } + /* Prepare static size attributes */ + if (setup_transvr_ssize_attr(swp_name, + result_p, + map_p, + ioexp_obj_p, + ioexp_virt_offset, + transvr_type, + chipset_type, + chan_id, + run_mode) < 0){ + goto err_create_transvr_sattr_fail; + } + /* Prepare dynamic size attributes */ + if (setup_transvr_dsize_attr(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_public_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare call back functions of object */ + if (setup_transvr_private_cb(result_p, transvr_type) < 0){ + goto err_create_transvr_dattr_fail; + } + /* Prepare i2c client object */ + if (setup_i2c_client(result_p) < 0){ + goto err_create_transvr_dattr_fail; + } + return result_p; + +err_create_transvr_dattr_fail: + kfree(result_p->vendor_sn); + kfree(result_p->vendor_rev); + kfree(result_p->vendor_pn); + kfree(result_p->vendor_name); +err_create_transvr_sattr_fail: + kfree(result_p); +err_create_transvr_fail: + SWPS_ERR("%s: %s :%d :%d :%d\n", + __func__, err_msg, chan_id, ioexp_virt_offset, transvr_type); + return NULL; +} +EXPORT_SYMBOL(create_transvr_obj); + + +static int +_reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + struct eeprom_map_s *new_map_p; + struct eeprom_map_s *old_map_p = self->eeprom_map_p; + struct i2c_client *old_i2c_p = self->i2c_client_p; + int old_type = self->type; + + /* Change state to STATE_TRANSVR_INIT */ + self->state = STATE_TRANSVR_INIT; + self->type = new_type; + /* Replace EEPROME map */ + new_map_p = get_eeprom_map(new_type); + if (!new_map_p){ + goto err_private_reload_func_1; + } + self->eeprom_map_p = new_map_p; + /* Reload i2c client */ + if (setup_i2c_client(self) < 0){ + goto err_private_reload_func_2; + } + /* Replace call back functions */ + if (setup_transvr_public_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + if (setup_transvr_private_cb(self, new_type) < 0){ + goto err_private_reload_func_3; + } + if(old_i2c_p){ + i2c_put_adapter(old_i2c_p->adapter); + } + kfree(old_i2c_p); + return 0; + +err_private_reload_func_3: + SWPS_INFO("%s: init() fail!\n", __func__); + if(old_i2c_p){ + i2c_put_adapter(old_i2c_p->adapter); + } + kfree(old_i2c_p); + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = TRANSVR_TYPE_ERROR; + return -2; + +err_private_reload_func_2: + self->eeprom_map_p = old_map_p; + self->i2c_client_p = old_i2c_p; +err_private_reload_func_1: + self->state = STATE_TRANSVR_UNEXCEPTED; + self->type = old_type; + SWPS_INFO("%s fail! :0x%02x\n", __func__, new_type); + return -1; +} + + +static int +reload_transvr_obj(struct transvr_obj_s *self, + int new_type){ + + int result_val = ERR_TRANSVR_UNEXCPT; + + /* Reload phase */ + result_val = _reload_transvr_obj(self, new_type); + if (result_val < 0){ + SWPS_INFO("%s: reload phase fail! :%d\n", + __func__, result_val); + return EVENT_TRANSVR_RELOAD_FAIL; + } + /* Initial phase */ + result_val = _transvr_init_handler(self); + if (result_val < 0){ + SWPS_INFO("%s: initial phase fail! :%d\n", + __func__, result_val); + } + return result_val; +} + + +int +isolate_transvr_obj(struct transvr_obj_s *self) { + + self->state = STATE_TRANSVR_ISOLATED; + SWPS_INFO("%s: %s be isolated\n", __func__, self->swp_name); + return 0; +} +EXPORT_SYMBOL(isolate_transvr_obj); + + +int +resync_channel_tier_2(struct transvr_obj_s *self) { + + int val = TRANSVR_TYPE_ERROR; + + if (self->state == STATE_TRANSVR_ISOLATED) { + return 0; + } + self->i2c_client_p->addr = VAL_TRANSVR_COMID_ARREESS; + val = i2c_smbus_read_byte_data(self->i2c_client_p, + VAL_TRANSVR_COMID_OFFSET); + if (val < 0) { + return -1; + } + return 0; +} +EXPORT_SYMBOL(resync_channel_tier_2); + +/* For build single module using (Ex: ONL platform) */ +MODULE_LICENSE("GPL"); + + +/* ----------------------------------------- + * ToDo List + * ----------------------------------------- + * 1. _sfp_detect_class_by_feature() + * => Need check ACC use case. + * 2. _sfp_detect_class_by_1g_ethernet() + * => Need check 0.1G use case. + * 3. Loopback transceiver use case. + * => Less much data + * 4. _qsfp_detect_class_by_extend_comp() + * => Verify 100G CWDM4 + * => Verify Obsolete (assigned before 100G CWDM4 MSA required FEC) + * => Verify 100G CLR4 + * => Verify 100GE-DWDM2 + * => Verify 40G PSM4 Parallel SMF + * => Verify 100G ACC (Active Copper Cable) or 25GAUI C2M ACC. + * => Verify 100G ACC or 25GAUI C2M ACC. + * => Verify 25GBASE-LR + * => Verify 40G Active Cable (XLPPI) + */ + + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/transceiver.h b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/transceiver.h new file mode 100644 index 00000000000..0438a351271 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/transceiver.h @@ -0,0 +1,809 @@ +#ifndef TRANSCEIVER_H +#define TRANSCEIVER_H + +#include + +/* advanced features control */ +#define TRANSVR_INFO_DUMP_ENABLE (1) +#define TRANSVR_INFO_CACHE_ENABLE (1) +#define TRANSVR_UEVENT_ENABLE (1) + +/* Transceiver type define */ +#define TRANSVR_TYPE_UNKNOW_1 (0x00) +#define TRANSVR_TYPE_UNKNOW_2 (0xff) +#define TRANSVR_TYPE_SFP (0x03) /* Define for SFP, SFP+, SFP28 */ +#define TRANSVR_TYPE_QSFP (0x0c) +#define TRANSVR_TYPE_QSFP_PLUS (0x0d) +#define TRANSVR_TYPE_QSFP_28 (0x11) +#define TRANSVR_TYPE_UNPLUGGED (0xfa) /* Define for ERROR handle */ +#define TRANSVR_TYPE_FAKE (0xfc) /* Define for ERROR handle */ +#define TRANSVR_TYPE_INCONSISTENT (0xfd) /* Define for ERROR handle */ +#define TRANSVR_TYPE_ERROR (0xfe) /* Define for ERROR handle */ + +/* Transceiver class for base info */ +#define TRANSVR_CLASS_UNSPECIFIED (0) +#define TRANSVR_CLASS_ERROR (-26001) +#define TRANSVR_CLASS_1G (26001) +#define TRANSVR_CLASS_10G (26011) +#define TRANSVR_CLASS_25G (26021) +#define TRANSVR_CLASS_40G (26041) +#define TRANSVR_CLASS_100G (26101) +#define TRANSVR_CLASS_NO_SPERARABLE (26901) +#define TRANSVR_CLASS_EXTEND_COMP (26902) +/* Transceiver class for Optical 1G */ +#define TRANSVR_CLASS_OPTICAL (27000) +#define TRANSVR_CLASS_OPTICAL_100 (27001) +#define TRANSVR_CLASS_OPTICAL_1G (27002) +#define TRANSVR_CLASS_OPTICAL_1G_AOC (27003) +#define TRANSVR_CLASS_OPTICAL_1G_SX (27004) +#define TRANSVR_CLASS_OPTICAL_1G_LX (27005) +#define TRANSVR_CLASS_OPTICAL_1G_EX (27006) +/* Transceiver class for Optical 10G */ +#define TRANSVR_CLASS_OPTICAL_10G (27010) +#define TRANSVR_CLASS_OPTICAL_10G_S_AOC (27011) +#define TRANSVR_CLASS_OPTICAL_10G_S_SR (27012) +#define TRANSVR_CLASS_OPTICAL_10G_S_LR (27013) +#define TRANSVR_CLASS_OPTICAL_10G_S_ER (27014) +#define TRANSVR_CLASS_OPTICAL_10G_Q_AOC (27015) +#define TRANSVR_CLASS_OPTICAL_10G_Q_SR (27016) +#define TRANSVR_CLASS_OPTICAL_10G_Q_LR (27017) +#define TRANSVR_CLASS_OPTICAL_10G_Q_ER (27018) +/* Transceiver class for Optical 25G */ +#define TRANSVR_CLASS_OPTICAL_25G (27020) +#define TRANSVR_CLASS_OPTICAL_25G_AOC (27021) +#define TRANSVR_CLASS_OPTICAL_25G_SR (27022) +#define TRANSVR_CLASS_OPTICAL_25G_LR (27023) +#define TRANSVR_CLASS_OPTICAL_25G_ER (27024) +/* Transceiver class for Optical 40G */ +#define TRANSVR_CLASS_OPTICAL_40G (27040) +#define TRANSVR_CLASS_OPTICAL_40G_AOC (27041) +#define TRANSVR_CLASS_OPTICAL_40G_SR4 (27042) +#define TRANSVR_CLASS_OPTICAL_40G_LR4 (27043) +#define TRANSVR_CLASS_OPTICAL_40G_ER4 (27044) +/* Transceiver class for Optical 100G */ +#define TRANSVR_CLASS_OPTICAL_100G (27100) +#define TRANSVR_CLASS_OPTICAL_100G_AOC (27101) +#define TRANSVR_CLASS_OPTICAL_100G_SR4 (27102) +#define TRANSVR_CLASS_OPTICAL_100G_LR4 (27103) +#define TRANSVR_CLASS_OPTICAL_100G_ER4 (27104) +#define TRANSVR_CLASS_OPTICAL_100G_PSM4 (27105) +/* Transceiver class for Copper */ +#define TRANSVR_CLASS_COPPER (28000) +#define TRANSVR_CLASS_COPPER_L1_1G (28001) +#define TRANSVR_CLASS_COPPER_L1_10G (28011) +#define TRANSVR_CLASS_COPPER_L4_10G (28012) +#define TRANSVR_CLASS_COPPER_L1_25G (28021) +#define TRANSVR_CLASS_COPPER_L4_40G (28041) +#define TRANSVR_CLASS_COPPER_L4_100G (28101) +/* Transceiver class for Base-T */ +#define TRANSVR_CLASS_BASE_T_1000 (29001) +#define TRANSVR_CLASS_BASE_T_1000_up (29002) +/* For uevent message */ +#define TRANSVR_UEVENT_KEY_IF "IF_TYPE" +#define TRANSVR_UEVENT_KEY_SP "IF_SPEED" +#define TRANSVR_UEVENT_KEY_LANE "IF_LANE" +#define TRANSVR_UEVENT_UNKNOW "UNKNOW" +#define TRANSVR_IF_KR "KR" +#define TRANSVR_IF_KR4 "KR4" +#define TRANSVR_IF_SR "SR" +#define TRANSVR_IF_SR4 "SR4" +#define TRANSVR_IF_SFI "SFI" +#define TRANSVR_IF_IF_GMII "GMII" +#define TRANSVR_IF_IF_XGMII "XGMII" +#define TRANSVR_IF_SP_100 "100" +#define TRANSVR_IF_SP_1G "1000" +#define TRANSVR_IF_SP_10G "10000" +#define TRANSVR_IF_SP_25G "25000" +#define TRANSVR_IF_SP_40G "40000" +#define TRANSVR_IF_SP_100G "100000" + +/* Transceiver mode define */ +#define TRANSVR_MODE_DIRECT (21000) +#define TRANSVR_MODE_POLLING (21001) + +/* Transceiver state define + * [Note] + * 1. State is used to represent the state of "Transceiver" and "Object". + * 2. State for different target has different means. The description as following: + */ +#define STATE_TRANSVR_CONNECTED (0) /* [Transvr]:Be plugged in. [Obj]:Link up, and work normally. */ +#define STATE_TRANSVR_NEW (-100) /* [Transvr]:(Not used) [Obj]:Create */ +#define STATE_TRANSVR_INIT (-101) /* [Transvr]:Be plugged in. [Obj]:Link up, and in initial process. */ +#define STATE_TRANSVR_ISOLATED (-102) /* [Transvr]:Be plugged in. [Obj]:Isolate, and not provide service. */ +#define STATE_TRANSVR_SWAPPED (-200) /* [Transvr]:Be plugged in. [Obj]:(Not used) */ +#define STATE_TRANSVR_DISCONNECTED (-300) /* [Transvr]:Un-plugged. [Obj]:Link down, and not provide service. */ +#define STATE_TRANSVR_UNEXCEPTED (-901) /* [Transvr]:Any [Obj]:Any, and not in expect case. */ + +/* Task state define */ +#define STATE_T_TASK_WAIT (110) +#define STATE_T_TASK_DONE (0) +#define STATE_T_TASK_INIT (-110) +#define STATE_T_TASK_FAIL (-410) + + +/* Event for task handling */ +#define EVENT_TRANSVR_TASK_WAIT (2101) +#define EVENT_TRANSVR_TASK_DONE (0) +#define EVENT_TRANSVR_TASK_FAIL (-2101) +/* Event for initial handling */ +#define EVENT_TRANSVR_INIT_UP (2201) +#define EVENT_TRANSVR_INIT_DOWN (1) +#define EVENT_TRANSVR_INIT_REINIT (-2201) +#define EVENT_TRANSVR_INIT_FAIL (-2202) +/* Event for others */ +#define EVENT_TRANSVR_RELOAD_FAIL (-2301) +#define EVENT_TRANSVR_EXCEP_INIT (-2401) +#define EVENT_TRANSVR_EXCEP_UP (-2402) +#define EVENT_TRANSVR_EXCEP_DOWN (-2403) +#define EVENT_TRANSVR_EXCEP_SWAP (-2404) +#define EVENT_TRANSVR_EXCEP_EXCEP (-2405) +#define EVENT_TRANSVR_EXCEP_ISOLATED (-2406) +#define EVENT_TRANSVR_I2C_CRASH (-2501) + +/* Transceiver error code define */ +#define ERR_TRANSVR_UNINIT (-201) +#define ERR_TRANSVR_UNPLUGGED (-202) +#define ERR_TRANSVR_ABNORMAL (-203) +#define ERR_TRANSVR_NOSTATE (-204) +#define ERR_TRANSVR_NOTSUPPORT (-205) +#define ERR_TRANSVR_BADINPUT (-206) +#define ERR_TRANSVR_UPDATE_FAIL (-207) +#define ERR_TRANSVR_RELOAD_FAIL (-208) +#define ERR_TRANSVR_INIT_FAIL (-209) +#define ERR_TRANSVR_UNDEFINED (-210) +#define ERR_TRANSVR_TASK_FAIL (-211) +#define ERR_TRANSVR_TASK_BUSY (-212) +#define ERR_TRANSVR_UEVENT_FAIL (-213) +#define ERR_TRANSVR_FUNC_DISABLE (-214) +#define ERR_TRANSVR_I2C_CRASH (-297) +#define ERR_TRNASVR_BE_ISOLATED (-298) +#define ERR_TRANSVR_UNEXCPT (-299) + +/* For debug */ +#define DEBUG_TRANSVR_INT_VAL (-99) +#define DEBUG_TRANSVR_HEX_VAL (0xfe) +#define DEBUG_TRANSVR_STR_VAL "ERROR" + +/* For system internal */ +#define VAL_TRANSVR_COMID_ARREESS (0x50) +#define VAL_TRANSVR_COMID_OFFSET (0x00) +#define VAL_TRANSVR_EXTPHY_ADDR_56 (0x56) +#define VAL_TRANSVR_8472_READY_ADDR (0x51) +#define VAL_TRANSVR_8472_READY_PAGE (-1) +#define VAL_TRANSVR_8472_READY_OFFSET (110) +#define VAL_TRANSVR_8472_READY_BIT (0) +#define VAL_TRANSVR_8472_READY_VALUE (0) +#define VAL_TRANSVR_8472_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_READY_ADDR (0x50) +#define VAL_TRANSVR_8436_READY_PAGE (-1) +#define VAL_TRANSVR_8436_READY_OFFSET (2) +#define VAL_TRANSVR_8436_READY_BIT (0) +#define VAL_TRANSVR_8436_READY_VALUE (0) +#define VAL_TRANSVR_8436_READY_ABNORMAL (0xff) +#define VAL_TRANSVR_8436_PWD_ADDR (0x50) +#define VAL_TRANSVR_8436_PWD_PAGE (-1) +#define VAL_TRANSVR_8436_PWD_OFFSET (123) +#define VAL_TRANSVR_PAGE_FREE (-99) +#define VAL_TRANSVR_PAGE_SELECT_OFFSET (127) +#define VAL_TRANSVR_PAGE_SELECT_DELAY (5) +#define VAL_TRANSVR_TASK_RETRY_FOREVER (-999) +#define VAL_TRANSVR_FUNCTION_DISABLE (-1) +#define STR_TRANSVR_SFP "SFP" +#define STR_TRANSVR_QSFP "QSFP" +#define STR_TRANSVR_QSFP_PLUS "QSFP+" +#define STR_TRANSVR_QSFP28 "QSFP28" + +/* For transvr buf len */ +#define LEN_TRANSVR_S_STR (16) +#define LEN_TRANSVR_M_STR (32) +#define LEN_TRANSVR_L_STR (64) + +/* Optical wavelength */ +#define VAL_OPTICAL_WAVELENGTH_SR (850) +#define VAL_OPTICAL_WAVELENGTH_LR (1310) +#define VAL_OPTICAL_WAVELENGTH_ER (1550) + +/* BCM chip type define */ +#define BCM_CHIP_TYPE_TRIDENT_2 (31001) /* Magnolia, Hudson32i, Spruce */ +#define BCM_CHIP_TYPE_TOMAHAWK (31002) /* Redwood, Cypress, Sequoia */ +#define BCM_CHIP_TYPE_TRIDENT_3 (31003) /* Maple */ + +#define BF_CHIP_TYPE_TOFINO (31011) /* Lavender */ + +/* Info from transceiver EEPROM */ +struct eeprom_map_s { + int addr_br; int page_br; int offset_br; int length_br; + int addr_cdr; int page_cdr; int offset_cdr; int length_cdr; + int addr_comp_rev; int page_comp_rev; int offset_comp_rev; int length_comp_rev; + int addr_connector; int page_connector; int offset_connector; int length_connector; + int addr_diag_type; int page_diag_type; int offset_diag_type; int length_diag_type; + int addr_extbr; int page_extbr; int offset_extbr; int length_extbr; + int addr_ext_id; int page_ext_id; int offset_ext_id; int length_ext_id; + int addr_id; int page_id; int offset_id; int length_id; + int addr_len_sm; int page_len_sm; int offset_len_sm; int length_len_sm; + int addr_len_smf; int page_len_smf; int offset_len_smf; int length_len_smf; + int addr_len_om1; int page_len_om1; int offset_len_om1; int length_len_om1; + int addr_len_om2; int page_len_om2; int offset_len_om2; int length_len_om2; + int addr_len_om3; int page_len_om3; int offset_len_om3; int length_len_om3; + int addr_len_om4; int page_len_om4; int offset_len_om4; int length_len_om4; + int addr_option; int page_option; int offset_option; int length_option; + int addr_rate_id; int page_rate_id; int offset_rate_id; int length_rate_id; + int addr_rx_am; int page_rx_am; int offset_rx_am; int length_rx_am; + int addr_rx_em; int page_rx_em; int offset_rx_em; int length_rx_em; + int addr_rx_los; int page_rx_los; int offset_rx_los; int length_rx_los; + int addr_rx_power; int page_rx_power; int offset_rx_power; int length_rx_power; + int addr_soft_rs0; int page_soft_rs0; int offset_soft_rs0; int length_soft_rs0; + int addr_soft_rs1; int page_soft_rs1; int offset_soft_rs1; int length_soft_rs1; + int addr_temp; int page_temp; int offset_temp; int length_temp; + int addr_trancomp; int page_trancomp; int offset_trancomp; int length_trancomp; + int addr_trancomp_ext; int page_trancomp_ext; int offset_trancomp_ext; int length_trancomp_ext; + int addr_tx_bias; int page_tx_bias; int offset_tx_bias; int length_tx_bias; + int addr_tx_disable; int page_tx_disable; int offset_tx_disable; int length_tx_disable; + int addr_tx_eq; int page_tx_eq; int offset_tx_eq; int length_tx_eq; + int addr_tx_fault; int page_tx_fault; int offset_tx_fault; int length_tx_fault; + int addr_tx_power; int page_tx_power; int offset_tx_power; int length_tx_power; + int addr_vendor_name; int page_vendor_name; int offset_vendor_name; int length_vendor_name; + int addr_vendor_pn; int page_vendor_pn; int offset_vendor_pn; int length_vendor_pn; + int addr_vendor_rev; int page_vendor_rev; int offset_vendor_rev; int length_vendor_rev; + int addr_vendor_sn; int page_vendor_sn; int offset_vendor_sn; int length_vendor_sn; + int addr_voltage; int page_voltage; int offset_voltage; int length_voltage; + int addr_wavelength; int page_wavelength; int offset_wavelength; int length_wavelength; +}; + + +struct transvr_worker_s; + +/* Class of transceiver object */ +struct transvr_obj_s { + + /* ========== Object private property ========== + * [Prop]: id + * [Desc]: Type of serial transceiver. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh /QSFP28:11h + */ + uint8_t id; + + /* [Prop]: connector + * [Desc]: Connector type. + * [Note]: SFP : A0h / 2 + * QSFP: 00h / 130 + */ + uint8_t connector; + + /* [Prop]: transvr_comp + * [Desc]: Transceiver compliance code. + * [Note]: SFP: SFF-8472 + * - Normal : A0h / offset 3-10 + * - Extended: A0h / offset 36 + * QSFP: SFF-8436 & SFF-8636 + * - Normal : 00h / offset 131-138 + * - Extended: 00h / offset 192 + */ + uint8_t transvr_comp[8]; + uint8_t transvr_comp_ext; + + /* [Prop]: vendor_name + * [Desc]: SFP vendor name (ASCII 16 byte char). + * [Note]: ex:FINISAR CORP. + */ + char *vendor_name; + + /* [Prop]: vendor_pn + * [Desc]: Part number provided by SFP vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_pn; + + /* [Prop]: vendor_rev + * [Desc]: Revision level for part number provided by vendor (ASCII 4 byte char). + * [Note]: + */ + char *vendor_rev; + + /* [Prop]: vendor_sn + * [Desc]: Serial number provided by vendor (ASCII 16 byte char). + * [Note]: + */ + char *vendor_sn; + + /* [Prop]: Extended identifier + * [Desc]: SFP: + * => None + * + * QSFP: + * => This byte contained two information: + * (1) Power consumption class + * (2) CDR function present + * [Note]: Bit description as below: + * [SFP] + * None + * + * [QSFP] + * (1) Power consumption class: + * Class 1: 1.5W (Bit6-7 = 00:) + * Class 2: 2.0W (Bit6-7 = 01:) + * Class 3: 2.5W (Bit6-7 = 10:) + * Class 4: 3.5W (Bit6-7 = 11:) + * Class 5: 4.0W (Bit0-1 = 01:) + * Class 6: 4.5W (Bit0-1 = 10:) + * Class 7: 5.0W (Bit0-1 = 11:) + * (2) CDR function present: + * Bit2: 0 = No CDR in RX + * 1 = CDR present in RX + * Bit3: 0 = No CDR in TX + * 1 = CDR present in TX + */ + uint8_t ext_id; + + /* [Prop]: br + * [Desc]: Nominal bit rate, units of 100 MBits/sec. + * [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh + * has val: 0x67 + * no val : + */ + uint8_t br; + + /* [Prop]: extbr + * [Desc]: Extended br (00h/222) + * [Desc]: Nominal bit rate per channel, units of 250 Mbps. + * Complements. Byte 140. See Table 32A. + */ + uint8_t extbr; + + /* [Prop]: len_sm + * [Desc]: Length (single mode)-(100's)m + * [Note]: This value specifies the link length that is supported by the transceiver + * while operating in compliance with the applicable standards using single mode + * fiber. The value is in units of 100 meters. A value of 255 means that the + * transceiver supports a link length greater than 25.4 km. A value of zero means + * that the transceiver does not support single mode fiber or that the length + * information must be determined from the transceiver technology. + */ + int len_sm; + + /* [Prop]: len_smf + * [Desc]: Length (single mode)-km + * [Note]: Addition to EEPROM data from original GBIC definition. This value specifies + * the link length that is supported by the transceiver while operating in + * compliance with the applicable standards using single mode fiber. The value + * is in units of kilometers. A value of 255 means that the transceiver supports + * a link length greater than 254 km. A value of zero means that the transceiver + * does not support single mode fiber or that the length information must be + * determined from the transceiver technology. + */ + int len_smf; + + /* [Prop]: len_om1 + * [Desc]: Link length supported for 62.5 um OM1 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om1; + + /* [Prop]: len_om2 + * [Desc]: Link length supported for 50 um OM2 fiber, units of 10 m + * [Note]: The value is in units of 10 meters. A value of 255 means that the + * transceiver supports a link length greater than 2.54 km. A value of + * zero means that the transceiver does not support 50 micron multi-mode + * fiber or that the length information must be determined from the transceiver + * technology. + */ + int len_om2; + + /* [Prop]: len_om3 + * [Desc]: Length (50um, OM3) + * [Note]: This value specifies link length that is supported by the transceiver while + * operating in compliance with applicable standards using 50 micron multimode + * OM3 [2000 MHz*km] fiber. The value is in units of 10 meters. A value of 255 + * means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber + * or that the length information must be determined from the transceiver technology. + */ + int len_om3; + + /* [Prop]: len_om4 + * [Desc]: Length (50um, OM4) and Length (Active Cable or Copper) + * [Note]: For optical links, this value specifies link length that is supported by the + * transceiver while operating in compliance with applicable standards using 50 micron + * multimode OM4 [4700 MHz*km] fiber. The value is in units of 10 meters. A value of + * 255 means that the transceiver supports a link length greater than 2.54 km. A value + * of zero means that the transceiver does not support 50 micron multimode fiber or that + * the length information must be determined from the transceiver codes specified in Table 5-3. + * + * For copper links, this value specifies minimum link length supported by the transceiver + * while operating in compliance with applicable standards using copper cable. For active + * cable, this value represents actual length. The value is in units of 1 meter. A value of 255 + * means the transceiver supports a link length greater than 254 meters. A value of zero means + * the transceiver does not support copper or active cables or the length information must be + * determined from transceiver technology. Further information about cable design, equalization, + * and connectors is usually required to guarantee meeting a particular length requirement. + */ + int len_om4; + + /* [Prop]: comp_rev + * [Desc]: SFF spec revision compliance + * [Note]: Indicates which revision of SFF SFF-8472 (SFP) / SFF-8636 (QSFP) the transceiver + * complies with. (unsigned integer) + */ + uint8_t comp_rev; + + /* [Prop]: CDR + * [Desc]: For transceivers with CDR capability, setting the CDR to ON engages the internal + * retiming function. Setting the CDR to OFF enables an internal bypassing mode ,which + * directs traffic around the internal CDR. (Reference: SFF-8636) + * [Note]: value=0xff: ON. + * value=0x00: OFF. + */ + uint8_t cdr; + + /* [Prop]: rate_id + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Addr: A0h / Offset: 13 + * 2. Value description: + * 00h Unspecified + * 01h SFF-8079 (4/2/1G Rate_Select & AS0/AS1) + * 02h SFF-8431 (8/4/2G Rx Rate_Select only) + * 03h Unspecified * + * 04h SFF-8431 (8/4/2G Tx Rate_Select only) + * 05h Unspecified * + * 06h SFF-8431 (8/4/2G Independent Rx & Tx Rate_select) + * 07h Unspecified * + * 08h FC-PI-5 (16/8/4G Rx Rate_select only) High=16G only, Low=8G/4G + * 09h Unspecified * + * 0Ah FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) High=16G only, + * Low=8G/4G + * 0Bh Unspecified * + * 0Ch FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select) + * High=32G only, Low = 16G/8G + * 0Dh Unspecified * + * 0Eh 10/8G Rx and Tx Rate_Select controlling the operation or locking + * modes of the internal signal conditioner, retimer or CDR, according + * to the logic table defined in Table 10-2, High Bit Rate + * (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = 8.5 Gb/s. In this mode, + * the default value of bit 110.3 (Soft Rate Select RS(0), Table 9-11) + * and of bit 118.3 (Soft Rate Select RS(1), Table 10-1) is 1. + * 0Fh Unspecified * + * 10h-FFh Unallocated + */ + int rate_id; + + /* [Prop]: soft_rs0 + * [Desc]: Soft Rate Select 0(RX). + * [Note]: 1. Writing '1' selects full bandwidth operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(0) or RS(0) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 110 / Bit: 3 + */ + uint8_t soft_rs0; + + /* [Prop]: soft_rs1 + * [Desc]: Soft Rate Select 1(TX). + * [Note]: 1. Writing '1' selects full bandwidth TX operation. + * 2. This bit is "OR'd with the hard Rate_Select, AS(1) or RS(1) pin value. + * 3. Default at power up is logic zero/low + * 4. Addr: A2h / Offset: 118 / Bit: 3 + */ + uint8_t soft_rs1; + + /* [Prop]: diag_type + * [Desc]: DIAGNOSTIC MONITORING TYPE (A0h/92) + * [Note]: Description in SFF-8472 as below: + * Bit7: Reserved for legacy diagnostic implementations. Must be '0' for compliance + * with this document. + * Bit6: Digital diagnostic monitoring implemented (described in this document). + * Must be '1' for compliance with this document. + * Bit5 Internally calibrated + * Bit4 Externally calibrated + * Bit3 Received power measurement type.0 = OMA, 1 = average power + * Bit2 Address change required see section above, "addressing modes" + * Bit1-0 Unallocated + */ + uint8_t diag_type; + + /* [Prop]: curr_temp + * [Desc]: Transceiver Current Temperature (A2h/96-97) + * [Note]: 1. Dependent on diag_type. + * 2. 96: High byte + * 3. 97: Low byte + * 4. This feature only for SFP + */ + uint8_t curr_temp[2]; + + /* [Prop]: curr_vol + * [Desc]: Transceiver Current Voltage (SFP:A2h/108-109; QSFP:00h/22-23) + * [Note]: 1. Dependent on diag_type. + * 2. 98: High byte + * 3. 99: Low byte + * 4. This feature only for SFP + * 5. Internally measured transceiver supply voltage. Represented + * as a 16 bit unsigned integer with the voltage defined as the + * full 16 bit value (0-65535) with LSB equal to 100 uVolt, + * yielding a total range of 0 to +6.55 Volts + */ + uint8_t curr_voltage[2]; + + /* [Prop]: curr_tx_bias + * [Desc]: Transceiver TX Bias Current (SFP:A2h/100-101; QSFP:00h/26-27) + * [Note]: 1. Dependent on diag_type. + * 2. 100: High byte + * 3. 101: Low byte + * 4. This feature only for SFP + * 5. Measured TX bias current in uA. Represented as a 16 bit unsigned + * integer with the current defined as the full 16 bit value (0-65535) + * with LSB equal to 2 uA, yielding a total range of 0 to 131 mA. + * Accuracy is vendor specific but must be better than 10% of the + * manufacturer's nominal value over specified operating temperature + * and voltage. + */ + uint8_t curr_tx_bias[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured TX output power in mW. Represented as a 16 bit unsigned + * integer with the power defined as the full 16 bit value (0-65535) + * with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW + * (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of + * laser monitor photodiode current. It is factory calibrated to absolute + * units using the most representative fiber output type. Accuracy is + * vendor specific but must be better than 3dB over specified temperature + * and voltage. Data is not valid when the transmitter is disabled. + */ + uint8_t curr_tx_power[8]; + + /* [Prop]: curr_tx_power + * [Desc]: Transceiver TX Output Power (A2h/102-103) + * [Note]: 1. Dependent on diag_type. + * 2. 102: High byte + * 3. 103: Low byte + * 4. This feature only for SFP + * 5. Measured RX received optical power in mW. Value can represent either + * average received power or OMA depending upon how bit 3 of byte 92 (A0h) + * is set. Represented as a 16 bit unsigned integer with the power defined + * as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a + * total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is + * dependent upon the exact optical wavelength. For the vendor specified + * wavelength, accuracy shall be better than 3dB over specified temperature + * and voltage. + */ + uint8_t curr_rx_power[8]; + + /* [Prop]: wavelength + * [Desc]: Wavelength or Copper Cable Attenuation + * [Note]: (Following is info from SFF-8636) + * For optical free side devices, this parameter identifies the nominal + * transmitter output wavelength at room temperature. This parameter is a + * 16-bit hex value with Byte 186 as high order byte and Byte 187 as low + * order byte. The laser wavelength is equal to the 16-bit integer value + * divided by 20 in nm (units of 0.05 nm). This resolution should be adequate + * to cover all relevant wavelengths yet provide enough resolution for all + * expected DWDM applications. For accurate representation of controlled + * wavelength applications, this value should represent the center of the + * guaranteed wavelength range. If the free side device is identified as + * copper cable these registers will be used to define the cable attenuation. + * An indication of 0 dB attenuation refers to the case where the attenuation + * is not known or is unavailable. + * Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB. + * Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB. + */ + uint8_t wavelength[2]; + + /* [Prop]: Amplitude control + * [Desc]: Amplitude control + * [Note]: QSFP28 => SFF-8636 03H Byte-238/239 + */ + uint8_t rx_am[2]; + + /* [Prop]: Emphasis control + * [Desc]: Emphasis control + * [Note]: SFP+/28 => SFF-8472 A2H Byte-115 + * QSFP28 => SFF-8636 03H Byte-236/237 + */ + uint8_t rx_em[2]; + + /* [Prop]: Soft Rx LOS + * [Desc]: Soft Rx LOS which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 3: + * - Bit 0: L-Rx1 LOS + * - Bit 1: L-Rx2 LOS + * - Bit 2: L-Rx3 LOS + * - Bit 3: L-Rx4 LOS + */ + uint8_t rx_los; + + /* [Prop]: Soft Tx Disable + * [Desc]: Soft Tx Disable which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Disable + * - Bit 1: Tx2 Disable + * - Bit 2: Tx3 Disable + * - Bit 3: Tx4 Disable + */ + uint8_t tx_disable; + + /* [Prop]: Soft Tx Fault + * [Desc]: Soft Tx Fault which provide by transceiver + * [Note]: (Following is info from SFF-8636) + * Byte 86: + * - Bit 0: Tx1 Fault + * - Bit 1: Tx2 Fault + * - Bit 2: Tx3 Fault + * - Bit 3: Tx4 Fault + */ + uint8_t tx_fault; + + /* [Prop]: Transceiver EQUALIZATION + * [Desc]: Transceiver EQUALIZATION + * [Note]: SFP+/28 => SFF-8472 A2H Byte-114 + * QSFP28 => SFF-8636 03H Byte-234/235 + */ + uint8_t tx_eq[2]; + + /* [Prop]: OPTION VALUES + * [Desc]: The bits in the option field shall specify the options implemented in the transceiver. + * [Note]: SFP+/28 => SFF-8472 A0H Byte-64/65 + * QSFP+/28 => SFF-8636 00H Byte-193/195 + */ + uint8_t option[3]; + + /* [Prop]: External PHY offset + * [Desc]: It needs to be setup first if you want to access transceiver external phy. + * [Note]: This feature dependent on transceiver. + * Currently, only 1G-RJ45 transceiver supported it. + */ + uint8_t extphy_offset; + + /* ========== Object private property ========== + */ + struct device *transvr_dev_p; + struct eeprom_map_s *eeprom_map_p; + struct i2c_client *i2c_client_p; + struct ioexp_obj_s *ioexp_obj_p; + struct transvr_worker_s *worker_p; + struct mutex lock; + char swp_name[32]; + int auto_config; + int auto_tx_disable; + int chan_id; + int chipset_type; + int curr_page; + int info; + int ioexp_virt_offset; + int lane_id[8]; + int layout; + int mode; + int retry; + int state; + int temp; + int type; + + /* ========== Object public functions ========== + */ + int (*get_id)(struct transvr_obj_s *self); + int (*get_ext_id)(struct transvr_obj_s *self); + int (*get_connector)(struct transvr_obj_s *self); + int (*get_vendor_name)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_pn)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_rev)(struct transvr_obj_s *self, char *buf_p); + int (*get_vendor_sn)(struct transvr_obj_s *self, char *buf_p); + int (*get_power_cls)(struct transvr_obj_s *self); + int (*get_br)(struct transvr_obj_s *self); + int (*get_len_sm)(struct transvr_obj_s *self); + int (*get_len_smf)(struct transvr_obj_s *self); + int (*get_len_om1)(struct transvr_obj_s *self); + int (*get_len_om2)(struct transvr_obj_s *self); + int (*get_len_om3)(struct transvr_obj_s *self); + int (*get_len_om4)(struct transvr_obj_s *self); + int (*get_comp_rev)(struct transvr_obj_s *self); + int (*get_comp_eth_1)(struct transvr_obj_s *self); + int (*get_comp_eth_10)(struct transvr_obj_s *self); + int (*get_comp_eth_10_40)(struct transvr_obj_s *self); + int (*get_comp_extend)(struct transvr_obj_s *self); + int (*get_cdr)(struct transvr_obj_s *self); + int (*get_rate_id)(struct transvr_obj_s *self); + int (*get_soft_rs0)(struct transvr_obj_s *self); + int (*get_soft_rs1)(struct transvr_obj_s *self); + int (*get_info)(struct transvr_obj_s *self); + int (*get_if_type)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_speed)(struct transvr_obj_s *self, char *buf_p); + int (*get_if_lane)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_temp)(struct transvr_obj_s *self, char *buf_p); + int (*get_curr_vol)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_rx_los)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_soft_tx_fault)(struct transvr_obj_s *self, char *buf_p); + int (*get_auto_tx_disable)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_bias)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_power)(struct transvr_obj_s *self, char *buf_p); + int (*get_tx_eq)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_am)(struct transvr_obj_s *self, char *buf_p); + int (*get_rx_em)(struct transvr_obj_s *self, char *buf_p); + int (*get_wavelength)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_offset)(struct transvr_obj_s *self, char *buf_p); + int (*get_extphy_reg)(struct transvr_obj_s *self, char *buf_p); + int (*set_cdr)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs0)(struct transvr_obj_s *self, int input_val); + int (*set_soft_rs1)(struct transvr_obj_s *self, int input_val); + int (*set_soft_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_auto_tx_disable)(struct transvr_obj_s *self, int input_val); + int (*set_tx_eq)(struct transvr_obj_s *self, int input_val); + int (*set_rx_am)(struct transvr_obj_s *self, int input_val); + int (*set_rx_em)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_offset)(struct transvr_obj_s *self, int input_val); + int (*set_extphy_reg)(struct transvr_obj_s *self, int input_val); + + /* ========== Object private functions ========== + */ + int (*init)(struct transvr_obj_s *self); + int (*clean)(struct transvr_obj_s *self); + int (*check)(struct transvr_obj_s *self); + int (*update_all)(struct transvr_obj_s *self, int show_err); + int (*fsm_4_direct)(struct transvr_obj_s* self, char *caller_name); + int (*fsm_4_polling)(struct transvr_obj_s* self, char *caller_name); + int (*send_uevent)(struct transvr_obj_s* self, enum kobject_action u_action); + int (*dump_all)(struct transvr_obj_s* self); +}; + + +/* For AVL Mapping */ +struct transvr_avl_s { + char vendor_name[32]; + char vendor_pn[32]; + int (*init)(struct transvr_obj_s *self); +}; + + +/* Worker for long term task of transceiver */ +struct transvr_worker_s { + /* Task Parameter */ + struct transvr_obj_s *transvr_p; + struct transvr_worker_s *next_p; + struct transvr_worker_s *pre_p; + unsigned long trigger_time; + char func_name[64]; + int retry; + int state; + + /* Task private data */ + void *p_data; + + /* Call back function */ + int (*main_task)(struct transvr_worker_s *task); + int (*post_task)(struct transvr_worker_s *task); +}; + + +struct transvr_obj_s * +create_transvr_obj(char *swp_name, + int chan_id, + struct ioexp_obj_s *ioexp_obj_p, + int ioexp_virt_offset, + int transvr_type, + int chipset_type, + int run_mode); + +void lock_transvr_obj(struct transvr_obj_s *self); +void unlock_transvr_obj(struct transvr_obj_s *self); +int isolate_transvr_obj(struct transvr_obj_s *self); + +int resync_channel_tier_2(struct transvr_obj_s *self); + +void alarm_msg_2_user(struct transvr_obj_s *self, char *emsg); + +#endif /* TRANSCEIVER_H */ + + + + + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/setup.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/setup.py new file mode 100644 index 00000000000..b5d2d146354 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/setup.py @@ -0,0 +1,14 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='sonic_platform', + version='1.0', + description='Module to initialize Ivnetec D7264 platforms', + + packages=['sonic_platform'], +) diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/__init__.py new file mode 100644 index 00000000000..d82f3749319 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import * diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/chassis.py new file mode 100644 index 00000000000..ec3876fa4d0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/chassis.py @@ -0,0 +1,210 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Chassis information +# +# version: 1.0 +############################################################################# + +try: + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.component import Component + from sonic_platform.eeprom import Eeprom + from sonic_platform.watchdog import Watchdog + from sonic_platform.psu import Psu + from sonic_platform.fan import Fan + from sonic_platform.sfp import Sfp + from sonic_platform.qsfp import QSfp + from sonic_platform.thermal import Thermal + from sonic_platform.transceiver_event import TransceiverEvent +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +############### +# Global +############### +NUM_PSU = 2 +NUM_FAN_TRAY = 4 +NUM_PORTS = 64 +QSFP_START = 0 +NUM_THERMAL = 6 +NUM_COMPONENT = 2 + +class Chassis(ChassisBase): + """Platform-specific Chassis class""" + + def __init__(self): + ChassisBase.__init__(self) + + # Initialize EEPROM and watchdog + self._eeprom = Eeprom() +# self._watchdog = Watchdog() + + #Initialize FAN object + for index in range(0, NUM_FAN_TRAY): + fan = Fan(index) + self._fan_list.append(fan) + + # Initialize PSU and PSU_fan object + for index in range(0, NUM_PSU): + psu = Psu(index) + self._psu_list.append(psu) + fan = Fan(index, True) + self._fan_list.append(fan) + + # Initialize SFP/QSFP object + for index in range(0, NUM_PORTS): + if index < QSFP_START: + sfp = Sfp(index) + else: + sfp = QSfp(index) + self._sfp_list.append(sfp) + + # Initialize Thermal object + for index in range(0, NUM_THERMAL): + thermal = Thermal(index) + self._thermal_list.append(thermal) + + # Initialize Component object + for index in range(0, NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Initialize TRANSCEIVER EVENT MONITOR + self.__xcvr_event = TransceiverEvent() + + #################### + # Device base + #################### + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return self._eeprom.modelstr() + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + return self._eeprom.part_number_str() + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + return self._eeprom.serial_number_str() + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + return True + + + #################### + # chassis base + #################### + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.base_mac_addr() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.serial_number_str() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821', + '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00', + '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'} + """ + return self._eeprom.system_eeprom_info() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + raise NotImplementedError + + + ############################################## + # Other methods + ############################################## + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + + Returns: + (bool, dict): + - True if call successful, False if not; + - A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, + where device_id is the device ID for this device and + device_event, + status='1' represents device inserted, + status='0' represents device removed. + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}} + indicates that fan 0 has been removed, fan 2 + has been inserted and sfp 11 has been removed. + """ + rc, xcvr_event = self.__xcvr_event.get_transceiver_change_event(timeout) + + return rc, {'sfp': xcvr_event} diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/component.py new file mode 100644 index 00000000000..0c5fe6a5a92 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/component.py @@ -0,0 +1,135 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Component information +# +# version: 1.0 +############################################################################# + +try: + import os + import re + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +############### +# Global +############### +HWMON_CPLD1_PATH = "/sys/class/hwmon/hwmon3/device/" +DMI_PATH = "/sys/class/dmi/id/" + +COMPONENT_NAME_LIST = [ + "CPLD_1", + "BIOS" +] + +COMPONENT_DESC_LIST = [ + "platform management and control LED", + "platform interrupt event handle", + "Basic Input/Output System" +] + + + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + self.index = component_index + + + ####################### + # private function + ####################### + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def __get_cpld_version(self): + cpld_version = None + attr_cpld_version = "info" + + if COMPONENT_NAME_LIST[self.index] == "CPLD_1": + attr_path = HWMON_CPLD1_PATH + attr_cpld_version + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + for line in attr_rv.split("\n"): + re_rv = re.search(r"The CPLD version is (?P.+)", line) + if re_rv is not None: + cpld_version = re_rv.group("version") + + return cpld_version + + #################### + # Device base + #################### + + def get_name(self): + """ + Retrieves the name of the component + + Returns: + A string containing the name of the component + """ + return COMPONENT_NAME_LIST[self.index] + + def get_description(self): + """ + Retrieves the description of the component + + Returns: + A string containing the description of the component + """ + return COMPONENT_DESC_LIST[self.index] + + def get_firmware_version(self): + """ + Retrieves the firmware version of the component + + Returns: + A string containing the firmware version of the component + """ + version = None + attr_bios_version = "bios_date" + + if "CPLD" in COMPONENT_NAME_LIST[self.index]: + version = self.__get_cpld_version() + elif COMPONENT_NAME_LIST[self.index] == "BIOS": + attr_path = DMI_PATH + attr_bios_version + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + version = attr_rv + + return version + + def install_firmware(self, image_path): + """ + Installs firmware to the component + + Args: + image_path: A string, path to firmware image + + Returns: + A boolean, True if install was successful, False if not + """ + raise NotImplementedError \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/eeprom.py new file mode 100644 index 00000000000..65dc7997e25 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/eeprom.py @@ -0,0 +1,114 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the eeprom information +# +# version: 1.0 +############################################################################# + + +try: + from sonic_eeprom import eeprom_tlvinfo + import binascii +except ImportError, e: + raise ImportError(str(e) + "- required module not found") + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self): + self.__eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0053/eeprom" + super(Eeprom, self).__init__(self.__eeprom_path, 0, '', True) + self.__eeprom_tlv_dict = dict() + try: + self.__eeprom_data = self.read_eeprom() + except: + self.__eeprom_data = "N/A" + raise RuntimeError("Eeprom is not Programmed") + else: + eeprom = self.__eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + return + + total_length = (ord(eeprom[9]) << 8) | ord(eeprom[10]) + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + ord(eeprom[tlv_index + 1])] + code = "0x%02X" % (ord(tlv[0])) + + if ord(tlv[0]) == self._TLV_CODE_VENDOR_EXT: + value = str((ord(tlv[2]) << 24) | (ord(tlv[3]) << 16) | + (ord(tlv[4]) << 8) | ord(tlv[5])) + value += str(tlv[6:6 + ord(tlv[1])]) + else: + name, value = self.decoder(None, tlv) + + self.__eeprom_tlv_dict[code] = value + if ord(eeprom[tlv_index]) == self._TLV_CODE_CRC_32: + break + + tlv_index += ord(eeprom[tlv_index+1]) + 2 + + def serial_number_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_SERIAL_NUMBER) + if not is_valid: + return "N/A" + return results[2] + + def base_mac_addr(self): + (is_valid, t) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_MAC_BASE) + if not is_valid or t[1] != 6: + return super(eeprom_tlvinfo.TlvInfoDecoder, self).switchaddrstr(e) + + return ":".join([binascii.b2a_hex(T) for T in t[2]]) + + def modelstr(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_PRODUCT_NAME) + if not is_valid: + return "N/A" + + return results[2] + + def part_number_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_PART_NUMBER) + if not is_valid: + return "N/A" + + return results[2] + + def serial_tag_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_SERVICE_TAG) + if not is_valid: + return "N/A" + + return results[2] + + def revision_str(self): + (is_valid, results) = self.get_tlv_field( + self.__eeprom_data, self._TLV_CODE_DEVICE_VERSION) + if not is_valid: + return "N/A" + + return results[2] + + def system_eeprom_info(self): + """ + Returns a dictionary, where keys are the type code defined in + ONIE EEPROM format and values are their corresponding values + found in the system EEPROM. + """ + return self.__eeprom_tlv_dict diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/fan.py new file mode 100644 index 00000000000..3cf160be5eb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/fan.py @@ -0,0 +1,274 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the FAN information +# +# version: 1.0 +############################################################################# + +try: + import os + import math + from sonic_platform_base.fan_base import FanBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +############### +# Global +############### +HWMON_PATH = "/sys/class/hwmon/hwmon2/" + +class Fan(FanBase): + """Platform-specific Fan class""" + + def __init__(self, index, is_psu_fan=False): + self.is_psu_fan = is_psu_fan + + if self.is_psu_fan: + self.psu_index = index + 1 + self.psu_fan_pwm = "pwm_psu{}".format(self.psu_index) + self.psu_fan_rpm = "rpm_psu{}".format(self.psu_index) + else: + self.fan_index = index + 1 + self.fan_pwm = "pwm{}".format(self.fan_index) + self.fan_status_led_green_color = "fan_led_grn{}".format(self.fan_index) + self.fan_status_led_red_color = "fan_led_red{}".format(self.fan_index) + self.fan_front_rpm = "fan{}_input".format(self.fan_index * 2 - 1) + self.fan_rear_rpm = "fan{}_input".format(self.fan_index * 2) + self.fan_gpi = "fan_gpi" + + +####################### +# private function +####################### + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + + #################### + # Device base + #################### + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + if self.is_psu_fan: + return "PSU-{}_FAN".format(self.psu_index) + else: + return "FAN-{}".format(self.fan_index) + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + + Note: + fan_gpi define 8 bits + low byte means fan presense + high byte means fan direction + """ + if self.is_psu_fan: + return True + + presence = False + attr_path = HWMON_PATH + self.fan_gpi + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + not_presence_bit = 1 << (self.fan_index - 1) + if not (int(attr_rv, 16) & not_presence_bit): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + raise NotImplementedError + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + raise NotImplementedError + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + status = False + + if self.is_psu_fan: + attr_path_1 = HWMON_PATH + self.psu_fan_rpm + attr_path_2 = HWMON_PATH + self.psu_fan_rpm + else: + attr_path_1 = HWMON_PATH + self.fan_front_rpm + attr_path_2 = HWMON_PATH + self.fan_rear_rpm + + attr_rv_1 = self.__get_attr_value(attr_path_1) + attr_rv_2 = self.__get_attr_value(attr_path_2) + if (attr_rv_1 != 'ERR' and attr_rv_2 != 'ERR'): + if (attr_rv_1 > 0 and attr_rv_2 > 0): + status = True + + return status + + + ################# + # fan base + ################# + + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + + Note: + fan_gpi define 8 bits + low byte means fan presense + high byte means fan direction + """ + if self.is_psu_fan: + return "unknown" + + direction = self.FAN_DIRECTION_INTAKE + attr_path = HWMON_PATH + self.fan_gpi + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + attr_rv = int(attr_rv,16) >> 4 + direction_bit = 1 << (self.fan_index - 1) + if (attr_rv & direction_bit): + direction = self.FAN_DIRECTION_EXHAUST + + return direction + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + pwm = 0 + pwm_range = 255 #0-255 + speed = 0 + + if self.is_psu_fan: + attr_path = HWMON_PATH + self.psu_fan_pwm + else: + attr_path = HWMON_PATH + self.fan_pwm + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + pwm = int(attr_rv) + speed = math.ceil(float(pwm * 100 / pwm_range)) + + return int(speed) + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + raise NotImplementedError + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + raise NotImplementedError + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + raise NotImplementedError + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + + Args: + color: A string representing the color with which to set the + fan module status LED + + Returns: + bool: True if status LED state is set successfully, False if not + """ + raise NotImplementedError + + def get_status_led(self): + """ + Gets the state of the fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.is_psu_fan: + return "unknown" + + on = "1" + attr_grn_path = HWMON_PATH + self.fan_status_led_green_color + attr_red_path = HWMON_PATH + self.fan_status_led_red_color + + attr_grn_rv = self.__get_attr_value(attr_grn_path) + attr_red_rv = self.__get_attr_value(attr_red_path) + if (attr_grn_rv != 'ERR' and attr_red_rv != 'ERR'): + if (attr_grn_rv == on): + return self.STATUS_LED_COLOR_GREEN + elif (attr_red_rv == on): + return self.STATUS_LED_COLOR_RED + else: + return self.STATUS_LED_COLOR_OFF diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/platform.py new file mode 100644 index 00000000000..688d3f361b0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/platform.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Platform information +# +# version: 1.0 +############################################################################# + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PlatformBase): + """Platform-specific Platform class""" + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/psu.py new file mode 100644 index 00000000000..c832235eebd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/psu.py @@ -0,0 +1,238 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSU information +# +# version: 1.0 +############################################################################# + +try: + import os + from sonic_platform_base.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +############### +# Global +############### +HWMON_PATH = "/sys/class/hwmon/hwmon2/" + +class Psu(PsuBase): + """Inventec Platform-specific PSU class""" + + def __init__(self, psu_index): + self.index = psu_index + 1 + self.psu_presence_attr = "psu{}".format(self.index - 1) + self.psu_power_in_attr = "psoc_psu{}_pin".format(self.index) + self.psu_power_out_attr = "psoc_psu{}_pout".format(self.index) + self.psu_voltage_in_attr = "psoc_psu{}_vin".format(self.index) + self.psu_voltage_out_attr = "psoc_psu{}_vout".format(self.index) + self.psu_current_in_attr = "psoc_psu{}_iin".format(self.index) + self.psu_current_out_attr = "psoc_psu{}_iout".format(self.index) + self.psu_serial_attr = "psoc_psu{}_serial".format(self.index) + self.psu_model_attr = "psoc_psu{}_version".format(self.index) + + + ####################### + # private function + ####################### + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + + #################### + # Device base + #################### + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return "PSU-{}".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + + Note: + CPLD report the PSU{} status in psoc driver + 000 = PSU normal operation string = "0 : normal" + 100 = PSU fault string = "4 : fault" + 010 = PSU unpowered string = "2 : unpowered" + 111 = PSU not installed string = "7 : not installed" + """ + presence = False + attr_not_installed = "0 : not installed" + attr_path = HWMON_PATH + self.psu_presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (attr_rv != attr_not_installed): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + model_str = "" + attr_path = HWMON_PATH + self.psu_model_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + model_str = attr_rv + + return model_str + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + serial_no = "" + attr_path = HWMON_PATH + self.psu_serial_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + serial_no = attr_rv + + return serial_no + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + Note: + CPLD report the PSU{} status in psoc driver + 000 = PSU normal operation string = "0 : normal" + 100 = PSU fault string = "4 : fault" + 010 = PSU unpowered string = "2 : unpowered" + 111 = PSU not installed string = "7 : not installed" + """ + status = False + attr_not_installed = "0 : normal" + attr_path = HWMON_PATH + self.psu_presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (attr_rv == attr_not_installed): + status = True + + return status + + + ################# + # psu base + ################# + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + voltage_out = 0.0 + attr_path = HWMON_PATH + self.psu_voltage_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + voltage_out = float(attr_rv) / 1000 + + return voltage_out + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + current_in = 0.0 + attr_path = HWMON_PATH + self.psu_current_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + current_in = float(attr_rv) / 1000 + + return current_in + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, e.g. 302.6 + """ + power_out = 0.0 + attr_path = HWMON_PATH + self.psu_power_out_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + power_out = float(attr_rv) / 1000 + + return power_out + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + + Args: + color: A string representing the color with which to set the + PSU status LED + + Returns: + bool: True if status LED state is set successfully, False if not + """ + raise NotImplementedError + + def get_status_led(self): + """ + Gets the state of the PSU status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/qsfp.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/qsfp.py new file mode 100644 index 00000000000..428ffd661fa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/qsfp.py @@ -0,0 +1,930 @@ +#!/usr/bin/env python +# +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the QSFP information +# +# version: 1.0 +############################################################################# + +try: + import os + import sys + import time + from ctypes import create_string_buffer + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom + from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +INFO_OFFSET = 128 +THRE_OFFSET = 384 #128*3 +DOM_OFFSET = 0 + +XCVR_INTFACE_BULK_OFFSET = 0 +XCVR_INTFACE_BULK_WIDTH_QSFP = 20 +XCVR_HW_REV_WIDTH_QSFP = 2 +XCVR_CABLE_LENGTH_WIDTH_QSFP = 5 +XCVR_VENDOR_NAME_OFFSET = 20 +XCVR_VENDOR_NAME_WIDTH = 16 +XCVR_VENDOR_OUI_OFFSET = 37 +XCVR_VENDOR_OUI_WIDTH = 3 +XCVR_VENDOR_PN_OFFSET = 40 +XCVR_VENDOR_PN_WIDTH = 16 +XCVR_HW_REV_OFFSET = 56 +XCVR_HW_REV_WIDTH_OSFP = 2 +XCVR_VENDOR_SN_OFFSET = 68 +XCVR_VENDOR_SN_WIDTH = 16 +XCVR_VENDOR_DATE_OFFSET = 84 +XCVR_VENDOR_DATE_WIDTH = 8 +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 1 + +# Offset for values in QSFP eeprom +QSFP_DOM_REV_OFFSET = 1 +QSFP_DOM_REV_WIDTH = 1 +QSFP_TEMPE_OFFSET = 22 +QSFP_TEMPE_WIDTH = 2 +QSFP_VOLT_OFFSET = 26 +QSFP_VOLT_WIDTH = 2 +QSFP_CHANNL_MON_OFFSET = 34 +QSFP_CHANNL_MON_WIDTH = 16 +QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH = 24 +QSFP_CONTROL_OFFSET = 86 +QSFP_CONTROL_WIDTH = 8 +QSFP_CHANNL_RX_LOS_STATUS_OFFSET = 3 +QSFP_CHANNL_RX_LOS_STATUS_WIDTH = 1 +QSFP_CHANNL_TX_FAULT_STATUS_OFFSET = 4 +QSFP_CHANNL_TX_FAULT_STATUS_WIDTH = 1 +QSFP_POWEROVERRIDE_OFFSET = 93 +QSFP_POWEROVERRIDE_WIDTH = 1 +QSFP_MODULE_THRESHOLD_OFFSET = 128 +QSFP_MODULE_THRESHOLD_WIDTH = 24 +QSFP_CHANNEL_THRESHOLD_OFFSET = 176 +QSFP_CHANNEL_THRESHOLD_WIDTH = 16 + +class QSfp(SfpBase): + + def __init__(self, index): + self.__index = index + + self.__platform = "x86_64-inventec_d7264-r0" + self.__hwsku = "INVENTEC-D7264" + + self.__port_to_i2c_mapping = { + 0:10, 1:11, 2:12, 3:13, 4:14, 5:15, 6:16, 7:17, + 8:18, 9:19, 10:20, 11:21, 12:22, 13:23, 14:24, 15:25, + 16:26, 17:27, 18:28, 19:29, 20:30, 21:31, 22:32, 23:33, + 24:34, 25:35, 26:36, 27:37, 28:38, 29:39, 30:40, 31:41, + 32:45, 33:44, 34:43, 35:42, 36:49, 37:48, 38:47, 39:46, + 40:53, 41:52, 42:51, 43:50, 44:57, 45:56, 46:55, 47:54, + 48:61, 49:60, 50:59, 51:58, 52:65, 53:64, 54:63, 55:62, + 56:69, 57:68, 58:67, 59:66, 60:73, 61:72, 62:71, 63:70 + } + self.__port_end = len(self.__port_to_i2c_mapping) - 1; + + self.__presence_attr = None + self.__eeprom_path = None + if self.__index in range(0, self.__port_end + 1): + self.__presence_attr = "/sys/class/swps/port{}/present".format(self.__index) + self.__lpmode_attr = "/sys/class/swps/port{}/lpmod".format(self.__index) + self.__reset_attr = "/sys/class/swps/port{}/reset".format(self.__index) + self.__eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom".format(self.__port_to_i2c_mapping[self.__index]) + + SfpBase.__init__(self) + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def __is_host(self): + return os.system("docker > /dev/null 2>&1") == 0 + + def __get_path_to_port_config_file(self): + host_platform_root_path = '/usr/share/sonic/device' + docker_hwsku_path = '/usr/share/sonic/hwsku' + + host_platform_path = "/".join([host_platform_root_path, self.__platform]) + hwsku_path = "/".join([host_platform_path, self.__hwsku]) if self.__is_host() else docker_hwsku_path + + return "/".join([hwsku_path, "port_config.ini"]) + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + sysfsfile_eeprom = None + eeprom_raw = [] + + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + sysfs_eeprom_path = self.__eeprom_path + try: + sysfsfile_eeprom = open(sysfs_eeprom_path, mode="rb", buffering=0) + sysfsfile_eeprom.seek(offset) + raw = sysfsfile_eeprom.read(num_bytes) + raw_len = len(raw) + for n in range(0, raw_len): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except: + pass + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + + return eeprom_raw + + def __convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + name = None + + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings(self.__get_path_to_port_config_file()) + name = sfputil_helper.logical[self.__index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_path = self.__presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 0): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("modelname", "N/A") + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("serialnum", "N/A") + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and not self.get_reset_status() + +############################################## +# SFP methods +############################################## + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + mominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + + transceiver_info_dict_keys = ['type', 'hardwarerev', + 'serialnum', 'manufacturename', + 'modelname', 'Connector', + 'encoding', 'ext_identifier', + 'ext_rateselect_compliance', 'cable_type', + 'cable_length', 'nominal_bit_rate', + 'specification_compliance', 'vendor_date', + 'vendor_oui'] + + qsfp_cable_length_tup = ('Length(km)', 'Length OM3(2m)', + 'Length OM2(m)', 'Length OM1(m)', 'Length Cable Assembly(m)') + + qsfp_compliance_code_tup = ('10/40G Ethernet Compliance Code', 'SONET Compliance codes', + 'SAS/SATA compliance codes', 'Gigabit Ethernet Compliant codes', + 'Fibre Channel link length/Transmitter Technology', 'Fibre Channel transmission media', + 'Fibre Channel Speed') + + sfpi_obj = sff8436InterfaceId() + if not self.get_presence() or not sfpi_obj: + return {} + + offset = INFO_OFFSET + + sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes((offset + XCVR_INTFACE_BULK_OFFSET), XCVR_INTFACE_BULK_WIDTH_QSFP) + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw, 0) + + sfp_vendor_name_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) + + sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) + + sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes((offset + XCVR_HW_REV_OFFSET), XCVR_HW_REV_WIDTH_QSFP) + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) + + sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) + + sfp_vendor_oui_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) + if sfp_vendor_oui_raw is not None: + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_vendor_oui_raw, 0) + + sfp_vendor_date_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) + sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_vendor_date_raw, 0) + + transceiver_info_dict = dict.fromkeys(transceiver_info_dict_keys, 'N/A') + + if sfp_interface_bulk_data: + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + transceiver_info_dict['type_abbrv_name'] = sfp_interface_bulk_data['data']['type_abbrv_name']['value'] + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value']) + + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] if sfp_vendor_name_data else 'N/A' + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] if sfp_vendor_pn_data else 'N/A' + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] if sfp_vendor_rev_data else 'N/A' + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] if sfp_vendor_sn_data else 'N/A' + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] if sfp_vendor_oui_data else 'N/A' + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] if sfp_vendor_date_data else 'N/A' + + transceiver_info_dict['cable_type'] = "Unknown" + transceiver_info_dict['cable_length'] = "Unknown" + for key in qsfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + + compliance_code_dict = dict() + for key in qsfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + return transceiver_info_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. + tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. + reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. + lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. + tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. + tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 + | |to channel 3. + temperature |INT |module temperature in Celsius + voltage |INT |supply voltage in mV + txbias |INT |TX Bias Current in mA, n is the channel number, + | |for example, tx2bias stands for tx bias of channel 2. + rxpower |INT |received optical power in mW, n is the channel number, + | |for example, rx2power stands for rx power of channel 2. + txpower |INT |TX output power in mW, n is the channel number, + | |for example, tx2power stands for tx power of channel 2. + ======================================================================== + """ + transceiver_dom_info_dict_keys = ['rx_los', 'tx_fault', + 'reset_status', 'power_lpmode', + 'tx_disable', 'tx_disable_channel', + 'temperature', 'voltage', + 'rx1power', 'rx2power', + 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', + 'tx3bias', 'tx4bias', + 'tx1power', 'tx2power', + 'tx3power', 'tx4power'] + + sfpd_obj = sff8436Dom() + sfpi_obj = sff8436InterfaceId() + + if not self.get_presence() or not sfpi_obj or not sfpd_obj: + return {} + + transceiver_dom_info_dict = dict.fromkeys(transceiver_dom_info_dict_keys, 'N/A') + offset = DOM_OFFSET + offset_xcvr = INFO_OFFSET + + # QSFP capability byte parse, through this byte can know whether it support tx_power or not. + # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, + # need to add more code for determining the capability and version compliance + # in SFF-8636 dom capability definitions evolving with the versions. + qsfp_dom_capability_raw = self.__read_eeprom_specific_bytes((offset_xcvr + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) + if qsfp_dom_capability_raw is not None: + qspf_dom_capability_data = sfpi_obj.parse_qsfp_dom_capability(qsfp_dom_capability_raw, 0) + else: + return None + + dom_temperature_raw = self.__read_eeprom_specific_bytes((offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + + dom_voltage_raw = self.__read_eeprom_specific_bytes((offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + qsfp_dom_rev_raw = self.__read_eeprom_specific_bytes((offset + QSFP_DOM_REV_OFFSET), QSFP_DOM_REV_WIDTH) + if qsfp_dom_rev_raw is not None: + qsfp_dom_rev_data = sfpd_obj.parse_sfp_dom_rev(qsfp_dom_rev_raw, 0) + qsfp_dom_rev = qsfp_dom_rev_data['data']['dom_rev']['value'] + + # The tx_power monitoring is only available on QSFP which compliant with SFF-8636 + # and claimed that it support tx_power with one indicator bit. + dom_channel_monitor_data = {} + dom_channel_monitor_raw = None + qsfp_tx_power_support = qspf_dom_capability_data['data']['Tx_power_support']['value'] + if (qsfp_dom_rev[0:8] != 'SFF-8636' or (qsfp_dom_rev[0:8] == 'SFF-8636' and qsfp_tx_power_support != 'on')): + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + + else: + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0) + transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TX1Power']['value'] + transceiver_dom_info_dict['tx2power'] = dom_channel_monitor_data['data']['TX2Power']['value'] + transceiver_dom_info_dict['tx3power'] = dom_channel_monitor_data['data']['TX3Power']['value'] + transceiver_dom_info_dict['tx4power'] = dom_channel_monitor_data['data']['TX4Power']['value'] + + if dom_channel_monitor_raw: + transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RX1Power']['value'] + transceiver_dom_info_dict['rx2power'] = dom_channel_monitor_data['data']['RX2Power']['value'] + transceiver_dom_info_dict['rx3power'] = dom_channel_monitor_data['data']['RX3Power']['value'] + transceiver_dom_info_dict['rx4power'] = dom_channel_monitor_data['data']['RX4Power']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value'] + transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value'] + transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value'] + transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value'] + + for key in transceiver_dom_info_dict: + transceiver_dom_info_dict[key] = self.__convert_string_to_num(transceiver_dom_info_dict[key]) + + transceiver_dom_info_dict['rx_los'] = self.get_rx_los() + transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() + transceiver_dom_info_dict['reset_status'] = self.get_reset_status() + transceiver_dom_info_dict['tx_disable'] = self.get_tx_disable() + transceiver_dom_info_dict['tx_disable_channel'] = self.get_tx_disable_channel() + transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() + + + return transceiver_dom_info_dict + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. + templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. + temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. + templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. + vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. + vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. + vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. + vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. + rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. + rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. + rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. + rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. + txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. + txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. + txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. + txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. + txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. + txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. + txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. + txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. + ======================================================================== + """ + transceiver_dom_threshold_info_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning'] + + sfpd_obj = sff8436Dom() + if not self.get_presence() or not sfpd_obj: + return {} + + transceiver_dom_threshold_dict = dict.fromkeys(transceiver_dom_threshold_info_dict_keys, 'N/A') + offset = THRE_OFFSET + + dom_module_threshold_raw = self.__read_eeprom_specific_bytes((offset + QSFP_MODULE_THRESHOLD_OFFSET), QSFP_MODULE_THRESHOLD_WIDTH) + if dom_module_threshold_raw: + module_threshold_values = sfpd_obj.parse_module_threshold_values(dom_module_threshold_raw, 0) + module_threshold_data = module_threshold_values.get('data') + if module_threshold_data: + transceiver_dom_threshold_dict['temphighalarm'] = module_threshold_data['TempHighAlarm']['value'] + transceiver_dom_threshold_dict['templowalarm'] = module_threshold_data['TempLowAlarm']['value'] + transceiver_dom_threshold_dict['temphighwarning'] = module_threshold_data['TempHighWarning']['value'] + transceiver_dom_threshold_dict['templowwarning'] = module_threshold_data['TempLowWarning']['value'] + transceiver_dom_threshold_dict['vcchighalarm'] = module_threshold_data['VccHighAlarm']['value'] + transceiver_dom_threshold_dict['vcclowalarm'] = module_threshold_data['VccLowAlarm']['value'] + transceiver_dom_threshold_dict['vcchighwarning'] = module_threshold_data['VccHighWarning']['value'] + transceiver_dom_threshold_dict['vcclowwarning'] = module_threshold_data['VccLowWarning']['value'] + + dom_channel_thres_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNEL_THRESHOLD_OFFSET), QSFP_CHANNEL_THRESHOLD_WIDTH) + channel_threshold_values = sfpd_obj.parse_channel_threshold_values(dom_channel_thres_raw, 0) + channel_threshold_data = channel_threshold_values.get('data') + if channel_threshold_data: + transceiver_dom_threshold_dict['rxpowerhighalarm'] = channel_threshold_data['RxPowerHighAlarm']['value'] + transceiver_dom_threshold_dict['rxpowerlowalarm'] = channel_threshold_data['RxPowerLowAlarm']['value'] + transceiver_dom_threshold_dict['rxpowerhighwarning'] = channel_threshold_data['RxPowerHighWarning']['value'] + transceiver_dom_threshold_dict['rxpowerlowwarning'] = channel_threshold_data['RxPowerLowWarning']['value'] + transceiver_dom_threshold_dict['txpowerhighalarm'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerlowalarm'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerhighwarning'] = "0.0dBm" + transceiver_dom_threshold_dict['txpowerlowwarning'] = "0.0dBm" + transceiver_dom_threshold_dict['txbiashighalarm'] = channel_threshold_data['TxBiasHighAlarm']['value'] + transceiver_dom_threshold_dict['txbiaslowalarm'] = channel_threshold_data['TxBiasLowAlarm']['value'] + transceiver_dom_threshold_dict['txbiashighwarning'] = channel_threshold_data['TxBiasHighWarning']['value'] + transceiver_dom_threshold_dict['txbiaslowwarning'] = channel_threshold_data['TxBiasLowWarning']['value'] + + for key in transceiver_dom_threshold_dict: + transceiver_dom_threshold_dict[key] = self.__convert_string_to_num(transceiver_dom_threshold_dict[key]) + + return transceiver_dom_threshold_dict + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + + Returns: + A Boolean, True if reset enabled, False if disabled + """ + reset_status = False + attr_path = self.__reset_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 0): + reset_status = True + + return reset_status + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + rx_los = False + rx_los_list = [] + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(QSFP_CHANNL_RX_LOS_STATUS_OFFSET, QSFP_CHANNL_RX_LOS_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + rx_los_data = int(dom_channel_monitor_raw[0], 16) + rx_los_list.append(rx_los_data & 0x01 != 0) + rx_los_list.append(rx_los_data & 0x02 != 0) + rx_los_list.append(rx_los_data & 0x04 != 0) + rx_los_list.append(rx_los_data & 0x08 != 0) + rx_los = rx_los_list[0] and rx_los_list[1] and rx_los_list[2] and rx_los_list[3] + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + tx_fault = False + tx_fault_list = [] + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(QSFP_CHANNL_TX_FAULT_STATUS_OFFSET, QSFP_CHANNL_TX_FAULT_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + tx_fault_data = int(dom_channel_monitor_raw[0], 16) + tx_fault_list.append(tx_fault_data & 0x01 != 0) + tx_fault_list.append(tx_fault_data & 0x02 != 0) + tx_fault_list.append(tx_fault_data & 0x04 != 0) + tx_fault_list.append(tx_fault_data & 0x08 != 0) + tx_fault = tx_fault_list[0] and tx_fault_list[1] and tx_fault_list[2] and tx_fault_list[3] + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + """ + tx_disable = False + tx_disable_list = [] + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return tx_disable + + dom_control_raw = self.__read_eeprom_specific_bytes(QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + tx_disable_list.append('On' == dom_control_data['data']['TX1Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX2Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX3Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX4Disable']['value']) + tx_disable = tx_disable_list[0] and tx_disable_list[1] and tx_disable_list[2] and tx_disable_list[3] + + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + tx_disable_channel = 0 + tx_disable_list = [] + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return tx_disable_channel + + dom_control_raw = self.__read_eeprom_specific_bytes(QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + tx_disable_list.append('On' == dom_control_data['data']['TX1Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX2Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX3Disable']['value']) + tx_disable_list.append('On' == dom_control_data['data']['TX4Disable']['value']) + + for i in range(len(tx_disable_list)): + if tx_disable_list[i]: + tx_disable_channel |= 1 << i + + return tx_disable_channel + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + lpmode = False + attr_path = self.__lpmode_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 1): + lpmode = True + + return lpmode + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + power_override = False + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return power_override + + dom_control_raw = self.__read_eeprom_specific_bytes(QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + power_override = ('On' == dom_control_data['data']['PowerOverride']['value']) + + return power_override + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + + Returns: + An integer number of current temperature in Celsius + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("temperature", "N/A") + + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + + Returns: + An integer number of supply voltage in mV + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("voltage", "N/A") + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_bs = transceiver_dom_info_dict.get("tx1bias", "N/A") + tx2_bs = transceiver_dom_info_dict.get("tx2bias", "N/A") + tx3_bs = transceiver_dom_info_dict.get("tx3bias", "N/A") + tx4_bs = transceiver_dom_info_dict.get("tx4bias", "N/A") + return [tx1_bs, tx2_bs, tx3_bs, tx4_bs] if transceiver_dom_info_dict else [] + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + rx1_pw = transceiver_dom_info_dict.get("rx1power", "N/A") + rx2_pw = transceiver_dom_info_dict.get("rx2power", "N/A") + rx3_pw = transceiver_dom_info_dict.get("rx3power", "N/A") + rx4_pw = transceiver_dom_info_dict.get("rx4power", "N/A") + return [rx1_pw, rx2_pw, rx3_pw, rx4_pw] if transceiver_dom_info_dict else [] + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_pw = transceiver_dom_info_dict.get("tx1power", "N/A") + tx2_pw = transceiver_dom_info_dict.get("tx2power", "N/A") + tx3_pw = transceiver_dom_info_dict.get("tx3power", "N/A") + tx4_pw = transceiver_dom_info_dict.get("tx4power", "N/A") + return [tx1_pw, tx2_pw, tx3_pw, tx4_pw] + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + + Returns: + A boolean, True if successful, False if not + """ + + try: + reg_file = open(self.__reset_attr, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 0 + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 2 second to allow it to settle + time.sleep(2) + + try: + reg_file = open(self.__reset_attr, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + sysfs_eeprom_path = self.__eeprom_path + sysfsfile_eeprom = None + try: + tx_disable_ctl = 0xf if tx_disable else 0x0 + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom = open(sysfs_eeprom_path, "r+b") + sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + + Returns: + A boolean, True if successful, False if not + """ + sysfs_eeprom_path = self.__eeprom_path + sysfsfile_eeprom = None + try: + channel_state = self.get_tx_disable_channel() + tx_enable_mask = [0xe, 0xd, 0xb, 0x7] + tx_disable_mask = [0x1, 0x3, 0x7, 0xf] + tx_disable_ctl = channel_state | tx_disable_mask[channel] if disable else channel_state & tx_enable_mask[channel] + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom = open(sysfs_eeprom_path, "r+b") + sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + try: + reg_file = open(self.__lpmode_attr, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = int(reg_file.readline().rstrip()) + + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + reg_file.write(hex(reg_value)) + reg_file.close() + + return True + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + sysfs_eeprom_path = self.__eeprom_path + sysfsfile_eeprom = None + try: + power_override_bit = 0 + if power_override: + power_override_bit |= 1 << 0 + + power_set_bit = 0 + if power_set: + power_set_bit |= 1 << 1 + + buffer = create_string_buffer(1) + buffer[0] = chr(power_override_bit | power_set_bit) + # Write to eeprom + sysfsfile_eeprom = open(sysfs_eeprom_path, "r+b") + sysfsfile_eeprom.seek(QSFP_POWEROVERRIDE_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/sfp.py new file mode 100644 index 00000000000..cfc1d0c64bd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/sfp.py @@ -0,0 +1,745 @@ +#!/usr/bin/env python +# +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the QSFP information +# +# version: 1.0 +############################################################################# + +try: + import os + import sys + from ctypes import create_string_buffer + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_sfp.sff8472 import sff8472Dom + from sonic_platform_base.sonic_sfp.sff8472 import sff8472InterfaceId + from sonic_platform_base.sonic_sfp.sff8472 import sffbase + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +INFO_OFFSET = 0 +DOM_OFFSET = 256 + +XCVR_INTFACE_BULK_OFFSET = 0 +XCVR_INTFACE_BULK_WIDTH_SFP = 21 +XCVR_VENDOR_NAME_OFFSET = 20 +XCVR_VENDOR_NAME_WIDTH = 16 +XCVR_VENDOR_OUI_OFFSET = 37 +XCVR_VENDOR_OUI_WIDTH = 3 +XCVR_VENDOR_PN_OFFSET = 40 +XCVR_VENDOR_PN_WIDTH = 16 +XCVR_HW_REV_OFFSET = 56 +XCVR_HW_REV_WIDTH_SFP = 4 +XCVR_VENDOR_SN_OFFSET = 68 +XCVR_VENDOR_SN_WIDTH = 16 +XCVR_VENDOR_DATE_OFFSET = 84 +XCVR_VENDOR_DATE_WIDTH = 8 +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 1 + +# Offset for values in SFP eeprom +SFP_TEMPE_OFFSET = 96 +SFP_TEMPE_WIDTH = 2 +SFP_VOLT_OFFSET = 98 +SFP_VOLT_WIDTH = 2 +SFP_CHANNL_MON_OFFSET = 100 +SFP_CHANNL_MON_WIDTH = 6 +SFP_MODULE_THRESHOLD_OFFSET = 0 +SFP_MODULE_THRESHOLD_WIDTH = 40 +SFP_CHANNL_THRESHOLD_OFFSET = 112 +SFP_CHANNL_THRESHOLD_WIDTH = 2 +SFP_STATUS_CONTROL_OFFSET = 110 +SFP_STATUS_CONTROL_WIDTH = 1 +SFP_TX_DISABLE_HARD_BIT = 7 +SFP_TX_DISABLE_SOFT_BIT = 6 + +class Sfp(SfpBase): + + def __init__(self, index): + self.__index = index + + self.__platform = "x86_64-inventec_d7264-r0" + self.__hwsku = "INVENTEC-D7264" + + self.__port_to_i2c_mapping = { + 0:10, 1:11, 2:12, 3:13, 4:14, 5:15, 6:16, 7:17, + 8:18, 9:19, 10:20, 11:21, 12:22, 13:23, 14:24, 15:25, + 16:26, 17:27, 18:28, 19:29, 20:30, 21:31, 22:32, 23:33, + 24:34, 25:35, 26:36, 27:37, 28:38, 29:39, 30:40, 31:41, + 32:45, 33:44, 34:43, 35:42, 36:49, 37:48, 38:47, 39:46, + 40:53, 41:52, 42:51, 43:50, 44:57, 45:56, 46:55, 47:54, + 48:61, 49:60, 50:59, 51:58, 52:65, 53:64, 54:63, 55:62, + 56:69, 57:68, 58:67, 59:66, 60:73, 61:72, 62:71, 63:70 + } + self.__port_end = len(self.__port_to_i2c_mapping) - 1; + + self.__presence_attr = None + self.__eeprom_path = None + if self.__index in range(0, self.__port_end + 1): + self.__presence_attr = "/sys/class/swps/port{}/present".format(self.__index) + self.__eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom".format(self.__port_to_i2c_mapping[self.__index]) + + SfpBase.__init__(self) + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + def __is_host(self): + return os.system("docker > /dev/null 2>&1") == 0 + + def __get_path_to_port_config_file(self): + host_platform_root_path = '/usr/share/sonic/device' + docker_hwsku_path = '/usr/share/sonic/hwsku' + + host_platform_path = "/".join([host_platform_root_path, self.__platform]) + hwsku_path = "/".join([host_platform_path, self.__hwsku]) if self.__is_host() else docker_hwsku_path + + return "/".join([hwsku_path, "port_config.ini"]) + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + sysfsfile_eeprom = None + eeprom_raw = [] + + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + sysfs_eeprom_path = self.__eeprom_path + try: + sysfsfile_eeprom = open(sysfs_eeprom_path, mode="rb", buffering=0) + sysfsfile_eeprom.seek(offset) + raw = sysfsfile_eeprom.read(num_bytes) + raw_len = len(raw) + for n in range(0, raw_len): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except: + pass + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + + return eeprom_raw + + def __convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + +############################################## +# Device methods +############################################## + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + name = None + + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings(self.__get_path_to_port_config_file()) + name = sfputil_helper.logical[self.__index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + attr_path = self.__presence_attr + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + if (int(attr_rv) == 0): + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("modelname", "N/A") + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + transceiver_info_dict = self.get_transceiver_info() + return transceiver_info_dict.get("serialnum", "N/A") + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and not self.get_reset_status() + +############################################## +# SFP methods +############################################## + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + mominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + + transceiver_info_dict_keys = ['type', 'hardwarerev', + 'serialnum', 'manufacturename', + 'modelname', 'Connector', + 'encoding', 'ext_identifier', + 'ext_rateselect_compliance', 'cable_type', + 'cable_length', 'nominal_bit_rate', + 'specification_compliance', 'vendor_date', + 'vendor_oui'] + + sfp_cable_length_tup = ('LengthSMFkm-UnitsOfKm', 'LengthSMF(UnitsOf100m)', + 'Length50um(UnitsOf10m)', 'Length62.5um(UnitsOfm)', + 'LengthCable(UnitsOfm)', 'LengthOM3(UnitsOf10m)') + + sfp_compliance_code_tup = ('10GEthernetComplianceCode', 'InfinibandComplianceCode', + 'ESCONComplianceCodes', 'SONETComplianceCodes', + 'EthernetComplianceCodes', 'FibreChannelLinkLength', + 'FibreChannelTechnology', 'SFP+CableTechnology', + 'FibreChannelTransmissionMedia', 'FibreChannelSpeed') + + sfpi_obj = sff8472InterfaceId() + if not self.get_presence() or not sfpi_obj: + return {} + + offset = INFO_OFFSET + + sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes((offset + XCVR_INTFACE_BULK_OFFSET), XCVR_INTFACE_BULK_WIDTH_SFP) + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw, 0) + + sfp_vendor_name_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) + + sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) + + sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes((offset + XCVR_HW_REV_OFFSET), XCVR_HW_REV_WIDTH_SFP) + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) + + sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) + + sfp_vendor_oui_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH) + if sfp_vendor_oui_raw is not None: + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_vendor_oui_raw, 0) + + sfp_vendor_date_raw = self.__read_eeprom_specific_bytes((offset + XCVR_VENDOR_DATE_OFFSET), XCVR_VENDOR_DATE_WIDTH) + sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_vendor_date_raw, 0) + + transceiver_info_dict = dict.fromkeys(transceiver_info_dict_keys, 'N/A') + + if sfp_interface_bulk_data: + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + transceiver_info_dict['type_abbrv_name'] = sfp_interface_bulk_data['data']['type_abbrv_name']['value'] + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['NominalSignallingRate(UnitsOf100Mbd)']['value']) + + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] if sfp_vendor_name_data else 'N/A' + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] if sfp_vendor_pn_data else 'N/A' + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] if sfp_vendor_rev_data else 'N/A' + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] if sfp_vendor_sn_data else 'N/A' + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] if sfp_vendor_oui_data else 'N/A' + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] if sfp_vendor_date_data else 'N/A' + + transceiver_info_dict['cable_type'] = "Unknown" + transceiver_info_dict['cable_length'] = "Unknown" + for key in sfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + + compliance_code_dict = dict() + for key in sfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + return transceiver_info_dict + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. + tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. + reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. + lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. + tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. + tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 + | |to channel 3. + temperature |INT |module temperature in Celsius + voltage |INT |supply voltage in mV + txbias |INT |TX Bias Current in mA, n is the channel number, + | |for example, tx2bias stands for tx bias of channel 2. + rxpower |INT |received optical power in mW, n is the channel number, + | |for example, rx2power stands for rx power of channel 2. + txpower |INT |TX output power in mW, n is the channel number, + | |for example, tx2power stands for tx power of channel 2. + ======================================================================== + """ + transceiver_dom_info_dict_keys = ['rx_los', 'tx_fault', + 'reset_status', 'power_lpmode', + 'tx_disable', 'tx_disable_channel', + 'temperature', 'voltage', + 'rx1power', 'rx2power', + 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', + 'tx3bias', 'tx4bias', + 'tx1power', 'tx2power', + 'tx3power', 'tx4power'] + + sfpd_obj = sff8472Dom() + if not self.get_presence() or not sfpd_obj: + return {} + + eeprom_ifraw = self.__read_eeprom_specific_bytes(0, DOM_OFFSET) + sfpi_obj = sff8472InterfaceId(eeprom_ifraw) + cal_type = sfpi_obj.get_calibration_type() + sfpd_obj._calibration_type = cal_type + + offset = DOM_OFFSET + transceiver_dom_info_dict = dict.fromkeys(transceiver_dom_info_dict_keys, 'N/A') + + dom_temperature_raw = self.__read_eeprom_specific_bytes((offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + transceiver_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + + dom_voltage_raw = self.__read_eeprom_specific_bytes((offset + SFP_VOLT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + transceiver_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes((offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_voltage_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + transceiver_dom_info_dict['tx1power'] = dom_voltage_data['data']['TXPower']['value'] + transceiver_dom_info_dict['rx1power'] = dom_voltage_data['data']['RXPower']['value'] + transceiver_dom_info_dict['tx1bias'] = dom_voltage_data['data']['TXBias']['value'] + + for key in transceiver_dom_info_dict: + transceiver_dom_info_dict[key] = self.__convert_string_to_num(transceiver_dom_info_dict[key]) + + transceiver_dom_info_dict['reset_status'] = self.get_reset_status() + transceiver_dom_info_dict['rx_los'] = self.get_rx_los() + transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() + transceiver_dom_info_dict['tx_disable'] = self.get_tx_disable() + transceiver_dom_info_dict['tx_disable_channel'] = self.get_tx_disable_channel() + transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() + + return transceiver_dom_info_dict + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. + templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. + temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. + templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. + vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. + vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. + vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. + vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. + rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. + rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. + rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. + rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. + txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. + txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. + txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. + txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. + txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. + txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. + txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. + txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. + ======================================================================== + """ + transceiver_dom_threshold_info_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning'] + + sfpd_obj = sff8472Dom() + + if not self.get_presence() and not sfpd_obj: + return {} + + eeprom_ifraw = self.__read_eeprom_specific_bytes(0, DOM_OFFSET) + sfpi_obj = sff8472InterfaceId(eeprom_ifraw) + cal_type = sfpi_obj.get_calibration_type() + sfpd_obj._calibration_type = cal_type + + offset = DOM_OFFSET + transceiver_dom_threshold_info_dict = dict.fromkeys(transceiver_dom_threshold_info_dict_keys, 'N/A') + dom_module_threshold_raw = self.__read_eeprom_specific_bytes((offset + SFP_MODULE_THRESHOLD_OFFSET), SFP_MODULE_THRESHOLD_WIDTH) + if dom_module_threshold_raw is not None: + dom_module_threshold_data = sfpd_obj.parse_alarm_warning_threshold(dom_module_threshold_raw, 0) + + transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] + transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] + transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] + transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] + + transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VoltageHighAlarm']['value'] + transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VoltageLowAlarm']['value'] + transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VoltageHighWarning']['value'] + transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VoltageLowWarning']['value'] + + transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_module_threshold_data['data']['BiasHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_module_threshold_data['data']['BiasLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_module_threshold_data['data']['BiasHighWarning']['value'] + transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_module_threshold_data['data']['BiasLowWarning']['value'] + + transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_module_threshold_data['data']['TXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_module_threshold_data['data']['TXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_module_threshold_data['data']['TXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_module_threshold_data['data']['TXPowerLowWarning']['value'] + + transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_module_threshold_data['data']['RXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_module_threshold_data['data']['RXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_module_threshold_data['data']['RXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_module_threshold_data['data']['RXPowerLowWarning']['value'] + + for key in transceiver_dom_threshold_info_dict: + transceiver_dom_threshold_info_dict[key] = self.__convert_string_to_num(transceiver_dom_threshold_info_dict[key]) + + return transceiver_dom_threshold_info_dict + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + + Returns: + A Boolean, True if reset enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + rx_los = False + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + rx_los = (sffbase().test_bit(data, 1) != 0) + + return rx_los + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + tx_fault = False + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + tx_fault = (sffbase().test_bit(data, 2) != 0) + + return tx_fault + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + """ + tx_disable = False + tx_fault = False + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw: + data = int(status_control_raw[0], 16) + tx_disable_hard = (sffbase().test_bit(data, SFP_TX_DISABLE_HARD_BIT) != 0) + tx_disable_soft = (sffbase().test_bit(data, SFP_TX_DISABLE_SOFT_BIT) != 0) + tx_disable = tx_disable_hard | tx_disable_soft + + return tx_disable + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + # SFP doesn't support this feature + return 0 + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + # SFP doesn't support this feature + return False + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + + Returns: + An integer number of current temperature in Celsius + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("temperature", "N/A") + + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + + Returns: + An integer number of supply voltage in mV + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + return transceiver_dom_info_dict.get("voltage", "N/A") + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_bs = transceiver_dom_info_dict.get("tx1bias", "N/A") + return [tx1_bs, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + rx1_pw = transceiver_dom_info_dict.get("rx1power", "N/A") + return [rx1_pw, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + transceiver_dom_info_dict = self.get_transceiver_bulk_status() + tx1_pw = transceiver_dom_info_dict.get("tx1power", "N/A") + return [tx1_pw, "N/A", "N/A", "N/A"] if transceiver_dom_info_dict else [] + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + + Returns: + A boolean, True if successful, False if not + """ + # SFP doesn't support this feature + return False + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + sysfs_eeprom_path = self.__eeprom_path + status_control_raw = self.__read_eeprom_specific_bytes(SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH) + if status_control_raw is not None: + # Set bit 6 for Soft TX Disable Select + # 01000000 = 64 and 10111111 = 191 + tx_disable_bit = 64 if tx_disable else 191 + status_control = int(status_control_raw[0], 16) + tx_disable_ctl = (status_control | tx_disable_bit) if tx_disable else (status_control & tx_disable_bit) + try: + sysfsfile_eeprom = open(sysfs_eeprom_path, mode="r+b", buffering=0) + buffer = create_string_buffer(1) + buffer[0] = chr(tx_disable_ctl) + # Write to eeprom + sysfsfile_eeprom.seek(SFP_STATUS_CONTROL_OFFSET) + sysfsfile_eeprom.write(buffer[0]) + except: + #print("Error: unable to open file: %s" % str(e)) + return False + finally: + if sysfsfile_eeprom: + sysfsfile_eeprom.close() + time.sleep(0.01) + return True + return False + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + + Returns: + A boolean, True if successful, False if not + """ + # SFP doesn't support this feature + return False + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + # SFP doesn't support this feature + return False + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + # SFP doesn't support this feature + return False + diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/thermal.py new file mode 100644 index 00000000000..d92769858c3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/thermal.py @@ -0,0 +1,183 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Thermal information +# +# version: 1.0 +############################################################################# + +import os + +try: + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +############### +# Global +############### +HWMON_PATH = "/sys/class/hwmon/hwmon2/" +THERMAL_NAME_LIST = [ + "FrontSide Temperature", + "FanBoard Temperature", + "NearASIC Temperature", + "Center(U10) Temperature", + "CPU Board Temperature", + "ASIC Temperature" +] + +class Thermal(ThermalBase): + """Platform-specific Thermal class""" + + def __init__(self, thermal_index): + self.index = thermal_index + self.thermal_tmp = "temp{}_input".format(self.index+1) + + + ####################### + # private function + ####################### + + def __get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip(' \t\n\r') + return retval + + + #################### + # Device base + #################### + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return THERMAL_NAME_LIST[self.index] + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + attr_path = HWMON_PATH + self.thermal_tmp + return os.path.isfile(attr_path) + + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + raise NotImplementedError + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + raise NotImplementedError + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + status = False + if (self.get_presence and self.get_temperature > 0): + status = True + + return status + + + #################### + # Device base + #################### + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + temperature = 0.0 + attr_path = HWMON_PATH + self.thermal_tmp + + attr_rv = self.__get_attr_value(attr_path) + if (attr_rv != 'ERR'): + temperature = float(attr_rv) / 1000 + + return temperature + + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + + Returns: + A float number, the high threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + raise NotImplementedError + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + + Returns: + A float number, the low threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + raise NotImplementedError + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + raise NotImplementedError + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/transceiver_event.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/transceiver_event.py new file mode 100644 index 00000000000..7105e7f2119 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/transceiver_event.py @@ -0,0 +1,115 @@ +#!/usr/bin/env python +# +# Name: transceiver_event.py, version: 1.0 +# + +try: + import time + import socket + import re + import os + from collections import OrderedDict +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class NetlinkEventMonitor(object): + __instance = None + + def __new__(cls, *args, **kwargs): + if not cls.__instance: + # print(cls) + cls.__instance = super(NetlinkEventMonitor, cls).__new__(cls) + cls.__instance.__recieved_events = OrderedDict() + return cls.__instance + + def __init__(self, timeout): + # print('__init__', self) + NETLINK_KOBJECT_UEVENT = 15 + self.__socket = socket.socket(socket.AF_NETLINK, socket.SOCK_DGRAM, NETLINK_KOBJECT_UEVENT) + self.__timeout = timeout + + def start(self): + # print('start', self.__timeout) + self.__socket.bind((os.getpid(), -1)) + if 0 == self.__timeout: + self.__socket.settimeout(None) + else: + self.__socket.settimeout(self.__timeout/1000.0) + + def stop(self): + self.__socket.close() + + def __enter__(self): + # print('__enter__', self) + self.start() + return self + + def __exit__(self, exc_type, exc_value, traceback): + # print('__exit__', self) + self.stop() + + def __iter__(self): + # print('__iter__', self) + while True: + for item in self.next_events(): + yield item + + def next_events(self): + try: + data = self.__socket.recv(16384) + event = {} + for item in data.split(b'\x00'): + if not item: + # check if we have an event and if we already received it + if event and 'SEQNUM' in event: + event_seqnum = event['SEQNUM'] + if event_seqnum in self.__recieved_events: + pass + else: + # print("=", event_seqnum) + self.__recieved_events[event_seqnum] = event + length = len(self.__recieved_events) + # print("=", length) + if (length > 100): + self.__recieved_events.popitem(last=False) + yield event + event = {} + else: + try: + k, v = item.split(b'=', 1) + event[k.decode('ascii')] = v.decode('ascii') + # print("=",k,v) + except ValueError: + pass + except Exception: + yield {} + +class TransceiverEvent(object): + + def __init__(self): + pass + + def get_transceiver_change_event(self, timeout=0): + port_dict = {} + with NetlinkEventMonitor(timeout) as netlink_monitor: + for event in netlink_monitor: + if event and 'SUBSYSTEM' in event: + if event['SUBSYSTEM'] == 'swps': + #print('SWPS event. From %s, ACTION %s, IF_TYPE %s, IF_LANE %s' % (event['DEVPATH'], event['ACTION'], event['IF_TYPE'], event['IF_LANE'])) + portname = event['DEVPATH'].split("/")[-1] + rc = re.match(r"port(?P\d+)",portname) + if rc is not None: + if event['ACTION'] == "remove": + remove_num = int(rc.group("num")) + port_dict[remove_num] = "0" + elif event['ACTION'] == "add": + add_num = int(rc.group("num")) + port_dict[add_num] = "1" + return True, port_dict + else: + return False, {} + else: + pass + else: + return True, {} diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/watchdog.py new file mode 100644 index 00000000000..b7e91ba124c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/sonic_platform/watchdog.py @@ -0,0 +1,235 @@ +#!/usr/bin/env python + +############################################################################# +# Inventec d7264 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Watchdog information +# +############################################################################# + +import ctypes +import fcntl +import os +import subprocess +import time +import array + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +""" ioctl constants """ +IO_WRITE = 0x40000000 +IO_READ = 0x80000000 +IO_READ_WRITE = 0xC0000000 +IO_SIZE_INT = 0x00040000 +IO_SIZE_40 = 0x00280000 +IO_TYPE_WATCHDOG = ord('W') << 8 + +WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG +WDR_40 = IO_READ | IO_SIZE_40 | IO_TYPE_WATCHDOG +WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG + +""" Watchdog ioctl commands """ +WDIOC_GETSUPPORT = 0 | WDR_40 +WDIOC_GETSTATUS = 1 | WDR_INT +WDIOC_GETBOOTSTATUS = 2 | WDR_INT +WDIOC_GETTEMP = 3 | WDR_INT +WDIOC_SETOPTIONS = 4 | WDR_INT +WDIOC_KEEPALIVE = 5 | WDR_INT +WDIOC_SETTIMEOUT = 6 | WDWR_INT +WDIOC_GETTIMEOUT = 7 | WDR_INT +WDIOC_SETPRETIMEOUT = 8 | WDWR_INT +WDIOC_GETPRETIMEOUT = 9 | WDR_INT +WDIOC_GETTIMELEFT = 10 | WDR_INT + +""" Watchdog status constants """ +WDIOS_DISABLECARD = 0x0001 +WDIOS_ENABLECARD = 0x0002 + +WDT_COMMON_ERROR = -1 +WD_MAIN_IDENTITY = "iTCO_wdt" +WDT_SYSFS_PATH = "/sys/class/watchdog/" + + +class Watchdog(WatchdogBase): + + def __init__(self): + + self.watchdog, self.wdt_main_dev_name = self._get_wdt() + self.status_path = "/sys/class/watchdog/%s/status" % self.wdt_main_dev_name + self.state_path = "/sys/class/watchdog/%s/state" % self.wdt_main_dev_name + self.timeout_path = "/sys/class/watchdog/%s/timeout" % self.wdt_main_dev_name + # Set default value + self._disable() + self.armed = False + self.timeout = self._gettimeout(self.timeout_path) + + def _is_wd_main(self, dev): + """ + Checks watchdog identity + """ + identity = self._read_file( + "{}/{}/identity".format(WDT_SYSFS_PATH, dev)) + return identity == WD_MAIN_IDENTITY + + def _get_wdt(self): + """ + Retrieves watchdog device + """ + wdt_main_dev_list = [dev for dev in os.listdir( + "/dev/") if dev.startswith("watchdog") and self._is_wd_main(dev)] + if not wdt_main_dev_list: + return None + wdt_main_dev_name = wdt_main_dev_list[0] + watchdog_device_path = "/dev/{}".format(wdt_main_dev_name) + watchdog = os.open(watchdog_device_path, os.O_RDWR) + return watchdog, wdt_main_dev_name + + def _read_file(self, file_path): + """ + Read text file + """ + try: + with open(file_path, "r") as fd: + txt = fd.read() + except IOError: + return WDT_COMMON_ERROR + return txt.strip() + + def _enable(self): + """ + Turn on the watchdog timer + """ + req = array.array('h', [WDIOS_ENABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _disable(self): + """ + Turn off the watchdog timer + """ + req = array.array('h', [WDIOS_DISABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE) + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + req = array.array('I', [seconds]) + fcntl.ioctl(self.watchdog, WDIOC_SETTIMEOUT, req, True) + return int(req[0]) + + def _gettimeout(self, timeout_path): + """ + Get watchdog timeout + @return watchdog timeout + """ + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMEOUT, req, True) + + return int(req[0]) + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMELEFT, req, True) + + return int(req[0]) + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + if self.armed: + self._keepalive() + else: + self._enable() + self.armed = True + ret = self.timeout + except IOError as e: + pass + + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + self._disable() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + + timeleft = WDT_COMMON_ERROR + + if self.armed: + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft + + def __del__(self): + """ + Close watchdog + """ + + os.close(self.watchdog) diff --git a/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/utils/inventec_d7264_util.py b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/utils/inventec_d7264_util.py new file mode 100755 index 00000000000..b2f3f49cdec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/d7264q28b/utils/inventec_d7264_util.py @@ -0,0 +1,253 @@ +#!/usr/bin/env python +# +# Copyright (C) 2017 Inventec, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install(0) + elif arg == 'fast-reboot-install': + install(1) + elif arg == 'clean': + uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[D7264]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +"with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +instantiate =[ +'echo inv_eeprom 0x53> /sys/bus/i2c/devices/i2c-0/new_device'] + +drivers =[ +'gpio-ich', +'lpc_ich', +'i2c-i801', +'i2c-mux', +'i2c-mux-pca954x', +'i2c-dev', +'inv_eeprom', +'inv_psoc', +'inv_platform', +'inv_cpld', +'inv_pthread', +'swps'] + + +def system_install(boot_option): + ''' boot_option: 0 - normal, 1 - fast-reboot''' + global FORCE + + #remove default drivers to avoid modprobe order conflicts + time.sleep(2) + status, output = exec_cmd("rmmod i2c_ismt ", 1) + status, output = exec_cmd("rmmod i2c-i801 ", 1) + status, output = exec_cmd("rmmod gpio-ich ", 1) + status, output = exec_cmd("rmmod lpc_ich ", 1) + + + #install drivers + for i in range(0,len(drivers)): + if drivers[i] == "gpio-ich": + status, output = exec_cmd("modprobe gpio-ich gpiobase=0", 1) + elif drivers[i] == "swps": + if boot_option == 1: + status, output = exec_cmd("modprobe swps io_no_init=1", 1) + else: + status, output = exec_cmd("modprobe "+drivers[i], 1) + else: + status, output = exec_cmd("modprobe "+drivers[i], 1) + + if status: + print output + if FORCE == 0: + return status + + #instantiate devices + for i in range(0,len(instantiate)): + time.sleep(1) + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(10,18): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-2/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(18,26): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-3/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(26,34): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-4/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(34,42): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-5/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(42,50): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-6/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(50,58): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-7/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(58,66): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-8/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + for i in range(66,74): + status, output =exec_cmd("echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-9/i2c-"+str(i)+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return + + +def system_ready(): + if not device_found(): + return False + return True + +def install(boot_option=0): + ''' boot_option: 0 - normal, 1 - fast-reboot ''' + if not device_found(): + print "No device, installing...." + status = system_install(boot_option) + if status: + if FORCE == 0: + return status + else: + print " D7264 devices detected...." + return + +def uninstall(): + global FORCE + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + status, output = exec_cmd("rmmod gpio_ich ", 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"*0072", 0) + ret2, log = exec_cmd("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() + + + diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/changelog b/platform/broadcom/sonic-platform-modules-inventec/debian/changelog new file mode 100644 index 00000000000..46aebb02ec8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/changelog @@ -0,0 +1,25 @@ +sonic-inventec-platform-modules (1.1.0) unstable; urgency=low + * Add support for Inventec d7264 + + -- alvin lin Thu, 12 Jul 2018 16:00:00 +0800 + +sonic-inventec-platform-modules (1.1.0) unstable; urgency=low + * Add support for Inventec d6556 + + -- alvin lin Thu, 12 Jul 2018 16:00:00 +0800 + +sonic-inventec-platform-modules (1.1.0) unstable; urgency=low + * Add support for Inventec d6254 + + -- alvin lin Wed, 09 May 2018 16:00:00 +0800 + +sonic-inventec-platform-modules (1.1.0) unstable; urgency=low + * Add support for Inventec d7054 + + -- developer Tue, 18 Jul 2017 16:30:45 +0800 + +sonic-inventec-platform-modules (1.0.0) unstable; urgency=low + + * Add support for Inventec d7032 + + -- developer Wed, 05 Oct 2016 16:30:45 +0800 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/compat b/platform/broadcom/sonic-platform-modules-inventec/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/control b/platform/broadcom/sonic-platform-modules-inventec/debian/control new file mode 100644 index 00000000000..ef23d496b2e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/control @@ -0,0 +1,46 @@ +Source: sonic-inventec-platform-modules +Section: main +Priority: extra +Maintainer: Inventec +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: platform-modules-d7032q28b +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led + +Package: platform-modules-d7054q28b +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led + +Package: platform-modules-d6254qs +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led + +Package: platform-modules-d6556 +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led + +Package: platform-modules-d6356 +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led + +Package: platform-modules-d6356j +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led + +Package: platform-modules-d7264q28b +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led + +Package: platform-modules-d7264 +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6254qs.init b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6254qs.init new file mode 100644 index 00000000000..92405e28fd2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6254qs.init @@ -0,0 +1,73 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Inventec d6254qs board. +### END INIT INFO + +DIR=/usr/share/sonic/device/x86_64-inventec_d6254qs-r0/plugins +MONITOR_DAEMON=$DIR/transceiver_monitor.py +MONITOR_DAEMON_NAME=transceiver_monitor +LED_DAEMON=$DIR/led_proc.py +LED_DAEMON_NAME=led_proc +ASIC_DAEMON=$DIR/asic_monitor.py +ASIC_DAEMON_NAME=asic_monitor +ASIC_DAEMON_NAM=asic_monitor +PLATFORM_STATUS_DAEMON=$DIR/platform_status.py +PLATFORM_STATUS_DAEMON_NAME=platform_status + +# The process ID of the script when it runs is stored here: +MONITOR_PIDFILE=/var/run/$MONITOR_DAEMON_NAME.pid +LED_PIDFILE=/var/run/$LED_DAEMON_NAME.pid +ASIC_PIDFILE=/var/run/$ASIC_DAEMON_NAME.pid +PLATFORM_STATUS_PIDFILE=/var/run/$PLATFORM_STATUS_DAEMON_NAME.pid + +do_monitor_start() { + /sbin/start-stop-daemon --quiet --oknodo --pidfile $LED_PIDFILE --make-pidfile --startas $LED_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $MONITOR_PIDFILE --make-pidfile --startas $MONITOR_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $ASIC_PIDFILE --make-pidfile --startas $ASIC_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $PLATFORM_STATUS_PIDFILE --make-pidfile --startas $PLATFORM_STATUS_DAEMON --start --background -- $DAEMON_OPTS +} + +do_monitor_stop() { + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $MONITOR_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $LED_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $ASIC_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $PLATFORM_STATUS_PIDFILE --retry 10 +} + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + /usr/local/bin/inventec_d6254_util.py -f install + do_monitor_${1} + echo "done." + ;; + +stop) + + /usr/local/bin/inventec_d6254_util.py -f clean + do_monitor_${1} + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-d6254qs.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6254qs.install b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6254qs.install new file mode 100644 index 00000000000..2706cdf0423 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6254qs.install @@ -0,0 +1,3 @@ +d6254qs/utils/inventec_d6254_util.py usr/local/bin +common/utils/platform/*.py usr/share/sonic/device/x86_64-inventec_d6254qs-r0/plugins +systemd/platform-modules-d6254qs.service lib/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.init b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.init new file mode 100644 index 00000000000..be29798edf7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.init @@ -0,0 +1,69 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Inventec d6356 board. +### END INIT INFO + +PLATFORM_DIR=/usr/share/sonic/device/x86_64-inventec_d6356-r0/plugins + +PLATFORM_DAEMON=$PLATFORM_DIR/platfmgr.py +PLATFORM_DAEMON_NAME=platfmgr + +# The process ID of the script when it runs is stored here: +PLATFORM_PIDFILE=/var/run/$PLATFORM_DAEMON_NAME.pid + +do_monitor_start() { + /sbin/start-stop-daemon --quiet --oknodo --pidfile $PLATFORM_PIDFILE --make-pidfile --startas $PLATFORM_DAEMON --start --background -- $DAEMON_OPTS +} + +do_monitor_stop() { + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $PLATFORM_PIDFILE --retry 10 +} + +# Check Fast-Reboot cause +FAST_REBOOT='no' +case "$(cat /proc/cmdline)" in + *fast-reboot*|*warm*) + FAST_REBOOT='yes' + ;; + *) + FAST_REBOOT='no' + ;; +esac + +case "$1" in +start) + echo -n "Setting up board... " + if [ "$FAST_REBOOT" = "yes" ] ; then + /usr/local/bin/inventec_d6356_util.py -f fast-reboot-install + else + /usr/local/bin/inventec_d6356_util.py -f install + fi + do_monitor_${1} + echo "done." + ;; + +stop) + /usr/local/bin/inventec_d6356_util.py -f clean + do_monitor_${1} + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-d6356.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.install b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.install new file mode 100644 index 00000000000..fa7dc2dae89 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.install @@ -0,0 +1,4 @@ +d6356/utils/inventec_d6356_util.py /usr/local/bin +common/utils/platform/* /usr/share/sonic/device/x86_64-inventec_d6356-r0/plugins +systemd/platform-modules-d6356.service /lib/systemd/system +d6356/utils/sonic_platform-1.0-py2-none-any.whl /usr/share/sonic/device/x86_64-inventec_d6356-r0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.postinst b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.postinst new file mode 100644 index 00000000000..079c319f77d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356.postinst @@ -0,0 +1,25 @@ +#!/bin/sh +# Automatically added by dh_systemd_enable +# This will only remove masks created by d-s-h on package removal. +deb-systemd-helper unmask platform-modules-d6356.service >/dev/null || true + +# was-enabled defaults to true, so new installations run enable. +if deb-systemd-helper --quiet was-enabled platform-modules-d6356.service; then + # Enables the unit on first installation, creates new + # symlinks on upgrades if the unit file has changed. + deb-systemd-helper enable platform-modules-d6356.service >/dev/null || true +else + # Update the statefile to add new symlinks (if any), which need to be + # cleaned up on purge. Also remove old symlinks. + deb-systemd-helper update-state platform-modules-d6356.service >/dev/null || true +fi +# End automatically added section +depmod -a +# Automatically added by dh_installinit +if [ "$1" = "configure" ] || [ "$1" = "abort-upgrade" ]; then + if [ -x "/etc/init.d/platform-modules-d6356" ]; then + update-rc.d platform-modules-d6356 defaults >/dev/null + invoke-rc.d platform-modules-d6356 start || exit $? + fi +fi +# End automatically added section diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356j.init b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356j.init new file mode 100644 index 00000000000..0caa296aed7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356j.init @@ -0,0 +1,69 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Inventec d6356j board. +### END INIT INFO + +PLATFORM_DIR=/usr/share/sonic/device/x86_64-inventec_d6356j-r0/plugins + +PLATFORM_DAEMON=$PLATFORM_DIR/platfmgr.py +PLATFORM_DAEMON_NAME=platfmgr + +# The process ID of the script when it runs is stored here: +PLATFORM_PIDFILE=/var/run/$PLATFORM_DAEMON_NAME.pid + +do_monitor_start() { + /sbin/start-stop-daemon --quiet --oknodo --pidfile $PLATFORM_PIDFILE --make-pidfile --startas $PLATFORM_DAEMON --start --background -- $DAEMON_OPTS +} + +do_monitor_stop() { + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $PLATFORM_PIDFILE --retry 10 +} + +# Check Fast-Reboot cause +FAST_REBOOT='no' +case "$(cat /proc/cmdline)" in + *fast-reboot*|*warm*) + FAST_REBOOT='yes' + ;; + *) + FAST_REBOOT='no' + ;; +esac + +case "$1" in +start) + echo -n "Setting up board... " + if [ "$FAST_REBOOT" = "yes" ] ; then + /usr/local/bin/inventec_d6356j_util.py -f fast-reboot-install + else + /usr/local/bin/inventec_d6356j_util.py -f install + fi + do_monitor_${1} + echo "done." + ;; + +stop) + /usr/local/bin/inventec_d6356j_util.py -f clean + do_monitor_${1} + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-d6356j.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356j.install b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356j.install new file mode 100644 index 00000000000..229ccd80aeb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356j.install @@ -0,0 +1,4 @@ +d6356j/utils/inventec_d6356j_util.py /usr/local/bin +common/utils/platform/* /usr/share/sonic/device/x86_64-inventec_d6356j-r0/plugins +systemd/platform-modules-d6356j.service /lib/systemd/system +d6356j/utils/sonic_platform-1.0-py2-none-any.whl /usr/share/sonic/device/x86_64-inventec_d6356j-r0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356j.postinst b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356j.postinst new file mode 100644 index 00000000000..769a989eb46 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6356j.postinst @@ -0,0 +1,25 @@ +#!/bin/sh +# Automatically added by dh_systemd_enable +# This will only remove masks created by d-s-h on package removal. +deb-systemd-helper unmask platform-modules-d6356j.service >/dev/null || true + +# was-enabled defaults to true, so new installations run enable. +if deb-systemd-helper --quiet was-enabled platform-modules-d6356j.service; then + # Enables the unit on first installation, creates new + # symlinks on upgrades if the unit file has changed. + deb-systemd-helper enable platform-modules-d6356j.service >/dev/null || true +else + # Update the statefile to add new symlinks (if any), which need to be + # cleaned up on purge. Also remove old symlinks. + deb-systemd-helper update-state platform-modules-d6356j.service >/dev/null || true +fi +# End automatically added section +depmod -a +# Automatically added by dh_installinit +if [ "$1" = "configure" ] || [ "$1" = "abort-upgrade" ]; then + if [ -x "/etc/init.d/platform-modules-d6356j" ]; then + update-rc.d platform-modules-d6356j defaults >/dev/null + invoke-rc.d platform-modules-d6356j start || exit $? + fi +fi +# End automatically added section diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6556.init b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6556.init new file mode 100644 index 00000000000..fc6ba5a261b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6556.init @@ -0,0 +1,72 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Inventec d6556 board. +### END INIT INFO + +DIR=/usr/share/sonic/device/x86_64-inventec_d6556-r0/plugins +MONITOR_DAEMON=$DIR/transceiver_monitor.py +MONITOR_DAEMON_NAME=transceiver_monitor +LED_DAEMON=$DIR/led_proc.py +LED_DAEMON_NAME=led_proc +ASIC_DAEMON=$DIR/asic_monitor.py +ASIC_DAEMON_NAME=asic_monitor +PLATFORM_STATUS_DAEMON=$DIR/platform_status.py +PLATFORM_STATUS_DAEMON_NAME=platform_status + +# The process ID of the script when it runs is stored here: +MONITOR_PIDFILE=/var/run/$MONITOR_DAEMON_NAME.pid +LED_PIDFILE=/var/run/$LED_DAEMON_NAME.pid +ASIC_PIDFILE=/var/run/$ASIC_DAEMON_NAME.pid +PLATFORM_STATUS_PIDFILE=/var/run/$PLATFORM_STATUS_DAEMON_NAME.pid + +do_monitor_start() { + /sbin/start-stop-daemon --quiet --oknodo --pidfile $LED_PIDFILE --make-pidfile --startas $LED_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $MONITOR_PIDFILE --make-pidfile --startas $MONITOR_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $ASIC_PIDFILE --make-pidfile --startas $ASIC_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $PLATFORM_STATUS_PIDFILE --make-pidfile --startas $PLATFORM_STATUS_DAEMON --start --background -- $DAEMON_OPTS +} + +do_monitor_stop() { + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $MONITOR_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $LED_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $ASIC_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $PLATFORM_STATUS_PIDFILE --retry 10 +} + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + /usr/local/bin/inventec_d6556_util.py -f install + do_monitor_${1} + echo "done." + ;; + +stop) + + /usr/local/bin/inventec_d6556_util.py -f clean + do_monitor_${1} + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-d6556.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6556.install b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6556.install new file mode 100644 index 00000000000..1dce0b212a6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d6556.install @@ -0,0 +1,3 @@ +d6556/utils/inventec_d6556_util.py usr/local/bin +common/utils/platform/*.py usr/share/sonic/device/x86_64-inventec_d6556-r0/plugins +systemd/platform-modules-d6556.service lib/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7032q28b.init b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7032q28b.init new file mode 100644 index 00000000000..bcc9610abed --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7032q28b.init @@ -0,0 +1,72 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Inventec d7032q28b board. +### END INIT INFO + +DIR=/usr/share/sonic/device/x86_64-inventec_d7032q28b-r0/plugins +MONITOR_DAEMON=$DIR/transceiver_monitor.py +MONITOR_DAEMON_NAME=transceiver_monitor +LED_DAEMON=$DIR/led_proc.py +LED_DAEMON_NAME=led_proc +ASIC_DAEMON=$DIR/asic_monitor.py +ASIC_DAEMON_NAME=asic_monitor +PLATFORM_STATUS_DAEMON=$DIR/platform_status.py +PLATFORM_STATUS_DAEMON_NAME=platform_status + +# The process ID of the script when it runs is stored here: +MONITOR_PIDFILE=/var/run/$MONITOR_DAEMON_NAME.pid +LED_PIDFILE=/var/run/$LED_DAEMON_NAME.pid +ASIC_PIDFILE=/var/run/$ASIC_DAEMON_NAME.pid +PLATFORM_STATUS_PIDFILE=/var/run/$PLATFORM_STATUS_DAEMON_NAME.pid + +do_monitor_start() { + /sbin/start-stop-daemon --quiet --oknodo --pidfile $LED_PIDFILE --make-pidfile --startas $LED_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $MONITOR_PIDFILE --make-pidfile --startas $MONITOR_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $ASIC_PIDFILE --make-pidfile --startas $ASIC_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $PLATFORM_STATUS_PIDFILE --make-pidfile --startas $PLATFORM_STATUS_DAEMON --start --background -- $DAEMON_OPTS +} + +do_monitor_stop() { + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $MONITOR_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $LED_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $ASIC_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $PLATFORM_STATUS_PIDFILE --retry 10 +} + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + /usr/local/bin/inventec_d7032_util.py -f install + do_monitor_${1} + echo "done." + ;; + +stop) + + /usr/local/bin/inventec_d7032_util.py -f clean + do_monitor_${1} + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-d7032q28b.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7032q28b.install b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7032q28b.install new file mode 100644 index 00000000000..3bdd62f42d1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7032q28b.install @@ -0,0 +1,3 @@ +d7032q28b/utils/inventec_d7032_util.py usr/local/bin +common/utils/platform/*.py usr/share/sonic/device/x86_64-inventec_d7032q28b-r0/plugins +systemd/platform-modules-d7032q28b.service lib/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7054q28b.init b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7054q28b.init new file mode 100644 index 00000000000..809ad625555 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7054q28b.init @@ -0,0 +1,72 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Inventec d7054q28b board. +### END INIT INFO + +DIR=/usr/share/sonic/device/x86_64-inventec_d7054q28b-r0/plugins +MONITOR_DAEMON=$DIR/transceiver_monitor.py +MONITOR_DAEMON_NAME=transceiver_monitor +LED_DAEMON=$DIR/led_proc.py +LED_DAEMON_NAME=led_proc +ASIC_DAEMON=$DIR/asic_monitor.py +ASIC_DAEMON_NAME=asic_monitor +PLATFORM_STATUS_DAEMON=$DIR/platform_status.py +PLATFORM_STATUS_DAEMON_NAME=platform_status + +# The process ID of the script when it runs is stored here: +MONITOR_PIDFILE=/var/run/$MONITOR_DAEMON_NAME.pid +LED_PIDFILE=/var/run/$LED_DAEMON_NAME.pid +ASIC_PIDFILE=/var/run/$ASIC_DAEMON_NAME.pid +PLATFORM_STATUS_PIDFILE=/var/run/$PLATFORM_STATUS_DAEMON_NAME.pid + +do_monitor_start() { + /sbin/start-stop-daemon --quiet --oknodo --pidfile $LED_PIDFILE --make-pidfile --startas $LED_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $MONITOR_PIDFILE --make-pidfile --startas $MONITOR_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $ASIC_PIDFILE --make-pidfile --startas $ASIC_DAEMON --start --background -- $DAEMON_OPTS + /sbin/start-stop-daemon --quiet --oknodo --pidfile $PLATFORM_STATUS_PIDFILE --make-pidfile --startas $PLATFORM_STATUS_DAEMON --start --background -- $DAEMON_OPTS +} + +do_monitor_stop() { + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $MONITOR_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $LED_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $ASIC_PIDFILE --retry 10 + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $PLATFORM_STATUS_PIDFILE --retry 10 +} + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + /usr/local/bin/inventec_d7054_util.py -f install + do_monitor_${1} + echo "done." + ;; + +stop) + + /usr/local/bin/inventec_d7054_util.py -f clean + do_monitor_${1} + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-d7054q28b.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7054q28b.install b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7054q28b.install new file mode 100644 index 00000000000..8c2c9194f74 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7054q28b.install @@ -0,0 +1,4 @@ +d7054q28b/utils/inventec_d7054_util.py usr/local/bin +d7054q28b/utils/sonic_platform-1.0-py2-none-any.whl usr/share/sonic/device/x86_64-inventec_d7054q28b-r0 +common/utils/platform/*.py usr/share/sonic/device/x86_64-inventec_d7054q28b-r0/plugins +systemd/platform-modules-d7054q28b.service lib/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264.init b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264.init new file mode 100644 index 00000000000..add253381f5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264.init @@ -0,0 +1,70 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Inventec d7264 board. +### END INIT INFO + +PLATFORM_DIR=/usr/share/sonic/device/x86_64-inventec_d7264-r0/plugins + +PLATFORM_DAEMON=$PLATFORM_DIR/platfmgr.py +PLATFORM_DAEMON_NAME=platfmgr + +PLATFORM_PIDFILE=/var/run/$PLATFORM_DAEMON_NAME.pid + +do_monitor_start() { + /sbin/start-stop-daemon --quiet --oknodo --pidfile $PLATFORM_PIDFILE --make-pidfile --startas $PLATFORM_DAEMON --start --background -- $DAEMON_OPTS +} + +do_monitor_stop() { + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $PLATFORM_PIDFILE --retry 10 +} + +# Check Fast-Reboot cause +FAST_REBOOT='no' +case "$(cat /proc/cmdline)" in + *fast-reboot*|*warm*) + FAST_REBOOT='yes' + ;; + *) + FAST_REBOOT='no' + ;; +esac + +case "$1" in +start) + echo -n "Setting up board... " + if [ "$FAST_REBOOT" = "yes" ] ; then + /usr/local/bin/inventec_d7264_util.py -f fast-reboot-install + else + /usr/local/bin/inventec_d7264_util.py -f install + fi + + do_monitor_${1} + echo "done." + ;; + +stop) + + /usr/local/bin/inventec_d7264_util.py -f clean + do_monitor_${1} + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-d7264.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264.install b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264.install new file mode 100644 index 00000000000..ff737019ab0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264.install @@ -0,0 +1,4 @@ +d7264/utils/inventec_d7264_util.py /usr/local/bin +common/utils/platform/*.py /usr/share/sonic/device/x86_64-inventec_d7264-r0/plugins +systemd/platform-modules-d7264.service /lib/systemd/system +d7264/utils/sonic_platform-1.0-py2-none-any.whl /usr/share/sonic/device/x86_64-inventec_d7264-r0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.init b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.init new file mode 100644 index 00000000000..f76d3da7c72 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.init @@ -0,0 +1,70 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup Inventec d7264q28b board. +### END INIT INFO + +PLATFORM_DIR=/usr/share/sonic/device/x86_64-inventec_d7264q28b-r0/plugins + +PLATFORM_DAEMON=$PLATFORM_DIR/platfmgr.py +PLATFORM_DAEMON_NAME=platfmgr + +PLATFORM_PIDFILE=/var/run/$PLATFORM_DAEMON_NAME.pid + +do_monitor_start() { + /sbin/start-stop-daemon --quiet --oknodo --pidfile $PLATFORM_PIDFILE --make-pidfile --startas $PLATFORM_DAEMON --start --background -- $DAEMON_OPTS +} + +do_monitor_stop() { + /sbin/start-stop-daemon --quiet --oknodo --stop --pidfile $PLATFORM_PIDFILE --retry 10 +} + +# Check Fast-Reboot cause +FAST_REBOOT='no' +case "$(cat /proc/cmdline)" in + *fast-reboot*|*warm*) + FAST_REBOOT='yes' + ;; + *) + FAST_REBOOT='no' + ;; +esac + +case "$1" in +start) + echo -n "Setting up board... " + if [ "$FAST_REBOOT" = "yes" ] ; then + /usr/local/bin/inventec_d7264_util.py -f fast-reboot-install + else + /usr/local/bin/inventec_d7264_util.py -f install + fi + + do_monitor_${1} + echo "done." + ;; + +stop) + + /usr/local/bin/inventec_d7264_util.py -f clean + do_monitor_${1} + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-d7264q28b.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.install b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.install new file mode 100644 index 00000000000..db3fa5e7f4c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.install @@ -0,0 +1,4 @@ +d7264q28b/utils/inventec_d7264_util.py /usr/local/bin +common/utils/platform/*.py /usr/share/sonic/device/x86_64-inventec_d7264q28b-r0/plugins +systemd/platform-modules-d7264q28b.service /lib/systemd/system +d7264q28b/utils/sonic_platform-1.0-py2-none-any.whl /usr/share/sonic/device/x86_64-inventec_d7264q28b-r0 diff --git a/platform/broadcom/sonic-platform-modules-inventec/debian/rules b/platform/broadcom/sonic-platform-modules-inventec/debian/rules new file mode 100755 index 00000000000..40b68f93a0c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/debian/rules @@ -0,0 +1,55 @@ +#!/usr/bin/make -f +# -*- makefile -*- +# Sample debian/rules that uses debhelper. +# This file was originally written by Joey Hess and Craig Small. +# As a special exception, when this file is copied by dh-make into a +# dh-make output file, you may use that output file without restriction. +# This special exception was added by Craig Small in version 0.37 of dh-make. + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + +export INSTALL_MOD_DIR:=extra + +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= d7032q28b d7054q28b d6254qs d6556 d6356 d6356j d7264q28b d7264 + +%: + dh $@ --with python2,systemd + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + if [ $$mod = "d7054q28b" ] || [ $$mod = "d6356" ] || [ $$mod = "d6356j" ] || [ $$mod = "d7264q28b" ] || [ $$mod = "d7264" ]; then \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python2 setup.py build; \ + python2 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/utils; \ + cd $(MOD_SRC_DIR); \ + fi \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -pplatform-modules-$${mod} \ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/modules/*.ko \ + debian/platform-modules-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + if [ $$mod = "d7054q28b" ] || [ $$mod = "d6356" ] || [ $$mod = "d6356j" ] || [ $$mod = "d7264q28b" ] || [ $$mod = "d7264" ]; then \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python2 setup.py install --root=$(MOD_SRC_DIR)/debian/platform-modules-$${mod} --install-layout=deb; \ + cd $(MOD_SRC_DIR); \ + fi \ + done) + +override_dh_usrlocal: + +override_dh_pysupport: + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) + diff --git a/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6254qs.service b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6254qs.service new file mode 100644 index 00000000000..b7aa6dc0e1e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6254qs.service @@ -0,0 +1,13 @@ +[Unit] +Description=Inventec d6254qs Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-d6254qs start +ExecStop=-/etc/init.d/platform-modules-d6254qs stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6356.service b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6356.service new file mode 100644 index 00000000000..85fa47a7261 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6356.service @@ -0,0 +1,13 @@ +[Unit] +Description=Inventec d6356 Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-d6356 start +ExecStop=-/etc/init.d/platform-modules-d6356 stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6356j.service b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6356j.service new file mode 100644 index 00000000000..25dbb32b273 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6356j.service @@ -0,0 +1,13 @@ +[Unit] +Description=Inventec d6356j Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-d6356j start +ExecStop=-/etc/init.d/platform-modules-d6356j stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6556.service b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6556.service new file mode 100644 index 00000000000..6fbd6711ede --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d6556.service @@ -0,0 +1,13 @@ +[Unit] +Description=Inventec d7032q28b Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-d6556 start +ExecStop=-/etc/init.d/platform-modules-d6556 stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7032q28b.service b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7032q28b.service new file mode 100644 index 00000000000..b96374b343f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7032q28b.service @@ -0,0 +1,13 @@ +[Unit] +Description=Inventec d7032q28b Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-d7032q28b start +ExecStop=-/etc/init.d/platform-modules-d7032q28b stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7054q28b.service b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7054q28b.service new file mode 100644 index 00000000000..0c2d463598a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7054q28b.service @@ -0,0 +1,13 @@ +[Unit] +Description=Inventec d7054q28b Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-d7054q28b start +ExecStop=-/etc/init.d/platform-modules-d7054q28b stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7264.service b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7264.service new file mode 100644 index 00000000000..993c00bbb01 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7264.service @@ -0,0 +1,13 @@ +[Unit] +Description=Inventec d7264 Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-d7264 start +ExecStop=-/etc/init.d/platform-modules-d7264 stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7264q28b.service b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7264q28b.service new file mode 100644 index 00000000000..16c00f207f2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-inventec/systemd/platform-modules-d7264q28b.service @@ -0,0 +1,13 @@ +[Unit] +Description=Inventec d7264q28b Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-d7264q28b start +ExecStop=-/etc/init.d/platform-modules-d7264q28b stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-juniper/.gitignore b/platform/broadcom/sonic-platform-modules-juniper/.gitignore new file mode 100644 index 00000000000..7f287d53822 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/.gitignore @@ -0,0 +1,50 @@ +# Object files +*.o +*.ko +*.obj +*.elf + +# Precompiled Headers +*.gch +*.pch + +# Libraries +*.lib +*.a +*.la +*.lo + +# Shared objects (inc. Windows DLLs) +*.dll +*.so +*.so.* +*.dylib + +# Executables +*.exe +*.out +*.app +*.i*86 +*.x86_64 +*.hex + +# Debug files +*.dSYM/ +*.su + +# Kernel Module Compile Results +*.mod* +*.cmd +*.o.d +.tmp_versions/ +modules.order +Module.symvers +Mkfile.old +dkms.conf + +# Debian packaging +*.debhelper.log +*.postinst.debhelper +*.postrm.debhelper +*.prerm.debhelper +*.substvars diff --git a/platform/broadcom/sonic-platform-modules-juniper/LICENSE b/platform/broadcom/sonic-platform-modules-juniper/LICENSE new file mode 100644 index 00000000000..c819eacfeb9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/LICENSE @@ -0,0 +1,16 @@ +Copyright (C) 2016 Microsoft, Inc +Copyright (C) 2019 Juniper Networks + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/broadcom/sonic-platform-modules-juniper/README.md b/platform/broadcom/sonic-platform-modules-juniper/README.md new file mode 100644 index 00000000000..8d2820a74b2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/README.md @@ -0,0 +1 @@ +platform drivers for Juniper QFX5210 for the SONiC project diff --git a/platform/broadcom/sonic-platform-modules-juniper/common/modules/juniper_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-juniper/common/modules/juniper_i2c_cpld.c new file mode 100644 index 00000000000..25860a6ac1f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/common/modules/juniper_i2c_cpld.c @@ -0,0 +1,892 @@ +/* + * A hwmon driver for the juniper_i2c_cpld + * + * Tested and validated on Juniper QFX5210 + * Ciju Rajan K + * + * Copyright (C) 2013 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define MAX_PORT_NUM 64 +#define I2C_RW_RETRY_COUNT 10 +#define I2C_RW_RETRY_INTERVAL 60 /* ms */ + +#define I2C_ADDR_CPLD1 0x60 +#define I2C_ADDR_CPLD2 0x62 +#define I2C_ADDR_CPLD3 0x64 +#define CPLD_ADDRS {I2C_ADDR_CPLD1, I2C_ADDR_CPLD2, I2C_ADDR_CPLD3} + + +/* + * Number of additional attribute pointers to allocate + * with each call to krealloc + */ +#define ATTR_ALLOC_SIZE 1 /*For last attribute which is NUll.*/ + +#define NAME_SIZE 24 +#define MAX_RESP_LENGTH 48 + +typedef ssize_t (*show_func)( struct device *dev, + struct device_attribute *attr, + char *buf); +typedef ssize_t (*store_func)(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count); + +enum models { + AS7712_32X, + AS7716_32X, + qfx5210_64X, + AS7312_54X, + PLAIN_CPLD, /*No attribute but add i2c addr to the list.*/ + NUM_MODEL +}; + +enum sfp_func { + HAS_SFP = 1<<0 , + HAS_QSFP = 1<<1 , +}; + +enum common_attrs { + CMN_VERSION, + CMN_ACCESS, + CMN_PRESENT_ALL, + NUM_COMMON_ATTR +}; + +enum sfp_attrs { + SFP_PRESENT, + SFP_RESET, + SFP_LP_MODE, + NUM_SFP_ATTR +}; + +struct cpld_sensor { + struct cpld_sensor *next; + char name[NAME_SIZE+1]; /* sysfs sensor name */ + struct device_attribute attribute; + bool update; /* runtime sensor update needed */ + int data; /* Sensor data. Negative if there was a read error */ + + u8 reg; /* register */ + u8 mask; /* bit mask */ + bool invert; /* inverted value*/ + +}; + +#define to_cpld_sensor(_attr) \ + container_of(_attr, struct cpld_sensor, attribute) + +struct cpld_data { + struct device *dev; + struct device *hwmon_dev; + + int num_attributes; + struct attribute_group group; + + enum models model; + struct cpld_sensor *sensors; + struct mutex update_lock; + bool valid; + unsigned long last_updated; /* in jiffies */ + + int attr_index; + u16 sfp_num; + u8 sfp_types; + struct model_attrs *cmn_attr; +}; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + + +struct base_attrs { + const char *name; + umode_t mode; + show_func get; + store_func set; +}; + +struct attrs { + int reg; + bool invert; + struct base_attrs *base; +}; + +struct model_attrs { + struct attrs **cmn; + struct attrs **portly; +}; + + +static ssize_t show_bit(struct device *dev, + struct device_attribute *devattr, char *buf); +static ssize_t show_presnet_all(struct device *dev, + struct device_attribute *devattr, char *buf); +static ssize_t set_1bit(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t set_byte(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); + +int juniper_i2c_cpld_read(u8 cpld_addr, u8 reg); +int juniper_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + + +struct base_attrs common_attrs[NUM_COMMON_ATTR] = +{ + [CMN_VERSION] = {"version", S_IRUGO, show_bit, NULL}, + [CMN_ACCESS] = {"access", S_IWUSR, NULL, set_byte}, + [CMN_PRESENT_ALL] = {"module_present_all", S_IRUGO, show_presnet_all, NULL}, +}; + +struct attrs as7712_common[] = { + [CMN_VERSION] = {0x01, false, &common_attrs[CMN_VERSION]}, + [CMN_ACCESS] = {0x00, false, &common_attrs[CMN_ACCESS]}, + [CMN_PRESENT_ALL] = {0x30, false, &common_attrs[CMN_PRESENT_ALL]}, +}; +struct attrs qfx5210_common[] = { + [CMN_VERSION] = {0x01, false, &common_attrs[CMN_VERSION]}, + [CMN_ACCESS] = {0x00, false, &common_attrs[CMN_ACCESS]}, + [CMN_PRESENT_ALL] = {0x30, false, &common_attrs[CMN_PRESENT_ALL]}, +}; +struct attrs as7312_common[] = { + [CMN_VERSION] = {0x01, false, &common_attrs[CMN_VERSION]}, + [CMN_ACCESS] = {0x00, false, &common_attrs[CMN_ACCESS]}, + [CMN_PRESENT_ALL] = {-1, false, &common_attrs[CMN_PRESENT_ALL]}, +}; +struct attrs plain_common[] = { + [CMN_VERSION] = {0x01, false, &common_attrs[CMN_VERSION]}, +}; + +struct base_attrs portly_attrs[] = +{ + [SFP_PRESENT] = {"module_present", S_IRUGO, show_bit, NULL}, + // Only root user will have the privilege to write to sysfs + // [SFP_RESET] = {"module_reset", S_IRUGO|S_IWUGO, show_bit, set_1bit}, + [SFP_RESET] = {"module_reset", S_IRUGO|S_IWUSR, show_bit, set_1bit}, +}; + +struct attrs as7712_port[] = { + {0x30, true, &portly_attrs[SFP_PRESENT]}, + {0x04, true, &portly_attrs[SFP_RESET]}, +}; + +struct attrs qfx5210_port[] = { + {0x70, true, &portly_attrs[SFP_PRESENT]}, + {0x40, true, &portly_attrs[SFP_RESET]}, +}; + +struct attrs *as7712_cmn_list[] = { + &as7712_common[CMN_VERSION], + &as7712_common[CMN_ACCESS], + &as7712_common[CMN_PRESENT_ALL], + NULL +}; + +struct attrs *qfx5210_cmn_list[] = { + &qfx5210_common[CMN_VERSION], + &qfx5210_common[CMN_ACCESS], + &qfx5210_common[CMN_PRESENT_ALL], + NULL +}; + +struct attrs *as7312_cmn_list[] = { + &as7312_common[CMN_VERSION], + &as7312_common[CMN_ACCESS], + &as7312_common[CMN_PRESENT_ALL], + NULL +}; + +struct attrs *plain_cmn_list[] = { + &plain_common[CMN_VERSION], + NULL +}; + +struct attrs *as7712_port_list[] = { + &as7712_port[SFP_PRESENT], + &as7712_port[SFP_RESET], + NULL +}; +struct attrs *qfx5210_port_list[] = { + &qfx5210_port[SFP_PRESENT], + &qfx5210_port[SFP_RESET], + NULL +}; + +struct model_attrs models_attr[NUM_MODEL] = { + {.cmn = as7712_cmn_list, .portly=as7712_port_list}, + {.cmn = as7712_cmn_list, .portly=as7712_port_list}, /*7716's as 7712*/ + {.cmn = qfx5210_cmn_list, .portly=qfx5210_port_list}, + {.cmn = as7312_cmn_list, .portly=qfx5210_port_list}, + {.cmn = plain_cmn_list, .portly=NULL}, +}; + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; +/* Addresses scanned for juniper_i2c_cpld + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static int get_sfp_spec(int model, u16 *num, u8 *types) +{ + switch (model) { + case AS7712_32X: + case AS7716_32X: + *num = 32; + *types = HAS_QSFP; + break; + case qfx5210_64X: + *num = 64; + *types = HAS_QSFP; + break; + case AS7312_54X: + *num = 54; + *types = HAS_QSFP|HAS_SFP; + default: + *types = 0; + *num = 0; + break; + } + + return 0; +} + +static int get_present_reg(int model, u8 port, u8 *cpld_addr, u8 *reg, u8 *num) +{ + u8 cpld_address[] = CPLD_ADDRS; + + switch (model) { + case AS7312_54X: + if (port < 48) { + *cpld_addr = cpld_address[1 + port/24]; + *reg = 0x09 + (port%24)/8; + *num = 8; + } + else + { + *reg = 0x18; + *num = 4; + *cpld_addr = ( port < 52)? cpld_address[1]: cpld_address[2]; + } + break; + default: + return -EINVAL; + } +} + + +/*Assume the bits for ports are listed in-a-row.*/ +static int get_reg_bit(u8 reg_start, int port, + u8 *reg ,u8 *mask) +{ + *reg = reg_start + ((port)/8); + *mask = 1 << ((port)%8); + + return 0; +} + +static int cpld_write_internal( + struct i2c_client *client, u8 reg, u8 value) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, reg, value); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + +static int cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int status = 0, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, reg); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + return status; +} + + +/*Turn a numberic array into string with " " between each element. + * e.g., {0x11, 0x33, 0xff, 0xf1} => "11 33 ff f1" + */ +static ssize_t array_stringify(char *buf, u8 *input, size_t size) { + + int i; + char t[MAX_RESP_LENGTH+1]; + + buf[0] = '\0'; + for (i = 0; i < size; i++) { + snprintf(t, MAX_RESP_LENGTH, "%x ", input[i]); + strncat(buf, t, MAX_RESP_LENGTH); + } + + if (strlen(buf) > 0) + buf[strlen(buf)-1] = '\0'; /*Remove tailing blank*/ + + return snprintf(buf, MAX_RESP_LENGTH, "%s\n", buf); +} + +static ssize_t show_presnet_all_distinct(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 i, value, reg; + u8 cpld_addr, num; + u8 _value[8]; + u64 *values = (u64 *)_value; + + values = 0; + mutex_lock(&data->update_lock); + while(i < data->sfp_num) + { + get_present_reg(data->model, i, &cpld_addr, ®, &num); + if(cpld_addr == client->addr) + value = cpld_read_internal(client, reg); + else + value = juniper_i2c_cpld_read(cpld_addr, reg); + + if (unlikely(value < 0)) { + goto exit; + } + + *values |= (value&((1<<(num))-1)) << i; + i += num; + } + mutex_unlock(&data->update_lock); + + *values = cpu_to_le64(*values); + return array_stringify(buf, _value, i); +exit: + mutex_unlock(&data->update_lock); + return value; +} + +static ssize_t show_presnet_all(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + struct cpld_sensor *sensor = to_cpld_sensor(devattr); + u8 i, values[MAX_RESP_LENGTH/8]; + + if (sensor->reg < 0) { + return show_presnet_all_distinct(dev, devattr, buf); + } + + mutex_lock(&data->update_lock); + for (i = 0; i < ((data->sfp_num+7)/8); i++) { + values[i] = cpld_read_internal(client, sensor->reg + i); + if (unlikely(values[i] < 0)) { + goto exit; + } + } + mutex_unlock(&data->update_lock); + return array_stringify(buf, values, i); + +exit: + mutex_unlock(&data->update_lock); + return values[i]; +} + +static ssize_t show_bit(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int value; + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + struct cpld_sensor *sensor = to_cpld_sensor(devattr); + + mutex_lock(&data->update_lock); + value = cpld_read_internal(client, sensor->reg); + value = value & sensor->mask; + if (sensor->invert) + value = !value; + mutex_unlock(&data->update_lock); + + return snprintf(buf, PAGE_SIZE, "%x\n", value); +} + +static ssize_t set_1bit(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + long is_reset; + int value, status; + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + struct cpld_sensor *sensor = to_cpld_sensor(devattr); + u8 cpld_bit, reg; + + status = kstrtol(buf, 10, &is_reset); + if (status) { + return status; + } + reg = sensor->reg; + cpld_bit = sensor->mask; + mutex_lock(&data->update_lock); + value = cpld_read_internal(client, reg); + if (unlikely(status < 0)) { + goto exit; + } + + if (sensor->invert) + is_reset = !is_reset; + + if (is_reset) { + value |= cpld_bit; + } + else { + value &= ~cpld_bit; + } + + status = cpld_write_internal(client, reg, value); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static ssize_t set_byte(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + return access(dev, da, buf, count); +} + +static ssize_t access(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int status; + u32 addr, val; + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + + if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) { + return -EINVAL; + } + + if (addr > 0xFF || val > 0xFF) { + return -EINVAL; + } + + mutex_lock(&data->update_lock); + status = cpld_write_internal(client, addr, val); + if (unlikely(status < 0)) { + goto exit; + } + mutex_unlock(&data->update_lock); + return count; + +exit: + mutex_unlock(&data->update_lock); + return status; +} + +static void juniper_i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = + kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", + client->addr); + return; + } + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void juniper_i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int cpld_add_attribute(struct cpld_data *data, struct attribute *attr) +{ + int new_max_attrs = ++data->num_attributes + ATTR_ALLOC_SIZE; + void *new_attrs = krealloc(data->group.attrs, + new_max_attrs * sizeof(void *), + GFP_KERNEL); + if (!new_attrs) + return -ENOMEM; + data->group.attrs = new_attrs; + + + data->group.attrs[data->num_attributes-1] = attr; + data->group.attrs[data->num_attributes] = NULL; + + return 0; +} + +static void cpld_dev_attr_init(struct device_attribute *dev_attr, + const char *name, umode_t mode, + show_func show, store_func store) +{ + sysfs_attr_init(&dev_attr->attr); + dev_attr->attr.name = name; + dev_attr->attr.mode = mode; + dev_attr->show = show; + dev_attr->store = store; +} + +static struct cpld_sensor * add_sensor(struct cpld_data *data, + const char *name, + u8 reg, u8 mask, bool invert, + bool update, umode_t mode, + show_func get, store_func set) +{ + struct cpld_sensor *sensor; + struct device_attribute *a; + + sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return NULL; + a = &sensor->attribute; + + snprintf(sensor->name, sizeof(sensor->name), name); + sensor->reg = reg; + sensor->mask = mask; + sensor->update = update; + sensor->invert = invert; + cpld_dev_attr_init(a, sensor->name, + mode, + get, set); + + if (cpld_add_attribute(data, &a->attr)) + return NULL; + + sensor->next = data->sensors; + data->sensors = sensor; + + return sensor; +} + +static int add_attributes_cmn(struct cpld_data *data, struct attrs **cmn) +{ + u8 reg, i ; + bool invert; + struct attrs *a; + struct base_attrs *b; + + if (NULL == cmn) + return -1; + + for (i = 0; cmn[i]; i++) + { + a = cmn[i]; + + reg = a->reg; + invert = a->invert; + + b = a->base; + if (NULL == b) + break; + + if (add_sensor(data, b->name, + reg, 0xff, invert, + true, b->mode, + b->get, b->set) == NULL) + { + return -ENOMEM; + } + } + return 0; +} + +static int add_attributes_portly(struct cpld_data *data, struct attrs **pa) +{ + char name[NAME_SIZE+1]; + int i, j; + u8 reg, mask, invert; + struct attrs *a; + struct base_attrs *b; + + if (NULL == pa) + return -1; + + + for (i = 0; pa[i]; i++) { + a = pa[i]; + + invert = a->invert; + b = a->base; + if (b == NULL) + break; + + for (j = 0; j < data->sfp_num; j++) + { + snprintf(name, NAME_SIZE, "%s_%d", b->name, j+1); + get_reg_bit(a->reg, j, ®, &mask); + + if (add_sensor(data, name, reg, mask, invert, + true, b->mode, b->get, b->set) == NULL) + { + return -ENOMEM; + } + } + } + return 0; +} + +static int add_attributes(struct i2c_client *client, + struct cpld_data *data) +{ + struct model_attrs *m = data->cmn_attr; + + if (m == NULL) + return -EINVAL; + + /* Common attributes.*/ + add_attributes_cmn(data, m->cmn); + + /* Port-wise attributes.*/ + add_attributes_portly(data, m->portly); + + return 0; +} + +static int juniper_i2c_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + struct device *dev = &client->dev; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + return -EIO; + } + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) { + return -ENOMEM; + } + + data->model = dev_id->driver_data; + data->cmn_attr = &models_attr[data->model]; + get_sfp_spec(data->model, &data->sfp_num, &data->sfp_types); + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->dev = dev; + dev_info(dev, "chip found\n"); + + status = add_attributes(client, data); + if (status) + goto out_kfree; + + /* + * If there are no attributes, something is wrong. + * Bail out instead of trying to register nothing. + */ + if (!data->num_attributes) { + dev_err(dev, "No attributes found\n"); + status = -ENODEV; + goto out_kfree; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &data->group); + if (status) { + goto out_kfree; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + juniper_i2c_cpld_add_client(client); + dev_info(dev, "%s: cpld '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; +exit_remove: + sysfs_remove_group(&client->dev.kobj, &data->group); +out_kfree: + kfree(data->group.attrs); + return status; + +} + +static int juniper_i2c_cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->group); + kfree(data->group.attrs); + juniper_i2c_cpld_remove_client(client); + return 0; +} + +int juniper_i2c_cpld_read(u8 cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_read_byte_data(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(juniper_i2c_cpld_read); + +int juniper_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_write_byte_data(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(juniper_i2c_cpld_write); + + +static const struct i2c_device_id juniper_i2c_cpld_id[] = { + { "cpld_as7712", AS7712_32X}, + { "cpld_as7716", AS7716_32X}, + { "cpld_qfx5210", qfx5210_64X}, + { "cpld_as7312", AS7312_54X}, + { "cpld_plain", PLAIN_CPLD}, + { }, +}; +MODULE_DEVICE_TABLE(i2c, juniper_i2c_cpld_id); + +static struct i2c_driver juniper_i2c_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "juniper_i2c_cpld", + }, + .probe = juniper_i2c_cpld_probe, + .remove = juniper_i2c_cpld_remove, + .id_table = juniper_i2c_cpld_id, + .address_list = normal_i2c, +}; + + +static int __init juniper_i2c_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&juniper_i2c_cpld_driver); +} + +static void __exit juniper_i2c_cpld_exit(void) +{ + i2c_del_driver(&juniper_i2c_cpld_driver); +} + +module_init(juniper_i2c_cpld_init); +module_exit(juniper_i2c_cpld_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("juniper_i2c_cpld driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-juniper/common/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-juniper/common/modules/ym2651y.c new file mode 100644 index 00000000000..3ade5684107 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/common/modules/ym2651y.c @@ -0,0 +1,622 @@ +/* + * An hwmon driver for the 3Y Power YM-2651Y Power Module + * + * Tested and validated on Juniper QFX5210 + * Ciju Rajan K + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_FAN_DUTY_CYCLE 100 + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { 0x58, 0x5b, I2C_CLIENT_END }; + +enum chips { + YM2651, + YM2401, + YM2851, +}; + +/* Each client has this additional data + */ +struct ym2651y_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 capability; /* Register value */ + u16 status_word; /* Register value */ + u8 fan_fault; /* Register value */ + u8 over_temp; /* Register value */ + u16 v_out; /* Register value */ + u16 i_out; /* Register value */ + u16 p_out; /* Register value */ + u16 temp; /* Register value */ + u16 fan_speed; /* Register value */ + u16 fan_duty_cycle[2]; /* Register value */ + u8 fan_dir[4]; /* Register value */ + u8 pmbus_revision; /* Register value */ + u8 mfr_id[10]; /* Register value */ + u8 mfr_model[10]; /* Register value */ + u8 mfr_revsion[3]; /* Register value */ + u16 mfr_vin_min; /* Register value */ + u16 mfr_vin_max; /* Register value */ + u16 mfr_iin_max; /* Register value */ + u16 mfr_iout_max; /* Register value */ + u16 mfr_pin_max; /* Register value */ + u16 mfr_pout_max; /* Register value */ + u16 mfr_vout_min; /* Register value */ + u16 mfr_vout_max; /* Register value */ +}; + +static ssize_t show_byte(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_word(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_over_temp(struct device *dev, struct device_attribute *da, + char *buf); +static ssize_t show_ascii(struct device *dev, struct device_attribute *da, + char *buf); +static struct ym2651y_data *ym2651y_update_device(struct device *dev); +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); +static int ym2651y_write_word(struct i2c_client *client, u8 reg, u16 value); + +enum ym2651y_sysfs_attributes { + PSU_POWER_ON = 0, + PSU_TEMP_FAULT, + PSU_POWER_GOOD, + PSU_FAN1_FAULT, + PSU_FAN_DIRECTION, + PSU_OVER_TEMP, + PSU_V_OUT, + PSU_I_OUT, + PSU_P_OUT, + PSU_P_OUT_UV, /*In Unit of microVolt, instead of mini.*/ + PSU_TEMP1_INPUT, + PSU_FAN1_SPEED, + PSU_FAN1_DUTY_CYCLE, + PSU_PMBUS_REVISION, + PSU_MFR_ID, + PSU_MFR_MODEL, + PSU_MFR_REVISION, + PSU_MFR_VIN_MIN, + PSU_MFR_VIN_MAX, + PSU_MFR_VOUT_MIN, + PSU_MFR_VOUT_MAX, + PSU_MFR_IIN_MAX, + PSU_MFR_IOUT_MAX, + PSU_MFR_PIN_MAX, + PSU_MFR_POUT_MAX +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_power_on, S_IRUGO, show_word, NULL, PSU_POWER_ON); +static SENSOR_DEVICE_ATTR(psu_temp_fault, S_IRUGO, show_word, NULL, PSU_TEMP_FAULT); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_word, NULL, PSU_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IRUGO, show_fan_fault, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(psu_over_temp, S_IRUGO, show_over_temp, NULL, PSU_OVER_TEMP); +static SENSOR_DEVICE_ATTR(psu_v_out, S_IRUGO, show_linear, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(psu_i_out, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(psu_p_out, S_IRUGO, show_linear, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(psu_temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, show_linear, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(psu_fan_dir, S_IRUGO, show_ascii, NULL, PSU_FAN_DIRECTION); +static SENSOR_DEVICE_ATTR(psu_pmbus_revision, S_IRUGO, show_byte, NULL, PSU_PMBUS_REVISION); +static SENSOR_DEVICE_ATTR(psu_mfr_id, S_IRUGO, show_ascii, NULL, PSU_MFR_ID); +static SENSOR_DEVICE_ATTR(psu_mfr_model, S_IRUGO, show_ascii, NULL, PSU_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu_mfr_revision, S_IRUGO, show_ascii, NULL, PSU_MFR_REVISION); +static SENSOR_DEVICE_ATTR(psu_mfr_vin_min, S_IRUGO, show_linear, NULL, PSU_MFR_VIN_MIN); +static SENSOR_DEVICE_ATTR(psu_mfr_vin_max, S_IRUGO, show_linear, NULL, PSU_MFR_VIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_vout_min, S_IRUGO, show_linear, NULL, PSU_MFR_VOUT_MIN); +static SENSOR_DEVICE_ATTR(psu_mfr_vout_max, S_IRUGO, show_linear, NULL, PSU_MFR_VOUT_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_iin_max, S_IRUGO, show_linear, NULL, PSU_MFR_IIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_iout_max, S_IRUGO, show_linear, NULL, PSU_MFR_IOUT_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_pin_max, S_IRUGO, show_linear, NULL, PSU_MFR_PIN_MAX); +static SENSOR_DEVICE_ATTR(psu_mfr_pout_max, S_IRUGO, show_linear, NULL, PSU_MFR_POUT_MAX); + +/*Duplicate nodes for lm-sensors.*/ +static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_linear, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, show_linear, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO, show_linear, NULL, PSU_P_OUT_UV); +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_linear, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_linear, NULL, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(temp1_fault, S_IRUGO, show_word, NULL, PSU_TEMP_FAULT); + +static struct attribute *ym2651y_attributes[] = { + &sensor_dev_attr_psu_power_on.dev_attr.attr, + &sensor_dev_attr_psu_temp_fault.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, + &sensor_dev_attr_psu_over_temp.dev_attr.attr, + &sensor_dev_attr_psu_v_out.dev_attr.attr, + &sensor_dev_attr_psu_i_out.dev_attr.attr, + &sensor_dev_attr_psu_p_out.dev_attr.attr, + &sensor_dev_attr_psu_temp1_input.dev_attr.attr, + &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, + &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, + &sensor_dev_attr_psu_fan_dir.dev_attr.attr, + &sensor_dev_attr_psu_pmbus_revision.dev_attr.attr, + &sensor_dev_attr_psu_mfr_id.dev_attr.attr, + &sensor_dev_attr_psu_mfr_model.dev_attr.attr, + &sensor_dev_attr_psu_mfr_revision.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vin_min.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_pout_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_iin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_pin_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vout_min.dev_attr.attr, + &sensor_dev_attr_psu_mfr_vout_max.dev_attr.attr, + &sensor_dev_attr_psu_mfr_iout_max.dev_attr.attr, + /*Duplicate nodes for lm-sensors.*/ + &sensor_dev_attr_curr2_input.dev_attr.attr, + &sensor_dev_attr_in3_input.dev_attr.attr, + &sensor_dev_attr_power2_input.dev_attr.attr, + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_temp1_fault.dev_attr.attr, + NULL +}; + +static ssize_t show_byte(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + + return (attr->index == PSU_PMBUS_REVISION) ? sprintf(buf, "%d\n", data->pmbus_revision) : + sprintf(buf, "0\n"); +} + +static ssize_t show_word(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + u16 status = 0; + + switch (attr->index) { + case PSU_POWER_ON: /* psu_power_on, low byte bit 6 of status_word, 0=>ON, 1=>OFF */ + status = (data->status_word & 0x40) ? 0 : 1; + break; + case PSU_TEMP_FAULT: /* psu_temp_fault, low byte bit 2 of status_word, 0=>Normal, 1=>temp fault */ + status = (data->status_word & 0x4) >> 2; + break; + case PSU_POWER_GOOD: /* psu_power_good, high byte bit 3 of status_word, 0=>OK, 1=>FAIL */ + status = (data->status_word & 0x800) ? 0 : 1; + break; + } + + return sprintf(buf, "%d\n", status); +} + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct ym2651y_data *data = i2c_get_clientdata(client); + int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; + long speed; + int error; + + error = kstrtol(buf, 10, &speed); + if (error) + return error; + + if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) + return -EINVAL; + + mutex_lock(&data->update_lock); + data->fan_duty_cycle[nr] = speed; + ym2651y_write_word(client, 0x3B + nr, data->fan_duty_cycle[nr]); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_linear(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + + u16 value = 0; + int exponent, mantissa; + int multiplier = 1000; + + switch (attr->index) { + case PSU_V_OUT: + value = data->v_out; + break; + case PSU_I_OUT: + value = data->i_out; + break; + case PSU_P_OUT_UV: + multiplier = 1000000; /*For lm-sensors, unit is micro-Volt.*/ + /*Passing through*/ + case PSU_P_OUT: + value = data->p_out; + break; + case PSU_TEMP1_INPUT: + value = data->temp; + break; + case PSU_FAN1_SPEED: + value = data->fan_speed; + multiplier = 1; + break; + case PSU_FAN1_DUTY_CYCLE: + value = data->fan_duty_cycle[0]; + multiplier = 1; + break; + case PSU_MFR_VIN_MIN: + value = data->mfr_vin_min; + break; + case PSU_MFR_VIN_MAX: + value = data->mfr_vin_max; + break; + case PSU_MFR_VOUT_MIN: + value = data->mfr_vout_min; + break; + case PSU_MFR_VOUT_MAX: + value = data->mfr_vout_max; + break; + case PSU_MFR_PIN_MAX: + value = data->mfr_pin_max; + break; + case PSU_MFR_POUT_MAX: + value = data->mfr_pout_max; + break; + case PSU_MFR_IOUT_MAX: + value = data->mfr_iout_max; + break; + case PSU_MFR_IIN_MAX: + value = data->mfr_iin_max; + break; + } + + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + return (exponent >= 0) ? sprintf(buf, "%d\n", (mantissa << exponent) * multiplier) : + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + + u8 shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; + + return sprintf(buf, "%d\n", data->fan_fault >> shift); +} + +static ssize_t show_over_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct ym2651y_data *data = ym2651y_update_device(dev); + + return sprintf(buf, "%d\n", data->over_temp >> 7); +} + +static ssize_t show_ascii(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ym2651y_data *data = ym2651y_update_device(dev); + u8 *ptr = NULL; + + switch (attr->index) { + case PSU_FAN_DIRECTION: /* psu_fan_dir */ + ptr = data->fan_dir; + break; + case PSU_MFR_ID: /* psu_mfr_id */ + ptr = data->mfr_id; + break; + case PSU_MFR_MODEL: /* psu_mfr_model */ + ptr = data->mfr_model; + break; + case PSU_MFR_REVISION: /* psu_mfr_revision */ + ptr = data->mfr_revsion; + break; + default: + return 0; + } + + return sprintf(buf, "%s\n", ptr); +} + +static const struct attribute_group ym2651y_group = { + .attrs = ym2651y_attributes, +}; + +static int ym2651y_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct ym2651y_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct ym2651y_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &ym2651y_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &ym2651y_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int ym2651y_remove(struct i2c_client *client) +{ + struct ym2651y_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &ym2651y_group); + kfree(data); + + return 0; +} + +static const struct i2c_device_id ym2651y_id[] = { + { "ym2651", YM2651 }, + { "ym2401", YM2401 }, + { "ym2851", YM2851 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, ym2651y_id); + +static struct i2c_driver ym2651y_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "ym2651", + }, + .probe = ym2651y_probe, + .remove = ym2651y_remove, + .id_table = ym2651y_id, + .address_list = normal_i2c, +}; + +static int ym2651y_read_byte(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int ym2651y_read_word(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_word_data(client, reg); +} + +static int ym2651y_write_word(struct i2c_client *client, u8 reg, u16 value) +{ + return i2c_smbus_write_word_data(client, reg, value); +} + +static int ym2651y_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + result = 0; + +abort: + return result; +} + +struct reg_data_byte { + u8 reg; + u8 *value; +}; + +struct reg_data_word { + u8 reg; + u16 *value; +}; + +static struct ym2651y_data *ym2651y_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct ym2651y_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int i, status; + u8 command; + u8 fan_dir[5] = {0}; + struct reg_data_byte regs_byte[] = { {0x19, &data->capability}, + {0x7d, &data->over_temp}, + {0x81, &data->fan_fault}, + {0x98, &data->pmbus_revision} + }; + struct reg_data_word regs_word[] = { {0x79, &data->status_word}, + {0x8b, &data->v_out}, + {0x8c, &data->i_out}, + {0x96, &data->p_out}, + {0x8d, &data->temp}, + {0x3b, &(data->fan_duty_cycle[0])}, + {0x3c, &(data->fan_duty_cycle[1])}, + {0x90, &data->fan_speed}, + {0xa0, &data->mfr_vin_min}, + {0xa1, &data->mfr_vin_max}, + {0xa2, &data->mfr_iin_max}, + {0xa3, &data->mfr_pin_max}, + {0xa4, &data->mfr_vout_min}, + {0xa5, &data->mfr_vout_max}, + {0xa6, &data->mfr_iout_max}, + {0xa7, &data->mfr_pout_max} + }; + + dev_dbg(&client->dev, "Starting ym2651 update\n"); + + /* Read byte data */ + for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { + status = ym2651y_read_byte(client, regs_byte[i].reg); + + if (status < 0) + { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_byte[i].reg, status); + *(regs_byte[i].value) = 0; + } + else { + *(regs_byte[i].value) = status; + } + } + + /* Read word data */ + for (i = 0; i < ARRAY_SIZE(regs_word); i++) { + status = ym2651y_read_word(client, regs_word[i].reg); + + if (status < 0) + { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_word[i].reg, status); + *(regs_word[i].value) = 0; + } + else { + *(regs_word[i].value) = status; + } + } + + /* Read fan_direction */ + command = 0xC3; + status = ym2651y_read_block(client, command, fan_dir, ARRAY_SIZE(fan_dir)-1); + + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + } + + strncpy(data->fan_dir, fan_dir+1, ARRAY_SIZE(data->fan_dir)-1); + data->fan_dir[ARRAY_SIZE(data->fan_dir)-1] = '\0'; + + /* Read mfr_id */ + command = 0x99; + status = ym2651y_read_block(client, command, data->mfr_id, + ARRAY_SIZE(data->mfr_id)-1); + data->mfr_id[ARRAY_SIZE(data->mfr_id)-1] = '\0'; + + if (status < 0) + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + + /* Read mfr_model */ + command = 0x9a; + status = ym2651y_read_block(client, command, data->mfr_model, + ARRAY_SIZE(data->mfr_model)-1); + data->mfr_model[ARRAY_SIZE(data->mfr_model)-1] = '\0'; + + if (status < 0) + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + + /* Read mfr_revsion */ + command = 0x9b; + status = ym2651y_read_block(client, command, data->mfr_revsion, + ARRAY_SIZE(data->mfr_revsion)-1); + data->mfr_revsion[ARRAY_SIZE(data->mfr_revsion)-1] = '\0'; + + if (status < 0) + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +module_i2c_driver(ym2651y_driver); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("3Y Power YM-2651Y driver"); +MODULE_LICENSE("GPL"); + + diff --git a/platform/broadcom/sonic-platform-modules-juniper/debian/changelog b/platform/broadcom/sonic-platform-modules-juniper/debian/changelog new file mode 100755 index 00000000000..bc640fa563a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/debian/changelog @@ -0,0 +1,6 @@ +sonic-juniper-platform-modules (1.1) unstable; urgency=low + + * Initial release: Add support for QFX5210. + -- Juniper Networks + Ciju Rajan K Tue, 30 July 2019 + diff --git a/platform/broadcom/sonic-platform-modules-juniper/debian/compat b/platform/broadcom/sonic-platform-modules-juniper/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/broadcom/sonic-platform-modules-juniper/debian/control b/platform/broadcom/sonic-platform-modules-juniper/debian/control new file mode 100755 index 00000000000..c9310069f9f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/debian/control @@ -0,0 +1,11 @@ +Source: sonic-juniper-platform-modules +Section: main +Priority: extra +Maintainer: Juniper Networks +Build-Depends: debhelper (>= 9), bzip2 +Standards-Version: 3.9.3 + +Package: sonic-platform-juniper-qfx5210 +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + diff --git a/platform/broadcom/sonic-platform-modules-juniper/debian/files b/platform/broadcom/sonic-platform-modules-juniper/debian/files new file mode 100644 index 00000000000..24ef0ffef22 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/debian/files @@ -0,0 +1,2 @@ +sonic-juniper-platform-modules_1.1_amd64.buildinfo main extra +sonic-platform-juniper-qfx5210_1.1_amd64.deb main extra diff --git a/platform/broadcom/sonic-platform-modules-juniper/debian/rules b/platform/broadcom/sonic-platform-modules-juniper/debian/rules new file mode 100755 index 00000000000..2be5594acd3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/debian/rules @@ -0,0 +1,86 @@ +#!/usr/bin/make -f +# -*- makefile -*- +# Sample debian/rules that uses debhelper. +# This file was originally written by Joey Hess and Craig Small. +# As a special exception, when this file is copied by dh-make into a +# dh-make output file, you may use that output file without restriction. +# This special exception was added by Craig Small in version 0.37 of dh-make. + +include /usr/share/dpkg/pkg-info.mk + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + +export INSTALL_MOD_DIR:=extra + +PYTHON ?= python2 + +PACKAGE_PRE_NAME := sonic-platform-juniper +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= qfx5210 +MODULE_DIR := modules +UTILS_DIR := utils +SERVICE_DIR := service +PLATFORM_DIR := sonic_platform +CONF_DIR := conf + +%: + dh $@ --with systemd,python2,python3 --buildsystem=pybuild + +clean: + dh_testdir + dh_testroot + dh_clean + +build: + #make modules -C $(KERNEL_SRC)/build M=$(MODULE_SRC) + (for mod in $(MODULE_DIRS); do \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules || exit 1; \ + $(PYTHON) $${mod}/setup.py build; \ + done) + +binary: binary-arch binary-indep + # Nothing to do + +binary-arch: + # Nothing to do + +#install: build + #dh_testdir + #dh_testroot + #dh_clean -k + #dh_installdirs + +binary-indep: + dh_testdir + dh_installdirs + + # Custom package commands + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} /$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} /usr/local/bin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} /lib/systemd/system; \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin/; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system/; \ + $(PYTHON) $${mod}/setup.py install --root=$(MOD_SRC_DIR)/debian/$(PACKAGE_PRE_NAME)-$${mod} --install-layout=deb; \ + done) + # Resuming debhelper scripts + dh_testroot + dh_install + dh_installchangelogs + dh_installdocs + dh_systemd_enable + dh_installinit + dh_systemd_start + dh_link + dh_fixperms + dh_compress + dh_strip + dh_installdeb + dh_gencontrol + dh_md5sums + dh_builddeb +.PHONY: build binary binary-arch binary-indep clean diff --git a/platform/broadcom/sonic-platform-modules-juniper/debian/sonic-platform-juniper-qfx5210.install b/platform/broadcom/sonic-platform-modules-juniper/debian/sonic-platform-juniper-qfx5210.install new file mode 100644 index 00000000000..db8c036fdd0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/debian/sonic-platform-juniper-qfx5210.install @@ -0,0 +1,4 @@ +qfx5210/utils/juniper_qfx5210_util.py usr/local/bin +qfx5210/utils/juniper_qfx5210_monitor.py usr/local/bin +qfx5210/utils/platform_poweroff usr/local/bin +qfx5210/service/qfx5210-platform-init.service etc/systemd/system diff --git a/platform/broadcom/sonic-platform-modules-juniper/debian/sonic-platform-juniper-qfx5210.postinst b/platform/broadcom/sonic-platform-modules-juniper/debian/sonic-platform-juniper-qfx5210.postinst new file mode 100644 index 00000000000..dcff39f5379 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/debian/sonic-platform-juniper-qfx5210.postinst @@ -0,0 +1,22 @@ +systemctl enable qfx5210-platform-init.service +systemctl start qfx5210-platform-init.service + +# There are primary and secondary bios in qfx5210 platform. +# There is a problem with bios which prevents the OS booting from the +# secondary bios when the OS was installed using primary bios. +# Secondary bios fails to detect the UEFI partition. Right now +# the workaround is to have a folder structure /EFI/BOOT/BOOT64x.efi + +SONIC_VERSION=$(sonic-cfggen -y /etc/sonic/sonic_version.yml -v build_version) +FIRST_BOOT_FILE="/host/image-${SONIC_VERSION}/platform/firsttime" + +if [ -f $FIRST_BOOT_FILE ]; then + mkdir /tmp/sda1 + mount /dev/sda1 /tmp/sda1 + cd /tmp/sda1/EFI + mkdir BOOT > /dev/null 2>&1 + cp SONiC-OS/grubx64.efi BOOT/BOOTX64.EFI + cd /tmp + umount sda1 + efibootmgr -c -L "SONiC" -l "\EFI\BOOT\BOOTX64.EFI" > /dev/null 2>&1 +fi diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/Makefile b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/Makefile new file mode 100644 index 00000000000..2218af494da --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/Makefile @@ -0,0 +1,2 @@ +obj-m:=x86-64-juniper-qfx5210-64x-fan.o x86-64-juniper-qfx5210-64x-leds.o \ + x86-64-juniper-qfx5210-64x-psu.o juniper_i2c_cpld.o ym2651y.o diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/juniper_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/juniper_i2c_cpld.c new file mode 120000 index 00000000000..843ce05a431 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/juniper_i2c_cpld.c @@ -0,0 +1 @@ +../../common/modules/juniper_i2c_cpld.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/x86-64-juniper-qfx5210-64x-fan.c b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/x86-64-juniper-qfx5210-64x-fan.c new file mode 100644 index 00000000000..3e9b67a5da6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/x86-64-juniper-qfx5210-64x-fan.c @@ -0,0 +1,470 @@ +/* + * A hwmon driver for the juniper qfx5210-64x fan + * + * Modified and tested to work on Juniper QFX5210 + * Ciju Rajan K + * + * Copyright (C) 2014 juniper Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "qfx5210_64x_fan" + +static struct qfx5210_64x_fan_data *qfx5210_64x_fan_update_device(struct device *dev); +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); + +/* fan related data, the index should match sysfs_fan_attributes + */ +static const u8 fan_reg[] = { + 0x80, /* fan 1-4 present status */ + 0x81, /* fan 1-4 direction(0:F2B 1:B2F) */ + 0x87, /* fan PWM(for all fan) */ + 0x90, /* front fan 1 speed(rpm) */ + 0x91, /* front fan 2 speed(rpm) */ + 0x92, /* front fan 3 speed(rpm) */ + 0x93, /* front fan 4 speed(rpm) */ + 0x98, /* rear fan 1 speed(rpm) */ + 0x99, /* rear fan 2 speed(rpm) */ + 0x9A, /* rear fan 3 speed(rpm) */ + 0x9B, /* rear fan 4 speed(rpm) */ +}; + +/* Each client has this additional data */ +struct qfx5210_64x_fan_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ +}; + +enum fan_id { + FAN1_ID, + FAN2_ID, + FAN3_ID, + FAN4_ID +}; + +enum sysfs_fan_attributes { + FAN_PRESENT_REG, + FAN_DIRECTION_REG, + FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ + FAN1_FRONT_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN1_DIRECTION, + FAN2_DIRECTION, + FAN3_DIRECTION, + FAN4_DIRECTION, + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT +}; + +/* Define attributes + */ +#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT);\ + static SENSOR_DEVICE_ATTR(fan##index2##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT) +#define DECLARE_FAN_FAULT_ATTR(index, index2) &sensor_dev_attr_fan##index##_fault.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_fault.dev_attr.attr + +#define DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_direction, S_IRUGO, fan_show_value, NULL, FAN##index##_DIRECTION) +#define DECLARE_FAN_DIRECTION_ATTR(index) &sensor_dev_attr_fan##index##_direction.dev_attr.attr + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE);\ + static SENSOR_DEVICE_ATTR(pwm##index, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE) + +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan_duty_cycle_percentage.dev_attr.attr, \ + &sensor_dev_attr_pwm##index.dev_attr.attr + + +#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_present, S_IRUGO, fan_show_value, NULL, FAN##index##_PRESENT) +#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr + +#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index, index2) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index2##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM) +#define DECLARE_FAN_SPEED_RPM_ATTR(index, index2) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_input.dev_attr.attr, \ + &sensor_dev_attr_fan##index2##_input.dev_attr.attr + +/* 6 fan fault attributes in this platform */ +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4,14); +/* 6 fan speed(rpm) attributes in this platform */ +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1,11); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2,12); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3,13); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4,14); +/* 6 fan present attributes in this platform */ +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4); +/* 6 fan direction attribute in this platform */ +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(1); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(2); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(3); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(4); +/* 1 fan duty cycle attribute in this platform */ +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(1); + +static struct attribute *qfx5210_64x_fan_attributes[] = { + /* fan related attributes */ + DECLARE_FAN_FAULT_ATTR(1,11), + DECLARE_FAN_FAULT_ATTR(2,12), + DECLARE_FAN_FAULT_ATTR(3,13), + DECLARE_FAN_FAULT_ATTR(4,14), + DECLARE_FAN_SPEED_RPM_ATTR(1,11), + DECLARE_FAN_SPEED_RPM_ATTR(2,12), + DECLARE_FAN_SPEED_RPM_ATTR(3,13), + DECLARE_FAN_SPEED_RPM_ATTR(4,14), + DECLARE_FAN_PRESENT_ATTR(1), + DECLARE_FAN_PRESENT_ATTR(2), + DECLARE_FAN_PRESENT_ATTR(3), + DECLARE_FAN_PRESENT_ATTR(4), + DECLARE_FAN_DIRECTION_ATTR(1), + DECLARE_FAN_DIRECTION_ATTR(2), + DECLARE_FAN_DIRECTION_ATTR(3), + DECLARE_FAN_DIRECTION_ATTR(4), + DECLARE_FAN_DUTY_CYCLE_ATTR(1), + NULL +}; + +#define FAN_DUTY_CYCLE_REG_MASK 0xF +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 100 + +static int qfx5210_64x_fan_read_value(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int qfx5210_64x_fan_write_value(struct i2c_client *client, u8 reg, u8 value) +{ + return i2c_smbus_write_byte_data(client, reg, value); +} + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + reg_val &= FAN_DUTY_CYCLE_REG_MASK; + + if (!reg_val) { + return 0; + } + + if (reg_val == 0xF) { + return FAN_MAX_DUTY_CYCLE; + } + + return (reg_val * 6) + 10; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + if (duty_cycle < 16) { + return 0; + } + + if (duty_cycle >= 100) { + return 0xF; + } + + return (duty_cycle - 10) / 6; +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static u8 reg_val_to_direction(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + return !!(reg_val & mask); +} + +static u8 reg_val_to_is_present(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + return !(reg_val & mask); +} + +static u8 is_fan_fault(struct qfx5210_64x_fan_data *data, enum fan_id id) +{ + u8 ret = 1; + int front_fan_index = FAN1_FRONT_SPEED_RPM + id; + int rear_fan_index = FAN1_REAR_SPEED_RPM + id; + + /* Check if the speed of front or rear fan is ZERO, + */ + if (reg_val_to_speed_rpm(data->reg_val[front_fan_index]) && + reg_val_to_speed_rpm(data->reg_val[rear_fan_index])) { + ret = 0; + } + + return ret; +} + +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + struct i2c_client *client = to_i2c_client(dev); + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + if (value > FAN_MAX_DUTY_CYCLE) + value = FAN_MAX_DUTY_CYCLE; + if (value < 0) + return -EINVAL; + + qfx5210_64x_fan_write_value(client, 0x28, 0); /* Disable fan speed watch dog */ + qfx5210_64x_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); + return count; +} + +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct qfx5210_64x_fan_data *data = qfx5210_64x_fan_update_device(dev); + ssize_t ret = 0; + + if (data->valid) { + switch (attr->index) { + case FAN_DUTY_CYCLE_PERCENTAGE: + { + u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); + ret = sprintf(buf, "%u\n", duty_cycle); + break; + } + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + { + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index])); + break; + } + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + ret = sprintf(buf, "%d\n", + reg_val_to_is_present(data->reg_val[FAN_PRESENT_REG], + attr->index - FAN1_PRESENT)); + break; + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + ret = sprintf(buf, "%d\n", is_fan_fault(data, attr->index - FAN1_FAULT)); + break; + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + ret = sprintf(buf, "%d\n", + reg_val_to_direction(data->reg_val[FAN_DIRECTION_REG], + attr->index - FAN1_DIRECTION)); + break; + default: + break; + } + } + + return ret; +} + +static const struct attribute_group qfx5210_64x_fan_group = { + .attrs = qfx5210_64x_fan_attributes, +}; + +static struct qfx5210_64x_fan_data *qfx5210_64x_fan_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct qfx5210_64x_fan_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + dev_dbg(&client->dev, "Starting qfx5210_64x_fan update\n"); + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { + int status = qfx5210_64x_fan_read_value(client, fan_reg[i]); + + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + dev_dbg(&client->dev, "reg %d, err %d\n", fan_reg[i], status); + return data; + } + else { + data->reg_val[i] = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int qfx5210_64x_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct qfx5210_64x_fan_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct qfx5210_64x_fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &qfx5210_64x_fan_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &qfx5210_64x_fan_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int qfx5210_64x_fan_remove(struct i2c_client *client) +{ + struct qfx5210_64x_fan_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &qfx5210_64x_fan_group); + + return 0; +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static const struct i2c_device_id qfx5210_64x_fan_id[] = { + { "qfx5210_64x_fan", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, qfx5210_64x_fan_id); + +static struct i2c_driver qfx5210_64x_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = qfx5210_64x_fan_probe, + .remove = qfx5210_64x_fan_remove, + .id_table = qfx5210_64x_fan_id, + .address_list = normal_i2c, +}; + +static int __init qfx5210_64x_fan_init(void) +{ + return i2c_add_driver(&qfx5210_64x_fan_driver); +} + +static void __exit qfx5210_64x_fan_exit(void) +{ + i2c_del_driver(&qfx5210_64x_fan_driver); +} + +module_init(qfx5210_64x_fan_init); +module_exit(qfx5210_64x_fan_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("qfx5210_64x_fan driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/x86-64-juniper-qfx5210-64x-leds.c b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/x86-64-juniper-qfx5210-64x-leds.c new file mode 100644 index 00000000000..66d09773439 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/x86-64-juniper-qfx5210-64x-leds.c @@ -0,0 +1,450 @@ +/* + * LED driver for the qfx5210 + * + * Modified and tested to work on Juniper QFX5210 + * Ciju Rajan K + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +extern int juniper_i2c_cpld_read (u8 cpld_addr, u8 reg); +extern int juniper_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern void led_classdev_unregister(struct led_classdev *led_cdev); +extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); +extern void led_classdev_resume(struct led_classdev *led_cdev); +extern void led_classdev_suspend(struct led_classdev *led_cdev); + +#define DRVNAME "qfx5210_64x_led" + +struct qfx5210_64x_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[1]; /* only 1 register*/ +}; + +static struct qfx5210_64x_led_data *ledctl = NULL; + +/* + * LED related data + */ + +#define LED_CNTRLER_I2C_ADDRESS (0x60) /* CPLD1 i2c address */ + +#define LED_TYPE_ALARM_REG_MASK (0x03) +#define LED_MODE_ALARM_RED_VALUE (0x01) +#define LED_MODE_ALARM_AMBER_VALUE (0x02) +#define LED_MODE_ALARM_OFF_VALUE (0x00) + +#define LED_TYPE_SYSTEM_REG_MASK (0x0C) +#define LED_MODE_SYSTEM_GREEN_VALUE (0x04) +#define LED_MODE_SYSTEM_GREEN_BLINKING_VALUE (0x08) +#define LED_MODE_SYSTEM_OFF_VALUE (0x00) + +#define LED_TYPE_MASTER_REG_MASK (0x30) +#define LED_MODE_MASTER_GREEN_VALUE (0x10) +#define LED_MODE_MASTER_GREEN_BLINKING_VALUE (0x20) +#define LED_MODE_MASTER_OFF_VALUE (0x00) + +#define LED_TYPE_BEACON_REG_MASK (0xC0) +#define LED_MODE_BEACON_VALUE (0x40) +#define LED_MODE_BEACON_OFF_VALUE (0x00) + +enum led_type { + LED_TYPE_ALARM, + LED_TYPE_SYSTEM, + LED_TYPE_MASTER, + LED_TYPE_BEACON +}; + +struct led_reg { + u32 types; + u8 reg_addr; +}; + +static const struct led_reg led_reg_map[] = { + {(1 << LED_TYPE_ALARM) | (1 << LED_TYPE_SYSTEM) | (1 << LED_TYPE_MASTER) | (1 << LED_TYPE_BEACON), 0x30}, +}; + +enum led_light_mode { + LED_MODE_OFF = 0, + LED_MODE_RED = 1, + LED_MODE_AMBER = 2, + LED_MODE_GREEN = 1, + LED_MODE_GREEN_BLINKING = 2, + LED_MODE_BLUE_BLINKING = 1 +}; + +struct led_type_mode { + enum led_type type; + enum led_light_mode mode; + int reg_bit_mask; + int mode_value; +}; + +static struct led_type_mode led_type_mode_data[] = { + {LED_TYPE_ALARM, LED_MODE_RED, LED_TYPE_ALARM_REG_MASK, LED_MODE_ALARM_RED_VALUE}, + {LED_TYPE_ALARM, LED_MODE_AMBER, LED_TYPE_ALARM_REG_MASK, LED_MODE_ALARM_AMBER_VALUE}, + {LED_TYPE_ALARM, LED_MODE_OFF, LED_TYPE_ALARM_REG_MASK, LED_MODE_ALARM_OFF_VALUE}, + + {LED_TYPE_SYSTEM, LED_MODE_GREEN, LED_TYPE_SYSTEM_REG_MASK, LED_MODE_SYSTEM_GREEN_VALUE}, + {LED_TYPE_SYSTEM, LED_MODE_GREEN_BLINKING, LED_TYPE_SYSTEM_REG_MASK, LED_MODE_SYSTEM_GREEN_BLINKING_VALUE}, + {LED_TYPE_SYSTEM, LED_MODE_OFF, LED_TYPE_SYSTEM_REG_MASK, LED_MODE_SYSTEM_OFF_VALUE}, + + {LED_TYPE_MASTER, LED_MODE_GREEN, LED_TYPE_MASTER_REG_MASK, LED_MODE_MASTER_GREEN_VALUE}, + {LED_TYPE_MASTER, LED_MODE_GREEN_BLINKING, LED_TYPE_MASTER_REG_MASK, LED_MODE_MASTER_GREEN_BLINKING_VALUE}, + {LED_TYPE_MASTER, LED_MODE_OFF, LED_TYPE_MASTER_REG_MASK, LED_MODE_MASTER_OFF_VALUE}, + + {LED_TYPE_BEACON, LED_MODE_BLUE_BLINKING, LED_TYPE_BEACON_REG_MASK, LED_MODE_BEACON_VALUE}, + {LED_TYPE_BEACON, LED_MODE_OFF, LED_TYPE_BEACON_REG_MASK, LED_MODE_BEACON_OFF_VALUE} +}; + +static int get_led_reg(enum led_type type, u8 *reg) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(led_reg_map); i++) { + if(led_reg_map[i].types & (1 << type)) { + *reg = led_reg_map[i].reg_addr; + return 0; + } + } + + return 1; +} + +static int led_reg_val_to_light_mode(enum led_type type, u8 reg_val) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + + if (type != led_type_mode_data[i].type) + continue; + + if ((led_type_mode_data[i].reg_bit_mask & reg_val) == + led_type_mode_data[i].mode_value) + { + return led_type_mode_data[i].mode; + } + } + + return 0; +} + +static u8 led_light_mode_to_reg_val(enum led_type type, + enum led_light_mode mode, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + if (type != led_type_mode_data[i].type) + continue; + + if (mode != led_type_mode_data[i].mode) + continue; + + reg_val = led_type_mode_data[i].mode_value | + (reg_val & (~led_type_mode_data[i].reg_bit_mask)); + break; + } + + return reg_val; +} + +static int qfx5210_64x_led_read_value(u8 reg) +{ + return juniper_i2c_cpld_read(LED_CNTRLER_I2C_ADDRESS, reg); +} + +static int qfx5210_64x_led_write_value(u8 reg, u8 value) +{ + return juniper_i2c_cpld_write(LED_CNTRLER_I2C_ADDRESS, reg, value); +} + +static void qfx5210_64x_led_update(void) +{ + mutex_lock(&ledctl->update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting qfx5210_64x_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = qfx5210_64x_led_read_value(led_reg_map[i].reg_addr); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg_map[i].reg_addr, status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void qfx5210_64x_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + enum led_type type) +{ + int reg_val; + u8 reg ; + mutex_lock(&ledctl->update_lock); + + if( !get_led_reg(type, ®)) { + dev_dbg(&ledctl->pdev->dev, "Not match register for %d.\n", type); + } + + reg_val = qfx5210_64x_led_read_value(reg); + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + qfx5210_64x_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + + +static void qfx5210_64x_led_system_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + qfx5210_64x_led_set(led_cdev, led_light_mode, LED_TYPE_SYSTEM); +} + +static enum led_brightness qfx5210_64x_led_system_get(struct led_classdev *cdev) +{ + qfx5210_64x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_SYSTEM, ledctl->reg_val[0]); +} + +static void qfx5210_64x_led_master_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + qfx5210_64x_led_set(led_cdev, led_light_mode, LED_TYPE_MASTER); +} + +static enum led_brightness qfx5210_64x_led_master_get(struct led_classdev *cdev) +{ + qfx5210_64x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_MASTER, ledctl->reg_val[0]); +} + +static void qfx5210_64x_led_alarm_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + qfx5210_64x_led_set(led_cdev, led_light_mode, LED_TYPE_ALARM); +} + +static enum led_brightness qfx5210_64x_led_alarm_get(struct led_classdev *cdev) +{ + qfx5210_64x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_ALARM, ledctl->reg_val[0]); +} + +static void qfx5210_64x_led_beacon_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + qfx5210_64x_led_set(led_cdev, led_light_mode, LED_TYPE_BEACON); +} + +static enum led_brightness qfx5210_64x_led_beacon_get(struct led_classdev *cdev) +{ + qfx5210_64x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_BEACON, ledctl->reg_val[0]); +} + +static struct led_classdev qfx5210_64x_leds[] = { + [LED_TYPE_ALARM] = { + .name = "alarm", + .default_trigger = "unused", + .brightness_set = qfx5210_64x_led_alarm_set, + .brightness_get = qfx5210_64x_led_alarm_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AMBER, + }, + [LED_TYPE_SYSTEM] = { + .name = "system", + .default_trigger = "unused", + .brightness_set = qfx5210_64x_led_system_set, + .brightness_get = qfx5210_64x_led_system_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_GREEN_BLINKING, + }, + [LED_TYPE_MASTER] = { + .name = "master", + .default_trigger = "unused", + .brightness_set = qfx5210_64x_led_master_set, + .brightness_get = qfx5210_64x_led_master_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_GREEN_BLINKING, + }, + [LED_TYPE_BEACON] = { + .name = "beacon", + .default_trigger = "unused", + .brightness_set = qfx5210_64x_led_beacon_set, + .brightness_get = qfx5210_64x_led_beacon_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_BLUE_BLINKING, + }, +}; + +static int qfx5210_64x_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(qfx5210_64x_leds); i++) { + led_classdev_suspend(&qfx5210_64x_leds[i]); + } + + return 0; +} + +static int qfx5210_64x_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(qfx5210_64x_leds); i++) { + led_classdev_resume(&qfx5210_64x_leds[i]); + } + + return 0; +} + +static int qfx5210_64x_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(qfx5210_64x_leds); i++) { + ret = led_classdev_register(&pdev->dev, &qfx5210_64x_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(qfx5210_64x_leds)){ + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&qfx5210_64x_leds[i]); + } + } + + return ret; +} + +static int qfx5210_64x_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(qfx5210_64x_leds); i++) { + led_classdev_unregister(&qfx5210_64x_leds[i]); + } + + return 0; +} + +static struct platform_driver qfx5210_64x_led_driver = { + .probe = qfx5210_64x_led_probe, + .remove = qfx5210_64x_led_remove, + .suspend = qfx5210_64x_led_suspend, + .resume = qfx5210_64x_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init qfx5210_64x_led_init(void) +{ + int ret; + + ret = platform_driver_register(&qfx5210_64x_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct qfx5210_64x_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&qfx5210_64x_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&qfx5210_64x_led_driver); + kfree(ledctl); + goto exit; + } + +exit: + return ret; +} + +static void __exit qfx5210_64x_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&qfx5210_64x_led_driver); + kfree(ledctl); +} + +module_init(qfx5210_64x_led_init); +module_exit(qfx5210_64x_led_exit); + +MODULE_AUTHOR("Ciju Rajan K "); +MODULE_DESCRIPTION("qfx5210_64x_led driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/x86-64-juniper-qfx5210-64x-psu.c b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/x86-64-juniper-qfx5210-64x-psu.c new file mode 100644 index 00000000000..cb283d2d4a1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/x86-64-juniper-qfx5210-64x-psu.c @@ -0,0 +1,322 @@ +/* + * An hwmon driver for juniper qfx5210_64x Power Module + * + * Modified and tested on Juniper QFX5210 + * Ciju Rajan K + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PSU_STATUS_I2C_ADDR 0x60 +#define PSU_STATUS_I2C_REG_OFFSET 0x03 + +#define IS_POWER_GOOD(id, value) (!!(value & BIT(2+id))) +#define IS_PRESENT(id, value) (!(value & BIT(id))) + +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static struct qfx5210_64x_psu_data *qfx5210_64x_psu_update_device(struct device *dev); +extern int juniper_i2c_cpld_read (u8 cpld_addr, u8 reg); +/* + * This function is defined in juniper_i2c_cpld.c + */ +extern int juniper_i2c_cpld_write(unsigned short, u8, u8); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct qfx5210_64x_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ +}; + +enum qfx5210_64x_psu_sysfs_attributes { + PSU_PRESENT, + PSU_POWER_GOOD +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); + +static struct attribute *qfx5210_64x_psu_attributes[] = { + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + NULL +}; + +static int qfx5210_cpld_soft_reset(struct notifier_block *nb, + unsigned long action, + void *data) +{ + int ret = 0; + + switch (action) { + case SYS_POWER_OFF: + case SYS_HALT: + printk(KERN_CRIT "System halt/power_off\n"); + break; + case SYS_RESTART: + printk(KERN_CRIT "System restart: qfx5210_cpld_soft_reset\n"); + ret = juniper_i2c_cpld_write(0x65, 0x04, 0x01); + if (ret) { + printk(KERN_CRIT "qfx5210_cpld_soft_reset failed\n"); + } + msleep(100); + break; + default: + /* Do Nothing */ + break; + } + return NOTIFY_DONE; +} + +static struct notifier_block qfx5210_nb = { + .notifier_call = qfx5210_cpld_soft_reset, +}; + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct qfx5210_64x_psu_data *data = qfx5210_64x_psu_update_device(dev); + u8 status = 0; + + if (!data->valid) { + return -EIO; + } + + if (attr->index == PSU_PRESENT) { + status = IS_PRESENT(data->index, data->status); + } + else { /* PSU_POWER_GOOD */ + status = IS_POWER_GOOD(data->index, data->status); + } + + return sprintf(buf, "%d\n", status); +} + +static const struct attribute_group qfx5210_64x_psu_group = { + .attrs = qfx5210_64x_psu_attributes, +}; + +/* + * QFX5210 power off sequence + */ +static void qfx5210_cpld_power_off(void) +{ + printk(KERN_ALERT "pm_power_off: qfx5210_cpld_power_off\n"); + (void) juniper_i2c_cpld_write(0x65, 0x14, 0x00); + msleep(100); + (void) juniper_i2c_cpld_write(0x77, 0x00, 0x01); + msleep(100); + (void) juniper_i2c_cpld_write(0x76, 0x00, 0x04); +} + +/* + * Default platform pm_power_off handler + */ +static void (*default_pm_power_off)(void); + +static int qfx5210_64x_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct qfx5210_64x_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct qfx5210_64x_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &qfx5210_64x_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &qfx5210_64x_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int qfx5210_64x_psu_remove(struct i2c_client *client) +{ + struct qfx5210_64x_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &qfx5210_64x_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + qfx5210_64x_psu1, + qfx5210_64x_psu2 +}; + +static const struct i2c_device_id qfx5210_64x_psu_id[] = { + { "qfx5210_64x_psu1", qfx5210_64x_psu1 }, + { "qfx5210_64x_psu2", qfx5210_64x_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, qfx5210_64x_psu_id); + +static struct i2c_driver qfx5210_64x_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "qfx5210_64x_psu", + }, + .probe = qfx5210_64x_psu_probe, + .remove = qfx5210_64x_psu_remove, + .id_table = qfx5210_64x_psu_id, + .address_list = normal_i2c, +}; + +static struct qfx5210_64x_psu_data *qfx5210_64x_psu_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct qfx5210_64x_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status; + + data->valid = 0; + dev_dbg(&client->dev, "Starting qfx5210_64x update\n"); + + /* Read psu status */ + status = juniper_i2c_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg (0x%x) err %d\n", PSU_STATUS_I2C_ADDR, status); + goto exit; + } + else { + data->status = status; + } + + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init qfx5210_64x_psu_init(void) +{ + /* + * Store the default poweroff handler for later usage + */ + default_pm_power_off = pm_power_off; + /* + * Register the cpld poweroff handler + */ + pm_power_off = qfx5210_cpld_power_off; + /* + * Register the cpld soft reset handler + */ + if(register_reboot_notifier(&qfx5210_nb)) { + printk(KERN_ALERT "Restart handler registration failed\n"); + } + + return i2c_add_driver(&qfx5210_64x_psu_driver); +} + +static void __exit qfx5210_64x_psu_exit(void) +{ + /* + * Restore the poweroff handler + */ + pm_power_off = default_pm_power_off; + /* + * Unregister the cpld soft reset handler + */ + if (!unregister_restart_handler(&qfx5210_nb)) { + printk(KERN_CRIT "Failed to uregister restart handler\n"); + } + + i2c_del_driver(&qfx5210_64x_psu_driver); +} + +module_init(qfx5210_64x_psu_init); +module_exit(qfx5210_64x_psu_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("qfx5210_64x_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/ym2651y.c new file mode 120000 index 00000000000..f4d67640ccc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/modules/ym2651y.c @@ -0,0 +1 @@ +../../common/modules/ym2651y.c \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/service/qfx5210-platform-init.service b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/service/qfx5210-platform-init.service new file mode 100755 index 00000000000..46377aa9fdc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/service/qfx5210-platform-init.service @@ -0,0 +1,15 @@ +[Unit] +Description=Juniper QFX5210 initialization service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/local/bin/juniper_qfx5210_util.py install +ExecStart=/usr/local/bin/juniper_qfx5210_monitor.py +RemainAfterExit=yes +StandardOutput=syslog+console +StandardError=syslog+console + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/setup.py b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/setup.py new file mode 100755 index 00000000000..536f814a350 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='sonic_platform', + version='1.0', + description='Module to initialize Juniper QFX5210-64X platforms', + + packages=['sonic_platform'], + package_dir={'sonic_platform': 'qfx5210/sonic_platform'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/sonic_platform/__init__.py new file mode 100755 index 00000000000..9e1b2e56b1c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/sonic_platform/__init__.py @@ -0,0 +1 @@ +import platform diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/sonic_platform/chassis.py new file mode 100755 index 00000000000..674d9184df3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/sonic_platform/chassis.py @@ -0,0 +1,277 @@ +#!/usr/bin/env python +# +# Name: chassis.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# which provide the chassis specific details +# +# Copyright (c) 2019, Juniper Networks, Inc. +# All rights reserved. +# +# Notice and Disclaimer: This code is licensed to you under the GNU General +# Public License as published by the Free Software Foundation, version 3 or +# any later version. This code is not an official Juniper product. You can +# obtain a copy of the License at +# +# OSS License: +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# Third-Party Code: This code may depend on other components under separate +# copyright notice and license terms. Your use of the source code for those +# components is subject to the terms and conditions of the respective license +# as noted in the Third-Party source code file. +# + +try: + import os + import commands + import sys + import time + from sonic_platform_base.chassis_base import ChassisBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Chassis(ChassisBase): + """ + JUNIPER QFX5210 Platform-specific Chassis class + """ + + # Find the last reboot reason out of following + # CPLD_WATCHDOG_RESET 0x08 + # POWER_ON_RESET 0x20 + # CPU_WATCHDOG_RESET 0x40 + # SOFTWARE_RESET 0x80 + + def __init__(self): + ChassisBase.__init__(self) + + def get_qfx5210_parameter_value(self,parameter_name): + try: + with open("/var/run/eeprom", "r") as file: + for item in file: + content = item.split('=') + if content[0] == parameter_name: + return content[1:] + return "False" + except IOError: + print "Error: File not found" + return "False" + + def get_product_name(self): + product_name_list = self.get_qfx5210_parameter_value('Product Name') + if product_name_list: + product_name = ''.join(product_name_list) + return product_name + else: + return False + + + def get_part_number(self): + part_number_list = self.get_qfx5210_parameter_value('Part Number') + if part_number_list: + part_number = ''.join(part_number_list) + return part_number + else: + return False + + + def get_serial_number(self): + serial_number_list = self.get_qfx5210_parameter_value('Serial Number') + if serial_number_list: + serial_number = ''.join(serial_number_list) + return serial_number + else: + return False + + + def get_base_mac(self): + mac_list = self.get_qfx5210_parameter_value('MAC') + if mac_list: + mac = ''.join(mac_list) + return mac + else: + return False + + + def get_mfg_date(self): + mfgdate_list = self.get_qfx5210_parameter_value('Manufacture Date') + if mfgdate_list: + mfgdate = ''.join(mfgdate_list) + return mfgdate + else: + return False + + def get_deviceversion_name(self): + device_version_list = self.get_qfx5210_parameter_value('Device Version') + if device_version_list: + deviceversion_name = ''.join(device_version_list) + return deviceversion_name + else: + return False + + def get_platform_name(self): + platform_name_list = self.get_qfx5210_parameter_value('Platform Name') + if platform_name_list: + platform_name = ''.join(platform_name_list) + return platform_name + else: + return False + + def get_MACnumber_name(self): + MACnumber_name_list = self.get_qfx5210_parameter_value('Number of MAC Addresses') + if MACnumber_name_list: + MACnumber_name = ''.join(MACnumber_name_list) + return MACnumber_name + else: + return False + + def get_vendor_name(self): + vendor_name_list = self.get_qfx5210_parameter_value('Vendor Name') + if vendor_name_list: + vendor_name = ''.join(vendor_name_list) + return vendor_name + else: + return False + + def get_mfg_name(self): + mfg_name_list = self.get_qfx5210_parameter_value('Manufacture Name') + if mfg_name_list: + mfg_name = ''.join(mfg_name_list) + return mfg_name + else: + return False + + def get_vendorext_name(self): + vendorext_list = self.get_qfx5210_parameter_value('Vendor Extension') + if vendorext_list: + vendorext = ''.join(vendorext_list) + return vendorext + else: + return False + + def get_vendorextIANA_name(self): + vendorext_list = self.get_qfx5210_parameter_value('IANA') + if vendorext_list: + vendorext = ''.join(vendorext_list) + return vendorext + else: + return False + + def get_vendorextASMREV_name(self): + vendorext_list = self.get_qfx5210_parameter_value('Assembly Part Number Rev') + if vendorext_list: + vendorext = ''.join(vendorext_list) + return vendorext + else: + return False + + def get_vendorextASMPartNum_name(self): + vendorext_list = self.get_qfx5210_parameter_value('Assembly Part Number') + if vendorext_list: + vendorext = ''.join(vendorext_list) + return vendorext + else: + return False + + def get_vendorextASMID_name(self): + vendorext_list = self.get_qfx5210_parameter_value('Assembly ID') + if vendorext_list: + vendorext = ''.join(vendorext_list) + return vendorext + else: + return False + + def get_vendorextASMMajNum_name(self): + vendorext_list = self.get_qfx5210_parameter_value('Assembly Major Revision') + if vendorext_list: + vendorext = ''.join(vendorext_list) + return vendorext + else: + return False + + def get_vendorextASMMinNum_name(self): + vendorext_list = self.get_qfx5210_parameter_value('Assembly Minor Revision') + if vendorext_list: + vendorext = ''.join(vendorext_list) + return vendorext + else: + return False + + def get_vendorextCLEI_name(self): + vendorext_list = self.get_qfx5210_parameter_value('CLEI code') + if vendorext_list: + vendorext = ''.join(vendorext_list) + return vendorext + else: + return False + + def get_onieversion_name(self): + onieversion_name_list = self.get_qfx5210_parameter_value('ONIE Version') + if onieversion_name_list: + onieversion_name = ''.join(onieversion_name_list) + return onieversion_name + else: + return False + + def get_crc_name(self): + crc_list = self.get_qfx5210_parameter_value('CRC') + if crc_list: + crc_name = ''.join(crc_list) + return crc_name + else: + return False + + def get_fan_type(self, fantype_path): + try: + fan_type_file = open(fantype_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return "-1" + else: + fan_type = fan_type_file.read() + fan_type_file.close() + return str(fan_type) + + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + """ + status, last_reboot_reason = commands.getstatusoutput("i2cget -y 0 0x65 0x24") + if (status == 0): + if last_reboot_reason == "0x80": + return (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, None) + elif last_reboot_reason == "0x40" or last_reboot_reason == "0x08": + return (ChassisBase.REBOOT_CAUSE_WATCHDOG, None) + elif last_reboot_reason == "0x20": + return (ChassisBase.REBOOT_CAUSE_POWER_LOSS, None) + elif last_reboot_reason == "0x10": + return (ChassisBase.REBOOT_CAUSE_HARDWARE_OTHER, "Swizzle Reset") + else: + return (ChassisBase.REBOOT_CAUSE_HARDWARE_OTHER, "Unknown reason") + else: + time.sleep(3) + status, last_reboot_reason = commands.getstatusoutput("i2cget -y 0 0x65 0x24") + if last_reboot_reason == "0x80": + return (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, None) + elif last_reboot_reason == "0x40" or last_reboot_reason == "0x08": + return (ChassisBase.REBOOT_CAUSE_WATCHDOG, None) + elif last_reboot_reason == "0x20": + return (ChassisBase.REBOOT_CAUSE_POWER_LOSS, None) + elif last_reboot_reason == "0x10": + return (ChassisBase.REBOOT_CAUSE_HARDWARE_OTHER, "Swizzle Reset") + else: + return (ChassisBase.REBOOT_CAUSE_HARDWARE_OTHER, "Unknown reason") diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/sonic_platform/platform.py new file mode 100755 index 00000000000..5620fec54f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/sonic_platform/platform.py @@ -0,0 +1,67 @@ +#!/usr/bin/env python +# +# Name: platform.py, version: 1.0 +# +# Description: Module contains the definitions of SONiC platform APIs +# which provide the platform specific details +# +# Copyright (c) 2019, Juniper Networks, Inc. +# All rights reserved. +# +# Notice and Disclaimer: This code is licensed to you under the GNU General +# Public License as published by the Free Software Foundation, version 3 or +# any later version. This code is not an official Juniper product. You can +# obtain a copy of the License at +# +# OSS License: +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# Third-Party Code: This code may depend on other components under separate +# copyright notice and license terms. Your use of the source code for those +# components is subject to the terms and conditions of the respective license +# as noted in the Third-Party source code file. +# + + +import sys + +try: + from sonic_platform_base.platform_base import PlatformBase +except ImportError as e: + raise ImportError("%s - required module not found" % e) + +platformDict = {'platform':'QFX5210-64C'} + +class Platform(PlatformBase): + def __init__(self): + self.platform = self.getPlatform() + + def getPlatformDict(self): + global platformDict + if platformDict: + return platformDict + + def readPlatformName(self): + return self.getPlatformDict().get('platform') + + def getPlatform(self): + platformCls = self.readPlatformName() + return platformCls + + def get_chassis(self): + from chassis import Chassis + chassis = Chassis() + return chassis + diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/utils/README b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/utils/README new file mode 100755 index 00000000000..ec9ebe97f0e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/utils/README @@ -0,0 +1,117 @@ + +Copyright (c) 2019, Juniper Networks, Inc. +All rights reserved. + +Front panel LEDs +================ +There are 4 system LEDs in the front panel. Master, System, Alarm, & Beacon. +LED controls can be found under /sys/class/leds. The sysfs interface & +colour mappings are as follows: + +For master LED: /sys/class/leds/master/brightness + 0 => off + 1 => green + +For system LED: /sys/class/leds/system/brightness + 0 => off + 1 => green + +For alarm LED: /sys/class/leds/alarm/brightness + 0 => off + 1 => amber + 2 => red + +For beacon LED: /sys/class/leds/beacon/brightness + 0 => off + 1 => blue + +For any of the above LEDs, max_brightness file can tell the maximum value +accepted. + +System FANs +=========== +There are 4 fans and each of the fan has 2 fan modules. Overall there are +8 fans in the system. + +Fan controls can be found in /sys/bus/i2c/devices/17-0068. All the fans +are controlled by one duty cycle value, ranges from 0 to 100 + +Fan duty cycle can be controlled through /sys/bus/i2c/devices/17-0068/pwm1 + +Fan module presence is given by /sys/bus/i2c/devices/17-0068/fan[1-4]_present +file. A value of '1' indicate that fan is present & a value of '0' otherwise. + +Fan rotation direction is given by /sys/bus/i2c/devices/17-0068/fan[1-4]_direction. +A value of '0' indicate the direction is AFO (Front to back airflow) or Airflow +out. A value of '1' indicate that direction is AFI (Back to front airflow) or +Airflow in. + +Fan speed is given by fan[1-4]_input + +Temperature sensors +=================== +There are 6 temperature sensors. The readings are available in +/sys/bus/i2c/devices/{0}-00{1}/hwmon/hwmon*/temp1_input + +System PSUs +=========== +There are two independent PSUs. These are controlled by a dedicated CPLD. +The status registers are mapped under /sys/bus/i2c/devices/9-0050 and +/sys/bus/i2c/devices/10-0053. + +SFPs +==== +There are 64 QSFP+ modules supported in qfx5210 platform. EEPORMs will be +mapped under /sys/bus/i2c/devices/[25-88]-0050/ sysfs directory. + +FEC should be turned on for 100G SR optics and should be turned off for +100G LR optics. If the optic is changed, please update the entry and +reload the configuration. If the FEC mode is not set as per the optic +type the port may not link up or work properly. + +As an example, see this configuration for FEC for 100G SR4 optics in +/etc/sonic/config_db.json + +"Ethernet4": { + "admin_status": "up", + "alias": "Ethernet4", + "fec": "rs", + "index": "1", + "lanes": "65,66,67,68", + "mtu": "9100", + "speed": "100000" + } + +Sensor details +============== +LM75 supported sensor modules will be available under 'sensors' command. +If you want to get all the sensor data including the SFPs & LEDs, you can +invoke 'sudo juniper_qfx5210_util.py show' + +Platform poweroff +================= +Linux poweroff commands such as 'poweroff', 'shutdown', 'halt', etc. will not +power off qfx5210 platform as there are custom CPLDs control the power off +sequences. So acpi poweroff hooks are added for powering off the qfx5210. The +following messages are displayed in the console towards end of poweroff +sequence: + + [ 52.500807] System halt/power_off + [ 52.866331] reboot: Power down + [ 52.903257] pm_power_off: qfx5210_cpld_power_off + +Once the above messages are seen, you can safely remove the power to the system. + +Similarly platform reboot sequences are in place for system reboot. The following +messages are displayed in the console when the system is rebooted: + + [ 6053.163363] System restart: qfx5210_cpld_soft_reset + +Platform monitoring daemon +========================== +“juniper_qfx5210_monitor.py” is the platform monitoring script. +It implements the qfx5210 EM policy. This script will run as system service +and monitor the temperature sensors in every 20 seconds. Based on the EM +policy thresholds, it controls the fan rpm, manage alarm leds, and +shutdown the box. + diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/utils/juniper_qfx5210_monitor.py b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/utils/juniper_qfx5210_monitor.py new file mode 100755 index 00000000000..d225400121b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/utils/juniper_qfx5210_monitor.py @@ -0,0 +1,500 @@ +#!/usr/bin/env python +# +# Name: juniper_qfx5210_monitor.py version: 1.0 +# +# Description: This file contains the EM implementation for qfx5210 platform +# +# Copyright (c) 2019, Juniper Networks, Inc. +# All rights reserved. +# +# Notice and Disclaimer: This code is licensed to you under the GNU General +# Public License as published by the Free Software Foundation, version 3 or +# any later version. This code is not an official Juniper product. You can +# obtain a copy of the License at +# +# OSS License: +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# Third-Party Code: This code may depend on other components under separate +# copyright notice and license terms. Your use of the source code for those +# components is subject to the terms and conditions of the respective license +# as noted in the Third-Party source code file. + +try: + import os + import commands + import sys, getopt + import subprocess + import click + import imp + import logging + import logging.config + import logging.handlers + import types + import time + import traceback + import glob + import collections + from tabulate import tabulate +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Deafults +VERSION = '1.0' +FUNCTION_NAME = '/var/log/juniper_qfx5210_monitor' + + +global log_file +global log_level + + +global isPlatformAFI +global isFireThresholdReached +FireThresholdSecsRemaining = 120 + +temp_policy_AFI = { + 0: [[70, 0, 48000], [70, 48000, 53000], [80, 53000, 0], [80, 53000, 58000], [100, 58000, 0], ['Yellow Alarm', 64000, 70000], ['Red Alarm', 70000, 75000], ['Fire Shut Alarm', 75000, 0]], + 1: [[70, 0, 41000], [70, 41000, 47000], [80, 47000, 0], [80, 47000, 52000], [100, 52000, 0], ['Yellow Alarm', 58000, 64000], ['Red Alarm', 64000, 69000], ['Fire Shut Alarm', 69000, 0]], + 2: [[70, 0, 33000], [70, 33000, 39000], [80, 39000, 0], [80, 39000, 45000], [100, 45000, 0], ['Yellow Alarm', 53000, 59000], ['Red Alarm', 59000, 64000], ['Fire Shut Alarm', 64000, 0]], + 3: [[70, 0, 31000], [70, 31000, 36000], [80, 36000, 0], [80, 36000, 42000], [100, 42000, 0], ['Yellow Alarm', 48000, 55000], ['Red Alarm', 55000, 60000], ['Fire Shut Alarm', 60000, 0]], + 4: [[70, 0, 31000], [70, 31000, 36000], [80, 36000, 0], [80, 36000, 42000], [100, 42000, 0], ['Yellow Alarm', 48000, 55000], ['Red Alarm', 55000, 60000], ['Fire Shut Alarm', 60000, 0]], + 5: [[70, 0, 31000], [70, 31000, 36000], [80, 36000, 0], [80, 36000, 43000], [100, 43000, 0], ['Yellow Alarm', 49000, 56000], ['Red Alarm', 56000, 61000], ['Fire Shut Alarm', 61000, 0]], + 6: [[70, 0, 70000], [70, 70000, 78000], [80, 78000, 0], [80, 78000, 86000], [100, 86000, 0], ['Yellow Alarm', 91000, 96000], ['Red Alarm', 96000, 102000], ['Fire Shut Alarm', 102000, 0]], + } + +temp_policy_AFO = { + 0: [[60, 0, 49000], [60, 49000, 55000], [80, 55000, 0], [80, 55000, 62000], [100, 62000, 0], ['Yellow Alarm', 68000, 74000], ['Red Alarm', 74000, 78000], ['Fire Shut Alarm', 78000, 0]], + 1: [[60, 0, 55000], [60, 55000, 60000], [80, 60000, 0], [80, 60000, 65000], [100, 65000, 0], ['Yellow Alarm', 70000, 76000], ['Red Alarm', 76000, 80000], ['Fire Shut Alarm', 80000, 0]], + 2: [[60, 0, 34000], [60, 34000, 40000], [80, 40000, 0], [80, 40000, 47000], [100, 47000, 0], ['Yellow Alarm', 54000, 60000], ['Red Alarm', 60000, 64000], ['Fire Shut Alarm', 64000, 0]], + 3: [[60, 0, 36000], [60, 36000, 41000], [80, 41000, 0], [80, 41000, 47000], [100, 47000, 0], ['Yellow Alarm', 54000, 60000], ['Red Alarm', 60000, 64000], ['Fire Shut Alarm', 64000, 0]], + 4: [[60, 0, 39000], [60, 39000, 45000], [80, 45000, 0], [80, 45000, 52000], [100, 52000, 0], ['Yellow Alarm', 59000, 65000], ['Red Alarm', 65000, 69000], ['Fire Shut Alarm', 69000, 0]], + 5: [[60, 0, 37000], [60, 37000, 43000], [80, 43000, 0], [80, 43000, 50000], [100, 50000, 0], ['Yellow Alarm', 57000, 63000], ['Red Alarm', 63000, 67000], ['Fire Shut Alarm', 67000, 0]], + 6: [[60, 0, 70000], [60, 70000, 78000], [80, 78000, 0], [80, 78000, 86000], [100, 86000, 0], ['Yellow Alarm', 91000, 96000], ['Red Alarm', 96000, 102000], ['Fire Shut Alarm', 102000, 0]], + } + +class QFX5210_FanUtil(object): + """QFX5210 Platform FanUtil class""" + + FANBASE_VAL_PATH = '/sys/bus/i2c/devices/17-0068/{0}' + FAN_DUTY_PATH = '/sys/bus/i2c/devices/17-0068/fan_duty_cycle_percentage' + + def __init__(self): + fan_path = self.FANBASE_VAL_PATH + + def get_fan_duty_cycle(self): + try: + val_file = open(self.FAN_DUTY_PATH) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + + return int(content) + + def set_fan_duty_cycle(self, val): + + try: + fan_file = open(self.FAN_DUTY_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + fan_file.write(str(val)) + fan_file.close() + return True + +class QFX5210_ThermalUtil(object): + """QFX5210 Platform ThermalUtil class""" + + SENSOR_NUM_ON_MAIN_BOARD = 6 + SENSOR_CORETEMP_NUM_ON_MAIN_BOARD = 7 + CORETEMP_NUM_ON_MAIN_BOARD = 5 + THERMAL_NUM_RANGE = 8 + SENSOR_NUM_1_IDX = 1 + SENSORS_PATH = '/sys/bus/i2c/devices/{0}-00{1}/hwmon/hwmon*/temp1_input' + CORETEMP_PATH = '/sys/bus/platform/devices/coretemp.0/hwmon/hwmon1/temp{0}_input' + ALARM_LED_PATH = '/sys/class/leds/alarm/brightness' + + """ Dictionary where + key1 = thermal id index (integer) starting from 1 + value = path to fan device file (string) """ + _sensor_to_device_path_mapping = {} + + _sensor_to_device_node_mapping = [ + ['18', '48'], + ['18', '49'], + ['18', '4a'], + ['18', '4b'], + ['17', '4d'], + ['17', '4e'], + ] + + _coretemp_to_device_path_mapping = {} + + _coretemp_to_device_node_mapping = [1, 2, 3, 4, 5] + + def __init__(self): + sensor_path = self.SENSORS_PATH + coretemp_path = self.CORETEMP_PATH + for x in range(self.SENSOR_NUM_ON_MAIN_BOARD): + self._sensor_to_device_path_mapping[x+1] = sensor_path.format( + self._sensor_to_device_node_mapping[x][0], + self._sensor_to_device_node_mapping[x][1]) + + for x in range(self.CORETEMP_NUM_ON_MAIN_BOARD): + self._coretemp_to_device_path_mapping[x] = coretemp_path.format( + self._coretemp_to_device_node_mapping[x]) + + + """ Function reads the 5 temp inputs in CORETEMP_PATH + and returns the average of these 5 temp readings """ + def get_coretempValue(self): + sum = 0 + for x in range(self.CORETEMP_NUM_ON_MAIN_BOARD): + sum += self._get_coretemp_node_val(x) + avg = sum/self.CORETEMP_NUM_ON_MAIN_BOARD + return int(avg) + + + """ Function takes the Sensor number as input, constructs the device path, + opens sensor file, reads the temp content from the file and returns the value """ + def _get_sensor_node_val(self, thermal_num): + if thermal_num < self.SENSOR_NUM_1_IDX or thermal_num > self.SENSOR_NUM_ON_MAIN_BOARD: + logging.debug('GET. Parameter error. thermal_num, %d', thermal_num) + return None + + device_path = self.get_thermal_to_device_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + + """ Function takes the coretemp number as input, constructs the device path, + opens sensor file, reads the temp content from the file and returns the value """ + def _get_coretemp_node_val(self, thermal_num): + + device_path = self.get_coretemp_to_device_path(thermal_num) + for filename in glob.glob(device_path): + try: + val_file = open(filename, 'r') + except IOError as e: + logging.error('GET. unable to open file: %s', str(e)) + return None + + content = val_file.readline().rstrip() + + if content == '': + logging.debug('GET. content is NULL. device_path:%s', device_path) + return None + + try: + val_file.close() + except: + logging.debug('GET. unable to close file. device_path:%s', device_path) + return None + + return int(content) + + + def get_thermal_to_device_path(self, thermal_num): + return self._sensor_to_device_path_mapping[thermal_num] + + + def get_coretemp_to_device_path(self, thermal_num): + return self._coretemp_to_device_path_mapping[thermal_num] + + + """ Function opens the alarm LED file, reads the content from the file + and returns the value.This value indicates the Brigthness level. + The value of 1 = YELLOW ALARM + The value of 2 = RED ALARM + The value of 0 = NO ALARM """ + def get_alarm_led_brightness(self): + try: + val_file = open(self.ALARM_LED_PATH) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = val_file.readline().rstrip() + val_file.close() + return int(content) + + + """ Function takes the value to set in the alarm LED file as input. + Reads the content from the file and sets the value.This value indicates the Brigthness level. + The value of 1 = YELLOW ALARM + The value of 2 = RED ALARM + The value of 0 = NO ALARM """ + def set_alarm_led_brightness(self, val): + try: + val_file = open(self.ALARM_LED_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + val_file.write(str(val)) + val_file.close() + return True + + + + """ Function is called periodically every 20 secs. It reads the 6 Temp sensors and 1 core Temp sensor and sets + Sensor flags accordingly. Also reads the Fan duty cycle and depending on the FAN duty cycle reading and temp sensor reading, + set the different parameters """ + def getSensorTemp(self): + sum = 0 + global isPlatformAFI + global isFireThresholdReached + global FireThresholdSecsRemaining + #AFI + if (isPlatformAFI == True): + temp_policy = temp_policy_AFI + else: + #AFO + temp_policy = temp_policy_AFO + + """ Dictionary where + key = thermal id index starting from 0. 0 is the sensor 1 ... + value = Different temp ranges """ + SensorFlag = { + 0: [0,0,0,0,0,0,0,0], + 1: [0,0,0,0,0,0,0,0], + 2: [0,0,0,0,0,0,0,0], + 3: [0,0,0,0,0,0,0,0], + 4: [0,0,0,0,0,0,0,0], + 5: [0,0,0,0,0,0,0,0], + 6: [0,0,0,0,0,0,0,0], + } + # if the Firethreshold Flag is set and 120 seconds have elapsed, invoking the "poweroff" to shutdown the box + if (isFireThresholdReached == True): + firethr = FireThresholdSecsRemaining - 20 + logging.critical('CRITICAL: Fire Threshold reached: System is going to shutdown in %s seconds', firethr) + print "Fire Threshold reached: System is going to shutdown in %s seconds\n" % firethr + FireThresholdSecsRemaining = FireThresholdSecsRemaining - 20 + if (FireThresholdSecsRemaining == 20): + isFireThresholdReached == False + time.sleep(20) + cmd = "poweroff" + returned_value = os.system(cmd) + + for x in range(self.SENSOR_CORETEMP_NUM_ON_MAIN_BOARD): + if x < self.SENSOR_NUM_ON_MAIN_BOARD: + value = self._get_sensor_node_val(x+1) + else: + value = self.get_coretempValue() + + # 60% Duty Cycle for AFO and 70% Duty Cycle for AFI + if value > temp_policy[x][0][1] and value <= temp_policy[x][0][2]: + SensorFlag[x][0] = True + + # 60% Prev Duty Cycle for AFO and 70% Prev Duty Cycle for AFI + elif value > temp_policy[x][1][1] and value < temp_policy[x][1][2]: + SensorFlag[x][1] = True + + # 80% Duty Cycle + elif value == temp_policy[x][2][1]: + SensorFlag[x][2] = True + + #80% Prev Duty Cycle + elif value > temp_policy[x][3][1] and value < temp_policy[x][3][2]: + SensorFlag[x][3] = True + + #100% Duty Cycle + elif value >= temp_policy[x][4][1]: + SensorFlag[x][4] = True + + else: + pass + + # Yellow Alarm + if value >= temp_policy[x][5][1] and value < temp_policy[x][5][2]: + SensorFlag[x][5] = True + + # Red Alarm + elif value >= temp_policy[x][6][1] and value < temp_policy[x][6][2]: + SensorFlag[x][6] = True + + # Fire Shut down + elif value >= temp_policy[x][7][1]: + SensorFlag[x][7] = True + + fan = QFX5210_FanUtil() + # CHECK IF ANY TEMPERATURE SENSORS HAS SET FIRE SHUTDOWN FLAG + if SensorFlag[0][7] or SensorFlag[1][7] or SensorFlag[2][7] or SensorFlag[3][7] or SensorFlag[4][7] or SensorFlag[5][7] or SensorFlag[6][7]: + isFireThresholdReached = True + logging.critical('CRITICAL: Fire Threshold reached: System is going to shutdown in 120 seconds') + print "CRITICAL: Fire Threshold reached: System is going to shutdown in 120 seconds\n" + value = self.get_alarm_led_brightness() + if ( value > 0): + self.set_alarm_led_brightness(0) + + # CHECK IF ANY TEMPERATURE SENSORS HAS SET 'RED' ALARM FLAG, IF YES, SET THE ALARM LED TO 'RED' + elif SensorFlag[0][6] or SensorFlag[1][6] or SensorFlag[2][6] or SensorFlag[3][6] or SensorFlag[4][6] or SensorFlag[5][6] or SensorFlag[6][6]: + self.set_alarm_led_brightness(2) + + # CHECK IF ANY TEMPERATURE SENSORS HAS SET 'YELLOW' ALARM FLAG, IF YES, SET THE ALARM LED TO 'YELLOW' + elif SensorFlag[0][5] or SensorFlag[1][5] or SensorFlag[2][5] or SensorFlag[3][5] or SensorFlag[4][5] or SensorFlag[5][5] or SensorFlag[6][5]: + self.set_alarm_led_brightness(1) + + # CHECK IF ANY TEMPERATURE SENSORS HAS SET 100% DUTY CYCLE FLAG, IF YES, SET THE FAN DUTY CYCLE TO 100% + elif SensorFlag[0][4] or SensorFlag[1][4] or SensorFlag[2][4] or SensorFlag[3][4] or SensorFlag[4][4] or SensorFlag[5][4] or SensorFlag[6][4]: + fan.set_fan_duty_cycle(100) + value = self.get_alarm_led_brightness() + if ( value > 0): + self.set_alarm_led_brightness(0) + + # CHECK IF ANY TEMPERATURE SENSORS HAS SET 80% DUTY CYCLE PREV FLAG, IF YES, SET THE FAN DUTY CYCLE TO 80% + elif SensorFlag[0][3] or SensorFlag[1][3] or SensorFlag[2][3] or SensorFlag[3][3] or SensorFlag[4][3] or SensorFlag[5][3] or SensorFlag[6][3]: + fan.set_fan_duty_cycle(80) + value = self.get_alarm_led_brightness() + if ( value > 0): + self.set_alarm_led_brightness(0) + + # CHECK IF ANY TEMPERATURE SENSORS HAS SET 80% DUTY CYCLE FLAG, IF YES, SET THE FAN DUTY CYCLE TO 80% + elif SensorFlag[0][2] or SensorFlag[1][2] or SensorFlag[2][2] or SensorFlag[3][2] or SensorFlag[4][2] or SensorFlag[5][2] or SensorFlag[6][2]: + fan.set_fan_duty_cycle(80) + value = self.get_alarm_led_brightness() + if ( value > 0): + self.set_alarm_led_brightness(0) + + # FOR "AFO" Platform CHECK IF ANY TEMPERATURE SENSORS HAS SET 60% DUTY CYCLE PREV FLAG, IF YES, SET THE FAN DUTY CYCLE TO 60% + # FOR "AFI" Platform CHECK IF ANY TEMPERATURE SENSORS HAS SET 70% DUTY CYCLE PREV FLAG, IF YES, SET THE FAN DUTY CYCLE TO 70% + elif SensorFlag[0][1] or SensorFlag[1][1] or SensorFlag[2][1] or SensorFlag[3][1] or SensorFlag[4][1] or SensorFlag[5][1] or SensorFlag[6][1]: + if (isPlatformAFI == True): + fan.set_fan_duty_cycle(70) + else: + fan.set_fan_duty_cycle(60) + value = self.get_alarm_led_brightness() + if ( value > 0): + self.set_alarm_led_brightness(0) + + # FOR "AFO" Platform CHECK IF ANY TEMPERATURE SENSORS HAS SET 60% DUTY CYCLE FLAG, IF YES, SET THE FAN DUTY CYCLE TO 60% + # FOR "AFI" Platform CHECK IF ANY TEMPERATURE SENSORS HAS SET 70% DUTY CYCLE FLAG, IF YES, SET THE FAN DUTY CYCLE TO 70% + elif SensorFlag[0][0] or SensorFlag[1][0] or SensorFlag[2][0] or SensorFlag[3][0] or SensorFlag[4][0] or SensorFlag[5][0] or SensorFlag[6][0]: + if (isPlatformAFI == True): + fan.set_fan_duty_cycle(70) + else: + fan.set_fan_duty_cycle(60) + value = self.get_alarm_led_brightness() + if ( value > 0): + self.set_alarm_led_brightness(0) + + else: + pass + + + # RESET ALL THE SENSOR FLAGS + for x in range(self.SENSOR_CORETEMP_NUM_ON_MAIN_BOARD): + for y in range(self.THERMAL_NUM_RANGE): + SensorFlag[x][y] = 0 + + +class device_monitor(object): + + def __init__(self, log_file, log_level): + + global isPlatformAFI + global isFireThresholdReached + MASTER_LED_PATH = '/sys/class/leds/master/brightness' + SYSTEM_LED_PATH = '/sys/class/leds/system/brightness' + FANTYPE_PATH = '/sys/bus/i2c/devices/17-0068/fan1_direction' + + """Needs a logger and a logger level.""" + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + import sonic_platform + platform = sonic_platform.platform.Platform() + chassis = platform.get_chassis() + fan_type = chassis.get_fan_type(FANTYPE_PATH) + + # the return value of get_fan_type is AFO = 0, AFI = 1 and for error condition it is -1 + # In the error condition also, we are making default platform as AFO, to continue with Energy Monitoring + if (fan_type == -1 or fan_type == 0): + if (fan_type == -1): + print "Error: unable to open sys file for fan handling, defaulting it to AFO" + isPlatformAFI = False + else: + isPlatformAFI = True + + isFireThresholdReached = False + + master_led_value = 1 + try: + masterLED_file = open(MASTER_LED_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + masterLED_file.write(str(master_led_value)) + masterLED_file.close() + + system_led_value = 1 + try: + systemLED_file = open(SYSTEM_LED_PATH, 'r+') + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + systemLED_file.write(str(system_led_value)) + systemLED_file.close() + pass + + def manage_device(self): + thermal = QFX5210_ThermalUtil() + thermal.getSensorTemp() + +def main(): + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.DEBUG + + monitor = device_monitor(log_file, log_level) + while True: + monitor.manage_device() + time.sleep(20) + +if __name__ == '__main__': + main() + diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/utils/juniper_qfx5210_util.py b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/utils/juniper_qfx5210_util.py new file mode 100755 index 00000000000..b3f130af41c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/utils/juniper_qfx5210_util.py @@ -0,0 +1,697 @@ +#!/usr/bin/env python +# +# Modified to work on Juniper QFX5210 +# +# Based on accton_as7816_util.py +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import binascii +import logging +import re +import time +import random +import optparse +from collections import namedtuple + + + + +PROJECT_NAME = 'qfx5210_64x' +version = '0.1.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':4, 'fan':4,'thermal':6, 'psu':2, 'sfp':64} +FORCE = 0 +FUNCTION_NAME = '/var/log/juniper_qfx5210_util' + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + log_file = '%s.log' % FUNCTION_NAME + log_level = logging.DEBUG + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + logging.basicConfig( + filename=log_file, + filemode='w', + level=log_level, + format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S') + + if DEBUG == True: + print options + print args + print len(sys.argv) + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + DisableWatchDogCmd = '/usr/sbin/i2cset -f -y 0 0x65 0x3 0x04' + # Disable watchdog + try: + os.system(DisableWatchDogCmd) + except OSError: + print 'Error: Execution of "%s" failed', DisableWatchDogCmd + return False + + + CPUeepromFileCmd = 'cat /sys/devices/pci0000:00/0000:00:1f.3/i2c-0/0-0056/eeprom > /etc/init.d/eeprom_qfx5210_ascii' + # Write the contents of CPU EEPROM to file + try: + os.system(CPUeepromFileCmd) + except OSError: + print 'Error: Execution of "%s" failed', CPUeepromFileCmd + return False + + eeprom_ascii = '/etc/init.d/eeprom_qfx5210_ascii' + # Read file contents in Hex format + with open(eeprom_ascii, 'rb') as Hexformat: + content = Hexformat.read() + Hexformatoutput = binascii.hexlify(content) + + eeprom_hex = '/etc/init.d/eeprom_qfx5210_hex' + #Write contents of CPU EEPROM to new file in hexa format + with open(eeprom_hex, 'wb+') as Hexfile: + Hexfile.write(Hexformatoutput) + + # Read from EEPROM Hex file and extract the different fields like Product name, + # Part Number, Serial Number MAC Address, Mfg Date ... etc and store in /var/run/eeprom file + with open(eeprom_hex, 'rb') as eeprom_hexfile: + # moving the file pointer to required position where product name is stored in EEPROM file and reading the required bytes from this position + + product_position = eeprom_hexfile.seek(26, 0) + product_read = eeprom_hexfile.read(36) + product_name = binascii.unhexlify(product_read) + + # creating the "/var/run/eeprom" file and storing all the values of different fields in this file. + eeprom_file = open ("/var/run/eeprom", "a+") + eeprom_file.write("Product Name=%s\r\n" % str(product_name)) + + # like wise we are moving the file pointer to respective position where other fields are stored and extract these fields and store in /var/run/eeprom file + partnumber_position = eeprom_hexfile.seek(66, 0) + partnumber_read = eeprom_hexfile.read(20) + partnumber_name = binascii.unhexlify(partnumber_read) + eeprom_file.write("Part Number=%s\r\n" % str(partnumber_name)) + + serialnumber_position = eeprom_hexfile.seek(90, 0) + serialnumber_read = eeprom_hexfile.read(24) + serialnumber_name = binascii.unhexlify(serialnumber_read) + eeprom_file.write("Serial Number=%s\r\n" % str(serialnumber_name)) + + macaddress_position = eeprom_hexfile.seek(118, 0) + macaddress_read = eeprom_hexfile.read(12) + macaddress_name="" + for i in range(0,12,2): + macaddress_name += macaddress_read[i:i+2] + ":" + macaddress_name=macaddress_name[:-1] + eeprom_file.write("MAC Address=%s\r\n" % str(macaddress_name)) + + mfgdate_position = eeprom_hexfile.seek(132, 0) + mfgdate_read = eeprom_hexfile.read(40) + mfgdate_name = binascii.unhexlify(mfgdate_read) + eeprom_file.write("Manufacture Date=%s\r\n" % str(mfgdate_name)) + + devversion_position = eeprom_hexfile.seek(176, 0) + devversion_read = eeprom_hexfile.read(2) + eeprom_file.write("Device Version=%s\r\n" % str(devversion_read)) + + platform_position = eeprom_hexfile.seek(182, 0) + platform_read = eeprom_hexfile.read(68) + platform_name = binascii.unhexlify(platform_read) + eeprom_file.write("Platform Name=%s\r\n" % str(platform_name)) + + MACnumber_position = eeprom_hexfile.seek(254, 0) + MACnumber_read = eeprom_hexfile.read(4) + MACnumber = int(MACnumber_read, 16) + eeprom_file.write("Number of MAC Addresses=%s\r\n" % str(MACnumber)) + + vendorName_position = eeprom_hexfile.seek(262, 0) + vendorName_read = eeprom_hexfile.read(40) + vendorName = binascii.unhexlify(vendorName_read) + eeprom_file.write("Vendor Name=%s\r\n" % str(vendorName)) + + mfgname_position = eeprom_hexfile.seek(306, 0) + mfgname_read = eeprom_hexfile.read(40) + mfgname = binascii.unhexlify(mfgname_read) + eeprom_file.write("Manufacture Name=%s\r\n" % str(mfgname)) + + vendorext_position = eeprom_hexfile.seek(350, 0) + vendorext_read = eeprom_hexfile.read(124) + vendorext="" + vendorext += "0x" + vendorext_read[0:2] + for i in range(2,124,2): + vendorext += " 0x" + vendorext_read[i:i+2] + eeprom_file.write("Vendor Extension=%s\r\n" % str(vendorext)) + + IANA_position = eeprom_hexfile.seek(350, 0) + IANA_read = eeprom_hexfile.read(8) + IANAName = binascii.unhexlify(IANA_read) + eeprom_file.write("IANA=%s\r\n" % str(IANAName)) + + ASMpartrev_position = eeprom_hexfile.seek(358, 0) + ASMpartrev_read = eeprom_hexfile.read(4) + ASMpartrev = binascii.unhexlify(ASMpartrev_read) + eeprom_file.write("Assembly Part Number Rev=%s\r\n" % str(ASMpartrev)) + + ASMpartnum_position = eeprom_hexfile.seek(374, 0) + ASMpartnum_read = eeprom_hexfile.read(20) + ASMpartnum_read = binascii.unhexlify(ASMpartnum_read) + eeprom_file.write("Assembly Part Number=%s\r\n" % str(ASMpartnum_read)) + + ASMID_position = eeprom_hexfile.seek(402, 0) + ASMID_read = eeprom_hexfile.read(4) + ASMID_read_upper = ASMID_read.upper() + eeprom_file.write("Assembly ID=0x%s\r\n" % str(ASMID_read_upper)) + + ASMHWMajRev_position = eeprom_hexfile.seek(410, 0) + ASMHWMajRev_read = eeprom_hexfile.read(2) + eeprom_file.write("Assembly Major Revision=0x%s\r\n" % str(ASMHWMajRev_read)) + + ASMHWMinRev_position = eeprom_hexfile.seek(416, 0) + ASMHWMinRev_read = eeprom_hexfile.read(2) + eeprom_file.write("Assembly Minor Revision=0x%s\r\n" % str(ASMHWMinRev_read)) + + Deviation_position = eeprom_hexfile.seek(422, 0) + Deviation_read = eeprom_hexfile.read(28) + Deviation_read_upper = Deviation_read.upper() + eeprom_file.write("Deviation=0x%s\r\n" % str(Deviation_read_upper)) + + CLEI_position = eeprom_hexfile.seek(450, 0) + CLEI_read = eeprom_hexfile.read(20) + CLEI_name = binascii.unhexlify(CLEI_read) + eeprom_file.write("CLEI code=%s\r\n" % str(CLEI_name)) + + ONIEversion_position = eeprom_hexfile.seek(478, 0) + ONIEversion_read = eeprom_hexfile.read(22) + ONIEversion = binascii.unhexlify(ONIEversion_read) + eeprom_file.write("ONIE Version=%s\r\n" % str(ONIEversion)) + + CRC_position = eeprom_hexfile.seek(504, 0) + CRC = eeprom_hexfile.read(8) + eeprom_file.write("CRC=%s\r\n" % str(CRC)) + + eeprom_file.close() + + return True + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-32 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-32 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_check(): + ret, lsmod = log_os_system("lsmod| grep juniper", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + return True + + + +kos = [ +'modprobe i2c_dev', +'modprobe i2c_mux_pca954x force_deselect_on_exit=1', +'modprobe optoe', +'modprobe juniper_i2c_cpld' , +'modprobe ym2651y' , +'modprobe x86-64-juniper-qfx5210-64x-fan' , +'modprobe x86-64-juniper-qfx5210-64x-leds' , +'modprobe x86-64-juniper-qfx5210-64x-psu' ] + +def driver_install(): + global FORCE + status, output = log_os_system("depmod", 1) + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +led_prefix ='/sys/class/leds/' +hwmon_types = {'led': ['alarm','system','master','beacon']} +hwmon_nodes = {'led': ['brightness'] } +hwmon_prefix ={'led': led_prefix} + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'fan': ['17-0068'] , + 'thermal': ['18-0048','18-0049', '18-004a' , '18-004b', '17-004d', '17-004e'] , + 'psu': ['10-0053','9-0050'], + 'sfp': ['-0050']} +i2c_nodes = {'fan': ['present', 'front_speed_rpm', 'rear_speed_rpm'] , + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['sfp_is_present ', 'module_present']} + +sfp_map = [37,38,39,40,42,41,44,43,33,34,35,36,45,46,47,48,49,50,51,52, + 61,62,63,64,53,54,55,56,57,58,59,60,69,70,71,72,77,78,79,80,65, + 66,67,68,73,74,75,76,85,86,87,88,31,32,29,30,81,82,83,84,25,26, + 27,28] + +mknod =[ +'echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-1/new_device', +'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-2/new_device', +'echo 24c02 0x56 > /sys/bus/i2c/devices/i2c-0/new_device', +'echo qfx5210_64x_psu1 0x53 > /sys/bus/i2c/devices/i2c-10/new_device', +'echo ym2851 0x5b > /sys/bus/i2c/devices/i2c-10/new_device', +'echo qfx5210_64x_psu2 0x50 > /sys/bus/i2c/devices/i2c-9/new_device', +'echo ym2851 0x58 > /sys/bus/i2c/devices/i2c-9/new_device', +'echo qfx5210_64x_fan 0x68 > /sys/bus/i2c/devices/i2c-17/new_device', +'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-18/new_device', +'echo lm75 0x4d > /sys/bus/i2c/devices/i2c-17/new_device', +'echo lm75 0x4e > /sys/bus/i2c/devices/i2c-17/new_device', +'echo cpld_qfx5210 0x60 > /sys/bus/i2c/devices/i2c-19/new_device', +'echo cpld_plain 0x62 > /sys/bus/i2c/devices/i2c-20/new_device', +'echo cpld_plain 0x64 > /sys/bus/i2c/devices/i2c-21/new_device', +'echo cpld_plain 0x66 > /sys/bus/i2c/devices/i2c-22/new_device', +'echo cpld_plain 0x65 > /sys/bus/i2c/devices/i2c-0/new_device 2>/dev/null' +] + +def i2c_order_check(): + return 0 + +def device_install(): + global FORCE + + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(0,len(sfp_map)): + path = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device" + status, output =log_os_system("echo optoe1 0x50 > " + path, 1) + if status: + print output + if FORCE == 0: + return status + status, output =log_os_system("echo Port"+str(i)+" > /sys/bus/i2c/devices/"+str(sfp_map[i])+"-0050/port_name", 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/1-0076", 0) + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + nodelist = mknod + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_check() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + logging.info('Checking system....') + if driver_check() == False: + logging.info('No driver, installing....') + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + logging.info('No device, installing....') + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + logging.info('Checking system....') + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + logging.info('Removing device....') + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_check()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + logging.info('Removing installed driver....') + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + fmt = i2c_prefix+"19-0060/{0}_{1}" + path = fmt.format(nodes[j], k+1) + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + i = int(index)-1 + node = i2c_prefix+ str(sfp_map[i])+ i2c_bus['sfp'][0]+"/"+ 'eeprom' + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system(hex_cmd +" -C "+node, 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan'] ['fan1'][0] + node = node.replace(node.split("/")[-1], 'fan_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0076", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-juniper/qfx5210/utils/platform_poweroff b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/utils/platform_poweroff new file mode 100755 index 00000000000..27b23cff93a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-juniper/qfx5210/utils/platform_poweroff @@ -0,0 +1,106 @@ +#!/usr/bin/env bash +# +# Name: platform_poweroff version: 1.0 +# +# Description: This file contains the implementation of qfx5210 poweroff +# sequences +# +# Copyright (c) 2019, Juniper Networks, Inc. +# All rights reserved. +# +# Notice and Disclaimer: This code is licensed to you under the GNU General +# Public License as published by the Free Software Foundation, version 2 or +# any later version. This code is not an official Juniper product. You can +# obtain a copy of the License at +# +# OSS License: +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +# +# Third-Party Code: This code may depend on other components under separate +# copyright notice and license terms. Your use of the source code for those +# components is subject to the terms and conditions of the respective license +# as noted in the Third-Party source code file. + +LOGFILE="/var/log/poweroff_log" +TIMESTAMP=`date "+%Y-%m-%d %H:%M:%S"` + +retry() +{ + local ret_value=0 + + if [ $# -ne 3 ]; then + echo 'usage: retry ""' + exit 1 + fi + retries=$1 + wait_retry=$2 + command=$3 + for i in `seq 1 $retries`; do + echo "$TIMESTAMP $command" >> $LOGFILE + $command + ret_value=$? + [ $ret_value -eq 0 ] && break + echo "$TIMESTAMP Error: Command Execution failed with $ret_value, waiting to retry..." >> $LOGFILE + sleep $wait_retry + done + return $ret_value +} + + +if [ -f /usr/sbin/i2cset ] && [ -f /usr/sbin/i2cget ]; then + #Check if the CPU CPLD address is present on the bus or not + #0x65 - Azurite CPU CPLD I2C Addr + retry 128 1 "i2cget -y 0 0x65 0x0" + ret_val=$? + if [ $ret_val -ne 0 ]; then + echo "$TIMESTAMP CPU CPLD I2C Addr is not accessible...Terminating the halt.." >> $LOGFILE + return $ret_value + fi + #Initing Halt condition + retry 128 1 "/usr/sbin/i2cset -f -y 0 0x65 0x14 0x00" + ret_val=$? + if [ $ret_val -ne 0 ]; then + echo "$TIMESTAMP Halt Init Failed..." >> $LOGFILE + return $ret_value + fi + #Enable 0x77 MUX's First channel to access 0x76 MUX + retry 128 1 "/usr/sbin/i2cset -f -y 0 0x77 0 0x01" + ret_val=$? + if [ $ret_val -ne 0 ]; then + echo "$TIMESTAMP Mux Level1 enabling failed..." >> $LOGFILE + return $ret_value + fi + #Enable 0x76 MUX's Third channel to access Main Board CPLD @0x60 + retry 128 1 "/usr/sbin/i2cset -f -y 0 0x76 0 0x04" + ret_val=$? + if [ $ret_val -ne 0 ]; then + echo "$TIMESTAMP Mux Level2 enabling failed..." >> $LOGFILE + return $ret_value + fi + + sync + + echo "$TIMESTAMP System is going to Halt now ........" | tee $LOGFILE + #Sleeping for sometime, so that Print can reach to logger + sleep 1 + #Asserting the Halt on Azurite + retry 128 1 "/usr/sbin/i2cset -f -y 0 0x60 0x24 0x00" + ret_val=$? + if [ $ret_val -ne 0 ]; then + echo "$TIMESTAMP Halt command execution failed...Terminating the halt.." | tee $LOGFILE + return $ret_value + fi +fi diff --git a/platform/broadcom/sonic-platform-modules-mitac/.gitignore b/platform/broadcom/sonic-platform-modules-mitac/.gitignore new file mode 100644 index 00000000000..38e72f05332 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/.gitignore @@ -0,0 +1,17 @@ +# Build file +ly1200-32x/modules/*.mod.c +ly1200-32x/modules/*.mod.o +ly1200-32x/modules/*.o +ly1200-32x/modules/*.ko +ly1200-32x/modules/*.cmd +ly1200-32x/modules/Module.symvers +ly1200-32x/modules/modules.order +ly1200-32x/modules/.tmp_versions + +debian/sonic-platform-mitac-ly1200-32x/ +debian/sonic-platform-mitac-ly1200-32x.debhelper.log +debian/sonic-platform-mitac-ly1200-32x.postinst.debhelper +debian/sonic-platform-mitac-ly1200-32x.postrm.debhelper +debian/sonic-platform-mitac-ly1200-32x.prerm.debhelper +debian/sonic-platform-mitac-ly1200-32x.substvars +debian/files diff --git a/platform/broadcom/sonic-platform-modules-mitac/LICENSE b/platform/broadcom/sonic-platform-modules-mitac/LICENSE new file mode 100644 index 00000000000..c07c63913ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/LICENSE @@ -0,0 +1,16 @@ +Copyright (C) 2016 Microsoft, Inc +Copyright (C) 2018 MiTAC Technology Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/broadcom/sonic-platform-modules-mitac/README.md b/platform/broadcom/sonic-platform-modules-mitac/README.md new file mode 100644 index 00000000000..d7d47a58deb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/README.md @@ -0,0 +1 @@ +platform drivers of MiTAC products for the SONiC project diff --git a/platform/broadcom/sonic-platform-modules-mitac/debian/changelog b/platform/broadcom/sonic-platform-modules-mitac/debian/changelog new file mode 100644 index 00000000000..592bb3a7113 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/debian/changelog @@ -0,0 +1,5 @@ +sonic-mitac-platform-modules (1.0) unstable; urgency=low + + * Initial release + + -- MiTAC Network Thu, 01 Sep 2017 11:26:38 +0800 diff --git a/platform/broadcom/sonic-platform-modules-mitac/debian/compat b/platform/broadcom/sonic-platform-modules-mitac/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/broadcom/sonic-platform-modules-mitac/debian/control b/platform/broadcom/sonic-platform-modules-mitac/debian/control new file mode 100644 index 00000000000..8e20f8524d7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/debian/control @@ -0,0 +1,12 @@ +Source: sonic-mitac-platform-modules +Section: main +Priority: extra +Maintainer: MiTAC network +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: sonic-platform-mitac-ly1200-32x +Architecture: amd64 +Depends: linux-image-3.16.0-5-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + diff --git a/platform/broadcom/sonic-platform-modules-mitac/debian/rules b/platform/broadcom/sonic-platform-modules-mitac/debian/rules new file mode 100755 index 00000000000..7f9f99827d2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/debian/rules @@ -0,0 +1,41 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +PACKAGE_PRE_NAME := sonic-platform-mitac +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= ly1200-32x + +%: + dh $@ + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}\ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin;\ + cp $(MOD_SRC_DIR)/$${mod}/modules/*.ko \ + debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + mkdir -p debian/$(PACKAGE_PRE_NAME)-$${mod}/opt; \ + cp -rfL $(MOD_SRC_DIR)/$${mod}/opt/* \ + debian/$(PACKAGE_PRE_NAME)-$${mod}/opt; \ + mkdir -p debian/$(PACKAGE_PRE_NAME)-$${mod}/etc/init.d; \ + cp -rfL $(MOD_SRC_DIR)/$${mod}/etc/* \ + debian/$(PACKAGE_PRE_NAME)-$${mod}/etc; \ + done) + +override_dh_usrlocal: + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) + diff --git a/platform/broadcom/sonic-platform-modules-mitac/debian/sonic-platform-mitac-ly1200-32x.init b/platform/broadcom/sonic-platform-modules-mitac/debian/sonic-platform-mitac-ly1200-32x.init new file mode 100644 index 00000000000..d2f7dbf610a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/debian/sonic-platform-mitac-ly1200-32x.init @@ -0,0 +1,51 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup ly1200-32x board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + echo 0 > /proc/sys/kernel/perf_cpu_time_max_percent + + /etc/init.d/gpe start + /etc/init.d/i2c_init start + /etc/init.d/sys_polld start + /opt/script/start_watchdog.sh & + /opt/script/start_service.sh & + echo "done." + ;; + +stop) + echo -n "cleaning... " + + /etc/init.d/gpe stop + /etc/init.d/i2c_init stop + /etc/init.d/xcvr_servd stop + /etc/init.d/sys_servd stop + /etc/init.d/sys_polld stop + + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/sonic-platform-mitac-ly1200-32x.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-mitac/debian/sonic-platform-mitac-ly1200-32x.upstart b/platform/broadcom/sonic-platform-modules-mitac/debian/sonic-platform-mitac-ly1200-32x.upstart new file mode 100644 index 00000000000..39533b8226a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/debian/sonic-platform-mitac-ly1200-32x.upstart @@ -0,0 +1,5 @@ +description "SONiC platform service" + +respawn + +exec /etc/init.d/sonic-platform-mitac-ly1200-32x start diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/fan-ctrld b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/fan-ctrld new file mode 100755 index 00000000000..936f01e8b64 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/fan-ctrld @@ -0,0 +1,35 @@ +#!/bin/bash +### BEGIN INIT INFO +# Provides: fan-ctrld +# Required-Start: +# Required-Stop: +# Default-Start: rc.local +# Default-Stop: +# Short-Description: Daemon fan-ctrld +### END INIT INFO + +N=/etc/init.d/fan-ctrld +D_PATH=/opt/fan-ctrl/fan-ctrl + +set -e + +stop_fan_ctrld () { + pkill -f $D_PATH +} + +case "$1" in + start) + $D_PATH & + ;; + stop) + stop_fan_ctrld + ;; + reload|restart|force-reload) + ;; + *) + echo "Usage: $N {start}" >&2 + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/gpe b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/gpe new file mode 100755 index 00000000000..c326442db04 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/gpe @@ -0,0 +1,39 @@ +#! /bin/bash +### BEGIN INIT INFO +# Provides: gpe +# Required-Start: +# Required-Stop: +# Default-Start: rc.local +# Default-Stop: +# Short-Description: Daemon gpe +### END INIT INFO + +# Load kernel modules +load_module () { + if [ `lsmod | grep -c "gpe "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/extra/mitac_ly1200_32x_gpe.ko + fi +} + +remove_module () { + rmmod mitac-ly1200-32x_gpe +} + +case "$1" in + start) + load_module + ;; + stop) + remove_module + ;; + reload|restart|force-reload) + remove_module + load_module + ;; + *) + echo "Usage: $N {start|stop|reload|restart|force-reload}" >&2 + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/i2c_init b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/i2c_init new file mode 100755 index 00000000000..caddfce3325 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/i2c_init @@ -0,0 +1,214 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup ly1200-32x board. +### END INIT INFO + +I2C_I801_RM_PRINT=0 +I2C_ISMT_RM_PRINT=0 +I2C_I801_INS_PRINT=0 +I2C_ISMT_INS_PRINT=0 +I2C_I801_RM_RETRY=0 +I2C_ISMT_RM_RETRY=0 +I2C_I801_INS_RETRY=0 +I2C_ISMT_INS_RETRY=0 +RETRY=3 + +# process name/id +DAEMON_NAME=`basename $0` +DAEMON_PID="$$" + +# default log file +DEF_LOG_FILE="/var/log/syslog" + +#/* +#* FEATURE: +#* log_msg +#* PURPOSE: +#* log message +#* PARAMETERS: +#* msg (IN) message +#* RETURNS: +#* +#*/ +function log_msg() { + local msg=$1 + + echo -e "`date +"%b %_d %T"` `hostname` $DAEMON_NAME[$DAEMON_PID]: ${msg}" >> ${DEF_LOG_FILE} +} + + +# Load kernel modules +load_modules () { + #----------remove i801 start--------------------- + if [ `lsmod | grep -c "i2c_i801 "` -eq 1 ]; then + rmmod i2c_i801 + while [ `lsmod | grep -c "i2c_i801 "` -eq 1 ] + do + if [ $I2C_I801_RM_PRINT -eq 0 ]; then + I2C_I801_RM_PRINT=1 + log_msg "Wait for i2c_i801 remove." + fi + if [ $I2C_I801_RM_RETRY -lt $RETRY ];then + I2C_I801_RM_RETRY=$((I2C_I801_RM_RETRY + 1)) + else + break + fi + sleep 1 + done + if [ $I2C_I801_RM_PRINT -eq 1 ]; then + log_msg "i2c_i801 remove success." + fi + fi + #----------remove i801 end------------------------ + + + #----------remove ismt start---------------------- + if [ `lsmod | grep -c "i2c_ismt "` -eq 1 ]; then + rmmod i2c_ismt + while [ `lsmod | grep -c "i2c_ismt "` -eq 1 ] + do + if [ $I2C_ISMT_RM_PRINT -eq 0 ]; then + I2C_ISMT_RM_PRINT=1 + log_msg "Wait for i2c_ismt remove." + fi + if [ $I2C_ISMT_RM_RETRY -lt $RETRY ];then + I2C_ISMT_RM_RETRY=$((I2C_ISMT_RM_RETRY + 1)) + else + break + fi + sleep 1 + done + if [ $I2C_ISMT_RM_PRINT -eq 1 ]; then + log_msg "i2c_ismt remove success." + fi + fi + #----------remove ismt end------------------------ + + #----------insert i801 start---------------------- + insmod /lib/modules/`uname -r`/kernel/drivers/i2c/busses/i2c-i801.ko + while [ `lsmod | grep -c "i2c_i801 "` -eq 0 ] + do + if [ $I2C_I801_INS_PRINT -eq 0 ]; then + I2C_I801_INS_PRINT=1 + log_msg "Wait for i2c_i801 insert." + fi + if [ $I2C_I801_INS_RETRY -lt $RETRY ];then + I2C_I801_INS_RETRY=$((I2C_I801_INS_RETRY + 1)) + else + break + fi + sleep 1 + done + if [ $I2C_I801_INS_PRINT -eq 1 ]; then + log_msg "i2c_i801 insert success." + fi + #----------insert i801 end------------------------ + + #----------insert ismt start---------------------- + insmod /lib/modules/`uname -r`/kernel/drivers/i2c/busses/i2c-ismt.ko + while [ `lsmod | grep -c "i2c_ismt "` -eq 0 ] + do + if [ $I2C_ISMT_INS_PRINT -eq 0 ]; then + I2C_ISMT_INS_PRINT=1 + log_msg "Wait for i2c_ismt insert." + fi + if [ $I2C_ISMT_INS_RETRY -lt $RETRY ];then + I2C_ISMT_INS_RETRY=$((I2C_ISMT_INS_RETRY + 1)) + else + break + fi + sleep 1 + done + if [ $I2C_ISMT_INS_PRINT -eq 1 ]; then + log_msg "i2c_ismt insert success." + fi + #----------insert ismt start------------------------ + if [ `lsmod | grep -c "at24 "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/kernel/drivers/misc/eeprom/at24.ko + fi + if [ `lsmod | grep -c "i2c_mux "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/kernel/drivers/i2c/i2c-mux.ko + fi + if [ `lsmod | grep -c "i2c_mux_pca954x "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/kernel/drivers/i2c/muxes/i2c-mux-pca954x.ko + fi + if [ `lsmod | grep -c "lm75 "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/kernel/drivers/hwmon/lm75.ko + fi + if [ `lsmod | grep -c "max31790 "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/kernel/drivers/hwmon/max31790.ko + fi + if [ `lsmod | grep -c "sff_8436_eeprom "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/kernel/drivers/misc/eeprom/sff_8436_eeprom.ko + fi + if [ `lsmod | grep -c "mitac_ly1200_32x_fse000 "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/extra/mitac_ly1200_32x_fse000.ko + fi + if [ `lsmod | grep -c "mitac_ly1200_32x_system_cpld "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/extra/mitac_ly1200_32x_system_cpld.ko + fi + if [ `lsmod | grep -c "mitac_ly1200_32x_master_cpld "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/extra/mitac_ly1200_32x_master_cpld.ko + fi + if [ `lsmod | grep -c "mitac_ly1200_32x_slave_cpld "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/extra/mitac_ly1200_32x_slave_cpld.ko + fi + if [ `lsmod | grep -c "mitac_ly1200_32x_cb_i2c "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/extra/mitac_ly1200_32x_cb_i2c.ko + fi + if [ `lsmod | grep -c "mitac_ly1200_32x_sb_i2c "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/extra/mitac_ly1200_32x_sb_i2c.ko + fi + if [ `lsmod | grep -c "mitac_ly1200_32x_pb_i2c "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/extra/mitac_ly1200_32x_pb_i2c.ko + fi + if [ `lsmod | grep -c "mitac_ly1200_32x_fb_i2c "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/extra/mitac_ly1200_32x_fb_i2c.ko + fi + if [ `lsmod | grep -c "mitac_ly1200_32x_fb_module_i2c "` -eq 0 ]; then + insmod /lib/modules/`uname -r`/extra/mitac_ly1200_32x_fb_module_i2c.ko + fi +} + +# Load i2c_dev modules +load_i2c_dev_modules () { + if [ `lsmod | grep -c "i2c_dev "` -eq 0 ]; then + modprobe i2c_dev + fi +} + +case "$1" in +start) + echo -n "Setting up board... " + load_i2c_dev_modules + load_modules + echo "done." + ;; + +stop) + echo -n "cleaning... " + + + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/i2c_init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/sys_polld b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/sys_polld new file mode 100755 index 00000000000..1df43346f25 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/sys_polld @@ -0,0 +1,48 @@ +#!/bin/bash +### BEGIN INIT INFO +# Provides: sys-polld +# Required-Start: +# Required-Stop: +# Default-Start: rc.local +# Default-Stop: +# Short-Description: Daemon sys-polld +### END INIT INFO + +N=/etc/init.d/sys-polld +D_PATH=/opt/system-check/system-check.sh + +set -e + +stop_syspolld () { + local GCOUNT=`ps aux | grep -c "$D_PATH"` + local KILL_COUNT=0 + + while [ $GCOUNT -gt 1 ] + do + local ID=`ps aux | grep "$D_PATH" | head -n 1 | awk -F' ' '{print $2}'` + kill -15 $ID + GCOUNT=`ps aux | grep -c "$D_PATH"` + KILL_COUNT=`expr $KILL_COUNT + 1` + if [ $KILL_COUNT -eq 100 ]; then + echo "Error: kill sys-polld $KILL_COUNT times. stop kill process." + GCOUNT=0 + fi + done +} + +case "$1" in + start) + $D_PATH & + ;; + stop) + stop_syspolld + ;; + reload|restart|force-reload) + ;; + *) + echo "Usage: $N {start}" >&2 + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/sys_servd b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/sys_servd new file mode 100755 index 00000000000..09ee087d5db --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/sys_servd @@ -0,0 +1,28 @@ +#!/bin/sh +### BEGIN INIT INFO +# Provides: sys-servd +# Required-Start: $remote_fs $syslog +# Required-Stop: $remote_fs $syslog +# Default-Start: rc.local +# Default-Stop: 0 1 6 +# Short-Description: Daemon sys-servd +### END INIT INFO + +# Author: Eddy Weng + +DESC="Service script for /opt/sys-serv/sys-servd" +DAEMON=/opt/sys-serv/sys-servd + +case "$1" in + start) + start-stop-daemon --start --exec $DAEMON + ;; + stop) + start-stop-daemon --stop --name sys-servd + ;; + *) + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/xcvr_servd b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/xcvr_servd new file mode 100755 index 00000000000..1558614fd43 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/init.d/xcvr_servd @@ -0,0 +1,28 @@ +#!/bin/sh +### BEGIN INIT INFO +# Provides: xcvr-servd +# Required-Start: $remote_fs $syslog +# Required-Stop: $remote_fs $syslog +# Default-Start: rc.local +# Default-Stop: 0 1 6 +# Short-Description: Daemon xcvr-servd +### END INIT INFO + +# Author: Yencheng Lin + +DESC="Service script for /opt/xcvr-serv/xcvr-servd" +DAEMON=/opt/xcvr-serv/xcvr-servd + +case "$1" in + start) + start-stop-daemon --start --exec $DAEMON + ;; + stop) + start-stop-daemon --stop --name xcvr-servd + ;; + *) + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/rc0.d/K02xcvr_servd b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/rc0.d/K02xcvr_servd new file mode 120000 index 00000000000..d71f756d3de --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/rc0.d/K02xcvr_servd @@ -0,0 +1 @@ +../init.d/xcvr_servd \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/rc1.d/K02xcvr_servd b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/rc1.d/K02xcvr_servd new file mode 120000 index 00000000000..d71f756d3de --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/rc1.d/K02xcvr_servd @@ -0,0 +1 @@ +../init.d/xcvr_servd \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/rc6.d/K02xcvr_servd b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/rc6.d/K02xcvr_servd new file mode 120000 index 00000000000..d71f756d3de --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/etc/rc6.d/K02xcvr_servd @@ -0,0 +1 @@ +../init.d/xcvr_servd \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/Makefile b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/Makefile new file mode 100644 index 00000000000..fc3f88de8eb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/Makefile @@ -0,0 +1,5 @@ +obj-m:=mitac_ly1200_32x_fb_i2c.o mitac_ly1200_32x_fse000.o \ +mitac_ly1200_32x_master_cpld.o mitac_ly1200_32x_sb_i2c.o \ +mitac_ly1200_32x_system_cpld.o mitac_ly1200_32x_cb_i2c.o \ +mitac_ly1200_32x_fb_module_i2c.o mitac_ly1200_32x_gpe.o \ +mitac_ly1200_32x_pb_i2c.o mitac_ly1200_32x_slave_cpld.o diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/bms_i2c.h b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/bms_i2c.h new file mode 100644 index 00000000000..dd63607f39c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/bms_i2c.h @@ -0,0 +1,26 @@ +#ifndef _BMS_I2C_H_ +#define _BMS_I2C_H_ + +const char *bms_i2c_adapter_names[] = { + "SMBus I801 adapter", + "SMBus iSMT adapter", +}; + +enum i2c_adapter_type { + I2C_ADAPTER_I801 = 0, + I2C_ADAPTER_ISMT, +}; + +enum bms_module_switch_bus { + I2C_STAGE1_MUX_CHAN0 = 0, + I2C_STAGE1_MUX_CHAN1, + I2C_STAGE1_MUX_CHAN2, + I2C_STAGE1_MUX_CHAN3, + I2C_STAGE1_MUX_CHAN4, + I2C_STAGE1_MUX_CHAN5, + I2C_STAGE1_MUX_CHAN6, + I2C_STAGE1_MUX_CHAN7, +}; + +#endif /* _BMS_I2C_H_ */ + diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/master_cpld_reg.h b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/master_cpld_reg.h new file mode 100644 index 00000000000..dfdc89dbe57 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/master_cpld_reg.h @@ -0,0 +1,275 @@ +#ifndef __MASTER_CPLD_REG +#define __MASTER_CPLD_REG + +static int master_cpld_raw_read(struct device *dev, struct device_attribute *attr, char *buf, + int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name); +static int master_cpld_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count, + int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name); + +/* generic CPLD read function */ +#define FLD_RAW_RD_FUNC(_reg, _fld, _wdh) static ssize_t \ +master_cpld_##_fld##_raw_read(struct device *dev, struct device_attribute *attr, char *buf) { \ + return master_cpld_raw_read(dev, attr, buf, _reg##_offset, _reg##_width, _fld##_shift, _fld##_width, _fld##_mask, #_reg); \ +} + +/* generic CPLD write function */ +#define FLD_RAW_WR_FUNC(_reg, _fld, _wdh) static ssize_t \ +master_cpld_##_fld##_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { \ + return master_cpld_raw_write(dev, attr, buf, count, _reg##_offset, _reg##_width, _fld##_shift, _fld##_width, _fld##_mask, #_reg); \ +} + +/* CPLD register definition macros */ +#define REG_DEF(_reg, _off, _wdh) \ +static unsigned int _reg##_offset = (unsigned int)(_off); \ +static unsigned int _reg##_width = (unsigned int)(_wdh); + +/* CPLD register field definition macros, with generic read/write function */ +#define FLD_RAW_RO_DEF(_reg, _fld, _sft, _wdh) \ +static unsigned int _fld##_shift = (unsigned int)(_sft); \ +static unsigned int _fld##_width = (unsigned int)(_wdh); \ +static unsigned int _fld##_mask = ((((unsigned int)1) << (_wdh)) - 1); \ +FLD_RAW_RD_FUNC(_reg, _fld, _wdh) + +#define FLD_RAW_RW_DEF(_reg, _fld, _sft, _wdh) \ +static unsigned int _fld##_shift = (unsigned int)(_sft); \ +static unsigned int _fld##_width = (unsigned int)(_wdh); \ +static unsigned int _fld##_mask = ((((unsigned int)1) << (_wdh)) - 1); \ +FLD_RAW_RD_FUNC(_reg, _fld, _wdh) FLD_RAW_WR_FUNC(_reg, _fld, _wdh) + +/* declare master CPLD registers */ +/* register name offset width */ +/* --------------------------------------- ------- ----- */ +REG_DEF( mstr_cpld_rev, 0x00, 8) +REG_DEF( mstr_cpld_gpr, 0x01, 8) +REG_DEF( mb_brd_rev_type, 0x02, 8) +REG_DEF( mstr_srr, 0x03, 8) +REG_DEF( eeprom_wp, 0x04, 8) +REG_DEF( mstr_irq, 0x05, 8) +REG_DEF( system_led, 0x06, 8) +REG_DEF( fan_tray_3_1_led, 0x07, 8) +REG_DEF( fan_tray_6_4_led, 0x08, 8) +REG_DEF( fan_tray_status, 0x09, 8) +REG_DEF( fan_type_status, 0x0A, 8) +REG_DEF( psu_en_status, 0x0B, 8) +REG_DEF( mb_pwr_en_status, 0x0C, 8) +REG_DEF( mb_pwr_status, 0x0D, 8) + +REG_DEF( zqsfp28_present_8_1_status, 0x10, 8) +REG_DEF( zqsfp28_present_16_9_status, 0x11, 8) +REG_DEF( zqsfp28_rst_8_1, 0x12, 8) +REG_DEF( zqsfp28_rst_16_9, 0x13, 8) +REG_DEF( zqsfp28_modsel_8_1, 0x14, 8) +REG_DEF( zqsfp28_modsel_16_9, 0x15, 8) +REG_DEF( zqsfp28_lpmode_8_1, 0x16, 8) +REG_DEF( zqsfp28_lpmode_16_9, 0x17, 8) +REG_DEF( zqsfp28_irq_8_1_status, 0x18, 8) +REG_DEF( zqsfp28_irq_16_9_status, 0x19, 8) +REG_DEF( zqsfp28_irq_msk_8_1_status, 0x1A, 8) +REG_DEF( zqsfp28_irq_msk_16_9_status, 0x1B, 8) + + +/* declare master CPLD register's fields */ +/* register name field name shift width */ +/* ---------------------- ---------------- ------ ----- */ +FLD_RAW_RO_DEF( mstr_cpld_rev, mjr_rev, 4, 4) +FLD_RAW_RO_DEF( mstr_cpld_rev, mnr_rev, 0, 4) + +FLD_RAW_RW_DEF( mstr_cpld_gpr, scrtch_reg, 0, 8) + +FLD_RAW_RO_DEF( mb_brd_rev_type, brd_rev, 4, 4) +FLD_RAW_RO_DEF( mb_brd_rev_type, brd_type, 0, 4) + +FLD_RAW_RW_DEF( mstr_srr, mb_rst, 2, 1) +FLD_RAW_RW_DEF( mstr_srr, npu_rst, 1, 1) +FLD_RAW_RW_DEF( mstr_srr, mgmt_phy_rst, 0, 1) + +FLD_RAW_RW_DEF( eeprom_wp, mb_eeprom_wp, 2, 1) +FLD_RAW_RW_DEF( eeprom_wp, cpld_spi_wp, 1, 1) +FLD_RAW_RW_DEF( eeprom_wp, fan_eeprom_wp, 0, 1) + +FLD_RAW_RW_DEF( mstr_irq, ps2_int_msk, 7, 1) +FLD_RAW_RW_DEF( mstr_irq, ps1_int_msk, 6, 1) +FLD_RAW_RW_DEF( mstr_irq, usb_fault_msk, 5, 1) +FLD_RAW_RW_DEF( mstr_irq, pcie_int_msk, 4, 1) +FLD_RAW_RW_DEF( mstr_irq, fan_alert_int_msk, 3, 1) +FLD_RAW_RO_DEF( mstr_irq, usb_fault, 2, 1) +FLD_RAW_RO_DEF( mstr_irq, pcie_int, 1, 1) +FLD_RAW_RO_DEF( mstr_irq, fan_alert_int, 0, 1) + +FLD_RAW_RW_DEF( system_led, system_led_fld, 6, 2) +FLD_RAW_RW_DEF( system_led, power_led, 4, 2) +FLD_RAW_RW_DEF( system_led, fan_led, 2, 2) +FLD_RAW_RW_DEF( system_led, locate_led, 1, 1) + +FLD_RAW_RW_DEF( fan_tray_3_1_led, led_test, 6, 2) +FLD_RAW_RW_DEF( fan_tray_3_1_led, fan_tray3_led, 4, 2) +FLD_RAW_RW_DEF( fan_tray_3_1_led, fan_tray2_led, 2, 2) +FLD_RAW_RW_DEF( fan_tray_3_1_led, fan_tray1_led, 0, 2) + +FLD_RAW_RW_DEF( fan_tray_6_4_led, fan_tray6_led, 4, 2) +FLD_RAW_RW_DEF( fan_tray_6_4_led, fan_tray5_led, 2, 2) +FLD_RAW_RW_DEF( fan_tray_6_4_led, fan_tray4_led, 0, 2) + +FLD_RAW_RO_DEF( fan_tray_status, fan_tray6_present, 5, 1) +FLD_RAW_RO_DEF( fan_tray_status, fan_tray5_present, 4, 1) +FLD_RAW_RO_DEF( fan_tray_status, fan_tray4_present, 3, 1) +FLD_RAW_RO_DEF( fan_tray_status, fan_tray3_present, 2, 1) +FLD_RAW_RO_DEF( fan_tray_status, fan_tray2_present, 1, 1) +FLD_RAW_RO_DEF( fan_tray_status, fan_tray1_present, 0, 1) + +FLD_RAW_RO_DEF( fan_type_status, fan_type6, 5, 1) +FLD_RAW_RO_DEF( fan_type_status, fan_type5, 4, 1) +FLD_RAW_RO_DEF( fan_type_status, fan_type4, 3, 1) +FLD_RAW_RO_DEF( fan_type_status, fan_type3, 2, 1) +FLD_RAW_RO_DEF( fan_type_status, fan_type2, 1, 1) +FLD_RAW_RO_DEF( fan_type_status, fan_type1, 0, 1) + +FLD_RAW_RO_DEF( psu_en_status, ps1_ps, 7, 1) +FLD_RAW_RO_DEF( psu_en_status, ps1_pg, 6, 1) +FLD_RAW_RO_DEF( psu_en_status, ps1_int, 5, 1) +FLD_RAW_RW_DEF( psu_en_status, ps1_on, 4, 1) +FLD_RAW_RO_DEF( psu_en_status, ps2_ps, 3, 1) +FLD_RAW_RO_DEF( psu_en_status, ps2_pg, 2, 1) +FLD_RAW_RO_DEF( psu_en_status, ps2_int, 1, 1) +FLD_RAW_RW_DEF( psu_en_status, ps2_on, 0, 1) + +FLD_RAW_RW_DEF( mb_pwr_en_status, usb1_vbus_en, 7, 1) +FLD_RAW_RO_DEF( mb_pwr_en_status, v5p0_en, 5, 1) +FLD_RAW_RO_DEF( mb_pwr_en_status, v3p3_en, 4, 1) +FLD_RAW_RO_DEF( mb_pwr_en_status, vcc_1v8_en, 3, 1) +FLD_RAW_RO_DEF( mb_pwr_en_status, mac_avs1v_en, 2, 1) +FLD_RAW_RO_DEF( mb_pwr_en_status, mac1v_en, 1, 1) +FLD_RAW_RO_DEF( mb_pwr_en_status, vcc_1v25_en, 0, 1) + +FLD_RAW_RO_DEF( mb_pwr_status, vcc_3p3_cpld, 6, 1) +FLD_RAW_RO_DEF( mb_pwr_status, vcc5v_pg, 5, 1) +FLD_RAW_RO_DEF( mb_pwr_status, vcc3v3_pg, 4, 1) +FLD_RAW_RO_DEF( mb_pwr_status, vcc_1v8_pg, 3, 1) +FLD_RAW_RO_DEF( mb_pwr_status, mac_avs1v_pg, 2, 1) +FLD_RAW_RO_DEF( mb_pwr_status, mac1v_pg, 1, 1) +FLD_RAW_RO_DEF( mb_pwr_status, vcc_1v25_pg, 0, 1) + +FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port8_present, 7, 1) +FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port7_present, 6, 1) +FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port6_present, 5, 1) +FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port5_present, 4, 1) +FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port4_present, 3, 1) +FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port3_present, 2, 1) +FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port2_present, 1, 1) +FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port1_present, 0, 1) + +FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port16_present, 7, 1) +FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port15_present, 6, 1) +FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port14_present, 5, 1) +FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port13_present, 4, 1) +FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port12_present, 3, 1) +FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port11_present, 2, 1) +FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port10_present, 1, 1) +FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port9_present, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port8_rst, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port7_rst, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port6_rst, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port5_rst, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port4_rst, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port3_rst, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port2_rst, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port1_rst, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port16_rst, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port15_rst, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port14_rst, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port13_rst, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port12_rst, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port11_rst, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port10_rst, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port9_rst, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port8_modsel, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port7_modsel, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port6_modsel, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port5_modsel, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port4_modsel, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port3_modsel, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port2_modsel, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port1_modsel, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port16_modsel, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port15_modsel, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port14_modsel, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port13_modsel, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port12_modsel, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port11_modsel, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port10_modsel, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port9_modsel, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port8_lpmode, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port7_lpmode, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port6_lpmode, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port5_lpmode, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port4_lpmode, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port3_lpmode, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port2_lpmode, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port1_lpmode, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port16_lpmode, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port15_lpmode, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port14_lpmode, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port13_lpmode, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port12_lpmode, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port11_lpmode, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port10_lpmode, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port9_lpmode, 0, 1) + +FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port8_irq_status, 7, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port7_irq_status, 6, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port6_irq_status, 5, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port5_irq_status, 4, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port4_irq_status, 3, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port3_irq_status, 2, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port2_irq_status, 1, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port1_irq_status, 0, 1) + +FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port16_irq_status, 7, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port15_irq_status, 6, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port14_irq_status, 5, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port13_irq_status, 4, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port12_irq_status, 3, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port11_irq_status, 2, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port10_irq_status, 1, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port9_irq_status, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port8_irq_msk, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port7_irq_msk, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port6_irq_msk, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port5_irq_msk, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port4_irq_msk, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port3_irq_msk, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port2_irq_msk, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port1_irq_msk, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port16_irq_msk, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port15_irq_msk, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port14_irq_msk, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port13_irq_msk, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port12_irq_msk, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port11_irq_msk, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port10_irq_msk, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port9_irq_msk, 0, 1) + +FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port_1_8_present, 0, 8) +FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port_9_16_present, 0, 8) +FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port_1_8_rst, 0, 8) +FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port_9_16_rst, 0, 8) +FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port_1_8_modsel, 0, 8) +FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port_9_16_modsel, 0, 8) +FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port_1_8_irq_status, 0, 8) +FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port_9_16_irq_status,0, 8) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port_1_8_irq_msk, 0, 8) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port_9_16_irq_msk, 0, 8) +FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port_1_8_lpmode, 0, 8) +FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port_9_16_lpmode, 0, 8) + +FLD_RAW_RO_DEF( fan_tray_status, fan_tray1_6_present, 0, 8) +FLD_RAW_RO_DEF( psu_en_status, psu_en_status_fld, 0, 8) +#endif /* __MASTER_CPLD_REG */ diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/master_cpld_sysfs.h b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/master_cpld_sysfs.h new file mode 100644 index 00000000000..e851ca5fb48 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/master_cpld_sysfs.h @@ -0,0 +1,226 @@ +#ifndef __MASTER_CPLD_SYSFS +#define __MASTER_CPLD_SYSFS + +/* generic CPLD sysfs file definition macros */ +#define SYSFS_RAW_RO_ATTR_DEF(field) \ +struct device_attribute field \ + = __ATTR(field, S_IRUGO, master_cpld_##field##_raw_read, NULL); + +#define SYSFS_RAW_RW_ATTR_DEF(field) \ +struct device_attribute field \ + = __ATTR(field, S_IRUGO | S_IWUGO, master_cpld_##field##_raw_read, master_cpld_##field##_raw_write); + +#define SYSFS_MISC_RO_ATTR_DEF(field, _read) \ +struct device_attribute field \ + = __ATTR(field, S_IRUGO, _read, NULL); + +#define SYSFS_MISC_RW_ATTR_DEF(field, _read, _write) \ +struct device_attribute field \ + = __ATTR(field, S_IRUGO | S_IWUGO, _read, _write); + +#define SYSFS_ATTR_PTR(field) \ +&field.attr + +/* declare master CPLD file system */ +SYSFS_RAW_RO_ATTR_DEF(mjr_rev) +SYSFS_RAW_RO_ATTR_DEF(mnr_rev) + +SYSFS_RAW_RW_ATTR_DEF(scrtch_reg) + +SYSFS_RAW_RO_ATTR_DEF(brd_rev) +SYSFS_RAW_RO_ATTR_DEF(brd_type) + +SYSFS_RAW_RW_ATTR_DEF(mb_rst) +SYSFS_RAW_RW_ATTR_DEF(npu_rst) +SYSFS_RAW_RW_ATTR_DEF(mgmt_phy_rst) + +SYSFS_RAW_RW_ATTR_DEF(mb_eeprom_wp) +SYSFS_RAW_RW_ATTR_DEF(cpld_spi_wp) +SYSFS_RAW_RW_ATTR_DEF(fan_eeprom_wp) + +SYSFS_RAW_RW_ATTR_DEF(ps2_int_msk) +SYSFS_RAW_RW_ATTR_DEF(ps1_int_msk) +SYSFS_RAW_RW_ATTR_DEF(usb_fault_msk) +SYSFS_RAW_RW_ATTR_DEF(pcie_int_msk) +SYSFS_RAW_RW_ATTR_DEF(fan_alert_int_msk) +SYSFS_RAW_RO_ATTR_DEF(usb_fault) +SYSFS_RAW_RO_ATTR_DEF(pcie_int) +SYSFS_RAW_RO_ATTR_DEF(fan_alert_int) + +SYSFS_RAW_RW_ATTR_DEF(system_led_fld) +SYSFS_RAW_RW_ATTR_DEF(power_led) +SYSFS_RAW_RW_ATTR_DEF(fan_led) +SYSFS_RAW_RW_ATTR_DEF(locate_led) + +SYSFS_RAW_RW_ATTR_DEF(led_test) +SYSFS_RAW_RW_ATTR_DEF(fan_tray3_led) +SYSFS_RAW_RW_ATTR_DEF(fan_tray2_led) +SYSFS_RAW_RW_ATTR_DEF(fan_tray1_led) + +SYSFS_RAW_RW_ATTR_DEF(fan_tray6_led) +SYSFS_RAW_RW_ATTR_DEF(fan_tray5_led) +SYSFS_RAW_RW_ATTR_DEF(fan_tray4_led) + +SYSFS_RAW_RO_ATTR_DEF(fan_tray6_present) +SYSFS_RAW_RO_ATTR_DEF(fan_tray5_present) +SYSFS_RAW_RO_ATTR_DEF(fan_tray4_present) +SYSFS_RAW_RO_ATTR_DEF(fan_tray3_present) +SYSFS_RAW_RO_ATTR_DEF(fan_tray2_present) +SYSFS_RAW_RO_ATTR_DEF(fan_tray1_present) + +SYSFS_RAW_RO_ATTR_DEF(fan_type6) +SYSFS_RAW_RO_ATTR_DEF(fan_type5) +SYSFS_RAW_RO_ATTR_DEF(fan_type4) +SYSFS_RAW_RO_ATTR_DEF(fan_type3) +SYSFS_RAW_RO_ATTR_DEF(fan_type2) +SYSFS_RAW_RO_ATTR_DEF(fan_type1) + +SYSFS_RAW_RO_ATTR_DEF(ps1_ps) +SYSFS_RAW_RO_ATTR_DEF(ps1_pg) +SYSFS_RAW_RO_ATTR_DEF(ps1_int) +SYSFS_RAW_RW_ATTR_DEF(ps1_on) +SYSFS_RAW_RO_ATTR_DEF(ps2_ps) +SYSFS_RAW_RO_ATTR_DEF(ps2_pg) +SYSFS_RAW_RO_ATTR_DEF(ps2_int) +SYSFS_RAW_RW_ATTR_DEF(ps2_on) + +SYSFS_RAW_RW_ATTR_DEF(usb1_vbus_en) +SYSFS_RAW_RO_ATTR_DEF(v5p0_en) +SYSFS_RAW_RO_ATTR_DEF(v3p3_en) +SYSFS_RAW_RO_ATTR_DEF(vcc_1v8_en) +SYSFS_RAW_RO_ATTR_DEF(mac_avs1v_en) +SYSFS_RAW_RO_ATTR_DEF(mac1v_en) +SYSFS_RAW_RO_ATTR_DEF(vcc_1v25_en) + +SYSFS_RAW_RO_ATTR_DEF(vcc_3p3_cpld) +SYSFS_RAW_RO_ATTR_DEF(vcc5v_pg) +SYSFS_RAW_RO_ATTR_DEF(vcc3v3_pg) +SYSFS_RAW_RO_ATTR_DEF(vcc_1v8_pg) +SYSFS_RAW_RO_ATTR_DEF(mac_avs1v_pg) +SYSFS_RAW_RO_ATTR_DEF(mac1v_pg) +SYSFS_RAW_RO_ATTR_DEF(vcc_1v25_pg) + +SYSFS_RAW_RO_ATTR_DEF(port8_present) +SYSFS_RAW_RO_ATTR_DEF(port7_present) +SYSFS_RAW_RO_ATTR_DEF(port6_present) +SYSFS_RAW_RO_ATTR_DEF(port5_present) +SYSFS_RAW_RO_ATTR_DEF(port4_present) +SYSFS_RAW_RO_ATTR_DEF(port3_present) +SYSFS_RAW_RO_ATTR_DEF(port2_present) +SYSFS_RAW_RO_ATTR_DEF(port1_present) + +SYSFS_RAW_RO_ATTR_DEF(port16_present) +SYSFS_RAW_RO_ATTR_DEF(port15_present) +SYSFS_RAW_RO_ATTR_DEF(port14_present) +SYSFS_RAW_RO_ATTR_DEF(port13_present) +SYSFS_RAW_RO_ATTR_DEF(port12_present) +SYSFS_RAW_RO_ATTR_DEF(port11_present) +SYSFS_RAW_RO_ATTR_DEF(port10_present) +SYSFS_RAW_RO_ATTR_DEF(port9_present) + +SYSFS_RAW_RW_ATTR_DEF(port8_rst) +SYSFS_RAW_RW_ATTR_DEF(port7_rst) +SYSFS_RAW_RW_ATTR_DEF(port6_rst) +SYSFS_RAW_RW_ATTR_DEF(port5_rst) +SYSFS_RAW_RW_ATTR_DEF(port4_rst) +SYSFS_RAW_RW_ATTR_DEF(port3_rst) +SYSFS_RAW_RW_ATTR_DEF(port2_rst) +SYSFS_RAW_RW_ATTR_DEF(port1_rst) + +SYSFS_RAW_RW_ATTR_DEF(port16_rst) +SYSFS_RAW_RW_ATTR_DEF(port15_rst) +SYSFS_RAW_RW_ATTR_DEF(port14_rst) +SYSFS_RAW_RW_ATTR_DEF(port13_rst) +SYSFS_RAW_RW_ATTR_DEF(port12_rst) +SYSFS_RAW_RW_ATTR_DEF(port11_rst) +SYSFS_RAW_RW_ATTR_DEF(port10_rst) +SYSFS_RAW_RW_ATTR_DEF(port9_rst) + +SYSFS_RAW_RW_ATTR_DEF(port8_modsel) +SYSFS_RAW_RW_ATTR_DEF(port7_modsel) +SYSFS_RAW_RW_ATTR_DEF(port6_modsel) +SYSFS_RAW_RW_ATTR_DEF(port5_modsel) +SYSFS_RAW_RW_ATTR_DEF(port4_modsel) +SYSFS_RAW_RW_ATTR_DEF(port3_modsel) +SYSFS_RAW_RW_ATTR_DEF(port2_modsel) +SYSFS_RAW_RW_ATTR_DEF(port1_modsel) + +SYSFS_RAW_RW_ATTR_DEF(port16_modsel) +SYSFS_RAW_RW_ATTR_DEF(port15_modsel) +SYSFS_RAW_RW_ATTR_DEF(port14_modsel) +SYSFS_RAW_RW_ATTR_DEF(port13_modsel) +SYSFS_RAW_RW_ATTR_DEF(port12_modsel) +SYSFS_RAW_RW_ATTR_DEF(port11_modsel) +SYSFS_RAW_RW_ATTR_DEF(port10_modsel) +SYSFS_RAW_RW_ATTR_DEF(port9_modsel) + +SYSFS_RAW_RW_ATTR_DEF(port8_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port7_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port6_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port5_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port4_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port3_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port2_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port1_lpmode) + +SYSFS_RAW_RW_ATTR_DEF(port16_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port15_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port14_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port13_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port12_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port11_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port10_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port9_lpmode) + +SYSFS_RAW_RO_ATTR_DEF(port8_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port7_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port6_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port5_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port4_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port3_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port2_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port1_irq_status) + +SYSFS_RAW_RO_ATTR_DEF(port16_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port15_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port14_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port13_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port12_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port11_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port10_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port9_irq_status) + +SYSFS_RAW_RW_ATTR_DEF(port8_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port7_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port6_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port5_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port4_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port3_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port2_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port1_irq_msk) + +SYSFS_RAW_RW_ATTR_DEF(port16_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port15_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port14_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port13_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port12_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port11_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port10_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port9_irq_msk) + +SYSFS_RAW_RO_ATTR_DEF(port_1_8_present) +SYSFS_RAW_RO_ATTR_DEF(port_9_16_present) +SYSFS_RAW_RW_ATTR_DEF(port_1_8_rst) +SYSFS_RAW_RW_ATTR_DEF(port_9_16_rst) +SYSFS_RAW_RW_ATTR_DEF(port_1_8_modsel) +SYSFS_RAW_RW_ATTR_DEF(port_9_16_modsel) +SYSFS_RAW_RO_ATTR_DEF(port_1_8_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port_9_16_irq_status) +SYSFS_RAW_RW_ATTR_DEF(port_1_8_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port_9_16_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port_1_8_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port_9_16_lpmode) + +SYSFS_RAW_RO_ATTR_DEF(fan_tray1_6_present) +SYSFS_RAW_RO_ATTR_DEF(psu_en_status_fld) +#endif /* __MASTER_CPLD_SYSFS */ diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_cb_i2c.c b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_cb_i2c.c new file mode 100644 index 00000000000..11fffe25178 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_cb_i2c.c @@ -0,0 +1,163 @@ +#include +#include +#include +#include "bms_i2c.h" + +#define BMS_CB_I2C_CLIENT_NUM 5 +#define BMS_CB_ADAPTER_BASE 0 + +static struct i2c_client *bms_cb_clients[BMS_CB_I2C_CLIENT_NUM] = {NULL}; +static int bms_cb_client_index = 0; + +static int __init __find_i2c_adap(struct device *dev, void *data) +{ + const char *name = data; + static const char *prefix = "i2c-"; + struct i2c_adapter *adapter; + + if (strncmp(dev_name(dev), prefix, strlen(prefix)) != 0) + { + return 0; + } + adapter = to_i2c_adapter(dev); + + return (strncmp(adapter->name, name, strlen(name)) == 0); +} + +static int __init find_i2c_adapter_num(enum i2c_adapter_type type) +{ + struct device *dev = NULL; + struct i2c_adapter *adapter; + const char *name = bms_i2c_adapter_names[type]; + + /* find the adapter by name */ + dev = bus_find_device(&i2c_bus_type, NULL, (void *)name, + __find_i2c_adap); + if (!dev) { + pr_err("%s: i2c adapter %s not found on system.\n", + __func__, name); + return -ENODEV; + } + adapter = to_i2c_adapter(dev); + + return adapter->nr; +} + + +static __init struct i2c_client *bms_cb_setup_spd( + struct i2c_adapter *adap, int addr) +{ + struct i2c_board_info info_spd = { + I2C_BOARD_INFO("spd", addr), + }; + + return i2c_new_device(adap, &info_spd); +} + + +static __init struct i2c_client *bms_cb_setup_eeprom_24c02( + struct i2c_adapter *adap, int addr) +{ + struct i2c_board_info info_spd = { + I2C_BOARD_INFO("24c02", addr), + }; + + return i2c_new_device(adap, &info_spd); +} + +static __init struct i2c_client *bms_cb_setup_tmp75( + struct i2c_adapter *adap, int addr) +{ + struct i2c_board_info info_spd = { + I2C_BOARD_INFO("tmp75", addr), + }; + + return i2c_new_device(adap, &info_spd); +} + +static __init struct i2c_client *bms_cb_setup_system_cpld(struct i2c_adapter *adap) +{ + struct i2c_board_info info = { + I2C_BOARD_INFO("system_cpld", 0x31), + }; + + return i2c_new_device(adap, &info); +} + +static int __init bms_cb_setup_devices_i801(void) +{ + struct i2c_adapter *adap; + int adap_num = find_i2c_adapter_num(I2C_ADAPTER_I801); + + if (adap_num < 0) + return adap_num; + + adap = i2c_get_adapter(adap_num); + if (!adap) { + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + goto exit; + } + + bms_cb_clients[bms_cb_client_index++] = bms_cb_setup_spd(adap, 0x50); + bms_cb_clients[bms_cb_client_index++] = bms_cb_setup_spd(adap, 0x52); + bms_cb_clients[bms_cb_client_index++] = bms_cb_setup_tmp75(adap, 0x4e); + +exit: + return 0; +} + +static int __init bms_cb_setup_devices_ismt(void) +{ + struct i2c_adapter *adap; + int adap_num = find_i2c_adapter_num(I2C_ADAPTER_ISMT); + + if (adap_num < 0) + return adap_num; + + adap = i2c_get_adapter(adap_num); + if (!adap) { + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + return 0; + } + + bms_cb_clients[bms_cb_client_index++] = bms_cb_setup_system_cpld(adap); + bms_cb_clients[bms_cb_client_index++] = bms_cb_setup_eeprom_24c02(adap, 0x56); + return 0; +} + +static int __init bms_cb_i2c_init(void) +{ + /* Initial bms_cb_slients array. */ + memset(bms_cb_clients, 0x0, BMS_CB_I2C_CLIENT_NUM); + + bms_cb_setup_devices_i801(); + mdelay(200); + bms_cb_setup_devices_ismt(); + + return 0; +} + + +static void __exit bms_cb_i2c_exit(void){ + int i; + + for (i=(bms_cb_client_index-1); i>=0; i--) { + if (bms_cb_clients[i]) { + i2c_unregister_device(bms_cb_clients[i]); + bms_cb_clients[i] = NULL; + } + } + + bms_cb_client_index = 0; + +} + + +module_init(bms_cb_i2c_init); +module_exit(bms_cb_i2c_exit); + + +MODULE_DESCRIPTION("mitac_ly1200_32x_cb_i2c driver"); +MODULE_AUTHOR("Eddy Weng "); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_fb_i2c.c b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_fb_i2c.c new file mode 100644 index 00000000000..d228bc48127 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_fb_i2c.c @@ -0,0 +1,153 @@ +#include +#include +#include "bms_i2c.h" + +#define BMS_FB_I2C_CLIENT_NUM 3 + + +static struct i2c_client *bms_fb_clients[BMS_FB_I2C_CLIENT_NUM] = {NULL}; +static int bms_fb_client_index = 0; + +static int __init __find_i2c_adap(struct device *dev, void *data) +{ + const char *name = data; + static const char *prefix = "i2c-"; + struct i2c_adapter *adapter; + + if (strncmp(dev_name(dev), prefix, strlen(prefix)) != 0) + { + return 0; + } + adapter = to_i2c_adapter(dev); + + return (strncmp(adapter->name, name, strlen(name)) == 0); +} + +static int __init find_i2c_adapter_num(enum i2c_adapter_type type) +{ + struct device *dev = NULL; + struct i2c_adapter *adapter; + const char *name = bms_i2c_adapter_names[type]; + + /* find the adapter by name */ + dev = bus_find_device(&i2c_bus_type, NULL, (void *)name, + __find_i2c_adap); + if (!dev) { + pr_err("%s: i2c adapter %s not found on system.\n", + __func__, name); + return -ENODEV; + } + adapter = to_i2c_adapter(dev); + + return adapter->nr; +} + +static int __init find_i2c_mux_adapter_num(int parent_num, int num) +{ + struct device *dev = NULL; + struct i2c_adapter *adapter; + char name[48]; + + snprintf(name, sizeof(name), "i2c-%d-mux (chan_id %d)", + parent_num, num); + /* find the adapter by name */ + dev = bus_find_device(&i2c_bus_type, NULL, (void *)name, + __find_i2c_adap); + if (!dev) { + pr_err("%s: i2c adapter %s not found on system.\n", + __func__, name); + return -ENODEV; + } + adapter = to_i2c_adapter(dev); + + return adapter->nr; +} + +static __init struct i2c_client *bms_fb_setup_tmp75( + struct i2c_adapter *adap, int addr) +{ + struct i2c_board_info info_spd = { + I2C_BOARD_INFO("tmp75", addr), + }; + + return i2c_new_device(adap, &info_spd); +} + +static __init struct i2c_client *bms_fb_setup_max31790( + struct i2c_adapter *adap, int addr) +{ + struct i2c_board_info info_spd = { + I2C_BOARD_INFO("max31790", addr), + }; + + return i2c_new_device(adap, &info_spd); +} + +static int __init bms_fb_setup_devices(void) +{ + struct i2c_adapter *adap; + int adap_num; + int parent_num; + + parent_num = find_i2c_adapter_num(I2C_ADAPTER_ISMT); + if (parent_num < 0) + return parent_num; + + /* Mux chan1 steup */ + adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN1); + if (adap_num >= 0){ + adap = i2c_get_adapter(adap_num); + if(adap) { + bms_fb_clients[bms_fb_client_index++] = bms_fb_setup_max31790(adap, 0x20); + bms_fb_clients[bms_fb_client_index++] = bms_fb_setup_max31790(adap, 0x23); + }else{ + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + } + }else{ + pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN1); + } + + adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN2); + if (adap_num >= 0){ + adap = i2c_get_adapter(adap_num); + if(adap) { + bms_fb_clients[bms_fb_client_index++] = bms_fb_setup_tmp75(adap, 0x4d); + }else{ + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + } + }else{ + pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN2); + } + + return 0; +} + +static int __init bms_fb_i2c_init(void) +{ + bms_fb_setup_devices(); + + return 0; +} + +static void __exit bms_fb_i2c_exit(void){ + int i; + + for (i=(bms_fb_client_index-1); i>=0; i--) { + if (bms_fb_clients[i]) { + i2c_unregister_device(bms_fb_clients[i]); + bms_fb_clients[i] = NULL; + } + } + + bms_fb_client_index = 0; + +} + +module_init(bms_fb_i2c_init); +module_exit(bms_fb_i2c_exit); + + +MODULE_DESCRIPTION("mitac_ly1200_32x_fb_i2c driver"); +MODULE_AUTHOR("Eddy Weng "); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_fb_module_i2c.c b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_fb_module_i2c.c new file mode 100644 index 00000000000..174dba19721 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_fb_module_i2c.c @@ -0,0 +1,138 @@ +#include +#include +#include "bms_i2c.h" + +#define BMS_FB_MODULE_I2C_CLIENT_NUM 6 + +static struct i2c_client *bms_fb_module_clients[BMS_FB_MODULE_I2C_CLIENT_NUM] = {NULL}; +static int bms_fb_module_client_index = 0; + +static int __init __find_i2c_adap(struct device *dev, void *data) +{ + const char *name = data; + static const char *prefix = "i2c-"; + struct i2c_adapter *adapter; + + if (strncmp(dev_name(dev), prefix, strlen(prefix)) != 0) + { + return 0; + } + adapter = to_i2c_adapter(dev); + + return (strncmp(adapter->name, name, strlen(name)) == 0); +} + +static int __init find_i2c_adapter_num(enum i2c_adapter_type type) +{ + struct device *dev = NULL; + struct i2c_adapter *adapter; + const char *name = bms_i2c_adapter_names[type]; + + /* find the adapter by name */ + dev = bus_find_device(&i2c_bus_type, NULL, (void *)name, + __find_i2c_adap); + if (!dev) { + pr_err("%s: i2c adapter %s not found on system.\n", + __func__, name); + return -ENODEV; + } + adapter = to_i2c_adapter(dev); + + return adapter->nr; +} + +static int __init find_i2c_mux_adapter_num(int parent_num, int num) +{ + struct device *dev = NULL; + struct i2c_adapter *adapter; + char name[48]; + + snprintf(name, sizeof(name), "i2c-%d-mux (chan_id %d)", + parent_num, num); + /* find the adapter by name */ + dev = bus_find_device(&i2c_bus_type, NULL, (void *)name, + __find_i2c_adap); + if (!dev) { + pr_err("%s: i2c adapter %s not found on system.\n", + __func__, name); + return -ENODEV; + } + adapter = to_i2c_adapter(dev); + + return adapter->nr; +} + + +static __init struct i2c_client *bms_fb_module_setup_eeprom_24c02( + struct i2c_adapter *adap, int addr) +{ + struct i2c_board_info info_spd = { + I2C_BOARD_INFO("24c02", addr), + }; + + return i2c_new_device(adap, &info_spd); +} + +static int __init bms_fb_module_setup_devices(void) +{ + struct i2c_adapter *adap; + int adap_num; + int parent_num; + + parent_num = find_i2c_adapter_num(I2C_ADAPTER_ISMT); + if (parent_num < 0) + return parent_num; + + adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN1); + if (adap_num < 0) + return adap_num; + + adap = i2c_get_adapter(adap_num); + if (!adap) { + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + goto exit; + } + + bms_fb_module_clients[bms_fb_module_client_index++] = bms_fb_module_setup_eeprom_24c02(adap, 0x50); + bms_fb_module_clients[bms_fb_module_client_index++] = bms_fb_module_setup_eeprom_24c02(adap, 0x51); + bms_fb_module_clients[bms_fb_module_client_index++] = bms_fb_module_setup_eeprom_24c02(adap, 0x52); + bms_fb_module_clients[bms_fb_module_client_index++] = bms_fb_module_setup_eeprom_24c02(adap, 0x53); + bms_fb_module_clients[bms_fb_module_client_index++] = bms_fb_module_setup_eeprom_24c02(adap, 0x54); + bms_fb_module_clients[bms_fb_module_client_index++] = bms_fb_module_setup_eeprom_24c02(adap, 0x55); + +exit: + return 0; +} + +static int __init bms_fb_module_i2c_init(void) +{ + /* Initial bms_sb_slients array. */ + memset(bms_fb_module_clients, 0x0, BMS_FB_MODULE_I2C_CLIENT_NUM); + + bms_fb_module_setup_devices(); + + return 0; +} + +static void __exit bms_fb_module_i2c_exit(void){ + int i; + + for (i=(bms_fb_module_client_index-1); i>=0; i--) { + if (bms_fb_module_clients[i]) { + i2c_unregister_device(bms_fb_module_clients[i]); + bms_fb_module_clients[i] = NULL; + } + } + + bms_fb_module_client_index = 0; + +} + +module_init(bms_fb_module_i2c_init); +module_exit(bms_fb_module_i2c_exit); + + +MODULE_DESCRIPTION("mitac_ly1200_32x_fb_module_i2c driver"); +MODULE_AUTHOR("Eddy Weng "); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_fse000.c b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_fse000.c new file mode 100644 index 00000000000..36282170685 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_fse000.c @@ -0,0 +1,1787 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pmbus.h" +#include + +/* + * Number of additional attribute pointers to allocate + * with each call to krealloc + */ +#define PMBUS_ATTR_ALLOC_SIZE 32 + +/* + * Index into status register array, per status register group + */ +#define PB_STATUS_BASE 0 +#define PB_STATUS_VOUT_BASE (PB_STATUS_BASE + PMBUS_PAGES) +#define PB_STATUS_IOUT_BASE (PB_STATUS_VOUT_BASE + PMBUS_PAGES) +#define PB_STATUS_FAN_BASE (PB_STATUS_IOUT_BASE + PMBUS_PAGES) +#define PB_STATUS_FAN34_BASE (PB_STATUS_FAN_BASE + PMBUS_PAGES) +#define PB_STATUS_TEMP_BASE (PB_STATUS_FAN34_BASE + PMBUS_PAGES) +#define PB_STATUS_INPUT_BASE (PB_STATUS_TEMP_BASE + PMBUS_PAGES) +#define PB_STATUS_VMON_BASE (PB_STATUS_INPUT_BASE + 1) + +#define PB_NUM_STATUS_REG (PB_STATUS_VMON_BASE + 1) + +#define PMBUS_NAME_SIZE 24 +#define PMBUS_BLOCK_READ_SIZE 32 + +struct pmbus_sensor { + struct pmbus_sensor *next; + char name[PMBUS_NAME_SIZE]; /* sysfs sensor name */ + struct device_attribute attribute; + u8 page; /* page number */ + u16 reg; /* register */ + enum pmbus_sensor_classes class; /* sensor class */ + bool update; /* runtime sensor update needed */ + int data; /* Sensor data. + Negative if there was a read error */ +}; +#define to_pmbus_sensor(_attr) \ + container_of(_attr, struct pmbus_sensor, attribute) + +struct pmbus_st { + char name[PMBUS_NAME_SIZE]; /* sysfs boolean name */ + struct sensor_device_attribute attribute; + u16 base; +}; +#define to_pmbus_status(_attr) \ + container_of(_attr, struct pmbus_st, attribute) + +struct pmbus_mfr { + struct pmbus_mfr *next; + char name[PMBUS_NAME_SIZE]; /* sysfs sensor name */ + struct device_attribute attribute; + u8 page; /* page number */ + u16 reg; /* register */ + int data; /* Sensor data. + Negative if there was a read error */ + char data_buf[PMBUS_BLOCK_READ_SIZE]; +}; +#define to_pmbus_mfr(_attr) \ + container_of(_attr, struct pmbus_mfr, attribute) + +struct pmbus_boolean { + char name[PMBUS_NAME_SIZE]; /* sysfs boolean name */ + struct sensor_device_attribute attribute; + struct pmbus_sensor *s1; + struct pmbus_sensor *s2; +}; +#define to_pmbus_boolean(_attr) \ + container_of(_attr, struct pmbus_boolean, attribute) + +struct pmbus_label { + char name[PMBUS_NAME_SIZE]; /* sysfs label name */ + struct device_attribute attribute; + char label[PMBUS_NAME_SIZE]; /* label */ +}; +#define to_pmbus_label(_attr) \ + container_of(_attr, struct pmbus_label, attribute) + +struct pmbus_data { + struct device *dev; + struct device *hwmon_dev; + + u32 flags; /* from platform data */ + + int exponent[PMBUS_PAGES]; + /* linear mode: exponent for output voltages */ + + const struct pmbus_driver_info *info; + + int max_attributes; + int num_attributes; + struct attribute_group group; + const struct attribute_group *groups[2]; + + struct pmbus_sensor *sensors; + struct pmbus_mfr *mfr; + + struct mutex update_lock; + bool valid; + unsigned long last_updated; /* in jiffies */ + + /* + * A single status register covers multiple attributes, + * so we keep them all together. + */ + u8 status[PB_NUM_STATUS_REG]; + u8 status_register; + + u8 currpage; +}; + +void pmbus_clear_cache(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + + data->valid = false; +} + +int pmbus_set_page(struct i2c_client *client, u8 page) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + int rv = 0; + int newpage; + + if (page != data->currpage) { + rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page); + newpage = i2c_smbus_read_byte_data(client, PMBUS_PAGE); + if (newpage != page) + rv = -EIO; + else + data->currpage = page; + } + return rv; +} + +int pmbus_write_byte(struct i2c_client *client, int page, u8 value) +{ + int rv; + + if (page >= 0) { + rv = pmbus_set_page(client, page); + if (rv < 0) + return rv; + } + + return i2c_smbus_write_byte(client, value); +} + +/* + * _pmbus_write_byte() is similar to pmbus_write_byte(), but checks if + * a device specific mapping function exists and calls it if necessary. + */ +static int _pmbus_write_byte(struct i2c_client *client, int page, u8 value) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + const struct pmbus_driver_info *info = data->info; + int status; + + if (info->write_byte) { + status = info->write_byte(client, page, value); + if (status != -ENODATA) + return status; + } + return pmbus_write_byte(client, page, value); +} + +int pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg, u16 word) +{ + int rv; + + rv = pmbus_set_page(client, page); + if (rv < 0) + return rv; + + return i2c_smbus_write_word_data(client, reg, word); +} + +/* + * _pmbus_write_word_data() is similar to pmbus_write_word_data(), but checks if + * a device specific mapping function exists and calls it if necessary. + */ +static int _pmbus_write_word_data(struct i2c_client *client, int page, int reg, + u16 word) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + const struct pmbus_driver_info *info = data->info; + int status; + + if (info->write_word_data) { + status = info->write_word_data(client, page, reg, word); + if (status != -ENODATA) + return status; + } + if (reg >= PMBUS_VIRT_BASE) + return -ENXIO; + return pmbus_write_word_data(client, page, reg, word); +} + +int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg) +{ + int rv; + + rv = pmbus_set_page(client, page); + if (rv < 0) + return rv; + + return i2c_smbus_read_word_data(client, reg); +} + +int pmbus_read_block_data(struct i2c_client *client, u8 reg, u8* value) +{ + return i2c_smbus_read_block_data(client, reg, value); +} + +static int _pmbus_read_block_data(struct i2c_client *client, int page, int reg, u8* value) +{ + int rv; + + rv = pmbus_set_page(client, page); + if (rv < 0) + return rv; + return pmbus_read_block_data(client, reg, value); +} + +/* + * _pmbus_read_word_data() is similar to pmbus_read_word_data(), but checks if + * a device specific mapping function exists and calls it if necessary. + */ +static int _pmbus_read_word_data(struct i2c_client *client, int page, int reg) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + const struct pmbus_driver_info *info = data->info; + int status; + + if (info->read_word_data) { + status = info->read_word_data(client, page, reg); + if (status != -ENODATA) + return status; + } + if (reg >= PMBUS_VIRT_BASE) + return -ENXIO; + return pmbus_read_word_data(client, page, reg); +} + +int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg) +{ + int rv; + + if (page >= 0) { + rv = pmbus_set_page(client, page); + if (rv < 0) + return rv; + } + + return i2c_smbus_read_byte_data(client, reg); +} + +/* + * _pmbus_read_byte_data() is similar to pmbus_read_byte_data(), but checks if + * a device specific mapping function exists and calls it if necessary. + */ +static int _pmbus_read_byte_data(struct i2c_client *client, int page, int reg) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + const struct pmbus_driver_info *info = data->info; + int status; + + if (info->read_byte_data) { + status = info->read_byte_data(client, page, reg); + if (status != -ENODATA) + return status; + } + return pmbus_read_byte_data(client, page, reg); +} + +static void pmbus_clear_fault_page(struct i2c_client *client, int page) +{ + _pmbus_write_byte(client, page, PMBUS_CLEAR_FAULTS); +} + +void pmbus_clear_faults(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + int i; + + for (i = 0; i < data->info->pages; i++) + pmbus_clear_fault_page(client, i); +} + +static int pmbus_check_status_cml(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + int status, status2; + + status = _pmbus_read_byte_data(client, -1, data->status_register); + if (status < 0 || (status & PB_STATUS_CML)) { + status2 = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML); + if (status2 < 0 || (status2 & PB_CML_FAULT_INVALID_COMMAND)) + return -EIO; + } + return 0; +} + +static bool pmbus_check_register(struct i2c_client *client, + int (*func)(struct i2c_client *client, + int page, int reg), + int page, int reg) +{ + int rv; + struct pmbus_data *data = i2c_get_clientdata(client); + + rv = func(client, page, reg); + if (rv >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK)) + rv = pmbus_check_status_cml(client); + pmbus_clear_fault_page(client, -1); + return rv >= 0; +} + +bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg) +{ + return pmbus_check_register(client, _pmbus_read_byte_data, page, reg); +} + +bool pmbus_check_word_register(struct i2c_client *client, int page, int reg) +{ + return pmbus_check_register(client, _pmbus_read_word_data, page, reg); +} + +const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + + return data->info; +} + +static struct _pmbus_status { + u32 func; + u16 base; + u16 reg; +} pmbus_status[] = { + { PMBUS_HAVE_STATUS_VOUT, PB_STATUS_VOUT_BASE, PMBUS_STATUS_VOUT }, + { PMBUS_HAVE_STATUS_IOUT, PB_STATUS_IOUT_BASE, PMBUS_STATUS_IOUT }, + { PMBUS_HAVE_STATUS_TEMP, PB_STATUS_TEMP_BASE, + PMBUS_STATUS_TEMPERATURE }, + { PMBUS_HAVE_STATUS_FAN12, PB_STATUS_FAN_BASE, PMBUS_STATUS_FAN_12 }, + { PMBUS_HAVE_STATUS_FAN34, PB_STATUS_FAN34_BASE, PMBUS_STATUS_FAN_34 }, +}; + +static struct _pmbus_status_reg { + char name[PMBUS_NAME_SIZE]; + u16 base; + u8 offset; +} pmbus_status_reg[] = { + { "vout_ov_fault", PB_STATUS_VOUT_BASE, PB_VOLTAGE_UV_FAULT}, + { "vout_uv_fault", PB_STATUS_VOUT_BASE, PB_VOLTAGE_OV_FAULT}, + { "ot_fault", PB_STATUS_TEMP_BASE, PB_TEMP_OT_FAULT}, + { "ot_warning", PB_STATUS_TEMP_BASE, PB_TEMP_OT_WARNING}, + { "vin_uv_warning", PB_STATUS_INPUT_BASE, PB_VOLTAGE_UV_WARNING}, + { "vin_uv_fault", PB_STATUS_INPUT_BASE, PB_VOLTAGE_UV_FAULT}, +}; + +static struct _pmbus_mfr_reg { + char name[PMBUS_NAME_SIZE]; + u16 reg; +} pmbus_mfr_reg[] = { + { "mfr_id", PMBUS_MFR_ID}, + { "mfr_model", PMBUS_MFR_MODEL}, + { "mfr_revision", PMBUS_MFR_REVISION}, + { "mfr_location", PMBUS_MFR_LOCATION}, + { "mfr_date", PMBUS_MFR_DATE}, + { "mfr_serial", PMBUS_MFR_SERIAL}, +}; + +static struct pmbus_data *pmbus_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct pmbus_data *data = i2c_get_clientdata(client); + const struct pmbus_driver_info *info = data->info; + struct pmbus_sensor *sensor; + struct pmbus_mfr *mfr; + + mutex_lock(&data->update_lock); + if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { + int i, j; + + for (i = 0; i < info->pages; i++) { + data->status[PB_STATUS_BASE + i] + = _pmbus_read_byte_data(client, i, + data->status_register); + for (j = 0; j < ARRAY_SIZE(pmbus_status); j++) { + struct _pmbus_status *s = &pmbus_status[j]; + + if (!(info->func[i] & s->func)) + continue; + data->status[s->base + i] + = _pmbus_read_byte_data(client, i, + s->reg); + } + } + + if (info->func[0] & PMBUS_HAVE_STATUS_INPUT) + data->status[PB_STATUS_INPUT_BASE] + = _pmbus_read_byte_data(client, 0, + PMBUS_STATUS_INPUT); + + if (info->func[0] & PMBUS_HAVE_STATUS_VMON) + data->status[PB_STATUS_VMON_BASE] + = _pmbus_read_byte_data(client, 0, + PMBUS_VIRT_STATUS_VMON); + + for (sensor = data->sensors; sensor; sensor = sensor->next) { + if (!data->valid || sensor->update) + sensor->data + = _pmbus_read_word_data(client, + sensor->page, + sensor->reg); + } + + /* read mfg data */ + for (mfr = data->mfr; mfr; mfr = mfr->next) { + mfr->data = _pmbus_read_block_data(client, mfr->page, mfr->reg, mfr->data_buf); + } + + pmbus_clear_faults(client); + data->last_updated = jiffies; + data->valid = 1; + } + mutex_unlock(&data->update_lock); + return data; +} + +/* + * Convert linear sensor values to milli- or micro-units + * depending on sensor type. + */ +static long pmbus_reg2data_linear(struct pmbus_data *data, + struct pmbus_sensor *sensor) +{ + s16 exponent; + s32 mantissa; + long val; + + if (sensor->class == PSC_VOLTAGE_OUT) { /* LINEAR16 */ + exponent = data->exponent[sensor->page]; + mantissa = (u16) sensor->data; + } else { /* LINEAR11 */ + exponent = ((s16)sensor->data) >> 11; + mantissa = ((s16)((sensor->data & 0x7ff) << 5)) >> 5; + } + + val = mantissa; + + /* scale result to milli-units for all sensors except fans */ + if (sensor->class != PSC_FAN) + val = val * 1000L; + + /* scale result to micro-units for power sensors */ + if (sensor->class == PSC_POWER) + val = val * 1000L; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +/* + * Convert direct sensor values to milli- or micro-units + * depending on sensor type. + */ +static long pmbus_reg2data_direct(struct pmbus_data *data, + struct pmbus_sensor *sensor) +{ + long val = (s16) sensor->data; + long m, b, R; + + m = data->info->m[sensor->class]; + b = data->info->b[sensor->class]; + R = data->info->R[sensor->class]; + + if (m == 0) + return 0; + + /* X = 1/m * (Y * 10^-R - b) */ + R = -R; + /* scale result to milli-units for everything but fans */ + if (sensor->class != PSC_FAN) { + R += 3; + b *= 1000; + } + + /* scale result to micro-units for power sensors */ + if (sensor->class == PSC_POWER) { + R += 3; + b *= 1000; + } + + while (R > 0) { + val *= 10; + R--; + } + while (R < 0) { + val = DIV_ROUND_CLOSEST(val, 10); + R++; + } + + return (val - b) / m; +} + +/* + * Convert VID sensor values to milli- or micro-units + * depending on sensor type. + * We currently only support VR11. + */ +static long pmbus_reg2data_vid(struct pmbus_data *data, + struct pmbus_sensor *sensor) +{ + long val = sensor->data; + + if (val < 0x02 || val > 0xb2) + return 0; + return DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100); +} + +static long pmbus_reg2data(struct pmbus_data *data, struct pmbus_sensor *sensor) +{ + long val; + + switch (data->info->format[sensor->class]) { + case direct: + val = pmbus_reg2data_direct(data, sensor); + break; + case vid: + val = pmbus_reg2data_vid(data, sensor); + break; + case linear: + default: + val = pmbus_reg2data_linear(data, sensor); + break; + } + return val; +} + +#define MAX_MANTISSA (1023 * 1000) +#define MIN_MANTISSA (511 * 1000) + +static u16 pmbus_data2reg_linear(struct pmbus_data *data, + struct pmbus_sensor *sensor, long val) +{ + s16 exponent = 0, mantissa; + bool negative = false; + + /* simple case */ + if (val == 0) + return 0; + + if (sensor->class == PSC_VOLTAGE_OUT) { + /* LINEAR16 does not support negative voltages */ + if (val < 0) + return 0; + + /* + * For a static exponents, we don't have a choice + * but to adjust the value to it. + */ + if (data->exponent[sensor->page] < 0) + val <<= -data->exponent[sensor->page]; + else + val >>= data->exponent[sensor->page]; + val = DIV_ROUND_CLOSEST(val, 1000); + return val & 0xffff; + } + + if (val < 0) { + negative = true; + val = -val; + } + + /* Power is in uW. Convert to mW before converting. */ + if (sensor->class == PSC_POWER) + val = DIV_ROUND_CLOSEST(val, 1000L); + + /* + * For simplicity, convert fan data to milli-units + * before calculating the exponent. + */ + if (sensor->class == PSC_FAN) + val = val * 1000; + + /* Reduce large mantissa until it fits into 10 bit */ + while (val >= MAX_MANTISSA && exponent < 15) { + exponent++; + val >>= 1; + } + /* Increase small mantissa to improve precision */ + while (val < MIN_MANTISSA && exponent > -15) { + exponent--; + val <<= 1; + } + + /* Convert mantissa from milli-units to units */ + mantissa = DIV_ROUND_CLOSEST(val, 1000); + + /* Ensure that resulting number is within range */ + if (mantissa > 0x3ff) + mantissa = 0x3ff; + + /* restore sign */ + if (negative) + mantissa = -mantissa; + + /* Convert to 5 bit exponent, 11 bit mantissa */ + return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800); +} + +static u16 pmbus_data2reg_direct(struct pmbus_data *data, + struct pmbus_sensor *sensor, long val) +{ + long m, b, R; + + m = data->info->m[sensor->class]; + b = data->info->b[sensor->class]; + R = data->info->R[sensor->class]; + + /* Power is in uW. Adjust R and b. */ + if (sensor->class == PSC_POWER) { + R -= 3; + b *= 1000; + } + + /* Calculate Y = (m * X + b) * 10^R */ + if (sensor->class != PSC_FAN) { + R -= 3; /* Adjust R and b for data in milli-units */ + b *= 1000; + } + val = val * m + b; + + while (R > 0) { + val *= 10; + R--; + } + while (R < 0) { + val = DIV_ROUND_CLOSEST(val, 10); + R++; + } + + return val; +} + +static u16 pmbus_data2reg_vid(struct pmbus_data *data, + struct pmbus_sensor *sensor, long val) +{ + val = clamp_val(val, 500, 1600); + + return 2 + DIV_ROUND_CLOSEST((1600 - val) * 100, 625); +} + +static u16 pmbus_data2reg(struct pmbus_data *data, + struct pmbus_sensor *sensor, long val) +{ + u16 regval; + + switch (data->info->format[sensor->class]) { + case direct: + regval = pmbus_data2reg_direct(data, sensor, val); + break; + case vid: + regval = pmbus_data2reg_vid(data, sensor, val); + break; + case linear: + default: + regval = pmbus_data2reg_linear(data, sensor, val); + break; + } + return regval; +} + +/* + * Return boolean calculated from converted data. + * defines a status register index and mask. + * The mask is in the lower 8 bits, the register index is in bits 8..23. + * + * The associated pmbus_boolean structure contains optional pointers to two + * sensor attributes. If specified, those attributes are compared against each + * other to determine if a limit has been exceeded. + * + * If the sensor attribute pointers are NULL, the function returns true if + * (status[reg] & mask) is true. + * + * If sensor attribute pointers are provided, a comparison against a specified + * limit has to be performed to determine the boolean result. + * In this case, the function returns true if v1 >= v2 (where v1 and v2 are + * sensor values referenced by sensor attribute pointers s1 and s2). + * + * To determine if an object exceeds upper limits, specify = . + * To determine if an object exceeds lower limits, specify = . + * + * If a negative value is stored in any of the referenced registers, this value + * reflects an error code which will be returned. + */ +static int pmbus_get_boolean(struct pmbus_data *data, struct pmbus_boolean *b, + int index) +{ + struct pmbus_sensor *s1 = b->s1; + struct pmbus_sensor *s2 = b->s2; + u16 reg = (index >> 8) & 0xffff; + u8 mask = index & 0xff; + int ret, status; + u8 regval; + + status = data->status[reg]; + if (status < 0) + return status; + + regval = status & mask; + if (!s1 && !s2) { + ret = !!regval; + } else if (!s1 || !s2) { + WARN(1, "Bad boolean descriptor %p: s1=%p, s2=%p\n", b, s1, s2); + return 0; + } else { + long v1, v2; + + if (s1->data < 0) + return s1->data; + if (s2->data < 0) + return s2->data; + + v1 = pmbus_reg2data(data, s1); + v2 = pmbus_reg2data(data, s2); + ret = !!(regval && v1 >= v2); + } + return ret; +} + +static ssize_t pmbus_show_boolean(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct pmbus_boolean *boolean = to_pmbus_boolean(attr); + struct pmbus_data *data = pmbus_update_device(dev); + int val; + + val = pmbus_get_boolean(data, boolean, attr->index); + if (val < 0) + return val; + return snprintf(buf, PAGE_SIZE, "%d\n", val); +} + +static ssize_t pmbus_show_sensor(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct pmbus_data *data = pmbus_update_device(dev); + struct pmbus_sensor *sensor = to_pmbus_sensor(devattr); + + if (sensor->data < 0) + return sensor->data; + + return snprintf(buf, PAGE_SIZE, "%ld\n", pmbus_reg2data(data, sensor)); +} + +static ssize_t pmbus_show_status(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_st *status = to_pmbus_status(attr); + struct pmbus_data *data = pmbus_update_device(dev); + + return snprintf(buf, PAGE_SIZE, "%u\n", !!(data->status[status->base] & attr->index)); +} + +static ssize_t pmbus_show_mfr(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct pmbus_mfr *mfr; + + pmbus_update_device(dev); + mfr = to_pmbus_mfr(devattr); + + if (mfr->data < 0) + return mfr->data; + +#if LINUX_VERSION_CODE <= KERNEL_VERSION(3,16,49) + /* mfr->data[0] is data length, we don't want show data length when show command */ + return snprintf(buf, PAGE_SIZE, "%s\n", &mfr->data_buf[1]); +#else + return snprintf(buf, PAGE_SIZE, "%s\n", &mfr->data_buf); +#endif +} + +static ssize_t pmbus_set_sensor(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct pmbus_data *data = i2c_get_clientdata(client); + struct pmbus_sensor *sensor = to_pmbus_sensor(devattr); + ssize_t rv = count; + long val = 0; + int ret; + u16 regval; + + if (kstrtol(buf, 10, &val) < 0) + return -EINVAL; + + mutex_lock(&data->update_lock); + regval = pmbus_data2reg(data, sensor, val); + ret = _pmbus_write_word_data(client, sensor->page, sensor->reg, regval); + if (ret < 0) + rv = ret; + else + sensor->data = regval; + mutex_unlock(&data->update_lock); + return rv; +} + +static ssize_t pmbus_show_label(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct pmbus_label *label = to_pmbus_label(da); + + return snprintf(buf, PAGE_SIZE, "%s\n", label->label); +} + +static int pmbus_add_attribute(struct pmbus_data *data, struct attribute *attr) +{ + if (data->num_attributes >= data->max_attributes - 1) { + int new_max_attrs = data->max_attributes + PMBUS_ATTR_ALLOC_SIZE; + void *new_attrs = krealloc(data->group.attrs, + new_max_attrs * sizeof(void *), + GFP_KERNEL); + if (!new_attrs) + return -ENOMEM; + data->group.attrs = new_attrs; + data->max_attributes = new_max_attrs; + } + + data->group.attrs[data->num_attributes++] = attr; + data->group.attrs[data->num_attributes] = NULL; + return 0; +} + +static void pmbus_dev_attr_init(struct device_attribute *dev_attr, + const char *name, + umode_t mode, + ssize_t (*show)(struct device *dev, + struct device_attribute *attr, + char *buf), + ssize_t (*store)(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count)) +{ + sysfs_attr_init(&dev_attr->attr); + dev_attr->attr.name = name; + dev_attr->attr.mode = mode; + dev_attr->show = show; + dev_attr->store = store; +} + +static void pmbus_attr_init(struct sensor_device_attribute *a, + const char *name, + umode_t mode, + ssize_t (*show)(struct device *dev, + struct device_attribute *attr, + char *buf), + ssize_t (*store)(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count), + int idx) +{ + pmbus_dev_attr_init(&a->dev_attr, name, mode, show, store); + a->index = idx; +} + +static int pmbus_add_boolean(struct pmbus_data *data, + const char *name, const char *type, int seq, + struct pmbus_sensor *s1, + struct pmbus_sensor *s2, + u16 reg, u8 mask) +{ + struct pmbus_boolean *boolean; + struct sensor_device_attribute *a; + + boolean = devm_kzalloc(data->dev, sizeof(*boolean), GFP_KERNEL); + if (!boolean) + return -ENOMEM; + + a = &boolean->attribute; + + snprintf(boolean->name, sizeof(boolean->name), "%s%d_%s", + name, seq, type); + boolean->s1 = s1; + boolean->s2 = s2; + pmbus_attr_init(a, boolean->name, S_IRUGO, pmbus_show_boolean, NULL, + (reg << 8) | mask); + + return pmbus_add_attribute(data, &a->dev_attr.attr); +} + +static struct pmbus_sensor *pmbus_add_sensor(struct pmbus_data *data, + const char *name, const char *type, + int seq, int page, int reg, + enum pmbus_sensor_classes class, + bool update, bool readonly) +{ + struct pmbus_sensor *sensor; + struct device_attribute *a; + + sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return NULL; + a = &sensor->attribute; + + snprintf(sensor->name, sizeof(sensor->name), "%s%d_%s", + name, seq, type); + sensor->page = page; + sensor->reg = reg; + sensor->class = class; + sensor->update = update; + pmbus_dev_attr_init(a, sensor->name, + readonly ? S_IRUGO : S_IRUGO | S_IWUSR, + pmbus_show_sensor, pmbus_set_sensor); + + if (pmbus_add_attribute(data, &a->attr)) + return NULL; + + sensor->next = data->sensors; + data->sensors = sensor; + + return sensor; +} + +static int pmbus_add_status(struct pmbus_data *data, + const char *name, u16 base, + u8 offset) +{ + struct pmbus_st *status; + struct sensor_device_attribute *a; + + status = devm_kzalloc(data->dev, sizeof(*status), GFP_KERNEL); + if (!status) + return -ENOMEM; + + a = &status->attribute; + + snprintf(status->name, sizeof(status->name), "%s", name); + + status->base = base; + + pmbus_attr_init(a, status->name, S_IRUGO, + pmbus_show_status, NULL, offset); + + return pmbus_add_attribute(data, &a->dev_attr.attr); +} + +static struct pmbus_mfr *pmbus_add_mfr(struct pmbus_data *data, + const char *name, + int page, int reg) +{ + struct pmbus_mfr *mfr; + struct device_attribute *a; + + mfr = devm_kzalloc(data->dev, sizeof(*mfr), GFP_KERNEL); + if (!mfr) + return NULL; + a = &mfr->attribute; + + snprintf(mfr->name, sizeof(mfr->name), "%s", name); + mfr->page = page; + mfr->reg = reg; + pmbus_dev_attr_init(a, mfr->name, S_IRUGO, + pmbus_show_mfr, NULL); + + if (pmbus_add_attribute(data, &a->attr)) + return NULL; + + mfr->next = data->mfr; + data->mfr = mfr; + + return mfr; +} + +static int pmbus_add_label(struct pmbus_data *data, + const char *name, int seq, + const char *lstring, int index) +{ + struct pmbus_label *label; + struct device_attribute *a; + + label = devm_kzalloc(data->dev, sizeof(*label), GFP_KERNEL); + if (!label) + return -ENOMEM; + + a = &label->attribute; + + snprintf(label->name, sizeof(label->name), "%s%d_label", name, seq); + if (!index) + strncpy(label->label, lstring, sizeof(label->label) - 1); + else + snprintf(label->label, sizeof(label->label), "%s%d", lstring, + index); + + pmbus_dev_attr_init(a, label->name, S_IRUGO, pmbus_show_label, NULL); + return pmbus_add_attribute(data, &a->attr); +} + +/* + * Search for attributes. Allocate sensors, booleans, and labels as needed. + */ + +/* + * The pmbus_limit_attr structure describes a single limit attribute + * and its associated alarm attribute. + */ +struct pmbus_limit_attr { + u16 reg; /* Limit register */ + u16 sbit; /* Alarm attribute status bit */ + bool update; /* True if register needs updates */ + bool low; /* True if low limit; for limits with compare + functions only */ + const char *attr; /* Attribute name */ + const char *alarm; /* Alarm attribute name */ +}; + +/* + * The pmbus_sensor_attr structure describes one sensor attribute. This + * description includes a reference to the associated limit attributes. + */ +struct pmbus_sensor_attr { + u16 reg; /* sensor register */ + u8 gbit; /* generic status bit */ + u8 nlimit; /* # of limit registers */ + enum pmbus_sensor_classes class;/* sensor class */ + const char *label; /* sensor label */ + bool paged; /* true if paged sensor */ + bool update; /* true if update needed */ + bool compare; /* true if compare function needed */ + u32 func; /* sensor mask */ + u32 sfunc; /* sensor status mask */ + int sbase; /* status base register */ + const struct pmbus_limit_attr *limit;/* limit registers */ +}; + +/* + * Add a set of limit attributes and, if supported, the associated + * alarm attributes. + * returns 0 if no alarm register found, 1 if an alarm register was found, + * < 0 on errors. + */ +static int pmbus_add_limit_attrs(struct i2c_client *client, + struct pmbus_data *data, + const struct pmbus_driver_info *info, + const char *name, int index, int page, + struct pmbus_sensor *base, + const struct pmbus_sensor_attr *attr) +{ + const struct pmbus_limit_attr *l = attr->limit; + int nlimit = attr->nlimit; + int have_alarm = 0; + int i, ret; + struct pmbus_sensor *curr; + + for (i = 0; i < nlimit; i++) { + if (pmbus_check_word_register(client, page, l->reg)) { + curr = pmbus_add_sensor(data, name, l->attr, index, + page, l->reg, attr->class, + attr->update || l->update, + false); + if (!curr) + return -ENOMEM; + if (l->sbit && (info->func[page] & attr->sfunc)) { + ret = pmbus_add_boolean(data, name, + l->alarm, index, + attr->compare ? l->low ? curr : base + : NULL, + attr->compare ? l->low ? base : curr + : NULL, + attr->sbase + page, l->sbit); + if (ret) + return ret; + have_alarm = 1; + } + } + l++; + } + return have_alarm; +} + +static int pmbus_add_sensor_attrs_one(struct i2c_client *client, + struct pmbus_data *data, + const struct pmbus_driver_info *info, + const char *name, + int index, int page, + const struct pmbus_sensor_attr *attr) +{ + struct pmbus_sensor *base; + int ret; + + if (attr->label) { + ret = pmbus_add_label(data, name, index, attr->label, + attr->paged ? page + 1 : 0); + if (ret) + return ret; + } + base = pmbus_add_sensor(data, name, "input", index, page, attr->reg, + attr->class, true, true); + if (!base) + return -ENOMEM; + if (attr->sfunc) { + ret = pmbus_add_limit_attrs(client, data, info, name, + index, page, base, attr); + if (ret < 0) + return ret; + /* + * Add generic alarm attribute only if there are no individual + * alarm attributes, if there is a global alarm bit, and if + * the generic status register for this page is accessible. + */ + if (!ret && attr->gbit && + pmbus_check_byte_register(client, page, + data->status_register)) { + ret = pmbus_add_boolean(data, name, "alarm", index, + NULL, NULL, + PB_STATUS_BASE + page, + attr->gbit); + if (ret) + return ret; + } + } + return 0; +} + +static int pmbus_add_sensor_attrs(struct i2c_client *client, + struct pmbus_data *data, + const char *name, + const struct pmbus_sensor_attr *attrs, + int nattrs) +{ + const struct pmbus_driver_info *info = data->info; + int index, i; + int ret; + + index = 1; + for (i = 0; i < nattrs; i++) { + int page, pages; + + pages = attrs->paged ? info->pages : 1; + for (page = 0; page < pages; page++) { + if (!(info->func[page] & attrs->func)) + continue; + ret = pmbus_add_sensor_attrs_one(client, data, info, + name, index, page, + attrs); + if (ret) + return ret; + index++; + } + attrs++; + } + return 0; +} + +static const struct pmbus_sensor_attr voltage_attributes[] = { + { + .reg = PMBUS_READ_VOUT, + .class = PSC_VOLTAGE_OUT, + .label = "vout", + .paged = true, + .func = PMBUS_HAVE_VOUT, + .sfunc = PMBUS_HAVE_STATUS_VOUT, + .sbase = PB_STATUS_VOUT_BASE, + .gbit = PB_STATUS_VOUT_OV, + } +}; + +static const struct pmbus_limit_attr iout_limit_attrs[] = { + { + .reg = PMBUS_IOUT_OC_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_IOUT_OC_WARNING, + }, { + .reg = PMBUS_IOUT_OC_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_IOUT_OC_FAULT, + } +}; + +static const struct pmbus_sensor_attr current_attributes[] = { + { + .reg = PMBUS_READ_IIN, + .class = PSC_CURRENT_IN, + .label = "iin", + .func = PMBUS_HAVE_IIN, + .sfunc = PMBUS_HAVE_STATUS_INPUT, + .sbase = PB_STATUS_INPUT_BASE, + }, { + .reg = PMBUS_READ_IOUT, + .class = PSC_CURRENT_OUT, + .label = "iout", + .paged = true, + .func = PMBUS_HAVE_IOUT, + .sfunc = PMBUS_HAVE_STATUS_IOUT, + .sbase = PB_STATUS_IOUT_BASE, + .gbit = PB_STATUS_IOUT_OC, + .limit = iout_limit_attrs, + .nlimit = ARRAY_SIZE(iout_limit_attrs), + } +}; + +/* Temperature atributes */ +static const struct pmbus_limit_attr temp_limit_attrs[] = { + { + .reg = PMBUS_OT_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_TEMP_OT_WARNING, + } +}; + +static const struct pmbus_limit_attr temp_limit_attrs2[] = { + { + .reg = PMBUS_OT_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_TEMP_OT_WARNING, + } +}; + +static const struct pmbus_limit_attr temp_limit_attrs3[] = { + { + .reg = PMBUS_OT_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_TEMP_OT_WARNING, + } +}; + +static const struct pmbus_sensor_attr temp_attributes[] = { + { + .reg = PMBUS_READ_TEMPERATURE_1, + .class = PSC_TEMPERATURE, + .paged = true, + .update = true, + .compare = true, + .func = PMBUS_HAVE_TEMP, + .sfunc = PMBUS_HAVE_STATUS_TEMP, + .sbase = PB_STATUS_TEMP_BASE, + .gbit = PB_STATUS_TEMPERATURE, + .limit = temp_limit_attrs, + .nlimit = ARRAY_SIZE(temp_limit_attrs), + }, { + .reg = PMBUS_READ_TEMPERATURE_2, + .class = PSC_TEMPERATURE, + .paged = true, + .update = true, + .compare = true, + .func = PMBUS_HAVE_TEMP2, + .sfunc = PMBUS_HAVE_STATUS_TEMP, + .sbase = PB_STATUS_TEMP_BASE, + .gbit = PB_STATUS_TEMPERATURE, + .limit = temp_limit_attrs2, + .nlimit = ARRAY_SIZE(temp_limit_attrs2), + }, { + .reg = PMBUS_READ_TEMPERATURE_3, + .class = PSC_TEMPERATURE, + .paged = true, + .update = true, + .compare = true, + .func = PMBUS_HAVE_TEMP3, + .sfunc = PMBUS_HAVE_STATUS_TEMP, + .sbase = PB_STATUS_TEMP_BASE, + .gbit = PB_STATUS_TEMPERATURE, + .limit = temp_limit_attrs3, + .nlimit = ARRAY_SIZE(temp_limit_attrs3), + } +}; + +static const int pmbus_fan_registers[] = { + PMBUS_READ_FAN_SPEED_1, +}; + +static const int pmbus_fan_config_registers[] = { + PMBUS_FAN_CONFIG_12, +}; + +static const int pmbus_fan_status_registers[] = { + PMBUS_STATUS_FAN_12, +}; + +static const u32 pmbus_fan_flags[] = { + PMBUS_HAVE_FAN12, +}; + +static const u32 pmbus_fan_status_flags[] = { + PMBUS_HAVE_STATUS_FAN12, +}; + +/* Fans */ +static int pmbus_add_fan_attributes(struct i2c_client *client, + struct pmbus_data *data) +{ + const struct pmbus_driver_info *info = data->info; + int index = 1; + int page; + int ret; + + for (page = 0; page < info->pages; page++) { + int f; + + for (f = 0; f < ARRAY_SIZE(pmbus_fan_registers); f++) { + int regval; + + if (!(info->func[page] & pmbus_fan_flags[f])) + break; + + if (!pmbus_check_word_register(client, page, + pmbus_fan_registers[f])) + break; + + /* + * Skip fan if not installed. + * Each fan configuration register covers multiple fans, + * so we have to do some magic. + */ + regval = _pmbus_read_byte_data(client, page, + pmbus_fan_config_registers[f]); + if (regval < 0 || + (!(regval & (PB_FAN_1_INSTALLED >> ((f & 1) * 4))))) + continue; + + if (pmbus_add_sensor(data, "fan", "input", index, + page, pmbus_fan_registers[f], + PSC_FAN, true, true) == NULL) + return -ENOMEM; + + /* + * Each fan status register covers multiple fans, + * so we have to do some magic. + */ + if ((info->func[page] & pmbus_fan_status_flags[f]) && + pmbus_check_byte_register(client, + page, pmbus_fan_status_registers[f])) { + int base; + + if (f > 1) /* fan 3, 4 */ + base = PB_STATUS_FAN34_BASE + page; + else + base = PB_STATUS_FAN_BASE + page; + ret = pmbus_add_boolean(data, "fan", + "alarm", index, NULL, NULL, base, + PB_FAN_FAN1_WARNING >> (f & 1)); + if (ret) + return ret; + ret = pmbus_add_boolean(data, "fan", + "fault", index, NULL, NULL, base, + PB_FAN_FAN1_FAULT >> (f & 1)); + if (ret) + return ret; + } + index++; + } + } + return 0; +} + +/* mfr items */ +static int pmbus_add_mfr_attributes(struct i2c_client *client, + struct pmbus_data *data) +{ + int page = 0; + int i; + + for(i = 0; i < ARRAY_SIZE(pmbus_mfr_reg);i++){ + + if (pmbus_add_mfr(data, pmbus_mfr_reg[i].name, page, pmbus_mfr_reg[i].reg) == NULL){ + return -ENOMEM; + } + } + + return 0; +} + +/* status items */ +static int pmbus_add_status_attributes(struct i2c_client *client, + struct pmbus_data *data) +{ + int i; + + for(i = 0; i < ARRAY_SIZE(pmbus_status_reg);i++){ + if (pmbus_add_status(data, pmbus_status_reg[i].name, pmbus_status_reg[i].base, pmbus_status_reg[i].offset)){ + return -ENOMEM; + } + } + + return 0; +} + +static int pmbus_find_attributes(struct i2c_client *client, + struct pmbus_data *data) +{ + int ret; + + /* Voltage sensors */ + ret = pmbus_add_sensor_attrs(client, data, "in", voltage_attributes, + ARRAY_SIZE(voltage_attributes)); + if (ret) + return ret; + + /* Current sensors */ + ret = pmbus_add_sensor_attrs(client, data, "curr", current_attributes, + ARRAY_SIZE(current_attributes)); + if (ret) + return ret; + + /* Temperature sensors */ + ret = pmbus_add_sensor_attrs(client, data, "temp", temp_attributes, + ARRAY_SIZE(temp_attributes)); + if (ret) + return ret; + + /* Fans */ + ret = pmbus_add_fan_attributes(client, data); + if (ret) + return ret; + + /* mfr data */ + ret = pmbus_add_mfr_attributes(client, data); + if (ret) + return ret; + + /* status data */ + ret = pmbus_add_status_attributes(client, data); + return ret; +} + +/* + * Identify chip parameters. + * This function is called for all chips. + */ +static int pmbus_identify_common(struct i2c_client *client, + struct pmbus_data *data, int page) +{ + int vout_mode = -1; + + if (pmbus_check_byte_register(client, page, PMBUS_VOUT_MODE)) + vout_mode = _pmbus_read_byte_data(client, page, + PMBUS_VOUT_MODE); + if (vout_mode >= 0 && vout_mode != 0xff) { + /* + * Not all chips support the VOUT_MODE command, + * so a failure to read it is not an error. + */ + switch (vout_mode >> 5) { + case 0: /* linear mode */ + if (data->info->format[PSC_VOLTAGE_OUT] != linear) + return -ENODEV; + + data->exponent[page] = ((s8)(vout_mode << 3)) >> 3; + break; + case 1: /* VID mode */ + if (data->info->format[PSC_VOLTAGE_OUT] != vid) + return -ENODEV; + break; + case 2: /* direct mode */ + if (data->info->format[PSC_VOLTAGE_OUT] != direct) + return -ENODEV; + break; + default: + return -ENODEV; + } + } + + pmbus_clear_fault_page(client, page); + return 0; +} + +static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data, + struct pmbus_driver_info *info) +{ + struct device *dev = &client->dev; + int page, ret; + + /* + * Some PMBus chips don't support PMBUS_STATUS_BYTE, so try + * to use PMBUS_STATUS_WORD instead if that is the case. + * Bail out if both registers are not supported. + */ + data->status_register = PMBUS_STATUS_BYTE; + ret = i2c_smbus_read_byte_data(client, PMBUS_STATUS_BYTE); + if (ret < 0 || ret == 0xff) { + data->status_register = PMBUS_STATUS_WORD; + ret = i2c_smbus_read_word_data(client, PMBUS_STATUS_WORD); + if (ret < 0 || ret == 0xffff) { + dev_err(dev, "PMBus status register not found\n"); + return -ENODEV; + } + } + + pmbus_clear_faults(client); + + if (info->identify) { + ret = (*info->identify)(client, info); + if (ret < 0) { + dev_err(dev, "Chip identification failed\n"); + return ret; + } + } + + if (info->pages <= 0 || info->pages > PMBUS_PAGES) { + dev_err(dev, "Bad number of PMBus pages: %d\n", info->pages); + return -ENODEV; + } + + /* Current only using page 1 in BMS project */ + info->pages = 1; + + for (page = 0; page < info->pages; page++) { + ret = pmbus_identify_common(client, data, page); + if (ret < 0) { + dev_err(dev, "Failed to identify chip capabilities\n"); + return ret; + } + } + return 0; +} + +int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, + struct pmbus_driver_info *info) +{ + struct device *dev = &client->dev; + const struct pmbus_platform_data *pdata = dev_get_platdata(dev); + struct pmbus_data *data; + int ret; + + if (!info) + return -ENODEV; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_BYTE + | I2C_FUNC_SMBUS_BYTE_DATA + | I2C_FUNC_SMBUS_WORD_DATA)) + return -ENODEV; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->dev = dev; + + if (pdata) + data->flags = pdata->flags; + data->info = info; + + ret = pmbus_init_common(client, data, info); + if (ret < 0) + return ret; + + ret = pmbus_find_attributes(client, data); + if (ret) + goto out_kfree; + + /* + * If there are no attributes, something is wrong. + * Bail out instead of trying to register nothing. + */ + if (!data->num_attributes) { + dev_err(dev, "No attributes found\n"); + ret = -ENODEV; + goto out_kfree; + } + + data->groups[0] = &data->group; + data->hwmon_dev = hwmon_device_register_with_groups(dev, client->name, + data, data->groups); + if (IS_ERR(data->hwmon_dev)) { + ret = PTR_ERR(data->hwmon_dev); + dev_err(dev, "Failed to register hwmon device\n"); + goto out_kfree; + } + return 0; + +out_kfree: + kfree(data->group.attrs); + return ret; +} + +int pmbus_do_remove(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + kfree(data->group.attrs); + return 0; +} + + +/* + * Find sensor groups and status registers on each page. + */ +static void pmbus_find_sensor_groups(struct i2c_client *client, + struct pmbus_driver_info *info) +{ + int page; + + /* Sensors detected on page 0 only */ + if (pmbus_check_word_register(client, 0, PMBUS_READ_VIN)) + info->func[0] |= PMBUS_HAVE_VIN; + if (pmbus_check_word_register(client, 0, PMBUS_READ_VCAP)) + info->func[0] |= PMBUS_HAVE_VCAP; + if (pmbus_check_word_register(client, 0, PMBUS_READ_IIN)) + info->func[0] |= PMBUS_HAVE_IIN; + if (pmbus_check_word_register(client, 0, PMBUS_READ_PIN)) + info->func[0] |= PMBUS_HAVE_PIN; + if (info->func[0] + && pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT)) + info->func[0] |= PMBUS_HAVE_STATUS_INPUT; + if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_12) && + pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) { + info->func[0] |= PMBUS_HAVE_FAN12; + if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12)) + info->func[0] |= PMBUS_HAVE_STATUS_FAN12; + } + if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_34) && + pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) { + info->func[0] |= PMBUS_HAVE_FAN34; + if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34)) + info->func[0] |= PMBUS_HAVE_STATUS_FAN34; + } + if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1)) + info->func[0] |= PMBUS_HAVE_TEMP; + if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_2)) + info->func[0] |= PMBUS_HAVE_TEMP2; + if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_3)) + info->func[0] |= PMBUS_HAVE_TEMP3; + if (info->func[0] & (PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 + | PMBUS_HAVE_TEMP3) + && pmbus_check_byte_register(client, 0, + PMBUS_STATUS_TEMPERATURE)) + info->func[0] |= PMBUS_HAVE_STATUS_TEMP; + + /* Sensors detected on all pages */ + for (page = 0; page < info->pages; page++) { + if (pmbus_check_word_register(client, page, PMBUS_READ_VOUT)) { + info->func[page] |= PMBUS_HAVE_VOUT; + if (pmbus_check_byte_register(client, page, + PMBUS_STATUS_VOUT)) + info->func[page] |= PMBUS_HAVE_STATUS_VOUT; + } + if (pmbus_check_word_register(client, page, PMBUS_READ_IOUT)) { + info->func[page] |= PMBUS_HAVE_IOUT; + if (pmbus_check_byte_register(client, 0, + PMBUS_STATUS_IOUT)) + info->func[page] |= PMBUS_HAVE_STATUS_IOUT; + } + if (pmbus_check_word_register(client, page, PMBUS_READ_POUT)) + info->func[page] |= PMBUS_HAVE_POUT; + } +} + +/* + * Identify chip parameters. + */ +static int pmbus_identify(struct i2c_client *client, + struct pmbus_driver_info *info) +{ + int ret = 0; + + if (!info->pages) { + /* + * Check if the PAGE command is supported. If it is, + * keep setting the page number until it fails or until the + * maximum number of pages has been reached. Assume that + * this is the number of pages supported by the chip. + */ + if (pmbus_check_byte_register(client, 0, PMBUS_PAGE)) { + int page; + + for (page = 1; page < PMBUS_PAGES; page++) { + if (pmbus_set_page(client, page) < 0) + break; + } + pmbus_set_page(client, 0); + info->pages = page; + } else { + info->pages = 1; + } + } + + if (pmbus_check_byte_register(client, 0, PMBUS_VOUT_MODE)) { + int vout_mode; + + vout_mode = pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE); + if (vout_mode >= 0 && vout_mode != 0xff) { + switch (vout_mode >> 5) { + case 0: + break; + case 1: + info->format[PSC_VOLTAGE_OUT] = vid; + break; + case 2: + info->format[PSC_VOLTAGE_OUT] = direct; + break; + default: + ret = -ENODEV; + goto abort; + } + } + } + + /* + * We should check if the COEFFICIENTS register is supported. + * If it is, and the chip is configured for direct mode, we can read + * the coefficients from the chip, one set per group of sensor + * registers. + * + * To do this, we will need access to a chip which actually supports the + * COEFFICIENTS command, since the command is too complex to implement + * without testing it. Until then, abort if a chip configured for direct + * mode was detected. + */ + if (info->format[PSC_VOLTAGE_OUT] == direct) { + ret = -ENODEV; + goto abort; + } + + /* Try to find sensor groups */ + pmbus_find_sensor_groups(client, info); +abort: + return ret; +} + +static int pmbus_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct pmbus_driver_info *info; + + info = devm_kzalloc(&client->dev, sizeof(struct pmbus_driver_info), + GFP_KERNEL); + if (!info) + return -ENOMEM; + + info->pages = id->driver_data; + info->identify = pmbus_identify; + + return pmbus_do_probe(client, id, info); +} + +/* + * Use driver_data to set the number of pages supported by the chip. + */ +static const struct i2c_device_id pmbus_id[] = { + {"fse000", 0}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, pmbus_id); + +/* This is the driver that will be inserted */ +static struct i2c_driver pmbus_driver = { + .driver = { + .name = "fse000", + }, + .probe = pmbus_probe, + .remove = pmbus_do_remove, + .id_table = pmbus_id, +}; + +module_i2c_driver(pmbus_driver); + +MODULE_DESCRIPTION("mitac_ly1200_32x_fse000 driver"); +MODULE_AUTHOR("Eddy Weng "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_gpe.c b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_gpe.c new file mode 100644 index 00000000000..3ced2b0a399 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_gpe.c @@ -0,0 +1,93 @@ +#include +#include + +#define BMS_GPE_CLASS "bms_acpi" +#define BMS_GPE_DRIVER_NAME "bms_gpe" +#define BMS_GPE_DEVICE_NAME "bms_acpi_gpe" + +static int bms_gpe[] = {0x01, 0x02, 0x47}; +static int bms_gpe_num = sizeof(bms_gpe) / sizeof(bms_gpe[0]); + +static u32 bms_gpe_handler(acpi_handle handle, u32 gpe_num, void *context) +{ + struct acpi_device *device = context; + + acpi_bus_generate_netlink_event(device->pnp.device_class,dev_name(&device->dev), + gpe_num, 0); + return ACPI_INTERRUPT_HANDLED; /* GPE will be disable afterward */ +} + +static int bms_gpe_add(struct acpi_device *device) +{ + acpi_status status; + int i = 0; + char info_str[60] = { 0 }; + char temp[6] = { 0 }; + + if (!device) { + printk("No device of BMS GPE\n"); + return -EINVAL; + } + + strcpy(acpi_device_name(device), BMS_GPE_DEVICE_NAME); + strcpy(acpi_device_class(device), BMS_GPE_CLASS); + + strncat(info_str, "Initialized GPE list = ", 23); + for (i = 0; i < bms_gpe_num; i++) { + status = acpi_install_gpe_handler(NULL, bms_gpe[i], + ACPI_GPE_LEVEL_TRIGGERED, + &bms_gpe_handler, device); + if (status != AE_OK) { + printk("Fail to claim BMS GPE%X (code:0x%X)\n",bms_gpe[i],status); + return -EINVAL; + } + snprintf(temp, sizeof(temp), "0x%.2X ", bms_gpe[i]); + strncat(info_str, temp, 6); + } + + dev_info(&device->dev, "%s.\n", info_str); + + return 0; +} + +static int bms_gpe_remove(struct acpi_device *device) +{ + int i = 0; + for (i = 0; i < bms_gpe_num; i++) { + acpi_remove_gpe_handler(NULL, bms_gpe[i], &bms_gpe_handler); + } + return 0; +} + +static const struct acpi_device_id bms_acpi_device_ids[] = { + { "PNP0C01", 0 }, + { /* END OF LIST */ } +}; + +static struct acpi_driver bms_gpe_driver = { + .name = BMS_GPE_DRIVER_NAME, + .class = BMS_GPE_CLASS, + .ids = bms_acpi_device_ids, + .ops = { + .add = bms_gpe_add, + .remove = bms_gpe_remove, + }, +}; + +static int __init bms_gpe_init(void) +{ + printk(KERN_INFO "%s: init.\n", __FUNCTION__); + return acpi_bus_register_driver(&bms_gpe_driver); +} + +static void __exit bms_gpe_exit(void) +{ + printk(KERN_INFO "%s: exit.\n", __FUNCTION__); + acpi_bus_unregister_driver(&bms_gpe_driver); +} + +module_init(bms_gpe_init); +module_exit(bms_gpe_exit); +MODULE_AUTHOR("Yencheng Lin "); +MODULE_DESCRIPTION("mitac_ly1200_32x_gpe driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_master_cpld.c b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_master_cpld.c new file mode 100644 index 00000000000..921a2ea424a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_master_cpld.c @@ -0,0 +1,503 @@ +#include +#include + +#include "master_cpld_reg.h" +#include "master_cpld_sysfs.h" + +static int debug_flag = 0; + +struct master_cpld_data { + struct mutex lock; + + struct i2c_client *client; + struct device_attribute bin; +}; + + +static const struct i2c_device_id master_cpld_ids[] = { + { "master_cpld", 0 }, + { /* END OF LIST */ } +}; +MODULE_DEVICE_TABLE(i2c, master_cpld_ids); + +static int master_cpld_raw_read(struct device *dev, struct device_attribute *attr, char *buf, + int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name){ + unsigned int reg_val = 0, fld_val; + static int debug_flag; + struct master_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int err; + + if (reg_width != 8){ + printk("%s: Register table width setting failed.\n", reg_name); + return -EINVAL; + } + mutex_lock(&data->lock); + if ((err = i2c_smbus_read_byte_data(client, (u8)reg_offset)) < 0) { + /* CPLD read error condition */; + mutex_unlock(&data->lock); + printk("%s: i2c read failed, error code = %d.\n", reg_name, err); + return err; + } + reg_val = err; + if (debug_flag) { + printk("%s: reg_offset = %d, width = %d, cur value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val); + } + mutex_unlock(&data->lock); + if (fld_width == reg_width) {fld_val = reg_val & fld_mask;} + else {fld_val = (reg_val >> fld_shift) & fld_mask;} + return sprintf(buf, "0x%x\n", fld_val); +} + +static int master_cpld_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count, + int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name){ + int ret_code; + unsigned int reg_val, fld_val; + unsigned long val; + static int debug_flag; + struct master_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + if (reg_width != 8){ + printk("%s: Register table width setting failed.\n", reg_name); + return -EINVAL; + } + /* Parse buf and store to fld_val */ + if ((ret_code = kstrtoul(buf, 16, &val))){ + printk("%s: Conversion value = %s failed, errno = %d.\n", reg_name, buf, ret_code); + return ret_code; + } + fld_val = (unsigned int)val; + mutex_lock(&data->lock); + if ((ret_code = i2c_smbus_read_byte_data(client, (u8)reg_offset)) < 0) { + /* Handle CPLD read error condition */; + mutex_unlock(&data->lock); + printk("%s: i2c read failed, error code = %d.\n", reg_name, ret_code); + return ret_code; + } + reg_val = ret_code; + if (debug_flag) { + printk("%s: offset = %d, width = %d, cur value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val); + } + if (fld_width == reg_width) {reg_val = fld_val & fld_mask;} + else {reg_val = (reg_val & ~(fld_mask << fld_shift)) | + ((fld_val & (fld_mask)) << fld_shift);} + if ((ret_code = i2c_smbus_write_byte_data(client, (u8)reg_offset, (u8)reg_val)) != 0) { + /* Handle CPLD write error condition */; + mutex_unlock(&data->lock); + printk("%s: i2c write failed, error code = %d.\n", reg_name, ret_code); + return ret_code; + } + else if (debug_flag) { + printk("%s: offset = %d, width = %d, new value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val); + } + mutex_unlock(&data->lock); + return count; +} + +/*--------------------special file for debug---------------------- */ +static ssize_t master_cpld_debug_read(struct device *dev, struct device_attribute *attr, + char *buf){ + + return sprintf(buf, "%d\n", debug_flag); +} + + +static ssize_t master_cpld_debug_write(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + int temp; + int error; + + error = kstrtoint(buf, 10, &temp); + if (error){ + printk(KERN_INFO "%s: Conversion value = %s failed.\n", __FUNCTION__, buf); + return count; + } + debug_flag = temp; + + if(debug_flag) + printk("%s, debug_flag = %d\n", __FUNCTION__, debug_flag); + + return count; +} +SYSFS_MISC_RW_ATTR_DEF(debug, master_cpld_debug_read, master_cpld_debug_write) + + + + +/* ----------------define port group---------------------------- */ +static struct attribute *port1_attributes[] = { + SYSFS_ATTR_PTR(port1_present), /* register: zqsfp28_present_8_1_status */ + SYSFS_ATTR_PTR(port1_rst), /* register: zqsfp28_rst_8_1 */ + SYSFS_ATTR_PTR(port1_modsel), /* register: zqsfp28_modsel_8_1 */ + SYSFS_ATTR_PTR(port1_lpmode), /* register: zqsfp28_lpmode_8_1 */ + SYSFS_ATTR_PTR(port1_irq_status), /* register: zqsfp28_irq_8_1_status */ + SYSFS_ATTR_PTR(port1_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */ + NULL +}; + + +static struct attribute *port2_attributes[] = { + SYSFS_ATTR_PTR(port2_present), /* register: zqsfp28_present_8_1_status */ + SYSFS_ATTR_PTR(port2_rst), /* register: zqsfp28_rst_8_1 */ + SYSFS_ATTR_PTR(port2_modsel), /* register: zqsfp28_modsel_8_1 */ + SYSFS_ATTR_PTR(port2_lpmode), /* register: zqsfp28_lpmode_8_1 */ + SYSFS_ATTR_PTR(port2_irq_status), /* register: zqsfp28_irq_8_1_status */ + SYSFS_ATTR_PTR(port2_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */ + NULL +}; + + +static struct attribute *port3_attributes[] = { + SYSFS_ATTR_PTR(port3_present), /* register: zqsfp28_present_8_1_status */ + SYSFS_ATTR_PTR(port3_rst), /* register: zqsfp28_rst_8_1 */ + SYSFS_ATTR_PTR(port3_modsel), /* register: zqsfp28_modsel_8_1 */ + SYSFS_ATTR_PTR(port3_lpmode), /* register: zqsfp28_lpmode_8_1 */ + SYSFS_ATTR_PTR(port3_irq_status), /* register: zqsfp28_irq_8_1_status */ + SYSFS_ATTR_PTR(port3_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */ + NULL +}; + +static struct attribute *port4_attributes[] = { + SYSFS_ATTR_PTR(port4_present), /* register: zqsfp28_present_8_1_status */ + SYSFS_ATTR_PTR(port4_rst), /* register: zqsfp28_rst_8_1 */ + SYSFS_ATTR_PTR(port4_modsel), /* register: zqsfp28_modsel_8_1 */ + SYSFS_ATTR_PTR(port4_lpmode), /* register: zqsfp28_lpmode_8_1 */ + SYSFS_ATTR_PTR(port4_irq_status), /* register: zqsfp28_irq_8_1_status */ + SYSFS_ATTR_PTR(port4_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */ + NULL +}; + +static struct attribute *port5_attributes[] = { + SYSFS_ATTR_PTR(port5_present), /* register: zqsfp28_present_8_1_status */ + SYSFS_ATTR_PTR(port5_rst), /* register: zqsfp28_rst_8_1 */ + SYSFS_ATTR_PTR(port5_modsel), /* register: zqsfp28_modsel_8_1 */ + SYSFS_ATTR_PTR(port5_lpmode), /* register: zqsfp28_lpmode_8_1 */ + SYSFS_ATTR_PTR(port5_irq_status), /* register: zqsfp28_irq_8_1_status */ + SYSFS_ATTR_PTR(port5_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */ + NULL +}; + +static struct attribute *port6_attributes[] = { + SYSFS_ATTR_PTR(port6_present), /* register: zqsfp28_present_8_1_status */ + SYSFS_ATTR_PTR(port6_rst), /* register: zqsfp28_rst_8_1 */ + SYSFS_ATTR_PTR(port6_modsel), /* register: zqsfp28_modsel_8_1 */ + SYSFS_ATTR_PTR(port6_lpmode), /* register: zqsfp28_lpmode_8_1 */ + SYSFS_ATTR_PTR(port6_irq_status), /* register: zqsfp28_irq_8_1_status */ + SYSFS_ATTR_PTR(port6_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */ + NULL +}; + +static struct attribute *port7_attributes[] = { + SYSFS_ATTR_PTR(port7_present), /* register: zqsfp28_present_8_1_status */ + SYSFS_ATTR_PTR(port7_rst), /* register: zqsfp28_rst_8_1 */ + SYSFS_ATTR_PTR(port7_modsel), /* register: zqsfp28_modsel_8_1 */ + SYSFS_ATTR_PTR(port7_lpmode), /* register: zqsfp28_lpmode_8_1 */ + SYSFS_ATTR_PTR(port7_irq_status), /* register: zqsfp28_irq_8_1_status */ + SYSFS_ATTR_PTR(port7_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */ + NULL +}; + +static struct attribute *port8_attributes[] = { + SYSFS_ATTR_PTR(port8_present), /* register: zqsfp28_present_8_1_status */ + SYSFS_ATTR_PTR(port8_rst), /* register: zqsfp28_rst_8_1 */ + SYSFS_ATTR_PTR(port8_modsel), /* register: zqsfp28_modsel_8_1 */ + SYSFS_ATTR_PTR(port8_lpmode), /* register: zqsfp28_lpmode_8_1 */ + SYSFS_ATTR_PTR(port8_irq_status), /* register: zqsfp28_irq_8_1_status */ + SYSFS_ATTR_PTR(port8_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */ + NULL +}; + +static struct attribute *port9_attributes[] = { + SYSFS_ATTR_PTR(port9_present), /* register: zqsfp28_present_16_9_status */ + SYSFS_ATTR_PTR(port9_rst), /* register: zqsfp28_rst_16_9 */ + SYSFS_ATTR_PTR(port9_modsel), /* register: zqsfp28_modsel_16_9 */ + SYSFS_ATTR_PTR(port9_lpmode), /* register: zqsfp28_lpmode_16_9 */ + SYSFS_ATTR_PTR(port9_irq_status), /* register: zqsfp28_irq_16_9_status */ + SYSFS_ATTR_PTR(port9_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */ + NULL +}; + +static struct attribute *port10_attributes[] = { + SYSFS_ATTR_PTR(port10_present), /* register: zqsfp28_present_16_9_status */ + SYSFS_ATTR_PTR(port10_rst), /* register: zqsfp28_rst_16_9 */ + SYSFS_ATTR_PTR(port10_modsel), /* register: zqsfp28_modsel_16_9 */ + SYSFS_ATTR_PTR(port10_lpmode), /* register: zqsfp28_lpmode_16_9 */ + SYSFS_ATTR_PTR(port10_irq_status), /* register: zqsfp28_irq_16_9_status */ + SYSFS_ATTR_PTR(port10_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */ + NULL +}; + +static struct attribute *port11_attributes[] = { + SYSFS_ATTR_PTR(port11_present), /* register: zqsfp28_present_16_9_status */ + SYSFS_ATTR_PTR(port11_rst), /* register: zqsfp28_rst_16_9 */ + SYSFS_ATTR_PTR(port11_modsel), /* register: zqsfp28_modsel_16_9 */ + SYSFS_ATTR_PTR(port11_lpmode), /* register: zqsfp28_lpmode_16_9 */ + SYSFS_ATTR_PTR(port11_irq_status), /* register: zqsfp28_irq_16_9_status */ + SYSFS_ATTR_PTR(port11_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */ + NULL +}; + +static struct attribute *port12_attributes[] = { + SYSFS_ATTR_PTR(port12_present), /* register: zqsfp28_present_16_9_status */ + SYSFS_ATTR_PTR(port12_rst), /* register: zqsfp28_rst_16_9 */ + SYSFS_ATTR_PTR(port12_modsel), /* register: zqsfp28_modsel_16_9 */ + SYSFS_ATTR_PTR(port12_lpmode), /* register: zqsfp28_lpmode_16_9 */ + SYSFS_ATTR_PTR(port12_irq_status), /* register: zqsfp28_irq_16_9_status */ + SYSFS_ATTR_PTR(port12_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */ + NULL +}; + +static struct attribute *port13_attributes[] = { + SYSFS_ATTR_PTR(port13_present), /* register: zqsfp28_present_16_9_status */ + SYSFS_ATTR_PTR(port13_rst), /* register: zqsfp28_rst_16_9 */ + SYSFS_ATTR_PTR(port13_modsel), /* register: zqsfp28_modsel_16_9 */ + SYSFS_ATTR_PTR(port13_lpmode), /* register: zqsfp28_lpmode_16_9 */ + SYSFS_ATTR_PTR(port13_irq_status), /* register: zqsfp28_irq_16_9_status */ + SYSFS_ATTR_PTR(port13_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */ + NULL +}; + +static struct attribute *port14_attributes[] = { + SYSFS_ATTR_PTR(port14_present), /* register: zqsfp28_present_16_9_status */ + SYSFS_ATTR_PTR(port14_rst), /* register: zqsfp28_rst_16_9 */ + SYSFS_ATTR_PTR(port14_modsel), /* register: zqsfp28_modsel_16_9 */ + SYSFS_ATTR_PTR(port14_lpmode), /* register: zqsfp28_lpmode_16_9 */ + SYSFS_ATTR_PTR(port14_irq_status), /* register: zqsfp28_irq_16_9_status */ + SYSFS_ATTR_PTR(port14_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */ + NULL +}; + +static struct attribute *port15_attributes[] = { + SYSFS_ATTR_PTR(port15_present), /* register: zqsfp28_present_16_9_status */ + SYSFS_ATTR_PTR(port15_rst), /* register: zqsfp28_rst_16_9 */ + SYSFS_ATTR_PTR(port15_modsel), /* register: zqsfp28_modsel_16_9 */ + SYSFS_ATTR_PTR(port15_lpmode), /* register: zqsfp28_lpmode_16_9 */ + SYSFS_ATTR_PTR(port15_irq_status), /* register: zqsfp28_irq_16_9_status */ + SYSFS_ATTR_PTR(port15_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */ + NULL +}; + +static struct attribute *port16_attributes[] = { + SYSFS_ATTR_PTR(port16_present), /* register: zqsfp28_present_16_9_status */ + SYSFS_ATTR_PTR(port16_rst), /* register: zqsfp28_rst_16_9 */ + SYSFS_ATTR_PTR(port16_modsel), /* register: zqsfp28_modsel_16_9 */ + SYSFS_ATTR_PTR(port16_lpmode), /* register: zqsfp28_lpmode_16_9 */ + SYSFS_ATTR_PTR(port16_irq_status), /* register: zqsfp28_irq_16_9_status */ + SYSFS_ATTR_PTR(port16_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */ + NULL +}; + + +static const struct attribute_group master_cpld_port_group[] = { + {.attrs = port1_attributes, + .name = "port1",}, + {.attrs = port2_attributes, + .name = "port2",}, + {.attrs = port3_attributes, + .name = "port3",}, + {.attrs = port4_attributes, + .name = "port4",}, + {.attrs = port5_attributes, + .name = "port5",}, + {.attrs = port6_attributes, + .name = "port6",}, + {.attrs = port7_attributes, + .name = "port7",}, + {.attrs = port8_attributes, + .name = "port8",}, + {.attrs = port9_attributes, + .name = "port9",}, + {.attrs = port10_attributes, + .name = "port10",}, + {.attrs = port11_attributes, + .name = "port11",}, + {.attrs = port12_attributes, + .name = "port12",}, + {.attrs = port13_attributes, + .name = "port13",}, + {.attrs = port14_attributes, + .name = "port14",}, + {.attrs = port15_attributes, + .name = "port15",}, + {.attrs = port16_attributes, + .name = "port16",} +}; + +/* ----------------define misc group---------------------------- */ +static struct attribute *misc_attributes[] = { + SYSFS_ATTR_PTR(mjr_rev), /* register: mstr_cpld_rev */ + SYSFS_ATTR_PTR(mnr_rev), /* register: mstr_cpld_rev */ + + SYSFS_ATTR_PTR(scrtch_reg), /* register: mstr_cpld_gpr */ + + SYSFS_ATTR_PTR(brd_rev), /* register: mb_brd_rev_type */ + SYSFS_ATTR_PTR(brd_type), /* register: mb_brd_rev_type */ + + SYSFS_ATTR_PTR(mb_rst), /* register: mstr_srr */ + SYSFS_ATTR_PTR(npu_rst), /* register: mstr_srr */ + SYSFS_ATTR_PTR(mgmt_phy_rst), /* register: mstr_srr */ + + SYSFS_ATTR_PTR(mb_eeprom_wp), /* register: eeprom_wp */ + SYSFS_ATTR_PTR(cpld_spi_wp), /* register: eeprom_wp */ + SYSFS_ATTR_PTR(fan_eeprom_wp), /* register: eeprom_wp */ + + SYSFS_ATTR_PTR(ps2_int_msk), /* register: mstr_irq */ + SYSFS_ATTR_PTR(ps1_int_msk), /* register: mstr_irq */ + SYSFS_ATTR_PTR(usb_fault_msk), /* register: mstr_irq */ + SYSFS_ATTR_PTR(pcie_int_msk), /* register: mstr_irq */ + SYSFS_ATTR_PTR(fan_alert_int_msk), /* register: mstr_irq */ + SYSFS_ATTR_PTR(usb_fault), /* register: mstr_irq */ + SYSFS_ATTR_PTR(pcie_int), /* register: mstr_irq */ + SYSFS_ATTR_PTR(fan_alert_int), /* register: mstr_irq */ + SYSFS_ATTR_PTR(system_led_fld), /* register: mstr_irq */ + SYSFS_ATTR_PTR(power_led), /* register: mstr_irq */ + SYSFS_ATTR_PTR(fan_led), /* register: mstr_irq */ + SYSFS_ATTR_PTR(locate_led), /* register: mstr_irq */ + + SYSFS_ATTR_PTR(led_test), /* register: fan_tray_3_1_led */ + SYSFS_ATTR_PTR(fan_tray3_led), /* register: fan_tray_3_1_led */ + SYSFS_ATTR_PTR(fan_tray2_led), /* register: fan_tray_3_1_led */ + SYSFS_ATTR_PTR(fan_tray1_led), /* register: fan_tray_3_1_led */ + SYSFS_ATTR_PTR(fan_tray6_led), /* register: fan_tray_6_4_led */ + SYSFS_ATTR_PTR(fan_tray5_led), /* register: fan_tray_6_4_led */ + SYSFS_ATTR_PTR(fan_tray4_led), /* register: fan_tray_6_4_led */ + + SYSFS_ATTR_PTR(fan_tray6_present), /* register: fan_tray_status */ + SYSFS_ATTR_PTR(fan_tray5_present), /* register: fan_tray_status */ + SYSFS_ATTR_PTR(fan_tray4_present), /* register: fan_tray_status */ + SYSFS_ATTR_PTR(fan_tray3_present), /* register: fan_tray_status */ + SYSFS_ATTR_PTR(fan_tray2_present), /* register: fan_tray_status */ + SYSFS_ATTR_PTR(fan_tray1_present), /* register: fan_tray_status */ + + SYSFS_ATTR_PTR(fan_type6), /* register: fan_type_status */ + SYSFS_ATTR_PTR(fan_type5), /* register: fan_type_status */ + SYSFS_ATTR_PTR(fan_type4), /* register: fan_type_status */ + SYSFS_ATTR_PTR(fan_type3), /* register: fan_type_status */ + SYSFS_ATTR_PTR(fan_type2), /* register: fan_type_status */ + SYSFS_ATTR_PTR(fan_type1), /* register: fan_type_status */ + + SYSFS_ATTR_PTR(ps1_ps), /* register: psu_en_status */ + SYSFS_ATTR_PTR(ps1_pg), /* register: psu_en_status */ + SYSFS_ATTR_PTR(ps1_int), /* register: psu_en_status */ + SYSFS_ATTR_PTR(ps1_on), /* register: psu_en_status */ + SYSFS_ATTR_PTR(ps2_ps), /* register: psu_en_status */ + SYSFS_ATTR_PTR(ps2_pg), /* register: psu_en_status */ + SYSFS_ATTR_PTR(ps2_int), /* register: psu_en_status */ + SYSFS_ATTR_PTR(ps2_on), /* register: psu_en_status */ + + SYSFS_ATTR_PTR(usb1_vbus_en), /* register: mb_pwr_en_status */ + SYSFS_ATTR_PTR(v5p0_en), /* register: mb_pwr_en_status */ + SYSFS_ATTR_PTR(v3p3_en), /* register: mb_pwr_en_status */ + SYSFS_ATTR_PTR(vcc_1v8_en), /* register: mb_pwr_en_status */ + SYSFS_ATTR_PTR(mac_avs1v_en), /* register: mb_pwr_en_status */ + SYSFS_ATTR_PTR(mac1v_en), /* register: mb_pwr_en_status */ + SYSFS_ATTR_PTR(vcc_1v25_en), /* register: mb_pwr_en_status */ + + SYSFS_ATTR_PTR(vcc_3p3_cpld), /* register: mb_pwr_status */ + SYSFS_ATTR_PTR(vcc5v_pg), /* register: mb_pwr_status */ + SYSFS_ATTR_PTR(vcc3v3_pg), /* register: mb_pwr_status */ + SYSFS_ATTR_PTR(vcc_1v8_pg), /* register: mb_pwr_status */ + SYSFS_ATTR_PTR(mac_avs1v_pg), /* register: mb_pwr_status */ + SYSFS_ATTR_PTR(mac1v_pg), /* register: mb_pwr_status */ + SYSFS_ATTR_PTR(vcc_1v25_pg), /* register: mb_pwr_status */ + + SYSFS_ATTR_PTR(port_1_8_present), /* register: zqsfp28_present_8_1_status */ + SYSFS_ATTR_PTR(port_9_16_present), /* register: zqsfp28_present_16_9_status */ + SYSFS_ATTR_PTR(port_1_8_rst), /* register: zqsfp28_rst_8_1 */ + SYSFS_ATTR_PTR(port_9_16_rst), /* register: zqsfp28_rst_16_9 */ + SYSFS_ATTR_PTR(port_1_8_modsel), /* register: zqsfp28_modsel_8_1 */ + SYSFS_ATTR_PTR(port_9_16_modsel), /* register: zqsfp28_modsel_16_9 */ + SYSFS_ATTR_PTR(port_1_8_irq_status), /* register: zqsfp28_irq_8_1_status */ + SYSFS_ATTR_PTR(port_9_16_irq_status),/* register: zqsfp28_irq_16_9_status */ + SYSFS_ATTR_PTR(port_1_8_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */ + SYSFS_ATTR_PTR(port_9_16_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */ + SYSFS_ATTR_PTR(port_1_8_lpmode), /* register: zqsfp28_lpmode_8_1 */ + SYSFS_ATTR_PTR(port_9_16_lpmode), /* register: zqsfp28_lpmode_16_9 */ + + SYSFS_ATTR_PTR(fan_tray1_6_present), /* register: fan_tray_status */ + SYSFS_ATTR_PTR(psu_en_status_fld), /* register: psu_en_status*/ + + SYSFS_ATTR_PTR(debug), /* debug flag for print more messages */ + NULL +}; +static const struct attribute_group master_cpld_group_misc = { + .attrs = misc_attributes, +}; + +static int master_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct master_cpld_data *master_cpld; + int err, i; + int grp_number = (int)( sizeof(master_cpld_port_group) / sizeof(master_cpld_port_group[0])); + + /* allocate memory to master_cpld */ + master_cpld = devm_kzalloc(&client->dev, sizeof(struct master_cpld_data) , GFP_KERNEL); + + if (!master_cpld) + return -ENOMEM; + + mutex_init(&master_cpld->lock); + + for(i = 0 ; i < grp_number ; i++){ + err = sysfs_create_group(&client->dev.kobj, &master_cpld_port_group[i]); + if (err){ + printk("%s: Error creeat port group %d.\n", __FUNCTION__, i+1); + } + } + err = sysfs_create_group(&client->dev.kobj, &master_cpld_group_misc); + if (err){ + printk("%s: Error creeat misc group.\n", __FUNCTION__); + } + + master_cpld->client = client; + i2c_set_clientdata(client, master_cpld); + + printk(KERN_INFO "%s: Master CPLD LCMXO3LF created.\n", __FUNCTION__); + + return 0; + +} + +static int master_cpld_remove(struct i2c_client *client) +{ + int i; + int grp_number = (int)( sizeof(master_cpld_port_group) / sizeof(master_cpld_port_group[0])); + + for(i = 0 ; i < grp_number ; i++){ + sysfs_remove_group(&client->dev.kobj, &master_cpld_port_group[i]); + } + sysfs_remove_group(&client->dev.kobj, &master_cpld_group_misc); + + printk(KERN_INFO "%s: Master CPLD removed.\n", __FUNCTION__); + return 0; +} + +static struct i2c_driver master_cpld_driver = { + .driver = { + .name = "master_cpld", + .owner = THIS_MODULE, + }, + .probe = master_cpld_probe, + .remove = master_cpld_remove, + .id_table = master_cpld_ids, +}; + +static int __init master_cpld_init(void) +{ + printk(KERN_INFO "%s: init.\n", __FUNCTION__); + return i2c_add_driver(&master_cpld_driver); +} +module_init(master_cpld_init); + +static void __exit master_cpld_exit(void) +{ + printk(KERN_INFO "%s: exit.\n", __FUNCTION__); + i2c_del_driver(&master_cpld_driver); +} +module_exit(master_cpld_exit); + +MODULE_DESCRIPTION("mitac_ly1200_32x_master_cpld driver"); +MODULE_AUTHOR("Eddy Weng "); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_pb_i2c.c b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_pb_i2c.c new file mode 100644 index 00000000000..bad9260ab4c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_pb_i2c.c @@ -0,0 +1,137 @@ +#include +#include +#include "bms_i2c.h" + +#define BMS_PB_I2C_CLIENT_NUM 6 + +static struct i2c_client *bms_pb_clients[BMS_PB_I2C_CLIENT_NUM] = {NULL}; +static int bms_pb_client_index = 0; + +static int __init __find_i2c_adap(struct device *dev, void *data) +{ + const char *name = data; + static const char *prefix = "i2c-"; + struct i2c_adapter *adapter; + + if (strncmp(dev_name(dev), prefix, strlen(prefix)) != 0) + { + return 0; + } + adapter = to_i2c_adapter(dev); + + return (strncmp(adapter->name, name, strlen(name)) == 0); +} + +static int __init find_i2c_adapter_num(enum i2c_adapter_type type) +{ + struct device *dev = NULL; + struct i2c_adapter *adapter; + const char *name = bms_i2c_adapter_names[type]; + + /* find the adapter by name */ + dev = bus_find_device(&i2c_bus_type, NULL, (void *)name, + __find_i2c_adap); + if (!dev) { + pr_err("%s: i2c adapter %s not found on system.\n", + __func__, name); + return -ENODEV; + } + adapter = to_i2c_adapter(dev); + + return adapter->nr; +} + + +static int __init find_i2c_mux_adapter_num(int parent_num, int num) +{ + struct device *dev = NULL; + struct i2c_adapter *adapter; + char name[48]; + + snprintf(name, sizeof(name), "i2c-%d-mux (chan_id %d)", + parent_num, num); + /* find the adapter by name */ + dev = bus_find_device(&i2c_bus_type, NULL, (void *)name, + __find_i2c_adap); + if (!dev) { + pr_err("%s: i2c adapter %s not found on system.\n", + __func__, name); + return -ENODEV; + } + adapter = to_i2c_adapter(dev); + + return adapter->nr; +} + +static __init struct i2c_client *bms_pb_setup_eeprom_24c01( + struct i2c_adapter *adap, int addr) +{ + struct i2c_board_info info_spd = { + I2C_BOARD_INFO("24c01", addr), + }; + + return i2c_new_device(adap, &info_spd); +} + + +static int __init bms_pb_setup_devices(void) +{ + struct i2c_adapter *adap; + int adap_num; + int parent_num; + + parent_num = find_i2c_adapter_num(I2C_ADAPTER_ISMT); + if (parent_num < 0) + return parent_num; + + adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN3); + if (adap_num < 0) + return adap_num; + + adap = i2c_get_adapter(adap_num); + if (!adap) { + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + goto exit; + } + + bms_pb_clients[bms_pb_client_index++] = bms_pb_setup_eeprom_24c01(adap, 0x50); + bms_pb_clients[bms_pb_client_index++] = bms_pb_setup_eeprom_24c01(adap, 0x51); + +exit: + return 0; +} + +static int __init bms_pb_i2c_init(void) +{ + /* Initial bms_sb_slients array. */ + memset(bms_pb_clients, 0x0, BMS_PB_I2C_CLIENT_NUM); + + bms_pb_setup_devices(); + return 0; +} + + +static void __exit bms_pb_i2c_exit(void){ + int i; + + for (i=(bms_pb_client_index-1); i>=0; i--) { + if (bms_pb_clients[i]) { + i2c_unregister_device(bms_pb_clients[i]); + bms_pb_clients[i] = NULL; + } + } + + bms_pb_client_index = 0; + + +} + + +module_init(bms_pb_i2c_init); +module_exit(bms_pb_i2c_exit); + + +MODULE_DESCRIPTION("mitac_ly1200_32x_pb_i2c driver"); +MODULE_AUTHOR("Eddy Weng "); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_sb_i2c.c b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_sb_i2c.c new file mode 100644 index 00000000000..e2a9718863f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_sb_i2c.c @@ -0,0 +1,514 @@ +#include +#include +#include +#include +#include +#include +#include "bms_i2c.h" + +/* Don't include MAC_AVS_1V */ +#define BMS_SB_I2C_CLIENT_NUM 35 +#define BMS_SB_ADAPTER_BASE 2 +#define BMS_SB_STAGE2_MUX_BUS_BASE 6 + + +static struct i2c_client *bms_sb_clients[BMS_SB_I2C_CLIENT_NUM] = {NULL}; +static int bms_sb_client_index = 0; + +enum bms_sb_switch_stage2_mux0_bus { + I2C_STAGE2_MUX0_CHAN0 = 0, + I2C_STAGE2_MUX0_CHAN1, + I2C_STAGE2_MUX0_CHAN2, + I2C_STAGE2_MUX0_CHAN3, + I2C_STAGE2_MUX0_CHAN4, + I2C_STAGE2_MUX0_CHAN5, + I2C_STAGE2_MUX0_CHAN6, + I2C_STAGE2_MUX0_CHAN7, +}; + +enum bms_sb_switch_stage2_mux1_bus { + I2C_STAGE2_MUX1_CHAN8 = 0, + I2C_STAGE2_MUX1_CHAN9, + I2C_STAGE2_MUX1_CHAN10, + I2C_STAGE2_MUX1_CHAN11, + I2C_STAGE2_MUX1_CHAN12, + I2C_STAGE2_MUX1_CHAN13, + I2C_STAGE2_MUX1_CHAN14, + I2C_STAGE2_MUX1_CHAN15, +}; + +enum bms_sb_switch_stage2_mux2_bus { + I2C_STAGE2_MUX2_CHAN16 = 0, + I2C_STAGE2_MUX2_CHAN17, + I2C_STAGE2_MUX2_CHAN18, + I2C_STAGE2_MUX2_CHAN19, + I2C_STAGE2_MUX2_CHAN20, + I2C_STAGE2_MUX2_CHAN21, + I2C_STAGE2_MUX2_CHAN22, + I2C_STAGE2_MUX2_CHAN23, +}; + +enum bms_sb_switch_stage2_mux3_bus { + I2C_STAGE2_MUX3_CHAN24 = 0, + I2C_STAGE2_MUX3_CHAN25, + I2C_STAGE2_MUX3_CHAN26, + I2C_STAGE2_MUX3_CHAN27, + I2C_STAGE2_MUX3_CHAN28, + I2C_STAGE2_MUX3_CHAN29, + I2C_STAGE2_MUX3_CHAN30, + I2C_STAGE2_MUX3_CHAN31, +}; + +static struct pca954x_platform_mode pmode_pca9548_mux[] = { + { .adap_id = BMS_SB_ADAPTER_BASE + 0, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 1, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 2, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 3, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 4, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 5, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 6, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 7, }, +}; + +static struct pca954x_platform_data platdata_pca9548_mux = { + .modes = pmode_pca9548_mux, + .num_modes = ARRAY_SIZE(pmode_pca9548_mux), +}; + +static struct pca954x_platform_mode pmode_stage1_pca9548_mux0[] = { + { .adap_id = BMS_SB_ADAPTER_BASE + 8, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 9, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 10, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 11, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 12, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 13, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 14, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 15, }, +}; + +static struct pca954x_platform_data platdata_stage1_pca9548_mux0 = { + .modes = pmode_stage1_pca9548_mux0, + .num_modes = ARRAY_SIZE(pmode_stage1_pca9548_mux0), +}; + +static struct pca954x_platform_mode pmode_stage1_pca9548_mux1[] = { + { .adap_id = BMS_SB_ADAPTER_BASE + 16, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 17, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 18, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 19, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 20, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 21, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 22, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 23, }, +}; + +static struct pca954x_platform_data platdata_stage1_pca9548_mux1 = { + .modes = pmode_stage1_pca9548_mux1, + .num_modes = ARRAY_SIZE(pmode_stage1_pca9548_mux1), +}; + +static struct pca954x_platform_mode pmode_stage1_pca9548_mux2[] = { + { .adap_id = BMS_SB_ADAPTER_BASE + 24, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 25, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 26, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 27, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 28, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 29, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 30, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 31, }, +}; + +static struct pca954x_platform_data platdata_stage1_pca9548_mux2 = { + .modes = pmode_stage1_pca9548_mux2, + .num_modes = ARRAY_SIZE(pmode_stage1_pca9548_mux2), +}; + +static struct pca954x_platform_mode pmode_stage1_pca9548_mux3[] = { + { .adap_id = BMS_SB_ADAPTER_BASE + 32, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 33, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 34, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 35, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 36, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 37, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 38, }, + { .adap_id = BMS_SB_ADAPTER_BASE + 39, }, +}; + +static struct pca954x_platform_data platdata_stage1_pca9548_mux3 = { + .modes = pmode_stage1_pca9548_mux3, + .num_modes = ARRAY_SIZE(pmode_stage1_pca9548_mux3), +}; + +static int __init __find_i2c_adap(struct device *dev, void *data) +{ + const char *name = data; + static const char *prefix = "i2c-"; + struct i2c_adapter *adapter; + + if (strncmp(dev_name(dev), prefix, strlen(prefix)) != 0) + { + return 0; + } + adapter = to_i2c_adapter(dev); + + return (strncmp(adapter->name, name, strlen(name)) == 0); +} + +static int __init find_i2c_adapter_num(enum i2c_adapter_type type) +{ + struct device *dev = NULL; + struct i2c_adapter *adapter; + const char *name = bms_i2c_adapter_names[type]; + + /* find the adapter by name */ + dev = bus_find_device(&i2c_bus_type, NULL, (void *)name, + __find_i2c_adap); + if (!dev) { + pr_err("%s: i2c adapter %s not found on system.\n", + __func__, name); + return -ENODEV; + } + adapter = to_i2c_adapter(dev); + + return adapter->nr; +} + +static int __init find_i2c_mux_adapter_num(int parent_num, int num) +{ + struct device *dev = NULL; + struct i2c_adapter *adapter; + char name[48]; + + snprintf(name, sizeof(name), "i2c-%d-mux (chan_id %d)", + parent_num, num); + /* find the adapter by name */ + dev = bus_find_device(&i2c_bus_type, NULL, (void *)name, + __find_i2c_adap); + if (!dev) { + pr_err("%s: i2c adapter %s not found on system.\n", + __func__, name); + return -ENODEV; + } + adapter = to_i2c_adapter(dev); + + return adapter->nr; +} + +static __init struct i2c_client *bms_sb_setup_eeprom_24c04( + struct i2c_adapter *adap) +{ + struct i2c_board_info info_spd = { + I2C_BOARD_INFO("24c04", 0x50), + }; + + return i2c_new_device(adap, &info_spd); +} + +static __init struct i2c_client *bms_sb_setup_tmp75( + struct i2c_adapter *adap, int addr) +{ + struct i2c_board_info info_spd = { + I2C_BOARD_INFO("tmp75", addr), + }; + + return i2c_new_device(adap, &info_spd); +} + +static __init struct i2c_client *bms_sb_setup_switch(struct i2c_adapter *adap) +{ + struct i2c_board_info info = { + I2C_BOARD_INFO("pca9548", 0x70), + .platform_data = &platdata_pca9548_mux, + }; + + return i2c_new_device(adap, &info); +} + +static __init struct i2c_client *bms_sb_setup_stage1_mux0(struct i2c_adapter *adap) +{ + struct i2c_board_info info = { + I2C_BOARD_INFO("pca9548", 0x71), + .platform_data = &platdata_stage1_pca9548_mux0, + }; + + return i2c_new_device(adap, &info); +} + +static __init struct i2c_client *bms_sb_setup_stage1_mux1(struct i2c_adapter *adap) +{ + struct i2c_board_info info = { + I2C_BOARD_INFO("pca9548", 0x72), + .platform_data = &platdata_stage1_pca9548_mux1, + }; + + return i2c_new_device(adap, &info); +} + +static __init struct i2c_client *bms_sb_setup_stage1_mux2(struct i2c_adapter *adap) +{ + struct i2c_board_info info = { + I2C_BOARD_INFO("pca9548", 0x73), + .platform_data = &platdata_stage1_pca9548_mux2, + }; + + return i2c_new_device(adap, &info); +} + +static __init struct i2c_client *bms_sb_setup_stage1_mux3(struct i2c_adapter *adap) +{ + struct i2c_board_info info = { + I2C_BOARD_INFO("pca9548", 0x74), + .platform_data = &platdata_stage1_pca9548_mux3, + }; + + return i2c_new_device(adap, &info); +} + +static __init struct i2c_client *bms_sb_setup_slave_cpld(struct i2c_adapter *adap) +{ + struct i2c_board_info info = { + I2C_BOARD_INFO("slave_cpld", 0x33), + }; + + return i2c_new_device(adap, &info); +} + +static __init struct i2c_client *bms_sb_setup_master_cpld(struct i2c_adapter *adap) +{ + struct i2c_board_info info = { + I2C_BOARD_INFO("master_cpld", 0x32), + }; + + return i2c_new_device(adap, &info); +} + +static __init struct i2c_client *bms_sb_setup_sff8436(struct i2c_adapter *adap) +{ + struct i2c_board_info info = { + I2C_BOARD_INFO("sff8436", 0x50), + }; + + return i2c_new_device(adap, &info); +} + +static int __init bms_sb_setup_devices_ismt(void) +{ + struct i2c_adapter *adap; + int adap_num = find_i2c_adapter_num(I2C_ADAPTER_ISMT); + + if (adap_num < 0) + return adap_num; + + adap = i2c_get_adapter(adap_num); + if (!adap) { + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + return 0; + } + + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_switch(adap); + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_master_cpld(adap); + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_slave_cpld(adap); + + return 0; +} + +static int __init bms_sb_setup_devices_stage1(void) +{ + struct i2c_adapter *adap; + int adap_num; + int parent_num; + + parent_num = find_i2c_adapter_num(I2C_ADAPTER_ISMT); + if (parent_num < 0) + return parent_num; + + /* Mux chan0 steup */ + adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN0); + if (adap_num >= 0){ + adap = i2c_get_adapter(adap_num); + if(adap) { + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_eeprom_24c04(adap); + }else{ + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + } + }else{ + pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN0); + } + + /* Mux chan1 connect to fan board */ + + /* Mux chan2 steup */ + adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN2); + if (adap_num >= 0){ + adap = i2c_get_adapter(adap_num); + if(adap) { + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_tmp75(adap, 0x4a); + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_tmp75(adap, 0x4b); + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_tmp75(adap, 0x4c); + }else{ + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + } + }else{ + pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN2); + } + + /* Mux chan3 connect to power board */ + + /* Mux chan4 setup for i2c mux0 */ + adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN4); + if (adap_num >= 0){ + adap = i2c_get_adapter(adap_num); + if(adap) { + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_stage1_mux0(adap); + }else{ + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + } + }else{ + pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN4); + } + + /* Mux chan5 setup for i2c mux1 */ + adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN5); + if (adap_num >= 0){ + adap = i2c_get_adapter(adap_num); + if(adap) { + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_stage1_mux1(adap); + }else{ + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + } + }else{ + pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN5); + } + + /* Mux chan6 setup for i2c mux2 */ + adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN6); + if (adap_num >= 0){ + adap = i2c_get_adapter(adap_num); + if(adap) { + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_stage1_mux2(adap); + }else{ + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + } + }else{ + pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN6); + } + + /* Mux chan7 setup for i2c mux3 */ + adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN7); + if (adap_num >= 0){ + adap = i2c_get_adapter(adap_num); + if(adap) { + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_stage1_mux3(adap); + }else{ + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + } + }else{ + pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN7); + } + + return 0; +} + +static int __init bms_sb_setup_devices_stage2(void) +{ + struct i2c_adapter *adap; + int adap_num; + int i2c_base = sizeof(bms_i2c_adapter_names) / sizeof(bms_i2c_adapter_names[0]); + int i; + + /* stage2 mux0 chan0~7 install sff8436 */ + for(i = I2C_STAGE2_MUX0_CHAN0; i <= I2C_STAGE2_MUX0_CHAN7; i++){ + adap_num = find_i2c_mux_adapter_num(I2C_STAGE1_MUX_CHAN4 + i2c_base, I2C_STAGE2_MUX0_CHAN0 + i); + if (adap_num >= 0){ + adap = i2c_get_adapter(adap_num); + if(adap) { + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_sff8436(adap); + }else{ + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + } + }else{ + pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN4 + i2c_base); + } + } + + /* stage2 mux1 chan0~7 install sff8436 */ + for(i = I2C_STAGE2_MUX1_CHAN8; i <= I2C_STAGE2_MUX1_CHAN15; i++){ + adap_num = find_i2c_mux_adapter_num(I2C_STAGE1_MUX_CHAN5 + i2c_base, I2C_STAGE2_MUX1_CHAN8 + i); + if (adap_num >= 0){ + adap = i2c_get_adapter(adap_num); + if(adap) { + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_sff8436(adap); + }else{ + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + } + }else{ + pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN5 + i2c_base); + } + } + + /* stage2 mux2 chan0~7 install sff8436 */ + for(i = I2C_STAGE2_MUX2_CHAN16; i <= I2C_STAGE2_MUX2_CHAN23; i++){ + adap_num = find_i2c_mux_adapter_num(I2C_STAGE1_MUX_CHAN6 + i2c_base, I2C_STAGE2_MUX2_CHAN16 + i); + if (adap_num >= 0){ + adap = i2c_get_adapter(adap_num); + if(adap) { + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_sff8436(adap); + }else{ + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + } + }else{ + pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN6 + i2c_base); + } + } + + /* stage2 mux3 chan0~7 install sff8436 */ + for(i = I2C_STAGE2_MUX3_CHAN24; i <= I2C_STAGE2_MUX3_CHAN31; i++){ + adap_num = find_i2c_mux_adapter_num(I2C_STAGE1_MUX_CHAN7 + i2c_base, I2C_STAGE2_MUX3_CHAN24 + i); + if (adap_num >= 0){ + adap = i2c_get_adapter(adap_num); + if(adap) { + bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_sff8436(adap); + }else{ + pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num); + } + }else{ + pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN7 + i2c_base); + } + } +} + +static int __init bms_sb_i2c_init(void) +{ + /* Initial bms_sb_slients array. */ + memset(bms_sb_clients, 0x0, BMS_SB_I2C_CLIENT_NUM); + + bms_sb_setup_devices_ismt(); + mdelay(200); + bms_sb_setup_devices_stage1(); + mdelay(200); + bms_sb_setup_devices_stage2(); + + return 0; +} + +static void __exit bms_sb_i2c_exit(void){ + int i; + + for (i=(bms_sb_client_index-1); i>=0; i--) { + if (bms_sb_clients[i]) { + i2c_unregister_device(bms_sb_clients[i]); + bms_sb_clients[i] = NULL; + } + } + + bms_sb_client_index = 0; + +} + +module_init(bms_sb_i2c_init); +module_exit(bms_sb_i2c_exit); + +MODULE_DESCRIPTION("mitac_ly1200_32x_sb_i2c driver"); +MODULE_AUTHOR("Eddy Weng "); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_slave_cpld.c b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_slave_cpld.c new file mode 100644 index 00000000000..8809573fa4a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_slave_cpld.c @@ -0,0 +1,427 @@ +#include +#include + +#include "slave_cpld_reg.h" +#include "slave_cpld_sysfs.h" + +static int debug_flag = 0; + +struct slave_cpld_data { + struct mutex lock; + + struct i2c_client *client; + struct device_attribute bin; +}; + + +static const struct i2c_device_id slave_cpld_ids[] = { + { "slave_cpld", 0 }, + { /* END OF LIST */ } +}; +MODULE_DEVICE_TABLE(i2c, slave_cpld_ids); + +static int slave_cpld_raw_read(struct device *dev, struct device_attribute *attr, char *buf, + int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name){ + unsigned int reg_val = 0, fld_val; + static int debug_flag; + struct slave_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int err; + + if (reg_width != 8){ + printk("%s: Register table width setting failed.\n", reg_name); + return -EINVAL; + } + mutex_lock(&data->lock); + if ((err = i2c_smbus_read_byte_data(client, (u8)reg_offset)) < 0) { + /* CPLD read error condition */; + mutex_unlock(&data->lock); + printk("%s: i2c read failed, error code = %d.\n", reg_name, err); + return err; + } + reg_val = err; + if (debug_flag) { + printk("%s: reg_offset = %d, width = %d, cur value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val); + } + mutex_unlock(&data->lock); + if (fld_width == reg_width) {fld_val = reg_val & fld_mask;} + else {fld_val = (reg_val >> fld_shift) & fld_mask;} + return sprintf(buf, "0x%x\n", fld_val); +} + +static int slave_cpld_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count, + int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name){ + int ret_code; + unsigned int reg_val, fld_val; + unsigned long val; + static int debug_flag; + struct slave_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + if (reg_width != 8){ + printk("%s: Register table width setting failed.\n", reg_name); + return -EINVAL; + } + /* Parse buf and store to fld_val */ + if ((ret_code = kstrtoul(buf, 16, &val))){ + printk("%s: Conversion value = %s failed, errno = %d.\n", reg_name, buf, ret_code); + return ret_code; + } + fld_val = (unsigned int)val; + mutex_lock(&data->lock); + if ((ret_code = i2c_smbus_read_byte_data(client, (u8)reg_offset)) < 0) { + /* Handle CPLD read error condition */; + mutex_unlock(&data->lock); + printk("%s: i2c read failed, error code = %d.\n", reg_name, ret_code); + return ret_code; + } + reg_val = ret_code; + if (debug_flag) { + printk("%s: offset = %d, width = %d, cur value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val); + } + if (fld_width == reg_width) {reg_val = fld_val & fld_mask;} + else {reg_val = (reg_val & ~(fld_mask << fld_shift)) | + ((fld_val & (fld_mask)) << fld_shift);} + if ((ret_code = i2c_smbus_write_byte_data(client, (u8)reg_offset, (u8)reg_val)) != 0) { + /* Handle CPLD write error condition */; + mutex_unlock(&data->lock); + printk("%s: i2c write failed, error code = %d.\n", reg_name, ret_code); + return ret_code; + } + else if (debug_flag) { + printk("%s: offset = %d, width = %d, new value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val); + } + mutex_unlock(&data->lock); + return count; +} + +/*--------------------special file for debug---------------------- */ +static ssize_t slave_cpld_debug_read(struct device *dev, struct device_attribute *attr, + char *buf){ + + return sprintf(buf, "%d\n", debug_flag); +} + + +static ssize_t slave_cpld_debug_write(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + int temp; + int error; + + error = kstrtoint(buf, 10, &temp); + if (error){ + printk(KERN_INFO "%s: Conversion value = %s failed.\n", __FUNCTION__, buf); + return count; + } + debug_flag = temp; + + if(debug_flag) + printk("%s, debug_flag = %d\n", __FUNCTION__, debug_flag); + + return count; +} +SYSFS_MISC_RW_ATTR_DEF(debug, slave_cpld_debug_read, slave_cpld_debug_write) + + + + +/* ----------------define port group---------------------------- */ +static struct attribute *port17_attributes[] = { + SYSFS_ATTR_PTR(port17_present), /* register: zqsfp28_present_24_17_status */ + SYSFS_ATTR_PTR(port17_rst), /* register: zqsfp28_rst_24_17 */ + SYSFS_ATTR_PTR(port17_modsel), /* register: zqsfp28_modsel_24_17 */ + SYSFS_ATTR_PTR(port17_lpmode), /* register: zqsfp28_lpmode_24_17 */ + SYSFS_ATTR_PTR(port17_irq_status), /* register: zqsfp28_irq_24_17_status */ + SYSFS_ATTR_PTR(port17_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */ + NULL +}; + +static struct attribute *port18_attributes[] = { + SYSFS_ATTR_PTR(port18_present), /* register: zqsfp28_present_24_17_status */ + SYSFS_ATTR_PTR(port18_rst), /* register: zqsfp28_rst_24_17 */ + SYSFS_ATTR_PTR(port18_modsel), /* register: zqsfp28_modsel_24_17 */ + SYSFS_ATTR_PTR(port18_lpmode), /* register: zqsfp28_lpmode_24_17 */ + SYSFS_ATTR_PTR(port18_irq_status), /* register: zqsfp28_irq_24_17_status */ + SYSFS_ATTR_PTR(port18_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */ + NULL +}; + +static struct attribute *port19_attributes[] = { + SYSFS_ATTR_PTR(port19_present), /* register: zqsfp28_present_24_17_status */ + SYSFS_ATTR_PTR(port19_rst), /* register: zqsfp28_rst_24_17 */ + SYSFS_ATTR_PTR(port19_modsel), /* register: zqsfp28_modsel_24_17 */ + SYSFS_ATTR_PTR(port19_lpmode), /* register: zqsfp28_lpmode_24_17 */ + SYSFS_ATTR_PTR(port19_irq_status), /* register: zqsfp28_irq_24_17_status */ + SYSFS_ATTR_PTR(port19_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */ + NULL +}; + +static struct attribute *port20_attributes[] = { + SYSFS_ATTR_PTR(port20_present), /* register: zqsfp28_present_24_17_status */ + SYSFS_ATTR_PTR(port20_rst), /* register: zqsfp28_rst_24_17 */ + SYSFS_ATTR_PTR(port20_modsel), /* register: zqsfp28_modsel_24_17 */ + SYSFS_ATTR_PTR(port20_lpmode), /* register: zqsfp28_lpmode_24_17 */ + SYSFS_ATTR_PTR(port20_irq_status), /* register: zqsfp28_irq_24_17_status */ + SYSFS_ATTR_PTR(port20_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */ + NULL +}; + +static struct attribute *port21_attributes[] = { + SYSFS_ATTR_PTR(port21_present), /* register: zqsfp28_present_24_17_status */ + SYSFS_ATTR_PTR(port21_rst), /* register: zqsfp28_rst_24_17 */ + SYSFS_ATTR_PTR(port21_modsel), /* register: zqsfp28_modsel_24_17 */ + SYSFS_ATTR_PTR(port21_lpmode), /* register: zqsfp28_lpmode_24_17 */ + SYSFS_ATTR_PTR(port21_irq_status), /* register: zqsfp28_irq_24_17_status */ + SYSFS_ATTR_PTR(port21_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */ + NULL +}; + +static struct attribute *port22_attributes[] = { + SYSFS_ATTR_PTR(port22_present), /* register: zqsfp28_present_24_17_status */ + SYSFS_ATTR_PTR(port22_rst), /* register: zqsfp28_rst_24_17 */ + SYSFS_ATTR_PTR(port22_modsel), /* register: zqsfp28_modsel_24_17 */ + SYSFS_ATTR_PTR(port22_lpmode), /* register: zqsfp28_lpmode_24_17 */ + SYSFS_ATTR_PTR(port22_irq_status), /* register: zqsfp28_irq_24_17_status */ + SYSFS_ATTR_PTR(port22_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */ + NULL +}; + +static struct attribute *port23_attributes[] = { + SYSFS_ATTR_PTR(port23_present), /* register: zqsfp28_present_24_17_status */ + SYSFS_ATTR_PTR(port23_rst), /* register: zqsfp28_rst_24_17 */ + SYSFS_ATTR_PTR(port23_modsel), /* register: zqsfp28_modsel_24_17 */ + SYSFS_ATTR_PTR(port23_lpmode), /* register: zqsfp28_lpmode_24_17 */ + SYSFS_ATTR_PTR(port23_irq_status), /* register: zqsfp28_irq_24_17_status */ + SYSFS_ATTR_PTR(port23_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */ + NULL +}; + +static struct attribute *port24_attributes[] = { + SYSFS_ATTR_PTR(port24_present), /* register: zqsfp28_present_24_17_status */ + SYSFS_ATTR_PTR(port24_rst), /* register: zqsfp28_rst_24_17 */ + SYSFS_ATTR_PTR(port24_modsel), /* register: zqsfp28_modsel_24_17 */ + SYSFS_ATTR_PTR(port24_lpmode), /* register: zqsfp28_lpmode_24_17 */ + SYSFS_ATTR_PTR(port24_irq_status), /* register: zqsfp28_irq_24_17_status */ + SYSFS_ATTR_PTR(port24_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */ + NULL +}; + +static struct attribute *port25_attributes[] = { + SYSFS_ATTR_PTR(port25_present), /* register: zqsfp28_present_32_25_status */ + SYSFS_ATTR_PTR(port25_rst), /* register: zqsfp28_rst_32_25 */ + SYSFS_ATTR_PTR(port25_modsel), /* register: zqsfp28_modsel_32_25 */ + SYSFS_ATTR_PTR(port25_lpmode), /* register: zqsfp28_lpmode_32_25 */ + SYSFS_ATTR_PTR(port25_irq_status), /* register: zqsfp28_irq_32_25_status */ + SYSFS_ATTR_PTR(port25_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */ + NULL +}; + +static struct attribute *port26_attributes[] = { + SYSFS_ATTR_PTR(port26_present), /* register: zqsfp28_present_32_25_status */ + SYSFS_ATTR_PTR(port26_rst), /* register: zqsfp28_rst_32_25 */ + SYSFS_ATTR_PTR(port26_modsel), /* register: zqsfp28_modsel_32_25 */ + SYSFS_ATTR_PTR(port26_lpmode), /* register: zqsfp28_lpmode_32_25 */ + SYSFS_ATTR_PTR(port26_irq_status), /* register: zqsfp28_irq_32_25_status */ + SYSFS_ATTR_PTR(port26_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */ + NULL +}; + +static struct attribute *port27_attributes[] = { + SYSFS_ATTR_PTR(port27_present), /* register: zqsfp28_present_32_25_status */ + SYSFS_ATTR_PTR(port27_rst), /* register: zqsfp28_rst_32_25 */ + SYSFS_ATTR_PTR(port27_modsel), /* register: zqsfp28_modsel_32_25 */ + SYSFS_ATTR_PTR(port27_lpmode), /* register: zqsfp28_lpmode_32_25 */ + SYSFS_ATTR_PTR(port27_irq_status), /* register: zqsfp28_irq_32_25_status */ + SYSFS_ATTR_PTR(port27_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */ + NULL +}; + +static struct attribute *port28_attributes[] = { + SYSFS_ATTR_PTR(port28_present), /* register: zqsfp28_present_32_25_status */ + SYSFS_ATTR_PTR(port28_rst), /* register: zqsfp28_rst_32_25 */ + SYSFS_ATTR_PTR(port28_modsel), /* register: zqsfp28_modsel_32_25 */ + SYSFS_ATTR_PTR(port28_lpmode), /* register: zqsfp28_lpmode_32_25 */ + SYSFS_ATTR_PTR(port28_irq_status), /* register: zqsfp28_irq_32_25_status */ + SYSFS_ATTR_PTR(port28_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */ + NULL +}; + +static struct attribute *port29_attributes[] = { + SYSFS_ATTR_PTR(port29_present), /* register: zqsfp28_present_32_25_status */ + SYSFS_ATTR_PTR(port29_rst), /* register: zqsfp28_rst_32_25 */ + SYSFS_ATTR_PTR(port29_modsel), /* register: zqsfp28_modsel_32_25 */ + SYSFS_ATTR_PTR(port29_lpmode), /* register: zqsfp28_lpmode_32_25 */ + SYSFS_ATTR_PTR(port29_irq_status), /* register: zqsfp28_irq_32_25_status */ + SYSFS_ATTR_PTR(port29_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */ + NULL +}; + +static struct attribute *port30_attributes[] = { + SYSFS_ATTR_PTR(port30_present), /* register: zqsfp28_present_32_25_status */ + SYSFS_ATTR_PTR(port30_rst), /* register: zqsfp28_rst_32_25 */ + SYSFS_ATTR_PTR(port30_modsel), /* register: zqsfp28_modsel_32_25 */ + SYSFS_ATTR_PTR(port30_lpmode), /* register: zqsfp28_lpmode_32_25 */ + SYSFS_ATTR_PTR(port30_irq_status), /* register: zqsfp28_irq_32_25_status */ + SYSFS_ATTR_PTR(port30_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */ + NULL +}; + +static struct attribute *port31_attributes[] = { + SYSFS_ATTR_PTR(port31_present), /* register: zqsfp28_present_32_25_status */ + SYSFS_ATTR_PTR(port31_rst), /* register: zqsfp28_rst_32_25 */ + SYSFS_ATTR_PTR(port31_modsel), /* register: zqsfp28_modsel_32_25 */ + SYSFS_ATTR_PTR(port31_lpmode), /* register: zqsfp28_lpmode_32_25 */ + SYSFS_ATTR_PTR(port31_irq_status), /* register: zqsfp28_irq_32_25_status */ + SYSFS_ATTR_PTR(port31_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */ + NULL +}; + +static struct attribute *port32_attributes[] = { + SYSFS_ATTR_PTR(port32_present), /* register: zqsfp28_present_32_25_status */ + SYSFS_ATTR_PTR(port32_rst), /* register: zqsfp28_rst_32_25 */ + SYSFS_ATTR_PTR(port32_modsel), /* register: zqsfp28_modsel_32_25 */ + SYSFS_ATTR_PTR(port32_lpmode), /* register: zqsfp28_lpmode_32_25 */ + SYSFS_ATTR_PTR(port32_irq_status), /* register: zqsfp28_irq_32_25_status */ + SYSFS_ATTR_PTR(port32_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */ + NULL +}; + +static const struct attribute_group slave_cpld_port_group[] = { + {.attrs = port17_attributes, + .name = "port17",}, + {.attrs = port18_attributes, + .name = "port18",}, + {.attrs = port19_attributes, + .name = "port19",}, + {.attrs = port20_attributes, + .name = "port20",}, + {.attrs = port21_attributes, + .name = "port21",}, + {.attrs = port22_attributes, + .name = "port22",}, + {.attrs = port23_attributes, + .name = "port23",}, + {.attrs = port24_attributes, + .name = "port24",}, + {.attrs = port25_attributes, + .name = "port25",}, + {.attrs = port26_attributes, + .name = "port26",}, + {.attrs = port27_attributes, + .name = "port27",}, + {.attrs = port28_attributes, + .name = "port28",}, + {.attrs = port29_attributes, + .name = "port29",}, + {.attrs = port30_attributes, + .name = "port30",}, + {.attrs = port31_attributes, + .name = "port31",}, + {.attrs = port32_attributes, + .name = "port32",} +}; + +/* ----------------define misc group---------------------------- */ +static struct attribute *misc_attributes[] = { + SYSFS_ATTR_PTR(mjr_rev), /* register: slv_cpld_rev */ + SYSFS_ATTR_PTR(mnr_rev), /* register: slv_cpld_rev */ + SYSFS_ATTR_PTR(scrtch_reg), /* register: slv_cpld_gpr */ + SYSFS_ATTR_PTR(brd_rev), /* register: mb_brd_rev_type */ + SYSFS_ATTR_PTR(brd_type), /* register: mb_brd_rev_type */ + + SYSFS_ATTR_PTR(port_17_24_present), /* register: zqsfp28_present_24_17_status */ + SYSFS_ATTR_PTR(port_25_32_present), /* register: zqsfp28_present_32_25_status */ + SYSFS_ATTR_PTR(port_17_24_rst), /* register: zqsfp28_rst_24_17 */ + SYSFS_ATTR_PTR(port_25_32_rst), /* register: zqsfp28_rst_32_25 */ + SYSFS_ATTR_PTR(port_17_24_modsel), /* register: zqsfp28_modsel_24_17 */ + SYSFS_ATTR_PTR(port_25_32_modsel), /* register: zqsfp28_modsel_32_25 */ + SYSFS_ATTR_PTR(port_17_24_irq_status),/* register: zqsfp28_irq_24_17_status */ + SYSFS_ATTR_PTR(port_25_32_irq_status),/* register: zqsfp28_irq_32_25_status */ + SYSFS_ATTR_PTR(port_17_24_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */ + SYSFS_ATTR_PTR(port_25_32_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */ + SYSFS_ATTR_PTR(port_17_24_lpmode), /* register: zqsfp28_lpmode_24_17 */ + SYSFS_ATTR_PTR(port_25_32_lpmode), /* register: zqsfp28_lpmode_32_25 */ + + SYSFS_ATTR_PTR(debug), /* debug flag for print more messages */ + NULL +}; +static const struct attribute_group slave_cpld_group_misc = { + .attrs = misc_attributes, +}; + +static int slave_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct slave_cpld_data *slave_cpld; + int err, i; + int grp_number = (int)( sizeof(slave_cpld_port_group) / sizeof(slave_cpld_port_group[0])); + + /* allocate memory to slave_cpld */ + slave_cpld = devm_kzalloc(&client->dev, sizeof(struct slave_cpld_data) , GFP_KERNEL); + + if (!slave_cpld) + return -ENOMEM; + + mutex_init(&slave_cpld->lock); + + for(i = 0 ; i < grp_number ; i++){ + err = sysfs_create_group(&client->dev.kobj, &slave_cpld_port_group[i]); + if (err){ + printk("%s: Error creeat port group %d.\n", __FUNCTION__, i+1); + } + } + err = sysfs_create_group(&client->dev.kobj, &slave_cpld_group_misc); + if (err){ + printk("%s: Error creeat misc group.\n", __FUNCTION__); + } + + slave_cpld->client = client; + i2c_set_clientdata(client, slave_cpld); + + printk(KERN_INFO "%s: Slave CPLD LCMXO3LF created.\n", __FUNCTION__); + + return 0; + +} + +static int slave_cpld_remove(struct i2c_client *client) +{ + int i; + int grp_number = (int)( sizeof(slave_cpld_port_group) / sizeof(slave_cpld_port_group[0])); + + for(i = 0 ; i < grp_number ; i++){ + sysfs_remove_group(&client->dev.kobj, &slave_cpld_port_group[i]); + } + sysfs_remove_group(&client->dev.kobj, &slave_cpld_group_misc); + + printk(KERN_INFO "%s: Slave CPLD removed.\n", __FUNCTION__); + return 0; +} + +static struct i2c_driver slave_cpld_driver = { + .driver = { + .name = "slave_cpld", + .owner = THIS_MODULE, + }, + .probe = slave_cpld_probe, + .remove = slave_cpld_remove, + .id_table = slave_cpld_ids, +}; + +static int __init slave_cpld_init(void) +{ + printk(KERN_INFO "%s: init.\n", __FUNCTION__); + return i2c_add_driver(&slave_cpld_driver); +} +module_init(slave_cpld_init); + +static void __exit slave_cpld_exit(void) +{ + printk(KERN_INFO "%s: exit.\n", __FUNCTION__); + i2c_del_driver(&slave_cpld_driver); +} +module_exit(slave_cpld_exit); + +MODULE_DESCRIPTION("mitac_ly1200_32x_slave_cpld driver"); +MODULE_AUTHOR("Eddy Weng "); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_system_cpld.c b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_system_cpld.c new file mode 100644 index 00000000000..e5af8b70bf9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/mitac_ly1200_32x_system_cpld.c @@ -0,0 +1,541 @@ +#define CONFIG_DRV_SYSCPLD_WDT 1 + +#include +#include + +#include "system_cpld_reg.h" +#include "system_cpld_sysfs.h" +#ifdef CONFIG_DRV_SYSCPLD_WDT +#include +#include +#include +#include +#include +#include +#endif + +static int debug_flag = 0; + +struct system_cpld_data { + struct mutex lock; + + struct i2c_client *client; + struct device_attribute bin; +}; +struct system_cpld_data *system_cpld; + +static const struct i2c_device_id system_cpld_ids[] = { + { "system_cpld", 0 }, + { /* END OF LIST */ } +}; +MODULE_DEVICE_TABLE(i2c, system_cpld_ids); + +static int system_cpld_raw_read(struct device *dev, struct device_attribute *attr, char *buf, + int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name){ + unsigned int reg_val = 0, fld_val; + static int debug_flag; + struct system_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int err; + + if (reg_width != 8){ + printk("%s: Register table width setting failed.\n", reg_name); + return -EINVAL; + } + mutex_lock(&data->lock); + if ((err = i2c_smbus_read_byte_data(client, (u8)reg_offset)) < 0) { + /* CPLD read error condition */; + mutex_unlock(&data->lock); + printk("%s: i2c read failed, error code = %d.\n", reg_name, err); + return err; + } + reg_val = err; + if (debug_flag) { + printk("%s: reg_offset = %d, width = %d, cur value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val); + } + mutex_unlock(&data->lock); + if (fld_width == reg_width) {fld_val = reg_val & fld_mask;} + else {fld_val = (reg_val >> fld_shift) & fld_mask;} + return sprintf(buf, "0x%x\n", fld_val); +} + +static int system_cpld_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count, + int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name){ + int ret_code; + unsigned int reg_val, fld_val; + unsigned long val; + static int debug_flag; + struct system_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + if (reg_width != 8){ + printk("%s: Register table width setting failed.\n", reg_name); + return -EINVAL; + } + /* Parse buf and store to fld_val */ + if ((ret_code = kstrtoul(buf, 16, &val))){ + printk("%s: Conversion value = %s failed, errno = %d.\n", reg_name, buf, ret_code); + return ret_code; + } + fld_val = (unsigned int)val; + mutex_lock(&data->lock); + if ((ret_code = i2c_smbus_read_byte_data(client, (u8)reg_offset)) < 0) { + /* Handle CPLD read error condition */; + mutex_unlock(&data->lock); + printk("%s: i2c read failed, error code = %d.\n", reg_name, ret_code); + return ret_code; + } + reg_val = ret_code; + if (debug_flag) { + printk("%s: offset = %d, width = %d, cur value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val); + } + if (fld_width == reg_width) {reg_val = fld_val & fld_mask;} + else {reg_val = (reg_val & ~(fld_mask << fld_shift)) | + ((fld_val & (fld_mask)) << fld_shift);} + if ((ret_code = i2c_smbus_write_byte_data(client, (u8)reg_offset, (u8)reg_val)) != 0) { + /* Handle CPLD write error condition */; + mutex_unlock(&data->lock); + printk("%s: i2c write failed, error code = %d.\n", reg_name, ret_code); + return ret_code; + } + else if (debug_flag) { + printk("%s: offset = %d, width = %d, new value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val); + } + mutex_unlock(&data->lock); + return count; +} + +/*--------------------special file for debug---------------------- */ +static ssize_t system_cpld_debug_read(struct device *dev, struct device_attribute *attr, + char *buf){ + + return sprintf(buf, "%d\n", debug_flag); +} + + +static ssize_t system_cpld_debug_write(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + int temp; + int error; + + error = kstrtoint(buf, 10, &temp); + if (error){ + printk(KERN_INFO "%s: Conversion value = %s failed.\n", __FUNCTION__, buf); + return count; + } + debug_flag = temp; + + if(debug_flag) + printk("%s, debug_flag = %d\n", __FUNCTION__, debug_flag); + + return count; +} +SYSFS_MISC_RW_ATTR_DEF(debug, system_cpld_debug_read, system_cpld_debug_write) + + +/* ----------------define misc group---------------------------- */ +static struct attribute *misc_attributes[] = { + SYSFS_ATTR_PTR(mjr_rev), /* register: sys_cpld_rev */ + SYSFS_ATTR_PTR(mnr_rev), /* register: sys_cpld_rev */ + + SYSFS_ATTR_PTR(scrtch_reg), /* register: sys_cpld_gpr */ + + SYSFS_ATTR_PTR(brd_rev), /* register: cpu_brd_rev_type */ + SYSFS_ATTR_PTR(brd_type), /* register: cpu_brd_rev_type */ + + SYSFS_ATTR_PTR(ssd_present), /* register: sys_srr */ + SYSFS_ATTR_PTR(spi_cs_sel), /* register: sys_srr */ + SYSFS_ATTR_PTR(rst_bios_switch), /* register: sys_srr */ + SYSFS_ATTR_PTR(cpld_upgrade_rst), /* register: sys_srr */ + + SYSFS_ATTR_PTR(cpld_spi_wp), /* register: sys_eeprom_wp */ + SYSFS_ATTR_PTR(system_id_eeprom_wp), /* register: sys_eeprom_wp */ + SYSFS_ATTR_PTR(spi_me_wp), /* register: sys_eeprom_wp */ + SYSFS_ATTR_PTR(spi_bios_wp), /* register: sys_eeprom_wp */ + SYSFS_ATTR_PTR(spi_bak_bios_wp), /* register: sys_eeprom_wp */ + + SYSFS_ATTR_PTR(vrhot_irq_en), /* register: sys_irq */ + SYSFS_ATTR_PTR(cpu_thermtrip_irq_en), /* register: sys_irq */ + SYSFS_ATTR_PTR(temp_alert_irq_en), /* register: sys_irq */ + SYSFS_ATTR_PTR(vrhot_irq), /* register: sys_irq */ + SYSFS_ATTR_PTR(cpu_thermtrip_irq), /* register: sys_irq */ + SYSFS_ATTR_PTR(temp_alert_irq), /* register: sys_irq */ + + SYSFS_ATTR_PTR(wd_timer), /* register: sys_wd */ + SYSFS_ATTR_PTR(wd_en), /* register: sys_wd */ + SYSFS_ATTR_PTR(wd_punch), /* register: sys_wd */ + + SYSFS_ATTR_PTR(mb_rst_en), /* register: sys_mb_rst_en */ + + SYSFS_ATTR_PTR(pwr_v3p3_en), /* register: cpu_pwr_en_status */ + SYSFS_ATTR_PTR(pwr_vcc_vnn_en), /* register: cpu_pwr_en_status */ + SYSFS_ATTR_PTR(pwr_vccsram_en), /* register: cpu_pwr_en_status */ + SYSFS_ATTR_PTR(pwr_vddq_en), /* register: cpu_pwr_en_status */ + SYSFS_ATTR_PTR(pwr_vcc_ref_en), /* register: cpu_pwr_en_status */ + SYSFS_ATTR_PTR(pwr_v1p05_en), /* register: cpu_pwr_en_status */ + SYSFS_ATTR_PTR(pwr_v1p8_en), /* register: cpu_pwr_en_status */ + SYSFS_ATTR_PTR(pwr_v2p5_en), /* register: cpu_pwr_en_status */ + + SYSFS_ATTR_PTR(pg_v3p3), /* register: cpu_pwr_status */ + SYSFS_ATTR_PTR(pg_vcc_vnn), /* register: cpu_pwr_status */ + SYSFS_ATTR_PTR(pg_vccsram), /* register: cpu_pwr_status */ + SYSFS_ATTR_PTR(pg_vddq), /* register: cpu_pwr_status */ + SYSFS_ATTR_PTR(pg_vcc_ref), /* register: cpu_pwr_status */ + SYSFS_ATTR_PTR(pg_v1p05), /* register: cpu_pwr_status */ + SYSFS_ATTR_PTR(pg_v1p8), /* register: cpu_pwr_status */ + SYSFS_ATTR_PTR(pg_v2p5), /* register: cpu_pwr_status */ + + SYSFS_ATTR_PTR(debug), /* debug flag for print more messages */ + NULL +}; +static const struct attribute_group system_cpld_group_misc = { + .attrs = misc_attributes, +}; + +#ifdef CONFIG_DRV_SYSCPLD_WDT +/* + ***************************************************************************** + * + * Watchdog Driver + * + ***************************************************************************** + */ +/* wdt_timeout[] are defined by CPLD spec , -1 means researved + 300 sec is not supported */ +int wdt_timeout[]={15,30,60,90,120,180,240,300,-1,-1,-1,-1,-1,-1,-1,-1}; +#define WD_TIMO_MAX_NUM 16 +/* Default margin */ +#define WD_TIMO 30 + +static int wdt_margin = WD_TIMO; +module_param(wdt_margin, int, 0); +MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default " + __MODULE_STRING(WD_TIMO) "s)"); + +static unsigned long wdt_is_open; +static int boot_flag; + +/** + * wdt_ping: + * + * Reload counter one with the watchdog timeout. We don't bother reloading + * the cascade counter. + */ +static void wdt_ping(void) +{ + struct device *dev = &system_cpld->client->dev; + struct device_attribute *fake_attr=NULL; + char *buf="0";/* 0: punch is defined by CPLD spec */ + int err; + err = system_cpld_wd_punch_raw_write(dev, fake_attr, buf, (size_t)0); + if(err < 0){ + system_cpld_wd_punch_raw_write(dev, fake_attr, buf, (size_t)0); + } +} + +/** + * wdt_disable: + * + * disables watchdog. + */ +static void wdt_disable(void) +{ + struct device *dev = &system_cpld->client->dev; + struct device_attribute *fake_attr=NULL; + char *buf="0";/* 0: disable is defined by CPLD spec */ + int err; + err = system_cpld_wd_en_raw_write(dev, fake_attr, buf, (size_t)0); + if(err < 0){ + system_cpld_wd_en_raw_write(dev, fake_attr, buf, (size_t)0); + } +} + +/** + * wdt_enable: + * + * enables watchdog. + */ +static void wdt_enable(void) +{ + struct device *dev = &system_cpld->client->dev; + struct device_attribute *fake_attr=NULL; + char *buf="1";/* 1: enable is defined by CPLD spec */ + int err; + err = system_cpld_wd_en_raw_write(dev, fake_attr, buf, (size_t)0); + if(err < 0){ + system_cpld_wd_en_raw_write(dev, fake_attr, buf, (size_t)0); + } +} + +/** + * wdt_set_timeout: + * + * set watchdog timeout. + */ +static void wdt_set_timeout(int index) +{ + struct device *dev = &system_cpld->client->dev; + struct device_attribute *fake_attr=NULL; + char buf[1]; + if ( WD_TIMO_MAX_NUM == 16 ) { + sprintf(buf,"%x",index); + system_cpld_wd_timer_raw_write(dev, fake_attr, buf, (size_t)0); + } + else + printk(KERN_INFO "%s: It is out of spec.\n", __FUNCTION__); +} + +/** + * wdt_write: + * @file: file handle to the watchdog + * @buf: buffer to write (unused as data does not matter here + * @count: count of bytes + * @ppos: pointer to the position to write. No seeks allowed + * + * A write to a watchdog device is defined as a keepalive signal. Any + * write of data will do, as we we don't define content meaning. + */ +static ssize_t wdt_write(struct file *file, const char __user *buf, + size_t count, loff_t *ppos) +{ + if (count) { + wdt_ping(); + return 1; + } + return 0; +} + +/** + * wdt_ioctl: + * @inode: inode of the device + * @file: file handle to the device + * @cmd: watchdog command + * @arg: argument pointer + * + * The watchdog API defines a common set of functions for all watchdogs + * according to their available features. We only actually usefully support + * querying capabilities and current status. + */ +static int wdt_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) +{ + int new_margin, rv, i; + static struct watchdog_info ident = { + .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT, + .firmware_version = 1, + .identity = "SYS_CPLD WTD" + }; + + switch (cmd) { + case WDIOC_GETSUPPORT: + return copy_to_user((struct watchdog_info __user *)arg, &ident, + sizeof(ident)) ? -EFAULT : 0; + + case WDIOC_GETSTATUS: + case WDIOC_GETBOOTSTATUS: + return put_user(boot_flag, (int __user *)arg); + case WDIOC_KEEPALIVE: + wdt_ping(); + return 0; + case WDIOC_SETTIMEOUT: + if (get_user(new_margin, (int __user *)arg)) + return -EFAULT; + /* Arbitrary, can't find the card's limits */ + if (new_margin <= 1) + return -EINVAL; + for( i=0; i= WD_TIMO_MAX_NUM || i < 0 ) + return -EINVAL; + wdt_set_timeout(i); + case WDIOC_GETTIMEOUT: + return put_user(wdt_margin, (int __user *)arg); + + case WDIOC_SETOPTIONS: + if (copy_from_user(&rv, (int __user *)arg, sizeof(int))) + return -EFAULT; + + if (rv & WDIOS_DISABLECARD) { + pr_info("System CPLD: disable watchdog\n"); + wdt_disable(); + } + + if (rv & WDIOS_ENABLECARD) { + pr_info("System CPLD: enable watchdog\n"); + wdt_enable(); + } + return -EINVAL; + } + return -ENOTTY; +} + +static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) +{ + int ret; + + ret = wdt_ioctl(file, cmd, arg); + + return ret; +} + +/** + * wdt_open: + * @inode: inode of device + * @file: file handle to device + * + */ +static int wdt_open(struct inode *inode, struct file *file) +{ + if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) { + if (test_and_set_bit(0, &wdt_is_open)) { + return -EBUSY; + } + /* + * Activate + */ + + wdt_enable(); + return nonseekable_open(inode, file); + } + return -ENODEV; +} + +/** + * wdt_close: + * @inode: inode to board + * @file: file handle to board + * + */ +static int wdt_release(struct inode *inode, struct file *file) +{ + if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) + clear_bit(0, &wdt_is_open); + return 0; +} + +/** + * notify_sys: + * @this: our notifier block + * @code: the event being reported + * @unused: unused + * + * Our notifier is called on system shutdowns. We want to turn the card + * off at reboot otherwise the machine will reboot again during memory + * test or worse yet during the following fsck. This would suck, in fact + * trust me - if it happens it does suck. + */ +static int wdt_notify_sys(struct notifier_block *this, unsigned long code, + void *unused) +{ + if (code == SYS_DOWN || code == SYS_HALT) + /* Disable Watchdog */ + wdt_disable(); + return NOTIFY_DONE; +} + +static const struct file_operations wdt_fops = { + .owner = THIS_MODULE, + .llseek = no_llseek, + .write = wdt_write, + .unlocked_ioctl = wdt_unlocked_ioctl, + .open = wdt_open, + .release = wdt_release, +}; + +static struct miscdevice wdt_dev = { + .minor = WATCHDOG_MINOR, + .name = "watchdog", + .fops = &wdt_fops, +}; + +/* + * The WDT card needs to learn about soft shutdowns in order to + * turn the timebomb registers off. + */ +static struct notifier_block wdt_notifier = { + .notifier_call = wdt_notify_sys, +}; +#endif /* CONFIG_DRV_SYSCPLD_WDT */ + +static int system_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + int err; + + /* allocate memory to system_cpld */ + system_cpld = devm_kzalloc(&client->dev, sizeof(struct system_cpld_data) , GFP_KERNEL); + + if (!system_cpld) + return -ENOMEM; + + mutex_init(&system_cpld->lock); + + err = sysfs_create_group(&client->dev.kobj, &system_cpld_group_misc); + if (err){ + printk("%s: Error creeat misc group.\n", __FUNCTION__); + } + + system_cpld->client = client; + i2c_set_clientdata(client, system_cpld); + + printk(KERN_INFO "%s: System CPLD LCMXO3LF created.\n", __FUNCTION__); + +#ifdef CONFIG_DRV_SYSCPLD_WDT + err = misc_register(&wdt_dev); + if (err) + return err; + err = register_reboot_notifier(&wdt_notifier); + if (err) { + misc_deregister(&wdt_dev); + return err; + } + printk(KERN_INFO "%s: System CPLD watchdog created.\n", __FUNCTION__); +#endif + + return 0; + +} + +static int system_cpld_remove(struct i2c_client *client) +{ +#ifdef CONFIG_DRV_SYSCPLD_WDT + misc_deregister(&wdt_dev); + unregister_reboot_notifier(&wdt_notifier); +#endif + sysfs_remove_group(&client->dev.kobj, &system_cpld_group_misc); + + printk(KERN_INFO "%s: System CPLD removed.\n", __FUNCTION__); + return 0; +} + +static struct i2c_driver system_cpld_driver = { + .driver = { + .name = "system_cpld", + .owner = THIS_MODULE, + }, + .probe = system_cpld_probe, + .remove = system_cpld_remove, + .id_table = system_cpld_ids, +}; + +static int __init system_cpld_init(void) +{ + printk(KERN_INFO "%s: init.\n", __FUNCTION__); + return i2c_add_driver(&system_cpld_driver); +} +module_init(system_cpld_init); + +static void __exit system_cpld_exit(void) +{ + printk(KERN_INFO "%s: exit.\n", __FUNCTION__); + i2c_del_driver(&system_cpld_driver); +} +module_exit(system_cpld_exit); + +MODULE_DESCRIPTION("mitac_ly1200_32x_system_cpld driver"); +MODULE_AUTHOR("Eddy Weng "); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/pmbus.h new file mode 100644 index 00000000000..55cb8663e6e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/pmbus.h @@ -0,0 +1,366 @@ +#ifndef PMBUS_H +#define PMBUS_H + +/* + * Registers + */ +#define PMBUS_PAGE 0x00 +#define PMBUS_OPERATION 0x01 +#define PMBUS_ON_OFF_CONFIG 0x02 +#define PMBUS_CLEAR_FAULTS 0x03 +#define PMBUS_PHASE 0x04 + +#define PMBUS_CAPABILITY 0x19 +#define PMBUS_QUERY 0x1A + +#define PMBUS_VOUT_MODE 0x20 +#define PMBUS_VOUT_COMMAND 0x21 +#define PMBUS_VOUT_TRIM 0x22 +#define PMBUS_VOUT_CAL_OFFSET 0x23 +#define PMBUS_VOUT_MAX 0x24 +#define PMBUS_VOUT_MARGIN_HIGH 0x25 +#define PMBUS_VOUT_MARGIN_LOW 0x26 +#define PMBUS_VOUT_TRANSITION_RATE 0x27 +#define PMBUS_VOUT_DROOP 0x28 +#define PMBUS_VOUT_SCALE_LOOP 0x29 +#define PMBUS_VOUT_SCALE_MONITOR 0x2A + +#define PMBUS_COEFFICIENTS 0x30 +#define PMBUS_POUT_MAX 0x31 + +#define PMBUS_FAN_CONFIG_12 0x3A +#define PMBUS_FAN_COMMAND_1 0x3B +#define PMBUS_FAN_COMMAND_2 0x3C +#define PMBUS_FAN_CONFIG_34 0x3D +#define PMBUS_FAN_COMMAND_3 0x3E +#define PMBUS_FAN_COMMAND_4 0x3F + +#define PMBUS_VOUT_OV_FAULT_LIMIT 0x40 +#define PMBUS_VOUT_OV_FAULT_RESPONSE 0x41 +#define PMBUS_VOUT_OV_WARN_LIMIT 0x42 +#define PMBUS_VOUT_UV_WARN_LIMIT 0x43 +#define PMBUS_VOUT_UV_FAULT_LIMIT 0x44 +#define PMBUS_VOUT_UV_FAULT_RESPONSE 0x45 +#define PMBUS_IOUT_OC_FAULT_LIMIT 0x46 +#define PMBUS_IOUT_OC_FAULT_RESPONSE 0x47 +#define PMBUS_IOUT_OC_LV_FAULT_LIMIT 0x48 +#define PMBUS_IOUT_OC_LV_FAULT_RESPONSE 0x49 +#define PMBUS_IOUT_OC_WARN_LIMIT 0x4A +#define PMBUS_IOUT_UC_FAULT_LIMIT 0x4B +#define PMBUS_IOUT_UC_FAULT_RESPONSE 0x4C + +#define PMBUS_OT_FAULT_LIMIT 0x4F +#define PMBUS_OT_FAULT_RESPONSE 0x50 +#define PMBUS_OT_WARN_LIMIT 0x51 +#define PMBUS_UT_WARN_LIMIT 0x52 +#define PMBUS_UT_FAULT_LIMIT 0x53 +#define PMBUS_UT_FAULT_RESPONSE 0x54 +#define PMBUS_VIN_OV_FAULT_LIMIT 0x55 +#define PMBUS_VIN_OV_FAULT_RESPONSE 0x56 +#define PMBUS_VIN_OV_WARN_LIMIT 0x57 +#define PMBUS_VIN_UV_WARN_LIMIT 0x58 +#define PMBUS_VIN_UV_FAULT_LIMIT 0x59 + +#define PMBUS_IIN_OC_FAULT_LIMIT 0x5B +#define PMBUS_IIN_OC_WARN_LIMIT 0x5D + +#define PMBUS_POUT_OP_FAULT_LIMIT 0x68 +#define PMBUS_POUT_OP_WARN_LIMIT 0x6A +#define PMBUS_PIN_OP_WARN_LIMIT 0x6B + +#define PMBUS_STATUS_BYTE 0x78 +#define PMBUS_STATUS_WORD 0x79 +#define PMBUS_STATUS_VOUT 0x7A +#define PMBUS_STATUS_IOUT 0x7B +#define PMBUS_STATUS_INPUT 0x7C +#define PMBUS_STATUS_TEMPERATURE 0x7D +#define PMBUS_STATUS_CML 0x7E +#define PMBUS_STATUS_OTHER 0x7F +#define PMBUS_STATUS_MFR_SPECIFIC 0x80 +#define PMBUS_STATUS_FAN_12 0x81 +#define PMBUS_STATUS_FAN_34 0x82 + +#define PMBUS_READ_VIN 0x88 +#define PMBUS_READ_IIN 0x89 +#define PMBUS_READ_VCAP 0x8A +#define PMBUS_READ_VOUT 0x8B +#define PMBUS_READ_IOUT 0x8C +#define PMBUS_READ_TEMPERATURE_1 0x8D +#define PMBUS_READ_TEMPERATURE_2 0x8E +#define PMBUS_READ_TEMPERATURE_3 0x8F +#define PMBUS_READ_FAN_SPEED_1 0x90 +#define PMBUS_READ_FAN_SPEED_2 0x91 +#define PMBUS_READ_FAN_SPEED_3 0x92 +#define PMBUS_READ_FAN_SPEED_4 0x93 +#define PMBUS_READ_DUTY_CYCLE 0x94 +#define PMBUS_READ_FREQUENCY 0x95 +#define PMBUS_READ_POUT 0x96 +#define PMBUS_READ_PIN 0x97 + +#define PMBUS_REVISION 0x98 +#define PMBUS_MFR_ID 0x99 +#define PMBUS_MFR_MODEL 0x9A +#define PMBUS_MFR_REVISION 0x9B +#define PMBUS_MFR_LOCATION 0x9C +#define PMBUS_MFR_DATE 0x9D +#define PMBUS_MFR_SERIAL 0x9E + +/* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ +#define PMBUS_VIRT_BASE 0x100 +#define PMBUS_VIRT_READ_TEMP_AVG (PMBUS_VIRT_BASE + 0) +#define PMBUS_VIRT_READ_TEMP_MIN (PMBUS_VIRT_BASE + 1) +#define PMBUS_VIRT_READ_TEMP_MAX (PMBUS_VIRT_BASE + 2) +#define PMBUS_VIRT_RESET_TEMP_HISTORY (PMBUS_VIRT_BASE + 3) +#define PMBUS_VIRT_READ_VIN_AVG (PMBUS_VIRT_BASE + 4) +#define PMBUS_VIRT_READ_VIN_MIN (PMBUS_VIRT_BASE + 5) +#define PMBUS_VIRT_READ_VIN_MAX (PMBUS_VIRT_BASE + 6) +#define PMBUS_VIRT_RESET_VIN_HISTORY (PMBUS_VIRT_BASE + 7) +#define PMBUS_VIRT_READ_IIN_AVG (PMBUS_VIRT_BASE + 8) +#define PMBUS_VIRT_READ_IIN_MIN (PMBUS_VIRT_BASE + 9) +#define PMBUS_VIRT_READ_IIN_MAX (PMBUS_VIRT_BASE + 10) +#define PMBUS_VIRT_RESET_IIN_HISTORY (PMBUS_VIRT_BASE + 11) +#define PMBUS_VIRT_READ_PIN_AVG (PMBUS_VIRT_BASE + 12) +#define PMBUS_VIRT_READ_PIN_MAX (PMBUS_VIRT_BASE + 13) +#define PMBUS_VIRT_RESET_PIN_HISTORY (PMBUS_VIRT_BASE + 14) +#define PMBUS_VIRT_READ_POUT_AVG (PMBUS_VIRT_BASE + 15) +#define PMBUS_VIRT_READ_POUT_MAX (PMBUS_VIRT_BASE + 16) +#define PMBUS_VIRT_RESET_POUT_HISTORY (PMBUS_VIRT_BASE + 17) +#define PMBUS_VIRT_READ_VOUT_AVG (PMBUS_VIRT_BASE + 18) +#define PMBUS_VIRT_READ_VOUT_MIN (PMBUS_VIRT_BASE + 19) +#define PMBUS_VIRT_READ_VOUT_MAX (PMBUS_VIRT_BASE + 20) +#define PMBUS_VIRT_RESET_VOUT_HISTORY (PMBUS_VIRT_BASE + 21) +#define PMBUS_VIRT_READ_IOUT_AVG (PMBUS_VIRT_BASE + 22) +#define PMBUS_VIRT_READ_IOUT_MIN (PMBUS_VIRT_BASE + 23) +#define PMBUS_VIRT_READ_IOUT_MAX (PMBUS_VIRT_BASE + 24) +#define PMBUS_VIRT_RESET_IOUT_HISTORY (PMBUS_VIRT_BASE + 25) +#define PMBUS_VIRT_READ_TEMP2_AVG (PMBUS_VIRT_BASE + 26) +#define PMBUS_VIRT_READ_TEMP2_MIN (PMBUS_VIRT_BASE + 27) +#define PMBUS_VIRT_READ_TEMP2_MAX (PMBUS_VIRT_BASE + 28) +#define PMBUS_VIRT_RESET_TEMP2_HISTORY (PMBUS_VIRT_BASE + 29) + +#define PMBUS_VIRT_READ_VMON (PMBUS_VIRT_BASE + 30) +#define PMBUS_VIRT_VMON_UV_WARN_LIMIT (PMBUS_VIRT_BASE + 31) +#define PMBUS_VIRT_VMON_OV_WARN_LIMIT (PMBUS_VIRT_BASE + 32) +#define PMBUS_VIRT_VMON_UV_FAULT_LIMIT (PMBUS_VIRT_BASE + 33) +#define PMBUS_VIRT_VMON_OV_FAULT_LIMIT (PMBUS_VIRT_BASE + 34) +#define PMBUS_VIRT_STATUS_VMON (PMBUS_VIRT_BASE + 35) + +/* + * CAPABILITY + */ +#define PB_CAPABILITY_SMBALERT (1<<4) +#define PB_CAPABILITY_ERROR_CHECK (1<<7) + +/* + * VOUT_MODE + */ +#define PB_VOUT_MODE_MODE_MASK 0xe0 +#define PB_VOUT_MODE_PARAM_MASK 0x1f + +#define PB_VOUT_MODE_LINEAR 0x00 +#define PB_VOUT_MODE_VID 0x20 +#define PB_VOUT_MODE_DIRECT 0x40 + +/* + * Fan configuration + */ +#define PB_FAN_2_PULSE_MASK ((1 << 0) | (1 << 1)) +#define PB_FAN_2_RPM (1 << 2) +#define PB_FAN_2_INSTALLED (1 << 3) +#define PB_FAN_1_PULSE_MASK ((1 << 4) | (1 << 5)) +#define PB_FAN_1_RPM (1 << 6) +#define PB_FAN_1_INSTALLED (1 << 7) + +/* + * STATUS_BYTE, STATUS_WORD (lower) + */ +#define PB_STATUS_NONE_ABOVE (1<<0) +#define PB_STATUS_CML (1<<1) +#define PB_STATUS_TEMPERATURE (1<<2) +#define PB_STATUS_VIN_UV (1<<3) +#define PB_STATUS_IOUT_OC (1<<4) +#define PB_STATUS_VOUT_OV (1<<5) +#define PB_STATUS_OFF (1<<6) +#define PB_STATUS_BUSY (1<<7) + +/* + * STATUS_WORD (upper) + */ +#define PB_STATUS_UNKNOWN (1<<8) +#define PB_STATUS_OTHER (1<<9) +#define PB_STATUS_FANS (1<<10) +#define PB_STATUS_POWER_GOOD_N (1<<11) +#define PB_STATUS_WORD_MFR (1<<12) +#define PB_STATUS_INPUT (1<<13) +#define PB_STATUS_IOUT_POUT (1<<14) +#define PB_STATUS_VOUT (1<<15) + +/* + * STATUS_IOUT + */ +#define PB_POUT_OP_WARNING (1<<0) +#define PB_POUT_OP_FAULT (1<<1) +#define PB_POWER_LIMITING (1<<2) +#define PB_CURRENT_SHARE_FAULT (1<<3) +#define PB_IOUT_UC_FAULT (1<<4) +#define PB_IOUT_OC_WARNING (1<<5) +#define PB_IOUT_OC_LV_FAULT (1<<6) +#define PB_IOUT_OC_FAULT (1<<7) + +/* + * STATUS_VOUT, STATUS_INPUT + */ +#define PB_VOLTAGE_UV_FAULT (1<<4) +#define PB_VOLTAGE_UV_WARNING (1<<5) +#define PB_VOLTAGE_OV_WARNING (1<<6) +#define PB_VOLTAGE_OV_FAULT (1<<7) + +/* + * STATUS_INPUT + */ +#define PB_PIN_OP_WARNING (1<<0) +#define PB_IIN_OC_WARNING (1<<1) +#define PB_IIN_OC_FAULT (1<<2) + +/* + * STATUS_TEMPERATURE + */ +#define PB_TEMP_UT_FAULT (1<<4) +#define PB_TEMP_UT_WARNING (1<<5) +#define PB_TEMP_OT_WARNING (1<<6) +#define PB_TEMP_OT_FAULT (1<<7) + +/* + * STATUS_FAN + */ +#define PB_FAN_AIRFLOW_WARNING (1<<0) +#define PB_FAN_AIRFLOW_FAULT (1<<1) +#define PB_FAN_FAN2_SPEED_OVERRIDE (1<<2) +#define PB_FAN_FAN1_SPEED_OVERRIDE (1<<3) +#define PB_FAN_FAN2_WARNING (1<<4) +#define PB_FAN_FAN1_WARNING (1<<5) +#define PB_FAN_FAN2_FAULT (1<<6) +#define PB_FAN_FAN1_FAULT (1<<7) + +/* + * CML_FAULT_STATUS + */ +#define PB_CML_FAULT_OTHER_MEM_LOGIC (1<<0) +#define PB_CML_FAULT_OTHER_COMM (1<<1) +#define PB_CML_FAULT_PROCESSOR (1<<3) +#define PB_CML_FAULT_MEMORY (1<<4) +#define PB_CML_FAULT_PACKET_ERROR (1<<5) +#define PB_CML_FAULT_INVALID_DATA (1<<6) +#define PB_CML_FAULT_INVALID_COMMAND (1<<7) + +enum pmbus_sensor_classes { + PSC_VOLTAGE_IN = 0, + PSC_VOLTAGE_OUT, + PSC_CURRENT_IN, + PSC_CURRENT_OUT, + PSC_POWER, + PSC_TEMPERATURE, + PSC_FAN, + PSC_NUM_CLASSES /* Number of power sensor classes */ +}; + +#define PMBUS_PAGES 32 /* Per PMBus specification */ + +/* Functionality bit mask */ +#define PMBUS_HAVE_VIN (1 << 0) +#define PMBUS_HAVE_VCAP (1 << 1) +#define PMBUS_HAVE_VOUT (1 << 2) +#define PMBUS_HAVE_IIN (1 << 3) +#define PMBUS_HAVE_IOUT (1 << 4) +#define PMBUS_HAVE_PIN (1 << 5) +#define PMBUS_HAVE_POUT (1 << 6) +#define PMBUS_HAVE_FAN12 (1 << 7) +#define PMBUS_HAVE_FAN34 (1 << 8) +#define PMBUS_HAVE_TEMP (1 << 9) +#define PMBUS_HAVE_TEMP2 (1 << 10) +#define PMBUS_HAVE_TEMP3 (1 << 11) +#define PMBUS_HAVE_STATUS_VOUT (1 << 12) +#define PMBUS_HAVE_STATUS_IOUT (1 << 13) +#define PMBUS_HAVE_STATUS_INPUT (1 << 14) +#define PMBUS_HAVE_STATUS_TEMP (1 << 15) +#define PMBUS_HAVE_STATUS_FAN12 (1 << 16) +#define PMBUS_HAVE_STATUS_FAN34 (1 << 17) +#define PMBUS_HAVE_VMON (1 << 18) +#define PMBUS_HAVE_STATUS_VMON (1 << 19) + +enum pmbus_data_format { linear = 0, direct, vid }; + +struct pmbus_driver_info { + int pages; /* Total number of pages */ + enum pmbus_data_format format[PSC_NUM_CLASSES]; + /* + * Support one set of coefficients for each sensor type + * Used for chips providing data in direct mode. + */ + int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ + int b[PSC_NUM_CLASSES]; /* offset */ + int R[PSC_NUM_CLASSES]; /* exponent */ + + u32 func[PMBUS_PAGES]; /* Functionality, per page */ + /* + * The following functions map manufacturing specific register values + * to PMBus standard register values. Specify only if mapping is + * necessary. + * Functions return the register value (read) or zero (write) if + * successful. A return value of -ENODATA indicates that there is no + * manufacturer specific register, but that a standard PMBus register + * may exist. Any other negative return value indicates that the + * register does not exist, and that no attempt should be made to read + * the standard register. + */ + int (*read_byte_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int reg); + int (*write_word_data)(struct i2c_client *client, int page, int reg, + u16 word); + int (*write_byte)(struct i2c_client *client, int page, u8 value); + /* + * The identify function determines supported PMBus functionality. + * This function is only necessary if a chip driver supports multiple + * chips, and the chip functionality is not pre-determined. + */ + int (*identify)(struct i2c_client *client, + struct pmbus_driver_info *info); +}; + +/* Function declarations */ + +void pmbus_clear_cache(struct i2c_client *client); +int pmbus_set_page(struct i2c_client *client, u8 page); +int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg); +int pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg, u16 word); +int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); +int pmbus_write_byte(struct i2c_client *client, int page, u8 value); +void pmbus_clear_faults(struct i2c_client *client); +bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); +bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); +int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, + struct pmbus_driver_info *info); +int pmbus_do_remove(struct i2c_client *client); +const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client + *client); + +#endif /* PMBUS_H */ diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/slave_cpld_reg.h b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/slave_cpld_reg.h new file mode 100644 index 00000000000..a8169bdb88e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/slave_cpld_reg.h @@ -0,0 +1,192 @@ +#ifndef __SLAVE_CPLD_REG +#define __SLAVE_CPLD_REG + +static int slave_cpld_raw_read(struct device *dev, struct device_attribute *attr, char *buf, + int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name); +static int slave_cpld_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count, + int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name); + +/* generic CPLD read function */ +#define FLD_RAW_RD_FUNC(_reg, _fld, _wdh) static ssize_t \ +slave_cpld_##_fld##_raw_read(struct device *dev, struct device_attribute *attr, char *buf) { \ + return slave_cpld_raw_read(dev, attr, buf, _reg##_offset, _reg##_width, _fld##_shift, _fld##_width, _fld##_mask, #_reg); \ +} + +/* generic CPLD write function */ +#define FLD_RAW_WR_FUNC(_reg, _fld, _wdh) static ssize_t \ +slave_cpld_##_fld##_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { \ + return slave_cpld_raw_write(dev, attr, buf, count, _reg##_offset, _reg##_width, _fld##_shift, _fld##_width, _fld##_mask, #_reg); \ +} + +/* CPLD register definition macros */ +#define REG_DEF(_reg, _off, _wdh) \ +static unsigned int _reg##_offset = (unsigned int)(_off); \ +static unsigned int _reg##_width = (unsigned int)(_wdh); + +/* CPLD register field definition macros, with generic read/write function */ +#define FLD_RAW_RO_DEF(_reg, _fld, _sft, _wdh) \ +static unsigned int _fld##_shift = (unsigned int)(_sft); \ +static unsigned int _fld##_width = (unsigned int)(_wdh); \ +static unsigned int _fld##_mask = ((((unsigned int)1) << (_wdh)) - 1); \ +FLD_RAW_RD_FUNC(_reg, _fld, _wdh) + +#define FLD_RAW_RW_DEF(_reg, _fld, _sft, _wdh) \ +static unsigned int _fld##_shift = (unsigned int)(_sft); \ +static unsigned int _fld##_width = (unsigned int)(_wdh); \ +static unsigned int _fld##_mask = ((((unsigned int)1) << (_wdh)) - 1); \ +FLD_RAW_RD_FUNC(_reg, _fld, _wdh) FLD_RAW_WR_FUNC(_reg, _fld, _wdh) + +/* declare slave CPLD registers */ +/* register name offset width */ +/* --------------------------------------- ------- ----- */ +REG_DEF( slv_cpld_rev, 0x00, 8) +REG_DEF( slv_cpld_gpr, 0x01, 8) +REG_DEF( mb_brd_rev_type, 0x02, 8) + +REG_DEF( zqsfp28_present_24_17_status, 0x10, 8) +REG_DEF( zqsfp28_present_32_25_status, 0x11, 8) +REG_DEF( zqsfp28_rst_24_17, 0x12, 8) +REG_DEF( zqsfp28_rst_32_25, 0x13, 8) +REG_DEF( zqsfp28_modsel_24_17, 0x14, 8) +REG_DEF( zqsfp28_modsel_32_25, 0x15, 8) +REG_DEF( zqsfp28_lpmode_24_17, 0x16, 8) +REG_DEF( zqsfp28_lpmode_32_25, 0x17, 8) +REG_DEF( zqsfp28_irq_24_17_status, 0x18, 8) +REG_DEF( zqsfp28_irq_32_25_status, 0x19, 8) +REG_DEF( zqsfp28_irq_msk_24_17_status, 0x1A, 8) +REG_DEF( zqsfp28_irq_msk_32_25_status, 0x1B, 8) + + +/* declare slave CPLD register's fields */ +/* register name field name shift width */ +/* ---------------------- ---------------- ------ ----- */ +FLD_RAW_RO_DEF( slv_cpld_rev, mjr_rev, 4, 4) +FLD_RAW_RO_DEF( slv_cpld_rev, mnr_rev, 0, 4) + +FLD_RAW_RW_DEF( slv_cpld_gpr, scrtch_reg, 0, 8) + +FLD_RAW_RO_DEF( mb_brd_rev_type, brd_rev, 4, 4) +FLD_RAW_RO_DEF( mb_brd_rev_type, brd_type, 0, 4) + +FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port24_present, 7, 1) +FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port23_present, 6, 1) +FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port22_present, 5, 1) +FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port21_present, 4, 1) +FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port20_present, 3, 1) +FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port19_present, 2, 1) +FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port18_present, 1, 1) +FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port17_present, 0, 1) + +FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port32_present, 7, 1) +FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port31_present, 6, 1) +FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port30_present, 5, 1) +FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port29_present, 4, 1) +FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port28_present, 3, 1) +FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port27_present, 2, 1) +FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port26_present, 1, 1) +FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port25_present, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port24_rst, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port23_rst, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port22_rst, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port21_rst, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port20_rst, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port19_rst, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port18_rst, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port17_rst, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port32_rst, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port31_rst, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port30_rst, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port29_rst, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port28_rst, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port27_rst, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port26_rst, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port25_rst, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port24_modsel, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port23_modsel, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port22_modsel, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port21_modsel, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port20_modsel, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port19_modsel, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port18_modsel, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port17_modsel, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port32_modsel, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port31_modsel, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port30_modsel, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port29_modsel, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port28_modsel, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port27_modsel, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port26_modsel, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port25_modsel, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port24_lpmode, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port23_lpmode, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port22_lpmode, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port21_lpmode, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port20_lpmode, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port19_lpmode, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port18_lpmode, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port17_lpmode, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port32_lpmode, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port31_lpmode, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port30_lpmode, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port29_lpmode, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port28_lpmode, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port27_lpmode, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port26_lpmode, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port25_lpmode, 0, 1) + +FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port24_irq_status, 7, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port23_irq_status, 6, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port22_irq_status, 5, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port21_irq_status, 4, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port20_irq_status, 3, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port19_irq_status, 2, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port18_irq_status, 1, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port17_irq_status, 0, 1) + +FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port32_irq_status, 7, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port31_irq_status, 6, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port30_irq_status, 5, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port29_irq_status, 4, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port28_irq_status, 3, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port27_irq_status, 2, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port26_irq_status, 1, 1) +FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port25_irq_status, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port24_irq_msk, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port23_irq_msk, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port22_irq_msk, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port21_irq_msk, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port20_irq_msk, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port19_irq_msk, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port18_irq_msk, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port17_irq_msk, 0, 1) + +FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port32_irq_msk, 7, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port31_irq_msk, 6, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port30_irq_msk, 5, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port29_irq_msk, 4, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port28_irq_msk, 3, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port27_irq_msk, 2, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port26_irq_msk, 1, 1) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port25_irq_msk, 0, 1) + +FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port_17_24_present, 0, 8) +FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port_25_32_present, 0, 8) +FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port_17_24_rst, 0, 8) +FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port_25_32_rst, 0, 8) +FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port_17_24_modsel, 0, 8) +FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port_25_32_modsel, 0, 8) +FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port_17_24_irq_status,0, 8) +FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port_25_32_irq_status,0, 8) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port_17_24_irq_msk, 0, 8) +FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port_25_32_irq_msk, 0, 8) +FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port_17_24_lpmode, 0, 8) +FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port_25_32_lpmode, 0, 8) + +#endif /* __SLAVE_CPLD_REG */ diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/slave_cpld_sysfs.h b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/slave_cpld_sysfs.h new file mode 100644 index 00000000000..92d00d29d49 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/slave_cpld_sysfs.h @@ -0,0 +1,155 @@ +#ifndef __SLAVE_CPLD_SYSFS +#define __SLAVE_CPLD_SYSFS + +/* generic CPLD sysfs file definition macros */ +#define SYSFS_RAW_RO_ATTR_DEF(field) \ +struct device_attribute field \ + = __ATTR(field, S_IRUGO, slave_cpld_##field##_raw_read, NULL); + +#define SYSFS_RAW_RW_ATTR_DEF(field) \ +struct device_attribute field \ + = __ATTR(field, S_IRUGO | S_IWUGO, slave_cpld_##field##_raw_read, slave_cpld_##field##_raw_write); + +#define SYSFS_MISC_RO_ATTR_DEF(field, _read) \ +struct device_attribute field \ + = __ATTR(field, S_IRUGO, _read, NULL); + +#define SYSFS_MISC_RW_ATTR_DEF(field, _read, _write) \ +struct device_attribute field \ + = __ATTR(field, S_IRUGO | S_IWUGO, _read, _write); + +#define SYSFS_ATTR_PTR(field) \ +&field.attr + + +/* declare slave CPLD file system */ +SYSFS_RAW_RO_ATTR_DEF(mjr_rev) +SYSFS_RAW_RO_ATTR_DEF(mnr_rev) + +SYSFS_RAW_RW_ATTR_DEF(scrtch_reg) + +SYSFS_RAW_RO_ATTR_DEF(brd_rev) +SYSFS_RAW_RO_ATTR_DEF(brd_type) + +SYSFS_RAW_RO_ATTR_DEF(port24_present) +SYSFS_RAW_RO_ATTR_DEF(port23_present) +SYSFS_RAW_RO_ATTR_DEF(port22_present) +SYSFS_RAW_RO_ATTR_DEF(port21_present) +SYSFS_RAW_RO_ATTR_DEF(port20_present) +SYSFS_RAW_RO_ATTR_DEF(port19_present) +SYSFS_RAW_RO_ATTR_DEF(port18_present) +SYSFS_RAW_RO_ATTR_DEF(port17_present) + +SYSFS_RAW_RO_ATTR_DEF(port32_present) +SYSFS_RAW_RO_ATTR_DEF(port31_present) +SYSFS_RAW_RO_ATTR_DEF(port30_present) +SYSFS_RAW_RO_ATTR_DEF(port29_present) +SYSFS_RAW_RO_ATTR_DEF(port28_present) +SYSFS_RAW_RO_ATTR_DEF(port27_present) +SYSFS_RAW_RO_ATTR_DEF(port26_present) +SYSFS_RAW_RO_ATTR_DEF(port25_present) + +SYSFS_RAW_RW_ATTR_DEF(port24_rst) +SYSFS_RAW_RW_ATTR_DEF(port23_rst) +SYSFS_RAW_RW_ATTR_DEF(port22_rst) +SYSFS_RAW_RW_ATTR_DEF(port21_rst) +SYSFS_RAW_RW_ATTR_DEF(port20_rst) +SYSFS_RAW_RW_ATTR_DEF(port19_rst) +SYSFS_RAW_RW_ATTR_DEF(port18_rst) +SYSFS_RAW_RW_ATTR_DEF(port17_rst) + +SYSFS_RAW_RW_ATTR_DEF(port32_rst) +SYSFS_RAW_RW_ATTR_DEF(port31_rst) +SYSFS_RAW_RW_ATTR_DEF(port30_rst) +SYSFS_RAW_RW_ATTR_DEF(port29_rst) +SYSFS_RAW_RW_ATTR_DEF(port28_rst) +SYSFS_RAW_RW_ATTR_DEF(port27_rst) +SYSFS_RAW_RW_ATTR_DEF(port26_rst) +SYSFS_RAW_RW_ATTR_DEF(port25_rst) + +SYSFS_RAW_RW_ATTR_DEF(port24_modsel) +SYSFS_RAW_RW_ATTR_DEF(port23_modsel) +SYSFS_RAW_RW_ATTR_DEF(port22_modsel) +SYSFS_RAW_RW_ATTR_DEF(port21_modsel) +SYSFS_RAW_RW_ATTR_DEF(port20_modsel) +SYSFS_RAW_RW_ATTR_DEF(port19_modsel) +SYSFS_RAW_RW_ATTR_DEF(port18_modsel) +SYSFS_RAW_RW_ATTR_DEF(port17_modsel) + +SYSFS_RAW_RW_ATTR_DEF(port32_modsel) +SYSFS_RAW_RW_ATTR_DEF(port31_modsel) +SYSFS_RAW_RW_ATTR_DEF(port30_modsel) +SYSFS_RAW_RW_ATTR_DEF(port29_modsel) +SYSFS_RAW_RW_ATTR_DEF(port28_modsel) +SYSFS_RAW_RW_ATTR_DEF(port27_modsel) +SYSFS_RAW_RW_ATTR_DEF(port26_modsel) +SYSFS_RAW_RW_ATTR_DEF(port25_modsel) + +SYSFS_RAW_RW_ATTR_DEF(port24_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port23_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port22_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port21_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port20_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port19_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port18_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port17_lpmode) + +SYSFS_RAW_RW_ATTR_DEF(port32_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port31_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port30_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port29_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port28_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port27_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port26_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port25_lpmode) + +SYSFS_RAW_RO_ATTR_DEF(port24_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port23_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port22_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port21_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port20_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port19_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port18_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port17_irq_status) + +SYSFS_RAW_RO_ATTR_DEF(port32_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port31_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port30_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port29_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port28_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port27_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port26_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port25_irq_status) + +SYSFS_RAW_RW_ATTR_DEF(port24_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port23_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port22_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port21_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port20_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port19_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port18_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port17_irq_msk) + +SYSFS_RAW_RW_ATTR_DEF(port32_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port31_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port30_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port29_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port28_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port27_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port26_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port25_irq_msk) + +SYSFS_RAW_RO_ATTR_DEF(port_17_24_present) +SYSFS_RAW_RO_ATTR_DEF(port_25_32_present) +SYSFS_RAW_RW_ATTR_DEF(port_17_24_rst) +SYSFS_RAW_RW_ATTR_DEF(port_25_32_rst) +SYSFS_RAW_RW_ATTR_DEF(port_17_24_modsel) +SYSFS_RAW_RW_ATTR_DEF(port_25_32_modsel) +SYSFS_RAW_RO_ATTR_DEF(port_17_24_irq_status) +SYSFS_RAW_RO_ATTR_DEF(port_25_32_irq_status) +SYSFS_RAW_RW_ATTR_DEF(port_17_24_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port_25_32_irq_msk) +SYSFS_RAW_RW_ATTR_DEF(port_17_24_lpmode) +SYSFS_RAW_RW_ATTR_DEF(port_25_32_lpmode) + +#endif /* __SLAVE_CPLD_SYSFS */ diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/system_cpld_reg.h b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/system_cpld_reg.h new file mode 100644 index 00000000000..ba66519efe8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/system_cpld_reg.h @@ -0,0 +1,107 @@ +#ifndef __SYSTEM_CPLD_REG +#define __SYSTEM_CPLD_REG + +static int system_cpld_raw_read(struct device *dev, struct device_attribute *attr, char *buf, + int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name); +static int system_cpld_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count, + int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name); + +/* generic CPLD read function */ +#define FLD_RAW_RD_FUNC(_reg, _fld, _wdh) static ssize_t \ +system_cpld_##_fld##_raw_read(struct device *dev, struct device_attribute *attr, char *buf) { \ + return system_cpld_raw_read(dev, attr, buf, _reg##_offset, _reg##_width, _fld##_shift, _fld##_width, _fld##_mask, #_reg); \ +} + +/* generic CPLD write function */ +#define FLD_RAW_WR_FUNC(_reg, _fld, _wdh) static ssize_t \ +system_cpld_##_fld##_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { \ + return system_cpld_raw_write(dev, attr, buf, count, _reg##_offset, _reg##_width, _fld##_shift, _fld##_width, _fld##_mask, #_reg); \ +} + +/* CPLD register definition macros */ +#define REG_DEF(_reg, _off, _wdh) \ +static unsigned int _reg##_offset = (unsigned int)(_off); \ +static unsigned int _reg##_width = (unsigned int)(_wdh); + +/* CPLD register field definition macros, with generic read/write function */ +#define FLD_RAW_RO_DEF(_reg, _fld, _sft, _wdh) \ +static unsigned int _fld##_shift = (unsigned int)(_sft); \ +static unsigned int _fld##_width = (unsigned int)(_wdh); \ +static unsigned int _fld##_mask = ((((unsigned int)1) << (_wdh)) - 1); \ +FLD_RAW_RD_FUNC(_reg, _fld, _wdh) + +#define FLD_RAW_RW_DEF(_reg, _fld, _sft, _wdh) \ +static unsigned int _fld##_shift = (unsigned int)(_sft); \ +static unsigned int _fld##_width = (unsigned int)(_wdh); \ +static unsigned int _fld##_mask = ((((unsigned int)1) << (_wdh)) - 1); \ +FLD_RAW_RD_FUNC(_reg, _fld, _wdh) FLD_RAW_WR_FUNC(_reg, _fld, _wdh) + +/* declare system CPLD registers */ +/* register name offset width */ +/* --------------------------------------- ------- ----- */ +REG_DEF( sys_cpld_rev, 0x00, 8) +REG_DEF( sys_cpld_gpr, 0x01, 8) +REG_DEF( cpu_brd_rev_type, 0x02, 8) +REG_DEF( sys_srr, 0x03, 8) +REG_DEF( sys_eeprom_wp, 0x04, 8) +REG_DEF( sys_irq, 0x05, 8) +REG_DEF( sys_wd, 0x06, 8) +REG_DEF( sys_mb_rst_en, 0x07, 8) +REG_DEF( cpu_pwr_en_status, 0x08, 8) +REG_DEF( cpu_pwr_status, 0x09, 8) + + +/* declare system CPLD register's fields */ +/* register name field name shift width */ +/* ---------------------- ---------------- ------ ----- */ +FLD_RAW_RO_DEF( sys_cpld_rev, mjr_rev, 4, 4) +FLD_RAW_RO_DEF( sys_cpld_rev, mnr_rev, 0, 4) + +FLD_RAW_RW_DEF( sys_cpld_gpr, scrtch_reg, 0, 8) + +FLD_RAW_RO_DEF( cpu_brd_rev_type, brd_rev, 4, 4) +FLD_RAW_RO_DEF( cpu_brd_rev_type, brd_type, 0, 4) + +FLD_RAW_RO_DEF( sys_srr, ssd_present, 3, 1) +FLD_RAW_RW_DEF( sys_srr, spi_cs_sel, 2, 1) +FLD_RAW_RW_DEF( sys_srr, rst_bios_switch, 1, 1) +FLD_RAW_RW_DEF( sys_srr, cpld_upgrade_rst, 0, 1) + +FLD_RAW_RW_DEF( sys_eeprom_wp, cpld_spi_wp, 4, 1) +FLD_RAW_RW_DEF( sys_eeprom_wp, system_id_eeprom_wp, 3, 1) +FLD_RAW_RW_DEF( sys_eeprom_wp, spi_me_wp, 2, 1) +FLD_RAW_RW_DEF( sys_eeprom_wp, spi_bios_wp, 1, 1) +FLD_RAW_RW_DEF( sys_eeprom_wp, spi_bak_bios_wp, 0, 1) + +FLD_RAW_RW_DEF( sys_irq, vrhot_irq_en, 6, 1) +FLD_RAW_RW_DEF( sys_irq, cpu_thermtrip_irq_en,5, 1) +FLD_RAW_RW_DEF( sys_irq, temp_alert_irq_en, 4, 1) +FLD_RAW_RO_DEF( sys_irq, vrhot_irq, 2, 1) +FLD_RAW_RO_DEF( sys_irq, cpu_thermtrip_irq, 1, 1) +FLD_RAW_RO_DEF( sys_irq, temp_alert_irq, 0, 1) + +FLD_RAW_RW_DEF( sys_wd, wd_timer, 4, 4) +FLD_RAW_RW_DEF( sys_wd, wd_en, 1, 1) +FLD_RAW_RW_DEF( sys_wd, wd_punch, 0, 1) + +FLD_RAW_RW_DEF( sys_mb_rst_en, mb_rst_en, 0, 1) + +FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_v3p3_en, 7, 1) +FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_vcc_vnn_en, 6, 1) +FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_vccsram_en, 5, 1) +FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_vddq_en, 4, 1) +FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_vcc_ref_en, 3, 1) +FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_v1p05_en, 2, 1) +FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_v1p8_en, 1, 1) +FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_v2p5_en, 0, 1) + +FLD_RAW_RO_DEF( cpu_pwr_status, pg_v3p3, 7, 1) +FLD_RAW_RO_DEF( cpu_pwr_status, pg_vcc_vnn, 6, 1) +FLD_RAW_RO_DEF( cpu_pwr_status, pg_vccsram, 5, 1) +FLD_RAW_RO_DEF( cpu_pwr_status, pg_vddq, 4, 1) +FLD_RAW_RO_DEF( cpu_pwr_status, pg_vcc_ref, 3, 1) +FLD_RAW_RO_DEF( cpu_pwr_status, pg_v1p05, 2, 1) +FLD_RAW_RO_DEF( cpu_pwr_status, pg_v1p8, 1, 1) +FLD_RAW_RO_DEF( cpu_pwr_status, pg_v2p5, 0, 1) + +#endif /* __SYSTEM_CPLD_REG */ diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/system_cpld_sysfs.h b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/system_cpld_sysfs.h new file mode 100644 index 00000000000..e6b03bd1bd0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/modules/system_cpld_sysfs.h @@ -0,0 +1,76 @@ +#ifndef __SYSTEM_CPLD_SYSFS +#define __SYSTEM_CPLD_SYSFS + +/* generic CPLD sysfs file definition macros */ +#define SYSFS_RAW_RO_ATTR_DEF(field) \ +struct device_attribute field \ + = __ATTR(field, S_IRUGO, system_cpld_##field##_raw_read, NULL); + +#define SYSFS_RAW_RW_ATTR_DEF(field) \ +struct device_attribute field \ + = __ATTR(field, S_IRUGO | S_IWUGO, system_cpld_##field##_raw_read, system_cpld_##field##_raw_write); + +#define SYSFS_MISC_RO_ATTR_DEF(field, _read) \ +struct device_attribute field \ + = __ATTR(field, S_IRUGO, _read, NULL); + +#define SYSFS_MISC_RW_ATTR_DEF(field, _read, _write) \ +struct device_attribute field \ + = __ATTR(field, S_IRUGO | S_IWUGO, _read, _write); + +#define SYSFS_ATTR_PTR(field) \ +&field.attr + + +/* declare system CPLD file system */ +SYSFS_RAW_RO_ATTR_DEF(mjr_rev) +SYSFS_RAW_RO_ATTR_DEF(mnr_rev) + +SYSFS_RAW_RW_ATTR_DEF(scrtch_reg) + +SYSFS_RAW_RO_ATTR_DEF(brd_rev) +SYSFS_RAW_RO_ATTR_DEF(brd_type) + +SYSFS_RAW_RO_ATTR_DEF(ssd_present) +SYSFS_RAW_RW_ATTR_DEF(spi_cs_sel) +SYSFS_RAW_RW_ATTR_DEF(rst_bios_switch) +SYSFS_RAW_RW_ATTR_DEF(cpld_upgrade_rst) + +SYSFS_RAW_RW_ATTR_DEF(cpld_spi_wp) +SYSFS_RAW_RW_ATTR_DEF(system_id_eeprom_wp) +SYSFS_RAW_RW_ATTR_DEF(spi_me_wp) +SYSFS_RAW_RW_ATTR_DEF(spi_bios_wp) +SYSFS_RAW_RW_ATTR_DEF(spi_bak_bios_wp) + +SYSFS_RAW_RW_ATTR_DEF(vrhot_irq_en) +SYSFS_RAW_RW_ATTR_DEF(cpu_thermtrip_irq_en) +SYSFS_RAW_RW_ATTR_DEF(temp_alert_irq_en) +SYSFS_RAW_RO_ATTR_DEF(vrhot_irq) +SYSFS_RAW_RO_ATTR_DEF(cpu_thermtrip_irq) +SYSFS_RAW_RO_ATTR_DEF(temp_alert_irq) + +SYSFS_RAW_RW_ATTR_DEF(wd_timer) +SYSFS_RAW_RW_ATTR_DEF(wd_en) +SYSFS_RAW_RW_ATTR_DEF(wd_punch) + +SYSFS_RAW_RW_ATTR_DEF(mb_rst_en) + +SYSFS_RAW_RO_ATTR_DEF(pwr_v3p3_en) +SYSFS_RAW_RO_ATTR_DEF(pwr_vcc_vnn_en) +SYSFS_RAW_RO_ATTR_DEF(pwr_vccsram_en) +SYSFS_RAW_RO_ATTR_DEF(pwr_vddq_en) +SYSFS_RAW_RO_ATTR_DEF(pwr_vcc_ref_en) +SYSFS_RAW_RO_ATTR_DEF(pwr_v1p05_en) +SYSFS_RAW_RO_ATTR_DEF(pwr_v1p8_en) +SYSFS_RAW_RO_ATTR_DEF(pwr_v2p5_en) + +SYSFS_RAW_RO_ATTR_DEF(pg_v3p3) +SYSFS_RAW_RO_ATTR_DEF(pg_vcc_vnn) +SYSFS_RAW_RO_ATTR_DEF(pg_vccsram) +SYSFS_RAW_RO_ATTR_DEF(pg_vddq) +SYSFS_RAW_RO_ATTR_DEF(pg_vcc_ref) +SYSFS_RAW_RO_ATTR_DEF(pg_v1p05) +SYSFS_RAW_RO_ATTR_DEF(pg_v1p8) +SYSFS_RAW_RO_ATTR_DEF(pg_v2p5) + +#endif /* __SYSTEM_CPLD_SYSFS */ diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-ctrl b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-ctrl new file mode 100755 index 00000000000..73ff759b6f4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-ctrl @@ -0,0 +1,679 @@ +#!/bin/bash +#/* +#********************************************************************** +#* +#* @filename fan-ctrl +#* +#* @purpose system daemon for controlling system fan pwm +#* +#* @create 2017/06/21 +#* +#* @author nixon.chu +#* +#* @history 2017/06/21: init version +#* +#********************************************************************** +#*/ + +DIR=$(dirname $0) + +# include files +source ${DIR}/funcs.sh + +#/* +#********************************************************************** +#* +#* CONSTANT VARIABLES +#* +#********************************************************************** +#*/ + +# process name/id +DAEMON_NAME=`basename $0` +DAEMON_PID="$$" + +# define symbol for fan/temperature type sensor +SYMBOL_TEMP="TEMP_" +SYMBOL_FAN="FAN_" + +# describe the structure of temperature sensor by id +STRUCT_TEMP_NAME=0 +STRUCT_TEMP_CMD=1 +STRUCT_TEMP_MAX=2 +STRUCT_TEMP_SIZE=$(( ${STRUCT_TEMP_MAX} + 1 )) + +# describe the structure of fan sensor by id +STRUCT_FAN_CMD=0 +STRUCT_FAN_SIZE=$(( ${STRUCT_FAN_CMD} + 1 )) + +# default fan zone configuration file +DEF_ZONE_CONF="${DIR}/fan-zone.conf" + +# default fan zone thermal configuration file +DEF_TEMP_CONF="${DIR}/fan-zone-thermal.conf" + +# default interval (sec) +DEF_INTERVAL=10 + +# default hysteresis (deg C) +DEF_HYSIS=3 + +# default debug mode (0: OFF, 1: ON) +DEF_DEBUG_MODE=0 + +# default log file +DEF_LOG_FILE="/var/log/syslog" + +# default fan level +DEF_FAN_LEVEL=0 + +# default minimum pwm (38.25=255x15%) +DEF_MIN_PWM=39 + +# default zone id +DEF_ZONE_ID=0 + +# error codes +E_STATUS_GOOD=0 +E_STATUS_FAULT=1 +E_INVALID_ARGS=11 +E_INVALID_CONF=12 + +# message levels +MSG_EMERG=0 +MSG_ALERT=1 +MSG_CRIT=2 +MSG_ERR=3 +MSG_WARNING=4 +MSG_NOTICE=5 +MSG_INFO=6 +MSG_DEBUG=7 + +# default message level +DEF_MSG_LEVEL=$MSG_WARNING + +#/* +#********************************************************************** +#* +#* GLOBAL VARIABLES +#* +#********************************************************************** +#*/ + +# temperature sensor group +GBL_TEMP_GRP=() +GBL_TEMP_NUM=${#GBL_TEMP_GRP[@]} + +# fan sensor group +GBL_FAN_GRP=() +GBL_FAN_NUM=${#GBL_FAN_GRP[@]} + +# fan level table +GBL_FAN_LEVEL=() +GBL_LEVEL_NUM=${#GBL_FAN_LEVEL[@]} + +# load defaults +GBL_ZONE_CONF=$DEF_ZONE_CONF +GBL_TEMP_CONF=$DEF_TEMP_CONF +GBL_INTERVAL=$DEF_INTERVAL +GBL_HYSIS=$DEF_HYSIS +GBL_DEBUG_MODE=$DEF_DEBUG_MODE +GBL_LOG_FILE=$DEF_LOG_FILE +GBL_CUR_LEVEL=$DEF_FAN_LEVEL +GBL_MIN_PWM=$DEF_MIN_PWM +GBL_ZONE_ID=$DEF_ZONE_ID +GBL_MSG_LEVEL=$DEF_MSG_LEVEL + +# temperature sensors' readings/statuses/properties (properties list have to be converted with fan level table) +GBL_TEMP_READINGS=() +GBL_TEMP_STATUSES=() +GBL_TEMP_PROPERTY=() + +#/* +#********************************************************************** +#* +#* FUNCTIONS +#* +#********************************************************************** +#*/ + +#/* +#* FEATURE: +#* usage +#* PURPOSE: +#* show the usage of this daemon +#* PARAMETERS: +#* +#* RETURNS: +#* success, this function returns @E_INVALID_ARGS. +#*/ +function usage() { + local dbg_mode + + [ $GBL_DEBUG_MODE -eq 0 ] && dbg_mode="off" || dbg_mode="on" + + echo -e "Usage: $0 [-z zone_file] [-t thermal_file] [-o log_file] [-d]" >&2 + echo -e "" >&2 + echo -e "Arguments:" >&2 + echo -e " -z, --zone-config Fan zone configuration file (default: $DEF_ZONE_CONF)" >&2 + echo -e " -t, --temp-config Fan zone thermal configuration file (default: $DEF_TEMP_CONF)" >&2 + echo -e " -o, --log-file Log file (default: $DEF_LOG_FILE)" >&2 + echo -e " -d, --debug Debug mode (default: $dbg_mode)" >&2 + exit ${E_INVALID_ARGS} +} + +#/* +#* FEATURE: +#* print_msg +#* PURPOSE: +#* print message by message level +#* PARAMETERS: +#* msg_lvl (IN) message level +#* msg (IN) message +#* RETURNS: +#* +#*/ +function print_msg() { + local msg_lvl=$1 + local msg=$2 + + [ $msg_lvl -le $GBL_MSG_LEVEL ] && echo "${msg}" >&2 +} + +#/* +#* FEATURE: +#* err_msg +#* PURPOSE: +#* log error message +#* PARAMETERS: +#* msg (IN) message +#* err_no (IN) error code +#* RETURNS: +#* success, this function returns non-zero error code. +#*/ +function err_msg() { + local msg=$1 + local err_no=$2 + + log_msg $MSG_ERROR "${msg}" + exit ${err_no} +} + +#/* +#* FEATURE: +#* log_msg +#* PURPOSE: +#* log message +#* PARAMETERS: +#* msg_lvl (IN) message level +#* msg (IN) message +#* RETURNS: +#* +#*/ +function log_msg() { + local msg_lvl=$1 + local msg=$2 + + if [ $GBL_LOG_FILE == $DEF_LOG_FILE ]; then + `logger -t $DAEMON_NAME -p $msg_lvl $msg` + else + echo -e "`date +"%b %_d %T"` `hostname` $DAEMON_NAME[$DAEMON_PID]: ${msg}" >> ${GBL_LOG_FILE} + fi + + print_msg $msg_lvl "${msg}" +} + +#/* +#* FEATURE: +#* debug_temp_grp +#* PURPOSE: +#* debug function for showing the temperature sensor group configs +#* @GBL_TEMP_GRP[]: store sensor group configs (sensor name, command, and max_temp) +#* PARAMETERS: +#* +#* RETURNS: +#* +#*/ +function debug_temp_grp() { + if [ $GBL_DEBUG_MODE -ne 0 ]; then + echo "********* Sensor Group *********" + for ((i=0; i<$GBL_TEMP_NUM; i++)) + do + echo -en "`fetch_temp_struct $i $STRUCT_TEMP_NAME`\t" + echo -en "`fetch_temp_struct $i $STRUCT_TEMP_CMD`\t" + echo "`fetch_temp_struct $i $STRUCT_TEMP_MAX`" + done + fi +} + +#/* +#* FEATURE: +#* debug_temp_readings +#* PURPOSE: +#* debug function for showing the temperature sensors' readings +#* @GBL_TEMP_READINGS[]: store current reading for temperature sensors +#* PARAMETERS: +#* +#* RETURNS: +#* +#*/ +function debug_temp_readings() { + if [ $GBL_DEBUG_MODE -ne 0 ]; then + echo "********* Sensor Reading *********" + for ((i=0; i<$GBL_TEMP_NUM; i++)) + do + echo -e "`fetch_temp_struct $i $STRUCT_TEMP_NAME`\t${GBL_TEMP_READINGS[$i]}" + done + fi +} + +#/* +#* FEATURE: +#* debug_temp_property +#* PURPOSE: +#* debug function for showing the temperature sensors' properties +#* @GBL_TEMP_PROPERTY[]: store temperature sensors' properties (asserted temperature for each fan levels) +#* PARAMETERS: +#* +#* RETURNS: +#* +#*/ +function debug_temp_property() { + local size base start_idx level + if [ $GBL_DEBUG_MODE -ne 0 ]; then + echo "********* Sensor Table *********" + for ((i=0; i<${GBL_TEMP_NUM}; i++)) + do + # show array @GBL_TEMP_PROPERTY[]: format name(1) + fan levels(2-?) + size=$(( ${GBL_LEVEL_NUM}+1 )) + base=$i*${size} + start_idx=$(( $base+1 )) + level=${GBL_LEVEL_NUM} + echo -e "${GBL_TEMP_PROPERTY[$base]}\t\t${GBL_TEMP_PROPERTY[@]:$start_idx:$level}" + done + fi +} + +#/* +#* FEATURE: +#* fetch_temp_struct +#* PURPOSE: +#* fetch the member value of specific temperature sensor +#* PARAMETERS: +#* id (IN) sensor id +#* member_id (IN) member id +#* RETURNS: +#* success, returns member value +#*/ +function fetch_temp_struct() { + local id member_id index_base data + + id=$1 + member_id=$2 + + index_base=$(( $id * $STRUCT_TEMP_SIZE )) + data=${GBL_TEMP_GRP[$(($index_base+$member_id))]} + # remove unuseful characters, such as double quotes('"') and the start/end space(' ') of a string. + data=`echo $data | sed 's/^ *\| *$//g' | sed 's/^"\|\"$//g'` + echo $data +} + +#/* +#* FEATURE: +#* fetch_temp_property +#* PURPOSE: +#* fetch the properties of specific temperature sensor +#* PARAMETERS: +#* name (IN) sensor name +#* RETURNS: +#* success, returns an asserted temperature list +#*/ +function fetch_temp_property() { + local name size base start_idx length + + name=$1 + + size=$(( $GBL_LEVEL_NUM+1 )) + for ((i=0; i<${GBL_TEMP_NUM}; i++)) + do + base=$i*${size} + # find sensor by name + if [ ${GBL_TEMP_PROPERTY[${base}]} == "${name}" ]; then + start_idx=$(( $base+1 )) + length=$GBL_LEVEL_NUM + echo ${GBL_TEMP_PROPERTY[@]:$start_idx:$length} + break + fi + done +} + +#/* +#* FEATURE: +#* debug_fan_speed +#* PURPOSE: +#* debug function for showing system current fan level and PWM +#* @GBL_CUR_LEVEL: system current/output fan level +#* PARAMETERS: +#* +#* RETURNS: +#* +#*/ +function debug_fan_speed() { + if [ $GBL_DEBUG_MODE -ne 0 ]; then + # For human readable, the representation of fan level will start from 1. + echo "Current Level: $(( $GBL_CUR_LEVEL+1 )), PWM: ${GBL_FAN_LEVEL[$GBL_CUR_LEVEL]}" + fi +} + +#/* +#* FEATURE: +#* arg_parse +#* PURPOSE: +#* parser for input arguments +#* PARAMETERS: +#* arg_lists[] (IN) argument list +#* RETURNS: +#* +#*/ +function arg_parse() { + while [[ $# -ge 1 ]] + do + key="$1" + case $key in + -z|--zone-config) + [ $# -lt 2 ] && usage + GBL_ZONE_CONF=$2 + [ ! -e $GBL_ZONE_CONF ] && usage + shift # past argument + ;; + -t|--temp-config) + [ $# -lt 2 ] && usage + GBL_TEMP_CONF=$2 + [ ! -e $GBL_TEMP_CONF ] && usage + shift # past argument + ;; + -o|--log-file) + [ $# -lt 2 ] && usage + GBL_LOG_FILE=$2 + shift # past argument + ;; + -d|--debug) + GBL_DEBUG_MODE=1 + ;; + *) + usage # unknown option + ;; + esac + shift # past argument or value + done +} + +#/* +#* FEATURE: +#* valid_conf +#* PURPOSE: +#* check if configuration files are valid +#* PARAMETERS: +#* +#* RETURNS: +#* success, this function returns nothing +#* fail, returns @E_INVALID_CONF +#*/ +function valid_conf() { + local list_1 list_2 match_num + + list_1=("${!1}") + list_2=("${!2}") + + # validate zone config + [ ${GBL_TEMP_NUM} -eq 0 ] && err_msg "config: status=invalid. reason=no TEMPERATURE SENSORS defined." "${E_INVALID_CONF}" + [ ${GBL_FAN_NUM} -eq 0 ] && err_msg "config: status=invalid. reason=no FAN defined." "${E_INVALID_CONF}" + + # validate thermal config + [ ${GBL_LEVEL_NUM} -eq 0 ] && err_msg "config: status=invalid. reason=no FAN LEVELS defined." "${E_INVALID_CONF}" + [ ${#list_2[@]} -ne ${GBL_TEMP_NUM} ] && err_msg "config: status=invalid. reason=the number of temperature sensors is inconsistent." "${E_INVALID_CONF}" + + # compare temperature sensor name between configuration files + match_num=0 + for i in ${!list_1[@]} + do + for j in ${!list_2[@]} + do + [ "${list_1[$i]}" == "${list_2[$j]}" ] && match_num=$(( $match_num+1 )) + done + done + [ $match_num -ne ${GBL_TEMP_NUM} ] && err_msg "config: status=invalid. reason=the name of temperature sensors is inconsistent." "${E_INVALID_CONF}" + + # validate pwm values + for pwm in ${GBL_FAN_LEVEL[@]} + do + expr $pwm + $GBL_MIN_PWM >/dev/null 2>&1 + [ $? -ne 0 ] && err_msg "config: status=invalid. reason=the value of pwm is not integer." "$E_INVALID_CONF" + [ $pwm -lt $GBL_MIN_PWM ] && err_msg "config: status=invalid. reason=the value of fan level is less than MIN_PWM($GBL_MIN_PWM)." "$E_INVALID_CONF" + done +} + +#/* +#* FEATURE: +#* initialize +#* PURPOSE: +#* load zone config and thermal config +#* PARAMETERS: +#* +#* RETURNS: +#* +#*/ +function initialize() { + local data conf_interval conf_hysis conf_min_pwm conf_zone_id conf_msg_level temp_list_1 temp_list_2 + + log_msg $MSG_INFO "Initializing fan control service..." + + # fetch temperature sensor name from configuration files + temp_list_1=(`cat ${GBL_ZONE_CONF} | grep "^${SYMBOL_TEMP}" | awk -F "," {'print $1'}`) + temp_list_2=(`cat ${GBL_TEMP_CONF} | grep "^${SYMBOL_TEMP}" | awk {'print $1'}`) + + # calculate the number of temperature/fan sensors + GBL_TEMP_NUM=${#temp_list_1[@]} + GBL_FAN_NUM=(`cat ${GBL_ZONE_CONF} | grep "^${SYMBOL_FAN}" | awk {'print $2'} | wc -l`) + + # calculate the number of fan levels + GBL_FAN_LEVEL=(`cat ${GBL_TEMP_CONF} | grep "^PWM" | awk -F "PWM" {'print $2'}`) + GBL_LEVEL_NUM=${#GBL_FAN_LEVEL[@]} + + # check if the interval/hyteresis should be updated. + conf_interval=`cat ${GBL_ZONE_CONF} | grep "^INTERVAL=" | awk -F "=" {'print $2'} | tail` + [ ! -z ${conf_interval} ] && GBL_INTERVAL=${conf_interval} + conf_hysis=`cat ${GBL_ZONE_CONF} | grep "^HYTERESIS=" | awk -F "=" {'print $2'} | tail` + [ ! -z ${conf_hysis} ] && GBL_HYSIS=${conf_hysis} + conf_min_pwm=`cat ${GBL_ZONE_CONF} | grep "^MIN_PWM=" | awk -F "=" {'print $2'} | tail` + [ ! -z ${conf_min_pwm} ] && GBL_MIN_PWM=${conf_min_pwm} + conf_zone_id=`cat ${GBL_ZONE_CONF} | grep "^ZONE_ID=" | awk -F "=" {'print $2'} | tail` + [ ! -z ${conf_zone_id} ] && GBL_ZONE_ID=${conf_zone_id} + conf_msg_level=`cat ${GBL_ZONE_CONF} | grep "^MSG_LEVEL=" | awk -F "=" {'print $2'} | tail` + [ ! -z ${conf_msg_level} ] && GBL_MSG_LEVEL=${conf_msg_level} + + # load zone config + for ((i=1; i<=${GBL_TEMP_NUM}; i++)) + do + GBL_TEMP_STATUSES+=($E_STATUS_GOOD) + data=`cat ${GBL_ZONE_CONF} | grep "^${SYMBOL_TEMP}" | awk NR==$i` + # FIXME + GBL_TEMP_GRP+=("`echo $data | awk -F ", " {'print $1'}`") + GBL_TEMP_GRP+=("`echo $data | awk -F ", " {'print $2'}`") + GBL_TEMP_GRP+=("`echo $data | awk -F ", " {'print $3'}`") + done + debug_temp_grp + + for ((i=1; i<=${GBL_FAN_NUM}; i++)) + do + data=`cat ${GBL_ZONE_CONF} | grep "^${SYMBOL_FAN}" | awk NR==$i{'print $2'}` + GBL_FAN_GRP+=("`echo $data`") + done + + # load thermal config + for ((i=0; i<${GBL_TEMP_NUM}; i++)) + do + index=$(( $i * ${STRUCT_TEMP_SIZE} + ${STRUCT_TEMP_NAME} )) + sensor_name=${GBL_TEMP_GRP[$index]} + GBL_TEMP_PROPERTY+=(`cat ${GBL_TEMP_CONF} | grep "^${sensor_name}" | tail`) + done + debug_temp_property + + # check if the config files is valid + valid_conf temp_list_1[@] temp_list_2[@] +} + +#/* +#* FEATURE: +#* temperature_collection +#* PURPOSE: +#* collect all temperature sensor readlings +#* PARAMETERS: +#* +#* RETURNS: +#* success, returns a series of reading @GBL_TEMP_READINGS[] +#*/ +function temperature_collection() { + local name cmd max_temp reading status pre_status + + GBL_TEMP_READINGS=() + for ((i=0; i<${GBL_TEMP_NUM}; i++)) + do + # read temperature sensor value & record sensor status + name=`fetch_temp_struct $i ${STRUCT_TEMP_NAME}` + cmd=`fetch_temp_struct $i ${STRUCT_TEMP_CMD}` + max_temp=`fetch_temp_struct $i ${STRUCT_TEMP_MAX}` + reading=`eval ${cmd} 2>/dev/null` + if [ $? -eq 0 ]; then + GBL_TEMP_READINGS+=($reading) + status=$E_STATUS_GOOD + else + GBL_TEMP_READINGS+=($max_temp) + status=$E_STATUS_FAULT + fi + + # Compare previous status of temperature sensor, then update it. + pre_status=${GBL_TEMP_STATUSES[$i]} + if [ $pre_status -eq $E_STATUS_GOOD ] && [ $status -eq $E_STATUS_FAULT ]; then + # Good -> Fault + log_msg $MSG_WARN "[ZONE_${GBL_ZONE_ID}] Sensor $name: status=ERROR. reason=read sensor failed." + elif [ $pre_status -eq $E_STATUS_FAULT ] && [ $status -eq $E_STATUS_GOOD ]; then + # Fault -> Good + log_msg $MSG_WARN "[ZONE_${GBL_ZONE_ID}] Sensor $name: status=RECOVER. reason=reading is $reading deg C" + fi + GBL_TEMP_STATUSES[$i]=$status + done + debug_temp_readings +} + +#/* +#* FEATURE: +#* fan_level_selection +#* PURPOSE: +#* select proper fan level by temperature sensor reading +#* PARAMETERS: +#* reading_list (IN) sensor reading list +#* RETURNS: +#* success, returns a fan level value +#*/ +function fan_level_selection() { + local reading_list name reading temp_list highest_level pre_level next_level hysis_temp res res1 + + reading_list=("${!1}") + highest_level=0 + pre_level=${GBL_CUR_LEVEL} + next_level=0 + + # search fan table by each temperature sensor reading + for ((i=0; i<${GBL_TEMP_NUM}; i++)) + do + name=`fetch_temp_struct $i $STRUCT_TEMP_NAME` + reading=${reading_list[$i]} + temp_list=(`fetch_temp_property ${name}`) + for j in ${!temp_list[@]} + do + res=`echo $reading \<= ${temp_list[$j]} | bc -l` + if [ $res -eq 1 ] || [ $j -eq $((${#temp_list[@]}-1)) ]; then + if [ $j -gt $highest_level ]; then + highest_level=$j + fi + break + fi + done + done + + if [ $highest_level -lt $pre_level ]; then + # Determine if require decreasing current fan level @assert_level + local pass_num + pass_num=0 + for ((i=0; i<${GBL_TEMP_NUM}; i++)) + do + name=`fetch_temp_struct $i $STRUCT_TEMP_NAME` + reading=${reading_list[$i]} + temp_list=(`fetch_temp_property ${name}`) + assert_level=$(( $pre_level-1 )) + hysis_temp=`echo ${temp_list[$assert_level]} - $GBL_HYSIS | bc` + res=`echo $reading \<= $hysis_temp | bc -l` + if [ $res -eq 1 ]; then + pass_num=$(( $pass_num+1 )) + else + break + fi + done + if [ $pass_num -eq ${GBL_TEMP_NUM} ]; then + # Decrease fan pwm: All sensor reading should less than its own hysteresis temperature + next_level=${highest_level} + else + # Keep current fan pwm + next_level=${pre_level} + fi + else + # Increase fan pwm + next_level=${highest_level} + fi + GBL_CUR_LEVEL=${next_level} +} + +#/* +#* FEATURE: +#* apply_fan_level +#* PURPOSE: +#* convert given fan level to PWM, then output to fans +#* PARAMETERS: +#* fan_list (IN) fan devices list +#* fan_level (IN) fan level +#* RETURNS: +#* success, returns a pwm value +#*/ +function apply_fan_level() { + local fan_level fan_list + + fan_list=("${!1}") + fan_level=$2 + + for fan in ${fan_list[@]} + do + echo ${GBL_FAN_LEVEL[$fan_level]} > $fan + done + debug_fan_speed +} + +#/* +#********************************************************************** +#* +#* MAIN +#* +#********************************************************************** +#*/ +Platform_init +arg_parse $@ +initialize +log_msg $MSG_INFO "Starting fan control service..." +while [ true ]; do + temperature_collection + fan_level_selection GBL_TEMP_READINGS[@] + apply_fan_level GBL_FAN_GRP[@] ${GBL_CUR_LEVEL} + sleep $GBL_INTERVAL +done + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-zone-thermal_B2F.conf b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-zone-thermal_B2F.conf new file mode 100644 index 00000000000..56409f5c3e3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-zone-thermal_B2F.conf @@ -0,0 +1,12 @@ +##### Temperature vs Fan table ##### +## FORMAT: "PWM" fan speed(range from 0 to 255) +# Duty Cycle 25% 30% 35% 40% 45% 50% 55% 60% 65% 70% 75% 80% 85% 90% 95% 100% +PWM 64 77 89 102 115 128 140 153 166 179 191 204 217 230 242 255 +## FORMAT: sensor name(TEMP_XXX) with asserted temperature by each levels +TEMP_CPU 52 55 58 61 64 67 70 73 76 79 82 85 88 91 94 97 +TEMP_SWITCH 75 78 81 84 87 90 93 96 99 102 105 108 111 114 117 120 +#TEMP_HDD 25 +#TEMP_TMP75_CPU 25 +#TEMP_TMP75_CENTER 25 +#TEMP_TMP75_RIGHT 33 37 41 45 49 53 57 61 65 69 73 77 81 85 89 93 +TEMP_TMP75_FAN 26.5 31.5 36.5 41.5 46.5 51.5 56.5 61.5 66.5 71.5 76.5 81.5 86.5 91.5 96.5 101.5 diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-zone-thermal_F2B.conf b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-zone-thermal_F2B.conf new file mode 100644 index 00000000000..6c459d874fe --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-zone-thermal_F2B.conf @@ -0,0 +1,12 @@ +##### Temperature vs Fan table ##### +## FORMAT: "PWM" fan speed(range from 0 to 255) +# Duty Cycle 25% 30% 35% 40% 45% 50% 55% 60% 65% 70% 75% 80% 85% 90% 95% 100% +PWM 64 77 89 102 115 128 140 153 166 179 191 204 217 230 242 255 +## FORMAT: sensor name(TEMP_XXX) with asserted temperature by each levels +TEMP_CPU 60 65 70 73 76 79 82 85 88 91 94 97 100 103 106 109 +TEMP_SWITCH 73 76 79 82 85 88 91 94 97 100 103 106 109 112 115 118 +#TEMP_HDD 25 +#TEMP_TMP75_CPU 25 +#TEMP_TMP75_CENTER 25 +TEMP_TMP75_RIGHT 33 37 41 45 49 53 57 61 65 69 73 77 81 85 89 93 +#TEMP_TMP75_FAN 25 diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-zone_B2F.conf b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-zone_B2F.conf new file mode 100644 index 00000000000..b51f3b7aa67 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-zone_B2F.conf @@ -0,0 +1,38 @@ +##### ZONE ID ##### +ZONE_ID=0 + +##### SENSOR GROUP START ##### +## FORMAT: name(TEMP_XXX), command, max_temp(deg C) +TEMP_CPU, "data=`sensors | grep coretemp -A2`; [ $? -ne 0 ] && exit 1; echo "$data" | tail -n1 | awk {'print $4'} | sed 's/^+\|°C//g'", 110 +TEMP_SWITCH, "[ `file /var/run/docker-syncd/sswsyncd.socket | grep -c " socket"` -ne 1 ] && exit 1; [ `ss -a | grep "/var/run/sswsyncd/sswsyncd.socket" |grep -c "LISTEN"` -ne 1 ] && exit 1; data=`bcmcmd -c "show temp" | grep "temperature monitor"`; [ $? -ne 0 ] && exit 1; switch_temps=(`echo "$data" | awk {'print $5'} | sed 's/,//g'`); high_temp=0; for reading in ${switch_temps[@]}; do res=`echo "$reading > $high_temp" | bc -l`; [ $res -eq 1 ] && high_temp=$reading; done; echo $high_temp", 120 +#TEMP_HDD, "data=`hddtemp /dev/sdb | grep -v "not available"`; [ $? -ne 0 ] && exit 1; echo "$data" | awk -F ": " {'print $3'} | sed 's/°C//g'", 85 +#TEMP_TMP75_CPU, "data=`sensors | grep tmp75-i2c-0-4e -A2`; [ $? -ne 0 ] && exit 1; echo "$data" | tail -n1 | awk {'print $2'} | sed 's/^+\|°C//g'", 125 +#TEMP_TMP75_CENTER, "data=`sensors | grep tmp75-i2c-4-4a -A2`; [ $? -ne 0 ] && exit 1; echo "$data" | tail -n1 | awk {'print $2'} | sed 's/^+\|°C//g'", 125 +#TEMP_TMP75_RIGHT, "data=`sensors | grep tmp75-i2c-4-4c -A2`; [ $? -ne 0 ] && exit 1; echo "$data" | tail -n1 | awk {'print $2'} | sed 's/^+\|°C//g'", 125 +TEMP_TMP75_FAN, "data=`sensors | grep tmp75-i2c-4-4d -A2`; [ $? -ne 0 ] && exit 1; echo "$data" | tail -n1 | awk {'print $2'} | sed 's/^+\|°C//g'", 125 +##### SENSOR GROUP END ##### + +##### FAN GROUP START ##### +## FORMAT: name(FAN_YYY) input_files +FAN_1 /sys/bus/i2c/devices/3-0020/hwmon/hwmon*/pwm1 +FAN_2 /sys/bus/i2c/devices/3-0020/hwmon/hwmon*/pwm2 +FAN_3 /sys/bus/i2c/devices/3-0020/hwmon/hwmon*/pwm3 +FAN_4 /sys/bus/i2c/devices/3-0020/hwmon/hwmon*/pwm4 +FAN_5 /sys/bus/i2c/devices/3-0020/hwmon/hwmon*/pwm5 +FAN_6 /sys/bus/i2c/devices/3-0020/hwmon/hwmon*/pwm6 +FAN_7 /sys/bus/i2c/devices/3-0023/hwmon/hwmon*/pwm1 +FAN_8 /sys/bus/i2c/devices/3-0023/hwmon/hwmon*/pwm2 +FAN_9 /sys/bus/i2c/devices/3-0023/hwmon/hwmon*/pwm3 +FAN_10 /sys/bus/i2c/devices/3-0023/hwmon/hwmon*/pwm4 +FAN_11 /sys/bus/i2c/devices/3-0023/hwmon/hwmon*/pwm5 +FAN_12 /sys/bus/i2c/devices/3-0023/hwmon/hwmon*/pwm6 +##### FAN GROUP END ##### + +##### INTERVAL (sec) ##### +INTERVAL=10 + +##### HYTERESIS (deg C) ##### +HYTERESIS=2 + +##### MINIMUM PWM (38.25=255x15%) ##### +MIN_PWM=39 diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-zone_F2B.conf b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-zone_F2B.conf new file mode 100644 index 00000000000..2d5987c5c66 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/fan-zone_F2B.conf @@ -0,0 +1,38 @@ +##### ZONE ID ##### +ZONE_ID=0 + +##### SENSOR GROUP START ##### +## FORMAT: name(TEMP_XXX), command, max_temp(deg C) +TEMP_CPU, "data=`sensors | grep coretemp -A2`; [ $? -ne 0 ] && exit 1; echo "$data" | tail -n1 | awk {'print $4'} | sed 's/^+\|°C//g'", 110 +TEMP_SWITCH, "[ `file /var/run/docker-syncd/sswsyncd.socket | grep -c " socket"` -ne 1 ] && exit 1; [ `ss -a | grep "/var/run/sswsyncd/sswsyncd.socket" |grep -c "LISTEN"` -ne 1 ] && exit 1; data=`bcmcmd -c "show temp" | grep "temperature monitor"`; [ $? -ne 0 ] && exit 1; switch_temps=(`echo "$data" | awk {'print $5'} | sed 's/,//g'`); high_temp=0; for reading in ${switch_temps[@]}; do res=`echo "$reading > $high_temp" | bc -l`; [ $res -eq 1 ] && high_temp=$reading; done; echo $high_temp", 120 +#TEMP_HDD, "data=`hddtemp /dev/sdb | grep -v "not available"`; [ $? -ne 0 ] && exit 1; echo "$data" | awk -F ": " {'print $3'} | sed 's/°C//g'", 85 +#TEMP_TMP75_CPU, "data=`sensors | grep tmp75-i2c-0-4e -A2`; [ $? -ne 0 ] && exit 1; echo "$data" | tail -n1 | awk {'print $2'} | sed 's/^+\|°C//g'", 125 +#TEMP_TMP75_CENTER, "data=`sensors | grep tmp75-i2c-4-4a -A2`; [ $? -ne 0 ] && exit 1; echo "$data" | tail -n1 | awk {'print $2'} | sed 's/^+\|°C//g'", 125 +TEMP_TMP75_RIGHT, "data=`sensors | grep tmp75-i2c-4-4c -A2`; [ $? -ne 0 ] && exit 1; echo "$data" | tail -n1 | awk {'print $2'} | sed 's/^+\|°C//g'", 125 +#TEMP_TMP75_FAN, "data=`sensors | grep tmp75-i2c-4-4d -A2`; [ $? -ne 0 ] && exit 1; echo "$data" | tail -n1 | awk {'print $2'} | sed 's/^+\|°C//g'", 125 +##### SENSOR GROUP END ##### + +##### FAN GROUP START ##### +## FORMAT: name(FAN_YYY) input_files +FAN_1 /sys/bus/i2c/devices/3-0020/hwmon/hwmon*/pwm1 +FAN_2 /sys/bus/i2c/devices/3-0020/hwmon/hwmon*/pwm2 +FAN_3 /sys/bus/i2c/devices/3-0020/hwmon/hwmon*/pwm3 +FAN_4 /sys/bus/i2c/devices/3-0020/hwmon/hwmon*/pwm4 +FAN_5 /sys/bus/i2c/devices/3-0020/hwmon/hwmon*/pwm5 +FAN_6 /sys/bus/i2c/devices/3-0020/hwmon/hwmon*/pwm6 +FAN_7 /sys/bus/i2c/devices/3-0023/hwmon/hwmon*/pwm1 +FAN_8 /sys/bus/i2c/devices/3-0023/hwmon/hwmon*/pwm2 +FAN_9 /sys/bus/i2c/devices/3-0023/hwmon/hwmon*/pwm3 +FAN_10 /sys/bus/i2c/devices/3-0023/hwmon/hwmon*/pwm4 +FAN_11 /sys/bus/i2c/devices/3-0023/hwmon/hwmon*/pwm5 +FAN_12 /sys/bus/i2c/devices/3-0023/hwmon/hwmon*/pwm6 +##### FAN GROUP END ##### + +##### INTERVAL (sec) ##### +INTERVAL=10 + +##### HYTERESIS (deg C) ##### +HYTERESIS=2 + +##### MINIMUM PWM (38.25=255x15%) ##### +MIN_PWM=39 diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/funcs.sh b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/funcs.sh new file mode 100755 index 00000000000..3e417f69954 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/funcs.sh @@ -0,0 +1,22 @@ +#!/bin/bash +#/* +#********************************************************************** +#* +#* @filename funcs.sh +#* +#* @purpose api functions script for fan-ctrl +#* +#* @create 2017/08/09 +#* +#* @author nixon.chu +#* +#* @history 2017/08/09: init version +#* +#********************************************************************** +#*/ + +DIR=$(dirname $0) + +function Platform_init() { + ${DIR}/init.sh +} diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/init.sh b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/init.sh new file mode 100755 index 00000000000..06df071fa14 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/fan-ctrl/init.sh @@ -0,0 +1,26 @@ +#!/bin/bash +DIR=$(dirname $0) + +# board type +BOARD_TYPE=`cat /sys/bus/i2c/devices/1-0032/brd_type` + +# fan tables +FORWARD_SENSOR_CONF=${DIR}/fan-zone_F2B.conf +FORWARD_PWM_CONF=${DIR}/fan-zone-thermal_F2B.conf +REVERSE_SENSOR_CONF=${DIR}/fan-zone_B2F.conf +REVERSE_PWM_CONF=${DIR}/fan-zone-thermal_B2F.conf + +# Nixon: Please refer to "BMS CPLD Design Spec." +# board type : BRD_TYPE[3:0] +# 0x0 (0000b): BMS_AC_PSU_NORMAL_FAN, 0x2 (0010b): BMS_DC_PSU_NORMAL_FAN +# 0x1 (0001b): BMS_AC_PSU_REVERSE_FAN, 0x3 (0011b): BMS_DC_PSU_REVERSE_FAN +case $BOARD_TYPE in + 0x0|0x2) + ln -sf $FORWARD_SENSOR_CONF ${DIR}/fan-zone.conf + ln -sf $FORWARD_PWM_CONF ${DIR}/fan-zone-thermal.conf + ;; + 0x1|0x3) + ln -sf $REVERSE_SENSOR_CONF ${DIR}/fan-zone.conf + ln -sf $REVERSE_PWM_CONF ${DIR}/fan-zone-thermal.conf + ;; +esac diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/script/funcs.sh b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/script/funcs.sh new file mode 100755 index 00000000000..4b0c4c35471 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/script/funcs.sh @@ -0,0 +1,23 @@ +#/bin/bash + +# process name/id +DAEMON_NAME=`basename $0` +DAEMON_PID="$$" + +DEF_SEVERITY="INFO" + +#/* +#* FEATURE: +#* log_msg +#* PURPOSE: +#* log message +#* PARAMETERS: +#* msg (IN) message +#* RETURNS: +#* +#*/ +function log_msg() { + local msg=$1 + + `logger -t $DAEMON_NAME -p $DEF_SEVERITY $msg` +} diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/script/start_service.sh b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/script/start_service.sh new file mode 100755 index 00000000000..2bc9589738d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/script/start_service.sh @@ -0,0 +1,99 @@ +#/bin/bash + +DIR=$(dirname $0) + +# include files +source ${DIR}/funcs.sh + +ACPI_INSTALL_PRINT=0 +ACPID_INSTALL_PRINT=0 +BC_INSTALL_PRINT=0 +ACPID_SOCKET_PRINT=0 +ACPI_PRINT=0 + + +while [ 1 ] +do + if [ `dpkg -l |grep -c "acpi "` -eq "0" ]; then + dpkg -i /opt/debs/acpi_1.7-1_amd64.deb + if [ "$?" -ne "0" ]; then + if [ $ACPI_INSTALL_PRINT -eq 0 ]; then + ACPI_INSTALL_PRINT=1 + log_msg "Wait for acpi package install." + fi + sleep 1 + continue + else + log_msg "Install acpi package success." + fi + fi + break +done + +while [ 1 ] +do + if [ `dpkg -l |grep -c "acpid "` -eq "0" ]; then + dpkg -i /opt/debs/acpid_2.0.23-2_amd64.deb + if [ "$?" -ne "0" ]; then + if [ $ACPID_INSTALL_PRINT -eq 0 ]; then + ACPID_INSTALL_PRINT=1 + log_msg "Wait for acpid package install." + fi + sleep 1 + continue + else + log_msg "Install acpid package success." + fi + fi + break +done + +while [ 1 ] +do + if [ `dpkg -l |grep -c " bc "` -eq "0" ]; then + dpkg -i /opt/debs/bc_1.06.95-9_amd64.deb + if [ "$?" -ne "0" ]; then + if [ $BC_INSTALL_PRINT -eq 0 ]; then + BC_INSTALL_PRINT=1 + log_msg "Wait for bc package install." + fi + sleep 1 + continue + else + log_msg "Install bc package success." + fi + fi + break +done + +while [ 1 ] +do + if [ ! -e "/sys/firmware/acpi/interrupts/gpe01" ]; then + if [ $ACPI_PRINT -eq 0 ]; then + ACPI_PRINT=1 + log_msg "Wait for acpi daemon start." + fi + sleep 1 + continue + fi + log_msg "The acpi daemon start." + break +done + +while [ 1 ] +do + if [ ! -e "/var/run/acpid.socket" ]; then + if [ $ACPID_SOCKET_PRINT -eq 0 ]; then + ACPID_SOCKET_PRINT=1 + log_msg "Wait for acipd daemon start." + fi + sleep 1 + continue + fi + log_msg "The acpid daemon start." + break +done + +/etc/init.d/xcvr_servd start +/etc/init.d/sys_servd start +exit 0; diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/script/start_watchdog.sh b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/script/start_watchdog.sh new file mode 100755 index 00000000000..2268e5e0d16 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/script/start_watchdog.sh @@ -0,0 +1,32 @@ +#/bin/bash + +DIR=$(dirname $0) + +# include files +source ${DIR}/funcs.sh + +WATCHDOG_PRINT=0 + +while [ 1 ] +do + if [ `dpkg -l |grep -c "watchdog "` -eq "0" ]; then + dpkg -i /opt/debs/watchdog_5.14-3_amd64.deb + if [ "$?" -ne "0" ]; then + if [ $WATCHDOG_PRINT -eq 0 ]; then + WATCHDOG_PRINT=1 + log_msg "Wait for watchdog package install." + fi + sleep 1 + continue + else + log_msg "Install watchdog package success." + fi + fi + break +done + +ln -sf /opt/watchdog/watchdog.conf /etc/watchdog.conf + +/usr/sbin/watchdog -c /etc/watchdog.conf + +exit 0; diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/sys-serv/sys-servd b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/sys-serv/sys-servd new file mode 100755 index 00000000000..a1b4f177897 Binary files /dev/null and b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/sys-serv/sys-servd differ diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/system-check/system-check.sh b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/system-check/system-check.sh new file mode 100755 index 00000000000..f44ed046330 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/system-check/system-check.sh @@ -0,0 +1,55 @@ +#!/bin/bash + +SW_READY_STAMP='/tmp/.BcmSdkReady' +SYSTEM_INIT=0 +CURRENTR_LED=0 + +# 0 was not ready, 1 was ready +SYSTEM_READY=1 + +function check_sdk_ready() { + if [ `file /var/run/docker-syncd/sswsyncd.socket | grep -c " socket"` -ne 1 ]; then + SYSTEM_READY=0 + return 1 + else + if [ `ss -a | grep "/var/run/sswsyncd/sswsyncd.socket" |grep -c "LISTEN"` -ne 1 ]; then + SYSTEM_READY=0 + return 1 + fi + fi + return 0 +} + +while [ true ] +do + SYSTEM_READY=1 + #-----check start------------ + check_sdk_ready + #-----cech end--------------- + + if [ "$SYSTEM_INIT" -eq "0" ]; then + if [ $SYSTEM_READY -eq 1 ]; then + SYSTEM_INIT=1 + # set SYSTEM LED to Green + echo 0x01 > /sys/bus/i2c/devices/1-0032/system_led_fld + CURRENTR_LED=1 + fi + else + if [ $SYSTEM_READY -eq 0 ]; then + # set SYSTEM LED to Amber + if [ "$CURRENTR_LED" -ne "2" ]; then + echo 0x02 > /sys/bus/i2c/devices/1-0032/system_led_fld + CURRENTR_LED=2 + fi + else + # set SYS LED to Green + if [ "$CURRENTR_LED" -ne "1" ]; then + echo 0x01 > /sys/bus/i2c/devices/1-0032/system_led_fld + CURRENTR_LED=1 + fi + fi + fi + sleep 10 +done + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/watchdog/watchdog.conf b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/watchdog/watchdog.conf new file mode 100644 index 00000000000..81f0b7b819b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/watchdog/watchdog.conf @@ -0,0 +1,45 @@ +#ping = 172.31.14.1 +#ping = 172.26.1.255 +#interface = eth0 +#file = /var/log/messages +#change = 1407 + +# Uncomment to enable test. Setting one of these values to '0' disables it. +# These values will hopefully never reboot your machine during normal use +# (if your machine is really hung, the loadavg will go much higher than 25) +#max-load-1 = 24 +#max-load-5 = 18 +#max-load-15 = 12 + +# Note that this is the number of pages! +# To get the real size, check how large the pagesize is on your machine. +#min-memory = 1 +#allocatable-memory = 1 + +#repair-binary = /usr/sbin/repair +#repair-timeout = +#test-binary = +#test-timeout = + +watchdog-device = /dev/watchdog + +# Defaults compiled into the binary +#temperature-device = +#max-temperature = 120 + +# Defaults compiled into the binary +#admin = root +#interval = 1 +#logtick = 1 +#log-dir = /var/log/watchdog + +# This greatly decreases the chance that watchdog won't be scheduled before +# your machine is really loaded +realtime = yes +priority = 99 + +# Check if rsyslogd is still running by enabling the following line +#pidfile = /var/run/rsyslogd.pid + +# timeout : 15 , 30 , 60 , 90 , 120 , 180 , 240 sec +watchdog-timeout = 120 diff --git a/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/xcvr-serv/xcvr-servd b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/xcvr-serv/xcvr-servd new file mode 100755 index 00000000000..c882ff8e335 Binary files /dev/null and b/platform/broadcom/sonic-platform-modules-mitac/ly1200-32x/opt/xcvr-serv/xcvr-servd differ diff --git a/platform/broadcom/sonic-platform-modules-quanta/.gitignore b/platform/broadcom/sonic-platform-modules-quanta/.gitignore new file mode 100755 index 00000000000..7f287d53822 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/.gitignore @@ -0,0 +1,50 @@ +# Object files +*.o +*.ko +*.obj +*.elf + +# Precompiled Headers +*.gch +*.pch + +# Libraries +*.lib +*.a +*.la +*.lo + +# Shared objects (inc. Windows DLLs) +*.dll +*.so +*.so.* +*.dylib + +# Executables +*.exe +*.out +*.app +*.i*86 +*.x86_64 +*.hex + +# Debug files +*.dSYM/ +*.su + +# Kernel Module Compile Results +*.mod* +*.cmd +*.o.d +.tmp_versions/ +modules.order +Module.symvers +Mkfile.old +dkms.conf + +# Debian packaging +*.debhelper.log +*.postinst.debhelper +*.postrm.debhelper +*.prerm.debhelper +*.substvars diff --git a/platform/broadcom/sonic-platform-modules-quanta/LICENSE b/platform/broadcom/sonic-platform-modules-quanta/LICENSE new file mode 100755 index 00000000000..609b3082d11 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/LICENSE @@ -0,0 +1,16 @@ +Copyright (C) 2016 Microsoft, Inc +Copyright (C) 2018 Quanta Computer Inc. + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/broadcom/sonic-platform-modules-quanta/README.md b/platform/broadcom/sonic-platform-modules-quanta/README.md new file mode 100644 index 00000000000..bcc06271904 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/README.md @@ -0,0 +1,2 @@ +# sonic-platform-modules-quanta +SONiC platform folder which contain drivers for Quanta Switch diff --git a/platform/broadcom/sonic-platform-modules-quanta/debian/changelog b/platform/broadcom/sonic-platform-modules-quanta/debian/changelog new file mode 100644 index 00000000000..fe1cfa45490 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/debian/changelog @@ -0,0 +1,34 @@ +sonic-quanta-platform-modules (1.0) unstable; urgency=low + + * Add support for Quanta IX1B-32X + * Initial release + + -- Chih-Pei Chang Jonathan Tsai Wed, 20 Dec 2017 09:26:01 +0800 + +sonic-quanta-platform-modules (1.0) unstable; urgency=low + + * Add support for Quanta IX7-32X + * Initial release + + -- Chih-Pei Chang Jonathan Tsai Tue, 17 Apr 2018 14:40:01 +0800 + +sonic-quanta-platform-modules (1.0) unstable; urgency=low + + * Add support for Quanta IX8-56X + * Initial release + + -- Chih-Pei Chang Jonathan Tsai Thu, 3 May 2018 16:40:01 +0800 + +sonic-quanta-platform-modules (1.0) unstable; urgency=low + + * Add support for Quanta IX8C-56X + * Initial release + + -- Chih-Pei Chang Jonathan Tsai Thu, 4 Jan 2018 13:50:01 +0800 + +sonic-quanta-platform-modules (1.0) unstable; urgency=low + + * Add support for Quanta IX9-32X + * Initial release + + -- Jonathan Tsai Thu, 31 Jan 2019 13:09:01 +0800 diff --git a/platform/broadcom/sonic-platform-modules-quanta/debian/compat b/platform/broadcom/sonic-platform-modules-quanta/debian/compat new file mode 100755 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/broadcom/sonic-platform-modules-quanta/debian/control b/platform/broadcom/sonic-platform-modules-quanta/debian/control new file mode 100644 index 00000000000..f25b0d8e3c5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/debian/control @@ -0,0 +1,26 @@ +Source: sonic-quanta-platform-modules +Section: main +Priority: extra +Maintainer: Chih-Pei Chang , Jonathan Tsai +Build-Depends: debhelper (>= 9), bzip2 +Standards-Version: 3.9.3 + +Package: sonic-platform-quanta-ix1b-32x +Architecture: amd64 +Description: kernel modules for platform devices such as psu, led, sfp + +Package: sonic-platform-quanta-ix7-32x +Architecture: amd64 +Description: kernel modules for platform devices such as psu, led, sfp + +Package: sonic-platform-quanta-ix8-56x +Architecture: amd64 +Description: kernel modules for platform devices such as psu, led, sfp + +Package: sonic-platform-quanta-ix8c-56x +Architecture: amd64 +Description: kernel modules for platform devices such as psu, led, sfp + +Package: sonic-platform-quanta-ix9-32x +Architecture: amd64 +Description: kernel modules for platform devices such as psu, led, sfp diff --git a/platform/broadcom/sonic-platform-modules-quanta/debian/rules b/platform/broadcom/sonic-platform-modules-quanta/debian/rules new file mode 100644 index 00000000000..46b9607135a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/debian/rules @@ -0,0 +1,86 @@ +#!/usr/bin/make -f +# -*- makefile -*- +# Sample debian/rules that uses debhelper. +# This file was originally written by Joey Hess and Craig Small. +# As a special exception, when this file is copied by dh-make into a +# dh-make output file, you may use that output file without restriction. +# This special exception was added by Craig Small in version 0.37 of dh-make. + +include /usr/share/dpkg/pkg-info.mk + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + +export INSTALL_MOD_DIR:=extra + +PYTHON ?= python2 + +PACKAGE_PRE_NAME := sonic-platform-quanta +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= ix1b-32x ix7-32x ix8-56x ix8c-56x ix9-32x +MODULE_DIR := modules +UTILS_DIR := utils +SERVICE_DIR := service +CLASSES_DIR := classes +CONF_DIR := conf + +%: + dh $@ --with systemd,python2,python3 --buildsystem=pybuild + +clean: + dh_testdir + dh_testroot + dh_clean + +build: + #make modules -C $(KERNEL_SRC)/build M=$(MODULE_SRC) + (for mod in $(MODULE_DIRS); do \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + $(PYTHON) $${mod}/setup.py build; \ + done) + +binary: binary-arch binary-indep + # Nothing to do + +binary-arch: + # Nothing to do + +#install: build + #dh_testdir + #dh_testroot + #dh_clean -k + #dh_installdirs + +binary-indep: + dh_testdir + dh_installdirs + + # Custom package commands + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} usr/local/bin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} lib/systemd/system; \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin/; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system/; \ + $(PYTHON) $${mod}/setup.py install --root=$(MOD_SRC_DIR)/debian/$(PACKAGE_PRE_NAME)-$${mod} --install-layout=deb; \ + done) + # Resuming debhelper scripts + dh_testroot + dh_install + dh_installchangelogs + dh_installdocs + dh_systemd_enable + dh_installinit + dh_systemd_start + dh_link + dh_fixperms + dh_compress + dh_strip + dh_installdeb + dh_gencontrol + dh_md5sums + dh_builddeb +.PHONY: build binary binary-arch binary-indep clean diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/Makefile b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/Makefile new file mode 100755 index 00000000000..48683c54a7b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/Makefile @@ -0,0 +1 @@ +obj-m:=qci_pmbus.o qci_cpld_qsfp28.o qci_platform_ix1b.o qci_hwmon_ix1b.o diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_cpld_qsfp28.c b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_cpld_qsfp28.c new file mode 100755 index 00000000000..15c5369fd21 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_cpld_qsfp28.c @@ -0,0 +1,409 @@ +/* + * A CPLD driver for monitor QSFP28 module I/O + * + * The CPLD is customize by Quanta for controlling QSFP28 module signals, + * they are RESET , INTERREPT , Module_Present, LPMODE + * Each CPLD control 16 modules, each module use 4 bits in register. + * + * Copyright (C) 2015 Quanta Inc. + * + * Author: Luffy Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_IDA(cpld_ida); + +enum platform_type { + QSFP28 = 0, + NONE +}; + +static struct class *cpld_class = NULL; + +struct sfp_data { + struct i2c_client *cpld_client; + char name[8]; + u8 port_id; + u8 cpld_port; +}; + +struct cpld_data { + struct mutex lock; + struct device *port_dev[16]; + struct sfp_data *port_data[16]; +}; + +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int cpld_remove(struct i2c_client *client); + +static const struct i2c_device_id cpld_id[] = { + { "CPLD-QSFP28", QSFP28 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "qci_cpld_qsfp28", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, +// .address_list = normal_i2c, +}; + +#define CPLD_ID_PREFIX "port-" +#define CPLD_ID_FORMAT CPLD_ID_PREFIX "%d" + +#define RESET_MASK 0x08 +#define INTERRUPT_MASK 0x04 +#define MODULE_PRESENT_MASK 0x02 +#define LPMODE_MASK 0x01 + +static inline u8 get_group_cmd(u8 group) +{ + //FIXME: if group cmd change + return (group + 1); +} + +static inline u8 port_remapping(u8 phy_port) +{ + /* FIXME: implement by hardware design */ + /* The CPLD register port mapping is weird : + * MSB -------- LSB (word data) + * P3 P4 P1 P2 (per port 4 bits) + * For easy coding bit shift, we treat it as hw port swap + */ + return (phy_port % 2) ? (phy_port - 1) : (phy_port + 1); +} + +static ssize_t get_reset(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= RESET_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t get_interrupt(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= INTERRUPT_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t get_module_present(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= MODULE_PRESENT_MASK; + + //FIXME: if present is not low active + return sprintf(buf, "%d\n", value ? 0 : 1); +} + +static ssize_t get_lpmode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= LPMODE_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t set_reset(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + long disable; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + if (kstrtol(buf, 0, &disable)) + return -EINVAL; + + if ((disable != 1) && (disable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value &= ~(RESET_MASK << (group_port * 4)); + if (disable) + value |= (RESET_MASK << (group_port * 4)); + + dev_dbg(&client->dev, "write group%d value= %x\n", group + 1, value); + + i2c_smbus_write_word_data(client, get_group_cmd(group), (u16)value); +// mutex_unlock(&data->lock); + + return count; +} + +static ssize_t set_lpmode(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + long disable; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + if (kstrtol(buf, 0, &disable)) + return -EINVAL; + + if ((disable != 1) && (disable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value &= ~(LPMODE_MASK << (group_port * 4)); + if (disable) + value |= (LPMODE_MASK << (group_port * 4)); + + dev_dbg(&client->dev, "write group%d value= %x\n", group + 1, value); + + i2c_smbus_write_word_data(client, get_group_cmd(group), (u16)value); +// mutex_unlock(&data->lock); + + return count; +} + +static DEVICE_ATTR(reset, S_IWUSR | S_IRUGO, get_reset, set_reset); +static DEVICE_ATTR(lpmode, S_IWUSR | S_IRUGO, get_lpmode, set_lpmode); +static DEVICE_ATTR(module_present, S_IRUGO, get_module_present, NULL); +static DEVICE_ATTR(interrupt, S_IRUGO, get_interrupt, NULL); + +static const struct attribute *sfp_attrs[] = { + &dev_attr_reset.attr, + &dev_attr_lpmode.attr, + &dev_attr_module_present.attr, + &dev_attr_interrupt.attr, + NULL, +}; + +static const struct attribute_group sfp_attr_group = { + .attrs = (struct attribute **) sfp_attrs, +}; + +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cpld_data *data; + struct sfp_data *port_data; + struct device *port_dev; + int port_nr, i, err; + + if (!cpld_class) + { + cpld_class = class_create(THIS_MODULE, "cpld-qsfp28"); + if (IS_ERR(cpld_class)) { + pr_err("couldn't create sysfs class\n"); + return PTR_ERR(cpld_class); + } + } + + data = devm_kzalloc(&client->dev, sizeof(struct cpld_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* register sfp port data to sysfs */ + for (i = 0; i < 16; i++) + { + port_nr = ida_simple_get(&cpld_ida, 1, 99, GFP_KERNEL); + if (port_nr < 0) + return ERR_PTR(port_nr); + + port_data = kzalloc(sizeof(struct sfp_data), GFP_KERNEL); + + port_dev = device_create(cpld_class, &client->dev, MKDEV(0,0), port_data, CPLD_ID_FORMAT, port_nr); + if (IS_ERR(port_dev)) { + err = PTR_ERR(port_dev); + // printk("err_status\n"); + } + + data->port_dev[i] = port_dev; + data->port_data[i] = port_data; + + dev_info(&client->dev, "Register qsfp28 port-%d\n", port_nr); + + /* FIXME: implement Logical/Physical port remapping */ + //port_data->cpld_port = i; + port_data->cpld_port = port_remapping(i); + sprintf(port_data->name, "port-%d", port_nr); + port_data->port_id = port_nr; + dev_set_drvdata(port_dev, port_data); + port_dev->init_name = port_data->name; + port_data->cpld_client = client; + + err = sysfs_create_group(&port_dev->kobj, &sfp_attr_group); + // if (status) printk("err status\n"); + } + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s device found\n", client->name); + + + return 0; + +//FIXME: implement error check +exit_remove: +// sysfs_remove_group(&client->dev.kobj, &data->attrs); + return err; +} + +/* FIXME: for older kernel doesn't with idr_is_empty function, implement here */ +static int idr_has_entry(int id, void *p, void *data) +{ + return 1; +} + +static bool cpld_idr_is_empty(struct idr *idp) +{ + return !idr_for_each(idp, idr_has_entry, NULL); +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + int i, id; + + for (i = 15; i >= 0; i--) + { + dev_info(data->port_dev[i], "Remove qsfp28 port-%d\n", data->port_data[i]->port_id); + device_unregister(data->port_dev[i]); + ida_simple_remove(&cpld_ida, data->port_data[i]->port_id); + kfree(data->port_data[i]); + } + + if (cpld_idr_is_empty(&cpld_ida.idr)) + class_destroy(cpld_class); + + return 0; +} + +module_i2c_driver(cpld_driver); + +MODULE_AUTHOR("Luffy Cheng "); +MODULE_DESCRIPTION("Quanta Switch SFP CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_hwmon_ix1b.c b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_hwmon_ix1b.c new file mode 100644 index 00000000000..eb730cb28d0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_hwmon_ix1b.c @@ -0,0 +1,425 @@ +/* + * A hwmon driver for Cypress PSoC fan controller and thermal sensor + * + * This PSoC is a specific customize design only for Quanta Switch + * This driver is also monitoring pca9555 which is related to + * RPSU detection and LED controll in front panel. Instead a standalone + * driver, it should be combined with gpio lib to work correctly. + * + * Copyright (C) 2014 Quanta Inc. + * + * Author: Luffy Cheng + * + * Based on: + * adt7470.c from Darrick J. Wong + * Copyright (C) 2007 IBM + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define QUANTA_IX1_PSU_GPIO_PSU1_PRSNT_N 16 +#define QUANTA_IX1_PSU_GPIO_PSU1_PWRGD 17 +#define QUANTA_IX1_PSU_GPIO_PSU2_PRSNT_N 19 +#define QUANTA_IX1_PSU_GPIO_PSU2_PWRGD 20 + +#define QUANTA_IX1_FAN_GPIO_FAN1_PRSNT_N 36 +#define QUANTA_IX1_FAN_GPIO_FAN2_PRSNT_N 37 +#define QUANTA_IX1_FAN_GPIO_FAN3_PRSNT_N 38 +#define QUANTA_IX1_FAN_GPIO_FAN4_PRSNT_N 39 + +#define AUTO_UPDATE_INTERVAL 10000 + +enum psu_nr { + PSU1 = 0, + PSU2 +}; + +enum fan_nr { + FAN1 = 0, + FAN2, + FAN3, + FAN4, +}; + +enum led_color { + LED_RED = 1, + LED_GREEN, + LED_COLOR_OFF +}; + +int hwmon_enable = 1; + +struct qci_hwmon_data { + struct device *hwmon_dev; + struct task_struct *auto_update; + struct completion auto_update_stop; + unsigned int auto_update_interval; + struct attribute_group attrs; + +}; + +static void simple_atoi(const char *buf, int *output_val) +{ + int negative = 0; + + if (buf[0] == '-') + { + negative = 1; + buf++; + } + + while (*buf >= '0' && *buf <= '9') { + *output_val = *output_val * 10 + *buf - '0'; + buf++; + } + + if (negative) + *output_val = 0 - *output_val; +} + +int read_gpio_file(int gpio) +{ + struct file *fp; + char buffer[512], file_path[255]; + int offset = 0; + int ret; + + /*open the file in read mode*/ + sprintf(file_path, "/sys/class/gpio/gpio%d/value", gpio); + fp = filp_open(file_path, O_RDONLY, 0); + if (IS_ERR(fp)) { + printk("Cannot open the file %ld\n", PTR_ERR(fp)); + return -1; + } + + /*Read the data to the end of the file*/ + while (1) { + ret = kernel_read(fp, offset, buffer, 512); + if (ret > 0) { + offset += ret; + } + else { + break; + } + } + + filp_close(fp, NULL); + + simple_atoi(buffer, &ret); + + return ret; +} + +static ssize_t get_hwmon_status(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + return sprintf(buf, "%d\n", hwmon_enable); +} + +static ssize_t set_hwmon_status(struct device *dev, + struct device_attribute *devattr, const char *buf, size_t count) +{ + long enable; + + if (kstrtol(buf, 0, &enable)) + return -EINVAL; + + if ((enable != 1) && (enable != 0)) + return -EINVAL; + + hwmon_enable = enable; + + return count; +} + +static u8 read_fan_present(u8 fan_nr) +{ + u8 value = 0; + + if (fan_nr == PSU1) + value = read_gpio_file(QUANTA_IX1_FAN_GPIO_FAN1_PRSNT_N); + else if (fan_nr == FAN2) + value = read_gpio_file(QUANTA_IX1_FAN_GPIO_FAN2_PRSNT_N); + else if (fan_nr == FAN3) + value = read_gpio_file(QUANTA_IX1_FAN_GPIO_FAN3_PRSNT_N); + else if (fan_nr == FAN4) + value = read_gpio_file(QUANTA_IX1_FAN_GPIO_FAN4_PRSNT_N); + else + return -1; + + return value; +} + +static u8 read_psu_present(u8 psu_nr) +{ + u8 value = 0; + + if (psu_nr == PSU1) + value = read_gpio_file(QUANTA_IX1_PSU_GPIO_PSU1_PRSNT_N); + else if (psu_nr == PSU2) + value = read_gpio_file(QUANTA_IX1_PSU_GPIO_PSU2_PRSNT_N); + else + return -1; + + return value; +} + +static u8 read_psu_AC_good(u8 psu_nr) +{ + u8 value = 0; + + if (psu_nr == PSU1) + value = read_gpio_file(QUANTA_IX1_PSU_GPIO_PSU1_PWRGD); + else if (psu_nr == PSU2) + value = read_gpio_file(QUANTA_IX1_PSU_GPIO_PSU2_PWRGD); + else + return -1; + + return value; +} + +static u8 front_led_set(char *name, char *value) +{ + struct file *fp; + char file_path[255]; + int ret; + mm_segment_t oldfs; + + sprintf(file_path, "/sys/class/leds/%s/brightness", name); + fp = filp_open(file_path, O_RDWR | O_CREAT, 0644); + + if (IS_ERR(fp)) { + printk("Cannot open the file %ld\n", PTR_ERR(fp)); + return -1; + } + + oldfs = get_fs(); + set_fs(get_ds()); + + ret = vfs_write(fp, value, sizeof(value), &fp->f_pos); + + set_fs(oldfs); + + filp_close(fp, NULL); + + return 0; +} + +static u8 update_led(u8 *fan_status, u8 *psu_status) +{ + u8 i = 0, fan_color = LED_GREEN; + + // Update FAN front LED + for (i = 0; i < 4; i++) + { + if (fan_status[i] == 1) + { + fan_color = LED_RED; + front_led_set("front_led_fan_red", "1"); + front_led_set("front_led_fan_green", "0"); + break; + } + } + + if (fan_color == LED_GREEN) + { + front_led_set("front_led_fan_red", "0"); + front_led_set("front_led_fan_green", "1"); + } + + // Update PSU1 front LED + if ((psu_status[0] == 0) && (psu_status[2] == 1)) + { + front_led_set("front_led_psu1_green", "1"); + front_led_set("front_led_psu1_red", "0"); + } + else if (psu_status[0] == 1) + { + front_led_set("front_led_psu1_green", "0"); + front_led_set("front_led_psu1_red", "0"); + } + else + { + front_led_set("front_led_psu1_green", "0"); + front_led_set("front_led_psu1_red", "1"); + } + + // Update PSU2 front LED + if ((psu_status[1] == 0) && (psu_status[3] == 1)) + { + front_led_set("front_led_psu2_green", "1"); + front_led_set("front_led_psu2_red", "0"); + } + else if (psu_status[1] == 1) + { + front_led_set("front_led_psu2_green", "0"); + front_led_set("front_led_psu2_red", "0"); + } + else + { + front_led_set("front_led_psu2_green", "0"); + front_led_set("front_led_psu2_red", "1"); + } + + return 0; +} + +static int led_update_thread(void *p) +{ + struct platform_device *pdev = p; + struct qci_hwmon_data *data = platform_get_drvdata(pdev); + + u8 i = 0; + u8 psu_status[4] = {0}; // {PSU1-2 present, PSU1-2 AC good} + u8 fan_status[4] = {0}; // {FAN1-4 present} + + while (!kthread_should_stop()) { + + if (hwmon_enable) + { + for (i = 0; i < 4; i++) + { + fan_status[i] = read_fan_present(i); + } + + for (i = 0; i < 2; i++) + { + psu_status[i] = read_psu_present(i); + psu_status[i+2] = read_psu_AC_good(i); + } + + update_led(fan_status, psu_status); + } + + if (kthread_should_stop()) + break; + msleep_interruptible(data->auto_update_interval); + } + + complete_all(&data->auto_update_stop); + return 0; +} + +static DEVICE_ATTR(hwmon_status, S_IWUSR | S_IRUGO, get_hwmon_status, set_hwmon_status); + +static struct attribute *qci_hwmon_attr[] = { + + &dev_attr_hwmon_status.attr, + + NULL +}; + +static int qci_hwmon_probe(struct platform_device *pdev) +{ + struct qci_hwmon_data *data; + int err; + + data = devm_kzalloc(&pdev->dev, sizeof(struct qci_hwmon_data), + GFP_KERNEL); + if (!data) + { + return -ENOMEM; + } + + data->auto_update_interval = AUTO_UPDATE_INTERVAL; + data->attrs.attrs = qci_hwmon_attr; + + platform_set_drvdata(pdev, data); + + dev_info(&pdev->dev, "%s device found\n", pdev->name); + + data->hwmon_dev = hwmon_device_register(&pdev->dev); + if (IS_ERR(data->hwmon_dev)) { + err = PTR_ERR(data->hwmon_dev); + } + + err = sysfs_create_group(&pdev->dev.kobj, &data->attrs); + if (err) + return err; + + init_completion(&data->auto_update_stop); + data->auto_update = kthread_run(led_update_thread, pdev, + dev_name(data->hwmon_dev)); + if (IS_ERR(data->auto_update)) { + err = PTR_ERR(data->auto_update); + goto exit_unregister; + } + + return 0; + +exit_unregister: + hwmon_device_unregister(data->hwmon_dev); + return err; +} + +static int qci_hwmon_remove(struct platform_device *pdev) +{ + struct qci_hwmon_data *data = platform_get_drvdata(pdev); + + kthread_stop(data->auto_update); + wait_for_completion(&data->auto_update_stop); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&pdev->dev.kobj, &data->attrs); + return 0; +} + +static struct platform_driver qci_hwmon_driver = { + .probe = qci_hwmon_probe, + .remove = qci_hwmon_remove, + .driver = { + .name = "qci-hwmon", + .owner = THIS_MODULE, + }, +}; + +static int __init qci_hwmon_init(void) +{ + platform_driver_register(&qci_hwmon_driver); + + return 0; +} + +static void __exit qci_hwmon_exit(void) +{ + platform_driver_unregister(&qci_hwmon_driver); +} + +module_init(qci_hwmon_init); +module_exit(qci_hwmon_exit); + +MODULE_AUTHOR("Quanta Computer Inc."); +MODULE_DESCRIPTION("Quanta Switch Hardware Monitor driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_platform.h b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_platform.h new file mode 100755 index 00000000000..0737c8ce817 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_platform.h @@ -0,0 +1,64 @@ +/* + * Driver model definations for Quanta Platform drivers + * + * Copyright (C) 2015-2016 Quanta QCT + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#ifndef __QCI_PLATFORM_H_INCLUDED +#define __QCI_PLATFORM_H_INCLUDED + +#define MUX_INFO(bus, deselect) \ + {.adap_id = bus, .deselect_on_exit = deselect} + +#define GPIO_INFO(id, gpio_nr) \ + {.gpio_id = id, .system_gpio_nr = gpio_nr} + +struct platform_gpio { + int gpio_id; + int system_gpio_nr; +}; + +/* FIXME: Please add important GPIO which need to be request */ +enum PLATFORM_GPIO_ID { + GPIO_PSU1_PRSNT, + GPIO_PSU1_PWRGD, + GPIO_PSU2_PRSNT, + GPIO_PSU2_PWRGD, +}; + +#define LED_ON LED_FULL + +#define LED_INFO(id) \ + {.led_id = id, .cdev = NULL} + +struct platform_led { + int led_id; + struct led_classdev *cdev; +}; + +enum PLATFORM_LED_ID { + SYSLED_AMBER, + SYSLED_GREEN, + FRONT_PSU1_GREEN, + FRONT_PSU1_RED, + FRONT_PSU2_GREEN, + FRONT_PSU2_RED, + FRONT_FAN_GREEN, + FRONT_FAN_RED, + REAR_FAN1_RED, + REAR_FAN2_RED, + REAR_FAN3_RED, + REAR_FAN4_RED, + REAR_FAN5_RED, + REAR_FAN6_RED, + TOTAL_LED_NR +}; + +extern int qci_platform_get_gpio(int platform_gpio); +extern int qci_platform_set_led(int led_id, bool led_on); + +#endif /* __QCI_PLATFORM_H_INCLUDED */ diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_platform_ix1b.c b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_platform_ix1b.c new file mode 100644 index 00000000000..925b46256ce --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_platform_ix1b.c @@ -0,0 +1,501 @@ +/* + * Quanta IX1B platform driver + * + * + * Copyright (C) 2014 Quanta Computer inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE > KERNEL_VERSION(3,12,0) +#include +#else +#include +#endif +#include "qci_platform.h" + +#define QUANTA_CPU_RGL + +static struct pca954x_platform_mode pca9548sfp1_modes[] = { + MUX_INFO(0x20, 1), + MUX_INFO(0x21, 1), + MUX_INFO(0x22, 1), + MUX_INFO(0x23, 1), + MUX_INFO(0x24, 1), + MUX_INFO(0x25, 1), + MUX_INFO(0x26, 1), + MUX_INFO(0x27, 1), +}; + +static struct pca954x_platform_data pca9548sfp1_data = { + .modes = pca9548sfp1_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp2_modes[] = { + MUX_INFO(0x28, 1), + MUX_INFO(0x29, 1), + MUX_INFO(0x2a, 1), + MUX_INFO(0x2b, 1), + MUX_INFO(0x2c, 1), + MUX_INFO(0x2d, 1), + MUX_INFO(0x2e, 1), + MUX_INFO(0x2f, 1), +}; + +static struct pca954x_platform_data pca9548sfp2_data = { + .modes = pca9548sfp2_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp3_modes[] = { + MUX_INFO(0x30, 1), + MUX_INFO(0x31, 1), + MUX_INFO(0x32, 1), + MUX_INFO(0x33, 1), + MUX_INFO(0x34, 1), + MUX_INFO(0x35, 1), + MUX_INFO(0x36, 1), + MUX_INFO(0x37, 1), +}; + +static struct pca954x_platform_data pca9548sfp3_data = { + .modes = pca9548sfp3_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp4_modes[] = { + MUX_INFO(0x38, 1), + MUX_INFO(0x39, 1), + MUX_INFO(0x3a, 1), + MUX_INFO(0x3b, 1), + MUX_INFO(0x3c, 1), + MUX_INFO(0x3d, 1), + MUX_INFO(0x3e, 1), + MUX_INFO(0x3f, 1), +}; + +static struct pca954x_platform_data pca9548sfp4_data = { + .modes = pca9548sfp4_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9546_1_modes[] = { + MUX_INFO(0x10, 1), + MUX_INFO(0x11, 1), + MUX_INFO(0x12, 1), + MUX_INFO(0x13, 1), +}; + +static struct pca954x_platform_data pca9546_1_data = { + .modes = pca9546_1_modes, + .num_modes = 4, +}; + +static struct pca954x_platform_mode pca9546_2_modes[] = { + MUX_INFO(0x14, 1), + MUX_INFO(0x15, 1), + MUX_INFO(0x16, 1), + MUX_INFO(0x17, 1), +}; + +static struct pca954x_platform_data pca9546_2_data = { + .modes = pca9546_2_modes, + .num_modes = 4, +}; + +/* CPU gpio base defined in devicetree + * default is ARCH_NR_GPIOS - 32, (256-32=224) + * It must match devicetree default gpio base + * */ +#define PCA9555_PSU_GPIO_BASE 0x10 +#define PCA9555_FAN_GPIO_BASE 0x20 +#define PCA9555_ID_GPIO_BASE 0x30 + +#if defined(QUANTA_CPU_RGL) +#define PCA9555_CPU_LED_GPIO_BASE 0x80 + +static struct pca954x_platform_mode pca9546_cpu1_modes[] = { + MUX_INFO(0x18, 1), + MUX_INFO(0x19, 1), + MUX_INFO(0x1a, 1), + MUX_INFO(0x1b, 1), +}; + +static struct pca954x_platform_data pca9546_cpu1_data = { + .modes = pca9546_cpu1_modes, + .num_modes = 4, +}; + +static struct pca953x_platform_data pca9555_cpuled_data = { + .gpio_base = PCA9555_CPU_LED_GPIO_BASE, +}; +#endif + +static struct pca953x_platform_data pca9555psu1_data = { + .gpio_base = PCA9555_PSU_GPIO_BASE, +}; + +static struct pca953x_platform_data pca9555fan_data = { + .gpio_base = PCA9555_FAN_GPIO_BASE, +}; + +static struct pca953x_platform_data pca9555ID_data = { + .gpio_base = PCA9555_ID_GPIO_BASE, +}; + +static struct i2c_board_info ix1b_i2c_devices[] = { + { + I2C_BOARD_INFO("pca9546", 0x77), // 0 + .platform_data = &pca9546_1_data, + }, + { + I2C_BOARD_INFO("pca9546", 0x72), // 1 + .platform_data = &pca9546_2_data, + }, + { + I2C_BOARD_INFO("pca9555", 0x26), // 2 + .platform_data = &pca9555psu1_data, + }, + { + I2C_BOARD_INFO("24c02", 0x54), // 3 + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 4 + .platform_data = &pca9548sfp1_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x74), // 5 + .platform_data = &pca9548sfp2_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x75), // 6 + .platform_data = &pca9548sfp3_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x76), // 7 + .platform_data = &pca9548sfp4_data, + }, + { + I2C_BOARD_INFO("CPLD-QSFP28", 0x38), // 8 + }, + { + I2C_BOARD_INFO("CPLD-QSFP28", 0x39), // 9 + }, + { + I2C_BOARD_INFO("pca9555", 0x23), // 10 + .platform_data = &pca9555ID_data, + }, + { + I2C_BOARD_INFO("pca9555", 0x25), // 11 + .platform_data = &pca9555fan_data, + }, + { + I2C_BOARD_INFO("qci_pmbus_ix1b", 0x5f), // 12 + }, + { + I2C_BOARD_INFO("qci_pmbus_ix1b", 0x59), // 13 + }, +#if defined(QUANTA_CPU_RGL) + { + I2C_BOARD_INFO("pca9546", 0x71), // 14 + .platform_data = &pca9546_cpu1_data, + }, + { + I2C_BOARD_INFO("pca9555", 0x20), // 15 + .platform_data = &pca9555_cpuled_data, + }, + { + I2C_BOARD_INFO("optoe1", 0x50), // 16 + }, +#endif +}; + +static struct platform_driver ix1b_platform_driver = { + .driver = { + .name = "qci-ix1b", + .owner = THIS_MODULE, + }, +}; + +static struct platform_led ix1b_leds[] = { +#if defined(QUANTA_CPU_RGL) + LED_INFO(SYSLED_AMBER), + LED_INFO(SYSLED_GREEN), +#endif + LED_INFO(FRONT_PSU1_GREEN), + LED_INFO(FRONT_PSU1_RED), + LED_INFO(FRONT_PSU2_GREEN), + LED_INFO(FRONT_PSU2_RED), + LED_INFO(FRONT_FAN_GREEN), + LED_INFO(FRONT_FAN_RED), + LED_INFO(REAR_FAN1_RED), + LED_INFO(REAR_FAN2_RED), + LED_INFO(REAR_FAN3_RED), + LED_INFO(REAR_FAN4_RED), +}; + +static struct gpio_led system_led[] = { +#if defined(QUANTA_CPU_RGL) + { + .name = "sysled_amber", + .default_trigger = "timer", + .gpio = (PCA9555_CPU_LED_GPIO_BASE + 10), + .active_low = 0, + }, + { + .name = "sysled_green", + .gpio = (PCA9555_CPU_LED_GPIO_BASE + 11), + .active_low = 0, + }, +#endif + { + .name = "front_led_psu1_green", + .gpio = (PCA9555_PSU_GPIO_BASE + 10), + .active_low = 0, + }, + { + .name = "front_led_psu1_red", + .gpio = (PCA9555_PSU_GPIO_BASE + 11), + .active_low = 0, + }, + { + .name = "front_led_psu2_green", + .gpio = (PCA9555_PSU_GPIO_BASE + 12), + .active_low = 0, + }, + { + .name = "front_led_psu2_red", + .gpio = (PCA9555_PSU_GPIO_BASE + 13), + .active_low = 0, + }, + { + .name = "front_led_fan_green", + .gpio = (PCA9555_PSU_GPIO_BASE + 14), + .active_low = 0, + }, + { + .name = "front_led_fan_red", + .gpio = (PCA9555_PSU_GPIO_BASE + 15), + .active_low = 0, + }, + { + .name = "rear_led_fan1_red", + .gpio = (PCA9555_FAN_GPIO_BASE + 12), + .active_low = 0, + }, + { + .name = "rear_led_fan2_red", + .gpio = (PCA9555_FAN_GPIO_BASE + 13), + .active_low = 0, + }, + { + .name = "rear_led_fan3_red", + .gpio = (PCA9555_FAN_GPIO_BASE + 14), + .active_low = 0, + }, + { + .name = "rear_led_fan4_red", + .gpio = (PCA9555_FAN_GPIO_BASE + 15), + .active_low = 0, + }, +}; + +static struct gpio_led_platform_data system_led_data = { + .num_leds = ARRAY_SIZE(system_led), + .leds = system_led +}; + +static struct platform_device system_led_dev = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &system_led_data, + }, +}; + +static struct platform_device qci_hwmon_device = { + .name = "qci-hwmon", + .id = 0, + .dev = { + }, +}; + +static struct platform_device *ix1b_device; + +struct gpio_led_data { + struct led_classdev cdev; + unsigned gpio; + struct work_struct work; + u8 new_level; + u8 can_sleep; + u8 active_low; + u8 blinking; + int (*platform_gpio_blink_set)(unsigned gpio, int state, + unsigned long *delay_on, unsigned long *delay_off); +}; + +struct gpio_leds_priv { + int num_leds; + struct gpio_led_data leds[]; +}; + +static int __init ix1b_platform_init(void) +{ + struct i2c_client *client; + struct i2c_adapter *adapter; + struct gpio_leds_priv *priv; + int i; + int ret; + + ret = platform_driver_register(&ix1b_platform_driver); + if (ret < 0) + return ret; + + /* Register platform stuff */ + ix1b_device = platform_device_alloc("qci-ix1b", -1); + if (!ix1b_device) { + ret = -ENOMEM; + goto fail_platform_driver; + } + + ret = platform_device_add(ix1b_device); + if (ret) + goto fail_platform_device; + + adapter = i2c_get_adapter(0); + client = i2c_new_device(adapter, &ix1b_i2c_devices[0]); // pca9546_1 - Address: 0x77 + printk("[CC] NEW device pca9546_1\n"); + client = i2c_new_device(adapter, &ix1b_i2c_devices[1]); // pca9546_2 - Address: 0x72 + printk("[CC] NEW device pca9546_2\n"); +#if defined(QUANTA_CPU_RGL) + client = i2c_new_device(adapter, &ix1b_i2c_devices[14]); // cpu pca9546_1 - Address: 0x71 + printk("[CC] NEW device cpu pca9546_1\n"); +#endif + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x14); + client = i2c_new_device(adapter, &ix1b_i2c_devices[12]); // pmbus_psu1 - Address: 0x5f + printk("[CC] NEW device pmbus_psu1\n"); + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x15); + client = i2c_new_device(adapter, &ix1b_i2c_devices[13]); // pmbus_psu2 - Address: 0x59 + printk("[CC] NEW device pmbus_psu2\n"); + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x16); + client = i2c_new_device(adapter, &ix1b_i2c_devices[2]); // pca9555-PSU1 - Address: 0x26 + printk("[CC] NEW device pca9555-PSU1\n"); + client = i2c_new_device(adapter, &ix1b_i2c_devices[3]); // MB_BOARDINFO_EEPROM - Address: 0x54 + printk("[CC] NEW device MB_BOARDINFO_EEPROM\n"); + client = i2c_new_device(adapter, &ix1b_i2c_devices[10]); // pca9555-ID - Address: 0x23 + printk("[CC] NEW device pca9555-ID\n"); + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x17); + client = i2c_new_device(adapter, &ix1b_i2c_devices[11]); // pca9555-fan - Address: 0x25 + printk("[CC] NEW device pca9555-fan\n"); + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x10); + client = i2c_new_device(adapter, &ix1b_i2c_devices[4]); // pca9548_1 SFP - Address: 0x73 + printk("[CC] NEW device pca9548_1 SFP\n"); + client = i2c_new_device(adapter, &ix1b_i2c_devices[5]); // pca9548_2 SFP - Address: 0x74 + printk("[CC] NEW device pca9548_2 SFP\n"); + client = i2c_new_device(adapter, &ix1b_i2c_devices[6]); // pca9548_3 SFP - Address: 0x75 + printk("[CC] NEW device pca9548_3 SFP\n"); + client = i2c_new_device(adapter, &ix1b_i2c_devices[8]); // CPLD2 - Address: 0x38 + printk("[CC] NEW device CPLD2\n"); + client = i2c_new_device(adapter, &ix1b_i2c_devices[9]); // CPLD3 - Address: 0x39 + printk("[CC] NEW device CPLD3\n"); + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x11); + client = i2c_new_device(adapter, &ix1b_i2c_devices[7]); // pca9548_4 SFP - Address: 0x76 + printk("[CC] NEW device pca9548_4 SFP\n"); + i2c_put_adapter(adapter); + +#if defined(QUANTA_CPU_RGL) + adapter = i2c_get_adapter(0x18); + client = i2c_new_device(adapter, &ix1b_i2c_devices[15]); // cpu pca9555_1 - Address: 0x20 + printk("[CC] NEW device cpu pca9555_1\n"); + i2c_put_adapter(adapter); + + for(i = 0x20; i < 0x40; i++) + { + adapter = i2c_get_adapter(i); + client = i2c_new_device(adapter, &ix1b_i2c_devices[16]); // eeprom for loopback module - Address: 0x50 + i2c_put_adapter(adapter); + } + printk("[CC] NEW device eeprom\n"); +#endif + + /* Register LED devices */ + platform_device_register(&system_led_dev); + priv = platform_get_drvdata(&system_led_dev); + for (i = 0; i < priv->num_leds; i++) { + printk("leds-gpio gpio-%d: Register led %s\n", priv->leds[i].gpio, priv->leds[i].cdev.name); + ix1b_leds[i].cdev = &(priv->leds[i].cdev); + } + printk("[CC] NEW device led\n"); + + platform_device_register(&qci_hwmon_device); + printk("[CC] NEW device hwmon\n"); + + return 0; + +fail_platform_device: + platform_device_put(ix1b_device); + +fail_platform_driver: + platform_driver_unregister(&ix1b_platform_driver); + return ret; +} + +static void __exit ix1b_platform_exit(void) +{ + platform_device_unregister(ix1b_device); + platform_driver_unregister(&ix1b_platform_driver); +} + +module_init(ix1b_platform_init); +module_exit(ix1b_platform_exit); + + +MODULE_AUTHOR("Quanta Computer Inc."); +MODULE_DESCRIPTION("Quanta IX1B Platform Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_pmbus.c b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_pmbus.c new file mode 100755 index 00000000000..0fac27b59b6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/modules/qci_pmbus.c @@ -0,0 +1,741 @@ +/* + * QUANTA Generic PMBUS driver + * + * + * Based on generic pmbus driver and ltc2978 driver + * + * Author: Chih-Pei Chang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include + +enum projects { ly8, ix1, ix2, ix1b }; + +#define DELAY_TIME 1000 /* uS */ + +/* Pmbus reg defines are copied from drivers/hwmon/pmbus/pmbus.h*/ +/* + * Registers + */ +enum pmbus_regs { + PMBUS_PAGE = 0x00, + PMBUS_OPERATION = 0x01, + PMBUS_ON_OFF_CONFIG = 0x02, + PMBUS_CLEAR_FAULTS = 0x03, + PMBUS_PHASE = 0x04, + + PMBUS_CAPABILITY = 0x19, + PMBUS_QUERY = 0x1A, + + PMBUS_VOUT_MODE = 0x20, + PMBUS_VOUT_COMMAND = 0x21, + PMBUS_VOUT_TRIM = 0x22, + PMBUS_VOUT_CAL_OFFSET = 0x23, + PMBUS_VOUT_MAX = 0x24, + PMBUS_VOUT_MARGIN_HIGH = 0x25, + PMBUS_VOUT_MARGIN_LOW = 0x26, + PMBUS_VOUT_TRANSITION_RATE = 0x27, + PMBUS_VOUT_DROOP = 0x28, + PMBUS_VOUT_SCALE_LOOP = 0x29, + PMBUS_VOUT_SCALE_MONITOR = 0x2A, + + PMBUS_COEFFICIENTS = 0x30, + PMBUS_POUT_MAX = 0x31, + + PMBUS_FAN_CONFIG_12 = 0x3A, + PMBUS_FAN_COMMAND_1 = 0x3B, + PMBUS_FAN_COMMAND_2 = 0x3C, + PMBUS_FAN_CONFIG_34 = 0x3D, + PMBUS_FAN_COMMAND_3 = 0x3E, + PMBUS_FAN_COMMAND_4 = 0x3F, + + PMBUS_VOUT_OV_FAULT_LIMIT = 0x40, + PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41, + PMBUS_VOUT_OV_WARN_LIMIT = 0x42, + PMBUS_VOUT_UV_WARN_LIMIT = 0x43, + PMBUS_VOUT_UV_FAULT_LIMIT = 0x44, + PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45, + PMBUS_IOUT_OC_FAULT_LIMIT = 0x46, + PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47, + PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48, + PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49, + PMBUS_IOUT_OC_WARN_LIMIT = 0x4A, + PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B, + PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C, + + PMBUS_OT_FAULT_LIMIT = 0x4F, + PMBUS_OT_FAULT_RESPONSE = 0x50, + PMBUS_OT_WARN_LIMIT = 0x51, + PMBUS_UT_WARN_LIMIT = 0x52, + PMBUS_UT_FAULT_LIMIT = 0x53, + PMBUS_UT_FAULT_RESPONSE = 0x54, + PMBUS_VIN_OV_FAULT_LIMIT = 0x55, + PMBUS_VIN_OV_FAULT_RESPONSE = 0x56, + PMBUS_VIN_OV_WARN_LIMIT = 0x57, + PMBUS_VIN_UV_WARN_LIMIT = 0x58, + PMBUS_VIN_UV_FAULT_LIMIT = 0x59, + + PMBUS_IIN_OC_FAULT_LIMIT = 0x5B, + PMBUS_IIN_OC_WARN_LIMIT = 0x5D, + + PMBUS_POUT_OP_FAULT_LIMIT = 0x68, + PMBUS_POUT_OP_WARN_LIMIT = 0x6A, + PMBUS_PIN_OP_WARN_LIMIT = 0x6B, + + PMBUS_STATUS_BYTE = 0x78, + PMBUS_STATUS_WORD = 0x79, + PMBUS_STATUS_VOUT = 0x7A, + PMBUS_STATUS_IOUT = 0x7B, + PMBUS_STATUS_INPUT = 0x7C, + PMBUS_STATUS_TEMPERATURE = 0x7D, + PMBUS_STATUS_CML = 0x7E, + PMBUS_STATUS_OTHER = 0x7F, + PMBUS_STATUS_MFR_SPECIFIC = 0x80, + PMBUS_STATUS_FAN_12 = 0x81, + PMBUS_STATUS_FAN_34 = 0x82, + + PMBUS_READ_VIN = 0x88, + PMBUS_READ_IIN = 0x89, + PMBUS_READ_VCAP = 0x8A, + PMBUS_READ_VOUT = 0x8B, + PMBUS_READ_IOUT = 0x8C, + PMBUS_READ_TEMPERATURE_1 = 0x8D, + PMBUS_READ_TEMPERATURE_2 = 0x8E, + PMBUS_READ_TEMPERATURE_3 = 0x8F, + PMBUS_READ_FAN_SPEED_1 = 0x90, + PMBUS_READ_FAN_SPEED_2 = 0x91, + PMBUS_READ_FAN_SPEED_3 = 0x92, + PMBUS_READ_FAN_SPEED_4 = 0x93, + PMBUS_READ_DUTY_CYCLE = 0x94, + PMBUS_READ_FREQUENCY = 0x95, + PMBUS_READ_POUT = 0x96, + PMBUS_READ_PIN = 0x97, + + PMBUS_REVISION = 0x98, + PMBUS_MFR_ID = 0x99, + PMBUS_MFR_MODEL = 0x9A, + PMBUS_MFR_REVISION = 0x9B, + PMBUS_MFR_LOCATION = 0x9C, + PMBUS_MFR_DATE = 0x9D, + PMBUS_MFR_SERIAL = 0x9E, + +/* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ + PMBUS_VIRT_BASE = 0x100, + PMBUS_VIRT_READ_TEMP_AVG, + PMBUS_VIRT_READ_TEMP_MIN, + PMBUS_VIRT_READ_TEMP_MAX, + PMBUS_VIRT_RESET_TEMP_HISTORY, + PMBUS_VIRT_READ_VIN_AVG, + PMBUS_VIRT_READ_VIN_MIN, + PMBUS_VIRT_READ_VIN_MAX, + PMBUS_VIRT_RESET_VIN_HISTORY, + PMBUS_VIRT_READ_IIN_AVG, + PMBUS_VIRT_READ_IIN_MIN, + PMBUS_VIRT_READ_IIN_MAX, + PMBUS_VIRT_RESET_IIN_HISTORY, + PMBUS_VIRT_READ_PIN_AVG, + PMBUS_VIRT_READ_PIN_MIN, + PMBUS_VIRT_READ_PIN_MAX, + PMBUS_VIRT_RESET_PIN_HISTORY, + PMBUS_VIRT_READ_POUT_AVG, + PMBUS_VIRT_READ_POUT_MIN, + PMBUS_VIRT_READ_POUT_MAX, + PMBUS_VIRT_RESET_POUT_HISTORY, + PMBUS_VIRT_READ_VOUT_AVG, + PMBUS_VIRT_READ_VOUT_MIN, + PMBUS_VIRT_READ_VOUT_MAX, + PMBUS_VIRT_RESET_VOUT_HISTORY, + PMBUS_VIRT_READ_IOUT_AVG, + PMBUS_VIRT_READ_IOUT_MIN, + PMBUS_VIRT_READ_IOUT_MAX, + PMBUS_VIRT_RESET_IOUT_HISTORY, + PMBUS_VIRT_READ_TEMP2_AVG, + PMBUS_VIRT_READ_TEMP2_MIN, + PMBUS_VIRT_READ_TEMP2_MAX, + PMBUS_VIRT_RESET_TEMP2_HISTORY, + + PMBUS_VIRT_READ_VMON, + PMBUS_VIRT_VMON_UV_WARN_LIMIT, + PMBUS_VIRT_VMON_OV_WARN_LIMIT, + PMBUS_VIRT_VMON_UV_FAULT_LIMIT, + PMBUS_VIRT_VMON_OV_FAULT_LIMIT, + PMBUS_VIRT_STATUS_VMON, +}; + +enum pmbus_sensor_classes { + PSC_VOLTAGE_IN = 0, + PSC_VOLTAGE_OUT, + PSC_CURRENT_IN, + PSC_CURRENT_OUT, + PSC_POWER, + PSC_TEMPERATURE, + PSC_FAN, + PSC_NUM_CLASSES /* Number of power sensor classes */ +}; + +#define PMBUS_PAGES 32 /* Per PMBus specification */ + +/* Functionality bit mask */ +#define PMBUS_HAVE_VIN BIT(0) +#define PMBUS_HAVE_VCAP BIT(1) +#define PMBUS_HAVE_VOUT BIT(2) +#define PMBUS_HAVE_IIN BIT(3) +#define PMBUS_HAVE_IOUT BIT(4) +#define PMBUS_HAVE_PIN BIT(5) +#define PMBUS_HAVE_POUT BIT(6) +#define PMBUS_HAVE_FAN12 BIT(7) +#define PMBUS_HAVE_FAN34 BIT(8) +#define PMBUS_HAVE_TEMP BIT(9) +#define PMBUS_HAVE_TEMP2 BIT(10) +#define PMBUS_HAVE_TEMP3 BIT(11) +#define PMBUS_HAVE_STATUS_VOUT BIT(12) +#define PMBUS_HAVE_STATUS_IOUT BIT(13) +#define PMBUS_HAVE_STATUS_INPUT BIT(14) +#define PMBUS_HAVE_STATUS_TEMP BIT(15) +#define PMBUS_HAVE_STATUS_FAN12 BIT(16) +#define PMBUS_HAVE_STATUS_FAN34 BIT(17) +#define PMBUS_HAVE_VMON BIT(18) +#define PMBUS_HAVE_STATUS_VMON BIT(19) + +enum pmbus_data_format { linear = 0, direct, vid }; +enum vrm_version { vr11 = 0, vr12, vr13 }; + +struct pmbus_driver_info { + int pages; /* Total number of pages */ + enum pmbus_data_format format[PSC_NUM_CLASSES]; + enum vrm_version vrm_version; + /* + * Support one set of coefficients for each sensor type + * Used for chips providing data in direct mode. + */ + int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ + int b[PSC_NUM_CLASSES]; /* offset */ + int R[PSC_NUM_CLASSES]; /* exponent */ + + u32 func[PMBUS_PAGES]; /* Functionality, per page */ + /* + * The following functions map manufacturing specific register values + * to PMBus standard register values. Specify only if mapping is + * necessary. + * Functions return the register value (read) or zero (write) if + * successful. A return value of -ENODATA indicates that there is no + * manufacturer specific register, but that a standard PMBus register + * may exist. Any other negative return value indicates that the + * register does not exist, and that no attempt should be made to read + * the standard register. + */ + int (*read_byte_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int reg); + int (*write_word_data)(struct i2c_client *client, int page, int reg, + u16 word); + int (*write_byte)(struct i2c_client *client, int page, u8 value); + /* + * The identify function determines supported PMBus functionality. + * This function is only necessary if a chip driver supports multiple + * chips, and the chip functionality is not pre-determined. + */ + int (*identify)(struct i2c_client *client, + struct pmbus_driver_info *info); + + /* Regulator functionality, if supported by this chip driver. */ + int num_regulators; + const struct regulator_desc *reg_desc; +}; + +extern int pmbus_set_page(struct i2c_client *client, u8 page); +extern int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); +extern bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); +extern bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); +extern int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, + struct pmbus_driver_info *info); +extern int pmbus_do_remove(struct i2c_client *client); + +/* Needed to access the mutex. Copied from pmbus_core.c */ +#define PB_STATUS_BASE 0 +#define PB_STATUS_VOUT_BASE (PB_STATUS_BASE + PMBUS_PAGES) +#define PB_STATUS_IOUT_BASE (PB_STATUS_VOUT_BASE + PMBUS_PAGES) +#define PB_STATUS_FAN_BASE (PB_STATUS_IOUT_BASE + PMBUS_PAGES) +#define PB_STATUS_FAN34_BASE (PB_STATUS_FAN_BASE + PMBUS_PAGES) +#define PB_STATUS_TEMP_BASE (PB_STATUS_FAN34_BASE + PMBUS_PAGES) +#define PB_STATUS_INPUT_BASE (PB_STATUS_TEMP_BASE + PMBUS_PAGES) +#define PB_STATUS_VMON_BASE (PB_STATUS_INPUT_BASE + 1) +#define PB_NUM_STATUS_REG (PB_STATUS_VMON_BASE + 1) +struct pmbus_data { + struct device *dev; + struct device *hwmon_dev; + + u32 flags; /* from platform data */ + + int exponent[PMBUS_PAGES]; + /* linear mode: exponent for output voltages */ + + const struct pmbus_driver_info *info; + + int max_attributes; + int num_attributes; + struct attribute_group group; + const struct attribute_group *groups[2]; + + struct pmbus_sensor *sensors; + + struct mutex update_lock; + bool valid; + unsigned long last_updated; /* in jiffies */ + + /* + * A single status register covers multiple attributes, + * so we keep them all together. + */ + u8 status[PB_NUM_STATUS_REG]; + u8 status_register; + + u8 currpage; +}; + +static int qci_pmbus_read_block(struct i2c_client *client, u8 command, int data_len, u8 *data) +{ + int result = 0; + int retry_count = 3; + + while (retry_count) { + retry_count--; + + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (result < 0) { + msleep(10); + continue; + } + + result = 0; + break; + } + + return result; +} + +static ssize_t qci_pmbus_show_mfr_id(struct device *dev, + struct device_attribute *da, char *buf) +{ + int ret, len; + u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1], *str; + struct i2c_client *client = container_of(dev, struct i2c_client, dev); + + ret = qci_pmbus_read_block(client, PMBUS_MFR_ID, I2C_SMBUS_BLOCK_MAX, block_buffer); + if (ret < 0) { + dev_err(&client->dev, "Failed to read Manufacturer ID\n"); + return ret; + } + len = block_buffer[0]; + block_buffer[(len+1)] = '\0'; + str = &(block_buffer[1]); + + return snprintf(buf, PAGE_SIZE, "%s\n", str); +} + +static ssize_t qci_pmbus_show_mfr_model(struct device *dev, + struct device_attribute *da, char *buf) +{ + int ret, len; + u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1], *str; + struct i2c_client *client = container_of(dev, struct i2c_client, dev); + + ret = qci_pmbus_read_block(client, PMBUS_MFR_MODEL, I2C_SMBUS_BLOCK_MAX, block_buffer); + if (ret < 0) { + dev_err(&client->dev, "Failed to read Manufacturer Model\n"); + return ret; + } + len = block_buffer[0]; + block_buffer[(len+1)] = '\0'; + str = &(block_buffer[1]); + + return snprintf(buf, PAGE_SIZE, "%s\n", str); +} + +static ssize_t qci_pmbus_show_mfr_revision(struct device *dev, + struct device_attribute *da, char *buf) +{ + int ret, len; + u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1], *str; + struct i2c_client *client = container_of(dev, struct i2c_client, dev); + + ret = qci_pmbus_read_block(client, PMBUS_MFR_REVISION, I2C_SMBUS_BLOCK_MAX, block_buffer); + if (ret < 0) { + dev_err(&client->dev, "Failed to read Manufacturer Revision\n"); + return ret; + } + len = block_buffer[0]; + block_buffer[(len+1)] = '\0'; + str = &(block_buffer[1]); + + return snprintf(buf, PAGE_SIZE, "%s\n", str); +} + +static ssize_t qci_pmbus_show_mfr_location(struct device *dev, + struct device_attribute *da, char *buf) +{ + int ret, len; + u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1], *str; + struct i2c_client *client = container_of(dev, struct i2c_client, dev); + + ret = qci_pmbus_read_block(client, PMBUS_MFR_LOCATION, I2C_SMBUS_BLOCK_MAX, block_buffer); + if (ret < 0) { + dev_err(&client->dev, "Failed to read Manufacture Location\n"); + return ret; + } + len = block_buffer[0]; + block_buffer[(len+1)] = '\0'; + str = &(block_buffer[1]); + + return snprintf(buf, PAGE_SIZE, "%s\n", str); +} + +static ssize_t qci_pmbus_show_mfr_serial(struct device *dev, + struct device_attribute *da, char *buf) +{ + int ret, len; + u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1], *str; + struct i2c_client *client = container_of(dev, struct i2c_client, dev); + + ret = qci_pmbus_read_block(client, PMBUS_MFR_SERIAL, I2C_SMBUS_BLOCK_MAX, block_buffer); + if (ret < 0) { + dev_err(&client->dev, "Failed to read Manufacturer Serial\n"); + return ret; + } + len = block_buffer[0]; + block_buffer[(len+1)] = '\0'; + str = &(block_buffer[1]); + + return snprintf(buf, PAGE_SIZE, "%s\n", str); +} + + +static DEVICE_ATTR(mfr_id, S_IRUGO, qci_pmbus_show_mfr_id, NULL); +static DEVICE_ATTR(mfr_model, S_IRUGO, qci_pmbus_show_mfr_model, NULL); +static DEVICE_ATTR(mfr_revision, S_IRUGO, qci_pmbus_show_mfr_revision, NULL); +static DEVICE_ATTR(mfr_location, S_IRUGO, qci_pmbus_show_mfr_location, NULL); +static DEVICE_ATTR(mfr_serial, S_IRUGO, qci_pmbus_show_mfr_serial, NULL); + + +static struct attribute *qci_pmbus_inventory_attrs[] = { + &dev_attr_mfr_id.attr, + &dev_attr_mfr_model.attr, + &dev_attr_mfr_revision.attr, + &dev_attr_mfr_location.attr, + &dev_attr_mfr_serial.attr, + NULL +}; + +static struct attribute_group qci_pmbus_inventory_attr_grp = { + .attrs = qci_pmbus_inventory_attrs +}; + +/* FIXME: add project specific id here */ +static const struct i2c_device_id qci_pmbus_id[] = { + {"qci_pmbus_ly8", ly8}, + {"qci_pmbus_ix1", ix1}, + {"qci_pmbus_ix2", ix2}, + {"qci_pmbus_ix1b", ix1b}, + {} +}; +MODULE_DEVICE_TABLE(i2c, qci_pmbus_id); + +/* + * Find sensor groups and status registers on each page. + */ +static void qci_pmbus_find_sensor_groups(struct i2c_client *client, + struct pmbus_driver_info *info) +{ + int page; + + /* Sensors detected on page 0 only */ + if (pmbus_check_word_register(client, 0, PMBUS_READ_VIN)) + info->func[0] |= PMBUS_HAVE_VIN; + if (pmbus_check_word_register(client, 0, PMBUS_READ_VCAP)) + info->func[0] |= PMBUS_HAVE_VCAP; + if (pmbus_check_word_register(client, 0, PMBUS_READ_IIN)) + info->func[0] |= PMBUS_HAVE_IIN; + if (pmbus_check_word_register(client, 0, PMBUS_READ_PIN)) + info->func[0] |= PMBUS_HAVE_PIN; + if (info->func[0] + && pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT)) + info->func[0] |= PMBUS_HAVE_STATUS_INPUT; + if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_12) && + pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) { + info->func[0] |= PMBUS_HAVE_FAN12; + if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12)) + info->func[0] |= PMBUS_HAVE_STATUS_FAN12; + } + if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_34) && + pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) { + info->func[0] |= PMBUS_HAVE_FAN34; + if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34)) + info->func[0] |= PMBUS_HAVE_STATUS_FAN34; + } + if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1)) + info->func[0] |= PMBUS_HAVE_TEMP; + if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_2)) + info->func[0] |= PMBUS_HAVE_TEMP2; + if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_3)) + info->func[0] |= PMBUS_HAVE_TEMP3; + if (info->func[0] & (PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 + | PMBUS_HAVE_TEMP3) + && pmbus_check_byte_register(client, 0, + PMBUS_STATUS_TEMPERATURE)) + info->func[0] |= PMBUS_HAVE_STATUS_TEMP; + + /* Sensors detected on all pages */ + for (page = 0; page < info->pages; page++) { + if (pmbus_check_word_register(client, page, PMBUS_READ_VOUT)) { + info->func[page] |= PMBUS_HAVE_VOUT; + if (pmbus_check_byte_register(client, page, + PMBUS_STATUS_VOUT)) + info->func[page] |= PMBUS_HAVE_STATUS_VOUT; + } + if (pmbus_check_word_register(client, page, PMBUS_READ_IOUT)) { + info->func[page] |= PMBUS_HAVE_IOUT; + if (pmbus_check_byte_register(client, 0, + PMBUS_STATUS_IOUT)) + info->func[page] |= PMBUS_HAVE_STATUS_IOUT; + } + if (pmbus_check_word_register(client, page, PMBUS_READ_POUT)) + info->func[page] |= PMBUS_HAVE_POUT; + } +} + +/* + * Identify chip parameters. + */ +static int qci_pmbus_identify(struct i2c_client *client, + struct pmbus_driver_info *info) +{ + int ret = 0; + + if (!info->pages) { + /* + * Check if the PAGE command is supported. If it is, + * keep setting the page number until it fails or until the + * maximum number of pages has been reached. Assume that + * this is the number of pages supported by the chip. + */ + if (pmbus_check_byte_register(client, 0, PMBUS_PAGE)) { + int page; + + for (page = 1; page < PMBUS_PAGES; page++) { + if (pmbus_set_page(client, page) < 0) + break; + } + pmbus_set_page(client, 0); + info->pages = page; + } else { + info->pages = 1; + } + } + + if (pmbus_check_byte_register(client, 0, PMBUS_VOUT_MODE)) { + int vout_mode; + + vout_mode = pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE); + if (vout_mode >= 0 && vout_mode != 0xff) { + switch (vout_mode >> 5) { + case 0: + break; + case 1: + info->format[PSC_VOLTAGE_OUT] = vid; + info->vrm_version = vr11; + break; + case 2: + info->format[PSC_VOLTAGE_OUT] = direct; + break; + default: + ret = -ENODEV; + goto abort; + } + } + } + + /* + * We should check if the COEFFICIENTS register is supported. + * If it is, and the chip is configured for direct mode, we can read + * the coefficients from the chip, one set per group of sensor + * registers. + * + * To do this, we will need access to a chip which actually supports the + * COEFFICIENTS command, since the command is too complex to implement + * without testing it. Until then, abort if a chip configured for direct + * mode was detected. + */ + if (info->format[PSC_VOLTAGE_OUT] == direct) { + ret = -ENODEV; + goto abort; + } + + /* if no function pre-defined, try to find sensor groups */ + if (info->func[0] == 0) qci_pmbus_find_sensor_groups(client, info); +abort: + return ret; +} + +int qci_pmbus_set_page(struct i2c_client *client, u8 page) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + int rv = 0; + int newpage; + + if (page != data->currpage) { + rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page); + udelay(DELAY_TIME); + newpage = i2c_smbus_read_byte_data(client, PMBUS_PAGE); + if (newpage != page) + rv = -EIO; + else + data->currpage = page; + } + return rv; +} + +int qci_write_byte(struct i2c_client *client, int page, u8 value) +{ + int rv; + + if (page >= 0) { + rv = qci_pmbus_set_page(client, page); + if (rv < 0) + return rv; + } + + rv = i2c_smbus_write_byte(client, value); + udelay(DELAY_TIME); + return rv; +} + +int qci_write_word_data(struct i2c_client *client, int page, int reg, u16 word) +{ + int rv; + + rv = qci_pmbus_set_page(client, page); + if (rv < 0) + return rv; + + rv = i2c_smbus_write_word_data(client, reg, word); + udelay(DELAY_TIME); + return rv; +} + +static int qci_pmbus_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct device *dev = &client->dev; + struct pmbus_driver_info *info; + int ret; + + dev_info(dev, "qci_pmbus_probe\n"); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_WORD_DATA)) + return -ENODEV; + + info = devm_kzalloc(dev, sizeof(struct pmbus_driver_info), GFP_KERNEL); + + if (!info) + return -ENOMEM; + + info->func[0] = 0; + + /* FIXME: add project specific function table here */ + switch (id->driver_data) { + case ly8: + info->pages = 1; + info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT + | PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12 + | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT + | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT + ; + break; + case ix1: + case ix2: + case ix1b: + info->pages = 1; + info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN + | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT + | PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12 + | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 + | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP + | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT + | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT + | PMBUS_HAVE_POUT + ; + break; + default: + break; + } + info->write_word_data = qci_write_word_data; + info->write_byte = qci_write_byte; + info->identify = qci_pmbus_identify; /* FIXME: reserve for future use */ + + /* Register sysfs hooks */ + ret = sysfs_create_group(&dev->kobj, &qci_pmbus_inventory_attr_grp); + if (ret) { + dev_err(dev, "Failed to create sysfs entries\n"); + return -1; + } + + return pmbus_do_probe(client, id, info); +} + +/* This is the driver that will be inserted */ +static struct i2c_driver qci_pmbus_driver = { + .driver = { + .name = "qci-pmbus", + }, + .probe = qci_pmbus_probe, + .remove = pmbus_do_remove, + .id_table = qci_pmbus_id, +}; + +module_i2c_driver(qci_pmbus_driver); + + +MODULE_AUTHOR("Quanta Computer Inc."); +MODULE_VERSION("1.0"); +MODULE_DESCRIPTION("QUANTA generic PMBus driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/service/ix1b-platform-init.service b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/service/ix1b-platform-init.service new file mode 100755 index 00000000000..a51c0cca691 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/service/ix1b-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Quanta IX1B-32X Platform initialization service +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/quanta_ix1b_util.py install +ExecStop=/usr/local/bin/quanta_ix1b_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/setup.py b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/setup.py new file mode 100755 index 00000000000..e37687db7ec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='ix1b_32x', + version='1.0', + description='Module to initialize Quanta IX1B-32X platforms', + + packages=['ix1b_32x'], + package_dir={'ix1b_32x': 'ix1b-32x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/utils/quanta_ix1b_util.py b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/utils/quanta_ix1b_util.py new file mode 100755 index 00000000000..2135932938e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix1b-32x/utils/quanta_ix1b_util.py @@ -0,0 +1,236 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Quanta Computer Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv) < 2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level = logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + + for arg in args: + if arg == 'install': + install() + elif arg == 'clean': + uninstall() + else: + show_help() + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[IX1B-32X]" + txt + + return + +def exec_cmd(cmd, show): + logging.info('Run :' + cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd + "with result:" + str(status)) + show_log (" output:" + output) + if status: + logging.info('Failed :' + cmd) + if show: + print('Failed :' + cmd) + + return status, output + +instantiate = [ +#turn on module power +'echo 53 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio53/direction', +'echo 1 > /sys/class/gpio/gpio53/value', +#PSU1 present +'echo 16 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio16/direction', +#PSU1 power good signal +'echo 17 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio17/direction', +#PSU2 present +'echo 19 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio19/direction', +#PSU2 power good signal +'echo 20 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio20/direction', +#FAN 1-4 present +'echo 36 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio36/direction', +'echo 37 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio37/direction', +'echo 38 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio38/direction', +'echo 39 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio39/direction', +#turn on 100G led by default +'i2cset -y 0x13 0x38 0x00 0xff', +'i2cset -y 0x13 0x38 0x01 0xff', +'i2cset -y 0x13 0x39 0x00 0xff', +'i2cset -y 0x13 0x39 0x01 0xff' +] + +drivers =[ +'lpc_ich', +'i2c-i801', +'i2c-dev', +'i2c-mux-pca954x', +'gpio-pca953x', +'qci_pmbus', +'leds-gpio', +'optoe', +'qci_cpld_qsfp28', +'qci_platform_ix1b' +] + +def system_install(): + global FORCE + + time.sleep(3) + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("rmmod i2c_ismt ", 1) + status, output = exec_cmd("rmmod i2c-i801 ", 1) + #setup driver dependency + status, output = exec_cmd("depmod -a ", 1) + + #install drivers + for i in range(0, len(drivers)): + status, output = exec_cmd("modprobe " + drivers[i], 1) + + if status: + print output + if FORCE == 0: + return status + + #instantiate devices + for i in range(0, len(instantiate)): + status, output = exec_cmd(instantiate[i], 1) + + if status: + print output + if FORCE == 0: + return status + + #Mount Quanta hardware monitor driver + status, output = exec_cmd("modprobe qci_hwmon_ix1b", 1) + + #QSFP for 1~32 port + for port_number in range(1, 33): + bus_number = port_number + 31 + os.system("echo %d >/sys/bus/i2c/devices/%d-0050/port_name" % (port_number, bus_number)) + + #Set system LED to green + status, output = exec_cmd("echo 1 > /sys/class/leds/sysled_green/brightness", 1) + + return + +def system_ready(): + if not device_found(): + return False + + return True + +def install(): + if not device_found(): + print "No device, installing...." + status = system_install() + + if status: + if FORCE == 0: + return status + else: + print " ix1b driver already installed...." + + return + +def uninstall(): + global FORCE + + #uninstall drivers + for i in range(len(drivers) - 1, -1, -1): + status, output = exec_cmd("rmmod " + drivers[i], 1) + + if status: + print output + if FORCE == 0: + return status + + return + +def device_found(): + ret1, log = exec_cmd("ls " + i2c_prefix + "i2c-0", 0) + + return ret1 + +if __name__ == "__main__": + main() + + + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/classes/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/modules/Makefile b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/modules/Makefile new file mode 100644 index 00000000000..405c9153c09 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/modules/Makefile @@ -0,0 +1,3 @@ +obj-m:=qci_cpld.o qci_cpld_led.o quanta_platform_ix7.o + + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/modules/qci_cpld.c b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/modules/qci_cpld.c new file mode 100644 index 00000000000..e8556bc72d4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/modules/qci_cpld.c @@ -0,0 +1,451 @@ +/* + * A CPLD driver for monitor QSFP28 module I/O + * + * The CPLD is customize by Quanta for controlling QSFP28 module signals, + * they are RESET , INTERREPT , Module_Present, LPMODE + * Each CPLD control 16 modules, each module use 4 bits in register. + * + * Copyright (C) 2015 Quanta Inc. + * + * Author: Luffy Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_IDA(cpld_ida); + +enum platform_type { + SFP = 0, + QSFP, + QSFP28, + NONE +}; + +static struct class *cpld_class = NULL; + +struct sfp_data { + struct i2c_client *cpld_client; + char name[8]; + char type[8]; + u8 port_id; + u8 cpld_port; +}; + +struct cpld_data { + struct mutex lock; + struct device *port_dev[16]; + struct sfp_data *port_data[16]; +}; + +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int cpld_remove(struct i2c_client *client); + +static const struct i2c_device_id cpld_id[] = { + { "CPLD-SFP", SFP }, + { "CPLD-QSFP", QSFP }, + { "CPLD-QSFP28", QSFP28 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "qci_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, +// .address_list = normal_i2c, +}; + +#define CPLD_ID_PREFIX "port-" +#define CPLD_ID_FORMAT CPLD_ID_PREFIX "%d" + +#define RESET_MASK 0x08 +#define INTERRUPT_MASK 0x04 +#define MODULE_PRESENT_MASK 0x02 +#define LPMODE_MASK 0x01 +//#define I2C_MONITOR_MASK 0x01 + +static inline u8 get_group_cmd(u8 group) +{ + //FIXME: if group cmd change + return (group + 1); +} + +static inline u8 port_remapping(u8 phy_port) +{ + /* FIXME: implement by hardware design */ + /* The CPLD register port mapping is weird : + * MSB -------- LSB (word data) + * P3 P4 P1 P2 (per port 4 bits) + * For easy coding bit shift, we treat it as hw port swap + */ + return (phy_port % 2) ? (phy_port - 1) : (phy_port + 1); +} + +static ssize_t get_reset(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= RESET_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t get_interrupt(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= INTERRUPT_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t get_module_present(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= MODULE_PRESENT_MASK; + + //FIXME: if present is not low active + return sprintf(buf, "%d\n", value ? 0 : 1); +} + +static ssize_t get_lpmode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= LPMODE_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t set_reset(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + long disable; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + if (kstrtol(buf, 0, &disable)) + return -EINVAL; + + if ((disable != 1) && (disable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value &= ~(RESET_MASK << (group_port * 4)); + if (disable) + value |= (RESET_MASK << (group_port * 4)); + + dev_dbg(&client->dev, "write group%d value= %x\n", group + 1, value); + + i2c_smbus_write_word_data(client, get_group_cmd(group), (u16)value); +// mutex_unlock(&data->lock); + + return count; +} + +static ssize_t set_lpmode(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + long disable; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + if (kstrtol(buf, 0, &disable)) + return -EINVAL; + + if ((disable != 1) && (disable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value &= ~(LPMODE_MASK << (group_port * 4)); + if (disable) + value |= (LPMODE_MASK << (group_port * 4)); + + dev_dbg(&client->dev, "write group%d value= %x\n", group + 1, value); + + i2c_smbus_write_word_data(client, get_group_cmd(group), (u16)value); +// mutex_unlock(&data->lock); + + return count; +} + +static DEVICE_ATTR(reset, S_IWUSR | S_IRUGO, get_reset, set_reset); +static DEVICE_ATTR(lpmode, S_IWUSR | S_IRUGO, get_lpmode, set_lpmode); +static DEVICE_ATTR(module_present, S_IRUGO, get_module_present, NULL); +static DEVICE_ATTR(interrupt, S_IRUGO, get_interrupt, NULL); +//static DEVICE_ATTR(led_enable, S_IWUSR | S_IRUGO, get_led_enable, set_led_enable); +//static DEVICE_ATTR(monitor_enable, S_IWUSR | S_IRUGO, get_monitor_enable, set_monitor_enable); + +static const struct attribute *sfp_attrs[] = { + &dev_attr_reset.attr, + &dev_attr_lpmode.attr, + &dev_attr_module_present.attr, + &dev_attr_interrupt.attr, +// &dev_attr_led_enable.attr, + NULL, +}; + +static const struct attribute_group sfp_attr_group = { + .attrs = (struct attribute **) sfp_attrs, +}; + +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cpld_data *data; + struct sfp_data *port_data; +// struct i2c_monitor_data *monitor_data; + struct device *port_dev; +// struct device *i2c_dev; + int port_nr, i=0, err, max_port_num; + char name[I2C_NAME_SIZE], type[I2C_NAME_SIZE]; + + printk("cpld cpld_probe\n"); + + while(id->name[i]) + { + name[i]=tolower(id->name[i]); + i++; + } + name[i]='\0'; + strncpy(type,name+5,strlen(name)-5); + type[strlen(name)-5]='\0'; + + if (!cpld_class) + { + cpld_class = class_create(THIS_MODULE, name); + if (IS_ERR(cpld_class)) { + pr_err("couldn't create sysfs class\n"); + return PTR_ERR(cpld_class); + } + } + + data = devm_kzalloc(&client->dev, sizeof(struct cpld_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + if(!strcmp(client->name, "CPLD-QSFP28")){ + max_port_num = 16; + } + else{ + max_port_num = 4; + } + + /* register sfp port data to sysfs */ + for (i = 0; i < max_port_num; i++) + { + port_nr = ida_simple_get(&cpld_ida, 1, 99, GFP_KERNEL); + if (port_nr < 0) + goto err_out; + + port_data = kzalloc(sizeof(struct sfp_data), GFP_KERNEL); + + port_dev = device_create(cpld_class, &client->dev, MKDEV(0,0), port_data, CPLD_ID_FORMAT, port_nr); + if (IS_ERR(port_dev)) { + err = PTR_ERR(port_dev); + printk("err_status\n"); + } + + data->port_dev[i] = port_dev; + data->port_data[i] = port_data; + + strcpy(port_data->type, type); + + dev_info(&client->dev, "Register %s port-%d\n", port_data->type , port_nr); + + /* FIXME: implement Logical/Physical port remapping */ + //port_data->cpld_port = i; + port_data->cpld_port = port_remapping(i); + sprintf(port_data->name, "port-%d", port_nr); + port_data->port_id = port_nr; + dev_set_drvdata(port_dev, port_data); + port_dev->init_name = port_data->name; + port_data->cpld_client = client; + + err = sysfs_create_group(&port_dev->kobj, &sfp_attr_group); + // if (status) printk("err status\n"); + } + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s device found\n", client->name); + + + return 0; + +err_out: + return port_nr; +} + +/* FIXME: for older kernel doesn't with idr_is_empty function, implement here */ +#if 1 +static int idr_has_entry(int id, void *p, void *data) +{ + return 1; +} + +static bool cpld_idr_is_empty(struct idr *idp) +{ + return !idr_for_each(idp, idr_has_entry, NULL); +} +#endif + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + int i, max_port_num; +// int id; + + if(!strcmp(client->name, "CPLD-QSFP28")){ + max_port_num = 16; + } + else{ + max_port_num = 4; + } + + for (i = (max_port_num - 1); i >= 0; i--) + { + dev_info(data->port_dev[i], "Remove %s port-%d\n", data->port_data[i]->type , data->port_data[i]->port_id); + device_unregister(data->port_dev[i]); + ida_simple_remove(&cpld_ida, data->port_data[i]->port_id); + kfree(data->port_data[i]); + } + + if (cpld_idr_is_empty(&cpld_ida.idr)) + class_destroy(cpld_class); + + return 0; +} + +module_i2c_driver(cpld_driver); + +MODULE_AUTHOR("Luffy Cheng "); +MODULE_DESCRIPTION("Quanta Switch QSFP28 CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/modules/qci_cpld_led.c b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/modules/qci_cpld_led.c new file mode 100644 index 00000000000..37fc2e07246 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/modules/qci_cpld_led.c @@ -0,0 +1,275 @@ +/* + * A LED CPLD driver for Quanta Switch Platform + * + * The CPLD is customize by Quanta for decode led bit stream, + * This driver modify from Quanta CPLD I/O driver. + * + * Copyright (C) 2015 Quanta Inc. + * + * Author: Luffy Cheng + * Author: Roger Chang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_IDA(cpld_led_ida); + +enum platform_type { + IX7 = 0, + IX8, + NONE +}; + +static struct class *cpld_class = NULL; + +struct cpld_data { + struct i2c_client *cpld_client; + char name[8]; + u8 cpld_id; +}; + +struct cpld_led_data { + struct mutex lock; + struct device *port_dev; + struct cpld_data *cpld_data; +}; + +static int cpld_led_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int cpld_led_remove(struct i2c_client *client); + +static const struct i2c_device_id cpld_led_id[] = { + { "CPLDLED_IX7", IX7 }, + { "CPLDLED_IX8", IX8 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cpld_led_id); + +static struct i2c_driver cpld_led_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "qci_cpld_led", + }, + .probe = cpld_led_probe, + .remove = cpld_led_remove, + .id_table = cpld_led_id, +// .address_list = normal_i2c, +}; + +#define CPLD_LED_ID_PREFIX "CPLDLED-" +#define CPLD_LED_ID_FORMAT CPLD_LED_ID_PREFIX "%d" + +#define CPLD_DECODER_OFFSET 0x4 +#define CPLD_DECODER_MASK 0x1 +#define CPLD_USERCODE_START_OFFSET 0x0 + +static ssize_t get_led_decode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 offset = (u8)(CPLD_DECODER_OFFSET); + s32 value; + + value = i2c_smbus_read_byte_data(client, offset); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led decode value= %x\n", value); + + value &= CPLD_DECODER_MASK; + + return sprintf(buf, "%d\n", (value == 0) ? 1 : 0); +} + +static ssize_t get_usercode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 i = 0; + s32 value = 0, reading = 0; + + for (i = 0; i < 4; i++) + { + reading = i2c_smbus_read_byte_data(client, CPLD_USERCODE_START_OFFSET + i); + if (reading < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led usercode reg %d value= %x\n", i, reading); + + value |= reading << (24 - 8 * i); + } + + return sprintf(buf, "%X\n", value); +} + +static ssize_t set_led_decode(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + s32 value; + long enable; + + if (kstrtol(buf, 0, &enable)) + return -EINVAL; + + if ((enable != 1) && (enable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_byte_data(client, CPLD_DECODER_OFFSET); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led decode value= %x\n", value); + + value |= CPLD_DECODER_MASK; + if (enable) + value &= ~CPLD_DECODER_MASK; + + dev_dbg(&client->dev, "write led decode value= %x\n", value); + + i2c_smbus_write_byte_data(client, CPLD_DECODER_OFFSET, (u8)value); +// mutex_unlock(&data->lock); + + return count; +} + +static DEVICE_ATTR(led_decode, S_IWUSR | S_IRUGO, get_led_decode, set_led_decode); +static DEVICE_ATTR(usercode, S_IRUGO, get_usercode, NULL); + +static const struct attribute *led_attrs[] = { + &dev_attr_usercode.attr, + &dev_attr_led_decode.attr, + NULL, +}; + +static const struct attribute_group led_attr_group = { + .attrs = (struct attribute **) led_attrs, +}; + +static int cpld_led_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cpld_led_data *data; + struct cpld_data *led_data; + struct device *port_dev; + int nr, err; + + if (!cpld_class) + { + cpld_class = class_create(THIS_MODULE, "cpld-led"); + if (IS_ERR(cpld_class)) { + pr_err("couldn't create sysfs class\n"); + return PTR_ERR(cpld_class); + } + } + + data = devm_kzalloc(&client->dev, sizeof(struct cpld_led_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* Test */ + nr = ida_simple_get(&cpld_led_ida, 1, 99, GFP_KERNEL); + if (nr < 0) + goto err_out; + + led_data = kzalloc(sizeof(struct cpld_led_data), GFP_KERNEL); + + port_dev = device_create(cpld_class, &client->dev, MKDEV(0,0), led_data, CPLD_LED_ID_FORMAT, nr); + if (IS_ERR(port_dev)) { + err = PTR_ERR(port_dev); + // printk("err_status\n"); + } + + data->port_dev = port_dev; + data->cpld_data = led_data; + + dev_info(&client->dev, "Register CPLDLED %d\n", nr); + + sprintf(led_data->name, "LED%d-data", nr); + led_data->cpld_id = nr; + dev_set_drvdata(port_dev, led_data); + port_dev->init_name = led_data->name; + led_data->cpld_client = client; + + err = sysfs_create_group(&port_dev->kobj, &led_attr_group); + // if (status) printk("err status\n"); + /* end */ + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s device found\n", client->name); + + + return 0; + +err_out: + return nr; +} + +/* FIXME: for older kernel doesn't with idr_is_empty function, implement here */ +static int idr_has_entry(int id, void *p, void *data) +{ + return 1; +} + +static bool cpld_idr_is_empty(struct idr *idp) +{ + return !idr_for_each(idp, idr_has_entry, NULL); +} + +static int cpld_led_remove(struct i2c_client *client) +{ + struct cpld_led_data *data = i2c_get_clientdata(client); + + dev_info(data->port_dev, "Remove CPLDLED-%d\n", data->cpld_data->cpld_id); + device_unregister(data->port_dev); + ida_simple_remove(&cpld_led_ida, data->cpld_data->cpld_id); + kfree(data->cpld_data); + + if (cpld_idr_is_empty(&cpld_led_ida.idr)) + class_destroy(cpld_class); + + return 0; +} + +module_i2c_driver(cpld_led_driver); + +MODULE_AUTHOR("Luffy Cheng "); +MODULE_AUTHOR("Roger Chang "); +MODULE_DESCRIPTION("Quanta Switch LED CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/modules/quanta_platform_ix7.c b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/modules/quanta_platform_ix7.c new file mode 100644 index 00000000000..a2a0af63af7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/modules/quanta_platform_ix7.c @@ -0,0 +1,323 @@ +/* + * Quanta IX7 platform driver + * + * + * Copyright (C) 2014 Quanta Computer inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) +#include +#else +#include +#endif + +#define MUX_INFO(bus, deselect) \ + {.adap_id = bus, .deselect_on_exit = deselect} + +static struct pca954x_platform_mode pca9548sfp1_modes[] = { + MUX_INFO(0x20, 1), + MUX_INFO(0x21, 1), + MUX_INFO(0x22, 1), + MUX_INFO(0x23, 1), + MUX_INFO(0x24, 1), + MUX_INFO(0x25, 1), + MUX_INFO(0x26, 1), + MUX_INFO(0x27, 1), +}; + +static struct pca954x_platform_data pca9548sfp1_data = { + .modes = pca9548sfp1_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp2_modes[] = { + MUX_INFO(0x28, 1), + MUX_INFO(0x29, 1), + MUX_INFO(0x2a, 1), + MUX_INFO(0x2b, 1), + MUX_INFO(0x2c, 1), + MUX_INFO(0x2d, 1), + MUX_INFO(0x2e, 1), + MUX_INFO(0x2f, 1), +}; + +static struct pca954x_platform_data pca9548sfp2_data = { + .modes = pca9548sfp2_modes, + .num_modes = 8, +}; +static struct pca954x_platform_mode pca9548sfp3_modes[] = { + MUX_INFO(0x30, 1), + MUX_INFO(0x31, 1), + MUX_INFO(0x32, 1), + MUX_INFO(0x33, 1), + MUX_INFO(0x34, 1), + MUX_INFO(0x35, 1), + MUX_INFO(0x36, 1), + MUX_INFO(0x37, 1), +}; + +static struct pca954x_platform_data pca9548sfp3_data = { + .modes = pca9548sfp3_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp4_modes[] = { + MUX_INFO(0x38, 1), + MUX_INFO(0x39, 1), + MUX_INFO(0x3a, 1), + MUX_INFO(0x3b, 1), + MUX_INFO(0x3c, 1), + MUX_INFO(0x3d, 1), + MUX_INFO(0x3e, 1), + MUX_INFO(0x3f, 1), +}; + +static struct pca954x_platform_data pca9548sfp4_data = { + .modes = pca9548sfp4_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9546_modes[] = { + MUX_INFO(0x10, 1), + MUX_INFO(0x11, 1), + MUX_INFO(0x12, 1), + MUX_INFO(0x13, 1), +}; + +static struct pca954x_platform_data pca9546_data = { + .modes = pca9546_modes, + .num_modes = 4, +}; + +static struct pca954x_platform_mode pca9548_modes[] = { + MUX_INFO(0x14, 1), + MUX_INFO(0x15, 1), + MUX_INFO(0x16, 1), + MUX_INFO(0x17, 1), + MUX_INFO(0x18, 1), + MUX_INFO(0x19, 1), + MUX_INFO(0x1a, 1), + MUX_INFO(0x1b, 1), +}; + +static struct pca954x_platform_data pca9548_data = { + .modes = pca9548_modes, + .num_modes = 8, +}; + +/* CPU Board i2c device */ +static struct pca954x_platform_mode pca9546_cpu_modes[] = { + MUX_INFO(0x02, 1), + MUX_INFO(0x03, 1), + MUX_INFO(0x04, 1), + MUX_INFO(0x05, 1), +}; + +static struct pca954x_platform_data pca9546_cpu_data = { + .modes = pca9546_cpu_modes, + .num_modes = 4, +}; +//MB Board Data +static struct pca953x_platform_data pca9555_1_data = { + .gpio_base = 0x10, +}; +//CPU Board pca9555 +static struct pca953x_platform_data pca9555_CPU_data = { + .gpio_base = 0x20, +}; + +static struct i2c_board_info ix7_i2c_devices[] = { + { + I2C_BOARD_INFO("pca9546", 0x72), // 0 + .platform_data = &pca9546_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x77), // 1 + .platform_data = &pca9548_data, + }, + { + I2C_BOARD_INFO("24c02", 0x54), // 2 0x72 ch2 eeprom + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 3 0x77 ch0 + .platform_data = &pca9548sfp1_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 4 0x77 ch1 + .platform_data = &pca9548sfp2_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 5 0x77 ch2 + .platform_data = &pca9548sfp3_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 6 0x77 ch3 + .platform_data = &pca9548sfp4_data, + }, + { + I2C_BOARD_INFO("pca9555", 0x23), // 7 0x72 ch3 pca9555 MB Board Data + .platform_data = &pca9555_1_data, + }, + { + I2C_BOARD_INFO("CPLD-QSFP28", 0x38), // 8 0x72 ch0 + }, + { + I2C_BOARD_INFO("CPLD-QSFP28", 0x38), // 9 0x72 ch1 + }, + { + I2C_BOARD_INFO("pca9546", 0x71), // 10 CPU Board i2c device + .platform_data = &pca9546_cpu_data, + }, + { + I2C_BOARD_INFO("pca9555", 0x20), // 11 0x71 ch0 CPU Board Data + .platform_data = &pca9555_CPU_data, + }, + { + I2C_BOARD_INFO("optoe1", 0x50), // 12 0x50 QSFP EEPROM + }, + { + I2C_BOARD_INFO("CPLDLED_IX7", 0x39), // 13 0x72 ch0 CPLD_led_1 + }, + { + I2C_BOARD_INFO("CPLDLED_IX7", 0x39), // 14 0x72 ch1 CPLD_led_1 + }, +}; + +static struct platform_driver ix7_platform_driver = { + .driver = { + .name = "qci-ix7", + .owner = THIS_MODULE, + }, +}; + +static struct platform_device *ix7_device; + +static int __init ix7_platform_init(void) +{ + struct i2c_client *client; + struct i2c_adapter *adapter; + int ret, i; + + ret = platform_driver_register(&ix7_platform_driver); + if (ret < 0) + return ret; + + /* Register platform stuff */ + ix7_device = platform_device_alloc("qci-ix7", -1); + if (!ix7_device) { + ret = -ENOMEM; + goto fail_platform_driver; + } + + ret = platform_device_add(ix7_device); + if (ret) + goto fail_platform_device; + + adapter = i2c_get_adapter(0); + client = i2c_new_device(adapter, &ix7_i2c_devices[0]); // pca9546 + client = i2c_new_device(adapter, &ix7_i2c_devices[1]); // pca9548 + client = i2c_new_device(adapter, &ix7_i2c_devices[10]); // pca9546 in CPU board + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x02); + client = i2c_new_device(adapter, &ix7_i2c_devices[11]); // CPU Board Data + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x10); + client = i2c_new_device(adapter, &ix7_i2c_devices[8]); // CPLD2 + client = i2c_new_device(adapter, &ix7_i2c_devices[13]); // CPLD_led_1 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x11); + client = i2c_new_device(adapter, &ix7_i2c_devices[9]); // CPLD3 + client = i2c_new_device(adapter, &ix7_i2c_devices[14]); // CPLD_led_2 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x12); + client = i2c_new_device(adapter, &ix7_i2c_devices[2]); // MB_BOARDINFO_EEPROM + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x13); + client = i2c_new_device(adapter, &ix7_i2c_devices[7]); // pca9555 MB Board Data + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x14); + client = i2c_new_device(adapter, &ix7_i2c_devices[3]); // pca9548_1 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x15); + client = i2c_new_device(adapter, &ix7_i2c_devices[4]); // pca9548_2 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x16); + client = i2c_new_device(adapter, &ix7_i2c_devices[5]); // pca9548_3 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x17); + client = i2c_new_device(adapter, &ix7_i2c_devices[6]); // pca9548_4 SFP + i2c_put_adapter(adapter); + for(i = 32; i < 64; i ++){ // QSFP 1~32 EEPROM + adapter = i2c_get_adapter(i); + client = i2c_new_device(adapter, &ix7_i2c_devices[12]); + i2c_put_adapter(adapter); + } + + return 0; + +fail_platform_device: + platform_device_put(ix7_device); + +fail_platform_driver: + platform_driver_unregister(&ix7_platform_driver); + return ret; +} + +static void __exit ix7_platform_exit(void) +{ + platform_device_unregister(ix7_device); + platform_driver_unregister(&ix7_platform_driver); +} + +module_init(ix7_platform_init); +module_exit(ix7_platform_exit); + + +MODULE_AUTHOR("Jonathan Tsai "); +MODULE_VERSION("1.0"); +MODULE_DESCRIPTION("Quanta IX7 Platform Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/service/ix7-platform-init.service b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/service/ix7-platform-init.service new file mode 100755 index 00000000000..fa46136d17f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/service/ix7-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Quanta IX7-32X Platform initialization service +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/quanta_ix7_util.py install +ExecStop=/usr/local/bin/quanta_ix7_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/setup.py b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/setup.py new file mode 100644 index 00000000000..a2f84b31a56 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='ix7_32x', + version='1.0', + description='Module to initialize Quanta IX7-32X platforms', + + packages=['ix7_32x'], + package_dir={'ix7_32x': 'ix7-32x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/utils/quanta_ix7_util.py b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/utils/quanta_ix7_util.py new file mode 100644 index 00000000000..e583d2374a9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix7-32x/utils/quanta_ix7_util.py @@ -0,0 +1,210 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Quanta Computer Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install() + elif arg == 'clean': + uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[IX7-32X]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +"with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +instantiate =[ +#turn on module power +'echo 21 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio21/direction', +'echo 1 >/sys/class/gpio/gpio21/value', +#Reset fron-ports LED CPLD +'echo 73 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio73/direction', +'echo 0 >/sys/class/gpio/gpio73/value', +'echo 1 >/sys/class/gpio/gpio73/value', +#Enable front-ports LED decoding +'echo 1 > /sys/class/cpld-led/CPLDLED-1/led_decode', +'echo 1 > /sys/class/cpld-led/CPLDLED-2/led_decode', +#Update System LED +'echo 42 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio42/direction', +'echo 0 > /sys/class/gpio/gpio42/value', +'echo 43 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio43/direction', +'echo 1 > /sys/class/gpio/gpio43/value', +] + +drivers =[ +'lpc_ich', +'i2c-i801', +'i2c-dev', +'i2c-mux-pca954x', +'gpio-pca953x', +'optoe', +'qci_cpld', +'qci_cpld_led', +'quanta_platform_ix7', +'ipmi_devintf' +] + + + +def system_install(): + global FORCE + + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("echo 'blacklist i2c-ismt' > /etc/modprobe.d/blacklist.conf", 1) + time.sleep(1) + status, output = exec_cmd("modprobe -r i2c-ismt ", 1) + status, output = exec_cmd("modprobe -r i2c-i801 ", 1) + #setup driver dependency + status, output = exec_cmd("depmod -a ", 1) + #install drivers + for i in range(0,len(drivers)): + status, output = exec_cmd("modprobe "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + + #instantiate devices + for i in range(0,len(instantiate)): + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status + + #QSFP for 1~32 port + for port_number in range(1,33): + bus_number = port_number + 31 + os.system("echo %d >/sys/bus/i2c/devices/%d-0050/port_name" % (port_number, bus_number)) + return + + +def system_ready(): + if not device_found(): + return False + return True + +def install(): + if not device_found(): + print "No device, installing...." + status = system_install() + if status: + if FORCE == 0: + return status + else: + print " ix7 driver already installed...." + return + +def uninstall(): + global FORCE + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"i2c-0", 0) + return ret1 + +if __name__ == "__main__": + main() + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/modules/Makefile b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/modules/Makefile new file mode 100755 index 00000000000..011cd52d673 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/modules/Makefile @@ -0,0 +1,3 @@ +obj-m:=qci_cpld_sfp28.o qci_cpld_led.o qci_platform_ix8.o + + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/modules/qci_cpld_led.c b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/modules/qci_cpld_led.c new file mode 100755 index 00000000000..37fc2e07246 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/modules/qci_cpld_led.c @@ -0,0 +1,275 @@ +/* + * A LED CPLD driver for Quanta Switch Platform + * + * The CPLD is customize by Quanta for decode led bit stream, + * This driver modify from Quanta CPLD I/O driver. + * + * Copyright (C) 2015 Quanta Inc. + * + * Author: Luffy Cheng + * Author: Roger Chang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_IDA(cpld_led_ida); + +enum platform_type { + IX7 = 0, + IX8, + NONE +}; + +static struct class *cpld_class = NULL; + +struct cpld_data { + struct i2c_client *cpld_client; + char name[8]; + u8 cpld_id; +}; + +struct cpld_led_data { + struct mutex lock; + struct device *port_dev; + struct cpld_data *cpld_data; +}; + +static int cpld_led_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int cpld_led_remove(struct i2c_client *client); + +static const struct i2c_device_id cpld_led_id[] = { + { "CPLDLED_IX7", IX7 }, + { "CPLDLED_IX8", IX8 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cpld_led_id); + +static struct i2c_driver cpld_led_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "qci_cpld_led", + }, + .probe = cpld_led_probe, + .remove = cpld_led_remove, + .id_table = cpld_led_id, +// .address_list = normal_i2c, +}; + +#define CPLD_LED_ID_PREFIX "CPLDLED-" +#define CPLD_LED_ID_FORMAT CPLD_LED_ID_PREFIX "%d" + +#define CPLD_DECODER_OFFSET 0x4 +#define CPLD_DECODER_MASK 0x1 +#define CPLD_USERCODE_START_OFFSET 0x0 + +static ssize_t get_led_decode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 offset = (u8)(CPLD_DECODER_OFFSET); + s32 value; + + value = i2c_smbus_read_byte_data(client, offset); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led decode value= %x\n", value); + + value &= CPLD_DECODER_MASK; + + return sprintf(buf, "%d\n", (value == 0) ? 1 : 0); +} + +static ssize_t get_usercode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 i = 0; + s32 value = 0, reading = 0; + + for (i = 0; i < 4; i++) + { + reading = i2c_smbus_read_byte_data(client, CPLD_USERCODE_START_OFFSET + i); + if (reading < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led usercode reg %d value= %x\n", i, reading); + + value |= reading << (24 - 8 * i); + } + + return sprintf(buf, "%X\n", value); +} + +static ssize_t set_led_decode(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + s32 value; + long enable; + + if (kstrtol(buf, 0, &enable)) + return -EINVAL; + + if ((enable != 1) && (enable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_byte_data(client, CPLD_DECODER_OFFSET); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led decode value= %x\n", value); + + value |= CPLD_DECODER_MASK; + if (enable) + value &= ~CPLD_DECODER_MASK; + + dev_dbg(&client->dev, "write led decode value= %x\n", value); + + i2c_smbus_write_byte_data(client, CPLD_DECODER_OFFSET, (u8)value); +// mutex_unlock(&data->lock); + + return count; +} + +static DEVICE_ATTR(led_decode, S_IWUSR | S_IRUGO, get_led_decode, set_led_decode); +static DEVICE_ATTR(usercode, S_IRUGO, get_usercode, NULL); + +static const struct attribute *led_attrs[] = { + &dev_attr_usercode.attr, + &dev_attr_led_decode.attr, + NULL, +}; + +static const struct attribute_group led_attr_group = { + .attrs = (struct attribute **) led_attrs, +}; + +static int cpld_led_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cpld_led_data *data; + struct cpld_data *led_data; + struct device *port_dev; + int nr, err; + + if (!cpld_class) + { + cpld_class = class_create(THIS_MODULE, "cpld-led"); + if (IS_ERR(cpld_class)) { + pr_err("couldn't create sysfs class\n"); + return PTR_ERR(cpld_class); + } + } + + data = devm_kzalloc(&client->dev, sizeof(struct cpld_led_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* Test */ + nr = ida_simple_get(&cpld_led_ida, 1, 99, GFP_KERNEL); + if (nr < 0) + goto err_out; + + led_data = kzalloc(sizeof(struct cpld_led_data), GFP_KERNEL); + + port_dev = device_create(cpld_class, &client->dev, MKDEV(0,0), led_data, CPLD_LED_ID_FORMAT, nr); + if (IS_ERR(port_dev)) { + err = PTR_ERR(port_dev); + // printk("err_status\n"); + } + + data->port_dev = port_dev; + data->cpld_data = led_data; + + dev_info(&client->dev, "Register CPLDLED %d\n", nr); + + sprintf(led_data->name, "LED%d-data", nr); + led_data->cpld_id = nr; + dev_set_drvdata(port_dev, led_data); + port_dev->init_name = led_data->name; + led_data->cpld_client = client; + + err = sysfs_create_group(&port_dev->kobj, &led_attr_group); + // if (status) printk("err status\n"); + /* end */ + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s device found\n", client->name); + + + return 0; + +err_out: + return nr; +} + +/* FIXME: for older kernel doesn't with idr_is_empty function, implement here */ +static int idr_has_entry(int id, void *p, void *data) +{ + return 1; +} + +static bool cpld_idr_is_empty(struct idr *idp) +{ + return !idr_for_each(idp, idr_has_entry, NULL); +} + +static int cpld_led_remove(struct i2c_client *client) +{ + struct cpld_led_data *data = i2c_get_clientdata(client); + + dev_info(data->port_dev, "Remove CPLDLED-%d\n", data->cpld_data->cpld_id); + device_unregister(data->port_dev); + ida_simple_remove(&cpld_led_ida, data->cpld_data->cpld_id); + kfree(data->cpld_data); + + if (cpld_idr_is_empty(&cpld_led_ida.idr)) + class_destroy(cpld_class); + + return 0; +} + +module_i2c_driver(cpld_led_driver); + +MODULE_AUTHOR("Luffy Cheng "); +MODULE_AUTHOR("Roger Chang "); +MODULE_DESCRIPTION("Quanta Switch LED CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/modules/qci_cpld_sfp28.c b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/modules/qci_cpld_sfp28.c new file mode 100755 index 00000000000..dac76667c6c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/modules/qci_cpld_sfp28.c @@ -0,0 +1,398 @@ +/* + * A CPLD driver for monitor SFP28 module I/O + * + * The CPLD is customize by Quanta for controlling SFP28 module signals, + * they are TX_FAULT , TX_DIS , PRE_N , RX_LOS + * Each CPLD control 16 modules, each module use 4 bits in register. + * + * Copyright (C) 2015 Quanta Inc. + * + * Author: Luffy Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_IDA(cpld_ida); + +enum platform_type { + SFP = 0, + SFP28, + NONE +}; + +static struct class *cpld_class = NULL; + +struct sfp_data { + struct i2c_client *cpld_client; + char name[8]; + char type[8]; + u8 port_id; + u8 cpld_port; +}; + +struct cpld_data { + struct mutex lock; + struct device *port_dev[16]; + struct sfp_data *port_data[16]; +}; + +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int cpld_remove(struct i2c_client *client); + +static const struct i2c_device_id cpld_id[] = { + { "CPLD-SFP", SFP }, + { "CPLD-SFP28", SFP28 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "qci_cpld_sfp28", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, +// .address_list = normal_i2c, +}; + +#define CPLD_ID_PREFIX "port-" +#define CPLD_ID_FORMAT CPLD_ID_PREFIX "%d" + +//SFP28 +#define TX_FAULT_MASK 0x08 +#define TX_DIS_MASK 0x04 +#define PRE_N_MASK 0x02 +#define RX_LOS_MASK 0x01 + +static inline u8 get_group_cmd(u8 group) +{ + //FIXME: if group cmd change + return (group + 1); +} + +static inline u8 port_remapping(u8 phy_port) +{ + /* FIXME: implement by hardware design */ + /* The CPLD register port mapping is weird : + * MSB -------- LSB (word data) + * P3 P4 P1 P2 (per port 4 bits) + * For easy coding bit shift, we treat it as hw port swap + */ + return (phy_port % 2) ? (phy_port - 1) : (phy_port + 1); +} + +//SFP +static ssize_t get_tx_fault(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= TX_FAULT_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t get_tx_dis(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= TX_DIS_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t get_pre_n(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= PRE_N_MASK; + + //FIXME: if present is not low active + return sprintf(buf, "%d\n", value ? 0 : 1); +} + +static ssize_t get_rx_los(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= RX_LOS_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} +static ssize_t set_tx_dis(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + long disable; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + if (kstrtol(buf, 0, &disable)) + return -EINVAL; + + if ((disable != 1) && (disable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value &= ~(TX_DIS_MASK << (group_port * 4)); + if (disable) + value |= (TX_DIS_MASK << (group_port * 4)); + + dev_dbg(&client->dev, "write group%d value= %x\n", group + 1, value); + + i2c_smbus_write_word_data(client, get_group_cmd(group), (u16)value); +// mutex_unlock(&data->lock); + + return count; +} +//SFP + +//static DEVICE_ATTR(led_enable, S_IWUSR | S_IRUGO, get_led_enable, set_led_enable); +//static DEVICE_ATTR(monitor_enable, S_IWUSR | S_IRUGO, get_monitor_enable, set_monitor_enable); +//SFP +static DEVICE_ATTR(tx_fault, S_IRUGO, get_tx_fault, NULL); +static DEVICE_ATTR(tx_dis, S_IWUSR | S_IRUGO, get_tx_dis, set_tx_dis); +static DEVICE_ATTR(pre_n, S_IRUGO, get_pre_n, NULL); +static DEVICE_ATTR(rx_los, S_IRUGO, get_rx_los, NULL); + +static const struct attribute *sfp_attrs[] = { +// &dev_attr_led_enable.attr, + &dev_attr_tx_fault.attr, + &dev_attr_tx_dis.attr, + &dev_attr_pre_n.attr, + &dev_attr_rx_los.attr, + NULL, +}; + +static const struct attribute_group sfp_attr_group = { + .attrs = (struct attribute **) sfp_attrs, +}; + +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cpld_data *data; + struct sfp_data *port_data; +// struct i2c_monitor_data *monitor_data; + struct device *port_dev; +// struct device *i2c_dev; + int port_nr, i=0, err; + char name[I2C_NAME_SIZE], type[I2C_NAME_SIZE]; + + printk("cpld cpld_probe\n"); + + while(id->name[i]) + { + name[i]=tolower(id->name[i]); + i++; + } + name[i]='\0'; + strncpy(type,name+5,strlen(name)-5); + type[strlen(name)-5]='\0'; + + if (!cpld_class) + { + cpld_class = class_create(THIS_MODULE, name); + if (IS_ERR(cpld_class)) { + pr_err("couldn't create sysfs class\n"); + return PTR_ERR(cpld_class); + } + } + + data = devm_kzalloc(&client->dev, sizeof(struct cpld_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* register sfp port data to sysfs */ + for (i = 0; i < 16; i++) + { + port_nr = ida_simple_get(&cpld_ida, 1, 99, GFP_KERNEL); + if (port_nr < 0) + goto err_out; + + port_data = kzalloc(sizeof(struct sfp_data), GFP_KERNEL); + + port_dev = device_create(cpld_class, &client->dev, MKDEV(0,0), port_data, CPLD_ID_FORMAT, port_nr); + if (IS_ERR(port_dev)) { + err = PTR_ERR(port_dev); + printk("err_status\n"); + } + + data->port_dev[i] = port_dev; + data->port_data[i] = port_data; + + strcpy(port_data->type, type); + + dev_info(&client->dev, "Register %s port-%d\n", port_data->type , port_nr); + + /* FIXME: implement Logical/Physical port remapping */ + //port_data->cpld_port = i; + port_data->cpld_port = port_remapping(i); + sprintf(port_data->name, "port-%d", port_nr); + port_data->port_id = port_nr; + dev_set_drvdata(port_dev, port_data); + port_dev->init_name = port_data->name; + port_data->cpld_client = client; + + err = sysfs_create_group(&port_dev->kobj, &sfp_attr_group); + // if (status) printk("err status\n"); + } + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s device found\n", client->name); + + + return 0; + +err_out: + return port_nr; +} + +/* FIXME: for older kernel doesn't with idr_is_empty function, implement here */ +#if 1 +static int idr_has_entry(int id, void *p, void *data) +{ + return 1; +} + +static bool cpld_idr_is_empty(struct idr *idp) +{ + return !idr_for_each(idp, idr_has_entry, NULL); +} +#endif + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + int i; +// int id; + + for (i = 15; i >= 0; i--) + { + dev_info(data->port_dev[i], "Remove %s port-%d\n", data->port_data[i]->type , data->port_data[i]->port_id); + device_unregister(data->port_dev[i]); + ida_simple_remove(&cpld_ida, data->port_data[i]->port_id); + kfree(data->port_data[i]); + } + + if (cpld_idr_is_empty(&cpld_ida.idr)) + class_destroy(cpld_class); + + return 0; +} + +module_i2c_driver(cpld_driver); + +MODULE_AUTHOR("Jonathan Tsai "); +MODULE_VERSION("1.0"); +MODULE_DESCRIPTION("Quanta Switch SFP28 CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/modules/qci_platform_ix8.c b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/modules/qci_platform_ix8.c new file mode 100755 index 00000000000..26151b0ab24 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/modules/qci_platform_ix8.c @@ -0,0 +1,420 @@ +/* + * Quanta IX8 platform driver + * + * + * Copyright (C) 2017 Quanta Computer inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) +#include +#else +#include +#endif + +#define MUX_INFO(bus, deselect) \ + {.adap_id = bus, .deselect_on_exit = deselect} + +static struct pca954x_platform_mode pca9548sfp1_modes[] = { + MUX_INFO(0x20, 1), + MUX_INFO(0x21, 1), + MUX_INFO(0x22, 1), + MUX_INFO(0x23, 1), + MUX_INFO(0x24, 1), + MUX_INFO(0x25, 1), + MUX_INFO(0x26, 1), + MUX_INFO(0x27, 1), +}; + +static struct pca954x_platform_data pca9548sfp1_data = { + .modes = pca9548sfp1_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp2_modes[] = { + MUX_INFO(0x28, 1), + MUX_INFO(0x29, 1), + MUX_INFO(0x2a, 1), + MUX_INFO(0x2b, 1), + MUX_INFO(0x2c, 1), + MUX_INFO(0x2d, 1), + MUX_INFO(0x2e, 1), + MUX_INFO(0x2f, 1), +}; + +static struct pca954x_platform_data pca9548sfp2_data = { + .modes = pca9548sfp2_modes, + .num_modes = 8, +}; +static struct pca954x_platform_mode pca9548sfp3_modes[] = { + MUX_INFO(0x30, 1), + MUX_INFO(0x31, 1), + MUX_INFO(0x32, 1), + MUX_INFO(0x33, 1), + MUX_INFO(0x34, 1), + MUX_INFO(0x35, 1), + MUX_INFO(0x36, 1), + MUX_INFO(0x37, 1), +}; + +static struct pca954x_platform_data pca9548sfp3_data = { + .modes = pca9548sfp3_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp4_modes[] = { + MUX_INFO(0x38, 1), + MUX_INFO(0x39, 1), + MUX_INFO(0x3a, 1), + MUX_INFO(0x3b, 1), + MUX_INFO(0x3c, 1), + MUX_INFO(0x3d, 1), + MUX_INFO(0x3e, 1), + MUX_INFO(0x3f, 1), +}; + +static struct pca954x_platform_data pca9548sfp4_data = { + .modes = pca9548sfp4_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp5_modes[] = { + MUX_INFO(0x40, 1), + MUX_INFO(0x41, 1), + MUX_INFO(0x42, 1), + MUX_INFO(0x43, 1), + MUX_INFO(0x44, 1), + MUX_INFO(0x45, 1), + MUX_INFO(0x46, 1), + MUX_INFO(0x47, 1), +}; + +static struct pca954x_platform_data pca9548sfp5_data = { + .modes = pca9548sfp5_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp6_modes[] = { + MUX_INFO(0x48, 1), + MUX_INFO(0x49, 1), + MUX_INFO(0x4a, 1), + MUX_INFO(0x4b, 1), + MUX_INFO(0x4c, 1), + MUX_INFO(0x4d, 1), + MUX_INFO(0x4e, 1), + MUX_INFO(0x4f, 1), +}; + +static struct pca954x_platform_data pca9548sfp6_data = { + .modes = pca9548sfp6_modes, + .num_modes = 8, +}; + +//ZQSFP +static struct pca954x_platform_mode pca9548sfp7_modes[] = { + MUX_INFO(0x50, 1), + MUX_INFO(0x51, 1), + MUX_INFO(0x52, 1), + MUX_INFO(0x53, 1), + MUX_INFO(0x54, 1), + MUX_INFO(0x55, 1), + MUX_INFO(0x56, 1), + MUX_INFO(0x57, 1), +}; + +static struct pca954x_platform_data pca9548sfp7_data = { + .modes = pca9548sfp7_modes, + .num_modes = 8, +}; + +// end port + +static struct pca954x_platform_mode pca9546_modes[] = { + MUX_INFO(0x10, 1), + MUX_INFO(0x11, 1), + MUX_INFO(0x12, 1), + MUX_INFO(0x13, 1), +}; + +static struct pca954x_platform_data pca9546_data = { + .modes = pca9546_modes, + .num_modes = 4, +}; + +static struct pca954x_platform_mode pca9548_modes[] = { + MUX_INFO(0x14, 1), + MUX_INFO(0x15, 1), + MUX_INFO(0x16, 1), + MUX_INFO(0x17, 1), + MUX_INFO(0x18, 1), + MUX_INFO(0x19, 1), + MUX_INFO(0x1a, 1), + MUX_INFO(0x1b, 1), +}; + +static struct pca954x_platform_data pca9548_data = { + .modes = pca9548_modes, + .num_modes = 8, +}; + +/* CPU Board i2c device */ +static struct pca954x_platform_mode pca9546_cpu_modes[] = { + MUX_INFO(0x02, 1), + MUX_INFO(0x03, 1), + MUX_INFO(0x04, 1), + MUX_INFO(0x05, 1), +}; + +static struct pca954x_platform_data pca9546_cpu_data = { + .modes = pca9546_cpu_modes, + .num_modes = 4, +}; +//MB Board Data +static struct pca953x_platform_data pca9555_1_data = { + .gpio_base = 0x10, +}; +//QSFP28 49-56 IO Expander +static struct pca953x_platform_data pca9698_2_data = { + .gpio_base = 0x20, +}; +//CPU Board pca9555 +static struct pca953x_platform_data pca9555_CPU_data = { + .gpio_base = 0x48, +}; +static struct i2c_board_info ix8_i2c_devices[] = { + { + I2C_BOARD_INFO("pca9546", 0x72), // 0 + .platform_data = &pca9546_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x77), // 1 + .platform_data = &pca9548_data, + }, + { + I2C_BOARD_INFO("24c02", 0x54), // 2 eeprom + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 3 0x77 ch0 + .platform_data = &pca9548sfp1_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 4 0x77 ch1 + .platform_data = &pca9548sfp2_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 5 0x77 ch2 + .platform_data = &pca9548sfp3_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 6 0x77 ch3 + .platform_data = &pca9548sfp4_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 7 0x77 ch4 + .platform_data = &pca9548sfp5_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 8 0x77 ch5 + .platform_data = &pca9548sfp6_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 9 0x77 ch6 + .platform_data = &pca9548sfp7_data, + }, + { + I2C_BOARD_INFO("CPLD-SFP28", 0x38), // 10 0x72 ch0 CPLD1_:SFP28 1~16 + }, + { + I2C_BOARD_INFO("CPLD-SFP28", 0x38), // 11 0x72 ch1 CPLD2_:SFP28 17~32 + }, + { + I2C_BOARD_INFO("CPLD-SFP28", 0x38), // 12 0x72 ch2 CPLD_3:SFP28 33~48 + }, + { + I2C_BOARD_INFO("pca9555", 0x23), // 13 0x72 ch3 MB Board Data + .platform_data = &pca9555_1_data, + }, + { + I2C_BOARD_INFO("pca9698", 0x21), // 14 0x72 ch3 QSFP:49~52 + .platform_data = &pca9698_2_data, + }, + { + I2C_BOARD_INFO("optoe1", 0x50), // 15 0x50 QSFP EEPROM + }, + { + I2C_BOARD_INFO("pca9546", 0x71), // 16 + .platform_data = &pca9546_cpu_data, + }, + { + I2C_BOARD_INFO("pca9555", 0x20), // 17 0x71 ch0 CPU Board Data + .platform_data = &pca9555_CPU_data, + }, + { + I2C_BOARD_INFO("CPLDLED_IX8", 0x3a), // 18 0x72 ch0 CPLD4 LED function of SFP28 & QSFP28 (Port27~56) + }, + { + I2C_BOARD_INFO("CPLDLED_IX8", 0x39), // 19 0x72 ch0 CPLD6 LED function of SFP28 & QSFP28 (Port1~26) + }, + { + I2C_BOARD_INFO("optoe2", 0x50), // 20 0x50 SFP28 EEPROM + }, +}; + +static struct platform_driver ix8_platform_driver = { + .driver = { + .name = "qci-ix8", + .owner = THIS_MODULE, + }, +}; + +static struct platform_device *ix8_device; + +static int __init ix8_platform_init(void) +{ + struct i2c_client *client; + struct i2c_adapter *adapter; + int ret, i; + + ret = platform_driver_register(&ix8_platform_driver); + if (ret < 0) + return ret; + + /* Register platform stuff */ + ix8_device = platform_device_alloc("qci-ix8", -1); + if (!ix8_device) { + ret = -ENOMEM; + goto fail_platform_driver; + } + + ret = platform_device_add(ix8_device); + if (ret) + goto fail_platform_device; + + adapter = i2c_get_adapter(0); + client = i2c_new_device(adapter, &ix8_i2c_devices[0]); // pca9546 + client = i2c_new_device(adapter, &ix8_i2c_devices[1]); // pca9548 + client = i2c_new_device(adapter, &ix8_i2c_devices[16]); // pca9546cpu + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x02); + client = i2c_new_device(adapter, &ix8_i2c_devices[17]); // CPU Board Data + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x10); + client = i2c_new_device(adapter, &ix8_i2c_devices[10]); // CPLD_1 + client = i2c_new_device(adapter, &ix8_i2c_devices[18]); // CPLD_4 + client = i2c_new_device(adapter, &ix8_i2c_devices[19]); // CPLD_6 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x11); + client = i2c_new_device(adapter, &ix8_i2c_devices[11]); // CPLD_2 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x12); + client = i2c_new_device(adapter, &ix8_i2c_devices[12]); // CPLD_3 + client = i2c_new_device(adapter, &ix8_i2c_devices[2]); // MB_BOARDINFO_EEPROM + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x13); + client = i2c_new_device(adapter, &ix8_i2c_devices[13]); // MB Board Data + client = i2c_new_device(adapter, &ix8_i2c_devices[14]); // QSFP:49~52 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x14); + client = i2c_new_device(adapter, &ix8_i2c_devices[3]); // pca9548_1 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x15); + client = i2c_new_device(adapter, &ix8_i2c_devices[4]); // pca9548_2 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x16); + client = i2c_new_device(adapter, &ix8_i2c_devices[5]); // pca9548_3 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x17); + client = i2c_new_device(adapter, &ix8_i2c_devices[6]); // pca9548_4 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x18); + client = i2c_new_device(adapter, &ix8_i2c_devices[7]); // pca9548_5 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x19); + client = i2c_new_device(adapter, &ix8_i2c_devices[8]); // pca9548_6 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x1a); + client = i2c_new_device(adapter, &ix8_i2c_devices[9]); // pca9548_7 QSFP + i2c_put_adapter(adapter); + + for(i = 80; i < 88; i ++){ // QSFP 49~56 EEPROM + adapter = i2c_get_adapter(i); + client = i2c_new_device(adapter, &ix8_i2c_devices[15]); + i2c_put_adapter(adapter); + } + + for(i = 32; i < 80; i ++){ // SFP28 1~48 EEPROM + adapter = i2c_get_adapter(i); + client = i2c_new_device(adapter, &ix8_i2c_devices[20]); + i2c_put_adapter(adapter); + } + + return 0; + +fail_platform_device: + platform_device_put(ix8_device); + +fail_platform_driver: + platform_driver_unregister(&ix8_platform_driver); + return ret; +} + +static void __exit ix8_platform_exit(void) +{ + platform_device_unregister(ix8_device); + platform_driver_unregister(&ix8_platform_driver); +} + +module_init(ix8_platform_init); +module_exit(ix8_platform_exit); + + +MODULE_AUTHOR("Jonathan Tsai "); +MODULE_VERSION("1.0"); +MODULE_DESCRIPTION("Quanta IX8 Platform Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/service/ix8-platform-init.service b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/service/ix8-platform-init.service new file mode 100755 index 00000000000..d4eb6bfcc3e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/service/ix8-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Quanta IX8-56X Platform initialization service +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/quanta_ix8_util.py install +ExecStop=/usr/local/bin/quanta_ix8_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/setup.py b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/setup.py new file mode 100755 index 00000000000..76c5eacbee4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='ix8_56x', + version='1.0', + description='Module to initialize Quanta IX8-56X platforms', + + packages=['ix8_56x'], + package_dir={'ix8_56x': 'ix8-56x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/utils/quanta_ix8_util.py b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/utils/quanta_ix8_util.py new file mode 100755 index 00000000000..fe93611b114 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix8-56x/utils/quanta_ix8_util.py @@ -0,0 +1,329 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Quanta Computer Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install() + elif arg == 'clean': + uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[IX8-56X]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +"with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +instantiate =[ +#turn on module power +'echo 21 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio21/direction', +'echo 1 >/sys/class/gpio/gpio21/value', +#export pca9698 for qsfp present +'echo 34 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio34/direction', +'echo 38 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio38/direction', +'echo 42 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio42/direction', +'echo 46 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio46/direction', +'echo 50 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio50/direction', +'echo 54 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio54/direction', +'echo 58 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio58/direction', +'echo 62 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio62/direction', +#export pca9698 for qsfp reset +'echo 32 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio32/direction', +'echo 1 >/sys/class/gpio/gpio32/value', +'echo 36 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio36/direction', +'echo 1 >/sys/class/gpio/gpio36/value', +'echo 40 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio40/direction', +'echo 1 >/sys/class/gpio/gpio40/value', +'echo 44 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio44/direction', +'echo 1 >/sys/class/gpio/gpio44/value', +'echo 48 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio48/direction', +'echo 1 >/sys/class/gpio/gpio48/value', +'echo 52 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio52/direction', +'echo 1 >/sys/class/gpio/gpio52/value', +'echo 56 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio56/direction', +'echo 1 >/sys/class/gpio/gpio56/value', +'echo 60 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio60/direction', +'echo 1 >/sys/class/gpio/gpio60/value', +#export pca9698 for qsfp lpmode +'echo 35 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio35/direction', +'echo 0 >/sys/class/gpio/gpio35/value', +'echo 39 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio39/direction', +'echo 0 >/sys/class/gpio/gpio39/value', +'echo 43 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio43/direction', +'echo 0 >/sys/class/gpio/gpio43/value', +'echo 47 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio47/direction', +'echo 0 >/sys/class/gpio/gpio47/value', +'echo 51 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio51/direction', +'echo 0 >/sys/class/gpio/gpio51/value', +'echo 55 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio55/direction', +'echo 0 >/sys/class/gpio/gpio55/value', +'echo 59 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio59/direction', +'echo 0 >/sys/class/gpio/gpio59/value', +'echo 63 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio63/direction', +'echo 0 >/sys/class/gpio/gpio63/value', +#Reset fron-ports LED CPLD +'echo 73 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio73/direction', +'echo 0 >/sys/class/gpio/gpio73/value', +'echo 1 >/sys/class/gpio/gpio73/value', +#Enable front-ports LED decoding +'echo 1 > /sys/class/cpld-led/CPLDLED-1/led_decode', +'echo 1 > /sys/class/cpld-led/CPLDLED-2/led_decode', +#SFP28 Module TxEnable +'echo 0 > /sys/class/cpld-sfp28/port-1/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-2/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-3/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-4/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-5/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-6/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-7/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-8/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-9/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-10/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-11/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-12/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-13/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-14/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-15/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-16/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-17/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-18/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-19/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-20/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-21/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-22/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-23/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-24/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-25/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-26/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-27/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-28/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-29/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-30/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-31/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-32/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-33/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-34/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-35/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-36/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-37/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-38/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-39/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-40/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-41/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-42/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-43/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-44/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-45/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-46/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-47/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-48/tx_dis', +#Update System LED +'echo 82 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio82/direction', +'echo 0 > /sys/class/gpio/gpio82/value', +'echo 83 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio83/direction', +'echo 1 > /sys/class/gpio/gpio83/value', +] + +drivers =[ +'lpc_ich', +'i2c-i801', +'i2c-dev', +'i2c-mux-pca954x', +'gpio-pca953x', +'optoe', +'qci_cpld_sfp28', +'qci_cpld_led', +'qci_platform_ix8', +'ipmi_devintf' +] + + + +def system_install(): + global FORCE + + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("echo 'blacklist i2c-ismt' > /etc/modprobe.d/blacklist.conf", 1) + time.sleep(1) + status, output = exec_cmd("modprobe -r i2c-ismt ", 1) + status, output = exec_cmd("modprobe -r i2c-i801 ", 1) + #setup driver dependency + status, output = exec_cmd("depmod -a ", 1) + #install drivers + for i in range(0,len(drivers)): + status, output = exec_cmd("modprobe "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + + #instantiate devices + for i in range(0,len(instantiate)): + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status + + #QSFP for 1~56 port + for port_number in range(1,57): + bus_number = port_number + 31 + os.system("echo %d >/sys/bus/i2c/devices/%d-0050/port_name" % (port_number, bus_number)) + + return + + +def system_ready(): + if not device_found(): + return False + return True + +def install(): + if not device_found(): + print "No device, installing...." + status = system_install() + if status: + if FORCE == 0: + return status + else: + print " ix8 driver already installed...." + return + +def uninstall(): + global FORCE + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"i2c-0", 0) + return ret1 + +if __name__ == "__main__": + main() + + + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/classes/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/modules/Makefile b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/modules/Makefile new file mode 100644 index 00000000000..bfb8ec0c458 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/modules/Makefile @@ -0,0 +1,3 @@ +obj-m:=qci_cpld_sfp28.o qci_cpld_led.o qci_platform_ix8c.o + + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/modules/qci_cpld_led.c b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/modules/qci_cpld_led.c new file mode 100644 index 00000000000..229195249b5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/modules/qci_cpld_led.c @@ -0,0 +1,275 @@ +/* + * A LED CPLD driver for Quanta Switch Platform + * + * The CPLD is customize by Quanta for decode led bit stream, + * This driver modify from Quanta CPLD I/O driver. + * + * Copyright (C) 2015 Quanta Inc. + * + * Author: Luffy Cheng + * Author: Roger Chang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_IDA(cpld_led_ida); + +enum platform_type { + IX7 = 0, + IX8C, + NONE +}; + +static struct class *cpld_class = NULL; + +struct cpld_data { + struct i2c_client *cpld_client; + char name[8]; + u8 cpld_id; +}; + +struct cpld_led_data { + struct mutex lock; + struct device *port_dev; + struct cpld_data *cpld_data; +}; + +static int cpld_led_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int cpld_led_remove(struct i2c_client *client); + +static const struct i2c_device_id cpld_led_id[] = { + { "CPLDLED_IX7", IX7 }, + { "CPLDLED_IX8C", IX8C }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cpld_led_id); + +static struct i2c_driver cpld_led_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "qci_cpld_led", + }, + .probe = cpld_led_probe, + .remove = cpld_led_remove, + .id_table = cpld_led_id, +// .address_list = normal_i2c, +}; + +#define CPLD_LED_ID_PREFIX "CPLDLED-" +#define CPLD_LED_ID_FORMAT CPLD_LED_ID_PREFIX "%d" + +#define CPLD_DECODER_OFFSET 0x4 +#define CPLD_DECODER_MASK 0x1 +#define CPLD_USERCODE_START_OFFSET 0x0 + +static ssize_t get_led_decode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 offset = (u8)(CPLD_DECODER_OFFSET); + s32 value; + + value = i2c_smbus_read_byte_data(client, offset); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led decode value= %x\n", value); + + value &= CPLD_DECODER_MASK; + + return sprintf(buf, "%d\n", (value == 0) ? 1 : 0); +} + +static ssize_t get_usercode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 i = 0; + s32 value = 0, reading = 0; + + for (i = 0; i < 4; i++) + { + reading = i2c_smbus_read_byte_data(client, CPLD_USERCODE_START_OFFSET + i); + if (reading < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led usercode reg %d value= %x\n", i, reading); + + value |= reading << (24 - 8 * i); + } + + return sprintf(buf, "%X\n", value); +} + +static ssize_t set_led_decode(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + s32 value; + long enable; + + if (kstrtol(buf, 0, &enable)) + return -EINVAL; + + if ((enable != 1) && (enable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_byte_data(client, CPLD_DECODER_OFFSET); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led decode value= %x\n", value); + + value |= CPLD_DECODER_MASK; + if (enable) + value &= ~CPLD_DECODER_MASK; + + dev_dbg(&client->dev, "write led decode value= %x\n", value); + + i2c_smbus_write_byte_data(client, CPLD_DECODER_OFFSET, (u8)value); +// mutex_unlock(&data->lock); + + return count; +} + +static DEVICE_ATTR(led_decode, S_IWUSR | S_IRUGO, get_led_decode, set_led_decode); +static DEVICE_ATTR(usercode, S_IRUGO, get_usercode, NULL); + +static const struct attribute *led_attrs[] = { + &dev_attr_usercode.attr, + &dev_attr_led_decode.attr, + NULL, +}; + +static const struct attribute_group led_attr_group = { + .attrs = (struct attribute **) led_attrs, +}; + +static int cpld_led_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cpld_led_data *data; + struct cpld_data *led_data; + struct device *port_dev; + int nr, err; + + if (!cpld_class) + { + cpld_class = class_create(THIS_MODULE, "cpld-led"); + if (IS_ERR(cpld_class)) { + pr_err("couldn't create sysfs class\n"); + return PTR_ERR(cpld_class); + } + } + + data = devm_kzalloc(&client->dev, sizeof(struct cpld_led_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* Test */ + nr = ida_simple_get(&cpld_led_ida, 1, 99, GFP_KERNEL); + if (nr < 0) + goto err_out; + + led_data = kzalloc(sizeof(struct cpld_led_data), GFP_KERNEL); + + port_dev = device_create(cpld_class, &client->dev, MKDEV(0,0), led_data, CPLD_LED_ID_FORMAT, nr); + if (IS_ERR(port_dev)) { + err = PTR_ERR(port_dev); + // printk("err_status\n"); + } + + data->port_dev = port_dev; + data->cpld_data = led_data; + + dev_info(&client->dev, "Register CPLDLED %d\n", nr); + + sprintf(led_data->name, "LED%d-data", nr); + led_data->cpld_id = nr; + dev_set_drvdata(port_dev, led_data); + port_dev->init_name = led_data->name; + led_data->cpld_client = client; + + err = sysfs_create_group(&port_dev->kobj, &led_attr_group); + // if (status) printk("err status\n"); + /* end */ + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s device found\n", client->name); + + + return 0; + +err_out: + return nr; +} + +/* FIXME: for older kernel doesn't with idr_is_empty function, implement here */ +static int idr_has_entry(int id, void *p, void *data) +{ + return 1; +} + +static bool cpld_idr_is_empty(struct idr *idp) +{ + return !idr_for_each(idp, idr_has_entry, NULL); +} + +static int cpld_led_remove(struct i2c_client *client) +{ + struct cpld_led_data *data = i2c_get_clientdata(client); + + dev_info(data->port_dev, "Remove CPLDLED-%d\n", data->cpld_data->cpld_id); + device_unregister(data->port_dev); + ida_simple_remove(&cpld_led_ida, data->cpld_data->cpld_id); + kfree(data->cpld_data); + + if (cpld_idr_is_empty(&cpld_led_ida.idr)) + class_destroy(cpld_class); + + return 0; +} + +module_i2c_driver(cpld_led_driver); + +MODULE_AUTHOR("Luffy Cheng "); +MODULE_AUTHOR("Roger Chang "); +MODULE_DESCRIPTION("Quanta Switch LED CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/modules/qci_cpld_sfp28.c b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/modules/qci_cpld_sfp28.c new file mode 100644 index 00000000000..dac76667c6c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/modules/qci_cpld_sfp28.c @@ -0,0 +1,398 @@ +/* + * A CPLD driver for monitor SFP28 module I/O + * + * The CPLD is customize by Quanta for controlling SFP28 module signals, + * they are TX_FAULT , TX_DIS , PRE_N , RX_LOS + * Each CPLD control 16 modules, each module use 4 bits in register. + * + * Copyright (C) 2015 Quanta Inc. + * + * Author: Luffy Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_IDA(cpld_ida); + +enum platform_type { + SFP = 0, + SFP28, + NONE +}; + +static struct class *cpld_class = NULL; + +struct sfp_data { + struct i2c_client *cpld_client; + char name[8]; + char type[8]; + u8 port_id; + u8 cpld_port; +}; + +struct cpld_data { + struct mutex lock; + struct device *port_dev[16]; + struct sfp_data *port_data[16]; +}; + +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int cpld_remove(struct i2c_client *client); + +static const struct i2c_device_id cpld_id[] = { + { "CPLD-SFP", SFP }, + { "CPLD-SFP28", SFP28 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "qci_cpld_sfp28", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, +// .address_list = normal_i2c, +}; + +#define CPLD_ID_PREFIX "port-" +#define CPLD_ID_FORMAT CPLD_ID_PREFIX "%d" + +//SFP28 +#define TX_FAULT_MASK 0x08 +#define TX_DIS_MASK 0x04 +#define PRE_N_MASK 0x02 +#define RX_LOS_MASK 0x01 + +static inline u8 get_group_cmd(u8 group) +{ + //FIXME: if group cmd change + return (group + 1); +} + +static inline u8 port_remapping(u8 phy_port) +{ + /* FIXME: implement by hardware design */ + /* The CPLD register port mapping is weird : + * MSB -------- LSB (word data) + * P3 P4 P1 P2 (per port 4 bits) + * For easy coding bit shift, we treat it as hw port swap + */ + return (phy_port % 2) ? (phy_port - 1) : (phy_port + 1); +} + +//SFP +static ssize_t get_tx_fault(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= TX_FAULT_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t get_tx_dis(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= TX_DIS_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t get_pre_n(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= PRE_N_MASK; + + //FIXME: if present is not low active + return sprintf(buf, "%d\n", value ? 0 : 1); +} + +static ssize_t get_rx_los(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= RX_LOS_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} +static ssize_t set_tx_dis(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + long disable; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + if (kstrtol(buf, 0, &disable)) + return -EINVAL; + + if ((disable != 1) && (disable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value &= ~(TX_DIS_MASK << (group_port * 4)); + if (disable) + value |= (TX_DIS_MASK << (group_port * 4)); + + dev_dbg(&client->dev, "write group%d value= %x\n", group + 1, value); + + i2c_smbus_write_word_data(client, get_group_cmd(group), (u16)value); +// mutex_unlock(&data->lock); + + return count; +} +//SFP + +//static DEVICE_ATTR(led_enable, S_IWUSR | S_IRUGO, get_led_enable, set_led_enable); +//static DEVICE_ATTR(monitor_enable, S_IWUSR | S_IRUGO, get_monitor_enable, set_monitor_enable); +//SFP +static DEVICE_ATTR(tx_fault, S_IRUGO, get_tx_fault, NULL); +static DEVICE_ATTR(tx_dis, S_IWUSR | S_IRUGO, get_tx_dis, set_tx_dis); +static DEVICE_ATTR(pre_n, S_IRUGO, get_pre_n, NULL); +static DEVICE_ATTR(rx_los, S_IRUGO, get_rx_los, NULL); + +static const struct attribute *sfp_attrs[] = { +// &dev_attr_led_enable.attr, + &dev_attr_tx_fault.attr, + &dev_attr_tx_dis.attr, + &dev_attr_pre_n.attr, + &dev_attr_rx_los.attr, + NULL, +}; + +static const struct attribute_group sfp_attr_group = { + .attrs = (struct attribute **) sfp_attrs, +}; + +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cpld_data *data; + struct sfp_data *port_data; +// struct i2c_monitor_data *monitor_data; + struct device *port_dev; +// struct device *i2c_dev; + int port_nr, i=0, err; + char name[I2C_NAME_SIZE], type[I2C_NAME_SIZE]; + + printk("cpld cpld_probe\n"); + + while(id->name[i]) + { + name[i]=tolower(id->name[i]); + i++; + } + name[i]='\0'; + strncpy(type,name+5,strlen(name)-5); + type[strlen(name)-5]='\0'; + + if (!cpld_class) + { + cpld_class = class_create(THIS_MODULE, name); + if (IS_ERR(cpld_class)) { + pr_err("couldn't create sysfs class\n"); + return PTR_ERR(cpld_class); + } + } + + data = devm_kzalloc(&client->dev, sizeof(struct cpld_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* register sfp port data to sysfs */ + for (i = 0; i < 16; i++) + { + port_nr = ida_simple_get(&cpld_ida, 1, 99, GFP_KERNEL); + if (port_nr < 0) + goto err_out; + + port_data = kzalloc(sizeof(struct sfp_data), GFP_KERNEL); + + port_dev = device_create(cpld_class, &client->dev, MKDEV(0,0), port_data, CPLD_ID_FORMAT, port_nr); + if (IS_ERR(port_dev)) { + err = PTR_ERR(port_dev); + printk("err_status\n"); + } + + data->port_dev[i] = port_dev; + data->port_data[i] = port_data; + + strcpy(port_data->type, type); + + dev_info(&client->dev, "Register %s port-%d\n", port_data->type , port_nr); + + /* FIXME: implement Logical/Physical port remapping */ + //port_data->cpld_port = i; + port_data->cpld_port = port_remapping(i); + sprintf(port_data->name, "port-%d", port_nr); + port_data->port_id = port_nr; + dev_set_drvdata(port_dev, port_data); + port_dev->init_name = port_data->name; + port_data->cpld_client = client; + + err = sysfs_create_group(&port_dev->kobj, &sfp_attr_group); + // if (status) printk("err status\n"); + } + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s device found\n", client->name); + + + return 0; + +err_out: + return port_nr; +} + +/* FIXME: for older kernel doesn't with idr_is_empty function, implement here */ +#if 1 +static int idr_has_entry(int id, void *p, void *data) +{ + return 1; +} + +static bool cpld_idr_is_empty(struct idr *idp) +{ + return !idr_for_each(idp, idr_has_entry, NULL); +} +#endif + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + int i; +// int id; + + for (i = 15; i >= 0; i--) + { + dev_info(data->port_dev[i], "Remove %s port-%d\n", data->port_data[i]->type , data->port_data[i]->port_id); + device_unregister(data->port_dev[i]); + ida_simple_remove(&cpld_ida, data->port_data[i]->port_id); + kfree(data->port_data[i]); + } + + if (cpld_idr_is_empty(&cpld_ida.idr)) + class_destroy(cpld_class); + + return 0; +} + +module_i2c_driver(cpld_driver); + +MODULE_AUTHOR("Jonathan Tsai "); +MODULE_VERSION("1.0"); +MODULE_DESCRIPTION("Quanta Switch SFP28 CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/modules/qci_platform_ix8c.c b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/modules/qci_platform_ix8c.c new file mode 100644 index 00000000000..f69d3879efb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/modules/qci_platform_ix8c.c @@ -0,0 +1,400 @@ +/* + * Quanta IX8C platform driver + * + * + * Copyright (C) 2017 Quanta Computer inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0)) +#include +#else +#include +#endif + +#define MUX_INFO(bus, deselect) \ + {.adap_id = bus, .deselect_on_exit = deselect} + +static struct pca954x_platform_mode pca9548sfp1_modes[] = { + MUX_INFO(0x20, 1), + MUX_INFO(0x21, 1), + MUX_INFO(0x22, 1), + MUX_INFO(0x23, 1), + MUX_INFO(0x24, 1), + MUX_INFO(0x25, 1), + MUX_INFO(0x26, 1), + MUX_INFO(0x27, 1), +}; + +static struct pca954x_platform_data pca9548sfp1_data = { + .modes = pca9548sfp1_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp2_modes[] = { + MUX_INFO(0x28, 1), + MUX_INFO(0x29, 1), + MUX_INFO(0x2a, 1), + MUX_INFO(0x2b, 1), + MUX_INFO(0x2c, 1), + MUX_INFO(0x2d, 1), + MUX_INFO(0x2e, 1), + MUX_INFO(0x2f, 1), +}; + +static struct pca954x_platform_data pca9548sfp2_data = { + .modes = pca9548sfp2_modes, + .num_modes = 8, +}; +static struct pca954x_platform_mode pca9548sfp3_modes[] = { + MUX_INFO(0x30, 1), + MUX_INFO(0x31, 1), + MUX_INFO(0x32, 1), + MUX_INFO(0x33, 1), + MUX_INFO(0x34, 1), + MUX_INFO(0x35, 1), + MUX_INFO(0x36, 1), + MUX_INFO(0x37, 1), +}; + +static struct pca954x_platform_data pca9548sfp3_data = { + .modes = pca9548sfp3_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp4_modes[] = { + MUX_INFO(0x38, 1), + MUX_INFO(0x39, 1), + MUX_INFO(0x3a, 1), + MUX_INFO(0x3b, 1), + MUX_INFO(0x3c, 1), + MUX_INFO(0x3d, 1), + MUX_INFO(0x3e, 1), + MUX_INFO(0x3f, 1), +}; + +static struct pca954x_platform_data pca9548sfp4_data = { + .modes = pca9548sfp4_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp5_modes[] = { + MUX_INFO(0x40, 1), + MUX_INFO(0x41, 1), + MUX_INFO(0x42, 1), + MUX_INFO(0x43, 1), + MUX_INFO(0x44, 1), + MUX_INFO(0x45, 1), + MUX_INFO(0x46, 1), + MUX_INFO(0x47, 1), +}; + +static struct pca954x_platform_data pca9548sfp5_data = { + .modes = pca9548sfp5_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp6_modes[] = { + MUX_INFO(0x48, 1), + MUX_INFO(0x49, 1), + MUX_INFO(0x4a, 1), + MUX_INFO(0x4b, 1), + MUX_INFO(0x4c, 1), + MUX_INFO(0x4d, 1), + MUX_INFO(0x4e, 1), + MUX_INFO(0x4f, 1), +}; + +static struct pca954x_platform_data pca9548sfp6_data = { + .modes = pca9548sfp6_modes, + .num_modes = 8, +}; + +//ZQSFP +static struct pca954x_platform_mode pca9548sfp7_modes[] = { + MUX_INFO(0x50, 1), + MUX_INFO(0x51, 1), + MUX_INFO(0x52, 1), + MUX_INFO(0x53, 1), + MUX_INFO(0x54, 1), + MUX_INFO(0x55, 1), + MUX_INFO(0x56, 1), + MUX_INFO(0x57, 1), +}; + +static struct pca954x_platform_data pca9548sfp7_data = { + .modes = pca9548sfp7_modes, + .num_modes = 8, +}; + +// end port + +static struct pca954x_platform_mode pca9546_modes[] = { + MUX_INFO(0x10, 1), + MUX_INFO(0x11, 1), + MUX_INFO(0x12, 1), + MUX_INFO(0x13, 1), +}; + +static struct pca954x_platform_data pca9546_data = { + .modes = pca9546_modes, + .num_modes = 4, +}; + +static struct pca954x_platform_mode pca9548_modes[] = { + MUX_INFO(0x14, 1), + MUX_INFO(0x15, 1), + MUX_INFO(0x16, 1), + MUX_INFO(0x17, 1), + MUX_INFO(0x18, 1), + MUX_INFO(0x19, 1), + MUX_INFO(0x1a, 1), + MUX_INFO(0x1b, 1), +}; + +static struct pca954x_platform_data pca9548_data = { + .modes = pca9548_modes, + .num_modes = 8, +}; + +//MB Board Data +static struct pca953x_platform_data pca9555_1_data = { + .gpio_base = 0x10, +}; +//QSFP28 49-56 IO Expander +static struct pca953x_platform_data pca9698_2_data = { + .gpio_base = 0x20, +}; +//CPU Linking Board at CPU's I2C Bus +static struct pca953x_platform_data pca9555_CPU_data = { + .gpio_base = 0x48, +}; +static struct i2c_board_info ix8c_i2c_devices[] = { + { + I2C_BOARD_INFO("pca9546", 0x72), // 0 + .platform_data = &pca9546_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x77), // 1 + .platform_data = &pca9548_data, + }, + { + I2C_BOARD_INFO("24c02", 0x54), // 2 eeprom + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 3 0x77 ch0 + .platform_data = &pca9548sfp1_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 4 0x77 ch1 + .platform_data = &pca9548sfp2_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 5 0x77 ch2 + .platform_data = &pca9548sfp3_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 6 0x77 ch3 + .platform_data = &pca9548sfp4_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 7 0x77 ch4 + .platform_data = &pca9548sfp5_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 8 0x77 ch5 + .platform_data = &pca9548sfp6_data, + }, + { + I2C_BOARD_INFO("pca9548", 0x73), // 9 0x77 ch6 + .platform_data = &pca9548sfp7_data, + }, + { + I2C_BOARD_INFO("CPLD-SFP28", 0x38), // 10 0x72 ch0 CPLD1_:SFP28 1~16 + }, + { + I2C_BOARD_INFO("CPLD-SFP28", 0x38), // 11 0x72 ch1 CPLD2_:SFP28 17~32 + }, + { + I2C_BOARD_INFO("CPLD-SFP28", 0x38), // 12 0x72 ch2 CPLD_3:SFP28 33~48 + }, + { + I2C_BOARD_INFO("pca9555", 0x23), // 13 0x72 ch3 MB Board Data + .platform_data = &pca9555_1_data, + }, + { + I2C_BOARD_INFO("pca9698", 0x21), // 14 0x72 ch3 QSFP:49~52 + .platform_data = &pca9698_2_data, + }, + { + I2C_BOARD_INFO("optoe1", 0x50), // 15 0x50 QSFP EEPROM + }, + { + I2C_BOARD_INFO("pca9555", 0x22), // 16 CPU Linking Board at CPU's I2C Bus + .platform_data = &pca9555_CPU_data, + }, + { + I2C_BOARD_INFO("CPLDLED_IX8C", 0x3a), // 17 0x72 ch0 CPLD4 LED function of SFP28 & QSFP28 (Port27~56) + }, + { + I2C_BOARD_INFO("CPLDLED_IX8C", 0x39), // 18 0x72 ch0 CPLD6 LED function of SFP28 & QSFP28 (Port1~26) + }, + { + I2C_BOARD_INFO("optoe2", 0x50), // 19 0x50 SFP28 EEPROM + }, +}; + +static struct platform_driver ix8c_platform_driver = { + .driver = { + .name = "qci-ix8c", + .owner = THIS_MODULE, + }, +}; + +static struct platform_device *ix8c_device; + +static int __init ix8c_platform_init(void) +{ + struct i2c_client *client; + struct i2c_adapter *adapter; + int ret, i; + + ret = platform_driver_register(&ix8c_platform_driver); + if (ret < 0) + return ret; + + /* Register platform stuff */ + ix8c_device = platform_device_alloc("qci-ix8c", -1); + if (!ix8c_device) { + ret = -ENOMEM; + goto fail_platform_driver; + } + + ret = platform_device_add(ix8c_device); + if (ret) + goto fail_platform_device; + + adapter = i2c_get_adapter(0); + client = i2c_new_device(adapter, &ix8c_i2c_devices[0]); // pca9546 + client = i2c_new_device(adapter, &ix8c_i2c_devices[1]); // pca9548 + client = i2c_new_device(adapter, &ix8c_i2c_devices[16]); // CPU Linking Board at CPU's I2C Bus + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x10); + client = i2c_new_device(adapter, &ix8c_i2c_devices[10]); // CPLD_1 + client = i2c_new_device(adapter, &ix8c_i2c_devices[17]); // CPLD_4 + client = i2c_new_device(adapter, &ix8c_i2c_devices[18]); // CPLD_6 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x11); + client = i2c_new_device(adapter, &ix8c_i2c_devices[11]); // CPLD_2 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x12); + client = i2c_new_device(adapter, &ix8c_i2c_devices[12]); // CPLD_3 + client = i2c_new_device(adapter, &ix8c_i2c_devices[2]); // MB_BOARDINFO_EEPROM + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x13); + client = i2c_new_device(adapter, &ix8c_i2c_devices[13]); // MB Board Data + client = i2c_new_device(adapter, &ix8c_i2c_devices[14]); // QSFP:49~52 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x14); + client = i2c_new_device(adapter, &ix8c_i2c_devices[3]); // pca9548_1 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x15); + client = i2c_new_device(adapter, &ix8c_i2c_devices[4]); // pca9548_2 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x16); + client = i2c_new_device(adapter, &ix8c_i2c_devices[5]); // pca9548_3 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x17); + client = i2c_new_device(adapter, &ix8c_i2c_devices[6]); // pca9548_4 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x18); + client = i2c_new_device(adapter, &ix8c_i2c_devices[7]); // pca9548_5 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x19); + client = i2c_new_device(adapter, &ix8c_i2c_devices[8]); // pca9548_6 SFP + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x1a); + client = i2c_new_device(adapter, &ix8c_i2c_devices[9]); // pca9548_7 QSFP + i2c_put_adapter(adapter); + + for(i = 80; i < 88; i ++){ // QSFP 49~56 EEPROM + adapter = i2c_get_adapter(i); + client = i2c_new_device(adapter, &ix8c_i2c_devices[15]); + i2c_put_adapter(adapter); + } + + for(i = 32; i < 80; i ++){ // SFP28 1~48 EEPROM + adapter = i2c_get_adapter(i); + client = i2c_new_device(adapter, &ix8c_i2c_devices[19]); + i2c_put_adapter(adapter); + } + + return 0; + +fail_platform_device: + platform_device_put(ix8c_device); + +fail_platform_driver: + platform_driver_unregister(&ix8c_platform_driver); + return ret; +} + +static void __exit ix8c_platform_exit(void) +{ + platform_device_unregister(ix8c_device); + platform_driver_unregister(&ix8c_platform_driver); +} + +module_init(ix8c_platform_init); +module_exit(ix8c_platform_exit); + + +MODULE_AUTHOR("Jonathan Tsai "); +MODULE_VERSION("1.0"); +MODULE_DESCRIPTION("Quanta IX8C Platform Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/service/ix8c-platform-init.service b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/service/ix8c-platform-init.service new file mode 100755 index 00000000000..d9c80a55771 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/service/ix8c-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Quanta IX8C-56X Platform initialization service +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/quanta_ix8c_util.py install +ExecStop=/usr/local/bin/quanta_ix8c_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/setup.py b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/setup.py new file mode 100644 index 00000000000..26a3101bf7a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='ix8c_56x', + version='1.0', + description='Module to initialize Quanta IX8C-56X platforms', + + packages=['ix8c_56x'], + package_dir={'ix8c_56x': 'ix8c-56x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/utils/quanta_ix8c_util.py b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/utils/quanta_ix8c_util.py new file mode 100755 index 00000000000..c495533638e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix8c-56x/utils/quanta_ix8c_util.py @@ -0,0 +1,329 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Quanta Computer Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install() + elif arg == 'clean': + uninstall() + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[IX8C-56X]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +"with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +instantiate =[ +#turn on module power +'echo 21 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio21/direction', +'echo 1 >/sys/class/gpio/gpio21/value', +#export pca9698 for qsfp present +'echo 34 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio34/direction', +'echo 38 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio38/direction', +'echo 42 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio42/direction', +'echo 46 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio46/direction', +'echo 50 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio50/direction', +'echo 54 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio54/direction', +'echo 58 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio58/direction', +'echo 62 > /sys/class/gpio/export', +'echo in > /sys/class/gpio/gpio62/direction', +#export pca9698 for qsfp reset +'echo 32 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio32/direction', +'echo 1 >/sys/class/gpio/gpio32/value', +'echo 36 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio36/direction', +'echo 1 >/sys/class/gpio/gpio36/value', +'echo 40 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio40/direction', +'echo 1 >/sys/class/gpio/gpio40/value', +'echo 44 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio44/direction', +'echo 1 >/sys/class/gpio/gpio44/value', +'echo 48 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio48/direction', +'echo 1 >/sys/class/gpio/gpio48/value', +'echo 52 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio52/direction', +'echo 1 >/sys/class/gpio/gpio52/value', +'echo 56 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio56/direction', +'echo 1 >/sys/class/gpio/gpio56/value', +'echo 60 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio60/direction', +'echo 1 >/sys/class/gpio/gpio60/value', +#export pca9698 for qsfp lpmode +'echo 35 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio35/direction', +'echo 0 >/sys/class/gpio/gpio35/value', +'echo 39 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio39/direction', +'echo 0 >/sys/class/gpio/gpio39/value', +'echo 43 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio43/direction', +'echo 0 >/sys/class/gpio/gpio43/value', +'echo 47 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio47/direction', +'echo 0 >/sys/class/gpio/gpio47/value', +'echo 51 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio51/direction', +'echo 0 >/sys/class/gpio/gpio51/value', +'echo 55 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio55/direction', +'echo 0 >/sys/class/gpio/gpio55/value', +'echo 59 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio59/direction', +'echo 0 >/sys/class/gpio/gpio59/value', +'echo 63 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio63/direction', +'echo 0 >/sys/class/gpio/gpio63/value', +#Reset fron-ports LED CPLD +'echo 73 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio73/direction', +'echo 0 >/sys/class/gpio/gpio73/value', +'echo 1 >/sys/class/gpio/gpio73/value', +#Enable front-ports LED decoding +'echo 1 > /sys/class/cpld-led/CPLDLED-1/led_decode', +'echo 1 > /sys/class/cpld-led/CPLDLED-2/led_decode', +#SFP28 Module TxEnable +'echo 0 > /sys/class/cpld-sfp28/port-1/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-2/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-3/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-4/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-5/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-6/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-7/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-8/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-9/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-10/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-11/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-12/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-13/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-14/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-15/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-16/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-17/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-18/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-19/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-20/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-21/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-22/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-23/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-24/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-25/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-26/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-27/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-28/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-29/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-30/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-31/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-32/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-33/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-34/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-35/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-36/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-37/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-38/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-39/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-40/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-41/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-42/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-43/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-44/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-45/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-46/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-47/tx_dis', +'echo 0 > /sys/class/cpld-sfp28/port-48/tx_dis' +] + +drivers =[ +'lpc_ich', +'i2c-i801', +'i2c-dev', +'i2c-mux-pca954x', +'gpio-pca953x', +'optoe', +'qci_cpld_sfp28', +'qci_cpld_led', +'qci_platform_ix8c', +'ipmi_devintf' +] + + + +def system_install(): + global FORCE + + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("rmmod i2c_ismt ", 1) + status, output = exec_cmd("rmmod i2c-i801 ", 1) + #setup driver dependency + status, output = exec_cmd("depmod -a ", 1) + #install drivers + for i in range(0,len(drivers)): + status, output = exec_cmd("modprobe "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + + #remove net rules for generating new net rules + status, output = exec_cmd("systemctl stop systemd-udevd.service ", 1) + status, output = exec_cmd("rm /etc/udev/rules.d/70-persistent-net.rules ", 1) + status, output = exec_cmd("rmmod ixgbe ", 1) + status, output = exec_cmd("rmmod igb ", 1) + status, output = exec_cmd("modprobe igb ", 1) + status, output = exec_cmd("modprobe ixgbe ", 1) + status, output = exec_cmd("systemctl start systemd-udevd.service ", 1) + + #instantiate devices + for i in range(0,len(instantiate)): + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status + + #QSFP for 1~56 port + for port_number in range(1,57): + bus_number = port_number + 31 + os.system("echo %d >/sys/bus/i2c/devices/%d-0050/port_name" % (port_number, bus_number)) + + return + + +def system_ready(): + if not device_found(): + return False + return True + +def install(): + if not device_found(): + print "No device, installing...." + status = system_install() + if status: + if FORCE == 0: + return status + else: + print " ix8c driver already installed...." + return + +def uninstall(): + global FORCE + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"i2c-0", 0) + return ret1 + +if __name__ == "__main__": + main() + + + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/classes/__init__.py b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/classes/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/Makefile b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/Makefile new file mode 100644 index 00000000000..929782931a4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/Makefile @@ -0,0 +1,3 @@ +obj-m:=qci_cpld_qsfpdd.o qci_cpld_led.o qci_platform_ix9.o + + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_cpld_led.c b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_cpld_led.c new file mode 100644 index 00000000000..d8f89240a85 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_cpld_led.c @@ -0,0 +1,277 @@ +/* + * A LED CPLD driver for Quanta Switch Platform + * + * The CPLD is customize by Quanta for decode led bit stream, + * This driver modify from Quanta CPLD I/O driver. + * + * Copyright (C) 2015 Quanta Inc. + * + * Author: Luffy Cheng + * Author: Roger Chang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_IDA(cpld_led_ida); + +enum platform_type { + IX7 = 0, + IX8C, + IX9, + NONE +}; + +static struct class *cpld_class = NULL; + +struct cpld_data { + struct i2c_client *cpld_client; + char name[8]; + u8 cpld_id; +}; + +struct cpld_led_data { + struct mutex lock; + struct device *port_dev; + struct cpld_data *cpld_data; +}; + +static int cpld_led_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int cpld_led_remove(struct i2c_client *client); + +static const struct i2c_device_id cpld_led_id[] = { + { "CPLDLED_IX7", IX7 }, + { "CPLDLED_IX8C", IX8C }, + { "CPLDLED_IX9", IX9 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cpld_led_id); + +static struct i2c_driver cpld_led_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "qci_cpld_led", + }, + .probe = cpld_led_probe, + .remove = cpld_led_remove, + .id_table = cpld_led_id, +// .address_list = normal_i2c, +}; + +#define CPLD_LED_ID_PREFIX "CPLDLED-" +#define CPLD_LED_ID_FORMAT CPLD_LED_ID_PREFIX "%d" + +#define CPLD_DECODER_OFFSET 0x4 +#define CPLD_DECODER_MASK 0x1 +#define CPLD_USERCODE_START_OFFSET 0x0 + +static ssize_t get_led_decode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 offset = (u8)(CPLD_DECODER_OFFSET); + s32 value; + + value = i2c_smbus_read_byte_data(client, offset); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led decode value= %x\n", value); + + value &= CPLD_DECODER_MASK; + + return sprintf(buf, "%d\n", (value == 0) ? 1 : 0); +} + +static ssize_t get_usercode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 i = 0; + s32 value = 0, reading = 0; + + for (i = 0; i < 4; i++) + { + reading = i2c_smbus_read_byte_data(client, CPLD_USERCODE_START_OFFSET + i); + if (reading < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led usercode reg %d value= %x\n", i, reading); + + value |= reading << (24 - 8 * i); + } + + return sprintf(buf, "%X\n", value); +} + +static ssize_t set_led_decode(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + s32 value; + long enable; + + if (kstrtol(buf, 0, &enable)) + return -EINVAL; + + if ((enable != 1) && (enable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_byte_data(client, CPLD_DECODER_OFFSET); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read led decode value= %x\n", value); + + value |= CPLD_DECODER_MASK; + if (enable) + value &= ~CPLD_DECODER_MASK; + + dev_dbg(&client->dev, "write led decode value= %x\n", value); + + i2c_smbus_write_byte_data(client, CPLD_DECODER_OFFSET, (u8)value); +// mutex_unlock(&data->lock); + + return count; +} + +static DEVICE_ATTR(led_decode, S_IWUSR | S_IRUGO, get_led_decode, set_led_decode); +static DEVICE_ATTR(usercode, S_IRUGO, get_usercode, NULL); + +static const struct attribute *led_attrs[] = { + &dev_attr_usercode.attr, + &dev_attr_led_decode.attr, + NULL, +}; + +static const struct attribute_group led_attr_group = { + .attrs = (struct attribute **) led_attrs, +}; + +static int cpld_led_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cpld_led_data *data; + struct cpld_data *led_data; + struct device *port_dev; + int nr, err; + + if (!cpld_class) + { + cpld_class = class_create(THIS_MODULE, "cpld-led"); + if (IS_ERR(cpld_class)) { + pr_err("couldn't create sysfs class\n"); + return PTR_ERR(cpld_class); + } + } + + data = devm_kzalloc(&client->dev, sizeof(struct cpld_led_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* Test */ + nr = ida_simple_get(&cpld_led_ida, 1, 99, GFP_KERNEL); + if (nr < 0) + goto err_out; + + led_data = kzalloc(sizeof(struct cpld_led_data), GFP_KERNEL); + + port_dev = device_create(cpld_class, &client->dev, MKDEV(0,0), led_data, CPLD_LED_ID_FORMAT, nr); + if (IS_ERR(port_dev)) { + err = PTR_ERR(port_dev); + // printk("err_status\n"); + } + + data->port_dev = port_dev; + data->cpld_data = led_data; + + dev_info(&client->dev, "Register CPLDLED %d\n", nr); + + sprintf(led_data->name, "LED%d-data", nr); + led_data->cpld_id = nr; + dev_set_drvdata(port_dev, led_data); + port_dev->init_name = led_data->name; + led_data->cpld_client = client; + + err = sysfs_create_group(&port_dev->kobj, &led_attr_group); + // if (status) printk("err status\n"); + /* end */ + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s device found\n", client->name); + + + return 0; + +err_out: + return nr; +} + +/* FIXME: for older kernel doesn't with idr_is_empty function, implement here */ +static int idr_has_entry(int id, void *p, void *data) +{ + return 1; +} + +static bool cpld_idr_is_empty(struct idr *idp) +{ + return !idr_for_each(idp, idr_has_entry, NULL); +} + +static int cpld_led_remove(struct i2c_client *client) +{ + struct cpld_led_data *data = i2c_get_clientdata(client); + + dev_info(data->port_dev, "Remove CPLDLED-%d\n", data->cpld_data->cpld_id); + device_unregister(data->port_dev); + ida_simple_remove(&cpld_led_ida, data->cpld_data->cpld_id); + kfree(data->cpld_data); + + if (cpld_idr_is_empty(&cpld_led_ida.idr)) + class_destroy(cpld_class); + + return 0; +} + +module_i2c_driver(cpld_led_driver); + +MODULE_AUTHOR("Luffy Cheng "); +MODULE_AUTHOR("Roger Chang "); +MODULE_DESCRIPTION("Quanta Switch LED CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_cpld_qsfpdd.c b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_cpld_qsfpdd.c new file mode 100644 index 00000000000..d616f887dbb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_cpld_qsfpdd.c @@ -0,0 +1,411 @@ +/* + * A CPLD driver for monitor QSFPDD module I/O + * + * The CPLD is customize by Quanta for controlling QSFPDD module signals, + * they are RESET , INTERREPT , Module_Present, LPMODE + * Each CPLD control 16 modules, each module use 4 bits in register. + * + * Copyright (C) 2015 Quanta Inc. + * + * Author: Luffy Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_IDA(cpld_ida); + +enum platform_type { + QSFPDD = 0, + NONE +}; + +static struct class *cpld_class = NULL; + +struct sfp_data { + struct i2c_client *cpld_client; + char name[8]; + u8 port_id; + u8 cpld_port; +}; + +struct cpld_data { + struct mutex lock; + struct device *port_dev[16]; + struct sfp_data *port_data[16]; +}; + +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int cpld_remove(struct i2c_client *client); + +static const struct i2c_device_id cpld_id[] = { + { "CPLD-QSFPDD", QSFPDD }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "qci_cpld_qsfpdd", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, +// .address_list = normal_i2c, +}; + +#define CPLD_ID_PREFIX "port-" +#define CPLD_ID_FORMAT CPLD_ID_PREFIX "%d" + +#define RESET_MASK 0x08 +#define INTERRUPT_MASK 0x04 +#define MODULE_PRESENT_MASK 0x02 +#define LPMODE_MASK 0x01 + +static inline u8 get_group_cmd(u8 group) +{ + //FIXME: if group cmd change + return (group + 1); +} + +static inline u8 port_remapping(u8 phy_port) +{ + /* FIXME: implement by hardware design */ + /* The CPLD register port mapping is weird : + * MSB -------- LSB (word data) + * P3 P4 P1 P2 (per port 4 bits) + * For easy coding bit shift, we treat it as hw port swap + */ + return (phy_port % 2) ? (phy_port - 1) : (phy_port + 1); +} + +static ssize_t get_reset(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= RESET_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t get_interrupt(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= INTERRUPT_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t get_module_present(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= MODULE_PRESENT_MASK; + + //FIXME: if present is not low active + return sprintf(buf, "%d\n", value ? 0 : 1); +} + +static ssize_t get_lpmode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= LPMODE_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t set_reset(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + long disable; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + if (kstrtol(buf, 0, &disable)) + return -EINVAL; + + if ((disable != 1) && (disable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value &= ~(RESET_MASK << (group_port * 4)); + if (disable) + value |= (RESET_MASK << (group_port * 4)); + + dev_dbg(&client->dev, "write group%d value= %x\n", group + 1, value); + + i2c_smbus_write_word_data(client, get_group_cmd(group), (u16)value); +// mutex_unlock(&data->lock); + + return count; +} + +static ssize_t set_lpmode(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + long disable; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + if (kstrtol(buf, 0, &disable)) + return -EINVAL; + + if ((disable != 1) && (disable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value &= ~(LPMODE_MASK << (group_port * 4)); + if (disable) + value |= (LPMODE_MASK << (group_port * 4)); + + dev_dbg(&client->dev, "write group%d value= %x\n", group + 1, value); + + i2c_smbus_write_word_data(client, get_group_cmd(group), (u16)value); +// mutex_unlock(&data->lock); + + return count; +} + +static DEVICE_ATTR(reset, S_IWUSR | S_IRUGO, get_reset, set_reset); +static DEVICE_ATTR(lpmode, S_IWUSR | S_IRUGO, get_lpmode, set_lpmode); +static DEVICE_ATTR(module_present, S_IRUGO, get_module_present, NULL); +static DEVICE_ATTR(interrupt, S_IRUGO, get_interrupt, NULL); + +static const struct attribute *sfp_attrs[] = { + &dev_attr_reset.attr, + &dev_attr_lpmode.attr, + &dev_attr_module_present.attr, + &dev_attr_interrupt.attr, + NULL, +}; + +static const struct attribute_group sfp_attr_group = { + .attrs = (struct attribute **) sfp_attrs, +}; + +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cpld_data *data; + struct sfp_data *port_data; + struct device *port_dev; + int port_nr, i, err; + + if (!cpld_class) + { + cpld_class = class_create(THIS_MODULE, "cpld-qsfpdd"); + if (IS_ERR(cpld_class)) { + pr_err("couldn't create sysfs class\n"); + return PTR_ERR(cpld_class); + } + } + + data = devm_kzalloc(&client->dev, sizeof(struct cpld_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* register sfp port data to sysfs */ + for (i = 0; i < 16; i++) + { + port_nr = ida_simple_get(&cpld_ida, 1, 99, GFP_KERNEL); + if (port_nr < 0) + return port_nr; + + port_data = kzalloc(sizeof(struct sfp_data), GFP_KERNEL); + + port_dev = device_create(cpld_class, &client->dev, MKDEV(0,0), port_data, CPLD_ID_FORMAT, port_nr); + if (IS_ERR(port_dev)) { + err = PTR_ERR(port_dev); + // printk("err_status\n"); + } + + data->port_dev[i] = port_dev; + data->port_data[i] = port_data; + + dev_info(&client->dev, "Register qsfpdd port-%d\n", port_nr); + + /* FIXME: implement Logical/Physical port remapping */ + //port_data->cpld_port = i; + port_data->cpld_port = port_remapping(i); + sprintf(port_data->name, "port-%d", port_nr); + port_data->port_id = port_nr; + dev_set_drvdata(port_dev, port_data); + port_dev->init_name = port_data->name; + port_data->cpld_client = client; + + err = sysfs_create_group(&port_dev->kobj, &sfp_attr_group); + // if (status) printk("err status\n"); + } + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s device found\n", client->name); + + + return 0; + +#if 0 +//FIXME: implement error check +exit_remove: +// sysfs_remove_group(&client->dev.kobj, &data->attrs); + return err; +#endif +} + +/* FIXME: for older kernel doesn't with idr_is_empty function, implement here */ +static int idr_has_entry(int id, void *p, void *data) +{ + return 1; +} + +static bool cpld_idr_is_empty(struct idr *idp) +{ + return !idr_for_each(idp, idr_has_entry, NULL); +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + int i; + + for (i = 15; i >= 0; i--) + { + dev_info(data->port_dev[i], "Remove qsfpdd port-%d\n", data->port_data[i]->port_id); + device_unregister(data->port_dev[i]); + ida_simple_remove(&cpld_ida, data->port_data[i]->port_id); + kfree(data->port_data[i]); + } + + if (cpld_idr_is_empty(&cpld_ida.idr)) + class_destroy(cpld_class); + + return 0; +} + +module_i2c_driver(cpld_driver); + +MODULE_AUTHOR("Luffy Cheng "); +MODULE_DESCRIPTION("Quanta Switch SFP CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_platform_ix9.c b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_platform_ix9.c new file mode 100644 index 00000000000..a927e850791 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/modules/qci_platform_ix9.c @@ -0,0 +1,293 @@ +/* + * Quanta IX9 platform driver + * + * + * Copyright (C) 2019 Quanta Computer inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE > KERNEL_VERSION(3,12,0) +#include +#else +#include +#endif +#define MUX_INFO(bus, deselect) \ + {.adap_id = bus, .deselect_on_exit = deselect} + +static struct pca954x_platform_mode pca9546_1_modes[] = { + MUX_INFO(0x10, 1), + MUX_INFO(0x11, 1), + MUX_INFO(0x12, 1), + MUX_INFO(0x13, 1), +}; + +static struct pca954x_platform_data pca9546_1_data = { + .modes = pca9546_1_modes, + .num_modes = 4, +}; + +static struct pca954x_platform_mode pca9548_1_modes[] = { + MUX_INFO(0x14, 1), + MUX_INFO(0x15, 1), + MUX_INFO(0x16, 1), + MUX_INFO(0x17, 1), +}; + +static struct pca954x_platform_data pca9548_1_data = { + .modes = pca9548_1_modes, + .num_modes = 4, +}; + +static struct pca954x_platform_mode pca9548sfp1_modes[] = { + MUX_INFO(0x20, 1), + MUX_INFO(0x21, 1), + MUX_INFO(0x22, 1), + MUX_INFO(0x23, 1), + MUX_INFO(0x24, 1), + MUX_INFO(0x25, 1), + MUX_INFO(0x26, 1), + MUX_INFO(0x27, 1), +}; + +static struct pca954x_platform_data pca9548sfp1_data = { + .modes = pca9548sfp1_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp2_modes[] = { + MUX_INFO(0x28, 1), + MUX_INFO(0x29, 1), + MUX_INFO(0x2a, 1), + MUX_INFO(0x2b, 1), + MUX_INFO(0x2c, 1), + MUX_INFO(0x2d, 1), + MUX_INFO(0x2e, 1), + MUX_INFO(0x2f, 1), +}; + +static struct pca954x_platform_data pca9548sfp2_data = { + .modes = pca9548sfp2_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp3_modes[] = { + MUX_INFO(0x30, 1), + MUX_INFO(0x31, 1), + MUX_INFO(0x32, 1), + MUX_INFO(0x33, 1), + MUX_INFO(0x34, 1), + MUX_INFO(0x35, 1), + MUX_INFO(0x36, 1), + MUX_INFO(0x37, 1), +}; + +static struct pca954x_platform_data pca9548sfp3_data = { + .modes = pca9548sfp3_modes, + .num_modes = 8, +}; + +static struct pca954x_platform_mode pca9548sfp4_modes[] = { + MUX_INFO(0x38, 1), + MUX_INFO(0x39, 1), + MUX_INFO(0x3a, 1), + MUX_INFO(0x3b, 1), + MUX_INFO(0x3c, 1), + MUX_INFO(0x3d, 1), + MUX_INFO(0x3e, 1), + MUX_INFO(0x3f, 1), +}; + +static struct pca954x_platform_data pca9548sfp4_data = { + .modes = pca9548sfp4_modes, + .num_modes = 8, +}; + +static struct pca953x_platform_data tca9539_1_data = { + .gpio_base = 0x10, +}; +//CPU Linking Board at CPU's I2C Bus +static struct pca953x_platform_data pca9555_CPU_data = { + .gpio_base = 0x20, +}; + +static struct i2c_board_info ix9_i2c_devices[] = { + { + I2C_BOARD_INFO("pca9546", 0x72), + .platform_data = &pca9546_1_data, // 0 pca9546_1 + }, + { + I2C_BOARD_INFO("pca9548", 0x77), + .platform_data = &pca9548_1_data, // 1 pca9548_1 + }, + { + I2C_BOARD_INFO("tca9539", 0x74), + .platform_data = &tca9539_1_data, // 2 Board ID and QSFP-DD PW EN/PG + }, + { + I2C_BOARD_INFO("24c02", 0x54), // 3 MB_BOARDINFO_EEPROM + }, + { + I2C_BOARD_INFO("pca9548", 0x73), + .platform_data = &pca9548sfp1_data, // 4 0x77 ch0 pca9548 #1 + }, + { + I2C_BOARD_INFO("pca9548", 0x73), + .platform_data = &pca9548sfp2_data, // 5 0x77 ch1 pca9548 #2 + }, + { + I2C_BOARD_INFO("pca9548", 0x73), + .platform_data = &pca9548sfp3_data, // 6 0x77 ch2 pca9548 #3 + }, + { + I2C_BOARD_INFO("pca9548", 0x73), + .platform_data = &pca9548sfp4_data, // 7 0x77 ch3 pca9548 #4 + }, + { + I2C_BOARD_INFO("CPLD-QSFPDD", 0x38), // 8 0x72 ch0 CPLD-IO #2, #3 + }, + { + I2C_BOARD_INFO("CPLDLED_IX9", 0x39), // 9 0x72 ch1 CPLD-LED #4, #5 + }, + { + I2C_BOARD_INFO("optoe1", 0x50), // 10 eeprom for loopback module + }, + { + I2C_BOARD_INFO("pca9555", 0x22), // 11 CPU Linking Board at CPU's I2C Bus + .platform_data = &pca9555_CPU_data, + }, +}; + +static struct platform_driver ix9_platform_driver = { + .driver = { + .name = "qci-ix9", + .owner = THIS_MODULE, + }, +}; + +static struct platform_device *ix9_device; + +static int __init ix9_platform_init(void) +{ + struct i2c_client *client; + struct i2c_adapter *adapter; + int ret, i; + + ret = platform_driver_register(&ix9_platform_driver); + if (ret < 0) + return ret; + + /* Register platform stuff */ + ix9_device = platform_device_alloc("qci-ix9", -1); + if (!ix9_device) { + ret = -ENOMEM; + goto fail_platform_driver; + } + + ret = platform_device_add(ix9_device); + if (ret) + goto fail_platform_device; + + adapter = i2c_get_adapter(0); + client = i2c_new_device(adapter, &ix9_i2c_devices[0]); // pca9546_1 - Address: 0x72 + client = i2c_new_device(adapter, &ix9_i2c_devices[1]); // pca9548_1 - Address: 0x77 + client = i2c_new_device(adapter, &ix9_i2c_devices[11]); // CPU Linking Board at CPU's I2C Bus - Address: 0x22 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x10); + client = i2c_new_device(adapter, &ix9_i2c_devices[8]); // CPLD-IO #2 - Address: 0x38 + client = i2c_new_device(adapter, &ix9_i2c_devices[9]); // CPLD-LED #4 - Address: 0x39 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x11); + client = i2c_new_device(adapter, &ix9_i2c_devices[8]); // CPLD-IO #3 - Address: 0x38 + client = i2c_new_device(adapter, &ix9_i2c_devices[9]); // CPLD-LED #5 - Address: 0x39 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x12); + client = i2c_new_device(adapter, &ix9_i2c_devices[3]); // MB_BOARDINFO_EEPROM - Address: 0x54 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x13); + client = i2c_new_device(adapter, &ix9_i2c_devices[2]); // tca9539_1 Board ID and QSFP-DD PW EN/PG - Address: 0x74 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x14); + client = i2c_new_device(adapter, &ix9_i2c_devices[4]); // pca9548 #1 QSFPDD - Address: 0x73 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x15); + client = i2c_new_device(adapter, &ix9_i2c_devices[5]); // pca9548 #2 QSFPDD - Address: 0x73 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x16); + client = i2c_new_device(adapter, &ix9_i2c_devices[6]); // pca9548 #3 QSFPDD - Address: 0x73 + i2c_put_adapter(adapter); + + adapter = i2c_get_adapter(0x17); + client = i2c_new_device(adapter, &ix9_i2c_devices[7]); // pca9548 #4 QSFPDD - Address: 0x73 + i2c_put_adapter(adapter); + + for(i = 0x20; i < 0x40; i++) + { + adapter = i2c_get_adapter(i); + client = i2c_new_device(adapter, &ix9_i2c_devices[10]); // eeprom for loopback module - Address: 0x50 + i2c_put_adapter(adapter); + } + + return 0; + +fail_platform_device: + platform_device_put(ix9_device); + +fail_platform_driver: + platform_driver_unregister(&ix9_platform_driver); + return ret; +} + +static void __exit ix9_platform_exit(void) +{ + platform_device_unregister(ix9_device); + platform_driver_unregister(&ix9_platform_driver); +} + +module_init(ix9_platform_init); +module_exit(ix9_platform_exit); + +MODULE_AUTHOR("Jonathan Tsai "); +MODULE_VERSION("1.0"); +MODULE_DESCRIPTION("Quanta IX9 Platform Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/service/ix9-platform-init.service b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/service/ix9-platform-init.service new file mode 100755 index 00000000000..1f33cc17011 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/service/ix9-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Quanta IX9-32X Platform initialization service +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/quanta_ix9_util.py install +ExecStop=/usr/local/bin/quanta_ix9_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/setup.py b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/setup.py new file mode 100644 index 00000000000..b2f1b39fcd7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/setup.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='ix9_32x', + version='1.0', + description='Module to initialize Quanta IX9-32X platforms', + + packages=['ix9_32x'], + package_dir={'ix9_32x': 'ix9-32x/classes'}, +) + diff --git a/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/utils/quanta_ix9_util.py b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/utils/quanta_ix9_util.py new file mode 100755 index 00000000000..4c31aa8584b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-quanta/ix9-32x/utils/quanta_ix9_util.py @@ -0,0 +1,217 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Quanta Computer Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + +DEBUG = False +args = [] +FORCE = 0 +i2c_prefix = '/sys/bus/i2c/devices/' + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + install() + elif arg == 'clean': + uninstall() + else: + show_help() + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_log(txt): + if DEBUG == True: + print "[IX9-32X]"+txt + return + +def exec_cmd(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + show_log (cmd +"with result:" + str(status)) + show_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +instantiate =[ +#turn on module power +'echo 21 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio21/direction', +'echo 1 >/sys/class/gpio/gpio21/value', +#Reset fron-ports LED CPLD +'echo 33 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio33/direction', +'echo 0 >/sys/class/gpio/gpio33/value', +'echo 1 >/sys/class/gpio/gpio33/value', +#Enable front-ports LED decoding +'echo 1 > /sys/class/cpld-led/CPLDLED-1/led_decode', +'echo 1 > /sys/class/cpld-led/CPLDLED-2/led_decode', +#Update System LED +'echo 39 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio39/direction', +'echo 0 > /sys/class/gpio/gpio39/value', +'echo 40 > /sys/class/gpio/export', +'echo out > /sys/class/gpio/gpio40/direction', +'echo 1 > /sys/class/gpio/gpio40/value', +] + +drivers =[ +'lpc_ich', +'i2c-i801', +'i2c-dev', +'i2c-mux-pca954x', +'gpio-pca953x', +'qci_cpld_qsfpdd', +'qci_cpld_led', +'qci_platform_ix9', +'ipmi_devintf' +] + + + +def system_install(): + global FORCE + + #remove default drivers to avoid modprobe order conflicts + status, output = exec_cmd("rmmod i2c_ismt ", 1) + status, output = exec_cmd("rmmod i2c-i801 ", 1) + #setup driver dependency + status, output = exec_cmd("depmod -a ", 1) + #install drivers + for i in range(0,len(drivers)): + status, output = exec_cmd("modprobe "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + + #remove net rules for generating new net rules + status, output = exec_cmd("systemctl stop systemd-udevd.service ", 1) + status, output = exec_cmd("rm /etc/udev/rules.d/70-persistent-net.rules ", 1) + status, output = exec_cmd("rmmod ixgbe ", 1) + status, output = exec_cmd("rmmod igb ", 1) + status, output = exec_cmd("modprobe igb ", 1) + status, output = exec_cmd("modprobe ixgbe ", 1) + status, output = exec_cmd("systemctl start systemd-udevd.service ", 1) + + #instantiate devices + for i in range(0,len(instantiate)): + status, output = exec_cmd(instantiate[i], 1) + if status: + print output + if FORCE == 0: + return status + + #QSFPDD for 1~32 port + for port_number in range(1,33): + bus_number = port_number + 31 + os.system("echo %d >/sys/bus/i2c/devices/%d-0050/port_name" % (port_number, bus_number)) + + return + +def system_ready(): + if not device_found(): + return False + return True + +def install(): + if not device_found(): + print "No device, installing...." + status = system_install() + if status: + if FORCE == 0: + return status + else: + print " ix9 driver already installed...." + return + +def uninstall(): + global FORCE + #uninstall drivers + for i in range(len(drivers)-1,-1,-1): + status, output = exec_cmd("rmmod "+drivers[i], 1) + if status: + print output + if FORCE == 0: + return status + return + +def device_found(): + ret1, log = exec_cmd("ls "+i2c_prefix+"i2c-0", 0) + return ret1 + +if __name__ == "__main__": + main() + + + diff --git a/platform/cavium/cavm-platform-modules.mk b/platform/cavium/cavm-platform-modules.mk new file mode 100644 index 00000000000..24848631350 --- /dev/null +++ b/platform/cavium/cavm-platform-modules.mk @@ -0,0 +1,4 @@ +CAVM_PLATFORM_DEB = cavm_platform_modules.deb +$(CAVM_PLATFORM_DEB)_SRC_PATH = $(PLATFORM_PATH)/cavm_platform_modules +SONIC_MAKE_DEBS += $(CAVM_PLATFORM_DEB) +SONIC_STRETCH_DEBS += $(CAVM_PLATFORM_DEB) diff --git a/platform/cavium/cavm-sai.mk b/platform/cavium/cavm-sai.mk new file mode 100644 index 00000000000..0008135729c --- /dev/null +++ b/platform/cavium/cavm-sai.mk @@ -0,0 +1,13 @@ +# Cavium SAI + +CAVM_SAI_GITHUB = https://github.com/XPliant/OpenXPS/raw/13a7eaf10f523e7887964ca235f19095fcc88537/SAI/cavm-sai/ + +CAVM_LIBSAI = libsai.deb +CAVM_SAI = sai.deb +XP_TOOLS = xp-tools.deb + +$(CAVM_LIBSAI)_URL = $(CAVM_SAI_GITHUB)/$(CAVM_LIBSAI) +$(CAVM_SAI)_URL = $(CAVM_SAI_GITHUB)/$(CAVM_SAI) +$(XP_TOOLS)_URL = $(CAVM_SAI_GITHUB)/$(XP_TOOLS) + +SONIC_ONLINE_DEBS += $(CAVM_LIBSAI) $(CAVM_SAI) $(XP_TOOLS) diff --git a/platform/cavium/cavm-xpnet.mk b/platform/cavium/cavm-xpnet.mk new file mode 100644 index 00000000000..714a929fb2c --- /dev/null +++ b/platform/cavium/cavm-xpnet.mk @@ -0,0 +1,7 @@ +CAVM_SAI_URL = https://github.com/XPliant/OpenXPS/raw/c26aea6a7098936ab3692e148238d73fa8962585/SAI + +CAVM_XPNET_DEB = xp80-Pcie-Endpoint.deb +$(CAVM_XPNET_DEB)_URL = $(CAVM_SAI_URL)/netdev/$(CAVM_XPNET_DEB) + +SONIC_ONLINE_DEBS += $(CAVM_XPNET_DEB) +SONIC_STRETCH_DEBS += $(CAVM_XPNET_DEB) diff --git a/platform/cavium/cavm_platform_modules/DEBIAN/changelog b/platform/cavium/cavm_platform_modules/DEBIAN/changelog new file mode 100644 index 00000000000..b138dba2628 --- /dev/null +++ b/platform/cavium/cavm_platform_modules/DEBIAN/changelog @@ -0,0 +1,6 @@ + +cavm-platform-modules (1.0) unstable; urgency=low + + * Initial release + +-- Nadiya.Stetskovych@cavium.com Thu, 12 Jan 2017 19:24:41 +0200 diff --git a/platform/cavium/cavm_platform_modules/DEBIAN/control b/platform/cavium/cavm_platform_modules/DEBIAN/control new file mode 100755 index 00000000000..75f8adc0cbd --- /dev/null +++ b/platform/cavium/cavm_platform_modules/DEBIAN/control @@ -0,0 +1,6 @@ +Package: cavm-platform-modules +Version: 1.0 +Architecture: amd64 +Depends: linux-image-3.16.0-4-amd64 +Maintainer: Nadiya.Stetskovych@cavium.com +Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/cavium/cavm_platform_modules/Makefile b/platform/cavium/cavm_platform_modules/Makefile new file mode 100644 index 00000000000..aeb274aa5a4 --- /dev/null +++ b/platform/cavium/cavm_platform_modules/Makefile @@ -0,0 +1,33 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = cavm_platform_modules.deb +DEB_BUILD_DIR = cavm-platform-modules-deb +SCRIPT_SRC = $(DEB_BUILD_DIR)/ +SYSTEMD_DIR = /etc/systemd/system + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # get sources + rm -rf SONiC + git clone https://github.com/edge-core/SONiC.git + + # build + pushd SONiC/AS7512-32X/module/ + + KERNEL_SRC=/lib/modules/$(KVERSION)/build make + popd + mkdir -p $(DEB_BUILD_DIR)/lib/modules/$(KVERSION) + mkdir -p $(DEB_BUILD_DIR)/usr/bin + mkdir -p $(DEB_BUILD_DIR)$(SYSTEMD_DIR)/multi-user.target.wants/ + + cp SONiC/AS7512-32X/module/*.ko $(DEB_BUILD_DIR)/lib/modules/$(KVERSION) + cp SONiC/AS7512-32X/accton_as7512_util.py $(DEB_BUILD_DIR)/usr/bin + chmod +x $(DEB_BUILD_DIR)/usr/bin/accton_as7512_util.py + cp as7512-platform-init.service $(DEB_BUILD_DIR)$(SYSTEMD_DIR) + ln -s $(SYSTEMD_DIR)/as7512-platform-init.service $(DEB_BUILD_DIR)$(SYSTEMD_DIR)/multi-user.target.wants/as7512-platform-init.service + cp -r DEBIAN $(DEB_BUILD_DIR) + dpkg-deb -b $(DEB_BUILD_DIR) $(MAIN_TARGET) + + mv $(MAIN_TARGET) $(DEST)/ + rm -rf $(DEB_BUILD_DIR) diff --git a/platform/cavium/cavm_platform_modules/as7512-platform-init.service b/platform/cavium/cavm_platform_modules/as7512-platform-init.service new file mode 100644 index 00000000000..69f03c0b2e4 --- /dev/null +++ b/platform/cavium/cavm_platform_modules/as7512-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Accton AS7512-32X Platform initialization service +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/bin/accton_as7512_util.py install +ExecStop=/usr/bin/accton_as7512_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/cavium/cavm_sdk/filelist.txt b/platform/cavium/cavm_sdk/filelist.txt new file mode 100644 index 00000000000..bc40295dfbd --- /dev/null +++ b/platform/cavium/cavm_sdk/filelist.txt @@ -0,0 +1,7 @@ +## Get vendor SAI SDK +## https://github.com/Azure/sonic-buildimage/blob/master/README.md#3-get-vendor-sai-sdk + +libsai.deb +sai.deb +xp-tools.deb +xpshell.deb diff --git a/platform/cavium/docker-ptf-cavm.mk b/platform/cavium/docker-ptf-cavm.mk new file mode 100644 index 00000000000..4665345586a --- /dev/null +++ b/platform/cavium/docker-ptf-cavm.mk @@ -0,0 +1,7 @@ +# docker image for docker-ptf-cavm + +DOCKER_PTF_CAVM = docker-ptf-cavm.gz +$(DOCKER_PTF_CAVM)_PATH = $(DOCKERS_PATH)/docker-ptf-saithrift +$(DOCKER_PTF_CAVM)_DEPENDS += $(PYTHON_SAITHRIFT_CAVM) +$(DOCKER_PTF_CAVM)_LOAD_DOCKERS += $(DOCKER_PTF) +SONIC_DOCKER_IMAGES += $(DOCKER_PTF_CAVM) diff --git a/platform/cavium/docker-saiserver-cavm/Dockerfile b/platform/cavium/docker-saiserver-cavm/Dockerfile new file mode 100644 index 00000000000..2f667c8038e --- /dev/null +++ b/platform/cavium/docker-saiserver-cavm/Dockerfile @@ -0,0 +1,30 @@ +FROM docker-base + +RUN apt-get update \ + && apt-get install -y libsensors4-dev \ + python \ + python-dev + +COPY deps /root/deps + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; \ + dpkg_apt /root/deps/xp-tools.deb \ + && dpkg_apt /root/deps/libsai.deb \ + && dpkg_apt /root/deps/sai.deb \ + && dpkg_apt /root/deps/libthrift-0.9.3_*.deb \ + && dpkg_apt /root/deps/libnl-3-200_*.deb \ + && dpkg_apt /root/deps/libnl-genl-3-200_*.deb \ + && dpkg_apt /root/deps/libnl-route-3-200_*.deb + + +COPY ["deps/saiserver", "start.sh", "/usr/bin/"] + +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] + +COPY ["portmap.ini", "profile.ini", "/etc/sai/"] + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf deps + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/cavium/docker-saiserver-cavm/portmap.ini b/platform/cavium/docker-saiserver-cavm/portmap.ini new file mode 100644 index 00000000000..c35776dcfcc --- /dev/null +++ b/platform/cavium/docker-saiserver-cavm/portmap.ini @@ -0,0 +1,33 @@ +# alias lanes +Ethernet0 16,17,18,19 +Ethernet4 20,21,22,23 +Ethernet8 24,25,26,27 +Ethernet12 28,29,30,31 +Ethernet16 32,33,34,35 +Ethernet20 36,37,38,39 +Ethernet24 40,41,42,43 +Ethernet28 44,45,46,47 +Ethernet32 0,1,2,3 +Ethernet36 4,5,6,7 +Ethernet40 8,9,10,11 +Ethernet44 12,13,14,15 +Ethernet48 48,49,50,51 +Ethernet52 52,53,54,55 +Ethernet56 56,57,58,59 +Ethernet60 60,61,62,63 +Ethernet64 127,126,125,124 +Ethernet68 123,122,121,120 +Ethernet72 115,114,113,112 +Ethernet76 119,118,117,116 +Ethernet80 79,78,77,76 +Ethernet84 75,74,73,72 +Ethernet88 64,65,66,67 +Ethernet92 71,70,68,69 +Ethernet96 111,110,109,108 +Ethernet100 107,106,105,104 +Ethernet104 103,102,101,100 +Ethernet108 99,98,97,96 +Ethernet112 95,94,93,92 +Ethernet116 91,90,89,88 +Ethernet120 87,86,85,84 +Ethernet124 83,82,81,80 diff --git a/platform/cavium/docker-saiserver-cavm/profile.ini b/platform/cavium/docker-saiserver-cavm/profile.ini new file mode 100644 index 00000000000..2b85ae77ebe --- /dev/null +++ b/platform/cavium/docker-saiserver-cavm/profile.ini @@ -0,0 +1,4 @@ +#SKU_128X10 +mode=0 + +hwId=as7512 diff --git a/platform/cavium/docker-saiserver-cavm/start.sh b/platform/cavium/docker-saiserver-cavm/start.sh new file mode 100755 index 00000000000..09cc0ddb541 --- /dev/null +++ b/platform/cavium/docker-saiserver-cavm/start.sh @@ -0,0 +1,7 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +supervisorctl start saiserver diff --git a/platform/cavium/docker-saiserver-cavm/supervisord.conf b/platform/cavium/docker-saiserver-cavm/supervisord.conf new file mode 100644 index 00000000000..cb67a0fc9a4 --- /dev/null +++ b/platform/cavium/docker-saiserver-cavm/supervisord.conf @@ -0,0 +1,28 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:saiserver] +command=/usr/bin/saiserver -p /etc/sai/profile.ini -f /etc/sai/portmap.ini +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/cavium/docker-syncd-cavm-rpc.mk b/platform/cavium/docker-syncd-cavm-rpc.mk new file mode 100644 index 00000000000..e57370fce5c --- /dev/null +++ b/platform/cavium/docker-syncd-cavm-rpc.mk @@ -0,0 +1,22 @@ +# docker image for cavium syncd with rpc + +DOCKER_SYNCD_CAVM_RPC = docker-syncd-cavm-rpc.gz +$(DOCKER_SYNCD_CAVM_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-cavm-rpc +$(DOCKER_SYNCD_CAVM_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) $(CAVM_LIBSAI) $(XP_TOOLS) $(REDIS_TOOLS) +$(DOCKER_SYNCD_CAVM_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) +ifeq ($(INSTALL_DEBUG_TOOLS), y) +$(DOCKER_SYNCD_CAVM_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) +endif +$(DOCKER_SYNCD_CAVM_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_CAVM) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_CAVM_RPC) +ifeq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_CAVM_RPC) +endif + +$(DOCKER_SYNCD_CAVM_RPC)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_CAVM_RPC)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SYNCD_CAVM_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_CAVM_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro diff --git a/platform/cavium/docker-syncd-cavm-rpc/Dockerfile.j2 b/platform/cavium/docker-syncd-cavm-rpc/Dockerfile.j2 new file mode 100644 index 00000000000..98485543480 --- /dev/null +++ b/platform/cavium/docker-syncd-cavm-rpc/Dockerfile.j2 @@ -0,0 +1,51 @@ +FROM docker-syncd-cavm + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +COPY \ +{% for deb in docker_syncd_cavm_rpc_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get purge -y syncd + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ +{% for deb in docker_syncd_cavm_rpc_debs.split(' ') -%} +dpkg_apt debs/{{ deb }}{{'; '}} +{%- endfor %} + +## Pre-install the fundamental packages +RUN apt-get update \ + && apt-get -y install \ + net-tools \ + python-pip \ + build-essential \ + libssl-dev \ + libffi-dev \ + python-dev \ + wget \ + cmake \ + && wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ + && tar xvfz 1.0.0.tar.gz \ + && cd nanomsg-1.0.0 \ + && mkdir -p build \ + && cmake . \ + && make install \ + && ldconfig \ + && cd .. \ + && rm -fr nanomsg-1.0.0 \ + && rm -f 1.0.0.tar.gz \ + && pip install cffi==1.7.0 \ + && pip install --upgrade cffi==1.7.0 \ + && pip install nnpy \ + && mkdir -p /opt \ + && cd /opt \ + && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ + && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \ + && rm -rf /root/deps + +COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/cavium/docker-syncd-cavm-rpc/ptf_nn_agent.conf b/platform/cavium/docker-syncd-cavm-rpc/ptf_nn_agent.conf new file mode 100644 index 00000000000..fa1ed0eb162 --- /dev/null +++ b/platform/cavium/docker-syncd-cavm-rpc/ptf_nn_agent.conf @@ -0,0 +1,10 @@ +[program:ptf_nn_agent] +command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-iface-rcv-buffer=109430400 +process_name=ptf_nn_agent +stdout_logfile=/tmp/ptf_nn_agent.out.log +stderr_logfile=/tmp/ptf_nn_agent.err.log +redirect_stderr=false +autostart=true +autorestart=true +startsecs=1 +numprocs=1 diff --git a/platform/cavium/docker-syncd-cavm.mk b/platform/cavium/docker-syncd-cavm.mk new file mode 100644 index 00000000000..a136828dbff --- /dev/null +++ b/platform/cavium/docker-syncd-cavm.mk @@ -0,0 +1,22 @@ +# docker image for cavium syncd + +DOCKER_SYNCD_CAVM = docker-syncd-cavm.gz +$(DOCKER_SYNCD_CAVM)_PATH = $(PLATFORM_PATH)/docker-syncd-cavm +$(DOCKER_SYNCD_CAVM)_DEPENDS += $(SYNCD) $(CAVM_LIBSAI) $(XP_TOOLS) $(REDIS_TOOLS) +$(DOCKER_SYNCD_CAVM)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) +ifeq ($(INSTALL_DEBUG_TOOLS), y) +$(DOCKER_SYNCD_CAVM)_DEPENDS += $(SYNCD_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) +endif +$(DOCKER_SYNCD_CAVM)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_CAVM) +ifneq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_CAVM) +endif + +$(DOCKER_SYNCD_CAVM)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_CAVM)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SYNCD_CAVM)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_CAVM)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro diff --git a/platform/cavium/docker-syncd-cavm/Dockerfile.j2 b/platform/cavium/docker-syncd-cavm/Dockerfile.j2 new file mode 100755 index 00000000000..0e2bc4b6bbc --- /dev/null +++ b/platform/cavium/docker-syncd-cavm/Dockerfile.j2 @@ -0,0 +1,35 @@ +FROM docker-config-engine + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +COPY \ +{% for deb in docker_syncd_cavm_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get -y install libpcap-dev libxml2-dev python-dev swig libsensors4-dev libatomic1 libjemalloc1 liblua5.1-0 lua-bitop lua-cjson + +RUN dpkg -i \ +{% for deb in docker_syncd_cavm_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +COPY ["start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor/"] + +COPY ["profile.ini", "/etc/ssw/AS7512/"] + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/cavium/docker-syncd-cavm/critical_processes b/platform/cavium/docker-syncd-cavm/critical_processes new file mode 100644 index 00000000000..6082f242b87 --- /dev/null +++ b/platform/cavium/docker-syncd-cavm/critical_processes @@ -0,0 +1 @@ +syncd diff --git a/platform/cavium/docker-syncd-cavm/profile.ini b/platform/cavium/docker-syncd-cavm/profile.ini new file mode 100644 index 00000000000..017996f7d7c --- /dev/null +++ b/platform/cavium/docker-syncd-cavm/profile.ini @@ -0,0 +1,2 @@ +mode=1 +hwId=as7512 diff --git a/platform/cavium/docker-syncd-cavm/start.sh b/platform/cavium/docker-syncd-cavm/start.sh new file mode 100755 index 00000000000..62331605047 --- /dev/null +++ b/platform/cavium/docker-syncd-cavm/start.sh @@ -0,0 +1,7 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +supervisorctl start syncd diff --git a/platform/cavium/docker-syncd-cavm/supervisord.conf b/platform/cavium/docker-syncd-cavm/supervisord.conf new file mode 100644 index 00000000000..c823ab5680e --- /dev/null +++ b/platform/cavium/docker-syncd-cavm/supervisord.conf @@ -0,0 +1,34 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=unexpected +stdout_logfile=syslog +stderr_logfile=syslog + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/cavium/libsaithrift-dev.mk b/platform/cavium/libsaithrift-dev.mk new file mode 100644 index 00000000000..7883a307d96 --- /dev/null +++ b/platform/cavium/libsaithrift-dev.mk @@ -0,0 +1,20 @@ +# libsaithrift-dev package + +SAI_VER = 0.9.4 + +LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_amd64.deb +$(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI +$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(CAVM_LIBSAI) $(CAVM_SAI) +$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) $(CAVM_SAI) +SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV) + +PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_amd64.deb +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT))) + +SAISERVER = saiserver_$(SAI_VER)_amd64.deb +$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(CAVM_SAI) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER))) + +SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_amd64.deb +$(SAISERVER_DBG)_RDEPENDS += $(SAISERVER) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER_DBG))) diff --git a/platform/cavium/one-image.mk b/platform/cavium/one-image.mk new file mode 100644 index 00000000000..d81763430c0 --- /dev/null +++ b/platform/cavium/one-image.mk @@ -0,0 +1,15 @@ +# sonic cavium one image installer + +SONIC_ONE_IMAGE = sonic-cavium.bin +$(SONIC_ONE_IMAGE)_MACHINE = cavium +$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie +$(SONIC_ONE_IMAGE)_INSTALLS += $(CAVM_PLATFORM_DEB) +$(SONIC_ONE_IMAGE)_INSTALLS += $(CAVM_XPNET_DEB) +$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +ifeq ($(INSTALL_DEBUG_TOOLS),y) +$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) +$(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) +else +$(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES) +endif +SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/cavium/platform.conf b/platform/cavium/platform.conf new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/cavium/rules.mk b/platform/cavium/rules.mk new file mode 100644 index 00000000000..2da9f5cca9f --- /dev/null +++ b/platform/cavium/rules.mk @@ -0,0 +1,22 @@ +include $(PLATFORM_PATH)/cavm-sai.mk +include $(PLATFORM_PATH)/docker-syncd-cavm.mk +include $(PLATFORM_PATH)/docker-syncd-cavm-rpc.mk +include $(PLATFORM_PATH)/cavm-platform-modules.mk +include $(PLATFORM_PATH)/cavm-xpnet.mk +include $(PLATFORM_PATH)/one-image.mk +include $(PLATFORM_PATH)/libsaithrift-dev.mk +include $(PLATFORM_PATH)/docker-ptf-cavm.mk + +SONIC_ALL += $(SONIC_ONE_IMAGE) \ + $(DOCKER_FPM) \ + $(DOCKER_PTF_CAVM) \ + $(DOCKER_SYNCD_CAVM_RPC) + +# Inject cavium sai into sairedis +$(LIBSAIREDIS)_DEPENDS += $(CAVM_SAI) $(CAVM_LIBSAI) +ifeq ($(ENABLE_SYNCD_RPC),y) +$(LIBSAIREDIS)_DEPENDS += $(LIBSAITHRIFT_DEV_CAVM) +endif + +# Runtime dependency on cavium sai is set only for syncd +$(SYNCD)_RDEPENDS += $(CAVM_SAI) diff --git a/platform/centec/docker-ptf-centec.mk b/platform/centec/docker-ptf-centec.mk new file mode 100644 index 00000000000..ff84ed0becb --- /dev/null +++ b/platform/centec/docker-ptf-centec.mk @@ -0,0 +1,7 @@ +# docker image for docker-ptf-centec + +DOCKER_PTF_CENTEC = docker-ptf-centec.gz +$(DOCKER_PTF_CENTEC)_PATH = $(DOCKERS_PATH)/docker-ptf-saithrift +$(DOCKER_PTF_CENTEC)_DEPENDS += $(PYTHON_SAITHRIFT_CENTEC) +$(DOCKER_PTF_CENTEC)_LOAD_DOCKERS += $(DOCKER_PTF) +SONIC_DOCKER_IMAGES += $(DOCKER_PTF_CENTEC) diff --git a/platform/centec/docker-syncd-centec-rpc.mk b/platform/centec/docker-syncd-centec-rpc.mk new file mode 100644 index 00000000000..71c8ef7753c --- /dev/null +++ b/platform/centec/docker-syncd-centec-rpc.mk @@ -0,0 +1,23 @@ +# docker image for centec syncd with rpc + +DOCKER_SYNCD_CENTEC_RPC = docker-syncd-centec-rpc.gz +$(DOCKER_SYNCD_CENTEC_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-centec-rpc +$(DOCKER_SYNCD_CENTEC_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) +$(DOCKER_SYNCD_CENTEC_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) +ifeq ($(INSTALL_DEBUG_TOOLS), y) +$(DOCKER_SYNCD_CENTEC_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) +endif +$(DOCKER_SYNCD_CENTEC_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_CENTEC) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_CENTEC_RPC) +ifeq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_CENTEC_RPC) +endif + +$(DOCKER_SYNCD_CENTEC_RPC)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_CENTEC_RPC)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SYNCD_CENTEC_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_CENTEC_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd +$(DOCKER_SYNCD_CENTEC_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro diff --git a/platform/centec/docker-syncd-centec-rpc/Dockerfile.j2 b/platform/centec/docker-syncd-centec-rpc/Dockerfile.j2 new file mode 100644 index 00000000000..2174fd91f91 --- /dev/null +++ b/platform/centec/docker-syncd-centec-rpc/Dockerfile.j2 @@ -0,0 +1,51 @@ +FROM docker-syncd-centec + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +COPY \ +{% for deb in docker_syncd_centec_rpc_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get purge -y syncd + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ +{% for deb in docker_syncd_centec_rpc_debs.split(' ') -%} +dpkg_apt debs/{{ deb }}{{'; '}} +{%- endfor %} + +## Pre-install the fundamental packages +RUN apt-get update \ + && apt-get -y install \ + net-tools \ + python-pip \ + build-essential \ + libssl-dev \ + libffi-dev \ + python-dev \ + wget \ + cmake \ + && wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ + && tar xvfz 1.0.0.tar.gz \ + && cd nanomsg-1.0.0 \ + && mkdir -p build \ + && cmake . \ + && make install \ + && ldconfig \ + && cd .. \ + && rm -fr nanomsg-1.0.0 \ + && rm -f 1.0.0.tar.gz \ + && pip install cffi==1.7.0 \ + && pip install --upgrade cffi==1.7.0 \ + && pip install nnpy \ + && mkdir -p /opt \ + && cd /opt \ + && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ + && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \ + && rm -rf /root/deps + +COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/centec/docker-syncd-centec-rpc/ptf_nn_agent.conf b/platform/centec/docker-syncd-centec-rpc/ptf_nn_agent.conf new file mode 100644 index 00000000000..fa1ed0eb162 --- /dev/null +++ b/platform/centec/docker-syncd-centec-rpc/ptf_nn_agent.conf @@ -0,0 +1,10 @@ +[program:ptf_nn_agent] +command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-iface-rcv-buffer=109430400 +process_name=ptf_nn_agent +stdout_logfile=/tmp/ptf_nn_agent.out.log +stderr_logfile=/tmp/ptf_nn_agent.err.log +redirect_stderr=false +autostart=true +autorestart=true +startsecs=1 +numprocs=1 diff --git a/platform/centec/docker-syncd-centec.mk b/platform/centec/docker-syncd-centec.mk new file mode 100644 index 00000000000..360690731a5 --- /dev/null +++ b/platform/centec/docker-syncd-centec.mk @@ -0,0 +1,23 @@ +# docker image for centec syncd + +DOCKER_SYNCD_CENTEC = docker-syncd-centec.gz +$(DOCKER_SYNCD_CENTEC)_PATH = $(PLATFORM_PATH)/docker-syncd-centec +$(DOCKER_SYNCD_CENTEC)_DEPENDS += $(SYNCD) +$(DOCKER_SYNCD_CENTEC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) +ifeq ($(INSTALL_DEBUG_TOOLS), y) +$(DOCKER_SYNCD_CENTEC)_DEPENDS += $(SYNCD_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) +endif +$(DOCKER_SYNCD_CENTEC)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_CENTEC) +ifneq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_CENTEC) +endif + +$(DOCKER_SYNCD_CENTEC)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_CENTEC)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SYNCD_CENTEC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_CENTEC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd +$(DOCKER_SYNCD_CENTEC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro diff --git a/platform/centec/docker-syncd-centec/Dockerfile.j2 b/platform/centec/docker-syncd-centec/Dockerfile.j2 new file mode 100755 index 00000000000..b40103a24f2 --- /dev/null +++ b/platform/centec/docker-syncd-centec/Dockerfile.j2 @@ -0,0 +1,34 @@ +FROM docker-config-engine + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +COPY \ +{% for deb in docker_syncd_centec_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN dpkg -i \ +{% for deb in docker_syncd_centec_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +## TODO: add kmod into Depends +RUN apt-get install -f kmod + +COPY ["start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor/"] + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/centec/docker-syncd-centec/critical_processes b/platform/centec/docker-syncd-centec/critical_processes new file mode 100644 index 00000000000..6082f242b87 --- /dev/null +++ b/platform/centec/docker-syncd-centec/critical_processes @@ -0,0 +1 @@ +syncd diff --git a/platform/centec/docker-syncd-centec/start.sh b/platform/centec/docker-syncd-centec/start.sh new file mode 100755 index 00000000000..62331605047 --- /dev/null +++ b/platform/centec/docker-syncd-centec/start.sh @@ -0,0 +1,7 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +supervisorctl start syncd diff --git a/platform/centec/docker-syncd-centec/supervisord.conf b/platform/centec/docker-syncd-centec/supervisord.conf new file mode 100644 index 00000000000..c823ab5680e --- /dev/null +++ b/platform/centec/docker-syncd-centec/supervisord.conf @@ -0,0 +1,34 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=unexpected +stdout_logfile=syslog +stderr_logfile=syslog + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/centec/libsaithrift-dev.mk b/platform/centec/libsaithrift-dev.mk new file mode 100644 index 00000000000..fdcbfd664e1 --- /dev/null +++ b/platform/centec/libsaithrift-dev.mk @@ -0,0 +1,20 @@ +# libsaithrift-dev package + +SAI_VER = 0.9.4 + +LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_amd64.deb +$(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI +$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(CENTEC_SAI) +$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) $(CENTEC_SAI) +SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV) + +PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_amd64.deb +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT))) + +SAISERVER = saiserver_$(SAI_VER)_amd64.deb +$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(BRCM_SAI) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER))) + +SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_amd64.deb +$(SAISERVER_DBG)_RDEPENDS += $(SAISERVER) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER_DBG))) diff --git a/platform/centec/one-image.mk b/platform/centec/one-image.mk new file mode 100644 index 00000000000..0e057b24df0 --- /dev/null +++ b/platform/centec/one-image.mk @@ -0,0 +1,15 @@ +# sonic centec one image installer + +SONIC_ONE_IMAGE = sonic-centec.bin +$(SONIC_ONE_IMAGE)_MACHINE = centec +$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie +$(SONIC_ONE_IMAGE)_INSTALLS = $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(CENTEC_E582_48X6Q_PLATFORM_MODULE) \ + $(CENTEC_E582_48X2Q4Z_PLATFORM_MODULE) +ifeq ($(INSTALL_DEBUG_TOOLS),y) +$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) +$(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) +else +$(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES) +endif +SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/centec/platform-modules-centec-e582.mk b/platform/centec/platform-modules-centec-e582.mk new file mode 100644 index 00000000000..e22653075ec --- /dev/null +++ b/platform/centec/platform-modules-centec-e582.mk @@ -0,0 +1,20 @@ +# Centec E582-48X6Q Platform modules + + +CENTEC_E582_48X6Q_PLATFORM_MODULE_VERSION =1.1 +CENTEC_E582_48X2Q4Z_PLATFORM_MODULE_VERSION =1.1 + +export CENTEC_E582_48X6Q_PLATFORM_MODULE_VERSION +export CENTEC_E582_48X2Q4Z_PLATFORM_MODULE_VERSION + +CENTEC_E582_48X6Q_PLATFORM_MODULE = platform-modules-e582-48x6q_$(CENTEC_E582_48X6Q_PLATFORM_MODULE_VERSION)_amd64.deb + +$(CENTEC_E582_48X6Q_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-e582 +$(CENTEC_E582_48X6Q_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(CENTEC_E582_48X6Q_PLATFORM_MODULE)_PLATFORM = x86_64-centec_e582_48x6q-r0 +SONIC_STRETCH_DEBS += $(CENTEC_E582_48X6Q_PLATFORM_MODULE) +SONIC_DPKG_DEBS += $(CENTEC_E582_48X6Q_PLATFORM_MODULE) + +CENTEC_E582_48X2Q4Z_PLATFORM_MODULE = platform-modules-e582-48x2q4z_$(CENTEC_E582_48X2Q4Z_PLATFORM_MODULE_VERSION)_amd64.deb +$(CENTEC_E582_48X2Q4Z_PLATFORM_MODULE)_PLATFORM = x86_64-centec_e582_48x2q4z-r0 +$(eval $(call add_extra_package,$(CENTEC_E582_48X6Q_PLATFORM_MODULE),$(CENTEC_E582_48X2Q4Z_PLATFORM_MODULE))) diff --git a/platform/centec/platform.conf b/platform/centec/platform.conf new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/centec/rules.mk b/platform/centec/rules.mk new file mode 100644 index 00000000000..53759cb67f4 --- /dev/null +++ b/platform/centec/rules.mk @@ -0,0 +1,20 @@ +include $(PLATFORM_PATH)/platform-modules-centec-e582.mk +include $(PLATFORM_PATH)/sdk.mk +include $(PLATFORM_PATH)/docker-syncd-centec.mk +include $(PLATFORM_PATH)/docker-syncd-centec-rpc.mk +include $(PLATFORM_PATH)/one-image.mk +include $(PLATFORM_PATH)/libsaithrift-dev.mk +include $(PLATFORM_PATH)/docker-ptf-centec.mk + +SONIC_ALL += $(SONIC_ONE_IMAGE) \ + $(DOCKER_PTF_CENTEC) \ + $(DOCKER_SYNCD_CENTEC_RPC) + +# Inject centec sai into sairedis +$(LIBSAIREDIS)_DEPENDS += $(CENTEC_SAI) +ifeq ($(ENABLE_SYNCD_RPC),y) +$(LIBSAIREDIS)_DEPENDS += $(LIBSAITHRIFT_DEV_CENTEC) +endif + +# Runtime dependency on centec sai is set only for syncd +$(SYNCD)_RDEPENDS += $(CENTEC_SAI) diff --git a/platform/centec/sdk.mk b/platform/centec/sdk.mk new file mode 100644 index 00000000000..c529762dafc --- /dev/null +++ b/platform/centec/sdk.mk @@ -0,0 +1,5 @@ +# Centec SAI +CENTEC_SAI = libsai_1.3.3_amd64.deb +$(CENTEC_SAI)_URL = https://github.com/CentecNetworks/goldengate-sai/raw/master/lib/SONiC_1.3.3/libsai_1.3.3-1.0_amd64.deb + +SONIC_ONLINE_DEBS += $(CENTEC_SAI) diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/48x2q4z-modules.conf b/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/48x2q4z-modules.conf new file mode 100644 index 00000000000..7a7881c8c0d --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/48x2q4z-modules.conf @@ -0,0 +1,14 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-pca954x +lm77 +adt7470 +tun diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/config_db.json b/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/config_db.json new file mode 100644 index 00000000000..3a5c8ba914b --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/config_db.json @@ -0,0 +1,302 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "bgp_asn": 65100, + "deployment_id": null, + "hostname": "switch1", + "type": "LeafRouter", + "hwsku": "E582-48x6q" + + } + }, + "BGP_PEER_RANGE": {}, + "VLAN": {}, + "PORT": { + "Ethernet1": { + "alias": "eth-0-1", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet2": { + "alias": "eth-0-2", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet3": { + "alias": "eth-0-3", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet4": { + "alias": "eth-0-4", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet5": { + "alias": "eth-0-5", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet6": { + "alias": "eth-0-6", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet7": { + "alias": "eth-0-7", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet8": { + "alias": "eth-0-8", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet9": { + "alias": "eth-0-9", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet10": { + "alias": "eth-0-10", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet11": { + "alias": "eth-0-11", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet12": { + "alias": "eth-0-12", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet13": { + "alias": "eth-0-13", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet14": { + "alias": "eth-0-14", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet15": { + "alias": "eth-0-15", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet16": { + "alias": "eth-0-16", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet17": { + "alias": "eth-0-17", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet18": { + "alias": "eth-0-18", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet19": { + "alias": "eth-0-19", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet20": { + "alias": "eth-0-20", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet21": { + "alias": "eth-0-21", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet22": { + "alias": "eth-0-22", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet23": { + "alias": "eth-0-23", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet24": { + "alias": "eth-0-24", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet25": { + "alias": "eth-0-25", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet26": { + "alias": "eth-0-26", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet27": { + "alias": "eth-0-27", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet28": { + "alias": "eth-0-28", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet29": { + "alias": "eth-0-29", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet30": { + "alias": "eth-0-30", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet31": { + "alias": "eth-0-31", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet32": { + "alias": "eth-0-32", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet33": { + "alias": "eth-0-33", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet34": { + "alias": "eth-0-34", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet35": { + "alias": "eth-0-35", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet36": { + "alias": "eth-0-36", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet37": { + "alias": "eth-0-37", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet38": { + "alias": "eth-0-38", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet39": { + "alias": "eth-0-39", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet40": { + "alias": "eth-0-40", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet41": { + "alias": "eth-0-41", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet42": { + "alias": "eth-0-42", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet43": { + "alias": "eth-0-43", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet44": { + "alias": "eth-0-44", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet45": { + "alias": "eth-0-45", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet46": { + "alias": "eth-0-46", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet47": { + "alias": "eth-0-47", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet48": { + "alias": "eth-0-48", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet49": { + "alias": "eth-0-49", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet50": { + "alias": "eth-0-50", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet51": { + "alias": "eth-0-51", + "speed": "100000", + "mtu": "9100" + }, + "Ethernet52": { + "alias": "eth-0-52", + "speed": "100000", + "mtu": "9100" + }, + "Ethernet53": { + "alias": "eth-0-53", + "speed": "100000", + "mtu": "9100" + }, + "Ethernet54": { + "alias": "eth-0-54", + "speed": "100000", + "mtu": "9100" + } + }, + "SYSLOG_SERVER": {}, + "VLAN_INTERFACE": {}, + "PORTCHANNEL_INTERFACE": {}, + "PORTCHANNEL": {}, + "MGMT_INTERFACE": {}, + "DHCP_SERVER": {}, + "LOOPBACK_INTERFACE": { + "Loopback0|127.0.0.1/8": {} + }, + "ACL_TABLE": {}, + "INTERFACE": { + "Ethernet1|192.168.1.1/24": {}, + "Ethernet2|192.168.2.1/24": {}, + "Ethernet3|192.168.3.1/24": {}, + "Ethernet4|192.168.4.1/24": {} + } +} diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/config_db_l2l3.json b/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/config_db_l2l3.json new file mode 100644 index 00000000000..dd40332f904 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/config_db_l2l3.json @@ -0,0 +1,610 @@ +{ + "QUEUE": { + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|0-2": { + "wred_profile": "[WRED_PROFILE|AZURE_LOSSY]" + }, + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|3-4": { + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]", + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|5-7": { + "wred_profile": "[WRED_PROFILE|AZURE_LOSSY]" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS": { + "red_max_threshold": "32760", + "yellow_max_threshold": "32760", + "green_min_threshold": "4095", + "red_min_threshold": "4095", + "yellow_min_threshold": "4095", + "green_max_threshold": "32760", + "wred_yellow_enable": "true", + "wred_green_enable": "true" + }, + "AZURE_LOSSY": { + "red_max_threshold": "32760", + "yellow_max_threshold": "32760", + "green_min_threshold": "4095", + "red_min_threshold": "4095", + "yellow_min_threshold": "4095", + "green_max_threshold": "32760", + "wred_yellow_enable": "true", + "wred_green_enable": "true" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "56": "7", + "54": "6", + "28": "3", + "48": "6", + "29": "3", + "60": "7", + "61": "7", + "62": "7", + "63": "7", + "49": "6", + "34": "4", + "24": "3", + "25": "3", + "26": "3", + "27": "3", + "20": "2", + "21": "2", + "22": "2", + "23": "2", + "46": "5", + "47": "5", + "44": "5", + "45": "5", + "42": "5", + "43": "5", + "40": "5", + "41": "5", + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "5": "0", + "4": "0", + "7": "0", + "6": "0", + "9": "1", + "8": "1", + "35": "4", + "13": "1", + "12": "1", + "15": "1", + "58": "7", + "11": "1", + "10": "1", + "39": "4", + "38": "4", + "59": "7", + "14": "1", + "17": "2", + "16": "2", + "19": "2", + "18": "2", + "31": "3", + "30": "3", + "51": "6", + "36": "4", + "53": "6", + "52": "6", + "33": "4", + "55": "6", + "37": "4", + "32": "4", + "57": "7", + "50": "6" + } + }, + "DEVICE_METADATA": { + "localhost": { + "hwsku": "E582-48x6q", + "hostname": "switch1", + "bgp_asn": "None", + "deployment_id": "None", + "type": "LeafRouter" + } + }, + "PORT": { + "Ethernet1": { + "alias": "eth-0-1", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet2": { + "alias": "eth-0-2", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet3": { + "alias": "eth-0-3", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet4": { + "alias": "eth-0-4", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet5": { + "alias": "eth-0-5", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet6": { + "alias": "eth-0-6", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet7": { + "alias": "eth-0-7", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet8": { + "alias": "eth-0-8", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet9": { + "alias": "eth-0-9", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet10": { + "alias": "eth-0-10", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet11": { + "alias": "eth-0-11", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet12": { + "alias": "eth-0-12", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet13": { + "alias": "eth-0-13", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet14": { + "alias": "eth-0-14", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet15": { + "alias": "eth-0-15", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet16": { + "alias": "eth-0-16", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet17": { + "alias": "eth-0-17", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet18": { + "alias": "eth-0-18", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet19": { + "alias": "eth-0-19", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet20": { + "alias": "eth-0-20", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet21": { + "alias": "eth-0-21", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet22": { + "alias": "eth-0-22", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet23": { + "alias": "eth-0-23", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet24": { + "alias": "eth-0-24", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet25": { + "alias": "eth-0-25", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet26": { + "alias": "eth-0-26", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet27": { + "alias": "eth-0-27", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet28": { + "alias": "eth-0-28", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet29": { + "alias": "eth-0-29", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet30": { + "alias": "eth-0-30", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet31": { + "alias": "eth-0-31", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet32": { + "alias": "eth-0-32", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet33": { + "alias": "eth-0-33", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet34": { + "alias": "eth-0-34", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet35": { + "alias": "eth-0-35", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet36": { + "alias": "eth-0-36", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet37": { + "alias": "eth-0-37", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet38": { + "alias": "eth-0-38", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet39": { + "alias": "eth-0-39", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet40": { + "alias": "eth-0-40", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet41": { + "alias": "eth-0-41", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet42": { + "alias": "eth-0-42", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet43": { + "alias": "eth-0-43", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet44": { + "alias": "eth-0-44", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet45": { + "alias": "eth-0-45", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet46": { + "alias": "eth-0-46", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet47": { + "alias": "eth-0-47", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet48": { + "alias": "eth-0-48", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet49": { + "alias": "eth-0-49", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet50": { + "alias": "eth-0-50", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet51": { + "alias": "eth-0-51", + "speed": "100000", + "mtu": "9100" + }, + "Ethernet52": { + "alias": "eth-0-52", + "speed": "100000", + "mtu": "9100" + }, + "Ethernet53": { + "alias": "eth-0-53", + "speed": "100000", + "mtu": "9100" + }, + "Ethernet54": { + "alias": "eth-0-54", + "speed": "100000", + "mtu": "9100" + } + }, + "PORT_QOS_MAP": { + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54": { + "pfc_enable": "3,4", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP|AZURE]" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type": "DWRR", + "weight": "25" + }, + "scheduler.1": { + "type": "DWRR", + "weight": "30" + }, + "scheduler.2": { + "type": "DWRR", + "weight": "20" + } + }, + "VLAN": { + "Vlan500": { + "dhcp_servers": [ + "192.168.5.1", + "192.168.5.2", + "192.168.5.3", + "192.168.5.4" + ], + "members": [ + "Ethernet5", + "Ethernet6", + "Ethernet7", + "Ethernet8" + ], + "vlanid": "500" + }, + "Vlan600": { + "dhcp_servers": [ + "192.168.6.1", + "192.168.6.2", + "192.168.6.3", + "192.168.6.4" + ], + "members": [ + "Ethernet5", + "Ethernet6" + ], + "vlanid": "600" + }, + "Vlan700": { + "dhcp_servers": [ + "192.168.7.1", + "192.168.7.2", + "192.168.7.3", + "192.168.7.4" + ], + "members": [ + "Ethernet5", + "Ethernet7" + ], + "vlanid": "700" + }, + "Vlan800": { + "dhcp_servers": [ + "192.168.8.1", + "192.168.8.2", + "192.168.8.3", + "192.168.8.4" + ], + "members": [ + "Ethernet5", + "Ethernet8" + ], + "vlanid": "800" + } + }, + "VLAN_MEMBER": { + "Vlan500|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan500|Ethernet6": { + "tagging_mode": "untagged" + }, + "Vlan500|Ethernet7": { + "tagging_mode": "untagged" + }, + "Vlan500|Ethernet8": { + "tagging_mode": "untagged" + }, + "Vlan600|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan600|Ethernet6": { + "tagging_mode": "tagged" + }, + "Vlan700|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan700|Ethernet7": { + "tagging_mode": "tagged" + }, + "Vlan800|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan800|Ethernet8": { + "tagging_mode": "tagged" + } + }, + "INTERFACE": { + "Ethernet1|192.168.1.1/24": {}, + "Ethernet2|192.168.2.1/24": {}, + "Ethernet3|192.168.3.1/24": {}, + "Ethernet4|192.168.4.1/24": {} + }, + "VLAN_INTERFACE": { + "Vlan500|192.168.5.1/24": {}, + "Vlan600|192.168.6.1/24": {}, + "Vlan700|192.168.7.1/24": {}, + "Vlan800|192.168.8.1/24": {} + }, + "LOOPBACK_INTERFACE": { + "Loopback0|127.0.0.1/8": {} + }, + "CABLE_LENGTH": { + "AZURE": { + "Ethernet8": "40m", + "Ethernet9": "40m", + "Ethernet2": "40m", + "Ethernet3": "40m", + "Ethernet1": "40m", + "Ethernet6": "40m", + "Ethernet7": "40m", + "Ethernet4": "40m", + "Ethernet5": "40m", + "Ethernet22": "40m", + "Ethernet50": "40m", + "Ethernet51": "40m", + "Ethernet52": "40m", + "Ethernet53": "40m", + "Ethernet54": "40m", + "Ethernet38": "40m", + "Ethernet39": "40m", + "Ethernet18": "40m", + "Ethernet19": "40m", + "Ethernet14": "40m", + "Ethernet15": "40m", + "Ethernet16": "40m", + "Ethernet17": "40m", + "Ethernet10": "40m", + "Ethernet11": "40m", + "Ethernet12": "40m", + "Ethernet35": "40m", + "Ethernet37": "40m", + "Ethernet32": "40m", + "Ethernet33": "40m", + "Ethernet30": "40m", + "Ethernet31": "40m", + "Ethernet49": "40m", + "Ethernet48": "40m", + "Ethernet47": "40m", + "Ethernet36": "40m", + "Ethernet45": "40m", + "Ethernet44": "40m", + "Ethernet43": "40m", + "Ethernet42": "40m", + "Ethernet41": "40m", + "Ethernet40": "40m", + "Ethernet29": "40m", + "Ethernet28": "40m", + "Ethernet34": "40m", + "Ethernet46": "40m", + "Ethernet21": "40m", + "Ethernet20": "40m", + "Ethernet23": "40m", + "Ethernet13": "40m", + "Ethernet25": "40m", + "Ethernet24": "40m", + "Ethernet27": "40m", + "Ethernet26": "40m" + } + }, + "CRM": { + "Config": { + "acl_table_threshold_type": "percentage", + "nexthop_group_threshold_type": "percentage", + "fdb_entry_high_threshold": "85", + "acl_entry_threshold_type": "percentage", + "ipv6_neighbor_low_threshold": "70", + "nexthop_group_member_low_threshold": "70", + "acl_group_high_threshold": "85", + "ipv4_route_high_threshold": "85", + "acl_counter_high_threshold": "85", + "ipv4_route_low_threshold": "70", + "ipv4_route_threshold_type": "percentage", + "ipv4_neighbor_low_threshold": "70", + "acl_group_threshold_type": "percentage", + "ipv4_nexthop_high_threshold": "85", + "ipv6_route_threshold_type": "percentage", + "nexthop_group_low_threshold": "70", + "ipv4_neighbor_high_threshold": "85", + "ipv6_route_high_threshold": "85", + "ipv6_nexthop_threshold_type": "percentage", + "polling_interval": "300", + "ipv4_nexthop_threshold_type": "percentage", + "acl_group_low_threshold": "70", + "acl_entry_low_threshold": "70", + "nexthop_group_member_threshold_type": "percentage", + "ipv4_nexthop_low_threshold": "70", + "acl_counter_threshold_type": "percentage", + "ipv6_neighbor_high_threshold": "85", + "nexthop_group_member_high_threshold": "85", + "acl_table_low_threshold": "70", + "fdb_entry_threshold_type": "percentage", + "ipv6_neighbor_threshold_type": "percentage", + "acl_table_high_threshold": "85", + "ipv6_nexthop_low_threshold": "70", + "acl_counter_low_threshold": "70", + "ipv4_neighbor_threshold_type": "percentage", + "nexthop_group_high_threshold": "85", + "ipv6_route_low_threshold": "70", + "acl_entry_high_threshold": "85", + "fdb_entry_low_threshold": "70", + "ipv6_nexthop_high_threshold": "85" + } + } +} diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/Makefile b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/Makefile new file mode 100644 index 00000000000..d1ca9824aa9 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := centec_e582_48x2q4z_platform.o dal.o centec_at24c64.o +dal-y := dal_kernel.o dal_mpool.o diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/centec_at24c64.c b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/centec_at24c64.c new file mode 100644 index 00000000000..e1835df8862 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/centec_at24c64.c @@ -0,0 +1,602 @@ +/* + * at24.c - handle most I2C EEPROMs + * + * Copyright (C) 2005-2007 David Brownell + * Copyright (C) 2008 Wolfram Sang, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. + * Differences between different vendor product lines (like Atmel AT24C or + * MicroChip 24LC, etc) won't much matter for typical read/write access. + * There are also I2C RAM chips, likewise interchangeable. One example + * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). + * + * However, misconfiguration can lose data. "Set 16-bit memory address" + * to a part with 8-bit addressing will overwrite data. Writing with too + * big a page size also loses data. And it's not safe to assume that the + * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC + * uses 0x51, for just one example. + * + * Accordingly, explicit board-specific configuration data should be used + * in almost all cases. (One partial exception is an SMBus used to access + * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) + * + * So this driver uses "new style" I2C driver binding, expecting to be + * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or + * similar kernel-resident tables; or, configuration data coming from + * a bootloader. + * + * Other than binding model, current differences from "eeprom" driver are + * that this one handles write access and isn't restricted to 24c02 devices. + * It also handles larger devices (32 kbit and up) with two-byte addresses, + * which won't work on pure SMBus systems. + */ + +struct at24_data { + struct at24_platform_data chip; + int use_smbus; + + /* + * Lock protects against activities from other Linux tasks, + * but not from changes by other I2C masters. + */ + struct mutex lock; + struct bin_attribute bin; + + u8 *writebuf; + unsigned write_max; + unsigned num_addresses; + + /* + * Some chips tie up multiple I2C addresses; dummy devices reserve + * them for us, and we'll use them with SMBus calls. + */ + struct i2c_client *client[]; +}; + +/* + * This parameter is to help this driver avoid blocking other drivers out + * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C + * clock, one 256 byte read takes about 1/43 second which is excessive; + * but the 1/170 second it takes at 400 kHz may be quite reasonable; and + * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. + * + * This value is forced to be a power of two so that writes align on pages. + */ +static unsigned io_limit = 128; +module_param(io_limit, uint, 0); +MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)"); + +/* + * Specs often allow 5 msec for a page write, sometimes 20 msec; + * it's important to recover from write timeouts. + */ +static unsigned write_timeout = 25; +module_param(write_timeout, uint, 0); +MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)"); + +#define AT24_SIZE_BYTELEN 5 +#define AT24_SIZE_FLAGS 8 + +#define AT24_BITMASK(x) (BIT(x) - 1) + +/* create non-zero magic value for given eeprom parameters */ +#define AT24_DEVICE_MAGIC(_len, _flags) \ + ((1 << AT24_SIZE_FLAGS | (_flags)) \ + << AT24_SIZE_BYTELEN | ilog2(_len)) + +static const struct i2c_device_id at24_ctc_ids[] = { + { "24c64-ctc", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16 | AT24_FLAG_READONLY | AT24_FLAG_IRUGO) }, + { /* END OF LIST */ } +}; +MODULE_DEVICE_TABLE(i2c, at24_ctc_ids); + +/*-------------------------------------------------------------------------*/ + +/* + * This routine supports chips which consume multiple I2C addresses. It + * computes the addressing information to be used for a given r/w request. + * Assumes that sanity checks for offset happened at sysfs-layer. + */ +static struct i2c_client *at24_translate_offset(struct at24_data *at24, + unsigned *offset) +{ + unsigned i = 0; + + if (at24->chip.flags & AT24_FLAG_ADDR16) { + i = *offset >> 16; + *offset &= 0xffff; + } else { + i = *offset >> 8; + *offset &= 0xff; + } + + return at24->client[i]; +} + +static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf, + unsigned offset, size_t count) +{ + struct i2c_msg msg[2]; + struct i2c_client *client; + unsigned long timeout, read_time; + int status; + + memset(msg, 0, sizeof(msg)); + + /* + * REVISIT some multi-address chips don't rollover page reads to + * the next slave address, so we may need to truncate the count. + * Those chips might need another quirk flag. + * + * If the real hardware used four adjacent 24c02 chips and that + * were misconfigured as one 24c08, that would be a similar effect: + * one "eeprom" file not four, but larger reads would fail when + * they crossed certain pages. + */ + + /* + * Slave address and byte offset derive from the offset. Always + * set the byte address; on a multi-master board, another master + * may have changed the chip's "current" address pointer. + */ + client = at24_translate_offset(at24, &offset); + + if (count > io_limit) + count = io_limit; + + count = 1; + + /* + * Reads fail if the previous write didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + read_time = jiffies; + + status = i2c_smbus_write_byte_data(client, (offset >> 8) & 0x0ff, offset & 0x0ff ); + status = i2c_smbus_read_byte(client); + if (status >= 0) { + buf[0] = status; + status = count; + } + + dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", count, offset, status, jiffies); + + if (status == count) + return count; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(read_time, timeout)); + + return -ETIMEDOUT; +} + +static ssize_t at24_read(struct at24_data *at24, + char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) + return count; + + memset(buf, 0, count); + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&at24->lock); + + while (count) { + ssize_t status; + + status = at24_eeprom_read(at24, buf, off, count); + if (status <= 0) { + if (retval == 0) + retval = status; + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&at24->lock); + + return retval; +} + +static ssize_t at24_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct at24_data *at24; + + at24 = dev_get_drvdata(container_of(kobj, struct device, kobj)); + return at24_read(at24, buf, off, count); +} + + +/* + * Note that if the hardware write-protect pin is pulled high, the whole + * chip is normally write protected. But there are plenty of product + * variants here, including OTP fuses and partial chip protect. + * + * We only use page mode writes; the alternative is sloooow. This routine + * writes at most one page. + */ +static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf, + unsigned offset, size_t count) +{ + struct i2c_client *client; + ssize_t status; + unsigned long timeout, write_time; + unsigned next_page; + + /* Get corresponding I2C address and adjust offset */ + client = at24_translate_offset(at24, &offset); + + /* write_max is at most a page */ + if (count > at24->write_max) + count = at24->write_max; + + /* Never roll over backwards, to the start of this page */ + next_page = roundup(offset + 1, at24->chip.page_size); + if (offset + count > next_page) + count = next_page - offset; + + /* + * Writes fail if the previous one didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + write_time = jiffies; + + status = i2c_smbus_write_word_data(client, (offset >> 8) & 0x0ff, (offset & 0xFF) | buf[0]); + if (status == 0) + status = count; + + dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", count, offset, status, jiffies); + + if (status == count) + return count; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(write_time, timeout)); + + return -ETIMEDOUT; +} + +static ssize_t at24_write(struct at24_data *at24, const char *buf, loff_t off, + size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) + return count; + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&at24->lock); + + while (count) { + ssize_t status; + + status = at24_eeprom_write(at24, buf, off, 1); /* only one-byte to write; TODO page wirte */ + if (status <= 0) { + if (retval == 0) + retval = status; + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&at24->lock); + + return retval; +} + +static ssize_t at24_bin_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct at24_data *at24; + + if (unlikely(off >= attr->size)) + return -EFBIG; + + at24 = dev_get_drvdata(container_of(kobj, struct device, kobj)); + return at24_write(at24, buf, off, count); +} + +/*-------------------------------------------------------------------------*/ + +#ifdef CONFIG_OF +static void at24_get_ofdata(struct i2c_client *client, + struct at24_platform_data *chip) +{ + const __be32 *val; + struct device_node *node = client->dev.of_node; + + if (node) { + if (of_get_property(node, "read-only", NULL)) + chip->flags |= AT24_FLAG_READONLY; + val = of_get_property(node, "pagesize", NULL); + if (val) + chip->page_size = be32_to_cpup(val); + } +} +#else +static void at24_get_ofdata(struct i2c_client *client, + struct at24_platform_data *chip) +{ } +#endif /* CONFIG_OF */ + +static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct at24_platform_data chip; + bool writable; + int use_smbus = 0; + struct at24_data *at24; + int err; + unsigned i, num_addresses; + kernel_ulong_t magic; + + if (client->dev.platform_data) { + chip = *(struct at24_platform_data *)client->dev.platform_data; + } else { + if (!id->driver_data) + return -ENODEV; + + magic = id->driver_data; + chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN)); + magic >>= AT24_SIZE_BYTELEN; + chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS); + + /* + * This is slow, but we can't know all eeproms, so we better + * play safe. Specifying custom eeprom-types via platform_data + * is recommended anyhow. + */ + chip.page_size = 1; + + /* update chipdata if OF is present */ + at24_get_ofdata(client, &chip); + + chip.setup = NULL; + chip.context = NULL; + } + + if (!is_power_of_2(chip.byte_len)) + dev_warn(&client->dev, + "byte_len looks suspicious (no power of 2)!\n"); + if (!chip.page_size) { + dev_err(&client->dev, "page_size must not be 0!\n"); + return -EINVAL; + } + if (!is_power_of_2(chip.page_size)) + dev_warn(&client->dev, + "page_size looks suspicious (no power of 2)!\n"); + + /* Use I2C operations unless we're stuck with SMBus extensions. */ + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { + if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { + use_smbus = I2C_SMBUS_I2C_BLOCK_DATA; + } else if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_WORD_DATA)) { + use_smbus = I2C_SMBUS_WORD_DATA; + } else if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE_DATA)) { + use_smbus = I2C_SMBUS_BYTE_DATA; + } else { + return -EPFNOSUPPORT; + } + use_smbus = I2C_SMBUS_BYTE_DATA; + } + + if (chip.flags & AT24_FLAG_TAKE8ADDR) + num_addresses = 8; + else + num_addresses = DIV_ROUND_UP(chip.byte_len, (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256); + + at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) + num_addresses * sizeof(struct i2c_client *), GFP_KERNEL); + if (!at24) + return -ENOMEM; + + mutex_init(&at24->lock); + at24->use_smbus = use_smbus; + at24->chip = chip; + at24->num_addresses = num_addresses; + + printk(KERN_ALERT "at24_probe chip.byte_len = 0x%x\n", chip.byte_len); + printk(KERN_ALERT "at24_probe chip.flags = 0x%x\n", chip.flags); + printk(KERN_ALERT "at24_probe chip.magic = 0x%lx\n", id->driver_data); + printk(KERN_ALERT "at24_probe use_smbus = %d\n", at24->use_smbus); + printk(KERN_ALERT "at24_probe num_addresses = %d\n", at24->num_addresses); + + /* + * Export the EEPROM bytes through sysfs, since that's convenient. + * By default, only root should see the data (maybe passwords etc) + */ + sysfs_bin_attr_init(&at24->bin); + at24->bin.attr.name = "eeprom"; + at24->bin.attr.mode = chip.flags & AT24_FLAG_IRUGO ? S_IRUGO : S_IRUSR; + at24->bin.read = at24_bin_read; + at24->bin.size = chip.byte_len; + + writable = !(chip.flags & AT24_FLAG_READONLY); + if (writable) { + if (!use_smbus || i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) { + unsigned write_max = chip.page_size; + + at24->bin.write = at24_bin_write; + at24->bin.attr.mode |= S_IWUSR; + + if (write_max > io_limit) + write_max = io_limit; + if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX) + write_max = I2C_SMBUS_BLOCK_MAX; + at24->write_max = write_max; + + /* buffer (data + address at the beginning) */ + at24->writebuf = devm_kzalloc(&client->dev, write_max + 2, GFP_KERNEL); + if (!at24->writebuf) + return -ENOMEM; + } else { + dev_warn(&client->dev, "cannot write due to controller restrictions."); + } + } + + at24->client[0] = client; + + /* use dummy devices for multiple-address chips */ + for (i = 1; i < num_addresses; i++) { + at24->client[i] = i2c_new_dummy(client->adapter, client->addr + i); + if (!at24->client[i]) { + dev_err(&client->dev, "address 0x%02x unavailable\n", client->addr + i); + err = -EADDRINUSE; + goto err_clients; + } + } + + err = sysfs_create_bin_file(&client->dev.kobj, &at24->bin); + if (err) + goto err_clients; + + i2c_set_clientdata(client, at24); + + printk(KERN_ALERT "at24_probe %s done\n", client->name); + + return 0; + +err_clients: + for (i = 1; i < num_addresses; i++) + if (at24->client[i]) + i2c_unregister_device(at24->client[i]); + + return err; +} + +static int at24_remove(struct i2c_client *client) +{ + struct at24_data *at24; + int i; + + at24 = i2c_get_clientdata(client); + sysfs_remove_bin_file(&client->dev.kobj, &at24->bin); + + for (i = 1; i < at24->num_addresses; i++) + i2c_unregister_device(at24->client[i]); + + return 0; +} + +/*-------------------------------------------------------------------------*/ + +static struct i2c_board_info i2c_devs = { + I2C_BOARD_INFO("24c64-ctc", 0x57), +}; + +static struct i2c_adapter *adapter = NULL; +static struct i2c_client *client = NULL; + +static int ctc_at24c64_init(void) +{ + printk(KERN_ALERT "ctc_at24c64_init\n"); + + adapter = i2c_get_adapter(0); + if(adapter == NULL){ + printk(KERN_ALERT "i2c_get_adapter == NULL\n"); + return -1; + } + + client = i2c_new_device(adapter, &i2c_devs); + if(client == NULL){ + printk(KERN_ALERT "i2c_new_device == NULL\n"); + i2c_put_adapter(adapter); + adapter = NULL; + return -1; + } + + return 0; +} + +static void ctc_at24c64_exit(void) +{ + printk(KERN_ALERT "ctc_at24c64_exit\n"); + if(client){ + i2c_unregister_device(client); + } + if(adapter){ + i2c_put_adapter(adapter); + } +} + +static struct i2c_driver at24_ctc_driver = { + .driver = { + .name = "at24-ctc", + .owner = THIS_MODULE, + }, + .probe = at24_probe, + .remove = at24_remove, + .id_table = at24_ctc_ids, +}; + +static int __init at24_ctc_init(void) +{ + if (!io_limit) { + pr_err("at24_ctc: io_limit must not be 0!\n"); + return -EINVAL; + } + + io_limit = rounddown_pow_of_two(io_limit); + + ctc_at24c64_init(); + + return i2c_add_driver(&at24_ctc_driver); +} +module_init(at24_ctc_init); + +static void __exit at24_ctc_exit(void) +{ + ctc_at24c64_exit(); + i2c_del_driver(&at24_ctc_driver); +} +module_exit(at24_ctc_exit); + +MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); +MODULE_AUTHOR("David Brownell and Wolfram Sang"); +MODULE_LICENSE("GPL"); +/* XXX */ + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/centec_e582_48x2q4z_platform.c b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/centec_e582_48x2q4z_platform.c new file mode 100644 index 00000000000..16bed86593b --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/centec_e582_48x2q4z_platform.c @@ -0,0 +1,1457 @@ +#include +#include +#include +#include +#include +#include +#include + +#define SEP(XXX) 1 +#define IS_INVALID_PTR(_PTR_) ((_PTR_ == NULL) || IS_ERR(_PTR_)) +#define IS_VALID_PTR(_PTR_) (!IS_INVALID_PTR(_PTR_)) + +#if SEP("defines") +#define PCA9548_CHANNEL_NUM 8 +#define PCA9548_ADAPT_ID_START 10 +#define SFP_NUM 48 +#define QSFP_NUM 6 +#define PORT_NUM (SFP_NUM+QSFP_NUM) +#endif + +#if SEP("i2c:master") +static struct i2c_adapter *i2c_adp_master = NULL; /* i2c-0-cpu */ + +static int e582_48x2q4z_init_i2c_master(void) +{ + /* find i2c-core master */ + i2c_adp_master = i2c_get_adapter(0); + if(IS_INVALID_PTR(i2c_adp_master)) + { + i2c_adp_master = NULL; + printk(KERN_CRIT "e582_48x2q4z_init_i2c_master can't find i2c-core bus\n"); + return -1; + } + + return 0; +} + +static int e582_48x2q4z_exit_i2c_master(void) +{ + /* uninstall i2c-core master */ + if(IS_VALID_PTR(i2c_adp_master)) { + i2c_put_adapter(i2c_adp_master); + i2c_adp_master = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:pca9548") +static struct pca954x_platform_mode i2c_dev_pca9548_platform_mode[PCA9548_CHANNEL_NUM] = { + [0] = { + .adap_id = PCA9548_ADAPT_ID_START, + .deselect_on_exit = 1, + .class = 0, + }, + [1] = { + .adap_id = PCA9548_ADAPT_ID_START + 1, + .deselect_on_exit = 1, + .class = 0, + }, + [2] = { + .adap_id = PCA9548_ADAPT_ID_START + 2, + .deselect_on_exit = 1, + .class = 0, + }, + [3] = { + .adap_id = PCA9548_ADAPT_ID_START + 3, + .deselect_on_exit = 1, + .class = 0, + }, + [4] = { + .adap_id = PCA9548_ADAPT_ID_START + 4, + .deselect_on_exit = 1, + .class = 0, + }, + [5] = { + .adap_id = PCA9548_ADAPT_ID_START + 5, + .deselect_on_exit = 1, + .class = 0, + }, + [6] = { + .adap_id = PCA9548_ADAPT_ID_START + 6, + .deselect_on_exit = 1, + .class = 0, + }, + [7] = { + .adap_id = PCA9548_ADAPT_ID_START + 7, + .deselect_on_exit = 1, + .class = 0, + } +}; +static struct pca954x_platform_data i2c_dev_pca9548_platform_data = { + .modes = i2c_dev_pca9548_platform_mode, + .num_modes = PCA9548_CHANNEL_NUM, +}; +static struct i2c_board_info i2c_dev_pca9548 = { + I2C_BOARD_INFO("pca9548", 0x70), + .platform_data = &i2c_dev_pca9548_platform_data, +}; +static struct i2c_client *i2c_client_pca9548x = NULL; + +static int e582_48x2q4z_init_i2c_pca9548(void) +{ + if(IS_INVALID_PTR(i2c_adp_master)) + { + i2c_adp_master = NULL; + printk(KERN_CRIT "e582_48x2q4z_init_i2c_pca9548 can't find i2c-core bus\n"); + return -1; + } + + /* install i2c-mux */ + i2c_client_pca9548x = i2c_new_device(i2c_adp_master, &i2c_dev_pca9548); + if(IS_INVALID_PTR(i2c_client_pca9548x)) + { + i2c_client_pca9548x = NULL; + printk(KERN_CRIT "install e582_48x2q4z board pca9548 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x2q4z_exit_i2c_pca9548(void) +{ + /* uninstall i2c-core master */ + if(IS_VALID_PTR(i2c_client_pca9548x)) { + i2c_unregister_device(i2c_client_pca9548x); + i2c_client_pca9548x = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:adt7470") +static struct i2c_board_info i2c_dev_adt7470 = { + I2C_BOARD_INFO("adt7470", 0x2F), +}; +static struct i2c_adapter *i2c_adp_adt7470 = NULL; /* pca9548x-channel 4 */ +static struct i2c_client *i2c_client_adt7470 = NULL; + +static int e582_48x2q4z_init_i2c_adt7470(void) +{ + i2c_adp_adt7470 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 4); + if(IS_INVALID_PTR(i2c_adp_adt7470)) + { + i2c_adp_adt7470 = NULL; + printk(KERN_CRIT "install e582_48x2q4z board adt7470 failed\n"); + return -1; + } + + i2c_client_adt7470 = i2c_new_device(i2c_adp_adt7470, &i2c_dev_adt7470); + if(IS_INVALID_PTR(i2c_client_adt7470)){ + i2c_client_adt7470 = NULL; + printk(KERN_CRIT "install e582_48x2q4z board adt7470 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x2q4z_exit_i2c_adt7470(void) +{ + if(IS_VALID_PTR(i2c_client_adt7470)) { + i2c_unregister_device(i2c_client_adt7470); + i2c_client_adt7470 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_adt7470)) { + i2c_put_adapter(i2c_adp_adt7470); + i2c_adp_adt7470 = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:psu") +static struct i2c_adapter *i2c_adp_psu1 = NULL; /* psu1 channel 1 */ +static struct i2c_adapter *i2c_adp_psu2 = NULL; /* psu2 channel 0 */ +static struct i2c_board_info i2c_dev_psu1 = { + I2C_BOARD_INFO("i2c-psu1", 0x38), +}; +static struct i2c_board_info i2c_dev_psu2 = { + I2C_BOARD_INFO("i2c-psu2", 0x38), +}; +static struct i2c_client *i2c_client_psu1 = NULL; +static struct i2c_client *i2c_client_psu2 = NULL; + +static int e582_48x2q4z_init_i2c_psu(void) +{ + i2c_adp_psu1 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 1); + if(IS_INVALID_PTR(i2c_adp_psu1)) + { + i2c_adp_psu1 = NULL; + printk(KERN_CRIT "get e582_48x2q4z psu1 i2c-adp failed\n"); + return -1; + } + + i2c_adp_psu2 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 0); + if(IS_INVALID_PTR(i2c_adp_psu2)) + { + i2c_adp_psu2 = NULL; + printk(KERN_CRIT "get e582_48x2q4z psu2 i2c-adp failed\n"); + return -1; + } + + i2c_client_psu1 = i2c_new_device(i2c_adp_psu1, &i2c_dev_psu1); + if(IS_INVALID_PTR(i2c_client_psu1)){ + i2c_client_psu1 = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client psu1 failed\n"); + return -1; + } + + i2c_client_psu2 = i2c_new_device(i2c_adp_psu2, &i2c_dev_psu2); + if(IS_INVALID_PTR(i2c_client_psu2)){ + i2c_client_psu2 = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client psu2 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x2q4z_exit_i2c_psu(void) +{ + if(IS_VALID_PTR(i2c_client_psu1)) { + i2c_unregister_device(i2c_client_psu1); + i2c_client_psu1 = NULL; + } + + if(IS_VALID_PTR(i2c_client_psu2)) { + i2c_unregister_device(i2c_client_psu2); + i2c_client_psu2 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_psu1)) + { + i2c_put_adapter(i2c_adp_psu1); + i2c_adp_psu1 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_psu2)) + { + i2c_put_adapter(i2c_adp_psu2); + i2c_adp_psu2 = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:epld") +static struct i2c_board_info i2c_dev_epld = { + I2C_BOARD_INFO("i2c-epld", 0x58), +}; +static struct i2c_client *i2c_client_epld = NULL; + +static int e582_48x2q4z_init_i2c_epld(void) +{ + if (IS_INVALID_PTR(i2c_adp_master)) + { + printk(KERN_CRIT "e582_48x2q4z_init_i2c_epld can't find i2c-core bus\n"); + return -1; + } + + i2c_client_epld = i2c_new_device(i2c_adp_master, &i2c_dev_epld); + if(IS_INVALID_PTR(i2c_client_epld)) + { + i2c_client_epld = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client epld failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x2q4z_exit_i2c_epld(void) +{ + if(IS_VALID_PTR(i2c_client_epld)) { + i2c_unregister_device(i2c_client_epld); + i2c_client_epld = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:gpio") +static struct i2c_adapter *i2c_adp_gpio0 = NULL; /* gpio0 channel 5 */ +static struct i2c_adapter *i2c_adp_gpio1 = NULL; /* gpio1 channel 5 */ +static struct i2c_adapter *i2c_adp_gpio2 = NULL; /* gpio2 channel 5 */ +static struct i2c_adapter *i2c_adp_gpio3 = NULL; /* gpio3 channel 6 */ +static struct i2c_adapter *i2c_adp_gpio4 = NULL; /* gpio4 channel 7 */ +static struct i2c_board_info i2c_dev_gpio0 = { + I2C_BOARD_INFO("i2c-gpio0", 0x21), +}; +static struct i2c_board_info i2c_dev_gpio1 = { + I2C_BOARD_INFO("i2c-gpio1", 0x22), +}; +static struct i2c_board_info i2c_dev_gpio2 = { + I2C_BOARD_INFO("i2c-gpio2", 0x23), +}; +static struct i2c_board_info i2c_dev_gpio3 = { + I2C_BOARD_INFO("i2c-gpio3", 0x21), +}; +static struct i2c_board_info i2c_dev_gpio4 = { + I2C_BOARD_INFO("i2c-gpio4", 0x22), +}; +static struct i2c_client *i2c_client_gpio0 = NULL; +static struct i2c_client *i2c_client_gpio1 = NULL; +static struct i2c_client *i2c_client_gpio2 = NULL; +static struct i2c_client *i2c_client_gpio3 = NULL; +static struct i2c_client *i2c_client_gpio4 = NULL; + +static int e582_48x2q4z_init_i2c_gpio(void) +{ + if (IS_INVALID_PTR(i2c_adp_master)) + { + printk(KERN_CRIT "e582_48x2q4z_init_i2c_gpio can't find i2c-core bus\n"); + return -1; + } + + i2c_adp_gpio0 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 5); + if(IS_INVALID_PTR(i2c_adp_gpio0)) + { + i2c_adp_gpio0 = NULL; + printk(KERN_CRIT "get e582_48x2q4z gpio0 i2c-adp failed\n"); + return -1; + } + + i2c_adp_gpio1 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 5); + if(IS_INVALID_PTR(i2c_adp_gpio1)) + { + i2c_adp_gpio1 = NULL; + printk(KERN_CRIT "get e582_48x2q4z gpio1 i2c-adp failed\n"); + return -1; + } + + i2c_adp_gpio2 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 5); + if(IS_INVALID_PTR(i2c_adp_gpio2)) + { + i2c_adp_gpio2 = NULL; + printk(KERN_CRIT "get e582_48x2q4z gpio2 i2c-adp failed\n"); + return -1; + } + + i2c_adp_gpio3 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 6); + if(IS_INVALID_PTR(i2c_adp_gpio3)) + { + i2c_adp_gpio3 = NULL; + printk(KERN_CRIT "get e582_48x2q4z gpio3 i2c-adp failed\n"); + return -1; + } + + i2c_adp_gpio4 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 7); + if(IS_INVALID_PTR(i2c_adp_gpio4)) + { + i2c_adp_gpio4 = NULL; + printk(KERN_CRIT "get e582_48x2q4z gpio4 i2c-adp failed\n"); + return -1; + } + + i2c_client_gpio0 = i2c_new_device(i2c_adp_gpio0, &i2c_dev_gpio0); + if(IS_INVALID_PTR(i2c_client_gpio0)) + { + i2c_client_gpio0 = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client gpio0 failed\n"); + return -1; + } + + i2c_client_gpio1 = i2c_new_device(i2c_adp_gpio1, &i2c_dev_gpio1); + if(IS_INVALID_PTR(i2c_client_gpio1)) + { + i2c_client_gpio1 = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client gpio1 failed\n"); + return -1; + } + + i2c_client_gpio2 = i2c_new_device(i2c_adp_gpio2, &i2c_dev_gpio2); + if(IS_INVALID_PTR(i2c_client_gpio2)) + { + i2c_client_gpio2 = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client gpio2 failed\n"); + return -1; + } + + i2c_client_gpio3 = i2c_new_device(i2c_adp_gpio3, &i2c_dev_gpio3); + if(IS_INVALID_PTR(i2c_client_gpio3)) + { + i2c_client_gpio3 = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client gpio3 failed\n"); + return -1; + } + + i2c_client_gpio4 = i2c_new_device(i2c_adp_gpio4, &i2c_dev_gpio4); + if(IS_INVALID_PTR(i2c_client_gpio4)) + { + i2c_client_gpio4 = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client gpio4 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x2q4z_exit_i2c_gpio(void) +{ + if(IS_VALID_PTR(i2c_client_gpio0)) { + i2c_unregister_device(i2c_client_gpio0); + i2c_client_gpio0 = NULL; + } + + if(IS_VALID_PTR(i2c_client_gpio1)) { + i2c_unregister_device(i2c_client_gpio1); + i2c_client_gpio1 = NULL; + } + + if(IS_VALID_PTR(i2c_client_gpio2)) { + i2c_unregister_device(i2c_client_gpio2); + i2c_client_gpio2 = NULL; + } + + if(IS_VALID_PTR(i2c_client_gpio3)) { + i2c_unregister_device(i2c_client_gpio3); + i2c_client_gpio3 = NULL; + } + + if(IS_VALID_PTR(i2c_client_gpio4)) { + i2c_unregister_device(i2c_client_gpio4); + i2c_client_gpio4 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_gpio0)) + { + i2c_put_adapter(i2c_adp_gpio0); + i2c_adp_gpio0 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_gpio1)) + { + i2c_put_adapter(i2c_adp_gpio1); + i2c_adp_gpio1 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_gpio2)) + { + i2c_put_adapter(i2c_adp_gpio2); + i2c_adp_gpio2 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_gpio3)) + { + i2c_put_adapter(i2c_adp_gpio3); + i2c_adp_gpio3 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_gpio4)) + { + i2c_put_adapter(i2c_adp_gpio4); + i2c_adp_gpio4 = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:smbus") +static int e582_48x2q4z_smbus_read_reg(struct i2c_client *client, unsigned char reg, unsigned char* value) +{ + int ret = 0; + + if (IS_INVALID_PTR(client)) + { + printk(KERN_CRIT "invalid i2c client"); + return -1; + } + + ret = i2c_smbus_read_byte_data(client, reg); + if (ret >= 0) { + *value = (unsigned char)ret; + } + else + { + *value = 0; + printk(KERN_CRIT "i2c_smbus op failed: ret=%d reg=%d\n",ret ,reg); + return ret; + } + + return 0; +} + +static int e582_48x2q4z_smbus_write_reg(struct i2c_client *client, unsigned char reg, unsigned char value) +{ + int ret = 0; + + if (IS_INVALID_PTR(client)) + { + printk(KERN_CRIT "invalid i2c client"); + return -1; + } + + ret = i2c_smbus_write_byte_data(client, reg, value); + if (ret != 0) + { + printk(KERN_CRIT "i2c_smbus op failed: ret=%d reg=%d\n",ret ,reg); + return ret; + } + + return 0; +} +#endif + +#if SEP("drivers:psu") +static struct class* psu_class = NULL; +static struct device* psu_dev_psu1 = NULL; +static struct device* psu_dev_psu2 = NULL; + +static ssize_t e582_48x2q4z_psu_read_presence(struct device *dev, struct device_attribute *attr, char *buf) +{ + int ret = 0; + unsigned char present_no = 0; + unsigned char present = 0; + unsigned char value = 0; + struct i2c_client *i2c_psu_client = NULL; + + if (psu_dev_psu1 == dev) + { + i2c_psu_client = i2c_client_gpio2; + present_no = 30; + } + else if (psu_dev_psu2 == dev) + { + i2c_psu_client = i2c_client_gpio2; + present_no = 29; + } + else + { + return sprintf(buf, "Error: unknown psu device\n"); + } + + if (IS_INVALID_PTR(i2c_psu_client)) + { + return sprintf(buf, "Error: psu i2c-adapter invalid\n"); + } + + ret = e582_48x2q4z_smbus_read_reg(i2c_psu_client, present_no/8, &present); + if (ret != 0) + { + return sprintf(buf, "Error: read psu data:%s failed\n", attr->attr.name); + } + + value = ((present & (1<<(present_no%8))) ? 1 : 0 ); + + return sprintf(buf, "%d\n", value); +} + +static ssize_t e582_48x2q4z_psu_read_status(struct device *dev, struct device_attribute *attr, char *buf) +{ + int ret = 0; + unsigned char workstate_no = 0; + unsigned char workstate = 0; + unsigned char value = 0; + struct i2c_client *i2c_psu_client = NULL; + + if (psu_dev_psu1 == dev) + { + i2c_psu_client = i2c_client_gpio2; + workstate_no = 36; + } + else if (psu_dev_psu2 == dev) + { + i2c_psu_client = i2c_client_gpio2; + workstate_no = 35; + } + else + { + return sprintf(buf, "Error: unknown psu device\n"); + } + + if (IS_INVALID_PTR(i2c_psu_client)) + { + return sprintf(buf, "Error: psu i2c-adapter invalid\n"); + } + + ret = e582_48x2q4z_smbus_read_reg(i2c_psu_client, workstate_no/8, &workstate); + if (ret != 0) + { + return sprintf(buf, "Error: read psu data:%s failed\n", attr->attr.name); + } + + if (ret != 0) + { + return sprintf(buf, "Error: read psu data:%s failed\n", attr->attr.name); + } + + value = ((workstate & (1<<(workstate_no%8))) ? 1 : 0 ); + + return sprintf(buf, "%d\n", value); +} + +static DEVICE_ATTR(psu_presence, S_IRUGO, e582_48x2q4z_psu_read_presence, NULL); +static DEVICE_ATTR(psu_status, S_IRUGO, e582_48x2q4z_psu_read_status, NULL); + +static int e582_48x2q4z_init_psu(void) +{ + int ret = 0; + + psu_class = class_create(THIS_MODULE, "psu"); + if (IS_INVALID_PTR(psu_class)) + { + psu_class = NULL; + printk(KERN_CRIT "create e582_48x2q4z class psu failed\n"); + return -1; + } + + psu_dev_psu1 = device_create(psu_class, NULL, MKDEV(222,0), NULL, "psu1"); + if (IS_INVALID_PTR(psu_dev_psu1)) + { + psu_dev_psu1 = NULL; + printk(KERN_CRIT "create e582_48x2q4z psu1 device failed\n"); + return -1; + } + + psu_dev_psu2 = device_create(psu_class, NULL, MKDEV(222,1), NULL, "psu2"); + if (IS_INVALID_PTR(psu_dev_psu2)) + { + psu_dev_psu2 = NULL; + printk(KERN_CRIT "create e582_48x2q4z psu2 device failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu1, &dev_attr_psu_presence); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z psu1 device attr:presence failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu1, &dev_attr_psu_status); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z psu1 device attr:status failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu2, &dev_attr_psu_presence); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z psu2 device attr:presence failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu2, &dev_attr_psu_status); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z psu2 device attr:status failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x2q4z_exit_psu(void) +{ + if (IS_VALID_PTR(psu_dev_psu1)) + { + device_remove_file(psu_dev_psu1, &dev_attr_psu_presence); + device_remove_file(psu_dev_psu1, &dev_attr_psu_status); + device_destroy(psu_class, MKDEV(222,0)); + } + + if (IS_VALID_PTR(psu_dev_psu2)) + { + device_remove_file(psu_dev_psu2, &dev_attr_psu_presence); + device_remove_file(psu_dev_psu2, &dev_attr_psu_status); + device_destroy(psu_class, MKDEV(222,1)); + } + + if (IS_VALID_PTR(psu_class)) + { + class_destroy(psu_class); + psu_class = NULL; + } + + return 0; +} +#endif + +#if SEP("drivers:leds") +extern void e582_48x2q4z_led_set(struct led_classdev *led_cdev, enum led_brightness set_value); +extern enum led_brightness e582_48x2q4z_led_get(struct led_classdev *led_cdev); +extern void e582_48x2q4z_led_port_set(struct led_classdev *led_cdev, enum led_brightness set_value); +extern enum led_brightness e582_48x2q4z_led_port_get(struct led_classdev *led_cdev); + +static struct led_classdev led_dev_system = { + .name = "system", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_idn = { + .name = "idn", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_fan1 = { + .name = "fan1", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_fan2 = { + .name = "fan2", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_fan3 = { + .name = "fan3", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_fan4 = { + .name = "fan4", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_psu1 = { + .name = "psu1", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_psu2 = { + .name = "psu2", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_port[PORT_NUM] = { +{ .name = "port1", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port2", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port3", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port4", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port5", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port6", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port7", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port8", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port9", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port10", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port11", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port12", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port13", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port14", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port15", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port16", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port17", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port18", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port19", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port20", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port21", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port22", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port23", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port24", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port25", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port26", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port27", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port28", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port29", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port30", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port31", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port32", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port33", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port34", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port35", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port36", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port37", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port38", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port39", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port40", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port41", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port42", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port43", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port44", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port45", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port46", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port47", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port48", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port49", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port50", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port51", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port52", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port53", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port54", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,} +}; +static unsigned char port_led_mode[PORT_NUM] = {0}; + +void e582_48x2q4z_led_set(struct led_classdev *led_cdev, enum led_brightness set_value) +{ + int ret = 0; + unsigned char reg = 0; + unsigned char mask = 0; + unsigned char shift = 0; + unsigned char led_value = 0; + struct i2c_client *i2c_led_client = i2c_client_epld; + + if (0 == strcmp(led_dev_system.name, led_cdev->name)) + { + reg = 0x2; + mask = 0x0F; + shift = 4; + } + else if (0 == strcmp(led_dev_idn.name, led_cdev->name)) + { + reg = 0x3; + mask = 0xFE; + shift = 0; + } + else if (0 == strcmp(led_dev_fan1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan2.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan3.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan4.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu2.name, led_cdev->name)) + { + goto not_support; + } + else + { + goto not_support; + } + + ret = e582_48x2q4z_smbus_read_reg(i2c_led_client, reg, &led_value); + if (ret != 0) + { + printk(KERN_CRIT "Error: read %s led attr failed\n", led_cdev->name); + return; + } + + led_value = ((led_value & mask) | ((set_value << shift) & (~mask))); + + ret = e582_48x2q4z_smbus_write_reg(i2c_led_client, reg, led_value); + if (ret != 0) + { + printk(KERN_CRIT "Error: write %s led attr failed\n", led_cdev->name); + return; + } + + return; + +not_support: + + printk(KERN_INFO "Error: not support device:%s\n", led_cdev->name); + return; +} + +enum led_brightness e582_48x2q4z_led_get(struct led_classdev *led_cdev) +{ + int ret = 0; + unsigned char reg = 0; + unsigned char mask = 0; + unsigned char shift = 0; + unsigned char led_value = 0; + struct i2c_client *i2c_led_client = i2c_client_epld; + + if (0 == strcmp(led_dev_system.name, led_cdev->name)) + { + reg = 0x2; + mask = 0xF0; + shift = 4; + } + else if (0 == strcmp(led_dev_idn.name, led_cdev->name)) + { + reg = 0x3; + mask = 0x01; + shift = 0; + } + else if (0 == strcmp(led_dev_fan1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan2.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan3.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan4.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu2.name, led_cdev->name)) + { + goto not_support; + } + else + { + goto not_support; + } + + ret = e582_48x2q4z_smbus_read_reg(i2c_led_client, reg, &led_value); + if (ret != 0) + { + printk(KERN_CRIT "Error: read %s led attr failed\n", led_cdev->name); + return 0; + } + + led_value = ((led_value & mask) >> shift); + + return led_value; + +not_support: + + printk(KERN_INFO "Error: not support device:%s\n", led_cdev->name); + return 0; +} + +void e582_48x2q4z_led_port_set(struct led_classdev *led_cdev, enum led_brightness set_value) +{ + int portNum = 0; + + sscanf(led_cdev->name, "port%d", &portNum); + + port_led_mode[portNum-1] = set_value; + + return; +} + +enum led_brightness e582_48x2q4z_led_port_get(struct led_classdev *led_cdev) +{ + int portNum = 0; + + sscanf(led_cdev->name, "port%d", &portNum); + + return port_led_mode[portNum-1]; +} + +static int e582_48x2q4z_init_led(void) +{ + int ret = 0; + int i = 0; + + ret = led_classdev_register(NULL, &led_dev_system); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_system device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_idn); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_idn device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan1); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_fan1 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan2); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_fan2 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan3); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_fan3 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan4); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_fan4 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_psu1); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_psu1 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_psu2); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_psu2 device failed\n"); + return -1; + } + + for (i=0; i PORT_NUM)) + { + printk(KERN_CRIT "sfp read presence, invalid port number!\n"); + value = 0; + } + + if ((portNum >= 1) && (portNum <= 8)) + { + reg_no = portNum + 31;/*32-39*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 9) && (portNum <= 16)) + { + reg_no = portNum - 9;/*0-7*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 17) && (portNum <= 24)) + { + reg_no = portNum - 17;/*0-7*/ + i2c_sfp_client = i2c_client_gpio2; + } + else if ((portNum >= 25) && (portNum <= 32)) + { + reg_no = portNum - 17;/*8-15*/ + i2c_sfp_client = i2c_client_gpio2; + } + else if ((portNum >= 33) && (portNum <= 40)) + { + reg_no = portNum - 1;/*32-39*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 41) && (portNum <= 48)) + { + reg_no = portNum - 41;/*0-7*/ + i2c_sfp_client = i2c_client_gpio4; + } + else if ((portNum >= 49) && (portNum <= 54)) + { + reg_no = portNum - 33;/*16-21*/ + i2c_sfp_client = i2c_client_gpio4; + } + + dir_bank = (reg_no/8) + 0x18; + ret = e582_48x2q4z_smbus_write_reg(i2c_sfp_client, dir_bank, 0xff); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s set dir-ctl failed\n", attr->attr.name); + } + + input_bank = (reg_no/8) + 0x0; + ret = e582_48x2q4z_smbus_read_reg(i2c_sfp_client, input_bank, &value); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s failed\n", attr->attr.name); + } + + value = ((value & (1<<(reg_no%8))) ? 0 : 1 );/*1:PRESENT 0:ABSENT*/ + + return sprintf(buf, "%d\n", value); +} + +static ssize_t e582_48x2q4z_sfp_read_enable(struct device *dev, struct device_attribute *attr, char *buf) +{ + int ret = 0; + unsigned char value = 0; + unsigned char reg_no = 0; + unsigned char dir_bank = 0; + unsigned char input_bank = 0; + int portNum = 0; + const char *name = dev_name(dev); + struct i2c_client *i2c_sfp_client = NULL; + + sscanf(name, "sfp%d", &portNum); + + if ((portNum < 1) || (portNum > PORT_NUM)) + { + printk(KERN_CRIT "sfp read presence, invalid port number!\n"); + value = 0; + } + + if ((portNum >= 1) && (portNum <= 8)) + { + reg_no = portNum - 1;/*0-7*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 9) && (portNum <= 16)) + { + reg_no = portNum - 1;/*8-15*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 17) && (portNum <= 24)) + { + reg_no = portNum - 9;/*8-15*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 25) && (portNum <= 32)) + { + reg_no = portNum - 9;/*16-23*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 33) && (portNum <= 40)) + { + reg_no = portNum - 33;/*0-7*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 41) && (portNum <= 48)) + { + reg_no = portNum - 33;/*8-15*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 49) && (portNum <= 54)) + { + printk(KERN_INFO "%s not supported!\n", name); + return sprintf(buf, "%d\n", 0); + } + + dir_bank = (reg_no/8) + 0x18; + ret = e582_48x2q4z_smbus_write_reg(i2c_sfp_client, dir_bank, 0xff); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s set dir-ctl failed\n", attr->attr.name); + } + + input_bank = (reg_no/8) + 0x8; + ret = e582_48x2q4z_smbus_read_reg(i2c_sfp_client, input_bank, &value); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s failed\n", attr->attr.name); + } + + value = ((value & (1<<(reg_no%8))) ? 0 : 1 ); + + return sprintf(buf, "%d\n", value); +} + +static ssize_t e582_48x2q4z_sfp_write_enable(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + int ret = 0; + unsigned char value = 0; + unsigned char set_value = simple_strtol(buf, NULL, 10); + unsigned char reg_no = 0; + unsigned char dir_bank = 0; + unsigned char input_bank = 0; + unsigned char output_bank = 0; + int portNum = 0; + const char *name = dev_name(dev); + struct i2c_client *i2c_sfp_client = NULL; + + sscanf(name, "sfp%d", &portNum); + + if ((portNum < 1) || (portNum > PORT_NUM)) + { + printk(KERN_CRIT "sfp read presence, invalid port number!\n"); + return size; + } + + if ((portNum >= 1) && (portNum <= 8)) + { + reg_no = portNum - 1;/*0-7*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 9) && (portNum <= 16)) + { + reg_no = portNum - 1;/*8-15*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 17) && (portNum <= 24)) + { + reg_no = portNum - 9;/*8-15*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 25) && (portNum <= 32)) + { + reg_no = portNum - 9;/*16-23*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 33) && (portNum <= 40)) + { + reg_no = portNum - 33;/*0-7*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 41) && (portNum <= 48)) + { + reg_no = portNum - 17;/*8-13*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 49) && (portNum <= 54)) + { + printk(KERN_INFO "%s not supported!\n", name); + return size; + } + + set_value = ((set_value > 0) ? 0 : 1 ); + + dir_bank = (reg_no/8) + 0x18; + ret = e582_48x2q4z_smbus_write_reg(i2c_sfp_client, dir_bank, 0x0); + if (ret != 0) + { + printk(KERN_CRIT "Error: read sfp data:%s set dir-ctl failed\n", attr->attr.name); + return size; + } + + input_bank = (reg_no/8) + 0x8; + ret = e582_48x2q4z_smbus_read_reg(i2c_sfp_client, input_bank, &value); + if (ret != 0) + { + printk(KERN_CRIT "Error: read %s presence failed\n", name); + return size; + } + + if (set_value) + { + value = (value | (1<<(reg_no % 8))); + } + else + { + value = (value & (~(1<<(reg_no % 8)))); + } + + output_bank = (reg_no/8) + 0x8; + ret = e582_48x2q4z_smbus_write_reg(i2c_sfp_client, output_bank, value); + if (ret != 0) + { + printk(KERN_CRIT "Error: write %s presence failed\n", name); + return size; + } + + return size; +} + +static DEVICE_ATTR(sfp_presence, S_IRUGO, e582_48x2q4z_sfp_read_presence, NULL); +static DEVICE_ATTR(sfp_enable, S_IRUGO|S_IWUSR, e582_48x2q4z_sfp_read_enable, e582_48x2q4z_sfp_write_enable); +static int e582_48x2q4z_init_sfp(void) +{ + int ret = 0; + int i = 0; + + sfp_class = class_create(THIS_MODULE, "sfp"); + if (IS_INVALID_PTR(sfp_class)) + { + sfp_class = NULL; + printk(KERN_CRIT "create e582_48x2q4z class sfp failed\n"); + return -1; + } + + for (i=1; i<=PORT_NUM; i++) + { + sfp_dev[i] = device_create(sfp_class, NULL, MKDEV(223,i), NULL, "sfp%d", i); + if (IS_INVALID_PTR(sfp_dev[i])) + { + sfp_dev[i] = NULL; + printk(KERN_CRIT "create e582_48x2q4z sfp[%d] device failed\n", i); + continue; + } + + ret = device_create_file(sfp_dev[i], &dev_attr_sfp_presence); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z sfp[%d] device attr:presence failed\n", i); + continue; + } + + ret = device_create_file(sfp_dev[i], &dev_attr_sfp_enable); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z sfp[%d] device attr:enable failed\n", i); + continue; + } + } + + return ret; +} + +static int e582_48x2q4z_exit_sfp(void) +{ + int i = 0; + + for (i=1; i<=PORT_NUM; i++) + { + if (IS_VALID_PTR(sfp_dev[i])) + { + device_remove_file(sfp_dev[i], &dev_attr_sfp_presence); + device_remove_file(sfp_dev[i], &dev_attr_sfp_enable); + device_destroy(sfp_class, MKDEV(223,i)); + sfp_dev[i] = NULL; + } + } + + if (IS_VALID_PTR(sfp_class)) + { + class_destroy(sfp_class); + sfp_class = NULL; + } + + return 0; +} +#endif + +static int e582_48x2q4z_init(void) +{ + int ret = 0; + int failed = 0; + + printk(KERN_ALERT "install e582_48x2q4z board dirver...\n"); + + ret = e582_48x2q4z_init_i2c_master(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_i2c_pca9548(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_i2c_adt7470(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_i2c_psu(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_i2c_epld(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_i2c_gpio(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_psu(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_led(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_sfp(); + if (ret != 0) + { + failed = 1; + } + + if (failed) + printk(KERN_INFO "install e582_48x2q4z board driver failed\n"); + else + printk(KERN_ALERT "install e582_48x2q4z board dirver...ok\n"); + + return 0; +} + +static void e582_48x2q4z_exit(void) +{ + printk(KERN_INFO "uninstall e582_48x2q4z board dirver...\n"); + + e582_48x2q4z_exit_sfp(); + e582_48x2q4z_exit_led(); + e582_48x2q4z_exit_psu(); + e582_48x2q4z_exit_i2c_gpio(); + e582_48x2q4z_exit_i2c_epld(); + e582_48x2q4z_exit_i2c_psu(); + e582_48x2q4z_exit_i2c_adt7470(); + e582_48x2q4z_exit_i2c_pca9548(); + e582_48x2q4z_exit_i2c_master(); +} + +MODULE_LICENSE("Dual BSD/GPL"); +MODULE_AUTHOR("yangbs centecNetworks, Inc"); +MODULE_DESCRIPTION("e582-48x2q4z board driver"); +module_init(e582_48x2q4z_init); +module_exit(e582_48x2q4z_exit); + + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_kernel.c b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_kernel.c new file mode 100644 index 00000000000..32a38f842cf --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_kernel.c @@ -0,0 +1,1833 @@ +/** + @file dal_kernal.c + + @date 2012-10-18 + + @version v2.0 + + +*/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) +#include +#endif +#include "dal_kernel.h" +#include "dal_mpool.h" +#include +MODULE_AUTHOR("Centec Networks Inc."); +MODULE_DESCRIPTION("DAL kernel module"); +MODULE_LICENSE("GPL"); + +/* DMA memory pool size */ +static char* dma_pool_size; +module_param(dma_pool_size, charp, 0); +MODULE_PARM_DESC(dma_pool_size, + "Specify DMA memory pool size (default 4MB)"); + +/***************************************************************************** + * defines + *****************************************************************************/ +#define MB_SIZE 0x100000 +#define CTC_MAX_INTR_NUM 8 + +#define MEM_MAP_RESERVE SetPageReserved +#define MEM_MAP_UNRESERVE ClearPageReserved + +#define CTC_VENDOR_VID 0xc001 +#define CTC_HUMBER_DEVICE_ID 0x6048 +#define CTC_GOLDENGATE_DEVICE_ID 0xc010 +#define CTC_PCIE_VENDOR_ID 0xcb10 +#define CTC_DUET2_DEVICE_ID 0x7148 + +#define MEM_MAP_RESERVE SetPageReserved +#define MEM_MAP_UNRESERVE ClearPageReserved + +#define CTC_GREATBELT_DEVICE_ID 0x03e8 /* TBD */ +#define DAL_MAX_CHIP_NUM 8 /* [GB] used */ +#define VIRT_TO_PAGE(p) virt_to_page((p)) +#define DAL_UNTAG_BLOCK 0 +#define DAL_DISCARD_BLOCK 1 +#define DAL_MATCHED_BLOCK 2 +#define DAL_CUR_MATCH_BLOCk 3 +/***************************************************************************** + * typedef + *****************************************************************************/ +/* Control Data */ +typedef struct dal_isr_s +{ + int irq; + void (* isr)(void*); + void* isr_data; + int trigger; + int count; + wait_queue_head_t wqh; +} dal_isr_t; + +typedef struct dal_kernel_dev_s +{ + struct list_head list; + struct pci_dev* pci_dev; + + /* PCI I/O mapped base address */ + uintptr logic_address; + + /* Physical address */ + unsigned long long phys_address; +} dal_kern_dev_t; + +typedef struct _dma_segment +{ + struct list_head list; + unsigned long req_size; /* Requested DMA segment size */ + unsigned long blk_size; /* DMA block size */ + unsigned long blk_order; /* DMA block size in alternate format */ + unsigned long seg_size; /* Current DMA segment size */ + unsigned long seg_begin; /* Logical address of segment */ + unsigned long seg_end; /* Logical end address of segment */ + unsigned long* blk_ptr; /* Array of logical DMA block addresses */ + int blk_cnt_max; /* Maximum number of block to allocate */ + int blk_cnt; /* Current number of blocks allocated */ +} dma_segment_t; + +typedef irqreturn_t (*p_func) (int irq, void* dev_id); + +/*************************************************************************** + *declared + ***************************************************************************/ +static unsigned int linux_dal_poll0(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll1(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll2(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll3(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll4(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll5(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll6(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll7(struct file* filp, struct poll_table_struct* p); + +/***************************************************************************** + * global variables + *****************************************************************************/ +static dal_kern_dev_t dal_dev[DAL_MAX_CHIP_NUM]; +static dal_isr_t dal_isr[CTC_MAX_INTR_NUM]; +static int dal_chip_num = 0; +static int dal_version = 0; +static int dal_intr_num = 0; +static int use_high_memory = 0; +static unsigned int* dma_virt_base[DAL_MAX_CHIP_NUM]; +#ifndef DMA_MEM_MODE_PLATFORM +static unsigned int* dma_virt_base_tmp[DAL_MAX_CHIP_NUM]; +#endif +static unsigned long long dma_phy_base[DAL_MAX_CHIP_NUM]; +static unsigned int dma_mem_size = 0xc00000; +static unsigned int msi_irq_base[DAL_MAX_CHIP_NUM]; +static unsigned int msi_irq_num[DAL_MAX_CHIP_NUM]; +static unsigned int msi_used = 0; +static struct class *dal_class; + +static LIST_HEAD(_dma_seg); +static int dal_debug = 0; +module_param(dal_debug, int, 0); +MODULE_PARM_DESC(dal_debug, "Set debug level (default 0)"); + +static struct pci_device_id dal_id_table[] = +{ + {PCI_DEVICE(CTC_VENDOR_VID, CTC_GREATBELT_DEVICE_ID)}, + {PCI_DEVICE(CTC_PCIE_VENDOR_ID, CTC_GOLDENGATE_DEVICE_ID)}, + {PCI_DEVICE((CTC_PCIE_VENDOR_ID+1), (CTC_GOLDENGATE_DEVICE_ID+1))}, + {PCI_DEVICE(CTC_PCIE_VENDOR_ID, CTC_DUET2_DEVICE_ID)}, + {0, }, +}; + +static wait_queue_head_t poll_intr[CTC_MAX_INTR_NUM]; + +p_func intr_handler_fun[CTC_MAX_INTR_NUM]; + +static int poll_intr_trigger[CTC_MAX_INTR_NUM]; + +static struct file_operations dal_intr_fops[CTC_MAX_INTR_NUM] = +{ + { + .owner = THIS_MODULE, + .poll = linux_dal_poll0, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll1, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll2, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll3, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll4, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll5, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll6, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll7, + }, +}; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)) +#include +#define virt_to_bus virt_to_phys +#define bus_to_virt phys_to_virt +#endif +/***************************************************************************** + * macros + *****************************************************************************/ +#define VERIFY_CHIP_INDEX(n) (n < dal_chip_num) + +#define _KERNEL_INTERUPT_PROCESS +static irqreturn_t +intr0_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + + if(poll_intr_trigger[0]) + { + return IRQ_HANDLED; + } + + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[0] = 1; + wake_up(&poll_intr[0]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr1_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[1]) + { + return IRQ_HANDLED; + } + + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[1] = 1; + wake_up(&poll_intr[1]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr2_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[2]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[2] = 1; + wake_up(&poll_intr[2]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr3_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[3]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[3] = 1; + wake_up(&poll_intr[3]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr4_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[4]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[4] = 1; + wake_up(&poll_intr[4]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr5_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[5]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[5] = 1; + wake_up(&poll_intr[5]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr6_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[6]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[6] = 1; + wake_up(&poll_intr[6]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr7_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[7]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[7] = 1; + wake_up(&poll_intr[7]); + } + } + + return IRQ_HANDLED; +} + +int +dal_interrupt_register(unsigned int irq, int prio, void (* isr)(void*), void* data) +{ + int ret; + unsigned char str[16]; + unsigned char* int_name = NULL; + unsigned int intr_num_tmp = 0; + unsigned int intr_num = CTC_MAX_INTR_NUM; + unsigned long irq_flags = 0; + + if (dal_intr_num >= CTC_MAX_INTR_NUM) + { + printk("Interrupt numbers exceeds max.\n"); + return -1; + } + + if (msi_used) + { + int_name = "dal_msi"; + } + else + { + int_name = "dal_intr"; + } + + + for (intr_num_tmp=0;intr_num_tmp < CTC_MAX_INTR_NUM; intr_num_tmp++) + { + if (irq == dal_isr[intr_num_tmp].irq) + { + if (0 == msi_used) + { + dal_isr[intr_num_tmp].count++; + printk("Interrupt irq %d register count %d.\n", irq, dal_isr[intr_num_tmp].count); + } + return 0; + } + if ((0 == dal_isr[intr_num_tmp].irq) && (CTC_MAX_INTR_NUM == intr_num)) + { + intr_num = intr_num_tmp; + dal_isr[intr_num].count = 0; + } + } + dal_isr[intr_num].irq = irq; + dal_isr[intr_num].isr = isr; + dal_isr[intr_num].isr_data = data; + dal_isr[intr_num].count++; + + init_waitqueue_head(&poll_intr[intr_num]); + + /* only user mode */ + if ((NULL == isr) && (NULL == data)) + { + snprintf(str, 16, "%s%d", "dal_intr", intr_num); + ret = register_chrdev(DAL_DEV_INTR_MAJOR_BASE + intr_num, + str, &dal_intr_fops[intr_num]); + if (ret < 0) + { + printk("Register character device for irq %d failed, ret= %d", irq, ret); + return ret; + } + } +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) + irq_flags = 0; +#else + irq_flags = IRQF_DISABLED; +#endif + if ((ret = request_irq(irq, + intr_handler_fun[intr_num], + irq_flags, + int_name, + &dal_isr[intr_num])) < 0) + { + printk("Cannot request irq %d, ret %d.\n", irq, ret); + unregister_chrdev(DAL_DEV_INTR_MAJOR_BASE + intr_num, str); + } + + if (0 == ret) + { + dal_intr_num++; + } + + return ret; +} + +int +dal_interrupt_unregister(unsigned int irq) +{ + unsigned char str[16]; + int intr_idx = 0; + int find_flag = 0; + + /* get intr device index */ + for (intr_idx = 0; intr_idx < CTC_MAX_INTR_NUM; intr_idx++) + { + if (dal_isr[intr_idx].irq == irq) + { + find_flag = 1; + break; + } + } + + if (find_flag == 0) + { + printk ("irq%d is not registered! unregister failed \n", irq); + return -1; + } + + dal_isr[intr_idx].count--; + if (0 != dal_isr[intr_idx].count) + { + printk("Interrupt irq %d unregister count %d.\n", irq, dal_isr[intr_idx].count); + return -1; + } + snprintf(str, 16, "%s%d", "dal_intr", intr_idx); + + unregister_chrdev(DAL_DEV_INTR_MAJOR_BASE + intr_idx, str); + + free_irq(irq, &dal_isr[intr_idx]); + + dal_isr[intr_idx].irq = 0; + + dal_intr_num--; + + return 0; +} + +int +dal_interrupt_set_en(unsigned int irq, unsigned int enable) +{ + enable ? enable_irq(irq) : disable_irq_nosync(irq); + return 0; +} + +static int +_dal_set_msi_enabe(unsigned int lchip, unsigned int irq_num) +{ + int ret = 0; + + if (irq_num == 1) + { + ret = pci_enable_msi(dal_dev[lchip].pci_dev); + if (ret) + { + printk ("msi enable failed!!! lchip = %d, irq_num = %d\n", lchip, irq_num); + pci_disable_msi(dal_dev[lchip].pci_dev); + msi_used = 0; + } + + msi_irq_base[lchip] = dal_dev[lchip].pci_dev->irq; + msi_irq_num[lchip] = 1; + } + else + { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 79)) + ret = pci_enable_msi_exact(dal_dev[lchip].pci_dev, irq_num); +#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 26, 32)) + ret = pci_enable_msi_block(dal_dev[lchip].pci_dev, irq_num); +#else + ret = -1; +#endif + if (ret) + { + printk ("msi enable failed!!! lchip = %d, irq_num = %d\n", lchip, irq_num); + pci_disable_msi(dal_dev[lchip].pci_dev); + msi_used = 0; + } + + msi_irq_base[lchip] = dal_dev[lchip].pci_dev->irq; + msi_irq_num[lchip] = irq_num; + } + + return ret; +} + +static int +_dal_set_msi_disable(unsigned int lchip) +{ + + pci_disable_msi(dal_dev[lchip].pci_dev); + + msi_irq_base[lchip] = 0; + msi_irq_num[lchip] = 0; + + return 0; +} + +int +dal_set_msi_cap(unsigned long arg) +{ + int ret = 0; + int index = 0; + dal_msi_info_t msi_info; + + if (copy_from_user(&msi_info, (void*)arg, sizeof(dal_msi_info_t))) + { + return -EFAULT; + } + + printk("####dal_set_msi_cap lchip %d base %d num:%d\n", msi_info.lchip, msi_info.irq_base, msi_info.irq_num); + if (msi_info.irq_num > 0) + { + if (0 == msi_used) + { + msi_used = 1; + ret = _dal_set_msi_enabe(msi_info.lchip, msi_info.irq_num); + } + else if ((1 == msi_used) && (msi_info.irq_num != msi_irq_num[msi_info.lchip])) + { + for (index = 0; index < msi_irq_num[msi_info.lchip]; index++) + { + dal_interrupt_unregister(msi_irq_base[msi_info.lchip]+index); + } + _dal_set_msi_disable(msi_info.lchip); + msi_used = 1; + ret = _dal_set_msi_enabe(msi_info.lchip, msi_info.irq_num); + } + } + else + { + msi_used = 0; + ret = _dal_set_msi_disable(msi_info.lchip); + } + + return ret; +} + +int +dal_user_interrupt_register(unsigned long arg) +{ + int irq = 0; + if (copy_from_user(&irq, (void*)arg, sizeof(int))) + { + return -EFAULT; + } + printk("####register interrupt irq:%d\n", irq); + return dal_interrupt_register(irq, 0, NULL, NULL); +} + +int +dal_user_interrupt_unregister(unsigned long arg) +{ + int irq = 0; + if (copy_from_user(&irq, (void*)arg, sizeof(int))) + { + return -EFAULT; + } + printk("####unregister interrupt irq:%d\n", irq); + return dal_interrupt_unregister(irq); +} + +int +dal_user_interrupt_set_en(unsigned long arg) +{ + dal_intr_parm_t dal_intr_parm; + + if (copy_from_user(&dal_intr_parm, (void*)arg, sizeof(dal_intr_parm_t))) + { + return -EFAULT; + } + + return dal_interrupt_set_en(dal_intr_parm.irq, dal_intr_parm.enable); +} + +/* + * Function: _dal_dma_segment_free + */ + +/* + * Function: _find_largest_segment + * + * Purpose: + * Find largest contiguous segment from a pool of DMA blocks. + * Parameters: + * dseg - DMA segment descriptor + * Returns: + * 0 on success, < 0 on error. + * Notes: + * Assembly stops if a segment of the requested segment size + * has been obtained. + * + * Lower address bits of the DMA blocks are used as follows: + * 0: Untagged + * 1: Discarded block + * 2: Part of largest contiguous segment + * 3: Part of current contiguous segment + */ +#ifndef DMA_MEM_MODE_PLATFORM +static int +_dal_find_largest_segment(dma_segment_t* dseg) +{ + int i, j, blks, found; + unsigned long seg_begin; + unsigned long seg_end; + unsigned long seg_tmp; + + blks = dseg->blk_cnt; + + /* Clear all block tags */ + for (i = 0; i < blks; i++) + { + dseg->blk_ptr[i] &= ~3; + } + + for (i = 0; i < blks && dseg->seg_size < dseg->req_size; i++) + { + /* First block must be an untagged block */ + if ((dseg->blk_ptr[i] & 3) == DAL_UNTAG_BLOCK) + { + /* Initial segment size is the block size */ + seg_begin = dseg->blk_ptr[i]; + seg_end = seg_begin + dseg->blk_size; + dseg->blk_ptr[i] |= DAL_CUR_MATCH_BLOCk; + + /* Loop looking for adjacent blocks */ + do + { + found = 0; + + for (j = i + 1; j < blks && (seg_end - seg_begin) < dseg->req_size; j++) + { + seg_tmp = dseg->blk_ptr[j]; + /* Check untagged blocks only */ + if ((seg_tmp & 3) == DAL_UNTAG_BLOCK) + { + if (seg_tmp == (seg_begin - dseg->blk_size)) + { + /* Found adjacent block below current segment */ + dseg->blk_ptr[j] |= DAL_CUR_MATCH_BLOCk; + seg_begin = seg_tmp; + found = 1; + } + else if (seg_tmp == seg_end) + { + /* Found adjacent block above current segment */ + dseg->blk_ptr[j] |= DAL_CUR_MATCH_BLOCk; + seg_end += dseg->blk_size; + found = 1; + } + } + } + } + while (found); + + if ((seg_end - seg_begin) > dseg->seg_size) + { + /* The current block is largest so far */ + dseg->seg_begin = seg_begin; + dseg->seg_end = seg_end; + dseg->seg_size = seg_end - seg_begin; + + /* Re-tag current and previous largest segment */ + for (j = 0; j < blks; j++) + { + if ((dseg->blk_ptr[j] & 3) == DAL_CUR_MATCH_BLOCk) + { + /* Tag current segment as the largest */ + dseg->blk_ptr[j] &= ~1; + } + else if ((dseg->blk_ptr[j] & 3) == DAL_MATCHED_BLOCK) + { + /* Discard previous largest segment */ + dseg->blk_ptr[j] ^= 3; + } + } + } + else + { + /* Discard all blocks in current segment */ + for (j = 0; j < blks; j++) + { + if ((dseg->blk_ptr[j] & 3) == DAL_CUR_MATCH_BLOCk) + { + dseg->blk_ptr[j] &= ~2; + } + } + } + } + } + + return 0; +} + +/* + * Function: _alloc_dma_blocks + */ +static int +_dal_alloc_dma_blocks(dma_segment_t* dseg, int blks) +{ + int i, start; + unsigned long addr; + + if (dseg->blk_cnt + blks > dseg->blk_cnt_max) + { + printk("No more DMA blocks\n"); + return -1; + } + + start = dseg->blk_cnt; + dseg->blk_cnt += blks; + + for (i = start; i < dseg->blk_cnt; i++) + { + addr = __get_free_pages(GFP_ATOMIC, dseg->blk_order); + if (addr) + { + dseg->blk_ptr[i] = addr; + } + else + { + printk("DMA allocation failed\n"); + return -1; + } + } + + return 0; +} + +/* + * Function: _dal_dma_segment_alloc + */ +static dma_segment_t* +_dal_dma_segment_alloc(unsigned int size, unsigned int blk_size) +{ + dma_segment_t* dseg; + int i, blk_ptr_size; + unsigned long page_addr; + struct sysinfo si; + + /* Sanity check */ + if (size == 0 || blk_size == 0) + { + return NULL; + } + + /* Allocate an initialize DMA segment descriptor */ + if ((dseg = kmalloc(sizeof(dma_segment_t), GFP_ATOMIC)) == NULL) + { + return NULL; + } + + memset(dseg, 0, sizeof(dma_segment_t)); + dseg->req_size = size; + dseg->blk_size = PAGE_ALIGN(blk_size); + + while ((PAGE_SIZE << dseg->blk_order) < dseg->blk_size) + { + dseg->blk_order++; + } + + si_meminfo(&si); + dseg->blk_cnt_max = (si.totalram << PAGE_SHIFT) / dseg->blk_size; + blk_ptr_size = dseg->blk_cnt_max * sizeof(unsigned long); + /* Allocate an initialize DMA block pool */ + dseg->blk_ptr = kmalloc(blk_ptr_size, GFP_KERNEL); + if (dseg->blk_ptr == NULL) + { + kfree(dseg); + return NULL; + } + + memset(dseg->blk_ptr, 0, blk_ptr_size); + /* Allocate minimum number of blocks */ + _dal_alloc_dma_blocks(dseg, dseg->req_size / dseg->blk_size); + + /* Allocate more blocks until we have a complete segment */ + do + { + _dal_find_largest_segment(dseg); + if (dseg->seg_size >= dseg->req_size) + { + break; + } + } + while (_dal_alloc_dma_blocks(dseg, 8) == 0); + + /* Reserve all pages in the DMA segment and free unused blocks */ + for (i = 0; i < dseg->blk_cnt; i++) + { + if ((dseg->blk_ptr[i] & 3) == 2) + { + dseg->blk_ptr[i] &= ~3; + + for (page_addr = dseg->blk_ptr[i]; + page_addr < dseg->blk_ptr[i] + dseg->blk_size; + page_addr += PAGE_SIZE) + { + MEM_MAP_RESERVE(VIRT_TO_PAGE((void*)page_addr)); + } + } + else if (dseg->blk_ptr[i]) + { + dseg->blk_ptr[i] &= ~3; + free_pages(dseg->blk_ptr[i], dseg->blk_order); + dseg->blk_ptr[i] = 0; + } + } + + return dseg; +} + +/* + * Function: _dal_dma_segment_free + */ +static void +_dal_dma_segment_free(dma_segment_t* dseg) +{ + int i; + unsigned long page_addr; + + if (dseg->blk_ptr) + { + for (i = 0; i < dseg->blk_cnt; i++) + { + if (dseg->blk_ptr[i]) + { + for (page_addr = dseg->blk_ptr[i]; + page_addr < dseg->blk_ptr[i] + dseg->blk_size; + page_addr += PAGE_SIZE) + { + MEM_MAP_UNRESERVE(VIRT_TO_PAGE(page_addr)); + } + + free_pages(dseg->blk_ptr[i], dseg->blk_order); + } + } + + kfree(dseg->blk_ptr); + kfree(dseg); + } +} + +/* + * Function: -dal_pgalloc + */ +static void* +_dal_pgalloc(unsigned int size) +{ + dma_segment_t* dseg; + unsigned int blk_size; + + blk_size = (size < DMA_BLOCK_SIZE) ? size : DMA_BLOCK_SIZE; + if ((dseg = _dal_dma_segment_alloc(size, blk_size)) == NULL) + { + return NULL; + } + + if (dseg->seg_size < size) + { + /* If we didn't get the full size then forget it */ + printk("Notice: Can not get enough memory for requset!!\n"); + printk("actual size:0x%lx, request size:0x%x\n", dseg->seg_size, size); + //-_dal_dma_segment_free(dseg); + //-return NULL; + } + + list_add(&dseg->list, &_dma_seg); + return (void*)dseg->seg_begin; +} + +/* + * Function: _dal_pgfree + */ +static int +_dal_pgfree(void* ptr) +{ + struct list_head* pos; + + list_for_each(pos, &_dma_seg) + { + dma_segment_t* dseg = list_entry(pos, dma_segment_t, list); + if (ptr == (void*)dseg->seg_begin) + { + list_del(&dseg->list); + _dal_dma_segment_free(dseg); + return 0; + } + } + return -1; +} +#endif +static void +dal_alloc_dma_pool(int lchip, int size) +{ + if (use_high_memory) + { + dma_phy_base[lchip] = virt_to_bus(high_memory); + dma_virt_base[lchip] = ioremap_nocache(dma_phy_base[lchip], size); + } + else + { +#ifdef DMA_MEM_MODE_PLATFORM + dma_virt_base[lchip] = dma_alloc_coherent(&(dal_dev[lchip].pci_dev->dev), dma_mem_size, + &dma_phy_base[lchip], GFP_KERNEL); + + printk(KERN_WARNING "########Using DMA_MEM_MODE_PLATFORM \n"); +#endif + +#ifndef DMA_MEM_MODE_PLATFORM + /* Get DMA memory from kernel */ + dma_virt_base_tmp[lchip] = _dal_pgalloc(size); + dma_phy_base[lchip] = virt_to_bus(dma_virt_base_tmp[lchip]); + dma_virt_base [lchip]= ioremap_nocache(dma_phy_base[lchip], size); +#endif + } +} + +static void +dal_free_dma_pool(int lchip) +{ + int ret = 0; + ret = ret; + if (use_high_memory) + { + iounmap(dma_virt_base[lchip]); + } + else + { +#ifdef DMA_MEM_MODE_PLATFORM + dma_free_coherent(&(dal_dev[lchip].pci_dev->dev), dma_mem_size, + dma_virt_base[lchip], dma_phy_base[lchip]); +#endif + +#ifndef DMA_MEM_MODE_PLATFORM + iounmap(dma_virt_base[lchip]); + ret = _dal_pgfree(dma_virt_base_tmp[lchip]); + if(ret<0) + { + printk("Dma free memory fail !!!!!! \n"); + } +#endif + } +} + +#define _KERNEL_DAL_IO +static int +_dal_pci_read(unsigned char lchip, unsigned int offset, unsigned int* value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + *value = *(volatile unsigned int*)(dal_dev[lchip].logic_address + offset); + return 0; +} + +int +dal_create_irq_mapping(unsigned long arg) +{ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) + +#ifndef NO_IRQ +#define NO_IRQ (-1) +#endif + dal_irq_mapping_t irq_map; + + if (copy_from_user(&irq_map, (void*)arg, sizeof(dal_irq_mapping_t))) + { + return -EFAULT; + } + + irq_map.sw_irq = irq_create_mapping(NULL, irq_map.hw_irq); + if (irq_map.sw_irq == NO_IRQ) + { + printk("IRQ mapping fail !!!!!! \n"); + return -1; + } + + if (copy_to_user((dal_irq_mapping_t*)arg, (void*)&irq_map, sizeof(dal_irq_mapping_t))) + { + return -EFAULT; + } +#endif + return 0; +} + +int +dal_pci_read(unsigned long arg) +{ + dal_chip_parm_t cmdpara_chip; + + if (copy_from_user(&cmdpara_chip, (void*)arg, sizeof(dal_chip_parm_t))) + { + return -EFAULT; + } + + _dal_pci_read((unsigned char)cmdpara_chip.lchip, (unsigned int)cmdpara_chip.reg_addr, + (unsigned int*)(&(cmdpara_chip.value))); + + if (copy_to_user((dal_chip_parm_t*)arg, (void*)&cmdpara_chip, sizeof(dal_chip_parm_t))) + { + return -EFAULT; + } + + return 0; +} + +static int +_dal_pci_write(unsigned char lchip, unsigned int offset, unsigned int value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + *(volatile unsigned int*)(dal_dev[lchip].logic_address + offset) = value; + return 0; +} + +int +dal_pci_write(unsigned long arg) +{ + dal_chip_parm_t cmdpara_chip; + + if (copy_from_user(&cmdpara_chip, (void*)arg, sizeof(dal_chip_parm_t))) + { + return -EFAULT; + } + + _dal_pci_write((unsigned char)cmdpara_chip.lchip, (unsigned int)cmdpara_chip.reg_addr, + (unsigned int)cmdpara_chip.value); + + return 0; +} + +int +dal_pci_conf_read(unsigned char lchip, unsigned int offset, unsigned int* value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + pci_read_config_dword(dal_dev[lchip].pci_dev, offset, value); + return 0; +} + +int +dal_pci_conf_write(unsigned char lchip, unsigned int offset, unsigned int value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + pci_write_config_dword(dal_dev[lchip].pci_dev, offset, value); + return 0; +} +int +dal_user_read_pci_conf(unsigned long arg) +{ + dal_pci_cfg_ioctl_t dal_cfg; + + if (copy_from_user(&dal_cfg, (void*)arg, sizeof(dal_pci_cfg_ioctl_t))) + { + return -EFAULT; + } + + if (dal_pci_conf_read(dal_cfg.lchip, dal_cfg.offset, &dal_cfg.value)) + { + printk("dal_pci_conf_read failed.\n"); + return -EFAULT; + } + + if (copy_to_user((dal_pci_cfg_ioctl_t*)arg, (void*)&dal_cfg, sizeof(dal_pci_cfg_ioctl_t))) + { + return -EFAULT; + } + + return 0; +} + +int +dal_user_write_pci_conf(unsigned long arg) +{ + dal_pci_cfg_ioctl_t dal_cfg; + + if (copy_from_user(&dal_cfg, (void*)arg, sizeof(dal_pci_cfg_ioctl_t))) + { + return -EFAULT; + } + + return dal_pci_conf_write(dal_cfg.lchip, dal_cfg.offset, dal_cfg.value); +} + +static int +linux_get_device(unsigned long arg) +{ + dal_user_dev_t user_dev; + int lchip = 0; + + if (copy_from_user(&user_dev, (void*)arg, sizeof(user_dev))) + { + return -EFAULT; + } + + user_dev.chip_num = dal_chip_num; + lchip = user_dev.lchip; + + if (lchip < dal_chip_num) + { + user_dev.phy_base0 = (unsigned int)dal_dev[lchip].phys_address; + user_dev.phy_base1 = (unsigned int)(dal_dev[lchip].phys_address >> 32); + + user_dev.bus_no = dal_dev[lchip].pci_dev->bus->number; + user_dev.dev_no = dal_dev[lchip].pci_dev->device; + user_dev.fun_no = dal_dev[lchip].pci_dev->devfn; + } + + if (copy_to_user((dal_user_dev_t*)arg, (void*)&user_dev, sizeof(user_dev))) + { + return -EFAULT; + } + + return 0; +} + +/* set dal version, copy to user */ +static int +linux_get_dal_version(unsigned long arg) +{ + int dal_ver = VERSION_1DOT2; /* set dal version */ + + if (copy_to_user((int*)arg, (void*)&dal_ver, sizeof(dal_ver))) + { + return -EFAULT; + } + + dal_version = dal_ver; /* up sw */ + + return 0; +} + +static int +linux_get_dma_info(unsigned long arg) +{ + dma_info_t dma_para; + + if (copy_from_user(&dma_para, (void*)arg, sizeof(dma_info_t))) + { + return -EFAULT; + } + + dma_para.phy_base = (unsigned int)dma_phy_base[dma_para.lchip]; + dma_para.phy_base_hi = dma_phy_base[dma_para.lchip] >> 32; + dma_para.size = dma_mem_size; + + if (copy_to_user((dma_info_t*)arg, (void*)&dma_para, sizeof(dma_info_t))) + { + return -EFAULT; + } + + return 0; +} + +static int +dal_get_msi_info(unsigned long arg) +{ + dal_msi_info_t msi_para; + unsigned int lchip = 0; + + /* get lchip form user mode */ + if (copy_from_user(&msi_para, (void*)arg, sizeof(dal_msi_info_t))) + { + return -EFAULT; + } + lchip = msi_para.lchip; + + msi_para.irq_base = msi_irq_base[lchip]; + msi_para.irq_num = msi_irq_num[lchip]; + + /* send msi info to user mode */ + if (copy_to_user((dal_msi_info_t*)arg, (void*)&msi_para, sizeof(dal_msi_info_t))) + { + return -EFAULT; + } + + return 0; +} + + +static int +dal_get_intr_info(unsigned long arg) +{ + dal_intr_info_t intr_para; + unsigned int intr_num = 0; + + /* get lchip form user mode */ + if (copy_from_user(&intr_para, (void*)arg, sizeof(dal_intr_info_t))) + { + return -EFAULT; + } + + intr_para.irq_idx = CTC_MAX_INTR_NUM; + for (intr_num=0; intr_num< CTC_MAX_INTR_NUM; intr_num++) + { + if (intr_para.irq == dal_isr[intr_num].irq) + { + intr_para.irq_idx = intr_num; + break; + } + } + + if (CTC_MAX_INTR_NUM == intr_para.irq_idx) + { + printk("Interrupt %d cann't find.\n", intr_para.irq); + } + /* send msi info to user mode */ + if (copy_to_user((dal_intr_info_t*)arg, (void*)&intr_para, sizeof(dal_intr_info_t))) + { + return -EFAULT; + } + + return 0; +} + +static int +dal_cache_inval(unsigned long arg) +{ + dal_dma_cache_info_t intr_para; + + if (copy_from_user(&intr_para, (void*)arg, sizeof(dal_dma_cache_info_t))) + { + return -EFAULT; + } + +#if 0 + dma_cache_wback_inv((unsigned long)intr_para.ptr, intr_para.length); +#endif + +#if 0 + dma_sync_single_for_cpu(NULL, intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); + + + dma_cache_sync(NULL, (void*)intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); +#endif + return 0; +} + +static int +dal_cache_flush(unsigned long arg) +{ + dal_dma_cache_info_t intr_para; + + if (copy_from_user(&intr_para, (void*)arg, sizeof(dal_dma_cache_info_t))) + { + return -EFAULT; + } + +#if 0 + dma_cache_wback_inv(intr_para.ptr, intr_para.length); +#endif + +#if 0 + dma_sync_single_for_cpu(NULL, intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); + + + dma_cache_sync(NULL, (void*)intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); +#endif + return 0; +} + +int +linux_dal_probe(struct pci_dev* pdev, const struct pci_device_id* id) +{ + dal_kern_dev_t* dev = NULL; + int bar = 0; + int ret = 0; + unsigned int temp = 0; + unsigned int lchip = 0; + + printk(KERN_WARNING "********found dal device*****\n"); + + for (lchip = 0; lchip < DAL_MAX_CHIP_NUM; lchip ++) + { + if (NULL == dal_dev[lchip].pci_dev) + { + break; + } + } + + if (lchip >= DAL_MAX_CHIP_NUM) + { + printk("Exceed max local chip num\n"); + return -1; + } + + dev = &dal_dev[lchip]; + if (NULL == dev) + { + printk("Cannot obtain PCI resources\n"); + } + + lchip = lchip; + dal_chip_num += 1; + + dev->pci_dev = pdev; + + if (pci_enable_device(pdev) < 0) + { + printk("Cannot enable PCI device: vendor id = %x, device id = %x\n", + pdev->vendor, pdev->device); + } + + ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); + if (ret) + { + ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); + if (ret) + { + printk("Could not set PCI DMA Mask\n"); + return ret; + } + } + + if (pci_request_regions(pdev, DAL_NAME) < 0) + { + printk("Cannot obtain PCI resources\n"); + } + + dev->phys_address = pci_resource_start(pdev, bar); + dev->logic_address = (uintptr)ioremap_nocache(dev->phys_address, + pci_resource_len(dev->pci_dev, bar)); + + _dal_pci_read(lchip, 0x48, &temp); + if (((temp >> 8) & 0xffff) == 0x3412) + { + printk("Little endian Cpu detected!!! \n"); + _dal_pci_write(lchip, 0x48, 0xFFFFFFFF); + } + + pci_set_master(pdev); + + /* alloc dma_mem_size for every chip */ + if (dma_mem_size) + { + dal_alloc_dma_pool(lchip, dma_mem_size); + + /*add check Dma memory pool cannot cross 4G space*/ + if ((0==(dma_phy_base[lchip]>>32)) && (0!=((dma_phy_base[lchip]+dma_mem_size)>>32))) + { + printk("Dma malloc memory cross 4G space!!!!!! \n"); + return -1; + } + } + + printk(KERN_WARNING "linux_dal_probe end*****\n"); + + return 0; +} + +void +linux_dal_remove(struct pci_dev* pdev) +{ + unsigned int lchip = 0; + unsigned int flag = 0; + + for (lchip = 0; lchip < DAL_MAX_CHIP_NUM; lchip ++) + { + if (pdev == dal_dev[lchip].pci_dev) + { + flag = 1; + break; + } + } + + if (1 == flag) + { + dal_free_dma_pool(lchip); + pci_release_regions(pdev); + pci_disable_device(pdev); + + dal_dev[lchip].pci_dev = NULL; + dal_chip_num--; + } + + +} + +#ifdef CONFIG_COMPAT +static long +linux_dal_ioctl(struct file* file, + unsigned int cmd, unsigned long arg) +#else + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) +static int +linux_dal_ioctl(struct file* file, + unsigned int cmd, unsigned long arg) +#else +static int +linux_dal_ioctl(struct inode* inode, struct file* file, + unsigned int cmd, unsigned long arg) +#endif + +#endif +{ + switch (cmd) + { + + case CMD_READ_CHIP: + return dal_pci_read(arg); + + case CMD_WRITE_CHIP: + return dal_pci_write(arg); + + case CMD_GET_DEVICES: + return linux_get_device(arg); + + case CMD_GET_DAL_VERSION: + return linux_get_dal_version(arg); + + case CMD_GET_DMA_INFO: + return linux_get_dma_info(arg); + + case CMD_PCI_CONFIG_READ: + return dal_user_read_pci_conf(arg); + + case CMD_PCI_CONFIG_WRITE: + return dal_user_write_pci_conf(arg); + + case CMD_REG_INTERRUPTS: + return dal_user_interrupt_register(arg); + + case CMD_UNREG_INTERRUPTS: + return dal_user_interrupt_unregister(arg); + + case CMD_EN_INTERRUPTS: + return dal_user_interrupt_set_en(arg); + + case CMD_SET_MSI_CAP: + return dal_set_msi_cap(arg); + + case CMD_GET_MSI_INFO: + return dal_get_msi_info(arg); + + case CMD_IRQ_MAPPING: + return dal_create_irq_mapping(arg); + + case CMD_GET_INTR_INFO: + return dal_get_intr_info(arg); + + case CMD_CACHE_INVAL: + return dal_cache_inval(arg); + + case CMD_CACHE_FLUSH: + return dal_cache_flush(arg); + + default: + break; + } + + return 0; +} + +static unsigned int +linux_dal_poll0(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[0], p); + local_irq_save(flags); + if (poll_intr_trigger[0]) + { + poll_intr_trigger[0] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll1(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[1], p); + local_irq_save(flags); + if (poll_intr_trigger[1]) + { + poll_intr_trigger[1] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll2(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[2], p); + local_irq_save(flags); + if (poll_intr_trigger[2]) + { + poll_intr_trigger[2] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll3(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[3], p); + local_irq_save(flags); + if (poll_intr_trigger[3]) + { + poll_intr_trigger[3] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll4(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[4], p); + local_irq_save(flags); + if (poll_intr_trigger[4]) + { + poll_intr_trigger[4] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll5(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[5], p); + local_irq_save(flags); + if (poll_intr_trigger[5]) + { + poll_intr_trigger[5] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll6(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[6], p); + local_irq_save(flags); + if (poll_intr_trigger[6]) + { + poll_intr_trigger[6] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll7(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[7], p); + local_irq_save(flags); + if (poll_intr_trigger[7]) + { + poll_intr_trigger[7] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static struct pci_driver linux_dal_driver = +{ + .name = DAL_NAME, + .id_table = dal_id_table, + .probe = linux_dal_probe, + .remove = linux_dal_remove, +}; + +static struct file_operations fops = +{ + .owner = THIS_MODULE, +#ifdef CONFIG_COMPAT + .compat_ioctl = linux_dal_ioctl, + .unlocked_ioctl = linux_dal_ioctl, +#else +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) + .unlocked_ioctl = linux_dal_ioctl, +#else + .ioctl = linux_dal_ioctl, +#endif +#endif +}; + + +static int __init +linux_dal_init(void) +{ + int ret = 0; + + /* Get DMA memory pool size form dal.ok input param, or use default dma_mem_size */ + if (dma_pool_size) + { + if ((dma_pool_size[strlen(dma_pool_size) - 1] & ~0x20) == 'M') + { + dma_mem_size = simple_strtoul(dma_pool_size, NULL, 0); + printk("dma_mem_size: 0x%x \n", dma_mem_size); + + dma_mem_size *= MB_SIZE; + } + else + { + printk("DMA memory pool size must be specified as e.g. dma_pool_size=8M\n"); + } + + if (dma_mem_size & (dma_mem_size - 1)) + { + printk("dma_mem_size must be a power of 2 (1M, 2M, 4M, 8M etc.)\n"); + dma_mem_size = 0; + } + } + + ret = register_chrdev(DAL_DEV_MAJOR, DAL_NAME, &fops); + if (ret < 0) + { + printk(KERN_WARNING "Register linux_dal device, ret %d\n", ret); + return ret; + } + + ret = pci_register_driver(&linux_dal_driver); + if (ret < 0) + { + printk(KERN_WARNING "Register ASIC PCI driver failed, ret %d\n", ret); + return ret; + } + + /* alloc /dev/linux_dal node */ + dal_class = class_create(THIS_MODULE, DAL_NAME); + device_create(dal_class, NULL, MKDEV(DAL_DEV_MAJOR, 0), NULL, DAL_NAME); + + /* init interrupt function */ + intr_handler_fun[0] = intr0_handler; + intr_handler_fun[1] = intr1_handler; + intr_handler_fun[2] = intr2_handler; + intr_handler_fun[3] = intr3_handler; + intr_handler_fun[4] = intr4_handler; + intr_handler_fun[5] = intr5_handler; + intr_handler_fun[6] = intr6_handler; + intr_handler_fun[7] = intr7_handler; + + return ret; +} + +static void __exit +linux_dal_exit(void) +{ + device_destroy(dal_class, MKDEV(DAL_DEV_MAJOR, 0)); + class_destroy(dal_class); + unregister_chrdev(DAL_DEV_MAJOR, "linux_dal"); + pci_unregister_driver(&linux_dal_driver); +} + +module_init(linux_dal_init); +module_exit(linux_dal_exit); + + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_kernel.h b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_kernel.h new file mode 100644 index 00000000000..850a4cffa73 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_kernel.h @@ -0,0 +1,171 @@ +/** + @file dal_kernel_io.h + + @author Copyright (C) 2012 Centec Networks Inc. All rights reserved. + + @date 2012-4-9 + + @version v2.0 + +*/ +#ifndef _DAL_KERNEL_H_ +#define _DAL_KERNEL_H_ +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(CONFIG_RESOURCES_64BIT) || defined(CONFIG_PHYS_ADDR_T_64BIT) +#define PHYS_ADDR_IS_64BIT +#endif + +#ifndef SDK_IN_USERMODE +#ifdef PHYS_ADDR_IS_64BIT +typedef long long intptr; +typedef unsigned long long uintptr; +#else +typedef int intptr; +typedef unsigned int uintptr; +#endif +#endif + +#define DAL_PCI_READ_ADDR 0x0 +#define DAL_PCI_READ_DATA 0xc +#define DAL_PCI_WRITE_ADDR 0x8 +#define DAL_PCI_WRITE_DATA 0x4 +#define DAL_PCI_STATUS 0x10 + +#define DAL_PCI_STATUS_IN_PROCESS 31 +#define DAL_PCI_STATUS_BAD_PARITY 5 +#define DAL_PCI_STATUS_CPU_ACCESS_ERR 4 +#define DAL_PCI_STATUS_READ_CMD 3 +#define DAL_PCI_STATUS_REGISTER_ERR 1 +#define DAL_PCI_STATUS_REGISTER_ACK 0 + +#define DAL_PCI_ACCESS_TIMEOUT 0x64 + +#define DAL_NAME "linux_dal" /* "linux_dal" */ + +#define DAL_DEV_MAJOR 198 + +#define DAL_DEV_INTR_MAJOR_BASE 200 + +#define DAL_DEV_NAME "/dev/" DAL_NAME +#define DAL_ONE_KB 1024 +#define DAL_ONE_MB (1024*1024) +struct dal_chip_parm_s +{ + unsigned int lchip; /*tmp should be uint8*/ + unsigned int fpga_id; /*tmp add*/ + unsigned int reg_addr; + unsigned int value; +}; +typedef struct dal_chip_parm_s dal_chip_parm_t; + +struct dal_intr_parm_s +{ + unsigned int irq; + unsigned int enable; +}; +typedef struct dal_intr_parm_s dal_intr_parm_t; + +struct dal_irq_mapping_s +{ + unsigned int hw_irq; + unsigned int sw_irq; +}; +typedef struct dal_irq_mapping_s dal_irq_mapping_t; + +struct dal_user_dev_s +{ + unsigned int chip_num; /*output: local chip number*/ + unsigned int lchip; /*input: local chip id*/ + unsigned int phy_base0; /* low 32bits physical base address */ + unsigned int phy_base1; /* high 32bits physical base address */ + unsigned int bus_no; + unsigned int dev_no; + unsigned int fun_no; + void* virt_base[2]; /* Virtual base address; this must be last member */ +}; +typedef struct dal_user_dev_s dal_user_dev_t; + +struct dma_info_s +{ + unsigned int lchip; + unsigned int phy_base; + unsigned int phy_base_hi; + unsigned int size; + unsigned int* virt_base; +}; +typedef struct dma_info_s dma_info_t; + +struct dal_pci_cfg_ioctl_s +{ + unsigned int lchip; /* Device ID */ + unsigned int offset; + unsigned int value; +}; +typedef struct dal_pci_cfg_ioctl_s dal_pci_cfg_ioctl_t; + +struct dal_msi_info_s +{ + unsigned int lchip; + unsigned int irq_base; + unsigned int irq_num; +}; +typedef struct dal_msi_info_s dal_msi_info_t; + +struct dal_intr_info_s +{ + unsigned int irq; + unsigned int irq_idx; +}; +typedef struct dal_intr_info_s dal_intr_info_t; + +struct dal_dma_cache_info_s +{ + unsigned long ptr; + unsigned int length; +}; +typedef struct dal_dma_cache_info_s dal_dma_cache_info_t; + +#define CMD_MAGIC 'C' +#define CMD_WRITE_CHIP _IO(CMD_MAGIC, 0) /* for humber ioctrol*/ +#define CMD_READ_CHIP _IO(CMD_MAGIC, 1) /* for humber ioctrol*/ +#define CMD_GET_DEVICES _IO(CMD_MAGIC, 2) +#define CMD_GET_DAL_VERSION _IO(CMD_MAGIC, 3) +#define CMD_PCI_CONFIG_WRITE _IO(CMD_MAGIC, 4) +#define CMD_PCI_CONFIG_READ _IO(CMD_MAGIC, 5) +#define CMD_GET_DMA_INFO _IO(CMD_MAGIC, 6) +#define CMD_REG_INTERRUPTS _IO(CMD_MAGIC, 7) +#define CMD_UNREG_INTERRUPTS _IO(CMD_MAGIC, 8) +#define CMD_EN_INTERRUPTS _IO(CMD_MAGIC, 9) +#define CMD_I2C_READ _IO(CMD_MAGIC, 10) +#define CMD_I2C_WRITE _IO(CMD_MAGIC, 11) +#define CMD_GET_MSI_INFO _IO(CMD_MAGIC, 12) +#define CMD_SET_MSI_CAP _IO(CMD_MAGIC, 13) +#define CMD_IRQ_MAPPING _IO(CMD_MAGIC, 14) +#define CMD_GET_INTR_INFO _IO(CMD_MAGIC, 15) +#define CMD_CACHE_INVAL _IO(CMD_MAGIC, 16) +#define CMD_CACHE_FLUSH _IO(CMD_MAGIC, 17) + +enum dal_version_e +{ + VERSION_MIN, + VERSION_1DOT0, + VERSION_1DOT1, + VERSION_1DOT2, + + VERSION_MAX +}; +typedef enum dal_version_e dal_version_t; + +/* We try to assemble a contiguous segment from chunks of this size */ +#define DMA_BLOCK_SIZE (512 * DAL_ONE_KB) + +#ifdef __cplusplus +} +#endif + +#endif + + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_mpool.c b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_mpool.c new file mode 100644 index 00000000000..5aca222a138 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_mpool.c @@ -0,0 +1,350 @@ +#include "dal_mpool.h" + +#ifdef __KERNEL__ +#include +#include + +#define DAL_MALLOC(x) kmalloc(x, GFP_ATOMIC) +#define DAL_FREE(x) kfree(x) + +static spinlock_t dal_mpool_lock; +#define MPOOL_LOCK_INIT() spin_lock_init(&dal_mpool_lock) +#define MPOOL_LOCK() unsigned long flags; spin_lock_irqsave(&dal_mpool_lock, flags) +#define MPOOL_UNLOCK() spin_unlock_irqrestore(&dal_mpool_lock, flags) +#define DAL_PRINT(fmt,arg...) printk(fmt,##arg) +#else /* !__KERNEL__*/ + +#include +#include "sal.h" +#define DAL_MALLOC(x) malloc(x) +#define DAL_FREE(x) free(x) +static sal_mutex_t* dal_mpool_lock; +#define MPOOL_LOCK_INIT() sal_mutex_create(&dal_mpool_lock) +#define MPOOL_LOCK() sal_mutex_lock(dal_mpool_lock) +#define MPOOL_UNLOCK() sal_mutex_unlock(dal_mpool_lock) +#define DAL_PRINT(fmt,arg...) sal_printf(fmt,##arg) + +#endif /* __KERNEL__ */ + + + +dal_mpool_mem_t* g_free_block_ptr = NULL; + +/* System cache line size */ +#ifndef DAL_CACHE_LINE_BYTES +#define DAL_CACHE_LINE_BYTES 256 +#endif + +#define DAL_MAX_CHIP_NUM 32 +static dal_mpool_mem_t* p_desc_pool[DAL_MAX_CHIP_NUM] = {0}; +static dal_mpool_mem_t* p_data_pool[DAL_MAX_CHIP_NUM] = {0}; + +int +dal_mpool_init(void) +{ + MPOOL_LOCK_INIT(); + return 0; +} + +dal_mpool_mem_t* +_dal_mpool_create(void* base, int size, int type) +{ + dal_mpool_mem_t* head = NULL; + dal_mpool_mem_t* tail = NULL; + + head = (dal_mpool_mem_t*)DAL_MALLOC(sizeof(dal_mpool_mem_t)); + if (head == NULL) + { + return NULL; + } + + tail = (dal_mpool_mem_t*)DAL_MALLOC(sizeof(dal_mpool_mem_t)); + if (tail == NULL) + { + DAL_FREE(head); + return NULL; + } + + head->size = tail->size = 0; + head->type = type; + head->address = base; + tail->address = head->address + size; + head->next = tail; + tail->next = NULL; + + return head; +} + +dal_mpool_mem_t* +dal_mpool_create(unsigned char lchip, void* base, int size) +{ + dal_mpool_mem_t* head = NULL; + int mod = (int)(((unsigned long)base) & (DAL_CACHE_LINE_BYTES - 1)); + + MPOOL_LOCK(); + + if (mod) + { + base = (char*)base + (DAL_CACHE_LINE_BYTES - mod); + size -= (DAL_CACHE_LINE_BYTES - mod); + } + + size &= ~(DAL_CACHE_LINE_BYTES - 1); + + /* init for common linkptr, only used for GB */ + head = _dal_mpool_create(base, size, DAL_MPOOL_TYPE_USELESS); + if (NULL == head) + { + MPOOL_UNLOCK(); + return NULL; + } + + /* init for desc linkptr */ + p_desc_pool[lchip] = _dal_mpool_create(base, DAL_MPOOL_MAX_DESX_SIZE, DAL_MPOOL_TYPE_DESC); + if (NULL == p_desc_pool[lchip]) + { + MPOOL_UNLOCK(); + DAL_FREE(head->next); + DAL_FREE(head); + return NULL; + } + + /* init for data linkptr */ + p_data_pool[lchip] = _dal_mpool_create(((char*)base+DAL_MPOOL_MAX_DESX_SIZE), (size - DAL_MPOOL_MAX_DESX_SIZE), DAL_MPOOL_TYPE_DATA); + if (NULL == p_data_pool[lchip]) + { + MPOOL_UNLOCK(); + DAL_FREE(head->next); + DAL_FREE(head); + DAL_FREE(p_desc_pool[lchip]->next); + DAL_FREE(p_desc_pool[lchip]); + return NULL; + } + + MPOOL_UNLOCK(); + + return head; +} + +dal_mpool_mem_t* +_dal_mpool_alloc_comon(dal_mpool_mem_t* ptr, int size, int type) +{ + dal_mpool_mem_t* new_ptr = NULL; + + while (ptr && ptr->next) + { + if (ptr->next->address - (ptr->address + ptr->size) >= size) + { + break; + } + + ptr = ptr->next; + } + + if (!(ptr && ptr->next)) + { + return NULL; + } + + new_ptr = DAL_MALLOC(sizeof(dal_mpool_mem_t)); + if (!new_ptr) + { + return NULL; + } + + new_ptr->type = type; + new_ptr->address = ptr->address + ptr->size; + new_ptr->size = size; + new_ptr->next = ptr->next; + ptr->next = new_ptr; + + return new_ptr; +} + +void* +dal_mpool_alloc(unsigned char lchip, dal_mpool_mem_t* pool, int size, int type) +{ + dal_mpool_mem_t* ptr = NULL; + dal_mpool_mem_t* new_ptr = NULL; + int mod; + + MPOOL_LOCK(); + + mod = size & (DAL_CACHE_LINE_BYTES - 1); + if (mod != 0) + { + size += (DAL_CACHE_LINE_BYTES - mod); + } + + switch(type) + { + case DAL_MPOOL_TYPE_USELESS: + ptr = pool; + new_ptr = _dal_mpool_alloc_comon(ptr, size, type); + if (NULL == new_ptr) + { + MPOOL_UNLOCK(); + return NULL; + } + break; + case DAL_MPOOL_TYPE_DESC: + ptr = p_desc_pool[lchip]; + new_ptr = _dal_mpool_alloc_comon(ptr, size, type); + if (NULL == new_ptr) + { + MPOOL_UNLOCK(); + return NULL; + } + break; + case DAL_MPOOL_TYPE_DATA: + ptr = p_data_pool[lchip]; + new_ptr = _dal_mpool_alloc_comon(ptr, size, type); + if (NULL == new_ptr) + { + MPOOL_UNLOCK(); + return NULL; + } + break; + default: + MPOOL_UNLOCK(); + return NULL; + break; + } + + MPOOL_UNLOCK(); + if( NULL == new_ptr ) + { + return NULL; + } + + return new_ptr->address; +} + +void +_dal_mpool_free(dal_mpool_mem_t* ptr, void* addr, int type) +{ + unsigned char* address = (unsigned char*)addr; + dal_mpool_mem_t* prev = NULL; + + while (ptr && ptr->next) + { + if (ptr->next->address == address) + { + break; + } + + ptr = ptr->next; + } + + if (ptr && ptr->next) + { + prev = ptr; + ptr = ptr->next; + prev->next = ptr->next; + DAL_FREE(ptr); + } + + return; +} + +void +dal_mpool_free(unsigned char lchip, dal_mpool_mem_t* pool, void* addr) +{ + dal_mpool_mem_t* ptr = pool; + + MPOOL_LOCK(); + + switch(pool->type) + { + case DAL_MPOOL_TYPE_USELESS: + ptr = pool; + _dal_mpool_free(ptr, addr, DAL_MPOOL_TYPE_USELESS); + break; + case DAL_MPOOL_TYPE_DESC: + ptr = p_desc_pool[lchip]; + _dal_mpool_free(ptr, addr, DAL_MPOOL_TYPE_DESC); + break; + case DAL_MPOOL_TYPE_DATA: + ptr = p_data_pool[lchip]; + _dal_mpool_free(ptr, addr, DAL_MPOOL_TYPE_DATA); + break; + default: + break; + } + + MPOOL_UNLOCK(); + return; +} + +int +dal_mpool_destroy(unsigned char lchip, dal_mpool_mem_t* pool) +{ + dal_mpool_mem_t* ptr, * next; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = next) + { + next = ptr->next; + DAL_FREE(ptr); + } + + for (ptr = p_desc_pool[lchip]; ptr; ptr = next) + { + next = ptr->next; + DAL_FREE(ptr); + } + + for (ptr = p_data_pool[lchip]; ptr; ptr = next) + { + next = ptr->next; + DAL_FREE(ptr); + } + + MPOOL_UNLOCK(); + + return 0; +} + +int +dal_mpool_usage(dal_mpool_mem_t* pool, int type) +{ + int usage = 0; + dal_mpool_mem_t* ptr; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = ptr->next) + { + if (ptr->type == type || ptr->type == -1) + { + usage += ptr->size; + } + } + + MPOOL_UNLOCK(); + + return usage; +} + +int +dal_mpool_debug(dal_mpool_mem_t* pool) +{ + dal_mpool_mem_t* ptr; + int index = 0; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = ptr->next) + { +// DAL_PRINT("%2dst mpool block: address=0x%8x, size=0x%x \n", index, (unsigned int)ptr->address, ptr->size); + DAL_PRINT("%2dst mpool block: address=%p, size=0x%x \n", index, ptr->address, ptr->size); // note + index++; + } + + MPOOL_UNLOCK(); + + return 0; +} + + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_mpool.h b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_mpool.h new file mode 100644 index 00000000000..d93f8886813 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_mpool.h @@ -0,0 +1,72 @@ +/** + @file dal_mpool.h + + @author Copyright (C) 2011 Centec Networks Inc. All rights reserved. + + @date 2012-5-10 + + @version v2.0 + + This file contains the dma memory init, allocation and free APIs +*/ + +#ifndef _DMA_MPOOL_H +#define _DMA_MPOOL_H +#ifdef __cplusplus +extern "C" { +#endif + +#define DAL_MPOOL_MAX_DESX_SIZE (1024*1024) + +enum dal_mpool_type_e +{ + DAL_MPOOL_TYPE_USELESS, /* just compatible with GB */ + DAL_MPOOL_TYPE_DESC, /* dma mpool op for desc */ + DAL_MPOOL_TYPE_DATA /* dma mpool op for data */ +}; +typedef enum dal_mpool_type_e dal_mpool_type_t; + +struct dal_mpool_mem_s +{ + unsigned char* address; + int size; + int type; + struct dal_mpool_mem_s* next; +}; +typedef struct dal_mpool_mem_s dal_mpool_mem_t; + +/** + @brief This function is to alloc dma memory + + @param[in] size size of memory + + @return NULL + +*/ +extern int +dal_mpool_init(void); + +extern dal_mpool_mem_t* +dal_mpool_create(unsigned char lchip, void* base_ptr, int size); + +extern void* +dal_mpool_alloc(unsigned char lchip, dal_mpool_mem_t* pool, int size, int type); + +extern void +dal_mpool_free(unsigned char lchip, dal_mpool_mem_t* pool, void* addr); + +extern int +dal_mpool_destroy(unsigned char lchip, dal_mpool_mem_t* pool); + +extern int +dal_mpool_usage(dal_mpool_mem_t* pool, int type); + +extern int +dal_mpool_debug(dal_mpool_mem_t* pool); +#ifdef __cplusplus +} +#endif + +#endif /* !_DMA_MPOOL_H */ + + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/scripts/48x2q4z_platform.sh b/platform/centec/sonic-platform-modules-e582/48x2q4z/scripts/48x2q4z_platform.sh new file mode 100755 index 00000000000..2f6583bc487 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/scripts/48x2q4z_platform.sh @@ -0,0 +1,78 @@ +#!/bin/bash + +#platform init script for centec e582-48x2q4z + +init_devnum() { + found=0 + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + # I801 adapter can be at either dffd0000 or dfff0000 + if [[ $devname == 'SMBus I801 adapter at '* ]]; then + found=1 + break + fi + done + + [ $found -eq 0 ] && echo "cannot find I801" && exit 1 +} + +init_devnum + +if [ "$1" == "init" ]; then + #install drivers and dependencies + depmod -a + modprobe i2c-i801 + modprobe i2c-dev + modprobe i2c-mux + modprobe i2c-smbus + modprobe i2c-mux-pca954x force_deselect_on_exit=1 + i2cset -y 0 0x58 0x8 0x3f + modprobe lm77 + modprobe tun + modprobe dal + modprobe centec_at24c64 + modprobe centec_e582_48x2q4z_platform + i2cset -y 15 0x21 0x18 0x0 + i2cset -y 15 0x21 0x19 0x0 + i2cset -y 15 0x21 0x1a 0xff + i2cset -y 15 0x21 0x1b 0xff + i2cset -y 15 0x21 0x1c 0xff + i2cset -y 15 0x21 0x8 0x0 + i2cset -y 15 0x21 0x9 0x0 + i2cset -y 15 0x22 0x18 0xff + i2cset -y 15 0x22 0x19 0x0 + i2cset -y 15 0x22 0x1a 0x0 + i2cset -y 15 0x22 0x1b 0xff + i2cset -y 15 0x22 0x1c 0xff + i2cset -y 15 0x22 0x9 0x0 + i2cset -y 15 0x22 0xa 0x0 + i2cset -y 16 0x21 0x18 0x0 + i2cset -y 16 0x21 0x19 0x0 + i2cset -y 16 0x21 0x1a 0xff + i2cset -y 16 0x21 0x1b 0xff + i2cset -y 16 0x21 0x1c 0xff + i2cset -y 16 0x21 0x8 0x0 + i2cset -y 16 0x21 0x9 0x0 + i2cset -y 17 0x22 0x18 0xff + i2cset -y 17 0x22 0x19 0x0 + i2cset -y 17 0x22 0x1a 0xff + i2cset -y 17 0x22 0x1b 0x0 + i2cset -y 17 0x22 0x1c 0xff + i2cset -y 17 0x22 0x9 0x0 + i2cset -y 17 0x22 0xb 0x0c + + #start platform monitor + rm -rf /usr/bin/platform_monitor + ln -s /usr/bin/48x2q4z_platform_monitor.py /usr/bin/platform_monitor + python /usr/bin/platform_monitor & +elif [ "$1" == "deinit" ]; then + kill -9 $(pidof platform_monitor) > /dev/null 2>&1 + rm -rf /usr/bin/platform_monitor + modprobe -r centec_e582_48x2q4z_platform + modprobe -r centec_at24c64 + modprobe -r dal + modprobe -r i2c-mux-pca954x + modprobe -r i2c-dev +else + echo "e582-48x2q4z_platform : Invalid option !" +fi diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/scripts/48x2q4z_platform_monitor.py b/platform/centec/sonic-platform-modules-e582/48x2q4z/scripts/48x2q4z_platform_monitor.py new file mode 100644 index 00000000000..2d8d2c440a8 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/scripts/48x2q4z_platform_monitor.py @@ -0,0 +1,217 @@ +#!/usr/bin/env python + +############################################################################# +# Centec +# +# Module contains an implementation of sfp presence scan logic +# +############################################################################# + +try: + import os + import os.path + import threading + import time + import logging + import struct + import syslog + import swsssdk + from socket import * + from select import * +except ImportError, e: + raise ImportError(str(e) + " - required module not found") + + +def DBG_PRINT(str): + syslog.openlog("centec-pmon") + syslog.syslog(syslog.LOG_INFO, str) + syslog.closelog() + +PORT_NUMBER = (48+6) + +class PlatformMonitor: + + """init board platform default config""" + def __init__(self): + """[ctlid, slavedevid]""" + self.fiber_mapping = [(0, 0)] # res + self.fiber_mapping.extend([(1, 7), (1, 6), (1, 5), (1, 4), (1, 3), (1, 2), (1, 1), (1, 0)]) # panel port 1~8 + self.fiber_mapping.extend([(1, 15), (1, 14), (1, 13), (1, 12), (1, 11), (1, 10), (1, 9), (1, 8)]) # panel port 9~16 + self.fiber_mapping.extend([(1, 19), (1, 17), (1, 16), (1, 18), (0, 7), (0, 6), (0, 5), (0, 4)]) # panel port 17~24 + self.fiber_mapping.extend([(0, 3), (0, 2), (0, 1), (0, 0), (0, 15), (0, 14), (0, 13), (0, 12)]) # panel port 25~32 + self.fiber_mapping.extend([(0, 11), (0, 10), (0, 9), (0, 8), (0, 23), (0, 22), (0, 21), (0, 20)]) # panel port 33~40 + self.fiber_mapping.extend([(0, 19), (0, 18), (0, 17), (0, 16), (0, 31), (0, 26), (0, 29), (0, 27)]) # panel port 41~48 + self.fiber_mapping.extend([(0, 24), (0, 25), (1, 23), (1, 22), (1, 21), (1, 20)]) # panel port 49~54 + + self.udpClient = socket(AF_INET, SOCK_DGRAM) + self.sfp_present = [0]*(PORT_NUMBER+1) + self.sfp_enable = [0]*(PORT_NUMBER+1) + self.f_sfp_present = "/sys/class/sfp/sfp{}/sfp_presence" + self.f_sfp_enable = "/sys/class/sfp/sfp{}/sfp_enable" + self.sfp_scan_timer = 0 + + def is_qsfp(self, port): + if port <= 48: + return False + else: + return True + + def get_sfp_present(self, port): + with open(self.f_sfp_present.format(port), 'r') as sfp_file: + return int(sfp_file.read()) + + def set_sfp_present(self, port, present): + self.sfp_present[port] = present + + def set_sfp_enable(self, port, enable): + if self.is_qsfp(port): + if enable: + with open(self.f_sfp_enable.format(port), 'w') as sfp_file: + sfp_file.write("1") + self.sfp_enable[port] = 1 + else: + with open(self.f_sfp_enable.format(port), 'w') as sfp_file: + sfp_file.write("0") + self.sfp_enable[port] = 0 + else: + (ctlid, devid) = self.fiber_mapping[port] + req = struct.pack('=HHHBBHIBBBBI', 0, 9, 16, ctlid, devid, 0x50, 0, 0x56, 1, 0xf, 0, 1) + self.udpClient.sendto(req, ('localhost', 8101)) + rsp, addr = self.udpClient.recvfrom(1024) + rsp_data = struct.unpack('=HHHBBHIBBBBIi512B', rsp) + enable_v = rsp_data[13] + if enable: + enable_v &= 0xf0 + else: + enable_v |= 0x0f + data = struct.pack('=HHHBBHBBBB', 0, 11, 8, ctlid, 0x56, 0x50, devid, enable_v, 0xf, 0) + self.udpClient.sendto(data, ('localhost', 8101)) + DBG_PRINT("set sfp{} to {}".format(port, ("enable" if enable else "disable"))) + + def initialize_configdb(self): + try: + f_mac = os.popen('ip link show eth0 | grep ether | awk \'{print $2}\'') + mac_addr = f_mac.read(17) + last_byte = mac_addr[-2:] + aligned_last_byte = format(int(int(str(last_byte), 16) + 1), '02x') + mac_addr = mac_addr[:-2] + aligned_last_byte + DBG_PRINT("start connect swss config-db to set device mac-address") + swss = swsssdk.SonicV2Connector() + swss.connect(swss.CONFIG_DB) + swss.set(swss.CONFIG_DB, "DEVICE_METADATA|localhost", 'mac', mac_addr) + mac_addr = swss.get(swss.CONFIG_DB, "DEVICE_METADATA|localhost", 'mac') + DBG_PRINT("set device mac-address: %s" % mac_addr) + except IOError as e: + DBG_PRINT(str(e)) + + def initialize_rpc(self): + while True: + try: + r_sel = [self.udpClient] + echo_req = struct.pack('=HHH', 0, 1, 0) + self.udpClient.sendto(echo_req, ('localhost', 8101)) + result = select(r_sel, [], [], 1) + if self.udpClient in result[0]: + echo_rsp, srv_addr = self.udpClient.recvfrom(1024) + if echo_rsp: + break + DBG_PRINT("connect to sdk rpc server timeout, try again.") + except IOError as e: + DBG_PRINT(str(e)) + + DBG_PRINT("connect to sdk rpc server success.") + + def initialize_gpio(self): + # set gpio 1,2,3,4,5,6,7,8 output mode + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 1, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 2, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 3, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 4, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 5, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 6, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 7, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 8, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + # set gpio 1,2,3,4,5,6,7,8 output 0 to reset i2c bridge + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 1, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 2, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 3, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 4, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 5, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 6, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 7, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 8, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + # set gpio 1,2,3,4,5,6,7,8 output 1 to release i2c bridge + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 1, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 2, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 3, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 4, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 5, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 6, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 7, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 8, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + DBG_PRINT("config ctc chip gpio done.") + + def initialize_sfp(self): + try: + for port in range(1, PORT_NUMBER+1): + if self.get_sfp_present(port): + self.set_sfp_present(port, 1) + self.set_sfp_enable(port, 1) + else: + self.set_sfp_present(port, 0) + self.set_sfp_enable(port, 0) + except IOError as e: + DBG_PRINT(str(e)) + + def initialize(self): + DBG_PRINT("start connect to sdk rpc server.") + + self.initialize_configdb() + self.initialize_rpc() + self.initialize_gpio() + self.initialize_sfp() + + def sfp_scan(self): + try: + for port in range(1, PORT_NUMBER+1): + cur_present = self.get_sfp_present(port) + if self.sfp_present[port] != cur_present: + self.set_sfp_present(port, cur_present) + self.set_sfp_enable(port, cur_present) + except IOError as e: + DBG_PRINT(str(e)) + + def start(self): + while True: + self.sfp_scan() + time.sleep(1) + +if __name__ == "__main__": + monitor = PlatformMonitor() + monitor.initialize() + monitor.start() + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/service/48x2q4z_platform.service b/platform/centec/sonic-platform-modules-e582/48x2q4z/service/48x2q4z_platform.service new file mode 100644 index 00000000000..008db145b11 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/service/48x2q4z_platform.service @@ -0,0 +1,13 @@ +[Unit] +Description=Centec e582 48x2q4z platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-e582-48x2q4z start +ExecStop=-/etc/init.d/platform-modules-e582-48x2q4z stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/cfg/48x6q-modules.conf b/platform/centec/sonic-platform-modules-e582/48x6q/cfg/48x6q-modules.conf new file mode 100644 index 00000000000..7a7881c8c0d --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/cfg/48x6q-modules.conf @@ -0,0 +1,14 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-pca954x +lm77 +adt7470 +tun diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/cfg/config_db.json b/platform/centec/sonic-platform-modules-e582/48x6q/cfg/config_db.json new file mode 100644 index 00000000000..995ac0444b9 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/cfg/config_db.json @@ -0,0 +1,302 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "bgp_asn": 65100, + "deployment_id": null, + "hostname": "switch1", + "type": "LeafRouter", + "hwsku": "E582-48x6q" + + } + }, + "BGP_PEER_RANGE": {}, + "VLAN": {}, + "PORT": { + "Ethernet1": { + "alias": "eth-0-1", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet2": { + "alias": "eth-0-2", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet3": { + "alias": "eth-0-3", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet4": { + "alias": "eth-0-4", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet5": { + "alias": "eth-0-5", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet6": { + "alias": "eth-0-6", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet7": { + "alias": "eth-0-7", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet8": { + "alias": "eth-0-8", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet9": { + "alias": "eth-0-9", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet10": { + "alias": "eth-0-10", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet11": { + "alias": "eth-0-11", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet12": { + "alias": "eth-0-12", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet13": { + "alias": "eth-0-13", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet14": { + "alias": "eth-0-14", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet15": { + "alias": "eth-0-15", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet16": { + "alias": "eth-0-16", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet17": { + "alias": "eth-0-17", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet18": { + "alias": "eth-0-18", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet19": { + "alias": "eth-0-19", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet20": { + "alias": "eth-0-20", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet21": { + "alias": "eth-0-21", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet22": { + "alias": "eth-0-22", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet23": { + "alias": "eth-0-23", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet24": { + "alias": "eth-0-24", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet25": { + "alias": "eth-0-25", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet26": { + "alias": "eth-0-26", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet27": { + "alias": "eth-0-27", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet28": { + "alias": "eth-0-28", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet29": { + "alias": "eth-0-29", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet30": { + "alias": "eth-0-30", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet31": { + "alias": "eth-0-31", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet32": { + "alias": "eth-0-32", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet33": { + "alias": "eth-0-33", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet34": { + "alias": "eth-0-34", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet35": { + "alias": "eth-0-35", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet36": { + "alias": "eth-0-36", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet37": { + "alias": "eth-0-37", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet38": { + "alias": "eth-0-38", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet39": { + "alias": "eth-0-39", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet40": { + "alias": "eth-0-40", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet41": { + "alias": "eth-0-41", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet42": { + "alias": "eth-0-42", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet43": { + "alias": "eth-0-43", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet44": { + "alias": "eth-0-44", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet45": { + "alias": "eth-0-45", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet46": { + "alias": "eth-0-46", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet47": { + "alias": "eth-0-47", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet48": { + "alias": "eth-0-48", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet49": { + "alias": "eth-0-49", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet50": { + "alias": "eth-0-50", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet51": { + "alias": "eth-0-51", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet52": { + "alias": "eth-0-52", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet53": { + "alias": "eth-0-53", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet54": { + "alias": "eth-0-54", + "speed": "40000", + "mtu": "9100" + } + }, + "SYSLOG_SERVER": {}, + "VLAN_INTERFACE": {}, + "PORTCHANNEL_INTERFACE": {}, + "PORTCHANNEL": {}, + "MGMT_INTERFACE": {}, + "DHCP_SERVER": {}, + "LOOPBACK_INTERFACE": { + "Loopback0|127.0.0.1/8": {} + }, + "ACL_TABLE": {}, + "INTERFACE": { + "Ethernet1|192.168.1.1/24": {}, + "Ethernet2|192.168.2.1/24": {}, + "Ethernet3|192.168.3.1/24": {}, + "Ethernet4|192.168.4.1/24": {} + } +} diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/cfg/config_db_l2l3.json b/platform/centec/sonic-platform-modules-e582/48x6q/cfg/config_db_l2l3.json new file mode 100644 index 00000000000..ce6909f3a20 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/cfg/config_db_l2l3.json @@ -0,0 +1,610 @@ +{ + "QUEUE": { + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|0-2": { + "wred_profile": "[WRED_PROFILE|AZURE_LOSSY]" + }, + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|3-4": { + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]", + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|5-7": { + "wred_profile": "[WRED_PROFILE|AZURE_LOSSY]" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS": { + "red_max_threshold": "32760", + "yellow_max_threshold": "32760", + "green_min_threshold": "4095", + "red_min_threshold": "4095", + "yellow_min_threshold": "4095", + "green_max_threshold": "32760", + "wred_yellow_enable": "true", + "wred_green_enable": "true" + }, + "AZURE_LOSSY": { + "red_max_threshold": "32760", + "yellow_max_threshold": "32760", + "green_min_threshold": "4095", + "red_min_threshold": "4095", + "yellow_min_threshold": "4095", + "green_max_threshold": "32760", + "wred_yellow_enable": "true", + "wred_green_enable": "true" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "56": "7", + "54": "6", + "28": "3", + "48": "6", + "29": "3", + "60": "7", + "61": "7", + "62": "7", + "63": "7", + "49": "6", + "34": "4", + "24": "3", + "25": "3", + "26": "3", + "27": "3", + "20": "2", + "21": "2", + "22": "2", + "23": "2", + "46": "5", + "47": "5", + "44": "5", + "45": "5", + "42": "5", + "43": "5", + "40": "5", + "41": "5", + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "5": "0", + "4": "0", + "7": "0", + "6": "0", + "9": "1", + "8": "1", + "35": "4", + "13": "1", + "12": "1", + "15": "1", + "58": "7", + "11": "1", + "10": "1", + "39": "4", + "38": "4", + "59": "7", + "14": "1", + "17": "2", + "16": "2", + "19": "2", + "18": "2", + "31": "3", + "30": "3", + "51": "6", + "36": "4", + "53": "6", + "52": "6", + "33": "4", + "55": "6", + "37": "4", + "32": "4", + "57": "7", + "50": "6" + } + }, + "DEVICE_METADATA": { + "localhost": { + "hwsku": "E582-48x6q", + "hostname": "switch1", + "bgp_asn": "None", + "deployment_id": "None", + "type": "LeafRouter" + } + }, + "PORT": { + "Ethernet1": { + "alias": "eth-0-1", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet2": { + "alias": "eth-0-2", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet3": { + "alias": "eth-0-3", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet4": { + "alias": "eth-0-4", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet5": { + "alias": "eth-0-5", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet6": { + "alias": "eth-0-6", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet7": { + "alias": "eth-0-7", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet8": { + "alias": "eth-0-8", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet9": { + "alias": "eth-0-9", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet10": { + "alias": "eth-0-10", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet11": { + "alias": "eth-0-11", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet12": { + "alias": "eth-0-12", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet13": { + "alias": "eth-0-13", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet14": { + "alias": "eth-0-14", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet15": { + "alias": "eth-0-15", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet16": { + "alias": "eth-0-16", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet17": { + "alias": "eth-0-17", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet18": { + "alias": "eth-0-18", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet19": { + "alias": "eth-0-19", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet20": { + "alias": "eth-0-20", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet21": { + "alias": "eth-0-21", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet22": { + "alias": "eth-0-22", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet23": { + "alias": "eth-0-23", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet24": { + "alias": "eth-0-24", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet25": { + "alias": "eth-0-25", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet26": { + "alias": "eth-0-26", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet27": { + "alias": "eth-0-27", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet28": { + "alias": "eth-0-28", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet29": { + "alias": "eth-0-29", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet30": { + "alias": "eth-0-30", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet31": { + "alias": "eth-0-31", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet32": { + "alias": "eth-0-32", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet33": { + "alias": "eth-0-33", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet34": { + "alias": "eth-0-34", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet35": { + "alias": "eth-0-35", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet36": { + "alias": "eth-0-36", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet37": { + "alias": "eth-0-37", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet38": { + "alias": "eth-0-38", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet39": { + "alias": "eth-0-39", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet40": { + "alias": "eth-0-40", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet41": { + "alias": "eth-0-41", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet42": { + "alias": "eth-0-42", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet43": { + "alias": "eth-0-43", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet44": { + "alias": "eth-0-44", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet45": { + "alias": "eth-0-45", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet46": { + "alias": "eth-0-46", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet47": { + "alias": "eth-0-47", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet48": { + "alias": "eth-0-48", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet49": { + "alias": "eth-0-49", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet50": { + "alias": "eth-0-50", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet51": { + "alias": "eth-0-51", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet52": { + "alias": "eth-0-52", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet53": { + "alias": "eth-0-53", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet54": { + "alias": "eth-0-54", + "speed": "40000", + "mtu": "9100" + } + }, + "PORT_QOS_MAP": { + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54": { + "pfc_enable": "3,4", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP|AZURE]" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type": "DWRR", + "weight": "25" + }, + "scheduler.1": { + "type": "DWRR", + "weight": "30" + }, + "scheduler.2": { + "type": "DWRR", + "weight": "20" + } + }, + "VLAN": { + "Vlan500": { + "dhcp_servers": [ + "192.168.5.1", + "192.168.5.2", + "192.168.5.3", + "192.168.5.4" + ], + "members": [ + "Ethernet5", + "Ethernet6", + "Ethernet7", + "Ethernet8" + ], + "vlanid": "500" + }, + "Vlan600": { + "dhcp_servers": [ + "192.168.6.1", + "192.168.6.2", + "192.168.6.3", + "192.168.6.4" + ], + "members": [ + "Ethernet5", + "Ethernet6" + ], + "vlanid": "600" + }, + "Vlan700": { + "dhcp_servers": [ + "192.168.7.1", + "192.168.7.2", + "192.168.7.3", + "192.168.7.4" + ], + "members": [ + "Ethernet5", + "Ethernet7" + ], + "vlanid": "700" + }, + "Vlan800": { + "dhcp_servers": [ + "192.168.8.1", + "192.168.8.2", + "192.168.8.3", + "192.168.8.4" + ], + "members": [ + "Ethernet5", + "Ethernet8" + ], + "vlanid": "800" + } + }, + "VLAN_MEMBER": { + "Vlan500|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan500|Ethernet6": { + "tagging_mode": "untagged" + }, + "Vlan500|Ethernet7": { + "tagging_mode": "untagged" + }, + "Vlan500|Ethernet8": { + "tagging_mode": "untagged" + }, + "Vlan600|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan600|Ethernet6": { + "tagging_mode": "tagged" + }, + "Vlan700|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan700|Ethernet7": { + "tagging_mode": "tagged" + }, + "Vlan800|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan800|Ethernet8": { + "tagging_mode": "tagged" + } + }, + "INTERFACE": { + "Ethernet1|192.168.1.1/24": {}, + "Ethernet2|192.168.2.1/24": {}, + "Ethernet3|192.168.3.1/24": {}, + "Ethernet4|192.168.4.1/24": {} + }, + "VLAN_INTERFACE": { + "Vlan500|192.168.5.1/24": {}, + "Vlan600|192.168.6.1/24": {}, + "Vlan700|192.168.7.1/24": {}, + "Vlan800|192.168.8.1/24": {} + }, + "LOOPBACK_INTERFACE": { + "Loopback0|127.0.0.1/8": {} + }, + "CABLE_LENGTH": { + "AZURE": { + "Ethernet8": "40m", + "Ethernet9": "40m", + "Ethernet2": "40m", + "Ethernet3": "40m", + "Ethernet1": "40m", + "Ethernet6": "40m", + "Ethernet7": "40m", + "Ethernet4": "40m", + "Ethernet5": "40m", + "Ethernet22": "40m", + "Ethernet50": "40m", + "Ethernet51": "40m", + "Ethernet52": "40m", + "Ethernet53": "40m", + "Ethernet54": "40m", + "Ethernet38": "40m", + "Ethernet39": "40m", + "Ethernet18": "40m", + "Ethernet19": "40m", + "Ethernet14": "40m", + "Ethernet15": "40m", + "Ethernet16": "40m", + "Ethernet17": "40m", + "Ethernet10": "40m", + "Ethernet11": "40m", + "Ethernet12": "40m", + "Ethernet35": "40m", + "Ethernet37": "40m", + "Ethernet32": "40m", + "Ethernet33": "40m", + "Ethernet30": "40m", + "Ethernet31": "40m", + "Ethernet49": "40m", + "Ethernet48": "40m", + "Ethernet47": "40m", + "Ethernet36": "40m", + "Ethernet45": "40m", + "Ethernet44": "40m", + "Ethernet43": "40m", + "Ethernet42": "40m", + "Ethernet41": "40m", + "Ethernet40": "40m", + "Ethernet29": "40m", + "Ethernet28": "40m", + "Ethernet34": "40m", + "Ethernet46": "40m", + "Ethernet21": "40m", + "Ethernet20": "40m", + "Ethernet23": "40m", + "Ethernet13": "40m", + "Ethernet25": "40m", + "Ethernet24": "40m", + "Ethernet27": "40m", + "Ethernet26": "40m" + } + }, + "CRM": { + "Config": { + "acl_table_threshold_type": "percentage", + "nexthop_group_threshold_type": "percentage", + "fdb_entry_high_threshold": "85", + "acl_entry_threshold_type": "percentage", + "ipv6_neighbor_low_threshold": "70", + "nexthop_group_member_low_threshold": "70", + "acl_group_high_threshold": "85", + "ipv4_route_high_threshold": "85", + "acl_counter_high_threshold": "85", + "ipv4_route_low_threshold": "70", + "ipv4_route_threshold_type": "percentage", + "ipv4_neighbor_low_threshold": "70", + "acl_group_threshold_type": "percentage", + "ipv4_nexthop_high_threshold": "85", + "ipv6_route_threshold_type": "percentage", + "nexthop_group_low_threshold": "70", + "ipv4_neighbor_high_threshold": "85", + "ipv6_route_high_threshold": "85", + "ipv6_nexthop_threshold_type": "percentage", + "polling_interval": "300", + "ipv4_nexthop_threshold_type": "percentage", + "acl_group_low_threshold": "70", + "acl_entry_low_threshold": "70", + "nexthop_group_member_threshold_type": "percentage", + "ipv4_nexthop_low_threshold": "70", + "acl_counter_threshold_type": "percentage", + "ipv6_neighbor_high_threshold": "85", + "nexthop_group_member_high_threshold": "85", + "acl_table_low_threshold": "70", + "fdb_entry_threshold_type": "percentage", + "ipv6_neighbor_threshold_type": "percentage", + "acl_table_high_threshold": "85", + "ipv6_nexthop_low_threshold": "70", + "acl_counter_low_threshold": "70", + "ipv4_neighbor_threshold_type": "percentage", + "nexthop_group_high_threshold": "85", + "ipv6_route_low_threshold": "70", + "acl_entry_high_threshold": "85", + "fdb_entry_low_threshold": "70", + "ipv6_nexthop_high_threshold": "85" + } + } +} diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/modules/Makefile b/platform/centec/sonic-platform-modules-e582/48x6q/modules/Makefile new file mode 100644 index 00000000000..25df81bba42 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := centec_e582_48x6q_platform.o dal.o centec_at24c64.o +dal-y := dal_kernel.o dal_mpool.o diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/modules/centec_at24c64.c b/platform/centec/sonic-platform-modules-e582/48x6q/modules/centec_at24c64.c new file mode 100644 index 00000000000..e1835df8862 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/modules/centec_at24c64.c @@ -0,0 +1,602 @@ +/* + * at24.c - handle most I2C EEPROMs + * + * Copyright (C) 2005-2007 David Brownell + * Copyright (C) 2008 Wolfram Sang, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. + * Differences between different vendor product lines (like Atmel AT24C or + * MicroChip 24LC, etc) won't much matter for typical read/write access. + * There are also I2C RAM chips, likewise interchangeable. One example + * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). + * + * However, misconfiguration can lose data. "Set 16-bit memory address" + * to a part with 8-bit addressing will overwrite data. Writing with too + * big a page size also loses data. And it's not safe to assume that the + * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC + * uses 0x51, for just one example. + * + * Accordingly, explicit board-specific configuration data should be used + * in almost all cases. (One partial exception is an SMBus used to access + * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) + * + * So this driver uses "new style" I2C driver binding, expecting to be + * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or + * similar kernel-resident tables; or, configuration data coming from + * a bootloader. + * + * Other than binding model, current differences from "eeprom" driver are + * that this one handles write access and isn't restricted to 24c02 devices. + * It also handles larger devices (32 kbit and up) with two-byte addresses, + * which won't work on pure SMBus systems. + */ + +struct at24_data { + struct at24_platform_data chip; + int use_smbus; + + /* + * Lock protects against activities from other Linux tasks, + * but not from changes by other I2C masters. + */ + struct mutex lock; + struct bin_attribute bin; + + u8 *writebuf; + unsigned write_max; + unsigned num_addresses; + + /* + * Some chips tie up multiple I2C addresses; dummy devices reserve + * them for us, and we'll use them with SMBus calls. + */ + struct i2c_client *client[]; +}; + +/* + * This parameter is to help this driver avoid blocking other drivers out + * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C + * clock, one 256 byte read takes about 1/43 second which is excessive; + * but the 1/170 second it takes at 400 kHz may be quite reasonable; and + * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. + * + * This value is forced to be a power of two so that writes align on pages. + */ +static unsigned io_limit = 128; +module_param(io_limit, uint, 0); +MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)"); + +/* + * Specs often allow 5 msec for a page write, sometimes 20 msec; + * it's important to recover from write timeouts. + */ +static unsigned write_timeout = 25; +module_param(write_timeout, uint, 0); +MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)"); + +#define AT24_SIZE_BYTELEN 5 +#define AT24_SIZE_FLAGS 8 + +#define AT24_BITMASK(x) (BIT(x) - 1) + +/* create non-zero magic value for given eeprom parameters */ +#define AT24_DEVICE_MAGIC(_len, _flags) \ + ((1 << AT24_SIZE_FLAGS | (_flags)) \ + << AT24_SIZE_BYTELEN | ilog2(_len)) + +static const struct i2c_device_id at24_ctc_ids[] = { + { "24c64-ctc", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16 | AT24_FLAG_READONLY | AT24_FLAG_IRUGO) }, + { /* END OF LIST */ } +}; +MODULE_DEVICE_TABLE(i2c, at24_ctc_ids); + +/*-------------------------------------------------------------------------*/ + +/* + * This routine supports chips which consume multiple I2C addresses. It + * computes the addressing information to be used for a given r/w request. + * Assumes that sanity checks for offset happened at sysfs-layer. + */ +static struct i2c_client *at24_translate_offset(struct at24_data *at24, + unsigned *offset) +{ + unsigned i = 0; + + if (at24->chip.flags & AT24_FLAG_ADDR16) { + i = *offset >> 16; + *offset &= 0xffff; + } else { + i = *offset >> 8; + *offset &= 0xff; + } + + return at24->client[i]; +} + +static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf, + unsigned offset, size_t count) +{ + struct i2c_msg msg[2]; + struct i2c_client *client; + unsigned long timeout, read_time; + int status; + + memset(msg, 0, sizeof(msg)); + + /* + * REVISIT some multi-address chips don't rollover page reads to + * the next slave address, so we may need to truncate the count. + * Those chips might need another quirk flag. + * + * If the real hardware used four adjacent 24c02 chips and that + * were misconfigured as one 24c08, that would be a similar effect: + * one "eeprom" file not four, but larger reads would fail when + * they crossed certain pages. + */ + + /* + * Slave address and byte offset derive from the offset. Always + * set the byte address; on a multi-master board, another master + * may have changed the chip's "current" address pointer. + */ + client = at24_translate_offset(at24, &offset); + + if (count > io_limit) + count = io_limit; + + count = 1; + + /* + * Reads fail if the previous write didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + read_time = jiffies; + + status = i2c_smbus_write_byte_data(client, (offset >> 8) & 0x0ff, offset & 0x0ff ); + status = i2c_smbus_read_byte(client); + if (status >= 0) { + buf[0] = status; + status = count; + } + + dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", count, offset, status, jiffies); + + if (status == count) + return count; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(read_time, timeout)); + + return -ETIMEDOUT; +} + +static ssize_t at24_read(struct at24_data *at24, + char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) + return count; + + memset(buf, 0, count); + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&at24->lock); + + while (count) { + ssize_t status; + + status = at24_eeprom_read(at24, buf, off, count); + if (status <= 0) { + if (retval == 0) + retval = status; + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&at24->lock); + + return retval; +} + +static ssize_t at24_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct at24_data *at24; + + at24 = dev_get_drvdata(container_of(kobj, struct device, kobj)); + return at24_read(at24, buf, off, count); +} + + +/* + * Note that if the hardware write-protect pin is pulled high, the whole + * chip is normally write protected. But there are plenty of product + * variants here, including OTP fuses and partial chip protect. + * + * We only use page mode writes; the alternative is sloooow. This routine + * writes at most one page. + */ +static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf, + unsigned offset, size_t count) +{ + struct i2c_client *client; + ssize_t status; + unsigned long timeout, write_time; + unsigned next_page; + + /* Get corresponding I2C address and adjust offset */ + client = at24_translate_offset(at24, &offset); + + /* write_max is at most a page */ + if (count > at24->write_max) + count = at24->write_max; + + /* Never roll over backwards, to the start of this page */ + next_page = roundup(offset + 1, at24->chip.page_size); + if (offset + count > next_page) + count = next_page - offset; + + /* + * Writes fail if the previous one didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + write_time = jiffies; + + status = i2c_smbus_write_word_data(client, (offset >> 8) & 0x0ff, (offset & 0xFF) | buf[0]); + if (status == 0) + status = count; + + dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", count, offset, status, jiffies); + + if (status == count) + return count; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(write_time, timeout)); + + return -ETIMEDOUT; +} + +static ssize_t at24_write(struct at24_data *at24, const char *buf, loff_t off, + size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) + return count; + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&at24->lock); + + while (count) { + ssize_t status; + + status = at24_eeprom_write(at24, buf, off, 1); /* only one-byte to write; TODO page wirte */ + if (status <= 0) { + if (retval == 0) + retval = status; + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&at24->lock); + + return retval; +} + +static ssize_t at24_bin_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct at24_data *at24; + + if (unlikely(off >= attr->size)) + return -EFBIG; + + at24 = dev_get_drvdata(container_of(kobj, struct device, kobj)); + return at24_write(at24, buf, off, count); +} + +/*-------------------------------------------------------------------------*/ + +#ifdef CONFIG_OF +static void at24_get_ofdata(struct i2c_client *client, + struct at24_platform_data *chip) +{ + const __be32 *val; + struct device_node *node = client->dev.of_node; + + if (node) { + if (of_get_property(node, "read-only", NULL)) + chip->flags |= AT24_FLAG_READONLY; + val = of_get_property(node, "pagesize", NULL); + if (val) + chip->page_size = be32_to_cpup(val); + } +} +#else +static void at24_get_ofdata(struct i2c_client *client, + struct at24_platform_data *chip) +{ } +#endif /* CONFIG_OF */ + +static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct at24_platform_data chip; + bool writable; + int use_smbus = 0; + struct at24_data *at24; + int err; + unsigned i, num_addresses; + kernel_ulong_t magic; + + if (client->dev.platform_data) { + chip = *(struct at24_platform_data *)client->dev.platform_data; + } else { + if (!id->driver_data) + return -ENODEV; + + magic = id->driver_data; + chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN)); + magic >>= AT24_SIZE_BYTELEN; + chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS); + + /* + * This is slow, but we can't know all eeproms, so we better + * play safe. Specifying custom eeprom-types via platform_data + * is recommended anyhow. + */ + chip.page_size = 1; + + /* update chipdata if OF is present */ + at24_get_ofdata(client, &chip); + + chip.setup = NULL; + chip.context = NULL; + } + + if (!is_power_of_2(chip.byte_len)) + dev_warn(&client->dev, + "byte_len looks suspicious (no power of 2)!\n"); + if (!chip.page_size) { + dev_err(&client->dev, "page_size must not be 0!\n"); + return -EINVAL; + } + if (!is_power_of_2(chip.page_size)) + dev_warn(&client->dev, + "page_size looks suspicious (no power of 2)!\n"); + + /* Use I2C operations unless we're stuck with SMBus extensions. */ + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { + if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { + use_smbus = I2C_SMBUS_I2C_BLOCK_DATA; + } else if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_WORD_DATA)) { + use_smbus = I2C_SMBUS_WORD_DATA; + } else if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE_DATA)) { + use_smbus = I2C_SMBUS_BYTE_DATA; + } else { + return -EPFNOSUPPORT; + } + use_smbus = I2C_SMBUS_BYTE_DATA; + } + + if (chip.flags & AT24_FLAG_TAKE8ADDR) + num_addresses = 8; + else + num_addresses = DIV_ROUND_UP(chip.byte_len, (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256); + + at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) + num_addresses * sizeof(struct i2c_client *), GFP_KERNEL); + if (!at24) + return -ENOMEM; + + mutex_init(&at24->lock); + at24->use_smbus = use_smbus; + at24->chip = chip; + at24->num_addresses = num_addresses; + + printk(KERN_ALERT "at24_probe chip.byte_len = 0x%x\n", chip.byte_len); + printk(KERN_ALERT "at24_probe chip.flags = 0x%x\n", chip.flags); + printk(KERN_ALERT "at24_probe chip.magic = 0x%lx\n", id->driver_data); + printk(KERN_ALERT "at24_probe use_smbus = %d\n", at24->use_smbus); + printk(KERN_ALERT "at24_probe num_addresses = %d\n", at24->num_addresses); + + /* + * Export the EEPROM bytes through sysfs, since that's convenient. + * By default, only root should see the data (maybe passwords etc) + */ + sysfs_bin_attr_init(&at24->bin); + at24->bin.attr.name = "eeprom"; + at24->bin.attr.mode = chip.flags & AT24_FLAG_IRUGO ? S_IRUGO : S_IRUSR; + at24->bin.read = at24_bin_read; + at24->bin.size = chip.byte_len; + + writable = !(chip.flags & AT24_FLAG_READONLY); + if (writable) { + if (!use_smbus || i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) { + unsigned write_max = chip.page_size; + + at24->bin.write = at24_bin_write; + at24->bin.attr.mode |= S_IWUSR; + + if (write_max > io_limit) + write_max = io_limit; + if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX) + write_max = I2C_SMBUS_BLOCK_MAX; + at24->write_max = write_max; + + /* buffer (data + address at the beginning) */ + at24->writebuf = devm_kzalloc(&client->dev, write_max + 2, GFP_KERNEL); + if (!at24->writebuf) + return -ENOMEM; + } else { + dev_warn(&client->dev, "cannot write due to controller restrictions."); + } + } + + at24->client[0] = client; + + /* use dummy devices for multiple-address chips */ + for (i = 1; i < num_addresses; i++) { + at24->client[i] = i2c_new_dummy(client->adapter, client->addr + i); + if (!at24->client[i]) { + dev_err(&client->dev, "address 0x%02x unavailable\n", client->addr + i); + err = -EADDRINUSE; + goto err_clients; + } + } + + err = sysfs_create_bin_file(&client->dev.kobj, &at24->bin); + if (err) + goto err_clients; + + i2c_set_clientdata(client, at24); + + printk(KERN_ALERT "at24_probe %s done\n", client->name); + + return 0; + +err_clients: + for (i = 1; i < num_addresses; i++) + if (at24->client[i]) + i2c_unregister_device(at24->client[i]); + + return err; +} + +static int at24_remove(struct i2c_client *client) +{ + struct at24_data *at24; + int i; + + at24 = i2c_get_clientdata(client); + sysfs_remove_bin_file(&client->dev.kobj, &at24->bin); + + for (i = 1; i < at24->num_addresses; i++) + i2c_unregister_device(at24->client[i]); + + return 0; +} + +/*-------------------------------------------------------------------------*/ + +static struct i2c_board_info i2c_devs = { + I2C_BOARD_INFO("24c64-ctc", 0x57), +}; + +static struct i2c_adapter *adapter = NULL; +static struct i2c_client *client = NULL; + +static int ctc_at24c64_init(void) +{ + printk(KERN_ALERT "ctc_at24c64_init\n"); + + adapter = i2c_get_adapter(0); + if(adapter == NULL){ + printk(KERN_ALERT "i2c_get_adapter == NULL\n"); + return -1; + } + + client = i2c_new_device(adapter, &i2c_devs); + if(client == NULL){ + printk(KERN_ALERT "i2c_new_device == NULL\n"); + i2c_put_adapter(adapter); + adapter = NULL; + return -1; + } + + return 0; +} + +static void ctc_at24c64_exit(void) +{ + printk(KERN_ALERT "ctc_at24c64_exit\n"); + if(client){ + i2c_unregister_device(client); + } + if(adapter){ + i2c_put_adapter(adapter); + } +} + +static struct i2c_driver at24_ctc_driver = { + .driver = { + .name = "at24-ctc", + .owner = THIS_MODULE, + }, + .probe = at24_probe, + .remove = at24_remove, + .id_table = at24_ctc_ids, +}; + +static int __init at24_ctc_init(void) +{ + if (!io_limit) { + pr_err("at24_ctc: io_limit must not be 0!\n"); + return -EINVAL; + } + + io_limit = rounddown_pow_of_two(io_limit); + + ctc_at24c64_init(); + + return i2c_add_driver(&at24_ctc_driver); +} +module_init(at24_ctc_init); + +static void __exit at24_ctc_exit(void) +{ + ctc_at24c64_exit(); + i2c_del_driver(&at24_ctc_driver); +} +module_exit(at24_ctc_exit); + +MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); +MODULE_AUTHOR("David Brownell and Wolfram Sang"); +MODULE_LICENSE("GPL"); +/* XXX */ + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/modules/centec_e582_48x6q_platform.c b/platform/centec/sonic-platform-modules-e582/48x6q/modules/centec_e582_48x6q_platform.c new file mode 100644 index 00000000000..6ef18ca62f4 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/modules/centec_e582_48x6q_platform.c @@ -0,0 +1,1381 @@ +#include +#include +#include +#include +#include +#include +#include + +#define SEP(XXX) 1 +#define IS_INVALID_PTR(_PTR_) ((_PTR_ == NULL) || IS_ERR(_PTR_)) +#define IS_VALID_PTR(_PTR_) (!IS_INVALID_PTR(_PTR_)) + +#if SEP("defines") +#define PCA9548_CHANNEL_NUM 8 +#define PCA9548_ADAPT_ID_START 10 +#define SFP_NUM 48 +#define QSFP_NUM 6 +#define PORT_NUM (SFP_NUM+QSFP_NUM) +#endif + +#if SEP("i2c:master") +static struct i2c_adapter *i2c_adp_master = NULL; /* i2c-0-cpu */ + +static int e582_48x6q_init_i2c_master(void) +{ + /* find i2c-core master */ + i2c_adp_master = i2c_get_adapter(0); + if(IS_INVALID_PTR(i2c_adp_master)) + { + i2c_adp_master = NULL; + printk(KERN_CRIT "e582_48x6q_init_i2c_master can't find i2c-core bus\n"); + return -1; + } + + return 0; +} + +static int e582_48x6q_exit_i2c_master(void) +{ + /* uninstall i2c-core master */ + if(IS_VALID_PTR(i2c_adp_master)) { + i2c_put_adapter(i2c_adp_master); + i2c_adp_master = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:pca9548") +static struct pca954x_platform_mode i2c_dev_pca9548_platform_mode[PCA9548_CHANNEL_NUM] = { + [0] = { + .adap_id = PCA9548_ADAPT_ID_START, + .deselect_on_exit = 1, + .class = 0, + }, + [1] = { + .adap_id = PCA9548_ADAPT_ID_START + 1, + .deselect_on_exit = 1, + .class = 0, + }, + [2] = { + .adap_id = PCA9548_ADAPT_ID_START + 2, + .deselect_on_exit = 1, + .class = 0, + }, + [3] = { + .adap_id = PCA9548_ADAPT_ID_START + 3, + .deselect_on_exit = 1, + .class = 0, + }, + [4] = { + .adap_id = PCA9548_ADAPT_ID_START + 4, + .deselect_on_exit = 1, + .class = 0, + }, + [5] = { + .adap_id = PCA9548_ADAPT_ID_START + 5, + .deselect_on_exit = 1, + .class = 0, + }, + [6] = { + .adap_id = PCA9548_ADAPT_ID_START + 6, + .deselect_on_exit = 1, + .class = 0, + }, + [7] = { + .adap_id = PCA9548_ADAPT_ID_START + 7, + .deselect_on_exit = 1, + .class = 0, + } +}; +static struct pca954x_platform_data i2c_dev_pca9548_platform_data = { + .modes = i2c_dev_pca9548_platform_mode, + .num_modes = PCA9548_CHANNEL_NUM, +}; +static struct i2c_board_info i2c_dev_pca9548 = { + I2C_BOARD_INFO("pca9548", 0x70), + .platform_data = &i2c_dev_pca9548_platform_data, +}; +static struct i2c_client *i2c_client_pca9548x = NULL; + +static int e582_48x6q_init_i2c_pca9548(void) +{ + if(IS_INVALID_PTR(i2c_adp_master)) + { + i2c_adp_master = NULL; + printk(KERN_CRIT "e582_48x6q_init_i2c_pca9548 can't find i2c-core bus\n"); + return -1; + } + + /* install i2c-mux */ + i2c_client_pca9548x = i2c_new_device(i2c_adp_master, &i2c_dev_pca9548); + if(IS_INVALID_PTR(i2c_client_pca9548x)) + { + i2c_client_pca9548x = NULL; + printk(KERN_CRIT "install e582_48x6q board pca9548 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x6q_exit_i2c_pca9548(void) +{ + /* uninstall i2c-core master */ + if(IS_VALID_PTR(i2c_client_pca9548x)) { + i2c_unregister_device(i2c_client_pca9548x); + i2c_client_pca9548x = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:adt7470") +static struct i2c_board_info i2c_dev_adt7470 = { + I2C_BOARD_INFO("adt7470", 0x2F), +}; +static struct i2c_adapter *i2c_adp_adt7470 = NULL; /* pca9548x-channel 5 */ +static struct i2c_client *i2c_client_adt7470 = NULL; + +static int e582_48x6q_init_i2c_adt7470(void) +{ + i2c_adp_adt7470 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 5); + if(IS_INVALID_PTR(i2c_adp_adt7470)) + { + i2c_adp_adt7470 = NULL; + printk(KERN_CRIT "install e582_48x6q board adt7470 failed\n"); + return -1; + } + + i2c_client_adt7470 = i2c_new_device(i2c_adp_adt7470, &i2c_dev_adt7470); + if(IS_INVALID_PTR(i2c_client_adt7470)){ + i2c_client_adt7470 = NULL; + printk(KERN_CRIT "install e582_48x6q board adt7470 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x6q_exit_i2c_adt7470(void) +{ + if(IS_VALID_PTR(i2c_client_adt7470)) { + i2c_unregister_device(i2c_client_adt7470); + i2c_client_adt7470 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_adt7470)) { + i2c_put_adapter(i2c_adp_adt7470); + i2c_adp_adt7470 = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:psu") +static struct i2c_adapter *i2c_adp_psu1 = NULL; /* psu1 channel 3 */ +static struct i2c_adapter *i2c_adp_psu2 = NULL; /* psu2 channel 1 */ +static struct i2c_board_info i2c_dev_psu1 = { + I2C_BOARD_INFO("i2c-psu1", 0x38), +}; +static struct i2c_board_info i2c_dev_psu2 = { + I2C_BOARD_INFO("i2c-psu2", 0x38), +}; +static struct i2c_client *i2c_client_psu1 = NULL; +static struct i2c_client *i2c_client_psu2 = NULL; + +static int e582_48x6q_init_i2c_psu(void) +{ + i2c_adp_psu1 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 3); + if(IS_INVALID_PTR(i2c_adp_psu1)) + { + i2c_adp_psu1 = NULL; + printk(KERN_CRIT "get e582_48x6q psu1 i2c-adp failed\n"); + return -1; + } + + i2c_adp_psu2 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 1); + if(IS_INVALID_PTR(i2c_adp_psu2)) + { + i2c_adp_psu2 = NULL; + printk(KERN_CRIT "get e582_48x6q psu2 i2c-adp failed\n"); + return -1; + } + + i2c_client_psu1 = i2c_new_device(i2c_adp_psu1, &i2c_dev_psu1); + if(IS_INVALID_PTR(i2c_client_psu1)){ + i2c_client_psu1 = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client psu1 failed\n"); + return -1; + } + + i2c_client_psu2 = i2c_new_device(i2c_adp_psu2, &i2c_dev_psu2); + if(IS_INVALID_PTR(i2c_client_psu2)){ + i2c_client_psu2 = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client psu2 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x6q_exit_i2c_psu(void) +{ + if(IS_VALID_PTR(i2c_client_psu1)) { + i2c_unregister_device(i2c_client_psu1); + i2c_client_psu1 = NULL; + } + + if(IS_VALID_PTR(i2c_client_psu2)) { + i2c_unregister_device(i2c_client_psu2); + i2c_client_psu2 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_psu1)) + { + i2c_put_adapter(i2c_adp_psu1); + i2c_adp_psu1 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_psu2)) + { + i2c_put_adapter(i2c_adp_psu2); + i2c_adp_psu2 = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:epld") +static struct i2c_board_info i2c_dev_epld = { + I2C_BOARD_INFO("i2c-epld", 0x58), +}; +static struct i2c_client *i2c_client_epld = NULL; + +static int e582_48x6q_init_i2c_epld(void) +{ + if (IS_INVALID_PTR(i2c_adp_master)) + { + printk(KERN_CRIT "e582_48x6q_init_i2c_epld can't find i2c-core bus\n"); + return -1; + } + + i2c_client_epld = i2c_new_device(i2c_adp_master, &i2c_dev_epld); + if(IS_INVALID_PTR(i2c_client_epld)) + { + i2c_client_epld = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client epld failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x6q_exit_i2c_epld(void) +{ + if(IS_VALID_PTR(i2c_client_epld)) { + i2c_unregister_device(i2c_client_epld); + i2c_client_epld = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:gpio") +static struct i2c_board_info i2c_dev_gpio0 = { + I2C_BOARD_INFO("i2c-gpio0", 0x20), +}; +static struct i2c_board_info i2c_dev_gpio1 = { + I2C_BOARD_INFO("i2c-gpio1", 0x21), +}; +static struct i2c_board_info i2c_dev_gpio2 = { + I2C_BOARD_INFO("i2c-gpio2", 0x22), +}; +static struct i2c_board_info i2c_dev_gpio3 = { + I2C_BOARD_INFO("i2c-gpio3", 0x23), +}; +static struct i2c_board_info i2c_dev_gpio4 = { + I2C_BOARD_INFO("i2c-gpio4", 0x24), +}; +static struct i2c_client *i2c_client_gpio0 = NULL; +static struct i2c_client *i2c_client_gpio1 = NULL; +static struct i2c_client *i2c_client_gpio2 = NULL; +static struct i2c_client *i2c_client_gpio3 = NULL; +static struct i2c_client *i2c_client_gpio4 = NULL; + +static int e582_48x6q_init_i2c_gpio(void) +{ + if (IS_INVALID_PTR(i2c_adp_master)) + { + printk(KERN_CRIT "e582_48x6q_init_i2c_gpio can't find i2c-core bus\n"); + return -1; + } + + i2c_client_gpio0 = i2c_new_device(i2c_adp_master, &i2c_dev_gpio0); + if(IS_INVALID_PTR(i2c_client_gpio0)) + { + i2c_client_gpio0 = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client gpio0 failed\n"); + return -1; + } + + i2c_client_gpio1 = i2c_new_device(i2c_adp_master, &i2c_dev_gpio1); + if(IS_INVALID_PTR(i2c_client_gpio1)) + { + i2c_client_gpio1 = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client gpio1 failed\n"); + return -1; + } + + i2c_client_gpio2 = i2c_new_device(i2c_adp_master, &i2c_dev_gpio2); + if(IS_INVALID_PTR(i2c_client_gpio2)) + { + i2c_client_gpio2 = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client gpio2 failed\n"); + return -1; + } + + i2c_client_gpio3 = i2c_new_device(i2c_adp_master, &i2c_dev_gpio3); + if(IS_INVALID_PTR(i2c_client_gpio3)) + { + i2c_client_gpio3 = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client gpio3 failed\n"); + return -1; + } + + i2c_client_gpio4 = i2c_new_device(i2c_adp_master, &i2c_dev_gpio4); + if(IS_INVALID_PTR(i2c_client_gpio4)) + { + i2c_client_gpio4 = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client gpio4 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x6q_exit_i2c_gpio(void) +{ + if(IS_VALID_PTR(i2c_client_gpio0)) { + i2c_unregister_device(i2c_client_gpio0); + i2c_client_gpio0 = NULL; + } + + if((i2c_client_gpio1)) { + i2c_unregister_device(i2c_client_gpio1); + i2c_client_gpio1 = NULL; + } + + if(IS_VALID_PTR(i2c_client_gpio2)) { + i2c_unregister_device(i2c_client_gpio2); + i2c_client_gpio2 = NULL; + } + + if(IS_VALID_PTR(i2c_client_gpio3)) { + i2c_unregister_device(i2c_client_gpio3); + i2c_client_gpio3 = NULL; + } + + if(IS_VALID_PTR(i2c_client_gpio4)) { + i2c_unregister_device(i2c_client_gpio4); + i2c_client_gpio4 = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:smbus") +static int e582_48x6q_smbus_read_reg(struct i2c_client *client, unsigned char reg, unsigned char* value) +{ + int ret = 0; + + if (IS_INVALID_PTR(client)) + { + printk(KERN_CRIT "invalid i2c client"); + return -1; + } + + ret = i2c_smbus_read_byte_data(client, reg); + if (ret >= 0) { + *value = (unsigned char)ret; + } + else + { + *value = 0; + printk(KERN_CRIT "i2c_smbus op failed: ret=%d reg=%d\n",ret ,reg); + return ret; + } + + return 0; +} + +static int e582_48x6q_smbus_write_reg(struct i2c_client *client, unsigned char reg, unsigned char value) +{ + int ret = 0; + + if (IS_INVALID_PTR(client)) + { + printk(KERN_CRIT "invalid i2c client"); + return -1; + } + + ret = i2c_smbus_write_byte_data(client, reg, value); + if (ret != 0) + { + printk(KERN_CRIT "i2c_smbus op failed: ret=%d reg=%d\n",ret ,reg); + return ret; + } + + return 0; +} +#endif + +#if SEP("drivers:psu") +static struct class* psu_class = NULL; +static struct device* psu_dev_psu1 = NULL; +static struct device* psu_dev_psu2 = NULL; + +static ssize_t e582_48x6q_psu_read_presence(struct device *dev, struct device_attribute *attr, char *buf) +{ + int ret = 0; + unsigned char present_no = 0; + unsigned char present = 0; + unsigned char value = 0; + struct i2c_client *i2c_psu_client = NULL; + + if (psu_dev_psu1 == dev) + { + i2c_psu_client = i2c_client_gpio0; + present_no = 17; + } + else if (psu_dev_psu2 == dev) + { + i2c_psu_client = i2c_client_gpio0; + present_no = 9; + } + else + { + return sprintf(buf, "Error: unknown psu device\n"); + } + + if (IS_INVALID_PTR(i2c_psu_client)) + { + return sprintf(buf, "Error: psu i2c-adapter invalid\n"); + } + + ret = e582_48x6q_smbus_read_reg(i2c_psu_client, present_no/8, &present); + if (ret != 0) + { + return sprintf(buf, "Error: read psu data:%s failed\n", attr->attr.name); + } + + value = ((present & (1<<(present_no%8))) ? 1 : 0 ); + + return sprintf(buf, "%d\n", value); +} + +static ssize_t e582_48x6q_psu_read_status(struct device *dev, struct device_attribute *attr, char *buf) +{ + int ret = 0; + unsigned char workstate_no = 0; + unsigned char workstate = 0; + unsigned char value = 0; + struct i2c_client *i2c_psu_client = NULL; + + if (psu_dev_psu1 == dev) + { + i2c_psu_client = i2c_client_gpio0; + workstate_no = 21; + } + else if (psu_dev_psu2 == dev) + { + i2c_psu_client = i2c_client_gpio0; + workstate_no = 13; + } + else + { + return sprintf(buf, "Error: unknown psu device\n"); + } + + if (IS_INVALID_PTR(i2c_psu_client)) + { + return sprintf(buf, "Error: psu i2c-adapter invalid\n"); + } + + ret = e582_48x6q_smbus_read_reg(i2c_psu_client, workstate_no/8, &workstate); + if (ret != 0) + { + return sprintf(buf, "Error: read psu data:%s failed\n", attr->attr.name); + } + + if (ret != 0) + { + return sprintf(buf, "Error: read psu data:%s failed\n", attr->attr.name); + } + + value = ((workstate & (1<<(workstate_no%8))) ? 1 : 0 ); + + return sprintf(buf, "%d\n", value); +} + +static DEVICE_ATTR(psu_presence, S_IRUGO, e582_48x6q_psu_read_presence, NULL); +static DEVICE_ATTR(psu_status, S_IRUGO, e582_48x6q_psu_read_status, NULL); + +static int e582_48x6q_init_psu(void) +{ + int ret = 0; + + psu_class = class_create(THIS_MODULE, "psu"); + if (IS_INVALID_PTR(psu_class)) + { + psu_class = NULL; + printk(KERN_CRIT "create e582_48x6q class psu failed\n"); + return -1; + } + + psu_dev_psu1 = device_create(psu_class, NULL, MKDEV(222,0), NULL, "psu1"); + if (IS_INVALID_PTR(psu_dev_psu1)) + { + psu_dev_psu1 = NULL; + printk(KERN_CRIT "create e582_48x6q psu1 device failed\n"); + return -1; + } + + psu_dev_psu2 = device_create(psu_class, NULL, MKDEV(222,1), NULL, "psu2"); + if (IS_INVALID_PTR(psu_dev_psu2)) + { + psu_dev_psu2 = NULL; + printk(KERN_CRIT "create e582_48x6q psu2 device failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu1, &dev_attr_psu_presence); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q psu1 device attr:presence failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu1, &dev_attr_psu_status); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q psu1 device attr:status failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu2, &dev_attr_psu_presence); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q psu2 device attr:presence failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu2, &dev_attr_psu_status); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q psu2 device attr:status failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x6q_exit_psu(void) +{ + if (IS_VALID_PTR(psu_dev_psu1)) + { + device_remove_file(psu_dev_psu1, &dev_attr_psu_presence); + device_remove_file(psu_dev_psu1, &dev_attr_psu_status); + device_destroy(psu_class, MKDEV(222,0)); + } + + if (IS_VALID_PTR(psu_dev_psu2)) + { + device_remove_file(psu_dev_psu2, &dev_attr_psu_presence); + device_remove_file(psu_dev_psu2, &dev_attr_psu_status); + device_destroy(psu_class, MKDEV(222,1)); + } + + if (IS_VALID_PTR(psu_class)) + { + class_destroy(psu_class); + psu_class = NULL; + } + + return 0; +} +#endif + +#if SEP("drivers:leds") +extern void e582_48x6q_led_set(struct led_classdev *led_cdev, enum led_brightness set_value); +extern enum led_brightness e582_48x6q_led_get(struct led_classdev *led_cdev); +extern void e582_48x6q_led_port_set(struct led_classdev *led_cdev, enum led_brightness set_value); +extern enum led_brightness e582_48x6q_led_port_get(struct led_classdev *led_cdev); + +static struct led_classdev led_dev_system = { + .name = "system", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_idn = { + .name = "idn", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_fan1 = { + .name = "fan1", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_fan2 = { + .name = "fan2", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_fan3 = { + .name = "fan3", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_fan4 = { + .name = "fan4", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_psu1 = { + .name = "psu1", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_psu2 = { + .name = "psu2", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_port[PORT_NUM] = { +{ .name = "port1", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port2", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port3", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port4", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port5", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port6", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port7", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port8", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port9", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port10", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port11", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port12", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port13", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port14", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port15", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port16", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port17", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port18", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port19", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port20", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port21", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port22", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port23", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port24", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port25", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port26", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port27", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port28", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port29", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port30", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port31", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port32", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port33", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port34", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port35", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port36", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port37", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port38", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port39", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port40", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port41", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port42", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port43", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port44", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port45", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port46", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port47", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port48", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port49", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port50", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port51", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port52", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port53", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port54", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,} +}; +static unsigned char port_led_mode[PORT_NUM] = {0}; + +void e582_48x6q_led_set(struct led_classdev *led_cdev, enum led_brightness set_value) +{ + int ret = 0; + unsigned char reg = 0; + unsigned char mask = 0; + unsigned char shift = 0; + unsigned char led_value = 0; + struct i2c_client *i2c_led_client = i2c_client_epld; + + if (0 == strcmp(led_dev_system.name, led_cdev->name)) + { + reg = 0x2; + mask = 0x0F; + shift = 4; + } + else if (0 == strcmp(led_dev_idn.name, led_cdev->name)) + { + reg = 0x3; + mask = 0xFE; + shift = 0; + } + else if (0 == strcmp(led_dev_fan1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan2.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan3.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan4.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu2.name, led_cdev->name)) + { + goto not_support; + } + else + { + goto not_support; + } + + ret = e582_48x6q_smbus_read_reg(i2c_led_client, reg, &led_value); + if (ret != 0) + { + printk(KERN_CRIT "Error: read %s led attr failed\n", led_cdev->name); + return; + } + + led_value = ((led_value & mask) | ((set_value << shift) & (~mask))); + + ret = e582_48x6q_smbus_write_reg(i2c_led_client, reg, led_value); + if (ret != 0) + { + printk(KERN_CRIT "Error: write %s led attr failed\n", led_cdev->name); + return; + } + + return; + +not_support: + + printk(KERN_INFO "Error: not support device:%s\n", led_cdev->name); + return; +} + +enum led_brightness e582_48x6q_led_get(struct led_classdev *led_cdev) +{ + int ret = 0; + unsigned char reg = 0; + unsigned char mask = 0; + unsigned char shift = 0; + unsigned char led_value = 0; + struct i2c_client *i2c_led_client = i2c_client_epld; + + if (0 == strcmp(led_dev_system.name, led_cdev->name)) + { + reg = 0x2; + mask = 0xF0; + shift = 4; + } + else if (0 == strcmp(led_dev_idn.name, led_cdev->name)) + { + reg = 0x3; + mask = 0x01; + shift = 0; + } + else if (0 == strcmp(led_dev_fan1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan2.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan3.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan4.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu2.name, led_cdev->name)) + { + goto not_support; + } + else + { + goto not_support; + } + + ret = e582_48x6q_smbus_read_reg(i2c_led_client, reg, &led_value); + if (ret != 0) + { + printk(KERN_CRIT "Error: read %s led attr failed\n", led_cdev->name); + return 0; + } + + led_value = ((led_value & mask) >> shift); + + return led_value; + +not_support: + + printk(KERN_INFO "Error: not support device:%s\n", led_cdev->name); + return 0; +} + +void e582_48x6q_led_port_set(struct led_classdev *led_cdev, enum led_brightness set_value) +{ + int portNum = 0; + + sscanf(led_cdev->name, "port%d", &portNum); + + port_led_mode[portNum-1] = set_value; + + return; +} + +enum led_brightness e582_48x6q_led_port_get(struct led_classdev *led_cdev) +{ + int portNum = 0; + + sscanf(led_cdev->name, "port%d", &portNum); + + return port_led_mode[portNum-1]; +} + +static int e582_48x6q_init_led(void) +{ + int ret = 0; + int i = 0; + + ret = led_classdev_register(NULL, &led_dev_system); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_system device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_idn); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_idn device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan1); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_fan1 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan2); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_fan2 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan3); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_fan3 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan4); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_fan4 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_psu1); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_psu1 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_psu2); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_psu2 device failed\n"); + return -1; + } + + for (i=0; i PORT_NUM)) + { + printk(KERN_CRIT "sfp read presence, invalid port number!\n"); + value = 0; + } + + if ((portNum >= 1) && (portNum <= 8)) + { + reg_no = portNum + 31;/*32-39*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 9) && (portNum <= 16)) + { + reg_no = portNum + 7;/*16-23*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 17) && (portNum <= 24)) + { + reg_no = portNum - 17;/*0-7*/ + i2c_sfp_client = i2c_client_gpio2; + } + else if ((portNum >= 25) && (portNum <= 32)) + { + reg_no = portNum - 1;/*24-31*/ + i2c_sfp_client = i2c_client_gpio2; + } + else if ((portNum >= 33) && (portNum <= 40)) + { + reg_no = portNum - 25;/*8-15*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 41) && (portNum <= 48)) + { + reg_no = portNum - 9;/*32-39*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 49) && (portNum <= 54)) + { + reg_no = portNum - 25;/*24-29*/ + i2c_sfp_client = i2c_client_gpio4; + } + + dir_bank = (reg_no/8) + 0x18; + ret = e582_48x6q_smbus_write_reg(i2c_sfp_client, dir_bank, 0xff); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s set dir-ctl failed\n", attr->attr.name); + } + + input_bank = (reg_no/8) + 0x0; + ret = e582_48x6q_smbus_read_reg(i2c_sfp_client, input_bank, &value); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s failed\n", attr->attr.name); + } + + value = ((value & (1<<(reg_no%8))) ? 0 : 1 );/*1:PRESENT 0:ABSENT*/ + + return sprintf(buf, "%d\n", value); +} + +static ssize_t e582_48x6q_sfp_read_enable(struct device *dev, struct device_attribute *attr, char *buf) +{ + int ret = 0; + unsigned char value = 0; + unsigned char reg_no = 0; + unsigned char dir_bank = 0; + unsigned char input_bank = 0; + int portNum = 0; + const char *name = dev_name(dev); + struct i2c_client *i2c_sfp_client = NULL; + + sscanf(name, "sfp%d", &portNum); + + if ((portNum < 1) || (portNum > PORT_NUM)) + { + printk(KERN_CRIT "sfp read presence, invalid port number!\n"); + value = 0; + } + + if ((portNum >= 1) && (portNum <= 8)) + { + reg_no = portNum + 23;/*24-31*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 9) && (portNum <= 16)) + { + reg_no = portNum - 1;/*8-15*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 17) && (portNum <= 24)) + { + reg_no = portNum + 15;/*32-39*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 25) && (portNum <= 32)) + { + reg_no = portNum - 9;/*16-23*/ + i2c_sfp_client = i2c_client_gpio2; + } + else if ((portNum >= 33) && (portNum <= 40)) + { + reg_no = portNum - 33;/*0-7*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 41) && (portNum <= 48)) + { + reg_no = portNum - 17;/*24-31*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 49) && (portNum <= 54)) + { + printk(KERN_INFO "%s not supported!\n", name); + return sprintf(buf, "%d\n", 0); + } + + dir_bank = (reg_no/8) + 0x18; + ret = e582_48x6q_smbus_write_reg(i2c_sfp_client, dir_bank, 0xff); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s set dir-ctl failed\n", attr->attr.name); + } + + input_bank = (reg_no/8) + 0x8; + ret = e582_48x6q_smbus_read_reg(i2c_sfp_client, input_bank, &value); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s failed\n", attr->attr.name); + } + + value = ((value & (1<<(reg_no%8))) ? 0 : 1 ); + + return sprintf(buf, "%d\n", value); +} + +static ssize_t e582_48x6q_sfp_write_enable(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + int ret = 0; + unsigned char value = 0; + unsigned char set_value = simple_strtol(buf, NULL, 10); + unsigned char reg_no = 0; + unsigned char dir_bank = 0; + unsigned char input_bank = 0; + unsigned char output_bank = 0; + int portNum = 0; + const char *name = dev_name(dev); + struct i2c_client *i2c_sfp_client = NULL; + + sscanf(name, "sfp%d", &portNum); + + if ((portNum < 1) || (portNum > PORT_NUM)) + { + printk(KERN_CRIT "sfp read presence, invalid port number!\n"); + return size; + } + + if ((portNum >= 1) && (portNum <= 8)) + { + reg_no = portNum + 23;/*24-31*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 9) && (portNum <= 16)) + { + reg_no = portNum - 1;/*8-15*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 17) && (portNum <= 24)) + { + reg_no = portNum + 15;/*32-39*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 25) && (portNum <= 32)) + { + reg_no = portNum - 9;/*16-23*/ + i2c_sfp_client = i2c_client_gpio2; + } + else if ((portNum >= 33) && (portNum <= 40)) + { + reg_no = portNum - 33;/*0-7*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 41) && (portNum <= 48)) + { + reg_no = portNum - 17;/*24-31*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 49) && (portNum <= 54)) + { + printk(KERN_INFO "%s not supported!\n", name); + return size; + } + + set_value = ((set_value > 0) ? 0 : 1 ); + + dir_bank = (reg_no/8) + 0x18; + ret = e582_48x6q_smbus_write_reg(i2c_sfp_client, dir_bank, 0x0); + if (ret != 0) + { + printk(KERN_CRIT "Error: read sfp data:%s set dir-ctl failed\n", attr->attr.name); + return size; + } + + input_bank = (reg_no/8) + 0x8; + ret = e582_48x6q_smbus_read_reg(i2c_sfp_client, input_bank, &value); + if (ret != 0) + { + printk(KERN_CRIT "Error: read %s presence failed\n", name); + return size; + } + + if (set_value) + { + value = (value | (1<<(reg_no % 8))); + } + else + { + value = (value & (~(1<<(reg_no % 8)))); + } + + output_bank = (reg_no/8) + 0x8; + ret = e582_48x6q_smbus_write_reg(i2c_sfp_client, output_bank, value); + if (ret != 0) + { + printk(KERN_CRIT "Error: write %s presence failed\n", name); + return size; + } + + return size; +} + +static DEVICE_ATTR(sfp_presence, S_IRUGO, e582_48x6q_sfp_read_presence, NULL); +static DEVICE_ATTR(sfp_enable, S_IRUGO|S_IWUSR, e582_48x6q_sfp_read_enable, e582_48x6q_sfp_write_enable); +static int e582_48x6q_init_sfp(void) +{ + int ret = 0; + int i = 0; + + sfp_class = class_create(THIS_MODULE, "sfp"); + if (IS_INVALID_PTR(sfp_class)) + { + sfp_class = NULL; + printk(KERN_CRIT "create e582_48x6q class sfp failed\n"); + return -1; + } + + for (i=1; i<=PORT_NUM; i++) + { + sfp_dev[i] = device_create(sfp_class, NULL, MKDEV(223,i), NULL, "sfp%d", i); + if (IS_INVALID_PTR(sfp_dev[i])) + { + sfp_dev[i] = NULL; + printk(KERN_CRIT "create e582_48x6q sfp[%d] device failed\n", i); + continue; + } + + ret = device_create_file(sfp_dev[i], &dev_attr_sfp_presence); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q sfp[%d] device attr:presence failed\n", i); + continue; + } + + ret = device_create_file(sfp_dev[i], &dev_attr_sfp_enable); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q sfp[%d] device attr:enable failed\n", i); + continue; + } + } + + return ret; +} + +static int e582_48x6q_exit_sfp(void) +{ + int i = 0; + + for (i=1; i<=PORT_NUM; i++) + { + if (IS_VALID_PTR(sfp_dev[i])) + { + device_remove_file(sfp_dev[i], &dev_attr_sfp_presence); + device_remove_file(sfp_dev[i], &dev_attr_sfp_enable); + device_destroy(sfp_class, MKDEV(223,i)); + sfp_dev[i] = NULL; + } + } + + if (IS_VALID_PTR(sfp_class)) + { + class_destroy(sfp_class); + sfp_class = NULL; + } + + return 0; +} +#endif + +static int e582_48x6q_init(void) +{ + int ret = 0; + int failed = 0; + + printk(KERN_ALERT "install e582_48x6q board dirver...\n"); + + ret = e582_48x6q_init_i2c_master(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_i2c_pca9548(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_i2c_adt7470(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_i2c_psu(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_i2c_epld(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_i2c_gpio(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_psu(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_led(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_sfp(); + if (ret != 0) + { + failed = 1; + } + + if (failed) + printk(KERN_INFO "install e582_48x6q board driver failed\n"); + else + printk(KERN_ALERT "install e582_48x6q board dirver...ok\n"); + + return 0; +} + +static void e582_48x6q_exit(void) +{ + printk(KERN_INFO "uninstall e582_48x6q board dirver...\n"); + + e582_48x6q_exit_sfp(); + e582_48x6q_exit_led(); + e582_48x6q_exit_psu(); + e582_48x6q_exit_i2c_gpio(); + e582_48x6q_exit_i2c_epld(); + e582_48x6q_exit_i2c_psu(); + e582_48x6q_exit_i2c_adt7470(); + e582_48x6q_exit_i2c_pca9548(); + e582_48x6q_exit_i2c_master(); +} + +MODULE_LICENSE("Dual BSD/GPL"); +MODULE_AUTHOR("yangbs centecNetworks, Inc"); +MODULE_DESCRIPTION("e582-48x6q board driver"); +module_init(e582_48x6q_init); +module_exit(e582_48x6q_exit); + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_kernel.c b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_kernel.c new file mode 100644 index 00000000000..32a38f842cf --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_kernel.c @@ -0,0 +1,1833 @@ +/** + @file dal_kernal.c + + @date 2012-10-18 + + @version v2.0 + + +*/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) +#include +#endif +#include "dal_kernel.h" +#include "dal_mpool.h" +#include +MODULE_AUTHOR("Centec Networks Inc."); +MODULE_DESCRIPTION("DAL kernel module"); +MODULE_LICENSE("GPL"); + +/* DMA memory pool size */ +static char* dma_pool_size; +module_param(dma_pool_size, charp, 0); +MODULE_PARM_DESC(dma_pool_size, + "Specify DMA memory pool size (default 4MB)"); + +/***************************************************************************** + * defines + *****************************************************************************/ +#define MB_SIZE 0x100000 +#define CTC_MAX_INTR_NUM 8 + +#define MEM_MAP_RESERVE SetPageReserved +#define MEM_MAP_UNRESERVE ClearPageReserved + +#define CTC_VENDOR_VID 0xc001 +#define CTC_HUMBER_DEVICE_ID 0x6048 +#define CTC_GOLDENGATE_DEVICE_ID 0xc010 +#define CTC_PCIE_VENDOR_ID 0xcb10 +#define CTC_DUET2_DEVICE_ID 0x7148 + +#define MEM_MAP_RESERVE SetPageReserved +#define MEM_MAP_UNRESERVE ClearPageReserved + +#define CTC_GREATBELT_DEVICE_ID 0x03e8 /* TBD */ +#define DAL_MAX_CHIP_NUM 8 /* [GB] used */ +#define VIRT_TO_PAGE(p) virt_to_page((p)) +#define DAL_UNTAG_BLOCK 0 +#define DAL_DISCARD_BLOCK 1 +#define DAL_MATCHED_BLOCK 2 +#define DAL_CUR_MATCH_BLOCk 3 +/***************************************************************************** + * typedef + *****************************************************************************/ +/* Control Data */ +typedef struct dal_isr_s +{ + int irq; + void (* isr)(void*); + void* isr_data; + int trigger; + int count; + wait_queue_head_t wqh; +} dal_isr_t; + +typedef struct dal_kernel_dev_s +{ + struct list_head list; + struct pci_dev* pci_dev; + + /* PCI I/O mapped base address */ + uintptr logic_address; + + /* Physical address */ + unsigned long long phys_address; +} dal_kern_dev_t; + +typedef struct _dma_segment +{ + struct list_head list; + unsigned long req_size; /* Requested DMA segment size */ + unsigned long blk_size; /* DMA block size */ + unsigned long blk_order; /* DMA block size in alternate format */ + unsigned long seg_size; /* Current DMA segment size */ + unsigned long seg_begin; /* Logical address of segment */ + unsigned long seg_end; /* Logical end address of segment */ + unsigned long* blk_ptr; /* Array of logical DMA block addresses */ + int blk_cnt_max; /* Maximum number of block to allocate */ + int blk_cnt; /* Current number of blocks allocated */ +} dma_segment_t; + +typedef irqreturn_t (*p_func) (int irq, void* dev_id); + +/*************************************************************************** + *declared + ***************************************************************************/ +static unsigned int linux_dal_poll0(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll1(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll2(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll3(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll4(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll5(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll6(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll7(struct file* filp, struct poll_table_struct* p); + +/***************************************************************************** + * global variables + *****************************************************************************/ +static dal_kern_dev_t dal_dev[DAL_MAX_CHIP_NUM]; +static dal_isr_t dal_isr[CTC_MAX_INTR_NUM]; +static int dal_chip_num = 0; +static int dal_version = 0; +static int dal_intr_num = 0; +static int use_high_memory = 0; +static unsigned int* dma_virt_base[DAL_MAX_CHIP_NUM]; +#ifndef DMA_MEM_MODE_PLATFORM +static unsigned int* dma_virt_base_tmp[DAL_MAX_CHIP_NUM]; +#endif +static unsigned long long dma_phy_base[DAL_MAX_CHIP_NUM]; +static unsigned int dma_mem_size = 0xc00000; +static unsigned int msi_irq_base[DAL_MAX_CHIP_NUM]; +static unsigned int msi_irq_num[DAL_MAX_CHIP_NUM]; +static unsigned int msi_used = 0; +static struct class *dal_class; + +static LIST_HEAD(_dma_seg); +static int dal_debug = 0; +module_param(dal_debug, int, 0); +MODULE_PARM_DESC(dal_debug, "Set debug level (default 0)"); + +static struct pci_device_id dal_id_table[] = +{ + {PCI_DEVICE(CTC_VENDOR_VID, CTC_GREATBELT_DEVICE_ID)}, + {PCI_DEVICE(CTC_PCIE_VENDOR_ID, CTC_GOLDENGATE_DEVICE_ID)}, + {PCI_DEVICE((CTC_PCIE_VENDOR_ID+1), (CTC_GOLDENGATE_DEVICE_ID+1))}, + {PCI_DEVICE(CTC_PCIE_VENDOR_ID, CTC_DUET2_DEVICE_ID)}, + {0, }, +}; + +static wait_queue_head_t poll_intr[CTC_MAX_INTR_NUM]; + +p_func intr_handler_fun[CTC_MAX_INTR_NUM]; + +static int poll_intr_trigger[CTC_MAX_INTR_NUM]; + +static struct file_operations dal_intr_fops[CTC_MAX_INTR_NUM] = +{ + { + .owner = THIS_MODULE, + .poll = linux_dal_poll0, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll1, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll2, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll3, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll4, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll5, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll6, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll7, + }, +}; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)) +#include +#define virt_to_bus virt_to_phys +#define bus_to_virt phys_to_virt +#endif +/***************************************************************************** + * macros + *****************************************************************************/ +#define VERIFY_CHIP_INDEX(n) (n < dal_chip_num) + +#define _KERNEL_INTERUPT_PROCESS +static irqreturn_t +intr0_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + + if(poll_intr_trigger[0]) + { + return IRQ_HANDLED; + } + + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[0] = 1; + wake_up(&poll_intr[0]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr1_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[1]) + { + return IRQ_HANDLED; + } + + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[1] = 1; + wake_up(&poll_intr[1]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr2_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[2]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[2] = 1; + wake_up(&poll_intr[2]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr3_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[3]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[3] = 1; + wake_up(&poll_intr[3]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr4_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[4]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[4] = 1; + wake_up(&poll_intr[4]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr5_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[5]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[5] = 1; + wake_up(&poll_intr[5]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr6_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[6]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[6] = 1; + wake_up(&poll_intr[6]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr7_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[7]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[7] = 1; + wake_up(&poll_intr[7]); + } + } + + return IRQ_HANDLED; +} + +int +dal_interrupt_register(unsigned int irq, int prio, void (* isr)(void*), void* data) +{ + int ret; + unsigned char str[16]; + unsigned char* int_name = NULL; + unsigned int intr_num_tmp = 0; + unsigned int intr_num = CTC_MAX_INTR_NUM; + unsigned long irq_flags = 0; + + if (dal_intr_num >= CTC_MAX_INTR_NUM) + { + printk("Interrupt numbers exceeds max.\n"); + return -1; + } + + if (msi_used) + { + int_name = "dal_msi"; + } + else + { + int_name = "dal_intr"; + } + + + for (intr_num_tmp=0;intr_num_tmp < CTC_MAX_INTR_NUM; intr_num_tmp++) + { + if (irq == dal_isr[intr_num_tmp].irq) + { + if (0 == msi_used) + { + dal_isr[intr_num_tmp].count++; + printk("Interrupt irq %d register count %d.\n", irq, dal_isr[intr_num_tmp].count); + } + return 0; + } + if ((0 == dal_isr[intr_num_tmp].irq) && (CTC_MAX_INTR_NUM == intr_num)) + { + intr_num = intr_num_tmp; + dal_isr[intr_num].count = 0; + } + } + dal_isr[intr_num].irq = irq; + dal_isr[intr_num].isr = isr; + dal_isr[intr_num].isr_data = data; + dal_isr[intr_num].count++; + + init_waitqueue_head(&poll_intr[intr_num]); + + /* only user mode */ + if ((NULL == isr) && (NULL == data)) + { + snprintf(str, 16, "%s%d", "dal_intr", intr_num); + ret = register_chrdev(DAL_DEV_INTR_MAJOR_BASE + intr_num, + str, &dal_intr_fops[intr_num]); + if (ret < 0) + { + printk("Register character device for irq %d failed, ret= %d", irq, ret); + return ret; + } + } +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) + irq_flags = 0; +#else + irq_flags = IRQF_DISABLED; +#endif + if ((ret = request_irq(irq, + intr_handler_fun[intr_num], + irq_flags, + int_name, + &dal_isr[intr_num])) < 0) + { + printk("Cannot request irq %d, ret %d.\n", irq, ret); + unregister_chrdev(DAL_DEV_INTR_MAJOR_BASE + intr_num, str); + } + + if (0 == ret) + { + dal_intr_num++; + } + + return ret; +} + +int +dal_interrupt_unregister(unsigned int irq) +{ + unsigned char str[16]; + int intr_idx = 0; + int find_flag = 0; + + /* get intr device index */ + for (intr_idx = 0; intr_idx < CTC_MAX_INTR_NUM; intr_idx++) + { + if (dal_isr[intr_idx].irq == irq) + { + find_flag = 1; + break; + } + } + + if (find_flag == 0) + { + printk ("irq%d is not registered! unregister failed \n", irq); + return -1; + } + + dal_isr[intr_idx].count--; + if (0 != dal_isr[intr_idx].count) + { + printk("Interrupt irq %d unregister count %d.\n", irq, dal_isr[intr_idx].count); + return -1; + } + snprintf(str, 16, "%s%d", "dal_intr", intr_idx); + + unregister_chrdev(DAL_DEV_INTR_MAJOR_BASE + intr_idx, str); + + free_irq(irq, &dal_isr[intr_idx]); + + dal_isr[intr_idx].irq = 0; + + dal_intr_num--; + + return 0; +} + +int +dal_interrupt_set_en(unsigned int irq, unsigned int enable) +{ + enable ? enable_irq(irq) : disable_irq_nosync(irq); + return 0; +} + +static int +_dal_set_msi_enabe(unsigned int lchip, unsigned int irq_num) +{ + int ret = 0; + + if (irq_num == 1) + { + ret = pci_enable_msi(dal_dev[lchip].pci_dev); + if (ret) + { + printk ("msi enable failed!!! lchip = %d, irq_num = %d\n", lchip, irq_num); + pci_disable_msi(dal_dev[lchip].pci_dev); + msi_used = 0; + } + + msi_irq_base[lchip] = dal_dev[lchip].pci_dev->irq; + msi_irq_num[lchip] = 1; + } + else + { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 79)) + ret = pci_enable_msi_exact(dal_dev[lchip].pci_dev, irq_num); +#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 26, 32)) + ret = pci_enable_msi_block(dal_dev[lchip].pci_dev, irq_num); +#else + ret = -1; +#endif + if (ret) + { + printk ("msi enable failed!!! lchip = %d, irq_num = %d\n", lchip, irq_num); + pci_disable_msi(dal_dev[lchip].pci_dev); + msi_used = 0; + } + + msi_irq_base[lchip] = dal_dev[lchip].pci_dev->irq; + msi_irq_num[lchip] = irq_num; + } + + return ret; +} + +static int +_dal_set_msi_disable(unsigned int lchip) +{ + + pci_disable_msi(dal_dev[lchip].pci_dev); + + msi_irq_base[lchip] = 0; + msi_irq_num[lchip] = 0; + + return 0; +} + +int +dal_set_msi_cap(unsigned long arg) +{ + int ret = 0; + int index = 0; + dal_msi_info_t msi_info; + + if (copy_from_user(&msi_info, (void*)arg, sizeof(dal_msi_info_t))) + { + return -EFAULT; + } + + printk("####dal_set_msi_cap lchip %d base %d num:%d\n", msi_info.lchip, msi_info.irq_base, msi_info.irq_num); + if (msi_info.irq_num > 0) + { + if (0 == msi_used) + { + msi_used = 1; + ret = _dal_set_msi_enabe(msi_info.lchip, msi_info.irq_num); + } + else if ((1 == msi_used) && (msi_info.irq_num != msi_irq_num[msi_info.lchip])) + { + for (index = 0; index < msi_irq_num[msi_info.lchip]; index++) + { + dal_interrupt_unregister(msi_irq_base[msi_info.lchip]+index); + } + _dal_set_msi_disable(msi_info.lchip); + msi_used = 1; + ret = _dal_set_msi_enabe(msi_info.lchip, msi_info.irq_num); + } + } + else + { + msi_used = 0; + ret = _dal_set_msi_disable(msi_info.lchip); + } + + return ret; +} + +int +dal_user_interrupt_register(unsigned long arg) +{ + int irq = 0; + if (copy_from_user(&irq, (void*)arg, sizeof(int))) + { + return -EFAULT; + } + printk("####register interrupt irq:%d\n", irq); + return dal_interrupt_register(irq, 0, NULL, NULL); +} + +int +dal_user_interrupt_unregister(unsigned long arg) +{ + int irq = 0; + if (copy_from_user(&irq, (void*)arg, sizeof(int))) + { + return -EFAULT; + } + printk("####unregister interrupt irq:%d\n", irq); + return dal_interrupt_unregister(irq); +} + +int +dal_user_interrupt_set_en(unsigned long arg) +{ + dal_intr_parm_t dal_intr_parm; + + if (copy_from_user(&dal_intr_parm, (void*)arg, sizeof(dal_intr_parm_t))) + { + return -EFAULT; + } + + return dal_interrupt_set_en(dal_intr_parm.irq, dal_intr_parm.enable); +} + +/* + * Function: _dal_dma_segment_free + */ + +/* + * Function: _find_largest_segment + * + * Purpose: + * Find largest contiguous segment from a pool of DMA blocks. + * Parameters: + * dseg - DMA segment descriptor + * Returns: + * 0 on success, < 0 on error. + * Notes: + * Assembly stops if a segment of the requested segment size + * has been obtained. + * + * Lower address bits of the DMA blocks are used as follows: + * 0: Untagged + * 1: Discarded block + * 2: Part of largest contiguous segment + * 3: Part of current contiguous segment + */ +#ifndef DMA_MEM_MODE_PLATFORM +static int +_dal_find_largest_segment(dma_segment_t* dseg) +{ + int i, j, blks, found; + unsigned long seg_begin; + unsigned long seg_end; + unsigned long seg_tmp; + + blks = dseg->blk_cnt; + + /* Clear all block tags */ + for (i = 0; i < blks; i++) + { + dseg->blk_ptr[i] &= ~3; + } + + for (i = 0; i < blks && dseg->seg_size < dseg->req_size; i++) + { + /* First block must be an untagged block */ + if ((dseg->blk_ptr[i] & 3) == DAL_UNTAG_BLOCK) + { + /* Initial segment size is the block size */ + seg_begin = dseg->blk_ptr[i]; + seg_end = seg_begin + dseg->blk_size; + dseg->blk_ptr[i] |= DAL_CUR_MATCH_BLOCk; + + /* Loop looking for adjacent blocks */ + do + { + found = 0; + + for (j = i + 1; j < blks && (seg_end - seg_begin) < dseg->req_size; j++) + { + seg_tmp = dseg->blk_ptr[j]; + /* Check untagged blocks only */ + if ((seg_tmp & 3) == DAL_UNTAG_BLOCK) + { + if (seg_tmp == (seg_begin - dseg->blk_size)) + { + /* Found adjacent block below current segment */ + dseg->blk_ptr[j] |= DAL_CUR_MATCH_BLOCk; + seg_begin = seg_tmp; + found = 1; + } + else if (seg_tmp == seg_end) + { + /* Found adjacent block above current segment */ + dseg->blk_ptr[j] |= DAL_CUR_MATCH_BLOCk; + seg_end += dseg->blk_size; + found = 1; + } + } + } + } + while (found); + + if ((seg_end - seg_begin) > dseg->seg_size) + { + /* The current block is largest so far */ + dseg->seg_begin = seg_begin; + dseg->seg_end = seg_end; + dseg->seg_size = seg_end - seg_begin; + + /* Re-tag current and previous largest segment */ + for (j = 0; j < blks; j++) + { + if ((dseg->blk_ptr[j] & 3) == DAL_CUR_MATCH_BLOCk) + { + /* Tag current segment as the largest */ + dseg->blk_ptr[j] &= ~1; + } + else if ((dseg->blk_ptr[j] & 3) == DAL_MATCHED_BLOCK) + { + /* Discard previous largest segment */ + dseg->blk_ptr[j] ^= 3; + } + } + } + else + { + /* Discard all blocks in current segment */ + for (j = 0; j < blks; j++) + { + if ((dseg->blk_ptr[j] & 3) == DAL_CUR_MATCH_BLOCk) + { + dseg->blk_ptr[j] &= ~2; + } + } + } + } + } + + return 0; +} + +/* + * Function: _alloc_dma_blocks + */ +static int +_dal_alloc_dma_blocks(dma_segment_t* dseg, int blks) +{ + int i, start; + unsigned long addr; + + if (dseg->blk_cnt + blks > dseg->blk_cnt_max) + { + printk("No more DMA blocks\n"); + return -1; + } + + start = dseg->blk_cnt; + dseg->blk_cnt += blks; + + for (i = start; i < dseg->blk_cnt; i++) + { + addr = __get_free_pages(GFP_ATOMIC, dseg->blk_order); + if (addr) + { + dseg->blk_ptr[i] = addr; + } + else + { + printk("DMA allocation failed\n"); + return -1; + } + } + + return 0; +} + +/* + * Function: _dal_dma_segment_alloc + */ +static dma_segment_t* +_dal_dma_segment_alloc(unsigned int size, unsigned int blk_size) +{ + dma_segment_t* dseg; + int i, blk_ptr_size; + unsigned long page_addr; + struct sysinfo si; + + /* Sanity check */ + if (size == 0 || blk_size == 0) + { + return NULL; + } + + /* Allocate an initialize DMA segment descriptor */ + if ((dseg = kmalloc(sizeof(dma_segment_t), GFP_ATOMIC)) == NULL) + { + return NULL; + } + + memset(dseg, 0, sizeof(dma_segment_t)); + dseg->req_size = size; + dseg->blk_size = PAGE_ALIGN(blk_size); + + while ((PAGE_SIZE << dseg->blk_order) < dseg->blk_size) + { + dseg->blk_order++; + } + + si_meminfo(&si); + dseg->blk_cnt_max = (si.totalram << PAGE_SHIFT) / dseg->blk_size; + blk_ptr_size = dseg->blk_cnt_max * sizeof(unsigned long); + /* Allocate an initialize DMA block pool */ + dseg->blk_ptr = kmalloc(blk_ptr_size, GFP_KERNEL); + if (dseg->blk_ptr == NULL) + { + kfree(dseg); + return NULL; + } + + memset(dseg->blk_ptr, 0, blk_ptr_size); + /* Allocate minimum number of blocks */ + _dal_alloc_dma_blocks(dseg, dseg->req_size / dseg->blk_size); + + /* Allocate more blocks until we have a complete segment */ + do + { + _dal_find_largest_segment(dseg); + if (dseg->seg_size >= dseg->req_size) + { + break; + } + } + while (_dal_alloc_dma_blocks(dseg, 8) == 0); + + /* Reserve all pages in the DMA segment and free unused blocks */ + for (i = 0; i < dseg->blk_cnt; i++) + { + if ((dseg->blk_ptr[i] & 3) == 2) + { + dseg->blk_ptr[i] &= ~3; + + for (page_addr = dseg->blk_ptr[i]; + page_addr < dseg->blk_ptr[i] + dseg->blk_size; + page_addr += PAGE_SIZE) + { + MEM_MAP_RESERVE(VIRT_TO_PAGE((void*)page_addr)); + } + } + else if (dseg->blk_ptr[i]) + { + dseg->blk_ptr[i] &= ~3; + free_pages(dseg->blk_ptr[i], dseg->blk_order); + dseg->blk_ptr[i] = 0; + } + } + + return dseg; +} + +/* + * Function: _dal_dma_segment_free + */ +static void +_dal_dma_segment_free(dma_segment_t* dseg) +{ + int i; + unsigned long page_addr; + + if (dseg->blk_ptr) + { + for (i = 0; i < dseg->blk_cnt; i++) + { + if (dseg->blk_ptr[i]) + { + for (page_addr = dseg->blk_ptr[i]; + page_addr < dseg->blk_ptr[i] + dseg->blk_size; + page_addr += PAGE_SIZE) + { + MEM_MAP_UNRESERVE(VIRT_TO_PAGE(page_addr)); + } + + free_pages(dseg->blk_ptr[i], dseg->blk_order); + } + } + + kfree(dseg->blk_ptr); + kfree(dseg); + } +} + +/* + * Function: -dal_pgalloc + */ +static void* +_dal_pgalloc(unsigned int size) +{ + dma_segment_t* dseg; + unsigned int blk_size; + + blk_size = (size < DMA_BLOCK_SIZE) ? size : DMA_BLOCK_SIZE; + if ((dseg = _dal_dma_segment_alloc(size, blk_size)) == NULL) + { + return NULL; + } + + if (dseg->seg_size < size) + { + /* If we didn't get the full size then forget it */ + printk("Notice: Can not get enough memory for requset!!\n"); + printk("actual size:0x%lx, request size:0x%x\n", dseg->seg_size, size); + //-_dal_dma_segment_free(dseg); + //-return NULL; + } + + list_add(&dseg->list, &_dma_seg); + return (void*)dseg->seg_begin; +} + +/* + * Function: _dal_pgfree + */ +static int +_dal_pgfree(void* ptr) +{ + struct list_head* pos; + + list_for_each(pos, &_dma_seg) + { + dma_segment_t* dseg = list_entry(pos, dma_segment_t, list); + if (ptr == (void*)dseg->seg_begin) + { + list_del(&dseg->list); + _dal_dma_segment_free(dseg); + return 0; + } + } + return -1; +} +#endif +static void +dal_alloc_dma_pool(int lchip, int size) +{ + if (use_high_memory) + { + dma_phy_base[lchip] = virt_to_bus(high_memory); + dma_virt_base[lchip] = ioremap_nocache(dma_phy_base[lchip], size); + } + else + { +#ifdef DMA_MEM_MODE_PLATFORM + dma_virt_base[lchip] = dma_alloc_coherent(&(dal_dev[lchip].pci_dev->dev), dma_mem_size, + &dma_phy_base[lchip], GFP_KERNEL); + + printk(KERN_WARNING "########Using DMA_MEM_MODE_PLATFORM \n"); +#endif + +#ifndef DMA_MEM_MODE_PLATFORM + /* Get DMA memory from kernel */ + dma_virt_base_tmp[lchip] = _dal_pgalloc(size); + dma_phy_base[lchip] = virt_to_bus(dma_virt_base_tmp[lchip]); + dma_virt_base [lchip]= ioremap_nocache(dma_phy_base[lchip], size); +#endif + } +} + +static void +dal_free_dma_pool(int lchip) +{ + int ret = 0; + ret = ret; + if (use_high_memory) + { + iounmap(dma_virt_base[lchip]); + } + else + { +#ifdef DMA_MEM_MODE_PLATFORM + dma_free_coherent(&(dal_dev[lchip].pci_dev->dev), dma_mem_size, + dma_virt_base[lchip], dma_phy_base[lchip]); +#endif + +#ifndef DMA_MEM_MODE_PLATFORM + iounmap(dma_virt_base[lchip]); + ret = _dal_pgfree(dma_virt_base_tmp[lchip]); + if(ret<0) + { + printk("Dma free memory fail !!!!!! \n"); + } +#endif + } +} + +#define _KERNEL_DAL_IO +static int +_dal_pci_read(unsigned char lchip, unsigned int offset, unsigned int* value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + *value = *(volatile unsigned int*)(dal_dev[lchip].logic_address + offset); + return 0; +} + +int +dal_create_irq_mapping(unsigned long arg) +{ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) + +#ifndef NO_IRQ +#define NO_IRQ (-1) +#endif + dal_irq_mapping_t irq_map; + + if (copy_from_user(&irq_map, (void*)arg, sizeof(dal_irq_mapping_t))) + { + return -EFAULT; + } + + irq_map.sw_irq = irq_create_mapping(NULL, irq_map.hw_irq); + if (irq_map.sw_irq == NO_IRQ) + { + printk("IRQ mapping fail !!!!!! \n"); + return -1; + } + + if (copy_to_user((dal_irq_mapping_t*)arg, (void*)&irq_map, sizeof(dal_irq_mapping_t))) + { + return -EFAULT; + } +#endif + return 0; +} + +int +dal_pci_read(unsigned long arg) +{ + dal_chip_parm_t cmdpara_chip; + + if (copy_from_user(&cmdpara_chip, (void*)arg, sizeof(dal_chip_parm_t))) + { + return -EFAULT; + } + + _dal_pci_read((unsigned char)cmdpara_chip.lchip, (unsigned int)cmdpara_chip.reg_addr, + (unsigned int*)(&(cmdpara_chip.value))); + + if (copy_to_user((dal_chip_parm_t*)arg, (void*)&cmdpara_chip, sizeof(dal_chip_parm_t))) + { + return -EFAULT; + } + + return 0; +} + +static int +_dal_pci_write(unsigned char lchip, unsigned int offset, unsigned int value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + *(volatile unsigned int*)(dal_dev[lchip].logic_address + offset) = value; + return 0; +} + +int +dal_pci_write(unsigned long arg) +{ + dal_chip_parm_t cmdpara_chip; + + if (copy_from_user(&cmdpara_chip, (void*)arg, sizeof(dal_chip_parm_t))) + { + return -EFAULT; + } + + _dal_pci_write((unsigned char)cmdpara_chip.lchip, (unsigned int)cmdpara_chip.reg_addr, + (unsigned int)cmdpara_chip.value); + + return 0; +} + +int +dal_pci_conf_read(unsigned char lchip, unsigned int offset, unsigned int* value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + pci_read_config_dword(dal_dev[lchip].pci_dev, offset, value); + return 0; +} + +int +dal_pci_conf_write(unsigned char lchip, unsigned int offset, unsigned int value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + pci_write_config_dword(dal_dev[lchip].pci_dev, offset, value); + return 0; +} +int +dal_user_read_pci_conf(unsigned long arg) +{ + dal_pci_cfg_ioctl_t dal_cfg; + + if (copy_from_user(&dal_cfg, (void*)arg, sizeof(dal_pci_cfg_ioctl_t))) + { + return -EFAULT; + } + + if (dal_pci_conf_read(dal_cfg.lchip, dal_cfg.offset, &dal_cfg.value)) + { + printk("dal_pci_conf_read failed.\n"); + return -EFAULT; + } + + if (copy_to_user((dal_pci_cfg_ioctl_t*)arg, (void*)&dal_cfg, sizeof(dal_pci_cfg_ioctl_t))) + { + return -EFAULT; + } + + return 0; +} + +int +dal_user_write_pci_conf(unsigned long arg) +{ + dal_pci_cfg_ioctl_t dal_cfg; + + if (copy_from_user(&dal_cfg, (void*)arg, sizeof(dal_pci_cfg_ioctl_t))) + { + return -EFAULT; + } + + return dal_pci_conf_write(dal_cfg.lchip, dal_cfg.offset, dal_cfg.value); +} + +static int +linux_get_device(unsigned long arg) +{ + dal_user_dev_t user_dev; + int lchip = 0; + + if (copy_from_user(&user_dev, (void*)arg, sizeof(user_dev))) + { + return -EFAULT; + } + + user_dev.chip_num = dal_chip_num; + lchip = user_dev.lchip; + + if (lchip < dal_chip_num) + { + user_dev.phy_base0 = (unsigned int)dal_dev[lchip].phys_address; + user_dev.phy_base1 = (unsigned int)(dal_dev[lchip].phys_address >> 32); + + user_dev.bus_no = dal_dev[lchip].pci_dev->bus->number; + user_dev.dev_no = dal_dev[lchip].pci_dev->device; + user_dev.fun_no = dal_dev[lchip].pci_dev->devfn; + } + + if (copy_to_user((dal_user_dev_t*)arg, (void*)&user_dev, sizeof(user_dev))) + { + return -EFAULT; + } + + return 0; +} + +/* set dal version, copy to user */ +static int +linux_get_dal_version(unsigned long arg) +{ + int dal_ver = VERSION_1DOT2; /* set dal version */ + + if (copy_to_user((int*)arg, (void*)&dal_ver, sizeof(dal_ver))) + { + return -EFAULT; + } + + dal_version = dal_ver; /* up sw */ + + return 0; +} + +static int +linux_get_dma_info(unsigned long arg) +{ + dma_info_t dma_para; + + if (copy_from_user(&dma_para, (void*)arg, sizeof(dma_info_t))) + { + return -EFAULT; + } + + dma_para.phy_base = (unsigned int)dma_phy_base[dma_para.lchip]; + dma_para.phy_base_hi = dma_phy_base[dma_para.lchip] >> 32; + dma_para.size = dma_mem_size; + + if (copy_to_user((dma_info_t*)arg, (void*)&dma_para, sizeof(dma_info_t))) + { + return -EFAULT; + } + + return 0; +} + +static int +dal_get_msi_info(unsigned long arg) +{ + dal_msi_info_t msi_para; + unsigned int lchip = 0; + + /* get lchip form user mode */ + if (copy_from_user(&msi_para, (void*)arg, sizeof(dal_msi_info_t))) + { + return -EFAULT; + } + lchip = msi_para.lchip; + + msi_para.irq_base = msi_irq_base[lchip]; + msi_para.irq_num = msi_irq_num[lchip]; + + /* send msi info to user mode */ + if (copy_to_user((dal_msi_info_t*)arg, (void*)&msi_para, sizeof(dal_msi_info_t))) + { + return -EFAULT; + } + + return 0; +} + + +static int +dal_get_intr_info(unsigned long arg) +{ + dal_intr_info_t intr_para; + unsigned int intr_num = 0; + + /* get lchip form user mode */ + if (copy_from_user(&intr_para, (void*)arg, sizeof(dal_intr_info_t))) + { + return -EFAULT; + } + + intr_para.irq_idx = CTC_MAX_INTR_NUM; + for (intr_num=0; intr_num< CTC_MAX_INTR_NUM; intr_num++) + { + if (intr_para.irq == dal_isr[intr_num].irq) + { + intr_para.irq_idx = intr_num; + break; + } + } + + if (CTC_MAX_INTR_NUM == intr_para.irq_idx) + { + printk("Interrupt %d cann't find.\n", intr_para.irq); + } + /* send msi info to user mode */ + if (copy_to_user((dal_intr_info_t*)arg, (void*)&intr_para, sizeof(dal_intr_info_t))) + { + return -EFAULT; + } + + return 0; +} + +static int +dal_cache_inval(unsigned long arg) +{ + dal_dma_cache_info_t intr_para; + + if (copy_from_user(&intr_para, (void*)arg, sizeof(dal_dma_cache_info_t))) + { + return -EFAULT; + } + +#if 0 + dma_cache_wback_inv((unsigned long)intr_para.ptr, intr_para.length); +#endif + +#if 0 + dma_sync_single_for_cpu(NULL, intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); + + + dma_cache_sync(NULL, (void*)intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); +#endif + return 0; +} + +static int +dal_cache_flush(unsigned long arg) +{ + dal_dma_cache_info_t intr_para; + + if (copy_from_user(&intr_para, (void*)arg, sizeof(dal_dma_cache_info_t))) + { + return -EFAULT; + } + +#if 0 + dma_cache_wback_inv(intr_para.ptr, intr_para.length); +#endif + +#if 0 + dma_sync_single_for_cpu(NULL, intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); + + + dma_cache_sync(NULL, (void*)intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); +#endif + return 0; +} + +int +linux_dal_probe(struct pci_dev* pdev, const struct pci_device_id* id) +{ + dal_kern_dev_t* dev = NULL; + int bar = 0; + int ret = 0; + unsigned int temp = 0; + unsigned int lchip = 0; + + printk(KERN_WARNING "********found dal device*****\n"); + + for (lchip = 0; lchip < DAL_MAX_CHIP_NUM; lchip ++) + { + if (NULL == dal_dev[lchip].pci_dev) + { + break; + } + } + + if (lchip >= DAL_MAX_CHIP_NUM) + { + printk("Exceed max local chip num\n"); + return -1; + } + + dev = &dal_dev[lchip]; + if (NULL == dev) + { + printk("Cannot obtain PCI resources\n"); + } + + lchip = lchip; + dal_chip_num += 1; + + dev->pci_dev = pdev; + + if (pci_enable_device(pdev) < 0) + { + printk("Cannot enable PCI device: vendor id = %x, device id = %x\n", + pdev->vendor, pdev->device); + } + + ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); + if (ret) + { + ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); + if (ret) + { + printk("Could not set PCI DMA Mask\n"); + return ret; + } + } + + if (pci_request_regions(pdev, DAL_NAME) < 0) + { + printk("Cannot obtain PCI resources\n"); + } + + dev->phys_address = pci_resource_start(pdev, bar); + dev->logic_address = (uintptr)ioremap_nocache(dev->phys_address, + pci_resource_len(dev->pci_dev, bar)); + + _dal_pci_read(lchip, 0x48, &temp); + if (((temp >> 8) & 0xffff) == 0x3412) + { + printk("Little endian Cpu detected!!! \n"); + _dal_pci_write(lchip, 0x48, 0xFFFFFFFF); + } + + pci_set_master(pdev); + + /* alloc dma_mem_size for every chip */ + if (dma_mem_size) + { + dal_alloc_dma_pool(lchip, dma_mem_size); + + /*add check Dma memory pool cannot cross 4G space*/ + if ((0==(dma_phy_base[lchip]>>32)) && (0!=((dma_phy_base[lchip]+dma_mem_size)>>32))) + { + printk("Dma malloc memory cross 4G space!!!!!! \n"); + return -1; + } + } + + printk(KERN_WARNING "linux_dal_probe end*****\n"); + + return 0; +} + +void +linux_dal_remove(struct pci_dev* pdev) +{ + unsigned int lchip = 0; + unsigned int flag = 0; + + for (lchip = 0; lchip < DAL_MAX_CHIP_NUM; lchip ++) + { + if (pdev == dal_dev[lchip].pci_dev) + { + flag = 1; + break; + } + } + + if (1 == flag) + { + dal_free_dma_pool(lchip); + pci_release_regions(pdev); + pci_disable_device(pdev); + + dal_dev[lchip].pci_dev = NULL; + dal_chip_num--; + } + + +} + +#ifdef CONFIG_COMPAT +static long +linux_dal_ioctl(struct file* file, + unsigned int cmd, unsigned long arg) +#else + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) +static int +linux_dal_ioctl(struct file* file, + unsigned int cmd, unsigned long arg) +#else +static int +linux_dal_ioctl(struct inode* inode, struct file* file, + unsigned int cmd, unsigned long arg) +#endif + +#endif +{ + switch (cmd) + { + + case CMD_READ_CHIP: + return dal_pci_read(arg); + + case CMD_WRITE_CHIP: + return dal_pci_write(arg); + + case CMD_GET_DEVICES: + return linux_get_device(arg); + + case CMD_GET_DAL_VERSION: + return linux_get_dal_version(arg); + + case CMD_GET_DMA_INFO: + return linux_get_dma_info(arg); + + case CMD_PCI_CONFIG_READ: + return dal_user_read_pci_conf(arg); + + case CMD_PCI_CONFIG_WRITE: + return dal_user_write_pci_conf(arg); + + case CMD_REG_INTERRUPTS: + return dal_user_interrupt_register(arg); + + case CMD_UNREG_INTERRUPTS: + return dal_user_interrupt_unregister(arg); + + case CMD_EN_INTERRUPTS: + return dal_user_interrupt_set_en(arg); + + case CMD_SET_MSI_CAP: + return dal_set_msi_cap(arg); + + case CMD_GET_MSI_INFO: + return dal_get_msi_info(arg); + + case CMD_IRQ_MAPPING: + return dal_create_irq_mapping(arg); + + case CMD_GET_INTR_INFO: + return dal_get_intr_info(arg); + + case CMD_CACHE_INVAL: + return dal_cache_inval(arg); + + case CMD_CACHE_FLUSH: + return dal_cache_flush(arg); + + default: + break; + } + + return 0; +} + +static unsigned int +linux_dal_poll0(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[0], p); + local_irq_save(flags); + if (poll_intr_trigger[0]) + { + poll_intr_trigger[0] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll1(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[1], p); + local_irq_save(flags); + if (poll_intr_trigger[1]) + { + poll_intr_trigger[1] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll2(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[2], p); + local_irq_save(flags); + if (poll_intr_trigger[2]) + { + poll_intr_trigger[2] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll3(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[3], p); + local_irq_save(flags); + if (poll_intr_trigger[3]) + { + poll_intr_trigger[3] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll4(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[4], p); + local_irq_save(flags); + if (poll_intr_trigger[4]) + { + poll_intr_trigger[4] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll5(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[5], p); + local_irq_save(flags); + if (poll_intr_trigger[5]) + { + poll_intr_trigger[5] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll6(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[6], p); + local_irq_save(flags); + if (poll_intr_trigger[6]) + { + poll_intr_trigger[6] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll7(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[7], p); + local_irq_save(flags); + if (poll_intr_trigger[7]) + { + poll_intr_trigger[7] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static struct pci_driver linux_dal_driver = +{ + .name = DAL_NAME, + .id_table = dal_id_table, + .probe = linux_dal_probe, + .remove = linux_dal_remove, +}; + +static struct file_operations fops = +{ + .owner = THIS_MODULE, +#ifdef CONFIG_COMPAT + .compat_ioctl = linux_dal_ioctl, + .unlocked_ioctl = linux_dal_ioctl, +#else +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) + .unlocked_ioctl = linux_dal_ioctl, +#else + .ioctl = linux_dal_ioctl, +#endif +#endif +}; + + +static int __init +linux_dal_init(void) +{ + int ret = 0; + + /* Get DMA memory pool size form dal.ok input param, or use default dma_mem_size */ + if (dma_pool_size) + { + if ((dma_pool_size[strlen(dma_pool_size) - 1] & ~0x20) == 'M') + { + dma_mem_size = simple_strtoul(dma_pool_size, NULL, 0); + printk("dma_mem_size: 0x%x \n", dma_mem_size); + + dma_mem_size *= MB_SIZE; + } + else + { + printk("DMA memory pool size must be specified as e.g. dma_pool_size=8M\n"); + } + + if (dma_mem_size & (dma_mem_size - 1)) + { + printk("dma_mem_size must be a power of 2 (1M, 2M, 4M, 8M etc.)\n"); + dma_mem_size = 0; + } + } + + ret = register_chrdev(DAL_DEV_MAJOR, DAL_NAME, &fops); + if (ret < 0) + { + printk(KERN_WARNING "Register linux_dal device, ret %d\n", ret); + return ret; + } + + ret = pci_register_driver(&linux_dal_driver); + if (ret < 0) + { + printk(KERN_WARNING "Register ASIC PCI driver failed, ret %d\n", ret); + return ret; + } + + /* alloc /dev/linux_dal node */ + dal_class = class_create(THIS_MODULE, DAL_NAME); + device_create(dal_class, NULL, MKDEV(DAL_DEV_MAJOR, 0), NULL, DAL_NAME); + + /* init interrupt function */ + intr_handler_fun[0] = intr0_handler; + intr_handler_fun[1] = intr1_handler; + intr_handler_fun[2] = intr2_handler; + intr_handler_fun[3] = intr3_handler; + intr_handler_fun[4] = intr4_handler; + intr_handler_fun[5] = intr5_handler; + intr_handler_fun[6] = intr6_handler; + intr_handler_fun[7] = intr7_handler; + + return ret; +} + +static void __exit +linux_dal_exit(void) +{ + device_destroy(dal_class, MKDEV(DAL_DEV_MAJOR, 0)); + class_destroy(dal_class); + unregister_chrdev(DAL_DEV_MAJOR, "linux_dal"); + pci_unregister_driver(&linux_dal_driver); +} + +module_init(linux_dal_init); +module_exit(linux_dal_exit); + + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_kernel.h b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_kernel.h new file mode 100644 index 00000000000..850a4cffa73 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_kernel.h @@ -0,0 +1,171 @@ +/** + @file dal_kernel_io.h + + @author Copyright (C) 2012 Centec Networks Inc. All rights reserved. + + @date 2012-4-9 + + @version v2.0 + +*/ +#ifndef _DAL_KERNEL_H_ +#define _DAL_KERNEL_H_ +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(CONFIG_RESOURCES_64BIT) || defined(CONFIG_PHYS_ADDR_T_64BIT) +#define PHYS_ADDR_IS_64BIT +#endif + +#ifndef SDK_IN_USERMODE +#ifdef PHYS_ADDR_IS_64BIT +typedef long long intptr; +typedef unsigned long long uintptr; +#else +typedef int intptr; +typedef unsigned int uintptr; +#endif +#endif + +#define DAL_PCI_READ_ADDR 0x0 +#define DAL_PCI_READ_DATA 0xc +#define DAL_PCI_WRITE_ADDR 0x8 +#define DAL_PCI_WRITE_DATA 0x4 +#define DAL_PCI_STATUS 0x10 + +#define DAL_PCI_STATUS_IN_PROCESS 31 +#define DAL_PCI_STATUS_BAD_PARITY 5 +#define DAL_PCI_STATUS_CPU_ACCESS_ERR 4 +#define DAL_PCI_STATUS_READ_CMD 3 +#define DAL_PCI_STATUS_REGISTER_ERR 1 +#define DAL_PCI_STATUS_REGISTER_ACK 0 + +#define DAL_PCI_ACCESS_TIMEOUT 0x64 + +#define DAL_NAME "linux_dal" /* "linux_dal" */ + +#define DAL_DEV_MAJOR 198 + +#define DAL_DEV_INTR_MAJOR_BASE 200 + +#define DAL_DEV_NAME "/dev/" DAL_NAME +#define DAL_ONE_KB 1024 +#define DAL_ONE_MB (1024*1024) +struct dal_chip_parm_s +{ + unsigned int lchip; /*tmp should be uint8*/ + unsigned int fpga_id; /*tmp add*/ + unsigned int reg_addr; + unsigned int value; +}; +typedef struct dal_chip_parm_s dal_chip_parm_t; + +struct dal_intr_parm_s +{ + unsigned int irq; + unsigned int enable; +}; +typedef struct dal_intr_parm_s dal_intr_parm_t; + +struct dal_irq_mapping_s +{ + unsigned int hw_irq; + unsigned int sw_irq; +}; +typedef struct dal_irq_mapping_s dal_irq_mapping_t; + +struct dal_user_dev_s +{ + unsigned int chip_num; /*output: local chip number*/ + unsigned int lchip; /*input: local chip id*/ + unsigned int phy_base0; /* low 32bits physical base address */ + unsigned int phy_base1; /* high 32bits physical base address */ + unsigned int bus_no; + unsigned int dev_no; + unsigned int fun_no; + void* virt_base[2]; /* Virtual base address; this must be last member */ +}; +typedef struct dal_user_dev_s dal_user_dev_t; + +struct dma_info_s +{ + unsigned int lchip; + unsigned int phy_base; + unsigned int phy_base_hi; + unsigned int size; + unsigned int* virt_base; +}; +typedef struct dma_info_s dma_info_t; + +struct dal_pci_cfg_ioctl_s +{ + unsigned int lchip; /* Device ID */ + unsigned int offset; + unsigned int value; +}; +typedef struct dal_pci_cfg_ioctl_s dal_pci_cfg_ioctl_t; + +struct dal_msi_info_s +{ + unsigned int lchip; + unsigned int irq_base; + unsigned int irq_num; +}; +typedef struct dal_msi_info_s dal_msi_info_t; + +struct dal_intr_info_s +{ + unsigned int irq; + unsigned int irq_idx; +}; +typedef struct dal_intr_info_s dal_intr_info_t; + +struct dal_dma_cache_info_s +{ + unsigned long ptr; + unsigned int length; +}; +typedef struct dal_dma_cache_info_s dal_dma_cache_info_t; + +#define CMD_MAGIC 'C' +#define CMD_WRITE_CHIP _IO(CMD_MAGIC, 0) /* for humber ioctrol*/ +#define CMD_READ_CHIP _IO(CMD_MAGIC, 1) /* for humber ioctrol*/ +#define CMD_GET_DEVICES _IO(CMD_MAGIC, 2) +#define CMD_GET_DAL_VERSION _IO(CMD_MAGIC, 3) +#define CMD_PCI_CONFIG_WRITE _IO(CMD_MAGIC, 4) +#define CMD_PCI_CONFIG_READ _IO(CMD_MAGIC, 5) +#define CMD_GET_DMA_INFO _IO(CMD_MAGIC, 6) +#define CMD_REG_INTERRUPTS _IO(CMD_MAGIC, 7) +#define CMD_UNREG_INTERRUPTS _IO(CMD_MAGIC, 8) +#define CMD_EN_INTERRUPTS _IO(CMD_MAGIC, 9) +#define CMD_I2C_READ _IO(CMD_MAGIC, 10) +#define CMD_I2C_WRITE _IO(CMD_MAGIC, 11) +#define CMD_GET_MSI_INFO _IO(CMD_MAGIC, 12) +#define CMD_SET_MSI_CAP _IO(CMD_MAGIC, 13) +#define CMD_IRQ_MAPPING _IO(CMD_MAGIC, 14) +#define CMD_GET_INTR_INFO _IO(CMD_MAGIC, 15) +#define CMD_CACHE_INVAL _IO(CMD_MAGIC, 16) +#define CMD_CACHE_FLUSH _IO(CMD_MAGIC, 17) + +enum dal_version_e +{ + VERSION_MIN, + VERSION_1DOT0, + VERSION_1DOT1, + VERSION_1DOT2, + + VERSION_MAX +}; +typedef enum dal_version_e dal_version_t; + +/* We try to assemble a contiguous segment from chunks of this size */ +#define DMA_BLOCK_SIZE (512 * DAL_ONE_KB) + +#ifdef __cplusplus +} +#endif + +#endif + + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_mpool.c b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_mpool.c new file mode 100644 index 00000000000..5aca222a138 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_mpool.c @@ -0,0 +1,350 @@ +#include "dal_mpool.h" + +#ifdef __KERNEL__ +#include +#include + +#define DAL_MALLOC(x) kmalloc(x, GFP_ATOMIC) +#define DAL_FREE(x) kfree(x) + +static spinlock_t dal_mpool_lock; +#define MPOOL_LOCK_INIT() spin_lock_init(&dal_mpool_lock) +#define MPOOL_LOCK() unsigned long flags; spin_lock_irqsave(&dal_mpool_lock, flags) +#define MPOOL_UNLOCK() spin_unlock_irqrestore(&dal_mpool_lock, flags) +#define DAL_PRINT(fmt,arg...) printk(fmt,##arg) +#else /* !__KERNEL__*/ + +#include +#include "sal.h" +#define DAL_MALLOC(x) malloc(x) +#define DAL_FREE(x) free(x) +static sal_mutex_t* dal_mpool_lock; +#define MPOOL_LOCK_INIT() sal_mutex_create(&dal_mpool_lock) +#define MPOOL_LOCK() sal_mutex_lock(dal_mpool_lock) +#define MPOOL_UNLOCK() sal_mutex_unlock(dal_mpool_lock) +#define DAL_PRINT(fmt,arg...) sal_printf(fmt,##arg) + +#endif /* __KERNEL__ */ + + + +dal_mpool_mem_t* g_free_block_ptr = NULL; + +/* System cache line size */ +#ifndef DAL_CACHE_LINE_BYTES +#define DAL_CACHE_LINE_BYTES 256 +#endif + +#define DAL_MAX_CHIP_NUM 32 +static dal_mpool_mem_t* p_desc_pool[DAL_MAX_CHIP_NUM] = {0}; +static dal_mpool_mem_t* p_data_pool[DAL_MAX_CHIP_NUM] = {0}; + +int +dal_mpool_init(void) +{ + MPOOL_LOCK_INIT(); + return 0; +} + +dal_mpool_mem_t* +_dal_mpool_create(void* base, int size, int type) +{ + dal_mpool_mem_t* head = NULL; + dal_mpool_mem_t* tail = NULL; + + head = (dal_mpool_mem_t*)DAL_MALLOC(sizeof(dal_mpool_mem_t)); + if (head == NULL) + { + return NULL; + } + + tail = (dal_mpool_mem_t*)DAL_MALLOC(sizeof(dal_mpool_mem_t)); + if (tail == NULL) + { + DAL_FREE(head); + return NULL; + } + + head->size = tail->size = 0; + head->type = type; + head->address = base; + tail->address = head->address + size; + head->next = tail; + tail->next = NULL; + + return head; +} + +dal_mpool_mem_t* +dal_mpool_create(unsigned char lchip, void* base, int size) +{ + dal_mpool_mem_t* head = NULL; + int mod = (int)(((unsigned long)base) & (DAL_CACHE_LINE_BYTES - 1)); + + MPOOL_LOCK(); + + if (mod) + { + base = (char*)base + (DAL_CACHE_LINE_BYTES - mod); + size -= (DAL_CACHE_LINE_BYTES - mod); + } + + size &= ~(DAL_CACHE_LINE_BYTES - 1); + + /* init for common linkptr, only used for GB */ + head = _dal_mpool_create(base, size, DAL_MPOOL_TYPE_USELESS); + if (NULL == head) + { + MPOOL_UNLOCK(); + return NULL; + } + + /* init for desc linkptr */ + p_desc_pool[lchip] = _dal_mpool_create(base, DAL_MPOOL_MAX_DESX_SIZE, DAL_MPOOL_TYPE_DESC); + if (NULL == p_desc_pool[lchip]) + { + MPOOL_UNLOCK(); + DAL_FREE(head->next); + DAL_FREE(head); + return NULL; + } + + /* init for data linkptr */ + p_data_pool[lchip] = _dal_mpool_create(((char*)base+DAL_MPOOL_MAX_DESX_SIZE), (size - DAL_MPOOL_MAX_DESX_SIZE), DAL_MPOOL_TYPE_DATA); + if (NULL == p_data_pool[lchip]) + { + MPOOL_UNLOCK(); + DAL_FREE(head->next); + DAL_FREE(head); + DAL_FREE(p_desc_pool[lchip]->next); + DAL_FREE(p_desc_pool[lchip]); + return NULL; + } + + MPOOL_UNLOCK(); + + return head; +} + +dal_mpool_mem_t* +_dal_mpool_alloc_comon(dal_mpool_mem_t* ptr, int size, int type) +{ + dal_mpool_mem_t* new_ptr = NULL; + + while (ptr && ptr->next) + { + if (ptr->next->address - (ptr->address + ptr->size) >= size) + { + break; + } + + ptr = ptr->next; + } + + if (!(ptr && ptr->next)) + { + return NULL; + } + + new_ptr = DAL_MALLOC(sizeof(dal_mpool_mem_t)); + if (!new_ptr) + { + return NULL; + } + + new_ptr->type = type; + new_ptr->address = ptr->address + ptr->size; + new_ptr->size = size; + new_ptr->next = ptr->next; + ptr->next = new_ptr; + + return new_ptr; +} + +void* +dal_mpool_alloc(unsigned char lchip, dal_mpool_mem_t* pool, int size, int type) +{ + dal_mpool_mem_t* ptr = NULL; + dal_mpool_mem_t* new_ptr = NULL; + int mod; + + MPOOL_LOCK(); + + mod = size & (DAL_CACHE_LINE_BYTES - 1); + if (mod != 0) + { + size += (DAL_CACHE_LINE_BYTES - mod); + } + + switch(type) + { + case DAL_MPOOL_TYPE_USELESS: + ptr = pool; + new_ptr = _dal_mpool_alloc_comon(ptr, size, type); + if (NULL == new_ptr) + { + MPOOL_UNLOCK(); + return NULL; + } + break; + case DAL_MPOOL_TYPE_DESC: + ptr = p_desc_pool[lchip]; + new_ptr = _dal_mpool_alloc_comon(ptr, size, type); + if (NULL == new_ptr) + { + MPOOL_UNLOCK(); + return NULL; + } + break; + case DAL_MPOOL_TYPE_DATA: + ptr = p_data_pool[lchip]; + new_ptr = _dal_mpool_alloc_comon(ptr, size, type); + if (NULL == new_ptr) + { + MPOOL_UNLOCK(); + return NULL; + } + break; + default: + MPOOL_UNLOCK(); + return NULL; + break; + } + + MPOOL_UNLOCK(); + if( NULL == new_ptr ) + { + return NULL; + } + + return new_ptr->address; +} + +void +_dal_mpool_free(dal_mpool_mem_t* ptr, void* addr, int type) +{ + unsigned char* address = (unsigned char*)addr; + dal_mpool_mem_t* prev = NULL; + + while (ptr && ptr->next) + { + if (ptr->next->address == address) + { + break; + } + + ptr = ptr->next; + } + + if (ptr && ptr->next) + { + prev = ptr; + ptr = ptr->next; + prev->next = ptr->next; + DAL_FREE(ptr); + } + + return; +} + +void +dal_mpool_free(unsigned char lchip, dal_mpool_mem_t* pool, void* addr) +{ + dal_mpool_mem_t* ptr = pool; + + MPOOL_LOCK(); + + switch(pool->type) + { + case DAL_MPOOL_TYPE_USELESS: + ptr = pool; + _dal_mpool_free(ptr, addr, DAL_MPOOL_TYPE_USELESS); + break; + case DAL_MPOOL_TYPE_DESC: + ptr = p_desc_pool[lchip]; + _dal_mpool_free(ptr, addr, DAL_MPOOL_TYPE_DESC); + break; + case DAL_MPOOL_TYPE_DATA: + ptr = p_data_pool[lchip]; + _dal_mpool_free(ptr, addr, DAL_MPOOL_TYPE_DATA); + break; + default: + break; + } + + MPOOL_UNLOCK(); + return; +} + +int +dal_mpool_destroy(unsigned char lchip, dal_mpool_mem_t* pool) +{ + dal_mpool_mem_t* ptr, * next; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = next) + { + next = ptr->next; + DAL_FREE(ptr); + } + + for (ptr = p_desc_pool[lchip]; ptr; ptr = next) + { + next = ptr->next; + DAL_FREE(ptr); + } + + for (ptr = p_data_pool[lchip]; ptr; ptr = next) + { + next = ptr->next; + DAL_FREE(ptr); + } + + MPOOL_UNLOCK(); + + return 0; +} + +int +dal_mpool_usage(dal_mpool_mem_t* pool, int type) +{ + int usage = 0; + dal_mpool_mem_t* ptr; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = ptr->next) + { + if (ptr->type == type || ptr->type == -1) + { + usage += ptr->size; + } + } + + MPOOL_UNLOCK(); + + return usage; +} + +int +dal_mpool_debug(dal_mpool_mem_t* pool) +{ + dal_mpool_mem_t* ptr; + int index = 0; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = ptr->next) + { +// DAL_PRINT("%2dst mpool block: address=0x%8x, size=0x%x \n", index, (unsigned int)ptr->address, ptr->size); + DAL_PRINT("%2dst mpool block: address=%p, size=0x%x \n", index, ptr->address, ptr->size); // note + index++; + } + + MPOOL_UNLOCK(); + + return 0; +} + + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_mpool.h b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_mpool.h new file mode 100644 index 00000000000..d93f8886813 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_mpool.h @@ -0,0 +1,72 @@ +/** + @file dal_mpool.h + + @author Copyright (C) 2011 Centec Networks Inc. All rights reserved. + + @date 2012-5-10 + + @version v2.0 + + This file contains the dma memory init, allocation and free APIs +*/ + +#ifndef _DMA_MPOOL_H +#define _DMA_MPOOL_H +#ifdef __cplusplus +extern "C" { +#endif + +#define DAL_MPOOL_MAX_DESX_SIZE (1024*1024) + +enum dal_mpool_type_e +{ + DAL_MPOOL_TYPE_USELESS, /* just compatible with GB */ + DAL_MPOOL_TYPE_DESC, /* dma mpool op for desc */ + DAL_MPOOL_TYPE_DATA /* dma mpool op for data */ +}; +typedef enum dal_mpool_type_e dal_mpool_type_t; + +struct dal_mpool_mem_s +{ + unsigned char* address; + int size; + int type; + struct dal_mpool_mem_s* next; +}; +typedef struct dal_mpool_mem_s dal_mpool_mem_t; + +/** + @brief This function is to alloc dma memory + + @param[in] size size of memory + + @return NULL + +*/ +extern int +dal_mpool_init(void); + +extern dal_mpool_mem_t* +dal_mpool_create(unsigned char lchip, void* base_ptr, int size); + +extern void* +dal_mpool_alloc(unsigned char lchip, dal_mpool_mem_t* pool, int size, int type); + +extern void +dal_mpool_free(unsigned char lchip, dal_mpool_mem_t* pool, void* addr); + +extern int +dal_mpool_destroy(unsigned char lchip, dal_mpool_mem_t* pool); + +extern int +dal_mpool_usage(dal_mpool_mem_t* pool, int type); + +extern int +dal_mpool_debug(dal_mpool_mem_t* pool); +#ifdef __cplusplus +} +#endif + +#endif /* !_DMA_MPOOL_H */ + + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/scripts/48x6q_platform.sh b/platform/centec/sonic-platform-modules-e582/48x6q/scripts/48x6q_platform.sh new file mode 100755 index 00000000000..e8f81a20d9d --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/scripts/48x6q_platform.sh @@ -0,0 +1,62 @@ +#!/bin/bash + +#platform init script for centec e582-48x6q + +init_devnum() { + found=0 + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + # I801 adapter can be at either dffd0000 or dfff0000 + if [[ $devname == 'SMBus I801 adapter at '* ]]; then + found=1 + break + fi + done + + [ $found -eq 0 ] && echo "cannot find I801" && exit 1 +} + +init_devnum + +if [ "$1" == "init" ]; then + #install drivers and dependencies + depmod -a + modprobe i2c-i801 + modprobe i2c-dev + modprobe i2c-mux + modprobe i2c-smbus + modprobe i2c-mux-pca954x force_deselect_on_exit=1 + i2cset -y 0 0x58 0x8 0x3f + i2cset -y 0 0x20 0x1b 0x0 + i2cset -y 0 0x20 0xb 0x0 + i2cset -y 0 0x21 0x19 0x0 + i2cset -y 0 0x21 0x9 0x0 + i2cset -y 0 0x21 0x1c 0x0 + i2cset -y 0 0x21 0xc 0x0 + i2cset -y 0 0x22 0x1a 0x0 + i2cset -y 0 0x22 0xa 0x0 + i2cset -y 0 0x23 0x18 0x0 + i2cset -y 0 0x23 0x8 0x0 + i2cset -y 0 0x23 0x1b 0x0 + i2cset -y 0 0x23 0xb 0x0 + modprobe lm77 + modprobe tun + modprobe dal + modprobe centec_at24c64 + modprobe centec_e582_48x6q_platform + + #start platform monitor + rm -rf /usr/bin/platform_monitor + ln -s /usr/bin/48x6q_platform_monitor.py /usr/bin/platform_monitor + python /usr/bin/platform_monitor & +elif [ "$1" == "deinit" ]; then + kill -9 $(pidof platform_monitor) > /dev/null 2>&1 + rm -rf /usr/bin/platform_monitor + modprobe -r centec_e582_48x6q_platform + modprobe -r centec_at24c64 + modprobe -r dal + modprobe -r i2c-mux-pca954x + modprobe -r i2c-dev +else + echo "e582-48x6q_platform : Invalid option !" +fi diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/scripts/48x6q_platform_monitor.py b/platform/centec/sonic-platform-modules-e582/48x6q/scripts/48x6q_platform_monitor.py new file mode 100644 index 00000000000..d08802a35f3 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/scripts/48x6q_platform_monitor.py @@ -0,0 +1,217 @@ +#!/usr/bin/env python + +############################################################################# +# Centec +# +# Module contains an implementation of sfp presence scan logic +# +############################################################################# + +try: + import os + import os.path + import threading + import time + import logging + import struct + import syslog + import swsssdk + from socket import * + from select import * +except ImportError, e: + raise ImportError(str(e) + " - required module not found") + + +def DBG_PRINT(str): + syslog.openlog("centec-pmon") + syslog.syslog(syslog.LOG_INFO, str) + syslog.closelog() + +PORT_NUMBER = (48+6) + +class PlatformMonitor: + + """init board platform default config""" + def __init__(self): + """[ctlid, slavedevid]""" + self.fiber_mapping = [(0, 0)] # res + self.fiber_mapping.extend([(0, 0), (0, 1), (0, 2), (0, 3), (0, 4), (0, 5), (0, 6), (0, 7)]) # panel port 1~8 + self.fiber_mapping.extend([(0, 14), (0, 13), (0, 15), (0, 12), (0, 8), (0, 11), (0, 9), (0, 10)]) # panel port 9~16 + self.fiber_mapping.extend([(0, 22), (0, 21), (0, 23), (0, 20), (0, 16), (0, 19), (0, 17), (0, 18)]) # panel port 17~24 + self.fiber_mapping.extend([(1, 4), (1, 3), (1, 5), (1, 2), (1, 6), (1, 1), (1, 7), (1, 0)]) # panel port 25~32 + self.fiber_mapping.extend([(1, 8), (1, 15), (1, 9), (1, 14), (1, 10), (1, 13), (1, 11), (1, 12)]) # panel port 33~40 + self.fiber_mapping.extend([(1, 22), (1, 21), (1, 23), (1, 20), (1, 16), (1, 19), (1, 17), (1, 18)]) # panel port 41~48 + self.fiber_mapping.extend([(1, 28), (1, 29), (1, 26), (1, 27), (1, 24), (1, 25)]) # panel port 49~54 + + self.udpClient = socket(AF_INET, SOCK_DGRAM) + self.sfp_present = [0]*(PORT_NUMBER+1) + self.sfp_enable = [0]*(PORT_NUMBER+1) + self.f_sfp_present = "/sys/class/sfp/sfp{}/sfp_presence" + self.f_sfp_enable = "/sys/class/sfp/sfp{}/sfp_enable" + self.sfp_scan_timer = 0 + + def is_qsfp(self, port): + if port <= 48: + return False + else: + return True + + def get_sfp_present(self, port): + with open(self.f_sfp_present.format(port), 'r') as sfp_file: + return int(sfp_file.read()) + + def set_sfp_present(self, port, present): + self.sfp_present[port] = present + + def set_sfp_enable(self, port, enable): + if self.is_qsfp(port): + if enable: + with open(self.f_sfp_enable.format(port), 'w') as sfp_file: + sfp_file.write("1") + self.sfp_enable[port] = 1 + else: + with open(self.f_sfp_enable.format(port), 'w') as sfp_file: + sfp_file.write("0") + self.sfp_enable[port] = 0 + else: + (ctlid, devid) = self.fiber_mapping[port] + req = struct.pack('=HHHBBHIBBBBI', 0, 9, 16, ctlid, devid, 0x50, 0, 0x56, 1, 0xf, 0, 1) + self.udpClient.sendto(req, ('localhost', 8101)) + rsp, addr = self.udpClient.recvfrom(1024) + rsp_data = struct.unpack('=HHHBBHIBBBBIi512B', rsp) + enable_v = rsp_data[13] + if enable: + enable_v &= 0xf0 + else: + enable_v |= 0x0f + data = struct.pack('=HHHBBHBBBB', 0, 11, 8, ctlid, 0x56, 0x50, devid, enable_v, 0xf, 0) + self.udpClient.sendto(data, ('localhost', 8101)) + DBG_PRINT("set sfp{} to {}".format(port, ("enable" if enable else "disable"))) + + def initialize_configdb(self): + try: + f_mac = os.popen('ip link show eth0 | grep ether | awk \'{print $2}\'') + mac_addr = f_mac.read(17) + last_byte = mac_addr[-2:] + aligned_last_byte = format(int(int(str(last_byte), 16) + 1), '02x') + mac_addr = mac_addr[:-2] + aligned_last_byte + DBG_PRINT("start connect swss config-db to set device mac-address") + swss = swsssdk.SonicV2Connector() + swss.connect(swss.CONFIG_DB) + swss.set(swss.CONFIG_DB, "DEVICE_METADATA|localhost", 'mac', mac_addr) + mac_addr = swss.get(swss.CONFIG_DB, "DEVICE_METADATA|localhost", 'mac') + DBG_PRINT("set device mac-address: %s" % mac_addr) + except IOError as e: + DBG_PRINT(str(e)) + + def initialize_rpc(self): + while True: + try: + r_sel = [self.udpClient] + echo_req = struct.pack('=HHH', 0, 1, 0) + self.udpClient.sendto(echo_req, ('localhost', 8101)) + result = select(r_sel, [], [], 1) + if self.udpClient in result[0]: + echo_rsp, srv_addr = self.udpClient.recvfrom(1024) + if echo_rsp: + break + DBG_PRINT("connect to sdk rpc server timeout, try again.") + except IOError as e: + DBG_PRINT(str(e)) + + DBG_PRINT("connect to sdk rpc server success.") + + def initialize_gpio(self): + # set gpio 1,2,3,4,5,6,7,8 output mode + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 1, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 2, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 3, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 4, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 5, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 6, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 7, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 8, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + # set gpio 1,2,3,4,5,6,7,8 output 0 to reset i2c bridge + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 1, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 2, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 3, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 4, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 5, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 6, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 7, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 8, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + # set gpio 1,2,3,4,5,6,7,8 output 1 to release i2c bridge + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 1, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 2, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 3, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 4, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 5, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 6, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 7, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 8, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + DBG_PRINT("config ctc chip gpio done.") + + def initialize_sfp(self): + try: + for port in range(1, PORT_NUMBER+1): + if self.get_sfp_present(port): + self.set_sfp_present(port, 1) + self.set_sfp_enable(port, 1) + else: + self.set_sfp_present(port, 0) + self.set_sfp_enable(port, 0) + except IOError as e: + DBG_PRINT(str(e)) + + def initialize(self): + DBG_PRINT("start connect to sdk rpc server.") + + self.initialize_configdb() + self.initialize_rpc() + self.initialize_gpio() + self.initialize_sfp() + + def sfp_scan(self): + try: + for port in range(1, PORT_NUMBER+1): + cur_present = self.get_sfp_present(port) + if self.sfp_present[port] != cur_present: + self.set_sfp_present(port, cur_present) + self.set_sfp_enable(port, cur_present) + except IOError as e: + DBG_PRINT(str(e)) + + def start(self): + while True: + self.sfp_scan() + time.sleep(1) + +if __name__ == "__main__": + monitor = PlatformMonitor() + monitor.initialize() + monitor.start() + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/service/48x6q_platform.service b/platform/centec/sonic-platform-modules-e582/48x6q/service/48x6q_platform.service new file mode 100644 index 00000000000..ad9b1fb1b3a --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/service/48x6q_platform.service @@ -0,0 +1,13 @@ +[Unit] +Description=Centec e582 48x6q platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-e582-48x6q start +ExecStop=-/etc/init.d/platform-modules-e582-48x6q stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/centec/sonic-platform-modules-e582/LICENSE b/platform/centec/sonic-platform-modules-e582/LICENSE new file mode 100644 index 00000000000..99228517bae --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/LICENSE @@ -0,0 +1,15 @@ +Copyright (C) 2017 Centec, Inc + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/centec/sonic-platform-modules-e582/README.md b/platform/centec/sonic-platform-modules-e582/README.md new file mode 100644 index 00000000000..61b3ef6c87f --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/README.md @@ -0,0 +1 @@ +platform drivers for Centec E582 for the SONiC project diff --git a/platform/centec/sonic-platform-modules-e582/debian/changelog b/platform/centec/sonic-platform-modules-e582/debian/changelog new file mode 100644 index 00000000000..3f4ff89c1be --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/changelog @@ -0,0 +1,11 @@ +sonic-centec-platform-modules (1.1) unstable; urgency=low + + * Add support for centec e582-48x2q4z + + -- yangbs Thu, 25 Jan 2018 13:43:40 +0800 + +sonic-centec-platform-modules (1.0) unstable; urgency=low + + * Initial release + + -- yangbs Mon, 22 Jan 2018 13:43:40 +0800 diff --git a/platform/centec/sonic-platform-modules-e582/debian/compat b/platform/centec/sonic-platform-modules-e582/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/centec/sonic-platform-modules-e582/debian/control b/platform/centec/sonic-platform-modules-e582/debian/control new file mode 100644 index 00000000000..ba30e04f038 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/control @@ -0,0 +1,17 @@ +Source: sonic-centec-platform-modules +Section: main +Priority: extra +Maintainer: yangbs +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: platform-modules-e582-48x2q4z +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-e582-48x6q +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + diff --git a/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.init b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.init new file mode 100755 index 00000000000..3ef5e7e30b6 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.init @@ -0,0 +1,38 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup e582-48x2q4z board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + /usr/bin/48x2q4z_platform.sh init + + echo "done." + ;; + +stop) + /usr/bin/48x2q4z_platform.sh deinit + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: service platform-modules-e582-48x2q4z {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.install b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.install new file mode 100644 index 00000000000..9bd1181e860 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.install @@ -0,0 +1,6 @@ +48x2q4z/cfg/48x2q4z-modules.conf etc/modules-load.d +48x2q4z/cfg/config_db.json etc/sonic +48x2q4z/cfg/config_db_l2l3.json etc/sonic +48x2q4z/scripts/48x2q4z_platform.sh usr/bin +48x2q4z/scripts/48x2q4z_platform_monitor.py usr/bin +48x2q4z/service/48x2q4z_platform.service lib/systemd/system diff --git a/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.postinst b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.postinst new file mode 100644 index 00000000000..b4a1fcbe4e6 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable 48x2q4z_platform.service +systemctl start 48x2q4z_platform.service diff --git a/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.init b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.init new file mode 100755 index 00000000000..1c5b0c1c497 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.init @@ -0,0 +1,38 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup e582-48x6q board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + /usr/bin/48x6q_platform.sh init + + echo "done." + ;; + +stop) + /usr/bin/48x6q_platform.sh deinit + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: service platform-modules-e582-48x6q {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.install b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.install new file mode 100644 index 00000000000..a6d26ce329b --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.install @@ -0,0 +1,6 @@ +48x6q/cfg/48x6q-modules.conf etc/modules-load.d +48x6q/cfg/config_db.json etc/sonic +48x6q/cfg/config_db_l2l3.json etc/sonic +48x6q/scripts/48x6q_platform.sh usr/bin +48x6q/scripts/48x6q_platform_monitor.py usr/bin +48x6q/service/48x6q_platform.service lib/systemd/system diff --git a/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.postinst b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.postinst new file mode 100644 index 00000000000..fea0c4eebda --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable 48x6q_platform.service +systemctl start 48x6q_platform.service diff --git a/platform/centec/sonic-platform-modules-e582/debian/rules b/platform/centec/sonic-platform-modules-e582/debian/rules new file mode 100755 index 00000000000..9f5d67b1af5 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/rules @@ -0,0 +1,35 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= 48x6q 48x2q4z + +%: + dh $@ + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -pplatform-modules-e582-$${mod} \ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp -f $(MOD_SRC_DIR)/$${mod}/modules/*.ko \ + debian/platform-modules-e582-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + done) + +override_dh_usrlocal: + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + rm -rf $(MOD_SRC_DIR)/$${mod}/modules/*.ko; \ + rm -rf debian/platform-modules-e582-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)/*.ko; \ + done) + diff --git a/platform/generic/aboot-image.mk b/platform/generic/aboot-image.mk new file mode 100644 index 00000000000..c3f21b61625 --- /dev/null +++ b/platform/generic/aboot-image.mk @@ -0,0 +1,8 @@ +# sonic aboot installer + +SONIC_GENERIC_ABOOT_IMAGE = sonic-aboot-generic.swi +$(SONIC_GENERIC_ABOOT_IMAGE)_MACHINE = generic +$(SONIC_GENERIC_ABOOT_IMAGE)_IMAGE_TYPE = aboot +$(SONIC_GENERIC_ABOOT_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_GENERIC_ABOOT_IMAGE)_DOCKERS = +SONIC_INSTALLERS += $(SONIC_GENERIC_ABOOT_IMAGE) diff --git a/platform/generic/onie-image.mk b/platform/generic/onie-image.mk new file mode 100644 index 00000000000..5dc8bfb9f88 --- /dev/null +++ b/platform/generic/onie-image.mk @@ -0,0 +1,8 @@ +# sonic generic ONIE image installer + +SONIC_GENERIC_ONIE_IMAGE = sonic-generic.bin +$(SONIC_GENERIC_ONIE_IMAGE)_MACHINE = generic +$(SONIC_GENERIC_ONIE_IMAGE)_IMAGE_TYPE = onie +$(SONIC_GENERIC_ONIE_IMAGE)_INSTALLS = $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_GENERIC_ONIE_IMAGE)_DOCKERS = +SONIC_INSTALLERS += $(SONIC_GENERIC_ONIE_IMAGE) diff --git a/platform/generic/platform.conf b/platform/generic/platform.conf new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/generic/rules.mk b/platform/generic/rules.mk new file mode 100644 index 00000000000..bc250774027 --- /dev/null +++ b/platform/generic/rules.mk @@ -0,0 +1,10 @@ +include $(PLATFORM_PATH)/aboot-image.mk +include $(PLATFORM_PATH)/onie-image.mk + +SONIC_ALL += $(DOCKER_DATABASE) \ + $(DOCKER_LLDP_SV2) \ + $(DOCKER_SNMP_SV2) \ + $(DOCKER_PLATFORM_MONITOR) \ + $(DOCKER_DHCP_RELAY) \ + $(DOCKER_PTF) \ + $(SONIC_GENERIC_ONIE_IMAGE) diff --git a/platform/innovium/docker-ptf-invm.mk b/platform/innovium/docker-ptf-invm.mk new file mode 100755 index 00000000000..6c81734676f --- /dev/null +++ b/platform/innovium/docker-ptf-invm.mk @@ -0,0 +1,7 @@ +# docker image for docker-ptf-invm + +DOCKER_PTF_INVM = docker-ptf-invm.gz +$(DOCKER_PTF_INVM)_PATH = $(DOCKERS_PATH)/docker-ptf-saithrift +$(DOCKER_PTF_INVM)_DEPENDS += $(PYTHON_SAITHRIFT_INVM) +$(DOCKER_PTF_INVM)_LOAD_DOCKERS += $(DOCKER_PTF) +SONIC_DOCKER_IMAGES += $(DOCKER_PTF_INVM) diff --git a/platform/innovium/docker-syncd-invm-rpc.mk b/platform/innovium/docker-syncd-invm-rpc.mk new file mode 100755 index 00000000000..313f0d12ac2 --- /dev/null +++ b/platform/innovium/docker-syncd-invm-rpc.mk @@ -0,0 +1,17 @@ +# docker image for innovium syncd with rpc + +DOCKER_SYNCD_INVM_RPC = docker-syncd-invm-rpc.gz +$(DOCKER_SYNCD_INVM_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-invm-rpc +$(DOCKER_SYNCD_INVM_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) $(INVM_LIBSAI) +$(DOCKER_SYNCD_INVM_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_INVM_RPC) +ifeq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_INVM_RPC) +endif + +$(DOCKER_SYNCD_INVM_RPC)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd +$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2 b/platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2 new file mode 100755 index 00000000000..af31d587b90 --- /dev/null +++ b/platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2 @@ -0,0 +1,53 @@ +FROM docker-syncd-invm + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +COPY \ +{% for deb in docker_syncd_invm_rpc_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN dpkg -P syncd + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ +{% for deb in docker_syncd_invm_rpc_debs.split(' ') -%} +dpkg_apt debs/{{ deb }}{{'; '}} +{%- endfor %} + +## Pre-install the fundamental packages +RUN apt-get update \ + && apt-get -y install \ + net-tools \ + python-pip \ + build-essential \ + libssl-dev \ + libffi-dev \ + python-dev \ + libpython2.7 \ + libjansson4 \ + wget \ + cmake \ + && wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ + && tar xvfz 1.0.0.tar.gz \ + && cd nanomsg-1.0.0 \ + && mkdir -p build \ + && cmake . \ + && make install \ + && ldconfig \ + && cd .. \ + && rm -fr nanomsg-1.0.0 \ + && rm -f 1.0.0.tar.gz \ + && pip install cffi==1.7.0 \ + && pip install --upgrade cffi==1.7.0 \ + && pip install nnpy \ + && mkdir -p /opt \ + && cd /opt \ + && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ + && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \ + && rm -rf /root/deps + +COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/innovium/docker-syncd-invm-rpc/ptf_nn_agent.conf b/platform/innovium/docker-syncd-invm-rpc/ptf_nn_agent.conf new file mode 100755 index 00000000000..fa1ed0eb162 --- /dev/null +++ b/platform/innovium/docker-syncd-invm-rpc/ptf_nn_agent.conf @@ -0,0 +1,10 @@ +[program:ptf_nn_agent] +command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-iface-rcv-buffer=109430400 +process_name=ptf_nn_agent +stdout_logfile=/tmp/ptf_nn_agent.out.log +stderr_logfile=/tmp/ptf_nn_agent.err.log +redirect_stderr=false +autostart=true +autorestart=true +startsecs=1 +numprocs=1 diff --git a/platform/innovium/docker-syncd-invm.mk b/platform/innovium/docker-syncd-invm.mk new file mode 100755 index 00000000000..3ba35c5edb9 --- /dev/null +++ b/platform/innovium/docker-syncd-invm.mk @@ -0,0 +1,13 @@ +# docker image for innovium syncd + +DOCKER_SYNCD_PLATFORM_CODE = invm +include $(PLATFORM_PATH)/../template/docker-syncd-base.mk + +$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) $(INVM_LIBSAI) + +$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) + +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/innovium/docker-syncd-invm/Dockerfile.j2 b/platform/innovium/docker-syncd-invm/Dockerfile.j2 new file mode 100755 index 00000000000..6f6f5eca9b6 --- /dev/null +++ b/platform/innovium/docker-syncd-invm/Dockerfile.j2 @@ -0,0 +1,34 @@ +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +COPY \ +{% for deb in docker_syncd_invm_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +# Needed for Innovium Debug Shell +RUN apt-get install -y net-tools +RUN apt-get install -y libpython2.7 +RUN apt-get install -y libjansson4 + +RUN dpkg -i \ +{% for deb in docker_syncd_invm_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +COPY ["start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/innovium/docker-syncd-invm/start.sh b/platform/innovium/docker-syncd-invm/start.sh new file mode 100755 index 00000000000..62331605047 --- /dev/null +++ b/platform/innovium/docker-syncd-invm/start.sh @@ -0,0 +1,7 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +supervisorctl start syncd diff --git a/platform/innovium/docker-syncd-invm/supervisord.conf b/platform/innovium/docker-syncd-invm/supervisord.conf new file mode 100755 index 00000000000..1af5d70a1d0 --- /dev/null +++ b/platform/innovium/docker-syncd-invm/supervisord.conf @@ -0,0 +1,28 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/innovium/invm-sai.mk b/platform/innovium/invm-sai.mk new file mode 100755 index 00000000000..8c236a8b68d --- /dev/null +++ b/platform/innovium/invm-sai.mk @@ -0,0 +1,14 @@ +# INVM SAI + +INVM_SAI_ONLINE = https://github.com/Innovium/SONiC/raw/master/debian/master + +INVM_LIBSAI = isai.deb +INVM_HSAI = saihdr.deb +INVM_DRV = ipd.deb + +$(INVM_LIBSAI)_URL = $(INVM_SAI_ONLINE)/$(INVM_LIBSAI) +$(INVM_HSAI)_URL = $(INVM_SAI_ONLINE)/$(INVM_HSAI) +$(INVM_DRV)_URL = $(INVM_SAI_ONLINE)/$(INVM_DRV) + +SONIC_ONLINE_DEBS += $(INVM_LIBSAI) $(INVM_HSAI) $(INVM_DRV) +SONIC_STRETCH_DEBS += $(INVM_DRV) diff --git a/platform/innovium/libsaithrift-dev.mk b/platform/innovium/libsaithrift-dev.mk new file mode 100755 index 00000000000..5357705bac9 --- /dev/null +++ b/platform/innovium/libsaithrift-dev.mk @@ -0,0 +1,7 @@ +# libsaithrift-dev package + +LIBSAITHRIFT_DEV_INVM = libsaithrift-dev_0.9.4_$(CONFIGURED_ARCH).deb +$(LIBSAITHRIFT_DEV_INVM)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI +$(LIBSAITHRIFT_DEV_INVM)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(THRIFT_COMPILER) $(INVM_LIBSAI) $(INVM_HSAI) +$(LIBSAITHRIFT_DEV_INVM)_RDEPENDS += $(LIBTHRIFT) $(INVM_HSAI) +SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV_INVM) diff --git a/platform/innovium/one-image.mk b/platform/innovium/one-image.mk new file mode 100755 index 00000000000..c88ec5e65cd --- /dev/null +++ b/platform/innovium/one-image.mk @@ -0,0 +1,11 @@ +# sonic innovium ONE image installer + +SONIC_ONE_IMAGE = sonic-innovium.bin +$(SONIC_ONE_IMAGE)_MACHINE = innovium +$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(CEL_MIDSTONE_200I_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELTA_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_INSTALLS += $(INVM_DRV) +$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_IMAGES) +SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/innovium/platform-modules-cel.mk b/platform/innovium/platform-modules-cel.mk new file mode 100755 index 00000000000..b93bea758d7 --- /dev/null +++ b/platform/innovium/platform-modules-cel.mk @@ -0,0 +1,12 @@ +# Celestica platform modules + +CEL_PLATFORM_MODULE_VERSION = 0.2.2 + +export CEL_PLATFORM_MODULE_VERSION + +CEL_MIDSTONE_200I_PLATFORM_MODULE = platform-modules-midstone-200i_$(CEL_PLATFORM_MODULE_VERSION)_$(CONFIGURED_ARCH).deb +$(CEL_MIDSTONE_200I_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-cel +$(CEL_MIDSTONE_200I_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(CEL_MIDSTONE_200I_PLATFORM_MODULE)_PLATFORM = x86_64-cel_midstone-r0 +SONIC_DPKG_DEBS += $(CEL_MIDSTONE_200I_PLATFORM_MODULE) +SONIC_STRETCH_DEBS+= $(CEL_MIDSTONE_200I_PLATFORM_MODULE) diff --git a/platform/innovium/platform-modules-delta.mk b/platform/innovium/platform-modules-delta.mk new file mode 100644 index 00000000000..68e13fb8a8a --- /dev/null +++ b/platform/innovium/platform-modules-delta.mk @@ -0,0 +1,13 @@ +# Delta Platform modules + +DELTA_ETC032IF_PLATFORM_MODULE_VERSION = 1.1 + +export DELTA_ETC032IF_PLATFORM_MODULE_VERSION + +DELTA_PLATFORM_MODULE = platform-modules-et-c032if_$(DELTA_ETC032IF_PLATFORM_MODULE_VERSION)_$(CONFIGURED_ARCH).deb +$(DELTA_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-delta +$(DELTA_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(DELTA_PLATFORM_MODULE)_PLATFORM = x86_64-delta_et-c032if-r0 + +SONIC_DPKG_DEBS += $(DELTA_PLATFORM_MODULE) +SONIC_STRETCH_DEBS += $(DELTA_PLATFORM_MODULE) diff --git a/platform/innovium/platform.conf b/platform/innovium/platform.conf new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/innovium/python-saithrift.mk b/platform/innovium/python-saithrift.mk new file mode 100755 index 00000000000..23d7df18834 --- /dev/null +++ b/platform/innovium/python-saithrift.mk @@ -0,0 +1,6 @@ +# python-saithrift package + +PYTHON_SAITHRIFT_INVM = python-saithrift_1.2.1_$(CONFIGURED_ARCH).deb +$(PYTHON_SAITHRIFT_INVM)_SRC_PATH = $(SRC_PATH)/SAI +$(PYTHON_SAITHRIFT_INVM)_DEPENDS += $(INVM_LIBSAI) $(INVM_HSAI) $(THRIFT_COMPILER) $(PYTHON_THRIFT) $(LIBTHRIFT_DEV) +SONIC_DPKG_DEBS += $(PYTHON_SAITHRIFT_INVM) diff --git a/platform/innovium/rules.mk b/platform/innovium/rules.mk new file mode 100755 index 00000000000..68a9dbb4104 --- /dev/null +++ b/platform/innovium/rules.mk @@ -0,0 +1,20 @@ +include $(PLATFORM_PATH)/invm-sai.mk +include $(PLATFORM_PATH)/platform-modules-cel.mk +include $(PLATFORM_PATH)/platform-modules-delta.mk +include $(PLATFORM_PATH)/docker-syncd-invm.mk +include $(PLATFORM_PATH)/docker-syncd-invm-rpc.mk +include $(PLATFORM_PATH)/one-image.mk +include $(PLATFORM_PATH)/libsaithrift-dev.mk +include $(PLATFORM_PATH)/python-saithrift.mk +include $(PLATFORM_PATH)/docker-ptf-invm.mk + +SONIC_ALL += $(SONIC_INVM_ONE_IMAGE) \ + $(DOCKER_FPM) \ + $(DOCKER_PTF_INVM) \ + $(DOCKER_SYNCD_INVM_RPC) + +# Inject invm sai into sairedis +$(LIBSAIREDIS)_DEPENDS += $(INVM_HSAI) $(INVM_LIBSAI) $(LIBSAITHRIFT_DEV_INVM) + +# Runtime dependency on invm sai is set only for syncd +$(SYNCD)_RDEPENDS += $(INVM_HSAI) diff --git a/platform/innovium/sonic-platform-modules-cel/.gitignore b/platform/innovium/sonic-platform-modules-cel/.gitignore new file mode 100755 index 00000000000..f805e810e5c --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/.gitignore @@ -0,0 +1,33 @@ +# Object files +*.o +*.ko +*.obj +*.elf + +# Precompiled Headers +*.gch +*.pch + +# Libraries +*.lib +*.a +*.la +*.lo + +# Shared objects (inc. Windows DLLs) +*.dll +*.so +*.so.* +*.dylib + +# Executables +*.exe +*.out +*.app +*.i*86 +*.x86_64 +*.hex + +# Debug files +*.dSYM/ +*.su diff --git a/platform/innovium/sonic-platform-modules-cel/LICENSE b/platform/innovium/sonic-platform-modules-cel/LICENSE new file mode 100755 index 00000000000..2386a3920c0 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/LICENSE @@ -0,0 +1,15 @@ +Copyright (C) 2017 Celestica, Inc + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/innovium/sonic-platform-modules-cel/README.md b/platform/innovium/sonic-platform-modules-cel/README.md new file mode 100755 index 00000000000..fbda62f91ea --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/README.md @@ -0,0 +1 @@ +# Platform drivers for Celestica Midstone-200i for the SONiC project diff --git a/platform/innovium/sonic-platform-modules-cel/debian/changelog b/platform/innovium/sonic-platform-modules-cel/debian/changelog new file mode 100755 index 00000000000..4a4e5ed2b0a --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/debian/changelog @@ -0,0 +1,28 @@ +sonic-cel-platform-modules (0.2.2) unstable; urgency=low + + * Remove I2c mux ininitialization in init-script. + * Remapping virtual I2c ports number in sfputil. + * Fix qsfp driver, missing present status of sfp+ ports. + * Updated sfputil for decode sfp+ EEPROM. + * Add watchdog driver. + + -- Wirut Getbamrung Wed, 1 Feb 2018 16:00:00 +0700 + +sonic-cel-platform-modules (0.2.1) unstable; urgency=low + + * Fix module init-script not load CPLD virtual i2c driver properly. + + -- Pradchaya Phucharoen Mon, 9 Oct 2017 14:24:25 +0700 + +sonic-cel-platform-modules (0.2.0) unstable; urgency=low + + * Add sysfs interface to reset sfp ports. + * Fix qsfp driver, low power mode set/get incorrect bit. + + -- Pradchaya Phucharoen Tue, 26 Sep 2017 11:50:23 +0700 + +sonic-cel-platform-modules (0.1) unstable; urgency=low + + * Initial platform module. + + -- Pradchaya Phucharoen Tue, 23 Aug 2017 10:43:00 +0700 diff --git a/platform/innovium/sonic-platform-modules-cel/debian/compat b/platform/innovium/sonic-platform-modules-cel/debian/compat new file mode 100755 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/innovium/sonic-platform-modules-cel/debian/control b/platform/innovium/sonic-platform-modules-cel/debian/control new file mode 100755 index 00000000000..48ef777a99a --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/debian/control @@ -0,0 +1,11 @@ +Source: sonic-cel-platform-modules +Section: main +Priority: extra +Maintainer: Wirut Getbamrung +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: platform-modules-midstone-200i +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices diff --git a/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.init b/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.init new file mode 100755 index 00000000000..7074d2b5812 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.init @@ -0,0 +1,52 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: $portmap +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup 200i board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + # Attach TLV 0x56 eeprom + echo 24lc64t 0x56 > /sys/bus/i2c/devices/i2c-0/new_device + sleep 2 + + modprobe 200i-cpld + sleep 2 + + # Turn off/down lpmod by defult (0 - Normal, 1 - Low Pow) + echo 0x00 > /sys/devices/platform/ms200i_cpld/qsfp_lpmode + + # Attach 64 instances of EEPROM driver QSFP ports + for ((n=1;n<=66;n++)); + do + echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-$n/new_device + sleep 0.1 + done + + echo "done." + ;; + +stop) + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-200i.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.install b/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.install new file mode 100644 index 00000000000..4f298feb830 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.install @@ -0,0 +1,2 @@ +midstone-200i/cfg/midstone-200i-modules.conf etc/modules-load.d +midstone-200i/systemd/platform-modules-midstone-200i.service lib/systemd/system \ No newline at end of file diff --git a/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.postinst b/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.postinst new file mode 100644 index 00000000000..213661ea1e8 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable platform-modules-midstone-200i.service +systemctl start platform-modules-midstone-200i.service \ No newline at end of file diff --git a/platform/innovium/sonic-platform-modules-cel/debian/rules b/platform/innovium/sonic-platform-modules-cel/debian/rules new file mode 100755 index 00000000000..3b01ad7e655 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/debian/rules @@ -0,0 +1,32 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= midstone-200i + +%: + dh $@ + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -pplatform-modules-$${mod} \ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/modules/*.ko \ + debian/platform-modules-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + done) + +override_dh_usrlocal: + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/cfg/midstone-200i-modules.conf b/platform/innovium/sonic-platform-modules-cel/midstone-200i/cfg/midstone-200i-modules.conf new file mode 100755 index 00000000000..b2a3e351c4c --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/midstone-200i/cfg/midstone-200i-modules.conf @@ -0,0 +1,15 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-gpio +i2c-mux-pca954x +ipmi-devintf diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_cpld.c b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_cpld.c new file mode 100755 index 00000000000..3a99d230402 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_cpld.c @@ -0,0 +1,854 @@ +/* + * ms200i_cpld.c - driver for MidStone's CPLD + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "ms200i_cpld" + +#define RESET0102 0xA248 +#define RESET0310 0xA2DC +#define RESET1118 0xA2DD +#define RESET1926 0xA2DE +#define RESET2733 0xA2DF +#define RESET3441 0xA31C +#define RESET4249 0xA31D +#define RESET5057 0xA31E +#define RESET5864 0xA31F + +#define LPMOD0102 0xA249 +#define LPMOD0310 0xA2E0 +#define LPMOD1118 0xA2E1 +#define LPMOD1926 0xA2E2 +#define LPMOD2733 0xA2E3 +#define LPMOD3441 0xA320 +#define LPMOD4249 0xA321 +#define LPMOD5057 0xA322 +#define LPMOD5864 0xA323 + +#define ABS0102 0xA24A +#define ABS0310 0xA2E4 +#define ABS1118 0xA2E5 +#define ABS1926 0xA2E6 +#define ABS2733 0xA2E7 +#define ABS3441 0xA324 +#define ABS4249 0xA325 +#define ABS5057 0xA326 +#define ABS5864 0xA327 + +#define ABS6566 0xA244 + +#define INT0102 0xA24B +#define INT0310 0xA2E8 +#define INT1118 0xA2E9 +#define INT1926 0xA2EA +#define INT2733 0xA2EB +#define INT3441 0xA328 +#define INT4249 0xA329 +#define INT5057 0xA32A +#define INT5864 0xA32B + +#define LENGTH_PORT_CPLD 66 + +#define CPLD2_EX_CP_I2CFDR0_I2C 0xA230 +#define CPLD2_EX_CP_I2CCR0_I2C 0xA231 +#define CPLD2_EX_CP_I2CSR0_I2C 0xA232 +#define CPLD2_EX_CP_I2CDR0_I2C 0xA233 +#define CPLD2_EX_CP_I2CID0_I2C 0xA234 + +#define CPLD3_EX_CP_I2CFDR0_I2C 0xA2D0 +#define CPLD3_EX_CP_I2CCR0_I2C 0xA2D1 +#define CPLD3_EX_CP_I2CSR0_I2C 0xA2D2 +#define CPLD3_EX_CP_I2CDR0_I2C 0xA2D3 +#define CPLD3_EX_CP_I2CID0_I2C 0xA2D4 + +#define CPLD4_EX_CP_I2CFDR0_I2C 0xA310 +#define CPLD4_EX_CP_I2CCR0_I2C 0xA311 +#define CPLD4_EX_CP_I2CSR0_I2C 0xA312 +#define CPLD4_EX_CP_I2CDR0_I2C 0xA313 +#define CPLD4_EX_CP_I2CID0_I2C 0xA314 + +enum { + I2C_SR_BIT_RXAK = 0, + I2C_SR_BIT_MIF, + I2C_SR_BIT_SRW, + I2C_SR_BIT_BCSTM, + I2C_SR_BIT_MAL, + I2C_SR_BIT_MBB, + I2C_SR_BIT_MAAS, + I2C_SR_BIT_MCF +}; + +enum { + I2C_CR_BIT_BCST = 0, + I2C_CR_BIT_RSTA = 2, + I2C_CR_BIT_TXAK, + I2C_CR_BIT_MTX, + I2C_CR_BIT_MSTA, + I2C_CR_BIT_MIEN, + I2C_CR_BIT_MEN, +}; + +#ifdef DEBUG_KERN +#define info(fmt,args...) printk(KERN_INFO "line %3d : "fmt,__LINE__,##args) +#define check(REG) printk(KERN_INFO "line %3d : %-8s = %2.2X",__LINE__,#REG,inb(REG)); +#else +#define info(fmt,args...) +#define check(REG) +#endif + +#define GET_REG_BIT(REG,BIT) ((inb(REG) >> BIT) & 0x01) +#define SET_REG_BIT_H(REG,BIT) outb(inb(REG) | (0x01 << BIT),REG) +#define SET_REG_BIT_L(REG,BIT) outb(inb(REG) & ~(0x01 << BIT),REG) + +struct ms200i_i2c_data { + int portid; + unsigned REG_FDR0; + unsigned REG_CR0; + unsigned REG_SR0; + unsigned REG_DR0; + unsigned REG_ID0; +}; + +struct ms200i_cpld_data { + struct i2c_adapter *i2c_adapter[LENGTH_PORT_CPLD]; + struct mutex cpld_lock; + unsigned char sfpp_lpmode[2]; + unsigned char sfpp_reset[2]; +}; + +struct ms200i_cpld_data *cpld_data; + +int strtobp(const char* str,unsigned char *bytes){ + unsigned length = strlen(str); + if(length > 20){ + return 0; + } + int i,b=0; + memset(bytes,0,10); + for(i=0;i= '0' && c <= '9'){ + byte = c - '0'; + }else if(c >= 'a' && c <= 'f'){ + byte = c - 'a' + 0x0a; + }else if(c >= 'A' && c <= 'F'){ + byte = c - 'A' + 0x0a; + }else if(c == 'x' || c == 'X'){ + break; + }else{ + continue; + } + if(b%2==0) + bytes[b/2] = byte & 0x0F; + else + bytes[b/2] += (byte << 4) & 0xF0; + b++; + } + return (i/2) + (i%2); +} + +static ssize_t get_reset(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned long reset = 0; + + mutex_lock(&cpld_data->cpld_lock); + + reset = + ((unsigned long)(inb(RESET5864) & 0x7F) << 57 )| + ((unsigned long) inb(RESET5057) << 49 )| + ((unsigned long) inb(RESET4249) << 41 )| + ((unsigned long) inb(RESET3441) << 33 )| + ((unsigned long)(inb(RESET2733) & 0x7F) << 26 )| + ((unsigned long) inb(RESET1926) << 18 )| + ((unsigned long) inb(RESET1118) << 10 )| + ((unsigned long) inb(RESET0310) << 2 )| + ((unsigned long)(inb(RESET0102) & 0x03) ); + + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf,"0x%x%16.16lx\n", + cpld_data->sfpp_reset[1] << 1 | cpld_data->sfpp_reset[0], + reset & 0x3ffffffffffffffff); +} + +static ssize_t set_reset(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char reset[10]; + int num; + + mutex_lock(&cpld_data->cpld_lock); + + num = strtobp(buf,reset); + if (num <= 0) + { + mutex_unlock(&cpld_data->cpld_lock); + return 22; + } + + outb (( reset[0] & 0x03 ) ,RESET0102); + outb (((reset[0] >>2) & 0x3F) | + (((reset[1] ) & 0x03) << 6),RESET0310); + outb (((reset[1] >>2) & 0x3F) | + (((reset[2] ) & 0x03) << 6),RESET1118); + outb (((reset[2] >>2) & 0x3F) | + (((reset[3] ) & 0x03) << 6),RESET1926); + outb (((reset[3] >>2) & 0x3F) | + (((reset[4] ) & 0x01) << 6),RESET2733); + outb (((reset[4] >>1) & 0x7F) | + (((reset[5] ) & 0x01) << 7),RESET3441); + outb (((reset[5] >>1) & 0x7F) | + (((reset[6] ) & 0x01) << 7),RESET4249); + outb (((reset[6] >>1) & 0x7F) | + (((reset[7] ) & 0x01) << 7),RESET5057); + outb (((reset[7] >>1) & 0x7F) ,RESET5864); + + cpld_data->sfpp_reset[0] = reset[8] & 0x01; + cpld_data->sfpp_reset[1] = (reset[8]>>1) & 0x01; + + mutex_unlock(&cpld_data->cpld_lock); + + return count; +} + +static ssize_t get_lpmode(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned long lpmod = 0; + + mutex_lock(&cpld_data->cpld_lock); + + lpmod = + ((unsigned long)(inb(LPMOD5864) & 0x7F) << 57 )| + ((unsigned long) inb(LPMOD5057) << 49 )| + ((unsigned long) inb(LPMOD4249) << 41 )| + ((unsigned long) inb(LPMOD3441) << 33 )| + ((unsigned long)(inb(LPMOD2733) & 0x7F) << 26 )| + ((unsigned long) inb(LPMOD1926) << 18 )| + ((unsigned long) inb(LPMOD1118) << 10 )| + ((unsigned long) inb(LPMOD0310) << 2 )| + ((unsigned long)(inb(LPMOD0102) & 0x03) ); + + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf,"0x%x%16.16lx\n", + cpld_data->sfpp_lpmode[1] << 1 | cpld_data->sfpp_lpmode[0], + lpmod & 0xffffffffffffffff); +} + +static ssize_t set_lpmode(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char lpmod[10]; + int num; + + mutex_lock(&cpld_data->cpld_lock); + + num = strtobp(buf,lpmod); + if (num <= 0) + { + mutex_unlock(&cpld_data->cpld_lock); + return 22; + } + + outb (( lpmod[0] & 0x03 ) ,LPMOD0102); + outb (((lpmod[0] >>2) & 0x3F) | + (((lpmod[1] ) & 0x03) << 6),LPMOD0310); + outb (((lpmod[1] >>2) & 0x3F) | + (((lpmod[2] ) & 0x03) << 6),LPMOD1118); + outb (((lpmod[2] >>2) & 0x3F) | + (((lpmod[3] ) & 0x03) << 6),LPMOD1926); + outb (((lpmod[3] >>2) & 0x3F) | + (((lpmod[4] ) & 0x01) << 6),LPMOD2733); + outb (((lpmod[4] >>1) & 0x7F) | + (((lpmod[5] ) & 0x01) << 7),LPMOD3441); + outb (((lpmod[5] >>1) & 0x7F) | + (((lpmod[6] ) & 0x01) << 7),LPMOD4249); + outb (((lpmod[6] >>1) & 0x7F) | + (((lpmod[7] ) & 0x01) << 7),LPMOD5057); + outb (((lpmod[7] >>1) & 0x7F) ,LPMOD5864); + + cpld_data->sfpp_lpmode[0] = lpmod[8] & 0x01; + cpld_data->sfpp_lpmode[1] = (lpmod[8]>>1) & 0x01; + + mutex_unlock(&cpld_data->cpld_lock); + + return count; +} + +static ssize_t get_modprs(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned long present; + int present_sfp; + + mutex_lock(&cpld_data->cpld_lock); + present = + ((unsigned long)(inb(ABS5864) & 0x7F) << 57 )| + ((unsigned long) inb(ABS5057) << 49 )| + ((unsigned long) inb(ABS4249) << 41 )| + ((unsigned long) inb(ABS3441) << 33 )| + ((unsigned long)(inb(ABS2733) & 0x7F) << 26 )| + ((unsigned long) inb(ABS1926) << 18 )| + ((unsigned long) inb(ABS1118) << 10 )| + ((unsigned long) inb(ABS0310) << 2 )| + ((unsigned long)(inb(ABS0102) & 0x03) ); + + present_sfp = (inb(ABS6566) & 0x03); + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf,"0x%d%16.16lx\n", present_sfp, present & 0xffffffffffffffff); +} + +static ssize_t get_modirq(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned long irq; + + mutex_lock(&cpld_data->cpld_lock); + + irq = + ((unsigned long)(inb(INT5864) & 0x7F) << 57 )| + ((unsigned long) inb(INT5057) << 49 )| + ((unsigned long) inb(INT4249) << 41 )| + ((unsigned long) inb(INT3441) << 33 )| + ((unsigned long)(inb(INT2733) & 0x7F) << 26 )| + ((unsigned long) inb(INT1926) << 18 )| + ((unsigned long) inb(INT1118) << 10 )| + ((unsigned long) inb(INT0310) << 2 )| + ((unsigned long)(inb(INT0102) & 0x03) ); + + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf,"0x%17.17lx\n", irq & 0x3ffffffffffffffff); +} + +static DEVICE_ATTR(qsfp_reset , S_IRUGO | S_IWUSR, get_reset, set_reset); +static DEVICE_ATTR(qsfp_lpmode, S_IRUGO | S_IWUSR, get_lpmode, set_lpmode); +static DEVICE_ATTR(qsfp_modprs, S_IRUGO, get_modprs, NULL); +static DEVICE_ATTR(qsfp_modirq, S_IRUGO, get_modirq, NULL); + +static struct attribute *ms200i_lpc_attrs[] = { + &dev_attr_qsfp_reset.attr, + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_modprs.attr, + &dev_attr_qsfp_modirq.attr, + NULL, +}; + +static struct attribute_group ms200i_lpc_attr_grp = { + .attrs = ms200i_lpc_attrs, +}; + +static struct resource cel_ms200i_lpc_resources[] = { + { + .flags = IORESOURCE_IO, + }, +}; + +static void cel_ms200i_lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device cel_ms200i_lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(cel_ms200i_lpc_resources), + .resource = cel_ms200i_lpc_resources, + .dev = { + .release = cel_ms200i_lpc_dev_release, + } +}; + + +static int i2c_wait_ack(struct i2c_adapter *a,unsigned timeout,int writing){ + int error = 0; + unsigned tick=0; + int Status; + + struct ms200i_i2c_data *new_data = i2c_get_adapdata(a); + + check(new_data->REG_SR0); + check(new_data->REG_CR0); + + while(1){ + Status = inb(new_data->REG_SR0); + tick++; + if(tick > timeout){ + info("Status %2.2X",Status); + info("Error Timeout"); + error = -ETIMEDOUT; + break; + } + + + if(Status & (1 << I2C_SR_BIT_MIF)){ + break; + } + + if(writing == 0 && (Status & (1<REG_SR0); + outb(0, new_data->REG_SR0); + + if(error<0){ + info("Status %2.2X",Status); + return error; + } + + if(!(Status & (1 << I2C_SR_BIT_MCF))){ + info("Error Unfinish"); + return -EIO; + } + + if(Status & (1 <REG_CR0,1<cpld_lock); + + /* Write the command register */ + new_data = i2c_get_adapdata(a); + + unsigned int portid = new_data->portid; + +#ifdef DEBUG_KERN + printk(KERN_INFO "portid %2d|@ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-10s|CMD %2.2X |DAT %4.4X" + ,portid,addr,flags,rw,rw == 1 ? "READ ":"WRITE" + ,size, size == 0 ? "QUICK" : + size == 1 ? "BYTE" : + size == 2 ? "BYTE_DATA" : + size == 3 ? "WORD_DATA" : + size == 4 ? "PROC_CALL" : + size == 5 ? "BLOCK_DATA" : "ERROR" + ,cmd,data->word); +#endif + /* Map the size to what the chip understands */ + switch (size) { + case I2C_SMBUS_QUICK: + case I2C_SMBUS_BYTE: + case I2C_SMBUS_BYTE_DATA: + case I2C_SMBUS_WORD_DATA: + case I2C_SMBUS_BLOCK_DATA: + break; + default: + printk(KERN_INFO "Unsupported transaction %d\n", size); + error = -EOPNOTSUPP; + goto Done; + } + + unsigned int REG_FDR0; + unsigned int REG_CR0; + unsigned int REG_SR0; + unsigned int REG_DR0; + unsigned int REG_ID0; + + REG_FDR0 = new_data->REG_FDR0; + REG_CR0 = new_data->REG_CR0; + REG_SR0 = new_data->REG_SR0; + REG_DR0 = new_data->REG_DR0; + REG_ID0 = new_data->REG_ID0; + outb(portid,REG_ID0); + + int timeout=0; + int cnt=0; + + ////[S][ADDR/R] + //Clear status register + outb( 0 , REG_SR0); + outb( 1 << I2C_CR_BIT_MIEN | 1 << I2C_CR_BIT_MTX | 1 << I2C_CR_BIT_MSTA ,REG_CR0); + SET_REG_BIT_H(REG_CR0,I2C_CR_BIT_MEN); + + if(rw == I2C_SMBUS_READ && + (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)){ + // sent device address with Read mode + outb(addr << 1 | 0x01,REG_DR0); + }else{ + // sent device address with Write mode + outb(addr << 1 | 0x00,REG_DR0); + } + + + + info( "MS Start"); + + //// Wait {A} + error = i2c_wait_ack(a,50000,1); + if(error<0){ + info( "get error %d",error); + goto Done; + } + + //// [CMD]{A} + if(size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA || + (size == I2C_SMBUS_BYTE && rw == I2C_SMBUS_WRITE)){ + + //sent command code to data register + outb(cmd,REG_DR0); + info( "MS Send CMD 0x%2.2X",cmd); + + // Wait {A} + error = i2c_wait_ack(a,50000,1); + if(error<0){ + info( "get error %d",error); + goto Done; + } + } + + switch(size){ + case I2C_SMBUS_BYTE_DATA: + cnt = 1; break; + case I2C_SMBUS_WORD_DATA: + cnt = 2; break; + case I2C_SMBUS_BLOCK_DATA: + // in block data mode keep number of byte in block[0] + cnt = data->block[0]; + break; + default: + cnt = 0; break; + } + + // [CNT] used only bloack data write + if(size == I2C_SMBUS_BLOCK_DATA && rw == I2C_SMBUS_WRITE){ + + outb(cnt,REG_DR0); + info( "MS Send CNT 0x%2.2X",cnt); + + // Wait {A} + error = i2c_wait_ack(a,50000,1); + if(error<0){ + info( "get error %d",error); + goto Done; + } + } + + // [DATA]{A} + if( rw == I2C_SMBUS_WRITE && ( + size == I2C_SMBUS_BYTE || + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA + )){ + int bid=0; + info( "MS prepare to sent [%d bytes]",cnt); + if(size == I2C_SMBUS_BLOCK_DATA ){ + bid=1; // block[0] is cnt; + cnt+=1; // offset from block[0] + } + for(;bidblock[bid],REG_DR0); + info( " Data > %2.2X",data->block[bid]); + // Wait {A} + error = i2c_wait_ack(a,50000,1); + if(error<0){ + goto Done; + } + } + + } + + //REPEATE START + if( rw == I2C_SMBUS_READ && ( + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA + )){ + info( "MS Repeated Start"); + + SET_REG_BIT_L(REG_CR0,I2C_CR_BIT_MEN); + outb(1 << I2C_CR_BIT_MIEN | + 1 << I2C_CR_BIT_MTX | + 1 << I2C_CR_BIT_MSTA | + 1 << I2C_CR_BIT_RSTA ,REG_CR0); + SET_REG_BIT_H(REG_CR0,I2C_CR_BIT_MEN); + + // sent Address with Read mode + outb( addr<<1 | 0x1 ,REG_DR0); + + // Wait {A} + error = i2c_wait_ack(a,50000,1); + if(error<0){ + goto Done; + } + + } + + if( rw == I2C_SMBUS_READ && ( + size == I2C_SMBUS_BYTE || + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA + )){ + + switch(size){ + case I2C_SMBUS_BYTE: + case I2C_SMBUS_BYTE_DATA: + cnt = 1; break; + case I2C_SMBUS_WORD_DATA: + cnt = 2; break; + case I2C_SMBUS_BLOCK_DATA: + //will be changed after recived first data + cnt = 3; break; + default: + cnt = 0; break; + } + + int bid = 0; + info( "MS Receive"); + + //set to Receive mode + outb(1 << I2C_CR_BIT_MEN | + 1 << I2C_CR_BIT_MIEN | + 1 << I2C_CR_BIT_MSTA , REG_CR0); + + for(bid=-1;bidblock[bid] = inb(REG_DR0); + + info( "DATA IN [%d] %2.2X",bid,data->block[bid]); + + if(size==I2C_SMBUS_BLOCK_DATA && bid == 0){ + cnt = data->block[0] + 1; + } + } + } + } + + +Stop: + //[P] + SET_REG_BIT_L(REG_CR0,I2C_CR_BIT_MSTA); + info( "MS STOP"); + +Done: + outb(1<cpld_lock); + + return error; +} + +static u32 ms200i_i2c_func(struct i2c_adapter *a) +{ + return I2C_FUNC_SMBUS_QUICK | + I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_BLOCK_DATA; +} + +static const struct i2c_algorithm ms200i_i2c_algorithm = { + .smbus_xfer = ms200i_i2c_access, + .functionality = ms200i_i2c_func, +}; + +static struct i2c_adapter * cel_ms200i_i2c_init(struct platform_device *pdev, int portid) +{ + int error; + + struct i2c_adapter *new_adapter; + struct ms200i_i2c_data *new_data; + + new_adapter = kzalloc(sizeof(*new_adapter), GFP_KERNEL); + if (!new_adapter) + return NULL; + + new_adapter->dev.parent = &pdev->dev; + new_adapter->owner = THIS_MODULE; + new_adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + new_adapter->algo = &ms200i_i2c_algorithm; + + snprintf(new_adapter->name, sizeof(new_adapter->name), + "SMBus ms200i i2c Adapter portid@%04x", portid); + + new_data = kzalloc(sizeof(*new_data), GFP_KERNEL); + if (!new_data) + return NULL; + + new_data->portid = portid; + + // QSFP 1-2 and SFP 1-2 + if((portid >= 1 && portid <= 2) || (portid >= 65 && portid <= 66)){ + new_data->REG_FDR0 = CPLD2_EX_CP_I2CFDR0_I2C; + new_data->REG_CR0 = CPLD2_EX_CP_I2CCR0_I2C; + new_data->REG_SR0 = CPLD2_EX_CP_I2CSR0_I2C; + new_data->REG_DR0 = CPLD2_EX_CP_I2CDR0_I2C; + new_data->REG_ID0 = CPLD2_EX_CP_I2CID0_I2C; + + }else if((portid >= 3 && portid <= 33)){ + new_data->REG_FDR0 = CPLD3_EX_CP_I2CFDR0_I2C; + new_data->REG_CR0 = CPLD3_EX_CP_I2CCR0_I2C; + new_data->REG_SR0 = CPLD3_EX_CP_I2CSR0_I2C; + new_data->REG_DR0 = CPLD3_EX_CP_I2CDR0_I2C; + new_data->REG_ID0 = CPLD3_EX_CP_I2CID0_I2C; + + }else if((portid >= 34 && portid <= 64)){ + new_data->REG_FDR0 = CPLD4_EX_CP_I2CFDR0_I2C; + new_data->REG_CR0 = CPLD4_EX_CP_I2CCR0_I2C; + new_data->REG_SR0 = CPLD4_EX_CP_I2CSR0_I2C; + new_data->REG_DR0 = CPLD4_EX_CP_I2CDR0_I2C; + new_data->REG_ID0 = CPLD4_EX_CP_I2CID0_I2C; + } + outb(portid,new_data->REG_ID0); + outb(0x1F,new_data->REG_FDR0); // 0x1F 100kHz + + + i2c_set_adapdata(new_adapter,new_data); + + error = i2c_add_adapter(new_adapter); + if(error) + return NULL; + + return new_adapter; +}; + +static int cel_ms200i_lpc_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int ret =0; + int portid_count; + + cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct ms200i_cpld_data), + GFP_KERNEL); + if (!cpld_data) + return -ENOMEM; + + mutex_init(&cpld_data->cpld_lock); + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (unlikely(!res)) { + printk(KERN_ERR " Specified Resource Not Available...\n"); + return -1; + } + + ret = sysfs_create_group(&pdev->dev.kobj, &ms200i_lpc_attr_grp); + if (ret) { + printk(KERN_ERR "Cannot create sysfs\n"); + } + + for(portid_count=1 ; portid_count<=LENGTH_PORT_CPLD ; portid_count++) + cpld_data->i2c_adapter[portid_count-1] = cel_ms200i_i2c_init(pdev, portid_count); + return 0; +} + +static int cel_ms200i_lpc_drv_remove(struct platform_device *pdev) +{ + int portid_count; + struct ms200i_i2c_data *new_data; + + sysfs_remove_group(&pdev->dev.kobj, &ms200i_lpc_attr_grp); + + for (portid_count=1 ; portid_count<=LENGTH_PORT_CPLD ; portid_count++) + i2c_del_adapter(cpld_data->i2c_adapter[portid_count-1]); + return 0; +} + +static struct platform_driver cel_ms200i_lpc_drv = { + .probe = cel_ms200i_lpc_drv_probe, + .remove = __exit_p(cel_ms200i_lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int cel_ms200i_lpc_init(void) +{ + platform_device_register(&cel_ms200i_lpc_dev); + platform_driver_register(&cel_ms200i_lpc_drv); + + return 0; +} + +void cel_ms200i_lpc_exit(void) +{ + platform_driver_unregister(&cel_ms200i_lpc_drv); + platform_device_unregister(&cel_ms200i_lpc_dev); +} + +module_init(cel_ms200i_lpc_init); +module_exit(cel_ms200i_lpc_exit); + +MODULE_AUTHOR("Pariwat Leamsumran "); +MODULE_DESCRIPTION("Celestica MidStone ms200i LPC Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_wdt.c b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_wdt.c new file mode 100755 index 00000000000..9b3d79cc5a6 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_wdt.c @@ -0,0 +1,363 @@ +/* + * Watchdog driver for the Midstone 200i + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define DRIVER_NAME "ms200i_wdt" + +#define CONF_GPIOBASE 0x8000F848 +#define PCI_CONFIG_ADDRESS 0x0CF8 +#define PCI_CONFIG_DATA 0x0CFC + +// WDT_CTRL is GPIO 32 +// GPIOBUS: 2 ,bit: 0th +#define WDT_CTRL_ENB_REG 0x30 +#define WDT_CTRL_DIR_REG 0x34 +#define WDT_CTRL_LVL_REG 0x38 +#define WDT_CTRL_MASK (unsigned long)(1<<(32%32)) + +// WDT_FEED is GPIO 15 +// GPIOBUS: 1 ,bit: 15th +#define WDT_FEED_ENB_REG 0x00 +#define WDT_FEED_DIR_REG 0x04 +#define WDT_FEED_LVL_REG 0x0C +#define WDT_FEED_MASK (unsigned long)(1<<(15%32)) + +static bool nowayout = WATCHDOG_NOWAYOUT; + +// For enabling Debug message +//#define ENAB_DEBUG +//#define ENAB_DEBUG_GPIO + +struct ms200i_wdt_drvdata { + struct watchdog_device wdt; + struct mutex lock; + unsigned int gpiobase; +}; + +static struct resource ms200i_wdt_resources[] = { + { + .flags = IORESOURCE_IO, + }, +}; + +static void ms200i_wdt_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device ms200i_wdt_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(ms200i_wdt_resources), + .resource = ms200i_wdt_resources, + .dev = { + .release = ms200i_wdt_dev_release, + } +}; + +static int ms200i_wdt_start(struct watchdog_device *wdt_dev) +{ + struct ms200i_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); + unsigned char reset_ctrl = 0x00; + unsigned long enab, gpio ,dir; + unsigned int base_addr; +#ifdef ENAB_DEBUG + printk(KERN_INFO "WDT Start"); +#endif + mutex_lock(&drvdata->lock); + + base_addr = drvdata->gpiobase; + + enab = inl(base_addr + WDT_CTRL_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl enab %16X",enab); +#endif + enab |= WDT_CTRL_MASK; +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl enab %16X",enab); +#endif + outl(enab, base_addr + WDT_CTRL_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + enab = inl(base_addr + WDT_CTRL_ENB_REG); + printk(KERN_INFO "ctrl enab %16X",enab); +#endif + + enab = inl(base_addr + WDT_FEED_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed enab %16X",enab); +#endif + enab |= WDT_FEED_MASK; +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed enab %16X",enab); +#endif + outl(enab, base_addr + WDT_FEED_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + enab = inl(base_addr + WDT_FEED_ENB_REG); + printk(KERN_INFO "feed enab %16X",enab); +#endif + + dir = inl(base_addr + WDT_CTRL_DIR_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl dir %16X",dir); +#endif + dir &= ~WDT_FEED_MASK; +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl dir %16X",dir); +#endif + outl(dir, base_addr + WDT_CTRL_DIR_REG); +#ifdef ENAB_DEBUG_GPIO + dir = inl(base_addr + WDT_CTRL_DIR_REG); + printk(KERN_INFO "ctrl dir %16X",dir); +#endif + + dir = inl(base_addr + WDT_FEED_DIR_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed dir %16X",dir); +#endif + dir &= ~WDT_FEED_MASK; +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed dir %16X",dir); +#endif + outl(dir, base_addr + WDT_FEED_DIR_REG); +#ifdef ENAB_DEBUG_GPIO + dir = inl(base_addr + WDT_FEED_DIR_REG); + printk(KERN_INFO "feed dir %16X",dir); +#endif + + gpio = inl(base_addr + WDT_CTRL_LVL_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl gpio %16X",gpio); +#endif + gpio &= ~WDT_CTRL_MASK; +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl gpio %16X",gpio); +#endif + outl_p( gpio, base_addr + WDT_CTRL_LVL_REG); +#ifdef ENAB_DEBUG_GPIO + gpio = inl(base_addr + WDT_CTRL_LVL_REG); + printk(KERN_INFO "ctrl gpio %16X",gpio); +#endif + + mutex_unlock(&drvdata->lock); + printk(KERN_INFO "WDT Start Finish"); + return 0; +} + +static int ms200i_wdt_stop(struct watchdog_device *wdt_dev) +{ + struct ms200i_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); + unsigned long gpio; + unsigned long base_addr; +#ifdef ENAB_DEBUG + printk(KERN_INFO "WDT Stop"); +#endif + mutex_lock(&drvdata->lock); + + base_addr = drvdata->gpiobase; + + gpio = inl(base_addr + WDT_CTRL_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl gpio %16X",gpio); +#endif + gpio &= ~(WDT_CTRL_MASK); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "ctrl gpio %16X",gpio); +#endif + outl_p(gpio, base_addr + WDT_CTRL_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + gpio = inl(base_addr + WDT_CTRL_ENB_REG); + printk(KERN_INFO "ctrl gpio %16X",gpio); +#endif + + gpio = inl(base_addr + WDT_FEED_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + gpio &= ~(WDT_CTRL_MASK); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + outl_p(gpio, base_addr + WDT_FEED_ENB_REG); +#ifdef ENAB_DEBUG_GPIO + gpio = inl(base_addr + WDT_FEED_ENB_REG); + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + + mutex_unlock(&drvdata->lock); + + return 0; +} + +static int ms200i_wdt_ping(struct watchdog_device *wdt_dev) +{ + struct ms200i_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); + unsigned long gpio; + unsigned long base_addr; + +#ifdef ENAB_DEBUG + printk(KERN_INFO "WDT PING"); +#endif + mutex_lock(&drvdata->lock); + + base_addr = drvdata->gpiobase; + + gpio = inl(base_addr + WDT_FEED_LVL_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + gpio &= ~WDT_FEED_MASK; +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + outl_p( gpio, base_addr + WDT_FEED_LVL_REG); +#ifdef ENAB_DEBUG_GPIO + gpio = inl(base_addr + WDT_FEED_LVL_REG); + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + mdelay(10); + + gpio = inl(base_addr + WDT_FEED_LVL_REG); +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + gpio |= WDT_FEED_MASK; +#ifdef ENAB_DEBUG_GPIO + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + outl_p( gpio, base_addr + WDT_FEED_LVL_REG); +#ifdef ENAB_DEBUG_GPIO + gpio = inl(base_addr + WDT_FEED_LVL_REG); + printk(KERN_INFO "feed gpio %16X",gpio); +#endif + + mutex_unlock(&drvdata->lock); +#ifdef ENAB_DEBUG + printk(KERN_INFO "WDT PING FINISH"); +#endif + return 0; +} + +static const struct watchdog_info ms200i_wdt_info = { + .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, + .identity = "MS200i Watchdog", +}; + +static const struct watchdog_ops ms200i_wdt_ops = { + .owner = THIS_MODULE, + .start = ms200i_wdt_start, + .stop = ms200i_wdt_stop, + .ping = ms200i_wdt_ping, +}; + +static int ms200i_wdt_probe(struct platform_device *pdev) +{ + struct ms200i_wdt_drvdata *drvdata; + int ret; + unsigned int base_addr; + + drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), + GFP_KERNEL); + if (!drvdata) { + ret = -ENOMEM; + goto err; + } + + outl(CONF_GPIOBASE, PCI_CONFIG_ADDRESS); + base_addr = inl(PCI_CONFIG_DATA); + // remove last bit , that is hardware inditcate. + base_addr &= ~(0x01); + + if(base_addr == 0){ + printk(KERN_INFO "can't get gpio base address"); + }else{ + printk(KERN_INFO "gpio base address : %8.8X",base_addr); + } + + mutex_init(&drvdata->lock); + + drvdata->gpiobase = base_addr; + drvdata->wdt.info = &ms200i_wdt_info; + drvdata->wdt.ops = &ms200i_wdt_ops; + + watchdog_set_nowayout(&drvdata->wdt, nowayout); + watchdog_set_drvdata(&drvdata->wdt, drvdata); + + ret = watchdog_register_device(&drvdata->wdt); + if (ret != 0) { + dev_err(&pdev->dev, "watchdog_register_device() failed: %d\n", + ret); + goto err; + } + + platform_set_drvdata(pdev, drvdata); + +err: + return ret; +} + +static int ms200i_wdt_remove(struct platform_device *pdev) +{ + struct ms200i_wdt_drvdata *drvdata = platform_get_drvdata(pdev); + + watchdog_unregister_device(&drvdata->wdt); +#ifdef ENAB_DEBUG + printk(KERN_INFO "MS200i WDT Remove"); +#endif + return 0; +} + +static struct platform_driver ms200i_wdt_drv = { + .probe = ms200i_wdt_probe, + .remove = ms200i_wdt_remove, + .driver = { + .name = DRIVER_NAME, + }, +}; + +int ms200i_wdt_init(void) +{ +#ifdef ENAB_DEBUG + printk(KERN_INFO "MS200i WDT Init"); +#endif + platform_device_register(&ms200i_wdt_dev); + platform_driver_register(&ms200i_wdt_drv); + + return 0; +} + +void ms200i_wdt_exit(void) +{ +#ifdef ENAB_DEBUG + printk(KERN_INFO "MS200i WDT Exit"); +#endif + platform_driver_unregister(&ms200i_wdt_drv); + platform_device_unregister(&ms200i_wdt_dev); +} + +module_init(ms200i_wdt_init); +module_exit(ms200i_wdt_exit); + +MODULE_AUTHOR("Sittisak Sinprem "); +MODULE_DESCRIPTION("Midstone ms200i Watchdog"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:ms200i-watchdog"); diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/Makefile b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/Makefile new file mode 100755 index 00000000000..932a13cf825 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/Makefile @@ -0,0 +1 @@ +obj-m := 200i_cpld.o mc24lc64t.o 200i_wdt.o diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c new file mode 100755 index 00000000000..a391056d09a --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c @@ -0,0 +1,142 @@ +/* + * mc24lc64t.c - driver for Microchip 24LC64T + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct mc24lc64t_data { + struct i2c_client *fake_client; + struct mutex update_lock; +}; + +static ssize_t mc24lc64t_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, read_time, i = 0; + int status; + + mutex_lock(&drvdata->update_lock); + + if (i2c_smbus_write_byte_data(client, off>>8, off)) + { + status = -EIO; + goto exit; + } + + msleep(1); + +begin: + + if (i < count) + { + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + do { + read_time = jiffies; + + status = i2c_smbus_read_byte(client); + if (status >= 0) + { + buf[i++] = status; + goto begin; + } + } while (time_before(read_time, timeout)); + + status = -ETIMEDOUT; + goto exit; + } + + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + + return status; +} + +static struct bin_attribute mc24lc64t_bit_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = 65536, + .read = mc24lc64t_read, +}; + +static int mc24lc64t_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adapter = client->adapter; + struct mc24lc64t_data *drvdata; + int err; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA + | I2C_FUNC_SMBUS_READ_BYTE)) + return -EPFNOSUPPORT; + + if (!(drvdata = devm_kzalloc(&client->dev, + sizeof(struct mc24lc64t_data), GFP_KERNEL))) + return -ENOMEM; + + drvdata->fake_client = i2c_new_dummy(client->adapter, client->addr + 1); + if (!drvdata->fake_client) + return -ENOMEM; + + i2c_set_clientdata(client, drvdata); + mutex_init(&drvdata->update_lock); + + err = sysfs_create_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + if (err) + i2c_unregister_device(drvdata->fake_client); + + return err; +} + +static int mc24lc64t_remove(struct i2c_client *client) +{ + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + + i2c_unregister_device(drvdata->fake_client); + + sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + + return 0; +} + +static const struct i2c_device_id mc24lc64t_id[] = { + { "24lc64t", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mc24lc64t_id); + +static struct i2c_driver mc24lc64t_driver = { + .driver = { + .name = "mc24lc64t", + .owner = THIS_MODULE, + }, + .probe = mc24lc64t_probe, + .remove = mc24lc64t_remove, + .id_table = mc24lc64t_id, +}; + +module_i2c_driver(mc24lc64t_driver); + +MODULE_AUTHOR("Abhisit Sangjan "); +MODULE_DESCRIPTION("Microchip 24LC64T Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/systemd/platform-modules-midstone-200i.service b/platform/innovium/sonic-platform-modules-cel/midstone-200i/systemd/platform-modules-midstone-200i.service new file mode 100644 index 00000000000..dbb7aed39df --- /dev/null +++ b/platform/innovium/sonic-platform-modules-cel/midstone-200i/systemd/platform-modules-midstone-200i.service @@ -0,0 +1,13 @@ +[Unit] +Description=Celestica Midstone 200i platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-midstone-200i start +ExecStop=-/etc/init.d/platform-modules-midstone-200i stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target \ No newline at end of file diff --git a/platform/innovium/sonic-platform-modules-delta/LICENSE b/platform/innovium/sonic-platform-modules-delta/LICENSE new file mode 100644 index 00000000000..ea87fe9caab --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/LICENSE @@ -0,0 +1,16 @@ +Copyright (C) 2016 Microsoft, Inc +Copyright (C) 2017 Delta Networks, Inc. + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/innovium/sonic-platform-modules-delta/common/modules/dni_emc2305.c b/platform/innovium/sonic-platform-modules-delta/common/modules/dni_emc2305.c new file mode 100644 index 00000000000..73d9900af5b --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/common/modules/dni_emc2305.c @@ -0,0 +1,381 @@ +/* + * + * + * Copyright (C) 2017 Delta Networks, Inc. + * + * This program is free software; you can redistribute it + * and/or modify it under the terms ofthe GNU General Public License as + * published by the Free Software Foundation; either version 2 of the License, + * or (at your option) any later version. + * + * + * + * + * + * A hwmon driver for the SMSC EMC2305 fan controller + * Complete datasheet is available (6/2013) at: + * http://www.smsc.com/media/Downloads_Public/Data_Sheets/2305.pdf + */ + +#include +#include +#include +#include +#include + + +static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count); +static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, + char *buf); +static ssize_t set_fan(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count); +static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, + char *buf); +static ssize_t set_fan_percentage(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count); +static ssize_t show_fan_percentage(struct device *dev, struct device_attribute * devattr, + char *buf); +static const unsigned short normal_i2c[] = { 0x2C, 0x2D, 0x2E, 0x2F, 0x4C, + 0x4D, I2C_CLIENT_END + }; + + +#define EMC2305_REG_DEVICE 0xFD +#define EMC2305_REG_VENDOR 0xFE + +//#define FAN_MINIMUN 0x33 /*20%*/ +#define FAN_MINIMUN 0x0 /*0%*/ +#define FAN_RPM_BASED 0xAB + +#define EMC2305_REG_FAN_DRIVE(n) (0x30 + 0x10 * n) +#define EMC2305_REG_FAN_MIN_DRIVE(n) (0x38 + 0x10 * n) +#define EMC2305_REG_FAN_TACH(n) (0x3E + 0x10 * n) +#define EMC2305_REG_FAN_CONF(n) (0x32 + 0x10 * n) +#define EMC2305_REG_FAN_REAR_H_RPM(n) (0x3D + 0x10 * n) +#define EMC2305_REG_FAN_REAR_L_RPM(n) (0x3C + 0x10 * n) + +#define EMC2305_DEVICE 0x34 +#define EMC2305_VENDOR 0x5D +#define MAX_FAN_SPEED 23000 + +struct emc2305_data +{ + struct device *hwmon_dev; + struct attribute_group attrs; + struct mutex lock; +}; + +static int emc2305_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int emc2305_detect(struct i2c_client *client, + struct i2c_board_info *info); +static int emc2305_remove(struct i2c_client *client); + +static const struct i2c_device_id emc2305_id[] = +{ + { "emc2305", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, emc2305_id); + +static struct i2c_driver emc2305_driver = +{ + .class = I2C_CLASS_HWMON, + .driver = { + .name = "emc2305", + }, + .probe = emc2305_probe, + .remove = emc2305_remove, + .id_table = emc2305_id, + .detect = emc2305_detect, + .address_list = normal_i2c, +}; + +static SENSOR_DEVICE_ATTR(fan1_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 1); +static SENSOR_DEVICE_ATTR(fan3_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 2); +static SENSOR_DEVICE_ATTR(fan4_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 3); +static SENSOR_DEVICE_ATTR(fan5_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 4); +static SENSOR_DEVICE_ATTR(fan1_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 0); +static SENSOR_DEVICE_ATTR(fan2_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 1); +static SENSOR_DEVICE_ATTR(fan3_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 2); +static SENSOR_DEVICE_ATTR(fan4_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 3); +static SENSOR_DEVICE_ATTR(fan5_input_percentage, S_IWUSR | S_IRUGO, show_fan_percentage, set_fan_percentage, 4); +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 0); +static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 1); +static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 2); +static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 3); +static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 4); + +static struct attribute *emc2305_attr[] = +{ + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan1_input_percentage.dev_attr.attr, + &sensor_dev_attr_fan2_input_percentage.dev_attr.attr, + &sensor_dev_attr_fan3_input_percentage.dev_attr.attr, + &sensor_dev_attr_fan4_input_percentage.dev_attr.attr, + &sensor_dev_attr_fan5_input_percentage.dev_attr.attr, + &sensor_dev_attr_pwm1.dev_attr.attr, + &sensor_dev_attr_pwm2.dev_attr.attr, + &sensor_dev_attr_pwm3.dev_attr.attr, + &sensor_dev_attr_pwm4.dev_attr.attr, + &sensor_dev_attr_pwm5.dev_attr.attr, + NULL +}; + +static ssize_t show_fan_percentage(struct device *dev, struct device_attribute * devattr, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int val; + + mutex_lock(&data->lock); + val = i2c_smbus_read_word_swapped(client, + EMC2305_REG_FAN_TACH(attr->index)); + mutex_unlock(&data->lock); + /* Left shift 3 bits for showing correct RPM */ + val = val >> 3; + if ((int)(3932160 * 2 / (val > 0 ? val : 1) == 960))return sprintf(buf, "%d\n", 0); + return sprintf(buf, "%d\n", (int)(3932160 * 2 / (val > 0 ? val : 1) * 100 / MAX_FAN_SPEED)); +} + + +static ssize_t set_fan_percentage(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + unsigned long hsb, lsb; + unsigned long tech; + unsigned long val; + int ret; + + ret = kstrtoul(buf, 10, &val); + if (ret) + { + return ret; + } + if (val > 100) + { + return -EINVAL; + } + + if (val <= 5) + { + hsb = 0xff; /*high bit*/ + lsb = 0xe0; /*low bit*/ + } + else + { + val = val * 230; + tech = (3932160 * 2) / (val > 0 ? val : 1); + hsb = (uint8_t)(((tech << 3) >> 8) & 0x0ff); + lsb = (uint8_t)((tech << 3) & 0x0f8); + } + + mutex_lock(&data->lock); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_H_RPM(attr->index), hsb); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_L_RPM(attr->index), lsb); + mutex_unlock(&data->lock); + return count; +} + + +static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int val; + + + mutex_lock(&data->lock); + val = i2c_smbus_read_word_swapped(client, + EMC2305_REG_FAN_TACH(attr->index)); + mutex_unlock(&data->lock); + /* Left shift 3 bits for showing correct RPM */ + val = val >> 3; + return sprintf(buf, "%d\n", 3932160 * 2 / (val > 0 ? val : 1)); +} + +static ssize_t set_fan(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + unsigned long hsb, lsb; + unsigned long tech; + unsigned long val; + int ret; + + ret = kstrtoul(buf, 10, &val); + if (ret) + { + return ret; + } + if (val > 23000) + { + return -EINVAL; + } + + if (val <= 960) + { + hsb = 0xff; /*high bit*/ + lsb = 0xe0; /*low bit*/ + } + else + { + tech = (3932160 * 2) / (val > 0 ? val : 1); + hsb = (uint8_t)(((tech << 3) >> 8) & 0x0ff); + lsb = (uint8_t)((tech << 3) & 0x0f8); + } + + mutex_lock(&data->lock); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_H_RPM(attr->index), hsb); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_L_RPM(attr->index), lsb); + mutex_unlock(&data->lock); + return count; +} + +static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int val; + + mutex_lock(&data->lock); + val = i2c_smbus_read_byte_data(client, + EMC2305_REG_FAN_DRIVE(attr->index)); + mutex_unlock(&data->lock); + return sprintf(buf, "%d\n", val); +} + +static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + unsigned long val; + int ret; + + ret = kstrtoul(buf, 10, &val); + if (ret) + { + return ret; + } + if (val > 255) + { + return -EINVAL; + } + + mutex_lock(&data->lock); + i2c_smbus_write_byte_data(client, + EMC2305_REG_FAN_DRIVE(attr->index), + val); + mutex_unlock(&data->lock); + return count; +} + +static int emc2305_detect(struct i2c_client *client, + struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + int vendor, device; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA)) + { + return -ENODEV; + } + + vendor = i2c_smbus_read_byte_data(client, EMC2305_REG_VENDOR); + if (vendor != EMC2305_VENDOR) + { + return -ENODEV; + } + + device = i2c_smbus_read_byte_data(client, EMC2305_REG_DEVICE); + if (device != EMC2305_DEVICE) + { + return -ENODEV; + } + + strlcpy(info->type, "emc2305", I2C_NAME_SIZE); + + return 0; +} + +static int emc2305_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct emc2305_data *data; + int err; + int i; + + data = devm_kzalloc(&client->dev, sizeof(struct emc2305_data), + GFP_KERNEL); + if (!data) + { + return -ENOMEM; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s chip found\n", client->name); + + data->attrs.attrs = emc2305_attr; + err = sysfs_create_group(&client->dev.kobj, &data->attrs); + if (err) + { + return err; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) + { + err = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + for (i = 0; i < 5; i++) + { + /* set minimum drive to 0% */ + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_MIN_DRIVE(i), FAN_MINIMUN); + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_CONF(i), FAN_RPM_BASED); + } + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &data->attrs); + return err; +} + +static int emc2305_remove(struct i2c_client *client) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->attrs); + return 0; +} + +module_i2c_driver(emc2305_driver); + +MODULE_AUTHOR("Neal Tai"); +MODULE_DESCRIPTION("SMSC EMC2305 fan controller driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/innovium/sonic-platform-modules-delta/debian/changelog b/platform/innovium/sonic-platform-modules-delta/debian/changelog new file mode 100644 index 00000000000..ec8327e8ae7 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/debian/changelog @@ -0,0 +1,5 @@ +sonic-delta-platform-modules (1.1) unstable; urgency=low + + * Initial release + + -- Neal Tai Fri, 21 APR 2017 11:11:11 -0800 diff --git a/platform/innovium/sonic-platform-modules-delta/debian/compat b/platform/innovium/sonic-platform-modules-delta/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/innovium/sonic-platform-modules-delta/debian/control b/platform/innovium/sonic-platform-modules-delta/debian/control new file mode 100644 index 00000000000..71c403387f8 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/debian/control @@ -0,0 +1,13 @@ +Source: sonic-delta-platform-modules +Section: main +Priority: extra +Maintainer: Neal Tai +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: platform-modules-et-c032if +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + + diff --git a/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.init b/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.init new file mode 100755 index 00000000000..f2d24b04a0d --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.init @@ -0,0 +1,39 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup et-c032if board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + modprobe optoe + modprobe delta_et-c032if_platform + + /usr/local/bin/et-c032if_platform_init.sh + echo "done." + ;; + +stop) + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-et-c032if.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.install b/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.install new file mode 100644 index 00000000000..45886664b87 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.install @@ -0,0 +1,3 @@ +et-c032if/cfg/et-c032if-modules.conf etc/modules-load.d +et-c032if/scripts/et-c032if_platform_init.sh usr/local/bin +systemd/platform-modules-et-c032if.service lib/systemd/system diff --git a/platform/innovium/sonic-platform-modules-delta/debian/rules b/platform/innovium/sonic-platform-modules-delta/debian/rules new file mode 100755 index 00000000000..a84c235e548 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/debian/rules @@ -0,0 +1,33 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= et-c032if + +%: + dh $@ --with=systemd + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -pplatform-modules-$${mod} \ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/modules/*.ko \ + debian/platform-modules-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + done) + +override_dh_usrlocal: + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) + diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/cfg/et-c032if-modules.conf b/platform/innovium/sonic-platform-modules-delta/et-c032if/cfg/et-c032if-modules.conf new file mode 100644 index 00000000000..552b4103ed0 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/et-c032if/cfg/et-c032if-modules.conf @@ -0,0 +1,13 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus +i2c-mux-gpio +i2c-mux-pca954x diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/Makefile b/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/Makefile new file mode 100644 index 00000000000..2e8feec0b40 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := delta_et-c032if_platform.o + diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/delta_et-c032if_platform.c b/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/delta_et-c032if_platform.c new file mode 100644 index 00000000000..d4e23a166e8 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/delta_et-c032if_platform.c @@ -0,0 +1,2100 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define CPULD_ADDR 0x31 +#define SWPLD2_ADDR 0x35 +#define SWPLD3_ADDR 0x36 +#define BUS0_BASE_NUM 10 +#define BUS0_DEV_NUM 3 +#define DEFAULT_NUM 0 +#define EEPROM_VAL 0xfc +#define SWPLD_VAL 0xfe +#define QSFP_VAL 0xff +#define BUS0_MUX_REG 0x14 +#define QSFP_PRESENCE_1 0x51 +#define QSFP_PRESENCE_2 0x52 +#define QSFP_PRESENCE_3 0x51 +#define QSFP_PRESENCE_4 0x52 +#define SFP_PRESENCE 0x71 +#define QSFP_RESPONDE_1 0x31 +#define QSFP_RESPONDE_2 0x32 +#define QSFP_RESPONDE_3 0x31 +#define QSFP_RESPONDE_4 0x32 +#define QSFP_LP_MODE_1 0x21 +#define QSFP_LP_MODE_2 0x22 +#define QSFP_LP_MODE_3 0x21 +#define QSFP_LP_MODE_4 0x22 +#define QSFP_RESET_1 0x11 +#define QSFP_RESET_2 0x12 +#define QSFP_RESET_3 0x11 +#define QSFP_RESET_4 0x12 +#define QSFP_INTERRUPT_1 0x61 +#define QSFP_INTERRUPT_2 0x62 +#define QSFP_INTERRUPT_3 0x61 +#define QSFP_INTERRUPT_4 0x62 + +#define EEPROM_SIZE 256 +#define EEPROM_MASK 29 +#define ATTR_R 1 +#define ATTR_W 2 + +#define et_c032if_i2c_device_num(NUM){ \ + .name = "delta-et-c032if-i2c-device", \ + .id = NUM, \ + .dev = { \ + .platform_data = &et_c032if_i2c_device_platform_data[NUM],\ + .release = device_release, \ + }, \ +} + +struct mutex dni_lock; + +/*Define struct to get client of i2c_new_deivce */ +struct i2c_client * i2c_client_9548_1; +struct i2c_client * i2c_client_9548_2; +struct i2c_client * i2c_client_9548_3; +struct i2c_client * i2c_client_9548_4; +struct i2c_client * i2c_client_9548_5; + +static struct kobject *kobj_cpld; +static struct kobject *kobj_swpld2; +static struct kobject *kobj_swpld3; +static struct kobject *kobj_sfp; + +enum{ + BUS0 = 0, + BUS1, + BUS2, + BUS3, + BUS4, + BUS5, + BUS6, + BUS7, + BUS8, + BUS9, + BUS10, + BUS11, + BUS12, + BUS13, + BUS14, + BUS15, + BUS16, + BUS17, + BUS18, + BUS19, +}; + +static struct cpld_attribute_data { + uint8_t bus; + uint8_t addr; + uint8_t reg; + uint8_t mask; + char note[350]; +}; + +unsigned char reverse_8bits(unsigned char c) +{ + unsigned char s = 0; + int i; + for (i = 0; i < 8; ++i) { + s <<= 1; + s |= c & 1; + c >>= 1; + } + return s; +} + +unsigned char dni_log2 (unsigned char num){ + unsigned char num_log2 = 0; + while(num > 0){ + num = num >> 1; + num_log2 += 1; + } + return num_log2 -1; +} + +/*---------------- I2C device - start ------------- */ +static void device_release(struct device *dev) +{ + return; +} + +struct i2c_device_platform_data { + int parent; + struct i2c_board_info info; + struct i2c_client *client; +}; +/* pca9548 - add 8 bus */ + +static struct pca954x_platform_mode pca954x_1_mode[] = +{ + { .adap_id = 30, + .deselect_on_exit = 1, + }, + { .adap_id = 31, + .deselect_on_exit = 1, + }, + { .adap_id = 32, + .deselect_on_exit = 1, + }, + { .adap_id = 33, + .deselect_on_exit = 1, + }, + { .adap_id = 34, + .deselect_on_exit = 1, + }, + { .adap_id = 35, + .deselect_on_exit = 1, + }, + { .adap_id = 36, + .deselect_on_exit = 1, + }, + { .adap_id = 37, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_mode pca954x_2_mode[] = +{ + { .adap_id = 38, + .deselect_on_exit = 1, + }, + { .adap_id = 39, + .deselect_on_exit = 1, + }, + { .adap_id = 40, + .deselect_on_exit = 1, + }, + { .adap_id = 41, + .deselect_on_exit = 1, + }, + { .adap_id = 42, + .deselect_on_exit = 1, + }, + { .adap_id = 43, + .deselect_on_exit = 1, + }, + { .adap_id = 44, + .deselect_on_exit = 1, + }, + { .adap_id = 45, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_mode pca954x_3_mode[] = +{ + { .adap_id = 46, + .deselect_on_exit = 1, + }, + { .adap_id = 47, + .deselect_on_exit = 1, + }, + { .adap_id = 48, + .deselect_on_exit = 1, + }, + { .adap_id = 49, + .deselect_on_exit = 1, + }, + { .adap_id = 50, + .deselect_on_exit = 1, + }, + { .adap_id = 51, + .deselect_on_exit = 1, + }, + { .adap_id = 52, + .deselect_on_exit = 1, + }, + { .adap_id = 53, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_mode pca954x_4_mode[] = +{ + { .adap_id = 54, + .deselect_on_exit = 1, + }, + { .adap_id = 55, + .deselect_on_exit = 1, + }, + { .adap_id = 56, + .deselect_on_exit = 1, + }, + { .adap_id = 57, + .deselect_on_exit = 1, + }, + { .adap_id = 58, + .deselect_on_exit = 1, + }, + { .adap_id = 59, + .deselect_on_exit = 1, + }, + { .adap_id = 60, + .deselect_on_exit = 1, + }, + { .adap_id = 61, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_mode pca954x_5_mode[] = +{ + { .adap_id = 62, + .deselect_on_exit = 1, + }, + { .adap_id = 63, + .deselect_on_exit = 1, + }, + { .adap_id = 64, + .deselect_on_exit = 1, + }, + { .adap_id = 65, + .deselect_on_exit = 1, + }, + { .adap_id = 66, + .deselect_on_exit = 1, + }, + { .adap_id = 67, + .deselect_on_exit = 1, + }, + { .adap_id = 68, + .deselect_on_exit = 1, + }, + { .adap_id = 69, + .deselect_on_exit = 1, + }, +}; + +static struct pca954x_platform_data pca954x_data[] = +{ + { + .modes = pca954x_1_mode, + .num_modes = ARRAY_SIZE(pca954x_1_mode), + }, + { + .modes = pca954x_2_mode, + .num_modes = ARRAY_SIZE(pca954x_2_mode), + }, + { + .modes = pca954x_3_mode, + .num_modes = ARRAY_SIZE(pca954x_3_mode), + }, + { + .modes = pca954x_4_mode, + .num_modes = ARRAY_SIZE(pca954x_4_mode), + }, + { + .modes = pca954x_5_mode, + .num_modes = ARRAY_SIZE(pca954x_5_mode), + }, +}; + +static struct i2c_board_info __initdata i2c_info_pca9548[] = +{ + { + I2C_BOARD_INFO("pca9548", 0x71), + .platform_data = &pca954x_data[0], + }, + { + I2C_BOARD_INFO("pca9548", 0x72), + .platform_data = &pca954x_data[1], + }, + { + I2C_BOARD_INFO("pca9548", 0x73), + .platform_data = &pca954x_data[2], + }, + { + I2C_BOARD_INFO("pca9548", 0x74), + .platform_data = &pca954x_data[3], + }, + { + I2C_BOARD_INFO("pca9548", 0x76), + .platform_data = &pca954x_data[4], + }, +}; + +static struct i2c_device_platform_data et_c032if_i2c_device_platform_data[] = { + { + /* id eeprom (0x53) */ + .parent = 10, + .info = { I2C_BOARD_INFO("24c02", 0x53) }, + .client = NULL, + }, + { + /* qsfp 1 (0x50) */ + .parent = 30, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 2 (0x50) */ + .parent = 31, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 3 (0x50) */ + .parent = 32, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 4 (0x50) */ + .parent = 33, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 5 (0x50) */ + .parent = 34, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 6 (0x50) */ + .parent = 35, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 7 (0x50) */ + .parent = 36, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 8 (0x50) */ + .parent = 37, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 9 (0x50) */ + .parent = 38, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 10 (0x50) */ + .parent = 39, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 11 (0x50) */ + .parent = 40, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 12 (0x50) */ + .parent = 41, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 13 (0x50) */ + .parent = 42, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 14 (0x50) */ + .parent = 43, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 15 (0x50) */ + .parent = 44, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 16 (0x50) */ + .parent = 45, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 17 (0x50) */ + .parent = 46, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 18 (0x50) */ + .parent = 47, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 19 (0x50) */ + .parent = 48, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 20 (0x50) */ + .parent = 49, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 21 (0x50) */ + .parent = 50, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 22 (0x50) */ + .parent = 51, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 23 (0x50) */ + .parent = 52, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 24 (0x50) */ + .parent = 53, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 25 (0x50) */ + .parent = 54, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 26 (0x50) */ + .parent = 55, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 27 (0x50) */ + .parent = 56, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 28 (0x50) */ + .parent = 57, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 29 (0x50) */ + .parent = 58, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 30 (0x50) */ + .parent = 59, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 31 (0x50) */ + .parent = 60, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* qsfp 32 (0x50) */ + .parent = 61, + .info = { .type = "optoe1", .addr = 0x50 }, + .client = NULL, + }, + { + /* sfp 1 (0x50) */ + .parent = 62, + .info = { .type = "optoe2", .addr = 0x50 }, + .client = NULL, + }, + { + /* sfp 2 (0x50) */ + .parent = 63, + .info = { .type = "optoe2", .addr = 0x50 }, + .client = NULL, + }, + +}; + + +static struct platform_device et_c032if_i2c_device[] = { + et_c032if_i2c_device_num(0), + et_c032if_i2c_device_num(1), + et_c032if_i2c_device_num(2), + et_c032if_i2c_device_num(3), + et_c032if_i2c_device_num(4), + et_c032if_i2c_device_num(5), + et_c032if_i2c_device_num(6), + et_c032if_i2c_device_num(7), + et_c032if_i2c_device_num(8), + et_c032if_i2c_device_num(9), + et_c032if_i2c_device_num(10), + et_c032if_i2c_device_num(11), + et_c032if_i2c_device_num(12), + et_c032if_i2c_device_num(13), + et_c032if_i2c_device_num(14), + et_c032if_i2c_device_num(15), + et_c032if_i2c_device_num(16), + et_c032if_i2c_device_num(17), + et_c032if_i2c_device_num(18), + et_c032if_i2c_device_num(19), + et_c032if_i2c_device_num(20), + et_c032if_i2c_device_num(21), + et_c032if_i2c_device_num(22), + et_c032if_i2c_device_num(23), + et_c032if_i2c_device_num(24), + et_c032if_i2c_device_num(25), + et_c032if_i2c_device_num(26), + et_c032if_i2c_device_num(27), + et_c032if_i2c_device_num(28), + et_c032if_i2c_device_num(29), + et_c032if_i2c_device_num(30), + et_c032if_i2c_device_num(31), + et_c032if_i2c_device_num(32), + et_c032if_i2c_device_num(33), + et_c032if_i2c_device_num(34), +}; + +/*---------------- I2C device - end ------------- */ + +/*---------------- I2C driver - start ------------- */ +static int __init i2c_device_probe(struct platform_device *pdev) +{ + struct i2c_device_platform_data *pdata; + struct i2c_adapter *parent; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -ENODEV; + } + + pdata->client = i2c_new_device(parent, &pdata->info); + if (!pdata->client) { + dev_err(&pdev->dev, "Failed to create i2c client %s at %d\n", + pdata->info.type, pdata->parent); + return -ENODEV; + } + + return 0; +} + +static int __exit i2c_deivce_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent; + struct i2c_device_platform_data *pdata; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + if (pdata->client) { + parent = (pdata->client)->adapter; + i2c_unregister_device(pdata->client); + i2c_put_adapter(parent); + } + return 0; +} +static struct platform_driver i2c_device_driver = { + .probe = i2c_device_probe, + .remove = __exit_p(i2c_deivce_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-et-c032if-i2c-device", + } +}; + +/*---------------- I2C driver - end ------------- */ + +/*---------------- CPLD - start ------------- */ + +unsigned char cpupld_reg_addr; +unsigned char swpld2_reg_addr; +unsigned char swpld3_reg_addr; + +/* CPLD -- device */ + +enum cpld_type { + cpu_cpld, +}; + +enum swpld2_type { + swpld2, +}; + +enum swpld3_type { + swpld3, +}; + +enum cpld_attributes { +//CPLDs address and value + CPLD_REG_ADDR, + CPLD_REG_VALUE, + SWPLD2_REG_ADDR, + SWPLD2_REG_VALUE, + SWPLD3_REG_ADDR, + SWPLD3_REG_VALUE, + SFP_SELECT_PORT, + SFP_IS_PRESENT, + SFP_IS_PRESENT_ALL, + QSFP_LP_MODE, + QSFP_RESET, + QSFP_INTERRUPT, + QSFP_RESPONDE, +}; + +struct cpld_platform_data { + int reg_addr; + struct i2c_client *client; +}; + +static struct cpld_platform_data et_c032if_cpld_platform_data[] = { + [cpu_cpld] = { + .reg_addr = CPULD_ADDR, + }, +}; + +static struct cpld_platform_data et_c032if_swpld2_platform_data[] = { + [swpld2] = { + .reg_addr = SWPLD2_ADDR, + }, +}; + +static struct cpld_platform_data et_c032if_swpld3_platform_data[] = { + [swpld3] = { + .reg_addr = SWPLD3_ADDR, + }, +}; + +static struct platform_device et_c032if_cpld = { + .name = "delta-et-c032if-cpld", + .id = 0, + .dev = { + .platform_data = et_c032if_cpld_platform_data, + .release = device_release, + }, +}; + +static struct platform_device et_c032if_swpld2 = { + .name = "delta-et-c032if-swpld2", + .id = 0, + .dev = { + .platform_data = et_c032if_swpld2_platform_data, + .release = device_release + }, +}; + +static struct platform_device et_c032if_swpld3 = { + .name = "delta-et-c032if-swpld3", + .id = 0, + .dev = { + .platform_data = et_c032if_swpld3_platform_data, + .release = device_release + }, +}; + +static ssize_t get_cpld_reg(struct device *dev, struct device_attribute *dev_attr, char *buf) +{ + int ret; + int mask; + int value; + char note[450]; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cpld_platform_data *pdata = dev->platform_data; + + mutex_lock(&dni_lock); + switch (attr->index) { + case CPLD_REG_ADDR: + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", cpupld_reg_addr); + case SWPLD2_REG_ADDR: + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", swpld2_reg_addr); + case SWPLD3_REG_ADDR: + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", swpld3_reg_addr); + case CPLD_REG_VALUE: + ret = i2c_smbus_read_byte_data(pdata[cpu_cpld].client, cpupld_reg_addr); + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", ret); + case SWPLD2_REG_VALUE: + ret = i2c_smbus_read_byte_data(pdata[swpld2].client, swpld2_reg_addr); + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", ret); + case SWPLD3_REG_VALUE: + ret = i2c_smbus_read_byte_data(pdata[swpld3].client, swpld3_reg_addr); + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x\n", ret); + default: + mutex_unlock(&dni_lock); + return sprintf(buf, "%d not found", attr->index); + } + + switch (mask) { + case 0xff: + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x%s", value, note); + case 0x0f: + case 0x07: + case 0x03: + break; + case 0x0c: + value = value >> 2; + break; + case 0xf0: + case 0x70: + case 0x30: + value = value >> 4; + break; + case 0xe0: + value = value >> 5; + break; + case 0xc0: + value = value >> 6; + break; + default : + value = value >> dni_log2(mask); + mutex_unlock(&dni_lock); + return sprintf(buf, "%d%s", value, note); + } + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%02x%s", value, note); +} + +static ssize_t set_cpld_reg(struct device *dev, struct device_attribute *dev_attr, + const char *buf, size_t count) +{ + int err; + int set_data; + unsigned long set_data_ul; + unsigned char mask; + unsigned char mask_out; + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 0, &set_data_ul); + if (err){ + return err; + } + + mutex_lock(&dni_lock); + set_data = (int)set_data_ul; + if (set_data > 0xff){ + printk(KERN_ALERT "address out of range (0x00-0xFF)\n"); + mutex_unlock(&dni_lock); + return count; + } + + switch (attr->index) { + case CPLD_REG_ADDR: + cpupld_reg_addr = set_data; + mutex_unlock(&dni_lock); + return count; + case SWPLD2_REG_ADDR: + swpld2_reg_addr = set_data; + mutex_unlock(&dni_lock); + return count; + case SWPLD3_REG_ADDR: + swpld3_reg_addr = set_data; + mutex_unlock(&dni_lock); + return count; + case CPLD_REG_VALUE: + i2c_smbus_write_byte_data(pdata[cpu_cpld].client, cpupld_reg_addr, set_data); + mutex_unlock(&dni_lock); + return count; + case SWPLD2_REG_VALUE: + i2c_smbus_write_byte_data(pdata[swpld2].client, swpld2_reg_addr, set_data); + mutex_unlock(&dni_lock); + return count; + case SWPLD3_REG_VALUE: + i2c_smbus_write_byte_data(pdata[swpld3].client, swpld3_reg_addr, set_data); + mutex_unlock(&dni_lock); + return count; + default: + mutex_unlock(&dni_lock); + return sprintf(buf, "%d not found", attr->index); + } + + switch (mask) { + case 0x03: + case 0x07: + case 0x0f: + case 0xff: + set_data = mask_out | (set_data & mask); + break; + case 0x0c: + set_data = set_data << 2; + set_data = mask_out | (set_data & mask); + break; + case 0xf0: + case 0x70: + case 0x30: + set_data = set_data << 4; + set_data = mask_out | (set_data & mask); + break; + case 0xe0: + set_data = set_data << 5; + set_data = mask_out | (set_data & mask); + break; + case 0xc0: + set_data = set_data << 6; + set_data = mask_out | (set_data & mask); + break; + default : + set_data = mask_out | (set_data << dni_log2(mask) ); + } + switch (attr->index) { + default: + mutex_unlock(&dni_lock); + return sprintf(buf, "cpld not found"); + } + mutex_unlock(&dni_lock); + return count; +} + +/* ---------------- SFP attribute read/write - start -------- */ + +static ssize_t for_status(struct device *dev, struct device_attribute *dev_attr, char *buf){ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct device *i2cdev_1 = kobj_to_dev(kobj_swpld2); + struct device *i2cdev_2 = kobj_to_dev(kobj_swpld3); + struct cpld_platform_data *pdata1 = i2cdev_1->platform_data; + struct cpld_platform_data *pdata2 = i2cdev_2->platform_data; + + mutex_lock(&dni_lock); + int ret; + u32 data = 0; + int data2 = 0; + u8 save_bytes = 0x00; + + switch (attr->index) { + case SFP_IS_PRESENT: + /* Report the SFP/QSFP ALL PRESENCE status + * This data information form SWPLD2 and SWPLD3. */ + + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_PRESENCE_4); + data = (u32)(ret & 0xff); + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_PRESENCE_3); + data |= (u32)(ret & 0xff) << 8; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_PRESENCE_2); + data |= (u32)(ret & 0xff) << 16; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_PRESENCE_1); + data |= (u32)(ret & 0xff) << 24; + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, SFP_PRESENCE); + data2 = (ret & 0x44); + save_bytes = data2 & 0x40; + save_bytes = save_bytes << 1; + data2 &= 0x04; + data2 = data2 << 4; + data2 |= save_bytes; + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%x%02x\n", data, data2); + + case QSFP_LP_MODE: + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_LP_MODE_4); + data = (u32)(ret & 0xff); + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_LP_MODE_3); + data |= (u32)(ret & 0xff) << 8; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_LP_MODE_2); + data |= (u32)(ret & 0xff) << 16; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_LP_MODE_1); + data |= (u32)(ret & 0xff) << 24; + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%x\n", data); + + case QSFP_RESET: + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_RESET_4); + data = (u32)(ret & 0xff); + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_RESET_3); + data |= (u32)(ret & 0xff) << 8; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_RESET_2); + data |= (u32)(ret & 0xff) << 16; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_RESET_1); + data |= (u32)(ret & 0xff) << 24; + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%x\n", data); + + case QSFP_INTERRUPT: + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_INTERRUPT_4); + data = (u32)(ret & 0xff); + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_INTERRUPT_3); + data |= (u32)(ret & 0xff) << 8; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_INTERRUPT_2); + data |= (u32)(ret & 0xff) << 16; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_INTERRUPT_1); + data |= (u32)(ret & 0xff) << 24; + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%x\n", data); + + case QSFP_RESPONDE: + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_RESPONDE_4); + data = (u32)(ret & 0xff); + ret = i2c_smbus_read_byte_data(pdata2[swpld3].client, QSFP_RESPONDE_3); + data |= (u32)(ret & 0xff) << 8; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_RESPONDE_2); + data |= (u32)(ret & 0xff) << 16; + ret = i2c_smbus_read_byte_data(pdata1[swpld2].client, QSFP_RESPONDE_1); + data |= (u32)(ret & 0xff) << 24; + mutex_unlock(&dni_lock); + return sprintf(buf, "0x%x\n", data); + + default: + mutex_unlock(&dni_lock); + return sprintf(buf, "%d not found", attr->index); + } +} + + +static ssize_t set_lpmode_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count) +{ + struct device *i2cdev_1 = kobj_to_dev(kobj_swpld2); + struct device *i2cdev_2 = kobj_to_dev(kobj_swpld3); + struct cpld_platform_data *pdata1 = i2cdev_1->platform_data; + struct cpld_platform_data *pdata2 = i2cdev_2->platform_data; + unsigned long long set_data; + int err; + int values = 0x00; + u8 reg_t = 0x00; + + err = kstrtoull(buf, 16, &set_data); + if (err){ + return err; + } + mutex_lock(&dni_lock); + reg_t = QSFP_LP_MODE_1; + values = ((set_data >> 24 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + + reg_t = QSFP_LP_MODE_2; + values = ((set_data >> 16 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + + reg_t = QSFP_LP_MODE_3; + values = ((set_data >> 8 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + + reg_t = QSFP_LP_MODE_4; + values = (set_data & 0xff); + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + + mutex_unlock(&dni_lock); + return count; + +ERROR: + mutex_unlock(&dni_lock); + return -EIO; +} + +static ssize_t set_reset_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count) +{ + struct device *i2cdev_1 = kobj_to_dev(kobj_swpld2); + struct device *i2cdev_2 = kobj_to_dev(kobj_swpld3); + struct cpld_platform_data *pdata1 = i2cdev_1->platform_data; + struct cpld_platform_data *pdata2 = i2cdev_2->platform_data; + unsigned long long set_data; + int err; + int values = 0x00; + u8 reg_t = 0x00; + + err = kstrtoull(buf, 16, &set_data); + if (err){ + return err; + } + + mutex_lock(&dni_lock); + reg_t = QSFP_RESET_1; + values = ((set_data >> 24 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_RESET_2; + values = ((set_data >> 16 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_RESET_3; + values = ((set_data >> 8 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_RESET_4; + values = (set_data & 0xff); + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + + mutex_unlock(&dni_lock); + return count; + +ERROR: + mutex_unlock(&dni_lock); + return -EIO; +} + +static ssize_t set_interrupt_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count) +{ + struct device *i2cdev_1 = kobj_to_dev(kobj_swpld2); + struct device *i2cdev_2 = kobj_to_dev(kobj_swpld3); + struct cpld_platform_data *pdata1 = i2cdev_1->platform_data; + struct cpld_platform_data *pdata2 = i2cdev_2->platform_data; + unsigned long long set_data; + int err; + int values = 0x00; + u8 reg_t = 0x00; + + err = kstrtoull(buf, 16, &set_data); + if (err){ + return err; + } + + mutex_lock(&dni_lock); + reg_t = QSFP_INTERRUPT_1; + values = ((set_data >> 24 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_INTERRUPT_2; + values = ((set_data >> 16 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_INTERRUPT_3; + values = ((set_data >> 8 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_INTERRUPT_4; + values = (set_data & 0xff); + + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + + mutex_unlock(&dni_lock); + return count; + +ERROR: + mutex_unlock(&dni_lock); + return -EIO; +} + +static ssize_t set_responde_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count) +{ + struct device *i2cdev_1 = kobj_to_dev(kobj_swpld2); + struct device *i2cdev_2 = kobj_to_dev(kobj_swpld3); + struct cpld_platform_data *pdata1 = i2cdev_1->platform_data; + struct cpld_platform_data *pdata2 = i2cdev_2->platform_data; + unsigned long long set_data; + int err; + int values = 0x00; + u8 reg_t = 0x00; + + err = kstrtoull(buf, 16, &set_data); + if (err){ + return err; + } + + mutex_lock(&dni_lock); + reg_t = QSFP_RESPONDE_1; + values = ((set_data >> 24 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_RESPONDE_2; + values = ((set_data >> 16 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata1[swpld2].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_RESPONDE_3; + values = ((set_data >> 8 ) & 0xff); + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + reg_t = QSFP_RESPONDE_4; + values = (set_data & 0xff); + if (i2c_smbus_write_byte_data(pdata2[swpld3].client, reg_t, (u8)values) < 0) + { + goto ERROR; + } + + mutex_unlock(&dni_lock); + return count; + +ERROR: + mutex_unlock(&dni_lock); + return -EIO; +} + +static SENSOR_DEVICE_ATTR(cpld_reg_addr, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, CPLD_REG_ADDR); +static SENSOR_DEVICE_ATTR(cpld_reg_value, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, CPLD_REG_VALUE); +static SENSOR_DEVICE_ATTR(swpld2_reg_addr, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, SWPLD2_REG_ADDR); +static SENSOR_DEVICE_ATTR(swpld2_reg_value, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, SWPLD2_REG_VALUE); +static SENSOR_DEVICE_ATTR(swpld3_reg_addr, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, SWPLD3_REG_ADDR); +static SENSOR_DEVICE_ATTR(swpld3_reg_value, S_IRUGO | S_IWUSR, get_cpld_reg, set_cpld_reg, SWPLD3_REG_VALUE); +//SFP, QSFP +static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, for_status, NULL, SFP_IS_PRESENT); +static SENSOR_DEVICE_ATTR(sfp_lp_mode, S_IWUSR | S_IRUGO, for_status, set_lpmode_data, QSFP_LP_MODE); +static SENSOR_DEVICE_ATTR(sfp_reset, S_IWUSR | S_IRUGO, for_status, set_reset_data, QSFP_RESET); +static SENSOR_DEVICE_ATTR(sfp_interrupt, S_IWUSR | S_IRUGO, for_status, set_interrupt_data, QSFP_INTERRUPT); +static SENSOR_DEVICE_ATTR(sfp_responde, S_IWUSR | S_IRUGO, for_status, set_responde_data, QSFP_RESPONDE); + +static struct attribute *cpld_attrs[] = { + &sensor_dev_attr_cpld_reg_value.dev_attr.attr, + &sensor_dev_attr_cpld_reg_addr.dev_attr.attr, +//SFP, QSFP + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_lp_mode.dev_attr.attr, + &sensor_dev_attr_sfp_reset.dev_attr.attr, + &sensor_dev_attr_sfp_interrupt.dev_attr.attr, + &sensor_dev_attr_sfp_responde.dev_attr.attr, + NULL, +}; + +static struct attribute *swpld2_attrs[] = { + &sensor_dev_attr_swpld2_reg_value.dev_attr.attr, + &sensor_dev_attr_swpld2_reg_addr.dev_attr.attr, + NULL, +}; + +static struct attribute *swpld3_attrs[] = { + &sensor_dev_attr_swpld3_reg_value.dev_attr.attr, + &sensor_dev_attr_swpld3_reg_addr.dev_attr.attr, + NULL, +}; + +static struct attribute_group cpld_attr_grp = { + .attrs = cpld_attrs, +}; + +static struct attribute_group swpld2_attr_grp = { + .attrs = swpld2_attrs, +}; + +static struct attribute_group swpld3_attr_grp = { + .attrs = swpld3_attrs, +}; + +/* CPLD -- driver */ +static int __init cpld_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "CPLD platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(BUS0); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", BUS0); + return -ENODEV; + } + + pdata[cpu_cpld].client = i2c_new_dummy(parent, pdata[cpu_cpld].reg_addr); + if (!pdata[cpu_cpld].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[cpu_cpld].reg_addr); + goto error; + } + + kobj_cpld = &pdev->dev.kobj; + ret = sysfs_create_group(&pdev->dev.kobj, &cpld_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create cpld attribute group"); + goto error; + } + + return 0; +error: + kobject_put(kobj_cpld); + i2c_unregister_device(pdata[cpu_cpld].client); + i2c_put_adapter(parent); + + return -ENODEV; +} + +static int __exit cpld_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &cpld_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + if (pdata[cpu_cpld].client) { + if (!parent) { + parent = (pdata[cpu_cpld].client)->adapter; + } + i2c_unregister_device(pdata[cpu_cpld].client); + } + } + i2c_put_adapter(parent); + + return 0; +} + +static int __init swpld2_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD2 platform data not found\n"); + return -ENODEV; + } + parent = i2c_get_adapter(11); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", 11); + return -ENODEV; + } + + pdata[swpld2].client = i2c_new_dummy(parent, pdata[swpld2].reg_addr); + if (!pdata[swpld2].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[swpld2].reg_addr); + goto error; + } + + kobj_swpld2 = &pdev->dev.kobj; + ret = sysfs_create_group(&pdev->dev.kobj, &swpld2_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create swpld attribute group"); + goto error; + } + return 0; + +error: + kobject_put(kobj_swpld2); + i2c_unregister_device(pdata[swpld2].client); + i2c_put_adapter(parent); + return -ENODEV; +} + +static int __exit swpld2_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &swpld2_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + if (pdata[swpld2].client) { + if (!parent) { + parent = (pdata[swpld2].client)->adapter; + } + i2c_unregister_device(pdata[swpld2].client); + } + } + i2c_put_adapter(parent); + return 0; +} + + +static int __init swpld3_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD3 platform data not found\n"); + return -ENODEV; + } + + parent = i2c_get_adapter(11); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", 11); + return -ENODEV; + } + + pdata[swpld3].client = i2c_new_dummy(parent, pdata[swpld3].reg_addr); + if (!pdata[swpld3].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[swpld3].reg_addr); + goto error; + } + + kobj_swpld3 = &pdev->dev.kobj; + ret = sysfs_create_group(&pdev->dev.kobj, &swpld3_attr_grp); + if (ret) { + printk(KERN_WARNING "Fail to create swpld attribute group"); + goto error; + } + + return 0; + +error: + kobject_put(kobj_swpld3); + i2c_unregister_device(pdata[swpld3].client); + i2c_put_adapter(parent); + + return -ENODEV; +} + +static int __exit swpld3_remove(struct platform_device *pdev) +{ + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + sysfs_remove_group(&pdev->dev.kobj, &swpld3_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } + else { + if (pdata[swpld3].client) { + if (!parent) { + parent = (pdata[swpld3].client)->adapter; + } + i2c_unregister_device(pdata[swpld3].client); + } + } + i2c_put_adapter(parent); + return 0; +} + +static struct platform_driver cpld_driver = { + .probe = cpld_probe, + .remove = __exit_p(cpld_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-et-c032if-cpld", + }, +}; + +static struct platform_driver swpld2_driver = { + .probe = swpld2_probe, + .remove = __exit_p(swpld2_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-et-c032if-swpld2", + }, +}; + +static struct platform_driver swpld3_driver = { + .probe = swpld3_probe, + .remove = __exit_p(swpld3_remove), + .driver = { + .owner = THIS_MODULE, + .name = "delta-et-c032if-swpld3", + }, +}; + + +/*---------------- CPLD - end ------------- */ + +/*---------------- delta ATTR - start ------------- */ + +struct delta_bin_attribute { + struct bin_attribute attr; + int index; +}; + +#define to_delta_attr(x) container_of(x, struct delta_bin_attribute, attr) + +#define BIN_ATTR(_name, _mode, _read, _write, _size, _index) { \ + .attr = { \ + .attr = {.name = __stringify(_name), .mode = _mode }, \ + .read = _read, \ + .write = _write, \ + .size = _size, \ + }, \ + .index = _index, \ +} + +#define DELTA_BIN_ATTR(_name, _mode, _read, _write, _size, _index) \ +struct delta_bin_attribute delta_attr_##_name \ + = BIN_ATTR(_name, _mode, _read, _write, _size, _index) + +static char eeprom_data[EEPROM_SIZE]; + +static ssize_t access_user_space(const char *name, char *buf, size_t len, loff_t offset, int mode) +{ + struct file *fp; + mm_segment_t fs; + loff_t pos = offset; + ssize_t vfs_ret = 0; + + fs = get_fs(); + set_fs(get_ds()); + + switch(mode) + { + case ATTR_W: + fp = filp_open(name, O_WRONLY, S_IWUSR | S_IRUGO); + if (IS_ERR(fp)){ + return -ENOENT; + } + vfs_ret = vfs_write(fp, buf, len, &pos); + break; + case ATTR_R: + fp = filp_open(name, O_RDONLY, S_IRUGO); + if (IS_ERR(fp)){ + return -ENOENT; + } + vfs_ret = vfs_read(fp, buf, len, &pos); + break; + } + + set_fs(fs); + filp_close(fp, NULL); + return vfs_ret; +} + +enum sfp_attributes{ + EEPROM_SYS, + EEPROM_SFP_1, + EEPROM_SFP_2, + EEPROM_SFP_3, + EEPROM_SFP_4, + EEPROM_SFP_5, + EEPROM_SFP_6, + EEPROM_SFP_7, + EEPROM_SFP_8, + EEPROM_SFP_9, + EEPROM_SFP_10, + EEPROM_SFP_11, + EEPROM_SFP_12, + EEPROM_SFP_13, + EEPROM_SFP_14, + EEPROM_SFP_15, + EEPROM_SFP_16, + EEPROM_SFP_17, + EEPROM_SFP_18, + EEPROM_SFP_19, + EEPROM_SFP_20, + EEPROM_SFP_21, + EEPROM_SFP_22, + EEPROM_SFP_23, + EEPROM_SFP_24, + EEPROM_SFP_25, + EEPROM_SFP_26, + EEPROM_SFP_27, + EEPROM_SFP_28, + EEPROM_SFP_29, + EEPROM_SFP_30, + EEPROM_SFP_31, + EEPROM_SFP_32, + EEPROM_SFP_33, + EEPROM_SFP_34, +}; + + +static ssize_t delta_bin_attr_read(struct file *filp, struct kobject *kobj, struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct delta_bin_attribute *delta_attr = to_delta_attr(attr); + char attr_path[100]; + + mutex_lock(&dni_lock); + memset(buf, 0, count); + switch(delta_attr->index) { + case EEPROM_SFP_1: + case EEPROM_SFP_2: + case EEPROM_SFP_3: + case EEPROM_SFP_4: + case EEPROM_SFP_5: + case EEPROM_SFP_6: + case EEPROM_SFP_7: + case EEPROM_SFP_8: + case EEPROM_SFP_9: + case EEPROM_SFP_10: + case EEPROM_SFP_11: + case EEPROM_SFP_12: + case EEPROM_SFP_13: + case EEPROM_SFP_14: + case EEPROM_SFP_15: + case EEPROM_SFP_16: + case EEPROM_SFP_17: + case EEPROM_SFP_18: + case EEPROM_SFP_19: + case EEPROM_SFP_20: + case EEPROM_SFP_21: + case EEPROM_SFP_22: + case EEPROM_SFP_23: + case EEPROM_SFP_24: + case EEPROM_SFP_25: + case EEPROM_SFP_26: + case EEPROM_SFP_27: + case EEPROM_SFP_28: + case EEPROM_SFP_29: + case EEPROM_SFP_30: + case EEPROM_SFP_31: + case EEPROM_SFP_32: + case EEPROM_SFP_33: + case EEPROM_SFP_34: + sprintf(attr_path, "/sys/bus/i2c/devices/%d-0050/eeprom", delta_attr->index + EEPROM_MASK); + if (access_user_space(attr_path, eeprom_data, EEPROM_SIZE, 0, ATTR_R) < 0) { + goto ACCESS_ERROR; + } + count = (count <= EEPROM_SIZE) ? count : EEPROM_SIZE; + memcpy(buf, eeprom_data + off, count); + break; + case EEPROM_SYS: + sprintf(attr_path, "/sys/bus/i2c/devices/10-0053/eeprom"); + if (access_user_space(attr_path, eeprom_data, EEPROM_SIZE, 0, ATTR_R) < 0) { + goto ACCESS_ERROR; + } + count = (count <= EEPROM_SIZE) ? count : EEPROM_SIZE; + memcpy(buf, eeprom_data + off, count); + break; + default: + goto ACCESS_ERROR; + } + mutex_unlock(&dni_lock); + return count; + +ACCESS_ERROR: + mutex_unlock(&dni_lock); + return -ENXIO; +} + +static ssize_t delta_bin_attr_write(struct file *filp, struct kobject *kobj, struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct delta_bin_attribute *delta_attr = to_delta_attr(attr); + char attr_path[100]; + + switch(delta_attr->index){ + case EEPROM_SFP_1: + case EEPROM_SFP_2: + case EEPROM_SFP_3: + case EEPROM_SFP_4: + case EEPROM_SFP_5: + case EEPROM_SFP_6: + case EEPROM_SFP_7: + case EEPROM_SFP_8: + case EEPROM_SFP_9: + case EEPROM_SFP_10: + case EEPROM_SFP_11: + case EEPROM_SFP_12: + case EEPROM_SFP_13: + case EEPROM_SFP_14: + case EEPROM_SFP_15: + case EEPROM_SFP_16: + case EEPROM_SFP_17: + case EEPROM_SFP_18: + case EEPROM_SFP_19: + case EEPROM_SFP_20: + case EEPROM_SFP_21: + case EEPROM_SFP_22: + case EEPROM_SFP_23: + case EEPROM_SFP_24: + case EEPROM_SFP_25: + case EEPROM_SFP_26: + case EEPROM_SFP_27: + case EEPROM_SFP_28: + case EEPROM_SFP_29: + case EEPROM_SFP_30: + case EEPROM_SFP_31: + case EEPROM_SFP_32: + case EEPROM_SFP_33: + case EEPROM_SFP_34: + sprintf(attr_path, "/sys/bus/i2c/devices/%d-0050/eeprom", delta_attr->index + EEPROM_MASK); + if (access_user_space(attr_path, buf, count, 0, ATTR_W) < 0) { + goto ACCESS_ERROR; + } + break; + case EEPROM_SYS: + sprintf(attr_path, "/sys/bus/i2c/devices/10-0053/eeprom"); + if (access_user_space(attr_path, buf, count, 0, ATTR_W) < 0) { + goto ACCESS_ERROR; + } + break; + default: + goto ACCESS_ERROR; + } + + mutex_unlock(&dni_lock); + return count; +ACCESS_ERROR: + mutex_unlock(&dni_lock); + return -ETIMEDOUT; +} + +DELTA_BIN_ATTR(eeprom_sys, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SYS); +DELTA_BIN_ATTR(eeprom_sfp_1, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_1); +DELTA_BIN_ATTR(eeprom_sfp_2, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_2); +DELTA_BIN_ATTR(eeprom_sfp_3, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_3); +DELTA_BIN_ATTR(eeprom_sfp_4, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_4); +DELTA_BIN_ATTR(eeprom_sfp_5, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_5); +DELTA_BIN_ATTR(eeprom_sfp_6, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_6); +DELTA_BIN_ATTR(eeprom_sfp_7, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_7); +DELTA_BIN_ATTR(eeprom_sfp_8, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_8); +DELTA_BIN_ATTR(eeprom_sfp_9, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_9); +DELTA_BIN_ATTR(eeprom_sfp_10, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_10); +DELTA_BIN_ATTR(eeprom_sfp_11, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_11); +DELTA_BIN_ATTR(eeprom_sfp_12, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_12); +DELTA_BIN_ATTR(eeprom_sfp_13, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_13); +DELTA_BIN_ATTR(eeprom_sfp_14, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_14); +DELTA_BIN_ATTR(eeprom_sfp_15, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_15); +DELTA_BIN_ATTR(eeprom_sfp_16, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_16); +DELTA_BIN_ATTR(eeprom_sfp_17, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_17); +DELTA_BIN_ATTR(eeprom_sfp_18, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_18); +DELTA_BIN_ATTR(eeprom_sfp_19, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_19); +DELTA_BIN_ATTR(eeprom_sfp_20, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_20); +DELTA_BIN_ATTR(eeprom_sfp_21, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_21); +DELTA_BIN_ATTR(eeprom_sfp_22, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_22); +DELTA_BIN_ATTR(eeprom_sfp_23, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_23); +DELTA_BIN_ATTR(eeprom_sfp_24, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_24); +DELTA_BIN_ATTR(eeprom_sfp_25, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_25); +DELTA_BIN_ATTR(eeprom_sfp_26, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_26); +DELTA_BIN_ATTR(eeprom_sfp_27, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_27); +DELTA_BIN_ATTR(eeprom_sfp_28, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_28); +DELTA_BIN_ATTR(eeprom_sfp_29, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_29); +DELTA_BIN_ATTR(eeprom_sfp_30, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_30); +DELTA_BIN_ATTR(eeprom_sfp_31, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_31); +DELTA_BIN_ATTR(eeprom_sfp_32, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_32); +DELTA_BIN_ATTR(eeprom_sfp_33, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_33); +DELTA_BIN_ATTR(eeprom_sfp_34, 0664, delta_bin_attr_read, delta_bin_attr_write, EEPROM_SIZE, EEPROM_SFP_34); + +static struct bin_attribute *sfp_attrs[] = { + &delta_attr_eeprom_sys.attr, + &delta_attr_eeprom_sfp_1.attr, + &delta_attr_eeprom_sfp_2.attr, + &delta_attr_eeprom_sfp_3.attr, + &delta_attr_eeprom_sfp_4.attr, + &delta_attr_eeprom_sfp_5.attr, + &delta_attr_eeprom_sfp_6.attr, + &delta_attr_eeprom_sfp_7.attr, + &delta_attr_eeprom_sfp_8.attr, + &delta_attr_eeprom_sfp_9.attr, + &delta_attr_eeprom_sfp_10.attr, + &delta_attr_eeprom_sfp_11.attr, + &delta_attr_eeprom_sfp_12.attr, + &delta_attr_eeprom_sfp_13.attr, + &delta_attr_eeprom_sfp_14.attr, + &delta_attr_eeprom_sfp_15.attr, + &delta_attr_eeprom_sfp_16.attr, + &delta_attr_eeprom_sfp_17.attr, + &delta_attr_eeprom_sfp_18.attr, + &delta_attr_eeprom_sfp_19.attr, + &delta_attr_eeprom_sfp_20.attr, + &delta_attr_eeprom_sfp_21.attr, + &delta_attr_eeprom_sfp_22.attr, + &delta_attr_eeprom_sfp_23.attr, + &delta_attr_eeprom_sfp_24.attr, + &delta_attr_eeprom_sfp_25.attr, + &delta_attr_eeprom_sfp_26.attr, + &delta_attr_eeprom_sfp_27.attr, + &delta_attr_eeprom_sfp_28.attr, + &delta_attr_eeprom_sfp_29.attr, + &delta_attr_eeprom_sfp_30.attr, + &delta_attr_eeprom_sfp_31.attr, + &delta_attr_eeprom_sfp_32.attr, + &delta_attr_eeprom_sfp_33.attr, + &delta_attr_eeprom_sfp_34.attr, + NULL, /* need to NULL terminate the list of attributes */ +}; + +static struct attribute_group sfp_attr_grp = { + .bin_attrs = sfp_attrs, +}; + +/*---------------- delta ATTR - end ------------- */ + +/*---------------- MUX - start ------------- */ + +struct cpld_mux_platform_data { + int parent; + int base_nr; + int reg_addr; + struct i2c_client *cpld; +}; + +struct cpld_mux { + struct i2c_adapter *parent; + struct i2c_adapter **child; + struct cpld_mux_platform_data data; +}; + +static struct cpld_mux_platform_data et_c032if_cpld_mux_platform_data[] = { + { + .parent = BUS0, + .base_nr = BUS0_BASE_NUM, + .cpld = NULL, + .reg_addr = BUS0_MUX_REG, + }, +}; + +static struct platform_device et_c032if_cpld_mux[] = +{ + { + .name = "delta-et-c032if-cpld-mux", + .id = 0, + .dev = { + .platform_data = &et_c032if_cpld_mux_platform_data[0], + .release = device_release, + }, + }, +}; + +static int cpld_reg_write_byte(struct i2c_client *client, u8 regaddr, u8 val) +{ + union i2c_smbus_data data; + + data.byte = val; + return client->adapter->algo->smbus_xfer(client->adapter, client->addr, + client->flags, + I2C_SMBUS_WRITE, + regaddr, I2C_SMBUS_BYTE_DATA, &data); +} + +static int cpld_mux_select(struct i2c_mux_core *muxc, u32 chan) +{ + struct cpld_mux *mux = i2c_mux_priv(muxc); + u8 cpld_mux_val=0; + + if ( mux->data.base_nr == BUS0_BASE_NUM ) + { + switch (chan) { + case 0: + cpld_mux_val = EEPROM_VAL; + break; + case 1: + cpld_mux_val = SWPLD_VAL; + break; + case 2: + cpld_mux_val = QSFP_VAL; + break; + default: + cpld_mux_val = 0x00; + break; + } + } + else + { + cpld_mux_val = 0x00; + } + return cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr, (u8)(cpld_mux_val & 0xff)); + +} + +static int __init cpld_mux_probe(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc; + struct cpld_mux *mux; + struct cpld_mux_platform_data *pdata; + struct i2c_adapter *parent; + int i, ret, dev_num; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "SWPLD platform data not found\n"); + return -ENODEV; + } + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) { + printk(KERN_ERR "Failed to allocate memory for mux\n"); + return -ENOMEM; + } + mux->data = *pdata; + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + kfree(mux); + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", pdata->parent); + return -ENODEV; + } + /* Judge bus number to decide how many devices*/ + switch (pdata->parent) { + case BUS0: + dev_num = BUS0_DEV_NUM; + break; + default : + dev_num = DEFAULT_NUM; + break; + } + + muxc = i2c_mux_alloc(parent, &pdev->dev, dev_num, 0, 0,cpld_mux_select, NULL); + if (!muxc) { + ret = -ENOMEM; + goto alloc_failed; + } + muxc->priv = mux; + platform_set_drvdata(pdev, muxc); + + for (i = 0; i < dev_num; i++) + { + int nr = pdata->base_nr + i; + unsigned int class = 0; + ret = i2c_mux_add_adapter(muxc, nr, i, class); + if (ret) { + dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + goto add_adapter_failed; + } + } + dev_info(&pdev->dev, "%d port mux on %s adapter\n", dev_num, parent->name); + return 0; + +add_adapter_failed: + i2c_mux_del_adapters(muxc); +alloc_failed: + kfree(mux); + i2c_put_adapter(parent); + + return ret; +} + +static int __exit cpld_mux_remove(struct platform_device *pdev) +{ + struct i2c_mux_core *muxc = platform_get_drvdata(pdev); + struct i2c_adapter *parent = muxc->parent; + + i2c_mux_del_adapters(muxc); + i2c_put_adapter(parent); + + return 0; +} + +static struct platform_driver cpld_mux_driver = { + .probe = cpld_mux_probe, + .remove = __exit_p(cpld_mux_remove), /* TODO */ + .driver = { + .owner = THIS_MODULE, + .name = "delta-et-c032if-cpld-mux", + }, +}; +/*---------------- MUX - end ------------- */ + +/*---------------- module initialization ------------- */ +static int __init delta_et_c032if_platform_init(void) +{ + struct i2c_adapter *adapter; + struct cpld_platform_data *cpld_pdata; + struct cpld_mux_platform_data *cpld_mux_pdata; + int ret,i = 0; + + mutex_init(&dni_lock); + printk("c032if_platform module initialization\n"); + + // set the CPLD prob and remove + ret = platform_driver_register(&cpld_driver); + if (ret) { + printk(KERN_WARNING "Fail to register cpld driver\n"); + goto error_cpld_driver; + } + + ret = platform_driver_register(&cpld_mux_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld mux driver\n"); + goto error_cpld_mux_driver; + } + + // set the SWPLD prob and remove + ret = platform_driver_register(&swpld2_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld driver\n"); + goto error_swpld2_driver; + } + + // set the SWPLD prob and remove + ret = platform_driver_register(&swpld3_driver); + if (ret) { + printk(KERN_WARNING "Fail to register swpld driver\n"); + goto error_swpld3_driver; + } + + // register the i2c devices + ret = platform_driver_register(&i2c_device_driver); + if (ret) { + printk(KERN_WARNING "Fail to register i2c device driver\n"); + goto error_i2c_device_driver; + } + + // register the CPLD + ret = platform_device_register(&et_c032if_cpld); + if (ret) { + printk(KERN_WARNING "Fail to create cpld device\n"); + goto error_et_c032if_cpld; + } + + cpld_pdata = et_c032if_cpld.dev.platform_data; + cpld_mux_pdata = et_c032if_cpld_mux[0].dev.platform_data; + cpld_mux_pdata->cpld = cpld_pdata[cpu_cpld].client; + ret = platform_device_register(&et_c032if_cpld_mux[0]); + if (ret) { + printk(KERN_WARNING "Fail to create cpld mux\n"); + goto error_et_c032if_cpld_mux; + } + + adapter = i2c_get_adapter(12); + i2c_client_9548_1 = i2c_new_device(adapter, &i2c_info_pca9548[0]); + i2c_client_9548_2 = i2c_new_device(adapter, &i2c_info_pca9548[1]); + i2c_client_9548_3 = i2c_new_device(adapter, &i2c_info_pca9548[2]); + i2c_client_9548_4 = i2c_new_device(adapter, &i2c_info_pca9548[3]); + i2c_client_9548_5 = i2c_new_device(adapter, &i2c_info_pca9548[4]); + i2c_put_adapter(adapter); + + // register the SWPLD2 + ret = platform_device_register(&et_c032if_swpld2); + if (ret) { + printk(KERN_WARNING "Fail to create swpld2 device\n"); + goto error_swpld2_device; + } + + // register the SWPLD3 + ret = platform_device_register(&et_c032if_swpld3); + if (ret) { + printk(KERN_WARNING "Fail to create swpld3 device\n"); + goto error_swpld3_device; + } + for (i = 0; i < ARRAY_SIZE(et_c032if_i2c_device); i++) + { + ret = platform_device_register(&et_c032if_i2c_device[i]); + if (ret) { + printk(KERN_WARNING "Fail to create i2c device %d\n", i); + goto error_et_c032if_i2c_device; + } + } + + kobj_sfp = kobject_create_and_add("sfp", kernel_kobj); + if(!kobj_sfp) + { + return -ENOMEM; + } + ret = sysfs_create_group(kobj_sfp, &sfp_attr_grp); + if (ret) + { + printk(KERN_WARNING "Fail to create sysfs of sfp group\n"); + goto error_create_sfp_group; + } + if (ret) + goto error_create_sfp_group; + + return 0; + +error_create_sfp_group: + kobject_put(kobj_sfp); +error_et_c032if_i2c_device: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&et_c032if_i2c_device[i]); + } + i = ARRAY_SIZE(et_c032if_cpld_mux); + platform_device_unregister(&et_c032if_swpld3); +error_swpld3_device: + platform_device_unregister(&et_c032if_swpld2); +error_swpld2_device: + i2c_unregister_device(i2c_client_9548_1); + i2c_unregister_device(i2c_client_9548_2); + i2c_unregister_device(i2c_client_9548_3); + i2c_unregister_device(i2c_client_9548_4); + i2c_unregister_device(i2c_client_9548_5); +error_et_c032if_cpld_mux: + platform_device_unregister(&et_c032if_cpld_mux[0]); + platform_device_unregister(&et_c032if_cpld); +error_et_c032if_cpld: + platform_driver_unregister(&i2c_device_driver); +error_i2c_device_driver: + platform_driver_unregister(&swpld3_driver); +error_swpld3_driver: + platform_driver_unregister(&swpld2_driver); +error_swpld2_driver: + platform_driver_unregister(&cpld_mux_driver); +error_cpld_mux_driver: + platform_driver_unregister(&cpld_driver); +error_cpld_driver: + return ret; +} + +static void __exit delta_et_c032if_platform_exit(void) +{ + int i = 0; + + kobject_put(kobj_sfp); + for (i = 0; i < ARRAY_SIZE(et_c032if_i2c_device); i++) { + platform_device_unregister(&et_c032if_i2c_device[i]); + } + platform_device_unregister(&et_c032if_swpld2); + platform_device_unregister(&et_c032if_swpld3); + i2c_unregister_device(i2c_client_9548_1); + i2c_unregister_device(i2c_client_9548_2); + i2c_unregister_device(i2c_client_9548_3); + i2c_unregister_device(i2c_client_9548_4); + i2c_unregister_device(i2c_client_9548_5); + platform_device_unregister(&et_c032if_cpld_mux[0]); + platform_device_unregister(&et_c032if_cpld); + platform_driver_unregister(&i2c_device_driver); + platform_driver_unregister(&swpld2_driver); + platform_driver_unregister(&swpld3_driver); + platform_driver_unregister(&cpld_mux_driver); + platform_driver_unregister(&cpld_driver); +} + +module_init(delta_et_c032if_platform_init); +module_exit(delta_et_c032if_platform_exit); + +MODULE_DESCRIPTION("Delta et-c032if Platform Support"); +MODULE_AUTHOR("Johnson Lu "); +MODULE_LICENSE("GPL"); diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/scripts/et-c032if_platform_init.sh b/platform/innovium/sonic-platform-modules-delta/et-c032if/scripts/et-c032if_platform_init.sh new file mode 100644 index 00000000000..522aabea26b --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/et-c032if/scripts/et-c032if_platform_init.sh @@ -0,0 +1,9 @@ +#!/bin/bash + +#platform init script for Delta et-c032if + + + +exit 0 + + diff --git a/platform/innovium/sonic-platform-modules-delta/systemd/platform-modules-et-c032if.service b/platform/innovium/sonic-platform-modules-delta/systemd/platform-modules-et-c032if.service new file mode 100644 index 00000000000..273a5ab65a4 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-delta/systemd/platform-modules-et-c032if.service @@ -0,0 +1,13 @@ +[Unit] +Description=Delta et-c032if Platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-et-c032if start +ExecStop=-/etc/init.d/platform-modules-et-c032if stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/marvell-arm64/docker-ptf-mrvl.mk b/platform/marvell-arm64/docker-ptf-mrvl.mk new file mode 100644 index 00000000000..69dff4a90dd --- /dev/null +++ b/platform/marvell-arm64/docker-ptf-mrvl.mk @@ -0,0 +1,7 @@ +# docker image for docker-ptf-mrvl + +DOCKER_PTF_MRVL = docker-ptf-mrvl.gz +$(DOCKER_PTF_MRVL)_PATH = $(DOCKERS_PATH)/docker-ptf-saithrift +$(DOCKER_PTF_MRVL)_DEPENDS += $(PYTHON_SAITHRIFT) +$(DOCKER_PTF_MRVL)_LOAD_DOCKERS += $(DOCKER_PTF) +SONIC_DOCKER_IMAGES += $(DOCKER_PTF_MRVL) diff --git a/platform/marvell-arm64/docker-saiserver-mrvl.mk b/platform/marvell-arm64/docker-saiserver-mrvl.mk new file mode 100644 index 00000000000..398902961da --- /dev/null +++ b/platform/marvell-arm64/docker-saiserver-mrvl.mk @@ -0,0 +1,15 @@ +# docker image for mrvl saiserver + +DOCKER_SAISERVER_MRVL = docker-saiserver-mrvl.gz +$(DOCKER_SAISERVER_MRVL)_PATH = $(PLATFORM_PATH)/docker-saiserver-mrvl +$(DOCKER_SAISERVER_MRVL)_DEPENDS += $(SAISERVER) +$(DOCKER_SAISERVER_MRVL)_FILES += $(DSSERVE) $(BCMCMD) +$(DOCKER_SAISERVER_MRVL)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) +SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_MRVL) + +$(DOCKER_SAISERVER_MRVL)_CONTAINER_NAME = saiserver +$(DOCKER_SAISERVER_MRVL)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd +$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/marvell-arm64/docker-syncd-mrvl-rpc.mk b/platform/marvell-arm64/docker-syncd-mrvl-rpc.mk new file mode 100644 index 00000000000..0e1b65f2fd5 --- /dev/null +++ b/platform/marvell-arm64/docker-syncd-mrvl-rpc.mk @@ -0,0 +1,24 @@ +# docker image for mrvl syncd with rpc + +DOCKER_SYNCD_MRVL_RPC = docker-syncd-mrvl-rpc.gz +$(DOCKER_SYNCD_MRVL_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-mrvl-rpc +$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) +$(DOCKER_SYNCD_MRVL_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) +ifeq ($(INSTALL_DEBUG_TOOLS), y) +$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) +endif +$(DOCKER_SYNCD_MRVL_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_RPC) +SONIC_STRETCH_DOCKERS += $(DOCKER_SYNCD_MRVL_RPC) +ifeq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_RPC) +endif + +$(DOCKER_SYNCD_MRVL_RPC)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/marvell-arm64/docker-syncd-mrvl-rpc/99-syncd.conf b/platform/marvell-arm64/docker-syncd-mrvl-rpc/99-syncd.conf new file mode 100644 index 00000000000..3fabe208d81 --- /dev/null +++ b/platform/marvell-arm64/docker-syncd-mrvl-rpc/99-syncd.conf @@ -0,0 +1 @@ +sysctl -w net.core.rmem_max=509430500 diff --git a/platform/marvell-arm64/docker-syncd-mrvl-rpc/Dockerfile.j2 b/platform/marvell-arm64/docker-syncd-mrvl-rpc/Dockerfile.j2 new file mode 100644 index 00000000000..cea067d2abf --- /dev/null +++ b/platform/marvell-arm64/docker-syncd-mrvl-rpc/Dockerfile.j2 @@ -0,0 +1,51 @@ +FROM docker-syncd-mrvl + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +COPY \ +{% for deb in docker_syncd_mrvl_rpc_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get purge -y syncd + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ +{% for deb in docker_syncd_mrvl_rpc_debs.split(' ') -%} +dpkg_apt debs/{{ deb }}{{'; '}} +{%- endfor %} + +## Pre-install the fundamental packages +RUN apt-get update \ + && apt-get -y install \ + net-tools \ + python-pip \ + build-essential \ + libssl-dev \ + libffi-dev \ + python-dev \ + wget \ + cmake \ + && wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ + && tar xvfz 1.0.0.tar.gz \ + && cd nanomsg-1.0.0 \ + && mkdir -p build \ + && cmake . \ + && make install \ + && ldconfig \ + && cd .. \ + && rm -fr nanomsg-1.0.0 \ + && rm -f 1.0.0.tar.gz \ + && pip install cffi==1.7.0 \ + && pip install --upgrade cffi==1.7.0 \ + && pip install nnpy \ + && mkdir -p /opt \ + && cd /opt \ + && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ + && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \ + && rm -rf /root/deps + +COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/marvell-arm64/docker-syncd-mrvl-rpc/ptf_nn_agent.conf b/platform/marvell-arm64/docker-syncd-mrvl-rpc/ptf_nn_agent.conf new file mode 100644 index 00000000000..fa1ed0eb162 --- /dev/null +++ b/platform/marvell-arm64/docker-syncd-mrvl-rpc/ptf_nn_agent.conf @@ -0,0 +1,10 @@ +[program:ptf_nn_agent] +command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-iface-rcv-buffer=109430400 +process_name=ptf_nn_agent +stdout_logfile=/tmp/ptf_nn_agent.out.log +stderr_logfile=/tmp/ptf_nn_agent.err.log +redirect_stderr=false +autostart=true +autorestart=true +startsecs=1 +numprocs=1 diff --git a/platform/marvell-arm64/docker-syncd-mrvl.mk b/platform/marvell-arm64/docker-syncd-mrvl.mk new file mode 100644 index 00000000000..e00769a5970 --- /dev/null +++ b/platform/marvell-arm64/docker-syncd-mrvl.mk @@ -0,0 +1,13 @@ +# docker image for mrvl syncd + +DOCKER_SYNCD_PLATFORM_CODE = mrvl +include $(PLATFORM_PATH)/../template/docker-syncd-base.mk + +$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) + +$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) + +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/marvell-arm64/docker-syncd-mrvl/Dockerfile.j2 b/platform/marvell-arm64/docker-syncd-mrvl/Dockerfile.j2 new file mode 100755 index 00000000000..410911e6a4f --- /dev/null +++ b/platform/marvell-arm64/docker-syncd-mrvl/Dockerfile.j2 @@ -0,0 +1,38 @@ +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +COPY \ +{% for deb in docker_syncd_mrvl_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get update \ + && apt-get -y install \ + net-tools \ + iputils-ping + +RUN apt-get -y install libpcap-dev libxml2-dev python-dev swig libsensors4-dev libjemalloc1 nfs-common + +RUN dpkg -i \ +{% for deb in docker_syncd_mrvl_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +COPY ["start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor/"] + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/marvell-arm64/docker-syncd-mrvl/critical_processes b/platform/marvell-arm64/docker-syncd-mrvl/critical_processes new file mode 100644 index 00000000000..6082f242b87 --- /dev/null +++ b/platform/marvell-arm64/docker-syncd-mrvl/critical_processes @@ -0,0 +1 @@ +syncd diff --git a/platform/marvell-arm64/docker-syncd-mrvl/start.sh b/platform/marvell-arm64/docker-syncd-mrvl/start.sh new file mode 100755 index 00000000000..62331605047 --- /dev/null +++ b/platform/marvell-arm64/docker-syncd-mrvl/start.sh @@ -0,0 +1,7 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +supervisorctl start syncd diff --git a/platform/marvell-arm64/docker-syncd-mrvl/supervisord.conf b/platform/marvell-arm64/docker-syncd-mrvl/supervisord.conf new file mode 100644 index 00000000000..1af5d70a1d0 --- /dev/null +++ b/platform/marvell-arm64/docker-syncd-mrvl/supervisord.conf @@ -0,0 +1,28 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/marvell-arm64/docker-syncd-mrvl/syncd.sh b/platform/marvell-arm64/docker-syncd-mrvl/syncd.sh new file mode 100755 index 00000000000..993cf100f2f --- /dev/null +++ b/platform/marvell-arm64/docker-syncd-mrvl/syncd.sh @@ -0,0 +1,12 @@ +#!/usr/bin/env bash + +function clean_up { + service syncd stop + exit +} + +trap clean_up SIGTERM SIGKILL + +service syncd start + +read diff --git a/platform/marvell-arm64/libsaithrift-dev.mk b/platform/marvell-arm64/libsaithrift-dev.mk new file mode 100644 index 00000000000..e1c3da156ec --- /dev/null +++ b/platform/marvell-arm64/libsaithrift-dev.mk @@ -0,0 +1,20 @@ +# libsaithrift-dev package + +SAI_VER = 0.9.4 + +LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_$(CONFIGURED_ARCH).deb +$(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI +$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(MRVL_FPA) $(MRVL_SAI) +$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) $(MRVL_SAI) +SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV) + +PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_$(CONFIGURED_ARCH).deb +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT))) + +SAISERVER = saiserver_$(SAI_VER)_$(CONFIGURED_ARCH).deb +$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(MRVL_SAI) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER))) + +SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_$(CONFIGURED_ARCH).deb +$(SAISERVER_DBG)_RDEPENDS += $(SAISERVER) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER_DBG))) diff --git a/platform/marvell-arm64/linux-kernel-arm64.mk b/platform/marvell-arm64/linux-kernel-arm64.mk new file mode 100644 index 00000000000..ba7638ad108 --- /dev/null +++ b/platform/marvell-arm64/linux-kernel-arm64.mk @@ -0,0 +1,10 @@ +# linux kernel package for marvell arm64 + +KVERSION = 4.9.168 + + +LINUX_KERNEL = linux-image-4.9.168-arm64.deb +export LINUX_KERNEL + +$(LINUX_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/linux +SONIC_MAKE_DEBS += $(LINUX_KERNEL) diff --git a/platform/marvell-arm64/linux/Makefile b/platform/marvell-arm64/linux/Makefile new file mode 100644 index 00000000000..3b43f181dc7 --- /dev/null +++ b/platform/marvell-arm64/linux/Makefile @@ -0,0 +1,10 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +LINUX_KERNEL_MRVL_URL = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/arm64/kernel/$(LINUX_KERNEL) + +$(addprefix $(DEST)/, $(LINUX_KERNEL)): $(DEST)/% : + # get deb package + wget -O $(DEST)/$(LINUX_KERNEL) $(LINUX_KERNEL_MRVL_URL) + diff --git a/platform/marvell-arm64/one-image.mk b/platform/marvell-arm64/one-image.mk new file mode 100644 index 00000000000..3a68f54fcdf --- /dev/null +++ b/platform/marvell-arm64/one-image.mk @@ -0,0 +1,13 @@ +# sonic marvell one image installer + +SONIC_ONE_IMAGE = sonic-marvell-arm64.bin +$(SONIC_ONE_IMAGE)_MACHINE = marvell-arm64 +$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie +$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +ifeq ($(INSTALL_DEBUG_TOOLS),y) +$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) +$(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) +else +$(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES) +endif +SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/marvell-arm64/platform.conf b/platform/marvell-arm64/platform.conf new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/marvell-arm64/rules.mk b/platform/marvell-arm64/rules.mk new file mode 100644 index 00000000000..b61a7a87c3c --- /dev/null +++ b/platform/marvell-arm64/rules.mk @@ -0,0 +1,22 @@ +#include $(PLATFORM_PATH)/sdk.mk +include $(PLATFORM_PATH)/sai.mk +include $(PLATFORM_PATH)/docker-syncd-mrvl.mk +include $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.mk +include $(PLATFORM_PATH)/docker-saiserver-mrvl.mk +include $(PLATFORM_PATH)/libsaithrift-dev.mk +include $(PLATFORM_PATH)/docker-ptf-mrvl.mk +include $(PLATFORM_PATH)/one-image.mk +include $(PLATFORM_PATH)/linux-kernel-arm64.mk +ENABLE_SYSTEM_TELEMETRY = "" +ENABLE_SYNCD_RPC = "" + + +SONIC_ALL += $(SONIC_ONE_IMAGE) \ + $(DOCKER_FPM) + #$(DOCKER_SYNCD_MRVL_RPC) + +# Inject mrvl sai into sairedis +$(LIBSAIREDIS)_DEPENDS += $(MRVL_SAI) $(LIBSAITHRIFT_DEV_MRVL) + +# Runtime dependency on mrvl sai is set only for syncd +$(SYNCD)_RDEPENDS += $(MRVL_SAI) diff --git a/platform/marvell-arm64/sai.mk b/platform/marvell-arm64/sai.mk new file mode 100644 index 00000000000..ad8ff329ba6 --- /dev/null +++ b/platform/marvell-arm64/sai.mk @@ -0,0 +1,9 @@ +# Marvell SAI + +export MRVL_SAI_VERSION = 1.4.1 +export MRVL_SAI_TAG = SONiC.201904 +export MRVL_SAI = mrvllibsai_$(PLATFORM_ARCH)_$(MRVL_SAI_VERSION).deb + +$(MRVL_SAI)_SRC_PATH = $(PLATFORM_PATH)/sai +#$(MRVL_SAI)_DEPENDS += $(MRVL_FPA) +SONIC_MAKE_DEBS += $(MRVL_SAI) diff --git a/platform/marvell-arm64/sai/Makefile b/platform/marvell-arm64/sai/Makefile new file mode 100644 index 00000000000..3e990575cb5 --- /dev/null +++ b/platform/marvell-arm64/sai/Makefile @@ -0,0 +1,9 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MRVL_SAI_URL = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/arm64/sai-plugin/$(MRVL_SAI) + +$(addprefix $(DEST)/, $(MRVL_SAI)): $(DEST)/% : + # get deb package + wget -O $(DEST)/$(MRVL_SAI) $(MRVL_SAI_URL) diff --git a/platform/marvell-armhf/docker-ptf-mrvl.mk b/platform/marvell-armhf/docker-ptf-mrvl.mk new file mode 100644 index 00000000000..69dff4a90dd --- /dev/null +++ b/platform/marvell-armhf/docker-ptf-mrvl.mk @@ -0,0 +1,7 @@ +# docker image for docker-ptf-mrvl + +DOCKER_PTF_MRVL = docker-ptf-mrvl.gz +$(DOCKER_PTF_MRVL)_PATH = $(DOCKERS_PATH)/docker-ptf-saithrift +$(DOCKER_PTF_MRVL)_DEPENDS += $(PYTHON_SAITHRIFT) +$(DOCKER_PTF_MRVL)_LOAD_DOCKERS += $(DOCKER_PTF) +SONIC_DOCKER_IMAGES += $(DOCKER_PTF_MRVL) diff --git a/platform/marvell-armhf/docker-saiserver-mrvl.mk b/platform/marvell-armhf/docker-saiserver-mrvl.mk new file mode 100644 index 00000000000..398902961da --- /dev/null +++ b/platform/marvell-armhf/docker-saiserver-mrvl.mk @@ -0,0 +1,15 @@ +# docker image for mrvl saiserver + +DOCKER_SAISERVER_MRVL = docker-saiserver-mrvl.gz +$(DOCKER_SAISERVER_MRVL)_PATH = $(PLATFORM_PATH)/docker-saiserver-mrvl +$(DOCKER_SAISERVER_MRVL)_DEPENDS += $(SAISERVER) +$(DOCKER_SAISERVER_MRVL)_FILES += $(DSSERVE) $(BCMCMD) +$(DOCKER_SAISERVER_MRVL)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) +SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_MRVL) + +$(DOCKER_SAISERVER_MRVL)_CONTAINER_NAME = saiserver +$(DOCKER_SAISERVER_MRVL)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd +$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/marvell-armhf/docker-syncd-mrvl-rpc.mk b/platform/marvell-armhf/docker-syncd-mrvl-rpc.mk new file mode 100644 index 00000000000..0e1b65f2fd5 --- /dev/null +++ b/platform/marvell-armhf/docker-syncd-mrvl-rpc.mk @@ -0,0 +1,24 @@ +# docker image for mrvl syncd with rpc + +DOCKER_SYNCD_MRVL_RPC = docker-syncd-mrvl-rpc.gz +$(DOCKER_SYNCD_MRVL_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-mrvl-rpc +$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) +$(DOCKER_SYNCD_MRVL_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) +ifeq ($(INSTALL_DEBUG_TOOLS), y) +$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) +endif +$(DOCKER_SYNCD_MRVL_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_RPC) +SONIC_STRETCH_DOCKERS += $(DOCKER_SYNCD_MRVL_RPC) +ifeq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_RPC) +endif + +$(DOCKER_SYNCD_MRVL_RPC)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/marvell-armhf/docker-syncd-mrvl-rpc/99-syncd.conf b/platform/marvell-armhf/docker-syncd-mrvl-rpc/99-syncd.conf new file mode 100644 index 00000000000..3fabe208d81 --- /dev/null +++ b/platform/marvell-armhf/docker-syncd-mrvl-rpc/99-syncd.conf @@ -0,0 +1 @@ +sysctl -w net.core.rmem_max=509430500 diff --git a/platform/marvell-armhf/docker-syncd-mrvl-rpc/Dockerfile.j2 b/platform/marvell-armhf/docker-syncd-mrvl-rpc/Dockerfile.j2 new file mode 100644 index 00000000000..cea067d2abf --- /dev/null +++ b/platform/marvell-armhf/docker-syncd-mrvl-rpc/Dockerfile.j2 @@ -0,0 +1,51 @@ +FROM docker-syncd-mrvl + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +COPY \ +{% for deb in docker_syncd_mrvl_rpc_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get purge -y syncd + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ +{% for deb in docker_syncd_mrvl_rpc_debs.split(' ') -%} +dpkg_apt debs/{{ deb }}{{'; '}} +{%- endfor %} + +## Pre-install the fundamental packages +RUN apt-get update \ + && apt-get -y install \ + net-tools \ + python-pip \ + build-essential \ + libssl-dev \ + libffi-dev \ + python-dev \ + wget \ + cmake \ + && wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ + && tar xvfz 1.0.0.tar.gz \ + && cd nanomsg-1.0.0 \ + && mkdir -p build \ + && cmake . \ + && make install \ + && ldconfig \ + && cd .. \ + && rm -fr nanomsg-1.0.0 \ + && rm -f 1.0.0.tar.gz \ + && pip install cffi==1.7.0 \ + && pip install --upgrade cffi==1.7.0 \ + && pip install nnpy \ + && mkdir -p /opt \ + && cd /opt \ + && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ + && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \ + && rm -rf /root/deps + +COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/marvell-armhf/docker-syncd-mrvl-rpc/ptf_nn_agent.conf b/platform/marvell-armhf/docker-syncd-mrvl-rpc/ptf_nn_agent.conf new file mode 100644 index 00000000000..fa1ed0eb162 --- /dev/null +++ b/platform/marvell-armhf/docker-syncd-mrvl-rpc/ptf_nn_agent.conf @@ -0,0 +1,10 @@ +[program:ptf_nn_agent] +command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-iface-rcv-buffer=109430400 +process_name=ptf_nn_agent +stdout_logfile=/tmp/ptf_nn_agent.out.log +stderr_logfile=/tmp/ptf_nn_agent.err.log +redirect_stderr=false +autostart=true +autorestart=true +startsecs=1 +numprocs=1 diff --git a/platform/marvell-armhf/docker-syncd-mrvl.mk b/platform/marvell-armhf/docker-syncd-mrvl.mk new file mode 100644 index 00000000000..e00769a5970 --- /dev/null +++ b/platform/marvell-armhf/docker-syncd-mrvl.mk @@ -0,0 +1,13 @@ +# docker image for mrvl syncd + +DOCKER_SYNCD_PLATFORM_CODE = mrvl +include $(PLATFORM_PATH)/../template/docker-syncd-base.mk + +$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) + +$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) + +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/marvell-armhf/docker-syncd-mrvl/Dockerfile.j2 b/platform/marvell-armhf/docker-syncd-mrvl/Dockerfile.j2 new file mode 100755 index 00000000000..410911e6a4f --- /dev/null +++ b/platform/marvell-armhf/docker-syncd-mrvl/Dockerfile.j2 @@ -0,0 +1,38 @@ +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +COPY \ +{% for deb in docker_syncd_mrvl_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get update \ + && apt-get -y install \ + net-tools \ + iputils-ping + +RUN apt-get -y install libpcap-dev libxml2-dev python-dev swig libsensors4-dev libjemalloc1 nfs-common + +RUN dpkg -i \ +{% for deb in docker_syncd_mrvl_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +COPY ["start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor/"] + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/marvell-armhf/docker-syncd-mrvl/critical_processes b/platform/marvell-armhf/docker-syncd-mrvl/critical_processes new file mode 100644 index 00000000000..6082f242b87 --- /dev/null +++ b/platform/marvell-armhf/docker-syncd-mrvl/critical_processes @@ -0,0 +1 @@ +syncd diff --git a/platform/marvell-armhf/docker-syncd-mrvl/start.sh b/platform/marvell-armhf/docker-syncd-mrvl/start.sh new file mode 100755 index 00000000000..62331605047 --- /dev/null +++ b/platform/marvell-armhf/docker-syncd-mrvl/start.sh @@ -0,0 +1,7 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +supervisorctl start syncd diff --git a/platform/marvell-armhf/docker-syncd-mrvl/supervisord.conf b/platform/marvell-armhf/docker-syncd-mrvl/supervisord.conf new file mode 100644 index 00000000000..1af5d70a1d0 --- /dev/null +++ b/platform/marvell-armhf/docker-syncd-mrvl/supervisord.conf @@ -0,0 +1,28 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/marvell-armhf/libsaithrift-dev.mk b/platform/marvell-armhf/libsaithrift-dev.mk new file mode 100644 index 00000000000..e1c3da156ec --- /dev/null +++ b/platform/marvell-armhf/libsaithrift-dev.mk @@ -0,0 +1,20 @@ +# libsaithrift-dev package + +SAI_VER = 0.9.4 + +LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_$(CONFIGURED_ARCH).deb +$(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI +$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(MRVL_FPA) $(MRVL_SAI) +$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) $(MRVL_SAI) +SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV) + +PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_$(CONFIGURED_ARCH).deb +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT))) + +SAISERVER = saiserver_$(SAI_VER)_$(CONFIGURED_ARCH).deb +$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(MRVL_SAI) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER))) + +SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_$(CONFIGURED_ARCH).deb +$(SAISERVER_DBG)_RDEPENDS += $(SAISERVER) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER_DBG))) diff --git a/platform/marvell-armhf/linux-kernel-armhf.mk b/platform/marvell-armhf/linux-kernel-armhf.mk new file mode 100644 index 00000000000..32e8ea3c604 --- /dev/null +++ b/platform/marvell-armhf/linux-kernel-armhf.mk @@ -0,0 +1,7 @@ +# linux kernel package for marvell armhf + +# Add platform specific DTB +LINUX_KERNEL_DTB = linux-image-4.9.168-armhf.deb +$(LINUX_KERNEL_DTB)_URL = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/armhf/kernel/$(LINUX_KERNEL_DTB) +SONIC_ONLINE_DEBS += $(LINUX_KERNEL_DTB) +SONIC_STRETCH_DEBS += $(LINUX_KERNEL_DTB) diff --git a/platform/marvell-armhf/linux/Makefile b/platform/marvell-armhf/linux/Makefile new file mode 100644 index 00000000000..dba660649ab --- /dev/null +++ b/platform/marvell-armhf/linux/Makefile @@ -0,0 +1,10 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +LINUX_KERNEL_MRVL_URL = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/armhf/kernel/$(LINUX_KERNEL_DTB) + +$(addprefix $(DEST)/, $(LINUX_KERNEL_DTB)): $(DEST)/% : + # get deb package + wget -O $(DEST)/$(LINUX_KERNEL_DTB) $(LINUX_KERNEL_MRVL_URL) + diff --git a/platform/marvell-armhf/one-image.mk b/platform/marvell-armhf/one-image.mk new file mode 100644 index 00000000000..bed895d84d8 --- /dev/null +++ b/platform/marvell-armhf/one-image.mk @@ -0,0 +1,14 @@ +# sonic marvell one image installer + +SONIC_ONE_IMAGE = sonic-marvell-armhf.bin +$(SONIC_ONE_IMAGE)_MACHINE = marvell-armhf +$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie +$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_ONE_IMAGE)_INSTALLS += $(LINUX_KERNEL_DTB) +ifeq ($(INSTALL_DEBUG_TOOLS),y) +$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) +$(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) +else +$(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES) +endif +SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/marvell-armhf/platform.conf b/platform/marvell-armhf/platform.conf new file mode 100644 index 00000000000..e574a8d1a0c --- /dev/null +++ b/platform/marvell-armhf/platform.conf @@ -0,0 +1,143 @@ +# Copyright (C) Marvell Inc + +# over ride default behaviour + +echo "Preparing for installation ... " + +# global defines +kernel_addr=0x1100000 +fdt_addr=0x1000000 + +image_name="/vmlinuz" +fdt_name="/boot/armada-385-ET6448M_4G_Nand.dtb" + +# global mount defines +demo_dev=ubi0 +mtd_dev=/dev/$(cat /proc/mtd | grep "SONIC" | grep -o "mtd[0-9]") +mtd_num=$(echo $mtd_dev | grep -o "[0-9]") +demo_mount=/tmp +FW_ENV='/dev/mtd0 \t\t 0x00500000 \t 0x80000 \t 0x100000 \t 8' + +BOOTARGS='setenv bootargs root='$demo_dev' rw rootwait ubi.mtd='$mtd_num' rootfstype=ubifs panic=1 console=ttyS0,115200 ${othbootargs} ${mtdparts}' +UBI_LOAD='run ubi_sonic_boot_mount_ubi; ubifsload $kernel_addr $image_name;ubifsload $fdt_addr $fdt_name' +UBIBOOTCMD='run ubi_sonic_boot_bootargs; run ubi_sonic_boot_load; bootz $kernel_addr - $fdt_addr' + +et6448m_machine_conf() { + SYSCTL_CFG=$demo_mount/usr/share/sonic/device/armhf-marvell_et6448m_52x-r0/syncd.conf + + echo "Configure platform et6448m " + rm $demo_mount/lib/udev/rules.d/73-usb-net-by-mac.rules + rm -f $demo_mount/usr/bin/reboot || true + rm -fr $demo_mount/host/machine.conf + cp /etc/machine.conf $demo_mount/host/ + + SONIC_VERSION=$(cat $demo_mount/etc/sonic/sonic_version.yml | grep build_version | cut -f2 -d"'") + FIRST_BOOT_FILE="$demo_mount/host/image-$SONIC_VERSION/platform" + mkdir -p $FIRST_BOOT_FILE + touch $FIRST_BOOT_FILE/firsttime + + MAC_ADDR=$(fw_printenv | grep ^ethaddr= | cut -f2 -d"=") + sed -i "s/switchMacAddress=.*/switchMacAddress=$MAC_ADDR/g" $demo_mount/usr/share/sonic/device/armhf-marvell_et6448m_52x-r0/et6448m/profile.ini + + # IPv4 and IPv6 arp cache limits + echo "sysctl -w net.ipv4.neigh.default.gc_thresh1=16000" >> $SYSCTL_CFG + echo "sysctl -w net.ipv4.neigh.default.gc_thresh2=32000" >> $SYSCTL_CFG + echo "sysctl -w net.ipv4.neigh.default.gc_thresh3=48000" >> $SYSCTL_CFG + echo "sysctl -w net.ipv6.neigh.default.gc_thresh1=8000 " >> $SYSCTL_CFG + echo "sysctl -w net.ipv6.neigh.default.gc_thresh2=16000" >> $SYSCTL_CFG + echo "sysctl -w net.ipv6.neigh.default.gc_thresh3=32000" >> $SYSCTL_CFG +} + +prepare_uboot() { + echo "Setting up U-Boot environment..." + + echo -e $FW_ENV > /etc/fw_env.config + + fw_setenv -f image_name $image_name > /dev/null + fw_setenv -f fdt_name $fdt_name > /dev/null + fw_setenv -f kernel_addr $kernel_addr > /dev/null + fw_setenv -f fdt_addr $fdt_addr > /dev/null + + #make sure ubi number (0) and ubi volume name (ubi0) are set correctly in bootargs_root: + #For example, the below command creates an 3000MiB volume on UBI device 0: + #setenv bootargs_root root=ubi0:ubi0 rw ubi.mtd=2 rootfstype=ubifs + + fw_setenv -f mtdids 'nand0=armada-nand' > /dev/null + fw_setenv -f mtdparts 'mtdparts=armada-nand:10m(U-Boot)ro,20m@10m(ONIE),-(SONIC)' > /dev/null + fw_setenv -f ubi_sonic_boot_mount_ubi 'ubi part SONIC; ubifsmount ubi0' > /dev/null + + fw_setenv -f ubi_sonic_boot_bootargs $BOOTARGS > /dev/null + fw_setenv -f ubi_sonic_boot_load $UBI_LOAD > /dev/null + fw_setenv -f ubi_sonic_boot $UBIBOOTCMD > /dev/null + fw_setenv -f bootcmd 'usb start; run ubi_sonic_boot' > /dev/null + +} + +install_uimage() { + + ubidetach /dev/ubi_ctrl -m $mtd_num 2>/dev/null || true + + echo -en "Format mtd partition '$mtd_dev' " + ubiformat $mtd_dev -y -q || { + echo "Failed" + } + + #attaches MTD devices (which describe raw flash) to UBI and creates corresponding UBI devices; ('-m 2' --> mtd2) + echo -en "ubiattach mtd '$mtd_num' " + ubiattach /dev/ubi_ctrl -m $mtd_num || { + echo "Failed" + } + + #creates UBI volumes on UBI devices + ubimkvol /dev/$demo_dev -N $demo_dev -s 3900MiB + + demo_mount=$(mktemp -d) || { + echo "Error: Unable to create file sstem mount point" + exit 1 + } + + echo "Mounting $demo_dev on $demo_mount " + mount -t ubifs /dev/ubi0_0 $demo_mount || { + echo "Failed" + } + + echo "Extracting NOS " + + # Decompress the file for the file system directly to the partition + unzip -o $ONIE_INSTALLER_PAYLOAD -x "$FILESYSTEM_DOCKERFS" -d $demo_mount/ + cd $demo_mount + + if [ -f fs.cpio ]; then + cpio -id < fs.cpio + if [ $? -ne 0 ]; then + echo "cpio extraction Failed" + fi + rm fs.cpio + elif [ -f fs.squashfs ]; then + unsquashfs -f -d $demo_mount $FILESYSTEM_SQUASHFS + if [ $? -ne 0 ]; then + echo "unsquashfs extraction Failed" + fi + rm -f $FILESYSTEM_SQUASHFS + fi + + cd - + TAR_EXTRA_OPTION="--numeric-owner" + mkdir -p $demo_mount/var/lib/$DOCKERFS_DIR + unzip -op $ONIE_INSTALLER_PAYLOAD "$FILESYSTEM_DOCKERFS" | tar -xpz $TAR_EXTRA_OPTION -f - -C $demo_mount/var/lib/$DOCKERFS_DIR + + # Update uboot Environment + prepare_uboot + + # Platform configuration + et6448m_machine_conf + + # Unmounting mount path + umount $demo_mount + + echo "Reboot board to boot from installed OS" +} + +hw_load() { + echo "mtdpart default && ubi part SONIC && ubifsmount 'demo_dev' && ubifsload '$kernel_addr' 'image_name'" +} diff --git a/platform/marvell-armhf/rules.mk b/platform/marvell-armhf/rules.mk new file mode 100644 index 00000000000..809e46bd173 --- /dev/null +++ b/platform/marvell-armhf/rules.mk @@ -0,0 +1,22 @@ +#include $(PLATFORM_PATH)/sdk.mk +include $(PLATFORM_PATH)/sai.mk +include $(PLATFORM_PATH)/docker-syncd-mrvl.mk +include $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.mk +include $(PLATFORM_PATH)/docker-saiserver-mrvl.mk +include $(PLATFORM_PATH)/libsaithrift-dev.mk +include $(PLATFORM_PATH)/docker-ptf-mrvl.mk +include $(PLATFORM_PATH)/one-image.mk +include $(PLATFORM_PATH)/linux-kernel-armhf.mk + +ENABLE_SYSTEM_TELEMETRY = "" +ENABLE_SYNCD_RPC = "" + +SONIC_ALL += $(SONIC_ONE_IMAGE) \ + $(DOCKER_FPM) + #$(DOCKER_SYNCD_MRVL_RPC) + +# Inject mrvl sai into sairedis +$(LIBSAIREDIS)_DEPENDS += $(MRVL_SAI) $(LIBSAITHRIFT_DEV_MRVL) + +# Runtime dependency on mrvl sai is set only for syncd +$(SYNCD)_RDEPENDS += $(MRVL_SAI) diff --git a/platform/marvell-armhf/sai.mk b/platform/marvell-armhf/sai.mk new file mode 100644 index 00000000000..ad8ff329ba6 --- /dev/null +++ b/platform/marvell-armhf/sai.mk @@ -0,0 +1,9 @@ +# Marvell SAI + +export MRVL_SAI_VERSION = 1.4.1 +export MRVL_SAI_TAG = SONiC.201904 +export MRVL_SAI = mrvllibsai_$(PLATFORM_ARCH)_$(MRVL_SAI_VERSION).deb + +$(MRVL_SAI)_SRC_PATH = $(PLATFORM_PATH)/sai +#$(MRVL_SAI)_DEPENDS += $(MRVL_FPA) +SONIC_MAKE_DEBS += $(MRVL_SAI) diff --git a/platform/marvell-armhf/sai/Makefile b/platform/marvell-armhf/sai/Makefile new file mode 100644 index 00000000000..cf78504388c --- /dev/null +++ b/platform/marvell-armhf/sai/Makefile @@ -0,0 +1,9 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MRVL_SAI_URL = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/armhf/sai-plugin/$(MRVL_SAI) + +$(addprefix $(DEST)/, $(MRVL_SAI)): $(DEST)/% : + # get deb package + wget -O $(DEST)/$(MRVL_SAI) $(MRVL_SAI_URL) diff --git a/platform/marvell/docker-syncd-mrvl-rpc.mk b/platform/marvell/docker-syncd-mrvl-rpc.mk new file mode 100644 index 00000000000..5b1968bde39 --- /dev/null +++ b/platform/marvell/docker-syncd-mrvl-rpc.mk @@ -0,0 +1,22 @@ +# docker image for mrvl syncd with rpc + +DOCKER_SYNCD_MRVL_RPC = docker-syncd-mrvl-rpc.gz +$(DOCKER_SYNCD_MRVL_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-mrvl-rpc +$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) +$(DOCKER_SYNCD_MRVL_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) +ifeq ($(INSTALL_DEBUG_TOOLS), y) +$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) +endif +$(DOCKER_SYNCD_MRVL_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_MRVL) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_RPC) +ifeq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_RPC) +endif + +$(DOCKER_SYNCD_MRVL_RPC)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro diff --git a/platform/marvell/docker-syncd-mrvl-rpc/99-syncd.conf b/platform/marvell/docker-syncd-mrvl-rpc/99-syncd.conf new file mode 100644 index 00000000000..f3b57e3b196 --- /dev/null +++ b/platform/marvell/docker-syncd-mrvl-rpc/99-syncd.conf @@ -0,0 +1,2 @@ +sysctl -w net.core.rmem_max=509430500 + diff --git a/platform/marvell/docker-syncd-mrvl-rpc/Dockerfile.j2 b/platform/marvell/docker-syncd-mrvl-rpc/Dockerfile.j2 new file mode 100644 index 00000000000..cea067d2abf --- /dev/null +++ b/platform/marvell/docker-syncd-mrvl-rpc/Dockerfile.j2 @@ -0,0 +1,51 @@ +FROM docker-syncd-mrvl + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +COPY \ +{% for deb in docker_syncd_mrvl_rpc_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get purge -y syncd + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ +{% for deb in docker_syncd_mrvl_rpc_debs.split(' ') -%} +dpkg_apt debs/{{ deb }}{{'; '}} +{%- endfor %} + +## Pre-install the fundamental packages +RUN apt-get update \ + && apt-get -y install \ + net-tools \ + python-pip \ + build-essential \ + libssl-dev \ + libffi-dev \ + python-dev \ + wget \ + cmake \ + && wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ + && tar xvfz 1.0.0.tar.gz \ + && cd nanomsg-1.0.0 \ + && mkdir -p build \ + && cmake . \ + && make install \ + && ldconfig \ + && cd .. \ + && rm -fr nanomsg-1.0.0 \ + && rm -f 1.0.0.tar.gz \ + && pip install cffi==1.7.0 \ + && pip install --upgrade cffi==1.7.0 \ + && pip install nnpy \ + && mkdir -p /opt \ + && cd /opt \ + && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ + && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \ + && rm -rf /root/deps + +COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/marvell/docker-syncd-mrvl-rpc/ptf_nn_agent.conf b/platform/marvell/docker-syncd-mrvl-rpc/ptf_nn_agent.conf new file mode 100644 index 00000000000..fa1ed0eb162 --- /dev/null +++ b/platform/marvell/docker-syncd-mrvl-rpc/ptf_nn_agent.conf @@ -0,0 +1,10 @@ +[program:ptf_nn_agent] +command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-iface-rcv-buffer=109430400 +process_name=ptf_nn_agent +stdout_logfile=/tmp/ptf_nn_agent.out.log +stderr_logfile=/tmp/ptf_nn_agent.err.log +redirect_stderr=false +autostart=true +autorestart=true +startsecs=1 +numprocs=1 diff --git a/platform/marvell/docker-syncd-mrvl.mk b/platform/marvell/docker-syncd-mrvl.mk new file mode 100644 index 00000000000..5257bf5e68e --- /dev/null +++ b/platform/marvell/docker-syncd-mrvl.mk @@ -0,0 +1,14 @@ +# docker image for mrvl syncd + +DOCKER_SYNCD_PLATFORM_CODE = mrvl +include $(PLATFORM_PATH)/../template/docker-syncd-base.mk + +$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) + +$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) + +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd diff --git a/platform/marvell/docker-syncd-mrvl/Dockerfile.j2 b/platform/marvell/docker-syncd-mrvl/Dockerfile.j2 new file mode 100755 index 00000000000..40973653e8d --- /dev/null +++ b/platform/marvell/docker-syncd-mrvl/Dockerfile.j2 @@ -0,0 +1,34 @@ +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +COPY \ +{% for deb in docker_syncd_mrvl_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get -y install libpcap-dev libxml2-dev python-dev swig libsensors4-dev libatomic1 libjemalloc1 liblua5.1-0 lua-bitop lua-cjson nfs-common + +RUN dpkg -i \ +{% for deb in docker_syncd_mrvl_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +COPY ["start.sh", "syncd.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor/"] + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +ENTRYPOINT ["/usr/bin/supervisord"] + diff --git a/platform/marvell/docker-syncd-mrvl/critical_processes b/platform/marvell/docker-syncd-mrvl/critical_processes new file mode 100644 index 00000000000..6082f242b87 --- /dev/null +++ b/platform/marvell/docker-syncd-mrvl/critical_processes @@ -0,0 +1 @@ +syncd diff --git a/platform/marvell/docker-syncd-mrvl/start.sh b/platform/marvell/docker-syncd-mrvl/start.sh new file mode 100755 index 00000000000..96e2a912808 --- /dev/null +++ b/platform/marvell/docker-syncd-mrvl/start.sh @@ -0,0 +1,8 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +supervisorctl start syncd + diff --git a/platform/marvell/docker-syncd-mrvl/supervisord.conf b/platform/marvell/docker-syncd-mrvl/supervisord.conf new file mode 100644 index 00000000000..aea4d45b9af --- /dev/null +++ b/platform/marvell/docker-syncd-mrvl/supervisord.conf @@ -0,0 +1,35 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=unexpected +stdout_logfile=syslog +stderr_logfile=syslog + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + diff --git a/platform/marvell/docker-syncd-mrvl/syncd.sh b/platform/marvell/docker-syncd-mrvl/syncd.sh new file mode 100755 index 00000000000..993cf100f2f --- /dev/null +++ b/platform/marvell/docker-syncd-mrvl/syncd.sh @@ -0,0 +1,12 @@ +#!/usr/bin/env bash + +function clean_up { + service syncd stop + exit +} + +trap clean_up SIGTERM SIGKILL + +service syncd start + +read diff --git a/platform/marvell/libsaithrift-dev.mk b/platform/marvell/libsaithrift-dev.mk new file mode 100644 index 00000000000..d1607a1ba22 --- /dev/null +++ b/platform/marvell/libsaithrift-dev.mk @@ -0,0 +1,20 @@ +# libsaithrift-dev package + +SAI_VER = 0.9.4 + +LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_amd64.deb +$(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI +$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(MRVL_FPA) $(MRVL_SAI) +$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) $(MRVL_SAI) +SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV) + +PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_amd64.deb +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT))) + +SAISERVER = saiserver_$(SAI_VER)_amd64.deb +$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(BRCM_SAI) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER))) + +SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_amd64.deb +$(SAISERVER_DBG)_RDEPENDS += $(SAISERVER) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER_DBG))) diff --git a/platform/marvell/one-image.mk b/platform/marvell/one-image.mk new file mode 100644 index 00000000000..fcac0385434 --- /dev/null +++ b/platform/marvell/one-image.mk @@ -0,0 +1,13 @@ +# sonic marvell one image installer + +SONIC_ONE_IMAGE = sonic-marvell.bin +$(SONIC_ONE_IMAGE)_MACHINE = marvell +$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie +$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +ifeq ($(INSTALL_DEBUG_TOOLS),y) +$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) +$(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) +else +$(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES) +endif +SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/marvell/platform.conf b/platform/marvell/platform.conf new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/marvell/rules.mk b/platform/marvell/rules.mk new file mode 100644 index 00000000000..d819cfb67da --- /dev/null +++ b/platform/marvell/rules.mk @@ -0,0 +1,18 @@ +include $(PLATFORM_PATH)/sai.mk +include $(PLATFORM_PATH)/docker-syncd-mrvl.mk +include $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.mk +include $(PLATFORM_PATH)/libsaithrift-dev.mk +include $(PLATFORM_PATH)/one-image.mk + +SONIC_ALL += $(SONIC_ONE_IMAGE) \ + $(DOCKER_FPM) \ + $(DOCKER_SYNCD_MRVL_RPC) + +# Inject mrvl sai into sairedis +$(LIBSAIREDIS)_DEPENDS += $(MRVL_FPA) $(MRVL_SAI) +ifeq ($(ENABLE_SYNCD_RPC),y) +$(LIBSAIREDIS)_DEPENDS += $(LIBSAITHRIFT_DEV_MRVL) +endif + +# Runtime dependency on mrvl sai is set only for syncd +$(SYNCD)_RDEPENDS += $(MRVL_SAI) diff --git a/platform/marvell/sai.mk b/platform/marvell/sai.mk new file mode 100644 index 00000000000..7953ad5dd82 --- /dev/null +++ b/platform/marvell/sai.mk @@ -0,0 +1,6 @@ +# Marvell SAI + +export MRVL_SAI = mrvllibsai_amd64_1.4.1.deb + +$(MRVL_SAI)_SRC_PATH = $(PLATFORM_PATH)/sai +SONIC_MAKE_DEBS += $(MRVL_SAI) diff --git a/platform/marvell/sai/Makefile b/platform/marvell/sai/Makefile new file mode 100644 index 00000000000..1cd6d0267fa --- /dev/null +++ b/platform/marvell/sai/Makefile @@ -0,0 +1,9 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MRVL_SAI_URL = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/amd64/sai-plugin/$(MRVL_SAI) + +$(addprefix $(DEST)/, $(MRVL_SAI)): $(DEST)/% : + # get deb package + wget -O $(DEST)/$(MRVL_SAI) $(MRVL_SAI_URL) diff --git a/platform/mellanox/.gitignore b/platform/mellanox/.gitignore new file mode 100644 index 00000000000..1f3d15d640d --- /dev/null +++ b/platform/mellanox/.gitignore @@ -0,0 +1,22 @@ +# Subdirectories +mlnx-sai/* +!mlnx-sai/Makefile +hw-management/* +!hw-management/Makefile +!hw-management/*.patch +mft/* +!mft/Makefile +sdk-src/*/* +!sdk-src/*/Makefile +!sdk-src/sx-kernel/Switch-SDK-drivers/ +!sdk-src/*/*.patch +*/build +*/deb_dist +*/dist +*/*.gz +*/*.egg-info + +# Autogenerated Dockerfiles +docker-syncd-mlnx/Dockerfile +docker-syncd-mlnx-rpc/Dockerfile +docker-saiserver-mlnx/Dockerfile diff --git a/platform/mellanox/docker-ptf-mlnx.mk b/platform/mellanox/docker-ptf-mlnx.mk new file mode 100644 index 00000000000..f6d17e72fcf --- /dev/null +++ b/platform/mellanox/docker-ptf-mlnx.mk @@ -0,0 +1,7 @@ +# docker image for docker-ptf-mlnx + +DOCKER_PTF_MLNX = docker-ptf-mlnx.gz +$(DOCKER_PTF_MLNX)_PATH = $(DOCKERS_PATH)/docker-ptf-saithrift +$(DOCKER_PTF_MLNX)_DEPENDS += $(PYTHON_SAITHRIFT) +$(DOCKER_PTF_MLNX)_LOAD_DOCKERS += $(DOCKER_PTF) +SONIC_DOCKER_IMAGES += $(DOCKER_PTF_MLNX) diff --git a/platform/mellanox/docker-saiserver-mlnx.mk b/platform/mellanox/docker-saiserver-mlnx.mk new file mode 100644 index 00000000000..d91756a1f23 --- /dev/null +++ b/platform/mellanox/docker-saiserver-mlnx.mk @@ -0,0 +1,14 @@ +# docker image for mlnx saiserver + +DOCKER_SAISERVER_MLNX = docker-saiserver-mlnx.gz +$(DOCKER_SAISERVER_MLNX)_PATH = $(PLATFORM_PATH)/docker-saiserver-mlnx +$(DOCKER_SAISERVER_MLNX)_DEPENDS += $(SAISERVER) $(PYTHON_SDK_API) +$(DOCKER_SAISERVER_MLNX)_PYTHON_DEBS += $(MLNX_SFPD) +$(DOCKER_SAISERVER_MLNX)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) +SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_MLNX) + +$(DOCKER_SAISERVER_MLNX)_CONTAINER_NAME = saiserver +$(DOCKER_SAISERVER_MLNX)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SAISERVER_MLNX)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SAISERVER_MLNX)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SYNCD_BASE)_RUN_OPT += --tmpfs /run/criu diff --git a/platform/mellanox/docker-saiserver-mlnx/Dockerfile.j2 b/platform/mellanox/docker-saiserver-mlnx/Dockerfile.j2 new file mode 100644 index 00000000000..b202be5b340 --- /dev/null +++ b/platform/mellanox/docker-saiserver-mlnx/Dockerfile.j2 @@ -0,0 +1,47 @@ +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +COPY \ +{% for deb in docker_saiserver_mlnx_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +COPY \ +{% for deb in docker_saiserver_mlnx_pydebs.split(' ') -%} +python-debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get install -y --no-install-recommends libxml2 iptables libbsd0 protobuf-c-compiler protobuf-compiler python-protobuf libprotobuf-c1 python-future python-ipaddr libnet1 pkg-config asciidoc xmlto + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ +{% for deb in docker_saiserver_mlnx_debs.split(' ') -%} +dpkg_apt debs/{{ deb }}{{'; '}} +{%- endfor %} + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ +{% for deb in docker_saiserver_mlnx_pydebs.split(' ') -%} +dpkg_apt debs/{{ deb }}{{'; '}} +{%- endfor %} + +COPY ["start.sh", "/usr/bin/"] + +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] + +COPY ["profile.ini", "portmap.ini", "/etc/sai/"] + +COPY ["sai_2700.xml", "/usr/share/"] + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/mellanox/docker-saiserver-mlnx/portmap.ini b/platform/mellanox/docker-saiserver-mlnx/portmap.ini new file mode 100644 index 00000000000..4d3be08ce5f --- /dev/null +++ b/platform/mellanox/docker-saiserver-mlnx/portmap.ini @@ -0,0 +1,33 @@ +# alias lanes +Ethernet1 0,1,2,3 +Ethernet2 4,5,6,7 +Ethernet3 8,9,10,11 +Ethernet4 12,13,14,15 +Ethernet5 16,17,18,19 +Ethernet6 20,21,22,23 +Ethernet7 24,25,26,27 +Ethernet8 28,29,30,31 +Ethernet9 32,33,34,35 +Ethernet10 36,37,38,39 +Ethernet11 40,41,42,43 +Ethernet12 44,45,46,47 +Ethernet13 48,49,50,51 +Ethernet14 52,53,54,55 +Ethernet15 56,57,58,59 +Ethernet16 60,61,62,63 +Ethernet17 64,65,66,67 +Ethernet18 68,69,70,71 +Ethernet19 72,73,74,75 +Ethernet20 76,77,78,79 +Ethernet21 80,81,82,83 +Ethernet22 84,85,86,87 +Ethernet23 88,89,90,91 +Ethernet24 92,93,94,95 +Ethernet25 96,97,98,99 +Ethernet26 100,101,102,103 +Ethernet27 104,105,106,107 +Ethernet28 108,109,110,111 +Ethernet29 112,113,114,115 +Ethernet30 116,117,118,119 +Ethernet31 120,121,122,123 +Ethernet32 124,125,126,127 \ No newline at end of file diff --git a/platform/mellanox/docker-saiserver-mlnx/profile.ini b/platform/mellanox/docker-saiserver-mlnx/profile.ini new file mode 100644 index 00000000000..c67be49f3c4 --- /dev/null +++ b/platform/mellanox/docker-saiserver-mlnx/profile.ini @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sai_2700.xml \ No newline at end of file diff --git a/platform/mellanox/docker-saiserver-mlnx/sai_2700.xml b/platform/mellanox/docker-saiserver-mlnx/sai_2700.xml new file mode 100644 index 00000000000..42b57631145 --- /dev/null +++ b/platform/mellanox/docker-saiserver-mlnx/sai_2700.xml @@ -0,0 +1,243 @@ + + + + + + 00:77:66:55:44:00 + + + 32 + + + + + 1 + 4 + 16 + + + 3 + + + 98368 + + + 3 + 4 + 17 + 1 + 98368 + + + 5 + 4 + 18 + 3 + 98368 + + + 7 + 4 + 19 + 1 + 98368 + + + 9 + 4 + 20 + 3 + 98368 + + + 11 + 4 + 21 + 1 + 98368 + + + 13 + 4 + 22 + 3 + 98368 + + + 15 + 4 + 23 + 1 + 98368 + + + 17 + 4 + 24 + 3 + 98368 + + + 19 + 4 + 25 + 1 + 98368 + + + 21 + 4 + 26 + 3 + 98368 + + + 23 + 4 + 27 + 1 + 98368 + + + 25 + 4 + 28 + 3 + 98368 + + + 27 + 4 + 29 + 1 + 98368 + + + 29 + 4 + 30 + 3 + 98368 + + + 31 + 4 + 31 + 1 + 98368 + + + 33 + 4 + 14 + 3 + 98368 + + + 35 + 4 + 15 + 1 + 98368 + + + 37 + 4 + 12 + 3 + 98368 + + + 39 + 4 + 13 + 1 + 98368 + + + 41 + 4 + 10 + 3 + 98368 + + + 43 + 4 + 11 + 1 + 98368 + + + 45 + 4 + 8 + 3 + 98368 + + + 47 + 4 + 9 + 1 + 98368 + + + 49 + 4 + 6 + 3 + 98368 + + + 51 + 4 + 7 + 1 + 98368 + + + 53 + 4 + 4 + 3 + 98368 + + + 55 + 4 + 5 + 1 + 98368 + + + 57 + 4 + 2 + 3 + 98368 + + + 59 + 4 + 3 + 1 + 98368 + + + 61 + 4 + 0 + 3 + 98368 + + + 63 + 4 + 1 + 1 + 98368 + + + + diff --git a/platform/mellanox/docker-saiserver-mlnx/start.sh b/platform/mellanox/docker-saiserver-mlnx/start.sh new file mode 100755 index 00000000000..58a0c316add --- /dev/null +++ b/platform/mellanox/docker-saiserver-mlnx/start.sh @@ -0,0 +1,15 @@ +#!/usr/bin/env bash + +start_mlnx() +{ + [ -e /dev/sxdevs/sxcdev ] || ( mkdir -p /dev/sxdevs && mknod /dev/sxdevs/sxcdev c 231 193 ) +} + + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +start_mlnx + +supervisorctl start saiserver diff --git a/platform/mellanox/docker-saiserver-mlnx/supervisord.conf b/platform/mellanox/docker-saiserver-mlnx/supervisord.conf new file mode 100644 index 00000000000..cb67a0fc9a4 --- /dev/null +++ b/platform/mellanox/docker-saiserver-mlnx/supervisord.conf @@ -0,0 +1,28 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:saiserver] +command=/usr/bin/saiserver -p /etc/sai/profile.ini -f /etc/sai/portmap.ini +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/mellanox/docker-syncd-mlnx-rpc.mk b/platform/mellanox/docker-syncd-mlnx-rpc.mk new file mode 100644 index 00000000000..608c1bb3ad2 --- /dev/null +++ b/platform/mellanox/docker-syncd-mlnx-rpc.mk @@ -0,0 +1,26 @@ +# docker image for mlnx syncd with rpc + +DOCKER_SYNCD_MLNX_RPC = docker-syncd-mlnx-rpc.gz +$(DOCKER_SYNCD_MLNX_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-mlnx-rpc +$(DOCKER_SYNCD_MLNX_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) +$(DOCKER_SYNCD_MLNX_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) +ifeq ($(INSTALL_DEBUG_TOOLS), y) +$(DOCKER_SYNCD_MLNX_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) +endif + +$(DOCKER_SYNCD_MLNX_RPC)_PYTHON_DEBS += $(MLNX_SFPD) +$(DOCKER_SYNCD_MLNX_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_MLNX_RPC) +SONIC_STRETCH_DOCKERS += $(DOCKER_SYNCD_MLNX_RPC) +ifeq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_MLNX_RPC) +endif + +$(DOCKER_SYNCD_MLNX_RPC)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_MLNX_RPC)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SYNCD_MLNX_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_MLNX_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SYNCD_MLNX_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2 new file mode 100644 index 00000000000..d9b86e78253 --- /dev/null +++ b/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2 @@ -0,0 +1,63 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-syncd-mlnx + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get purge -y syncd + +{% if docker_syncd_mlnx_rpc_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_syncd_mlnx_rpc_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_syncd_mlnx_rpc_debs.split(' ')) }} +{% endif %} + +{% if docker_syncd_mlnx_rpc_pydebs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("python-debs/", docker_syncd_mlnx_rpc_pydebs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_syncd_mlnx_rpc_pydebs.split(' ')) }} +{% endif %} + +## Pre-install the fundamental packages +RUN apt-get update \ + && apt-get -y install \ + net-tools \ + python-pip \ + build-essential \ + libssl-dev \ + libffi-dev \ + python-dev \ + wget \ + cmake \ + && wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ + && tar xvfz 1.0.0.tar.gz \ + && cd nanomsg-1.0.0 \ + && mkdir -p build \ + && cmake . \ + && make install \ + && ldconfig \ + && cd .. \ + && rm -fr nanomsg-1.0.0 \ + && rm -f 1.0.0.tar.gz \ + && pip install cffi==1.7.0 \ + && pip install --upgrade cffi==1.7.0 \ + && pip install nnpy \ + && mkdir -p /opt \ + && cd /opt \ + && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ + && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \ + && rm -rf /root/deps + +COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] + +## Clean up +RUN apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/mellanox/docker-syncd-mlnx-rpc/ptf_nn_agent.conf b/platform/mellanox/docker-syncd-mlnx-rpc/ptf_nn_agent.conf new file mode 100644 index 00000000000..cd6a7d4db75 --- /dev/null +++ b/platform/mellanox/docker-syncd-mlnx-rpc/ptf_nn_agent.conf @@ -0,0 +1,10 @@ +[program:ptf_nn_agent] +command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-nn-rcv-buffer=109430400 --set-iface-rcv-buffer=109430400 --set-nn-snd-buffer=109430400 --set-iface-snd-buffer=109430400 +process_name=ptf_nn_agent +stdout_logfile=/tmp/ptf_nn_agent.out.log +stderr_logfile=/tmp/ptf_nn_agent.err.log +redirect_stderr=false +autostart=true +autorestart=true +startsecs=1 +numprocs=1 diff --git a/platform/mellanox/docker-syncd-mlnx.mk b/platform/mellanox/docker-syncd-mlnx.mk new file mode 100644 index 00000000000..db582e517bf --- /dev/null +++ b/platform/mellanox/docker-syncd-mlnx.mk @@ -0,0 +1,18 @@ +# docker image for mlnx syncd + +DOCKER_SYNCD_PLATFORM_CODE = mlnx +include $(PLATFORM_PATH)/../template/docker-syncd-base.mk + +$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) + +$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) + +ifeq ($(SDK_FROM_SRC), y) +$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(MLNX_SDK_DBG_DEBS) $(MLNX_SAI_DBGSYM) +endif + +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot + diff --git a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 new file mode 100755 index 00000000000..4d22335ec78 --- /dev/null +++ b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 @@ -0,0 +1,41 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update && \ + apt-get install -y \ + libxml2 + +{% if docker_syncd_mlnx_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_syncd_mlnx_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_syncd_mlnx_debs.split(' ')) }} +{% endif %} + +{% if docker_syncd_mlnx_pydebs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("python-debs/", docker_syncd_mlnx_pydebs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_syncd_mlnx_pydebs.split(' ')) }} +{% endif %} + +## Clean up +RUN apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs + +COPY ["start.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor/"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/mellanox/docker-syncd-mlnx/critical_processes b/platform/mellanox/docker-syncd-mlnx/critical_processes new file mode 100644 index 00000000000..6082f242b87 --- /dev/null +++ b/platform/mellanox/docker-syncd-mlnx/critical_processes @@ -0,0 +1 @@ +syncd diff --git a/platform/mellanox/docker-syncd-mlnx/start.sh b/platform/mellanox/docker-syncd-mlnx/start.sh new file mode 100755 index 00000000000..96e2a912808 --- /dev/null +++ b/platform/mellanox/docker-syncd-mlnx/start.sh @@ -0,0 +1,8 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +supervisorctl start syncd + diff --git a/platform/mellanox/docker-syncd-mlnx/supervisord.conf b/platform/mellanox/docker-syncd-mlnx/supervisord.conf new file mode 100644 index 00000000000..c823ab5680e --- /dev/null +++ b/platform/mellanox/docker-syncd-mlnx/supervisord.conf @@ -0,0 +1,34 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=unexpected +stdout_logfile=syslog +stderr_logfile=syslog + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk new file mode 100644 index 00000000000..9d506c1f5bd --- /dev/null +++ b/platform/mellanox/fw.mk @@ -0,0 +1,34 @@ +# mellanox firmware + +MLNX_FW_BASE_PATH = $(MLNX_SDK_BASE_PATH) + +# Place an URL here to FW if you want to download FW instead +MLNX_FW_BASE_URL = + +ifneq ($(MLNX_FW_BASE_URL), ) +FW_FROM_URL = y +else +FW_FROM_URL = n +endif + +MLNX_SPC_FW_VERSION = 13.2000.2602 +MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa +$(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) +$(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE) + +MLNX_SPC2_FW_VERSION = 29.2000.2602 +MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa +$(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) +$(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE) + +ifeq ($(FW_FROM_URL),n) +SONIC_COPY_FILES += $(MLNX_SPC_FW_FILE) $(MLNX_SPC2_FW_FILE) +else +SONIC_ONLINE_FILES += $(MLNX_SPC_FW_FILE) $(MLNX_SPC2_FW_FILE) +endif + +export MLNX_SPC_FW_VERSION +export MLNX_SPC_FW_FILE + +export MLNX_SPC2_FW_VERSION +export MLNX_SPC2_FW_FILE diff --git a/platform/mellanox/hw-management.mk b/platform/mellanox/hw-management.mk new file mode 100644 index 00000000000..f41c2b9a25c --- /dev/null +++ b/platform/mellanox/hw-management.mk @@ -0,0 +1,12 @@ +# Mellanox HW Management + +MLNX_HW_MANAGEMENT_VERSION = 7.0000.2303 + +export MLNX_HW_MANAGEMENT_VERSION + +MLNX_HW_MANAGEMENT = hw-management_1.mlnx.$(MLNX_HW_MANAGEMENT_VERSION)_amd64.deb +$(MLNX_HW_MANAGEMENT)_SRC_PATH = $(PLATFORM_PATH)/hw-management +$(MLNX_HW_MANAGEMENT)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +SONIC_MAKE_DEBS += $(MLNX_HW_MANAGEMENT) + +SONIC_STRETCH_DEBS += $(MLNX_HW_MANAGEMENT) diff --git a/platform/mellanox/hw-management/0001-Make-hw-mgmt-SimX-compatiable.patch b/platform/mellanox/hw-management/0001-Make-hw-mgmt-SimX-compatiable.patch new file mode 100644 index 00000000000..31a85434fb4 --- /dev/null +++ b/platform/mellanox/hw-management/0001-Make-hw-mgmt-SimX-compatiable.patch @@ -0,0 +1,53 @@ +From 051938b7c49cc18aaddd699939353f591554d635 Mon Sep 17 00:00:00 2001 +From: Mykola Faryma +Date: Wed, 3 Apr 2019 14:09:26 +0000 +Subject: [PATCH] Make hw-mgmt SimX compatiable. + +Signed-off-by: Mykola Faryma +--- + usr/usr/bin/hw-management.sh | 29 +++++++++++++++++++++++++++++ + 1 file changed, 29 insertions(+) + +diff --git a/usr/usr/bin/hw-management.sh b/usr/usr/bin/hw-management.sh +index fdb3013..68da9bc 100755 +--- a/usr/usr/bin/hw-management.sh ++++ b/usr/usr/bin/hw-management.sh +@@ -646,6 +646,35 @@ do_chip_down() + /usr/bin/hw-management-thermal-events.sh change hotplug_asic down %S %p + } + ++handle_simx() ++{ ++ local -r onie_platform="$(cat /host/machine.conf | grep onie_platform | cut -d= -f2)" ++ ++ local -r syseeprom_cache_path="/var/cache/sonic/decode-syseeprom/syseeprom_cache" ++ local -r syseeprom_hex_path="/usr/share/sonic/device/${onie_platform}/syseeprom.hex" ++ local -r syseeprom_vpd_path="/var/run/hw-management/eeprom/vpd_info" ++ ++ case $ACTION in ++ start) ++ /bin/bash -c "/bin/rm -f ${syseeprom_cache_path}" ++ /bin/bash -c "/bin/mkdir -p ${eeprom_path}" ++ /bin/bash -c "/usr/bin/xxd -r -p ${syseeprom_hex_path} ${syseeprom_vpd_path}" ++ ;; ++ stop) ++ /bin/bash -c "/bin/rm -fr ${hw_management_path}" ++ ;; ++ *) ++ echo "Usage: `basename $0` {start|stop}" ++ exit 1 ++ ;; ++ esac ++} ++ ++if [[ "$(cat /sys/devices/virtual/dmi/id/chassis_vendor)" = "QEMU" ]]; then ++ handle_simx ++ exit 0 ++fi ++ + case $ACTION in + start) + do_start +-- +1.9.1 + diff --git a/platform/mellanox/hw-management/Makefile b/platform/mellanox/hw-management/Makefile new file mode 100644 index 00000000000..608c94e6b02 --- /dev/null +++ b/platform/mellanox/hw-management/Makefile @@ -0,0 +1,14 @@ +.ONESHELL: +SHELL = /bin/bash + +MAIN_TARGET = hw-management_1.mlnx.$(MLNX_HW_MANAGEMENT_VERSION)_amd64.deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + + pushd hw-mgmt + git am ../*.patch + chmod +x ./debian/rules + sudo ./debian/rules binary KVERSION=$(KVERSION) + popd + + mv $* $(DEST)/ diff --git a/platform/mellanox/hw-management/hw-mgmt b/platform/mellanox/hw-management/hw-mgmt new file mode 160000 index 00000000000..7c26a8f6a52 --- /dev/null +++ b/platform/mellanox/hw-management/hw-mgmt @@ -0,0 +1 @@ +Subproject commit 7c26a8f6a520b06663992afe874bc56b1fcd9311 diff --git a/platform/mellanox/issu-version.mk b/platform/mellanox/issu-version.mk new file mode 100644 index 00000000000..c7ae4296ab7 --- /dev/null +++ b/platform/mellanox/issu-version.mk @@ -0,0 +1,9 @@ +# ISSU version + +ISSU_VERSION_FILE = issu-version +$(ISSU_VERSION_FILE)_SRC_PATH = $(PLATFORM_PATH)/issu-version +$(ISSU_VERSION_FILE)_DEPENDS += $(APPLIBS) +SONIC_MAKE_FILES += $(ISSU_VERSION_FILE) + +export ISSU_VERSION_FILE + diff --git a/platform/mellanox/issu-version/Makefile b/platform/mellanox/issu-version/Makefile new file mode 100644 index 00000000000..1f7d7fba3a3 --- /dev/null +++ b/platform/mellanox/issu-version/Makefile @@ -0,0 +1,12 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = issu-version + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + sx_sdk --version | egrep -o 'ISSU [0-9]+' > $(DEST)/$(MAIN_TARGET) || { + echo "ISSU version is undefined: $(sx_sdk --version)" + rm $(DEST)/$(MAIN_TARGET) + exit 1 + } diff --git a/platform/mellanox/libsaithrift-dev.mk b/platform/mellanox/libsaithrift-dev.mk new file mode 100644 index 00000000000..b0ef5746db7 --- /dev/null +++ b/platform/mellanox/libsaithrift-dev.mk @@ -0,0 +1,20 @@ +# libsaithrift-dev package + +SAI_VER = 0.9.4 + +LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_amd64.deb +$(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI +$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(MLNX_SAI) $(MLNX_SAI_DEV) +$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) $(MLNX_SAI) +SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV) + +PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_amd64.deb +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT))) + +SAISERVER = saiserver_$(SAI_VER)_amd64.deb +$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(MLNX_SAI) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER))) + +SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_amd64.deb +$(SAISERVER_DBG)_RDEPENDS += $(SAISERVER) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER_DBG))) diff --git a/platform/mellanox/mft.mk b/platform/mellanox/mft.mk new file mode 100644 index 00000000000..ae2c92e0ac1 --- /dev/null +++ b/platform/mellanox/mft.mk @@ -0,0 +1,19 @@ +# Mellanox SAI + +MFT_VERSION = 4.12.0 +MFT_REVISION = 104 + +export MFT_VERSION MFT_REVISION + +MFT = mft_$(MFT_VERSION)-$(MFT_REVISION)_amd64.deb +$(MFT)_SRC_PATH = $(PLATFORM_PATH)/mft +$(MFT)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +SONIC_MAKE_DEBS += $(MFT) + +KERNEL_MFT = kernel-mft-dkms_$(MFT_VERSION)-$(KVERSION)_all.deb +$(eval $(call add_derived_package,$(MFT),$(KERNEL_MFT))) + +MFT_OEM = mft-oem_$(MFT_VERSION)-$(MFT_REVISION)_amd64.deb +$(eval $(call add_derived_package,$(MFT),$(MFT_OEM))) + +SONIC_STRETCH_DEBS += $(KERNEL_MFT) diff --git a/platform/mellanox/mft/Makefile b/platform/mellanox/mft/Makefile new file mode 100644 index 00000000000..e18964dd4b9 --- /dev/null +++ b/platform/mellanox/mft/Makefile @@ -0,0 +1,32 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MFT_NAME = mft-$(MFT_VERSION)-$(MFT_REVISION)-x86_64-deb +MFT_TGZ = $(MFT_NAME).tgz +SRC_DEB = kernel-mft-dkms_$(MFT_VERSION)-$(MFT_REVISION)_all.deb + +MAIN_TARGET = mft_$(MFT_VERSION)-$(MFT_REVISION)_amd64.deb +DERIVED_TARGETS = kernel-mft-dkms_$(MFT_VERSION)-$(KVERSION)_all.deb mft-oem_$(MFT_VERSION)-$(MFT_REVISION)_amd64.deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + rm -rf $(MFT_NAME) + wget -O $(MFT_TGZ) http://www.mellanox.com/downloads/MFT/$(MFT_TGZ) + tar xzf $(MFT_TGZ) + pushd $(MFT_NAME)/SDEBS + + # put a lock here because dpkg does not allow installing packages in parallel + while true; do + if mkdir $(DEST)/dpkg_lock &> /dev/null; then + { sudo dpkg -i $(SRC_DEB) && rm -d $(DEST)/dpkg_lock && break; } || { rm -d $(DEST)/dpkg_lock && exit 1 ; } + fi + done + + tar xvf `sudo dkms mkdriverdisk kernel-mft-dkms/$(MFT_VERSION) -a all -d ubuntu -k $(KVERSION) --media tar | grep "Disk image location" | cut -d':' -f2` + popd + + # fix timestamp because we do not actually build tools, only kernel + touch $(MFT_NAME)/DEBS/* + mv $(MFT_NAME)/SDEBS/ubuntu-drivers/4.9.0/kernel-mft-dkms_$(MFT_VERSION)-$(KVERSION)_all.deb $(MFT_NAME)/DEBS/* $(DEST) + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/mlnx-ffb.mk b/platform/mellanox/mlnx-ffb.mk new file mode 100755 index 00000000000..dabb995a365 --- /dev/null +++ b/platform/mellanox/mlnx-ffb.mk @@ -0,0 +1,7 @@ +# mellanox fast fast boot script + +MLNX_FFB_SCRIPT = mlnx-ffb.sh +$(MLNX_FFB_SCRIPT)_PATH = platform/mellanox/ +SONIC_COPY_FILES += $(MLNX_FFB_SCRIPT) + +export MLNX_FFB_SCRIPT diff --git a/platform/mellanox/mlnx-ffb.sh b/platform/mellanox/mlnx-ffb.sh new file mode 100755 index 00000000000..1488bb2c6b9 --- /dev/null +++ b/platform/mellanox/mlnx-ffb.sh @@ -0,0 +1,89 @@ +#!/bin/bash + +FFB_SUCCESS=0 +FFB_FAILURE=1 + +# Check if ISSU is enabled on this device +check_issu_enabled() +{ + CHECK_RESULT="${FFB_FAILURE}" + ISSU_CHECK_CMD="show platform mlnx issu" + + # Check whether show ISSU status outputs ENABLED + if [[ `$ISSU_CHECK_CMD` =~ "enabled" ]]; then + # ISSU enabled, return success + CHECK_RESULT="${FFB_SUCCESS}" + fi + + return "${CHECK_RESULT}" +} + +# Check if ISSU upgrade from current SDK to next image SDK is supported +check_sdk_upgrade() +{ + CHECK_RESULT="${FFB_FAILURE}" + + NEXT_SONIC_IMAGE="$(sonic_installer list | grep "Next: " | cut -f2 -d' ')" + CURRENT_SONIC_IMAGE="$(sonic_installer list | grep "Current: " | cut -f2 -d' ')" + + FS_PATH="/host/image-${NEXT_SONIC_IMAGE#SONiC-OS-}/fs.squashfs" + FS_MOUNTPOINT="/tmp/image-${NEXT_SONIC_IMAGE#SONiC-OS-}-fs" + + if [[ "${CURRENT_SONIC_IMAGE}" == "${NEXT_SONIC_IMAGE}" ]]; then + return "${FFB_SUCCESS}" + fi + + while :; do + mkdir -p "${FS_MOUNTPOINT}" + mount -t squashfs "${FS_PATH}" "${FS_MOUNTPOINT}" || { + >&2 echo "Failed to mount next SONiC image" + break + } + + ISSU_VERSION_FILE_PATH="/etc/mlnx/issu-version" + + [ -f "${ISSU_VERSION_FILE_PATH}" ] || { + >&2 echo "No ISSU version file found ${ISSU_VERSION_FILE_PATH}" + break + } + + [ -f "${FS_MOUNTPOINT}/${ISSU_VERSION_FILE_PATH}" ] || { + >&2 echo "No ISSU version file found ${ISSU_VERSION_FILE_PATH} in ${NEXT_SONIC_IMAGE}" + break + } + + CURRENT_ISSU_VERSION="$(cat ${ISSU_VERSION_FILE_PATH})" + NEXT_ISSU_VERSION="$(cat ${FS_MOUNTPOINT}/${ISSU_VERSION_FILE_PATH})" + + if [[ "${CURRENT_ISSU_VERSION}" == "${NEXT_ISSU_VERSION}" ]]; then + CHECK_RESULT="${FFB_SUCCESS}" + else + >&2 echo "Current and next ISSU version do not match:" + >&2 echo "Current ISSU version: ${CURRENT_ISSU_VERSION}" + >&2 echo "Next ISSU version: ${NEXT_ISSU_VERSION}" + fi + + break + done + + umount -rf "${FS_MOUNTPOINT}" 2> /dev/null || true + rm -rf "${FS_MOUNTPOINT}" 2> /dev/null || true + + return "${CHECK_RESULT}" +} + +check_ffb() +{ + check_issu_enabled || { + >&2 echo "ISSU is not enabled on this HWSKU" + return "${FFB_FAILURE}" + } + + check_sdk_upgrade || { + >&2 echo "SDK upgrade check failued" + return "${FFB_FAILURE}" + } + + return "${FFB_SUCCESS}" +} + diff --git a/platform/mellanox/mlnx-fw-upgrade.j2 b/platform/mellanox/mlnx-fw-upgrade.j2 new file mode 100755 index 00000000000..3857244a150 --- /dev/null +++ b/platform/mellanox/mlnx-fw-upgrade.j2 @@ -0,0 +1,250 @@ +#!/bin/bash + +declare -r SCRIPT_NAME="$(basename "$0")" +declare -r SCRIPT_PATH="$(readlink -f "$0")" +declare -r SCRIPT_DIR="$(dirname "$SCRIPT_PATH")" + +declare -r YES_PARAM="yes" +declare -r NO_PARAM="no" + +declare -r VERBOSE_ERROR="1" +declare -r VERBOSE_WARNING="2" +declare -r VERBOSE_NOTICE="3" +declare -r VERBOSE_INFO="4" + +declare -r VERBOSE_MAX="${VERBOSE_INFO}" +declare -r VERBOSE_MIN="${VERBOSE_ERROR}" + +declare -r EXIT_SUCCESS="0" +declare -r EXIT_FAILURE="1" + +declare -r QUERY_CMD="mlxfwmanager --query" +declare -r BURN_CMD="mlxfwmanager -u -f -y" + +declare -r QUERY_FILE="/tmp/mlxfwmanager-query.log" + +declare -r SPC1_ASIC="spc1" +declare -r SPC2_ASIC="spc2" +declare -r UNKN_ASIC="unknown" + +declare -rA FW_FILE_MAP=( \ + [$SPC1_ASIC]="/etc/mlnx/fw-SPC.mfa" \ + [$SPC2_ASIC]="/etc/mlnx/fw-SPC2.mfa" \ +) +declare -rA FW_REQUIRED_MAP=( \ + [$SPC1_ASIC]="{{ MLNX_SPC_FW_VERSION }}" \ + [$SPC2_ASIC]="{{ MLNX_SPC2_FW_VERSION }}" \ +) + +IMAGE_UPGRADE="${NO_PARAM}" +VERBOSE_LEVEL="${VERBOSE_MIN}" + +function PrintHelp() { + echo + echo "Usage: ./${SCRIPT_NAME} [OPTIONS]" + echo + echo "OPTIONS:" + echo " -u, --upgrade Upgrade ASIC firmware using next boot image (useful after SONiC-To-SONiC update)" + echo " -v, --verbose Verbose mode" + echo " -h, --help Print help" + echo + echo "Examples:" + echo " ./${SCRIPT_NAME} --verbose" + echo " ./${SCRIPT_NAME} --upgrade" + echo " ./${SCRIPT_NAME} --help" + echo +} + +function ParseArguments() { + while [ "$#" -ge "1" ]; do + case "$1" in + -u|--upgrade) + IMAGE_UPGRADE="${YES_PARAM}" + ;; + -v|--verbose) + VERBOSE_LEVEL="${VERBOSE_MAX}" + ;; + -h|--help) + PrintHelp + exit "${EXIT_SUCCESS}" + ;; + esac + shift + done +} + +function LogError() { + if [[ "${VERBOSE_LEVEL}" -ge "${VERBOSE_ERROR}" ]]; then + echo "ERROR: $*" + fi +} + +function LogWarning() { + if [[ "${VERBOSE_LEVEL}" -ge "${VERBOSE_WARNING}" ]]; then + echo "WARNING: $*" + fi +} + +function LogNotice() { + if [[ "${VERBOSE_LEVEL}" -ge "${VERBOSE_NOTICE}" ]]; then + echo "NOTICE: $*" + fi +} + +function LogInfo() { + if [[ "${VERBOSE_LEVEL}" -ge "${VERBOSE_INFO}" ]]; then + echo "INFO: $*" + fi +} + +function ExitFailure() { + if [[ "${VERBOSE_LEVEL}" -ge "${VERBOSE_ERROR}" ]]; then + echo + LogError "$@" + echo + fi + + exit "${EXIT_FAILURE}" +} + +function ExitSuccess() { + if [[ "${VERBOSE_LEVEL}" -ge "${VERBOSE_INFO}" ]]; then + echo + LogInfo "$@" + echo + fi + + exit "${EXIT_SUCCESS}" +} + +function WaitForDevice() { + local -i QUERY_RETRY_COUNT_MAX="10" + local -i QUERY_RETRY_COUNT="0" + + ${QUERY_CMD} > /dev/null + + while [[ ("${QUERY_RETRY_COUNT}" -lt "${QUERY_RETRY_COUNT_MAX}") && ("$?" -ne "${EXIT_SUCCESS}") ]]; do + sleep 1s + ((QUERY_RETRY_COUNT++)) + ${QUERY_CMD} > /dev/null + done +} + +function GetAsicType() { + local -r VENDOR_ID="15b3" + + local -r SPC1_PRODUCT_ID="cb84" + local -r SPC2_PRODUCT_ID="cf6c" + + if lspci -n | grep "${VENDOR_ID}:${SPC1_PRODUCT_ID}" &>/dev/null; then + echo "${SPC1_ASIC}" + exit "${EXIT_SUCCESS}" + elif lspci -n | grep "${VENDOR_ID}:${SPC2_PRODUCT_ID}" &>/dev/null; then + echo "${SPC2_ASIC}" + exit "${EXIT_SUCCESS}" + fi + + echo "${UNKN_ASIC}" + exit "${EXIT_FAILURE}" +} + +function RunCmd() { + local ERROR_CODE="${EXIT_SUCCESS}" + + if [[ "${VERBOSE_LEVEL}" -eq "${VERBOSE_MAX}" ]]; then + eval "$@" + else + eval "$@" &>/dev/null + fi + + ERROR_CODE="$?" + if [[ "${ERROR_CODE}" != "${EXIT_SUCCESS}" ]]; then + ExitFailure "command failed: $@" + fi +} + +function UpgradeFW() { + local -r _FS_MOUNTPOINT="$1" + + local -r _ASIC_TYPE="$(GetAsicType)" + if [[ "${_ASIC_TYPE}" = "${UNKN_ASIC}" ]]; then + ExitFailure "failed to detect ASIC type" + fi + + if [ ! -z "${_FS_MOUNTPOINT}" ]; then + local -r _FW_FILE="${_FS_MOUNTPOINT}/${FW_FILE_MAP[$_ASIC_TYPE]}" + + if [ ! -f "${_FW_FILE}" ]; then + ExitFailure "no such file: ${_FW_FILE}" + fi + + RunCmd "${QUERY_CMD} -i ${_FW_FILE} -L ${QUERY_FILE}" &>/dev/null + + local -r _FW_INFO="$(grep FW ${QUERY_FILE})" + local -r _FW_CURRENT="$(echo ${_FW_INFO} | cut -f2 -d' ')" + local -r _FW_AVAILABLE="$(echo ${_FW_INFO} | cut -f3 -d' ')" + else + local -r _FW_FILE="${FW_FILE_MAP[$_ASIC_TYPE]}" + + RunCmd "${QUERY_CMD} -L ${QUERY_FILE}" &>/dev/null + + local -r _FW_INFO="$(grep FW ${QUERY_FILE})" + local -r _FW_CURRENT="$(echo ${_FW_INFO} | cut -f2 -d' ')" + local -r _FW_AVAILABLE="${FW_REQUIRED_MAP[$_ASIC_TYPE]}" + fi + + if [[ -z "${_FW_CURRENT}" ]]; then + ExitFailure "could not retreive current FW version" + fi + + if [[ -z "${_FW_AVAILABLE}" ]]; then + ExitFailure "could not retreive available FW version" + fi + + if [[ "${_FW_CURRENT}" == "${_FW_AVAILABLE}" ]]; then + ExitSuccess "firmware is up to date" + else + LogNotice "firmware upgrade is required. Installing compatible version..." + RunCmd "${BURN_CMD} -i ${_FW_FILE}" + fi +} + +function UpgradeFWFromImage() { + local -r _NEXT_SONIC_IMAGE="$(sonic_installer list | grep "Next: " | cut -f2 -d' ')" + local -r _CURRENT_SONIC_IMAGE="$(sonic_installer list | grep "Current: " | cut -f2 -d' ')" + + local -r _FS_PATH="/host/image-${_NEXT_SONIC_IMAGE#SONiC-OS-}/fs.squashfs" + local -r _FS_MOUNTPOINT="/tmp/image-${_NEXT_SONIC_IMAGE#SONiC-OS-}-fs" + + if [[ "${_CURRENT_SONIC_IMAGE}" == "${_NEXT_SONIC_IMAGE}" ]]; then + ExitSuccess "firmware is up to date" + else + mkdir -p "${_FS_MOUNTPOINT}" + mount -t squashfs "${_FS_PATH}" "${_FS_MOUNTPOINT}" + + UpgradeFW "${_FS_MOUNTPOINT}" + + umount -rf "${_FS_MOUNTPOINT}" + rm -rf "${_FS_MOUNTPOINT}" + fi +} + +function ExitIfQEMU() { + if [[ $(cat /sys/devices/virtual/dmi/id/chassis_vendor) = "QEMU" ]]; then + ExitSuccess "No FW upgrade for SimX platform" + fi +} + +ParseArguments "$@" + +ExitIfQEMU + +WaitForDevice + +if [ "${IMAGE_UPGRADE}" != "${YES_PARAM}" ]; then + UpgradeFW +else + UpgradeFWFromImage +fi + +ExitSuccess "firmware upgrade is completed" diff --git a/platform/mellanox/mlnx-platform-api.mk b/platform/mellanox/mlnx-platform-api.mk new file mode 100644 index 00000000000..4b70e59debc --- /dev/null +++ b/platform/mellanox/mlnx-platform-api.mk @@ -0,0 +1,8 @@ +# SONIC_PLATFORM_API_PY2 package + +SONIC_PLATFORM_API_PY2 = mlnx_platform_api-1.0-py2-none-any.whl +$(SONIC_PLATFORM_API_PY2)_SRC_PATH = $(PLATFORM_PATH)/mlnx-platform-api +$(SONIC_PLATFORM_API_PY2)_PYTHON_VERSION = 2 +SONIC_PYTHON_WHEELS += $(SONIC_PLATFORM_API_PY2) + +export mlnx_platform_api_py2_wheel_path="$(addprefix $(PYTHON_WHEELS_PATH)/,$(SONIC_PLATFORM_API_PY2))" diff --git a/platform/mellanox/mlnx-platform-api/setup.py b/platform/mellanox/mlnx-platform-api/setup.py new file mode 100644 index 00000000000..12809c4085e --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/setup.py @@ -0,0 +1,30 @@ +from setuptools import setup + +setup( + name='mlnx-platform-api', + version='1.0', + description='SONiC platform API implementation on Mellanox platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Kevin Wang', + maintainer_email='kevinw@mellanox.com', + packages=[ + 'sonic_platform', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 2.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) + diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/__init__.py b/platform/mellanox/mlnx-platform-api/sonic_platform/__init__.py new file mode 100644 index 00000000000..d94d4c9ec82 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import * \ No newline at end of file diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py new file mode 100644 index 00000000000..44ef8981281 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py @@ -0,0 +1,441 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Chassis information which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform_base.component_base import ComponentBase + from sonic_daemon_base.daemon_base import Logger + from os import listdir + from os.path import isfile, join + import sys + import io + import re + import subprocess + import syslog +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +MAX_SELECT_DELAY = 3600 + +MLNX_NUM_PSU = 2 + +GET_HWSKU_CMD = "sonic-cfggen -d -v DEVICE_METADATA.localhost.hwsku" + +EEPROM_CACHE_ROOT = '/var/cache/sonic/decode-syseeprom' +EEPROM_CACHE_FILE = 'syseeprom_cache' + +HWMGMT_SYSTEM_ROOT = '/var/run/hw-management/system/' + +#reboot cause related definitions +REBOOT_CAUSE_ROOT = HWMGMT_SYSTEM_ROOT + +REBOOT_CAUSE_FILE_LENGTH = 1 + +# Global logger class instance +logger = Logger() + +# magic code defnition for port number, qsfp port position of each hwsku +# port_position_tuple = (PORT_START, QSFP_PORT_START, PORT_END, PORT_IN_BLOCK, EEPROM_OFFSET) +hwsku_dict_port = {'ACS-MSN2010': 3, 'ACS-MSN2100': 1, 'ACS-MSN2410': 2, 'ACS-MSN2700': 0, 'Mellanox-SN2700': 0, 'Mellanox-SN2700-D48C8': 0, 'LS-SN2700':0, 'ACS-MSN2740': 0, 'ACS-MSN3700': 0, 'ACS-MSN3700C': 0, 'ACS-MSN3800': 4} +port_position_tuple_list = [(0, 0, 31, 32, 1), (0, 0, 15, 16, 1), (0, 48, 55, 56, 1), (0, 18, 21, 22, 1), (0, 0, 63, 64, 1)] + +class Chassis(ChassisBase): + """Platform-specific Chassis class""" + + def __init__(self): + super(Chassis, self).__init__() + + # Initialize SKU name + self.sku_name = self._get_sku_name() + + # move the initialization of each components to their dedicated initializer + # which will be called from platform + self.sfp_module_initialized = False + self.sfp_event_initialized = False + self.reboot_cause_initialized = False + logger.log_info("Chassis loaded successfully") + + + def __del__(self): + if self.sfp_event_initialized: + self.sfp_event.deinitialize() + + + def initialize_psu(self): + from sonic_platform.psu import Psu + # Initialize PSU list + self.psu_module = Psu + for index in range(MLNX_NUM_PSU): + psu = Psu(index, self.sku_name) + self._psu_list.append(psu) + + + def initialize_fan(self): + from sonic_platform.fan import Fan + from sonic_platform.fan import FAN_PATH + self.fan_module = Fan + self.fan_path = FAN_PATH + # Initialize FAN list + multi_rotor_in_drawer = False + num_of_fan, num_of_drawer = self._extract_num_of_fans_and_fan_drawers() + multi_rotor_in_drawer = num_of_fan > num_of_drawer + + for index in range(num_of_fan): + if multi_rotor_in_drawer: + fan = Fan(index, index/2) + else: + fan = Fan(index, index) + self._fan_list.append(fan) + + + def initialize_sfp(self): + from sonic_platform.sfp import SFP + + self.sfp_module = SFP + + # Initialize SFP list + port_position_tuple = self._get_port_position_tuple_by_sku_name() + self.PORT_START = port_position_tuple[0] + self.QSFP_PORT_START = port_position_tuple[1] + self.PORT_END = port_position_tuple[2] + self.PORTS_IN_BLOCK = port_position_tuple[3] + + for index in range(self.PORT_START, self.PORT_END + 1): + if index in range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1): + sfp_module = SFP(index, 'QSFP') + else: + sfp_module = SFP(index, 'SFP') + self._sfp_list.append(sfp_module) + + self.sfp_module_initialized = True + + + def initialize_thermals(self): + from sonic_platform.thermal import initialize_thermals + # Initialize thermals + initialize_thermals(self.sku_name, self._thermal_list, self._psu_list) + + + def initialize_eeprom(self): + from eeprom import Eeprom + # Initialize EEPROM + self._eeprom = Eeprom() + + + def initialize_components(self): + # Initialize component list + from sonic_platform.component import ComponentBIOS, ComponentCPLD + self._component_list.append(ComponentBIOS()) + self._component_list.append(ComponentCPLD()) + + + ############################################## + # SFP methods + ############################################## + def get_num_sfps(self): + """ + Retrieves the number of sfps available on this chassis + + Returns: + An integer, the number of sfps available on this chassis + """ + if not self.sfp_module_initialized: + self.initialize_sfp() + return len(self._sfp_list) + + + def get_all_sfps(self): + """ + Retrieves all sfps available on this chassis + + Returns: + A list of objects derived from SfpBase representing all sfps + available on this chassis + """ + if not self.sfp_module_initialized: + self.initialize_sfp() + return self._sfp_list + + + def get_sfp(self, index): + """ + Retrieves sfp represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 0. + For example, 0 for Ethernet0, 1 for Ethernet4 and so on. + + Returns: + An object dervied from SfpBase representing the specified sfp + """ + if not self.sfp_module_initialized: + self.initialize_sfp() + + sfp = None + + try: + sfp = self._sfp_list[index] + except IndexError: + sys.stderr.write("SFP index {} out of range (0-{})\n".format( + index, len(self._sfp_list)-1)) + + return sfp + + + def _extract_num_of_fans_and_fan_drawers(self): + num_of_fan = 0 + num_of_drawer = 0 + for f in listdir(self.fan_path): + if isfile(join(self.fan_path, f)): + match_obj = re.match('fan(\d+)_speed_get', f) + if match_obj != None: + if int(match_obj.group(1)) > num_of_fan: + num_of_fan = int(match_obj.group(1)) + else: + match_obj = re.match('fan(\d+)_status', f) + if match_obj != None and int(match_obj.group(1)) > num_of_drawer: + num_of_drawer = int(match_obj.group(1)) + + return num_of_fan, num_of_drawer + + + def _get_sku_name(self): + p = subprocess.Popen(GET_HWSKU_CMD, shell=True, stdout=subprocess.PIPE) + out, err = p.communicate() + return out.rstrip('\n') + + + def _get_port_position_tuple_by_sku_name(self): + position_tuple = port_position_tuple_list[hwsku_dict_port[self.sku_name]] + return position_tuple + + + def get_watchdog(self): + """ + Retrieves hardware watchdog device on this chassis + + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + + Note: + We overload this method to ensure that watchdog is only initialized + when it is referenced. Currently, only one daemon can open the watchdog. + To initialize watchdog in the constructor causes multiple daemon + try opening watchdog when loading and constructing a chassis object + and fail. By doing so we can eliminate that risk. + """ + try: + if self._watchdog is None: + from sonic_platform.watchdog import get_watchdog + self._watchdog = get_watchdog() + except Exception as e: + logger.log_info("Fail to load watchdog due to {}".format(repr(e))) + + return self._watchdog + + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.get_base_mac() + + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.get_serial_number() + + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.get_system_eeprom_info() + + + def _read_generic_file(self, filename, len): + """ + Read a generic file, returns the contents of the file + """ + result = '' + try: + fileobj = io.open(filename) + result = fileobj.read(len) + fileobj.close() + return result + except Exception as e: + logger.log_info("Fail to read file {} due to {}".format(filename, repr(e))) + return '0' + + + def _verify_reboot_cause(self, filename): + ''' + Open and read the reboot cause file in + /var/run/hwmanagement/system (which is defined as REBOOT_CAUSE_ROOT) + If a reboot cause file doesn't exists, returns '0'. + ''' + return bool(int(self._read_generic_file(join(REBOOT_CAUSE_ROOT, filename), REBOOT_CAUSE_FILE_LENGTH).rstrip('\n'))) + + + def initialize_reboot_cause(self): + self.reboot_major_cause_dict = { + 'reset_main_pwr_fail' : self.REBOOT_CAUSE_POWER_LOSS, + 'reset_aux_pwr_or_ref' : self.REBOOT_CAUSE_POWER_LOSS, + 'reset_asic_thermal' : self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC, + 'reset_hotswap_or_wd' : self.REBOOT_CAUSE_WATCHDOG, + 'reset_swb_wd' : self.REBOOT_CAUSE_WATCHDOG, + 'reset_sff_wd' : self.REBOOT_CAUSE_WATCHDOG + } + self.reboot_minor_cause_dict = { + 'reset_fw_reset' : "Reset by ASIC firmware", + 'reset_long_pb' : "Reset by long press on power button", + 'reset_short_pb' : "Reset by short press on power button", + 'reset_comex_thermal' : "ComEx thermal shutdown", + 'reset_comex_pwr_fail' : "ComEx power fail", + 'reset_comex_wd' : "Reset requested from ComEx", + 'reset_from_asic' : "Reset requested from ASIC", + 'reset_reload_bios' : "Reset caused by BIOS reload", + 'reset_hotswap_or_halt' : "Reset caused by hotswap or halt", + 'reset_from_comex' : "Reset from ComEx", + 'reset_voltmon_upgrade_fail': "Reset due to voltage monitor devices upgrade failure" + } + self.reboot_by_software = 'reset_sw_reset' + self.reboot_cause_initialized = True + + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + #read reboot causes files in the following order + if not self.reboot_cause_initialized: + self.initialize_reboot_cause() + + for reset_file, reset_cause in self.reboot_major_cause_dict.iteritems(): + if self._verify_reboot_cause(reset_file): + return reset_cause, '' + + for reset_file, reset_cause in self.reboot_minor_cause_dict.iteritems(): + if self._verify_reboot_cause(reset_file): + return self.REBOOT_CAUSE_HARDWARE_OTHER, reset_cause + + if self._verify_reboot_cause(self.reboot_by_software): + logger.log_info("Hardware reboot cause: the system was rebooted due to software requesting") + else: + logger.log_info("Hardware reboot cause: no hardware reboot cause found") + + return self.REBOOT_CAUSE_NON_HARDWARE, '' + + + def _show_capabilities(self): + """ + This function is for debug purpose + Some features require a xSFP module to support some capabilities but it's unrealistic to + check those modules one by one. + So this function is introduce to show some capabilities of all xSFP modules mounted on the device. + """ + for s in self._sfp_list: + try: + print "index {} tx disable {} dom {} calibration {} temp {} volt {} power (tx {} rx {})".format(s.index, + s.dom_tx_disable_supported, + s.dom_supported, + s.calibration, + s.dom_temp_supported, + s.dom_volt_supported, + s.dom_rx_power_supported, + s.dom_tx_power_supported + ) + except: + print "fail to retrieve capabilities for module index {}".format(s.index) + + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + + Returns: + (bool, dict): + - True if call successful, False if not; + - A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, + where device_id is the device ID for this device and + device_event, + status='1' represents device inserted, + status='0' represents device removed. + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}} + indicates that fan 0 has been removed, fan 2 + has been inserted and sfp 11 has been removed. + """ + # Initialize SFP event first + if not self.sfp_event_initialized: + from sonic_platform.sfp_event import sfp_event + self.sfp_event = sfp_event() + self.sfp_event.initialize() + self.MAX_SELECT_EVENT_RETURNED = self.PORT_END + self.sfp_event_initialized = True + + wait_for_ever = (timeout == 0) + port_dict = {} + if wait_for_ever: + timeout = MAX_SELECT_DELAY + while True: + status = self.sfp_event.check_sfp_status(port_dict, timeout) + if not port_dict == {}: + break + else: + status = self.sfp_event.check_sfp_status(port_dict, timeout) + + if status: + # get_change_event has the meaning of retrieving all the notifications through a single call. + # Typically this is implemented via a select framework which requires the underlay file-reading + # interface able to retrieve all notifications without blocking once the fd has been selected. + # However, sdk doesn't provide any interface satisfied the requirement. as a result, + # check_sfp_status returns only one notification may indicate more notifications in its queue. + # In this sense, we have to iterate in a loop to get all the notifications in case that + # the first call returns at least one. + i = 0 + while i < self.MAX_SELECT_EVENT_RETURNED: + status = self.sfp_event.check_sfp_status(port_dict, 0) + if not status: + break + i = i + 1 + return True, {'sfp':port_dict} + else: + return True, {'sfp':{}} diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/component.py b/platform/mellanox/mlnx-platform-api/sonic_platform/component.py new file mode 100644 index 00000000000..fd593f7bbe4 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/component.py @@ -0,0 +1,148 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# implementation of new platform api +############################################################################# + +try: + from sonic_platform_base.component_base import ComponentBase + from glob import glob + import subprocess + import io + import re +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +#components definitions +COMPONENT_BIOS = "BIOS" +COMPONENT_CPLD = "CPLD" + +BIOS_QUERY_VERSION_COMMAND = 'dmidecode -t 11' +CPLD_VERSION_FILE_PATTERN = '/var/run/hw-management/system/cpld[0-9]_version' +CPLD_VERSION_MAX_LENGTH = 4 + +class Component(ComponentBase): + def get_name(self): + """ + Retrieves the name of the component + + Returns: + A string containing the name of the component + """ + return self.name + + + def _read_generic_file(self, filename, len): + """ + Read a generic file, returns the contents of the file + """ + result = '' + try: + with io.open(filename, 'r') as fileobj: + result = fileobj.read(len) + return result + except IOError as e: + raise RuntimeError("Failed to read file {} due to {}".format(filename, repr(e))) + + + def _get_command_result(self, cmdline): + try: + proc = subprocess.Popen(cmdline, stdout=subprocess.PIPE, shell=True, stderr=subprocess.STDOUT) + stdout = proc.communicate()[0] + proc.wait() + result = stdout.rstrip('\n') + + except OSError as e: + raise RuntimeError("Failed to execute command {} due to {}".format(cmdline, repr(e))) + + return result + + +class ComponentBIOS(Component): + BIOS_VERSION_PARSE_PATTERN = 'OEM[\s]*Strings\n[\s]*String[\s]*1:[\s]*([0-9a-zA-Z_\.]*)' + + + def __init__(self): + self.name = COMPONENT_BIOS + + + def get_description(self): + """ + Retrieves the description of the component + + Returns: + A string containing the description of the component + """ + return "BIOS - Basic Input/Output System" + + + def get_firmware_version(self): + """ + Retrieves the firmware version of the component + + Returns: + A string containing the firmware version of the component + + BIOS version is retrieved via command 'dmidecode -t 11' + which should return result in the following convention + # dmidecode 3.0 + Getting SMBIOS data from sysfs. + SMBIOS 2.7 present. + + Handle 0x0022, DMI type 11, 5 bytes + OEM Strings + String 1:*0ABZS017_02.02.002* + String 2: To Be Filled By O.E.M. + + By using regular expression 'OEM[\s]*Strings\n[\s]*String[\s]*1:[\s]*([0-9a-zA-Z_\.]*)' + we can extrace the version string which is marked with * in the above context + """ + bios_ver_str = self._get_command_result(BIOS_QUERY_VERSION_COMMAND) + try: + m = re.search(self.BIOS_VERSION_PARSE_PATTERN, bios_ver_str) + result = m.group(1) + except AttributeError as e: + raise RuntimeError("Failed to parse BIOS version by {} from {} due to {}".format( + self.BIOS_VERSION_PARSE_PATTERN, bios_ver_str, repr(e))) + + return result + + +class ComponentCPLD(Component): + def __init__(self): + self.name = COMPONENT_CPLD + + + def get_description(self): + """ + Retrieves the description of the component + + Returns: + A string containing the description of the component + """ + return "CPLD - includes all CPLDs in the switch" + + + def get_firmware_version(self): + """ + Retrieves the firmware version of the component + + Returns: + A string containing the firmware version of the component + """ + cpld_version_file_list = glob(CPLD_VERSION_FILE_PATTERN) + cpld_version = '' + if cpld_version_file_list is not None and cpld_version_file_list: + cpld_version_file_list.sort() + for version_file in cpld_version_file_list: + version = self._read_generic_file(version_file, CPLD_VERSION_MAX_LENGTH) + if not cpld_version == '': + cpld_version += '.' + cpld_version += version.rstrip('\n') + else: + raise RuntimeError("Failed to get CPLD version files by matching {}".format(CPLD_VERSION_FILE_PATTERN)) + + return cpld_version + diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py b/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py new file mode 100644 index 00000000000..23f4b8b3444 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py @@ -0,0 +1,149 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Module contains an implementation of SONiC Platform Base API and +# provides the eeprom information which are available in the platform +# +############################################################################# +import exceptions +import os +import sys +import re +from cStringIO import StringIO + +try: + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +# +# CACHE_XXX stuffs are supposted to be moved to the base classes +# since they are common for all vendors +# they are defined in decode-syseeprom which might be removed in the future +# currently we just copy them here +# +CACHE_ROOT = '/var/cache/sonic/decode-syseeprom' +CACHE_FILE = 'syseeprom_cache' + +# +# this is mlnx-specific +# should this be moved to chass.py or here, which better? +# +EEPROM_SYMLINK = "/var/run/hw-management/eeprom/vpd_info" + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + RETRIES = 3 + EEPROM_DECODE_HEADLINES = 6 + EEPROM_DECODE_MAXITEM = 3 + EEPROM_DECODE_OFFSET = 0 + EEPROM_DECODE_CONTENT = 2 + + def __init__(self): + for attempt in range(self.RETRIES): + if not os.path.islink(EEPROM_SYMLINK): + time.sleep(1) + else: + break + + if not (os.path.exists(EEPROM_SYMLINK) \ + or os.path.isfile(os.path.join(CACHE_ROOT, CACHE_FILE))): + log_error("Nowhere to read syseeprom from! No symlink or cache file found") + raise RuntimeError("No syseeprom symlink or cache file found") + + self.eeprom_path = EEPROM_SYMLINK + super(Eeprom, self).__init__(self.eeprom_path, 0, '', True) + self._eeprom_loaded = False + self._load_eeprom() + self._eeprom_loaded = True + + def _load_eeprom(self): + if not os.path.exists(CACHE_ROOT): + try: + os.makedirs(CACHE_ROOT) + except: + pass + + try: + self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE)) + except: + pass + + eeprom = self.read_eeprom() + if eeprom is None : + return 0 + + try: + self.update_cache(eeprom) + except: + pass + + self._base_mac = self.mgmtaddrstr(eeprom) + if self._base_mac == None: + self._base_mac = "Undefined." + + self._serial_str = self.serial_number_str(eeprom) + if self._serial_str == None: + self._serial_str = "Undefined." + + original_stdout = sys.stdout + sys.stdout = StringIO() + self.decode_eeprom(eeprom) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + + #parse decode_output into a dictionary + decode_output.replace('\0', '') + lines = decode_output.split('\n') + lines = lines[self.EEPROM_DECODE_HEADLINES:] + self._eeprom_info_dict = dict() + + for line in lines: + try: + match = re.search('(0x[0-9a-fA-F]{2})([\s]+[\S]+[\s]+)([\S]+)', line) + if match is not None: + idx = match.group(1) + value = match.group(3).rstrip('\0') + + self._eeprom_info_dict[idx] = value + except: + pass + + return 0 + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + if not self._eeprom_loaded: + self._load_eeprom() + return self._base_mac + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this chassis. + """ + if not self._eeprom_loaded: + self._load_eeprom() + return self._serial_str + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + if not self._eeprom_loaded: + self._load_eeprom() + return self._eeprom_info_dict diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/fan.py b/platform/mellanox/mlnx-platform-api/sonic_platform/fan.py new file mode 100644 index 00000000000..8b057e4123a --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/fan.py @@ -0,0 +1,246 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Module contains an implementation of SONiC Platform Base API and +# provides the FANs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_platform_base.fan_base import FanBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +LED_ON = 1 +LED_OFF = 0 + +PWM_MAX = 255 + +FAN_PATH = "/var/run/hw-management/thermal/" +LED_PATH = "/var/run/hw-management/led/" + +class Fan(FanBase): + """Platform-specific Fan class""" + def __init__(self, fan_index, drawer_index = 1, psu_fan = False): + # API index is starting from 0, Mellanox platform index is starting from 1 + self.index = fan_index + 1 + self.drawer_index = drawer_index + 1 + + self.is_psu_fan = psu_fan + + self.fan_min_speed_path = "fan{}_min".format(self.index) + if not self.is_psu_fan: + self.fan_speed_get_path = "fan{}_speed_get".format(self.index) + self.fan_speed_set_path = "fan{}_speed_set".format(self.index) + self.fan_presence_path = "fan{}_status".format(self.drawer_index) + self.fan_max_speed_path = "fan{}_max".format(self.index) + else: + self.fan_speed_get_path = "psu{}_fan1_speed_get".format(self.index) + self.fan_presence_path = "psu{}_fan1_speed_get".format(self.index) + self.fan_max_speed_path = "psu{}_max".format(self.index) + self.fan_status_path = "fan{}_fault".format(self.index) + self.fan_green_led_path = "led_fan{}_green".format(self.drawer_index) + self.fan_red_led_path = "led_fan{}_red".format(self.drawer_index) + self.fan_orange_led_path = "led_fan{}_orange".format(self.drawer_index) + self.fan_pwm_path = "pwm1" + self.fan_led_cap_path = "led_fan{}_capability".format(self.drawer_index) + + def get_status(self): + """ + Retrieves the operational status of fan + + Returns: + bool: True if fan is operating properly, False if not + """ + status = 0 + if self.is_psu_fan: + status = 1 + else: + try: + with open(os.path.join(FAN_PATH, self.fan_status_path), 'r') as fault_status: + status = int(fault_status.read()) + except (ValueError, IOError): + status = 0 + + return status == 1 + + def get_presence(self): + """ + Retrieves the presence status of fan + + Returns: + bool: True if fan is present, False if not + """ + status = 0 + if self.is_psu_fan: + if os.path.exists(os.path.join(FAN_PATH, self.fan_presence_path)): + status = 1 + else: + status = 0 + else: + try: + with open(os.path.join(FAN_PATH, self.fan_presence_path), 'r') as presence_status: + status = int(presence_status.read()) + except (ValueError, IOError): + status = 0 + + return status == 1 + + def _get_min_speed_in_rpm(self): + speed = 0 + try: + with open(os.path.join(FAN_PATH, self.fan_min_speed_path), 'r') as min_fan_speed: + speed = int(min_fan_speed.read()) + except (ValueError, IOError): + speed = 0 + + return speed + + def _get_max_speed_in_rpm(self): + speed = 0 + try: + with open(os.path.join(FAN_PATH, self.fan_max_speed_path), 'r') as max_fan_speed: + speed = int(max_fan_speed.read()) + except (ValueError, IOError): + speed = 0 + + return speed + + def get_speed(self): + """ + Retrieves the speed of fan + + Returns: + int: percentage of the max fan speed + """ + speed = 0 + try: + with open(os.path.join(FAN_PATH, self.fan_speed_get_path), 'r') as fan_curr_speed: + speed_in_rpm = int(fan_curr_speed.read()) + except (ValueError, IOError): + speed_in_rpm = 0 + + max_speed_in_rpm = self._get_max_speed_in_rpm() + speed = 100*speed_in_rpm/max_speed_in_rpm + + return speed + + def get_target_speed(self): + """ + Retrieves the expected speed of fan + + Returns: + int: percentage of the max fan speed + """ + speed = 0 + + if self.is_psu_fan: + # Not like system fan, psu fan speed can not be modified, so target speed is N/A + return speed + try: + with open(os.path.join(FAN_PATH, self.fan_speed_set_path), 'r') as fan_pwm: + pwm = int(fan_pwm.read()) + except (ValueError, IOError): + pwm = 0 + + speed = int(round(pwm*100.0/PWM_MAX)) + + return speed + + def set_speed(self, speed): + """ + Set fan speed to expected value + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + bool: True if set success, False if fail. + """ + status = True + pwm = int(round(PWM_MAX*speed/100.0)) + + if self.is_psu_fan: + #PSU fan speed is not setable. + return False + + try: + with open(os.path.join(FAN_PATH, self.fan_speed_set_path), 'w') as fan_pwm: + fan_pwm.write(str(pwm)) + except (ValueError, IOError): + status = False + + return status + + def _get_led_capability(self): + cap_list = None + try: + with open(os.path.join(LED_PATH, self.fan_led_cap_path), 'r') as fan_led_cap: + caps = fan_led_cap.read() + cap_list = caps.split() + except (ValueError, IOError): + status = 0 + + return cap_list + + def set_status_led(self, color): + """ + Set led to expected color + + Args: + color: A string representing the color with which to set the + fan module status LED + + Returns: + bool: True if set success, False if fail. + """ + led_cap_list = self._get_led_capability() + if led_cap_list is None: + return False + + if self.is_psu_fan: + # PSU fan led status is not able to set + return False + status = False + try: + if color == 'green': + with open(os.path.join(LED_PATH, self.fan_green_led_path), 'w') as fan_led: + fan_led.write(str(LED_ON)) + elif color == 'red': + # Some fan don't support red led but support orange led, in this case we set led to orange + if 'red' in led_cap_list: + led_path = os.path.join(LED_PATH, self.fan_red_led_path) + elif 'orange' in led_cap_list: + led_path = os.path.join(LED_PATH, self.fan_orange_led_path) + else: + return False + with open(led_path, 'w') as fan_led: + fan_led.write(str(LED_ON)) + + elif color == 'off': + with open(os.path.join(LED_PATH, self.fan_green_led_path), 'w') as fan_led: + fan_led.write(str(LED_OFF)) + + with open(os.path.join(LED_PATH, self.fan_red_led_path), 'w') as fan_led: + fan_led.write(str(LED_OFF)) + else: + status = False + except (ValueError, IOError): + status = False + return status + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + # The tolerance value is fixed as 20% for all the Mellanox platform + return 20 \ No newline at end of file diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/platform.py b/platform/mellanox/mlnx-platform-api/sonic_platform/platform.py new file mode 100644 index 00000000000..25461986f37 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/platform.py @@ -0,0 +1,45 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# implementation of new platform api +############################################################################# + +try: + import subprocess + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Platform(PlatformBase): + def __init__(self): + PlatformBase.__init__(self) + if self._is_host(): + self._chassis = Chassis() + self._chassis.initialize_components() + else: + self._chassis = Chassis() + self._chassis.initialize_psu() + self._chassis.initialize_fan() + self._chassis.initialize_eeprom() + + def _is_host(self): + """ + Test whether current process is running on the host or an docker + return True for host and False for docker + """ + is_host = False + try: + proc = subprocess.Popen("docker --version 2>/dev/null", stdout=subprocess.PIPE, shell=True, stderr=subprocess.STDOUT) + stdout = proc.communicate()[0] + proc.wait() + result = stdout.rstrip('\n') + if result != '': + is_host = True + + except OSError, e: + pass + + return is_host diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/psu.py b/platform/mellanox/mlnx-platform-api/sonic_platform/psu.py new file mode 100644 index 00000000000..0789f67e4f0 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/psu.py @@ -0,0 +1,171 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +try: + import os.path + from sonic_platform_base.psu_base import PsuBase + from sonic_daemon_base.daemon_base import Logger + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +# Global logger class instance +logger = Logger() + +psu_list = [] + +PSU_CURRENT = "current" +PSU_VOLTAGE = "voltage" +PSU_POWER = "power" + +# SKUs with unplugable PSUs: +# 1. don't have psuX_status and should be treated as always present +# 2. don't have voltage, current and power values +hwsku_dict_with_unplugable_psu = ['ACS-MSN2010', 'ACS-MSN2100'] + +# in most SKUs the file psuX_curr, psuX_volt and psuX_power contain current, voltage and power data respectively. +# but there are exceptions which will be handled by the following dictionary +hwsku_dict_psu = {'ACS-MSN3700': 1, 'ACS-MSN3700C': 1, 'ACS-MSN3800': 1} +psu_profile_list = [ + # default filename convention + { + PSU_CURRENT : "power/psu{}_curr", + PSU_VOLTAGE : "power/psu{}_volt", + PSU_POWER : "power/psu{}_power" + }, + # for 3700, 3700c, 3800 + { + PSU_CURRENT : "power/psu{}_curr", + PSU_VOLTAGE : "power/psu{}_volt_out2", + PSU_POWER : "power/psu{}_power" + } +] + +class Psu(PsuBase): + """Platform-specific Psu class""" + def __init__(self, psu_index, sku): + global psu_list + PsuBase.__init__(self) + # PSU is 1-based on Mellanox platform + self.index = psu_index + 1 + psu_list.append(self.index) + self.psu_path = "/var/run/hw-management/" + psu_oper_status = "thermal/psu{}_pwr_status".format(self.index) + #psu_oper_status should always be present for all SKUs + self.psu_oper_status = os.path.join(self.psu_path, psu_oper_status) + + if sku in hwsku_dict_psu: + filemap = psu_profile_list[hwsku_dict_psu[sku]] + else: + filemap = psu_profile_list[0] + + if sku in hwsku_dict_with_unplugable_psu: + self.always_presence = True + self.psu_voltage = None + self.psu_current = None + self.psu_power = None + self.psu_presence = None + else: + self.always_presence = False + psu_voltage = filemap[PSU_VOLTAGE].format(self.index) + psu_voltage = os.path.join(self.psu_path, psu_voltage) + self.psu_voltage = psu_voltage + + psu_current = filemap[PSU_CURRENT].format(self.index) + psu_current = os.path.join(self.psu_path, psu_current) + self.psu_current = psu_current + + psu_power = filemap[PSU_POWER].format(self.index) + psu_power = os.path.join(self.psu_path, psu_power) + self.psu_power = psu_power + + psu_presence = "thermal/psu{}_status".format(self.index) + psu_presence = os.path.join(self.psu_path, psu_presence) + self.psu_presence = psu_presence + + fan = Fan(psu_index, psu_index, True) + if fan.get_presence(): + self._fan = fan + + def _read_generic_file(self, filename, len): + """ + Read a generic file, returns the contents of the file + """ + result = 0 + try: + with open(filename, 'r') as fileobj: + result = int(fileobj.read()) + except Exception as e: + logger.log_info("Fail to read file {} due to {}".format(filename, repr(e))) + return result + + def get_powergood_status(self): + """ + Retrieves the operational status of power supply unit (PSU) defined + + Returns: + bool: True if PSU is operating properly, False if not + """ + status = self._read_generic_file(os.path.join(self.psu_path, self.psu_oper_status), 0) + + return status == 1 + + def get_presence(self): + """ + Retrieves the presence status of power supply unit (PSU) defined + + Returns: + bool: True if PSU is present, False if not + """ + if self.always_presence: + return self.always_presence + else: + status = self._read_generic_file(self.psu_presence, 0) + return status == 1 + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + if self.psu_voltage is not None and self.get_powergood_status(): + voltage = self._read_generic_file(self.psu_voltage, 0) + return float(voltage) / 1000 + else: + return None + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + if self.psu_current is not None and self.get_powergood_status(): + amperes = self._read_generic_file(self.psu_current, 0) + return float(amperes) / 1000 + else: + return None + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, e.g. 302.6 + """ + if self.psu_power is not None and self.get_powergood_status(): + power = self._read_generic_file(self.psu_power, 0) + return float(power) / 1000000 + else: + return None diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py new file mode 100644 index 00000000000..845f355e28f --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py @@ -0,0 +1,1611 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Module contains an implementation of SONiC Platform Base API and +# provides the FANs status which are available in the platform +# +############################################################################# + +try: + import os + import subprocess + import time + from sonic_platform_base.sfp_base import SfpBase + from sonic_platform_base.sonic_eeprom import eeprom_dts + from sonic_platform_base.sonic_sfp.sff8472 import sff8472InterfaceId + from sonic_platform_base.sonic_sfp.sff8472 import sff8472Dom + from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom + from sonic_platform_base.sonic_sfp.inf8628 import inf8628InterfaceId + from sonic_daemon_base.daemon_base import Logger + from python_sdk_api.sxd_api import * + from python_sdk_api.sx_api import * + +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +# definitions of the offset and width for values in XCVR info eeprom +XCVR_INTFACE_BULK_OFFSET = 0 +XCVR_INTFACE_BULK_WIDTH_QSFP = 20 +XCVR_INTFACE_BULK_WIDTH_SFP = 21 +XCVR_TYPE_OFFSET = 0 +XCVR_TYPE_WIDTH = 1 +XCVR_EXT_TYPE_OFFSET = 1 +XCVR_EXT_TYPE_WIDTH = 1 +XCVR_CONNECTOR_OFFSET = 2 +XCVR_CONNECTOR_WIDTH = 1 +XCVR_COMPLIANCE_CODE_OFFSET = 3 +XCVR_COMPLIANCE_CODE_WIDTH = 8 +XCVR_ENCODING_OFFSET = 11 +XCVR_ENCODING_WIDTH = 1 +XCVR_NBR_OFFSET = 12 +XCVR_NBR_WIDTH = 1 +XCVR_EXT_RATE_SEL_OFFSET = 13 +XCVR_EXT_RATE_SEL_WIDTH = 1 +XCVR_CABLE_LENGTH_OFFSET = 14 +XCVR_CABLE_LENGTH_WIDTH_QSFP = 5 +XCVR_CABLE_LENGTH_WIDTH_SFP = 6 +XCVR_VENDOR_NAME_OFFSET = 20 +XCVR_VENDOR_NAME_WIDTH = 16 +XCVR_VENDOR_OUI_OFFSET = 37 +XCVR_VENDOR_OUI_WIDTH = 3 +XCVR_VENDOR_PN_OFFSET = 40 +XCVR_VENDOR_PN_WIDTH = 16 +XCVR_HW_REV_OFFSET = 56 +XCVR_HW_REV_WIDTH_OSFP = 2 +XCVR_HW_REV_WIDTH_QSFP = 2 +XCVR_HW_REV_WIDTH_SFP = 4 +XCVR_VENDOR_SN_OFFSET = 68 +XCVR_VENDOR_SN_WIDTH = 16 +XCVR_VENDOR_DATE_OFFSET = 84 +XCVR_VENDOR_DATE_WIDTH = 8 +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 2 +# to improve performance we retrieve all eeprom data via a single ethtool command +# in function get_transceiver_info and get_transceiver_bulk_status +# XCVR_INTERFACE_DATA_SIZE stands for the max size to be read +# this variable is only used by get_transceiver_info. +# please be noted that each time some new value added to the function +# we should make sure that it falls into the area +# [XCVR_INTERFACE_DATA_START, XCVR_INTERFACE_DATA_SIZE] or +# adjust XCVR_INTERFACE_MAX_SIZE to contain the new data +# It's same for [QSFP_DOM_BULK_DATA_START, QSFP_DOM_BULK_DATA_SIZE] and +# [SFP_DOM_BULK_DATA_START, SFP_DOM_BULK_DATA_SIZE] which are used by +# get_transceiver_bulk_status +XCVR_INTERFACE_DATA_START = 0 +XCVR_INTERFACE_DATA_SIZE = 92 +SFP_MODULE_ADDRA2_OFFSET = 256 +SFP_MODULE_THRESHOLD_OFFSET = 0 +SFP_MODULE_THRESHOLD_WIDTH = 56 + +QSFP_DOM_BULK_DATA_START = 22 +QSFP_DOM_BULK_DATA_SIZE = 36 +SFP_DOM_BULK_DATA_START = 96 +SFP_DOM_BULK_DATA_SIZE = 10 + +# definitions of the offset for values in OSFP info eeprom +OSFP_TYPE_OFFSET = 0 +OSFP_VENDOR_NAME_OFFSET = 129 +OSFP_VENDOR_PN_OFFSET = 148 +OSFP_HW_REV_OFFSET = 164 +OSFP_VENDOR_SN_OFFSET = 166 + +#definitions of the offset and width for values in DOM info eeprom +QSFP_DOM_REV_OFFSET = 1 +QSFP_DOM_REV_WIDTH = 1 +QSFP_TEMPE_OFFSET = 22 +QSFP_TEMPE_WIDTH = 2 +QSFP_VOLT_OFFSET = 26 +QSFP_VOLT_WIDTH = 2 +QSFP_VERSION_COMPLIANCE_OFFSET = 1 +QSFP_VERSION_COMPLIANCE_WIDTH = 2 +QSFP_CHANNL_MON_OFFSET = 34 +QSFP_CHANNL_MON_WIDTH = 16 +QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH = 24 +QSFP_CHANNL_DISABLE_STATUS_OFFSET = 86 +QSFP_CHANNL_DISABLE_STATUS_WIDTH = 1 +QSFP_CHANNL_RX_LOS_STATUS_OFFSET = 3 +QSFP_CHANNL_RX_LOS_STATUS_WIDTH = 1 +QSFP_CHANNL_TX_FAULT_STATUS_OFFSET = 4 +QSFP_CHANNL_TX_FAULT_STATUS_WIDTH = 1 +QSFP_CONTROL_OFFSET = 86 +QSFP_CONTROL_WIDTH = 8 +QSFP_MODULE_MONITOR_OFFSET = 0 +QSFP_MODULE_MONITOR_WIDTH = 9 +QSFP_POWEROVERRIDE_OFFSET = 93 +QSFP_POWEROVERRIDE_WIDTH = 1 +QSFP_POWEROVERRIDE_BIT = 0 +QSFP_POWERSET_BIT = 1 +QSFP_OPTION_VALUE_OFFSET = 192 +QSFP_OPTION_VALUE_WIDTH = 4 + +QSFP_MODULE_UPPER_PAGE3_START = 384 +QSFP_MODULE_THRESHOLD_OFFSET = 128 +QSFP_MODULE_THRESHOLD_WIDTH = 24 +QSFP_CHANNL_THRESHOLD_OFFSET = 176 +QSFP_CHANNL_THRESHOLD_WIDTH = 24 + +SFP_TEMPE_OFFSET = 96 +SFP_TEMPE_WIDTH = 2 +SFP_VOLT_OFFSET = 98 +SFP_VOLT_WIDTH = 2 +SFP_CHANNL_MON_OFFSET = 100 +SFP_CHANNL_MON_WIDTH = 6 +SFP_CHANNL_STATUS_OFFSET = 110 +SFP_CHANNL_STATUS_WIDTH = 1 + +qsfp_cable_length_tup = ('Length(km)', 'Length OM3(2m)', + 'Length OM2(m)', 'Length OM1(m)', + 'Length Cable Assembly(m)') + +sfp_cable_length_tup = ('LengthSMFkm-UnitsOfKm', 'LengthSMF(UnitsOf100m)', + 'Length50um(UnitsOf10m)', 'Length62.5um(UnitsOfm)', + 'LengthCable(UnitsOfm)', 'LengthOM3(UnitsOf10m)') + +sfp_compliance_code_tup = ('10GEthernetComplianceCode', 'InfinibandComplianceCode', + 'ESCONComplianceCodes', 'SONETComplianceCodes', + 'EthernetComplianceCodes','FibreChannelLinkLength', + 'FibreChannelTechnology', 'SFP+CableTechnology', + 'FibreChannelTransmissionMedia','FibreChannelSpeed') + +qsfp_compliance_code_tup = ('10/40G Ethernet Compliance Code', 'SONET Compliance codes', + 'SAS/SATA compliance codes', 'Gigabit Ethernet Compliant codes', + 'Fibre Channel link length/Transmitter Technology', + 'Fibre Channel transmission media', 'Fibre Channel Speed') + +SFP_PATH = "/var/run/hw-management/qsfp/" +SFP_TYPE = "SFP" +QSFP_TYPE = "QSFP" +OSFP_TYPE = "OSFP" + +#variables for sdk +REGISTER_NUM = 1 +DEVICE_ID = 1 +SWITCH_ID = 0 +SX_PORT_ATTR_ARR_SIZE = 64 + +PMAOS_ASE = 1 +PMAOS_EE = 1 +PMAOS_E = 2 +PMAOS_RST = 0 +PMAOS_ENABLE = 1 +PMAOS_DISABLE = 2 + +PMMP_LPMODE_BIT = 8 +MCION_TX_DISABLE_BIT = 1 + +#on page 0 +#i2c address 0x50 +MCIA_ADDR_TX_CHANNEL_DISABLE = 86 + +MCIA_ADDR_POWER_OVERRIDE = 93 +#power set bit +MCIA_ADDR_POWER_OVERRIDE_PS_BIT = 1 +#power override bit +MCIA_ADDR_POWER_OVERRIDE_POR_BIT = 0 + +#on page 0 +#i2c address 0x51 +MCIA_ADDR_TX_DISABLE = 110 +MCIA_ADDR_TX_DISABLE_BIT = 6 + +PORT_TYPE_NVE = 8 +PORT_TYPE_OFFSET = 28 +PORT_TYPE_MASK = 0xF0000000 +NVE_MASK = PORT_TYPE_MASK & (PORT_TYPE_NVE << PORT_TYPE_OFFSET) + +# Global logger class instance +logger = Logger() + +class SFP(SfpBase): + """Platform-specific SFP class""" + + def __init__(self, sfp_index, sfp_type): + self.index = sfp_index + 1 + self.sfp_eeprom_path = "qsfp{}".format(self.index) + self.sfp_status_path = "qsfp{}_status".format(self.index) + self.sfp_type = sfp_type + self.dom_tx_disable_supported = False + self._dom_capability_detect() + self.sdk_handle = None + self.sdk_index = sfp_index + + + #SDK initializing stuff + def _initialize_sdk_handle(self): + """ + reference: device\mellanox\\pulgins\sfpreset.py + """ + rc, self.sdk_handle = sx_api_open(None) + if (rc != SX_STATUS_SUCCESS): + logger.log_warning("Failed to open api handle, please check whether SDK is running.") + self.sdk_handle = None + + self.mypid = os.getpid() + + + def _open_sdk(self): + if self.sdk_handle is None: + self._initialize_sdk_handle() + + rc = sxd_access_reg_init(self.mypid, None, 0) + if rc != 0: + logger.log_warning("Failed to initializing register access, please check that SDK is running.") + return False + + return True + + + def _close_sdk(self): + rc = sxd_access_reg_deinit() + if rc != 0: + logger.log_warning("Failed to deinitializing register access.") + #no further actions here + + + def _init_sx_meta_data(self): + meta = sxd_reg_meta_t() + meta.dev_id = DEVICE_ID + meta.swid = SWITCH_ID + return meta + + + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + presence = False + ethtool_cmd = "ethtool -m sfp{} hex on offset 0 length 1 2>/dev/null".format(self.index) + try: + proc = subprocess.Popen(ethtool_cmd, stdout=subprocess.PIPE, shell=True, stderr=subprocess.STDOUT) + stdout = proc.communicate()[0] + proc.wait() + result = stdout.rstrip('\n') + if result != '': + presence = True + + except OSError, e: + raise OSError("Cannot detect sfp") + + return presence + + + # Read out any bytes from any offset + def _read_eeprom_specific_bytes(self, offset, num_bytes): + eeprom_raw = [] + ethtool_cmd = "ethtool -m sfp{} hex on offset {} length {}".format(self.index, offset, num_bytes) + try: + output = subprocess.check_output(ethtool_cmd, shell=True) + output_lines = output.splitlines() + first_line_raw = output_lines[0] + if "Offset" in first_line_raw: + for line in output_lines[2:]: + line_split = line.split() + eeprom_raw = eeprom_raw + line_split[1:] + except subprocess.CalledProcessError as e: + return None + + return eeprom_raw + + + def _dom_capability_detect(self): + if not self.get_presence(): + self.dom_supported = False + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + self.calibration = 0 + return + + if self.sfp_type == "QSFP": + self.calibration = 1 + sfpi_obj = sff8436InterfaceId() + if sfpi_obj is None: + self.dom_supported = False + offset = 128 + + # QSFP capability byte parse, through this byte can know whether it support tx_power or not. + # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, + # need to add more code for determining the capability and version compliance + # in SFF-8636 dom capability definitions evolving with the versions. + qsfp_dom_capability_raw = self._read_eeprom_specific_bytes((offset + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) + if qsfp_dom_capability_raw is not None: + qsfp_version_compliance_raw = self._read_eeprom_specific_bytes(QSFP_VERSION_COMPLIANCE_OFFSET, QSFP_VERSION_COMPLIANCE_WIDTH) + qsfp_version_compliance = int(qsfp_version_compliance_raw[0], 16) + dom_capability = sfpi_obj.parse_qsfp_dom_capability(qsfp_dom_capability_raw, 0) + if qsfp_version_compliance >= 0x08: + self.dom_temp_supported = dom_capability['data']['Temp_support']['value'] == 'On' + self.dom_volt_supported = dom_capability['data']['Voltage_support']['value'] == 'On' + self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On' + self.dom_tx_power_supported = dom_capability['data']['Tx_power_support']['value'] == 'On' + else: + self.dom_temp_supported = True + self.dom_volt_supported = True + self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On' + self.dom_tx_power_supported = True + self.dom_supported = True + self.calibration = 1 + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + qsfp_option_value_raw = self._read_eeprom_specific_bytes(QSFP_OPTION_VALUE_OFFSET, QSFP_OPTION_VALUE_WIDTH) + if qsfp_option_value_raw is not None: + optional_capability = sfpd_obj.parse_option_params(qsfp_option_value_raw, 0) + self.dom_tx_disable_supported = optional_capability['data']['TxDisable']['value'] == 'On' + dom_status_indicator = sfpd_obj.parse_dom_status_indicator(qsfp_version_compliance_raw, 1) + self.qsfp_page3_available = dom_status_indicator['data']['FlatMem']['value'] == 'Off' + else: + self.dom_supported = False + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + self.calibration = 0 + self.qsfp_page3_available = False + elif self.sfp_type == "SFP": + sfpi_obj = sff8472InterfaceId() + if sfpi_obj is None: + return None + sfp_dom_capability_raw = self._read_eeprom_specific_bytes(XCVR_DOM_CAPABILITY_OFFSET, XCVR_DOM_CAPABILITY_WIDTH) + if sfp_dom_capability_raw is not None: + sfp_dom_capability = int(sfp_dom_capability_raw[0], 16) + self.dom_supported = (sfp_dom_capability & 0x40 != 0) + if self.dom_supported: + self.dom_temp_supported = True + self.dom_volt_supported = True + self.dom_rx_power_supported = True + self.dom_tx_power_supported = True + if sfp_dom_capability & 0x20 != 0: + self.calibration = 1 + elif sfp_dom_capability & 0x10 != 0: + self.calibration = 2 + else: + self.calibration = 0 + else: + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + self.calibration = 0 + self.dom_tx_disable_supported = (int(sfp_dom_capability_raw[1], 16) & 0x40 != 0) + else: + self.dom_supported = False + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + + + def _convert_string_to_num(self, value_str): + if "-inf" in value_str: + return 'N/A' + elif "Unknown" in value_str: + return 'N/A' + elif 'dBm' in value_str: + t_str = value_str.rstrip('dBm') + return float(t_str) + elif 'mA' in value_str: + t_str = value_str.rstrip('mA') + return float(t_str) + elif 'C' in value_str: + t_str = value_str.rstrip('C') + return float(t_str) + elif 'Volts' in value_str: + t_str = value_str.rstrip('Volts') + return float(t_str) + else: + return 'N/A' + + + def get_transceiver_info(self): + """ + Retrieves transceiver info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + type |1*255VCHAR |type of SFP + hardwarerev |1*255VCHAR |hardware version of SFP + serialnum |1*255VCHAR |serial number of the SFP + manufacturename |1*255VCHAR |SFP vendor name + modelname |1*255VCHAR |SFP model name + Connector |1*255VCHAR |connector information + encoding |1*255VCHAR |encoding information + ext_identifier |1*255VCHAR |extend identifier + ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance + cable_length |INT |cable length in m + mominal_bit_rate |INT |nominal bit rate by 100Mbs + specification_compliance |1*255VCHAR |specification compliance + vendor_date |1*255VCHAR |vendor date + vendor_oui |1*255VCHAR |vendor OUI + ======================================================================== + """ + transceiver_info_dict = {} + compliance_code_dict = {} + + # ToDo: OSFP tranceiver info parsing not fully supported. + # in inf8628.py lack of some memory map definition + # will be implemented when the inf8628 memory map ready + if self.sfp_type == OSFP_TYPE: + offset = 0 + vendor_rev_width = XCVR_HW_REV_WIDTH_OSFP + + sfpi_obj = inf8628InterfaceId() + if sfpi_obj is None: + return None + + sfp_type_raw = self._read_eeprom_specific_bytes((offset + OSFP_TYPE_OFFSET), XCVR_TYPE_WIDTH) + if sfp_type_raw is not None: + sfp_type_data = sfpi_obj.parse_sfp_type(sfp_type_raw, 0) + else: + return None + + sfp_vendor_name_raw = self._read_eeprom_specific_bytes((offset + OSFP_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) + if sfp_vendor_name_raw is not None: + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0) + else: + return None + + sfp_vendor_pn_raw = self._read_eeprom_specific_bytes((offset + OSFP_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) + if sfp_vendor_pn_raw is not None: + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0) + else: + return None + + sfp_vendor_rev_raw = self._read_eeprom_specific_bytes((offset + OSFP_HW_REV_OFFSET), vendor_rev_width) + if sfp_vendor_rev_raw is not None: + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0) + else: + return None + + sfp_vendor_sn_raw = self._read_eeprom_specific_bytes((offset + OSFP_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) + if sfp_vendor_sn_raw is not None: + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0) + else: + return None + + transceiver_info_dict['type'] = sfp_type_data['data']['type']['value'] + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] + transceiver_info_dict['vendor_oui'] = 'N/A' + transceiver_info_dict['vendor_date'] = 'N/A' + transceiver_info_dict['Connector'] = 'N/A' + transceiver_info_dict['encoding'] = 'N/A' + transceiver_info_dict['ext_identifier'] = 'N/A' + transceiver_info_dict['ext_rateselect_compliance'] = 'N/A' + transceiver_info_dict['cable_type'] = 'N/A' + transceiver_info_dict['cable_length'] = 'N/A' + transceiver_info_dict['specification_compliance'] = 'N/A' + transceiver_info_dict['nominal_bit_rate'] = 'N/A' + + else: + if self.sfp_type == QSFP_TYPE: + offset = 128 + vendor_rev_width = XCVR_HW_REV_WIDTH_QSFP + cable_length_width = XCVR_CABLE_LENGTH_WIDTH_QSFP + interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_QSFP + sfp_type = 'QSFP' + + sfpi_obj = sff8436InterfaceId() + if sfpi_obj is None: + print("Error: sfp_object open failed") + return None + + else: + offset = 0 + vendor_rev_width = XCVR_HW_REV_WIDTH_SFP + cable_length_width = XCVR_CABLE_LENGTH_WIDTH_SFP + interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_SFP + sfp_type = 'SFP' + + sfpi_obj = sff8472InterfaceId() + if sfpi_obj is None: + print("Error: sfp_object open failed") + return None + + sfp_interface_bulk_raw = self._read_eeprom_specific_bytes(offset + XCVR_INTERFACE_DATA_START, XCVR_INTERFACE_DATA_SIZE) + if sfp_interface_bulk_raw is None: + return None + + start = XCVR_INTFACE_BULK_OFFSET - XCVR_INTERFACE_DATA_START + end = start + interface_info_bulk_width + sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw[start : end], 0) + + start = XCVR_VENDOR_NAME_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_NAME_WIDTH + sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_interface_bulk_raw[start : end], 0) + + start = XCVR_VENDOR_PN_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_PN_WIDTH + sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_interface_bulk_raw[start : end], 0) + + start = XCVR_HW_REV_OFFSET - XCVR_INTERFACE_DATA_START + end = start + vendor_rev_width + sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_interface_bulk_raw[start : end], 0) + + start = XCVR_VENDOR_SN_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_SN_WIDTH + sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_interface_bulk_raw[start : end], 0) + + start = XCVR_VENDOR_OUI_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_OUI_WIDTH + sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_interface_bulk_raw[start : end], 0) + + start = XCVR_VENDOR_DATE_OFFSET - XCVR_INTERFACE_DATA_START + end = start + XCVR_VENDOR_DATE_WIDTH + sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_interface_bulk_raw[start : end], 0) + + transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] + transceiver_info_dict['manufacturename'] = sfp_vendor_name_data['data']['Vendor Name']['value'] + transceiver_info_dict['modelname'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] + transceiver_info_dict['hardwarerev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] + transceiver_info_dict['serialnum'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] + transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] + transceiver_info_dict['vendor_date'] = sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] + transceiver_info_dict['Connector'] = sfp_interface_bulk_data['data']['Connector']['value'] + transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] + transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] + transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] + + if self.sfp_type == QSFP_TYPE: + for key in qsfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + + for key in qsfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value']) + else: + for key in sfp_cable_length_tup: + if key in sfp_interface_bulk_data['data']: + transceiver_info_dict['cable_type'] = key + transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value']) + + for key in sfp_compliance_code_tup: + if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: + compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] + transceiver_info_dict['specification_compliance'] = str(compliance_code_dict) + + transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['NominalSignallingRate(UnitsOf100Mbd)']['value']) + + return transceiver_info_dict + + + def get_transceiver_bulk_status(self): + """ + Retrieves transceiver bulk status of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + RX LOS |BOOLEAN |RX lost-of-signal status, + | |True if has RX los, False if not. + TX FAULT |BOOLEAN |TX fault status, + | |True if has TX fault, False if not. + Reset status |BOOLEAN |reset status, + | |True if SFP in reset, False if not. + LP mode |BOOLEAN |low power mode status, + | |True in lp mode, False if not. + TX disable |BOOLEAN |TX disable status, + | |True TX disabled, False if not. + TX disabled channel |HEX |disabled TX channles in hex, + | |bits 0 to 3 represent channel 0 + | |to channel 3. + Temperature |INT |module temperature in Celsius + Voltage |INT |supply voltage in mV + TX bias |INT |TX Bias Current in mA + RX power |INT |received optical power in mW + TX power |INT |TX output power in mW + ======================================================================== + """ + transceiver_dom_info_dict = {} + + dom_info_dict_keys = ['temperature', 'voltage', + 'rx1power', 'rx2power', + 'rx3power', 'rx4power', + 'tx1bias', 'tx2bias', + 'tx3bias', 'tx4bias', + 'tx1power', 'tx2power', + 'tx3power', 'tx4power' + ] + transceiver_dom_info_dict = dict.fromkeys(dom_info_dict_keys, 'N/A') + + if self.sfp_type == OSFP_TYPE: + pass + + elif self.sfp_type == QSFP_TYPE: + if not self.dom_supported: + return transceiver_dom_info_dict + + offset = 0 + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return transceiver_dom_info_dict + + dom_data_raw = self._read_eeprom_specific_bytes((offset + QSFP_DOM_BULK_DATA_START), QSFP_DOM_BULK_DATA_SIZE) + if dom_data_raw is None: + return transceiver_dom_info_dict + + if self.dom_temp_supported: + start = QSFP_TEMPE_OFFSET - QSFP_DOM_BULK_DATA_START + end = start + QSFP_TEMPE_WIDTH + dom_temperature_data = sfpd_obj.parse_temperature(dom_data_raw[start : end], 0) + temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value']) + if temp is not None: + transceiver_dom_info_dict['temperature'] = temp + + if self.dom_volt_supported: + start = QSFP_VOLT_OFFSET - QSFP_DOM_BULK_DATA_START + end = start + QSFP_VOLT_WIDTH + dom_voltage_data = sfpd_obj.parse_voltage(dom_data_raw[start : end], 0) + volt = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value']) + if volt is not None: + transceiver_dom_info_dict['voltage'] = volt + + start = QSFP_CHANNL_MON_OFFSET - QSFP_DOM_BULK_DATA_START + end = start + QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_data_raw[start : end], 0) + + if self.dom_tx_power_supported: + transceiver_dom_info_dict['tx1power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX1Power']['value']) + transceiver_dom_info_dict['tx2power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX2Power']['value']) + transceiver_dom_info_dict['tx3power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX3Power']['value']) + transceiver_dom_info_dict['tx4power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX4Power']['value']) + + if self.dom_rx_power_supported: + transceiver_dom_info_dict['rx1power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX1Power']['value']) + transceiver_dom_info_dict['rx2power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX2Power']['value']) + transceiver_dom_info_dict['rx3power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX3Power']['value']) + transceiver_dom_info_dict['rx4power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX4Power']['value']) + + transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value'] + transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value'] + transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value'] + transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value'] + + else: + if not self.dom_supported: + return transceiver_dom_info_dict + + offset = 256 + sfpd_obj = sff8472Dom() + if sfpd_obj is None: + return transceiver_dom_info_dict + sfpd_obj._calibration_type = self.calibration + + dom_data_raw = self._read_eeprom_specific_bytes((offset + SFP_DOM_BULK_DATA_START), SFP_DOM_BULK_DATA_SIZE) + + start = SFP_TEMPE_OFFSET - SFP_DOM_BULK_DATA_START + end = start + SFP_TEMPE_WIDTH + dom_temperature_data = sfpd_obj.parse_temperature(dom_data_raw[start: end], 0) + + start = SFP_VOLT_OFFSET - SFP_DOM_BULK_DATA_START + end = start + SFP_VOLT_WIDTH + dom_voltage_data = sfpd_obj.parse_voltage(dom_data_raw[start: end], 0) + + start = SFP_CHANNL_MON_OFFSET - SFP_DOM_BULK_DATA_START + end = start + SFP_CHANNL_MON_WIDTH + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_data_raw[start: end], 0) + + transceiver_dom_info_dict['temperature'] = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value']) + transceiver_dom_info_dict['voltage'] = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value']) + transceiver_dom_info_dict['rx1power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RXPower']['value']) + transceiver_dom_info_dict['tx1bias'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TXBias']['value']) + transceiver_dom_info_dict['tx1power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TXPower']['value']) + + return transceiver_dom_info_dict + + + def get_transceiver_threshold_info(self): + """ + Retrieves transceiver threshold info of this SFP + + Returns: + A dict which contains following keys/values : + ======================================================================== + keys |Value Format |Information + ---------------------------|---------------|---------------------------- + temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. + templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. + temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. + templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. + vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. + vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. + vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. + vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. + rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. + rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. + rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. + rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. + txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. + txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. + txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. + txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. + txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. + txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. + txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. + txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. + ======================================================================== + """ + transceiver_dom_threshold_info_dict = {} + + dom_info_dict_keys = ['temphighalarm', 'temphighwarning', + 'templowalarm', 'templowwarning', + 'vcchighalarm', 'vcchighwarning', + 'vcclowalarm', 'vcclowwarning', + 'rxpowerhighalarm', 'rxpowerhighwarning', + 'rxpowerlowalarm', 'rxpowerlowwarning', + 'txpowerhighalarm', 'txpowerhighwarning', + 'txpowerlowalarm', 'txpowerlowwarning', + 'txbiashighalarm', 'txbiashighwarning', + 'txbiaslowalarm', 'txbiaslowwarning' + ] + transceiver_dom_threshold_info_dict = dict.fromkeys(dom_info_dict_keys, 'N/A') + + if self.sfp_type == OSFP_TYPE: + pass + + elif self.sfp_type == QSFP_TYPE: + if not self.dom_supported or not self.qsfp_page3_available: + return transceiver_dom_threshold_info_dict + + # Dom Threshold data starts from offset 384 + # Revert offset back to 0 once data is retrieved + offset = QSFP_MODULE_UPPER_PAGE3_START + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return transceiver_dom_threshold_info_dict + + dom_module_threshold_raw = self._read_eeprom_specific_bytes((offset + QSFP_MODULE_THRESHOLD_OFFSET), QSFP_MODULE_THRESHOLD_WIDTH) + if dom_module_threshold_raw is None: + return transceiver_dom_threshold_info_dict + + dom_module_threshold_data = sfpd_obj.parse_module_threshold_values(dom_module_threshold_raw, 0) + + dom_channel_threshold_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_THRESHOLD_OFFSET), + QSFP_CHANNL_THRESHOLD_WIDTH) + if dom_channel_threshold_raw is None: + return transceiver_dom_threshold_info_dict + dom_channel_threshold_data = sfpd_obj.parse_channel_threshold_values(dom_channel_threshold_raw, 0) + + # Threshold Data + transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] + transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] + transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] + transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] + transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VccHighAlarm']['value'] + transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VccHighWarning']['value'] + transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VccLowAlarm']['value'] + transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VccLowWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_channel_threshold_data['data']['RxPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_channel_threshold_data['data']['RxPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_channel_threshold_data['data']['RxPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_channel_threshold_data['data']['RxPowerLowWarning']['value'] + transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_channel_threshold_data['data']['TxBiasHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_channel_threshold_data['data']['TxBiasHighWarning']['value'] + transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_channel_threshold_data['data']['TxBiasLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_channel_threshold_data['data']['TxBiasLowWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_channel_threshold_data['data']['TxPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_channel_threshold_data['data']['TxPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_channel_threshold_data['data']['TxPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_channel_threshold_data['data']['TxPowerLowWarning']['value'] + + else: + offset = SFP_MODULE_ADDRA2_OFFSET + + if not self.dom_supported: + return transceiver_dom_threshold_info_dict + + sfpd_obj = sff8472Dom(None, self.calibration) + if sfpd_obj is None: + return transceiver_dom_threshold_info_dict + + dom_module_threshold_raw = self._read_eeprom_specific_bytes((offset + SFP_MODULE_THRESHOLD_OFFSET), + SFP_MODULE_THRESHOLD_WIDTH) + if dom_module_threshold_raw is not None: + dom_module_threshold_data = sfpd_obj.parse_alarm_warning_threshold(dom_module_threshold_raw, 0) + else: + return transceiver_dom_threshold_info_dict + + # Threshold Data + transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] + transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] + transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] + transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] + transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VoltageHighAlarm']['value'] + transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VoltageLowAlarm']['value'] + transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VoltageHighWarning']['value'] + transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VoltageLowWarning']['value'] + transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_module_threshold_data['data']['BiasHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_module_threshold_data['data']['BiasLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_module_threshold_data['data']['BiasHighWarning']['value'] + transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_module_threshold_data['data']['BiasLowWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_module_threshold_data['data']['TXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_module_threshold_data['data']['TXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_module_threshold_data['data']['TXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_module_threshold_data['data']['TXPowerLowWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_module_threshold_data['data']['RXPowerHighAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_module_threshold_data['data']['RXPowerLowAlarm']['value'] + transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_module_threshold_data['data']['RXPowerHighWarning']['value'] + transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_module_threshold_data['data']['RXPowerLowWarning']['value'] + + return transceiver_dom_threshold_info_dict + + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + + Returns: + A Boolean, True if reset enabled, False if disabled + + for QSFP, originally I would like to make use of Initialization complete flag bit + which is at Page a0 offset 6 bit 0 to test whether reset is complete. + However as unit testing was carried out I find this approach may fail because: + 1. we make use of ethtool to read data on I2C bus rather than to read directly + 2. ethtool is unable to access I2C during QSFP module being reset + In other words, whenever the flag is able to be retrived, the value is always be 1 + As a result, it doesn't make sense to retrieve that flag. Just treat successfully + retrieving data as "data ready". + for SFP it seems that there is not flag indicating whether reset succeed. However, + we can also do it in the way for QSFP. + """ + if not self.dom_supported: + return False + + if self.sfp_type == OSFP_TYPE: + return False + elif self.sfp_type == QSFP_TYPE: + offset = 0 + sfpd_obj = sff8436Dom() + dom_module_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_MODULE_MONITOR_OFFSET), QSFP_MODULE_MONITOR_WIDTH) + + if dom_module_monitor_raw is not None: + return True + else: + return False + elif self.sfp_type == SFP_TYPE: + offset = 0 + sfpd_obj = sff8472Dom() + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) + + if dom_channel_monitor_raw is not None: + return True + else: + return False + + + def get_rx_los(self): + """ + Retrieves the RX LOS (lost-of-signal) status of SFP + + Returns: + A Boolean, True if SFP has RX LOS, False if not. + Note : RX LOS status is latched until a call to get_rx_los or a reset. + """ + if not self.dom_supported: + return None + + rx_los_list = [] + if self.sfp_type == OSFP_TYPE: + return None + elif self.sfp_type == QSFP_TYPE: + offset = 0 + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_RX_LOS_STATUS_OFFSET), QSFP_CHANNL_RX_LOS_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + rx_los_data = int(dom_channel_monitor_raw[0], 16) + rx_los_list.append(rx_los_data & 0x01 != 0) + rx_los_list.append(rx_los_data & 0x02 != 0) + rx_los_list.append(rx_los_data & 0x04 != 0) + rx_los_list.append(rx_los_data & 0x08 != 0) + else: + offset = 256 + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + rx_los_data = int(dom_channel_monitor_raw[0], 16) + rx_los_list.append(rx_los_data & 0x02 != 0) + else: + return None + return rx_los_list + + + def get_tx_fault(self): + """ + Retrieves the TX fault status of SFP + + Returns: + A Boolean, True if SFP has TX fault, False if not + Note : TX fault status is lached until a call to get_tx_fault or a reset. + """ + if not self.dom_supported: + return None + + tx_fault_list = [] + if self.sfp_type == OSFP_TYPE: + return None + elif self.sfp_type == QSFP_TYPE: + offset = 0 + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_TX_FAULT_STATUS_OFFSET), QSFP_CHANNL_TX_FAULT_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + tx_fault_data = int(dom_channel_monitor_raw[0], 16) + tx_fault_list.append(tx_fault_data & 0x01 != 0) + tx_fault_list.append(tx_fault_data & 0x02 != 0) + tx_fault_list.append(tx_fault_data & 0x04 != 0) + tx_fault_list.append(tx_fault_data & 0x08 != 0) + else: + offset = 256 + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + tx_fault_data = int(dom_channel_monitor_raw[0], 16) + tx_fault_list.append(tx_fault_data & 0x04 != 0) + else: + return None + return tx_fault_list + + + def get_tx_disable(self): + """ + Retrieves the tx_disable status of this SFP + + Returns: + A Boolean, True if tx_disable is enabled, False if disabled + + for QSFP, the disable states of each channel which are the lower 4 bits in byte 85 page a0 + for SFP, the TX Disable State and Soft TX Disable Select is ORed as the tx_disable status returned + These two bits are bit 7 & 6 in byte 110 page a2 respectively + """ + if not self.dom_supported: + return None + + tx_disable_list = [] + if self.sfp_type == OSFP_TYPE: + return None + elif self.sfp_type == QSFP_TYPE: + offset = 0 + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_DISABLE_STATUS_OFFSET), QSFP_CHANNL_DISABLE_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + tx_disable_data = int(dom_channel_monitor_raw[0], 16) + tx_disable_list.append(tx_disable_data & 0x01 != 0) + tx_disable_list.append(tx_disable_data & 0x02 != 0) + tx_disable_list.append(tx_disable_data & 0x04 != 0) + tx_disable_list.append(tx_disable_data & 0x08 != 0) + else: + offset = 256 + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) + if dom_channel_monitor_raw is not None: + tx_disable_data = int(dom_channel_monitor_raw[0], 16) + tx_disable_list.append(tx_disable_data & 0xC0 != 0) + else: + return None + return tx_disable_list + + + def get_tx_disable_channel(self): + """ + Retrieves the TX disabled channels in this SFP + + Returns: + A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent + TX channels which have been disabled in this SFP. + As an example, a returned value of 0x5 indicates that channel 0 + and channel 2 have been disabled. + """ + tx_disable_list = self.get_tx_disable() + if tx_disable_list is None: + return 0 + tx_disabled = 0 + for i in range(len(tx_disable_list)): + if tx_disable_list[i]: + tx_disabled |= 1 << i + return tx_disabled + + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + if self.sfp_type == QSFP_TYPE: + if self._open_sdk(): + # Get MCION + mcion = ku_mcion_reg() + mcion.module = self.sdk_index + meta = self._init_sx_meta_data() + meta.access_cmd = SXD_ACCESS_CMD_GET + + rc = sxd_access_reg_mcion(mcion, meta, REGISTER_NUM, None, None) + self._close_sdk() + + if rc != SXD_STATUS_SUCCESS: + logger.log_warning("sxd_access_reg_mcion getting failed, rc = %d" % rc) + return None + + # Get low power mode status + lpm_mask = 1 << 8 + lpm_status = (lpm_mask & mcion.module_status_bits) != 0 + + return lpm_status + else: + return NotImplementedError + + + def get_power_override(self): + """ + Retrieves the power-override status of this SFP + + Returns: + A Boolean, True if power-override is enabled, False if disabled + """ + if self.sfp_type == QSFP_TYPE: + offset = 0 + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return False + + dom_control_raw = self._read_eeprom_specific_bytes((offset + QSFP_CONTROL_OFFSET), QSFP_CONTROL_WIDTH) + if dom_control_raw is not None: + dom_control_data = sfpd_obj.parse_control_bytes(dom_control_raw, 0) + return ('On' == dom_control_data['data']['PowerOverride']) + else: + return NotImplementedError + + + def get_temperature(self): + """ + Retrieves the temperature of this SFP + + Returns: + An integer number of current temperature in Celsius + """ + if not self.dom_supported: + return None + if self.sfp_type == QSFP_TYPE: + offset = 0 + offset_xcvr = 128 + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + + if self.dom_temp_supported: + dom_temperature_raw = self._read_eeprom_specific_bytes((offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value']) + return temp + else: + return None + else: + return None + else: + offset = 256 + sfpd_obj = sff8472Dom() + if sfpd_obj is None: + return None + sfpd_obj._calibration_type = 1 + + dom_temperature_raw = self._read_eeprom_specific_bytes((offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value']) + return temp + else: + return None + + + def get_voltage(self): + """ + Retrieves the supply voltage of this SFP + + Returns: + An integer number of supply voltage in mV + """ + if not self.dom_supported: + return None + if self.sfp_type == QSFP_TYPE: + offset = 0 + offset_xcvr = 128 + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + + if self.dom_volt_supported: + dom_voltage_raw = self._read_eeprom_specific_bytes((offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + voltage = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value']) + return voltage + else: + return None + return None + else: + offset = 256 + + sfpd_obj = sff8472Dom() + if sfpd_obj is None: + return None + + sfpd_obj._calibration_type = self.calibration + + dom_voltage_raw = self._read_eeprom_specific_bytes((offset + SFP_VOLT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + voltage = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value']) + return voltage + else: + return None + + + def get_tx_bias(self): + """ + Retrieves the TX bias current of this SFP + + Returns: + A list of four integer numbers, representing TX bias in mA + for channel 0 to channel 4. + Ex. ['110.09', '111.12', '108.21', '112.09'] + """ + tx_bias_list = [] + if self.sfp_type == QSFP_TYPE: + offset = 0 + offset_xcvr = 128 + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0) + tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX1Bias']['value'])) + tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX2Bias']['value'])) + tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX3Bias']['value'])) + tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX4Bias']['value'])) + else: + offset = 256 + + sfpd_obj = sff8472Dom() + if sfpd_obj is None: + return None + sfpd_obj._calibration_type = self.calibration + + if self.dom_supported: + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TXBias']['value'])) + else: + return None + else: + return None + + return tx_bias_list + + + def get_rx_power(self): + """ + Retrieves the received optical power for this SFP + + Returns: + A list of four integer numbers, representing received optical + power in mW for channel 0 to channel 4. + Ex. ['1.77', '1.71', '1.68', '1.70'] + """ + rx_power_list = [] + if self.sfp_type == OSFP_TYPE: + # OSFP not supported on our platform yet. + return None + + elif self.sfp_type == QSFP_TYPE: + offset = 0 + offset_xcvr = 128 + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + + if self.dom_rx_power_supported: + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0) + rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX1Power']['value'])) + rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX2Power']['value'])) + rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX3Power']['value'])) + rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX4Power']['value'])) + else: + return None + else: + return None + else: + offset = 256 + + sfpd_obj = sff8472Dom() + if sfpd_obj is None: + return None + + if self.dom_supported: + sfpd_obj._calibration_type = self.calibration + + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RXPower']['value'])) + else: + return None + else: + return None + return rx_power_list + + + def get_tx_power(self): + """ + Retrieves the TX power of this SFP + + Returns: + A list of four integer numbers, representing TX power in mW + for channel 0 to channel 4. + Ex. ['1.86', '1.86', '1.86', '1.86'] + """ + tx_power_list = [] + if self.sfp_type == OSFP_TYPE: + # OSFP not supported on our platform yet. + return None + + elif self.sfp_type == QSFP_TYPE: + offset = 0 + offset_xcvr = 128 + + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + + if self.dom_tx_power_supported: + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0) + tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX1Power']['value'])) + tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX2Power']['value'])) + tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX3Power']['value'])) + tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX4Power']['value'])) + else: + return None + else: + return None + else: + offset = 256 + sfpd_obj = sff8472Dom() + if sfpd_obj is None: + return None + + if self.dom_supported: + sfpd_obj._calibration_type = self.calibration + + dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TXPower']['value'])) + else: + return None + else: + return None + return tx_power_list + + + def reset(self): + """ + Reset SFP and return all user module settings to their default state. + + Returns: + A boolean, True if successful, False if not + + refer plugins/sfpreset.py + """ + handle = self._open_sdk() + if handle is None: + return False + + # Get PMAOS + pmaos = ku_pmaos_reg() + pmaos.module = self.sdk_index + meta = self._init_sx_meta_data() + meta.access_cmd = SXD_ACCESS_CMD_GET + + rc = sxd_access_reg_pmaos(pmaos, meta, REGISTER_NUM, None, None) + if rc != SXD_STATUS_SUCCESS: + logger.log_warning("sxd_access_reg_pmaos getting failed, rc = %d" % rc) + self._close_sdk() + return None + + # Reset SFP + pmaos.rst = 1 + meta.access_cmd = SXD_ACCESS_CMD_SET + rc = sxd_access_reg_pmaos(pmaos, meta, REGISTER_NUM, None, None) + if rc != SXD_STATUS_SUCCESS: + logger.log_warning("sxd_access_reg_pmaos setting failed, rc = %d" % rc) + + self._close_sdk() + return rc == SXD_STATUS_SUCCESS + + + def _write_i2c_via_mcia(self, page, i2caddr, address, data, mask): + handle = self._open_sdk() + if handle is None: + return False + + mcia = ku_mcia_reg() + + meta = self._init_sx_meta_data() + meta.access_cmd = SXD_ACCESS_CMD_GET + + mcia.module = self.sdk_index + mcia.page_number = page + mcia.i2c_device_address = i2caddr + mcia.device_address = address + mcia.size = 1 + rc = sxd_access_reg_mcia(mcia, meta, REGISTER_NUM, None, None) + if rc != SXD_STATUS_SUCCESS: + logger.log_warning("sxd_access_reg_mcia getting failed, rc = %d" % rc) + self._close_sdk() + return False + + original_data = (mcia.dword_0 >> 24) & 0x000000FF + updated_data = original_data & (~mask) + updated_data |= (data & mask) + + mcia.dword_0 = (updated_data << 24) & 0xFF000000 + meta.access_cmd = SXD_ACCESS_CMD_SET + rc = sxd_access_reg_mcia(mcia, meta, REGISTER_NUM, None, None) + if rc != SXD_STATUS_SUCCESS: + logger.log_warning("sxd_access_reg_mcia setting failed, rc = %d" % rc) + + self._close_sdk() + return rc == SXD_STATUS_SUCCESS + + + def tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels + + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + + Returns: + A boolean, True if tx_disable is set successfully, False if not + + for SFP, make use of bit 6 of byte at (offset 110, a2h (i2c addr 0x51)) to disable/enable tx + for QSFP, set all channels to disable/enable tx + """ + if self.sfp_type == SFP_TYPE: + if self.dom_tx_disable_supported: + handle = self._open_sdk() + if handle is None: + return False + + tx_disable_mask = 1 << MCIA_ADDR_TX_DISABLE_BIT + if tx_disable: + tx_disable_bit = tx_disable_mask + else: + tx_disable_bit = 0 + + return self._write_i2c_via_mcia(2, 0x51, MCIA_ADDR_TX_DISABLE, tx_disable_bit, tx_disable_mask) + else: + return False + elif self.sfp_type == QSFP_TYPE: + if self.dom_tx_disable_supported: + channel_mask = 0x0f + if tx_disable: + disable_flag = channel_mask + else: + disable_flag = 0 + + return self._write_i2c_via_mcia(0, 0x50, MCIA_ADDR_TX_CHANNEL_DISABLE, disable_flag, channel_mask) + else: + return False + else: + return NotImplementedError + + + def tx_disable_channel(self, channel, disable): + """ + Sets the tx_disable for specified SFP channels + + Args: + channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, + e.g. 0x5 for channel 0 and channel 2. + disable : A boolean, True to disable TX channels specified in channel, + False to enable + + Returns: + A boolean, True if successful, False if not + + QSFP: page a0, address 86, lower 4 bits + """ + if self.sfp_type == QSFP_TYPE: + if self.dom_tx_disable_supported: + channel_mask = 1 << channel + if disable: + disable_flag = channel_mask + else: + disable_flag = 0 + + return self._write_i2c_via_mcia(0, 0x50, MCIA_ADDR_TX_CHANNEL_DISABLE, disable_flag, channel_mask) + else: + return False + else: + return NotImplementedError + + + def is_nve(self, port): + return (port & NVE_MASK) != 0 + + + def is_port_admin_status_up(self, log_port): + oper_state_p = new_sx_port_oper_state_t_p() + admin_state_p = new_sx_port_admin_state_t_p() + module_state_p = new_sx_port_module_state_t_p() + rc = sx_api_port_state_get(self.sdk_handle, log_port, oper_state_p, admin_state_p, module_state_p) + assert rc == SXD_STATUS_SUCCESS, "sx_api_port_state_get failed, rc = %d" % rc + + admin_state = sx_port_admin_state_t_p_value(admin_state_p) + if admin_state == SX_PORT_ADMIN_STATUS_UP: + return True + else: + return False + + + def set_port_admin_status_by_log_port(self, log_port, admin_status): + rc = sx_api_port_state_set(self.sdk_handle, log_port, admin_status) + assert rc == SX_STATUS_SUCCESS, "sx_api_port_state_set failed, rc = %d" % rc + + + # Get all the ports related to the sfp, if port admin status is up, put it to list + def get_log_ports(self): + port_attributes_list = new_sx_port_attributes_t_arr(SX_PORT_ATTR_ARR_SIZE) + port_cnt_p = new_uint32_t_p() + uint32_t_p_assign(port_cnt_p, SX_PORT_ATTR_ARR_SIZE) + + rc = sx_api_port_device_get(self.sdk_handle, DEVICE_ID , SWITCH_ID, port_attributes_list, port_cnt_p) + assert rc == SX_STATUS_SUCCESS, "sx_api_port_device_get failed, rc = %d" % rc + + port_cnt = uint32_t_p_value(port_cnt_p) + log_port_list = [] + for i in range(0, port_cnt): + port_attributes = sx_port_attributes_t_arr_getitem(port_attributes_list, i) + if self.is_nve(int(port_attributes.log_port)) == False \ + and port_attributes.port_mapping.module_port == self.sdk_index \ + and self.is_port_admin_status_up(port_attributes.log_port): + log_port_list.append(port_attributes.log_port) + + return log_port_list + + + def _set_sfp_admin_status_raw(self, admin_status): + # Get PMAOS + pmaos = ku_pmaos_reg() + pmaos.module = self.sdk_index + meta = self._init_sx_meta_data() + meta.access_cmd = SXD_ACCESS_CMD_GET + rc = sxd_access_reg_pmaos(pmaos, meta, REGISTER_NUM, None, None) + assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmaos failed, rc = %d" % rc + + # Set admin status to PMAOS + pmaos.ase = PMAOS_ASE + pmaos.ee = PMAOS_EE + pmaos.e = PMAOS_E + pmaos.rst = PMAOS_RST + if admin_status == SX_PORT_ADMIN_STATUS_DOWN: + pmaos.admin_status = PMAOS_DISABLE + else: + pmaos.admin_status = PMAOS_ENABLE + + meta.access_cmd = SXD_ACCESS_CMD_SET + rc = sxd_access_reg_pmaos(pmaos, meta, REGISTER_NUM, None, None) + assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmaos failed, rc = %d" % rc + + + def _set_lpmode_raw(self, lpmode): + # Get PMMP + pmmp = ku_pmmp_reg() + pmmp.module = self.sdk_index + meta = self._init_sx_meta_data() + meta.access_cmd = SXD_ACCESS_CMD_GET + rc = sxd_access_reg_pmmp(pmmp, meta, REGISTER_NUM, None, None) + assert rc == SXD_STATUS_SUCCESS, "sxd_access_reg_pmmp failed, rc = %d" % rc + + # Set low power mode status + lpm_mask = 1 << PMMP_LPMODE_BIT + if lpmode: + pmmp.eeprom_override = pmmp.eeprom_override | lpm_mask + else: + pmmp.eeprom_override = pmmp.eeprom_override & (~lpm_mask) + + meta.access_cmd = SXD_ACCESS_CMD_SET + rc = sxd_access_reg_pmmp(pmmp, meta, REGISTER_NUM, None, None) + + return rc + + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + handle = self._open_sdk() + if handle is None: + return False + try: + log_port_list = self.get_log_ports() + for log_port in log_port_list: + self.set_port_admin_status_by_log_port(log_port, SX_PORT_ADMIN_STATUS_DOWN) + self._set_sfp_admin_status_raw(SX_PORT_ADMIN_STATUS_DOWN) + + result = self._set_lpmode_raw(lpmode) + + self._set_sfp_admin_status_raw(SX_PORT_ADMIN_STATUS_UP) + for log_port in log_port_list: + self.set_port_admin_status_by_log_port(log_port, SX_PORT_ADMIN_STATUS_DOWN) + + return result == SXD_STATUS_SUCCESS + except: + logger.log_warning("set_lpmode failed due to some SDK failure") + self._close_sdk() + return False + + + def set_power_override(self, power_override, power_set): + """ + Sets SFP power level using power_override and power_set + + Args: + power_override : + A Boolean, True to override set_lpmode and use power_set + to control SFP power, False to disable SFP power control + through power_override/power_set and use set_lpmode + to control SFP power. + power_set : + Only valid when power_override is True. + A Boolean, True to set SFP to low power mode, False to set + SFP to high power mode. + + Returns: + A boolean, True if power-override and power_set are set successfully, + False if not + """ + if self.sfp_type == QSFP_TYPE: + power_override_bit = 0 + if power_override: + power_override_bit |= 1 << MCIA_ADDR_POWER_OVERRIDE_POR_BIT + power_set_bit = 0 + if power_set: + power_set_bit |= 1 << MCIA_ADDR_POWER_OVERRIDE_PS_BIT + power_override_mask = 1 << MCIA_ADDR_POWER_OVERRIDE_PS_BIT | 1 << MCIA_ADDR_POWER_OVERRIDE_POR_BIT + + return self._write_i2c_via_mcia(0, 0x50, MCIA_ADDR_POWER_OVERRIDE, power_set_bit|power_override_bit, power_override_mask) + else: + return NotImplementedError diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp_event.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp_event.py new file mode 100644 index 00000000000..e92884fc3f3 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp_event.py @@ -0,0 +1,250 @@ +#!/usr/bin/env python +''' +listen to the SDK for the SFP change event and return to chassis. +''' + +from __future__ import print_function +import sys, errno +import os +import time +import select +from python_sdk_api.sx_api import * +from sonic_daemon_base.daemon_base import Logger + +SDK_SFP_STATE_IN = 0x1 +SDK_SFP_STATE_OUT = 0x2 +STATUS_PLUGIN = '1' +STATUS_PLUGOUT = '0' +STATUS_UNKNOWN = '2' + +sfp_value_status_dict = { + SDK_SFP_STATE_IN: STATUS_PLUGIN, + SDK_SFP_STATE_OUT: STATUS_PLUGOUT, +} + +# system level event/error +EVENT_ON_ALL_SFP = '-1' +SYSTEM_NOT_READY = 'system_not_ready' +SYSTEM_READY = 'system_become_ready' +SYSTEM_FAIL = 'system_fail' + +SDK_DAEMON_READY_FILE = '/tmp/sdk_ready' + +PMPE_PACKET_SIZE = 2000 + +logger = Logger() + +class sfp_event: + ''' Listen to plugin/plugout cable events ''' + + SX_OPEN_RETRIES = 30 + SX_OPEN_TIMEOUT = 5 + SELECT_TIMEOUT = 1 + + def __init__(self): + self.swid = 0 + self.handle = None + + # Allocate SDK fd and user channel structures + self.rx_fd_p = new_sx_fd_t_p() + self.user_channel_p = new_sx_user_channel_t_p() + + def initialize(self): + swid_cnt_p = None + + try: + # Wait for SDK daemon to be started with detect the sdk_ready file + retry = 0 + while not os.path.exists(SDK_DAEMON_READY_FILE): + if retry >= self.SX_OPEN_RETRIES: + raise RuntimeError("SDK daemon failed to start after {} retries and {} seconds waiting, exiting..." + .format(retry, self.SX_OPEN_TIMEOUT * self.SX_OPEN_RETRIES)) + else: + logger.log_info("SDK daemon not started yet, retry {} times".format(retry)) + retry += 1 + time.sleep(self.SX_OPEN_TIMEOUT) + + # After SDK daemon started, sx_api_open and sx_api_host_ifc_open is ready for call + rc, self.handle = sx_api_open(None) + if rc != SX_STATUS_SUCCESS: + raise RuntimeError("failed to call sx_api_open with rc {}, exiting...".format(rc)) + + rc = sx_api_host_ifc_open(self.handle, self.rx_fd_p) + if rc != SX_STATUS_SUCCESS: + raise RuntimeError("failed to call sx_api_host_ifc_open with rc {}, exiting...".format(rc)) + + self.user_channel_p.type = SX_USER_CHANNEL_TYPE_FD + self.user_channel_p.channel.fd = self.rx_fd_p + + # Wait for switch to be created and initialized inside SDK + retry = 0 + swid_cnt_p = new_uint32_t_p() + uint32_t_p_assign(swid_cnt_p, 0) + swid_cnt = 0 + while True: + if retry >= self.SX_OPEN_RETRIES: + raise RuntimeError("switch not created after {} retries and {} seconds waiting, exiting..." + .format(retry, self.SX_OPEN_RETRIES * self.SX_OPEN_TIMEOUT)) + else: + rc = sx_api_port_swid_list_get(self.handle, None, swid_cnt_p) + if rc == SX_STATUS_SUCCESS: + swid_cnt = uint32_t_p_value(swid_cnt_p) + if swid_cnt > 0: + delete_uint32_t_p(swid_cnt_p) + swid_cnt_p = None + break + else: + logger.log_info("switch not created yet, swid_cnt {}, retry {} times and wait for {} seconds" + .format(swid_cnt, retry, self.SX_OPEN_TIMEOUT * retry)) + else: + raise RuntimeError("sx_api_port_swid_list_get fail with rc {}, retry {} times and wait for {} seconds". + format(rc, retry, self.SX_OPEN_TIMEOUT * retry)) + + retry += 1 + time.sleep(self.SX_OPEN_TIMEOUT) + + # After switch was created inside SDK, sx_api_host_ifc_trap_id_register_set is ready to call + rc = sx_api_host_ifc_trap_id_register_set(self.handle, + SX_ACCESS_CMD_REGISTER, + self.swid, + SX_TRAP_ID_PMPE, + self.user_channel_p) + + if rc != SX_STATUS_SUCCESS: + raise RuntimeError("sx_api_host_ifc_trap_id_register_set failed with rc {}, exiting...".format(rc)) + except Exception as e: + logger.log_error("sfp_event initialization failed due to {}, exiting...".format(repr(e))) + if swid_cnt_p is not None: + delete_uint32_t_p(swid_cnt_p) + self.deinitialize() + + def deinitialize(self): + if self.handle is None: + return + + # unregister trap id + rc = sx_api_host_ifc_trap_id_register_set(self.handle, + SX_ACCESS_CMD_DEREGISTER, + self.swid, + SX_TRAP_ID_PMPE, + self.user_channel_p) + if rc != SX_STATUS_SUCCESS: + logger.log_error("sx_api_host_ifc_trap_id_register_set exited with error, rc {}".format(rc)) + + rc = sx_api_host_ifc_close(self.handle, self.rx_fd_p) + if rc != SX_STATUS_SUCCESS: + logger.log_error("sx_api_host_ifc_close exited with error, rc {}".format(rc)) + + rc = sx_api_close(self.handle) + if rc != SX_STATUS_SUCCESS: + logger.log_error("sx_api_close exited with error, rc {}".format(rc)) + + delete_sx_fd_t_p(self.rx_fd_p) + delete_sx_user_channel_t_p(self.user_channel_p) + + def check_sfp_status(self, port_change, timeout): + """ + the meaning of timeout is aligned with select.select, which has the following meaning: + 0: poll, returns without blocked + arbitrary positive value: doesn't returns until at least fd in the set is ready or + seconds elapsed + Note: + check_sfp_status makes the use of select to retrieve the notifications, which means + it should has the logic of reading out all the notifications in the fd selected without blocked. + However, it fails to do that due to some sdk API's characteristics: + sx_lib_host_ifc_recv can only read one notification each time and will block when no notification in that fd. + sx_lib_host_ifc_recv_list can return all notification in the fd via a single reading operation but + not supported by PMPE register (I've tested it but failed) + as a result the only way to satisfy the logic is to call sx_lib_host_ifc_recv in a loop until all notifications + has been read and we have to find a way to check that. it seems the only way to check that is via using select. + in this sense, we return one notification each time check_sfp_status called and let the caller, get_change_event, + to repeat calling it with timeout = 0 in a loop until no new notification read (in this case it returns false). + by doing so all the notifications in the fd can be retrieved through a single call to get_change_event. + """ + found = 0 + + try: + read, _, _ = select.select([self.rx_fd_p.fd], [], [], timeout) + except select.error as err: + rc, msg = err + if rc == errno.EAGAIN or rc == errno.EINTR: + return False + else: + raise + + for fd in read: + if fd == self.rx_fd_p.fd: + success, port_list, module_state = self.on_pmpe(self.rx_fd_p) + if not success: + logger.log_error("failed to read from {}".format(fd)) + break + + sfp_state = sfp_value_status_dict.get(module_state, STATUS_UNKNOWN) + if sfp_state == STATUS_UNKNOWN: + # in the following sequence, STATUS_UNKNOWN can be returned. + # so we shouldn't raise exception here. + # 1. some sfp module is inserted + # 2. sfp_event gets stuck and fails to fetch the change event instantaneously + # 3. and then the sfp module is removed + # 4. sfp_event starts to try fetching the change event + # in this case found is increased so that True will be returned + logger.log_info("unknown module state {}, maybe the port suffers two adjacent insertion/removal".format(module_state)) + found += 1 + continue + + for port in port_list: + logger.log_info("SFP on port {} state {}".format(port, sfp_state)) + port_change[port] = sfp_state + found += 1 + + if found == 0: + return False + else: + return True + + def on_pmpe(self, fd_p): + ''' on port module plug event handler ''' + + # recv parameters + pkt_size = PMPE_PACKET_SIZE + pkt_size_p = new_uint32_t_p() + uint32_t_p_assign(pkt_size_p, pkt_size) + pkt = new_uint8_t_arr(pkt_size) + recv_info_p = new_sx_receive_info_t_p() + pmpe_t = sx_event_pmpe_t() + port_attributes_list = new_sx_port_attributes_t_arr(64) + port_cnt_p = new_uint32_t_p() + uint32_t_p_assign(port_cnt_p,64) + label_port_list = [] + module_state = 0 + + rc = sx_lib_host_ifc_recv(fd_p, pkt, pkt_size_p, recv_info_p) + if rc != 0: + logger.log_error("sx_lib_host_ifc_recv exited with error, rc %d" % rc) + status = False + else: + status = True + pmpe_t = recv_info_p.event_info.pmpe + port_list_size = pmpe_t.list_size + logical_port_list = pmpe_t.log_port_list + module_state = pmpe_t.module_state + + for i in xrange(port_list_size): + logical_port = sx_port_log_id_t_arr_getitem(logical_port_list, i) + rc = sx_api_port_device_get(self.handle, 1 , 0, port_attributes_list, port_cnt_p) + port_cnt = uint32_t_p_value(port_cnt_p) + + for i in xrange(port_cnt): + port_attributes = sx_port_attributes_t_arr_getitem(port_attributes_list,i) + if port_attributes.log_port == logical_port: + lable_port = port_attributes.port_mapping.module_port + break + label_port_list.append(lable_port) + + delete_uint32_t_p(pkt_size_p) + delete_uint8_t_arr(pkt) + delete_sx_receive_info_t_p(recv_info_p) + delete_sx_port_attributes_t_arr(port_attributes_list) + delete_uint32_t_p(port_cnt_p) + + return status, label_port_list, module_state, diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py new file mode 100644 index 00000000000..6862b3fb258 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py @@ -0,0 +1,356 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Module contains an implementation of SONiC Platform Base API and +# provides the thermals data which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.thermal_base import ThermalBase + from sonic_daemon_base.daemon_base import Logger + from os import listdir + from os.path import isfile, join + import io + import os.path +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +# Global logger class instance +logger = Logger() + +THERMAL_DEV_CATEGORY_CPU_CORE = "cpu_core" +THERMAL_DEV_CATEGORY_CPU_PACK = "cpu_pack" +THERMAL_DEV_CATEGORY_MODULE = "module" +THERMAL_DEV_CATEGORY_PSU = "psu" +THERMAL_DEV_CATEGORY_GEARBOX = "gearbox" +THERMAL_DEV_CATEGORY_AMBIENT = "ambient" + +THERMAL_DEV_ASIC_AMBIENT = "asic_amb" +THERMAL_DEV_FAN_AMBIENT = "fan_amb" +THERMAL_DEV_PORT_AMBIENT = "port_amb" +THERMAL_DEV_COMEX_AMBIENT = "comex_amb" +THERMAL_DEV_BOARD_AMBIENT = "board_amb" + +THERMAL_API_GET_TEMPERATURE = "get_temperature" +THERMAL_API_GET_HIGH_THRESHOLD = "get_high_threshold" + +HW_MGMT_THERMAL_ROOT = "/var/run/hw-management/thermal/" + +thermal_api_handler_cpu_core = { + THERMAL_API_GET_TEMPERATURE:"cpu_core{}", + THERMAL_API_GET_HIGH_THRESHOLD:"cpu_core{}_max" +} +thermal_api_handler_cpu_pack = { + THERMAL_API_GET_TEMPERATURE:"cpu_pack", + THERMAL_API_GET_HIGH_THRESHOLD:"cpu_pack_max" +} +thermal_api_handler_module = { + THERMAL_API_GET_TEMPERATURE:"module{}_temp_input", + THERMAL_API_GET_HIGH_THRESHOLD:"module{}_temp_crit" +} +thermal_api_handler_psu = { + THERMAL_API_GET_TEMPERATURE:"psu{}_temp", + THERMAL_API_GET_HIGH_THRESHOLD:"psu{}_temp_max" +} +thermal_api_handler_gearbox = { + THERMAL_API_GET_TEMPERATURE:"temp_input_gearbox{}", + THERMAL_API_GET_HIGH_THRESHOLD:None +} +thermal_ambient_apis = { + THERMAL_DEV_ASIC_AMBIENT : "asic", + THERMAL_DEV_PORT_AMBIENT : "port_amb", + THERMAL_DEV_FAN_AMBIENT : "fan_amb", + THERMAL_DEV_COMEX_AMBIENT : "comex_amb", + THERMAL_DEV_BOARD_AMBIENT : "board_amb" +} +thermal_ambient_name = { + THERMAL_DEV_ASIC_AMBIENT : "Ambient ASIC Temp", + THERMAL_DEV_PORT_AMBIENT : "Ambient Port Side Temp", + THERMAL_DEV_FAN_AMBIENT : "Ambient Fan Side Temp", + THERMAL_DEV_COMEX_AMBIENT : "Ambient COMEX Temp", + THERMAL_DEV_BOARD_AMBIENT : "Ambient Board Temp" +} +thermal_api_handlers = { + THERMAL_DEV_CATEGORY_CPU_CORE : thermal_api_handler_cpu_core, + THERMAL_DEV_CATEGORY_CPU_PACK : thermal_api_handler_cpu_pack, + THERMAL_DEV_CATEGORY_MODULE : thermal_api_handler_module, + THERMAL_DEV_CATEGORY_PSU : thermal_api_handler_psu, + THERMAL_DEV_CATEGORY_GEARBOX : thermal_api_handler_gearbox +} +thermal_name = { + THERMAL_DEV_CATEGORY_CPU_CORE : "CPU Core {} Temp", + THERMAL_DEV_CATEGORY_CPU_PACK : "CPU Pack Temp", + THERMAL_DEV_CATEGORY_MODULE : "xSFP module {} Temp", + THERMAL_DEV_CATEGORY_PSU : "PSU-{} Temp", + THERMAL_DEV_CATEGORY_GEARBOX : "Gearbox {} Temp" +} + +thermal_device_categories_all = [ + THERMAL_DEV_CATEGORY_CPU_CORE, + THERMAL_DEV_CATEGORY_CPU_PACK, + THERMAL_DEV_CATEGORY_MODULE, + THERMAL_DEV_CATEGORY_PSU, + THERMAL_DEV_CATEGORY_AMBIENT, + THERMAL_DEV_CATEGORY_GEARBOX +] + +thermal_device_categories_singleton = [ + THERMAL_DEV_CATEGORY_CPU_PACK, + THERMAL_DEV_CATEGORY_AMBIENT +] +thermal_api_names = [ + THERMAL_API_GET_TEMPERATURE, + THERMAL_API_GET_HIGH_THRESHOLD +] + +hwsku_dict_thermal = {'ACS-MSN2700': 0, 'LS-SN2700':0, 'ACS-MSN2740': 3, 'ACS-MSN2100': 1, 'ACS-MSN2410': 2, 'ACS-MSN2010': 4, 'ACS-MSN3700': 5, 'ACS-MSN3700C': 6, 'Mellanox-SN2700': 0, 'Mellanox-SN2700-D48C8': 0, 'ACS-MSN3800': 7} +thermal_profile_list = [ + # 2700 + { + THERMAL_DEV_CATEGORY_CPU_CORE:(0, 2), + THERMAL_DEV_CATEGORY_MODULE:(1, 32), + THERMAL_DEV_CATEGORY_PSU:(1, 2), + THERMAL_DEV_CATEGORY_CPU_PACK:(0,1), + THERMAL_DEV_CATEGORY_GEARBOX:(0,0), + THERMAL_DEV_CATEGORY_AMBIENT:(0, + [ + THERMAL_DEV_ASIC_AMBIENT, + THERMAL_DEV_PORT_AMBIENT, + THERMAL_DEV_FAN_AMBIENT + ] + ) + }, + # 2100 + { + THERMAL_DEV_CATEGORY_CPU_CORE:(0, 4), + THERMAL_DEV_CATEGORY_MODULE:(1, 16), + THERMAL_DEV_CATEGORY_PSU:(0, 0), + THERMAL_DEV_CATEGORY_CPU_PACK:(0,0), + THERMAL_DEV_CATEGORY_GEARBOX:(0,0), + THERMAL_DEV_CATEGORY_AMBIENT:(0, + [ + THERMAL_DEV_ASIC_AMBIENT, + THERMAL_DEV_PORT_AMBIENT, + THERMAL_DEV_FAN_AMBIENT, + ] + ) + }, + # 2410 + { + THERMAL_DEV_CATEGORY_CPU_CORE:(0, 2), + THERMAL_DEV_CATEGORY_MODULE:(1, 56), + THERMAL_DEV_CATEGORY_PSU:(1, 2), + THERMAL_DEV_CATEGORY_CPU_PACK:(0,1), + THERMAL_DEV_CATEGORY_GEARBOX:(0,0), + THERMAL_DEV_CATEGORY_AMBIENT:(0, + [ + THERMAL_DEV_ASIC_AMBIENT, + THERMAL_DEV_PORT_AMBIENT, + THERMAL_DEV_FAN_AMBIENT, + ] + ) + }, + # 2740 + { + THERMAL_DEV_CATEGORY_CPU_CORE:(0, 4), + THERMAL_DEV_CATEGORY_MODULE:(1, 32), + THERMAL_DEV_CATEGORY_PSU:(1, 2), + THERMAL_DEV_CATEGORY_CPU_PACK:(0,0), + THERMAL_DEV_CATEGORY_GEARBOX:(0,0), + THERMAL_DEV_CATEGORY_AMBIENT:(0, + [ + THERMAL_DEV_ASIC_AMBIENT, + THERMAL_DEV_PORT_AMBIENT, + THERMAL_DEV_FAN_AMBIENT, + ] + ) + }, + # 2010 + { + THERMAL_DEV_CATEGORY_CPU_CORE:(0, 4), + THERMAL_DEV_CATEGORY_MODULE:(1, 22), + THERMAL_DEV_CATEGORY_PSU:(0, 0), + THERMAL_DEV_CATEGORY_CPU_PACK:(0,0), + THERMAL_DEV_CATEGORY_GEARBOX:(0,0), + THERMAL_DEV_CATEGORY_AMBIENT:(0, + [ + THERMAL_DEV_ASIC_AMBIENT, + THERMAL_DEV_PORT_AMBIENT, + THERMAL_DEV_FAN_AMBIENT, + ] + ) + }, + # 3700 + { + THERMAL_DEV_CATEGORY_CPU_CORE:(0, 4), + THERMAL_DEV_CATEGORY_MODULE:(1, 32), + THERMAL_DEV_CATEGORY_PSU:(1, 2), + THERMAL_DEV_CATEGORY_CPU_PACK:(0,1), + THERMAL_DEV_CATEGORY_GEARBOX:(0,0), + THERMAL_DEV_CATEGORY_AMBIENT:(0, + [ + THERMAL_DEV_ASIC_AMBIENT, + THERMAL_DEV_COMEX_AMBIENT, + THERMAL_DEV_PORT_AMBIENT, + THERMAL_DEV_FAN_AMBIENT + ] + ) + }, + # 3700c + { + THERMAL_DEV_CATEGORY_CPU_CORE:(0, 2), + THERMAL_DEV_CATEGORY_MODULE:(1, 32), + THERMAL_DEV_CATEGORY_PSU:(1, 2), + THERMAL_DEV_CATEGORY_CPU_PACK:(0,1), + THERMAL_DEV_CATEGORY_GEARBOX:(0,0), + THERMAL_DEV_CATEGORY_AMBIENT:(0, + [ + THERMAL_DEV_ASIC_AMBIENT, + THERMAL_DEV_COMEX_AMBIENT, + THERMAL_DEV_PORT_AMBIENT, + THERMAL_DEV_FAN_AMBIENT + ] + ) + }, + # 3800 + { + THERMAL_DEV_CATEGORY_CPU_CORE:(0, 4), + THERMAL_DEV_CATEGORY_MODULE:(1, 64), + THERMAL_DEV_CATEGORY_PSU:(1, 2), + THERMAL_DEV_CATEGORY_CPU_PACK:(0,1), + THERMAL_DEV_CATEGORY_GEARBOX:(1,32), + THERMAL_DEV_CATEGORY_AMBIENT:(0, + [ + THERMAL_DEV_ASIC_AMBIENT, + THERMAL_DEV_COMEX_AMBIENT, + THERMAL_DEV_PORT_AMBIENT, + THERMAL_DEV_FAN_AMBIENT + ] + ) + }, +] + +def initialize_thermals(sku, thermal_list, psu_list): + # create thermal objects for all categories of sensors + tp_index = hwsku_dict_thermal[sku] + thermal_profile = thermal_profile_list[tp_index] + for category in thermal_device_categories_all: + if category == THERMAL_DEV_CATEGORY_AMBIENT: + count, ambient_list = thermal_profile[category] + for ambient in ambient_list: + thermal = Thermal(category, ambient, True) + thermal_list.append(thermal) + else: + start, count = 0, 0 + if category in thermal_profile: + start, count = thermal_profile[category] + if count == 0: + continue + if count == 1: + thermal = Thermal(category, 0, False) + thermal_list.append(thermal) + else: + if category == THERMAL_DEV_CATEGORY_PSU: + for index in range(count): + thermal = Thermal(category, start + index, True, psu_list[index].get_powergood_status, "power off") + thermal_list.append(thermal) + else: + for index in range(count): + thermal = Thermal(category, start + index, True) + thermal_list.append(thermal) + +class Thermal(ThermalBase): + def __init__(self, category, index, has_index, dependency = None, hint = None): + """ + index should be a string for category ambient and int for other categories + """ + if category == THERMAL_DEV_CATEGORY_AMBIENT: + self.name = thermal_ambient_name[index] + self.index = index + elif has_index: + self.name = thermal_name[category].format(index) + self.index = index + else: + self.name = thermal_name[category] + self.index = 0 + + self.category = category + self.temperature = self._get_file_from_api(THERMAL_API_GET_TEMPERATURE) + self.high_threshold = self._get_file_from_api(THERMAL_API_GET_HIGH_THRESHOLD) + self.dependency = dependency + self.dependent_hint = hint + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return self.name + + def _read_generic_file(self, filename, len): + """ + Read a generic file, returns the contents of the file + """ + result = None + try: + with open(filename, 'r') as fileobj: + result = fileobj.read() + except Exception as e: + logger.log_info("Fail to read file {} due to {}".format(filename, repr(e))) + return result + + def _get_file_from_api(self, api_name): + if self.category == THERMAL_DEV_CATEGORY_AMBIENT: + if api_name == THERMAL_API_GET_TEMPERATURE: + filename = thermal_ambient_apis[self.index] + else: + return None + else: + handler = thermal_api_handlers[self.category][api_name] + if self.category in thermal_device_categories_singleton: + filename = handler + else: + filename = handler.format(self.index) + return join(HW_MGMT_THERMAL_ROOT, filename) + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + if self.dependency and not self.dependency(): + if self.dependent_hint: + hint = self.dependent_hint + else: + hint = "unknown reason" + logger.log_info("get_temperature for {} failed due to {}".format(self.name, hint)) + return None + value_str = self._read_generic_file(self.temperature, 0) + if value_str is None: + return None + value_float = float(value_str) + return value_float / 1000.0 + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + + Returns: + A float number, the high threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + if self.high_threshold is None: + return None + value_str = self._read_generic_file(self.high_threshold, 0) + if value_str is None: + return None + value_float = float(value_str) + return value_float / 1000.0 diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/watchdog.py b/platform/mellanox/mlnx-platform-api/sonic_platform/watchdog.py new file mode 100644 index 00000000000..e9694f1b2a5 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/watchdog.py @@ -0,0 +1,288 @@ +#!/usr/bin/env python + +""" +Mellanox + +Module contains an implementation of SONiC Platform Base API and +provides access to hardware watchdog on Mellanox platforms +""" + +import os +import fcntl +import array +import time + +from sonic_platform_base.watchdog_base import WatchdogBase + +""" ioctl constants """ +IO_WRITE = 0x40000000 +IO_READ = 0x80000000 +IO_READ_WRITE = 0xC0000000 +IO_SIZE_INT = 0x00040000 +IO_SIZE_40 = 0x00280000 +IO_TYPE_WATCHDOG = ord('W') << 8 + +WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG +WDR_40 = IO_READ | IO_SIZE_40 | IO_TYPE_WATCHDOG +WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG + +""" Watchdog ioctl commands """ +WDIOC_GETSUPPORT = 0 | WDR_40 +WDIOC_GETSTATUS = 1 | WDR_INT +WDIOC_GETBOOTSTATUS = 2 | WDR_INT +WDIOC_GETTEMP = 3 | WDR_INT +WDIOC_SETOPTIONS = 4 | WDR_INT +WDIOC_KEEPALIVE = 5 | WDR_INT +WDIOC_SETTIMEOUT = 6 | WDWR_INT +WDIOC_GETTIMEOUT = 7 | WDR_INT +WDIOC_SETPRETIMEOUT = 8 | WDWR_INT +WDIOC_GETPRETIMEOUT = 9 | WDR_INT +WDIOC_GETTIMELEFT = 10 | WDR_INT + +""" Watchdog status constants """ +WDIOS_DISABLECARD = 0x0001 +WDIOS_ENABLECARD = 0x0002 + +""" Mellanox main watchdog identity string """ +WD_MLNX_MAIN_IDENTITY = "mlx-wdt-main" +""" watchdog sysfs """ +WD_SYSFS_PATH = "/sys/class/watchdog/" + + +WD_COMMON_ERROR = -1 + + +class WatchdogImplBase(WatchdogBase): + """ + Base class that implements common logic for interacting + with watchdog using ioctl commands + """ + + def __init__(self, wd_device_path): + """ + Open a watchdog handle + @param wd_device_path Path to watchdog device + """ + + self.watchdog_path = wd_device_path + self.watchdog = os.open(self.watchdog_path, os.O_WRONLY) + + # Opening a watchdog descriptor starts + # watchdog timer; + # by default it should be stopped + self._disablecard() + self.armed = False + + self.timeout = self._gettimeout() + + def _enablecard(self): + """ + Turn on the watchdog timer + """ + + req = array.array('h', [WDIOS_ENABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _disablecard(self): + """ + Turn off the watchdog timer + """ + + req = array.array('h', [WDIOS_DISABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + + fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE) + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + + req = array.array('I', [seconds]) + fcntl.ioctl(self.watchdog, WDIOC_SETTIMEOUT, req, True) + + return int(req[0]) + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMEOUT, req, True) + + return int(req[0]) + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMELEFT, req, True) + + return int(req[0]) + + def arm(self, seconds): + """ + Implements arm WatchdogBase API + """ + + ret = WD_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + if self.armed: + self._keepalive() + else: + self._enablecard() + self.armed = True + ret = self.timeout + except IOError: + pass + + return ret + + def disarm(self): + """ + Implements disarm WatchdogBase API + """ + + disarmed = False + if self.armed: + try: + self._disablecard() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Implements is_armed WatchdogBase API + """ + + return self.armed + + def get_remaining_time(self): + """ + Implements get_remaining_time WatchdogBase API + """ + + timeleft = WD_COMMON_ERROR + + if self.armed: + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft + + def __del__(self): + """ + Close watchdog + """ + + os.close(self.watchdog) + + +class WatchdogType1(WatchdogImplBase): + """ + Watchdog type 1 + """ + + def arm(self, seconds): + """ + Call arm from WatchdgoImplBase and save the timestamp + when the watchdog was armed + """ + + ret = WatchdogImplBase.arm(self, seconds) + # Save the watchdog arm timestamp + # requiered for get_remaining_time() + self.arm_timestamp = time.time() + + return ret + + def get_remaining_time(self): + """ + Watchdog Type 1 does not support timeleft + operation, we will calculate timeleft based + on timeout and arm timestamp + """ + + timeleft = WD_COMMON_ERROR + + if self.armed: + timeleft = int(self.timeout - (time.time() - self.arm_timestamp)) + + return timeleft + +class WatchdogType2(WatchdogImplBase): + """ + Watchdog type 2 + """ + + pass + + +def is_mlnx_wd_main(dev): + """ + Checks if dev is Mellanox main watchdog + """ + + try: + with open("{}/{}/identity".format(WD_SYSFS_PATH, dev)) as identity_file: + identity = identity_file.read().strip() + if identity == WD_MLNX_MAIN_IDENTITY: + return True + except IOError: + pass + + return False + + +def is_wd_type2(dev): + """ + Checks if dev is Mellanox type 2 watchdog + """ + + return os.path.exists("{}/{}/timeleft".format(WD_SYSFS_PATH, dev)) + + +def get_watchdog(): + """ + Return WatchdogType1 or WatchdogType2 based on system + """ + + watchdog_main_device_name = None + + for device in os.listdir("/dev/"): + if device.startswith("watchdog") and is_mlnx_wd_main(device): + watchdog_main_device_name = device + + watchdog_device_path = "/dev/{}".format(watchdog_main_device_name) + + watchdog = None + + if is_wd_type2(watchdog_main_device_name): + watchdog = WatchdogType2(watchdog_device_path) + else: + watchdog = WatchdogType1(watchdog_device_path) + + return watchdog diff --git a/platform/mellanox/mlnx-sai.mk b/platform/mellanox/mlnx-sai.mk new file mode 100644 index 00000000000..39942111f26 --- /dev/null +++ b/platform/mellanox/mlnx-sai.mk @@ -0,0 +1,13 @@ +# Mellanox SAI + +MLNX_SAI_VERSION = SAIRel1.15.2-master + +export MLNX_SAI_VERSION + +MLNX_SAI = mlnx-sai_1.mlnx.$(MLNX_SAI_VERSION)_amd64.deb +$(MLNX_SAI)_SRC_PATH = $(PLATFORM_PATH)/mlnx-sai +$(MLNX_SAI)_DEPENDS += $(MLNX_SDK_DEBS) +$(MLNX_SAI)_RDEPENDS += $(MLNX_SDK_RDEBS) $(MLNX_SDK_DEBS) +MLNX_SAI_DBGSYM = mlnx-sai-dbgsym_1.mlnx.$(MLNX_SAI_VERSION)_amd64.deb +$(eval $(call add_derived_package,$(MLNX_SAI),$(MLNX_SAI_DBGSYM))) +SONIC_MAKE_DEBS += $(MLNX_SAI) diff --git a/platform/mellanox/mlnx-sai/Makefile b/platform/mellanox/mlnx-sai/Makefile new file mode 100644 index 00000000000..de6a7152d60 --- /dev/null +++ b/platform/mellanox/mlnx-sai/Makefile @@ -0,0 +1,17 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = mlnx-sai_1.mlnx.$(MLNX_SAI_VERSION)_amd64.deb +DERIVED_TARGETS = mlnx-sai-dbgsym_1.mlnx.$(MLNX_SAI_VERSION)_amd64.deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + pushd SAI-Implementation + pushd mlnx_sai + + chmod a+x autogen.sh + debuild -e 'make_extra_flags="DEFS=-DACS_OS"' -us -uc -d -b + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + popd diff --git a/platform/mellanox/mlnx-sai/SAI-Implementation b/platform/mellanox/mlnx-sai/SAI-Implementation new file mode 160000 index 00000000000..925116eb63a --- /dev/null +++ b/platform/mellanox/mlnx-sai/SAI-Implementation @@ -0,0 +1 @@ +Subproject commit 925116eb63a5a9012dcc22a7a0682ada6e976380 diff --git a/platform/mellanox/one-image.mk b/platform/mellanox/one-image.mk new file mode 100644 index 00000000000..2946ae53f47 --- /dev/null +++ b/platform/mellanox/one-image.mk @@ -0,0 +1,15 @@ +# sonic mellanox one image installer + +SONIC_ONE_IMAGE = sonic-mellanox.bin +$(SONIC_ONE_IMAGE)_MACHINE = mellanox +$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie +$(SONIC_ONE_IMAGE)_INSTALLS += $(SX_KERNEL) $(KERNEL_MFT) $(MFT_OEM) $(MFT) $(MLNX_HW_MANAGEMENT) +$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +ifeq ($(INSTALL_DEBUG_TOOLS),y) +$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) +$(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) +else +$(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES) +endif +$(SONIC_ONE_IMAGE)_FILES += $(MLNX_SPC_FW_FILE) $(MLNX_SPC2_FW_FILE) $(MLNX_FFB_SCRIPT) $(ISSU_VERSION_FILE) +SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/mellanox/platform.conf b/platform/mellanox/platform.conf new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/mellanox/rules.mk b/platform/mellanox/rules.mk new file mode 100644 index 00000000000..dd10cefda57 --- /dev/null +++ b/platform/mellanox/rules.mk @@ -0,0 +1,32 @@ +include $(PLATFORM_PATH)/sdk.mk +include $(PLATFORM_PATH)/fw.mk +include $(PLATFORM_PATH)/mft.mk +include $(PLATFORM_PATH)/mlnx-sai.mk +include $(PLATFORM_PATH)/hw-management.mk +include $(PLATFORM_PATH)/mlnx-platform-api.mk +include $(PLATFORM_PATH)/docker-syncd-mlnx.mk +include $(PLATFORM_PATH)/docker-syncd-mlnx-rpc.mk +include $(PLATFORM_PATH)/docker-saiserver-mlnx.mk +include $(PLATFORM_PATH)/one-image.mk +include $(PLATFORM_PATH)/libsaithrift-dev.mk +include $(PLATFORM_PATH)/docker-ptf-mlnx.mk +include $(PLATFORM_PATH)/mlnx-ffb.mk +include $(PLATFORM_PATH)/issu-version.mk + +SONIC_ALL += $(SONIC_ONE_IMAGE) \ + $(DOCKER_FPM) + +# Inject mlnx sai into sairedis +$(LIBSAIREDIS)_DEPENDS += $(MLNX_SAI) +ifeq ($(ENABLE_SYNCD_RPC),y) +$(LIBSAIREDIS)_DEPENDS += $(LIBSAITHRIFT_DEV) +endif + +# Runtime dependency on mlnx sai is set only for syncd +$(SYNCD)_RDEPENDS += $(MLNX_SAI) + +# Inject mlnx sdk libs to platform monitor +$(DOCKER_PLATFORM_MONITOR)_DEPENDS += $(APPLIBS) $(SX_COMPLIB) $(SXD_LIBS) $(SX_GEN_UTILS) $(PYTHON_SDK_API) $(APPLIBS_DEV) $(SX_COMPLIB_DEV) $(SXD_LIBS_DEV) $(SX_GEN_UTILS_DEV) + +# Inject mlnx mlx libs to platform monitor +$(DOCKER_PLATFORM_MONITOR)_DEPENDS += $(MFT) diff --git a/platform/mellanox/sdk-src/applibs/Makefile b/platform/mellanox/sdk-src/applibs/Makefile new file mode 100644 index 00000000000..1068da0c5c1 --- /dev/null +++ b/platform/mellanox/sdk-src/applibs/Makefile @@ -0,0 +1,30 @@ +.ONESHELL: +SHELL = /bin/bash + +MAIN_TARGET = applibs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +DERIVED_TARGETS = applibs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb applibs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +PACKAGE_NAME = applibs + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # get sources + rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz + + # build + pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + sed -i "s/sx-libnl/$(LIBNL3)/g" ./debian/control + sed -i "s/-Werror//g" ./configure.in + + if [ -f autogen.sh ]; then + ./autogen.sh + fi + + debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/iproute2/Makefile b/platform/mellanox/sdk-src/iproute2/Makefile new file mode 100644 index 00000000000..0e32fe1426c --- /dev/null +++ b/platform/mellanox/sdk-src/iproute2/Makefile @@ -0,0 +1,27 @@ +.ONESHELL: +SHELL = /bin/bash + +MAIN_TARGET = iproute2_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +DERIVED_TARGETS = iproute2-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb iproute2-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +PACKAGE_NAME = iproute2-3.19.0 + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # get sources + rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz + + # build + pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + if [ -f autogen.sh ]; then + ./autogen.sh + fi + + debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/python-sdk-api/Makefile b/platform/mellanox/sdk-src/python-sdk-api/Makefile new file mode 100644 index 00000000000..9c41be75725 --- /dev/null +++ b/platform/mellanox/sdk-src/python-sdk-api/Makefile @@ -0,0 +1,27 @@ +.ONESHELL: +SHELL = /bin/bash + +MAIN_TARGET = python-sdk-api_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +DERIVED_TARGETS = python-sdk-api-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +PACKAGE_NAME = python_sdk_api + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # get sources + rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz + + # build + pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + if [ -f autogen.sh ]; then + ./autogen.sh + fi + + debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sx-acl-helper/Makefile b/platform/mellanox/sdk-src/sx-acl-helper/Makefile new file mode 100644 index 00000000000..d9d0aef8775 --- /dev/null +++ b/platform/mellanox/sdk-src/sx-acl-helper/Makefile @@ -0,0 +1,29 @@ +.ONESHELL: +SHELL = /bin/bash + +MAIN_TARGET = sx-acl-helper_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +DERIVED_TARGETS = sx-acl-helper-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb \ + sx-acl-helper-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb \ + sx-acl-helper-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +PACKAGE_NAME = sx_acl_helper + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # get sources + rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz + + # build + pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + if [ -f autogen.sh ]; then + ./autogen.sh + fi + + debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sx-complib/Makefile b/platform/mellanox/sdk-src/sx-complib/Makefile new file mode 100644 index 00000000000..6e51b779ef2 --- /dev/null +++ b/platform/mellanox/sdk-src/sx-complib/Makefile @@ -0,0 +1,29 @@ +.ONESHELL: +SHELL = /bin/bash + +MAIN_TARGET = sx-complib_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +DERIVED_TARGETS = sx-complib-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb \ + sx-complib-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb \ + sx-complib-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +PACKAGE_NAME = sx_complib + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # get sources + rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz + + # build + pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + if [ -f autogen.sh ]; then + ./autogen.sh + fi + + debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sx-examples/Makefile b/platform/mellanox/sdk-src/sx-examples/Makefile new file mode 100644 index 00000000000..06de0f47506 --- /dev/null +++ b/platform/mellanox/sdk-src/sx-examples/Makefile @@ -0,0 +1,27 @@ +.ONESHELL: +SHELL = /bin/bash + +MAIN_TARGET = sx-examples_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +DERIVED_TARGETS = sx-examples-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb sx-examples-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +PACKAGE_NAME = sx_examples + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # get sources + rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz + + # build + pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + if [ -f autogen.sh ]; then + ./autogen.sh + fi + + debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sx-gen-utils/Makefile b/platform/mellanox/sdk-src/sx-gen-utils/Makefile new file mode 100644 index 00000000000..1f6f31d9acd --- /dev/null +++ b/platform/mellanox/sdk-src/sx-gen-utils/Makefile @@ -0,0 +1,27 @@ +.ONESHELL: +SHELL = /bin/bash + +MAIN_TARGET = sx-gen-utils_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +DERIVED_TARGETS = sx-gen-utils-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb sx-gen-utils-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +PACKAGE_NAME = sx_gen_utils + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # get sources + rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz + + # build + pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + if [ -f autogen.sh ]; then + ./autogen.sh + fi + + debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sx-kernel/Makefile b/platform/mellanox/sdk-src/sx-kernel/Makefile new file mode 100644 index 00000000000..9e979879fef --- /dev/null +++ b/platform/mellanox/sdk-src/sx-kernel/Makefile @@ -0,0 +1,30 @@ +.ONESHELL: +SHELL = /bin/bash + +MAIN_TARGET = sx-kernel_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +DERIVED_TARGETS = sx-kernel-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +PACKAGE_NAME = sx_kernel + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # get sources + + if [ ! -z "$(MLNX_SDK_SOURCE_BASE_URL)" ]; then + rm -rf sx_kernel-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz + pushd sx_kernel-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + else + pushd Switch-SDK-drivers + git reset --hard + git clean -xfd + fi + + # build + patch -p1 < ../sx_kernel_makefile_sonic_build.patch + + debuild -e KVERSION=$(KVERSION) -e KSRC_EXT=/lib/modules/$(KVERSION)/source/ -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sx-kernel/Switch-SDK-drivers b/platform/mellanox/sdk-src/sx-kernel/Switch-SDK-drivers new file mode 160000 index 00000000000..87f7a791127 --- /dev/null +++ b/platform/mellanox/sdk-src/sx-kernel/Switch-SDK-drivers @@ -0,0 +1 @@ +Subproject commit 87f7a7911275285abc63c24ba39aa4af4c4b4678 diff --git a/platform/mellanox/sdk-src/sx-kernel/sx_kernel_makefile_sonic_build.patch b/platform/mellanox/sdk-src/sx-kernel/sx_kernel_makefile_sonic_build.patch new file mode 100644 index 00000000000..e7c87d07992 --- /dev/null +++ b/platform/mellanox/sdk-src/sx-kernel/sx_kernel_makefile_sonic_build.patch @@ -0,0 +1,18 @@ +diff --git a/makefile b/makefile +index f23f0ac..a16b2ce 100644 +--- a/makefile ++++ b/makefile +@@ -93,10 +93,10 @@ V ?= 1 + + ifneq ($(findstring 3.10,$(KVERSION))$(findstring 3.13,$(KVERSION))$(findstring 3.14,$(KVERSION))$(findstring 3.16,$(KVERSION)),) + MLNX_LINUX_AUTOCONF_FILE = include/generated/autoconf.h +-MLNX_LINUX_EXTRA_INCLUDE_FILES = -include include/linux/kconfig.h ++MLNX_LINUX_EXTRA_INCLUDE_FILES = -include $(KSRC_EXT)/include/linux/kconfig.h + MLNX_LINUX_EXTRA_INCLUDE_FOLDERS = \ +- -Iarch/$$(SRCARCH)/include/uapi \ +- -Iinclude/uapi \ ++ -I$(KSRC_EXT)/arch/$$(SRCARCH)/include/uapi \ ++ -I$(KSRC_EXT)/include/uapi \ + -Iarch/$$(SRCARCH)/include/generated/uapi \ + -Iarch/$$(SRCARCH)/include/generated \ + -Iinclude/generated/uapi diff --git a/platform/mellanox/sdk-src/sx-scew/Makefile b/platform/mellanox/sdk-src/sx-scew/Makefile new file mode 100644 index 00000000000..9b8c5bd56c3 --- /dev/null +++ b/platform/mellanox/sdk-src/sx-scew/Makefile @@ -0,0 +1,29 @@ +.ONESHELL: +SHELL = /bin/bash + +MAIN_TARGET = sx-scew_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +DERIVED_TARGETS = sx-scew-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb \ + sx-scew-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb \ + sx-scew-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +PACKAGE_NAME = sx_scew + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # get sources + rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz + + # build + pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + if [ -f autogen.sh ]; then + ./autogen.sh + fi + + debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sxd-libs/Makefile b/platform/mellanox/sdk-src/sxd-libs/Makefile new file mode 100644 index 00000000000..0b142c92082 --- /dev/null +++ b/platform/mellanox/sdk-src/sxd-libs/Makefile @@ -0,0 +1,29 @@ +.ONESHELL: +SHELL = /bin/bash + +MAIN_TARGET = sxd-libs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +DERIVED_TARGETS = sxd-libs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb \ + sxd-libs-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb \ + sxd-libs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +PACKAGE_NAME = sxd_libs + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # get sources + rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz + + # build + pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + if [ -f autogen.sh ]; then + ./autogen.sh + fi + + debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/wjh-libs/Makefile b/platform/mellanox/sdk-src/wjh-libs/Makefile new file mode 100644 index 00000000000..ecc437258ec --- /dev/null +++ b/platform/mellanox/sdk-src/wjh-libs/Makefile @@ -0,0 +1,29 @@ +.ONESHELL: +SHELL = /bin/bash + +MAIN_TARGET = wjh-libs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +DERIVED_TARGETS = wjh-libs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb \ + wjh-libs-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb \ + wjh-libs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +PACKAGE_NAME = wjh_libs + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # get sources + rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz + + # build + pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + if [ -f autogen.sh ]; then + ./autogen.sh + fi + + debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk new file mode 100644 index 00000000000..73568ce8459 --- /dev/null +++ b/platform/mellanox/sdk.mk @@ -0,0 +1,159 @@ +MLNX_SDK_BASE_PATH = $(PLATFORM_PATH)/sdk-src/sx-kernel/Switch-SDK-drivers/bin/ +MLNX_SDK_VERSION = 4.3.2602 +MLNX_SDK_ISSU_VERSION = 101 + +MLNX_SDK_DEB_VERSION = $(subst _,.,$(MLNX_SDK_VERSION)) + +# Place here URL where SDK sources exist +MLNX_SDK_SOURCE_BASE_URL = + +ifneq ($(MLNX_SDK_SOURCE_BASE_URL), ) +SDK_FROM_SRC = y +else +SDK_FROM_SRC = n +endif + +export MLNX_SDK_SOURCE_BASE_URL MLNX_SDK_VERSION MLNX_SDK_ISSU_VERSION MLNX_SDK_DEB_VERSION + +MLNX_SDK_RDEBS += $(APPLIBS) $(IPROUTE2_MLNX) $(SX_COMPLIB) $(SX_EXAMPLES) \ + $(SX_GEN_UTILS) $(SX_SCEW) $(SXD_LIBS) $(WJH_LIBS) $(SX_ACL_HELPER) + +MLNX_SDK_DEBS += $(APPLIBS_DEV) $(IPROUTE2_MLNX_DEV) $(SX_COMPLIB_DEV) \ + $(SX_COMPLIB_DEV_STATIC) $(SX_EXAMPLES_DEV) $(SX_GEN_UTILS_DEV) \ + $(SX_SCEW_DEV) $(SX_SCEW_DEV_STATIC) $(SXD_LIBS_DEV)\ + $(SXD_LIBS_DEV_STATIC) $(WJH_LIBS_DEV) $(SX_ACL_HELPER_DEV) + +MLNX_SDK_DBG_DEBS += $(APPLIBS_DBGSYM) $(IPROUTE2_MLNX_DBGSYM) $(SX_COMPLIB_DBGSYM) \ + $(SX_EXAMPLES_DBGSYM) $(SX_GEN_UTILS_DBGSYM) $(SX_SCEW_DBGSYM) \ + $(SXD_LIBS_DBGSYM) $(WJH_LIBS_DBGSYM) $(SX_ACL_HELPER_DBGSYM) + +APPLIBS = applibs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(APPLIBS)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/applibs +$(APPLIBS)_DEPENDS += $(SX_COMPLIB_DEV) $(SX_GEN_UTILS_DEV) $(SXD_LIBS_DEV) $(LIBNL3_DEV) $(LIBNL_GENL3_DEV) +$(APPLIBS)_RDEPENDS += $(SX_COMPLIB) $(SX_GEN_UTILS) $(SXD_LIBS) $(LIBNL3) $(LIBNL_GENL3) +APPLIBS_DEV = applibs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(eval $(call add_derived_package,$(APPLIBS),$(APPLIBS_DEV))) +APPLIBS_DBGSYM = applibs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +ifeq ($(SDK_FROM_SRC),y) +$(eval $(call add_derived_package,$(APPLIBS),$(APPLIBS_DBGSYM))) +endif + +IPROUTE2_MLNX = iproute2_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(IPROUTE2_MLNX)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/iproute2 +IPROUTE2_MLNX_DEV = iproute2-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(eval $(call add_derived_package,$(IPROUTE2_MLNX),$(IPROUTE2_MLNX_DEV))) +IPROUTE2_MLNX_DBGSYM = iproute2-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +ifeq ($(SDK_FROM_SRC),y) +$(eval $(call add_derived_package,$(IPROUTE2_MLNX),$(IPROUTE2_MLNX_DBGSYM))) +endif + +SX_COMPLIB = sx-complib_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(SX_COMPLIB)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-complib +SX_COMPLIB_DEV = sx-complib-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(eval $(call add_derived_package,$(SX_COMPLIB),$(SX_COMPLIB_DEV))) +SX_COMPLIB_DBGSYM = sx-complib-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +ifeq ($(SDK_FROM_SRC),y) +$(eval $(call add_derived_package,$(SX_COMPLIB),$(SX_COMPLIB_DBGSYM))) +endif + +SX_EXAMPLES = sx-examples_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(SX_EXAMPLES)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-examples +$(SX_EXAMPLES)_DEPENDS += $(APPLIBS_DEV) $(SX_SCEW_DEV) $(SXD_LIBS_DEV) +$(SX_EXAMPLES)_RDEPENDS += $(APPLIBS) $(SX_SCEW) $(SXD_LIBS) +SX_EXAMPLES_DEV = sx-examples-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(eval $(call add_derived_package,$(SX_EXAMPLES),$(SX_EXAMPLES_DEV))) +SX_EXAMPLES_DBGSYM = sx-examples-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +ifeq ($(SDK_FROM_SRC),y) +$(eval $(call add_derived_package,$(SX_EXAMPLES),$(SX_EXAMPLES_DBGSYM))) +endif + +SX_GEN_UTILS = sx-gen-utils_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(SX_GEN_UTILS)_SRC_PATH += $(PLATFORM_PATH)/sdk-src/sx-gen-utils +$(SX_GEN_UTILS)_DEPENDS += $(SX_COMPLIB_DEV) +$(SX_GEN_UTILS)_RDEPENDS += $(SX_COMPLIB) +SX_GEN_UTILS_DEV = sx-gen-utils-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(eval $(call add_derived_package,$(SX_GEN_UTILS),$(SX_GEN_UTILS_DEV))) +SX_GEN_UTILS_DBGSYM = sx-gen-utils-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +ifeq ($(SDK_FROM_SRC),y) +$(eval $(call add_derived_package,$(SX_GEN_UTILS),$(SX_GEN_UTILS_DBGSYM))) +endif + +SX_SCEW = sx-scew_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(SX_SCEW)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-scew +SX_SCEW_DEV = sx-scew-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(eval $(call add_derived_package,$(SX_SCEW),$(SX_SCEW_DEV))) +SX_SCEW_DBGSYM = sx-scew-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +ifeq ($(SDK_FROM_SRC),y) +$(eval $(call add_derived_package,$(SX_SCEW),$(SX_SCEW_DBGSYM))) +endif + +SXD_LIBS = sxd-libs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(SXD_LIBS)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sxd-libs +$(SXD_LIBS)_DEPENDS += $(SX_COMPLIB_DEV) $(SX_GEN_UTILS_DEV) +SXD_LIBS_DEV = sxd-libs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(eval $(call add_derived_package,$(SXD_LIBS),$(SXD_LIBS_DEV))) +SXD_LIBS_DBGSYM = sxd-libs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +ifeq ($(SDK_FROM_SRC),y) +$(eval $(call add_derived_package,$(SXD_LIBS),$(SXD_LIBS_DBGSYM))) +endif + +#packages that are required for runtime only +PYTHON_SDK_API = python-sdk-api_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(PYTHON_SDK_API)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/python-sdk-api +$(PYTHON_SDK_API)_DEPENDS += $(APPLIBS_DEV) $(SXD_LIBS_DEV) $(SWIG) +$(PYTHON_SDK_API)_RDEPENDS += $(APPLIBS) $(SXD_LIBS) +PYTHON_SDK_API_DBGSYM = python-sdk-api-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +ifeq ($(SDK_FROM_SRC),y) +$(eval $(call add_derived_package,$(PYTHON_SDK_API),$(PYTHON_SDK_API_DBGSYM))) +endif + +SX_ACL_HELPER = sx-acl-helper_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(SX_ACL_HELPER)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-acl-helper +$(SX_ACL_HELPER)_DEPENDS += $(SX_COMPLIB_DEV) $(SXD_LIBS_DEV) $(APPLIBS_DEV) +$(SX_ACL_HELPER)_RDEPENDS += $(SX_COMPLIB) $(PYTHON_SDK_API) +SX_ACL_HELPER_DEV = sx-acl-helper-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(eval $(call add_derived_package,$(SX_ACL_HELPER),$(SX_ACL_HELPER_DEV))) +SX_ACL_HELPER_DBGSYM = sx-acl-helper-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +ifeq ($(SDK_FROM_SRC),y) +$(eval $(call add_derived_package,$(SX_ACL_HELPER),$(SX_ACL_HELPER_DBGSYM))) +endif + +WJH_LIBS = wjh-libs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(WJH_LIBS)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/wjh-libs +$(WJH_LIBS)_DEPENDS += $(SX_COMPLIB_DEV) $(SXD_LIBS_DEV) $(APPLIBS_DEV) $(SX_ACL_HELPER_DEV) $(SX_SCEW_DEV) +$(WJH_LIBS)_RDEPENDS += $(SX_COMPLIB) $(PYTHON_SDK_API) $(SX_ACL_HELPER) +WJH_LIBS_DEV = wjh-libs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(eval $(call add_derived_package,$(WJH_LIBS),$(WJH_LIBS_DEV))) +WJH_LIBS_DBGSYM = wjh-libs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +ifeq ($(SDK_FROM_SRC),y) +$(eval $(call add_derived_package,$(WJH_LIBS),$(WJH_LIBS_DBGSYM))) +endif + +SX_KERNEL = sx-kernel_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(SX_KERNEL)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(SX_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-kernel +SX_KERNEL_DEV = sx-kernel-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb +$(eval $(call add_derived_package,$(SX_KERNEL),$(SX_KERNEL_DEV))) + +define make_path + $(1)_PATH = $(MLNX_SDK_BASE_PATH) + +endef + +$(eval $(foreach deb,$(MLNX_SDK_DEBS),$(call make_path,$(deb)))) +$(eval $(foreach deb,$(MLNX_SDK_RDEBS),$(call make_path,$(deb)))) +$(eval $(foreach deb,$(PYTHON_SDK_API) $(SX_KERNEL) $(SX_KERNEL_DEV),$(call make_path,$(deb)))) + +SONIC_MAKE_DEBS += $(SX_KERNEL) + +ifeq ($(SDK_FROM_SRC), y) +SONIC_MAKE_DEBS += $(MLNX_SDK_RDEBS) $(PYTHON_SDK_API) +else +SONIC_COPY_DEBS += $(MLNX_SDK_RDEBS) $(PYTHON_SDK_API) +endif + +SONIC_STRETCH_DEBS += $(SX_KERNEL) + +mlnx-sdk-packages: $(addprefix $(DEBS_PATH)/, $(MLNX_SDK_RDEBS) $(PYTHON_SDK_API) $(SX_KERNEL)) + +SONIC_PHONY_TARGETS += mlnx-sdk-packages diff --git a/platform/nephos/docker-ptf-nephos.mk b/platform/nephos/docker-ptf-nephos.mk new file mode 100644 index 00000000000..7fbbd271cf6 --- /dev/null +++ b/platform/nephos/docker-ptf-nephos.mk @@ -0,0 +1,7 @@ +# docker image for docker-ptf-nephos + +DOCKER_PTF_NEPHOS = docker-ptf-nephos.gz +$(DOCKER_PTF_NEPHOS)_PATH = $(DOCKERS_PATH)/docker-ptf-saithrift +$(DOCKER_PTF_NEPHOS)_DEPENDS += $(PYTHON_SAITHRIFT_NEPHOS) +$(DOCKER_PTF_NEPHOS)_LOAD_DOCKERS += $(DOCKER_PTF) +SONIC_DOCKER_IMAGES += $(DOCKER_PTF_NEPHOS) diff --git a/platform/nephos/docker-syncd-nephos-rpc.mk b/platform/nephos/docker-syncd-nephos-rpc.mk new file mode 100644 index 00000000000..dafc43b3e7e --- /dev/null +++ b/platform/nephos/docker-syncd-nephos-rpc.mk @@ -0,0 +1,25 @@ +# docker image for nephos syncd with rpc + +DOCKER_SYNCD_NEPHOS_RPC = docker-syncd-nephos-rpc.gz +$(DOCKER_SYNCD_NEPHOS_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-nephos-rpc +$(DOCKER_SYNCD_NEPHOS_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) +ifeq ($(INSTALL_DEBUG_TOOLS), y) +$(DOCKER_SYNCD_NEPHOS_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) +endif +$(DOCKER_SYNCD_NEPHOS_RPC)_FILES += $(DSSERVE) $(NPX_DIAG) +$(DOCKER_SYNCD_NEPHOS_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_NEPHOS_RPC) +SONIC_STRETCH_DOCKERS += $(DOCKER_SYNCD_NEPHOS_RPC) +ifeq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_NEPHOS_RPC) +endif + +$(DOCKER_SYNCD_NEPHOS_RPC)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_NEPHOS_RPC)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SYNCD_NEPHOS_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_NEPHOS_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot +$(DOCKER_SYNCD_NEPHOS_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd +$(DOCKER_SYNCD_NEPHOS_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro diff --git a/platform/nephos/docker-syncd-nephos-rpc/Dockerfile.j2 b/platform/nephos/docker-syncd-nephos-rpc/Dockerfile.j2 new file mode 100644 index 00000000000..b4b4724e47f --- /dev/null +++ b/platform/nephos/docker-syncd-nephos-rpc/Dockerfile.j2 @@ -0,0 +1,51 @@ +FROM docker-syncd-nephos + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +COPY \ +{% for deb in docker_syncd_nephos_rpc_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get purge -y syncd + +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ +{% for deb in docker_syncd_nephos_rpc_debs.split(' ') -%} +dpkg_apt debs/{{ deb }}{{'; '}} +{%- endfor %} + +## Pre-install the fundamental packages +RUN apt-get update \ + && apt-get -y install \ + net-tools \ + python-pip \ + build-essential \ + libssl-dev \ + libffi-dev \ + python-dev \ + wget \ + cmake \ + && wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ + && tar xvfz 1.0.0.tar.gz \ + && cd nanomsg-1.0.0 \ + && mkdir -p build \ + && cmake . \ + && make install \ + && ldconfig \ + && cd .. \ + && rm -fr nanomsg-1.0.0 \ + && rm -f 1.0.0.tar.gz \ + && pip install cffi==1.7.0 \ + && pip install --upgrade cffi==1.7.0 \ + && pip install nnpy \ + && mkdir -p /opt \ + && cd /opt \ + && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ + && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \ + && rm -rf /root/deps + +COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/nephos/docker-syncd-nephos-rpc/ptf_nn_agent.conf b/platform/nephos/docker-syncd-nephos-rpc/ptf_nn_agent.conf new file mode 100644 index 00000000000..fa1ed0eb162 --- /dev/null +++ b/platform/nephos/docker-syncd-nephos-rpc/ptf_nn_agent.conf @@ -0,0 +1,10 @@ +[program:ptf_nn_agent] +command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-iface-rcv-buffer=109430400 +process_name=ptf_nn_agent +stdout_logfile=/tmp/ptf_nn_agent.out.log +stderr_logfile=/tmp/ptf_nn_agent.err.log +redirect_stderr=false +autostart=true +autorestart=true +startsecs=1 +numprocs=1 diff --git a/platform/nephos/docker-syncd-nephos.mk b/platform/nephos/docker-syncd-nephos.mk new file mode 100644 index 00000000000..6829c91c67a --- /dev/null +++ b/platform/nephos/docker-syncd-nephos.mk @@ -0,0 +1,18 @@ +# docker image for nephos syncd + +DOCKER_SYNCD_PLATFORM_CODE = nephos +include $(PLATFORM_PATH)/../template/docker-syncd-base.mk + +$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) +$(DOCKER_SYNCD_BASE)_FILES += $(DSSERVE) $(NPX_DIAG) + +$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) + +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd + +$(DOCKER_SYNCD_BASE)_BASE_IMAGE_FILES += npx_diag:/usr/bin/npx_diag + diff --git a/platform/nephos/docker-syncd-nephos/Dockerfile.j2 b/platform/nephos/docker-syncd-nephos/Dockerfile.j2 new file mode 100755 index 00000000000..f891ace1e8e --- /dev/null +++ b/platform/nephos/docker-syncd-nephos/Dockerfile.j2 @@ -0,0 +1,46 @@ +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +COPY \ +{% for deb in docker_syncd_nephos_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +COPY \ +{% for deb in docker_syncd_nephos_pydebs.split(' ') -%} +python-debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN apt-get install -y libxml2 + +RUN dpkg -i \ +{% for deb in docker_syncd_nephos_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +##RUN dpkg -i \ +##{% for deb in docker_syncd_nephos_pydebs.split(' ') -%} +##debs/{{ deb }}{{' '}} +##{%- endfor %} + +COPY ["files/dsserve", "files/npx_diag", "start.sh", "/usr/bin/"] +RUN chmod +x /usr/bin/npx_diag /usr/bin/dsserve + +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor/"] + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/nephos/docker-syncd-nephos/base_image_files/npx_diag b/platform/nephos/docker-syncd-nephos/base_image_files/npx_diag new file mode 100755 index 00000000000..876bc1816ec --- /dev/null +++ b/platform/nephos/docker-syncd-nephos/base_image_files/npx_diag @@ -0,0 +1,3 @@ +#!/bin/bash + +docker exec -i syncd npx_diag "$@" diff --git a/platform/nephos/docker-syncd-nephos/critical_processes b/platform/nephos/docker-syncd-nephos/critical_processes new file mode 100644 index 00000000000..489668a89e0 --- /dev/null +++ b/platform/nephos/docker-syncd-nephos/critical_processes @@ -0,0 +1,2 @@ +dsserve +syncd diff --git a/platform/nephos/docker-syncd-nephos/start.sh b/platform/nephos/docker-syncd-nephos/start.sh new file mode 100755 index 00000000000..62331605047 --- /dev/null +++ b/platform/nephos/docker-syncd-nephos/start.sh @@ -0,0 +1,7 @@ +#!/usr/bin/env bash + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +supervisorctl start syncd diff --git a/platform/nephos/docker-syncd-nephos/supervisord.conf b/platform/nephos/docker-syncd-nephos/supervisord.conf new file mode 100644 index 00000000000..c823ab5680e --- /dev/null +++ b/platform/nephos/docker-syncd-nephos/supervisord.conf @@ -0,0 +1,34 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=unexpected +stdout_logfile=syslog +stderr_logfile=syslog + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/nephos/libsaithrift-dev.mk b/platform/nephos/libsaithrift-dev.mk new file mode 100644 index 00000000000..e21ebc5c682 --- /dev/null +++ b/platform/nephos/libsaithrift-dev.mk @@ -0,0 +1,20 @@ +# libsaithrift-dev package + +SAI_VER = 0.9.4 + +LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_amd64.deb +$(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI +$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(NEPHOS_SAI) $(NEPHOS_SAI_DEV) +$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) $(NEPHOS_SAI) +SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV) + +PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_amd64.deb +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT))) + +SAISERVER = saiserver_$(SAI_VER)_amd64.deb +$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(NEPHOS_SAI) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER))) + +SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_amd64.deb +$(SAISERVER_DBG)_RDEPENDS += $(SAISERVER) +$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER_DBG))) diff --git a/platform/nephos/nephos-modules.mk b/platform/nephos/nephos-modules.mk new file mode 100644 index 00000000000..b76141b4066 --- /dev/null +++ b/platform/nephos/nephos-modules.mk @@ -0,0 +1,26 @@ +# Nephos Platform modules + +VERSION = 1.0.0 + +ifneq ($(NEPHOS_SAI_DEB_LOCAL_URL), ) +SDK_FROM_LOCAL = y +else +SDK_FROM_LOCAL = n +endif + +SDK_VERSION = 3.0.0 +LINUX_VER = 4.9.0-9-2 +SDK_COMMIT_ID = 529202 + +ifeq ($(SAI_FROM_LOCAL), y) +NEPHOS_MODULE = nps-modules-$(LINUX_VER)_$(SDK_VERSION)_$(SDK_COMMIT_ID)_amd64.deb +$(NEPHOS_MODULE)_PATH = $(NEPHOS_SAI_DEB_LOCAL_URL) +SONIC_COPY_DEBS += $(NEPHOS_MODULE) +else +NEPHOS_MODULE = nephos-modules_$(VERSION)_amd64.deb +$(NEPHOS_MODULE)_SRC_PATH = $(PLATFORM_PATH)/nephos-modules +$(NEPHOS_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +SONIC_DPKG_DEBS += $(NEPHOS_MODULE) +endif + +SONIC_STRETCH_DEBS += $(NEPHOS_MODULE) diff --git a/platform/nephos/nephos-modules/README.md b/platform/nephos/nephos-modules/README.md new file mode 100644 index 00000000000..6bb4cf6bf65 --- /dev/null +++ b/platform/nephos/nephos-modules/README.md @@ -0,0 +1,2 @@ +# Nephos-modules +Device drivers for support of Nephos platform for the SONiC project diff --git a/platform/nephos/nephos-modules/debian/changelog b/platform/nephos/nephos-modules/debian/changelog new file mode 100644 index 00000000000..3de2bd045ef --- /dev/null +++ b/platform/nephos/nephos-modules/debian/changelog @@ -0,0 +1,5 @@ +nephos-modules (1.0.0) unstable; urgency=low + + * Initial release + + -- Support Fri, 15 Mar 2019 15:54:00 +0800 diff --git a/platform/nephos/nephos-modules/debian/compat b/platform/nephos/nephos-modules/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/nephos/nephos-modules/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/nephos/nephos-modules/debian/control b/platform/nephos/nephos-modules/debian/control new file mode 100644 index 00000000000..f5e6e00d13c --- /dev/null +++ b/platform/nephos/nephos-modules/debian/control @@ -0,0 +1,12 @@ +Source: nephos-modules +Section: main +Priority: extra +Maintainer: support +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: nephos-modules +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for nephos asic + diff --git a/platform/nephos/nephos-modules/debian/rules b/platform/nephos/nephos-modules/debian/rules new file mode 100755 index 00000000000..acf96c80e10 --- /dev/null +++ b/platform/nephos/nephos-modules/debian/rules @@ -0,0 +1,34 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +PACKAGE_NAME := nephos-modules +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +SERVICE_DIR := service +INITD_DIR := init.d +MODULE_SRC := $(shell pwd)/modules +CURRENT_DIR := $(cd "$(dirname "$0")"; pwd) + +%: + dh $@ + +override_dh_auto_build: + make -C $(MODULE_SRC) + +override_dh_auto_install: + dh_installdirs -p$(PACKAGE_NAME) $(KERNEL_SRC)/extra + cp $(MODULE_SRC)/build/module/*.ko debian/$(PACKAGE_NAME)/$(KERNEL_SRC)/extra + dh_installdirs -p$(PACKAGE_NAME) /lib/systemd/system + cp $(MODULE_SRC)/service/*.service debian/$(PACKAGE_NAME)/lib/systemd/system/ + dh_installdirs -p$(PACKAGE_NAME) /etc/init.d + cp $(MODULE_SRC)/init.d/* debian/$(PACKAGE_NAME)/etc/init.d/ + +override_dh_usrlocal: + +override_dh_pysupport: + +override_dh_clean: + dh_clean + test -d $(MODULE_SRC)/build || rm -rf $(MODULE_SRC)/build + diff --git a/platform/nephos/nephos-modules/modules/Makefile b/platform/nephos/nephos-modules/modules/Makefile new file mode 100755 index 00000000000..8351996b04e --- /dev/null +++ b/platform/nephos/nephos-modules/modules/Makefile @@ -0,0 +1,50 @@ +################################################################################ +# Copyright (C) 2019 Nephos, Inc. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of version 2 of the GNU General Public +# License as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 along with this program. +################################################################################ +NPS_MODULES_DIR := $(dir $(realpath $(lastword $(MAKEFILE_LIST)))) +SRC_PATH := $(NPS_MODULES_DIR)/src +INC_PATH := $(SRC_PATH)/inc +################################################################################ +include $(NPS_MODULES_DIR)/config.mk +################################################################################ +MODULE_OUTPUT_DIR := $(BUILD_OUTPUT_DIR)/module +################################################################################ +all: compile install +################################################################################ +EXTRA_CFLAGS += -I$(INC_PATH) +EXTRA_CFLAGS += -DNPS_EN_NETIF +EXTRA_CFLAGS += -DNPS_EN_TAURUS +EXTRA_CFLAGS += -DNPS_LINUX_USER_MODE +EXTRA_CFLAGS += -DNPS_EN_LITTLE_ENDIAN +ifeq ($(shell uname -m),x86_64) +EXTRA_CFLAGS += -DNPS_EN_HOST_64_BIT_LITTLE_ENDIAN +else +EXTRA_CFLAGS += -DNPS_EN_HOST_32_BIT_LITTLE_ENDIAN +endif +################################################################################ +include $(SRC_PATH)/make.mk +################################################################################ +compile:: + +install:: + $(TEST_PATH) $(MODULE_OUTPUT_DIR) || $(MKDIR) $(MODULE_OUTPUT_DIR) + $(MV) $(BUILD_OUTPUT_DIR)/$(DEV_MODULE_NAME).ko $(MODULE_OUTPUT_DIR)/$(DEV_MODULE_NAME).ko + $(MV) $(BUILD_OUTPUT_DIR)/$(NETIF_MODULE_NAME).ko $(MODULE_OUTPUT_DIR)/$(NETIF_MODULE_NAME).ko + +clean:: + $(RM) $(BUILD_OUTPUT_DIR) + +.PHONY: all compile install clean +.NOTPARALLEL: all compile install clean diff --git a/platform/nephos/nephos-modules/modules/README b/platform/nephos/nephos-modules/modules/README new file mode 100644 index 00000000000..b2e6fb14793 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/README @@ -0,0 +1,32 @@ +################################################################################ +# Copyright (C) 2019 Nephos, Inc. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of version 2 of the GNU General Public +# License as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 along with this program. +################################################################################ +Step 1~4 show how to build and execute NPS kernel modules. + +1. Modify nps-modules/config.mk to specify the output directory to BUILD_OUTPUT_DIR. + The default output path is nps-modules/build. + +2. Compile: + cd nps-modules/ && make + +3. The output kernel modules will be found in $(BUILD_OUTPUT_DIR)/modules/ + - nps_dev.ko + - nps_netif.ko + +4. Load modules: + (1) insmod nps_dev.ko + (2) insmod nps_netif.ko + + Note that the module inserting sequence cannot be changed. diff --git a/platform/nephos/nephos-modules/modules/config.mk b/platform/nephos/nephos-modules/modules/config.mk new file mode 100755 index 00000000000..b7a106ea0a4 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/config.mk @@ -0,0 +1,30 @@ +################################################################################ +# Copyright (C) 2019 Nephos, Inc. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of version 2 of the GNU General Public +# License as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 along with this program. +################################################################################ +BUILD_OUTPUT_DIR := $(NPS_MODULES_DIR)/build +################################################################################ +#OS_PATH := /lib/modules/$(shell uname -r)/build +OS_PATH := /lib/modules/$(KVERSION)/build + +################################################################################ +MAKE := make +RM := rm -rf +MKDIR := mkdir -p +CP := cp +MV := mv +TEST_PATH := test -d +################################################################################ +export BUILD_OUTPUT_DIR +export OS_PATH diff --git a/platform/nephos/nephos-modules/modules/init.d/nps-modules-4.9.0-9-2-amd64 b/platform/nephos/nephos-modules/modules/init.d/nps-modules-4.9.0-9-2-amd64 new file mode 100755 index 00000000000..366ca6b0845 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/init.d/nps-modules-4.9.0-9-2-amd64 @@ -0,0 +1,54 @@ +#!/bin/bash +# This script load/unload nps kernel modules + +### BEGIN INIT INFO +# Provides: load-nps-modules +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Load nps kernel modules +### END INIT INFO + +case "$1" in +start) + echo -n "Load nps kernel modules... " + + RMEM_SIZE=`cat /proc/sys/net/core/rmem_max` + if [ $RMEM_SIZE -lt 8388608 ]; then + echo "8388608" > /proc/sys/net/core/rmem_max + fi + WMEM_SIZE=`cat /proc/sys/net/core/wmem_max` + if [ $WMEM_SIZE -lt 25165824 ]; then + echo "25165824" > /proc/sys/net/core/wmem_max + fi + + modprobe nps_dev + modprobe nps_netif + + echo "done." + ;; + +stop) + echo -n "Unload nps kernel modules... " + + rmmod nps_netif + rmmod nps_dev + + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/nps-modules-4.9.0-9-2-amd64.init {start|stop}" + exit 1 + ;; +esac + +exit 0 + diff --git a/platform/nephos/nephos-modules/modules/service/nps-modules-4.9.0-9-2-amd64.service b/platform/nephos/nephos-modules/modules/service/nps-modules-4.9.0-9-2-amd64.service new file mode 100644 index 00000000000..246226ea9d4 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/service/nps-modules-4.9.0-9-2-amd64.service @@ -0,0 +1,13 @@ +[Unit] +Description=Nephos kernel modules init +After=local-fs.target +Before=syncd.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/nps-modules-4.9.0-9-2-amd64 start +ExecStop=-/etc/init.d/nps-modules-4.9.0-9-2-amd64 stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/nephos/nephos-modules/modules/src/hal_tau_pkt_knl.c b/platform/nephos/nephos-modules/modules/src/hal_tau_pkt_knl.c new file mode 100755 index 00000000000..b386da63e24 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/hal_tau_pkt_knl.c @@ -0,0 +1,6147 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: hal_tau_pkt_knl.c + * PURPOSE: + * To provide Linux kernel for PDMA TX/RX control. + * + * NOTES: + * + */ + +/***************************************************************************** + * INCLUDE FILE DECLARATIONS + ***************************************************************************** + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* netif */ +#include +#include +#include + +/* nps_sdk */ +#include + +/***************************************************************************** + * CHIP DEPENDENT VARIABLES + ***************************************************************************** + */ +/* Interrupt */ +#define HAL_TAU_PKT_ERR_REG(__unit__) (_hal_tau_pkt_intr_vec[0].intr_reg) +#define HAL_TAU_PKT_TCH_REG(__unit__, __channel__) (_hal_tau_pkt_intr_vec[1 + (__channel__)].intr_reg) +#define HAL_TAU_PKT_RCH_REG(__unit__, __channel__) (_hal_tau_pkt_intr_vec[5 + (__channel__)].intr_reg) + +#define HAL_TAU_PKT_ERR_EVENT(__unit__) (&_hal_tau_pkt_intr_vec[0].intr_event) +#define HAL_TAU_PKT_TCH_EVENT(__unit__, __channel__) (&_hal_tau_pkt_intr_vec[1 + (__channel__)].intr_event) +#define HAL_TAU_PKT_RCH_EVENT(__unit__, __channel__) (&_hal_tau_pkt_intr_vec[5 + (__channel__)].intr_event) + +#define HAL_TAU_PKT_ERR_CNT(__unit__) (_hal_tau_pkt_intr_vec[0].intr_cnt) +#define HAL_TAU_PKT_TCH_CNT(__unit__, __channel__) (_hal_tau_pkt_intr_vec[1 + (__channel__)].intr_cnt) +#define HAL_TAU_PKT_RCH_CNT(__unit__, __channel__) (_hal_tau_pkt_intr_vec[5 + (__channel__)].intr_cnt) + + +/* This flag value will be specified when user inserts kernel module. */ +#define HAL_TAU_PKT_DBG_ERR (0x1 << 0) +#define HAL_TAU_PKT_DBG_TX (0x1 << 1) +#define HAL_TAU_PKT_DBG_RX (0x1 << 2) +#define HAL_TAU_PKT_DBG_INTF (0x1 << 3) +#define HAL_TAU_PKT_DBG_PROFILE (0x1 << 4) +#define HAL_TAU_PKT_DBG_COMMON (0x1 << 5) + +/* Will be set when inserting kernel module */ +static UI32_T dbg_flag = 0; + +#define HAL_TAU_PKT_DBG(__flag__, ...) do \ +{ \ + if (0 != ((__flag__) & (dbg_flag))) \ + { \ + osal_printf(__VA_ARGS__); \ + } \ +}while (0) + +typedef struct +{ + UI32_T intr_reg; + NPS_SEMAPHORE_ID_T intr_event; + UI32_T intr_cnt; + +} HAL_TAU_PKT_INTR_VEC_T; + +typedef struct HAL_TAU_PKT_PROFILE_NODE_S +{ + HAL_TAU_PKT_NETIF_PROFILE_T *ptr_profile; + struct HAL_TAU_PKT_PROFILE_NODE_S *ptr_next_node; + +} HAL_TAU_PKT_PROFILE_NODE_T; + +typedef struct +{ + HAL_TAU_PKT_NETIF_INTF_T meta; + struct net_device *ptr_net_dev; + HAL_TAU_PKT_PROFILE_NODE_T *ptr_profile_list; /* the profiles binding to this interface */ + +} HAL_TAU_PKT_NETIF_PORT_DB_T; + + +static HAL_TAU_PKT_INTR_VEC_T _hal_tau_pkt_intr_vec[] = +{ + { /* 0: PDMA_ERR */ 1 << 0, 0x0, 0 }, + { /* 1: TX_CH0 */ 1 << 28, 0x0, 0 }, + { /* 2: TX_CH1 */ 1 << 29, 0x0, 0 }, + { /* 3: TX_CH2 */ 1 << 30, 0x0, 0 }, + { /* 4: TX_CH3 */ 1 << 31, 0x0, 0 }, + { /* 5: RX_CH0 */ 1 << 12, 0x0, 0 }, + { /* 6: RX_CH1 */ 1 << 13, 0x0, 0 }, + { /* 7: RX_CH2 */ 1 << 14, 0x0, 0 }, + { /* 8: RX_CH3 */ 1 << 15, 0x0, 0 }, +}; + +/***************************************************************************** + * NAMING CONSTANT DECLARATIONS + ***************************************************************************** + */ +/* Sleep Time Definitions */ +#define HAL_TAU_PKT_TX_DEQUE_SLEEP() osal_sleepThread(1000) /* us */ +#define HAL_TAU_PKT_RX_DEQUE_SLEEP() osal_sleepThread(1000) /* us */ +#define HAL_TAU_PKT_TX_ENQUE_RETRY_SLEEP() osal_sleepThread(1000) /* us */ +#define HAL_TAU_PKT_RX_ENQUE_RETRY_SLEEP() osal_sleepThread(1000) /* us */ +#define HAL_TAU_PKT_ALLOC_MEM_RETRY_SLEEP() osal_sleepThread(1000) /* us */ + +/* Network Device Definitions */ +#define HAL_TAU_PKT_TX_TIMEOUT (6*HZ) +#define HAL_TAU_PKT_MAX_ETH_FRAME_SIZE (HAL_TAU_PKT_RX_MAX_LEN) +#define HAL_TAU_PKT_MAX_PORT_NUM (HAL_TAU_PORT_NUM + 1) /* CPU port */ + +#define HAL_TAU_PKT_NET_PROFILE_NUM_MAX (256) + +static HAL_TAU_PKT_NETIF_PROFILE_T *_ptr_hal_tau_pkt_profile_entry[HAL_TAU_PKT_NET_PROFILE_NUM_MAX] = {0}; +static HAL_TAU_PKT_NETIF_PORT_DB_T _hal_tau_pkt_port_db[HAL_TAU_PKT_MAX_PORT_NUM]; + +/***************************************************************************** + * MACRO VLAUE DECLARATIONS + ***************************************************************************** + */ + +/***************************************************************************** + * MACRO FUNCTION DECLARATIONS + ***************************************************************************** + */ +/*---------------------------------------------------------------------------*/ +#define HAL_TAU_PKT_GET_DRV_CB_PTR(unit) (&_hal_tau_pkt_drv_cb[unit]) +/*---------------------------------------------------------------------------*/ +#define HAL_TAU_PKT_GET_TX_CB_PTR(unit) (&_hal_tau_pkt_tx_cb[unit]) +#define HAL_TAU_PKT_GET_TX_PDMA_PTR(unit, channel) (&_hal_tau_pkt_tx_cb[unit].pdma[channel]) +#define HAL_TAU_PKT_GET_TX_GPD_PTR(unit, channel, gpd) (&_hal_tau_pkt_tx_cb[unit].pdma[channel].ptr_gpd_align_start_addr[gpd]) +/*---------------------------------------------------------------------------*/ +#define HAL_TAU_PKT_GET_RX_CB_PTR(unit) (&_hal_tau_pkt_rx_cb[unit]) +#define HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, channel) (&_hal_tau_pkt_rx_cb[unit].pdma[channel]) +#define HAL_TAU_PKT_GET_RX_GPD_PTR(unit, channel, gpd) (&_hal_tau_pkt_rx_cb[unit].pdma[channel].ptr_gpd_align_start_addr[gpd]) +/*---------------------------------------------------------------------------*/ +#define HAL_TAU_PKT_GET_PORT_DB(port) (&_hal_tau_pkt_port_db[port]) +#define HAL_TAU_PKT_GET_PORT_PROFILE_LIST(port) (_hal_tau_pkt_port_db[port].ptr_profile_list) +#define HAL_TAU_PKT_GET_PORT_NETDEV(port) _hal_tau_pkt_port_db[port].ptr_net_dev + +/***************************************************************************** + * DATA TYPE DECLARATIONS + ***************************************************************************** + */ +/* ----------------------------------------------------------------------------------- General structure */ +typedef struct +{ + UI32_T unit; + UI32_T channel; + +} HAL_TAU_PKT_ISR_COOKIE_T; + +typedef struct +{ + NPS_HUGE_T que_id; + NPS_SEMAPHORE_ID_T sema; + UI32_T len; /* Software CPU queue maximum length. */ + UI32_T weight; /* The weight for thread de-queue algorithm. */ + +} HAL_TAU_PKT_SW_QUEUE_T; + +typedef struct +{ + /* handleErrorTask */ + NPS_THREAD_ID_T err_task_id; + + /* INTR dispatcher */ + NPS_ISRLOCK_ID_T intr_lock; + UI32_T intr_bitmap; + +#define HAL_TAU_PKT_INIT_DRV (1 << 0) +#define HAL_TAU_PKT_INIT_TASK (1 << 1) +#define HAL_TAU_PKT_INIT_INTR (1 << 2) +#define HAL_TAU_PKT_INIT_RX_START (1 << 3) + /* a bitmap to record the init status */ + UI32_T init_flag; + +} HAL_TAU_PKT_DRV_CB_T; + +/* ----------------------------------------------------------------------------------- TX structure */ +typedef struct +{ + /* NPS_SEMAPHORE_ID_T sema; */ + + /* since the Tx GPD ring may be accessed by multiple process including + * ndo_start_xmit (SW IRQ), it must be protected with an ISRLOCK + * instead of the original semaphore + */ + NPS_ISRLOCK_ID_T ring_lock; + + UI32_T used_idx; /* SW send index = LAMP simulate the Tx HW index */ + UI32_T free_idx; /* SW free index */ + UI32_T used_gpd_num; + UI32_T free_gpd_num; + UI32_T gpd_num; + + HAL_TAU_PKT_TX_GPD_T *ptr_gpd_start_addr; + HAL_TAU_PKT_TX_GPD_T *ptr_gpd_align_start_addr; + BOOL_T err_flag; + + /* ASYNC */ + HAL_TAU_PKT_TX_SW_GPD_T **pptr_sw_gpd_ring; + HAL_TAU_PKT_TX_SW_GPD_T **pptr_sw_gpd_bulk; /* temporary store packets to be enque */ + + /* SYNC_INTR */ + NPS_SEMAPHORE_ID_T sync_intr_sema; + +} HAL_TAU_PKT_TX_PDMA_T; + +typedef struct +{ + HAL_TAU_PKT_TX_WAIT_T wait_mode; + HAL_TAU_PKT_TX_PDMA_T pdma[HAL_TAU_PKT_TX_CHANNEL_LAST]; + HAL_TAU_PKT_TX_CNT_T cnt; + + /* handleTxDoneTask */ + NPS_THREAD_ID_T isr_task_id[HAL_TAU_PKT_TX_CHANNEL_LAST]; + HAL_TAU_PKT_ISR_COOKIE_T isr_task_cookie[HAL_TAU_PKT_TX_CHANNEL_LAST]; + + /* txTask */ + HAL_TAU_PKT_SW_QUEUE_T sw_queue; + NPS_SEMAPHORE_ID_T sync_sema; + NPS_THREAD_ID_T task_id; + BOOL_T running; /* TRUE when Init txTask + * FALSE when Destroy txTask + */ + +} HAL_TAU_PKT_TX_CB_T; + +/* ----------------------------------------------------------------------------------- RX structure */ +typedef struct +{ + NPS_SEMAPHORE_ID_T sema; + UI32_T cur_idx; /* SW free index */ + UI32_T gpd_num; + + HAL_TAU_PKT_RX_GPD_T *ptr_gpd_start_addr; + HAL_TAU_PKT_RX_GPD_T *ptr_gpd_align_start_addr; + BOOL_T err_flag; + struct sk_buff **pptr_skb_ring; +} HAL_TAU_PKT_RX_PDMA_T; + +typedef struct +{ + /* Rx system configuration */ + UI32_T buf_len; + + HAL_TAU_PKT_RX_SCHED_T sched_mode; + HAL_TAU_PKT_RX_PDMA_T pdma[HAL_TAU_PKT_RX_CHANNEL_LAST]; + HAL_TAU_PKT_RX_CNT_T cnt; + + /* handleRxDoneTask */ + NPS_THREAD_ID_T isr_task_id[HAL_TAU_PKT_RX_CHANNEL_LAST]; + HAL_TAU_PKT_ISR_COOKIE_T isr_task_cookie[HAL_TAU_PKT_RX_CHANNEL_LAST]; + + /* rxTask */ + HAL_TAU_PKT_SW_QUEUE_T sw_queue[HAL_TAU_PKT_RX_QUEUE_NUM]; + UI32_T deque_idx; + NPS_SEMAPHORE_ID_T sync_sema; + NPS_THREAD_ID_T task_id; + NPS_SEMAPHORE_ID_T deinit_sema; /* To sync-up the Rx-stop and thread flush queues */ + BOOL_T running; /* TRUE when rxStart + * FALSE when rxStop + */ + +} HAL_TAU_PKT_RX_CB_T; + +/* ----------------------------------------------------------------------------------- Network Device */ +struct net_device_priv +{ + struct net_device *ptr_net_dev; + struct net_device_stats stats; + UI32_T unit; + UI32_T id; + UI32_T port; + UI16_T vlan; + UI32_T speed; +}; + +typedef enum +{ + HAL_TAU_PKT_DEST_NETDEV = 0, + HAL_TAU_PKT_DEST_SDK, + HAL_TAU_PKT_DEST_DROP, + HAL_TAU_PKT_DEST_LAST +} HAL_TAU_PKT_DEST_T; + +/***************************************************************************** + * GLOBAL VARIABLE DECLARATIONS + ***************************************************************************** + */ + +/***************************************************************************** + * STATIC VARIABLE DECLARATIONS + ***************************************************************************** + */ +/*---------------------------------------------------------------------------*/ +static HAL_TAU_PKT_DRV_CB_T _hal_tau_pkt_drv_cb[NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM]; +static HAL_TAU_PKT_TX_CB_T _hal_tau_pkt_tx_cb[NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM]; +static HAL_TAU_PKT_RX_CB_T _hal_tau_pkt_rx_cb[NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM]; +/*---------------------------------------------------------------------------*/ + +/***************************************************************************** + * LOCAL SUBPROGRAM DECLARATIONS + ***************************************************************************** + */ +/* ----------------------------------------------------------------------------------- Interrupt */ +static NPS_ERROR_NO_T +_hal_tau_pkt_enableIntr( + const UI32_T unit, + const UI32_T intr_bitmap) +{ + HAL_TAU_PKT_DRV_CB_T *ptr_cb = HAL_TAU_PKT_GET_DRV_CB_PTR(unit); + NPS_IRQ_FLAGS_T irq_flag = 0; + UI32_T intr_en = 0; + + osal_takeIsrLock(&ptr_cb->intr_lock, &irq_flag); + osal_mdc_readPciReg(unit, HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_CP_COMMON_INT_EN_HI), &intr_en, sizeof(intr_en)); + intr_en |= intr_bitmap; + osal_mdc_writePciReg(unit, HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_CP_COMMON_INT_EN_HI), &intr_en, sizeof(intr_en)); + osal_giveIsrLock(&ptr_cb->intr_lock, &irq_flag); + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_disableIntr( + const UI32_T unit, + const UI32_T intr_bitmap) +{ + HAL_TAU_PKT_DRV_CB_T *ptr_cb = HAL_TAU_PKT_GET_DRV_CB_PTR(unit); + NPS_IRQ_FLAGS_T irq_flag = 0; + UI32_T intr_en = 0; + + osal_takeIsrLock(&ptr_cb->intr_lock, &irq_flag); + osal_mdc_readPciReg(unit, HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_CP_COMMON_INT_EN_HI), &intr_en, sizeof(intr_en)); + intr_en &= ~intr_bitmap; + osal_mdc_writePciReg(unit, HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_CP_COMMON_INT_EN_HI), &intr_en, sizeof(intr_en)); + osal_giveIsrLock(&ptr_cb->intr_lock, &irq_flag); + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_maskIntr( + const UI32_T unit, + const UI32_T intr_bitmap) +{ + HAL_TAU_PKT_DRV_CB_T *ptr_cb = HAL_TAU_PKT_GET_DRV_CB_PTR(unit); + NPS_IRQ_FLAGS_T irq_flag = 0; + + osal_takeIsrLock(&ptr_cb->intr_lock, &irq_flag); + osal_mdc_writePciReg(unit, HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_CP_COMMON_INT_MASK_CLR_HI), &intr_bitmap, sizeof(intr_bitmap)); + osal_giveIsrLock(&ptr_cb->intr_lock, &irq_flag); + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_unmaskIntr( + const UI32_T unit, + const UI32_T intr_bitmap) +{ + HAL_TAU_PKT_DRV_CB_T *ptr_cb = HAL_TAU_PKT_GET_DRV_CB_PTR(unit); + NPS_IRQ_FLAGS_T irq_flag = 0; + + osal_takeIsrLock(&ptr_cb->intr_lock, &irq_flag); + osal_mdc_writePciReg(unit, HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_CP_COMMON_INT_MASK_SET_HI), &intr_bitmap, sizeof(intr_bitmap)); + osal_giveIsrLock(&ptr_cb->intr_lock, &irq_flag); + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_dispatcher( + void *ptr_cookie) +{ + UI32_T unit = (UI32_T)((NPS_HUGE_T)ptr_cookie); + HAL_TAU_PKT_DRV_CB_T *ptr_cb = HAL_TAU_PKT_GET_DRV_CB_PTR(unit); + NPS_IRQ_FLAGS_T irq_flag = 0; + + UI32_T idx = 0, vec = sizeof(_hal_tau_pkt_intr_vec) / sizeof(HAL_TAU_PKT_INTR_VEC_T); + UI32_T intr_mask = ptr_cb->intr_bitmap; + UI32_T intr_unmask = 0; + UI32_T intr_status = 0; + + /* MASK, READ and CLEAR PKT IRQs */ + osal_takeIsrLock(&ptr_cb->intr_lock, &irq_flag); + osal_mdc_writePciReg(unit, HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_CP_COMMON_INT_MASK_CLR_HI), &intr_mask, sizeof(UI32_T)); + osal_mdc_readPciReg (unit, HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_CP_COMMON_INT_STAT_HI), &intr_status, sizeof(UI32_T)); + intr_status = intr_status & intr_mask; + osal_mdc_writePciReg(unit, HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_CP_COMMON_INT_CLR_HI), &intr_status, sizeof(UI32_T)); + osal_giveIsrLock(&ptr_cb->intr_lock, &irq_flag); + + /* Module thread handle and unmask the interrupt */ + intr_unmask = intr_status ^ intr_mask; + if (0x0 != intr_status) + { + for (idx = 0; idx < vec; idx++) + { + if (_hal_tau_pkt_intr_vec[idx].intr_reg & intr_status) + { + osal_triggerEvent(&_hal_tau_pkt_intr_vec[idx].intr_event); + _hal_tau_pkt_intr_vec[idx].intr_cnt++; + } + } + } + + /* UNMASK other PKT IRQs */ + osal_takeIsrLock(&ptr_cb->intr_lock, &irq_flag); + osal_mdc_writePciReg(unit, HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_CP_COMMON_INT_MASK_SET_HI), &intr_unmask, sizeof(UI32_T)); + osal_giveIsrLock(&ptr_cb->intr_lock, &irq_flag); + + return (NPS_E_OK); +} + +/* ----------------------------------------------------------------------------------- RW HW Regs */ +/* FUNCTION NAME: _hal_tau_pkt_startTxChannelReg + * PURPOSE: + * To issue "START" command to the target TX channel. + * INPUT: + * unit -- The unit ID + * channel -- The target TX channel + * gpd_num -- The GPD ring length of the channel + * OUTPUT: + * None. + * RETURN: + * NPS_E_OK -- Successfully configure the register. + * NPS_E_OTHERS -- Configure the register failed. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_startTxChannelReg( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel, + const UI32_T gpd_num) +{ + HAL_TAU_PKT_TCH_CMD_REG_T tch_cmd; + + tch_cmd.reg = 0x0; + tch_cmd.field.tch_start = 0x1; + tch_cmd.field.tch_gpd_add_no_lo = gpd_num & 0xff; + tch_cmd.field.tch_gpd_add_no_hi = (gpd_num & 0xff00) >> 8; + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_TCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_TCH_CMD), channel), + &tch_cmd.reg, sizeof(HAL_TAU_PKT_TCH_CMD_REG_T)); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_startRxChannelReg + * PURPOSE: + * To issue "START" command to the target RX channel. + * INPUT: + * unit -- The unit ID + * channel -- The target RX channel + * gpd_num -- The GPD ring length of the channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully configure the register. + * NPS_E_OTHERS -- Configure the register failed. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_startRxChannelReg( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel, + const UI32_T gpd_num) +{ + HAL_TAU_PKT_RCH_CMD_REG_T rch_cmd; + + rch_cmd.reg = 0x0; + rch_cmd.field.rch_start = 0x1; + rch_cmd.field.rch_gpd_add_no_lo = gpd_num & 0xff; + rch_cmd.field.rch_gpd_add_no_hi = (gpd_num & 0xff00) >> 8; + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_RCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_RCH_CMD), channel), + &rch_cmd.reg, sizeof(HAL_TAU_PKT_RCH_CMD_REG_T)); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_resumeTxChannelReg + * PURPOSE: + * To issue "RESUME" command to the target TX channel. + * INPUT: + * unit -- The unit ID + * channel -- The target TX channel + * gpd_num -- The GPD ring length of the channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully configure the register. + * NPS_E_OTHERS -- Configure the register failed. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_resumeTxChannelReg( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel, + const UI32_T gpd_num) +{ + HAL_TAU_PKT_TCH_CMD_REG_T tch_cmd; + + tch_cmd.reg = 0x0; + tch_cmd.field.tch_resume = 0x1; + tch_cmd.field.tch_gpd_add_no_lo = gpd_num & 0xff; + tch_cmd.field.tch_gpd_add_no_hi = (gpd_num & 0xff00) >> 8; + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_TCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_TCH_CMD), channel), + &tch_cmd.reg, sizeof(HAL_TAU_PKT_TCH_CMD_REG_T)); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_resumeRxChannelReg + * PURPOSE: + * To issue "RESUME" command to the target RX channel. + * INPUT: + * unit -- The unit ID + * channel -- The target RX channel + * gpd_num -- The GPD ring length of the channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully configure the register. + * NPS_E_OTHERS -- Configure the register failed. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_resumeRxChannelReg( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel, + const UI32_T gpd_num) +{ + HAL_TAU_PKT_RCH_CMD_REG_T rch_cmd; + + rch_cmd.reg = 0x0; + rch_cmd.field.rch_resume = 0x1; + rch_cmd.field.rch_gpd_add_no_lo = gpd_num & 0xff; + rch_cmd.field.rch_gpd_add_no_hi = (gpd_num & 0xff00) >> 8; + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_RCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_RCH_CMD), channel), + &rch_cmd.reg, sizeof(HAL_TAU_PKT_RCH_CMD_REG_T)); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_stopTxChannelReg + * PURPOSE: + * To issue "STOP" command to the target TX channel. + * INPUT: + * unit -- The unit ID + * channel -- The target TX channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully configure the register. + * NPS_E_OTHERS -- Configure the register failed. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_stopTxChannelReg( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel) +{ + HAL_TAU_PKT_TCH_CMD_REG_T tch_cmd; + + tch_cmd.reg = 0x0; + tch_cmd.field.tch_stop = 0x1; + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_TCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_TCH_CMD), channel), + &tch_cmd.reg, sizeof(HAL_TAU_PKT_TCH_CMD_REG_T)); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_stopRxChannelReg + * PURPOSE: + * To issue "STOP" command to the target RX channel. + * INPUT: + * unit -- The unit ID + * channel -- The target RX channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully configure the register. + * NPS_E_OTHERS -- Configure the register failed. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_stopRxChannelReg( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel) +{ + HAL_TAU_PKT_RCH_CMD_REG_T rch_cmd; + + rch_cmd.reg = 0x0; + rch_cmd.field.rch_stop = 0x1; + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_RCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_RCH_CMD), channel), + &rch_cmd.reg, sizeof(HAL_TAU_PKT_RCH_CMD_REG_T)); + + return (NPS_E_OK); +} + +/* ----------------------------------------------------------------------------------- Init HW Regs */ +/* FUNCTION NAME: _hal_tau_pkt_setTxGpdStartAddrReg + * PURPOSE: + * To configure the start address and the length of target GPD ring of TX channel. + * INPUT: + * unit -- The unit ID + * channel -- The target TX channel + * gpd_start_addr -- The start address of the GPD ring + * gpd_ring_sz -- The size of the GPD ring + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully configure the register. + * NPS_E_OTHERS -- Configure the register failed. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_setTxGpdStartAddrReg( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel, + const NPS_ADDR_T gpd_start_addr, + const UI32_T gpd_ring_sz) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + UI32_T tch_gpd_ring_start_addr_lo = 0; + UI32_T tch_gpd_ring_start_addr_hi = 0; + UI32_T tch_gpd_ring_size = 0; + + /* Configure the low 32-bit address. */ + tch_gpd_ring_start_addr_lo = (UI32_T)NPS_ADDR_64_LOW(gpd_start_addr); + + rc = osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_TCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_TCH_GPD_RING_START_ADDR_LO), channel), + &tch_gpd_ring_start_addr_lo, sizeof(UI32_T)); + + /* Configure the high 32-bit address. */ + if (NPS_E_OK == rc) + { + tch_gpd_ring_start_addr_hi = (UI32_T)NPS_ADDR_64_HI(gpd_start_addr); + + rc = osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_TCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_TCH_GPD_RING_START_ADDR_HI), channel), + &tch_gpd_ring_start_addr_hi, sizeof(UI32_T)); + } + + /* Configure the GPD ring size. */ + if (NPS_E_OK == rc) + { + tch_gpd_ring_size = gpd_ring_sz; + + rc = osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_TCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_TCH_GPD_RING_SIZE), channel), + &tch_gpd_ring_size, sizeof(UI32_T)); + } + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_setRxGpdStartAddrReg + * PURPOSE: + * To configure the start address and the length of target GPD ring of RX channel. + * INPUT: + * unit -- The unit ID + * channel -- The target RX channel + * gpd_start_addr -- The start address of the GPD ring + * gpd_ring_sz -- The size of the GPD ring + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully configure the register. + * NPS_E_OTHERS -- Configure the register failed. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_setRxGpdStartAddrReg( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel, + const NPS_ADDR_T gpd_start_addr, + const UI32_T gpd_ring_sz) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + UI32_T rch_gpd_ring_start_addr_lo = 0; + UI32_T rch_gpd_ring_start_addr_hi = 0; + UI32_T rch_gpd_ring_size = 0; + + /* Configure the low 32-bit address. */ + rch_gpd_ring_start_addr_lo = (UI32_T)NPS_ADDR_64_LOW(gpd_start_addr); + + rc = osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_RCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_RCH_GPD_RING_START_ADDR_LO), channel), + &rch_gpd_ring_start_addr_lo, sizeof(UI32_T)); + + /* Configure the high 32-bit address. */ + if (NPS_E_OK == rc) + { + rch_gpd_ring_start_addr_hi = (UI32_T)NPS_ADDR_64_HI(gpd_start_addr); + + rc = osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_RCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_RCH_GPD_RING_START_ADDR_HI), channel), + &rch_gpd_ring_start_addr_hi, sizeof(UI32_T)); + } + + /* Configure the GPD ring size. */ + if (NPS_E_OK == rc) + { + rch_gpd_ring_size = gpd_ring_sz; + + rc = osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_RCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_RCH_GPD_RING_SIZE), channel), + &rch_gpd_ring_size, sizeof(UI32_T)); + } + + return (rc); +} + +/* ----------------------------------------------------------------------------------- ISR HW Regs */ +/* FUNCTION NAME: _hal_tau_pkt_maskAllTxL2IsrReg + * PURPOSE: + * To mask all the TX L2 interrupts for the specified channel. + * INPUT: + * unit -- The unit ID + * channel -- The target TX channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully mask all the TX L2 interrupts. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_maskAllTxL2IsrReg( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel) +{ + UI32_T reg = 0; + + HAL_TAU_PKT_CLR_BITMAP(reg, + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_HWO_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_CHKSM_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_NO_OVFL_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_DMA_READ_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_BUF_SIZE_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_RUNT_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_OVSZ_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_LEN_MISMATCH_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_PKTPL_DMA_READ_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_COS_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_GT255_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_PFC | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_CREDIT_UDFL_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_DMA_WRITE_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_STOP_CMD_CPLT); + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_TCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_TCH_INT_MASK), channel), + ®, sizeof(UI32_T)); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_maskAllRxL2IsrReg + * PURPOSE: + * To mask all the L2 interrupts for the specified channel. + * INPUT: + * unit -- The unit ID + * channel -- The target RX channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully mask all the L2 interrupts. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_maskAllRxL2IsrReg( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel) +{ + UI32_T reg = 0; + + HAL_TAU_PKT_CLR_BITMAP(reg, + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_LOW | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_EMPTY | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_ERROR | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_GPD_CHKSM_ERROR | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_DMA_READ_ERROR | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_DMA_WRITE_ERROR | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_STOP_CMD_CPLT | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_GPD_GT255_ERROR | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_TOD_UNINIT | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_PKT_ERROR_DROP | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_UDSZ_DROP | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_OVSZ_DROP | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_CMDQ_OVF_DROP | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_FIFO_OVF_DROP); + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_RCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_RCH_INT_MASK), channel), + ®, sizeof(UI32_T)); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_unmaskAllTxL2IsrReg + * PURPOSE: + * To unmask all the TX L2 interrupts for the specified channel. + * INPUT: + * unit -- The unit ID + * channel -- The target TX channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully unmask all the TX L2 interrupts. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_unmaskAllTxL2IsrReg( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel) +{ + UI32_T reg = 0; + + HAL_TAU_PKT_SET_BITMAP(reg, + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_HWO_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_CHKSM_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_NO_OVFL_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_DMA_READ_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_BUF_SIZE_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_RUNT_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_OVSZ_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_LEN_MISMATCH_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_PKTPL_DMA_READ_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_COS_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_GT255_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_PFC | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_CREDIT_UDFL_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_DMA_WRITE_ERROR | + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_STOP_CMD_CPLT); + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_TCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_TCH_INT_MASK), channel), + ®, sizeof(UI32_T)); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_unmaskAllRxL2IsrReg + * PURPOSE: + * To unmask all the L2 interrupts for the specified channel. + * INPUT: + * unit -- The unit ID + * channel -- The target RX channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully unmask all the L2 interrupts. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_unmaskAllRxL2IsrReg( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel) +{ + UI32_T reg = 0; + + HAL_TAU_PKT_SET_BITMAP(reg, + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_LOW | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_EMPTY | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_ERROR | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_GPD_CHKSM_ERROR | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_DMA_READ_ERROR | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_DMA_WRITE_ERROR | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_STOP_CMD_CPLT | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_GPD_GT255_ERROR | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_TOD_UNINIT | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_PKT_ERROR_DROP | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_UDSZ_DROP | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_OVSZ_DROP | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_CMDQ_OVF_DROP | + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_FIFO_OVF_DROP); + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_RCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_RCH_INT_MASK), channel), + ®, sizeof(UI32_T)); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_clearTxL2IsrStatusReg + * PURPOSE: + * To clear the status of TX L2 interrupts for the specified channel. + * INPUT: + * unit -- The unit ID + * channel -- The target TX channel + * isr_bitmap -- The bitmap used to specify the target ISRs + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully clear L1 ISR status. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_clearTxL2IsrStatusReg( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel, + const HAL_TAU_PKT_TX_CHANNEL_L2_ISR_T isr_bitmap) +{ + UI32_T reg = 0; + + HAL_TAU_PKT_SET_BITMAP(reg, isr_bitmap); + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_TCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_TCH_INT_CLR), channel), + ®, sizeof(UI32_T)); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_clearRxL2IsrStatusReg + * PURPOSE: + * To clear the status of RX L2 interrupts for the specified channel. + * INPUT: + * unit -- The unit ID + * channel -- The target RX channel + * isr_bitmap -- The bitmap used to specify the target ISRs + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully clear RX L2 ISR status. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_clearRxL2IsrStatusReg( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel, + const HAL_TAU_PKT_RX_CHANNEL_L2_ISR_T isr_bitmap) +{ + UI32_T reg = 0; + + HAL_TAU_PKT_SET_BITMAP(reg, isr_bitmap); + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_PDMA_RCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_RCH_INT_CLR), channel), + ®, sizeof(UI32_T)); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: hal_tau_pkt_getTxIntrCnt + * PURPOSE: + * To get the PDMA TX interrupt counters of the target channel. + * INPUT: + * unit -- The unit ID + * channel -- The target channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully get the counters. + * NOTES: + * None + */ +NPS_ERROR_NO_T +hal_tau_pkt_getTxIntrCnt( + const UI32_T unit, + const UI32_T channel, + UI32_T *ptr_intr_cnt) +{ + *ptr_intr_cnt = HAL_TAU_PKT_TCH_CNT(unit, channel); + return (NPS_E_OK); +} + +/* FUNCTION NAME: hal_tau_pkt_getRxIntrCnt + * PURPOSE: + * To get the PDMA RX interrupt counters of the target channel. + * INPUT: + * unit -- The unit ID + * channel -- The target channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully get the counters. + * NOTES: + * None + */ +NPS_ERROR_NO_T +hal_tau_pkt_getRxIntrCnt( + const UI32_T unit, + const UI32_T channel, + UI32_T *ptr_intr_cnt) +{ + *ptr_intr_cnt = HAL_TAU_PKT_RCH_CNT(unit, channel); + return (NPS_E_OK); +} + +/* FUNCTION NAME: hal_tau_pkt_getTxKnlCnt + * PURPOSE: + * To get the PDMA TX counters of the target channel. + * INPUT: + * unit -- The unit ID + * ptr_cookie -- Pointer of the TX cookie + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully get the counters. + * NOTES: + * None + */ +NPS_ERROR_NO_T +hal_tau_pkt_getTxKnlCnt( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_CH_CNT_COOKIE_T *ptr_cookie) +{ + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + + osal_io_copyToUser(&ptr_cookie->tx_cnt, &ptr_tx_cb->cnt, sizeof(HAL_TAU_PKT_TX_CNT_T)); + return (NPS_E_OK); +} + +/* FUNCTION NAME: hal_tau_pkt_getRxKnlCnt + * PURPOSE: + * To get the PDMA RX counters of the target channel. + * INPUT: + * unit -- The unit ID + * ptr_cookie -- Pointer of the RX cookie + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully get the counters. + * NOTES: + * None + */ +NPS_ERROR_NO_T +hal_tau_pkt_getRxKnlCnt( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_CH_CNT_COOKIE_T *ptr_cookie) +{ + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + + osal_io_copyToUser(&ptr_cookie->rx_cnt, &ptr_rx_cb->cnt, sizeof(HAL_TAU_PKT_RX_CNT_T)); + return (NPS_E_OK); +} + +/* FUNCTION NAME: hal_tau_pkt_clearTxKnlCnt + * PURPOSE: + * To clear the PDMA TX counters of the target channel. + * INPUT: + * unit -- The unit ID + * ptr_cookie -- Pointer of the TX cookie + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully clear the counters. + * NOTES: + * None + */ +NPS_ERROR_NO_T +hal_tau_pkt_clearTxKnlCnt( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_TX_COOKIE_T *ptr_cookie) +{ + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + + osal_memset(&ptr_tx_cb->cnt, 0, sizeof(HAL_TAU_PKT_TX_CNT_T)); + return (NPS_E_OK); +} + +/* FUNCTION NAME: hal_tau_pkt_clearRxKnlCnt + * PURPOSE: + * To clear the PDMA RX counters of the target channel. + * INPUT: + * unit -- The unit ID + * ptr_cookie -- Pointer of the RX cookie + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully clear the counters. + * NOTES: + * None + */ +NPS_ERROR_NO_T +hal_tau_pkt_clearRxKnlCnt( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_RX_COOKIE_T *ptr_cookie) +{ + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + + osal_memset(&ptr_rx_cb->cnt, 0, sizeof(HAL_TAU_PKT_RX_CNT_T)); + return (NPS_E_OK); +} + +/* FUNCTION NAME: hal_tau_pkt_setPortAttr + * PURPOSE: + * To set the port attributes such as status or speeds. + * INPUT: + * unit -- The unit ID + * ptr_cookie -- Pointer of the Port cookie + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully set the attributes. + * NOTES: + * None + */ +NPS_ERROR_NO_T +hal_tau_pkt_setPortAttr( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_PORT_COOKIE_T *ptr_cookie) +{ +#define HAL_TAU_PKT_PORT_STATUS_UP (1) +#define HAL_TAU_PKT_PORT_STATUS_DOWN (0) + struct net_device *ptr_net_dev; + struct net_device_priv *ptr_priv; + UI32_T port; + UI32_T status; + NPS_PORT_SPEED_T speed; + + osal_io_copyFromUser(&port, &ptr_cookie->port, sizeof(UI32_T)); + osal_io_copyFromUser(&status, &ptr_cookie->status, sizeof(UI32_T)); + osal_io_copyFromUser(&speed, &ptr_cookie->speed, sizeof(NPS_PORT_SPEED_T)); + + ptr_net_dev = HAL_TAU_PKT_GET_PORT_NETDEV(port); + if ((NULL != ptr_net_dev) && (portspeed = SPEED_1000; + break; + case NPS_PORT_SPEED_10G: + ptr_priv->speed = SPEED_10000; + break; + case NPS_PORT_SPEED_25G: + ptr_priv->speed = 25000; + break; + case NPS_PORT_SPEED_40G: + ptr_priv->speed = 40000; + break; + case NPS_PORT_SPEED_50G: + ptr_priv->speed = 50000; + break; + case NPS_PORT_SPEED_100G: + ptr_priv->speed = 100000; + break; + default: + break; + } + } + return (NPS_E_OK); +} + + +/* ----------------------------------------------------------------------------------- independent func */ +/* FUNCTION NAME: _hal_tau_pkt_enQueue + * PURPOSE: + * To enqueue the target data. + * INPUT: + * ptr_que -- Pointer for the target queue + * ptr_data -- Pointer for the data to be enqueued + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully enqueue the data. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_enQueue( + HAL_TAU_PKT_SW_QUEUE_T *ptr_que, + void *ptr_data) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + + osal_takeSemaphore(&ptr_que->sema, NPS_SEMAPHORE_WAIT_FOREVER); + rc = osal_que_enque(&ptr_que->que_id, ptr_data); + osal_giveSemaphore(&ptr_que->sema); + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_deQueue + * PURPOSE: + * To dequeue the target data. + * INPUT: + * ptr_que -- Pointer for the target queue + * pptr_data -- Pointer for the data pointer to be dequeued + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully dequeue the data. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_deQueue( + HAL_TAU_PKT_SW_QUEUE_T *ptr_que, + void **pptr_data) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + + osal_takeSemaphore(&ptr_que->sema, NPS_SEMAPHORE_WAIT_FOREVER); + rc = osal_que_deque(&ptr_que->que_id, pptr_data); + osal_giveSemaphore(&ptr_que->sema); + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_getQueueCount + * PURPOSE: + * To obtain the current GPD number in the target RX queue. + * INPUT: + * ptr_que -- Pointer for the target queue + * ptr_count -- Pointer for the data count + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully obtain the GPD count. + * NPS_E_BAD_PARAMETER -- Parameter pointer is null. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_getQueueCount( + HAL_TAU_PKT_SW_QUEUE_T *ptr_que, + UI32_T *ptr_count) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + + osal_takeSemaphore(&ptr_que->sema, NPS_SEMAPHORE_WAIT_FOREVER); + osal_que_getCount(&ptr_que->que_id, ptr_count); + osal_giveSemaphore(&ptr_que->sema); + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_allocRxPayloadBuf + * PURPOSE: + * To allocate the RX packet payload buffer for the GPD. + * INPUT: + * unit -- The unit ID + * channel -- The target RX channel + * gpd_idx -- The current GPD index + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully allocate the buffer. + * NPS_E_NO_MEMORY -- Allocate the buffer failed. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_allocRxPayloadBuf( + const UI32_T unit, + const UI32_T channel, + const UI32_T gpd_idx) +{ + NPS_ERROR_NO_T rc = NPS_E_NO_MEMORY; + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + volatile HAL_TAU_PKT_RX_GPD_T *ptr_rx_gpd = HAL_TAU_PKT_GET_RX_GPD_PTR(unit, channel, gpd_idx); + NPS_ADDR_T phy_addr = 0; + + HAL_TAU_PKT_RX_PDMA_T *ptr_rx_pdma = HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, channel); + struct sk_buff *ptr_skb = NULL; + + ptr_skb = osal_skb_alloc(ptr_rx_cb->buf_len); + if (NULL != ptr_skb) + { + /* map skb to dma */ + phy_addr = osal_skb_mapDma(ptr_skb, DMA_FROM_DEVICE); + if (0x0 == phy_addr) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_ERR, + "u=%u, rxch=%u, skb dma map err, size=%u\n", + unit, channel, ptr_skb->len); + osal_skb_free(ptr_skb); + rc = NPS_E_NO_MEMORY; + } + else + { + ptr_rx_pdma->pptr_skb_ring[gpd_idx] = ptr_skb; + rc = NPS_E_OK; + } + } + + if (NPS_E_OK == rc) + { + ptr_rx_gpd->data_buf_addr_hi = NPS_ADDR_64_HI(phy_addr); + ptr_rx_gpd->data_buf_addr_lo = NPS_ADDR_64_LOW(phy_addr); + ptr_rx_gpd->avbl_buf_len = ptr_rx_cb->buf_len; + } + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_freeRxPayloadBuf + * PURPOSE: + * To free the RX packet payload buffer for the GPD. + * INPUT: + * unit -- The unit ID + * channel -- The target RX channel + * gpd_idx -- The current GPD index + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully free the buffer. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_freeRxPayloadBuf( + const UI32_T unit, + const UI32_T channel, + const UI32_T gpd_idx) +{ + NPS_ERROR_NO_T rc = NPS_E_OTHERS; + volatile HAL_TAU_PKT_RX_GPD_T *ptr_rx_gpd = HAL_TAU_PKT_GET_RX_GPD_PTR(unit, channel, gpd_idx); + NPS_ADDR_T phy_addr = 0; + + HAL_TAU_PKT_RX_PDMA_T *ptr_rx_pdma = HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, channel); + struct sk_buff *ptr_skb = NULL; + + phy_addr = NPS_ADDR_32_TO_64(ptr_rx_gpd->data_buf_addr_hi, ptr_rx_gpd->data_buf_addr_lo); + if (0x0 != phy_addr) + { + /* unmap dma */ + ptr_skb = ptr_rx_pdma->pptr_skb_ring[gpd_idx]; + osal_skb_unmapDma(phy_addr, ptr_skb->len, DMA_FROM_DEVICE); + osal_skb_free(ptr_skb); + rc = NPS_E_OK; + } + + if (NPS_E_OK == rc) + { + ptr_rx_gpd->data_buf_addr_hi = 0x0; + ptr_rx_gpd->data_buf_addr_lo = 0x0; + } + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_freeRxPayloadBufGpd + * PURPOSE: + * To free the RX packet payload buffer for the GPD. + * INPUT: + * unit -- The unit ID + * ptr_sw_gpd -- The pointer of RX SW GPD + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully free the buffer. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_freeRxPayloadBufGpd( + const UI32_T unit, + HAL_TAU_PKT_RX_SW_GPD_T *ptr_sw_gpd) +{ + NPS_ERROR_NO_T rc = NPS_E_OTHERS; + NPS_ADDR_T phy_addr = 0; + + struct sk_buff *ptr_skb = NULL; + + phy_addr = NPS_ADDR_32_TO_64(ptr_sw_gpd->rx_gpd.data_buf_addr_hi, ptr_sw_gpd->rx_gpd.data_buf_addr_lo); + if (0x0 != phy_addr) + { + ptr_skb = ptr_sw_gpd->ptr_cookie; + osal_skb_free(ptr_skb); + rc = NPS_E_OK; + } + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_initTxPdmaRing + * PURPOSE: + * To initialize the GPD ring of target TX channel. + * + * INPUT: + * unit -- The unit ID + * channel -- The target TX channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully initialize the GPD ring. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_initTxPdmaRing( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_TX_PDMA_T *ptr_tx_pdma = HAL_TAU_PKT_GET_TX_PDMA_PTR(unit, channel); + volatile HAL_TAU_PKT_TX_GPD_T *ptr_tx_gpd = NULL; + NPS_ADDR_T phy_addr = 0; + UI32_T gpd_idx = 0; + + for (gpd_idx = 0; gpd_idx < ptr_tx_pdma->gpd_num; gpd_idx++) + { + ptr_tx_gpd = HAL_TAU_PKT_GET_TX_GPD_PTR(unit, channel, gpd_idx); + osal_memset((void *)ptr_tx_gpd, 0x0, sizeof(HAL_TAU_PKT_TX_GPD_T)); + ptr_tx_gpd->ioc = HAL_TAU_PKT_IOC_HAS_INTR; + ptr_tx_gpd->ch = HAL_TAU_PKT_CH_LAST_GPD; + ptr_tx_gpd->hwo = HAL_TAU_PKT_HWO_SW_OWN; + osal_dma_flushCache((void *)ptr_tx_gpd, sizeof(HAL_TAU_PKT_TX_GPD_T)); + } + + phy_addr = osal_dma_convertVirtToPhy(ptr_tx_pdma->ptr_gpd_align_start_addr); + rc = _hal_tau_pkt_setTxGpdStartAddrReg(unit, channel, phy_addr, ptr_tx_pdma->gpd_num); + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_initRxPdmaRing + * PURPOSE: + * To initialize the RX GPD ring. + * INPUT: + * unit -- The target unit + * channel -- The target RX channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully initialize the RX GPD ring. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_initRxPdmaRing( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_RX_PDMA_T *ptr_rx_pdma = HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, channel); + volatile HAL_TAU_PKT_RX_GPD_T *ptr_rx_gpd = NULL; + NPS_ADDR_T phy_addr = 0; + UI32_T gpd_idx = 0; + + for (gpd_idx = 0; gpd_idx < ptr_rx_pdma->gpd_num; gpd_idx++) + { + ptr_rx_gpd = HAL_TAU_PKT_GET_RX_GPD_PTR(unit, channel, gpd_idx); + osal_memset((void *)ptr_rx_gpd, 0x0, sizeof(HAL_TAU_PKT_RX_GPD_T)); + ptr_rx_gpd->ioc = HAL_TAU_PKT_IOC_NO_INTR; + ptr_rx_gpd->hwo = HAL_TAU_PKT_HWO_SW_OWN; + osal_dma_flushCache((void *)ptr_rx_gpd, sizeof(HAL_TAU_PKT_RX_GPD_T)); + } + + phy_addr = osal_dma_convertVirtToPhy(ptr_rx_pdma->ptr_gpd_align_start_addr); + rc = _hal_tau_pkt_setRxGpdStartAddrReg(unit, channel, phy_addr, ptr_rx_pdma->gpd_num); + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_initRxPdmaRingBuf + * PURPOSE: + * To de-init the Rx PDMA ring configuration. + * INPUT: + * unit -- The unit ID + * channel -- The target RX channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully de-init the Rx PDMA ring. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_initRxPdmaRingBuf( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + HAL_TAU_PKT_RX_PDMA_T *ptr_rx_pdma = HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, channel); + volatile HAL_TAU_PKT_RX_GPD_T *ptr_rx_gpd = NULL; + UI32_T gpd_idx = 0; + + if (0 == ptr_rx_cb->buf_len) + { + return (NPS_E_BAD_PARAMETER); + } + + for (gpd_idx = 0; gpd_idx < ptr_rx_pdma->gpd_num; gpd_idx++) + { + ptr_rx_gpd = HAL_TAU_PKT_GET_RX_GPD_PTR(unit, channel, gpd_idx); + osal_dma_invalidateCache((void *)ptr_rx_gpd, sizeof(HAL_TAU_PKT_RX_GPD_T)); + + rc = _hal_tau_pkt_allocRxPayloadBuf(unit, channel, gpd_idx); + if (NPS_E_OK == rc) + { + ptr_rx_gpd->ioc = HAL_TAU_PKT_IOC_HAS_INTR; + ptr_rx_gpd->hwo = HAL_TAU_PKT_HWO_HW_OWN; + osal_dma_flushCache((void *)ptr_rx_gpd, sizeof(HAL_TAU_PKT_RX_GPD_T)); + } + else + { + ptr_rx_cb->cnt.no_memory++; + break; + } + } + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_deinitRxPdmaRingBuf + * PURPOSE: + * To de-init the Rx PDMA ring configuration. + * INPUT: + * unit -- The unit ID + * channel -- The target RX channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully de-init the Rx PDMA ring. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_deinitRxPdmaRingBuf( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_RX_PDMA_T *ptr_rx_pdma = HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, channel); + volatile HAL_TAU_PKT_RX_GPD_T *ptr_rx_gpd = NULL; + UI32_T gpd_idx = 0; + + for (gpd_idx = 0; ((gpd_idx < ptr_rx_pdma->gpd_num) && (NPS_E_OK == rc)); gpd_idx++) + { + /* mark the GPD as invalid to prevent Rx-done task to process it */ + ptr_rx_gpd = HAL_TAU_PKT_GET_RX_GPD_PTR(unit, channel, gpd_idx); + ptr_rx_gpd->hwo = HAL_TAU_PKT_HWO_HW_OWN; + osal_dma_flushCache((void *)ptr_rx_gpd, sizeof(HAL_TAU_PKT_RX_GPD_T)); + + rc = _hal_tau_pkt_freeRxPayloadBuf(unit, channel, gpd_idx); + } + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_recoverTxPdma + * PURPOSE: + * To recover the PDMA status to the initial state. + * INPUT: + * unit -- The unit ID + * channel -- The target TX channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully recover PDMA. + * NOTES: + * + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_recoverTxPdma( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_TX_PDMA_T *ptr_tx_pdma = HAL_TAU_PKT_GET_TX_PDMA_PTR(unit, channel); + + /* Release the software GPD ring and configure it again. */ + ptr_tx_pdma->used_idx = 0; + ptr_tx_pdma->free_idx = 0; + ptr_tx_pdma->used_gpd_num = 0; + ptr_tx_pdma->free_gpd_num = ptr_tx_pdma->gpd_num; + + _hal_tau_pkt_stopTxChannelReg(unit, channel); + rc = _hal_tau_pkt_initTxPdmaRing(unit, channel); + _hal_tau_pkt_startTxChannelReg(unit, channel, 0); + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_recoverRxPdma + * PURPOSE: + * To recover the RX PDMA from the error state. + * INPUT: + * unit -- The unit ID + * channel -- The target RX channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully recovery the PDMA. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_recoverRxPdma( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_RX_PDMA_T *ptr_rx_pdma = HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, channel); + + /* Release the software GPD ring and configure it again. */ + ptr_rx_pdma->cur_idx = 0; + + _hal_tau_pkt_stopRxChannelReg(unit, channel); + rc = _hal_tau_pkt_deinitRxPdmaRingBuf(unit, channel); + if (NPS_E_OK != rc) + { + return (rc); + } + rc = _hal_tau_pkt_initRxPdmaRing(unit, channel); + if (NPS_E_OK != rc) + { + return (rc); + } + rc = _hal_tau_pkt_initRxPdmaRingBuf(unit, channel); + if (NPS_E_OK != rc) + { + return (rc); + } + _hal_tau_pkt_startRxChannelReg(unit, channel, ptr_rx_pdma->gpd_num); + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_freeTxGpdList + * PURPOSE: + * To free the TX SW GPD link list. + * INPUT: + * unit -- The unit ID + * ptr_sw_gpd -- The pointer of TX SW GPD + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully free the GPD list. + * NOTES: + * None + */ +static void +_hal_tau_pkt_freeTxGpdList( + UI32_T unit, + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_gpd) +{ + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_gpd_cur = NULL; + + while (NULL != ptr_sw_gpd) + { + ptr_sw_gpd_cur = ptr_sw_gpd; + ptr_sw_gpd = ptr_sw_gpd->ptr_next; + osal_free(ptr_sw_gpd_cur); + } +} + +/* FUNCTION NAME: _hal_tau_pkt_freeRxGpdList + * PURPOSE: + * To free the RX SW GPD link list. + * INPUT: + * unit -- The unit ID + * ptr_sw_gpd -- The pointer of RX SW GPD + * free_payload -- TRUE: To free the buf in SDK, FALSE: in user process. + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully recovery the PDMA. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_freeRxGpdList( + UI32_T unit, + HAL_TAU_PKT_RX_SW_GPD_T *ptr_sw_gpd, + BOOL_T free_payload) +{ + HAL_TAU_PKT_RX_SW_GPD_T *ptr_sw_gpd_cur = NULL; + + while (NULL != ptr_sw_gpd) + { + ptr_sw_gpd_cur = ptr_sw_gpd; + ptr_sw_gpd = ptr_sw_gpd->ptr_next; + if (TRUE == free_payload) + { + _hal_tau_pkt_freeRxPayloadBufGpd(unit, ptr_sw_gpd_cur); + } + osal_free(ptr_sw_gpd_cur); + } + + return (NPS_E_OK); +} + +/* ----------------------------------------------------------------------------------- pkt_drv */ +/* FUNCTION NAME: _hal_tau_pkt_txEnQueueBulk + * PURPOSE: + * To enqueue numbers of packet in the bulk buffer + * INPUT: + * unit -- The unit ID + * channel -- The target channel + * number -- The number of packet to be enqueue + * OUTPUT: + * None + * RETURN: + * None + * NOTES: + * None + */ +static void +_hal_tau_pkt_txEnQueueBulk( + const UI32_T unit, + const UI32_T channel, + const UI32_T number) +{ + HAL_TAU_PKT_TX_PDMA_T *ptr_tx_pdma = HAL_TAU_PKT_GET_TX_PDMA_PTR(unit, channel); + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_gpd = NULL; + UI32_T idx; + + for (idx = 0; idx < number; idx++) + { + ptr_sw_gpd = ptr_tx_pdma->pptr_sw_gpd_bulk[idx]; + ptr_tx_pdma->pptr_sw_gpd_bulk[idx] = NULL; + if (NULL != ptr_sw_gpd->callback) + { + ptr_sw_gpd->callback(unit, ptr_sw_gpd, ptr_sw_gpd->ptr_cookie); + } + } +} + + +/* FUNCTION NAME: _hal_tau_pkt_strictTxDeQueue + * PURPOSE: + * To dequeue the packets based on the strict algorithm. + * INPUT: + * unit -- The unit ID + * ptr_cookie -- Pointer of the TX cookie + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully dequeue the packets. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_strictTxDeQueue( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_TX_COOKIE_T *ptr_cookie) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_gpd = NULL; + NPS_ADDR_T sw_gpd_addr; + UI32_T que_cnt = 0; + + /* get queue count */ + _hal_tau_pkt_getQueueCount(&ptr_tx_cb->sw_queue, &que_cnt); + + /* wait txTask event */ + if (0 == que_cnt) + { + osal_waitEvent(&ptr_tx_cb->sync_sema); + if (FALSE == ptr_tx_cb->running) + { + return (NPS_E_OTHERS); /* deinit */ + } + + ptr_tx_cb->cnt.wait_event++; + + /* re-get queue count */ + _hal_tau_pkt_getQueueCount(&ptr_tx_cb->sw_queue, &que_cnt); + } + + /* deque */ + if (que_cnt > 0) + { + rc = _hal_tau_pkt_deQueue(&ptr_tx_cb->sw_queue, (void **)&ptr_sw_gpd); + if (NPS_E_OK == rc) + { + ptr_tx_cb->cnt.deque_ok++; + + sw_gpd_addr = (NPS_ADDR_T)ptr_sw_gpd->ptr_cookie; + + /* Give the address of pre-saved SW GPD back to userspace */ + osal_io_copyToUser(&ptr_cookie->done_sw_gpd_addr, + &sw_gpd_addr, + sizeof(NPS_ADDR_T)); + + /* free kernel sw_gpd */ + _hal_tau_pkt_freeTxGpdList(unit, ptr_sw_gpd); + } + else + { + ptr_tx_cb->cnt.deque_fail++; + } + } + else + { + /* It may happen at last gpd, return error and do not invoke callback. */ + rc = NPS_E_OTHERS; + } + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_rxCheckReason + * PURPOSE: + * To check the packets to linux kernel/user. + * INPUT: + * ptr_rx_gpd -- Pointer of the RX GPD + * ptr_hit_prof -- Pointer of the hit flag + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully dispatch the packets. + * NOTES: + * Reference to pkt_srv. + */ +static void +_hal_tau_pkt_rxCheckReason( + volatile HAL_TAU_PKT_RX_GPD_T *ptr_rx_gpd, + HAL_TAU_PKT_NETIF_PROFILE_T *ptr_profile, + BOOL_T *ptr_hit_prof) +{ + HAL_TAU_PKT_RX_REASON_BITMAP_T *ptr_reason_bitmap = &ptr_profile->reason_bitmap; + UI32_T bitval = 0; + UI32_T bitmap = 0x0; + + if (0 == (ptr_profile->flags & HAL_TAU_PKT_NETIF_PROFILE_FLAGS_REASON)) + { + /* It means that reason doesn't metters */ + *ptr_hit_prof = TRUE; + return; + } + +#define HAL_TAU_PKT_DI_NON_L3_CPU_MIN (HAL_TAU_EXCPT_CPU_BASE_ID + HAL_TAU_EXCPT_CPU_NON_L3_MIN) +#define HAL_TAU_PKT_DI_NON_L3_CPU_MAX (HAL_TAU_EXCPT_CPU_BASE_ID + HAL_TAU_EXCPT_CPU_NON_L3_MAX) +#define HAL_TAU_PKT_DI_L3_CPU_MIN (HAL_TAU_EXCPT_CPU_BASE_ID + HAL_TAU_EXCPT_CPU_L3_MIN) +#define HAL_TAU_PKT_DI_L3_CPU_MAX (HAL_TAU_EXCPT_CPU_BASE_ID + HAL_TAU_EXCPT_CPU_L3_MAX) + + switch (ptr_rx_gpd->itmh_eth.typ) + { + case HAL_TAU_PKT_TMH_TYPE_ITMH_ETH: + + /* IPP non-L3 exception */ + if (ptr_rx_gpd->itmh_eth.dst_idx >= HAL_TAU_PKT_DI_NON_L3_CPU_MIN && + ptr_rx_gpd->itmh_eth.dst_idx <= HAL_TAU_PKT_DI_NON_L3_CPU_MAX) + { + bitval = ptr_rx_gpd->itmh_eth.dst_idx - HAL_TAU_PKT_DI_NON_L3_CPU_MIN; + bitmap = 1 << (bitval % 32); + if (0 != (ptr_reason_bitmap->ipp_excpt_bitmap[bitval / 32] & bitmap)) + { + *ptr_hit_prof = TRUE; + break; + } + } + + /* IPP L3 exception */ + if (ptr_rx_gpd->itmh_eth.dst_idx >= HAL_TAU_PKT_DI_L3_CPU_MIN && + ptr_rx_gpd->itmh_eth.dst_idx <= HAL_TAU_PKT_DI_L3_CPU_MAX) + { + bitmap = ptr_rx_gpd->itmh_eth.dst_idx - HAL_TAU_PKT_DI_L3_CPU_MIN; + if (0 != (ptr_reason_bitmap->ipp_l3_excpt_bitmap[0] & bitmap)) + { + *ptr_hit_prof = TRUE; + break; + } + } + + /* IPP cp_to_cpu_bmap */ + bitmap = ptr_rx_gpd->itmh_eth.cp_to_cpu_bmap; + if (0 != (ptr_reason_bitmap->ipp_copy2cpu_bitmap[0] & bitmap)) + { + *ptr_hit_prof = TRUE; + break; + } + + /* IPP cp_to_cpu_rsn */ + bitval = ptr_rx_gpd->itmh_eth.cp_to_cpu_code; + bitmap = 1 << (bitval % 32); + if (0 != (ptr_reason_bitmap->ipp_rsn_bitmap[bitval / 32] & bitmap)) + { + *ptr_hit_prof = TRUE; + break; + } + break; + + case HAL_TAU_PKT_TMH_TYPE_ITMH_FAB: + case HAL_TAU_PKT_TMH_TYPE_ETMH_FAB: + break; + + case HAL_TAU_PKT_TMH_TYPE_ETMH_ETH: + + /* EPP exception */ + if (1 == ptr_rx_gpd->etmh_eth.redir) + { + bitval = ptr_rx_gpd->etmh_eth.excpt_code_mir_bmap; + bitmap = 1 << (bitval % 32); + if (0 != (ptr_reason_bitmap->epp_excpt_bitmap[bitval / 32] & bitmap)) + { + *ptr_hit_prof = TRUE; + break; + } + } + + /* EPP cp_to_cpu_bmap */ + bitmap = ((ptr_rx_gpd->etmh_eth.cp_to_cpu_bmap_w0 << 7) | + (ptr_rx_gpd->etmh_eth.cp_to_cpu_bmap_w1)); + if (0 != (ptr_reason_bitmap->epp_copy2cpu_bitmap[0] & bitmap)) + { + *ptr_hit_prof = TRUE; + break; + } + break; + + default: + *ptr_hit_prof = FALSE; + break; + } +} + +static BOOL_T +_hal_tau_pkt_comparePatternWithPayload( + volatile HAL_TAU_PKT_RX_GPD_T *ptr_rx_gpd, + const UI8_T *ptr_pattern, + const UI8_T *ptr_mask, + const UI32_T offset) +{ + NPS_ADDR_T phy_addr = 0; + UI8_T *ptr_virt_addr = NULL; + UI32_T idx; + + /* Get the packet payload */ + phy_addr = NPS_ADDR_32_TO_64(ptr_rx_gpd->data_buf_addr_hi, ptr_rx_gpd->data_buf_addr_lo); + ptr_virt_addr = (C8_T *) osal_dma_convertPhyToVirt(phy_addr); + + for (idx=0; idxflags & (HAL_TAU_PKT_NETIF_PROFILE_FLAGS_PATTERN_0 | + HAL_TAU_PKT_NETIF_PROFILE_FLAGS_PATTERN_1 | + HAL_TAU_PKT_NETIF_PROFILE_FLAGS_PATTERN_2 | + HAL_TAU_PKT_NETIF_PROFILE_FLAGS_PATTERN_3)) != 0) + { + /* Need to compare the payload with at least one of the four patterns */ + /* Pre-assume that the result is positive */ + *ptr_hit_prof = TRUE; + + /* If any of the following comparison fails, the result will be changed to negtive */ + } + else + { + return; + } + + for (idx=0; idxflags & (HAL_TAU_PKT_NETIF_PROFILE_FLAGS_PATTERN_0 << idx))) + { + match = _hal_tau_pkt_comparePatternWithPayload(ptr_rx_gpd, + ptr_profile->pattern[idx], + ptr_profile->mask[idx], + ptr_profile->offset[idx]); + if (TRUE == match) + { + /* Do nothing */ + } + else + { + /* Change the result to negtive */ + *ptr_hit_prof = FALSE; + break; + } + } + } +} + +static void +_hal_tau_pkt_matchUserProfile( + volatile HAL_TAU_PKT_RX_GPD_T *ptr_rx_gpd, + HAL_TAU_PKT_PROFILE_NODE_T *ptr_profile_list, + BOOL_T *ptr_hit_prof) +{ + HAL_TAU_PKT_PROFILE_NODE_T *ptr_curr_node = ptr_profile_list; + + while (NULL != ptr_curr_node) + { + /* 1st match reason */ + _hal_tau_pkt_rxCheckReason(ptr_rx_gpd, ptr_curr_node->ptr_profile, ptr_hit_prof); + if (TRUE == *ptr_hit_prof) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "rx prof matched by reason\n"); + + /* Then, check pattern */ + _hal_tau_pkt_rxCheckPattern(ptr_rx_gpd, ptr_curr_node->ptr_profile, ptr_hit_prof); + if (TRUE == *ptr_hit_prof) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "rx prof matched by pattern\n"); + break; + } + } + + /* Seach the next profile (priority lower) */ + ptr_curr_node = ptr_curr_node->ptr_next_node; + } +} + +static void +_hal_tau_pkt_getPacketDest( + volatile HAL_TAU_PKT_RX_GPD_T *ptr_rx_gpd, + HAL_TAU_PKT_DEST_T *ptr_dest) +{ + BOOL_T hit_prof = FALSE; + UI32_T port; + HAL_TAU_PKT_PROFILE_NODE_T *ptr_profile_list; + + port = ptr_rx_gpd->itmh_eth.igr_phy_port; + ptr_profile_list = HAL_TAU_PKT_GET_PORT_PROFILE_LIST(port); + + _hal_tau_pkt_matchUserProfile(ptr_rx_gpd, ptr_profile_list, &hit_prof); + if (TRUE == hit_prof) + { + *ptr_dest = HAL_TAU_PKT_DEST_SDK; + } + else + { + *ptr_dest = HAL_TAU_PKT_DEST_NETDEV; + } +} + +/* FUNCTION NAME: _hal_tau_pkt_rxEnQueue + * PURPOSE: + * To enqueue the packets to multiple queues. + * INPUT: + * unit -- The unit ID + * channel -- The target channel + * ptr_sw_gpd -- Pointer for the SW Rx GPD link list + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully enqueue the packets. + * NOTES: + * None + */ +static void +_hal_tau_pkt_rxEnQueue( + const UI32_T unit, + const UI32_T channel, + HAL_TAU_PKT_RX_SW_GPD_T *ptr_sw_gpd) +{ + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + HAL_TAU_PKT_RX_SW_GPD_T *ptr_sw_first_gpd = ptr_sw_gpd; + void *ptr_virt_addr = NULL; + NPS_ADDR_T phy_addr = 0; + HAL_TAU_PKT_DEST_T pkt_dest; + + /* skb meta */ + UI32_T port = 0, len = 0, total_len = 0; + struct net_device *ptr_net_dev = NULL; + struct net_device_priv *ptr_priv = NULL; + struct sk_buff *ptr_skb = NULL, *ptr_merge_skb = NULL; + UI32_T copy_offset; + +#if defined(PERF_EN_TEST) + /* To verify kernel Rx performance */ + if (NPS_E_OK == perf_rxTest()) + { + while (NULL != ptr_sw_gpd) + { + len += (HAL_TAU_PKT_CH_LAST_GPD == ptr_sw_gpd->rx_gpd.ch)? + ptr_sw_gpd->rx_gpd.cnsm_buf_len : ptr_sw_gpd->rx_gpd.avbl_buf_len; + + total_len += len; + + /* unmap dma */ + phy_addr = NPS_ADDR_32_TO_64(ptr_sw_gpd->rx_gpd.data_buf_addr_hi, ptr_sw_gpd->rx_gpd.data_buf_addr_lo); + osal_skb_unmapDma(phy_addr, len, DMA_FROM_DEVICE); + /* next */ + ptr_sw_gpd = ptr_sw_gpd->ptr_next; + } + perf_rxCallback(total_len); + _hal_tau_pkt_freeRxGpdList(unit, ptr_sw_first_gpd, TRUE); + return ; + } +#endif + + _hal_tau_pkt_getPacketDest(&ptr_sw_gpd->rx_gpd, &pkt_dest); + if (HAL_TAU_PKT_DEST_NETDEV == pkt_dest) + { + ptr_sw_gpd = ptr_sw_first_gpd; + while (NULL != ptr_sw_gpd) + { + len = (HAL_TAU_PKT_CH_LAST_GPD == ptr_sw_gpd->rx_gpd.ch)? + ptr_sw_gpd->rx_gpd.cnsm_buf_len : ptr_sw_gpd->rx_gpd.avbl_buf_len; + + total_len += len; + + /* unmap dma */ + phy_addr = NPS_ADDR_32_TO_64(ptr_sw_gpd->rx_gpd.data_buf_addr_hi, ptr_sw_gpd->rx_gpd.data_buf_addr_lo); + ptr_virt_addr = ptr_sw_gpd->ptr_cookie; + + ptr_skb = (struct sk_buff *)ptr_virt_addr; + + /* note here ptr_skb->len is the total buffer size not means the actual Rx packet len + * it should be updated later + */ + osal_skb_unmapDma(phy_addr, ptr_skb->len, DMA_FROM_DEVICE); + + /* reset ptr_skb->len with real packet len instead of total buffer size */ + if (NULL == ptr_sw_gpd->ptr_next) + { + /* strip CRC padded by asic for the last gpd segment */ + ptr_skb->len = len - ETH_FCS_LEN; + } + else + { + ptr_skb->len = len; + } + + skb_set_tail_pointer(ptr_skb, ptr_skb->len); + + /* next */ + ptr_sw_gpd = ptr_sw_gpd->ptr_next; + } + + /* if the packet is composed of multiple gpd (skb), need to merge it into a single skb */ + if (NULL != ptr_sw_first_gpd->ptr_next) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_RX, + "u=%u, rxch=%u, rcv pkt size=%u > gpd buf size=%u\n", + unit, channel, total_len, ptr_rx_cb->buf_len); + ptr_merge_skb = osal_skb_alloc(total_len - ETH_FCS_LEN); + if (NULL != ptr_merge_skb) + { + copy_offset = 0; + ptr_sw_gpd = ptr_sw_first_gpd; + while (NULL != ptr_sw_gpd) + { + ptr_skb = (struct sk_buff *)ptr_sw_gpd->ptr_cookie; + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_RX, + "u=%u, rxch=%u, copy size=%u to buf offset=%u\n", + unit, channel, ptr_skb->len, copy_offset); + + memcpy(&(((UI8_T *)ptr_merge_skb->data)[copy_offset]), + ptr_skb->data, ptr_skb->len); + copy_offset += ptr_skb->len; + ptr_sw_gpd = ptr_sw_gpd->ptr_next; + } + /* put the merged skb to ptr_skb for the following process */ + ptr_skb = ptr_merge_skb; + } + else + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_RX), + "u=%u, rxch=%u, alloc skb failed, size=%u\n", + unit, channel, (total_len - ETH_FCS_LEN)); + } + + /* free both sw_gpd and the skb attached on it */ + _hal_tau_pkt_freeRxGpdList(unit, ptr_sw_first_gpd, TRUE); + } + else + { + /* free only sw_gpd */ + _hal_tau_pkt_freeRxGpdList(unit, ptr_sw_first_gpd, FALSE); + } + + /* get port and net_device */ + port = ptr_sw_first_gpd->rx_gpd.itmh_eth.igr_phy_port; + ptr_net_dev = HAL_TAU_PKT_GET_PORT_NETDEV(port); + + /* if NULL netdev, drop the skb */ + if (NULL == ptr_net_dev) + { + ptr_rx_cb->cnt.channel[channel].netdev_miss++; + osal_skb_free(ptr_skb); + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_RX), + "u=%u, rxch=%u, find netdev failed\n", + unit, channel); + return; + } + + /* skb handling */ + ptr_skb->dev = ptr_net_dev; + ptr_skb->pkt_type = PACKET_HOST; /* this packet is for me */ + ptr_skb->protocol = eth_type_trans(ptr_skb, ptr_net_dev); /* skip ethernet header */ + ptr_skb->ip_summed = CHECKSUM_UNNECESSARY; /* skip checksum */ + + /* send to linux */ + osal_skb_recv(ptr_skb); +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0) + ptr_net_dev->last_rx = jiffies; +#endif + ptr_priv = netdev_priv(ptr_net_dev); + ptr_priv->stats.rx_packets++; + ptr_priv->stats.rx_bytes += total_len; + } + else if (HAL_TAU_PKT_DEST_SDK == pkt_dest) + { + while (0 != _hal_tau_pkt_enQueue(&ptr_rx_cb->sw_queue[channel], ptr_sw_gpd)) + { + ptr_rx_cb->cnt.channel[channel].enque_retry++; + HAL_TAU_PKT_RX_ENQUE_RETRY_SLEEP(); + } + ptr_rx_cb->cnt.channel[channel].enque_ok++; + + osal_triggerEvent(&ptr_rx_cb->sync_sema); + ptr_rx_cb->cnt.channel[channel].trig_event++; + } + else if (HAL_TAU_PKT_DEST_DROP == pkt_dest) + { + _hal_tau_pkt_freeRxGpdList(unit, ptr_sw_first_gpd, TRUE); + } + else + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_RX), + "u=%u, rxch=%u, invalid pkt dest=%d\n", + unit, channel, pkt_dest); + } +} + +/* FUNCTION NAME: _hal_tau_pkt_schedRxDeQueue + * PURPOSE: + * To dequeue the packets based on the configured algorithm. + * INPUT: + * unit -- The unit ID + * ptr_cookie -- Pointer of the RX cookie + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully dequeue the packets. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_schedRxDeQueue( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_RX_COOKIE_T *ptr_cookie) +{ + HAL_TAU_PKT_IOCTL_RX_COOKIE_T ioctl_data; + HAL_TAU_PKT_IOCTL_RX_GPD_T ioctl_gpd; + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + HAL_TAU_PKT_RX_SW_GPD_T *ptr_sw_gpd_knl = NULL; + HAL_TAU_PKT_RX_SW_GPD_T *ptr_sw_first_gpd_knl = NULL; + UI32_T que_cnt = 0; + UI32_T queue = 0; + UI32_T idx = 0; + UI32_T gpd_idx = 0; + /* copy Rx sw_gpd */ + volatile HAL_TAU_PKT_RX_GPD_T *ptr_rx_gpd = NULL; + void *ptr_virt_addr = NULL; + NPS_ADDR_T phy_addr = 0; + UI32_T buf_len = 0; + NPS_ERROR_NO_T rc = NPS_E_OK; + + /* get queue and count */ + for (idx = 0; idx < HAL_TAU_PKT_RX_QUEUE_NUM; idx++) + { + /* to gurantee the opportunity where each queue can be handler */ + queue = ((ptr_rx_cb->deque_idx + idx) % HAL_TAU_PKT_RX_QUEUE_NUM); + _hal_tau_pkt_getQueueCount(&ptr_rx_cb->sw_queue[queue], &que_cnt); + if (que_cnt > 0) + { + ptr_rx_cb->deque_idx = ((queue + 1) % HAL_TAU_PKT_RX_QUEUE_NUM); + break; + } + } + + /* If all of the queues are empty, wait rxTask event */ + if (0 == que_cnt) + { + osal_waitEvent(&ptr_rx_cb->sync_sema); + if (FALSE == ptr_rx_cb->running) + { + return (NPS_E_OTHERS); /* deinit */ + } + + ptr_rx_cb->cnt.wait_event++; + + /* re-get queue and count */ + for (queue = 0; queue < HAL_TAU_PKT_RX_QUEUE_NUM; queue++) + { + _hal_tau_pkt_getQueueCount(&ptr_rx_cb->sw_queue[queue], &que_cnt); + if (que_cnt > 0) + { + ptr_rx_cb->deque_idx = ((queue + 1) % HAL_TAU_PKT_RX_QUEUE_NUM); + break; + } + } + } + + /* deque */ + if ((que_cnt > 0) && (queue < HAL_TAU_PKT_RX_QUEUE_NUM)) + { + rc = _hal_tau_pkt_deQueue(&ptr_rx_cb->sw_queue[queue], (void **)&ptr_sw_gpd_knl); + if (NPS_E_OK == rc) + { + ptr_rx_cb->cnt.channel[queue].deque_ok++; + ptr_sw_first_gpd_knl = ptr_sw_gpd_knl; + + osal_io_copyFromUser(&ioctl_data, ptr_cookie, sizeof(HAL_TAU_PKT_IOCTL_RX_COOKIE_T)); + + while (NULL != ptr_sw_gpd_knl) + { + /* get the IOCTL GPD from user */ + osal_io_copyFromUser(&ioctl_gpd, + ((void *)((NPS_HUGE_T)ioctl_data.ioctl_gpd_addr)) + + gpd_idx*sizeof(HAL_TAU_PKT_IOCTL_RX_GPD_T), + sizeof(HAL_TAU_PKT_IOCTL_RX_GPD_T)); + + /* get knl buf addr */ + ptr_rx_gpd = &ptr_sw_gpd_knl->rx_gpd; + phy_addr = NPS_ADDR_32_TO_64(ptr_rx_gpd->data_buf_addr_hi, ptr_rx_gpd->data_buf_addr_lo); + + ptr_virt_addr = ptr_sw_gpd_knl->ptr_cookie; + osal_skb_unmapDma(phy_addr, ((struct sk_buff *)ptr_virt_addr)->len, DMA_FROM_DEVICE); + + buf_len = (HAL_TAU_PKT_CH_LAST_GPD == ptr_rx_gpd->ch)? + ptr_rx_gpd->cnsm_buf_len : ptr_rx_gpd->avbl_buf_len; + + /* overwrite whole rx_gpd to user + * the user should re-assign the correct value to data_buf_addr_hi, data_buf_addr_low + * after this IOCTL returns + */ + osal_io_copyToUser((void *)((NPS_HUGE_T)ioctl_gpd.hw_gpd_addr), + &ptr_sw_gpd_knl->rx_gpd, + sizeof(HAL_TAU_PKT_RX_GPD_T)); + /* copy buf */ + /* DMA buf address allocated by the user is store in ptr_ioctl_data->gpd[idx].cookie */ + osal_io_copyToUser((void *)((NPS_HUGE_T)ioctl_gpd.dma_buf_addr), + ((struct sk_buff *)ptr_virt_addr)->data, buf_len); + ptr_sw_gpd_knl->ptr_cookie = ptr_virt_addr; + + /* next */ + ptr_sw_gpd_knl = ptr_sw_gpd_knl->ptr_next; + gpd_idx++; + } + + /* Must free kernel sw_gpd */ + _hal_tau_pkt_freeRxGpdList(unit, ptr_sw_first_gpd_knl, TRUE); + } + else + { + ptr_rx_cb->cnt.channel[queue].deque_fail++; + } + } + else + { + /* It may happen at last gpd, return error and do not invoke callback. */ + rc = NPS_E_OTHERS; + } + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_waitTxDone + * PURPOSE: + * To determine the next action after transfer the packet to HW. + * INPUT: + * unit -- The unit ID + * channel -- The target TX channel + * ptr_sw_gpd -- Pointer for the SW Tx GPD link list + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully perform the target action. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_waitTxDone( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel, + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_gpd) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + HAL_TAU_PKT_TX_PDMA_T *ptr_tx_pdma = HAL_TAU_PKT_GET_TX_PDMA_PTR(unit, channel); + volatile HAL_TAU_PKT_TX_GPD_T *ptr_tx_gpd = NULL; + UI32_T last_gpd_idx = 0; + UI32_T loop_cnt = 0; + + if (HAL_TAU_PKT_TX_WAIT_ASYNC == ptr_tx_cb->wait_mode) + { + ; + } + else if (HAL_TAU_PKT_TX_WAIT_SYNC_INTR == ptr_tx_cb->wait_mode) + { + osal_takeSemaphore(&ptr_tx_pdma->sync_intr_sema, HAL_TAU_PKT_PDMA_TX_INTR_TIMEOUT); + /* rc = _hal_tau_pkt_invokeTxGpdCallback(unit, ptr_sw_gpd); */ + } + else if (HAL_TAU_PKT_TX_WAIT_SYNC_POLL == ptr_tx_cb->wait_mode) + { + last_gpd_idx = ptr_tx_pdma->free_idx + ptr_tx_pdma->used_gpd_num; + last_gpd_idx %= ptr_tx_pdma->gpd_num; + ptr_tx_gpd = HAL_TAU_PKT_GET_TX_GPD_PTR(unit, channel, last_gpd_idx); + + while (HAL_TAU_PKT_HWO_HW_OWN == ptr_tx_gpd->hwo) + { + osal_dma_invalidateCache((void *)ptr_tx_gpd, sizeof(HAL_TAU_PKT_TX_GPD_T)); + loop_cnt++; + if (0 == loop_cnt % HAL_TAU_PKT_PDMA_TX_POLL_MAX_LOOP) + { + ptr_tx_cb->cnt.channel[channel].poll_timeout++; + rc = NPS_E_OTHERS; + break; + } + } + if (HAL_TAU_PKT_ECC_ERROR_OCCUR == ptr_tx_gpd->ecce) + { + ptr_tx_cb->cnt.channel[channel].ecc_err++; + } + if (NPS_E_OK == rc) + { + ptr_tx_pdma->free_gpd_num += ptr_tx_pdma->used_gpd_num; + ptr_tx_pdma->used_gpd_num = 0; + ptr_tx_pdma->free_idx = ptr_tx_pdma->used_idx; + /* rc = _hal_tau_pkt_invokeTxGpdCallback(unit, ptr_sw_gpd); */ + } + } + + return (rc); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_resumeAllIntf( + const UI32_T unit) +{ + struct net_device *ptr_net_dev = NULL; + UI32_T port; + + /* Unregister net devices by id */ + for (port = 0; port < HAL_TAU_PKT_MAX_PORT_NUM; port++) + { + ptr_net_dev = HAL_TAU_PKT_GET_PORT_NETDEV(port); + if (NULL != ptr_net_dev) + { + if (netif_queue_stopped(ptr_net_dev)) + { + netif_wake_queue(ptr_net_dev); + } + } + } + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_suspendAllIntf( + const UI32_T unit) +{ + struct net_device *ptr_net_dev = NULL; + UI32_T port; + + /* Unregister net devices by id */ + for (port = 0; port < HAL_TAU_PKT_MAX_PORT_NUM; port++) + { + ptr_net_dev = HAL_TAU_PKT_GET_PORT_NETDEV(port); + if (NULL != ptr_net_dev) + { + netif_stop_queue(ptr_net_dev); + } + } + + return (NPS_E_OK); +} + +/* FUNCTION NAME: hal_tau_pkt_sendGpd + * PURPOSE: + * To perform the packet transmission form CPU to the switch. + * INPUT: + * unit -- The unit ID + * channel -- The target TX channel + * ptr_sw_gpd -- Pointer for the SW Tx GPD link list + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully perform the transferring. + * NOTES: + * None + */ +NPS_ERROR_NO_T +hal_tau_pkt_sendGpd( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel, + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_gpd) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + HAL_TAU_PKT_TX_PDMA_T *ptr_tx_pdma = HAL_TAU_PKT_GET_TX_PDMA_PTR(unit, channel); + volatile HAL_TAU_PKT_TX_GPD_T *ptr_tx_gpd = NULL; + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_first_gpd = ptr_sw_gpd; + + UI32_T used_idx = 0; + UI32_T used_gpd_num = ptr_sw_gpd->gpd_num; + NPS_IRQ_FLAGS_T irq_flags; + + osal_takeIsrLock(&ptr_tx_pdma->ring_lock, &irq_flags); + + /* If not PDMA error */ + if (FALSE == ptr_tx_pdma->err_flag) + { + /* Make Sure GPD is enough */ + if (ptr_tx_pdma->free_gpd_num >= used_gpd_num) + { + used_idx = ptr_tx_pdma->used_idx; + while (NULL != ptr_sw_gpd) + { + ptr_tx_gpd = HAL_TAU_PKT_GET_TX_GPD_PTR(unit, channel, used_idx); + osal_dma_invalidateCache((void *)ptr_tx_gpd, sizeof(HAL_TAU_PKT_TX_GPD_T)); + + if (HAL_TAU_PKT_HWO_HW_OWN == ptr_tx_gpd->hwo) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_TX), + "u=%u, txch=%u, free gpd idx out-of-sync\n", + unit, channel); + rc = NPS_E_TABLE_FULL; + break; + } + + /* Fill in HW-GPD Ring */ + osal_memcpy((void *)ptr_tx_gpd, &ptr_sw_gpd->tx_gpd, sizeof(HAL_TAU_PKT_TX_GPD_T)); + osal_dma_flushCache((void *)ptr_tx_gpd, sizeof(HAL_TAU_PKT_TX_GPD_T)); + + /* next */ + used_idx++; + used_idx %= ptr_tx_pdma->gpd_num; + ptr_sw_gpd = ptr_sw_gpd->ptr_next; + } + + if (HAL_TAU_PKT_TX_WAIT_ASYNC == ptr_tx_cb->wait_mode) + { + /* Fill 1st GPD in SW-GPD Ring */ + ptr_tx_pdma->pptr_sw_gpd_ring[ptr_tx_pdma->used_idx] = ptr_sw_first_gpd; + } + + /* update Tx PDMA */ + ptr_tx_pdma->used_idx = used_idx; + ptr_tx_pdma->used_gpd_num += used_gpd_num; + ptr_tx_pdma->free_gpd_num -= used_gpd_num; + + _hal_tau_pkt_resumeTxChannelReg(unit, channel, used_gpd_num); + ptr_tx_cb->cnt.channel[channel].send_ok++; + + _hal_tau_pkt_waitTxDone(unit, channel, ptr_sw_first_gpd); + + /* reserve 1 packet buffer for each port in case that the suspension is too late */ +#define HAL_TAU_PKT_KNL_TX_RING_AVBL_GPD_LOW (HAL_TAU_PORT_NUM) + if (ptr_tx_pdma->free_gpd_num < HAL_TAU_PKT_KNL_TX_RING_AVBL_GPD_LOW) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_TX, + "u=%u, txch=%u, tx avbl gpd < %d, suspend all netdev\n", + unit, channel, HAL_TAU_PKT_KNL_TX_RING_AVBL_GPD_LOW); + _hal_tau_pkt_suspendAllIntf(unit); + } + } + else + { + rc = NPS_E_TABLE_FULL; + } + } + else + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_TX), + "u=%u, txch=%u, pdma hw err\n", + unit, channel); + rc = NPS_E_OTHERS; + } + + osal_giveIsrLock(&ptr_tx_pdma->ring_lock, &irq_flags); + + return (rc); +} + +/* ----------------------------------------------------------------------------------- pkt_srv */ +/* ----------------------------------------------------------------------------------- Rx Init */ +static NPS_ERROR_NO_T +_hal_tau_pkt_rxStop( + const UI32_T unit) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_RX_CHANNEL_T channel = 0; + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + HAL_TAU_PKT_DRV_CB_T *ptr_cb = HAL_TAU_PKT_GET_DRV_CB_PTR(unit); + HAL_TAU_PKT_RX_PDMA_T *ptr_rx_pdma = NULL; + + /* Check if Rx is already stopped*/ + if (0 == (ptr_cb->init_flag & HAL_TAU_PKT_INIT_RX_START)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_RX | HAL_TAU_PKT_DBG_ERR), + "u=%u, rx stop failed, not started\n", unit); + return (NPS_E_OK); + } + + /* Check if PKT Drv/Task were de-init before stopping Rx */ + /* Currently, we help to stop Rx when deinit Drv/Task, so it shouldn't enter below logic */ + if ((0 == (ptr_cb->init_flag & HAL_TAU_PKT_INIT_TASK)) || + (0 == (ptr_cb->init_flag & HAL_TAU_PKT_INIT_DRV))) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_RX | HAL_TAU_PKT_DBG_ERR), + "u=%u, rx stop failed, pkt task & pkt drv not init\n", unit); + return (NPS_E_OK); + } + + /* Deinit Rx PDMA and free buf for Rx GPD */ + for (channel = 0; channel < HAL_TAU_PKT_RX_CHANNEL_LAST; channel++) + { + ptr_rx_pdma = HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, channel); + + osal_takeSemaphore(&ptr_rx_pdma->sema, NPS_SEMAPHORE_WAIT_FOREVER); + _hal_tau_pkt_stopRxChannelReg(unit, channel); + rc = _hal_tau_pkt_deinitRxPdmaRingBuf(unit, channel); + osal_giveSemaphore(&ptr_rx_pdma->sema); + } + + /* Return user thread */ + ptr_rx_cb->running = FALSE; + ptr_cb->init_flag &= (~HAL_TAU_PKT_INIT_RX_START); + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_RX, + "u=%u, rx stop done, init flag=0x%x\n", unit, ptr_cb->init_flag); + + osal_triggerEvent(&ptr_rx_cb->sync_sema); + + return (rc); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_rxStart( + const UI32_T unit) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_RX_CHANNEL_T channel = 0; + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + HAL_TAU_PKT_DRV_CB_T *ptr_cb = HAL_TAU_PKT_GET_DRV_CB_PTR(unit); + HAL_TAU_PKT_RX_PDMA_T *ptr_rx_pdma = NULL; + + if (0 != (ptr_cb->init_flag & HAL_TAU_PKT_INIT_RX_START)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_RX | HAL_TAU_PKT_DBG_ERR), + "u=%u, rx start failed, already started\n", unit); + return (NPS_E_OK); + } + + /* init Rx PDMA and alloc buf for Rx GPD */ + for (channel = 0; channel < HAL_TAU_PKT_RX_CHANNEL_LAST; channel++) + { + ptr_rx_pdma = HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, channel); + + osal_takeSemaphore(&ptr_rx_pdma->sema, NPS_SEMAPHORE_WAIT_FOREVER); + rc = _hal_tau_pkt_initRxPdmaRingBuf(unit, channel); + if (NPS_E_OK == rc) + { + ptr_rx_pdma->cur_idx = 0; + _hal_tau_pkt_startRxChannelReg(unit, channel, ptr_rx_pdma->gpd_num); + } + osal_giveSemaphore(&ptr_rx_pdma->sema); + } + + /* enable to dequeue rx packets */ + ptr_rx_cb->running = TRUE; + + /* set the flag to record init state */ + ptr_cb->init_flag |= HAL_TAU_PKT_INIT_RX_START; + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_RX, + "u=%u, rx start done, init flag=0x%x\n", unit, ptr_cb->init_flag); + return (rc); +} + +/* FUNCTION NAME: hal_tau_pkt_setRxKnlConfig + * PURPOSE: + * 1. To stop the Rx channel and deinit the Rx subsystem. + * 2. To init the Rx subsystem and start the Rx channel. + * 3. To restart the Rx subsystem + * INPUT: + * unit -- The unit ID + * ptr_cookie -- Pointer of the RX cookie + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully configure the RX parameters. + * NPS_E_OTHERS -- Configure the parameter failed. + * NOTES: + * + */ +NPS_ERROR_NO_T +hal_tau_pkt_setRxKnlConfig( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_RX_COOKIE_T *ptr_cookie) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + HAL_TAU_PKT_DRV_CB_T *ptr_cb = HAL_TAU_PKT_GET_DRV_CB_PTR(unit); + HAL_TAU_PKT_IOCTL_RX_TYPE_T rx_type = HAL_TAU_PKT_IOCTL_RX_TYPE_LAST; + + osal_io_copyFromUser(&rx_type, &ptr_cookie->rx_type, sizeof(HAL_TAU_PKT_IOCTL_RX_TYPE_T)); + + if (HAL_TAU_PKT_IOCTL_RX_TYPE_DEINIT == rx_type) + { + _hal_tau_pkt_rxStop(unit); + } + if (HAL_TAU_PKT_IOCTL_RX_TYPE_INIT == rx_type) + { + /* To prevent buffer size from being on-the-fly changed */ + if (0 != (ptr_cb->init_flag & HAL_TAU_PKT_INIT_RX_START)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_RX | HAL_TAU_PKT_DBG_ERR), + "u=%u, rx stop failed, not started\n", unit); + return (NPS_E_OK); + } + + osal_io_copyFromUser(&ptr_rx_cb->buf_len, &ptr_cookie->buf_len, sizeof(UI32_T)); + _hal_tau_pkt_rxStart(unit); + } + + return (rc); +} + +/* FUNCTION NAME: hal_tau_pkt_getRxKnlConfig + * PURPOSE: + * To get the Rx subsystem configuration. + * INPUT: + * unit -- The unit ID + * ptr_cookie -- Pointer of the RX cookie + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully configure the RX parameters. + * NPS_E_OTHERS -- Configure the parameter failed. + * NOTES: + * + */ +NPS_ERROR_NO_T +hal_tau_pkt_getRxKnlConfig( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_RX_COOKIE_T *ptr_cookie) +{ + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + + osal_io_copyToUser(&ptr_cookie->buf_len, &ptr_rx_cb->buf_len, sizeof(UI32_T)); + + return (NPS_E_OK); +} + +/* ----------------------------------------------------------------------------------- Deinit */ +/* FUNCTION NAME: hal_tau_pkt_deinitTask + * PURPOSE: + * To de-initialize the Task for packet module. + * INPUT: + * unit -- The unit ID + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully dinitialize the control block. + * NPS_E_OTHERS -- Initialize the control block failed. + * NOTES: + * None + */ +NPS_ERROR_NO_T +hal_tau_pkt_deinitTask( + const UI32_T unit) +{ + HAL_TAU_PKT_DRV_CB_T *ptr_cb = HAL_TAU_PKT_GET_DRV_CB_PTR(unit); + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + UI32_T channel = 0; + + if (0 == (ptr_cb->init_flag & HAL_TAU_PKT_INIT_TASK)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_RX | HAL_TAU_PKT_DBG_ERR), + "u=%u, rx stop failed, not started\n", unit); + return (NPS_E_OK); + } + + /* Need to stop Rx before de-init Task */ + if (0 != (ptr_cb->init_flag & HAL_TAU_PKT_INIT_RX_START)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_RX | HAL_TAU_PKT_DBG_ERR), + "u=%u, pkt task deinit failed, rx not stop\n", unit); + + _hal_tau_pkt_rxStop(unit); + } + + /* Make the Rx IOCTL from userspace return back*/ + osal_triggerEvent(&ptr_rx_cb->sync_sema); + + /* Destroy txTask */ + if (HAL_TAU_PKT_TX_WAIT_ASYNC == ptr_tx_cb->wait_mode) + { + ptr_tx_cb->running = FALSE; + osal_triggerEvent(&ptr_tx_cb->sync_sema); + } + + /* Destroy handleRxDoneTask */ + for (channel = 0; channel < HAL_TAU_PKT_RX_CHANNEL_LAST; channel++) + { + osal_stopThread(&ptr_rx_cb->isr_task_id[channel]); + osal_triggerEvent(HAL_TAU_PKT_RCH_EVENT(unit, channel)); + osal_destroyThread(&ptr_rx_cb->isr_task_id[channel]); + } + + /* Destroy handleTxDoneTask */ + for (channel = 0; channel < HAL_TAU_PKT_TX_CHANNEL_LAST; channel++) + { + osal_stopThread(&ptr_tx_cb->isr_task_id[channel]); + osal_triggerEvent(HAL_TAU_PKT_TCH_EVENT(unit, channel)); + osal_destroyThread(&ptr_tx_cb->isr_task_id[channel]); + } + + /* Destroy handleErrorTask */ + osal_stopThread(&ptr_cb->err_task_id); + osal_triggerEvent(HAL_TAU_PKT_ERR_EVENT(unit)); + osal_destroyThread(&ptr_cb->err_task_id); + + /* Set the flag to record init state */ + ptr_cb->init_flag &= (~HAL_TAU_PKT_INIT_TASK); + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_RX, + "u=%u, pkt task deinit done, init flag=0x%x\n", + unit, ptr_cb->init_flag); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_deinitTxPdma + * PURPOSE: + * To de-initialize the Tx PDMA configuration of the specified channel. + * INPUT: + * unit -- The unit ID + * channel -- The target Tx channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully de-init the Tx PDMA. + * NPS_E_OTHERS -- De-init the Tx PDMA failed. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_deinitTxPdma( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel) +{ + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + HAL_TAU_PKT_TX_PDMA_T *ptr_tx_pdma = HAL_TAU_PKT_GET_TX_PDMA_PTR(unit, channel); + NPS_IRQ_FLAGS_T irg_flags; + + _hal_tau_pkt_stopTxChannelReg(unit, channel); + + /* Free DMA and flush queue */ + osal_takeIsrLock(&ptr_tx_pdma->ring_lock, &irg_flags); + + osal_dma_free(ptr_tx_pdma->ptr_gpd_start_addr); + + if (HAL_TAU_PKT_TX_WAIT_ASYNC == ptr_tx_cb->wait_mode) + { + osal_free(ptr_tx_pdma->pptr_sw_gpd_ring); + osal_free(ptr_tx_pdma->pptr_sw_gpd_bulk); + } + else if (HAL_TAU_PKT_TX_WAIT_SYNC_INTR == ptr_tx_cb->wait_mode) + { + osal_destroySemaphore(&ptr_tx_pdma->sync_intr_sema); + } + + osal_giveIsrLock(&ptr_tx_pdma->ring_lock, &irg_flags); + + osal_destroyIsrLock(&ptr_tx_pdma->ring_lock); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_deinitRxPdma + * PURPOSE: + * To de-initialize the Rx PDMA configuration of the specified channel. + * INPUT: + * unit -- The unit ID + * channel -- The target Rx channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully de-init the Rx PDMA. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_deinitRxPdma( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel) +{ + HAL_TAU_PKT_RX_PDMA_T *ptr_rx_pdma = HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, channel); + + /* Free DMA */ + osal_takeSemaphore(&ptr_rx_pdma->sema, NPS_SEMAPHORE_WAIT_FOREVER); + osal_dma_free(ptr_rx_pdma->ptr_gpd_start_addr); + osal_giveSemaphore(&ptr_rx_pdma->sema); + osal_destroySemaphore(&ptr_rx_pdma->sema); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_deinitPktCb + * PURPOSE: + * To de-init the control block of Drv. + * INPUT: + * unit -- The unit ID + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully de-init the control block. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_deinitPktCb( + const UI32_T unit) +{ + HAL_TAU_PKT_DRV_CB_T *ptr_cb = HAL_TAU_PKT_GET_DRV_CB_PTR(unit); + UI32_T idx = 0, vec = sizeof(_hal_tau_pkt_intr_vec) / sizeof(HAL_TAU_PKT_INTR_VEC_T); + + for (idx = 0; idx < vec; idx++) + { + osal_destroyEvent(&_hal_tau_pkt_intr_vec[idx].intr_event); + ptr_cb->intr_bitmap &= ~(_hal_tau_pkt_intr_vec[idx].intr_reg); + } + + /* Unregister PKT interrupt functions */ + osal_mdc_registerIsr(unit, NULL, NULL); + osal_destroyIsrLock(&ptr_cb->intr_lock); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_deinitPktTxCb + * PURPOSE: + * To de-init the control block of Tx PDMA. + * INPUT: + * unit -- The unit ID + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully de-init the control block. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_deinitPktTxCb( + const UI32_T unit) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + HAL_TAU_PKT_TX_CHANNEL_T channel = 0; + + /* Deinitialize TX PDMA sub-system.*/ + for (channel = 0; channel < HAL_TAU_PKT_TX_CHANNEL_LAST; channel++) + { + _hal_tau_pkt_deinitTxPdma(unit, channel); + } + + if (HAL_TAU_PKT_TX_WAIT_ASYNC == ptr_tx_cb->wait_mode) + { + /* Destroy the sync semaphore of txTask */ + osal_destroyEvent(&ptr_tx_cb->sync_sema); + + /* Deinitialize Tx GPD-queue (of first SW-GPD) from handleTxDoneTask to txTask */ + osal_destroySemaphore(&ptr_tx_cb->sw_queue.sema); + osal_que_destroy(&ptr_tx_cb->sw_queue.que_id); + } + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_deinitPktRxCb + * PURPOSE: + * To de-init the control block of Rx PDMA. + * INPUT: + * unit -- The unit ID + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully de-init the control block. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_deinitPktRxCb( + const UI32_T unit) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + HAL_TAU_PKT_RX_CHANNEL_T channel = 0; + UI32_T queue = 0; + + /* Deinitialize RX PDMA sub-system */ + for (channel = 0; channel < HAL_TAU_PKT_RX_CHANNEL_LAST; channel++) + { + _hal_tau_pkt_deinitRxPdma(unit, channel); + } + + /* Destroy the sync semaphore of rxTask */ + osal_destroyEvent(&ptr_rx_cb->sync_sema); + + /* Deinitialize Rx GPD-queue (of first SW-GPD) from handleRxDoneTask to rxTask */ + for (queue = 0; queue < HAL_TAU_PKT_RX_QUEUE_NUM; queue++) + { + osal_destroySemaphore(&ptr_rx_cb->sw_queue[queue].sema); + osal_que_destroy(&ptr_rx_cb->sw_queue[queue].que_id); + } + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_deinitL1Isr + * PURPOSE: + * To de-initialize the PDMA L1 ISR configuration. + * INPUT: + * unit -- The unit ID + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully de-initialize for the L1 ISR. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_deinitL1Isr( + const UI32_T unit) +{ + UI32_T idx = 0, vec = sizeof(_hal_tau_pkt_intr_vec) / sizeof(HAL_TAU_PKT_INTR_VEC_T); + + for (idx = 0; idx < vec; idx++) + { + _hal_tau_pkt_maskIntr(unit, _hal_tau_pkt_intr_vec[idx].intr_reg); + _hal_tau_pkt_disableIntr(unit, _hal_tau_pkt_intr_vec[idx].intr_reg); + } + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_deinitL2Isr + * PURPOSE: + * To initialize the PDMA L2 ISR configuration. + * INPUT: + * unit -- The unit ID + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully configure for the L2 ISR. + * NPS_E_OTHERS -- Configure failed. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_deinitL2Isr( + const UI32_T unit) +{ + HAL_TAU_PKT_L2_ISR_T isr_status = 0x0; + + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_RCH0); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_RCH1); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_RCH2); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_RCH3); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_TCH0); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_TCH1); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_TCH2); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_TCH3); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_RX_QID_MAP_ERR); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_RX_FRAME_ERR); + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_ERR_INT_MASK_SET), + &isr_status, sizeof(UI32_T)); + + isr_status = 0x0; + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_ERR_INT_EN), + &isr_status, sizeof(UI32_T)); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: hal_tau_pkt_deinitPktDrv + * PURPOSE: + * To invoke the functions to de-initialize the control block for each + * PDMA subsystem. + * INPUT: + * unit -- The unit ID + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully de-initialize the control blocks. + * NPS_E_OTHERS -- De-initialize the control blocks failed. + * NOTES: + * None + */ +NPS_ERROR_NO_T +hal_tau_pkt_deinitPktDrv( + const UI32_T unit) +{ + HAL_TAU_PKT_DRV_CB_T *ptr_cb = HAL_TAU_PKT_GET_DRV_CB_PTR(unit); + NPS_ERROR_NO_T rc = NPS_E_OK; + + if (0 == (ptr_cb->init_flag & HAL_TAU_PKT_INIT_DRV)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_RX | HAL_TAU_PKT_DBG_ERR), + "u=%u, pkt drv deinit failed, not inited\n", unit); + return (NPS_E_OK); + } + + rc = _hal_tau_pkt_deinitL2Isr(unit); + + if (NPS_E_OK == rc) + { + rc = _hal_tau_pkt_deinitL1Isr(unit); + } + if (NPS_E_OK == rc) + { + rc = _hal_tau_pkt_deinitPktRxCb(unit); + } + if (NPS_E_OK == rc) + { + rc = _hal_tau_pkt_deinitPktTxCb(unit); + } + if (NPS_E_OK == rc) + { + rc = _hal_tau_pkt_deinitPktCb(unit); + } + + ptr_cb->init_flag &= (~HAL_TAU_PKT_INIT_DRV); + + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, + "u=%u, pkt drv deinit done, init flag=0x%x\n", + unit, ptr_cb->init_flag); + return (rc); +} + +/* ----------------------------------------------------------------------------------- Init */ +/* FUNCTION NAME: _hal_tau_pkt_handleTxErrStat + * PURPOSE: + * To handle the TX flow control ISR. + * INPUT: + * unit -- The unit ID + * channel -- The target channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully handle the interrpt. + * NOTES: + * + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_handleTxErrStat( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel) +{ + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + HAL_TAU_PKT_TX_PDMA_T *ptr_tx_pdma = HAL_TAU_PKT_GET_TX_PDMA_PTR(unit, channel); + NPS_IRQ_FLAGS_T irg_flags; + + if (HAL_TAU_PKT_TX_WAIT_SYNC_INTR == ptr_tx_cb->wait_mode) + { + /* Notify the TX process to make it release the channel semaphore. */ + osal_giveSemaphore(&ptr_tx_pdma->sync_intr_sema); + } + + /* Set the error flag. */ + + osal_takeIsrLock(&ptr_tx_pdma->ring_lock, &irg_flags); + ptr_tx_pdma->err_flag = TRUE; + osal_giveIsrLock(&ptr_tx_pdma->ring_lock, &irg_flags); + + osal_triggerEvent(HAL_TAU_PKT_TCH_EVENT(unit, channel)); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_handleRxErrStat + * PURPOSE: + * To handle the error which occurs in RX channels. + * INPUT: + * unit -- The unit ID + * channel -- The channel where the error occurs + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully handle the error situation. + * NOTES: + * + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_handleRxErrStat( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel) +{ + HAL_TAU_PKT_RX_PDMA_T *ptr_rx_pdma = HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, channel); + + /* Set the error flag. */ + osal_takeSemaphore(&ptr_rx_pdma->sema, NPS_SEMAPHORE_WAIT_FOREVER); + ptr_rx_pdma->err_flag = TRUE; + osal_giveSemaphore(&ptr_rx_pdma->sema); + + osal_triggerEvent(HAL_TAU_PKT_RCH_EVENT(unit, channel)); + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_handleTxL2Isr + * PURPOSE: + * To handle the TX L2 interrupt according to the ISR status. + * INPUT: + * unit -- The unit ID + * channel -- The channel where the interrupt occurs + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully handle the L2 interrupt. + * NOTES: + * + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_handleTxL2Isr( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel) +{ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_T isr_status = 0x0; + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + + osal_mdc_readPciReg(unit, + HAL_TAU_PKT_GET_PDMA_TCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_TCH_INT_STAT), channel), + &isr_status, sizeof(isr_status)); + + _hal_tau_pkt_maskAllTxL2IsrReg(unit, channel); + + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_HWO_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_TX), + "u=%u, txch=%u, pdma gpd hwo err\n", unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_HWO_ERROR); + ptr_tx_cb->cnt.channel[channel].gpd_hwo_err++; + _hal_tau_pkt_handleTxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_CHKSM_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_TX), + "u=%u, txch=%u, pdma gpd chksum err\n", unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_CHKSM_ERROR); + ptr_tx_cb->cnt.channel[channel].gpd_chksm_err++; + _hal_tau_pkt_handleTxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_NO_OVFL_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_TX), + "u=%u, txch=%u, pdma gpd num overflow err\n", unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_NO_OVFL_ERROR); + ptr_tx_cb->cnt.channel[channel].gpd_no_ovfl_err++; + _hal_tau_pkt_handleTxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_DMA_READ_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_TX), + "u=%u, txch=%u, pdma gpd dma read err\n", unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_DMA_READ_ERROR); + ptr_tx_cb->cnt.channel[channel].gpd_dma_read_err++; + _hal_tau_pkt_handleTxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_BUF_SIZE_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_TX), + "u=%u, txch=%u, pdma buf size err\n", unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_BUF_SIZE_ERROR); + ptr_tx_cb->cnt.channel[channel].buf_size_err++; + _hal_tau_pkt_handleTxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_RUNT_ERROR)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_TX, + "u=%u, txch=%u, pdma pkt runt\n", unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_RUNT_ERROR); + ptr_tx_cb->cnt.channel[channel].runt_err++; + } + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_OVSZ_ERROR)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_TX, + "u=%u, txch=%u, pdma pkt over size\n", unit, channel);; + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_OVSZ_ERROR); + ptr_tx_cb->cnt.channel[channel].ovsz_err++; + } + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_LEN_MISMATCH_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_TX), + "u=%u, txch=%u, pdma len mismatch err\n", unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_LEN_MISMATCH_ERROR); + ptr_tx_cb->cnt.channel[channel].len_mismatch_err++; + } + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_PKTPL_DMA_READ_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_TX), + "u=%u, txch=%u, pdma pkt buf dma read err\n", unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_PKTPL_DMA_READ_ERROR); + ptr_tx_cb->cnt.channel[channel].pktpl_dma_read_err++; + _hal_tau_pkt_handleTxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_COS_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_TX), + "u=%u, txch=%u, pdma tx cos err\n", unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_COS_ERROR); + ptr_tx_cb->cnt.channel[channel].cos_err++; + } + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_GT255_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_TX), + "u=%u, txch=%u, pdma gpd num > 255 err\n", unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_GT255_ERROR); + ptr_tx_cb->cnt.channel[channel].gpd_gt255_err++; + _hal_tau_pkt_handleTxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_PFC)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_TX, + "u=%u, txch=%u, pdma flow ctrl\n", unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_PFC); + ptr_tx_cb->cnt.channel[channel].pfc++; + } + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_CREDIT_UDFL_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_TX), + "u=%u, txch=%u, pdma credit underflow err\n", unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_CREDIT_UDFL_ERROR); + ptr_tx_cb->cnt.channel[channel].credit_udfl_err++; + _hal_tau_pkt_handleTxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_DMA_WRITE_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_TX), + "u=%u, txch=%u, pdma dma write err\n", unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_DMA_WRITE_ERROR); + ptr_tx_cb->cnt.channel[channel].dma_write_err++; + _hal_tau_pkt_handleTxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_TX_CHANNEL_L2_ISR_STOP_CMD_CPLT)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_TX, + "u=%u, txch=%u, pdma stop done\n", unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_TX_CHANNEL_L2_ISR_STOP_CMD_CPLT); + ptr_tx_cb->cnt.channel[channel].sw_issue_stop++; + } + if (0 != isr_status) + { + _hal_tau_pkt_unmaskAllTxL2IsrReg(unit, channel); + } + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_handleRxL2Isr + * PURPOSE: + * To handle the RX L2 interrupt according to the ISR status. + * INPUT: + * unit -- The unit ID + * channel -- The channel where the interrupt occurs + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully handle the L2 interrupt. + * NOTES: + * + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_handleRxL2Isr( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel) +{ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_T isr_status = 0x0; + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + + osal_mdc_readPciReg(unit, + HAL_TAU_PKT_GET_PDMA_RCH_REG(HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_RCH_INT_STAT), channel), + &isr_status, sizeof(isr_status)); + + _hal_tau_pkt_maskAllRxL2IsrReg(unit, channel); + + if (0 != (isr_status & HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_LOW)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_RX, + "u=%u, rxch=%u, pdma avbl gpd low\n", unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_LOW); + ptr_rx_cb->cnt.channel[channel].avbl_gpd_low++; + } + if (0 != (isr_status & HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_EMPTY)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_RX, + "u=%u, rxch=%u, pdma avbl gpd empty\n", unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_EMPTY); + ptr_rx_cb->cnt.channel[channel].avbl_gpd_empty++; + } + if (0 != (isr_status & HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_RX), + "u=%u, rxch=%u, pdma avbl gpd err\n", unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_ERROR); + ptr_rx_cb->cnt.channel[channel].avbl_gpd_err++; + _hal_tau_pkt_handleRxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_RX_CHANNEL_L2_ISR_GPD_CHKSM_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_RX), + "u=%u, rxch=%u, pdma gpd chksum err\n", unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_RX_CHANNEL_L2_ISR_GPD_CHKSM_ERROR); + ptr_rx_cb->cnt.channel[channel].gpd_chksm_err++; + _hal_tau_pkt_handleRxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_RX_CHANNEL_L2_ISR_DMA_READ_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_RX), + "u=%u, rxch=%u, pdma dma read err\n", unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_RX_CHANNEL_L2_ISR_DMA_READ_ERROR); + ptr_rx_cb->cnt.channel[channel].dma_read_err++; + _hal_tau_pkt_handleRxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_RX_CHANNEL_L2_ISR_DMA_WRITE_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_RX), + "u=%u, rxch=%u, pdma dma write err\n", unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_RX_CHANNEL_L2_ISR_DMA_WRITE_ERROR); + ptr_rx_cb->cnt.channel[channel].dma_write_err++; + _hal_tau_pkt_handleRxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_RX_CHANNEL_L2_ISR_STOP_CMD_CPLT)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_RX, + "u=%u, rxch=%u, pdma stop done\n", unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_RX_CHANNEL_L2_ISR_STOP_CMD_CPLT); + ptr_rx_cb->cnt.channel[channel].sw_issue_stop++; + } + if (0 != (isr_status & HAL_TAU_PKT_RX_CHANNEL_L2_ISR_GPD_GT255_ERROR)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_RX), + "u=%u, rxch=%u, pdma gpd num > 255 err\n", unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_RX_CHANNEL_L2_ISR_GPD_GT255_ERROR); + ptr_rx_cb->cnt.channel[channel].gpd_gt255_err++; + _hal_tau_pkt_handleRxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_RX_CHANNEL_L2_ISR_TOD_UNINIT)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_RX), + "u=%u, rxch=%u, pdma tod ununit err\n", unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_RX_CHANNEL_L2_ISR_TOD_UNINIT); + ptr_rx_cb->cnt.channel[channel].tod_uninit++; + _hal_tau_pkt_handleRxErrStat(unit, channel); + } + if (0 != (isr_status & HAL_TAU_PKT_RX_CHANNEL_L2_ISR_PKT_ERROR_DROP)) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_RX), + "u=%u, rxch=%u, pdma pkt err drop\n", unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_RX_CHANNEL_L2_ISR_PKT_ERROR_DROP); + ptr_rx_cb->cnt.channel[channel].pkt_err_drop++; + } + if (0 != (isr_status & HAL_TAU_PKT_RX_CHANNEL_L2_ISR_UDSZ_DROP)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_RX, + "u=%u, rxch=%u, pdma pkt under size\n", unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_RX_CHANNEL_L2_ISR_UDSZ_DROP); + ptr_rx_cb->cnt.channel[channel].udsz_drop++; + } + if (0 != (isr_status & HAL_TAU_PKT_RX_CHANNEL_L2_ISR_OVSZ_DROP)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_RX, + "u=%u, rxch=%u, pdma pkt over size\n", unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_RX_CHANNEL_L2_ISR_OVSZ_DROP); + ptr_rx_cb->cnt.channel[channel].ovsz_drop++; + } + if (0 != (isr_status & HAL_TAU_PKT_RX_CHANNEL_L2_ISR_CMDQ_OVF_DROP)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_RX, + "u=%u, rxch=%u, pdma cmdq overflow\n", unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_RX_CHANNEL_L2_ISR_CMDQ_OVF_DROP); + ptr_rx_cb->cnt.channel[channel].cmdq_ovf_drop++; + } + if (0 != (isr_status & HAL_TAU_PKT_RX_CHANNEL_L2_ISR_FIFO_OVF_DROP)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_RX, + "u=%u, rxch=%u, pdma fifo overflow\n", unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, HAL_TAU_PKT_RX_CHANNEL_L2_ISR_FIFO_OVF_DROP); + ptr_rx_cb->cnt.channel[channel].fifo_ovf_drop++; + } + if (0 != isr_status) + { + _hal_tau_pkt_unmaskAllRxL2IsrReg(unit, channel); + } + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_handleErrorTask + * PURPOSE: + * To invoke the corresponding handler for the L2 interrupts. + * INPUT: + * ptr_argv -- The unit ID + * OUTPUT: + * None + * RETURN: + * None + * NOTES: + * None + */ +static void +_hal_tau_pkt_handleErrorTask( + void *ptr_argv) +{ + UI32_T unit = (UI32_T)((NPS_HUGE_T)ptr_argv); + HAL_TAU_PKT_L2_ISR_T isr_status = 0x0; + + osal_initRunThread(); + do + { + /* receive Error-ISR */ + osal_waitEvent(HAL_TAU_PKT_ERR_EVENT(unit)); + if (NPS_E_OK != osal_isRunThread()) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, + "u=%u, err task destroyed\n", unit); + break; /* deinit-thread */ + } + + osal_mdc_readPciReg(unit, + HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_ERR_INT_STAT), + &isr_status, sizeof(UI32_T)); + + if (0 != (HAL_TAU_PKT_L2_ISR_RCH0 & isr_status)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, "u=%u, rxch=0, rcv err isr, status=0x%x\n", + unit, isr_status); + _hal_tau_pkt_handleRxL2Isr(unit, HAL_TAU_PKT_RX_CHANNEL_0); + } + if (0 != (HAL_TAU_PKT_L2_ISR_RCH1 & isr_status)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, "u=%u, rxch=1, rcv err isr, status=0x%x\n", + unit, isr_status); + _hal_tau_pkt_handleRxL2Isr(unit, HAL_TAU_PKT_RX_CHANNEL_1); + } + if (0 != (HAL_TAU_PKT_L2_ISR_RCH2 & isr_status)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, "u=%u, rxch=2, rcv err isr, status=0x%x\n", + unit, isr_status); + _hal_tau_pkt_handleRxL2Isr(unit, HAL_TAU_PKT_RX_CHANNEL_2); + } + if (0 != (HAL_TAU_PKT_L2_ISR_RCH3 & isr_status)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, "u=%u, rxch=3, rcv err isr, status=0x%x\n", + unit, isr_status); + _hal_tau_pkt_handleRxL2Isr(unit, HAL_TAU_PKT_RX_CHANNEL_3); + } + if (0 != (HAL_TAU_PKT_L2_ISR_TCH0 & isr_status)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, "u=%u, txch=0, rcv err isr, status=0x%x\n", + unit, isr_status); + _hal_tau_pkt_handleTxL2Isr(unit, HAL_TAU_PKT_TX_CHANNEL_0); + } + if (0 != (HAL_TAU_PKT_L2_ISR_TCH1 & isr_status)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, "u=%u, txch=1, rcv err isr, status=0x%x\n", + unit, isr_status); + _hal_tau_pkt_handleTxL2Isr(unit, HAL_TAU_PKT_TX_CHANNEL_1); + } + if (0 != (HAL_TAU_PKT_L2_ISR_TCH2 & isr_status)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, "u=%u, txch=2, rcv err isr, status=0x%x\n", + unit, isr_status); + _hal_tau_pkt_handleTxL2Isr(unit, HAL_TAU_PKT_TX_CHANNEL_2); + } + if (0 != (HAL_TAU_PKT_L2_ISR_TCH3 & isr_status)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, "u=%u, txch=3, rcv err isr, status=0x%x\n", + unit, isr_status); + _hal_tau_pkt_handleTxL2Isr(unit, HAL_TAU_PKT_TX_CHANNEL_3); + } + if (0 != (HAL_TAU_PKT_L2_ISR_RX_QID_MAP_ERR & isr_status)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, "u=%u, rcv rx qid map err isr, status=0x%x\n", + unit, isr_status); + } + if (0 != (HAL_TAU_PKT_L2_ISR_RX_FRAME_ERR & isr_status)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, "u=%u, rcv rx frame err isr, status=0x%x\n", + unit, isr_status); + } + if (0 != isr_status) + { + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_ERR_INT_CLR), + &isr_status, sizeof(UI32_T)); + + _hal_tau_pkt_unmaskIntr(unit, HAL_TAU_PKT_ERR_REG(unit)); + } + + } while (NPS_E_OK == osal_isRunThread()); + osal_exitRunThread(); +} + +/* FUNCTION NAME: _hal_tau_pkt_handleTxDoneTask + * PURPOSE: + * To handle the TX done interrupt for the specified TX channel. + * INPUT: + * ptr_argv -- The unit ID and channel ID + * OUTPUT: + * None + * RETURN: + * None + * NOTES: + * None + */ +static void +_hal_tau_pkt_handleTxDoneTask( + void *ptr_argv) +{ + /* cookie or index */ + UI32_T unit = ((HAL_TAU_PKT_ISR_COOKIE_T *)ptr_argv)->unit; + HAL_TAU_PKT_TX_CHANNEL_T channel = (HAL_TAU_PKT_TX_CHANNEL_T) + ((HAL_TAU_PKT_ISR_COOKIE_T *)ptr_argv)->channel; + /* control block */ + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + HAL_TAU_PKT_TX_PDMA_T *ptr_tx_pdma = HAL_TAU_PKT_GET_TX_PDMA_PTR(unit, channel); + volatile HAL_TAU_PKT_TX_GPD_T *ptr_tx_gpd = NULL; + UI32_T first_gpd_idx = 0; /* To record the first GPD */ + UI32_T loop_cnt = 0; + NPS_IRQ_FLAGS_T irg_flags; + unsigned long timeout = 0; + UI32_T bulk_pkt_cnt = 0, idx; + + osal_initRunThread(); + do + { + /* receive Tx-Done-ISR */ + osal_waitEvent(HAL_TAU_PKT_TCH_EVENT(unit, channel)); + if (NPS_E_OK != osal_isRunThread()) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_TX, + "u=%u, txch=%u, tx done task destroyed\n", unit, channel); + break; /* deinit-thread */ + } + + /* protect Tx PDMA + * for sync-intr, the sema is locked by sendGpd + */ + if (HAL_TAU_PKT_TX_WAIT_SYNC_INTR != ptr_tx_cb->wait_mode) + { + osal_takeIsrLock(&ptr_tx_pdma->ring_lock, &irg_flags); + } + + loop_cnt = ptr_tx_pdma->used_gpd_num; + while (loop_cnt > 0) + { + ptr_tx_gpd = HAL_TAU_PKT_GET_TX_GPD_PTR(unit, channel, ptr_tx_pdma->free_idx); + osal_dma_invalidateCache((void *)ptr_tx_gpd, sizeof(HAL_TAU_PKT_TX_GPD_T)); + + /* If hwo=HW, it might be: + * 1. err_flag=TRUE -> HW breakdown -> enque and recover -> break + * 2. err_flag=FALSE -> HW busy -> break + */ + if (HAL_TAU_PKT_HWO_HW_OWN == ptr_tx_gpd->hwo) + { + if (TRUE == ptr_tx_pdma->err_flag) + { + /* flush the incomplete Tx packet */ + if (HAL_TAU_PKT_TX_WAIT_ASYNC == ptr_tx_cb->wait_mode) + { + for (idx = 0; idx < ptr_tx_pdma->gpd_num; idx++) + { + if (NULL != ptr_tx_pdma->pptr_sw_gpd_ring[idx]) + { + ptr_tx_pdma->pptr_sw_gpd_bulk[bulk_pkt_cnt] + = ptr_tx_pdma->pptr_sw_gpd_ring[idx]; + ptr_tx_pdma->pptr_sw_gpd_ring[idx] = NULL; + bulk_pkt_cnt++; + } + } + } + + /* do error recover */ + first_gpd_idx = 0; + if (NPS_E_OK == _hal_tau_pkt_recoverTxPdma(unit, channel)) + { + ptr_tx_pdma->err_flag = FALSE; + ptr_tx_cb->cnt.channel[channel].err_recover++; + } + else + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_TX | HAL_TAU_PKT_DBG_ERR), + "u=%u, txch=%u, err recover failed\n", + unit, channel); + } + } + else + { + } + break; + } + + if (HAL_TAU_PKT_TX_WAIT_ASYNC == ptr_tx_cb->wait_mode) + { + /* If hwo=SW and ch=0, record the head of sw gpd in bulk buf */ + if (HAL_TAU_PKT_CH_LAST_GPD == ptr_tx_gpd->ch) + { + ptr_tx_pdma->pptr_sw_gpd_bulk[bulk_pkt_cnt] + = ptr_tx_pdma->pptr_sw_gpd_ring[first_gpd_idx]; + + bulk_pkt_cnt++; + ptr_tx_pdma->pptr_sw_gpd_ring[first_gpd_idx] = NULL; + + /* next SW-GPD must be the head of another PKT->SW-GPD */ + first_gpd_idx = ptr_tx_pdma->free_idx + 1; + first_gpd_idx %= ptr_tx_pdma->gpd_num; + } + } + + if (HAL_TAU_PKT_ECC_ERROR_OCCUR == ptr_tx_gpd->ecce) + { + ptr_tx_cb->cnt.channel[channel].ecc_err++; + } + + /* update Tx PDMA */ + ptr_tx_pdma->free_idx++; + ptr_tx_pdma->free_idx %= ptr_tx_pdma->gpd_num; + ptr_tx_pdma->used_gpd_num--; + ptr_tx_pdma->free_gpd_num++; + loop_cnt--; + } + + /* let the netdev resume Tx */ + _hal_tau_pkt_resumeAllIntf(unit); + + /* update ISR and counter */ + ptr_tx_cb->cnt.channel[channel].tx_done++; + + _hal_tau_pkt_unmaskIntr(unit, HAL_TAU_PKT_TCH_REG(unit, channel)); + + if (HAL_TAU_PKT_TX_WAIT_SYNC_INTR != ptr_tx_cb->wait_mode) + { + osal_giveIsrLock(&ptr_tx_pdma->ring_lock, &irg_flags); + } + else + { + osal_giveSemaphore(&ptr_tx_pdma->sync_intr_sema); + } + + /* enque packet after releasing the spinlock */ + _hal_tau_pkt_txEnQueueBulk(unit, channel, bulk_pkt_cnt); + bulk_pkt_cnt = 0; + + /* prevent this task from executing too long */ + if (!(time_before(jiffies, timeout))) + { + schedule(); + timeout = jiffies + 1; /* continuously free tx descriptor for 1 tick */ + } + + } while (NPS_E_OK == osal_isRunThread()); + osal_exitRunThread(); +} + +/* FUNCTION NAME: _hal_tau_pkt_handleRxDoneTask + * PURPOSE: + * To handle the RX done interrupt for the specified RX channel. + * INPUT: + * ptr_argv -- The unit ID and channel ID + * OUTPUT: + * None + * RETURN: + * None + * NOTES: + * None + */ +static void +_hal_tau_pkt_handleRxDoneTask( + void *ptr_argv) +{ + /* cookie or index */ + UI32_T unit = ((HAL_TAU_PKT_ISR_COOKIE_T *)ptr_argv)->unit; + HAL_TAU_PKT_RX_CHANNEL_T channel = (HAL_TAU_PKT_RX_CHANNEL_T) + ((HAL_TAU_PKT_ISR_COOKIE_T *)ptr_argv)->channel; + + /* control block */ + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + HAL_TAU_PKT_RX_PDMA_T *ptr_rx_pdma = HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, channel); + volatile HAL_TAU_PKT_RX_GPD_T *ptr_rx_gpd = NULL; + + BOOL_T first = TRUE; + BOOL_T last = FALSE; + HAL_TAU_PKT_RX_SW_GPD_T *ptr_sw_gpd = NULL; + HAL_TAU_PKT_RX_SW_GPD_T *ptr_sw_first_gpd = NULL; + UI32_T loop_cnt = 0; + unsigned long timeout = 0; + + osal_initRunThread(); + do + { + /* receive Rx-Done-ISR */ + osal_waitEvent(HAL_TAU_PKT_RCH_EVENT(unit, channel)); + if (NPS_E_OK != osal_isRunThread()) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_RX, + "u=%u, rxch=%u, rx done task destroyed\n", unit, channel); + break; /* deinit-thread */ + } + + /* check if Rx-system is inited */ + if (0 == ptr_rx_cb->buf_len) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_RX | HAL_TAU_PKT_DBG_ERR), + "u=%u, rxch=%u, rx gpd buf len=0\n", + unit, channel); + continue; + } + + /* protect Rx PDMA */ + osal_takeSemaphore(&ptr_rx_pdma->sema, NPS_SEMAPHORE_WAIT_FOREVER); + loop_cnt = ptr_rx_pdma->gpd_num; + while (loop_cnt > 0) + { + ptr_rx_gpd = HAL_TAU_PKT_GET_RX_GPD_PTR(unit, channel, ptr_rx_pdma->cur_idx); + osal_dma_invalidateCache((void *)ptr_rx_gpd, sizeof(HAL_TAU_PKT_RX_GPD_T)); + + /* If hwo=HW, it might be: + * 1. err_flag=TRUE -> HW breakdown -> enque and recover -> break + * 2. err_flag=FALSE -> HW busy -> break + */ + if (HAL_TAU_PKT_HWO_HW_OWN == ptr_rx_gpd->hwo) + { + if (TRUE == ptr_rx_pdma->err_flag) + { + /* free the last incomplete Rx packet */ + if ((NULL != ptr_sw_first_gpd) && + (NULL != ptr_sw_gpd)) + { + ptr_sw_gpd->ptr_next = NULL; + ptr_sw_first_gpd->rx_complete = FALSE; + _hal_tau_pkt_rxEnQueue(unit, channel, ptr_sw_first_gpd); + } + + /* do error recover */ + first = TRUE; + last = FALSE; + if (NPS_E_OK == _hal_tau_pkt_recoverRxPdma(unit, channel)) + { + ptr_rx_pdma->err_flag = FALSE; + ptr_rx_cb->cnt.channel[channel].err_recover++; + } + else + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_RX | HAL_TAU_PKT_DBG_ERR), + "u=%u, rxch=%u, err recover failed\n", + unit, channel); + } + } + else + { + } + break; + } + + /* Move HW-GPD to SW-GPD and append to a link-list */ + if (TRUE == first) + { + ptr_sw_first_gpd = (HAL_TAU_PKT_RX_SW_GPD_T *)osal_alloc(sizeof(HAL_TAU_PKT_RX_SW_GPD_T)); + ptr_sw_gpd = ptr_sw_first_gpd; + if (NULL != ptr_sw_gpd) + { + memcpy(&ptr_sw_gpd->rx_gpd, (void *)ptr_rx_gpd, sizeof(HAL_TAU_PKT_RX_GPD_T)); + first = FALSE; + } + else + { + ptr_rx_cb->cnt.no_memory++; + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_RX | HAL_TAU_PKT_DBG_ERR), + "u=%u, rxch=%u, alloc 1st sw gpd failed, size=%d\n", + unit, channel, sizeof(HAL_TAU_PKT_RX_SW_GPD_T)); + break; + } + } + else + { + ptr_sw_gpd->ptr_next = (HAL_TAU_PKT_RX_SW_GPD_T *)osal_alloc(sizeof(HAL_TAU_PKT_RX_SW_GPD_T)); + ptr_sw_gpd = ptr_sw_gpd->ptr_next; + if (NULL != ptr_sw_gpd) + { + memcpy(&ptr_sw_gpd->rx_gpd, (void *)ptr_rx_gpd, sizeof(HAL_TAU_PKT_RX_GPD_T)); + } + else + { + ptr_rx_cb->cnt.no_memory++; + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_RX | HAL_TAU_PKT_DBG_ERR), + "u=%u, rxch=%u, alloc mid sw gpd failed, size=%d\n", + unit, channel, sizeof(HAL_TAU_PKT_RX_SW_GPD_T)); + break; + } + } + + ptr_sw_gpd->ptr_cookie = ptr_rx_pdma->pptr_skb_ring[ptr_rx_pdma->cur_idx]; + + /* If hwo=SW and ch=0, enque SW-GPD and signal rxTask */ + if (HAL_TAU_PKT_CH_LAST_GPD == ptr_rx_gpd->ch) + { + last = TRUE; + } + + /* If hwo=SW and ch=*, re-alloc-buf and resume */ + while (NPS_E_OK != _hal_tau_pkt_allocRxPayloadBuf(unit, channel, ptr_rx_pdma->cur_idx)) + { + ptr_rx_cb->cnt.no_memory++; + HAL_TAU_PKT_ALLOC_MEM_RETRY_SLEEP(); + } + ptr_rx_gpd->ioc = HAL_TAU_PKT_IOC_HAS_INTR; + ptr_rx_gpd->hwo = HAL_TAU_PKT_HWO_HW_OWN; + osal_dma_flushCache((void *)ptr_rx_gpd, sizeof(HAL_TAU_PKT_RX_GPD_T)); + + /* Enque the SW-GPD to rxTask */ + if (TRUE == last) + { + ptr_sw_gpd->ptr_next = NULL; + ptr_sw_first_gpd->rx_complete = TRUE; + _hal_tau_pkt_rxEnQueue(unit, channel, ptr_sw_first_gpd); + + /* To rebuild the SW GPD link list */ + first = TRUE; + last = FALSE; + } + + _hal_tau_pkt_resumeRxChannelReg(unit, channel, 1); + + /* update Rx PDMA */ + ptr_rx_pdma->cur_idx++; + ptr_rx_pdma->cur_idx %= ptr_rx_pdma->gpd_num; + loop_cnt--; + } + + osal_giveSemaphore(&ptr_rx_pdma->sema); + + /* update ISR and counter */ + ptr_rx_cb->cnt.channel[channel].rx_done++; + + _hal_tau_pkt_unmaskIntr(unit, HAL_TAU_PKT_RCH_REG(unit, channel)); + + /* prevent this task from executing too long */ + if (!(time_before(jiffies, timeout))) + { + schedule(); + timeout = jiffies + 1; /* continuously rx for 1 tick */ + } + + } while (NPS_E_OK == osal_isRunThread()); + osal_exitRunThread(); +} + +static void +_hal_tau_pkt_net_dev_tx_callback( + const UI32_T unit, + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_gpd, + struct sk_buff *ptr_skb) +{ + NPS_ADDR_T phy_addr = 0; + + /* unmap dma */ + phy_addr = NPS_ADDR_32_TO_64(ptr_sw_gpd->tx_gpd.data_buf_addr_hi, ptr_sw_gpd->tx_gpd.data_buf_addr_lo); + osal_skb_unmapDma(phy_addr, ptr_skb->len, DMA_TO_DEVICE); + + /* free skb */ + osal_skb_free(ptr_skb); + + /* free gpd */ + osal_free(ptr_sw_gpd); +} + +/* FUNCTION NAME: hal_tau_pkt_initTask + * PURPOSE: + * To initialize the Task for packet module. + * INPUT: + * unit -- The unit ID + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully dinitialize the control block. + * NPS_E_OTHERS -- Initialize the control block failed. + * NOTES: + * None + */ +NPS_ERROR_NO_T +hal_tau_pkt_initTask( + const UI32_T unit) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_DRV_CB_T *ptr_cb = HAL_TAU_PKT_GET_DRV_CB_PTR(unit); + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + UI32_T channel = 0; + + if (0 != (ptr_cb->init_flag & HAL_TAU_PKT_INIT_TASK)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_ERR, + "u=%u, pkt task init failed, not inited\n", unit); + return (rc); + } + + /* Init handleErrorTask */ + rc = osal_createThread("ERROR", HAL_TAU_PKT_ERROR_ISR_STACK_SIZE, + HAL_TAU_PKT_ERROR_ISR_THREAD_PRI, _hal_tau_pkt_handleErrorTask, + (void *)((NPS_HUGE_T)unit), &ptr_cb->err_task_id); + + /* Init handleTxDoneTask */ + for (channel = 0; ((channel < HAL_TAU_PKT_TX_CHANNEL_LAST) && (NPS_E_OK == rc)); channel++) + { + ptr_tx_cb->isr_task_cookie[channel].unit = unit; + ptr_tx_cb->isr_task_cookie[channel].channel = channel; + + rc = osal_createThread("TX_ISR", HAL_TAU_PKT_TX_ISR_STACK_SIZE, + HAL_TAU_PKT_TX_ISR_THREAD_PRI, _hal_tau_pkt_handleTxDoneTask, + (void *)&ptr_tx_cb->isr_task_cookie[channel], + &ptr_tx_cb->isr_task_id[channel]); + } + + /* Init handleRxDoneTask */ + for (channel = 0; ((channel < HAL_TAU_PKT_RX_CHANNEL_LAST) && (NPS_E_OK == rc)); channel++) + { + ptr_rx_cb->isr_task_cookie[channel].unit = unit; + ptr_rx_cb->isr_task_cookie[channel].channel = channel; + + rc = osal_createThread("RX_ISR", HAL_TAU_PKT_RX_ISR_STACK_SIZE, + HAL_TAU_PKT_RX_ISR_THREAD_PRI, _hal_tau_pkt_handleRxDoneTask, + (void *)&ptr_rx_cb->isr_task_cookie[channel], + &ptr_rx_cb->isr_task_id[channel]); + } + + /* Init txTask */ + if (HAL_TAU_PKT_TX_WAIT_ASYNC == ptr_tx_cb->wait_mode) + { + ptr_tx_cb->running = TRUE; + } + + ptr_cb->init_flag |= HAL_TAU_PKT_INIT_TASK; + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, + "u=%u, pkt task init done, init flag=0x%x\n", unit, ptr_cb->init_flag); + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_initTxPdma + * PURPOSE: + * To initialize the TX PDMA. + * INPUT: + * unit -- The unit ID + * channel -- The target Tx channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully initialize the TX PDMA. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_initTxPdma( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + HAL_TAU_PKT_TX_PDMA_T *ptr_tx_pdma = HAL_TAU_PKT_GET_TX_PDMA_PTR(unit, channel); + NPS_IRQ_FLAGS_T irg_flags; + + /* Isr lock to protect Tx PDMA */ + osal_createIsrLock("TCH_LCK", &ptr_tx_pdma->ring_lock); + + if (HAL_TAU_PKT_TX_WAIT_SYNC_INTR == ptr_tx_cb->wait_mode) + { + /* Sync semaphore to signal sendTxPacket */ + osal_createSemaphore("TCH_SYN", NPS_SEMAPHORE_SYNC, &ptr_tx_pdma->sync_intr_sema); + } + + /* Reset Tx PDMA */ + osal_takeIsrLock(&ptr_tx_pdma->ring_lock, &irg_flags); + + ptr_tx_pdma->used_idx = 0; + ptr_tx_pdma->free_idx = 0; + ptr_tx_pdma->used_gpd_num = 0; + ptr_tx_pdma->free_gpd_num = HAL_TAU_PKT_PDMA_TX_GPD_NUM; + ptr_tx_pdma->gpd_num = HAL_TAU_PKT_PDMA_TX_GPD_NUM; + + /* Prepare the HW-GPD ring */ + ptr_tx_pdma->ptr_gpd_start_addr = (HAL_TAU_PKT_TX_GPD_T *)osal_dma_alloc( + (ptr_tx_pdma->gpd_num + 1) * sizeof(HAL_TAU_PKT_TX_GPD_T)); + + if (NULL != ptr_tx_pdma->ptr_gpd_start_addr) + { + osal_memset(ptr_tx_pdma->ptr_gpd_start_addr, 0x0, + (ptr_tx_pdma->gpd_num + 1) * sizeof(HAL_TAU_PKT_TX_GPD_T)); + + ptr_tx_pdma->ptr_gpd_align_start_addr = (HAL_TAU_PKT_TX_GPD_T *)HAL_TAU_PKT_PDMA_ALIGN_ADDR( + (NPS_HUGE_T)ptr_tx_pdma->ptr_gpd_start_addr, sizeof(HAL_TAU_PKT_TX_GPD_T)); + + rc = _hal_tau_pkt_initTxPdmaRing(unit, channel); + if (NPS_E_OK == rc) + { + _hal_tau_pkt_startTxChannelReg(unit, channel, 0); + } + } + else + { + ptr_tx_cb->cnt.no_memory++; + rc = NPS_E_NO_MEMORY; + } + + if (HAL_TAU_PKT_TX_WAIT_ASYNC == ptr_tx_cb->wait_mode) + { + if (NPS_E_OK == rc) + { + /* Prepare the SW-GPD ring */ + ptr_tx_pdma->pptr_sw_gpd_ring = (HAL_TAU_PKT_TX_SW_GPD_T **)osal_alloc( + ptr_tx_pdma->gpd_num * sizeof(HAL_TAU_PKT_TX_SW_GPD_T *)); + + if (NULL != ptr_tx_pdma->pptr_sw_gpd_ring) + { + osal_memset(ptr_tx_pdma->pptr_sw_gpd_ring, 0x0, + ptr_tx_pdma->gpd_num * sizeof(HAL_TAU_PKT_TX_SW_GPD_T *)); + } + else + { + ptr_tx_cb->cnt.no_memory++; + rc = NPS_E_NO_MEMORY; + } + + /* a temp buffer to store the 1st sw gpd for each packet to be enque + * we cannot enque packet before release a spinlock + */ + ptr_tx_pdma->pptr_sw_gpd_bulk = (HAL_TAU_PKT_TX_SW_GPD_T **)osal_alloc( + ptr_tx_pdma->gpd_num * sizeof(HAL_TAU_PKT_TX_SW_GPD_T *)); + + if (NULL != ptr_tx_pdma->pptr_sw_gpd_bulk) + { + osal_memset(ptr_tx_pdma->pptr_sw_gpd_bulk, 0x0, + ptr_tx_pdma->gpd_num * sizeof(HAL_TAU_PKT_TX_SW_GPD_T *)); + } + else + { + ptr_tx_cb->cnt.no_memory++; + rc = NPS_E_NO_MEMORY; + } + } + } + + osal_giveIsrLock(&ptr_tx_pdma->ring_lock, &irg_flags); + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_initRxPdma + * PURPOSE: + * To initialize the RX PDMA. + * INPUT: + * unit -- The unit ID + * channel -- The target Rx channel + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully initialize the RX PDMA. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_initRxPdma( + const UI32_T unit, + const HAL_TAU_PKT_RX_CHANNEL_T channel) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + HAL_TAU_PKT_RX_PDMA_T *ptr_rx_pdma = HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, channel); + + /* Binary semaphore to protect Rx PDMA */ + osal_createSemaphore("RCH_LCK", NPS_SEMAPHORE_BINARY, &ptr_rx_pdma->sema); + + /* Reset Rx PDMA */ + osal_takeSemaphore(&ptr_rx_pdma->sema, NPS_SEMAPHORE_WAIT_FOREVER); + ptr_rx_pdma->cur_idx = 0; + ptr_rx_pdma->gpd_num = HAL_TAU_PKT_PDMA_RX_GPD_NUM; + + /* Prepare the HW-GPD ring */ + ptr_rx_pdma->ptr_gpd_start_addr = (HAL_TAU_PKT_RX_GPD_T *)osal_dma_alloc( + (ptr_rx_pdma->gpd_num + 1) * sizeof(HAL_TAU_PKT_RX_GPD_T)); + + if (NULL != ptr_rx_pdma->ptr_gpd_start_addr) + { + osal_memset(ptr_rx_pdma->ptr_gpd_start_addr, 0, + (ptr_rx_pdma->gpd_num + 1) * sizeof(HAL_TAU_PKT_RX_GPD_T)); + + ptr_rx_pdma->ptr_gpd_align_start_addr = (HAL_TAU_PKT_RX_GPD_T *)HAL_TAU_PKT_PDMA_ALIGN_ADDR( + (NPS_HUGE_T)ptr_rx_pdma->ptr_gpd_start_addr, sizeof(HAL_TAU_PKT_RX_GPD_T)); + + /* will initRxPdmaRingBuf and start RCH after setRxConfig */ + rc = _hal_tau_pkt_initRxPdmaRing(unit, channel); + } + else + { + ptr_rx_cb->cnt.no_memory++; + rc = NPS_E_NO_MEMORY; + } + + if (NPS_E_OK == rc) + { + /* Prepare the SKB ring */ + ptr_rx_pdma->pptr_skb_ring = (struct sk_buff **)osal_alloc( + ptr_rx_pdma->gpd_num * sizeof(struct sk_buff *)); + + if (NULL != ptr_rx_pdma->pptr_skb_ring) + { + osal_memset(ptr_rx_pdma->pptr_skb_ring, 0x0, + ptr_rx_pdma->gpd_num * sizeof(struct sk_buff *)); + } + else + { + ptr_rx_cb->cnt.no_memory++; + rc = NPS_E_NO_MEMORY; + } + } + + osal_giveSemaphore(&ptr_rx_pdma->sema); + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_initPktCb + * PURPOSE: + * To initialize the control block of Drv. + * INPUT: + * unit -- The unit ID + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully initialize the control block. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_initPktCb( + const UI32_T unit) +{ + HAL_TAU_PKT_DRV_CB_T *ptr_cb = HAL_TAU_PKT_GET_DRV_CB_PTR(unit); + UI32_T idx = 0, vec = sizeof(_hal_tau_pkt_intr_vec) / sizeof(HAL_TAU_PKT_INTR_VEC_T); + + osal_memset(ptr_cb, 0x0, sizeof(HAL_TAU_PKT_DRV_CB_T)); + + /* Register PKT interrupt functions */ + osal_createIsrLock("ISR_LOCK", &ptr_cb->intr_lock); + osal_mdc_registerIsr(unit, _hal_tau_pkt_dispatcher, (void *)((NPS_HUGE_T)unit)); + + for (idx = 0; idx < vec; idx++) + { + osal_createEvent("ISR_EVENT", &_hal_tau_pkt_intr_vec[idx].intr_event); + ptr_cb->intr_bitmap |= (_hal_tau_pkt_intr_vec[idx].intr_reg); + } + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_initPktTxCb + * PURPOSE: + * To initialize the control block of Rx PDMA. + * INPUT: + * unit -- The unit ID + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully initialize the control block. + * NPS_E_OTHERS -- Configure failed. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_initPktTxCb( + const UI32_T unit) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + HAL_TAU_PKT_TX_CHANNEL_T channel = 0; + + osal_memset(ptr_tx_cb, 0x0, sizeof(HAL_TAU_PKT_TX_CB_T)); + + ptr_tx_cb->wait_mode = HAL_TAU_PKT_TX_WAIT_MODE; + + if (HAL_TAU_PKT_TX_WAIT_ASYNC == ptr_tx_cb->wait_mode) + { + /* Sync semaphore to signal txTask */ + osal_createEvent("TX_SYNC", &ptr_tx_cb->sync_sema); + + /* Initialize Tx GPD-queue (of first SW-GPD) from handleTxDoneTask to txTask */ + ptr_tx_cb->sw_queue.len = HAL_TAU_PKT_TX_QUEUE_LEN; + ptr_tx_cb->sw_queue.weight = 0; + + osal_createSemaphore("TX_QUE", NPS_SEMAPHORE_BINARY, &ptr_tx_cb->sw_queue.sema); + osal_que_create(&ptr_tx_cb->sw_queue.que_id, ptr_tx_cb->sw_queue.len); + } + else if (HAL_TAU_PKT_TX_WAIT_SYNC_POLL == ptr_tx_cb->wait_mode) + { + /* Disable TX done ISR. */ + for (channel = 0; channel < HAL_TAU_PKT_TX_CHANNEL_LAST; channel++) + { + _hal_tau_pkt_disableIntr(unit, HAL_TAU_PKT_TCH_REG(unit, channel)); + } + } + + /* Init Tx PDMA */ + for (channel = 0; ((channel < HAL_TAU_PKT_TX_CHANNEL_LAST) && (NPS_E_OK == rc)); channel++) + { + rc = _hal_tau_pkt_initTxPdma(unit, channel); + } + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_initPktRxCb + * PURPOSE: + * To initialize the control block of Rx PDMA. + * INPUT: + * unit -- The unit ID + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully initialize the control block. + * NPS_E_OTHERS -- Configure failed. + * NOTES: + * + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_initPktRxCb( + const UI32_T unit) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + HAL_TAU_PKT_RX_CB_T *ptr_rx_cb = HAL_TAU_PKT_GET_RX_CB_PTR(unit); + HAL_TAU_PKT_RX_CHANNEL_T channel = 0; + UI32_T queue = 0; + + osal_memset(ptr_rx_cb, 0x0, sizeof(HAL_TAU_PKT_RX_CB_T)); + + ptr_rx_cb->sched_mode = HAL_TAU_PKT_RX_SCHED_MODE; + + /* Sync semaphore to signal rxTask */ + osal_createEvent("RX_SYNC", &ptr_rx_cb->sync_sema); + + /* Initialize Rx GPD-queue (of first SW-GPD) from handleRxDoneTask to rxTask */ + for (queue = 0; ((queue < HAL_TAU_PKT_RX_QUEUE_NUM) && (NPS_E_OK == rc)); queue++) + { + ptr_rx_cb->sw_queue[queue].len = HAL_TAU_PKT_RX_QUEUE_LEN; + ptr_rx_cb->sw_queue[queue].weight = HAL_TAU_PKT_RX_QUEUE_WEIGHT; + + osal_createSemaphore("RX_QUE", NPS_SEMAPHORE_BINARY, &ptr_rx_cb->sw_queue[queue].sema); + osal_que_create(&ptr_rx_cb->sw_queue[queue].que_id, ptr_rx_cb->sw_queue[queue].len); + } + + /* Init Rx PDMA */ + for (channel = 0; ((channel < HAL_TAU_PKT_RX_CHANNEL_LAST) && (NPS_E_OK == rc)); channel++) + { + rc = _hal_tau_pkt_initRxPdma(unit, channel); + } + + return (rc); +} + +/* FUNCTION NAME: _hal_tau_pkt_initL1Isr + * PURPOSE: + * To initialize the PDMA L1 ISR configuration. + * INPUT: + * unit -- The unit ID + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully initialize the L1 ISR. + * NPS_E_OTHERS -- Configure failed. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_initL1Isr( + const UI32_T unit) +{ + UI32_T idx = 0, vec = sizeof(_hal_tau_pkt_intr_vec) / sizeof(HAL_TAU_PKT_INTR_VEC_T); + + for (idx = 0; idx < vec; idx++) + { + _hal_tau_pkt_enableIntr(unit, _hal_tau_pkt_intr_vec[idx].intr_reg); + _hal_tau_pkt_unmaskIntr(unit, _hal_tau_pkt_intr_vec[idx].intr_reg); + } + + return (NPS_E_OK); +} + +/* FUNCTION NAME: _hal_tau_pkt_initL2Isr + * PURPOSE: + * To initialize the PDMA L2 ISR configuration. + * INPUT: + * unit -- The unit ID + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully configure for the L2 ISR. + * NPS_E_OTHERS -- Configure failed. + * NOTES: + * None + */ +static NPS_ERROR_NO_T +_hal_tau_pkt_initL2Isr( + const UI32_T unit) +{ + HAL_TAU_PKT_L2_ISR_T isr_status = 0x0; + + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_RCH0); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_RCH1); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_RCH2); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_RCH3); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_TCH0); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_TCH1); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_TCH2); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_TCH3); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_RX_QID_MAP_ERR); + HAL_TAU_PKT_SET_BITMAP(isr_status, HAL_TAU_PKT_L2_ISR_RX_FRAME_ERR); + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_ERR_INT_EN), + &isr_status, sizeof(UI32_T)); + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_ERR_INT_MASK_SET), + &isr_status, sizeof(UI32_T)); + + return (NPS_E_OK); + +} + +NPS_ERROR_NO_T +_hal_tau_pkt_resetIosCreditCfg( + const UI32_T unit) +{ +#define HAL_TAU_PKT_PDMA_CREDIT_CFG_RESET_OFFSET (16) + + UI32_T credit_cfg = 0x0; + UI32_T idx; + + for (idx=0; idxptr_profile = ptr_new_profile; + + /* Create the 1st node in the interface profile list */ + if (NULL == *pptr_profile_list) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "prof list empty\n"); + *pptr_profile_list = ptr_new_prof_node; + ptr_new_prof_node->ptr_next_node = NULL; + } + else + { + ptr_prev_node = *pptr_profile_list; + ptr_curr_node = *pptr_profile_list; + + while (ptr_curr_node != NULL) + { + if (ptr_curr_node->ptr_profile->priority <= ptr_new_profile->priority) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "find prof id=%d (%s) higher priority=%d, search next\n", + ptr_curr_node->ptr_profile->id, + ptr_curr_node->ptr_profile->name, + ptr_curr_node->ptr_profile->priority); + /* Search the next node */ + ptr_prev_node = ptr_curr_node; + ptr_curr_node = ptr_curr_node->ptr_next_node; + } + else + { + /* Insert intermediate node */ + ptr_new_prof_node->ptr_next_node = ptr_curr_node; + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "insert prof id=%d (%s) before prof id=%d (%s) (priority=%d >= %d)\n", + ptr_new_prof_node->ptr_profile->id, + ptr_new_prof_node->ptr_profile->name, + ptr_curr_node->ptr_profile->id, + ptr_curr_node->ptr_profile->name, + ptr_new_prof_node->ptr_profile->priority, + ptr_curr_node->ptr_profile->priority); + + if (ptr_prev_node == ptr_curr_node) + { + /* There is no previous node: change the root */ + *pptr_profile_list = ptr_new_prof_node; + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "insert prof id=%d (%s) to head (priority=%d)\n", + ptr_new_prof_node->ptr_profile->id, + ptr_new_prof_node->ptr_profile->name, + ptr_new_prof_node->ptr_profile->priority); + } + else + { + ptr_prev_node->ptr_next_node = ptr_new_prof_node; + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "insert prof id=%d (%s) after prof id=%d (%s) (priority=%d <= %d)\n", + ptr_new_prof_node->ptr_profile->id, + ptr_new_prof_node->ptr_profile->name, + ptr_prev_node->ptr_profile->id, + ptr_prev_node->ptr_profile->name, + ptr_new_prof_node->ptr_profile->priority, + ptr_prev_node->ptr_profile->priority); + } + + return (NPS_E_OK); + } + } + + /* Insert node to the tail of list */ + ptr_prev_node->ptr_next_node = ptr_new_prof_node; + ptr_new_prof_node->ptr_next_node = NULL; + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "insert prof id=%d (%s) to tail, after prof id=%d (%s) (priority=%d <= %d)\n", + ptr_new_prof_node->ptr_profile->id, + ptr_new_prof_node->ptr_profile->name, + ptr_prev_node->ptr_profile->id, + ptr_prev_node->ptr_profile->name, + ptr_new_prof_node->ptr_profile->priority, + ptr_prev_node->ptr_profile->priority); + } + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_addProfToAllIntf( + HAL_TAU_PKT_NETIF_PROFILE_T *ptr_new_profile) +{ + UI32_T port; + HAL_TAU_PKT_NETIF_PORT_DB_T *ptr_port_db; + + for (port = 0; port < HAL_TAU_PKT_MAX_PORT_NUM; port++) + { + ptr_port_db = HAL_TAU_PKT_GET_PORT_DB(port); + /* Shall we check if the interface is ever created in the port?? */ + //if (NULL != ptr_port_db->ptr_net_dev) + if (1) + { + _hal_tau_pkt_addProfToList(ptr_new_profile, &ptr_port_db->ptr_profile_list); + } + } + + return (NPS_E_OK); +} + +static HAL_TAU_PKT_NETIF_PROFILE_T * +_hal_tau_pkt_delProfFromListById( + const UI32_T id, + HAL_TAU_PKT_PROFILE_NODE_T **pptr_profile_list) +{ + HAL_TAU_PKT_PROFILE_NODE_T *ptr_temp_node; + HAL_TAU_PKT_PROFILE_NODE_T *ptr_curr_node, *ptr_prev_node; + HAL_TAU_PKT_NETIF_PROFILE_T *ptr_profile = NULL;; + + if (NULL != *pptr_profile_list) + { + /* Check the 1st node */ + if (id == (*pptr_profile_list)->ptr_profile->id) + { + ptr_profile = (*pptr_profile_list)->ptr_profile; + ptr_temp_node = (*pptr_profile_list); + (*pptr_profile_list) = ptr_temp_node->ptr_next_node; + + if (NULL != ptr_temp_node->ptr_next_node) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "choose prof id=%d (%s) as new head\n", + ptr_temp_node->ptr_next_node->ptr_profile->id, + ptr_temp_node->ptr_next_node->ptr_profile->name); + } + else + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "prof list is empty\n"); + } + + + osal_free(ptr_temp_node); + } + else + { + ptr_prev_node = *pptr_profile_list; + ptr_curr_node = ptr_prev_node->ptr_next_node; + + while (NULL != ptr_curr_node) + { + if (id != ptr_curr_node->ptr_profile->id) + { + ptr_prev_node = ptr_curr_node; + ptr_curr_node = ptr_curr_node->ptr_next_node; + } + else + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "find prof id=%d, free done\n", id); + + ptr_profile = ptr_curr_node->ptr_profile; + ptr_prev_node->ptr_next_node = ptr_curr_node->ptr_next_node; + osal_free(ptr_curr_node); + break; + } + } + } + } + + if (NULL == ptr_profile) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_PROFILE | HAL_TAU_PKT_DBG_ERR), + "find prof failed, id=%d\n", id); + } + + return (ptr_profile); +} + + +static NPS_ERROR_NO_T +_hal_tau_pkt_delProfFromAllIntfById( + const UI32_T id) +{ + UI32_T port; + HAL_TAU_PKT_NETIF_PORT_DB_T *ptr_port_db; + + for (port = 0; port < HAL_TAU_PKT_MAX_PORT_NUM; port++) + { + ptr_port_db = HAL_TAU_PKT_GET_PORT_DB(port); + /* Shall we check if the interface is ever created in the port?? */ + //if (NULL != ptr_port_db->ptr_net_dev) + if (1) + { + _hal_tau_pkt_delProfFromListById(id, &ptr_port_db->ptr_profile_list); + } + } + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_allocProfEntry( + HAL_TAU_PKT_NETIF_PROFILE_T *ptr_profile) +{ + UI32_T idx; + + for (idx=0; idxid = idx; + return (NPS_E_OK); + } + } + return (NPS_E_TABLE_FULL); +} + +static HAL_TAU_PKT_NETIF_PROFILE_T * +_hal_tau_pkt_freeProfEntry( + const UI32_T id) +{ + HAL_TAU_PKT_NETIF_PROFILE_T *ptr_profile = NULL; + + if (id < HAL_TAU_PKT_NET_PROFILE_NUM_MAX) + { + ptr_profile = _ptr_hal_tau_pkt_profile_entry[id]; + _ptr_hal_tau_pkt_profile_entry[id] = NULL; + } + + return (ptr_profile); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_destroyAllIntf( + const UI32_T unit) +{ + HAL_TAU_PKT_NETIF_PORT_DB_T *ptr_port_db; + UI32_T port = 0; + + /* Unregister net devices by id, although the "id" is now relavent to "port" we still perform a search */ + for (port = 0; port < HAL_TAU_PKT_MAX_PORT_NUM; port++) + { + ptr_port_db = HAL_TAU_PKT_GET_PORT_DB(port); + if (NULL != ptr_port_db->ptr_net_dev) /* valid intf */ + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_INTF, + "u=%u, find intf %s (id=%d) on phy port=%d, destroy done\n", + unit, + ptr_port_db->meta.name, + ptr_port_db->meta.port, + ptr_port_db->meta.port); + + netif_stop_queue(ptr_port_db->ptr_net_dev); + unregister_netdev(ptr_port_db->ptr_net_dev); + free_netdev(ptr_port_db->ptr_net_dev); + + /* Don't need to remove profiles on this port. + * In fact, the profile is binding to "port" not "intf". + */ + /* _hal_tau_pkt_destroyProfList(ptr_port_db->ptr_profile_list); */ + + osal_memset(ptr_port_db, 0x0, sizeof(HAL_TAU_PKT_NETIF_PORT_DB_T)); + } + } + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_delProfListOnAllIntf( + const UI32_T unit) +{ + HAL_TAU_PKT_NETIF_PORT_DB_T *ptr_port_db; + UI32_T port = 0; + HAL_TAU_PKT_PROFILE_NODE_T *ptr_curr_node, *ptr_next_node; + + /* Unregister net devices by id, although the "id" is now relavent to "port" we still perform a search */ + for (port = 0; port < HAL_TAU_PKT_MAX_PORT_NUM; port++) + { + ptr_port_db = HAL_TAU_PKT_GET_PORT_DB(port); + if (NULL != ptr_port_db->ptr_profile_list) /* valid intf */ + { + ptr_curr_node = ptr_port_db->ptr_profile_list; + while (NULL != ptr_curr_node) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "u=%u, del prof id=%d on phy port=%d\n", + unit, ptr_curr_node->ptr_profile->id, port); + + ptr_next_node = ptr_curr_node->ptr_next_node; + osal_free(ptr_curr_node); + ptr_curr_node = ptr_next_node; + } + } + } + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_destroyAllProfile( + const UI32_T unit) +{ + HAL_TAU_PKT_NETIF_PROFILE_T *ptr_profile; + UI32_T prof_id; + + _hal_tau_pkt_delProfListOnAllIntf(unit); + + for (prof_id=0; prof_idid, + ptr_profile->name, + ptr_profile->priority, + ptr_profile->flags); + osal_free(ptr_profile); + } + } + + return (NPS_E_OK); +} + +/* FUNCTION NAME: hal_tau_pkt_initPktDrv + * PURPOSE: + * To invoke the functions to initialize the control block for each + * PDMA subsystem. + * INPUT: + * unit -- The unit ID + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successfully initialize the control blocks. + * NPS_E_OTHERS -- Initialize the control blocks failed. + * NOTES: + * None + */ +NPS_ERROR_NO_T +hal_tau_pkt_initPktDrv( + const UI32_T unit) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + UI32_T channel = 0; + UI32_T flush_intr = 0x0; + UI32_T clear_intr = 0xffffffff; + HAL_TAU_PKT_DRV_CB_T *ptr_cb = HAL_TAU_PKT_GET_DRV_CB_PTR(unit); + + /* There's a case that PDMA Tx is on-going when doing chip reset, + * where PDMA may hang and be not programmable since current Tx packet + * stucks due to IOS credit too low. + * Thus, we always reset IOS credit value before progrmming Tx PDMA. + */ + _hal_tau_pkt_resetIosCreditCfg(unit); + + /* Since the users may kill SDK application without a de-init flow, + * we help to detect if NETIF is ever init before, and perform deinit. + * (Because the users cannot perform Task init bypassing Drv init, this + * check is required only in here) + */ + if (0 != (ptr_cb->init_flag & HAL_TAU_PKT_INIT_DRV)) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_ERR, + "u=%u, init pkt drv failed, inited\n", unit); + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_ERR, + "u=%u, stop rx pkt\n", unit); + _hal_tau_pkt_rxStop(unit); + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_ERR, + "u=%u, stop all intf\n", unit); + _hal_tau_pkt_stopAllIntf(unit); + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_ERR, + "u=%u, deinit pkt task\n", unit); + + hal_tau_pkt_deinitTask(unit); + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_ERR, + "u=%u, deinit pkt drv\n", unit); + hal_tau_pkt_deinitPktDrv(unit); + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_ERR, + "u=%u, destroy all prof\n", unit); + _hal_tau_pkt_destroyAllProfile(unit); + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_ERR, + "u=%u, destroy all intf\n", unit); + _hal_tau_pkt_destroyAllIntf(unit); + } + + /* [cold-boot] 1. stop DMA channel + * 2. disable/mask/clear the interrupt status. + */ + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_ERR_INT_EN), + &flush_intr, sizeof(UI32_T)); + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_ERR_INT_MASK_SET), + &clear_intr, sizeof(UI32_T)); + + osal_mdc_writePciReg(unit, + HAL_TAU_PKT_GET_MMIO(HAL_TAU_PKT_PDMA_ERR_INT_CLR), + &clear_intr, sizeof(UI32_T)); + + for (channel = 0; channel < HAL_TAU_PKT_TX_CHANNEL_LAST; channel++) + { + _hal_tau_pkt_stopTxChannelReg(unit, channel); + _hal_tau_pkt_maskAllTxL2IsrReg(unit, channel); + _hal_tau_pkt_clearTxL2IsrStatusReg(unit, channel, clear_intr); + } + + for (channel = 0; channel < HAL_TAU_PKT_RX_CHANNEL_LAST; channel++) + { + _hal_tau_pkt_stopRxChannelReg(unit, channel); + _hal_tau_pkt_maskAllRxL2IsrReg(unit, channel); + _hal_tau_pkt_clearRxL2IsrStatusReg(unit, channel, clear_intr); + } + + rc = _hal_tau_pkt_initPktCb(unit); + if (NPS_E_OK == rc) + { + rc = _hal_tau_pkt_initPktTxCb(unit); + } + if (NPS_E_OK == rc) + { + rc = _hal_tau_pkt_initPktRxCb(unit); + } + if (NPS_E_OK == rc) + { + rc = _hal_tau_pkt_initL1Isr(unit); + } + if (NPS_E_OK == rc) + { + rc = _hal_tau_pkt_initL2Isr(unit); + } + + /* Set the flag to record init state */ + ptr_cb->init_flag |= HAL_TAU_PKT_INIT_DRV; + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, + "u=%u, pkt drv init done, init flag=0x%x\n", unit, ptr_cb->init_flag); + + return (rc); +} + +/* ----------------------------------------------------------------------------------- Init: I/O */ +NPS_ERROR_NO_T +hal_tau_pkt_getNetDev( + const UI32_T unit, + const UI32_T port, + struct net_device **pptr_net_dev) +{ + *pptr_net_dev = HAL_TAU_PKT_GET_PORT_NETDEV(port); + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +hal_tau_pkt_prepareGpd( + const UI32_T unit, + const NPS_ADDR_T phy_addr, + const UI32_T len, + const UI32_T port, + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_gpd) +{ + /* fill up tx_gpd */ + ptr_sw_gpd->tx_gpd.data_buf_addr_hi = NPS_ADDR_64_HI(phy_addr); + ptr_sw_gpd->tx_gpd.data_buf_addr_lo = NPS_ADDR_64_LOW(phy_addr); + ptr_sw_gpd->tx_gpd.data_buf_size = len; + ptr_sw_gpd->tx_gpd.chksum = 0x0; + ptr_sw_gpd->tx_gpd.ipc = 0; /* Raw mode, sent to plane 0 */ + ptr_sw_gpd->tx_gpd.prg = HAL_TAU_PKT_PRG_PROCESS_GPD; + ptr_sw_gpd->tx_gpd.hwo = HAL_TAU_PKT_HWO_HW_OWN; + ptr_sw_gpd->tx_gpd.ch = HAL_TAU_PKT_CH_LAST_GPD; + ptr_sw_gpd->tx_gpd.ioc = HAL_TAU_PKT_IOC_HAS_INTR; + ptr_sw_gpd->tx_gpd.pkt_len = len; + ptr_sw_gpd->tx_gpd.crcc = HAL_TAU_PKT_CRCC_SUM_BY_HW; + + /* fill up cpu header */ + ptr_sw_gpd->tx_gpd.itmh_eth.skip_ipp = 1; + ptr_sw_gpd->tx_gpd.itmh_eth.skip_epp = 1; + ptr_sw_gpd->tx_gpd.itmh_eth.color = 0; /* Green */ + ptr_sw_gpd->tx_gpd.itmh_eth.tc = 15; /* Max tc */ + ptr_sw_gpd->tx_gpd.itmh_eth.igr_phy_port = 0; + + ptr_sw_gpd->tx_gpd.pph_l2.mrk_pcp_val = 7; /* Max pcp */ + ptr_sw_gpd->tx_gpd.pph_l2.mrk_pcp_dei_en = 1; + + /* destination index + * 1. to local ETH port + * 2. to remote ETH port + * 3. to remote CPU + */ + ptr_sw_gpd->tx_gpd.itmh_eth.dst_idx = port; + + /* [Taurus] we should set all-1 for the following fields to skip some tm-logic */ + + /* TM header */ + ptr_sw_gpd->tx_gpd.itmh_eth.src_idx = 0x7fff; + ptr_sw_gpd->tx_gpd.itmh_eth.intf_fdid = 0x3fff; + ptr_sw_gpd->tx_gpd.itmh_eth.src_supp_tag = 0x1f; + ptr_sw_gpd->tx_gpd.itmh_eth.nvo3_mgid = 0x6fff; + ptr_sw_gpd->tx_gpd.itmh_eth.nvo3_src_supp_tag_w0 = 0x1; + ptr_sw_gpd->tx_gpd.itmh_eth.nvo3_src_supp_tag_w1 = 0xf; + + /* PP header */ + ptr_sw_gpd->tx_gpd.pph_l2.nvo3_encap_idx = HAL_TAU_INVALID_NVO3_ENCAP_IDX; + ptr_sw_gpd->tx_gpd.pph_l2.nvo3_adj_idx = HAL_TAU_INVALID_NVO3_ADJ_IDX; + + return (NPS_E_OK); +} + +/* ----------------------------------------------------------------------------------- Init: net_dev_ops */ +static int +_hal_tau_pkt_net_dev_init( + struct net_device *ptr_net_dev) +{ + return 0; +} + +static int +_hal_tau_pkt_net_dev_open( + struct net_device *ptr_net_dev) +{ + netif_start_queue(ptr_net_dev); + +#if defined(PERF_EN_TEST) + /* Tx (len, tx_channel, rx_channel, test_skb) */ + perf_test(64, 1, 0, FALSE); + perf_test(64, 2, 0, FALSE); + perf_test(64, 4, 0, FALSE); + + perf_test(1518, 1, 0, FALSE); + perf_test(1518, 2, 0, FALSE); + perf_test(1518, 4, 0, FALSE); + + perf_test(9216, 1, 0, FALSE); + perf_test(9216, 2, 0, FALSE); + perf_test(9216, 4, 0, FALSE); + + /* Rx (len, tx_channel, rx_channel, test_skb) */ + perf_test(64, 0, 1, FALSE); + perf_test(64, 0, 3, FALSE); + perf_test(64, 0, 4, FALSE); + + perf_test(1518, 0, 1, FALSE); + perf_test(1518, 0, 3, FALSE); + perf_test(1518, 0, 4, FALSE); + + perf_test(9216, 0, 1, FALSE); + perf_test(9216, 0, 3, FALSE); + perf_test(9216, 0, 4, FALSE); +#endif + + return 0; +} + +static int +_hal_tau_pkt_net_dev_stop( + struct net_device *ptr_net_dev) +{ + netif_stop_queue(ptr_net_dev); + return 0; +} + +static int +_hal_tau_pkt_net_dev_ioctl( + struct net_device *ptr_net_dev, + struct ifreq *ptr_ifreq, + int cmd) +{ + return 0; +} + +static netdev_tx_t +_hal_tau_pkt_net_dev_tx( + struct sk_buff *ptr_skb, + struct net_device *ptr_net_dev) +{ + struct net_device_priv *ptr_priv = netdev_priv(ptr_net_dev); + /* chip meta */ + unsigned int unit; + unsigned int channel = 0; + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_gpd = NULL; + void *ptr_virt_addr = NULL; + NPS_ADDR_T phy_addr = 0x0; + + if (NULL == ptr_priv) + { + /* in case that the netdev has been freed/reset somewhere */ + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_ERR, "get netdev_priv failed\n"); + return -EFAULT; + } + + /* check skb */ + if (NULL == ptr_skb) + { + ptr_priv->stats.tx_errors++; + return -EFAULT; + } + + unit = ptr_priv->unit; + + /* pad to 60-bytes if skb_len < 60, see: eth_skb_pad(skb) */ + if (ptr_skb->len < ETH_ZLEN) + { + skb_pad(ptr_skb, ETH_ZLEN - ptr_skb->len); + skb_set_tail_pointer(ptr_skb, ETH_ZLEN); + ptr_skb->len = ETH_ZLEN; + } + + /* pad 4-bytes for chip-crc */ + skb_pad(ptr_skb, ETH_FCS_LEN); + skb_set_tail_pointer(ptr_skb, ETH_FCS_LEN); + ptr_skb->len += ETH_FCS_LEN; + + /* alloc gpd */ + ptr_sw_gpd = osal_alloc(sizeof(HAL_TAU_PKT_TX_SW_GPD_T)); + if (NULL == ptr_sw_gpd) + { + ptr_priv->stats.tx_errors++; + osal_skb_free(ptr_skb); + } + else + { + /* map skb to dma */ + ptr_virt_addr = ptr_skb->data; + phy_addr = osal_skb_mapDma(ptr_skb, DMA_TO_DEVICE); + if (0x0 == phy_addr) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_ERR, "u=%u, txch=%u, skb dma map err\n", + unit, channel); + ptr_priv->stats.tx_errors++; + osal_skb_free(ptr_skb); + osal_free(ptr_sw_gpd); + } + else + { + /* trans skb to gpd */ + memset(ptr_sw_gpd, 0x0, sizeof(HAL_TAU_PKT_TX_SW_GPD_T)); + ptr_sw_gpd->callback = (void *)_hal_tau_pkt_net_dev_tx_callback; + ptr_sw_gpd->ptr_cookie = (void *)ptr_skb; + ptr_sw_gpd->gpd_num = 1; + ptr_sw_gpd->ptr_next = NULL; + ptr_sw_gpd->channel = channel; + + /* prepare gpd */ + hal_tau_pkt_prepareGpd(unit, phy_addr, ptr_skb->len, ptr_priv->port, ptr_sw_gpd); + +#if LINUX_VERSION_CODE <= KERNEL_VERSION(4,6,7) + ptr_net_dev->trans_start = jiffies; +#else + netdev_get_tx_queue(ptr_net_dev, 0)->trans_start = jiffies; +#endif + /* send gpd */ + if (NPS_E_OK == hal_tau_pkt_sendGpd(unit, channel, ptr_sw_gpd)) + { + ptr_priv->stats.tx_packets++; + ptr_priv->stats.tx_bytes += ptr_skb->len; + } + else + { + ptr_priv->stats.tx_fifo_errors++; /* to record the extreme cases where packets are dropped */ + ptr_priv->stats.tx_dropped++; + + osal_skb_unmapDma(phy_addr, ptr_skb->len, DMA_TO_DEVICE); + osal_skb_free(ptr_skb); + osal_free(ptr_sw_gpd); + + return NETDEV_TX_OK; + } + } + } + + return NETDEV_TX_OK; +} + +static void +_hal_tau_pkt_net_dev_tx_timeout( + struct net_device *ptr_net_dev) +{ + netif_stop_queue(ptr_net_dev); + osal_sleepThread(1000); + netif_wake_queue(ptr_net_dev); +} + +static struct net_device_stats * +_hal_tau_pkt_net_dev_get_stats( + struct net_device *ptr_net_dev) +{ + struct net_device_priv *ptr_priv = netdev_priv(ptr_net_dev); + + return (&ptr_priv->stats); +} + +static int +_hal_tau_pkt_net_dev_set_mtu( + struct net_device *ptr_net_dev, + int new_mtu) +{ + if (new_mtu < 64 || new_mtu > 9216) + { + return -EINVAL; + } + ptr_net_dev->mtu = new_mtu; /* This mtu need to be synced to chip's */ + return 0; +} + +static int +_hal_tau_pkt_net_dev_set_mac( + struct net_device *ptr_net_dev, + void *ptr_mac_addr) +{ + struct sockaddr *ptr_addr = ptr_mac_addr; + + memcpy(ptr_net_dev->dev_addr, ptr_addr->sa_data, ptr_net_dev->addr_len); + return 0; +} + +static void +_hal_tau_pkt_net_dev_set_rx_mode( + struct net_device *ptr_dev) +{ + if (ptr_dev->flags & IFF_PROMISC) + { + } + else + { + if (ptr_dev->flags & IFF_ALLMULTI) + { + } + else + { + if (netdev_mc_empty(ptr_dev)) + { + return; + } + } + } +} + +static struct net_device_ops _hal_tau_pkt_net_dev_ops = +{ + .ndo_init = _hal_tau_pkt_net_dev_init, + .ndo_open = _hal_tau_pkt_net_dev_open, + .ndo_stop = _hal_tau_pkt_net_dev_stop, + .ndo_do_ioctl = _hal_tau_pkt_net_dev_ioctl, + .ndo_start_xmit = _hal_tau_pkt_net_dev_tx, + .ndo_tx_timeout = _hal_tau_pkt_net_dev_tx_timeout, + .ndo_get_stats = _hal_tau_pkt_net_dev_get_stats, + .ndo_change_mtu = _hal_tau_pkt_net_dev_set_mtu, + .ndo_set_mac_address = _hal_tau_pkt_net_dev_set_mac, + .ndo_set_rx_mode = _hal_tau_pkt_net_dev_set_rx_mode, +}; + +static int +_hal_tau_pkt_net_dev_ethtool_get( + struct net_device *ptr_dev, + struct ethtool_cmd *ptr_cmd) +{ + struct net_device_priv *ptr_priv; + + ptr_cmd->supported = SUPPORTED_1000baseT_Full | SUPPORTED_FIBRE; + ptr_cmd->port = PORT_FIBRE; + ptr_cmd->duplex = DUPLEX_FULL; + + ptr_priv = netdev_priv(ptr_dev); + ethtool_cmd_speed_set(ptr_cmd, ptr_priv->speed); + + return 0; +} + +static struct ethtool_ops _hal_tau_pkt_net_dev_ethtool_ops = +{ + .get_settings = _hal_tau_pkt_net_dev_ethtool_get, + .get_link = ethtool_op_get_link, +}; + +static void +_hal_tau_pkt_setup( + struct net_device *ptr_net_dev) +{ + struct net_device_priv *ptr_priv = netdev_priv(ptr_net_dev); + + /* setup net device */ + ether_setup(ptr_net_dev); + ptr_net_dev->netdev_ops = &_hal_tau_pkt_net_dev_ops; + ptr_net_dev->ethtool_ops = &_hal_tau_pkt_net_dev_ethtool_ops; + ptr_net_dev->watchdog_timeo = HAL_TAU_PKT_TX_TIMEOUT; + ptr_net_dev->mtu = HAL_TAU_PKT_MAX_ETH_FRAME_SIZE; /* This mtu need to be synced to chip's */ + random_ether_addr(ptr_net_dev->dev_addr); /* Please use the mac-addr of interface. */ + + /* setup private data */ + ptr_priv->ptr_net_dev = ptr_net_dev; + memset(&ptr_priv->stats, 0, sizeof(struct net_device_stats)); +} + +static void +_hal_tau_pkt_lockRxChannelAll( + const UI32_T unit) +{ + UI32_T rch; + HAL_TAU_PKT_RX_PDMA_T *ptr_rx_pdma; + + for (rch = 0; rch < HAL_TAU_PKT_RX_CHANNEL_LAST; rch++) + { + ptr_rx_pdma = HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, rch); + osal_takeSemaphore(&ptr_rx_pdma->sema, NPS_SEMAPHORE_WAIT_FOREVER); + } +} + +static void +_hal_tau_pkt_unlockRxChannelAll( + const UI32_T unit) +{ + UI32_T rch; + HAL_TAU_PKT_RX_PDMA_T *ptr_rx_pdma; + + for (rch = 0; rch < HAL_TAU_PKT_RX_CHANNEL_LAST; rch++) + { + ptr_rx_pdma = HAL_TAU_PKT_GET_RX_PDMA_PTR(unit, rch); + osal_giveSemaphore(&ptr_rx_pdma->sema); + } +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_createIntf( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *ptr_cookie) +{ + HAL_TAU_PKT_NETIF_INTF_T net_intf = {0}; + HAL_TAU_PKT_NETIF_PORT_DB_T *ptr_port_db; + struct net_device *ptr_net_dev = NULL; + struct net_device_priv *ptr_priv = NULL; + NPS_ERROR_NO_T rc = NPS_E_OK; + + /* Lock all Rx tasks to avoid any access to the intf during packet processing */ + /* Only Rx tasks are locked since Tx action is performed under a spinlock protection */ + _hal_tau_pkt_lockRxChannelAll(unit); + + osal_io_copyFromUser(&net_intf, &ptr_cookie->net_intf, sizeof(HAL_TAU_PKT_NETIF_INTF_T)); + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_INTF, "u=%u, create intf name=%s, phy port=%d\n", + unit, net_intf.name, net_intf.port); + + /* To check if the interface with the same name exists in kernel */ + ptr_net_dev = dev_get_by_name(&init_net, net_intf.name); + if (NULL != ptr_net_dev) + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_ERR | HAL_TAU_PKT_DBG_INTF), + "u=%u, create intf failed, exist same name=%s\n", + unit, net_intf.name); + + dev_put(ptr_net_dev); + +#if defined(HAL_TAU_PKT_FORCR_REMOVE_DUPLICATE_NETDEV) + ptr_net_dev->operstate = IF_OPER_DOWN; + netif_carrier_off(ptr_net_dev); + netif_stop_queue(ptr_net_dev); + unregister_netdev(ptr_net_dev); + free_netdev(ptr_net_dev); +#endif + _hal_tau_pkt_unlockRxChannelAll(unit); + return (NPS_E_ENTRY_EXISTS); + } + + /* Bind the net dev and intf meta data to internel port-based array */ + ptr_port_db = HAL_TAU_PKT_GET_PORT_DB(net_intf.port); + if (ptr_port_db->ptr_net_dev == NULL) + { + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 17, 0) + ptr_net_dev = alloc_netdev(sizeof(struct net_device_priv), + net_intf.name, NET_NAME_UNKNOWN, _hal_tau_pkt_setup); +#else + ptr_net_dev = alloc_netdev(sizeof(struct net_device_priv), + net_intf.name, _hal_tau_pkt_setup); +#endif + memcpy(ptr_net_dev->dev_addr, net_intf.mac, ptr_net_dev->addr_len); + + ptr_priv = netdev_priv(ptr_net_dev); + + /* Port info will be used when packet sent from this netdev */ + ptr_priv->port = net_intf.port; + ptr_priv->id = net_intf.port; + ptr_priv->unit = unit; + + register_netdev(ptr_net_dev); + + net_intf.id = net_intf.port; /* Currently, id is 1-to-1 mapped to port */ + osal_memcpy(&ptr_port_db->meta, &net_intf, sizeof(HAL_TAU_PKT_NETIF_INTF_T)); + + ptr_port_db->ptr_net_dev = ptr_net_dev; + + /* Copy the intf-id to user space */ + osal_io_copyToUser(&ptr_cookie->net_intf, &net_intf, sizeof(HAL_TAU_PKT_NETIF_INTF_T)); + } + else + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_INTF | HAL_TAU_PKT_DBG_ERR), + "u=%u, create intf failed, exist on phy port=%d\n", + unit, net_intf.port); + /* The user needs to delete the existing intf binding to the same port */ + rc = NPS_E_ENTRY_EXISTS; + } + + osal_io_copyToUser(&ptr_cookie->rc, &rc, sizeof(NPS_ERROR_NO_T)); + + _hal_tau_pkt_unlockRxChannelAll(unit); + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_destroyIntf( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *ptr_cookie) +{ + HAL_TAU_PKT_NETIF_INTF_T net_intf = {0}; + HAL_TAU_PKT_NETIF_PORT_DB_T *ptr_port_db; + UI32_T port = 0; + NPS_ERROR_NO_T rc = NPS_E_ENTRY_NOT_FOUND; + + /* Lock all Rx tasks to avoid any access to the intf during packet processing */ + /* Only Rx tasks are locked since Tx action is performed under a spinlock protection */ + _hal_tau_pkt_lockRxChannelAll(unit); + + osal_io_copyFromUser(&net_intf, &ptr_cookie->net_intf, sizeof(HAL_TAU_PKT_NETIF_INTF_T)); + + /* Unregister net devices by id, although the "id" is now relavent to "port" we still perform a search */ + for (port = 0; port < HAL_TAU_PKT_MAX_PORT_NUM; port++) + { + ptr_port_db = HAL_TAU_PKT_GET_PORT_DB(port); + if (NULL != ptr_port_db->ptr_net_dev) /* valid intf */ + { + if (ptr_port_db->meta.id == net_intf.id) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_INTF, + "u=%u, find intf %s (id=%d) on phy port=%d, destroy done\n", + unit, + ptr_port_db->meta.name, + ptr_port_db->meta.port); + + netif_carrier_off(ptr_port_db->ptr_net_dev); + netif_stop_queue(ptr_port_db->ptr_net_dev); + unregister_netdev(ptr_port_db->ptr_net_dev); + free_netdev(ptr_port_db->ptr_net_dev); + + /* Don't need to remove profiles on this port. + * In fact, the profile is binding to "port" not "intf". + */ + /* _hal_tau_pkt_destroyProfList(ptr_port_db->ptr_profile_list); */ + + osal_memset(ptr_port_db, 0x0, sizeof(HAL_TAU_PKT_NETIF_PORT_DB_T)); + rc = NPS_E_OK; + break; + } + } + } + + osal_io_copyToUser(&ptr_cookie->rc, &rc, sizeof(NPS_ERROR_NO_T)); + + _hal_tau_pkt_unlockRxChannelAll(unit); + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_traverseProfList( + UI32_T intf_id, + HAL_TAU_PKT_PROFILE_NODE_T *ptr_prof_list) +{ + HAL_TAU_PKT_PROFILE_NODE_T *ptr_curr_node; + + ptr_curr_node = ptr_prof_list; + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_INTF, "intf id=%d, prof list=\n", intf_id); + while(NULL != ptr_curr_node) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_INTF, "%s (%d) => ", + ptr_curr_node->ptr_profile->name, + ptr_curr_node->ptr_profile->priority); + ptr_curr_node = ptr_curr_node->ptr_next_node; + } + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_INTF, "null\n"); + return (NPS_E_OK); +} + + +static NPS_ERROR_NO_T +_hal_tau_pkt_getIntf( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *ptr_cookie) +{ + HAL_TAU_PKT_NETIF_INTF_T net_intf = {0}; + HAL_TAU_PKT_NETIF_PORT_DB_T *ptr_port_db; + UI32_T port = 0; + NPS_ERROR_NO_T rc = NPS_E_ENTRY_NOT_FOUND; + + osal_io_copyFromUser(&net_intf, &ptr_cookie->net_intf, sizeof(HAL_TAU_PKT_NETIF_INTF_T)); + + for (port = 0; port < HAL_TAU_PKT_MAX_PORT_NUM; port++) + { + ptr_port_db = HAL_TAU_PKT_GET_PORT_DB(port); + if (NULL != ptr_port_db->ptr_net_dev) /* valid intf */ + { + if (ptr_port_db->meta.id == net_intf.id) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_INTF, "u=%u, find intf id=%d\n", unit, net_intf.id); + _hal_tau_pkt_traverseProfList(net_intf.id, ptr_port_db->ptr_profile_list); + osal_io_copyToUser(&ptr_cookie->net_intf, &ptr_port_db->meta, sizeof(HAL_TAU_PKT_NETIF_INTF_T)); + rc = NPS_E_OK; + break; + } + } + } + + osal_io_copyToUser(&ptr_cookie->rc, &rc, sizeof(NPS_ERROR_NO_T)); + + return (NPS_E_OK); +} + +static HAL_TAU_PKT_NETIF_PROFILE_T * +_hal_tau_pkt_getProfEntry( + const UI32_T id) +{ + HAL_TAU_PKT_NETIF_PROFILE_T *ptr_profile = NULL; + + if (id < HAL_TAU_PKT_NET_PROFILE_NUM_MAX) + { + if (NULL != _ptr_hal_tau_pkt_profile_entry[id]) + { + ptr_profile = _ptr_hal_tau_pkt_profile_entry[id]; + } + } + + return (ptr_profile); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_createProfile( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *ptr_cookie) +{ + HAL_TAU_PKT_NETIF_PROFILE_T *ptr_profile; + HAL_TAU_PKT_NETIF_PORT_DB_T *ptr_port_db; + NPS_ERROR_NO_T rc; + + /* Lock all Rx tasks to avoid profiles being refered during packet processing */ + /* Need to lock all Rx tasks since packets from all Rx channels do profile lookup */ + _hal_tau_pkt_lockRxChannelAll(unit); + + ptr_profile = osal_alloc(sizeof(HAL_TAU_PKT_NETIF_PROFILE_T)); + osal_io_copyFromUser(ptr_profile, &ptr_cookie->net_profile, + sizeof(HAL_TAU_PKT_NETIF_PROFILE_T)); + + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "u=%u, create prof name=%s, priority=%d, flag=0x%x\n", + unit, + ptr_profile->name, + ptr_profile->priority, + ptr_profile->flags); + + /* Save the profile to the profile array and assign the index to ptr_profile->id */ + rc = _hal_tau_pkt_allocProfEntry(ptr_profile); + if (NPS_E_OK == rc) + { + /* Insert the profile to the corresponding (port) interface */ + if ((ptr_profile->flags & HAL_TAU_PKT_NETIF_PROFILE_FLAGS_PORT) != 0) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "u=%u, bind prof to phy port=%d\n", unit, ptr_profile->port); + ptr_port_db = HAL_TAU_PKT_GET_PORT_DB(ptr_profile->port); + _hal_tau_pkt_addProfToList(ptr_profile, &ptr_port_db->ptr_profile_list); + } + else + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "u=%u, bind prof to all intf\n", unit); + _hal_tau_pkt_addProfToAllIntf(ptr_profile); + } + + /* Copy the ptr_profile->id to user space */ + osal_io_copyToUser(&ptr_cookie->net_profile, ptr_profile, sizeof(HAL_TAU_PKT_NETIF_PROFILE_T)); + } + else + { + HAL_TAU_PKT_DBG((HAL_TAU_PKT_DBG_PROFILE | HAL_TAU_PKT_DBG_ERR), + "u=%u, alloc prof entry failed, tbl full\n", unit); + osal_free(ptr_profile); + } + + osal_io_copyToUser(&ptr_cookie->rc, &rc, sizeof(NPS_ERROR_NO_T)); + + _hal_tau_pkt_unlockRxChannelAll(unit); + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_destroyProfile( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *ptr_cookie) +{ + HAL_TAU_PKT_NETIF_PROFILE_T profile = {0}; + HAL_TAU_PKT_NETIF_PROFILE_T *ptr_profile; + NPS_ERROR_NO_T rc = NPS_E_OK; + + /* Lock all Rx tasks to avoid profiles being refered during packet processing */ + /* Need to lock all Rx tasks since packets from all Rx channels do profile lookup */ + _hal_tau_pkt_lockRxChannelAll(unit); + + osal_io_copyFromUser(&profile, &ptr_cookie->net_profile, + sizeof(HAL_TAU_PKT_NETIF_PROFILE_T)); + + /* Remove the profile from corresponding interface (port) */ + _hal_tau_pkt_delProfFromAllIntfById(profile.id); + + ptr_profile = _hal_tau_pkt_freeProfEntry(profile.id); + if (NULL != ptr_profile) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_PROFILE, + "u=%u, destroy prof id=%d, name=%s, priority=%d, flag=0x%x\n", + unit, + ptr_profile->id, + ptr_profile->name, + ptr_profile->priority, + ptr_profile->flags); + osal_free(ptr_profile); + } + + osal_io_copyToUser(&ptr_cookie->rc, &rc, sizeof(NPS_ERROR_NO_T)); + + _hal_tau_pkt_unlockRxChannelAll(unit); + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_getProfile( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *ptr_cookie) +{ + HAL_TAU_PKT_NETIF_PROFILE_T profile = {0}; + HAL_TAU_PKT_NETIF_PROFILE_T *ptr_profile; + NPS_ERROR_NO_T rc = NPS_E_OK; + + osal_io_copyFromUser(&profile, &ptr_cookie->net_profile, sizeof(HAL_TAU_PKT_NETIF_PROFILE_T)); + + ptr_profile = _hal_tau_pkt_getProfEntry(profile.id); + if (NULL != ptr_profile) + { + osal_io_copyToUser(&ptr_cookie->net_profile, ptr_profile, sizeof(HAL_TAU_PKT_NETIF_PROFILE_T)); + } + else + { + rc = NPS_E_ENTRY_NOT_FOUND; + } + + osal_io_copyToUser(&ptr_cookie->rc, &rc, sizeof(NPS_ERROR_NO_T)); + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_getIntfCnt( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *ptr_cookie) +{ + HAL_TAU_PKT_NETIF_INTF_T net_intf = {0}; + HAL_TAU_PKT_NETIF_INTF_CNT_T intf_cnt = {0}; + HAL_TAU_PKT_NETIF_PORT_DB_T *ptr_port_db; + struct net_device_priv *ptr_priv; + UI32_T port = 0; + NPS_ERROR_NO_T rc = NPS_E_ENTRY_NOT_FOUND; + + osal_io_copyFromUser(&net_intf, &ptr_cookie->net_intf, sizeof(HAL_TAU_PKT_NETIF_INTF_T)); + + for (port = 0; port < HAL_TAU_PKT_MAX_PORT_NUM; port++) + { + ptr_port_db = HAL_TAU_PKT_GET_PORT_DB(port); + if (NULL != ptr_port_db->ptr_net_dev) /* valid intf */ + { + if (ptr_port_db->meta.id == net_intf.id) + { + ptr_priv = netdev_priv(ptr_port_db->ptr_net_dev); + intf_cnt.rx_pkt = ptr_priv->stats.rx_packets; + intf_cnt.tx_pkt = ptr_priv->stats.tx_packets; + intf_cnt.tx_error = ptr_priv->stats.tx_errors; + intf_cnt.tx_queue_full = ptr_priv->stats.tx_fifo_errors; + + rc = NPS_E_OK; + break; + } + } + } + + osal_io_copyToUser(&ptr_cookie->cnt, &intf_cnt, sizeof(HAL_TAU_PKT_NETIF_INTF_CNT_T)); + osal_io_copyToUser(&ptr_cookie->rc, &rc, sizeof(NPS_ERROR_NO_T)); + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_hal_tau_pkt_clearIntfCnt( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *ptr_cookie) +{ + HAL_TAU_PKT_NETIF_INTF_T net_intf = {0}; + HAL_TAU_PKT_NETIF_PORT_DB_T *ptr_port_db; + struct net_device_priv *ptr_priv; + UI32_T port = 0; + NPS_ERROR_NO_T rc = NPS_E_ENTRY_NOT_FOUND; + + osal_io_copyFromUser(&net_intf, &ptr_cookie->net_intf, sizeof(HAL_TAU_PKT_NETIF_INTF_T)); + + for (port = 0; port < HAL_TAU_PKT_MAX_PORT_NUM; port++) + { + ptr_port_db = HAL_TAU_PKT_GET_PORT_DB(port); + if (NULL != ptr_port_db->ptr_net_dev) /* valid intf */ + { + if (ptr_port_db->meta.id == net_intf.id) + { + ptr_priv = netdev_priv(ptr_port_db->ptr_net_dev); + ptr_priv->stats.rx_packets = 0; + ptr_priv->stats.tx_packets = 0; + ptr_priv->stats.tx_errors = 0; + ptr_priv->stats.tx_fifo_errors = 0; + + rc = NPS_E_OK; + break; + } + } + } + + osal_io_copyToUser(&ptr_cookie->rc, &rc, sizeof(NPS_ERROR_NO_T)); + + return (NPS_E_OK); +} + +/* ----------------------------------------------------------------------------------- Init: dev_ops */ +static int +_hal_tau_pkt_dev_open( + struct inode *inode, + struct file *file) +{ + return (0); +} + +static int +_hal_tau_pkt_dev_close( + struct inode *inode, + struct file *file) +{ + return (0); +} + +static void +_hal_tau_pkt_dev_tx_callback( + const UI32_T unit, + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_gpd, + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_gpd_usr) +{ + UI32_T channel = ptr_sw_gpd->channel; + HAL_TAU_PKT_TX_CB_T *ptr_tx_cb = HAL_TAU_PKT_GET_TX_CB_PTR(unit); + + while (0 != _hal_tau_pkt_enQueue(&ptr_tx_cb->sw_queue, ptr_sw_gpd)) + { + ptr_tx_cb->cnt.channel[channel].enque_retry++; + HAL_TAU_PKT_TX_ENQUE_RETRY_SLEEP(); + } + ptr_tx_cb->cnt.channel[channel].enque_ok++; + + osal_triggerEvent(&ptr_tx_cb->sync_sema); + ptr_tx_cb->cnt.channel[channel].trig_event++; +} + +static ssize_t +_hal_tau_pkt_dev_tx( + struct file *file, + const char __user *buf, + size_t count, + loff_t *pos) +{ + int ret = 0; + int idx = 0; + unsigned int unit = 0; + unsigned int channel = 0; + HAL_TAU_PKT_IOCTL_TX_COOKIE_T tx_cookie; + HAL_TAU_PKT_IOCTL_TX_GPD_T ioctl_gpd; + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_gpd_knl = NULL; + HAL_TAU_PKT_TX_SW_GPD_T *ptr_first_sw_gpd_knl = NULL; + + /* copy the tx-cookie */ + osal_io_copyFromUser(&tx_cookie, (void *)buf, sizeof(HAL_TAU_PKT_IOCTL_TX_COOKIE_T)); + + unit = tx_cookie.unit; + channel = tx_cookie.channel; + + ptr_sw_gpd_knl = osal_alloc(sizeof(HAL_TAU_PKT_TX_SW_GPD_T)); + ptr_first_sw_gpd_knl = ptr_sw_gpd_knl; + + /* create SW GPD based on the content of each IOCTL GPD */ + while (1) + { + osal_io_copyFromUser(&ioctl_gpd, + ((void *)((NPS_HUGE_T)tx_cookie.ioctl_gpd_addr)) + +idx*sizeof(HAL_TAU_PKT_IOCTL_TX_GPD_T), + sizeof(HAL_TAU_PKT_IOCTL_TX_GPD_T)); + + ptr_sw_gpd_knl->channel = ioctl_gpd.channel; + ptr_sw_gpd_knl->gpd_num = ioctl_gpd.gpd_num; + ptr_sw_gpd_knl->ptr_cookie = (void *)ioctl_gpd.cookie; + + /* directly copy user's HW GPD */ + osal_io_copyFromUser(&ptr_sw_gpd_knl->tx_gpd, + (void *)((NPS_HUGE_T)ioctl_gpd.hw_gpd_addr), + sizeof(HAL_TAU_PKT_TX_GPD_T)); + + /* replace the callback */ + ptr_sw_gpd_knl->callback = (void *)_hal_tau_pkt_dev_tx_callback; + + /* save the first SW GPD address from userspace since + * we have replaced the original callback + */ + ptr_sw_gpd_knl->ptr_cookie = (void *)ioctl_gpd.sw_gpd_addr; + + if (HAL_TAU_PKT_CH_LAST_GPD == ptr_sw_gpd_knl->tx_gpd.ch) + { + ptr_sw_gpd_knl->ptr_next = NULL; + break; + } + else + { + ptr_sw_gpd_knl->ptr_next = (HAL_TAU_PKT_TX_SW_GPD_T *)osal_alloc( + sizeof(HAL_TAU_PKT_TX_SW_GPD_T)); + ptr_sw_gpd_knl = ptr_sw_gpd_knl->ptr_next; + idx++; + } + } + + ret = hal_tau_pkt_sendGpd(unit, channel, ptr_first_sw_gpd_knl); + if (NPS_E_OK != ret) + { + _hal_tau_pkt_freeTxGpdList(unit, ptr_first_sw_gpd_knl); + } + + /* return 0 if success */ + return (ret); +} + +static ssize_t +_hal_tau_pkt_dev_rx( + struct file *file, + char __user *buf, + size_t count, + loff_t *pos) +{ + return (0); +} + +static long +_hal_tau_pkt_dev_ioctl( + struct file *filp, + unsigned int cmd, + unsigned long arg) +{ + int ret = 0; + + /* cmd */ + HAL_TAU_PKT_IOCTL_CMD_T *ptr_cmd = (HAL_TAU_PKT_IOCTL_CMD_T *)&cmd; + unsigned int unit = ptr_cmd->field.unit; + HAL_TAU_PKT_IOCTL_TYPE_T type = ptr_cmd->field.type; + + switch (type) + { + HAL_TAU_PKT_DBG(HAL_TAU_PKT_DBG_COMMON, "u=%u, ioctl type=%u, cmd=%u\n", + unit, type, cmd); + + /* network interface */ + case HAL_TAU_PKT_IOCTL_TYPE_CREATE_INTF: + ret = _hal_tau_pkt_createIntf(unit, (HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_DESTROY_INTF: + ret = _hal_tau_pkt_destroyIntf(unit, (HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_GET_INTF: + ret = _hal_tau_pkt_getIntf(unit, (HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_CREATE_PROFILE: + ret = _hal_tau_pkt_createProfile(unit, (HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_DESTROY_PROFILE: + ret = _hal_tau_pkt_destroyProfile(unit, (HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_GET_PROFILE: + ret = _hal_tau_pkt_getProfile(unit, (HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_GET_INTF_CNT: + ret = _hal_tau_pkt_getIntfCnt(unit, (HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_CLEAR_INTF_CNT: + ret = _hal_tau_pkt_clearIntfCnt(unit, (HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T *)arg); + break; + + /* driver */ + case HAL_TAU_PKT_IOCTL_TYPE_WAIT_RX_FREE: + ret = _hal_tau_pkt_schedRxDeQueue(unit, (HAL_TAU_PKT_IOCTL_RX_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_WAIT_TX_FREE: + ret = _hal_tau_pkt_strictTxDeQueue(unit, (HAL_TAU_PKT_IOCTL_TX_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_SET_RX_CFG: + ret = hal_tau_pkt_setRxKnlConfig(unit, (HAL_TAU_PKT_IOCTL_RX_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_GET_RX_CFG: + ret = hal_tau_pkt_getRxKnlConfig(unit, (HAL_TAU_PKT_IOCTL_RX_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_DEINIT_TASK: + ret = hal_tau_pkt_deinitTask(unit); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_DEINIT_DRV: + ret = hal_tau_pkt_deinitPktDrv(unit); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_INIT_TASK: + ret = hal_tau_pkt_initTask(unit); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_INIT_DRV: + ret = hal_tau_pkt_initPktDrv(unit); + break; + + /* counter */ + case HAL_TAU_PKT_IOCTL_TYPE_GET_TX_CNT: + ret = hal_tau_pkt_getTxKnlCnt(unit, (HAL_TAU_PKT_IOCTL_CH_CNT_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_GET_RX_CNT: + ret = hal_tau_pkt_getRxKnlCnt(unit, (HAL_TAU_PKT_IOCTL_CH_CNT_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_CLEAR_TX_CNT: + ret = hal_tau_pkt_clearTxKnlCnt(unit, (HAL_TAU_PKT_IOCTL_TX_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_CLEAR_RX_CNT: + ret = hal_tau_pkt_clearRxKnlCnt(unit, (HAL_TAU_PKT_IOCTL_RX_COOKIE_T *)arg); + break; + + case HAL_TAU_PKT_IOCTL_TYPE_SET_PORT_ATTR: + ret = hal_tau_pkt_setPortAttr(unit, (HAL_TAU_PKT_IOCTL_PORT_COOKIE_T *)arg); + break; + + default: + ret = -1; + break; + } + + return (ret); +} + +#ifdef CONFIG_COMPAT +static long +_hal_tau_pkt_dev_compat_ioctl( + struct file *filp, + unsigned int cmd, + unsigned long arg) +{ + return _hal_tau_pkt_dev_ioctl(filp, cmd, (unsigned long)compat_ptr(arg)); +} +#endif + +static struct file_operations _hal_tau_pkt_dev_ops = +{ + .owner = THIS_MODULE, + .open = _hal_tau_pkt_dev_open, + .release = _hal_tau_pkt_dev_close, + .write = _hal_tau_pkt_dev_tx, + .read = _hal_tau_pkt_dev_rx, + .unlocked_ioctl = _hal_tau_pkt_dev_ioctl, +#ifdef CONFIG_COMPAT + .compat_ioctl = _hal_tau_pkt_dev_compat_ioctl, +#endif +}; + +static struct miscdevice _hal_tau_pkt_dev = +{ + .minor = HAL_TAU_PKT_DRIVER_MINOR_NUM, + .name = HAL_TAU_PKT_DRIVER_NAME, + .fops = &_hal_tau_pkt_dev_ops, +}; + +/* ----------------------------------------------------------------------------------- Init/Deinit */ +static int __init +_hal_tau_pkt_init(void) +{ + /* Register device */ + misc_register(&_hal_tau_pkt_dev); + + /* Init Thread */ + osal_init(); + + /* Reset all database*/ + osal_memset(_hal_tau_pkt_port_db, 0x0, + (HAL_TAU_PKT_MAX_PORT_NUM * sizeof(HAL_TAU_PKT_NETIF_PORT_DB_T))); + osal_memset(_hal_tau_pkt_rx_cb, 0x0, + NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM*sizeof(HAL_TAU_PKT_RX_CB_T)); + osal_memset(_hal_tau_pkt_tx_cb, 0x0, + NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM*sizeof(HAL_TAU_PKT_TX_CB_T)); + osal_memset(_hal_tau_pkt_drv_cb, 0x0, + NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM*sizeof(HAL_TAU_PKT_DRV_CB_T)); + + return (0); +} + +static void __exit +_hal_tau_pkt_exit(void) +{ + UI32_T unit = 0; + + /* 1st. Stop Rx HW DMA and free all the DMA buffer hooked on the ring */ + _hal_tau_pkt_rxStop(unit); + + /* 2nd. Need to wait Rx done task process all the availavle packets on GPD ring */ +#define HAL_TAU_PKT_MODULE_EXIT_HOLD_TIME_US (1000000) + osal_sleepThread(HAL_TAU_PKT_MODULE_EXIT_HOLD_TIME_US); + + /* 3rd. Stop all netdev (if any) to prevent kernel from Tx new packets */ + _hal_tau_pkt_stopAllIntf(unit); + + /* 4th. Stop all the internal tasks (if any) */ + hal_tau_pkt_deinitTask(unit); + + /* 5th. Deinit pkt driver for common database/interrupt source (if required) */ + hal_tau_pkt_deinitPktDrv(unit); + + /* 6th. Clean up those intf/profiles not been destroyed */ + _hal_tau_pkt_destroyAllProfile(unit); + _hal_tau_pkt_destroyAllIntf(unit); + + osal_deinit(); + + /* Unregister device */ + misc_deregister(&_hal_tau_pkt_dev); +} + +module_init(_hal_tau_pkt_init); +module_exit(_hal_tau_pkt_exit); + +module_param(dbg_flag, uint, S_IRUGO); +MODULE_PARM_DESC(dbg_flag, "bit0:Error, bit1:Tx, bit2:Rx, bit3:Intf, bit4:Profile"); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Nephos"); +MODULE_DESCRIPTION("NETIF Kernel Module"); diff --git a/platform/nephos/nephos-modules/modules/src/inc/aml.h b/platform/nephos/nephos-modules/modules/src/inc/aml.h new file mode 100755 index 00000000000..658aa6e56f4 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/inc/aml.h @@ -0,0 +1,366 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: aml.h + * PURPOSE: + * 1. Provide whole AML resource initialization API. + * 2. Provide configuration access APIs. + * 3. Provide ISR registration and deregistration APIs. + * 4. Provide memory access. + * 5. Provide DMA management APIs. + * 6. Provide address translation APIs. + * NOTES: + */ + +#ifndef AML_H +#define AML_H + + +/* INCLUDE FILE DECLARATIONS + */ +#include +#include +#include + + +/* NAMING CONSTANT DECLARATIONS + */ + +/* #define AML_EN_I2C */ +/* #define AML_EN_CUSTOM_DMA_ADDR */ + +/* MACRO FUNCTION DECLARATIONS + */ + +/* DATA TYPE DECLARATIONS + */ +typedef enum +{ + AML_DEV_TYPE_PCI, + AML_DEV_TYPE_I2C, + AML_DEV_TYPE_SPI, + AML_DEV_TYPE_LAST + +} AML_HW_IF_T; + +typedef NPS_ERROR_NO_T +(*AML_DEV_READ_FUNC_T)( + const UI32_T unit, + const UI32_T addr_offset, + UI32_T *ptr_data, + const UI32_T len); + +typedef NPS_ERROR_NO_T +(*AML_DEV_WRITE_FUNC_T)( + const UI32_T unit, + const UI32_T addr_offset, + const UI32_T *ptr_data, + const UI32_T len); + +typedef NPS_ERROR_NO_T +(*AML_DEV_ISR_FUNC_T)( + void *ptr_data); + +/* To mask the chip interrupt in kernel interrupt routine. */ +typedef struct +{ + UI32_T mask_addr; + UI32_T mask_val; + +} AML_DEV_ISR_DATA_T; + +/* To read or write the HW-intf registers. */ +typedef struct +{ + AML_DEV_READ_FUNC_T read_callback; + AML_DEV_WRITE_FUNC_T write_callback; + +} AML_DEV_ACCESS_T; + +typedef struct +{ + UI32_T vendor; + UI32_T device; + UI32_T revision; + +} AML_DEV_ID_T; + + +typedef struct +{ + AML_HW_IF_T if_type; + AML_DEV_ID_T id; + AML_DEV_ACCESS_T access; + +} AML_DEV_T; + +/* EXPORTED SUBPROGRAM SPECIFICATIONS + */ + +/* FUNCTION NAME: aml_getRunMode + * PURPOSE: + * To get current SDK running mode. + * INPUT: + * unit -- the device unit + * OUTPUT: + * ptr_mode -- current running mode + * RETURN: + * NPS_E_OK -- Successfully get the running mode. + * NOTES: + * none + */ +NPS_ERROR_NO_T +aml_getRunMode( + const UI32_T unit, + UI32_T *ptr_mode); + +/* FUNCTION NAME: aml_init + * PURPOSE: + * To initialize the DMA memory and interface-related kernel source + * such as PCIe/I2C/SPI. + * INPUT: + * none + * OUTPUT: + * none + * RETURN: + * NPS_E_OK -- Successfully initialize AML module. + * NPS_E_OTHERS -- Failed to initialize AML module. + * NOTES: + * none + */ +NPS_ERROR_NO_T +aml_deinit(void); + +/* FUNCTION NAME: aml_init + * PURPOSE: + * To initialize the DMA memory and interface-related kernel source + * such as PCIe/I2C/SPI. + * INPUT: + * none + * OUTPUT: + * none + * RETURN: + * NPS_E_OK -- Successfully initialize AML module. + * NPS_E_OTHERS -- Failed to initialize AML module. + * NOTES: + * none + */ +NPS_ERROR_NO_T +aml_init(void); + +/* FUNCTION NAME: aml_getNumberOfChip + * PURPOSE: + * To get the number of chips connected to host CPU. + * INPUT: + * none + * OUTPUT: + * ptr_num -- pointer for the chip number + * RETURN: + * NPS_E_OK -- Successfully get the number of chips. + * NOTES: + * none + */ +NPS_ERROR_NO_T +aml_getNumberOfChip( + UI32_T *ptr_num); + +/* FUNCTION NAME: aml_connectIsr + * PURPOSE: + * To enable the system intterupt and specify the ISR handler. + * INPUT: + * unit -- the device unit + * handler -- the ISR hanlder + * ptr_cookie -- pointer for the data as an argument of the handler + * OUTPUT: + * none + * RETURN: + * NPS_E_OK -- Successfully connect the ISR handler to the system. + * NPS_E_OTHERS -- Failed to connect the ISR handler to the system. + * NOTES: + * none + */ +NPS_ERROR_NO_T +aml_connectIsr( + const UI32_T unit, + AML_DEV_ISR_FUNC_T handler, + AML_DEV_ISR_DATA_T *ptr_cookie); + +/* FUNCTION NAME: aml_disconnectIsr + * PURPOSE: + * To disable the system intterupt notification. + * INPUT: + * unit -- the device unit + * OUTPUT: + * none + * RETURN: + * NPS_E_OK -- Successfully disconnect the ISR handler to the system. + * NPS_E_OTHERS -- Failed to disconnect the ISR handler to the system. + * NOTES: + * none + */ +NPS_ERROR_NO_T +aml_disconnectIsr( + const UI32_T unit); + +/* FUNCTION NAME: aml_getDeviceId + * PURPOSE: + * To get the vendor/device/revision ID of the specified chip unit. + * INPUT: + * unit -- the device unit + * OUTPUT: + * ptr_vendor_id -- pointer for the vendor ID + * ptr_device_id -- pointer for the device ID + * ptr_revision_id -- pointer for the revision ID + * RETURN: + * NPS_E_OK -- Successfully get the IDs. + * NPS_E_OTHERS -- Failed to get the IDs. + * NOTES: + * none + */ +NPS_ERROR_NO_T +aml_getDeviceId( + const UI32_T unit, + UI32_T *ptr_vendor_id, + UI32_T *ptr_device_id, + UI32_T *ptr_revision_id); + +/* FUNCTION NAME: aml_readReg + * PURPOSE: + * To read data from the register of the specified chip unit. + * INPUT: + * unit -- the device unit + * addr_offset -- the address of register + * len -- data size read + * OUTPUT: + * ptr_data -- pointer for the register data + * RETURN: + * NPS_E_OK -- Successfully read the data. + * NPS_E_OTHERS -- Failed to read the data. + * NOTES: + * none + */ +NPS_ERROR_NO_T +aml_readReg( + const UI32_T unit, + const UI32_T addr_offset, + UI32_T *ptr_data, + const UI32_T len); + +/* FUNCTION NAME: aml_writeReg + * PURPOSE: + * To write data to the register of the specified chip unit. + * INPUT: + * unit -- the device unit + * addr_offset -- the address of register + * ptr_data -- pointer for the written data + * len -- data size read + * OUTPUT: + * none + * RETURN: + * NPS_E_OK -- Successfully write the data. + * NPS_E_OTHERS -- Failed to write the data. + * NOTES: + * none + */ +NPS_ERROR_NO_T +aml_writeReg( + const UI32_T unit, + const UI32_T addr_offset, + const UI32_T *ptr_data, + const UI32_T len); + +/* FUNCTION NAME: aml_convertVirtToPhy + * PURPOSE: + * To get the physical address of the corresponding virtual + * address input. + * INPUT: + * ptr_virt_addr -- pointer to the virtual address + * OUTPUT: + * ptr_phy_addr -- pointer to the physical address + * RETURN: + * NPS_E_OK -- Successfully convert the address. + * NPS_E_OTHERS -- Failed to convert the address. + * The memory might be not allocated by AML. + * NOTES: + * none + */ +NPS_ERROR_NO_T +aml_convertVirtToPhy( + void *ptr_virt_addr, + NPS_ADDR_T *ptr_phy_addr); + +/* FUNCTION NAME: aml_convertPhyToVirt + * PURPOSE: + * To get the virtual address of the corresponding physical + * address input. + * INPUT: + * ptr_virt_addr -- pointer for the physical address + * OUTPUT: + * pptr_virt_addr -- pointer for the virtual address pointer + * RETURN: + * NPS_E_OK -- Successfully convert the address. + * NPS_E_OTHERS -- Failed to convert the address. + * The memory might be not allocated by AML. + * NOTES: + * none + */ +NPS_ERROR_NO_T +aml_convertPhyToVirt( + const NPS_ADDR_T phy_addr, + void **pptr_virt_addr); + +/* FUNCTION NAME: aml_flushCache + * PURPOSE: + * To update the data from CPU cache to the physical memory. + * INPUT: + * ptr_virt_addr -- pointer for the data + * size -- target data size to be updated + * OUTPUT: + * none + * RETURN: + * NPS_E_OK -- Successfully update the data from CPU cache + * to the physical memory. + * NPS_E_OTHERS -- Failed to pdate the data from CPU cache + * to the physical memory. + * NOTES: + * none + */ +NPS_ERROR_NO_T +aml_flushCache( + void *ptr_virt_addr, + const UI32_T size); + +/* FUNCTION NAME: aml_invalidateCache + * PURPOSE: + * To update the data from physical memory to the CPU cache. + * INPUT: + * ptr_virt_addr -- pointer for the data + * size -- target data size to be updated + * OUTPUT: + * none + * RETURN: + * NPS_E_OK -- Successfully update the data from physical memory + * to the CPU cache. + * NPS_E_OTHERS -- Failed to pdate the data from physical memory + * to the CPU cache. + * NOTES: + * none + */ +NPS_ERROR_NO_T +aml_invalidateCache( + void *ptr_virt_addr, + const UI32_T size); + +#endif /* #ifndef AML_H */ diff --git a/platform/nephos/nephos-modules/modules/src/inc/hal_dev.h b/platform/nephos/nephos-modules/modules/src/inc/hal_dev.h new file mode 100755 index 00000000000..edd582adc19 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/inc/hal_dev.h @@ -0,0 +1,48 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: hal_dev.h + * PURPOSE: + * Provide a list of device IDs. + * + * NOTES: + */ + +#ifndef HAL_DEV_H +#define HAL_DEV_H + +/* INCLUDE FILE DECLARATIONS + */ +/* NAMING CONSTANT DECLARATIONS + */ +#define HAL_MTK_VENDOR_ID (0x0E8D) +#define HAL_NP_VENDOR_ID (0x1D9F) + +#define HAL_DEVICE_ID_MT3257 (0x3257) +#define HAL_DEVICE_ID_MT3258 (0x3258) + +#define HAL_DEVICE_ID_NP8363 (0x8363) /* 1.08T 1Bin */ +#define HAL_DEVICE_ID_NP8365 (0x8365) /* 1.8T 1Bin */ +#define HAL_DEVICE_ID_NP8366 (0x8366) /* 2.4T 1Bin */ +#define HAL_DEVICE_ID_NP8367 (0x8367) /* 3.2T 1Bin */ +#define HAL_DEVICE_ID_NP8368 (0x8368) /* 3.2T 2Bin */ +#define HAL_DEVICE_ID_NP8369 (0x8369) /* 6.4T 2Bin */ + +#define HAL_REVISION_ID_E1 (0x01) +#define HAL_REVISION_ID_E2 (0x02) + +#define HAL_INVALID_DEVICE_ID (0xFFFFFFFF) + +#endif /* #ifndef HAL_DEV_H */ diff --git a/platform/nephos/nephos-modules/modules/src/inc/hal_tau_pkt_knl.h b/platform/nephos/nephos-modules/modules/src/inc/hal_tau_pkt_knl.h new file mode 100755 index 00000000000..96a8cf6441f --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/inc/hal_tau_pkt_knl.h @@ -0,0 +1,2302 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: hal_tau_pkt_knl.h + * PURPOSE: + * To provide Linux kernel for PDMA TX/RX control. + * + * NOTES: + */ + +#ifndef HAL_TAU_PKT_KNL_H +#define HAL_TAU_PKT_KNL_H + + +/* CP_COMMON */ +#define HAL_TAU_PKT_CP_COMMON_INT_EN_HI (0x012C0000) +#define HAL_TAU_PKT_CP_COMMON_INT_LO_HI (0x012C0004) +#define HAL_TAU_PKT_CP_COMMON_INT_LVL_HI (0x012C0008) +#define HAL_TAU_PKT_CP_COMMON_INT_LVL_LO (0x012C000C) +#define HAL_TAU_PKT_CP_COMMON_INT_MASK_SET_HI (0x012C0010) +#define HAL_TAU_PKT_CP_COMMON_INT_MASK_SET_LO (0x012C0014) +#define HAL_TAU_PKT_CP_COMMON_INT_MASK_CLR_HI (0x012C0018) +#define HAL_TAU_PKT_CP_COMMON_INT_MASK_CLR_LO (0x012C001C) +#define HAL_TAU_PKT_CP_COMMON_INT_MASK_VAL_HI (0x012C0020) +#define HAL_TAU_PKT_CP_COMMON_INT_MASK_VAL_LO (0x012C0024) +#define HAL_TAU_PKT_CP_COMMON_INT_STAT_HI (0x012C0028) +#define HAL_TAU_PKT_CP_COMMON_INT_STAT_LO (0x012C002C) +#define HAL_TAU_PKT_CP_COMMON_INT_CLR_HI (0x012C0030) +#define HAL_TAU_PKT_CP_COMMON_INT_CLR_LO (0x012C0034) +#define HAL_TAU_PKT_CP_COMMON_INT_SET_HI (0x012C0038) +#define HAL_TAU_PKT_CP_COMMON_INT_SET_LO (0x012C003C) + +/* PDMA */ +#define HAL_TAU_PKT_PDMA_ERR_INT_STAT (0x013F1000) +#define HAL_TAU_PKT_PDMA_ERR_INT_CLR (0x013F1004) +#define HAL_TAU_PKT_PDMA_ERR_INT_EN (0x013F1010) +#define HAL_TAU_PKT_PDMA_ERR_INT_LVL (0x013F1014) +#define HAL_TAU_PKT_PDMA_ERR_INT_MASK_SET (0x013F1018) +#define HAL_TAU_PKT_PDMA_ERR_INT_MASK_CLR (0x013F101C) +#define HAL_TAU_PKT_PDMA_ERR_INT_MASK_VAL (0x013F1020) +#define HAL_TAU_PKT_PDMA_ERR_INT_SET (0x013F1024) +#define HAL_TAU_PKT_PDMA_CREDIT_CFG (0x013F1100) + +/* Rx */ +#define HAL_TAU_PKT_PDMA_RCH_GPD_RING_START_ADDR_LO (0x013F12E4) +#define HAL_TAU_PKT_PDMA_RCH_GPD_RING_START_ADDR_HI (0x013F12E8) +#define HAL_TAU_PKT_PDMA_RCH_GPD_RING_SIZE (0x013F12EC) +#define HAL_TAU_PKT_PDMA_RCH_CMD (0x013F1300) +#define HAL_TAU_PKT_PDMA_RCH_INT_EN (0x013F1360) +#define HAL_TAU_PKT_PDMA_RCH_INT_LVL (0x013F1364) +#define HAL_TAU_PKT_PDMA_RCH_INT_MASK (0x013F1368) +#define HAL_TAU_PKT_PDMA_RCH_INT_SET (0x013F1370) +#define HAL_TAU_PKT_PDMA_RCH_INT_CLR (0x013F1374) +#define HAL_TAU_PKT_PDMA_RCH_INT_STAT (0x013F1378) + +/* Tx */ +#define HAL_TAU_PKT_PDMA_TCH_GPD_RING_START_ADDR_LO (0x013F1A00) +#define HAL_TAU_PKT_PDMA_TCH_GPD_RING_START_ADDR_HI (0x013F1A04) +#define HAL_TAU_PKT_PDMA_TCH_GPD_RING_SIZE (0x013F1A08) +#define HAL_TAU_PKT_PDMA_TCH_CMD (0x013F1A20) +#define HAL_TAU_PKT_PDMA_TCH_INT_EN (0x013F1A40) +#define HAL_TAU_PKT_PDMA_TCH_INT_LVL (0x013F1A44) +#define HAL_TAU_PKT_PDMA_TCH_INT_MASK (0x013F1A48) +#define HAL_TAU_PKT_PDMA_TCH_INT_SET (0x013F1A50) +#define HAL_TAU_PKT_PDMA_TCH_INT_CLR (0x013F1A54) +#define HAL_TAU_PKT_PDMA_TCH_INT_STAT (0x013F1A58) + +#define HAL_TAU_PKT_GET_MMIO(__tbl__) (0x00FFFFFF & (__tbl__)) +#define HAL_TAU_PKT_GET_PDMA_RCH_REG(__tbl__, __channel__) ((__tbl__) + (0x200 * (__channel__))) +#define HAL_TAU_PKT_GET_PDMA_TCH_REG(__tbl__, __channel__) ((__tbl__) + (0x100 * (__channel__))) + + + +#define NPS_NETIF_NAME_LEN (16) +#define NPS_NETIF_PROFILE_NUM_MAX (256) +#define NPS_NETIF_PROFILE_PATTERN_NUM (4) +#define NPS_NETIF_PROFILE_PATTERN_LEN (8) + +/* nps_port.h */ +typedef enum +{ + NPS_PORT_SPEED_1G = 1000, + NPS_PORT_SPEED_10G = 10000, + NPS_PORT_SPEED_25G = 25000, + NPS_PORT_SPEED_40G = 40000, + NPS_PORT_SPEED_50G = 50000, + NPS_PORT_SPEED_100G = 100000, + NPS_PORT_SPEED_200G = 200000, + NPS_PORT_SPEED_400G = 400000, + NPS_PORT_SPEED_LAST +} NPS_PORT_SPEED_T; + + +/* hal_tau_const.h */ +#define HAL_TAU_PORT_NUM (128) +#define HAL_TAU_EXCPT_CPU_NUM (256) +#define HAL_TAU_INVALID_NVO3_ENCAP_IDX (0x3FFF) +#define HAL_TAU_INVALID_NVO3_ADJ_IDX (0xFF) +#define HAL_TAU_EXCPT_CPU_BASE_ID (28 * 1024) +#define HAL_TAU_EXCPT_CPU_NON_L3_MIN (0) +#define HAL_TAU_EXCPT_CPU_NON_L3_MAX (HAL_TAU_EXCPT_CPU_NON_L3_MIN + HAL_TAU_EXCPT_CPU_NUM - 1) +#define HAL_TAU_EXCPT_CPU_L3_MIN (HAL_TAU_EXCPT_CPU_NON_L3_MIN + HAL_TAU_EXCPT_CPU_NUM) +#define HAL_TAU_EXCPT_CPU_L3_MAX (HAL_TAU_EXCPT_CPU_L3_MIN + HAL_TAU_EXCPT_CPU_NUM - 1) + +/* hal_tau_pkt_rsrc.h */ +#define HAL_TAU_PKT_IPP_EXCPT_LAST (256) +#define HAL_TAU_PKT_EPP_EXCPT_LAST (64) + +#define HAL_TAU_PKT_IPP_EXCPT_IEV_SDK_REDIRECT_TO_CPU_L2UC \ + (192 + IEV_CFG_EXCPT_EN_W1_SDK_REDIRECT_TO_CPU_L2UC_FIELD_ID ) +#define HAL_TAU_PKT_IPP_EXCPT_IEV_SDK_REDIRECT_TO_CPU_L3UC \ + (192 + IEV_CFG_EXCPT_EN_W1_SDK_REDIRECT_TO_CPU_L3UC_FIELD_ID ) +#define HAL_TAU_PKT_IPP_EXCPT_IEV_SDK_L3UC_DA_MISS \ + (192 + IEV_CFG_EXCPT_EN_W1_SDK_L3UC_DA_MISS_FIELD_ID ) +#define HAL_TAU_PKT_IPP_EXCPT_IEV_SDK_L3MC_PIM_REGISTER \ + (192 + IEV_CFG_EXCPT_EN_W1_SDK_L3MC_PIM_REGISTER_FIELD_ID ) +#define HAL_TAU_PKT_IPP_EXCPT_IEV_SDK_FLEX_DECAP_0_REASON_0 \ + (224 + IEV_CFG_EXCPT_EN_W0_SDK_FLEX_DECAP_0_REASON_0_FIELD_ID) + +/* offset of ITM_RSLT_CPU_CP */ +#define HAL_TAU_PKT_IPP_COPY2CPU_OFFSET (16) +#define HAL_TAU_PKT_EPP_COPY2CPU_OFFSET (32) + +typedef UI32_T HAL_TAU_PKT_IPP_EXCPT_T; +typedef UI32_T HAL_TAU_PKT_EPP_EXCPT_T; + +typedef enum +{ + HAL_TAU_PKT_IPP_L3_EXCPT_FCOE_ZONING = 0, + HAL_TAU_PKT_IPP_L3_EXCPT_RPF, + HAL_TAU_PKT_IPP_L3_EXCPT_ICMP_REDIR, + HAL_TAU_PKT_IPP_L3_EXCPT_SW_FWD, + HAL_TAU_PKT_IPP_L3_EXCPT_MTU, + HAL_TAU_PKT_IPP_L3_EXCPT_TTL, + HAL_TAU_PKT_IPP_L3_EXCPT_LAST +} HAL_TAU_PKT_IPP_L3_EXCPT_T; + +typedef enum +{ + HAL_TAU_PKT_IPP_RSN_RSVD_0 = 0, + HAL_TAU_PKT_IPP_RSN_IDS_MPLS_MP_LSP_INNER_IP_LCL, + HAL_TAU_PKT_IPP_RSN_IDS_IP_MC_TNL_LCL_INTF_MISS, + HAL_TAU_PKT_IPP_RSN_IDS_IP_MC_TNL_GRE_ISIS, + HAL_TAU_PKT_IPP_RSN_IDS_IP_MC_TNL_GRE_KA, + HAL_TAU_PKT_IPP_RSN_IDS_IP_MC_TNL_INNER_IP_LCL, + HAL_TAU_PKT_IPP_RSN_IDS_TRILL_MC_LCL_INTF_MISS, + HAL_TAU_PKT_IPP_RSN_IDS_INNER_SRV_1ST_MISS, + HAL_TAU_PKT_IPP_RSN_IDS_INNER_SRV_2ND_MISS, + HAL_TAU_PKT_IPP_RSN_IEV_IP_MC_TTL0, + HAL_TAU_PKT_IPP_RSN_IEV_IP_MC_TTL1, + HAL_TAU_PKT_IPP_RSN_RSVD_1, + HAL_TAU_PKT_IPP_RSN_RSVD_2, + HAL_TAU_PKT_IPP_RSN_IDS_ECN, + HAL_TAU_PKT_IPP_RSN_IEV_ICMP_REDIR, + HAL_TAU_PKT_IPP_RSN_IEV_ICMP_REDIR_WITH_RSN_IDS_ECN, + HAL_TAU_PKT_IPP_RSN_LAST +} HAL_TAU_PKT_IPP_RSN_T; + +typedef enum +{ + /* IEV.cp_to_cpu_bmap |= + * (1 << sw_plane.iev_cp_to_cpu_bit_pos_{i}) | + * (1 << sw_plane.iev_sflw_cp_to_cpu_bidx_{i}) | + * (1 << (IEV_RSLT_CTL2CPU_PROF.code - 1)) | + * (1 << (ICIA_RSLT_TCAM_UCP_POLICY.cp_to_cpu_idx - 1)); + */ + HAL_TAU_PKT_IPP_COPY2CPU_ICIA_0 = 0, + HAL_TAU_PKT_IPP_COPY2CPU_ICIA_1, + HAL_TAU_PKT_IPP_COPY2CPU_ICIA_2, + HAL_TAU_PKT_IPP_COPY2CPU_ICIA_3, + HAL_TAU_PKT_IPP_COPY2CPU_ICIA_4, + HAL_TAU_PKT_IPP_COPY2CPU_ICIA_5, + HAL_TAU_PKT_IPP_COPY2CPU_COPY_TO_CPU_L2UC, + HAL_TAU_PKT_IPP_COPY2CPU_COPY_TO_CPU_L3UC, + HAL_TAU_PKT_IPP_COPY2CPU_PORT_SFLOW, + HAL_TAU_PKT_IPP_COPY2CPU_ICIA_SFLOW, + HAL_TAU_PKT_IPP_COPY2CPU_FLOW_SFLOW, + HAL_TAU_PKT_IPP_COPY2CPU_L3MC_SPT_READY_UNSET, + HAL_TAU_PKT_IPP_COPY2CPU_COPY_TO_CPU_L2MC, + HAL_TAU_PKT_IPP_COPY2CPU_COPY_TO_CPU_L3MC, + HAL_TAU_PKT_IPP_COPY2CPU_USR_DEFINE_0, + HAL_TAU_PKT_IPP_COPY2CPU_USR_DEFINE_1, + HAL_TAU_PKT_IPP_COPY2CPU_LAST +} HAL_TAU_PKT_IPP_COPY2CPU_T; + +typedef enum +{ + /* The value of: + * 1. emi_sflw_cp_to_cpu_idx_bidx_* + * 2. ECIA.cp_to_cpu_idx (last is invalid) + */ + HAL_TAU_PKT_EPP_COPY2CPU_ECIA_0 = 0, + HAL_TAU_PKT_EPP_COPY2CPU_ECIA_1, + HAL_TAU_PKT_EPP_COPY2CPU_ECIA_2, + HAL_TAU_PKT_EPP_COPY2CPU_ECIA_3, + HAL_TAU_PKT_EPP_COPY2CPU_PORT_SFLOW, + HAL_TAU_PKT_EPP_COPY2CPU_ECIA_SFLOW, + HAL_TAU_PKT_EPP_COPY2CPU_RSVD_0, + HAL_TAU_PKT_EPP_COPY2CPU_RSVD_1, + HAL_TAU_PKT_EPP_COPY2CPU_LAST +} HAL_TAU_PKT_EPP_COPY2CPU_T; + +#define HAL_TAU_PKT_IPP_EXCPT_BITMAP_SIZE (NPS_BITMAP_SIZE(HAL_TAU_PKT_IPP_EXCPT_LAST)) +#define HAL_TAU_PKT_IPP_L3_EXCPT_BITMAP_SIZE (NPS_BITMAP_SIZE(HAL_TAU_PKT_IPP_L3_EXCPT_LAST)) +#define HAL_TAU_PKT_EPP_EXCPT_BITMAP_SIZE (NPS_BITMAP_SIZE(HAL_TAU_PKT_EPP_EXCPT_LAST)) +#define HAL_TAU_PKT_IPP_RSN_BITMAP_SIZE (NPS_BITMAP_SIZE(HAL_TAU_PKT_IPP_RSN_LAST)) +#define HAL_TAU_PKT_IPP_COPY2CPU_BITMAP_SIZE (NPS_BITMAP_SIZE(HAL_TAU_PKT_IPP_COPY2CPU_LAST)) +#define HAL_TAU_PKT_EPP_COPY2CPU_BITMAP_SIZE (NPS_BITMAP_SIZE(HAL_TAU_PKT_EPP_COPY2CPU_LAST)) + +typedef UI32_T HAL_TAU_PKT_IPP_EXCPT_BITMAP_T[HAL_TAU_PKT_IPP_EXCPT_BITMAP_SIZE]; +typedef UI32_T HAL_TAU_PKT_IPP_L3_EXCPT_BITMAP_T[HAL_TAU_PKT_IPP_L3_EXCPT_BITMAP_SIZE]; +typedef UI32_T HAL_TAU_PKT_EPP_EXCPT_BITMAP_T[HAL_TAU_PKT_EPP_EXCPT_BITMAP_SIZE]; +typedef UI32_T HAL_TAU_PKT_IPP_RSN_BITMAP_T[HAL_TAU_PKT_IPP_RSN_BITMAP_SIZE]; +typedef UI32_T HAL_TAU_PKT_IPP_COPY2CPU_BITMAP_T[HAL_TAU_PKT_IPP_COPY2CPU_BITMAP_SIZE]; +typedef UI32_T HAL_TAU_PKT_EPP_COPY2CPU_BITMAP_T[HAL_TAU_PKT_EPP_COPY2CPU_BITMAP_SIZE]; + +typedef struct +{ + /* excpt */ + HAL_TAU_PKT_IPP_EXCPT_BITMAP_T ipp_excpt_bitmap; + HAL_TAU_PKT_IPP_L3_EXCPT_BITMAP_T ipp_l3_excpt_bitmap; + HAL_TAU_PKT_EPP_EXCPT_BITMAP_T epp_excpt_bitmap; + + /* cp */ + HAL_TAU_PKT_IPP_RSN_BITMAP_T ipp_rsn_bitmap; + HAL_TAU_PKT_IPP_COPY2CPU_BITMAP_T ipp_copy2cpu_bitmap; + HAL_TAU_PKT_EPP_COPY2CPU_BITMAP_T epp_copy2cpu_bitmap; + +} HAL_TAU_PKT_RX_REASON_BITMAP_T; + + +/* hal_tau_pkt.h */ + +/* NAMING DECLARATIONS + */ +/* PKT related configurable parameters */ +#define HAL_TAU_PKT_RX_FREE_STACK_SIZE (64 * 1024) +#define HAL_TAU_PKT_RX_FREE_THREAD_PRI (80) + +#define HAL_TAU_PKT_RX_ISR_STACK_SIZE (64 * 1024) +#define HAL_TAU_PKT_RX_ISR_THREAD_PRI (80) + +#define HAL_TAU_PKT_TX_FREE_STACK_SIZE (64 * 1024) +#define HAL_TAU_PKT_TX_FREE_THREAD_PRI (80) + +#define HAL_TAU_PKT_TX_ISR_STACK_SIZE (64 * 1024) +#define HAL_TAU_PKT_TX_ISR_THREAD_PRI (80) + +#define HAL_TAU_PKT_TX_NET_STACK_SIZE (64 * 1024) +#define HAL_TAU_PKT_TX_NET_THREAD_PRI (80) + +#define HAL_TAU_PKT_ERROR_ISR_STACK_SIZE (64 * 1024) +#define HAL_TAU_PKT_ERROR_ISR_THREAD_PRI (80) + +/* PKT definitions */ +#define HAL_TAU_PKT_TX_MAX_LEN (9216) +#define HAL_TAU_PKT_RX_MAX_LEN (9216 + 86) /* EPP tunnel header */ +#define HAL_TAU_PKT_MIN_LEN (64) /* Ethernet definition */ +#define HAL_TAU_PKT_TMH_HDR_SZ (20) +#define HAL_TAU_PKT_PPH_HDR_SZ (20) +#define HAL_TAU_PKT_CRC_LEN (4) + +/* CH */ +#define HAL_TAU_PKT_CH_LAST_GPD (0) +#define HAL_TAU_PKT_CH_MIDDLE_GPD (1) + +/* PRG */ +#define HAL_TAU_PKT_PRG_PROCESS_GPD (0) /* Normal */ +#define HAL_TAU_PKT_PRG_SKIP_GPD (1) /* Skip */ + +/* CRCC */ +#define HAL_TAU_PKT_CRCC_SUM_BY_HW (0) /* calculated by HW */ +#define HAL_TAU_PKT_CRCC_SUM_BY_SW (1) /* calculated by SW */ + +/* IOC */ +#define HAL_TAU_PKT_IOC_NO_INTR (0) /* trigger interrupt each GPD */ +#define HAL_TAU_PKT_IOC_HAS_INTR (1) /* trigger interrupt when ch=0, default setting */ + +/* HWO */ +#define HAL_TAU_PKT_HWO_SW_OWN (0) +#define HAL_TAU_PKT_HWO_HW_OWN (1) + +/* ECC */ +#define HAL_TAU_PKT_ECC_ERROR_OCCUR (1) + +/* CPU queue number */ +#define HAL_TAU_PKT_CPU_QUE_NUM (48) + +/* PDMA Definitions */ +#define HAL_TAU_PKT_PDMA_MAX_GPD_PER_PKT (10) /* <= 256 */ +#define HAL_TAU_PKT_PDMA_TX_GPD_NUM (1024) /* <= 65535 */ +#define HAL_TAU_PKT_PDMA_RX_GPD_NUM (1024) /* <= 65535 */ +#define HAL_TAU_PKT_PDMA_TX_INTR_TIMEOUT (10 * 1000) /* us */ +#define HAL_TAU_PKT_PDMA_TX_POLL_MAX_LOOP (10 * 1000) /* int */ + +/* Mode */ +#define HAL_TAU_PKT_TX_WAIT_MODE (HAL_TAU_PKT_TX_WAIT_ASYNC) +#define HAL_TAU_PKT_RX_SCHED_MODE (HAL_TAU_PKT_RX_SCHED_RR) + +/* TX Queue */ +#define HAL_TAU_PKT_TX_QUEUE_LEN (HAL_TAU_PKT_PDMA_TX_GPD_NUM * 10) +#define HAL_TAU_PKT_TX_TASK_MAX_LOOP (HAL_TAU_PKT_TX_QUEUE_LEN) + +/* RX Queue */ +#define HAL_TAU_PKT_RX_QUEUE_NUM (HAL_TAU_PKT_RX_CHANNEL_LAST) +#define HAL_TAU_PKT_RX_QUEUE_WEIGHT (10) +#define HAL_TAU_PKT_RX_QUEUE_LEN (HAL_TAU_PKT_PDMA_RX_GPD_NUM * 10) +#define HAL_TAU_PKT_RX_TASK_MAX_LOOP (HAL_TAU_PKT_RX_QUEUE_LEN) + +/* MACRO FUNCTION DECLARATIONS + */ +/*---------------------------------------------------------------------------*/ +/* [Taurus] Alignment to 64-bytes */ +#if defined(NPS_EN_HOST_64_BIT_BIG_ENDIAN) || defined(NPS_EN_HOST_64_BIT_LITTLE_ENDIAN) +#define HAL_TAU_PKT_PDMA_ALIGN_ADDR(pdma_addr, align_sz) (((pdma_addr) + (align_sz)) & 0xFFFFFFFFFFFFFFC0) +#else +#define HAL_TAU_PKT_PDMA_ALIGN_ADDR(pdma_addr, align_sz) (((pdma_addr) + (align_sz)) & 0xFFFFFFC0) +#endif +/*---------------------------------------------------------------------------*/ +#if defined(NPS_EN_BIG_ENDIAN) +#define HAL_TAU_PKT_ENDIAN_SWAP32(val) (val) +#else +#define HAL_TAU_PKT_ENDIAN_SWAP32(val) ((((UI32_T)(val) & 0xFF) << 24) | \ + (((UI32_T)(val) & 0xFF00) << 8) | \ + (((UI32_T)(val) & 0xFF0000) >> 8) | \ + (((UI32_T)(val) & 0xFF000000) >> 24)) +#endif +/*---------------------------------------------------------------------------*/ +#define HAL_TAU_PKT_GET_BIT(flags, bit) ((((flags) & (bit)) > 0)? 1 : 0) +/*---------------------------------------------------------------------------*/ +#define HAL_TAU_PKT_SET_BITMAP(bitmap, mask_bitmap) (bitmap = ((bitmap) | (mask_bitmap))) +#define HAL_TAU_PKT_CLR_BITMAP(bitmap, mask_bitmap) (bitmap = ((bitmap) & (~(mask_bitmap)))) +/*---------------------------------------------------------------------------*/ +#define HAL_TAU_PKT_GET_TX_INTR_TYPE(channel) (HAL_INTR_TX_CH0 + channel) +#define HAL_TAU_PKT_GET_RX_INTR_TYPE(channel) (HAL_INTR_RX_CH0 + channel) + +/* DATA TYPE DECLARATIONS + */ +typedef enum +{ + HAL_TAU_PKT_TX_WAIT_ASYNC = 0, + HAL_TAU_PKT_TX_WAIT_SYNC_INTR = 1, + HAL_TAU_PKT_TX_WAIT_SYNC_POLL = 2 + +} HAL_TAU_PKT_TX_WAIT_T; + +typedef enum +{ + HAL_TAU_PKT_RX_SCHED_RR = 0, + HAL_TAU_PKT_RX_SCHED_WRR = 1 + +} HAL_TAU_PKT_RX_SCHED_T; + +/* GPD and Packet Strucutre Definition */ +#if defined(NPS_EN_BIG_ENDIAN) + +typedef struct +{ + /* NPS DWORD 0 */ + UI32_T typ : 2; + UI32_T tc : 4; + UI32_T color : 2; + UI32_T srv : 3; + UI32_T trig : 1; + UI32_T igr_phy_port :12; + UI32_T hsh_val_w0 : 8; + /* NPS DWORD 1 */ + UI32_T hsh_val_w1 : 2; + UI32_T dst_idx :15; + UI32_T src_idx :15; + /* NPS DWORD 2 */ + UI32_T intf_fdid :14; + UI32_T nvo3_mgid_is_transit : 1; + UI32_T skip_epp : 1; + UI32_T steer_applied : 1; + UI32_T nvo3_ip_tnl_decap_prop_ttl : 1; + UI32_T nvo3_mpls_uhp_prop_ttl : 1; + UI32_T ecn : 2; + UI32_T store_and_forward : 1; + UI32_T lag_epoch : 1; + UI32_T src_supp_tag : 5; + UI32_T one_arm_rte_srv_fdid : 1; + UI32_T fab_one_arm_rte : 1; + UI32_T skip_ipp : 1; + UI32_T igr_fab_port_grp : 1; + /* NPS DWORD 3 */ + UI32_T : 2; + UI32_T nvo3_mgid :15; + UI32_T nvo3_intf :14; + UI32_T nvo3_src_supp_tag_w0 : 1; + /* NPS DWORD 4 */ + UI32_T nvo3_src_supp_tag_w1 : 4; + UI32_T mir_bmap : 8; + UI32_T cp_to_cpu_code : 4; + UI32_T cp_to_cpu_bmap :16; +} HAL_TAU_PKT_ITMH_ETH_T; + +typedef struct +{ + /* NPS DWORD 0 */ + UI32_T typ : 2; + UI32_T tc : 4; + UI32_T color : 2; + UI32_T srv : 3; + UI32_T trig : 1; + UI32_T igr_phy_port :12; + UI32_T hsh_val_w0 : 8; + /* NPS DWORD 1 */ + UI32_T hsh_val_w1 : 2; + UI32_T dst_idx :15; + UI32_T src_idx :15; + /* NPS DWORD 2 */ + UI32_T intf_fdid :14; + UI32_T nvo3_mgid_is_transit : 1; + UI32_T skip_epp : 1; + UI32_T steer_applied : 1; + UI32_T nvo3_ip_tnl_decap_prop_ttl : 1; + UI32_T nvo3_mpls_uhp_prop_ttl : 1; + UI32_T ecn : 2; + UI32_T store_and_forward : 1; + UI32_T lag_epoch : 1; + UI32_T src_supp_tag : 5; + UI32_T one_arm_rte_srv_fdid : 1; + UI32_T fab_one_arm_rte : 1; + UI32_T : 2; + /* NPS DWORD 3 */ + UI32_T :32; + /* NPS DWORD 4 */ + UI32_T :23; + UI32_T excpt_code : 8; + UI32_T exp_dscp_mrkd : 1; +} HAL_TAU_PKT_ETMH_FAB_T; + +typedef struct +{ + /* NPS DWORD 0 */ + UI32_T typ : 2; + UI32_T tc : 4; + UI32_T color : 2; + UI32_T srv : 3; + UI32_T trig : 1; + UI32_T igr_phy_port :12; + UI32_T hsh_val_w0 : 8; + /* NPS DWORD 1 */ + UI32_T hsh_val_w1 : 2; + UI32_T dst_idx :15; + UI32_T src_idx :15; + /* NPS DWORD 2 */ + UI32_T intf_fdid :14; + UI32_T nvo3_mgid_is_transit : 1; + UI32_T skip_epp : 1; + UI32_T steer_applied : 1; + UI32_T nvo3_ip_tnl_decap_prop_ttl : 1; + UI32_T nvo3_mpls_uhp_prop_ttl : 1; + UI32_T ecn : 2; + UI32_T igr_fab_port_grp : 1; + UI32_T redir : 1; + UI32_T excpt_code_mir_bmap : 8; + UI32_T cp_to_cpu_bmap_w0 : 1; + /* NPS DWORD 3 */ + UI32_T cp_to_cpu_bmap_w1 : 7; + UI32_T egr_phy_port :12; + UI32_T src_supp_pnd : 1; + UI32_T mc_vid_ctl : 3; + UI32_T mc_vid_1st_w0 : 9; + /* NPS DWORD 4 */ + UI32_T mc_vid_1st_w1 : 3; + UI32_T mc_vid_2nd :12; + UI32_T mc_decr_ttl : 1; + UI32_T mc_is_routed : 1; + UI32_T mc_mel_vld : 1; + UI32_T mc_cp_idx :13; + UI32_T exp_dscp_mrkd : 1; +} HAL_TAU_PKT_ETMH_ETH_T; + +typedef struct +{ + /* NPS DWORD 0 */ + UI32_T decap_act : 3; + UI32_T igr_l2_vid_num : 2; + UI32_T nvo3_encap_idx :14; + UI32_T mpls_pw_cw_vld : 1; + UI32_T hit_idx_w0 :12; + /* NPS DWORD 1 */ + UI32_T hit_idx_w1 : 7; + UI32_T nvo3_adj_idx : 8; + UI32_T seg_vmid_w0 :17; + /* NPS DWORD 2 */ + UI32_T seg_vmid_w1 : 7; + UI32_T : 1; + UI32_T l2_sa_lrn_en_hw_cvs : 1; + UI32_T l2_sa_lrn_en_hw : 1; + UI32_T vid_ctl : 3; + UI32_T vid_1st :12; + UI32_T vid_2nd_w0 : 7; + /* NPS DWORD 3 */ + UI32_T vid_2nd_w1 : 5; + UI32_T flw_lbl :10; + UI32_T rewr_idx_ctl : 2; + UI32_T rewr_idx_0 :13; + UI32_T rewr_idx_1_w0 : 2; + /* NPS DWORD 4 */ + UI32_T rewr_idx_1_w1 :11; + UI32_T mrk_pcp_dei_en : 1; + UI32_T mrk_pcp_val : 3; + UI32_T mrk_dei_val : 1; + UI32_T ts :16; +} HAL_TAU_PKT_PPH_L2_T; + +typedef struct +{ + /* NPS DWORD 0 */ + UI32_T decap_act : 3; + UI32_T igr_l2_vid_num : 2; + UI32_T nvo3_encap_idx :14; + UI32_T mpls_pw_cw_vld : 1; + UI32_T hit_idx_w0 :12; + /* NPS DWORD 1 */ + UI32_T hit_idx_w1 : 7; + UI32_T nvo3_adj_idx : 8; + UI32_T seg_vmid_w0 :17; + /* NPS DWORD 2 */ + UI32_T seg_vmid_w1 : 7; + UI32_T : 1; + UI32_T rpf_pnd : 1; + UI32_T adj_idx :18; + UI32_T is_mc : 1; + UI32_T decr_ttl : 1; + UI32_T decap_prop_ttl : 1; + UI32_T mrk_dscp_en : 1; + UI32_T mrk_dscp_val_w0 : 1; + /* NPS DWORD 3 */ + UI32_T mrk_dscp_val_w1 : 5; + UI32_T flw_lbl :10; + UI32_T rewr_idx_ctl : 2; + UI32_T rewr_idx_0 :13; + UI32_T rewr_idx_1_w0 : 2; + /* NPS DWORD 4 */ + UI32_T rewr_idx_1_w1 :11; + UI32_T mrk_pcp_dei_en : 1; + UI32_T mrk_pcp_val : 3; + UI32_T mrk_dei_val : 1; + UI32_T ts :16; +} HAL_TAU_PKT_PPH_L3UC_T; + +typedef struct +{ + /* NPS DWORD 0 */ + UI32_T decap_act : 3; + UI32_T igr_l2_vid_num : 2; + UI32_T nvo3_encap_idx :14; + UI32_T mpls_pw_cw_vld : 1; + UI32_T hit_idx_w0 :12; + /* NPS DWORD 1 */ + UI32_T hit_idx_w1 : 7; + UI32_T nvo3_adj_idx : 8; + UI32_T vid_1st :12; + UI32_T vid_2nd_w0 : 5; + /* NPS DWORD 2 */ + UI32_T vid_2nd_w1 : 7; + UI32_T :15; + UI32_T l2_sa_lrn_en_hw_cvs : 1; + UI32_T l2_sa_lrn_en_hw : 1; + UI32_T vid_ctl : 3; + UI32_T is_mc : 1; + UI32_T : 1; + UI32_T decap_prop_ttl : 1; + UI32_T mrk_dscp_en : 1; + UI32_T mrk_dscp_val_w0 : 1; + /* NPS DWORD 3 */ + UI32_T mrk_dscp_val_w1 : 5; + UI32_T flw_lbl :10; + UI32_T rewr_idx_ctl : 2; + UI32_T rewr_idx_0 :13; + UI32_T rewr_idx_1_w0 : 2; + /* NPS DWORD 4 */ + UI32_T rewr_idx_1_w1 :11; + UI32_T mrk_pcp_dei_en : 1; + UI32_T mrk_pcp_val : 3; + UI32_T mrk_dei_val : 1; + UI32_T ts :16; +} HAL_TAU_PKT_PPH_L3MC_T; + +typedef struct +{ + /* NPS DWORD 0 */ + UI32_T decap_act : 3; + UI32_T igr_l2_vid_num : 2; + UI32_T nvo3_encap_idx :14; + UI32_T : 1; + UI32_T hit_idx_w0 :12; + /* NPS DWORD 1 */ + UI32_T hit_idx_w1 : 7; + UI32_T nvo3_adj_idx : 8; + UI32_T seg_vmid_w0 :17; + /* NPS DWORD 2 */ + UI32_T seg_vmid_w1 : 7; + UI32_T : 2; + UI32_T adj_idx :18; + UI32_T : 1; + UI32_T decr_ttl : 1; + UI32_T decap_prop_ttl : 1; + UI32_T mrk_exp_en : 1; + UI32_T : 1; + /* NPS DWORD 3 */ + UI32_T : 2; + UI32_T mrk_exp_val : 3; + UI32_T php_pop_keep_inner_qos : 1; + UI32_T :26; + /* NPS DWORD 4 */ + UI32_T :11; + UI32_T mrk_pcp_dei_en : 1; + UI32_T mrk_pcp_val : 3; + UI32_T mrk_dei_val : 1; + UI32_T ts :16; +} HAL_TAU_PKT_PPH_L25_T; + +#elif defined(NPS_EN_LITTLE_ENDIAN) + +typedef struct +{ + /* NPS DWORD 0 */ + UI32_T hsh_val_w0 : 8; + UI32_T igr_phy_port :12; + UI32_T trig : 1; + UI32_T srv : 3; + UI32_T color : 2; + UI32_T tc : 4; + UI32_T typ : 2; + /* NPS DWORD 1 */ + UI32_T src_idx :15; + UI32_T dst_idx :15; + UI32_T hsh_val_w1 : 2; + /* NPS DWORD 2 */ + UI32_T igr_fab_port_grp : 1; + UI32_T skip_ipp : 1; + UI32_T fab_one_arm_rte : 1; + UI32_T one_arm_rte_srv_fdid : 1; + UI32_T src_supp_tag : 5; + UI32_T lag_epoch : 1; + UI32_T store_and_forward : 1; + UI32_T ecn : 2; + UI32_T nvo3_mpls_uhp_prop_ttl : 1; + UI32_T nvo3_ip_tnl_decap_prop_ttl : 1; + UI32_T steer_applied : 1; + UI32_T skip_epp : 1; + UI32_T nvo3_mgid_is_transit : 1; + UI32_T intf_fdid :14; + /* NPS DWORD 3 */ + UI32_T nvo3_src_supp_tag_w0 : 1; + UI32_T nvo3_intf :14; + UI32_T nvo3_mgid :15; + UI32_T : 2; + /* NPS DWORD 4 */ + UI32_T cp_to_cpu_bmap :16; + UI32_T cp_to_cpu_code : 4; + UI32_T mir_bmap : 8; + UI32_T nvo3_src_supp_tag_w1 : 4; +} HAL_TAU_PKT_ITMH_ETH_T; + +typedef struct +{ + /* NPS DWORD 0 */ + UI32_T hsh_val_w0 : 8; + UI32_T igr_phy_port :12; + UI32_T trig : 1; + UI32_T srv : 3; + UI32_T color : 2; + UI32_T tc : 4; + UI32_T typ : 2; + /* NPS DWORD 1 */ + UI32_T src_idx :15; + UI32_T dst_idx :15; + UI32_T hsh_val_w1 : 2; + /* NPS DWORD 2 */ + UI32_T : 2; + UI32_T fab_one_arm_rte : 1; + UI32_T one_arm_rte_srv_fdid : 1; + UI32_T src_supp_tag : 5; + UI32_T lag_epoch : 1; + UI32_T store_and_forward : 1; + UI32_T ecn : 2; + UI32_T nvo3_mpls_uhp_prop_ttl : 1; + UI32_T nvo3_ip_tnl_decap_prop_ttl : 1; + UI32_T steer_applied : 1; + UI32_T skip_epp : 1; + UI32_T nvo3_mgid_is_transit : 1; + UI32_T intf_fdid :14; + /* NPS DWORD 3 */ + UI32_T :32; + /* NPS DWORD 4 */ + UI32_T exp_dscp_mrkd : 1; + UI32_T excpt_code : 8; + UI32_T :23; +} HAL_TAU_PKT_ETMH_FAB_T; + +typedef struct +{ + /* NPS DWORD 0 */ + UI32_T hsh_val_w0 : 8; + UI32_T igr_phy_port :12; + UI32_T trig : 1; + UI32_T srv : 3; + UI32_T color : 2; + UI32_T tc : 4; + UI32_T typ : 2; + /* NPS DWORD 1 */ + UI32_T src_idx :15; + UI32_T dst_idx :15; + UI32_T hsh_val_w1 : 2; + /* NPS DWORD 2 */ + UI32_T cp_to_cpu_bmap_w0 : 1; + UI32_T excpt_code_mir_bmap : 8; + UI32_T redir : 1; + UI32_T igr_fab_port_grp : 1; + UI32_T ecn : 2; + UI32_T nvo3_mpls_uhp_prop_ttl : 1; + UI32_T nvo3_ip_tnl_decap_prop_ttl : 1; + UI32_T steer_applied : 1; + UI32_T skip_epp : 1; + UI32_T nvo3_mgid_is_transit : 1; + UI32_T intf_fdid :14; + /* NPS DWORD 3 */ + UI32_T mc_vid_1st_w0 : 9; + UI32_T mc_vid_ctl : 3; + UI32_T src_supp_pnd : 1; + UI32_T egr_phy_port :12; + UI32_T cp_to_cpu_bmap_w1 : 7; + /* NPS DWORD 4 */ + UI32_T exp_dscp_mrkd : 1; + UI32_T mc_cp_idx :13; + UI32_T mc_mel_vld : 1; + UI32_T mc_is_routed : 1; + UI32_T mc_decr_ttl : 1; + UI32_T mc_vid_2nd :12; + UI32_T mc_vid_1st_w1 : 3; +} HAL_TAU_PKT_ETMH_ETH_T; + +typedef struct +{ + /* NPS DWORD 0 */ + UI32_T hit_idx_w0 :12; + UI32_T mpls_pw_cw_vld : 1; + UI32_T nvo3_encap_idx :14; + UI32_T igr_l2_vid_num : 2; + UI32_T decap_act : 3; + /* NPS DWORD 1 */ + UI32_T seg_vmid_w0 :17; + UI32_T nvo3_adj_idx : 8; + UI32_T hit_idx_w1 : 7; + /* NPS DWORD 2 */ + UI32_T vid_2nd_w0 : 7; + UI32_T vid_1st :12; + UI32_T vid_ctl : 3; + UI32_T l2_sa_lrn_en_hw : 1; + UI32_T l2_sa_lrn_en_hw_cvs : 1; + UI32_T : 1; + UI32_T seg_vmid_w1 : 7; + /* NPS DWORD 3 */ + UI32_T rewr_idx_1_w0 : 2; + UI32_T rewr_idx_0 :13; + UI32_T rewr_idx_ctl : 2; + UI32_T flw_lbl :10; + UI32_T vid_2nd_w1 : 5; + /* NPS DWORD 4 */ + UI32_T ts :16; + UI32_T mrk_dei_val : 1; + UI32_T mrk_pcp_val : 3; + UI32_T mrk_pcp_dei_en : 1; + UI32_T rewr_idx_1_w1 :11; +} HAL_TAU_PKT_PPH_L2_T; + +typedef struct +{ + /* NPS DWORD 0 */ + UI32_T hit_idx_w0 :12; + UI32_T mpls_pw_cw_vld : 1; + UI32_T nvo3_encap_idx :14; + UI32_T igr_l2_vid_num : 2; + UI32_T decap_act : 3; + /* NPS DWORD 1 */ + UI32_T seg_vmid_w0 :17; + UI32_T nvo3_adj_idx : 8; + UI32_T hit_idx_w1 : 7; + /* NPS DWORD 2 */ + UI32_T mrk_dscp_val_w0 : 1; + UI32_T mrk_dscp_en : 1; + UI32_T decap_prop_ttl : 1; + UI32_T decr_ttl : 1; + UI32_T is_mc : 1; + UI32_T adj_idx :18; + UI32_T rpf_pnd : 1; + UI32_T : 1; + UI32_T seg_vmid_w1 : 7; + /* NPS DWORD 3 */ + UI32_T rewr_idx_1_w0 : 2; + UI32_T rewr_idx_0 :13; + UI32_T rewr_idx_ctl : 2; + UI32_T flw_lbl :10; + UI32_T mrk_dscp_val_w1 : 5; + /* NPS DWORD 4 */ + UI32_T ts :16; + UI32_T mrk_dei_val : 1; + UI32_T mrk_pcp_val : 3; + UI32_T mrk_pcp_dei_en : 1; + UI32_T rewr_idx_1_w1 :11; +} HAL_TAU_PKT_PPH_L3UC_T; + +typedef struct +{ + /* NPS DWORD 0 */ + UI32_T hit_idx_w0 :12; + UI32_T mpls_pw_cw_vld : 1; + UI32_T nvo3_encap_idx :14; + UI32_T igr_l2_vid_num : 2; + UI32_T decap_act : 3; + /* NPS DWORD 1 */ + UI32_T vid_2nd_w0 : 5; + UI32_T vid_1st :12; + UI32_T nvo3_adj_idx : 8; + UI32_T hit_idx_w1 : 7; + /* NPS DWORD 2 */ + UI32_T mrk_dscp_val_w0 : 1; + UI32_T mrk_dscp_en : 1; + UI32_T decap_prop_ttl : 1; + UI32_T : 1; + UI32_T is_mc : 1; + UI32_T vid_ctl : 3; + UI32_T l2_sa_lrn_en_hw : 1; + UI32_T l2_sa_lrn_en_hw_cvs : 1; + UI32_T :15; + UI32_T vid_2nd_w1 : 7; + /* NPS DWORD 3 */ + UI32_T rewr_idx_1_w0 : 2; + UI32_T rewr_idx_0 :13; + UI32_T rewr_idx_ctl : 2; + UI32_T flw_lbl :10; + UI32_T mrk_dscp_val_w1 : 5; + /* NPS DWORD 4 */ + UI32_T ts :16; + UI32_T mrk_dei_val : 1; + UI32_T mrk_pcp_val : 3; + UI32_T mrk_pcp_dei_en : 1; + UI32_T rewr_idx_1_w1 :11; +} HAL_TAU_PKT_PPH_L3MC_T; + +typedef struct +{ + /* NPS DWORD 0 */ + UI32_T hit_idx_w0 :12; + UI32_T : 1; + UI32_T nvo3_encap_idx :14; + UI32_T igr_l2_vid_num : 2; + UI32_T decap_act : 3; + /* NPS DWORD 1 */ + UI32_T seg_vmid_w0 :17; + UI32_T nvo3_adj_idx : 8; + UI32_T hit_idx_w1 : 7; + /* NPS DWORD 2 */ + UI32_T : 1; + UI32_T mrk_exp_en : 1; + UI32_T decap_prop_ttl : 1; + UI32_T decr_ttl : 1; + UI32_T : 1; + UI32_T adj_idx :18; + UI32_T : 2; + UI32_T seg_vmid_w1 : 7; + /* NPS DWORD 3 */ + UI32_T :26; + UI32_T php_pop_keep_inner_qos : 1; + UI32_T mrk_exp_val : 3; + UI32_T : 2; + /* NPS DWORD 4 */ + UI32_T ts :16; + UI32_T mrk_dei_val : 1; + UI32_T mrk_pcp_val : 3; + UI32_T mrk_pcp_dei_en : 1; + UI32_T :11; +} HAL_TAU_PKT_PPH_L25_T; + +#else +#error "Host GPD endian is not defined!!\n" +#endif + +#if defined(NPS_EN_BIG_ENDIAN) + +/* RX GPD STRUCTURE */ +typedef struct +{ + UI32_T data_buf_addr_lo; + UI32_T data_buf_addr_hi; + UI32_T chksum : 16; + UI32_T ioc : 1; + UI32_T : 1; + UI32_T avbl_buf_len : 14; + UI32_T : 32; + + union + { + HAL_TAU_PKT_ITMH_ETH_T itmh_eth; + HAL_TAU_PKT_ETMH_FAB_T etmh_fab; + HAL_TAU_PKT_ETMH_ETH_T etmh_eth; + }; + union + { + HAL_TAU_PKT_PPH_L2_T pph_l2; + HAL_TAU_PKT_PPH_L3UC_T pph_l3uc; + HAL_TAU_PKT_PPH_L3MC_T pph_l3mc; + HAL_TAU_PKT_PPH_L25_T pph_l25; + }; + + UI32_T : 32; + UI32_T hwo : 1; + UI32_T ch : 1; + UI32_T trn : 1; + UI32_T ecce : 1; + UI32_T errf : 1; + UI32_T : 5; + UI32_T queue : 6; + UI32_T : 2; + UI32_T cnsm_buf_len : 14; + +} HAL_TAU_PKT_RX_GPD_T; + +/* TX GPD STRUCTURE */ +typedef struct +{ + UI32_T data_buf_addr_lo; + UI32_T data_buf_addr_hi; + UI32_T chksum : 16; + UI32_T ioc : 1; + UI32_T : 1; + UI32_T data_buf_size : 14; + UI32_T : 32; + + union + { + HAL_TAU_PKT_ITMH_ETH_T itmh_eth; + HAL_TAU_PKT_ETMH_FAB_T etmh_fab; + HAL_TAU_PKT_ETMH_ETH_T etmh_eth; + }; + union + { + HAL_TAU_PKT_PPH_L2_T pph_l2; + HAL_TAU_PKT_PPH_L3UC_T pph_l3uc; + HAL_TAU_PKT_PPH_L3MC_T pph_l3mc; + HAL_TAU_PKT_PPH_L25_T pph_l25; + }; + + UI32_T : 16; + UI32_T ptp_hdr : 16; + UI32_T hwo : 1; + UI32_T ch : 1; + UI32_T : 1; + UI32_T ecce : 1; + UI32_T : 4; + UI32_T cos : 3; + UI32_T phc : 1; /* PTP Header Control */ + UI32_T ipc : 2; /* Ingress Plane Control */ + UI32_T crcc : 1; + UI32_T prg : 1; /* Purge */ + UI32_T : 2; + UI32_T pkt_len : 14; /* Total packet length */ + +} HAL_TAU_PKT_TX_GPD_T; + +#elif defined(NPS_EN_LITTLE_ENDIAN) + +/* RX GPD STRUCTURE */ +typedef struct +{ + UI32_T data_buf_addr_lo; + UI32_T data_buf_addr_hi; + UI32_T avbl_buf_len : 14; + UI32_T : 1; + UI32_T ioc : 1; + UI32_T chksum : 16; + UI32_T : 32; + + union + { + HAL_TAU_PKT_ITMH_ETH_T itmh_eth; + HAL_TAU_PKT_ETMH_FAB_T etmh_fab; + HAL_TAU_PKT_ETMH_ETH_T etmh_eth; + }; + union + { + HAL_TAU_PKT_PPH_L2_T pph_l2; + HAL_TAU_PKT_PPH_L3UC_T pph_l3uc; + HAL_TAU_PKT_PPH_L3MC_T pph_l3mc; + HAL_TAU_PKT_PPH_L25_T pph_l25; + }; + + UI32_T : 32; + UI32_T cnsm_buf_len : 14; + UI32_T : 2; + UI32_T queue : 6; + UI32_T : 5; + UI32_T errf : 1; + UI32_T ecce : 1; + UI32_T trn : 1; + UI32_T ch : 1; + UI32_T hwo : 1; + +} HAL_TAU_PKT_RX_GPD_T; + +/* TX GPD STRUCTURE */ +typedef struct +{ + UI32_T data_buf_addr_lo; + UI32_T data_buf_addr_hi; + UI32_T data_buf_size : 14; + UI32_T : 1; + UI32_T ioc : 1; + UI32_T chksum : 16; + UI32_T : 32; + + union + { + HAL_TAU_PKT_ITMH_ETH_T itmh_eth; + HAL_TAU_PKT_ETMH_FAB_T etmh_fab; + HAL_TAU_PKT_ETMH_ETH_T etmh_eth; + }; + union + { + HAL_TAU_PKT_PPH_L2_T pph_l2; + HAL_TAU_PKT_PPH_L3UC_T pph_l3uc; + HAL_TAU_PKT_PPH_L3MC_T pph_l3mc; + HAL_TAU_PKT_PPH_L25_T pph_l25; + }; + + UI32_T ptp_hdr : 16; + UI32_T : 16; + UI32_T pkt_len : 14; /* Total packet length */ + UI32_T : 2; + UI32_T prg : 1; /* Purge */ + UI32_T crcc : 1; + UI32_T ipc : 2; /* Ingress Plane Control */ + UI32_T phc : 1; /* PTP Header Control */ + UI32_T cos : 3; + UI32_T : 4; + UI32_T ecce : 1; + UI32_T : 1; + UI32_T ch : 1; + UI32_T hwo : 1; +} HAL_TAU_PKT_TX_GPD_T; + +#else +#error "Host GPD endian is not defined\n" +#endif + +/* ----------------------------------------------------------------------------------- PP Type */ +typedef enum +{ + HAL_TAU_PKT_TMH_TYPE_ITMH_ETH = 0, + HAL_TAU_PKT_TMH_TYPE_ITMH_FAB, + HAL_TAU_PKT_TMH_TYPE_ETMH_FAB, + HAL_TAU_PKT_TMH_TYPE_ETMH_ETH, + HAL_TAU_PKT_TMH_TYPE_LAST + +} HAL_TAU_PKT_TMH_TYPE_T; + +typedef enum +{ + HAL_TAU_PKT_TMH_SRV_L2 = 0, + HAL_TAU_PKT_TMH_SRV_L25_MPLS, + HAL_TAU_PKT_TMH_SRV_L3, + HAL_TAU_PKT_TMH_SRV_EGR, /* L3 downgrade L2 */ + HAL_TAU_PKT_TMH_SRV_L25_NSH, + HAL_TAU_PKT_TMH_SRV_L25_TRILL, + HAL_TAU_PKT_TMH_SRV_LAST + +} HAL_TAU_PKT_TMH_SRV_T; + +typedef enum +{ + HAL_TAU_PKT_TMH_DECAP_NONE = 0, + HAL_TAU_PKT_TMH_DECAP_1_MPLS_LABEL, + HAL_TAU_PKT_TMH_DECAP_2_MPLS_LABEL, + HAL_TAU_PKT_TMH_DECAP_3_MPLS_LABEL, + HAL_TAU_PKT_TMH_DECAP_4_MPLS_LABEL, + HAL_TAU_PKT_TMH_DECAP_IP_TRILL_NSH, + HAL_TAU_PKT_TMH_DECAP_LAST + +} HAL_TAU_PKT_TMH_DECAP_T; + +typedef struct +{ + union + { + HAL_TAU_PKT_ITMH_ETH_T itmh_eth; + HAL_TAU_PKT_ETMH_FAB_T etmh_fab; + HAL_TAU_PKT_ETMH_ETH_T etmh_eth; + }; +} HAL_TAU_PKT_TMH_T; + +typedef struct +{ + union + { + HAL_TAU_PKT_PPH_L2_T pph_l2; + HAL_TAU_PKT_PPH_L3UC_T pph_l3uc; + HAL_TAU_PKT_PPH_L3MC_T pph_l3mc; + HAL_TAU_PKT_PPH_L25_T pph_l25; + }; +} HAL_TAU_PKT_PPH_T; + +/* ----------------------------------------------------------------------------------- Reg Type */ +typedef enum +{ + HAL_TAU_PKT_L2_ISR_RCH0 = (0x1 << 0), + HAL_TAU_PKT_L2_ISR_RCH1 = (0x1 << 1), + HAL_TAU_PKT_L2_ISR_RCH2 = (0x1 << 2), + HAL_TAU_PKT_L2_ISR_RCH3 = (0x1 << 3), + HAL_TAU_PKT_L2_ISR_TCH0 = (0x1 << 4), + HAL_TAU_PKT_L2_ISR_TCH1 = (0x1 << 5), + HAL_TAU_PKT_L2_ISR_TCH2 = (0x1 << 6), + HAL_TAU_PKT_L2_ISR_TCH3 = (0x1 << 7), + HAL_TAU_PKT_L2_ISR_RX_QID_MAP_ERR = (0x1 << 8), + HAL_TAU_PKT_L2_ISR_RX_FRAME_ERR = (0x1 << 9) + +} HAL_TAU_PKT_L2_ISR_T; + +typedef enum +{ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_HWO_ERROR = (0x1 << 0), /* Tx GPD.hwo = 0 */ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_CHKSM_ERROR = (0x1 << 1), /* Tx GPD.chksm is error */ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_NO_OVFL_ERROR = (0x1 << 2), /* S/W push too much GPD */ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_DMA_READ_ERROR = (0x1 << 3), /* AXI Rd Error when do GPD read */ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_BUF_SIZE_ERROR = (0x1 << 4), /* Tx GPD.data_buf_size = 0 */ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_RUNT_ERROR = (0x1 << 5), /* Tx GPD.pkt_len < 64 */ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_OVSZ_ERROR = (0x1 << 6), /* Tx GPD.pkt_len = 9217 */ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_LEN_MISMATCH_ERROR = (0x1 << 7), /* Tx GPD.pkt_len != sum of data_buf_size */ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_PKTPL_DMA_READ_ERROR = (0x1 << 8), /* AXI Rd Error when do Payload read */ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_COS_ERROR = (0x1 << 9), /* Tx GPD.cos is not match cos_to_tch_map */ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_GPD_GT255_ERROR = (0x1 << 10), /* Multi-GPD packet's GPD# > 255 */ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_PFC = (0x1 << 11), /* */ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_CREDIT_UDFL_ERROR = (0x1 << 12), /* Credit Underflow (count down to 0) */ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_DMA_WRITE_ERROR = (0x1 << 13), /* AXI Wr Error (GPD Write-Back) */ + HAL_TAU_PKT_TX_CHANNEL_L2_ISR_STOP_CMD_CPLT = (0x1 << 14) + +} HAL_TAU_PKT_TX_CHANNEL_L2_ISR_T; + +typedef enum +{ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_LOW = (0x1 << 0), /* Rx GPD.avbl_gpd_num < threshold */ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_EMPTY = (0x1 << 1), /* Rx GPD.avbl_gpd_num = 0 */ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_AVAIL_GPD_ERROR = (0x1 << 2), /* Rx GPD.hwo = 0 */ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_GPD_CHKSM_ERROR = (0x1 << 3), /* Rx GPD.chksm is error */ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_DMA_READ_ERROR = (0x1 << 4), /* DMAR error occurs in PCIE */ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_DMA_WRITE_ERROR = (0x1 << 5), /* DMAW error occurs in PCIE */ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_STOP_CMD_CPLT = (0x1 << 6), /* Stop Completion Acknowledge */ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_GPD_GT255_ERROR = (0x1 << 7), /* Multi-GPD packet's GPD# > 255 */ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_TOD_UNINIT = (0x1 << 8), /* */ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_PKT_ERROR_DROP = (0x1 << 9), /* */ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_UDSZ_DROP = (0x1 << 10), /* */ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_OVSZ_DROP = (0x1 << 11), /* */ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_CMDQ_OVF_DROP = (0x1 << 12), /* */ + HAL_TAU_PKT_RX_CHANNEL_L2_ISR_FIFO_OVF_DROP = (0x1 << 13) + +} HAL_TAU_PKT_RX_CHANNEL_L2_ISR_T; + +typedef enum +{ + HAL_TAU_PKT_TX_CHANNEL_CFG_IOC = (0x1 << 0), + HAL_TAU_PKT_TX_CHANNEL_CFG_CHKSUM = (0x1 << 1), + HAL_TAU_PKT_TX_CHANNEL_CFG_PFC = (0x1 << 2), + HAL_TAU_PKT_TX_CHANNEL_CFG_PKT_LEN_CHK = (0x1 << 3), + HAL_TAU_PKT_TX_CHANNEL_CFG_EARLY_DONE_IRQ = (0x1 << 4), + HAL_TAU_PKT_TX_CHANNEL_CFG_CHK_COS = (0x1 << 5), + HAL_TAU_PKT_TX_CHANNEL_CFG_ADV_GPD_WRBK = (0x1 << 6), + HAL_TAU_PKT_TX_CHANNEL_CFG_GPD_WRBK_FULL_PKT_LEN = (0x1 << 7), + HAL_TAU_PKT_TX_CHANNEL_CFG_LAST = (0x1 << 8) + +} HAL_TAU_PKT_TX_CHANNEL_CFG_T; + +typedef enum +{ + HAL_TAU_PKT_RX_CHANNEL_CFG_IOC = (0x1 << 0), + HAL_TAU_PKT_RX_CHANNEL_CFG_CHKSUM = (0x1 << 1), + HAL_TAU_PKT_RX_CHANNEL_CFG_LAST = (0x1 << 2) + +} HAL_TAU_PKT_RX_CHANNEL_CFG_T; + +/* ----------------------------------------------------------------------------------- Tx */ +typedef enum +{ + HAL_TAU_PKT_TX_CHANNEL_0 = 0, + HAL_TAU_PKT_TX_CHANNEL_1, + HAL_TAU_PKT_TX_CHANNEL_2, + HAL_TAU_PKT_TX_CHANNEL_3, + HAL_TAU_PKT_TX_CHANNEL_LAST + +} HAL_TAU_PKT_TX_CHANNEL_T; + +typedef void +(*HAL_TAU_PKT_TX_FUNC_T)( + const UI32_T unit, + const void *ptr_sw_gpd, /* SW-GPD to be processed */ + void *ptr_coockie); /* Private data of SDK */ + +typedef struct HAL_TAU_PKT_TX_SW_GPD_S +{ + HAL_TAU_PKT_TX_FUNC_T callback; /* (unit, ptr_sw_gpd, ptr_cookie) */ + void *ptr_cookie; /* Pointer of NPS_PKT_TX_PKT_T */ + HAL_TAU_PKT_TX_GPD_T tx_gpd; + UI32_T gpd_num; + struct HAL_TAU_PKT_TX_SW_GPD_S *ptr_next; + +#if defined (NPS_EN_NETIF) + UI32_T channel; /* For counter */ +#endif + +} HAL_TAU_PKT_TX_SW_GPD_T; + +typedef struct +{ + UI32_T send_ok; + UI32_T gpd_empty; + UI32_T poll_timeout; + + /* queue */ + UI32_T enque_ok; + UI32_T enque_retry; + + /* event */ + UI32_T trig_event; + + /* normal interrupt */ + UI32_T tx_done; + + /* abnormal interrupt */ + UI32_T gpd_hwo_err; /* bit-0 */ + UI32_T gpd_chksm_err; /* bit-1 */ + UI32_T gpd_no_ovfl_err; /* bit-2 */ + UI32_T gpd_dma_read_err; /* bit-3 */ + UI32_T buf_size_err; /* bit-4 */ + UI32_T runt_err; /* bit-5 */ + UI32_T ovsz_err; /* bit-6 */ + UI32_T len_mismatch_err; /* bit-7 */ + UI32_T pktpl_dma_read_err; /* bit-8 */ + UI32_T cos_err; /* bit-9 */ + UI32_T gpd_gt255_err; /* bit-10 */ + UI32_T pfc; /* bit-11 */ + UI32_T credit_udfl_err; /* bit-12 */ + UI32_T dma_write_err; /* bit-13 */ + UI32_T sw_issue_stop; /* bit-14 */ + + /* others */ + UI32_T err_recover; + UI32_T ecc_err; + +} HAL_TAU_PKT_TX_CHANNEL_CNT_T; + +typedef struct +{ + HAL_TAU_PKT_TX_CHANNEL_CNT_T channel[HAL_TAU_PKT_TX_CHANNEL_LAST]; + UI32_T invoke_gpd_callback; + UI32_T no_memory; + + /* queue */ + UI32_T deque_ok; + UI32_T deque_fail; + + /* event */ + UI32_T wait_event; + +} HAL_TAU_PKT_TX_CNT_T; + +/* ----------------------------------------------------------------------------------- Rx */ +typedef enum +{ + HAL_TAU_PKT_RX_CHANNEL_0 = 0, + HAL_TAU_PKT_RX_CHANNEL_1, + HAL_TAU_PKT_RX_CHANNEL_2, + HAL_TAU_PKT_RX_CHANNEL_3, + HAL_TAU_PKT_RX_CHANNEL_LAST +} HAL_TAU_PKT_RX_CHANNEL_T; + +typedef enum +{ + HAL_TAU_PKT_C_NEXT = 0, /* callback continuous */ + HAL_TAU_PKT_C_STOP = 1, + HAL_TAU_PKT_C_OTHERS = 2 +} HAL_TAU_PKT_CALLBACK_NO_T; + +typedef enum +{ + HAL_TAU_PKT_RX_CALLBACK_ACTION_INSERT = 0, + HAL_TAU_PKT_RX_CALLBACK_ACTION_APPEND = 1, + HAL_TAU_PKT_RX_CALLBACK_ACTION_DELETE = 2, + HAL_TAU_PKT_RX_CALLBACK_ACTION_DELETE_ALL = 3 +} HAL_TAU_PKT_RX_CALLBACK_ACTION_T; + +typedef HAL_TAU_PKT_CALLBACK_NO_T +(*HAL_TAU_PKT_RX_FUNC_T)( + const UI32_T unit, + const void *ptr_sw_gpd, /* SW-GPD to be processed */ + void *ptr_cookie); /* Private data of SDK */ + +typedef struct HAL_TAU_PKT_RX_CALLBACK_S +{ + HAL_TAU_PKT_RX_FUNC_T callback; /* (unit, ptr_sw_gpd, ptr_cookie) */ + void *ptr_cookie; + struct HAL_TAU_PKT_RX_CALLBACK_S *ptr_next; +} HAL_TAU_PKT_RX_CALLBACK_T; + +typedef struct HAL_TAU_PKT_RX_SW_GPD_S +{ + BOOL_T rx_complete; /* FALSE when PDMA error occurs */ + HAL_TAU_PKT_RX_GPD_T rx_gpd; + struct HAL_TAU_PKT_RX_SW_GPD_S *ptr_next; + +#if defined (NPS_EN_NETIF) + void *ptr_cookie; /* Pointer of virt-addr */ +#endif + +} HAL_TAU_PKT_RX_SW_GPD_T; + +typedef struct +{ + /* queue */ + UI32_T enque_ok; + UI32_T enque_retry; + UI32_T deque_ok; + UI32_T deque_fail; + + /* event */ + UI32_T trig_event; + + /* normal interrupt */ + UI32_T rx_done; + + /* abnormal interrupt */ + UI32_T avbl_gpd_low; /* bit-0 */ + UI32_T avbl_gpd_empty; /* bit-1 */ + UI32_T avbl_gpd_err; /* bit-2 */ + UI32_T gpd_chksm_err; /* bit-3 */ + UI32_T dma_read_err; /* bit-4 */ + UI32_T dma_write_err; /* bit-5 */ + UI32_T sw_issue_stop; /* bit-6 */ + UI32_T gpd_gt255_err; /* bit-7 */ + UI32_T tod_uninit; /* bit-8 */ + UI32_T pkt_err_drop; /* bit-9 */ + UI32_T udsz_drop; /* bit-10 */ + UI32_T ovsz_drop; /* bit-11 */ + UI32_T cmdq_ovf_drop; /* bit-12 */ + UI32_T fifo_ovf_drop; /* bit-13 */ + + /* others */ + UI32_T err_recover; + UI32_T ecc_err; + +#if defined (NPS_EN_NETIF) + /* it means that user doesn't create intf on that port */ + UI32_T netdev_miss; +#endif + + +} HAL_TAU_PKT_RX_CHANNEL_CNT_T; + +typedef struct +{ + HAL_TAU_PKT_RX_CHANNEL_CNT_T channel[HAL_TAU_PKT_RX_CHANNEL_LAST]; + UI32_T invoke_gpd_callback; + UI32_T no_memory; + + /* event */ + UI32_T wait_event; + +} HAL_TAU_PKT_RX_CNT_T; + +/* ----------------------------------------------------------------------------------- Reg */ +#if defined(NPS_EN_LITTLE_ENDIAN) + +typedef union +{ + UI32_T reg; + struct + { + UI32_T tch_axlen_cfg : 3; + UI32_T : 5; + UI32_T tch_axi_free_arvalid : 1; + UI32_T : 7; + UI32_T tch_arvalid_thrhold_cfg : 2; + UI32_T : 6; + UI32_T tch_rready_low_4_hdr : 1; + UI32_T tch_ios_crdt_add_en : 1; + UI32_T : 6; + } field; +} HAL_TAU_PKT_AXI_LEN_CFG_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T pdma_lbk_en : 1; + UI32_T : 3; + UI32_T pdma_lbk_plane : 2; + UI32_T : 2; + UI32_T pm_lbk_en : 1; + UI32_T : 7; + UI32_T pm_lbk_rqid : 6; + UI32_T : 2; + UI32_T : 8; + } field; +} HAL_TAU_PKT_LBK_CTRL_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T pdma_lbk_rqid0 : 6; + UI32_T : 2; + UI32_T pdma_lbk_rqid1 : 6; + UI32_T : 2; + UI32_T pdma_lbk_rqid2 : 6; + UI32_T : 2; + UI32_T pdma_lbk_rqid3 : 6; + UI32_T : 2; + } field; +} HAL_TAU_PKT_LBK_RQID0_3_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T pdma_lbk_rqid4 : 6; + UI32_T : 2; + UI32_T pdma_lbk_rqid5 : 6; + UI32_T : 2; + UI32_T pdma_lbk_rqid6 : 6; + UI32_T : 2; + UI32_T pdma_lbk_rqid7 : 6; + UI32_T : 2; + } field; +} HAL_TAU_PKT_LBK_RQID4_7_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T cos_pfc_sts0 : 8; + UI32_T cos_pfc_sts1 : 8; + UI32_T cos_pfc_sts2 : 8; + UI32_T cos_pfc_sts3 : 8; + } field; +} HAL_TAU_PKT_COS_PFC_STS_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T pdma_ela_en : 1; + UI32_T : 7; + UI32_T pdma_ela_valid_sel : 8; + UI32_T : 8; + UI32_T : 8; + } field; +} HAL_TAU_PKT_ELA_CTRL_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T pdma_ela_word0_sel : 8; + UI32_T pdma_ela_word1_sel : 8; + UI32_T pdma_ela_word2_sel : 8; + UI32_T pdma_ela_word3_sel : 8; + } field; +} HAL_TAU_PKT_ELA_SEL_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T ingr_pln_ios_credit_base_size_lo : 8; + UI32_T ingr_pln_ios_credit_base_size_hi : 8; + UI32_T ingr_pln_ios_credit_set : 1; + UI32_T : 7; + UI32_T : 1; + UI32_T ingr_pln_full_pkt_mode : 1; + UI32_T : 6; + } field; +} HAL_TAU_PKT_IGR_PLN_CREDIT_CFG_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T ingr_pln_cur_ios_credit_lo : 8; + UI32_T ingr_pln_cur_ios_credit_hi : 8; + UI32_T ingr_pln_ios_credit_ovfl : 1; + UI32_T ingr_pln_ios_credit_udfl : 1; + UI32_T : 6; + UI32_T : 8; + } field; +} HAL_TAU_PKT_IGR_PLN_CREDIT_STS_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T ingr_pln_ios_credit_rdy_lo_bound : 8; + UI32_T ingr_pln_ios_credit_rdy_hi_bound : 8; + UI32_T : 8; + UI32_T : 8; + } field; +} HAL_TAU_PKT_IGR_PLN_CREDIT_THR_REG_T; + + +typedef union +{ + UI32_T reg; + struct + { + UI32_T rch_stomp_crc_en : 1; + UI32_T : 7; + UI32_T rch_crc_regen_en : 1; + UI32_T : 7; + UI32_T rch_pfc_fun_en : 1; + UI32_T : 7; + UI32_T : 8; + } field; +} HAL_TAU_PKT_RCH_STOMP_CRC_CTRL_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T rch_ioc_en : 1; + UI32_T : 7; + UI32_T rch_chksm_en : 1; + UI32_T : 7; + UI32_T : 8; + UI32_T : 8; + } field; +} HAL_TAU_PKT_RCH_MISC_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T rch_gpd_pfc_lo : 8; + UI32_T rch_gpd_pfc_hi : 8; + UI32_T : 8; + UI32_T : 8; + } field; +} HAL_TAU_PKT_RCH_GPD_PFC_CTRL_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T rch_fifo_pfc_lo_lo : 8; + UI32_T rch_fifo_pfc_lo_hi : 3; + UI32_T : 5; + UI32_T rch_fifo_pfc_hi_lo : 8; + UI32_T rch_fifo_pfc_hi_hi : 3; + UI32_T : 5; + } field; +} HAL_TAU_PKT_RCH_FIFO_PFC_CTRL_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T rch_cmdq_pfc_lo : 5; + UI32_T : 3; + UI32_T rch_cmdq_pfc_hi : 5; + UI32_T : 3; + UI32_T : 8; + UI32_T : 8; + } field; +} HAL_TAU_PKT_RCH_CMDQ_PFC_CTRL_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T rch_start : 1; + UI32_T rch_resume : 1; + UI32_T rch_stop : 1; + UI32_T : 5; + UI32_T : 8; + UI32_T rch_gpd_add_no_lo : 8; + UI32_T rch_gpd_add_no_hi : 8; + } field; +} HAL_TAU_PKT_RCH_CMD_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T rch_fifo_ovf_drop_cnt_clr : 1; + UI32_T rch_cmdq_ovf_drop_cnt_clr : 1; + UI32_T rch_ovsz_drop_cnt_clr : 1; + UI32_T rch_udsz_drop_cnt_clr : 1; + UI32_T rch_pkterr_drop_cnt_clr : 1; + UI32_T rch_flush_cnt_clr : 1; + UI32_T : 2; + UI32_T : 8; + UI32_T : 8; + UI32_T : 8; + } field; +} HAL_TAU_PKT_RCH_CNT_CLR_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T rch_active : 1; + UI32_T rch_avbl_gpd_pfc : 1; + UI32_T rch_fifo_pfc : 1; + UI32_T rch_cmdq_pfc : 1; + UI32_T rch_pfc : 1; + UI32_T : 3; + UI32_T : 8; + UI32_T rch_avbl_gpd_no_lo : 8; + UI32_T rch_avbl_gpd_no_hi : 8; + } field; +} HAL_TAU_PKT_RCH_STATUS_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T tch_ioc_en : 1; + UI32_T tch_chksm_en : 1; + UI32_T tch_pfc_en : 1; + UI32_T tch_pktlen_chk_en : 1; + UI32_T tch_early_done_irq : 1; + UI32_T tch_chk_cos_en : 1; + UI32_T tch_adv_gpd_wrbk : 1; + UI32_T tch_gpd_wrbk_full_pkt_len : 1; + UI32_T : 8; + UI32_T : 8; + UI32_T : 8; + } field; +} HAL_TAU_PKT_TCH_CFG_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T tch_start : 1; + UI32_T tch_resume : 1; + UI32_T tch_stop : 1; + UI32_T : 5; + UI32_T : 8; + UI32_T tch_gpd_add_no_lo : 8; + UI32_T tch_gpd_add_no_hi : 8; + } field; +} HAL_TAU_PKT_TCH_CMD_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T tch_active : 1; + UI32_T tch_pfc : 1; + UI32_T tch_gpd_rd_dma_act : 1; + UI32_T : 5; + UI32_T : 8; + UI32_T tch_avbl_gpd_no : 1; + UI32_T : 7; + UI32_T : 8; + } field; +} HAL_TAU_PKT_TCH_STS_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T tch_gpd_dmar_qos : 4; + UI32_T : 4; + UI32_T tch_pkt_dmar_qos : 4; + UI32_T : 4; + UI32_T tch_gpd_dmaw_qos : 4; + UI32_T : 4; + UI32_T : 8; + } field; +} HAL_TAU_PKT_TCH_QOS_CFG_REG_T; + +#elif defined(NPS_EN_BIG_ENDIAN) + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 6; + UI32_T tch_ios_crdt_add_en : 1; + UI32_T tch_rready_low_4_hdr : 1; + UI32_T : 6; + UI32_T tch_arvalid_thrhold_cfg : 2; + UI32_T : 7; + UI32_T tch_axi_free_arvalid : 1; + UI32_T : 5; + UI32_T tch_axlen_cfg : 3; + } field; +} HAL_TAU_PKT_AXI_LEN_CFG_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 8; + UI32_T : 2; + UI32_T pm_lbk_rqid : 6; + UI32_T : 7; + UI32_T pm_lbk_en : 1; + UI32_T : 2; + UI32_T pdma_lbk_plane : 2; + UI32_T : 3; + UI32_T pdma_lbk_en : 1; + } field; +} HAL_TAU_PKT_LBK_CTRL_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 2; + UI32_T pdma_lbk_rqid3 : 6; + UI32_T : 2; + UI32_T pdma_lbk_rqid2 : 6; + UI32_T : 2; + UI32_T pdma_lbk_rqid1 : 6; + UI32_T : 2; + UI32_T pdma_lbk_rqid0 : 6; + } field; +} HAL_TAU_PKT_LBK_RQID0_3_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 2; + UI32_T pdma_lbk_rqid7 : 6; + UI32_T : 2; + UI32_T pdma_lbk_rqid6 : 6; + UI32_T : 2; + UI32_T pdma_lbk_rqid5 : 6; + UI32_T : 2; + UI32_T pdma_lbk_rqid4 : 6; + } field; +} HAL_TAU_PKT_LBK_RQID4_7_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T cos_pfc_sts3 : 8; + UI32_T cos_pfc_sts2 : 8; + UI32_T cos_pfc_sts1 : 8; + UI32_T cos_pfc_sts0 : 8; + } field; +} HAL_TAU_PKT_COS_PFC_STS_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 8; + UI32_T : 8; + UI32_T pdma_ela_valid_sel : 8; + UI32_T : 7; + UI32_T pdma_ela_en : 1; + } field; +} HAL_TAU_PKT_ELA_CTRL_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T pdma_ela_word3_sel : 8; + UI32_T pdma_ela_word2_sel : 8; + UI32_T pdma_ela_word1_sel : 8; + UI32_T pdma_ela_word0_sel : 8; + } field; +} HAL_TAU_PKT_ELA_SEL_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 6; + UI32_T ingr_pln_full_pkt_mode : 1; + UI32_T : 1; + UI32_T : 7; + UI32_T ingr_pln_ios_credit_set : 1; + UI32_T ingr_pln_ios_credit_base_size_hi : 8; + UI32_T ingr_pln_ios_credit_base_size_lo : 8; + } field; +} HAL_TAU_PKT_IGR_PLN_CREDIT_CFG_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 8; + UI32_T : 6; + UI32_T ingr_pln_ios_credit_udfl : 1; + UI32_T ingr_pln_ios_credit_ovfl : 1; + UI32_T ingr_pln_cur_ios_credit_hi : 8; + UI32_T ingr_pln_cur_ios_credit_lo : 8; + } field; +} HAL_TAU_PKT_IGR_PLN_CREDIT_STS_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 8; + UI32_T : 8; + UI32_T ingr_pln_ios_credit_rdy_hi_bound : 8; + UI32_T ingr_pln_ios_credit_rdy_lo_bound : 8; + } field; +} HAL_TAU_PKT_IGR_PLN_CREDIT_THR_REG_T; + + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 8; + UI32_T : 7; + UI32_T rch_pfc_fun_en : 1; + UI32_T : 7; + UI32_T rch_crc_regen_en : 1; + UI32_T : 7; + UI32_T rch_stomp_crc_en : 1; + } field; +} HAL_TAU_PKT_RCH_STOMP_CRC_CTRL_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 8; + UI32_T : 8; + UI32_T : 7; + UI32_T rch_chksm_en : 1; + UI32_T : 7; + UI32_T rch_ioc_en : 1; + } field; +} HAL_TAU_PKT_RCH_MISC_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 8; + UI32_T : 8; + UI32_T rch_gpd_pfc_hi : 8; + UI32_T rch_gpd_pfc_lo : 8; + } field; +} HAL_TAU_PKT_RCH_GPD_PFC_CTRL_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 5; + UI32_T rch_fifo_pfc_hi_hi : 3; + UI32_T rch_fifo_pfc_hi_lo : 8; + UI32_T : 5; + UI32_T rch_fifo_pfc_lo_hi : 3; + UI32_T rch_fifo_pfc_lo_lo : 8; + } field; +} HAL_TAU_PKT_RCH_FIFO_PFC_CTRL_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 8; + UI32_T : 8; + UI32_T : 3; + UI32_T rch_cmdq_pfc_hi : 5; + UI32_T : 3; + UI32_T rch_cmdq_pfc_lo : 5; + } field; +} HAL_TAU_PKT_RCH_CMDQ_PFC_CTRL_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T rch_gpd_add_no_hi : 8; + UI32_T rch_gpd_add_no_lo : 8; + UI32_T : 8; + UI32_T : 5; + UI32_T rch_stop : 1; + UI32_T rch_resume : 1; + UI32_T rch_start : 1; + } field; +} HAL_TAU_PKT_RCH_CMD_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 8; + UI32_T : 8; + UI32_T : 8; + UI32_T : 2; + UI32_T rch_flush_cnt_clr : 1; + UI32_T rch_pkterr_drop_cnt_clr : 1; + UI32_T rch_udsz_drop_cnt_clr : 1; + UI32_T rch_ovsz_drop_cnt_clr : 1; + UI32_T rch_cmdq_ovf_drop_cnt_clr : 1; + UI32_T rch_fifo_ovf_drop_cnt_clr : 1; + } field; +} HAL_TAU_PKT_RCH_CNT_CLR_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T rch_avbl_gpd_no_hi : 8; + UI32_T rch_avbl_gpd_no_lo : 8; + UI32_T : 8; + UI32_T : 3; + UI32_T rch_pfc : 1; + UI32_T rch_cmdq_pfc : 1; + UI32_T rch_fifo_pfc : 1; + UI32_T rch_avbl_gpd_pfc : 1; + UI32_T rch_active : 1; + } field; +} HAL_TAU_PKT_RCH_STATUS_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 8; + UI32_T : 8; + UI32_T : 8; + UI32_T tch_gpd_wrbk_full_pkt_len : 1; + UI32_T tch_adv_gpd_wrbk : 1; + UI32_T tch_chk_cos_en : 1; + UI32_T tch_early_done_irq : 1; + UI32_T tch_pktlen_chk_en : 1; + UI32_T tch_pfc_en : 1; + UI32_T tch_chksm_en : 1; + UI32_T tch_ioc_en : 1; + } field; +} HAL_TAU_PKT_TCH_CFG_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T tch_gpd_add_no_hi : 8; + UI32_T tch_gpd_add_no_lo : 8; + UI32_T : 8; + UI32_T : 5; + UI32_T tch_stop : 1; + UI32_T tch_resume : 1; + UI32_T tch_start : 1; + } field; +} HAL_TAU_PKT_TCH_CMD_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 8; + UI32_T : 7; + UI32_T tch_avbl_gpd_no : 1; + UI32_T : 8; + UI32_T : 5; + UI32_T tch_gpd_rd_dma_act : 1; + UI32_T tch_pfc : 1; + UI32_T tch_active : 1; + } field; +} HAL_TAU_PKT_TCH_STS_REG_T; + +typedef union +{ + UI32_T reg; + struct + { + UI32_T : 8; + UI32_T : 4; + UI32_T tch_gpd_dmaw_qos : 4; + UI32_T : 4; + UI32_T tch_pkt_dmar_qos : 4; + UI32_T : 4; + UI32_T tch_gpd_dmar_qos : 4; + } field; +} HAL_TAU_PKT_TCH_QOS_CFG_REG_T; + +#else +#error "Host GPD endian is not defined\n" +#endif + +/* ----------------------------------------------------------------------------------- NPS_EN_NETIF */ +#if defined (NPS_EN_NETIF) +#define HAL_TAU_PKT_DRIVER_MAJOR_NUM (10) +#define HAL_TAU_PKT_DRIVER_MINOR_NUM (252) /* DO NOT use MISC_DYNAMIC_MINOR */ +#define HAL_TAU_PKT_DRIVER_NAME "nps_netif" +#define HAL_TAU_PKT_DRIVER_PATH "/dev/"HAL_TAU_PKT_DRIVER_NAME + +/* These requirements come from NPS_NETIF APIs. + * nps_netif -> hal_pkt_drv -> hal_pkt_knl + */ + +typedef struct +{ + UI32_T tx_pkt; + UI32_T tx_queue_full; + UI32_T tx_error; + UI32_T rx_pkt; + +} HAL_TAU_PKT_NETIF_INTF_CNT_T; + +typedef struct +{ + /* unique key */ + UI32_T id; + C8_T name[NPS_NETIF_NAME_LEN]; + UI32_T port; /* only support unit port and local port */ + + /* metadata */ + UI8_T mac[6]; + +#define HAL_TAU_PKT_NETIF_INTF_FLAGS_MAC (1 << 0) + UI32_T flags; + + +} HAL_TAU_PKT_NETIF_INTF_T; + +typedef struct +{ + /* unique key */ + UI32_T id; + C8_T name[NPS_NETIF_NAME_LEN]; + UI32_T priority; + + /* match fields */ + UI32_T port; /* only support unit port and local port */ + HAL_TAU_PKT_RX_REASON_BITMAP_T reason_bitmap; + UI8_T pattern[NPS_NETIF_PROFILE_PATTERN_NUM][NPS_NETIF_PROFILE_PATTERN_LEN]; + UI8_T mask[NPS_NETIF_PROFILE_PATTERN_NUM][NPS_NETIF_PROFILE_PATTERN_LEN]; + UI32_T offset[NPS_NETIF_PROFILE_PATTERN_NUM]; + + /* for each flag 1:must hit, 0:don't care */ +#define HAL_TAU_PKT_NETIF_PROFILE_FLAGS_PORT (1 << 0) +#define HAL_TAU_PKT_NETIF_PROFILE_FLAGS_REASON (1 << 1) +#define HAL_TAU_PKT_NETIF_PROFILE_FLAGS_PATTERN_0 (1 << 2) +#define HAL_TAU_PKT_NETIF_PROFILE_FLAGS_PATTERN_1 (1 << 3) +#define HAL_TAU_PKT_NETIF_PROFILE_FLAGS_PATTERN_2 (1 << 4) +#define HAL_TAU_PKT_NETIF_PROFILE_FLAGS_PATTERN_3 (1 << 5) + UI32_T flags; + +} HAL_TAU_PKT_NETIF_PROFILE_T; + + +/* These requirements come from NPS_PKT APIs. + * nps_pkt -> hal_pkt_srv -> hal_pkt_drv -> hal_pkt_knl + */ +typedef enum +{ + /* network interface */ + HAL_TAU_PKT_IOCTL_TYPE_CREATE_INTF = 0, + HAL_TAU_PKT_IOCTL_TYPE_DESTROY_INTF, + HAL_TAU_PKT_IOCTL_TYPE_GET_INTF, + HAL_TAU_PKT_IOCTL_TYPE_CREATE_PROFILE, + HAL_TAU_PKT_IOCTL_TYPE_DESTROY_PROFILE, + HAL_TAU_PKT_IOCTL_TYPE_GET_PROFILE, + HAL_TAU_PKT_IOCTL_TYPE_GET_INTF_CNT, + HAL_TAU_PKT_IOCTL_TYPE_CLEAR_INTF_CNT, + /* driver */ + HAL_TAU_PKT_IOCTL_TYPE_WAIT_RX_FREE, + HAL_TAU_PKT_IOCTL_TYPE_WAIT_TX_FREE, /* waitTxFree(ASYNC) */ + HAL_TAU_PKT_IOCTL_TYPE_SET_RX_CFG, /* setRxConfig */ + HAL_TAU_PKT_IOCTL_TYPE_GET_RX_CFG, /* getRxConfig */ + HAL_TAU_PKT_IOCTL_TYPE_DEINIT_TASK, /* deinitTask */ + HAL_TAU_PKT_IOCTL_TYPE_DEINIT_DRV, /* deinitDrv */ + HAL_TAU_PKT_IOCTL_TYPE_INIT_TASK, /* initTask */ + HAL_TAU_PKT_IOCTL_TYPE_INIT_DRV, /* initDrv */ + /* counter */ + HAL_TAU_PKT_IOCTL_TYPE_GET_TX_CNT, + HAL_TAU_PKT_IOCTL_TYPE_GET_RX_CNT, + HAL_TAU_PKT_IOCTL_TYPE_CLEAR_TX_CNT, + HAL_TAU_PKT_IOCTL_TYPE_CLEAR_RX_CNT, + /* port attribute */ + HAL_TAU_PKT_IOCTL_TYPE_SET_PORT_ATTR, + HAL_TAU_PKT_IOCTL_TYPE_LAST + +} HAL_TAU_PKT_IOCTL_TYPE_T; + +typedef enum +{ + HAL_TAU_PKT_IOCTL_RX_TYPE_INIT = 0, + HAL_TAU_PKT_IOCTL_RX_TYPE_DEINIT, + HAL_TAU_PKT_IOCTL_RX_TYPE_LAST, + +} HAL_TAU_PKT_IOCTL_RX_TYPE_T; + +typedef struct +{ + UI32_T unit; + UI32_T channel; + HAL_TAU_PKT_RX_CNT_T rx_cnt; + HAL_TAU_PKT_TX_CNT_T tx_cnt; + NPS_ERROR_NO_T rc; + +} HAL_TAU_PKT_IOCTL_CH_CNT_COOKIE_T; + +typedef struct +{ + UI32_T unit; + HAL_TAU_PKT_NETIF_INTF_T net_intf; /* addIntf[In,Out], delIntf[In] */ + HAL_TAU_PKT_NETIF_PROFILE_T net_profile; /* createProfile[In,Out], destroyProfile[In] */ + HAL_TAU_PKT_NETIF_INTF_CNT_T cnt; + NPS_ERROR_NO_T rc; + +} HAL_TAU_PKT_IOCTL_NETIF_COOKIE_T; + +typedef struct +{ + NPS_ADDR_T callback; /* (unit, ptr_sw_gpd, ptr_cookie) */ + NPS_ADDR_T cookie; /* Pointer of NPS_PKT_TX_PKT_T */ + UI32_T channel; + UI32_T gpd_num; + NPS_ADDR_T hw_gpd_addr; + NPS_ADDR_T sw_gpd_addr; + +} HAL_TAU_PKT_IOCTL_TX_GPD_T; + +typedef struct +{ + UI32_T unit; + UI32_T channel; /* sendGpd[In] */ + NPS_ADDR_T ioctl_gpd_addr; /* sendGpd[In] */ + NPS_ADDR_T done_sw_gpd_addr; /* waitTxFree[Out] */ + +} HAL_TAU_PKT_IOCTL_TX_COOKIE_T; + +typedef struct +{ + BOOL_T rx_complete; /* FALSE when PDMA error occurs */ + NPS_ADDR_T hw_gpd_addr; /* Pointer to HW GPD in user's SW GPD struct */ + NPS_ADDR_T dma_buf_addr; /* Pointer to DMA buffer allocated by the user (virtual) */ + +} HAL_TAU_PKT_IOCTL_RX_GPD_T; + +typedef struct +{ + UI32_T unit; + UI32_T channel; /* getRxCnt[In], clearRxInt[In] */ + NPS_ADDR_T ioctl_gpd_addr; /* waitRxFree[Out] */ + UI32_T buf_len; /* setRxCfg[In] */ + HAL_TAU_PKT_IOCTL_RX_TYPE_T rx_type; /* setRxCfg[In] */ + +} HAL_TAU_PKT_IOCTL_RX_COOKIE_T; + +typedef struct +{ + UI32_T port; + UI32_T status; + UI32_T speed; + +} HAL_TAU_PKT_IOCTL_PORT_COOKIE_T; + +typedef union +{ + UI32_T value; + struct + { + UI32_T unit : 6; /* Maximum unit number is 64. */ + HAL_TAU_PKT_IOCTL_TYPE_T type : 10; /* Maximum 1024 IOCTL types */ + UI32_T rsvd : 16; + } field; + +} HAL_TAU_PKT_IOCTL_CMD_T; + +#endif /* End of NPS_EN_NETIF */ + +NPS_ERROR_NO_T +hal_tau_pkt_sendGpd( + const UI32_T unit, + const HAL_TAU_PKT_TX_CHANNEL_T channel, + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_gpd); + +/*---------------------------------------------------------------------------*/ +/* perf */ +NPS_ERROR_NO_T +hal_tau_pkt_getTxIntrCnt( + const UI32_T unit, + const UI32_T channel, + UI32_T *ptr_intr_cnt); + +NPS_ERROR_NO_T +hal_tau_pkt_getRxIntrCnt( + const UI32_T unit, + const UI32_T channel, + UI32_T *ptr_intr_cnt); + +/* ioctl */ +NPS_ERROR_NO_T +hal_tau_pkt_getTxKnlCnt( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_CH_CNT_COOKIE_T *ptr_cookie); + +NPS_ERROR_NO_T +hal_tau_pkt_getRxKnlCnt( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_CH_CNT_COOKIE_T *ptr_cookie); + +NPS_ERROR_NO_T +hal_tau_pkt_clearTxKnlCnt( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_TX_COOKIE_T *ptr_cookie); + +NPS_ERROR_NO_T +hal_tau_pkt_clearRxKnlCnt( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_RX_COOKIE_T *ptr_cookie); + +NPS_ERROR_NO_T +hal_tau_pkt_setRxKnlConfig( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_RX_COOKIE_T *ptr_cookie); + +NPS_ERROR_NO_T +hal_tau_pkt_getRxKnlConfig( + const UI32_T unit, + HAL_TAU_PKT_IOCTL_RX_COOKIE_T *ptr_cookie); + +/* perf */ +NPS_ERROR_NO_T +hal_tau_pkt_getNetDev( + const UI32_T unit, + const UI32_T port, + struct net_device **pptr_net_dev); + +NPS_ERROR_NO_T +hal_tau_pkt_prepareGpd( + const UI32_T unit, + const NPS_ADDR_T phy_addr, + const UI32_T len, + const UI32_T port, + HAL_TAU_PKT_TX_SW_GPD_T *ptr_sw_gpd); + +#endif /* end of HAL_TAU_PKT_KNL_H */ diff --git a/platform/nephos/nephos-modules/modules/src/inc/netif_osal.h b/platform/nephos/nephos-modules/modules/src/inc/netif_osal.h new file mode 100755 index 00000000000..40c8c9ebc35 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/inc/netif_osal.h @@ -0,0 +1,379 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: netif_osal.h + * PURPOSE: + * It provide customer linux API. + * NOTES: + */ + +#ifndef NETIF_OSAL_H +#define NETIF_OSAL_H + +/* + * ENOMEM : 12 - Out of memory + * EFAULT : 14 - Bad address + * EBUSY : 16 - Device or resource busy + * ENODEV : 19 - No such device + * EINVAL : 22 - Invalid argument + + * + * NETDEV_TX_OK : 0x00 + * NETDEV_TX_BUSY : 0x10 + + * + * ETH_HLEN : 14 dmac + smac + etyp + * ETH_ZLEN : 60 minimum ethernet frame size + * ETH_DATA_LEN : 1500 + * ETH_FRAME_LEN : 1514 + * ETH_FCS_LEN : 4 + * + * ETH_P_IP : 0x0800 + * ETH_P_ARP : 0x0806 + * ETH_P_IPV6 : 0x86DD + * ETH_P_SLOW : 0x8809 + * ETH_P_1588 : 0x88F7 + + * + * NET_IP_ALIGN : 2 + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +/* ----------------------------------------------------------------------------------- macro value */ +/* Thread */ +#define OSAL_THREAD_NAME_LEN (16) +#define OSAL_THREAD_DFT_NAME ("Unknown") + +/* Semaphore */ +#define OSAL_SEMA_NAME_LEN (16) +#define OSAL_SEMA_DFT_NAME ("Unknown") + +/* Event */ +#define OSAL_EVENT_NAME_LEN (16) +#define OSAL_EVENT_DFT_NAME ("Unknown") + +/* Spinlock */ +#define OSAL_SPIN_NAME_LEN (16) +#define OSAL_SPIN_DFT_NAME ("Unknown") + +/* Queue */ +#define OSAL_QUEUE_NAME_LEN (16) +#define OSAL_QUEUE_DFT_NAME ("Unknown") + +#define OSAL_PRN_BUF_SZ (256) +#define OSAL_TICKS_PER_SEC (1000000) + +/* ----------------------------------------------------------------------------------- struct */ +typedef struct linux_thread_s +{ + char name[OSAL_THREAD_NAME_LEN + 1]; + struct task_struct *ptr_task; + unsigned int is_stop; + struct linux_thread_s *ptr_prev; + struct linux_thread_s *ptr_next; + +} linux_thread_t; + +typedef struct +{ + char name[OSAL_SEMA_NAME_LEN + 1]; + struct semaphore lock; + +} linux_sema_t; + +typedef struct +{ + char name[OSAL_EVENT_NAME_LEN + 1]; + wait_queue_head_t wait_que; + unsigned int condition; + +} linux_event_t; + +typedef struct +{ + char name[OSAL_SPIN_NAME_LEN + 1]; + spinlock_t spinlock; + +} linux_isrlock_t; + +typedef struct +{ + void *ptr_data; +} linux_queue_entry_t; + +typedef struct +{ + char name[OSAL_QUEUE_NAME_LEN + 1]; + int head; /* index of the queue head entry can be read */ + int tail; /* index of the queue tail entry can be write */ + unsigned int wr_cnt; /* enqueue total count */ + unsigned int rd_cnt; /* dequeue total count */ + unsigned int capacity; /* the queue size */ + linux_queue_entry_t *ptr_entry; /* the queue entry buffer */ + +} linux_queue_t; + +typedef struct +{ + unsigned int size; + dma_addr_t phy_addr; + char data[0]; + +} linux_dma_t; + +/* ----------------------------------------------------------------------------------- function */ +void * +osal_memset( + void *ptr_mem, + const I32_T value, + const UI32_T num); + +void * +osal_memcpy( + void *ptr_dst, + const void *ptr_src, + const UI32_T num); + +UI32_T +osal_strlen( + const C8_T *ptr_str); + +void +osal_printf( + const C8_T *ptr_fmt, + ...); + +void * +osal_alloc( + const UI32_T size); + +void +osal_free( + const void *ptr_mem); + +/* thread */ +NPS_ERROR_NO_T +osal_init(void); + +NPS_ERROR_NO_T +osal_deinit(void); + +NPS_ERROR_NO_T +osal_createThread ( + const C8_T *ptr_thread_name, + const UI32_T stack_size, + const UI32_T priority, + void (function)(void*), + void *ptr_arg, + NPS_THREAD_ID_T *ptr_thread_id); + +NPS_ERROR_NO_T +osal_stopThread( + NPS_THREAD_ID_T *ptr_thread_id); + +NPS_ERROR_NO_T +osal_destroyThread( + NPS_THREAD_ID_T *ptr_thread_id); + +void +osal_initRunThread( + void); + +NPS_ERROR_NO_T +osal_isRunThread( + void); + +void +osal_exitRunThread( + void); + +/* semaphore */ +NPS_ERROR_NO_T +osal_createSemaphore( + const C8_T *ptr_sema_name, + const UI32_T sema_count, + NPS_SEMAPHORE_ID_T *ptr_semaphore_id); + +NPS_ERROR_NO_T +osal_takeSemaphore( + NPS_SEMAPHORE_ID_T *ptr_semaphore_id, + UI32_T time_out); + +NPS_ERROR_NO_T +osal_giveSemaphore( + NPS_SEMAPHORE_ID_T *ptr_semaphore_id); + +NPS_ERROR_NO_T +osal_destroySemaphore( + NPS_SEMAPHORE_ID_T *ptr_semaphore_id); + +/* event */ +NPS_ERROR_NO_T +osal_createEvent( + const C8_T *ptr_event_name, + NPS_SEMAPHORE_ID_T *ptr_event_id); + +NPS_ERROR_NO_T +osal_waitEvent( + NPS_SEMAPHORE_ID_T *ptr_event_id); + +NPS_ERROR_NO_T +osal_triggerEvent( + NPS_SEMAPHORE_ID_T *ptr_event_id); + +NPS_ERROR_NO_T +osal_destroyEvent( + NPS_SEMAPHORE_ID_T *ptr_event_id); + +/* isr_lock */ +NPS_ERROR_NO_T +osal_createIsrLock( + const C8_T *ptr_isrlock_name, + NPS_ISRLOCK_ID_T *ptr_isrlock_id); + +NPS_ERROR_NO_T +osal_takeIsrLock( + NPS_ISRLOCK_ID_T *ptr_isrlock_id, + NPS_IRQ_FLAGS_T *ptr_irq_flags); + +NPS_ERROR_NO_T +osal_giveIsrLock( + NPS_ISRLOCK_ID_T *ptr_isrlock_id, + NPS_IRQ_FLAGS_T *ptr_irq_flags); + +NPS_ERROR_NO_T +osal_destroyIsrLock( + NPS_ISRLOCK_ID_T *ptr_isrlock_id); + +/* timer */ +NPS_ERROR_NO_T +osal_sleepThread( + const UI32_T usecond); + +NPS_ERROR_NO_T +osal_getTime( + NPS_TIME_T *ptr_time); + +/* queue */ +NPS_ERROR_NO_T +osal_que_create( + NPS_HUGE_T *ptr_queue_id, + UI32_T capacity); + +NPS_ERROR_NO_T +osal_que_enque( + NPS_HUGE_T *ptr_queue_id, + void *ptr_data); + +NPS_ERROR_NO_T +osal_que_deque( + NPS_HUGE_T *ptr_queue_id, + void **pptr_data); + +NPS_ERROR_NO_T +osal_que_destroy( + NPS_HUGE_T *ptr_queue_id); + +NPS_ERROR_NO_T +osal_que_getCount( + NPS_HUGE_T *ptr_queue_id, + unsigned int *ptr_count); + +/* IO */ +int +osal_io_copyToUser( + void *ptr_usr_buf, + void *ptr_knl_buf, + unsigned int size); + +int +osal_io_copyFromUser( + void *ptr_knl_buf, + void *ptr_usr_buf, + unsigned int size); + +/* dma */ +void * +osal_dma_alloc( + const UI32_T size); + +NPS_ERROR_NO_T +osal_dma_free( + void *ptr_dma_mem); + +dma_addr_t +osal_dma_convertVirtToPhy( + void *ptr_virt_addr); + +void * +osal_dma_convertPhyToVirt( + const dma_addr_t phy_addr); + +int +osal_dma_flushCache( + void *ptr_virt_addr, + const unsigned int size); + +int +osal_dma_invalidateCache( + void *ptr_virt_addr, + const unsigned int size); + +/* skb */ +struct sk_buff * +osal_skb_alloc( + UI32_T size); + +void +osal_skb_free( + struct sk_buff *ptr_skb); + +dma_addr_t +osal_skb_mapDma( + struct sk_buff *ptr_skb, + enum dma_data_direction dir); + +void +osal_skb_unmapDma( + const dma_addr_t phy_addr, + UI32_T size, + enum dma_data_direction dir); + +void +osal_skb_send( + struct sk_buff *ptr_skb); + +void +osal_skb_recv( + struct sk_buff *ptr_skb); + +#endif /* end of NETIF_OSAL_H */ diff --git a/platform/nephos/nephos-modules/modules/src/inc/netif_perf.h b/platform/nephos/nephos-modules/modules/src/inc/netif_perf.h new file mode 100755 index 00000000000..35596668ba9 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/inc/netif_perf.h @@ -0,0 +1,81 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: netif_perf.h + * PURPOSE: + * It provide customer performance test API. + * NOTES: + */ + +#ifndef NETIF_PERF_H +#define NETIF_PERF_H + +/* #define PERF_EN_TEST */ + +/* FUNCTION NAME: perf_rxCallback + * PURPOSE: + * To count the Rx-gpd for Rx-test. + * INPUT: + * len -- To check if the Rx-gpd length equals to test length. + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successful operation. + * NOTES: + * None + */ +NPS_ERROR_NO_T +perf_rxCallback( + const UI32_T len); + +/* FUNCTION NAME: perf_rxTest + * PURPOSE: + * To check if Rx-test is going. + * INPUT: + * None + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successful operation. + * NOTES: + * None + */ +NPS_ERROR_NO_T +perf_rxTest( + void); + +/* FUNCTION NAME: perf_test + * PURPOSE: + * To do Tx-test or Rx-test. + * INPUT: + * len -- Test length + * tx_channel -- Test Tx channel numbers + * rx_channel -- Test Rx channel numbers + * test_skb -- Test GPD or SKB + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successful operation. + * NOTES: + * None + */ +NPS_ERROR_NO_T +perf_test( + UI32_T len, + UI32_T tx_channel, + UI32_T rx_channel, + BOOL_T test_skb); + +#endif /* end of NETIF_PERF_H */ diff --git a/platform/nephos/nephos-modules/modules/src/inc/nps_cfg.h b/platform/nephos/nephos-modules/modules/src/inc/nps_cfg.h new file mode 100755 index 00000000000..34306344c55 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/inc/nps_cfg.h @@ -0,0 +1,317 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: nps_cfg.h + * PURPOSE: + * Customer configuration on NPS SDK. + * NOTES: + */ + +#ifndef NPS_CFG_H +#define NPS_CFG_H + +/* INCLUDE FILE DECLARATIONS + */ + +#include +#include + + +/* NAMING CONSTANT DECLARATIONS + */ + +/* MACRO FUNCTION DECLARATIONS + */ +#define NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM (16) +#define NPS_CFG_USER_PORT_NUM (96) + +/* DATA TYPE DECLARATIONS + */ +typedef enum +{ + NPS_CFG_TYPE_CHIP_MODE, /* chip operating mode. 0: legacy mode, 1:hybrid mode */ + + NPS_CFG_TYPE_PORT_MAX_SPEED, /* Reference to NPS_PORT_SPEED_XXX */ + NPS_CFG_TYPE_PORT_LANE_NUM, + NPS_CFG_TYPE_PORT_TX_LANE, + NPS_CFG_TYPE_PORT_RX_LANE, + NPS_CFG_TYPE_PORT_TX_POLARITY_REV, + NPS_CFG_TYPE_PORT_RX_POLARITY_REV, + NPS_CFG_TYPE_PORT_EXT_LANE, + NPS_CFG_TYPE_PORT_VALID, + + /* l2 module related configuration */ + NPS_CFG_TYPE_L2_THREAD_PRI, + NPS_CFG_TYPE_L2_THREAD_STACK, /* customize L2 thread stack size in bytes */ + NPS_CFG_TYPE_L2_ADDR_MODE, /* L2 address operation mode. 0: Polling mode, 1: FIFO mode */ + + /* PKT module related configuration */ + NPS_CFG_TYPE_PKT_TX_GPD_NUM, + NPS_CFG_TYPE_PKT_RX_GPD_NUM, + NPS_CFG_TYPE_PKT_RX_SCHED_MODE, /* 0: RR mode, 1: WRR mode */ + NPS_CFG_TYPE_PKT_TX_QUEUE_LEN, + NPS_CFG_TYPE_PKT_RX_QUEUE_LEN, + NPS_CFG_TYPE_PKT_RX_QUEUE_WEIGHT, /* valid while NPS_CFG_TYPE_PKT_RX_SCHED_MODE is 1 + * param0: queue + * param1: NA + * value : weight + */ + NPS_CFG_TYPE_PKT_RX_ISR_THREAD_PRI, + NPS_CFG_TYPE_PKT_RX_ISR_THREAD_STACK, /* customize PKT RX ISR thread stack size in bytes */ + NPS_CFG_TYPE_PKT_RX_FREE_THREAD_PRI, + NPS_CFG_TYPE_PKT_RX_FREE_THREAD_STACK, /* customize PKT RX free thread stack size in bytes */ + NPS_CFG_TYPE_PKT_TX_ISR_THREAD_PRI, + NPS_CFG_TYPE_PKT_TX_ISR_THREAD_STACK, /* customize PKT TX ISR thread stack size in bytes */ + NPS_CFG_TYPE_PKT_TX_FREE_THREAD_PRI, + NPS_CFG_TYPE_PKT_TX_FREE_THREAD_STACK, /* customize PKT TX free thread stack size in bytes */ + NPS_CFG_TYPE_PKT_ERROR_ISR_THREAD_PRI, + NPS_CFG_TYPE_PKT_ERROR_ISR_THREAD_STACK, /* customize PKT ERROR ISR thread stack size in bytes */ + + /* STAT module related configuration */ + NPS_CFG_TYPE_CNT_THREAD_PRI, + NPS_CFG_TYPE_CNT_THREAD_STACK, /* customize CNT thread stack size in bytes */ + + /* IFMON module related configuration */ + NPS_CFG_TYPE_IFMON_THREAD_PRI, + NPS_CFG_TYPE_IFMON_THREAD_STACK, /* customize IFMON thread stack size in bytes */ + + /* share memory related configuration */ + NPS_CFG_TYPE_SHARE_MEM_SDN_ENTRY_NUM, /* SDN flow table entry number from share memory */ + NPS_CFG_TYPE_SHARE_MEM_L3_ENTRY_NUM, /* L3 entry number from share memory */ + NPS_CFG_TYPE_SHARE_MEM_L2_ENTRY_NUM, /* L2 entry number from share memory */ + + /* DLB related configuration */ + NPS_CFG_TYPE_DLB_MONITOR_MODE, /* DLB monitor mode. 1: async, 0: sync */ + NPS_CFG_TYPE_DLB_LAG_MONITOR_THREAD_PRI, + NPS_CFG_TYPE_DLB_LAG_MONITOR_THREAD_SLEEP_TIME, + NPS_CFG_TYPE_DLB_L3_MONITOR_THREAD_PRI, + NPS_CFG_TYPE_DLB_L3_MONITOR_THREAD_SLEEP_TIME, + NPS_CFG_TYPE_DLB_L3_INTR_THREAD_PRI, + NPS_CFG_TYPE_DLB_NVO3_MONITOR_THREAD_PRI, + NPS_CFG_TYPE_DLB_NVO3_MONITOR_THREAD_SLEEP_TIME, + NPS_CFG_TYPE_DLB_NVO3_INTR_THREAD_PRI, + + /* l3 related configuration */ + NPS_CFG_TYPE_L3_ECMP_MIN_BLOCK_SIZE, + NPS_CFG_TYPE_L3_ECMP_BLOCK_SIZE, + NPS_CFG_TYPE_TCAM_L3_WITH_IPV6_PREFIX_128_REGION_ENTRY_NUM, + NPS_CFG_TYPE_TCAM_L3_WITH_IPV6_PREFIX_64_REGION_ENTRY_NUM, + + /* share memory related configuration */ + NPS_CFG_TYPE_HASH_L2_FDB_REGION_ENTRY_NUM, + NPS_CFG_TYPE_HASH_L2_GROUP_REGION_ENTRY_NUM, + NPS_CFG_TYPE_HASH_SECURITY_REGION_ENTRY_NUM, + NPS_CFG_TYPE_HASH_L3_WITH_IPV6_PREFIX_128_REGION_ENTRY_NUM, + NPS_CFG_TYPE_HASH_L3_WITH_IPV6_PREFIX_64_REGION_ENTRY_NUM, + NPS_CFG_TYPE_HASH_L3_WITHOUT_PREFIX_REGION_ENTRY_NUM, + NPS_CFG_TYPE_HASH_L3_RPF_REGION_ENTRY_NUM, + NPS_CFG_TYPE_HASH_FLOW_REGION_ENTRY_NUM, + + NPS_CFG_TYPE_PORT_FC_MODE, /* only use to init port TM buffer + * configuration for specific FC mode, + * which not enable/disable FC/PFC + * for the port/pcp. + * param0: port. + * param1: Invalid. + * value : 0, FC disable; + * 1, 802.3x FC; + * 2, PFC. + */ + NPS_CFG_TYPE_PORT_PFC_STATE, /* valid while NPS_CFG_TYPE_PORT_TYPE_FC_MODE + * of the port is PFC. + * param0: port. + * param1: pcp. + * value : 0, PFC disable; + * 1, PFC enable. + */ + NPS_CFG_TYPE_PORT_PFC_QUEUE_STATE, /* valid while NPS_CFG_TYPE_PORT_TYPE_FC_MODE + * of the port is PFC. + * param0: port. + * param1: queue. + * value : 0, PFC disable; + * 1, PFC enable; + */ + NPS_CFG_TYPE_PORT_PFC_MAPPING, /* valid while NPS_CFG_TYPE_PORT_FC_MODE + * of the port is PFC. + * param0: port. + * param1: queue. + * value : PCP bitmap; + * + */ + NPS_CFG_TYPE_TRILL_ENABLE, /* TRILL module related configuration */ + NPS_CFG_TYPE_USE_UNIT_PORT, /* use UNIT_PORT or native port of NPS_PORT_T + * 1 : UNIT_PORT, 0 : native port + */ + NPS_CFG_TYPE_MAC_VLAN_ENABLE, /* use dadicate mac vlan table */ + NPS_CFG_TYPE_CPI_PORT_MODE, /* use to init CPI port working mode. + * param0: CPI port number. + * param1: NA. + * value : 0, CPI mode. + * 1, Ether mode. + */ + NPS_CFG_TYPE_PHY_ADDR, + NPS_CFG_TYPE_LED_CFG, + NPS_CFG_TYPE_USER_BUF_CTRL, + NPS_CFG_TYPE_ARIES_SDP_MODE, /* Select which Aries parser to use + * value: 0, GTP (default) + * 1, PPPOE + * 2, TCP_SPLICING + */ + NPS_CFG_TYPE_FAIR_BUF_CTRL, /* to enable the fairness in flow-control traffic. + * value : 0, disable fairness. + * 1, enable fairness. + */ + NPS_CFG_TYPE_HRM_BUF_SIZE, /* to assign the head room size of port speed. + * param0: Port speed. + * 0, 1G (default) + * 1, 10G + * 2, 25G + * 3, 40G + * 4, 50G + * 5, 100G + * value : cell number. + */ + NPS_CFG_TYPE_STEERING_TRUNCATE_ENABLE, /* set value 0: Do not truncate steering packets. + * set value 1: steering packets will be trucated to 1 cell and + * the cell size is based on chip. + */ + NPS_CFG_TYPE_FABRIC_MODE_ENABLE, /* set value 0: Non-farbic chip mode. (default) + * set value 1: Fabric chip mode. + */ + NPS_CFG_TYPE_ACL_TCP_FLAGS_ENCODE_ENABLE, /* set value 0: Do not encode tcp flags at acl entry. + * (Can only match bit 0-6 of tcp flags.) + * set value 1: Encode tcp flags at acl entry. (default) + */ + NPS_CFG_TYPE_TCAM_ECC_SCAN_ENABLE, /* set value 0: Disable ECC TCAM scanning. (default) + * set value 1: Enable ECC TCAM scanning. + */ + NPS_CFG_TYPE_PORT_BUF_MAX, /* + * Port max buffer threshold and unit is cell count. + * param0: port. + * param1: 0, ingress; + * 1, egress. + * value : 0, disable; + * others, enable max threshold. + */ + NPS_CFG_TYPE_INGRESS_DYNAMIC_BUF, /* + * Queue dynamic alpha setting and value will be + * enlarge to multiple of 256. For example, set value + * as 16 to indicate alpha as 1/16. Set value + * as 256 to indicate alpha as 1. + * param0: port. + * param1: queue (0~7: sc). + * value : alpha * 256. + */ + NPS_CFG_TYPE_EGRESS_DYNAMIC_BUF, /* + * Queue dynamic alpha setting and value will be + * enlarge to multiple of 256. For example, set value + * as 16 to indicate alpha as 1/16. Set value + * as 256 to indicate alpha as 1. + * param0: port. + * param1: queue (0~7: uc, 8~15: mc). + * value : alpha * 256. + */ + + + NPS_CFG_TYPE_DCQCN_ENABLE, /* set value 0: Disable DCQCN. (default) + * set value 1: Enable DCQCN. + */ + + + NPS_CFG_TYPE_LAST + +}NPS_CFG_TYPE_T; + +typedef struct NPS_CFG_VALUE_S +{ + UI32_T param0; /*(Optional) The optional parameter which is available + * when the NPS_CFG_TYPE_T needs the first arguments*/ + UI32_T param1; /*(Optional) The optional parameter which is available + * when the NPS_CFG_TYPE_T needs the second arguments*/ + I32_T value; + +}NPS_CFG_VALUE_T; + +typedef NPS_ERROR_NO_T + (*NPS_CFG_GET_FUNC_T)( + const UI32_T unit, + const NPS_CFG_TYPE_T cfg_type, + NPS_CFG_VALUE_T *ptr_cfg_value); + +typedef NPS_ERROR_NO_T + (*NPS_CFG_GET_LED_FUNC_T) +( + const UI32_T unit, + UI32_T **pptr_led_cfg, + UI32_T *ptr_cfg_size); + +/* EXPORTED SUBPROGRAM SPECIFICATIONS + */ + +/* FUNCTION NAME: nps_cfg_register + * PURPOSE: + * The function is to register NPS_CFG_GET_FUNC to SDK. + * + * INPUT: + * unit -- Device unit number. + * ptr_cfg_callback -- function to get the configuration value. + * + * OUTPUT: + * None + * + * RETURN: + * NPS_E_OK -- Operate success. + * NPS_E_BAD_PARAMETER -- Bad parameter. + * + * NOTES: + * 1. During SDK initializtion, it will call registered NPS_CFG_GET_FUNC to get configuration + * and apply them. + * If No registered NPS_CFG_GET_FUNC or can not get specified NPS_CFG_TYPE_T + * configuration, SDK will apply default setting. + * 2. This function should be called before calling nps_init + */ +NPS_ERROR_NO_T +nps_cfg_register( + const UI32_T unit, + NPS_CFG_GET_FUNC_T ptr_cfg_callback); + +/* FUNCTION NAME: nps_cfg_led_register + * PURPOSE: + * The function is to register NPS_CFG_GET_FUNC to SDK. + * + * INPUT: + * unit -- Device unit number. + * ptr_led_cfg_callback -- function to get LED configuration array. + * + * OUTPUT: + * None + * + * RETURN: + * NPS_E_OK -- Operate success. + * NPS_E_BAD_PARAMETER -- Bad parameter. + * + * NOTES: + * 1. During SDK initializtion, it will call registered NPS_CFG_GET_FUNC to get configuration + * and apply them. + * If No registered NPS_CFG_GET_LED_FUNC or can not get specified external LED cfg + * configuration, SDK will apply default setting. + * 2. This function should be called before calling nps_init + */ +NPS_ERROR_NO_T +nps_cfg_led_register( + const UI32_T unit, + NPS_CFG_GET_LED_FUNC_T ptr_led_cfg_callback); + +#endif /* NPS_CFG_H */ diff --git a/platform/nephos/nephos-modules/modules/src/inc/nps_error.h b/platform/nephos/nephos-modules/modules/src/inc/nps_error.h new file mode 100755 index 00000000000..261878abf3c --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/inc/nps_error.h @@ -0,0 +1,77 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: nps_error.h + * PURPOSE: + * Define the generic error code on NPS SDK. + * NOTES: + */ + +#ifndef NPS_ERROR_H +#define NPS_ERROR_H + +/* INCLUDE FILE DECLARATIONS + */ +#include + + +/* NAMING CONSTANT DECLARATIONS + */ + +/* MACRO FUNCTION DECLARATIONS + */ + +/* DATA TYPE DECLARATIONS + */ + +typedef enum +{ + NPS_E_OK = 0, /* Ok and no error */ + NPS_E_BAD_PARAMETER, /* Parameter is wrong */ + NPS_E_NO_MEMORY, /* No memory is available */ + NPS_E_TABLE_FULL, /* Table is full */ + NPS_E_ENTRY_NOT_FOUND, /* Entry is not found */ + NPS_E_ENTRY_EXISTS, /* Entry already exists */ + NPS_E_NOT_SUPPORT, /* Feature is not supported */ + NPS_E_ALREADY_INITED, /* Module is reinitialized */ + NPS_E_NOT_INITED, /* Module is not initialized */ + NPS_E_OTHERS, /* Other errors */ + NPS_E_ENTRY_IN_USE, /* Entry is in use */ + NPS_E_LAST +} NPS_ERROR_NO_T; + +/* EXPORTED SUBPROGRAM SPECIFICATIONS + */ +/* FUNCTION NAME: nps_error_getString + * PURPOSE: + * To obtain the error string of the specified error code + * + * INPUT: + * cause -- The specified error code + * OUTPUT: + * None + * RETURN: + * Pointer to the target error string + * + * NOTES: + * + * + */ +C8_T * +nps_error_getString( + const NPS_ERROR_NO_T cause ); + +#endif /* NPS_ERROR_H */ + diff --git a/platform/nephos/nephos-modules/modules/src/inc/nps_types.h b/platform/nephos/nephos-modules/modules/src/inc/nps_types.h new file mode 100755 index 00000000000..5630b521404 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/inc/nps_types.h @@ -0,0 +1,308 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: nps_types.h + * PURPOSE: + * Define the commom data type in NPS SDK. + * NOTES: + */ + +#ifndef NPS_TYPES_H +#define NPS_TYPES_H + +/* INCLUDE FILE DECLARATIONS + */ + +#include + +/* NAMING CONSTANT DECLARATIONS + */ + +#define NPS_BIT_OFF 0 +#define NPS_BIT_ON 1 + +#define NPS_PORT_INVALID (0xFFFFFFFF) +#define NPS_SEG_INVALID (0xFFFFFFFF) + +/* for CPU Rx packet, indicate that the packet + * is not received from remote switch + */ +#define NPS_PATH_INVALID (0xFFFFFFFF) + + +#define NPS_SEMAPHORE_BINARY (1) +#define NPS_SEMAPHORE_SYNC (0) +#define NPS_SEMAPHORE_WAIT_FOREVER (0xFFFFFFFF) + +/* MACRO FUNCTION DECLARATIONS + */ +#if defined(NPS_EN_HOST_32_BIT_BIG_ENDIAN) || defined(NPS_EN_HOST_32_BIT_LITTLE_ENDIAN) +typedef unsigned int NPS_HUGE_T; +#elif defined(NPS_EN_HOST_64_BIT_BIG_ENDIAN) || defined(NPS_EN_HOST_64_BIT_LITTLE_ENDIAN) +typedef unsigned long long int NPS_HUGE_T; +#else +#error "The 32bit and 64bit compatible data type are not defined !!" +#endif + +#if defined(NPS_EN_64BIT_ADDR) +typedef unsigned long long int NPS_ADDR_T; +#else +typedef NPS_HUGE_T NPS_ADDR_T; +#endif + +#if defined(NPS_EN_HOST_64_BIT_BIG_ENDIAN) || defined(NPS_EN_HOST_64_BIT_LITTLE_ENDIAN) || defined(NPS_EN_64BIT_ADDR) +#define NPS_ADDR_64_HI(__addr__) ((__addr__) >> 32) +#define NPS_ADDR_64_LOW(__addr__) ((__addr__) & 0xFFFFFFFF) +#define NPS_ADDR_32_TO_64(__hi32__,__low32__) (((unsigned long long int)(__low32__)) | \ + (((unsigned long long int)(__hi32__)) << 32)) +#else +#define NPS_ADDR_64_HI(__addr__) (0) +#define NPS_ADDR_64_LOW(__addr__) (__addr__) +#define NPS_ADDR_32_TO_64(__hi32__,__low32__) (__low32__) +#endif + +#define NPS_BITMAP_SIZE(bit_num) ((((bit_num) - 1) / 32) + 1) +#define NPS_IPV4_IS_MULTICAST(addr) (0xE0000000 == ((addr) & 0xF0000000)) +#define NPS_IPV6_IS_MULTICAST(addr) (0xFF == (((UI8_T *)(addr))[0])) +#define NPS_MAC_IS_MULTICAST(mac) ((mac[0]) & (0x1)) + +/* DATA TYPE DECLARATIONS + */ +typedef UI8_T NPS_BIT_MASK_8_T; +typedef UI16_T NPS_BIT_MASK_16_T; +typedef UI32_T NPS_BIT_MASK_32_T; +typedef UI64_T NPS_BIT_MASK_64_T; + +typedef UI8_T NPS_MAC_T[6]; +typedef UI32_T NPS_IPV4_T; +typedef UI8_T NPS_IPV6_T[16]; + +typedef UI32_T NPS_TIME_T; + +/* Bridge Domain id data type. */ +typedef UI32_T NPS_BRIDGE_DOMAIN_T; + +/* TRILL nickname type. */ +typedef UI16_T NPS_TRILL_NICKNAME_T; + +typedef union NPS_IP_U +{ + + NPS_IPV4_T ipv4_addr; + NPS_IPV6_T ipv6_addr; + +}NPS_IP_T; + +typedef struct NPS_IP_ADDR_S +{ + NPS_IP_T ip_addr; + BOOL_T ipv4 ; +}NPS_IP_ADDR_T; + +/* Tunnel type*/ +typedef enum +{ + NPS_TUNNEL_TYPE_IPV4INIPV4 = 0, /* RFC2003, IPv4-in-IPv4 tunnel */ + NPS_TUNNEL_TYPE_IPV4INIPV6, /* RFC2003, IPv4-in-IPv6 tunnel */ + NPS_TUNNEL_TYPE_IPV6INIPV4, /* RFC2003, IPv6-in-IPv4 tunnel */ + NPS_TUNNEL_TYPE_IPV6INIPV6, /* RFC2003, IPv6-in-IPv6 tunnel */ + NPS_TUNNEL_TYPE_GREIPV4INIPV4, /* RFC2784/RFC2890,GRE IPv4-in-IPv4 tunnel */ + NPS_TUNNEL_TYPE_GREIPV6INIPV4, /* RFC2784/RFC2890,GRE IPv6-in-IPv4 tunnel */ + NPS_TUNNEL_TYPE_GREIPV4INIPV6, /* RFC2784/RFC2890,GRE IPv4-in-IPv6 tunnel */ + NPS_TUNNEL_TYPE_GREIPV6INIPV6, /* RFC2784/RFC2890,GRE IPv6-in-IPv6 tunnel */ + NPS_TUNNEL_TYPE_GRE_NSH, + NPS_TUNNEL_TYPE_6TO4, /* RFC3056, 6to4 tunnel*/ + NPS_TUNNEL_TYPE_ISATAP, /* RFC5214, ISATAP tunnel */ + NPS_TUNNEL_TYPE_NVGRE_L2, + NPS_TUNNEL_TYPE_NVGRE_V4, + NPS_TUNNEL_TYPE_NVGRE_V6, + NPS_TUNNEL_TYPE_NVGRE_NSH, + NPS_TUNNEL_TYPE_VXLAN, + NPS_TUNNEL_TYPE_GTP_V4, + NPS_TUNNEL_TYPE_GTP_V6, + NPS_TUNNEL_TYPE_MPLSINGRE, + NPS_TUNNEL_TYPE_VXLANGPE_L2, + NPS_TUNNEL_TYPE_VXLANGPE_V4, + NPS_TUNNEL_TYPE_VXLANGPE_V6, + NPS_TUNNEL_TYPE_VXLANGPE_NSH, + NPS_TUNNEL_TYPE_FLEX0_L2, + NPS_TUNNEL_TYPE_FLEX0_V4, + NPS_TUNNEL_TYPE_FLEX0_V6, + NPS_TUNNEL_TYPE_FLEX0_NSH, + NPS_TUNNEL_TYPE_FLEX1_L2, + NPS_TUNNEL_TYPE_FLEX1_V4, + NPS_TUNNEL_TYPE_FLEX1_V6, + NPS_TUNNEL_TYPE_FLEX1_NSH, + NPS_TUNNEL_TYPE_FLEX2_L2, + NPS_TUNNEL_TYPE_FLEX2_V4, + NPS_TUNNEL_TYPE_FLEX2_V6, + NPS_TUNNEL_TYPE_FLEX2_NSH, + NPS_TUNNEL_TYPE_FLEX3_L2, + NPS_TUNNEL_TYPE_FLEX3_V4, + NPS_TUNNEL_TYPE_FLEX3_V6, + NPS_TUNNEL_TYPE_FLEX3_NSH, + NPS_TUNNEL_TYPE_LAST +} NPS_TUNNEL_TYPE_T; + +/* tunnel key */ +typedef struct NPS_TUNNEL_KEY_S +{ + NPS_IP_ADDR_T src_ip; /* key: The outer source IP address used by tunnel encapsulation.*/ + NPS_IP_ADDR_T dst_ip; /* key: The outer destination IP address used by tunnel encapsulation. + * For automatic tunnel, this is not required. If not specified, + * its ip address value must be set to 0, but the IP version + * must be same with src_ip. + */ + NPS_TUNNEL_TYPE_T tunnel_type; /*key: The tunnel type.*/ +}NPS_TUNNEL_KEY_T; + +typedef UI16_T NPS_VLAN_T; +typedef UI32_T NPS_PORT_T; + +typedef enum{ + NPS_PORT_TYPE_NORMAL = 0, + NPS_PORT_TYPE_UNIT_PORT, + NPS_PORT_TYPE_LAG, + NPS_PORT_TYPE_VM_ETAG, + NPS_PORT_TYPE_VM_VNTAG, + NPS_PORT_TYPE_VM_VEPA, + NPS_PORT_TYPE_FCOE, + NPS_PORT_TYPE_IP_TUNNEL, + NPS_PORT_TYPE_TRILL, + NPS_PORT_TYPE_MPLS, + NPS_PORT_TYPE_MPLS_PW, + NPS_PORT_TYPE_CPU_PORT, + NPS_PORT_TYPE_SFC, + NPS_PORT_TYPE_LAST +}NPS_PORT_TYPE_T; + +/*support Green/Yellow/Red color*/ +typedef enum +{ + NPS_COLOR_GREEN = 0, + NPS_COLOR_YELLOW, + NPS_COLOR_RED, + NPS_COLOR_LAST +}NPS_COLOR_T; +typedef enum +{ + NPS_FWD_ACTION_FLOOD = 0, + NPS_FWD_ACTION_NORMAL, + NPS_FWD_ACTION_DROP, + NPS_FWD_ACTION_COPY_TO_CPU, + NPS_FWD_ACTION_REDIRECT_TO_CPU, + NPS_FWD_ACTION_FLOOD_COPY_TO_CPU, + NPS_FWD_ACTION_DROP_COPY_TO_CPU, + NPS_FWD_ACTION_LAST +} NPS_FWD_ACTION_T; + +typedef NPS_HUGE_T NPS_THREAD_ID_T; +typedef NPS_HUGE_T NPS_SEMAPHORE_ID_T; +typedef NPS_HUGE_T NPS_ISRLOCK_ID_T; +typedef NPS_HUGE_T NPS_IRQ_FLAGS_T; + +typedef enum +{ + NPS_DIR_INGRESS = 0, + NPS_DIR_EGRESS, + NPS_DIR_BOTH, + NPS_DIR_LAST +}NPS_DIR_T; + +typedef enum +{ + NPS_VLAN_ACTION_SET, + NPS_VLAN_ACTION_KEEP, + NPS_VLAN_ACTION_REMOVE, + NPS_VLAN_ACTION_LAST +} NPS_VLAN_ACTION_T; + +/* VLAN Precedence */ +/* 000 = SUBNET_PROTOCOL_MAC_PORT + * 001 = SUBNET_MAC_PROTOCOL_PORT + * 010 = PROTOCOL_SUBNET_MAC_PORT + * 011 = PROTOCOL_MAC_SUBNET_PORT + * 100 = MAC_SUBNET_PROTOCOL_PORT + * 101 = MAC_PROTOCOL_SUBNET_PORT + */ +typedef enum +{ + NPS_VLAN_PRECEDENCE_SUBNET_MAC_PROTOCOL_PORT = 1, + NPS_VLAN_PRECEDENCE_MAC_SUBNET_PROTOCOL_PORT = 4, + NPS_VLAN_PRECEDENCE_PORT_ONLY = 7, + NPS_VLAN_PRECEDENCE_FAVOR_TYPE = 8, + NPS_VLAN_PRECEDENCE_FAVOR_ADDR = 9, + NPS_VLAN_PRECEDENCE_LAST +} NPS_VLAN_PRECEDENCE_T; + +/* VLAN Tag Type */ +typedef enum +{ + NPS_VLAN_TAG_NONE = 0, /* UnTag */ + NPS_VLAN_TAG_SINGLE_PRI, /* Single Customer/Service Priority Tag */ + NPS_VLAN_TAG_SINGLE, /* Single Customer/Service Tag */ + NPS_VLAN_TAG_DOUBLE_PRI, /* Double Tag with any VID=0 */ + NPS_VLAN_TAG_DOUBLE, /* Double Tag */ + NPS_VLAN_TAG_LAST +} NPS_VLAN_TAG_T; + +typedef struct NPS_BUM_INFO_S +{ + UI32_T mcast_id; + UI32_T group_label; /* l2 da group label */ + UI32_T vid; /* used when FLAGS_ADD_VID is set */ + +#define NPS_BUM_INFO_FLAGS_MCAST_VALID (1 << 0) +#define NPS_BUM_INFO_FLAGS_TO_CPU (1 << 1) +#define NPS_BUM_INFO_FLAGS_ADD_VID (1 << 2) /* single tag to double tag (i.e) QinQ */ +#define NPS_BUM_INFO_FLAGS_TRILL_ALL_TREE (1 << 3) + UI32_T flags; +} NPS_BUM_INFO_T; + +typedef enum +{ + NPS_PHY_TYPE_INTERNAL = 0x0, + NPS_PHY_TYPE_EXTERNAL, + NPS_PHY_TYPE_LAST +} NPS_PHY_TYPE_T; + +typedef enum +{ + NPS_PHY_DEVICE_ADDR_PMA_PMD = 1, + NPS_PHY_DEVICE_ADDR_WIS = 2, + NPS_PHY_DEVICE_ADDR_PCS = 3, + NPS_PHY_DEVICE_ADDR_PHY_XS = 4, + NPS_PHY_DEVICE_ADDR_DTE_XS = 5, + NPS_PHY_DEVICE_ADDR_TC = 6, + NPS_PHY_DEVICE_ADDR_AN = 7, + NPS_PHY_DEVICE_ADDR_VENDOR_1 = 30, + NPS_PHY_DEVICE_ADDR_VENDOR_2 = 31, + NPS_PHY_DEVICE_ADDR_LAST +} NPS_PHY_DEVICE_ADDR_T; + +typedef struct NPS_RANGE_INFO_S +{ + UI32_T min_id; + UI32_T max_id; + UI32_T max_member_cnt; + +#define NPS_RANGE_INFO_FLAGS_MAX_MEMBER_CNT (1 << 0) + UI32_T flags; +} NPS_RANGE_INFO_T; + +/* EXPORTED SUBPROGRAM SPECIFICATIONS + */ + +#endif /* NPS_TYPES_H */ diff --git a/platform/nephos/nephos-modules/modules/src/inc/osal_mdc.h b/platform/nephos/nephos-modules/modules/src/inc/osal_mdc.h new file mode 100755 index 00000000000..47971bb38c8 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/inc/osal_mdc.h @@ -0,0 +1,241 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: osal_mdc.h + * PURPOSE: + * 1. Provide device operate from AML interface + * NOTES: + * + */ + +#ifndef OSAL_MDC_H +#define OSAL_MDC_H + +/* INCLUDE FILE DECLARATIONS */ +#include +#include + +#define OSAL_MDC_DRIVER_NAME "nps_dev" +#define OSAL_MDC_DRIVER_MISC_MAJOR_NUM (10) +#define OSAL_MDC_DRIVER_MISC_MINOR_NUM (250) +#define OSAL_MDC_PCI_BUS_WIDTH (4) + +#define OSAL_MDC_DMA_LIST_SZ_UNLIMITED (0) +#define OSAL_MDC_DMA_LIST_NAME "RSRV_DMA" +#define OSAL_MDC_DMA_SEMAPHORE_NAME "DMALIST" + +/* NAMING CONSTANT DECLARATIONS + */ + +/* linked list node */ +#if defined(NPS_LINUX_KERNEL_MODE) + +typedef struct OSAL_MDC_LIST_NODE_S +{ + void *ptr_data; /* node data */ + struct OSAL_MDC_LIST_NODE_S *ptr_next; /* point to next link node */ + struct OSAL_MDC_LIST_NODE_S *ptr_prev; /* point to previous link node */ +} OSAL_MDC_LIST_NODE_T; + +/* linked list head */ +typedef struct OSAL_MDC_LIST_S +{ + OSAL_MDC_LIST_NODE_T *ptr_head_node; /* linked list head node */ + OSAL_MDC_LIST_NODE_T *ptr_tail_node; /* linked list tail node */ + UI32_T capacity; /* max count of nodes in list + * size=0: the capacity is unlimited. + * size>0: the capacity is limited. + */ + UI32_T node_cnt; /* the count of nodes in the list */ +} OSAL_MDC_LIST_T; + +#endif /* End of defined(NPS_LINUX_KERNEL_MODE) */ + +typedef struct +{ + NPS_ADDR_T phy_addr; + void *ptr_virt_addr; + NPS_ADDR_T size; + +#if defined(NPS_EN_DMA_RESERVED) + BOOL_T available; +#endif + +} OSAL_MDC_DMA_NODE_T; + +typedef struct +{ +#if defined(NPS_EN_DMA_RESERVED) + void *ptr_rsrv_virt_addr; + NPS_ADDR_T rsrv_phy_addr; + NPS_ADDR_T rsrv_size; +#else + struct device *ptr_dma_dev; /* for allocate/free system memory */ +#endif + void *ptr_dma_list; /* the type should be casted again when use */ + NPS_SEMAPHORE_ID_T sema; + +} OSAL_MDC_DMA_INFO_T; + +#if defined(NPS_LINUX_USER_MODE) + +/* Data type of IOCTL argument for DMA management */ +typedef struct +{ +#if defined(NPS_EN_DMA_RESERVED) + NPS_ADDR_T rsrv_dma_phy_addr; /* information of reserved memory */ + NPS_ADDR_T rsrv_dma_size; +#else + NPS_ADDR_T phy_addr; /* information of system memory */ + NPS_ADDR_T size; +#endif +} OSAL_MDC_IOCTL_DMA_DATA_T; + +/* Data type of IOCTL argument for device initialization */ +#pragma pack (push,1) +typedef struct +{ + AML_DEV_ID_T id[NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM]; + NPS_ADDR_T pci_mmio_phy_start[NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM]; + NPS_ADDR_T pci_mmio_size[NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM]; + UI32_T dev_num; +} OSAL_MDC_IOCTL_DEV_DATA_T; +#pragma pack (pop) + +typedef enum +{ + OSAL_MDC_IOCTL_ACCESS_READ = 0, + OSAL_MDC_IOCTL_ACCESS_WRITE, + OSAL_MDC_IOCTL_ACCESS_READ_WRITE, + OSAL_MDC_IOCTL_ACCESS_NONE, + OSAL_MDC_IOCTL_ACCESS_LAST + +} OSAL_MDC_IOCTL_ACCESS_T; + +typedef enum +{ + OSAL_MDC_IOCTL_TYPE_MDC_INIT_DEV = 0, + OSAL_MDC_IOCTL_TYPE_MDC_DEINIT_DEV, + OSAL_MDC_IOCTL_TYPE_MDC_INIT_RSRV_DMA_MEM, + OSAL_MDC_IOCTL_TYPE_MDC_DEINIT_RSRV_DMA_MEM, + OSAL_MDC_IOCTL_TYPE_MDC_ALLOC_SYS_DMA_MEM, + OSAL_MDC_IOCTL_TYPE_MDC_FREE_SYS_DMA_MEM, + OSAL_MDC_IOCTL_TYPE_MDC_CONNECT_ISR, + OSAL_MDC_IOCTL_TYPE_MDC_DISCONNECT_ISR, + OSAL_MDC_IOCTL_TYPE_LAST + +} OSAL_MDC_IOCTL_TYPE_T; + +typedef union +{ + UI32_T value; + struct + { + UI32_T access : 2; /* 0:read, 1:write, 2:read and write, 3:none */ + UI32_T unit : 6; /* Maximum unit number is 64. */ + UI32_T size :14; /* Maximum IOCTL data size is 16KB. */ + UI32_T type :10; /* Maximum 1024 IOCTL types */ + } field; +} OSAL_MDC_IOCTL_CMD_T; + +typedef NPS_ERROR_NO_T +(*OSAL_MDC_IOCTL_CALLBACK_FUNC_T)( + const UI32_T unit, + void *ptr_data); + +#endif /* End of NPS_LINUX_USER_MODE */ + + +/* MACRO FUNCTION DECLARATIONS + */ + +/* DATA TYPE DECLARATIONS + */ + +/* EXPORTED SUBPROGRAM SPECIFICATIONS + */ +NPS_ERROR_NO_T +osal_mdc_readPciReg( + const UI32_T unit, + const UI32_T offset, + UI32_T *ptr_data, + const UI32_T len); + +NPS_ERROR_NO_T +osal_mdc_writePciReg( + const UI32_T unit, + const UI32_T offset, + const UI32_T *ptr_data, + const UI32_T len); + +NPS_ERROR_NO_T +osal_mdc_initDevice( + AML_DEV_T *ptr_dev_list, + UI32_T *ptr_dev_num); + +NPS_ERROR_NO_T +osal_mdc_deinitDevice(void); + +NPS_ERROR_NO_T +osal_mdc_initDmaMem(void); + +NPS_ERROR_NO_T +osal_mdc_deinitDmaMem(void); + +void * +osal_mdc_allocDmaMem( + const UI32_T size); + +NPS_ERROR_NO_T +osal_mdc_freeDmaMem( + void *ptr_virt_addr); + +NPS_ERROR_NO_T +osal_mdc_convertVirtToPhy( + void *ptr_virt_addr, + NPS_ADDR_T *ptr_phy_addr); + +NPS_ERROR_NO_T +osal_mdc_convertPhyToVirt( + const NPS_ADDR_T phy_addr, + void **pptr_virt_addr); + +NPS_ERROR_NO_T +osal_mdc_registerIsr( + const UI32_T unit, + AML_DEV_ISR_FUNC_T handler, + void *ptr_cookie); + +NPS_ERROR_NO_T +osal_mdc_connectIsr( + const UI32_T unit, + AML_DEV_ISR_FUNC_T handler, + AML_DEV_ISR_DATA_T *ptr_cookie); + +NPS_ERROR_NO_T +osal_mdc_disconnectIsr( + const UI32_T unit); + +NPS_ERROR_NO_T +osal_mdc_flushCache( + void *ptr_virt_addr, + const UI32_T size); + +NPS_ERROR_NO_T +osal_mdc_invalidateCache( + void *ptr_virt_addr, + const UI32_T size); + +#endif /* OSAL_MDC_H */ diff --git a/platform/nephos/nephos-modules/modules/src/inc/osal_types.h b/platform/nephos/nephos-modules/modules/src/inc/osal_types.h new file mode 100755 index 00000000000..48ac58aba33 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/inc/osal_types.h @@ -0,0 +1,319 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: osal_types.h + * PURPOSE: + * Define the commom data type in NPS SDK. + * NOTES: + */ + +#ifndef OSAL_TYPES_H +#define OSAL_TYPES_H + +/* INCLUDE FILE DECLARATIONS + */ + +/* NAMING CONSTANT DECLARATIONS + */ + + +#ifndef FALSE +#define FALSE 0 +#endif + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef NULL +#define NULL (void *)0 +#endif + + +#if defined(NPS_EN_HOST_64_BIT_BIG_ENDIAN) +#define UI64_MSW 0 +#define UI64_LSW 1 +#elif defined(NPS_EN_HOST_64_BIT_LITTLE_ENDIAN) +#define UI64_MSW 1 +#define UI64_LSW 0 +#else +#define UI64_MSW 1 +#define UI64_LSW 0 +#endif + +#if defined(NPS_EN_COMPILER_SUPPORT_LONG_LONG) +#define UI64_HI(dst) ((UI32_T)((dst) >> 32)) +#define UI64_LOW(dst) ((UI32_T)((dst) & 0xffffffff)) +#define UI64_ASSIGN(dst, high, low) ((dst) = ((long long)(high) << 32 | (long long)(low))) +#define UI64_SET(dst, src) ((dst) = (src)) +#define UI64_ADD_UI32(dst, src) ((dst) += ((long long)(src))) +#define UI64_SUB_UI32(dst, src) ((dst) -= ((long long)(src))) +#define UI64_ADD_UI64(dst, src) ((dst) += (src)) +#define UI64_SUB_UI64(dst, src) ((dst) -= (src)) +#define UI64_AND(dst, src) ((dst) &= (src)) +#define UI64_OR(dst, src) ((dst) |= (src)) +#define UI64_XOR(dst, src) ((dst) ^= (src)) +#define UI64_NOT(dst) ((dst) = ~(dst)) +#define UI64_MULT_UI32(dst, src) ((dst) *= (src)) +#define UI64_MULT_UI64(dst, src) ((dst) *= (src)) +/* UI64_T type data comparion: + * if data1 > data2 return 1 + * if data1 < data2 return -1 + * if data1 == data2 return 0 + */ +#define UI64_CMP(data1, data2) (((data1) > (data2)) ? 1 : (((data1) < (data2)) ? -1 : 0)) + +#else +#define UI64_HI(dst) ((dst).ui64[UI64_MSW]) +#define UI64_LOW(dst) ((dst).ui64[UI64_LSW]) +#define UI64_ASSIGN(dst, high, low) \ + do \ + { \ + UI64_HI(dst) = (high); \ + UI64_LOW(dst) = (low); \ + } while(0) + +#define UI64_SET(dst, src) \ + do \ + { \ + UI64_HI(dst) = UI64_HI(src); \ + UI64_LOW(dst) = UI64_LOW(src); \ + } while(0) + + +#define UI64_ADD_UI32(dst, src) \ + do \ + { \ + UI32_T _i_ = UI64_LOW(dst); \ + UI64_LOW(dst) += (src); \ + if (UI64_LOW(dst) < _i_) \ + { \ + UI64_HI(dst)++; \ + } \ + } while(0) + +#define UI64_SUB_UI32(dst, src) \ + do \ + { \ + UI32_T _i_ = UI64_LOW(dst); \ + UI64_LOW(dst) -= src; \ + if (UI64_LOW(dst) > _i_) \ + { \ + UI64_HI(dst)--; \ + } \ + } while(0) + + +#define UI64_ADD_UI64(dst, src) \ + do \ + { \ + UI32_T _i_ = UI64_LOW(dst); \ + UI64_LOW(dst) += UI64_LOW(src); \ + if (UI64_LOW(dst) < _i_) \ + { \ + UI64_HI(dst)++; \ + } \ + UI64_HI(dst) += UI64_HI(src); \ + } while(0) + +#define UI64_SUB_UI64(dst, src) \ + do { \ + UI32_T _i_ = UI64_LOW(dst); \ + UI64_LOW(dst) -= UI64_LOW(src); \ + if (UI64_LOW(dst) > _i_) \ + { \ + UI64_HI(dst)--; \ + } \ + UI64_HI(dst) -= UI64_HI(src); \ + } while(0) + + +#define UI64_AND(dst, src) \ + do { \ + UI64_HI(dst) &= UI64_HI(src); \ + UI64_LOW(dst) &= UI64_LOW(src); \ + } while(0) + +#define UI64_OR(dst, src) \ + do { \ + UI64_HI(dst) |= UI64_HI(src); \ + UI64_LOW(dst) |= UI64_LOW(src); \ + } while(0) + +#define UI64_XOR(dst, src) \ + do { \ + UI64_HI(dst) ^= UI64_HI(src); \ + UI64_LOW(dst) ^= UI64_LOW(src); \ + } while(0) + +#define UI64_NOT(dst) \ + do { \ + UI64_HI(dst) = ~UI64_HI(dst); \ + UI64_LOW(dst) = ~UI64_LOW(dst); \ + } while(0) + +/* UI64_T type data comparion: + * if data1 > data2 return 1 + * if data1 < data2 return -1 + * if data1 == data2 return 0 + */ +#define UI64_CMP(data1, data2) \ + (((data1).ui64[UI64_MSW] > (data2).ui64[UI64_MSW]) \ + ? 1 : (((data1).ui64[UI64_MSW] == (data2).ui64[UI64_MSW]) \ + ? (((data1).ui64[UI64_LSW] == (data2).ui64[UI64_LSW]) \ + ? 0 :(((data1).ui64[UI64_LSW] > (data2).ui64[UI64_LSW]) \ + ? 1 : -1)) : -1)) + +#define UI64_MULT_UI64(dst, src) \ + do \ + { \ + UI32_T _ret_low_ = 0; \ + UI32_T _ret_high_ = 0; \ + UI32_T _i_ = 0; \ + UI32_T _j_ = 0; \ + UI32_T _temp_ = 0; \ + UI32_T dst_t[4] = {0, 0, 0, 0}; \ + UI32_T src_t[4] = {0, 0, 0, 0}; \ + dst_t[0] = UI64_LOW(dst) & 0xFFFF; \ + dst_t[1] = UI64_LOW(dst) >> 16; \ + dst_t[2] = UI64_HI(dst) & 0xFFFF; \ + dst_t[3] = UI64_HI(dst) >> 16; \ + src_t[0] = UI64_LOW(src) & 0xFFFF; \ + src_t[1] = UI64_LOW(src) >> 16; \ + src_t[2] = UI64_HI(src) & 0xFFFF; \ + src_t[3] = UI64_HI(src) >> 16; \ + for(_i_ = 0; _i_ < 4; _i_++) \ + { \ + for(_j_ = 0; _j_ < 4; _j_++) \ + { \ + if((dst_t[_i_] != 0) && (src_t[_j_] != 0)) \ + { \ + _temp_ = dst_t[_i_] * src_t[_j_]; \ + if(0 == (_i_ + _j_)) \ + { \ + _ret_low_ += _temp_; \ + if (_ret_low_ < _temp_) \ + { \ + _ret_high_++; \ + } \ + } \ + if(1 == (_i_ + _j_)) \ + { \ + _ret_low_ += (_temp_ << 16); \ + if (_ret_low_ < (_temp_ << 16)) \ + { \ + _ret_high_++; \ + } \ + _ret_high_ += (_temp_ >> 16); \ + } \ + if(2 == (_i_+_j_)) \ + { \ + _ret_high_ += _temp_; \ + } \ + if(3 == (_i_ + _j_)) \ + { \ + _ret_high_ += (_temp_ << 16); \ + } \ + } \ + } \ + } \ + UI64_HI(dst) = _ret_high_; \ + UI64_LOW(dst) = _ret_low_; \ + } while(0) + +#define UI64_MULT_UI32(dst, src) \ + do \ + { \ + UI32_T _ret_low_ = 0; \ + UI32_T _ret_high_ = 0; \ + UI32_T _i_ = 0; \ + UI32_T _j_ = 0; \ + UI32_T _temp_ = 0; \ + UI32_T dst_t[4] = {0, 0, 0, 0}; \ + UI32_T src_t[2] = {0, 0}; \ + dst_t[0] = UI64_LOW(dst) & 0xFFFF; \ + dst_t[1] = UI64_LOW(dst) >> 16; \ + dst_t[2] = UI64_HI(dst) & 0xFFFF; \ + dst_t[3] = UI64_HI(dst) >> 16; \ + src_t[0] = src & 0xFFFF; \ + src_t[1] = src >> 16; \ + for(_i_ = 0; _i_ < 4; _i_++) \ + { \ + for(_j_ = 0; _j_ < 2; _j_++) \ + { \ + if((dst_t[_i_] != 0) && (src_t[_j_] != 0)) \ + { \ + _temp_ = dst_t[_i_] * src_t[_j_]; \ + if(0 == (_i_ + _j_)) \ + { \ + _ret_low_ += _temp_; \ + if (_ret_low_ < _temp_) \ + { \ + _ret_high_++; \ + } \ + } \ + if(1 == (_i_ + _j_)) \ + { \ + _ret_low_ += (_temp_ << 16); \ + if (_ret_low_ < (_temp_ << 16)) \ + { \ + _ret_high_++; \ + } \ + _ret_high_ += (_temp_ >> 16); \ + } \ + if(2 == (_i_ + _j_)) \ + { \ + _ret_high_ += _temp_; \ + } \ + if(3 == (_i_ + _j_)) \ + { \ + _ret_high_ += (_temp_ << 16); \ + } \ + } \ + } \ + } \ + UI64_HI(dst) = _ret_high_; \ + UI64_LOW(dst) = _ret_low_; \ + } while(0) + +#endif + +/* DATA TYPE DECLARATIONS + */ +typedef int BOOL_T; +typedef signed char I8_T; +typedef unsigned char UI8_T; +typedef signed short I16_T; +typedef unsigned short UI16_T; +typedef signed int I32_T; +typedef unsigned int UI32_T; +typedef char C8_T; + +#if defined(NPS_EN_COMPILER_SUPPORT_LONG_LONG) +typedef signed long long int I64_T; +typedef unsigned long long int UI64_T; +#else +typedef struct +{ + I32_T i64[2]; +} I64_T; + +typedef struct +{ + UI32_T ui64[2]; +} UI64_T; +#endif + +#endif /* OSAL_TYPES_H */ diff --git a/platform/nephos/nephos-modules/modules/src/make.mk b/platform/nephos/nephos-modules/modules/src/make.mk new file mode 100755 index 00000000000..e556ea10d76 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/make.mk @@ -0,0 +1,37 @@ +################################################################################ +# Copyright (C) 2019 Nephos, Inc. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of version 2 of the GNU General Public +# License as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 along with this program. +################################################################################ +DEV_MODULE_NAME := nps_dev +NETIF_MODULE_NAME := nps_netif +################################################################################ +DEV_OBJS_TOTAL := ./src/osal_mdc.o ./src/osal_isymbol.o +NETIF_OBJS_TOTAL := ./src/hal_tau_pkt_knl.o ./src/netif_perf.o ./src/netif_osal.o + +obj-m := $(DEV_MODULE_NAME).o $(NETIF_MODULE_NAME).o +$(DEV_MODULE_NAME)-objs := $(DEV_OBJS_TOTAL) +$(NETIF_MODULE_NAME)-objs := $(NETIF_OBJS_TOTAL) + +KBUILD_EXTRA_SYMBOLS := $(BUILD_OUTPUT_DIR)/Module.symvers +################################################################################ +folder: + $(TEST_PATH) $(BUILD_OUTPUT_DIR) || $(MKDIR) $(BUILD_OUTPUT_DIR) + $(TEST_PATH) $(BUILD_OUTPUT_DIR)/src || $(MKDIR) $(BUILD_OUTPUT_DIR)/src + +compile:: folder + touch $(BUILD_OUTPUT_DIR)/Makefile + $(MAKE) -C $(OS_PATH) M=$(BUILD_OUTPUT_DIR) src=$(shell pwd) modules EXTRA_CFLAGS="$(EXTRA_CFLAGS)" KBUILD_EXTRA_SYMBOLS=$(KBUILD_EXTRA_SYMBOLS) +install:: + +clean:: diff --git a/platform/nephos/nephos-modules/modules/src/netif_osal.c b/platform/nephos/nephos-modules/modules/src/netif_osal.c new file mode 100755 index 00000000000..15599e3a0aa --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/netif_osal.c @@ -0,0 +1,753 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: netif_osal.c + * PURPOSE: + * It provide customer linux API. + * NOTES: + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0) +#include +#endif +#include + +/* ----------------------------------------------------------------------------------- macro value */ +#define OSAL_US_PER_SECOND (1000000) /* macro second per second */ +#define OSAL_NS_PER_USECOND (1000) /* nano second per macro second */ + +/* ----------------------------------------------------------------------------------- macro function */ +#define OSAL_LOG_ERR(msg, ...) \ + osal_printf("\033[31m\033[0m"msg, __LINE__, ##__VA_ARGS__) + +/* ----------------------------------------------------------------------------------- struct */ +extern struct pci_dev *_ptr_ext_pci_dev; + +static linux_thread_t _osal_thread_head = {{0}}; + +/* ----------------------------------------------------------------------------------- function */ +/* general */ +void * +osal_memset( + void *ptr_mem, + const I32_T value, + const UI32_T num) +{ + return memset(ptr_mem, value, num); +} + +void * +osal_memcpy( + void *ptr_dst, + const void *ptr_src, + const UI32_T num) +{ + return memcpy(ptr_dst, ptr_src, num); +} + +UI32_T +osal_strlen( + const C8_T *ptr_str) +{ + return strlen(ptr_str); +} + +void +osal_printf( + const C8_T *ptr_fmt, + ...) +{ + va_list ap; + char buf[OSAL_PRN_BUF_SZ]; + + if (NULL != ptr_fmt) + { + va_start(ap, ptr_fmt); + vsnprintf(buf, OSAL_PRN_BUF_SZ, ptr_fmt, ap); + va_end(ap); + + printk("%s", buf); + } +} + +void * +osal_alloc( + const UI32_T size) +{ + return kmalloc(size, GFP_ATOMIC); +} + +void +osal_free( + const void *ptr_mem) +{ + kfree(ptr_mem); +} + +/* thread */ +NPS_ERROR_NO_T +osal_init(void) +{ + linux_thread_t *ptr_thread_head = &_osal_thread_head; + + memset(ptr_thread_head, 0x0, sizeof(linux_thread_t)); + + /* init */ + ptr_thread_head->ptr_prev = ptr_thread_head; + ptr_thread_head->ptr_next = ptr_thread_head; + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_deinit(void) +{ + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_createThread( + const C8_T *ptr_thread_name, + const UI32_T stack_size, + const UI32_T priority, + void (function)(void*), + void *ptr_arg, + NPS_THREAD_ID_T *ptr_thread_id) +{ + char dft_name[OSAL_THREAD_NAME_LEN + 1] = OSAL_THREAD_DFT_NAME; + linux_thread_t *ptr_thread_head = &_osal_thread_head; + linux_thread_t *ptr_thread_node = osal_alloc(sizeof(linux_thread_t)); + + /* process name */ + osal_memcpy(ptr_thread_node->name, (0 == osal_strlen(ptr_thread_name))? + dft_name : ptr_thread_name, OSAL_THREAD_NAME_LEN); + ptr_thread_node->name[OSAL_THREAD_NAME_LEN] = '\0'; + + /* init */ + ptr_thread_node->ptr_task = kthread_create((int(*)(void *))function, ptr_arg, ptr_thread_name); + ptr_thread_node->ptr_task->policy = SCHED_RR; + ptr_thread_node->ptr_task->rt_priority = priority; + ptr_thread_node->is_stop = FALSE; + + *ptr_thread_id = (NPS_THREAD_ID_T)ptr_thread_node; + + wake_up_process(ptr_thread_node->ptr_task); + + /* append the thread_node */ + ptr_thread_node->ptr_prev = ptr_thread_head->ptr_prev; + ptr_thread_head->ptr_prev->ptr_next = ptr_thread_node; + ptr_thread_node->ptr_next = ptr_thread_head; + ptr_thread_head->ptr_prev = ptr_thread_node; + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_stopThread( + NPS_THREAD_ID_T *ptr_thread_id) +{ + linux_thread_t *ptr_thread_node = (linux_thread_t *)(*ptr_thread_id); + + ptr_thread_node->is_stop = TRUE; + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_destroyThread( + NPS_THREAD_ID_T *ptr_thread_id) +{ + linux_thread_t *ptr_thread_node = (linux_thread_t *)(*ptr_thread_id); + + kthread_stop(ptr_thread_node->ptr_task); + + /* remove the thread_node */ + ptr_thread_node->ptr_next->ptr_prev = ptr_thread_node->ptr_prev; + ptr_thread_node->ptr_prev->ptr_next = ptr_thread_node->ptr_next; + + osal_free(ptr_thread_node); + *ptr_thread_id = 0; + + return (NPS_E_OK); +} + +void +osal_initRunThread(void) +{ + /* for reboot or shutdown without stopping kthread */ + allow_signal(SIGTERM); +} + +NPS_ERROR_NO_T +osal_isRunThread(void) +{ + linux_thread_t *ptr_thread_node = _osal_thread_head.ptr_next; + + while (1) + { + if (ptr_thread_node == &_osal_thread_head) + { + OSAL_LOG_ERR("Cannot find task 0x%x.\n", current); + break; + } + if (ptr_thread_node->ptr_task == current) + { + break; + } + ptr_thread_node = ptr_thread_node->ptr_next; + } + + if ((TRUE == ptr_thread_node->is_stop) || (signal_pending(current))) + { + return (NPS_E_OTHERS); + } + + return (NPS_E_OK); +} + +void +osal_exitRunThread(void) +{ + while (!kthread_should_stop() && !signal_pending(current)) + { + osal_sleepThread(OSAL_NS_PER_USECOND); + } +} + +/* semaphore */ +NPS_ERROR_NO_T +osal_createSemaphore( + const C8_T *ptr_sema_name, + const UI32_T sema_count, + NPS_SEMAPHORE_ID_T *ptr_semaphore_id) +{ + char dft_name[OSAL_SEMA_NAME_LEN + 1] = OSAL_SEMA_DFT_NAME; + linux_sema_t *ptr_sema = osal_alloc(sizeof(linux_sema_t)); + + /* process name */ + osal_memcpy(ptr_sema->name, (0 == osal_strlen(ptr_sema_name))? + dft_name : ptr_sema_name, OSAL_SEMA_NAME_LEN); + ptr_sema->name[OSAL_SEMA_NAME_LEN] = '\0'; + + /* init */ + sema_init(&ptr_sema->lock, NPS_SEMAPHORE_BINARY); + + *ptr_semaphore_id = (NPS_SEMAPHORE_ID_T)ptr_sema; + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_takeSemaphore( + NPS_SEMAPHORE_ID_T *ptr_semaphore_id, + UI32_T time_out) +{ + linux_sema_t *ptr_sema = (linux_sema_t *)(*ptr_semaphore_id); + + if (in_interrupt()) + { + return (NPS_E_OTHERS); + } + + if (!down_interruptible(&ptr_sema->lock)) + { + return (NPS_E_OK); + } + + return (NPS_E_OTHERS); +} + +NPS_ERROR_NO_T +osal_giveSemaphore( + NPS_SEMAPHORE_ID_T *ptr_semaphore_id) +{ + linux_sema_t *ptr_sema = (linux_sema_t *)(*ptr_semaphore_id); + + up(&ptr_sema->lock); + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_destroySemaphore( + NPS_SEMAPHORE_ID_T *ptr_semaphore_id) +{ + linux_sema_t *ptr_sema = (linux_sema_t *)(*ptr_semaphore_id); + + osal_free(ptr_sema); + *ptr_semaphore_id = 0; + + return (NPS_E_OK); +} + +/* event */ +NPS_ERROR_NO_T +osal_createEvent( + const C8_T *ptr_event_name, + NPS_SEMAPHORE_ID_T *ptr_event_id) +{ + char dft_name[OSAL_EVENT_NAME_LEN + 1] = OSAL_EVENT_DFT_NAME; + linux_event_t *ptr_event = osal_alloc(sizeof(linux_event_t)); + + /* process name */ + osal_memcpy(ptr_event->name, (0 == osal_strlen(ptr_event_name))? + dft_name : ptr_event_name, OSAL_EVENT_NAME_LEN); + ptr_event->name[OSAL_EVENT_NAME_LEN] = '\0'; + + /* init */ + ptr_event->condition = FALSE; + init_waitqueue_head(&ptr_event->wait_que); + + *ptr_event_id = (NPS_SEMAPHORE_ID_T)ptr_event; + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_waitEvent( + NPS_SEMAPHORE_ID_T *ptr_event_id) +{ + linux_event_t *ptr_event = (linux_event_t *)(*ptr_event_id); + + if (!wait_event_interruptible(ptr_event->wait_que, ptr_event->condition)) + { + ptr_event->condition = FALSE; + + return (NPS_E_OK); + } + + return (NPS_E_OTHERS); +} + +NPS_ERROR_NO_T +osal_triggerEvent( + NPS_SEMAPHORE_ID_T *ptr_event_id) +{ + linux_event_t *ptr_event = (linux_event_t *)(*ptr_event_id); + + ptr_event->condition = TRUE; + wake_up_interruptible(&ptr_event->wait_que); + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_destroyEvent( + NPS_SEMAPHORE_ID_T *ptr_event_id) +{ + linux_event_t *ptr_event = (linux_event_t *)(*ptr_event_id); + + osal_free(ptr_event); + *ptr_event_id = 0; + + return (NPS_E_OK); +} + +/* isr_lock */ +NPS_ERROR_NO_T +osal_createIsrLock( + const C8_T *ptr_isrlock_name, + NPS_ISRLOCK_ID_T *ptr_isrlock_id) +{ + char dft_name[OSAL_SPIN_NAME_LEN + 1] = OSAL_SPIN_DFT_NAME; + linux_isrlock_t *ptr_isrlock = osal_alloc(sizeof(linux_isrlock_t)); + + /* process name */ + osal_memcpy(ptr_isrlock->name, (0 == osal_strlen(ptr_isrlock_name))? + dft_name : ptr_isrlock_name, OSAL_SPIN_NAME_LEN); + ptr_isrlock->name[OSAL_SPIN_NAME_LEN] = '\0'; + + /* init */ + spin_lock_init(&ptr_isrlock->spinlock); + + *ptr_isrlock_id = (NPS_ISRLOCK_ID_T)ptr_isrlock; + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_takeIsrLock( + NPS_ISRLOCK_ID_T *ptr_isrlock_id, + NPS_IRQ_FLAGS_T *ptr_irq_flags) +{ + linux_isrlock_t *ptr_isrlock = (linux_isrlock_t *)(*ptr_isrlock_id); + unsigned long flags = 0; + + spin_lock_irqsave(&ptr_isrlock->spinlock, flags); + *ptr_irq_flags = (NPS_IRQ_FLAGS_T)flags; + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_giveIsrLock( + NPS_ISRLOCK_ID_T *ptr_isrlock_id, + NPS_IRQ_FLAGS_T *ptr_irq_flags) +{ + linux_isrlock_t *ptr_isrlock = (linux_isrlock_t *)(*ptr_isrlock_id); + unsigned long flags = 0; + + flags = (unsigned long)(*ptr_irq_flags); + spin_unlock_irqrestore(&ptr_isrlock->spinlock, flags); + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_destroyIsrLock( + NPS_ISRLOCK_ID_T *ptr_isrlock_id) +{ + linux_isrlock_t *ptr_isrlock = (linux_isrlock_t *)(*ptr_isrlock_id); + + osal_free(ptr_isrlock); + *ptr_isrlock_id = 0; + + return (NPS_E_OK); +} + +/* time */ +NPS_ERROR_NO_T +osal_sleepThread( + const UI32_T usecond) +{ + UI32_T tick_usec; /* how many usec per second */ + UI32_T jiffies; + + if (0 != usecond) + { + /* HZ : times/sec, tick = 1/HZ */ + tick_usec = OSAL_TICKS_PER_SEC / HZ; + if (in_interrupt() || (usecond < tick_usec)) + { + return (-1); + } + else + { + DECLARE_WAIT_QUEUE_HEAD(suspend_queue); + + if (usecond > 0xFFFFFFFF - (tick_usec - 1)) + { + jiffies = 0xFFFFFFFF / tick_usec; + } + else + { + jiffies = (usecond + (tick_usec - 1)) / tick_usec; + } + + return wait_event_interruptible_timeout(suspend_queue, 0, jiffies); + } + } + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_getTime( + NPS_TIME_T *ptr_time) +{ + struct timeval usec_time; + + do_gettimeofday(&usec_time); + *(NPS_TIME_T *)ptr_time = (usec_time.tv_sec * OSAL_US_PER_SECOND) + usec_time.tv_usec; + + return (NPS_E_OK); +} + +/* queue */ +NPS_ERROR_NO_T +osal_que_create( + NPS_HUGE_T *ptr_queue_id, + UI32_T capacity) +{ + linux_queue_t *ptr_queue = osal_alloc(sizeof(linux_queue_t)); + + ptr_queue->head = 0; + ptr_queue->tail = 0; + ptr_queue->wr_cnt = 0; + ptr_queue->rd_cnt = 0; + ptr_queue->capacity = capacity; + ptr_queue->ptr_entry = osal_alloc(sizeof(linux_queue_entry_t) * capacity); + memset(ptr_queue->ptr_entry, 0x0, sizeof(linux_queue_entry_t) * capacity); + + *ptr_queue_id = (NPS_HUGE_T)ptr_queue; + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_que_enque( + NPS_HUGE_T *ptr_queue_id, + void *ptr_data) +{ + linux_queue_t *ptr_queue = (linux_queue_t *)(*ptr_queue_id); + + if (ptr_queue->wr_cnt - ptr_queue->rd_cnt >= ptr_queue->capacity) + { + return (NPS_E_OTHERS); + } + + /* save data to the tail */ + ptr_queue->ptr_entry[ptr_queue->tail].ptr_data = ptr_data; + + /* calculate tail and wr_cnt */ + ptr_queue->tail++; + if (ptr_queue->tail >= ptr_queue->capacity) + { + ptr_queue->tail = 0; + } + + ptr_queue->wr_cnt++; + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_que_deque( + NPS_HUGE_T *ptr_queue_id, + void **pptr_data) +{ + linux_queue_t *ptr_queue = (linux_queue_t *)(*ptr_queue_id); + + if (ptr_queue->wr_cnt == ptr_queue->rd_cnt) + { + return (NPS_E_OTHERS); + } + + /* get data from head */ + *pptr_data = ptr_queue->ptr_entry[ptr_queue->head].ptr_data; + ptr_queue->ptr_entry[ptr_queue->head].ptr_data = NULL; + + /* calculate head and rd_cnt */ + ptr_queue->head++; + if (ptr_queue->head >= ptr_queue->capacity) + { + ptr_queue->head = 0; + } + + ptr_queue->rd_cnt++; + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_que_destroy( + NPS_HUGE_T *ptr_queue_id) +{ + linux_queue_t *ptr_queue = (linux_queue_t *)(*ptr_queue_id); + + osal_free(ptr_queue->ptr_entry); + osal_free(ptr_queue); + *ptr_queue_id = 0; + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_que_getCount( + NPS_HUGE_T *ptr_queue_id, + unsigned int *ptr_count) +{ + linux_queue_t *ptr_queue = (linux_queue_t *)(*ptr_queue_id); + + *ptr_count = ptr_queue->wr_cnt - ptr_queue->rd_cnt; + + return (NPS_E_OK); +} + +/* IO */ +int +osal_io_copyToUser( + void *ptr_usr_buf, + void *ptr_knl_buf, + unsigned int size) +{ + return copy_to_user(ptr_usr_buf, ptr_knl_buf, size); +} + +int +osal_io_copyFromUser( + void *ptr_knl_buf, + void *ptr_usr_buf, + unsigned int size) +{ + return copy_from_user(ptr_knl_buf, ptr_usr_buf, size); +} + +/* dma */ +void * +osal_dma_alloc( + const UI32_T size) +{ + struct device *ptr_dev = &_ptr_ext_pci_dev->dev; + linux_dma_t *ptr_dma_node = NULL; + dma_addr_t phy_addr = 0x0; + + ptr_dma_node = dma_alloc_coherent(ptr_dev, sizeof(linux_dma_t) + size, &phy_addr, GFP_ATOMIC); + ptr_dma_node->size = sizeof(linux_dma_t) + size; + ptr_dma_node->phy_addr = phy_addr; + + return (void *)ptr_dma_node->data; +} + +NPS_ERROR_NO_T +osal_dma_free( + void *ptr_dma_mem) +{ + struct device *ptr_dev = &_ptr_ext_pci_dev->dev; + linux_dma_t *ptr_dma_node = (linux_dma_t *)(ptr_dma_mem - sizeof(linux_dma_t)); + + dma_free_coherent(ptr_dev, ptr_dma_node->size, ptr_dma_node, ptr_dma_node->phy_addr); + + return (NPS_E_OK); +} + +dma_addr_t +osal_dma_convertVirtToPhy( + void *ptr_virt_addr) +{ + return virt_to_phys(ptr_virt_addr); +} + +void * +osal_dma_convertPhyToVirt( + const dma_addr_t phy_addr) +{ + return phys_to_virt(phy_addr); +} + +int +osal_dma_flushCache( + void *ptr_virt_addr, + const unsigned int size) +{ +#if defined(CONFIG_NOT_COHERENT_CACHE) || defined(CONFIG_DMA_NONCOHERENT) +#if defined(dma_cache_wback_inv) + dma_cache_wback_inv((NPS_HUGE_T)ptr_virt_addr, size); +#else + dma_cache_sync(NULL, ptr_virt_addr, size, DMA_TO_DEVICE); +#endif +#endif + return (0); +} + +int +osal_dma_invalidateCache( + void *ptr_virt_addr, + const unsigned int size) +{ +#if defined(CONFIG_NOT_COHERENT_CACHE) || defined(CONFIG_DMA_NONCOHERENT) +#if defined(dma_cache_wback_inv) + dma_cache_wback_inv((NPS_HUGE_T)ptr_virt_addr, size); +#else + dma_cache_sync(NULL, ptr_virt_addr, size, DMA_FROM_DEVICE); +#endif +#endif + return (0); +} + +/* skb */ +struct sk_buff * +osal_skb_alloc( + UI32_T size) +{ + struct sk_buff *ptr_skb = NULL; + + /* + * 1. alloc_skb (len, flag) : GFP_KERNEL + * 2. netdev_alloc_skb (dev, len) : GFP_ATOMIC + * 3. dev_alloc_skb (len) : GFP_ATOMIC + * 4. netdev_alloc_skb_ip_align (dev, len) : GFP_ATOMIC + * + * note: Eth header is 14-bytes, we reservd 2-bytes to alignment Ip header + */ + ptr_skb = dev_alloc_skb(size + NET_IP_ALIGN); + skb_reserve(ptr_skb, NET_IP_ALIGN); + skb_put(ptr_skb, size); + + return (ptr_skb); +} + +void +osal_skb_free( + struct sk_buff *ptr_skb) +{ + /* + * 1. dev_kfree_skb (*skb) : release in process context + * 2. dev_kfree_skb_irq (*skb) : release in interrupt context + * 3. dev_kfree_skb_any (*skb) : release in any context + */ + dev_kfree_skb_any(ptr_skb); +} + +dma_addr_t +osal_skb_mapDma( + struct sk_buff *ptr_skb, + enum dma_data_direction dir) +{ + struct device *ptr_dev = &_ptr_ext_pci_dev->dev; + dma_addr_t phy_addr = 0x0; + + phy_addr = dma_map_single(ptr_dev, ptr_skb->data, ptr_skb->len, dir); + if (dma_mapping_error(ptr_dev, phy_addr)) + { + phy_addr = 0x0; + } + + return (phy_addr); +} + +void +osal_skb_unmapDma( + const dma_addr_t phy_addr, + UI32_T size, + enum dma_data_direction dir) +{ + struct device *ptr_dev = &_ptr_ext_pci_dev->dev; + + dma_unmap_single(ptr_dev, phy_addr, size, dir); +} + +void +osal_skb_send( + struct sk_buff *ptr_skb) +{ + dev_queue_xmit(ptr_skb); +} + +void +osal_skb_recv( + struct sk_buff *ptr_skb) +{ + /* 1. netif_rx() : handle skb in process context + * 2. netif_rx_ni() : handle skb in interrupt context + * 3. netif_receive_skb() : for NAPI + */ + netif_rx(ptr_skb); +} + diff --git a/platform/nephos/nephos-modules/modules/src/netif_perf.c b/platform/nephos/nephos-modules/modules/src/netif_perf.c new file mode 100755 index 00000000000..18606d6d25d --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/netif_perf.c @@ -0,0 +1,656 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: netif_perf.c + * PURPOSE: + * It provide customer performance test API. + * NOTES: + */ +#include +#include + +#include +#include + +#if defined (NPS_EN_TAURUS) +#include +#endif + +/* -------------------------------------------------------------- switch */ +#if defined (NPS_EN_ARIES) +#define PERF_TX_CHANNEL_NUM_MAX (HAL_ARI_PKT_TX_CHANNEL_LAST) +#define PERF_RX_CHANNEL_NUM_MAX (HAL_ARI_PKT_RX_CHANNEL_LAST) +typedef HAL_ARI_PKT_TX_SW_GPD_T PERF_TX_SW_GPD; +typedef HAL_ARI_PKT_RX_SW_GPD_T PERF_RX_SW_GPD; +#endif + +#if defined (NPS_EN_TAURUS) +#define PERF_TX_CHANNEL_NUM_MAX (HAL_TAU_PKT_TX_CHANNEL_LAST) +#define PERF_RX_CHANNEL_NUM_MAX (HAL_TAU_PKT_RX_CHANNEL_LAST) +typedef HAL_TAU_PKT_TX_SW_GPD_T PERF_TX_SW_GPD; +typedef HAL_TAU_PKT_RX_SW_GPD_T PERF_RX_SW_GPD; +#endif + +/* -------------------------------------------------------------- common */ +#define PERF_TX_PERF_NUM (1000000) /* max: 4294967 */ +#define PERF_TX_PERF_MESG (50000) +#define PERF_TX_PERF_FAIL (10000) +#define PERF_RX_PERF_NUM (1000000) /* max: 4294967 */ +#define PERF_RX_PERF_MESG (50000) +#define PERF_RX_PERF_FAIL (10000) + +/* -------------------------------------------------------------- callbacks for chip dependency */ +/* Tx */ +typedef NPS_ERROR_NO_T +(*PERF_TX_GET_INTR_T)( + const UI32_T unit, + const UI32_T channel, + UI32_T *ptr_intr_cnt); + +typedef NPS_ERROR_NO_T +(*PERF_TX_GET_NETDEV_T)( + const UI32_T unit, + const UI32_T port, + struct net_device **pptr_net_dev); + +typedef NPS_ERROR_NO_T +(*PERF_TX_PREPARE_GPD_T)( + const UI32_T unit, + const NPS_ADDR_T phy_addr, + const UI32_T len, + const UI32_T port, + PERF_TX_SW_GPD *ptr_sw_gpd); + +typedef NPS_ERROR_NO_T +(*PERF_TX_SEND_GPD_T)( + const UI32_T unit, + const UI32_T channel, + PERF_TX_SW_GPD *ptr_sw_gpd); + +/* Rx */ +typedef NPS_ERROR_NO_T +(*PERF_RX_GET_INTR_T)( + const UI32_T unit, + const UI32_T channel, + UI32_T *ptr_intr_cnt); + +/* -------------------------------------------------------------- structs */ +typedef enum +{ + PERF_DIR_TX = 0, + PERF_DIR_RX, + PERF_DIR_LAST, + +} PERF_DIR_T; + +typedef struct +{ + UI32_T unit; + UI32_T channel; + UI32_T len; + UI32_T num; + UI32_T port; + BOOL_T test_skb; + +} PERF_COOKIE_T; + +typedef struct +{ + /* netif-only */ + PERF_COOKIE_T tx_cookie [PERF_TX_CHANNEL_NUM_MAX]; + + NPS_THREAD_ID_T tx_task [PERF_TX_CHANNEL_NUM_MAX]; + NPS_SEMAPHORE_ID_T start_sync [PERF_TX_CHANNEL_NUM_MAX]; + NPS_SEMAPHORE_ID_T end_sync [PERF_TX_CHANNEL_NUM_MAX]; + UI32_T send_ok [PERF_TX_CHANNEL_NUM_MAX]; + UI32_T send_fail [PERF_TX_CHANNEL_NUM_MAX]; + + /* chip dependent callbacks */ + PERF_TX_GET_INTR_T get_intr_cnt; + PERF_TX_GET_NETDEV_T get_netdev; + PERF_TX_PREPARE_GPD_T prepare_gpd; + PERF_TX_SEND_GPD_T send_gpd; + +} PERF_TX_PERF_CB_T; + +typedef struct +{ + /* netif-only */ + BOOL_T rx_test; + + NPS_SEMAPHORE_ID_T start_sync; + NPS_SEMAPHORE_ID_T end_sync; + UI32_T target_num; + UI32_T target_len; + UI32_T recv_pass; + UI32_T recv_fail; + + /* duplicate packets */ + UI32_T rch_qid_map_lo [PERF_RX_CHANNEL_NUM_MAX]; + UI32_T rch_qid_map_hi [PERF_RX_CHANNEL_NUM_MAX]; + + /* chip dependent callbacks */ + PERF_RX_GET_INTR_T get_intr_cnt; + +} PERF_RX_PERF_CB_T; + +/* -------------------------------------------------------------- statics */ +static PERF_TX_PERF_CB_T _perf_tx_perf_cb = +{ +#if defined (NPS_EN_ARIES) + .get_intr_cnt = hal_ari_pkt_getTxIntrCnt, + .get_netdev = hal_ari_pkt_getNetDev, /* test_skb = TRUE */ + .prepare_gpd = hal_ari_pkt_prepareGpd, /* test_skb = FALSE */ + .send_gpd = hal_ari_pkt_sendGpd, /* test_skb = FALSE */ +#endif +#if defined (NPS_EN_TAURUS) + .get_intr_cnt = hal_tau_pkt_getTxIntrCnt, + .get_netdev = hal_tau_pkt_getNetDev, /* test_skb = TRUE */ + .prepare_gpd = hal_tau_pkt_prepareGpd, /* test_skb = FALSE */ + .send_gpd = hal_tau_pkt_sendGpd, /* test_skb = FALSE */ +#endif +}; + +static PERF_RX_PERF_CB_T _perf_rx_perf_cb = +{ +#if defined (NPS_EN_ARIES) + .get_intr_cnt = hal_ari_pkt_getRxIntrCnt, +#endif +#if defined (NPS_EN_TAURUS) + .get_intr_cnt = hal_tau_pkt_getRxIntrCnt, +#endif +}; + +/* -------------------------------------------------------------- functions */ +static void +_perf_duplicateRxPacket( + const UI32_T unit, + const UI32_T rx_channel, + const BOOL_T enable) +{ + ; +} + +static void +_perf_showPerf( + PERF_DIR_T dir, + UI32_T channel, + UI32_T len, + UI32_T num, + UI32_T intr, + UI32_T duration) +{ + UI32_T tx_channel = 0; + UI32_T tx_fail = 0; + + if (duration < 1000) + { + osal_printf("***Error***, %d packets cost < 1000 us.\n", num); + return ; + } + + osal_printf("\n"); + + if (PERF_DIR_TX == dir) + { + osal_printf("Tx-perf\n"); + } + else + { + osal_printf("Rx-perf\n"); + } + + osal_printf("------------------------------------\n"); + osal_printf("channel number : %d\n", channel); + osal_printf("packet length (bytes): %d\n", len); + osal_printf("packet number : %d\n", num); + osal_printf("time duration (us) : %d\n", duration); + osal_printf("------------------------------------\n"); + osal_printf("avg. packet rate (pps) : %d\n", (num * 1000) / (duration / 1000)); + osal_printf("avg. throughput (Mbps) : %d\n", ((num / 1000) * len * 8) / (duration / 1000)); + osal_printf("interrupt number : %d\n", intr); + + if (PERF_DIR_TX == dir) + { + for (tx_channel = 0; tx_channel < channel; tx_channel++) + { + tx_fail += _perf_tx_perf_cb.send_fail[tx_channel]; + } + osal_printf("Tx fail : %d\n", tx_fail); + } + + osal_printf("------------------------------------\n"); +} + +static void +_perf_getIntrCnt( + UI32_T unit, + PERF_DIR_T dir, + UI32_T *ptr_intr_cnt) +{ + UI32_T intr_cnt = 0; + UI32_T channel = 0; + + if (PERF_DIR_TX == dir) + { + for (channel = 0; channel < PERF_TX_CHANNEL_NUM_MAX; channel++) + { + _perf_tx_perf_cb.get_intr_cnt(unit, channel, &intr_cnt); + *ptr_intr_cnt += intr_cnt; + } + } + else + { + for (channel = 0; channel < PERF_RX_CHANNEL_NUM_MAX; channel++) + { + _perf_rx_perf_cb.get_intr_cnt(unit, channel, &intr_cnt); + *ptr_intr_cnt += intr_cnt; + } + } +} + +static void +_perf_txCallback( + const UI32_T unit, + PERF_TX_SW_GPD *ptr_sw_gpd, + void *ptr_virt_addr) +{ + /* free dma */ + osal_dma_free(ptr_virt_addr); + + /* free gpd */ + osal_free(ptr_sw_gpd); +} + +static void +_perf_txTask( + void *ptr_argv) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + UI32_T unit = ((PERF_COOKIE_T *)ptr_argv)->unit; + UI32_T channel = ((PERF_COOKIE_T *)ptr_argv)->channel; + UI32_T len = ((PERF_COOKIE_T *)ptr_argv)->len; + UI32_T num = ((PERF_COOKIE_T *)ptr_argv)->num; + UI32_T port = ((PERF_COOKIE_T *)ptr_argv)->port; + BOOL_T test_skb = ((PERF_COOKIE_T *)ptr_argv)->test_skb; + + /* test targets */ + PERF_TX_SW_GPD *ptr_sw_gpd = NULL; + struct sk_buff *ptr_skb = NULL; + + /* temp variables */ + UI32_T send_fail = 0; + void *ptr_virt_addr = NULL; + NPS_ADDR_T phy_addr = 0x0; + + osal_initRunThread(); + do + { + rc = osal_waitEvent(&_perf_tx_perf_cb.start_sync[channel]); + if (NPS_E_OK != osal_isRunThread()) + { + break; /* deinit-thread */ + } + + while (_perf_tx_perf_cb.send_ok[channel] < num) + { + if (0 == (_perf_tx_perf_cb.send_ok[channel] % PERF_TX_PERF_MESG)) + { + printk("T"); + } + + if (TRUE == test_skb) + { + ptr_skb = osal_skb_alloc(len); + ptr_skb->len = len; + _perf_tx_perf_cb.get_netdev(unit, port, &ptr_skb->dev); + + /* send skb */ + osal_skb_send(ptr_skb); + } + else + { + ptr_sw_gpd = osal_alloc(sizeof(PERF_TX_SW_GPD)); + if (NULL == ptr_sw_gpd) + { + osal_printf("***Error***, alloc sw-gpd fail.\n"); + break; + } + + /* prepare buf */ + ptr_virt_addr = osal_dma_alloc(len); + phy_addr = osal_dma_convertVirtToPhy(ptr_virt_addr); + + /* trans skb to gpd */ + osal_memset(ptr_sw_gpd, 0x0, sizeof(PERF_TX_SW_GPD)); + ptr_sw_gpd->callback = (void *)_perf_txCallback; + ptr_sw_gpd->ptr_cookie = (void *)ptr_virt_addr; + ptr_sw_gpd->gpd_num = 1; + ptr_sw_gpd->ptr_next = NULL; + ptr_sw_gpd->channel = channel; + + /* prepare gpd */ + rc = _perf_tx_perf_cb.prepare_gpd(unit, phy_addr, len, port, ptr_sw_gpd); + + /* send gpd */ + rc = _perf_tx_perf_cb.send_gpd(unit, channel, ptr_sw_gpd); + if (NPS_E_OK == rc) + { + _perf_tx_perf_cb.send_ok[channel]++; + send_fail = 0; + } + else + { + _perf_tx_perf_cb.send_fail[channel]++; + if (send_fail++ >= PERF_TX_PERF_FAIL) + { + osal_printf("***Error***, Tch-%d send fail over %d packet(s). (rc: %d)\n", + channel, PERF_TX_PERF_FAIL, rc); + break; + } + + _perf_txCallback(unit, ptr_sw_gpd, ptr_virt_addr); + osal_sleepThread(1000); + } + } + } + + osal_triggerEvent(&_perf_tx_perf_cb.end_sync[channel]); + } + while (NPS_E_OK == osal_isRunThread()); + osal_exitRunThread(); +} + +static void +_perf_txDeinit( + const UI32_T unit, + const UI32_T tx_channel) +{ + UI32_T channel = 0; + + for (channel = 0; channel < tx_channel; channel++) + { + /* destroy Tx resources */ + osal_stopThread (&_perf_tx_perf_cb.tx_task [channel]); + osal_triggerEvent(&_perf_tx_perf_cb.start_sync [channel]); + osal_destroyThread(&_perf_tx_perf_cb.tx_task [channel]); + osal_destroyEvent(&_perf_tx_perf_cb.end_sync [channel]); + osal_destroyEvent(&_perf_tx_perf_cb.start_sync [channel]); + } +} + +static void +_perf_txInit( + const UI32_T unit, + const UI32_T tx_channel, + const UI32_T len, + BOOL_T test_skb) +{ + UI32_T channel = 0; + + for (channel = 0; channel < tx_channel; channel++) + { + _perf_tx_perf_cb.send_ok [channel] = 0; + _perf_tx_perf_cb.send_fail[channel] = 0; + + /* create Tx resources */ + osal_createEvent("TX_START", &_perf_tx_perf_cb.start_sync [channel]); + osal_createEvent("TX_END", &_perf_tx_perf_cb.end_sync [channel]); + + _perf_tx_perf_cb.tx_cookie[channel].unit = unit; + _perf_tx_perf_cb.tx_cookie[channel].channel = channel; + _perf_tx_perf_cb.tx_cookie[channel].len = len; + _perf_tx_perf_cb.tx_cookie[channel].num = PERF_TX_PERF_NUM / tx_channel; + _perf_tx_perf_cb.tx_cookie[channel].port = 0; + _perf_tx_perf_cb.tx_cookie[channel].test_skb = test_skb; + + osal_createThread( + "TX_PERF", 64 * 1024, 90, + _perf_txTask, + (void *)&_perf_tx_perf_cb.tx_cookie[channel], + &_perf_tx_perf_cb.tx_task[channel]); + } +} + +static void +_perf_rxDeinit( + const UI32_T unit, + const UI32_T rx_channel) +{ + /* turn-off Rx test */ + _perf_rx_perf_cb.rx_test = FALSE; + + /* destroy Rx resources */ + osal_destroyEvent(&_perf_rx_perf_cb.end_sync); + osal_destroyEvent(&_perf_rx_perf_cb.start_sync); + + /* disable duplicate Rx packets to channels */ + _perf_duplicateRxPacket(unit, rx_channel, FALSE); +} + +static void +_perf_rxInit( + const UI32_T unit, + const UI32_T rx_channel, + const UI32_T len) +{ + /* enable duplicate Rx packets to channels */ + _perf_duplicateRxPacket(unit, rx_channel, TRUE); + + /* create Rx callback resources */ + _perf_rx_perf_cb.target_num = PERF_RX_PERF_NUM; + _perf_rx_perf_cb.target_len = len; + _perf_rx_perf_cb.recv_pass = 0; + + osal_createEvent("RX_START", &_perf_rx_perf_cb.start_sync); + osal_createEvent("RX_END", &_perf_rx_perf_cb.end_sync); + + /* turn-on Rx test */ + _perf_rx_perf_cb.rx_test = TRUE; +} + +/* FUNCTION NAME: perf_rxCallback + * PURPOSE: + * To count the Rx-gpd for Rx-test. + * INPUT: + * len -- To check if the Rx-gpd length equals to test length. + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successful operation. + * NOTES: + * None + */ +NPS_ERROR_NO_T +perf_rxCallback( + const UI32_T len) +{ + /* check length */ + if (len == _perf_rx_perf_cb.target_len) + { + _perf_rx_perf_cb.recv_pass++; + } + else + { + if (_perf_rx_perf_cb.recv_fail++ >= PERF_RX_PERF_FAIL) + { + _perf_rx_perf_cb.recv_fail = 0; + } + } + + /* send signals */ + if (0 == _perf_rx_perf_cb.recv_pass) + { + ; /* do nothing */ + } + else if (1 == _perf_rx_perf_cb.recv_pass) + { + osal_triggerEvent(&_perf_rx_perf_cb.start_sync); + } + else if (_perf_rx_perf_cb.recv_pass == _perf_rx_perf_cb.target_num) + { + osal_triggerEvent(&_perf_rx_perf_cb.end_sync); + } + else if (0 == (_perf_rx_perf_cb.recv_pass % PERF_RX_PERF_MESG)) + { + printk("R"); + } + + return (NPS_E_OK); +} + +/* FUNCTION NAME: perf_rxTest + * PURPOSE: + * To check if Rx-test is going. + * INPUT: + * None + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successful operation. + * NOTES: + * None + */ +NPS_ERROR_NO_T +perf_rxTest(void) +{ + if (FALSE == _perf_rx_perf_cb.rx_test) + { + return (NPS_E_OTHERS); + } + + return (NPS_E_OK); +} + +/* FUNCTION NAME: perf_test + * PURPOSE: + * To do Tx-test or Rx-test. + * INPUT: + * len -- Test length + * tx_channel -- Test Tx channel numbers + * rx_channel -- Test Rx channel numbers + * test_skb -- Test GPD or SKB + * OUTPUT: + * None + * RETURN: + * NPS_E_OK -- Successful operation. + * NOTES: + * None + */ +NPS_ERROR_NO_T +perf_test( + UI32_T len, + UI32_T tx_channel, + UI32_T rx_channel, + BOOL_T test_skb) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + NPS_TIME_T start_time; + NPS_TIME_T end_time; + UI32_T unit = 0, channel = 0; + UI32_T tx_pkt_cnt = 0, tx_start_intr = 0, tx_end_intr = 0; + UI32_T rx_pkt_cnt = 0, rx_start_intr = 0, rx_end_intr = 0; + + if ((0 == tx_channel) && (0 == rx_channel)) + { + return (NPS_E_NOT_SUPPORT); + } + + /* start test */ + if ((tx_channel > 0) && (rx_channel > 0)) + { + _perf_getIntrCnt(unit, PERF_DIR_TX, &tx_start_intr); + _perf_getIntrCnt(unit, PERF_DIR_RX, &rx_start_intr); + _perf_txInit(unit, tx_channel, len, test_skb); + _perf_rxInit(unit, rx_channel, len); + + /* wait 1st Rx GPD done */ + osal_waitEvent(&_perf_rx_perf_cb.start_sync); + + /* ------------- in-time ------------- */ + osal_getTime(&start_time); + for (channel = 0; channel < tx_channel; channel++) + { + osal_triggerEvent(&_perf_tx_perf_cb.start_sync[channel]); + } + for (channel = 0; channel < tx_channel; channel++) + { + osal_waitEvent(&_perf_tx_perf_cb.end_sync[channel]); + tx_pkt_cnt += _perf_tx_perf_cb.send_ok[channel]; + } + rx_pkt_cnt = _perf_rx_perf_cb.recv_pass; + osal_getTime(&end_time); + /* ------------- in-time ------------- */ + + _perf_txDeinit(unit, tx_channel); + _perf_rxDeinit(unit, rx_channel); + _perf_getIntrCnt(unit, PERF_DIR_TX, &tx_end_intr); + _perf_getIntrCnt(unit, PERF_DIR_RX, &rx_end_intr); + + _perf_showPerf(PERF_DIR_TX, + tx_channel, len, tx_pkt_cnt, tx_end_intr - tx_start_intr, end_time - start_time); + + _perf_showPerf(PERF_DIR_RX, + rx_channel, len, rx_pkt_cnt, rx_end_intr - rx_start_intr, end_time - start_time); + } + else if (tx_channel > 0) + { + _perf_getIntrCnt(unit, PERF_DIR_TX, &tx_start_intr); + _perf_txInit(unit, tx_channel, len, test_skb); + + /* ------------- in-time ------------- */ + osal_getTime(&start_time); + for (channel = 0; channel < tx_channel; channel++) + { + osal_triggerEvent(&_perf_tx_perf_cb.start_sync[channel]); + } + for (channel = 0; channel < tx_channel; channel++) + { + osal_waitEvent(&_perf_tx_perf_cb.end_sync[channel]); + tx_pkt_cnt += _perf_tx_perf_cb.send_ok[channel]; + } + osal_getTime(&end_time); + /* ------------- in-time ------------- */ + + _perf_txDeinit(unit, tx_channel); + _perf_getIntrCnt(unit, PERF_DIR_TX, &tx_end_intr); + + _perf_showPerf(PERF_DIR_TX, + tx_channel, len, tx_pkt_cnt, tx_end_intr - tx_start_intr, end_time - start_time); + } + else if (rx_channel > 0) + { + _perf_getIntrCnt(unit, PERF_DIR_RX, &rx_start_intr); + _perf_rxInit(unit, rx_channel, len); + + /* wait 1st Rx GPD done */ + osal_waitEvent(&_perf_rx_perf_cb.start_sync); + + /* ------------- in-time ------------- */ + osal_getTime(&start_time); + osal_waitEvent(&_perf_rx_perf_cb.end_sync); + osal_getTime(&end_time); + /* ------------- in-time ------------- */ + + _perf_rxDeinit(unit, rx_channel); + _perf_getIntrCnt(unit, PERF_DIR_RX, &rx_end_intr); + + _perf_showPerf(PERF_DIR_RX, + rx_channel, len, PERF_RX_PERF_NUM, rx_end_intr - rx_start_intr, end_time - start_time); + } + + return (rc); +} + diff --git a/platform/nephos/nephos-modules/modules/src/osal_isymbol.c b/platform/nephos/nephos-modules/modules/src/osal_isymbol.c new file mode 100755 index 00000000000..c23cc70bed2 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/osal_isymbol.c @@ -0,0 +1,38 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: osal_isymbol.c +* PURPOSE: +* It provide global OSAL symbol export for linux kernel module +* NOTES: +*/ +#include +#include + +/* ----------------------------------------------------- */ +#include +/* dma */ +extern struct pci_dev *_ptr_ext_pci_dev; +EXPORT_SYMBOL(_ptr_ext_pci_dev); + +#if defined(NPS_LINUX_USER_MODE) +EXPORT_SYMBOL(osal_mdc_readPciReg); +EXPORT_SYMBOL(osal_mdc_writePciReg); +#if defined(NPS_EN_NETIF) +/* intr */ +/* for kernel module, this API will be exported by script with other OSAL functions in osal_symbol.c */ +EXPORT_SYMBOL(osal_mdc_registerIsr); +#endif +#endif diff --git a/platform/nephos/nephos-modules/modules/src/osal_mdc.c b/platform/nephos/nephos-modules/modules/src/osal_mdc.c new file mode 100755 index 00000000000..3dad3173ac7 --- /dev/null +++ b/platform/nephos/nephos-modules/modules/src/osal_mdc.c @@ -0,0 +1,2359 @@ +/* Copyright (C) 2019 Nephos, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 along with this program. + */ + +/* FILE NAME: osal_mdc.c + * PURPOSE: + * 1. Provide device operate from AML interface + * NOTES: + * + */ + +/* INCLUDE FILE DECLARATIONS + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#include +#include +#include +#include + +#if defined(NPS_LINUX_USER_MODE) +#include + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0) +#include +#else +#include +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#endif + +/* #define OSAL_MDC_EN_MSI */ +/* #define OSAL_MDC_DMA_RESERVED_MEM_CACHEABLE */ +/* #define OSAL_MDC_EN_TEST */ + +/* NAMING CONSTANT DECLARATIONS + */ +#define OSAL_MDC_PCI_BAR0_OFFSET (0x0) +#define OSAL_MDC_ERR printk + +/* MACRO FUNCTION DECLARATIONS + */ + +/* DATA TYPE DECLARATIONS + */ +typedef struct +{ + UI32_T unit; + struct pci_dev *ptr_pci_dev; + UI32_T *ptr_mmio_virt_addr; + int irq; + AML_DEV_ISR_FUNC_T isr_callback; + void *ptr_isr_data; + +} OSAL_MDC_DEV_T; + +typedef struct +{ + OSAL_MDC_DEV_T dev[NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM]; + UI32_T dev_num; + OSAL_MDC_DMA_INFO_T dma_info; + +} OSAL_MDC_CB_T; + +#if defined(NPS_LINUX_USER_MODE) + +typedef struct +{ + OSAL_MDC_IOCTL_CALLBACK_FUNC_T callback[OSAL_MDC_IOCTL_TYPE_LAST]; + +} OSAL_MDC_IOCTL_CB_T; + +#if !defined(NPS_EN_DMA_RESERVED) +typedef struct +{ + NPS_ADDR_T phy_addr; + UI32_T size; + struct list_head list; + +} OSAL_MDC_USER_MODE_DMA_NODE_T; +#endif + +#endif + + +#if defined(NPS_LINUX_KERNEL_MODE) + +/* re-define the interface to align OSAL_MDC's implementation with the prototype of CMLIB */ +#define osal_mdc_list_create(__capa__, __type__, __name__, __list__) _osal_mdc_list_create(__capa__, __list__) +#define osal_mdc_list_destroy(__list__, __callback__) _osal_mdc_list_destroy(__list__) +#define osal_mdc_list_getNodeData(__list__, __node__, __data__) _osal_mdc_list_getNodeData(__list__, __node__, __data__) +#define osal_mdc_list_next(__list__, __node__, __next__) _osal_mdc_list_next(__list__, __node__, __next__) +#define osal_mdc_list_locateHead(__list__, __node__) _osal_mdc_list_locateHead(__list__, __node__) +#define osal_mdc_list_insertToHead(__list__, __data__) _osal_mdc_list_insertToHead(__list__, __data__) +#define osal_mdc_list_deleteByData(__list__, __data__) _osal_mdc_list_deleteByData(__list__, __data__) + +#if defined(NPS_EN_DMA_RESERVED) +#define osal_mdc_list_insertBefore(__list__, __node__, __data__) _osal_mdc_list_insertBefore(__list__, __node__, __data__) +#define osal_mdc_list_prev(__list__, __node__, __prev__) _osal_mdc_list_prev(__list__, __node__, __prev__) +#endif + +#define OSAL_MDC_LIST_TYPE_DOUBLE (1) /* don't care the type, always be double */ +#define OSAL_MDC_LIST_TYPE_SINGLE (0) /* don't care the type, always be double */ + +static NPS_ERROR_NO_T +_osal_mdc_list_create( + const UI32_T capacity, + OSAL_MDC_LIST_T **pptr_list ) +{ + NPS_ERROR_NO_T rc = NPS_E_NO_MEMORY; + + *pptr_list = NULL; + + *pptr_list = osal_alloc(sizeof(OSAL_MDC_LIST_T)); + if (NULL != *pptr_list) + { + (*pptr_list)->capacity = capacity; + (*pptr_list)->node_cnt = 0; + (*pptr_list)->ptr_head_node = NULL; + (*pptr_list)->ptr_tail_node = NULL; + rc = NPS_E_OK; + } + + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_list_destroy( + OSAL_MDC_LIST_T *ptr_list ) +{ + OSAL_MDC_LIST_NODE_T *ptr_cur_node, *ptr_next_node; + NPS_ERROR_NO_T rc = NPS_E_OTHERS; + + if (NULL != ptr_list) + { + if (ptr_list->node_cnt != 0) + { + OSAL_MDC_ERR("dma list not empty, node num=%d\n", + ptr_list->node_cnt); + ptr_cur_node = ptr_list->ptr_head_node; + while(NULL != ptr_cur_node) + { + ptr_next_node = ptr_cur_node->ptr_next; + osal_free(ptr_cur_node); + ptr_list->node_cnt--; + ptr_cur_node = ptr_next_node; + } + } + + osal_free(ptr_list); + rc = NPS_E_OK; + } + + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_list_getNodeData( + OSAL_MDC_LIST_T *ptr_list, + OSAL_MDC_LIST_NODE_T *ptr_node, + void **pptr_node_data ) +{ + NPS_ERROR_NO_T rc = NPS_E_OTHERS; + + if (NULL != ptr_list) + { + if (NULL != ptr_node) + { + *pptr_node_data = ptr_node->ptr_data; + rc = NPS_E_OK; + } + } + + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_list_insertToHead( + OSAL_MDC_LIST_T *ptr_list, + void *ptr_data ) +{ + OSAL_MDC_LIST_NODE_T *ptr_new_node = NULL; + NPS_ERROR_NO_T rc = NPS_E_OTHERS; + + if (NULL != ptr_list) + { + ptr_new_node = osal_alloc(sizeof(OSAL_MDC_LIST_NODE_T)); + if (NULL != ptr_new_node) + { + ptr_new_node->ptr_data = ptr_data; + + /* no former node */ + ptr_new_node->ptr_prev = NULL; + + if (NULL != ptr_list->ptr_head_node) + { + ptr_list->ptr_head_node->ptr_prev = ptr_new_node; + ptr_new_node->ptr_next = ptr_list->ptr_head_node; + } + else + { + /* 1st node insertion */ + ptr_list->ptr_tail_node = ptr_new_node; + ptr_new_node->ptr_next = NULL; + } + + ptr_list->ptr_head_node = ptr_new_node; + ptr_list->node_cnt++; + rc = NPS_E_OK; + } + } + + return (rc); +} + +#if defined(NPS_EN_DMA_RESERVED) +static NPS_ERROR_NO_T +_osal_mdc_list_insertBefore( + OSAL_MDC_LIST_T *ptr_list, + OSAL_MDC_LIST_NODE_T *ptr_node, + void *ptr_data ) +{ + OSAL_MDC_LIST_NODE_T *ptr_new_node = NULL; + OSAL_MDC_LIST_NODE_T *ptr_prev_node = ptr_node->ptr_prev; + NPS_ERROR_NO_T rc = NPS_E_OTHERS; + + if (NULL != ptr_list) + { + if (NULL != ptr_node) + { + ptr_new_node = osal_alloc(sizeof(OSAL_MDC_LIST_NODE_T)); + if (NULL != ptr_new_node) + { + ptr_new_node->ptr_data = ptr_data; + + /* location */ + if (NULL != ptr_prev_node) + { + ptr_prev_node->ptr_next = ptr_new_node; + } + ptr_new_node->ptr_prev = ptr_prev_node; + ptr_new_node->ptr_next = ptr_node; + ptr_node->ptr_prev = ptr_new_node; + + /* update head if necessary */ + if (ptr_list->ptr_head_node == ptr_node) + { + ptr_list->ptr_head_node = ptr_new_node; + } + + ptr_list->node_cnt++; + rc = NPS_E_OK; + } + } + } + + return (rc); +} +#endif + +static NPS_ERROR_NO_T +_osal_mdc_list_deleteTargetNode( + OSAL_MDC_LIST_T *ptr_list, + OSAL_MDC_LIST_NODE_T *ptr_target_node) +{ + OSAL_MDC_LIST_NODE_T *ptr_prev_node = ptr_target_node->ptr_prev; + OSAL_MDC_LIST_NODE_T *ptr_next_node = ptr_target_node->ptr_next; + + if (ptr_target_node == ptr_list->ptr_head_node) + { + ptr_list->ptr_head_node = ptr_next_node; + if (NULL != ptr_next_node) + { + ptr_next_node->ptr_prev = NULL; + } + else + { + /* there's only 1 node in the list, and it gets removed */ + ptr_list->ptr_tail_node = NULL; + } + } + else if (ptr_target_node == ptr_list->ptr_tail_node) + { + /* at least 2 nodes in the list, and the target node locates tail */ + ptr_list->ptr_tail_node = ptr_prev_node; + ptr_prev_node->ptr_next = NULL; + } + else + { + /* intermediate node */ + ptr_prev_node->ptr_next = ptr_next_node; + ptr_next_node->ptr_prev = ptr_prev_node; + } + + osal_free(ptr_target_node); + ptr_list->node_cnt--; + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_osal_mdc_list_deleteByData( + OSAL_MDC_LIST_T *ptr_list, + void *ptr_delete_data) +{ + OSAL_MDC_LIST_NODE_T *ptr_tmp_node; + NPS_ERROR_NO_T rc = NPS_E_OTHERS; + + if (NULL != ptr_list) + { + ptr_tmp_node = ptr_list->ptr_head_node; + while (NULL != ptr_tmp_node) + { + if (ptr_tmp_node->ptr_data == ptr_delete_data) + { + rc = _osal_mdc_list_deleteTargetNode(ptr_list, ptr_tmp_node); + break; + } + else + { + ptr_tmp_node = ptr_tmp_node->ptr_next; + } + } + } + + return (rc); +} + + +static NPS_ERROR_NO_T +_osal_mdc_list_locateHead( + OSAL_MDC_LIST_T *ptr_list, + OSAL_MDC_LIST_NODE_T **pptr_node ) +{ + NPS_ERROR_NO_T rc = NPS_E_OTHERS; + + if (NULL != ptr_list) + { + *pptr_node = ptr_list->ptr_head_node; + if (NULL != *pptr_node) + { + rc = NPS_E_OK; + } + } + + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_list_next( + OSAL_MDC_LIST_T *ptr_list, + OSAL_MDC_LIST_NODE_T *ptr_node, + OSAL_MDC_LIST_NODE_T **pptr_next_node ) +{ + NPS_ERROR_NO_T rc = NPS_E_OTHERS; + + if (NULL != ptr_list) + { + if (NULL != ptr_node) + { + *pptr_next_node = ptr_node->ptr_next; + if (NULL != *pptr_next_node) + { + rc = NPS_E_OK; + } + } + } + + return (rc); +} + +#if defined(NPS_EN_DMA_RESERVED) +static NPS_ERROR_NO_T +_osal_mdc_list_prev( + OSAL_MDC_LIST_T *ptr_list, + OSAL_MDC_LIST_NODE_T *ptr_node, + OSAL_MDC_LIST_NODE_T **pptr_prev_node ) +{ + NPS_ERROR_NO_T rc = NPS_E_OTHERS; + + if (NULL != ptr_list) + { + if (NULL != ptr_node) + { + *pptr_prev_node = ptr_node->ptr_prev; + if (NULL != *pptr_prev_node) + { + rc = NPS_E_OK; + } + } + } + + return (rc); +} +#endif /* End of defined(NPS_EN_DMA_RESERVED) */ + +#endif /* End if defined(NPS_LINUX_KERNEL_MODE) */ + +/* GLOBAL VARIABLE DECLARATIONS + */ +static OSAL_MDC_CB_T _osal_mdc_cb; + +/* To let system callback function to access AML database */ +static AML_DEV_T *_ptr_osal_mdc_dev; + +/* Interface */ +struct pci_dev *_ptr_ext_pci_dev; + + +/* STATIC VARIABLE DECLARATIONS + */ +/* --------------------------------------------------------------------------- I2C interface */ +#if defined(AML_EN_I2C) +extern NPS_ERROR_NO_T +dev_switch_readBuffer( + const UI32_T addr, + const UI32_T addr_len, + UI8_T *ptr_buf, + const UI32_T buf_len); + +extern NPS_ERROR_NO_T +dev_switch_writeBuffer( + const UI32_T addr, + const UI32_T addr_len, + const UI8_T *ptr_buf, + const UI32_T buf_len); + +static NPS_ERROR_NO_T +_osal_mdc_readI2cReg( + const UI32_T unit, + const UI32_T offset, + UI32_T *ptr_data, + const UI32_T len) +{ + return dev_switch_readBuffer(offset, sizeof(offset), (UI8_T *)ptr_data, len); +} + +static NPS_ERROR_NO_T +_osal_mdc_writeI2cReg( + const UI32_T unit, + const UI32_T offset, + const UI32_T *ptr_data, + const UI32_T len) +{ + return dev_switch_writeBuffer(offset, sizeof(offset), (UI8_T *)ptr_data, len); +} + +static NPS_ERROR_NO_T +_osal_mdc_probeI2cDevice(void) +{ + /* I2C interface will be probed in BSP. */ + _ptr_osal_mdc_dev->if_type = AML_DEV_TYPE_I2C; + _ptr_osal_mdc_dev->access.read_callback = _osal_mdc_readI2cReg; + _ptr_osal_mdc_dev->access.write_callback = _osal_mdc_writeI2cReg; + + _ptr_osal_mdc_dev->id.device = HAL_DEVICE_ID_MT3258; + _ptr_osal_mdc_dev->id.vendor = HAL_MTK_VENDOR_ID; + _ptr_osal_mdc_dev->id.revision = HAL_REVISION_ID_E2; + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_osal_mdc_removeI2cDevice(void) +{ + /* I2C interface will be removed in BSP. */ + return (NPS_E_OK); +} + +/* --------------------------------------------------------------------------- PCI interface */ +#else + +static NPS_ERROR_NO_T +_osal_mdc_getPciMmioInfo( + struct pci_dev *pdev, + UI32_T **pptr_base_addr) +{ + NPS_ERROR_NO_T rc = NPS_E_OTHERS; + NPS_ADDR_T phy_addr; + UI32_T reg_space_sz; + + phy_addr = pci_resource_start(pdev, OSAL_MDC_PCI_BAR0_OFFSET); + reg_space_sz = pci_resource_len(pdev, OSAL_MDC_PCI_BAR0_OFFSET); + + if (0 == pci_request_region(pdev, OSAL_MDC_PCI_BAR0_OFFSET, OSAL_MDC_DRIVER_NAME)) + { + *pptr_base_addr = ioremap_nocache(phy_addr, reg_space_sz); + if (NULL != *pptr_base_addr) + { + rc = NPS_E_OK; + } + } + return (rc); +} + +NPS_ERROR_NO_T +osal_mdc_readPciReg( + const UI32_T unit, + const UI32_T offset, + UI32_T *ptr_data, + const UI32_T len) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + UI32_T idx; + UI32_T count; + volatile UI32_T *ptr_base_addr = _osal_mdc_cb.dev[unit].ptr_mmio_virt_addr; + + if (NULL != ptr_base_addr) + { + if (OSAL_MDC_PCI_BUS_WIDTH == len) + { + *ptr_data = *((UI32_T *)((NPS_HUGE_T)ptr_base_addr + offset)); + } + else + { + if (0 == (len % OSAL_MDC_PCI_BUS_WIDTH)) + { + count = len / OSAL_MDC_PCI_BUS_WIDTH; + for (idx = 0; idx < count; idx++) + { + *(ptr_data + idx) = *((UI32_T *)((NPS_HUGE_T)ptr_base_addr + offset + idx * 4)); + } + } + else + { + rc = NPS_E_OTHERS; + } + } + } + else + { + rc = NPS_E_NOT_INITED; + } + + return (rc); +} + +NPS_ERROR_NO_T +osal_mdc_writePciReg( + const UI32_T unit, + const UI32_T offset, + const UI32_T *ptr_data, + const UI32_T len) +{ + UI32_T idx; + UI32_T count; + volatile UI32_T *ptr_base_addr = _osal_mdc_cb.dev[unit].ptr_mmio_virt_addr; + NPS_ERROR_NO_T rc = NPS_E_OK; + + if (NULL != ptr_base_addr) + { + if (OSAL_MDC_PCI_BUS_WIDTH == len) + { + *((UI32_T *)((NPS_HUGE_T)ptr_base_addr + offset)) = *ptr_data; + } + else + { + if (0 == (len % OSAL_MDC_PCI_BUS_WIDTH)) + { + count = len / OSAL_MDC_PCI_BUS_WIDTH; + for (idx = 0; idx < count; idx++) + { + *((UI32_T *)((NPS_HUGE_T)ptr_base_addr + offset + idx * 4)) = *(ptr_data + idx); + } + } + else + { + rc = NPS_E_OTHERS; + } + } + } + else + { + rc = NPS_E_NOT_INITED; + } + + return (rc); +} + +static int +_osal_mdc_probePciCallback( + struct pci_dev *pdev, + const struct pci_device_id *id) +{ + int linux_rc; + UI16_T device_id; + UI16_T vendor_id; + UI8_T revision_id; + NPS_ERROR_NO_T rc = NPS_E_OK; + + linux_rc = pci_enable_device(pdev); + if (0 == linux_rc) + { + _ptr_osal_mdc_dev->if_type = AML_DEV_TYPE_PCI; + + pci_read_config_word(pdev, PCI_DEVICE_ID, &device_id); + pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id); + pci_read_config_byte(pdev, PCI_REVISION_ID, &revision_id); + + _ptr_osal_mdc_dev->id.device = (UI32_T)device_id; + _ptr_osal_mdc_dev->id.vendor = (UI32_T)vendor_id; + _ptr_osal_mdc_dev->id.revision = (UI32_T)revision_id; + +#if defined(NPS_LINUX_KERNEL_MODE) + _ptr_osal_mdc_dev->access.read_callback = osal_mdc_readPciReg; + _ptr_osal_mdc_dev->access.write_callback = osal_mdc_writePciReg; +#endif + + rc = _osal_mdc_getPciMmioInfo(pdev, &_osal_mdc_cb.dev[_osal_mdc_cb.dev_num].ptr_mmio_virt_addr); + if (NPS_E_OK == rc) + { + /* Save the database to pdev structure for system callback to release recource, + * such like disconnecting ISR etc. + */ + _osal_mdc_cb.dev[_osal_mdc_cb.dev_num].irq = pdev->irq; + _osal_mdc_cb.dev[_osal_mdc_cb.dev_num].ptr_pci_dev = pdev; + _osal_mdc_cb.dev[_osal_mdc_cb.dev_num].unit = _osal_mdc_cb.dev_num; + + pci_set_drvdata(pdev, &_osal_mdc_cb.dev[_osal_mdc_cb.dev_num]); + + /* To set the bus master bit on device to enable the DMA transaction from PCIe EP to RC + * The bus master bit gets cleared when pci_disable_device() is called + */ + pci_set_master(pdev); + +#if !defined(NPS_EN_DMA_RESERVED) + if (NULL == _osal_mdc_cb.dma_info.ptr_dma_dev) + { + /* This variable is for dma_alloc_coherent */ + _osal_mdc_cb.dma_info.ptr_dma_dev = &pdev->dev; + } +#endif + _osal_mdc_cb.dev_num++; + _ptr_osal_mdc_dev++; + } + } + else + { + OSAL_MDC_ERR("enable pci dev failed, linux_rc=%d\n", linux_rc); + } + + return (0); +} + +static void +_osal_mdc_removePciCallback( + struct pci_dev *pdev) +{ + OSAL_MDC_DEV_T *ptr_dev = (OSAL_MDC_DEV_T *)pci_get_drvdata(pdev); + + iounmap(ptr_dev->ptr_mmio_virt_addr); + pci_release_region(pdev, OSAL_MDC_PCI_BAR0_OFFSET); + pci_disable_device(pdev); +} + +static struct pci_device_id _osal_mdc_id_table[] = +{ + {PCI_DEVICE(HAL_MTK_VENDOR_ID, PCI_ANY_ID)}, + {PCI_DEVICE(HAL_NP_VENDOR_ID, PCI_ANY_ID)}, +}; + +static struct pci_driver _osal_mdc_pci_driver = +{ + .name = OSAL_MDC_DRIVER_NAME, + .id_table = _osal_mdc_id_table, + .probe = _osal_mdc_probePciCallback, + .remove = _osal_mdc_removePciCallback, +}; + +static NPS_ERROR_NO_T +_osal_mdc_probePciDevice(void) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + + if (pci_register_driver(&_osal_mdc_pci_driver) < 0) + { + rc = NPS_E_OTHERS; + } + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_removePciDevice(void) +{ + pci_unregister_driver(&_osal_mdc_pci_driver); + return (NPS_E_OK); +} + +#endif /* End of AML_EN_I2C */ + +/* --------------------------------------------------------------------------- DMA */ +#if defined(NPS_LINUX_KERNEL_MODE) + +static NPS_ERROR_NO_T +_osal_mdc_searchDmaVirtAddr( + OSAL_MDC_LIST_T *ptr_dma_list, + const void *ptr_virt_addr, + OSAL_MDC_LIST_NODE_T **pptr_node, + OSAL_MDC_DMA_NODE_T **pptr_node_data) +{ + OSAL_MDC_LIST_NODE_T *ptr_curr_node; + OSAL_MDC_DMA_NODE_T *ptr_curr_node_data; + NPS_ERROR_NO_T rc; + + rc = osal_mdc_list_locateHead(ptr_dma_list, &ptr_curr_node); + while (NPS_E_OK == rc) + { + rc = osal_mdc_list_getNodeData(ptr_dma_list, ptr_curr_node, (void **)&ptr_curr_node_data); + if (NPS_E_OK == rc) + { + if (ptr_curr_node_data->ptr_virt_addr == ptr_virt_addr) + { + *pptr_node = ptr_curr_node; + *pptr_node_data = ptr_curr_node_data; + break; + } + rc = osal_mdc_list_next(ptr_dma_list, ptr_curr_node, &ptr_curr_node); + } + } + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_destroyDmaNodeList( + OSAL_MDC_DMA_INFO_T *ptr_dma_info) +{ + OSAL_MDC_LIST_T *ptr_dma_list = (OSAL_MDC_LIST_T *)ptr_dma_info->ptr_dma_list; + OSAL_MDC_LIST_NODE_T *ptr_curr_node = NULL; + OSAL_MDC_DMA_NODE_T *ptr_curr_node_data = NULL; + NPS_ERROR_NO_T rc = NPS_E_NOT_INITED; + + if (NULL != ptr_dma_list) + { + rc = osal_mdc_list_locateHead(ptr_dma_list, &ptr_curr_node); + while (NPS_E_OK == rc) + { + rc = osal_mdc_list_getNodeData(ptr_dma_list, ptr_curr_node, (void **)&ptr_curr_node_data); + if ((NPS_E_OK == rc) && (NULL != ptr_curr_node_data)) + { + rc = osal_mdc_list_deleteByData(ptr_dma_list, ptr_curr_node_data); + if (NPS_E_OK == rc) + { + kfree(ptr_curr_node_data); + } + } + rc = osal_mdc_list_locateHead(ptr_dma_list, &ptr_curr_node); + } + rc = osal_mdc_list_destroy(ptr_dma_list, NULL); + if (NPS_E_OK == rc) + { + ptr_dma_info->ptr_dma_list = NULL; + } + } + return (rc); +} + +#endif /* End of NPS_LINUX_KERNEL_MODE */ + +#if defined(NPS_EN_DMA_RESERVED) + +#if defined(NPS_LINUX_KERNEL_MODE) + +#if defined(OSAL_MDC_EN_TEST) +static NPS_ERROR_NO_T +_osal_mdc_dumpRsrvDmaList(void) +{ + OSAL_MDC_DMA_INFO_T *ptr_dma_info = &_osal_mdc_cb.dma_info; + OSAL_MDC_LIST_NODE_T *ptr_curr_node; + OSAL_MDC_DMA_NODE_T *ptr_curr_node_data; + UI32_T node = 0; + NPS_ERROR_NO_T rc = NPS_E_OK; + + rc = osal_mdc_list_locateHead((OSAL_MDC_LIST_T *)ptr_dma_info->ptr_dma_list, + &ptr_curr_node); + while (NPS_E_OK == rc) + { + rc = osal_mdc_list_getNodeData((OSAL_MDC_LIST_T *)ptr_dma_info->ptr_dma_list, + ptr_curr_node, (void **)&ptr_curr_node_data); + if (NPS_E_OK == rc) + { + OSAL_MDC_ERR( + "node %d. virt addr=%p, phy addr=%p, size=%d, avbl=%d\n", node, + ptr_curr_node_data->ptr_virt_addr, ptr_curr_node_data->phy_addr, + ptr_curr_node_data->size, ptr_curr_node_data->available); + } + rc = osal_mdc_list_next((OSAL_MDC_LIST_T *)ptr_dma_info->ptr_dma_list, + ptr_curr_node, &ptr_curr_node); + node++; + } + return (rc); +} +#endif + +static NPS_ERROR_NO_T +_osal_mdc_createRsrvDmaNodeList( + OSAL_MDC_DMA_INFO_T *ptr_dma_info) +{ + OSAL_MDC_DMA_NODE_T *ptr_node_data; + NPS_ERROR_NO_T rc; + + rc = osal_mdc_list_create(OSAL_MDC_DMA_LIST_SZ_UNLIMITED, + OSAL_MDC_LIST_TYPE_DOUBLE, + OSAL_MDC_DMA_LIST_NAME, + (OSAL_MDC_LIST_T **)&ptr_dma_info->ptr_dma_list); + if (NPS_E_OK == rc) + { + /* The first node, which contains all of the reserved memory */ + ptr_node_data = kmalloc(sizeof(OSAL_MDC_DMA_NODE_T), GFP_KERNEL); + if (NULL != ptr_node_data) + { + ptr_node_data->ptr_virt_addr = ptr_dma_info->ptr_rsrv_virt_addr; + ptr_node_data->phy_addr = ptr_dma_info->rsrv_phy_addr; + ptr_node_data->size = ptr_dma_info->rsrv_size; + ptr_node_data->available = TRUE; + rc = osal_mdc_list_insertToHead((OSAL_MDC_LIST_T *)ptr_dma_info->ptr_dma_list, + ptr_node_data); + } + else + { + rc = NPS_E_NO_MEMORY; + } + } + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_searchAvblRsrvDmaNode( + OSAL_MDC_LIST_T *ptr_dma_list, + const UI32_T size, + OSAL_MDC_LIST_NODE_T **pptr_avbl_node) +{ + OSAL_MDC_LIST_NODE_T *ptr_curr_node; + OSAL_MDC_DMA_NODE_T *ptr_curr_node_data; + NPS_ERROR_NO_T rc; + + rc = osal_mdc_list_locateHead(ptr_dma_list, &ptr_curr_node); + while (NPS_E_OK == rc) + { + rc = osal_mdc_list_getNodeData(ptr_dma_list, ptr_curr_node, (void **)&ptr_curr_node_data); + if (NPS_E_OK == rc) + { + if ((TRUE == ptr_curr_node_data->available) && (ptr_curr_node_data->size >= size)) + { + *pptr_avbl_node = ptr_curr_node; + break; + } + } + rc = osal_mdc_list_next(ptr_dma_list, ptr_curr_node, &ptr_curr_node); + } + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_splitRsrvDmaNodes( + OSAL_MDC_LIST_T *ptr_dma_list, + OSAL_MDC_LIST_NODE_T *ptr_ori_node, + const UI32_T size, + OSAL_MDC_DMA_NODE_T **pptr_new_node_data) +{ + OSAL_MDC_DMA_NODE_T *ptr_ori_node_data; + NPS_ERROR_NO_T rc; + + rc = osal_mdc_list_getNodeData(ptr_dma_list, ptr_ori_node, (void **)&ptr_ori_node_data); + + if (NPS_E_OK == rc) + { + *pptr_new_node_data = kmalloc(sizeof(OSAL_MDC_DMA_NODE_T), GFP_KERNEL); + + /* Create a new node */ + (*pptr_new_node_data)->size = size; + (*pptr_new_node_data)->phy_addr = ptr_ori_node_data->phy_addr; + (*pptr_new_node_data)->ptr_virt_addr = ptr_ori_node_data->ptr_virt_addr; + (*pptr_new_node_data)->available = TRUE; + + /* Update the original node */ + ptr_ori_node_data->size -= size; + ptr_ori_node_data->phy_addr += size; + ptr_ori_node_data->ptr_virt_addr = + (void *)((NPS_HUGE_T)ptr_ori_node_data->ptr_virt_addr + (NPS_HUGE_T)size); + + rc = osal_mdc_list_insertBefore(ptr_dma_list, ptr_ori_node, (void *)*pptr_new_node_data); + if (NPS_E_OK != rc) + { + OSAL_MDC_ERR("insert rsrv dma node to list failed, size=%d, rc=%d\n", size, rc); + /* Recovery */ + ptr_ori_node_data->size += size; + ptr_ori_node_data->phy_addr -= size; + ptr_ori_node_data->ptr_virt_addr = + (void *)((NPS_HUGE_T)ptr_ori_node_data->ptr_virt_addr - (NPS_HUGE_T)size); + kfree(*pptr_new_node_data); + } + } + return (rc); +} + +static void * +_osal_mdc_allocRsrvDmaMem( + OSAL_MDC_DMA_INFO_T *ptr_dma_info, + const UI32_T size) +{ + OSAL_MDC_LIST_T *ptr_dma_list = (OSAL_MDC_LIST_T *)ptr_dma_info->ptr_dma_list; + OSAL_MDC_LIST_NODE_T *ptr_node = NULL; + OSAL_MDC_DMA_NODE_T *ptr_node_data; + OSAL_MDC_DMA_NODE_T *ptr_new_node_data; + void *ptr_virt_addr = NULL; + NPS_ERROR_NO_T rc; + + rc = _osal_mdc_searchAvblRsrvDmaNode(ptr_dma_list, size, &ptr_node); + if (NPS_E_OK == rc) + { + rc = osal_mdc_list_getNodeData(ptr_dma_list, ptr_node, (void **)&ptr_node_data); + if (NPS_E_OK == rc) + { + /* If the node size just fit the user's requirement, just give it to user */ + if (ptr_node_data->size == size) + { + ptr_node_data->available = FALSE; + ptr_virt_addr = ptr_node_data->ptr_virt_addr; + } + /* or split a new node with user required size. */ + else + { + rc = _osal_mdc_splitRsrvDmaNodes(ptr_dma_list, ptr_node, size, &ptr_new_node_data); + if (NPS_E_OK == rc) + { + ptr_new_node_data->available = FALSE; + ptr_virt_addr = ptr_new_node_data->ptr_virt_addr; + } + } + } + } + return (ptr_virt_addr); +} + +static NPS_ERROR_NO_T +_osal_mdc_mergeTwoRsrvDmaNodes( + OSAL_MDC_LIST_T *ptr_dma_list, + OSAL_MDC_DMA_NODE_T *ptr_first_node_data, + OSAL_MDC_DMA_NODE_T *ptr_second_node_data) +{ + ptr_first_node_data->size += ptr_second_node_data->size; + + osal_mdc_list_deleteByData(ptr_dma_list, ptr_second_node_data); + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_osal_mdc_mergeRsrvDmaNodes( + OSAL_MDC_LIST_T *ptr_dma_list, + OSAL_MDC_LIST_NODE_T *ptr_curr_node) +{ + OSAL_MDC_LIST_NODE_T *ptr_prev_node; + OSAL_MDC_LIST_NODE_T *ptr_next_node; + OSAL_MDC_DMA_NODE_T *ptr_curr_node_data; + OSAL_MDC_DMA_NODE_T *ptr_prev_node_data; + OSAL_MDC_DMA_NODE_T *ptr_next_node_data; + NPS_ERROR_NO_T rc; + + rc = osal_mdc_list_getNodeData(ptr_dma_list, ptr_curr_node, (void **)&ptr_curr_node_data); + if (NPS_E_OK == rc) + { + /* First, check if the previous node is available */ + rc = osal_mdc_list_prev(ptr_dma_list, ptr_curr_node, &ptr_prev_node); + if (NPS_E_OK == rc) + { + osal_mdc_list_getNodeData(ptr_dma_list, ptr_prev_node, (void **)&ptr_prev_node_data); + if (TRUE == ptr_prev_node_data->available) + { + _osal_mdc_mergeTwoRsrvDmaNodes(ptr_dma_list, ptr_prev_node_data, ptr_curr_node_data); + ptr_curr_node = ptr_prev_node; + ptr_curr_node_data = ptr_prev_node_data; + } + } + + /* then, check if the next node is available */ + rc = osal_mdc_list_next(ptr_dma_list, ptr_curr_node, &ptr_next_node); + if (NPS_E_OK == rc) + { + rc = osal_mdc_list_getNodeData(ptr_dma_list, ptr_next_node, (void **)&ptr_next_node_data); + if (NPS_E_OK == rc) + { + if (TRUE == ptr_next_node_data->available) + { + _osal_mdc_mergeTwoRsrvDmaNodes(ptr_dma_list, ptr_curr_node_data, ptr_next_node_data); + } + } + } + } + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_freeRsrvDmaMem( + OSAL_MDC_DMA_INFO_T *ptr_dma_info, + void *ptr_virt_addr) +{ + OSAL_MDC_LIST_T *ptr_dma_list = (OSAL_MDC_LIST_T *)ptr_dma_info->ptr_dma_list; + OSAL_MDC_LIST_NODE_T *ptr_node = NULL; + OSAL_MDC_DMA_NODE_T *ptr_node_data = NULL; + NPS_ERROR_NO_T rc; + + rc = _osal_mdc_searchDmaVirtAddr(ptr_dma_list, ptr_virt_addr, &ptr_node, &ptr_node_data); + if (NPS_E_OK == rc) + { + ptr_node_data->available = TRUE; + _osal_mdc_mergeRsrvDmaNodes(ptr_dma_list, ptr_node); + } + return (rc); +} + +#endif /* End of NPS_LINUX_KERNEL_MODE */ + +static NPS_ERROR_NO_T +_osal_mdc_initRsrvDmaMem( + OSAL_MDC_DMA_INFO_T *ptr_dma_info) +{ + struct resource *ptr_res; + NPS_ERROR_NO_T rc = NPS_E_OK; + + ptr_dma_info->rsrv_size = (NPS_ADDR_T)NPS_DMA_RESERVED_SZ * 1024 * 1024; + ptr_dma_info->rsrv_phy_addr = (NPS_ADDR_T)NPS_OS_MEMORY_SZ * 1024 * 1024; + ptr_res = request_mem_region(ptr_dma_info->rsrv_phy_addr, + ptr_dma_info->rsrv_size, "nps_rsrv_mem"); + if (NULL != ptr_res) + { +#if defined(OSAL_MDC_DMA_RESERVED_MEM_CACHEABLE) + ptr_dma_info->ptr_rsrv_virt_addr = ioremap(ptr_dma_info->rsrv_phy_addr, + ptr_dma_info->rsrv_size); +#else + ptr_dma_info->ptr_rsrv_virt_addr = ioremap_nocache(ptr_dma_info->rsrv_phy_addr, + ptr_dma_info->rsrv_size); +#endif + if (NULL == ptr_dma_info->ptr_rsrv_virt_addr) + { +#if defined(NPS_EN_64BIT_ADDR) || defined(NPS_EN_HOST_64_BIT_BIG_ENDIAN) || defined(NPS_EN_HOST_64_BIT_LITTLE_ENDIAN) + OSAL_MDC_ERR( + "ioremap_nocache() failed, phy addr=0x%llx, size=%llu\n", + ptr_dma_info->rsrv_phy_addr, ptr_dma_info->rsrv_size); +#else + OSAL_MDC_ERR( + "ioremap_nocache() failed, phy addr=0x%x, size=%u\n", + ptr_dma_info->rsrv_phy_addr, ptr_dma_info->rsrv_size); +#endif + rc = NPS_E_OTHERS; + } + } + else + { +#if defined(NPS_EN_64BIT_ADDR) || defined(NPS_EN_HOST_64_BIT_BIG_ENDIAN) || defined(NPS_EN_HOST_64_BIT_LITTLE_ENDIAN) + OSAL_MDC_ERR( + "request_mem_region() failed, phy addr=0x%llx, size=%llu\n", + ptr_dma_info->rsrv_phy_addr, ptr_dma_info->rsrv_size); +#else + OSAL_MDC_ERR( + "request_mem_region() failed, phy addr=0x%x, size=%u\n", + ptr_dma_info->rsrv_phy_addr, ptr_dma_info->rsrv_size); +#endif + rc = NPS_E_OTHERS; + } + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_deinitRsrvDmaMem( + OSAL_MDC_DMA_INFO_T *ptr_dma_info) +{ + if (NULL != ptr_dma_info->ptr_rsrv_virt_addr) + { + iounmap(ptr_dma_info->ptr_rsrv_virt_addr); + } + if (0x0 != ptr_dma_info->rsrv_phy_addr) + { + release_mem_region(ptr_dma_info->rsrv_phy_addr, + ptr_dma_info->rsrv_size); + } + return (NPS_E_OK); +} + + +#else /* Else of NPS_EN_DMA_RESERVED */ + + +#if defined(NPS_LINUX_KERNEL_MODE) + +#if defined(OSAL_MDC_EN_TEST) +static NPS_ERROR_NO_T +_osal_mdc_dumpSysDmaList(void) +{ + OSAL_MDC_DMA_INFO_T *ptr_dma_info = &_osal_mdc_cb.dma_info; + OSAL_MDC_LIST_NODE_T *ptr_curr_node; + OSAL_MDC_DMA_NODE_T *ptr_curr_node_data; + UI32_T node = 0; + NPS_ERROR_NO_T rc = NPS_E_OK; + + rc = osal_mdc_list_locateHead((OSAL_MDC_LIST_T *)ptr_dma_info->ptr_dma_list, + &ptr_curr_node); + while (NPS_E_OK == rc) + { + rc = osal_mdc_list_getNodeData((OSAL_MDC_LIST_T *)ptr_dma_info->ptr_dma_list, + ptr_curr_node, (void **)&ptr_curr_node_data); + if (NPS_E_OK == rc) + { + OSAL_MDC_ERR( + "node %d. virt addr=%p, phy addr=%p, size=%d\n", node, + ptr_curr_node_data->ptr_virt_addr, ptr_curr_node_data->phy_addr, + ptr_curr_node_data->size); + } + + rc = osal_mdc_list_next((OSAL_MDC_LIST_T *)ptr_dma_info->ptr_dma_list, + ptr_curr_node, &ptr_curr_node); + node++; + + } + return (rc); +} +#endif + +static NPS_ERROR_NO_T +_osal_mdc_createSysDmaNodeList( + OSAL_MDC_DMA_INFO_T *ptr_dma_info) +{ + NPS_ERROR_NO_T rc; + + rc = osal_mdc_list_create(OSAL_MDC_DMA_LIST_SZ_UNLIMITED, + OSAL_MDC_LIST_TYPE_SINGLY, + OSAL_MDC_DMA_LIST_NAME, + (OSAL_MDC_LIST_T **)&ptr_dma_info->ptr_dma_list); + return (rc); +} +#if !defined(NPS_LAMP) + +static void * +_osal_mdc_allocSysDmaMem( + OSAL_MDC_DMA_INFO_T *ptr_dma_info, + const UI32_T size) +{ + dma_addr_t phy_addr; + OSAL_MDC_DMA_NODE_T *ptr_node_data; + void *ptr_virt_addr = NULL; + NPS_ERROR_NO_T rc = NPS_E_OK; + + ptr_virt_addr = dma_alloc_coherent(ptr_dma_info->ptr_dma_dev, size, &phy_addr, GFP_ATOMIC); + if (NULL != ptr_virt_addr) + { + ptr_node_data = kmalloc(sizeof(OSAL_MDC_DMA_NODE_T), GFP_KERNEL); + ptr_node_data->phy_addr = (NPS_ADDR_T)phy_addr; + ptr_node_data->ptr_virt_addr = ptr_virt_addr; + ptr_node_data->size = size; + + rc = osal_mdc_list_insertToHead((OSAL_MDC_LIST_T *)ptr_dma_info->ptr_dma_list, ptr_node_data); + if (NPS_E_OK != rc) + { + kfree(ptr_node_data); + dma_free_coherent(ptr_dma_info->ptr_dma_dev, size, + ptr_virt_addr, phy_addr); + ptr_virt_addr = NULL; + } + } + return (ptr_virt_addr); +} + +static NPS_ERROR_NO_T +_osal_mdc_freeSysDmaMem( + OSAL_MDC_DMA_INFO_T *ptr_dma_info, + void *ptr_virt_addr) +{ + OSAL_MDC_LIST_NODE_T *ptr_node = NULL; + OSAL_MDC_DMA_NODE_T *ptr_node_data = NULL; + NPS_ERROR_NO_T rc; + + rc = _osal_mdc_searchDmaVirtAddr((OSAL_MDC_LIST_T *)ptr_dma_info->ptr_dma_list, + ptr_virt_addr, &ptr_node, &ptr_node_data); + if (NPS_E_OK == rc) + { + dma_free_coherent(ptr_dma_info->ptr_dma_dev, ptr_node_data->size, + ptr_virt_addr, ptr_node_data->phy_addr); + + osal_mdc_list_deleteByData((OSAL_MDC_LIST_T *)ptr_dma_info->ptr_dma_list, + ptr_node_data); + kfree(ptr_node_data); + } + return (rc); +} +#endif +#endif /* End of NPS_LINUX_KERNEL_MODE */ + +#endif /* End of NPS_EN_DMA_RESERVED */ + +#if defined(NPS_LINUX_KERNEL_MODE) + +void * +osal_mdc_allocDmaMem( + const UI32_T size) +{ + void *ptr_virt_addr = NULL; + +#if defined(NPS_LAMP) + ptr_virt_addr = osal_alloc(size); +#else + OSAL_MDC_DMA_INFO_T *ptr_dma_info = &_osal_mdc_cb.dma_info; + osal_takeSemaphore(&ptr_dma_info->sema, NPS_SEMAPHORE_WAIT_FOREVER); + +#if defined(NPS_EN_DMA_RESERVED) + ptr_virt_addr = _osal_mdc_allocRsrvDmaMem(ptr_dma_info, size); +#else + ptr_virt_addr = _osal_mdc_allocSysDmaMem(ptr_dma_info, size); +#endif + + osal_giveSemaphore(&ptr_dma_info->sema); +#endif + + return ptr_virt_addr; +} + +NPS_ERROR_NO_T +osal_mdc_freeDmaMem( + void *ptr_virt_addr) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + +#if defined(NPS_LAMP) + osal_free(ptr_virt_addr); +#else + OSAL_MDC_DMA_INFO_T *ptr_dma_info = &_osal_mdc_cb.dma_info; + + osal_takeSemaphore(&ptr_dma_info->sema, NPS_SEMAPHORE_WAIT_FOREVER); + +#if defined(NPS_EN_DMA_RESERVED) + rc = _osal_mdc_freeRsrvDmaMem(ptr_dma_info, ptr_virt_addr); +#else + + rc = _osal_mdc_freeSysDmaMem(ptr_dma_info, ptr_virt_addr); +#endif + osal_giveSemaphore(&ptr_dma_info->sema); + + if (NPS_E_OK != rc) + { + OSAL_MDC_ERR("free dma mem failed, virt addr=%p\n", ptr_virt_addr); + } +#endif + + return (rc); +} + +NPS_ERROR_NO_T +osal_mdc_convertPhyToVirt( + const NPS_ADDR_T phy_addr, + void **pptr_virt_addr) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + +#if defined(NPS_EN_DMA_RESERVED) + OSAL_MDC_DMA_INFO_T *ptr_dma_info = &_osal_mdc_cb.dma_info; + NPS_HUGE_T rsrv_virt_base = (NPS_HUGE_T)ptr_dma_info->ptr_rsrv_virt_addr; + NPS_ADDR_T rsrv_phy_base = ptr_dma_info->rsrv_phy_addr; +#endif + +#if defined(NPS_EN_DMA_RESERVED) + *pptr_virt_addr = (void *)(rsrv_virt_base + (NPS_HUGE_T)(phy_addr - rsrv_phy_base)); +#else + *pptr_virt_addr = NULL; + *pptr_virt_addr = phys_to_virt(phy_addr); + rc = (NULL == *pptr_virt_addr) ? (NPS_E_ENTRY_NOT_FOUND) : (NPS_E_OK); +#endif + +#if defined(AML_EN_CUSTOM_DMA_ADDR) + if (NPS_E_OK != rc) + { + /* Here the user may invoke the API for their private DMA + * address conversion. + */ + } +#endif + return (rc); +} + +NPS_ERROR_NO_T +osal_mdc_convertVirtToPhy( + void *ptr_virt_addr, + NPS_ADDR_T *ptr_phy_addr) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + +#if defined(NPS_EN_DMA_RESERVED) + OSAL_MDC_DMA_INFO_T *ptr_dma_info = &_osal_mdc_cb.dma_info; + NPS_HUGE_T rsrv_virt_base = (NPS_HUGE_T)ptr_dma_info->ptr_rsrv_virt_addr; + NPS_ADDR_T rsrv_phy_base = ptr_dma_info->rsrv_phy_addr; +#endif + +#if defined(NPS_EN_DMA_RESERVED) + *ptr_phy_addr = (NPS_ADDR_T)((NPS_HUGE_T)rsrv_phy_base + + (NPS_HUGE_T)ptr_virt_addr - rsrv_virt_base); +#else + *ptr_phy_addr = 0x0; + *ptr_phy_addr = virt_to_phys(ptr_virt_addr); + rc = (0x0 == *ptr_phy_addr) ? (NPS_E_ENTRY_NOT_FOUND) : (NPS_E_OK); +#endif + +#if defined(AML_EN_CUSTOM_DMA_ADDR) + if (NPS_E_OK != rc) + { + /* Here the user may invoke the API for their private DMA + * address conversion. + */ + } +#endif + return (rc); +} + +NPS_ERROR_NO_T +osal_mdc_initDmaMem(void) +{ + OSAL_MDC_DMA_INFO_T *ptr_dma_info = &_osal_mdc_cb.dma_info; + NPS_ERROR_NO_T rc = NPS_E_OK; + + rc = osal_createSemaphore(OSAL_MDC_DMA_SEMAPHORE_NAME, + NPS_SEMAPHORE_BINARY, &ptr_dma_info->sema); + if (NPS_E_OK == rc) + { +#if defined(NPS_EN_DMA_RESERVED) + rc = _osal_mdc_initRsrvDmaMem(ptr_dma_info); + if (NPS_E_OK == rc) + { + rc = _osal_mdc_createRsrvDmaNodeList(ptr_dma_info); + } +#else + rc = _osal_mdc_createSysDmaNodeList(ptr_dma_info); +#endif + } + return (rc); +} + +NPS_ERROR_NO_T +osal_mdc_deinitDmaMem(void) +{ + OSAL_MDC_DMA_INFO_T *ptr_dma_info = &_osal_mdc_cb.dma_info; + + /* Common function for both reserved/system memory. */ + _osal_mdc_destroyDmaNodeList(ptr_dma_info); + +#if defined(NPS_EN_DMA_RESERVED) + _osal_mdc_deinitRsrvDmaMem(ptr_dma_info); +#endif + + osal_destroySemaphore(&ptr_dma_info->sema); + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_mdc_flushCache( + void *ptr_virt_addr, + const UI32_T size) +{ +#if defined(CONFIG_NOT_COHERENT_CACHE) || defined(CONFIG_DMA_NONCOHERENT) + +#if defined(dma_cache_wback_inv) + dma_cache_wback_inv((NPS_HUGE_T)ptr_virt_addr, size); +#else + dma_cache_sync(NULL, ptr_virt_addr, size, DMA_TO_DEVICE); +#endif + +#endif + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_mdc_invalidateCache( + void *ptr_virt_addr, + const UI32_T size) +{ +#if defined(CONFIG_NOT_COHERENT_CACHE) || defined(CONFIG_DMA_NONCOHERENT) + +#if defined(dma_cache_wback_inv) + dma_cache_wback_inv((NPS_HUGE_T)ptr_virt_addr, size); +#else + dma_cache_sync(NULL, ptr_virt_addr, size, DMA_FROM_DEVICE); +#endif + +#endif + return (NPS_E_OK); +} + +#endif /* End of NPS_LINUX_KERNEL_MODE */ + +/* --------------------------------------------------------------------------- Interrupt */ +#if defined(NPS_LINUX_USER_MODE) +static UI32_T _osal_mdc_isr_init_bitmap = 0; /* To record the dev request_irq */ +static UI32_T _osal_mdc_isr_dev_bitmap; /* To record the dev bitmap */ +static spinlock_t _osal_mdc_isr_dev_bitmap_lock; +static wait_queue_head_t _osal_mdc_isr_wait; +static UI32_T _osal_mdc_isr_mask_addr; +static UI32_T _osal_mdc_isr_mask_val; + + +static inline NPS_ERROR_NO_T +_osal_mdc_initInterrupt(void) +{ + /* init top and bottom halves */ + init_waitqueue_head(&_osal_mdc_isr_wait); + + /* init lock and clear device bitmap */ + spin_lock_init(&_osal_mdc_isr_dev_bitmap_lock); + _osal_mdc_isr_dev_bitmap = 0; + _osal_mdc_isr_init_bitmap = 0; + + /* clear chip interrupt mask address and value */ + _osal_mdc_isr_mask_addr = 0; + _osal_mdc_isr_mask_val = 0; + + return (NPS_E_OK); +} + +/* top half */ +static inline NPS_ERROR_NO_T +_osal_mdc_notifyUserProcess( + const UI32_T unit) +{ + unsigned long flags = 0; + + /* mask chip interrupt */ + osal_mdc_writePciReg(unit, _osal_mdc_isr_mask_addr, + &_osal_mdc_isr_mask_val, sizeof(UI32_T)); + + /* set the device bitmap. */ + spin_lock_irqsave(&_osal_mdc_isr_dev_bitmap_lock, flags); + _osal_mdc_isr_dev_bitmap |= (1 << unit); + spin_unlock_irqrestore(&_osal_mdc_isr_dev_bitmap_lock, flags); + + /* notify user process. */ + wake_up_interruptible(&_osal_mdc_isr_wait); + + return (NPS_E_OK); +} + +static inline NPS_ERROR_NO_T +_osal_mdc_waitEvent( + UI32_T *ptr_dev_bitmap) +{ + unsigned long flags = 0; + + wait_event_interruptible(_osal_mdc_isr_wait, (0 != _osal_mdc_isr_dev_bitmap)); + + /* save and clear the device bitmap. */ + spin_lock_irqsave(&_osal_mdc_isr_dev_bitmap_lock, flags); + *ptr_dev_bitmap = _osal_mdc_isr_dev_bitmap; + _osal_mdc_isr_dev_bitmap = 0; + spin_unlock_irqrestore(&_osal_mdc_isr_dev_bitmap_lock, flags); + + return (NPS_E_OK); +} + +static ssize_t +_osal_mdc_read( + struct file *filep, + char __user *buf, + size_t count, + loff_t *ppos) +{ + ssize_t ret; + UI32_T dev_bitmap = 0; + + if (count != sizeof(UI32_T)) + { + return -EINVAL; + } + + /* check if request_irq is inited. */ + if (0 != _osal_mdc_isr_init_bitmap) + { + _osal_mdc_waitEvent(&dev_bitmap); + } + + /* copy the device bitmap to user process. */ + if (0 != copy_to_user(buf, &dev_bitmap, count)) + { + ret = -EFAULT; + } + else + { + ret = count; + } + + return ret; +} +#endif /* End of NPS_LINUX_USER_MODE */ + +static irqreturn_t +_osal_mdc_systemIntrCallback( + int irq, + void *ptr_cookie) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + int linux_rc = IRQ_HANDLED; + OSAL_MDC_DEV_T *ptr_dev = (OSAL_MDC_DEV_T *)ptr_cookie; + + /* Invoke kernel callback, the callback function exist only in below cases: + * 1. SDK built in kernel mode + * 2. SDK built in user mode, NetIF kernel module is enabled + */ + if (NULL != ptr_dev->isr_callback) + { + rc = ptr_dev->isr_callback(ptr_dev->ptr_isr_data); + if (NPS_E_OK != rc) + { + OSAL_MDC_ERR("handle irq failed, rc=%d\n", rc); + linux_rc = IRQ_NONE; + } + } + +#if defined(NPS_LINUX_USER_MODE) + /* Notify user process */ + rc = _osal_mdc_notifyUserProcess(ptr_dev->unit); + if (NPS_E_OK != rc) + { + OSAL_MDC_ERR("notify intr to usr failed, rc=%d\n", rc); + linux_rc = IRQ_NONE; + } +#endif + + return (linux_rc); +} + +NPS_ERROR_NO_T +osal_mdc_registerIsr( + const UI32_T unit, + AML_DEV_ISR_FUNC_T handler, + void *ptr_cookie) +{ + OSAL_MDC_DEV_T *ptr_dev = &_osal_mdc_cb.dev[unit]; + + ptr_dev->isr_callback = handler; + ptr_dev->ptr_isr_data = (void *)((NPS_HUGE_T)unit); + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_mdc_connectIsr( + const UI32_T unit, + AML_DEV_ISR_FUNC_T handler, + AML_DEV_ISR_DATA_T *ptr_cookie) +{ + OSAL_MDC_DEV_T *ptr_dev = &_osal_mdc_cb.dev[unit]; + int linux_rc = 0; + NPS_ERROR_NO_T rc = NPS_E_OK; + +#if defined(NPS_LINUX_USER_MODE) + if (NULL != ptr_cookie) + { + _osal_mdc_isr_mask_addr = ptr_cookie->mask_addr; + _osal_mdc_isr_mask_val = ptr_cookie->mask_val; + } +#endif + + if (NULL == ptr_dev->isr_callback) + { +#if defined(NPS_LINUX_KERNEL_MODE) + /* In user mode, the following database is created in user space. */ + ptr_dev->isr_callback = handler; + ptr_dev->ptr_isr_data = (void *)((NPS_HUGE_T)unit); +#endif + +#if defined(OSAL_MDC_EN_MSI) + /* If "no_msi" flag is set, it means the device doesn't support MSI. */ + if (1 != ptr_dev->ptr_pci_dev->no_msi) + { + linux_rc = pci_enable_msi(ptr_dev->ptr_pci_dev); + if (0 == linux_rc) + { + /* The system gives a new irq number if MSI is enabled sucessfully. */ + ptr_dev->irq = ptr_dev->ptr_pci_dev->irq; + } + else + { + OSAL_MDC_ERR("pci_enable_msi() failed, rc=%d\n", linux_rc); + rc = NPS_E_OTHERS; + } + } +#endif + + linux_rc = request_irq(ptr_dev->irq, _osal_mdc_systemIntrCallback, + 0, OSAL_MDC_DRIVER_NAME, (void *)ptr_dev); + + if (0 != linux_rc) + { + OSAL_MDC_ERR("request_irq() failed, rc=%d\n", linux_rc); + rc = NPS_E_OTHERS; + } + } + else + { + OSAL_MDC_ERR("double req isr err\n"); + rc = NPS_E_OTHERS; + } + return (rc); +} + +NPS_ERROR_NO_T +osal_mdc_disconnectIsr( + const UI32_T unit) +{ + OSAL_MDC_DEV_T *ptr_dev = &_osal_mdc_cb.dev[unit]; + + free_irq(ptr_dev->irq, (void *)ptr_dev); + +#if defined(OSAL_MDC_EN_MSI) + /* Must free the irq before disabling MSI */ + pci_disable_msi(ptr_dev->ptr_pci_dev); +#endif + +#if defined(NPS_LINUX_KERNEL_MODE) + ptr_dev->isr_callback = NULL; + ptr_dev->ptr_isr_data = NULL; +#endif + +#if defined(NPS_LINUX_USER_MODE) + _osal_mdc_isr_mask_addr = 0x0; + _osal_mdc_isr_mask_val = 0x0; +#endif + + return (NPS_E_OK); +} + +NPS_ERROR_NO_T +osal_mdc_initDevice( + AML_DEV_T *ptr_dev_list, + UI32_T *ptr_dev_num) +{ + OSAL_MDC_CB_T *ptr_cb = &_osal_mdc_cb; + NPS_ERROR_NO_T rc = NPS_E_OK; + + _ptr_osal_mdc_dev = ptr_dev_list; + + memset(ptr_cb, 0x0, sizeof(OSAL_MDC_CB_T)); + +#if defined(AML_EN_I2C) + rc = _osal_mdc_probeI2cDevice(); + *ptr_dev_num = 1; +#else + rc = _osal_mdc_probePciDevice(); + *ptr_dev_num = ptr_cb->dev_num; + + _ptr_ext_pci_dev = _osal_mdc_cb.dev[0].ptr_pci_dev; +#endif /* End of AML_EN_I2C */ + + return (rc); +} + +NPS_ERROR_NO_T +osal_mdc_deinitDevice(void) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + +#if defined(AML_EN_I2C) + rc = _osal_mdc_removeI2cDevice(); +#else + if (NULL != _ptr_ext_pci_dev) + { + rc = _osal_mdc_removePciDevice(); + _ptr_ext_pci_dev = NULL; + } +#endif + + return (rc); +} + +/*****************************************************************************/ +#if defined(NPS_LINUX_USER_MODE) +/* Interface */ +static UI32_T _osal_mdc_devInited = 0; + +/* DMA */ +#if defined(NPS_EN_DMA_RESERVED) +static UI32_T _osal_mdc_rsvDmaInited = 0; +#else +static struct list_head _osal_mdc_sysDmaList[2]; /* To avoid memory corruption when cold-boot */ +static UI32_T _osal_mdc_sysCurDmaListIdx = 0; +#endif + +/* IOCTL */ +static OSAL_MDC_IOCTL_CB_T _osal_mdc_ioctl_cb; +static AML_DEV_T _osal_mdc_ioctl_dev[NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM] = {}; + +static int +_osal_mdc_open( + struct inode *ptr_inode, + struct file *ptr_file) +{ + return (0); +} + +static int +_osal_mdc_release( + struct inode *ptr_inode, + struct file *ptr_file) +{ + return (0); +} + +static struct vm_operations_struct _osal_mdc_remap_vm_ops = +{ + .open = NULL, + .close = NULL, +}; + +static int +_osal_mdc_mmap( + struct file *filp, + struct vm_area_struct *vma) +{ + size_t size = vma->vm_end - vma->vm_start; + int linux_rc = 0; + +#if LINUX_VERSION_CODE <= KERNEL_VERSION(3,0,48) + pgprot_val(vma->vm_page_prot) |= (_PAGE_NO_CACHE | _PAGE_GUARDED); +#else + UI32_T dev_idx; + OSAL_MDC_DEV_T *ptr_dev; + NPS_ADDR_T phy_addr = vma->vm_pgoff << PAGE_SHIFT; + + /* check mmio base phy addr */ + for (dev_idx = 0, ptr_dev = &_osal_mdc_cb.dev[0]; + dev_idx < _osal_mdc_cb.dev_num; + dev_idx++, ptr_dev++) + { + if ((NULL != ptr_dev->ptr_pci_dev) && + (phy_addr == pci_resource_start(ptr_dev->ptr_pci_dev, OSAL_MDC_PCI_BAR0_OFFSET))) + { + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + break; + } + } +#endif + + vma->vm_flags |= VM_IO; + if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, + size, vma->vm_page_prot)) + { + linux_rc = -EAGAIN; + } + vma->vm_ops = &_osal_mdc_remap_vm_ops; + return (linux_rc); +} + +#if defined(NPS_EN_DMA_RESERVED) + +static NPS_ERROR_NO_T +_osal_mdc_ioctl_initRsrvDmaMemCallback( + const UI32_T unit, + void *ptr_data) +{ + OSAL_MDC_DMA_INFO_T *ptr_dma_info = &_osal_mdc_cb.dma_info; + OSAL_MDC_IOCTL_DMA_DATA_T *ptr_ioctl_data = (OSAL_MDC_IOCTL_DMA_DATA_T *)ptr_data; + NPS_ERROR_NO_T rc = NPS_E_OK; + + if (0 == _osal_mdc_rsvDmaInited) + { + rc = _osal_mdc_initRsrvDmaMem(ptr_dma_info); + _osal_mdc_rsvDmaInited = 1; + } + ptr_ioctl_data->rsrv_dma_phy_addr = ptr_dma_info->rsrv_phy_addr; + ptr_ioctl_data->rsrv_dma_size = ptr_dma_info->rsrv_size; + + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_ioctl_deinitRsrvDmaMemCallback( + const UI32_T unit, + void *ptr_data) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + + rc = _osal_mdc_deinitRsrvDmaMem(&_osal_mdc_cb.dma_info); + _osal_mdc_rsvDmaInited = 0; + + return (rc); +} + +#else + +static NPS_ERROR_NO_T +_osal_mdc_clearSysDmaList( + UI32_T dmaListIdx) +{ + OSAL_MDC_DMA_INFO_T *ptr_dma_info = &_osal_mdc_cb.dma_info; + OSAL_MDC_USER_MODE_DMA_NODE_T *ptr_curr_node_data = NULL; + OSAL_MDC_USER_MODE_DMA_NODE_T *ptr_next_node_data = NULL; + void *ptr_virt_addr; + + list_for_each_entry_safe(ptr_curr_node_data, ptr_next_node_data, + &_osal_mdc_sysDmaList[dmaListIdx], list) + { + list_del(&(ptr_curr_node_data->list)); + ptr_virt_addr = phys_to_virt(ptr_curr_node_data->phy_addr); + dma_free_coherent(ptr_dma_info->ptr_dma_dev, + ptr_curr_node_data->size, ptr_virt_addr, + ptr_curr_node_data->phy_addr); + kfree(ptr_curr_node_data); + } + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_osal_mdc_ioctl_allocSysDmaMemCallback( + const UI32_T unit, + void *ptr_data) +{ + OSAL_MDC_DMA_INFO_T *ptr_dma_info = &_osal_mdc_cb.dma_info; + OSAL_MDC_IOCTL_DMA_DATA_T *ptr_ioctl_data = (OSAL_MDC_IOCTL_DMA_DATA_T *)ptr_data; + OSAL_MDC_USER_MODE_DMA_NODE_T *ptr_node_data = NULL; + +/* To defense the compatible data type of 32bit and 64bit are not synchronized */ +#if defined(CONFIG_ARCH_DMA_ADDR_T_64BIT) /* Bus addressing is 64-bit */\ +&& !defined(NPS_EN_64BIT_ADDR) /* SDK follows HOST with 32-bit addr*/\ +&& (defined(NPS_EN_HOST_32_BIT_LITTLE_ENDIAN) || defined(NPS_EN_HOST_32_BIT_BIG_ENDIAN))/* HOST is 32-bit */ +#error "The DMA address of OS is 64bit. Please enable NPS_EN_64BIT_ADDR in SDK." +#endif + +#if !defined(CONFIG_ARCH_DMA_ADDR_T_64BIT) && defined(NPS_EN_64BIT_ADDR) +#error "The DMA address of OS is not 64bit. Please disable NPS_EN_64BIT_ADDR in SDK." +#endif + + if (NULL == dma_alloc_coherent(ptr_dma_info->ptr_dma_dev, ptr_ioctl_data->size, + (dma_addr_t *)&ptr_ioctl_data->phy_addr, GFP_ATOMIC)) + { + return (NPS_E_NO_MEMORY); + } + + ptr_node_data = kmalloc(sizeof(OSAL_MDC_USER_MODE_DMA_NODE_T), GFP_KERNEL); + if (NULL != ptr_node_data) + { + memset(ptr_node_data, 0, sizeof(OSAL_MDC_USER_MODE_DMA_NODE_T)); + ptr_node_data->phy_addr = ptr_ioctl_data->phy_addr; + ptr_node_data->size = ptr_ioctl_data->size; + list_add(&(ptr_node_data->list), &_osal_mdc_sysDmaList[_osal_mdc_sysCurDmaListIdx]); + } + else + { + dma_free_coherent(ptr_dma_info->ptr_dma_dev, ptr_ioctl_data->size, + phys_to_virt(ptr_ioctl_data->phy_addr), ptr_ioctl_data->phy_addr); + + return (NPS_E_NO_MEMORY); + } + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_osal_mdc_ioctl_freeSysDmaMemCallback( + const UI32_T unit, + void *ptr_data) +{ + OSAL_MDC_DMA_INFO_T *ptr_dma_info = &_osal_mdc_cb.dma_info; + OSAL_MDC_IOCTL_DMA_DATA_T *ptr_ioctl_data = (OSAL_MDC_IOCTL_DMA_DATA_T *)ptr_data; + void *ptr_virt_addr; + + OSAL_MDC_USER_MODE_DMA_NODE_T *ptr_curr_node_data = NULL; + OSAL_MDC_USER_MODE_DMA_NODE_T *ptr_next_node_data = NULL; + + + list_for_each_entry_safe(ptr_curr_node_data, ptr_next_node_data, + &_osal_mdc_sysDmaList[_osal_mdc_sysCurDmaListIdx], list) + { + if (ptr_curr_node_data->phy_addr == ptr_ioctl_data->phy_addr) + { + list_del(&(ptr_curr_node_data->list)); + kfree(ptr_curr_node_data); + break; + } + } + + ptr_virt_addr = phys_to_virt(ptr_ioctl_data->phy_addr); + dma_free_coherent(ptr_dma_info->ptr_dma_dev, ptr_ioctl_data->size, + ptr_virt_addr, ptr_ioctl_data->phy_addr); + + return (NPS_E_OK); +} + +#endif + +static NPS_ERROR_NO_T +_osal_mdc_getPciInfoToIoctlData( + const OSAL_MDC_DEV_T *ptr_dev_list, + OSAL_MDC_IOCTL_DEV_DATA_T *ptr_dev_data) +{ + UI32_T idx; + + /* Search for PCIe device and get the MMIO base address. */ + for (idx = 0; idx < _osal_mdc_cb.dev_num; idx++) + { + if (NULL != ptr_dev_list[idx].ptr_pci_dev) + { + ptr_dev_data->pci_mmio_phy_start[idx] = + pci_resource_start(ptr_dev_list[idx].ptr_pci_dev, OSAL_MDC_PCI_BAR0_OFFSET); + + ptr_dev_data->pci_mmio_size[idx] = + pci_resource_len(ptr_dev_list[idx].ptr_pci_dev, OSAL_MDC_PCI_BAR0_OFFSET); + } + } + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_osal_mdc_getDeviceIdToIoctlData( + AML_DEV_T *ptr_dev, + OSAL_MDC_IOCTL_DEV_DATA_T *ptr_dev_data, + const UI32_T dev_num) +{ + UI32_T idx; + + for (idx = 0; idx < ptr_dev_data->dev_num; idx++) + { + ptr_dev_data->id[idx].device = ptr_dev[idx].id.device; + ptr_dev_data->id[idx].vendor = ptr_dev[idx].id.vendor; + ptr_dev_data->id[idx].revision = ptr_dev[idx].id.revision; + } + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_osal_mdc_ioctl_initDeviceCallback( + const UI32_T unit, + void *ptr_data) +{ + OSAL_MDC_CB_T *ptr_cb = &_osal_mdc_cb; + OSAL_MDC_DEV_T *ptr_dev_list = _osal_mdc_cb.dev; + OSAL_MDC_IOCTL_DEV_DATA_T *ptr_ioctl_data = (OSAL_MDC_IOCTL_DEV_DATA_T *)ptr_data; + + /* "dev" is just created for invoking osal_mdc_initDevice, + * it is no use once the device IDs are copy to ptr_ioctl_data. + */ + + NPS_ERROR_NO_T rc = NPS_E_OK; + + if (0 == _osal_mdc_devInited) + { + rc = osal_mdc_initDevice(_osal_mdc_ioctl_dev, &ptr_ioctl_data->dev_num); + } + else + { + /* ptr_cb->dev_num was initialized in osal_mdc_initDevice(); */ + ptr_ioctl_data->dev_num = ptr_cb->dev_num; + } + + if (ptr_cb->dev_num >= NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM) + { + OSAL_MDC_ERR("dev num=%d > max support num=%d\n", + ptr_ioctl_data->dev_num, NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM); + } + +#if !defined(NPS_EN_DMA_RESERVED) + if (0 == _osal_mdc_devInited) + { + /* Create two DMA memory lists and use 1st. */ + INIT_LIST_HEAD(&_osal_mdc_sysDmaList[0]); + INIT_LIST_HEAD(&_osal_mdc_sysDmaList[1]); + _osal_mdc_sysCurDmaListIdx = 0; + } + else + { + /* Delay free the old list until the chip is reset. + * When we kill the process, the chip continues to write to the DMA memory. + * If we free the old DMA memory before stopping the chip, there could be memory corruption. + */ + _osal_mdc_sysCurDmaListIdx = ((_osal_mdc_sysCurDmaListIdx + 1) & 0x1); + rc = _osal_mdc_clearSysDmaList(_osal_mdc_sysCurDmaListIdx); + } +#endif + + if (NPS_E_OK == rc) + { + rc = _osal_mdc_getDeviceIdToIoctlData(_osal_mdc_ioctl_dev, ptr_ioctl_data, ptr_ioctl_data->dev_num); + } + if (NPS_E_OK == rc) + { + rc = _osal_mdc_getPciInfoToIoctlData(ptr_dev_list, ptr_ioctl_data); + } + + _osal_mdc_devInited = 1; + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_ioctl_deinitDeviceCallback( + const UI32_T unit, + void *ptr_data) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + +#if !defined(NPS_EN_DMA_RESERVED) + _osal_mdc_clearSysDmaList(0); + _osal_mdc_clearSysDmaList(1); +#endif + + if (0 != _osal_mdc_devInited) + { + rc = osal_mdc_deinitDevice(); + _osal_mdc_devInited = 0; + } + + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_ioctl_connectIsrCallback( + const UI32_T unit, + void *ptr_data) +{ + NPS_ERROR_NO_T rc = NPS_E_OK; + + if (0 == (_osal_mdc_isr_init_bitmap & (1 << unit))) + { + rc = osal_mdc_connectIsr(unit, NULL, ptr_data); + if (NPS_E_OK == rc) + { + _osal_mdc_isr_init_bitmap |= (1 << unit); + } + } + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_ioctl_disconnectIsrCallback( + const UI32_T unit, + void *ptr_data) +{ + /* To make the user-space polling task return from read. */ + _osal_mdc_notifyUserProcess(unit); + + osal_mdc_disconnectIsr(unit); + _osal_mdc_isr_init_bitmap &= ~(1 << unit); + + return (NPS_E_OK); +} + +static NPS_ERROR_NO_T +_osal_mdc_registerIoctlCallback( + const OSAL_MDC_IOCTL_TYPE_T type, + const OSAL_MDC_IOCTL_CALLBACK_FUNC_T func) +{ + OSAL_MDC_IOCTL_CB_T *ptr_cb = &_osal_mdc_ioctl_cb; + NPS_ERROR_NO_T rc = NPS_E_OTHERS; + + if (type < OSAL_MDC_IOCTL_TYPE_LAST) + { + if (NULL == ptr_cb->callback[type]) + { + ptr_cb->callback[type] = func; + rc = NPS_E_OK; + } + else + { + OSAL_MDC_ERR("register ioctl callback failed, type=%d exist\n", type); + } + } + else + { + OSAL_MDC_ERR("register ioctl callback failed, type=%d >= max=%d\n", + type, OSAL_MDC_IOCTL_TYPE_LAST); + } + return (rc); +} + +static NPS_ERROR_NO_T +_osal_mdc_initIoctl(void) +{ + memset(&_osal_mdc_ioctl_cb, 0x0, sizeof(OSAL_MDC_IOCTL_CB_T)); + + _osal_mdc_registerIoctlCallback(OSAL_MDC_IOCTL_TYPE_MDC_INIT_DEV, + _osal_mdc_ioctl_initDeviceCallback); + + _osal_mdc_registerIoctlCallback(OSAL_MDC_IOCTL_TYPE_MDC_DEINIT_DEV, + _osal_mdc_ioctl_deinitDeviceCallback); +#if defined(NPS_EN_DMA_RESERVED) + _osal_mdc_registerIoctlCallback(OSAL_MDC_IOCTL_TYPE_MDC_INIT_RSRV_DMA_MEM, + _osal_mdc_ioctl_initRsrvDmaMemCallback); + + _osal_mdc_registerIoctlCallback(OSAL_MDC_IOCTL_TYPE_MDC_DEINIT_RSRV_DMA_MEM, + _osal_mdc_ioctl_deinitRsrvDmaMemCallback); +#else + _osal_mdc_registerIoctlCallback(OSAL_MDC_IOCTL_TYPE_MDC_ALLOC_SYS_DMA_MEM, + _osal_mdc_ioctl_allocSysDmaMemCallback); + + _osal_mdc_registerIoctlCallback(OSAL_MDC_IOCTL_TYPE_MDC_FREE_SYS_DMA_MEM, + _osal_mdc_ioctl_freeSysDmaMemCallback); +#endif + _osal_mdc_registerIoctlCallback(OSAL_MDC_IOCTL_TYPE_MDC_CONNECT_ISR, + _osal_mdc_ioctl_connectIsrCallback); + + _osal_mdc_registerIoctlCallback(OSAL_MDC_IOCTL_TYPE_MDC_DISCONNECT_ISR, + _osal_mdc_ioctl_disconnectIsrCallback); + return (NPS_E_OK); +} + +static long +_osal_mdc_ioctl( + struct file *filp, + unsigned int cmd, + unsigned long arg) +{ +#define OSAL_MDC_IOCTL_LOCAL_BUF_SIZE (128) + + OSAL_MDC_IOCTL_CB_T *ptr_cb = &_osal_mdc_ioctl_cb; + OSAL_MDC_IOCTL_CMD_T *ptr_cmd = (OSAL_MDC_IOCTL_CMD_T *)&cmd; + UI32_T unit = ptr_cmd->field.unit; + OSAL_MDC_IOCTL_TYPE_T type = ptr_cmd->field.type; + OSAL_MDC_IOCTL_ACCESS_T access = ptr_cmd->field.access; + UI32_T data_size = ptr_cmd->field.size; + UI8_T temp_buf[OSAL_MDC_IOCTL_LOCAL_BUF_SIZE]; + UI8_T *ptr_temp_buf; + int linux_rc = 0; + + if (NULL != ptr_cb->callback[type]) + { + if (data_size > OSAL_MDC_IOCTL_LOCAL_BUF_SIZE) + { + ptr_temp_buf = kmalloc(data_size, GFP_KERNEL); + } + else + { + ptr_temp_buf = temp_buf; + } + + /*************************************************************/ + if (OSAL_MDC_IOCTL_ACCESS_WRITE == access) + { + /* type: FREE_SYS_DMA_MEM : DMA physical address + * CONNECT_ISR : Chip interrupt mask address and value + */ + if (copy_from_user(ptr_temp_buf, (int __user *)arg, data_size)) + { + linux_rc = -EFAULT; + } + else + { + if (NPS_E_OK != ptr_cb->callback[type](unit, (void *)ptr_temp_buf)) + { + linux_rc = -EFAULT; + } + } + } + else if (OSAL_MDC_IOCTL_ACCESS_READ == access) + { + /* type: INIT_DEV : PCIe device and vendor ID, mmio address and size + * INIT_RSRV_DMA_MEM : Reserved DMA physical address and size + */ + if (NPS_E_OK != ptr_cb->callback[type](unit, (void *)ptr_temp_buf)) + { + linux_rc = -EFAULT; + } + else + { + if (copy_to_user((int __user *)arg, ptr_temp_buf, data_size)) + { + linux_rc = -EFAULT; + } + } + } + else if (OSAL_MDC_IOCTL_ACCESS_READ_WRITE == access) + { + /* type: ALLOC_SYS_DMA_MEM : DMA physical address + */ + if (copy_from_user(ptr_temp_buf, (int __user *)arg, data_size)) + { + linux_rc = -EFAULT; + } + else + { + if (NPS_E_OK != ptr_cb->callback[type](unit, (void *)ptr_temp_buf)) + { + linux_rc = -EFAULT; + } + else + { + if (copy_to_user((int __user *)arg, ptr_temp_buf, data_size)) + { + linux_rc = -EFAULT; + } + } + } + } + else if (OSAL_MDC_IOCTL_ACCESS_NONE == access) + { + /* type: DEINIT_DEV + * DEINIT_RSRV_DMA_MEM + * DISCONNECT_ISR + */ + if (NPS_E_OK != ptr_cb->callback[type](unit, (void *)ptr_temp_buf)) + { + linux_rc = -EFAULT; + } + } + /*************************************************************/ + + if (data_size > OSAL_MDC_IOCTL_LOCAL_BUF_SIZE) + { + kfree(ptr_temp_buf); + } + } + else + { + OSAL_MDC_ERR("invalid ioctl, cmd=%u, arg=%lu, type=%d\n", cmd, arg, type); + } + return (linux_rc); +} + +#ifdef CONFIG_COMPAT +static long +_osal_mdc_compat_ioctl( + struct file *filp, + unsigned int cmd, + unsigned long arg) +{ + return _osal_mdc_ioctl(filp, cmd, (unsigned long)compat_ptr(arg)); +} +#endif + +static struct file_operations _osal_mdc_fops = +{ + .owner = THIS_MODULE, + .open = _osal_mdc_open, + .read = _osal_mdc_read, + .release = _osal_mdc_release, + .unlocked_ioctl = _osal_mdc_ioctl, +#ifdef CONFIG_COMPAT + .compat_ioctl = _osal_mdc_compat_ioctl, +#endif + .mmap = _osal_mdc_mmap, +}; + +static struct miscdevice _osal_mdc_misc = +{ + .minor = OSAL_MDC_DRIVER_MISC_MINOR_NUM, + .name = OSAL_MDC_DRIVER_NAME, + .fops = & _osal_mdc_fops, +}; + +static int __init +osal_mdc_module_init(void) +{ + int linux_rc; + + _osal_mdc_initIoctl(); /* To register IOCTL callback functions. */ + _osal_mdc_initInterrupt(); /* To init structs for top and bottom halves */ + + linux_rc = misc_register(&_osal_mdc_misc); + if (0 != linux_rc) + { + OSAL_MDC_ERR("register dev %s failed, linux_rc=%d\n", OSAL_MDC_DRIVER_NAME, linux_rc); + } + return (linux_rc); +} + +static void __exit +osal_mdc_module_exit(void) +{ + int unit = 0; + +#if LINUX_VERSION_CODE <= KERNEL_VERSION(4,2,8) + int linux_rc; + + linux_rc = misc_deregister(&_osal_mdc_misc); + if (0 != linux_rc) + { + OSAL_MDC_ERR("de-register dev %s failed, linux_rc=%d\n", OSAL_MDC_DRIVER_NAME, linux_rc); + } +#else + misc_deregister(&_osal_mdc_misc); +#endif + + /* ref: _osal_mdc_ioctl_disconnectIsrCallback */ + for (unit = 0; unit < NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM; unit++) + { + if (0 != (_osal_mdc_isr_init_bitmap & (1 << unit))) + { + osal_mdc_disconnectIsr(unit); + _osal_mdc_isr_init_bitmap &= ~(1 << unit); + } + } + + /* ref: _osal_mdc_ioctl_deinitRsrvDmaMemCallback */ +#if defined(NPS_EN_DMA_RESERVED) + if (1 == _osal_mdc_rsvDmaInited) + { + _osal_mdc_deinitRsrvDmaMem(&_osal_mdc_cb.dma_info); + _osal_mdc_rsvDmaInited = 0; + } +#endif + + /* ref: _osal_mdc_ioctl_deinitDeviceCallback */ + if (1 == _osal_mdc_devInited) + { +#if !defined(NPS_EN_DMA_RESERVED) + _osal_mdc_clearSysDmaList(0); + _osal_mdc_clearSysDmaList(1); +#endif + osal_mdc_deinitDevice(); + _osal_mdc_devInited = 0; + } +} + +#else + +static int __init +osal_mdc_module_init(void) +{ + return (0); +} + +static void __exit +osal_mdc_module_exit(void) +{ + +} + +#endif /* End of NPS_LINUX_USER_MODE */ + +module_init(osal_mdc_module_init); +module_exit(osal_mdc_module_exit); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Nephos"); +MODULE_DESCRIPTION("SDK Kernel Module"); diff --git a/platform/nephos/one-image.mk b/platform/nephos/one-image.mk new file mode 100644 index 00000000000..3651325456c --- /dev/null +++ b/platform/nephos/one-image.mk @@ -0,0 +1,18 @@ +# sonic nephos one image installer + +SONIC_ONE_IMAGE = sonic-nephos.bin +$(SONIC_ONE_IMAGE)_MACHINE = nephos +$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie +$(SONIC_ONE_IMAGE)_INSTALLS += $(NEPHOS_MODULE) +$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(INGRASYS_S9130_32X_PLATFORM_MODULE) \ + $(INGRASYS_S9230_64X_PLATFORM_MODULE) \ + $(ACCTON_AS7116_54X_PLATFORM_MODULE) \ + $(CIG_CS6436_56P_PLATFORM_MODULE) +ifeq ($(INSTALL_DEBUG_TOOLS),y) +$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) +$(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) +else +$(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES) +endif +SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/nephos/platform-modules-accton.mk b/platform/nephos/platform-modules-accton.mk new file mode 100644 index 00000000000..ebfd77f30fc --- /dev/null +++ b/platform/nephos/platform-modules-accton.mk @@ -0,0 +1,13 @@ +# Accton AS7116 54X Platform modules + +ACCTON_AS7116_54X_PLATFORM_MODULE_VERSION = 1.0.1 + +export ACCTON_AS7116_54X_PLATFORM_MODULE_VERSION + +ACCTON_AS7116_54X_PLATFORM_MODULE = sonic-platform-accton-as7116-54x_$(ACCTON_AS7116_54X_PLATFORM_MODULE_VERSION)_amd64.deb +$(ACCTON_AS7116_54X_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-accton +$(ACCTON_AS7116_54X_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(ACCTON_AS7116_54X_PLATFORM_MODULE)_PLATFORM = x86_64-accton_as7116_54x-r0 +SONIC_DPKG_DEBS += $(ACCTON_AS7116_54X_PLATFORM_MODULE) + +SONIC_STRETCH_DEBS += $(ACCTON_AS7116_54X_PLATFORM_MODULE) diff --git a/platform/nephos/platform-modules-cig.mk b/platform/nephos/platform-modules-cig.mk new file mode 100644 index 00000000000..98bbadf9ce3 --- /dev/null +++ b/platform/nephos/platform-modules-cig.mk @@ -0,0 +1,12 @@ +# Cig CS6436 56P Platform modules + +CIG_CS6436_56P_PLATFORM_MODULE_VERSION = 1.0.0 + +export CIG_CS6436_56P_PLATFORM_MODULE_VERSION + +CIG_CS6436_56P_PLATFORM_MODULE = sonic-platform-cig-cs6436-56p_$(CIG_CS6436_56P_PLATFORM_MODULE_VERSION)_amd64.deb +$(CIG_CS6436_56P_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-cig +$(CIG_CS6436_56P_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(CIG_CS6436_56P_PLATFORM_MODULE)_PLATFORM = x86_64-cig_cs6436_56p-r0 +SONIC_DPKG_DEBS += $(CIG_CS6436_56P_PLATFORM_MODULE) +SONIC_STRETCH_DEBS += $(CIG_CS6436_56P_PLATFORM_MODULE) \ No newline at end of file diff --git a/platform/nephos/platform-modules-ingrasys.mk b/platform/nephos/platform-modules-ingrasys.mk new file mode 100644 index 00000000000..94b8315cd70 --- /dev/null +++ b/platform/nephos/platform-modules-ingrasys.mk @@ -0,0 +1,21 @@ +# Ingrasys S9130-32X and S9230-64X Platform modules + +INGRASYS_S9130_32X_PLATFORM_MODULE_VERSION = 1.0.0 +INGRASYS_S9230_64X_PLATFORM_MODULE_VERSION = 1.0.0 + +export INGRASYS_S9130_32X_PLATFORM_MODULE_VERSION +export INGRASYS_S9230_64X_PLATFORM_MODULE_VERSION + +INGRASYS_S9130_32X_PLATFORM_MODULE = sonic-platform-ingrasys-s9130-32x_$(INGRASYS_S9130_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(INGRASYS_S9130_32X_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-ingrasys +$(INGRASYS_S9130_32X_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(INGRASYS_S9130_32X_PLATFORM_MODULE)_PLATFORM = x86_64-ingrasys_s9130_32x-r0 +SONIC_DPKG_DEBS += $(INGRASYS_S9130_32X_PLATFORM_MODULE) + +INGRASYS_S9230_64X_PLATFORM_MODULE = sonic-platform-ingrasys-s9230-64x_$(INGRASYS_S9230_64X_PLATFORM_MODULE_VERSION)_amd64.deb +$(INGRASYS_S9230_64X_PLATFORM_MODULE)_PLATFORM = x86_64-ingrasys_s9230_64x-r0 + +$(eval $(call add_extra_package,$(INGRASYS_S9130_32X_PLATFORM_MODULE),$(INGRASYS_S9230_64X_PLATFORM_MODULE))) + +SONIC_STRETCH_DEBS += $(INGRASYS_S9130_32X_PLATFORM_MODULE) +SONIC_STRETCH_DEBS += $(INGRASYS_S9230_64X_PLATFORM_MODULE) diff --git a/platform/nephos/platform-modules-pegatron.mk b/platform/nephos/platform-modules-pegatron.mk new file mode 100755 index 00000000000..9a411763cec --- /dev/null +++ b/platform/nephos/platform-modules-pegatron.mk @@ -0,0 +1,13 @@ +# Pegatron Platform modules + +PEGATRON_PORSCHE_PLATFORM_MODULE_VERSION = 0.1 + +export PEGATRON_PORSCHE_PLATFORM_MODULE_VERSION + +PEGATRON_PORSCHE_PLATFORM_MODULE = sonic-platform-pegatron-porsche_$(PEGATRON_PORSCHE_PLATFORM_MODULE_VERSION)_amd64.deb +$(PEGATRON_PORSCHE_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-pegatron +$(PEGATRON_PORSCHE_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(PEGATRON_PORSCHE_PLATFORM_MODULE)_PLATFORM = x86_64-pegatron_porsche-r0 +SONIC_DPKG_DEBS += $(PEGATRON_PORSCHE_PLATFORM_MODULE) + +$(eval $(call add_extra_package,$(PEGATRON_PORSCHE_PLATFORM_MODULE))) diff --git a/platform/nephos/platform.conf b/platform/nephos/platform.conf new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/nephos/rules.mk b/platform/nephos/rules.mk new file mode 100644 index 00000000000..5c115eeaf8d --- /dev/null +++ b/platform/nephos/rules.mk @@ -0,0 +1,32 @@ +include $(PLATFORM_PATH)/sai.mk +include $(PLATFORM_PATH)/nephos-modules.mk +include $(PLATFORM_PATH)/platform-modules-ingrasys.mk +include $(PLATFORM_PATH)/platform-modules-accton.mk +include $(PLATFORM_PATH)/platform-modules-cig.mk +include $(PLATFORM_PATH)/docker-syncd-nephos.mk +include $(PLATFORM_PATH)/docker-syncd-nephos-rpc.mk +include $(PLATFORM_PATH)/one-image.mk +include $(PLATFORM_PATH)/libsaithrift-dev.mk +include $(PLATFORM_PATH)/docker-ptf-nephos.mk + +NPX_DIAG = npx_diag +$(NPX_DIAG)_URL = "https://github.com/NephosInc/SONiC/raw/master/sdk/npx_diag" + +WARM_VERIFIER = warm-verifier +$(WARM_VERIFIER)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/warm-verifier" + +DSSERVE = dsserve +$(DSSERVE)_URL = "https://sonicstorage.blob.core.windows.net/packages/20190307/dsserve?sv=2015-04-05&sr=b&sig=lk7BH3DtW%2F5ehc0Rkqfga%2BUCABI0UzQmDamBsZH9K6w%3D&se=2038-05-06T22%3A34%3A45Z&sp=r" + +SONIC_ONLINE_FILES += $(NPX_DIAG) $(WARM_VERIFIER) $(DSSERVE) + +SONIC_ALL += $(SONIC_ONE_IMAGE) $(DOCKER_FPM) + +# Inject nephos sai into sairedis +$(LIBSAIREDIS)_DEPENDS += $(NEPHOS_SAI) $(NEPHOS_SAI_DEV) +ifeq ($(ENABLE_SYNCD_RPC),y) +$(LIBSAIREDIS)_DEPENDS += $(LIBSAITHRIFT_DEV) +endif + +# Runtime dependency on nephos sai is set only for syncd +$(SYNCD)_RDEPENDS += $(NEPHOS_SAI) diff --git a/platform/nephos/sai.mk b/platform/nephos/sai.mk new file mode 100644 index 00000000000..5f7c4a23ae9 --- /dev/null +++ b/platform/nephos/sai.mk @@ -0,0 +1,35 @@ +SDK_VERSION = 3.0.0 +SAI_VERSION = 1.5.0 +SAI_COMMIT_ID = 06a67d + +# Place here URL where SAI deb exist +NEPHOS_SAI_DEB_LOCAL_URL = +export NEPHOS_SAI_DEB_LOCAL_URL +# +ifneq ($(NEPHOS_SAI_DEB_LOCAL_URL), ) +SAI_FROM_LOCAL = y +else +SAI_FROM_LOCAL = n +endif + +NEPHOS_SAI = libsainps_$(SDK_VERSION)_sai_$(SAI_VERSION)_$(SAI_COMMIT_ID)_amd64.deb +ifeq ($(SAI_FROM_LOCAL), y) +$(NEPHOS_SAI)_PATH = $(NEPHOS_SAI_DEB_LOCAL_URL) +else +$(NEPHOS_SAI)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/libsainps_$(SDK_VERSION)_sai_$(SAI_VERSION)_$(SAI_COMMIT_ID)_amd64.deb" +endif + +NEPHOS_SAI_DEV = libsainps-dev_$(SDK_VERSION)_sai_$(SAI_VERSION)_$(SAI_COMMIT_ID)_amd64.deb +$(eval $(call add_derived_package,$(NEPHOS_SAI),$(NEPHOS_SAI_DEV))) +ifeq ($(SAI_FROM_LOCAL), y) +$(NEPHOS_SAI_DEV)_PATH = $(NEPHOS_SAI_DEB_LOCAL_URL) +else +$(NEPHOS_SAI_DEV)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/libsainps-dev_$(SDK_VERSION)_sai_$(SAI_VERSION)_$(SAI_COMMIT_ID)_amd64.deb" +endif + +ifeq ($(SAI_FROM_LOCAL), y) +SONIC_COPY_DEBS += $(NEPHOS_SAI) $(NEPHOS_SAI_DEV) +else +SONIC_ONLINE_DEBS += $(NEPHOS_SAI) $(NEPHOS_SAI_DEV) +endif +$(NEPHOS_SAI_DEV)_DEPENDS += $(NEPHOS_SAI) diff --git a/platform/nephos/sonic-platform-modules-accton/LICENSE b/platform/nephos/sonic-platform-modules-accton/LICENSE new file mode 100644 index 00000000000..bc693f7a4c4 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/LICENSE @@ -0,0 +1,16 @@ +Copyright (C) 2016 Microsoft, Inc +Copyright (C) 2017 Accton Technology Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/nephos/sonic-platform-modules-accton/README.md b/platform/nephos/sonic-platform-modules-accton/README.md new file mode 100644 index 00000000000..0ff20bb2d21 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/README.md @@ -0,0 +1 @@ +platform drivers of Accton products for the SONiC project diff --git a/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/Makefile b/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/Makefile new file mode 100644 index 00000000000..2d838864a27 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := x86-64-accton-as7116-54x-cpld.o x86-64-accton-as7116-54x-fan.o \ + x86-64-accton-as7116-54x-led.o x86-64-accton-as7116-54x-psu.o x86-64-accton-as7116-54x-sfp.o \ No newline at end of file diff --git a/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-cpld.c b/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-cpld.c new file mode 100644 index 00000000000..eb52512343a --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-cpld.c @@ -0,0 +1,242 @@ +/* + * A hwmon driver for the as7116_54x_cpld + * + * Copyright (C) 2017 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +/* Addresses scanned for as7116_54x_cpld + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static ssize_t show_cpld_version(struct device *dev, struct device_attribute *attr, char *buf) +{ + int val = 0; + struct i2c_client *client = to_i2c_client(dev); + + val = i2c_smbus_read_byte_data(client, 0x1); + + if (val < 0) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val); + } + + return sprintf(buf, "%d\n", val); +} + +static struct device_attribute ver = __ATTR(version, 0600, show_cpld_version, NULL); + +static void as7116_54x_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void as7116_54x_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int as7116_54x_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + status = sysfs_create_file(&client->dev.kobj, &ver.attr); + if (status) { + goto exit; + } + + dev_info(&client->dev, "chip found\n"); + as7116_54x_cpld_add_client(client); + + return 0; + +exit: + return status; +} + +static int as7116_54x_cpld_remove(struct i2c_client *client) +{ + sysfs_remove_file(&client->dev.kobj, &ver.attr); + as7116_54x_cpld_remove_client(client); + + return 0; +} + +enum cpld_chips +{ + as7116_54x_cpld1, + as7116_54x_cpld2, + as7116_54x_cpld3 +}; + +static const struct i2c_device_id as7116_54x_cpld_id[] = { + { "as7116_54x_cpld1", as7116_54x_cpld1 }, + { "as7116_54x_cpld2", as7116_54x_cpld2 }, + { "as7116_54x_cpld3", as7116_54x_cpld3 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7116_54x_cpld_id); + +static struct i2c_driver as7116_54x_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7116_54x_cpld", + }, + .probe = as7116_54x_cpld_probe, + .remove = as7116_54x_cpld_remove, + .id_table = as7116_54x_cpld_id, + .address_list = normal_i2c, +}; + +int as7116_54x_cpld_read(unsigned short cpld_addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_read_byte_data(cpld_node->client, reg); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as7116_54x_cpld_read); + +int as7116_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = i2c_smbus_write_byte_data(cpld_node->client, reg, value); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(as7116_54x_cpld_write); + +static int __init as7116_54x_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&as7116_54x_cpld_driver); +} + +static void __exit as7116_54x_cpld_exit(void) +{ + i2c_del_driver(&as7116_54x_cpld_driver); +} + +static struct dmi_system_id as7116_54x_dmi_table[] = { + { + .ident = "Accton AS7716", + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "Accton"), + DMI_MATCH(DMI_PRODUCT_NAME, "AS7116"), + }, + } +}; + +int platform_accton_as7116_54x(void) +{ + //return dmi_check_system(as7116_54x_dmi_table); + return 1; +} +EXPORT_SYMBOL(platform_accton_as7116_54x); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as7116_54x driver"); +MODULE_LICENSE("GPL"); + +module_init(as7116_54x_cpld_init); +module_exit(as7116_54x_cpld_exit); + diff --git a/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-fan.c b/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-fan.c new file mode 100644 index 00000000000..f5159c8f166 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-fan.c @@ -0,0 +1,544 @@ +/* + * A hwmon driver for the Accton as7716 32x fan + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as7116_54x_fan" + +static struct as7116_54x_fan_data *as7116_54x_fan_update_device(struct device *dev); +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); + +/* fan related data, the index should match sysfs_fan_attributes + */ +static const u8 fan_reg[] = { + 0x02, /* fan 1-6 present status */ + 0x03, /* fan 1-6 direction(0:F2B 1:B2F) */ + 0x06, /* fan PWM(for all fan) */ + 0x04, /* front fan fault */ + 0x05, /* rear fan fault */ + 0x07, /* front fan 1 speed(rpm) */ + 0x08, /* front fan 2 speed(rpm) */ + 0x09, /* front fan 3 speed(rpm) */ + 0x0A, /* front fan 4 speed(rpm) */ + 0x0B, /* front fan 5 speed(rpm) */ + 0x0C, /* rear fan 1 speed(rpm) */ + 0x0D, /* rear fan 2 speed(rpm) */ + 0x0E, /* rear fan 3 speed(rpm) */ + 0x0f, /* rear fan 4 speed(rpm) */ + 0x10, /* rear fan 5 speed(rpm) */ +}; + +/* Each client has this additional data */ +struct as7116_54x_fan_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ +}; + +enum fan_id { + FAN1_ID, + FAN2_ID, + FAN3_ID, + FAN4_ID, + FAN5_ID +}; + +enum sysfs_fan_attributes { + FAN_PRESENT_REG, + FAN_DIRECTION_REG, + FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ + FAN_FRONT_FAULT_REG, + FAN_REAR_FAULT_REG, + FAN1_FRONT_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN5_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN5_REAR_SPEED_RPM, + FAN1_DIRECTION, + FAN2_DIRECTION, + FAN3_DIRECTION, + FAN4_DIRECTION, + FAN5_DIRECTION, + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN5_PRESENT, + FAN1_FRONT_FAULT, + FAN2_FRONT_FAULT, + FAN3_FRONT_FAULT, + FAN4_FRONT_FAULT, + FAN5_FRONT_FAULT, + FAN1_REAR_FAULT, + FAN2_REAR_FAULT, + FAN3_REAR_FAULT, + FAN4_REAR_FAULT, + FAN5_REAR_FAULT, + FAN1_INPUT, /* FAN1_FRONT_SPEED_RPM, */ + FAN2_INPUT, /* FAN2_FRONT_SPEED_RPM, */ + FAN3_INPUT, /* FAN3_FRONT_SPEED_RPM, */ + FAN4_INPUT, /* FAN4_FRONT_SPEED_RPM, */ + FAN5_INPUT, /* FAN5_FRONT_SPEED_RPM, */ + FAN6_INPUT, /* FAN1_REAR_SPEED_RPM, */ + FAN7_INPUT, /* FAN2_REAR_SPEED_RPM, */ + FAN8_INPUT, /* FAN3_REAR_SPEED_RPM, */ + FAN9_INPUT, /* FAN4_REAR_SPEED_RPM, */ + FAN10_INPUT, /* FAN5_REAR_SPEED_RPM */ +}; + +/* Define attributes + */ +#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_FAULT);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_FAULT) +#define DECLARE_FAN_FAULT_ATTR(index) &sensor_dev_attr_fan##index##_front_fault.dev_attr.attr,\ + &sensor_dev_attr_fan##index##_rear_fault.dev_attr.attr + +#define DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_direction, S_IRUGO, fan_show_value, NULL, FAN##index##_DIRECTION) +#define DECLARE_FAN_DIRECTION_ATTR(index) &sensor_dev_attr_fan##index##_direction.dev_attr.attr + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN##index##_DUTY_CYCLE_PERCENTAGE) +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan##index##_duty_cycle_percentage.dev_attr.attr + +#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_present, S_IRUGO, fan_show_value, NULL, FAN##index##_PRESENT) +#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr + +#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM) +#define DECLARE_FAN_SPEED_RPM_ATTR(index) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr + +#define DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_INPUT) +#define DECLARE_FAN_INPUT_ATTR(index) &sensor_dev_attr_fan##index##_input.dev_attr.attr + +/* 6 fan fault attributes in this platform */ +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(5); +/* 6 fan speed(rpm) attributes in this platform */ +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(5); +/* 6 fan present attributes in this platform */ +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(5); +/* 6 fan direction attribute in this platform */ +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(1); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(2); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(3); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(4); +DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(5); +/* 1 fan duty cycle attribute in this platform */ +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(); + +/* fan input attributes in this platform */ +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(5); + +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(6); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(7); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(8); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(9); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(10); + +static struct attribute *as7116_54x_fan_attributes[] = { + /* fan related attributes */ + DECLARE_FAN_FAULT_ATTR(1), + DECLARE_FAN_FAULT_ATTR(2), + DECLARE_FAN_FAULT_ATTR(3), + DECLARE_FAN_FAULT_ATTR(4), + DECLARE_FAN_FAULT_ATTR(5), + DECLARE_FAN_SPEED_RPM_ATTR(1), + DECLARE_FAN_SPEED_RPM_ATTR(2), + DECLARE_FAN_SPEED_RPM_ATTR(3), + DECLARE_FAN_SPEED_RPM_ATTR(4), + DECLARE_FAN_SPEED_RPM_ATTR(5), + DECLARE_FAN_PRESENT_ATTR(1), + DECLARE_FAN_PRESENT_ATTR(2), + DECLARE_FAN_PRESENT_ATTR(3), + DECLARE_FAN_PRESENT_ATTR(4), + DECLARE_FAN_PRESENT_ATTR(5), + DECLARE_FAN_DIRECTION_ATTR(1), + DECLARE_FAN_DIRECTION_ATTR(2), + DECLARE_FAN_DIRECTION_ATTR(3), + DECLARE_FAN_DIRECTION_ATTR(4), + DECLARE_FAN_DIRECTION_ATTR(5), + DECLARE_FAN_DUTY_CYCLE_ATTR(), + DECLARE_FAN_INPUT_ATTR(1), + DECLARE_FAN_INPUT_ATTR(2), + DECLARE_FAN_INPUT_ATTR(3), + DECLARE_FAN_INPUT_ATTR(4), + DECLARE_FAN_INPUT_ATTR(5), + DECLARE_FAN_INPUT_ATTR(6), + DECLARE_FAN_INPUT_ATTR(7), + DECLARE_FAN_INPUT_ATTR(8), + DECLARE_FAN_INPUT_ATTR(9), + DECLARE_FAN_INPUT_ATTR(10), + NULL +}; + +#define FAN_DUTY_CYCLE_REG_MASK 0x1F +#define FAN_MIN_DUTY_CYCLE 20 +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 150 + +static int as7116_54x_fan_read_value(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int as7116_54x_fan_write_value(struct i2c_client *client, u8 reg, u8 value) +{ + return i2c_smbus_write_byte_data(client, reg, value); +} + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + return (reg_val & FAN_DUTY_CYCLE_REG_MASK) * 5; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + return (duty_cycle / 5); +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static u8 reg_val_to_direction(u8 reg_val, enum fan_id id) +{ + return !!(reg_val & (1 << id)); +} + +static u8 reg_val_to_is_present(u8 reg_val, enum fan_id id) +{ + return !(reg_val & (1 << id)); +} + +static u8 is_fan_fault(u8 reg_val, enum fan_id id) +{ + return !!(reg_val & (1 << id)); +} +#if 0 +static u8 is_fan_fault(struct as7116_54x_fan_data *data, enum fan_id id) +{ + u8 ret = 1; + int front_fan_index = FAN1_FRONT_SPEED_RPM + id; + int rear_fan_index = FAN1_REAR_SPEED_RPM + id; + + /* Check if the speed of front or rear fan is ZERO, + */ + if (reg_val_to_speed_rpm(data->reg_val[front_fan_index]) && + reg_val_to_speed_rpm(data->reg_val[rear_fan_index])) { + ret = 0; + } + + return ret; +} +#endif + +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + struct i2c_client *client = to_i2c_client(dev); + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value < FAN_MIN_DUTY_CYCLE) { + value = FAN_MIN_DUTY_CYCLE; + } + + if (value > FAN_MAX_DUTY_CYCLE) { + value = FAN_MAX_DUTY_CYCLE; + } + + as7116_54x_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); + return count; +} + +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7116_54x_fan_data *data = as7116_54x_fan_update_device(dev); + ssize_t ret = 0; + + if (data->valid) { + switch (attr->index) { + case FAN_DUTY_CYCLE_PERCENTAGE: + { + u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); + ret = sprintf(buf, "%u\n", duty_cycle); + break; + } + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN5_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index])); + break; + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + ret = sprintf(buf, "%d\n", + reg_val_to_is_present(data->reg_val[FAN_PRESENT_REG], + attr->index - FAN1_PRESENT)); + break; + case FAN1_FRONT_FAULT: + case FAN2_FRONT_FAULT: + case FAN3_FRONT_FAULT: + case FAN4_FRONT_FAULT: + case FAN5_FRONT_FAULT: + ret = sprintf(buf, "%d\n", + is_fan_fault(data->reg_val[FAN_FRONT_FAULT_REG], + attr->index - FAN1_FRONT_FAULT)); + break; + case FAN1_REAR_FAULT: + case FAN2_REAR_FAULT: + case FAN3_REAR_FAULT: + case FAN4_REAR_FAULT: + case FAN5_REAR_FAULT: + ret = sprintf(buf, "%d\n", + is_fan_fault(data->reg_val[FAN_REAR_FAULT_REG], + attr->index - FAN1_REAR_FAULT)); + break; + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + case FAN5_DIRECTION: + ret = sprintf(buf, "%d\n", + reg_val_to_direction(data->reg_val[FAN_DIRECTION_REG], + attr->index - FAN1_DIRECTION)); + break; + case FAN1_INPUT: + case FAN2_INPUT: + case FAN3_INPUT: + case FAN4_INPUT: + case FAN5_INPUT: + case FAN6_INPUT: + case FAN7_INPUT: + case FAN8_INPUT: + case FAN9_INPUT: + case FAN10_INPUT: + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index + - FAN1_INPUT + FAN1_FRONT_SPEED_RPM])); + break; + default: + break; + } + } + + return ret; +} + +static const struct attribute_group as7116_54x_fan_group = { + .attrs = as7116_54x_fan_attributes, +}; + +static struct as7116_54x_fan_data *as7116_54x_fan_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7116_54x_fan_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + dev_dbg(&client->dev, "Starting as7116_54x_fan update\n"); + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { + int status = as7116_54x_fan_read_value(client, fan_reg[i]); + + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + dev_dbg(&client->dev, "reg %d, err %d\n", fan_reg[i], status); + return data; + } + else { + data->reg_val[i] = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int as7116_54x_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7116_54x_fan_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7116_54x_fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7116_54x_fan_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7116_54x_fan_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7116_54x_fan_remove(struct i2c_client *client) +{ + struct as7116_54x_fan_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7116_54x_fan_group); + + return 0; +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x66, I2C_CLIENT_END }; + +static const struct i2c_device_id as7116_54x_fan_id[] = { + { "as7116_54x_fan", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7116_54x_fan_id); + +static struct i2c_driver as7116_54x_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = as7116_54x_fan_probe, + .remove = as7116_54x_fan_remove, + .id_table = as7116_54x_fan_id, + .address_list = normal_i2c, +}; + +static int __init as7116_54x_fan_init(void) +{ +#if 0 + extern int platform_accton_as7116_54x(void); + if (!platform_accton_as7116_54x()) { + return -ENODEV; + } +#endif + return i2c_add_driver(&as7116_54x_fan_driver); +} + +static void __exit as7116_54x_fan_exit(void) +{ + i2c_del_driver(&as7116_54x_fan_driver); +} + +module_init(as7116_54x_fan_init); +module_exit(as7116_54x_fan_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7116_54x_fan driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-led.c b/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-led.c new file mode 100644 index 00000000000..cd69f711c82 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-led.c @@ -0,0 +1,448 @@ +/* + * A LED driver for the accton_as7116_54x_led + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "as7116_54x_fan" + +#define DEBUG_MODE 0 +#if (DEBUG_MODE == 1) + #define DEBUG_PRINT(fmt, args...) \ + printk (KERN_INFO "%s:%s[%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +extern int as7116_54x_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as7116_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +struct as7116_54x_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[1]; /* LOC/DIAG LED */ +}; + +static struct as7116_54x_led_data *ledctl = NULL; + +/* LED related data + */ + +#define LED_CNTRLER_I2C_ADDRESS (0x60) + +#define LED_TYPE_DIAG_REG_MASK (0x0C) +#define LED_MODE_DIAG_GREEN_VALUE (0x08) +#define LED_MODE_DIAG_AMBER_VALUE (0x04) +#define LED_MODE_DIAG_YELLOW_VALUE (0x00) +#define LED_MODE_DIAG_OFF_VALUE (0x0C) + +#define LED_TYPE_FAN_REG_MASK (0x03) +#define LED_MODE_FAN_GREEN_VALUE (0x02) +#define LED_MODE_FAN_AMBER_VALUE (0x01) +#define LED_MODE_FAN_OFF_VALUE (0x03) +#define LED_MODE_FAN_AUTO_VALUE (0x00) + +#define LED_TYPE_PSU1_REG_MASK (0x03) +#define LED_MODE_PSU1_GREEN_VALUE (0x02) +#define LED_MODE_PSU1_AMBER_VALUE (0x01) +#define LED_MODE_PSU1_OFF_VALUE (0x03) +#define LED_MODE_PSU1_AUTO_VALUE (0x00) + +#define LED_TYPE_PSU2_REG_MASK (0x0C) +#define LED_MODE_PSU2_GREEN_VALUE (0x08) +#define LED_MODE_PSU2_AMBER_VALUE (0x04) +#define LED_MODE_PSU2_OFF_VALUE (0x0C) +#define LED_MODE_PSU2_AUTO_VALUE (0x00) + +#define LED_TYPE_LOC_REG_MASK (0x30) +#define LED_MODE_LOC_AMBER_VALUE (0x00) +#define LED_MODE_LOC_AMBER_BLINKING_VALUE1 (0x20) +#define LED_MODE_LOC_AMBER_BLINKING_VALUE2 (0x30) +#define LED_MODE_LOC_OFF_VALUE (0x10) + +static const u8 led_reg[] = { + 0x0A, /* LOC/DIAG/FAN LED */ + 0x0B, /* PSU1/PSU2 LED */ +}; + +enum led_type { + LED_TYPE_DIAG, + LED_TYPE_LOC, + LED_TYPE_FAN, + LED_TYPE_PSU1, + LED_TYPE_PSU2 +}; + +enum led_light_mode { + LED_MODE_OFF = 0, + LED_MODE_GREEN, + LED_MODE_GREEN_BLINK, + LED_MODE_AMBER, + LED_MODE_AMBER_BLINK, + LED_MODE_YELLOW, + LED_MODE_YELLOW_BLINK, + LED_MODE_BLUE, + LED_MODE_BLUE_BLINK, + LED_MODE_AUTO, + LED_MODE_UNKNOWN +}; + +struct led_type_mode { + enum led_type type; + enum led_light_mode mode; + int type_mask; + int mode_value; +}; + +static struct led_type_mode led_type_mode_data[] = { +{LED_TYPE_FAN, LED_MODE_OFF, LED_TYPE_FAN_REG_MASK, LED_MODE_FAN_OFF_VALUE}, +{LED_TYPE_FAN, LED_MODE_GREEN, LED_TYPE_FAN_REG_MASK, LED_MODE_FAN_GREEN_VALUE}, +{LED_TYPE_FAN, LED_MODE_AMBER, LED_TYPE_FAN_REG_MASK, LED_MODE_FAN_AMBER_VALUE}, +{LED_TYPE_FAN, LED_MODE_AUTO, LED_TYPE_FAN_REG_MASK, LED_MODE_FAN_AUTO_VALUE}, +{LED_TYPE_PSU1, LED_MODE_OFF, LED_TYPE_PSU1_REG_MASK, LED_MODE_PSU1_OFF_VALUE}, +{LED_TYPE_PSU1, LED_MODE_GREEN, LED_TYPE_PSU1_REG_MASK, LED_MODE_PSU1_GREEN_VALUE}, +{LED_TYPE_PSU1, LED_MODE_AMBER, LED_TYPE_PSU1_REG_MASK, LED_MODE_PSU1_AMBER_VALUE}, +{LED_TYPE_PSU1, LED_MODE_AUTO, LED_TYPE_PSU1_REG_MASK, LED_MODE_PSU1_AUTO_VALUE}, +{LED_TYPE_PSU2, LED_MODE_OFF, LED_TYPE_PSU2_REG_MASK, LED_MODE_PSU2_OFF_VALUE}, +{LED_TYPE_PSU2, LED_MODE_GREEN, LED_TYPE_PSU2_REG_MASK, LED_MODE_PSU2_GREEN_VALUE}, +{LED_TYPE_PSU2, LED_MODE_AMBER, LED_TYPE_PSU2_REG_MASK, LED_MODE_PSU2_AMBER_VALUE}, +{LED_TYPE_PSU2, LED_MODE_AUTO, LED_TYPE_PSU2_REG_MASK, LED_MODE_PSU2_AUTO_VALUE}, +{LED_TYPE_DIAG, LED_MODE_OFF, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_OFF_VALUE}, +{LED_TYPE_DIAG, LED_MODE_GREEN, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_GREEN_VALUE}, +{LED_TYPE_DIAG, LED_MODE_AMBER, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_AMBER_VALUE}, +{LED_TYPE_DIAG, LED_MODE_YELLOW, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_YELLOW_VALUE}, +{LED_TYPE_LOC, LED_MODE_OFF, LED_TYPE_LOC_REG_MASK, LED_MODE_LOC_OFF_VALUE}, +{LED_TYPE_LOC, LED_MODE_AMBER, LED_TYPE_LOC_REG_MASK, LED_MODE_LOC_AMBER_VALUE}, +{LED_TYPE_LOC, LED_MODE_AMBER_BLINK, LED_TYPE_LOC_REG_MASK, LED_MODE_LOC_AMBER_BLINKING_VALUE1}, +{LED_TYPE_LOC, LED_MODE_AMBER_BLINK, LED_TYPE_LOC_REG_MASK, LED_MODE_LOC_AMBER_BLINKING_VALUE2} +}; + +static int led_reg_val_to_light_mode(enum led_type type, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + if (type != led_type_mode_data[i].type) { + continue; + } + + if ((led_type_mode_data[i].type_mask & reg_val) == + led_type_mode_data[i].mode_value) { + return led_type_mode_data[i].mode; + } + } + + return LED_MODE_UNKNOWN; +} + +static u8 led_light_mode_to_reg_val(enum led_type type, + enum led_light_mode mode, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + int type_mask, mode_value; + + if (type != led_type_mode_data[i].type) + continue; + + if (mode != led_type_mode_data[i].mode) + continue; + + type_mask = led_type_mode_data[i].type_mask; + mode_value = led_type_mode_data[i].mode_value; + reg_val = (reg_val & ~type_mask) | mode_value; + } + + return reg_val; +} + +static int as7116_54x_led_read_value(u8 reg) +{ + return as7116_54x_cpld_read(LED_CNTRLER_I2C_ADDRESS, reg); +} + +static int as7116_54x_led_write_value(u8 reg, u8 value) +{ + return as7116_54x_cpld_write(LED_CNTRLER_I2C_ADDRESS, reg, value); +} + +static void as7116_54x_led_update(void) +{ + mutex_lock(&ledctl->update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting accton_as7116_54x_led update\n"); + ledctl->valid = 0; + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + int status = as7116_54x_led_read_value(led_reg[i]); + + if (status < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg[i], status); + goto exit; + } + else { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void as7116_54x_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + u8 reg, enum led_type type) +{ + int reg_val; + + mutex_lock(&ledctl->update_lock); + + reg_val = as7116_54x_led_read_value(reg); + + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + as7116_54x_led_write_value(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + + +static void as7116_54x_led_diag_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + as7116_54x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_DIAG); +} + +static enum led_brightness as7116_54x_led_diag_get(struct led_classdev *cdev) +{ + as7116_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); +} + +static void as7116_54x_led_loc_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + as7116_54x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_LOC); +} + +static enum led_brightness as7116_54x_led_loc_get(struct led_classdev *cdev) +{ + as7116_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); +} + +static void as7116_54x_led_fan_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + as7116_54x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_FAN); +} + +static enum led_brightness as7116_54x_led_fan_get(struct led_classdev *cdev) +{ + as7116_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_FAN, ledctl->reg_val[0]); +} + +static void as7116_54x_led_psu1_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + as7116_54x_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_PSU1); +} + +static enum led_brightness as7116_54x_led_psu1_get(struct led_classdev *cdev) +{ + as7116_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU1, ledctl->reg_val[1]); +} + +static void as7116_54x_led_psu2_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + as7116_54x_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_PSU2); +} + +static enum led_brightness as7116_54x_led_psu2_get(struct led_classdev *cdev) +{ + as7116_54x_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU2, ledctl->reg_val[1]); +} + +static struct led_classdev as7116_54x_leds[] = { + [LED_TYPE_DIAG] = { + .name = "as7116_54x_led::diag", + .default_trigger = "unused", + .brightness_set = as7116_54x_led_diag_set, + .brightness_get = as7116_54x_led_diag_get, + .max_brightness = LED_MODE_YELLOW, + }, + [LED_TYPE_LOC] = { + .name = "as7116_54x_led::loc", + .default_trigger = "unused", + .brightness_set = as7116_54x_led_loc_set, + .brightness_get = as7116_54x_led_loc_get, + .max_brightness = LED_MODE_AMBER_BLINK, + }, + [LED_TYPE_FAN] = { + .name = "as7116_54x_led::fan", + .default_trigger = "unused", + .brightness_set = as7116_54x_led_fan_set, + .brightness_get = as7116_54x_led_fan_get, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU1] = { + .name = "as7116_54x_led::psu1", + .default_trigger = "unused", + .brightness_set = as7116_54x_led_psu1_set, + .brightness_get = as7116_54x_led_psu1_get, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "as7116_54x_led::psu2", + .default_trigger = "unused", + .brightness_set = as7116_54x_led_psu2_set, + .brightness_get = as7116_54x_led_psu2_get, + .max_brightness = LED_MODE_AUTO, + }, +}; + + +static int as7116_54x_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(as7116_54x_leds); i++) { + ret = led_classdev_register(&pdev->dev, &as7116_54x_leds[i]); + + if (ret < 0) { + break; + } + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(as7116_54x_leds)){ + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&as7116_54x_leds[i]); + } + } + + return ret; +} + +static int as7116_54x_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(as7116_54x_leds); i++) { + led_classdev_unregister(&as7116_54x_leds[i]); + } + + return 0; +} + +static struct platform_driver as7116_54x_led_driver = { + .probe = as7116_54x_led_probe, + .remove = as7116_54x_led_remove, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init as7116_54x_led_init(void) +{ + int ret; + +#if 0 + extern int platform_accton_as7116_54x(void); + if (!platform_accton_as7116_54x()) { + return -ENODEV; + } +#endif + + ret = platform_driver_register(&as7116_54x_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct as7116_54x_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + goto exit_driver; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + goto exit_free; + } + + return 0; + +exit_free: + kfree(ledctl); +exit_driver: + platform_driver_unregister(&as7116_54x_led_driver); +exit: + return ret; +} + +static void __exit as7116_54x_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&as7116_54x_led_driver); + kfree(ledctl); +} + +module_init(as7116_54x_led_init); +module_exit(as7116_54x_led_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton_as7116_54x_led driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-psu.c b/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-psu.c new file mode 100644 index 00000000000..b4e14297f41 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-psu.c @@ -0,0 +1,349 @@ +/* + * An hwmon driver for accton as7116_54x Power Module + * + * Copyright (C) 2014 Accton Technology Corporation. + * Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PSU_STATUS_I2C_ADDR 0x60 +#define PSU_STATUS_I2C_REG_OFFSET 0x2 + +#define MODEL_NAME_LEN 11 +#define MODEL_NAME_REG_OFFSET 0x20 + +#define SERIAL_NUM_LEN 18 +#define SERIAL_NUM_REG_OFFSET 0x35 + +#define IS_POWER_GOOD(id, value) (!!(value & BIT(id*4 + 1))) +#define IS_PRESENT(id, value) (!(value & BIT(id*4))) + +static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_string(struct device *dev, struct device_attribute *da, char *buf); +static int as7116_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); +extern int as7116_54x_cpld_read(unsigned short cpld_addr, u8 reg); +static struct as7116_54x_psu_data *as7116_54x_psu_update_device(struct device *dev, u8 update_eeprom); + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +/* Each client has this additional data + */ +struct as7116_54x_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + u8 status; /* Status(present/power_good) register read from CPLD */ + char model_name[MODEL_NAME_LEN+1]; /* Model name, read from eeprom */ + char serial[SERIAL_NUM_LEN+1]; /* Serial number, read from eeprom*/ +}; + +enum as7116_54x_psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD, + PSU_SERIAL_NUMBER +}; + +/* sysfs attributes for hwmon + */ +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_string, NULL, PSU_MODEL_NAME); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); +static SENSOR_DEVICE_ATTR(psu_serial_numer, S_IRUGO, show_string, NULL, PSU_SERIAL_NUMBER); + +static struct attribute *as7116_54x_psu_attributes[] = { + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_model_name.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + &sensor_dev_attr_psu_serial_numer.dev_attr.attr, + NULL +}; + +static ssize_t show_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7116_54x_psu_data *data = as7116_54x_psu_update_device(dev, 0); + u8 status = 0; + + if (!data->valid) { + return -EIO; + } + + if (attr->index == PSU_PRESENT) { + status = IS_PRESENT(data->index, data->status); + } + else { /* PSU_POWER_GOOD */ + status = IS_POWER_GOOD(data->index, data->status); + } + + return sprintf(buf, "%d\n", status); +} + +static ssize_t show_string(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct as7116_54x_psu_data *data = as7116_54x_psu_update_device(dev, 1); + char *ptr = NULL; + + if (!data->valid) { + return -EIO; + } + + if (!IS_PRESENT(data->index, data->status)) { + return -ENXIO; + } + + if (attr->index == PSU_MODEL_NAME) { + ptr = data->model_name; + } + else { /* PSU_SERIAL_NUBMER */ + ptr = data->serial; + } + + return sprintf(buf, "%s\n", ptr); +} + +static const struct attribute_group as7116_54x_psu_group = { + .attrs = as7116_54x_psu_attributes, +}; + +static int as7116_54x_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct as7116_54x_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct as7116_54x_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &as7116_54x_psu_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &as7116_54x_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int as7116_54x_psu_remove(struct i2c_client *client) +{ + struct as7116_54x_psu_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &as7116_54x_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + as7116_54x_psu1, + as7116_54x_psu2 +}; + +static const struct i2c_device_id as7116_54x_psu_id[] = { + { "as7116_54x_psu1", as7116_54x_psu1 }, + { "as7116_54x_psu2", as7116_54x_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, as7116_54x_psu_id); + +static struct i2c_driver as7116_54x_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "as7116_54x_psu", + }, + .probe = as7116_54x_psu_probe, + .remove = as7116_54x_psu_remove, + .id_table = as7116_54x_psu_id, + .address_list = normal_i2c, +}; + +static int as7116_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ + int result = 0; + int retry_count = 5; + + while (retry_count) { + retry_count--; + + result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + + if (unlikely(result < 0)) { + msleep(10); + continue; + } + + if (unlikely(result != data_len)) { + result = -EIO; + msleep(10); + continue; + } + + result = 0; + break; + } + + return result; +} + +static struct as7116_54x_psu_data *as7116_54x_psu_update_device(struct device *dev, u8 update_eeprom) +{ + struct i2c_client *client = to_i2c_client(dev); + struct as7116_54x_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) + || !data->valid) { + int status; + + data->valid = 0; + dev_dbg(&client->dev, "Starting as7116_54x update\n"); + + /* Read psu status */ + status = as7116_54x_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET); + + if (status < 0) { + dev_dbg(&client->dev, "cpld reg (0x%x) err %d\n", PSU_STATUS_I2C_ADDR, status); + goto exit; + } + else { + data->status = status; + } + + + memset(data->model_name, 0, sizeof(data->model_name)); + memset(data->serial, 0, sizeof(data->serial)); + + if (update_eeprom && IS_PRESENT(data->index, data->status)) { + /* Read model name */ + status = as7116_54x_psu_read_block(client, MODEL_NAME_REG_OFFSET, data->model_name, + ARRAY_SIZE(data->model_name)-1); + + if (status < 0) { + data->model_name[0] = '\0'; + dev_dbg(&client->dev, "unable to read model name from (0x%x)\n", client->addr); + goto exit; + } + else { + /* Skip the meaningless data byte 8*/ + data->model_name[8] = data->model_name[9]; + data->model_name[9] = data->model_name[10]; + data->model_name[10] = '\0'; + } + + /* Read serial number */ + status = as7116_54x_psu_read_block(client, SERIAL_NUM_REG_OFFSET, data->serial, + ARRAY_SIZE(data->serial)-1); + + if (status < 0) { + data->serial[0] = '\0'; + dev_dbg(&client->dev, "unable to read serial number from (0x%x)\n", client->addr); + goto exit; + } + else { + data->serial[SERIAL_NUM_LEN] = '\0'; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + +exit: + mutex_unlock(&data->update_lock); + + return data; +} + +static int __init as7116_54x_psu_init(void) +{ + //extern int platform_accton_as7116_54x(void); + //if (!platform_accton_as7116_54x()) { + // return -ENODEV; + //} + + return i2c_add_driver(&as7116_54x_psu_driver); +} + +static void __exit as7116_54x_psu_exit(void) +{ + i2c_del_driver(&as7116_54x_psu_driver); +} + +module_init(as7116_54x_psu_init); +module_exit(as7116_54x_psu_exit); + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("as7116_54x_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-sfp.c b/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-sfp.c new file mode 100644 index 00000000000..540ceb21722 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-sfp.c @@ -0,0 +1,1384 @@ +/* + * SFP driver for accton as7116_54x sfp + * + * Copyright (C) Brandon Chuang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "as7116_54x_sfp" /* Platform dependent */ + +#define DEBUG_MODE 0 + +#if (DEBUG_MODE == 1) + #define DEBUG_PRINT(fmt, args...) \ + printk (KERN_INFO "%s:%s[%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +#define EEPROM_NAME "sfp_eeprom" +#define EEPROM_SIZE 256 /* 256 byte eeprom */ +#define BIT_INDEX(i) (1ULL << (i)) +#define USE_I2C_BLOCK_READ 1 /* Platform dependent */ +#define I2C_RW_RETRY_COUNT 3 +#define I2C_RW_RETRY_INTERVAL 100 /* ms */ + +#define SFP_EEPROM_A0_I2C_ADDR (0xA0 >> 1) +#define SFP_EEPROM_A2_I2C_ADDR (0xA2 >> 1) + +#define SFF8024_PHYSICAL_DEVICE_ID_ADDR 0x0 +#define SFF8024_DEVICE_ID_SFP 0x3 +#define SFF8024_DEVICE_ID_QSFP 0xC +#define SFF8024_DEVICE_ID_QSFP_PLUS 0xD +#define SFF8024_DEVICE_ID_QSFP28 0x11 + +#define SFF8472_DIAG_MON_TYPE_ADDR 92 +#define SFF8472_DIAG_MON_TYPE_DDM_MASK 0x40 +#define SFF8472_10G_ETH_COMPLIANCE_ADDR 0x3 +#define SFF8472_10G_BASE_MASK 0xF0 + +#define SFF8436_RX_LOS_ADDR 3 +#define SFF8436_TX_FAULT_ADDR 4 +#define SFF8436_TX_DISABLE_ADDR 86 + +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_port_type(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_present(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t sfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t sfp_set_tx_disable(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +static ssize_t qsfp_set_tx_disable(struct device *dev, struct device_attribute *da, const char *buf, size_t count);; +static ssize_t sfp_show_ddm_implemented(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t sfp_eeprom_read(struct i2c_client *, u8, u8 *,int); +static ssize_t sfp_eeprom_write(struct i2c_client *, u8 , const char *,int); +extern int as7116_54x_cpld_read(unsigned short cpld_addr, u8 reg); +extern int as7116_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +enum sfp_sysfs_attributes { + PRESENT, + PRESENT_ALL, + PORT_NUMBER, + PORT_TYPE, + DDM_IMPLEMENTED, + TX_FAULT, + TX_FAULT1, + TX_FAULT2, + TX_FAULT3, + TX_FAULT4, + TX_DISABLE, + TX_DISABLE1, + TX_DISABLE2, + TX_DISABLE3, + TX_DISABLE4, + RX_LOS, + RX_LOS1, + RX_LOS2, + RX_LOS3, + RX_LOS4, + RX_LOS_ALL +}; + +/* SFP/QSFP common attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_port_number, S_IRUGO, show_port_number, NULL, PORT_NUMBER); +static SENSOR_DEVICE_ATTR(sfp_port_type, S_IRUGO, show_port_type, NULL, PORT_TYPE); +static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, show_present, NULL, PRESENT); +static SENSOR_DEVICE_ATTR(sfp_is_present_all, S_IRUGO, show_present, NULL, PRESENT_ALL); +static SENSOR_DEVICE_ATTR(sfp_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, RX_LOS); +static SENSOR_DEVICE_ATTR(sfp_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, TX_DISABLE); +static SENSOR_DEVICE_ATTR(sfp_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, TX_FAULT); + +/* QSFP attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_rx_los1, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS1); +static SENSOR_DEVICE_ATTR(sfp_rx_los2, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS2); +static SENSOR_DEVICE_ATTR(sfp_rx_los3, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS3); +static SENSOR_DEVICE_ATTR(sfp_rx_los4, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS4); +static SENSOR_DEVICE_ATTR(sfp_tx_disable1, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE1); +static SENSOR_DEVICE_ATTR(sfp_tx_disable2, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE2); +static SENSOR_DEVICE_ATTR(sfp_tx_disable3, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE3); +static SENSOR_DEVICE_ATTR(sfp_tx_disable4, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE4); +static SENSOR_DEVICE_ATTR(sfp_tx_fault1, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT1); +static SENSOR_DEVICE_ATTR(sfp_tx_fault2, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT2); +static SENSOR_DEVICE_ATTR(sfp_tx_fault3, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT3); +static SENSOR_DEVICE_ATTR(sfp_tx_fault4, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT4); +static struct attribute *qsfp_attributes[] = { + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_port_type.dev_attr.attr, + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los1.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los2.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los3.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los4.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable1.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable2.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable3.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable4.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault1.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault2.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault3.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault4.dev_attr.attr, + NULL +}; + +/* SFP msa attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_ddm_implemented, S_IRUGO, sfp_show_ddm_implemented, NULL, DDM_IMPLEMENTED); +static SENSOR_DEVICE_ATTR(sfp_rx_los_all, S_IRUGO, sfp_show_tx_rx_status, NULL, RX_LOS_ALL); +static struct attribute *sfp_msa_attributes[] = { + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_port_type.dev_attr.attr, + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, + &sensor_dev_attr_sfp_ddm_implemented.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los_all.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable.dev_attr.attr, + NULL +}; + +/* SFP ddm attributes for sysfs */ +static struct attribute *sfp_ddm_attributes[] = { + NULL +}; + +/* Platform dependent +++ */ +#define CPLD_PORT_TO_FRONT_PORT(port) (port+1) + +enum port_numbers { +as7116_54x_sfp1, as7116_54x_sfp2, as7116_54x_sfp3, as7116_54x_sfp4, +as7116_54x_sfp5, as7116_54x_sfp6, as7116_54x_sfp7, as7116_54x_sfp8, +as7116_54x_sfp9, as7116_54x_sfp10, as7116_54x_sfp11, as7116_54x_sfp12, +as7116_54x_sfp13, as7116_54x_sfp14, as7116_54x_sfp15, as7116_54x_sfp16, +as7116_54x_sfp17, as7116_54x_sfp18, as7116_54x_sfp19, as7116_54x_sfp20, +as7116_54x_sfp21, as7116_54x_sfp22, as7116_54x_sfp23, as7116_54x_sfp24, +as7116_54x_sfp25, as7116_54x_sfp26, as7116_54x_sfp27, as7116_54x_sfp28, +as7116_54x_sfp29, as7116_54x_sfp30, as7116_54x_sfp31, as7116_54x_sfp32, +as7116_54x_sfp33, as7116_54x_sfp34, as7116_54x_sfp35, as7116_54x_sfp36, +as7116_54x_sfp37, as7116_54x_sfp38, as7116_54x_sfp39, as7116_54x_sfp40, +as7116_54x_sfp41, as7116_54x_sfp42, as7116_54x_sfp43, as7116_54x_sfp44, +as7116_54x_sfp45, as7116_54x_sfp46, as7116_54x_sfp47, as7116_54x_sfp48, +as7116_54x_sfp49, as7116_54x_sfp50, as7116_54x_sfp51, as7116_54x_sfp52, +as7116_54x_sfp53, as7116_54x_sfp54 +}; + +#define I2C_DEV_ID(x) { #x, x} + +static const struct i2c_device_id sfp_device_id[] = { +I2C_DEV_ID(as7116_54x_sfp1), +I2C_DEV_ID(as7116_54x_sfp2), +I2C_DEV_ID(as7116_54x_sfp3), +I2C_DEV_ID(as7116_54x_sfp4), +I2C_DEV_ID(as7116_54x_sfp5), +I2C_DEV_ID(as7116_54x_sfp6), +I2C_DEV_ID(as7116_54x_sfp7), +I2C_DEV_ID(as7116_54x_sfp8), +I2C_DEV_ID(as7116_54x_sfp9), +I2C_DEV_ID(as7116_54x_sfp10), +I2C_DEV_ID(as7116_54x_sfp11), +I2C_DEV_ID(as7116_54x_sfp12), +I2C_DEV_ID(as7116_54x_sfp13), +I2C_DEV_ID(as7116_54x_sfp14), +I2C_DEV_ID(as7116_54x_sfp15), +I2C_DEV_ID(as7116_54x_sfp16), +I2C_DEV_ID(as7116_54x_sfp17), +I2C_DEV_ID(as7116_54x_sfp18), +I2C_DEV_ID(as7116_54x_sfp19), +I2C_DEV_ID(as7116_54x_sfp20), +I2C_DEV_ID(as7116_54x_sfp21), +I2C_DEV_ID(as7116_54x_sfp22), +I2C_DEV_ID(as7116_54x_sfp23), +I2C_DEV_ID(as7116_54x_sfp24), +I2C_DEV_ID(as7116_54x_sfp25), +I2C_DEV_ID(as7116_54x_sfp26), +I2C_DEV_ID(as7116_54x_sfp27), +I2C_DEV_ID(as7116_54x_sfp28), +I2C_DEV_ID(as7116_54x_sfp29), +I2C_DEV_ID(as7116_54x_sfp30), +I2C_DEV_ID(as7116_54x_sfp31), +I2C_DEV_ID(as7116_54x_sfp32), +I2C_DEV_ID(as7116_54x_sfp33), +I2C_DEV_ID(as7116_54x_sfp34), +I2C_DEV_ID(as7116_54x_sfp35), +I2C_DEV_ID(as7116_54x_sfp36), +I2C_DEV_ID(as7116_54x_sfp37), +I2C_DEV_ID(as7116_54x_sfp38), +I2C_DEV_ID(as7116_54x_sfp39), +I2C_DEV_ID(as7116_54x_sfp40), +I2C_DEV_ID(as7116_54x_sfp41), +I2C_DEV_ID(as7116_54x_sfp42), +I2C_DEV_ID(as7116_54x_sfp43), +I2C_DEV_ID(as7116_54x_sfp44), +I2C_DEV_ID(as7116_54x_sfp45), +I2C_DEV_ID(as7116_54x_sfp46), +I2C_DEV_ID(as7116_54x_sfp47), +I2C_DEV_ID(as7116_54x_sfp48), +I2C_DEV_ID(as7116_54x_sfp49), +I2C_DEV_ID(as7116_54x_sfp50), +I2C_DEV_ID(as7116_54x_sfp51), +I2C_DEV_ID(as7116_54x_sfp52), +I2C_DEV_ID(as7116_54x_sfp53), +I2C_DEV_ID(as7116_54x_sfp54), +{ /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, sfp_device_id); + +/* + * list of valid port types + * note OOM_PORT_TYPE_NOT_PRESENT to indicate no + * module is present in this port + */ +typedef enum oom_driver_port_type_e { + OOM_DRIVER_PORT_TYPE_INVALID, + OOM_DRIVER_PORT_TYPE_NOT_PRESENT, + OOM_DRIVER_PORT_TYPE_SFP, + OOM_DRIVER_PORT_TYPE_SFP_PLUS, + OOM_DRIVER_PORT_TYPE_QSFP, + OOM_DRIVER_PORT_TYPE_QSFP_PLUS, + OOM_DRIVER_PORT_TYPE_QSFP28 +} oom_driver_port_type_t; + +enum driver_type_e { + DRIVER_TYPE_SFP_MSA, + DRIVER_TYPE_SFP_DDM, + DRIVER_TYPE_QSFP +}; + +/* Each client has this additional data + */ +struct eeprom_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + struct bin_attribute bin; /* eeprom data */ +}; + +struct sfp_msa_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u64 status[6]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss + 3 => device id + 4 => 10G Ethernet Compliance Codes + to distinguish SFP or SFP+ + 5 => DIAGNOSTIC MONITORING TYPE */ + struct eeprom_data eeprom; +}; + +struct sfp_ddm_data { + struct eeprom_data eeprom; +}; + +struct qsfp_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status[3]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss */ + + u8 device_id; + struct eeprom_data eeprom; +}; + +struct sfp_port_data { + struct mutex update_lock; + enum driver_type_e driver_type; + int port; /* CPLD port index */ + oom_driver_port_type_t port_type; + u64 present; /* present status, bit0:port0, bit1:port1 and so on */ + + struct sfp_msa_data *msa; + struct sfp_ddm_data *ddm; + struct qsfp_data *qsfp; + + struct i2c_client *client; +}; + +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + return sprintf(buf, "%d\n", CPLD_PORT_TO_FRONT_PORT(data->port)); +} + +/* Platform dependent +++ */ +static struct sfp_port_data *sfp_update_present(struct i2c_client *client) +{ + int i = 0, j = 0, status = -1; + u8 reg; + unsigned short cpld_addr; + struct sfp_port_data *data = i2c_get_clientdata(client); + + DEBUG_PRINT("Starting sfp present status update"); + mutex_lock(&data->update_lock); + data->present = 0; + + /* Read present status of port 1~48(SFP port) */ + for (i = 0; i < 2; i++) { + for (j = 0; j < 3; j++) { + cpld_addr = 0x61+i; + reg = 0x6+j; + status = as7116_54x_cpld_read(cpld_addr, reg); + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_addr, reg, status); + goto exit; + } + + DEBUG_PRINT("Present status = 0x%lx\r\n", data->present); + data->present |= (u64)status << ((i*24) + (j%3)*8); + } + } + + /* Read present status of port 49-54(QSFP port) */ + cpld_addr = 0x62; + reg = 0x14; + status = as7116_54x_cpld_read(cpld_addr, reg); + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_addr, reg, status); + goto exit; + } + else { + data->present |= (u64)status << 48; + } + + DEBUG_PRINT("Present status = 0x%lx", data->present); +exit: + mutex_unlock(&data->update_lock); + return (status < 0) ? ERR_PTR(status) : data; +} + +static struct sfp_port_data *sfp_update_tx_rx_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int i = 0, j = 0; + int status = -1; + + if (time_before(jiffies, data->msa->last_updated + HZ + HZ / 2) && data->msa->valid) { + return data; + } + + DEBUG_PRINT("Starting as7116_54x sfp tx rx status update"); + mutex_lock(&data->update_lock); + data->msa->valid = 0; + memset(data->msa->status, 0, sizeof(data->msa->status)); + + /* Read status of port 1~48(SFP port) */ + for (i = 0; i < 2; i++) { + for (j = 0; j < 9; j++) { + u8 reg; + unsigned short cpld_addr; + reg = 0x9+j; + cpld_addr = 0x61+i; + + status = as7116_54x_cpld_read(cpld_addr, reg); + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_addr, reg, status); + goto exit; + } + + data->msa->status[j/3] |= (u64)status << ((i*24) + (j%3)*8); + } + } + + data->msa->valid = 1; + data->msa->last_updated = jiffies; + +exit: + mutex_unlock(&data->update_lock); + return (status < 0) ? ERR_PTR(status) : data; +} + +static ssize_t sfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + unsigned short cpld_addr = 0; + u8 cpld_reg = 0, cpld_val = 0, cpld_bit = 0; + long disable; + int error; + + if (data->driver_type == DRIVER_TYPE_QSFP) { + return qsfp_set_tx_disable(dev, da, buf, count); + } + + error = kstrtol(buf, 10, &disable); + if (error) { + return error; + } + + mutex_lock(&data->update_lock); + + if(data->port < 24) { + cpld_addr = 0x61; + cpld_reg = 0xC + data->port / 8; + cpld_bit = 1 << (data->port % 8); + } + else { /* port 24 ~ 48 */ + cpld_addr = 0x62; + cpld_reg = 0xC + (data->port - 24) / 8; + cpld_bit = 1 << (data->port % 8); + } + + /* Read current status */ + cpld_val = as7116_54x_cpld_read(cpld_addr, cpld_reg); + + /* Update tx_disable status */ + if (disable) { + data->msa->status[1] |= BIT_INDEX(data->port); + cpld_val |= cpld_bit; + } + else { + data->msa->status[1] &= ~BIT_INDEX(data->port); + cpld_val &= ~cpld_bit; + } + + as7116_54x_cpld_write(cpld_addr, cpld_reg, cpld_val); + mutex_unlock(&data->update_lock); + return count; +} +/* Platform dependent --- */ + +static int sfp_is_port_present(struct i2c_client *client, int port) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + + data = sfp_update_present(client); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + return !(data->present & BIT_INDEX(data->port)); /* Platform dependent */ +} + +/* Platform dependent +++ */ +static ssize_t show_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + + if (PRESENT_ALL == attr->index) { + int i; + u8 values[7] = {0}; + struct sfp_port_data *data = sfp_update_present(client); + + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + for (i = 0; i < ARRAY_SIZE(values); i++) { + values[i] = ~(u8)(data->present >> (i * 8)); + } + + /* Return values 1 -> 54 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], + values[3], values[4], values[5], + values[6] & 0x3F); + } + else { + struct sfp_port_data *data = i2c_get_clientdata(client); + int present = sfp_is_port_present(client, data->port); + + if (IS_ERR_VALUE(present)) { + return present; + } + + /* PRESENT */ + return sprintf(buf, "%d\n", present); + } +} +/* Platform dependent --- */ + +static struct sfp_port_data *sfp_update_port_type(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + u8 buf = 0; + int status; + + mutex_lock(&data->update_lock); + + switch (data->driver_type) { + case DRIVER_TYPE_SFP_MSA: + { + status = sfp_eeprom_read(client, SFF8024_PHYSICAL_DEVICE_ID_ADDR, &buf, sizeof(buf)); + if (unlikely(status < 0)) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + if (buf != SFF8024_DEVICE_ID_SFP) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + status = sfp_eeprom_read(client, SFF8472_10G_ETH_COMPLIANCE_ADDR, &buf, sizeof(buf)); + if (unlikely(status < 0)) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + DEBUG_PRINT("sfp port type (0x3) data = (0x%x)", buf); + data->port_type = buf & SFF8472_10G_BASE_MASK ? OOM_DRIVER_PORT_TYPE_SFP_PLUS : OOM_DRIVER_PORT_TYPE_SFP; + break; + } + case DRIVER_TYPE_QSFP: + { + status = sfp_eeprom_read(client, SFF8024_PHYSICAL_DEVICE_ID_ADDR, &buf, sizeof(buf)); + if (unlikely(status < 0)) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + DEBUG_PRINT("qsfp port type (0x0) buf = (0x%x)", buf); + switch (buf) { + case SFF8024_DEVICE_ID_QSFP: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP; + break; + case SFF8024_DEVICE_ID_QSFP_PLUS: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP_PLUS; + break; + case SFF8024_DEVICE_ID_QSFP28: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP_PLUS; + break; + default: + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + break; + } + default: + break; + } + + mutex_unlock(&data->update_lock); + return data; +} + +static ssize_t show_port_type(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int present = sfp_is_port_present(client, data->port); + + if (IS_ERR_VALUE(present)) { + return present; + } + + if (!present) { + /* port is not present */ + return sprintf(buf, "%d\n", OOM_DRIVER_PORT_TYPE_NOT_PRESENT); + } + + sfp_update_port_type(dev); + return sprintf(buf, "%d\n", data->port_type); +} + +static struct sfp_port_data *qsfp_update_tx_rx_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int i, status = -1; + u8 buf = 0; + u8 reg[] = {SFF8436_TX_FAULT_ADDR, SFF8436_TX_DISABLE_ADDR, SFF8436_RX_LOS_ADDR}; + + DEBUG_PRINT(""); + if (time_before(jiffies, data->qsfp->last_updated + HZ + HZ / 2) && data->qsfp->valid) { + return data; + } + + DEBUG_PRINT("Starting sfp tx rx status update"); + mutex_lock(&data->update_lock); + data->qsfp->valid = 0; + memset(data->qsfp->status, 0, sizeof(data->qsfp->status)); + + DEBUG_PRINT(""); + /* Notify device to update tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(client, reg[i], &buf, sizeof(buf)); + if (unlikely(status < 0)) { + DEBUG_PRINT(""); + goto exit; + } + } + msleep(200); + DEBUG_PRINT(""); + + /* Read actual tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(client, reg[i], &buf, sizeof(buf)); + if (unlikely(status < 0)) { + DEBUG_PRINT(""); + goto exit; + } + + DEBUG_PRINT("qsfp reg(0x%x) status = (0x%x)", reg[i], data->qsfp->status[i]); + data->qsfp->status[i] = (buf & 0xF); + } + + DEBUG_PRINT(""); + data->qsfp->valid = 1; + data->qsfp->last_updated = jiffies; + +exit: + DEBUG_PRINT(""); + mutex_unlock(&data->update_lock); + return (status < 0) ? ERR_PTR(status) : data; +} + +static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + int present; + u8 val = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + DEBUG_PRINT(""); + present = sfp_is_port_present(client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + DEBUG_PRINT(""); + if (present == 0) { + /* port is not present */ + return -ENODEV; + } + + DEBUG_PRINT(""); + data = qsfp_update_tx_rx_status(dev); + DEBUG_PRINT(""); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + DEBUG_PRINT(""); + switch (attr->index) { + case TX_FAULT: + val = !!(data->qsfp->status[2] & 0xF); + break; + case TX_FAULT1: + case TX_FAULT2: + case TX_FAULT3: + case TX_FAULT4: + val = !!(data->qsfp->status[2] & BIT_INDEX(attr->index - TX_FAULT1)); + break; + case TX_DISABLE: + val = data->qsfp->status[1] & 0xF; + break; + case TX_DISABLE1: + case TX_DISABLE2: + case TX_DISABLE3: + case TX_DISABLE4: + val = !!(data->qsfp->status[1] & BIT_INDEX(attr->index - TX_DISABLE1)); + break; + case RX_LOS: + val = !!(data->qsfp->status[0] & 0xF); + break; + case RX_LOS1: + case RX_LOS2: + case RX_LOS3: + case RX_LOS4: + val = !!(data->qsfp->status[0] & BIT_INDEX(attr->index - RX_LOS1)); + break; + default: + break; + } + + DEBUG_PRINT(""); + return sprintf(buf, "%d\n", val); +} + +static ssize_t qsfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + long disable; + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + status = sfp_is_port_present(client, data->port); + if (IS_ERR_VALUE(status)) { + return status; + } + + if (!status) { + /* port is not present */ + return -ENXIO; + } + + status = kstrtol(buf, 10, &disable); + if (status) { + return status; + } + + data = qsfp_update_tx_rx_status(dev); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + mutex_lock(&data->update_lock); + + if (attr->index == TX_DISABLE) { + data->qsfp->status[1] = disable & 0xF; + } + else {/* TX_DISABLE1 ~ TX_DISABLE4*/ + if (disable) { + data->qsfp->status[1] |= (1 << (attr->index - TX_DISABLE1)); + } + else { + data->qsfp->status[1] &= ~(1 << (attr->index - TX_DISABLE1)); + } + } + + DEBUG_PRINT("index = (%d), status = (0x%x)", attr->index, data->qsfp->status[1]); + status = sfp_eeprom_write(data->client, SFF8436_TX_DISABLE_ADDR, &data->qsfp->status[1], sizeof(data->qsfp->status[1])); + if (unlikely(status < 0)) { + count = status; + } + + mutex_unlock(&data->update_lock); + return count; +} + +static ssize_t sfp_show_ddm_implemented(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + char ddm; + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + status = sfp_is_port_present(client, data->port); + if (IS_ERR_VALUE(status)) { + return status; + } + + if (status == 0) { + /* port is not present */ + return -ENODEV; + } + + status = sfp_eeprom_read(client, SFF8472_DIAG_MON_TYPE_ADDR, &ddm, sizeof(ddm)); + if (unlikely(status < 0)) { + return status; + } + + return sprintf(buf, "%d\n", !!(ddm & SFF8472_DIAG_MON_TYPE_DDM_MASK)); +} + +/* Platform dependent +++ */ +static ssize_t sfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 val = 0, index = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + DEBUG_PRINT("driver type = (%d)", data->driver_type); + if (data->driver_type == DRIVER_TYPE_QSFP) { + DEBUG_PRINT(""); + return qsfp_show_tx_rx_status(dev, da, buf); + } + + DEBUG_PRINT(""); + data = sfp_update_tx_rx_status(dev); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + if(attr->index == RX_LOS_ALL) { + int i = 0; + u8 values[6] = {0}; + + for (i = 0; i < ARRAY_SIZE(values); i++) { + values[i] = (u8)(data->msa->status[2] >> (i * 8)); + } + + /** Return values 1 -> 48 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], + values[3], values[4], values[5]); + } + + switch (attr->index) { + case TX_FAULT: + index = 0; + break; + case TX_DISABLE: + index = 1; + break; + case RX_LOS: + index = 2; + break; + default: + break; + } + + val = !!(data->msa->status[index] & BIT_INDEX(data->port)); + return sprintf(buf, "%d\n", val); +} +/* Platform dependent --- */ +static ssize_t sfp_eeprom_write(struct i2c_client *client, u8 command, const char *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int status, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + status = i2c_smbus_write_i2c_block_data(client, command, data_len, data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + return status; + } + + return data_len; +#else + int status, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, command, *data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + return status; + } + + return 1; +#endif + + +} + +static ssize_t sfp_port_write(struct sfp_port_data *data, + const char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + return count; + } + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_write(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; +} + + +static ssize_t sfp_bin_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + int present; + struct sfp_port_data *data; + DEBUG_PRINT("%s(%d) offset = (%d), count = (%d)", off, count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + + present = sfp_is_port_present(data->client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + if (present == 0) { + /* port is not present */ + return -ENODEV; + } + + return sfp_port_write(data, buf, off, count); +} + +static ssize_t sfp_eeprom_read(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int status, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + status = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + goto abort; + } + if (unlikely(status != data_len)) { + status = -EIO; + goto abort; + } + + //result = data_len; + +abort: + return status; +#else + int status, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, command); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "sfp read byte data failed, command(0x%2x), data(0x%2x)\r\n", command, status); + goto abort; + } + + *data = (u8)status; + status = 1; + +abort: + return status; +#endif +} + +static ssize_t sfp_port_read(struct sfp_port_data *data, + char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + DEBUG_PRINT("Count = 0, return"); + return count; + } + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_read(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; + +} + +static ssize_t sfp_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + int present; + struct sfp_port_data *data; + DEBUG_PRINT("offset = (%d), count = (%d)", off, count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + + present = sfp_is_port_present(data->client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + if (present == 0) { + /* port is not present */ + return -ENODEV; + } + + return sfp_port_read(data, buf, off, count); +} + +static int sfp_sysfs_eeprom_init(struct kobject *kobj, struct bin_attribute *eeprom) +{ + int err; + + sysfs_bin_attr_init(eeprom); + eeprom->attr.name = EEPROM_NAME; + eeprom->attr.mode = S_IWUSR | S_IRUGO; + eeprom->read = sfp_bin_read; + eeprom->write = sfp_bin_write; + eeprom->size = EEPROM_SIZE; + + /* Create eeprom file */ + err = sysfs_create_bin_file(kobj, eeprom); + if (err) { + return err; + } + + return 0; +} + +static int sfp_sysfs_eeprom_cleanup(struct kobject *kobj, struct bin_attribute *eeprom) +{ + sysfs_remove_bin_file(kobj, eeprom); + return 0; +} + +static const struct attribute_group sfp_msa_group = { + .attrs = sfp_msa_attributes, +}; + +static int sfp_i2c_check_functionality(struct i2c_client *client) +{ +#if USE_I2C_BLOCK_READ + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK); +#else + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA); +#endif +} + +static int sfp_msa_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct sfp_msa_data **data) +{ + int status; + struct sfp_msa_data *msa; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + msa = kzalloc(sizeof(struct sfp_msa_data), GFP_KERNEL); + if (!msa) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &sfp_msa_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &msa->eeprom.bin); + if (status) { + goto exit_remove; + } + + *data = msa; + dev_info(&client->dev, "sfp msa '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); +exit_free: + kfree(msa); +exit: + + return status; +} + +static const struct attribute_group sfp_ddm_group = { + .attrs = sfp_ddm_attributes, +}; + +static int sfp_ddm_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct sfp_ddm_data **data) +{ + int status; + struct sfp_ddm_data *ddm; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + ddm = kzalloc(sizeof(struct sfp_ddm_data), GFP_KERNEL); + if (!ddm) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &sfp_ddm_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &ddm->eeprom.bin); + if (status) { + goto exit_remove; + } + + *data = ddm; + dev_info(&client->dev, "sfp ddm '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &sfp_ddm_group); +exit_free: + kfree(ddm); +exit: + + return status; +} + +static const struct attribute_group qsfp_group = { + .attrs = qsfp_attributes, +}; + +static int qsfp_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct qsfp_data **data) +{ + int status; + struct qsfp_data *qsfp; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + qsfp = kzalloc(sizeof(struct qsfp_data), GFP_KERNEL); + if (!qsfp) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &qsfp_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &qsfp->eeprom.bin); + if (status) { + goto exit_remove; + } + + /* Bring QSFPs out of reset */ + as7116_54x_cpld_write(0x62, 0x15, 0x3F); + + *data = qsfp; + dev_info(&client->dev, "qsfp '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &qsfp_group); +exit_free: + kfree(qsfp); +exit: + + return status; +} + +/* Platform dependent +++ */ +static int sfp_device_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct sfp_port_data *data = NULL; + + data = kzalloc(sizeof(struct sfp_port_data), GFP_KERNEL); + if (!data) { + return -ENOMEM; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->port = dev_id->driver_data; + data->client = client; + + if (dev_id->driver_data >= as7116_54x_sfp1 && dev_id->driver_data <= as7116_54x_sfp48) { + if (client->addr == SFP_EEPROM_A0_I2C_ADDR) { + data->driver_type = DRIVER_TYPE_SFP_MSA; + return sfp_msa_probe(client, dev_id, &data->msa); + } + else if (client->addr == SFP_EEPROM_A2_I2C_ADDR) { + data->driver_type = DRIVER_TYPE_SFP_DDM; + return sfp_ddm_probe(client, dev_id, &data->ddm); + } + } + else { /* as7116_54x_sfp49 ~ as7116_54x_sfp54 */ + if (client->addr == SFP_EEPROM_A0_I2C_ADDR) { + data->driver_type = DRIVER_TYPE_QSFP; + return qsfp_probe(client, dev_id, &data->qsfp); + } + } + + return -ENODEV; +} +/* Platform dependent --- */ + +static int sfp_msa_remove(struct i2c_client *client, struct sfp_msa_data *data) +{ + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); + kfree(data); + return 0; +} + +static int sfp_ddm_remove(struct i2c_client *client, struct sfp_ddm_data *data) +{ + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + sysfs_remove_group(&client->dev.kobj, &sfp_ddm_group); + kfree(data); + return 0; +} + +static int qfp_remove(struct i2c_client *client, struct qsfp_data *data) +{ + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + sysfs_remove_group(&client->dev.kobj, &qsfp_group); + kfree(data); + return 0; +} + +static int sfp_device_remove(struct i2c_client *client) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + + switch (data->driver_type) { + case DRIVER_TYPE_SFP_MSA: + return sfp_msa_remove(client, data->msa); + case DRIVER_TYPE_SFP_DDM: + return sfp_ddm_remove(client, data->ddm); + case DRIVER_TYPE_QSFP: + return qfp_remove(client, data->qsfp); + } + + return 0; +} + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static struct i2c_driver sfp_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = sfp_device_probe, + .remove = sfp_device_remove, + .id_table = sfp_device_id, + .address_list = normal_i2c, +}; + +static int __init sfp_init(void) +{ + //extern int platform_accton_as7116_54x(void); + //if (!platform_accton_as7116_54x()) { + // return -ENODEV; + //} + + return i2c_add_driver(&sfp_driver); +} + +static void __exit sfp_exit(void) +{ + i2c_del_driver(&sfp_driver); +} + +MODULE_AUTHOR("Brandon Chuang "); +MODULE_DESCRIPTION("accton as7116_54x_sfp driver"); +MODULE_LICENSE("GPL"); + +module_init(sfp_init); +module_exit(sfp_exit); + diff --git a/platform/nephos/sonic-platform-modules-accton/as7116-54x/service/as7116-platform-init.service b/platform/nephos/sonic-platform-modules-accton/as7116-54x/service/as7116-platform-init.service new file mode 100755 index 00000000000..6eaf4745210 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/as7116-54x/service/as7116-platform-init.service @@ -0,0 +1,14 @@ +[Unit] +Description=Accton AS7116-54X Platform initialization service +Before=pmon.service +After=sysinit.target +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/accton_as7116_util.py install +ExecStop=/usr/local/bin/accton_as7116_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/nephos/sonic-platform-modules-accton/as7116-54x/service/platform_api/platform_api_mgnt.sh b/platform/nephos/sonic-platform-modules-accton/as7116-54x/service/platform_api/platform_api_mgnt.sh new file mode 100755 index 00000000000..e1d33035789 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/as7116-54x/service/platform_api/platform_api_mgnt.sh @@ -0,0 +1,41 @@ +#!/bin/bash + +PREV_REBOOT_CAUSE="/host/reboot-cause/" +DEVICE="/usr/share/sonic/device" +PLATFORM=$(/usr/local/bin/sonic-cfggen -H -v DEVICE_METADATA.localhost.platform) +FILES=$DEVICE/$PLATFORM/api_files + +install() { + # Install sonic-platform package + if [ -e $DEVICE/$PLATFORM/sonic_platform-1.0-py2-none-any.whl ]; then + pip install $DEVICE/$PLATFORM/sonic_platform-1.0-py2-none-any.whl + fi +} + +init() { + # mount needed files for sonic-platform package + mkdir -p $FILES + + mkdir -p $FILES/reboot-cause + mount -B $PREV_REBOOT_CAUSE $FILES/reboot-cause +} + +deinit() { + # deinit sonic-platform package + umount -f $PREV_REBOOT_CAUSE $FILES/reboot-cause >/dev/null 2>/dev/null +} + +uninstall() { + # Uninstall sonic-platform package + pip uninstall -y sonic-platform >/dev/null 2>/dev/null +} + +case "$1" in +install | uninstall | init | deinit) + $1 + ;; +*) + echo "Usage: $0 {install|uninstall|init|deinit}" + exit 1 + ;; +esac diff --git a/platform/nephos/sonic-platform-modules-accton/as7116-54x/setup.py b/platform/nephos/sonic-platform-modules-accton/as7116-54x/setup.py new file mode 100644 index 00000000000..088e1f30355 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/as7116-54x/setup.py @@ -0,0 +1,34 @@ +from setuptools import setup + +DEVICE_NAME = 'accton' +HW_SKU = 'x86_64-accton_as7116_54x-r0' + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Accton Platforms', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Simon Ji', + maintainer_email='Simon.Ji@mediatek.com', + packages=[ + 'sonic_platform', + ], + package_dir={ + 'sonic_platform': '../../../device/{}/{}/sonic_platform'.format(DEVICE_NAME, HW_SKU)}, + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 2.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/nephos/sonic-platform-modules-accton/as7116-54x/utils/README b/platform/nephos/sonic-platform-modules-accton/as7116-54x/utils/README new file mode 100755 index 00000000000..0b9fc163399 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/as7116-54x/utils/README @@ -0,0 +1,60 @@ +Copyright (C) 2016 Accton Networks, Inc. + +This program is free software: you can redistribute it and/or modify +It under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +To initialize the system, run "accton_as7712_util.py install". +To clean up the drivers & devices, run "accton_as7712_util.py clean". +To dump information of sensors, run "accton_as7712_util.py show". +To dump SFP EEPROM, run "accton_as7712_util.py sff". +To set fan speed, run "accton_as7712_util.py set fan". +To enable/disable SFP emission, run "accton_as7712_util.py set sfp". +To set system LEDs' color, run "accton_as7712_util.py set led" +For more information, run "accton_as7712_util.py --help". + +==================================================================== +Besides applying accton_as7712_util.py to access peripherals, you can +access peripherals by sysfs nodes directly after the installation is run. + +LED controls can be found under /sys/class/leds. The sysfs interface +color mappings are as follows: +Brightness: + 0 => off + 1 => green + 2 => amber + 3 => red + 4 => blue + +There are 5 system LEDs, loc, diag, fan, ps1, and ps2. +They are lit automatically by CPLD, but the loc and diag. +The loc led has only 1 color, blue. +The diag one has 3 colors: red, amber, and green. + +Fan controls can be found in /sys/bus/i2c/devices/2-0066. +There are 12 fans inside 6 fan modules. +All fans share 1 duty setting, ranged from 0~100. + +Three temperature sensors are controlled by the lm75 kernel modules. +They should already be visible under /sys/bus/i2c/drivers/lm75/. + +Two power supplies are controlled by the CPLD. +Here provide their status under +/sys/bus/i2c/devices/10-0050 and /sys/bus/i2c/devices/11-0053. + +There are 32 QSFP+ modules are equipped. +Apply "accton_as7712_util.py show" to get their status. +Apply "accton_as7712_util.py set sfp" to turn on/off light transmission. +Apply "accton_as7712_util.py sff" to dump EEPROM information. +Before operating on that QSFP+, please make sure it is well plugged. +Otherwise, operation is going to fail. + diff --git a/platform/nephos/sonic-platform-modules-accton/as7116-54x/utils/accton_as7116_util.py b/platform/nephos/sonic-platform-modules-accton/as7116-54x/utils/accton_as7116_util.py new file mode 100755 index 00000000000..2d9ea128f97 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/as7116-54x/utils/accton_as7116_util.py @@ -0,0 +1,533 @@ +#!/usr/bin/env python +# +# Copyright (C) 2016 Accton Networks, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + + + + +PROJECT_NAME = 'as7116_54x' +version = '0.1.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':5, 'fan':1, 'thermal':3, 'psu':2, 'sfp':54} +FORCE = 0 +#logging.basicConfig(filename= PROJECT_NAME+'.log', filemode='w',level=logging.DEBUG) +#logging.basicConfig(level=logging.INFO) + + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-54 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-54 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ROY]"+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_check(): + ret, lsmod = log_os_system("lsmod| grep accton", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + return True + + + +kos = [ + 'depmod', + 'modprobe i2c_dev', + 'modprobe i2c_mux_pca954x force_deselect_on_exit=1', + 'modprobe x86-64-accton-as7116-54x-cpld' , + 'modprobe x86-64-accton-as7116-54x-fan' , + 'modprobe x86-64-accton-as7116-54x-psu' , + 'modprobe x86-64-accton-as7116-54x-sfp' , + 'modprobe x86-64-accton-as7116-54x-led' ] + +def driver_install(): + global FORCE + for i in range(0,len(kos)): + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +led_prefix ='/sys/class/leds/'+PROJECT_NAME+'_led::' +hwmon_types = {'led': ['diag','fan','loc','psu1','psu2']} +hwmon_nodes = {'led': ['brightness'] } +hwmon_prefix ={'led': led_prefix} + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'fan': ['1-0063'] , + 'thermal': ['17-004b','19-0049', '20-004a'] , + 'psu': ['10-0050','11-0058'], + 'sfp': ['-0050']} +i2c_nodes = {'fan': ['present', 'front_speed_rpm', 'rear_speed_rpm'] , + 'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['sfp_is_present ', 'sfp_tx_disable_all']} + +sfp_map = [37,38,39,40, + 41,42,43,44,45,46,47,48,49,50, + 51,52,53,54,55,56,57,58,59,60, + 61,62,63,64,65,66,67,68,69,70, + 71,72,73,74,75,76,77,78,79,80, + 81,82,83,84, + 21,22,23,24,25,26] + +mknod =[ + 'echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-0/new_device', + 'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-1/new_device', + 'echo pca9545 0x71 > /sys/bus/i2c/devices/i2c-1/new_device', + 'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-1/new_device', + 'echo as7116_54x_fan 0x63 > /sys/bus/i2c/devices/i2c-1/new_device', + 'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-17/new_device', + 'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-19/new_device', + 'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-20/new_device', + 'echo as7116_54x_cpld1 0x60 > /sys/bus/i2c/devices/i2c-2/new_device', + 'echo as7116_54x_cpld2 0x61 > /sys/bus/i2c/devices/i2c-2/new_device', + 'echo as7116_54x_cpld3 0x62 > /sys/bus/i2c/devices/i2c-2/new_device', + 'echo as7116_54x_psu1 0x50 > /sys/bus/i2c/devices/i2c-10/new_device', + 'echo ym2401 0x58 > /sys/bus/i2c/devices/i2c-10/new_device', + 'echo as7116_54x_psu2 0x53 > /sys/bus/i2c/devices/i2c-11/new_device', + 'echo ym2401 0x5b > /sys/bus/i2c/devices/i2c-11/new_device', + 'echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-2/new_device', + 'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-29/new_device', + 'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-30/new_device', + 'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-31/new_device', + 'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-32/new_device', + 'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-33/new_device', + 'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-34/new_device', + 'echo 24c02 0x56 > /sys/bus/i2c/devices/i2c-0/new_device'] + +def device_install(): + global FORCE + + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(0,len(sfp_map)): + status, output =log_os_system("echo as7116_54x_sfp"+str(i+1)+" 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + + if i <= 47: + status, output =log_os_system("echo as7116_54x_sfp"+str(i+1)+" 0x51 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + + return + +def device_uninstall(): + global FORCE + + status, output =log_os_system("ls /sys/bus/i2c/devices/1-0077", 0) + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + nodelist = mknod + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_check() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_check() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + + status, output = log_os_system( + "/bin/sh /usr/local/bin/platform_api_mgnt.sh init", 1) + if status: + print output + if FORCE == 0: + return status + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_check()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'fan' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ buses[i]+"/fan"+str(k+1)+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + elif 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'sfp_eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan'] ['fan1'][0] + node = node.replace(node.split("/")[-1], 'fan_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +#get digits inside a string. +#Ex: 31 for "sfp31" +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0077", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0) + return not(ret1 or ret2) + +if __name__ == "__main__": + main() diff --git a/platform/nephos/sonic-platform-modules-accton/debian/changelog b/platform/nephos/sonic-platform-modules-accton/debian/changelog new file mode 100755 index 00000000000..595fe0985c0 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/debian/changelog @@ -0,0 +1,5 @@ +sonic-accton-platform-modules (1.0.1) unstable; urgency=low + + * Add support for AS7116-54X series + + -- developer Wed, 29 Mar 2017 11:00:00 +0800 \ No newline at end of file diff --git a/platform/nephos/sonic-platform-modules-accton/debian/compat b/platform/nephos/sonic-platform-modules-accton/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/nephos/sonic-platform-modules-accton/debian/control b/platform/nephos/sonic-platform-modules-accton/debian/control new file mode 100755 index 00000000000..8f7258ebdd6 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/debian/control @@ -0,0 +1,11 @@ +Source: sonic-accton-platform-modules +Section: main +Priority: extra +Maintainer: simon.ji@nephosinc.com +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: sonic-platform-accton-as7116-54x +Architecture: amd64 +Depends: linux-image-4.9.0-9-2-amd64 +Description: kernel modules for platform devices such as fan, led, sfp \ No newline at end of file diff --git a/platform/nephos/sonic-platform-modules-accton/debian/rules b/platform/nephos/sonic-platform-modules-accton/debian/rules new file mode 100755 index 00000000000..de84b23d55a --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/debian/rules @@ -0,0 +1,40 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +PYTHON ?= python2.7 + +PACKAGE_PRE_NAME := sonic-platform-accton +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= as7116-54x +MODULE_DIR := modules +UTILS_DIR := utils +SERVICE_DIR := service +CLASSES_DIR := classes +CONF_DIR := conf + +%: + dh $@ + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + $(PYTHON) $${mod}/setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} /$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko \ + debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + done) + +override_dh_usrlocal: + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) diff --git a/platform/nephos/sonic-platform-modules-accton/debian/sonic-platform-accton-as7116-54x.install b/platform/nephos/sonic-platform-modules-accton/debian/sonic-platform-accton-as7116-54x.install new file mode 100644 index 00000000000..61423affe7a --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/debian/sonic-platform-accton-as7116-54x.install @@ -0,0 +1,4 @@ +as7116-54x/utils/* usr/local/bin +as7116-54x/service/*.service lib/systemd/system +as7116-54x/modules/sonic_platform-1.0-py2-none-any.whl usr/share/sonic/device/x86_64-accton_as7116_54x-r0 +as7116-54x/service/platform_api/platform_api_mgnt.sh usr/local/bin diff --git a/platform/nephos/sonic-platform-modules-accton/debian/sonic-platform-accton-as7116-54x.postinst b/platform/nephos/sonic-platform-modules-accton/debian/sonic-platform-accton-as7116-54x.postinst new file mode 100644 index 00000000000..a9947af877b --- /dev/null +++ b/platform/nephos/sonic-platform-modules-accton/debian/sonic-platform-accton-as7116-54x.postinst @@ -0,0 +1,5 @@ +depmod -a +systemctl enable as7116-platform-init.service +systemctl start as7116-platform-init.service + +/usr/local/bin/platform_api_mgnt.sh install diff --git a/platform/nephos/sonic-platform-modules-cig/LICENSE b/platform/nephos/sonic-platform-modules-cig/LICENSE new file mode 100755 index 00000000000..baf27e16741 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/LICENSE @@ -0,0 +1,16 @@ +Copyright (C) 2016 Microsoft, Inc +Copyright (C) 2017 Cambridgeig Technology Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/nephos/sonic-platform-modules-cig/README.md b/platform/nephos/sonic-platform-modules-cig/README.md new file mode 100755 index 00000000000..9dc23910b59 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/README.md @@ -0,0 +1 @@ +platform drivers of Cambridgeig products for the SONiC project diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/classes/__init__.py b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/classes/__init__.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/classes/fanutil.py b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/classes/fanutil.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/classes/thermalutil.py b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/classes/thermalutil.py new file mode 100755 index 00000000000..e69de29bb2d diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/Makefile b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/Makefile new file mode 100755 index 00000000000..cdb114aad51 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/Makefile @@ -0,0 +1,5 @@ +obj-m := x86-64-cig-cs6436-56p-cpld.o \ + x86-64-cig-cs6436-56p-fan.o \ + x86-64-cig-cs6436-56p-led.o \ + x86-64-cig-cs6436-56p-psu.o \ + x86-64-cig-cs6436-56p-sfp.o diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/i2c-algo-lpc.h b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/i2c-algo-lpc.h new file mode 100755 index 00000000000..7ce6ae37859 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/i2c-algo-lpc.h @@ -0,0 +1,97 @@ +/* -------------------------------------------------------------------- + + * A hwmon driver for the CIG cs6436-56P + * + * Copyright (C) 2018 Cambridge, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* -------------------------------------------------------------------- */ + +#ifndef I2C_LPC_H +#define I2C_LPC_H 1 + +/* ----- Control register bits ---------------------------------------- */ +#define I2C_LPC_PIN 0x80 +#define I2C_LPC_ESO 0x40 +#define I2C_LPC_ES1 0x20 +#define I2C_LPC_ES2 0x10 +#define I2C_LPC_ENI 0x08 + +#define I2C_LPC_STO 0x40 +#define I2C_LPC_ACK 0x01 + +/*command register*/ +#define I2C_LPC_STA 0x80 +#define I2C_LPC_ABT 0x40 + +/*status register*/ +#define I2C_LPC_TBE 0x02 +#define I2C_LPC_IBB 0x80 +#define I2C_LPC_RBF 0x01 +#define I2C_LPC_TD 0x08 + +#define I2C_LPC_START I2C_LPC_STA +#define I2C_LPC_STOP I2C_LPC_STO +#define I2C_LPC_REPSTART I2C_LPC_STA +#define I2C_LPC_IDLE + +/* ----- Status register bits ----------------------------------------- */ +/*#define I2C_LPC_PIN 0x80 as above*/ + +#define I2C_LPC_INI 0x40 /* 1 if not initialized */ +#define I2C_LPC_STS 0x20 +#define I2C_LPC_BER 0x10 +#define I2C_LPC_AD0 0x08 +#define I2C_LPC_LRB 0x08 +#define I2C_LPC_AAS 0x04 +#define I2C_LPC_LAB 0x02 +#define I2C_LPC_BB 0x80 + +/* ----- Chip clock frequencies --------------------------------------- */ +#define I2C_LPC_CLK3 0x00 +#define I2C_LPC_CLK443 0x10 +#define I2C_LPC_CLK6 0x14 +#define I2C_LPC_CLK 0x18 +#define I2C_LPC_CLK12 0x1c + +/* ----- transmission frequencies ------------------------------------- */ +#define I2C_LPC_TRNS90 0x00 /* 90 kHz */ +#define I2C_LPC_TRNS45 0x01 /* 45 kHz */ +#define I2C_LPC_TRNS11 0x02 /* 11 kHz */ +#define I2C_LPC_TRNS15 0x03 /* 1.5 kHz */ + + +#define I2C_LPC_OWNADR 0 +#define I2C_LPC_INTREG I2C_LPC_ES2 +#define I2C_LPC_CLKREG I2C_LPC_ES1 + +#define I2C_LPC_REG_TEST 0x01 +#define I2C_LPC_REG_BUS_SEL 0x80 +#define I2C_LPC_REG_DEVICE_ADDR 0x81 +#define I2C_LPC_REG_BYTE_COUNT 0x83 +#define I2C_LPC_REG_COMMAND 0x84 +#define I2C_LPC_REG_STATUS 0x85 +#define I2C_LPC_REG_DATA_RX1 0x86 +#define I2C_LPC_REG_DATA_RX2 0x87 +#define I2C_LPC_REG_DATA_RX3 0x88 +#define I2C_LPC_REG_DATA_RX4 0x89 +#define I2C_LPC_REG_DATA_TX1 0x8a +#define I2C_LPC_REG_DATA_TX2 0x8b +#define I2C_LPC_REG_DATA_TX3 0x8c +#define I2C_LPC_REG_DATA_TX4 0x8d + +#endif /* I2C_LPC_H */ diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/i2c-algo-lpc2iic.h b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/i2c-algo-lpc2iic.h new file mode 100755 index 00000000000..6963bef734f --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/i2c-algo-lpc2iic.h @@ -0,0 +1,48 @@ +/* -------------------------------------------------------------------- + + * A hwmon driver for the CIG cs6436-56P + * + * Copyright (C) 2018 Cambridge, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* -------------------------------------------------------------------- */ + + +#ifndef _LINUX_I2C_ALGO_LPC_H +#define _LINUX_I2C_ALGO_LPC_H + +struct i2c_algo_lpc_data { + void *data; /* private data for lolevel routines */ + void (*setlpc) (void *data, int ctl, int val); + int (*getlpc) (void *data, int ctl); + int (*getown) (void *data); + int (*getclock) (void *data); + void (*waitforpin) (void *data); + + int (*xfer_begin) (void *data); + int (*xfer_end) (void *data); + + /* Multi-master lost arbitration back-off delay (msecs) + * This should be set by the bus adapter or knowledgable client + * if bus is multi-mastered, else zero + */ + unsigned long lab_mdelay; +}; + +int lpc_add_iic_bus(struct i2c_adapter * adap, unsigned int id); + +#endif /* _LINUX_I2C_ALGO_LPC_H */ diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-cpld.c b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-cpld.c new file mode 100755 index 00000000000..a3c6e2db54e --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-cpld.c @@ -0,0 +1,1632 @@ +/* + * A hwmon driver for the CIG cs6436-56P CPLD + * + * Copyright (C) 2018 Cambridge, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "i2c-algo-lpc.h" +#include "i2c-algo-lpc2iic.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef CPLD_USER +# include +#else +# include +#endif + +/* + * ISA bus. + */ + +static void platform_isa_bus_release(struct device * dev) +{ + return ; +} + + +static struct device isa_bus = { + .init_name = "lpc-isa", + .release = platform_isa_bus_release, +}; + +struct isa_dev { + struct device dev; + struct device *next; + unsigned int id; +}; + +#define to_isa_dev(x) container_of((x), struct isa_dev, dev) + +static int isa_bus_match(struct device *dev, struct device_driver *driver) +{ + struct isa_driver *isa_driver = to_isa_driver(driver); + + if (dev->platform_data == isa_driver) { + if (!isa_driver->match || + isa_driver->match(dev, to_isa_dev(dev)->id)) + return 1; + dev->platform_data = NULL; + } + return 0; +} + +static int isa_bus_probe(struct device *dev) +{ + struct isa_driver *isa_driver = dev->platform_data; + + if (isa_driver->probe) + return isa_driver->probe(dev, to_isa_dev(dev)->id); + + return 0; +} + +static int isa_bus_remove(struct device *dev) +{ + struct isa_driver *isa_driver = dev->platform_data; + + if (isa_driver->remove) + return isa_driver->remove(dev, to_isa_dev(dev)->id); + + return 0; +} + +static void isa_bus_shutdown(struct device *dev) +{ + struct isa_driver *isa_driver = dev->platform_data; + + if (isa_driver->shutdown) + isa_driver->shutdown(dev, to_isa_dev(dev)->id); +} + +static int isa_bus_suspend(struct device *dev, pm_message_t state) +{ + struct isa_driver *isa_driver = dev->platform_data; + + if (isa_driver->suspend) + return isa_driver->suspend(dev, to_isa_dev(dev)->id, state); + + return 0; +} + +static int isa_bus_resume(struct device *dev) +{ + struct isa_driver *isa_driver = dev->platform_data; + + if (isa_driver->resume) + return isa_driver->resume(dev, to_isa_dev(dev)->id); + + return 0; +} + +static struct bus_type isa_bus_type = { + .name = "lpc-isa", + .match = isa_bus_match, + .probe = isa_bus_probe, + .remove = isa_bus_remove, + .shutdown = isa_bus_shutdown, + .suspend = isa_bus_suspend, + .resume = isa_bus_resume +}; + +static void isa_dev_release(struct device *dev) +{ + kfree(to_isa_dev(dev)); +} + +void lpc_unregister_driver(struct isa_driver *isa_driver) +{ + struct device *dev = isa_driver->devices; + + while (dev) { + struct device *tmp = to_isa_dev(dev)->next; + device_unregister(dev); + dev = tmp; + } + driver_unregister(&isa_driver->driver); +} + + +int lpc_register_driver(struct isa_driver *isa_driver, unsigned int ndev) +{ + int error; + unsigned int id; + + isa_driver->driver.bus = &isa_bus_type; + isa_driver->devices = NULL; + + error = driver_register(&isa_driver->driver); + if (error) + return error; + + for (id = 0; id < ndev; id++) { + struct isa_dev *isa_dev; + + isa_dev = kzalloc(sizeof *isa_dev, GFP_KERNEL); + if (!isa_dev) { + error = -ENOMEM; + break; + } + + isa_dev->dev.parent = &isa_bus; + isa_dev->dev.bus = &isa_bus_type; + + dev_set_name(&isa_dev->dev, "%s.%u", + isa_driver->driver.name, id); + isa_dev->dev.platform_data = isa_driver; + isa_dev->dev.release = isa_dev_release; + isa_dev->id = id; + + isa_dev->dev.coherent_dma_mask = DMA_BIT_MASK(24); + isa_dev->dev.dma_mask = &isa_dev->dev.coherent_dma_mask; + + error = device_register(&isa_dev->dev); + if (error) { + put_device(&isa_dev->dev); + break; + } + + if (isa_dev->dev.platform_data) { + isa_dev->next = isa_driver->devices; + isa_driver->devices = &isa_dev->dev; + } else + device_unregister(&isa_dev->dev); + } + + if (!error && !isa_driver->devices) + error = -ENODEV; + + if (error) + isa_unregister_driver(isa_driver); + + return error; +} + + +int lpc_bus_init(void) +{ + int error; + + error = bus_register(&isa_bus_type); + if (!error) { + error = device_register(&isa_bus); + if (error) + bus_unregister(&isa_bus_type); + } + return error; +} + +void lpc_bus_exit(void) +{ + + device_unregister(&isa_bus); + + bus_unregister(&isa_bus_type); +} + + +/* + * module parameters: + */ +static int i2c_debug = 0; +static struct mutex lpc_lock; + + +#define DEB2(x) if (i2c_debug >= 2) x +#define DEB3(x) if (i2c_debug >= 3) x + /* print several statistical values */ +#define DEBPROTO(x) if (i2c_debug >= 9) x; + /* debug the protocol by showing transferred bits */ +#define DEF_TIMEOUT 160 + + + +/* setting states on the bus with the right timing: */ + +#define set_lpc(adap, ctl, val) adap->setlpc(adap->data, ctl, val) +#define get_lpc(adap, ctl) adap->getlpc(adap->data, ctl) +#define get_own(adap) adap->getown(adap->data) +#define get_clock(adap) adap->getclock(adap->data) +#define i2c_outaddr(adap, val) adap->setlpc(adap->data, I2C_LPC_REG_DEVICE_ADDR, val) + +#define i2c_outbyte1(adap, val) adap->setlpc(adap->data, I2C_LPC_REG_DATA_TX1, val) +#define i2c_outbyte2(adap, val) adap->setlpc(adap->data, I2C_LPC_REG_DATA_TX2, val) +#define i2c_outbyte3(adap, val) adap->setlpc(adap->data, I2C_LPC_REG_DATA_TX3, val) +#define i2c_outbyte4(adap, val) adap->setlpc(adap->data, I2C_LPC_REG_DATA_TX4, val) +#define i2c_inbyte1(adap) adap->getlpc(adap->data, I2C_LPC_REG_DATA_RX1) +#define i2c_inbyte2(adap) adap->getlpc(adap->data, I2C_LPC_REG_DATA_RX2) +#define i2c_inbyte3(adap) adap->getlpc(adap->data, I2C_LPC_REG_DATA_RX3) +#define i2c_inbyte4(adap) adap->getlpc(adap->data, I2C_LPC_REG_DATA_RX4) + + + +#define LPC_FPRINTF_LOG_PATH "/tmp/file.log" +struct file *lpc_fprintf_file = NULL; + + +static int lpc_fprintf_debug(const char *fmt, ...) +{ + char lpc_fprintf_buf[256]={0}; + + struct va_format vaf; + va_list args; + int r; + unsigned int file_size = 0; + mm_segment_t old_fs; + struct timeval tv; + do_gettimeofday(&tv); + + va_start(args, fmt); + vaf.fmt = fmt; + vaf.va = &args; + r=snprintf(lpc_fprintf_buf,"[%012d.%012d] %pV\n",sizeof(lpc_fprintf_buf),tv.tv_sec, tv.tv_usec, &vaf); + va_end(args); + + old_fs = get_fs(); + set_fs(KERNEL_DS); + lpc_fprintf_file->f_op->write(lpc_fprintf_file, (char *)lpc_fprintf_buf, strlen(lpc_fprintf_buf), &lpc_fprintf_file->f_pos); + set_fs(old_fs); + + memset(lpc_fprintf_buf,0x0,sizeof(lpc_fprintf_buf)); + return r; + +} + + +static int lpc_fprintf_init(void) +{ + mm_segment_t old_fs; + + DEB2(printk("lpc_fprintf_init.\n");) + + + if(lpc_fprintf_file == NULL) + lpc_fprintf_file = filp_open(LPC_FPRINTF_LOG_PATH, O_RDWR | O_APPEND | O_CREAT, 0644); + if (IS_ERR(lpc_fprintf_file)) { + DEB2(printk("error occured while opening file %s, exiting...\n", LPC_FPRINTF_LOG_PATH);) + return 0; + } + + return 0; +} + +static int lpc_fprintf_exit(void) +{ + DEB2(printk("lpc_fprintf_exit.\n");) + + if(lpc_fprintf_file != NULL) + filp_close(lpc_fprintf_file, NULL); + return 0; +} + + +/* other auxiliary functions */ + + +void print_reg(struct i2c_algo_lpc_data *adap) +{ + unsigned char status; + DEBPROTO(lpc_fprintf_debug("================================================\n");) + status = get_lpc(adap, I2C_LPC_REG_BUS_SEL); + DEBPROTO(lpc_fprintf_debug("%s select reg %x : %x\n",__func__,I2C_LPC_REG_BUS_SEL, status);) + status = get_lpc(adap, I2C_LPC_REG_BYTE_COUNT); + DEBPROTO(lpc_fprintf_debug("%s count reg %x : %x\n",__func__,I2C_LPC_REG_BYTE_COUNT, status);) + + status = get_lpc(adap, I2C_LPC_REG_COMMAND); + DEBPROTO(lpc_fprintf_debug("%s command reg %x : %x\n",__func__,I2C_LPC_REG_COMMAND, status);) + status = get_lpc(adap, I2C_LPC_REG_DEVICE_ADDR); + DEBPROTO(lpc_fprintf_debug("%s address reg %x : %x\n",__func__,I2C_LPC_REG_DEVICE_ADDR, status);) + + status = get_lpc(adap, I2C_LPC_REG_STATUS); + DEBPROTO(lpc_fprintf_debug("%s status reg %x : %x\n",__func__,I2C_LPC_REG_STATUS, status);) +} + + + +static void i2c_repstart(struct i2c_algo_lpc_data *adap) +{ + DEBPROTO(lpc_fprintf_debug(" Sr\n")); + set_lpc(adap, I2C_LPC_REG_COMMAND, I2C_LPC_REPSTART); +} + +static void i2c_stop(struct i2c_algo_lpc_data *adap) +{ + DEBPROTO(lpc_fprintf_debug("%s :\n",__func__);) + + set_lpc(adap, I2C_LPC_REG_COMMAND, I2C_LPC_STOP); + udelay(60); + set_lpc(adap, I2C_LPC_REG_COMMAND, 0x00); +} + + + + +static void i2c_start(struct i2c_algo_lpc_data *adap) +{ + unsigned char status; + int timeout = DEF_TIMEOUT; + + print_reg(adap); + + set_lpc(adap, I2C_LPC_REG_COMMAND, I2C_LPC_START); + + print_reg(adap); + +} + + + + +static int wait_for_bb(struct i2c_algo_lpc_data *adap) +{ + + int timeout = DEF_TIMEOUT; + int status; + + while (--timeout) { + status = get_lpc(adap, I2C_LPC_REG_STATUS); + + DEBPROTO(lpc_fprintf_debug("%s : Waiting for bus free status : %x\n",__func__,status);) + + if(status == I2C_LPC_TD) + { + DEBPROTO(lpc_fprintf_debug("%s : Bus is free status : %x\n",__func__,status);) + break; + } + } + + if (timeout == 0) { + DEBPROTO(lpc_fprintf_debug("%s : Timeout for free busy status : %x\n",__func__,status);) + return -ETIMEDOUT; + } + + + + return 0; +} + + +static int wait_for_be(int mode,struct i2c_algo_lpc_data *adap) +{ + + int timeout = DEF_TIMEOUT; + unsigned char status; + + + while (--timeout) { + + status = get_lpc(adap, I2C_LPC_REG_STATUS); + + DEBPROTO(lpc_fprintf_debug("%s : Waiting for bus empty status : %x\n",__func__,status);) + + if(mode == 1) + { + if((status & I2C_LPC_IBB) && (status & I2C_LPC_TBE)) + { + DEBPROTO(lpc_fprintf_debug("%s : Bus is empty status : %x\n",__func__,status);) + break; + } + } + else + { + if(status & I2C_LPC_TD) + { + DEBPROTO(lpc_fprintf_debug("%s : Bus is empty status : %x\n",__func__,status);) + break; + } + } + + status = get_lpc(adap, I2C_LPC_REG_TEST); + + DEBPROTO(lpc_fprintf_debug("%s : The test register data : %x\n",__func__,status);) + udelay(1); /* wait for 100 us */ + } + + if (timeout == 0) { + DEBPROTO(lpc_fprintf_debug("%s : Timeout waiting for Bus Empty\n",__func__);) + return -ETIMEDOUT; + } + + return 0; +} + + +static int wait_for_bf(struct i2c_algo_lpc_data *adap) +{ + + int timeout = DEF_TIMEOUT; + int status; + + + while (--timeout) { + status = get_lpc(adap, I2C_LPC_REG_STATUS); + + DEBPROTO(lpc_fprintf_debug("%s : Waiting for bus full status : %x\n",__func__,status);) + + if(status & I2C_LPC_RBF) + { + DEBPROTO(lpc_fprintf_debug("%s : Bus is full status : %x\n",__func__,status);) + break; + } + + status = get_lpc(adap, I2C_LPC_REG_TEST); + + DEBPROTO(lpc_fprintf_debug("%s : The test register data : %x\n",__func__,status);) + udelay(1); /* wait for 100 us */ + } + + if (timeout == 0) { + DEBPROTO(lpc_fprintf_debug("%s : Timeout waiting for Bus Full\n",__func__);) + return -ETIMEDOUT; + } + + return 0; +} + +static int wait_for_td(struct i2c_algo_lpc_data *adap) +{ + + int timeout = DEF_TIMEOUT; + int status=0; + + while (--timeout) { + udelay(4); + status = get_lpc(adap, I2C_LPC_REG_STATUS); + + DEBPROTO(lpc_fprintf_debug("%s : Waiting for bus done status : %x\n",__func__,status);) + + if(status == I2C_LPC_TD) + { + DEBPROTO(lpc_fprintf_debug("%s : Bus is done status : %x\n",__func__,status);) + break; + } + } + + if (timeout == 0) { + DEBPROTO(lpc_fprintf_debug("%s : Timeout waiting for Bus Done\n",__func__);) + return -ETIMEDOUT; + } + + return 0; +} + + + +static int wait_for_pin(struct i2c_algo_lpc_data *adap, int *status) +{ + int timeout = DEF_TIMEOUT; + *status = get_lpc(adap, I2C_LPC_REG_STATUS); + + while ((*status & I2C_LPC_TBE) && --timeout) { + *status = get_lpc(adap, I2C_LPC_REG_STATUS); + } + + if (timeout == 0) + return -ETIMEDOUT; + + + return 0; +} + + +static int lpc_doAddress(struct i2c_algo_lpc_data *adap,struct i2c_msg *msg) +{ + unsigned short flags = msg->flags; + unsigned char addr; + + addr = msg->addr << 1; + if (flags & I2C_M_RD) + { + addr |= 1; + DEBPROTO(lpc_fprintf_debug("step 7 : read mode then write device address 0x%x\n",addr);) + } + else + { + DEBPROTO(lpc_fprintf_debug("step 2 : write mode then write device address 0x%x\n",addr);) + } + + if (flags & I2C_M_REV_DIR_ADDR) + { + addr ^= 1; + + } + i2c_outaddr(adap, addr); + return 0; + +} + + +static int lpc_sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) +{ + struct i2c_algo_lpc_data *adap = i2c_adap->algo_data; + int i = 0,timeout=0; + + unsigned int count = msg->len; + unsigned char *buf = msg->buf; + + do{ + lpc_doAddress(adap,msg); + set_lpc(adap, I2C_LPC_REG_BYTE_COUNT, (count-i) >= 4 ? 4:(count - i)); + DEBPROTO(lpc_fprintf_debug("step 3 : write register count %x\n",count);) + + if((count -i) >= 4) + { + i2c_outbyte1(adap, buf[i+0] & 0xff); + i2c_outbyte2(adap, buf[i+1] & 0xff); + i2c_outbyte3(adap, buf[i+2] & 0xff); + i2c_outbyte4(adap, buf[i+3] & 0xff); + + DEBPROTO(lpc_fprintf_debug("step 4 : Send data[%d] = %x\n",i+0,buf[i+0]);) + DEBPROTO(lpc_fprintf_debug("step 4 : Send data[%d] = %x\n",i+1,buf[i+1]);) + DEBPROTO(lpc_fprintf_debug("step 4 : Send data[%d] = %x\n",i+2,buf[i+2]);) + DEBPROTO(lpc_fprintf_debug("step 4 : Send data[%d] = %x\n",i+3,buf[i+3]);) + i += 4; + } + else if((count -i) == 3) + { + i2c_outbyte1(adap, buf[i+0] & 0xff); + i2c_outbyte2(adap, buf[i+1] & 0xff); + i2c_outbyte3(adap, buf[i+2] & 0xff); + + DEBPROTO(lpc_fprintf_debug("step 4 : Send data[%d] = %x\n",i+0,buf[i+0]);) + DEBPROTO(lpc_fprintf_debug("step 4 : Send data[%d] = %x\n",i+1,buf[i+1]);) + DEBPROTO(lpc_fprintf_debug("step 4 : Send data[%d] = %x\n",i+2,buf[i+2]);) + + i += 3; + } + else if((count -i) == 2) + { + i2c_outbyte1(adap, buf[i+0] & 0xff); + i2c_outbyte2(adap, buf[i+1] & 0xff); + DEBPROTO(lpc_fprintf_debug("step 4 : Send data[%d] = %x\n",i+0,buf[i+0]);) + DEBPROTO(lpc_fprintf_debug("step 4 : Send data[%d] = %x\n",i+1,buf[i+1]);) + i += 2; + } + else if((count -i) == 1) + { + i2c_outbyte1(adap, buf[i+0] & 0xff); + DEBPROTO(lpc_fprintf_debug("step 4 : Send data[%d] = %x\n",i+0,buf[i+0]);) + i += 1; + } + + /* Send START */ + DEBPROTO(lpc_fprintf_debug("step 5-1 : Delay 6mS \n");) + udelay(6000); + DEBPROTO(lpc_fprintf_debug("step 5-2 : Start to transfrom \n");) + i2c_stop(adap); + i2c_start(adap); + DEBPROTO(lpc_fprintf_debug("step 5-3 : Start done\n");) + + udelay(400); + DEBPROTO(lpc_fprintf_debug("step 6 : Waiting for BE\n");) + timeout = wait_for_td(adap); + if (timeout) { + DEBPROTO(lpc_fprintf_debug("step 6 : Timeout waiting for BE \n");) + return -1; + } + }while (i < count); + + if(i == count) + { + DEBPROTO(lpc_fprintf_debug("Writen %d bytes successd !\n",count);) + return i; + } + else + { + DEBPROTO(lpc_fprintf_debug("Writen %d bytes failed \n",count);) + return -1; + } +} + +static int lpc_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) +{ + int i=0,timeout=0; + struct i2c_algo_lpc_data *adap = i2c_adap->algo_data; + int wfp; + + unsigned int count = msg->len; + unsigned char *buf = msg->buf; + + do{ + lpc_doAddress(adap,msg); + set_lpc(adap, I2C_LPC_REG_BYTE_COUNT, (count-i) >= 4 ? 4:(count - i)); + DEBPROTO(lpc_fprintf_debug("step 8 : write register count %d\n",count);) + + /* Send START */ + DEBPROTO(lpc_fprintf_debug("step 9-1 : Delay 6mS\n");) + udelay(6000); + DEBPROTO(lpc_fprintf_debug("step 9-2 : Start to receive data\n");) + i2c_stop(adap); + i2c_start(adap); + DEBPROTO(lpc_fprintf_debug("step 9-3 : Start done\n");) + + udelay(400); + DEBPROTO(lpc_fprintf_debug("step 10 : Waiting for TD\n");) + timeout = wait_for_td(adap); + if (timeout) { + DEBPROTO(lpc_fprintf_debug("step 10 : Timeout waiting for TD \n");) + return -1; + } + + if((count -i) >= 4) + { + buf[i+0] = 0xff & i2c_inbyte1(adap); + buf[i+1] = 0xff & i2c_inbyte2(adap); + buf[i+2] = 0xff & i2c_inbyte3(adap); + buf[i+3] = 0xff & i2c_inbyte4(adap); + + DEBPROTO(lpc_fprintf_debug("step 11 : Receive data[%d] = %x\n",i+0,buf[i+0]);) + DEBPROTO(lpc_fprintf_debug("step 11 : Receive data[%d] = %x\n",i+1,buf[i+1]);) + DEBPROTO(lpc_fprintf_debug("step 11 : Receive data[%d] = %x\n",i+2,buf[i+2]);) + DEBPROTO(lpc_fprintf_debug("step 11 : Receive data[%d] = %x\n",i+3,buf[i+3]);) + + i += 4; + } + else if((count -i) == 3) + { + buf[i+0] = 0xff & i2c_inbyte1(adap); + buf[i+1] = 0xff & i2c_inbyte2(adap); + buf[i+2] = 0xff & i2c_inbyte3(adap); + + DEBPROTO(lpc_fprintf_debug("step 11 : Receive data[%d] = %x\n",i+0,buf[i+0]);) + DEBPROTO(lpc_fprintf_debug("step 11 : Receive data[%d] = %x\n",i+1,buf[i+1]);) + DEBPROTO(lpc_fprintf_debug("step 11 : Receive data[%d] = %x\n",i+2,buf[i+2]);) + + i += 3; + } + else if((count -i) == 2) + { + buf[i+0] = 0xff & i2c_inbyte1(adap); + buf[i+1] = 0xff & i2c_inbyte2(adap); + DEBPROTO(lpc_fprintf_debug("step 11 : Receive data[%d] = %x\n",i+0,buf[i+0]);) + DEBPROTO(lpc_fprintf_debug("step 11 : Receive data[%d] = %x\n",i+1,buf[i+1]);) + i += 2; + } + else if((count -i) == 1) + { + buf[i+0] = 0xff & i2c_inbyte1(adap); + DEBPROTO(lpc_fprintf_debug("step 11 : Receive data[%d] = %x\n",i+0,buf[i+0]);) + i += 1; + } + + + }while(i < count); + + if(i == count) + { + DEBPROTO(lpc_fprintf_debug("Read %d bytes successd !\n",count);) + return i; + } + else + { + DEBPROTO(lpc_fprintf_debug("Read %d bytes failed \n",count);) + return -1; + } + + return i; +} + + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; +#define LPC_I2C_MAX_NCHANS 6 + + +struct lpc_iic { + struct i2c_adapter *virt_adaps[LPC_I2C_MAX_NCHANS]; + u8 last_chan; /* last register value */ +}; + + +static int lpc_master_xfer(struct i2c_adapter *i2c_adap, + struct i2c_msg *msgs, + int num) +{ + struct i2c_algo_lpc_data *adap = i2c_adap->algo_data; + struct i2c_msg *pmsg; + int i; + int ret=0, timeout, status; + + mutex_lock(&lpc_lock); + + if (adap->xfer_begin) + adap->xfer_begin(&i2c_adap->nr); + + + for (i = 0;ret >= 0 && i < num; i++) { + pmsg = &msgs[i]; + + DEBPROTO(lpc_fprintf_debug("lpc_xfer.o: Doing %s %d bytes to 0x%02x - %d of %d messages\n", + pmsg->flags & I2C_M_RD ? "read" : "write", + pmsg->len, pmsg->addr, i + 1, num);) + + DEBPROTO(lpc_fprintf_debug("lpc_xfer.o: Msg %d, addr=0x%x, flags=0x%x, len=%d\n", + i, msgs[i].addr, msgs[i].flags, msgs[i].len);) + + if (pmsg->flags & I2C_M_RD) { + ret = lpc_readbytes(i2c_adap, pmsg); + + if (ret != pmsg->len) { + DEBPROTO(lpc_fprintf_debug("lpc_xfer.o: fail: " + "only read %d bytes.\n",ret)); + } else { + DEBPROTO(lpc_fprintf_debug("lpc_xfer.o: read %d bytes.\n",ret)); + } + } else { + + ret = lpc_sendbytes(i2c_adap, pmsg); + + if (ret != pmsg->len) { + DEBPROTO(lpc_fprintf_debug("lpc_xfer.o: fail: " + "only wrote %d bytes.\n",ret)); + } else { + DEBPROTO(lpc_fprintf_debug("lpc_xfer.o: wrote %d bytes.\n",ret)); + } + } + } + + if (adap->xfer_end) + adap->xfer_end(&i2c_adap->nr); + + mutex_unlock(&lpc_lock); + + return i; + +} + + +static u32 lpc_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_SMBUS_QUICK; +} + +/* exported algorithm data: */ +static const struct i2c_algorithm lpc_algo = { + .master_xfer = lpc_master_xfer, + //.smbus_xfer = lpc_smbus_xfer, + .functionality = lpc_func, +}; + + +/* + * registering functions to load algorithms at runtime + */ +int lpc_add_iic_bus(struct i2c_adapter *adap,unsigned int id) +{ + //struct i2c_algo_lpc_data *lpc_adap = adap->3; + int rval,num; + + DEB2(dev_dbg(&adap->dev, "hw routines registered.\n")); + + /* register new adapter to i2c module... */ + adap->algo = &lpc_algo; + + for(num = 0; num < LPC_I2C_MAX_NCHANS;num++) + { + adap->nr = num; + snprintf(adap->name, sizeof(adap->name), + "i2c-%d-lpc (chan_id %d)", i2c_adapter_id(adap), num); + if(num) + { + rval = i2c_add_numbered_adapter(adap); + } + else + { + rval = i2c_add_adapter(adap); + } + } + return rval; +} +EXPORT_SYMBOL(lpc_add_iic_bus); + + +#define DEFAULT_BASE 0x0a00 + +static int lpc_base= 0x0a00; +static u8 __iomem *lpc_base_iomem; + +static int lpc_irq; +static int lpc_clock = 0x1c; +static int lpc_own = 0x55; +static int lpc_mmapped; + +static unsigned long lpc_base_addr = 0x0a00; +static unsigned int lpc_io_space_size = 2; + +static unsigned long LPC_INDEX_REG; +static unsigned long LPC_DATA_REG; + + +/* notice : removed static struct i2c_lpc_iic gpi; code - + this module in real supports only one device, due to missing arguments + in some functions, called from the algo-lpc module. Sometimes it's + need to be rewriten - but for now just remove this for simpler reading */ + +static wait_queue_head_t lpc_wait; +static int lpc_pending; +static spinlock_t lock; +static spinlock_t lpc_slock; + +static struct i2c_adapter lpc_iic_ops; + +struct cpld_dev_type { + struct resource *io_resource; + struct semaphore sem; + struct cdev cdev; +}; + +struct cpld_dev_type *cpld_device; + + +/* ----- local functions ---------------------------------------------- */ + +static void lpc_cpld_setbyte(void *data, int ctl, int val) +{ + //udelay(2); + outb(ctl, LPC_INDEX_REG); + mb(); + + outb(val, LPC_DATA_REG); + mb(); +} + +static int lpc_cpld_getbyte(void *data, int ctl) +{ + u8 val = 0; + //udelay(2); + outb(ctl, LPC_INDEX_REG); + mb(); + + val = inb(LPC_DATA_REG); + mb(); + + return val; +} + +static void lpc_iic_setbyte(void *data, int ctl, int val) +{ + if (!cpld_device) + return -ENOTTY; + + if (down_interruptible(&cpld_device->sem)) + return -ERESTARTSYS; + + lpc_cpld_setbyte(data,ctl,val); + + up(&cpld_device->sem); + DEB2(printk("%s REG[%x] = %x\n",__func__,ctl,val);) +} + +static int lpc_iic_getbyte(void *data, int ctl) +{ + u8 val = 0; + if (!cpld_device) + return -ENOTTY; + + if (down_interruptible(&cpld_device->sem)) + return -ERESTARTSYS; + + val = lpc_cpld_getbyte(data,ctl); + + up(&cpld_device->sem); + DEB2(printk("%s REG[%x] = %x\n",__func__,ctl,val);) + return val; +} + +int cig_cpld_read_register(u8 reg_off, u8 *val) +{ + if (!cpld_device) + return -ENOTTY; + + if (down_interruptible(&cpld_device->sem)) + return -ERESTARTSYS; + + *val = lpc_cpld_getbyte(cpld_device, reg_off); + + up(&cpld_device->sem); + + return 0; +} +EXPORT_SYMBOL(cig_cpld_read_register); + +int cig_cpld_write_register(u8 reg_off, u8 val) +{ + if (!cpld_device) + return -ENOTTY; + + if (down_interruptible(&cpld_device->sem)) + return -ERESTARTSYS; + + lpc_cpld_setbyte(cpld_device, reg_off, val); + up(&cpld_device->sem); + return 0; +} +EXPORT_SYMBOL(cig_cpld_write_register); + + + +static int lpc_iic_getown(void *data) +{ + return (lpc_own); +} + + +static int lpc_iic_getclock(void *data) +{ + return (lpc_clock); +} + +static void lpc_iic_waitforpin(void *data) +{ + DEFINE_WAIT(wait); + int timeout = 2; + unsigned long flags; + + if (lpc_irq > 0) { + spin_lock_irqsave(&lock, flags); + if (lpc_pending == 0) { + spin_unlock_irqrestore(&lock, flags); + prepare_to_wait(&lpc_wait, &wait, TASK_INTERRUPTIBLE); + if (schedule_timeout(timeout*HZ)) { + spin_lock_irqsave(&lock, flags); + if (lpc_pending == 1) { + lpc_pending = 0; + } + spin_unlock_irqrestore(&lock, flags); + } + finish_wait(&lpc_wait, &wait); + } else { + lpc_pending = 0; + spin_unlock_irqrestore(&lock, flags); + } + } else { + udelay(100); + } +} + + +static irqreturn_t lpc_iic_handler(int this_irq, void *dev_id) { + spin_lock(&lock); + lpc_pending = 1; + spin_unlock(&lock); + wake_up_interruptible(&lpc_wait); + return IRQ_HANDLED; +} + +static int board_id = 0; + + +static int lpc_select_chan(void *data) +{ + unsigned int chan_id=0; + chan_id = *(unsigned int *)data; + chan_id -= 1; + DEB2(printk("step 1 : selest channel id = %d\n",chan_id);) + lpc_iic_setbyte(data,I2C_LPC_REG_BUS_SEL,chan_id); + + return 0; +} + +static int lpc_deselect_chan(void *data) +{ + + unsigned int chan_id=0; + chan_id = *(unsigned int *)data; + chan_id -= 1; + DEB2(printk("step last :deselect channel id = %d\n",chan_id);) + + return 0; +} + + +/* ------------------------------------------------------------------------ + * Encapsulate the above functions in the correct operations structure. + * This is only done when more than one hardware adapter is supported. + */ +static struct i2c_algo_lpc_data lpc_iic_data = { + .setlpc = lpc_iic_setbyte, + .getlpc = lpc_iic_getbyte, + .getown = lpc_iic_getown, + .getclock = lpc_iic_getclock, + .waitforpin = lpc_iic_waitforpin, + .xfer_begin = lpc_select_chan, + .xfer_end = lpc_deselect_chan, +}; + +#include + +static struct i2c_adapter lpc_iic_arr_ops[LPC_I2C_MAX_NCHANS] = {0}; + +static void dummy_setscl(void *data, int state) +{ + return 1; +} + +static void dummy_setsda(void *data, int state) +{ + return 1; + +} + +static int dummy_getscl(void *data) +{ + return 1; + +} + +static int dummy_getsda(void *data) +{ + return 1; +} + + +static struct i2c_algo_bit_data dummy_algo_data = { + .setsda = dummy_setsda, + .setscl = dummy_setscl, + .getsda = dummy_getsda, + .getscl = dummy_getscl, + .udelay = 50, + .timeout = HZ, +}; + + +static int dummy_xfer(struct i2c_adapter *i2c_adap, + struct i2c_msg *msgs, + int num) +{ + return 1; +} + +static u32 dummy_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_SMBUS_QUICK; +} + + +static const struct i2c_algorithm dummy_algo = { + .master_xfer = dummy_xfer, + .functionality = dummy_func, +}; + + + +static struct i2c_adapter i2c_dummy = { + .owner = THIS_MODULE, + .class = I2C_CLASS_HWMON, + .algo_data = &dummy_algo_data, + .algo = &dummy_algo, + .name = "i2c_dummy", +}; + + +static int lpc_iic_match(struct device *dev, unsigned int id) +{ + /* sanity checks for lpc_mmapped I/O */ + + DEB2(printk("lpc_iic_match\n");) + + + if (lpc_base < DEFAULT_BASE) { + dev_err(dev, "incorrect lpc_base address (%#x) specified " + "for lpc_mmapped I/O\n", lpc_base); + return 0; + } + + if (lpc_base == 0) { + lpc_base = DEFAULT_BASE; + } + return 1; +} + +static int lpc_iic_probe(struct device *dev, unsigned int id) +{ + int rval,num; + + lpc_fprintf_init(); + + DEB2(printk("lpc_iic_probe\n");) + + mutex_init(&lpc_lock); + if(board_id == 1) + i2c_add_adapter(&i2c_dummy); + + for(num = 0; num < LPC_I2C_MAX_NCHANS;num++) + { + lpc_iic_arr_ops[num].dev.parent = dev; + lpc_iic_arr_ops[num].owner = THIS_MODULE; + lpc_iic_arr_ops[num].class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + lpc_iic_arr_ops[num].algo = &lpc_algo; + lpc_iic_arr_ops[num].algo_data = &lpc_iic_data, + lpc_iic_arr_ops[num].nr=num; + snprintf(lpc_iic_arr_ops[num].name, sizeof(lpc_iic_arr_ops[num].name), "i2c-%d-lpc", i2c_adapter_id(&lpc_iic_arr_ops[num]), num); + rval |= i2c_add_adapter(&lpc_iic_arr_ops[num]); + DEB2(printk("%s\n",lpc_iic_arr_ops[num].name);) + } + + return 0; +} + +static int lpc_iic_remove(struct device *dev, unsigned int id) +{ + int num; + DEB2(printk("lpc_iic_remove\n")); + + lpc_fprintf_exit(); + for(num = LPC_I2C_MAX_NCHANS - 1; num >= 0 ;num--) + i2c_del_adapter(&lpc_iic_arr_ops[num]); + + if(board_id == 1) + i2c_del_adapter(&i2c_dummy); + + return 0; +} + +static struct isa_driver i2c_lpc_driver = { + .match = lpc_iic_match, + .probe = lpc_iic_probe, + .remove = lpc_iic_remove, + .driver = { + .owner = THIS_MODULE, + .name = "lpc-iic", + }, +}; + + +struct kset cpld_kset; +static int cpld_major = 0; +static int cpld_minor = 0; + +struct cpld_rw_msg { + unsigned char addr; + unsigned char data; +}; + + +static struct cpld_rw_msg param_read = {-1}; +static struct cpld_rw_msg param_write = {-1}; + +void cpld_sysfs_kobj_release(struct kobject *kobj) +{ + return; +} + +int cpld_sysfs_add_attr(struct kobject* kobj, char* attr_name) +{ + + struct attribute *attr; + + attr = kmalloc(sizeof(struct attribute), GFP_KERNEL); + attr->name = attr_name; + attr->mode = 0644; + + return sysfs_create_file(kobj, attr); +} + + +static ssize_t cpld_sysfs_show(struct kobject *kobj, struct attribute *attr, char *buffer) +{ + u8 val,ret; + + if (0 == strcmp(attr->name, "read")) + { + val = lpc_iic_getbyte(NULL,param_read.addr); + ret = sprintf(buffer,"read : addr = %x val = %x\n",param_read.addr, val); + + } + else if (0 == strcmp(attr->name, "write")) + { + lpc_iic_setbyte(NULL, param_write.addr,param_write.data); + ret = sprintf(buffer,"write : addr = %x val = %x\n",param_write.addr, param_write.data); + } + else if (0 == strcmp(attr->name, "version")) + { + val = lpc_iic_getbyte(NULL, 0x02); + ret = sprintf(buffer,"CPLD version : V%02x\n",val); + } + + return ret; + +} + +static ssize_t cpld_sysfs_store(struct kobject *kobj, struct attribute *attr, const char *buffer, size_t count) +{ + int param[3]; + + if (0 == strcmp(attr->name, "read")) + { + sscanf(buffer, "0x%02x", ¶m[0]); + param_read.addr = param[0]; + } + else if (0 == strcmp(attr->name, "write")) + { + sscanf(buffer, "0x%2x 0x%02x", ¶m[0], ¶m[1]); + param_write.addr = param[0]; + param_write.data = param[1]; + } + return count; +} + + + +static struct sysfs_ops cpld_sysfs_ops = +{ + .show = cpld_sysfs_show, + .store = cpld_sysfs_store, +}; + +static struct kobj_type cpld_kobj_type = +{ + .release = cpld_sysfs_kobj_release, + .sysfs_ops = &cpld_sysfs_ops, + .default_attrs = NULL, +}; + + +static const char driver_name[] = "cpld_drv"; +static atomic_t cpld_available = ATOMIC_INIT(1); +static struct class *cpld_class; +#define CPLD_IOC_MAGIC '[' + +#define CPLD_IOC_RDREG _IOR(CPLD_IOC_MAGIC, 0, struct cpld_rw_msg) +#define CPLD_IOC_WRREG _IOW(CPLD_IOC_MAGIC, 1, struct cpld_rw_msg) + +#define CPLD_IOC_MAXNR 2 + + +int cpld_open(struct inode *inode, struct file *filp) +{ + struct cpld_dev_type *dev; + + if (! atomic_dec_and_test(&cpld_available)) { + atomic_inc(&cpld_available); + return -EBUSY; + } + + dev = container_of(inode->i_cdev, struct cpld_dev_type, cdev); + filp->private_data = dev; + + return 0; +} + +int cpld_release(struct inode *inode, struct file *flip) +{ + atomic_inc(&cpld_available); + return 0; +} + + +long cpld_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) +{ + int rc = 0; + int err = 0; + struct cpld_dev_type *dev = (struct cpld_dev_type *)filp->private_data; + struct cpld_rw_msg msg; + + if (_IOC_TYPE(cmd) != CPLD_IOC_MAGIC) + return -ENOTTY; + if (_IOC_NR(cmd) > CPLD_IOC_MAXNR) + return -ENOTTY; + + if (_IOC_DIR(cmd) & _IOC_READ) + err = !access_ok(VERIFY_WRITE, (void __user *)arg, _IOC_SIZE(cmd)); + if (_IOC_DIR(cmd) & _IOC_WRITE) + err = !access_ok(VERIFY_READ, (void __user *)arg, _IOC_SIZE(cmd)); + if (err) + return -EFAULT; + + if (down_interruptible(&dev->sem)) + return -ERESTARTSYS; + + switch(cmd){ + case CPLD_IOC_RDREG: + rc = copy_from_user(&msg, (void __user *)arg, sizeof(msg)); + if (!rc) { + msg.data = lpc_cpld_getbyte(dev, msg.addr); + rc = copy_to_user((void __user *)arg, &msg, sizeof(msg)); + } + break; + + case CPLD_IOC_WRREG: + rc = copy_from_user(&msg, (void __user *)arg, sizeof(msg)); + if (!rc) { + lpc_cpld_setbyte(dev, msg.addr, msg.data); + } + break; + default: + rc = -ENOTTY; + break; + } + up(&dev->sem); + + return rc; +} + +struct file_operations cpld_fops = { + .owner = THIS_MODULE, + .open = cpld_open, + .unlocked_ioctl = cpld_ioctl, + .release = cpld_release, +}; + + +static void cpld_setup_cdev(struct cpld_dev_type *dev) +{ + int err, devno = MKDEV(cpld_major, cpld_minor); + + cdev_init(&dev->cdev, &cpld_fops); + dev->cdev.owner = THIS_MODULE; + dev->cdev.ops = &cpld_fops; + err = cdev_add(&dev->cdev, devno, 1); + + if (err) + DEB2(printk(KERN_NOTICE "Error %d adding cpld", err);) +} +//#define CPLD_KTHREAD_TEST +#ifdef CPLD_KTHREAD_TEST +#include +#include +#include +#include +#include +#include +static struct task_struct *test_TaskStruct; +void get_random_bytes(void *buf, int nbytes); + +#define LM75_REAR_LEFT_PATH "/sys/class/hwmon/hwmon5/temp1_input" +#define LM75_REAR_RIGHT_PATH "/sys/class/hwmon/hwmon6/temp1_input" + + +static int threadTask(void* arg) +{ + static int count =0; + unsigned char lpc_read_data=0; + unsigned char lpc_write_data=0; + unsigned char lpc_random_data=0; + + struct file *temp1_file = NULL,*temp2_file = NULL; + unsigned char temp1_buffer[8]={0},temp2_buffer[8]={0}; + + mm_segment_t old_fs; + while(1) + { + if(kthread_should_stop()) + { + DEB2(printk("threadTask: kthread_should_stop\n")); + break; + } + +#if 1 + get_random_bytes(&lpc_random_data,1); + + lpc_write_data = lpc_random_data; + + lpc_iic_setbyte(NULL,I2C_LPC_REG_TEST,lpc_write_data); + //DEB2(printk("threadTask: lpc write reg[01] data : %02x\n",lpc_write_data)); + + lpc_read_data = lpc_iic_getbyte(NULL,I2C_LPC_REG_TEST); + //DEB2(printk("threadTask: lpc read reg[01] data : %02x\n",lpc_read_data)); + udelay(10000); + if(lpc_write_data != lpc_read_data) + { + printk("Error : WRITE %02x != READ %02x\n",lpc_write_data,lpc_read_data); + } + msleep(10); +#else + + if(temp1_file != NULL) + temp1_file = filp_open(LM75_REAR_LEFT_PATH, O_RDONLY , 0); + if (IS_ERR(temp1_file)) { + printk("error occured while opening file %s, exiting...\n", LM75_REAR_LEFT_PATH); + } + + if(temp2_file != NULL) + temp2_file = filp_open(LM75_REAR_RIGHT_PATH, O_RDONLY ,0); + if (IS_ERR(temp2_file)) { + printk("error occured while opening file %s, exiting...\n", LM75_REAR_RIGHT_PATH); + } + + + old_fs = get_fs(); + set_fs(KERNEL_DS); + + temp1_file->f_op->read(temp1_file, (char *)temp1_buffer, strlen(temp1_buffer), &temp1_file->f_pos); + + temp2_file->f_op->read(temp2_file, (char *)temp2_buffer, strlen(temp2_buffer), &temp2_file->f_pos); + + set_fs(old_fs); + + if((simple_strtoul(temp1_buffer,NULL,10) >=30000) || (simple_strtoul(temp2_buffer,NULL,10) >=30000)) + { + lpc_iic_setbyte(NULL,0x40,0xff); + printk("Full speed\n"); + } + + msleep(1000); +#endif + } +} + +static int init_kernel_Thread(void) +{ + test_TaskStruct=kthread_create(threadTask,NULL,"KernelThead",0); + if(IS_ERR(test_TaskStruct)) + { + printk("kthread_create error\n"); + } + else + { + wake_up_process(test_TaskStruct); + } + return 0; +} + +static void exit_kernel_Thread(void) +{ + kthread_stop(test_TaskStruct); + test_TaskStruct = NULL; +} + +#endif + + +static int __init cpld_init(void) +{ + int rval,rc; + dev_t dev; + + DEB2(printk("cpld_init\n");) + + cpld_device = kzalloc(sizeof(struct cpld_dev_type), GFP_KERNEL); + if (!cpld_device) + goto error3; + cpld_device->io_resource = request_region(lpc_base_addr, + lpc_io_space_size, "lpc-i2c"); + if (!cpld_device->io_resource) { + DEB2(printk("lpc: claim I/O resource fail\n");) + goto error2; + } + sema_init(&cpld_device->sem, 1); + + LPC_INDEX_REG = lpc_base_addr; + LPC_DATA_REG = lpc_base_addr + 1; + + rval = lpc_bus_init(); + rval = lpc_register_driver(&i2c_lpc_driver, 1); + + kobject_set_name(&cpld_kset.kobj, "cpld"); + cpld_kset.kobj.ktype= &cpld_kobj_type; + kset_register(&cpld_kset); + cpld_sysfs_add_attr(&cpld_kset.kobj, "read"); + cpld_sysfs_add_attr(&cpld_kset.kobj, "write"); + cpld_sysfs_add_attr(&cpld_kset.kobj, "version"); + + if (cpld_major) { + dev = MKDEV(cpld_major, cpld_minor); + rc = register_chrdev_region(dev, 1, "cpld"); + } else { + rc = alloc_chrdev_region(&dev, cpld_major, 1, "cpld"); + cpld_major = MAJOR(dev); + } + + cpld_setup_cdev(cpld_device); + + cpld_class = class_create(THIS_MODULE, KBUILD_MODNAME); + if (!cpld_class) { + DEB2(printk("failed to create class\n");) + goto error1; + } + + device_create(cpld_class, NULL, dev, NULL, "cpld"); +#ifdef CPLD_KTHREAD_TEST + init_kernel_Thread(); +#endif + + return 0; +error1: + cdev_del(&cpld_device->cdev); + unregister_chrdev_region(dev, 1); +error2: + release_resource(cpld_device->io_resource); +error3: + kfree(cpld_device); + + return rc; +} + +static void __exit cpld_exit(void) +{ + DEB2(printk("cpld_exit\n")); + + lpc_unregister_driver(&i2c_lpc_driver); + lpc_bus_exit(); +#ifdef CPLD_KTHREAD_TEST + exit_kernel_Thread(); +#endif + dev_t devno = MKDEV(cpld_major, cpld_minor); + + cdev_del(&cpld_device->cdev); + if (cpld_class) { + device_destroy(cpld_class, devno); + class_destroy(cpld_class); + } + + kobject_put(&cpld_kset.kobj); + + if(cpld_kset.kobj.ktype) + kset_unregister(&cpld_kset); + + if (cpld_device) { + if (cpld_device->io_resource) + release_resource(cpld_device->io_resource); + + kfree(cpld_device); + } + unregister_chrdev_region(devno, 1); + + +} + +module_param(cpld_major, int, S_IRUGO); +module_param(cpld_minor, int, S_IRUGO); +module_param(i2c_debug, int, S_IRUGO); +module_param(board_id, int, S_IRUGO); + +module_init(cpld_init); +module_exit(cpld_exit); + +MODULE_AUTHOR("Zhang Peng "); +MODULE_DESCRIPTION("cs6436-56p-cpld driver"); +MODULE_LICENSE("GPL"); + + + + + + + + + + diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-fan.c b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-fan.c new file mode 100755 index 00000000000..09beb6912c3 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-fan.c @@ -0,0 +1,451 @@ +/* + * A hwmon driver for the CIG cs6436-56P fan + * + * Copyright (C) 2018 Cambridge, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + + +#define FAN_SPEED_DUTY_TO_CPLD_STEP 10 + +static struct cs6436_56p_fan_data *cs6436_56p_fan_update_device(struct device *dev); +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count); + +extern int cig_cpld_write_register(u8 reg_off, u8 val); +extern int cig_cpld_read_register(u8 reg_off, u8 *val); + +/* fan related data, the index should match sysfs_fan_attributes + */ +static const u8 fan_reg[] = { + 0x41, /* fan enable/disable */ + 0x40, /* fan PWM(for all fan) */ + 0x42, /* front fan 1 speed(rpm) */ + 0x44, /* front fan 2 speed(rpm) */ + 0x46, /* front fan 3 speed(rpm) */ + 0x48, /* front fan 4 speed(rpm) */ + 0x4a, /* front fan 5 speed(rpm) */ + 0x43, /* rear fan 1 speed(rpm) */ + 0x45, /* rear fan 2 speed(rpm) */ + 0x47, /* rear fan 3 speed(rpm) */ + 0x49, /* rear fan 4 speed(rpm) */ + 0x4b, /* rear fan 5 speed(rpm) */ +}; + + +/* Each client has this additional data */ +struct cs6436_56p_fan_data { + struct platform_device *pdev; + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ +}; + +static struct cs6436_56p_fan_data *fan_data = NULL; + +enum fan_id { + FAN1_ID, + FAN2_ID, + FAN3_ID, + FAN4_ID, + FAN5_ID, +}; + +enum sysfs_fan_attributes { + FAN_STATE_REG, + FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ + FAN1_FRONT_SPEED_RPM, + FAN2_FRONT_SPEED_RPM, + FAN3_FRONT_SPEED_RPM, + FAN4_FRONT_SPEED_RPM, + FAN5_FRONT_SPEED_RPM, + FAN1_REAR_SPEED_RPM, + FAN2_REAR_SPEED_RPM, + FAN3_REAR_SPEED_RPM, + FAN4_REAR_SPEED_RPM, + FAN5_REAR_SPEED_RPM, + FAN1_STATE, + FAN2_STATE, + FAN3_STATE, + FAN4_STATE, + FAN5_STATE, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + FAN5_FAULT, +}; + +/* Define attributes + */ +#define DECLARE_FAN_STATE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_state, S_IRUGO, fan_show_value, NULL, FAN##index##_STATE) +#define DECLARE_FAN_STATE_ATTR(index) &sensor_dev_attr_fan##index##_state.dev_attr.attr + +#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT) +#define DECLARE_FAN_FAULT_ATTR(index) &sensor_dev_attr_fan##index##_fault.dev_attr.attr + +#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN##index##_DUTY_CYCLE_PERCENTAGE) +#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan##index##_duty_cycle_percentage.dev_attr.attr + +#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ + static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM) +#define DECLARE_FAN_SPEED_RPM_ATTR(index) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ + &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr + +/* 5 fan state attributes in this platform */ +DECLARE_FAN_STATE_SENSOR_DEV_ATTR(1); +DECLARE_FAN_STATE_SENSOR_DEV_ATTR(2); +DECLARE_FAN_STATE_SENSOR_DEV_ATTR(3); +DECLARE_FAN_STATE_SENSOR_DEV_ATTR(4); +DECLARE_FAN_STATE_SENSOR_DEV_ATTR(5); + + +/* 5 fan fault attributes in this platform */ +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(5); + +/* 5 fan speed(rpm) attributes in this platform */ +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4); +DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(5); + +/* 1 fan duty cycle attribute in this platform */ +DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(); + +static struct attribute *cs6436_56p_fan_attributes[] = { + /* fan related attributes */ + DECLARE_FAN_STATE_ATTR(1), + DECLARE_FAN_STATE_ATTR(2), + DECLARE_FAN_STATE_ATTR(3), + DECLARE_FAN_STATE_ATTR(4), + DECLARE_FAN_STATE_ATTR(5), + DECLARE_FAN_FAULT_ATTR(1), + DECLARE_FAN_FAULT_ATTR(2), + DECLARE_FAN_FAULT_ATTR(3), + DECLARE_FAN_FAULT_ATTR(4), + DECLARE_FAN_FAULT_ATTR(5), + DECLARE_FAN_SPEED_RPM_ATTR(1), + DECLARE_FAN_SPEED_RPM_ATTR(2), + DECLARE_FAN_SPEED_RPM_ATTR(3), + DECLARE_FAN_SPEED_RPM_ATTR(4), + DECLARE_FAN_SPEED_RPM_ATTR(5), + DECLARE_FAN_DUTY_CYCLE_ATTR(), + NULL +}; + +#define FAN_MAX_DUTY_CYCLE 100 +#define FAN_REG_VAL_TO_SPEED_RPM_STEP 100 + +/* fan utility functions + */ +static u32 reg_val_to_duty_cycle(u8 reg_val) +{ + if (reg_val +== 0xFF) { + return 100; + } + return ((u32)(reg_val) * 100)/ 255; +} + +static u8 duty_cycle_to_reg_val(u8 duty_cycle) +{ + if (duty_cycle >= FAN_MAX_DUTY_CYCLE) { + return 0xFF; + } + + return 255 / 10 * (duty_cycle / 10); +} + +static u32 reg_val_to_speed_rpm(u8 reg_val) +{ + return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; +} + +static u8 reg_val_to_is_state(u8 reg_val, enum fan_id id) +{ + u8 mask = (1 << id); + + reg_val &= mask; + + return reg_val ? 0 : 1; +} + +static u8 is_fan_fault(struct cs6436_56p_fan_data *data, enum fan_id id) +{ + u8 ret = 1; + int front_fan_index = FAN1_FRONT_SPEED_RPM + id; + int rear_fan_index = FAN1_REAR_SPEED_RPM + id; + + /* Check if the speed of front or rear fan is ZERO, + */ + if (reg_val_to_speed_rpm(data->reg_val[front_fan_index]) && + reg_val_to_speed_rpm(data->reg_val[rear_fan_index])) { + ret = 0; + } + + return ret; +} + +static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + int error, value; + + error = kstrtoint(buf, 10, &value); + if (error) + return error; + + if (value <= 0 || value > FAN_MAX_DUTY_CYCLE) + return -EINVAL; + + cig_cpld_write_register(fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); + + return count; +} + +static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + cs6436_56p_fan_update_device(dev); + + struct cs6436_56p_fan_data *data = fan_data; + + ssize_t ret = 0; + + if (data->valid) { + switch (attr->index) { + + case FAN1_STATE: + case FAN2_STATE: + case FAN3_STATE: + case FAN4_STATE: + case FAN5_STATE: + //printk("FAN_STATE_REG: 0x%x\n", data->reg_val[FAN_STATE_REG]); + //printk("index: %d\n", attr->index); + ret = sprintf(buf, "%d\n", + reg_val_to_is_state(data->reg_val[FAN_STATE_REG], + attr->index - FAN1_STATE)); + break; + case FAN_DUTY_CYCLE_PERCENTAGE: + { + u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); + ret = sprintf(buf, "%u\n", duty_cycle); + break; + } + case FAN1_FRONT_SPEED_RPM: + case FAN2_FRONT_SPEED_RPM: + case FAN3_FRONT_SPEED_RPM: + case FAN4_FRONT_SPEED_RPM: + case FAN5_FRONT_SPEED_RPM: + case FAN1_REAR_SPEED_RPM: + case FAN2_REAR_SPEED_RPM: + case FAN3_REAR_SPEED_RPM: + case FAN4_REAR_SPEED_RPM: + case FAN5_REAR_SPEED_RPM: +// printk("FAN_seed_REG: 0x%x\n", data->reg_val[attr->index]); +// printk("index: %d\n", attr->index); + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index])); + break; + + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + ret = sprintf(buf, "%d\n", is_fan_fault(data, attr->index - FAN1_FAULT)); + break; + default: + break; + } + } + + return ret; +} + +static const struct attribute_group cs6436_56p_fan_group = { + .attrs = cs6436_56p_fan_attributes, +}; + +static struct cs6436_56p_fan_data *cs6436_56p_fan_update_device(struct device *dev) +{ + struct cs6436_56p_fan_data *data = fan_data; + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || + !data->valid) { + int i; + + data->valid = 0; + + /* Update fan data + */ + for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { + u8 status; + (void)cig_cpld_read_register(fan_reg[i], &status); + + if (status < 0) { + data->valid = 0; + mutex_unlock(&data->update_lock); + return data; + } + else { + data->reg_val[i] = status; + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return data; +} + +static int cs6436_56p_fan_probe(struct platform_device *pdev) +{ + int status = -1; + /* Register sysfs hooks */ + status = sysfs_create_group(&pdev->dev.kobj, &cs6436_56p_fan_group); + if (status) { + goto exit; + + } + + fan_data->hwmon_dev = hwmon_device_register(&pdev->dev); + if (IS_ERR(fan_data->hwmon_dev)) { + status = PTR_ERR(fan_data->hwmon_dev); + goto exit_remove; + } + + dev_info(&pdev->dev, "cs6436_56p_fan\n"); + + return 0; + +exit_remove: + sysfs_remove_group(&pdev->dev.kobj, &cs6436_56p_fan_group); +exit: + return status; +} + +static int cs6436_56p_fan_remove(struct platform_device *pdev) +{ + hwmon_device_unregister(fan_data->hwmon_dev); + sysfs_remove_group(&fan_data->pdev->dev.kobj, &cs6436_56p_fan_group); + + return 0; +} + +#define DRVNAME "cs6436_56p_fan" + +static struct platform_driver cs6436_56p_fan_driver = { + .probe = cs6436_56p_fan_probe, + .remove = cs6436_56p_fan_remove, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + + + + + +static int __init cs6436_56p_fan_init(void) +{ + int ret; + + cig_cpld_write_register(0x40, duty_cycle_to_reg_val(50)); + + ret = platform_driver_register(&cs6436_56p_fan_driver); + if (ret < 0) { + goto exit; + } + + fan_data = kzalloc(sizeof(struct cs6436_56p_fan_data), GFP_KERNEL); + if (!fan_data) { + ret = -ENOMEM; + platform_driver_unregister(&cs6436_56p_fan_driver); + goto exit; + } + + mutex_init(&fan_data->update_lock); + fan_data->valid = 0; + + fan_data->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(fan_data->pdev)) { + ret = PTR_ERR(fan_data->pdev); + platform_driver_unregister(&cs6436_56p_fan_driver); + kfree(fan_data); + goto exit; + } + +exit: + return ret; +} + +static void __exit cs6436_56p_fan_exit(void) +{ + platform_device_unregister(fan_data->pdev); + platform_driver_unregister(&cs6436_56p_fan_driver); + kfree(fan_data); +} + +MODULE_AUTHOR("CIG"); +MODULE_DESCRIPTION("cs6436_56p_fan driver"); +MODULE_LICENSE("GPL"); + +module_init(cs6436_56p_fan_init); +module_exit(cs6436_56p_fan_exit); + +MODULE_AUTHOR("Zhang Peng "); +MODULE_DESCRIPTION("cs6436_56p_fan driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-led.c b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-led.c new file mode 100755 index 00000000000..4c7c629f3e7 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-led.c @@ -0,0 +1,594 @@ +/* + * A hwmon driver for the CIG cs6436-56P LED + * + * Copyright (C) 2018 Cambridge, Inc. + + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +extern int cig_cpld_write_register(u8 reg_off, u8 val); + +extern int cig_cpld_read_register(u8 reg_off, u8 *val); + +extern void led_classdev_unregister(struct led_classdev *led_cdev); +extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); +extern void led_classdev_resume(struct led_classdev *led_cdev); +extern void led_classdev_suspend(struct led_classdev *led_cdev); + +#define DRVNAME "cs6436_56p_led" + +struct cs6436_56p_led_data { + struct platform_device *pdev; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 reg_val[6]; /* 0: system & location + 1: PSU1 &PSU12 + 2: fan & management + 3: console & ToD + 4-5 : fan1-fan5*/ +}; + +static struct cs6436_56p_led_data *ledctl = NULL; + +/* LED related data + */ +#define LED_TYPE_PSU1_REG_MASK 0x0C +#define LED_MODE_PSU1_GREEN_MASK 0x08 +#define LED_MODE_PSU1_RED_MASK 0x04 +#define LED_MODE_PSU1_AMBER_MASK 0x0C +#define LED_MODE_PSU1_OFF_MASK 0x00 + +#define LED_TYPE_PSU2_REG_MASK 0x30 +#define LED_MODE_PSU2_GREEN_MASK 0x20 +#define LED_MODE_PSU2_RED_MASK 0x10 +#define LED_MODE_PSU2_AMBER_MASK 0x30 +#define LED_MODE_PSU2_OFF_MASK 0x00 + +#define LED_TYPE_SYS_REG_MASK 0xF0 +#define LED_MODE_SYS_GREEN_MASK 0x40 +#define LED_MODE_SYS_RED_MASK 0x20 +#define LED_MODE_SYS_AMBER_MASK 0x60 +#define LED_MODE_SYS_AMBER_FLASHING_MASK 0x70 +#define LED_MODE_SYS_OFF_MASK 0x00 + +#define LED_TYPE_RES_REG_MASK 0x0F +#define LED_MODE_RES_GREEN_MASK 0x04 +#define LED_MODE_RES_RED_MASK 0x02 +#define LED_MODE_RES_AMBER_MASK 0x06 +#define LED_MODE_RES_AMBER_FLASHING_MASK 0x07 +#define LED_MODE_RES_OFF_MASK 0x00 + +#define LED_TYPE_FAN_REG_MASK 0x03 +#define LED_MODE_FAN_GREEN_MASK 0x02 +#define LED_MODE_FAN_RED_MASK 0x01 +#define LED_MODE_FAN_AMBER_MASK 0x03 +#define LED_MODE_FAN_OFF_MASK 0x00 + +#define LED_TYPE_FAN1_REG_MASK 0x03 +#define LED_TYPE_FAN2_REG_MASK 0x0C +#define LED_TYPE_FAN3_REG_MASK 0x30 +#define LED_TYPE_FAN4_REG_MASK 0xC0 +#define LED_TYPE_FAN5_REG_MASK 0x03 + +#define LED_MODE_FANX_GREEN_MASK 0x02 +#define LED_MODE_FANX_RED_MASK 0x01 +#define LED_MODE_FANX_AMBER_MASK 0x03 +#define LED_MODE_FANX_OFF_MASK 0x00 + +enum led_type { + LED_TYPE_SYS, + LED_TYPE_PSU2, + LED_TYPE_PSU1, + LED_TYPE_FAN, + LED_TYPE_FAN1, + LED_TYPE_FAN2, + LED_TYPE_FAN3, + LED_TYPE_FAN4, + LED_TYPE_FAN5, +}; + +static const u8 led_reg[] = { + 0x30, /* system & reserved*/ + 0x31, /* fan & PSU1 & PSU2 */ + 0x32, /* FAN5 LED */ + 0x33, /* FAN1-4 LED */ +}; + + +enum led_light_mode { + LED_MODE_OFF = 0, + LED_MODE_GREEN, + LED_MODE_AMBER, + LED_MODE_RED, + LED_MODE_GREEN_BLINK, + LED_MODE_AMBER_BLINK, + LED_MODE_RED_BLINK, + LED_MODE_GREEN_FLASHING, + LED_MODE_AMBER_FLASHING, + LED_MODE_RED_FLASHING, + LED_MODE_AUTO, + LED_MODE_UNKNOWN +}; + +struct led_type_mode { + enum led_type type; + int type_mask; + enum led_light_mode mode; + int mode_mask; +}; + +static struct led_type_mode led_type_mode_data[] = { +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_GREEN, LED_MODE_PSU1_GREEN_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_AMBER, LED_MODE_PSU1_AMBER_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_RED, LED_MODE_PSU1_RED_MASK}, +{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_OFF, LED_MODE_PSU1_OFF_MASK}, + +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_GREEN, LED_MODE_PSU2_GREEN_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_AMBER, LED_MODE_PSU2_AMBER_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_RED, LED_MODE_PSU2_RED_MASK}, +{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_OFF, LED_MODE_PSU2_OFF_MASK}, + +{LED_TYPE_SYS, LED_TYPE_SYS_REG_MASK, LED_MODE_GREEN, LED_MODE_SYS_GREEN_MASK}, +{LED_TYPE_SYS, LED_TYPE_SYS_REG_MASK, LED_MODE_AMBER, LED_MODE_SYS_AMBER_MASK}, +{LED_TYPE_SYS, LED_TYPE_SYS_REG_MASK, LED_MODE_RED, LED_MODE_SYS_RED_MASK}, +{LED_TYPE_SYS, LED_TYPE_SYS_REG_MASK, LED_MODE_AMBER_FLASHING, LED_MODE_SYS_AMBER_FLASHING_MASK}, +{LED_TYPE_SYS, LED_TYPE_SYS_REG_MASK, LED_MODE_OFF, LED_MODE_SYS_OFF_MASK}, + +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_GREEN, LED_MODE_FAN_GREEN_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_AMBER, LED_MODE_FAN_AMBER_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_RED, LED_MODE_FAN_RED_MASK}, +{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_OFF, LED_MODE_FAN_OFF_MASK}, + +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 0}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 0}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_AMBER, LED_MODE_FANX_AMBER_MASK << 0}, +{LED_TYPE_FAN1, LED_TYPE_FAN1_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 0}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 2}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 2}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_AMBER, LED_MODE_FANX_AMBER_MASK << 2}, +{LED_TYPE_FAN2, LED_TYPE_FAN2_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 2}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 4}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 4}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_AMBER, LED_MODE_FANX_AMBER_MASK << 4}, +{LED_TYPE_FAN3, LED_TYPE_FAN3_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 4}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 6}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 6}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_AMBER, LED_MODE_FANX_AMBER_MASK << 6}, +{LED_TYPE_FAN4, LED_TYPE_FAN4_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 6}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_GREEN, LED_MODE_FANX_GREEN_MASK << 0}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_RED, LED_MODE_FANX_RED_MASK << 0}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_AMBER, LED_MODE_FANX_AMBER_MASK << 0}, +{LED_TYPE_FAN5, LED_TYPE_FAN5_REG_MASK, LED_MODE_OFF, LED_MODE_FANX_OFF_MASK << 0}, +}; + +struct fanx_info_s { + u8 cname; /* device name */ + enum led_type type; + u8 reg_id; /* map to led_reg & reg_val */ +}; + +static struct fanx_info_s fanx_info[] = { + {'1', LED_TYPE_FAN1, 3}, + {'2', LED_TYPE_FAN2, 3}, + {'3', LED_TYPE_FAN3, 3}, + {'4', LED_TYPE_FAN4, 3}, + {'5', LED_TYPE_FAN5, 2}, +}; + + +static int led_reg_val_to_light_mode(enum led_type type, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + + if (type != led_type_mode_data[i].type) + continue; + + if ((led_type_mode_data[i].type_mask & reg_val) == + led_type_mode_data[i].mode_mask) + { + return led_type_mode_data[i].mode; + } + } + + return 0; +} + +static u8 led_light_mode_to_reg_val(enum led_type type, + enum led_light_mode mode, u8 reg_val) { + int i; + + for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { + if (type != led_type_mode_data[i].type) + continue; + + if (mode != led_type_mode_data[i].mode) + continue; + + reg_val = led_type_mode_data[i].mode_mask | + (reg_val & (~led_type_mode_data[i].type_mask)); + break; + } + + return reg_val; +} + +static void cs6436_56p_led_update(void) +{ + mutex_lock(&ledctl->update_lock); + + if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) + || !ledctl->valid) { + int i; + + dev_dbg(&ledctl->pdev->dev, "Starting cs6436_56p_led update\n"); + + /* Update LED data + */ + for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { + u8 status; + cig_cpld_read_register(led_reg[i], &status); + + if (status < 0) { + ledctl->valid = 0; + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg[i], status); + goto exit; + } + else + { + ledctl->reg_val[i] = status; + } + } + + ledctl->last_updated = jiffies; + ledctl->valid = 1; + } + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void cs6436_56p_led_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode, + u8 reg, enum led_type type) +{ + u8 reg_val; + mutex_lock(&ledctl->update_lock); + + cig_cpld_read_register(reg, ®_val); + if (reg_val < 0) { + dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); + goto exit; + } + + reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); + + cig_cpld_write_register(reg, reg_val); + + /* to prevent the slow-update issue */ + ledctl->valid = 0; + +exit: + mutex_unlock(&ledctl->update_lock); +} + +static void cs6436_56p_led_fanx_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + enum led_type led_type1; + int reg_id; + int i, nsize; + int ncount = sizeof(fanx_info)/sizeof(struct fanx_info_s); + + for(i=0;iname); + + if (led_cdev->name[nsize-1] == fanx_info[i].cname) + { + led_type1 = fanx_info[i].type; + reg_id = fanx_info[i].reg_id; + + cs6436_56p_led_set(led_cdev, led_light_mode, led_reg[reg_id], led_type1); + return; + } + } +} + + +static enum led_brightness cs6436_56p_led_fanx_get(struct led_classdev *cdev) +{ + enum led_type led_type1; + int reg_id; + int i, nsize; + int ncount = sizeof(fanx_info)/sizeof(struct fanx_info_s); + + for(i=0;iname); + + if (cdev->name[nsize-1] == fanx_info[i].cname) + { + led_type1 = fanx_info[i].type; + reg_id = fanx_info[i].reg_id; + cs6436_56p_led_update(); + return led_reg_val_to_light_mode(led_type1, ledctl->reg_val[reg_id]); + } + } + + return led_reg_val_to_light_mode(LED_TYPE_FAN1, ledctl->reg_val[5]); +} + + +static void cs6436_56p_led_psu1_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + cs6436_56p_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_PSU1); +} + +static enum led_brightness cs6436_56p_led_psu1_get(struct led_classdev *cdev) +{ + cs6436_56p_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU1, ledctl->reg_val[1]); +} + +static void cs6436_56p_led_psu2_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + cs6436_56p_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_PSU2); +} + +static enum led_brightness cs6436_56p_led_psu2_get(struct led_classdev *cdev) +{ + cs6436_56p_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_PSU2, ledctl->reg_val[1]); +} + +static void cs6436_56p_led_sys_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + cs6436_56p_led_set(led_cdev, led_light_mode,led_reg[0], LED_TYPE_SYS); +} + +static enum led_brightness cs6436_56p_led_sys_get(struct led_classdev *cdev) +{ + cs6436_56p_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_SYS, ledctl->reg_val[0]); +} + + +static enum led_brightness cs6436_56p_led_fan_get(struct led_classdev *cdev) +{ + cs6436_56p_led_update(); + return led_reg_val_to_light_mode(LED_TYPE_FAN, ledctl->reg_val[1]); +} + +static void cs6436_56p_led_fan_set(struct led_classdev *led_cdev, + enum led_brightness led_light_mode) +{ + cs6436_56p_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_FAN); +} + + +static struct led_classdev cs6436_56p_leds[] = { + [LED_TYPE_SYS] = { + .name = "cs6436_56p_led::sys", + .default_trigger = "unused", + .brightness_set = cs6436_56p_led_sys_set, + .brightness_get = cs6436_56p_led_sys_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN] = { + .name = "cs6436_56p_led::fan", + .default_trigger = "unused", + .brightness_set = cs6436_56p_led_fan_set, + .brightness_get = cs6436_56p_led_fan_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + + [LED_TYPE_PSU1] = { + .name = "cs6436_56p_led::psu1", + .default_trigger = "unused", + .brightness_set = cs6436_56p_led_psu1_set, + .brightness_get = cs6436_56p_led_psu1_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_PSU2] = { + .name = "cs6436_56p_led::psu2", + .default_trigger = "unused", + .brightness_set = cs6436_56p_led_psu2_set, + .brightness_get = cs6436_56p_led_psu2_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + + [LED_TYPE_FAN1] = { + .name = "cs6436_56p_led::fan1", + .default_trigger = "unused", + .brightness_set = cs6436_56p_led_fanx_set, + .brightness_get = cs6436_56p_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN2] = { + .name = "cs6436_56p_led::fan2", + .default_trigger = "unused", + .brightness_set = cs6436_56p_led_fanx_set, + .brightness_get = cs6436_56p_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN3] = { + .name = "cs6436_56p_led::fan3", + .default_trigger = "unused", + .brightness_set = cs6436_56p_led_fanx_set, + .brightness_get = cs6436_56p_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN4] = { + .name = "cs6436_56p_led::fan4", + .default_trigger = "unused", + .brightness_set = cs6436_56p_led_fanx_set, + .brightness_get = cs6436_56p_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + }, + [LED_TYPE_FAN5] = { + .name = "cs6436_56p_led::fan5", + .default_trigger = "unused", + .brightness_set = cs6436_56p_led_fanx_set, + .brightness_get = cs6436_56p_led_fanx_get, + .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO, + } +}; + +static int cs6436_56p_led_suspend(struct platform_device *dev, + pm_message_t state) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(cs6436_56p_leds); i++) { + led_classdev_suspend(&cs6436_56p_leds[i]); + } + + return 0; +} + +static int cs6436_56p_led_resume(struct platform_device *dev) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(cs6436_56p_leds); i++) { + led_classdev_resume(&cs6436_56p_leds[i]); + } + + return 0; +} + +static int cs6436_56p_led_probe(struct platform_device *pdev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(cs6436_56p_leds); i++) { + ret = led_classdev_register(&pdev->dev, &cs6436_56p_leds[i]); + + if (ret < 0) + break; + } + + /* Check if all LEDs were successfully registered */ + if (i != ARRAY_SIZE(cs6436_56p_leds)) { + int j; + + /* only unregister the LEDs that were successfully registered */ + for (j = 0; j < i; j++) { + led_classdev_unregister(&cs6436_56p_leds[i]); + } + } + + return ret; +} + +static int cs6436_56p_led_remove(struct platform_device *pdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(cs6436_56p_leds); i++) { + led_classdev_unregister(&cs6436_56p_leds[i]); + } + + return 0; +} + +static struct platform_driver cs6436_56p_led_driver = { + .probe = cs6436_56p_led_probe, + .remove = cs6436_56p_led_remove, + .suspend = cs6436_56p_led_suspend, + .resume = cs6436_56p_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, + }, +}; + +static int cs6436_56p_led_default(void) +{ + cig_cpld_write_register(0x30, 0x40);// system green led solid on +} + +static int __init cs6436_56p_led_init(void) +{ + int ret; + + ret = platform_driver_register(&cs6436_56p_led_driver); + if (ret < 0) { + goto exit; + } + + ledctl = kzalloc(sizeof(struct cs6436_56p_led_data), GFP_KERNEL); + if (!ledctl) { + ret = -ENOMEM; + platform_driver_unregister(&cs6436_56p_led_driver); + goto exit; + } + + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); + if (IS_ERR(ledctl->pdev)) { + ret = PTR_ERR(ledctl->pdev); + platform_driver_unregister(&cs6436_56p_led_driver); + kfree(ledctl); + goto exit; + } + + cs6436_56p_led_default(); + +exit: + return ret; +} + +static void __exit cs6436_56p_led_exit(void) +{ + platform_device_unregister(ledctl->pdev); + platform_driver_unregister(&cs6436_56p_led_driver); + kfree(ledctl); +} + +module_init(cs6436_56p_led_init); +module_exit(cs6436_56p_led_exit); + +MODULE_AUTHOR("Zhang Peng "); +MODULE_DESCRIPTION("cs6436_56p_led driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-psu.c b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-psu.c new file mode 100755 index 00000000000..8754007408c --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-psu.c @@ -0,0 +1,586 @@ +/* + * A hwmon driver for the CIG cs6436-56P Power Module + * + * Copyright (C) 2018 Cambridge, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + + +#define MAX_FAN_DUTY_CYCLE 100 + +/* Address scanned */ +static const unsigned short normal_i2c[] = {I2C_CLIENT_END }; + +/* This is additional data */ +struct cs6436_56p_psu_data { + struct device *hwmon_dev; + struct mutex update_lock; + char valid; + unsigned long last_updated; /* In jiffies */ + + /* Registers value */ + u8 vout_mode; + u16 v_in; + u16 v_out; + u16 i_in; + u16 i_out; + u16 p_in; + u16 p_out; + u16 temp_input[3]; + u8 temp_fault; + u8 fan_fault; + u16 fan_duty_cycle[2]; + u16 fan_speed[2]; + u8 mfr_id[8]; + u8 mfr_model[20]; + u8 mfr_serial[20]; + u8 psu_is_present; + u8 psu_is_good; +}; + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask); +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count); +static ssize_t for_linear_data(struct device *dev, struct device_attribute *dev_attr, char *buf); +static ssize_t for_fan_fault(struct device *dev, struct device_attribute *dev_attr, char *buf); +static ssize_t for_fan_warning(struct device *dev, struct device_attribute *dev_attr, char *buf); +static ssize_t for_temp_fault(struct device *dev, struct device_attribute *dev_attr, char *buf); +static ssize_t for_temp_warning(struct device *dev, struct device_attribute *dev_attr, char *buf); +static ssize_t for_vout_data(struct device *dev, struct device_attribute *dev_attr, char *buf); +static int cs6436_56p_psu_read_byte(struct i2c_client *client, u8 reg); +static int cs6436_56p_psu_read_word(struct i2c_client *client, u8 reg); +static int cs6436_56p_psu_write_word(struct i2c_client *client, u8 reg, u16 value); +static int cs6436_56p_psu_read_block(struct i2c_client *client, u8 command, u8 *data, int data_len); +static struct cs6436_56p_psu_data *cs6436_56p_psu_update_device(struct device *dev); +static ssize_t for_ascii(struct device *dev, struct device_attribute *dev_attr, char *buf); +static ssize_t for_status(struct device *dev, struct device_attribute *dev_attr, char *buf); + +enum cs6436_56p_psu_sysfs_attributes { + PSU_V_IN, + PSU_V_OUT, + PSU_I_IN, + PSU_I_OUT, + PSU_P_IN, + PSU_P_OUT, + PSU_TEMP1_INPUT, + PSU_TEMP2_INPUT, + PSU_TEMP3_INPUT, + PSU_TEMP_FAULT, + PSU_TEMP_WARN, + PSU_FAN1_FAULT, + PSU_FAN1_WARN, + PSU_FAN1_DUTY_CYCLE, + PSU_FAN1_SPEED, + PSU_MFR_ID, + PSU_MFR_MODEL, + PSU_MFR_SERIAL, + PSU_PRESENT, + PSU_P_GOOD, +}; + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + + bool is_negative = valid_data >> (valid_bit - 1); + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute \ + *dev_attr, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct i2c_client *client = to_i2c_client(dev); + struct cs6436_56p_psu_data *data = i2c_get_clientdata(client); + int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1; + long speed; + int error; + + error = kstrtol(buf, 10, &speed); + if (error) + return error; + + if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE) + return -EINVAL; + + + mutex_lock(&data->update_lock); + data->fan_duty_cycle[nr] = speed; + cs6436_56p_psu_write_word(client, 0x3B + nr, data->fan_duty_cycle[nr]); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t for_linear_data(struct device *dev, struct device_attribute *dev_attr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cs6436_56p_psu_data *data = cs6436_56p_psu_update_device(dev); + + u16 value = 0; + int exponent, mantissa; + int multiplier = 1000; + + switch (attr->index) { + case PSU_V_IN: + value = data->v_in; + break; + case PSU_I_IN: + value = data->i_in; + break; + case PSU_I_OUT: + value = data->i_out; + break; + case PSU_P_IN: + value = data->p_in; + break; + case PSU_P_OUT: + value = data->p_out; + break; + case PSU_TEMP1_INPUT: + value = data->temp_input[0]; + break; + case PSU_TEMP2_INPUT: + value = data->temp_input[1]; + break; + case PSU_TEMP3_INPUT: + value = data->temp_input[2]; + break; + case PSU_FAN1_DUTY_CYCLE: + multiplier = 1; + value = data->fan_duty_cycle[0]; + break; + case PSU_FAN1_SPEED: + multiplier = 1; + value = data->fan_speed[0]; + break; + default: + break; + } + + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + + return (exponent >= 0) ? sprintf(buf, "%d\n", \ + (mantissa << exponent) * multiplier) : \ + sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static ssize_t for_fan_fault(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cs6436_56p_psu_data *data = cs6436_56p_psu_update_device(dev); + + u8 shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6; + + return sprintf(buf, "%d\n", data->fan_fault >> shift); +} + +static ssize_t for_fan_warning(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cs6436_56p_psu_data *data = cs6436_56p_psu_update_device(dev); + + u8 shift = (attr->index == PSU_FAN1_WARN) ? 5 : 4; + + return sprintf(buf, "%d\n", data->fan_fault >> shift); +} + +static ssize_t for_temp_fault(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cs6436_56p_psu_data *data = cs6436_56p_psu_update_device(dev); + + + return sprintf(buf, "%d\n", data->temp_fault >> 7); +} + +static ssize_t for_temp_warning(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cs6436_56p_psu_data *data = cs6436_56p_psu_update_device(dev); + + return sprintf(buf, "%d\n", data->temp_fault >> 6); +} +static ssize_t for_vout_data(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + struct cs6436_56p_psu_data *data = cs6436_56p_psu_update_device(dev); + int exponent, mantissa; + int multiplier = 1000; + + exponent = two_complement_to_int(data->vout_mode, 5, 0x1f); + mantissa = data->v_out; + + return (exponent > 0) ? sprintf(buf, "%d\n", \ + (mantissa << exponent) * multiplier) : \ + sprintf(buf, "%d\n", ((mantissa * multiplier) >> (-exponent))); +} + +static ssize_t for_ascii(struct device *dev, struct device_attribute \ + *dev_attr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cs6436_56p_psu_data *data = cs6436_56p_psu_update_device(dev); + u8 *ptr = NULL; + + if (!data->valid) + return 0; + + switch (attr->index) { + case PSU_MFR_ID: + ptr = data->mfr_id + 1; + break; + case PSU_MFR_MODEL: + ptr = data->mfr_model + 1; + break; + case PSU_MFR_SERIAL: + ptr = data->mfr_serial + 1; + break; + default: + return 0; + } + return sprintf(buf, "%s\n", ptr); +} + + +static ssize_t for_status(struct device *dev, struct device_attribute *dev_attr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); + struct cs6436_56p_psu_data *data = cs6436_56p_psu_update_device(dev); + u8 *ptr = NULL; + + u8 status = 0; + + if (!data->valid) { + return -EIO; + } + + if (attr->index == PSU_PRESENT) { + status = data->psu_is_present; + } + else { /* PSU_POWER_GOOD */ + status = data->psu_is_good; + } + + return sprintf(buf, "%d\n", status); +} + + + +static int cs6436_56p_psu_read_byte(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +static int cs6436_56p_psu_read_word(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_word_data(client, reg); +} + +static int cs6436_56p_psu_write_word(struct i2c_client *client, u8 reg, \ + u16 value) +{ + union i2c_smbus_data data; + data.word = value; + return i2c_smbus_xfer(client->adapter, client->addr, + client->flags |= I2C_CLIENT_PEC, + I2C_SMBUS_WRITE, reg, + I2C_SMBUS_WORD_DATA, &data); + +} + +static int cs6436_56p_psu_read_block(struct i2c_client *client, u8 command, \ + u8 *data, int data_len) +{ + int result = i2c_smbus_read_i2c_block_data(client, command, data_len, + data); + if (unlikely(result < 0)) + goto abort; + if (unlikely(result != data_len)) { + result = -EIO; + goto abort; + } + + result = 0; +abort: + return result; + +} + +struct reg_data_byte { + u8 reg; + u8 *value; +}; + +struct reg_data_word { + u8 reg; + u16 *value; +}; + +static struct cs6436_56p_psu_data *cs6436_56p_psu_update_device( \ + struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cs6436_56p_psu_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + + + if (time_after(jiffies, data->last_updated)) { + int i, status; + u8 command; + struct reg_data_byte regs_byte[] = { + {0x20, &data->vout_mode}, + {0x81, &data->fan_fault}, + {0x7d, &data->temp_fault}, + }; + struct reg_data_word regs_word[] = { + {0x88, &data->v_in}, + {0x8b, &data->v_out}, + {0x89, &data->i_in}, + {0x8c, &data->i_out}, + {0x96, &data->p_out}, + {0x97, &data->p_in}, + {0x8d, &(data->temp_input[0])}, + {0x8e, &(data->temp_input[1])}, + {0x8f, &(data->temp_input[2])}, + {0x3b, &(data->fan_duty_cycle[0])}, + {0x90, &(data->fan_speed[0])}, + }; + + dev_dbg(&client->dev, "start data update\n"); + + /* one milliseconds from now */ + data->last_updated = jiffies + HZ / 1000; + + for (i = 0; i < ARRAY_SIZE(regs_byte); i++) { + status = cs6436_56p_psu_read_byte(client, + regs_byte[i].reg); + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_byte[i].reg, status); + } else { + *(regs_byte[i].value) = status; + } + } + + for (i = 0; i < ARRAY_SIZE(regs_word); i++) { + status = cs6436_56p_psu_read_word(client, + regs_word[i].reg); + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", + regs_word[i].reg, status); + } else { + *(regs_word[i].value) = status; + } + } + + command = 0x99; /* PSU mfr_id */ + status = cs6436_56p_psu_read_block(client, command, + data->mfr_id, ARRAY_SIZE(data->mfr_id) - 1); + data->mfr_id[ARRAY_SIZE(data->mfr_id) - 1] = '\0'; + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + } + + command = 0x9a; /* PSU mfr_model */ + status = cs6436_56p_psu_read_block(client, command, + data->mfr_model, ARRAY_SIZE(data->mfr_model) - 1); + data->mfr_model[ARRAY_SIZE(data->mfr_model) - 1] = '\0'; + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + } + + command = 0x9e; /* PSU mfr_serial */ + status = cs6436_56p_psu_read_block(client, command, + data->mfr_serial, ARRAY_SIZE(data->mfr_serial) - 1); + data->mfr_serial[ARRAY_SIZE(data->mfr_serial) - 1] = '\0'; + if (status < 0) { + dev_dbg(&client->dev, "reg %d, err %d\n", command, status); + } + data->valid = 1; + data->psu_is_present = strlen(data->mfr_id) > 1 ? 1:0; + if(data->psu_is_present) + data->psu_is_good = ((data->fan_fault) || (data->temp_fault))? 0:1; + else + data->psu_is_good = 0; + } + + mutex_unlock(&data->update_lock); + + return data; + +} + +/* sysfs attributes for hwmon */ +static SENSOR_DEVICE_ATTR(psu_v_in, S_IRUGO, for_linear_data, NULL, PSU_V_IN); +static SENSOR_DEVICE_ATTR(psu_v_out, S_IRUGO, for_vout_data, NULL, PSU_V_OUT); +static SENSOR_DEVICE_ATTR(psu_i_in, S_IRUGO, for_linear_data, NULL, PSU_I_IN); +static SENSOR_DEVICE_ATTR(psu_i_out, S_IRUGO, for_linear_data, NULL, PSU_I_OUT); +static SENSOR_DEVICE_ATTR(psu_p_in, S_IRUGO, for_linear_data, NULL, PSU_P_IN); +static SENSOR_DEVICE_ATTR(psu_p_out, S_IRUGO, for_linear_data, NULL, PSU_P_OUT); +static SENSOR_DEVICE_ATTR(psu_temp1_input, S_IRUGO, for_linear_data, NULL, PSU_TEMP1_INPUT); +static SENSOR_DEVICE_ATTR(psu_temp2_input, S_IRUGO, for_linear_data, NULL, PSU_TEMP2_INPUT); +static SENSOR_DEVICE_ATTR(psu_temp3_input, S_IRUGO, for_linear_data, NULL, PSU_TEMP3_INPUT); +static SENSOR_DEVICE_ATTR(psu_temp_fault, S_IRUGO, for_temp_fault, NULL, PSU_TEMP_FAULT); +static SENSOR_DEVICE_ATTR(psu_temp_warning, S_IRUGO, for_temp_warning, NULL, PSU_TEMP_WARN); +static SENSOR_DEVICE_ATTR(psu_fan1_fault, S_IRUGO, for_fan_fault, NULL, PSU_FAN1_FAULT); +static SENSOR_DEVICE_ATTR(psu_fan1_warning, S_IRUGO, for_fan_warning, NULL, PSU_FAN1_WARN); +static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUSR | S_IRUGO, for_linear_data, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE); +static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, S_IRUGO, for_linear_data, NULL, PSU_FAN1_SPEED); +static SENSOR_DEVICE_ATTR(psu_mfr_id, S_IRUGO, for_ascii, NULL, PSU_MFR_ID); +static SENSOR_DEVICE_ATTR(psu_mfr_model, S_IRUGO, for_ascii, NULL, PSU_MFR_MODEL); +static SENSOR_DEVICE_ATTR(psu_mfr_serial, S_IRUGO, for_ascii, NULL, PSU_MFR_SERIAL); +static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, for_status, NULL, PSU_PRESENT); +static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, for_status, NULL, PSU_P_GOOD); + + + +static struct attribute *cs6436_56p_psu_attributes[] = { + &sensor_dev_attr_psu_v_in.dev_attr.attr, + &sensor_dev_attr_psu_v_out.dev_attr.attr, + &sensor_dev_attr_psu_i_in.dev_attr.attr, + &sensor_dev_attr_psu_i_out.dev_attr.attr, + &sensor_dev_attr_psu_p_in.dev_attr.attr, + &sensor_dev_attr_psu_p_out.dev_attr.attr, + &sensor_dev_attr_psu_temp1_input.dev_attr.attr, + &sensor_dev_attr_psu_temp2_input.dev_attr.attr, + &sensor_dev_attr_psu_temp3_input.dev_attr.attr, + &sensor_dev_attr_psu_temp_fault.dev_attr.attr, + &sensor_dev_attr_psu_temp_warning.dev_attr.attr, + &sensor_dev_attr_psu_fan1_fault.dev_attr.attr, + &sensor_dev_attr_psu_fan1_warning.dev_attr.attr, + &sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr, + &sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr, + &sensor_dev_attr_psu_mfr_id.dev_attr.attr, + &sensor_dev_attr_psu_mfr_model.dev_attr.attr, + &sensor_dev_attr_psu_mfr_serial.dev_attr.attr, + &sensor_dev_attr_psu_present.dev_attr.attr, + &sensor_dev_attr_psu_power_good.dev_attr.attr, + NULL +}; + +static const struct attribute_group cs6436_56p_psu_group = { + .attrs = cs6436_56p_psu_attributes, +}; + +static int cs6436_56p_psu_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cs6436_56p_psu_data *data; + int status; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(*data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + data->valid = 0; + mutex_init(&data->update_lock); + + dev_info(&client->dev, "new chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &cs6436_56p_psu_group); + if (status) + goto exit_sysfs_create_group; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_hwmon_device_register; + } + + return 0; + +exit_hwmon_device_register: + sysfs_remove_group(&client->dev.kobj, &cs6436_56p_psu_group); +exit_sysfs_create_group: + kfree(data); +exit: + return status; +} + +static int cs6436_56p_psu_remove(struct i2c_client *client) +{ + struct cs6436_56p_psu_data *data = i2c_get_clientdata(client); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &cs6436_56p_psu_group); + kfree(data); + + return 0; +} + +enum psu_index +{ + cs6436_56p_psu1, + cs6436_56p_psu2 +}; + +static const struct i2c_device_id cs6436_56p_psu_id[] = { + { "cs6436_56p_psu1", cs6436_56p_psu1 }, + { "cs6436_56p_psu2", cs6436_56p_psu2 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, cs6436_56p_psu_id); + +static struct i2c_driver cs6436_56p_psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "cs6436_56p_psu", + }, + .probe = cs6436_56p_psu_probe, + .remove = cs6436_56p_psu_remove, + .id_table = cs6436_56p_psu_id, + .address_list = normal_i2c, +}; + +module_i2c_driver(cs6436_56p_psu_driver); + +MODULE_AUTHOR("Zhang Peng "); +MODULE_DESCRIPTION("cs6436_56p_psu driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-sfp.c b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-sfp.c new file mode 100755 index 00000000000..f2b54a260fc --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/modules/x86-64-cig-cs6436-56p-sfp.c @@ -0,0 +1,1454 @@ +/* + * A hwmon driver for the CIG cs6436-56P SFP Module + * + * Copyright (C) 2018 Cambridge, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "cs6436_56p_sfp" /* Platform dependent */ + +#define DEBUG_MODE 0 + +#if (DEBUG_MODE == 1) + #define DEBUG_PRINT(fmt, args...) \ + printk (KERN_INFO "%s:%s[%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +#define EEPROM_NAME "sfp_eeprom" +#define EEPROM_SIZE 256 /* 256 byte eeprom */ +#define BIT_INDEX(i) (1ULL << (i)) +#define USE_I2C_BLOCK_READ 1 /* Platform dependent */ +#define I2C_RW_RETRY_COUNT 3 +#define I2C_RW_RETRY_INTERVAL 100 /* ms */ + +#define SFP_EEPROM_A0_I2C_ADDR (0xA0 >> 1) +#define SFP_EEPROM_A2_I2C_ADDR (0xA2 >> 1) + +#define SFF8024_PHYSICAL_DEVICE_ID_ADDR 0x0 +#define SFF8024_DEVICE_ID_SFP 0x3 +#define SFF8024_DEVICE_ID_QSFP 0xC +#define SFF8024_DEVICE_ID_QSFP_PLUS 0xD +#define SFF8024_DEVICE_ID_QSFP28 0x11 + +#define SFF8472_DIAG_MON_TYPE_ADDR 92 +#define SFF8472_DIAG_MON_TYPE_DDM_MASK 0x40 +#define SFF8472_10G_ETH_COMPLIANCE_ADDR 0x3 +#define SFF8472_10G_BASE_MASK 0xF0 + +#define SFF8436_RX_LOS_ADDR 3 +#define SFF8436_TX_FAULT_ADDR 4 +#define SFF8436_TX_DISABLE_ADDR 86 + + +#define ADDR_REG_SFP_STATUS_ADDR 0X62 //reg addr +R/W# //1031 +#define ADDR_REG_SFP_STATUS_TX 0X63 // write data +#define ADDR_REG_SFP_STATUS_RX 0X64 //read data +#define ADDR_REG_SFP_STATUS_COMMAND 0X65 //cmd bit7=1,go +#define ADDR_REG_SFP_STATUS_STATUS 0X66 //status + + + +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_port_type(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t show_present(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t sfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t sfp_set_tx_disable(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +static ssize_t qsfp_set_tx_disable(struct device *dev, struct device_attribute *da, const char *buf, size_t count);; +static ssize_t sfp_show_ddm_implemented(struct device *dev, struct device_attribute *da, char *buf); +static ssize_t sfp_eeprom_read(struct i2c_client *, u8, u8 *,int); +static ssize_t sfp_eeprom_write(struct i2c_client *, u8 , const char *,int); +extern int cig_cpld_read_register(u8 reg_off, u8 *val); +extern int cig_cpld_write_register(u8 reg_off, u8 val); + + +enum sfp_sysfs_attributes { + PRESENT, + PRESENT_ALL, + PORT_NUMBER, + PORT_TYPE, + DDM_IMPLEMENTED, + TX_FAULT, + TX_FAULT1, + TX_FAULT2, + TX_FAULT3, + TX_FAULT4, + TX_DISABLE, + TX_DISABLE1, + TX_DISABLE2, + TX_DISABLE3, + TX_DISABLE4, + RX_LOS, + RX_LOS1, + RX_LOS2, + RX_LOS3, + RX_LOS4, + RX_LOS_ALL +}; + +/* SFP/QSFP common attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_port_number, S_IRUGO, show_port_number, NULL, PORT_NUMBER); +static SENSOR_DEVICE_ATTR(sfp_port_type, S_IRUGO, show_port_type, NULL, PORT_TYPE); +static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, show_present, NULL, PRESENT); +static SENSOR_DEVICE_ATTR(sfp_is_present_all, S_IRUGO, show_present, NULL, PRESENT_ALL); +static SENSOR_DEVICE_ATTR(sfp_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, RX_LOS); +static SENSOR_DEVICE_ATTR(sfp_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, TX_DISABLE); +static SENSOR_DEVICE_ATTR(sfp_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, TX_FAULT); + +/* QSFP attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_rx_los1, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS1); +static SENSOR_DEVICE_ATTR(sfp_rx_los2, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS2); +static SENSOR_DEVICE_ATTR(sfp_rx_los3, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS3); +static SENSOR_DEVICE_ATTR(sfp_rx_los4, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS4); +static SENSOR_DEVICE_ATTR(sfp_tx_disable1, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE1); +static SENSOR_DEVICE_ATTR(sfp_tx_disable2, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE2); +static SENSOR_DEVICE_ATTR(sfp_tx_disable3, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE3); +static SENSOR_DEVICE_ATTR(sfp_tx_disable4, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE4); +static SENSOR_DEVICE_ATTR(sfp_tx_fault1, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT1); +static SENSOR_DEVICE_ATTR(sfp_tx_fault2, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT2); +static SENSOR_DEVICE_ATTR(sfp_tx_fault3, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT3); +static SENSOR_DEVICE_ATTR(sfp_tx_fault4, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT4); +static struct attribute *qsfp_attributes[] = { + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_port_type.dev_attr.attr, + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los1.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los2.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los3.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los4.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable1.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable2.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable3.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable4.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault1.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault2.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault3.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault4.dev_attr.attr, + NULL +}; + +/* SFP msa attributes for sysfs */ +static SENSOR_DEVICE_ATTR(sfp_ddm_implemented, S_IRUGO, sfp_show_ddm_implemented, NULL, DDM_IMPLEMENTED); +static SENSOR_DEVICE_ATTR(sfp_rx_los_all, S_IRUGO, sfp_show_tx_rx_status, NULL, RX_LOS_ALL); +static struct attribute *sfp_msa_attributes[] = { + &sensor_dev_attr_sfp_port_number.dev_attr.attr, + &sensor_dev_attr_sfp_port_type.dev_attr.attr, + &sensor_dev_attr_sfp_is_present.dev_attr.attr, + &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, + &sensor_dev_attr_sfp_ddm_implemented.dev_attr.attr, + &sensor_dev_attr_sfp_tx_fault.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los.dev_attr.attr, + &sensor_dev_attr_sfp_rx_los_all.dev_attr.attr, + &sensor_dev_attr_sfp_tx_disable.dev_attr.attr, + NULL +}; + +/* SFP ddm attributes for sysfs */ +static struct attribute *sfp_ddm_attributes[] = { + NULL +}; + +/* Platform dependent +++ */ +#define CPLD_PORT_TO_FRONT_PORT(port) (port+1) + +enum port_numbers { +cs6436_56p_sfp1, cs6436_56p_sfp2, cs6436_56p_sfp3, cs6436_56p_sfp4, +cs6436_56p_sfp5, cs6436_56p_sfp6, cs6436_56p_sfp7, cs6436_56p_sfp8, +cs6436_56p_sfp9, cs6436_56p_sfp10, cs6436_56p_sfp11, cs6436_56p_sfp12, +cs6436_56p_sfp13, cs6436_56p_sfp14, cs6436_56p_sfp15, cs6436_56p_sfp16, +cs6436_56p_sfp17, cs6436_56p_sfp18, cs6436_56p_sfp19, cs6436_56p_sfp20, +cs6436_56p_sfp21, cs6436_56p_sfp22, cs6436_56p_sfp23, cs6436_56p_sfp24, +cs6436_56p_sfp25, cs6436_56p_sfp26, cs6436_56p_sfp27, cs6436_56p_sfp28, +cs6436_56p_sfp29, cs6436_56p_sfp30, cs6436_56p_sfp31, cs6436_56p_sfp32, +cs6436_56p_sfp33, cs6436_56p_sfp34, cs6436_56p_sfp35, cs6436_56p_sfp36, +cs6436_56p_sfp37, cs6436_56p_sfp38, cs6436_56p_sfp39, cs6436_56p_sfp40, +cs6436_56p_sfp41, cs6436_56p_sfp42, cs6436_56p_sfp43, cs6436_56p_sfp44, +cs6436_56p_sfp45, cs6436_56p_sfp46, cs6436_56p_sfp47, cs6436_56p_sfp48, +cs6436_56p_sfp49, cs6436_56p_sfp50, cs6436_56p_sfp51, cs6436_56p_sfp52, +cs6436_56p_sfp53, cs6436_56p_sfp54, cs6436_56p_sfp55, cs6436_56p_sfp56 +}; + +#define I2C_DEV_ID(x) { #x, x} + +static const struct i2c_device_id sfp_device_id[] = { +I2C_DEV_ID(cs6436_56p_sfp1), +I2C_DEV_ID(cs6436_56p_sfp2), +I2C_DEV_ID(cs6436_56p_sfp3), +I2C_DEV_ID(cs6436_56p_sfp4), +I2C_DEV_ID(cs6436_56p_sfp5), +I2C_DEV_ID(cs6436_56p_sfp6), +I2C_DEV_ID(cs6436_56p_sfp7), +I2C_DEV_ID(cs6436_56p_sfp8), +I2C_DEV_ID(cs6436_56p_sfp9), +I2C_DEV_ID(cs6436_56p_sfp10), +I2C_DEV_ID(cs6436_56p_sfp11), +I2C_DEV_ID(cs6436_56p_sfp12), +I2C_DEV_ID(cs6436_56p_sfp13), +I2C_DEV_ID(cs6436_56p_sfp14), +I2C_DEV_ID(cs6436_56p_sfp15), +I2C_DEV_ID(cs6436_56p_sfp16), +I2C_DEV_ID(cs6436_56p_sfp17), +I2C_DEV_ID(cs6436_56p_sfp18), +I2C_DEV_ID(cs6436_56p_sfp19), +I2C_DEV_ID(cs6436_56p_sfp20), +I2C_DEV_ID(cs6436_56p_sfp21), +I2C_DEV_ID(cs6436_56p_sfp22), +I2C_DEV_ID(cs6436_56p_sfp23), +I2C_DEV_ID(cs6436_56p_sfp24), +I2C_DEV_ID(cs6436_56p_sfp25), +I2C_DEV_ID(cs6436_56p_sfp26), +I2C_DEV_ID(cs6436_56p_sfp27), +I2C_DEV_ID(cs6436_56p_sfp28), +I2C_DEV_ID(cs6436_56p_sfp29), +I2C_DEV_ID(cs6436_56p_sfp30), +I2C_DEV_ID(cs6436_56p_sfp31), +I2C_DEV_ID(cs6436_56p_sfp32), +I2C_DEV_ID(cs6436_56p_sfp33), +I2C_DEV_ID(cs6436_56p_sfp34), +I2C_DEV_ID(cs6436_56p_sfp35), +I2C_DEV_ID(cs6436_56p_sfp36), +I2C_DEV_ID(cs6436_56p_sfp37), +I2C_DEV_ID(cs6436_56p_sfp38), +I2C_DEV_ID(cs6436_56p_sfp39), +I2C_DEV_ID(cs6436_56p_sfp40), +I2C_DEV_ID(cs6436_56p_sfp41), +I2C_DEV_ID(cs6436_56p_sfp42), +I2C_DEV_ID(cs6436_56p_sfp43), +I2C_DEV_ID(cs6436_56p_sfp44), +I2C_DEV_ID(cs6436_56p_sfp45), +I2C_DEV_ID(cs6436_56p_sfp46), +I2C_DEV_ID(cs6436_56p_sfp47), +I2C_DEV_ID(cs6436_56p_sfp48), +I2C_DEV_ID(cs6436_56p_sfp49), +I2C_DEV_ID(cs6436_56p_sfp50), +I2C_DEV_ID(cs6436_56p_sfp51), +I2C_DEV_ID(cs6436_56p_sfp52), +I2C_DEV_ID(cs6436_56p_sfp53), +I2C_DEV_ID(cs6436_56p_sfp54), +I2C_DEV_ID(cs6436_56p_sfp55), +I2C_DEV_ID(cs6436_56p_sfp56), +{ /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, sfp_device_id); + +/* + * list of valid port types + * note OOM_PORT_TYPE_NOT_PRESENT to indicate no + * module is present in this port + */ +typedef enum oom_driver_port_type_e { + OOM_DRIVER_PORT_TYPE_INVALID, + OOM_DRIVER_PORT_TYPE_NOT_PRESENT, + OOM_DRIVER_PORT_TYPE_SFP, + OOM_DRIVER_PORT_TYPE_SFP_PLUS, + OOM_DRIVER_PORT_TYPE_QSFP, + OOM_DRIVER_PORT_TYPE_QSFP_PLUS, + OOM_DRIVER_PORT_TYPE_QSFP28 +} oom_driver_port_type_t; + +enum driver_type_e { + DRIVER_TYPE_SFP_MSA, + DRIVER_TYPE_SFP_DDM, + DRIVER_TYPE_QSFP +}; + +/* Each client has this additional data + */ +struct eeprom_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + struct bin_attribute bin; /* eeprom data */ +}; + +struct sfp_msa_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u64 status[6]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss + 3 => device id + 4 => 10G Ethernet Compliance Codes + to distinguish SFP or SFP+ + 5 => DIAGNOSTIC MONITORING TYPE */ + struct eeprom_data eeprom; +}; + +struct sfp_ddm_data { + struct eeprom_data eeprom; +}; + +struct qsfp_data { + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status[3]; /* bit0:port0, bit1:port1 and so on */ + /* index 0 => tx_fail + 1 => tx_disable + 2 => rx_loss */ + + u8 device_id; + struct eeprom_data eeprom; +}; + +struct sfp_port_data { + struct mutex update_lock; + enum driver_type_e driver_type; + int port; /* CPLD port index */ + oom_driver_port_type_t port_type; + u64 present; /* present status, bit0:port0, bit1:port1 and so on */ + + struct sfp_msa_data *msa; + struct sfp_ddm_data *ddm; + struct qsfp_data *qsfp; + + struct i2c_client *client; +}; + +static ssize_t show_port_number(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + return sprintf(buf, "%d\n", CPLD_PORT_TO_FRONT_PORT(data->port)); +} + +#define WAIT_TIME_OUT_COUNT 100 + +static int cig_cpld_write_sfp_register(u8 sfp_reg_addr, u8 sfp_write_reg_data) +{ + u8 sfp_read_status = 0; + u8 wait_time_out = WAIT_TIME_OUT_COUNT; + + cig_cpld_write_register(ADDR_REG_SFP_STATUS_ADDR, sfp_reg_addr << 1); + cig_cpld_write_register(ADDR_REG_SFP_STATUS_TX, sfp_write_reg_data); + cig_cpld_write_register(ADDR_REG_SFP_STATUS_COMMAND, 0x80); + do{ + cig_cpld_read_register(ADDR_REG_SFP_STATUS_STATUS, &sfp_read_status); + udelay(60); + wait_time_out--; + if(wait_time_out == 0) + break; + }while(sfp_read_status != 0x02); + + if(wait_time_out == 0) + return -1; + + return 1; +} + + +static int cig_cpld_read_sfp_register(u8 sfp_reg_addr, u8 *sfp_read_reg_data) +{ + u8 sfp_read_status = 0; + u8 wait_time_out = WAIT_TIME_OUT_COUNT; + + cig_cpld_write_register(ADDR_REG_SFP_STATUS_ADDR, sfp_reg_addr << 1 | 1); + cig_cpld_write_register(ADDR_REG_SFP_STATUS_COMMAND, 0x80); + do{ + udelay(60); + cig_cpld_read_register(ADDR_REG_SFP_STATUS_STATUS, &sfp_read_status); + wait_time_out--; + if(wait_time_out == 0) + break; + }while(sfp_read_status != 0x01); + + cig_cpld_read_register(ADDR_REG_SFP_STATUS_RX,sfp_read_reg_data); + + if(wait_time_out == 0) + return -1; + + return 1; +} + + + + + + +/* Platform dependent +++ */ +static struct sfp_port_data *sfp_update_present(struct i2c_client *client) +{ + int i = 0, j = 0, status = -1; + unsigned char cpld_reg_data = 0,cpld_reg_addr = 0; + struct sfp_port_data *data = i2c_get_clientdata(client); + + DEBUG_PRINT("Starting sfp present status update"); + mutex_lock(&data->update_lock); + data->present = 0; + + udelay(6000); + + /* Read present status of port 1~48(SFP port) */ + for (i = 0; i < 6; i++) { + cpld_reg_addr = 1 + i; + + status = cig_cpld_read_sfp_register(cpld_reg_addr, &cpld_reg_data); + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_reg_addr, cpld_reg_data, status); + goto exit; + } + + data->present |= (u64)cpld_reg_data << (i*8); + + DEBUG_PRINT("Present status = 0x%lx\r\n", data->present); + } + + /* Read present status of port 49-56(QSFP port) */ + cpld_reg_addr = 25; + status = cig_cpld_read_sfp_register(cpld_reg_addr, &cpld_reg_data); + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_reg_addr, cpld_reg_data, status); + goto exit; + } + else { + data->present |= (u64)cpld_reg_data << 48; + } + + DEBUG_PRINT("Present status = 0x%lx", data->present); +exit: + mutex_unlock(&data->update_lock); + return (status < 0) ? ERR_PTR(status) : data; +} + +static struct sfp_port_data *sfp_update_tx_rx_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int i = 0, j = 0; + int status = -1; + unsigned char cpld_reg_data = 0,cpld_reg_addr = 0; + + if (time_before(jiffies, data->msa->last_updated + HZ + HZ / 2) && data->msa->valid) { + return data; + } + + DEBUG_PRINT("Starting cs6436_56p sfp tx rx status update"); + mutex_lock(&data->update_lock); + data->msa->valid = 0; + memset(data->msa->status, 0, sizeof(data->msa->status)); + + udelay(6000); + + /* Read status of port 1~48(SFP port) */ + for (i = 0; i < 6; i++) { + cpld_reg_addr = 13+i; + + status = cig_cpld_read_sfp_register(cpld_reg_addr, &cpld_reg_data); + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_reg_addr, cpld_reg_data, status); + goto exit; + } + + data->msa->status[0] |= (u64)cpld_reg_data << (i * 8); + + DEBUG_PRINT("tx rx status[0] = 0x%lx\r\n", data->msa->status[0]); + } + + + for (i = 0; i < 6; i++) { + cpld_reg_addr = 19+i; + + status = cig_cpld_read_sfp_register(cpld_reg_addr, &cpld_reg_data); + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_reg_addr, cpld_reg_data, status); + goto exit; + } + + data->msa->status[1] |= (u64)cpld_reg_data << (i * 8); + + DEBUG_PRINT("tx rx status[1] = 0x%lx\r\n", data->msa->status[1]); + } + + for (i = 0; i < 6; i++) { + cpld_reg_addr = 7+i; + + status = cig_cpld_read_sfp_register(cpld_reg_addr, &cpld_reg_data); + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_reg_addr, cpld_reg_data, status); + goto exit; + } + + data->msa->status[2] |= (u64)cpld_reg_data << (i * 8); + + DEBUG_PRINT("tx rx status[2] = 0x%lx\r\n", data->msa->status[2]); + } + + data->msa->valid = 1; + data->msa->last_updated = jiffies; + +exit: + mutex_unlock(&data->update_lock); + return (status < 0) ? ERR_PTR(status) : data; +} + +static ssize_t sfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + unsigned char cpld_reg_data = 0,cpld_reg_addr = 0,cpld_reg_bit = 0,cpld_reg_val = 0; + long disable; + int error; + + if (data->driver_type == DRIVER_TYPE_QSFP) { + return qsfp_set_tx_disable(dev, da, buf, count); + } + + error = kstrtol(buf, 10, &disable); + if (error) { + return error; + } + + mutex_lock(&data->update_lock); + + udelay(6000); + + if(data->port <= 48) { + cpld_reg_addr = 19 + data->port / 8; + cpld_reg_bit = 1 << (data->port); + } + + /* Read current status */ + error = cig_cpld_read_sfp_register(cpld_reg_addr, &cpld_reg_data); + + /* Update tx_disable status */ + if (disable) { + data->msa->status[1] |= BIT_INDEX(data->port); + cpld_reg_data |= cpld_reg_bit; + } + else { + data->msa->status[1] &= ~BIT_INDEX(data->port); + cpld_reg_data &= ~cpld_reg_bit; + } + + error = cig_cpld_write_sfp_register(cpld_reg_addr,cpld_reg_data); + + mutex_unlock(&data->update_lock); + return count; +} +/* Platform dependent --- */ + +static int sfp_is_port_present(struct i2c_client *client, int port) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + + data = sfp_update_present(client); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + return !(data->present & BIT_INDEX(data->port)); /* Platform dependent */ +} + +/* Platform dependent +++ */ +static ssize_t show_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + + if (PRESENT_ALL == attr->index) { + int i; + u8 values[7] = {0}; + struct sfp_port_data *data = sfp_update_present(client); + + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + for (i = 0; i < ARRAY_SIZE(values); i++) { + values[i] = ~(u8)(data->present >> (i * 8)); + } + + /* Return values 1 -> 56 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], + values[3], values[4], values[5], + values[6]); + } + else { + struct sfp_port_data *data = i2c_get_clientdata(client); + int present = sfp_is_port_present(client, data->port); + + if (IS_ERR_VALUE(present)) { + return present; + } + + /* PRESENT */ + return sprintf(buf, "%d\n", present); + } +} +/* Platform dependent --- */ + +static struct sfp_port_data *sfp_update_port_type(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + u8 buf = 0; + int status; + + mutex_lock(&data->update_lock); + + switch (data->driver_type) { + case DRIVER_TYPE_SFP_MSA: + { + status = sfp_eeprom_read(client, SFF8024_PHYSICAL_DEVICE_ID_ADDR, &buf, sizeof(buf)); + if (unlikely(status < 0)) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + if (buf != SFF8024_DEVICE_ID_SFP) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + status = sfp_eeprom_read(client, SFF8472_10G_ETH_COMPLIANCE_ADDR, &buf, sizeof(buf)); + if (unlikely(status < 0)) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + DEBUG_PRINT("sfp port type (0x3) data = (0x%x)", buf); + data->port_type = buf & SFF8472_10G_BASE_MASK ? OOM_DRIVER_PORT_TYPE_SFP_PLUS : OOM_DRIVER_PORT_TYPE_SFP; + break; + } + case DRIVER_TYPE_QSFP: + { + status = sfp_eeprom_read(client, SFF8024_PHYSICAL_DEVICE_ID_ADDR, &buf, sizeof(buf)); + if (unlikely(status < 0)) { + data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; + break; + } + + DEBUG_PRINT("qsfp port type (0x0) buf = (0x%x)", buf); + switch (buf) { + case SFF8024_DEVICE_ID_QSFP: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP; + break; + case SFF8024_DEVICE_ID_QSFP_PLUS: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP_PLUS; + break; + case SFF8024_DEVICE_ID_QSFP28: + data->port_type = OOM_DRIVER_PORT_TYPE_QSFP_PLUS; + break; + default: + data->port_type = buf; + break; + } + + break; + } + default: + break; + } + + mutex_unlock(&data->update_lock); + return data; +} + +static ssize_t show_port_type(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int present = sfp_is_port_present(client, data->port); + + if (IS_ERR_VALUE(present)) { + return present; + } + + if (!present) { + /* port is not present */ + return sprintf(buf, "%d\n", OOM_DRIVER_PORT_TYPE_NOT_PRESENT); + } + + sfp_update_port_type(dev); + return sprintf(buf, "%d\n", data->port_type); +} + +static struct sfp_port_data *qsfp_update_tx_rx_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + int i, status = -1; + u8 buf = 0; + u8 reg[] = {SFF8436_TX_FAULT_ADDR, SFF8436_TX_DISABLE_ADDR, SFF8436_RX_LOS_ADDR}; + + DEBUG_PRINT(""); + if (time_before(jiffies, data->qsfp->last_updated + HZ + HZ / 2) && data->qsfp->valid) { + return data; + } + + DEBUG_PRINT("Starting sfp tx rx status update"); + mutex_lock(&data->update_lock); + data->qsfp->valid = 0; + memset(data->qsfp->status, 0, sizeof(data->qsfp->status)); + + DEBUG_PRINT(""); + /* Notify device to update tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(client, reg[i], &buf, sizeof(buf)); + if (unlikely(status < 0)) { + DEBUG_PRINT(""); + goto exit; + } + } + msleep(200); + DEBUG_PRINT(""); + + /* Read actual tx fault/ tx disable/ rx los status */ + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(client, reg[i], &buf, sizeof(buf)); + if (unlikely(status < 0)) { + DEBUG_PRINT(""); + goto exit; + } + + DEBUG_PRINT("qsfp reg(0x%x) status = (0x%x)", reg[i], data->qsfp->status[i]); + data->qsfp->status[i] = (buf & 0xF); + } + + DEBUG_PRINT(""); + data->qsfp->valid = 1; + data->qsfp->last_updated = jiffies; + +exit: + DEBUG_PRINT(""); + mutex_unlock(&data->update_lock); + return (status < 0) ? ERR_PTR(status) : data; +} + +static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + int present; + u8 val = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + DEBUG_PRINT(""); + present = sfp_is_port_present(client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + DEBUG_PRINT(""); + if (present == 0) { + /* port is not present */ + return -ENODEV; + } + + DEBUG_PRINT(""); + data = qsfp_update_tx_rx_status(dev); + DEBUG_PRINT(""); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + DEBUG_PRINT(""); + switch (attr->index) { + case TX_FAULT: + val = !!(data->qsfp->status[2] & 0xF); + break; + case TX_FAULT1: + case TX_FAULT2: + case TX_FAULT3: + case TX_FAULT4: + val = !!(data->qsfp->status[2] & BIT_INDEX(attr->index - TX_FAULT1)); + break; + case TX_DISABLE: + val = data->qsfp->status[1] & 0xF; + break; + case TX_DISABLE1: + case TX_DISABLE2: + case TX_DISABLE3: + case TX_DISABLE4: + val = !!(data->qsfp->status[1] & BIT_INDEX(attr->index - TX_DISABLE1)); + break; + case RX_LOS: + val = !!(data->qsfp->status[0] & 0xF); + break; + case RX_LOS1: + case RX_LOS2: + case RX_LOS3: + case RX_LOS4: + val = !!(data->qsfp->status[0] & BIT_INDEX(attr->index - RX_LOS1)); + break; + default: + break; + } + + DEBUG_PRINT(""); + return sprintf(buf, "%d\n", val); +} + +static ssize_t qsfp_set_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + long disable; + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + status = sfp_is_port_present(client, data->port); + if (IS_ERR_VALUE(status)) { + return status; + } + + if (!status) { + /* port is not present */ + return -ENXIO; + } + + status = kstrtol(buf, 10, &disable); + if (status) { + return status; + } + + data = qsfp_update_tx_rx_status(dev); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + mutex_lock(&data->update_lock); + + if (attr->index == TX_DISABLE) { + data->qsfp->status[1] = disable & 0xF; + } + else {/* TX_DISABLE1 ~ TX_DISABLE4*/ + if (disable) { + data->qsfp->status[1] |= (1 << (attr->index - TX_DISABLE1)); + } + else { + data->qsfp->status[1] &= ~(1 << (attr->index - TX_DISABLE1)); + } + } + + DEBUG_PRINT("index = (%d), status = (0x%x)", attr->index, data->qsfp->status[1]); + status = sfp_eeprom_write(data->client, SFF8436_TX_DISABLE_ADDR, &data->qsfp->status[1], sizeof(data->qsfp->status[1])); + if (unlikely(status < 0)) { + count = status; + } + + mutex_unlock(&data->update_lock); + return count; +} + +static ssize_t sfp_show_ddm_implemented(struct device *dev, struct device_attribute *da, + char *buf) +{ + int status; + char ddm; + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + status = sfp_is_port_present(client, data->port); + if (IS_ERR_VALUE(status)) { + return status; + } + + if (status == 0) { + /* port is not present */ + return -ENODEV; + } + + status = sfp_eeprom_read(client, SFF8472_DIAG_MON_TYPE_ADDR, &ddm, sizeof(ddm)); + if (unlikely(status < 0)) { + return status; + } + + return sprintf(buf, "%d\n", !!(ddm & SFF8472_DIAG_MON_TYPE_DDM_MASK)); +} + +/* Platform dependent +++ */ +static ssize_t sfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + u8 val = 0, index = 0; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct sfp_port_data *data = i2c_get_clientdata(client); + + DEBUG_PRINT("driver type = (%d)", data->driver_type); + if (data->driver_type == DRIVER_TYPE_QSFP) { + DEBUG_PRINT(""); + return qsfp_show_tx_rx_status(dev, da, buf); + } + + DEBUG_PRINT(""); + data = sfp_update_tx_rx_status(dev); + if (IS_ERR(data)) { + return PTR_ERR(data); + } + + if(attr->index == RX_LOS_ALL) { + int i = 0; + u8 values[6] = {0}; + + for (i = 0; i < ARRAY_SIZE(values); i++) { + values[i] = (u8)(data->msa->status[2] >> (i * 8)); + } + + /** Return values 1 -> 48 in order */ + return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x\n", + values[0], values[1], values[2], + values[3], values[4], values[5]); + } + + switch (attr->index) { + case TX_FAULT: + index = 0; + break; + case TX_DISABLE: + index = 1; + break; + case RX_LOS: + index = 2; + break; + default: + break; + } + + val = !!(data->msa->status[index] & BIT_INDEX(data->port)); + return sprintf(buf, "%d\n", val); +} +/* Platform dependent --- */ +static ssize_t sfp_eeprom_write(struct i2c_client *client, u8 command, const char *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int status, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + status = i2c_smbus_write_i2c_block_data(client, command, data_len, data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + return status; + } + + return data_len; +#else + int status, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_write_byte_data(client, command, *data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + return status; + } + + return 1; +#endif + + +} + +static ssize_t sfp_port_write(struct sfp_port_data *data, + const char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + return count; + } + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_write(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; +} + + +static ssize_t sfp_bin_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + int present; + struct sfp_port_data *data; + DEBUG_PRINT("%s(%d) offset = (%d), count = (%d)", off, count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + + present = sfp_is_port_present(data->client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + if (present == 0) { + /* port is not present */ + return -ENODEV; + } + + return sfp_port_write(data, buf, off, count); +} + +static ssize_t sfp_eeprom_read(struct i2c_client *client, u8 command, u8 *data, + int data_len) +{ +#if USE_I2C_BLOCK_READ + int status, retry = I2C_RW_RETRY_COUNT; + + if (data_len > I2C_SMBUS_BLOCK_MAX) { + data_len = I2C_SMBUS_BLOCK_MAX; + } + + while (retry) { + status = i2c_smbus_read_i2c_block_data(client, command, data_len, data); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + goto abort; + } + if (unlikely(status != data_len)) { + status = -EIO; + goto abort; + } + + //result = data_len; + +abort: + return status; +#else + int status, retry = I2C_RW_RETRY_COUNT; + + while (retry) { + status = i2c_smbus_read_byte_data(client, command); + if (unlikely(status < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + continue; + } + + break; + } + + if (unlikely(status < 0)) { + dev_dbg(&client->dev, "sfp read byte data failed, command(0x%2x), data(0x%2x)\r\n", command, status); + goto abort; + } + + *data = (u8)status; + status = 1; + +abort: + return status; +#endif +} + +static ssize_t sfp_port_read(struct sfp_port_data *data, + char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) { + DEBUG_PRINT("Count = 0, return"); + return count; + } + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->update_lock); + + while (count) { + ssize_t status; + + status = sfp_eeprom_read(data->client, off, buf, count); + if (status <= 0) { + if (retval == 0) { + retval = status; + } + break; + } + + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->update_lock); + return retval; + +} + +static ssize_t sfp_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + int present; + struct sfp_port_data *data; + DEBUG_PRINT("offset = (%d), count = (%d)", off, count); + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + + present = sfp_is_port_present(data->client, data->port); + if (IS_ERR_VALUE(present)) { + return present; + } + + if (present == 0) { + /* port is not present */ + return -ENODEV; + } + + return sfp_port_read(data, buf, off, count); +} + +static int sfp_sysfs_eeprom_init(struct kobject *kobj, struct bin_attribute *eeprom) +{ + int err; + + sysfs_bin_attr_init(eeprom); + eeprom->attr.name = EEPROM_NAME; + eeprom->attr.mode = S_IWUSR | S_IRUGO; + eeprom->read = sfp_bin_read; + eeprom->write = sfp_bin_write; + eeprom->size = EEPROM_SIZE; + + /* Create eeprom file */ + err = sysfs_create_bin_file(kobj, eeprom); + if (err) { + return err; + } + + return 0; +} + +static int sfp_sysfs_eeprom_cleanup(struct kobject *kobj, struct bin_attribute *eeprom) +{ + sysfs_remove_bin_file(kobj, eeprom); + return 0; +} + +static const struct attribute_group sfp_msa_group = { + .attrs = sfp_msa_attributes, +}; + +static int sfp_i2c_check_functionality(struct i2c_client *client) +{ +#if USE_I2C_BLOCK_READ + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK); +#else + return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA); +#endif +} + +static int sfp_msa_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct sfp_msa_data **data) +{ + int status; + struct sfp_msa_data *msa; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + msa = kzalloc(sizeof(struct sfp_msa_data), GFP_KERNEL); + if (!msa) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &sfp_msa_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &msa->eeprom.bin); + if (status) { + goto exit_remove; + } + + *data = msa; + dev_info(&client->dev, "sfp msa '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); +exit_free: + kfree(msa); +exit: + + return status; +} + +static const struct attribute_group sfp_ddm_group = { + .attrs = sfp_ddm_attributes, +}; + +static int sfp_ddm_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct sfp_ddm_data **data) +{ + int status; + struct sfp_ddm_data *ddm; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + ddm = kzalloc(sizeof(struct sfp_ddm_data), GFP_KERNEL); + if (!ddm) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &sfp_ddm_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &ddm->eeprom.bin); + if (status) { + goto exit_remove; + } + + *data = ddm; + dev_info(&client->dev, "sfp ddm '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &sfp_ddm_group); +exit_free: + kfree(ddm); +exit: + + return status; +} + +static const struct attribute_group qsfp_group = { + .attrs = qsfp_attributes, +}; + +static int qsfp_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, + struct qsfp_data **data) +{ + int status; + struct qsfp_data *qsfp; + + if (!sfp_i2c_check_functionality(client)) { + status = -EIO; + goto exit; + } + + qsfp = kzalloc(sizeof(struct qsfp_data), GFP_KERNEL); + if (!qsfp) { + status = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &qsfp_group); + if (status) { + goto exit_free; + } + + /* init eeprom */ + status = sfp_sysfs_eeprom_init(&client->dev.kobj, &qsfp->eeprom.bin); + if (status) { + goto exit_remove; + } + + /* Bring QSFPs out of reset */ + //cig_lpc_write(0x62, 0x15, 0x3F); + + *data = qsfp; + dev_info(&client->dev, "qsfp '%s'\n", client->name); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &qsfp_group); +exit_free: + kfree(qsfp); +exit: + + return status; +} + +/* Platform dependent +++ */ +static int sfp_device_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct sfp_port_data *data = NULL; + + data = kzalloc(sizeof(struct sfp_port_data), GFP_KERNEL); + if (!data) { + return -ENOMEM; + } + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->port = dev_id->driver_data; + data->client = client; + + if (dev_id->driver_data >= cs6436_56p_sfp1 && dev_id->driver_data <= cs6436_56p_sfp48) { + if (client->addr == SFP_EEPROM_A0_I2C_ADDR) { + data->driver_type = DRIVER_TYPE_SFP_MSA; + return sfp_msa_probe(client, dev_id, &data->msa); + } + else if (client->addr == SFP_EEPROM_A2_I2C_ADDR) { + data->driver_type = DRIVER_TYPE_SFP_DDM; + return sfp_ddm_probe(client, dev_id, &data->ddm); + } + } + else { /* cs6436_56p_sfp49 ~ cs6436_56p_sfp56 */ + if (client->addr == SFP_EEPROM_A0_I2C_ADDR) { + data->driver_type = DRIVER_TYPE_QSFP; + return qsfp_probe(client, dev_id, &data->qsfp); + } + } + + return -ENODEV; +} +/* Platform dependent --- */ + +static int sfp_msa_remove(struct i2c_client *client, struct sfp_msa_data *data) +{ + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); + kfree(data); + return 0; +} + +static int sfp_ddm_remove(struct i2c_client *client, struct sfp_ddm_data *data) +{ + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + sysfs_remove_group(&client->dev.kobj, &sfp_ddm_group); + kfree(data); + return 0; +} + +static int qfp_remove(struct i2c_client *client, struct qsfp_data *data) +{ + sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); + sysfs_remove_group(&client->dev.kobj, &qsfp_group); + kfree(data); + return 0; +} + +static int sfp_device_remove(struct i2c_client *client) +{ + struct sfp_port_data *data = i2c_get_clientdata(client); + + switch (data->driver_type) { + case DRIVER_TYPE_SFP_MSA: + return sfp_msa_remove(client, data->msa); + case DRIVER_TYPE_SFP_DDM: + return sfp_ddm_remove(client, data->ddm); + case DRIVER_TYPE_QSFP: + return qfp_remove(client, data->qsfp); + } + + return 0; +} + +/* Addresses scanned + */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static struct i2c_driver cs6436_56p_sfp_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = sfp_device_probe, + .remove = sfp_device_remove, + .id_table = sfp_device_id, + .address_list = normal_i2c, +}; + +module_i2c_driver(cs6436_56p_sfp_driver); + + +MODULE_AUTHOR("Zhang Peng "); +MODULE_DESCRIPTION("cs6436_56p_sfp driver"); +MODULE_LICENSE("GPL"); + diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/service/cs6436-platform-init.service b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/service/cs6436-platform-init.service new file mode 100755 index 00000000000..3936b54dee2 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/service/cs6436-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Cig CS6436-56P Platform initialization service +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/cig_cs6436_util.py install +ExecStop=/usr/local/bin/cig_cs6436_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/service/cs6436-platform-misc.service b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/service/cs6436-platform-misc.service new file mode 100755 index 00000000000..7ff410cbb3c --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/service/cs6436-platform-misc.service @@ -0,0 +1,15 @@ +[Unit] +Description=Cig CS6436-56P Platform miscellaneous service +After=cs6436-platform-init.service +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/cig_cs6436_misc.py +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/setup.py b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/setup.py new file mode 100755 index 00000000000..c17c10c8319 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/setup.py @@ -0,0 +1,15 @@ +#!/usr/bin/env python + +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='cs6436-56p', + version='1.0.0', + description='Module to initialize Cig CS6436-56P platforms', + + packages=['cs6436-56p'], + package_dir={'cs6436-56p': 'cs6436-56p/classes'}, + ) diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/utils/cig_cs6436_misc.py b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/utils/cig_cs6436_misc.py new file mode 100755 index 00000000000..08decef98ad --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/utils/cig_cs6436_misc.py @@ -0,0 +1,154 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Cambridge, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple +from threading import Thread + +DEBUG = False +i2c_prefix = '/sys/bus/i2c/devices/' +cs6436__prefix = '/sys/devices/platform/cs6436_56p_led/leds/' + +def my_log(txt): + if DEBUG == True: + print "[ROY]"+txt + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"5-005a", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"5-005b", 0) + ret3, log = log_os_system("ls "+cs6436__prefix+"cs6436_56p_led*", 0) + return not(ret1 or ret2 or ret3) + + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + + +def system_misc_polling(threadName,delay): + for count in range(1,5): + if device_exist() == False: + time.sleep(delay+3) + print "%s: %s, count=%d" % ( threadName, time.ctime(time.time()), count) + else: + break + + if count == 4: + return + + status, output = log_os_system("echo 1 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::sys/brightness", 1) + status, output = log_os_system("hwconfig -cfp 1", 1) + + while 1: + status, output = log_os_system("cat /sys/bus/i2c/devices/5-005a/psu_present", 1) + if status: + print "failed to check status for 5-005a/psu_present" + continue + + if output=='1': + log_os_system("echo 1 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::psu1/brightness", 1) + else: + log_os_system("echo 0 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::psu1/brightness", 1) + + status, output = log_os_system("cat /sys/bus/i2c/devices/5-005b/psu_present", 1) + if status: + print "failed to check status for 5-005b/psu_present" + continue + + if output=='1': + log_os_system("echo 1 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::psu2/brightness", 1) + else: + log_os_system("echo 0 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::psu2/brightness", 1) + + status, fan1 = log_os_system(" cat /sys/devices/platform/cs6436_56p_fan/fan1_fault",1) + if status: + print "failed to check status for cs6436_56p_fan/fan1_fault" + continue + + if fan1=='0': + log_os_system("echo 1 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::fan1/brightness", 1) + else: + log_os_system("echo 3 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::fan1/brightness", 1) + + status, fan2 = log_os_system(" cat /sys/devices/platform/cs6436_56p_fan/fan2_fault",1) + + if status: + print "failed to check status for cs6436_56p_fan/fan2_fault" + continue + + if fan2=='0': + log_os_system("echo 1 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::fan2/brightness", 1) + else: + log_os_system("echo 3 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::fan2/brightness", 1) + + status, fan3 = log_os_system(" cat /sys/devices/platform/cs6436_56p_fan/fan3_fault",1) + if status: + print "failed to check status for cs6436_56p_fan/fan3_fault" + continue + + if fan3=='0': + log_os_system("echo 1 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::fan3/brightness", 1) + else: + log_os_system("echo 3 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::fan3/brightness", 1) + + status, fan4 = log_os_system(" cat /sys/devices/platform/cs6436_56p_fan/fan4_fault",1) + if status: + print "failed to check status for cs6436_56p_fan/fan4_fault" + continue + + if fan4=='0': + log_os_system("echo 1 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::fan4/brightness", 1) + else: + log_os_system("echo 3 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::fan4/brightness", 1) + + status, fan5 = log_os_system(" cat /sys/devices/platform/cs6436_56p_fan/fan5_fault",1) + if status: + print "failed to check status for cs6436_56p_fan/fan5_fault" + continue + + if fan5=='0': + log_os_system("echo 1 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::fan5/brightness", 1) + else: + log_os_system("echo 3 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::fan5/brightness", 1) + + if fan1=='0' or fan2=='0' or fan3=='0' or fan4=='0' or fan5=='0': + log_os_system("echo 1 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::fan/brightness", 1) + else: + log_os_system("echo 3 > /sys/devices/platform/cs6436_56p_led/leds/cs6436_56p_led::fan/brightness", 1) + time.sleep(delay) + print "%s: %s" % ( threadName, time.ctime(time.time())) + return + +if __name__ == '__main__': + target=system_misc_polling("Thread-misc",3) + + + + diff --git a/platform/nephos/sonic-platform-modules-cig/cs6436-56p/utils/cig_cs6436_util.py b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/utils/cig_cs6436_util.py new file mode 100755 index 00000000000..2b64d2e107b --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/cs6436-56p/utils/cig_cs6436_util.py @@ -0,0 +1,538 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Cambridge, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +""" +Usage: %(scriptName)s [options] command object + +options: + -h | --help : this help message + -d | --debug : run with debug mode + -f | --force : ignore error during installation or clean +command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + sff : dump SFP eeprom + set : change board setting with fan|led|sfp +""" + +import os +import commands +import sys, getopt +import logging +import re +import time +from collections import namedtuple + + + + +PROJECT_NAME = 'cs6436_56p' +version = '0.1.0' +verbose = False +DEBUG = False +args = [] +ALL_DEVICE = {} +DEVICE_NO = {'led':9, 'fan':5, 'thermal':4, 'psu':2, 'sfp':56} +FORCE = 0 + +if DEBUG == True: + print sys.argv[0] + print 'ARGV :', sys.argv[1:] + + +def main(): + global DEBUG + global args + global FORCE + + if len(sys.argv)<2: + show_help() + + options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help', + 'debug', + 'force', + ]) + if DEBUG == True: + print options + print args + print len(sys.argv) + + for opt, arg in options: + if opt in ('-h', '--help'): + show_help() + elif opt in ('-d', '--debug'): + DEBUG = True + logging.basicConfig(level=logging.INFO) + elif opt in ('-f', '--force'): + FORCE = 1 + else: + logging.info('no option') + for arg in args: + if arg == 'install': + do_install() + elif arg == 'clean': + do_uninstall() + elif arg == 'show': + device_traversal() + elif arg == 'sff': + if len(args)!=2: + show_eeprom_help() + elif int(args[1]) ==0 or int(args[1]) > DEVICE_NO['sfp']: + show_eeprom_help() + else: + show_eeprom(args[1]) + return + elif arg == 'set': + if len(args)<3: + show_set_help() + else: + set_device(args[1:]) + return + else: + show_help() + + + return 0 + +def show_help(): + print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]} + sys.exit(0) + +def show_set_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print cmd +" [led|sfp|fan]" + print " use \""+ cmd + " led 0-4 \" to set led color" + print " use \""+ cmd + " fan 0-100\" to set fan duty percetage" + print " use \""+ cmd + " sfp 1-56 {0|1}\" to set sfp# tx_disable" + sys.exit(0) + +def show_eeprom_help(): + cmd = sys.argv[0].split("/")[-1]+ " " + args[0] + print " use \""+ cmd + " 1-56 \" to dump sfp# eeprom" + sys.exit(0) + +def my_log(txt): + if DEBUG == True: + print "[ROY]"+txt + return + +def log_os_system(cmd, show): + logging.info('Run :'+cmd) + status, output = commands.getstatusoutput(cmd) + my_log (cmd +"with result:" + str(status)) + my_log (" output:"+output) + if status: + logging.info('Failed :'+cmd) + if show: + print('Failed :'+cmd) + return status, output + +def driver_check(): + for count in range(1,5): + time.sleep(1) + ret, lsmod = log_os_system("lsmod| grep i2c_i801", 0) + if len(lsmod) > 2: + log_os_system("rmmod i2c_i801", 0) + break + + ret, lsmod = log_os_system("lsmod| grep i2c_designware_platform", 0) + if len(lsmod) > 2: + log_os_system("rmmod i2c_designware_platform", 0) + log_os_system("modprobe i2c-designware-platform", 0) + + ret, lsmod = log_os_system("lsmod| grep cig", 0) + logging.info('mods:'+lsmod) + if len(lsmod) ==0: + return False + return True + + + +kos = [ + 'depmod', + 'modprobe i2c_dev', + 'modprobe i2c_mux_pca954x force_deselect_on_exit=1', + 'modprobe x86-64-cig-cs6436-56p-cpld ' , + 'modprobe x86-64-cig-cs6436-56p-fan' , + 'modprobe x86-64-cig-cs6436-56p-psu' , + 'modprobe x86-64-cig-cs6436-56p-sfp' , + 'modprobe x86-64-cig-cs6436-56p-led' ] + +def driver_install(): + global FORCE + + for i in range(0,len(kos)): + if i == 3: + ret, board_type = log_os_system("cat /proc/cpuinfo | grep \"model name\" | cut -b 32-39 | head -n 1", 0) + if board_type=='i3-6100U': + kos[i] =kos[i] + 'board_id=1' + + status, output = log_os_system(kos[i], 1) + if status: + if FORCE == 0: + return status + return 0 + +def driver_uninstall(): + global FORCE + for i in range(0,len(kos)): + rm = kos[-(i+1)].replace("modprobe", "modprobe -rq") + rm = rm.replace("insmod", "rmmod") + status, output = log_os_system(rm, 1) + if status: + if FORCE == 0: + return status + return 0 + +led_prefix ='/sys/class/leds/'+PROJECT_NAME+'_led::' +hwmon_types = {'led': ['sys','fan','fan1','fan2','fan3','fan4','fan5','psu1','psu2']} +hwmon_nodes = {'led': ['brightness'] } +hwmon_prefix ={'led': led_prefix} + +i2c_prefix = '/sys/bus/i2c/devices/' +i2c_bus = {'thermal': ['4-0048','4-0049', '5-004a', '5-004b'] , + 'psu': ['5-005a','5-005b'], + 'sfp': ['-0050']} +i2c_nodes = {'thermal': ['hwmon/hwmon*/temp1_input'] , + 'psu': ['psu_present ', 'psu_power_good'] , + 'sfp': ['sfp_is_present ', 'sfp_tx_disable']} + +fan_prefix ='/sys/bus/platform/devices/'+PROJECT_NAME+'_fan' +fan_types = {'fan': ['fan1','fan2', 'fan3', 'fan4', 'fan5']} +fan_nodes = {'fan': ['state', 'front_speed_rpm', 'rear_speed_rpm', 'fault']} + + +sfp_map = [8,9,10,11,12,13,14,15,16, + 17,18,19,20,21,22,23,24,25,26, + 27,28,29,30,31,32,33,34,35,36, + 37,38,39,40,41,42,43,44,45,46, + 47,48,49,50,51,52,53,54,55,56, + 57,58,59,60,61,62,63] + +mknod =[ + 'echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-2/new_device', + 'echo pca9548 0x72 > /sys/bus/i2c/devices/i2c-2/new_device', + 'echo pca9548 0x73 > /sys/bus/i2c/devices/i2c-2/new_device', + 'echo pca9548 0x74 > /sys/bus/i2c/devices/i2c-2/new_device', + 'echo pca9548 0x75 > /sys/bus/i2c/devices/i2c-3/new_device', + 'echo pca9548 0x76 > /sys/bus/i2c/devices/i2c-3/new_device', + 'echo pca9548 0x77 > /sys/bus/i2c/devices/i2c-3/new_device', + 'echo lm75 0x48 > /sys/bus/i2c/devices/i2c-4/new_device', + 'echo lm75 0x49 > /sys/bus/i2c/devices/i2c-4/new_device', + 'echo lm75 0x4a > /sys/bus/i2c/devices/i2c-5/new_device', + 'echo lm75 0x4b > /sys/bus/i2c/devices/i2c-5/new_device', + 'echo cs6436_56p_psu1 0x5a > /sys/bus/i2c/devices/i2c-5/new_device', + 'echo cs6436_56p_psu2 0x5b > /sys/bus/i2c/devices/i2c-5/new_device', + 'echo cs6436_56p_psu1 0x52 > /sys/bus/i2c/devices/i2c-5/new_device', + 'echo cs6436_56p_psu2 0x53 > /sys/bus/i2c/devices/i2c-5/new_device', + 'echo 24c128 0x57 > /sys/bus/i2c/devices/i2c-7/new_device'] + + +def device_install(): + global FORCE + + for i in range(0,len(mknod)): + #for pca954x need times to built new i2c buses + if mknod[i].find('pca954') != -1: + time.sleep(1) + + status, output = log_os_system(mknod[i], 1) + if status: + print output + if FORCE == 0: + return status + + for i in range(0,len(sfp_map)): + status, output =log_os_system("echo cs6436_56p_sfp"+str(i+1)+" 0x50 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + + if i <= 47: + status, output =log_os_system("echo cs6436_56p_sfp"+str(i+1)+" 0x51 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + + return + +def device_uninstall(): + global FORCE + + for i in range(0,len(sfp_map)): + target = "/sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/delete_device" + status, output =log_os_system("echo 0x50 > "+ target, 1) + if status: + print output + if FORCE == 0: + return status + + nodelist = mknod + + for i in range(len(nodelist)): + target = nodelist[-(i+1)] + temp = target.split() + del temp[1] + temp[-1] = temp[-1].replace('new_device', 'delete_device') + status, output = log_os_system(" ".join(temp), 1) + if status: + print output + if FORCE == 0: + return status + + return + +def system_ready(): + if driver_check() == False: + return False + if not device_exist(): + return False + return True + +def do_install(): + print "Checking system...." + if driver_check() == False: + print "No driver, installing...." + status = driver_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" drivers detected...." + if not device_exist(): + print "No device, installing...." + status = device_install() + if status: + if FORCE == 0: + return status + else: + print PROJECT_NAME.upper()+" devices detected...." + return + +def do_uninstall(): + print "Checking system...." + if not device_exist(): + print PROJECT_NAME.upper() +" has no device installed...." + else: + print "Removing device...." + status = device_uninstall() + if status: + if FORCE == 0: + return status + + if driver_check()== False : + print PROJECT_NAME.upper() +" has no driver installed...." + else: + print "Removing installed driver...." + status = driver_uninstall() + if status: + if FORCE == 0: + return status + + return + +def devices_info(): + global DEVICE_NO + global ALL_DEVICE + global i2c_bus, hwmon_types, fan_types + for key in DEVICE_NO: + ALL_DEVICE[key]= {} + for i in range(0,DEVICE_NO[key]): + ALL_DEVICE[key][key+str(i+1)] = [] + + for key in i2c_bus: + buses = i2c_bus[key] + nodes = i2c_nodes[key] + for i in range(0,len(buses)): + for j in range(0,len(nodes)): + if 'sfp' == key: + for k in range(0,DEVICE_NO[key]): + node = key+str(k+1) + path = i2c_prefix+ str(sfp_map[k])+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + else: + node = key+str(i+1) + path = i2c_prefix+ buses[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][node].append(path) + + for key in hwmon_types: + itypes = hwmon_types[key] + nodes = hwmon_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = hwmon_prefix[key]+ itypes[i]+"/"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + for key in fan_types: + itypes = fan_types[key] + nodes = fan_nodes[key] + for i in range(0,len(itypes)): + for j in range(0,len(nodes)): + node = key+"_"+itypes[i] + path = fan_prefix+"/"+ itypes[i]+"_"+ nodes[j] + my_log(node+": "+ path) + ALL_DEVICE[key][ key+str(i+1)].append(path) + + #show dict all in the order + if DEBUG == True: + for i in sorted(ALL_DEVICE.keys()): + print(i+": ") + for j in sorted(ALL_DEVICE[i].keys()): + print(" "+j) + for k in (ALL_DEVICE[i][j]): + print(" "+" "+k) + return + +def show_eeprom(index): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + node = ALL_DEVICE['sfp'] ['sfp'+str(index)][0] + node = node.replace(node.split("/")[-1], 'sfp_eeprom') + # check if got hexdump command in current environment + ret, log = log_os_system("which hexdump", 0) + ret, log2 = log_os_system("which busybox hexdump", 0) + if len(log): + hex_cmd = 'hexdump' + elif len(log2): + hex_cmd = ' busybox hexdump' + else: + log = 'Failed : no hexdump cmd!!' + logging.info(log) + print log + return 1 + + print node + ":" + ret, log = log_os_system("cat "+node+"| "+hex_cmd+" -C", 1) + if ret==0: + print log + else: + print "**********device no found**********" + return + +def set_device(args): + global DEVICE_NO + global ALL_DEVICE + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + + if args[0]=='led': + if int(args[1])>4: + show_set_help() + return + #print ALL_DEVICE['led'] + for i in range(0,len(ALL_DEVICE['led'])): + for k in (ALL_DEVICE['led']['led'+str(i+1)]): + ret, log = log_os_system("echo "+args[1]+" >"+k, 1) + if ret: + return ret + elif args[0]=='fan': + if int(args[1])>100: + show_set_help() + return + #print ALL_DEVICE['fan'] + #fan1~6 is all fine, all fan share same setting + node = ALL_DEVICE['fan'] ['fan1'][0] + node = node.replace(node.split("/")[-1], 'fan_duty_cycle_percentage') + ret, log = log_os_system("cat "+ node, 1) + if ret==0: + print ("Previous fan duty: " + log.strip() +"%") + ret, log = log_os_system("echo "+args[1]+" >"+node, 1) + if ret==0: + print ("Current fan duty: " + args[1] +"%") + return ret + elif args[0]=='sfp': + if int(args[1])> DEVICE_NO[args[0]] or int(args[1])==0: + show_set_help() + return + if len(args)<2: + show_set_help() + return + + if int(args[2])>1: + show_set_help() + return + + #print ALL_DEVICE[args[0]] + for i in range(0,len(ALL_DEVICE[args[0]])): + for j in ALL_DEVICE[args[0]][args[0]+str(args[1])]: + if j.find('tx_disable')!= -1: + ret, log = log_os_system("echo "+args[2]+" >"+ j, 1) + if ret: + return ret + + return + +def get_value(input): + digit = re.findall('\d+', input) + return int(digit[0]) + +def device_traversal(): + if system_ready()==False: + print("System's not ready.") + print("Please install first!") + return + + if len(ALL_DEVICE)==0: + devices_info() + for i in sorted(ALL_DEVICE.keys()): + print("============================================") + print(i.upper()+": ") + print("============================================") + + for j in sorted(ALL_DEVICE[i].keys(), key=get_value): + print " "+j+":", + for k in (ALL_DEVICE[i][j]): + ret, log = log_os_system("cat "+k, 0) + func = k.split("/")[-1].strip() + func = re.sub(j+'_','',func,1) + func = re.sub(i.lower()+'_','',func,1) + if ret==0: + print func+"="+log+" ", + else: + print func+"="+"X"+" ", + print + print("----------------------------------------------------------------") + + + print + return + +def device_exist(): + ret1, log = log_os_system("ls "+i2c_prefix+"*0077", 0) + ret2, log = log_os_system("ls "+i2c_prefix+"i2c-3", 0) + return not(ret1 or ret2) + + +if __name__ == "__main__": + main() diff --git a/platform/nephos/sonic-platform-modules-cig/debian/changelog b/platform/nephos/sonic-platform-modules-cig/debian/changelog new file mode 100755 index 00000000000..7a4aa7996fd --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/debian/changelog @@ -0,0 +1,5 @@ +sonic-cig-platform-modules (1.0.0) unstable; urgency=low + + * Add support for CS6436-56P series + + -- developer Wed, 12 Sep 2018 10:00:00 +0800 diff --git a/platform/nephos/sonic-platform-modules-cig/debian/compat b/platform/nephos/sonic-platform-modules-cig/debian/compat new file mode 100755 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/nephos/sonic-platform-modules-cig/debian/control b/platform/nephos/sonic-platform-modules-cig/debian/control new file mode 100755 index 00000000000..356ce313ab6 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/debian/control @@ -0,0 +1,11 @@ +Source: sonic-cig-platform-modules +Section: main +Priority: extra +Maintainer: yanglijie@cigtech.com +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: sonic-platform-cig-cs6436-56p +Architecture: amd64 +Depends: linux-image-4.9.0-9-amd64 +Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/nephos/sonic-platform-modules-cig/debian/rules b/platform/nephos/sonic-platform-modules-cig/debian/rules new file mode 100755 index 00000000000..3192948cc08 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-cig/debian/rules @@ -0,0 +1,86 @@ +#!/usr/bin/make -f +# -*- makefile -*- +# Sample debian/rules that uses debhelper. +# This file was originally written by Joey Hess and Craig Small. +# As a special exception, when this file is copied by dh-make into a +# dh-make output file, you may use that output file without restriction. +# This special exception was added by Craig Small in version 0.37 of dh-make. + +include /usr/share/dpkg/pkg-info.mk + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + +export INSTALL_MOD_DIR:=extra + +PYTHON ?= python2 + +PACKAGE_PRE_NAME := sonic-platform-cig +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= cs6436-56p +MODULE_DIR := modules +UTILS_DIR := utils +SERVICE_DIR := service +CLASSES_DIR := classes +CONF_DIR := conf + +%: + dh $@ --with systemd,python2,python3 --buildsystem=pybuild + +clean: + dh_testdir + dh_testroot + dh_clean + +build: + #make modules -C $(KERNEL_SRC)/build M=$(MODULE_SRC) + (for mod in $(MODULE_DIRS); do \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + $(PYTHON) $${mod}/setup.py build; \ + done) + +binary: binary-arch binary-indep + # Nothing to do + +binary-arch: + # Nothing to do + +#install: build + #dh_testdir + #dh_testroot + #dh_clean -k + #dh_installdirs + +binary-indep: + dh_testdir + dh_installdirs + + # Custom package commands + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system; \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin/; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system/; \ + $(PYTHON) $${mod}/setup.py install --root=$(MOD_SRC_DIR)/debian/$(PACKAGE_PRE_NAME)-$${mod} --install-layout=deb; \ + done) + # Resuming debhelper scripts + dh_testroot + dh_install + dh_installchangelogs + dh_installdocs + dh_systemd_enable + dh_installinit + dh_systemd_start + dh_link + dh_fixperms + dh_compress + dh_strip + dh_installdeb + dh_gencontrol + dh_md5sums + dh_builddeb +.PHONY: build binary binary-arch binary-indep clean diff --git a/platform/nephos/sonic-platform-modules-ingrasys/.gitignore b/platform/nephos/sonic-platform-modules-ingrasys/.gitignore new file mode 100644 index 00000000000..c6127b38c1a --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/.gitignore @@ -0,0 +1,52 @@ +# Prerequisites +*.d + +# Object files +*.o +*.ko +*.obj +*.elf + +# Linker output +*.ilk +*.map +*.exp + +# Precompiled Headers +*.gch +*.pch + +# Libraries +*.lib +*.a +*.la +*.lo + +# Shared objects (inc. Windows DLLs) +*.dll +*.so +*.so.* +*.dylib + +# Executables +*.exe +*.out +*.app +*.i*86 +*.x86_64 +*.hex + +# Debug files +*.dSYM/ +*.su +*.idb +*.pdb + +# Kernel Module Compile Results +*.mod* +*.cmd +.tmp_versions/ +modules.order +Module.symvers +Mkfile.old +dkms.conf diff --git a/platform/nephos/sonic-platform-modules-ingrasys/LICENSE b/platform/nephos/sonic-platform-modules-ingrasys/LICENSE new file mode 100644 index 00000000000..9cecc1d4669 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/LICENSE @@ -0,0 +1,674 @@ + GNU GENERAL PUBLIC LICENSE + Version 3, 29 June 2007 + + Copyright (C) 2007 Free Software Foundation, Inc. + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The GNU General Public License is a free, copyleft license for +software and other kinds of works. + + The licenses for most software and other practical works are designed +to take away your freedom to share and change the works. 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Of course, your program's commands +might be different; for a GUI interface, you would use an "about box". + + You should also get your employer (if you work as a programmer) or school, +if any, to sign a "copyright disclaimer" for the program, if necessary. +For more information on this, and how to apply and follow the GNU GPL, see +. + + The GNU General Public License does not permit incorporating your program +into proprietary programs. If your program is a subroutine library, you +may consider it more useful to permit linking proprietary applications with +the library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. But first, please read +. diff --git a/platform/nephos/sonic-platform-modules-ingrasys/debian/changelog b/platform/nephos/sonic-platform-modules-ingrasys/debian/changelog new file mode 100644 index 00000000000..a3e3f92cc73 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/debian/changelog @@ -0,0 +1,11 @@ +platform-driver (1.0.0) unstable; urgency=low + + * Add support for S9130-32X, S9230-64X series + + -- developer Wed, 29 Mar 2017 11:00:00 +0800 + +platform-driver (1.0.0) unstable; urgency=low + + * Initial release (Closes: #nnnn) + + -- developer Wed, 05 Oct 2016 16:30:45 +0800 diff --git a/platform/nephos/sonic-platform-modules-ingrasys/debian/compat b/platform/nephos/sonic-platform-modules-ingrasys/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/nephos/sonic-platform-modules-ingrasys/debian/control b/platform/nephos/sonic-platform-modules-ingrasys/debian/control new file mode 100755 index 00000000000..3db0b5f3505 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/debian/control @@ -0,0 +1,15 @@ +Source: platform-driver +Section: unknown +Priority: optional +Maintainer: Wade He +Build-Depends: debhelper (>= 9), dh-systemd +Standards-Version: 1.0.0 + +Package: sonic-platform-ingrasys-s9130-32x +Architecture: amd64 +Description: This package contains S9130-32X platform driver utility for SONiC project. + +Package: sonic-platform-ingrasys-s9230-64x +Architecture: amd64 +Description: This package contains S9230-64X platform driver utility for SONiC project. + diff --git a/platform/nephos/sonic-platform-modules-ingrasys/debian/rules b/platform/nephos/sonic-platform-modules-ingrasys/debian/rules new file mode 100755 index 00000000000..f03e1de42c1 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/debian/rules @@ -0,0 +1,42 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +PACKAGE_PRE_NAME := sonic-platform-ingrasys +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= s9130-32x s9230-64x +MODULE_DIR := modules +UTILS_DIR := utils +SERVICE_DIR := service +CONF_DIR := conf + +%: + dh $@ --with systemd + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} \ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko \ + debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} usr/sbin; \ + cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/*.sh \ + debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/sbin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} lib/systemd/system; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service \ + debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system; \ + done) + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) + diff --git a/platform/nephos/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9130-32x.init b/platform/nephos/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9130-32x.init new file mode 100644 index 00000000000..a925faf45fa --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9130-32x.init @@ -0,0 +1,41 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup S9130-32X board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + + echo "done." + ;; + +stop) + + i2c_utils.sh i2c_deinit + + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/sonic-platform-ingrasys-s9130-32x.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/nephos/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9230-64x.init b/platform/nephos/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9230-64x.init new file mode 100644 index 00000000000..4389aee5f77 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/debian/sonic-platform-ingrasys-s9230-64x.init @@ -0,0 +1,41 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup S9230-64X board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + + depmod -a + + echo "done." + ;; + +stop) + + i2c_utils i2c_deinit + + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/sonic-platform-ingrasys-s9230-64x.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/README.md b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/README.md new file mode 100644 index 00000000000..1b3b14db343 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/README.md @@ -0,0 +1,167 @@ +# Ingrasys S9130-32X Platform Driver for SONiC + +Copyright (C) 2016 Ingrasys, Inc. + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + + +## Licensing terms + +The Licensing terms of the files within this project is split 2 parts. +The Linux kernel is released under the GNU General Public License version 2. +All other code is released under the GNU General Public License version 3. +Please see the LICENSE file for copies of both licenses. + +## Contents of this package + + - service/ + > Service config files for platform initialization and monitoring + - utils/ + > Scripts useful during platform bringup and sysfs function + - conf/ + > Platform configure files. + +## Kernel modules and drivers + +The driver for interacting with Ingrasys S9130-32X is contained in the I2C +kernel module and initialization script. The initialization script loads +the modules in the correct order. It has been built and tested against +the Linux 3.16 kernel. + +The initialization script will modprobe the needed modules, navigate to the +module's device directory in sysfs, and write configuration data to +the kernel module. + +### IGB + +This is OOB Ports on front panel for management plane. + +The IGB module must be loaded first on Ingrasys S9130-32X platform. + +### I2C i801 + +The I2C i801 on Ingrasys S9130-32X can be found in +`/sys/bus/i2c/devices/i2c-0/` + +This is I2C bus for power monitor, FAN controller, HWM and thermal sensors. + +### I2C PCA9548 +The PCA9548 module on S9130-32X can be found in +`/sys/bus/i2c/devices/i2c-1/` , `/sys/bus/i2c/devices/i2c-2/`, +`/sys/bus/i2c/devices/i2c-3/`, `/sys/bus/i2c/devices/i2c-4/`, +`/sys/bus/i2c/devices/i2c-5/`, `/sys/bus/i2c/devices/i2c-6/`, +`/sys/bus/i2c/devices/i2c-7/`, `/sys/bus/i2c/devices/i2c-8/` + +The pca9548 module for zQSFP module get/set functions, PSU information, +fan status and EEPROM. + +## Hardware components + +The hardware components are initialized in the init script on S9130-32X. +The following describes manual initialization as well as interaction. +The examples below are just for Ingrasys S9130-32X platform. + +### Hardware initialization + +When the sonic-platform-ingrasys-s9130-32x package is installed on the S9130-32X, +it is automatically initialized. If you want to manual initialization, the +utility command usage as follows: +``` + i2c_utils.sh i2c_init +``` + +### EEPROM + +The EEPROM is including the board SKU, model name, vendor name, serial number, +and other information can be accessed with the specific eeprom kernel module. +After using `modprobe eeprom_mb` to detect the eeprom, it will show up in sysfs. + +The hexdump utility can be used to decode the raw output of the EEPROM. +For example, +``` + bash# echo "mb_eeprom 0x51" > /sys/bus/i2c/devices/i2c-0/new_device + bash# cat /sys/bus/i2c/drivers/mb_eeprom/0-0051/eeprom | hexdump -C +``` + +### Front panel LEDs + +LEDs can be setup on/off by using i2c utility `/usr/sbin/i2c_utils.sh`. +Utility function command usage as follows: + +``` +Status LED: + i2c_utils.sh i2c_sys_led green|amber + +Fan status LED: + i2c_utils.sh i2c_fan_led green|amber on|off + +PSU1 status LED: + i2c_utils.sh i2c_psu1_led green|amber on|off + +PSU2 status LED: + i2c_utils.sh i2c_psu2_led green|amber on|off + +``` +QSFP Module Port LEDs control by ASIC library. + + +### Fan speed + +Fan speed are controlled by the w83795 kernel module. +It can be found in `/sys/class/hwmon/hwmon5/device/`. +If they were compiled as modules, you will need to modprobe w83795 for +their sysfs entries to show up. Each fan has an `fan_input` file +for reading the fan speed. And `pwm1` setting fan1 to fan4, +`pwm2` setting fan5 to fan8. + +There is docker-platform-monitor container installed fancontrol package that can +automatic control platform fan speed. + + +### Temperature sensors + +There is docker-platform-monitor container installed lm-sensors package that can +monitor platform temperature. And `sensors` command can show each +temperature sensors status. + +### Power supplies + +Power supplies status and its EEPROM info can be used i2c utility +`/usr/sbin/i2c_utils.sh` to get. +The usage as follows: +``` +PSU EEPROM: + i2c_utils.sh i2c_psu_eeprom_get + hexdump -C psu0.rom + hexdump -C psu1.rom + +PSU Status: + i2c_utils.sh i2c_psu_status +``` + +### QSFPs +QSFP modules are managed by the pca9548 kernel driver. +The i2c utility `/usr/sbin/i2c_utils.sh` can be used to get status and +module EEPROM informations. +The usage as follows: +``` +QSFP EEPROM: + i2c_utils.sh i2c_qsfp_eeprom_get [1-32] + +QSFP Insert Event: + i2c_utils.sh i2c_qsfp_eeprom_get [1-32] + 0 => not insert + 1 => inserted +``` + diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/modules/Makefile b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/modules/Makefile new file mode 100755 index 00000000000..688bb466644 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := eeprom_mb.o +obj-m += ingrasys_s9130_32x_psu.o diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/modules/eeprom_mb.c b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/modules/eeprom_mb.c new file mode 100755 index 00000000000..528864d9338 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/modules/eeprom_mb.c @@ -0,0 +1,267 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void mb_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t mb_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + mb_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t mb_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "mb_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute mb_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = mb_eeprom_read, + .write = mb_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int mb_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int mb_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &mb_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int mb_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &mb_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id mb_eeprom_id[] = { + { "mb_eeprom", 0 }, + { } +}; + +static struct i2c_driver mb_eeprom_driver = { + .driver = { + .name = "mb_eeprom", + }, + .probe = mb_eeprom_probe, + .remove = mb_eeprom_remove, + .id_table = mb_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = mb_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(mb_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("Ingrasys Mother Borad EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/modules/ingrasys_s9130_32x_platform.h b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/modules/ingrasys_s9130_32x_platform.h new file mode 100644 index 00000000000..23dcf17a855 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/modules/ingrasys_s9130_32x_platform.h @@ -0,0 +1,148 @@ +#ifndef _S9130_32X_PLATFORM_H +#define _S9130_32X_PLATFORM_H + +#include + +// remove debug before release +#define DEBUG + +enum bus_order { + I2C_BUS_MAIN, + MUX_9548_0_CH0, + MUX_9548_0_CH1, + MUX_9548_0_CH2, + MUX_9548_0_CH3, + MUX_9548_0_CH4, + MUX_9548_0_CH5, + MUX_9548_0_CH6, + MUX_9548_0_CH7, + MUX_9548_1_CH0, + MUX_9548_1_CH1, + MUX_9548_1_CH2, + MUX_9548_1_CH3, + MUX_9548_1_CH4, + MUX_9548_1_CH5, + MUX_9548_1_CH6, + MUX_9548_1_CH7, + MUX_9546_0_CH0, + MUX_9546_0_CH1, + MUX_9546_0_CH2, + MUX_9546_0_CH3, + MUX_9546_1_CH0, + MUX_9546_1_CH1, + MUX_9546_1_CH2, + MUX_9546_1_CH3, + MUX_9548_2_CH0, + MUX_9548_2_CH1, + MUX_9548_2_CH2, + MUX_9548_2_CH3, + MUX_9548_2_CH4, + MUX_9548_2_CH5, + MUX_9548_2_CH6, + MUX_9548_2_CH7, + MUX_9548_3_CH0, + MUX_9548_3_CH1, + MUX_9548_3_CH2, + MUX_9548_3_CH3, + MUX_9548_3_CH4, + MUX_9548_3_CH5, + MUX_9548_3_CH6, + MUX_9548_3_CH7, + MUX_9548_4_CH0, + MUX_9548_4_CH1, + MUX_9548_4_CH2, + MUX_9548_4_CH3, + MUX_9548_4_CH4, + MUX_9548_4_CH5, + MUX_9548_4_CH6, + MUX_9548_4_CH7, + MUX_9548_5_CH0, + MUX_9548_5_CH1, + MUX_9548_5_CH2, + MUX_9548_5_CH3, + MUX_9548_5_CH4, + MUX_9548_5_CH5, + MUX_9548_5_CH6, + MUX_9548_5_CH7, + MUX_9548_6_CH0, + MUX_9548_6_CH1, + MUX_9548_6_CH2, + MUX_9548_6_CH3, + MUX_9548_6_CH4, + MUX_9548_6_CH5, + MUX_9548_6_CH6, + MUX_9548_6_CH7, + MUX_9548_7_CH0, + MUX_9548_7_CH1, + MUX_9548_7_CH2, + MUX_9548_7_CH3, + MUX_9548_7_CH4, + MUX_9548_7_CH5, + MUX_9548_7_CH6, + MUX_9548_7_CH7, + MUX_9548_8_CH0, + MUX_9548_8_CH1, + MUX_9548_8_CH2, + MUX_9548_8_CH3, + MUX_9548_8_CH4, + MUX_9548_8_CH5, + MUX_9548_8_CH6, + MUX_9548_8_CH7, + MUX_9548_9_CH0, + MUX_9548_9_CH1, + MUX_9548_9_CH2, + MUX_9548_9_CH3, + MUX_9548_9_CH4, + MUX_9548_9_CH5, + MUX_9548_9_CH6, + MUX_9548_9_CH7, + MUX_9548_10_CH0, + MUX_9548_10_CH1, + MUX_9548_10_CH2, + MUX_9548_10_CH3, + MUX_9548_10_CH4, + MUX_9548_10_CH5, + MUX_9548_10_CH6, + MUX_9548_10_CH7, +}; + +#define I2C_ADDR_MUX_9555_0 (0x20) +#define I2C_ADDR_MUX_9555_1 (0x24) +#define I2C_ADDR_MUX_9555_2 (0x25) +#define I2C_ADDR_MUX_9555_3 (0x26) +#define I2C_ADDR_MUX_9539_0 (0x76) +#define I2C_ADDR_MUX_9539_1 (0x76) +#define I2C_BUS_FAN_STATUS (I2C_BUS_MAIN) +#define I2C_BUS_SYS_LED (MUX_9548_1_CH1) + +#define NUM_OF_I2C_MUX (11) +#define NUM_OF_CPLD (5) +#define NUM_OF_QSFP_PORT (64) +#define NUM_OF_SFP_PORT (2) +#define QSFP_EEPROM_I2C_ADDR (0x50) + +enum gpio_reg { + REG_PORT0_IN, + REG_PORT1_IN, + REG_PORT0_OUT, + REG_PORT1_OUT, + REG_PORT0_POL, + REG_PORT1_POL, + REG_PORT0_DIR, + REG_PORT1_DIR, +}; + +struct ing_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +struct i2c_init_data { + __u16 ch; + __u16 addr; + __u8 reg; + __u8 value; +}; + +#endif diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/modules/ingrasys_s9130_32x_psu.c b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/modules/ingrasys_s9130_32x_psu.c new file mode 100644 index 00000000000..edf92b67241 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/modules/ingrasys_s9130_32x_psu.c @@ -0,0 +1,388 @@ +/* + * S9130-32x PSU driver + * + * Copyright (C) 2017 Ingrasys, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "ingrasys_s9130_32x_platform.h" + +static ssize_t show_psu_eeprom(struct device *dev, + struct device_attribute *da, + char *buf); +static struct s9130_psu_data *s9130_psu_update_status(struct device *dev); +static struct s9130_psu_data *s9130_psu_update_eeprom(struct device *dev); +static int s9130_psu_read_block(struct i2c_client *client, + u8 command, + u8 *data, + int data_len); + + +#define DRIVER_NAME "psu" + +// Addresses scanned +static const unsigned short normal_i2c[] = { 0x50, I2C_CLIENT_END }; + +/* PSU EEPROM SIZE */ +#define EEPROM_SZ 256 +#define READ_EEPROM 1 +#define NREAD_EEPROM 0 + +static struct i2c_client pca9555_client; + +/* pca9555 gpio pin mapping */ +#define PSU2_PWROK 0 +#define PSU2_PRSNT_L 1 +#define PSU2_PWRON_L 2 +#define PSU1_PWROK 3 +#define PSU1_PRSNT_L 4 +#define PSU1_PWRON_L 5 +#define TMP_75_INT_L 6 + +/* Driver Private Data */ +struct s9130_psu_data { + struct mutex lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + s32 status; /* IO expander value */ + char eeprom[EEPROM_SZ]; /* psu eeprom data */ + char psuABS; /* PSU absent */ + char psuPG; /* PSU power good */ +}; + +enum psu_index +{ + s9130_psu1, + s9130_psu2 +}; + +/* + * display power good attribute + */ +static ssize_t +show_psu_pg(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct s9130_psu_data *data = s9130_psu_update_status(dev); + unsigned int value; + + mutex_lock(&data->lock); + value = data->psuPG; + mutex_unlock(&data->lock); + + return sprintf(buf, "%d\n", value); +} + +/* + * display power absent attribute + */ +static ssize_t +show_psu_abs(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct s9130_psu_data *data = s9130_psu_update_status(dev); + unsigned int value; + + mutex_lock(&data->lock); + value = data->psuABS; + mutex_unlock(&data->lock); + + return sprintf(buf, "%d\n", value); +} + + +/* + * sysfs attributes for psu + */ +static DEVICE_ATTR(psu_pg, S_IRUGO, show_psu_pg, NULL); +static DEVICE_ATTR(psu_abs, S_IRUGO, show_psu_abs, NULL); +static DEVICE_ATTR(psu_eeprom, S_IRUGO, show_psu_eeprom, NULL); + +static struct attribute *s9130_psu_attributes[] = { + &dev_attr_psu_pg.attr, + &dev_attr_psu_abs.attr, + &dev_attr_psu_eeprom.attr, + NULL +}; + +/* + * display psu eeprom content + */ +static ssize_t +show_psu_eeprom(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct s9130_psu_data *data = s9130_psu_update_eeprom(dev); + + memcpy(buf, (char *)data->eeprom, EEPROM_SZ); + return EEPROM_SZ; +} + +static const struct attribute_group s9130_psu_group = { + .attrs = s9130_psu_attributes, +}; + +/* + * check gpio expander is accessible + */ +static int +pca9555_detect(struct i2c_client *client) +{ + if (i2c_smbus_read_byte_data(client, REG_PORT0_DIR) < 0) { + return -ENODEV; + } + + return 0; +} + +/* + * client address init + */ +static void +i2c_devices_client_address_init(struct i2c_client *client) +{ + pca9555_client = *client; + pca9555_client.addr = 0x25; +} + +static int +s9130_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct s9130_psu_data *data; + int status, err; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct s9130_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + memset(data, 0, sizeof(struct s9130_psu_data)); + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->lock); + + i2c_devices_client_address_init(client); + + err = pca9555_detect(&pca9555_client); + if (err) { + return err; + } + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &s9130_psu_group); + if (status) { + goto exit_free; + } + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &s9130_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int +s9130_psu_remove(struct i2c_client *client) +{ + struct s9130_psu_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &s9130_psu_group); + kfree(data); + + return 0; +} + + +/* + * psu eeprom read utility + */ +static int +s9130_psu_read_block(struct i2c_client *client, + u8 command, + u8 *data, + int data_len) +{ + int i=0, ret=0; + int blk_max = 32; //max block read size + + /* read eeprom, 32 * 8 = 256 bytes */ + for (i=0; i < EEPROM_SZ/blk_max; i++) { + ret = i2c_smbus_read_i2c_block_data(client, (i*blk_max), blk_max, + data + (i*blk_max)); + if (ret < 0) { + return ret; + } + } + return ret; +} + +/* + * update eeprom content + */ +static struct s9130_psu_data +*s9130_psu_update_eeprom(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct s9130_psu_data *data = i2c_get_clientdata(client); + s32 status = 0; + int psu_pwrok = 0; + int psu_prsnt_l = 0; + + mutex_lock(&data->lock); + + if (time_after(jiffies, data->last_updated + 300 * HZ) + || !data->valid) { + + /* Read psu status */ + + status = i2c_smbus_read_word_data(&(pca9555_client), REG_PORT0_IN); + data->status = status; + + /*read psu status from io expander*/ + + if (data->index == s9130_psu1) { + psu_pwrok = PSU1_PWROK; + psu_prsnt_l = PSU1_PRSNT_L; + } else { + psu_pwrok = PSU2_PWROK; + psu_prsnt_l = PSU2_PRSNT_L; + } + data->psuPG = (status >> psu_pwrok) & 0x1; + data->psuABS = (status >> psu_prsnt_l) & 0x1; + + /* Read eeprom */ + if (!data->psuABS) { + //clear local eeprom data + memset(data->eeprom, 0, EEPROM_SZ); + + //read eeprom + status = s9130_psu_read_block(client, 0, data->eeprom, + ARRAY_SIZE(data->eeprom)); + + if (status < 0) { + memset(data->eeprom, 0, EEPROM_SZ); + dev_err(&client->dev, "Read eeprom failed, status=(%d)\n", status); + } else { + data->valid = 1; + } + } else { + memset(data->eeprom, 0, EEPROM_SZ); + } + data->last_updated = jiffies; + } + + mutex_unlock(&data->lock); + + return data; +} + +/* + * update psu status + */ +static struct s9130_psu_data +*s9130_psu_update_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct s9130_psu_data *data = i2c_get_clientdata(client); + s32 status = 0; + int psu_pwrok = 0; + int psu_prsnt_l = 0; + + mutex_lock(&data->lock); + + /* Read psu status */ + + status = i2c_smbus_read_word_data(&(pca9555_client), REG_PORT0_IN); + data->status = status; + + /*read psu status from io expander*/ + + if (data->index == s9130_psu1) { + psu_pwrok = PSU1_PWROK; + psu_prsnt_l = PSU1_PRSNT_L; + } else { + psu_pwrok = PSU2_PWROK; + psu_prsnt_l = PSU2_PRSNT_L; + } + data->psuPG = (status >> psu_pwrok) & 0x1; + data->psuABS = (status >> psu_prsnt_l) & 0x1; + + mutex_unlock(&data->lock); + + return data; +} + +static const struct i2c_device_id s9130_psu_id[] = { + { "psu1", s9130_psu1 }, + { "psu2", s9130_psu2 }, + {} +}; + +MODULE_DEVICE_TABLE(i2c, s9130_psu_id); + +static struct i2c_driver s9130_psu_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = s9130_psu_probe, + .remove = s9130_psu_remove, + .id_table = s9130_psu_id, + .address_list = normal_i2c, +}; + +static int __init s9130_psu_init(void) +{ + return i2c_add_driver(&s9130_psu_driver); +} + +static void __exit s9130_psu_exit(void) +{ + i2c_del_driver(&s9130_psu_driver); +} + +module_init(s9130_psu_init); +module_exit(s9130_psu_exit); + +MODULE_AUTHOR("Jason Tsai "); +MODULE_DESCRIPTION("S9130-32X psu driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/service/qsfp-monitor.service b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/service/qsfp-monitor.service new file mode 100644 index 00000000000..10b48f648b9 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/service/qsfp-monitor.service @@ -0,0 +1,15 @@ +[Unit] +Description= This QSFP Monitor service is to setup QSFP SI. +Requires=s9130-32x-monitor.service +After=s9130-32x-monitor.service + +[Service] +ExecStart=/usr/sbin/qsfp_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/service/s9130-32x-monitor.service b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/service/s9130-32x-monitor.service new file mode 100644 index 00000000000..3163b0af6f1 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/service/s9130-32x-monitor.service @@ -0,0 +1,19 @@ +[Unit] +Description= This Platform Monitor service is to initialize platform and monitor platform. +Before=platform-monitor.service +After=sysinit.target +Wants=fancontrol.service +Wants=qsfp-monitor.service +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/sbin/i2c_utils.sh i2c_init +ExecStart=/usr/sbin/s9130_32x_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/utils/i2c_utils.sh b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/utils/i2c_utils.sh new file mode 100755 index 00000000000..ea238e01729 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/utils/i2c_utils.sh @@ -0,0 +1,1720 @@ +#!/bin/bash + +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# trun on for more debug output +#DEBUG="on" + +VERSION="1.1.0" +TRUE=200 +FALSE=404 + +EXEC_FUNC=${1} +COLOR_LED=${2} +QSFP_PORT=${2} +QSFP_ACTION=${2} +MB_EEPROM_ACTION=${2} +ONOFF_LED=${3} +FAN_TRAY=${4} + +############################################################ +# Distributor ID: Debian +# Description: Debian GNU/Linux 8.6 (jessie) +# Release: 8.6 +# Codename: jessie +# Linux debian 3.16.0-4-amd64 #1 +# SMP Debian 3.16.36-1+deb8u1 (2016-09-03) x86_64 GNU/Linux +############################################################ + +# Color Definition +COLOR_TITLE="\e[1;32m" ### Green ### +COLOR_WARNING="\e[1;33m" ### Yellow ### +COLOR_ERROR="\e[1;31m" ### Red ### +COLOR_END="\e[0m" ### END ### + +NUM_I801_DEVICE=0 + +# MAIN MUX PCA9548#0 0x73 +NUM_MUX_9548_0_CH0=$(( ${NUM_I801_DEVICE} + 1 )) # ucd9090 0x34 +NUM_MUX_9548_0_CH1=$(( ${NUM_I801_DEVICE} + 2 )) # PCA9539 0x76 for fp LED & HW ID +NUM_MUX_9548_0_CH7=$(( ${NUM_I801_DEVICE} + 8 )) # W83795 0x2F + +# FRU MUX PCA9545#1 0x72 +NUM_MUX_9545_1_CH0=$(( ${NUM_I801_DEVICE} + 9 )) # PSU2 0x50 +NUM_MUX_9545_1_CH1=$(( ${NUM_I801_DEVICE} + 10 )) # PSU1 0x50 +NUM_MUX_9545_1_CH2=$(( ${NUM_I801_DEVICE} + 11 )) # FAN board IO exander 0x20 +NUM_MUX_9545_1_CH3=$(( ${NUM_I801_DEVICE} + 12 )) # TMP75#0 0x4C TMP75#1 0x49 + +# HOST MUX PCA9548#2 0X70 +NUM_MUX_9548_2_CH0=$(( ${NUM_I801_DEVICE} + 13 )) # PCA9548#3 0x71 +NUM_MUX_9548_2_CH1=$(( ${NUM_I801_DEVICE} + 14 )) # PCA9548#4 0x71 +NUM_MUX_9548_2_CH2=$(( ${NUM_I801_DEVICE} + 15 )) # PCA9548#5 0x71 +NUM_MUX_9548_2_CH3=$(( ${NUM_I801_DEVICE} + 16 )) # PCA9548#6 0x71 +NUM_MUX_9548_2_CH4=$(( ${NUM_I801_DEVICE} + 17 )) # PCA9535#3~6 0x20~0x23 ZQSFP ABS/INT +NUM_MUX_9548_2_CH5=$(( ${NUM_I801_DEVICE} + 18 )) # PCA9535#7~10 0x20~0x23 ZQSFP LPMODE/RST +NUM_MUX_9548_3_CH0=$(( ${NUM_I801_DEVICE} + 21 )) # QSFP 0 EEPROM +NUM_MUX_9548_4_CH0=$(( ${NUM_I801_DEVICE} + 29 )) # QSFP 8 EEPROM +NUM_MUX_9548_5_CH0=$(( ${NUM_I801_DEVICE} + 37 )) # QSFP 16 EEPROM +NUM_MUX_9548_6_CH0=$(( ${NUM_I801_DEVICE} + 45 )) # QSFP 24 EEPROM + +# MUX Alias +I2C_BUS_MAIN=${NUM_I801_DEVICE} +I2C_BUS_HWM=${NUM_MUX_9548_0_CH7} +I2C_BUS_FAN_STATUS=${NUM_MUX_9545_1_CH2} +I2C_BUS_SYS_LED=${NUM_MUX_9548_0_CH1} +I2C_BUS_HW_ID=${NUM_MUX_9548_0_CH1} +I2C_BUS_BMC_HW_ID=${I2C_BUS_MAIN} +I2C_BUS_PSU_STAT=${I2C_BUS_MAIN} +I2C_BUS_FANTRAY_LED=${NUM_MUX_9545_1_CH2} +I2C_BUS_MB_EEPROM=${I2C_BUS_MAIN} +I2C_BUS_CB_EEPROM=${I2C_BUS_MAIN} +I2C_BUS_PSU1_EEPROM=${NUM_MUX_9545_1_CH1} +I2C_BUS_PSU2_EEPROM=${NUM_MUX_9545_1_CH0} + +PATH_SYS_I2C_DEVICES="/sys/bus/i2c/devices" +PATH_SYS_GPIO="/sys/class/gpio" +PATH_HWMON_ROOT_DEVICES="/sys/class/hwmon" +PATH_HWMON_W83795_DEVICE="${PATH_HWMON_ROOT_DEVICES}/hwmon5" +PATH_I801_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_I801_DEVICE}" +PATH_MUX_9548_0_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH0}" +PATH_MUX_9548_0_CH1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH1}" +PATH_MUX_9548_0_CH7="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH7}" +PATH_MUX_9545_1_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9545_1_CH0}" +PATH_MUX_9545_1_CH1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9545_1_CH1}" +PATH_MUX_9545_1_CH2="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9545_1_CH2}" +PATH_MUX_9545_1_CH3="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9545_1_CH3}" +PATH_MUX_9548_2_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH0}" +PATH_MUX_9548_2_CH1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH1}" +PATH_MUX_9548_2_CH2="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH2}" +PATH_MUX_9548_2_CH3="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH3}" +PATH_MUX_9548_2_CH4="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH4}" +PATH_MUX_9548_2_CH5="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH5}" +PATH_MUX_9548_3_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_3_CH0}" +PATH_MUX_9548_4_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_4_CH0}" +PATH_MUX_9548_5_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_5_CH0}" +PATH_MUX_9548_6_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_6_CH0}" + +# I2C Address +### I2C MUX +I2C_ADDR_MUX_9548_0=0x73 # MAIN MUX +I2C_ADDR_MUX_9545_1=0x72 # FRU MUX +I2C_ADDR_MUX_9548_2=0x70 # HOST MUX +I2C_ADDR_MUX_9548_3=0x71 # ZQSFP MUX #1 EEPROM +I2C_ADDR_MUX_9548_4=0x71 # ZQSFP MUX #2 EEPROM +I2C_ADDR_MUX_9548_5=0x71 # ZQSFP MUX #3 EEPROM +I2C_ADDR_MUX_9548_6=0x71 # ZQSFP MUX #4 EEPROM +### GPIO Expander +I2C_ADDR_MUX_9539_0=0x76 # LED & HW ID +I2C_ADDR_MUX_9539_1=0x75 # BMC PRSNT & HWM reset +I2C_ADDR_MUX_9539_2=0x74 # SYS SEL & RST +I2C_ADDR_MUX_9535_3=0x20 # ZQSFP0~15 ABS +I2C_ADDR_MUX_9535_4=0x21 # ZQSFP16~31 ABS +I2C_ADDR_MUX_9535_5=0x22 # ZQSFP0~15 INT +I2C_ADDR_MUX_9535_6=0x23 # ZQSFP16~31 INT +I2C_ADDR_MUX_9535_7=0x20 # ZQSFP0~15 LPMODE +I2C_ADDR_MUX_9535_8=0x21 # ZQSFP16~31 LPMODE +I2C_ADDR_MUX_9535_9=0x22 # ZQSFP0~15 RST +I2C_ADDR_MUX_9535_10=0x23 # ZQSFP16~31 RST +I2C_ADDR_MUX_9535_11=0x20 # on FAN board, fan status and led config +I2C_ADDR_MUX_9555_12=0x24 # on BMC board, INT and HW ID +I2C_ADDR_MUX_9555_13=0x25 # on BMC board, PSU status +I2C_ADDR_MUX_9555_14=0x26 # on BMC board, RST and SEL +I2C_ADDR_MUX_9539_15=0x77 # on CPU board, STATUS and ERR from CPLD +### peripheral +I2C_ADDR_MB_EEPROM=0x55 # on main board +I2C_ADDR_CB_EEPROM=0x51 # on cpu board +I2C_ADDR_UCD9090=0x34 +I2C_ADDR_W83795=0x2F +I2C_ADDR_PSU1_EEPROM=0x50 +I2C_ADDR_PSU2_EEPROM=0x50 +I2C_ADDR_TMP75_REAR=0x4C +I2C_ADDR_TMP75_FRONT=0x49 +I2C_ADDR_TMP75_CB=0x4F # on cpu board +I2C_ADDR_TMP75_BB=0x4A # on bmc board +I2C_ADDR_QSFP_EEPROM=0x50 + +#sysfs +PATH_SYSFS_PSU1="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_PSU1_EEPROM}-$(printf "%04x" $I2C_ADDR_PSU1_EEPROM)" +PATH_SYSFS_PSU2="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_PSU2_EEPROM}-$(printf "%04x" $I2C_ADDR_PSU2_EEPROM)" + +#ACTIVE LOW enable flag +ACTIVE_LOW_EN=1 +ACTIVE_HIGH_EN=0 +#GPIO Direction In/Out +DIR_IN=in +DIR_OUT=out + +#Power Supply Status +PSU_DC_ON=1 +PSU_DC_OFF=0 +PSU_EXIST=1 +PSU_NOT_EXIST=0 + +# IO expander register +# direction +REG_PORT0_DIR=6 +REG_PORT1_DIR=7 +# polarity +REG_PORT0_POL=4 +REG_PORT1_POL=5 +# output +REG_PORT0_OUT=2 +REG_PORT1_OUT=3 +# input +REG_PORT0_IN=0 +REG_PORT1_IN=1 + +#ZQSFP GPIO sysfs index +ZQSFP_PORT0_ABS_GPIO_IDX=240 # 240~255 +ZQSFP_PORT16_ABS_GPIO_IDX=224 # 224~239 + +# switch port number range +MIN_PORT_NUM=1 +MAX_PORT_NUM=32 + +#GPIO Offset +GPIO_OFFSET=0 + +# Help usage function +function _help { + echo "=========================================================" + echo "# Description: Help Function" + echo "# Version : ${VERSION}" + echo "=========================================================" + echo "----------------------------------------------------" + echo "EX : ${0} help" + echo " : ${0} i2c_init" + echo " : ${0} i2c_deinit" + echo " : ${0} i2c_fan_speed_init" + echo " : ${0} i2c_io_exp_init" + echo " : ${0} i2c_gpio_init" + echo " : ${0} i2c_gpio_deinit" + echo " : ${0} i2c_led_test" + echo " : ${0} i2c_psu_eeprom_get" + echo " : ${0} i2c_mb_eeprom_get" + echo " : ${0} i2c_cb_eeprom_get" + echo " : ${0} i2c_eeprom_sync" + echo " : ${0} i2c_qsfp_eeprom_get [1-32]" + echo " : ${0} i2c_qsfp_eeprom_init new|delete" + echo " : ${0} i2c_mb_eeprom_init new|delete" + echo " : ${0} i2c_cb_eeprom_init new|delete" + echo " : ${0} i2c_qsfp_status_get [1-32]" + echo " : ${0} i2c_qsfp_type_get [1-32]" + echo " : ${0} i2c_board_type_get" + echo " : ${0} i2c_bmc_board_type_get" + echo " : ${0} i2c_psu_status" + echo " : ${0} i2c_led_psu_status_set" + echo " : ${0} i2c_led_fan_status_set" + echo " : ${0} i2c_led_fan_tray_status_set" + echo " : ${0} i2c_test_all" + echo " : ${0} i2c_sys_led green|amber" + echo " : ${0} i2c_fan_led green|amber on|off" + echo " : ${0} i2c_psu1_led green|amber on|off" + echo " : ${0} i2c_psu2_led green|amber on|off" + echo " : ${0} i2c_fan_tray_led green|amber on|off [1-4]" + echo "----------------------------------------------------" +} + +#Pause function +function _pause { + read -p "$*" +} + +#Retry command function +function _retry { + local i + for i in {1..5}; + do + eval "${*}" && break || echo "retry"; sleep 1; + done +} + +#I2C Init +function _i2c_init { + echo "=========================================================" + echo "# Description: I2C Init" + echo "=========================================================" + + #rmmod i2c_ismt + _util_rmmod i2c_i801 + modprobe i2c_i801 disable_features=0x10 + modprobe i2c_dev + modprobe i2c_mux_pca954x force_deselect_on_exit=1 + + # add MUX PCA9548#0 on I801, assume to be i2c-1~8 + if [ ! -e ${PATH_MUX_9548_0_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_0}' > ${PATH_I801_DEVICE}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_0} already init." + fi + # add MUX PCA9545#1 on I801, assume to be i2c-9~12 + if [ ! -e ${PATH_MUX_9545_1_CH0} ]; then + _retry "echo 'pca9545 ${I2C_ADDR_MUX_9545_1}' > ${PATH_I801_DEVICE}/new_device" + else + echo "pca9545 ${I2C_ADDR_MUX_9545_1} already init." + fi + # add MUX PCA9548#2 on I801, assume to be i2c-13~20 + if [ ! -e ${PATH_MUX_9548_2_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_2}' > ${PATH_I801_DEVICE}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_2} already init." + fi + # add MUX PCA9548#3 on PCA9548#2 CH0, assume to be i2c-21~28 + if [ ! -e ${PATH_MUX_9548_3_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_3}' > ${PATH_MUX_9548_2_CH0}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_3} already init." + fi + # add MUX PCA9548#4 on PCA9548#2 CH1, assume to be i2c-29~36 + if [ ! -e ${PATH_MUX_9548_4_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_4}' > ${PATH_MUX_9548_2_CH1}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_4} already init." + fi + # add MUX PCA9548#5 on PCA9548#2 CH2, assume to be i2c-37~44 + if [ ! -e ${PATH_MUX_9548_5_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_5}' > ${PATH_MUX_9548_2_CH2}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_5} already init." + fi + # add MUX PCA9548#6 on PCA9548#2 CH3, assume to be i2c-45~52 + if [ ! -e ${PATH_MUX_9548_6_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_6}' > ${PATH_MUX_9548_2_CH3}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_6} already init." + fi + + _i2c_hwm_init + _util_rmmod eeprom + modprobe eeprom_mb + modprobe gpio-pca953x + _i2c_io_exp_init + rmmod gpio_ich + _i2c_gpio_init + modprobe gpio_ich + _i2c_sensors_init + _i2c_psu_init + + # Init LED_CLR register (pull shift register out of reset), should be after io exp init + _port_led_clr_init + _i2c_qsfp_eeprom_init "new" + _i2c_mb_eeprom_init "new" + _i2c_cb_eeprom_init "new" + _i2c_fan_speed_init + _i2c_led_psu_status_set + _i2c_led_fan_status_set + + # sync eeprom content + _i2c_eeprom_sync + + # trun on sys led + echo "led_sys setup..." + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_sys_led + + _config_rmem +} + +#I2C Deinit +function _i2c_deinit { + echo "i2c deinit..." + _i2c_gpio_deinit + for mod in coretemp jc42 w83795 eeprom eeprom_mb gpio-pca953x i2c_mux_pca954x i2c_i801 ingrasys_s9130_32x_psu; + do + _util_rmmod $mod + done + echo "Done" +} + +function _i2c_sensors_init { + echo "SENSORS init..." + local dev_path + # to make sure hwmon index in sysfs as expected, + # need to remove kernel module and then probe them in expected order + # remove all sensors kernel module + _util_rmmod coretemp + _util_rmmod jc42 + _util_rmmod w83795 + # probe coretemp kernel module + modprobe coretemp + # probe hwmon kernel module + modprobe w83795 + # add tmp75 to sysfs + ####Main board thermal + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9545_1_CH3}-$(printf "%04x" ${I2C_ADDR_TMP75_REAR})" + if ! [ -L ${dev_path} ]; then + echo "tmp75 ${I2C_ADDR_TMP75_REAR}" > ${PATH_MUX_9545_1_CH3}/new_device # hwmon1 + else + echo "${dev_path} already exist" + fi + sleep 0.5 + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9545_1_CH3}-$(printf "%04x" ${I2C_ADDR_TMP75_FRONT})" + if ! [ -L ${dev_path} ]; then + echo "tmp75 ${I2C_ADDR_TMP75_FRONT}" > ${PATH_MUX_9545_1_CH3}/new_device #hwmon2 + else + echo "${dev_path} already exist" + fi + sleep 0.5 + ####BMC board thermal + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_0_CH7}-$(printf "%04x" ${I2C_ADDR_TMP75_BB})" + if ! [ -L ${dev_path} ]; then + echo "tmp75 ${I2C_ADDR_TMP75_BB}" > ${PATH_MUX_9548_0_CH7}/new_device #hwmon3 + else + echo "${dev_path} already exist" + fi + sleep 0.5 + ####CPU board thermal + dev_path="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MAIN}-$(printf "%04x" ${I2C_ADDR_TMP75_CB})" + if ! [ -L ${dev_path} ]; then + echo "tmp75 ${I2C_ADDR_TMP75_CB}" > ${PATH_I801_DEVICE}/new_device #hwmon4 + else + echo "${dev_path} already exist" + fi + sleep 0.5 + # add w83795 to sysfs + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_0_CH7}-$(printf "%04x" ${I2C_ADDR_W83795})" + if ! [ -L ${dev_path} ]; then + echo "w83795adg ${I2C_ADDR_W83795}" > ${PATH_MUX_9548_0_CH7}/new_device #hwmon5 + else + echo "${dev_path} already exist" + fi + sleep 0.5 + + # probe jc42 kernel module + modprobe jc42 + + echo "Done" +} + +function _port_led_clr_init { + echo "port led init..." + # gpio pin on GPIO MUX PCA9539#2 I/O 0.2 + # pull high to out of reset + output_reg=${REG_PORT0_OUT} + mask=0x04 + value=0x04 + _util_i2cset -m ${mask} -y ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_2} ${output_reg} ${value} + echo "Done" +} + +#FAN Speed Init +function _i2c_fan_speed_init { + echo -n "FAN SPEED INIT..." + if [ -e "${PATH_HWMON_W83795_DEVICE}" ]; then + # init fan speed + echo 120 > ${PATH_HWMON_W83795_DEVICE}/device/pwm1 + echo 120 > ${PATH_HWMON_W83795_DEVICE}/device/pwm2 + echo "SUCCESS" + else + echo "FAIL" + fi +} + +# HWM init +function _i2c_hwm_init { + echo "HWM INIT..." + # select bank0 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x00 0x80 + # SW reset, Disable monitor + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x01 0x9C + # disable TR5/TR6 DTS + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x04 0x0 + # enable FANIN1~8 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x06 0xFF + # disable FANIN9~14 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x07 0x00 + # CLKIN clock frequency set as 48Mhz + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x01 0x1C + # select bank 2 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x00 0x82 + # set PWM mode in FOMC + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x0F 0x00 + # set 25KHz fan output frequency in F1OPFP&F2OPFP + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x18 0x84 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x19 0x84 +} + +#Temperature sensor Init +function _i2c_temp_init { + echo "TEMP INIT..." + # enable temp monitor on w83795 + # select bank0 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x00 0x80 + # enable TR4 temperature monitoring + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x05 0x40 + # disable TR5/TR6 DTS + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x04 0x0 + echo "Done" +} + +#VOLMON Init +function _i2c_volmon_init { + echo "VOLMON INIT..." + # enable voltage monitor on w83795 + # VSEN1 P0V9 + # VSEN2 VDD + # VSEN3 P1V2 + # VSEN4 P1V8 + # select bank0 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x00 0x80 + # enable vsen1~4, disable vsen5~8 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x02 0x0F + # enable 3VDD,VBAT + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x03 0x50 + echo "Done" +} + +#FANIN Init +function _i2c_fan_init { + echo "FANIN INIT..." + # enable fan monitor on w83795 + # 4 fantray with 8 FANIN + # select bank0 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x00 0x80 + # enable FANIN1~8 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x06 0xFF + # disable FANIN9~14 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x07 0x00 + + # select bank 2 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x00 0x82 + # set PWM mode in FOMC + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x0F 0x00 + + echo "Done" +} + +#IO Expander Init +function _i2c_io_exp_init { + echo "=========================================================" + echo "# Description: I2C IO Expender Init" + echo "=========================================================" + + # need to init BMC io expander first due to some io expander are reset default + echo "Init BMC INT & HW ID IO Expander" + # all input + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_12} ${REG_PORT0_DIR} 0xFF + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_12} ${REG_PORT1_DIR} 0xFF + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_12} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_12} ${REG_PORT1_POL} 0x00 + + echo "Init BMC PSU status IO Expander" + # PWRON default 0 (ACTIVE_LOW) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_13} ${REG_PORT0_OUT} 0x00 + # default 0 (ACTIVE_LOW) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_13} ${REG_PORT1_OUT} 0x00 + # I/O 0.2 0.5 output(PWRON), rest input + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_13} ${REG_PORT0_DIR} 0xDB + # I/O 1.0~1.1 input, 1.2~1.4 output (1.5~1.7 not enable) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_13} ${REG_PORT1_DIR} 0xE3 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_13} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_13} ${REG_PORT1_POL} 0x00 + + echo "Init BMC RST and SEL IO Expander" + # RST default is 1 (ACTIVE_LOW) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_14} ${REG_PORT0_OUT} 0x3F + # SEL default is 0 (HOST), EN default is 1 (ACTIVE_HIGH) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_14} ${REG_PORT1_OUT} 0x1F + # I/O 0.0~0.5 output, 0.6~0.7 not use + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_14} ${REG_PORT0_DIR} 0xC0 + # all output + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_14} ${REG_PORT1_DIR} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_14} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_14} ${REG_PORT1_POL} 0x00 + + echo "Init System LED & HW ID IO Expander" + # I/O_0.x for System LED default 0, I/O_1.x for HW ID + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT0_OUT} 0x00 + # System LED => all output + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT0_DIR} 0x00 + # HW ID => all input + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT1_DIR} 0xFF + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT1_POL} 0x00 + + echo "Init System PRSNT and HWM RST IO Expander" + # HWM_RST_L default 1 (ACTIVE_LOW) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_1} ${REG_PORT0_OUT} 0x04 + # all input expect HWM_RST_L (0.2) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_1} ${REG_PORT0_DIR} 0xFB + # port1 not used + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_1} ${REG_PORT1_DIR} 0xFF + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_1} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_1} ${REG_PORT1_POL} 0x00 + + echo "Init System SEL and RST IO Expander" + # RST 0.0~0.3 default 1 (ACTIVE low), rest default 0 + # SEL set to value 0 (host) + # LED_CLR also do init in _port_led_clr_init + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_2} ${REG_PORT0_OUT} 0x0F + # RST 1.6~1.7 default 1 (ACTIVE low), INT 1.0~1.4 default 1 (ACTIVE low) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_2} ${REG_PORT1_OUT} 0xDF + # all output, but MAC_RST_L 0.0 need to set as input to prevent reboot issue + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_2} ${REG_PORT0_DIR} 0x09 + # RST 1.5 !~ 1.7 output, rest are input + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_2} ${REG_PORT1_DIR} 0x1F + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_2} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_2} ${REG_PORT1_POL} 0x00 + + echo "Init FAN Board Status IO Expander" + # LED_G_L set to 0, LED_Y_L set to 1 (ACTIVE_LOW) + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9535_11} ${REG_PORT0_OUT} 0x22 + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9535_11} ${REG_PORT1_OUT} 0x22 + # DIR/ABS is input, LED_Y/LED_G is output + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9535_11} ${REG_PORT0_DIR} 0xCC + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9535_11} ${REG_PORT1_DIR} 0xCC + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9535_11} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9535_11} ${REG_PORT1_POL} 0x00 + + echo "Init CPU CPLD IO Expander" + # all input + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_15} ${REG_PORT0_DIR} 0xFF + # all input + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_15} ${REG_PORT1_DIR} 0xFF + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_15} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_15} ${REG_PORT1_POL} 0x00 + + echo "Init ZQSFP IO Expender" + + echo "set ZQSFP ABS" + #zQSFP 0-15 ABS + # all input + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_3} ${REG_PORT0_DIR} 0xFF + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_3} ${REG_PORT1_DIR} 0xFF + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_3} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_3} ${REG_PORT1_POL} 0x00 + #zQSFP 16-31 ABS + # all input + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_4} ${REG_PORT0_DIR} 0xFF + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_4} ${REG_PORT1_DIR} 0xFF + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_4} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_4} ${REG_PORT1_POL} 0x00 + + echo "set ZQSFP INT" + #zQSFP 0-15 INT + # all input + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_5} ${REG_PORT0_DIR} 0xFF + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_5} ${REG_PORT1_DIR} 0xFF + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_5} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_5} ${REG_PORT1_POL} 0x00 + #zQSFP 16-31 INT + # all input + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_6} ${REG_PORT0_DIR} 0xFF + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_6} ${REG_PORT1_DIR} 0xFF + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_6} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH4} ${I2C_ADDR_MUX_9535_6} ${REG_PORT1_POL} 0x00 + + echo "set ZQSFP LP_MODE = 0" + #ZQSFP 0-15 LP_MODE + # default is 0 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_7} ${REG_PORT0_OUT} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_7} ${REG_PORT1_OUT} 0x00 + # all output + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_7} ${REG_PORT0_DIR} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_7} ${REG_PORT1_DIR} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_7} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_7} ${REG_PORT1_POL} 0x00 + #ZQSFP 16-31 LP_MODE + # default is 0 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_8} ${REG_PORT0_OUT} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_8} ${REG_PORT1_OUT} 0x00 + # all output + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_8} ${REG_PORT0_DIR} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_8} ${REG_PORT1_DIR} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_8} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_8} ${REG_PORT1_POL} 0x00 + + echo "set ZQSFP RST = 1" + #ZQSFP 0-15 RST + # default is 1 (ACTIVE_LOW) + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_9} ${REG_PORT0_OUT} 0xFF + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_9} ${REG_PORT1_OUT} 0xFF + # all output + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_9} ${REG_PORT0_DIR} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_9} ${REG_PORT1_DIR} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_9} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_9} ${REG_PORT1_POL} 0x00 + #ZQSFP 16-31 RST + # default is 1 (ACTIVE_LOW) + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_10} ${REG_PORT0_OUT} 0xFF + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_10} ${REG_PORT1_OUT} 0xFF + # all output + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_10} ${REG_PORT0_DIR} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_10} ${REG_PORT1_DIR} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_10} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_2_CH5} ${I2C_ADDR_MUX_9535_10} ${REG_PORT1_POL} 0x00 + +} + +# To set the global variable GPIO_OFFSET +function _set_gpio_offset { + GPIO_OFFSET=0 + for d in `ls /sys/class/gpio/ | grep gpiochip` + do + gpiochip_no=${d##gpiochip} + if [ $gpiochip_no -gt 255 ]; then + GPIO_OFFSET=256 + break + fi + done + #echo "set GPIO_OFFSET=${GPIO_OFFSET}" +} + +#GPIO Init +function _i2c_gpio_init { + local i=0 + local start=255 + local end=255 + local ch_num=16 + + #ABS Port 0-15 + echo "pca9535 ${I2C_ADDR_MUX_9535_3}" > ${PATH_MUX_9548_2_CH4}/new_device + _set_gpio_offset + start=$[ ${start}+${GPIO_OFFSET} ] + end=$[ ${end}+${GPIO_OFFSET} ] + start=$[ ${end}-${ch_num}+1] + for (( i=$start; i<=$end; i++ )) + do + _util_gpio_export ${i} ${DIR_IN} ${ACTIVE_LOW_EN} + done + + #ABS Port 16-31 + end=$[ ${start}-1] + echo "pca9535 ${I2C_ADDR_MUX_9535_4}" > ${PATH_MUX_9548_2_CH4}/new_device + start=$[ ${end}-${ch_num}+1] + for (( i=$start; i<=$end; i++ )) + do + _util_gpio_export ${i} ${DIR_IN} ${ACTIVE_LOW_EN} + done + + #INT Port 0-15 + end=$[ ${start}-1] + echo "pca9535 ${I2C_ADDR_MUX_9535_5}" > ${PATH_MUX_9548_2_CH4}/new_device + start=$[ ${end}-${ch_num}+1] + for (( i=$start; i<=$end; i++ )) + do + _util_gpio_export ${i} ${DIR_IN} ${ACTIVE_LOW_EN} + done + + #INT Port 16-31 + end=$[ ${start}-1] + echo "pca9535 ${I2C_ADDR_MUX_9535_6}" > ${PATH_MUX_9548_2_CH4}/new_device + start=$[ ${end}-${ch_num}+1] + for (( i=$start; i<=$end; i++ )) + do + _util_gpio_export ${i} ${DIR_IN} ${ACTIVE_LOW_EN} + done + + #LP Mode Port 0-15 + end=$[ ${start}-1] + echo "pca9535 ${I2C_ADDR_MUX_9535_7}" > ${PATH_MUX_9548_2_CH5}/new_device + start=$[ ${end}-${ch_num}+1] + for (( i=$start; i<=$end; i++ )) + do + _util_gpio_export ${i} ${DIR_OUT} ${ACTIVE_HIGH_EN} + done + + #LP Mode Port 16-31 + end=$[ ${start}-1] + echo "pca9535 ${I2C_ADDR_MUX_9535_8}" > ${PATH_MUX_9548_2_CH5}/new_device + start=$[ ${end}-${ch_num}+1] + for (( i=$start; i<=$end; i++ )) + do + _util_gpio_export ${i} ${DIR_OUT} ${ACTIVE_HIGH_EN} + done + + #RESET Port 0-15 + end=$[ ${start}-1] + echo "pca9535 ${I2C_ADDR_MUX_9535_9}" > ${PATH_MUX_9548_2_CH5}/new_device + start=$[ ${end}-${ch_num}+1] + for (( i=$start; i<=$end; i++ )) + do + # need to set value to low (became ACTIVE_HIGH) to take port out of reset + _util_gpio_export ${i} ${DIR_OUT} ${ACTIVE_LOW_EN} 0 + done + + #RESET Port 16-31 + end=$[ ${start}-1] + echo "pca9535 ${I2C_ADDR_MUX_9535_10}" > ${PATH_MUX_9548_2_CH5}/new_device + start=$[ ${end}-${ch_num}+1] + for (( i=$start; i<=$end; i++ )) + do + # need to set value to low (became ACTIVE_HIGH) to take port out of reset + _util_gpio_export ${i} ${DIR_OUT} ${ACTIVE_LOW_EN} 0 + done +} + +#GPIO DeInit +function _i2c_gpio_deinit { + echo ${I2C_ADDR_MUX_9535_3} > /sys/bus/i2c/devices/i2c-${NUM_MUX_9548_2_CH4}/delete_device + echo ${I2C_ADDR_MUX_9535_4} > /sys/bus/i2c/devices/i2c-${NUM_MUX_9548_2_CH4}/delete_device + echo ${I2C_ADDR_MUX_9535_5} > /sys/bus/i2c/devices/i2c-${NUM_MUX_9548_2_CH4}/delete_device + echo ${I2C_ADDR_MUX_9535_6} > /sys/bus/i2c/devices/i2c-${NUM_MUX_9548_2_CH4}/delete_device + echo ${I2C_ADDR_MUX_9535_7} > /sys/bus/i2c/devices/i2c-${NUM_MUX_9548_2_CH5}/delete_device + echo ${I2C_ADDR_MUX_9535_8} > /sys/bus/i2c/devices/i2c-${NUM_MUX_9548_2_CH5}/delete_device + echo ${I2C_ADDR_MUX_9535_9} > /sys/bus/i2c/devices/i2c-${NUM_MUX_9548_2_CH5}/delete_device + echo ${I2C_ADDR_MUX_9535_10} > /sys/bus/i2c/devices/i2c-${NUM_MUX_9548_2_CH5}/delete_device +} + +#Set FAN Tray LED +function _i2c_led_fan_tray_status_set { + echo "FAN Tray Status Setup" + #FAN Status get + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan8_alarm` + FAN2_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan6_alarm` + FAN4_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan4_alarm` + FAN6_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan2_alarm` + FAN8_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + + # check if io expander for fan tray exist + result=`i2cget -y ${I2C_BUS_FANTRAY_LED} ${I2C_ADDR_MUX_9535_11} ${REG_PORT0_IN} 2>/dev/null` + err_code=$? + if [ "$err_code" != "0" ]; then + echo "fan tray not exist!" + return + fi + + if [ "${FAN1_ALARM}" == "0" ] && [ "${FAN2_ALARM}" == "0" ]; then + FAN_TRAY=1 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=1 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + if [ "${FAN3_ALARM}" == "0" ] && [ "${FAN4_ALARM}" == "0" ]; then + FAN_TRAY=2 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=2 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + if [ "${FAN5_ALARM}" == "0" ] && [ "${FAN6_ALARM}" == "0" ]; then + FAN_TRAY=3 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=3 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi + + if [ "${FAN7_ALARM}" == "0" ] && [ "${FAN8_ALARM}" == "0" ]; then + FAN_TRAY=4 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + else + FAN_TRAY=4 + echo "FAN_TRAY${FAN_TRAY}..." + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_tray_led + fi +} + +#Set FAN LED +function _i2c_led_fan_status_set { + echo "FAN Status Setup" + #PSU Status set + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN2_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan2_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN4_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan4_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN6_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan6_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + FAN8_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan8_alarm` + + echo "led_fan setup..." + # all fan ok + if [ "${FAN1_ALARM}" == "0" ] && [ "${FAN2_ALARM}" == "0" ] \ + && [ "${FAN3_ALARM}" == "0" ] && [ "${FAN4_ALARM}" == "0" ] \ + && [ "${FAN5_ALARM}" == "0" ] && [ "${FAN6_ALARM}" == "0" ] \ + && [ "${FAN7_ALARM}" == "0" ] && [ "${FAN8_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + # all fan fail + elif [ "${FAN1_ALARM}" == "1" ] && [ "${FAN2_ALARM}" == "1" ] \ + && [ "${FAN3_ALARM}" == "1" ] && [ "${FAN4_ALARM}" == "1" ] \ + && [ "${FAN5_ALARM}" == "1" ] && [ "${FAN6_ALARM}" == "1" ] \ + && [ "${FAN7_ALARM}" == "1" ] && [ "${FAN8_ALARM}" == "1" ]; then + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + # partial fan fail + else + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_fan_led + fi +} + +#Set Power Supply LED +function _i2c_led_psu_status_set { + echo "PSU LED Status Setup" + + #PSU Status set + _i2c_psu_status + + #PSU1 Status + echo "led_psu1 setup..." + if [ "${psu1Exist}" == ${PSU_EXIST} ]; then + if [ "${psu1PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + else + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + fi + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu1_led + fi + + #PSU2 Status + echo "led_psu2 setup..." + if [ "${psu2Exist}" == ${PSU_EXIST} ]; then + if [ "${psu2PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + else + COLOR_LED="amber" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + fi + else + COLOR_LED="green" + ONOFF_LED="off" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_psu2_led + fi +} + +#LED Test +function _i2c_led_test { + echo "=========================================================" + echo "# Description: I2C SYSTEM LED TEST..." + echo "=========================================================" + local output_reg=${REG_PORT0_OUT} + local mask=0xFF + local value=0xFF + + #sys led (green) + # set sys_led_g (0.7) = 1 + mask=0x80 + value=0x80 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check SYS LED green light and Press [Enter] key to continue...' + #sys led (amber) + # set sys_led_g (0.7) = 0 + mask=0x80 + value=0x00 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check SYS LED amber light and Press [Enter] key to continue...' + + #FAN led (green) + # set fan_led_en (0.6) = 1 & fan_led_y (0.5) = 0 + mask=0x60 + value=0x40 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check FAN LED green light and Press [Enter] key to continue...' + #FAN led (amber) + # set fan_led_en (0.6) = 1 & fan_led_y (0.5) = 1 + mask=0x60 + value=0x60 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check FAN LED amber light and Press [Enter] key to continue...' + + #PSU1 led (green) + # set psu1_pwr_ok_oe (0.4) = 1 & psu1_led_y (0.3) = 0 + mask=0x18 + value=0x10 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check PSU1 LED green light and Press [Enter] key to continue...' + #PSU1 led (amber) + # set psu1_pwr_ok_oe (0.4) = 1 & psu1_led_y (0.3) = 1 + mask=0x18 + value=0x18 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check PSU1 LED amber light and Press [Enter] key to continue...' + + #PSU2 led (green) + # set psu0_pwr_ok_oe (0.2) = 1 & psu0_led_y (0.1) = 0 + mask=0x06 + value=0x04 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check PSU2 LED green light and Press [Enter] key to continue...' + #PSU2 led (amber) + # set psu0_pwr_ok_oe (0.2) = 1 & psu0_led_y (0.1) = 1 + mask=0x06 + value=0x06 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check PSU2 LED amber light and Press [Enter] key to continue...' + + #Turn OFF All LED (can't trun off system led) + # set set fan_led_en (0.6), psu1_pwr_ok_oe (0.4), psu0_pwr_ok_oe (0.2) = 0 + mask=0x54 + value=0x00 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check turn off all LEDs (exclude SYS LED) and Press [Enter] key to continue...' + + # restore sys led + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_sys_led + + echo "Done" +} + +#Set QSFP Port variable +function _qsfp_port_i2c_var_set { + local port=$1 + case ${port} in + 1|2|3|4|5|6|7|8) + i2cbus=${NUM_MUX_9548_2_CH4} + eeprombusbase=${NUM_MUX_9548_3_CH0} + gpioBase=$((${GPIO_OFFSET}+${ZQSFP_PORT0_ABS_GPIO_IDX})) + #gpioBase=${ZQSFP_PORT0_ABS_GPIO_IDX} + ;; + 9|10|11|12|13|14|15|16) + i2cbus=${NUM_MUX_9548_2_CH4} + eeprombusbase=${NUM_MUX_9548_4_CH0} + gpioBase=$((${GPIO_OFFSET}+${ZQSFP_PORT0_ABS_GPIO_IDX})) + #gpioBase=${ZQSFP_PORT0_ABS_GPIO_IDX} + ;; + 17|18|19|20|21|22|23|24) + i2cbus=${NUM_MUX_9548_2_CH4} + eeprombusbase=${NUM_MUX_9548_5_CH0} + gpioBase=$((${GPIO_OFFSET}+${ZQSFP_PORT16_ABS_GPIO_IDX})) + #gpioBase=${ZQSFP_PORT16_ABS_GPIO_IDX} + ;; + 25|26|27|28|29|30|31|32) + i2cbus=${NUM_MUX_9548_2_CH4} + eeprombusbase=${NUM_MUX_9548_6_CH0} + gpioBase=$((${GPIO_OFFSET}+${ZQSFP_PORT16_ABS_GPIO_IDX})) + #gpioBase=${ZQSFP_PORT16_ABS_GPIO_IDX} + ;; + *) + echo "Please input 1~32" + exit + ;; + esac +} + +#Set QSFP Port variable +function _qsfp_eeprom_var_set { + local port=$1 + # port 1 => zqsfp0 + # port 2 => zqsfp1 + # ... + eeprombusidx=$(( (${port} - 1) % 8)) + eeprombus=$(( ${eeprombusbase} + ${eeprombusidx} )) + eepromAddr=${I2C_ADDR_QSFP_EEPROM} +} + +#Get QSFP EEPROM Information +function _i2c_qsfp_eeprom_get { + + # input parameter validation + _util_input_check "${QSFP_PORT}" "${MIN_PORT_NUM}" "${MAX_PORT_NUM}" + + _util_get_qsfp_abs + + if [ $status = 0 ]; then + exit + fi + + _qsfp_eeprom_var_set ${QSFP_PORT} + + cat ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/eeprom | hexdump -C +} + +#Init QSFP EEPROM +function _i2c_qsfp_eeprom_init { + echo "QSFP EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init 1-32 ports EEPROM + local i + for i in {1..32}; + do + _qsfp_port_i2c_var_set ${i} + + _qsfp_eeprom_var_set ${i} + + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr) ]; then + echo "sff8436 $eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eeprombus/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr) ]; then + echo "$eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eeprombus/delete_device + fi + done + echo "Done" +} + +#Init Main Board EEPROM +function _i2c_mb_eeprom_init { + echo -n "Main Board EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init mb EEPROM + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM) ]; then + echo "mb_eeprom ${I2C_ADDR_MB_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_MB_EEPROM}/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM) ]; then + echo "$I2C_ADDR_MB_EEPROM" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_MB_EEPROM}/delete_device + fi + echo "Done" +} + +#Init CPU Board EEPROM +function _i2c_cb_eeprom_init { + echo -n "CPU Board EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init cpu EEPROM + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_CB_EEPROM}-$(printf "%04x" $I2C_ADDR_CB_EEPROM) ]; then + echo "mb_eeprom ${I2C_ADDR_CB_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CB_EEPROM}/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_CB_EEPROM}-$(printf "%04x" $I2C_ADDR_CB_EEPROM) ]; then + echo "$I2C_ADDR_CB_EEPROM" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CB_EEPROM}/delete_device + fi + echo "Done" +} + + +#get QSFP Status +function _i2c_qsfp_status_get { + + # input parameter validation + _util_input_check "${QSFP_PORT}" "${MIN_PORT_NUM}" "${MAX_PORT_NUM}" + + local stat + _util_get_qsfp_abs + echo "status=$status" +} + +#get QSFP Type +function _i2c_qsfp_type_get { + + # input parameter validation + _util_input_check "${QSFP_PORT}" "${MIN_PORT_NUM}" "${MAX_PORT_NUM}" + + _qsfp_port_i2c_var_set ${QSFP_PORT} + + _qsfp_eeprom_var_set ${QSFP_PORT} + + #Get QSFP EEPROM info + qsfp_info=$(base64 ${PATH_SYS_I2C_DEVICES}/$eeprombus-$(printf "%04x" $eepromAddr)/eeprom) + + identifier=$(echo $qsfp_info | base64 -d -i | hexdump -s 128 -n 1 -e '"%x"') + connector=$(echo $qsfp_info | base64 -d -i | hexdump -s 130 -n 1 -e '"%x"') + transceiver=$(echo $qsfp_info | base64 -d -i | hexdump -s 131 -n 1 -e '"%x"') + + echo "identifier=$identifier" + echo "connector=$connector" + echo "transceiver=$transceiver" +} + +#Init PSU Kernel Module +function _i2c_psu_init { + echo "=========================================================" + echo "# Description: I2C PSU Init" + echo "=========================================================" + modprobe ingrasys_s9130_32x_psu + + echo "psu1 ${I2C_ADDR_PSU1_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU1_EEPROM}/new_device + echo "psu2 ${I2C_ADDR_PSU2_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU2_EEPROM}/new_device +} + +#Get PSU EEPROM Information +function _i2c_psu_eeprom_get { + local eeprom_psu1="" + local eeprom_psu2="" + + echo "=========================================================" + echo "# Description: I2C PSU EEPROM Get..." + echo "=========================================================" + + eeprom_psu1="${PATH_SYSFS_PSU1}/psu_eeprom" + cat ${eeprom_psu1} | hexdump -C + + eeprom_psu2="${PATH_SYSFS_PSU2}/psu_eeprom" + cat ${eeprom_psu2} | hexdump -C +} + +#Get Main Board EEPROM Information +function _i2c_mb_eeprom_get { + echo "=========================================================" + echo "# Description: I2C MB EEPROM Get..." + echo "=========================================================" + _i2c_sys_eeprom_get mb +} + +#Get CPU Board EEPROM Information +function _i2c_cb_eeprom_get { + echo "=========================================================" + echo "# Description: I2C CB EEPROM Get..." + echo "=========================================================" + _i2c_sys_eeprom_get cb +} + +#Get system EEPROM Information +##input: "cb" for cpu board, "mb" for main board +function _i2c_sys_eeprom_get { + local eeprom_dev + + if [ "$1" == "cb" ]; then + eeprom_dev="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_CB_EEPROM}-$(printf "%04x" $I2C_ADDR_CB_EEPROM)/eeprom" + elif [ "$1" == "mb" ]; then + eeprom_dev="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM)/eeprom" + else + echo "wrong eeprom type" + return + fi + + # check if eeprom device exist in sysfs + if [ ! -f ${eeprom_dev} ]; then + echo "eeprom device not init" + return + fi + + cat ${eeprom_dev} | hexdump -C + echo "Done" +} + +#sync eeprom content between mb and cb eeprom +function _i2c_eeprom_sync { + echo "=========================================================" + echo "# Description: EEPROM sync..." + echo "=========================================================" + + local mb_eeprom_dev="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM)/eeprom" + local cb_eeprom_dev="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_CB_EEPROM}-$(printf "%04x" $I2C_ADDR_CB_EEPROM)/eeprom" + + # check if eeprom device exist in sysfs + if [[ ! -f ${mb_eeprom_dev} || ! -f ${cb_eeprom_dev} ]]; then + echo "eeprom device not init" + return + fi + + ## check if MB eeprom is empty + if [ ! -z "$(cat ${mb_eeprom_dev} | hexdump -n2 | grep ffff)" ]; then + echo "copy cb eeprom to mb eeprom..." + cat ${cb_eeprom_dev} > ${mb_eeprom_dev} + else + echo "no need to sync" + fi + + echo "Done" +} + +#Set System Status LED +function _i2c_sys_led { + # only green/amber, on/off can't control + if [ "${COLOR_LED}" == "green" ]; then + # set sys_led_g (0.7) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x80 + value=0x80 + elif [ "${COLOR_LED}" == "amber" ]; then + # set sys_led_g (0.7) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x80 + value=0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + #apply to io expander + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + echo "Done" +} + +#Set FAN LED +function _i2c_fan_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + # set fan_led_en (0.6) = 1 & fan_led_y (0.5) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x60 + value=0x40 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + # set fan_led_en (0.6) = 0 & fan_led_y (0.5) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x60 + value=0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + # set fan_led_en (0.6) = 1 & fan_led_y (0.5) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x60 + value=0x60 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + # set fan_led_en (0.6) = 0 & fan_led_y (0.5) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x60 + value=0x20 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + #apply to io expander + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + echo "Done" +} + +#Set PSU1 LED +function _i2c_psu1_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + # set psu1_pwr_ok_oe (0.4) = 1 & psu1_led_y (0.3) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x18 + value=0x10 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + # set psu1_pwr_ok_oe (0.4) = 0 & psu1_led_y (0.3) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x18 + value=0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + # set psu1_pwr_ok_oe (0.4) = 1 & psu1_led_y (0.3) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x18 + value=0x18 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + # set psu1_pwr_ok_oe (0.4) = 0 & psu1_led_y (0.3) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x18 + value=0x08 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + #apply to io expander + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + echo "Done" +} + +#Set PSU2 LED +function _i2c_psu2_led { + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + # set psu0_pwr_ok_oe (0.2) = 1 & psu0_led_y (0.1) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x06 + value=0x04 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + # set psu0_pwr_ok_oe (0.2) = 0 & psu0_led_y (0.1) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x06 + value=0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + # set psu0_pwr_ok_oe (0.2) = 1 & psu0_led_y (0.1) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x06 + value=0x06 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + # set psu0_pwr_ok_oe (0.2) = 0 & psu0_led_y (0.1) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x06 + value=0x02 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + #apply to io expander + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + echo "Done" +} + +#Set FAN Tray LED +function _i2c_fan_tray_led { + + i2cAddr=${I2C_ADDR_MUX_9535_11} + output_reg=${REG_PORT0_OUT} + + case ${FAN_TRAY} in + 4) + output_reg=${REG_PORT0_OUT} + if [ "${COLOR_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 3) + output_reg=${REG_PORT0_OUT} + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + 2) + output_reg=${REG_PORT1_OUT} + if [ "${COLOR_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 1) + output_reg=${REG_PORT1_OUT} + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + *) + echo "Please input 1~4" + exit + ;; + esac + + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + _util_i2cset -m $mask -y -r ${I2C_BUS_FANTRAY_LED} $i2cAddr ${output_reg} 0x00 + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + _util_i2cset -m $mask -y -r ${I2C_BUS_FANTRAY_LED} $i2cAddr ${output_reg} 0x33 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + _util_i2cset -m $mask -y -r ${I2C_BUS_FANTRAY_LED} $i2cAddr ${output_reg} 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + _util_i2cset -m $mask -y -r ${I2C_BUS_FANTRAY_LED} $i2cAddr ${output_reg} 0x33 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "Done" +} + +#Get Board Version and Type +function _i2c_board_type_get { + # read input port 1 value from io expander + input_reg=${REG_PORT1_IN} + boardType=`i2cget -y ${I2C_BUS_HW_ID} ${I2C_ADDR_MUX_9539_0} ${input_reg}` + boardBuildRev=$((($boardType) & 0x03)) + boardHwRev=$((($boardType) >> 2 & 0x03)) + boardId=$((($boardType) >> 4)) + printf "MAIN_BOARD BOARD_ID is 0x%02x, HW Rev %d, Build Rev %d\n" $boardId $boardHwRev $boardBuildRev +} + +#Get BMC Board Version and Type +function _i2c_bmc_board_type_get { + # read input port 1 value from io expander + input_reg=${REG_PORT1_IN} + boardType=`i2cget -y ${I2C_BUS_BMC_HW_ID} ${I2C_ADDR_MUX_9555_12} ${input_reg}` + boardBuildRev=$((($boardType) & 0x03)) + boardHwRev=$((($boardType) >> 2 & 0x03)) + boardId=$((($boardType) >> 4)) + printf "BMC_BOARD BOARD_ID is 0x%02x, HW Rev %d, Build Rev %d\n" $boardId $boardHwRev $boardBuildRev +} + +#Get PSU Status +function _i2c_psu_status { + local psu_abs="" + + psu1PwGood=`cat ${PATH_SYSFS_PSU1}/psu_pg` + psu_abs=`cat ${PATH_SYSFS_PSU1}/psu_abs` + if [ "$psu_abs" == "0" ]; then + psu1Exist=1 + else + psu1Exist=0 + fi + + psu2PwGood=`cat ${PATH_SYSFS_PSU2}/psu_pg` + psu_abs=`cat ${PATH_SYSFS_PSU2}/psu_abs` + if [ "$psu_abs" == "0" ]; then + psu2Exist=1 + else + psu2Exist=0 + fi + + printf "PSU1 Exist:%x PSU1 PW Good:%d\n" $psu1Exist $psu1PwGood + printf "PSU2 Exist:%d PSU2 PW Good:%d\n" $psu2Exist $psu2PwGood +} + +#util functions +function _util_i2cset { + if [ "$DEBUG" == "on" ]; then + i2cset $@ + else + i2cset $@ 1>/dev/null + fi +} + +function _util_rmmod { + local mod=$1 + [ "$(lsmod | grep "^$mod ")" != "" ] && rmmod $mod +} + +# get qsfp presence +function _util_get_qsfp_abs { + _qsfp_port_i2c_var_set ${QSFP_PORT} + + #status: 0 -> Down, 1 -> Up (ACTIVE_LOW_EN) + status=`cat /sys/class/gpio/gpio$(( $(($gpioBase + (${QSFP_PORT} - 1) % 16 )) ))/value` +} + +# gpio init util function +function _util_gpio_export { + local gpio_n=$1 + local direction=$2 + local active_low=$3 + local value=$4 + + if [ -z "${gpio_n}" ]; then + echo "[gpio_init] gpio_n(${gpio_n}) is not provided" + return + fi + if [[ ${gpio_n} < 0 || ${gpio_n} > $(( 255+${GPIO_OFFSET} )) ]]; then + echo "[gpio_init] gpio_n(${gpio_n}) is invalid value" + return + fi + + #export gpio + echo ${gpio_n} > /sys/class/gpio/export + #set gpio direction + echo ${direction} > /sys/class/gpio/gpio${gpio_n}/direction + #set gpio active_low + echo ${active_low} > /sys/class/gpio/gpio${gpio_n}/active_low + #set value + if [ ! -z "${value}" ]; then + echo ${value} > /sys/class/gpio/gpio${gpio_n}/value + fi +} + +# valid input number +function _util_input_check { + # input parameter validation + if [[ $1 -lt $2 || $1 -gt $3 ]]; then + echo "Please input number $2~$3" + exit + fi +} + +#Increase read socket buffer for CoPP Test +function _config_rmem { + echo "109430400" > /proc/sys/net/core/rmem_max +} + +#Main Function +function _main { + tart_time_str=`date` + start_time_sec=$(date +%s) + + _set_gpio_offset + if [ "${EXEC_FUNC}" == "help" ]; then + _help + elif [ "${EXEC_FUNC}" == "i2c_init" ]; then + _i2c_init + elif [ "${EXEC_FUNC}" == "i2c_deinit" ]; then + _i2c_deinit + elif [ "${EXEC_FUNC}" == "i2c_fan_speed_init" ]; then + _i2c_fan_speed_init + elif [ "${EXEC_FUNC}" == "i2c_io_exp_init" ]; then + _i2c_io_exp_init + elif [ "${EXEC_FUNC}" == "i2c_gpio_init" ]; then + _i2c_gpio_init + elif [ "${EXEC_FUNC}" == "i2c_gpio_deinit" ]; then + _i2c_gpio_deinit + elif [ "${EXEC_FUNC}" == "i2c_led_test" ]; then + _i2c_led_test + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_get" ]; then + _i2c_mb_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_cb_eeprom_get" ]; then + _i2c_cb_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_eeprom_sync" ]; then + _i2c_eeprom_sync + elif [ "${EXEC_FUNC}" == "i2c_psu_eeprom_get" ]; then + _i2c_psu_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_get" ]; then + _i2c_qsfp_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_init" ]; then + _i2c_qsfp_eeprom_init ${QSFP_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_init" ]; then + _i2c_mb_eeprom_init ${MB_EEPROM_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_cb_eeprom_init" ]; then + _i2c_cb_eeprom_init ${MB_EEPROM_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_qsfp_status_get" ]; then + _i2c_qsfp_status_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_type_get" ]; then + _i2c_qsfp_type_get + elif [ "${EXEC_FUNC}" == "i2c_led_psu_status_set" ]; then + _i2c_led_psu_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_status_set" ]; then + _i2c_led_fan_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_tray_status_set" ]; then + _i2c_led_fan_tray_status_set + elif [ "${EXEC_FUNC}" == "i2c_sys_led" ]; then + _i2c_sys_led + elif [ "${EXEC_FUNC}" == "i2c_fan_led" ]; then + _i2c_fan_led + elif [ "${EXEC_FUNC}" == "i2c_fan_tray_led" ]; then + _i2c_fan_tray_led + elif [ "${EXEC_FUNC}" == "i2c_psu1_led" ]; then + _i2c_psu1_led + elif [ "${EXEC_FUNC}" == "i2c_psu2_led" ]; then + _i2c_psu2_led + elif [ "${EXEC_FUNC}" == "i2c_board_type_get" ]; then + _i2c_board_type_get + elif [ "${EXEC_FUNC}" == "i2c_bmc_board_type_get" ]; then + _i2c_bmc_board_type_get + elif [ "${EXEC_FUNC}" == "i2c_psu_status" ]; then + _i2c_psu_status + elif [ "${EXEC_FUNC}" == "i2c_test_all" ]; then + _i2c_init + _i2c_led_test + _i2c_psu_eeprom_get + _i2c_mb_eeprom_get + _i2c_cb_eeprom_get + _i2c_board_type_get + _i2c_bmc_board_type_get + _i2c_psu_status + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + if [ "$DEBUG" == "on" ]; then + echo "-----------------------------------------------------" + end_time_str=`date` + end_time_sec=$(date +%s) + diff_time=$[ ${end_time_sec} - ${start_time_sec} ] + echo "Start Time: ${start_time_str} (${start_time_sec})" + echo "End Time : ${end_time_str} (${end_time_sec})" + echo "Total Execution Time: ${diff_time} sec" + + echo "done!!!" + fi +} + +_main diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/utils/qsfp_monitor.sh b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/utils/qsfp_monitor.sh new file mode 100755 index 00000000000..249f179216a --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/utils/qsfp_monitor.sh @@ -0,0 +1,104 @@ +#!/bin/bash +# Copyright (C) 2017 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=3 +I2C_UTILS="/usr/sbin/i2c_utils.sh" +QSFP_SI_SCRIPT="/usr/sbin/qsfp_si_cfg.sh" +QSFP_ARRAY=(0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + +#QSFP SI monitor +function _qsfp_si_monitor { + local i + local status + for i in {0..31}; + do + status=`${I2C_UTILS} i2c_qsfp_status_get $(expr $i + 1) | egrep '^status=.*$' | sed -e 's/status=//g'` + if [ "${status}" == "1" ]; then + _qsfp_type_check $i + fi + done +} + +#QSFP type +function _qsfp_type_check { + local port=$1 + local qsfp_type=`${I2C_UTILS} i2c_qsfp_type_get $(expr $port + 1)` + local identifier=`echo "$qsfp_type" | grep '^identifier=.*$' | sed -e 's/identifier=//g'` + if [ "${identifier}" == "11" ]; then + connector=`echo "$qsfp_type" | grep '^connector=.*$' | sed -e 's/connector=//g'` + case ${connector} in + 21|23) + #DAC + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to DAC" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} dac $port >/dev/null + fi + ;; + *) + #Optical + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to Optical" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} optical $port >/dev/null + fi + ;; + esac + fi +} + +#Docker exist check +function _docker_swss_check { + while true + do + # Check if syncd starts + result=`docker exec -i swss bash -c "echo -en \"SELECT 1\\nHLEN HIDDEN\" | redis-cli | sed -n 2p"` #TBD FIX ME + if [ "$result" == "3" ]; then + return + fi + sleep $INTERVAL + done +} + +#Docker exist check +function _qsfp_si_cfg_script_check { + + if [ -f ${QSFP_SI_SCRIPT} ] && [ -x ${QSFP_SI_SCRIPT} ]; then + echo "SI Script exists. Start monitor." + return + else + echo "SI Script not exist. Exit monitor." + exit + fi +} + +# main function +function _main { + #Check SI Script + _qsfp_si_cfg_script_check + #Check docker swss is running + _docker_swss_check + while true + do + _qsfp_si_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main + diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/utils/s9130_32x_monitor.sh b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/utils/s9130_32x_monitor.sh new file mode 100755 index 00000000000..974da6d5001 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9130-32x/utils/s9130_32x_monitor.sh @@ -0,0 +1,39 @@ +#!/bin/bash +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=5 +I2C_UTILS="/usr/sbin/i2c_utils.sh" + + +# LED status monitor +function _led_monitor { + ${I2C_UTILS} i2c_led_fan_status_set >/dev/null + ${I2C_UTILS} i2c_led_psu_status_set >/dev/null + ${I2C_UTILS} i2c_led_fan_tray_status_set >/dev/null +} + +# main function +function _main { + while true + do + _led_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main \ No newline at end of file diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/README.md b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/README.md new file mode 100644 index 00000000000..d1a2d5464ae --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/README.md @@ -0,0 +1,182 @@ +# Ingrasys S9230-64X Platform Driver for SONiC + +Copyright (C) 2016 Ingrasys, Inc. + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + + +## Licensing terms + +The Licensing terms of the files within this project is split 2 parts. +The Linux kernel is released under the GNU General Public License version 2. +All other code is released under the GNU General Public License version 3. +Please see the LICENSE file for copies of both licenses. + +## Contents of this package + + - service/ + > Service config files for platform initialization and monitoring + - utils/ + > Scripts useful during platform bringup and sysfs function + - conf/ + > Platform configure files. + +## Kernel modules and drivers + +The driver for interacting with Ingrasys S9230-64X is contained in the I2C +kernel module and initialization script. The initialization script loads +the modules in the correct order. It has been built and tested against +the Linux 3.16 kernel. + +The initialization script will modprobe the needed modules, navigate to the +module's device directory in sysfs, and write configuration data to +the kernel module. + +### IGB + +This is OOB Ports on front panel for management plane. + +The IGB module must be loaded first on Ingrasys S9230-64X platform. + +### I2C i801 + +The I2C i801 on Ingrasys S9230-64X can be found in +`/sys/bus/i2c/devices/i2c-0/` + +This is I2C bus for power monitor, FAN controller, HWM and thermal sensors. + +### I2C PCA9548 +The PCA9548 module on S9230-64X can be found in +`/sys/bus/i2c/devices/i2c-1/` , `/sys/bus/i2c/devices/i2c-2/`, +`/sys/bus/i2c/devices/i2c-3/`, `/sys/bus/i2c/devices/i2c-4/`, +`/sys/bus/i2c/devices/i2c-5/`, `/sys/bus/i2c/devices/i2c-6/`, +`/sys/bus/i2c/devices/i2c-7/`, `/sys/bus/i2c/devices/i2c-8/` + +The pca9548 module for CPLD get/set functions, PSU information, +fan status and EEPROM. + +## Hardware components + +The hardware components are initialized in the init script on S9230-64X. +The following describes manual initialization as well as interaction. +The examples below are just for Ingrasys S9230-64X platform. + +### Hardware initialization + +When the sonic-platform-ingrasys-s9230-64X package is installed on the S9230-64X, +it is automatically initialized. If you want to manual initialization, the +utility command usage as follows: +``` + i2c_utils.sh i2c_init +``` + +### EEPROM + +The EEPROM is including the board SKU, model name, vendor name, serial number, +and other information can be accessed with the specific eeprom kernel module. +After using `modprobe eeprom_mb` to detect the eeprom, it will show up in sysfs. + +The hexdump utility can be used to decode the raw output of the EEPROM. +For example, +``` + bash# echo "mb_eeprom 0x55" > /sys/bus/i2c/devices/i2c-0/new_device + bash# cat /sys/bus/i2c/drivers/mb_eeprom/0-0055/eeprom | hexdump -C +``` + +### Front panel LEDs + +LEDs can be setup on/off by using i2c utility `/usr/sbin/i2c_utils.sh`. +Utility function command usage as follows: + +``` +Status LED: + i2c_utils.sh i2c_sys_led green|amber + +Fan status LED: + i2c_utils.sh i2c_fan_led green|amber on|off + +PSU1 status LED: + i2c_utils.sh i2c_psu1_led green|amber on|off + +PSU2 status LED: + i2c_utils.sh i2c_psu2_led green|amber on|off + +``` +QSFP Module Port LEDs control by ASIC library. + + +### Fan speed + +Fan speed are controlled by the w83795 kernel module. +It can be found in `/sys/class/hwmon/hwmon7/device/`. +If they were compiled as modules, you will need to modprobe w83795 for +their sysfs entries to show up. Each fan has an `fan_input` file +for reading the fan speed. And `pwm1` setting fan1 to fan4, +`pwm2` setting fan5 to fan8. + +There is docker-platform-monitor container installed fancontrol package that can +automatic control platform fan speed. + + +### Temperature sensors + +There is docker-platform-monitor container installed lm-sensors package that can +monitor platform temperature. And `sensors` command can show each +temperature sensors status. + +### Power supplies + +Power supplies status and its EEPROM info can be used i2c utility +`/usr/sbin/i2c_utils.sh` to get. +The usage as follows: +``` +PSU EEPROM: + i2c_utils.sh i2c_psu_eeprom_get + hexdump -C psu0.rom + hexdump -C psu1.rom + +PSU Status: + i2c_utils.sh i2c_psu_status +``` + +### QSFPs +QSFP modules are managed by the CPLD 1~5 according to port number. +The i2c utility `/usr/sbin/i2c_utils.sh` can be used to get status and +module EEPROM informations. +The usage as follows: +``` +QSFP EEPROM: + i2c_utils.sh i2c_qsfp_eeprom_get [1-64] + +QSFP Insert Event: + i2c_utils.sh i2c_qsfp_status_get [1-64] + 0 => not insert + 1 => inserted +``` + +### SFP+ +SFP+ modules are managed by the CPLD 1~2 according to port number. +The i2c utility `/usr/sbin/i2c_utils.sh` can be used to get status and +module EEPROM informations. +The usage as follows: +``` +SFP EEPROM: + i2c_utils.sh i2c_sfp_eeprom_get [1-2] + +SFP Insert Event: + i2c_utils.sh i2c_sfp_status_get [1-2] + 0 => not insert + 1 => inserted +``` + diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/Makefile b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/Makefile new file mode 100755 index 00000000000..3107674e871 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/Makefile @@ -0,0 +1,3 @@ +obj-m := eeprom_mb.o +obj-m += ingrasys_s9230_64x_i2c_cpld.o +obj-m += ingrasys_s9230_64x_psu.o diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/eeprom_mb.c b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/eeprom_mb.c new file mode 100755 index 00000000000..528864d9338 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/eeprom_mb.c @@ -0,0 +1,267 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void mb_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t mb_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + mb_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t mb_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "mb_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute mb_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = mb_eeprom_read, + .write = mb_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int mb_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int mb_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &mb_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int mb_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &mb_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id mb_eeprom_id[] = { + { "mb_eeprom", 0 }, + { } +}; + +static struct i2c_driver mb_eeprom_driver = { + .driver = { + .name = "mb_eeprom", + }, + .probe = mb_eeprom_probe, + .remove = mb_eeprom_remove, + .id_table = mb_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = mb_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(mb_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("Ingrasys Mother Borad EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/ingrasys_s9230_64x_i2c_cpld.c b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/ingrasys_s9230_64x_i2c_cpld.c new file mode 100644 index 00000000000..7d832fc0149 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/ingrasys_s9230_64x_i2c_cpld.c @@ -0,0 +1,1259 @@ +/* + * A i2c cpld driver for the ingrasys_s9230_64x + * + * Copyright (C) 2017 Ingrasys Technology Corporation. + * Leo Lin + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "ingrasys_s9230_64x_i2c_cpld.h" + +#ifdef DEBUG +#define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ +} +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ +} + +/* CPLD sysfs attributes index */ +enum s9230_64x_cpld_sysfs_attributes { + CPLD_ACCESS_REG, + CPLD_REGISTER_VAL, + CPLD_PORT_START, + CPLD_PORTS, + CPLD_VERSION, + CPLD_ID, + CPLD_BOARD_TYPE, + CPLD_EXT_BOARD_TYPE, + CPLD_QSFP_PORT_STATUS_1, + CPLD_QSFP_PORT_STATUS_2, + CPLD_QSFP_PORT_STATUS_3, + CPLD_QSFP_PORT_STATUS_4, + CPLD_QSFP_PORT_STATUS_5, + CPLD_QSFP_PORT_STATUS_6, + CPLD_QSFP_PORT_STATUS_7, + CPLD_QSFP_PORT_STATUS_8, + CPLD_QSFP_PORT_STATUS_9, + CPLD_QSFP_PORT_STATUS_10, + CPLD_QSFP_PORT_STATUS_11, + CPLD_QSFP_PORT_STATUS_12, + CPLD_QSFP_PORT_STATUS_13, + CPLD_QSFP_PORT_CONFIG_1, + CPLD_QSFP_PORT_CONFIG_2, + CPLD_QSFP_PORT_CONFIG_3, + CPLD_QSFP_PORT_CONFIG_4, + CPLD_QSFP_PORT_CONFIG_5, + CPLD_QSFP_PORT_CONFIG_6, + CPLD_QSFP_PORT_CONFIG_7, + CPLD_QSFP_PORT_CONFIG_8, + CPLD_QSFP_PORT_CONFIG_9, + CPLD_QSFP_PORT_CONFIG_10, + CPLD_QSFP_PORT_CONFIG_11, + CPLD_QSFP_PORT_CONFIG_12, + CPLD_QSFP_PORT_CONFIG_13, + CPLD_QSFP_PORT_INTERRUPT, + CPLD_SFP_PORT_STATUS, + CPLD_SFP_PORT_CONFIG, + CPLD_10GMUX_CONFIG, + CPLD_BMC_STATUS, + CPLD_BMC_WATCHDOG, + CPLD_USB_STATUS, +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t get_qsfp_port_start(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t get_qsfp_ports(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_version(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_id(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_board_type(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_ext_board_type(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_qsfp_port_status(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_qsfp_port_config(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_qsfp_port_config(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_qsfp_port_interrupt(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_sfp_port_status(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_sfp_port_config(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_sfp_port_config(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_10gmux_config(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_10gmux_config(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_bmc_status(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_bmc_watchdog(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_bmc_watchdog(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_usb_status(struct device *dev, + struct device_attribute *da, char *buf); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +/* CPLD device id and data */ +static const struct i2c_device_id ingrasys_i2c_cpld_id[] = { + { "ingrasys_cpld1", cpld1 }, + { "ingrasys_cpld2", cpld2 }, + { "ingrasys_cpld3", cpld3 }, + { "ingrasys_cpld4", cpld4 }, + { "ingrasys_cpld5", cpld5 }, + {} +}; + +/* Addresses scanned for ingrasys_i2c_cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x33, I2C_CLIENT_END }; + +/* define all support register access of cpld in attribute */ +static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, + read_access_register, write_access_register, CPLD_ACCESS_REG); +static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, + read_register_value, write_register_value, CPLD_REGISTER_VAL); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_start, S_IRUGO, + get_qsfp_port_start, NULL, CPLD_PORT_START); +static SENSOR_DEVICE_ATTR(cpld_qsfp_ports, S_IRUGO, + get_qsfp_ports, NULL, CPLD_PORTS); +static SENSOR_DEVICE_ATTR(cpld_version, S_IRUGO, + read_cpld_version, NULL, CPLD_VERSION); +static SENSOR_DEVICE_ATTR(cpld_id, S_IRUGO, read_cpld_id, NULL, CPLD_ID); +static SENSOR_DEVICE_ATTR(cpld_board_type, S_IRUGO, + read_board_type, NULL, CPLD_BOARD_TYPE); +static SENSOR_DEVICE_ATTR(cpld_ext_board_type, S_IRUGO, + read_ext_board_type, NULL, CPLD_EXT_BOARD_TYPE); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_1, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_1); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_2, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_2); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_3, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_3); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_4, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_4); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_5, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_5); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_6, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_6); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_7, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_7); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_8, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_8); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_9, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_9); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_10, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_10); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_11, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_11); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_12, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_12); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_status_13, S_IRUGO, + read_qsfp_port_status, NULL, CPLD_QSFP_PORT_STATUS_13); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_1, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, CPLD_QSFP_PORT_CONFIG_1); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_2, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_2); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_3, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_3); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_4, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_4); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_5, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_5); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_6, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_6); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_7, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_7); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_8, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_8); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_9, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_9); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_10, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_10); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_11, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_11); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_12, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_12); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_config_13, S_IWUSR | S_IRUGO, + read_qsfp_port_config, write_qsfp_port_config, + CPLD_QSFP_PORT_CONFIG_13); +static SENSOR_DEVICE_ATTR(cpld_qsfp_port_interrupt, S_IRUGO, + read_qsfp_port_interrupt, NULL, CPLD_QSFP_PORT_INTERRUPT); +static SENSOR_DEVICE_ATTR(cpld_sfp_port_status, S_IRUGO, + read_sfp_port_status, NULL, CPLD_SFP_PORT_STATUS); +static SENSOR_DEVICE_ATTR(cpld_sfp_port_config, S_IWUSR | S_IRUGO, + read_sfp_port_config, write_sfp_port_config, CPLD_SFP_PORT_CONFIG); +static SENSOR_DEVICE_ATTR(cpld_10gmux_config, S_IWUSR | S_IRUGO, + read_10gmux_config, write_10gmux_config, + CPLD_10GMUX_CONFIG); +static SENSOR_DEVICE_ATTR(cpld_bmc_status, S_IRUGO, + read_bmc_status, NULL, CPLD_BMC_STATUS); +static SENSOR_DEVICE_ATTR(cpld_bmc_watchdog, S_IWUSR | S_IRUGO, + read_bmc_watchdog, write_bmc_watchdog, + CPLD_BMC_WATCHDOG); +static SENSOR_DEVICE_ATTR(cpld_usb_status, S_IRUGO, + read_usb_status, NULL, CPLD_USB_STATUS); + + +/* define support attributes of cpldx , total 5 */ +/* cpld 1 */ +static struct attribute *s9230_64x_cpld1_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_start.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_ports.dev_attr.attr, + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_board_type.dev_attr.attr, + &sensor_dev_attr_cpld_ext_board_type.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_4.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_5.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_6.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_7.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_8.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_9.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_10.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_11.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_12.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_4.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_5.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_6.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_7.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_8.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_9.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_10.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_11.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_12.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_interrupt.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_port_status.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_port_config.dev_attr.attr, + &sensor_dev_attr_cpld_10gmux_config.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_status.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_watchdog.dev_attr.attr, + &sensor_dev_attr_cpld_usb_status.dev_attr.attr, + NULL +}; +/* cpld 2 */ +static struct attribute *s9230_64x_cpld2_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_start.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_ports.dev_attr.attr, + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_4.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_5.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_6.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_7.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_8.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_9.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_10.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_11.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_12.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_13.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_4.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_5.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_6.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_7.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_8.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_9.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_10.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_11.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_12.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_13.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_interrupt.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_port_status.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_port_config.dev_attr.attr, + NULL +}; +/* cpld 3 / cpld 4 / cpld 5 */ +static struct attribute *s9230_64x_cpld345_attributes[] = { +&sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_start.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_ports.dev_attr.attr, + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_4.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_5.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_6.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_7.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_8.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_9.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_10.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_11.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_12.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_status_13.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_4.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_5.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_6.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_7.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_8.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_9.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_10.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_11.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_12.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_config_13.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp_port_interrupt.dev_attr.attr, + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group s9230_64x_cpld1_group = { + .attrs = s9230_64x_cpld1_attributes, +}; +/* cpld 2 attributes group */ +static const struct attribute_group s9230_64x_cpld2_group = { + .attrs = s9230_64x_cpld2_attributes, +}; +/* cpld 3/4/5 attributes group */ +static const struct attribute_group s9230_64x_cpld345_group = { + .attrs = s9230_64x_cpld345_attributes, +}; + +/* read access register from cpld data */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + + return sprintf(buf, "0x%x\n", reg); +} + +/* write access register to cpld data */ +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + + if (kstrtou8(buf, 0, ®) < 0) + return -EINVAL; + + data->access_reg = reg; + return count; +} + +/* read the value of access register in cpld data */ +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (reg_val < 0) + return -1; + + return sprintf(buf, "0x%x\n", reg_val); +} + +/* wrtie the value to access register in cpld data */ +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int ret = -EIO; + u8 reg = data->access_reg; + u8 reg_val; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val); + + return count; +} + +/* get qsfp port start number of the cpld device */ +/* the start number use to tranlate qsfp port to cpld port */ +/* the cpld port use to access the qsfp port register in cpld */ +static ssize_t get_qsfp_port_start(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int port_base_num; + + if (attr->index == CPLD_PORT_START) { + if (data->index == cpld1) { + port_base_num = 1; + } else { + port_base_num = CPLD_1_PORT_NUM + + CPLD_2_PORT_NUM*(data->index - 1) + 1; + } + return sprintf(buf, "%d\n", port_base_num); + } + return -1; +} + +/* get total qsfp port which contain register in the cpld device */ +static ssize_t get_qsfp_ports(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int ports; + + if (attr->index == CPLD_PORTS) { + if (data->index == cpld1) + ports = CPLD_1_PORT_NUM; + else + ports = CPLD_2_PORT_NUM; + return sprintf(buf, "%d\n", ports); + } + return -1; +} + +/* get cpdl version register value */ +static ssize_t read_cpld_version(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_VERSION) { + reg = CPLD_VERSION_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get cpdl id register value */ +static ssize_t read_cpld_id(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_ID) { + reg = CPLD_ID_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get board type register value */ +static ssize_t read_board_type(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_BOARD_TYPE) { + reg = CPLD_BOARD_TYPE_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get extend board type register value */ +static ssize_t read_ext_board_type(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_EXT_BOARD_TYPE) { + reg = CPLD_EXT_BOARD_TYPE_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get qsfp port status register value */ +static ssize_t read_qsfp_port_status(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index >= CPLD_QSFP_PORT_STATUS_1 && + attr->index <= CPLD_QSFP_PORT_STATUS_13) { + reg = CPLD_QSFP_PORT_STATUS_BASE_REG + + (attr->index - CPLD_QSFP_PORT_STATUS_1); + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get qsfp port config register value */ +static ssize_t read_qsfp_port_config(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index >= CPLD_QSFP_PORT_CONFIG_1 && + attr->index <= CPLD_QSFP_PORT_CONFIG_13) { + reg = CPLD_QSFP_PORT_CONFIG_BASE_REG + + (attr->index - CPLD_QSFP_PORT_CONFIG_1); + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* set value to qsfp port config register */ +static ssize_t write_qsfp_port_config(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg, reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + if (attr->index >= CPLD_QSFP_PORT_CONFIG_1 && + attr->index <= CPLD_QSFP_PORT_CONFIG_13) { + reg = CPLD_QSFP_PORT_CONFIG_BASE_REG + + (attr->index - CPLD_QSFP_PORT_CONFIG_1); + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + } + return count; +} + +/* get qsfp port interrupt register value */ +static ssize_t read_qsfp_port_interrupt(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_QSFP_PORT_INTERRUPT) { + reg = CPLD_QSFP_PORT_INTERRUPT_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get sfp port status register value */ +static ssize_t read_sfp_port_status(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_SFP_PORT_STATUS) { + reg = CPLD_SFP_PORT_STATUS_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get sfp port config register value */ +static ssize_t read_sfp_port_config(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_SFP_PORT_CONFIG) { + reg = CPLD_SFP_PORT_CONFIG_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* set value to sfp port config register */ +static ssize_t write_sfp_port_config(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg, reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + if (attr->index == CPLD_SFP_PORT_CONFIG) { + reg = CPLD_SFP_PORT_CONFIG_REG; + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + } + return count; +} + +/* get 10g mux config register value */ +static ssize_t read_10gmux_config(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_10GMUX_CONFIG) { + reg = CPLD_10GMUX_CONFIG_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* set value to 10g mux config register */ +static ssize_t write_10gmux_config(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg, reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + if (attr->index == CPLD_10GMUX_CONFIG) { + reg = CPLD_10GMUX_CONFIG_REG; + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + } + return count; +} + +/* get bmc status register value */ +static ssize_t read_bmc_status(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_BMC_STATUS) { + reg = CPLD_BMC_STATUS_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* get bmc watchdog register value */ +static ssize_t read_bmc_watchdog(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_BMC_WATCHDOG) { + reg = CPLD_BMC_WATCHDOG_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* set value to bmc watchdog register */ +static ssize_t write_bmc_watchdog(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg, reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + if (attr->index == CPLD_BMC_WATCHDOG) { + reg = CPLD_BMC_WATCHDOG_REG; + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + } + return count; +} + +/* get usb status register value */ +static ssize_t read_usb_status(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + int reg_val; + + if (attr->index == CPLD_USB_STATUS) { + reg = CPLD_USB_STATUS_REG; + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (reg_val < 0) + return -1; + return sprintf(buf, "0x%02x\n", reg_val); + } + return -1; +} + +/* add valid cpld client to list */ +static void ingrasys_i2c_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void ingrasys_i2c_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int ingrasys_i2c_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + int ret = -EPERM; + int err; + int idx; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + /* get cpld id from device */ + ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); + + if (ret < 0) { + dev_info(&client->dev, + "fail to get cpld id (0x%x) at addr (0x%x)\n", + CPLD_ID_REG, client->addr); + status = -EIO; + goto exit; + } + + CPLD_ID_ID_GET(ret, idx); + + if (INVALID(idx, cpld1, cpld5)) { + dev_info(&client->dev, + "cpld id %d(device) not valid\n", idx); + //status = -EPERM; + //goto exit; + } + +#if 0 + /* change client name for each cpld with index */ + snprintf(client->name, sizeof(client->name), "%s_%d", client->name, + data->index); +#endif + + data->index = dev_id->driver_data; + + /* register sysfs hooks for different cpld group */ + dev_info(&client->dev, "probe cpld with index %d\n", data->index); + switch (data->index) { + case cpld1: + status = sysfs_create_group(&client->dev.kobj, + &s9230_64x_cpld1_group); + break; + case cpld2: + status = sysfs_create_group(&client->dev.kobj, + &s9230_64x_cpld2_group); + break; + case cpld3: + case cpld4: + case cpld5: + status = sysfs_create_group(&client->dev.kobj, + &s9230_64x_cpld345_group); + break; + default: + status = -EINVAL; + } + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + ingrasys_i2c_cpld_add_client(client); + + return 0; +exit: + sysfs_remove_group(&client->dev.kobj, &s9230_64x_cpld345_group); + return status; +} + +/* cpld drvier remove */ +static int ingrasys_i2c_cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &s9230_64x_cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &s9230_64x_cpld2_group); + break; + case cpld3: + case cpld4: + case cpld5: + sysfs_remove_group(&client->dev.kobj, + &s9230_64x_cpld345_group); + break; + } + + ingrasys_i2c_cpld_remove_client(client); + return 0; +} + +MODULE_DEVICE_TABLE(i2c, ingrasys_i2c_cpld_id); + +static struct i2c_driver ingrasys_i2c_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "ingrasys_i2c_cpld", + }, + .probe = ingrasys_i2c_cpld_probe, + .remove = ingrasys_i2c_cpld_remove, + .id_table = ingrasys_i2c_cpld_id, + .address_list = cpld_i2c_addr, +}; + +/* provid cpld register read */ +/* cpld_idx indicate the index of cpld device */ +int ingrasys_i2c_cpld_read(u8 cpld_idx, + u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + if (data->index == cpld_idx) { + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x", + cpld_idx, reg); + I2C_READ_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, reg); + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x = 0x%02x", + cpld_idx, reg, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_read); + +/* provid cpld register write */ +/* cpld_idx indicate the index of cpld device */ +int ingrasys_i2c_cpld_write(u8 cpld_idx, + u8 reg, + u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + + if (data->index == cpld_idx) { + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, + reg, value); + DEBUG_PRINT("cpld_idx=%d, write reg 0x%02x val 0x%02x, ret=%d", + cpld_idx, reg, value, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_write); + +/* provid qsfp port status register read */ +/* port_num indicate the front panel qsfp port number */ +int ingrasys_i2c_cpld_get_qsfp_port_status_val(u8 port_num) +{ + u8 cpld_idx, cpld_port, reg; + int reg_val; + + if (INVALID(port_num, QSFP_MIN_PORT_NUM, QSFP_MAX_PORT_NUM)) { + DEBUG_PRINT("invalid input value %d", port_num); + return -1; + } + QSFP_TO_CPLD_IDX(port_num, cpld_idx, cpld_port); + reg = QSFP_PORT_STATUS_REG(cpld_port); + DEBUG_PRINT("port_num=%d, cpld_idx=%d, cpld_port=%d, reg=0x%x", + port_num, cpld_idx, cpld_port, reg); + reg_val = ingrasys_i2c_cpld_read(cpld_idx, reg); + return reg_val; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_get_qsfp_port_status_val); + +/* provid qsfp port config register read */ +/* port_num indicate the front panel qsfp port number */ +int ingrasys_i2c_cpld_get_qsfp_port_config_val(u8 port_num) +{ + u8 cpld_idx, cpld_port, reg; + int reg_val; + + if (INVALID(port_num, QSFP_MIN_PORT_NUM, QSFP_MAX_PORT_NUM)) { + DEBUG_PRINT("invalid input value %d", port_num); + return -1; + } + QSFP_TO_CPLD_IDX(port_num, cpld_idx, cpld_port); + reg = QSFP_PORT_CONFIG_REG(cpld_port); + DEBUG_PRINT("port_num=%d, cpld_idx=%d, cpld_port=%d, reg=0x%x", + port_num, cpld_idx, cpld_port, reg); + reg_val = ingrasys_i2c_cpld_read(cpld_idx, reg); + return reg_val; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_get_qsfp_port_config_val); + +/* provid qsfp port config register write */ +/* port_num indicate the front panel qsfp port number */ +int ingrasys_i2c_cpld_set_qsfp_port_config_val(u8 port_num, + u8 reg_val) +{ + u8 cpld_idx, cpld_port, reg, ret; + + if (INVALID(port_num, QSFP_MIN_PORT_NUM, QSFP_MAX_PORT_NUM)) { + DEBUG_PRINT("invalid input value %d", port_num); + return -1; + } + QSFP_TO_CPLD_IDX(port_num, cpld_idx, cpld_port); + reg = QSFP_PORT_CONFIG_REG(cpld_port); + DEBUG_PRINT("port_num=%d, cpld_idx=%d, cpld_port=%d, reg=0x%x", + port_num, cpld_idx, cpld_port, reg); + ret = ingrasys_i2c_cpld_write(cpld_idx, reg, reg_val); + return ret; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_set_qsfp_port_config_val); + +/* provid sfp port status register read */ +/* port_num indicate the front panel qsfp port number */ +int ingrasys_i2c_cpld_get_sfp_port_status_val(u8 port_num) +{ + u8 cpld_idx, reg; + int reg_val; + + if (INVALID(port_num, SFP_MIN_PORT_NUM, SFP_MAX_PORT_NUM)) { + DEBUG_PRINT("invalid input value %d", port_num); + return -1; + } + SFP_TO_CPLD_IDX(port_num, cpld_idx); + reg = CPLD_SFP_PORT_STATUS_REG; + DEBUG_PRINT("port_num=%d, cpld_idx=%d, reg=0x%x", + port_num, cpld_idx, reg); + reg_val = ingrasys_i2c_cpld_read(cpld_idx, reg); + return reg_val; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_get_sfp_port_status_val); + +/* provid qsfp port config register read */ +/* port_num indicate the front panel qsfp port number */ +int ingrasys_i2c_cpld_get_sfp_port_config_val(u8 port_num) +{ + u8 cpld_idx, reg; + int reg_val; + + if (INVALID(port_num, SFP_MIN_PORT_NUM, SFP_MAX_PORT_NUM)) { + DEBUG_PRINT("invalid input value %d", port_num); + return -1; + } + SFP_TO_CPLD_IDX(port_num, cpld_idx); + reg = CPLD_SFP_PORT_CONFIG_REG; + DEBUG_PRINT("port_num=%d, cpld_idx=%d, reg=0x%x", + port_num, cpld_idx, reg); + reg_val = ingrasys_i2c_cpld_read(cpld_idx, reg); + return reg_val; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_get_sfp_port_config_val); + +/* provid qsfp port config register write */ +/* port_num indicate the front panel qsfp port number */ +int ingrasys_i2c_cpld_set_sfp_port_config_val(u8 port_num, + u8 reg_val) +{ + u8 cpld_idx, reg, ret; + + if (INVALID(port_num, SFP_MIN_PORT_NUM, SFP_MAX_PORT_NUM)) { + DEBUG_PRINT("invalid input value %d", port_num); + return -1; + } + SFP_TO_CPLD_IDX(port_num, cpld_idx); + reg = CPLD_SFP_PORT_CONFIG_REG; + DEBUG_PRINT("port_num=%d, cpld_idx=%d, reg=0x%x", + port_num, cpld_idx, reg); + ret = ingrasys_i2c_cpld_write(cpld_idx, reg, reg_val); + return ret; +} +EXPORT_SYMBOL(ingrasys_i2c_cpld_set_sfp_port_config_val); + +static int __init ingrasys_i2c_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&ingrasys_i2c_cpld_driver); +} + +static void __exit ingrasys_i2c_cpld_exit(void) +{ + i2c_del_driver(&ingrasys_i2c_cpld_driver); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("ingrasys_i2c_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(ingrasys_i2c_cpld_init); +module_exit(ingrasys_i2c_cpld_exit); + diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/ingrasys_s9230_64x_i2c_cpld.h b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/ingrasys_s9230_64x_i2c_cpld.h new file mode 100644 index 00000000000..e0e53174d67 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/ingrasys_s9230_64x_i2c_cpld.h @@ -0,0 +1,223 @@ +/* header file for i2c cpld driver of ingrasys_s9230_64x + * + * Copyright (C) 2017 Ingrasys Technology Corporation. + * Leo Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef INGRASYS_S9230_64X_I2C_CPLD_H +#define INGRASYS_S9230_64X_I2C_CPLD_H + +/* CPLD device index value */ +enum cpld_id { + cpld1, + cpld2, + cpld3, + cpld4, + cpld5 +}; + +/* port number on CPLD */ +#define CPLD_1_PORT_NUM 12 +#define CPLD_2_PORT_NUM 13 + +/* QSFP port number */ +#define QSFP_MAX_PORT_NUM 64 +#define QSFP_MIN_PORT_NUM 1 + +/* SFP+ port number */ +#define SFP_MAX_PORT_NUM 2 +#define SFP_MIN_PORT_NUM 1 + + +/* CPLD registers */ +#define CPLD_BOARD_TYPE_REG 0x0 +#define CPLD_EXT_BOARD_TYPE_REG 0x7 +#define CPLD_VERSION_REG 0x1 +#define CPLD_ID_REG 0x2 +#define CPLD_QSFP_PORT_STATUS_BASE_REG 0x20 +#define CPLD_QSFP_PORT_CONFIG_BASE_REG 0x30 +#define CPLD_QSFP_PORT_INTERRUPT_REG 0x40 +#define CPLD_SFP_PORT_STATUS_REG 0x2F +#define CPLD_SFP_PORT_CONFIG_REG 0x3F +#define CPLD_QSFP_PORT_INTERRUPT_REG 0x40 +#define CPLD_10GMUX_CONFIG_REG 0x41 +#define CPLD_BMC_STATUS_REG 0x42 +#define CPLD_BMC_WATCHDOG_REG 0x43 +#define CPLD_USB_STATUS_REG 0x44 +#define CPLD_REST_CONTROL_REG 0x4A + + +/* bit definition for register value */ +enum CPLD_QSFP_PORT_STATUS_BITS { + CPLD_QSFP_PORT_STATUS_INT_BIT, + CPLD_QSFP_PORT_STATUS_ABS_BIT, +}; +enum CPLD_QSFP_PORT_CONFIG_BITS { + CPLD_QSFP_PORT_CONFIG_RESET_BIT, + CPLD_QSFP_PORT_CONFIG_RESERVE_BIT, + CPLD_QSFP_PORT_CONFIG_LPMODE_BIT, +}; +enum CPLD_SFP_PORT_STATUS_BITS { + CPLD_SFP_PORT_STATUS_PRESENT_BIT, + CPLD_SFP_PORT_STATUS_TXFAULT_BIT, + CPLD_SFP_PORT_STATUS_RXLOS_BIT, +}; +enum CPLD_SFP_PORT_CONFIG_BITS { + CPLD_SFP_PORT_CONFIG_TXDIS_BIT, + CPLD_SFP_PORT_CONFIG_RS_BIT, + CPLD_SFP_PORT_CONFIG_TS_BIT, +}; +enum CPLD_10GMUX_CONFIG_BITS { + CPLD_10GMUX_CONFIG_ENSMB_BIT, + CPLD_10GMUX_CONFIG_ENINPUT_BIT, + CPLD_10GMUX_CONFIG_SEL1_BIT, + CPLD_10GMUX_CONFIG_SEL0_BIT, +}; +enum CPLD_BMC_WATCHDOG_BITS { + CPLD_10GMUX_CONFIG_ENTIMER_BIT, + CPLD_10GMUX_CONFIG_TIMEOUT_BIT, +}; +enum CPLD_RESET_CONTROL_BITS { + CPLD_RESET_CONTROL_SWRST_BIT, + CPLD_RESET_CONTROL_CP2104RST_BIT, + CPLD_RESET_CONTROL_82P33814RST_BIT, + CPLD_RESET_CONTROL_BMCRST_BIT, +}; + +/* bit field structure for register value */ +struct cpld_reg_board_type_t { + u8 build_rev:2; + u8 hw_rev:2; + u8 board_id:4; +}; + +struct cpld_reg_version_t { + u8 revision:6; + u8 release:1; + u8 reserve:1; +}; + +struct cpld_reg_id_t { + u8 id:3; + u8 release:5; +}; + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) +#define READ_BIT(val, bit) ((0u == (val & (1<bf_name) +#define READ_BF_1(bf_struct, val, bf_name, bf_value) \ + bf_struct bf; \ + bf.data = val; \ + bf_value = bf.bf_name +#define BOARD_TYPE_BUILD_REV_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, build_rev, res) +#define BOARD_TYPE_HW_REV_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, hw_rev, res) +#define BOARD_TYPE_BOARD_ID_GET(val, res) \ + READ_BF(cpld_reg_board_type_t, val, board_id, res) +#define CPLD_VERSION_REV_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, revision, res) +#define CPLD_VERSION_REL_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, release, res) +#define CPLD_ID_ID_GET(val, res) \ + READ_BF(cpld_reg_id_t, val, id, res) +#define CPLD_ID_REL_GET(val, res) \ + READ_BF(cpld_reg_id_t, val, release, res) +/* QSFP/SFP registers manipulation */ +#define QSFP_TO_CPLD_IDX(qsfp_port, cpld_index, cpld_port) \ +{ \ + if (QSFP_MIN_PORT_NUM <= qsfp_port && qsfp_port <= CPLD_1_PORT_NUM) { \ + cpld_index = cpld1; \ + cpld_port = qsfp_port - 1; \ + } else if (CPLD_1_PORT_NUM < qsfp_port \ + && qsfp_port <= QSFP_MAX_PORT_NUM) { \ + cpld_index = cpld2 + (qsfp_port - 1 - CPLD_1_PORT_NUM) \ + / CPLD_2_PORT_NUM; \ + cpld_port = (qsfp_port - 1 - CPLD_1_PORT_NUM) % \ + CPLD_2_PORT_NUM; \ + } else { \ + cpld_index = 0; \ + cpld_port = 0; \ + } \ +} +#define SFP_TO_CPLD_IDX(sfp_port, cpld_index) \ + (cpld_index = sfp_port - SFP_MIN_PORT_NUM) +#define QSFP_PORT_STATUS_REG(cpld_port) \ + (CPLD_QSFP_PORT_STATUS_BASE_REG + cpld_port) +#define QSFP_PORT_CONFIG_REG(cpld_port) \ + (CPLD_QSFP_PORT_CONFIG_BASE_REG + cpld_port) +#define QSFP_PORT_INT_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_QSFP_PORT_STATUS_INT_BIT) +#define QSFP_PORT_ABS_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_QSFP_PORT_STATUS_ABS_BIT) +#define QSFP_PORT_RESET_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_LPMODE_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define QSFP_PORT_RESET_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_RESET_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT) +#define QSFP_PORT_LPMODE_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define QSFP_PORT_LPMODE_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT) +#define SFP_PORT_PRESENT_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_STATUS_PRESENT_BIT) + +#define SFP_PORT_TXFAULT_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_STATUS_TXFAULT_BIT) +#define SFP_PORT_RXLOS_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_STATUS_RXLOS_BIT) +#define SFP_PORT_TXDIS_BIT_GET(port_status_value) \ + READ_BIT(port_status_value, CPLD_SFP_PORT_CONFIG_TXDIS_BIT) +#define SFP_PORT_RS_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_RS_BIT) +#define SFP_PORT_TS_BIT_GET(port_config_value) \ + READ_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TS_BIT) +#define SFP_PORT_TXDIS_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TXDIS_BIT) +#define SFP_PORT_TXDIS_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TXDIS_BIT) +#define SFP_PORT_RS_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_RS_BIT) +#define SFP_PORT_RS_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_RS_BIT) +#define SFP_PORT_TS_BIT_SET(port_config_value) \ + SET_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TS_BIT) +#define SFP_PORT_TS_BIT_CLEAR(port_config_value) \ + CLEAR_BIT(port_config_value, CPLD_SFP_PORT_CONFIG_TS_BIT) + +/* CPLD access functions */ +extern int ingrasys_i2c_cpld_get_qsfp_port_status_val(u8 port_num); +extern int ingrasys_i2c_cpld_get_qsfp_port_config_val(u8 port_num); +extern int ingrasys_i2c_cpld_set_qsfp_port_config_val(u8 port_num, u8 reg_val); +extern int ingrasys_i2c_cpld_get_sfp_port_status_val(u8 port_num); +extern int ingrasys_i2c_cpld_get_sfp_port_config_val(u8 port_num); +extern int ingrasys_i2c_cpld_set_sfp_port_config_val(u8 port_num, u8 reg_val); +extern u8 fp_port_to_phy_port(u8 fp_port); +#endif + diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/ingrasys_s9230_64x_platform.h b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/ingrasys_s9230_64x_platform.h new file mode 100644 index 00000000000..a14853fdae9 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/ingrasys_s9230_64x_platform.h @@ -0,0 +1,148 @@ +#ifndef _S9230_64X_PLATFORM_H +#define _S9230_64X_PLATFORM_H + +#include + +// remove debug before release +#define DEBUG + +enum bus_order { + I2C_BUS_MAIN, + MUX_9548_0_CH0, + MUX_9548_0_CH1, + MUX_9548_0_CH2, + MUX_9548_0_CH3, + MUX_9548_0_CH4, + MUX_9548_0_CH5, + MUX_9548_0_CH6, + MUX_9548_0_CH7, + MUX_9548_1_CH0, + MUX_9548_1_CH1, + MUX_9548_1_CH2, + MUX_9548_1_CH3, + MUX_9548_1_CH4, + MUX_9548_1_CH5, + MUX_9548_1_CH6, + MUX_9548_1_CH7, + MUX_9546_0_CH0, + MUX_9546_0_CH1, + MUX_9546_0_CH2, + MUX_9546_0_CH3, + MUX_9546_1_CH0, + MUX_9546_1_CH1, + MUX_9546_1_CH2, + MUX_9546_1_CH3, + MUX_9548_2_CH0, + MUX_9548_2_CH1, + MUX_9548_2_CH2, + MUX_9548_2_CH3, + MUX_9548_2_CH4, + MUX_9548_2_CH5, + MUX_9548_2_CH6, + MUX_9548_2_CH7, + MUX_9548_3_CH0, + MUX_9548_3_CH1, + MUX_9548_3_CH2, + MUX_9548_3_CH3, + MUX_9548_3_CH4, + MUX_9548_3_CH5, + MUX_9548_3_CH6, + MUX_9548_3_CH7, + MUX_9548_4_CH0, + MUX_9548_4_CH1, + MUX_9548_4_CH2, + MUX_9548_4_CH3, + MUX_9548_4_CH4, + MUX_9548_4_CH5, + MUX_9548_4_CH6, + MUX_9548_4_CH7, + MUX_9548_5_CH0, + MUX_9548_5_CH1, + MUX_9548_5_CH2, + MUX_9548_5_CH3, + MUX_9548_5_CH4, + MUX_9548_5_CH5, + MUX_9548_5_CH6, + MUX_9548_5_CH7, + MUX_9548_6_CH0, + MUX_9548_6_CH1, + MUX_9548_6_CH2, + MUX_9548_6_CH3, + MUX_9548_6_CH4, + MUX_9548_6_CH5, + MUX_9548_6_CH6, + MUX_9548_6_CH7, + MUX_9548_7_CH0, + MUX_9548_7_CH1, + MUX_9548_7_CH2, + MUX_9548_7_CH3, + MUX_9548_7_CH4, + MUX_9548_7_CH5, + MUX_9548_7_CH6, + MUX_9548_7_CH7, + MUX_9548_8_CH0, + MUX_9548_8_CH1, + MUX_9548_8_CH2, + MUX_9548_8_CH3, + MUX_9548_8_CH4, + MUX_9548_8_CH5, + MUX_9548_8_CH6, + MUX_9548_8_CH7, + MUX_9548_9_CH0, + MUX_9548_9_CH1, + MUX_9548_9_CH2, + MUX_9548_9_CH3, + MUX_9548_9_CH4, + MUX_9548_9_CH5, + MUX_9548_9_CH6, + MUX_9548_9_CH7, + MUX_9548_10_CH0, + MUX_9548_10_CH1, + MUX_9548_10_CH2, + MUX_9548_10_CH3, + MUX_9548_10_CH4, + MUX_9548_10_CH5, + MUX_9548_10_CH6, + MUX_9548_10_CH7, +}; + +#define I2C_ADDR_MUX_9555_0 (0x20) +#define I2C_ADDR_MUX_9555_1 (0x24) +#define I2C_ADDR_MUX_9555_2 (0x25) +#define I2C_ADDR_MUX_9555_3 (0x26) +#define I2C_ADDR_MUX_9539_0 (0x76) +#define I2C_ADDR_MUX_9539_1 (0x76) +#define I2C_BUS_FAN_STATUS (I2C_BUS_MAIN) +#define I2C_BUS_SYS_LED (MUX_9548_1_CH1) + +#define NUM_OF_I2C_MUX (11) +#define NUM_OF_CPLD (5) +#define NUM_OF_QSFP_PORT (64) +#define NUM_OF_SFP_PORT (2) +#define QSFP_EEPROM_I2C_ADDR (0x50) + +enum gpio_reg { + REG_PORT0_IN, + REG_PORT1_IN, + REG_PORT0_OUT, + REG_PORT1_OUT, + REG_PORT0_POL, + REG_PORT1_POL, + REG_PORT0_DIR, + REG_PORT1_DIR, +}; + +struct ing_i2c_board_info { + int ch; + int size; + struct i2c_board_info *board_info; +}; + +struct i2c_init_data { + __u16 ch; + __u16 addr; + __u8 reg; + __u8 value; +}; + +#endif diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/ingrasys_s9230_64x_psu.c b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/ingrasys_s9230_64x_psu.c new file mode 100644 index 00000000000..694b57bd748 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/modules/ingrasys_s9230_64x_psu.c @@ -0,0 +1,388 @@ +/* + * S9230-64x PSU driver + * + * Copyright (C) 2017 Ingrasys, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "ingrasys_s9230_64x_platform.h" + +static ssize_t show_psu_eeprom(struct device *dev, + struct device_attribute *da, + char *buf); +static struct s9230_psu_data *s9230_psu_update_status(struct device *dev); +static struct s9230_psu_data *s9230_psu_update_eeprom(struct device *dev); +static int s9230_psu_read_block(struct i2c_client *client, + u8 command, + u8 *data, + int data_len); + + +#define DRIVER_NAME "psu" + +// Addresses scanned +static const unsigned short normal_i2c[] = { 0x50, I2C_CLIENT_END }; + +/* PSU EEPROM SIZE */ +#define EEPROM_SZ 256 +#define READ_EEPROM 1 +#define NREAD_EEPROM 0 + +static struct i2c_client pca9555_client; + +/* pca9555 gpio pin mapping */ +#define PSU2_PWROK 0 +#define PSU2_PRSNT_L 1 +#define PSU2_PWRON_L 2 +#define PSU1_PWROK 3 +#define PSU1_PRSNT_L 4 +#define PSU1_PWRON_L 5 +#define TMP_75_INT_L 6 + +/* Driver Private Data */ +struct s9230_psu_data { + struct mutex lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 index; /* PSU index */ + s32 status; /* IO expander value */ + char eeprom[EEPROM_SZ]; /* psu eeprom data */ + char psuABS; /* PSU absent */ + char psuPG; /* PSU power good */ +}; + +enum psu_index +{ + s9230_psu1, + s9230_psu2 +}; + +/* + * display power good attribute + */ +static ssize_t +show_psu_pg(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct s9230_psu_data *data = s9230_psu_update_status(dev); + unsigned int value; + + mutex_lock(&data->lock); + value = data->psuPG; + mutex_unlock(&data->lock); + + return sprintf(buf, "%d\n", value); +} + +/* + * display power absent attribute + */ +static ssize_t +show_psu_abs(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct s9230_psu_data *data = s9230_psu_update_status(dev); + unsigned int value; + + mutex_lock(&data->lock); + value = data->psuABS; + mutex_unlock(&data->lock); + + return sprintf(buf, "%d\n", value); +} + + +/* + * sysfs attributes for psu + */ +static DEVICE_ATTR(psu_pg, S_IRUGO, show_psu_pg, NULL); +static DEVICE_ATTR(psu_abs, S_IRUGO, show_psu_abs, NULL); +static DEVICE_ATTR(psu_eeprom, S_IRUGO, show_psu_eeprom, NULL); + +static struct attribute *s9230_psu_attributes[] = { + &dev_attr_psu_pg.attr, + &dev_attr_psu_abs.attr, + &dev_attr_psu_eeprom.attr, + NULL +}; + +/* + * display psu eeprom content + */ +static ssize_t +show_psu_eeprom(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct s9230_psu_data *data = s9230_psu_update_eeprom(dev); + + memcpy(buf, (char *)data->eeprom, EEPROM_SZ); + return EEPROM_SZ; +} + +static const struct attribute_group s9230_psu_group = { + .attrs = s9230_psu_attributes, +}; + +/* + * check gpio expander is accessible + */ +static int +pca9555_detect(struct i2c_client *client) +{ + if (i2c_smbus_read_byte_data(client, REG_PORT0_DIR) < 0) { + return -ENODEV; + } + + return 0; +} + +/* + * client address init + */ +static void +i2c_devices_client_address_init(struct i2c_client *client) +{ + pca9555_client = *client; + pca9555_client.addr = 0x25; +} + +static int +s9230_psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct s9230_psu_data *data; + int status, err; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct s9230_psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + memset(data, 0, sizeof(struct s9230_psu_data)); + i2c_set_clientdata(client, data); + data->valid = 0; + data->index = dev_id->driver_data; + mutex_init(&data->lock); + + i2c_devices_client_address_init(client); + + err = pca9555_detect(&pca9555_client); + if (err) { + return err; + } + + dev_info(&client->dev, "chip found\n"); + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &s9230_psu_group); + if (status) { + goto exit_free; + } + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &s9230_psu_group); +exit_free: + kfree(data); +exit: + + return status; +} + +static int +s9230_psu_remove(struct i2c_client *client) +{ + struct s9230_psu_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &s9230_psu_group); + kfree(data); + + return 0; +} + + +/* + * psu eeprom read utility + */ +static int +s9230_psu_read_block(struct i2c_client *client, + u8 command, + u8 *data, + int data_len) +{ + int i=0, ret=0; + int blk_max = 32; //max block read size + + /* read eeprom, 32 * 8 = 256 bytes */ + for (i=0; i < EEPROM_SZ/blk_max; i++) { + ret = i2c_smbus_read_i2c_block_data(client, (i*blk_max), blk_max, + data + (i*blk_max)); + if (ret < 0) { + return ret; + } + } + return ret; +} + +/* + * update eeprom content + */ +static struct s9230_psu_data +*s9230_psu_update_eeprom(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct s9230_psu_data *data = i2c_get_clientdata(client); + s32 status = 0; + int psu_pwrok = 0; + int psu_prsnt_l = 0; + + mutex_lock(&data->lock); + + if (time_after(jiffies, data->last_updated + 300 * HZ) + || !data->valid) { + + /* Read psu status */ + + status = i2c_smbus_read_word_data(&(pca9555_client), REG_PORT0_IN); + data->status = status; + + /*read psu status from io expander*/ + + if (data->index == s9230_psu1) { + psu_pwrok = PSU1_PWROK; + psu_prsnt_l = PSU1_PRSNT_L; + } else { + psu_pwrok = PSU2_PWROK; + psu_prsnt_l = PSU2_PRSNT_L; + } + data->psuPG = (status >> psu_pwrok) & 0x1; + data->psuABS = (status >> psu_prsnt_l) & 0x1; + + /* Read eeprom */ + if (!data->psuABS) { + //clear local eeprom data + memset(data->eeprom, 0, EEPROM_SZ); + + //read eeprom + status = s9230_psu_read_block(client, 0, data->eeprom, + ARRAY_SIZE(data->eeprom)); + + if (status < 0) { + memset(data->eeprom, 0, EEPROM_SZ); + dev_err(&client->dev, "Read eeprom failed, status=(%d)\n", status); + } else { + data->valid = 1; + } + } else { + memset(data->eeprom, 0, EEPROM_SZ); + } + data->last_updated = jiffies; + } + + mutex_unlock(&data->lock); + + return data; +} + +/* + * update psu status + */ +static struct s9230_psu_data +*s9230_psu_update_status(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct s9230_psu_data *data = i2c_get_clientdata(client); + s32 status = 0; + int psu_pwrok = 0; + int psu_prsnt_l = 0; + + mutex_lock(&data->lock); + + /* Read psu status */ + + status = i2c_smbus_read_word_data(&(pca9555_client), REG_PORT0_IN); + data->status = status; + + /*read psu status from io expander*/ + + if (data->index == s9230_psu1) { + psu_pwrok = PSU1_PWROK; + psu_prsnt_l = PSU1_PRSNT_L; + } else { + psu_pwrok = PSU2_PWROK; + psu_prsnt_l = PSU2_PRSNT_L; + } + data->psuPG = (status >> psu_pwrok) & 0x1; + data->psuABS = (status >> psu_prsnt_l) & 0x1; + + mutex_unlock(&data->lock); + + return data; +} + +static const struct i2c_device_id s9230_psu_id[] = { + { "psu1", s9230_psu1 }, + { "psu2", s9230_psu2 }, + {} +}; + +MODULE_DEVICE_TABLE(i2c, s9230_psu_id); + +static struct i2c_driver s9230_psu_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = s9230_psu_probe, + .remove = s9230_psu_remove, + .id_table = s9230_psu_id, + .address_list = normal_i2c, +}; + +static int __init s9230_psu_init(void) +{ + return i2c_add_driver(&s9230_psu_driver); +} + +static void __exit s9230_psu_exit(void) +{ + i2c_del_driver(&s9230_psu_driver); +} + +module_init(s9230_psu_init); +module_exit(s9230_psu_exit); + +MODULE_AUTHOR("Jason Tsai "); +MODULE_DESCRIPTION("S9230-64X psu driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/service/qsfp-monitor.service b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/service/qsfp-monitor.service new file mode 100644 index 00000000000..cf4a6a8ad41 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/service/qsfp-monitor.service @@ -0,0 +1,15 @@ +[Unit] +Description= This QSFP Monitor service is to setup QSFP SI. +Requires=s9230-64x-monitor.service +After=s9230-64x-monitor.service + +[Service] +ExecStart=/usr/sbin/qsfp_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/service/s9230-64x-monitor.service b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/service/s9230-64x-monitor.service new file mode 100644 index 00000000000..5caf968e659 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/service/s9230-64x-monitor.service @@ -0,0 +1,19 @@ +[Unit] +Description= This Platform Monitor service is to initialize platform and monitor platform. +Before=platform-monitor.service +After=sysinit.target +Wants=fancontrol.service +Wants=qsfp-monitor.service +DefaultDependencies=no + +[Service] +ExecStartPre=/usr/sbin/i2c_utils.sh i2c_init +ExecStart=/usr/sbin/s9230_64x_monitor.sh +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/utils/i2c_utils.sh b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/utils/i2c_utils.sh new file mode 100755 index 00000000000..e899e64a7c3 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/utils/i2c_utils.sh @@ -0,0 +1,1850 @@ +#!/bin/bash + +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# trun on for more debug output +#DEBUG="on" + +VERSION="1.0.0" +TRUE=200 +FALSE=404 + +EXEC_FUNC=${1} +COLOR_LED=${2} +QSFP_PORT=${2} +SFP_PORT=${2} +QSFP_ACTION=${2} +SFP_ACTION=${2} +MB_EEPROM_ACTION=${2} +TARGET_10G_MUX=${2} +ONOFF_LED=${3} +FAN_TRAY=${4} + +############################################################ +# Distributor ID: Debian +# Description: Debian GNU/Linux 8.6 (jessie) +# Release: 8.6 +# Codename: jessie +# Linux debian 3.16.0-4-amd64 #1 +# SMP Debian 3.16.36-1+deb8u1 (2016-09-03) x86_64 GNU/Linux +############################################################ + +# Color Definition +COLOR_TITLE="\e[1;32m" ### Green ### +COLOR_WARNING="\e[1;33m" ### Yellow ### +COLOR_ERROR="\e[1;31m" ### Red ### +COLOR_END="\e[0m" ### END ### + +NUM_I801_DEVICE=0 + +# PCA9548#0 0x70 +NUM_MUX_9548_0_CH0=$(( ${NUM_I801_DEVICE} + 1 )) # CPLD1 +NUM_MUX_9548_0_CH1=$(( ${NUM_I801_DEVICE} + 2 )) # CPLD2 +NUM_MUX_9548_0_CH2=$(( ${NUM_I801_DEVICE} + 3 )) # CPLD3 +NUM_MUX_9548_0_CH3=$(( ${NUM_I801_DEVICE} + 4 )) # CPLD4 +NUM_MUX_9548_0_CH4=$(( ${NUM_I801_DEVICE} + 5 )) # CPLD5 +NUM_MUX_9548_0_CH5=$(( ${NUM_I801_DEVICE} + 6 )) # LM75_1 LM75_2 +NUM_MUX_9548_0_CH6=$(( ${NUM_I801_DEVICE} + 7 )) # LM75_3 LM75_4 + +# PCA9548#1 0x73 +NUM_MUX_9548_1_CH0=$(( ${NUM_I801_DEVICE} + 9 )) # UCD9090 +NUM_MUX_9548_1_CH1=$(( ${NUM_I801_DEVICE} + 10 )) # PCA9539 0x76 for FP LED & HW ID +NUM_MUX_9548_1_CH2=$(( ${NUM_I801_DEVICE} + 11 )) # PCA9539 0x76 for SYS control +NUM_MUX_9548_1_CH4=$(( ${NUM_I801_DEVICE} + 13 )) # 10G Mux +NUM_MUX_9548_1_CH7=$(( ${NUM_I801_DEVICE} + 16 )) # HWM & TMP75 on BMC + +# PCA9546#0 0X72 +NUM_MUX_9546_0_CH0=$(( ${NUM_I801_DEVICE} + 17 )) # PSU1 0x58 +NUM_MUX_9546_0_CH1=$(( ${NUM_I801_DEVICE} + 18 )) # PSU2 0x58 +NUM_MUX_9546_0_CH2=$(( ${NUM_I801_DEVICE} + 19 )) # PCA9548#2 0x71 +NUM_MUX_9546_0_CH3=$(( ${NUM_I801_DEVICE} + 20 )) # PCA9546#1 0x71 + +# PCA9546#1 0X71 +NUM_MUX_9546_1_CH0=$(( ${NUM_I801_DEVICE} + 21 )) # SFP0 EEPROM 0x50 +NUM_MUX_9546_1_CH1=$(( ${NUM_I801_DEVICE} + 22 )) # SFP1 EEPROM 0x50 + +# PCA9548#2 0X71 +NUM_MUX_9548_2_CH0=$(( ${NUM_I801_DEVICE} + 25 )) # PCA9548#3 0x74 +NUM_MUX_9548_2_CH1=$(( ${NUM_I801_DEVICE} + 26 )) # PCA9548#4 0x74 +NUM_MUX_9548_2_CH2=$(( ${NUM_I801_DEVICE} + 27 )) # PCA9548#5 0x74 +NUM_MUX_9548_2_CH3=$(( ${NUM_I801_DEVICE} + 28 )) # PCA9548#6 0x74 +NUM_MUX_9548_2_CH4=$(( ${NUM_I801_DEVICE} + 29 )) # PCA9548#7 0x74 +NUM_MUX_9548_2_CH5=$(( ${NUM_I801_DEVICE} + 30 )) # PCA9548#8 0x74 +NUM_MUX_9548_2_CH6=$(( ${NUM_I801_DEVICE} + 31 )) # PCA9548#9 0x74 +NUM_MUX_9548_2_CH7=$(( ${NUM_I801_DEVICE} + 32 )) # PCA9548#10 0x74 + +# PCA9548#3~10 0X74 +NUM_MUX_9548_3_CH0=$(( ${NUM_I801_DEVICE} + 33 )) # QSFP 0 EEPROM +NUM_MUX_9548_4_CH0=$(( ${NUM_I801_DEVICE} + 41 )) # QSFP 8 EEPROM +NUM_MUX_9548_5_CH0=$(( ${NUM_I801_DEVICE} + 49 )) # QSFP 16 EEPROM +NUM_MUX_9548_6_CH0=$(( ${NUM_I801_DEVICE} + 57 )) # QSFP 24 EEPROM +NUM_MUX_9548_7_CH0=$(( ${NUM_I801_DEVICE} + 65 )) # QSFP 32 EEPROM +NUM_MUX_9548_8_CH0=$(( ${NUM_I801_DEVICE} + 73 )) # QSFP 40 EEPROM +NUM_MUX_9548_9_CH0=$(( ${NUM_I801_DEVICE} + 81 )) # QSFP 48 EEPROM +NUM_MUX_9548_10_CH0=$(( ${NUM_I801_DEVICE} + 89 )) # QSFP 56 EEPROM + +# MUX Alias +I2C_BUS_MAIN=${NUM_I801_DEVICE} +I2C_BUS_HWM=${NUM_MUX_9548_1_CH7} +I2C_BUS_FAN_STATUS=${I2C_BUS_MAIN} +I2C_BUS_SYS_LED=${NUM_MUX_9548_1_CH1} +I2C_BUS_HW_ID=${NUM_MUX_9548_1_CH1} +I2C_BUS_BMC_HW_ID=${I2C_BUS_MAIN} +I2C_BUS_PSU_STAT=${I2C_BUS_MAIN} +I2C_BUS_FANTRAY_LED=${I2C_BUS_MAIN} +I2C_BUS_MB_EEPROM=${I2C_BUS_MAIN} +I2C_BUS_CB_EEPROM=${I2C_BUS_MAIN} +I2C_BUS_PSU1_EEPROM=${NUM_MUX_9546_0_CH1} +I2C_BUS_PSU2_EEPROM=${NUM_MUX_9546_0_CH0} +I2C_BUS_CPLD1=${NUM_MUX_9548_0_CH0} +I2C_BUS_CPLD2=${NUM_MUX_9548_0_CH1} +I2C_BUS_CPLD3=${NUM_MUX_9548_0_CH2} +I2C_BUS_CPLD4=${NUM_MUX_9548_0_CH3} +I2C_BUS_CPLD5=${NUM_MUX_9548_0_CH4} +I2C_BUS_10GMUX=${NUM_MUX_9548_1_CH4} + +# I2C BUS path +PATH_SYS_I2C_DEVICES="/sys/bus/i2c/devices" +PATH_HWMON_ROOT_DEVICES="/sys/class/hwmon" +# TODO: need to verify HWM deivce path after board ready +PATH_HWMON_W83795_DEVICE="${PATH_HWMON_ROOT_DEVICES}/hwmon7" +PATH_I801_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_I801_DEVICE}" +PATH_MUX_9548_0_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH0}" +PATH_MUX_9548_0_CH1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH1}" +PATH_MUX_9548_0_CH2="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH2}" +PATH_MUX_9548_0_CH3="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH3}" +PATH_MUX_9548_0_CH4="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH4}" +PATH_MUX_9548_0_CH5="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH5}" +PATH_MUX_9548_0_CH6="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_0_CH6}" +PATH_MUX_9548_1_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CH0}" +PATH_MUX_9548_1_CH1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CH1}" +PATH_MUX_9548_1_CH2="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CH2}" +PATH_MUX_9548_1_CH7="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_1_CH7}" +PATH_MUX_9546_0_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9546_0_CH0}" +PATH_MUX_9546_0_CH1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9546_0_CH1}" +PATH_MUX_9546_0_CH2="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9546_0_CH2}" +PATH_MUX_9546_0_CH3="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9546_0_CH3}" +PATH_MUX_9546_1_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9546_1_CH0}" +PATH_MUX_9546_1_CH1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9546_1_CH1}" +PATH_MUX_9548_2_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH0}" +PATH_MUX_9548_2_CH1="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH1}" +PATH_MUX_9548_2_CH2="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH2}" +PATH_MUX_9548_2_CH3="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH3}" +PATH_MUX_9548_2_CH4="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH4}" +PATH_MUX_9548_2_CH5="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH5}" +PATH_MUX_9548_2_CH6="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH6}" +PATH_MUX_9548_2_CH7="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_2_CH7}" +PATH_MUX_9548_3_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_3_CH0}" +PATH_MUX_9548_4_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_4_CH0}" +PATH_MUX_9548_5_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_5_CH0}" +PATH_MUX_9548_6_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_6_CH0}" +PATH_MUX_9548_7_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_7_CH0}" +PATH_MUX_9548_8_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_8_CH0}" +PATH_MUX_9548_9_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_9_CH0}" +PATH_MUX_9548_10_CH0="${PATH_SYS_I2C_DEVICES}/i2c-${NUM_MUX_9548_10_CH0}" +PATH_CPLD1_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CPLD1}" +PATH_CPLD2_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CPLD2}" +PATH_CPLD3_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CPLD3}" +PATH_CPLD4_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CPLD4}" +PATH_CPLD5_DEVICE="${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CPLD5}" +PATH_10GMUX=${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_10GMUX} + + +# I2C Address +### I2C MUX +I2C_ADDR_MUX_9548_0=0x70 +I2C_ADDR_MUX_9548_1=0x73 +I2C_ADDR_MUX_9546_0=0x72 +I2C_ADDR_MUX_9546_1=0x71 +I2C_ADDR_MUX_9548_2=0x71 +I2C_ADDR_MUX_9548_3=0x74 +I2C_ADDR_MUX_9548_4=0x74 +I2C_ADDR_MUX_9548_5=0x74 +I2C_ADDR_MUX_9548_6=0x74 +I2C_ADDR_MUX_9548_7=0x74 +I2C_ADDR_MUX_9548_8=0x74 +I2C_ADDR_MUX_9548_9=0x74 +I2C_ADDR_MUX_9548_10=0x74 + +### GPIO Expander +I2C_ADDR_MUX_9539_0=0x76 # LED & HW ID +I2C_ADDR_MUX_9539_1=0x76 # SYS config +I2C_ADDR_MUX_9539_2=0x77 # on CPU board, STATUS and ERR from CPLD +I2C_ADDR_MUX_9555_0=0x20 # on FAN board, fan status and led config +I2C_ADDR_MUX_9555_1=0x24 # on BMC board, INT and HW ID +I2C_ADDR_MUX_9555_2=0x25 # on BMC board, PSU status +I2C_ADDR_MUX_9555_3=0x26 # on BMC board, RST and SEL +I2C_ADDR_MUX_9555_3=0x26 # on BMC board, RST and SEL + + +### peripheral +I2C_ADDR_MB_EEPROM=0x55 # on main board +I2C_ADDR_CB_EEPROM=0x51 # on cpu board +I2C_ADDR_UCD9090=0x34 +I2C_ADDR_W83795=0x2F +I2C_ADDR_PSU1_EEPROM=0x50 +I2C_ADDR_PSU2_EEPROM=0x50 +I2C_ADDR_LM75_1=0x4D # Rear Panel +I2C_ADDR_LM75_2=0x4E # Rear MAC +I2C_ADDR_LM75_3=0x4D # Front Panel +I2C_ADDR_LM75_4=0x4E # Front MAC +I2C_ADDR_TMP75_CB=0x4F # on cpu board +I2C_ADDR_TMP75_BB=0x4A # on bmc board +I2C_ADDR_QSFP_EEPROM=0x50 +I2C_ADDR_SFP_EEPROM=0x50 +I2C_ADDR_CPLD=0x33 +I2C_ADDR_10GMUX=0x67 + +#sysfs +PATH_SYSFS_PSU1="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_PSU1_EEPROM}-$(printf "%04x" $I2C_ADDR_PSU1_EEPROM)" +PATH_SYSFS_PSU2="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_PSU2_EEPROM}-$(printf "%04x" $I2C_ADDR_PSU2_EEPROM)" + +#ACTIVE LOW enable flag +ACTIVE_LOW_EN=1 +ACTIVE_HIGH_EN=0 +#GPIO Direction In/Out +DIR_IN=in +DIR_OUT=out + +#Power Supply Status +PSU_DC_ON=1 +PSU_DC_OFF=0 +PSU_EXIST=1 +PSU_NOT_EXIST=0 + +# IO expander register +# direction +REG_PORT0_DIR=6 +REG_PORT1_DIR=7 +# polarity +REG_PORT0_POL=4 +REG_PORT1_POL=5 +# output +REG_PORT0_OUT=2 +REG_PORT1_OUT=3 +# input +REG_PORT0_IN=0 +REG_PORT1_IN=1 + +# qsfp port number range +MIN_QSFP_PORT_NUM=1 +MAX_QSFP_PORT_NUM=64 + +# sfp+ port number range +MIN_SFP_PORT_NUM=1 +MAX_SFP_PORT_NUM=2 + +# CPLD access +# port status +CPLD_QSFP_STATUS_KEY=cpld_qsfp_port_status +CPLD_SFP_STATUS_KEY=cpld_sfp_port_status +# bit define +CPLD_QSFP_STATUS_ABS_BIT=1 +CPLD_SFP_STATUS_PRES_BIT=0 + +# Help usage function +function _help { + echo "=========================================================" + echo "# Description: Help Function" + echo "=========================================================" + echo "----------------------------------------------------" + echo "EX : ${0} help" + echo " : ${0} i2c_init" + echo " : ${0} i2c_deinit" + echo " : ${0} i2c_fan_speed_init" + echo " : ${0} i2c_io_exp_init" + echo " : ${0} i2c_led_test" + echo " : ${0} i2c_psu_eeprom_get" + echo " : ${0} i2c_mb_eeprom_get" + echo " : ${0} i2c_cb_eeprom_get" + #echo " : ${0} i2c_eeprom_sync" + echo " : ${0} i2c_qsfp_eeprom_get [${MIN_QSFP_PORT_NUM}-${MAX_QSFP_PORT_NUM}]" + echo " : ${0} i2c_sfp_eeprom_get [${MIN_SFP_PORT_NUM}-${MAX_SFP_PORT_NUM}]" + echo " : ${0} i2c_qsfp_eeprom_init new|delete" + echo " : ${0} i2c_sfp_eeprom_init new|delete" + echo " : ${0} i2c_mb_eeprom_init new|delete" + echo " : ${0} i2c_cb_eeprom_init new|delete" + echo " : ${0} i2c_qsfp_status_get [${MIN_QSFP_PORT_NUM}-${MAX_QSFP_PORT_NUM}]" + echo " : ${0} i2c_sfp_status_get [${MIN_SFP_PORT_NUM}-${MAX_SFP_PORT_NUM}]" + echo " : ${0} i2c_qsfp_type_get [${MIN_QSFP_PORT_NUM}-${MAX_QSFP_PORT_NUM}]" + echo " : ${0} i2c_sfp_type_get [${MIN_SFP_PORT_NUM}-${MAX_SFP_PORT_NUM}]" + echo " : ${0} i2c_board_type_get" + echo " : ${0} i2c_bmc_board_type_get" + echo " : ${0} i2c_cpld_version" + echo " : ${0} i2c_psu_status" + echo " : ${0} i2c_led_psu_status_set" + echo " : ${0} i2c_led_fan_status_set" + echo " : ${0} i2c_led_fan_tray_status_set" + echo " : ${0} i2c_test_all" + echo " : ${0} i2c_sys_led green|amber" + echo " : ${0} i2c_fan_led green|amber|off" + echo " : ${0} i2c_psu1_led green|amber|off" + echo " : ${0} i2c_psu2_led green|amber|off" + echo " : ${0} i2c_fan_tray_led green|amber on|off [1-4]" + echo " : ${0} i2c_10g_mux cpu|fp" + echo "----------------------------------------------------" +} + +#Pause function +function _pause { + read -p "$*" +} + +#Retry command function +function _retry { + local i + for i in {1..5}; + do + eval "${*}" && break || echo "retry"; sleep 1; + done +} + +#logical(front panel) to physical (falcon core) port mapping +function _port_logic2phy { + + local logic_port=$1 + local phy_port=0 + + if (( $logic_port >=1 && $logic_port <= 32 )) ; then + phy_port=$(( (logic_port-1)/2*4 + (logic_port-1)%2 + 1)) + elif (( $logic_port >=33 && $logic_port <= 64 )) ; then + phy_port=$(( (((logic_port-1)%32))/2*4 + (logic_port-1)%2 + 3)) + fi + + echo $phy_port +} + +#I2C Init +function _i2c_init { + echo "=========================================================" + echo "# Description: I2C Init" + echo "=========================================================" + + #rmmod i2c_ismt + _util_rmmod i2c_i801 + modprobe i2c_i801 + modprobe i2c_dev + modprobe i2c_mux_pca954x force_deselect_on_exit=1 + + # add MUX PCA9548#0 on I801, assume to be i2c-1~8 + if [ ! -e ${PATH_MUX_9548_0_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_0}' > ${PATH_I801_DEVICE}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_0} already init." + fi + + # add MUX PCA9548#1 on I801, assume to be i2c-9~16 + if [ ! -e ${PATH_MUX_9548_1_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_1}' > ${PATH_I801_DEVICE}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_1} already init." + fi + + # add MUX PCA9546#0 on I801, assume to be i2c-17~20 + if [ ! -e ${PATH_MUX_9546_0_CH0} ]; then + _retry "echo 'pca9546 ${I2C_ADDR_MUX_9546_0}' > ${PATH_I801_DEVICE}/new_device" + else + echo "pca9546 ${I2C_ADDR_MUX_9546_0} already init." + fi + + # add MUX PCA9546#1 on PCA9546#0 CH3, assume to be i2c-21~24 + if [ ! -e ${PATH_MUX_9546_1_CH0} ]; then + _retry "echo 'pca9546 ${I2C_ADDR_MUX_9546_1}' > ${PATH_MUX_9546_0_CH3}/new_device" + else + echo "pca9546 ${I2C_ADDR_MUX_9546_1} already init." + fi + + # add MUX PCA9548#2 on PCA9546#0 CH2, assume to be i2c-25~32 + if [ ! -e ${PATH_MUX_9548_2_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_2}' > ${PATH_MUX_9546_0_CH2}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_2} already init." + fi + + # add MUX PCA9548#3 on PCA9548#2 CH0, assume to be i2c-33~40 + if [ ! -e ${PATH_MUX_9548_3_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_3}' > ${PATH_MUX_9548_2_CH0}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_3} already init." + fi + + # add MUX PCA9548#4 on PCA9548#2 CH1, assume to be i2c-41~48 + if [ ! -e ${PATH_MUX_9548_4_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_4}' > ${PATH_MUX_9548_2_CH1}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_4} already init." + fi + + # add MUX PCA9548#5 on PCA9548#2 CH2, assume to be i2c-49~56 + if [ ! -e ${PATH_MUX_9548_5_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_5}' > ${PATH_MUX_9548_2_CH2}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_5} already init." + fi + + # add MUX PCA9548#6 on PCA9548#2 CH3, assume to be i2c-57~64 + if [ ! -e ${PATH_MUX_9548_6_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_6}' > ${PATH_MUX_9548_2_CH3}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_6} already init." + fi + + # add MUX PCA9548#7 on PCA9548#2 CH4, assume to be i2c-65~72 + if [ ! -e ${PATH_MUX_9548_7_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_7}' > ${PATH_MUX_9548_2_CH4}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_7} already init." + fi + + # add MUX PCA9548#8 on PCA9548#2 CH5, assume to be i2c-73~80 + if [ ! -e ${PATH_MUX_9548_8_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_8}' > ${PATH_MUX_9548_2_CH5}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_8} already init." + fi + + # add MUX PCA9548#9 on PCA9548#2 CH6, assume to be i2c-81~88 + if [ ! -e ${PATH_MUX_9548_9_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_9}' > ${PATH_MUX_9548_2_CH6}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_9} already init." + fi + + # add MUX PCA9548#10 on PCA9548#2 CH7, assume to be i2c-89~96 + if [ ! -e ${PATH_MUX_9548_10_CH0} ]; then + _retry "echo 'pca9548 ${I2C_ADDR_MUX_9548_10}' > ${PATH_MUX_9548_2_CH7}/new_device" + else + echo "pca9548 ${I2C_ADDR_MUX_9548_10} already init." + fi + + _i2c_hwm_init + _util_rmmod eeprom + modprobe eeprom_mb + modprobe gpio-pca953x + _i2c_io_exp_init + _i2c_sensors_init + _i2c_cpld_init + _i2c_psu_init + + _i2c_qsfp_eeprom_init "new" + _i2c_sfp_eeprom_init "new" + _i2c_mb_eeprom_init "new" + _i2c_cb_eeprom_init "new" + _i2c_fan_speed_init + _i2c_led_psu_status_set + _i2c_led_fan_status_set + + # trun on sys led + echo "led_sys setup..." + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_sys_led + + _config_rmem +} + +#I2C Deinit +function _i2c_deinit { + echo "i2c deinit..." + for mod in coretemp jc42 w83795 eeprom eeprom_mb gpio-pca953x i2c_mux_pca954x i2c_i801 ingrasys_s9230_64x_psu; + do + _util_rmmod $mod + done + echo "Done" +} + +function _i2c_cpld_init { + echo "CPLD init..." + _util_rmmod ingrasys_s9230_64x_i2c_cpld + modprobe ingrasys_s9230_64x_i2c_cpld + + # add cpld 1~5 to sysfs + for i in {1..5}; + do + local cpld_bus="I2C_BUS_CPLD${i}" + local cpld_path="PATH_CPLD${i}_DEVICE" + dev_path="${PATH_SYS_I2C_DEVICES}/${!cpld_bus}-$(printf "%04x" ${I2C_ADDR_CPLD})" + if ! [ -L ${dev_path} ]; then + echo "ingrasys_cpld${i} ${I2C_ADDR_CPLD}" > ${!cpld_path}/new_device + else + echo "${dev_path} already exist" + fi + done + + echo "Done" +} + +function _i2c_sensors_init { + echo "SENSORS init..." + local dev_path + # to make sure hwmon index in sysfs as expected, + # need to remove kernel module and then probe them in expected order + # remove all sensors kernel module + _util_rmmod coretemp + _util_rmmod jc42 + _util_rmmod w83795 + # probe coretemp kernel module + modprobe coretemp + # probe hwmon kernel module + modprobe w83795 + # add lm75 to sysfs + ####Main board thermal + ####lm75_1 + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_0_CH5}-$(printf "%04x" ${I2C_ADDR_LM75_1})" + if ! [ -L ${dev_path} ]; then + echo "lm75 ${I2C_ADDR_LM75_1}" > ${PATH_MUX_9548_0_CH5}/new_device # hwmon1 + else + echo "${dev_path} already exist" + fi + ####lm75_2 + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_0_CH5}-$(printf "%04x" ${I2C_ADDR_LM75_2})" + if ! [ -L ${dev_path} ]; then + echo "lm75 ${I2C_ADDR_LM75_2}" > ${PATH_MUX_9548_0_CH5}/new_device #hwmon2 + else + echo "${dev_path} already exist" + fi + ####lm75_3 + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_0_CH6}-$(printf "%04x" ${I2C_ADDR_LM75_3})" + if ! [ -L ${dev_path} ]; then + echo "lm75 ${I2C_ADDR_LM75_1}" > ${PATH_MUX_9548_0_CH6}/new_device # hwmon3 + else + echo "${dev_path} already exist" + fi + ####lm75_4 + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_0_CH6}-$(printf "%04x" ${I2C_ADDR_LM75_4})" + if ! [ -L ${dev_path} ]; then + echo "lm75 ${I2C_ADDR_LM75_4}" > ${PATH_MUX_9548_0_CH6}/new_device #hwmon4 + else + echo "${dev_path} already exist" + fi + ####BMC board thermal + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_1_CH7}-$(printf "%04x" ${I2C_ADDR_TMP75_BB})" + if ! [ -L ${dev_path} ]; then + echo "tmp75 ${I2C_ADDR_TMP75_BB}" > ${PATH_MUX_9548_1_CH7}/new_device #hwmon5 + else + echo "${dev_path} already exist" + fi + ####CPU board thermal + dev_path="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MAIN}-$(printf "%04x" ${I2C_ADDR_TMP75_CB})" + if ! [ -L ${dev_path} ]; then + echo "tmp75 ${I2C_ADDR_TMP75_CB}" > ${PATH_I801_DEVICE}/new_device #hwmon6 + else + echo "${dev_path} already exist" + fi + # add w83795 to sysfs + dev_path="${PATH_SYS_I2C_DEVICES}/${NUM_MUX_9548_1_CH7}-$(printf "%04x" ${I2C_ADDR_W83795})" + if ! [ -L ${dev_path} ]; then + echo "w83795adg ${I2C_ADDR_W83795}" > ${PATH_MUX_9548_1_CH7}/new_device #hwmon7 + else + echo "${dev_path} already exist" + fi + + # probe jc42 kernel module + modprobe jc42 + + echo "Done" +} + +#FAN Speed Init +function _i2c_fan_speed_init { + echo -n "FAN SPEED INIT..." + if [ -e "${PATH_HWMON_W83795_DEVICE}" ]; then + # init fan speed + echo 120 > ${PATH_HWMON_W83795_DEVICE}/device/pwm2 + echo "SUCCESS" + else + echo "FAIL" + fi +} + +# HWM init +function _i2c_hwm_init { + echo "HWM INIT..." + # select bank0 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x00 0x80 + # SW reset, Disable monitor + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x01 0x9C + # disable TR5/TR6 DTS + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x04 0x0 + # enable FANIN1~8 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x06 0xFF + # disable FANIN9~14 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x07 0x00 + # CLKIN clock frequency set as 48Mhz + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x01 0x1C + # select bank 2 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x00 0x82 + # set PWM mode in FOMC + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x0F 0x00 + # set 25KHz fan output frequency in F1OPFP&F2OPFP + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x18 0x84 + _util_i2cset -y -r ${I2C_BUS_HWM} ${I2C_ADDR_W83795} 0x19 0x84 +} + +#IO Expander Init +function _i2c_io_exp_init { + echo "=========================================================" + echo "# Description: I2C IO Expender Init" + echo "=========================================================" + + # need to init BMC io expander first due to some io expander are reset default + echo "Init BMC INT & HW ID IO Expander" + # all input + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_1} ${REG_PORT0_DIR} 0xFF + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_1} ${REG_PORT1_DIR} 0xFF + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_1} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_1} ${REG_PORT1_POL} 0x00 + + echo "Init BMC PSU status IO Expander" + # PWRON default 0 (ACTIVE_LOW) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_2} ${REG_PORT0_OUT} 0x00 + # default 0 (ACTIVE_LOW) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_2} ${REG_PORT1_OUT} 0x00 + # I/O 0.2 0.5 output(PWRON), rest input + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_2} ${REG_PORT0_DIR} 0xDB + # I/O 1.0~1.1 input, 1.2~1.4 output (1.5~1.7 not enable) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_2} ${REG_PORT1_DIR} 0xE3 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_2} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_2} ${REG_PORT1_POL} 0x00 + + echo "Init BMC RST and SEL IO Expander" + # RST default is 1 (ACTIVE_LOW) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_3} ${REG_PORT0_OUT} 0x3F + # SEL default is 0 (HOST), EN default is 1 (ACTIVE_HIGH) + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_3} ${REG_PORT1_OUT} 0x1F + # I/O 0.0~0.5 output, 0.6~0.7 not use + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_3} ${REG_PORT0_DIR} 0xC0 + # all output + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_3} ${REG_PORT1_DIR} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_3} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9555_3} ${REG_PORT1_POL} 0x00 + + echo "Init System LED & HW ID IO Expander" + # I/O_0.x for System LED default 0, I/O_1.x for HW ID + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT0_OUT} 0x00 + # System LED => all output + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT0_DIR} 0x00 + # HW ID => all input + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT1_DIR} 0xFF + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${REG_PORT1_POL} 0x00 + + echo "Init FAN Board Status IO Expander" + # LED_G_H set to 1, LED_Y_G set to 0 (ACTIVE_HIGH) + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9555_0} ${REG_PORT0_OUT} 0x11 + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9555_0} ${REG_PORT1_OUT} 0x11 + # DIR/ABS is input, LED_Y/LED_G is output + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9555_0} ${REG_PORT0_DIR} 0xCC + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9555_0} ${REG_PORT1_DIR} 0xCC + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9555_0} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_FAN_STATUS} ${I2C_ADDR_MUX_9555_0} ${REG_PORT1_POL} 0x00 + + echo "Init System SEL and RST IO Expander" + # RST 0.0~0.3 default 1 (ACTIVE low), rest default 0 + # SEL set to value 0 (host) + # LED_CLR set to 0 will clear all switch LED bitmap, set to 1 here + _util_i2cset -y -r ${NUM_MUX_9548_1_CH2} ${I2C_ADDR_MUX_9539_1} ${REG_PORT0_OUT} 0x0F + # RST 1.6~1.7 default 1 (ACTIVE low), INT 1.0~1.4 default 1 (ACTIVE low) + _util_i2cset -y -r ${NUM_MUX_9548_1_CH2} ${I2C_ADDR_MUX_9539_1} ${REG_PORT1_OUT} 0xDF + # all output, but MAC_RST_L 0.0 need to set as input to prevent reboot issue + _util_i2cset -y -r ${NUM_MUX_9548_1_CH2} ${I2C_ADDR_MUX_9539_1} ${REG_PORT0_DIR} 0x09 + # RST 1.5 !~ 1.7 output, rest are input + _util_i2cset -y -r ${NUM_MUX_9548_1_CH2} ${I2C_ADDR_MUX_9539_1} ${REG_PORT1_DIR} 0x1F + _util_i2cset -y -r ${NUM_MUX_9548_1_CH2} ${I2C_ADDR_MUX_9539_1} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${NUM_MUX_9548_1_CH2} ${I2C_ADDR_MUX_9539_1} ${REG_PORT1_POL} 0x00 + + echo "Init CPU CPLD IO Expander" + # all input + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_2} ${REG_PORT0_DIR} 0xFF + # all input + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_2} ${REG_PORT1_DIR} 0xFF + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_2} ${REG_PORT0_POL} 0x00 + _util_i2cset -y -r ${I2C_BUS_MAIN} ${I2C_ADDR_MUX_9539_2} ${REG_PORT1_POL} 0x00 +} + +#Set FAN Tray LED +function _i2c_led_fan_tray_status_set { + echo "FAN Tray Status Setup" + #FAN Status get + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN2_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN4_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + + # check if io expander for fan tray exist + result=`i2cget -y ${I2C_BUS_FANTRAY_LED} ${I2C_ADDR_MUX_9555_0} ${REG_PORT0_IN} 2>/dev/null` + err_code=$? + if [ "$err_code" != "0" ]; then + echo "fan tray not exist!" + return + fi + + for FAN_TRAY in {1..4}; + do + FAN_ALARM="FAN${FAN_TRAY}_ALARM" + if [ "${!FAN_ALARM}" == "0" ]; then + COLOR_LED="green" + ONOFF_LED="on" + _i2c_fan_tray_led + + COLOR_LED="amber" + ONOFF_LED="off" + _i2c_fan_tray_led + + echo "set [FAN TRAY ${FAN_TRAY}] [Green]=on [Amber]=off" + else + COLOR_LED="green" + ONOFF_LED="off" + _i2c_fan_tray_led + + COLOR_LED="amber" + ONOFF_LED="on" + _i2c_fan_tray_led + + echo "set [FAN TRAY ${FAN_TRAY}] [Green]=off [Amber]=on" + fi + done +} + +#Set FAN LED +function _i2c_led_fan_status_set { + echo "FAN Status Setup" + #PSU Status set + FAN1_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan1_alarm` + FAN3_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan3_alarm` + FAN5_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan5_alarm` + FAN7_ALARM=`cat ${PATH_HWMON_W83795_DEVICE}/device/fan7_alarm` + + echo "led_fan setup..." + # all fan ok + if [ "${FAN1_ALARM}" == "0" ] \ + && [ "${FAN3_ALARM}" == "0" ] \ + && [ "${FAN5_ALARM}" == "0" ] \ + && [ "${FAN7_ALARM}" == "0" ]; then + COLOR_LED="green" + echo "${COLOR_LED}" + _i2c_fan_led + # all fan fail + elif [ "${FAN1_ALARM}" == "1" ] \ + && [ "${FAN3_ALARM}" == "1" ] \ + && [ "${FAN5_ALARM}" == "1" ] \ + && [ "${FAN7_ALARM}" == "1" ] ; then + COLOR_LED="amber" + echo "${COLOR_LED}" + _i2c_fan_led + # partial fan fail + else + COLOR_LED="amber" + echo "${COLOR_LED}" + _i2c_fan_led + fi +} + +#Set Power Supply LED +function _i2c_led_psu_status_set { + echo "PSU LED Status Setup" + + #PSU Status set + _i2c_psu_status + + #PSU1 Status + echo "led_psu1 setup..." + if [ "${psu1Exist}" == ${PSU_EXIST} ]; then + if [ "${psu1PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + echo "${COLOR_LED}" + _i2c_psu1_led + else + COLOR_LED="amber" + echo "${COLOR_LED}" + _i2c_psu1_led + fi + else + COLOR_LED="off" + echo "${COLOR_LED}" + _i2c_psu1_led + fi + + #PSU2 Status + echo "led_psu2 setup..." + if [ "${psu2Exist}" == ${PSU_EXIST} ]; then + if [ "${psu2PwGood}" == ${PSU_DC_ON} ]; then + COLOR_LED="green" + echo "${COLOR_LED}" + _i2c_psu2_led + else + COLOR_LED="amber" + echo "${COLOR_LED}" + _i2c_psu2_led + fi + else + COLOR_LED="off" + echo "${COLOR_LED}" + _i2c_psu2_led + fi +} + +#LED Test +function _i2c_led_test { + echo "=========================================================" + echo "# Description: I2C SYSTEM LED TEST..." + echo "=========================================================" + local output_reg=${REG_PORT0_OUT} + local mask=0xFF + local value=0xFF + + #sys led (green) + # set sys_led_g (0.7) = 1 + mask=0x80 + value=0x80 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check SYS LED green light and Press [Enter] key to continue...' + #sys led (amber) + # set sys_led_g (0.7) = 0 + mask=0x80 + value=0x00 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check SYS LED amber light and Press [Enter] key to continue...' + + #FAN led (green) + # set fan_led_en (0.6) = 1 & fan_led_y (0.5) = 0 + mask=0x60 + value=0x60 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check FAN LED green light and Press [Enter] key to continue...' + #FAN led (amber) + # set fan_led_en (0.6) = 1 & fan_led_y (0.5) = 1 + mask=0x60 + value=0x40 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check FAN LED amber light and Press [Enter] key to continue...' + + #PSU1 led (green) + # set psu1_pwr_ok_oe (0.4) = 1 & psu1_led_y (0.3) = 0 + mask=0x18 + value=0x18 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check PSU1 LED green light and Press [Enter] key to continue...' + #PSU1 led (amber) + # set psu1_pwr_ok_oe (0.4) = 1 & psu1_led_y (0.3) = 1 + mask=0x18 + value=0x10 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check PSU1 LED amber light and Press [Enter] key to continue...' + + #PSU2 led (green) + # set psu0_pwr_ok_oe (0.2) = 1 & psu0_led_y (0.1) = 0 + mask=0x06 + value=0x06 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check PSU2 LED green light and Press [Enter] key to continue...' + #PSU2 led (amber) + # set psu0_pwr_ok_oe (0.2) = 1 & psu0_led_y (0.1) = 1 + mask=0x06 + value=0x04 + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check PSU2 LED amber light and Press [Enter] key to continue...' + + #Turn OFF All LED (can't trun off system led) + # set set fan_led_en (0.6), psu1_pwr_ok_oe (0.4), psu0_pwr_ok_oe (0.2) = 0 + mask=0xFF + value=$((2#00000011)) + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + _pause 'Check turn off all LEDs (exclude SYS LED) and Press [Enter] key to continue...' + + # restore sys led + COLOR_LED="green" + ONOFF_LED="on" + echo "${COLOR_LED} ${ONOFF_LED}" + _i2c_sys_led +} + +#Set QSFP Port cpld variable +function _qsfp_cpld_var_set { + local port=$1 + local reg_port_base + local reg_port_shift + if [[ $1 -le 12 && $1 -ge 1 ]]; then + cpld_index=1 + reg_port_base=0 + elif [[ $1 -le 25 && $1 -ge 13 ]]; then + cpld_index=2 + reg_port_base=12 + elif [[ $1 -le 38 && $1 -ge 26 ]]; then + cpld_index=3 + reg_port_base=25 + elif [[ $1 -le 51 && $1 -ge 39 ]]; then + cpld_index=4 + reg_port_base=38 + elif [[ $1 -le 64 && $1 -ge 52 ]]; then + cpld_index=5 + reg_port_base=51 + else + echo "invalid port number" + fi + + cpld_port_index=$(( $port - $reg_port_base )) +} + +#Set QSFP Port eeporm variable +function _qsfp_eeprom_var_set { + local port=$1 + local eeprombusbase + local eeprombusshift + # port 1 => zqsfp0 + # port 2 => zqsfp1 + # ... + local port_group=$(( ($port - 1) / 8 )) + + case ${port_group} in + 0) + eeprombusbase=${NUM_MUX_9548_3_CH0} + ;; + 1) + eeprombusbase=${NUM_MUX_9548_4_CH0} + ;; + 2) + eeprombusbase=${NUM_MUX_9548_5_CH0} + ;; + 3) + eeprombusbase=${NUM_MUX_9548_6_CH0} + ;; + 4) + eeprombusbase=${NUM_MUX_9548_7_CH0} + ;; + 5) + eeprombusbase=${NUM_MUX_9548_8_CH0} + ;; + 6) + eeprombusbase=${NUM_MUX_9548_9_CH0} + ;; + 7) + eeprombusbase=${NUM_MUX_9548_10_CH0} + ;; + *) + ;; + esac + + eeprombusshift=$(( (${port} - 1) % 8)) + eepromBus=$(( ${eeprombusbase} + ${eeprombusshift} )) + eepromAddr=${I2C_ADDR_QSFP_EEPROM} +} + + +#Set SFP Port cpld variable +function _sfp_cpld_var_set { + local port=$1 + case ${port} in + 1) + cpld_index=1 + ;; + 2) + cpld_index=2 + ;; + *) + ;; + esac +} + +#Set QSFP Port eeporm variable +function _sfp_eeprom_var_set { + local port=$1 + + case ${port} in + 1) + eepromBus=${NUM_MUX_9546_1_CH0} + ;; + 2) + eepromBus=${NUM_MUX_9546_1_CH1} + ;; + *) + ;; + esac + + eepromAddr=${I2C_ADDR_SFP_EEPROM} +} + +#Get QSFP EEPROM Information +function _i2c_qsfp_eeprom_get { + local phy_port=0 + + #get physical port + phy_port=$(_port_logic2phy $QSFP_PORT) + + # input parameter validation + _util_input_check "${QSFP_PORT}" "${MIN_QSFP_PORT_NUM}" "${MAX_QSFP_PORT_NUM}" + + _qsfp_eeprom_var_set ${phy_port} + + _util_get_qsfp_abs + + if [ $status = 0 ]; then + exit + fi + + + cat ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr)/eeprom | hexdump -C +} + +#Init QSFP EEPROM +function _i2c_qsfp_eeprom_init { + echo "QSFP EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init 1-64 ports EEPROM + local i + for i in {1..64}; + do + _qsfp_eeprom_var_set ${i} + + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr) ]; then + echo "sff8436 $eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eepromBus/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr) ]; then + echo "$eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eepromBus/delete_device + fi + done + echo "Done" +} + +#Get SFP EEPROM Information +function _i2c_sfp_eeprom_get { + + # input parameter validation + _util_input_check "${SFP_PORT}" "${MIN_SFP_PORT_NUM}" "${MAX_SFP_PORT_NUM}" + _util_get_sfp_pres + + if [ $status = 0 ]; then + exit + fi + + _sfp_eeprom_var_set ${SFP_PORT} + + cat ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr)/eeprom | hexdump -C +} + +#Init SFP EEPROM +function _i2c_sfp_eeprom_init { + echo "SFP EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init 1-2 sfp+ EEPROM + local i + for i in {1..2}; + do + _sfp_eeprom_var_set ${i} + + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr) ]; then + echo "sff8436 $eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eepromBus/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr) ]; then + echo "$eepromAddr" > ${PATH_SYS_I2C_DEVICES}/i2c-$eepromBus/delete_device + fi + done + echo "Done" +} + +#Init Main Board EEPROM +function _i2c_mb_eeprom_init { + echo -n "Main Board EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init mb EEPROM + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM) ]; then + echo "mb_eeprom ${I2C_ADDR_MB_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_MB_EEPROM}/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM) ]; then + echo "$I2C_ADDR_MB_EEPROM" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_MB_EEPROM}/delete_device + fi + echo "Done" +} + +#Init CPU Board EEPROM +function _i2c_cb_eeprom_init { + echo -n "CPU Board EEPROM INIT..." + + #Action check + action=$1 + if [ -z "${action}" ]; then + echo "No action, skip" + return + elif [ "${action}" != "new" ] && [ "${action}" != "delete" ]; then + echo "Error action, skip" + return + fi + + #Init cpu EEPROM + if [ "${action}" == "new" ] && \ + ! [ -L ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_CB_EEPROM}-$(printf "%04x" $I2C_ADDR_CB_EEPROM) ]; then + echo "mb_eeprom ${I2C_ADDR_CB_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CB_EEPROM}/new_device + elif [ "${action}" == "delete" ] && \ + [ -L ${PATH_SYS_I2C_DEVICES}/${I2C_BUS_CB_EEPROM}-$(printf "%04x" $I2C_ADDR_CB_EEPROM) ]; then + echo "$I2C_ADDR_CB_EEPROM" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_CB_EEPROM}/delete_device + fi + echo "Done" +} + +#Init PSU Kernel Module +function _i2c_psu_init { + echo "=========================================================" + echo "# Description: I2C PSU Init" + echo "=========================================================" + modprobe ingrasys_s9230_64x_psu + + echo "psu1 ${I2C_ADDR_PSU1_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU1_EEPROM}/new_device + echo "psu2 ${I2C_ADDR_PSU2_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU2_EEPROM}/new_device +} + +#Deinit PSU Kernel Module +function _i2c_psu_deinit { + echo "${I2C_ADDR_PSU1_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU1_EEPROM}/delete_device + echo "${I2C_ADDR_PSU2_EEPROM}" > ${PATH_SYS_I2C_DEVICES}/i2c-${I2C_BUS_PSU2_EEPROM}/delete_device + _util_rmmod ingrasys_s9230_64x_psu +} + +#get QSFP Status +function _i2c_qsfp_status_get { + + # input parameter validation + _util_input_check "${QSFP_PORT}" "${MIN_QSFP_PORT_NUM}" "${MAX_QSFP_PORT_NUM}" + + local stat + _util_get_qsfp_abs + echo "status=$status" +} + +#get QSFP Type +function _i2c_qsfp_type_get { + local phy_port=0 + + phy_port=$(_port_logic2phy ${QSFP_PORT}) + + # input parameter validation + _util_input_check "${QSFP_PORT}" "${MIN_QSFP_PORT_NUM}" "${MAX_QSFP_PORT_NUM}" + + #_qsfp_eeprom_var_set ${QSFP_PORT} + _qsfp_eeprom_var_set ${phy_port} + + #Get QSFP EEPROM info + qsfp_info=$(base64 ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr)/eeprom) + + identifier=$(echo $qsfp_info | base64 -d -i | hexdump -s 128 -n 1 -e '"%x"') + connector=$(echo $qsfp_info | base64 -d -i | hexdump -s 130 -n 1 -e '"%x"') + transceiver=$(echo $qsfp_info | base64 -d -i | hexdump -s 131 -n 1 -e '"%x"') + + echo "identifier=$identifier" + echo "connector=$connector" + echo "transceiver=$transceiver" +} + +function _i2c_sfp_status_get { + + # input parameter validation + _util_input_check "${SFP_PORT}" "${MIN_SFP_PORT_NUM}" "${MAX_SFP_PORT_NUM}" + + local stat + _util_get_sfp_pres + #status: 0 -> Down, 1 -> Up + if [ $status = 0 ]; then + stat="down" + else + stat="up" + fi + echo "status is $stat" +} + +#get SFP Type +function _i2c_sfp_type_get { + + # input parameter validation + _util_input_check "${SFP_PORT}" "${MIN_SFP_PORT_NUM}" "${MAX_SFP_PORT_NUM}" + + _sfp_eeprom_var_set ${SFP_PORT} + + #Get QSFP EEPROM info + sfp_info=$(base64 ${PATH_SYS_I2C_DEVICES}/$eepromBus-$(printf "%04x" $eepromAddr)/eeprom) + + identifier=$(echo $sfp_info | base64 -d -i | hexdump -s 128 -n 1 -e '"%x"') + connector=$(echo $sfp_info | base64 -d -i | hexdump -s 130 -n 1 -e '"%x"') + transceiver=$(echo $sfp_info | base64 -d -i | hexdump -s 131 -n 1 -e '"%x"') + + echo "identifier=$identifier" + echo "connector=$connector" + echo "transceiver=$transceiver" +} + +#Get PSU EEPROM Information +function _i2c_psu_eeprom_get { + local eeprom_psu1="" + local eeprom_psu2="" + + echo "=========================================================" + echo "# Description: I2C PSU EEPROM Get..." + echo "=========================================================" + + eeprom_psu1="${PATH_SYSFS_PSU1}/psu_eeprom" + cat ${eeprom_psu1} | hexdump -C + + eeprom_psu2="${PATH_SYSFS_PSU2}/psu_eeprom" + cat ${eeprom_psu2} | hexdump -C +} + +#Get Main Board EEPROM Information +function _i2c_mb_eeprom_get { + echo "=========================================================" + echo "# Description: I2C MB EEPROM Get..." + echo "=========================================================" + _i2c_sys_eeprom_get mb +} + +#Get CPU Board EEPROM Information +function _i2c_cb_eeprom_get { + echo "=========================================================" + echo "# Description: I2C CB EEPROM Get..." + echo "=========================================================" + _i2c_sys_eeprom_get cb +} + +#Get system EEPROM Information +##input: "cb" for cpu board, "mb" for main board +function _i2c_sys_eeprom_get { + local eeprom_dev + + if [ "$1" == "cb" ]; then + eeprom_dev="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_CB_EEPROM}-$(printf "%04x" $I2C_ADDR_CB_EEPROM)/eeprom" + elif [ "$1" == "mb" ]; then + eeprom_dev="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM)/eeprom" + else + echo "wrong eeprom type" + return + fi + + # check if eeprom device exist in sysfs + if [ ! -f ${eeprom_dev} ]; then + echo "eeprom device not init" + return + fi + + cat ${eeprom_dev} | hexdump -C + echo "Done" +} + +#sync eeprom content between mb and cb eeprom +function _i2c_eeprom_sync { + echo "=========================================================" + echo "# Description: EEPROM sync..." + echo "=========================================================" + + local mb_eeprom_dev="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_MB_EEPROM}-$(printf "%04x" $I2C_ADDR_MB_EEPROM)/eeprom" + local cb_eeprom_dev="${PATH_SYS_I2C_DEVICES}/${I2C_BUS_CB_EEPROM}-$(printf "%04x" $I2C_ADDR_CB_EEPROM)/eeprom" + + # check if eeprom device exist in sysfs + if [[ ! -f ${mb_eeprom_dev} || ! -f ${cb_eeprom_dev} ]]; then + echo "eeprom device not init" + return + fi + + ## check if MB eeprom is empty + if [ ! -z "$(cat ${mb_eeprom_dev} | hexdump -n2 | grep ffff)" ]; then + echo "copy cb eeprom to mb eeprom..." + cat ${cb_eeprom_dev} > ${mb_eeprom_dev} + else + echo "no need to sync" + fi + + echo "Done" +} + +#Set System Status LED +function _i2c_sys_led { + # only green/amber, on/off can't control + if [ "${COLOR_LED}" == "green" ]; then + # set sys_led_g (0.7) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x80 + value=0x80 + elif [ "${COLOR_LED}" == "amber" ]; then + # set sys_led_g (0.7) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x80 + value=0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + #apply to io expander + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + echo "Done" +} + +#Set FAN LED +function _i2c_fan_led { + if [ "${COLOR_LED}" == "green" ]; then + # set fan_led_en (0.6) = 1 & fan_led_y (0.5) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x60 + value=0x60 + elif [ "${COLOR_LED}" == "amber" ]; then + # set fan_led_en (0.6) = 1 & fan_led_y (0.5) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x60 + value=0x40 + elif [ "${COLOR_LED}" == "off" ]; then + # set fan_led_en (0.6) = 0 & fan_led_y (0.5) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x60 + value=0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + #apply to io expander + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + echo "Done" +} + +#Set PSU1 LED +function _i2c_psu1_led { + if [ "${COLOR_LED}" == "green" ]; then + # set psu1_pwr_ok_oe (0.4) = 1 & psu1_led_y (0.3) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x18 + value=0x18 + elif [ "${COLOR_LED}" == "amber" ]; then + # set psu1_pwr_ok_oe (0.4) = 1 & psu1_led_y (0.3) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x18 + value=0x10 + elif [ "${COLOR_LED}" == "off" ]; then + # set psu1_pwr_ok_oe (0.4) = 0 & psu1_led_y (0.3) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x18 + value=0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + #apply to io expander + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + echo "Done" +} + +#Set PSU2 LED +function _i2c_psu2_led { + if [ "${COLOR_LED}" == "green" ]; then + # set psu0_pwr_ok_oe (0.2) = 1 & psu0_led_y (0.1) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x06 + value=0x06 + elif [ "${COLOR_LED}" == "amber" ]; then + # set psu0_pwr_ok_oe (0.2) = 1 & psu0_led_y (0.1) = 1 + output_reg=${REG_PORT0_OUT} + mask=0x06 + value=0x04 + elif [ "${COLOR_LED}" == "off" ]; then + # set psu0_pwr_ok_oe (0.2) = 0 & psu0_led_y (0.1) = 0 + output_reg=${REG_PORT0_OUT} + mask=0x06 + value=0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + #apply to io expander + _util_i2cset -m ${mask} -y ${I2C_BUS_SYS_LED} ${I2C_ADDR_MUX_9539_0} ${output_reg} ${value} + echo "Done" +} + +#Set FAN Tray LED +function _i2c_fan_tray_led { + + i2cAddr=${I2C_ADDR_MUX_9555_0} + output_reg=${REG_PORT0_OUT} + + case ${FAN_TRAY} in + 1) + output_reg=${REG_PORT0_OUT} + if [ "${COLOR_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 2) + output_reg=${REG_PORT0_OUT} + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + 3) + output_reg=${REG_PORT1_OUT} + if [ "${COLOR_LED}" == "green" ]; then + mask=0x01 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x02 + fi + ;; + 4) + output_reg=${REG_PORT1_OUT} + if [ "${COLOR_LED}" == "green" ]; then + mask=0x10 + elif [ "${COLOR_LED}" == "amber" ]; then + mask=0x20 + fi + ;; + *) + echo "Please input 1~4" + exit + ;; + esac + + # LED PIN value is ACTIVE HIGH + if [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "on" ]; then + _util_i2cset -m $mask -y -r ${I2C_BUS_FANTRAY_LED} $i2cAddr ${output_reg} 0xff + elif [ "${COLOR_LED}" == "green" ] && [ "${ONOFF_LED}" == "off" ]; then + _util_i2cset -m $mask -y -r ${I2C_BUS_FANTRAY_LED} $i2cAddr ${output_reg} 0x00 + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "on" ]; then + _util_i2cset -m $mask -y -r ${I2C_BUS_FANTRAY_LED} $i2cAddr ${output_reg} 0xff + elif [ "${COLOR_LED}" == "amber" ] && [ "${ONOFF_LED}" == "off" ]; then + _util_i2cset -m $mask -y -r ${I2C_BUS_FANTRAY_LED} $i2cAddr ${output_reg} 0x00 + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + echo "Done" +} + +#Get Board Version and Type +function _i2c_board_type_get { + # read input port 1 value from io expander + input_reg=${REG_PORT1_IN} + boardType=`i2cget -y ${I2C_BUS_HW_ID} ${I2C_ADDR_MUX_9539_0} ${input_reg}` + boardBuildRev=$((($boardType) & 0x03)) + boardHwRev=$((($boardType) >> 2 & 0x03)) + boardId=$((($boardType) >> 4)) + printf "MAIN_BOARD BOARD_ID is 0x%02x, HW Rev 0x%02x, Build Rev 0x%02x\n" $boardId $boardHwRev $boardBuildRev +} + +#Get BMC Board Version and Type +function _i2c_bmc_board_type_get { + # read input port 1 value from io expander + input_reg=${REG_PORT1_IN} + boardType=`i2cget -y ${I2C_BUS_BMC_HW_ID} ${I2C_ADDR_MUX_9555_1} ${input_reg}` + boardBuildRev=$((($boardType) & 0x03)) + boardHwRev=$((($boardType) >> 2 & 0x03)) + boardId=$((($boardType) >> 4)) + printf "BMC_BOARD BOARD_ID is 0x%02x, HW Rev 0x%02x, Build Rev 0x%02x\n" $boardId $boardHwRev $boardBuildRev +} + +#Get CPLD Version +function _i2c_cpld_version { + echo "=========================================================" + echo "# Description: CPLD Version" + echo "=========================================================" + + for i in {1..5}; + do + local cpld_bus="I2C_BUS_CPLD${i}" + local cpld_path="PATH_CPLD${i}_DEVICE" + local file_path="${PATH_SYS_I2C_DEVICES}/${!cpld_bus}-$(printf "%04x" ${I2C_ADDR_CPLD})/cpld_version" + printf "[CPLD %d] %s\n" ${i} $(cat ${file_path}) + done +} + +#Get PSU Status +function _i2c_psu_status { + local psu_abs="" + + psu1PwGood=`cat ${PATH_SYSFS_PSU1}/psu_pg` + psu_abs=`cat ${PATH_SYSFS_PSU1}/psu_abs` + if [ "$psu_abs" == "0" ]; then + psu1Exist=1 + else + psu1Exist=0 + fi + + psu2PwGood=`cat ${PATH_SYSFS_PSU2}/psu_pg` + psu_abs=`cat ${PATH_SYSFS_PSU2}/psu_abs` + if [ "$psu_abs" == "0" ]; then + psu2Exist=1 + else + psu2Exist=0 + fi + + printf "PSU1 Exist:%x PSU1 PW Good:%d\n" $psu1Exist $psu1PwGood + printf "PSU2 Exist:%d PSU2 PW Good:%d\n" $psu2Exist $psu2PwGood +} + +#Get register value from CPLD +function _i2c_cpld_reg_read { + local idx=$1 + local file_name=$2 + local cpld_i2c_addr=${I2C_ADDR_CPLD} + local reg_file_path + + case ${idx} in + 1) + cpld_i2c_bus=${I2C_BUS_CPLD1} + ;; + 2) + cpld_i2c_bus=${I2C_BUS_CPLD2} + ;; + 3) + cpld_i2c_bus=${I2C_BUS_CPLD3} + ;; + 4) + cpld_i2c_bus=${I2C_BUS_CPLD4} + ;; + 5) + cpld_i2c_bus=${I2C_BUS_CPLD5} + ;; + *) + echo "invalid cpld index" + exit + ;; + esac + + reg_file_path="${PATH_SYS_I2C_DEVICES}/${cpld_i2c_bus}-$(printf "%04x" ${cpld_i2c_addr})/${file_name}" + cpld_reg_val=`cat ${reg_file_path}` +} + +#util functions +function _util_i2cset { + if [ "$DEBUG" == "on" ]; then + i2cset $@ + else + i2cset $@ 1>/dev/null + fi +} + +function _i2c_set { + local i2c_bus=$1 + local i2c_addr=$2 + local reg=$3 + local mask=$4 + local value=$5 + + echo `i2cset -m $mask -y -r ${i2c_bus} ${i2c_addr} ${reg} ${value}` +} + +function _util_rmmod { + local mod=$1 + [ "$(lsmod | grep "^$mod ")" != "" ] && rmmod $mod +} + +# get qsfp presence +function _util_get_qsfp_abs { + local phy_port=0 + + #get physical port + phy_port=$(_port_logic2phy $QSFP_PORT) + + # read status from cpld + #_qsfp_cpld_var_set ${QSFP_PORT} + _qsfp_cpld_var_set ${phy_port} + cpld_reg_file_name="${CPLD_QSFP_STATUS_KEY}_${cpld_port_index}" + _i2c_cpld_reg_read ${cpld_index} ${cpld_reg_file_name} + #status: 0 -> Down, 1 -> Up (ACTIVE_LOW in ABS_BIT) + status=$(( $(( $((${cpld_reg_val})) & (1 << ($CPLD_QSFP_STATUS_ABS_BIT)) ))?0:1 )) +} + +# get sfp presence +function _util_get_sfp_pres { + + # read status from cpld + _sfp_cpld_var_set ${SFP_PORT} + cpld_reg_file_name="${CPLD_SFP_STATUS_KEY}" + _i2c_cpld_reg_read ${cpld_index} ${cpld_reg_file_name} + #status: 0 -> Down, 1 -> Up (ACTIVE_LOW in PRES_BIT) + status=$(( $(( $((${cpld_reg_val})) & (1 << ($CPLD_SFP_STATUS_PRES_BIT)) ))?0:1 )) +} + +# valid input number +function _util_input_check { + # input parameter validation + if [[ $1 -lt $2 || $1 -gt $3 ]]; then + echo "Please input number $2~$3" + exit + fi +} + +# clear all switch port led bitmap +function _util_port_led_clear { + echo "port led clear..." + # gpio pin on GPIO MUX PCA9539#1 I/O 0.2 + # pull low to reset bitamp + output_reg=${REG_PORT0_OUT} + mask=0x04 + value=0x00 + _util_i2cset -m ${mask} -y ${NUM_MUX_9548_1_CH2} ${I2C_ADDR_MUX_9539_1} ${output_reg} ${value} + echo "Done" +} + +#Increase read socket buffer for CoPP Test +function _config_rmem { + echo "109430400" > /proc/sys/net/core/rmem_max +} + +#Set 10G Mux to CPU or Front Panel +function _i2c_10g_mux { + + echo "=========================================================" + echo "# Description: 10G Mux" + echo "=========================================================" + + local target=${TARGET_10G_MUX} + local i2c_bus=${I2C_BUS_10GMUX} + local i2c_addr=${I2C_ADDR_10GMUX} + local reg=0 + local mask=0xff + local value=0 + local file_10g_mux="${PATH_CPLD1_DEVICE}/${I2C_BUS_CPLD1}-$(printf "%04x" ${I2C_ADDR_CPLD})/cpld_10gmux_config" + + #get current 10g mux register value on CPLD + value=`cat ${file_10g_mux}` + + if [ "${target}" == "cpu" ]; then + #Set XE0: slave address access + _i2c_set $i2c_bus $i2c_addr 0x06 $mask 0x18 + #Set XE0: CH4 D_IN0-S_OUTA0 EQ + _i2c_set $i2c_bus $i2c_addr 0x2c $mask 0x00 + #Set XE0: CH5 NC-S_OUTB0 DEM + _i2c_set $i2c_bus $i2c_addr 0x35 $mask 0x80 + #Set XE0: CH5 NC-S_OUTB0 VOD + _i2c_set $i2c_bus $i2c_addr 0x34 $mask 0xab + #Set XE0: CH1 D_OUT0-S_INB0 EQ + _i2c_set $i2c_bus $i2c_addr 0x16 $mask 0x01 + #Set XE0: CH1 D_OUT0-S_INB0 DEM + _i2c_set $i2c_bus $i2c_addr 0x18 0x1f 0x80 + #Set XE0: CH1 D_OUT0-S_INB0 VOD + _i2c_set $i2c_bus $i2c_addr 0x17 $mask 0xab + #Set XE1: CH6 D_IN1-S_OUTA1 EQ + _i2c_set $i2c_bus $i2c_addr 0x3a $mask 0x00 + #Set XE1: CH7 NC-S_OUTB1 EQ + _i2c_set $i2c_bus $i2c_addr 0x41 $mask 0x00 + #Set XE1: CH7 NC-S_OUTB1 DEM + _i2c_set $i2c_bus $i2c_addr 0x43 $mask 0x80 + #Set XE1: CH7 NC-S_OUTB1 VOD + _i2c_set $i2c_bus $i2c_addr 0x42 $mask 0xab + #Set XE1: CH3 D_OUT1-S_INB1 EQ + _i2c_set $i2c_bus $i2c_addr 0x24 $mask 0x01 + #Set XE1: CH3 D_OUT1-S_INB1 DEM + _i2c_set $i2c_bus $i2c_addr 0x26 $mask 0x80 + #Set XE1: CH3 D_OUT1-S_INB1 VOD + _i2c_set $i2c_bus $i2c_addr 0x25 $mask 0xab + #Enable auto negotiation of XE ports + eval "npx_diag 'phy set mdio portlist=129,130 devad=0x7 addr=0x11 data=0x80'" + eval "npx_diag 'phy set mdio portlist=129,130 devad=0x7 addr=0x10 data=0x01'" + eval "npx_diag 'phy set mdio portlist=129,130 devad=0x7 addr=0x0 data=0x3200'" + eval "npx_diag 'phy set mdio portlist=129,130 devad=0x1 addr=0x96 data=0x2'" + #delay 1 sec + sleep 1 + + #switch 10G MUX to cpu on CPLD + value=$(( value & 0xf3 )) + echo "$(printf 0x"%x" ${value})" > ${file_10g_mux} + + echo "Switch 10G Mux to [CPU]" + + elif [ "${COLOR_LED}" == "fp" ]; then + #Set XE0: slave address access + _i2c_set $i2c_bus $i2c_addr 0x06 $mask 0x18 + #Set XE0: CH4 D_IN0-S_OUTA0 EQ + _i2c_set $i2c_bus $i2c_addr 0x2c $mask 0x00 + #Set XE0: CH4 D_IN0-S_OUTA0 DEM + _i2c_set $i2c_bus $i2c_addr 0x2e $mask 0x80 + #Set XE0: CH4 D_IN0-S_OUTA0 VOD + _i2c_set $i2c_bus $i2c_addr 0x2d $mask 0xab + #Set XE0: CH0 NC-S_INA0 EQ + _i2c_set $i2c_bus $i2c_addr 0x0f $mask 0x00 + #Set XE0: CH1 D_OUT0-S_INB0 DEM + _i2c_set $i2c_bus $i2c_addr 0x18 0x18 0x80 + #Set XE0: CH1 D_OUT0-S_INB0 VOD + _i2c_set $i2c_bus $i2c_addr 0x17 $mask 0xab + #Set XE1: CH6 D_IN1-S_OUTA1 EQ + _i2c_set $i2c_bus $i2c_addr 0x3a $mask 0x00 + #Set XE1: CH6 D_IN1-S_OUTA1 DEM + _i2c_set $i2c_bus $i2c_addr 0x3c $mask 0x80 + #Set XE1: CH6 D_IN1-S_OUTA1 VOD + _i2c_set $i2c_bus $i2c_addr 0x3b $mask 0xab + #Set XE1: CH2 NC-S_INA1 EQ + _i2c_set $i2c_bus $i2c_addr 0x1d $mask 0x00 + #Set XE1: CH3 D_OUT1-S_INB1 DEM + _i2c_set $i2c_bus $i2c_addr 0x26 $mask 0x80 + #Set XE1: CH3 D_OUT1-S_INB1 VOD + _i2c_set $i2c_bus $i2c_addr 0x25 $mask 0xab + #Enable auto negotiation of XE ports + eval "npx_diag 'phy set mdio portlist=129,130 devad=0x7 addr=0x11 data=0x0'" + eval "npx_diag 'phy set mdio portlist=129,130 devad=0x7 addr=0x10 data=0x0'" + eval "npx_diag 'phy set mdio portlist=129,130 devad=0x7 addr=0x0 data=0x2200'" + eval "npx_diag 'phy set mdio portlist=129,130 devad=0x1 addr=0x96 data=0x2200'" + #delay 1 sec + sleep 1 + + #switch 10G MUX to front panel on CPLD + value=$(( value | 0x0c )) + echo "$(printf 0x"%x" ${value})" > ${file_10g_mux} + + echo "Switch 10G Mux to [Front Panel]" + else + echo "invalid target, please set target to cpu/fp" + fi +} + +#Main Function +function _main { + tart_time_str=`date` + start_time_sec=$(date +%s) + + if [ "${EXEC_FUNC}" == "help" ]; then + _help + elif [ "${EXEC_FUNC}" == "i2c_init" ]; then + _i2c_init + elif [ "${EXEC_FUNC}" == "i2c_deinit" ]; then + _i2c_deinit + elif [ "${EXEC_FUNC}" == "i2c_fan_speed_init" ]; then + _i2c_fan_speed_init + elif [ "${EXEC_FUNC}" == "i2c_io_exp_init" ]; then + _i2c_io_exp_init + elif [ "${EXEC_FUNC}" == "i2c_led_test" ]; then + _i2c_led_test + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_get" ]; then + _i2c_mb_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_cb_eeprom_get" ]; then + _i2c_cb_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_eeprom_sync" ]; then + _i2c_eeprom_sync + elif [ "${EXEC_FUNC}" == "i2c_psu_eeprom_get" ]; then + _i2c_psu_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_get" ]; then + _i2c_qsfp_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_sfp_eeprom_get" ]; then + _i2c_sfp_eeprom_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_eeprom_init" ]; then + _i2c_qsfp_eeprom_init ${QSFP_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_sfp_eeprom_init" ]; then + _i2c_sfp_eeprom_init ${SFP_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_mb_eeprom_init" ]; then + _i2c_mb_eeprom_init ${MB_EEPROM_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_cb_eeprom_init" ]; then + _i2c_cb_eeprom_init ${MB_EEPROM_ACTION} + elif [ "${EXEC_FUNC}" == "i2c_qsfp_status_get" ]; then + _i2c_qsfp_status_get + elif [ "${EXEC_FUNC}" == "i2c_sfp_status_get" ]; then + _i2c_sfp_status_get + elif [ "${EXEC_FUNC}" == "i2c_qsfp_type_get" ]; then + _i2c_qsfp_type_get + elif [ "${EXEC_FUNC}" == "i2c_sfp_type_get" ]; then + _i2c_sfp_type_get + elif [ "${EXEC_FUNC}" == "i2c_led_psu_status_set" ]; then + _i2c_led_psu_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_status_set" ]; then + _i2c_led_fan_status_set + elif [ "${EXEC_FUNC}" == "i2c_led_fan_tray_status_set" ]; then + _i2c_led_fan_tray_status_set + elif [ "${EXEC_FUNC}" == "i2c_sys_led" ]; then + _i2c_sys_led + elif [ "${EXEC_FUNC}" == "i2c_fan_led" ]; then + _i2c_fan_led + elif [ "${EXEC_FUNC}" == "i2c_fan_tray_led" ]; then + _i2c_fan_tray_led + elif [ "${EXEC_FUNC}" == "i2c_psu1_led" ]; then + _i2c_psu1_led + elif [ "${EXEC_FUNC}" == "i2c_psu2_led" ]; then + _i2c_psu2_led + elif [ "${EXEC_FUNC}" == "i2c_board_type_get" ]; then + _i2c_board_type_get + elif [ "${EXEC_FUNC}" == "i2c_bmc_board_type_get" ]; then + _i2c_bmc_board_type_get + elif [ "${EXEC_FUNC}" == "i2c_cpld_version" ]; then + _i2c_cpld_version + elif [ "${EXEC_FUNC}" == "i2c_psu_status" ]; then + _i2c_psu_status + elif [ "${EXEC_FUNC}" == "i2c_test_all" ]; then + _i2c_init + _i2c_led_test + _i2c_psu_eeprom_get + _i2c_mb_eeprom_get + _i2c_cb_eeprom_get + _i2c_board_type_get + _i2c_bmc_board_type_get + _i2c_cpld_version + _i2c_psu_status + elif [ "${EXEC_FUNC}" == "i2c_10g_mux" ]; then + _i2c_10g_mux + else + echo "Invalid Parameters, Exit!!!" + _help + exit ${FALSE} + fi + + if [ "$DEBUG" == "on" ]; then + echo "-----------------------------------------------------" + end_time_str=`date` + end_time_sec=$(date +%s) + diff_time=$[ ${end_time_sec} - ${start_time_sec} ] + echo "Start Time: ${start_time_str} (${start_time_sec})" + echo "End Time : ${end_time_str} (${end_time_sec})" + echo "Total Execution Time: ${diff_time} sec" + + echo "done!!!" + fi +} + +_main diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/utils/qsfp_monitor.sh b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/utils/qsfp_monitor.sh new file mode 100755 index 00000000000..23a3fd066be --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/utils/qsfp_monitor.sh @@ -0,0 +1,105 @@ +#!/bin/bash +# Copyright (C) 2017 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=3 +I2C_UTILS="/usr/sbin/i2c_utils.sh" +QSFP_SI_SCRIPT="/usr/sbin/qsfp_si_cfg.sh" +QSFP_ARRAY=(0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 \ + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + +#QSFP SI monitor +function _qsfp_si_monitor { + local i + local status + for i in {0..63}; + do + status=`${I2C_UTILS} i2c_qsfp_status_get $(expr $i + 1) | egrep '^status=.*$' | sed -e 's/status=//g'` + if [ "${status}" == "1" ]; then + _qsfp_type_check $i + fi + done +} + +#QSFP type +function _qsfp_type_check { + local port=$1 + local qsfp_type=`${I2C_UTILS} i2c_qsfp_type_get $(expr $port + 1)` + local identifier=`echo "$qsfp_type" | grep '^identifier=.*$' | sed -e 's/identifier=//g'` + if [ "${identifier}" == "11" ]; then + connector=`echo "$qsfp_type" | grep '^connector=.*$' | sed -e 's/connector=//g'` + case ${connector} in + 21|23) + #DAC + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to DAC" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} dac $port >/dev/null + fi + ;; + *) + #Optical + if [ "${QSFP_ARRAY[$port]}" != "${connector}" ]; then + echo "Change Port $(expr $port + 1) to Optical" + QSFP_ARRAY[$port]=${connector} + ${QSFP_SI_SCRIPT} optical $port >/dev/null + fi + ;; + esac + fi +} + +#Docker exist check +function _docker_swss_check { + while true + do + # Check if syncd starts + result=`docker exec -i swss bash -c "echo -en \"SELECT 1\\nHLEN HIDDEN\" | redis-cli | sed -n 2p"` #TBD FIX ME + if [ "$result" == "3" ]; then + return + fi + sleep $INTERVAL + done +} + +#Docker exist check +function _qsfp_si_cfg_script_check { + + if [ -f ${QSFP_SI_SCRIPT} ] && [ -x ${QSFP_SI_SCRIPT} ]; then + echo "SI Script exists. Start monitor." + return + else + echo "SI Script not exist. Exit monitor." + exit + fi +} + +# main function +function _main { + #Check SI Script + _qsfp_si_cfg_script_check + #Check docker swss is running + _docker_swss_check + while true + do + _qsfp_si_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main + diff --git a/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/utils/s9230_64x_monitor.sh b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/utils/s9230_64x_monitor.sh new file mode 100755 index 00000000000..8bfb2232800 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-ingrasys/s9230-64x/utils/s9230_64x_monitor.sh @@ -0,0 +1,39 @@ +#!/bin/bash +# Copyright (C) 2016 Ingrasys, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +INTERVAL=5 +I2C_UTILS="/usr/sbin/i2c_utils.sh" + + +# LED status monitor +function _led_monitor { + ${I2C_UTILS} i2c_led_fan_status_set >/dev/null + ${I2C_UTILS} i2c_led_psu_status_set >/dev/null + ${I2C_UTILS} i2c_led_fan_tray_status_set >/dev/null +} + +# main function +function _main { + while true + do + _led_monitor + # Sleep while still handling signals + sleep $INTERVAL & + wait $! + done +} + +_main diff --git a/platform/nephos/sonic-platform-modules-pegatron/LICENSE b/platform/nephos/sonic-platform-modules-pegatron/LICENSE new file mode 100644 index 00000000000..a23cc2b232c --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/LICENSE @@ -0,0 +1,16 @@ +Copyright (C) 2016 Microsoft, Inc +Copyright (C) 2018 Pegatron Corporation. + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/nephos/sonic-platform-modules-pegatron/README.md b/platform/nephos/sonic-platform-modules-pegatron/README.md new file mode 100644 index 00000000000..32444b4b891 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/README.md @@ -0,0 +1 @@ +platform drivers of Pegatron products for the SONiC project diff --git a/platform/nephos/sonic-platform-modules-pegatron/common/modules/pegatron_hwmon_mcu.c b/platform/nephos/sonic-platform-modules-pegatron/common/modules/pegatron_hwmon_mcu.c new file mode 100644 index 00000000000..76cbd884470 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/common/modules/pegatron_hwmon_mcu.c @@ -0,0 +1,1374 @@ +/* + * A MCU driver connect to hwmon + * + * Copyright (C) 2018 Pegatron Corporation. + * Peter5_Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#undef pega_DEBUG +/*#define pega_DEBUG*/ +#ifdef pega_DEBUG +#define DBG(x) x +#else +#define DBG(x) +#endif /* DEBUG */ + +#define FW_UPGRADE_COMMAND 0xA5 +#define FAN_DISABLE_COMMAND 0x20 +#define FAN_ENABLE_COMMAND 0x21 +#define FAN_LED_SETTO_MANUAL_COMMAND 0x30 +#define FAN_LED_SETTO_AUTO_COMMAND 0x31 +#define FAN_LED_GREENON_COMMAND 0x40 +#define FAN_LED_GREENOFF_COMMAND 0x41 +#define FAN_LED_AMBERON_COMMAND 0x50 +#define FAN_LED_AMBEROFF_COMMAND 0x51 +#define SMART_FAN_ENABLE_BIT 0 +#define SMART_FAN_SETTING_ENABLE_BIT 0 +#define SA56004X_REMOTE_TEMP_ALERT_BIT 4 +#define I2C_FANBOARD_TIMEOUT_BIT 0 +#define ALERT_MODE_BIT 0 +#define GET_BIT(data, bit, value) value = (data >> bit) & 0x1 +#define SET_BIT(data, bit) data |= (1 << bit) +#define CLEAR_BIT(data, bit) data &= ~(1 << bit) + +enum chips +{ + mercedes3 = 0, + cadillac, + porsche, +}; + +enum fan_alert +{ + FAN_OUTER_RPM_OVER_ALERT_BIT = 0, + FAN_OUTER_RPM_UNDER_ALERT_BIT, + FAN_INNER_RPM_OVER_ALERT_BIT, + FAN_INNER_RPM_UNDER_ALERT_BIT, + FAN_CONNECT_ALERT_BIT, + FAN_DISCONNECT_ALERT_BIT, +}; + +enum fan_status +{ + FAN_ALERT_BIT = 2, + FAN_LED_AMBER_BIT, + FAN_LED_GREEN_BIT, + FAN_LED_AUTO_BIT, + FAN_ENABLE_BIT, + FAN_PRESENT_BIT, +}; + +enum hwmon_mcu_register +{ + MB_FW_UG_REG = 0, + FB_FW_UG_REG, + MB_HW_VER_REG, + FB_HW_SKUVER_REG, + MB_FW_VER_REG, + FB_FW_VER_REG, + + FAN_PWM_REG = 16, + + SF_ENABLE_REG, + SF_SETTING_ENABLE_REG, + SF_DEVICE_REG, + SF_UPDATE_REG, + SF_TEMP_MAX_REG, + SF_TEMP_MID_REG, + SF_TEMP_MIN_REG, + SF_PWM_MAX_REG, + SF_PWM_MID_REG, + SF_PWM_MIN_REG, + + FAN1_INNER_RPM_REG = 32, + FAN2_INNER_RPM_REG, + FAN3_INNER_RPM_REG, + FAN4_INNER_RPM_REG, + FAN5_INNER_RPM_REG, + + FAN1_OUTER_RPM_REG = 48, + FAN2_OUTER_RPM_REG, + FAN3_OUTER_RPM_REG, + FAN4_OUTER_RPM_REG, + FAN5_OUTER_RPM_REG, + + FAN1_STATUS_REG = 64, + FAN2_STATUS_REG, + FAN3_STATUS_REG, + FAN4_STATUS_REG, + FAN5_STATUS_REG, + + ADC_UNDER_VOL_ALERT_REG = 80, + ADC_OVER_VOL_ALERT_REG, + TS_OVER_TEMP_ALERT_REG, + + FAN1_ALERT_REG, + FAN2_ALERT_REG, + FAN3_ALERT_REG, + FAN4_ALERT_REG, + FAN5_ALERT_REG, + + I2C_BUS_ALERT_REG, + ALERT_MODE_REG, + + MONITOR_ADC_VOLTAGE_REG = 96, + + LM_0X49_TEMP_REG = 112, + LM_0X48_TEMP_REG, + SA56004X_LOCAL_TEMP_REG, + SA56004X_REMOTE_TEMP_REG, + +}; + +static struct mutex pega_hwmon_mcu_lock; + +static int pega_hwmon_mcu_read(struct i2c_client *client, u8 reg) +{ + int data = -EPERM; + + mutex_lock(&pega_hwmon_mcu_lock); + + data = i2c_smbus_read_word_data(client, reg); + + mutex_unlock(&pega_hwmon_mcu_lock); + + return data; +} + +static int pega_hwmon_mcu_write(struct i2c_client *client, u8 reg, u8 val) +{ + int ret = -EIO; + + mutex_lock(&pega_hwmon_mcu_lock); + + ret = i2c_smbus_write_byte_data(client, reg, val); + + mutex_unlock(&pega_hwmon_mcu_lock); + + return ret; +} + +static ssize_t mainBoardUpgrade(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = MB_FW_UG_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + if(val) + pega_hwmon_mcu_write(client, reg, FW_UPGRADE_COMMAND); + else + pega_hwmon_mcu_write(client, reg, 0xff); + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, FW_UPGRADE_COMMAND)); + + return count; +} + +static ssize_t fanBoardUpgrade(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = FB_FW_UG_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + if(val) + pega_hwmon_mcu_write(client, reg, FW_UPGRADE_COMMAND); + else + pega_hwmon_mcu_write(client, reg, 0xff); + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, FW_UPGRADE_COMMAND)); + + return count; +} + +static ssize_t get_MB_HW_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = MB_HW_VER_REG; + + data = pega_hwmon_mcu_read(client, reg); + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + data &= 0x1f; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t get_FB_HW_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = FB_HW_SKUVER_REG; + + data = pega_hwmon_mcu_read(client, reg); + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + data = (data >> 5) & 0x7; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t get_FB_boardId(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = FB_HW_SKUVER_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data &= 0x1f; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t get_MB_FW_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, major_ver = 0, minor_ver = 0; + u8 reg = MB_FW_VER_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + major_ver = (data >> 4) & 0xf; + minor_ver = data & 0xf; + + return sprintf(buf, "%d.%d\n", major_ver, minor_ver); +} + +static ssize_t get_FB_FW_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, major_ver = 0, minor_ver = 0; + u8 reg = FB_FW_VER_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + major_ver = (data >> 4) & 0xf; + minor_ver = data & 0xf; + + return sprintf(buf, "%d.%d\n", major_ver, minor_ver); +} + +static ssize_t get_fan_PWM(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = FAN_PWM_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_fan_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = FAN_PWM_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, val: %x\r\n", __func__, client->addr, reg, val)); + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = SF_ENABLE_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, SMART_FAN_ENABLE_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t set_smartFan_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_ENABLE_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + if(val) + SET_BIT(data, SMART_FAN_ENABLE_BIT); + else + CLEAR_BIT(data, SMART_FAN_ENABLE_BIT); + pega_hwmon_mcu_write(client, reg, data); + + return count; +} + +static ssize_t get_smartFan_setting_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = SF_SETTING_ENABLE_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, SMART_FAN_SETTING_ENABLE_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t set_smartFan_setting_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_SETTING_ENABLE_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + if(val) + SET_BIT(data, SMART_FAN_SETTING_ENABLE_BIT); + else + CLEAR_BIT(data, SMART_FAN_SETTING_ENABLE_BIT); + pega_hwmon_mcu_write(client, reg, data); + + return count; +} + +static ssize_t get_smartFan_device(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_DEVICE_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%x\n", data); +} + +static ssize_t set_smartFan_device(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_DEVICE_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_update(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_UPDATE_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_smartFan_update(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_UPDATE_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_max_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_TEMP_MAX_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_smartFan_max_temp(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_TEMP_MAX_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_mid_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_TEMP_MID_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_smartFan_mid_temp(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_TEMP_MID_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_min_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_TEMP_MID_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_smartFan_min_temp(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_TEMP_MID_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_max_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MAX_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_smartFan_max_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MAX_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_mid_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MID_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_smartFan_mid_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MID_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_min_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MIN_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_smartFan_min_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MIN_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_fan_inner_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u16 data = 0; + u8 reg = FAN1_INNER_RPM_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t get_fan_outer_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u16 data = 0; + u8 reg = FAN1_OUTER_RPM_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t get_fan_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_STATUS_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_PRESENT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_fan_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_STATUS_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_ENABLE_BIT, val); + + return sprintf(buf, "%d\n", val); +} + + +static ssize_t set_fan_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MID_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, val: %x\r\n", __func__, client->addr, reg, val)); + + if(val) + pega_hwmon_mcu_write(client, reg, FAN_ENABLE_COMMAND); + else + pega_hwmon_mcu_write(client, reg, FAN_DISABLE_COMMAND); + + return count; +} + +static ssize_t get_fan_led_auto(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_STATUS_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_LED_AUTO_BIT, val); + + return sprintf(buf, "%d\n", val); +} + + +static ssize_t set_fan_led_auto(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MID_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, val: %x\r\n", __func__, client->addr, reg, val)); + + if(val) + pega_hwmon_mcu_write(client, reg, FAN_LED_SETTO_AUTO_COMMAND); + else + pega_hwmon_mcu_write(client, reg, FAN_LED_SETTO_MANUAL_COMMAND); + + return count; +} + +static ssize_t get_fan_led_green(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_STATUS_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_LED_GREEN_BIT, val); + + return sprintf(buf, "%d\n", val); +} + + +static ssize_t set_fan_led_green(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MID_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, val: %x\r\n", __func__, client->addr, reg, val)); + + if(val) + pega_hwmon_mcu_write(client, reg, FAN_LED_GREENON_COMMAND); + else + pega_hwmon_mcu_write(client, reg, FAN_LED_GREENOFF_COMMAND); + + return count; +} + +static ssize_t get_fan_led_amber(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_STATUS_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_LED_AMBER_BIT, val); + + return sprintf(buf, "%d\n", val); +} + + +static ssize_t set_fan_led_amber(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MID_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, val: %x\r\n", __func__, client->addr, reg, val)); + + if(val) + pega_hwmon_mcu_write(client, reg, FAN_LED_AMBERON_COMMAND); + else + pega_hwmon_mcu_write(client, reg, FAN_LED_AMBEROFF_COMMAND); + + return count; +} + +static ssize_t get_fan_status_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_STATUS_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_ALERT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_adc_under_vol_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = ADC_UNDER_VOL_ALERT_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, attr->index, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_adc_over_vol_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = ADC_OVER_VOL_ALERT_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, attr->index, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_temp_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = TS_OVER_TEMP_ALERT_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, SA56004X_REMOTE_TEMP_ALERT_BIT + attr->index, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_fan_outerRPMOver_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_ALERT_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_OUTER_RPM_OVER_ALERT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_fan_outerRPMUnder_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_ALERT_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_OUTER_RPM_UNDER_ALERT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_fan_innerRPMOver_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_ALERT_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_INNER_RPM_OVER_ALERT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_fan_innerRPMUnder_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_ALERT_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_INNER_RPM_UNDER_ALERT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_fan_connect_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_ALERT_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_CONNECT_ALERT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_fan_disconnect_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_ALERT_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_DISCONNECT_ALERT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_i2c_timeout(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = I2C_BUS_ALERT_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, I2C_FANBOARD_TIMEOUT_BIT + attr->index, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_alert_mode(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = ALERT_MODE_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, ALERT_MODE_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t set_alert_mode(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = ALERT_MODE_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, val: %x\r\n", __func__, client->addr, reg, val)); + + if(val) + SET_BIT(data, ALERT_MODE_BIT); + else + CLEAR_BIT(data, ALERT_MODE_BIT); + pega_hwmon_mcu_write(client, reg, data); + + return count; +} + +static ssize_t get_adc_vol(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u16 data = 0, reg = MONITOR_ADC_VOLTAGE_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d.%02d\n", data/1000, (data/10)%12); +} + +static ssize_t get_hwmon_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = LM_0X49_TEMP_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} +#define SET_FAN_ATTR(_num) \ + static SENSOR_DEVICE_ATTR(fan##_num##_inner_rpm, S_IRUGO, get_fan_inner_rpm, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_outer_rpm, S_IRUGO, get_fan_outer_rpm, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_present, S_IRUGO, get_fan_present, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_enable, S_IRUGO | S_IWUSR, get_fan_enable, set_fan_enable, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_led_auto, S_IRUGO | S_IWUSR, get_fan_led_auto, set_fan_led_auto, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_led_green, S_IRUGO | S_IWUSR, get_fan_led_green, set_fan_led_green, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_led_amber, S_IRUGO | S_IWUSR, get_fan_led_amber, set_fan_led_amber, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_status_alert, S_IRUGO, get_fan_status_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_outerRPMOver_alert, S_IRUGO, get_fan_outerRPMOver_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_outerRPMUnder_alert, S_IRUGO, get_fan_outerRPMUnder_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_innerRPMOver_alert, S_IRUGO, get_fan_innerRPMOver_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_innerRPMUnder_alert, S_IRUGO, get_fan_innerRPMUnder_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_connect_alert, S_IRUGO, get_fan_connect_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_disconnect_alert, S_IRUGO, get_fan_disconnect_alert, NULL, _num-1) + +SET_FAN_ATTR(1);SET_FAN_ATTR(2);SET_FAN_ATTR(3);SET_FAN_ATTR(4);SET_FAN_ATTR(5); + +#define SET_ADC_ATTR(_num) \ + static SENSOR_DEVICE_ATTR(ADC##_num##_under_alert, S_IRUGO, get_adc_under_vol_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(ADC##_num##_over_alert, S_IRUGO, get_adc_over_vol_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(ADC##_num##_vol, S_IRUGO, get_adc_vol, NULL, 8-_num) + +SET_ADC_ATTR(1);SET_ADC_ATTR(2);SET_ADC_ATTR(3);SET_ADC_ATTR(4);SET_ADC_ATTR(5);SET_ADC_ATTR(6);SET_ADC_ATTR(7);SET_ADC_ATTR(8); + +static SENSOR_DEVICE_ATTR(mb_fw_upgrade, S_IWUSR, NULL, mainBoardUpgrade, 0); +static SENSOR_DEVICE_ATTR(fb_fw_upgrade, S_IWUSR, NULL, fanBoardUpgrade, 0); +static SENSOR_DEVICE_ATTR(mb_hw_version, S_IRUGO, get_MB_HW_version, NULL, 0); +static SENSOR_DEVICE_ATTR(fb_hw_version, S_IRUGO, get_FB_HW_version, NULL, 0); +static SENSOR_DEVICE_ATTR(fb_board_id, S_IRUGO, get_FB_boardId, NULL, 0); +static SENSOR_DEVICE_ATTR(mb_fw_version, S_IRUGO, get_MB_FW_version, NULL, 0); +static SENSOR_DEVICE_ATTR(fb_fw_version, S_IRUGO, get_FB_FW_version, NULL, 0); +static SENSOR_DEVICE_ATTR(fan_pwm, S_IRUGO | S_IWUSR, get_fan_PWM, set_fan_pwm, 0); + +static SENSOR_DEVICE_ATTR(smartFan_enable, S_IRUGO | S_IWUSR, get_smartFan_enable, set_smartFan_enable, 0); +static SENSOR_DEVICE_ATTR(smartFan_setting_enable, S_IRUGO | S_IWUSR, get_smartFan_setting_enable, set_smartFan_setting_enable, 0); +static SENSOR_DEVICE_ATTR(smartFan_device, S_IRUGO | S_IWUSR, get_smartFan_device, set_smartFan_device, 0); +static SENSOR_DEVICE_ATTR(smartFan_update, S_IRUGO | S_IWUSR, get_smartFan_update, set_smartFan_update, 0); +static SENSOR_DEVICE_ATTR(smartFan_max_temp, S_IRUGO | S_IWUSR, get_smartFan_max_temp, set_smartFan_max_temp, 0); +static SENSOR_DEVICE_ATTR(smartFan_mid_temp, S_IRUGO | S_IWUSR, get_smartFan_mid_temp, set_smartFan_mid_temp, 0); +static SENSOR_DEVICE_ATTR(smartFan_min_temp, S_IRUGO | S_IWUSR, get_smartFan_min_temp, set_smartFan_min_temp, 0); +static SENSOR_DEVICE_ATTR(smartFan_max_pwm, S_IRUGO | S_IWUSR, get_smartFan_max_pwm, set_smartFan_max_pwm, 0); +static SENSOR_DEVICE_ATTR(smartFan_mid_pwm, S_IRUGO | S_IWUSR, get_smartFan_mid_pwm, set_smartFan_mid_pwm, 0); +static SENSOR_DEVICE_ATTR(smartFan_min_pwm, S_IRUGO | S_IWUSR, get_smartFan_min_pwm, set_smartFan_min_pwm, 0); + +static SENSOR_DEVICE_ATTR(lm75_49_temp_alert, S_IRUGO, get_temp_alert, NULL, 3); +static SENSOR_DEVICE_ATTR(lm75_48_temp_alert, S_IRUGO, get_temp_alert, NULL, 2); +static SENSOR_DEVICE_ATTR(SA56004X_Ltemp_alert, S_IRUGO, get_temp_alert, NULL, 1); +static SENSOR_DEVICE_ATTR(SA56004X_Rtemp_alert, S_IRUGO, get_temp_alert, NULL, 0); + +static SENSOR_DEVICE_ATTR(i2c_fb_timeout, S_IRUGO, get_i2c_timeout, NULL, 0); +static SENSOR_DEVICE_ATTR(i2c_remote_timeout, S_IRUGO, get_i2c_timeout, NULL, 1); +static SENSOR_DEVICE_ATTR(i2c_local_timeout, S_IRUGO, get_i2c_timeout, NULL, 2); +static SENSOR_DEVICE_ATTR(i2c_lm75_48_timeout, S_IRUGO, get_i2c_timeout, NULL, 3); +static SENSOR_DEVICE_ATTR(i2c_lm75_49_timeout, S_IRUGO, get_i2c_timeout, NULL, 4); +static SENSOR_DEVICE_ATTR(alert_mode, S_IRUGO | S_IWUSR, get_alert_mode, set_alert_mode, 0); + +static SENSOR_DEVICE_ATTR(lm75_49_temp, S_IRUGO, get_hwmon_temp, NULL, 0); +static SENSOR_DEVICE_ATTR(lm75_48_temp, S_IRUGO, get_hwmon_temp, NULL, 1); +static SENSOR_DEVICE_ATTR(SA56004_local_temp, S_IRUGO, get_hwmon_temp, NULL, 2); +static SENSOR_DEVICE_ATTR(SA56004_remote_temp, S_IRUGO, get_hwmon_temp, NULL, 3); + +static struct attribute *pega_hwmon_mcu_attributes[] = { + &sensor_dev_attr_mb_fw_upgrade.dev_attr.attr, + &sensor_dev_attr_fb_fw_upgrade.dev_attr.attr, + &sensor_dev_attr_mb_hw_version.dev_attr.attr, + &sensor_dev_attr_fb_hw_version.dev_attr.attr, + &sensor_dev_attr_fb_board_id.dev_attr.attr, + &sensor_dev_attr_mb_fw_version.dev_attr.attr, + &sensor_dev_attr_fb_fw_version.dev_attr.attr, + &sensor_dev_attr_fan_pwm.dev_attr.attr, + + &sensor_dev_attr_smartFan_enable.dev_attr.attr, + &sensor_dev_attr_smartFan_setting_enable.dev_attr.attr, + &sensor_dev_attr_smartFan_device.dev_attr.attr, + &sensor_dev_attr_smartFan_update.dev_attr.attr, + &sensor_dev_attr_smartFan_max_temp.dev_attr.attr, + &sensor_dev_attr_smartFan_mid_temp.dev_attr.attr, + &sensor_dev_attr_smartFan_min_temp.dev_attr.attr, + &sensor_dev_attr_smartFan_max_pwm.dev_attr.attr, + &sensor_dev_attr_smartFan_mid_pwm.dev_attr.attr, + &sensor_dev_attr_smartFan_min_pwm.dev_attr.attr, + + &sensor_dev_attr_fan1_inner_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_inner_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_inner_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_inner_rpm.dev_attr.attr, + &sensor_dev_attr_fan5_inner_rpm.dev_attr.attr, + + &sensor_dev_attr_fan1_outer_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_outer_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_outer_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_outer_rpm.dev_attr.attr, + &sensor_dev_attr_fan5_outer_rpm.dev_attr.attr, + + &sensor_dev_attr_fan1_present.dev_attr.attr, + &sensor_dev_attr_fan2_present.dev_attr.attr, + &sensor_dev_attr_fan3_present.dev_attr.attr, + &sensor_dev_attr_fan4_present.dev_attr.attr, + &sensor_dev_attr_fan5_present.dev_attr.attr, + + &sensor_dev_attr_fan1_enable.dev_attr.attr, + &sensor_dev_attr_fan2_enable.dev_attr.attr, + &sensor_dev_attr_fan3_enable.dev_attr.attr, + &sensor_dev_attr_fan4_enable.dev_attr.attr, + &sensor_dev_attr_fan5_enable.dev_attr.attr, + + &sensor_dev_attr_fan1_led_auto.dev_attr.attr, + &sensor_dev_attr_fan2_led_auto.dev_attr.attr, + &sensor_dev_attr_fan3_led_auto.dev_attr.attr, + &sensor_dev_attr_fan4_led_auto.dev_attr.attr, + &sensor_dev_attr_fan5_led_auto.dev_attr.attr, + + &sensor_dev_attr_fan1_led_green.dev_attr.attr, + &sensor_dev_attr_fan2_led_green.dev_attr.attr, + &sensor_dev_attr_fan3_led_green.dev_attr.attr, + &sensor_dev_attr_fan4_led_green.dev_attr.attr, + &sensor_dev_attr_fan5_led_green.dev_attr.attr, + + &sensor_dev_attr_fan1_led_amber.dev_attr.attr, + &sensor_dev_attr_fan2_led_amber.dev_attr.attr, + &sensor_dev_attr_fan3_led_amber.dev_attr.attr, + &sensor_dev_attr_fan4_led_amber.dev_attr.attr, + &sensor_dev_attr_fan5_led_amber.dev_attr.attr, + + &sensor_dev_attr_fan1_status_alert.dev_attr.attr, + &sensor_dev_attr_fan2_status_alert.dev_attr.attr, + &sensor_dev_attr_fan3_status_alert.dev_attr.attr, + &sensor_dev_attr_fan4_status_alert.dev_attr.attr, + &sensor_dev_attr_fan5_status_alert.dev_attr.attr, + + &sensor_dev_attr_ADC1_under_alert.dev_attr.attr, + &sensor_dev_attr_ADC2_under_alert.dev_attr.attr, + &sensor_dev_attr_ADC3_under_alert.dev_attr.attr, + &sensor_dev_attr_ADC4_under_alert.dev_attr.attr, + &sensor_dev_attr_ADC5_under_alert.dev_attr.attr, + &sensor_dev_attr_ADC6_under_alert.dev_attr.attr, + &sensor_dev_attr_ADC7_under_alert.dev_attr.attr, + &sensor_dev_attr_ADC8_under_alert.dev_attr.attr, + + &sensor_dev_attr_ADC1_over_alert.dev_attr.attr, + &sensor_dev_attr_ADC2_over_alert.dev_attr.attr, + &sensor_dev_attr_ADC3_over_alert.dev_attr.attr, + &sensor_dev_attr_ADC4_over_alert.dev_attr.attr, + &sensor_dev_attr_ADC5_over_alert.dev_attr.attr, + &sensor_dev_attr_ADC6_over_alert.dev_attr.attr, + &sensor_dev_attr_ADC7_over_alert.dev_attr.attr, + &sensor_dev_attr_ADC8_over_alert.dev_attr.attr, + + &sensor_dev_attr_lm75_48_temp_alert.dev_attr.attr, + &sensor_dev_attr_lm75_49_temp_alert.dev_attr.attr, + &sensor_dev_attr_SA56004X_Ltemp_alert.dev_attr.attr, + &sensor_dev_attr_SA56004X_Rtemp_alert.dev_attr.attr, + + &sensor_dev_attr_fan1_outerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan2_outerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan3_outerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan4_outerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan5_outerRPMOver_alert.dev_attr.attr, + + &sensor_dev_attr_fan1_outerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan2_outerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan3_outerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan4_outerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan5_outerRPMUnder_alert.dev_attr.attr, + + &sensor_dev_attr_fan1_innerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan2_innerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan3_innerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan4_innerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan5_innerRPMOver_alert.dev_attr.attr, + + &sensor_dev_attr_fan1_innerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan2_innerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan3_innerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan4_innerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan5_innerRPMUnder_alert.dev_attr.attr, + + &sensor_dev_attr_fan1_connect_alert.dev_attr.attr, + &sensor_dev_attr_fan2_connect_alert.dev_attr.attr, + &sensor_dev_attr_fan3_connect_alert.dev_attr.attr, + &sensor_dev_attr_fan4_connect_alert.dev_attr.attr, + &sensor_dev_attr_fan5_connect_alert.dev_attr.attr, + + &sensor_dev_attr_fan1_disconnect_alert.dev_attr.attr, + &sensor_dev_attr_fan2_disconnect_alert.dev_attr.attr, + &sensor_dev_attr_fan3_disconnect_alert.dev_attr.attr, + &sensor_dev_attr_fan4_disconnect_alert.dev_attr.attr, + &sensor_dev_attr_fan5_disconnect_alert.dev_attr.attr, + + &sensor_dev_attr_i2c_fb_timeout.dev_attr.attr, + &sensor_dev_attr_i2c_remote_timeout.dev_attr.attr, + &sensor_dev_attr_i2c_local_timeout.dev_attr.attr, + &sensor_dev_attr_i2c_lm75_48_timeout.dev_attr.attr, + &sensor_dev_attr_i2c_lm75_49_timeout.dev_attr.attr, + &sensor_dev_attr_alert_mode.dev_attr.attr, + + &sensor_dev_attr_ADC1_vol.dev_attr.attr, + &sensor_dev_attr_ADC2_vol.dev_attr.attr, + &sensor_dev_attr_ADC3_vol.dev_attr.attr, + &sensor_dev_attr_ADC4_vol.dev_attr.attr, + &sensor_dev_attr_ADC5_vol.dev_attr.attr, + &sensor_dev_attr_ADC6_vol.dev_attr.attr, + &sensor_dev_attr_ADC7_vol.dev_attr.attr, + &sensor_dev_attr_ADC8_vol.dev_attr.attr, + + &sensor_dev_attr_lm75_49_temp.dev_attr.attr, + &sensor_dev_attr_lm75_48_temp.dev_attr.attr, + &sensor_dev_attr_SA56004_local_temp.dev_attr.attr, + &sensor_dev_attr_SA56004_remote_temp.dev_attr.attr, + + NULL +}; + +static const struct attribute_group pega_hwmon_mcu_group = { .attrs = pega_hwmon_mcu_attributes}; + +static int pega_hwmon_mcu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + + status = sysfs_create_group(&client->dev.kobj, &pega_hwmon_mcu_group); + + if (status) { + goto exit; + } + + dev_info(&client->dev, "chip found\n"); + + return 0; + +exit: + return status; +} + +static int pega_hwmon_mcu_remove(struct i2c_client *client) +{ + sysfs_remove_group(&client->dev.kobj, &pega_hwmon_mcu_group); + return 0; +} + +static const struct i2c_device_id pega_hwmon_mcu_id[] = { + { "porsche_hwmon_mcu", porsche }, + {} +}; +MODULE_DEVICE_TABLE(i2c, pega_hwmon_mcu_id); + +static struct i2c_driver pega_hwmon_mcu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "pegatron_hwmon_mcu", + }, + .probe = pega_hwmon_mcu_probe, + .remove = pega_hwmon_mcu_remove, + .id_table = pega_hwmon_mcu_id, +}; + +static int __init pega_hwmon_mcu_init(void) +{ + mutex_init(&pega_hwmon_mcu_lock); + + return i2c_add_driver(&pega_hwmon_mcu_driver); +} + +static void __exit pega_hwmon_mcu_exit(void) +{ + i2c_del_driver(&pega_hwmon_mcu_driver); +} + +MODULE_AUTHOR("Peter5 Lin "); +MODULE_DESCRIPTION("pega_hwmon_mcu driver"); +MODULE_LICENSE("GPL"); + +module_init(pega_hwmon_mcu_init); +module_exit(pega_hwmon_mcu_exit); \ No newline at end of file diff --git a/platform/nephos/sonic-platform-modules-pegatron/debian/changelog b/platform/nephos/sonic-platform-modules-pegatron/debian/changelog new file mode 100644 index 00000000000..39ecd34d960 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/debian/changelog @@ -0,0 +1,5 @@ +sonic-pegatron-platform-modules (0.1) unstable; urgency=low + + * Initial release + + -- Pegatron Mon, 12 Mar 2018 15:22:37 +0800 diff --git a/platform/nephos/sonic-platform-modules-pegatron/debian/compat b/platform/nephos/sonic-platform-modules-pegatron/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/nephos/sonic-platform-modules-pegatron/debian/control b/platform/nephos/sonic-platform-modules-pegatron/debian/control new file mode 100755 index 00000000000..18e74be1455 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/debian/control @@ -0,0 +1,12 @@ +Source: sonic-pegatron-platform-modules +Section: main +Priority: extra +Maintainer: Pegatron +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: sonic-platform-pegatron-porsche +Architecture: amd64 +Depends: linux-image-3.16.0-5-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + diff --git a/platform/nephos/sonic-platform-modules-pegatron/debian/rules b/platform/nephos/sonic-platform-modules-pegatron/debian/rules new file mode 100755 index 00000000000..472ec939a47 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/debian/rules @@ -0,0 +1,88 @@ +#!/usr/bin/make -f +# -*- makefile -*- +# Sample debian/rules that uses debhelper. +# This file was originally written by Joey Hess and Craig Small. +# As a special exception, when this file is copied by dh-make into a +# dh-make output file, you may use that output file without restriction. +# This special exception was added by Craig Small in version 0.37 of dh-make. + +include /usr/share/dpkg/pkg-info.mk + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + +export INSTALL_MOD_DIR:=extra + +PYTHON ?= python2 + +PACKAGE_PRE_NAME := sonic-platform-pegatron +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= porsche +MODULE_DIR := modules +UTILS_DIR := utils +SERVICE_DIR := service +SCRIPTS_DIR := scripts +CONF_DIR := conf + +%: + dh $@ --with systemd,python2,python3 --buildsystem=pybuild + +clean: + dh_testdir + dh_testroot + dh_clean + +build: + #make modules -C $(KERNEL_SRC)/build M=$(MODULE_SRC) + (for mod in $(MODULE_DIRS); do \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + #$(PYTHON) $${mod}/setup.py build; \ + done) + +binary: binary-arch binary-indep + # Nothing to do + +binary-arch: + # Nothing to do + +#install: build + #dh_testdir + #dh_testroot + #dh_clean -k + #dh_installdirs + +binary-indep: + dh_testdir + dh_installdirs + + # Custom package commands + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/usr/bin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system; \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin/; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system/; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SCRIPTS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/bin/; \ + #$(PYTHON) $${mod}/setup.py install --root=$(MOD_SRC_DIR)/debian/$(PACKAGE_PRE_NAME)-$${mod} --install-layout=deb; \ + done) + # Resuming debhelper scripts + dh_testroot + dh_install + dh_installchangelogs + dh_installdocs + dh_systemd_enable + dh_installinit + dh_systemd_start + dh_link + dh_fixperms + dh_compress + dh_strip + dh_installdeb + dh_gencontrol + dh_md5sums + dh_builddeb +.PHONY: build binary binary-arch binary-indep clean diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/Makefile b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/Makefile new file mode 100644 index 00000000000..60e882a586d --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/Makefile @@ -0,0 +1 @@ +obj-m:=pegatron_porsche_cpld.o pegatron_hwmon_mcu.o pegatron_porsche_sfp.o diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_hwmon_mcu.c b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_hwmon_mcu.c new file mode 120000 index 00000000000..1357104478a --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_hwmon_mcu.c @@ -0,0 +1 @@ +../../common/modules/pegatron_hwmon_mcu.c \ No newline at end of file diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_porsche_cpld.c b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_porsche_cpld.c new file mode 100644 index 00000000000..154a68dcb83 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_porsche_cpld.c @@ -0,0 +1,1132 @@ +/* + * A CPLD driver for the porsche + * + * Copyright (C) 2018 Pegatron Corporation. + * Peter5_Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#undef pegatron_porsche_DEBUG +/*#define pegatron_porsche_DEBUG*/ +#ifdef pegatron_porsche_DEBUG +#define DBG(x) x +#else +#define DBG(x) +#endif /* DEBUG */ + +#define CPLD_SFP_MAX_GROUP 3 +#define SFP_PORT_MAX_NUM 54 +#define SFP_EEPROM_SIZE 256 +#define QSFP_FIRST_PORT 48 +#define CPLDA_SFP_NUM 24 +#define CPLDB_SFP_NUM 12 +#define CPLDC_SFP_NUM 18 +#define CPLDA_ADDRESS 0x74 +#define CPLDB_ADDRESS 0x75 +#define CPLDC_ADDRESS 0x76 +#define CPLD_VERSION_REG 0x0 +#define SYNC_CONTROL_REG 0x1 +#define CPLD_SYS_PWR_LED_REG 0xD +#define CPLD_LOC_FAN_LED_REG 0xE +#define CPLD_EEPROM_WRITE_REG 0x12 +#define CPLD_PSU_REG 0x15 +#define SFP_13_36_SCL_BASE 0x4 +#define SFP_1_12_SCL_BASE 0x2 +#define SFP_37_54_SCL_BASE 0x5 +#define SFP_13_36_STATUS_BASE 0x8 +#define SFP_1_12_STATUS_BASE 0x5 +#define SFP_37_54_STATUS_BASE 0x9 +#define QSFP_PRESENT_ADDRESS 0xF +#define QSFP_RESET_ADDRESS_BASE 0x10 +#define QSFP_MODSELN_ADDRESS 0x17 +#define QSFP_LOW_POWER_ADDRESS 0x18 +#define CPLD_SERIAL_LED_BIT 2 +#define CPLD_EEPROM_WRITE_BIT 2 +#define SFP_PRESENT_BASE 0 +#define SFP_RXLOSS_BASE 1 +#define SFP_TXFAULT_BASE 2 +#define SFP_TXDISABLE_BASE 3 +#define CPLD_PSU_PWOK_BASE 0 +#define CPLD_PSU_PRESENT_BASE 2 +#define GET_BIT(data, bit, value) value = (data >> bit) & 0x1 +#define SET_BIT(data, bit) data |= (1 << bit) +#define CLEAR_BIT(data, bit) data &= ~(1 << bit) + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; +/* Addresses scanned for pegatron_porsche_cpld + */ +static const unsigned short normal_i2c[] = { CPLDA_ADDRESS, CPLDB_ADDRESS, CPLDC_ADDRESS, I2C_CLIENT_END }; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +int pegatron_porsche_cpld_read(unsigned short addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int data = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == addr) { + data = i2c_smbus_read_byte_data(cpld_node->client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, addr, reg, data)); + break; + } + } + + mutex_unlock(&list_lock); + + return data; +} +EXPORT_SYMBOL(pegatron_porsche_cpld_read); + +int pegatron_porsche_cpld_write(unsigned short addr, u8 reg, u8 val) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == addr) { + ret = i2c_smbus_write_byte_data(cpld_node->client, reg, val); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, addr, reg, val)); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(pegatron_porsche_cpld_write); + +static ssize_t read_cpld_HWversion(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_VERSION_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%02x\n", (data >> 5) & 0x7); +} + +static ssize_t read_cpld_SWversion(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_VERSION_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%02x\n", (data & 0x1f)); +} + +static ssize_t show_allled_ctrl(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = SYNC_CONTROL_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data &= 0x3; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t set_allled_ctrl(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = SYNC_CONTROL_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + data = val | (data & 0xfc); + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static ssize_t show_serial_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0, reg = SYNC_CONTROL_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, CPLD_SERIAL_LED_BIT, val); + + return sprintf(buf, "%02x\n", val); +} + +static ssize_t set_serial_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = SYNC_CONTROL_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + if(val) + SET_BIT(data, CPLD_SERIAL_LED_BIT); + else + CLEAR_BIT(data, CPLD_SERIAL_LED_BIT); + + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static ssize_t show_sys_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_SYS_PWR_LED_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data = (data >> 5) & 0x7; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t set_sys_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_SYS_PWR_LED_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + data = (val << 5) | (data & 0x1f); + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} +static ssize_t show_pwr_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_SYS_PWR_LED_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data = (data >> 2) & 0x7; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t set_pwr_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_SYS_PWR_LED_REG; + long val = 0; + + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + data = (val << 2) | (data & 0xe3); + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} +static ssize_t show_loc_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_LOC_FAN_LED_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data = (data>>4) & 0x3; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t set_loc_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_LOC_FAN_LED_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + data = (val << 4) | (data & 0xf); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static ssize_t show_fan_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_LOC_FAN_LED_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data &= 0x7; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t set_fan_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_LOC_FAN_LED_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + data = val | (data & 0xf8); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static ssize_t show_eeprom_write_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0, reg = CPLD_EEPROM_WRITE_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, reg, val); + + return sprintf(buf, "%02x\n", val); +} + +static ssize_t set_eeprom_write_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_EEPROM_WRITE_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + if(val) + SET_BIT(data, CPLD_EEPROM_WRITE_BIT); + else + CLEAR_BIT(data, CPLD_EEPROM_WRITE_BIT); + + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static ssize_t read_psu_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0, reg = CPLD_PSU_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, (CPLD_PSU_PRESENT_BASE + attr->index), val); + + return sprintf(buf, "%02x\n", val); +} + +static ssize_t read_psu_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val=0, reg = CPLD_PSU_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, (CPLD_PSU_PWOK_BASE + attr->index), val); + + return sprintf(buf, "%02x\n", val); +} + +#define GET_SFP_STATUS_ADDRESS(idx, reg) \ + if(idx < CPLDB_SFP_NUM) \ + reg = SFP_1_12_STATUS_BASE + (idx / 2); \ + else if(idx < CPLDA_SFP_NUM + CPLDB_SFP_NUM) \ + reg = SFP_13_36_STATUS_BASE + ((idx-CPLDB_SFP_NUM) / 2); \ + else \ + reg = SFP_37_54_STATUS_BASE + ((idx-CPLDB_SFP_NUM-CPLDA_SFP_NUM) / 2) + +static ssize_t get_sfp_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 reg = 0, data = 0, val = 0; + + GET_SFP_STATUS_ADDRESS(attr->index, reg); + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, SFP_PRESENT_BASE + 4*(attr->index % 2), val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_sfp_tx_disable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 reg = 0, data = 0, val = 0; + + GET_SFP_STATUS_ADDRESS(attr->index, reg); + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, SFP_TXDISABLE_BASE + 4*(attr->index % 2), val); + + return sprintf(buf, "%d\n", val); +} +static ssize_t set_sfp_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 reg = 0, data = 0; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + GET_SFP_STATUS_ADDRESS(attr->index, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data = pegatron_porsche_cpld_read(client->addr, reg); + + if(val) + SET_BIT(data, SFP_TXDISABLE_BASE + 4*(attr->index % 2)); + else + CLEAR_BIT(data, SFP_TXDISABLE_BASE + 4*(attr->index % 2)); + + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} +static ssize_t get_sfp_rx_loss(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 reg = 0, data = 0, val = 0; + + GET_SFP_STATUS_ADDRESS(attr->index, reg); + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, SFP_RXLOSS_BASE + 4*(attr->index % 2), val); + + return sprintf(buf, "%d\n", val); +} +static ssize_t get_sfp_tx_fault(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 reg = 0, data = 0, val = 0; + + GET_SFP_STATUS_ADDRESS(attr->index, reg); + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, SFP_TXFAULT_BASE + 4*(attr->index % 2), val); + + return sprintf(buf, "%d\n",val); +} + +static ssize_t get_qsfp_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0, reg = QSFP_PRESENT_ADDRESS; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, (attr->index % QSFP_FIRST_PORT), val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_qsfp_reset(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 reg = (QSFP_RESET_ADDRESS_BASE + attr->index % QSFP_FIRST_PORT / 4), data =0; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data = (data >> ((attr->index % QSFP_FIRST_PORT % 4)*2)) & 0x3; + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_qsfp_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 reg = (QSFP_RESET_ADDRESS_BASE + attr->index % QSFP_FIRST_PORT / 4), data = 0; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data = (val & 0x3) << ((attr->index % QSFP_FIRST_PORT % 4)*2); + + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static ssize_t get_qsfp_lowpower(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0, reg = QSFP_LOW_POWER_ADDRESS; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, (attr->index % QSFP_FIRST_PORT), val); + return sprintf(buf, "%02x\n", val); +} + +static ssize_t set_qsfp_lowpower(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = QSFP_LOW_POWER_ADDRESS; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + if(val) + SET_BIT(data, (attr->index % QSFP_FIRST_PORT)); + else + CLEAR_BIT(data, (attr->index % QSFP_FIRST_PORT)); + + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static ssize_t get_qsfp_modeseln(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0, reg = QSFP_MODSELN_ADDRESS; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, (attr->index % QSFP_FIRST_PORT), val); + return sprintf(buf, "%02x\n", val); +} + +static ssize_t set_qsfp_modeseln(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = QSFP_MODSELN_ADDRESS; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + if(val) + SET_BIT(data, (attr->index % QSFP_FIRST_PORT)); + else + CLEAR_BIT(data, (attr->index % QSFP_FIRST_PORT)); + + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static SENSOR_DEVICE_ATTR(cpld_hw_version, S_IRUGO, read_cpld_HWversion, NULL, 0); +static SENSOR_DEVICE_ATTR(cpld_sw_version, S_IRUGO, read_cpld_SWversion, NULL, 0); +static SENSOR_DEVICE_ATTR(cpld_allled_ctrl, S_IRUGO | S_IWUSR, show_allled_ctrl, set_allled_ctrl, 0); +static SENSOR_DEVICE_ATTR(serial_led_enable, S_IRUGO | S_IWUSR, show_serial_led, set_serial_led, 0); +static SENSOR_DEVICE_ATTR(sys_led, S_IRUGO | S_IWUSR, show_sys_led, set_sys_led, 0); +static SENSOR_DEVICE_ATTR(pwr_led, S_IRUGO | S_IWUSR, show_pwr_led, set_pwr_led, 0); +static SENSOR_DEVICE_ATTR(loc_led, S_IRUGO | S_IWUSR, show_loc_led, set_loc_led, 0); +static SENSOR_DEVICE_ATTR(fan_led, S_IRUGO | S_IWUSR, show_fan_led, set_fan_led, 0); +static SENSOR_DEVICE_ATTR(eeprom_write_enable, S_IRUGO | S_IWUSR, show_eeprom_write_enable, set_eeprom_write_enable, 0); +static SENSOR_DEVICE_ATTR(psu_1_present, S_IRUGO, read_psu_present, NULL, 1); +static SENSOR_DEVICE_ATTR(psu_2_present, S_IRUGO, read_psu_present, NULL, 0); +static SENSOR_DEVICE_ATTR(psu_1_status, S_IRUGO, read_psu_status, NULL, 1); +static SENSOR_DEVICE_ATTR(psu_2_status, S_IRUGO, read_psu_status, NULL, 0); + +#define SET_SFP_ATTR(_num) \ + static SENSOR_DEVICE_ATTR(sfp##_num##_present, S_IRUGO, get_sfp_present, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(sfp##_num##_tx_disable, S_IRUGO | S_IWUSR, get_sfp_tx_disable, set_sfp_tx_disable, _num-1); \ + static SENSOR_DEVICE_ATTR(sfp##_num##_rx_loss, S_IRUGO, get_sfp_rx_loss, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(sfp##_num##_tx_fault, S_IRUGO, get_sfp_tx_fault, NULL, _num-1) + +#define SET_QSFP_ATTR(_num) \ + static SENSOR_DEVICE_ATTR(sfp##_num##_present, S_IRUGO, get_qsfp_present, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(sfp##_num##_reset, S_IRUGO | S_IWUSR, get_qsfp_reset, set_qsfp_reset, _num-1); \ + static SENSOR_DEVICE_ATTR(sfp##_num##_lowpower, S_IRUGO | S_IWUSR, get_qsfp_lowpower, set_qsfp_lowpower, _num-1); \ + static SENSOR_DEVICE_ATTR(sfp##_num##_modeseln, S_IRUGO | S_IWUSR, get_qsfp_modeseln, set_qsfp_modeseln, _num-1) + +SET_SFP_ATTR(1);SET_SFP_ATTR(2);SET_SFP_ATTR(3);SET_SFP_ATTR(4);SET_SFP_ATTR(5);SET_SFP_ATTR(6);SET_SFP_ATTR(7);SET_SFP_ATTR(8);SET_SFP_ATTR(9); +SET_SFP_ATTR(10);SET_SFP_ATTR(11);SET_SFP_ATTR(12);SET_SFP_ATTR(13);SET_SFP_ATTR(14);SET_SFP_ATTR(15);SET_SFP_ATTR(16);SET_SFP_ATTR(17);SET_SFP_ATTR(18); +SET_SFP_ATTR(19);SET_SFP_ATTR(20);SET_SFP_ATTR(21);SET_SFP_ATTR(22);SET_SFP_ATTR(23);SET_SFP_ATTR(24);SET_SFP_ATTR(25);SET_SFP_ATTR(26);SET_SFP_ATTR(27); +SET_SFP_ATTR(28);SET_SFP_ATTR(29);SET_SFP_ATTR(30);SET_SFP_ATTR(31);SET_SFP_ATTR(32);SET_SFP_ATTR(33);SET_SFP_ATTR(34);SET_SFP_ATTR(35);SET_SFP_ATTR(36); +SET_SFP_ATTR(37);SET_SFP_ATTR(38);SET_SFP_ATTR(39);SET_SFP_ATTR(40);SET_SFP_ATTR(41);SET_SFP_ATTR(42);SET_SFP_ATTR(43);SET_SFP_ATTR(44);SET_SFP_ATTR(45); +SET_SFP_ATTR(46);SET_SFP_ATTR(47);SET_SFP_ATTR(48); +SET_QSFP_ATTR(49);SET_QSFP_ATTR(50);SET_QSFP_ATTR(51);SET_QSFP_ATTR(52);SET_QSFP_ATTR(53);SET_QSFP_ATTR(54); + +static struct attribute *pegatron_porsche_cpldA_attributes[] = { + &sensor_dev_attr_cpld_hw_version.dev_attr.attr, + &sensor_dev_attr_cpld_sw_version.dev_attr.attr, + + &sensor_dev_attr_sfp13_present.dev_attr.attr, + &sensor_dev_attr_sfp13_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp13_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp13_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp14_present.dev_attr.attr, + &sensor_dev_attr_sfp14_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp14_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp14_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp15_present.dev_attr.attr, + &sensor_dev_attr_sfp15_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp15_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp15_tx_fault.dev_attr.attr, + + + &sensor_dev_attr_sfp16_present.dev_attr.attr, + &sensor_dev_attr_sfp16_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp16_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp16_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp17_present.dev_attr.attr, + &sensor_dev_attr_sfp17_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp17_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp17_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp18_present.dev_attr.attr, + &sensor_dev_attr_sfp18_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp18_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp18_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp19_present.dev_attr.attr, + &sensor_dev_attr_sfp19_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp19_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp19_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp20_present.dev_attr.attr, + &sensor_dev_attr_sfp20_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp20_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp20_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp21_present.dev_attr.attr, + &sensor_dev_attr_sfp21_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp21_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp21_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp22_present.dev_attr.attr, + &sensor_dev_attr_sfp22_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp22_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp22_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp23_present.dev_attr.attr, + &sensor_dev_attr_sfp23_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp23_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp23_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp24_present.dev_attr.attr, + &sensor_dev_attr_sfp24_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp24_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp24_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp25_present.dev_attr.attr, + &sensor_dev_attr_sfp25_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp25_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp25_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp26_present.dev_attr.attr, + &sensor_dev_attr_sfp26_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp26_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp26_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp27_present.dev_attr.attr, + &sensor_dev_attr_sfp27_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp27_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp27_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp28_present.dev_attr.attr, + &sensor_dev_attr_sfp28_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp28_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp28_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp29_present.dev_attr.attr, + &sensor_dev_attr_sfp29_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp29_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp29_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp30_present.dev_attr.attr, + &sensor_dev_attr_sfp30_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp30_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp30_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp31_present.dev_attr.attr, + &sensor_dev_attr_sfp31_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp31_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp31_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp32_present.dev_attr.attr, + &sensor_dev_attr_sfp32_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp32_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp32_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp33_present.dev_attr.attr, + &sensor_dev_attr_sfp33_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp33_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp33_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp34_present.dev_attr.attr, + &sensor_dev_attr_sfp34_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp34_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp34_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp35_present.dev_attr.attr, + &sensor_dev_attr_sfp35_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp35_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp35_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp36_present.dev_attr.attr, + &sensor_dev_attr_sfp36_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp36_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp36_tx_fault.dev_attr.attr, + + NULL +}; + +static struct attribute *pegatron_porsche_cpldB_attributes[] = { + &sensor_dev_attr_cpld_hw_version.dev_attr.attr, + &sensor_dev_attr_cpld_sw_version.dev_attr.attr, + &sensor_dev_attr_cpld_allled_ctrl.dev_attr.attr, + &sensor_dev_attr_serial_led_enable.dev_attr.attr, + &sensor_dev_attr_sys_led.dev_attr.attr, + &sensor_dev_attr_pwr_led.dev_attr.attr, + &sensor_dev_attr_loc_led.dev_attr.attr, + &sensor_dev_attr_fan_led.dev_attr.attr, + &sensor_dev_attr_eeprom_write_enable.dev_attr.attr, + &sensor_dev_attr_psu_1_present.dev_attr.attr, + &sensor_dev_attr_psu_2_present.dev_attr.attr, + &sensor_dev_attr_psu_1_status.dev_attr.attr, + &sensor_dev_attr_psu_2_status.dev_attr.attr, + + &sensor_dev_attr_sfp1_present.dev_attr.attr, + &sensor_dev_attr_sfp1_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp1_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp1_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp2_present.dev_attr.attr, + &sensor_dev_attr_sfp2_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp2_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp2_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp3_present.dev_attr.attr, + &sensor_dev_attr_sfp3_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp3_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp3_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp4_present.dev_attr.attr, + &sensor_dev_attr_sfp4_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp4_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp4_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp5_present.dev_attr.attr, + &sensor_dev_attr_sfp5_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp5_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp5_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp6_present.dev_attr.attr, + &sensor_dev_attr_sfp6_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp6_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp6_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp7_present.dev_attr.attr, + &sensor_dev_attr_sfp7_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp7_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp7_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp8_present.dev_attr.attr, + &sensor_dev_attr_sfp8_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp8_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp8_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp9_present.dev_attr.attr, + &sensor_dev_attr_sfp9_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp9_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp9_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp10_present.dev_attr.attr, + &sensor_dev_attr_sfp10_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp10_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp10_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp11_present.dev_attr.attr, + &sensor_dev_attr_sfp11_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp11_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp11_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp12_present.dev_attr.attr, + &sensor_dev_attr_sfp12_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp12_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp12_tx_fault.dev_attr.attr, + NULL +}; + +static struct attribute *pegatron_porsche_cpldC_attributes[] = { + &sensor_dev_attr_cpld_hw_version.dev_attr.attr, + &sensor_dev_attr_cpld_sw_version.dev_attr.attr, + + &sensor_dev_attr_sfp37_present.dev_attr.attr, + &sensor_dev_attr_sfp37_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp37_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp37_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp38_present.dev_attr.attr, + &sensor_dev_attr_sfp38_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp38_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp38_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp39_present.dev_attr.attr, + &sensor_dev_attr_sfp39_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp39_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp39_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp40_present.dev_attr.attr, + &sensor_dev_attr_sfp40_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp40_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp40_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp41_present.dev_attr.attr, + &sensor_dev_attr_sfp41_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp41_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp41_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp42_present.dev_attr.attr, + &sensor_dev_attr_sfp42_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp42_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp42_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp43_present.dev_attr.attr, + &sensor_dev_attr_sfp43_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp43_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp43_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp44_present.dev_attr.attr, + &sensor_dev_attr_sfp44_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp44_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp44_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp45_present.dev_attr.attr, + &sensor_dev_attr_sfp45_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp45_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp45_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp46_present.dev_attr.attr, + &sensor_dev_attr_sfp46_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp46_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp46_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp47_present.dev_attr.attr, + &sensor_dev_attr_sfp47_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp47_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp47_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp48_present.dev_attr.attr, + &sensor_dev_attr_sfp48_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp48_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp48_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp49_present.dev_attr.attr, + &sensor_dev_attr_sfp49_lowpower.dev_attr.attr, + &sensor_dev_attr_sfp49_modeseln.dev_attr.attr, + &sensor_dev_attr_sfp49_reset.dev_attr.attr, + + &sensor_dev_attr_sfp50_present.dev_attr.attr, + &sensor_dev_attr_sfp50_lowpower.dev_attr.attr, + &sensor_dev_attr_sfp50_modeseln.dev_attr.attr, + &sensor_dev_attr_sfp50_reset.dev_attr.attr, + + &sensor_dev_attr_sfp51_present.dev_attr.attr, + &sensor_dev_attr_sfp51_lowpower.dev_attr.attr, + &sensor_dev_attr_sfp51_modeseln.dev_attr.attr, + &sensor_dev_attr_sfp51_reset.dev_attr.attr, + + &sensor_dev_attr_sfp52_present.dev_attr.attr, + &sensor_dev_attr_sfp52_lowpower.dev_attr.attr, + &sensor_dev_attr_sfp52_modeseln.dev_attr.attr, + &sensor_dev_attr_sfp52_reset.dev_attr.attr, + + &sensor_dev_attr_sfp53_present.dev_attr.attr, + &sensor_dev_attr_sfp53_lowpower.dev_attr.attr, + &sensor_dev_attr_sfp53_modeseln.dev_attr.attr, + &sensor_dev_attr_sfp53_reset.dev_attr.attr, + + &sensor_dev_attr_sfp54_present.dev_attr.attr, + &sensor_dev_attr_sfp54_lowpower.dev_attr.attr, + &sensor_dev_attr_sfp54_modeseln.dev_attr.attr, + &sensor_dev_attr_sfp54_reset.dev_attr.attr, + NULL +}; + +static const struct attribute_group pegatron_porsche_cpldA_group = { .attrs = pegatron_porsche_cpldA_attributes}; +static const struct attribute_group pegatron_porsche_cpldB_group = { .attrs = pegatron_porsche_cpldB_attributes}; +static const struct attribute_group pegatron_porsche_cpldC_group = { .attrs = pegatron_porsche_cpldC_attributes}; + +static void pegatron_porsche_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void pegatron_porsche_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int pegatron_porsche_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + /* Register sysfs hooks */ + switch(client->addr) + { + case CPLDA_ADDRESS: + status = sysfs_create_group(&client->dev.kobj, &pegatron_porsche_cpldA_group); + break; + case CPLDB_ADDRESS: + status = sysfs_create_group(&client->dev.kobj, &pegatron_porsche_cpldB_group); + break; + case CPLDC_ADDRESS: + status = sysfs_create_group(&client->dev.kobj, &pegatron_porsche_cpldC_group); + break; + default: + dev_dbg(&client->dev, "i2c_check_CPLD failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + break; + } + + if (status) { + goto exit; + } + + dev_info(&client->dev, "chip found\n"); + pegatron_porsche_cpld_add_client(client); + + return 0; + +exit: + return status; +} + +static int pegatron_porsche_cpld_remove(struct i2c_client *client) +{ + switch(client->addr) + { + case CPLDA_ADDRESS: + sysfs_remove_group(&client->dev.kobj, &pegatron_porsche_cpldA_group); + break; + case CPLDB_ADDRESS: + sysfs_remove_group(&client->dev.kobj, &pegatron_porsche_cpldB_group); + break; + case CPLDC_ADDRESS: + sysfs_remove_group(&client->dev.kobj, &pegatron_porsche_cpldC_group); + break; + default: + dev_dbg(&client->dev, "i2c_remove_CPLD failed (0x%x)\n", client->addr); + break; + } + + + pegatron_porsche_cpld_remove_client(client); + return 0; +} + +static const struct i2c_device_id pegatron_porsche_cpld_id[] = { + { "porsche_cpld", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, pegatron_porsche_cpld_id); + +static struct i2c_driver pegatron_porsche_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "pegatron_porsche_cpld", + }, + .probe = pegatron_porsche_cpld_probe, + .remove = pegatron_porsche_cpld_remove, + .id_table = pegatron_porsche_cpld_id, + .address_list = normal_i2c, +}; + +static int __init pegatron_porsche_cpld_init(void) +{ + mutex_init(&list_lock); + + return i2c_add_driver(&pegatron_porsche_cpld_driver); +} + +static void __exit pegatron_porsche_cpld_exit(void) +{ + i2c_del_driver(&pegatron_porsche_cpld_driver); +} + +MODULE_AUTHOR("Peter5 Lin "); +MODULE_DESCRIPTION("pegatron_porsche_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(pegatron_porsche_cpld_init); +module_exit(pegatron_porsche_cpld_exit); diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_porsche_sfp.c b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_porsche_sfp.c new file mode 100644 index 00000000000..5d5d64b15e1 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_porsche_sfp.c @@ -0,0 +1,431 @@ +/* + * A SFP driver for the porsche platform + * + * Copyright (C) 2018 Pegatron Corporation. + * Peter5_Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#undef PEGA_DEBUG +/*#define PEGA_DEBUG*/ +#ifdef PEGA_DEBUG +#define DBG(x) x +#else +#define DBG(x) +#endif /* DEBUG */ + +#define SFP_EEPROM_SIZE 256 +#define SFP_EEPROM_A0_ADDR 0x50 +#define SFP_EEPROM_A2_ADDR 0x51 +#define SFP_EEPROM_BUS_TYPE I2C_SMBUS_I2C_BLOCK_DATA +#define CPLDA_SFP_NUM 24 +#define CPLDB_SFP_NUM 12 +#define CPLDC_SFP_NUM 18 +#define CPLDA_ADDRESS 0x74 +#define CPLDB_ADDRESS 0x75 +#define CPLDC_ADDRESS 0x76 +#define SFP_13_36_SCL_BASE 0x4 +#define SFP_1_12_SCL_BASE 0x2 +#define SFP_37_54_SCL_BASE 0x5 +#define QSFP_I2C_ENABLE_BASE 0x17 +#define GET_BIT(data, bit, value) value = (data >> bit) & 0x1 +#define SET_BIT(data, bit) data |= (1 << bit) +#define CLEAR_BIT(data, bit) data &= ~(1 << bit) + +enum cpld_croups { cpld_group_a, cpld_group_b, cpld_group_c}; + +static const unsigned short normal_i2c[] = { SFP_EEPROM_A0_ADDR, SFP_EEPROM_A2_ADDR, I2C_CLIENT_END }; +static char *SFP_CPLD_GROUPA_MAPPING[CPLDA_SFP_NUM][16]={0}; +static char *SFP_CPLD_GROUPB_MAPPING[CPLDB_SFP_NUM][16]={0}; +static char *SFP_CPLD_GROUPC_MAPPING[CPLDC_SFP_NUM][16]={0}; + +/* + * This parameter is to help this driver avoid blocking other drivers out + * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C + * clock, one 256 byte read takes about 1/43 second which is excessive; + * but the 1/170 second it takes at 400 kHz may be quite reasonable; and + * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. + * + * This value is forced to be a power of two so that writes align on pages. + */ +static unsigned io_limit = 128; +module_param(io_limit, uint, 0); +MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)"); + +/* + * Specs often allow 5 msec for a page write, sometimes 20 msec; + * it's important to recover from write timeouts. + */ +static unsigned write_timeout = 25; +module_param(write_timeout, uint, 0); +MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)"); + + +struct porsche_sfp_data { + struct mutex lock; + struct bin_attribute bin; + int use_smbus; + kernel_ulong_t driver_data; + + struct i2c_client *client; +}; + +extern int pegatron_porsche_cpld_read(unsigned short cpld_addr, u8 reg); +extern int pegatron_porsche_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t porsche_sfp_eeprom_read(struct porsche_sfp_data *data, char *buf, + unsigned offset, size_t count) +{ + struct i2c_msg msg[2]; + u8 msgbuf[2]; + struct i2c_client *client = data->client; + unsigned long timeout, read_time; + int status; + + memset(msg, 0, sizeof(msg)); + + if (count > io_limit) + count = io_limit; + + /* Smaller eeproms can work given some SMBus extension calls */ + if (count > I2C_SMBUS_BLOCK_MAX) + count = I2C_SMBUS_BLOCK_MAX; + + /* + * Reads fail if the previous write didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + read_time = jiffies; + switch (data->use_smbus) { + case I2C_SMBUS_I2C_BLOCK_DATA: + status = i2c_smbus_read_i2c_block_data(client, offset, + count, buf); + break; + case I2C_SMBUS_WORD_DATA: + status = i2c_smbus_read_word_data(client, offset); + if (status >= 0) { + buf[0] = status & 0xff; + if (count == 2) + buf[1] = status >> 8; + status = count; + } + break; + case I2C_SMBUS_BYTE_DATA: + status = i2c_smbus_read_byte_data(client, offset); + if (status >= 0) { + buf[0] = status; + status = count; + } + break; + default: + status = i2c_transfer(client->adapter, msg, 2); + if (status == 2) + status = count; + } + dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", + count, offset, status, jiffies); + + if (status == count) + return count; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(read_time, timeout)); + + return -ETIMEDOUT; +} + +static ssize_t porsche_sfp_read(struct porsche_sfp_data *data, + char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) + return count; + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->lock); + + while (count) { + ssize_t status; + + status = porsche_sfp_eeprom_read(data, buf, off, count); + if (status <= 0) { + if (retval == 0) + retval = status; + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->lock); + + return retval; +} + +static ssize_t +porsche_sfp_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + int i; + u8 cpldData = 0; + struct porsche_sfp_data *data; + + /*SFP 1-12*/ + for(i=0; iattr.name, SFP_CPLD_GROUPB_MAPPING[i])) + { + pegatron_porsche_cpld_write(CPLDB_ADDRESS, SFP_1_12_SCL_BASE, i+1); + goto check_done; + } + } + /*SFP 13-36*/ + for(i=0; iattr.name, SFP_CPLD_GROUPA_MAPPING[i])) + { + pegatron_porsche_cpld_write(CPLDA_ADDRESS, SFP_13_36_SCL_BASE, i+1); + goto check_done; + } + } + + /*SFP 37-54*/ + for(i=0; iattr.name, SFP_CPLD_GROUPC_MAPPING[i])) + { + /* Enable QSFP i2c function */ + if(i >= 12) + { + cpldData = 0xff; + cpldData = pegatron_porsche_cpld_read(CPLDC_ADDRESS, QSFP_I2C_ENABLE_BASE); + CLEAR_BIT(cpldData, i-12); + pegatron_porsche_cpld_write(CPLDC_ADDRESS, QSFP_I2C_ENABLE_BASE, cpldData); + } + pegatron_porsche_cpld_write(CPLDC_ADDRESS, SFP_37_54_SCL_BASE, i+1); + goto check_done; + } + } + +check_done: + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + + return porsche_sfp_read(data, buf, off, count); +} + +#define SFP_EEPROM_ATTR(_num) \ + static struct bin_attribute sfp##_num##_eeprom_attr = { \ + .attr = { \ + .name = __stringify(sfp##_num##_eeprom), \ + .mode = S_IRUGO\ + }, \ + .size = SFP_EEPROM_SIZE, \ + .read = porsche_sfp_bin_read, \ + } + +SFP_EEPROM_ATTR(1);SFP_EEPROM_ATTR(2);SFP_EEPROM_ATTR(3);SFP_EEPROM_ATTR(4);SFP_EEPROM_ATTR(5);SFP_EEPROM_ATTR(6);SFP_EEPROM_ATTR(7);SFP_EEPROM_ATTR(8);SFP_EEPROM_ATTR(9); +SFP_EEPROM_ATTR(10);SFP_EEPROM_ATTR(11);SFP_EEPROM_ATTR(12);SFP_EEPROM_ATTR(13);SFP_EEPROM_ATTR(14);SFP_EEPROM_ATTR(15);SFP_EEPROM_ATTR(16);SFP_EEPROM_ATTR(17);SFP_EEPROM_ATTR(18); +SFP_EEPROM_ATTR(19);SFP_EEPROM_ATTR(20);SFP_EEPROM_ATTR(21);SFP_EEPROM_ATTR(22);SFP_EEPROM_ATTR(23);SFP_EEPROM_ATTR(24);SFP_EEPROM_ATTR(25);SFP_EEPROM_ATTR(26);SFP_EEPROM_ATTR(27); +SFP_EEPROM_ATTR(28);SFP_EEPROM_ATTR(29);SFP_EEPROM_ATTR(30);SFP_EEPROM_ATTR(31);SFP_EEPROM_ATTR(32);SFP_EEPROM_ATTR(33);SFP_EEPROM_ATTR(34);SFP_EEPROM_ATTR(35);SFP_EEPROM_ATTR(36); +SFP_EEPROM_ATTR(37);SFP_EEPROM_ATTR(38);SFP_EEPROM_ATTR(39);SFP_EEPROM_ATTR(40);SFP_EEPROM_ATTR(41);SFP_EEPROM_ATTR(42);SFP_EEPROM_ATTR(43);SFP_EEPROM_ATTR(44);SFP_EEPROM_ATTR(45); +SFP_EEPROM_ATTR(46);SFP_EEPROM_ATTR(47);SFP_EEPROM_ATTR(48);SFP_EEPROM_ATTR(49);SFP_EEPROM_ATTR(50);SFP_EEPROM_ATTR(51);SFP_EEPROM_ATTR(52);SFP_EEPROM_ATTR(53);SFP_EEPROM_ATTR(54); + +static struct bin_attribute *porsche_cpldA_sfp_epprom_attributes[] = { + &sfp13_eeprom_attr, &sfp14_eeprom_attr, &sfp15_eeprom_attr, &sfp16_eeprom_attr, &sfp17_eeprom_attr, &sfp18_eeprom_attr, &sfp19_eeprom_attr, &sfp20_eeprom_attr, + &sfp21_eeprom_attr, &sfp22_eeprom_attr, &sfp23_eeprom_attr, &sfp24_eeprom_attr, &sfp25_eeprom_attr, &sfp26_eeprom_attr, &sfp27_eeprom_attr, &sfp28_eeprom_attr, + &sfp29_eeprom_attr, &sfp30_eeprom_attr, &sfp31_eeprom_attr, &sfp32_eeprom_attr, &sfp33_eeprom_attr, &sfp34_eeprom_attr, &sfp35_eeprom_attr, &sfp36_eeprom_attr, + NULL +}; + +static struct bin_attribute *porsche_cpldB_sfp_epprom_attributes[] = { + &sfp1_eeprom_attr, &sfp2_eeprom_attr, &sfp3_eeprom_attr, &sfp4_eeprom_attr, &sfp5_eeprom_attr, &sfp6_eeprom_attr, &sfp7_eeprom_attr, &sfp8_eeprom_attr, + &sfp9_eeprom_attr, &sfp10_eeprom_attr, &sfp11_eeprom_attr, &sfp12_eeprom_attr, + NULL +}; + +static struct bin_attribute *porsche_cpldC_sfp_epprom_attributes[] = { + &sfp37_eeprom_attr, &sfp38_eeprom_attr, &sfp39_eeprom_attr, &sfp40_eeprom_attr, &sfp41_eeprom_attr, &sfp42_eeprom_attr, &sfp43_eeprom_attr, &sfp44_eeprom_attr, + &sfp45_eeprom_attr, &sfp46_eeprom_attr, &sfp47_eeprom_attr, &sfp48_eeprom_attr, &sfp49_eeprom_attr, &sfp50_eeprom_attr, &sfp51_eeprom_attr, &sfp52_eeprom_attr, + &sfp53_eeprom_attr, &sfp54_eeprom_attr, + NULL +}; + +static const struct attribute_group porsche_sfpA_group = { .bin_attrs = porsche_cpldA_sfp_epprom_attributes}; +static const struct attribute_group porsche_sfpB_group = { .bin_attrs = porsche_cpldB_sfp_epprom_attributes}; +static const struct attribute_group porsche_sfpC_group = { .bin_attrs = porsche_cpldC_sfp_epprom_attributes}; + +static int porsche_sfp_device_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +{ + int use_smbus = SFP_EEPROM_BUS_TYPE; + struct porsche_sfp_data *data; + int err, i; + unsigned num_addresses; + kernel_ulong_t magic; + + data = kzalloc(sizeof(struct porsche_sfp_data) , GFP_KERNEL); + if (!data) + return -ENOMEM; + + mutex_init(&data->lock); + data->use_smbus = use_smbus; + /* + * Export the EEPROM bytes through sysfs, since that's convenient. + * By default, only root should see the data (maybe passwords etc) + */ + + data->client = client; + data->driver_data = dev_id->driver_data; + + sysfs_bin_attr_init(&data->bin); + + switch(dev_id->driver_data) + { + case cpld_group_a: + err = sysfs_create_group(&client->dev.kobj, &porsche_sfpA_group); + if (err) + goto err_clients; + break; + case cpld_group_b: + err = sysfs_create_group(&client->dev.kobj, &porsche_sfpB_group); + if (err) + goto err_clients; + break; + case cpld_group_c: + err = sysfs_create_group(&client->dev.kobj, &porsche_sfpC_group); + if (err) + goto err_clients; + break; + default: + printk(KERN_ALERT "i2c_check_CPLD failed\n"); + err = -EIO; + break; + } + + i2c_set_clientdata(client, data); + + return 0; + +err_clients: + kfree(data); + return err; +} + +static int porsche_sfp_device_remove(struct i2c_client *client) +{ + struct porsche_sfp_data *data; + int i; + + data = i2c_get_clientdata(client); + + switch(data->driver_data) + { + case cpld_group_a: + sysfs_remove_group(&client->dev.kobj, &porsche_sfpA_group); + break; + case cpld_group_b: + sysfs_remove_group(&client->dev.kobj, &porsche_sfpB_group); + break; + case cpld_group_c: + sysfs_remove_group(&client->dev.kobj, &porsche_sfpC_group); + break; + default: + dev_dbg(&client->dev, "i2c_remove_CPLD failed (0x%x)\n", client->addr); + break; + } + + + return 0; +} + +static const struct i2c_device_id porsche_sfp_id[] = { + { "porsche_sfpA", cpld_group_a }, + { "porsche_sfpB", cpld_group_b }, + { "porsche_sfpC", cpld_group_c }, + {} +}; +MODULE_DEVICE_TABLE(i2c, porsche_sfp_id); + +static struct i2c_driver porsche_sfp_driver = { + .driver = { + .name = "pegatron_porsche_sfp", + }, + .probe = porsche_sfp_device_probe, + .remove = porsche_sfp_device_remove, + .id_table = porsche_sfp_id, + .address_list = normal_i2c, +}; + +static int __init porsche_sfp_init(void) +{ + int i; + + /*SFP 1-12*/ + for(i=0; i"); +MODULE_DESCRIPTION("porsche_cpld_mux driver"); +MODULE_LICENSE("GPL"); + +module_init(porsche_sfp_init); +module_exit(porsche_sfp_exit); + diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/scripts/sensors b/platform/nephos/sonic-platform-modules-pegatron/porsche/scripts/sensors new file mode 100755 index 00000000000..7f9426a0c5e --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/scripts/sensors @@ -0,0 +1,7 @@ +#!/bin/bash +docker exec -i pmon sensors "$@" + +#To probe sensors not part of lm-sensors +if [ -r /usr/local/bin/porsche_sensors.py ]; then + python /usr/local/bin/porsche_sensors.py get_sensors +fi diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/service/porsche-platform-init.service b/platform/nephos/sonic-platform-modules-pegatron/porsche/service/porsche-platform-init.service new file mode 100644 index 00000000000..8e6f4344715 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/service/porsche-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Pegastron porsche Platform initialization service +After=local-fs.target +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/pegatron_porsche_util.py install +ExecStop=/usr/local/bin/pegatron_porsche_util.py uninstall +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/utils/pegatron_porsche_util.py b/platform/nephos/sonic-platform-modules-pegatron/porsche/utils/pegatron_porsche_util.py new file mode 100755 index 00000000000..16662081d0c --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/utils/pegatron_porsche_util.py @@ -0,0 +1,209 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Pegatron, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +import sys, getopt +import logging +import os +import commands +import threading + +DEBUG = False + +SFP_MAX_NUM = 48 +CPLDA_SFP_NUM = 24 +CPLDB_SFP_NUM = 12 +CPLDC_SFP_NUM = 18 + +kernel_module = ['i2c_dev', 'i2c-mux-pca954x force_deselect_on_exit=1', 'at24', 'pegatron_porsche_cpld', 'pegatron_hwmon_mcu', 'pegatron_porsche_sfp'] +moduleID = ['pca9544', 'pca9544', '24c02', 'porsche_hwmon_mcu', 'porsche_cpld', 'porsche_cpld', 'porsche_cpld', 'porsche_sfpA', 'porsche_sfpB', 'porsche_sfpC'] +i2c_check_node = ['i2c-0', 'i2c-1'] +device_address = ['0x72', '0x73', '0x54', '0x70', '0x74', '0x75', '0x76', '0x50', '0x50', '0x50'] +device_node= ['i2c-2', 'i2c-6', 'i2c-4', 'i2c-5', 'i2c-6', 'i2c-7', 'i2c-8', 'i2c-6', 'i2c-7', 'i2c-8'] + +i2c_prefix = '/sys/bus/i2c/devices/' +cpld_bus = ['6-0074', '7-0075', '8-0076'] +led_nodes = ['sys_led', 'pwr_led', 'loc_led', 'fan_led', "cpld_allled_ctrl", "serial_led_enable"] + +def dbg_print(string): + if DEBUG == True: + print string + return + +def do_cmd(cmd, show): + logging.info('Run :' + cmd) + status, output = commands.getstatusoutput(cmd) + dbg_print(cmd + "with result:" + str(status)) + dbg_print("output:" + output) + if status: + logging.info('Failed :' + cmd) + if show: + print('Failed :' + cmd) + return status, output + +def check_device_position(num): + for i in range(0, len(i2c_check_node)): + status, output = do_cmd("echo " + moduleID[num] + " " + device_address[num] + " > " + i2c_prefix + i2c_check_node[i] + "/new_device", 0) + status, output = do_cmd("ls " + i2c_prefix + device_node[num], 0) + device_node[num] = i2c_check_node[i] + + if status: + status, output = do_cmd("echo " + device_address[num] + " > " + i2c_prefix + i2c_check_node[i] + "/delete_device", 0) + else: + return + + return + +def install_device(): + for i in range(0, len(moduleID)): + if moduleID[i] == "pca9544": + check_device_position(i) + else: + status, output = do_cmd("echo " + moduleID[i] + " " + device_address[i] + " > " + i2c_prefix + device_node[i] + "/new_device", 1) + + return + +def check_driver(): + for i in range(0, len(kernel_module)): + status, output = do_cmd("lsmod | grep " + kernel_module[i], 0) + if status: + status, output = do_cmd("modprobe " + kernel_module[i], 1) + + return + +def do_install(): + status, output = do_cmd("depmod -a", 1) + + check_driver() + install_device() + + return + +def do_uninstall(): + for i in range(0, len(kernel_module)): + status, output = do_cmd("modprobe -r " + kernel_module[i], 1) + + for i in range(0, len(moduleID)): + status, output = do_cmd("echo " + device_address[i] + " > " + i2c_prefix + i2c_check_node[i] + "/delete_device", 0) + + return + +led_command = {'sys_led': {'green':'0', 'amber':'1', 'off':'2', 'blink_green':'3', 'blink_amber':'4'}, + 'pwr_led': {'green':'0', 'amber':'1', 'off':'2', 'blink_green':'3', 'blink_amber':'4'}, + 'loc_led': {'on':'0', 'off':'1', 'blink':'2'}, + 'fan_led': {'green':'0', 'amber':'1', 'off':'2', 'blink_green':'3', 'blink_amber':'4'}, + 'cpld_allled_ctrl': {'off':'0', 'mix':'1', 'amber':'2', 'normal':'3'}, + 'serial_led_enable': {'disable':'0', 'enable':'1'}} + +def set_led(args): + """ + Usage: %(scriptName)s set led object command + + object: + sys_led : set SYS led [command: off|green|amber|blink_green|blink_amber] + pwr_led : set PWR led [command: off|green|amber|blink_green|blink_amber] + loc_led : set LOCATOR led [command: off|on|blink] + fan_led : set FAN led [command: off|green|amber|blink_green|blink_amber] + """ + if args[0] not in led_command: + print set_led.__doc__ + sys.exit(0) + + for i in range(0,len(led_nodes)): + if args[0] == led_nodes[i]: + node = i2c_prefix + cpld_bus[1] + '/'+ led_nodes[i] + + command = led_command[args[0]] + data = command[args[1]] + + status, output = do_cmd("echo "+ str(data) + " > "+ node, 1) + + return + +def set_device(args): + """ + Usage: %(scriptName)s command object + + command: + led : set status led sys_led|pwr_led|loc_led|mst_led|fan_led|digit_led + """ + + if args[0] == 'led': + set_led(args[1:]) + return + else: + print set_device.__doc__ + + return + +device_init = {'led': [['led', 'sys_led', 'green'], ['led', 'pwr_led', 'green'], ['led', 'fan_led', 'green'], ['led', 'cpld_allled_ctrl', 'normal'], ['led', 'serial_led_enable', 'enable']]} + +def pega_init(): + #set led + for i in range(0,len(device_init['led'])): + set_device(device_init['led'][i]) + + #set tx_disable + for x in range(0, SFP_MAX_NUM-1): + if x < CPLDB_SFP_NUM: + bus = cpld_bus[1] + elif x < CPLDB_SFP_NUM + CPLDA_SFP_NUM: + bus = cpld_bus[0] + else: + bus = cpld_bus[2] + + nodes = i2c_prefix + bus + '/sfp' + str(x+1) + '_tx_disable' + dbg_print("SFP_TX_DISABLE NODES: " + nodes) + status, output = do_cmd("echo 0 > "+ nodes, 1) + + return + +def main(): + """ + Usage: %(scriptName)s command object + + command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + set : change board setting [led] + debug : debug info [on/off] + """ + + if len(sys.argv)<2: + print main.__doc__ + + for arg in sys.argv[1:]: + if arg == 'install': + do_install() + pega_init() + elif arg == 'uninstall': + do_uninstall() + elif arg == 'set': + if len(sys.argv[2:])<1: + print main.__doc__ + else: + set_device(sys.argv[2:]) + return + elif arg == 'debug': + if sys.argv[2] == 'on': + DEBUG = True + else: + DEBUG = False + else: + print main.__doc__ + +if __name__ == "__main__": + main() diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/utils/porsche_sensors.py b/platform/nephos/sonic-platform-modules-pegatron/porsche/utils/porsche_sensors.py new file mode 100755 index 00000000000..40e23ef01b7 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/utils/porsche_sensors.py @@ -0,0 +1,141 @@ +#!/usr/bin/python + +import os +import sys +import logging + +FAN_NUM = 5 +sensors_path = '/sys/bus/i2c/devices/5-0070/' +sensors_nodes = {'fan_rpm': ['_inner_rpm', '_outer_rpm'], + 'fan_vol': ['ADC8_vol', 'ADC7_vol','ADC6_vol', 'ADC5_vol','ADC4_vol', 'ADC3_vol'], + 'temp':['lm75_49_temp', 'lm75_48_temp', 'SA56004_local_temp','SA56004_remote_temp']} +sensors_type = {'fan_rpm': ['Inner RPM', 'Outer RPM'], + 'fan_vol': ['P0.2', 'P0.6','P0.1', 'P1.5','P0.7', 'P1.6'], + 'temp':['lm75_49_temp', 'lm75_48_temp', 'SA56004_local_temp','SA56004_remote_temp']} + +# Get sysfs attribute +def get_attr_value(attr_path): + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + fd.close() + return retval + +def get_fan_status(number): + attr_value = get_attr_value(sensors_path + "fan" + str(number+1) + "_present") + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + + if(attr_value == 0): + string = "Connect" + else: + string = "Disconnect" + return string + +def get_fan_alert(number): + attr_value = get_attr_value(sensors_path + "fan" + str(number+1) + "_status_alert") + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + + if(attr_value == 0): + string = "Normal" + else: + string = "Abnormal" + return string + +def get_fan_inner_rpm(number): + return get_attr_value(sensors_path + "fan" + str(number+1) + "_inner_rpm") + +def get_fan_outer_rpm(number): + return get_attr_value(sensors_path + "fan" + str(number+1) + "_outer_rpm") + +def get_fan(): + for i in range(0,FAN_NUM): + print " " + #status + string = get_fan_status(i) + print "FAN " + str(i+1) + ":" + ' ' + string + if string=='Disconnect': + continue + + #alert + string = get_fan_alert(i) + print " Status:"+ ' ' + string + + #inner rpm + string = get_fan_inner_rpm(i) + print " Inner RPM:"+ string.rjust(10) + ' RPM' + + #outer rpm + string = get_fan_outer_rpm(i) + print " Outer RPM:"+ string.rjust(10) + ' RPM' + + return + +def get_hwmon(): + print " " + string = get_attr_value(sensors_path + "lm75_48_temp") + print "Sensor A: " + string + " C" + + string = get_attr_value(sensors_path + "lm75_49_temp") + print "Sensor B: " + string + " C" + + return + +def get_voltage(): + print " " + nodes = sensors_nodes['fan_vol'] + types = sensors_type['fan_vol'] + for i in range(0,len(nodes)): + string = get_attr_value(sensors_path + nodes[i]) + print types[i] + ': ' + string + " V" + + return + +def init_fan(): + return + +def main(): + """ + Usage: %(scriptName)s command object + + command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + set : change board setting with fan|led|sfp + """ + + if len(sys.argv)<2: + print main.__doc__ + + for arg in sys.argv[1:]: + if arg == 'fan_init': + init_fan() + elif arg == 'get_sensors': + ver = get_attr_value(sensors_path + "fb_hw_version") + print 'HW Version: ' + ver + ver = get_attr_value(sensors_path + "fb_fw_version") + print 'SW Version: ' + ver + get_fan() + get_hwmon() + get_voltage() + elif arg == 'fan_set': + if len(sys.argv[1:])<1: + print main.__doc__ + else: + set_fan(sys.argv[1:]) + return + else: + print main.__doc__ + +if __name__ == "__main__": + main() diff --git a/platform/p4/SAI-P4-BM b/platform/p4/SAI-P4-BM new file mode 160000 index 00000000000..c763924affd --- /dev/null +++ b/platform/p4/SAI-P4-BM @@ -0,0 +1 @@ +Subproject commit c763924affd416df9c4d3e40d4f8ac1cb2be5fff diff --git a/platform/p4/docker-sonic-p4.mk b/platform/p4/docker-sonic-p4.mk new file mode 100644 index 00000000000..534d161631f --- /dev/null +++ b/platform/p4/docker-sonic-p4.mk @@ -0,0 +1,29 @@ +# docker image for p4 sonic docker image + +DOCKER_SONIC_P4 = docker-sonic-p4.gz +$(DOCKER_SONIC_P4)_PATH = $(PLATFORM_PATH)/docker-sonic-p4 +$(DOCKER_SONIC_P4)_DEPENDS += $(SWSS) \ + $(SYNCD) \ + $(P4_SWITCH) \ + $(REDIS_TOOLS) \ + $(REDIS_SERVER) \ + $(PYTHON_SWSSCOMMON) \ + $(LIBTEAMDCT) \ + $(LIBTEAM_UTILS) \ + $(SONIC_DEVICE_DATA) \ + $(SONIC_UTILS) \ + $(IPROUTE2) + +# ifeq ($(ROUTING_STACK), quagga) +$(DOCKER_SONIC_P4)_DEPENDS += $(QUAGGA) +# else ifeq ($(ROUTING_STACK), frr) +# $(DOCKER_SONIC_P4)_DEPENDS += $(FRR) +# else +# $(DOCKER_SONIC_P4)_DEPENDS += $(GOBGP) +# endif + +$(DOCKER_SONIC_P4)_FILES += $(CONFIGDB_LOAD_SCRIPT) \ + $(ARP_UPDATE_SCRIPT) + +$(DOCKER_SONIC_P4)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE) +SONIC_DOCKER_IMAGES += $(DOCKER_SONIC_P4) diff --git a/platform/p4/docker-sonic-p4/Dockerfile.j2 b/platform/p4/docker-sonic-p4/Dockerfile.j2 new file mode 100644 index 00000000000..0f918821dea --- /dev/null +++ b/platform/p4/docker-sonic-p4/Dockerfile.j2 @@ -0,0 +1,85 @@ +FROM docker-config-engine + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +COPY ["sonic-dev.gpg.key", "/etc/apt/"] +RUN apt-key add /etc/apt/sonic-dev.gpg.key +RUN echo "deb http://packages.microsoft.com/repos/sonic-dev/ jessie main" >> /etc/apt/sources.list +RUN apt-get update + +RUN apt-get install -y net-tools \ + arping \ + ethtool \ + tcpdump \ + ifupdown \ + bridge-utils \ + python-ply \ + libqt5core5a \ + libqt5network5 \ + libboost-program-options1.55.0 \ + libboost-system1.55.0 \ + libboost-thread1.55.0 \ + libgmp10 \ + libjudydebian1 \ + libnanomsg0 \ + libdaemon0 \ + libjansson4 \ + libatomic1 \ + libjemalloc1 \ + liblua5.1-0 \ + lua-bitop \ + lua-cjson \ + openssh-client \ + openssh-server \ + libc-ares2 \ + iproute \ + libpython2.7 \ + grub2-common \ + python-click-default-group \ + python-click \ + python-natsort \ + python-tabulate \ + bash-completion \ + libelf1 \ + libmnl0 + +RUN pip install setuptools +RUN pip install py2_ipaddress + +COPY \ +{% for deb in docker_sonic_p4_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN dpkg -i \ +{% for deb in docker_sonic_p4_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +RUN sed -ri 's/^(save .*$)/# \1/g; \ + s/^daemonize yes$/daemonize no/; \ + s/^logfile .*$/logfile ""/; \ + s/^# syslog-enabled no$/syslog-enabled no/; \ + s/^# unixsocket/unixsocket/; \ + s/notify-keyspace-events ""/notify-keyspace-events AKE/; \ + s/^client-output-buffer-limit pubsub [0-9]+mb [0-9]+mb [0-9]+/client-output-buffer-limit pubsub 0 0 0/ \ + ' /etc/redis/redis.conf + +ADD port_config.ini /port_config.ini +COPY ["start.sh", "orchagent.sh", "config_bm.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/configdb-load.sh", "/usr/bin/"] +COPY ["files/arp_update", "/usr/bin"] +RUN echo "docker-sonic-p4" > /etc/hostname +RUN touch /etc/quagga/zebra.conf + +ENTRYPOINT ["/bin/bash"] diff --git a/platform/p4/docker-sonic-p4/config_bm.sh b/platform/p4/docker-sonic-p4/config_bm.sh new file mode 100755 index 00000000000..25de26b4da7 --- /dev/null +++ b/platform/p4/docker-sonic-p4/config_bm.sh @@ -0,0 +1,4 @@ +simple_switch_CLI --pre SimplePreLAG < /usr/share/p4-sai-bm/bridge_default_config.txt +simple_switch_CLI < /usr/share/p4-sai-bm/bridge_default_config_mirror.txt +simple_switch_CLI --pre SimplePreLAG --thrift-port 9091 < /usr/share/p4-sai-bm/router_default_config.txt +simple_switch_CLI --thrift-port 9091 < /usr/share/p4-sai-bm/router_default_config_mirror.txt \ No newline at end of file diff --git a/platform/p4/docker-sonic-p4/orchagent.sh b/platform/p4/docker-sonic-p4/orchagent.sh new file mode 100755 index 00000000000..7e250dfa20e --- /dev/null +++ b/platform/p4/docker-sonic-p4/orchagent.sh @@ -0,0 +1,15 @@ +#!/usr/bin/env bash + +MAC_ADDRESS=`ip link show eth0 | grep ether | awk '{print $2}'` + +# Create a folder for SsWW record files +mkdir -p /var/log/swss +ORCHAGENT_ARGS="-d /var/log/swss " + +# Set orchagent pop batch size to 8192 +ORCHAGENT_ARGS+="-b 8192 " + +# Set mac address +ORCHAGENT_ARGS+="-m $MAC_ADDRESS" + +exec /usr/bin/orchagent ${ORCHAGENT_ARGS} diff --git a/platform/p4/docker-sonic-p4/port_config.ini b/platform/p4/docker-sonic-p4/port_config.ini new file mode 100644 index 00000000000..2a88c4a7235 --- /dev/null +++ b/platform/p4/docker-sonic-p4/port_config.ini @@ -0,0 +1,33 @@ +# name lanes +Ethernet0 0 +Ethernet1 1 +Ethernet2 2 +Ethernet3 3 +Ethernet4 4 +Ethernet5 5 +Ethernet6 6 +Ethernet7 7 +Ethernet8 8 +Ethernet9 9 +Ethernet10 10 +Ethernet11 11 +Ethernet12 12 +Ethernet13 13 +Ethernet14 14 +Ethernet15 15 +Ethernet16 16 +Ethernet17 17 +Ethernet18 18 +Ethernet19 19 +Ethernet20 20 +Ethernet21 21 +Ethernet22 22 +Ethernet23 23 +Ethernet24 24 +Ethernet25 25 +Ethernet26 26 +Ethernet27 27 +Ethernet28 28 +Ethernet29 29 +Ethernet30 30 +Ethernet31 31 \ No newline at end of file diff --git a/platform/p4/docker-sonic-p4/sonic-dev.gpg.key b/platform/p4/docker-sonic-p4/sonic-dev.gpg.key new file mode 100644 index 00000000000..fb9a37901bc --- /dev/null +++ b/platform/p4/docker-sonic-p4/sonic-dev.gpg.key @@ -0,0 +1,30 @@ +-----BEGIN PGP PUBLIC KEY BLOCK----- +Version: GnuPG v1 + +mQENBFQ1bTIBCAC7oGfkv/ck0XsLuG8cdcSB2ISqxFAcBvH9BitEtxmpW2uhykKk +xY4rVD/4Uys1s3PF1/64QfPR+hYcewueOwz0ZAcLyFXXk4McICXaPq3NrLiWYKKX +UZLnrPzcrGZoW/kHDDp4OmBiDmT1PGvZlpuimwkMCusUzIr7Cbbp2dIy8MERL5tA +LcgLu3KL6clJ+aTW2jgepI1D7sTepOeGd7eRSb5njKg2M7k/93v/7MipZxiVtyXH +B74YiK6jSbst5JpuYsLa/Dqryvx7Xq3n53oif892pv3euTduo1fYw8Hgh/OOYdeT +c9WCj03KA1jCSFURjdrug0kR8BPlfjqtRLXFABEBAAG0JE1TIE9wZW4gVGVjaCA8 +aW50ZXJvcEBtaWNyb3NvZnQuY29tPokBOAQTAQIAIgUCVDVtMgIbAwYLCQgHAwIG +FQgCCQoLBBYCAwECHgECF4AACgkQsCxG30F6CJO1uAf/cmL68bM8YgF/61hkaY56 +LqrppUTJH/w4fKq47Pf6KfgSLvxfNU6soi2KHYRjIvTRx3tV4vUM5n2plaQg2s8V +/Epg4FeIRTk75YwiHAzLhLnp5cdUaTvC4j4mwxoB6j9Ty+fXJwQ0MvpDhIZb9vM4 +GXw/fEQHCT4f3gx4nReeqE+FB2wVHleX9+Lpodu98JyJTKJRBRHYLqy6S+/lyp2W +aBlsI1LOqBcx1uRK24U7duIpbYwIyrx0cafSruqR2GjVdu+imkhHyUn52VbzYhq1 +af0rqYiZ1VOamVOG0By8+hVyNa1MLc1K2uWGs0o5fDe9F5/swbvLHVXI+M50Vs+m +J7kBDQRUNW0yAQgAu7DkTVj0ZQC4F7bFivAwrdby8gCakTXOl1kcK622hjRJ8nam +aZeW+eADfLRsTmdUmXgZu1YWS5Gn2ZVngC8SGPUBT071+oRETCz4uNB7IimB9QfP +++orI6o2vmnVVsq5wWCbEdNU+TCVv1zjrYev5lwckkKpjHt6o8MNoX2DFuQymSyR +eZKaqhdKmcji4Ke7OIYqwgPjch3wxzE1b5gNOR/iwxWyjjOffZPLr/VhIfIJRs86 +dSXrwjHtEh810SKDLghHM0VAdY34nyC5ZZ61yhts5HtQDFK+9mNpH1mkc4gDBlgG +266pVvknumK6lPNm/osF/cpjWmEw24ypcQIvOQARAQABiQEfBBgBAgAJBQJUNW0y +AhsMAAoJELAsRt9BegiTMBUH/0sZ6gZy7mCTSAYT+NSXLFtGC2zNUVL80SWvfgYm +k9XPVI22MrefZfQ6M01RylyxtWXjRM8UoN8SDKWPpXumzJf831f/7om5zwutaG7b +tjDPYqRKJSbAIFZu2mN+uLrNQ2SV6XK7FoV0dtcrEX9S7RICb6i19D+70+Oh/qgU +R04H1jqS29XBzqAlIzdBoA+sYAwbOIJsSL3YyNQcUv3B5+5yR/bo/L8pnUJt6iuL +nWW+mi7r8gWPHDSrcdYq1TmmlOM7CwZPgWRZzkQPSeZz52Tt7IP47eyGJ09U4PIf +FtMH1ElL2UgHoA/F9Q88e7LkztaTqE59uXWbIYyuSMJVvRU= +=sb3d +-----END PGP PUBLIC KEY BLOCK----- diff --git a/platform/p4/docker-sonic-p4/start.sh b/platform/p4/docker-sonic-p4/start.sh new file mode 100755 index 00000000000..c9cf4528bed --- /dev/null +++ b/platform/p4/docker-sonic-p4/start.sh @@ -0,0 +1,88 @@ +#!/bin/bash -e + +# generate configuration +[ -d /etc/sonic ] || mkdir -p /etc/sonic + +if ! ip link show eth0 &> /dev/null; then + ip link add eth0 type dummy +fi + +SYSTEM_MAC_ADDRESS=$(ip link show eth0 | grep ether | awk '{print $2}') +sonic-cfggen -a '{"DEVICE_METADATA":{"localhost": {"mac": "'$SYSTEM_MAC_ADDRESS'"}}}' --print-data > /etc/sonic/init_cfg.json + +if [ -f /etc/sonic/config_db.json ]; then + sonic-cfggen -j /etc/sonic/config_db.json -j /etc/sonic/init_cfg.json --print-data > /tmp/config_db.json + mv /tmp/config_db.json /etc/sonic/config_db.json +else + sonic-cfggen -j /etc/sonic/init_cfg.json --print-data > /etc/sonic/config_db.json +fi + +mkdir -p /etc/swss/config.d/ + +rm -f /var/run/rsyslogd.pid + +echo "Start rsyslogd" +supervisorctl start rsyslogd + +mkdir -p /var/run/redis + +echo "Start redis" +supervisorctl start redis-server + +echo "Veth Setup" +veth_setup.sh > /tmp/veth_setup.log + +echo "Start BM" +rm -rf bm_logs/bridge_log.* +rm -rf bm_logs/router_log.* +rm -rf log.txt +mkdir -p bm_logs +supervisorctl start bm_bridge +supervisorctl start bm_router + +sleep 10 +echo "BM Default config" +config_bm.sh > /tmp/config_bm.log + +/usr/bin/configdb-load.sh + +echo "Start syncd" +supervisorctl start syncd + +echo "Start orchagent" +supervisorctl start orchagent + +echo "Start portsyncd" +supervisorctl start portsyncd + +echo "Start neighsyncd" +supervisorctl start neighsyncd + +echo "Start teamsyncd" +supervisorctl start teamsyncd + +echo "Start fpmsyncd" +supervisorctl start fpmsyncd + +echo "Start intfmgrd" +supervisorctl start intfmgrd + +echo "Start vlanmgrd" +supervisorctl start vlanmgrd + +echo "Start zebra" +supervisorctl start zebra + +echo "Start bgpd" +supervisorctl start bgpd + +if [ -f /etc/swss/config.d/default_config.json ]; then + swssconfig /etc/swss/config.d/default_config.json +fi + +# Start arp_update when VLAN exists +VLAN=`sonic-cfggen -d -v 'VLAN.keys() | join(" ") if VLAN'` +if [ "$VLAN" != "" ]; then + echo "Start arp_update" + supervisorctl start arp_update +fi diff --git a/platform/p4/docker-sonic-p4/supervisord.conf b/platform/p4/docker-sonic-p4/supervisord.conf new file mode 100644 index 00000000000..946e4cb36e3 --- /dev/null +++ b/platform/p4/docker-sonic-p4/supervisord.conf @@ -0,0 +1,133 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=false + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=/dev/stdout +stdout_logfile_maxbytes=0 +stderr_logfile=/dev/stderr +stderr_logfile_maxbytes=0 + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:bm_router] +command=ip netns exec sw_net simple_switch -i 0@router_port1 -i 250@router_cpu_port --thrift-port 9091 --log-file bm_logs/router_log --log-flush --notifications-addr ipc:///tmp/bmv2-router-notifications.ipc /usr/share/p4-sai-bm/sai_router.json +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:bm_bridge] +command=ip netns exec sw_net simple_switch -i 0@sw_port0 -i 1@sw_port1 -i 2@sw_port2 -i 3@sw_port3 -i 4@sw_port4 -i 5@sw_port5 -i 6@sw_port6 -i 7@sw_port7 -i 7@sw_port7 -i 8@sw_port8 -i 9@sw_port9 -i 10@sw_port10 -i 11@sw_port11 -i 12@sw_port12 -i 13@sw_port13 -i 14@sw_port14 -i 15@sw_port15 -i 16@sw_port16 -i 17@sw_port17 -i 18@sw_port18 -i 19@sw_port19 -i 20@sw_port20 -i 21@sw_port21 -i 22@sw_port22 -i 23@sw_port23 -i 24@sw_port24 -i 25@sw_port25 -i 26@sw_port26 -i 27@sw_port27 -i 28@sw_port28 -i 29@sw_port29 -i 30@sw_port30 -i 31@sw_port31 -i 250@cpu_port -i 251@router_port0 --log-file bm_logs/bridge_log --log-flush /usr/share/p4-sai-bm/sai_bridge.json & +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:redis-server] +command=/usr/bin/redis-server /etc/redis/redis.conf +priority=4 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:syncd] +command=/usr/bin/syncd -u +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:orchagent] +command=/usr/bin/orchagent.sh +priority=5 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:portsyncd] +command=/usr/bin/portsyncd +priority=6 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:neighsyncd] +command=/usr/bin/neighsyncd +priority=8 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:teamsyncd] +command=/usr/bin/teamsyncd +priority=9 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:vlanmgrd] +command=/usr/bin/vlanmgrd +priority=10 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:intfmgrd] +command=/usr/bin/intfmgrd +priority=11 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:zebra] +command=/usr/lib/quagga/zebra -A 127.0.0.1 +priority=12 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:bgpd] +command=/usr/lib/quagga/bgpd -A 127.0.0.1 -F +priority=13 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:fpmsyncd] +command=/usr/bin/fpmsyncd +priority=14 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:arp_update] +command=/usr/bin/arp_update +priority=15 +autostart=false +autorestart=unexpected +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/p4/libsaithrift-dev.mk b/platform/p4/libsaithrift-dev.mk new file mode 100644 index 00000000000..68aec8ec3f2 --- /dev/null +++ b/platform/p4/libsaithrift-dev.mk @@ -0,0 +1,7 @@ +# libsaithrift-dev package + +LIBSAITHRIFT_DEV_P4 = libsaithrift-dev_1.0.4_amd64.deb +$(LIBSAITHRIFT_DEV_P4)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI +$(LIBSAITHRIFT_DEV_P4)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(THRIFT_COMPILER) $(P4_SWITCH) +$(LIBSAITHRIFT_DEV_P4)_RDEPENDS += $(LIBTHRIFT) $(P4_SWITCH) +SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV_P4) diff --git a/platform/p4/p4-bmv.mk b/platform/p4/p4-bmv.mk new file mode 100644 index 00000000000..affb0d5ac82 --- /dev/null +++ b/platform/p4/p4-bmv.mk @@ -0,0 +1,7 @@ +# p4 bmv package + +P4_BMV = sai-p4-bm_1.0.0_amd64.deb +$(P4_BMV)_DEPENDS += $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(P4C_BM) +$(P4_BMV)_RDEPENDS += $(LIBTHRIFT) $(PYTHON_THRIFT) $(THRIFT_COMPILER) +$(P4_BMV)_SRC_PATH = $(PLATFORM_PATH)/SAI-P4-BM/p4-switch +SONIC_DPKG_DEBS += $(P4_BMV) diff --git a/platform/p4/p4-hlir.mk b/platform/p4/p4-hlir.mk new file mode 100644 index 00000000000..61307c7ff79 --- /dev/null +++ b/platform/p4/p4-hlir.mk @@ -0,0 +1,9 @@ +# p4 bmv package + +P4_HLIR_V1_1 = python-p4-hlir-v1-1_1.1.7-1_all.deb +$(P4_HLIR_V1_1)_SRC_PATH = $(PLATFORM_PATH)/p4-hlir/p4-hlir-v1.1 +SONIC_PYTHON_STDEB_DEBS += $(P4_HLIR_V1_1) + +P4_HLIR = python-p4-hlir_0.9.36-1_all.deb +$(P4_HLIR)_SRC_PATH = $(PLATFORM_PATH)/p4-hlir/p4-hlir +SONIC_PYTHON_STDEB_DEBS += $(P4_HLIR) diff --git a/platform/p4/p4-hlir/p4-hlir b/platform/p4/p4-hlir/p4-hlir new file mode 160000 index 00000000000..0ab8e58f8a9 --- /dev/null +++ b/platform/p4/p4-hlir/p4-hlir @@ -0,0 +1 @@ +Subproject commit 0ab8e58f8a92ee469235028430795088af9cda77 diff --git a/platform/p4/p4-hlir/p4-hlir-v1.1 b/platform/p4/p4-hlir/p4-hlir-v1.1 new file mode 160000 index 00000000000..fdee55e2567 --- /dev/null +++ b/platform/p4/p4-hlir/p4-hlir-v1.1 @@ -0,0 +1 @@ +Subproject commit fdee55e2567fe65463f328d70558b5079894b420 diff --git a/platform/p4/p4-switch.mk b/platform/p4/p4-switch.mk new file mode 100644 index 00000000000..fb092fa2c5f --- /dev/null +++ b/platform/p4/p4-switch.mk @@ -0,0 +1,7 @@ +# p4 sai adapter package + +P4_SWITCH = p4-sai-adapter_0.1-0_amd64.deb +$(P4_SWITCH)_DEPENDS += $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(P4_BMV) +$(P4_SWITCH)_RDEPENDS += $(LIBTHRIFT) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(P4_BMV) +$(P4_SWITCH)_SRC_PATH = $(PLATFORM_PATH)/SAI-P4-BM/sai_adapter +SONIC_DPKG_DEBS += $(P4_SWITCH) diff --git a/platform/p4/p4c-bm.mk b/platform/p4/p4c-bm.mk new file mode 100644 index 00000000000..1982ee35921 --- /dev/null +++ b/platform/p4/p4c-bm.mk @@ -0,0 +1,7 @@ +# p4c bm package + +P4C_BM = python-p4c-bm_1.0.0-5415c416-1_all.deb +$(P4C_BM)_SRC_PATH = $(PLATFORM_PATH)/p4c-bm/p4c-bm +$(P4C_BM)_DEPENDS += $(TENJIN) $(P4_HLIR) $(P4_HLIR_V1_1) +$(P4C_BM)_RDEPENDS += $(TENJIN) $(P4_HLIR) $(P4_HLIR_V1_1) +SONIC_PYTHON_STDEB_DEBS += $(P4C_BM) diff --git a/platform/p4/p4c-bm/p4c-bm b/platform/p4/p4c-bm/p4c-bm new file mode 160000 index 00000000000..5415c4160af --- /dev/null +++ b/platform/p4/p4c-bm/p4c-bm @@ -0,0 +1 @@ +Subproject commit 5415c4160aff025f27fe45301c62aa9aeb4bab40 diff --git a/platform/p4/rules.mk b/platform/p4/rules.mk new file mode 100644 index 00000000000..975dbb82ec8 --- /dev/null +++ b/platform/p4/rules.mk @@ -0,0 +1,17 @@ +# include $(PLATFORM_PATH)/p4-softswitch.mk +include $(PLATFORM_PATH)/tenjin.mk +include $(PLATFORM_PATH)/p4-hlir.mk +include $(PLATFORM_PATH)/p4c-bm.mk +# include $(PLATFORM_PATH)/p4-sai-bm.mk +include $(PLATFORM_PATH)/p4-bmv.mk +include $(PLATFORM_PATH)/p4-switch.mk +include $(PLATFORM_PATH)/docker-sonic-p4.mk +include $(PLATFORM_PATH)/libsaithrift-dev.mk + +SONIC_ALL += $(DOCKER_SONIC_P4) + +$(LIBSAIREDIS)_DEPENDS += $(P4_SWITCH) +ifeq ($(ENABLE_SYNCD_RPC),y) +$(LIBSAIREDIS)_DEPENDS += $(LIBSAITHRIFT_DEV_P4) +endif +$(LIBSAIREDIS)_RDEPENDS += $(P4_SWITCH) diff --git a/platform/p4/tenjin.mk b/platform/p4/tenjin.mk new file mode 100644 index 00000000000..a9f38437d97 --- /dev/null +++ b/platform/p4/tenjin.mk @@ -0,0 +1,5 @@ +# tenjin package + +TENJIN = python-tenjin_1.1.1-1_all.deb +$(TENJIN)_SRC_PATH = $(PLATFORM_PATH)/tenjin +SONIC_MAKE_DEBS += $(TENJIN) diff --git a/platform/p4/tenjin/Makefile b/platform/p4/tenjin/Makefile new file mode 100644 index 00000000000..83b27d390ab --- /dev/null +++ b/platform/p4/tenjin/Makefile @@ -0,0 +1,19 @@ +SHELL = /bin/bash +.ONESHELL: + +TENJIN_VERSION = 1.1.1 +TENJIN_VERSION_FULL = $(TENJIN_VERSION)-1 + +MAIN_TARGET = python-tenjin_$(TENJIN_VERSION_FULL)_all.deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + rm -rf Tenjin-$(TENJIN_VERSION) + + wget -nc https://pypi.python.org/packages/source/T/Tenjin/Tenjin-$(TENJIN_VERSION).tar.gz + tar xzf Tenjin-$(TENJIN_VERSION).tar.gz + + pushd Tenjin-$(TENJIN_VERSION) + python setup.py --command-packages=stdeb.command bdist_deb + popd + + mv Tenjin-$(TENJIN_VERSION)/deb_dist/$* $(DEST)/ diff --git a/platform/template/docker-syncd-base.mk b/platform/template/docker-syncd-base.mk new file mode 100644 index 00000000000..cefcf15ebd6 --- /dev/null +++ b/platform/template/docker-syncd-base.mk @@ -0,0 +1,35 @@ +# docker image for syncd + + +DOCKER_SYNCD_BASE_STEM = docker-syncd-$(DOCKER_SYNCD_PLATFORM_CODE) +DOCKER_SYNCD_BASE = $(DOCKER_SYNCD_BASE_STEM).gz +DOCKER_SYNCD_BASE_DBG = $(DOCKER_SYNCD_BASE_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_SYNCD_BASE)_PATH = $(PLATFORM_PATH)/docker-syncd-$(DOCKER_SYNCD_PLATFORM_CODE) + +$(DOCKER_SYNCD_BASE)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) + +$(DOCKER_SYNCD_BASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) + +$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_DEPENDS) + +$(DOCKER_SYNCD_BASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_IMAGE_PACKAGES) + +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_BASE) +SONIC_STRETCH_DOCKERS += $(DOCKER_SYNCD_BASE) +ifneq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_BASE) +endif + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_SYNCD_BASE_DBG) +SONIC_STRETCH_DBG_DOCKERS += $(DOCKER_SYNCD_BASE_DBG) +ifneq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_SYNCD_BASE_DBG) +endif + + +$(DOCKER_SYNCD_BASE)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_BASE)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro + diff --git a/platform/vs/README.gns3.md b/platform/vs/README.gns3.md new file mode 100644 index 00000000000..c434d5e9b40 --- /dev/null +++ b/platform/vs/README.gns3.md @@ -0,0 +1,17 @@ +HOWTO Create a GNS3 Appliance File (.gns3a) + + +Execute the command sonic-gns3.sh + + +For instance: + +./sonic-gns3a.sh -h + +sonic-gns3a.sh [ -r ] -b +e.g.: sonic-gns3a.sh -r 1.1 -b /sonic-vs.img + +For more information about GNS3, please refer to: + +https://gns3.com/ + diff --git a/platform/vs/README.vsdocker.md b/platform/vs/README.vsdocker.md new file mode 100644 index 00000000000..42e1cafc846 --- /dev/null +++ b/platform/vs/README.vsdocker.md @@ -0,0 +1,75 @@ +HOWTO Use Virtual Switch (Docker) + + +1. Create a docker with 32 front panel port + +``` +$ docker run -id --name sw debian bash +$ sudo ./create_vnet.sh sw +$ ip netns list +sw-srv31 (id: 37) +sw-srv30 (id: 35) +sw-srv29 (id: 34) +sw-srv28 (id: 33) +sw-srv27 (id: 32) +sw-srv26 (id: 31) +sw-srv25 (id: 30) +sw-srv24 (id: 29) +sw-srv23 (id: 28) +sw-srv22 (id: 27) +sw-srv21 (id: 26) +sw-srv20 (id: 25) +sw-srv19 (id: 24) +sw-srv18 (id: 23) +sw-srv17 (id: 22) +sw-srv16 (id: 21) +sw-srv15 (id: 20) +sw-srv14 (id: 19) +sw-srv13 (id: 18) +sw-srv12 (id: 17) +sw-srv11 (id: 16) +sw-srv10 (id: 15) +sw-srv9 (id: 14) +sw-srv8 (id: 13) +sw-srv7 (id: 12) +sw-srv6 (id: 11) +sw-srv5 (id: 10) +sw-srv4 (id: 9) +sw-srv3 (id: 8) +sw-srv2 (id: 7) +sw-srv1 (id: 6) +sw-srv0 (id: 5) +``` + +2. Start sonic virtual switch docker + +``` +$ docker run --privileged --network container:sw --name vs -d docker-sonic-vs +``` + +3. Setup IP in the virtual switch docker + +``` +$ docker exec -it vs bash +root@2e9b5c2dc2a2:/# ifconfig Ethernet0 10.0.0.0/31 up +root@2e9b5c2dc2a2:/# ifconfig Ethernet4 10.0.0.2/31 up +``` + +4. Setup IP in the server network namespace + +``` +$ sudo ip netns exec sw-srv0 ifconfig eth0 10.0.0.1/31 +$ sudo ip netns exec sw-srv0 ip route add default via 10.0.0.0 +$ sudo ip netns exec sw-srv1 ifconfig eth0 10.0.0.3/31 +$ sudo ip netns exec sw-srv1 ip route add default via 10.0.0.2 +``` + +5. Ping from sw-srv0 to sw-srv1 + +``` +$ sudo ip netns exec sw-srv0 ping 10.0.0.3 +PING 10.0.0.3 (10.0.0.3) 56(84) bytes of data. +64 bytes from 10.0.0.3: icmp_seq=1 ttl=63 time=0.137 ms +64 bytes from 10.0.0.3: icmp_seq=2 ttl=63 time=0.148 ms +64 bytes from 10.0.0.3: icmp_seq=3 ttl=63 time=0.149 ms +``` diff --git a/platform/vs/README.vsvm.md b/platform/vs/README.vsvm.md new file mode 100644 index 00000000000..d627859578b --- /dev/null +++ b/platform/vs/README.vsvm.md @@ -0,0 +1,35 @@ +HOWTO Use Virtual Switch (VM) + +1. Install libvirt, kvm, qemu + +``` +sudo apt-get install libvirt-clients qemu-kvm libvirt-bin +``` + +2. Create SONiC VM + +``` +$ virsh +Welcome to virsh, the virtualization interactive terminal. + +Type: 'help' for help with commands + 'quit' to quit + +virsh # +virsh # create sonic.xml +Domain sonic created from sonic.xml + +virsh # +``` + +2. Connect SONiC VM via console + +``` +$ telnet 127.0.0.1 7000 +``` + +3. Connect SONiC VM via SSH + +``` +$ ssh -p 3040 admin@127.0.0.1 +``` diff --git a/platform/vs/create_vnet.sh b/platform/vs/create_vnet.sh new file mode 100755 index 00000000000..4746e16cbba --- /dev/null +++ b/platform/vs/create_vnet.sh @@ -0,0 +1,38 @@ +#!/bin/bash + +SWNAME=$1 + +pid=$(docker inspect --format '{{.State.Pid}}' $SWNAME) + +echo Seting up servers + +SERVERS=31 + +for srv in `seq 0 $SERVERS`; do + + SRV="$SWNAME-srv$srv" + + NSS="ip netns exec $SRV" + + ip netns add $SRV + + $NSS ip addr add 127.0.0.1/8 dev lo + $NSS ip addr add ::1/128 dev lo + $NSS ip link set dev lo up + + # add virtual link between neighbor and the virtual switch docker + + IF="eth$((srv+1))" + + ip link add ${SRV}eth0 type veth peer name $IF + ip link set ${SRV}eth0 netns $SRV + ip link set $IF netns ${pid} + + echo "Bring ${SRV}eth0 up" + $NSS ip link set dev ${SRV}eth0 name eth0 + $NSS ip link set dev eth0 up + + echo "Bring $IF up in the virtual switch docker" + nsenter -t $pid -n ip link set dev $IF up + +done diff --git a/platform/vs/docker-sonic-vs.mk b/platform/vs/docker-sonic-vs.mk new file mode 100644 index 00000000000..71853423168 --- /dev/null +++ b/platform/vs/docker-sonic-vs.mk @@ -0,0 +1,40 @@ +# docker image for virtual switch based sonic docker image + +DOCKER_SONIC_VS = docker-sonic-vs.gz +$(DOCKER_SONIC_VS)_PATH = $(PLATFORM_PATH)/docker-sonic-vs +$(DOCKER_SONIC_VS)_DEPENDS += $(SWSS) \ + $(SYNCD_VS) \ + $(REDIS_TOOLS) \ + $(REDIS_SERVER) \ + $(PYTHON_SWSSCOMMON) \ + $(LIBTEAMDCT) \ + $(LIBTEAM_UTILS) \ + $(SONIC_DEVICE_DATA) + +$(DOCKER_SONIC_VS)_PYTHON_DEBS += $(SONIC_UTILS) + +ifeq ($(INSTALL_DEBUG_TOOLS), y) +$(DOCKER_SONIC_VS)_DEPENDS += $(SWSS_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIREDIS_DBG) \ + $(LIBSAIVS_DBG) \ + $(SYNCD_VS_DBG) +endif + +ifeq ($(SONIC_ROUTING_STACK), quagga) +$(DOCKER_SONIC_VS)_DEPENDS += $(QUAGGA) +else ifeq ($(SONIC_ROUTING_STACK), frr) +$(DOCKER_SONIC_VS)_DEPENDS += $(FRR) +else +$(DOCKER_SONIC_VS)_DEPENDS += $(GOBGP) +endif + +$(DOCKER_SONIC_VS)_FILES += $(CONFIGDB_LOAD_SCRIPT) \ + $(ARP_UPDATE_SCRIPT) \ + $(BUFFERS_CONFIG_TEMPLATE) \ + $(QOS_CONFIG_TEMPLATE) \ + $(SONIC_VERSION) + +$(DOCKER_SONIC_VS)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) +SONIC_DOCKER_IMAGES += $(DOCKER_SONIC_VS) +SONIC_STRETCH_DOCKERS += $(DOCKER_SONIC_VS) diff --git a/platform/vs/docker-sonic-vs/50-default.conf b/platform/vs/docker-sonic-vs/50-default.conf new file mode 100644 index 00000000000..d672d83af78 --- /dev/null +++ b/platform/vs/docker-sonic-vs/50-default.conf @@ -0,0 +1,68 @@ +# Default rules for rsyslog. +# +# For more information see rsyslog.conf(5) and /etc/rsyslog.conf + +# +# First some standard log files. Log by facility. +# +auth,authpriv.* /var/log/auth.log +*.*;auth,authpriv.none -/var/log/syslog +#cron.* /var/log/cron.log +#daemon.* -/var/log/daemon.log +kern.* -/var/log/kern.log +#lpr.* -/var/log/lpr.log +mail.* -/var/log/mail.log +#user.* -/var/log/user.log + +# +# Logging for the mail system. Split it up so that +# it is easy to write scripts to parse these files. +# +#mail.info -/var/log/mail.info +#mail.warn -/var/log/mail.warn +mail.err /var/log/mail.err + +# +# Logging for INN news system. +# +news.crit /var/log/news/news.crit +news.err /var/log/news/news.err +news.notice -/var/log/news/news.notice + +# +# Some "catch-all" log files. +# +#*.=debug;\ +# auth,authpriv.none;\ +# news.none;mail.none -/var/log/debug +#*.=info;*.=notice;*.=warn;\ +# auth,authpriv.none;\ +# cron,daemon.none;\ +# mail,news.none -/var/log/messages + +# +# Emergencies are sent to everybody logged in. +# +*.emerg :omusrmsg:* + +# +# I like to have messages displayed on the console, but only on a virtual +# console I usually leave idle. +# +#daemon,mail.*;\ +# news.=crit;news.=err;news.=notice;\ +# *.=debug;*.=info;\ +# *.=notice;*.=warn /dev/tty8 + +# The named pipe /dev/xconsole is for the `xconsole' utility. To use it, +# you must invoke `xconsole' with the `-file' option: +# +# $ xconsole -file /dev/xconsole [...] +# +# NOTE: adjust the list below, or you'll go crazy if you have a reasonably +# busy site.. +# +daemon.*;mail.*;\ + news.err;\ + *.=debug;*.=info;\ + *.=notice;*.=warn |/dev/xconsole diff --git a/platform/vs/docker-sonic-vs/Dockerfile.j2 b/platform/vs/docker-sonic-vs/Dockerfile.j2 new file mode 100644 index 00000000000..7cc6f98921f --- /dev/null +++ b/platform/vs/docker-sonic-vs/Dockerfile.j2 @@ -0,0 +1,124 @@ +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get install -y gnupg +COPY ["sonic-dev.gpg.key", "/etc/apt/"] +RUN apt-key add /etc/apt/sonic-dev.gpg.key +RUN echo "deb http://packages.microsoft.com/repos/sonic-dev/ jessie main" >> /etc/apt/sources.list +RUN apt-get update + +RUN apt-get install -y net-tools \ + arping \ + ndisc6 \ + ethtool \ + tcpdump \ + ifupdown \ + bridge-utils \ + python-ply \ + libqt5core5a \ + libqt5network5 \ + libboost-program-options1.62.0 \ + libboost-system1.62.0 \ + libboost-thread1.62.0 \ + libgmp10 \ + libjudydebian1 \ + libdaemon0 \ + libjansson4 \ + libatomic1 \ + libjemalloc1 \ + liblua5.1-0 \ + lua-bitop \ + lua-cjson \ + openssh-client \ + openssh-server \ + libc-ares2 \ + iproute \ + libpython2.7 \ + grub2-common \ + python-click-default-group \ + python-click \ + python-natsort \ + python-tabulate \ + bash-completion \ + libelf1 \ + libmnl0 \ + logrotate \ + apt-utils \ + psmisc \ + tcpdump \ + python-scapy + +RUN pip install setuptools +RUN pip install py2_ipaddress +RUN pip install six +RUN pip install pyroute2==0.5.3 netifaces==0.10.7 +RUN pip install monotonic==1.5 + +{% if docker_sonic_vs_debs.strip() -%} +# Copy locally-built Debian package dependencies +{%- for deb in docker_sonic_vs_debs.split(' ') %} +COPY debs/{{ deb }} /debs/ +{%- endfor %} + +# Install locally-built Debian packages and implicitly install their dependencies +{%- for deb in docker_sonic_vs_debs.split(' ') %} +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; dpkg_apt /debs/{{ deb }} +{%- endfor %} +{%- endif %} + +{% if docker_sonic_vs_pydebs.strip() -%} +# Copy locally-built Debian package dependencies +{%- for deb in docker_sonic_vs_pydebs.split(' ') %} +COPY python-debs/{{ deb }} /debs/ +{%- endfor %} + +# Install locally-built Debian packages and implicitly install their dependencies +{%- for deb in docker_sonic_vs_pydebs.split(' ') %} +RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; dpkg_apt /debs/{{ deb }} +{%- endfor %} +{%- endif %} + +# Clean up +RUN apt-get clean -y +RUN apt-get autoclean -y +RUN apt-get autoremove -y +RUN rm -rf /debs ~/.cache + +RUN sed -ri 's/^(save .*$)/# \1/g; \ + s/^daemonize yes$/daemonize no/; \ + s/^logfile .*$/logfile ""/; \ + s/^# syslog-enabled no$/syslog-enabled no/; \ + s/^# unixsocket/unixsocket/; \ + s/notify-keyspace-events ""/notify-keyspace-events AKE/; \ + s/redis-server.sock/redis.sock/g; \ + s/^client-output-buffer-limit pubsub [0-9]+mb [0-9]+mb [0-9]+/client-output-buffer-limit pubsub 0 0 0/ \ + ' /etc/redis/redis.conf + +COPY ["50-default.conf", "/etc/rsyslog.d/"] +COPY ["start.sh", "orchagent.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/configdb-load.sh", "/usr/bin/"] +COPY ["files/arp_update", "/usr/bin/"] +COPY ["files/buffers_config.j2", "files/qos_config.j2", "/usr/share/sonic/templates/"] +COPY ["files/sonic_version.yml", "/etc/sonic/"] +COPY ["database_config.json", "/etc/default/sonic-db/"] + +# Workaround the tcpdump issue +RUN mv /usr/sbin/tcpdump /usr/bin/tcpdump + +RUN echo "docker-sonic-vs" > /etc/hostname +RUN mkdir -p /etc/quagga +RUN touch /etc/quagga/zebra.conf + +# disable integrated vtysh config +RUN rm /etc/frr/frr.conf + +# Create /var/warmboot/teamd folder for teammgrd +RUN mkdir -p /var/warmboot/teamd + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/vs/docker-sonic-vs/database_config.json b/platform/vs/docker-sonic-vs/database_config.json new file mode 100644 index 00000000000..b86ae11bba9 --- /dev/null +++ b/platform/vs/docker-sonic-vs/database_config.json @@ -0,0 +1,57 @@ +{ + "INSTANCES": { + "redis":{ + "hostname" : "127.0.0.1", + "port" : 6379, + "unix_socket_path" : "/var/run/redis/redis.sock" + } + }, + "DATABASES" : { + "APPL_DB" : { + "id" : 0, + "separator": ":", + "instance" : "redis" + }, + "ASIC_DB" : { + "id" : 1, + "separator": ":", + "instance" : "redis" + }, + "COUNTERS_DB" : { + "id" : 2, + "separator": ":", + "instance" : "redis" + }, + "LOGLEVEL_DB" : { + "id" : 3, + "separator": ":", + "instance" : "redis" + }, + "CONFIG_DB" : { + "id" : 4, + "separator": "|", + "instance" : "redis" + }, + "PFC_WD_DB" : { + "id" : 5, + "separator": ":", + "instance" : "redis" + }, + "FLEX_COUNTER_DB" : { + "id" : 5, + "separator": ":", + "instance" : "redis" + }, + "STATE_DB" : { + "id" : 6, + "separator": "|", + "instance" : "redis" + }, + "SNMP_OVERLAY_DB" : { + "id" : 7, + "separator": "|", + "instance" : "redis" + } + }, + "VERSION" : "1.0" +} diff --git a/platform/vs/docker-sonic-vs/orchagent.sh b/platform/vs/docker-sonic-vs/orchagent.sh new file mode 100755 index 00000000000..d9bebf11734 --- /dev/null +++ b/platform/vs/docker-sonic-vs/orchagent.sh @@ -0,0 +1,21 @@ +#!/usr/bin/env bash + +if [[ -z "$fake_platform" ]]; then + export platform=vs +else + export platform=$fake_platform +fi + +MAC_ADDRESS=`ip link show eth0 | grep ether | awk '{print $2}'` + +# Create a folder for SwSS record files +mkdir -p /var/log/swss +ORCHAGENT_ARGS="-d /var/log/swss " + +# Set orchagent pop batch size to 8192 +ORCHAGENT_ARGS+="-b 8192 " + +# Set mac address +ORCHAGENT_ARGS+="-m $MAC_ADDRESS" + +exec /usr/bin/orchagent ${ORCHAGENT_ARGS} diff --git a/platform/vs/docker-sonic-vs/sonic-dev.gpg.key b/platform/vs/docker-sonic-vs/sonic-dev.gpg.key new file mode 100644 index 00000000000..fb9a37901bc --- /dev/null +++ b/platform/vs/docker-sonic-vs/sonic-dev.gpg.key @@ -0,0 +1,30 @@ +-----BEGIN PGP PUBLIC KEY BLOCK----- +Version: GnuPG v1 + +mQENBFQ1bTIBCAC7oGfkv/ck0XsLuG8cdcSB2ISqxFAcBvH9BitEtxmpW2uhykKk +xY4rVD/4Uys1s3PF1/64QfPR+hYcewueOwz0ZAcLyFXXk4McICXaPq3NrLiWYKKX +UZLnrPzcrGZoW/kHDDp4OmBiDmT1PGvZlpuimwkMCusUzIr7Cbbp2dIy8MERL5tA +LcgLu3KL6clJ+aTW2jgepI1D7sTepOeGd7eRSb5njKg2M7k/93v/7MipZxiVtyXH +B74YiK6jSbst5JpuYsLa/Dqryvx7Xq3n53oif892pv3euTduo1fYw8Hgh/OOYdeT +c9WCj03KA1jCSFURjdrug0kR8BPlfjqtRLXFABEBAAG0JE1TIE9wZW4gVGVjaCA8 +aW50ZXJvcEBtaWNyb3NvZnQuY29tPokBOAQTAQIAIgUCVDVtMgIbAwYLCQgHAwIG +FQgCCQoLBBYCAwECHgECF4AACgkQsCxG30F6CJO1uAf/cmL68bM8YgF/61hkaY56 +LqrppUTJH/w4fKq47Pf6KfgSLvxfNU6soi2KHYRjIvTRx3tV4vUM5n2plaQg2s8V +/Epg4FeIRTk75YwiHAzLhLnp5cdUaTvC4j4mwxoB6j9Ty+fXJwQ0MvpDhIZb9vM4 +GXw/fEQHCT4f3gx4nReeqE+FB2wVHleX9+Lpodu98JyJTKJRBRHYLqy6S+/lyp2W +aBlsI1LOqBcx1uRK24U7duIpbYwIyrx0cafSruqR2GjVdu+imkhHyUn52VbzYhq1 +af0rqYiZ1VOamVOG0By8+hVyNa1MLc1K2uWGs0o5fDe9F5/swbvLHVXI+M50Vs+m +J7kBDQRUNW0yAQgAu7DkTVj0ZQC4F7bFivAwrdby8gCakTXOl1kcK622hjRJ8nam +aZeW+eADfLRsTmdUmXgZu1YWS5Gn2ZVngC8SGPUBT071+oRETCz4uNB7IimB9QfP +++orI6o2vmnVVsq5wWCbEdNU+TCVv1zjrYev5lwckkKpjHt6o8MNoX2DFuQymSyR +eZKaqhdKmcji4Ke7OIYqwgPjch3wxzE1b5gNOR/iwxWyjjOffZPLr/VhIfIJRs86 +dSXrwjHtEh810SKDLghHM0VAdY34nyC5ZZ61yhts5HtQDFK+9mNpH1mkc4gDBlgG +266pVvknumK6lPNm/osF/cpjWmEw24ypcQIvOQARAQABiQEfBBgBAgAJBQJUNW0y +AhsMAAoJELAsRt9BegiTMBUH/0sZ6gZy7mCTSAYT+NSXLFtGC2zNUVL80SWvfgYm +k9XPVI22MrefZfQ6M01RylyxtWXjRM8UoN8SDKWPpXumzJf831f/7om5zwutaG7b +tjDPYqRKJSbAIFZu2mN+uLrNQ2SV6XK7FoV0dtcrEX9S7RICb6i19D+70+Oh/qgU +R04H1jqS29XBzqAlIzdBoA+sYAwbOIJsSL3YyNQcUv3B5+5yR/bo/L8pnUJt6iuL +nWW+mi7r8gWPHDSrcdYq1TmmlOM7CwZPgWRZzkQPSeZz52Tt7IP47eyGJ09U4PIf +FtMH1ElL2UgHoA/F9Q88e7LkztaTqE59uXWbIYyuSMJVvRU= +=sb3d +-----END PGP PUBLIC KEY BLOCK----- diff --git a/platform/vs/docker-sonic-vs/start.sh b/platform/vs/docker-sonic-vs/start.sh new file mode 100755 index 00000000000..614541961c8 --- /dev/null +++ b/platform/vs/docker-sonic-vs/start.sh @@ -0,0 +1,77 @@ +#!/bin/bash -e + +# generate configuration + +PLATFORM=x86_64-kvm_x86_64-r0 +HWSKU=Force10-S6000 + +ln -sf /usr/share/sonic/device/$PLATFORM/$HWSKU /usr/share/sonic/hwsku + +[ -d /etc/sonic ] || mkdir -p /etc/sonic + +SYSTEM_MAC_ADDRESS=$(ip link show eth0 | grep ether | awk '{print $2}') +sonic-cfggen -a '{"DEVICE_METADATA":{"localhost": {"mac": "'$SYSTEM_MAC_ADDRESS'"}}}' --print-data > /etc/sonic/init_cfg.json + +if [ -f /etc/sonic/config_db.json ]; then + sonic-cfggen -j /etc/sonic/config_db.json -j /etc/sonic/init_cfg.json --print-data > /tmp/config_db.json + mv /tmp/config_db.json /etc/sonic/config_db.json +else + # generate and merge buffers configuration into config file + sonic-cfggen -t /usr/share/sonic/hwsku/buffers.json.j2 > /tmp/buffers.json + sonic-cfggen -j /etc/sonic/init_cfg.json -t /usr/share/sonic/hwsku/qos.json.j2 > /tmp/qos.json + sonic-cfggen -p /usr/share/sonic/hwsku/port_config.ini -k $HWSKU --print-data > /tmp/ports.json + sonic-cfggen -j /etc/sonic/init_cfg.json -j /tmp/buffers.json -j /tmp/qos.json -j /tmp/ports.json --print-data > /etc/sonic/config_db.json +fi + +mkdir -p /etc/swss/config.d/ + +rm -f /var/run/rsyslogd.pid + +supervisorctl start rsyslogd + +mkdir -p /var/run/redis/sonic-db +cp /etc/default/sonic-db/database_config.json /var/run/redis/sonic-db/ + +supervisorctl start redis-server + +/usr/bin/configdb-load.sh + +supervisorctl start syncd + +supervisorctl start orchagent + +supervisorctl start portsyncd + +supervisorctl start neighsyncd + +supervisorctl start teamsyncd + +supervisorctl start fpmsyncd + +supervisorctl start teammgrd + +supervisorctl start vrfmgrd + +supervisorctl start portmgrd + +supervisorctl start intfmgrd + +supervisorctl start vlanmgrd + +supervisorctl start zebra + +supervisorctl start staticd + +supervisorctl start buffermgrd + +supervisorctl start nbrmgrd + +supervisorctl start vxlanmgrd + +supervisorctl start sflowmgrd + +# Start arp_update when VLAN exists +VLAN=`sonic-cfggen -d -v 'VLAN.keys() | join(" ") if VLAN'` +if [ "$VLAN" != "" ]; then + supervisorctl start arp_update +fi diff --git a/platform/vs/docker-sonic-vs/supervisord.conf b/platform/vs/docker-sonic-vs/supervisord.conf new file mode 100644 index 00000000000..143fe49d44a --- /dev/null +++ b/platform/vs/docker-sonic-vs/supervisord.conf @@ -0,0 +1,190 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:redis-server] +command=/usr/bin/redis-server /etc/redis/redis.conf +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=4 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:orchagent] +command=/usr/bin/orchagent.sh +priority=5 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:portsyncd] +command=/usr/bin/portsyncd +priority=6 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:neighsyncd] +command=/usr/bin/neighsyncd +priority=8 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:teamsyncd] +command=/usr/bin/teamsyncd +priority=9 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:vlanmgrd] +command=/usr/bin/vlanmgrd +priority=10 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:intfmgrd] +command=/usr/bin/intfmgrd +priority=11 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:portmgrd] +command=/usr/bin/portmgrd +priority=12 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:teammgrd] +command=/usr/bin/teammgrd +priority=12 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:zebra] +command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M fpm +priority=13 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:bgpd] +command=/usr/lib/frr/bgpd -A 127.0.0.1 +priority=14 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:staticd] +command=/usr/lib/frr/staticd -A 127.0.0.1 +priority=14 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:fpmsyncd] +command=/usr/bin/fpmsyncd +priority=15 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:arp_update] +command=/usr/bin/arp_update +priority=16 +autostart=false +autorestart=unexpected +stdout_logfile=syslog +stderr_logfile=syslog + +[program:buffermgrd] +command=/usr/bin/buffermgrd -l /usr/share/sonic/hwsku/pg_profile_lookup.ini +priority=17 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:vrfmgrd] +command=/usr/bin/vrfmgrd +priority=18 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:restore_neighbors] +command=/usr/bin/restore_neighbors.py +priority=19 +autostart=false +autorestart=false +startsecs=0 +startretries=0 +stdout_logfile=syslog +stderr_logfile=syslog + +[program:nbrmgrd] +command=/usr/bin/nbrmgrd +priority=20 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:vxlanmgrd] +command=/usr/bin/vxlanmgrd +priority=21 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:sflowmgrd] +command=/usr/bin/sflowmgrd +priority=22 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/vs/docker-syncd-vs.mk b/platform/vs/docker-syncd-vs.mk new file mode 100644 index 00000000000..15d94c5854d --- /dev/null +++ b/platform/vs/docker-syncd-vs.mk @@ -0,0 +1,14 @@ +# docker image for vs syncd + +DOCKER_SYNCD_PLATFORM_CODE = vs +include $(PLATFORM_PATH)/../template/docker-syncd-base.mk + +$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD_VS) + +$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_VS_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) \ + $(LIBSAIVS_DBG) + +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/vs/docker-syncd-vs/Dockerfile.j2 b/platform/vs/docker-syncd-vs/Dockerfile.j2 new file mode 100644 index 00000000000..070d8b984f4 --- /dev/null +++ b/platform/vs/docker-syncd-vs/Dockerfile.j2 @@ -0,0 +1,32 @@ +FROM docker-config-engine-stretch + +ARG docker_container_name +RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +RUN apt-get install -f -y iproute2=4.20.0-2~bpo9+1 libcap2-bin=1:2.25-1 + +COPY \ +{% for deb in docker_syncd_vs_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor -%} +debs/ + +RUN dpkg -i \ +{% for deb in docker_syncd_vs_debs.split(' ') -%} +debs/{{ deb }}{{' '}} +{%- endfor %} + +COPY ["start.sh", "/usr/bin/"] + +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] + +## Clean up +RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y +RUN rm -rf /debs + +ENTRYPOINT ["/usr/bin/supervisord"] diff --git a/platform/vs/docker-syncd-vs/start.sh b/platform/vs/docker-syncd-vs/start.sh new file mode 100755 index 00000000000..98c7d9c15a0 --- /dev/null +++ b/platform/vs/docker-syncd-vs/start.sh @@ -0,0 +1,45 @@ +#!/usr/bin/env bash + +PLATFORM_DIR=/usr/share/sonic/platform +HWSKU_DIR=/usr/share/sonic/hwsku + +SYNCD_SOCKET_FILE=/var/run/sswsyncd/sswsyncd.socket + +# Function: wait until syncd has created the socket for bcmcmd to connect to +wait_syncd() { + while true; do + if [ -e ${SYNCD_SOCKET_FILE} ]; then + break + fi + sleep 1 + done + + # wait until bcm sdk is ready to get a request + sleep 3 +} + + +# Remove stale files if they exist +rm -f /var/run/rsyslogd.pid +rm -f ${SYNCD_SOCKET_FILE} + +supervisorctl start rsyslogd + +mkdir -p /etc/sai.d/ + +# Create/Copy the sai.profile to /etc/sai.d/sai.profile +if [ -f $HWSKU_DIR/sai.profile.j2 ]; then + sonic-cfggen -d -t $HWSKU_DIR/sai.profile.j2 > /etc/sai.d/sai.profile +else + if [ -f $HWSKU_DIR/sai.profile ]; then + cp $HWSKU_DIR/sai.profile /etc/sai.d/sai.profile + fi +fi + +supervisorctl start syncd + +# If this platform has an initialization file for the Broadcom LED microprocessor, load it +if [ -r ${PLATFORM_DIR}/led_proc_init.soc ]; then + wait_syncd + supervisorctl start ledinit +fi diff --git a/platform/vs/docker-syncd-vs/supervisord.conf b/platform/vs/docker-syncd-vs/supervisord.conf new file mode 100644 index 00000000000..1af5d70a1d0 --- /dev/null +++ b/platform/vs/docker-syncd-vs/supervisord.conf @@ -0,0 +1,28 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog diff --git a/platform/vs/kvm-image.mk b/platform/vs/kvm-image.mk new file mode 100644 index 00000000000..439a6fc1e41 --- /dev/null +++ b/platform/vs/kvm-image.mk @@ -0,0 +1,14 @@ +# sonic kvm image + +SONIC_KVM_IMAGE = sonic-vs.img.gz +$(SONIC_KVM_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_KVM_IMAGE)_MACHINE = vs +$(SONIC_KVM_IMAGE)_IMAGE_TYPE = kvm +ifeq ($(INSTALL_DEBUG_TOOLS),y) +$(SONIC_KVM_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) +$(SONIC_KVM_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) +else +$(SONIC_KVM_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES) +endif +$(SONIC_KVM_IMAGE)_FILES = $(ONIE_RECOVERY_IMAGE) +SONIC_INSTALLERS += $(SONIC_KVM_IMAGE) diff --git a/platform/vs/one-image.mk b/platform/vs/one-image.mk new file mode 100644 index 00000000000..cf4f535382b --- /dev/null +++ b/platform/vs/one-image.mk @@ -0,0 +1,13 @@ +# sonic vs one image installer + +SONIC_ONE_IMAGE = sonic-vs.bin +$(SONIC_ONE_ABOOT_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_ONE_IMAGE)_MACHINE = vs +$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie +ifeq ($(INSTALL_DEBUG_TOOLS),y) +$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) +$(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) +else +$(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES) +endif +SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/vs/onie.mk b/platform/vs/onie.mk new file mode 100644 index 00000000000..09a807c25b2 --- /dev/null +++ b/platform/vs/onie.mk @@ -0,0 +1,4 @@ +ONIE_RECOVERY_IMAGE = onie-recovery-x86_64-kvm_x86_64-r0.iso +$(ONIE_RECOVERY_IMAGE)_URL = "https://sonicstorage.blob.core.windows.net/packages/onie/onie-recovery-x86_64-kvm_x86_64-r0.iso?sv=2015-04-05&sr=b&sig=XMAk1cttBFM369CMbihe5oZgXwe4uaDVfwg4CTLT%2F5U%3D&se=2155-10-13T10%3A40%3A13Z&sp=r" + +SONIC_ONLINE_FILES += $(ONIE_RECOVERY_IMAGE) diff --git a/platform/vs/platform.conf b/platform/vs/platform.conf new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/vs/rules.mk b/platform/vs/rules.mk new file mode 100644 index 00000000000..557604d9ec4 --- /dev/null +++ b/platform/vs/rules.mk @@ -0,0 +1,9 @@ +include $(PLATFORM_PATH)/syncd-vs.mk +include $(PLATFORM_PATH)/sonic-version.mk +include $(PLATFORM_PATH)/docker-sonic-vs.mk +include $(PLATFORM_PATH)/docker-syncd-vs.mk +include $(PLATFORM_PATH)/one-image.mk +include $(PLATFORM_PATH)/onie.mk +include $(PLATFORM_PATH)/kvm-image.mk + +SONIC_ALL += $(SONIC_ONE_IMAGE) $(SONIC_KVM_IMAGE) $(DOCKER_SONIC_VS) diff --git a/platform/vs/sonic-gns3a.sh b/platform/vs/sonic-gns3a.sh new file mode 100644 index 00000000000..57c63fb75f3 --- /dev/null +++ b/platform/vs/sonic-gns3a.sh @@ -0,0 +1,81 @@ +#!/bin/bash + +# This script creates a .gns3a SONiC appliance file +IMGFILE="sonic-vs.image" +RELEASE="latest" + +usage() { + echo "`basename $0` [ -r ] -b " + echo "e.g.: `basename $0` -r 1.1 -b /sonic-vs.image" + exit 0 +} + +while getopts "r:b:h" arg; do + case $arg in + h) + usage + ;; + r) + RELEASE=$OPTARG + ;; + b) + IMGFILE=$OPTARG + ;; + esac +done + +if [ ! -e ${IMGFILE} ]; then + echo "ERROR: ${IMGFILE} not found" + exit 2 +fi + + +MD5SUMIMGFILE=`md5sum ${IMGFILE} | cut -f 1 -d " "` +LENIMGFILE=`stat -c %s ${IMGFILE}` +GNS3APPNAME="SONiC-${RELEASE}.gns3a" +NAMEIMGFILE=`basename $IMGFILE` + +echo " +{ + \"name\": \"SONiC\", + \"category\": \"router\", + \"description\": \"SONiC Virtual Switch/Router\n\", + \"vendor_name\": \"SONiC\", + \"vendor_url\": \"https://azure.github.io/SONiC/\", + \"product_name\": \"SONiC\", + \"product_url\": \"https://azure.github.io/SONiC/\", + \"registry_version\": 3, + \"status\": \"experimental\", + \"maintainer\": \"SONiC\", + \"maintainer_email\": \"sonicproject@googlegroups.com\", + \"usage\": \"Supports SONiC release: ${RELEASE}\", + \"qemu\": { + \"adapter_type\": \"e1000\", + \"adapters\": 10, + \"ram\": 2048, + \"hda_disk_interface\": \"virtio\", + \"arch\": \"x86_64\", + \"console_type\": \"telnet\", + \"boot_priority\": \"d\", + \"kvm\": \"require\" + }, + \"images\": [ + { + \"filename\": \"${NAMEIMGFILE}\", + \"version\": \"${RELEASE}\", + \"md5sum\": \"${MD5SUMIMGFILE}\", + \"filesize\": ${LENIMGFILE} + } + ], + \"versions\": [ + { + \"name\": \"${RELEASE}\", + \"images\": { + \"hda_disk_image\": \"${NAMEIMGFILE}\" + } + } + ] +} + +" > ${GNS3APPNAME} + diff --git a/platform/vs/sonic-version.mk b/platform/vs/sonic-version.mk new file mode 100644 index 00000000000..9e21573227b --- /dev/null +++ b/platform/vs/sonic-version.mk @@ -0,0 +1,13 @@ +# sonic version yml file + +sonic_version=$(SONIC_GET_VERSION) +sonic_asic_platform=$(CONFIGURED_PLATFORM) + +export sonic_version +export sonic_asic_platform + +SONIC_VERSION = sonic_version.yml +$(SONIC_VERSION)_SRC_PATH = $(PLATFORM_PATH)/sonic-version +SONIC_MAKE_FILES += $(SONIC_VERSION) + +SONIC_PHONY_TARGETS += $(addprefix $(FILES_PATH)/, $(SONIC_VERSION)) diff --git a/platform/vs/sonic-version/Makefile b/platform/vs/sonic-version/Makefile new file mode 100644 index 00000000000..2b2386031c9 --- /dev/null +++ b/platform/vs/sonic-version/Makefile @@ -0,0 +1,10 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = sonic_version.yml + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + ./build_sonic_version.sh $(MAIN_TARGET) + + mv $(MAIN_TARGET) $(DEST)/ diff --git a/platform/vs/sonic-version/build_sonic_version.sh b/platform/vs/sonic-version/build_sonic_version.sh new file mode 100755 index 00000000000..f118a1c20a6 --- /dev/null +++ b/platform/vs/sonic-version/build_sonic_version.sh @@ -0,0 +1,8 @@ +tee $1 > /dev/null < + sonic + 2048000 + 2048000 + 1 + + /machine + + + hvm + + + + + + + + destroy + restart + restart + + /usr/bin/qemu-system-x86_64 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+ + + + + + + + diff --git a/platform/vs/syncd-vs.mk b/platform/vs/syncd-vs.mk new file mode 100644 index 00000000000..49035aaf958 --- /dev/null +++ b/platform/vs/syncd-vs.mk @@ -0,0 +1,13 @@ +$(LIBSAIREDIS)_DPKG_TARGET = binary-syncd-vs + +# inject libsaivs and libsaivs_dev to swss build dependency +$(SWSS)_DEPENDS += $(LIBSAIVS) $(LIBSAIVS_DEV) + +SYNCD_VS = syncd-vs_1.0.0_amd64.deb +$(SYNCD_VS)_RDEPENDS += $(LIBSAIREDIS) $(LIBSAIMETADATA) $(LIBSAIVS) +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(SYNCD_VS))) + +SYNCD_VS_DBG = syncd-vs-dbg_1.0.0_amd64.deb +$(SYNCD_VS_DBG)_DEPENDS += $(SYNCD_VS) +$(SYNCD_VS_DBG)_RDEPENDS += $(SYNCD_VS) +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(SYNCD_VS_DBG))) diff --git a/platform/vs/tests/README.md b/platform/vs/tests/README.md new file mode 100644 index 00000000000..29ba27db62f --- /dev/null +++ b/platform/vs/tests/README.md @@ -0,0 +1,4 @@ +Requirements: + +- Enable IPv6 for docker engine +- pip install exabgp diff --git a/platform/vs/tests/bgp/files/gr_livelock/bgpd.conf b/platform/vs/tests/bgp/files/gr_livelock/bgpd.conf new file mode 100644 index 00000000000..a26d1d93daf --- /dev/null +++ b/platform/vs/tests/bgp/files/gr_livelock/bgpd.conf @@ -0,0 +1,14 @@ +router bgp 65501 + bgp router-id 1.1.1.1 + bgp graceful-restart restart-time 180 + bgp graceful-restart + neighbor 10.0.0.1 remote-as 65502 + address-family ipv4 + neighbor 10.0.0.1 activate + maximum-paths 64 + exit-address-family + neighbor 10.0.0.3 remote-as 65503 + address-family ipv4 + neighbor 10.0.0.3 activate + maximum-paths 64 + exit-address-family diff --git a/platform/vs/tests/bgp/files/gr_livelock/exabgp1.conf b/platform/vs/tests/bgp/files/gr_livelock/exabgp1.conf new file mode 100644 index 00000000000..0e78bd61db4 --- /dev/null +++ b/platform/vs/tests/bgp/files/gr_livelock/exabgp1.conf @@ -0,0 +1,21 @@ +neighbor 10.0.0.0 { + router-id 1.1.1.2; + local-address 10.0.0.1; + local-as 65502; + peer-as 65501; + group-updates false; + + family{ + ipv4 unicast; + } + + static { + route 1.1.1.1/32{ + next-hop 10.0.0.1; + community no-export; + } + route 2.2.2.2/32{ + next-hop 10.0.0.1; + } + } +} diff --git a/platform/vs/tests/bgp/files/gr_livelock/exabgp1.graceful.conf b/platform/vs/tests/bgp/files/gr_livelock/exabgp1.graceful.conf new file mode 100644 index 00000000000..377ed024d09 --- /dev/null +++ b/platform/vs/tests/bgp/files/gr_livelock/exabgp1.graceful.conf @@ -0,0 +1,26 @@ +neighbor 10.0.0.0 { + router-id 1.1.1.2; + local-address 10.0.0.1; + local-as 65502; + peer-as 65501; + group-updates false; + manual-eor true; + + family{ + ipv4 unicast; + } + + capability { + graceful-restart 360; + } + + static { + route 1.1.1.1/32{ + next-hop 10.0.0.1; + community no-export; + } + route 2.2.2.2/32{ + next-hop 10.0.0.1; + } + } +} diff --git a/platform/vs/tests/bgp/files/gr_livelock/exabgp2.conf b/platform/vs/tests/bgp/files/gr_livelock/exabgp2.conf new file mode 100644 index 00000000000..3e67c18a82f --- /dev/null +++ b/platform/vs/tests/bgp/files/gr_livelock/exabgp2.conf @@ -0,0 +1,11 @@ +neighbor 10.0.0.2 { + router-id 1.1.1.3; + local-address 10.0.0.3; + local-as 65503; + peer-as 65501; + group-updates false; + + family { + ipv4 unicast; + } +} diff --git a/platform/vs/tests/bgp/files/invalid_nexthop/bgpd.conf b/platform/vs/tests/bgp/files/invalid_nexthop/bgpd.conf new file mode 100644 index 00000000000..b22bf17f92e --- /dev/null +++ b/platform/vs/tests/bgp/files/invalid_nexthop/bgpd.conf @@ -0,0 +1,7 @@ +router bgp 65501 + bgp router-id 1.1.1.1 + no bgp default ipv4-unicast + neighbor fc00::2 remote-as 65502 + address-family ipv6 + neighbor fc00::2 activate + exit-address-family diff --git a/platform/vs/tests/bgp/files/invalid_nexthop/invalid_nexthop.conf b/platform/vs/tests/bgp/files/invalid_nexthop/invalid_nexthop.conf new file mode 100644 index 00000000000..60a327d7121 --- /dev/null +++ b/platform/vs/tests/bgp/files/invalid_nexthop/invalid_nexthop.conf @@ -0,0 +1,19 @@ +neighbor fc00::1 { + router-id 1.2.3.4; + local-address fc00::2; + local-as 65502; + peer-as 65501; + group-updates false; + + family { + ipv4 unicast; + ipv6 unicast; + } + + static { + route 3333::0/64 { + next-hop 0.0.0.0; + next-hop fc00::2; + } + } +} diff --git a/platform/vs/tests/bgp/files/no_export/bgpd.conf b/platform/vs/tests/bgp/files/no_export/bgpd.conf new file mode 100644 index 00000000000..40322cedbc6 --- /dev/null +++ b/platform/vs/tests/bgp/files/no_export/bgpd.conf @@ -0,0 +1,13 @@ +router bgp 65501 + bgp router-id 1.1.1.1 + no bgp default ipv4-unicast + neighbor 10.0.0.1 remote-as 65502 + address-family ipv4 + neighbor 10.0.0.1 activate + maximum-paths 64 + exit-address-family + neighbor 10.0.0.3 remote-as 65503 + address-family ipv4 + neighbor 10.0.0.3 activate + maximum-paths 64 + exit-address-family diff --git a/platform/vs/tests/bgp/files/no_export/exabgp1.conf b/platform/vs/tests/bgp/files/no_export/exabgp1.conf new file mode 100644 index 00000000000..0e78bd61db4 --- /dev/null +++ b/platform/vs/tests/bgp/files/no_export/exabgp1.conf @@ -0,0 +1,21 @@ +neighbor 10.0.0.0 { + router-id 1.1.1.2; + local-address 10.0.0.1; + local-as 65502; + peer-as 65501; + group-updates false; + + family{ + ipv4 unicast; + } + + static { + route 1.1.1.1/32{ + next-hop 10.0.0.1; + community no-export; + } + route 2.2.2.2/32{ + next-hop 10.0.0.1; + } + } +} diff --git a/platform/vs/tests/bgp/files/no_export/exabgp2.conf b/platform/vs/tests/bgp/files/no_export/exabgp2.conf new file mode 100644 index 00000000000..3e67c18a82f --- /dev/null +++ b/platform/vs/tests/bgp/files/no_export/exabgp2.conf @@ -0,0 +1,11 @@ +neighbor 10.0.0.2 { + router-id 1.1.1.3; + local-address 10.0.0.3; + local-as 65503; + peer-as 65501; + group-updates false; + + family { + ipv4 unicast; + } +} diff --git a/platform/vs/tests/bgp/test_gr_livelock.py b/platform/vs/tests/bgp/test_gr_livelock.py new file mode 100644 index 00000000000..f269f1e8eee --- /dev/null +++ b/platform/vs/tests/bgp/test_gr_livelock.py @@ -0,0 +1,143 @@ +from swsscommon import swsscommon +import os +import re +import time +import json +import random + +def output(dvs, title): + print "=========================== %s ===========================" % title + exit_cod, sum_res = dvs.runcmd(["vtysh", "-c", "show ip bgp sum"]) + exit_code, all_route = dvs.runcmd(["vtysh", "-c", "show ip bgp"]) + exit_code, neig_1 = dvs.runcmd(["vtysh", "-c", "show ip bgp neighbors 10.0.0.1"]) + exit_code, announce_route_1 = dvs.runcmd(["vtysh", "-c", "show ip bgp neighbors 10.0.0.1 advertised-routes"]) + exit_code, received_route_1 = dvs.runcmd(["vtysh", "-c", "show ip bgp neighbors 10.0.0.1 routes"]) + exit_code, announce_route_3 = dvs.runcmd(["vtysh", "-c", "show ip bgp neighbors 10.0.0.3 advertised-routes"]) + exit_code, received_route_3 = dvs.runcmd(["vtysh", "-c", "show ip bgp neighbors 10.0.0.3 routes"]) + print "Summary:" + print sum_res + print "Received routes:" + print "10.0.0.1" + print received_route_1 + print "10.0.0.3" + print received_route_3 + print "Announces routes:" + print "10.0.0.1" + print announce_route_1 + print "10.0.0.3" + print announce_route_3 + print "Neighbors" + print "10.0.0.1" + print neig_1 + print "======================================================" + +def mkdir(path): + if not os.path.exists(path): + os.makedirs(path) + +def remove(path): + if os.path.exists(path): + os.unlink(path) + +def get_target_env(idx): + return '/usr/local/etc/exabgp/exabgp_%d.env' % idx + +def prepare_exa_env(dvs, idx): + mkdir('/usr/local/etc') + mkdir('/usr/local/etc/exabgp') + tmp_name = '/tmp/env.%d.%d' % (random.randint(0, 10000000), os.getpid()) + dvs.servers[idx].runcmd("exabgp --fi > %s" % tmp_name) + with open(tmp_name) as r_fp: + with open(get_target_env(idx), 'w') as w_fp: + for line in r_fp: + if line.startswith('pipename'): + line = "pipename = 'exabgp.%d'\n" % idx + w_fp.write(line) + os.unlink(tmp_name) + + +def run_exa(dvs, idx, cfg): + prepare_exa_env(dvs, idx) + run_dir = "/var/run/exabgp" + mkdir(run_dir) + fifo_in_path = "%s/exabgp.%d.in" % (run_dir, idx) + fifo_out_path = "%s/exabgp.%d.out" % (run_dir, idx) + remove(fifo_in_path) + remove(fifo_out_path) + os.mkfifo(fifo_in_path) + os.mkfifo(fifo_out_path) + os.chmod(fifo_in_path, 0666) + os.chmod(fifo_out_path, 0666) + print "!!! Start exabgp instance %d" % idx + cmd = "exabgp -d --env %s %s" % (get_target_env(idx), cfg) + print "Cmd is ___ %s ___" % cmd + return dvs.servers[idx].runcmd_async(cmd) + +def run_exacli(dvs, idx, cmd): + return dvs.servers[idx].runcmd('exabgpcli --env %s %s' % (get_target_env(idx), cmd)) + +def test_gr_livelock(dvs, testlog): + # update exabgp to version 4.0.10 + dvs.servers[0].runcmd("pip install 'exabgp==4.0.10' --force-reinstall ") + # + dvs.copy_file("/etc/frr/", "bgp/files/gr_livelock/bgpd.conf") + dvs.servers[0].runcmd("pkill exabgp") # In case previous test didn't stop exa + dvs.runcmd("supervisorctl stop bgpd") + time.sleep(5) + dvs.runcmd("supervisorctl start bgpd") + dvs.runcmd("ip addr add 10.0.0.0/31 dev Ethernet0") + dvs.runcmd("ifconfig Ethernet0 up") + + dvs.runcmd("ip addr add 10.0.0.2/31 dev Ethernet4") + dvs.runcmd("ifconfig Ethernet4 up") + + dvs.servers[0].runcmd("ip addr add 10.0.0.1/31 dev eth0") + dvs.servers[0].runcmd("ifconfig eth0 up") + + dvs.servers[1].runcmd("ip addr add 10.0.0.3/31 dev eth0") + dvs.servers[1].runcmd("ifconfig eth0 up") + + time.sleep(5) + + # Run two bgp neighbors + p1 = run_exa(dvs, 0, "bgp/files/gr_livelock/exabgp1.conf") + p2 = run_exa(dvs, 1, "bgp/files/gr_livelock/exabgp2.conf") + + time.sleep(30) + + output(dvs, "First neighbor doesn't have GR enabled") + + # Check that we announce routes from the 1st neigbbor to 2nd, if 1st neighbor doesn't support graceful restart + _, announced_routes = dvs.runcmd(["vtysh", "-c", "show ip bgp neighbors 10.0.0.3 advertised-routes"]) + assert '2.2.2.2/32' in announced_routes + + # Stop 1st neighbor + run_exacli(dvs, 0, 'shutdown') + p1 = p1.wait() + + # Wait until frr thinks that 1st neighbor was shut down + time.sleep(300) + + # Start the 1st neighbor again with graceful restart enabled + p1 = run_exa(dvs, 0, "bgp/files/gr_livelock/exabgp1.graceful.conf") + + time.sleep(60) + + output(dvs, "First neighbor has GR enalbed") + + run_exacli(dvs, 0, 'announce route 1.10.0.0/24 next-hop self') + + time.sleep(60) + + output(dvs, "Announced a new route from the first neighbor") + + # Check that we announce all routes from the 1st neighbor + _, announced_routes = dvs.runcmd(["vtysh", "-c", "show ip bgp neighbors 10.0.0.3 advertised-routes"]) + assert '2.2.2.2/32' in announced_routes + assert '1.10.0.0/24' in announced_routes + + run_exacli(dvs, 0, 'shutdown') + p1 = p1.wait() + + run_exacli(dvs, 1, 'shutdown') + p2 = p2.wait() diff --git a/platform/vs/tests/bgp/test_invalid_nexthop.py b/platform/vs/tests/bgp/test_invalid_nexthop.py new file mode 100644 index 00000000000..021e3bfea00 --- /dev/null +++ b/platform/vs/tests/bgp/test_invalid_nexthop.py @@ -0,0 +1,33 @@ +from swsscommon import swsscommon +import os +import re +import time +import json +import pytest + +def test_InvalidNexthop(dvs, testlog): + + dvs.copy_file("/etc/frr/", "bgp/files/invalid_nexthop/bgpd.conf") + dvs.runcmd("supervisorctl start bgpd") + dvs.runcmd("ip addr add fc00::1/126 dev Ethernet0") + dvs.runcmd("ifconfig Ethernet0 up") + + dvs.servers[0].runcmd("ip addr add fc00::2/126 dev eth0") + dvs.servers[0].runcmd("ifconfig eth0 up") + + time.sleep(5) + + print dvs.runcmd("supervisorctl status") + + p = dvs.servers[0].runcmd_async("exabgp -d bgp/files/invalid_nexthop/invalid_nexthop.conf") + + time.sleep(10) + + (exit_code, output) = dvs.runcmd(["vtysh", "-c", "show bgp ipv6"]) + + p.terminate() + p = p.wait() + + print exit_code, output + + assert "3333::/64" in output diff --git a/platform/vs/tests/bgp/test_no_export.py b/platform/vs/tests/bgp/test_no_export.py new file mode 100644 index 00000000000..efbc5331fef --- /dev/null +++ b/platform/vs/tests/bgp/test_no_export.py @@ -0,0 +1,45 @@ +from swsscommon import swsscommon +import os +import re +import time +import json + +def test_bounce(dvs, testlog): + dvs.servers[0].runcmd("pkill -f exabgp") + dvs.copy_file("/etc/frr/", "bgp/files/no_export/bgpd.conf") + dvs.runcmd("supervisorctl start bgpd") + dvs.runcmd("ip addr add 10.0.0.0/31 dev Ethernet0") + dvs.runcmd("ifconfig Ethernet0 up") + + dvs.runcmd("ip addr add 10.0.0.2/31 dev Ethernet4") + dvs.runcmd("ifconfig Ethernet4 up") + + dvs.servers[0].runcmd("ip addr add 10.0.0.1/31 dev eth0") + dvs.servers[0].runcmd("ifconfig eth0 up") + + dvs.servers[1].runcmd("ip addr add 10.0.0.3/31 dev eth0") + dvs.servers[1].runcmd("ifconfig eth0 up") + + time.sleep(5) + + p1 = dvs.servers[0].runcmd_async("exabgp -d bgp/files/no_export/exabgp1.conf") + p2 = dvs.servers[1].runcmd_async("exabgp -d bgp/files/no_export/exabgp2.conf") + + time.sleep(60) + + (exit_code, sum_res) = dvs.runcmd(["vtysh", "-c", "show ip bgp sum"]) + (exit_code, all_route) = dvs.runcmd(["vtysh", "-c", "show ip bgp"]) + (exit_code, announce_route) = dvs.runcmd(["vtysh", "-c", "show ip bgp neighbors 10.0.0.3 advertised-routes"]) + + p1.terminate() + p1 = p1.wait() + + p2.terminate() + p2 = p2.wait() + + print sum_res + print announce_route + assert "1.1.1.1/32" in all_route + assert "1.1.1.1/32" not in announce_route + assert "2.2.2.2/32" in all_route + assert "2.2.2.2/32" in announce_route diff --git a/platform/vs/tests/conftest.py b/platform/vs/tests/conftest.py new file mode 120000 index 00000000000..9fef6363db0 --- /dev/null +++ b/platform/vs/tests/conftest.py @@ -0,0 +1 @@ +../../../src/sonic-swss/tests/conftest.py \ No newline at end of file diff --git a/platform/vs/tests/teamd/test_portchannel.py b/platform/vs/tests/teamd/test_portchannel.py new file mode 100644 index 00000000000..0632bf874e5 --- /dev/null +++ b/platform/vs/tests/teamd/test_portchannel.py @@ -0,0 +1,37 @@ +from swsscommon import swsscommon +import time +import re +import json + +def test_PortChannel(dvs, testlog): + appldb = swsscommon.DBConnector(0, dvs.redis_sock, 0) + statdb = swsscommon.DBConnector(6, dvs.redis_sock, 0) + + # create the lag + dvs.runcmd("config portchannel add PortChannel0001") + time.sleep(1) + + # test lag table in appl db + tbl = swsscommon.Table(appldb, "LAG_TABLE") + (status, fvs) = tbl.get("PortChannel0001") + assert status == True + + # test lag table in state db + tbl = swsscommon.Table(statdb, "LAG_TABLE") + (status, fvs) = tbl.get("PortChannel0001") + assert status == True + + # create the lag member + dvs.runcmd("config portchannel member add PortChannel0001 Ethernet112") + time.sleep(1) + + # test lag member table in appl db + tbl = swsscommon.Table(appldb, "LAG_MEMBER_TABLE") + (status, fvs) = tbl.get("PortChannel0001:Ethernet112") + assert status == True + + # remove the lag member + dvs.runcmd("config portchannel member del PortChannel0001 Ethernet112") + + # remove the lag + dvs.runcmd("config portchannel del PortChannel0001") diff --git a/push_docker.sh b/push_docker.sh new file mode 100755 index 00000000000..3ba9abfae5b --- /dev/null +++ b/push_docker.sh @@ -0,0 +1,42 @@ +DOCKER_IMAGE_FILE=$1 +REGISTRY_SERVER=$2 +REGISTRY_PORT=$3 +REGISTRY_USERNAME=$4 +REGISTRY_PASSWD=$5 +DOCKER_IMAGE_TAG=$6 + +set -e +docker load < $DOCKER_IMAGE_FILE + +## Fetch the Jenkins build number if inside it +[ ${BUILD_NUMBER} ] || { + echo "No BUILD_NUMBER found, setting to 0." + BUILD_NUMBER="0" +} + +## Prepare tag +docker_image_name=$(basename $DOCKER_IMAGE_FILE | cut -d. -f1) +remote_image_name=$REGISTRY_SERVER:$REGISTRY_PORT/$docker_image_name:$DOCKER_IMAGE_TAG +timestamp="$(date -u +%Y%m%d)" +build_version="${timestamp}.bld-${BUILD_NUMBER}" +build_remote_image_name=$REGISTRY_SERVER:$REGISTRY_PORT/$docker_image_name:$build_version + +## Add registry information as tag, so will push as latest +## Add additional tag with build information +docker tag $docker_image_name $remote_image_name +docker tag $docker_image_name $build_remote_image_name + +## Login the docker image registry server +## Note: user name and password are passed from command line +docker login -u $REGISTRY_USERNAME -p "$REGISTRY_PASSWD" $REGISTRY_SERVER:$REGISTRY_PORT + +## Push image to registry server +## And get the image digest SHA256 +echo "Pushing $remote_image_name" +image_sha=$(docker push $remote_image_name | sed -n "s/.*: digest: sha256:\([0-9a-f]*\).*/\\1/p") +docker rmi $remote_image_name || true +echo "Image sha256: $image_sha" +echo "Pushing $build_remote_image_name" +docker push $build_remote_image_name +docker rmi $build_remote_image_name || true +docker rmi $docker_image_name || true diff --git a/rules/asyncsnmp-py3.mk b/rules/asyncsnmp-py3.mk new file mode 100644 index 00000000000..cc0af244d85 --- /dev/null +++ b/rules/asyncsnmp-py3.mk @@ -0,0 +1,8 @@ +# asyncsnmp python2 wheel + +ASYNCSNMP_PY3 = asyncsnmp-2.1.0-py3-none-any.whl +$(ASYNCSNMP_PY3)_SRC_PATH = $(SRC_PATH)/sonic-snmpagent +$(ASYNCSNMP_PY3)_PYTHON_VERSION = 3 +# Depends on sonic-platform-common so it is possible to import sonic_psu +$(ASYNCSNMP_PY3)_DEPENDS += $(SWSSSDK_PY3) $(SONIC_PLATFORM_COMMON_PY3) +SONIC_PYTHON_WHEELS += $(ASYNCSNMP_PY3) diff --git a/rules/bash.mk b/rules/bash.mk new file mode 100644 index 00000000000..9c0d0c1e86d --- /dev/null +++ b/rules/bash.mk @@ -0,0 +1,17 @@ +# bash package +# +# Created to patch memory-leak issue in the bash-package included in Debian-8 (Jessie) +# release. This rule file, and the associated building-infra created to solve this +# bug (src/bash/), should be eliminated once the migration to Debian-9 (Stretch) is +# completed. + +# Bash major release-number corresponding to Debian-8 (Jessie) +BASH_VERSION_MAJOR = 4.3 +# Bash complete release-number. This image contains all 4.3 fixes up to patch '42'. +BASH_VERSION_FULL = $(BASH_VERSION_MAJOR)-14 + +export BASH_VERSION_MAJOR BASH_VERSION_FULL + +BASH = bash_$(BASH_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(BASH)_SRC_PATH = $(SRC_PATH)/bash +SONIC_MAKE_DEBS += $(BASH) diff --git a/rules/config b/rules/config new file mode 100644 index 00000000000..04af59ccd81 --- /dev/null +++ b/rules/config @@ -0,0 +1,100 @@ +############################################################################### +## Configuration parameters for SONiC build system +############################################################################### + +# SONIC_CONFIG_PRINT_DEPENDENCIES - show dependencies for each invoked target. +# Before executing rule for each target its dependencies are printed to console. +# Uncomment next line to enable: +# SONIC_CONFIG_PRINT_DEPENDENCIES = y + +# SONIC_CONFIG_BUILD_JOBS - set number of jobs for parallel build. +# Corresponding -j argument will be passed to make command inside docker +# container. +SONIC_CONFIG_BUILD_JOBS = 1 + +# SONIC_CONFIG_MAKE_JOBS - set number of parallel make jobs per package. +# Corresponding -j argument will be passed to make/dpkg commands that build separate packages +SONIC_CONFIG_MAKE_JOBS = $(shell nproc) + +# SONIC_USE_DOCKER_BUILDKIT - use docker buildkit for build. +# If set to y SONiC build system will set environment variable DOCKER_BUILDKIT=1 +# to enable docker buildkit. +# This options will speed up docker image build time. +# NOTE: SONIC_USE_DOCKER_BUILDKIT will produce larger installable SONiC image +# because of a docker bug (more details: https://github.com/moby/moby/issues/38903) +# SONIC_USE_DOCKER_BUILDKIT = y + +# SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD - use native dockerd for build. +# If set to y SONiC build container will use native dockerd instead of dind for faster build +# SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD = y + +# SONIC_CONFIG_ENABLE_COLORS - enable colored output in build system. +# Comment next line to disable: +# SONIC_CONFIG_ENABLE_COLORS = y + +# DEFAULT_USERNAME - default username for installer build +DEFAULT_USERNAME = admin + +# DEFAULT_PASSWORD - default password for installer build +DEFAULT_PASSWORD = YourPaSsWoRd + +# ENABLE_DHCP_GRAPH_SERVICE - specify the source of minigraph to generate configuration file. +# If set to y SONiC will get the minigraph from graph service. Graph service URL need to be +# passed through DHCP option 225. +# If not set (default behavior) the default minigraph built into the image will be used. +# ENABLE_DHCP_GRAPH_SERVICE = y + +# SHUTDOWN_BGP_ON_START - if set to y all bgp sessions will be in admin down state when +# bgp service starts. +# SHUTDOWN_BGP_ON_START = y + +# ENABLE_PFCWD_ON_START - if set to y PFC Watchdog (PFCWD) will be enabled all server-facing ports +# by default for TOR switch +# ENABLE_PFCWD_ON_START = y + +# INSTALL_DEBUG_TOOLS - installs debugging tools in baseline docker +# Uncomment next line to enable: +# INSTALL_DEBUG_TOOLS = y + +# SONIC_ROUTING_STACK - specify the routing-stack being elected to drive SONiC's control-plane. +# Supported routing stacks on SONiC are: +# routing-stacks: quagga, frr. +SONIC_ROUTING_STACK = frr + +# ENABLE_SYNCD_RPC - build docker-syncd with rpc packages for testing purposes. +# Uncomment to enable: +# ENABLE_SYNCD_RPC = y + +# Enable Origanization Extensions - Specific to the deployment scenarios of the Organization +ENABLE_ORGANIZATION_EXTENSIONS = y + +# Debugging option allows sonic debian packages to get built including symbols +# information. Profiling option, disables compiler optimizations (-O0) as well +# as includes symbols information. Given that 'profiling' option is a superset +# of 'debugging' one, user should only enable either one option or the other -- +# if both options are enabled, the 'profiling' one will prevail. +#SONIC_DEBUGGING_ON = y +#SONIC_PROFILING_ON = y + +# ENABLE_SYSTEM_TELEMETRY - build docker-sonic-telemetry for system telemetry support +ENABLE_SYSTEM_TELEMETRY = y + +# DEFAULT_KERNEL_PROCURE_METHOD - default method for obtaining kernel +# build: build kernel from source +# download: download pre-built kernel from Azure storage. +DEFAULT_KERNEL_PROCURE_METHOD = build + +# FRR user and group id values. These only take effect when SONIC_ROUTING_STACK is frr. +# Note: these values match the admin uid/gid of the host's admin account. If these values +# change and user doesn't want the frr uid/gid to potentially match a random user on the +# host, then either the appropriate account and group will need to be created on the host +# manually or changes need to be made when the image is built to create the account and +# group during installation. +FRR_USER_UID = 300 +FRR_USER_GID = 300 + +# Default VS build memory preparation +DEFAULT_VS_PREPARE_MEM = yes + +# ENABLE_SYSTEM_SFLOW - build docker-sonic-sflow for sFlow support +ENABLE_SFLOW = y diff --git a/rules/dbsyncd-py2.mk b/rules/dbsyncd-py2.mk new file mode 100644 index 00000000000..220dc5fe7a1 --- /dev/null +++ b/rules/dbsyncd-py2.mk @@ -0,0 +1,7 @@ +# sonic-dbsyncd python2 wheel + +DBSYNCD_PY2 = sonic_d-2.0.0-py2-none-any.whl +$(DBSYNCD_PY2)_SRC_PATH = $(SRC_PATH)/sonic-dbsyncd +$(DBSYNCD_PY2)_PYTHON_VERSION = 2 +$(DBSYNCD_PY2)_DEPENDS += $(SWSSSDK_PY2) +SONIC_PYTHON_WHEELS += $(DBSYNCD_PY2) diff --git a/rules/docker-base-stretch.mk b/rules/docker-base-stretch.mk new file mode 100644 index 00000000000..55b7fd9f866 --- /dev/null +++ b/rules/docker-base-stretch.mk @@ -0,0 +1,17 @@ +# Docker base image (based on Debian Stretch) + +DOCKER_BASE_STRETCH = docker-base-stretch.gz +$(DOCKER_BASE_STRETCH)_PATH = $(DOCKERS_PATH)/docker-base-stretch +$(DOCKER_BASE_STRETCH)_DEPENDS += $(SUPERVISOR) +$(DOCKER_BASE_STRETCH)_DEPENDS += $(SOCAT) + +GDB = gdb +GDBSERVER = gdbserver +VIM = vim +OPENSSH = openssh-client +SSHPASS = sshpass +STRACE = strace +$(DOCKER_BASE_STRETCH)_DBG_IMAGE_PACKAGES += $(GDB) $(GDBSERVER) $(VIM) $(OPENSSH) $(SSHPASS) $(STRACE) + +SONIC_DOCKER_IMAGES += $(DOCKER_BASE_STRETCH) +SONIC_STRETCH_DOCKERS += $(DOCKER_BASE_STRETCH) diff --git a/rules/docker-base.mk b/rules/docker-base.mk new file mode 100644 index 00000000000..2d0653fc8f7 --- /dev/null +++ b/rules/docker-base.mk @@ -0,0 +1,19 @@ +# docker base image + +DOCKER_BASE = docker-base.gz +$(DOCKER_BASE)_PATH = $(DOCKERS_PATH)/docker-base +$(DOCKER_BASE)_DEPENDS += $(SUPERVISOR) +$(DOCKER_BASE)_DEPENDS += $(BASH) +$(DOCKER_BASE)_DEPENDS += $(SOCAT) + +ifeq ($(INSTALL_DEBUG_TOOLS),y) +GDB = gdb +GDBSERVER = gdbserver +VIM = vim +OPENSSH = openssh-client +SSHPASS = sshpass +STRACE = strace +$(DOCKER_BASE)_DBG_PACKAGES += $(GDB) $(GDBSERVER) $(VIM) $(OPENSSH) $(SSHPASS) $(STRACE) +endif + +SONIC_DOCKER_IMAGES += $(DOCKER_BASE) diff --git a/rules/docker-config-engine-stretch.mk b/rules/docker-config-engine-stretch.mk new file mode 100644 index 00000000000..2a1e36d2883 --- /dev/null +++ b/rules/docker-config-engine-stretch.mk @@ -0,0 +1,13 @@ +# docker image for sonic config engine + +DOCKER_CONFIG_ENGINE_STRETCH = docker-config-engine-stretch.gz +$(DOCKER_CONFIG_ENGINE_STRETCH)_PATH = $(DOCKERS_PATH)/docker-config-engine-stretch +$(DOCKER_CONFIG_ENGINE_STRETCH)_PYTHON_WHEELS += $(SWSSSDK_PY2) +$(DOCKER_CONFIG_ENGINE_STRETCH)_PYTHON_WHEELS += $(SONIC_CONFIG_ENGINE) +$(DOCKER_CONFIG_ENGINE_STRETCH)_LOAD_DOCKERS += $(DOCKER_BASE_STRETCH) + +$(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_DEPENDS = $($(DOCKER_BASE_STRETCH)_DBG_DEPENDS) +$(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_IMAGE_PACKAGES = $($(DOCKER_BASE_STRETCH)_DBG_IMAGE_PACKAGES) + +SONIC_DOCKER_IMAGES += $(DOCKER_CONFIG_ENGINE_STRETCH) +SONIC_STRETCH_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) diff --git a/rules/docker-config-engine.mk b/rules/docker-config-engine.mk new file mode 100644 index 00000000000..f540bb66f35 --- /dev/null +++ b/rules/docker-config-engine.mk @@ -0,0 +1,8 @@ +# docker image for sonic config engine + +DOCKER_CONFIG_ENGINE = docker-config-engine.gz +$(DOCKER_CONFIG_ENGINE)_PATH = $(DOCKERS_PATH)/docker-config-engine +$(DOCKER_CONFIG_ENGINE)_PYTHON_WHEELS += $(SWSSSDK_PY2) +$(DOCKER_CONFIG_ENGINE)_PYTHON_WHEELS += $(SONIC_CONFIG_ENGINE) +$(DOCKER_CONFIG_ENGINE)_LOAD_DOCKERS += $(DOCKER_BASE) +SONIC_DOCKER_IMAGES += $(DOCKER_CONFIG_ENGINE) diff --git a/rules/docker-database.mk b/rules/docker-database.mk new file mode 100644 index 00000000000..43dc2ed5d44 --- /dev/null +++ b/rules/docker-database.mk @@ -0,0 +1,29 @@ +# docker image for database + +DOCKER_DATABASE_STEM = docker-database +DOCKER_DATABASE = $(DOCKER_DATABASE_STEM).gz +DOCKER_DATABASE_DBG = $(DOCKER_DATABASE_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_DATABASE)_PATH = $(DOCKERS_PATH)/$(DOCKER_DATABASE_STEM) + +$(DOCKER_DATABASE)_DEPENDS += $(REDIS_TOOLS) $(REDIS_SERVER) +$(DOCKER_DATABASE)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_DEPENDS) +$(DOCKER_DATABASE)_DBG_DEPENDS += $(REDIS_TOOLS_DBG) + +$(DOCKER_DATABASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_IMAGE_PACKAGES) + +$(DOCKER_DATABASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) + +SONIC_DOCKER_IMAGES += $(DOCKER_DATABASE) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_DATABASE) +SONIC_STRETCH_DOCKERS += $(DOCKER_DATABASE) + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_DATABASE_DBG) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_DATABASE_DBG) +SONIC_STRETCH_DBG_DOCKERS += $(DOCKER_DATABASE_DBG) + +$(DOCKER_DATABASE)_CONTAINER_NAME = database +$(DOCKER_DATABASE)_RUN_OPT += --net=host --privileged -t +$(DOCKER_DATABASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro + +$(DOCKER_DATABASE)_BASE_IMAGE_FILES += redis-cli:/usr/bin/redis-cli diff --git a/rules/docker-dhcp-relay.mk b/rules/docker-dhcp-relay.mk new file mode 100644 index 00000000000..5aae24ee33b --- /dev/null +++ b/rules/docker-dhcp-relay.mk @@ -0,0 +1,28 @@ +# Docker image for DHCP relay + +DOCKER_DHCP_RELAY_STEM = docker-dhcp-relay +DOCKER_DHCP_RELAY = $(DOCKER_DHCP_RELAY_STEM).gz +DOCKER_DHCP_RELAY_DBG = $(DOCKER_DHCP_RELAY_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_DHCP_RELAY)_PATH = $(DOCKERS_PATH)/$(DOCKER_DHCP_RELAY_STEM) + +$(DOCKER_DHCP_RELAY)_DEPENDS += $(ISC_DHCP_RELAY) $(REDIS_TOOLS) +$(DOCKER_DHCP_RELAY)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_DEPENDS) +$(DOCKER_DHCP_RELAY)_DBG_DEPENDS += $(ISC_DHCP_RELAY_DBG) + +$(DOCKER_DHCP_RELAY)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_IMAGE_PACKAGES) + +$(DOCKER_DHCP_RELAY)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_STRETCH) + +SONIC_DOCKER_IMAGES += $(DOCKER_DHCP_RELAY) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_DHCP_RELAY) +SONIC_STRETCH_DOCKERS += $(DOCKER_DHCP_RELAY) + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_DHCP_RELAY_DBG) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_DHCP_RELAY_DBG) +SONIC_STRETCH_DBG_DOCKERS += $(DOCKER_DHCP_RELAY_DBG) + +$(DOCKER_DHCP_RELAY)_CONTAINER_NAME = dhcp_relay +$(DOCKER_DHCP_RELAY)_RUN_OPT += --net=host --privileged -t +$(DOCKER_DHCP_RELAY)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_DHCP_RELAY)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-fpm-frr.mk b/rules/docker-fpm-frr.mk new file mode 100644 index 00000000000..1d158effe7f --- /dev/null +++ b/rules/docker-fpm-frr.mk @@ -0,0 +1,32 @@ +# docker image for fpm-frr + +DOCKER_FPM_FRR_STEM = docker-fpm-frr +DOCKER_FPM_FRR = $(DOCKER_FPM_FRR_STEM).gz +DOCKER_FPM_FRR_DBG = $(DOCKER_FPM_FRR_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_FPM_FRR)_PATH = $(DOCKERS_PATH)/$(DOCKER_FPM_FRR_STEM) + +$(DOCKER_FPM_FRR)_DEPENDS += $(FRR) $(FRR_SNMP) $(SWSS) $(LIBYANG) +$(DOCKER_FPM_FRR)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_DEPENDS) +$(DOCKER_FPM_FRR)_DBG_DEPENDS += $(SWSS_DBG) $(LIBSWSSCOMMON_DBG) \ + $(FRR_DBG) $(FRR_SNMP_DBG) $(LIBYANG_DBG) + +$(DOCKER_FPM_FRR)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_IMAGE_PACKAGES) + +$(DOCKER_FPM_FRR)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) + +SONIC_DOCKER_IMAGES += $(DOCKER_FPM_FRR) +SONIC_STRETCH_DOCKERS += $(DOCKER_FPM_FRR) + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_FPM_FRR_DBG) +SONIC_STRETCH_DBG_DOCKERS += $(DOCKER_FPM_FRR_DBG) + +$(DOCKER_FPM_FRR)_CONTAINER_NAME = bgp +$(DOCKER_FPM_FRR)_RUN_OPT += --net=host --privileged -t +$(DOCKER_FPM_FRR)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_FPM_FRR)_RUN_OPT += -v /etc/sonic/frr:/etc/frr:rw + +$(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += vtysh:/usr/bin/vtysh +$(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += TSA:/usr/bin/TSA +$(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += TSB:/usr/bin/TSB +$(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += TSC:/usr/bin/TSC diff --git a/rules/docker-fpm-gobgp.mk b/rules/docker-fpm-gobgp.mk new file mode 100644 index 00000000000..12fa37dc1d9 --- /dev/null +++ b/rules/docker-fpm-gobgp.mk @@ -0,0 +1,11 @@ +# docker image for fpm-gobgp + +DOCKER_FPM_GOBGP = docker-fpm-gobgp.gz +$(DOCKER_FPM_GOBGP)_PATH = $(DOCKERS_PATH)/docker-fpm-gobgp +$(DOCKER_FPM_GOBGP)_DEPENDS += $(GOBGP) +$(DOCKER_FPM_GOBGP)_LOAD_DOCKERS += $(DOCKER_FPM_QUAGGA) +SONIC_DOCKER_IMAGES += $(DOCKER_FPM_GOBGP) + +$(DOCKER_FPM_GOBGP)_CONTAINER_NAME = bgp +$(DOCKER_FPM_GOBGP)_RUN_OPT += --net=host --privileged -t +$(DOCKER_FPM_GOBGP)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro diff --git a/rules/docker-fpm-quagga.mk b/rules/docker-fpm-quagga.mk new file mode 100644 index 00000000000..a9c0511ba17 --- /dev/null +++ b/rules/docker-fpm-quagga.mk @@ -0,0 +1,13 @@ +# docker image for fpm-quagga + +DOCKER_FPM_QUAGGA = docker-fpm-quagga.gz +$(DOCKER_FPM_QUAGGA)_PATH = $(DOCKERS_PATH)/docker-fpm-quagga +$(DOCKER_FPM_QUAGGA)_DEPENDS += $(QUAGGA) $(SWSS) +$(DOCKER_FPM_QUAGGA)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE) +SONIC_DOCKER_IMAGES += $(DOCKER_FPM_QUAGGA) + +$(DOCKER_FPM_QUAGGA)_CONTAINER_NAME = bgp +$(DOCKER_FPM_QUAGGA)_RUN_OPT += --net=host --privileged -t +$(DOCKER_FPM_QUAGGA)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro + +$(DOCKER_FPM_QUAGGA)_BASE_IMAGE_FILES += vtysh:/usr/bin/vtysh diff --git a/rules/docker-fpm.mk b/rules/docker-fpm.mk new file mode 100644 index 00000000000..72d89999c47 --- /dev/null +++ b/rules/docker-fpm.mk @@ -0,0 +1,10 @@ +# Docker-fpm rule-file is simply a wrapper containing routing-stack selection logic. + +ifeq ($(SONIC_ROUTING_STACK), quagga) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_FPM_QUAGGA) +else ifeq ($(SONIC_ROUTING_STACK), frr) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_FPM_FRR) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_FPM_FRR_DBG) +else +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_FPM_GOBGP) +endif diff --git a/rules/docker-lldp-sv2.mk b/rules/docker-lldp-sv2.mk new file mode 100644 index 00000000000..91acbe58ad8 --- /dev/null +++ b/rules/docker-lldp-sv2.mk @@ -0,0 +1,33 @@ +# docker image for lldp agent + +DOCKER_LLDP_SV2_STEM = docker-lldp-sv2 +DOCKER_LLDP_SV2 = $(DOCKER_LLDP_SV2_STEM).gz +DOCKER_LLDP_SV2_DBG = $(DOCKER_LLDP_SV2_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_LLDP_SV2)_PATH = $(DOCKERS_PATH)/docker-lldp-sv2 + +$(DOCKER_LLDP_SV2)_DEPENDS += $(LLDPD) $(LIBSWSSCOMMON) $(PYTHON_SWSSCOMMON) + +$(DOCKER_LLDP_SV2)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_DEPENDS) +$(DOCKER_LLDP_SV2)_DBG_DEPENDS += $(LLDPD_DBG) $(LIBSWSSCOMMON_DBG) + +$(DOCKER_LLDP_SV2)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_IMAGE_PACKAGES) + +$(DOCKER_LLDP_SV2)_PYTHON_WHEELS += $(DBSYNCD_PY2) +$(DOCKER_LLDP_SV2)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) + +SONIC_DOCKER_IMAGES += $(DOCKER_LLDP_SV2) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_LLDP_SV2) +SONIC_STRETCH_DOCKERS += $(DOCKER_LLDP_SV2) + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_LLDP_SV2_DBG) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_LLDP_SV2_DBG) +SONIC_STRETCH_DBG_DOCKERS += $(DOCKER_LLDP_SV2_DBG) + +$(DOCKER_LLDP_SV2)_CONTAINER_NAME = lldp +$(DOCKER_LLDP_SV2)_RUN_OPT += --net=host --privileged -t +$(DOCKER_LLDP_SV2)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro + +$(DOCKER_LLDP_SV2)_BASE_IMAGE_FILES += lldpctl:/usr/bin/lldpctl +$(DOCKER_LLDP_SV2)_BASE_IMAGE_FILES += lldpcli:/usr/bin/lldpcli +$(DOCKER_LLDP_SV2)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-orchagent.mk b/rules/docker-orchagent.mk new file mode 100644 index 00000000000..20536adc252 --- /dev/null +++ b/rules/docker-orchagent.mk @@ -0,0 +1,37 @@ +# docker image for orchagent + +DOCKER_ORCHAGENT_STEM = docker-orchagent +DOCKER_ORCHAGENT = $(DOCKER_ORCHAGENT_STEM).gz +DOCKER_ORCHAGENT_DBG = $(DOCKER_ORCHAGENT_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_ORCHAGENT)_DEPENDS += $(SWSS) $(REDIS_TOOLS) + +$(DOCKER_ORCHAGENT)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_DEPENDS) +$(DOCKER_ORCHAGENT)_DBG_DEPENDS += $(SWSS_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIREDIS_DBG) + +$(DOCKER_ORCHAGENT)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_IMAGE_PACKAGES) + +$(DOCKER_ORCHAGENT)_PATH = $(DOCKERS_PATH)/$(DOCKER_ORCHAGENT_STEM) + +$(DOCKER_ORCHAGENT)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) + +SONIC_DOCKER_IMAGES += $(DOCKER_ORCHAGENT) +SONIC_STRETCH_DOCKERS += $(DOCKER_ORCHAGENT) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_ORCHAGENT) + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_ORCHAGENT_DBG) +SONIC_STRETCH_DBG_DOCKERS += $(DOCKER_ORCHAGENT_DBG) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_ORCHAGENT_DBG) + +$(DOCKER_ORCHAGENT)_CONTAINER_NAME = swss +$(DOCKER_ORCHAGENT)_RUN_OPT += --net=host --privileged -t +$(DOCKER_ORCHAGENT)_RUN_OPT += -v /etc/network/interfaces:/etc/network/interfaces:ro +$(DOCKER_ORCHAGENT)_RUN_OPT += -v /etc/network/interfaces.d/:/etc/network/interfaces.d/:ro +$(DOCKER_ORCHAGENT)_RUN_OPT += -v /host/machine.conf:/host/machine.conf:ro +$(DOCKER_ORCHAGENT)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_ORCHAGENT)_RUN_OPT += -v /var/log/swss:/var/log/swss:rw + +$(DOCKER_ORCHAGENT)_BASE_IMAGE_FILES += swssloglevel:/usr/bin/swssloglevel +$(DOCKER_ORCHAGENT)_FILES += $(ARP_UPDATE_SCRIPT) $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-platform-monitor.mk b/rules/docker-platform-monitor.mk new file mode 100644 index 00000000000..7a319e4bf12 --- /dev/null +++ b/rules/docker-platform-monitor.mk @@ -0,0 +1,47 @@ +# Docker image for SONiC platform monitoring tools + +DOCKER_PLATFORM_MONITOR_STEM = docker-platform-monitor +DOCKER_PLATFORM_MONITOR = $(DOCKER_PLATFORM_MONITOR_STEM).gz +DOCKER_PLATFORM_MONITOR_DBG = $(DOCKER_PLATFORM_MONITOR_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_PLATFORM_MONITOR)_PATH = $(DOCKERS_PATH)/$(DOCKER_PLATFORM_MONITOR_STEM) + +$(DOCKER_PLATFORM_MONITOR)_DEPENDS += $(LIBSENSORS) $(LM_SENSORS) $(FANCONTROL) $(SENSORD) $(LIBSWSSCOMMON) $(PYTHON_SWSSCOMMON) $(SMARTMONTOOLS) +ifeq ($(CONFIGURED_PLATFORM),barefoot) +$(DOCKER_PLATFORM_MONITOR)_DEPENDS += $(PYTHON_THRIFT) +endif +$(DOCKER_PLATFORM_MONITOR)_PYTHON_DEBS += $(SONIC_LEDD) $(SONIC_XCVRD) $(SONIC_PSUD) $(SONIC_SYSEEPROMD) +$(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_PLATFORM_COMMON_PY2) +$(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SWSSSDK_PY2) +$(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_PLATFORM_API_PY2) +$(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_DAEMON_BASE_PY2) + +$(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_DEPENDS) +$(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS += $(LIBSWSSCOMMON_DBG) $(LIBSENSORS_DBG) +$(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS += $(LM_SENSORS_DBG) $(SENSORD_DBG) + +$(DOCKER_PLATFORM_MONITOR)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_IMAGE_PACKAGES) + +$(DOCKER_PLATFORM_MONITOR)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_STRETCH) + +SONIC_STRETCH_DOCKERS += $(DOCKER_PLATFORM_MONITOR) +SONIC_DOCKER_IMAGES += $(DOCKER_PLATFORM_MONITOR) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_PLATFORM_MONITOR) + +SONIC_STRETCH_DBG_DOCKERS += $(DOCKER_PLATFORM_MONITOR_DBG) +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_PLATFORM_MONITOR_DBG) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_PLATFORM_MONITOR_DBG) + +$(DOCKER_PLATFORM_MONITOR)_CONTAINER_NAME = pmon +$(DOCKER_PLATFORM_MONITOR)_RUN_OPT += --net=host --privileged -t +$(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro + +# Mount Arista python library on Aboot images to be used by plugins +$(DOCKER_PLATFORM_MONITOR)_aboot_RUN_OPT += -v /usr/lib/python2.7/dist-packages/arista:/usr/lib/python2.7/dist-packages/arista:ro +$(DOCKER_PLATFORM_MONITOR)_aboot_RUN_OPT += -v /usr/lib/python2.7/dist-packages/arista/utils/sonic_platform:/usr/lib/python2.7/dist-packages/sonic_platform:ro + +$(DOCKER_PLATFORM_MONITOR)_BASE_IMAGE_FILES += cmd_wrapper:/usr/bin/sensors +$(DOCKER_PLATFORM_MONITOR)_BASE_IMAGE_FILES += cmd_wrapper:/usr/sbin/smartctl +$(DOCKER_PLATFORM_MONITOR)_BASE_IMAGE_FILES += cmd_wrapper:/usr/sbin/iSmart +$(DOCKER_PLATFORM_MONITOR)_BASE_IMAGE_FILES += cmd_wrapper:/usr/sbin/SmartCmd +$(DOCKER_PLATFORM_MONITOR)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-ptf.mk b/rules/docker-ptf.mk new file mode 100644 index 00000000000..2782c45339b --- /dev/null +++ b/rules/docker-ptf.mk @@ -0,0 +1,6 @@ +# docker image for ptf + +DOCKER_PTF = docker-ptf.gz +$(DOCKER_PTF)_PATH = $(DOCKERS_PATH)/docker-ptf +$(DOCKER_PTF)_DEPENDS += $(LIBTHRIFT) $(PYTHON_THRIFT) $(PTF) +SONIC_DOCKER_IMAGES += $(DOCKER_PTF) diff --git a/rules/docker-router-advertiser.mk b/rules/docker-router-advertiser.mk new file mode 100644 index 00000000000..53e0d7600ec --- /dev/null +++ b/rules/docker-router-advertiser.mk @@ -0,0 +1,28 @@ +# Docker image for router advertiser + +DOCKER_ROUTER_ADVERTISER_STEM = docker-router-advertiser +DOCKER_ROUTER_ADVERTISER = $(DOCKER_ROUTER_ADVERTISER_STEM).gz +DOCKER_ROUTER_ADVERTISER_DBG = $(DOCKER_ROUTER_ADVERTISER_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_ROUTER_ADVERTISER)_PATH = $(DOCKERS_PATH)/$(DOCKER_ROUTER_ADVERTISER_STEM) + +$(DOCKER_ROUTER_ADVERTISER)_DEPENDS += $(RADVD) $(REDIS_TOOLS) +$(DOCKER_ROUTER_ADVERTISER)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_DEPENDS) +$(DOCKER_ROUTER_ADVERTISER)_DBG_DEPENDS += $(RADVD_DBG) + +$(DOCKER_ROUTER_ADVERTISER)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_IMAGE_PACKAGES) + +$(DOCKER_ROUTER_ADVERTISER)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_STRETCH) + +SONIC_DOCKER_IMAGES += $(DOCKER_ROUTER_ADVERTISER) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_ROUTER_ADVERTISER) +SONIC_STRETCH_DOCKERS += $(DOCKER_ROUTER_ADVERTISER) + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_ROUTER_ADVERTISER_DBG) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_ROUTER_ADVERTISER_DBG) +SONIC_STRETCH_DBG_DOCKERS += $(DOCKER_ROUTER_ADVERTISER_DBG) + +$(DOCKER_ROUTER_ADVERTISER)_CONTAINER_NAME = radv +$(DOCKER_ROUTER_ADVERTISER)_RUN_OPT += --net=host --privileged -t +$(DOCKER_ROUTER_ADVERTISER)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_ROUTER_ADVERTISER)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-sflow.mk b/rules/docker-sflow.mk new file mode 100644 index 00000000000..94b56848188 --- /dev/null +++ b/rules/docker-sflow.mk @@ -0,0 +1,35 @@ +# docker image for sFlow agent + +DOCKER_SFLOW_STEM = docker-sflow +DOCKER_SFLOW = $(DOCKER_SFLOW_STEM).gz +DOCKER_SFLOW_DBG = $(DOCKER_SFLOW_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_SFLOW)_PATH = $(DOCKERS_PATH)/$(DOCKER_SFLOW_STEM) + +$(DOCKER_SFLOW)_DEPENDS += $(SWSS) $(REDIS_TOOLS) $(HSFLOWD) $(SFLOWTOOL) $(PSAMPLE) +$(DOCKER_SFLOW)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_DEPENDS) +$(DOCKER_TEAMD)_DBG_DEPENDS += $(SWSS_DBG) $(LIBSWSSCOMMON_DBG) +$(DOCKER_SFLOW)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_IMAGE_PACKAGES) + +$(DOCKER_SFLOW)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) + +SONIC_DOCKER_IMAGES += $(DOCKER_SFLOW) +ifeq ($(ENABLE_SFLOW), y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SFLOW) +SONIC_STRETCH_DOCKERS += $(DOCKER_SFLOW) +endif + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_SFLOW_DBG) +ifeq ($(ENABLE_SFLOW), y) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_SFLOW_DBG) +SONIC_STRETCH_DBG_DOCKERS += $(DOCKER_SFLOW_DBG) +endif + +$(DOCKER_SFLOW)_CONTAINER_NAME = sflow +$(DOCKER_SFLOW)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SFLOW)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SFLOW)_RUN_OPT += -v /host/warmboot:/var/warmboot + +$(DOCKER_SFLOW)_BASE_IMAGE_FILES += psample:/usr/bin/psample +$(DOCKER_SFLOW)_BASE_IMAGE_FILES += sflowtool:/usr/bin/sflowtool +$(DOCKER_SFLOW)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-snmp-sv2.mk b/rules/docker-snmp-sv2.mk new file mode 100644 index 00000000000..bd34f271b86 --- /dev/null +++ b/rules/docker-snmp-sv2.mk @@ -0,0 +1,33 @@ +# docker image for snmp agent + +DOCKER_SNMP_SV2_STEM = docker-snmp-sv2 +DOCKER_SNMP_SV2 = $(DOCKER_SNMP_SV2_STEM).gz +DOCKER_SNMP_SV2_DBG = $(DOCKER_SNMP_SV2_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_SNMP_SV2)_PATH = $(DOCKERS_PATH)/docker-snmp-sv2 + +## TODO: remove LIBPY3_DEV if we can get pip3 directly +$(DOCKER_SNMP_SV2)_DEPENDS += $(SNMP) $(SNMPD) $(PY3) $(LIBPY3_DEV) + +$(DOCKER_SNMP_SV2)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_DEPENDS) +$(DOCKER_SNMP_SV2)_DBG_DEPENDS += $(SNMP_DBG) $(SNMPD_DBG) $(LIBSNMP_DBG) + +$(DOCKER_SNMP_SV2)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_IMAGE_PACKAGES) + +$(DOCKER_SNMP_SV2)_PYTHON_WHEELS += $(SONIC_PLATFORM_COMMON_PY3) $(SWSSSDK_PY3) $(ASYNCSNMP_PY3) +$(DOCKER_SNMP_SV2)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) + +SONIC_DOCKER_IMAGES += $(DOCKER_SNMP_SV2) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SNMP_SV2) +SONIC_STRETCH_DOCKERS += $(DOCKER_SNMP_SV2) + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_SNMP_SV2_DBG) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_SNMP_SV2_DBG) +SONIC_STRETCH_DBG_DOCKERS += $(DOCKER_SNMP_SV2_DBG) + +$(DOCKER_SNMP_SV2)_CONTAINER_NAME = snmp +$(DOCKER_SNMP_SV2)_RUN_OPT += --net=host --privileged -t +$(DOCKER_SNMP_SV2)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +# mount Arista platform python libraries to support corresponding platforms SNMP power status query +$(DOCKER_SNMP_SV2)_RUN_OPT += -v /usr/lib/python3/dist-packages/arista:/usr/lib/python3/dist-packages/arista:ro +$(DOCKER_SNMP_SV2)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-sonic-mgmt.mk b/rules/docker-sonic-mgmt.mk new file mode 100644 index 00000000000..b1aaad34873 --- /dev/null +++ b/rules/docker-sonic-mgmt.mk @@ -0,0 +1,5 @@ +# docker image for sonic-mgmt +DOCKER_SONIC_MGMT = docker-sonic-mgmt.gz +$(DOCKER_SONIC_MGMT)_PATH = $(DOCKERS_PATH)/docker-sonic-mgmt +$(DOCKER_SONIC_MGMT)_DEPENDS += $(SONIC_DEVICE_DATA) $(PTF) +SONIC_DOCKER_IMAGES += $(DOCKER_SONIC_MGMT) diff --git a/rules/docker-teamd.mk b/rules/docker-teamd.mk new file mode 100644 index 00000000000..598eff97e8f --- /dev/null +++ b/rules/docker-teamd.mk @@ -0,0 +1,32 @@ +# docker image for teamd agent + +DOCKER_TEAMD_STEM = docker-teamd +DOCKER_TEAMD = $(DOCKER_TEAMD_STEM).gz +DOCKER_TEAMD_DBG = $(DOCKER_TEAMD_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_TEAMD)_PATH = $(DOCKERS_PATH)/$(DOCKER_TEAMD_STEM) + +$(DOCKER_TEAMD)_DEPENDS += $(SWSS) $(LIBTEAMDCT) $(LIBTEAM_UTILS) $(REDIS_TOOLS) +$(DOCKER_TEAMD)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_DEPENDS) +$(DOCKER_TEAMD)_DBG_DEPENDS += $(SWSS_DBG) $(LIBSWSSCOMMON_DBG) +$(DOCKER_TEAMD)_DBG_DEPENDS += $(LIBTEAMDCT_DBG) $(LIBTEAM_UTILS_DBG) + +$(DOCKER_TEAMD)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_IMAGE_PACKAGES) + +$(DOCKER_TEAMD)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) + +SONIC_DOCKER_IMAGES += $(DOCKER_TEAMD) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_TEAMD) +SONIC_STRETCH_DOCKERS += $(DOCKER_TEAMD) + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_TEAMD_DBG) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_TEAMD_DBG) +SONIC_STRETCH_DBG_DOCKERS += $(DOCKER_TEAMD_DBG) + +$(DOCKER_TEAMD)_CONTAINER_NAME = teamd +$(DOCKER_TEAMD)_RUN_OPT += --net=host --privileged -t +$(DOCKER_TEAMD)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_TEAMD)_RUN_OPT += -v /host/warmboot:/var/warmboot + +$(DOCKER_TEAMD)_BASE_IMAGE_FILES += teamdctl:/usr/bin/teamdctl +$(DOCKER_TEAMD)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-telemetry.mk b/rules/docker-telemetry.mk new file mode 100644 index 00000000000..defeb4d0082 --- /dev/null +++ b/rules/docker-telemetry.mk @@ -0,0 +1,31 @@ +# docker image for telemetry agent + +DOCKER_TELEMETRY_STEM = docker-sonic-telemetry +DOCKER_TELEMETRY = $(DOCKER_TELEMETRY_STEM).gz +DOCKER_TELEMETRY_DBG = $(DOCKER_TELEMETRY_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_TELEMETRY)_PATH = $(DOCKERS_PATH)/$(DOCKER_TELEMETRY_STEM) + +$(DOCKER_TELEMETRY)_DEPENDS += $(REDIS_TOOLS) $(SONIC_TELEMETRY) +$(DOCKER_TELEMETRY)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_DEPENDS) + +$(DOCKER_TELEMETRY)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_STRETCH) +$(DOCKER_TELEMETRY)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_STRETCH)_DBG_IMAGE_PACKAGES) + +SONIC_DOCKER_IMAGES += $(DOCKER_TELEMETRY) +ifeq ($(ENABLE_SYSTEM_TELEMETRY), y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_TELEMETRY) +SONIC_STRETCH_DOCKERS += $(DOCKER_TELEMETRY) +endif + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_TELEMETRY_DBG) +ifeq ($(ENABLE_SYSTEM_TELEMETRY), y) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_TELEMETRY_DBG) +SONIC_STRETCH_DBG_DOCKERS += $(DOCKER_TELEMETRY_DBG) +endif + +$(DOCKER_TELEMETRY)_CONTAINER_NAME = telemetry +$(DOCKER_TELEMETRY)_RUN_OPT += --net=host --privileged -t +$(DOCKER_TELEMETRY)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro + +$(DOCKER_TELEMETRY)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/frr.mk b/rules/frr.mk new file mode 100644 index 00000000000..6902192a15f --- /dev/null +++ b/rules/frr.mk @@ -0,0 +1,32 @@ +# FRRouting (frr) package + +FRR_VERSION = 7.2.1 +FRR_SUBVERSION = 0 +FRR_BRANCH = frr/7.2 +export FRR_VERSION FRR_SUBVERSION FRR_BRANCH + +FRR = frr_$(FRR_VERSION)-sonic-$(FRR_SUBVERSION)_$(CONFIGURED_ARCH).deb +$(FRR)_DEPENDS += $(LIBSNMP_DEV) $(LIBYANG_DEV) +$(FRR)_RDEPENDS += $(LIBYANG) +$(FRR)_SRC_PATH = $(SRC_PATH)/sonic-frr +SONIC_MAKE_DEBS += $(FRR) +SONIC_STRETCH_DEBS += $(FRR) + +FRR_PYTHONTOOLS = frr-pythontools_$(FRR_VERSION)-sonic-$(FRR_SUBVERSION)_all.deb +$(eval $(call add_derived_package,$(FRR),$(FRR_PYTHONTOOLS))) + +FRR_DBG = frr-dbgsym_$(FRR_VERSION)-sonic-$(FRR_SUBVERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(FRR),$(FRR_DBG))) + +FRR_SNMP = frr-snmp_$(FRR_VERSION)-sonic-$(FRR_SUBVERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(FRR),$(FRR_SNMP))) + +FRR_SNMP_DBG = frr-snmp-dbgsym_$(FRR_VERSION)-sonic-$(FRR_SUBVERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(FRR),$(FRR_SNMP_DBG))) + +export FRR FRR_PYTHONTOOLS FRR_DBG FRR_SNMP FRR_SNMP_DBG + +# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} +# are archived into debug one image to facilitate debugging. +# +DBG_SRC_ARCHIVE += sonic-frr diff --git a/rules/functions b/rules/functions new file mode 100644 index 00000000000..93e2a346274 --- /dev/null +++ b/rules/functions @@ -0,0 +1,98 @@ +############################################################################### +## FUNCTIONS +############################################################################### + +############################################################################### +## Colored output +############################################################################### + +# Enable colored output +ifeq ($(SONIC_CONFIG_ENABLE_COLORS),y) +ifeq ($(MAKE_TERMOUT),) +RED=\033[1;31m +PURPLE=\033[1;35m +CYAN=\033[1;36m +GREEN=\033[1;32m +GRAY=\033[0m +endif +endif + +# Print red colored output +# call: +# log_red message +log_red = echo -e "$(RED)$(1)$(GRAY)" + +# Print purple colored output +# call: +# log_purple message +log_purple = echo -e "$(PURPLE)$(1)$(GRAY)" + +# Print blue colored output +# call: +# log_blue message +log_blue = echo -e "$(CYAN)$(1)$(GRAY)" + +# Print green colored output +# call: +# log_green message +log_green = echo -e "$(GREEN)$(1)$(GRAY)" + +############################################################################### +## Logging +############################################################################### + +FLUSH_LOG = rm -f $@.log + +LOG = &>> $(PROJECT_ROOT)/$@.log || { [ $$? -eq 0 ] || pushd $(PROJECT_ROOT) > /dev/null ; ./update_screen.sh -e $@ ; popd > /dev/null ; false ; } + +############################################################################### +## Header and footer for each target +############################################################################### + +# Dump targets taht current depends on +ifeq ($(SONIC_CONFIG_PRINT_DEPENDENCIES),y) +PRINT_DEPENDENCIES = echo Dependencies for $@ are $^ $(LOG) +endif + +# header for each rule +define HEADER +@ +$(PRINT_DEPENDENCIES) +$(FLUSH_LOG) +./update_screen.sh -a $@ +endef + +# footer for each rule +define FOOTER +./update_screen.sh -d $@ +endef + +############################################################################### +## Definition of derived target +############################################################################### + +# call: +# add_derived_package some_deb.deb, some_derived_deb +define add_derived_package +$(2)_DEPENDS += $(1) +$(2)_RDEPENDS += $($(1)_RDEPENDS) +$(2)_MAIN_DEB = $(1) +$(1)_DERIVED_DEBS += $(2) +$(2)_URL = $($(1)_URL) +$(2)_SRC_PATH = $($(1)_SRC_PATH) +SONIC_DERIVED_DEBS += $(2) +endef + +# call: +# add_extra_package some_deb.deb, some_extra_deb +define add_extra_package +$(2)_MAIN_DEB = $(1) +$(1)_EXTRA_DEBS += $(2) +SONIC_EXTRA_DEBS += $(2) +endef + +############################################################################### +## Utility functions +############################################################################### + +expand = $(foreach d,$(1),$(call expand,$($(d)_$(2)),$(2))) $(1) diff --git a/rules/gobgp.mk b/rules/gobgp.mk new file mode 100644 index 00000000000..2d8a9d3f9c3 --- /dev/null +++ b/rules/gobgp.mk @@ -0,0 +1,5 @@ +# gobgp package + +GOBGP = gobgp_1.16-01_$(CONFIGURED_ARCH).deb +$(GOBGP)_SRC_PATH = $(SRC_PATH)/gobgp +SONIC_DPKG_DEBS += $(GOBGP) diff --git a/rules/hiredis.mk b/rules/hiredis.mk new file mode 100644 index 00000000000..71a18a1d6aa --- /dev/null +++ b/rules/hiredis.mk @@ -0,0 +1,17 @@ +# libhiredis package + +HIREDIS_VERSION = 0.14.0 +HIREDIS_VERSION_FULL = $(HIREDIS_VERSION)-3~bpo9+1 + +export HIREDIS_VERSION HIREDIS_VERSION_FULL + +LIBHIREDIS = libhiredis0.14_$(HIREDIS_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(LIBHIREDIS)_SRC_PATH = $(SRC_PATH)/hiredis +SONIC_MAKE_DEBS += $(LIBHIREDIS) + +LIBHIREDIS_DEV = libhiredis-dev_$(HIREDIS_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBHIREDIS),$(LIBHIREDIS_DEV))) + +LIBHIREDIS_DBG = libhiredis-dbg_$(HIREDIS_VERSION_FULL)_$(CONFIGURED_ARCH).deb +LIBHIREDIS_DBG = libhiredis0.14-dbgsym_$(HIREDIS_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBHIREDIS),$(LIBHIREDIS_DBG))) diff --git a/rules/ifupdown2.mk b/rules/ifupdown2.mk new file mode 100644 index 00000000000..b663cc1532d --- /dev/null +++ b/rules/ifupdown2.mk @@ -0,0 +1,11 @@ +# ifupdown2 package + +IFUPDOWN2_VERSION = 1.2.8-1 +export IFUPDOWN2_VERSION + +IFUPDOWN2 = ifupdown2_$(IFUPDOWN2_VERSION)_all.deb +$(IFUPDOWN2)_SRC_PATH = $(SRC_PATH)/ifupdown2 +SONIC_MAKE_DEBS += $(IFUPDOWN2) +SONIC_STRETCH_DEBS += $(IFUPDOWN2) + +export IFUPDOWN2 diff --git a/rules/initramfs-tools.mk b/rules/initramfs-tools.mk new file mode 100644 index 00000000000..badc584dd2b --- /dev/null +++ b/rules/initramfs-tools.mk @@ -0,0 +1,13 @@ +# initramfs-tools package + +INITRAMFS_TOOLS_VERSION = 0.130 +export INITRAMFS_TOOLS_VERSION + +INITRAMFS_TOOLS = initramfs-tools_$(INITRAMFS_TOOLS_VERSION)_all.deb +$(INITRAMFS_TOOLS)_SRC_PATH = $(SRC_PATH)/initramfs-tools +SONIC_MAKE_DEBS += $(INITRAMFS_TOOLS) + +INITRAMFS_TOOLS_CORE = initramfs-tools-core_$(INITRAMFS_TOOLS_VERSION)_all.deb +$(eval $(call add_extra_package,$(INITRAMFS_TOOLS),$(INITRAMFS_TOOLS_CORE))) + +SONIC_STRETCH_DEBS += $(INITRAMFS_TOOLS) $(INITRAMFS_TOOLS_CORE) diff --git a/rules/iproute2.mk b/rules/iproute2.mk new file mode 100644 index 00000000000..33d54f4de11 --- /dev/null +++ b/rules/iproute2.mk @@ -0,0 +1,7 @@ +# iproute2 package + +IPROUTE2_VERSION = 4.9.0-1 + +IPROUTE2 = iproute2_$(IPROUTE2_VERSION)_$(CONFIGURED_ARCH).deb +$(IPROUTE2)_SRC_PATH = $(SRC_PATH)/iproute2 +SONIC_MAKE_DEBS += $(IPROUTE2) diff --git a/rules/isc-dhcp.mk b/rules/isc-dhcp.mk new file mode 100644 index 00000000000..da57d087710 --- /dev/null +++ b/rules/isc-dhcp.mk @@ -0,0 +1,14 @@ +# isc-dhcp packages + +ISC_DHCP_VERSION = 4.3.5-2 + +export ISC_DHCP_VERSION + +ISC_DHCP_RELAY = isc-dhcp-relay_$(ISC_DHCP_VERSION)_$(CONFIGURED_ARCH).deb +$(ISC_DHCP_RELAY)_SRC_PATH = $(SRC_PATH)/isc-dhcp +SONIC_MAKE_DEBS += $(ISC_DHCP_RELAY) + +SONIC_STRETCH_DEBS += $(ISC_DHCP_RELAY) + +ISC_DHCP_RELAY_DBG = isc-dhcp-relay-dbgsym_$(ISC_DHCP_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(ISC_DHCP_RELAY),$(ISC_DHCP_RELAY_DBG))) diff --git a/rules/ixgbe.mk b/rules/ixgbe.mk new file mode 100644 index 00000000000..86a0e8453a2 --- /dev/null +++ b/rules/ixgbe.mk @@ -0,0 +1,11 @@ +# initramfs-tools package + +IXGBE_DRIVER_VERSION = 5.2.4 +export IXGBE_DRIVER_VERSION + +IXGBE_DRIVER = ixgbe.ko +$(IXGBE_DRIVER)_SRC_PATH = $(SRC_PATH)/ixgbe +$(IXGBE_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +SONIC_MAKE_FILES += $(IXGBE_DRIVER) + +SONIC_STRETCH_FILES += $(IXGBE_DRIVER) diff --git a/rules/kdump-tools.mk b/rules/kdump-tools.mk new file mode 100644 index 00000000000..d5d2630389f --- /dev/null +++ b/rules/kdump-tools.mk @@ -0,0 +1,13 @@ +# kdump-tools package + +KDUMP_TOOLS_VERSION_BASE = 1.6.1 +KDUMP_TOOLS_VERSION = $(KDUMP_TOOLS_VERSION_BASE)-1 +export KDUMP_TOOLS_VERSION_BASE +export KDUMP_TOOLS_VERSION + +KDUMP_TOOLS = kdump-tools_$(KDUMP_TOOLS_VERSION)_all.deb +$(KDUMP_TOOLS)_SRC_PATH = $(SRC_PATH)/kdump-tools +SONIC_MAKE_DEBS += $(KDUMP_TOOLS) +SONIC_STRETCH_DEBS += $(KDUMP_TOOLS) + +export KDUMP_TOOLS diff --git a/rules/libnl3.mk b/rules/libnl3.mk new file mode 100644 index 00000000000..897b6c34482 --- /dev/null +++ b/rules/libnl3.mk @@ -0,0 +1,53 @@ +# libnl3 + +LIBNL3_VERSION_BASE = 3.2.27 +LIBNL3_VERSION = $(LIBNL3_VERSION_BASE)-2 + +export LIBNL3_VERSION_BASE +export LIBNL3_VERSION + +LIBNL3 = libnl-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBNL3)_SRC_PATH = $(SRC_PATH)/libnl3 +SONIC_MAKE_DEBS += $(LIBNL3) + +LIBNL3_DEV = libnl-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBNL3),$(LIBNL3_DEV))) + +LIBNL_GENL3 = libnl-genl-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBNL_GENL3)_RDEPENDS += $(LIBNL3) +$(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_GENL3))) + +LIBNL_GENL3_DEV = libnl-genl-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBNL_GENL3_DEV)_DEPENDS += $(LIBNL_GENL3) $(LIBNL3_DEV) +$(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_GENL3_DEV))) + +LIBNL_ROUTE3 = libnl-route-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBNL_ROUTE3)_RDEPENDS += $(LIBNL3) +$(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_ROUTE3))) + +LIBNL_ROUTE3_DEV = libnl-route-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBNL_ROUTE3_DEV)_DEPENDS += $(LIBNL_ROUTE3) $(LIBNL3_DEV) +$(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_ROUTE3_DEV))) + +LIBNL_NF3 = libnl-nf-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBNL_NF3)_DEPENDS += $(LIBNL_ROUTE3_DEV) +$(LIBNL_NF3)_RDEPENDS += $(LIBNL_ROUTE3) +$(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_NF3))) + +LIBNL_NF3_DEV = libnl-nf-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBNL_NF3_DEV)_DEPENDS += $(LIBNL_NF3) +$(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_NF3_DEV))) + +LIBNL_CLI = libnl-cli-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBNL_CLI)_DEPENDS += $(LIBNL_GENL3_DEV) $(LIBNL_NF3_DEV) $(LIBNL_ROUTE3_DEV) +$(LIBNL_CLI)_RDEPENDS += $(LIBNL_GENL3) $(LIBNL_NF3) $(LIBNL_ROUTE3) +$(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_CLI))) + +LIBNL_CLI_DEV = libnl-cli-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBNL_CLI_DEV)_DEPENDS += $(LIBNL_CLI) $(LIBNL_GENL3_DEV) $(LIBNL_NF3_DEV) $(LIBNL_ROUTE3_DEV) +$(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_CLI_DEV))) + +# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} +# are archived into debug one image to facilitate debugging. +# +DBG_SRC_ARCHIVE += libnl3 diff --git a/rules/libteam.mk b/rules/libteam.mk new file mode 100644 index 00000000000..75e8f5db62b --- /dev/null +++ b/rules/libteam.mk @@ -0,0 +1,35 @@ +# libteam packages + +LIBTEAM_VERSION = 1.28-1 + +export LIBTEAM_VERSION + +LIBTEAM = libteam5_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBTEAM)_SRC_PATH = $(SRC_PATH)/libteam +$(LIBTEAM)_DEPENDS += $(LIBNL_GENL3_DEV) $(LIBNL_CLI_DEV) +SONIC_MAKE_DEBS += $(LIBTEAM) + +LIBTEAM_DBG = libteam5-dbgsym_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBTEAM),$(LIBTEAM_DBG))) + +LIBTEAM_DEV = libteam-dev_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBTEAM_DEV)_DEPENDS += $(LIBTEAMDCT) +$(eval $(call add_derived_package,$(LIBTEAM),$(LIBTEAM_DEV))) + +LIBTEAMDCT = libteamdctl0_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBTEAM),$(LIBTEAMDCT))) + +LIBTEAMDCT_DBG = libteamdctl0-dbgsym_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBTEAMDCT),$(LIBTEAMDCT_DBG))) + +LIBTEAM_UTILS = libteam-utils_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBTEAM_UTILS)_DEPENDS += $(LIBTEAMDCT) +$(eval $(call add_derived_package,$(LIBTEAM),$(LIBTEAM_UTILS))) + +LIBTEAM_UTILS_DBG = libteam-utils-dbgsym_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBTEAM_UTILS),$(LIBTEAM_UTILS_DBG))) + +# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} +# are archived into debug one image to facilitate debugging. +# +DBG_SRC_ARCHIVE += libteam diff --git a/rules/libyang.mk b/rules/libyang.mk new file mode 100644 index 00000000000..d10c2ea2cc6 --- /dev/null +++ b/rules/libyang.mk @@ -0,0 +1,32 @@ +# libyang + +LIBYANG_VERSION_BASE = 1.0 +LIBYANG_VERSION = $(LIBYANG_VERSION_BASE).73 +LIBYANG_SUBVERSION = 1 + +export LIBYANG_VERSION_BASE +export LIBYANG_VERSION +export LIBYANG_SUBVERSION + +LIBYANG = libyang_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBYANG)_SRC_PATH = $(SRC_PATH)/libyang +$(LIBYANG)_DEPENDS += $(SWIG_BASE) $(SWIG) +SONIC_MAKE_DEBS += $(LIBYANG) +SONIC_STRETCH_DEBS += $(LIBYANG) + +LIBYANG_DEV = libyang-dev_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_DEV))) + +LIBYANG_DBG = libyang-dbg_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_DBG))) + +LIBYANG_CPP = libyang-cpp_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_CPP))) + +LIBYANG_PY3 = python3-yang_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_PY3))) + +LIBYANG_PY2 = python2-yang_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_PY2))) + +export LIBYANG LIBYANG_DBG LIBYANG_DEV LIBYANG_CPP LIBYANG_PY3 LIBYANG_PY2 diff --git a/rules/linux-kernel.mk b/rules/linux-kernel.mk new file mode 100644 index 00000000000..5250f8b97e8 --- /dev/null +++ b/rules/linux-kernel.mk @@ -0,0 +1,22 @@ +# linux kernel package + +KVERSION_SHORT = 4.9.0-9-2 +KVERSION = $(KVERSION_SHORT)-$(CONFIGURED_ARCH) +KERNEL_VERSION = 4.9.168 +KERNEL_SUBVERSION = 1+deb9u5 +ifeq ($(CONFIGURED_ARCH), armhf) +# Override kernel version for ARMHF as it uses arm MP (multi-platform) for short version +KVERSION = $(KVERSION_SHORT)-armmp +endif + +export KVERSION_SHORT KVERSION KERNEL_VERSION KERNEL_SUBVERSION + +LINUX_HEADERS_COMMON = linux-headers-$(KVERSION_SHORT)-common_$(KERNEL_VERSION)-$(KERNEL_SUBVERSION)_all.deb +$(LINUX_HEADERS_COMMON)_SRC_PATH = $(SRC_PATH)/sonic-linux-kernel +SONIC_MAKE_DEBS += $(LINUX_HEADERS_COMMON) + +LINUX_HEADERS = linux-headers-$(KVERSION)_$(KERNEL_VERSION)-$(KERNEL_SUBVERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LINUX_HEADERS_COMMON),$(LINUX_HEADERS))) + +LINUX_KERNEL = linux-image-$(KVERSION)_$(KERNEL_VERSION)-$(KERNEL_SUBVERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LINUX_HEADERS_COMMON),$(LINUX_KERNEL))) diff --git a/rules/lldpd.mk b/rules/lldpd.mk new file mode 100644 index 00000000000..bae83f7263b --- /dev/null +++ b/rules/lldpd.mk @@ -0,0 +1,29 @@ +# lldpd package + +LLDPD_VERSION = 0.9.6 +LLDPD_VERSION_SUFFIX = 1 +LLDPD_VERSION_FULL = $(LLDPD_VERSION)-$(LLDPD_VERSION_SUFFIX) + +LLDPD = lldpd_$(LLDPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(LLDPD)_DEPENDS += $(LIBSNMP_DEV) +$(LLDPD)_RDEPENDS += $(LIBSNMP) +$(LLDPD)_SRC_PATH = $(SRC_PATH)/lldpd +SONIC_MAKE_DEBS += $(LLDPD) + +LIBLLDPCTL = liblldpctl-dev_$(LLDPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LLDPD),$(LIBLLDPCTL))) + +LLDPD_DBG = lldpd-dbgsym_$(LLDPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LLDPD),$(LLDPD_DBG))) + +# Export these variables so they can be used in a sub-make +export LLDPD_VERSION +export LLDPD_VERSION_FULL +export LLDPD +export LIBLLDPCTL +export LLDPD_DBG + +# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} +# are archived into debug one image to facilitate debugging. +# +DBG_SRC_ARCHIVE += lldpd diff --git a/rules/lm-sensors.mk b/rules/lm-sensors.mk new file mode 100644 index 00000000000..a97b539fd8a --- /dev/null +++ b/rules/lm-sensors.mk @@ -0,0 +1,43 @@ +# lm-senensors package + +LM_SENSORS_VERSION=3.4.0 +LM_SENSORS_VERSION_FULL=$(LM_SENSORS_VERSION)-4 + +LM_SENSORS = lm-sensors_$(LM_SENSORS_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(LM_SENSORS)_SRC_PATH = $(SRC_PATH)/lm-sensors + +LM_SENSORS_DBG = lm-sensors-dbgsym_$(LM_SENSORS_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LM_SENSORS),$(LM_SENSORS_DBG))) + +FANCONTROL = fancontrol_$(LM_SENSORS_VERSION_FULL)_all.deb +$(eval $(call add_derived_package,$(LM_SENSORS),$(FANCONTROL))) + +LIBSENSORS = libsensors4_$(LM_SENSORS_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LM_SENSORS),$(LIBSENSORS))) + +LIBSENSORS_DBG = libsensors4-dbgsym_$(LM_SENSORS_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBSENSORS),$(LIBSENSORS_DBG))) + +SENSORD = sensord_$(LM_SENSORS_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LM_SENSORS),$(SENSORD))) +$(SENSORD)_DEPENDS += $(LIBSENSORS) $(LM_SENSORS) + +SENSORD_DBG = sensord-dbgsym_$(LM_SENSORS_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(SENSORD),$(SENSORD_DBG))) + +SONIC_MAKE_DEBS += $(LM_SENSORS) + +# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} +# are archived into debug one image to facilitate debugging. +# +DBG_SRC_ARCHIVE += lm-sensors + +export LM_SENSORS +export FANCONTROL +export LIBSENSORS +export SENSORD +export LM_SENSORS_VERSION +export LM_SENSORS_VERSION_FULL +export LM_SENSORS_DBG +export LIBSENSORS_DBG +export SENSORD_DBG diff --git a/rules/mpdecimal.mk b/rules/mpdecimal.mk new file mode 100644 index 00000000000..9ab84577e35 --- /dev/null +++ b/rules/mpdecimal.mk @@ -0,0 +1,13 @@ +# mpdecimal package + +MPDECIMAL_VERSION = 2.4.2 +MPDECIMAL_VERSION_FULL = $(MPDECIMAL_VERSION)-2 + +export MPDECIMAL_VERSION MPDECIMAL_VERSION_FULL + +LIBMPDECIMAL = libmpdec2_$(MPDECIMAL_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(LIBMPDECIMAL)_SRC_PATH = $(SRC_PATH)/mpdecimal +SONIC_MAKE_DEBS += $(LIBMPDECIMAL) + +LIBMPDECIMAL_DEV = libmpdec-dev_$(MPDECIMAL_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBMPDECIMAL),$(LIBMPDECIMAL_DEV))) diff --git a/rules/ptf.mk b/rules/ptf.mk new file mode 100644 index 00000000000..5fe275bdada --- /dev/null +++ b/rules/ptf.mk @@ -0,0 +1,5 @@ +# ptf package + +PTF = python-ptf_0.9-1_all.deb +$(PTF)_SRC_PATH = $(SRC_PATH)/ptf +SONIC_DPKG_DEBS += $(PTF) diff --git a/rules/python-click.mk b/rules/python-click.mk new file mode 100644 index 00000000000..5d48dc30d60 --- /dev/null +++ b/rules/python-click.mk @@ -0,0 +1,17 @@ +# python-click package +# +# Python Click versions < 6.7 have a bug which causes bash completion +# functionality to stop working after two sublevels. sonic-utilities depends +# on this package, and the most recent version provided by Debian Jessie and +# Stretch is v6.6. We build version 6.7 from source in order to fix this bug. +# TODO: If we upgrade to a distro which provides a version >= 6.7 we will no +# longer need to build this. + +PYTHON_CLICK_VERSION = 6.7-4 + +export PYTHON_CLICK_VERSION + +PYTHON_CLICK = python-click_$(PYTHON_CLICK_VERSION)_all.deb +$(PYTHON_CLICK)_SRC_PATH = $(SRC_PATH)/python-click +SONIC_MAKE_DEBS += $(PYTHON_CLICK) +SONIC_STRETCH_DEBS += $(PYTHON_CLICK) diff --git a/rules/python3.mk b/rules/python3.mk new file mode 100644 index 00000000000..d9d19d8d1f9 --- /dev/null +++ b/rules/python3.mk @@ -0,0 +1,35 @@ +PYTHON_VER=3.6.0-1 +PYTHON_PNAME=python3.6 + +export PYTHON_VER +export PYTHON_PNAME + +LIBPY3_MIN = lib$(PYTHON_PNAME)-minimal_$(PYTHON_VER)_$(CONFIGURED_ARCH).deb +$(LIBPY3_MIN)_SRC_PATH = $(SRC_PATH)/python3 +$(LIBPY3_MIN)_DEPENDS += +$(LIBPY3_MIN)_RDEPENDS += +SONIC_MAKE_DEBS += $(LIBPY3_MIN) + +LIBPY3_STD = lib$(PYTHON_PNAME)-stdlib_$(PYTHON_VER)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBPY3_MIN),$(LIBPY3_STD))) +$(LIBPY3_STD)_DEPENDS += $(LIBMPDECIMAL) +$(LIBPY3_STD)_RDEPENDS += $(LIBPY3_MIN) $(LIBMPDECIMAL) + +LIBPY3 = lib$(PYTHON_PNAME)_$(PYTHON_VER)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBPY3_MIN),$(LIBPY3))) +$(LIBPY3)_DEPENDS += $(LIBPY3_STD) +$(LIBPY3)_RDEPENDS += $(LIBPY3_MIN) $(LIBPY3_STD) + +PY3_MIN = $(PYTHON_PNAME)-minimal_$(PYTHON_VER)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBPY3_MIN),$(PY3_MIN))) +$(PY3_MIN)_RDEPENDS += $(LIBPY3_MIN) + +PY3 = $(PYTHON_PNAME)_$(PYTHON_VER)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBPY3_MIN),$(PY3))) +$(PY3)_DEPENDS += $(PY3_MIN) $(LIBPY3_STD) +$(PY3)_RDEPENDS += $(PY3_MIN) $(LIBPY3_STD) + +LIBPY3_DEV = lib$(PYTHON_PNAME)-dev_$(PYTHON_VER)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBPY3_MIN),$(LIBPY3_DEV))) +$(LIBPY3_DEV)_DEPENDS += $(LIBPY3) $($(LIBPY3)_DEPENDS) +$(LIBPY3_DEV)_RDEPENDS += $(LIBPY3) $($(LIBPY3)_RDEPENDS) diff --git a/rules/quagga.mk b/rules/quagga.mk new file mode 100644 index 00000000000..2caef76b2cf --- /dev/null +++ b/rules/quagga.mk @@ -0,0 +1,11 @@ +# quagga package + +QUAGGA_VERSION_FULL = 0.99.24.1-2.1 + +QUAGGA = quagga_$(QUAGGA_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(QUAGGA)_DEPENDS += $(LIBSNMP_DEV) +$(QUAGGA)_SRC_PATH = $(SRC_PATH)/sonic-quagga +SONIC_DPKG_DEBS += $(QUAGGA) + +QUAGGA_DBG = quagga-dbg_$(QUAGGA_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(QUAGGA),$(QUAGGA_DBG))) diff --git a/rules/radvd.mk b/rules/radvd.mk new file mode 100644 index 00000000000..fcde8c5767b --- /dev/null +++ b/rules/radvd.mk @@ -0,0 +1,18 @@ +# radvd package + +RADVD_VERSION = 2.17-2~bpo9+1 + +export RADVD_VERSION + +RADVD = radvd_$(RADVD_VERSION)_$(CONFIGURED_ARCH).deb +$(RADVD)_SRC_PATH = $(SRC_PATH)/radvd +SONIC_MAKE_DEBS += $(RADVD) +SONIC_STRETCH_DEBS += $(RADVD) + +RADVD_DBG = radvd-dbgsym_$(RADVD_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(RADVD),$(RADVD_DBG))) + +# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} +# are archived into debug one image to facilitate debugging. +# +DBG_SRC_ARCHIVE += radvd diff --git a/rules/redis-dump-load-py2.mk b/rules/redis-dump-load-py2.mk new file mode 100644 index 00000000000..5f756caada9 --- /dev/null +++ b/rules/redis-dump-load-py2.mk @@ -0,0 +1,6 @@ +# redis_dump_load python2 wheel + +REDIS_DUMP_LOAD_PY2 = redis_dump_load-1.1-py2-none-any.whl +$(REDIS_DUMP_LOAD_PY2)_SRC_PATH = $(SRC_PATH)/redis-dump-load +$(REDIS_DUMP_LOAD_PY2)_PYTHON_VERSION = 2 +SONIC_PYTHON_WHEELS += $(REDIS_DUMP_LOAD_PY2) diff --git a/rules/redis.mk b/rules/redis.mk new file mode 100644 index 00000000000..83b3d81ba6c --- /dev/null +++ b/rules/redis.mk @@ -0,0 +1,26 @@ +# redis package + +REDIS_VERSION = 5.0.3-3~bpo9+2 + +REDIS_TOOLS = redis-tools_$(REDIS_VERSION)_$(CONFIGURED_ARCH).deb +$(REDIS_TOOLS)_SRC_PATH = $(SRC_PATH)/redis +$(REDIS_TOOLS)_DEPENDS += $(LIBHIREDIS_DEV) +$(REDIS_TOOLS)_RDEPENDS += $(LIBHIREDIS) +SONIC_MAKE_DEBS += $(REDIS_TOOLS) + +REDIS_TOOLS_DBG = redis-tools-dbgsym_$(REDIS_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(REDIS_TOOLS),$(REDIS_TOOLS_DBG))) + +REDIS_SERVER = redis-server_$(REDIS_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(REDIS_TOOLS),$(REDIS_SERVER))) + +REDIS_SENTINEL = redis-sentinel_$(REDIS_VERSION)_$(CONFIGURED_ARCH).deb +$(REDIS_SENTINEL)_DEPENDS += $(REDIS_SERVER) +$(REDIS_SENTINEL)_RDEPENDS += $(REDIS_SERVER) +$(eval $(call add_derived_package,$(REDIS_TOOLS),$(REDIS_SENTINEL))) + +# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} +# are archived into debug one image to facilitate debugging. +# +DBG_SRC_ARCHIVE += redis + diff --git a/rules/sairedis.mk b/rules/sairedis.mk new file mode 100644 index 00000000000..fd026541a4f --- /dev/null +++ b/rules/sairedis.mk @@ -0,0 +1,78 @@ +# sairedis package + +LIBSAIREDIS = libsairedis_1.0.0_$(CONFIGURED_ARCH).deb +$(LIBSAIREDIS)_SRC_PATH = $(SRC_PATH)/sonic-sairedis +$(LIBSAIREDIS)_DEPENDS += $(LIBSWSSCOMMON_DEV) +$(LIBSAIREDIS)_RDEPENDS += $(LIBSWSSCOMMON) +ifneq ($(ENABLE_SYNCD_RPC),y) +$(LIBSAIREDIS)_DPKG_TARGET = binary-syncd +else +# Inject libthrift build dependency for RPC build +$(LIBSAIREDIS)_DEPENDS += $(LIBSWSSCOMMON_DEV) $(LIBTHRIFT_DEV) +$(LIBSAIREDIS)_DPKG_TARGET = binary-syncd-rpc +endif +$(LIBSAIREDIS)_DEB_BUILD_OPTIONS = nocheck +SONIC_DPKG_DEBS += $(LIBSAIREDIS) + +LIBSAIREDIS_DEV = libsairedis-dev_1.0.0_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIREDIS_DEV))) + +LIBSAIVS = libsaivs_1.0.0_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIVS))) + +LIBSAIVS_DEV = libsaivs-dev_1.0.0_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIVS_DEV))) + +ifneq ($(CONFIGURED_PLATFORM),vs) +SYNCD = syncd_1.0.0_$(CONFIGURED_ARCH).deb +$(SYNCD)_RDEPENDS += $(LIBSAIREDIS) $(LIBSAIMETADATA) +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(SYNCD))) + +ifeq ($(ENABLE_SYNCD_RPC),y) +SYNCD_RPC = syncd-rpc_1.0.0_$(CONFIGURED_ARCH).deb +$(SYNCD_RPC)_RDEPENDS += $(LIBSAIREDIS) $(LIBSAIMETADATA) +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(SYNCD_RPC))) +endif +endif + +LIBSAIMETADATA = libsaimetadata_1.0.0_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIMETADATA))) + +LIBSAIMETADATA_DEV = libsaimetadata-dev_1.0.0_$(CONFIGURED_ARCH).deb +$(LIBSAIMETADATA_DEV)_DEPENDS += $(LIBSAIMETADATA) +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIMETADATA_DEV))) + +LIBSAIREDIS_DBG = libsairedis-dbg_1.0.0_$(CONFIGURED_ARCH).deb +$(LIBSAIREDIS_DBG)_DEPENDS += $(LIBSAIREDIS) +$(LIBSAIREDIS_DBG)_RDEPENDS += $(LIBSAIREDIS) +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIREDIS_DBG))) + +LIBSAIVS_DBG = libsaivs-dbg_1.0.0_$(CONFIGURED_ARCH).deb +$(LIBSAIVS_DBG)_DEPENDS += $(LIBSAIVS) +$(LIBSAIVS_DBG)_RDEPENDS += $(LIBSAIVS) +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIVS_DBG))) + +ifneq ($(CONFIGURED_PLATFORM),vs) +SYNCD_DBG = syncd-dbg_1.0.0_$(CONFIGURED_ARCH).deb +$(SYNCD_DBG)_DEPENDS += $(SYNCD) +$(SYNCD_DBG)_RDEPENDS += $(SYNCD) +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(SYNCD_DBG))) + +ifeq ($(ENABLE_SYNCD_RPC),y) +SYNCD_RPC_DBG = syncd-rpc-dbg_1.0.0_$(CONFIGURED_ARCH).deb +$(SYNCD_RPC_DBG)_DEPENDS += $(SYNCD_RPC) +$(SYNCD_RPC_DBG)_RDEPENDS += $(SYNCD_RPC) +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(SYNCD_RPC_DBG))) +endif +endif + +LIBSAIMETADATA_DBG = libsaimetadata-dbg_1.0.0_$(CONFIGURED_ARCH).deb +$(LIBSAIMETADATA_DBG)_DEPENDS += $(LIBSAIMETADATA) +$(LIBSAIMETADATA_DBG)_RDEPENDS += $(LIBSAIMETADATA) +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIMETADATA_DBG))) + +# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} +# are archived into debug one image to facilitate debugging. +# +DBG_SRC_ARCHIVE += sonic-sairedis + diff --git a/rules/scripts.mk b/rules/scripts.mk new file mode 100644 index 00000000000..8c6d0324fc0 --- /dev/null +++ b/rules/scripts.mk @@ -0,0 +1,23 @@ + +ARP_UPDATE_SCRIPT = arp_update +$(ARP_UPDATE_SCRIPT)_PATH = files/scripts + +CONFIGDB_LOAD_SCRIPT = configdb-load.sh +$(CONFIGDB_LOAD_SCRIPT)_PATH = files/scripts + +BUFFERS_CONFIG_TEMPLATE = buffers_config.j2 +$(BUFFERS_CONFIG_TEMPLATE)_PATH = files/build_templates + +QOS_CONFIG_TEMPLATE = qos_config.j2 +$(QOS_CONFIG_TEMPLATE)_PATH = files/build_templates + +SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT = supervisor-proc-exit-listener +$(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)_PATH = files/scripts + +SONIC_COPY_FILES += $(CONFIGDB_LOAD_SCRIPT) \ + $(ARP_UPDATE_SCRIPT) \ + $(BUFFERS_CONFIG_TEMPLATE) \ + $(QOS_CONFIG_TEMPLATE) \ + $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) + + diff --git a/rules/sflow.mk b/rules/sflow.mk new file mode 100644 index 00000000000..f267353c0f9 --- /dev/null +++ b/rules/sflow.mk @@ -0,0 +1,49 @@ +# host-sflow package + +HSFLOWD_VERSION = 2.0.26 +HSFLOWD_SUBVERSION = 1 +export HSFLOWD_VERSION HSFLOWD_SUBVERSION + +HSFLOWD = hsflowd_$(HSFLOWD_VERSION)-$(HSFLOWD_SUBVERSION)_$(CONFIGURED_ARCH).deb +$(HSFLOWD)_DEPENDS += $(LIBHIREDIS_DEV) $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(HSFLOWD)_SRC_PATH = $(SRC_PATH)/sflow/hsflowd + +SONIC_MAKE_DEBS += $(HSFLOWD) +SONIC_STRETCH_DEBS += $(HSFLOWD) + +HSFLOWD_DBG = hsflowd-dbg_$(HSFLOWD_VERSION)-$(HSFLOWD_SUBVERSION)_$(CONFIGURED_ARCH).deb +$(HSFLOWD_DBG)_DEPENDS += $(HSFLOWD) +$(HSFLOWD_DBG)_RDEPENDS += $(HSFLOWD) +$(eval $(call add_derived_package,$(HSFLOWD),$(HSFLOWD_DBG))) + +export HSFLOWD HSFLOWD_DBG + +# sflowtool package + +SFLOWTOOL_VERSION = 5.04 +export SFLOWTOOL_VERSION + +SFLOWTOOL = sflowtool_$(SFLOWTOOL_VERSION)_$(CONFIGURED_ARCH).deb +$(SFLOWTOOL)_SRC_PATH = $(SRC_PATH)/sflow/sflowtool + +SONIC_MAKE_DEBS += $(SFLOWTOOL) +SONIC_STRETCH_DEBS += $(SFLOWTOOL) +export SFLOWTOOL + +# psample package + +PSAMPLE_VERSION = 1.1 +PSAMPLE_SUBVERSION = 1 +export PSAMPLE_VERSION PSAMPLE_SUBVERSION + +PSAMPLE = psample_$(PSAMPLE_VERSION)-$(PSAMPLE_SUBVERSION)_$(CONFIGURED_ARCH).deb +$(PSAMPLE)_SRC_PATH = $(SRC_PATH)/sflow/psample + +SONIC_MAKE_DEBS += $(PSAMPLE) +SONIC_STRETCH_DEBS += $(PSAMPLE) +export PSAMPLE + +# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} +# are archived into debug one image to facilitate debugging. +# +DBG_SRC_ARCHIVE += sflow diff --git a/rules/smartmontools.mk b/rules/smartmontools.mk new file mode 100644 index 00000000000..90072592b95 --- /dev/null +++ b/rules/smartmontools.mk @@ -0,0 +1,13 @@ +# smartmontools package +# + +SMARTMONTOOLS_VERSION_MAJOR = 6.6 +SMARTMONTOOLS_VERSION_FULL = $(SMARTMONTOOLS_VERSION_MAJOR)-1 + +export SMARTMONTOOLS_VERSION_MAJOR SMARTMONTOOLS_VERSION_FULL + +SMARTMONTOOLS = smartmontools_$(SMARTMONTOOLS_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(SMARTMONTOOLS)_SRC_PATH = $(SRC_PATH)/smartmontools + +SONIC_STRETCH_DEBS += $(SMARTMONTOOLS) +SONIC_MAKE_DEBS += $(SMARTMONTOOLS) diff --git a/rules/snmpd.mk b/rules/snmpd.mk new file mode 100644 index 00000000000..8fb8495ebc3 --- /dev/null +++ b/rules/snmpd.mk @@ -0,0 +1,67 @@ +# snmpd package + +SNMPD_VERSION = 5.7.3+dfsg +SNMPD_VERSION_FULL = $(SNMPD_VERSION)-1.5 + +export SNMPD_VERSION SNMPD_VERSION_FULL + +LIBSNMP_BASE = libsnmp-base_$(SNMPD_VERSION_FULL)_all.deb +$(LIBSNMP_BASE)_SRC_PATH = $(SRC_PATH)/snmpd +$(LIBSNMP_BASE)_DEPENDS += $(LIBNL3_DEV) +$(LIBSNMP_BASE)_RDEPENDS += $(LIBNL3) +SONIC_MAKE_DEBS += $(LIBSNMP_BASE) + +SNMPTRAPD = snmptrapd_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(SNMPTRAPD)_DEPENDS += $(LIBSNMP) $(SNMPD) +$(SNMPTRAPD)_RDEPENDS += $(LIBSNMP) $(SNMPD) +$(eval $(call add_derived_package,$(LIBSNMP_BASE),$(SNMPTRAPD))) + +SNMP = snmp_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(SNMP)_DEPENDS += $(LIBSNMP) +$(SNMP)_RDEPENDS += $(LIBSNMP) +$(eval $(call add_derived_package,$(LIBSNMP_BASE),$(SNMP))) + +SNMPD = snmpd_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(SNMPD)_DEPENDS += $(LIBSNMP) +$(SNMPD)_RDEPENDS += $(LIBSNMP) +$(eval $(call add_derived_package,$(LIBSNMP_BASE),$(SNMPD))) + +SNMP_DBG = snmp-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(SNMP),$(SNMP_DBG))) + +SNMPD_DBG = snmpd-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(SNMPD),$(SNMPD_DBG))) + +LIBSNMP = libsnmp30_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(LIBSNMP)_RDEPENDS += $(LIBSNMP_BASE) +$(eval $(call add_derived_package,$(LIBSNMP_BASE),$(LIBSNMP))) + +LIBSNMP_DBG = libsnmp30-dbg_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(LIBSNMP_DBG)_DEPENDS += $(LIBSNMP) +$(LIBSNMP_DBG)_RDEPENDS += $(LIBSNMP) +$(eval $(call add_derived_package,$(LIBSNMP_BASE),$(LIBSNMP_DBG))) + +LIBSNMP_DEV = libsnmp-dev_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(LIBSNMP_DEV)_DEPENDS += $(LIBSNMP) +$(eval $(call add_derived_package,$(LIBSNMP_BASE),$(LIBSNMP_DEV))) + +LIBSNMP_PERL = libsnmp-perl_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(LIBSNMP_PERL)_DEPENDS += $(LIBSNMP) +$(LIBSNMP_PERL)_RDEPENDS += $(LIBSNMP) +$(eval $(call add_derived_package,$(LIBSNMP_BASE),$(LIBSNMP_PERL))) + +PYTHON_NETSNMP = python-netsnmp_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(PYTHON_NETSNMP)_DEPENDS += $(LIBSNMP) +$(PYTHON_NETSNMP)_RDEPENDS += $(LIBSNMP) +$(eval $(call add_derived_package,$(LIBSNMP_BASE),$(PYTHON_NETSNMP))) + +TKMIB = tkmib_$(SNMPD_VERSION_FULL)_all.deb +$(TKMIB)_DEPENDS += $(LIBSNMP_PERL) +$(TKMIB)_RDEPENDS += $(LIBSNMP_PERL) +$(eval $(call add_derived_package,$(LIBSNMP_BASE),$(TKMIB))) + +# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} +# are archived into debug one image to facilitate debugging. +# +DBG_SRC_ARCHIVE += snmpd + diff --git a/rules/socat.mk b/rules/socat.mk new file mode 100644 index 00000000000..3ee5d5d1c31 --- /dev/null +++ b/rules/socat.mk @@ -0,0 +1,9 @@ +# socat packages + +SOCAT_VERSION = 1.7.3.1-2+deb9u1 + +export SOCAT_VERSION + +SOCAT = socat_$(SOCAT_VERSION)_$(CONFIGURED_ARCH).deb +$(SOCAT)_SRC_PATH = $(SRC_PATH)/socat +SONIC_MAKE_DEBS += $(SOCAT) diff --git a/rules/sonic-config.mk b/rules/sonic-config.mk new file mode 100644 index 00000000000..854b577b336 --- /dev/null +++ b/rules/sonic-config.mk @@ -0,0 +1,7 @@ +# sonic-config-engine package + +SONIC_CONFIG_ENGINE = sonic_config_engine-1.0-py2-none-any.whl +$(SONIC_CONFIG_ENGINE)_SRC_PATH = $(SRC_PATH)/sonic-config-engine +$(SONIC_CONFIG_ENGINE)_DEPENDS += $(SWSSSDK_PY2) +$(SONIC_CONFIG_ENGINE)_PYTHON_VERSION = 2 +SONIC_PYTHON_WHEELS += $(SONIC_CONFIG_ENGINE) diff --git a/rules/sonic-daemon-base.mk b/rules/sonic-daemon-base.mk new file mode 100644 index 00000000000..5385c18f1f1 --- /dev/null +++ b/rules/sonic-daemon-base.mk @@ -0,0 +1,8 @@ +# SONIC_DAEMON_BASE_PY2 package + +SONIC_DAEMON_BASE_PY2 = sonic_daemon_base-1.0-py2-none-any.whl +$(SONIC_DAEMON_BASE_PY2)_SRC_PATH = $(SRC_PATH)/sonic-daemon-base +$(SONIC_DAEMON_BASE_PY2)_PYTHON_VERSION = 2 +SONIC_PYTHON_WHEELS += $(SONIC_DAEMON_BASE_PY2) + +export daemon_base_py2_wheel_path="$(addprefix $(PYTHON_WHEELS_PATH)/,$(SONIC_DAEMON_BASE_PY2))" diff --git a/rules/sonic-device-data.mk b/rules/sonic-device-data.mk new file mode 100644 index 00000000000..4a5bff1a6fa --- /dev/null +++ b/rules/sonic-device-data.mk @@ -0,0 +1,11 @@ +# sonic-device-data Debian package + +SONIC_DEVICE_DATA_VERSION = 1.0 +SONIC_DEVICE_DATA_VERSION_FULL = $(SONIC_DEVICE_DATA_VERSION)-1 + +export SONIC_DEVICE_DATA_VERSION SONIC_DEVICE_DATA_VERSION_FULL + +SONIC_DEVICE_DATA = sonic-device-data_$(SONIC_DEVICE_DATA_VERSION_FULL)_all.deb +$(SONIC_DEVICE_DATA)_SRC_PATH = $(SRC_PATH)/sonic-device-data +SONIC_MAKE_DEBS += $(SONIC_DEVICE_DATA) +SONIC_STRETCH_DEBS += $(SONIC_DEVICE_DATA) diff --git a/rules/sonic-ledd.mk b/rules/sonic-ledd.mk new file mode 100644 index 00000000000..056f0f6c9bd --- /dev/null +++ b/rules/sonic-ledd.mk @@ -0,0 +1,5 @@ +# sonic-ledd (SONiC Front-panel LED control daemon) Debian package + +SONIC_LEDD = python-sonic-ledd_1.1-1_all.deb +$(SONIC_LEDD)_SRC_PATH = $(SRC_PATH)/sonic-platform-daemons/sonic-ledd +SONIC_PYTHON_STDEB_DEBS += $(SONIC_LEDD) diff --git a/rules/sonic-platform-common.mk b/rules/sonic-platform-common.mk new file mode 100644 index 00000000000..043c820743a --- /dev/null +++ b/rules/sonic-platform-common.mk @@ -0,0 +1,14 @@ +# sonic-platform-common package + +SONIC_PLATFORM_COMMON_PY2 = sonic_platform_common-1.0-py2-none-any.whl +$(SONIC_PLATFORM_COMMON_PY2)_SRC_PATH = $(SRC_PATH)/sonic-platform-common +$(SONIC_PLATFORM_COMMON_PY2)_PYTHON_VERSION = 2 +SONIC_PYTHON_WHEELS += $(SONIC_PLATFORM_COMMON_PY2) + +# Als build sonic-platform-common into python3 wheel, so we can use PSU code in SNMP docker +SONIC_PLATFORM_COMMON_PY3 = sonic_platform_common-1.0-py3-none-any.whl +$(SONIC_PLATFORM_COMMON_PY3)_SRC_PATH = $(SRC_PATH)/sonic-platform-common +$(SONIC_PLATFORM_COMMON_PY3)_PYTHON_VERSION = 3 +# Synthetic dependency just to avoid race condition +$(SONIC_PLATFORM_COMMON_PY3)_DEPENDS = $(SONIC_PLATFORM_COMMON_PY2) +SONIC_PYTHON_WHEELS += $(SONIC_PLATFORM_COMMON_PY3) diff --git a/rules/sonic-psud.mk b/rules/sonic-psud.mk new file mode 100644 index 00000000000..0249115359f --- /dev/null +++ b/rules/sonic-psud.mk @@ -0,0 +1,5 @@ +# sonic-psud (SONiC PSU daemon) Debian package + +SONIC_PSUD = python-sonic-psud_1.0-1_all.deb +$(SONIC_PSUD)_SRC_PATH = $(SRC_PATH)/sonic-platform-daemons/sonic-psud +SONIC_PYTHON_STDEB_DEBS += $(SONIC_PSUD) diff --git a/rules/sonic-syseepromd.mk b/rules/sonic-syseepromd.mk new file mode 100644 index 00000000000..8f7a6e5e902 --- /dev/null +++ b/rules/sonic-syseepromd.mk @@ -0,0 +1,5 @@ +# sonic-syseepromd (SONiC Syseeprom gathering daemon) Debian package + +SONIC_SYSEEPROMD = python-sonic-syseepromd_1.0-1_all.deb +$(SONIC_SYSEEPROMD)_SRC_PATH = $(SRC_PATH)/sonic-platform-daemons/sonic-syseepromd +SONIC_PYTHON_STDEB_DEBS += $(SONIC_SYSEEPROMD) diff --git a/rules/sonic-utilities.mk b/rules/sonic-utilities.mk new file mode 100644 index 00000000000..eba618d051d --- /dev/null +++ b/rules/sonic-utilities.mk @@ -0,0 +1,16 @@ +# sonic utilities package +# +# NOTE: sonic-config-engine is a build-time dependency of sonic-utilities +# due to unit tests which are run during the build. However, +# sonic-platform-common and swsssdk are runtime dependencies, and should be +# added here also. However, the current build system assumes all runtime +# dependencies are .deb packages. +# +# TODO: Create a way to specify both .deb and .whl runtime dependencies +# then add the aforementioned runtime dependencies here. +# + +SONIC_UTILS = python-sonic-utilities_1.2-1_all.deb +$(SONIC_UTILS)_SRC_PATH = $(SRC_PATH)/sonic-utilities +$(SONIC_UTILS)_WHEEL_DEPENDS = $(SONIC_CONFIG_ENGINE) +SONIC_PYTHON_STDEB_DEBS += $(SONIC_UTILS) diff --git a/rules/sonic-xcvrd.mk b/rules/sonic-xcvrd.mk new file mode 100644 index 00000000000..b97f8dd11b7 --- /dev/null +++ b/rules/sonic-xcvrd.mk @@ -0,0 +1,5 @@ +# sonic-xcvrd (SONiC Transceiver monitoring daemon) Debian package + +SONIC_XCVRD = python-sonic-xcvrd_1.0-1_all.deb +$(SONIC_XCVRD)_SRC_PATH = $(SRC_PATH)/sonic-platform-daemons/sonic-xcvrd +SONIC_PYTHON_STDEB_DEBS += $(SONIC_XCVRD) diff --git a/rules/supervisor.mk b/rules/supervisor.mk new file mode 100644 index 00000000000..cd97eabf801 --- /dev/null +++ b/rules/supervisor.mk @@ -0,0 +1,9 @@ +# supervisor package + +SUPERVISOR_VERSION = 3.3.3 + +export SUPERVISOR_VERSION + +SUPERVISOR = python-supervisor_$(SUPERVISOR_VERSION)-1_all.deb +$(SUPERVISOR)_SRC_PATH = $(SRC_PATH)/supervisor +SONIC_MAKE_DEBS += $(SUPERVISOR) diff --git a/rules/swig.mk b/rules/swig.mk new file mode 100644 index 00000000000..c5c3c27b6f4 --- /dev/null +++ b/rules/swig.mk @@ -0,0 +1,22 @@ +# swig + +SWIG_VERSION_BASE = 3.0 +SWIG_VERSION = $(SWIG_VERSION_BASE).12 +SWIG_SUBVERSION = 2 + +export SWIG_VERSION_BASE +export SWIG_VERSION +export SWIG_SUBVERSION + +SWIG_BASE = swig$(SWIG_VERSION_BASE)_$(SWIG_VERSION)-$(SWIG_SUBVERSION)_$(CONFIGURED_ARCH).deb +$(SWIG_BASE)_SRC_PATH = $(SRC_PATH)/swig +SONIC_MAKE_DEBS += $(SWIG_BASE) +SONIC_STRETCH_DEBS += $(SWIG_BASE) + +SWIG = swig_$(SWIG_VERSION)-$(SWIG_SUBVERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(SWIG_BASE),$(SWIG))) + +SWIG_DBG = swig$(SWIG_VERSION_BASE)-dbgsym_$(SWIG_VERSION)-$(SWIG_SUBVERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(SWIG_BASE),$(SWIG_DBG))) + +export SWIG_BASE SWIG SWIG_DBG diff --git a/rules/swss-common.mk b/rules/swss-common.mk new file mode 100644 index 00000000000..2d49867f939 --- /dev/null +++ b/rules/swss-common.mk @@ -0,0 +1,27 @@ +# libswsscommon package + +LIBSWSSCOMMON = libswsscommon_1.0.0_$(CONFIGURED_ARCH).deb +$(LIBSWSSCOMMON)_SRC_PATH = $(SRC_PATH)/sonic-swss-common +$(LIBSWSSCOMMON)_DEPENDS += $(LIBHIREDIS_DEV) $(LIBNL3_DEV) $(LIBNL_GENL3_DEV) \ + $(LIBNL_ROUTE3_DEV) $(LIBNL_NF3_DEV) \ + $(LIBNL_CLI_DEV) $(SWIG) +$(LIBSWSSCOMMON)_RDEPENDS += $(LIBHIREDIS) $(LIBNL3) $(LIBNL_GENL3) \ + $(LIBNL_ROUTE3) $(LIBNL_NF3) $(LIBNL_CLI) +SONIC_DPKG_DEBS += $(LIBSWSSCOMMON) + +LIBSWSSCOMMON_DEV = libswsscommon-dev_1.0.0_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBSWSSCOMMON),$(LIBSWSSCOMMON_DEV))) + +PYTHON_SWSSCOMMON = python-swsscommon_1.0.0_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBSWSSCOMMON),$(PYTHON_SWSSCOMMON))) + +LIBSWSSCOMMON_DBG = libswsscommon-dbg_1.0.0_$(CONFIGURED_ARCH).deb +$(LIBSWSSCOMMON_DBG)_DEPENDS += $(LIBSWSSCOMMON) +$(LIBSWSSCOMMON_DBG)_RDEPENDS += $(LIBSWSSCOMMON) +$(eval $(call add_derived_package,$(LIBSWSSCOMMON),$(LIBSWSSCOMMON_DBG))) + +# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} +# are archived into debug one image to facilitate debugging. +# +DBG_SRC_ARCHIVE += sonic-swss-common + diff --git a/rules/swss.mk b/rules/swss.mk new file mode 100644 index 00000000000..f8044d77fb6 --- /dev/null +++ b/rules/swss.mk @@ -0,0 +1,19 @@ +# swss package + +SWSS = swss_1.0.0_$(CONFIGURED_ARCH).deb +$(SWSS)_SRC_PATH = $(SRC_PATH)/sonic-swss +$(SWSS)_DEPENDS += $(LIBSAIREDIS_DEV) $(LIBSAIMETADATA_DEV) $(LIBTEAM_DEV) \ + $(LIBTEAMDCT) $(LIBTEAM_UTILS) $(LIBSWSSCOMMON_DEV) +$(SWSS)_RDEPENDS += $(LIBSAIREDIS) $(LIBSAIMETADATA) $(LIBTEAM) $(LIBSWSSCOMMON) $(PYTHON_SWSSCOMMON) +SONIC_DPKG_DEBS += $(SWSS) + +SWSS_DBG = swss-dbg_1.0.0_$(CONFIGURED_ARCH).deb +$(SWSS_DBG)_DEPENDS += $(SWSS) +$(SWSS_DBG)_RDEPENDS += $(SWSS) +$(eval $(call add_derived_package,$(SWSS),$(SWSS_DBG))) + +# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} +# are archived into debug one image to facilitate debugging. +# +DBG_SRC_ARCHIVE += sonic-swss + diff --git a/rules/swsssdk-py2.mk b/rules/swsssdk-py2.mk new file mode 100644 index 00000000000..a45677ae588 --- /dev/null +++ b/rules/swsssdk-py2.mk @@ -0,0 +1,6 @@ +# swsssdk python2 wheel + +SWSSSDK_PY2 = swsssdk-2.0.1-py2-none-any.whl +$(SWSSSDK_PY2)_SRC_PATH = $(SRC_PATH)/sonic-py-swsssdk +$(SWSSSDK_PY2)_PYTHON_VERSION = 2 +SONIC_PYTHON_WHEELS += $(SWSSSDK_PY2) diff --git a/rules/swsssdk-py3.mk b/rules/swsssdk-py3.mk new file mode 100644 index 00000000000..e2f3519e00c --- /dev/null +++ b/rules/swsssdk-py3.mk @@ -0,0 +1,8 @@ +# swsssdk python3 wheel + +SWSSSDK_PY3 = swsssdk-2.0.1-py3-none-any.whl +$(SWSSSDK_PY3)_SRC_PATH = $(SRC_PATH)/sonic-py-swsssdk +$(SWSSSDK_PY3)_PYTHON_VERSION = 3 +# Synthetic dependency just to avoid race condition +$(SWSSSDK_PY3)_DEPENDS += $(SWSSSDK_PY2) +SONIC_PYTHON_WHEELS += $(SWSSSDK_PY3) diff --git a/rules/systemd-sonic-generator.mk b/rules/systemd-sonic-generator.mk new file mode 100644 index 00000000000..cea08099177 --- /dev/null +++ b/rules/systemd-sonic-generator.mk @@ -0,0 +1,3 @@ +SYSTEMD_SONIC_GENERATOR = systemd-sonic-generator_1.0.0_$(CONFIGURED_ARCH).deb +$(SYSTEMD_SONIC_GENERATOR)_SRC_PATH = $(SRC_PATH)/systemd-sonic-generator +SONIC_MAKE_DEBS += $(SYSTEMD_SONIC_GENERATOR) diff --git a/rules/tacacs.mk b/rules/tacacs.mk new file mode 100644 index 00000000000..c32504f6cd4 --- /dev/null +++ b/rules/tacacs.mk @@ -0,0 +1,37 @@ +# libpam-tacplus packages + +PAM_TACPLUS_VERSION = 1.4.1-1 + +export PAM_TACPLUS_VERSION + +LIBTAC2 = libtac2_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBTAC2)_SRC_PATH = $(SRC_PATH)/tacacs/pam +SONIC_MAKE_DEBS += $(LIBTAC2) + +LIBPAM_TACPLUS = libpam-tacplus_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBPAM_TACPLUS)_RDEPENDS += $(LIBTAC2) +$(eval $(call add_extra_package,$(LIBTAC2),$(LIBPAM_TACPLUS))) + +LIBTAC_DEV = libtac-dev_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBTAC_DEV)_DEPENDS += $(LIBTAC2) +$(eval $(call add_derived_package,$(LIBTAC2),$(LIBTAC_DEV))) + + + +# libnss-tacplus packages +NSS_TACPLUS_VERSION = 1.0.4-1 + +export NSS_TACPLUS_VERSION + +LIBNSS_TACPLUS = libnss-tacplus_$(NSS_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBNSS_TACPLUS)_DEPENDS += $(LIBTAC_DEV) +$(LIBNSS_TACPLUS)_RDEPENDS += $(LIBTAC2) +$(LIBNSS_TACPLUS)_SRC_PATH = $(SRC_PATH)/tacacs/nss +SONIC_MAKE_DEBS += $(LIBNSS_TACPLUS) + +SONIC_STRETCH_DEBS += $(LIBPAM_TACPLUS) $(LIBNSS_TACPLUS) + +# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} +# are archived into debug one image to facilitate debugging. +# +DBG_SRC_ARCHIVE += tacacs diff --git a/rules/telemetry.mk b/rules/telemetry.mk new file mode 100644 index 00000000000..1d903e60325 --- /dev/null +++ b/rules/telemetry.mk @@ -0,0 +1,5 @@ +# SONiC telemetry package + +SONIC_TELEMETRY = sonic-telemetry_0.1_$(CONFIGURED_ARCH).deb +$(SONIC_TELEMETRY)_SRC_PATH = $(SRC_PATH)/telemetry +SONIC_DPKG_DEBS += $(SONIC_TELEMETRY) diff --git a/rules/thrift.mk b/rules/thrift.mk new file mode 100644 index 00000000000..92d7ab2eeb0 --- /dev/null +++ b/rules/thrift.mk @@ -0,0 +1,17 @@ +# thrift package + +THRIFT_VERSION = 0.11.0 +THRIFT_VERSION_FULL = $(THRIFT_VERSION)-4 + +LIBTHRIFT = libthrift-$(THRIFT_VERSION)_$(THRIFT_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(LIBTHRIFT)_SRC_PATH = $(SRC_PATH)/thrift +SONIC_MAKE_DEBS += $(LIBTHRIFT) + +LIBTHRIFT_DEV = libthrift-dev_$(THRIFT_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBTHRIFT),$(LIBTHRIFT_DEV))) + +PYTHON_THRIFT = python-thrift_$(THRIFT_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBTHRIFT),$(PYTHON_THRIFT))) + +THRIFT_COMPILER = thrift-compiler_$(THRIFT_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBTHRIFT),$(THRIFT_COMPILER))) diff --git a/scripts/build_kvm_image.sh b/scripts/build_kvm_image.sh new file mode 100755 index 00000000000..a8ae21c9777 --- /dev/null +++ b/scripts/build_kvm_image.sh @@ -0,0 +1,86 @@ +#!/bin/bash -ex + +# Copyright (C) 2014 Curt Brune +# +# SPDX-License-Identifier: GPL-2.0 + +MEM=3072 +DISK=$1 +ONIE_RECOVERY_ISO=$2 +INSTALLER=$3 +DISK_SIZE=$4 + +INSTALLER_DISK="./sonic-installer.img" + +# VM will listen on telnet port $KVM_PORT +KVM_PORT=9000 + +on_exit() +{ + rm -f $kvm_log +} + +kvm_log=$(mktemp) +trap on_exit EXIT + +create_disk() +{ + echo "Creating SONiC kvm disk : $DISK of size $DISK_SIZE GB" + qemu-img create -f qcow2 $DISK ${DISK_SIZE}G +} + +prepare_installer_disk() +{ + fallocate -l 1024M $INSTALLER_DISK + + mkfs.vfat $INSTALLER_DISK + + tmpdir=$(mktemp -d) + + mount -o loop $INSTALLER_DISK $tmpdir + + cp $INSTALLER $tmpdir/onie-installer.bin + + umount $tmpdir +} + +create_disk +prepare_installer_disk + +echo "Prepare memory for KVM build: $vs_build_prepare_mem" +free -m +if [[ "$vs_build_prepare_mem" == "yes" ]]; then + # Force o.s. to drop cache and compact memory so that KVM can get 2G memory + sudo bash -c 'echo 1 > /proc/sys/vm/drop_caches' + sudo bash -c 'echo 1 > /proc/sys/vm/compact_memory' + free -m +fi + +/usr/bin/kvm -m $MEM \ + -name "onie" \ + -boot "order=cd,once=d" -cdrom "$ONIE_RECOVERY_ISO" \ + -device e1000,netdev=onienet \ + -netdev user,id=onienet,hostfwd=:0.0.0.0:3041-:22 \ + -vnc 0.0.0.0:0 \ + -vga std \ + -drive file=$DISK,media=disk,if=virtio,index=0 \ + -drive file=$INSTALLER_DISK,if=virtio,index=1 \ + -serial telnet:127.0.0.1:$KVM_PORT,server > $kvm_log 2>&1 & + +kvm_pid=$! + +sleep 2.0 + +[ -d "/proc/$kvm_pid" ] || { + echo "ERROR: kvm died." + cat $kvm_log + exit 1 +} + +echo "to kill kvm: sudo kill $kvm_pid" + +./check_install.py -u $SONIC_USERNAME -P $PASSWD -p $KVM_PORT + +kill $kvm_pid + +exit 0 diff --git a/scripts/dbg_files.sh b/scripts/dbg_files.sh new file mode 100755 index 00000000000..6624fca83f3 --- /dev/null +++ b/scripts/dbg_files.sh @@ -0,0 +1,12 @@ +#!/bin/bash + +# Provide file paths to archive for debug image as relative to src subdir +# +if [ "$DEBUG_IMG" == "y" ] +then + for i in $DEBUG_SRC_ARCHIVE_DIRS + do + find src/$i/ -name "*.c" -o -name "*.cpp" -o -name "*.h" -o -name "*.hpp" -type f + done | tar -czf $DEBUG_SRC_ARCHIVE_FILE -T - +fi + diff --git a/scripts/wait_for_docker.sh b/scripts/wait_for_docker.sh new file mode 100755 index 00000000000..74464673282 --- /dev/null +++ b/scripts/wait_for_docker.sh @@ -0,0 +1,15 @@ +#!/bin/bash + +total_time=$1 +cnt=0 +while [ $cnt -le $total_time ]; do + docker info 1>/dev/null + rv=$? + if [ $rv -eq 0 ]; then + exit 0 + fi + sleep 1 + cnt=$((cnt+1)) +done + +exit 1 diff --git a/slave.mk b/slave.mk new file mode 100644 index 00000000000..f81895f74dd --- /dev/null +++ b/slave.mk @@ -0,0 +1,776 @@ +############################################################################### +## Presettings +############################################################################### + +# Select bash for commands +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e +USER = $(shell id -un) +UID = $(shell id -u) +GUID = $(shell id -g) +SONIC_GET_VERSION=$(shell export BUILD_TIMESTAMP=$(BUILD_TIMESTAMP) && export BUILD_NUMBER=$(BUILD_NUMBER) && . functions.sh && sonic_get_version) + +.SECONDEXPANSION: + +NULL := +SPACE := $(NULL) $(NULL) + +############################################################################### +## General definitions +############################################################################### + +SRC_PATH = src +RULES_PATH = rules +TARGET_PATH = target +DOCKERS_PATH = dockers +ifdef BLDENV +DEBS_PATH = $(TARGET_PATH)/debs/$(BLDENV) +FILES_PATH = $(TARGET_PATH)/files/$(BLDENV) +else +DEBS_PATH = $(TARGET_PATH)/debs +FILES_PATH = $(TARGET_PATH)/files +endif +PYTHON_DEBS_PATH = $(TARGET_PATH)/python-debs +PYTHON_WHEELS_PATH = $(TARGET_PATH)/python-wheels +PROJECT_ROOT = $(shell pwd) +STRETCH_DEBS_PATH = $(TARGET_PATH)/debs/stretch +STRETCH_FILES_PATH = $(TARGET_PATH)/files/stretch +DBG_IMAGE_MARK = dbg +DBG_SRC_ARCHIVE_FILE = $(TARGET_PATH)/sonic_src.tar.gz + +CONFIGURED_PLATFORM := $(shell [ -f .platform ] && cat .platform || echo generic) +PLATFORM_PATH = platform/$(CONFIGURED_PLATFORM) +CONFIGURED_ARCH := $(shell [ -f .arch ] && cat .arch || echo amd64) +ifeq ($(PLATFORM_ARCH),) + override PLATFORM_ARCH = $(CONFIGURED_ARCH) +endif +export BUILD_NUMBER +export BUILD_TIMESTAMP +export CONFIGURED_PLATFORM +export CONFIGURED_ARCH + +############################################################################### +## Utility rules +## Define configuration, help etc. +############################################################################### + +.platform : +ifneq ($(CONFIGURED_PLATFORM),generic) + @echo Build system is not configured, please run make configure + @exit 1 +endif + +configure : + @mkdir -p target/debs + @mkdir -p target/debs/stretch + @mkdir -p target/files + @mkdir -p target/files/stretch + @mkdir -p target/python-debs + @mkdir -p target/python-wheels + @echo $(PLATFORM) > .platform + @echo $(PLATFORM_ARCH) > .arch + +distclean : .platform clean + @rm -f .platform + @rm -f .arch + +list : + @$(foreach target,$(SONIC_TARGET_LIST),echo $(target);) + +############################################################################### +## Include other rules +############################################################################### + +include $(RULES_PATH)/config + +ifeq ($(SONIC_ENABLE_PFCWD_ON_START),y) +ENABLE_PFCWD_ON_START = y +endif + +ifeq ($(SONIC_ENABLE_SYSTEM_TELEMETRY),y) +ENABLE_SYSTEM_TELEMETRY = y +endif + +ifneq (,$(filter $(CONFIGURED_ARCH), armhf arm64)) + # Workaround: Force disable Telmetry for ARM, will be removed after fixing issue + # Issue: qemu crashes when it uses "go get url" + # Qemu Support: https://bugs.launchpad.net/qemu/+bug/1838946 + # Golang Support: https://groups.google.com/forum/?utm_medium=email&utm_source=footer#!topic/golang-nuts/1txPOGa4aGc +ENABLE_SYSTEM_TELEMETRY = N +endif + +ifeq ($(SONIC_ENABLE_SYNCD_RPC),y) +ENABLE_SYNCD_RPC = y +endif + +ifeq ($(SONIC_INSTALL_DEBUG_TOOLS),y) +INSTALL_DEBUG_TOOLS = y +endif + +ifeq ($(SONIC_ENABLE_SFLOW),y) +ENABLE_SFLOW = y +endif + +include $(RULES_PATH)/functions +include $(RULES_PATH)/*.mk +ifneq ($(CONFIGURED_PLATFORM), undefined) +include $(PLATFORM_PATH)/rules.mk +endif + +ifeq ($(USERNAME),) +override USERNAME := $(DEFAULT_USERNAME) +else +$(warning USERNAME given on command line: could be visible to other users) +endif + +ifeq ($(PASSWORD),) +override PASSWORD := $(DEFAULT_PASSWORD) +else +$(warning PASSWORD given on command line: could be visible to other users) +endif + +ifeq ($(SONIC_DEBUGGING_ON),y) +DEB_BUILD_OPTIONS_GENERIC := nostrip +endif + +ifeq ($(SONIC_PROFILING_ON),y) +DEB_BUILD_OPTIONS_GENERIC := nostrip noopt +endif + +ifeq ($(SONIC_BUILD_JOBS),) +override SONIC_BUILD_JOBS := $(SONIC_CONFIG_BUILD_JOBS) +endif + +ifeq ($(VS_PREPARE_MEM),) +override VS_PREPARE_MEM := $(DEFAULT_VS_PREPARE_MEM) +endif + +ifeq ($(KERNEL_PROCURE_METHOD),) +override KERNEL_PROCURE_METHOD := $(DEFAULT_KERNEL_PROCURE_METHOD) +endif + +MAKEFLAGS += -j $(SONIC_BUILD_JOBS) +export SONIC_CONFIG_MAKE_JOBS + +############################################################################### +## Routing stack related exports +############################################################################### + +export SONIC_ROUTING_STACK +export FRR_USER_UID +export FRR_USER_GID + +############################################################################### +## Dumping key config attributes associated to current building exercise +############################################################################### + +$(info SONiC Build System) +$(info ) +$(info Build Configuration) +$(info "CONFIGURED_PLATFORM" : "$(if $(PLATFORM),$(PLATFORM),$(CONFIGURED_PLATFORM))") +$(info "CONFIGURED_ARCH" : "$(if $(PLATFORM_ARCH),$(PLATFORM_ARCH),$(CONFIGURED_ARCH))") +$(info "SONIC_CONFIG_PRINT_DEPENDENCIES" : "$(SONIC_CONFIG_PRINT_DEPENDENCIES)") +$(info "SONIC_BUILD_JOBS" : "$(SONIC_BUILD_JOBS)") +$(info "SONIC_CONFIG_MAKE_JOBS" : "$(SONIC_CONFIG_MAKE_JOBS)") +$(info "SONIC_USE_DOCKER_BUILDKIT" : "$(SONIC_USE_DOCKER_BUILDKIT)") +$(info "USERNAME" : "$(USERNAME)") +$(info "PASSWORD" : "$(PASSWORD)") +$(info "ENABLE_DHCP_GRAPH_SERVICE" : "$(ENABLE_DHCP_GRAPH_SERVICE)") +$(info "SHUTDOWN_BGP_ON_START" : "$(SHUTDOWN_BGP_ON_START)") +$(info "ENABLE_PFCWD_ON_START" : "$(ENABLE_PFCWD_ON_START)") +$(info "INSTALL_DEBUG_TOOLS" : "$(INSTALL_DEBUG_TOOLS)") +$(info "ROUTING_STACK" : "$(SONIC_ROUTING_STACK)") +ifeq ($(SONIC_ROUTING_STACK),frr) +$(info "FRR_USER_UID" : "$(FRR_USER_UID)") +$(info "FRR_USER_GID" : "$(FRR_USER_GID)") +endif +$(info "ENABLE_SYNCD_RPC" : "$(ENABLE_SYNCD_RPC)") +$(info "ENABLE_ORGANIZATION_EXTENSIONS" : "$(ENABLE_ORGANIZATION_EXTENSIONS)") +$(info "HTTP_PROXY" : "$(HTTP_PROXY)") +$(info "HTTPS_PROXY" : "$(HTTPS_PROXY)") +$(info "ENABLE_SYSTEM_TELEMETRY" : "$(ENABLE_SYSTEM_TELEMETRY)") +$(info "SONIC_DEBUGGING_ON" : "$(SONIC_DEBUGGING_ON)") +$(info "SONIC_PROFILING_ON" : "$(SONIC_PROFILING_ON)") +$(info "KERNEL_PROCURE_METHOD" : "$(KERNEL_PROCURE_METHOD)") +$(info "BUILD_TIMESTAMP" : "$(BUILD_TIMESTAMP)") +$(info "BLDENV" : "$(BLDENV)") +$(info "VS_PREPARE_MEM" : "$(VS_PREPARE_MEM)") +$(info "ENABLE_SFLOW" : "$(ENABLE_SFLOW)") +$(info ) + +ifeq ($(SONIC_USE_DOCKER_BUILDKIT),y) +$(warning "Using SONIC_USE_DOCKER_BUILDKIT will produce larger installable SONiC image because of a docker bug (more details: https://github.com/moby/moby/issues/38903)") +export DOCKER_BUILDKIT=1 +endif + + +############################################################################### +## Generic rules section +## All rules must go after includes for propper targets expansion +############################################################################### + +export kernel_procure_method=$(KERNEL_PROCURE_METHOD) +export vs_build_prepare_mem=$(VS_PREPARE_MEM) + +############################################################################### +## Local targets +############################################################################### + +# Copy debian packages from local directory +# Add new package for copy: +# SOME_NEW_DEB = some_new_deb.deb +# $(SOME_NEW_DEB)_PATH = path/to/some_new_deb.deb +# SONIC_COPY_DEBS += $(SOME_NEW_DEB) +$(addprefix $(DEBS_PATH)/, $(SONIC_COPY_DEBS)) : $(DEBS_PATH)/% : .platform + $(HEADER) + $(foreach deb,$* $($*_DERIVED_DEBS), \ + { cp $($(deb)_PATH)/$(deb) $(DEBS_PATH)/ $(LOG) || exit 1 ; } ; ) + $(FOOTER) + + +SONIC_TARGET_LIST += $(addprefix $(DEBS_PATH)/, $(SONIC_COPY_DEBS)) + +# Copy regular files from local directory +# Add new package for copy: +# SOME_NEW_FILE = some_new_file +# $(SOME_NEW_FILE)_PATH = path/to/some_new_file +# SONIC_COPY_FILES += $(SOME_NEW_FILE) +$(addprefix $(FILES_PATH)/, $(SONIC_COPY_FILES)) : $(FILES_PATH)/% : .platform + $(HEADER) + cp $($*_PATH)/$* $(FILES_PATH)/ $(LOG) || exit 1 + $(FOOTER) + +SONIC_TARGET_LIST += $(addprefix $(FILES_PATH)/, $(SONIC_COPY_FILES)) + +############################################################################### +## Online targets +############################################################################### + +# Download debian packages from online location +# Add new package for download: +# SOME_NEW_DEB = some_new_deb.deb +# $(SOME_NEW_DEB)_URL = https://url/to/this/deb.deb +# SONIC_ONLINE_DEBS += $(SOME_NEW_DEB) +$(addprefix $(DEBS_PATH)/, $(SONIC_ONLINE_DEBS)) : $(DEBS_PATH)/% : .platform + $(HEADER) + $(foreach deb,$* $($*_DERIVED_DEBS), \ + { wget --no-use-server-timestamps -O $(DEBS_PATH)/$(deb) $($(deb)_URL) $(LOG) || exit 1 ; } ; ) + $(FOOTER) + +SONIC_TARGET_LIST += $(addprefix $(DEBS_PATH)/, $(SONIC_ONLINE_DEBS)) + +# Download regular files from online location +# Files are stored in deb packages directory for convenience +# Add new file for download: +# SOME_NEW_FILE = some_new_file +# $(SOME_NEW_FILE)_URL = https://url/to/this/file +# SONIC_ONLINE_FILES += $(SOME_NEW_FILE) +$(addprefix $(FILES_PATH)/, $(SONIC_ONLINE_FILES)) : $(FILES_PATH)/% : .platform + $(HEADER) + wget --no-use-server-timestamps -O $@ $($*_URL) $(LOG) + $(FOOTER) + +SONIC_TARGET_LIST += $(addprefix $(FILES_PATH)/, $(SONIC_ONLINE_FILES)) + +############################################################################### +## Build targets +############################################################################### + +# Build project using build.sh script +# They are essentially a one-time build projects that get sources from some URL +# and compile them +# Add new file for build: +# SOME_NEW_FILE = some_new_deb.deb +# $(SOME_NEW_FILE)_SRC_PATH = $(SRC_PATH)/project_name +# $(SOME_NEW_FILE)_DEPENDS = $(SOME_OTHER_DEB1) $(SOME_OTHER_DEB2) ... +# SONIC_MAKE_FILES += $(SOME_NEW_FILE) +$(addprefix $(FILES_PATH)/, $(SONIC_MAKE_FILES)) : $(FILES_PATH)/% : .platform $$(addsuffix -install,$$(addprefix $(DEBS_PATH)/,$$($$*_DEPENDS))) + $(HEADER) + # Remove target to force rebuild + rm -f $(addprefix $(FILES_PATH)/, $*) + # Apply series of patches if exist + if [ -f $($*_SRC_PATH).patch/series ]; then pushd $($*_SRC_PATH) && QUILT_PATCHES=../$(notdir $($*_SRC_PATH)).patch quilt push -a; popd; fi + # Build project and take package + make DEST=$(shell pwd)/$(FILES_PATH) -C $($*_SRC_PATH) $(shell pwd)/$(FILES_PATH)/$* $(LOG) + # Clean up + if [ -f $($*_SRC_PATH).patch/series ]; then pushd $($*_SRC_PATH) && quilt pop -a -f; popd; fi + $(FOOTER) + +SONIC_TARGET_LIST += $(addprefix $(FILES_PATH)/, $(SONIC_MAKE_FILES)) + +############################################################################### +## Debian package related targets +############################################################################### + +# Build project using build.sh script +# They are essentially a one-time build projects that get sources from some URL +# and compile them +# Add new package for build: +# SOME_NEW_DEB = some_new_deb.deb +# $(SOME_NEW_DEB)_SRC_PATH = $(SRC_PATH)/project_name +# $(SOME_NEW_DEB)_DEPENDS = $(SOME_OTHER_DEB1) $(SOME_OTHER_DEB2) ... +# SONIC_MAKE_DEBS += $(SOME_NEW_DEB) +$(addprefix $(DEBS_PATH)/, $(SONIC_MAKE_DEBS)) : $(DEBS_PATH)/% : .platform $$(addsuffix -install,$$(addprefix $(DEBS_PATH)/,$$($$*_DEPENDS))) + $(HEADER) + # Remove target to force rebuild + rm -f $(addprefix $(DEBS_PATH)/, $* $($*_DERIVED_DEBS) $($*_EXTRA_DEBS)) + # Apply series of patches if exist + if [ -f $($*_SRC_PATH).patch/series ]; then pushd $($*_SRC_PATH) && QUILT_PATCHES=../$(notdir $($*_SRC_PATH)).patch quilt push -a; popd; fi + # Build project and take package + DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC}" make DEST=$(shell pwd)/$(DEBS_PATH) -C $($*_SRC_PATH) $(shell pwd)/$(DEBS_PATH)/$* $(LOG) + # Clean up + if [ -f $($*_SRC_PATH).patch/series ]; then pushd $($*_SRC_PATH) && quilt pop -a -f; popd; fi + $(FOOTER) + +SONIC_TARGET_LIST += $(addprefix $(DEBS_PATH)/, $(SONIC_MAKE_DEBS)) + +# Build project with dpkg-buildpackage +# Add new package for build: +# SOME_NEW_DEB = some_new_deb.deb +# $(SOME_NEW_DEB)_SRC_PATH = $(SRC_PATH)/project_name +# $(SOME_NEW_DEB)_DEPENDS = $(SOME_OTHER_DEB1) $(SOME_OTHER_DEB2) ... +# SONIC_DPKG_DEBS += $(SOME_NEW_DEB) +$(addprefix $(DEBS_PATH)/, $(SONIC_DPKG_DEBS)) : $(DEBS_PATH)/% : .platform $$(addsuffix -install,$$(addprefix $(DEBS_PATH)/,$$($$*_DEPENDS))) + $(HEADER) + # Remove old build logs if they exist + rm -f $($*_SRC_PATH)/debian/*.debhelper.log + # Apply series of patches if exist + if [ -f $($*_SRC_PATH).patch/series ]; then pushd $($*_SRC_PATH) && QUILT_PATCHES=../$(notdir $($*_SRC_PATH)).patch quilt push -a; popd; fi + # Build project + pushd $($*_SRC_PATH) $(LOG) + [ ! -f ./autogen.sh ] || ./autogen.sh $(LOG) + $(if $($*_DPKG_TARGET), + DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC} ${$*_DEB_BUILD_OPTIONS}" dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --as-root -T$($*_DPKG_TARGET) $(LOG), + DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC} ${$*_DEB_BUILD_OPTIONS}" dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) $(LOG) + ) + popd $(LOG) + # Clean up + if [ -f $($*_SRC_PATH).patch/series ]; then pushd $($*_SRC_PATH) && quilt pop -a -f; popd; fi + # Take built package(s) + mv $(addprefix $($*_SRC_PATH)/../, $* $($*_DERIVED_DEBS) $($*_EXTRA_DEBS)) $(DEBS_PATH) $(LOG) + $(FOOTER) + +SONIC_TARGET_LIST += $(addprefix $(DEBS_PATH)/, $(SONIC_DPKG_DEBS)) + +# Rules for derived debian packages (dev, dbg, etc.) +# All noise takes place in main deb recipe, so we are just telling that +# we depend on it and move our deb to other targets +# Add new dev package: +# $(eval $(call add_derived_package,$(ORIGINAL_DEB),derived_deb_file.deb)) +$(addprefix $(DEBS_PATH)/, $(SONIC_DERIVED_DEBS)) : $(DEBS_PATH)/% : .platform $$(addsuffix -install,$$(addprefix $(DEBS_PATH)/,$$($$*_DEPENDS))) + $(HEADER) + # All noise takes place in main deb recipe, so we are just telling that + # we depend on it + # Put newer timestamp + [ -f $@ ] && touch $@ + $(FOOTER) + +SONIC_TARGET_LIST += $(addprefix $(DEBS_PATH)/, $(SONIC_DERIVED_DEBS)) + +# Rules for extra debian packages +# All noise takes place in main deb recipe, so we are just telling that +# we need to build the main deb and move our deb to other targets +# Add new dev package: +# $(eval $(call add_extra_package,$(ORIGINAL_DEB),extra_deb_file.deb)) +$(addprefix $(DEBS_PATH)/, $(SONIC_EXTRA_DEBS)) : $(DEBS_PATH)/% : .platform $$(addprefix $(DEBS_PATH)/,$$($$*_MAIN_DEB)) + $(HEADER) + # All noise takes place in main deb recipe, so we are just telling that + # we depend on it + # Put newer timestamp + [ -f $@ ] && touch $@ + $(FOOTER) + +SONIC_TARGET_LIST += $(addprefix $(DEBS_PATH)/, $(SONIC_EXTRA_DEBS)) + +# Targets for installing debian packages prior to build one that depends on them +SONIC_INSTALL_TARGETS = $(addsuffix -install,$(addprefix $(DEBS_PATH)/, \ + $(SONIC_ONLINE_DEBS) \ + $(SONIC_COPY_DEBS) \ + $(SONIC_MAKE_DEBS) \ + $(SONIC_DPKG_DEBS) \ + $(SONIC_PYTHON_STDEB_DEBS) \ + $(SONIC_DERIVED_DEBS) \ + $(SONIC_EXTRA_DEBS))) +$(SONIC_INSTALL_TARGETS) : $(DEBS_PATH)/%-install : .platform $$(addsuffix -install,$$(addprefix $(DEBS_PATH)/,$$($$*_DEPENDS))) $(DEBS_PATH)/$$* + $(HEADER) + [ -f $(DEBS_PATH)/$* ] || { echo $(DEBS_PATH)/$* does not exist $(LOG) && false $(LOG) } + # put a lock here because dpkg does not allow installing packages in parallel + while true; do + if mkdir $(DEBS_PATH)/dpkg_lock &> /dev/null; then + { sudo dpkg -i $(DEBS_PATH)/$* $(LOG) && rm -d $(DEBS_PATH)/dpkg_lock && break; } || { rm -d $(DEBS_PATH)/dpkg_lock && exit 1 ; } + fi + done + $(FOOTER) + +############################################################################### +## Python packages +############################################################################### + +# Build project with python setup.py --command-packages=stdeb.command +# Add new package for build: +# SOME_NEW_DEB = some_new_deb.deb +# $(SOME_NEW_DEB)_SRC_PATH = $(SRC_PATH)/project_name +# $(SOME_NEW_DEB)_DEPENDS = $(SOME_OTHER_DEB1) $(SOME_OTHER_DEB2) ... +# SONIC_PYTHON_STDEB_DEBS += $(SOME_NEW_DEB) +$(addprefix $(PYTHON_DEBS_PATH)/, $(SONIC_PYTHON_STDEB_DEBS)) : $(PYTHON_DEBS_PATH)/% : .platform \ + $$(addsuffix -install,$$(addprefix $(PYTHON_DEBS_PATH)/,$$($$*_DEPENDS))) \ + $$(addsuffix -install,$$(addprefix $(PYTHON_WHEELS_PATH)/,$$($$*_WHEEL_DEPENDS))) + $(HEADER) + # Apply series of patches if exist + if [ -f $($*_SRC_PATH).patch/series ]; then pushd $($*_SRC_PATH) && QUILT_PATCHES=../$(notdir $($*_SRC_PATH)).patch quilt push -a; popd; fi + # Build project + pushd $($*_SRC_PATH) $(LOG) + rm -rf deb_dist/* $(LOG) + python setup.py --command-packages=stdeb.command bdist_deb $(LOG) + popd $(LOG) + # Clean up + if [ -f $($*_SRC_PATH).patch/series ]; then pushd $($*_SRC_PATH) && quilt pop -a -f; popd; fi + # Take built package(s) + mv $(addprefix $($*_SRC_PATH)/deb_dist/, $* $($*_DERIVED_DEBS)) $(PYTHON_DEBS_PATH) $(LOG) + $(FOOTER) + +SONIC_TARGET_LIST += $(addprefix $(PYTHON_DEBS_PATH)/, $(SONIC_PYTHON_STDEB_DEBS)) + +# Build project using python setup.py bdist_wheel +# Projects that generate python wheels +# Add new package for build: +# SOME_NEW_WHL = some_new_whl.whl +# $(SOME_NEW_WHL)_SRC_PATH = $(SRC_PATH)/project_name +# $(SOME_NEW_WHL)_PYTHON_VERSION = 2 (or 3) +# $(SOME_NEW_WHL)_DEPENDS = $(SOME_OTHER_WHL1) $(SOME_OTHER_WHL2) ... +# SONIC_PYTHON_WHEELS += $(SOME_NEW_WHL) +$(addprefix $(PYTHON_WHEELS_PATH)/, $(SONIC_PYTHON_WHEELS)) : $(PYTHON_WHEELS_PATH)/% : .platform $$(addsuffix -install,$$(addprefix $(PYTHON_WHEELS_PATH)/,$$($$*_DEPENDS))) + $(HEADER) + pushd $($*_SRC_PATH) $(LOG) + # apply series of patches if exist + if [ -f ../$(notdir $($*_SRC_PATH)).patch/series ]; then QUILT_PATCHES=../$(notdir $($*_SRC_PATH)).patch quilt push -a; fi + [ "$($*_TEST)" = "n" ] || python$($*_PYTHON_VERSION) setup.py test $(LOG) + python$($*_PYTHON_VERSION) setup.py bdist_wheel $(LOG) + # clean up + if [ -f ../$(notdir $($*_SRC_PATH)).patch/series ]; then quilt pop -a -f; fi + popd $(LOG) + mv $($*_SRC_PATH)/dist/$* $(PYTHON_WHEELS_PATH) $(LOG) + $(FOOTER) + +SONIC_TARGET_LIST += $(addprefix $(PYTHON_WHEELS_PATH)/, $(SONIC_PYTHON_WHEELS)) + +# Targets for installing python wheels. +# Autogenerated +SONIC_INSTALL_WHEELS = $(addsuffix -install, $(addprefix $(PYTHON_WHEELS_PATH)/, $(SONIC_PYTHON_WHEELS))) +$(SONIC_INSTALL_WHEELS) : $(PYTHON_WHEELS_PATH)/%-install : .platform $$(addsuffix -install,$$(addprefix $(PYTHON_WHEELS_PATH)/,$$($$*_DEPENDS))) $(PYTHON_WHEELS_PATH)/$$* + $(HEADER) + [ -f $(PYTHON_WHEELS_PATH)/$* ] || { echo $(PYTHON_WHEELS_PATH)/$* does not exist $(LOG) && exit 1; } + # put a lock here to avoid race conditions + while true; do + if mkdir $(PYTHON_WHEELS_PATH)/pip_lock &> /dev/null; then + { sudo -E pip$($*_PYTHON_VERSION) install $(PYTHON_WHEELS_PATH)/$* $(LOG) && rm -d $(PYTHON_WHEELS_PATH)/pip_lock && break; } || { rm -d $(PYTHON_WHEELS_PATH)/pip_lock && exit 1 ; } + fi + done + $(FOOTER) + +############################################################################### +## Docker images related targets +############################################################################### + +# start docker daemon +docker-start : + @sudo sed -i '/http_proxy/d' /etc/default/docker + @sudo bash -c "echo \"export http_proxy=$$http_proxy\" >> /etc/default/docker" + @test x$(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD) != x"y" && sudo service docker status &> /dev/null || ( sudo service docker start &> /dev/null && ./scripts/wait_for_docker.sh 60 ) + +# targets for building simple docker images that do not depend on any debian packages +$(addprefix $(TARGET_PATH)/, $(SONIC_SIMPLE_DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .platform docker-start $$(addsuffix -load,$$(addprefix $(TARGET_PATH)/,$$($$*.gz_LOAD_DOCKERS))) + $(HEADER) + # Apply series of patches if exist + if [ -f $($*.gz_PATH).patch/series ]; then pushd $($*.gz_PATH) && QUILT_PATCHES=../$(notdir $($*.gz_PATH)).patch quilt push -a; popd; fi + docker info $(LOG) + docker build --squash --no-cache \ + --build-arg http_proxy=$(HTTP_PROXY) \ + --build-arg https_proxy=$(HTTPS_PROXY) \ + --build-arg user=$(USER) \ + --build-arg uid=$(UID) \ + --build-arg guid=$(GUID) \ + --build-arg docker_container_name=$($*.gz_CONTAINER_NAME) \ + --label Tag=$(SONIC_GET_VERSION) \ + -t $* $($*.gz_PATH) $(LOG) + docker save $* | gzip -c > $@ + # Clean up + if [ -f $($*.gz_PATH).patch/series ]; then pushd $($*.gz_PATH) && quilt pop -a -f; popd; fi + $(FOOTER) + +SONIC_TARGET_LIST += $(addprefix $(TARGET_PATH)/, $(SONIC_SIMPLE_DOCKER_IMAGES)) + +# Build jessie docker images only in jessie slave docker, +# jessie docker images only in jessie slave docker +ifeq ($(BLDENV),) + DOCKER_IMAGES_FOR_INSTALLERS := $(sort $(foreach installer,$(SONIC_INSTALLERS),$($(installer)_DOCKERS))) + DOCKER_IMAGES := $(SONIC_JESSIE_DOCKERS) + DOCKER_DBG_IMAGES := $(SONIC_JESSIE_DBG_DOCKERS) + SONIC_JESSIE_DOCKERS_FOR_INSTALLERS = $(filter $(SONIC_JESSIE_DOCKERS),$(DOCKER_IMAGES_FOR_INSTALLERS) $(EXTRA_JESSIE_TARGETS)) + SONIC_JESSIE_DBG_DOCKERS_FOR_INSTALLERS = $(filter $(SONIC_JESSIE_DBG_DOCKERS), $(patsubst %.gz,%-$(DBG_IMAGE_MARK).gz, $(SONIC_JESSIE_DOCKERS_FOR_INSTALLERS))) +else + DOCKER_IMAGES := $(filter-out $(SONIC_JESSIE_DOCKERS), $(SONIC_DOCKER_IMAGES)) + DOCKER_DBG_IMAGES := $(filter-out $(SONIC_JESSIE_DBG_DOCKERS), $(SONIC_DOCKER_DBG_IMAGES)) +endif + +# Targets for building docker images +$(addprefix $(TARGET_PATH)/, $(DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .platform docker-start \ + $$(addprefix $(DEBS_PATH)/,$$($$*.gz_DEPENDS)) \ + $$(addprefix $(FILES_PATH)/,$$($$*.gz_FILES)) \ + $$(addprefix $(PYTHON_DEBS_PATH)/,$$($$*.gz_PYTHON_DEBS)) \ + $$(addprefix $(PYTHON_WHEELS_PATH)/,$$($$*.gz_PYTHON_WHEELS)) \ + $$(addsuffix -load,$$(addprefix $(TARGET_PATH)/,$$($$*.gz_LOAD_DOCKERS))) \ + $$($$*.gz_PATH)/Dockerfile.j2 + $(HEADER) + # Apply series of patches if exist + if [ -f $($*.gz_PATH).patch/series ]; then pushd $($*.gz_PATH) && QUILT_PATCHES=../$(notdir $($*.gz_PATH)).patch quilt push -a; popd; fi + mkdir -p $($*.gz_PATH)/debs $(LOG) + mkdir -p $($*.gz_PATH)/files $(LOG) + mkdir -p $($*.gz_PATH)/python-debs $(LOG) + mkdir -p $($*.gz_PATH)/python-wheels $(LOG) + sudo mount --bind $(DEBS_PATH) $($*.gz_PATH)/debs $(LOG) + sudo mount --bind $(FILES_PATH) $($*.gz_PATH)/files $(LOG) + sudo mount --bind $(PYTHON_DEBS_PATH) $($*.gz_PATH)/python-debs $(LOG) + sudo mount --bind $(PYTHON_WHEELS_PATH) $($*.gz_PATH)/python-wheels $(LOG) + # Export variables for j2. Use path for unique variable names, e.g. docker_orchagent_debs + $(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_debs=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_DEPENDS),RDEPENDS))\n" | awk '!a[$$0]++')) + $(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_pydebs=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_PYTHON_DEBS)))\n" | awk '!a[$$0]++')) + $(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_whls=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_PYTHON_WHEELS)))\n" | awk '!a[$$0]++')) + $(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_dbgs=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_DBG_PACKAGES)))\n" | awk '!a[$$0]++')) + j2 $($*.gz_PATH)/Dockerfile.j2 > $($*.gz_PATH)/Dockerfile + docker info $(LOG) + docker build --squash --no-cache \ + --build-arg http_proxy=$(HTTP_PROXY) \ + --build-arg https_proxy=$(HTTPS_PROXY) \ + --build-arg user=$(USER) \ + --build-arg uid=$(UID) \ + --build-arg guid=$(GUID) \ + --build-arg docker_container_name=$($*.gz_CONTAINER_NAME) \ + --build-arg frr_user_uid=$(FRR_USER_UID) \ + --build-arg frr_user_gid=$(FRR_USER_GID) \ + --label Tag=$(SONIC_GET_VERSION) \ + -t $* $($*.gz_PATH) $(LOG) + docker save $* | gzip -c > $@ + # Clean up + if [ -f $($*.gz_PATH).patch/series ]; then pushd $($*.gz_PATH) && quilt pop -a -f; popd; fi + $(FOOTER) + +SONIC_TARGET_LIST += $(addprefix $(TARGET_PATH)/, $(DOCKER_IMAGES)) + +# Targets for building docker images +$(addprefix $(TARGET_PATH)/, $(DOCKER_DBG_IMAGES)) : $(TARGET_PATH)/%-$(DBG_IMAGE_MARK).gz : .platform docker-start \ + $$(addprefix $(DEBS_PATH)/,$$($$*.gz_DBG_DEPENDS)) \ + $$(addsuffix -load,$$(addprefix $(TARGET_PATH)/,$$*.gz)) + $(HEADER) + mkdir -p $($*.gz_PATH)/debs $(LOG) + sudo mount --bind $(DEBS_PATH) $($*.gz_PATH)/debs $(LOG) + # Export variables for j2. Use path for unique variable names, e.g. docker_orchagent_debs + $(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_dbg_debs=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_DBG_DEPENDS),RDEPENDS))\n" | awk '!a[$$0]++')) + $(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_image_dbgs=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_DBG_IMAGE_PACKAGES)))\n" | awk '!a[$$0]++')) + ./build_debug_docker_j2.sh $* $(subst -,_,$(notdir $($*.gz_PATH)))_dbg_debs $(subst -,_,$(notdir $($*.gz_PATH)))_image_dbgs > $($*.gz_PATH)/Dockerfile-dbg.j2 + j2 $($*.gz_PATH)/Dockerfile-dbg.j2 > $($*.gz_PATH)/Dockerfile-dbg + docker info $(LOG) + docker build \ + $(if $($*.gz_DBG_DEPENDS), --squash --no-cache, --no-cache) \ + --build-arg http_proxy=$(HTTP_PROXY) \ + --build-arg https_proxy=$(HTTPS_PROXY) \ + --build-arg docker_container_name=$($*.gz_CONTAINER_NAME) \ + --label Tag=$(SONIC_GET_VERSION) \ + --file $($*.gz_PATH)/Dockerfile-dbg \ + -t $*-dbg $($*.gz_PATH) $(LOG) + docker save $*-dbg | gzip -c > $@ + # Clean up + if [ -f $($*.gz_PATH).patch/series ]; then pushd $($*.gz_PATH) && quilt pop -a -f; popd; fi + $(FOOTER) + +SONIC_TARGET_LIST += $(addprefix $(TARGET_PATH)/, $(DOCKER_DBG_IMAGES)) + +DOCKER_LOAD_TARGETS = $(addsuffix -load,$(addprefix $(TARGET_PATH)/, \ + $(SONIC_SIMPLE_DOCKER_IMAGES) \ + $(DOCKER_IMAGES))) + +$(DOCKER_LOAD_TARGETS) : $(TARGET_PATH)/%.gz-load : .platform docker-start $$(TARGET_PATH)/$$*.gz + $(HEADER) + docker load -i $(TARGET_PATH)/$*.gz $(LOG) + $(FOOTER) + +############################################################################### +## Installers +############################################################################### + +# targets for building installers with base image +$(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ + .platform \ + onie-image.conf \ + build_debian.sh \ + scripts/dbg_files.sh \ + build_image.sh \ + $$(addsuffix -install,$$(addprefix $(STRETCH_DEBS_PATH)/,$$($$*_DEPENDS))) \ + $$(addprefix $(STRETCH_DEBS_PATH)/,$$($$*_INSTALLS)) \ + $$(addprefix $(STRETCH_DEBS_PATH)/,$$($$*_LAZY_INSTALLS)) \ + $(addprefix $(STRETCH_DEBS_PATH)/,$(INITRAMFS_TOOLS) \ + $(LINUX_KERNEL) \ + $(SONIC_DEVICE_DATA) \ + $(PYTHON_CLICK) \ + $(IFUPDOWN2) \ + $(KDUMP_TOOLS) \ + $(LIBPAM_TACPLUS) \ + $(LIBNSS_TACPLUS)) \ + $$(addprefix $(TARGET_PATH)/,$$($$*_DOCKERS)) \ + $$(addprefix $(FILES_PATH)/,$$($$*_FILES)) \ + $(addprefix $(STRETCH_FILES_PATH)/, $(if $(filter $(CONFIGURED_ARCH),amd64), $(IXGBE_DRIVER))) \ + $(addprefix $(PYTHON_DEBS_PATH)/,$(SONIC_UTILS)) \ + $(addprefix $(PYTHON_WHEELS_PATH)/,$(SONIC_CONFIG_ENGINE)) \ + $(addprefix $(PYTHON_WHEELS_PATH)/,$(SONIC_PLATFORM_COMMON_PY2)) \ + $(addprefix $(PYTHON_WHEELS_PATH)/,$(REDIS_DUMP_LOAD_PY2)) \ + $(addprefix $(PYTHON_WHEELS_PATH)/,$(SONIC_PLATFORM_API_PY2)) + $(HEADER) + # Pass initramfs and linux kernel explicitly. They are used for all platforms + export debs_path="$(STRETCH_DEBS_PATH)" + export files_path="$(FILES_PATH)" + export python_debs_path="$(PYTHON_DEBS_PATH)" + export initramfs_tools="$(STRETCH_DEBS_PATH)/$(INITRAMFS_TOOLS)" + export linux_kernel="$(STRETCH_DEBS_PATH)/$(LINUX_KERNEL)" + export onie_recovery_image="$(FILES_PATH)/$(ONIE_RECOVERY_IMAGE)" + export kversion="$(KVERSION)" + export image_type="$($*_IMAGE_TYPE)" + export sonicadmin_user="$(USERNAME)" + export sonic_asic_platform="$(patsubst %-$(CONFIGURED_ARCH),%,$(CONFIGURED_PLATFORM))" + export enable_organization_extensions="$(ENABLE_ORGANIZATION_EXTENSIONS)" + export enable_dhcp_graph_service="$(ENABLE_DHCP_GRAPH_SERVICE)" + export shutdown_bgp_on_start="$(SHUTDOWN_BGP_ON_START)" + export enable_pfcwd_on_start="$(ENABLE_PFCWD_ON_START)" + export installer_debs="$(addprefix $(STRETCH_DEBS_PATH)/,$($*_INSTALLS))" + export lazy_installer_debs="$(foreach deb, $($*_LAZY_INSTALLS),$(foreach device, $($(deb)_PLATFORM),$(addprefix $(device)@, $(STRETCH_DEBS_PATH)/$(deb))))" + export installer_images="$(addprefix $(TARGET_PATH)/,$($*_DOCKERS))" + export config_engine_wheel_path="$(addprefix $(PYTHON_WHEELS_PATH)/,$(SONIC_CONFIG_ENGINE))" + export swsssdk_py2_wheel_path="$(addprefix $(PYTHON_WHEELS_PATH)/,$(SWSSSDK_PY2))" + export platform_common_py2_wheel_path="$(addprefix $(PYTHON_WHEELS_PATH)/,$(SONIC_PLATFORM_COMMON_PY2))" + export redis_dump_load_py2_wheel_path="$(addprefix $(PYTHON_WHEELS_PATH)/,$(REDIS_DUMP_LOAD_PY2))" + export install_debug_image="$(INSTALL_DEBUG_TOOLS)" + + $(foreach docker, $($*_DOCKERS),\ + export docker_image="$(docker)" + export docker_image_name="$(basename $(docker))" + export docker_container_name="$($(docker:-dbg.gz=.gz)_CONTAINER_NAME)" + $(eval $(docker:-dbg.gz=.gz)_RUN_OPT += $($(docker:-dbg.gz=.gz)_$($*_IMAGE_TYPE)_RUN_OPT)) + export docker_image_run_opt="$($(docker:-dbg.gz=.gz)_RUN_OPT)" + j2 files/build_templates/docker_image_ctl.j2 > $($(docker:-dbg.gz=.gz)_CONTAINER_NAME).sh + if [ -f files/build_templates/$($(docker:-dbg.gz=.gz)_CONTAINER_NAME).service.j2 ]; then + j2 files/build_templates/$($(docker:-dbg.gz=.gz)_CONTAINER_NAME).service.j2 > $($(docker:-dbg.gz=.gz)_CONTAINER_NAME).service + fi + chmod +x $($(docker:-dbg.gz=.gz)_CONTAINER_NAME).sh + ) + + export installer_start_scripts="$(foreach docker, $($*_DOCKERS),$(addsuffix .sh, $($(docker:-dbg.gz=.gz)_CONTAINER_NAME)))" + export installer_services="$(foreach docker, $($*_DOCKERS),$(addsuffix .service, $($(docker:-dbg.gz=.gz)_CONTAINER_NAME)))" + export installer_extra_files="$(foreach docker, $($*_DOCKERS), $(foreach file, $($(docker:-dbg.gz=.gz)_BASE_IMAGE_FILES), $($(docker:-dbg.gz=.gz)_PATH)/base_image_files/$(file)))" + + j2 -f env files/initramfs-tools/union-mount.j2 onie-image.conf > files/initramfs-tools/union-mount + j2 -f env files/initramfs-tools/arista-convertfs.j2 onie-image.conf > files/initramfs-tools/arista-convertfs + + $(if $($*_DOCKERS), + j2 files/build_templates/sonic_debian_extension.j2 > sonic_debian_extension.sh + chmod +x sonic_debian_extension.sh, + ) + + DEBUG_IMG="$(INSTALL_DEBUG_TOOLS)" \ + DEBUG_SRC_ARCHIVE_DIRS="$(DBG_SRC_ARCHIVE)" \ + DEBUG_SRC_ARCHIVE_FILE="$(DBG_SRC_ARCHIVE_FILE)" \ + scripts/dbg_files.sh + + DEBUG_IMG="$(INSTALL_DEBUG_TOOLS)" \ + DEBUG_SRC_ARCHIVE_FILE="$(DBG_SRC_ARCHIVE_FILE)" \ + USERNAME="$(USERNAME)" \ + PASSWORD="$(PASSWORD)" \ + ./build_debian.sh $(LOG) + + USERNAME="$(USERNAME)" \ + PASSWORD="$(PASSWORD)" \ + TARGET_MACHINE=$($*_MACHINE) \ + IMAGE_TYPE=$($*_IMAGE_TYPE) \ + ./build_image.sh $(LOG) + + $(foreach docker, $($*_DOCKERS), \ + rm -f $($(docker:-dbg.gz=.gz)_CONTAINER_NAME).sh + rm -f $($(docker:-dbg.gz=.gz)_CONTAINER_NAME).service + ) + + $(if $($*_DOCKERS), + rm sonic_debian_extension.sh, + ) + + chmod a+x $@ + $(FOOTER) + +SONIC_TARGET_LIST += $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) + +############################################################################### +## Clean targets +############################################################################### + +SONIC_CLEAN_DEBS = $(addsuffix -clean,$(addprefix $(DEBS_PATH)/, \ + $(SONIC_ONLINE_DEBS) \ + $(SONIC_COPY_DEBS) \ + $(SONIC_MAKE_DEBS) \ + $(SONIC_DPKG_DEBS) \ + $(SONIC_DERIVED_DEBS) \ + $(SONIC_EXTRA_DEBS))) + +SONIC_CLEAN_FILES = $(addsuffix -clean,$(addprefix $(FILES_PATH)/, \ + $(SONIC_ONLINE_FILES) \ + $(SONIC_COPY_FILES) \ + $(SONIC_MAKE_FILES))) + +$(SONIC_CLEAN_DEBS) : $(DEBS_PATH)/%-clean : .platform $$(addsuffix -clean,$$(addprefix $(DEBS_PATH)/,$$($$*_MAIN_DEB))) + @# remove derived or extra targets if main one is removed, because we treat them + @# as part of one package + @rm -f $(addprefix $(DEBS_PATH)/, $* $($*_DERIVED_DEBS) $($*_EXTRA_DEBS)) + +$(SONIC_CLEAN_FILES) : $(FILES_PATH)/%-clean : .platform + @rm -f $(FILES_PATH)/$* + +SONIC_CLEAN_TARGETS += $(addsuffix -clean,$(addprefix $(TARGET_PATH)/, \ + $(SONIC_DOCKER_IMAGES) \ + $(SONIC_DOCKER_DBG_IMAGES) \ + $(SONIC_SIMPLE_DOCKER_IMAGES) \ + $(SONIC_INSTALLERS))) +$(SONIC_CLEAN_TARGETS) : $(TARGET_PATH)/%-clean : .platform + @rm -f $(TARGET_PATH)/$* + +SONIC_CLEAN_STDEB_DEBS = $(addsuffix -clean,$(addprefix $(PYTHON_DEBS_PATH)/, \ + $(SONIC_PYTHON_STDEB_DEBS))) +$(SONIC_CLEAN_STDEB_DEBS) : $(PYTHON_DEBS_PATH)/%-clean : .platform + @rm -f $(PYTHON_DEBS_PATH)/$* + +SONIC_CLEAN_WHEELS = $(addsuffix -clean,$(addprefix $(PYTHON_WHEELS_PATH)/, \ + $(SONIC_PYTHON_WHEELS))) +$(SONIC_CLEAN_WHEELS) : $(PYTHON_WHEELS_PATH)/%-clean : .platform + @rm -f $(PYTHON_WHEELS_PATH)/$* + +clean-logs : .platform + @rm -f $(TARGET_PATH)/*.log $(DEBS_PATH)/*.log $(FILES_PATH)/*.log $(PYTHON_DEBS_PATH)/*.log $(PYTHON_WHEELS_PATH)/*.log + +clean : .platform clean-logs $$(SONIC_CLEAN_DEBS) $$(SONIC_CLEAN_FILES) $$(SONIC_CLEAN_TARGETS) $$(SONIC_CLEAN_STDEB_DEBS) $$(SONIC_CLEAN_WHEELS) + +############################################################################### +## all +############################################################################### + +all : .platform $$(addprefix $(TARGET_PATH)/,$$(SONIC_ALL)) + +stretch : $$(addprefix $(DEBS_PATH)/,$$(SONIC_STRETCH_DEBS)) \ + $$(addprefix $(FILES_PATH)/,$$(SONIC_STRETCH_FILES)) \ + $$(addprefix $(TARGET_PATH)/,$$(SONIC_STRETCH_DOCKERS_FOR_INSTALLERS)) \ + $$(addprefix $(TARGET_PATH)/,$$(SONIC_STRETCH_DBG_DOCKERS_FOR_INSTALLERS)) + +jessie : $$(addprefix $(TARGET_PATH)/,$$(SONIC_JESSIE_DOCKERS_FOR_INSTALLERS)) + +############################################################################### +## Standard targets +############################################################################### + +.PHONY : $(SONIC_CLEAN_DEBS) $(SONIC_CLEAN_FILES) $(SONIC_CLEAN_TARGETS) $(SONIC_CLEAN_STDEB_DEBS) $(SONIC_CLEAN_WHEELS) $(SONIC_PHONY_TARGETS) clean distclean configure + +.INTERMEDIATE : $(SONIC_INSTALL_TARGETS) $(SONIC_INSTALL_WHEELS) $(DOCKER_LOAD_TARGETS) docker-start .platform diff --git a/sonic-slave-jessie/Dockerfile.j2 b/sonic-slave-jessie/Dockerfile.j2 new file mode 100644 index 00000000000..7ed7c4eb709 --- /dev/null +++ b/sonic-slave-jessie/Dockerfile.j2 @@ -0,0 +1,365 @@ +{%- if CONFIGURED_ARCH == "armhf" -%} +FROM multiarch/debian-debootstrap:armhf-jessie +{%- elif CONFIGURED_ARCH == "arm64" -%} +FROM multiarch/debian-debootstrap:arm64-jessie +{%- else -%} +FROM debian:jessie +{%- endif %} + +MAINTAINER johnar@microsoft.com + +## Remove retired jessie-updates repo +RUN sed -i '/http:\/\/deb.debian.org\/debian jessie-updates main/d' /etc/apt/sources.list + +RUN echo "deb [arch=amd64] http://debian-archive.trafficmanager.net/debian/ jessie main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb-src [arch=amd64] http://debian-archive.trafficmanager.net/debian/ jessie main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb [arch=amd64] http://debian-archive.trafficmanager.net/debian-security/ jessie/updates main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb-src [arch=amd64] http://debian-archive.trafficmanager.net/debian-security/ jessie/updates main contrib non-free" >> /etc/apt/sources.list + +{% if CONFIGURED_ARCH == "armhf" %} +RUN echo "deb [arch=armhf] http://deb.debian.org/debian jessie main contrib non-free" > /etc/apt/sources.list && \ + echo "deb-src [arch=armhf] http://deb.debian.org/debian jessie main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb [arch=armhf] http://security.debian.org jessie/updates main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb-src [arch=armhf] http://security.debian.org jessie/updates main contrib non-free" >> /etc/apt/sources.list +{% elif CONFIGURED_ARCH == "arm64" %} +RUN echo "deb [arch=arm64] http://archive.debian.org/debian jessie main contrib non-free" > /etc/apt/sources.list && \ + echo "deb-src [arch=arm64] http://archive.debian.org/debian jessie main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb-src [arch=arm64] http://archive.debian.org/debian jessie-backports main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb [arch=arm64] http://archive.debian.org/debian jessie-backports main contrib non-free" >> /etc/apt/sources.list +{% endif %} + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update && apt-get install -y \ + apt-utils \ + default-jre-headless \ + openssh-server \ + curl \ + wget \ + unzip \ + git \ + build-essential \ + libtool \ + lintian \ + sudo \ + dh-make \ + dh-exec \ + kmod \ + libtinyxml2-2 \ + libboost-program-options1.55-dev \ + libtinyxml2-dev \ + python \ + python-pip \ + libncurses5-dev \ + texinfo \ + dh-autoreconf \ + python3-pip \ + doxygen \ + devscripts \ + git-buildpackage \ + perl-modules \ + libswitch-perl \ + dh-systemd \ +# For quagga build + libreadline-dev \ + texlive-latex-base \ + texlive-generic-recommended \ + texlive-fonts-recommended \ + libpam0g-dev \ + libpam-dev \ + libcap-dev \ + imagemagick \ + ghostscript \ + groff \ + libpcre3-dev \ + gawk \ + chrpath \ +# For frr build + libc-ares-dev \ + hardening-wrapper \ + libsnmp-dev \ + libjson0 \ + libjson0-dev \ + libsystemd-dev \ + python-ipaddr \ + install-info \ +# For libnl3 (local) build + cdbs \ +# For SAI meta build + libxml-simple-perl \ + graphviz \ + aspell \ +# For linux build + bc \ + fakeroot \ + build-essential \ + devscripts \ + quilt \ + stgit \ +# For platform-modules build + module-assistant \ +# For thrift build\ + gem2deb \ + libboost-all-dev \ + libevent-dev \ + libglib2.0-dev \ + libqt4-dev \ + python-all-dev \ + python-twisted \ + php5-dev \ + phpunit \ + libbit-vector-perl \ + openjdk-7-jdk \ + javahelper \ + maven-debian-helper \ + ant \ + libmaven-ant-tasks-java \ + libhttpclient-java \ + libslf4j-java \ + libservlet3.1-java \ + qt5-default \ + pkg-php-tools \ +# For mellanox sdk build + libpcre3 \ + libpcre3-dev \ + byacc \ + flex \ + libglib2.0-dev \ + bison \ + expat \ + libexpat1-dev \ + dpatch \ + libdb-dev \ + iptables-dev \ + swig \ + ctags \ +# For mellanox sai build + libtool-bin \ + libxml2-dev \ +# For BFN sdk build + libusb-1.0-0-dev \ + libcurl3-nss-dev \ + libunwind8-dev \ + telnet \ + libc-ares2 \ + libgoogle-perftools4 \ +# For build image + cpio \ + squashfs-tools \ + zip \ +{%- if CONFIGURED_ARCH == "amd64" %} +# For broadcom sdk build + linux-compiler-gcc-4.9-x86 \ +{%- endif %} + linux-kbuild-3.16 \ +# teamd build + libdaemon-dev \ + libdbus-1-dev \ + libjansson-dev \ +# For cavium sdk build + libpcap-dev \ + dnsutils \ + libusb-dev \ +# For debian image reconfiguration + augeas-tools \ +# For p4 build + libyaml-dev \ + libevent-dev \ + libjudy-dev \ + libedit-dev \ + libnanomsg-dev \ + python-stdeb \ +# For redis build + libjemalloc-dev \ +# For mft kernel module build + dkms \ +# For python3.5 build + sharutils \ + libncursesw5-dev \ + libbz2-dev \ + liblzma-dev \ + libgdbm-dev \ + tk-dev \ + blt-dev \ + libmpdec-dev \ + libbluetooth-dev \ + locales \ + libsqlite3-dev \ + libgpm2 \ + time \ + net-tools \ + xvfb \ + python-sphinx \ + python3-sphinx \ +# For Jenkins static analysis, unit testing and code coverage + cppcheck \ + clang \ + pylint \ + gcovr \ + python-pytest=2.6.3* \ + python3-pytest=2.6.3* \ + python-pytest-cov \ + python3-pytest-cov \ + python-parse \ +# For snmpd + libmysqlclient-dev \ + libmysqld-dev \ + libperl-dev \ + libpci-dev \ + libpci3 \ + libsensors4 \ + libsensors4-dev \ + libwrap0-dev \ +# For mpdecimal + docutils-common \ + libjs-sphinxdoc \ + libjs-underscore \ + python-docutils \ + python-markupsafe \ + python-pygments \ + python-roman \ + sphinx-common \ +# For sonic config engine testing + python-lxml \ + python-netaddr \ + python-ipaddr \ + python-yaml \ +# For lockfile + procmail \ +# For gtest + libgtest-dev \ + cmake \ +# For pam_tacplus build + autoconf-archive \ +# For python-based swsscommon + swig3.0 \ +# For iproute2 + cm-super-minimal \ + libatm1-dev \ + libelf-dev \ + libmnl-dev \ + libselinux1-dev \ + linuxdoc-tools \ + lynx \ + texlive-latex-extra \ + texlive-latex-recommended \ +# For python-click build + python-sphinx \ + python-docutils \ + python3-all \ + python3-setuptools \ + python3-sphinx \ + python3-docutils \ + python3-requests \ + python3-pytest \ + python3-colorama \ +# For bash + texi2html \ +# For initramfs + bash-completion \ +{% if CONFIGURED_ARCH == "amd64" -%} +# For sonic vs image build + dosfstools \ + qemu-kvm \ + libvirt-bin +{%- else -%} + bash-completion +{%- endif %} + +# For jenkins slave +# RUN apt-get -y install ca-certificates-java=20161107~bpo8+1 openjdk-8-jdk + +# For linux build +RUN apt-get -y build-dep linux + +# For gobgp and telemetry build +RUN export VERSION=1.11.5 \ +{%- if CONFIGURED_ARCH == "armhf" %} + && wget https://storage.googleapis.com/golang/go$VERSION.linux-armv6l.tar.gz \ + && tar -C /usr/local -xzf go$VERSION.linux-armv6l.tar.gz \ +{%- elif CONFIGURED_ARCH == "arm64" %} + && wget https://storage.googleapis.com/golang/go$VERSION.linux-arm64.tar.gz \ + && tar -C /usr/local -xzf go$VERSION.linux-arm64.tar.gz \ +{%- else %} + && wget https://storage.googleapis.com/golang/go$VERSION.linux-amd64.tar.gz \ + && tar -C /usr/local -xzf go$VERSION.linux-amd64.tar.gz \ +{%- endif %} + && echo 'export GOROOT=/usr/local/go' >> /etc/bash.bashrc \ + && echo 'export PATH=$PATH:$GOROOT/bin' >> /etc/bash.bashrc \ + && rm go$VERSION.linux-*.tar.gz + +# Upgrade pip2 +# Note: use pip2 specific version so jinja2 2.10 will install +RUN python2 -m pip install -U pip==9.0.3 + +# For p4 build +RUN pip install \ + ctypesgen==0.r125 \ + crc16 + +# For sonic config engine testing +RUN pip install pyangbind==0.6.0 +# Note: force upgrade debian packaged jinja2, if installed +RUN pip install --force-reinstall --upgrade "jinja2>=2.10" + +# For templating (requiring jinja2) +RUN pip install j2cli==0.3.10 + +# For sonic utilities testing +RUN pip install click-default-group click natsort tabulate netifaces==0.10.7 fastentrypoints + +# For supervisor build +RUN pip install meld3 mock + +# For vs image build +RUN pip install pexpect==4.6.0 + +# For sonic-utilities build +RUN pip install mockredispy==2.9.3 +RUN pip install pytest-runner==4.4 +RUN pip install setuptools==40.8.0 + +# Install dependencies for isc-dhcp-relay build +RUN apt-get -y build-dep isc-dhcp + +# Install vim +RUN apt-get install -y vim + +# Install rsyslog +RUN apt-get install -y rsyslog + +RUN cd /usr/src/gtest && cmake . && make -C /usr/src/gtest + +RUN mkdir /var/run/sshd +EXPOSE 22 + +# Install depot-tools (for git-retry) +RUN git clone https://chromium.googlesource.com/chromium/tools/depot_tools.git /usr/share/depot_tools +ENV PATH /usr/share/depot_tools:$PATH + +# Install docker engine 17.03.2~ce-0 inside docker and enable experimental feature +RUN apt-get update +RUN apt-get install -y \ + apt-transport-https \ + ca-certificates \ + curl \ + gnupg2 \ + software-properties-common +RUN curl -fsSL https://download.docker.com/linux/debian/gpg | sudo apt-key add - +RUN add-apt-repository \ + "deb [arch={{ CONFIGURED_ARCH }}] https://download.docker.com/linux/debian \ + $(lsb_release -cs) \ + stable" +RUN apt-get update +{%- if CONFIGURED_ARCH == "amd64" %} +RUN apt-get install -y docker-ce=17.03.2~ce-0~debian-jessie +{%- else %} +RUN apt-get install -y docker-ce=18.06.3~ce~3-0~debian +{%- endif %} +RUN echo "DOCKER_OPTS=\"--experimental --storage-driver=vfs\"" >> /etc/default/docker + +# For jenkins slave +RUN echo "deb [arch={{ CONFIGURED_ARCH }}] http://archive.debian.org/debian jessie-backports main" >> /etc/apt/sources.list +RUN apt-get -o Acquire::Check-Valid-Until=false update +RUN apt-get -y -o Acquire::Check-Valid-Until=false install ca-certificates-java=20161107~bpo8+1 openjdk-8-jdk diff --git a/sonic-slave-jessie/Dockerfile.user b/sonic-slave-jessie/Dockerfile.user new file mode 100644 index 00000000000..37dd7256c4e --- /dev/null +++ b/sonic-slave-jessie/Dockerfile.user @@ -0,0 +1,30 @@ +ARG slave_base_tag_ref=latest +FROM sonic-slave-jessie:${slave_base_tag_ref} + +# Add user +ARG user +ARG uid +ARG guid +ARG hostname + +ENV BUILD_HOSTNAME $hostname +ENV USER $user + +RUN groupadd -f -r -g $guid g$user + +RUN useradd $user -l -u $uid -g $guid -d /var/$user -m -s /bin/bash + +RUN gpasswd -a $user docker + +# Config git for stg +RUN su $user -c "git config --global user.name $user" +RUN su $user -c "git config --global user.email $user@contoso.com" + +COPY sonic-jenkins-id_rsa.pub /var/$user/.ssh/authorized_keys2 +RUN chown $user /var/$user/.ssh -R +RUN chmod go= /var/$user/.ssh -R + +# Add user to sudoers +RUN echo "$user ALL=(ALL) NOPASSWD:ALL" >>/etc/sudoers + +USER $user diff --git a/sonic-slave-jessie/sonic-jenkins-id_rsa.pub b/sonic-slave-jessie/sonic-jenkins-id_rsa.pub new file mode 100644 index 00000000000..2a19c9e70d3 --- /dev/null +++ b/sonic-slave-jessie/sonic-jenkins-id_rsa.pub @@ -0,0 +1 @@ +ssh-rsa AAAAB3NzaC1yc2EAAAADAQABAAABAQC769BQUJVeSIOyPsN4/Vo8xTqXQ6RI7ysVyCw/ABP3FIxf+fxmtm8t/Nbp9hq0uLHOjCw8UQbJ+XltsThFWJfH6RJY5NbfvwG7nUDjfjjp+SGEIHaVgIlpiuqiPbZ6QMjZ8Q0Sgi5p5ts1xe/4TFThwOJBHmhwydD5nk3BH7P3DDwlOCov5gjM40uMZJkketlO83zGG+25zu7O0hfDVt1vyK9bNWAhhPmGc79zdetfeFCxjimsff2m31B1KuVXiT5PDB1w+BSrUK6nNzJubnYCRgjg4prVTjA50EhlT2P7EoJAbW3TnTq8vUDkcstsGe/HZpfIB1VHBX97u4fAfGJZ root@acs-jenkins diff --git a/sonic-slave-stretch/Dockerfile.j2 b/sonic-slave-stretch/Dockerfile.j2 new file mode 100644 index 00000000000..f52bd943b0a --- /dev/null +++ b/sonic-slave-stretch/Dockerfile.j2 @@ -0,0 +1,392 @@ +{%- if CONFIGURED_ARCH == "armhf" %} +FROM multiarch/debian-debootstrap:armhf-stretch +{%- elif CONFIGURED_ARCH == "arm64" %} +FROM multiarch/debian-debootstrap:arm64-stretch +{%- else -%} +FROM debian:stretch +{%- endif %} + +MAINTAINER gulv@microsoft.com + +RUN echo "deb [arch=amd64] http://debian-archive.trafficmanager.net/debian/ stretch main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb-src [arch=amd64] http://debian-archive.trafficmanager.net/debian/ stretch main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb [arch=amd64] http://debian-archive.trafficmanager.net/debian-security/ stretch/updates main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb-src [arch=amd64] http://debian-archive.trafficmanager.net/debian-security/ stretch/updates main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb [arch=amd64] http://debian-archive.trafficmanager.net/debian stretch-backports main" >> /etc/apt/sources.list + +{%- if CONFIGURED_ARCH == "armhf" %} +RUN echo "deb [arch=armhf] http://deb.debian.org/debian stretch main contrib non-free" > /etc/apt/sources.list && \ + echo "deb-src [arch=armhf] http://deb.debian.org/debian stretch main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb [arch=armhf] http://deb.debian.org/debian stretch-updates main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb-src [arch=armhf] http://deb.debian.org/debian stretch-updates main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb [arch=armhf] http://security.debian.org stretch/updates main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb-src [arch=armhf] http://security.debian.org stretch/updates main contrib non-free" >> /etc/apt/sources.list && \ + echo 'deb [arch=armhf] http://ftp.debian.org/debian stretch-backports main' >> /etc/apt/sources.list +{%- elif CONFIGURED_ARCH == "arm64" %} +RUN echo "deb [arch=arm64] http://deb.debian.org/debian stretch main contrib non-free" > /etc/apt/sources.list && \ + echo "deb-src [arch=arm64] http://deb.debian.org/debian stretch main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb [arch=arm64] http://deb.debian.org/debian stretch-updates main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb-src [arch=arm64] http://deb.debian.org/debian stretch-updates main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb [arch=arm64] http://security.debian.org stretch/updates main contrib non-free" >> /etc/apt/sources.list && \ + echo "deb-src [arch=arm64] http://security.debian.org stretch/updates main contrib non-free" >> /etc/apt/sources.list && \ + echo 'deb [arch=arm64] http://ftp.debian.org/debian stretch-backports main' >> /etc/apt/sources.list +{%- endif %} + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update && apt-get install -y \ + apt-utils \ + default-jre-headless \ + openssh-server \ + curl \ + wget \ + unzip \ + git \ + build-essential \ + libtool \ + lintian \ + sudo \ + dh-make \ + dh-exec \ + kmod \ + libtinyxml2-4 \ + libboost-program-options1.62-dev \ + libtinyxml2-dev \ + python \ + python-pip \ + libncurses5-dev \ + texinfo \ + dh-autoreconf \ + python3-pip \ + doxygen \ + devscripts \ + git-buildpackage \ + perl-modules \ + libswitch-perl \ + dh-systemd \ +# For quagga build + libreadline-dev \ + texlive-latex-base \ + texlive-generic-recommended \ + texlive-fonts-recommended \ + libpam0g-dev \ + libpam-dev \ + libcap-dev \ + imagemagick \ + ghostscript \ + groff \ + libpcre3-dev \ + gawk \ + chrpath \ +# For frr build + libc-ares-dev \ + libsnmp-dev \ + libjson-c3 \ + libjson-c-dev \ + libsystemd-dev \ + python-ipaddr \ + libcmocka-dev \ + python3-all-dev \ + python3-all-dbg \ + install-info \ + logrotate \ +# For libnl3 (local) build + cdbs \ +# For SAI meta build + libxml-simple-perl \ + graphviz \ + aspell \ +# For linux build + bc \ + fakeroot \ + build-essential \ + devscripts \ + quilt \ + stgit \ +# For platform-modules build + module-assistant \ +# For thrift build\ + gem2deb \ + libboost-all-dev \ + libevent-dev \ + libglib2.0-dev \ + libqt4-dev \ + python-all-dev \ + python-twisted \ + phpunit \ + libbit-vector-perl \ + openjdk-8-jdk \ + javahelper \ + maven-debian-helper \ + ant \ + libmaven-ant-tasks-java \ + libhttpclient-java \ + libslf4j-java \ + libservlet3.1-java \ + qt5-default \ + pkg-php-tools \ +# For mellanox sdk build + libpcre3 \ + libpcre3-dev \ + byacc \ + flex \ + libglib2.0-dev \ + bison \ + expat \ + libexpat1-dev \ + dpatch \ + libdb-dev \ + iptables-dev \ + ctags \ +# For mellanox sai build + libtool-bin \ + libxml2-dev \ +# For BFN sdk build + libusb-1.0-0-dev \ + libcurl3-nss-dev \ + libunwind8-dev \ + telnet \ + libc-ares2 \ + libgoogle-perftools4 \ +# For build image + cpio \ + squashfs-tools \ + zip \ +# For broadcom sdk build +{%- if CONFIGURED_ARCH == "amd64" %} + linux-compiler-gcc-6-x86 \ +{%- endif %} +{%- if CONFIGURED_ARCH == "armhf" %} + linux-compiler-gcc-6-arm \ +{%- endif %} + linux-kbuild-4.9 \ +# teamd build + libdaemon-dev \ + libdbus-1-dev \ + libjansson-dev \ +# For cavium sdk build + libpcap-dev \ + dnsutils \ + libusb-dev \ +# For debian image reconfiguration + augeas-tools \ +# For p4 build + libyaml-dev \ + libevent-dev \ + libjudy-dev \ + libedit-dev \ + libnanomsg-dev \ + python-stdeb \ +# For redis build + libjemalloc-dev \ + liblua5.1-0-dev \ + lua-bitop-dev \ + lua-cjson-dev \ +# For mft kernel module build + dkms \ +# For python3.5 build + sharutils \ + libncursesw5-dev \ + libbz2-dev \ + liblzma-dev \ + libgdbm-dev \ + tk-dev \ + blt-dev \ + libmpdec-dev \ + libbluetooth-dev \ + locales \ + libsqlite3-dev \ + libgpm2 \ + time \ + net-tools \ + xvfb \ + python-sphinx \ + python3-sphinx \ +# For Jenkins static analysis, unit testing and code coverage + cppcheck \ + clang \ + pylint \ + python-pytest \ + gcovr \ + python-pytest-cov \ + python-parse \ +# For snmpd + default-libmysqlclient-dev \ + libssl1.0-dev \ + libperl-dev \ + libpci-dev \ + libpci3 \ + libsensors4 \ + libsensors4-dev \ + libwrap0-dev \ +# For lldpd + debhelper \ + autotools-dev \ + libbsd-dev \ + pkg-config \ + check \ +# For mpdecimal + docutils-common \ + libjs-sphinxdoc \ + libjs-underscore \ + python-docutils \ + python-jinja2 \ + python-markupsafe \ + python-pygments \ + python-roman \ + python-sphinx \ + sphinx-common \ + python3-sphinx \ +# For sonic config engine testing + python-lxml \ + python-jinja2 \ + python-netaddr \ + python-ipaddr \ + python-yaml \ + python3-yaml \ +# For lockfile + procmail \ +# For gtest + libgtest-dev \ + cmake \ +# For pam_tacplus build + autoconf-archive \ +# For iproute2 + cm-super-minimal \ + libatm1-dev \ + libelf-dev \ + libmnl-dev \ + libselinux1-dev \ + linuxdoc-tools \ + lynx \ + texlive-latex-extra \ + texlive-latex-recommended \ + iproute2 \ +# For python-click build + python-sphinx \ + python-docutils \ + python3-all \ + python3-setuptools \ + python3-sphinx \ + python3-docutils \ + python3-requests \ + python3-pytest \ + python3-colorama \ +# For bash + texi2html \ +# For initramfs + bash-completion \ +{%- if CONFIGURED_ARCH == "amd64" %} +# For sonic vs image build + dosfstools \ + qemu-kvm \ + libvirt-clients \ +{%- endif %} +# For lm-sensors + librrd8 \ + librrd-dev \ + rrdtool \ +# For smartmontools 6.6-1 + automake1.11 \ + libselinux1-dev \ +# For kdump-tools + liblzo2-dev + +# For smartmontools 6.6-1 +RUN apt-get -t stretch-backports install -y debhelper + +# For linux build +RUN apt-get -y build-dep linux + +# For gobgp and telemetry build +RUN export VERSION=1.11.5 \ +{%- if CONFIGURED_ARCH == "armhf" %} + && wget https://storage.googleapis.com/golang/go$VERSION.linux-armv6l.tar.gz \ + && tar -C /usr/local -xzf go$VERSION.linux-armv6l.tar.gz \ +{%- elif CONFIGURED_ARCH == "arm64" %} + && wget https://storage.googleapis.com/golang/go$VERSION.linux-arm64.tar.gz \ + && tar -C /usr/local -xzf go$VERSION.linux-arm64.tar.gz \ +{%- else %} + && wget https://storage.googleapis.com/golang/go$VERSION.linux-amd64.tar.gz \ + && tar -C /usr/local -xzf go$VERSION.linux-amd64.tar.gz \ +{%- endif %} + && echo 'export GOROOT=/usr/local/go' >> /etc/bash.bashrc \ + && echo 'export PATH=$PATH:$GOROOT/bin' >> /etc/bash.bashrc \ + && rm go$VERSION.linux-*.tar.gz + +# For p4 build +RUN pip install \ + ctypesgen==0.r125 \ + crc16 + +# For sonic config engine testing +RUN pip install pyangbind==0.6.0 +# Note: force upgrade debian packaged jinja2, if installed +RUN pip install --force-reinstall --upgrade "jinja2>=2.10" + +# For templating +RUN pip install j2cli==0.3.10 + +# Remove python-click 6.6 +RUN apt-get purge -y python-click +# For sonic utilities testing +RUN pip install click-default-group click natsort tabulate netifaces==0.10.7 fastentrypoints + +# For sonic snmpagent mock testing +RUN pip3 install mockredispy==2.9.3 + +RUN pip3 install "PyYAML>=5.1" + +# For sonic-platform-common testing +RUN pip3 install redis + +# For supervisor build +RUN pip install meld3 mock + +# For vs image build +RUN pip install pexpect==4.6.0 + +# For sonic-utilities build +RUN pip install mockredispy==2.9.3 +RUN pip install pytest-runner==4.4 +RUN pip install setuptools==40.8.0 + +# Install dependencies for isc-dhcp-relay build +RUN apt-get -y build-dep isc-dhcp + +# Install vim +RUN apt-get install -y vim + +# Install rsyslog +RUN apt-get install -y rsyslog + +RUN cd /usr/src/gtest && cmake . && make -C /usr/src/gtest + +RUN mkdir /var/run/sshd +EXPOSE 22 + +# Install depot-tools (for git-retry) +RUN git clone https://chromium.googlesource.com/chromium/tools/depot_tools.git /usr/share/depot_tools +ENV PATH /usr/share/depot_tools:$PATH + +# Install docker engine 17.03.2~ce-0 inside docker and enable experimental feature +RUN apt-get update +RUN apt-get install -y \ + apt-transport-https \ + ca-certificates \ + curl \ + gnupg2 \ + software-properties-common +RUN curl -fsSL https://download.docker.com/linux/debian/gpg | sudo apt-key add - +RUN add-apt-repository \ + "deb [arch={{ CONFIGURED_ARCH }}] https://download.docker.com/linux/debian \ + $(lsb_release -cs) \ + stable" +RUN apt-get update +{%- if CONFIGURED_ARCH == "amd64" %} +RUN apt-get install -y docker-ce=5:18.09.5~3-0~debian-stretch +{%- else %} +RUN apt-get install -y docker-ce=18.06.3~ce~3-0~debian +{%- endif %} +RUN echo "DOCKER_OPTS=\"--experimental --storage-driver=vfs\"" >> /etc/default/docker diff --git a/sonic-slave-stretch/Dockerfile.user b/sonic-slave-stretch/Dockerfile.user new file mode 100644 index 00000000000..87e4d9568bb --- /dev/null +++ b/sonic-slave-stretch/Dockerfile.user @@ -0,0 +1,30 @@ +ARG slave_base_tag_ref=latest +FROM sonic-slave-stretch:${slave_base_tag_ref} + +# Add user +ARG user +ARG uid +ARG guid +ARG hostname + +ENV BUILD_HOSTNAME $hostname +ENV USER $user + +RUN groupadd -f -r -g $guid g$user + +RUN useradd $user -l -u $uid -g $guid -d /var/$user -m -s /bin/bash + +RUN gpasswd -a $user docker + +# Config git for stg +RUN su $user -c "git config --global user.name $user" +RUN su $user -c "git config --global user.email $user@contoso.com" + +COPY sonic-jenkins-id_rsa.pub /var/$user/.ssh/authorized_keys2 +RUN chown $user /var/$user/.ssh -R +RUN chmod go= /var/$user/.ssh -R + +# Add user to sudoers +RUN echo "$user ALL=(ALL) NOPASSWD:ALL" >>/etc/sudoers + +USER $user diff --git a/sonic-slave-stretch/sonic-jenkins-id_rsa.pub b/sonic-slave-stretch/sonic-jenkins-id_rsa.pub new file mode 100644 index 00000000000..2a19c9e70d3 --- /dev/null +++ b/sonic-slave-stretch/sonic-jenkins-id_rsa.pub @@ -0,0 +1 @@ +ssh-rsa AAAAB3NzaC1yc2EAAAADAQABAAABAQC769BQUJVeSIOyPsN4/Vo8xTqXQ6RI7ysVyCw/ABP3FIxf+fxmtm8t/Nbp9hq0uLHOjCw8UQbJ+XltsThFWJfH6RJY5NbfvwG7nUDjfjjp+SGEIHaVgIlpiuqiPbZ6QMjZ8Q0Sgi5p5ts1xe/4TFThwOJBHmhwydD5nk3BH7P3DDwlOCov5gjM40uMZJkketlO83zGG+25zu7O0hfDVt1vyK9bNWAhhPmGc79zdetfeFCxjimsff2m31B1KuVXiT5PDB1w+BSrUK6nNzJubnYCRgjg4prVTjA50EhlT2P7EoJAbW3TnTq8vUDkcstsGe/HZpfIB1VHBX97u4fAfGJZ root@acs-jenkins diff --git a/src/bash/Makefile b/src/bash/Makefile new file mode 100644 index 00000000000..602dc01ece7 --- /dev/null +++ b/src/bash/Makefile @@ -0,0 +1,16 @@ +SHELL = /bin/bash +.ONESHELL: +.SHELLFLAGS += -e + +MAIN_TARGET = bash_$(BASH_VERSION_FULL)_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + rm -rf bash-$(BASH_VERSION_MAJOR) + + dget -u https://launchpad.net/debian/+archive/primary/+sourcefiles/bash/$(BASH_VERSION_FULL)/bash_$(BASH_VERSION_FULL).dsc + + pushd bash-$(BASH_VERSION_MAJOR) + DEB_BUILD_OPTIONS=nocheck dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + mv $* $(DEST)/ diff --git a/src/gobgp/Makefile b/src/gobgp/Makefile new file mode 100644 index 00000000000..4fda21013af --- /dev/null +++ b/src/gobgp/Makefile @@ -0,0 +1,23 @@ +export GOPATH=/tmp/go + +INSTALL := /usr/bin/install + +all: gobgp gobgpd + +gobgpd: + /usr/local/go/bin/go get -v github.com/osrg/gobgp/cmd/gobgpd + +gobgp: + /usr/local/go/bin/go get -v github.com/osrg/gobgp/cmd/gobgp + +install: + $(INSTALL) -D ${GOPATH}/bin/gobgp $(DESTDIR)/usr/bin/gobgp + $(INSTALL) -D ${GOPATH}/bin/gobgpd $(DESTDIR)/usr/sbin/gobgpd + $(INSTALL) -D gobgpd.conf.sample $(DESTDIR)/etc/gobgp/gobgpd.conf.sample + +deinstall: + rm $(DESTDIR)/usr/bin/gobgp + rm $(DESTDIR)/usr/sbin/gobgpd + +clean: + rm -fr ${GOPATH} diff --git a/src/gobgp/debian/changelog b/src/gobgp/debian/changelog new file mode 100644 index 00000000000..ba412cc45ed --- /dev/null +++ b/src/gobgp/debian/changelog @@ -0,0 +1,5 @@ +gobgp (1.16-01) UNRELEASED; urgency=low + + * Initial release. + + -- Pavel Shirshov Sat, 25 Feb 2017 00:25:19 +0000 diff --git a/src/gobgp/debian/compat b/src/gobgp/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/src/gobgp/debian/compat @@ -0,0 +1 @@ +9 diff --git a/src/gobgp/debian/control b/src/gobgp/debian/control new file mode 100644 index 00000000000..7d534852a38 --- /dev/null +++ b/src/gobgp/debian/control @@ -0,0 +1,12 @@ +Source: gobgp +Maintainer: Pavel Shirshov +Build-Depends: debhelper (>= 8.0.0), + dh-systemd +Standards-Version: 3.9.3 +Section: net + +Package: gobgp +Priority: extra +Architecture: amd64 +Depends: ${shlibs:Depends}, ${misc:Depends} +Description: gobgp BGP daemon diff --git a/src/gobgp/debian/gobgp.dirs b/src/gobgp/debian/gobgp.dirs new file mode 100644 index 00000000000..3e9f1c594d4 --- /dev/null +++ b/src/gobgp/debian/gobgp.dirs @@ -0,0 +1 @@ +etc/gobgp diff --git a/src/gobgp/debian/gobgp.init.d b/src/gobgp/debian/gobgp.init.d new file mode 100644 index 00000000000..189fdad0569 --- /dev/null +++ b/src/gobgp/debian/gobgp.init.d @@ -0,0 +1,50 @@ +#!/bin/bash +# +### BEGIN INIT INFO +# Provides: gobgp +# Required-Start: $local_fs $network $remote_fs $syslog +# Required-Stop: $local_fs $network $remote_fs $syslog +# Default-Start: 2 3 4 5 +# Default-Stop: 0 1 6 +# Short-Description: start and stop the gobgpd +# Description: gobgpd is an implementation of bgp daemon in Go +### END INIT INFO +# + +PATH=/bin:/usr/bin:/sbin:/usr/sbin +D_PATH=/usr/sbin +C_PATH=/etc/gobgp + +. /lib/lsb/init-functions + +######################################################### +# Main program # +######################################################### + +case "$1" in + start) + if [ -f /etc/gobgp/gobgpd.conf ] + then + /usr/sbin/gobgpd -f /etc/gobgp/gobgpd.conf -r + echo $! > /var/run/gobgpd.pid + else + echo /etc/gobgp/gobgpd.conf not found + fi + ;; + + stop) + kill -9 $(echo /var/run/gobgpd.pid) + ;; + + restart|force-reload) + $0 stop $2 + sleep 1 + $0 start $2 + ;; + *) + echo "Usage: /etc/init.d/gobgp {start|stop|restart|force-reload}" + exit 1 + ;; +esac + +exit 0 diff --git a/src/gobgp/debian/gobgp.service b/src/gobgp/debian/gobgp.service new file mode 100644 index 00000000000..68a0b595aa1 --- /dev/null +++ b/src/gobgp/debian/gobgp.service @@ -0,0 +1,16 @@ +[Unit] +Description=gobgp service +After=network.target +ConditionPathExists=/etc/gobgp/gobgpd.yml + +[Service] +EnvironmentFile=-/etc/default/gobgp +ExecStart=/usr/sbin/gobgpd $DAEMON_ARGS +#ExecReload=/bin/kill -HUP $MAINPID +KillMode=process +Restart=on-failure + +[Install] +WantedBy=multi-user.target +Alias=gobgpd.service + diff --git a/src/gobgp/debian/rules b/src/gobgp/debian/rules new file mode 100755 index 00000000000..b6bee2ee4e7 --- /dev/null +++ b/src/gobgp/debian/rules @@ -0,0 +1,3 @@ +#!/usr/bin/make -f +%: + dh $@ --with systemd diff --git a/src/gobgp/gobgpd.conf.sample b/src/gobgp/gobgpd.conf.sample new file mode 100644 index 00000000000..c308df15be2 --- /dev/null +++ b/src/gobgp/gobgpd.conf.sample @@ -0,0 +1,21 @@ +[global.config] + as = 65501 + router-id = "192.168.0.1" +[[neighbors]] + [neighbors.config] + peer-as = 65502 + neighbor-address = "192.168.0.2" + [neighbors.graceful-restart.config] + enabled = true + restart-time = 120 + [[neighbors.afi-safis]] + [neighbors.afi-safis.config] + afi-safi-name = "ipv4-unicast" + [neighbors.afi-safis.mp-graceful-restart.config] + enabled = true + +[zebra] + [zebra.config] + enabled = true + url = "unix:/var/run/quagga/zserv.api" + redistribute-route-type-list = ["connect"] diff --git a/src/hiredis/Makefile b/src/hiredis/Makefile new file mode 100644 index 00000000000..746056e51de --- /dev/null +++ b/src/hiredis/Makefile @@ -0,0 +1,22 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = libhiredis0.14_$(HIREDIS_VERSION_FULL)_$(CONFIGURED_ARCH).deb +DERIVED_TARGETS = libhiredis0.14-dbgsym_$(HIREDIS_VERSION_FULL)_$(CONFIGURED_ARCH).deb libhiredis-dev_$(HIREDIS_VERSION_FULL)_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + rm -rf hiredis-$(HIREDIS_VERSION) + + wget -O hiredis_$(HIREDIS_VERSION).orig.tar.gz http://http.debian.net/debian/pool/main/h/hiredis/hiredis_$(HIREDIS_VERSION).orig.tar.gz + wget -O hiredis_$(HIREDIS_VERSION_FULL).debian.tar.xz http://http.debian.net/debian/pool/main/h/hiredis/hiredis_$(HIREDIS_VERSION_FULL).debian.tar.xz + wget -O hiredis_$(HIREDIS_VERSION_FULL).dsc http://http.debian.net/debian/pool/main/h/hiredis/hiredis_$(HIREDIS_VERSION_FULL).dsc + + dpkg-source -x hiredis_$(HIREDIS_VERSION_FULL).dsc + pushd hiredis-$(HIREDIS_VERSION) + fakeroot debian/rules -j$(SONIC_CONFIG_MAKE_JOBS) binary + popd + + mv $* $(DERIVED_TARGETS) $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/ifupdown2/Makefile b/src/ifupdown2/Makefile new file mode 100644 index 00000000000..66b4df2ec32 --- /dev/null +++ b/src/ifupdown2/Makefile @@ -0,0 +1,21 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = $(IFUPDOWN2) + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Remove any stale files + rm -rf ./ifupdown2-$(IFUPDOWN2_VERSION) ./$(IFUPDOWN2_VERSION).tar.gz + + # Get ifupdown2 release + wget --no-check-certificate https://github.com/CumulusNetworks/ifupdown2/archive/$(IFUPDOWN2_VERSION).tar.gz + tar -z -f $(IFUPDOWN2_VERSION).tar.gz -x + pushd ./ifupdown2-$(IFUPDOWN2_VERSION) + + # Build source and Debian packages + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + # Move the newly-built .deb packages to the destination directory + mv $* $(DEST)/ diff --git a/src/initramfs-tools/Makefile b/src/initramfs-tools/Makefile new file mode 100644 index 00000000000..0b08e4aa431 --- /dev/null +++ b/src/initramfs-tools/Makefile @@ -0,0 +1,27 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = initramfs-tools_$(INITRAMFS_TOOLS_VERSION)_all.deb +DERIVED_TARGETS = initramfs-tools-core_$(INITRAMFS_TOOLS_VERSION)_all.deb + +INITRAMFS_TOOLS_REVISION = 18fc98e1b63b012f9bcf06ae3f5477872a5880c0 + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Obtaining the initramfs-tools + rm -rf ./initramfs-tools + git clone --branch v0.130 https://salsa.debian.org/kernel-team/initramfs-tools.git ./initramfs-tools + + # Patch + pushd ./initramfs-tools + git checkout $(INITRAMFS_TOOLS_REVISION) + patch -p1 < ../loopback-file-system-support.patch + + # Build the package + rm -f debian/*.debhelper.log + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/patch/initramfs-tools/loopback-file-system-support.patch b/src/initramfs-tools/loopback-file-system-support.patch similarity index 100% rename from patch/initramfs-tools/loopback-file-system-support.patch rename to src/initramfs-tools/loopback-file-system-support.patch diff --git a/src/iproute2/Makefile b/src/iproute2/Makefile new file mode 100644 index 00000000000..8748550a1d7 --- /dev/null +++ b/src/iproute2/Makefile @@ -0,0 +1,23 @@ +SHELL = /bin/bash +.ONESHELL: +.SHELLFLAGS += -e + +IPROUTE2_VERSION = 4.9.0 +IPROUTE2_VERSION_FULL = $(IPROUTE2_VERSION)-1 + +MAIN_TARGET = iproute2_$(IPROUTE2_VERSION_FULL)_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Remove any stale files + rm -rf iproute2-$(IPROUTE2_VERSION) + + wget -O iproute2_$(IPROUTE2_VERSION).orig.tar.xz -N "https://sonicstorage.blob.core.windows.net/packages/iproute2_4.9.0.orig.tar.xz?sv=2015-04-05&sr=b&sig=9nvybd1xkXyRQbaG6Fy6wBazPA8IbZV0AO41GWXPEP8%3D&se=2154-10-23T11%3A59%3A00Z&sp=r" + wget -O iproute2_$(IPROUTE2_VERSION_FULL).dsc -N "https://sonicstorage.blob.core.windows.net/packages/iproute2_4.9.0-1.dsc?sv=2015-04-05&sr=b&sig=m6FcMH9dOh8ggipBgOsONiXvDxoi6bfUO%2BxvidsMNMQ%3D&se=2154-10-23T11%3A59%3A53Z&sp=r" + wget -O iproute2_$(IPROUTE2_VERSION_FULL).debian.tar.xz -N "https://sonicstorage.blob.core.windows.net/packages/iproute2_4.9.0-1.debian.tar.xz?sv=2015-04-05&sr=b&sig=U5NFuwG5C3vZXlUUNvoPMnKDtMKk66zbweA9rQYbEVY%3D&se=2154-10-23T12%3A00%3A15Z&sp=r" + dpkg-source -x iproute2_$(IPROUTE2_VERSION_FULL).dsc + + pushd iproute2-$(IPROUTE2_VERSION) + dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + mv $* $(DEST)/ diff --git a/src/isc-dhcp/Makefile b/src/isc-dhcp/Makefile new file mode 100644 index 00000000000..45535574ed6 --- /dev/null +++ b/src/isc-dhcp/Makefile @@ -0,0 +1,32 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = isc-dhcp-relay_$(ISC_DHCP_VERSION)_$(CONFIGURED_ARCH).deb +DERIVED_TARGETS = isc-dhcp-relay-dbgsym_$(ISC_DHCP_VERSION)_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Remove any stale files + rm -rf ./isc-dhcp + + # Clone isc-dhcp repo + git clone https://salsa.debian.org/dhcp-team/isc-dhcp.git + pushd ./isc-dhcp + + # Reset HEAD to the commit of the proper tag + # NOTE: Using "git checkout " here detaches our HEAD, + # which stg doesn't like, so we use this method instead + git reset --hard debian/$(ISC_DHCP_VERSION) + + # Apply patches + stg init + stg import -s ../patch/series + + # Build source and Debian packages + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + # Move the newly-built .deb packages to the destination directory + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/isc-dhcp/patch/0001-Bugfix-Don-t-print-log-messages-to-stderr-in-release.patch b/src/isc-dhcp/patch/0001-Bugfix-Don-t-print-log-messages-to-stderr-in-release.patch new file mode 100644 index 00000000000..2ddbc1a90f9 --- /dev/null +++ b/src/isc-dhcp/patch/0001-Bugfix-Don-t-print-log-messages-to-stderr-in-release.patch @@ -0,0 +1,28 @@ +From 7c1cfd636be589317710a8556a7ec667debee53a Mon Sep 17 00:00:00 2001 +From: Joe LeVeque +Date: Fri, 26 Apr 2019 01:37:54 +0000 +Subject: [PATCH] [Bugfix] Don't print log messages to stderr in release builds + +--- + omapip/errwarn.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/omapip/errwarn.c b/omapip/errwarn.c +index 7c91d9d..aa74fd8 100644 +--- a/omapip/errwarn.c ++++ b/omapip/errwarn.c +@@ -39,9 +39,9 @@ + #include + + #ifdef DEBUG +-int log_perror = -1; +-#else + int log_perror = 1; ++#else ++int log_perror = 0; + #endif + void (*log_cleanup) (void); + +-- +2.17.1 + diff --git a/src/isc-dhcp/patch/0002-Customizable-Option-82-circuit-ID-and-remote-ID-fiel.patch b/src/isc-dhcp/patch/0002-Customizable-Option-82-circuit-ID-and-remote-ID-fiel.patch new file mode 100644 index 00000000000..a796845e516 --- /dev/null +++ b/src/isc-dhcp/patch/0002-Customizable-Option-82-circuit-ID-and-remote-ID-fiel.patch @@ -0,0 +1,265 @@ +From 6b4c2e815118fb7312b8e8a07ac61a772b57e91a Mon Sep 17 00:00:00 2001 +From: Joe LeVeque +Date: Thu, 25 Apr 2019 22:07:20 +0000 +Subject: [PATCH] Customizable Option 82 circuit ID and remote ID fields + +--- + relay/dhcrelay.c | 171 ++++++++++++++++++++++++++++++++++++++++------- + 1 file changed, 147 insertions(+), 24 deletions(-) + +diff --git a/relay/dhcrelay.c b/relay/dhcrelay.c +index 344cee7..7b4c1ef 100644 +--- a/relay/dhcrelay.c ++++ b/relay/dhcrelay.c +@@ -75,6 +75,8 @@ int bad_circuit_id = 0; /* Circuit ID option in matching RAI option + did not match any known circuit ID. */ + int missing_circuit_id = 0; /* Circuit ID option in matching RAI option + was missing. */ ++const char *agent_circuit_id_fmt = NULL; /* Circuit ID custom format string. */ ++const char *agent_remote_id_fmt = NULL; /* Remote ID custom format string. */ + int max_hop_count = 10; /* Maximum hop count */ + + #ifdef DHCPv6 +@@ -148,9 +150,19 @@ static const char url[] = + + char *progname; + ++#define DHCRELAY_OPTION82_USAGE \ ++"circuit_id/remote_id interpreted sequences are:\n" \ ++"\n" \ ++" %%%% A single %%\n" \ ++" %%h Hostname of device\n" \ ++" %%p Name of interface that generated the request\n" \ ++" %%P Hardware address of interface that generated the request\n" \ ++" %%C Client hardware address\n" \ ++" %%I DHCP relay agent IP Address\n" \ ++ + #ifdef DHCPv6 + #define DHCRELAY_USAGE \ +-"Usage: %s [-4] [-d] [-q] [-a] [-D]\n"\ ++"Usage: %s [-4] [-d] [-q] [-a ] [-D]\n"\ + " [-A ] [-c ] [-p ]\n" \ + " [-pf ] [--no-pid]\n"\ + " [-m append|replace|forward|discard]\n" \ +@@ -165,17 +177,18 @@ char *progname; + " -l lower0 [ ... -l lowerN]\n" \ + " -u upper0 [ ... -u upperN]\n" \ + " lower (client link): [address%%]interface[#index]\n" \ +-" upper (server link): [address%%]interface" ++" upper (server link): [address%%]interface\n\n" DHCRELAY_OPTION82_USAGE + #else + #define DHCRELAY_USAGE \ +-"Usage: %s [-d] [-q] [-a] [-D] [-A ] [-c ] [-p ]\n" \ ++"Usage: %s [-d] [-q] [-a ] [-D]\n" \ ++" [-A ] [-c ] [-p ]\n" \ + " [-pf ] [--no-pid]\n" \ + " [-m append|replace|forward|discard]\n" \ + " [-i interface0 [ ... -i interfaceN]\n" \ + " [-iu interface0 [ ... -iu interfaceN]\n" \ + " [-id interface0 [ ... -id interfaceN]\n" \ + " [-U interface]\n" \ +-" server0 [ ... serverN]\n\n" ++" server0 [ ... serverN]\n\n" DHCRELAY_OPTION82_USAGE + #endif + + /*! +@@ -354,6 +367,15 @@ main(int argc, char **argv) { + local_family_set = 1; + local_family = AF_INET; + #endif ++ if (++i == argc) ++ usage(use_noarg, argv[i-1]); ++ ++ if (argv[i] != NULL && argv[i][0] != '-') ++ agent_circuit_id_fmt = argv[i++]; ++ ++ if (argv[i] != NULL && argv[i][0] != '-') ++ agent_remote_id_fmt = argv[i]; ++ + add_agent_options = 1; + } else if (!strcmp(argv[i], "-A")) { + #ifdef DHCPv6 +@@ -1050,6 +1072,81 @@ find_interface_by_agent_option(struct dhcp_packet *packet, + return (-1); + } + ++/* ++ * Format the message that will be used by circuit_id and remote_id ++ */ ++static int ++format_relay_agent_rfc3046_msg(const struct interface_info *ip, struct dhcp_packet *packet, ++ const char *format, char *msg, size_t msgn) { ++ size_t len = 0; ++ char hostname[HOST_NAME_MAX] = { 0 }; ++ char ifname[IFNAMSIZ] = { 0 }; ++ char *buf = msg; ++ ++ for ( ; format && *format && len < msgn; ++format) { ++ size_t strn = 0; ++ const char *str = NULL; ++ ++ if (*format == '%') { ++ switch (*++format) { ++ case '\0': ++ --format; ++ break; ++ ++ case '%': /* A literal '%' */ ++ str = "%"; ++ break; ++ ++ case 'h': /* Hostname */ ++ gethostname(hostname, HOST_NAME_MAX); ++ hostname[HOST_NAME_MAX - 1] = '\0'; ++ str = hostname; ++ break; ++ ++ case 'p': /* Name of interface that we received the request from */ ++ strncpy(ifname, ip->name, IFNAMSIZ); ++ str = ifname; ++ break; ++ ++ case 'P': /* Physical address of interface that we received the request from */ ++ str = print_hw_addr(ip->hw_address.hbuf[0], ip->hw_address.hlen - 1, &ip->hw_address.hbuf[1]); ++ break; ++ ++ case 'C': /* 24: Client hardware address */ ++ str = print_hw_addr(packet->htype, packet->hlen, packet->chaddr); ++ break; ++ ++ case 'I': /* 20: DHCP relay agent IP address */ ++ str = inet_ntoa(packet->giaddr); ++ break; ++ ++ default: ++ log_error("Option %%%c is unrecognized and will not be formatted!", *format); ++ continue; ++ } ++ ++ if (str) { ++ strn = strlen(str); ++ } ++ } else { ++ str = format; ++ strn = 1; ++ } ++ ++ // Do we have room? ++ if ((strn+len) >= msgn) { ++ return 0; ++ } ++ ++ if (str && strn > 0) { ++ memcpy(buf+len, str, strn); ++ len += strn; ++ } ++ } ++ ++ return len; ++} ++ + /* + * Examine a packet to see if it's a candidate to have a Relay + * Agent Information option tacked onto its tail. If it is, tack +@@ -1059,9 +1156,12 @@ static int + add_relay_agent_options(struct interface_info *ip, struct dhcp_packet *packet, + unsigned length, struct in_addr giaddr) { + int is_dhcp = 0, mms; +- unsigned optlen; ++ unsigned optlen = 0; + u_int8_t *op, *nextop, *sp, *max, *end_pad = NULL; + int adding_link_select; ++ char circuit_id_buf[256] = { '\0' }; ++ char remote_id_buf[256] = { '\0' }; ++ size_t circuit_id_len = 0, remote_id_len = 0; + + /* If we're not adding agent options to packets, we can skip + this. */ +@@ -1195,17 +1295,40 @@ add_relay_agent_options(struct interface_info *ip, struct dhcp_packet *packet, + op = sp; + #endif + +- /* Sanity check. Had better not ever happen. */ +- if ((ip->circuit_id_len > 255) ||(ip->circuit_id_len < 1)) +- log_fatal("Circuit ID length %d out of range [1-255] on " +- "%s\n", ip->circuit_id_len, ip->name); +- optlen = ip->circuit_id_len + 2; /* RAI_CIRCUIT_ID + len */ +- +- if (ip->remote_id) { +- if (ip->remote_id_len > 255 || ip->remote_id_len < 1) +- log_fatal("Remote ID length %d out of range [1-255] " +- "on %s\n", ip->remote_id_len, ip->name); +- optlen += ip->remote_id_len + 2; /* RAI_REMOTE_ID + len */ ++ /* option82: custom string for circuit_id */ ++ if (agent_circuit_id_fmt) { ++ circuit_id_len = format_relay_agent_rfc3046_msg(ip, packet, agent_circuit_id_fmt, ++ circuit_id_buf, sizeof(circuit_id_buf)); ++ ++ if (circuit_id_len == 0) { ++ strncpy(circuit_id_buf, ip->name, sizeof(ip->name)); ++ circuit_id_len = strlen(circuit_id_buf); ++ } ++ ++ /* Sanity check. Had better not ever happen. */ ++ if (circuit_id_len > 255 || circuit_id_len < 1) ++ log_fatal("Circuit ID length %d out of range [1-255] on %s\n", ++ (int)circuit_id_len, ip->name); ++ ++ optlen = circuit_id_len + 2; // RAI_CIRCUIT_ID + len ++ ++ //log_debug("Sending on %s option82:circuit_id='%s' (%d)", ++ // ip->name, circuit_id_buf, (int)circuit_id_len); ++ } ++ ++ /* option82: custom string for remote_id */ ++ if (agent_remote_id_fmt) { ++ remote_id_len = format_relay_agent_rfc3046_msg(ip, packet, agent_remote_id_fmt, ++ remote_id_buf, sizeof(remote_id_buf)); ++ ++ if (remote_id_len > 255 || remote_id_len < 1) ++ log_fatal("Remote ID length %d out of range [1-255] on %s\n", ++ (int)remote_id_len, ip->name); ++ ++ optlen += remote_id_len + 2; // RAI_REMOTE_ID + len ++ ++ //log_debug("Sending on %s option82:remote_id='%s' (%d)", ++ // ip->name, remote_id_buf, (int)remote_id_len); + } + + if (adding_link_select) { +@@ -1224,7 +1347,7 @@ add_relay_agent_options(struct interface_info *ip, struct dhcp_packet *packet, + * If not, forward without adding the option. + */ + if (max - sp >= optlen + 3) { +- log_debug("Adding %d-byte relay agent option", optlen + 3); ++ //log_debug("Adding %d-byte relay agent option", optlen + 3); + + /* Okay, cons up *our* Relay Agent Information option. */ + *sp++ = DHO_DHCP_AGENT_OPTIONS; +@@ -1232,16 +1355,16 @@ add_relay_agent_options(struct interface_info *ip, struct dhcp_packet *packet, + + /* Copy in the circuit id... */ + *sp++ = RAI_CIRCUIT_ID; +- *sp++ = ip->circuit_id_len; +- memcpy(sp, ip->circuit_id, ip->circuit_id_len); +- sp += ip->circuit_id_len; ++ *sp++ = circuit_id_len; ++ memcpy(sp, circuit_id_buf, circuit_id_len); ++ sp += circuit_id_len; + + /* Copy in remote ID... */ +- if (ip->remote_id) { ++ if (remote_id_len > 0) { + *sp++ = RAI_REMOTE_ID; +- *sp++ = ip->remote_id_len; +- memcpy(sp, ip->remote_id, ip->remote_id_len); +- sp += ip->remote_id_len; ++ *sp++ = remote_id_len; ++ memcpy(sp, remote_id_buf, remote_id_len); ++ sp += remote_id_len; + } + + /* RFC3527: Use the inbound packet's interface address in +-- +2.17.1 + diff --git a/src/isc-dhcp/patch/0003-Support-for-obtaining-name-of-physical-interface-tha.patch b/src/isc-dhcp/patch/0003-Support-for-obtaining-name-of-physical-interface-tha.patch new file mode 100644 index 00000000000..fd9ff420d97 --- /dev/null +++ b/src/isc-dhcp/patch/0003-Support-for-obtaining-name-of-physical-interface-tha.patch @@ -0,0 +1,98 @@ +From ab0be27d3862c7287e3b181cc6a70effa054be1c Mon Sep 17 00:00:00 2001 +From: Joe LeVeque +Date: Fri, 26 Apr 2019 01:06:49 +0000 +Subject: [PATCH] Support for obtaining name of physical interface that is a + member of a bridge interface + +--- + relay/dhcrelay.c | 67 ++++++++++++++++++++++++++++++++++++++++++++++-- + 1 file changed, 65 insertions(+), 2 deletions(-) + +diff --git a/relay/dhcrelay.c b/relay/dhcrelay.c +index 4659660..0f7d658 100644 +--- a/relay/dhcrelay.c ++++ b/relay/dhcrelay.c +@@ -1072,6 +1072,47 @@ find_interface_by_agent_option(struct dhcp_packet *packet, + return (-1); + } + ++static int ++_bridgefdbquery(const char *hwAddr, char *interface, int *vlanid) { ++ ++#define xstr(s) str(s) ++#define str(s) #s ++#define FDB_STRING_LEN 100 ++#define FDB_BUFFER_LEN (FDB_STRING_LEN + 1) ++ ++/* ++ * Format for sscanf() to read the 1st, 3th, and 5th ++ * space-delimited fields ++ * ++ * bridge fdb show output ++ * 6c:64:1a:00:06:13 dev swp35 vlan 0 master bridge permanent ++ */ ++#define FDB_LINE_FORMAT "%" xstr(FDB_STRING_LEN) "s %*s " \ ++ "%" xstr(FDB_STRING_LEN) "s %*s %d %*s" ++ ++ char cmdstr[FDB_BUFFER_LEN]; ++ char buf[FDB_BUFFER_LEN]; ++ char macAddr[FDB_BUFFER_LEN]; ++ ++ if ((interface == NULL) || (vlanid == NULL)) { ++ return 0; ++ } ++ sprintf(cmdstr, "bridge fdb show | grep -m 1 %s", hwAddr); ++ FILE *cmd = popen(cmdstr, "r"); ++ ++ if (cmd != NULL) { ++ while (fgets(buf, sizeof(buf), cmd)) { ++ sscanf(buf, FDB_LINE_FORMAT, macAddr, interface, vlanid); ++ //log_debug("bridgefdbquery: macAddr: %s interface: %s vlanid: %d", ++ // macAddr, interface, *vlanid); ++ } ++ pclose(cmd); ++ return 0; ++ } ++ ++ return -1; ++} ++ + /* + * Format the message that will be used by circuit_id and remote_id + */ +@@ -1104,8 +1145,30 @@ format_relay_agent_rfc3046_msg(const struct interface_info *ip, struct dhcp_pack + break; + + case 'p': /* Name of interface that we received the request from */ +- strncpy(ifname, ip->name, IFNAMSIZ); +- str = ifname; ++ /* ++ * Query FDB to identify the exact physical interface only when source MAC address ++ * is present and '20: DHCP relay agent IP address' (giaddr) is not present ++ */ ++ if (packet->htype && !packet->giaddr.s_addr) { ++ int ret = 0, vlanid = 0; ++ ++ ret = _bridgefdbquery(print_hw_addr(packet->htype, packet->hlen, packet->chaddr), ++ ifname, ++ &vlanid); ++ ++ // If we failed to find a physical interface using the source mac, default ++ // to the interface name we received it on. ++ if (ret < 0) { ++ //log_debug("MAC Address: %s (interface:%s vlan:%d) not found in bridge fdb show", ++ // print_hw_addr (packet->htype, packet->hlen, packet->chaddr), ++ // ip->name, ++ // vlanid); ++ ++ strncpy(ifname, ip->name, IFNAMSIZ); ++ } ++ ++ str = ifname; ++ } + break; + + case 'P': /* Physical address of interface that we received the request from */ +-- +2.17.1 + diff --git a/src/isc-dhcp/patch/0004-Support-for-loading-port-alias-map-file-to-replace-p.patch b/src/isc-dhcp/patch/0004-Support-for-loading-port-alias-map-file-to-replace-p.patch new file mode 100644 index 00000000000..b564a0822a0 --- /dev/null +++ b/src/isc-dhcp/patch/0004-Support-for-loading-port-alias-map-file-to-replace-p.patch @@ -0,0 +1,189 @@ +From 9d255bbd7d7aadac5b57cba2ab4e29cecdf0180f Mon Sep 17 00:00:00 2001 +From: Joe LeVeque +Date: Fri, 26 Apr 2019 01:26:45 +0000 +Subject: [PATCH] Support for loading port alias map file to replace port name + with alias in circuit id + +--- + relay/dhcrelay.c | 105 ++++++++++++++++++++++++++++++++++++++++++++++- + 1 file changed, 104 insertions(+), 1 deletion(-) + +diff --git a/relay/dhcrelay.c b/relay/dhcrelay.c +index 0f7d658..797dac6 100644 +--- a/relay/dhcrelay.c ++++ b/relay/dhcrelay.c +@@ -126,6 +126,14 @@ static void setup_streams(void); + char *dhcrelay_sub_id = NULL; + #endif + ++struct interface_name_alias_tuple { ++ char if_name[IFNAMSIZ]; ++ char if_alias[IFNAMSIZ]; ++}; ++ ++static struct interface_name_alias_tuple *g_interface_name_alias_map = NULL; ++static size_t g_interface_name_alias_map_size = 0; ++ + static void do_relay4(struct interface_info *, struct dhcp_packet *, + unsigned int, unsigned int, struct iaddr, + struct hardware *); +@@ -140,6 +148,10 @@ static int strip_relay_agent_options(struct interface_info *, + + static void request_v4_interface(const char* name, int flags); + ++static int load_interface_alias_map(const char *port_alias_map_file_path); ++static int get_interface_alias_by_name(const char *if_name, char *if_alias_out); ++static void free_interface_alias_map(void); ++ + static const char copyright[] = + "Copyright 2004-2016 Internet Systems Consortium."; + static const char arr[] = "All rights reserved."; +@@ -155,7 +167,7 @@ char *progname; + "\n" \ + " %%%% A single %%\n" \ + " %%h Hostname of device\n" \ +-" %%p Name of interface that generated the request\n" \ ++" %%p Alias of interface that generated the request\n" \ + " %%P Hardware address of interface that generated the request\n" \ + " %%C Client hardware address\n" \ + " %%I DHCP relay agent IP Address\n" \ +@@ -166,6 +178,7 @@ char *progname; + " [-A ] [-c ] [-p ]\n" \ + " [-pf ] [--no-pid]\n"\ + " [-m append|replace|forward|discard]\n" \ ++" [--name-alias-map-file ]\n" \ + " [-i interface0 [ ... -i interfaceN]\n" \ + " [-iu interface0 [ ... -iu interfaceN]\n" \ + " [-id interface0 [ ... -id interfaceN]\n" \ +@@ -173,6 +186,7 @@ char *progname; + " server0 [ ... serverN]\n\n" \ + " %s -6 [-d] [-q] [-I] [-c ] [-p ]\n" \ + " [-pf ] [--no-pid]\n" \ ++" [--name-alias-map-file ]\n" \ + " [-s ]\n" \ + " -l lower0 [ ... -l lowerN]\n" \ + " -u upper0 [ ... -u upperN]\n" \ +@@ -503,6 +517,11 @@ main(int argc, char **argv) { + no_dhcrelay_pid = ISC_TRUE; + } else if (!strcmp(argv[i], "--no-pid")) { + no_pid_file = ISC_TRUE; ++ } else if (!strcmp(argv[i], "--name-alias-map-file")) { ++ if (++i == argc) ++ usage(use_noarg, argv[i-1]); ++ if (load_interface_alias_map(argv[i]) != 0) ++ log_fatal("Failed to load interface name-alias map."); + } else if (!strcmp(argv[i], "--version")) { + log_info("isc-dhcrelay-%s", PACKAGE_VERSION); + exit(0); +@@ -726,6 +745,7 @@ main(int argc, char **argv) { + dispatch(); + + /* In fact dispatch() never returns. */ ++ free_interface_alias_map(); + return (0); + } + +@@ -1151,6 +1171,7 @@ format_relay_agent_rfc3046_msg(const struct interface_info *ip, struct dhcp_pack + */ + if (packet->htype && !packet->giaddr.s_addr) { + int ret = 0, vlanid = 0; ++ char ifalias[IFNAMSIZ] = { 0 }; + + ret = _bridgefdbquery(print_hw_addr(packet->htype, packet->hlen, packet->chaddr), + ifname, +@@ -1167,6 +1188,18 @@ format_relay_agent_rfc3046_msg(const struct interface_info *ip, struct dhcp_pack + strncpy(ifname, ip->name, IFNAMSIZ); + } + ++ // Attempt to translate SONiC interface name to vendor alias ++ ret = get_interface_alias_by_name(ifname, ifalias); ++ if (ret < 0) { ++ //log_debug("Failed to retrieve alias for interface name '%s'. Defaulting to interface name.", ifname); ++ } ++ else { ++ //log_debug("Mapped interface name '%s' to alias '%s'. Adding as option 82 interface alias for MAC Address %s", ++ // ifname, ifalias, print_hw_addr (packet->htype, packet->hlen, packet->chaddr)); ++ ++ strncpy(ifname, ifalias, IFNAMSIZ); ++ } ++ + str = ifname; + } + break; +@@ -2096,3 +2129,73 @@ void request_v4_interface(const char* name, int flags) { + interface_snorf(tmp, (INTERFACE_REQUESTED | flags)); + interface_dereference(&tmp, MDL); + } ++ ++#define MAX_PORT_CONFIG_LINE_LEN 1024 ++ ++// Allocates and loads global map g_interface_name_alias_map ++// Also sets global g_interface_name_alias_map_size ++static int ++load_interface_alias_map(const char *port_alias_map_file_path) { ++ int i = 0; ++ FILE *fp = NULL; ++ char line[MAX_PORT_CONFIG_LINE_LEN] = { 0 }; ++ ++ fp = fopen(port_alias_map_file_path,"r"); ++ if (fp == NULL) { ++ log_error("Unable to open %s", port_alias_map_file_path); ++ return -1; ++ } ++ ++ g_interface_name_alias_map_size = 0; ++ ++ // Count the number of interfaces listed in the file ++ while (fgets(line, sizeof(line), fp)) { ++ g_interface_name_alias_map_size++; ++ } ++ ++ // Allocate our map accordingly ++ g_interface_name_alias_map = ((struct interface_name_alias_tuple *) ++ dmalloc((sizeof(struct interface_name_alias_tuple) * g_interface_name_alias_map_size), ++ MDL)); ++ ++ // Reset file position indicator to beginning of file ++ fseek(fp, 0, SEEK_SET); ++ ++ // Every line should contain exactly one name-alias pair ++ while (fgets(line, sizeof(line), fp)) { ++ // Each line should read as "" ++ sscanf(line, "%s %s", g_interface_name_alias_map[i].if_name, g_interface_name_alias_map[i].if_alias); ++ i++; ++ } ++ ++ fclose(fp); ++ ++ log_info("Loaded %d interface name-alias mappings", i); ++ ++ return 0; ++} ++ ++// Locates alias for port named if_name, copies alias into if_alias_out, up to a ++// max of IFNAMSIZ bytes. ++// Returns 0 on success, -1 on failure ++static int ++get_interface_alias_by_name(const char *if_name, char *if_alias_out) { ++ int i = 0; ++ ++ for (i = 0; i < g_interface_name_alias_map_size; i++) { ++ if (strncmp(if_name, g_interface_name_alias_map[i].if_name, IFNAMSIZ) == 0) { ++ strncpy(if_alias_out, g_interface_name_alias_map[i].if_alias, IFNAMSIZ); ++ return 0; ++ } ++ } ++ ++ return -1; ++} ++ ++// Frees global map g_interface_name_alias_map ++// Sets g_interface_name_alias_map_size to 0 ++static void ++free_interface_alias_map(void) { ++ free(g_interface_name_alias_map); ++ g_interface_name_alias_map_size = 0; ++} +-- +2.17.1 + diff --git a/src/isc-dhcp/patch/0005-Add-enable-use-sockets-to-configure-flags-in-debian-.patch b/src/isc-dhcp/patch/0005-Add-enable-use-sockets-to-configure-flags-in-debian-.patch new file mode 100644 index 00000000000..7c39f977bb3 --- /dev/null +++ b/src/isc-dhcp/patch/0005-Add-enable-use-sockets-to-configure-flags-in-debian-.patch @@ -0,0 +1,26 @@ +From 5c64cb06e3ac50a1cbca85669625fe16439064ad Mon Sep 17 00:00:00 2001 +From: Joe LeVeque +Date: Fri, 17 May 2019 21:49:00 +0000 +Subject: [PATCH 1/3] Add --enable-use-sockets to configure flags in + debian/rules + +--- + debian/rules | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/debian/rules b/debian/rules +index 114606b..9919237 100755 +--- a/debian/rules ++++ b/debian/rules +@@ -23,7 +23,7 @@ CFLAGS+=-D_PATH_DHCLIENT_CONF='\"/etc/dhcp/dhclient.conf\"' + CFLAGS+=-D_PATH_DHCLIENT_DB='\"$(LEASE_PATH)/dhclient.leases\"' + CFLAGS+=-D_PATH_DHCLIENT6_DB='\"$(LEASE_PATH)/dhclient6.leases\"' + +-CONFFLAGS=--prefix=/usr --enable-log-pid --enable-paranoia ++CONFFLAGS=--prefix=/usr --enable-log-pid --enable-paranoia --enable-use-sockets + + # cross-architecture building + ifneq ($(DEB_HOST_GNU_TYPE),$(DEB_BUILD_GNU_TYPE)) +-- +2.17.1 + diff --git a/src/isc-dhcp/patch/0006-Bugfix-Ensure-HAVE_SO_BINDTODEVICE-has-a-chance-to-b.patch b/src/isc-dhcp/patch/0006-Bugfix-Ensure-HAVE_SO_BINDTODEVICE-has-a-chance-to-b.patch new file mode 100644 index 00000000000..5553180f40e --- /dev/null +++ b/src/isc-dhcp/patch/0006-Bugfix-Ensure-HAVE_SO_BINDTODEVICE-has-a-chance-to-b.patch @@ -0,0 +1,275 @@ +From 6620d4778fe36c89ce2e95d6932338cefc90df7d Mon Sep 17 00:00:00 2001 +From: Joe LeVeque +Date: Fri, 17 May 2019 21:53:52 +0000 +Subject: [PATCH 2/3] Bugfix: Ensure HAVE_SO_BINDTODEVICE has a chance to be + defined before it is referenced + +--- + includes/osdep.h | 239 ++++++++++++++++++++++++----------------------- + 1 file changed, 120 insertions(+), 119 deletions(-) + +diff --git a/includes/osdep.h b/includes/osdep.h +index cfae90b..f07c43c 100644 +--- a/includes/osdep.h ++++ b/includes/osdep.h +@@ -48,37 +48,6 @@ + #define BYTE_ORDER DHCP_BYTE_ORDER + #endif /* BYTE_ORDER */ + +-/* Porting:: +- +- If you add a new network API, you must add a check for it below: */ +- +-#if !defined (USE_SOCKETS) && \ +- !defined (USE_SOCKET_SEND) && \ +- !defined (USE_SOCKET_RECEIVE) && \ +- !defined (USE_RAW_SOCKETS) && \ +- !defined (USE_RAW_SEND) && \ +- !defined (USE_SOCKET_RECEIVE) && \ +- !defined (USE_BPF) && \ +- !defined (USE_BPF_SEND) && \ +- !defined (USE_BPF_RECEIVE) && \ +- !defined (USE_LPF) && \ +- !defined (USE_LPF_SEND) && \ +- !defined (USE_LPF_RECEIVE) && \ +- !defined (USE_NIT) && \ +- !defined (USE_NIT_SEND) && \ +- !defined (USE_NIT_RECEIVE) && \ +- !defined (USE_DLPI_SEND) && \ +- !defined (USE_DLPI_RECEIVE) +-/* Determine default socket API to USE. */ +-# if defined(HAVE_BPF) +-# define USE_BPF 1 +-# elif defined(HAVE_LPF) +-# define USE_LPF 1 +-# elif defined(HAVE_DLPI) +-# define USE_DLPI 1 +-# endif +-#endif +- + #if !defined (TIME_MAX) + # define TIME_MAX 2147483647 + #endif +@@ -91,94 +60,6 @@ + # define vsnprintf isc_print_vsnprintf + #endif + +-/* Porting:: +- +- If you add a new network API, and have it set up so that it can be +- used for sending or receiving, but doesn't have to be used for both, +- then set up an ifdef like the ones below: */ +- +-#ifdef USE_SOCKETS +-# define USE_SOCKET_SEND +-# define USE_SOCKET_RECEIVE +-# if defined(HAVE_DLPI) && !defined(sun) && !defined(USE_V4_PKTINFO) +-# define USE_DLPI_HWADDR +-# elif defined(HAVE_LPF) +-# define USE_LPF_HWADDR +-# elif defined(HAVE_BPF) +-# define USE_BPF_HWADDR +-# endif +-#endif +- +-#ifdef USE_RAW_SOCKETS +-# define USE_RAW_SEND +-# define USE_SOCKET_RECEIVE +-#endif +- +-#ifdef USE_BPF +-# define USE_BPF_SEND +-# define USE_BPF_RECEIVE +-#endif +- +-#ifdef USE_LPF +-# define USE_LPF_SEND +-# define USE_LPF_RECEIVE +-#endif +- +-#ifdef USE_NIT +-# define USE_NIT_SEND +-# define USE_NIT_RECEIVE +-#endif +- +-#ifdef USE_DLPI +-# define USE_DLPI_SEND +-# define USE_DLPI_RECEIVE +-#endif +- +-#ifdef USE_UPF +-# define USE_UPF_SEND +-# define USE_UPF_RECEIVE +-#endif +- +-/* Porting:: +- +- If you add support for sending packets directly out an interface, +- and your support does not do ARP or routing, you must use a fallback +- mechanism to deal with packets that need to be sent to routers. +- Currently, all low-level packet interfaces use BSD sockets as a +- fallback. */ +- +-#if defined (USE_BPF_SEND) || defined (USE_NIT_SEND) || \ +- defined (USE_DLPI_SEND) || defined (USE_UPF_SEND) || \ +- defined (USE_LPF_SEND) || \ +- (defined (USE_SOCKET_SEND) && defined (HAVE_SO_BINDTODEVICE)) +-# define USE_SOCKET_FALLBACK +-# define USE_FALLBACK +-#endif +- +-/* Porting:: +- +- If you add support for sending packets directly out an interface +- and need to be able to assemble packets, add the USE_XXX_SEND +- definition for your interface to the list tested below. */ +- +-#if defined (USE_RAW_SEND) || defined (USE_BPF_SEND) || \ +- defined (USE_NIT_SEND) || defined (USE_UPF_SEND) || \ +- defined (USE_DLPI_SEND) || defined (USE_LPF_SEND) +-# define PACKET_ASSEMBLY +-#endif +- +-/* Porting:: +- +- If you add support for receiving packets directly from an interface +- and need to be able to decode raw packets, add the USE_XXX_RECEIVE +- definition for your interface to the list tested below. */ +- +-#if defined (USE_RAW_RECEIVE) || defined (USE_BPF_SEND) || \ +- defined (USE_NIT_RECEIVE) || defined (USE_UPF_RECEIVE) || \ +- defined (USE_DLPI_RECEIVE) || defined (USE_LPF_RECEIVE) +-# define PACKET_DECODING +-#endif +- + /* If we don't have a DLPI packet filter, we have to filter in userland. + Probably not worth doing, actually. */ + #if defined (USE_DLPI_RECEIVE) && !defined (USE_DLPI_PFMOD) +@@ -288,4 +169,124 @@ + # define STDERR_FILENO 2 + #endif + ++/* Porting:: ++ ++ If you add a new network API, you must add a check for it below: */ ++ ++#if !defined (USE_SOCKETS) && \ ++ !defined (USE_SOCKET_SEND) && \ ++ !defined (USE_SOCKET_RECEIVE) && \ ++ !defined (USE_RAW_SOCKETS) && \ ++ !defined (USE_RAW_SEND) && \ ++ !defined (USE_SOCKET_RECEIVE) && \ ++ !defined (USE_BPF) && \ ++ !defined (USE_BPF_SEND) && \ ++ !defined (USE_BPF_RECEIVE) && \ ++ !defined (USE_LPF) && \ ++ !defined (USE_LPF_SEND) && \ ++ !defined (USE_LPF_RECEIVE) && \ ++ !defined (USE_NIT) && \ ++ !defined (USE_NIT_SEND) && \ ++ !defined (USE_NIT_RECEIVE) && \ ++ !defined (USE_DLPI_SEND) && \ ++ !defined (USE_DLPI_RECEIVE) ++/* Determine default socket API to USE. */ ++# if defined(HAVE_BPF) ++# define USE_BPF 1 ++# elif defined(HAVE_LPF) ++# define USE_LPF 1 ++# elif defined(HAVE_DLPI) ++# define USE_DLPI 1 ++# endif ++#endif ++ ++/* Porting:: ++ ++ If you add a new network API, and have it set up so that it can be ++ used for sending or receiving, but doesn't have to be used for both, ++ then set up an ifdef like the ones below: */ ++ ++#ifdef USE_SOCKETS ++# define USE_SOCKET_SEND ++# define USE_SOCKET_RECEIVE ++# if defined(HAVE_DLPI) && !defined(sun) && !defined(USE_V4_PKTINFO) ++# define USE_DLPI_HWADDR ++# elif defined(HAVE_LPF) ++# define USE_LPF_HWADDR ++# elif defined(HAVE_BPF) ++# define USE_BPF_HWADDR ++# endif ++#endif ++ ++#ifdef USE_RAW_SOCKETS ++# define USE_RAW_SEND ++# define USE_SOCKET_RECEIVE ++#endif ++ ++#ifdef USE_BPF ++# define USE_BPF_SEND ++# define USE_BPF_RECEIVE ++#endif ++ ++#ifdef USE_LPF ++# define USE_LPF_SEND ++# define USE_LPF_RECEIVE ++#endif ++ ++#ifdef USE_NIT ++# define USE_NIT_SEND ++# define USE_NIT_RECEIVE ++#endif ++ ++#ifdef USE_DLPI ++# define USE_DLPI_SEND ++# define USE_DLPI_RECEIVE ++#endif ++ ++#ifdef USE_UPF ++# define USE_UPF_SEND ++# define USE_UPF_RECEIVE ++#endif ++ ++/* Porting:: ++ ++ If you add support for sending packets directly out an interface, ++ and your support does not do ARP or routing, you must use a fallback ++ mechanism to deal with packets that need to be sent to routers. ++ Currently, all low-level packet interfaces use BSD sockets as a ++ fallback. */ ++ ++#if defined (USE_BPF_SEND) || defined (USE_NIT_SEND) || \ ++ defined (USE_DLPI_SEND) || defined (USE_UPF_SEND) || \ ++ defined (USE_LPF_SEND) || \ ++ (defined (USE_SOCKET_SEND) && defined (HAVE_SO_BINDTODEVICE)) ++# define USE_SOCKET_FALLBACK ++# define USE_FALLBACK ++#endif ++ ++/* Porting:: ++ ++ If you add support for sending packets directly out an interface ++ and need to be able to assemble packets, add the USE_XXX_SEND ++ definition for your interface to the list tested below. */ ++ ++#if defined (USE_RAW_SEND) || defined (USE_BPF_SEND) || \ ++ defined (USE_NIT_SEND) || defined (USE_UPF_SEND) || \ ++ defined (USE_DLPI_SEND) || defined (USE_LPF_SEND) ++# define PACKET_ASSEMBLY ++#endif ++ ++/* Porting:: ++ ++ If you add support for receiving packets directly from an interface ++ and need to be able to decode raw packets, add the USE_XXX_RECEIVE ++ definition for your interface to the list tested below. */ ++ ++#if defined (USE_RAW_RECEIVE) || defined (USE_BPF_SEND) || \ ++ defined (USE_NIT_RECEIVE) || defined (USE_UPF_RECEIVE) || \ ++ defined (USE_DLPI_RECEIVE) || defined (USE_LPF_RECEIVE) ++# define PACKET_DECODING ++#endif ++ ++ + #endif /* __ISC_DHCP_OSDEP_H__ */ +-- +2.17.1 + diff --git a/src/isc-dhcp/patch/0007-If-destination-of-BOOTREQUEST-is-directed-broadcast-.patch b/src/isc-dhcp/patch/0007-If-destination-of-BOOTREQUEST-is-directed-broadcast-.patch new file mode 100644 index 00000000000..e64f8439e2a --- /dev/null +++ b/src/isc-dhcp/patch/0007-If-destination-of-BOOTREQUEST-is-directed-broadcast-.patch @@ -0,0 +1,267 @@ +From fe50ed9721d79be0bb5045a219f5f5bb4cb8868e Mon Sep 17 00:00:00 2001 +From: Joe LeVeque +Date: Fri, 17 May 2019 22:24:02 +0000 +Subject: [PATCH 3/3] If destination of BOOTREQUEST is directed broadcast, + forward on that interface. Otherwise forward on fallback or all upstream + interfaces + +--- + common/discover.c | 46 +++++++++++++++++++--- + includes/dhcpd.h | 3 ++ + relay/dhcrelay.c | 98 +++++++++++++++++++++++++++++++++++++++++------ + 3 files changed, 131 insertions(+), 16 deletions(-) + +diff --git a/common/discover.c b/common/discover.c +index 8e7f632..73eb8a9 100644 +--- a/common/discover.c ++++ b/common/discover.c +@@ -227,6 +227,7 @@ struct iface_conf_list { + struct iface_info { + char name[IF_NAMESIZE+1]; /* name of the interface, e.g. "bge0" */ + struct sockaddr_storage addr; /* address information */ ++ struct sockaddr_storage netmask; /* netmask information */ + isc_uint64_t flags; /* interface flags, e.g. IFF_LOOPBACK */ + }; + +@@ -401,6 +402,7 @@ struct iface_conf_list { + struct iface_info { + char name[IFNAMSIZ]; /* name of the interface, e.g. "eth0" */ + struct sockaddr_storage addr; /* address information */ ++ struct sockaddr_storage netmask; /* netmask information */ + isc_uint64_t flags; /* interface flags, e.g. IFF_LOOPBACK */ + }; + +@@ -576,6 +578,17 @@ next_iface4(struct iface_info *info, int *err, struct iface_conf_list *ifaces) { + } + memcpy(&info->addr, &tmp.ifr_addr, sizeof(tmp.ifr_addr)); + ++ if (ioctl(ifaces->sock, SIOCGIFNETMASK, &tmp) < 0) { ++ if (errno == EADDRNOTAVAIL) { ++ continue; ++ } ++ log_error("Error getting netmask " ++ "for '%s'; %m", name); ++ *err = 1; ++ return 0; ++ } ++ memcpy(&info->netmask, &tmp.ifr_netmask, sizeof(tmp.ifr_netmask)); ++ + memset(&tmp, 0, sizeof(tmp)); + strncpy(tmp.ifr_name, name, sizeof(tmp.ifr_name) - 1); + if (ioctl(ifaces->sock, SIOCGIFFLAGS, &tmp) < 0) { +@@ -780,6 +793,7 @@ struct iface_conf_list { + struct iface_info { + char name[IFNAMSIZ]; /* name of the interface, e.g. "bge0" */ + struct sockaddr_storage addr; /* address information */ ++ struct sockaddr_storage netmask; /* netmask information */ + isc_uint64_t flags; /* interface flags, e.g. IFF_LOOPBACK */ + }; + +@@ -840,7 +854,8 @@ end_iface_scan(struct iface_conf_list *ifaces) { + /* XXX: perhaps create drealloc() rather than do it manually */ + void + add_ipv4_addr_to_interface(struct interface_info *iface, +- const struct in_addr *addr) { ++ const struct in_addr *addr, ++ const struct in_addr *netmask) { + /* + * We don't expect a lot of addresses per IPv4 interface, so + * we use 4, as our "chunk size" for collecting addresses. +@@ -851,6 +866,12 @@ add_ipv4_addr_to_interface(struct interface_info *iface, + log_fatal("Out of memory saving IPv4 address " + "on interface."); + } ++ ++ iface->netmasks = dmalloc(4 * sizeof(struct in_addr), MDL); ++ if (iface->netmasks == NULL) { ++ log_fatal("Out of memory saving IPv4 netmask " ++ "on interface."); ++ } + iface->address_count = 0; + iface->address_max = 4; + } else if (iface->address_count >= iface->address_max) { +@@ -863,14 +884,28 @@ add_ipv4_addr_to_interface(struct interface_info *iface, + log_fatal("Out of memory saving IPv4 address " + "on interface."); + } +- memcpy(tmp, +- iface->addresses, ++ memcpy(tmp, ++ iface->addresses, + iface->address_max * sizeof(struct in_addr)); + dfree(iface->addresses, MDL); + iface->addresses = tmp; ++ ++ tmp = dmalloc(new_max * sizeof(struct in_addr), MDL); ++ if (tmp == NULL) { ++ log_fatal("Out of memory saving IPv4 netmask " ++ "on interface."); ++ } ++ memcpy(tmp, ++ iface->netmasks, ++ iface->address_max * sizeof(struct in_addr)); ++ dfree(iface->netmasks, MDL); ++ iface->netmasks = tmp; ++ + iface->address_max = new_max; + } +- iface->addresses[iface->address_count++] = *addr; ++ iface->addresses[iface->address_count] = *addr; ++ iface->netmasks[iface->address_count] = *netmask; ++ iface->address_count++; + } + + #ifdef DHCPv6 +@@ -1005,6 +1040,7 @@ discover_interfaces(int state) { + if ((info.addr.ss_family == AF_INET) && + (local_family == AF_INET)) { + struct sockaddr_in *a = (struct sockaddr_in*)&info.addr; ++ struct sockaddr_in *n = (struct sockaddr_in*)&info.netmask; + struct iaddr addr; + + /* We don't want the loopback interface. */ +@@ -1019,7 +1055,7 @@ discover_interfaces(int state) { + if (a->sin_addr.s_addr != htonl(INADDR_ANY)) + tmp->configured = 1; + +- add_ipv4_addr_to_interface(tmp, &a->sin_addr); ++ add_ipv4_addr_to_interface(tmp, &a->sin_addr, &n->sin_addr); + + /* invoke the setup hook */ + addr.len = 4; +diff --git a/includes/dhcpd.h b/includes/dhcpd.h +index 261714d..89bfe82 100644 +--- a/includes/dhcpd.h ++++ b/includes/dhcpd.h +@@ -1347,6 +1347,9 @@ struct interface_info { + struct in_addr *addresses; /* Addresses associated with this + * interface. + */ ++ struct in_addr *netmasks; /* Netmask associated with this ++ * interface. ++ */ + int address_count; /* Number of addresses stored. */ + int address_max; /* Size of addresses buffer. */ + struct in6_addr *v6addresses; /* IPv6 addresses associated with +diff --git a/relay/dhcrelay.c b/relay/dhcrelay.c +index c9b6d8e..8aac4b3 100644 +--- a/relay/dhcrelay.c ++++ b/relay/dhcrelay.c +@@ -30,6 +30,7 @@ + #include + #include + #include ++#include + #include + + TIME default_lease_time = 43200; /* 12 hours... */ +@@ -881,20 +882,95 @@ do_relay4(struct interface_info *ip, struct dhcp_packet *packet, + /* Otherwise, it's a BOOTREQUEST, so forward it to all the + servers. */ + for (sp = servers; sp; sp = sp->next) { +- if (send_packet((fallback_interface +- ? fallback_interface : interfaces), +- NULL, packet, length, ip->addresses[0], +- &sp->to, NULL) < 0) { +- ++client_packet_errors; ++ int packet_relay_attempted = 0; ++ ++ log_debug("Server IP: %s", inet_ntoa(sp->to.sin_addr)); ++ ++ /* If the server's IP address is the broadcast IP of one ++ of our interfaces, we send it directly on that interface's ++ socket, because the kernel will drop directed broadcast ++ packets if we send on the fallback. */ ++ for (out = interfaces; out; out = out->next) { ++ int i = 0; ++ ++ // Only relay BOOTREQUEST on upstream interfaces ++ if (!(out->flags & INTERFACE_UPSTREAM)) ++ continue; ++ ++ if (!out->addresses || !out->netmasks) ++ continue; ++ ++ for (i = 0; i < out->address_count; i++) { ++ struct in_addr bcast_addr; ++ ++ log_debug("Iface %s addr: %s", out->name, inet_ntoa(out->addresses[i])); ++ log_debug("Iface %s netmask: %s", out->name, inet_ntoa(out->netmasks[i])); ++ ++ // Broadcast = ip_addr | ~netmask ++ bcast_addr.s_addr = out->addresses[i].s_addr | ~out->netmasks[i].s_addr; ++ log_debug("Iface %s broadcast: %s", out->name, inet_ntoa(bcast_addr)); ++ ++ if (sp->to.sin_addr.s_addr == bcast_addr.s_addr) { ++ log_debug("Packet destined for broadcast IP of %s", out->name); ++ if (send_packet(out, NULL, packet, ++ length, ip->addresses[0],&sp->to, NULL) < 0) { ++ ++client_packet_errors; ++ } else { ++ log_debug("Forwarded BOOTREQUEST for %s to %s on interface %s", ++ print_hw_addr(packet->htype, packet->hlen, ++ packet->chaddr), ++ inet_ntoa(sp->to.sin_addr), out->name); ++ ++ ++client_packets_relayed; ++ } ++ ++ packet_relay_attempted = 1; ++ ++ break; ++ } ++ } ++ ++ if (packet_relay_attempted) ++ break; ++ } ++ ++ if (packet_relay_attempted) ++ continue; ++ ++ /* Otherwise, if we have a fallback interface, we send the packet ++ on it. If not, we send the packet out all interfaces.*/ ++ if (fallback_interface) { ++ if (send_packet(fallback_interface, NULL, packet, ++ length, ip->addresses[0],&sp->to, NULL) < 0) { ++ ++client_packet_errors; ++ } else { ++ log_debug("Forwarded BOOTREQUEST for %s to %s on fallback interface", ++ print_hw_addr(packet->htype, packet->hlen, ++ packet->chaddr), ++ inet_ntoa(sp->to.sin_addr)); ++ ++ ++client_packets_relayed; ++ } + } else { +- log_debug("Forwarded BOOTREQUEST for %s to %s", +- print_hw_addr(packet->htype, packet->hlen, +- packet->chaddr), +- inet_ntoa(sp->to.sin_addr)); +- ++client_packets_relayed; ++ for (out = interfaces; out; out = out->next) { ++ // Only relay BOOTREQUEST on upstream interfaces ++ if (!(out->flags & INTERFACE_UPSTREAM)) ++ continue; ++ ++ if (send_packet(out, NULL, packet, ++ length, ip->addresses[0],&sp->to, NULL) < 0) { ++ ++client_packet_errors; ++ } else { ++ log_debug("Forwarded BOOTREQUEST for %s to %s on interface %s", ++ print_hw_addr(packet->htype, packet->hlen, ++ packet->chaddr), ++ inet_ntoa(sp->to.sin_addr), out->name); ++ ++ ++client_packets_relayed; ++ } ++ } + } + } +- + } + + /* Strip any Relay Agent Information options from the DHCP packet +-- +2.17.1 + diff --git a/src/isc-dhcp/patch/0008-CVE-2017-3144.patch b/src/isc-dhcp/patch/0008-CVE-2017-3144.patch new file mode 100644 index 00000000000..fe066e177a8 --- /dev/null +++ b/src/isc-dhcp/patch/0008-CVE-2017-3144.patch @@ -0,0 +1,47 @@ +From: Thomas Markwalder +Date: Thu, 7 Dec 2017 11:23:36 -0500 +Subject: [master] Plugs a socket descriptor leak in OMAPI +Origin: https://source.isc.org/cgi-bin/gitweb.cgi?p=dhcp.git;a=commit;h=1a6b62fe17a42b00fa234d06b6dfde3d03451894 +Bug: https://bugs.isc.org/Public/Bug/Display.html?id=46767 +Bug-Debian: https://bugs.debian.org/887413 +Bug-Debian-Security: https://security-tracker.debian.org/tracker/CVE-2017-3144 + + Merges in rt46767. +--- + +diff --git a/omapip/buffer.c b/omapip/buffer.c +index 6e0621b5..a21f0a80 100644 +--- a/omapip/buffer.c ++++ b/omapip/buffer.c +@@ -565,6 +565,15 @@ isc_result_t omapi_connection_writer (omapi_object_t *h) + omapi_buffer_dereference (&buffer, MDL); + } + } ++ ++ /* If we had data left to write when we're told to disconnect, ++ * we need recall disconnect, now that we're done writing. ++ * See rt46767. */ ++ if (c->out_bytes == 0 && c->state == omapi_connection_disconnecting) { ++ omapi_disconnect (h, 1); ++ return ISC_R_SHUTTINGDOWN; ++ } ++ + return ISC_R_SUCCESS; + } + +diff --git a/omapip/message.c b/omapip/message.c +index ee15d821..37abbd25 100644 +--- a/omapip/message.c ++++ b/omapip/message.c +@@ -339,7 +339,7 @@ isc_result_t omapi_message_unregister (omapi_object_t *mo) + } + + #ifdef DEBUG_PROTOCOL +-static const char *omapi_message_op_name(int op) { ++const char *omapi_message_op_name(int op) { + switch (op) { + case OMAPI_OP_OPEN: return "OMAPI_OP_OPEN"; + case OMAPI_OP_REFRESH: return "OMAPI_OP_REFRESH"; +-- +2.16.2 + diff --git a/src/isc-dhcp/patch/0008-interface-name-maxlen-crash.patch b/src/isc-dhcp/patch/0008-interface-name-maxlen-crash.patch new file mode 100644 index 00000000000..38d000c1b31 --- /dev/null +++ b/src/isc-dhcp/patch/0008-interface-name-maxlen-crash.patch @@ -0,0 +1,13 @@ +diff --git a/common/discover.c b/common/discover.c +index 3cd64a7..c85d18c 100644 +--- a/common/discover.c ++++ b/common/discover.c +@@ -547,7 +547,7 @@ next_iface4(struct iface_info *info, int *err, struct iface_conf_list *ifaces) { + log_error("Interface name '%s' too long", name); + return 0; + } +- strncpy(info->name, name, sizeof(info->name) - 1); ++ strncpy(info->name, name, sizeof(info->name)); + + #ifdef ALIAS_NAMED_PERMUTED + /* interface aliases look like "eth0:1" or "wlan1:3" */ diff --git a/src/isc-dhcp/patch/0009-CVE-2018-5733.patch b/src/isc-dhcp/patch/0009-CVE-2018-5733.patch new file mode 100644 index 00000000000..99017fc9839 --- /dev/null +++ b/src/isc-dhcp/patch/0009-CVE-2018-5733.patch @@ -0,0 +1,131 @@ +From: Thomas Markwalder +Date: Fri, 9 Feb 2018 14:46:08 -0500 +Subject: [master] Corrected refcnt loss in option parsing +Origin: https://source.isc.org/cgi-bin/gitweb.cgi?p=dhcp.git;a=commit;h=197b26f25309f947b97a83b8fdfc414b767798f8 +Bug: https://bugs.isc.org/Public/Bug/Display.html?id=47140 +Bug-Debian: https://bugs.debian.org/891785 +Bug-Debian-Security: https://security-tracker.debian.org/tracker/CVE-2018-5733 + + Merges in 47140. +--- + +--- a/common/options.c ++++ b/common/options.c +@@ -177,6 +177,8 @@ int parse_option_buffer (options, buffer + + /* If the length is outrageous, the options are bad. */ + if (offset + len > length) { ++ /* Avoid reference count overflow */ ++ option_dereference(&option, MDL); + reason = "option length exceeds option buffer length"; + bogus: + log_error("parse_option_buffer: malformed option " +--- a/common/tests/Makefile.am ++++ b/common/tests/Makefile.am +@@ -10,7 +10,8 @@ ATF_TESTS = + + if HAVE_ATF + +-ATF_TESTS += alloc_unittest dns_unittest misc_unittest ns_name_unittest ++ATF_TESTS += alloc_unittest dns_unittest misc_unittest ns_name_unittest \ ++ option_unittest + + alloc_unittest_SOURCES = test_alloc.c $(top_srcdir)/tests/t_api_dhcp.c + alloc_unittest_LDADD = $(ATF_LDFLAGS) +@@ -36,6 +37,14 @@ ns_name_unittest_LDADD += ../libdhcp.a + ../../omapip/libomapi.a $(BINDLIBDIR)/libirs.a \ + $(BINDLIBDIR)/libdns.a $(BINDLIBDIR)/libisccfg.a $(BINDLIBDIR)/libisc.a + ++option_unittest_SOURCES = option_unittest.c $(top_srcdir)/tests/t_api_dhcp.c ++option_unittest_LDADD = $(ATF_LDFLAGS) ++option_unittest_LDADD += ../libdhcp.@A@ ../../omapip/libomapi.@A@ \ ++ @BINDLIBIRSDIR@/libirs.@A@ \ ++ @BINDLIBDNSDIR@/libdns.@A@ \ ++ @BINDLIBISCCFGDIR@/libisccfg.@A@ \ ++ @BINDLIBISCDIR@/libisc.@A@ ++ + check: $(ATF_TESTS) + @if test $(top_srcdir) != ${top_builddir}; then \ + cp $(top_srcdir)/common/tests/Atffile Atffile; \ +--- /dev/null ++++ b/common/tests/option_unittest.c +@@ -0,0 +1,79 @@ ++/* ++ * Copyright (C) 2018 Internet Systems Consortium, Inc. ("ISC") ++ * ++ * This Source Code Form is subject to the terms of the Mozilla Public ++ * License, v. 2.0. If a copy of the MPL was not distributed with this ++ * file, You can obtain one at http://mozilla.org/MPL/2.0/. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES WITH ++ * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY ++ * AND FITNESS. IN NO EVENT SHALL ISC BE LIABLE FOR ANY SPECIAL, DIRECT, ++ * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM ++ * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE ++ * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR ++ * PERFORMANCE OF THIS SOFTWARE. ++ */ ++ ++#include ++#include ++#include "dhcpd.h" ++ ++ATF_TC(option_refcnt); ++ ++ATF_TC_HEAD(option_refcnt, tc) ++{ ++ atf_tc_set_md_var(tc, "descr", ++ "Verify option reference count does not overflow."); ++} ++ ++/* This test does a simple check to see if option reference count is ++ * decremented even an error path exiting parse_option_buffer() ++ */ ++ATF_TC_BODY(option_refcnt, tc) ++{ ++ struct option_state *options; ++ struct option *option; ++ unsigned code; ++ int refcnt; ++ unsigned char buffer[3] = { 15, 255, 0 }; ++ ++ initialize_common_option_spaces(); ++ ++ options = NULL; ++ if (!option_state_allocate(&options, MDL)) { ++ atf_tc_fail("can't allocate option state"); ++ } ++ ++ option = NULL; ++ code = 15; /* domain-name */ ++ if (!option_code_hash_lookup(&option, dhcp_universe.code_hash, ++ &code, 0, MDL)) { ++ atf_tc_fail("can't find option 15"); ++ } ++ if (option == NULL) { ++ atf_tc_fail("option is NULL"); ++ } ++ refcnt = option->refcnt; ++ ++ buffer[0] = 15; ++ buffer[1] = 255; /* invalid */ ++ buffer[2] = 0; ++ ++ if (parse_option_buffer(options, buffer, 3, &dhcp_universe)) { ++ atf_tc_fail("parse_option_buffer is expected to fail"); ++ } ++ ++ if (refcnt != option->refcnt) { ++ atf_tc_fail("refcnt changed from %d to %d", refcnt, option->refcnt); ++ } ++} ++ ++/* This macro defines main() method that will call specified ++ test cases. tp and simple_test_case names can be whatever you want ++ as long as it is a valid variable identifier. */ ++ATF_TP_ADD_TCS(tp) ++{ ++ ATF_TP_ADD_TC(tp, option_refcnt); ++ ++ return (atf_no_error()); ++} diff --git a/src/isc-dhcp/patch/0010-CVE-2018-5732.patch b/src/isc-dhcp/patch/0010-CVE-2018-5732.patch new file mode 100644 index 00000000000..d6c10e2e653 --- /dev/null +++ b/src/isc-dhcp/patch/0010-CVE-2018-5732.patch @@ -0,0 +1,144 @@ +From: Thomas Markwalder +Date: Sat, 10 Feb 2018 12:15:27 -0500 +Subject: [master] Correct buffer overrun in pretty_print_option +Origin: https://source.isc.org/cgi-bin/gitweb.cgi?p=dhcp.git;a=commit;h=c5931725b48b121d232df4ba9e45bc41e0ba114d +Bug: https://bugs.isc.org/Public/Bug/Display.html?id=47139 +Bug-Debian: https://bugs.debian.org/891786 +Bug-Debian-Security: https://security-tracker.debian.org/tracker/CVE-2018-5732 + + Merges in rt47139. +--- + +diff --git a/common/options.c b/common/options.c +index 6f23bc15..fc0e0889 100644 +--- a/common/options.c ++++ b/common/options.c +@@ -1776,7 +1776,8 @@ format_min_length(format, oc) + + + /* Format the specified option so that a human can easily read it. */ +- ++/* Maximum pretty printed size */ ++#define MAX_OUTPUT_SIZE 32*1024 + const char *pretty_print_option (option, data, len, emit_commas, emit_quotes) + struct option *option; + const unsigned char *data; +@@ -1784,8 +1785,9 @@ const char *pretty_print_option (option, data, len, emit_commas, emit_quotes) + int emit_commas; + int emit_quotes; + { +- static char optbuf [32768]; /* XXX */ +- static char *endbuf = &optbuf[sizeof(optbuf)]; ++ /* We add 128 byte pad so we don't have to add checks everywhere. */ ++ static char optbuf [MAX_OUTPUT_SIZE + 128]; /* XXX */ ++ static char *endbuf = optbuf + MAX_OUTPUT_SIZE; + int hunksize = 0; + int opthunk = 0; + int hunkinc = 0; +@@ -2211,7 +2213,14 @@ const char *pretty_print_option (option, data, len, emit_commas, emit_quotes) + log_error ("Unexpected format code %c", + fmtbuf [j]); + } ++ + op += strlen (op); ++ if (op >= endbuf) { ++ log_error ("Option data exceeds" ++ " maximum size %d", MAX_OUTPUT_SIZE); ++ return (""); ++ } ++ + if (dp == data + len) + break; + if (j + 1 < numelem && comma != ':') +diff --git a/common/tests/option_unittest.c b/common/tests/option_unittest.c +index 36236b84..cd52cfb4 100644 +--- a/common/tests/option_unittest.c ++++ b/common/tests/option_unittest.c +@@ -43,7 +43,7 @@ ATF_TC_BODY(option_refcnt, tc) + if (!option_state_allocate(&options, MDL)) { + atf_tc_fail("can't allocate option state"); + } +- ++ + option = NULL; + code = 15; /* domain-name */ + if (!option_code_hash_lookup(&option, dhcp_universe.code_hash, +@@ -68,12 +68,75 @@ ATF_TC_BODY(option_refcnt, tc) + } + } + ++ATF_TC(pretty_print_option); ++ ++ATF_TC_HEAD(pretty_print_option, tc) ++{ ++ atf_tc_set_md_var(tc, "descr", ++ "Verify pretty_print_option does not overrun its buffer."); ++} ++ ++ ++/* ++ * This test verifies that pretty_print_option() will not overrun its ++ * internal, static buffer when given large 'x/X' format options. ++ * ++ */ ++ATF_TC_BODY(pretty_print_option, tc) ++{ ++ struct option *option; ++ unsigned code; ++ unsigned char bad_data[32*1024]; ++ unsigned char good_data[] = { 1,2,3,4,5,6 }; ++ int emit_commas = 1; ++ int emit_quotes = 1; ++ const char *output_buf; ++ ++ /* Initialize whole thing to non-printable chars */ ++ memset(bad_data, 0x1f, sizeof(bad_data)); ++ ++ initialize_common_option_spaces(); ++ ++ /* We'll use dhcp_client_identitifer because it happens to be format X */ ++ code = 61; ++ option = NULL; ++ if (!option_code_hash_lookup(&option, dhcp_universe.code_hash, ++ &code, 0, MDL)) { ++ atf_tc_fail("can't find option %d", code); ++ } ++ ++ if (option == NULL) { ++ atf_tc_fail("option is NULL"); ++ } ++ ++ /* First we will try a good value we know should fit. */ ++ output_buf = pretty_print_option (option, good_data, sizeof(good_data), ++ emit_commas, emit_quotes); ++ ++ /* Make sure we get what we expect */ ++ if (!output_buf || strcmp(output_buf, "1:2:3:4:5:6")) { ++ atf_tc_fail("pretty_print_option did not return \"\""); ++ } ++ ++ ++ /* Now we'll try a data value that's too large */ ++ output_buf = pretty_print_option (option, bad_data, sizeof(bad_data), ++ emit_commas, emit_quotes); ++ ++ /* Make sure we safely get an error */ ++ if (!output_buf || strcmp(output_buf, "")) { ++ atf_tc_fail("pretty_print_option did not return \"\""); ++ } ++} ++ ++ + /* This macro defines main() method that will call specified + test cases. tp and simple_test_case names can be whatever you want + as long as it is a valid variable identifier. */ + ATF_TP_ADD_TCS(tp) + { + ATF_TP_ADD_TC(tp, option_refcnt); ++ ATF_TP_ADD_TC(tp, pretty_print_option); + + return (atf_no_error()); + } +-- +2.16.2 + diff --git a/src/isc-dhcp/patch/series b/src/isc-dhcp/patch/series new file mode 100644 index 00000000000..1b83f2166b9 --- /dev/null +++ b/src/isc-dhcp/patch/series @@ -0,0 +1,12 @@ +# This series applies on GIT commit d613b77d0473054fb0071b00d01eaa1623e50a07 +0001-Bugfix-Don-t-print-log-messages-to-stderr-in-release.patch +0002-Customizable-Option-82-circuit-ID-and-remote-ID-fiel.patch +0003-Support-for-obtaining-name-of-physical-interface-tha.patch +0004-Support-for-loading-port-alias-map-file-to-replace-p.patch +0005-Add-enable-use-sockets-to-configure-flags-in-debian-.patch +0006-Bugfix-Ensure-HAVE_SO_BINDTODEVICE-has-a-chance-to-b.patch +0007-If-destination-of-BOOTREQUEST-is-directed-broadcast-.patch +0008-CVE-2017-3144.patch +0009-CVE-2018-5733.patch +0010-CVE-2018-5732.patch +0008-interface-name-maxlen-crash.patch diff --git a/src/ixgbe/Makefile b/src/ixgbe/Makefile new file mode 100644 index 00000000000..90d20e606ef --- /dev/null +++ b/src/ixgbe/Makefile @@ -0,0 +1,22 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = ixgbe.ko + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + rm -rf ./ixgbe-$(IXGBE_DRIVER_VERSION) + wget -O ixgbe-$(IXGBE_DRIVER_VERSION).tar.gz "https://sonicstorage.blob.core.windows.net/packages/ixgbe-5.2.4.tar.gz?sv=2015-04-05&sr=b&sig=AaqJHHaPiJRp8R3HKobi0GNDgHAVnqijk6hpahwJ0Mg%3D&se=2154-10-05T22%3A19%3A29Z&sp=r" + tar xzf ixgbe-$(IXGBE_DRIVER_VERSION).tar.gz + + # Patch + pushd ./ixgbe-$(IXGBE_DRIVER_VERSION) + + # Build the package + pushd src + export BUILD_KERNEL=$(KVERSION) + make + popd + + popd + mv ./ixgbe-$(IXGBE_DRIVER_VERSION)/src/$* $(DEST)/ diff --git a/src/kdump-tools/Makefile b/src/kdump-tools/Makefile new file mode 100644 index 00000000000..18c2a369b5d --- /dev/null +++ b/src/kdump-tools/Makefile @@ -0,0 +1,32 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = $(KDUMP_TOOLS) + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Remove any stale files + rm -rf ./makedumpfile_$(KDUMP_TOOLS_VERSION_BASE).orig.tar.gz ./makedumpfile_$(KDUMP_TOOLS_VERSION).debian.tar.xz + rm -rf ./makedumpfile-$(KDUMP_TOOLS_VERSION_BASE) + + # Get makedumpfile release + wget http://deb.debian.org/debian/pool/main/m/makedumpfile/makedumpfile_$(KDUMP_TOOLS_VERSION_BASE).orig.tar.gz + wget http://deb.debian.org/debian/pool/main/m/makedumpfile/makedumpfile_$(KDUMP_TOOLS_VERSION).debian.tar.xz + tar -f makedumpfile_$(KDUMP_TOOLS_VERSION_BASE).orig.tar.gz -x + pushd ./makedumpfile-$(KDUMP_TOOLS_VERSION_BASE) + tar -f ../makedumpfile_$(KDUMP_TOOLS_VERSION).debian.tar.xz -x + + git init + git add -f * + git commit -m "unmodified kdump-tools source" + + # Apply patches + stg init + stg import -s ../patch/series + + # Build source and Debian packages + fakeroot debian/rules binary-indep + popd + + # Move the newly-built .deb packages to the destination directory + mv $* $(DEST)/ diff --git a/src/kdump-tools/patch/0001-Generate-initramfs-for-installed-kernels-in-chroot.patch b/src/kdump-tools/patch/0001-Generate-initramfs-for-installed-kernels-in-chroot.patch new file mode 100644 index 00000000000..1d994b88bd5 --- /dev/null +++ b/src/kdump-tools/patch/0001-Generate-initramfs-for-installed-kernels-in-chroot.patch @@ -0,0 +1,41 @@ +From 7e6c0d5b0c7299154f75f281c02cf02cf85fb80e Mon Sep 17 00:00:00 2001 +From: Benjamin Drung +Date: Thu, 2 Mar 2017 19:52:23 +0100 +Subject: [PATCH] Generate initramfs for installed kernels in chroot + +The postinst script from kdump-tools creates an initramfs for the +running kernel. When running inside a chroot, the running kernel (from +the host) might differ from the kernels that are available in the +chroot. + +Thus generate the initramfs only when the running kernel is installed in +the system. Otherwise generate the initramfs for all installed kernels. + +Bug-Debian: #856594 +--- + debian/kdump-tools.postinst | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +diff --git a/debian/kdump-tools.postinst b/debian/kdump-tools.postinst +index 4b6c6be..f604c8e 100755 +--- a/debian/kdump-tools.postinst ++++ b/debian/kdump-tools.postinst +@@ -33,7 +33,15 @@ update_param() { + case "$1" in + configure) + # create smaller initrd.img files for kdump use +- /etc/kernel/postinst.d/kdump-tools $(uname -r) > /dev/null 2>&1 ++ if test -d /lib/modules/$(uname -r); then ++ /etc/kernel/postinst.d/kdump-tools $(uname -r) > /dev/null 2>&1 ++ else ++ # Running kernel not installed. Running in chroot? ++ for kernel_release in $(ls /lib/modules/); do ++ /etc/kernel/postinst.d/kdump-tools $kernel_release > /dev/null 2>&1 ++ kdump-config symlinks $kernel_release ++ done ++ fi + + # Customize crashkernel= value according to architecture + ARCH="$(arch)" +-- +2.9.3 diff --git a/src/kdump-tools/patch/0002-core-file-prefixed-by-kdump.patch b/src/kdump-tools/patch/0002-core-file-prefixed-by-kdump.patch new file mode 100644 index 00000000000..2ed480b2617 --- /dev/null +++ b/src/kdump-tools/patch/0002-core-file-prefixed-by-kdump.patch @@ -0,0 +1,24 @@ +--- a/debian/kdump-config.orig 2019-10-24 09:38:19.006679000 -0700 ++++ b/debian/kdump-config 2019-10-24 12:16:23.791899000 -0700 +@@ -639,8 +639,8 @@ + { + KDUMP_STAMP=`date +"%Y%m%d%H%M"` + KDUMP_STAMPDIR=$(define_stampdir $KDUMP_STAMP) +- KDUMP_CORETEMP="$KDUMP_STAMPDIR/dump-incomplete" +- KDUMP_COREFILE="$KDUMP_STAMPDIR/dump.$KDUMP_STAMP" ++ KDUMP_CORETEMP="$KDUMP_STAMPDIR/kdump-incomplete" ++ KDUMP_COREFILE="$KDUMP_STAMPDIR/kdump.$KDUMP_STAMP" + KDUMP_DMESGFILE="$KDUMP_STAMPDIR/dmesg.$KDUMP_STAMP" + + # If we use NFS, verify that we can mount the FS +@@ -755,8 +755,8 @@ + KDUMP_STAMP=`date +"%Y%m%d%H%M"` + KDUMP_STAMPDIR=$(define_stampdir $KDUMP_STAMP) + +- KDUMP_CORETEMP="$KDUMP_STAMPDIR/dump-incomplete" +- KDUMP_COREFILE="$KDUMP_STAMPDIR/dump.$KDUMP_STAMP" ++ KDUMP_CORETEMP="$KDUMP_STAMPDIR/kdump-incomplete" ++ KDUMP_COREFILE="$KDUMP_STAMPDIR/kdump.$KDUMP_STAMP" + KDUMP_TMPDMESG="/tmp/dmesg.$KDUMP_STAMP" + KDUMP_DMESGFILE="$KDUMP_STAMPDIR/dmesg.$KDUMP_STAMP" + ERROR=0 diff --git a/src/kdump-tools/patch/series b/src/kdump-tools/patch/series new file mode 100644 index 00000000000..e1a26e55ca1 --- /dev/null +++ b/src/kdump-tools/patch/series @@ -0,0 +1,2 @@ +0001-Generate-initramfs-for-installed-kernels-in-chroot.patch +0002-core-file-prefixed-by-kdump.patch diff --git a/src/libnl3/Makefile b/src/libnl3/Makefile new file mode 100644 index 00000000000..c9fc72f50f7 --- /dev/null +++ b/src/libnl3/Makefile @@ -0,0 +1,30 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = libnl-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +DERIVED_TARGETS = libnl-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ + libnl-genl-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ + libnl-genl-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ + libnl-route-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ + libnl-route-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ + libnl-nf-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ + libnl-nf-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ + libnl-cli-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ + libnl-cli-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Obtaining the libnl3 + rm -rf ./libnl3-$(LIBNL3_VERSION_BASE) + wget -O libnl3_$(LIBNL3_VERSION_BASE).orig.tar.gz -N "https://sonicstorage.blob.core.windows.net/packages/libnl3_$(LIBNL3_VERSION_BASE).orig.tar.gz?sv=2015-04-05&sr=b&sig=b4DnqrIsyVBDLmYhw7qwfaUJWqGCX2lDVMmmx7ihfrU%3D&se=2028-06-16T21%3A06%3A00Z&sp=r" + wget -O libnl3_$(LIBNL3_VERSION).dsc -N "https://sonicstorage.blob.core.windows.net/packages/libnl3_$(LIBNL3_VERSION).dsc?sv=2015-04-05&sr=b&sig=AWTX45oDbeGA%2BRJZyiCcHmeIfCAgSeNV3IqopOBaRDg%3D&se=2028-06-16T21%3A05%3A30Z&sp=r" + wget -O libnl3_$(LIBNL3_VERSION).debian.tar.xz -N "https://sonicstorage.blob.core.windows.net/packages/libnl3_$(LIBNL3_VERSION).debian.tar.xz?sv=2015-04-05&sr=b&sig=upIZ9dp5WEcLqp3ODeWKJXq5pJWCfeT0TIM0bx76wxM%3D&se=2028-06-16T21%3A04%3A44Z&sp=r" + dpkg-source -x libnl3_$(LIBNL3_VERSION).dsc + + pushd ./libnl3-$(LIBNL3_VERSION_BASE) + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/libteam/Makefile b/src/libteam/Makefile new file mode 100644 index 00000000000..b1ef1237541 --- /dev/null +++ b/src/libteam/Makefile @@ -0,0 +1,39 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = libteam5_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb +DERIVED_TARGETS = libteam-dev_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb \ + libteamdctl0_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb \ + libteam-utils_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb \ + libteam5-dbgsym_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb \ + libteamdctl0-dbgsym_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb \ + libteam-utils-dbgsym_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Obtain libteam + rm -rf ./libteam + git clone https://github.com/jpirko/libteam.git + pushd ./libteam + git checkout -b teamd -f 8c7614abf5993d92e332a800f244bdebd7c9a2c8 + + # Apply patch series + stg init + stg import -s ../patch/series + popd + + # Obtain debian packaging + git clone https://salsa.debian.org/debian/libteam.git tmp + pushd ./tmp + git checkout -f 7188c361 # v1.28-1 + popd + + mv tmp/debian libteam/ + rm -rf tmp + pushd ./libteam + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/libteam/patch/0001-libteam-Temporarily-remove-redundant-debug-messages.patch b/src/libteam/patch/0001-libteam-Temporarily-remove-redundant-debug-messages.patch new file mode 100644 index 00000000000..d922c91c425 --- /dev/null +++ b/src/libteam/patch/0001-libteam-Temporarily-remove-redundant-debug-messages.patch @@ -0,0 +1,25 @@ +From 10602c2b1184aa0c6907b5a7f06fcba8a7141148 Mon Sep 17 00:00:00 2001 +From: Shuotian Cheng +Date: Mon, 27 Feb 2017 14:21:09 -0800 +Subject: [PATCH 1/8] libteam: Temporarily remove redundant debug messages + +--- + teamd/teamd_runner_lacp.c | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/teamd/teamd_runner_lacp.c b/teamd/teamd_runner_lacp.c +index d292d69..7c91aed 100644 +--- a/teamd/teamd_runner_lacp.c ++++ b/teamd/teamd_runner_lacp.c +@@ -929,8 +929,6 @@ static void lacp_port_actor_update(struct lacp_port *lacp_port) + state |= INFO_STATE_DEFAULTED; + if (teamd_port_count(lacp_port->ctx) > 0) + state |= INFO_STATE_AGGREGATION; +- teamd_log_dbg("%s: lacp info state: 0x%02X.", lacp_port->tdport->ifname, +- state); + lacp_port->actor.state = state; + } + +-- +2.7.4 + diff --git a/src/libteam/patch/0002-teamd-lacp-runner-will-send-lacp-update-right-after-.patch b/src/libteam/patch/0002-teamd-lacp-runner-will-send-lacp-update-right-after-.patch new file mode 100644 index 00000000000..c4e78257103 --- /dev/null +++ b/src/libteam/patch/0002-teamd-lacp-runner-will-send-lacp-update-right-after-.patch @@ -0,0 +1,102 @@ +From 0ce56490a44191c4b17a75cc21aa6a5bdc535f1d Mon Sep 17 00:00:00 2001 +From: yorke +Date: Mon, 3 Jun 2019 11:58:19 +0800 +Subject: [PATCH 2/8] [teamd] lacp runner will send lacp update right after it + received SIGINT signal From: Pavel Shirshov + Date: Wed, 20 Sep 2017 00:34:07 +0000 + +Signed-off-by: yorke +--- + teamd/teamd.c | 1 + + teamd/teamd.h | 3 +++ + teamd/teamd_events.c | 13 +++++++++++++ + teamd/teamd_runner_lacp.c | 11 +++++++++++ + 4 files changed, 28 insertions(+) + +diff --git a/teamd/teamd.c b/teamd/teamd.c +index 6c47312..58d4fc8 100644 +--- a/teamd/teamd.c ++++ b/teamd/teamd.c +@@ -392,6 +392,7 @@ static int teamd_run_loop_run(struct teamd_context *ctx) + case 'q': + if (quit_in_progress) + return -EBUSY; ++ teamd_refresh_ports(ctx); + err = teamd_flush_ports(ctx); + if (err) + return err; +diff --git a/teamd/teamd.h b/teamd/teamd.h +index 01bd022..e71a5dc 100644 +--- a/teamd/teamd.h ++++ b/teamd/teamd.h +@@ -193,11 +193,14 @@ struct teamd_event_watch_ops { + int (*port_master_ifindex_changed)(struct teamd_context *ctx, + struct teamd_port *tdport, + void *priv); ++ void (*refresh)(struct teamd_context *ctx, ++ struct teamd_port *tdport, void *priv); + int (*option_changed)(struct teamd_context *ctx, + struct team_option *option, void *priv); + char *option_changed_match_name; + }; + ++void teamd_refresh_ports(struct teamd_context *ctx); + int teamd_event_port_added(struct teamd_context *ctx, + struct teamd_port *tdport); + void teamd_event_port_removed(struct teamd_context *ctx, +diff --git a/teamd/teamd_events.c b/teamd/teamd_events.c +index 65aa46a..221803e 100644 +--- a/teamd/teamd_events.c ++++ b/teamd/teamd_events.c +@@ -34,6 +34,19 @@ struct event_watch_item { + void *priv; + }; + ++void teamd_refresh_ports(struct teamd_context *ctx) ++{ ++ struct teamd_port *tdport; ++ struct event_watch_item *watch; ++ ++ teamd_for_each_tdport(tdport, ctx) { ++ list_for_each_node_entry(watch, &ctx->event_watch_list, list) { ++ if (!watch->ops->refresh) continue; ++ watch->ops->refresh(ctx, tdport, watch->priv); ++ } ++ } ++} ++ + int teamd_event_port_added(struct teamd_context *ctx, + struct teamd_port *tdport) + { +diff --git a/teamd/teamd_runner_lacp.c b/teamd/teamd_runner_lacp.c +index 7c91aed..4dbd015 100644 +--- a/teamd/teamd_runner_lacp.c ++++ b/teamd/teamd_runner_lacp.c +@@ -1421,6 +1421,16 @@ static int lacp_event_watch_port_changed(struct teamd_context *ctx, + return lacp_port_link_update(lacp_port); + } + ++static void lacp_event_watch_refresh(struct teamd_context *ctx, ++ struct teamd_port *tdport, void *priv) ++{ ++ struct lacp *lacp = priv; ++ struct lacp_port *lacp_port = lacp_port_get(lacp, tdport); ++ ++ if (lacp_port_selected(lacp_port)) ++ (void) lacpdu_send(lacp_port); ++} ++ + static const struct teamd_event_watch_ops lacp_event_watch_ops = { + .hwaddr_changed = lacp_event_watch_hwaddr_changed, + .port_hwaddr_changed = lacp_event_watch_port_hwaddr_changed, +@@ -1428,6 +1438,7 @@ static const struct teamd_event_watch_ops lacp_event_watch_ops = { + .port_removed = lacp_event_watch_port_removed, + .port_changed = lacp_event_watch_port_changed, + .admin_state_changed = lacp_event_watch_admin_state_changed, ++ .refresh = lacp_event_watch_refresh, + }; + + static int lacp_carrier_init(struct teamd_context *ctx, struct lacp *lacp) +-- +2.7.4 + diff --git a/src/libteam/patch/0003-libteam-Add-fallback-support-for-single-member-port-.patch b/src/libteam/patch/0003-libteam-Add-fallback-support-for-single-member-port-.patch new file mode 100644 index 00000000000..e1234c294fd --- /dev/null +++ b/src/libteam/patch/0003-libteam-Add-fallback-support-for-single-member-port-.patch @@ -0,0 +1,121 @@ +commit f475746f56602a40861b8d94eac5f0979c4703f3 +Author: yorke +Date: Mon Jun 3 12:02:36 2019 +0800 + + From 9b40af58575a89d06be51cfbb5a2265a59826110 Mon Sep 17 00:00:00 2001 + Subject: [PATCH 3/8] [libteam] Add fallback support for single-member-port LAG + From: Haiyang Zheng Date: Fri, 15 Dec + 2017 21:07:53 -0800 + + Signed-off-by: yorke + +diff --git a/teamd/teamd_runner_lacp.c b/teamd/teamd_runner_lacp.c +index 4dbd015..f8a9e16 100644 +--- a/teamd/teamd_runner_lacp.c ++++ b/teamd/teamd_runner_lacp.c +@@ -138,6 +138,8 @@ struct lacp { + #define LACP_CFG_DFLT_SYS_PRIO 0xffff + bool fast_rate; + #define LACP_CFG_DFLT_FAST_RATE false ++ bool fallback; ++#define LACP_CFG_DFLT_FALLBACK false + int min_ports; + #define LACP_CFG_DFLT_MIN_PORTS 1 + enum lacp_agg_select_policy agg_select_policy; +@@ -272,6 +274,11 @@ static int lacp_load_config(struct teamd_context *ctx, struct lacp *lacp) + lacp->cfg.fast_rate = LACP_CFG_DFLT_FAST_RATE; + teamd_log_dbg("Using fast_rate \"%d\".", lacp->cfg.fast_rate); + ++ err = teamd_config_bool_get(ctx, &lacp->cfg.fallback, "$.runner.fallback"); ++ if (err) ++ lacp->cfg.fallback = LACP_CFG_DFLT_FALLBACK; ++ teamd_log_dbg("Using fallback \"%d\".", lacp->cfg.fallback); ++ + err = teamd_config_int_get(ctx, &tmp, "$.runner.min_ports"); + if (err) { + lacp->cfg.min_ports = LACP_CFG_DFLT_MIN_PORTS; +@@ -308,9 +315,24 @@ static bool lacp_port_loopback_free(struct lacp_port *lacp_port) + return true; + } + ++/* ++ * is_lacp_fallback_eligible - is lacp_port eligible to go into lacp fallback mode ++ * ++ * Return true if it is, false otherwise ++ */ ++static bool is_lacp_fallback_eligible(struct lacp_port *lacp_port) ++{ ++ teamd_log_dbg("%s fallback eligible state \"%d \" cfg \"%d\".", ++ lacp_port->tdport->ifname, lacp_port->state, ++ lacp_port->lacp->cfg.fallback); ++ return lacp_port->state == PORT_STATE_DEFAULTED && ++ lacp_port->lacp->cfg.fallback; ++} ++ + static bool lacp_port_selectable_state(struct lacp_port *lacp_port) + { +- if (lacp_port->state == PORT_STATE_CURRENT) ++ if (lacp_port->state == PORT_STATE_CURRENT || ++ is_lacp_fallback_eligible(lacp_port)) + return true; + return false; + } +@@ -318,7 +340,8 @@ static bool lacp_port_selectable_state(struct lacp_port *lacp_port) + static bool lacp_port_unselectable_state(struct lacp_port *lacp_port) + { + if (lacp_port->state == PORT_STATE_CURRENT || +- lacp_port->state == PORT_STATE_EXPIRED) ++ lacp_port->state == PORT_STATE_EXPIRED || ++ is_lacp_fallback_eligible(lacp_port)) + return false; + return true; + } +@@ -334,7 +357,8 @@ static int lacp_port_should_be_enabled(struct lacp_port *lacp_port) + + if (lacp_port_selected(lacp_port) && + lacp_port->agg_lead == lacp->selected_agg_lead && +- lacp_port->partner.state & INFO_STATE_SYNCHRONIZATION) ++ (lacp_port->partner.state & INFO_STATE_SYNCHRONIZATION || ++ is_lacp_fallback_eligible(lacp_port))) + return true; + return false; + } +@@ -345,7 +369,8 @@ static int lacp_port_should_be_disabled(struct lacp_port *lacp_port) + + if (!lacp_port_selected(lacp_port) || + lacp_port->agg_lead != lacp->selected_agg_lead || +- !(lacp_port->partner.state & INFO_STATE_SYNCHRONIZATION)) ++ (!(lacp_port->partner.state & INFO_STATE_SYNCHRONIZATION) && ++ !is_lacp_fallback_eligible(lacp_port))) + return true; + return false; + } +@@ -1502,6 +1527,16 @@ static int lacp_state_fast_rate_get(struct teamd_context *ctx, + return 0; + } + ++static int lacp_state_fallback_get(struct teamd_context *ctx, ++ struct team_state_gsc *gsc, ++ void *priv) ++{ ++ struct lacp *lacp = priv; ++ ++ gsc->data.bool_val = lacp->cfg.fallback; ++ return 0; ++} ++ + static int lacp_state_select_policy_get(struct teamd_context *ctx, + struct team_state_gsc *gsc, + void *priv) +@@ -1529,6 +1564,11 @@ static const struct teamd_state_val lacp_state_vals[] = { + .getter = lacp_state_fast_rate_get, + }, + { ++ .subpath = "fallback", ++ .type = TEAMD_STATE_ITEM_TYPE_BOOL, ++ .getter = lacp_state_fallback_get, ++ }, ++ { + .subpath = "select_policy", + .type = TEAMD_STATE_ITEM_TYPE_STRING, + .getter = lacp_state_select_policy_get, diff --git a/src/libteam/patch/0004-Skip-setting-the-same-hwaddr-to-lag-port-to-avoid-di.patch b/src/libteam/patch/0004-Skip-setting-the-same-hwaddr-to-lag-port-to-avoid-di.patch new file mode 100644 index 00000000000..3d99132b92d --- /dev/null +++ b/src/libteam/patch/0004-Skip-setting-the-same-hwaddr-to-lag-port-to-avoid-di.patch @@ -0,0 +1,36 @@ +From e18cbe5a6c76366923a8ace830c89056a1542745 Mon Sep 17 00:00:00 2001 +From: yorke +Date: Mon, 3 Jun 2019 12:06:00 +0800 +Subject: [PATCH 4/8] Skip setting the same hwaddr to lag port to avoid + disrupting From: Jipan Yang Date: Sun, + 24 Feb 2019 00:04:15 -0800 + +Signed-off-by: yorke +--- + teamd/teamd.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +diff --git a/teamd/teamd.c b/teamd/teamd.c +index 58d4fc8..9dc85b5 100644 +--- a/teamd/teamd.c ++++ b/teamd/teamd.c +@@ -834,7 +834,15 @@ static int teamd_set_hwaddr(struct teamd_context *ctx) + err = -EINVAL; + goto free_hwaddr; + } +- err = team_hwaddr_set(ctx->th, ctx->ifindex, hwaddr, hwaddr_len); ++ ++ if(!memcmp(hwaddr, ctx->hwaddr, hwaddr_len)) { ++ err = 0; ++ teamd_log_dbg("Skip setting same hwaddr string: \"%s\".", hwaddr_str); ++ } ++ else{ ++ err = team_hwaddr_set(ctx->th, ctx->ifindex, hwaddr, hwaddr_len); ++ } ++ + if (!err) + ctx->hwaddr_explicit = true; + free_hwaddr: +-- +2.7.4 + diff --git a/src/libteam/patch/0005-Increase-default-buffer-size-from-98304-to-983040.patch b/src/libteam/patch/0005-Increase-default-buffer-size-from-98304-to-983040.patch new file mode 100644 index 00000000000..517b86992e2 --- /dev/null +++ b/src/libteam/patch/0005-Increase-default-buffer-size-from-98304-to-983040.patch @@ -0,0 +1,31 @@ +From 39e5b0a15bf276dffa6b8c61594ee945248a4e27 Mon Sep 17 00:00:00 2001 +From: yorke +Date: Mon, 3 Jun 2019 12:32:33 +0800 +Subject: [PATCH 5/8] Increase default buffer size from 98304 to 983040 + From: Pavel Shirshov + https://github.com/Azure/sonic-buildimage/pull/2822 + +Signed-off-by: yorke +--- + libteam/libteam.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/libteam/libteam.c b/libteam/libteam.c +index 9c9c93a..2cc80ca 100644 +--- a/libteam/libteam.c ++++ b/libteam/libteam.c +@@ -551,9 +551,9 @@ int team_destroy(struct team_handle *th) + /* \endcond */ + + /* libnl uses default 32k socket receive buffer size, +- * which can get too small. Use 192k for all sockets. ++ * which can get too small. Use 960k for all sockets. + */ +-#define NETLINK_RCVBUF 196608 ++#define NETLINK_RCVBUF 983040 + + /** + * @param th libteam library context +-- +2.7.4 + diff --git a/src/libteam/patch/0006-teamd-Administratively-shutdown-port-channel-has-mem.patch b/src/libteam/patch/0006-teamd-Administratively-shutdown-port-channel-has-mem.patch new file mode 100644 index 00000000000..344dbc8d260 --- /dev/null +++ b/src/libteam/patch/0006-teamd-Administratively-shutdown-port-channel-has-mem.patch @@ -0,0 +1,37 @@ +From f1eec95dd0475591897a781eba15d8d8ce370a6a Mon Sep 17 00:00:00 2001 +From: yorke +Date: Mon, 3 Jun 2019 13:21:07 +0800 +Subject: [PATCH 6/8] [teamd]: Administratively shutdown port channel has + member ports in deselected state and traffic is not forwarded From: + phanindra-tv https://github.com/Azure/sonic-buildimage/pull/2882 + +Signed-off-by: yorke +--- + teamd/teamd_runner_lacp.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/teamd/teamd_runner_lacp.c b/teamd/teamd_runner_lacp.c +index 9836824..7bf3700 100644 +--- a/teamd/teamd_runner_lacp.c ++++ b/teamd/teamd_runner_lacp.c +@@ -1101,12 +1101,17 @@ static int lacpdu_recv(struct lacp_port *lacp_port) + struct lacpdu lacpdu; + struct sockaddr_ll ll_from; + int err; ++ bool admin_state; + + err = teamd_recvfrom(lacp_port->sock, &lacpdu, sizeof(lacpdu), 0, + (struct sockaddr *) &ll_from, sizeof(ll_from)); + if (err <= 0) + return err; + ++ admin_state = team_get_ifinfo_admin_state(lacp_port->ctx->ifinfo); ++ if (!admin_state) ++ return 0; ++ + if (!teamd_port_present(lacp_port->ctx, lacp_port->tdport)) + return 0; + +-- +2.7.4 + diff --git a/src/libteam/patch/0007-Send-LACP-PDU-immediately-if-our-state-changed.patch b/src/libteam/patch/0007-Send-LACP-PDU-immediately-if-our-state-changed.patch new file mode 100644 index 00000000000..d26e2a74ea4 --- /dev/null +++ b/src/libteam/patch/0007-Send-LACP-PDU-immediately-if-our-state-changed.patch @@ -0,0 +1,42 @@ +From b82da0dc94ca34b039396328a8c2fcb61aa73c0f Mon Sep 17 00:00:00 2001 +From: yorke +Date: Mon, 3 Jun 2019 13:27:26 +0800 +Subject: [PATCH 7/8] Send LACP PDU immediately if our state changed From: + Pavel Shirshov Date: Wed, 29 May 2019 19:15:20 + +0000 + +Signed-off-by: yorke +--- + teamd/teamd_runner_lacp.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/teamd/teamd_runner_lacp.c b/teamd/teamd_runner_lacp.c +index 7bf3700..4016b15 100644 +--- a/teamd/teamd_runner_lacp.c ++++ b/teamd/teamd_runner_lacp.c +@@ -1017,8 +1017,7 @@ static int lacp_port_set_state(struct lacp_port *lacp_port, + return err; + + lacp_port_actor_update(lacp_port); +- if (lacp_port->periodic_on) +- return 0; ++ + return lacpdu_send(lacp_port); + } + +@@ -1136,9 +1135,10 @@ static int lacpdu_recv(struct lacp_port *lacp_port) + if (err) + return err; + ++ lacp_port_actor_update(lacp_port); ++ + /* Check if the other side has correct info about us */ +- if (!lacp_port->periodic_on && +- memcmp(&lacpdu.partner, &lacp_port->actor, ++ if (memcmp(&lacpdu.partner, &lacp_port->actor, + sizeof(struct lacpdu_info))) { + err = lacpdu_send(lacp_port); + if (err) +-- +2.7.4 + diff --git a/src/libteam/patch/0008-libteam-Add-warm_reboot-mode.patch b/src/libteam/patch/0008-libteam-Add-warm_reboot-mode.patch new file mode 100644 index 00000000000..3f428bbec19 --- /dev/null +++ b/src/libteam/patch/0008-libteam-Add-warm_reboot-mode.patch @@ -0,0 +1,884 @@ +From 113d482704198685fba09cd2597fd93ca9d297c5 Mon Sep 17 00:00:00 2001 +From: Pavel Shirshov +Date: Tue, 1 Oct 2019 09:23:23 -0700 +Subject: [PATCH 1/1] [libteam]: Reimplement Warm-Reboot procedure + +--- + libteam/ifinfo.c | 6 +- + teamd/teamd.c | 51 +++- + teamd/teamd.h | 6 + + teamd/teamd_events.c | 13 ++ + teamd/teamd_per_port.c | 6 + + teamd/teamd_runner_lacp.c | 474 +++++++++++++++++++++++++++++++++++--- + 6 files changed, 512 insertions(+), 44 deletions(-) + +diff --git a/libteam/ifinfo.c b/libteam/ifinfo.c +index 46d56a2..b86d34c 100644 +--- a/libteam/ifinfo.c ++++ b/libteam/ifinfo.c +@@ -109,15 +109,13 @@ static void update_hwaddr(struct team_ifinfo *ifinfo, struct rtnl_link *link) + hwaddr_len = nl_addr_get_len(nl_addr); + if (ifinfo->hwaddr_len != hwaddr_len) { + ifinfo->hwaddr_len = hwaddr_len; +- if (!ifinfo->master_ifindex) +- ifinfo->orig_hwaddr_len = hwaddr_len; ++ ifinfo->orig_hwaddr_len = hwaddr_len; + set_changed(ifinfo, CHANGED_HWADDR_LEN); + } + hwaddr = nl_addr_get_binary_addr(nl_addr); + if (memcmp(ifinfo->hwaddr, hwaddr, hwaddr_len)) { + memcpy(ifinfo->hwaddr, hwaddr, hwaddr_len); +- if (!ifinfo->master_ifindex) +- memcpy(ifinfo->orig_hwaddr, hwaddr, hwaddr_len); ++ memcpy(ifinfo->orig_hwaddr, hwaddr, hwaddr_len); + set_changed(ifinfo, CHANGED_HWADDR); + } + } +diff --git a/teamd/teamd.c b/teamd/teamd.c +index 9dc85b5..17221a9 100644 +--- a/teamd/teamd.c ++++ b/teamd/teamd.c +@@ -117,7 +117,9 @@ static void print_help(const struct teamd_context *ctx) { + " -D --dbus-enable Enable D-Bus interface\n" + " -Z --zmq-enable=ADDRESS Enable ZeroMQ interface\n" + " -U --usock-enable Enable UNIX domain socket interface\n" +- " -u --usock-disable Disable UNIX domain socket interface\n", ++ " -u --usock-disable Disable UNIX domain socket interface\n" ++ " -w --warm-start Warm-start startup mode\n" ++ " -L --lacp-directory Directory for saving lacp pdu dumps\n", + ctx->argv0); + printf("Available runners: "); + for (i = 0; i < TEAMD_RUNNER_LIST_SIZE; i++) { +@@ -151,10 +153,12 @@ static int parse_command_line(struct teamd_context *ctx, + { "zmq-enable", required_argument, NULL, 'Z' }, + { "usock-enable", no_argument, NULL, 'U' }, + { "usock-disable", no_argument, NULL, 'u' }, ++ { "warm-start", no_argument, NULL, 'w' }, ++ { "lacp-directory", required_argument, NULL, 'L' }, + { NULL, 0, NULL, 0 } + }; + +- while ((opt = getopt_long(argc, argv, "hdkevf:c:p:gl:roNt:nDZ:Uu", ++ while ((opt = getopt_long(argc, argv, "hdkevf:c:p:gl:roNt:nDZ:UuwL:", + long_options, NULL)) >= 0) { + + switch(opt) { +@@ -236,11 +240,27 @@ static int parse_command_line(struct teamd_context *ctx, + case 'u': + ctx->usock.enabled = false; + break; ++ case 'w': ++ ctx->warm_start_mode = true; ++ break; ++ case 'L': ++ ctx->lacp_directory = strdup(optarg); ++ if (access(ctx->lacp_directory, R_OK | W_OK | X_OK) != 0) { ++ fprintf(stderr, "Can't write to the lacp directory '%s': %s\n", ctx->lacp_directory, strerror(errno)); ++ free(ctx->lacp_directory); ++ ctx->lacp_directory = NULL; ++ } ++ break; + default: + return -1; + } + } + ++ if (ctx->warm_start_mode && !ctx->lacp_directory) { ++ fprintf(stderr, "Can't enable warm-start mode without lacp-directory specified\n"); ++ ctx->warm_start_mode = false; ++ } ++ + if (optind < argc) { + fprintf(stderr, "Too many arguments\n"); + return -1; +@@ -390,9 +410,18 @@ static int teamd_run_loop_run(struct teamd_context *ctx) + if (err != -1) { + switch(ctrl_byte) { + case 'q': ++ case 'f': ++ case 'w': + if (quit_in_progress) + return -EBUSY; +- teamd_refresh_ports(ctx); ++ if (ctrl_byte == 'w' || ctrl_byte == 'f') { ++ ctx->keep_ports = true; ++ ctx->no_quit_destroy = true; ++ teamd_refresh_ports(ctx); ++ if (ctrl_byte == 'w') ++ teamd_ports_flush_data(ctx); ++ } ++ + err = teamd_flush_ports(ctx); + if (err) + return err; +@@ -434,6 +463,12 @@ void teamd_run_loop_quit(struct teamd_context *ctx, int err) + teamd_run_loop_sent_ctrl_byte(ctx, 'q'); + } + ++static void teamd_run_loop_quit_a_boot(struct teamd_context *ctx, char type, int err) ++{ ++ ctx->run_loop.err = err; ++ teamd_run_loop_sent_ctrl_byte(ctx, type); ++} ++ + void teamd_run_loop_restart(struct teamd_context *ctx) + { + teamd_run_loop_sent_ctrl_byte(ctx, 'r'); +@@ -700,6 +735,14 @@ static int callback_daemon_signal(struct teamd_context *ctx, int events, + teamd_log_warn("Got SIGINT, SIGQUIT or SIGTERM."); + teamd_run_loop_quit(ctx, 0); + break; ++ case SIGUSR1: ++ teamd_log_warn("Got SIGUSR1."); ++ teamd_run_loop_quit_a_boot(ctx, 'w', 0); ++ break; ++ case SIGUSR2: ++ teamd_log_warn("Got SIGUSR2."); ++ teamd_run_loop_quit_a_boot(ctx, 'f', 0); ++ break; + } + return 0; + } +@@ -1531,7 +1574,7 @@ static int teamd_start(struct teamd_context *ctx, enum teamd_exit_code *p_ret) + return -errno; + } + +- if (daemon_signal_init(SIGINT, SIGTERM, SIGQUIT, SIGHUP, 0) < 0) { ++ if (daemon_signal_init(SIGINT, SIGTERM, SIGQUIT, SIGHUP, SIGUSR1, SIGUSR2, 0) < 0) { + teamd_log_err("Could not register signal handlers."); + daemon_retval_send(errno); + err = -errno; +diff --git a/teamd/teamd.h b/teamd/teamd.h +index e71a5dc..418214d 100644 +--- a/teamd/teamd.h ++++ b/teamd/teamd.h +@@ -126,6 +126,9 @@ struct teamd_context { + char * hwaddr; + uint32_t hwaddr_len; + bool hwaddr_explicit; ++ bool warm_start_mode; ++ bool keep_ports; ++ char * lacp_directory; + struct { + struct list_item callback_list; + int ctrl_pipe_r; +@@ -195,12 +198,15 @@ struct teamd_event_watch_ops { + void *priv); + void (*refresh)(struct teamd_context *ctx, + struct teamd_port *tdport, void *priv); ++ void (*port_flush_data)(struct teamd_context *ctx, ++ struct teamd_port *tdport, void *priv); + int (*option_changed)(struct teamd_context *ctx, + struct team_option *option, void *priv); + char *option_changed_match_name; + }; + + void teamd_refresh_ports(struct teamd_context *ctx); ++void teamd_ports_flush_data(struct teamd_context *ctx); + int teamd_event_port_added(struct teamd_context *ctx, + struct teamd_port *tdport); + void teamd_event_port_removed(struct teamd_context *ctx, +diff --git a/teamd/teamd_events.c b/teamd/teamd_events.c +index 221803e..bd4dcc1 100644 +--- a/teamd/teamd_events.c ++++ b/teamd/teamd_events.c +@@ -47,6 +47,19 @@ void teamd_refresh_ports(struct teamd_context *ctx) + } + } + ++void teamd_ports_flush_data(struct teamd_context *ctx) ++{ ++ struct teamd_port *tdport; ++ struct event_watch_item *watch; ++ ++ teamd_for_each_tdport(tdport, ctx) { ++ list_for_each_node_entry(watch, &ctx->event_watch_list, list) { ++ if (!watch->ops->port_flush_data) continue; ++ watch->ops->port_flush_data(ctx, tdport, watch->priv); ++ } ++ } ++} ++ + int teamd_event_port_added(struct teamd_context *ctx, + struct teamd_port *tdport) + { +diff --git a/teamd/teamd_per_port.c b/teamd/teamd_per_port.c +index f98a90d..a87e809 100644 +--- a/teamd/teamd_per_port.c ++++ b/teamd/teamd_per_port.c +@@ -350,6 +350,12 @@ static int teamd_port_remove(struct teamd_context *ctx, + { + int err; + ++ if (ctx->keep_ports) { ++ teamd_log_dbg("%s: Keeping port (found ifindex \"%d\").", ++ tdport->ifname, tdport->ifindex); ++ return 0; ++ } ++ + teamd_log_dbg("%s: Removing port (found ifindex \"%d\").", + tdport->ifname, tdport->ifindex); + err = team_port_remove(ctx->th, tdport->ifindex); +diff --git a/teamd/teamd_runner_lacp.c b/teamd/teamd_runner_lacp.c +index 4016b15..81be5b7 100644 +--- a/teamd/teamd_runner_lacp.c ++++ b/teamd/teamd_runner_lacp.c +@@ -31,6 +31,7 @@ + #include + #include + #include ++#include + + #include "teamd.h" + #include "teamd_config.h" +@@ -127,10 +128,18 @@ static const char *lacp_agg_select_policy_names_list[] = { + + struct lacp_port; + ++struct wr_tdport_state ++{ ++ char name[IFNAMSIZ+1]; ++ bool enabled; ++ bool checked; ++}; ++ + struct lacp { + struct teamd_context *ctx; + struct lacp_port *selected_agg_lead; /* leading port of selected aggregator */ + bool carrier_up; ++ time_t warm_start_mode_timer; + struct { + bool active; + #define LACP_CFG_DFLT_ACTIVE true +@@ -145,6 +154,11 @@ struct lacp { + enum lacp_agg_select_policy agg_select_policy; + #define LACP_CFG_DFLT_AGG_SELECT_POLICY LACP_AGG_SELECT_LACP_PRIO + } cfg; ++ struct { ++ bool carrier_up; ++ uint16_t nr_of_tdports; ++ struct wr_tdport_state *state; ++ } wr; + struct teamd_balancer *tb; + }; + +@@ -174,6 +188,8 @@ struct lacp_port { + struct lacp_port *agg_lead; /* leading port of aggregator. + * NULL in case this port is not selected */ + enum lacp_port_state state; ++ bool lacpdu_saved; ++ struct lacpdu last_pdu; + struct { + uint32_t speed; + uint8_t duplex; +@@ -189,6 +205,201 @@ struct lacp_port { + } cfg; + }; + ++static void generate_path(struct teamd_context *ctx, char path[PATH_MAX], const char* filename) ++{ ++ strcpy(path, ctx->lacp_directory); ++ /* Add trailing slash if we don't have one in the filename */ ++ if (path[strlen(path) - 1] != '/') ++ strcat(path, "/"); ++ strcat(path, filename); ++} ++ ++static int find_wr_info(struct lacp_port *lacp_port) { ++ struct lacp* lacp = lacp_port->lacp; ++ int i, found = -1; ++ ++ for (i = 0; i < lacp->wr.nr_of_tdports; ++i) { ++ if (strcmp(lacp->wr.state[i].name, lacp_port->tdport->ifname) == 0) { ++ found = i; ++ break; ++ } ++ } ++ ++ if (found == -1) ++ teamd_log_warn("WR-mode. Found a newly added LAG member port: '%s' after restart. " ++ "The configuration was changed?", lacp_port->tdport->ifname); ++ ++ return found; ++} ++ ++static void remove_file(struct teamd_context *ctx, const char *name) { ++ char filename[PATH_MAX]; ++ int err; ++ ++ generate_path(ctx, filename, name); ++ ++ err = access(filename, R_OK); ++ if (err != 0) { ++ /* file is not present. Skip it */ ++ return; ++ } ++ ++ err = unlink(filename); ++ if (err < 0) { ++ teamd_log_err("WR-mode. Can't remove file %s: %s", filename, strerror(errno)); ++ } ++} ++ ++static void stop_wr_mode(struct lacp *lacp) { ++ int i; ++ ++ teamd_log_info("WR-mode. Stopping WR start mode"); ++ ++ lacp->ctx->warm_start_mode = false; ++ lacp->warm_start_mode_timer = 0; ++ ++ remove_file(lacp->ctx, lacp->ctx->team_devname); ++ for (i = 0; i < lacp->wr.nr_of_tdports; ++i) { ++ remove_file(lacp->ctx, lacp->wr.state[i].name); ++ } ++ ++ lacp->wr.nr_of_tdports = 0; ++ if (lacp->wr.state) ++ free(lacp->wr.state); ++ lacp->wr.state = NULL; ++} ++ ++static int lacpdu_read(struct lacp_port *lacp_port, struct lacpdu *lacpdu) ++{ ++ FILE* fp; ++ char filename[PATH_MAX]; ++ int err, nitems; ++ ++ teamd_log_dbg("WR-mode. function lacpdu_read(): %s", lacp_port->tdport->ifname); ++ ++ generate_path(lacp_port->ctx, filename, lacp_port->tdport->ifname); ++ ++ /* check that file is readable. if there is no file, don't do anything */ ++ err = access(filename, R_OK); ++ if (err != 0) { ++ teamd_log_err("WR-mode. LACPDU state file '%s' is unreadable", filename); ++ return err; ++ } ++ ++ fp = fopen(filename, "r"); ++ if (!fp) { ++ teamd_log_err("WR-mode. Can't open lacp-saved dump from file '%s': %s", filename, strerror(errno)); ++ return errno; ++ } ++ ++ nitems = fread(lacpdu, sizeof(struct lacpdu), 1, fp); ++ (void)fclose(fp); ++ ++ err = unlink(filename); ++ if (err < 0) { ++ teamd_log_err("WR-mode. Can't remove file '%s': %s", filename, strerror(errno)); ++ } ++ ++ if (nitems != 1) { ++ teamd_log_err("WR-mode. Can't read lacp-saved dump from file '%s': %s", filename, strerror(errno)); ++ return -EINVAL; ++ } ++ ++ teamd_log_info("WR-mode. LACP state was read for port '%s'", lacp_port->tdport->ifname); ++ ++ return 0; ++} ++ ++static void lacp_state_save(struct teamd_context *ctx, struct lacp *lacp) ++{ ++ char filename[PATH_MAX]; ++ FILE *fp; ++ int i, err; ++ ++ generate_path(ctx, filename, ctx->team_devname); ++ ++ fp = fopen(filename, "wt"); ++ if (!fp) { ++ teamd_log_err("WR-mode. Can't open the file '%s' to save the lacp dump: %s", filename, strerror(errno)); ++ goto error; ++ } ++ ++ err = fprintf(fp, "%d\n%d\n", lacp->carrier_up ? 1 : 0, lacp->wr.nr_of_tdports); ++ if (err < 0) { ++ teamd_log_err("WR-mode. Can't write to the file '%s' to save the lacp dump: %s", filename, strerror(errno)); ++ goto error_with_close; ++ } ++ ++ for (i = 0; i < lacp->wr.nr_of_tdports; ++i) { ++ err = fprintf(fp, "%s\n%d\n", lacp->wr.state[i].name, lacp->wr.state[i].enabled ? 1 : 0); ++ if (err < 0) { ++ teamd_log_err("WR-mode. Can't write to the file '%s' to save the lacp dump: %s", filename, strerror(errno)); ++ goto error_with_close; ++ } ++ } ++ ++error_with_close: ++ (void)fclose(fp); ++ ++error: ++ (void)free(lacp->wr.state); ++ lacp->wr.state = NULL; ++ lacp->wr.nr_of_tdports = 0; ++} ++ ++static int lacp_state_load(struct teamd_context *ctx, struct lacp *lacp) ++{ ++ char filename[PATH_MAX]; ++ FILE *fp; ++ int data1, data2, i, err; ++ ++ teamd_log_dbg("WR-mode. function lacp_state_load()"); ++ ++ generate_path(ctx, filename, ctx->team_devname); ++ ++ fp = fopen(filename, "rt"); ++ if (!fp) { ++ teamd_log_err("WR-mode. Can't open the file '%s' to load the lacp dump: %s", filename, strerror(errno)); ++ return errno; ++ } ++ ++ err = fscanf(fp, "%d\n%d\n", &data1, &data2); ++ if (err != 2) { ++ teamd_log_err("WR-mode. Can't read the file '%s'. Wrong format", filename); ++ (void)fclose(fp); ++ return -1; ++ } ++ lacp->wr.carrier_up = data1 == 1; ++ lacp->wr.nr_of_tdports = data2; ++ ++ lacp->wr.state = calloc(lacp->wr.nr_of_tdports, sizeof(struct wr_tdport_state)); ++ if (!lacp->wr.state) { ++ teamd_log_err("WR-mode. lacp_state_load: Not enough memory. %s", ctx->team_devname); ++ return -1; ++ } ++ for (i = 0; i < lacp->wr.nr_of_tdports; ++i) { ++ err = fscanf(fp, "%16s\n%d\n", &lacp->wr.state[i].name[0], &data1); ++ if (err != 2) { ++ teamd_log_err("WR-mode. Can't read the file '%s'. Wrong format", filename); ++ (void)free(lacp->wr.state); ++ lacp->wr.state = NULL; ++ (void)fclose(fp); ++ return -1; ++ } ++ lacp->wr.state[i].enabled = data1 == 1; ++ lacp->wr.state[i].checked = false; ++ } ++ ++ (void)fclose(fp); ++ ++ err = unlink(filename); ++ if (err < 0) { ++ teamd_log_err("WR-mode. Can't remove file %s: %s", filename, strerror(errno)); ++ } ++ ++ return 0; ++} ++ + static struct lacp_port *lacp_port_get(struct lacp *lacp, + struct teamd_port *tdport) + { +@@ -486,20 +697,95 @@ static int lacp_set_carrier(struct lacp *lacp, bool carrier_up) + return 0; + } + ++static int lacpdu_process(struct lacp_port *lacp_port, struct lacpdu* lacpdu); ++ ++#define LACP_WARM_START_CARRIER_TIMEOUT 3 ++ + static int lacp_update_carrier(struct lacp *lacp) + { + struct teamd_port *tdport; + int ports_enabled; +- bool state; + int err; + ++ if (lacp->ctx->warm_start_mode) { ++ teamd_log_dbg("WR-mode. function lacp_update_carrier()"); ++ } ++ + ports_enabled = 0; + teamd_for_each_tdport(tdport, lacp->ctx) { ++ bool state; + err = teamd_port_enabled(lacp->ctx, tdport, &state); + if (err) + return err; +- if (state && ++ports_enabled >= lacp->cfg.min_ports) +- return lacp_set_carrier(lacp, true); ++ ++ if (state) ++ ++ports_enabled; ++ ++ if (lacp->ctx->warm_start_mode) { ++ int found; ++ struct lacp_port* lacp_port; ++ bool linkup; ++ ++ lacp_port = lacp_port_get(lacp, tdport); ++ found = find_wr_info(lacp_port); ++ if (found < 0) /* newly added port was found */ ++ continue; ++ ++ linkup = team_is_port_link_up(lacp_port->tdport->team_port); ++ if (linkup) { /* read when the port is in carrier up state */ ++ if (!lacp->wr.state[found].checked) { ++ lacp->wr.state[found].checked = true; ++ ++ if(lacp->wr.state[found].enabled) { ++ /* the port was up before the WR. Trying to restore it */ ++ struct lacpdu lacpdu; ++ err = lacpdu_read(lacp_port, &lacpdu); ++ if (err) /* Can't read, so the port will start from scratch */ ++ continue; ++ teamd_log_info("WR-mode. State of the LAG member port '%s' was restored.", ++ tdport->ifname); ++ return lacpdu_process(lacp_port, &lacpdu); /* it runs lacp_update_carrier() inside of it */ ++ } else { ++ teamd_log_info("WR-mode. State of the LAG member port '%s' was down before the restart. Nothing to read", ++ tdport->ifname); ++ } ++ } ++ } ++ } ++ } ++ ++ if (lacp->ctx->warm_start_mode) { ++ int i; ++ bool has_all_ports_added = true; ++ for (i = 0; i < lacp->wr.nr_of_tdports; ++i) ++ has_all_ports_added = has_all_ports_added && lacp->wr.state[i].checked; ++ ++ if (has_all_ports_added) { ++ teamd_log_info("WR-mode. The state for all %d LAG member ports was restored.", ++ lacp->wr.nr_of_tdports); ++ stop_wr_mode(lacp); ++ } ++ } ++ ++ if (lacp->ctx->warm_start_mode) { ++ if (lacp->warm_start_mode_timer == 0) { ++ lacp->warm_start_mode_timer = time(NULL) + LACP_WARM_START_CARRIER_TIMEOUT; ++ } else if (time(NULL) >= lacp->warm_start_mode_timer) { ++ teamd_log_err("WR-mode. Timeout occured. Can't start in WR mode in %d seconds", ++ LACP_WARM_START_CARRIER_TIMEOUT); ++ stop_wr_mode(lacp); ++ } ++ } ++ ++ if (ports_enabled >= lacp->cfg.min_ports) { ++ teamd_log_dbg("Enable carrier. Number of enabled ports %d >= configured min_ports %d", ++ ports_enabled, lacp->cfg.min_ports); ++ return lacp_set_carrier(lacp, true); ++ } ++ ++ if (lacp->ctx->warm_start_mode) { ++ teamd_log_info("WR-mode. lacp_update_carrier(): Keep LAG interface up because of WR start mode"); ++ return lacp_set_carrier(lacp, true); + } + + return lacp_set_carrier(lacp, false); +@@ -919,6 +1205,18 @@ static void lacp_port_actor_system_update(struct lacp_port *lacp_port) + memcpy(actor->system, lacp_port->ctx->hwaddr, ETH_ALEN); + } + ++static int lacp_portname_to_port_id(const char* name) ++{ ++#define PORT_PREFIX "Ethernet" ++ const char* strport_id = name + sizeof(PORT_PREFIX) - 1; ++ const int port_id = atoi(strport_id); ++ if ((port_id == 0) && strcmp(strport_id, "0")) { ++ teamd_log_err("%s: Can't convert from port name to port id. Port id is equal to 0, but this is not expected", name); ++ } ++ ++ return htons(port_id + 1); ++} ++ + static void lacp_port_actor_init(struct lacp_port *lacp_port) + { + struct lacpdu_info *actor = &lacp_port->actor; +@@ -926,7 +1224,7 @@ static void lacp_port_actor_init(struct lacp_port *lacp_port) + actor->system_priority = htons(lacp_port->lacp->cfg.sys_prio); + actor->key = htons(lacp_port->cfg.lacp_key); + actor->port_priority = htons(lacp_port->cfg.lacp_prio); +- actor->port = htons(lacp_port->tdport->ifindex); ++ actor->port = lacp_portname_to_port_id(lacp_port->tdport->ifname); + lacp_port_actor_system_update(lacp_port); + } + +@@ -1006,6 +1304,13 @@ static int lacp_port_set_state(struct lacp_port *lacp_port, + break; + } + ++ if (new_state != PORT_STATE_CURRENT) { ++ /* clean saved lacp pdu up when the current port: ++ disabled, expired, or defaulted */ ++ (void)memset(&lacp_port->last_pdu, 0, sizeof(struct lacpdu)); ++ lacp_port->lacpdu_saved = false; ++ } ++ + teamd_log_info("%s: Changed port state: \"%s\" -> \"%s\"", + lacp_port->tdport->ifname, + lacp_port_state_name[lacp_port->state], +@@ -1095,34 +1400,23 @@ static int lacpdu_send(struct lacp_port *lacp_port) + return err; + } + +-static int lacpdu_recv(struct lacp_port *lacp_port) ++static int lacpdu_process(struct lacp_port *lacp_port, struct lacpdu* lacpdu) + { +- struct lacpdu lacpdu; +- struct sockaddr_ll ll_from; + int err; +- bool admin_state; +- +- err = teamd_recvfrom(lacp_port->sock, &lacpdu, sizeof(lacpdu), 0, +- (struct sockaddr *) &ll_from, sizeof(ll_from)); +- if (err <= 0) +- return err; +- +- admin_state = team_get_ifinfo_admin_state(lacp_port->ctx->ifinfo); +- if (!admin_state) +- return 0; +- +- if (!teamd_port_present(lacp_port->ctx, lacp_port->tdport)) +- return 0; + +- if (!lacpdu_check(&lacpdu)) { ++ if (!lacpdu_check(lacpdu)) { + teamd_log_warn("malformed LACP PDU came."); + return 0; + } + ++ /* save received lacp pdu frame */ ++ (void)memcpy(&lacp_port->last_pdu, lacpdu, sizeof(struct lacpdu)); ++ lacp_port->lacpdu_saved = true; ++ + /* Check if we have correct info about the other side */ +- if (memcmp(&lacpdu.actor, &lacp_port->partner, ++ if (memcmp(&lacpdu->actor, &lacp_port->partner, + sizeof(struct lacpdu_info))) { +- lacp_port->partner = lacpdu.actor; ++ lacp_port->partner = lacpdu->actor; + err = lacp_port_partner_update(lacp_port); + if (err) + return err; +@@ -1138,21 +1432,56 @@ static int lacpdu_recv(struct lacp_port *lacp_port) + lacp_port_actor_update(lacp_port); + + /* Check if the other side has correct info about us */ +- if (memcmp(&lacpdu.partner, &lacp_port->actor, ++ if (memcmp(&lacpdu->partner, &lacp_port->actor, + sizeof(struct lacpdu_info))) { + err = lacpdu_send(lacp_port); + if (err) + return err; + } + err = lacp_port_timeout_set(lacp_port, false); +- if (err) { ++ if (err) + return err; +- } ++ + teamd_loop_callback_enable(lacp_port->ctx, + LACP_TIMEOUT_CB_NAME, lacp_port); + return 0; + } + ++static int lacpdu_recv(struct lacp_port *lacp_port) ++{ ++ struct lacpdu lacpdu; ++ struct sockaddr_ll ll_from; ++ int err; ++ bool admin_state; ++ ++ err = teamd_recvfrom(lacp_port->sock, &lacpdu, sizeof(lacpdu), 0, ++ (struct sockaddr *) &ll_from, sizeof(ll_from)); ++ if (err <= 0) ++ return err; ++ ++ if (!teamd_port_present(lacp_port->ctx, lacp_port->tdport)) ++ return 0; ++ ++ admin_state = team_get_ifinfo_admin_state(lacp_port->ctx->ifinfo); ++ if (!admin_state) ++ return 0; ++ ++ /* if the lacpdu wasn't read yet, don't process received pdu */ ++ if (lacp_port->ctx->warm_start_mode) { ++ int found; ++ ++ found = find_wr_info(lacp_port); ++ if (found >= 0 && !lacp_port->lacp->wr.state[found].checked) { ++ teamd_log_info("WR-mode. Received LACP PDU on %s. " ++ "But saved LACP PDU wasn't processed yet.", ++ lacp_port->tdport->ifname); ++ return 0; ++ } ++ } ++ ++ return lacpdu_process(lacp_port, &lacpdu); ++} ++ + static int lacp_callback_timeout(struct teamd_context *ctx, int events, + void *priv) + { +@@ -1258,6 +1587,8 @@ static int lacp_port_added(struct teamd_context *ctx, + struct lacp *lacp = creator_priv; + int err; + ++ teamd_log_dbg("function lacp_port_added(): %s", tdport->ifname); ++ + lacp_port->ctx = ctx; + lacp_port->tdport = tdport; + lacp_port->lacp = lacp; +@@ -1304,6 +1635,13 @@ static int lacp_port_added(struct teamd_context *ctx, + goto periodic_callback_del; + } + ++ /* refresh ports from the kernel */ ++ err = team_refresh(ctx->th); ++ if (err) { ++ teamd_log_err("%s: Team refresh failed.", tdport->ifname); ++ goto timeout_callback_del; ++ } ++ + /* Newly added ports are disabled */ + err = team_set_port_enabled(ctx->th, tdport->ifindex, false); + if (err) { +@@ -1341,7 +1679,13 @@ static void lacp_port_removed(struct teamd_context *ctx, + { + struct lacp_port *lacp_port = priv; + +- lacp_port_set_state(lacp_port, PORT_STATE_DISABLED); ++ teamd_log_dbg("function lacp_port_removed(): %s", tdport->ifname); ++ ++ if (!lacp_port->ctx->keep_ports) { ++ /* Don't transition into DISABLED state, ++ which sends EXPIRED LACP PDU update */ ++ lacp_port_set_state(lacp_port, PORT_STATE_DISABLED); ++ } + teamd_loop_callback_del(ctx, LACP_TIMEOUT_CB_NAME, lacp_port); + teamd_loop_callback_del(ctx, LACP_PERIODIC_CB_NAME, lacp_port); + teamd_loop_callback_del(ctx, LACP_SOCKET_CB_NAME, lacp_port); +@@ -1449,16 +1793,51 @@ static int lacp_event_watch_port_changed(struct teamd_context *ctx, + return lacp_port_link_update(lacp_port); + } + +-static void lacp_event_watch_refresh(struct teamd_context *ctx, +- struct teamd_port *tdport, void *priv) ++static void lacp_event_watch_refresh(struct teamd_context *ctx, struct teamd_port *tdport, void *priv) + { + struct lacp *lacp = priv; +- struct lacp_port *lacp_port = lacp_port_get(lacp, tdport); + ++ struct lacp_port *lacp_port = lacp_port_get(lacp, tdport); + if (lacp_port_selected(lacp_port)) + (void) lacpdu_send(lacp_port); + } + ++static void lacp_event_watch_port_flush_data(struct teamd_context *ctx, struct teamd_port *tdport, void *priv) ++{ ++ struct lacp *lacp = priv; ++ ++ /* save dump information for each tdport */ ++ lacp->wr.nr_of_tdports++; ++ lacp->wr.state = realloc(lacp->wr.state, sizeof(struct wr_tdport_state) * lacp->wr.nr_of_tdports); ++ if (lacp->wr.state) { ++ int err; ++ strcpy(lacp->wr.state[lacp->wr.nr_of_tdports-1].name, tdport->ifname); ++ err = teamd_port_enabled(ctx, tdport, &lacp->wr.state[lacp->wr.nr_of_tdports-1].enabled); ++ if (err) ++ lacp->wr.state[lacp->wr.nr_of_tdports-1].enabled = false; ++ } else { ++ teamd_log_err("WR-mode. Can't reallocate memory for LACP member %s dump", tdport->ifname); ++ lacp->wr.nr_of_tdports = 0; ++ } ++ ++ struct lacp_port *lacp_port = lacp_port_get(lacp, tdport); ++ if (lacp_port->lacpdu_saved && lacp_port->ctx->lacp_directory) { ++ char filename[PATH_MAX]; ++ generate_path(lacp_port->ctx, filename, lacp_port->tdport->ifname); ++ FILE *fp = fopen(filename, "wb"); ++ if (fp != NULL) { ++ (void)fwrite(&lacp_port->last_pdu, sizeof(struct lacpdu), 1, fp); ++ (void)fclose(fp); ++ } else { ++ teamd_log_err("WR-mode. Can't open file %s for writing %s", filename, strerror(errno)); ++ } ++ } else { ++ if (lacp_port->ctx->lacp_directory == NULL) ++ teamd_log_err("WR-mode. Can't dump received lacp pdu for port %s. " ++ "LACP directory wasn't configured", lacp_port->tdport->ifname); ++ } ++} ++ + static const struct teamd_event_watch_ops lacp_event_watch_ops = { + .hwaddr_changed = lacp_event_watch_hwaddr_changed, + .port_hwaddr_changed = lacp_event_watch_port_hwaddr_changed, +@@ -1467,21 +1846,35 @@ static const struct teamd_event_watch_ops lacp_event_watch_ops = { + .port_changed = lacp_event_watch_port_changed, + .admin_state_changed = lacp_event_watch_admin_state_changed, + .refresh = lacp_event_watch_refresh, ++ .port_flush_data = lacp_event_watch_port_flush_data, + }; + + static int lacp_carrier_init(struct teamd_context *ctx, struct lacp *lacp) + { + int err; + +- /* initialize carrier control */ +- err = team_carrier_set(ctx->th, false); ++ lacp->carrier_up = false; ++ ++ if (ctx->warm_start_mode) { ++ teamd_log_dbg("WR-mode. function lacp_carrier_init()"); ++ ++ /* Disable WR start mode if LAG interface was down */ ++ if (lacp->wr.carrier_up) { ++ teamd_log_info("WR-mode. Starting in WR mode"); ++ } else { ++ teamd_log_info("WR-mode. Starting in normal mode. The LAG interface was down before restart"); ++ } ++ ctx->warm_start_mode = lacp->wr.carrier_up; ++ lacp->carrier_up = lacp->wr.carrier_up; ++ lacp->warm_start_mode_timer = 0; ++ } ++ ++ err = team_carrier_set(ctx->th, lacp->carrier_up); + if (err && err != -EOPNOTSUPP) { +- teamd_log_err("Failed to set carrier down."); ++ teamd_log_err("Failed to set carrier"); + return err; + } + +- lacp->carrier_up = false; +- + return 0; + } + +@@ -1949,6 +2342,12 @@ static int lacp_init(struct teamd_context *ctx, void *priv) + } + + lacp->ctx = ctx; ++ if (ctx->warm_start_mode) { ++ err = lacp_state_load(ctx, lacp); ++ if (err) ++ stop_wr_mode(lacp); ++ } ++ + err = teamd_hash_func_set(ctx); + if (err) + return err; +@@ -1990,10 +2389,13 @@ static void lacp_fini(struct teamd_context *ctx, void *priv) + { + struct lacp *lacp = priv; + ++ if (ctx->lacp_directory) ++ lacp_state_save(ctx, lacp); + teamd_state_val_unregister(ctx, &lacp_state_vg, lacp); + teamd_balancer_fini(lacp->tb); + teamd_event_watch_unregister(ctx, &lacp_event_watch_ops, lacp); +- lacp_carrier_fini(ctx, lacp); ++ if (!ctx->keep_ports) ++ lacp_carrier_fini(ctx, lacp); + } + + const struct teamd_runner teamd_runner_lacp = { +-- +2.17.1.windows.2 + diff --git a/src/libteam/patch/0009-Fix-ifinfo_link_with_port-race-condition-with-newlink.patch b/src/libteam/patch/0009-Fix-ifinfo_link_with_port-race-condition-with-newlink.patch new file mode 100644 index 00000000000..bab3a910832 --- /dev/null +++ b/src/libteam/patch/0009-Fix-ifinfo_link_with_port-race-condition-with-newlink.patch @@ -0,0 +1,45 @@ +From 9a27e9b85afbbf6235e61c2426481e49a2139219 Mon Sep 17 00:00:00 2001 +From: Shu0T1an ChenG +Date: Tue, 15 Jan 2019 12:23:02 -0800 +Subject: [PATCH] Fix ifinfo_link_with_port race condition with newlink + +The race condition could happen like this: +When an interface is enslaved into the port channel immediately after +it is created, the order of creating the ifinfo and linking the ifinfo to +the port is not guaranteed. + +The team handler will listen to both netlink message to track new links +get created to allocate the ifinfo and add the ifinfo into its linked list, +and the team port change message to link the new port with ifinfo found +in its linkedin list. However, when the ifinfo is not yet created, the error +message "Failed to link port with ifinfo" is thrown with member port failed +to be added into the team handler's port list. + +This fix adds a condition to check if ifinfo_link_with_port is linking ifinfo +to a port or to the team interface itself. If it is a port, ifinfo_find_create +function is used to fix the race condition. + +Signed-off-by: Shu0T1an ChenG +--- + libteam/ifinfo.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/libteam/ifinfo.c b/libteam/ifinfo.c +index 44de4ca..444e0cd 100644 +--- a/libteam/ifinfo.c ++++ b/libteam/ifinfo.c +@@ -429,7 +429,10 @@ int ifinfo_link_with_port(struct team_handle *th, uint32_t ifindex, + { + struct team_ifinfo *ifinfo; + +- ifinfo = ifinfo_find(th, ifindex); ++ if (port) ++ ifinfo = ifinfo_find_create(th, ifindex); ++ else ++ ifinfo = ifinfo_find(th, ifindex); + if (!ifinfo) + return -ENOENT; + if (ifinfo->linked) +-- +2.1.4 + diff --git a/src/libteam/patch/0010-When-read-of-timerfd-returned-0-don-t-consider-this-.patch b/src/libteam/patch/0010-When-read-of-timerfd-returned-0-don-t-consider-this-.patch new file mode 100644 index 00000000000..e703d73e026 --- /dev/null +++ b/src/libteam/patch/0010-When-read-of-timerfd-returned-0-don-t-consider-this-.patch @@ -0,0 +1,39 @@ +From 038bed6fe3970dc829dbf9a282f7bea7198e7826 Mon Sep 17 00:00:00 2001 +From: Pavel Shirshov +Date: Wed, 28 Aug 2019 16:39:35 -0700 +Subject: [PATCH] When read of timerfd returned 0, don't consider this an error + +Just skip this event. +--- + teamd/teamd.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +diff --git a/teamd/teamd.c b/teamd/teamd.c +index 96794e8..a5ce745 100644 +--- a/teamd/teamd.c ++++ b/teamd/teamd.c +@@ -285,6 +285,10 @@ static int handle_period_fd(int fd) + teamd_log_err("read() failed."); + return -errno; + } ++ if (ret == 0) { ++ teamd_log_warn("read() for timer_fd returned 0."); ++ return 1; ++ } + if (ret != sizeof(uint64_t)) { + teamd_log_err("read() returned unexpected number of bytes."); + return -EINVAL; +@@ -345,7 +349,9 @@ static int teamd_run_loop_do_callbacks(struct list_item *lcb_list, fd_set *fds, + continue; + if (lcb->is_period) { + err = handle_period_fd(lcb->fd); +- if (err) ++ if (err == 1) ++ continue; /* timerfd returned 0. Don't do anything */ ++ if (err < 0) + return err; + } + err = lcb->func(ctx, events, lcb->priv); +-- +2.7.4 + diff --git a/src/libteam/patch/series b/src/libteam/patch/series new file mode 100644 index 00000000000..7be69525d9d --- /dev/null +++ b/src/libteam/patch/series @@ -0,0 +1,10 @@ +0001-libteam-Temporarily-remove-redundant-debug-messages.patch +0002-teamd-lacp-runner-will-send-lacp-update-right-after-.patch +0003-libteam-Add-fallback-support-for-single-member-port-.patch +0004-Skip-setting-the-same-hwaddr-to-lag-port-to-avoid-di.patch +0005-Increase-default-buffer-size-from-98304-to-983040.patch +0006-teamd-Administratively-shutdown-port-channel-has-mem.patch +0007-Send-LACP-PDU-immediately-if-our-state-changed.patch +0008-libteam-Add-warm_reboot-mode.patch +0009-Fix-ifinfo_link_with_port-race-condition-with-newlink.patch +0010-When-read-of-timerfd-returned-0-don-t-consider-this-.patch diff --git a/src/libyang/Makefile b/src/libyang/Makefile new file mode 100644 index 00000000000..32cabdf13bd --- /dev/null +++ b/src/libyang/Makefile @@ -0,0 +1,28 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = $(LIBYANG) +DERIVED_TARGETS = $(LIBYANG_DEV) $(LIBYANG_DBG) $(LIBYANG_PY2) $(LIBYANG_PY3) $(LIBYANG_CPP) + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Obtaining the libyang + rm -fr ./libyang-$(LIBYANG_VERSION) + git clone https://github.com/CESNET/libyang.git libyang-$(LIBYANG_VERSION) + pushd libyang-$(LIBYANG_VERSION) + git checkout tags/v1.0-r4 -b libyang + # Apply patch series + stg init + stg import -s ../patch/series + + mkdir build + pushd build + cmake .. + make build-deb + + pushd debs + mv $* $(DEST)/ + mv $(DERIVED_TARGETS) $(DEST)/ + popd + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/libyang/patch/libyang.patch b/src/libyang/patch/libyang.patch new file mode 100644 index 00000000000..a950d85086a --- /dev/null +++ b/src/libyang/patch/libyang.patch @@ -0,0 +1,134 @@ +diff --git a/CMakeLists.txt b/CMakeLists.txt +index fa562dd3..8635ba15 100644 +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -33,6 +33,7 @@ set(LIBYANG_MICRO_SOVERSION 2) + set(LIBYANG_SOVERSION_FULL ${LIBYANG_MAJOR_SOVERSION}.${LIBYANG_MINOR_SOVERSION}.${LIBYANG_MICRO_SOVERSION}) + set(LIBYANG_SOVERSION ${LIBYANG_MAJOR_SOVERSION}) + ++set(CMAKE_INSTALL_PREFIX /usr) + # set default build type if not specified by user + if(NOT CMAKE_BUILD_TYPE) + set(CMAKE_BUILD_TYPE debug) +diff --git a/packages/debian.control.in b/packages/debian.control.in +index da6588b9..fb3ede48 100644 +--- a/packages/debian.control.in ++++ b/packages/debian.control.in +@@ -53,3 +53,15 @@ Depends: python3-yang@PACKAGE_PART_NAME@ (=@LIBYANG_VERSION@) + Section: debug + Architecture: any + Description: Debug symbols of python3 bidings of libyang library. ++ ++Package: python2-yang@PACKAGE_PART_NAME@ ++Depends: @PACKAGE_NAME@ (=@LIBYANG_VERSION@), libyang-cpp@PACKAGE_PART_NAME@ (=@LIBYANG_VERSION@) ++Section: libs ++Architecture: any ++Description: Bindings of libyang library to python2 language. ++ ++Package: python2-yang@PACKAGE_PART_NAME@-dbg ++Depends: python2-yang@PACKAGE_PART_NAME@ (=@LIBYANG_VERSION@) ++Section: debug ++Architecture: any ++Description: Debug symbols of python2 bidings of libyang library. +diff --git a/packages/debian.python2-yang.install b/packages/debian.python2-yang.install +new file mode 100644 +index 00000000..14ce2f3c +--- /dev/null ++++ b/packages/debian.python2-yang.install +@@ -0,0 +1 @@ ++usr/lib/python2.7/dist-packages/* +diff --git a/packages/debian.rules.in b/packages/debian.rules.in +index d565819e..e92fe4a1 100644 +--- a/packages/debian.rules.in ++++ b/packages/debian.rules.in +@@ -9,10 +9,14 @@ export DH_VERBOSE=1 + override_dh_strip: + dh_strip -plibyang@PACKAGE_PART_NAME@ --dbg-package=libyang@PACKAGE_PART_NAME@-dbg + dh_strip -plibyang-cpp@PACKAGE_PART_NAME@ --dbg-package=libyang-cpp@PACKAGE_PART_NAME@-dbg ++ dh_strip -ppython2-yang@PACKAGE_PART_NAME@ --dbg-package=python2-yang@PACKAGE_PART_NAME@-dbg + dh_strip -ppython3-yang@PACKAGE_PART_NAME@ --dbg-package=python3-yang@PACKAGE_PART_NAME@-dbg + + override_dh_auto_configure: +- cmake -DCMAKE_INSTALL_PREFIX:PATH=/usr -DCMAKE_BUILD_TYPE:String="@BUILD_TYPE@" -DGEN_LANGUAGE_BINDINGS=ON . ++ cmake -DCMAKE_INSTALL_PREFIX:PATH=/usr -DCMAKE_BUILD_TYPE:String="@BUILD_TYPE@" -DENABLE_LYD_PRIV=ON -DGEN_LANGUAGE_BINDINGS=ON -DGEN_PYTHON_VERSION=2 . ++ ++override_dh_makeshlibs: ++ dh_makeshlibs -Xextensions -Xuser_types + + override_dh_auto_test: + ctest --output-on-failure +diff --git a/packages/libyang.dsc.in b/packages/libyang.dsc.in +index fdfa402b..f75ba184 100644 +--- a/packages/libyang.dsc.in ++++ b/packages/libyang.dsc.in +@@ -1,10 +1,10 @@ + Format: 3.0 (quilt) + Source: @PACKAGE_NAME@ +-Binary: @PACKAGE_NAME@, @PACKAGE_NAME@-dbg, @PACKAGE_NAME@-dev, libyang-cpp@PACKAGE_PART_NAME@, libyang-cpp@PACKAGE_PART_NAME@-dev, libyang-cpp@PACKAGE_PART_NAME@-dbg, python3-yang@PACKAGE_PART_NAME@, python3-yang@PACKAGE_PART_NAME@-dbg ++Binary: @PACKAGE_NAME@, @PACKAGE_NAME@-dbg, @PACKAGE_NAME@-dev, libyang-cpp@PACKAGE_PART_NAME@, libyang-cpp@PACKAGE_PART_NAME@-dev, libyang-cpp@PACKAGE_PART_NAME@-dbg, python3-yang@PACKAGE_PART_NAME@, python3-yang@PACKAGE_PART_NAME@-dbg python2-yang@PACKAGE_PART_NAME@, python2-yang@PACKAGE_PART_NAME@-dbg + Maintainer: CESNET + Version: @LIBYANG_VERSION@ + Architecture: any + Standards-Version: 3.8.2 + Homepage: https://github.com/CESNET/libyang + Vcs-Git: https://github.com/CESNET/libyang +-Build-Depends: debhelper (>= 9), make, gcc, doxygen, cmake, pkg-config, libpcre3-dev, libcmocka-dev, python3-dev, g++, swig (>= 3.0.12) ++Build-Depends: debhelper (>= 9), make, gcc, doxygen, cmake, pkg-config, libpcre3-dev, libcmocka-dev, python3-dev, python2-dev, g++, swig (>= 3.0.12) +diff --git a/packages/libyang.spec.in b/packages/libyang.spec.in +index 6a4ac615..6939f028 100644 +--- a/packages/libyang.spec.in ++++ b/packages/libyang.spec.in +@@ -46,6 +46,8 @@ BuildRequires: python3-devel + %else + BuildRequires: python34-devel + %endif ++ ++BuildRequires: python2-devel + %endif + + Conflicts: @CONFLICT_PACKAGE_NAME@ = @LIBYANG_MAJOR_VERSION@.@LIBYANG_MINOR_VERSION@ +@@ -70,6 +72,11 @@ Summary: Binding to python + Requires: libyang-cpp@PACKAGE_PART_NAME@ = %{version}-%{release} + Requires: %{name} = %{version}-%{release} + ++%package -n python2-yang@PACKAGE_PART_NAME@ ++Summary: Binding to python ++Requires: libyang-cpp@PACKAGE_PART_NAME@ = %{version}-%{release} ++Requires: %{name} = %{version}-%{release} ++ + %description -n libyang-cpp@PACKAGE_PART_NAME@ + Bindings of libyang library to C++ language. + +@@ -80,6 +87,10 @@ Headers of bindings to c++ language. + Bindings of libyang library to python language. + %endif + ++%description -n python2-yang@PACKAGE_PART_NAME@ ++Bindings of libyang library to python language. ++%endif ++ + %description devel + Headers of libyang library. + +@@ -167,4 +178,9 @@ make DESTDIR=%{buildroot} install + %{_libdir}/python* + %endif + ++%files -n python2-yang@PACKAGE_PART_NAME@ ++%defattr(-,root,root) ++%{_libdir}/python* ++%endif ++ + %changelog +diff --git a/packages/local-deb.sh.in b/packages/local-deb.sh.in +index 057bbc67..4318a49d 100755 +--- a/packages/local-deb.sh.in ++++ b/packages/local-deb.sh.in +@@ -18,6 +18,7 @@ fi + cp "@PROJECT_SOURCE_DIR@/packages/debian.libyang-dev.install" debian/@PACKAGE_NAME@-dev.install + cp "@PROJECT_SOURCE_DIR@/packages/debian.libyang-cpp.install" debian/libyang-cpp@PACKAGE_PART_NAME@.install + cp "@PROJECT_SOURCE_DIR@/packages/debian.libyang-cpp-dev.install" debian/libyang-cpp@PACKAGE_PART_NAME@-dev.install ++cp "@PROJECT_SOURCE_DIR@/packages/debian.python2-yang.install" debian/python2-yang@PACKAGE_PART_NAME@.install + cp "@PROJECT_SOURCE_DIR@/packages/debian.python3-yang.install" debian/python3-yang@PACKAGE_PART_NAME@.install + echo -e "@PACKAGE_NAME@ (@LIBYANG_VERSION@) stable; urgency=low\n" >debian/changelog + git log -10 --pretty=format:' * %s (%aN)%n' 2>/dev/null >>debian/changelog || echo -e " * unknown changes \n" >>debian/changelog diff --git a/src/libyang/patch/series b/src/libyang/patch/series new file mode 100644 index 00000000000..773245e4eed --- /dev/null +++ b/src/libyang/patch/series @@ -0,0 +1,2 @@ +libyang.patch +swig.patch diff --git a/src/libyang/patch/swig.patch b/src/libyang/patch/swig.patch new file mode 100644 index 00000000000..a6f798c1822 --- /dev/null +++ b/src/libyang/patch/swig.patch @@ -0,0 +1,136 @@ +diff --git a/swig/CMakeLists.txt b/swig/CMakeLists.txt +index 4cee36ec..0baa69ab 100644 +--- a/swig/CMakeLists.txt ++++ b/swig/CMakeLists.txt +@@ -20,27 +20,34 @@ endif() + + # find Python package + if(GEN_PYTHON_BINDINGS AND SWIG_FOUND) +- message(STATUS "Python version ${GEN_PYTHON_VERSION} was selected") +- unset(PYTHON_LIBRARY CACHE) +- unset(PYTHON_EXECUTABLE CACHE) +- unset(PYTHON_INCLUDE_DIR CACHE) +- unset(PYTHON_LIBRARY_DEBUG CACHE) +- if(${GEN_PYTHON_VERSION} STREQUAL "2") +- find_package(PythonLibs 2 REQUIRED) +- find_package(PythonInterp 2 REQUIRED) +- if(NOT PYTHONLIBS_FOUND) +- message(WARNING "Did not found Python version 2.x") +- message(STATUS "Sysrepo supports Python 2.x and Python 3.x") +- endif() +- elseif(${GEN_PYTHON_VERSION} STREQUAL "3") +- find_package(PythonLibs 3 REQUIRED) +- find_package(PythonInterp 3 REQUIRED) +- if(NOT PYTHONLIBS_FOUND) +- message(WARNING "Did not found Python version 3.x") +- message(STATUS "Sysrepo supports Python 2.x and Python 3.x") +- endif() ++ if(ENABLE_STATIC) ++ message(WARNING "Can't create a static Python module") + else() +- message(WARNING "Sysrepo supports Python 2.x and Python 3.x") ++ set(GEN_PYTHON_VERSION 2 3) ++ foreach(CUR_PYTHON_VERSION ${GEN_PYTHON_VERSION}) ++ message(STATUS "Python version ${CUR_PYTHON_VERSION} was selected") ++ ++ unset(PYTHON_EXECUTABLE CACHE) ++ unset(PYTHON_INCLUDE_PATH CACHE) ++ unset(PYTHON_EXT_SUFFIX CACHE) ++ unset(PYTHON_MODULE_PATH CACHE) ++ set(PYTHON_EXT_SUFFIX ".so") ++ ++ find_program(PYTHON_EXECUTABLE NAMES python${CUR_PYTHON_VERSION}) ++ execute_process(COMMAND ${PYTHON_EXECUTABLE} -c ++ "from distutils.sysconfig import get_config_var; print(get_config_var('INCLUDEPY'))" ++ OUTPUT_VARIABLE PYTHON_INCLUDE_PATH ++ OUTPUT_STRIP_TRAILING_WHITESPACE ) ++ #execute_process(COMMAND ${PYTHON_EXECUTABLE} -c ++ # "from distutils.sysconfig import get_config_var; print(get_config_var('EXT_SUFFIX'))" ++ # OUTPUT_VARIABLE PYTHON_EXT_SUFFIX ++ # OUTPUT_STRIP_TRAILING_WHITESPACE ) ++ execute_process(COMMAND ${PYTHON_EXECUTABLE} -c ++ "from distutils.sysconfig import get_python_lib; print(get_python_lib(plat_specific=True))" ++ OUTPUT_VARIABLE PYTHON_MODULE_PATH ++ OUTPUT_STRIP_TRAILING_WHITESPACE ) ++ add_subdirectory(python python${CUR_PYTHON_VERSION}) ++ endforeach(CUR_PYTHON_VERSION) + endif() + endif() + +@@ -99,12 +106,6 @@ if (GEN_CPP_BINDINGS) + endif() + endif() + +-if(ENABLE_STATIC AND PYTHONLIBS_FOUND AND PYTHONINTERP_FOUND AND (${GEN_PYTHON_VERSION} STREQUAL "2" OR ${GEN_PYTHON_VERSION} STREQUAL "3")) +- message(WARNING "Can't create a static Python module") +-elseif(PYTHONLIBS_FOUND AND PYTHONINTERP_FOUND AND (${GEN_PYTHON_VERSION} STREQUAL "2" OR ${GEN_PYTHON_VERSION} STREQUAL "3")) +- add_subdirectory(python) +-endif() +- + if(NOT ENABLE_STATIC AND GEN_JAVASCRIPT_BINDINGS) + message(WARNING "Can't create Javascript bindings with a shared library, please use -DENABLE_STATIC") + elseif(ENABLE_STATIC AND GEN_JAVASCRIPT_BINDINGS) +diff --git a/swig/python/CMakeLists.txt b/swig/python/CMakeLists.txt +index 994b1234..5d18b8bf 100644 +--- a/swig/python/CMakeLists.txt ++++ b/swig/python/CMakeLists.txt +@@ -1,30 +1,38 @@ + set(PYTHON_SWIG_BINDING yang) ++set(PYTHON_SWIG_TARGET yang${CUR_PYTHON_VERSION}) + include_directories(${PYTHON_INCLUDE_PATH}) + include_directories(${CMAKE_CURRENT_SOURCE_DIR}) ++include_directories(${PROJECT_SOURCE_DIR}/cpp/src) + + set(CMAKE_SWIG_FLAGS "-c++") +-set(CMAKE_SWIG_FLAGS "-I${PROJECT_SOURCE_DIR}") ++set(CMAKE_SWIG_FLAGS "-I${PROJECT_SOURCE_DIR}" "-I${PROJECT_SOURCE_DIR}/cpp/src") + set(CMAKE_SWIG_OUTDIR ${CMAKE_CURRENT_BINARY_DIR}) + +-set_source_files_properties(${PYTHON_SWIG_BINDING}.i PROPERTIES CPLUSPLUS ON PREFIX "") ++set_source_files_properties(${PYTHON_SWIG_BINDING}.i PROPERTIES CPLUSPLUS ON PREFIX "" SWIG_MODULE_NAME ${PYTHON_SWIG_BINDING}) + + if(${CMAKE_VERSION} VERSION_LESS "3.8.0") +- swig_add_module(${PYTHON_SWIG_BINDING} python ${PYTHON_SWIG_BINDING}.i) ++ swig_add_module(${PYTHON_SWIG_TARGET} python ${PYTHON_SWIG_BINDING}.i) + else() +- swig_add_library(${PYTHON_SWIG_BINDING} LANGUAGE python SOURCES ${PYTHON_SWIG_BINDING}.i) ++ swig_add_library(${PYTHON_SWIG_TARGET} LANGUAGE python SOURCES ${PYTHON_SWIG_BINDING}.i) + endif() +-swig_link_libraries(${PYTHON_SWIG_BINDING} ${PYTHON_LIBRARIES} libyang-cpp) ++swig_link_libraries(${PYTHON_SWIG_TARGET} ${PYTHON_LIBRARIES} libyang-cpp) ++ ++set_target_properties(_${PYTHON_SWIG_TARGET} PROPERTIES OUTPUT_NAME "_yang${PYTHON_EXT_SUFFIX}" SUFFIX "") + + # Generate header with SWIG run-time functions + execute_process(COMMAND ${SWIG_EXECUTABLE} -python -external-runtime ${CMAKE_CURRENT_BINARY_DIR}/swigpyrun.h) + +-file(COPY "examples" DESTINATION ${CMAKE_CURRENT_BINARY_DIR}) ++add_custom_command(TARGET ${PYTHON_SWIG_TARGET}_swig_compilation POST_BUILD ++ COMMAND sed -e "'s/\\(inst =.*tp_new.*\\)Py_None, Py_None);/PyObject *tup = PyTuple_New(0); \\1tup, Py_None); Py_DECREF(tup);/'" < swigpyrun.h > swigpyrun.h.new ++ COMMAND sed -e "'s/\\(inst =.*tp_new.*\\)Py_None, Py_None);/PyObject *tup = PyTuple_New(0); \\1tup, Py_None); Py_DECREF(tup);/'" < yangPYTHON_wrap.cxx > yangPYTHON_wrap.cxx.new ++ COMMAND diff -q swigpyrun.h swigpyrun.h.new || mv swigpyrun.h.new swigpyrun.h ++ COMMAND diff -q yangPYTHON_wrap.cxx yangPYTHON_wrap.cxx.new || mv yangPYTHON_wrap.cxx.new yangPYTHON_wrap.cxx ++ WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR} ++ ) + +-execute_process(COMMAND ${PYTHON_EXECUTABLE} -c "from distutils.sysconfig import get_python_lib; print(get_python_lib(plat_specific=True))" +- OUTPUT_VARIABLE PYTHON_MODULE_PATH +- OUTPUT_STRIP_TRAILING_WHITESPACE ) ++file(COPY "examples" DESTINATION ${CMAKE_CURRENT_BINARY_DIR}) + +-install( TARGETS _${PYTHON_SWIG_BINDING} DESTINATION ${PYTHON_MODULE_PATH}) ++install( TARGETS _${PYTHON_SWIG_TARGET} DESTINATION ${PYTHON_MODULE_PATH}) + install( FILES "${CMAKE_CURRENT_BINARY_DIR}/${PYTHON_SWIG_BINDING}.py" DESTINATION ${PYTHON_MODULE_PATH}) + install( FILES "${CMAKE_CURRENT_BINARY_DIR}/swigpyrun.h" DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/libyang) + +@@ -51,8 +59,8 @@ if(ENABLE_BUILD_TESTS) + ADD_PYTHON_TEST(test_tree_data) + ADD_PYTHON_TEST(test_tree_schema) + +- add_custom_command(TARGET ${SWIG_MODULE_${PYTHON_SWIG_BINDING}_REAL_NAME} POST_BUILD +- COMMAND cp "${CMAKE_CURRENT_BINARY_DIR}/_${PYTHON_SWIG_BINDING}.so" ${PY2_SWIG_DIR}/tests ++ add_custom_command(TARGET ${SWIG_MODULE_${PYTHON_SWIG_TARGET}_REAL_NAME} POST_BUILD ++ COMMAND cp "${CMAKE_CURRENT_BINARY_DIR}/_yang${PYTHON_EXT_SUFFIX}" ${PY2_SWIG_DIR}/tests/_yang.so + COMMAND cp "${CMAKE_CURRENT_BINARY_DIR}/${PYTHON_SWIG_BINDING}.py" ${PY2_SWIG_DIR}/tests + WORKING_DIRECTORY ${CMAKE_BINARY_DIR} + ) diff --git a/src/lldpd/Makefile b/src/lldpd/Makefile new file mode 100644 index 00000000000..285d7fec991 --- /dev/null +++ b/src/lldpd/Makefile @@ -0,0 +1,44 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = $(LLDPD) +DERIVED_TARGETS = $(LIBLLDPCTL) $(LLDPD_DBG) + +LLDP_URL = http://ftp.debian.org/debian/pool/main/l/lldpd + +DSC_FILE = lldpd_$(LLDPD_VERSION_FULL).dsc +ORIG_FILE = lldpd_$(LLDPD_VERSION).orig.tar.gz +DEBIAN_FILE = lldpd_$(LLDPD_VERSION_FULL).debian.tar.xz + +DSC_FILE_URL = $(LLDP_URL)/$(DSC_FILE) +ORIG_FILE_URL = $(LLDP_URL)/$(ORIG_FILE) +DEBIAN_FILE_URL = $(LLDP_URL)/$(DEBIAN_FILE) + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Remove any stale files + rm -rf lldpd-$(LLDPD_VERSION) + + # download debian LLDPDD + wget -NO "$(DSC_FILE)" $(DSC_FILE_URL) + wget -NO "$(ORIG_FILE)" $(ORIG_FILE_URL) + wget -NO "$(DEBIAN_FILE)" $(DEBIAN_FILE_URL) + dpkg-source -x lldpd_$(LLDPD_VERSION_FULL).dsc + + pushd lldpd-$(LLDPD_VERSION) + git init + git add -f * + git commit -m "unmodified lldp source" + + # Apply patches + stg init + stg import -s ../patch/series + + # Build source and Debian packages + env "with_netlink_receive_bufsize=1024*1024" dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + # Move the newly-built .deb packages to the destination directory + mv $* $(DERIVED_TARGETS) $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/lldpd/patch/0001-return-error-when-port-does-not-exist.patch b/src/lldpd/patch/0001-return-error-when-port-does-not-exist.patch new file mode 100644 index 00000000000..e17d09a386d --- /dev/null +++ b/src/lldpd/patch/0001-return-error-when-port-does-not-exist.patch @@ -0,0 +1,39 @@ +From 15e692fb82a61203624829cdd872315211920077 Mon Sep 17 00:00:00 2001 +From: Guohan Lu +Date: Tue, 6 Mar 2018 09:36:51 +0000 +Subject: [PATCH] return error when port does not exist + +--- + src/client/conf-lldp.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/src/client/conf-lldp.c b/src/client/conf-lldp.c +index c16219b..b51e4eb 100644 +--- a/src/client/conf-lldp.c ++++ b/src/client/conf-lldp.c +@@ -148,6 +148,8 @@ cmd_portid_type_local(struct lldpctl_conn_t *conn, struct writer *w, + const char *name; + const char *id = cmdenv_get(env, "port-id"); + const char *descr = cmdenv_get(env, "port-descr"); ++ const char *portname = cmdenv_get(env, "ports"); ++ int find_port = 0; + + log_debug("lldpctl", "lldp PortID TLV Subtype Local port-id '%s' port-descr '%s'", id, descr); + +@@ -165,6 +167,12 @@ cmd_portid_type_local(struct lldpctl_conn_t *conn, struct writer *w, + log_warnx("lldpctl", "unable to set LLDP Port Description for %s." + " %s", name, lldpctl_last_strerror(conn)); + } ++ find_port = 1; ++ } ++ ++ if (!find_port) { ++ log_warnx("lldpctl", "cannot find port %s", portname); ++ return 0; + } + + return 1; +-- +2.7.4 + + diff --git a/src/lldpd/patch/0002-Let-linux-kernel-to-find-appropriate-nl_pid-automa.patch b/src/lldpd/patch/0002-Let-linux-kernel-to-find-appropriate-nl_pid-automa.patch new file mode 100644 index 00000000000..801fdd8ec96 --- /dev/null +++ b/src/lldpd/patch/0002-Let-linux-kernel-to-find-appropriate-nl_pid-automa.patch @@ -0,0 +1,25 @@ +From 2ee8585e8b716719a11235ab5c291b2f6ac9ce1a Mon Sep 17 00:00:00 2001 +From: Pavel Shirshov +Date: Wed, 17 Oct 2018 21:05:58 +0000 +Subject: [PATCH] Let linux kernel to find appropriate nl_pid automatically + +--- + src/daemon/netlink.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/src/daemon/netlink.c b/src/daemon/netlink.c +index 1a64a23..f4227b8 100644 +--- a/src/daemon/netlink.c ++++ b/src/daemon/netlink.c +@@ -93,7 +93,7 @@ netlink_connect(struct lldpd *cfg, int protocol, unsigned groups) + int s; + struct sockaddr_nl local = { + .nl_family = AF_NETLINK, +- .nl_pid = getpid(), ++ .nl_pid = 0, + .nl_groups = groups + }; + +-- +2.7.4 + diff --git a/src/lldpd/patch/0003-update-tx-interval-immediately.patch b/src/lldpd/patch/0003-update-tx-interval-immediately.patch new file mode 100644 index 00000000000..b6b29500128 --- /dev/null +++ b/src/lldpd/patch/0003-update-tx-interval-immediately.patch @@ -0,0 +1,20 @@ +diff --git a/src/daemon/client.c b/src/daemon/client.c +index 8382d02..38cf3f3 100644 +--- a/src/daemon/client.c ++++ b/src/daemon/client.c +@@ -71,7 +71,6 @@ client_handle_set_configuration(struct lldpd *cfg, enum hmsg_type *type, + if (CHANGED(c_tx_interval) && config->c_tx_interval != 0) { + if (config->c_tx_interval < 0) { + log_debug("rpc", "client asked for immediate retransmission"); +- levent_send_now(cfg); + } else { + log_debug("rpc", "client change transmit interval to %d", + config->c_tx_interval); +@@ -79,6 +78,7 @@ client_handle_set_configuration(struct lldpd *cfg, enum hmsg_type *type, + LOCAL_CHASSIS(cfg)->c_ttl = cfg->g_config.c_tx_interval * + cfg->g_config.c_tx_hold; + } ++ levent_send_now(cfg); + } + if (CHANGED(c_tx_hold) && config->c_tx_hold > 0) { + log_debug("rpc", "client change transmit hold to %d", diff --git a/src/lldpd/patch/series b/src/lldpd/patch/series new file mode 100644 index 00000000000..5e5e8bc9971 --- /dev/null +++ b/src/lldpd/patch/series @@ -0,0 +1,4 @@ +# This series applies on GIT commit 396961a038a38675d46f96eaa7b430b2a1f8701b +0001-return-error-when-port-does-not-exist.patch +0002-Let-linux-kernel-to-find-appropriate-nl_pid-automa.patch +0003-update-tx-interval-immediately.patch diff --git a/src/lm-sensors/0001-patch-the-debian-package-info-to-get-sensord.patch b/src/lm-sensors/0001-patch-the-debian-package-info-to-get-sensord.patch new file mode 100644 index 00000000000..4ff40124018 --- /dev/null +++ b/src/lm-sensors/0001-patch-the-debian-package-info-to-get-sensord.patch @@ -0,0 +1,256 @@ +From a8047116d3724bf77cb4306f0440ea62f0a453ca Mon Sep 17 00:00:00 2001 +From: Mykola Faryma +Date: Tue, 19 Mar 2019 14:41:15 +0000 +Subject: [PATCH] patch the debian package info to get sensord + +Signed-off-by: Mykola Faryma +--- + .../lm-sensors-3.4.0/debian/sensord.NEWS | 12 ++++ + .../lm-sensors-3.4.0/debian/sensord.README.Debian | 23 ++++++++ + .../lm-sensors-3.4.0/debian/sensord.default | 20 +++++++ + .../lm-sensors-3.4.0/debian/sensord.dirs | 3 + + .../lm-sensors-3.4.0/debian/sensord.init | 64 ++++++++++++++++++++++ + .../lm-sensors-3.4.0/debian/sensord.install | 2 + + .../lm-sensors-3.4.0/debian/sensord.maintscript | 2 + + .../lm-sensors-3.4.0/debian/sensord.postinst | 23 ++++++++ + .../lm-sensors-3.4.0/debian/sensord.substvars | 2 + + .../lm-sensors-3.4.0/debian/control | 14 ++++++++++++++ + 11 files changed, 167 insertions(+), 1 deletion(-) + create mode 100644 src/lm-sensors/lm-sensors-3.4.0/debian/sensord.NEWS + create mode 100644 src/lm-sensors/lm-sensors-3.4.0/debian/sensord.README.Debian + create mode 100644 src/lm-sensors/lm-sensors-3.4.0/debian/sensord.default + create mode 100644 src/lm-sensors/lm-sensors-3.4.0/debian/sensord.dirs + create mode 100644 src/lm-sensors/lm-sensors-3.4.0/debian/sensord.init + create mode 100644 src/lm-sensors/lm-sensors-3.4.0/debian/sensord.install + create mode 100644 src/lm-sensors/lm-sensors-3.4.0/debian/sensord.maintscript + create mode 100644 src/lm-sensors/lm-sensors-3.4.0/debian/sensord.postinst + create mode 100644 src/lm-sensors/lm-sensors-3.4.0/debian/sensord.substvars + +diff --git a/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.NEWS b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.NEWS +new file mode 100644 +index 0000000..4bcfdb9 +--- /dev/null ++++ b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.NEWS +@@ -0,0 +1,12 @@ ++lm-sensors (1:2.9.0-7) unstable; urgency=low ++ ++ Since version 2.9.0 sensord doesn't scale the loadavg itself (* 10) as ++ RRDs work with floating-point values and thus do very well with ++ non-integer values even < 1. ++ ++ They can even be scaled later at display time by rrdtool itself using: ++ DEF:load=sensord.rrd:loadavg:AVERAGE ++ CDEF:load10=load,10,* ++ ++ -- Aurelien Jarno Tue, 11 Jan 2005 22:41:34 +0100 ++ +diff --git a/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.README.Debian b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.README.Debian +new file mode 100644 +index 0000000..9159fbc +--- /dev/null ++++ b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.README.Debian +@@ -0,0 +1,23 @@ ++This is the Debian packaging of sensord, the sensord logging daemon. ++ ++The file /etc/default/sensord specifies the configuration parameters ++used to start the daemon. In particular, the syslog facility is set ++to `daemon' and not `local4'. ++ ++You must load the appropriate lm-sensors modules during system boot in ++order for the daemon to function correctly. ++ ++The file /etc/modules is a useful place to list these modules; for ++example, you might list i2c-amd756 (an I2C/SMBUS module) and w83781d ++(a sensor chip module). ++ ++The daemon does not setup the sensors limits from /etc/sensors3.conf, ++this is the job of sensors, when called with -s. Note that 'sensors -s' ++is called at boot time from /etc/init.d/lm-sensors, so that the sensors ++limits should be the right ones in normal use. Don't forget to run ++sensors -s again if you changed the limits in /etc/sensors3.conf. ++ ++For full documentation on setting up lm-sensors on your system, ++see /usr/share/doc/lm-sensors. ++ ++-- David Z. Maze +diff --git a/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.default b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.default +new file mode 100644 +index 0000000..589b94c +--- /dev/null ++++ b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.default +@@ -0,0 +1,20 @@ ++# Interval between scanning for alarms; e.g., 30s, 1m, 1h ++# ALARM_INTERVAL=1m ++# Interval between logging sensor measurements; e.g., 30s, 1m, 1h ++# LOG_INTERVAL=30m ++# Syslog facility to use ++SYSLOG_FACILITY=daemon ++# Libsensors config file to use ++# CONFIG_FILE=/etc/sensors3.conf ++# Chips to scan ++# SCAN_CHIPS=... ++ ++# Uncomment this to enable a 7-day round-robin database of sensor ++# readings. See the ROUND ROBIN DATABASES section of the sensord ++# manual page for details. ++# RRD_FILE=/var/log/sensord.rrd ++# Interval between RRD readings; e.g. 30s, 5m (default), 1h ++# RRD_INTERVAL=5m ++# Include the load average in the RRD file. If you enable this you ++# must remove your old RRD file and rebuild your CGI script. ++# RRD_LOADAVG=yes +diff --git a/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.dirs b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.dirs +new file mode 100644 +index 0000000..b9cd814 +--- /dev/null ++++ b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.dirs +@@ -0,0 +1,3 @@ ++usr/sbin ++usr/share/man/man8 ++etc/default +diff --git a/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.init b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.init +new file mode 100644 +index 0000000..4d70d43 +--- /dev/null ++++ b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.init +@@ -0,0 +1,64 @@ ++#!/bin/sh ++ ++### BEGIN INIT INFO ++# Provides: sensord ++# Required-Start: $remote_fs $syslog lm-sensors ++# Required-Stop: $remote_fs $syslog ++# Default-Start: 2 3 4 5 ++# Default-Stop: ++# Short-Description: lm-sensors daemon ++# Description: hardware sensor information logging daemon ++### END INIT INFO ++ ++. /lib/lsb/init-functions ++ ++[ -f /etc/default/rcS ] && . /etc/default/rcS ++PATH=/bin:/usr/bin:/sbin:/usr/sbin ++DAEMON=/usr/sbin/sensord ++DESC="sensor daemon" ++NAME="sensord" ++PIDFILE=/var/run/sensord.pid ++CONFIG=/etc/default/sensord ++ ++test -x $DAEMON || exit 0 ++ ++if [ -f $CONFIG ]; then . $CONFIG; fi ++ ++if [ -n "$ALARM_INTERVAL" ]; then ALARM_INTERVAL="-i $ALARM_INTERVAL"; fi ++if [ -n "$LOG_INTERVAL" ]; then LOG_INTERVAL="-l $LOG_INTERVAL"; fi ++if [ -n "$SYSLOG_FACILITY" ]; then SYSLOG_FACILITY="-f $SYSLOG_FACILITY"; fi ++if [ -n "$CONFIG_FILE" ]; then CONFIG_FILE="-c $CONFIG_FILE"; fi ++if [ -n "$RRD_FILE" ]; then RRD_FILE="-r $RRD_FILE"; fi ++if [ -n "$RRD_INTERVAL" ]; then RRD_INTERVAL="-t $RRD_INTERVAL"; fi ++if [ -n "$RRD_LOADAVG" ]; then RRD_LOADAVG="-a"; fi ++ ++case "$1" in ++ start) ++ log_daemon_msg "Starting $DESC" "$NAME" ++ /sbin/start-stop-daemon --start --quiet --pidfile $PIDFILE --exec $DAEMON -- $ALARM_INTERVAL $LOG_INTERVAL $SYSLOG_FACILITY $RRD_INTERVAL $RRD_FILE $RRD_LOADAVG $CONFIG_FILE $SCAN_CHIPS ++ log_end_msg $? ++ ;; ++ stop) ++ log_daemon_msg "Stopping $DESC" "$NAME" ++ start-stop-daemon --stop --quiet --pidfile $PIDFILE --oknodo --exec $DAEMON ++ log_end_msg $? ++ ;; ++ restart) ++ $0 stop ++ sleep 1 ++ $0 start ++ ;; ++ force-reload) ++ if start-stop-daemon --stop --test --quiet --pidfile $PIDFILE --exec $DAEMON ; then ++ $0 restart ++ fi ++ ;; ++ status) ++ status_of_proc $DAEMON $NAME && exit 0 || exit $? ++ ;; ++ *) ++ echo "Usage: /etc/init.d/sensord {start|stop|restart|force-reload|status}" ++ exit 1 ++esac ++ ++exit 0 +diff --git a/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.install b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.install +new file mode 100644 +index 0000000..9713fee +--- /dev/null ++++ b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.install +@@ -0,0 +1,2 @@ ++usr/sbin/sensord ++usr/share/man/man8/sensord.8 +diff --git a/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.maintscript b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.maintscript +new file mode 100644 +index 0000000..0e0ff03 +--- /dev/null ++++ b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.maintscript +@@ -0,0 +1,2 @@ ++# Remove old logcheck ignore file ++rm_conffile /etc/logcheck/ignore.d.server/sensord 1:3.3.5-1~ +diff --git a/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.postinst b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.postinst +new file mode 100644 +index 0000000..3418fa6 +--- /dev/null ++++ b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.postinst +@@ -0,0 +1,23 @@ ++#!/bin/sh ++# postinst script for sensord ++# ++# see: dh_installdeb(1) ++set -e ++ ++case "$1" in ++ configure) ++ # Remove shutdown and reboot links; this init script does not need them. ++ if dpkg --compare-versions "$2" lt "1:3.1.1-5"; then ++ rm -f /etc/rc0.d/K[0-9][0-9]sensord /etc/rc1.d/K[0-9][0-9]sensord /etc/rc6.d/K[0-9][0-9]sensord ++ fi ++ ;; ++ abort-upgrade|abort-remove|abort-deconfigure) ++ ;; ++ ++ *) ++ echo "postinst called with unknown argument \`$1'" >&2 ++ exit 1 ++ ;; ++esac ++ ++#DEBHELPER# +diff --git a/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.substvars b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.substvars +new file mode 100644 +index 0000000..978fc8b +--- /dev/null ++++ b/src/lm-sensors/lm-sensors-3.4.0/debian/sensord.substvars +@@ -0,0 +1,2 @@ ++misc:Depends= ++misc:Pre-Depends= +diff --git a/src/lm-sensors/lm-sensors-3.4.0/debian/control b/src/lm-sensors/lm-sensors-3.4.0/debian/control +--- a/src/lm-sensors/lm-sensors-3.4.0/debian/control ++++ b/src/lm-sensors/lm-sensors-3.4.0/debian/control +@@ -68,3 +68,17 @@ Description: utility to control the fan speed + and sets the corresponding PWM outputs to the computed values. This is + useful when this feature is not provided by the BIOS or ACPI, which should + normally be the case on a laptop. ++ ++Package: sensord ++Architecture: any ++Section: utils ++Depends: lm-sensors, lsb-base (>= 3.2-13), ${shlibs:Depends}, ${misc:Depends} ++Suggests: rrdtool ++Description: hardware sensor information logging daemon ++ Lm-sensors is a hardware health monitoring package for Linux. It allows you ++ to access information from temperature, voltage, and fan speed sensors. It ++ works with most newer systems. ++ . ++ This package contains a daemon that logs hardware health status to the ++ system log with optional warnings on potential system problems. ++ +-- +1.9.1 diff --git a/src/lm-sensors/Makefile b/src/lm-sensors/Makefile new file mode 100644 index 00000000000..50cc3e51bb3 --- /dev/null +++ b/src/lm-sensors/Makefile @@ -0,0 +1,24 @@ +SHELL = /bin/bash +.ONESHELL: + .SHELLFLAGS += -e + + +MAIN_TARGET = $(LM_SENSORS) +DERIVED_TARGETS = fancontrol_$(LM_SENSORS_VERSION_FULL)_all.deb \ + libsensors4_$(LM_SENSORS_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + sensord_$(LM_SENSORS_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + $(LM_SENSORS_DBG) \ + $(LIBSENSORS_DBG) \ + $(SENSORD_DBG) + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + rm -rf lm-sensors-$(LM_SENSORS_VERSION) + dget -u http://deb.debian.org/debian/pool/main/l/lm-sensors/lm-sensors_$(LM_SENSORS_VERSION_FULL).dsc + git apply *.patch + pushd lm-sensors-$(LM_SENSORS_VERSION) + DEB_BUILD_OPTIONS=nocheck PROG_EXTRA=sensord dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/mpdecimal/Makefile b/src/mpdecimal/Makefile new file mode 100644 index 00000000000..c4ef5b78b49 --- /dev/null +++ b/src/mpdecimal/Makefile @@ -0,0 +1,22 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = libmpdec2_$(MPDECIMAL_VERSION_FULL)_$(CONFIGURED_ARCH).deb +DERIVED_TARGETS = libmpdec-dev_$(MPDECIMAL_VERSION_FULL)_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + rm -rf mpdecimal-$(MPDECIMAL_VERSION) + + wget -N -O mpdecimal_$(MPDECIMAL_VERSION).orig.tar.gz http://http.debian.net/debian/pool/main/m/mpdecimal/mpdecimal_$(MPDECIMAL_VERSION).orig.tar.gz + wget -N -O mpdecimal_$(MPDECIMAL_VERSION_FULL).debian.tar.xz http://http.debian.net/debian/pool/main/m/mpdecimal/mpdecimal_$(MPDECIMAL_VERSION_FULL).debian.tar.xz + wget -N -O mpdecimal_$(MPDECIMAL_VERSION_FULL).dsc http://http.debian.net/debian/pool/main/m/mpdecimal/mpdecimal_$(MPDECIMAL_VERSION_FULL).dsc + + dpkg-source -x mpdecimal_$(MPDECIMAL_VERSION_FULL).dsc + pushd mpdecimal-$(MPDECIMAL_VERSION) + dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + mv $* $(DERIVED_TARGETS) $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/ptf b/src/ptf new file mode 160000 index 00000000000..36a3e3d9ac0 --- /dev/null +++ b/src/ptf @@ -0,0 +1 @@ +Subproject commit 36a3e3d9ac0447d28161d24028401239d756875f diff --git a/src/python-click/Makefile b/src/python-click/Makefile new file mode 100644 index 00000000000..4deb27257fd --- /dev/null +++ b/src/python-click/Makefile @@ -0,0 +1,26 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = python-click_$(PYTHON_CLICK_VERSION)_all.deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Remove any stale files + rm -rf ./python-click + + # Clone python-click Debian repo + git clone https://salsa.debian.org/debian/python-click + + pushd ./python-click + + # Reset HEAD to the commit of the proper tag + # NOTE: Using "git checkout " here detaches our HEAD, + # which stg doesn't like, so we use this method instead + git reset --hard debian/$(PYTHON_CLICK_VERSION) + + # Build source and Debian packages + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + # Move the newly-built .deb package to the destination directory + mv $* $(DEST)/ diff --git a/src/python3/Makefile b/src/python3/Makefile new file mode 100644 index 00000000000..c5d8c386c1b --- /dev/null +++ b/src/python3/Makefile @@ -0,0 +1,43 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +PYTHON_VER=3.6.0 +PYTHON_DEB_VER=1 +PYTHON_PNAME=python3.6 + +MAIN_TARGET = lib$(PYTHON_PNAME)-minimal_$(PYTHON_VER)-$(PYTHON_DEB_VER)_$(CONFIGURED_ARCH).deb +DERIVED_TARGETS = lib$(PYTHON_PNAME)-stdlib_$(PYTHON_VER)-$(PYTHON_DEB_VER)_$(CONFIGURED_ARCH).deb \ + lib$(PYTHON_PNAME)_$(PYTHON_VER)-$(PYTHON_DEB_VER)_$(CONFIGURED_ARCH).deb \ + $(PYTHON_PNAME)-minimal_$(PYTHON_VER)-$(PYTHON_DEB_VER)_$(CONFIGURED_ARCH).deb \ + $(PYTHON_PNAME)_$(PYTHON_VER)-$(PYTHON_DEB_VER)_$(CONFIGURED_ARCH).deb \ + lib$(PYTHON_PNAME)-dev_$(PYTHON_VER)-$(PYTHON_DEB_VER)_$(CONFIGURED_ARCH).deb + #$(PYTHON_PNAME)-dev_$(PYTHON_VER)-$(PYTHON_DEB_VER)_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Remove any stale files + rm -rf $(PYTHON_PNAME)-$(PYTHON_VER) + + ## Obtaining the python3 + wget 'https://sonicstorage.blob.core.windows.net/packages/$(PYTHON_PNAME)_$(PYTHON_VER).orig.tar.xz?sv=2015-04-05&sr=b&sig=d42Wh1CA9NZvlskhW4fpWcHVgc7N3IKhdFzyeO2zbRA%3D&se=2027-02-02T01%3A00%3A57Z&sp=r' -O $(PYTHON_PNAME)_$(PYTHON_VER).orig.tar.xz + wget 'https://sonicstorage.blob.core.windows.net/packages/$(PYTHON_PNAME)_$(PYTHON_VER)-$(PYTHON_DEB_VER).debian.tar.xz?sv=2015-04-05&sr=b&sig=KLX9pMJ3zpQvGBo6ZjzoZXgooMJRUUwMx8ZaTJtywK0%3D&se=2027-02-02T00%3A59%3A34Z&sp=r' -O $(PYTHON_PNAME)_$(PYTHON_VER)-$(PYTHON_DEB_VER).debian.tar.xz + wget 'https://sonicstorage.blob.core.windows.net/packages/$(PYTHON_PNAME)_$(PYTHON_VER)-$(PYTHON_DEB_VER).dsc?sv=2015-04-05&sr=b&sig=95s%2FC4vKY6bRKtkUTz%2BmHLqOllBOYbfP3zV5ayAuzSM%3D&se=2027-02-02T01%3A00%3A26Z&sp=r' -O $(PYTHON_PNAME)_$(PYTHON_VER)-$(PYTHON_DEB_VER).dsc + + ## Build + dpkg-source -x $(PYTHON_PNAME)_$(PYTHON_VER)-$(PYTHON_DEB_VER).dsc + pushd $(PYTHON_PNAME)-$(PYTHON_VER) + mk-build-deps + + # put a lock here because dpkg does not allow installing packages in parallel + while true; do + if mkdir $(DEST)/dpkg_lock &> /dev/null; then + { echo here && (sudo dpkg -i $(PYTHON_PNAME)-build-deps_$(PYTHON_VER)-$(PYTHON_DEB_VER)_$(CONFIGURED_ARCH).deb || sudo apt-get install -f) && rm -d $(DEST)/dpkg_lock && break; } || { rm -d $(DEST)/dpkg_lock && exit 1 ; } + fi + done + + dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + cp $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/radvd/Makefile b/src/radvd/Makefile new file mode 100644 index 00000000000..98e62bc216d --- /dev/null +++ b/src/radvd/Makefile @@ -0,0 +1,32 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = radvd_$(RADVD_VERSION)_$(CONFIGURED_ARCH).deb +DERIVED_TARGETS = radvd-dbgsym_$(RADVD_VERSION)_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Remove any stale files + rm -rf ./radvd + + # Clone radvd repo + git clone https://salsa.debian.org/debian/radvd.git + pushd ./radvd + + # Reset HEAD to the commit of the proper tag + # NOTE: Using "git checkout " here detaches our HEAD, + # which stg doesn't like, so we use this method instead + # NOTE 1: For some reason, tags in the Debian radvd repo are prefixed with "1%" + # NOTE 2: "~" in version string is replaced by "_" in branch name + git reset --hard debian/1\%$(subst ~,_,$(RADVD_VERSION)) + + # Apply patches + stg init + stg import -s ../patch/series + + # Build source and Debian packages + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + # Move the newly-built .deb package to the destination directory + mv $(DERIVED_TARGETS) $* $(DEST)/ diff --git a/src/radvd/patch/0001-Don-t-treat-out-of-range-MTU-as-an-error.patch b/src/radvd/patch/0001-Don-t-treat-out-of-range-MTU-as-an-error.patch new file mode 100644 index 00000000000..a9f988fee5d --- /dev/null +++ b/src/radvd/patch/0001-Don-t-treat-out-of-range-MTU-as-an-error.patch @@ -0,0 +1,33 @@ +From 45c15407f11de8b1064b77212727e5234f3ef1e8 Mon Sep 17 00:00:00 2001 +From: Joe LeVeque +Date: Sat, 16 Feb 2019 02:59:10 +0000 +Subject: [PATCH] Don't treat out-of-range MTU as an error + +--- + interface.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +diff --git a/interface.c b/interface.c +index 512f2bd..0dc19f4 100644 +--- a/interface.c ++++ b/interface.c +@@ -200,9 +200,14 @@ int check_iface(struct Interface *iface) + + if ((iface->AdvLinkMTU != 0) && ((iface->AdvLinkMTU < MIN_AdvLinkMTU) || + (iface->sllao.if_maxmtu != -1 && (iface->AdvLinkMTU > iface->sllao.if_maxmtu)))) { +- flog(LOG_ERR, "AdvLinkMTU for %s (%u) must be zero or between %u and %u", iface->props.name, iface->AdvLinkMTU, ++ // FIXME: Temporary workaround for SONiC. Currently, when interfaces are added ++ // or removed from VLANs, the kernel sets the MTU size for the VLAN to the ++ // default value of 1500. Here, we prevent radvd from treating a larger value ++ // in its configuration as an error. Instead of logging an error and setting ++ // res to -1, we simply log a warning and continue on. Once the aforementioned ++ // behavior is addressed, this patch should be removed. ++ flog(LOG_WARNING, "AdvLinkMTU for %s (%u) must be zero or between %u and %u", iface->props.name, iface->AdvLinkMTU, + MIN_AdvLinkMTU, iface->sllao.if_maxmtu); +- res = -1; + } + + if (iface->ra_header_info.AdvReachableTime > MAX_AdvReachableTime) { +-- +2.17.1 + diff --git a/src/radvd/patch/series b/src/radvd/patch/series new file mode 100644 index 00000000000..7a12163dc04 --- /dev/null +++ b/src/radvd/patch/series @@ -0,0 +1,2 @@ +# This series applies on GIT commit 413616c1b6a05f07f07f3ee6af0cf25a3215fe1a +0001-Don-t-treat-out-of-range-MTU-as-an-error.patch diff --git a/src/redis-dump-load b/src/redis-dump-load new file mode 160000 index 00000000000..832a645e4dd --- /dev/null +++ b/src/redis-dump-load @@ -0,0 +1 @@ +Subproject commit 832a645e4ddff0f38ec0d64e3be70f48013287e6 diff --git a/src/redis-dump-load.patch/0001-Use-pipelines-when-dumping-52.patch b/src/redis-dump-load.patch/0001-Use-pipelines-when-dumping-52.patch new file mode 100644 index 00000000000..5eea3faba2c --- /dev/null +++ b/src/redis-dump-load.patch/0001-Use-pipelines-when-dumping-52.patch @@ -0,0 +1,154 @@ +From ed20dced07d8b2d140e2c1d79d506be0e12f339e Mon Sep 17 00:00:00 2001 +From: Oleg Pudeyev +Date: Sat, 28 Jan 2017 15:37:43 -0500 +Subject: [PATCH] Use pipelines when dumping, #52 + +--- + redisdl.py | 102 +++++++++++++++++++++++++++++++++++++++-------------- + 1 file changed, 75 insertions(+), 27 deletions(-) + +diff --git a/redisdl.py b/redisdl.py +index df2870b..1b6063b 100755 +--- a/redisdl.py ++++ b/redisdl.py +@@ -141,18 +141,18 @@ def dumps(host='localhost', port=6379, password=None, db=0, pretty=False, + class BytesWriteWrapper(object): + def __init__(self, stream): + self.stream = stream +- ++ + def write(self, str): + return self.stream.write(str.encode()) + + def dump(fp, host='localhost', port=6379, password=None, db=0, pretty=False, + unix_socket_path=None, encoding='utf-8', keys='*'): +- ++ + try: + fp.write('') + except TypeError: + fp = BytesWriteWrapper(fp) +- ++ + if pretty: + # hack to avoid implementing pretty printing + fp.write(dumps(host=host, port=port, password=password, db=db, +@@ -276,28 +276,76 @@ def _read_key(key, r, pretty, encoding): + return (type, ttl, value) + + def _reader(r, pretty, encoding, keys='*'): +- for encoded_key in r.keys(keys): +- key = encoded_key.decode(encoding) +- handled = False +- for i in range(10): +- try: +- type, ttl, value = _read_key(encoded_key, r, pretty, encoding) +- yield key, type, ttl, value +- handled = True +- break +- except KeyDeletedError: +- # do not dump the key +- handled = True +- break +- except redis.WatchError: +- # same logic as key type changed +- pass +- except KeyTypeChangedError: +- # retry reading type again +- pass +- if not handled: +- # ran out of retries +- raise ConcurrentModificationError('Key %s is being concurrently modified' % key) ++ encoded_keys = r.keys(keys) ++ i = 0 ++ while i < len(encoded_keys): ++ for key, type, ttl, value in _read_keys(r, encoded_keys[i:i+10000], ++ pretty=pretty, encoding=encoding): ++ yield key, type, ttl, value ++ i += 10000 ++ ++def _read_keys(r, encoded_keys, pretty, encoding): ++ decoded_keys = [encoded_key.decode() for encoded_key in encoded_keys] ++ do_keys = decoded_keys ++ retries = 5 ++ type_results = None ++ while len(do_keys) > 0 and retries > 0: ++ next_do_keys = [] ++ next_type_results = [] ++ ++ if type_results is None: ++ # first pass, need to get the types. ++ # on subsequent passes we know the types ++ # because the previous pass retrieved them and ++ # found a type mismatch ++ p = r.pipeline() ++ for key in do_keys: ++ p.type(key) ++ type_results = p.execute() ++ ++ p = r.pipeline() ++ for i in range(len(do_keys)): ++ key = decoded_keys[i] ++ type = type_results[i].decode('ascii') ++ if type == 'none': ++ # key was deleted by a concurrent operation on the data store. ++ # issue noops so that the number of results does not change ++ p.type(key) ++ p.type(key) ++ p.type(key) ++ continue ++ reader = readers.get(type) ++ if reader is None: ++ raise UnknownTypeError("Unknown key type: %s" % type) ++ reader.send_command(p, key) ++ r.pttl_or_ttl_pipeline(p, key) ++ p.type(key) ++ results = p.execute() ++ ++ for i in range(len(do_keys)): ++ key = decoded_keys[i] ++ original_type = type_results[i] ++ if original_type == 'none': ++ # this is where we actually skip a key that was deleted ++ # by concurrent operations ++ continue ++ final_type = results[i*3+2].decode('ascii') ++ if original_type != final_type: ++ # type changed, will retry ++ next_do_keys.append(key) ++ # need to update expected type ++ next_type_results.append(final_type) ++ continue ++ reader = readers.get(original_type) ++ value = reader.handle_response(results[i*3], pretty, encoding) ++ ttl = r.decode_pttl_or_ttl_pipeline_value(results[i*3+1]) ++ yield key, final_type, ttl, value ++ retries -= 1 ++ do_keys = next_do_keys ++ type_results = next_type_results ++ ++ if len(do_keys) > 0: ++ raise ConcurrentModificationError('Keys %s are being concurrently modified' % ', '.join(do_keys)) + + def _empty(r): + for key in r.keys(): +@@ -372,14 +420,14 @@ def ijson_top_level_items(file, local_streaming_backend): + class TextReadWrapper(object): + def __init__(self, fp): + self.fp = fp +- ++ + def read(self, *args, **kwargs): + return self.fp.read(*args, **kwargs).decode() + + class BytesReadWrapper(object): + def __init__(self, fp): + self.fp = fp +- ++ + def read(self, *args, **kwargs): + return self.fp.read(*args, **kwargs).encode('utf-8') + +-- +2.18.0 + diff --git a/src/redis-dump-load.patch/0002-Fix-setup.py-for-test-and-bdist_wheel.patch b/src/redis-dump-load.patch/0002-Fix-setup.py-for-test-and-bdist_wheel.patch new file mode 100644 index 00000000000..5bb319a6173 --- /dev/null +++ b/src/redis-dump-load.patch/0002-Fix-setup.py-for-test-and-bdist_wheel.patch @@ -0,0 +1,26 @@ +From c2c93fa3b702a4f2364383fd4ae69763068686d2 Mon Sep 17 00:00:00 2001 +From: Qi Luo +Date: Tue, 20 Nov 2018 03:21:31 +0000 +Subject: [PATCH] Fix setup.py for test and bdist_wheel + +Signed-off-by: Qi Luo +--- + setup.py | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/setup.py b/setup.py +index 8ccf31f..6457163 100644 +--- a/setup.py ++++ b/setup.py +@@ -1,7 +1,7 @@ + #!/usr/bin/env python + + import os.path +-from distutils.core import setup ++from setuptools import setup, find_packages + + package_name = 'redis-dump-load' + package_version = '1.1' +-- +2.18.0 + diff --git a/src/redis-dump-load.patch/series b/src/redis-dump-load.patch/series new file mode 100644 index 00000000000..c73c3b5caa9 --- /dev/null +++ b/src/redis-dump-load.patch/series @@ -0,0 +1,2 @@ +0001-Use-pipelines-when-dumping-52.patch +0002-Fix-setup.py-for-test-and-bdist_wheel.patch diff --git a/src/redis/Makefile b/src/redis/Makefile new file mode 100644 index 00000000000..e2d9e5828f5 --- /dev/null +++ b/src/redis/Makefile @@ -0,0 +1,31 @@ +SHELL = /bin/bash +.ONESHELL: +.SHELLFLAGS += -e + +REDIS_VERSION = 5.0.3 +REDIS_VERSION_FULL = $(REDIS_VERSION)-3~bpo9+2 + +MAIN_TARGET = redis-server_$(REDIS_VERSION_FULL)_$(CONFIGURED_ARCH).deb +DERIVED_TARGETS = redis-tools_$(REDIS_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + redis-sentinel_$(REDIS_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + redis-tools-dbgsym_$(REDIS_VERSION_FULL)_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + rm -rf redis_build + mkdir redis_build + pushd redis_build + + wget -O redis_$(REDIS_VERSION).orig.tar.gz -N "http://http.debian.net/debian/pool/main/r/redis/redis_$(REDIS_VERSION).orig.tar.gz" + wget -O redis_$(REDIS_VERSION_FULL).dsc -N "http://http.debian.net/debian/pool/main/r/redis/redis_$(REDIS_VERSION_FULL).dsc" + wget -O redis_$(REDIS_VERSION_FULL).debian.tar.xz -N "http://http.debian.net/debian/pool/main/r/redis/redis_$(REDIS_VERSION_FULL).debian.tar.xz" + dpkg-source -x redis_$(REDIS_VERSION_FULL).dsc + + pushd redis-$(REDIS_VERSION) + export ARCH="" + DEB_BUILD_OPTIONS=nocheck dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + popd + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/sflow/hsflowd/Makefile b/src/sflow/hsflowd/Makefile new file mode 100644 index 00000000000..0a8094e3b69 --- /dev/null +++ b/src/sflow/hsflowd/Makefile @@ -0,0 +1,29 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = $(HSFLOWD) +DERIVED_TARGET = $(HSFLOWD_DBG) + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + rm -fr ./host-sflow + git clone https://github.com/sflow/host-sflow + + pushd ./host-sflow + git checkout -b sflow tags/v2.0.26-1 + + # Apply patch series + stg init + stg import -s ../patch/series + + mkdir -p debian + cp -r DEBIAN_build/* debian + chmod u+x debian/rules + sed -i -e s/_VERSION_/$(HSFLOWD_VERSION)-$(HSFLOWD_SUBVERSION)/g debian/changelog + + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --buildinfo-option=-u. --changes-option=-u. + + mv $(DERIVED_TARGET) $* $(DEST)/ + popd + +$(addprefix $(DEST)/, $(DERIVED_TARGET)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/sflow/hsflowd/patch/0001-host_sflow_psample.patch b/src/sflow/hsflowd/patch/0001-host_sflow_psample.patch new file mode 100644 index 00000000000..d0672f80cd5 --- /dev/null +++ b/src/sflow/hsflowd/patch/0001-host_sflow_psample.patch @@ -0,0 +1,39 @@ +diff -ruN a/src/Linux/linux/psample.h b/src/Linux/linux/psample.h +--- a/src/Linux/linux/psample.h 1969-12-31 16:00:00.000000000 -0800 ++++ b/src/Linux/linux/psample.h 2019-07-20 08:45:58.715748881 -0700 +@@ -0,0 +1,35 @@ ++#ifndef __UAPI_PSAMPLE_H ++#define __UAPI_PSAMPLE_H ++ ++enum { ++ /* sampled packet metadata */ ++ PSAMPLE_ATTR_IIFINDEX, ++ PSAMPLE_ATTR_OIFINDEX, ++ PSAMPLE_ATTR_ORIGSIZE, ++ PSAMPLE_ATTR_SAMPLE_GROUP, ++ PSAMPLE_ATTR_GROUP_SEQ, ++ PSAMPLE_ATTR_SAMPLE_RATE, ++ PSAMPLE_ATTR_DATA, ++ ++ /* commands attributes */ ++ PSAMPLE_ATTR_GROUP_REFCOUNT, ++ ++ __PSAMPLE_ATTR_MAX ++}; ++ ++enum psample_command { ++ PSAMPLE_CMD_SAMPLE, ++ PSAMPLE_CMD_GET_GROUP, ++ PSAMPLE_CMD_NEW_GROUP, ++ PSAMPLE_CMD_DEL_GROUP, ++}; ++ ++/* Can be overridden at runtime by module option */ ++#define PSAMPLE_ATTR_MAX (__PSAMPLE_ATTR_MAX - 1) ++ ++#define PSAMPLE_NL_MCGRP_CONFIG_NAME "config" ++#define PSAMPLE_NL_MCGRP_SAMPLE_NAME "packets" ++#define PSAMPLE_GENL_NAME "psample" ++#define PSAMPLE_GENL_VERSION 1 ++ ++#endif diff --git a/src/sflow/hsflowd/patch/0002-host_sflow_debian.patch b/src/sflow/hsflowd/patch/0002-host_sflow_debian.patch new file mode 100644 index 00000000000..86ebab72335 --- /dev/null +++ b/src/sflow/hsflowd/patch/0002-host_sflow_debian.patch @@ -0,0 +1,108 @@ +diff -ruN a/DEBIAN_build/changelog b/DEBIAN_build/changelog +--- a/DEBIAN_build/changelog 1969-12-31 19:00:00.000000000 -0500 ++++ b/DEBIAN_build/changelog 2019-08-19 22:52:10.171736403 -0400 +@@ -0,0 +1,6 @@ ++hsflowd (_VERSION_) stable; urgency=medium ++ ++ [ DellEMC ] ++ * Initial release : hsflowd ++ ++ -- DellEMC Mon, 29 Jul 2019 07:08:02 -0400 +diff -ruN a/DEBIAN_build/compat b/DEBIAN_build/compat +--- a/DEBIAN_build/compat 1969-12-31 19:00:00.000000000 -0500 ++++ b/DEBIAN_build/compat 2019-08-16 23:28:58.020938096 -0400 +@@ -0,0 +1 @@ ++9 +diff -ruN a/DEBIAN_build/control b/DEBIAN_build/control +--- a/DEBIAN_build/control 2019-08-16 05:11:33.974949327 -0400 ++++ b/DEBIAN_build/control 2019-08-19 21:28:07.155722725 -0400 +@@ -1,9 +1,22 @@ +-Package: _PACKAGE_ +-Version: _VERSION_ +-Section: admin ++Source: hsflowd ++Maintainer: Neil McKee [neil.mckee@inmon.com] ++Uploaders: DellEMC ++Section: net ++Priority: optional ++Build-Depends: dh-exec (>=0.3), debhelper (>= 9), autotools-dev ++Standards-Version: 1.0.0 ++ ++Package: hsflowd ++Section: admin + Priority: optional +-Architecture: all ++Architecture: any + Essential: no +-Maintainer: Neil McKee [neil.mckee@inmon.com] + Description: sFlow(R) monitoring agent + Homepage: sflow.net ++ ++Package: hsflowd-dbg ++Architecture: any ++Section: debug ++Priority: extra ++Depends: hsflowd ++Description: debugging symbols for hsflowd +diff -ruN a/DEBIAN_build/rules b/DEBIAN_build/rules +--- a/DEBIAN_build/rules 1969-12-31 19:00:00.000000000 -0500 ++++ b/DEBIAN_build/rules 2019-08-19 22:20:42.998569601 -0400 +@@ -0,0 +1,31 @@ ++#!/usr/bin/make -f ++ ++# See debhelper(7) (uncomment to enable) ++# output every command that modifies files on the build system. ++export DH_VERBOSE = 1 ++ ++# see EXAMPLES in dpkg-buildflags(1) and read /usr/share/dpkg/* ++DPKG_EXPORT_BUILDFLAGS = 1 ++include /usr/share/dpkg/default.mk ++ ++%: ++ dh $@ ++ ++binary: ++ dh_gencontrol ++ dh_strip -phsflowd --dbg-package=hsflowd-dbg ++ dpkg-deb --build debian/hsflowd-dbg hsflowd-dbg_$(HSFLOWD_VERSION)-$(HSFLOWD_SUBVERSION)_$(CONFIGURED_ARCH).deb ++ dpkg-deb --build debian/hsflowd hsflowd_$(HSFLOWD_VERSION)-$(HSFLOWD_SUBVERSION)_$(CONFIGURED_ARCH).deb ++ ++override_dh_auto_build: ++ make sonic-deb FEATURES="SONIC" ++ ++override_dh_auto_configure: ++ ++override_dh_auto_install: ++ ++override_dh_auto_test: ++ ++override_dh_auto_clean: ++ ++override_dh_clean: +diff -ruN a/Makefile b/Makefile +--- a/Makefile 2019-08-16 21:34:25.167679297 -0400 ++++ b/Makefile 2019-08-19 22:20:23.758479002 -0400 +@@ -146,6 +146,23 @@ + cd ..; \ + dpkg-deb --build debian hsflowd_$${MYVER}-$${MYREL}_$$MYARCH.deb + ++sonic-deb: $(PROG) ++ MYARCH=`uname -m|sed 's/x86_64/amd64/'`; \ ++ MYVER=`./getVersion`; \ ++ MYREL=`./getRelease`; \ ++ PLATFORM=`uname`; \ ++ mkdir -p debian/usr/sbin; \ ++ mkdir -p debian/etc/init.d; \ ++ mkdir -p debian/etc/hsflowd/modules; \ ++ mkdir -p debian/lib/systemd/system; \ ++ mkdir -p debian/etc/dbus-1/system.d; \ ++ cd src/$$PLATFORM; $(MAKE) VERSION=$$MYVER RELEASE=$$MYREL INSTROOT="../../debian/hsflowd" install; cd ../..; \ ++ pwd; \ ++ cd debian/hsflowd; \ ++ find . -type d | xargs chmod 755; \ ++ md5sum `find usr etc -type f` > md5sums; \ ++ cd ../..; ++ + xenserver: xenrpm + cd xenserver-ddk; $(MAKE) clean; $(MAKE) + diff --git a/src/sflow/hsflowd/patch/series b/src/sflow/hsflowd/patch/series new file mode 100644 index 00000000000..90f9e47462e --- /dev/null +++ b/src/sflow/hsflowd/patch/series @@ -0,0 +1,2 @@ +0001-host_sflow_psample.patch +0002-host_sflow_debian.patch diff --git a/src/sflow/psample/Makefile b/src/sflow/psample/Makefile new file mode 100644 index 00000000000..3f03c249989 --- /dev/null +++ b/src/sflow/psample/Makefile @@ -0,0 +1,20 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = $(PSAMPLE) + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + + rm -fr ./libpsample + git clone https://github.com/Mellanox/libpsample.git + cp -r debian libpsample + + pushd ./libpsample + git checkout -b libpsample -f e48fad2 + + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + mv $* $(DEST)/ + diff --git a/src/sflow/psample/debian/changelog b/src/sflow/psample/debian/changelog new file mode 100644 index 00000000000..be9af0d6d42 --- /dev/null +++ b/src/sflow/psample/debian/changelog @@ -0,0 +1,6 @@ +psample (1.1-1) UNRELEASED; urgency=medium + + [ DellEMC ] + * Initial release : based on https://github.com/Mellanox/libpsample + + -- DellEMC Mon, 29 Jul 2019 07:08:02 -0400 diff --git a/src/sflow/psample/debian/compat b/src/sflow/psample/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/src/sflow/psample/debian/compat @@ -0,0 +1 @@ +9 diff --git a/src/sflow/psample/debian/control b/src/sflow/psample/debian/control new file mode 100644 index 00000000000..5c65e1e774a --- /dev/null +++ b/src/sflow/psample/debian/control @@ -0,0 +1,11 @@ +Source: psample +Maintainer: DellEMC +Section: devel +Priority: optional +Build-Depends: dh-exec (>=0.3), debhelper (>= 9), autotools-dev +Standards-Version: 1.0.0 + +Package: psample +Architecture: any +Depends: ${shlibs:Depends} +Description: This package contains psample from https://github.com/Mellanox/libpsample diff --git a/src/sflow/psample/debian/psample.install b/src/sflow/psample/debian/psample.install new file mode 100644 index 00000000000..36d4eac1a85 --- /dev/null +++ b/src/sflow/psample/debian/psample.install @@ -0,0 +1,4 @@ +bin/psample usr/bin +lib/libpsample.so.1.0 lib/x86_64-linux-gnu +lib/libpsample.so.1 lib/x86_64-linux-gnu +lib/libpsample.so lib/x86_64-linux-gnu diff --git a/src/sflow/psample/debian/rules b/src/sflow/psample/debian/rules new file mode 100755 index 00000000000..73f484d3258 --- /dev/null +++ b/src/sflow/psample/debian/rules @@ -0,0 +1,19 @@ +#!/usr/bin/make -f + +# main packaging script based on dh7 syntax +%: + dh $@ + +override_dh_auto_build: + cmake . && make + +override_dh_auto_install: + +override_dh_auto_test: + +override_dh_auto_clean: + +override_dh_strip: + +override_dh_clean: + diff --git a/src/sflow/sflowtool/Makefile b/src/sflow/sflowtool/Makefile new file mode 100644 index 00000000000..10a3f2d24de --- /dev/null +++ b/src/sflow/sflowtool/Makefile @@ -0,0 +1,19 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = $(SFLOWTOOL) + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + + rm -fr ./sflowtool + git clone https://github.com/sflow/sflowtool + cp -r debian sflowtool + + pushd ./sflowtool + git checkout -b sflowtool -f 6c2963b + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + mv $* $(DEST)/ + diff --git a/src/sflow/sflowtool/debian/changelog b/src/sflow/sflowtool/debian/changelog new file mode 100644 index 00000000000..df40c7c37de --- /dev/null +++ b/src/sflow/sflowtool/debian/changelog @@ -0,0 +1,6 @@ +sflowtool (5.04) UNRELEASED; urgency=medium + + [ DellEMC ] + * Initial release : based on https://github.com/sflow/sflowtool + + -- DellEMC Mon, 29 Jul 2019 07:08:02 -0400 diff --git a/src/sflow/sflowtool/debian/compat b/src/sflow/sflowtool/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/src/sflow/sflowtool/debian/compat @@ -0,0 +1 @@ +9 diff --git a/src/sflow/sflowtool/debian/control b/src/sflow/sflowtool/debian/control new file mode 100644 index 00000000000..f2d971aee2b --- /dev/null +++ b/src/sflow/sflowtool/debian/control @@ -0,0 +1,11 @@ +Source: sflowtool +Maintainer: DellEMC +Section: devel +Priority: optional +Build-Depends: dh-exec (>=0.3), debhelper (>= 9), autotools-dev +Standards-Version: 1.0.0 + +Package: sflowtool +Architecture: any +Depends: ${shlibs:Depends} +Description: This package contains sflowtool from https://github.com/sflow/sflowtool diff --git a/src/sflow/sflowtool/debian/rules b/src/sflow/sflowtool/debian/rules new file mode 100755 index 00000000000..37ee344a2a4 --- /dev/null +++ b/src/sflow/sflowtool/debian/rules @@ -0,0 +1,19 @@ +#!/usr/bin/make -f + +# main packaging script based on dh7 syntax +%: + dh $@ + +override_dh_auto_build: + ./boot.sh && ./configure && make + +override_dh_auto_install: + +override_dh_auto_test: + +override_dh_auto_clean: + +override_dh_strip: + +override_dh_clean: + diff --git a/src/sflow/sflowtool/debian/sflowtool.install b/src/sflow/sflowtool/debian/sflowtool.install new file mode 100644 index 00000000000..9b32e0709b5 --- /dev/null +++ b/src/sflow/sflowtool/debian/sflowtool.install @@ -0,0 +1 @@ +src/sflowtool usr/bin diff --git a/src/smartmontools/Makefile b/src/smartmontools/Makefile new file mode 100644 index 00000000000..4ac3d6ac315 --- /dev/null +++ b/src/smartmontools/Makefile @@ -0,0 +1,19 @@ +SHELL = /bin/bash +.ONESHELL: +.SHELLFLAGS += -e + + +MAIN_TARGET = smartmontools_$(SMARTMONTOOLS_VERSION_FULL)_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + rm -rf smartmontools-$(SMARTMONTOOLS_VERSION_MAJOR) + wget -O smartmontools_$(SMARTMONTOOLS_VERSION_MAJOR).orig.tar.gz -N "https://sonicstorage.blob.core.windows.net/packages/debian/smartmontools_$(SMARTMONTOOLS_VERSION_MAJOR).orig.tar.gz?sv=2015-04-05&sr=b&sig=JZx4qiLuO36T0rsGqk4V2RDuWjRw6NztsLK7vlBYAkg%3D&se=2046-08-20T23%3A47%3A13Z&sp=r" + wget -O smartmontools_$(SMARTMONTOOLS_VERSION_FULL).dsc -N "https://sonicstorage.blob.core.windows.net/packages/debian/smartmontools_$(SMARTMONTOOLS_VERSION_FULL).dsc?sv=2015-04-05&sr=b&sig=IS7FKUN%2Bvq0T55f4X2hGAViB70Y%2FgzjGgvzpUJLyUfA%3D&se=2046-08-20T23%3A46%3A57Z&sp=r" + wget -O smartmontools_$(SMARTMONTOOLS_VERSION_FULL).debian.tar.xz -N "https://sonicstorage.blob.core.windows.net/packages/debian/smartmontools_$(SMARTMONTOOLS_VERSION_FULL).debian.tar.xz?sv=2015-04-05&sr=b&sig=H0RFeC41MCvhTQCln85DuPLn5v2goozwz%2FB9sA9p5eQ%3D&se=2046-08-20T23%3A46%3A02Z&sp=r" + dpkg-source -x smartmontools_$(SMARTMONTOOLS_VERSION_FULL).dsc + + pushd smartmontools-$(SMARTMONTOOLS_VERSION_MAJOR) + dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + mv $* $(DEST)/ diff --git a/src/snmpd/Makefile b/src/snmpd/Makefile new file mode 100644 index 00000000000..77084594d8b --- /dev/null +++ b/src/snmpd/Makefile @@ -0,0 +1,41 @@ +SHELL = /bin/bash +.ONESHELL: +.SHELLFLAGS += -e + +MAIN_TARGET = libsnmp-base_$(SNMPD_VERSION_FULL)_all.deb +DERIVED_TARGETS = snmptrapd_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + snmp_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + snmpd_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + snmp-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + snmpd-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + libsnmp30_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + libsnmp30-dbg_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + libsnmp-dev_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + libsnmp-perl_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + python-netsnmp_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + tkmib_$(SNMPD_VERSION_FULL)_all.deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + rm -rf net-snmp-$(SNMPD_VERSION) + + # download debian net-snmp + wget -NO net-snmp_$(SNMPD_VERSION_FULL).dsc "https://sonicstorage.blob.core.windows.net/packages/net-snmp_5.7.3+dfsg-1.5.dsc?sv=2015-04-05&sr=b&sig=vDAYAKlwi7JjF%2FesdJUyf4VIEXPsCfLhqqTqNr75zBs%3D&se=2030-10-12T13%3A59%3A45Z&sp=r" + wget -NO net-snmp_$(SNMPD_VERSION).orig.tar.xz "https://sonicstorage.blob.core.windows.net/packages/net-snmp_5.7.3+dfsg.orig.tar.xz?sv=2015-04-05&sr=b&sig=UjIh%2FTcHrIEzEV7a%2BV2ZP4ks3xHlAA3wqyxkyV7Ms8I%3D&se=2030-10-12T13%3A58%3A19Z&sp=r" + wget -NO net-snmp_$(SNMPD_VERSION_FULL).debian.tar.xz "https://sonicstorage.blob.core.windows.net/packages/net-snmp_5.7.3+dfsg-1.5.debian.tar.xz?sv=2015-04-05&sr=b&sig=xJkmxjtKXYcPe4yR%2FuCA0TXUfT40rj4XUMBaiK9CjsA%3D&se=2030-10-12T14%3A00%3A15Z&sp=r" + dpkg-source -x net-snmp_$(SNMPD_VERSION_FULL).dsc + + pushd net-snmp-$(SNMPD_VERSION) + git init + git add -f * + git commit -m "unmodified snmpd source" + + # Apply patches + stg init + stg import -s ../patch-$(SNMPD_VERSION)/series + + fakeroot debian/rules -j$(SONIC_CONFIG_MAKE_JOBS) binary + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/snmpd/patch-5.7.3+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch b/src/snmpd/patch-5.7.3+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch new file mode 100644 index 00000000000..f832d004407 --- /dev/null +++ b/src/snmpd/patch-5.7.3+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch @@ -0,0 +1,40 @@ +From a1edbce39e46b5c8bd5bd7db17fc11fa30e7dd73 Mon Sep 17 00:00:00 2001 +From: pavel-shirshov +Date: Mon, 27 Aug 2018 16:50:16 +0800 +Subject: [PATCH] [SNMP] Stop spamming logs with statfs permission denied log + message #1668 + +--- + agent/mibgroup/hardware/fsys/fsys_mntctl.c | 2 -- + agent/mibgroup/hardware/fsys/fsys_mntent.c | 2 -- + 2 files changed, 4 deletions(-) + +diff --git a/agent/mibgroup/hardware/fsys/fsys_mntctl.c b/agent/mibgroup/hardware/fsys/fsys_mntctl.c +index 9fbb068..adc38d6 100644 +--- a/agent/mibgroup/hardware/fsys/fsys_mntctl.c ++++ b/agent/mibgroup/hardware/fsys/fsys_mntctl.c +@@ -163,8 +163,6 @@ netsnmp_fsys_arch_load( void ) + continue; + + if ( statfs( entry->path, &stat_buf ) < 0 ) { +- snprintf( tmpbuf, sizeof(tmpbuf), "Cannot statfs %s", entry->path ); +- snmp_log_perror( tmpbuf ); + continue; + } + entry->units = stat_buf.f_bsize; +diff --git a/agent/mibgroup/hardware/fsys/fsys_mntent.c b/agent/mibgroup/hardware/fsys/fsys_mntent.c +index 94d23db..5ad5e43 100644 +--- a/agent/mibgroup/hardware/fsys/fsys_mntent.c ++++ b/agent/mibgroup/hardware/fsys/fsys_mntent.c +@@ -238,8 +238,6 @@ netsnmp_fsys_arch_load( void ) + if ( NSFS_STATFS( entry->path, &stat_buf ) < 0 ) + #endif + { +- snprintf( tmpbuf, sizeof(tmpbuf), "Cannot statfs %s", entry->path ); +- snmp_log_perror( tmpbuf ); + continue; + } + entry->units = stat_buf.NSFS_SIZE; +-- +2.7.4 + diff --git a/src/snmpd/patch-5.7.3+dfsg/0002-at.c-properly-check-return-status-from-realloc.-Than.patch b/src/snmpd/patch-5.7.3+dfsg/0002-at.c-properly-check-return-status-from-realloc.-Than.patch new file mode 100644 index 00000000000..ceb0c68352b --- /dev/null +++ b/src/snmpd/patch-5.7.3+dfsg/0002-at.c-properly-check-return-status-from-realloc.-Than.patch @@ -0,0 +1,31 @@ +From e370973f273ffc1b32673bc94c5a46f75a846d82 Mon Sep 17 00:00:00 2001 +From: Niels Baggesen +Date: Wed, 31 Aug 2016 21:43:36 +0200 +Subject: [PATCH] at.c: properly check return status from realloc. Thanks to + Daniel Eiland (bug 2678) + +--- + agent/mibgroup/mibII/at.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/agent/mibgroup/mibII/at.c b/agent/mibgroup/mibII/at.c +index f57ba2a..a73fb8c 100644 +--- a/agent/mibgroup/mibII/at.c ++++ b/agent/mibgroup/mibII/at.c +@@ -638,11 +638,12 @@ ARP_Scan_Init(void) + struct arptab *newtab = (struct arptab *) + realloc(at, (sizeof(struct arptab) * + (arptab_curr_max_size + ARP_CACHE_INCR))); +- if (newtab == at) { ++ if (newtab == NULL) { + snmp_log(LOG_ERR, + "Error allocating more space for arpcache. " + "Cache will continue to be limited to %d entries", + arptab_curr_max_size); ++ newtab = at; + break; + } else { + arptab_curr_max_size += ARP_CACHE_INCR; +-- +2.7.4 + diff --git a/src/snmpd/patch-5.7.3+dfsg/0003-CHANGES-BUG-2743-snmpd-crashes-when-receiving-a-GetN.patch b/src/snmpd/patch-5.7.3+dfsg/0003-CHANGES-BUG-2743-snmpd-crashes-when-receiving-a-GetN.patch new file mode 100644 index 00000000000..cdf9b94be93 --- /dev/null +++ b/src/snmpd/patch-5.7.3+dfsg/0003-CHANGES-BUG-2743-snmpd-crashes-when-receiving-a-GetN.patch @@ -0,0 +1,36 @@ +From 2170e345858738e65d3156a49d3186e4a9288821 Mon Sep 17 00:00:00 2001 +From: Zhenggen Xu +Date: Fri, 12 Oct 2018 17:13:54 -0700 +Subject: [PATCH] Subject: [PATCH] CHANGES: BUG: 2743: snmpd crashes when + receiving a GetNext PDU with multiple Varbinds + +skip out-of-range varbinds when calling next handler +--- + agent/helpers/table.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/agent/helpers/table.c b/agent/helpers/table.c +index 882e84c..b943d6e 100644 +--- a/agent/helpers/table.c ++++ b/agent/helpers/table.c +@@ -406,6 +406,8 @@ table_helper_handler(netsnmp_mib_handler *handler, + if (reqinfo->mode == MODE_GET) + table_helper_cleanup(reqinfo, request, + SNMP_NOSUCHOBJECT); ++ else ++ request->processed = 1; /* skip if next handler called */ + continue; + } + +@@ -483,6 +485,8 @@ table_helper_handler(netsnmp_mib_handler *handler, + #endif /* NETSNMP_NO_WRITE_SUPPORT */ + table_helper_cleanup(reqinfo, request, + SNMP_NOSUCHOBJECT); ++ else ++ request->processed = 1; /* skip if next handler called */ + continue; + } + /* +-- +2.18.0 + diff --git a/src/snmpd/patch-5.7.3+dfsg/0004-Disable-SNMPv1.patch b/src/snmpd/patch-5.7.3+dfsg/0004-Disable-SNMPv1.patch new file mode 100644 index 00000000000..6782a18c775 --- /dev/null +++ b/src/snmpd/patch-5.7.3+dfsg/0004-Disable-SNMPv1.patch @@ -0,0 +1,25 @@ +From db633987abf1ea093cb1785b3cd37adfdb55e4cc Mon Sep 17 00:00:00 2001 +From: Qi Luo +Date: Mon, 15 Oct 2018 22:30:28 +0000 +Subject: [PATCH] Disable SNMPv1 + +Signed-off-by: Qi Luo +--- + debian/rules | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/debian/rules b/debian/rules +index 9eb8d2d..4c3b5b6 100755 +--- a/debian/rules ++++ b/debian/rules +@@ -42,6 +42,7 @@ endif + override_dh_auto_configure: + dh_auto_configure -- --prefix=/usr --sysconfdir=/etc --mandir=/usr/share/man \ + --with-persistent-directory=/var/lib/snmp \ ++ --disable-snmpv1 \ + --enable-ucd-snmp-compatibility \ + --enable-shared --with-cflags="$(CFLAGS) -DNETSNMP_USE_INLINE" \ + --with-ldflags="$(LDFLAGS)" \ +-- +2.18.0 + diff --git a/src/snmpd/patch-5.7.3+dfsg/0005-Port-OpenSSL-1.1.0-with-support-for-1.0.2.patch b/src/snmpd/patch-5.7.3+dfsg/0005-Port-OpenSSL-1.1.0-with-support-for-1.0.2.patch new file mode 100644 index 00000000000..b4a5e4a351d --- /dev/null +++ b/src/snmpd/patch-5.7.3+dfsg/0005-Port-OpenSSL-1.1.0-with-support-for-1.0.2.patch @@ -0,0 +1,184 @@ +From: Andreas Henriksson +Date: Sat, 23 Dec 2017 22:25:41 +0000 +Subject: [PATCH] Port OpenSSL 1.1.0 with support for 1.0.2 + +Initial support for OpenSSL 1.1.0 + +Changes by sebastian@breakpoint.cc: +- added OpenSSL 1.0.2 glue layer for backwarts compatibility +- dropped HAVE_EVP_MD_CTX_CREATE + DESTROY and added a check for OpenSSL + version instead (and currently 1.0.2 is the only one supported). + +BTS: https://bugs.debian.org/828449 +Signed-off-by: Sebastian Andrzej Siewior +--- + apps/snmpusm.c | 43 ++++++++++++++++++++++++++++++++++++------- + configure.d/config_os_libs2 | 6 ------ + snmplib/keytools.c | 13 ++++++------- + snmplib/scapi.c | 17 +++++------------ + 4 files changed, 47 insertions(+), 32 deletions(-) + +--- a/apps/snmpusm.c ++++ b/apps/snmpusm.c +@@ -183,6 +183,31 @@ setup_oid(oid * it, size_t * len, u_char + } + + #if defined(HAVE_OPENSSL_DH_H) && defined(HAVE_LIBCRYPTO) ++ ++#if (OPENSSL_VERSION_NUMBER < 0x10100000L) || defined(LIBRESSL_VERSION_NUMBER) ++ ++static void DH_get0_pqg(const DH *dh, ++ const BIGNUM **p, const BIGNUM **q, const BIGNUM **g) ++{ ++ if (p != NULL) ++ *p = dh->p; ++ if (q != NULL) ++ *q = dh->q; ++ if (g != NULL) ++ *g = dh->g; ++} ++ ++static void DH_get0_key(const DH *dh, const BIGNUM **pub_key, ++ const BIGNUM **priv_key) ++{ ++ if (pub_key != NULL) ++ *pub_key = dh->pub_key; ++ if (priv_key != NULL) ++ *priv_key = dh->priv_key; ++} ++ ++#endif ++ + int + get_USM_DH_key(netsnmp_variable_list *vars, netsnmp_variable_list *dhvar, + size_t outkey_len, +@@ -190,7 +215,7 @@ get_USM_DH_key(netsnmp_variable_list *va + oid *keyoid, size_t keyoid_len) { + u_char *dhkeychange; + DH *dh; +- BIGNUM *other_pub; ++ const BIGNUM *p, *g, *pub_key, *other_pub; + u_char *key; + size_t key_len; + +@@ -205,25 +230,29 @@ get_USM_DH_key(netsnmp_variable_list *va + dh = d2i_DHparams(NULL, &cp, dhvar->val_len); + } + +- if (!dh || !dh->g || !dh->p) { ++ if (dh) ++ DH_get0_pqg(dh, &p, NULL, &g); ++ ++ if (!dh || !g || !p) { + SNMP_FREE(dhkeychange); + return SNMPERR_GENERR; + } + +- DH_generate_key(dh); +- if (!dh->pub_key) { ++ if (!DH_generate_key(dh)) { + SNMP_FREE(dhkeychange); + return SNMPERR_GENERR; + } + +- if (vars->val_len != (unsigned int)BN_num_bytes(dh->pub_key)) { ++ DH_get0_key(dh, &pub_key, NULL); ++ ++ if (vars->val_len != (unsigned int)BN_num_bytes(pub_key)) { + SNMP_FREE(dhkeychange); + fprintf(stderr,"incorrect diffie-helman lengths (%lu != %d)\n", +- (unsigned long)vars->val_len, BN_num_bytes(dh->pub_key)); ++ (unsigned long)vars->val_len, BN_num_bytes(pub_key)); + return SNMPERR_GENERR; + } + +- BN_bn2bin(dh->pub_key, dhkeychange + vars->val_len); ++ BN_bn2bin(pub_key, dhkeychange + vars->val_len); + + key_len = DH_size(dh); + if (!key_len) { +--- a/configure.d/config_os_libs2 ++++ b/configure.d/config_os_libs2 +@@ -291,12 +291,6 @@ if test "x$tryopenssl" != "xno" -a "x$tr + AC_CHECK_LIB(${CRYPTO}, AES_cfb128_encrypt, + AC_DEFINE(HAVE_AES_CFB128_ENCRYPT, 1, + [Define to 1 if you have the `AES_cfb128_encrypt' function.])) +- +- AC_CHECK_LIB(${CRYPTO}, EVP_MD_CTX_create, +- AC_DEFINE([HAVE_EVP_MD_CTX_CREATE], [], +- [Define to 1 if you have the `EVP_MD_CTX_create' function.]) +- AC_DEFINE([HAVE_EVP_MD_CTX_DESTROY], [], +- [Define to 1 if you have the `EVP_MD_CTX_destroy' function.])) + fi + if echo " $transport_result_list " | $GREP "DTLS" > /dev/null; then + AC_CHECK_LIB(ssl, DTLSv1_method, +--- a/snmplib/keytools.c ++++ b/snmplib/keytools.c +@@ -149,13 +149,13 @@ generate_Ku(const oid * hashtype, u_int + */ + #ifdef NETSNMP_USE_OPENSSL + +-#ifdef HAVE_EVP_MD_CTX_CREATE ++#if (OPENSSL_VERSION_NUMBER < 0x10100000L) || defined(LIBRESSL_VERSION_NUMBER) + ctx = EVP_MD_CTX_create(); + #else +- ctx = malloc(sizeof(*ctx)); +- if (!EVP_MD_CTX_init(ctx)) +- return SNMPERR_GENERR; ++ ctx = EVP_MD_CTX_new(); + #endif ++ if (!ctx) ++ return SNMPERR_GENERR; + #ifndef NETSNMP_DISABLE_MD5 + if (ISTRANSFORM(hashtype, HMACMD5Auth)) { + if (!EVP_DigestInit(ctx, EVP_md5())) +@@ -259,11 +259,10 @@ generate_Ku(const oid * hashtype, u_int + memset(buf, 0, sizeof(buf)); + #ifdef NETSNMP_USE_OPENSSL + if (ctx) { +-#ifdef HAVE_EVP_MD_CTX_DESTROY ++#if (OPENSSL_VERSION_NUMBER < 0x10100000L) || defined(LIBRESSL_VERSION_NUMBER) + EVP_MD_CTX_destroy(ctx); + #else +- EVP_MD_CTX_cleanup(ctx); +- free(ctx); ++ EVP_MD_CTX_free(ctx); + #endif + } + #endif +--- a/snmplib/scapi.c ++++ b/snmplib/scapi.c +@@ -486,15 +486,10 @@ sc_hash(const oid * hashtype, size_t has + } + + /** initialize the pointer */ +-#ifdef HAVE_EVP_MD_CTX_CREATE ++#if (OPENSSL_VERSION_NUMBER < 0x10100000L) || defined(LIBRESSL_VERSION_NUMBER) + cptr = EVP_MD_CTX_create(); + #else +- cptr = malloc(sizeof(*cptr)); +-#if defined(OLD_DES) +- memset(cptr, 0, sizeof(*cptr)); +-#else +- EVP_MD_CTX_init(cptr); +-#endif ++ cptr = EVP_MD_CTX_new(); + #endif + if (!EVP_DigestInit(cptr, hashfn)) { + /* requested hash function is not available */ +@@ -507,13 +502,11 @@ sc_hash(const oid * hashtype, size_t has + /** do the final pass */ + EVP_DigestFinal(cptr, MAC, &tmp_len); + *MAC_len = tmp_len; +-#ifdef HAVE_EVP_MD_CTX_DESTROY ++ ++#if (OPENSSL_VERSION_NUMBER < 0x10100000L) || defined(LIBRESSL_VERSION_NUMBER) + EVP_MD_CTX_destroy(cptr); + #else +-#if !defined(OLD_DES) +- EVP_MD_CTX_cleanup(cptr); +-#endif +- free(cptr); ++ EVP_MD_CTX_free(cptr); + #endif + return (rval); diff --git a/src/snmpd/patch-5.7.3+dfsg/0006-From-Jiri-Cervenka-snmpd-Fixed-agentx-crashing-and-or-freezing-on-timeout.patch b/src/snmpd/patch-5.7.3+dfsg/0006-From-Jiri-Cervenka-snmpd-Fixed-agentx-crashing-and-or-freezing-on-timeout.patch new file mode 100644 index 00000000000..d11a9d6d75e --- /dev/null +++ b/src/snmpd/patch-5.7.3+dfsg/0006-From-Jiri-Cervenka-snmpd-Fixed-agentx-crashing-and-or-freezing-on-timeout.patch @@ -0,0 +1,211 @@ +From a5782d0673044ad0c621daed7975f53238bb038e Mon Sep 17 00:00:00 2001 +From: Renuka Manavalan +Date: Tue, 10 Sep 2019 17:51:45 +0000 +Subject: [PATCH] Patch from SourceForge: net-snmp commit #793d59 Avoids snmpd + crash when sub agent timesout. + +--- + agent/mibgroup/agentx/master_admin.c | 1 + + agent/snmp_agent.c | 81 ++++++++++++++++++---------- + include/net-snmp/agent/snmp_agent.h | 5 ++ + 3 files changed, 60 insertions(+), 27 deletions(-) + +diff --git a/agent/mibgroup/agentx/master_admin.c b/agent/mibgroup/agentx/master_admin.c +index 4dc1aa7..8c1d194 100644 +--- a/agent/mibgroup/agentx/master_admin.c ++++ b/agent/mibgroup/agentx/master_admin.c +@@ -158,6 +158,7 @@ close_agentx_session(netsnmp_session * session, int sessid) + for (sp = session->subsession; sp != NULL; sp = sp->next) { + + if (sp->sessid == sessid) { ++ netsnmp_remove_delegated_requests_for_session(sp); + unregister_mibs_by_session(sp); + unregister_index_by_session(sp); + unregister_sysORTable_by_session(sp); +diff --git a/agent/snmp_agent.c b/agent/snmp_agent.c +index b96d650..7cacd1a 100644 +--- a/agent/snmp_agent.c ++++ b/agent/snmp_agent.c +@@ -1409,6 +1409,7 @@ init_agent_snmp_session(netsnmp_session * session, netsnmp_pdu *pdu) + asp->treecache_num = -1; + asp->treecache_len = 0; + asp->reqinfo = SNMP_MALLOC_TYPEDEF(netsnmp_agent_request_info); ++ asp->flags = SNMP_AGENT_FLAGS_NONE; + DEBUGMSGTL(("verbose:asp", "asp %p reqinfo %p created\n", + asp, asp->reqinfo)); + +@@ -1457,6 +1458,9 @@ netsnmp_check_for_delegated(netsnmp_agent_session *asp) + + if (NULL == asp->treecache) + return 0; ++ ++ if (asp->flags & SNMP_AGENT_FLAGS_CANCEL_IN_PROGRESS) ++ return 0; + + for (i = 0; i <= asp->treecache_num; i++) { + for (request = asp->treecache[i].requests_begin; request; +@@ -1535,39 +1539,48 @@ int + netsnmp_remove_delegated_requests_for_session(netsnmp_session *sess) + { + netsnmp_agent_session *asp; +- int count = 0; ++ int total_count = 0; + + for (asp = agent_delegated_list; asp; asp = asp->next) { + /* + * check each request + */ ++ int i; ++ int count = 0; + netsnmp_request_info *request; +- for(request = asp->requests; request; request = request->next) { +- /* +- * check session +- */ +- netsnmp_assert(NULL!=request->subtree); +- if(request->subtree->session != sess) +- continue; ++ for (i = 0; i <= asp->treecache_num; i++) { ++ for (request = asp->treecache[i].requests_begin; request; ++ request = request->next) { ++ /* ++ * check session ++ */ ++ netsnmp_assert(NULL!=request->subtree); ++ if(request->subtree->session != sess) ++ continue; + +- /* +- * matched! mark request as done +- */ +- netsnmp_request_set_error(request, SNMP_ERR_GENERR); +- ++count; ++ /* ++ * matched! mark request as done ++ */ ++ netsnmp_request_set_error(request, SNMP_ERR_GENERR); ++ ++count; ++ } ++ } ++ if (count) { ++ asp->flags |= SNMP_AGENT_FLAGS_CANCEL_IN_PROGRESS; ++ total_count += count; + } + } + + /* + * if we found any, that request may be finished now + */ +- if(count) { ++ if(total_count) { + DEBUGMSGTL(("snmp_agent", "removed %d delegated request(s) for session " +- "%8p\n", count, sess)); +- netsnmp_check_outstanding_agent_requests(); ++ "%8p\n", total_count, sess)); ++ netsnmp_check_delegated_requests(); + } + +- return count; ++ return total_count; + } + + int +@@ -2739,19 +2752,11 @@ handle_var_requests(netsnmp_agent_session *asp) + return final_status; + } + +-/* +- * loop through our sessions known delegated sessions and check to see +- * if they've completed yet. If there are no more delegated sessions, +- * check for and process any queued requests +- */ + void +-netsnmp_check_outstanding_agent_requests(void) ++netsnmp_check_delegated_requests(void) + { + netsnmp_agent_session *asp, *prev_asp = NULL, *next_asp = NULL; + +- /* +- * deal with delegated requests +- */ + for (asp = agent_delegated_list; asp; asp = next_asp) { + next_asp = asp->next; /* save in case we clean up asp */ + if (!netsnmp_check_for_delegated(asp)) { +@@ -2790,6 +2795,23 @@ netsnmp_check_outstanding_agent_requests(void) + prev_asp = asp; + } + } ++} ++ ++ ++/* ++ * loop through our sessions known delegated sessions and check to see ++ * if they've completed yet. If there are no more delegated sessions, ++ * check for and process any queued requests ++ */ ++void ++netsnmp_check_outstanding_agent_requests(void) ++{ ++ netsnmp_agent_session *asp; ++ ++ /* ++ * deal with delegated requests ++ */ ++ netsnmp_check_delegated_requests(); + + /* + * if we are processing a set and there are more delegated +@@ -2819,7 +2841,8 @@ netsnmp_check_outstanding_agent_requests(void) + + netsnmp_processing_set = netsnmp_agent_queued_list; + DEBUGMSGTL(("snmp_agent", "SET request remains queued while " +- "delegated requests finish, asp = %8p\n", asp)); ++ "delegated requests finish, asp = %8p\n", ++ agent_delegated_list)); + break; + } + #endif /* NETSNMP_NO_WRITE_SUPPORT */ +@@ -2880,6 +2903,10 @@ check_delayed_request(netsnmp_agent_session *asp) + case SNMP_MSG_GETBULK: + case SNMP_MSG_GETNEXT: + netsnmp_check_all_requests_status(asp, 0); ++ if (asp->flags & SNMP_AGENT_FLAGS_CANCEL_IN_PROGRESS) { ++ DEBUGMSGTL(("snmp_agent","canceling next walk for asp %p\n", asp)); ++ break; ++ } + handle_getnext_loop(asp); + if (netsnmp_check_for_delegated(asp) && + netsnmp_check_transaction_id(asp->pdu->transid) != +diff --git a/include/net-snmp/agent/snmp_agent.h b/include/net-snmp/agent/snmp_agent.h +index aad8837..43f4fff 100644 +--- a/include/net-snmp/agent/snmp_agent.h ++++ b/include/net-snmp/agent/snmp_agent.h +@@ -32,6 +32,9 @@ extern "C" { + #define SNMP_MAX_PDU_SIZE 64000 /* local constraint on PDU size sent by agent + * (see also SNMP_MAX_MSG_SIZE in snmp_api.h) */ + ++#define SNMP_AGENT_FLAGS_NONE 0x0 ++#define SNMP_AGENT_FLAGS_CANCEL_IN_PROGRESS 0x1 ++ + /* + * If non-zero, causes the addresses of peers to be logged when receptions + * occur. +@@ -205,6 +208,7 @@ extern "C" { + int treecache_num; /* number of current cache entries */ + netsnmp_cachemap *cache_store; + int vbcount; ++ int flags; + } netsnmp_agent_session; + + /* +@@ -240,6 +244,7 @@ extern "C" { + int init_master_agent(void); + void shutdown_master_agent(void); + int agent_check_and_process(int block); ++ void netsnmp_check_delegated_requests(void); + void netsnmp_check_outstanding_agent_requests(void); + + int netsnmp_request_set_error(netsnmp_request_info *request, +-- +2.17.1 + diff --git a/src/snmpd/patch-5.7.3+dfsg/0007-Linux-VRF-5.7.3-Support.patch b/src/snmpd/patch-5.7.3+dfsg/0007-Linux-VRF-5.7.3-Support.patch new file mode 100755 index 00000000000..48d13d7f62d --- /dev/null +++ b/src/snmpd/patch-5.7.3+dfsg/0007-Linux-VRF-5.7.3-Support.patch @@ -0,0 +1,799 @@ +From 49ce7fc078dfa8c1a1688e05de4e2d151dbcd76a Mon Sep 17 00:00:00 2001 +From: Harish Venkatraman +Date: Wed, 17 Oct 2018 15:22:04 -0700 +Subject: [PATCH] Linux-VRF 5.7.3 Support from https://sourceforge.net/p/net-snmp/patches/1376/ + +Sourceforge commits related to this consolidated patch are given below. +https://sourceforge.net/p/net-snmp/code/ci/0b637fea62c7b6dc467b94206d0bd2dec6f912ca/ +https://sourceforge.net/p/net-snmp/code/ci/19ba7b0a6b56d201a8563fe6505cd82e313c1c9c/ +https://sourceforge.net/p/net-snmp/code/ci/76336fb63bb74b4dede5dda5c14fb8cf2d60be8e/ +https://sourceforge.net/p/net-snmp/code/ci/c7398de4122102b3250e6dac7c09dbc5d09f1840/ +https://sourceforge.net/p/net-snmp/code/ci/0831ed64a39a34dc040eabe39d0229b07fa2a8a5/ +https://sourceforge.net/p/net-snmp/code/ci/62f6babcc7cfc54c79b442b8a7f45662b4ddc807/ +https://sourceforge.net/p/net-snmp/code/ci/313949522c4d0ddfeac72195fa63512955d9eb28/ + + +This consolidated patch adds native support for VRFs to snmpd. NCLU patches in this same +CCR will be added shortly. The VRF is specified for both listening +addresses as well as TRAP sinks with the 'ipaddr%iface' syntax: + +agentAddress 10.0.1.7%mgmt,22.22.22.22%red +trapsink 10.0.1.9%mgmt +trap2sink 22.22.22.25%red + +The SO_BINDTODEVICE socket option is used to bind a VRF to a particular +socket. + +Testing done included VRFs as well as non-VRF functionality with traps +(v1, v2, and v3) + +--- + agent/agent_trap.c | 20 ++++++++++-- + agent/mibgroup/agentx/master.c | 2 +- + agent/mibgroup/agentx/subagent.c | 2 +- + agent/mibgroup/target/target.c | 3 +- + agent/snmp_agent.c | 21 ++++++++++++- + apps/agentxtrap.c | 2 +- + apps/snmptrap.c | 2 +- + apps/snmptrapd.c | 2 +- + include/net-snmp/library/snmpTCPDomain.h | 2 +- + include/net-snmp/library/snmpUDPBaseDomain.h | 2 +- + include/net-snmp/library/snmpUDPDomain.h | 2 +- + include/net-snmp/library/snmpUDPIPv4BaseDomain.h | 2 +- + include/net-snmp/library/snmpUDPIPv6Domain.h | 2 +- + include/net-snmp/library/snmp_transport.h | 19 +++++++----- + snmplib/snmp_api.c | 4 +-- + snmplib/snmp_transport.c | 26 ++++++++-------- + snmplib/transports/snmpAliasDomain.c | 6 ++-- + snmplib/transports/snmpTCPDomain.c | 16 +++++++--- + snmplib/transports/snmpUDPBaseDomain.c | 39 ++++++++++++++++++------ + snmplib/transports/snmpUDPDomain.c | 15 ++++----- + snmplib/transports/snmpUDPIPv4BaseDomain.c | 4 +-- + snmplib/transports/snmpUDPIPv6Domain.c | 19 ++++----- + snmplib/transports/snmpUnixDomain.c | 5 +-- + 23 files changed, 141 insertions(+), 76 deletions(-) + +diff --git a/agent/agent_trap.c b/agent/agent_trap.c +index 080b8bf..c488ac9 100644 +--- a/agent/agent_trap.c ++++ b/agent/agent_trap.c +@@ -226,6 +226,7 @@ create_trap_session2(const char *sink, const char* sinkport, + { + netsnmp_transport *t; + netsnmp_session session, *sesp; ++ char *iface; + + memset(&session, 0, sizeof(netsnmp_session)); + session.version = version; +@@ -250,7 +251,14 @@ create_trap_session2(const char *sink, const char* sinkport, + ((0 == strcmp("localhost",sink)) || (0 == strcmp("127.0.0.1",sink)))) + session.localname = strdup("localhost"); + +- t = netsnmp_tdomain_transport_full("snmptrap", sink, 0, NULL, sinkport); ++ /* ++ * if given an iface (ip%iface) in sink, send the iface too ++ */ ++ iface = strchr(sink, '%'); ++ if (iface) ++ *iface++ = '\0'; ++ ++ t = netsnmp_tdomain_transport_full("snmptrap", sink, 0, NULL, sinkport, iface); + if (t != NULL) { + sesp = snmp_add(&session, t, NULL, NULL); + +@@ -1219,6 +1227,7 @@ snmpd_parse_config_trapsess(const char *word, char *cptr) + netsnmp_session session, *ss; + netsnmp_transport *transport; + size_t len; ++ char *iface; + + /* + * inform or trap? default to trap +@@ -1240,7 +1249,14 @@ snmpd_parse_config_trapsess(const char *word, char *cptr) + NETSNMP_PARSE_ARGS_NOLOGGING | + NETSNMP_PARSE_ARGS_NOZERO); + +- transport = netsnmp_transport_open_client("snmptrap", session.peername); ++ /* ++ * if iface is given in peer, we will need to bind to that iface ++ */ ++ iface = strchr(session.peername, '%'); ++ if (iface) ++ *iface++ = '\0'; ++ ++ transport = netsnmp_transport_open_client("snmptrap", session.peername, iface); + if (transport == NULL) { + config_perror("snmpd: failed to parse this line."); + return; +diff --git a/agent/mibgroup/agentx/master.c b/agent/mibgroup/agentx/master.c +index baeebaf..6733e7f 100644 +--- a/agent/mibgroup/agentx/master.c ++++ b/agent/mibgroup/agentx/master.c +@@ -126,7 +126,7 @@ real_init_master(void) + sess.remote_port = 0; + sess.callback = handle_master_agentx_packet; + errno = 0; +- t = netsnmp_transport_open_server("agentx", sess.peername); ++ t = netsnmp_transport_open_server("agentx", sess.peername, NULL); + if (t == NULL) { + /* + * diagnose snmp_open errors with the input netsnmp_session +diff --git a/agent/mibgroup/agentx/subagent.c b/agent/mibgroup/agentx/subagent.c +index 1f9d31c..6d38a34 100644 +--- a/agent/mibgroup/agentx/subagent.c ++++ b/agent/mibgroup/agentx/subagent.c +@@ -843,7 +843,7 @@ subagent_open_master_session(void) + + agentx_socket = netsnmp_ds_get_string(NETSNMP_DS_APPLICATION_ID, + NETSNMP_DS_AGENT_X_SOCKET); +- t = netsnmp_transport_open_client("agentx", agentx_socket); ++ t = netsnmp_transport_open_client("agentx", agentx_socket, NULL); + if (t == NULL) { + /* + * Diagnose snmp_open errors with the input +diff --git a/agent/mibgroup/target/target.c b/agent/mibgroup/target/target.c +index 5619e35..6f58817 100644 +--- a/agent/mibgroup/target/target.c ++++ b/agent/mibgroup/target/target.c +@@ -154,7 +154,8 @@ get_target_sessions(char *taglist, TargetFilterFunction * filterfunct, + tAddress, + targaddrs-> + tAddressLen, +- 0); ++ 0, ++ NULL); + if (t == NULL) { + DEBUGMSGTL(("target_sessions", + "bad dest \"")); +diff --git a/agent/snmp_agent.c b/agent/snmp_agent.c +index b96d650..281e8b2 100644 +--- a/agent/snmp_agent.c ++++ b/agent/snmp_agent.c +@@ -1270,6 +1270,7 @@ init_master_agent(void) + char *cptr; + char *buf = NULL; + char *st; ++ char *iface; + + /* default to a default cache size */ + netsnmp_set_lookup_cache_size(-1); +@@ -1318,6 +1319,9 @@ init_master_agent(void) + * AAL5PVC:itf.vpi.vci (if supported) + * IPX:[network]:node[/port] (if supported) + * ++ * ++ * New format to specify an interface for binding along with IP address ++ * address%iface + */ + + cptr = st; +@@ -1334,7 +1338,22 @@ init_master_agent(void) + "requested\n")); + break; + } +- transport = netsnmp_transport_open_server("snmp", cptr); ++ ++ /* ++ * at some point, we may want to add the special listendevice ++ * keyword support. Not sure how to interact with ip%iface ++ iface = netsnmp_ds_get_string(NETSNMP_DS_APPLICATION_ID, ++ NETSNMP_DS_AGENT_LISTEN_DEVICE); ++ */ ++ ++ /* Look for %iface so we can send along a specific interface to ++ setsockopt SO_BINDTODEVICE later. */ ++ iface = strchr(cptr, '%'); ++ if (iface) ++ *iface++ = '\0'; ++ ++ transport = netsnmp_transport_open_server("snmp", cptr, iface); ++ + + if (transport == NULL) { + snmp_log(LOG_ERR, "Error opening specified endpoint \"%s\"\n", +diff --git a/apps/agentxtrap.c b/apps/agentxtrap.c +index 4df423c..ebd81a3 100644 +--- a/apps/agentxtrap.c ++++ b/apps/agentxtrap.c +@@ -231,7 +231,7 @@ ConnectingEntry(UNUSED tState self) + + if(!(t = netsnmp_transport_open_client( + "agentx", netsnmp_ds_get_string( +- NETSNMP_DS_APPLICATION_ID, NETSNMP_DS_AGENT_X_SOCKET)))) { ++ NETSNMP_DS_APPLICATION_ID, NETSNMP_DS_AGENT_X_SOCKET), NULL))) { + snmp_log(LOG_ERR, "Failed to connect to AgentX server\n"); + change_state(&Exit); + } else if(!(sess = snmp_sess_add_ex( +diff --git a/apps/snmptrap.c b/apps/snmptrap.c +index 7c086db..28d5257 100644 +--- a/apps/snmptrap.c ++++ b/apps/snmptrap.c +@@ -215,7 +215,7 @@ main(int argc, char *argv[]) + } + + ss = snmp_add(&session, +- netsnmp_transport_open_client("snmptrap", session.peername), ++ netsnmp_transport_open_client("snmptrap", session.peername, NULL), + NULL, NULL); + if (ss == NULL) { + /* +diff --git a/apps/snmptrapd.c b/apps/snmptrapd.c +index bce0d47..122a502 100644 +--- a/apps/snmptrapd.c ++++ b/apps/snmptrapd.c +@@ -1186,7 +1186,7 @@ main(int argc, char *argv[]) + *sep = 0; + } + +- transport = netsnmp_transport_open_server("snmptrap", cp); ++ transport = netsnmp_transport_open_server("snmptrap", cp, NULL); + if (transport == NULL) { + snmp_log(LOG_ERR, "couldn't open %s -- errno %d (\"%s\")\n", + cp, errno, strerror(errno)); +diff --git a/include/net-snmp/library/snmpTCPDomain.h b/include/net-snmp/library/snmpTCPDomain.h +index c45856b..3b1fef5 100644 +--- a/include/net-snmp/library/snmpTCPDomain.h ++++ b/include/net-snmp/library/snmpTCPDomain.h +@@ -25,7 +25,7 @@ extern "C" { + #define TRANSPORT_DOMAIN_TCP_IP 1,3,6,1,2,1,100,1,5 + NETSNMP_IMPORT oid netsnmp_snmpTCPDomain[]; + +-netsnmp_transport *netsnmp_tcp_transport(struct sockaddr_in *addr, int local); ++netsnmp_transport *netsnmp_tcp_transport(struct sockaddr_in *addr, int local, char *iface); + + /* + * "Constructor" for transport domain object. +diff --git a/include/net-snmp/library/snmpUDPBaseDomain.h b/include/net-snmp/library/snmpUDPBaseDomain.h +index b9d2c34..0ab2fe5 100644 +--- a/include/net-snmp/library/snmpUDPBaseDomain.h ++++ b/include/net-snmp/library/snmpUDPBaseDomain.h +@@ -18,7 +18,7 @@ extern "C" { + /* + * Prototypes + */ +- void _netsnmp_udp_sockopt_set(int fd, int local); ++ void _netsnmp_udp_sockopt_set(int fd, int local, char *iface); + int netsnmp_udpbase_recv(netsnmp_transport *t, void *buf, int size, + void **opaque, int *olength); + int netsnmp_udpbase_send(netsnmp_transport *t, void *buf, int size, +diff --git a/include/net-snmp/library/snmpUDPDomain.h b/include/net-snmp/library/snmpUDPDomain.h +index 3a09dfd..e402cd8 100644 +--- a/include/net-snmp/library/snmpUDPDomain.h ++++ b/include/net-snmp/library/snmpUDPDomain.h +@@ -18,7 +18,7 @@ extern "C" { + config_require(UDPIPv4Base) + #include + +-netsnmp_transport *netsnmp_udp_transport(struct sockaddr_in *addr, int local); ++netsnmp_transport *netsnmp_udp_transport(struct sockaddr_in *addr, int local, char*iface); + + + /* +diff --git a/include/net-snmp/library/snmpUDPIPv4BaseDomain.h b/include/net-snmp/library/snmpUDPIPv4BaseDomain.h +index 6f7f2c2..8d3e906 100644 +--- a/include/net-snmp/library/snmpUDPIPv4BaseDomain.h ++++ b/include/net-snmp/library/snmpUDPIPv4BaseDomain.h +@@ -25,7 +25,7 @@ extern "C" { + */ + + netsnmp_transport *netsnmp_udpipv4base_transport(struct sockaddr_in *addr, +- int local); ++ int local, char *iface); + + #if defined(HAVE_IP_PKTINFO) || defined(HAVE_IP_RECVDSTADDR) + int netsnmp_udpipv4_recvfrom(int s, void *buf, int len, +diff --git a/include/net-snmp/library/snmpUDPIPv6Domain.h b/include/net-snmp/library/snmpUDPIPv6Domain.h +index 83eba2c..009c510 100644 +--- a/include/net-snmp/library/snmpUDPIPv6Domain.h ++++ b/include/net-snmp/library/snmpUDPIPv6Domain.h +@@ -23,7 +23,7 @@ config_require(UDPBase) + NETSNMP_IMPORT oid netsnmp_UDPIPv6Domain[]; + + netsnmp_transport *netsnmp_udp6_transport(struct sockaddr_in6 *addr, +- int local); ++ int local, char *iface); + + + /* +diff --git a/include/net-snmp/library/snmp_transport.h b/include/net-snmp/library/snmp_transport.h +index 4162897..a3deda7 100644 +--- a/include/net-snmp/library/snmp_transport.h ++++ b/include/net-snmp/library/snmp_transport.h +@@ -206,14 +206,14 @@ typedef struct netsnmp_tdomain_s { + * The f_create_from_tstring field is deprecated, please do not use it + * for new code and try to migrate old code away from using it. + */ +- netsnmp_transport *(*f_create_from_tstring) (const char *, int); ++ netsnmp_transport *(*f_create_from_tstring) (const char *, int, char *); + +- netsnmp_transport *(*f_create_from_ostring) (const u_char *, size_t, int); ++ netsnmp_transport *(*f_create_from_ostring) (const u_char *, size_t, int, char *); + + struct netsnmp_tdomain_s *next; + + netsnmp_transport *(*f_create_from_tstring_new) (const char *, int, +- const char*); ++ const char*, char *); + + } netsnmp_tdomain; + +@@ -273,29 +273,32 @@ void netsnmp_tdomain_init(void); + NETSNMP_IMPORT + netsnmp_transport *netsnmp_tdomain_transport(const char *str, + int local, +- const char *default_domain); ++ const char *default_domain, ++ char *iface); + + NETSNMP_IMPORT + netsnmp_transport *netsnmp_tdomain_transport_full(const char *application, + const char *str, + int local, + const char *default_domain, +- const char *default_target); ++ const char *default_target, ++ char *iface); + + NETSNMP_IMPORT + netsnmp_transport *netsnmp_tdomain_transport_oid(const oid * dom, + size_t dom_len, + const u_char * o, + size_t o_len, +- int local); ++ int local, ++ char *iface); + + NETSNMP_IMPORT + netsnmp_transport* +-netsnmp_transport_open_client(const char* application, const char* str); ++netsnmp_transport_open_client(const char* application, const char* str, char *iface); + + NETSNMP_IMPORT + netsnmp_transport* +-netsnmp_transport_open_server(const char* application, const char* str); ++netsnmp_transport_open_server(const char* application, const char* str, char *iface); + + netsnmp_transport* + netsnmp_transport_open(const char* application, const char* str, int local); +diff --git a/snmplib/snmp_api.c b/snmplib/snmp_api.c +index d155c99..5128c56 100644 +--- a/snmplib/snmp_api.c ++++ b/snmplib/snmp_api.c +@@ -1557,12 +1557,12 @@ _sess_open(netsnmp_session * in_session) + transport = + netsnmp_tdomain_transport_full("snmp", in_session->peername, + in_session->local_port, "tcp,tcp6", +- NULL); ++ NULL, NULL); + } else { + transport = + netsnmp_tdomain_transport_full("snmp", in_session->peername, + in_session->local_port, "udp,udp6", +- NULL); ++ NULL, NULL); + } + + if (NULL != clientaddr_save) +diff --git a/snmplib/snmp_transport.c b/snmplib/snmp_transport.c +index ada4781..40cd631 100644 +--- a/snmplib/snmp_transport.c ++++ b/snmplib/snmp_transport.c +@@ -491,7 +491,8 @@ netsnmp_transport * + netsnmp_tdomain_transport_full(const char *application, + const char *str, int local, + const char *default_domain, +- const char *default_target) ++ const char *default_target, ++ char *iface) + { + netsnmp_tdomain *match = NULL; + const char *addr = NULL; +@@ -646,10 +647,10 @@ netsnmp_tdomain_transport_full(const char *application, + NETSNMP_LOGONCE((LOG_WARNING, + "transport domain %s uses deprecated f_create_from_tstring\n", + match->prefix[0])); +- t = match->f_create_from_tstring(addr, local); ++ t = match->f_create_from_tstring(addr, local, iface); + } + else +- t = match->f_create_from_tstring_new(addr, local, addr2); ++ t = match->f_create_from_tstring_new(addr, local, addr2, iface); + if (t) { + if (lspec) { + free(lspec[0]); +@@ -676,10 +677,11 @@ netsnmp_tdomain_transport_full(const char *application, + + netsnmp_transport * + netsnmp_tdomain_transport(const char *str, int local, +- const char *default_domain) ++ const char *default_domain, ++ char *iface) + { + return netsnmp_tdomain_transport_full("snmp", str, local, default_domain, +- NULL); ++ NULL, iface); + } + + +@@ -687,7 +689,7 @@ netsnmp_tdomain_transport(const char *str, int local, + netsnmp_transport * + netsnmp_tdomain_transport_oid(const oid * dom, + size_t dom_len, +- const u_char * o, size_t o_len, int local) ++ const u_char * o, size_t o_len, int local, char *iface) + { + netsnmp_tdomain *d; + int i; +@@ -700,7 +702,7 @@ netsnmp_tdomain_transport_oid(const oid * dom, + for (i = 0; d->prefix[i] != NULL; i++) { + if (netsnmp_oid_equals(dom, dom_len, d->name, d->name_length) == + 0) { +- return d->f_create_from_ostring(o, o_len, local); ++ return d->f_create_from_ostring(o, o_len, local, iface); + } + } + } +@@ -713,19 +715,19 @@ netsnmp_tdomain_transport_oid(const oid * dom, + netsnmp_transport* + netsnmp_transport_open(const char* application, const char* str, int local) + { +- return netsnmp_tdomain_transport_full(application, str, local, NULL, NULL); ++ return netsnmp_tdomain_transport_full(application, str, local, NULL, NULL, NULL); + } + + netsnmp_transport* +-netsnmp_transport_open_server(const char* application, const char* str) ++netsnmp_transport_open_server(const char* application, const char* str, char *iface) + { +- return netsnmp_tdomain_transport_full(application, str, 1, NULL, NULL); ++ return netsnmp_tdomain_transport_full(application, str, 1, NULL, NULL, iface); + } + + netsnmp_transport* +-netsnmp_transport_open_client(const char* application, const char* str) ++netsnmp_transport_open_client(const char* application, const char* str, char *iface) + { +- return netsnmp_tdomain_transport_full(application, str, 0, NULL, NULL); ++ return netsnmp_tdomain_transport_full(application, str, 0, NULL, NULL, iface); + } + + /** adds a transport to a linked list of transports. +diff --git a/snmplib/transports/snmpAliasDomain.c b/snmplib/transports/snmpAliasDomain.c +index eb50cad..dd7a007 100644 +--- a/snmplib/transports/snmpAliasDomain.c ++++ b/snmplib/transports/snmpAliasDomain.c +@@ -75,7 +75,7 @@ free_alias_config(void) { + + netsnmp_transport * + netsnmp_alias_create_tstring(const char *str, int local, +- const char *default_target) ++ const char *default_target, char *iface) + { + const char *aliasdata; + +@@ -85,13 +85,13 @@ netsnmp_alias_create_tstring(const char *str, int local, + return NULL; + } + +- return netsnmp_tdomain_transport(aliasdata,local,default_target); ++ return netsnmp_tdomain_transport(aliasdata,local,default_target, iface); + } + + + + netsnmp_transport * +-netsnmp_alias_create_ostring(const u_char * o, size_t o_len, int local) ++netsnmp_alias_create_ostring(const u_char * o, size_t o_len, int local, char *iface) + { + fprintf(stderr, "make ostring\n"); + return NULL; +diff --git a/snmplib/transports/snmpTCPDomain.c b/snmplib/transports/snmpTCPDomain.c +index 7feb028..6eb717e 100644 +--- a/snmplib/transports/snmpTCPDomain.c ++++ b/snmplib/transports/snmpTCPDomain.c +@@ -144,7 +144,7 @@ netsnmp_tcp_accept(netsnmp_transport *t) + */ + + netsnmp_transport * +-netsnmp_tcp_transport(struct sockaddr_in *addr, int local) ++netsnmp_tcp_transport(struct sockaddr_in *addr, int local, char *iface) + { + netsnmp_transport *t = NULL; + netsnmp_udp_addr_pair *addr_pair = NULL; +@@ -212,6 +212,11 @@ netsnmp_tcp_transport(struct sockaddr_in *addr, int local) + * We should set SO_REUSEADDR too. + */ + ++ if (iface && setsockopt(t->sock, SOL_SOCKET, SO_BINDTODEVICE, ++ iface, strlen(iface)) == -1) ++ snmp_log(LOG_ERR, "Bind interface %s to socket: %s\n", ++ iface, strerror(errno)); ++ + setsockopt(t->sock, SOL_SOCKET, SO_REUSEADDR, (void *)&opt, + sizeof(opt)); + +@@ -305,12 +310,13 @@ netsnmp_tcp_transport(struct sockaddr_in *addr, int local) + + netsnmp_transport * + netsnmp_tcp_create_tstring(const char *str, int local, +- const char *default_target) ++ const char *default_target, ++ char *iface) + { + struct sockaddr_in addr; + + if (netsnmp_sockaddr_in2(&addr, str, default_target)) { +- return netsnmp_tcp_transport(&addr, local); ++ return netsnmp_tcp_transport(&addr, local, iface); + } else { + return NULL; + } +@@ -319,7 +325,7 @@ netsnmp_tcp_create_tstring(const char *str, int local, + + + netsnmp_transport * +-netsnmp_tcp_create_ostring(const u_char * o, size_t o_len, int local) ++netsnmp_tcp_create_ostring(const u_char * o, size_t o_len, int local, char *iface) + { + struct sockaddr_in addr; + +@@ -328,7 +334,7 @@ netsnmp_tcp_create_ostring(const u_char * o, size_t o_len, int local) + addr.sin_family = AF_INET; + memcpy((u_char *) & (addr.sin_addr.s_addr), o, 4); + addr.sin_port = htons(porttmp); +- return netsnmp_tcp_transport(&addr, local); ++ return netsnmp_tcp_transport(&addr, local, iface); + } + return NULL; + } +diff --git a/snmplib/transports/snmpUDPBaseDomain.c b/snmplib/transports/snmpUDPBaseDomain.c +index 8497f71..7b415bc 100644 +--- a/snmplib/transports/snmpUDPBaseDomain.c ++++ b/snmplib/transports/snmpUDPBaseDomain.c +@@ -21,6 +21,9 @@ + #if HAVE_NETINET_IN_H + #include + #endif ++#if HAVE_NET_IF_H ++#include ++#endif + #if HAVE_ARPA_INET_H + #include + #endif +@@ -53,8 +56,14 @@ + #endif + + void +-_netsnmp_udp_sockopt_set(int fd, int local) ++_netsnmp_udp_sockopt_set(int fd, int local, char *iface) + { ++ ++ if (iface && setsockopt(fd, SOL_SOCKET, SO_BINDTODEVICE, iface, strlen(iface)) == -1) ++ snmp_log(LOG_ERR, "Bind socket on interface: %s: %s\n", iface, strerror(errno)); ++ else if (iface) ++ DEBUGMSGTL(("socket:option", "setting SO_BINDTODEVICE to %s\n", iface)); ++ + #ifdef SO_BSDCOMPAT + /* + * Patch for Linux. Without this, UDP packets that fail get an ICMP +@@ -237,7 +246,10 @@ int netsnmp_udpbase_sendto(int fd, struct in_addr *srcip, int if_index, + struct msghdr m = { 0 }; + char cmsg[CMSG_SPACE(cmsg_data_size)]; + int rc; +- ++ char iface[IFNAMSIZ]; ++ socklen_t ifacelen = IFNAMSIZ; ++ ++ iface[0] = '\0'; + iov.iov_base = data; + iov.iov_len = len; + +@@ -269,14 +281,23 @@ int netsnmp_udpbase_sendto(int fd, struct in_addr *srcip, int if_index, + + memset(&ipi, 0, sizeof(ipi)); + /* +- * Except in the case of responding +- * to a broadcast, setting the ifindex +- * when responding results in incorrect +- * behavior of changing the source address +- * that the manager sees the response +- * come from. ++ * For asymmetric multihomed users, we only set ifindex to 0 ++ * to let kernel handle return if there was no iface bound to the socket. + */ +- ipi.ipi_ifindex = 0; ++ if (getsockopt(fd, SOL_SOCKET, SO_BINDTODEVICE, iface, &ifacelen) != 0) { ++ DEBUGMSGTL(("socket:option", "error getsockopt %s\n", strerror(errno))); ++ DEBUGMSGTL(("socket:option", "sendto: SO_BINDTODEVICE not set ifindex=0\n")); ++ ipi.ipi_ifindex = 0; ++ } else if (!ifacelen) { ++ DEBUGMSGTL(("socket:option", "sendto: SO_BINDTODEVICE not set ifacelen=%d ifindex=0\n", ++ ifacelen)); ++ ipi.ipi_ifindex = 0; ++ } else { ++ DEBUGMSGTL(("socket:option", "sendto: SO_BINDTODEVICE dev=%s using ifindex=%d\n", ++ iface, if_index)); ++ ipi.ipi_ifindex = if_index; ++ } ++ + #if defined(cygwin) + ipi.ipi_addr.s_addr = srcip->s_addr; + #else +diff --git a/snmplib/transports/snmpUDPDomain.c b/snmplib/transports/snmpUDPDomain.c +index a0abd8c..fc68303 100644 +--- a/snmplib/transports/snmpUDPDomain.c ++++ b/snmplib/transports/snmpUDPDomain.c +@@ -84,7 +84,7 @@ typedef netsnmp_indexed_addr_pair netsnmp_udp_addr_pair; + * not static, since snmpUDPIPv6Domain needs it, but not public, either. + * (ie don't put it in a public header.) + */ +-void _netsnmp_udp_sockopt_set(int fd, int server); ++void _netsnmp_udp_sockopt_set(int fd, int server, char *iface); + int + netsnmp_sockaddr_in2(struct sockaddr_in *addr, + const char *inpeername, const char *default_target); +@@ -125,11 +125,11 @@ int netsnmp_udp_sendto(int fd, struct in_addr *srcip, int if_index, struct socka + */ + + netsnmp_transport * +-netsnmp_udp_transport(struct sockaddr_in *addr, int local) ++netsnmp_udp_transport(struct sockaddr_in *addr, int local, char *iface) + { + netsnmp_transport *t = NULL; + +- t = netsnmp_udpipv4base_transport(addr, local); ++ t = netsnmp_udpipv4base_transport(addr, local, iface); + if (NULL == t) { + return NULL; + } +@@ -473,12 +473,13 @@ netsnmp_udp_getSecName(void *opaque, int olength, + + netsnmp_transport * + netsnmp_udp_create_tstring(const char *str, int local, +- const char *default_target) ++ const char *default_target, ++ char *iface) + { + struct sockaddr_in addr; + + if (netsnmp_sockaddr_in2(&addr, str, default_target)) { +- return netsnmp_udp_transport(&addr, local); ++ return netsnmp_udp_transport(&addr, local, iface); + } else { + return NULL; + } +@@ -486,7 +487,7 @@ netsnmp_udp_create_tstring(const char *str, int local, + + + netsnmp_transport * +-netsnmp_udp_create_ostring(const u_char * o, size_t o_len, int local) ++netsnmp_udp_create_ostring(const u_char * o, size_t o_len, int local, char *iface) + { + struct sockaddr_in addr; + +@@ -495,7 +496,7 @@ netsnmp_udp_create_ostring(const u_char * o, size_t o_len, int local) + addr.sin_family = AF_INET; + memcpy((u_char *) & (addr.sin_addr.s_addr), o, 4); + addr.sin_port = htons(porttmp); +- return netsnmp_udp_transport(&addr, local); ++ return netsnmp_udp_transport(&addr, local, iface); + } + return NULL; + } +diff --git a/snmplib/transports/snmpUDPIPv4BaseDomain.c b/snmplib/transports/snmpUDPIPv4BaseDomain.c +index 8c0fb05..7991b6a 100644 +--- a/snmplib/transports/snmpUDPIPv4BaseDomain.c ++++ b/snmplib/transports/snmpUDPIPv4BaseDomain.c +@@ -57,7 +57,7 @@ int netsnmp_udpipv4_sendto(int fd, struct in_addr *srcip, int if_index, + #endif /* HAVE_IP_PKTINFO || HAVE_IP_RECVDSTADDR */ + + netsnmp_transport * +-netsnmp_udpipv4base_transport(struct sockaddr_in *addr, int local) ++netsnmp_udpipv4base_transport(struct sockaddr_in *addr, int local, char *iface) + { + netsnmp_transport *t = NULL; + int rc = 0, rc2; +@@ -95,7 +95,7 @@ netsnmp_udpipv4base_transport(struct sockaddr_in *addr, int local) + return NULL; + } + +- _netsnmp_udp_sockopt_set(t->sock, local); ++ _netsnmp_udp_sockopt_set(t->sock, local, iface); + + if (local) { + #ifndef NETSNMP_NO_LISTEN_SUPPORT +diff --git a/snmplib/transports/snmpUDPIPv6Domain.c b/snmplib/transports/snmpUDPIPv6Domain.c +index 18de876..6b44b22 100644 +--- a/snmplib/transports/snmpUDPIPv6Domain.c ++++ b/snmplib/transports/snmpUDPIPv6Domain.c +@@ -74,12 +74,6 @@ oid netsnmp_UDPIPv6Domain[] = { TRANSPORT_DOMAIN_UDP_IPV6 }; + static netsnmp_tdomain udp6Domain; + + /* +- * from snmpUDPDomain. not static, but not public, either. +- * (ie don't put it in a public header.) +- */ +-extern void _netsnmp_udp_sockopt_set(int fd, int server); +- +-/* + * Return a string representing the address in data, or else the "far end" + * address if data is NULL. + */ +@@ -186,7 +186,7 @@ netsnmp_udp6_send(netsnmp_transport *t, void *buf, int size, + */ + + netsnmp_transport * +-netsnmp_udp6_transport(struct sockaddr_in6 *addr, int local) ++netsnmp_udp6_transport(struct sockaddr_in6 *addr, int local, char *iface) + { + netsnmp_transport *t = NULL; + int rc = 0; +@@ -223,7 +223,7 @@ netsnmp_udp6_transport(struct sockaddr_in6 *addr, int local) + return NULL; + } + +- _netsnmp_udp_sockopt_set(t->sock, local); ++ _netsnmp_udp_sockopt_set(t->sock, local, iface); + + if (local) { + #ifndef NETSNMP_NO_LISTEN_SUPPORT +@@ -724,12 +724,13 @@ netsnmp_udp6_getSecName(void *opaque, int olength, + + netsnmp_transport * + netsnmp_udp6_create_tstring(const char *str, int local, +- const char *default_target) ++ const char *default_target, ++ char *iface) + { + struct sockaddr_in6 addr; + + if (netsnmp_sockaddr_in6_2(&addr, str, default_target)) { +- return netsnmp_udp6_transport(&addr, local); ++ return netsnmp_udp6_transport(&addr, local, iface); + } else { + return NULL; + } +@@ -746,7 +747,7 @@ netsnmp_udp6_create_tstring(const char *str, int local, + */ + + netsnmp_transport * +-netsnmp_udp6_create_ostring(const u_char * o, size_t o_len, int local) ++netsnmp_udp6_create_ostring(const u_char * o, size_t o_len, int local, char *iface) + { + struct sockaddr_in6 addr; + +@@ -755,7 +756,7 @@ netsnmp_udp6_create_ostring(const u_char * o, size_t o_len, int local) + addr.sin6_family = AF_INET6; + memcpy((u_char *) & (addr.sin6_addr.s6_addr), o, 16); + addr.sin6_port = htons((o[16] << 8) + o[17]); +- return netsnmp_udp6_transport(&addr, local); ++ return netsnmp_udp6_transport(&addr, local, iface); + } + return NULL; + } +diff --git a/snmplib/transports/snmpUnixDomain.c b/snmplib/transports/snmpUnixDomain.c +index 47dffc1..af56c5d 100644 +--- a/snmplib/transports/snmpUnixDomain.c ++++ b/snmplib/transports/snmpUnixDomain.c +@@ -450,7 +450,8 @@ netsnmp_unix_transport(struct sockaddr_un *addr, int local) + + netsnmp_transport * + netsnmp_unix_create_tstring(const char *string, int local, +- const char *default_target) ++ const char *default_target, ++ char *iface) + { + struct sockaddr_un addr; + +@@ -476,7 +477,7 @@ netsnmp_unix_create_tstring(const char *string, int local, + + + netsnmp_transport * +-netsnmp_unix_create_ostring(const u_char * o, size_t o_len, int local) ++netsnmp_unix_create_ostring(const u_char * o, size_t o_len, int local, char *iface) + { + struct sockaddr_un addr; + +-- +2.7.4 + diff --git a/src/snmpd/patch-5.7.3+dfsg/0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch b/src/snmpd/patch-5.7.3+dfsg/0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch new file mode 100644 index 00000000000..f3e878077ff --- /dev/null +++ b/src/snmpd/patch-5.7.3+dfsg/0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch @@ -0,0 +1,24 @@ +From 6e038423d7a3269dbfd85b3d7ada6015479f1559 Mon Sep 17 00:00:00 2001 +From: Qi Luo +Date: Fri, 20 Sep 2019 00:42:19 +0000 +Subject: [PATCH] Enable macro DEB_BUILD_ARCH_OS in order to build ipv6 feature + +--- + debian/rules | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/debian/rules b/debian/rules +index 4c3b5b6..1fab6a4 100755 +--- a/debian/rules ++++ b/debian/rules +@@ -5,6 +5,7 @@ + # without -pie build fails during perl module build somehow... + export DEB_BUILD_MAINT_OPTIONS := hardening=+all,-pie + DEB_HOST_MULTIARCH ?= $(shell dpkg-architecture -qDEB_HOST_MULTIARCH) ++DEB_BUILD_ARCH_OS ?= $(shell dpkg-architecture -qDEB_BUILD_ARCH_OS) + + LIB_VERSION = 30 + UPSTREAM_VERSION = $(shell dpkg-parsechangelog | egrep '^Version:' | cut -f 2 -d ':' | sed 's/ //' | sed 's/~dfsg.*$$//') +-- +2.18.0 + diff --git a/src/snmpd/patch-5.7.3+dfsg/series b/src/snmpd/patch-5.7.3+dfsg/series new file mode 100644 index 00000000000..5cd0b06510f --- /dev/null +++ b/src/snmpd/patch-5.7.3+dfsg/series @@ -0,0 +1,8 @@ +0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch +0002-at.c-properly-check-return-status-from-realloc.-Than.patch +0003-CHANGES-BUG-2743-snmpd-crashes-when-receiving-a-GetN.patch +0004-Disable-SNMPv1.patch +0005-Port-OpenSSL-1.1.0-with-support-for-1.0.2.patch +0006-From-Jiri-Cervenka-snmpd-Fixed-agentx-crashing-and-or-freezing-on-timeout.patch +0007-Linux-VRF-5.7.3-Support.patch +0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch diff --git a/src/socat/Makefile b/src/socat/Makefile new file mode 100644 index 00000000000..50c2c8d96d2 --- /dev/null +++ b/src/socat/Makefile @@ -0,0 +1,28 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = socat_$(SOCAT_VERSION)_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Remove any stale files + rm -rf ./socat-1.7.3.1 + + # Get source package + wget -NO socat_$(SOCAT_VERSION).dsc "https://sonicstorage.blob.core.windows.net/packages/debian/socat_1.7.3.1-2+deb9u1.dsc?sv=2015-04-05&sr=b&sig=Ph7aMqb%2F%2FE%2F8qwxMXoXb5oK1YPkfVt6PV8mBBv5Wi%2F4%3D&se=2155-07-05T11%3A42%3A29Z&sp=r" + wget -NO socat_$(SOCAT_VERSION).debian.tar.xz "https://sonicstorage.blob.core.windows.net/packages/debian/socat_1.7.3.1-2+deb9u1.debian.tar.xz?sv=2015-04-05&sr=b&sig=yv77Fr5RtZgRTPmJK3j0lZ0BzsCiGaSs2i7NqQKEy2Y%3D&se=2155-07-05T11%3A39%3A59Z&sp=r" + wget -NO socat_1.7.3.1.orig.tar.gz "https://sonicstorage.blob.core.windows.net/packages/debian/socat_1.7.3.1.orig.tar.gz?sv=2015-04-05&sr=b&sig=0Ai1FM604aGsF5uBu2yN8w9O1a6zNjIDCdaiTo24DyQ%3D&se=2155-07-05T11%3A40%3A14Z&sp=r" + + dpkg-source -x socat_$(SOCAT_VERSION).dsc + + # Build source and Debian packages + pushd socat-1.7.3.1 + patch -p0 < ../enable_readline.patch + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + # Move the newly-built .deb packages to the destination directory + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) + diff --git a/src/socat/enable_readline.patch b/src/socat/enable_readline.patch new file mode 100644 index 00000000000..f1914d3cb49 --- /dev/null +++ b/src/socat/enable_readline.patch @@ -0,0 +1,13 @@ +--- debian/rules.old 2018-08-12 11:48:42.220230100 +0000 ++++ debian/rules 2018-08-12 11:48:52.072230100 +0000 +@@ -12,9 +12,6 @@ + %: + dh $@ --with=autoreconf + +-override_dh_auto_configure: +- dh_auto_configure -- --disable-readline +- + override_dh_auto_test: + +-.PHONY: override_dh_auto_configure override_dh_auto_test ++.PHONY: override_dh_auto_test diff --git a/src/sonic-config-engine/MANIFEST.in b/src/sonic-config-engine/MANIFEST.in new file mode 100644 index 00000000000..8861dd66030 --- /dev/null +++ b/src/sonic-config-engine/MANIFEST.in @@ -0,0 +1 @@ +recursive-include tests *.j2 *.yml *.xml *.json diff --git a/src/sonic-config-engine/config_samples.py b/src/sonic-config-engine/config_samples.py new file mode 100644 index 00000000000..adaea0c4532 --- /dev/null +++ b/src/sonic-config-engine/config_samples.py @@ -0,0 +1,68 @@ +#!/usr/bin/env python +import os +import sys +from natsort import natsorted + +def generate_t1_sample_config(data): + data['DEVICE_METADATA']['localhost']['hostname'] = 'sonic' + data['DEVICE_METADATA']['localhost']['type'] = 'LeafRouter' + data['DEVICE_METADATA']['localhost']['bgp_asn'] = '65100' + data['LOOPBACK_INTERFACE'] = {"Loopback0|10.1.0.1/32": {}} + data['BGP_NEIGHBOR'] = {} + data['DEVICE_NEIGHBOR'] = {} + data['INTERFACE'] = {} + port_count = 0 + total_port_amount = len(data['PORT']) + for port in natsorted(data['PORT'].keys()): + data['PORT'][port]['admin_status'] = 'up' + data['PORT'][port]['mtu'] = '9100' + local_addr = '10.0.{}.{}'.format(2 * port_count / 256, 2 * port_count % 256) + peer_addr = '10.0.{}.{}'.format(2 * port_count / 256, 2 * port_count % 256 + 1) + peer_name='ARISTA{0:02d}{1}'.format(1+port_count%(total_port_amount/2), 'T2' if port_count < (total_port_amount/2) else 'T0') + peer_asn = 65200 if port_count < total_port_amount/2 else 64001 + port_count - total_port_amount/2 + data['INTERFACE']['{}|{}/31'.format(port, local_addr)] = {} + data['BGP_NEIGHBOR'][peer_addr] = { + 'rrclient': 0, + 'name': peer_name, + 'local_addr': local_addr, + 'nhopself': 0, + 'holdtime': '180', + 'asn': str(peer_asn), + 'keepalive': '60' + } + port_count += 1 + return data; + +def generate_empty_config(data): + new_data = {'DEVICE_METADATA': data['DEVICE_METADATA']} + if not new_data['DEVICE_METADATA']['localhost'].has_key('hostname'): + new_data['DEVICE_METADATA']['localhost']['hostname'] = 'sonic' + if not new_data['DEVICE_METADATA']['localhost'].has_key('type'): + new_data['DEVICE_METADATA']['localhost']['type'] = 'LeafRouter' + return new_data + +def generate_l2_config(data): + if not data['DEVICE_METADATA']['localhost'].has_key('hostname'): + data['DEVICE_METADATA']['localhost']['hostname'] = 'sonic' + if not data['DEVICE_METADATA']['localhost'].has_key('type'): + data['DEVICE_METADATA']['localhost']['type'] = 'ToRRouter' + data['VLAN'] = {'Vlan1000': {'vlanid': '1000'}} + vp = natsorted(data['PORT'].keys()) + data['VLAN']['Vlan1000'].setdefault('members', vp) + data['VLAN_MEMBER'] = {} + for port in natsorted(data['PORT'].keys()): + data['VLAN_MEMBER']['Vlan1000|{}'.format(port)] = {'tagging_mode': 'untagged'} + return data + +_sample_generators = { + 't1': generate_t1_sample_config, + 'l2': generate_l2_config, + 'empty': generate_empty_config + } + +def get_available_config(): + return _sample_generators.keys() + +def generate_sample_config(data, setting_name): + return _sample_generators[setting_name.lower()](data) + diff --git a/src/sonic-config-engine/data/l2switch.j2 b/src/sonic-config-engine/data/l2switch.j2 new file mode 100644 index 00000000000..c9f166b6798 --- /dev/null +++ b/src/sonic-config-engine/data/l2switch.j2 @@ -0,0 +1,34 @@ +{ + "DEVICE_METADATA": {{ DEVICE_METADATA | tojson }}, + {% set ns = {'firstPrinted': False} -%} + "PORT": { + {%- for key,value in PORT.iteritems() -%} + {%- if ns.firstPrinted %},{% endif %} + + "{{ key }}": { + "alias": "{{ value.alias }}", + "lanes": "{{ value.lanes }}", + "admin_status": "up" + } + {%- if ns.update({'firstPrinted': True}) %}{% endif -%} + {%- endfor %} + + }, + "VLAN": { + "Vlan1000": { + "vlanid": "1000" + } + }, + {% set ns = {'firstPrinted': False} -%} + "VLAN_MEMBER": { + {%- for port in PORT -%} + {%- if ns.firstPrinted %},{% endif %} + + "Vlan1000|{{ port }}": { + "tagging_mode": "untagged" + } + {%- if ns.update({'firstPrinted': True}) %}{% endif -%} + {%- endfor %} + + } +} diff --git a/src/sonic-config-engine/lazy_re.py b/src/sonic-config-engine/lazy_re.py new file mode 100644 index 00000000000..b51c385c1cc --- /dev/null +++ b/src/sonic-config-engine/lazy_re.py @@ -0,0 +1,22 @@ +# monkey patch re.compile to improve import time of some packages + +import re + +_orig_re_compile = re.compile + + +def __re_compile(*args, **kwargs): + class __LazyReCompile(object): + def __init__(self, *args, **kwargs): + self.args = args + self.kwargs = kwargs + self.pattern_obj = None + + def __getattr__(self, name): + if self.pattern_obj is None: + self.pattern_obj = _orig_re_compile(*self.args, **self.kwargs) + return getattr(self.pattern_obj, name) + return __LazyReCompile(*args, **kwargs) + +re.compile = __re_compile + diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py new file mode 100644 index 00000000000..3ba6362c6ff --- /dev/null +++ b/src/sonic-config-engine/minigraph.py @@ -0,0 +1,873 @@ +#!/usr/bin/env python +import calendar +import math +import os +import sys +import socket +import struct +import json +import copy +import ipaddr as ipaddress +from collections import defaultdict + +from lxml import etree as ET +from lxml.etree import QName + +from portconfig import get_port_config + +"""minigraph.py +version_added: "1.9" +author: Guohan Lu (gulv@microsoft.com) +short_description: Parse minigraph xml file and device description xml file +""" + +ns = "Microsoft.Search.Autopilot.Evolution" +ns1 = "http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" +ns2 = "Microsoft.Search.Autopilot.NetMux" +ns3 = "http://www.w3.org/2001/XMLSchema-instance" + +# Device types +spine_chassis_frontend_role = 'SpineChassisFrontendRouter' +chassis_backend_role = 'ChassisBackendRouter' + +backend_device_types = ['BackEndToRRouter', 'BackEndLeafRouter'] +VLAN_SUB_INTERFACE_SEPARATOR = '.' +VLAN_SUB_INTERFACE_VLAN_ID = '10' + +# Default Virtual Network Index (VNI) +vni_default = 8000 + +############################################################################### +# +# Minigraph parsing functions +# +############################################################################### + +class minigraph_encoder(json.JSONEncoder): + def default(self, obj): + if isinstance(obj, ( + ipaddress.IPv4Network, ipaddress.IPv6Network, + ipaddress.IPv4Address, ipaddress.IPv6Address + )): + return str(obj) + return json.JSONEncoder.default(self, obj) + +def parse_device(device): + lo_prefix = None + mgmt_prefix = None + d_type = None # don't shadow type() + hwsku = None + name = None + deployment_id = None + if str(QName(ns3, "type")) in device.attrib: + d_type = device.attrib[str(QName(ns3, "type"))] + + for node in device: + if node.tag == str(QName(ns, "Address")): + lo_prefix = node.find(str(QName(ns2, "IPPrefix"))).text + elif node.tag == str(QName(ns, "ManagementAddress")): + mgmt_prefix = node.find(str(QName(ns2, "IPPrefix"))).text + elif node.tag == str(QName(ns, "Hostname")): + name = node.text + elif node.tag == str(QName(ns, "HwSku")): + hwsku = node.text + elif node.tag == str(QName(ns, "DeploymentId")): + deployment_id = node.text + return (lo_prefix, mgmt_prefix, name, hwsku, d_type, deployment_id) + +def parse_png(png, hname): + neighbors = {} + devices = {} + console_dev = '' + console_port = '' + mgmt_dev = '' + mgmt_port = '' + port_speeds = {} + console_ports = {} + for child in png: + if child.tag == str(QName(ns, "DeviceInterfaceLinks")): + for link in child.findall(str(QName(ns, "DeviceLinkBase"))): + linktype = link.find(str(QName(ns, "ElementType"))).text + if linktype == "DeviceSerialLink": + enddevice = link.find(str(QName(ns, "EndDevice"))).text + endport = link.find(str(QName(ns, "EndPort"))).text + startdevice = link.find(str(QName(ns, "StartDevice"))).text + startport = link.find(str(QName(ns, "StartPort"))).text + baudrate = link.find(str(QName(ns, "Bandwidth"))).text + flowcontrol = 1 if link.find(str(QName(ns, "FlowControl"))) is not None and link.find(str(QName(ns, "FlowControl"))).text == 'true' else 0 + if enddevice.lower() == hname.lower(): + console_ports[endport] = { + 'remote_device': startdevice, + 'baud_rate': baudrate, + 'flow_control': flowcontrol + } + else: + console_ports[startport] = { + 'remote_device': enddevice, + 'baud_rate': baudrate, + 'flow_control': flowcontrol + } + continue + + if linktype != "DeviceInterfaceLink" and linktype != "UnderlayInterfaceLink": + continue + + enddevice = link.find(str(QName(ns, "EndDevice"))).text + endport = link.find(str(QName(ns, "EndPort"))).text + startdevice = link.find(str(QName(ns, "StartDevice"))).text + startport = link.find(str(QName(ns, "StartPort"))).text + bandwidth_node = link.find(str(QName(ns, "Bandwidth"))) + bandwidth = bandwidth_node.text if bandwidth_node is not None else None + + if enddevice.lower() == hname.lower(): + if port_alias_map.has_key(endport): + endport = port_alias_map[endport] + neighbors[endport] = {'name': startdevice, 'port': startport} + if bandwidth: + port_speeds[endport] = bandwidth + else: + if port_alias_map.has_key(startport): + startport = port_alias_map[startport] + neighbors[startport] = {'name': enddevice, 'port': endport} + if bandwidth: + port_speeds[startport] = bandwidth + + if child.tag == str(QName(ns, "Devices")): + for device in child.findall(str(QName(ns, "Device"))): + (lo_prefix, mgmt_prefix, name, hwsku, d_type, deployment_id) = parse_device(device) + device_data = {'lo_addr': lo_prefix, 'type': d_type, 'mgmt_addr': mgmt_prefix, 'hwsku': hwsku } + if deployment_id: + device_data['deployment_id'] = deployment_id + devices[name] = device_data + + if child.tag == str(QName(ns, "DeviceInterfaceLinks")): + for if_link in child.findall(str(QName(ns, 'DeviceLinkBase'))): + if str(QName(ns3, "type")) in if_link.attrib: + link_type = if_link.attrib[str(QName(ns3, "type"))] + if link_type == 'DeviceSerialLink': + for node in if_link: + if node.tag == str(QName(ns, "EndPort")): + console_port = node.text.split()[-1] + elif node.tag == str(QName(ns, "EndDevice")): + console_dev = node.text + elif link_type == 'DeviceMgmtLink': + for node in if_link: + if node.tag == str(QName(ns, "EndPort")): + mgmt_port = node.text.split()[-1] + elif node.tag == str(QName(ns, "EndDevice")): + mgmt_dev = node.text + + return (neighbors, devices, console_dev, console_port, mgmt_dev, mgmt_port, port_speeds, console_ports) + + +def parse_dpg(dpg, hname): + for child in dpg: + hostname = child.find(str(QName(ns, "Hostname"))) + if hostname.text.lower() != hname.lower(): + continue + + vni = vni_default + vni_element = child.find(str(QName(ns, "VNI"))) + if vni_element != None: + if vni_element.text.isdigit(): + vni = int(vni_element.text) + else: + print >> sys.stderr, "VNI must be an integer (use default VNI %d instead)" % vni_default + + ipintfs = child.find(str(QName(ns, "IPInterfaces"))) + intfs = {} + for ipintf in ipintfs.findall(str(QName(ns, "IPInterface"))): + intfalias = ipintf.find(str(QName(ns, "AttachTo"))).text + intfname = port_alias_map.get(intfalias, intfalias) + ipprefix = ipintf.find(str(QName(ns, "Prefix"))).text + intfs[(intfname, ipprefix)] = {} + + lointfs = child.find(str(QName(ns, "LoopbackIPInterfaces"))) + lo_intfs = {} + for lointf in lointfs.findall(str(QName(ns1, "LoopbackIPInterface"))): + intfname = lointf.find(str(QName(ns, "AttachTo"))).text + ipprefix = lointf.find(str(QName(ns1, "PrefixStr"))).text + lo_intfs[(intfname, ipprefix)] = {} + + mvrfConfigs = child.find(str(QName(ns, "MgmtVrfConfigs"))) + mvrf = {} + if mvrfConfigs != None: + mv = mvrfConfigs.find(str(QName(ns1, "MgmtVrfGlobal"))) + if mv != None: + mvrf_en_flag = mv.find(str(QName(ns, "mgmtVrfEnabled"))).text + mvrf["vrf_global"] = {"mgmtVrfEnabled": mvrf_en_flag} + + mgmtintfs = child.find(str(QName(ns, "ManagementIPInterfaces"))) + mgmt_intf = {} + for mgmtintf in mgmtintfs.findall(str(QName(ns1, "ManagementIPInterface"))): + intfname = mgmtintf.find(str(QName(ns, "AttachTo"))).text + ipprefix = mgmtintf.find(str(QName(ns1, "PrefixStr"))).text + mgmtipn = ipaddress.IPNetwork(ipprefix) + gwaddr = ipaddress.IPAddress(int(mgmtipn.network) + 1) + mgmt_intf[(intfname, ipprefix)] = {'gwaddr': gwaddr} + + pcintfs = child.find(str(QName(ns, "PortChannelInterfaces"))) + pc_intfs = [] + pcs = {} + pc_members = {} + intfs_inpc = [] # List to hold all the LAG member interfaces + for pcintf in pcintfs.findall(str(QName(ns, "PortChannel"))): + pcintfname = pcintf.find(str(QName(ns, "Name"))).text + pcintfmbr = pcintf.find(str(QName(ns, "AttachTo"))).text + pcmbr_list = pcintfmbr.split(';') + pc_intfs.append(pcintfname) + for i, member in enumerate(pcmbr_list): + pcmbr_list[i] = port_alias_map.get(member, member) + intfs_inpc.append(pcmbr_list[i]) + pc_members[(pcintfname, pcmbr_list[i])] = {'NULL': 'NULL'} + if pcintf.find(str(QName(ns, "Fallback"))) != None: + pcs[pcintfname] = {'members': pcmbr_list, 'fallback': pcintf.find(str(QName(ns, "Fallback"))).text, 'min_links': str(int(math.ceil(len() * 0.75)))} + else: + pcs[pcintfname] = {'members': pcmbr_list, 'min_links': str(int(math.ceil(len(pcmbr_list) * 0.75)))} + + vlanintfs = child.find(str(QName(ns, "VlanInterfaces"))) + vlan_intfs = [] + vlans = {} + vlan_members = {} + for vintf in vlanintfs.findall(str(QName(ns, "VlanInterface"))): + vintfname = vintf.find(str(QName(ns, "Name"))).text + vlanid = vintf.find(str(QName(ns, "VlanID"))).text + vintfmbr = vintf.find(str(QName(ns, "AttachTo"))).text + vmbr_list = vintfmbr.split(';') + for i, member in enumerate(vmbr_list): + vmbr_list[i] = port_alias_map.get(member, member) + sonic_vlan_member_name = "Vlan%s" % (vlanid) + vlan_members[(sonic_vlan_member_name, vmbr_list[i])] = {'tagging_mode': 'untagged'} + + vlan_attributes = {'vlanid': vlanid} + + # If this VLAN requires a DHCP relay agent, it will contain a element + # containing a list of DHCP server IPs + vintf_node = vintf.find(str(QName(ns, "DhcpRelays"))) + if vintf_node is not None and vintf_node.text is not None: + vintfdhcpservers = vintf_node.text + vdhcpserver_list = vintfdhcpservers.split(';') + vlan_attributes['dhcp_servers'] = vdhcpserver_list + + sonic_vlan_name = "Vlan%s" % vlanid + if sonic_vlan_name != vintfname: + vlan_attributes['alias'] = vintfname + vlans[sonic_vlan_name] = vlan_attributes + + aclintfs = child.find(str(QName(ns, "AclInterfaces"))) + acls = {} + for aclintf in aclintfs.findall(str(QName(ns, "AclInterface"))): + aclname = aclintf.find(str(QName(ns, "InAcl"))).text.upper().replace(" ", "_").replace("-", "_") + aclattach = aclintf.find(str(QName(ns, "AttachTo"))).text.split(';') + acl_intfs = [] + is_mirror = False + is_mirror_v6 = False + + # TODO: Ensure that acl_intfs will only ever contain front-panel interfaces (e.g., + # maybe we should explicity ignore management and loopback interfaces?) because we + # decide an ACL is a Control Plane ACL if acl_intfs is empty below. + for member in aclattach: + member = member.strip() + if pcs.has_key(member): + # If try to attach ACL to a LAG interface then we shall add the LAG to + # to acl_intfs directly instead of break it into member ports, ACL attach + # to LAG will be applied to all the LAG members internally by SAI/SDK + acl_intfs.append(member) + elif vlans.has_key(member): + print >> sys.stderr, "Warning: ACL " + aclname + " is attached to a Vlan interface, which is currently not supported" + elif port_alias_map.has_key(member): + acl_intfs.append(port_alias_map[member]) + # Give a warning if trying to attach ACL to a LAG member interface, correct way is to attach ACL to the LAG interface + if port_alias_map[member] in intfs_inpc: + print >> sys.stderr, "Warning: ACL " + aclname + " is attached to a LAG member interface " + port_alias_map[member] + ", instead of LAG interface" + elif member.lower().startswith('erspan'): + if member.lower().startswith('erspanv6'): + is_mirror_v6 = True + else: + is_mirror = True + # Erspan session will be attached to all front panel ports + # initially. If panel ports is a member port of LAG, then + # the LAG will be added to acl table instead of the panel + # ports. Non-active ports will be removed from this list + # later after the rest of the minigraph has been parsed. + acl_intfs = pc_intfs[:] + for panel_port in port_alias_map.values(): + if panel_port not in intfs_inpc: + acl_intfs.append(panel_port) + break + if acl_intfs: + acls[aclname] = {'policy_desc': aclname, + 'ports': acl_intfs} + if is_mirror: + acls[aclname]['type'] = 'MIRROR' + elif is_mirror_v6: + acls[aclname]['type'] = 'MIRRORV6' + else: + acls[aclname]['type'] = 'L3' + else: + # This ACL has no interfaces to attach to -- consider this a control plane ACL + try: + aclservice = aclintf.find(str(QName(ns, "Type"))).text + + # If we already have an ACL with this name and this ACL is bound to a different service, + # append the service to our list of services + if aclname in acls: + if acls[aclname]['type'] != 'CTRLPLANE': + print >> sys.stderr, "Warning: ACL '%s' type mismatch. Not updating ACL." % aclname + elif acls[aclname]['services'] == aclservice: + print >> sys.stderr, "Warning: ACL '%s' already contains service '%s'. Not updating ACL." % (aclname, aclservice) + else: + acls[aclname]['services'].append(aclservice) + else: + acls[aclname] = {'policy_desc': aclname, + 'type': 'CTRLPLANE', + 'services': [aclservice]} + except: + print >> sys.stderr, "Warning: Ignoring Control Plane ACL %s without type" % aclname + + return intfs, lo_intfs, mvrf, mgmt_intf, vlans, vlan_members, pcs, pc_members, acls, vni + return None, None, None, None, None, None, None, None, None, None + + +def parse_cpg(cpg, hname): + bgp_sessions = {} + myasn = None + bgp_peers_with_range = {} + for child in cpg: + tag = child.tag + if tag == str(QName(ns, "PeeringSessions")): + for session in child.findall(str(QName(ns, "BGPSession"))): + start_router = session.find(str(QName(ns, "StartRouter"))).text + start_peer = session.find(str(QName(ns, "StartPeer"))).text + end_router = session.find(str(QName(ns, "EndRouter"))).text + end_peer = session.find(str(QName(ns, "EndPeer"))).text + rrclient = 1 if session.find(str(QName(ns, "RRClient"))) is not None else 0 + if session.find(str(QName(ns, "HoldTime"))) is not None: + holdtime = session.find(str(QName(ns, "HoldTime"))).text + else: + holdtime = 180 + if session.find(str(QName(ns, "KeepAliveTime"))) is not None: + keepalive = session.find(str(QName(ns, "KeepAliveTime"))).text + else: + keepalive = 60 + nhopself = 1 if session.find(str(QName(ns, "NextHopSelf"))) is not None else 0 + if end_router.lower() == hname.lower(): + bgp_sessions[start_peer.lower()] = { + 'name': start_router, + 'local_addr': end_peer.lower(), + 'rrclient': rrclient, + 'holdtime': holdtime, + 'keepalive': keepalive, + 'nhopself': nhopself + } + else: + bgp_sessions[end_peer.lower()] = { + 'name': end_router, + 'local_addr': start_peer.lower(), + 'rrclient': rrclient, + 'holdtime': holdtime, + 'keepalive': keepalive, + 'nhopself': nhopself + } + elif child.tag == str(QName(ns, "Routers")): + for router in child.findall(str(QName(ns1, "BGPRouterDeclaration"))): + asn = router.find(str(QName(ns1, "ASN"))).text + hostname = router.find(str(QName(ns1, "Hostname"))).text + if hostname.lower() == hname.lower(): + myasn = asn + peers = router.find(str(QName(ns1, "Peers"))) + for bgpPeer in peers.findall(str(QName(ns, "BGPPeer"))): + addr = bgpPeer.find(str(QName(ns, "Address"))).text + if bgpPeer.find(str(QName(ns1, "PeersRange"))) is not None: # FIXME: is better to check for type BGPPeerPassive + name = bgpPeer.find(str(QName(ns1, "Name"))).text + ip_range = bgpPeer.find(str(QName(ns1, "PeersRange"))).text + ip_range_group = ip_range.split(';') if ip_range and ip_range != "" else [] + bgp_peers_with_range[name] = { + 'name': name, + 'ip_range': ip_range_group + } + if bgpPeer.find(str(QName(ns, "Address"))) is not None: + bgp_peers_with_range[name]['src_address'] = bgpPeer.find(str(QName(ns, "Address"))).text + if bgpPeer.find(str(QName(ns1, "PeerAsn"))) is not None: + bgp_peers_with_range[name]['peer_asn'] = bgpPeer.find(str(QName(ns1, "PeerAsn"))).text + else: + for peer in bgp_sessions: + bgp_session = bgp_sessions[peer] + if hostname.lower() == bgp_session['name'].lower(): + bgp_session['asn'] = asn + + bgp_monitors = { key: bgp_sessions[key] for key in bgp_sessions if bgp_sessions[key].has_key('asn') and bgp_sessions[key]['name'] == 'BGPMonitor' } + bgp_sessions = { key: bgp_sessions[key] for key in bgp_sessions if bgp_sessions[key].has_key('asn') and int(bgp_sessions[key]['asn']) != 0 } + + return bgp_sessions, myasn, bgp_peers_with_range, bgp_monitors + + +def parse_meta(meta, hname): + syslog_servers = [] + dhcp_servers = [] + ntp_servers = [] + tacacs_servers = [] + mgmt_routes = [] + erspan_dst = [] + deployment_id = None + device_metas = meta.find(str(QName(ns, "Devices"))) + for device in device_metas.findall(str(QName(ns1, "DeviceMetadata"))): + if device.find(str(QName(ns1, "Name"))).text.lower() == hname.lower(): + properties = device.find(str(QName(ns1, "Properties"))) + for device_property in properties.findall(str(QName(ns1, "DeviceProperty"))): + name = device_property.find(str(QName(ns1, "Name"))).text + value = device_property.find(str(QName(ns1, "Value"))).text + value_group = value.strip().split(';') if value and value != "" else [] + if name == "DhcpResources": + dhcp_servers = value_group + elif name == "NtpResources": + ntp_servers = value_group + elif name == "SyslogResources": + syslog_servers = value_group + elif name == "TacacsServer": + tacacs_servers = value_group + elif name == "ForcedMgmtRoutes": + mgmt_routes = value_group + elif name == "ErspanDestinationIpv4": + erspan_dst = value_group + elif name == "DeploymentId": + deployment_id = value + return syslog_servers, dhcp_servers, ntp_servers, tacacs_servers, mgmt_routes, erspan_dst, deployment_id + +def parse_deviceinfo(meta, hwsku): + port_speeds = {} + port_descriptions = {} + for device_info in meta.findall(str(QName(ns, "DeviceInfo"))): + dev_sku = device_info.find(str(QName(ns, "HwSku"))).text + if dev_sku == hwsku: + interfaces = device_info.find(str(QName(ns, "EthernetInterfaces"))).findall(str(QName(ns1, "EthernetInterface"))) + interfaces = interfaces + device_info.find(str(QName(ns, "ManagementInterfaces"))).findall(str(QName(ns1, "ManagementInterface"))) + for interface in interfaces: + alias = interface.find(str(QName(ns, "InterfaceName"))).text + speed = interface.find(str(QName(ns, "Speed"))).text + desc = interface.find(str(QName(ns, "Description"))) + if desc != None: + port_descriptions[port_alias_map.get(alias, alias)] = desc.text + port_speeds[port_alias_map.get(alias, alias)] = speed + return port_speeds, port_descriptions + +# Function to check if IP address is present in the key. +# If it is present, then the key would be a tuple. +def is_ip_prefix_in_key(key): + return (isinstance(key, tuple)) + +# Special parsing for spine chassis frontend +def parse_spine_chassis_fe(results, vni, lo_intfs, phyport_intfs, pc_intfs, pc_members, devices): + chassis_vnet ='VnetFE' + chassis_vxlan_tunnel = 'TunnelInt' + chassis_vni = vni + + # Vxlan tunnel information + lo_addr = '0.0.0.0' + for lo in lo_intfs: + lo_network = ipaddress.IPNetwork(lo[1]) + if lo_network.version == 4: + lo_addr = str(lo_network.ip) + break + + results['VXLAN_TUNNEL'] = {chassis_vxlan_tunnel: { + 'src_ip': lo_addr + }} + + # Vnet information + results['VNET'] = {chassis_vnet: { + 'vxlan_tunnel': chassis_vxlan_tunnel, + 'vni': chassis_vni + }} + + # For each IP interface + for intf in phyport_intfs: + # A IP interface may have multiple entries. + # For example, "Ethernet0": {}", "Ethernet0|192.168.1.1": {}" + # We only care about the one without IP information + if is_ip_prefix_in_key(intf) == True: + continue + + neighbor_router = results['DEVICE_NEIGHBOR'][intf]['name'] + + # If the neighbor router is an external router + if devices[neighbor_router]['type'] != chassis_backend_role: + # Enslave the interface to a Vnet + phyport_intfs[intf] = {'vnet_name': chassis_vnet} + + # For each port channel IP interface + for pc_intf in pc_intfs: + # A port channel IP interface may have multiple entries. + # For example, "Portchannel0": {}", "Portchannel0|192.168.1.1": {}" + # We only care about the one without IP information + if is_ip_prefix_in_key(pc_intf) == True: + continue + + intf_name = None + # Get a physical interface that belongs to this port channel + for pc_member in pc_members: + if pc_member[0] == pc_intf: + intf_name = pc_member[1] + break + + if intf_name == None: + print >> sys.stderr, 'Warning: cannot find any interfaces that belong to %s' % (pc_intf) + continue + + # Get the neighbor router of this port channel interface + neighbor_router = results['DEVICE_NEIGHBOR'][intf_name]['name'] + + # If the neighbor router is an external router + if devices[neighbor_router]['type'] != chassis_backend_role: + # Enslave the port channel interface to a Vnet + pc_intfs[pc_intf] = {'vnet_name': chassis_vnet} + +############################################################################### +# +# Post-processing functions +# +############################################################################### + +def filter_acl_mirror_table_bindings(acls, neighbors, port_channels): + """ + Filters out inactive front-panel ports from the binding list for mirror + ACL tables. We define an "active" port as one that is a member of a + port channel or one that is connected to a neighboring device. + """ + + for acl_table, group_params in acls.iteritems(): + group_type = group_params.get('type', None) + + if group_type != 'MIRROR' and group_type != 'MIRRORV6': + continue + + active_ports = [ port for port in group_params.get('ports', []) if port in neighbors.keys() or port in port_channels ] + + if not active_ports: + print >> sys.stderr, 'Warning: mirror table {} in ACL_TABLE does not have any ports bound to it'.format(acl_table) + + acls[acl_table]['ports'] = active_ports + + return acls + +############################################################################### +# +# Main functions +# +############################################################################### + +def parse_xml(filename, platform=None, port_config_file=None): + root = ET.parse(filename).getroot() + mini_graph_path = filename + + u_neighbors = None + u_devices = None + hwsku = None + bgp_sessions = None + bgp_monitors = [] + bgp_asn = None + intfs = None + vlan_intfs = None + pc_intfs = None + vlans = None + vlan_members = None + pcs = None + mgmt_intf = None + lo_intfs = None + neighbors = None + devices = None + hostname = None + docker_routing_config_mode = "separated" + port_speeds_default = {} + port_speed_png = {} + port_descriptions = {} + console_ports = {} + syslog_servers = [] + dhcp_servers = [] + ntp_servers = [] + tacacs_servers = [] + mgmt_routes = [] + erspan_dst = [] + bgp_peers_with_range = None + deployment_id = None + + hwsku_qn = QName(ns, "HwSku") + hostname_qn = QName(ns, "Hostname") + docker_routing_config_mode_qn = QName(ns, "DockerRoutingConfigMode") + for child in root: + if child.tag == str(hwsku_qn): + hwsku = child.text + if child.tag == str(hostname_qn): + hostname = child.text + if child.tag == str(docker_routing_config_mode_qn): + docker_routing_config_mode = child.text + + (ports, alias_map) = get_port_config(hwsku, platform, port_config_file) + port_alias_map.update(alias_map) + for child in root: + if child.tag == str(QName(ns, "DpgDec")): + (intfs, lo_intfs, mvrf, mgmt_intf, vlans, vlan_members, pcs, pc_members, acls, vni) = parse_dpg(child, hostname) + elif child.tag == str(QName(ns, "CpgDec")): + (bgp_sessions, bgp_asn, bgp_peers_with_range, bgp_monitors) = parse_cpg(child, hostname) + elif child.tag == str(QName(ns, "PngDec")): + (neighbors, devices, console_dev, console_port, mgmt_dev, mgmt_port, port_speed_png, console_ports) = parse_png(child, hostname) + elif child.tag == str(QName(ns, "UngDec")): + (u_neighbors, u_devices, _, _, _, _, _, _) = parse_png(child, hostname) + elif child.tag == str(QName(ns, "MetadataDeclaration")): + (syslog_servers, dhcp_servers, ntp_servers, tacacs_servers, mgmt_routes, erspan_dst, deployment_id) = parse_meta(child, hostname) + elif child.tag == str(QName(ns, "DeviceInfos")): + (port_speeds_default, port_descriptions) = parse_deviceinfo(child, hwsku) + + current_device = [devices[key] for key in devices if key.lower() == hostname.lower()][0] + results = {} + results['DEVICE_METADATA'] = {'localhost': { + 'bgp_asn': bgp_asn, + 'deployment_id': deployment_id, + 'docker_routing_config_mode': docker_routing_config_mode, + 'hostname': hostname, + 'hwsku': hwsku, + 'type': current_device['type'] + }, + 'x509': { + 'server_crt': '/etc/sonic/telemetry/streamingtelemetryserver.cer', + 'server_key': '/etc/sonic/telemetry/streamingtelemetryserver.key', + 'ca_crt': '/etc/sonic/telemetry/dsmsroot.cer' + } + } + results['BGP_NEIGHBOR'] = bgp_sessions + results['BGP_MONITORS'] = bgp_monitors + results['BGP_PEER_RANGE'] = bgp_peers_with_range + if mgmt_routes: + # TODO: differentiate v4 and v6 + mgmt_intf.itervalues().next()['forced_mgmt_routes'] = mgmt_routes + results['MGMT_PORT'] = {} + results['MGMT_INTERFACE'] = {} + mgmt_intf_count = 0 + mgmt_alias_reverse_mapping = {} + for key in mgmt_intf: + alias = key[0] + if mgmt_alias_reverse_mapping.has_key(alias): + name = mgmt_alias_reverse_mapping[alias] + else: + name = 'eth' + str(mgmt_intf_count) + mgmt_intf_count += 1 + mgmt_alias_reverse_mapping[alias] = name + results['MGMT_PORT'][name] = {'alias': alias, 'admin_status': 'up'} + if alias in port_speeds_default: + results['MGMT_PORT'][name]['speed'] = port_speeds_default[alias] + results['MGMT_INTERFACE'][(name, key[1])] = mgmt_intf[key] + results['LOOPBACK_INTERFACE'] = {} + for lo_intf in lo_intfs: + results['LOOPBACK_INTERFACE'][lo_intf] = lo_intfs[lo_intf] + results['LOOPBACK_INTERFACE'][lo_intf[0]] = {} + results['MGMT_VRF_CONFIG'] = mvrf + + phyport_intfs = {} + vlan_intfs = {} + pc_intfs = {} + vlan_invert_mapping = { v['alias']:k for k,v in vlans.items() if v.has_key('alias') } + vlan_sub_intfs = {} + + for intf in intfs: + if intf[0][0:4] == 'Vlan': + vlan_intfs[intf] = {} + vlan_intfs[intf[0]] = {} + elif vlan_invert_mapping.has_key(intf[0]): + vlan_intfs[(vlan_invert_mapping[intf[0]], intf[1])] = {} + vlan_intfs[vlan_invert_mapping[intf[0]]] = {} + elif intf[0][0:11] == 'PortChannel': + pc_intfs[intf] = {} + pc_intfs[intf[0]] = {} + else: + phyport_intfs[intf] = {} + phyport_intfs[intf[0]] = {} + + results['INTERFACE'] = phyport_intfs + results['VLAN_INTERFACE'] = vlan_intfs + + for port_name in port_speeds_default: + # ignore port not in port_config.ini + if not ports.has_key(port_name): + continue + + ports.setdefault(port_name, {})['speed'] = port_speeds_default[port_name] + + for port_name in port_speed_png: + # not consider port not in port_config.ini + if port_name not in ports: + print >> sys.stderr, "Warning: ignore interface '%s' as it is not in the port_config.ini" % port_name + continue + + ports.setdefault(port_name, {})['speed'] = port_speed_png[port_name] + + for port_name, port in ports.items(): + if port.get('speed') == '100000': + port['fec'] = 'rs' + + # set port description if parsed from deviceinfo + for port_name in port_descriptions: + # ignore port not in port_config.ini + if not ports.has_key(port_name): + continue + + ports.setdefault(port_name, {})['description'] = port_descriptions[port_name] + + for port_name, port in ports.items(): + if not port.get('description'): + if neighbors.has_key(port_name): + # for the ports w/o description set it to neighbor name:port + port['description'] = "%s:%s" % (neighbors[port_name]['name'], neighbors[port_name]['port']) + else: + # for the ports w/o neighbor info, set it to port alias + port['description'] = port.get('alias', port_name) + + # set default port MTU as 9100 + for port in ports.itervalues(): + port['mtu'] = '9100' + + # asymmetric PFC is disabled by default + for port in ports.itervalues(): + port['pfc_asym'] = 'off' + + # set physical port default admin status up + for port in phyport_intfs: + if port[0] in ports: + ports.get(port[0])['admin_status'] = 'up' + + for member in pc_members.keys() + vlan_members.keys(): + port = ports.get(member[1]) + if port: + port['admin_status'] = 'up' + + results['PORT'] = ports + results['CONSOLE_PORT'] = console_ports + + if port_config_file: + port_set = set(ports.keys()) + for (pc_name, mbr_map) in pcs.items(): + # remove portchannels that contain ports not existing in port_config.ini + # when port_config.ini exists + if not set(mbr_map['members']).issubset(port_set): + print >> sys.stderr, "Warning: ignore '%s' as part of its member interfaces is not in the port_config.ini" % pc_name + del pcs[pc_name] + + # set default port channel MTU as 9100 and admin status up + for pc in pcs.itervalues(): + pc['mtu'] = '9100' + pc['admin_status'] = 'up' + + results['PORTCHANNEL'] = pcs + results['PORTCHANNEL_MEMBER'] = pc_members + + for pc_intf in pc_intfs.keys(): + # remove portchannels not in PORTCHANNEL dictionary + if isinstance(pc_intf, tuple) and pc_intf[0] not in pcs: + print >> sys.stderr, "Warning: ignore '%s' interface '%s' as '%s' is not in the valid PortChannel list" % (pc_intf[0], pc_intf[1], pc_intf[0]) + del pc_intfs[pc_intf] + pc_intfs.pop(pc_intf[0], None) + + results['PORTCHANNEL_INTERFACE'] = pc_intfs + + if current_device['type'] in backend_device_types: + del results['INTERFACE'] + del results['PORTCHANNEL_INTERFACE'] + + for intf in phyport_intfs.keys(): + if isinstance(intf, tuple): + intf_info = list(intf) + intf_info[0] = intf_info[0] + VLAN_SUB_INTERFACE_SEPARATOR + VLAN_SUB_INTERFACE_VLAN_ID + sub_intf = tuple(intf_info) + vlan_sub_intfs[sub_intf] = {} + else: + sub_intf = intf + VLAN_SUB_INTERFACE_SEPARATOR + VLAN_SUB_INTERFACE_VLAN_ID + vlan_sub_intfs[sub_intf] = {"admin_status" : "up"} + + for pc_intf in pc_intfs.keys(): + if isinstance(pc_intf, tuple): + pc_intf_info = list(pc_intf) + pc_intf_info[0] = pc_intf_info[0] + VLAN_SUB_INTERFACE_SEPARATOR + VLAN_SUB_INTERFACE_VLAN_ID + sub_intf = tuple(pc_intf_info) + vlan_sub_intfs[sub_intf] = {} + else: + sub_intf = pc_intf + VLAN_SUB_INTERFACE_SEPARATOR + VLAN_SUB_INTERFACE_VLAN_ID + vlan_sub_intfs[sub_intf] = {"admin_status" : "up"} + + results['VLAN_SUB_INTERFACE'] = vlan_sub_intfs + + results['VLAN'] = vlans + results['VLAN_MEMBER'] = vlan_members + + for nghbr in neighbors.keys(): + # remove port not in port_config.ini + if nghbr not in ports: + print >> sys.stderr, "Warning: ignore interface '%s' in DEVICE_NEIGHBOR as it is not in the port_config.ini" % nghbr + del neighbors[nghbr] + + results['DEVICE_NEIGHBOR'] = neighbors + results['DEVICE_NEIGHBOR_METADATA'] = { key:devices[key] for key in devices if key.lower() != hostname.lower() } + results['SYSLOG_SERVER'] = dict((item, {}) for item in syslog_servers) + results['DHCP_SERVER'] = dict((item, {}) for item in dhcp_servers) + results['NTP_SERVER'] = dict((item, {}) for item in ntp_servers) + results['TACPLUS_SERVER'] = dict((item, {'priority': '1', 'tcp_port': '49'}) for item in tacacs_servers) + results['ACL_TABLE'] = filter_acl_mirror_table_bindings(acls, neighbors, pcs) + results['FEATURE'] = { + 'telemetry': { + 'status': 'enabled' + } + } + results['TELEMETRY'] = { + 'gnmi': { + 'client_auth': 'true', + 'port': '50051', + 'log_level': '2' + } + } + + # Do not configure the minigraph's mirror session, which is currently unused + # mirror_sessions = {} + # if erspan_dst: + # lo_addr = '0.0.0.0' + # for lo in lo_intfs: + # lo_network = ipaddress.IPNetwork(lo[1]) + # if lo_network.version == 4: + # lo_addr = str(lo_network.ip) + # break + # count = 0 + # for dst in erspan_dst: + # mirror_sessions['everflow{}'.format(count)] = {"dst_ip": dst, "src_ip": lo_addr} + # count += 1 + # results['MIRROR_SESSION'] = mirror_sessions + + # Special parsing for spine chassis frontend routers + if current_device['type'] == spine_chassis_frontend_role: + parse_spine_chassis_fe(results, vni, lo_intfs, phyport_intfs, pc_intfs, pc_members, devices) + + return results + + +def parse_device_desc_xml(filename): + root = ET.parse(filename).getroot() + (lo_prefix, mgmt_prefix, hostname, hwsku, d_type, _) = parse_device(root) + + results = {} + results['DEVICE_METADATA'] = {'localhost': { + 'hostname': hostname, + 'hwsku': hwsku, + }} + + results['LOOPBACK_INTERFACE'] = {('lo', lo_prefix): {}} + + mgmt_intf = {} + mgmtipn = ipaddress.IPNetwork(mgmt_prefix) + gwaddr = ipaddress.IPAddress(int(mgmtipn.network) + 1) + results['MGMT_INTERFACE'] = {('eth0', mgmt_prefix): {'gwaddr': gwaddr}} + + return results + + +port_alias_map = {} + + +def print_parse_xml(filename): + results = parse_xml(filename) + print(json.dumps(results, indent=3, cls=minigraph_encoder)) diff --git a/src/sonic-config-engine/openconfig_acl.py b/src/sonic-config-engine/openconfig_acl.py new file mode 100644 index 00000000000..cb29183652e --- /dev/null +++ b/src/sonic-config-engine/openconfig_acl.py @@ -0,0 +1,7542 @@ +# This file is auto generated by pyangbind: https://github.com/robshakir/pyangbind +# from https://github.com/openconfig/public/blob/master/release/models/acl/openconfig-acl.yang +# +# Detail step to regenerate this file: +# 1. Sync openconfig ACL yang models from https://github.com/openconfig/public/tree/master/release/models/acl +# 2. Sync inet yang models which contain type dependencies for openconfig ACL yang models from https://github.com/YangModels/yang/tree/master/standard/ietf/RFC , and put them in the same folder with models from step 1. +# 3. Install PyangBind: +# pip install pyangbind +# 4. Get PyangBind install path: +# export PYBINDPLUGIN=`/usr/bin/env python -c \ +# 'import pyangbind; import os; print "%s/plugin" % os.path.dirname(pyangbind.__file__)'` +# 5. Generate this file with pyang: +# pyang --plugindir $PYBINDPLUGIN -f pybind -o openconfig_acl.py openconfig-acl.yang + +from operator import attrgetter +from pyangbind.lib.yangtypes import RestrictedPrecisionDecimalType, RestrictedClassType, TypedListType +from pyangbind.lib.yangtypes import YANGBool, YANGListType, YANGDynClass, ReferenceType +from pyangbind.lib.base import PybindBase +from decimal import Decimal +from bitarray import bitarray +import __builtin__ +class yc_state_openconfig_acl__acl_state(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/state. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Global operational state data for ACLs + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__counter_capability',) + + _yang_name = 'state' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__counter_capability = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-acl:AGGREGATE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:INTERFACE_AGGREGATE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'AGGREGATE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'INTERFACE_AGGREGATE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'INTERFACE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:INTERFACE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), is_leaf=True, yang_name="counter-capability", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'state'] + + def _get_counter_capability(self): + """ + Getter method for counter_capability, mapped from YANG variable /acl/state/counter_capability (identityref) + + YANG Description: System reported indication of how ACL counters are reported +by the target + """ + return self.__counter_capability + + def _set_counter_capability(self, v, load=False): + """ + Setter method for counter_capability, mapped from YANG variable /acl/state/counter_capability (identityref) + If this variable is read-only (config: false) in the + source YANG file, then _set_counter_capability is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_counter_capability() directly. + + YANG Description: System reported indication of how ACL counters are reported +by the target + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-acl:AGGREGATE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:INTERFACE_AGGREGATE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'AGGREGATE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'INTERFACE_AGGREGATE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'INTERFACE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:INTERFACE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), is_leaf=True, yang_name="counter-capability", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """counter_capability must be of a type compatible with identityref""", + 'defined-type': "openconfig-acl:identityref", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-acl:AGGREGATE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:INTERFACE_AGGREGATE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'AGGREGATE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'INTERFACE_AGGREGATE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'INTERFACE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:INTERFACE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), is_leaf=True, yang_name="counter-capability", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False)""", + }) + + self.__counter_capability = t + if hasattr(self, '_set'): + self._set() + + def _unset_counter_capability(self): + self.__counter_capability = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-acl:AGGREGATE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:INTERFACE_AGGREGATE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'AGGREGATE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'INTERFACE_AGGREGATE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'INTERFACE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:INTERFACE_ONLY': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), is_leaf=True, yang_name="counter-capability", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False) + + counter_capability = __builtin__.property(_get_counter_capability) + + + _pyangbind_elements = {'counter_capability': counter_capability, } + + +class yc_config_openconfig_acl__acl_acl_sets_acl_set_config(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/config. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Access list config + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__name','__description',) + + _yang_name = 'config' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__name = YANGDynClass(base=unicode, is_leaf=True, yang_name="name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=True) + self.__description = YANGDynClass(base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'config'] + + def _get_name(self): + """ + Getter method for name, mapped from YANG variable /acl/acl_sets/acl_set/config/name (string) + + YANG Description: The name of the access-list set + """ + return self.__name + + def _set_name(self, v, load=False): + """ + Setter method for name, mapped from YANG variable /acl/acl_sets/acl_set/config/name (string) + If this variable is read-only (config: false) in the + source YANG file, then _set_name is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_name() directly. + + YANG Description: The name of the access-list set + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """name must be of a type compatible with string""", + 'defined-type': "string", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=True)""", + }) + + self.__name = t + if hasattr(self, '_set'): + self._set() + + def _unset_name(self): + self.__name = YANGDynClass(base=unicode, is_leaf=True, yang_name="name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=True) + + + def _get_description(self): + """ + Getter method for description, mapped from YANG variable /acl/acl_sets/acl_set/config/description (string) + + YANG Description: Description, or comment, for the ACL set + """ + return self.__description + + def _set_description(self, v, load=False): + """ + Setter method for description, mapped from YANG variable /acl/acl_sets/acl_set/config/description (string) + If this variable is read-only (config: false) in the + source YANG file, then _set_description is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_description() directly. + + YANG Description: Description, or comment, for the ACL set + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """description must be of a type compatible with string""", + 'defined-type': "string", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=True)""", + }) + + self.__description = t + if hasattr(self, '_set'): + self._set() + + def _unset_description(self): + self.__description = YANGDynClass(base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=True) + + name = __builtin__.property(_get_name, _set_name) + description = __builtin__.property(_get_description, _set_description) + + + _pyangbind_elements = {'name': name, 'description': description, } + + +class yc_state_openconfig_acl__acl_acl_sets_acl_set_state(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/state. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Access list state information + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__name','__description',) + + _yang_name = 'state' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__name = YANGDynClass(base=unicode, is_leaf=True, yang_name="name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=False) + self.__description = YANGDynClass(base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'state'] + + def _get_name(self): + """ + Getter method for name, mapped from YANG variable /acl/acl_sets/acl_set/state/name (string) + + YANG Description: The name of the access-list set + """ + return self.__name + + def _set_name(self, v, load=False): + """ + Setter method for name, mapped from YANG variable /acl/acl_sets/acl_set/state/name (string) + If this variable is read-only (config: false) in the + source YANG file, then _set_name is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_name() directly. + + YANG Description: The name of the access-list set + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """name must be of a type compatible with string""", + 'defined-type': "string", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=False)""", + }) + + self.__name = t + if hasattr(self, '_set'): + self._set() + + def _unset_name(self): + self.__name = YANGDynClass(base=unicode, is_leaf=True, yang_name="name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=False) + + + def _get_description(self): + """ + Getter method for description, mapped from YANG variable /acl/acl_sets/acl_set/state/description (string) + + YANG Description: Description, or comment, for the ACL set + """ + return self.__description + + def _set_description(self, v, load=False): + """ + Setter method for description, mapped from YANG variable /acl/acl_sets/acl_set/state/description (string) + If this variable is read-only (config: false) in the + source YANG file, then _set_description is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_description() directly. + + YANG Description: Description, or comment, for the ACL set + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """description must be of a type compatible with string""", + 'defined-type': "string", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=False)""", + }) + + self.__description = t + if hasattr(self, '_set'): + self._set() + + def _unset_description(self): + self.__description = YANGDynClass(base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=False) + + name = __builtin__.property(_get_name) + description = __builtin__.property(_get_description) + + + _pyangbind_elements = {'name': name, 'description': description, } + + +class yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_config(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/config. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Access list entries config + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__sequence_id','__description',) + + _yang_name = 'config' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__sequence_id = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint32', is_config=True) + self.__description = YANGDynClass(base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'config'] + + def _get_sequence_id(self): + """ + Getter method for sequence_id, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/config/sequence_id (uint32) + + YANG Description: The sequence id determines the order in which ACL entries +are applied. The sequence id must be unique for each entry +in an ACL set. Target devices should apply the ACL entry +rules in the order determined by sequence id, rather than +the relying only on order in the list. + """ + return self.__sequence_id + + def _set_sequence_id(self, v, load=False): + """ + Setter method for sequence_id, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/config/sequence_id (uint32) + If this variable is read-only (config: false) in the + source YANG file, then _set_sequence_id is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_sequence_id() directly. + + YANG Description: The sequence id determines the order in which ACL entries +are applied. The sequence id must be unique for each entry +in an ACL set. Target devices should apply the ACL entry +rules in the order determined by sequence id, rather than +the relying only on order in the list. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint32', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """sequence_id must be of a type compatible with uint32""", + 'defined-type': "uint32", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint32', is_config=True)""", + }) + + self.__sequence_id = t + if hasattr(self, '_set'): + self._set() + + def _unset_sequence_id(self): + self.__sequence_id = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint32', is_config=True) + + + def _get_description(self): + """ + Getter method for description, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/config/description (string) + + YANG Description: A user-defined description, or comment, for this Access List +Entry. + """ + return self.__description + + def _set_description(self, v, load=False): + """ + Setter method for description, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/config/description (string) + If this variable is read-only (config: false) in the + source YANG file, then _set_description is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_description() directly. + + YANG Description: A user-defined description, or comment, for this Access List +Entry. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """description must be of a type compatible with string""", + 'defined-type': "string", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=True)""", + }) + + self.__description = t + if hasattr(self, '_set'): + self._set() + + def _unset_description(self): + self.__description = YANGDynClass(base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=True) + + sequence_id = __builtin__.property(_get_sequence_id, _set_sequence_id) + description = __builtin__.property(_get_description, _set_description) + + + _pyangbind_elements = {'sequence_id': sequence_id, 'description': description, } + + +class yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_state(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/state. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: State information for ACL entries + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__sequence_id','__description','__matched_packets','__matched_octets',) + + _yang_name = 'state' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__matched_octets = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-octets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + self.__sequence_id = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint32', is_config=False) + self.__description = YANGDynClass(base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=False) + self.__matched_packets = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-packets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'state'] + + def _get_sequence_id(self): + """ + Getter method for sequence_id, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/state/sequence_id (uint32) + + YANG Description: The sequence id determines the order in which ACL entries +are applied. The sequence id must be unique for each entry +in an ACL set. Target devices should apply the ACL entry +rules in the order determined by sequence id, rather than +the relying only on order in the list. + """ + return self.__sequence_id + + def _set_sequence_id(self, v, load=False): + """ + Setter method for sequence_id, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/state/sequence_id (uint32) + If this variable is read-only (config: false) in the + source YANG file, then _set_sequence_id is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_sequence_id() directly. + + YANG Description: The sequence id determines the order in which ACL entries +are applied. The sequence id must be unique for each entry +in an ACL set. Target devices should apply the ACL entry +rules in the order determined by sequence id, rather than +the relying only on order in the list. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint32', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """sequence_id must be of a type compatible with uint32""", + 'defined-type': "uint32", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint32', is_config=False)""", + }) + + self.__sequence_id = t + if hasattr(self, '_set'): + self._set() + + def _unset_sequence_id(self): + self.__sequence_id = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint32', is_config=False) + + + def _get_description(self): + """ + Getter method for description, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/state/description (string) + + YANG Description: A user-defined description, or comment, for this Access List +Entry. + """ + return self.__description + + def _set_description(self, v, load=False): + """ + Setter method for description, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/state/description (string) + If this variable is read-only (config: false) in the + source YANG file, then _set_description is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_description() directly. + + YANG Description: A user-defined description, or comment, for this Access List +Entry. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """description must be of a type compatible with string""", + 'defined-type': "string", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=False)""", + }) + + self.__description = t + if hasattr(self, '_set'): + self._set() + + def _unset_description(self): + self.__description = YANGDynClass(base=unicode, is_leaf=True, yang_name="description", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='string', is_config=False) + + + def _get_matched_packets(self): + """ + Getter method for matched_packets, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/state/matched_packets (yang:counter64) + + YANG Description: Count of the number of packets matching the current ACL +entry. + +An implementation should provide this counter on a +per-interface per-ACL-entry if possible. + +If an implementation only supports ACL counters per entry +(i.e., not broken out per interface), then the value +should be equal to the aggregate count across all interfaces. + +An implementation that provides counters per entry per +interface is not required to also provide an aggregate count, +e.g., per entry -- the user is expected to be able implement +the required aggregation if such a count is needed. + """ + return self.__matched_packets + + def _set_matched_packets(self, v, load=False): + """ + Setter method for matched_packets, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/state/matched_packets (yang:counter64) + If this variable is read-only (config: false) in the + source YANG file, then _set_matched_packets is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_matched_packets() directly. + + YANG Description: Count of the number of packets matching the current ACL +entry. + +An implementation should provide this counter on a +per-interface per-ACL-entry if possible. + +If an implementation only supports ACL counters per entry +(i.e., not broken out per interface), then the value +should be equal to the aggregate count across all interfaces. + +An implementation that provides counters per entry per +interface is not required to also provide an aggregate count, +e.g., per entry -- the user is expected to be able implement +the required aggregation if such a count is needed. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-packets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """matched_packets must be of a type compatible with yang:counter64""", + 'defined-type': "yang:counter64", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-packets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False)""", + }) + + self.__matched_packets = t + if hasattr(self, '_set'): + self._set() + + def _unset_matched_packets(self): + self.__matched_packets = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-packets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + + + def _get_matched_octets(self): + """ + Getter method for matched_octets, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/state/matched_octets (yang:counter64) + + YANG Description: Count of the number of octets (bytes) matching the current +ACL entry. + +An implementation should provide this counter on a +per-interface per-ACL-entry if possible. + +If an implementation only supports ACL counters per entry +(i.e., not broken out per interface), then the value +should be equal to the aggregate count across all interfaces. + +An implementation that provides counters per entry per +interface is not required to also provide an aggregate count, +e.g., per entry -- the user is expected to be able implement +the required aggregation if such a count is needed. + """ + return self.__matched_octets + + def _set_matched_octets(self, v, load=False): + """ + Setter method for matched_octets, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/state/matched_octets (yang:counter64) + If this variable is read-only (config: false) in the + source YANG file, then _set_matched_octets is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_matched_octets() directly. + + YANG Description: Count of the number of octets (bytes) matching the current +ACL entry. + +An implementation should provide this counter on a +per-interface per-ACL-entry if possible. + +If an implementation only supports ACL counters per entry +(i.e., not broken out per interface), then the value +should be equal to the aggregate count across all interfaces. + +An implementation that provides counters per entry per +interface is not required to also provide an aggregate count, +e.g., per entry -- the user is expected to be able implement +the required aggregation if such a count is needed. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-octets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """matched_octets must be of a type compatible with yang:counter64""", + 'defined-type': "yang:counter64", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-octets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False)""", + }) + + self.__matched_octets = t + if hasattr(self, '_set'): + self._set() + + def _unset_matched_octets(self): + self.__matched_octets = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-octets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + + sequence_id = __builtin__.property(_get_sequence_id) + description = __builtin__.property(_get_description) + matched_packets = __builtin__.property(_get_matched_packets) + matched_octets = __builtin__.property(_get_matched_octets) + + + _pyangbind_elements = {'sequence_id': sequence_id, 'description': description, 'matched_packets': matched_packets, 'matched_octets': matched_octets, } + + +class yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2_config(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/l2/config. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Configuration data + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__source_mac','__source_mac_mask','__destination_mac','__destination_mac_mask','__ethertype',) + + _yang_name = 'config' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__source_mac = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True) + self.__destination_mac = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True) + self.__destination_mac_mask = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True) + self.__ethertype = YANGDynClass(base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'1..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="ethertype", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ethertype-type', is_config=True) + self.__source_mac_mask = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'l2', u'config'] + + def _get_source_mac(self): + """ + Getter method for source_mac, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/config/source_mac (yang:mac-address) + + YANG Description: Source IEEE 802 MAC address. + """ + return self.__source_mac + + def _set_source_mac(self, v, load=False): + """ + Setter method for source_mac, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/config/source_mac (yang:mac-address) + If this variable is read-only (config: false) in the + source YANG file, then _set_source_mac is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_source_mac() directly. + + YANG Description: Source IEEE 802 MAC address. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """source_mac must be of a type compatible with yang:mac-address""", + 'defined-type': "yang:mac-address", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True)""", + }) + + self.__source_mac = t + if hasattr(self, '_set'): + self._set() + + def _unset_source_mac(self): + self.__source_mac = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True) + + + def _get_source_mac_mask(self): + """ + Getter method for source_mac_mask, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/config/source_mac_mask (yang:mac-address) + + YANG Description: Source IEEE 802 MAC address mask. + """ + return self.__source_mac_mask + + def _set_source_mac_mask(self, v, load=False): + """ + Setter method for source_mac_mask, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/config/source_mac_mask (yang:mac-address) + If this variable is read-only (config: false) in the + source YANG file, then _set_source_mac_mask is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_source_mac_mask() directly. + + YANG Description: Source IEEE 802 MAC address mask. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """source_mac_mask must be of a type compatible with yang:mac-address""", + 'defined-type': "yang:mac-address", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True)""", + }) + + self.__source_mac_mask = t + if hasattr(self, '_set'): + self._set() + + def _unset_source_mac_mask(self): + self.__source_mac_mask = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True) + + + def _get_destination_mac(self): + """ + Getter method for destination_mac, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/config/destination_mac (yang:mac-address) + + YANG Description: Destination IEEE 802 MAC address. + """ + return self.__destination_mac + + def _set_destination_mac(self, v, load=False): + """ + Setter method for destination_mac, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/config/destination_mac (yang:mac-address) + If this variable is read-only (config: false) in the + source YANG file, then _set_destination_mac is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_destination_mac() directly. + + YANG Description: Destination IEEE 802 MAC address. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """destination_mac must be of a type compatible with yang:mac-address""", + 'defined-type': "yang:mac-address", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True)""", + }) + + self.__destination_mac = t + if hasattr(self, '_set'): + self._set() + + def _unset_destination_mac(self): + self.__destination_mac = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True) + + + def _get_destination_mac_mask(self): + """ + Getter method for destination_mac_mask, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/config/destination_mac_mask (yang:mac-address) + + YANG Description: Destination IEEE 802 MAC address mask. + """ + return self.__destination_mac_mask + + def _set_destination_mac_mask(self, v, load=False): + """ + Setter method for destination_mac_mask, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/config/destination_mac_mask (yang:mac-address) + If this variable is read-only (config: false) in the + source YANG file, then _set_destination_mac_mask is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_destination_mac_mask() directly. + + YANG Description: Destination IEEE 802 MAC address mask. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """destination_mac_mask must be of a type compatible with yang:mac-address""", + 'defined-type': "yang:mac-address", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True)""", + }) + + self.__destination_mac_mask = t + if hasattr(self, '_set'): + self._set() + + def _unset_destination_mac_mask(self): + self.__destination_mac_mask = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=True) + + + def _get_ethertype(self): + """ + Getter method for ethertype, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/config/ethertype (oc-pkt-match-types:ethertype-type) + + YANG Description: Ethertype field to match in Ethernet packets + """ + return self.__ethertype + + def _set_ethertype(self, v, load=False): + """ + Setter method for ethertype, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/config/ethertype (oc-pkt-match-types:ethertype-type) + If this variable is read-only (config: false) in the + source YANG file, then _set_ethertype is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_ethertype() directly. + + YANG Description: Ethertype field to match in Ethernet packets + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'1..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="ethertype", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ethertype-type', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """ethertype must be of a type compatible with oc-pkt-match-types:ethertype-type""", + 'defined-type': "oc-pkt-match-types:ethertype-type", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'1..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="ethertype", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ethertype-type', is_config=True)""", + }) + + self.__ethertype = t + if hasattr(self, '_set'): + self._set() + + def _unset_ethertype(self): + self.__ethertype = YANGDynClass(base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'1..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="ethertype", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ethertype-type', is_config=True) + + source_mac = __builtin__.property(_get_source_mac, _set_source_mac) + source_mac_mask = __builtin__.property(_get_source_mac_mask, _set_source_mac_mask) + destination_mac = __builtin__.property(_get_destination_mac, _set_destination_mac) + destination_mac_mask = __builtin__.property(_get_destination_mac_mask, _set_destination_mac_mask) + ethertype = __builtin__.property(_get_ethertype, _set_ethertype) + + + _pyangbind_elements = {'source_mac': source_mac, 'source_mac_mask': source_mac_mask, 'destination_mac': destination_mac, 'destination_mac_mask': destination_mac_mask, 'ethertype': ethertype, } + + +class yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2_state(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/l2/state. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: State Information. + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__source_mac','__source_mac_mask','__destination_mac','__destination_mac_mask','__ethertype',) + + _yang_name = 'state' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__source_mac = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False) + self.__destination_mac = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False) + self.__destination_mac_mask = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False) + self.__ethertype = YANGDynClass(base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'1..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="ethertype", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ethertype-type', is_config=False) + self.__source_mac_mask = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'l2', u'state'] + + def _get_source_mac(self): + """ + Getter method for source_mac, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/state/source_mac (yang:mac-address) + + YANG Description: Source IEEE 802 MAC address. + """ + return self.__source_mac + + def _set_source_mac(self, v, load=False): + """ + Setter method for source_mac, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/state/source_mac (yang:mac-address) + If this variable is read-only (config: false) in the + source YANG file, then _set_source_mac is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_source_mac() directly. + + YANG Description: Source IEEE 802 MAC address. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """source_mac must be of a type compatible with yang:mac-address""", + 'defined-type': "yang:mac-address", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False)""", + }) + + self.__source_mac = t + if hasattr(self, '_set'): + self._set() + + def _unset_source_mac(self): + self.__source_mac = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False) + + + def _get_source_mac_mask(self): + """ + Getter method for source_mac_mask, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/state/source_mac_mask (yang:mac-address) + + YANG Description: Source IEEE 802 MAC address mask. + """ + return self.__source_mac_mask + + def _set_source_mac_mask(self, v, load=False): + """ + Setter method for source_mac_mask, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/state/source_mac_mask (yang:mac-address) + If this variable is read-only (config: false) in the + source YANG file, then _set_source_mac_mask is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_source_mac_mask() directly. + + YANG Description: Source IEEE 802 MAC address mask. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """source_mac_mask must be of a type compatible with yang:mac-address""", + 'defined-type': "yang:mac-address", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False)""", + }) + + self.__source_mac_mask = t + if hasattr(self, '_set'): + self._set() + + def _unset_source_mac_mask(self): + self.__source_mac_mask = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="source-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False) + + + def _get_destination_mac(self): + """ + Getter method for destination_mac, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/state/destination_mac (yang:mac-address) + + YANG Description: Destination IEEE 802 MAC address. + """ + return self.__destination_mac + + def _set_destination_mac(self, v, load=False): + """ + Setter method for destination_mac, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/state/destination_mac (yang:mac-address) + If this variable is read-only (config: false) in the + source YANG file, then _set_destination_mac is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_destination_mac() directly. + + YANG Description: Destination IEEE 802 MAC address. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """destination_mac must be of a type compatible with yang:mac-address""", + 'defined-type': "yang:mac-address", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False)""", + }) + + self.__destination_mac = t + if hasattr(self, '_set'): + self._set() + + def _unset_destination_mac(self): + self.__destination_mac = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False) + + + def _get_destination_mac_mask(self): + """ + Getter method for destination_mac_mask, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/state/destination_mac_mask (yang:mac-address) + + YANG Description: Destination IEEE 802 MAC address mask. + """ + return self.__destination_mac_mask + + def _set_destination_mac_mask(self, v, load=False): + """ + Setter method for destination_mac_mask, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/state/destination_mac_mask (yang:mac-address) + If this variable is read-only (config: false) in the + source YANG file, then _set_destination_mac_mask is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_destination_mac_mask() directly. + + YANG Description: Destination IEEE 802 MAC address mask. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """destination_mac_mask must be of a type compatible with yang:mac-address""", + 'defined-type': "yang:mac-address", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False)""", + }) + + self.__destination_mac_mask = t + if hasattr(self, '_set'): + self._set() + + def _unset_destination_mac_mask(self): + self.__destination_mac_mask = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}'}), is_leaf=True, yang_name="destination-mac-mask", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:mac-address', is_config=False) + + + def _get_ethertype(self): + """ + Getter method for ethertype, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/state/ethertype (oc-pkt-match-types:ethertype-type) + + YANG Description: Ethertype field to match in Ethernet packets + """ + return self.__ethertype + + def _set_ethertype(self, v, load=False): + """ + Setter method for ethertype, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/state/ethertype (oc-pkt-match-types:ethertype-type) + If this variable is read-only (config: false) in the + source YANG file, then _set_ethertype is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_ethertype() directly. + + YANG Description: Ethertype field to match in Ethernet packets + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'1..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="ethertype", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ethertype-type', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """ethertype must be of a type compatible with oc-pkt-match-types:ethertype-type""", + 'defined-type': "oc-pkt-match-types:ethertype-type", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'1..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="ethertype", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ethertype-type', is_config=False)""", + }) + + self.__ethertype = t + if hasattr(self, '_set'): + self._set() + + def _unset_ethertype(self): + self.__ethertype = YANGDynClass(base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'1..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_ARP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_VLAN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_ROCE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV6': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_MPLS': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:ETHERTYPE_IPV4': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'ETHERTYPE_LLDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="ethertype", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ethertype-type', is_config=False) + + source_mac = __builtin__.property(_get_source_mac) + source_mac_mask = __builtin__.property(_get_source_mac_mask) + destination_mac = __builtin__.property(_get_destination_mac) + destination_mac_mask = __builtin__.property(_get_destination_mac_mask) + ethertype = __builtin__.property(_get_ethertype) + + + _pyangbind_elements = {'source_mac': source_mac, 'source_mac_mask': source_mac_mask, 'destination_mac': destination_mac, 'destination_mac_mask': destination_mac_mask, 'ethertype': ethertype, } + + +class yc_l2_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/l2. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Ethernet header fields + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__config','__state',) + + _yang_name = 'l2' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'l2'] + + def _get_config(self): + """ + Getter method for config, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/config (container) + + YANG Description: Configuration data + """ + return self.__config + + def _set_config(self, v, load=False): + """ + Setter method for config, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/config (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_config is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_config() directly. + + YANG Description: Configuration data + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """config must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__config = t + if hasattr(self, '_set'): + self._set() + + def _unset_config(self): + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_state(self): + """ + Getter method for state, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/state (container) + + YANG Description: State Information. + """ + return self.__state + + def _set_state(self, v, load=False): + """ + Setter method for state, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2/state (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_state is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_state() directly. + + YANG Description: State Information. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """state must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__state = t + if hasattr(self, '_set'): + self._set() + + def _unset_state(self): + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + config = __builtin__.property(_get_config, _set_config) + state = __builtin__.property(_get_state, _set_state) + + + _pyangbind_elements = {'config': config, 'state': state, } + + +class yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip_config(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/ip/config. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Configuration data + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__ip_version','__source_ip_address','__source_ip_flow_label','__destination_ip_address','__destination_ip_flow_label','__dscp','__protocol','__hop_limit',) + + _yang_name = 'config' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__hop_limit = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..255']}), is_leaf=True, yang_name="hop-limit", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint8', is_config=True) + self.__protocol = YANGDynClass(base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..254']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="protocol", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ip-protocol-type', is_config=True) + self.__dscp = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..63']}), is_leaf=True, yang_name="dscp", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:dscp', is_config=True) + self.__source_ip_address = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="source-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=True) + self.__destination_ip_address = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="destination-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=True) + self.__ip_version = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'unknown': {'value': 0}, u'ipv4': {'value': 1}, u'ipv6': {'value': 2}},), is_leaf=True, yang_name="ip-version", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-version', is_config=True) + self.__destination_ip_flow_label = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="destination-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=True) + self.__source_ip_flow_label = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="source-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'ip', u'config'] + + def _get_ip_version(self): + """ + Getter method for ip_version, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/ip_version (inet:ip-version) + + YANG Description: IP version of the header. + """ + return self.__ip_version + + def _set_ip_version(self, v, load=False): + """ + Setter method for ip_version, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/ip_version (inet:ip-version) + If this variable is read-only (config: false) in the + source YANG file, then _set_ip_version is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_ip_version() directly. + + YANG Description: IP version of the header. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'unknown': {'value': 0}, u'ipv4': {'value': 1}, u'ipv6': {'value': 2}},), is_leaf=True, yang_name="ip-version", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-version', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """ip_version must be of a type compatible with inet:ip-version""", + 'defined-type': "inet:ip-version", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'unknown': {'value': 0}, u'ipv4': {'value': 1}, u'ipv6': {'value': 2}},), is_leaf=True, yang_name="ip-version", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-version', is_config=True)""", + }) + + self.__ip_version = t + if hasattr(self, '_set'): + self._set() + + def _unset_ip_version(self): + self.__ip_version = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'unknown': {'value': 0}, u'ipv4': {'value': 1}, u'ipv6': {'value': 2}},), is_leaf=True, yang_name="ip-version", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-version', is_config=True) + + + def _get_source_ip_address(self): + """ + Getter method for source_ip_address, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/source_ip_address (inet:ip-prefix) + + YANG Description: Destination IP address prefix. + """ + return self.__source_ip_address + + def _set_source_ip_address(self, v, load=False): + """ + Setter method for source_ip_address, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/source_ip_address (inet:ip-prefix) + If this variable is read-only (config: false) in the + source YANG file, then _set_source_ip_address is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_source_ip_address() directly. + + YANG Description: Destination IP address prefix. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="source-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """source_ip_address must be of a type compatible with inet:ip-prefix""", + 'defined-type': "inet:ip-prefix", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="source-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=True)""", + }) + + self.__source_ip_address = t + if hasattr(self, '_set'): + self._set() + + def _unset_source_ip_address(self): + self.__source_ip_address = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="source-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=True) + + + def _get_source_ip_flow_label(self): + """ + Getter method for source_ip_flow_label, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/source_ip_flow_label (inet:ipv6-flow-label) + + YANG Description: Source IPv6 Flow label. + """ + return self.__source_ip_flow_label + + def _set_source_ip_flow_label(self, v, load=False): + """ + Setter method for source_ip_flow_label, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/source_ip_flow_label (inet:ipv6-flow-label) + If this variable is read-only (config: false) in the + source YANG file, then _set_source_ip_flow_label is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_source_ip_flow_label() directly. + + YANG Description: Source IPv6 Flow label. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="source-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """source_ip_flow_label must be of a type compatible with inet:ipv6-flow-label""", + 'defined-type': "inet:ipv6-flow-label", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="source-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=True)""", + }) + + self.__source_ip_flow_label = t + if hasattr(self, '_set'): + self._set() + + def _unset_source_ip_flow_label(self): + self.__source_ip_flow_label = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="source-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=True) + + + def _get_destination_ip_address(self): + """ + Getter method for destination_ip_address, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/destination_ip_address (inet:ip-prefix) + + YANG Description: Destination IP address prefix. + """ + return self.__destination_ip_address + + def _set_destination_ip_address(self, v, load=False): + """ + Setter method for destination_ip_address, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/destination_ip_address (inet:ip-prefix) + If this variable is read-only (config: false) in the + source YANG file, then _set_destination_ip_address is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_destination_ip_address() directly. + + YANG Description: Destination IP address prefix. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="destination-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """destination_ip_address must be of a type compatible with inet:ip-prefix""", + 'defined-type': "inet:ip-prefix", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="destination-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=True)""", + }) + + self.__destination_ip_address = t + if hasattr(self, '_set'): + self._set() + + def _unset_destination_ip_address(self): + self.__destination_ip_address = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="destination-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=True) + + + def _get_destination_ip_flow_label(self): + """ + Getter method for destination_ip_flow_label, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/destination_ip_flow_label (inet:ipv6-flow-label) + + YANG Description: Destination IPv6 Flow label. + """ + return self.__destination_ip_flow_label + + def _set_destination_ip_flow_label(self, v, load=False): + """ + Setter method for destination_ip_flow_label, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/destination_ip_flow_label (inet:ipv6-flow-label) + If this variable is read-only (config: false) in the + source YANG file, then _set_destination_ip_flow_label is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_destination_ip_flow_label() directly. + + YANG Description: Destination IPv6 Flow label. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="destination-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """destination_ip_flow_label must be of a type compatible with inet:ipv6-flow-label""", + 'defined-type': "inet:ipv6-flow-label", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="destination-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=True)""", + }) + + self.__destination_ip_flow_label = t + if hasattr(self, '_set'): + self._set() + + def _unset_destination_ip_flow_label(self): + self.__destination_ip_flow_label = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="destination-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=True) + + + def _get_dscp(self): + """ + Getter method for dscp, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/dscp (inet:dscp) + + YANG Description: Value of diffserv codepoint. + """ + return self.__dscp + + def _set_dscp(self, v, load=False): + """ + Setter method for dscp, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/dscp (inet:dscp) + If this variable is read-only (config: false) in the + source YANG file, then _set_dscp is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_dscp() directly. + + YANG Description: Value of diffserv codepoint. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..63']}), is_leaf=True, yang_name="dscp", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:dscp', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """dscp must be of a type compatible with inet:dscp""", + 'defined-type': "inet:dscp", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..63']}), is_leaf=True, yang_name="dscp", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:dscp', is_config=True)""", + }) + + self.__dscp = t + if hasattr(self, '_set'): + self._set() + + def _unset_dscp(self): + self.__dscp = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..63']}), is_leaf=True, yang_name="dscp", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:dscp', is_config=True) + + + def _get_protocol(self): + """ + Getter method for protocol, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/protocol (oc-pkt-match-types:ip-protocol-type) + + YANG Description: Internet Protocol number. + """ + return self.__protocol + + def _set_protocol(self, v, load=False): + """ + Setter method for protocol, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/protocol (oc-pkt-match-types:ip-protocol-type) + If this variable is read-only (config: false) in the + source YANG file, then _set_protocol is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_protocol() directly. + + YANG Description: Internet Protocol number. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..254']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="protocol", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ip-protocol-type', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """protocol must be of a type compatible with oc-pkt-match-types:ip-protocol-type""", + 'defined-type': "oc-pkt-match-types:ip-protocol-type", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..254']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="protocol", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ip-protocol-type', is_config=True)""", + }) + + self.__protocol = t + if hasattr(self, '_set'): + self._set() + + def _unset_protocol(self): + self.__protocol = YANGDynClass(base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..254']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="protocol", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ip-protocol-type', is_config=True) + + + def _get_hop_limit(self): + """ + Getter method for hop_limit, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/hop_limit (uint8) + + YANG Description: The IP packet's hop limit -- known as TTL (in hops) in +IPv4 packets, and hop limit in IPv6 + """ + return self.__hop_limit + + def _set_hop_limit(self, v, load=False): + """ + Setter method for hop_limit, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config/hop_limit (uint8) + If this variable is read-only (config: false) in the + source YANG file, then _set_hop_limit is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_hop_limit() directly. + + YANG Description: The IP packet's hop limit -- known as TTL (in hops) in +IPv4 packets, and hop limit in IPv6 + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..255']}), is_leaf=True, yang_name="hop-limit", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint8', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """hop_limit must be of a type compatible with uint8""", + 'defined-type': "uint8", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..255']}), is_leaf=True, yang_name="hop-limit", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint8', is_config=True)""", + }) + + self.__hop_limit = t + if hasattr(self, '_set'): + self._set() + + def _unset_hop_limit(self): + self.__hop_limit = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..255']}), is_leaf=True, yang_name="hop-limit", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint8', is_config=True) + + ip_version = __builtin__.property(_get_ip_version, _set_ip_version) + source_ip_address = __builtin__.property(_get_source_ip_address, _set_source_ip_address) + source_ip_flow_label = __builtin__.property(_get_source_ip_flow_label, _set_source_ip_flow_label) + destination_ip_address = __builtin__.property(_get_destination_ip_address, _set_destination_ip_address) + destination_ip_flow_label = __builtin__.property(_get_destination_ip_flow_label, _set_destination_ip_flow_label) + dscp = __builtin__.property(_get_dscp, _set_dscp) + protocol = __builtin__.property(_get_protocol, _set_protocol) + hop_limit = __builtin__.property(_get_hop_limit, _set_hop_limit) + + + _pyangbind_elements = {'ip_version': ip_version, 'source_ip_address': source_ip_address, 'source_ip_flow_label': source_ip_flow_label, 'destination_ip_address': destination_ip_address, 'destination_ip_flow_label': destination_ip_flow_label, 'dscp': dscp, 'protocol': protocol, 'hop_limit': hop_limit, } + + +class yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip_state(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/ip/state. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: State information + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__ip_version','__source_ip_address','__source_ip_flow_label','__destination_ip_address','__destination_ip_flow_label','__dscp','__protocol','__hop_limit',) + + _yang_name = 'state' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__hop_limit = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..255']}), is_leaf=True, yang_name="hop-limit", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint8', is_config=False) + self.__protocol = YANGDynClass(base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..254']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="protocol", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ip-protocol-type', is_config=False) + self.__dscp = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..63']}), is_leaf=True, yang_name="dscp", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:dscp', is_config=False) + self.__source_ip_address = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="source-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=False) + self.__destination_ip_address = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="destination-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=False) + self.__ip_version = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'unknown': {'value': 0}, u'ipv4': {'value': 1}, u'ipv6': {'value': 2}},), is_leaf=True, yang_name="ip-version", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-version', is_config=False) + self.__destination_ip_flow_label = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="destination-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=False) + self.__source_ip_flow_label = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="source-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'ip', u'state'] + + def _get_ip_version(self): + """ + Getter method for ip_version, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/ip_version (inet:ip-version) + + YANG Description: IP version of the header. + """ + return self.__ip_version + + def _set_ip_version(self, v, load=False): + """ + Setter method for ip_version, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/ip_version (inet:ip-version) + If this variable is read-only (config: false) in the + source YANG file, then _set_ip_version is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_ip_version() directly. + + YANG Description: IP version of the header. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'unknown': {'value': 0}, u'ipv4': {'value': 1}, u'ipv6': {'value': 2}},), is_leaf=True, yang_name="ip-version", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-version', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """ip_version must be of a type compatible with inet:ip-version""", + 'defined-type': "inet:ip-version", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'unknown': {'value': 0}, u'ipv4': {'value': 1}, u'ipv6': {'value': 2}},), is_leaf=True, yang_name="ip-version", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-version', is_config=False)""", + }) + + self.__ip_version = t + if hasattr(self, '_set'): + self._set() + + def _unset_ip_version(self): + self.__ip_version = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'unknown': {'value': 0}, u'ipv4': {'value': 1}, u'ipv6': {'value': 2}},), is_leaf=True, yang_name="ip-version", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-version', is_config=False) + + + def _get_source_ip_address(self): + """ + Getter method for source_ip_address, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/source_ip_address (inet:ip-prefix) + + YANG Description: Destination IP address prefix. + """ + return self.__source_ip_address + + def _set_source_ip_address(self, v, load=False): + """ + Setter method for source_ip_address, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/source_ip_address (inet:ip-prefix) + If this variable is read-only (config: false) in the + source YANG file, then _set_source_ip_address is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_source_ip_address() directly. + + YANG Description: Destination IP address prefix. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="source-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """source_ip_address must be of a type compatible with inet:ip-prefix""", + 'defined-type': "inet:ip-prefix", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="source-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=False)""", + }) + + self.__source_ip_address = t + if hasattr(self, '_set'): + self._set() + + def _unset_source_ip_address(self): + self.__source_ip_address = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="source-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=False) + + + def _get_source_ip_flow_label(self): + """ + Getter method for source_ip_flow_label, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/source_ip_flow_label (inet:ipv6-flow-label) + + YANG Description: Source IPv6 Flow label. + """ + return self.__source_ip_flow_label + + def _set_source_ip_flow_label(self, v, load=False): + """ + Setter method for source_ip_flow_label, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/source_ip_flow_label (inet:ipv6-flow-label) + If this variable is read-only (config: false) in the + source YANG file, then _set_source_ip_flow_label is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_source_ip_flow_label() directly. + + YANG Description: Source IPv6 Flow label. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="source-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """source_ip_flow_label must be of a type compatible with inet:ipv6-flow-label""", + 'defined-type': "inet:ipv6-flow-label", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="source-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=False)""", + }) + + self.__source_ip_flow_label = t + if hasattr(self, '_set'): + self._set() + + def _unset_source_ip_flow_label(self): + self.__source_ip_flow_label = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="source-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=False) + + + def _get_destination_ip_address(self): + """ + Getter method for destination_ip_address, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/destination_ip_address (inet:ip-prefix) + + YANG Description: Destination IP address prefix. + """ + return self.__destination_ip_address + + def _set_destination_ip_address(self, v, load=False): + """ + Setter method for destination_ip_address, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/destination_ip_address (inet:ip-prefix) + If this variable is read-only (config: false) in the + source YANG file, then _set_destination_ip_address is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_destination_ip_address() directly. + + YANG Description: Destination IP address prefix. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="destination-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """destination_ip_address must be of a type compatible with inet:ip-prefix""", + 'defined-type': "inet:ip-prefix", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="destination-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=False)""", + }) + + self.__destination_ip_address = t + if hasattr(self, '_set'): + self._set() + + def _unset_destination_ip_address(self): + self.__destination_ip_address = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2]))'}),RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\\.){3}(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'}),], is_leaf=True, yang_name="destination-ip-address", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ip-prefix', is_config=False) + + + def _get_destination_ip_flow_label(self): + """ + Getter method for destination_ip_flow_label, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/destination_ip_flow_label (inet:ipv6-flow-label) + + YANG Description: Destination IPv6 Flow label. + """ + return self.__destination_ip_flow_label + + def _set_destination_ip_flow_label(self, v, load=False): + """ + Setter method for destination_ip_flow_label, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/destination_ip_flow_label (inet:ipv6-flow-label) + If this variable is read-only (config: false) in the + source YANG file, then _set_destination_ip_flow_label is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_destination_ip_flow_label() directly. + + YANG Description: Destination IPv6 Flow label. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="destination-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """destination_ip_flow_label must be of a type compatible with inet:ipv6-flow-label""", + 'defined-type': "inet:ipv6-flow-label", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="destination-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=False)""", + }) + + self.__destination_ip_flow_label = t + if hasattr(self, '_set'): + self._set() + + def _unset_destination_ip_flow_label(self): + self.__destination_ip_flow_label = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..4294967295']}, int_size=32), restriction_dict={'range': [u'0..1048575']}), is_leaf=True, yang_name="destination-ip-flow-label", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:ipv6-flow-label', is_config=False) + + + def _get_dscp(self): + """ + Getter method for dscp, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/dscp (inet:dscp) + + YANG Description: Value of diffserv codepoint. + """ + return self.__dscp + + def _set_dscp(self, v, load=False): + """ + Setter method for dscp, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/dscp (inet:dscp) + If this variable is read-only (config: false) in the + source YANG file, then _set_dscp is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_dscp() directly. + + YANG Description: Value of diffserv codepoint. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..63']}), is_leaf=True, yang_name="dscp", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:dscp', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """dscp must be of a type compatible with inet:dscp""", + 'defined-type': "inet:dscp", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..63']}), is_leaf=True, yang_name="dscp", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:dscp', is_config=False)""", + }) + + self.__dscp = t + if hasattr(self, '_set'): + self._set() + + def _unset_dscp(self): + self.__dscp = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..63']}), is_leaf=True, yang_name="dscp", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='inet:dscp', is_config=False) + + + def _get_protocol(self): + """ + Getter method for protocol, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/protocol (oc-pkt-match-types:ip-protocol-type) + + YANG Description: Internet Protocol number. + """ + return self.__protocol + + def _set_protocol(self, v, load=False): + """ + Setter method for protocol, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/protocol (oc-pkt-match-types:ip-protocol-type) + If this variable is read-only (config: false) in the + source YANG file, then _set_protocol is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_protocol() directly. + + YANG Description: Internet Protocol number. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..254']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="protocol", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ip-protocol-type', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """protocol must be of a type compatible with oc-pkt-match-types:ip-protocol-type""", + 'defined-type': "oc-pkt-match-types:ip-protocol-type", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..254']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="protocol", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ip-protocol-type', is_config=False)""", + }) + + self.__protocol = t + if hasattr(self, '_set'): + self._set() + + def _unset_protocol(self): + self.__protocol = YANGDynClass(base=[RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..254']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'oc-pkt-match-types:IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_L2TP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_TCP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_AUTH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_GRE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_RSVP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_PIM': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_UDP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:IP_IGMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'IP_ICMP': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},),], is_leaf=True, yang_name="protocol", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:ip-protocol-type', is_config=False) + + + def _get_hop_limit(self): + """ + Getter method for hop_limit, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/hop_limit (uint8) + + YANG Description: The IP packet's hop limit -- known as TTL (in hops) in +IPv4 packets, and hop limit in IPv6 + """ + return self.__hop_limit + + def _set_hop_limit(self, v, load=False): + """ + Setter method for hop_limit, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state/hop_limit (uint8) + If this variable is read-only (config: false) in the + source YANG file, then _set_hop_limit is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_hop_limit() directly. + + YANG Description: The IP packet's hop limit -- known as TTL (in hops) in +IPv4 packets, and hop limit in IPv6 + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..255']}), is_leaf=True, yang_name="hop-limit", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint8', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """hop_limit must be of a type compatible with uint8""", + 'defined-type': "uint8", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..255']}), is_leaf=True, yang_name="hop-limit", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint8', is_config=False)""", + }) + + self.__hop_limit = t + if hasattr(self, '_set'): + self._set() + + def _unset_hop_limit(self): + self.__hop_limit = YANGDynClass(base=RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..255']}, int_size=8), restriction_dict={'range': [u'0..255']}), is_leaf=True, yang_name="hop-limit", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='uint8', is_config=False) + + ip_version = __builtin__.property(_get_ip_version) + source_ip_address = __builtin__.property(_get_source_ip_address) + source_ip_flow_label = __builtin__.property(_get_source_ip_flow_label) + destination_ip_address = __builtin__.property(_get_destination_ip_address) + destination_ip_flow_label = __builtin__.property(_get_destination_ip_flow_label) + dscp = __builtin__.property(_get_dscp) + protocol = __builtin__.property(_get_protocol) + hop_limit = __builtin__.property(_get_hop_limit) + + + _pyangbind_elements = {'ip_version': ip_version, 'source_ip_address': source_ip_address, 'source_ip_flow_label': source_ip_flow_label, 'destination_ip_address': destination_ip_address, 'destination_ip_flow_label': destination_ip_flow_label, 'dscp': dscp, 'protocol': protocol, 'hop_limit': hop_limit, } + + +class yc_ip_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/ip. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Top level container + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__config','__state',) + + _yang_name = 'ip' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'ip'] + + def _get_config(self): + """ + Getter method for config, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config (container) + + YANG Description: Configuration data + """ + return self.__config + + def _set_config(self, v, load=False): + """ + Setter method for config, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/config (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_config is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_config() directly. + + YANG Description: Configuration data + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """config must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__config = t + if hasattr(self, '_set'): + self._set() + + def _unset_config(self): + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_state(self): + """ + Getter method for state, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state (container) + + YANG Description: State information + """ + return self.__state + + def _set_state(self, v, load=False): + """ + Setter method for state, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip/state (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_state is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_state() directly. + + YANG Description: State information + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """state must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__state = t + if hasattr(self, '_set'): + self._set() + + def _unset_state(self): + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + config = __builtin__.property(_get_config, _set_config) + state = __builtin__.property(_get_state, _set_state) + + + _pyangbind_elements = {'config': config, 'state': state, } + + +class yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport_config(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/transport/config. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Configuration data + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__source_port','__destination_port','__tcp_flags',) + + _yang_name = 'config' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__source_port = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) + self.__tcp_flags = YANGDynClass(base=TypedListType(allowed_type=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},)), is_leaf=False, yang_name="tcp-flags", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=True) + self.__destination_port = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'transport', u'config'] + + def _get_source_port(self): + """ + Getter method for source_port, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/config/source_port (oc-pkt-match-types:port-num-range) + + YANG Description: Source port or range + """ + return self.__source_port + + def _set_source_port(self, v, load=False): + """ + Setter method for source_port, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/config/source_port (oc-pkt-match-types:port-num-range) + If this variable is read-only (config: false) in the + source YANG file, then _set_source_port is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_source_port() directly. + + YANG Description: Source port or range + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """source_port must be of a type compatible with oc-pkt-match-types:port-num-range""", + 'defined-type': "oc-pkt-match-types:port-num-range", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True)""", + }) + + self.__source_port = t + if hasattr(self, '_set'): + self._set() + + def _unset_source_port(self): + self.__source_port = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) + + + def _get_destination_port(self): + """ + Getter method for destination_port, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/config/destination_port (oc-pkt-match-types:port-num-range) + + YANG Description: Destination port or range + """ + return self.__destination_port + + def _set_destination_port(self, v, load=False): + """ + Setter method for destination_port, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/config/destination_port (oc-pkt-match-types:port-num-range) + If this variable is read-only (config: false) in the + source YANG file, then _set_destination_port is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_destination_port() directly. + + YANG Description: Destination port or range + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """destination_port must be of a type compatible with oc-pkt-match-types:port-num-range""", + 'defined-type': "oc-pkt-match-types:port-num-range", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True)""", + }) + + self.__destination_port = t + if hasattr(self, '_set'): + self._set() + + def _unset_destination_port(self): + self.__destination_port = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) + + + def _get_tcp_flags(self): + """ + Getter method for tcp_flags, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/config/tcp_flags (identityref) + + YANG Description: List of TCP flags to match + """ + return self.__tcp_flags + + def _set_tcp_flags(self, v, load=False): + """ + Setter method for tcp_flags, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/config/tcp_flags (identityref) + If this variable is read-only (config: false) in the + source YANG file, then _set_tcp_flags is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_tcp_flags() directly. + + YANG Description: List of TCP flags to match + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=TypedListType(allowed_type=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},)), is_leaf=False, yang_name="tcp-flags", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """tcp_flags must be of a type compatible with identityref""", + 'defined-type': "openconfig-acl:identityref", + 'generated-type': """YANGDynClass(base=TypedListType(allowed_type=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},)), is_leaf=False, yang_name="tcp-flags", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=True)""", + }) + + self.__tcp_flags = t + if hasattr(self, '_set'): + self._set() + + def _unset_tcp_flags(self): + self.__tcp_flags = YANGDynClass(base=TypedListType(allowed_type=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},)), is_leaf=False, yang_name="tcp-flags", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=True) + + source_port = __builtin__.property(_get_source_port, _set_source_port) + destination_port = __builtin__.property(_get_destination_port, _set_destination_port) + tcp_flags = __builtin__.property(_get_tcp_flags, _set_tcp_flags) + + + _pyangbind_elements = {'source_port': source_port, 'destination_port': destination_port, 'tcp_flags': tcp_flags, } + + +class yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport_state(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/transport/state. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: State data + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__source_port','__destination_port','__tcp_flags',) + + _yang_name = 'state' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__source_port = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) + self.__tcp_flags = YANGDynClass(base=TypedListType(allowed_type=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},)), is_leaf=False, yang_name="tcp-flags", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False) + self.__destination_port = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'transport', u'state'] + + def _get_source_port(self): + """ + Getter method for source_port, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/state/source_port (oc-pkt-match-types:port-num-range) + + YANG Description: Source port or range + """ + return self.__source_port + + def _set_source_port(self, v, load=False): + """ + Setter method for source_port, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/state/source_port (oc-pkt-match-types:port-num-range) + If this variable is read-only (config: false) in the + source YANG file, then _set_source_port is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_source_port() directly. + + YANG Description: Source port or range + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """source_port must be of a type compatible with oc-pkt-match-types:port-num-range""", + 'defined-type': "oc-pkt-match-types:port-num-range", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False)""", + }) + + self.__source_port = t + if hasattr(self, '_set'): + self._set() + + def _unset_source_port(self): + self.__source_port = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) + + + def _get_destination_port(self): + """ + Getter method for destination_port, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/state/destination_port (oc-pkt-match-types:port-num-range) + + YANG Description: Destination port or range + """ + return self.__destination_port + + def _set_destination_port(self, v, load=False): + """ + Setter method for destination_port, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/state/destination_port (oc-pkt-match-types:port-num-range) + If this variable is read-only (config: false) in the + source YANG file, then _set_destination_port is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_destination_port() directly. + + YANG Description: Destination port or range + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """destination_port must be of a type compatible with oc-pkt-match-types:port-num-range""", + 'defined-type': "oc-pkt-match-types:port-num-range", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False)""", + }) + + self.__destination_port = t + if hasattr(self, '_set'): + self._set() + + def _unset_destination_port(self): + self.__destination_port = YANGDynClass(base=[RestrictedClassType(base_type=unicode, restriction_dict={'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={'range': [u'0..65535']}),RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) + + + def _get_tcp_flags(self): + """ + Getter method for tcp_flags, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/state/tcp_flags (identityref) + + YANG Description: List of TCP flags to match + """ + return self.__tcp_flags + + def _set_tcp_flags(self, v, load=False): + """ + Setter method for tcp_flags, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/state/tcp_flags (identityref) + If this variable is read-only (config: false) in the + source YANG file, then _set_tcp_flags is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_tcp_flags() directly. + + YANG Description: List of TCP flags to match + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=TypedListType(allowed_type=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},)), is_leaf=False, yang_name="tcp-flags", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """tcp_flags must be of a type compatible with identityref""", + 'defined-type': "openconfig-acl:identityref", + 'generated-type': """YANGDynClass(base=TypedListType(allowed_type=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},)), is_leaf=False, yang_name="tcp-flags", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False)""", + }) + + self.__tcp_flags = t + if hasattr(self, '_set'): + self._set() + + def _unset_tcp_flags(self): + self.__tcp_flags = YANGDynClass(base=TypedListType(allowed_type=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ACK': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_SYN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_CWR': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_URG': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_RST': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_FIN': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ECE': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_PSH': {'@namespace': u'http://openconfig.net/yang/packet-match-types', '@module': u'openconfig-packet-match-types'}},)), is_leaf=False, yang_name="tcp-flags", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False) + + source_port = __builtin__.property(_get_source_port) + destination_port = __builtin__.property(_get_destination_port) + tcp_flags = __builtin__.property(_get_tcp_flags) + + + _pyangbind_elements = {'source_port': source_port, 'destination_port': destination_port, 'tcp_flags': tcp_flags, } + + +class yc_transport_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/transport. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Transport fields container + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__config','__state',) + + _yang_name = 'transport' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'transport'] + + def _get_config(self): + """ + Getter method for config, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/config (container) + + YANG Description: Configuration data + """ + return self.__config + + def _set_config(self, v, load=False): + """ + Setter method for config, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/config (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_config is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_config() directly. + + YANG Description: Configuration data + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """config must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__config = t + if hasattr(self, '_set'): + self._set() + + def _unset_config(self): + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_state(self): + """ + Getter method for state, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/state (container) + + YANG Description: State data + """ + return self.__state + + def _set_state(self, v, load=False): + """ + Setter method for state, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport/state (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_state is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_state() directly. + + YANG Description: State data + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """state must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__state = t + if hasattr(self, '_set'): + self._set() + + def _unset_state(self): + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + config = __builtin__.property(_get_config, _set_config) + state = __builtin__.property(_get_state, _set_state) + + + _pyangbind_elements = {'config': config, 'state': state, } + + +class yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref_config(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/input-interface/interface-ref/config. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Configured reference to interface / subinterface + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__interface','__subinterface',) + + _yang_name = 'config' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__interface = YANGDynClass(base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + self.__subinterface = YANGDynClass(base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'input-interface', u'interface-ref', u'config'] + + def _get_interface(self): + """ + Getter method for interface, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface/interface_ref/config/interface (leafref) + + YANG Description: Reference to a base interface. If a reference to a +subinterface is required, this leaf must be specified +to indicate the base interface. + """ + return self.__interface + + def _set_interface(self, v, load=False): + """ + Setter method for interface, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface/interface_ref/config/interface (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_interface is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_interface() directly. + + YANG Description: Reference to a base interface. If a reference to a +subinterface is required, this leaf must be specified +to indicate the base interface. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """interface must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True)""", + }) + + self.__interface = t + if hasattr(self, '_set'): + self._set() + + def _unset_interface(self): + self.__interface = YANGDynClass(base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + + def _get_subinterface(self): + """ + Getter method for subinterface, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface/interface_ref/config/subinterface (leafref) + + YANG Description: Reference to a subinterface -- this requires the base +interface to be specified using the interface leaf in +this container. If only a reference to a base interface +is requuired, this leaf should not be set. + """ + return self.__subinterface + + def _set_subinterface(self, v, load=False): + """ + Setter method for subinterface, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface/interface_ref/config/subinterface (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_subinterface is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_subinterface() directly. + + YANG Description: Reference to a subinterface -- this requires the base +interface to be specified using the interface leaf in +this container. If only a reference to a base interface +is requuired, this leaf should not be set. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """subinterface must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True)""", + }) + + self.__subinterface = t + if hasattr(self, '_set'): + self._set() + + def _unset_subinterface(self): + self.__subinterface = YANGDynClass(base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + interface = __builtin__.property(_get_interface, _set_interface) + subinterface = __builtin__.property(_get_subinterface, _set_subinterface) + + + _pyangbind_elements = {'interface': interface, 'subinterface': subinterface, } + + +class yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref_state(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/input-interface/interface-ref/state. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Operational state for interface-ref + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__interface','__subinterface',) + + _yang_name = 'state' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__interface = YANGDynClass(base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + self.__subinterface = YANGDynClass(base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'input-interface', u'interface-ref', u'state'] + + def _get_interface(self): + """ + Getter method for interface, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface/interface_ref/state/interface (leafref) + + YANG Description: Reference to a base interface. If a reference to a +subinterface is required, this leaf must be specified +to indicate the base interface. + """ + return self.__interface + + def _set_interface(self, v, load=False): + """ + Setter method for interface, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface/interface_ref/state/interface (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_interface is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_interface() directly. + + YANG Description: Reference to a base interface. If a reference to a +subinterface is required, this leaf must be specified +to indicate the base interface. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """interface must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False)""", + }) + + self.__interface = t + if hasattr(self, '_set'): + self._set() + + def _unset_interface(self): + self.__interface = YANGDynClass(base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + + + def _get_subinterface(self): + """ + Getter method for subinterface, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface/interface_ref/state/subinterface (leafref) + + YANG Description: Reference to a subinterface -- this requires the base +interface to be specified using the interface leaf in +this container. If only a reference to a base interface +is requuired, this leaf should not be set. + """ + return self.__subinterface + + def _set_subinterface(self, v, load=False): + """ + Setter method for subinterface, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface/interface_ref/state/subinterface (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_subinterface is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_subinterface() directly. + + YANG Description: Reference to a subinterface -- this requires the base +interface to be specified using the interface leaf in +this container. If only a reference to a base interface +is requuired, this leaf should not be set. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """subinterface must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False)""", + }) + + self.__subinterface = t + if hasattr(self, '_set'): + self._set() + + def _unset_subinterface(self): + self.__subinterface = YANGDynClass(base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + + interface = __builtin__.property(_get_interface) + subinterface = __builtin__.property(_get_subinterface) + + + _pyangbind_elements = {'interface': interface, 'subinterface': subinterface, } + + +class yc_interface_ref_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/input-interface/interface-ref. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Reference to an interface or subinterface + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__config','__state',) + + _yang_name = 'interface-ref' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'input-interface', u'interface-ref'] + + def _get_config(self): + """ + Getter method for config, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface/interface_ref/config (container) + + YANG Description: Configured reference to interface / subinterface + """ + return self.__config + + def _set_config(self, v, load=False): + """ + Setter method for config, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface/interface_ref/config (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_config is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_config() directly. + + YANG Description: Configured reference to interface / subinterface + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """config must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__config = t + if hasattr(self, '_set'): + self._set() + + def _unset_config(self): + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_state(self): + """ + Getter method for state, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface/interface_ref/state (container) + + YANG Description: Operational state for interface-ref + """ + return self.__state + + def _set_state(self, v, load=False): + """ + Setter method for state, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface/interface_ref/state (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_state is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_state() directly. + + YANG Description: Operational state for interface-ref + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """state must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__state = t + if hasattr(self, '_set'): + self._set() + + def _unset_state(self): + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + config = __builtin__.property(_get_config, _set_config) + state = __builtin__.property(_get_state, _set_state) + + + _pyangbind_elements = {'config': config, 'state': state, } + + +class yc_input_interface_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/input-interface. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Input interface container + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__interface_ref',) + + _yang_name = 'input-interface' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__interface_ref = YANGDynClass(base=yc_interface_ref_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref, is_container='container', yang_name="interface-ref", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'input-interface'] + + def _get_interface_ref(self): + """ + Getter method for interface_ref, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface/interface_ref (container) + + YANG Description: Reference to an interface or subinterface + """ + return self.__interface_ref + + def _set_interface_ref(self, v, load=False): + """ + Setter method for interface_ref, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface/interface_ref (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_interface_ref is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_interface_ref() directly. + + YANG Description: Reference to an interface or subinterface + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_interface_ref_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref, is_container='container', yang_name="interface-ref", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """interface_ref must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_interface_ref_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref, is_container='container', yang_name="interface-ref", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__interface_ref = t + if hasattr(self, '_set'): + self._set() + + def _unset_interface_ref(self): + self.__interface_ref = YANGDynClass(base=yc_interface_ref_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface_interface_ref, is_container='container', yang_name="interface-ref", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + interface_ref = __builtin__.property(_get_interface_ref, _set_interface_ref) + + + _pyangbind_elements = {'interface_ref': interface_ref, } + + +class yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions_config(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/actions/config. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Config data for ACL actions + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__forwarding_action','__log_action',) + + _yang_name = 'config' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__forwarding_action = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), is_leaf=True, yang_name="forwarding-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=True) + self.__log_action = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), default=unicode("LOG_NONE"), is_leaf=True, yang_name="log-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'actions', u'config'] + + def _get_forwarding_action(self): + """ + Getter method for forwarding_action, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/actions/config/forwarding_action (identityref) + + YANG Description: Specifies the forwarding action. One forwarding action +must be specified for each ACL entry + """ + return self.__forwarding_action + + def _set_forwarding_action(self, v, load=False): + """ + Setter method for forwarding_action, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/actions/config/forwarding_action (identityref) + If this variable is read-only (config: false) in the + source YANG file, then _set_forwarding_action is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_forwarding_action() directly. + + YANG Description: Specifies the forwarding action. One forwarding action +must be specified for each ACL entry + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), is_leaf=True, yang_name="forwarding-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """forwarding_action must be of a type compatible with identityref""", + 'defined-type': "openconfig-acl:identityref", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), is_leaf=True, yang_name="forwarding-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=True)""", + }) + + self.__forwarding_action = t + if hasattr(self, '_set'): + self._set() + + def _unset_forwarding_action(self): + self.__forwarding_action = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), is_leaf=True, yang_name="forwarding-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=True) + + + def _get_log_action(self): + """ + Getter method for log_action, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/actions/config/log_action (identityref) + + YANG Description: Specifies the log action and destination for +matched packets. The default is not to log the +packet. + """ + return self.__log_action + + def _set_log_action(self, v, load=False): + """ + Setter method for log_action, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/actions/config/log_action (identityref) + If this variable is read-only (config: false) in the + source YANG file, then _set_log_action is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_log_action() directly. + + YANG Description: Specifies the log action and destination for +matched packets. The default is not to log the +packet. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), default=unicode("LOG_NONE"), is_leaf=True, yang_name="log-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """log_action must be of a type compatible with identityref""", + 'defined-type': "openconfig-acl:identityref", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), default=unicode("LOG_NONE"), is_leaf=True, yang_name="log-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=True)""", + }) + + self.__log_action = t + if hasattr(self, '_set'): + self._set() + + def _unset_log_action(self): + self.__log_action = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), default=unicode("LOG_NONE"), is_leaf=True, yang_name="log-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=True) + + forwarding_action = __builtin__.property(_get_forwarding_action, _set_forwarding_action) + log_action = __builtin__.property(_get_log_action, _set_log_action) + + + _pyangbind_elements = {'forwarding_action': forwarding_action, 'log_action': log_action, } + + +class yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions_state(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/actions/state. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: State information for ACL actions + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__forwarding_action','__log_action',) + + _yang_name = 'state' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__forwarding_action = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), is_leaf=True, yang_name="forwarding-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False) + self.__log_action = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), default=unicode("LOG_NONE"), is_leaf=True, yang_name="log-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'actions', u'state'] + + def _get_forwarding_action(self): + """ + Getter method for forwarding_action, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/actions/state/forwarding_action (identityref) + + YANG Description: Specifies the forwarding action. One forwarding action +must be specified for each ACL entry + """ + return self.__forwarding_action + + def _set_forwarding_action(self, v, load=False): + """ + Setter method for forwarding_action, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/actions/state/forwarding_action (identityref) + If this variable is read-only (config: false) in the + source YANG file, then _set_forwarding_action is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_forwarding_action() directly. + + YANG Description: Specifies the forwarding action. One forwarding action +must be specified for each ACL entry + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), is_leaf=True, yang_name="forwarding-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """forwarding_action must be of a type compatible with identityref""", + 'defined-type': "openconfig-acl:identityref", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), is_leaf=True, yang_name="forwarding-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False)""", + }) + + self.__forwarding_action = t + if hasattr(self, '_set'): + self._set() + + def _unset_forwarding_action(self): + self.__forwarding_action = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'REJECT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:ACCEPT': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:DROP': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), is_leaf=True, yang_name="forwarding-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False) + + + def _get_log_action(self): + """ + Getter method for log_action, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/actions/state/log_action (identityref) + + YANG Description: Specifies the log action and destination for +matched packets. The default is not to log the +packet. + """ + return self.__log_action + + def _set_log_action(self, v, load=False): + """ + Setter method for log_action, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/actions/state/log_action (identityref) + If this variable is read-only (config: false) in the + source YANG file, then _set_log_action is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_log_action() directly. + + YANG Description: Specifies the log action and destination for +matched packets. The default is not to log the +packet. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), default=unicode("LOG_NONE"), is_leaf=True, yang_name="log-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """log_action must be of a type compatible with identityref""", + 'defined-type': "openconfig-acl:identityref", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), default=unicode("LOG_NONE"), is_leaf=True, yang_name="log-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False)""", + }) + + self.__log_action = t + if hasattr(self, '_set'): + self._set() + + def _unset_log_action(self): + self.__log_action = YANGDynClass(base=RestrictedClassType(base_type=unicode, restriction_type="dict_key", restriction_arg={u'LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_SYSLOG': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}, u'oc-acl:LOG_NONE': {'@namespace': u'http://openconfig.net/yang/acl', '@module': u'openconfig-acl'}},), default=unicode("LOG_NONE"), is_leaf=True, yang_name="log-action", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False) + + forwarding_action = __builtin__.property(_get_forwarding_action) + log_action = __builtin__.property(_get_log_action) + + + _pyangbind_elements = {'forwarding_action': forwarding_action, 'log_action': log_action, } + + +class yc_actions_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry/actions. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Enclosing container for list of ACL actions associated +with an entry + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__config','__state',) + + _yang_name = 'actions' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry', u'actions'] + + def _get_config(self): + """ + Getter method for config, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/actions/config (container) + + YANG Description: Config data for ACL actions + """ + return self.__config + + def _set_config(self, v, load=False): + """ + Setter method for config, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/actions/config (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_config is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_config() directly. + + YANG Description: Config data for ACL actions + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """config must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__config = t + if hasattr(self, '_set'): + self._set() + + def _unset_config(self): + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_state(self): + """ + Getter method for state, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/actions/state (container) + + YANG Description: State information for ACL actions + """ + return self.__state + + def _set_state(self, v, load=False): + """ + Setter method for state, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/actions/state (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_state is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_state() directly. + + YANG Description: State information for ACL actions + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """state must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__state = t + if hasattr(self, '_set'): + self._set() + + def _unset_state(self): + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + config = __builtin__.property(_get_config, _set_config) + state = __builtin__.property(_get_state, _set_state) + + + _pyangbind_elements = {'config': config, 'state': state, } + + +class yc_acl_entry_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries/acl-entry. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: List of ACL entries comprising an ACL set + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__sequence_id','__config','__state','__l2','__ip','__transport','__input_interface','__actions',) + + _yang_name = 'acl-entry' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__ip = YANGDynClass(base=yc_ip_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip, is_container='container', yang_name="ip", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__input_interface = YANGDynClass(base=yc_input_interface_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface, is_container='container', yang_name="input-interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__actions = YANGDynClass(base=yc_actions_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions, is_container='container', yang_name="actions", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__sequence_id = YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + self.__l2 = YANGDynClass(base=yc_l2_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2, is_container='container', yang_name="l2", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__transport = YANGDynClass(base=yc_transport_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport, is_container='container', yang_name="transport", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries', u'acl-entry'] + + def _get_sequence_id(self): + """ + Getter method for sequence_id, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/sequence_id (leafref) + + YANG Description: references the list key + """ + return self.__sequence_id + + def _set_sequence_id(self, v, load=False): + """ + Setter method for sequence_id, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/sequence_id (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_sequence_id is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_sequence_id() directly. + + YANG Description: references the list key + """ + parent = getattr(self, "_parent", None) + if parent is not None and load is False: + raise AttributeError("Cannot set keys directly when" + + " within an instantiated list") + + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """sequence_id must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True)""", + }) + + self.__sequence_id = t + if hasattr(self, '_set'): + self._set() + + def _unset_sequence_id(self): + self.__sequence_id = YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + + def _get_config(self): + """ + Getter method for config, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/config (container) + + YANG Description: Access list entries config + """ + return self.__config + + def _set_config(self, v, load=False): + """ + Setter method for config, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/config (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_config is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_config() directly. + + YANG Description: Access list entries config + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """config must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__config = t + if hasattr(self, '_set'): + self._set() + + def _unset_config(self): + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_state(self): + """ + Getter method for state, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/state (container) + + YANG Description: State information for ACL entries + """ + return self.__state + + def _set_state(self, v, load=False): + """ + Setter method for state, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/state (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_state is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_state() directly. + + YANG Description: State information for ACL entries + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """state must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__state = t + if hasattr(self, '_set'): + self._set() + + def _unset_state(self): + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_l2(self): + """ + Getter method for l2, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2 (container) + + YANG Description: Ethernet header fields + """ + return self.__l2 + + def _set_l2(self, v, load=False): + """ + Setter method for l2, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/l2 (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_l2 is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_l2() directly. + + YANG Description: Ethernet header fields + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_l2_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2, is_container='container', yang_name="l2", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """l2 must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_l2_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2, is_container='container', yang_name="l2", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__l2 = t + if hasattr(self, '_set'): + self._set() + + def _unset_l2(self): + self.__l2 = YANGDynClass(base=yc_l2_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_l2, is_container='container', yang_name="l2", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_ip(self): + """ + Getter method for ip, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip (container) + + YANG Description: Top level container + """ + return self.__ip + + def _set_ip(self, v, load=False): + """ + Setter method for ip, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/ip (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_ip is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_ip() directly. + + YANG Description: Top level container + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_ip_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip, is_container='container', yang_name="ip", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """ip must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_ip_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip, is_container='container', yang_name="ip", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__ip = t + if hasattr(self, '_set'): + self._set() + + def _unset_ip(self): + self.__ip = YANGDynClass(base=yc_ip_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_ip, is_container='container', yang_name="ip", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_transport(self): + """ + Getter method for transport, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport (container) + + YANG Description: Transport fields container + """ + return self.__transport + + def _set_transport(self, v, load=False): + """ + Setter method for transport, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/transport (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_transport is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_transport() directly. + + YANG Description: Transport fields container + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_transport_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport, is_container='container', yang_name="transport", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """transport must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_transport_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport, is_container='container', yang_name="transport", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__transport = t + if hasattr(self, '_set'): + self._set() + + def _unset_transport(self): + self.__transport = YANGDynClass(base=yc_transport_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_transport, is_container='container', yang_name="transport", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_input_interface(self): + """ + Getter method for input_interface, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface (container) + + YANG Description: Input interface container + """ + return self.__input_interface + + def _set_input_interface(self, v, load=False): + """ + Setter method for input_interface, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/input_interface (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_input_interface is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_input_interface() directly. + + YANG Description: Input interface container + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_input_interface_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface, is_container='container', yang_name="input-interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """input_interface must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_input_interface_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface, is_container='container', yang_name="input-interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__input_interface = t + if hasattr(self, '_set'): + self._set() + + def _unset_input_interface(self): + self.__input_interface = YANGDynClass(base=yc_input_interface_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_input_interface, is_container='container', yang_name="input-interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_actions(self): + """ + Getter method for actions, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/actions (container) + + YANG Description: Enclosing container for list of ACL actions associated +with an entry + """ + return self.__actions + + def _set_actions(self, v, load=False): + """ + Setter method for actions, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry/actions (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_actions is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_actions() directly. + + YANG Description: Enclosing container for list of ACL actions associated +with an entry + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_actions_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions, is_container='container', yang_name="actions", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """actions must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_actions_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions, is_container='container', yang_name="actions", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__actions = t + if hasattr(self, '_set'): + self._set() + + def _unset_actions(self): + self.__actions = YANGDynClass(base=yc_actions_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry_actions, is_container='container', yang_name="actions", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + sequence_id = __builtin__.property(_get_sequence_id, _set_sequence_id) + config = __builtin__.property(_get_config, _set_config) + state = __builtin__.property(_get_state, _set_state) + l2 = __builtin__.property(_get_l2, _set_l2) + ip = __builtin__.property(_get_ip, _set_ip) + transport = __builtin__.property(_get_transport, _set_transport) + input_interface = __builtin__.property(_get_input_interface, _set_input_interface) + actions = __builtin__.property(_get_actions, _set_actions) + + + _pyangbind_elements = {'sequence_id': sequence_id, 'config': config, 'state': state, 'l2': l2, 'ip': ip, 'transport': transport, 'input_interface': input_interface, 'actions': actions, } + + +class yc_acl_entries_openconfig_acl__acl_acl_sets_acl_set_acl_entries(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set/acl-entries. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Access list entries container + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__acl_entry',) + + _yang_name = 'acl-entries' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__acl_entry = YANGDynClass(base=YANGListType("sequence_id",yc_acl_entry_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry, yang_name="acl-entry", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='sequence-id', extensions=None), is_container='list', yang_name="acl-entry", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set', u'acl-entries'] + + def _get_acl_entry(self): + """ + Getter method for acl_entry, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry (list) + + YANG Description: List of ACL entries comprising an ACL set + """ + return self.__acl_entry + + def _set_acl_entry(self, v, load=False): + """ + Setter method for acl_entry, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries/acl_entry (list) + If this variable is read-only (config: false) in the + source YANG file, then _set_acl_entry is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_acl_entry() directly. + + YANG Description: List of ACL entries comprising an ACL set + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=YANGListType("sequence_id",yc_acl_entry_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry, yang_name="acl-entry", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='sequence-id', extensions=None), is_container='list', yang_name="acl-entry", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """acl_entry must be of a type compatible with list""", + 'defined-type': "list", + 'generated-type': """YANGDynClass(base=YANGListType("sequence_id",yc_acl_entry_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry, yang_name="acl-entry", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='sequence-id', extensions=None), is_container='list', yang_name="acl-entry", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True)""", + }) + + self.__acl_entry = t + if hasattr(self, '_set'): + self._set() + + def _unset_acl_entry(self): + self.__acl_entry = YANGDynClass(base=YANGListType("sequence_id",yc_acl_entry_openconfig_acl__acl_acl_sets_acl_set_acl_entries_acl_entry, yang_name="acl-entry", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='sequence-id', extensions=None), is_container='list', yang_name="acl-entry", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + + acl_entry = __builtin__.property(_get_acl_entry, _set_acl_entry) + + + _pyangbind_elements = {'acl_entry': acl_entry, } + + +class yc_acl_set_openconfig_acl__acl_acl_sets_acl_set(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets/acl-set. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: List of ACL sets, each comprising of a list of ACL +entries + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__name','__config','__state','__acl_entries',) + + _yang_name = 'acl-set' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__name = YANGDynClass(base=unicode, is_leaf=True, yang_name="name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + self.__acl_entries = YANGDynClass(base=yc_acl_entries_openconfig_acl__acl_acl_sets_acl_set_acl_entries, is_container='container', yang_name="acl-entries", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets', u'acl-set'] + + def _get_name(self): + """ + Getter method for name, mapped from YANG variable /acl/acl_sets/acl_set/name (leafref) + + YANG Description: Reference to the name list key + """ + return self.__name + + def _set_name(self, v, load=False): + """ + Setter method for name, mapped from YANG variable /acl/acl_sets/acl_set/name (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_name is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_name() directly. + + YANG Description: Reference to the name list key + """ + parent = getattr(self, "_parent", None) + if parent is not None and load is False: + raise AttributeError("Cannot set keys directly when" + + " within an instantiated list") + + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """name must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True)""", + }) + + self.__name = t + if hasattr(self, '_set'): + self._set() + + def _unset_name(self): + self.__name = YANGDynClass(base=unicode, is_leaf=True, yang_name="name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + + def _get_config(self): + """ + Getter method for config, mapped from YANG variable /acl/acl_sets/acl_set/config (container) + + YANG Description: Access list config + """ + return self.__config + + def _set_config(self, v, load=False): + """ + Setter method for config, mapped from YANG variable /acl/acl_sets/acl_set/config (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_config is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_config() directly. + + YANG Description: Access list config + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_config_openconfig_acl__acl_acl_sets_acl_set_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """config must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__config = t + if hasattr(self, '_set'): + self._set() + + def _unset_config(self): + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_acl_sets_acl_set_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_state(self): + """ + Getter method for state, mapped from YANG variable /acl/acl_sets/acl_set/state (container) + + YANG Description: Access list state information + """ + return self.__state + + def _set_state(self, v, load=False): + """ + Setter method for state, mapped from YANG variable /acl/acl_sets/acl_set/state (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_state is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_state() directly. + + YANG Description: Access list state information + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_state_openconfig_acl__acl_acl_sets_acl_set_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """state must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__state = t + if hasattr(self, '_set'): + self._set() + + def _unset_state(self): + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_acl_sets_acl_set_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_acl_entries(self): + """ + Getter method for acl_entries, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries (container) + + YANG Description: Access list entries container + """ + return self.__acl_entries + + def _set_acl_entries(self, v, load=False): + """ + Setter method for acl_entries, mapped from YANG variable /acl/acl_sets/acl_set/acl_entries (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_acl_entries is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_acl_entries() directly. + + YANG Description: Access list entries container + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_acl_entries_openconfig_acl__acl_acl_sets_acl_set_acl_entries, is_container='container', yang_name="acl-entries", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """acl_entries must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_acl_entries_openconfig_acl__acl_acl_sets_acl_set_acl_entries, is_container='container', yang_name="acl-entries", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__acl_entries = t + if hasattr(self, '_set'): + self._set() + + def _unset_acl_entries(self): + self.__acl_entries = YANGDynClass(base=yc_acl_entries_openconfig_acl__acl_acl_sets_acl_set_acl_entries, is_container='container', yang_name="acl-entries", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + name = __builtin__.property(_get_name, _set_name) + config = __builtin__.property(_get_config, _set_config) + state = __builtin__.property(_get_state, _set_state) + acl_entries = __builtin__.property(_get_acl_entries, _set_acl_entries) + + + _pyangbind_elements = {'name': name, 'config': config, 'state': state, 'acl_entries': acl_entries, } + + +class yc_acl_sets_openconfig_acl__acl_acl_sets(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/acl-sets. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Access list entries variables enclosing container + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__acl_set',) + + _yang_name = 'acl-sets' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__acl_set = YANGDynClass(base=YANGListType("name",yc_acl_set_openconfig_acl__acl_acl_sets_acl_set, yang_name="acl-set", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='name', extensions=None), is_container='list', yang_name="acl-set", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'acl-sets'] + + def _get_acl_set(self): + """ + Getter method for acl_set, mapped from YANG variable /acl/acl_sets/acl_set (list) + + YANG Description: List of ACL sets, each comprising of a list of ACL +entries + """ + return self.__acl_set + + def _set_acl_set(self, v, load=False): + """ + Setter method for acl_set, mapped from YANG variable /acl/acl_sets/acl_set (list) + If this variable is read-only (config: false) in the + source YANG file, then _set_acl_set is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_acl_set() directly. + + YANG Description: List of ACL sets, each comprising of a list of ACL +entries + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=YANGListType("name",yc_acl_set_openconfig_acl__acl_acl_sets_acl_set, yang_name="acl-set", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='name', extensions=None), is_container='list', yang_name="acl-set", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """acl_set must be of a type compatible with list""", + 'defined-type': "list", + 'generated-type': """YANGDynClass(base=YANGListType("name",yc_acl_set_openconfig_acl__acl_acl_sets_acl_set, yang_name="acl-set", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='name', extensions=None), is_container='list', yang_name="acl-set", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True)""", + }) + + self.__acl_set = t + if hasattr(self, '_set'): + self._set() + + def _unset_acl_set(self): + self.__acl_set = YANGDynClass(base=YANGListType("name",yc_acl_set_openconfig_acl__acl_acl_sets_acl_set, yang_name="acl-set", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='name', extensions=None), is_container='list', yang_name="acl-set", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + + acl_set = __builtin__.property(_get_acl_set, _set_acl_set) + + + _pyangbind_elements = {'acl_set': acl_set, } + + +class yc_config_openconfig_acl__acl_interfaces_interface_config(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/config. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Configuration for ACL per-interface data + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__id',) + + _yang_name = 'config' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__id = YANGDynClass(base=unicode, is_leaf=True, yang_name="id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-if:interface-id', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'config'] + + def _get_id(self): + """ + Getter method for id, mapped from YANG variable /acl/interfaces/interface/config/id (oc-if:interface-id) + + YANG Description: User-defined identifier for the interface -- a common +convention could be '.' + """ + return self.__id + + def _set_id(self, v, load=False): + """ + Setter method for id, mapped from YANG variable /acl/interfaces/interface/config/id (oc-if:interface-id) + If this variable is read-only (config: false) in the + source YANG file, then _set_id is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_id() directly. + + YANG Description: User-defined identifier for the interface -- a common +convention could be '.' + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-if:interface-id', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """id must be of a type compatible with oc-if:interface-id""", + 'defined-type': "oc-if:interface-id", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-if:interface-id', is_config=True)""", + }) + + self.__id = t + if hasattr(self, '_set'): + self._set() + + def _unset_id(self): + self.__id = YANGDynClass(base=unicode, is_leaf=True, yang_name="id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-if:interface-id', is_config=True) + + id = __builtin__.property(_get_id, _set_id) + + + _pyangbind_elements = {'id': id, } + + +class yc_state_openconfig_acl__acl_interfaces_interface_state(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/state. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Operational state for ACL per-interface data + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__id',) + + _yang_name = 'state' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__id = YANGDynClass(base=unicode, is_leaf=True, yang_name="id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-if:interface-id', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'state'] + + def _get_id(self): + """ + Getter method for id, mapped from YANG variable /acl/interfaces/interface/state/id (oc-if:interface-id) + + YANG Description: User-defined identifier for the interface -- a common +convention could be '.' + """ + return self.__id + + def _set_id(self, v, load=False): + """ + Setter method for id, mapped from YANG variable /acl/interfaces/interface/state/id (oc-if:interface-id) + If this variable is read-only (config: false) in the + source YANG file, then _set_id is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_id() directly. + + YANG Description: User-defined identifier for the interface -- a common +convention could be '.' + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-if:interface-id', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """id must be of a type compatible with oc-if:interface-id""", + 'defined-type': "oc-if:interface-id", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-if:interface-id', is_config=False)""", + }) + + self.__id = t + if hasattr(self, '_set'): + self._set() + + def _unset_id(self): + self.__id = YANGDynClass(base=unicode, is_leaf=True, yang_name="id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-if:interface-id', is_config=False) + + id = __builtin__.property(_get_id) + + + _pyangbind_elements = {'id': id, } + + +class yc_config_openconfig_acl__acl_interfaces_interface_interface_ref_config(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/interface-ref/config. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Configured reference to interface / subinterface + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__interface','__subinterface',) + + _yang_name = 'config' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__interface = YANGDynClass(base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + self.__subinterface = YANGDynClass(base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'interface-ref', u'config'] + + def _get_interface(self): + """ + Getter method for interface, mapped from YANG variable /acl/interfaces/interface/interface_ref/config/interface (leafref) + + YANG Description: Reference to a base interface. If a reference to a +subinterface is required, this leaf must be specified +to indicate the base interface. + """ + return self.__interface + + def _set_interface(self, v, load=False): + """ + Setter method for interface, mapped from YANG variable /acl/interfaces/interface/interface_ref/config/interface (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_interface is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_interface() directly. + + YANG Description: Reference to a base interface. If a reference to a +subinterface is required, this leaf must be specified +to indicate the base interface. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """interface must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True)""", + }) + + self.__interface = t + if hasattr(self, '_set'): + self._set() + + def _unset_interface(self): + self.__interface = YANGDynClass(base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + + def _get_subinterface(self): + """ + Getter method for subinterface, mapped from YANG variable /acl/interfaces/interface/interface_ref/config/subinterface (leafref) + + YANG Description: Reference to a subinterface -- this requires the base +interface to be specified using the interface leaf in +this container. If only a reference to a base interface +is requuired, this leaf should not be set. + """ + return self.__subinterface + + def _set_subinterface(self, v, load=False): + """ + Setter method for subinterface, mapped from YANG variable /acl/interfaces/interface/interface_ref/config/subinterface (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_subinterface is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_subinterface() directly. + + YANG Description: Reference to a subinterface -- this requires the base +interface to be specified using the interface leaf in +this container. If only a reference to a base interface +is requuired, this leaf should not be set. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """subinterface must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True)""", + }) + + self.__subinterface = t + if hasattr(self, '_set'): + self._set() + + def _unset_subinterface(self): + self.__subinterface = YANGDynClass(base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + interface = __builtin__.property(_get_interface, _set_interface) + subinterface = __builtin__.property(_get_subinterface, _set_subinterface) + + + _pyangbind_elements = {'interface': interface, 'subinterface': subinterface, } + + +class yc_state_openconfig_acl__acl_interfaces_interface_interface_ref_state(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/interface-ref/state. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Operational state for interface-ref + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__interface','__subinterface',) + + _yang_name = 'state' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__interface = YANGDynClass(base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + self.__subinterface = YANGDynClass(base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'interface-ref', u'state'] + + def _get_interface(self): + """ + Getter method for interface, mapped from YANG variable /acl/interfaces/interface/interface_ref/state/interface (leafref) + + YANG Description: Reference to a base interface. If a reference to a +subinterface is required, this leaf must be specified +to indicate the base interface. + """ + return self.__interface + + def _set_interface(self, v, load=False): + """ + Setter method for interface, mapped from YANG variable /acl/interfaces/interface/interface_ref/state/interface (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_interface is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_interface() directly. + + YANG Description: Reference to a base interface. If a reference to a +subinterface is required, this leaf must be specified +to indicate the base interface. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """interface must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False)""", + }) + + self.__interface = t + if hasattr(self, '_set'): + self._set() + + def _unset_interface(self): + self.__interface = YANGDynClass(base=unicode, is_leaf=True, yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + + + def _get_subinterface(self): + """ + Getter method for subinterface, mapped from YANG variable /acl/interfaces/interface/interface_ref/state/subinterface (leafref) + + YANG Description: Reference to a subinterface -- this requires the base +interface to be specified using the interface leaf in +this container. If only a reference to a base interface +is requuired, this leaf should not be set. + """ + return self.__subinterface + + def _set_subinterface(self, v, load=False): + """ + Setter method for subinterface, mapped from YANG variable /acl/interfaces/interface/interface_ref/state/subinterface (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_subinterface is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_subinterface() directly. + + YANG Description: Reference to a subinterface -- this requires the base +interface to be specified using the interface leaf in +this container. If only a reference to a base interface +is requuired, this leaf should not be set. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """subinterface must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False)""", + }) + + self.__subinterface = t + if hasattr(self, '_set'): + self._set() + + def _unset_subinterface(self): + self.__subinterface = YANGDynClass(base=unicode, is_leaf=True, yang_name="subinterface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + + interface = __builtin__.property(_get_interface) + subinterface = __builtin__.property(_get_subinterface) + + + _pyangbind_elements = {'interface': interface, 'subinterface': subinterface, } + + +class yc_interface_ref_openconfig_acl__acl_interfaces_interface_interface_ref(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/interface-ref. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Reference to an interface or subinterface + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__config','__state',) + + _yang_name = 'interface-ref' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_interface_ref_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_interfaces_interface_interface_ref_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'interface-ref'] + + def _get_config(self): + """ + Getter method for config, mapped from YANG variable /acl/interfaces/interface/interface_ref/config (container) + + YANG Description: Configured reference to interface / subinterface + """ + return self.__config + + def _set_config(self, v, load=False): + """ + Setter method for config, mapped from YANG variable /acl/interfaces/interface/interface_ref/config (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_config is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_config() directly. + + YANG Description: Configured reference to interface / subinterface + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_config_openconfig_acl__acl_interfaces_interface_interface_ref_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """config must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_config_openconfig_acl__acl_interfaces_interface_interface_ref_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__config = t + if hasattr(self, '_set'): + self._set() + + def _unset_config(self): + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_interfaces_interface_interface_ref_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_state(self): + """ + Getter method for state, mapped from YANG variable /acl/interfaces/interface/interface_ref/state (container) + + YANG Description: Operational state for interface-ref + """ + return self.__state + + def _set_state(self, v, load=False): + """ + Setter method for state, mapped from YANG variable /acl/interfaces/interface/interface_ref/state (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_state is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_state() directly. + + YANG Description: Operational state for interface-ref + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_state_openconfig_acl__acl_interfaces_interface_interface_ref_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """state must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_interface_ref_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__state = t + if hasattr(self, '_set'): + self._set() + + def _unset_state(self): + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_interface_ref_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + config = __builtin__.property(_get_config, _set_config) + state = __builtin__.property(_get_state, _set_state) + + + _pyangbind_elements = {'config': config, 'state': state, } + + +class yc_config_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_config(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/ingress-acl-sets/ingress-acl-set/config. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Configuration data + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__set_name',) + + _yang_name = 'config' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__set_name = YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'ingress-acl-sets', u'ingress-acl-set', u'config'] + + def _get_set_name(self): + """ + Getter method for set_name, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/config/set_name (leafref) + + YANG Description: Reference to the ACL set applied on ingress + """ + return self.__set_name + + def _set_set_name(self, v, load=False): + """ + Setter method for set_name, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/config/set_name (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_set_name is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_set_name() directly. + + YANG Description: Reference to the ACL set applied on ingress + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """set_name must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True)""", + }) + + self.__set_name = t + if hasattr(self, '_set'): + self._set() + + def _unset_set_name(self): + self.__set_name = YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + set_name = __builtin__.property(_get_set_name, _set_set_name) + + + _pyangbind_elements = {'set_name': set_name, } + + +class yc_state_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_state(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/ingress-acl-sets/ingress-acl-set/state. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Operational state data for interface ingress ACLs + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__set_name',) + + _yang_name = 'state' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__set_name = YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'ingress-acl-sets', u'ingress-acl-set', u'state'] + + def _get_set_name(self): + """ + Getter method for set_name, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/state/set_name (leafref) + + YANG Description: Reference to the ACL set applied on ingress + """ + return self.__set_name + + def _set_set_name(self, v, load=False): + """ + Setter method for set_name, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/state/set_name (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_set_name is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_set_name() directly. + + YANG Description: Reference to the ACL set applied on ingress + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """set_name must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False)""", + }) + + self.__set_name = t + if hasattr(self, '_set'): + self._set() + + def _unset_set_name(self): + self.__set_name = YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + + set_name = __builtin__.property(_get_set_name) + + + _pyangbind_elements = {'set_name': set_name, } + + +class yc_state_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries_acl_entry_state(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/ingress-acl-sets/ingress-acl-set/acl-entries/acl-entry/state. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Operational state data for per-interface ACL entries + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__sequence_id','__matched_packets','__matched_octets',) + + _yang_name = 'state' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__sequence_id = YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + self.__matched_packets = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-packets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + self.__matched_octets = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-octets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'ingress-acl-sets', u'ingress-acl-set', u'acl-entries', u'acl-entry', u'state'] + + def _get_sequence_id(self): + """ + Getter method for sequence_id, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/acl_entries/acl_entry/state/sequence_id (leafref) + + YANG Description: Reference to an entry in the ACL set applied to an +interface + """ + return self.__sequence_id + + def _set_sequence_id(self, v, load=False): + """ + Setter method for sequence_id, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/acl_entries/acl_entry/state/sequence_id (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_sequence_id is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_sequence_id() directly. + + YANG Description: Reference to an entry in the ACL set applied to an +interface + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """sequence_id must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False)""", + }) + + self.__sequence_id = t + if hasattr(self, '_set'): + self._set() + + def _unset_sequence_id(self): + self.__sequence_id = YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + + + def _get_matched_packets(self): + """ + Getter method for matched_packets, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/acl_entries/acl_entry/state/matched_packets (yang:counter64) + + YANG Description: Count of the number of packets matching the current ACL +entry. + +An implementation should provide this counter on a +per-interface per-ACL-entry if possible. + +If an implementation only supports ACL counters per entry +(i.e., not broken out per interface), then the value +should be equal to the aggregate count across all interfaces. + +An implementation that provides counters per entry per +interface is not required to also provide an aggregate count, +e.g., per entry -- the user is expected to be able implement +the required aggregation if such a count is needed. + """ + return self.__matched_packets + + def _set_matched_packets(self, v, load=False): + """ + Setter method for matched_packets, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/acl_entries/acl_entry/state/matched_packets (yang:counter64) + If this variable is read-only (config: false) in the + source YANG file, then _set_matched_packets is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_matched_packets() directly. + + YANG Description: Count of the number of packets matching the current ACL +entry. + +An implementation should provide this counter on a +per-interface per-ACL-entry if possible. + +If an implementation only supports ACL counters per entry +(i.e., not broken out per interface), then the value +should be equal to the aggregate count across all interfaces. + +An implementation that provides counters per entry per +interface is not required to also provide an aggregate count, +e.g., per entry -- the user is expected to be able implement +the required aggregation if such a count is needed. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-packets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """matched_packets must be of a type compatible with yang:counter64""", + 'defined-type': "yang:counter64", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-packets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False)""", + }) + + self.__matched_packets = t + if hasattr(self, '_set'): + self._set() + + def _unset_matched_packets(self): + self.__matched_packets = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-packets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + + + def _get_matched_octets(self): + """ + Getter method for matched_octets, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/acl_entries/acl_entry/state/matched_octets (yang:counter64) + + YANG Description: Count of the number of octets (bytes) matching the current +ACL entry. + +An implementation should provide this counter on a +per-interface per-ACL-entry if possible. + +If an implementation only supports ACL counters per entry +(i.e., not broken out per interface), then the value +should be equal to the aggregate count across all interfaces. + +An implementation that provides counters per entry per +interface is not required to also provide an aggregate count, +e.g., per entry -- the user is expected to be able implement +the required aggregation if such a count is needed. + """ + return self.__matched_octets + + def _set_matched_octets(self, v, load=False): + """ + Setter method for matched_octets, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/acl_entries/acl_entry/state/matched_octets (yang:counter64) + If this variable is read-only (config: false) in the + source YANG file, then _set_matched_octets is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_matched_octets() directly. + + YANG Description: Count of the number of octets (bytes) matching the current +ACL entry. + +An implementation should provide this counter on a +per-interface per-ACL-entry if possible. + +If an implementation only supports ACL counters per entry +(i.e., not broken out per interface), then the value +should be equal to the aggregate count across all interfaces. + +An implementation that provides counters per entry per +interface is not required to also provide an aggregate count, +e.g., per entry -- the user is expected to be able implement +the required aggregation if such a count is needed. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-octets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """matched_octets must be of a type compatible with yang:counter64""", + 'defined-type': "yang:counter64", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-octets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False)""", + }) + + self.__matched_octets = t + if hasattr(self, '_set'): + self._set() + + def _unset_matched_octets(self): + self.__matched_octets = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-octets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + + sequence_id = __builtin__.property(_get_sequence_id) + matched_packets = __builtin__.property(_get_matched_packets) + matched_octets = __builtin__.property(_get_matched_octets) + + + _pyangbind_elements = {'sequence_id': sequence_id, 'matched_packets': matched_packets, 'matched_octets': matched_octets, } + + +class yc_acl_entry_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries_acl_entry(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/ingress-acl-sets/ingress-acl-set/acl-entries/acl-entry. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: List of ACL entries assigned to an interface + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__sequence_id','__state',) + + _yang_name = 'acl-entry' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__sequence_id = YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries_acl_entry_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'ingress-acl-sets', u'ingress-acl-set', u'acl-entries', u'acl-entry'] + + def _get_sequence_id(self): + """ + Getter method for sequence_id, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/acl_entries/acl_entry/sequence_id (leafref) + + YANG Description: Reference to per-interface acl entry key + """ + return self.__sequence_id + + def _set_sequence_id(self, v, load=False): + """ + Setter method for sequence_id, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/acl_entries/acl_entry/sequence_id (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_sequence_id is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_sequence_id() directly. + + YANG Description: Reference to per-interface acl entry key + """ + parent = getattr(self, "_parent", None) + if parent is not None and load is False: + raise AttributeError("Cannot set keys directly when" + + " within an instantiated list") + + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """sequence_id must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False)""", + }) + + self.__sequence_id = t + if hasattr(self, '_set'): + self._set() + + def _unset_sequence_id(self): + self.__sequence_id = YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + + + def _get_state(self): + """ + Getter method for state, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/acl_entries/acl_entry/state (container) + + YANG Description: Operational state data for per-interface ACL entries + """ + return self.__state + + def _set_state(self, v, load=False): + """ + Setter method for state, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/acl_entries/acl_entry/state (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_state is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_state() directly. + + YANG Description: Operational state data for per-interface ACL entries + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_state_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries_acl_entry_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """state must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries_acl_entry_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=False)""", + }) + + self.__state = t + if hasattr(self, '_set'): + self._set() + + def _unset_state(self): + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries_acl_entry_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=False) + + sequence_id = __builtin__.property(_get_sequence_id) + state = __builtin__.property(_get_state) + + + _pyangbind_elements = {'sequence_id': sequence_id, 'state': state, } + + +class yc_acl_entries_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/ingress-acl-sets/ingress-acl-set/acl-entries. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Enclosing container for list of references to ACLs + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__acl_entry',) + + _yang_name = 'acl-entries' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__acl_entry = YANGDynClass(base=YANGListType("sequence_id",yc_acl_entry_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries_acl_entry, yang_name="acl-entry", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='sequence-id', extensions=None), is_container='list', yang_name="acl-entry", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'ingress-acl-sets', u'ingress-acl-set', u'acl-entries'] + + def _get_acl_entry(self): + """ + Getter method for acl_entry, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/acl_entries/acl_entry (list) + + YANG Description: List of ACL entries assigned to an interface + """ + return self.__acl_entry + + def _set_acl_entry(self, v, load=False): + """ + Setter method for acl_entry, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/acl_entries/acl_entry (list) + If this variable is read-only (config: false) in the + source YANG file, then _set_acl_entry is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_acl_entry() directly. + + YANG Description: List of ACL entries assigned to an interface + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=YANGListType("sequence_id",yc_acl_entry_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries_acl_entry, yang_name="acl-entry", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='sequence-id', extensions=None), is_container='list', yang_name="acl-entry", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """acl_entry must be of a type compatible with list""", + 'defined-type': "list", + 'generated-type': """YANGDynClass(base=YANGListType("sequence_id",yc_acl_entry_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries_acl_entry, yang_name="acl-entry", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='sequence-id', extensions=None), is_container='list', yang_name="acl-entry", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=False)""", + }) + + self.__acl_entry = t + if hasattr(self, '_set'): + self._set() + + def _unset_acl_entry(self): + self.__acl_entry = YANGDynClass(base=YANGListType("sequence_id",yc_acl_entry_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries_acl_entry, yang_name="acl-entry", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='sequence-id', extensions=None), is_container='list', yang_name="acl-entry", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=False) + + acl_entry = __builtin__.property(_get_acl_entry) + + + _pyangbind_elements = {'acl_entry': acl_entry, } + + +class yc_ingress_acl_set_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/ingress-acl-sets/ingress-acl-set. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: List of ingress ACLs on the interface + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__set_name','__config','__state','__acl_entries',) + + _yang_name = 'ingress-acl-set' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__set_name = YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__acl_entries = YANGDynClass(base=yc_acl_entries_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries, is_container='container', yang_name="acl-entries", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'ingress-acl-sets', u'ingress-acl-set'] + + def _get_set_name(self): + """ + Getter method for set_name, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/set_name (leafref) + + YANG Description: Reference to set name list key + """ + return self.__set_name + + def _set_set_name(self, v, load=False): + """ + Setter method for set_name, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/set_name (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_set_name is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_set_name() directly. + + YANG Description: Reference to set name list key + """ + parent = getattr(self, "_parent", None) + if parent is not None and load is False: + raise AttributeError("Cannot set keys directly when" + + " within an instantiated list") + + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """set_name must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True)""", + }) + + self.__set_name = t + if hasattr(self, '_set'): + self._set() + + def _unset_set_name(self): + self.__set_name = YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + + def _get_config(self): + """ + Getter method for config, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/config (container) + + YANG Description: Configuration data + """ + return self.__config + + def _set_config(self, v, load=False): + """ + Setter method for config, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/config (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_config is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_config() directly. + + YANG Description: Configuration data + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_config_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """config must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_config_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__config = t + if hasattr(self, '_set'): + self._set() + + def _unset_config(self): + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_state(self): + """ + Getter method for state, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/state (container) + + YANG Description: Operational state data for interface ingress ACLs + """ + return self.__state + + def _set_state(self, v, load=False): + """ + Setter method for state, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/state (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_state is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_state() directly. + + YANG Description: Operational state data for interface ingress ACLs + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_state_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """state must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__state = t + if hasattr(self, '_set'): + self._set() + + def _unset_state(self): + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_acl_entries(self): + """ + Getter method for acl_entries, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/acl_entries (container) + + YANG Description: Enclosing container for list of references to ACLs + """ + return self.__acl_entries + + def _set_acl_entries(self, v, load=False): + """ + Setter method for acl_entries, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set/acl_entries (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_acl_entries is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_acl_entries() directly. + + YANG Description: Enclosing container for list of references to ACLs + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_acl_entries_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries, is_container='container', yang_name="acl-entries", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """acl_entries must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_acl_entries_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries, is_container='container', yang_name="acl-entries", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__acl_entries = t + if hasattr(self, '_set'): + self._set() + + def _unset_acl_entries(self): + self.__acl_entries = YANGDynClass(base=yc_acl_entries_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set_acl_entries, is_container='container', yang_name="acl-entries", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + set_name = __builtin__.property(_get_set_name, _set_set_name) + config = __builtin__.property(_get_config, _set_config) + state = __builtin__.property(_get_state, _set_state) + acl_entries = __builtin__.property(_get_acl_entries, _set_acl_entries) + + + _pyangbind_elements = {'set_name': set_name, 'config': config, 'state': state, 'acl_entries': acl_entries, } + + +class yc_ingress_acl_sets_openconfig_acl__acl_interfaces_interface_ingress_acl_sets(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/ingress-acl-sets. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Enclosing container the list of ingress ACLs on the +interface + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__ingress_acl_set',) + + _yang_name = 'ingress-acl-sets' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__ingress_acl_set = YANGDynClass(base=YANGListType("set_name",yc_ingress_acl_set_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set, yang_name="ingress-acl-set", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='set-name', extensions=None), is_container='list', yang_name="ingress-acl-set", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'ingress-acl-sets'] + + def _get_ingress_acl_set(self): + """ + Getter method for ingress_acl_set, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set (list) + + YANG Description: List of ingress ACLs on the interface + """ + return self.__ingress_acl_set + + def _set_ingress_acl_set(self, v, load=False): + """ + Setter method for ingress_acl_set, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets/ingress_acl_set (list) + If this variable is read-only (config: false) in the + source YANG file, then _set_ingress_acl_set is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_ingress_acl_set() directly. + + YANG Description: List of ingress ACLs on the interface + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=YANGListType("set_name",yc_ingress_acl_set_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set, yang_name="ingress-acl-set", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='set-name', extensions=None), is_container='list', yang_name="ingress-acl-set", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """ingress_acl_set must be of a type compatible with list""", + 'defined-type': "list", + 'generated-type': """YANGDynClass(base=YANGListType("set_name",yc_ingress_acl_set_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set, yang_name="ingress-acl-set", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='set-name', extensions=None), is_container='list', yang_name="ingress-acl-set", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True)""", + }) + + self.__ingress_acl_set = t + if hasattr(self, '_set'): + self._set() + + def _unset_ingress_acl_set(self): + self.__ingress_acl_set = YANGDynClass(base=YANGListType("set_name",yc_ingress_acl_set_openconfig_acl__acl_interfaces_interface_ingress_acl_sets_ingress_acl_set, yang_name="ingress-acl-set", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='set-name', extensions=None), is_container='list', yang_name="ingress-acl-set", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + + ingress_acl_set = __builtin__.property(_get_ingress_acl_set, _set_ingress_acl_set) + + + _pyangbind_elements = {'ingress_acl_set': ingress_acl_set, } + + +class yc_config_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_config(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/egress-acl-sets/egress-acl-set/config. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Configuration data + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__set_name',) + + _yang_name = 'config' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__set_name = YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'egress-acl-sets', u'egress-acl-set', u'config'] + + def _get_set_name(self): + """ + Getter method for set_name, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/config/set_name (leafref) + + YANG Description: Reference to the ACL set applied on egress + """ + return self.__set_name + + def _set_set_name(self, v, load=False): + """ + Setter method for set_name, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/config/set_name (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_set_name is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_set_name() directly. + + YANG Description: Reference to the ACL set applied on egress + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """set_name must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True)""", + }) + + self.__set_name = t + if hasattr(self, '_set'): + self._set() + + def _unset_set_name(self): + self.__set_name = YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + set_name = __builtin__.property(_get_set_name, _set_set_name) + + + _pyangbind_elements = {'set_name': set_name, } + + +class yc_state_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_state(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/egress-acl-sets/egress-acl-set/state. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Operational state data for interface egress ACLs + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__set_name',) + + _yang_name = 'state' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__set_name = YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'egress-acl-sets', u'egress-acl-set', u'state'] + + def _get_set_name(self): + """ + Getter method for set_name, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/state/set_name (leafref) + + YANG Description: Reference to the ACL set applied on egress + """ + return self.__set_name + + def _set_set_name(self, v, load=False): + """ + Setter method for set_name, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/state/set_name (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_set_name is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_set_name() directly. + + YANG Description: Reference to the ACL set applied on egress + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """set_name must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False)""", + }) + + self.__set_name = t + if hasattr(self, '_set'): + self._set() + + def _unset_set_name(self): + self.__set_name = YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + + set_name = __builtin__.property(_get_set_name) + + + _pyangbind_elements = {'set_name': set_name, } + + +class yc_state_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries_acl_entry_state(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/egress-acl-sets/egress-acl-set/acl-entries/acl-entry/state. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Operational state data for per-interface ACL entries + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__sequence_id','__matched_packets','__matched_octets',) + + _yang_name = 'state' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__sequence_id = YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + self.__matched_packets = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-packets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + self.__matched_octets = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-octets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'egress-acl-sets', u'egress-acl-set', u'acl-entries', u'acl-entry', u'state'] + + def _get_sequence_id(self): + """ + Getter method for sequence_id, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/acl_entries/acl_entry/state/sequence_id (leafref) + + YANG Description: Reference to an entry in the ACL set applied to an +interface + """ + return self.__sequence_id + + def _set_sequence_id(self, v, load=False): + """ + Setter method for sequence_id, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/acl_entries/acl_entry/state/sequence_id (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_sequence_id is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_sequence_id() directly. + + YANG Description: Reference to an entry in the ACL set applied to an +interface + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """sequence_id must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False)""", + }) + + self.__sequence_id = t + if hasattr(self, '_set'): + self._set() + + def _unset_sequence_id(self): + self.__sequence_id = YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + + + def _get_matched_packets(self): + """ + Getter method for matched_packets, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/acl_entries/acl_entry/state/matched_packets (yang:counter64) + + YANG Description: Count of the number of packets matching the current ACL +entry. + +An implementation should provide this counter on a +per-interface per-ACL-entry if possible. + +If an implementation only supports ACL counters per entry +(i.e., not broken out per interface), then the value +should be equal to the aggregate count across all interfaces. + +An implementation that provides counters per entry per +interface is not required to also provide an aggregate count, +e.g., per entry -- the user is expected to be able implement +the required aggregation if such a count is needed. + """ + return self.__matched_packets + + def _set_matched_packets(self, v, load=False): + """ + Setter method for matched_packets, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/acl_entries/acl_entry/state/matched_packets (yang:counter64) + If this variable is read-only (config: false) in the + source YANG file, then _set_matched_packets is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_matched_packets() directly. + + YANG Description: Count of the number of packets matching the current ACL +entry. + +An implementation should provide this counter on a +per-interface per-ACL-entry if possible. + +If an implementation only supports ACL counters per entry +(i.e., not broken out per interface), then the value +should be equal to the aggregate count across all interfaces. + +An implementation that provides counters per entry per +interface is not required to also provide an aggregate count, +e.g., per entry -- the user is expected to be able implement +the required aggregation if such a count is needed. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-packets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """matched_packets must be of a type compatible with yang:counter64""", + 'defined-type': "yang:counter64", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-packets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False)""", + }) + + self.__matched_packets = t + if hasattr(self, '_set'): + self._set() + + def _unset_matched_packets(self): + self.__matched_packets = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-packets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + + + def _get_matched_octets(self): + """ + Getter method for matched_octets, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/acl_entries/acl_entry/state/matched_octets (yang:counter64) + + YANG Description: Count of the number of octets (bytes) matching the current +ACL entry. + +An implementation should provide this counter on a +per-interface per-ACL-entry if possible. + +If an implementation only supports ACL counters per entry +(i.e., not broken out per interface), then the value +should be equal to the aggregate count across all interfaces. + +An implementation that provides counters per entry per +interface is not required to also provide an aggregate count, +e.g., per entry -- the user is expected to be able implement +the required aggregation if such a count is needed. + """ + return self.__matched_octets + + def _set_matched_octets(self, v, load=False): + """ + Setter method for matched_octets, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/acl_entries/acl_entry/state/matched_octets (yang:counter64) + If this variable is read-only (config: false) in the + source YANG file, then _set_matched_octets is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_matched_octets() directly. + + YANG Description: Count of the number of octets (bytes) matching the current +ACL entry. + +An implementation should provide this counter on a +per-interface per-ACL-entry if possible. + +If an implementation only supports ACL counters per entry +(i.e., not broken out per interface), then the value +should be equal to the aggregate count across all interfaces. + +An implementation that provides counters per entry per +interface is not required to also provide an aggregate count, +e.g., per entry -- the user is expected to be able implement +the required aggregation if such a count is needed. + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-octets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """matched_octets must be of a type compatible with yang:counter64""", + 'defined-type': "yang:counter64", + 'generated-type': """YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-octets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False)""", + }) + + self.__matched_octets = t + if hasattr(self, '_set'): + self._set() + + def _unset_matched_octets(self): + self.__matched_octets = YANGDynClass(base=RestrictedClassType(base_type=long, restriction_dict={'range': ['0..18446744073709551615']}, int_size=64), is_leaf=True, yang_name="matched-octets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='yang:counter64', is_config=False) + + sequence_id = __builtin__.property(_get_sequence_id) + matched_packets = __builtin__.property(_get_matched_packets) + matched_octets = __builtin__.property(_get_matched_octets) + + + _pyangbind_elements = {'sequence_id': sequence_id, 'matched_packets': matched_packets, 'matched_octets': matched_octets, } + + +class yc_acl_entry_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries_acl_entry(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/egress-acl-sets/egress-acl-set/acl-entries/acl-entry. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: List of ACL entries assigned to an interface + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__sequence_id','__state',) + + _yang_name = 'acl-entry' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__sequence_id = YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries_acl_entry_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'egress-acl-sets', u'egress-acl-set', u'acl-entries', u'acl-entry'] + + def _get_sequence_id(self): + """ + Getter method for sequence_id, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/acl_entries/acl_entry/sequence_id (leafref) + + YANG Description: Reference to per-interface acl entry key + """ + return self.__sequence_id + + def _set_sequence_id(self, v, load=False): + """ + Setter method for sequence_id, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/acl_entries/acl_entry/sequence_id (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_sequence_id is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_sequence_id() directly. + + YANG Description: Reference to per-interface acl entry key + """ + parent = getattr(self, "_parent", None) + if parent is not None and load is False: + raise AttributeError("Cannot set keys directly when" + + " within an instantiated list") + + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """sequence_id must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False)""", + }) + + self.__sequence_id = t + if hasattr(self, '_set'): + self._set() + + def _unset_sequence_id(self): + self.__sequence_id = YANGDynClass(base=unicode, is_leaf=True, yang_name="sequence-id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=False) + + + def _get_state(self): + """ + Getter method for state, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/acl_entries/acl_entry/state (container) + + YANG Description: Operational state data for per-interface ACL entries + """ + return self.__state + + def _set_state(self, v, load=False): + """ + Setter method for state, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/acl_entries/acl_entry/state (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_state is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_state() directly. + + YANG Description: Operational state data for per-interface ACL entries + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_state_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries_acl_entry_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """state must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries_acl_entry_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=False)""", + }) + + self.__state = t + if hasattr(self, '_set'): + self._set() + + def _unset_state(self): + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries_acl_entry_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=False) + + sequence_id = __builtin__.property(_get_sequence_id) + state = __builtin__.property(_get_state) + + + _pyangbind_elements = {'sequence_id': sequence_id, 'state': state, } + + +class yc_acl_entries_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/egress-acl-sets/egress-acl-set/acl-entries. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Enclosing container for list of references to ACLs + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__acl_entry',) + + _yang_name = 'acl-entries' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__acl_entry = YANGDynClass(base=YANGListType("sequence_id",yc_acl_entry_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries_acl_entry, yang_name="acl-entry", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='sequence-id', extensions=None), is_container='list', yang_name="acl-entry", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=False) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'egress-acl-sets', u'egress-acl-set', u'acl-entries'] + + def _get_acl_entry(self): + """ + Getter method for acl_entry, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/acl_entries/acl_entry (list) + + YANG Description: List of ACL entries assigned to an interface + """ + return self.__acl_entry + + def _set_acl_entry(self, v, load=False): + """ + Setter method for acl_entry, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/acl_entries/acl_entry (list) + If this variable is read-only (config: false) in the + source YANG file, then _set_acl_entry is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_acl_entry() directly. + + YANG Description: List of ACL entries assigned to an interface + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=YANGListType("sequence_id",yc_acl_entry_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries_acl_entry, yang_name="acl-entry", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='sequence-id', extensions=None), is_container='list', yang_name="acl-entry", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=False) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """acl_entry must be of a type compatible with list""", + 'defined-type': "list", + 'generated-type': """YANGDynClass(base=YANGListType("sequence_id",yc_acl_entry_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries_acl_entry, yang_name="acl-entry", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='sequence-id', extensions=None), is_container='list', yang_name="acl-entry", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=False)""", + }) + + self.__acl_entry = t + if hasattr(self, '_set'): + self._set() + + def _unset_acl_entry(self): + self.__acl_entry = YANGDynClass(base=YANGListType("sequence_id",yc_acl_entry_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries_acl_entry, yang_name="acl-entry", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='sequence-id', extensions=None), is_container='list', yang_name="acl-entry", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=False) + + acl_entry = __builtin__.property(_get_acl_entry) + + + _pyangbind_elements = {'acl_entry': acl_entry, } + + +class yc_egress_acl_set_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/egress-acl-sets/egress-acl-set. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: List of egress ACLs on the interface + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__set_name','__config','__state','__acl_entries',) + + _yang_name = 'egress-acl-set' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__set_name = YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__acl_entries = YANGDynClass(base=yc_acl_entries_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries, is_container='container', yang_name="acl-entries", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'egress-acl-sets', u'egress-acl-set'] + + def _get_set_name(self): + """ + Getter method for set_name, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/set_name (leafref) + + YANG Description: Reference to set name list key + """ + return self.__set_name + + def _set_set_name(self, v, load=False): + """ + Setter method for set_name, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/set_name (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_set_name is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_set_name() directly. + + YANG Description: Reference to set name list key + """ + parent = getattr(self, "_parent", None) + if parent is not None and load is False: + raise AttributeError("Cannot set keys directly when" + + " within an instantiated list") + + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """set_name must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True)""", + }) + + self.__set_name = t + if hasattr(self, '_set'): + self._set() + + def _unset_set_name(self): + self.__set_name = YANGDynClass(base=unicode, is_leaf=True, yang_name="set-name", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + + def _get_config(self): + """ + Getter method for config, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/config (container) + + YANG Description: Configuration data + """ + return self.__config + + def _set_config(self, v, load=False): + """ + Setter method for config, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/config (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_config is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_config() directly. + + YANG Description: Configuration data + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_config_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """config must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_config_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__config = t + if hasattr(self, '_set'): + self._set() + + def _unset_config(self): + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_state(self): + """ + Getter method for state, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/state (container) + + YANG Description: Operational state data for interface egress ACLs + """ + return self.__state + + def _set_state(self, v, load=False): + """ + Setter method for state, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/state (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_state is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_state() directly. + + YANG Description: Operational state data for interface egress ACLs + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_state_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """state must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__state = t + if hasattr(self, '_set'): + self._set() + + def _unset_state(self): + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_acl_entries(self): + """ + Getter method for acl_entries, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/acl_entries (container) + + YANG Description: Enclosing container for list of references to ACLs + """ + return self.__acl_entries + + def _set_acl_entries(self, v, load=False): + """ + Setter method for acl_entries, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set/acl_entries (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_acl_entries is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_acl_entries() directly. + + YANG Description: Enclosing container for list of references to ACLs + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_acl_entries_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries, is_container='container', yang_name="acl-entries", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """acl_entries must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_acl_entries_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries, is_container='container', yang_name="acl-entries", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__acl_entries = t + if hasattr(self, '_set'): + self._set() + + def _unset_acl_entries(self): + self.__acl_entries = YANGDynClass(base=yc_acl_entries_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set_acl_entries, is_container='container', yang_name="acl-entries", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + set_name = __builtin__.property(_get_set_name, _set_set_name) + config = __builtin__.property(_get_config, _set_config) + state = __builtin__.property(_get_state, _set_state) + acl_entries = __builtin__.property(_get_acl_entries, _set_acl_entries) + + + _pyangbind_elements = {'set_name': set_name, 'config': config, 'state': state, 'acl_entries': acl_entries, } + + +class yc_egress_acl_sets_openconfig_acl__acl_interfaces_interface_egress_acl_sets(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface/egress-acl-sets. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Enclosing container the list of egress ACLs on the +interface + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__egress_acl_set',) + + _yang_name = 'egress-acl-sets' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__egress_acl_set = YANGDynClass(base=YANGListType("set_name",yc_egress_acl_set_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set, yang_name="egress-acl-set", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='set-name', extensions=None), is_container='list', yang_name="egress-acl-set", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface', u'egress-acl-sets'] + + def _get_egress_acl_set(self): + """ + Getter method for egress_acl_set, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set (list) + + YANG Description: List of egress ACLs on the interface + """ + return self.__egress_acl_set + + def _set_egress_acl_set(self, v, load=False): + """ + Setter method for egress_acl_set, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets/egress_acl_set (list) + If this variable is read-only (config: false) in the + source YANG file, then _set_egress_acl_set is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_egress_acl_set() directly. + + YANG Description: List of egress ACLs on the interface + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=YANGListType("set_name",yc_egress_acl_set_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set, yang_name="egress-acl-set", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='set-name', extensions=None), is_container='list', yang_name="egress-acl-set", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """egress_acl_set must be of a type compatible with list""", + 'defined-type': "list", + 'generated-type': """YANGDynClass(base=YANGListType("set_name",yc_egress_acl_set_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set, yang_name="egress-acl-set", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='set-name', extensions=None), is_container='list', yang_name="egress-acl-set", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True)""", + }) + + self.__egress_acl_set = t + if hasattr(self, '_set'): + self._set() + + def _unset_egress_acl_set(self): + self.__egress_acl_set = YANGDynClass(base=YANGListType("set_name",yc_egress_acl_set_openconfig_acl__acl_interfaces_interface_egress_acl_sets_egress_acl_set, yang_name="egress-acl-set", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='set-name', extensions=None), is_container='list', yang_name="egress-acl-set", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + + egress_acl_set = __builtin__.property(_get_egress_acl_set, _set_egress_acl_set) + + + _pyangbind_elements = {'egress_acl_set': egress_acl_set, } + + +class yc_interface_openconfig_acl__acl_interfaces_interface(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces/interface. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: List of interfaces on which ACLs are set + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__id','__config','__state','__interface_ref','__ingress_acl_sets','__egress_acl_sets',) + + _yang_name = 'interface' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__ingress_acl_sets = YANGDynClass(base=yc_ingress_acl_sets_openconfig_acl__acl_interfaces_interface_ingress_acl_sets, is_container='container', yang_name="ingress-acl-sets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__egress_acl_sets = YANGDynClass(base=yc_egress_acl_sets_openconfig_acl__acl_interfaces_interface_egress_acl_sets, is_container='container', yang_name="egress-acl-sets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_interfaces_interface_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__id = YANGDynClass(base=unicode, is_leaf=True, yang_name="id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + self.__interface_ref = YANGDynClass(base=yc_interface_ref_openconfig_acl__acl_interfaces_interface_interface_ref, is_container='container', yang_name="interface-ref", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces', u'interface'] + + def _get_id(self): + """ + Getter method for id, mapped from YANG variable /acl/interfaces/interface/id (leafref) + + YANG Description: Reference to the interface id list key + """ + return self.__id + + def _set_id(self, v, load=False): + """ + Setter method for id, mapped from YANG variable /acl/interfaces/interface/id (leafref) + If this variable is read-only (config: false) in the + source YANG file, then _set_id is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_id() directly. + + YANG Description: Reference to the interface id list key + """ + parent = getattr(self, "_parent", None) + if parent is not None and load is False: + raise AttributeError("Cannot set keys directly when" + + " within an instantiated list") + + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=unicode, is_leaf=True, yang_name="id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """id must be of a type compatible with leafref""", + 'defined-type': "leafref", + 'generated-type': """YANGDynClass(base=unicode, is_leaf=True, yang_name="id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True)""", + }) + + self.__id = t + if hasattr(self, '_set'): + self._set() + + def _unset_id(self): + self.__id = YANGDynClass(base=unicode, is_leaf=True, yang_name="id", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, is_keyval=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='leafref', is_config=True) + + + def _get_config(self): + """ + Getter method for config, mapped from YANG variable /acl/interfaces/interface/config (container) + + YANG Description: Configuration for ACL per-interface data + """ + return self.__config + + def _set_config(self, v, load=False): + """ + Setter method for config, mapped from YANG variable /acl/interfaces/interface/config (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_config is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_config() directly. + + YANG Description: Configuration for ACL per-interface data + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_config_openconfig_acl__acl_interfaces_interface_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """config must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_config_openconfig_acl__acl_interfaces_interface_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__config = t + if hasattr(self, '_set'): + self._set() + + def _unset_config(self): + self.__config = YANGDynClass(base=yc_config_openconfig_acl__acl_interfaces_interface_config, is_container='container', yang_name="config", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_state(self): + """ + Getter method for state, mapped from YANG variable /acl/interfaces/interface/state (container) + + YANG Description: Operational state for ACL per-interface data + """ + return self.__state + + def _set_state(self, v, load=False): + """ + Setter method for state, mapped from YANG variable /acl/interfaces/interface/state (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_state is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_state() directly. + + YANG Description: Operational state for ACL per-interface data + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_state_openconfig_acl__acl_interfaces_interface_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """state must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__state = t + if hasattr(self, '_set'): + self._set() + + def _unset_state(self): + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_interfaces_interface_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_interface_ref(self): + """ + Getter method for interface_ref, mapped from YANG variable /acl/interfaces/interface/interface_ref (container) + + YANG Description: Reference to an interface or subinterface + """ + return self.__interface_ref + + def _set_interface_ref(self, v, load=False): + """ + Setter method for interface_ref, mapped from YANG variable /acl/interfaces/interface/interface_ref (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_interface_ref is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_interface_ref() directly. + + YANG Description: Reference to an interface or subinterface + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_interface_ref_openconfig_acl__acl_interfaces_interface_interface_ref, is_container='container', yang_name="interface-ref", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """interface_ref must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_interface_ref_openconfig_acl__acl_interfaces_interface_interface_ref, is_container='container', yang_name="interface-ref", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__interface_ref = t + if hasattr(self, '_set'): + self._set() + + def _unset_interface_ref(self): + self.__interface_ref = YANGDynClass(base=yc_interface_ref_openconfig_acl__acl_interfaces_interface_interface_ref, is_container='container', yang_name="interface-ref", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_ingress_acl_sets(self): + """ + Getter method for ingress_acl_sets, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets (container) + + YANG Description: Enclosing container the list of ingress ACLs on the +interface + """ + return self.__ingress_acl_sets + + def _set_ingress_acl_sets(self, v, load=False): + """ + Setter method for ingress_acl_sets, mapped from YANG variable /acl/interfaces/interface/ingress_acl_sets (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_ingress_acl_sets is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_ingress_acl_sets() directly. + + YANG Description: Enclosing container the list of ingress ACLs on the +interface + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_ingress_acl_sets_openconfig_acl__acl_interfaces_interface_ingress_acl_sets, is_container='container', yang_name="ingress-acl-sets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """ingress_acl_sets must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_ingress_acl_sets_openconfig_acl__acl_interfaces_interface_ingress_acl_sets, is_container='container', yang_name="ingress-acl-sets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__ingress_acl_sets = t + if hasattr(self, '_set'): + self._set() + + def _unset_ingress_acl_sets(self): + self.__ingress_acl_sets = YANGDynClass(base=yc_ingress_acl_sets_openconfig_acl__acl_interfaces_interface_ingress_acl_sets, is_container='container', yang_name="ingress-acl-sets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_egress_acl_sets(self): + """ + Getter method for egress_acl_sets, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets (container) + + YANG Description: Enclosing container the list of egress ACLs on the +interface + """ + return self.__egress_acl_sets + + def _set_egress_acl_sets(self, v, load=False): + """ + Setter method for egress_acl_sets, mapped from YANG variable /acl/interfaces/interface/egress_acl_sets (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_egress_acl_sets is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_egress_acl_sets() directly. + + YANG Description: Enclosing container the list of egress ACLs on the +interface + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_egress_acl_sets_openconfig_acl__acl_interfaces_interface_egress_acl_sets, is_container='container', yang_name="egress-acl-sets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """egress_acl_sets must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_egress_acl_sets_openconfig_acl__acl_interfaces_interface_egress_acl_sets, is_container='container', yang_name="egress-acl-sets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__egress_acl_sets = t + if hasattr(self, '_set'): + self._set() + + def _unset_egress_acl_sets(self): + self.__egress_acl_sets = YANGDynClass(base=yc_egress_acl_sets_openconfig_acl__acl_interfaces_interface_egress_acl_sets, is_container='container', yang_name="egress-acl-sets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + id = __builtin__.property(_get_id, _set_id) + config = __builtin__.property(_get_config, _set_config) + state = __builtin__.property(_get_state, _set_state) + interface_ref = __builtin__.property(_get_interface_ref, _set_interface_ref) + ingress_acl_sets = __builtin__.property(_get_ingress_acl_sets, _set_ingress_acl_sets) + egress_acl_sets = __builtin__.property(_get_egress_acl_sets, _set_egress_acl_sets) + + + _pyangbind_elements = {'id': id, 'config': config, 'state': state, 'interface_ref': interface_ref, 'ingress_acl_sets': ingress_acl_sets, 'egress_acl_sets': egress_acl_sets, } + + +class yc_interfaces_openconfig_acl__acl_interfaces(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl/interfaces. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Enclosing container for the list of interfaces on which +ACLs are set + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__interface',) + + _yang_name = 'interfaces' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__interface = YANGDynClass(base=YANGListType("id",yc_interface_openconfig_acl__acl_interfaces_interface, yang_name="interface", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='id', extensions=None), is_container='list', yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl', u'interfaces'] + + def _get_interface(self): + """ + Getter method for interface, mapped from YANG variable /acl/interfaces/interface (list) + + YANG Description: List of interfaces on which ACLs are set + """ + return self.__interface + + def _set_interface(self, v, load=False): + """ + Setter method for interface, mapped from YANG variable /acl/interfaces/interface (list) + If this variable is read-only (config: false) in the + source YANG file, then _set_interface is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_interface() directly. + + YANG Description: List of interfaces on which ACLs are set + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=YANGListType("id",yc_interface_openconfig_acl__acl_interfaces_interface, yang_name="interface", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='id', extensions=None), is_container='list', yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """interface must be of a type compatible with list""", + 'defined-type': "list", + 'generated-type': """YANGDynClass(base=YANGListType("id",yc_interface_openconfig_acl__acl_interfaces_interface, yang_name="interface", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='id', extensions=None), is_container='list', yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True)""", + }) + + self.__interface = t + if hasattr(self, '_set'): + self._set() + + def _unset_interface(self): + self.__interface = YANGDynClass(base=YANGListType("id",yc_interface_openconfig_acl__acl_interfaces_interface, yang_name="interface", parent=self, is_container='list', user_ordered=False, path_helper=self._path_helper, yang_keys='id', extensions=None), is_container='list', yang_name="interface", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='list', is_config=True) + + interface = __builtin__.property(_get_interface, _set_interface) + + + _pyangbind_elements = {'interface': interface, } + + +class yc_acl_openconfig_acl__acl(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /acl. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: Top level enclosing container for ACL model config +and operational state data + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__state','__acl_sets','__interfaces',) + + _yang_name = 'acl' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__acl_sets = YANGDynClass(base=yc_acl_sets_openconfig_acl__acl_acl_sets, is_container='container', yang_name="acl-sets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + self.__interfaces = YANGDynClass(base=yc_interfaces_openconfig_acl__acl_interfaces, is_container='container', yang_name="interfaces", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [u'acl'] + + def _get_state(self): + """ + Getter method for state, mapped from YANG variable /acl/state (container) + + YANG Description: Global operational state data for ACLs + """ + return self.__state + + def _set_state(self, v, load=False): + """ + Setter method for state, mapped from YANG variable /acl/state (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_state is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_state() directly. + + YANG Description: Global operational state data for ACLs + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_state_openconfig_acl__acl_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """state must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_state_openconfig_acl__acl_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__state = t + if hasattr(self, '_set'): + self._set() + + def _unset_state(self): + self.__state = YANGDynClass(base=yc_state_openconfig_acl__acl_state, is_container='container', yang_name="state", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_acl_sets(self): + """ + Getter method for acl_sets, mapped from YANG variable /acl/acl_sets (container) + + YANG Description: Access list entries variables enclosing container + """ + return self.__acl_sets + + def _set_acl_sets(self, v, load=False): + """ + Setter method for acl_sets, mapped from YANG variable /acl/acl_sets (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_acl_sets is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_acl_sets() directly. + + YANG Description: Access list entries variables enclosing container + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_acl_sets_openconfig_acl__acl_acl_sets, is_container='container', yang_name="acl-sets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """acl_sets must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_acl_sets_openconfig_acl__acl_acl_sets, is_container='container', yang_name="acl-sets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__acl_sets = t + if hasattr(self, '_set'): + self._set() + + def _unset_acl_sets(self): + self.__acl_sets = YANGDynClass(base=yc_acl_sets_openconfig_acl__acl_acl_sets, is_container='container', yang_name="acl-sets", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + + def _get_interfaces(self): + """ + Getter method for interfaces, mapped from YANG variable /acl/interfaces (container) + + YANG Description: Enclosing container for the list of interfaces on which +ACLs are set + """ + return self.__interfaces + + def _set_interfaces(self, v, load=False): + """ + Setter method for interfaces, mapped from YANG variable /acl/interfaces (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_interfaces is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_interfaces() directly. + + YANG Description: Enclosing container for the list of interfaces on which +ACLs are set + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_interfaces_openconfig_acl__acl_interfaces, is_container='container', yang_name="interfaces", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """interfaces must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_interfaces_openconfig_acl__acl_interfaces, is_container='container', yang_name="interfaces", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__interfaces = t + if hasattr(self, '_set'): + self._set() + + def _unset_interfaces(self): + self.__interfaces = YANGDynClass(base=yc_interfaces_openconfig_acl__acl_interfaces, is_container='container', yang_name="interfaces", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + state = __builtin__.property(_get_state, _set_state) + acl_sets = __builtin__.property(_get_acl_sets, _set_acl_sets) + interfaces = __builtin__.property(_get_interfaces, _set_interfaces) + + + _pyangbind_elements = {'state': state, 'acl_sets': acl_sets, 'interfaces': interfaces, } + + +class openconfig_acl(PybindBase): + """ + This class was auto-generated by the PythonClass plugin for PYANG + from YANG module openconfig-acl - based on the path /openconfig-acl. Each member element of + the container is represented as a class variable - with a specific + YANG type. + + YANG Description: This module defines configuration and operational state +data for network access control lists (i.e., filters, rules, +etc.). ACLs are organized into ACL sets, with each set +containing one or more ACL entries. ACL sets are identified +by a unique name, while each entry within a set is assigned +a sequence-id that determines the order in which the ACL +rules are applied to a packet. + +The model allows individual ACL rules to combine match criteria +from various fields in the packet, along with an action that +defines how matching packets should be handled. Note that some +device implementations may require separate entries for match +criteria that cross protocol layers, e.g., MAC layer and IP +layer matches. + """ + __slots__ = ('_pybind_generated_by', '_path_helper', '_yang_name', '_extmethods', '__acl',) + + _yang_name = 'openconfig-acl' + + _pybind_generated_by = 'container' + + def __init__(self, *args, **kwargs): + + self._path_helper = False + + self._extmethods = False + self.__acl = YANGDynClass(base=yc_acl_openconfig_acl__acl, is_container='container', yang_name="acl", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + load = kwargs.pop("load", None) + if args: + if len(args) > 1: + raise TypeError("cannot create a YANG container with >1 argument") + all_attr = True + for e in self._pyangbind_elements: + if not hasattr(args[0], e): + all_attr = False + break + if not all_attr: + raise ValueError("Supplied object did not have the correct attributes") + for e in self._pyangbind_elements: + nobj = getattr(args[0], e) + if nobj._changed() is False: + continue + setmethod = getattr(self, "_set_%s" % e) + if load is None: + setmethod(getattr(args[0], e)) + else: + setmethod(getattr(args[0], e), load=load) + + def _path(self): + if hasattr(self, "_parent"): + return self._parent._path()+[self._yang_name] + else: + return [] + + def _get_acl(self): + """ + Getter method for acl, mapped from YANG variable /acl (container) + + YANG Description: Top level enclosing container for ACL model config +and operational state data + """ + return self.__acl + + def _set_acl(self, v, load=False): + """ + Setter method for acl, mapped from YANG variable /acl (container) + If this variable is read-only (config: false) in the + source YANG file, then _set_acl is considered as a private + method. Backends looking to populate this variable should + do so via calling thisObj._set_acl() directly. + + YANG Description: Top level enclosing container for ACL model config +and operational state data + """ + if hasattr(v, "_utype"): + v = v._utype(v) + try: + t = YANGDynClass(v,base=yc_acl_openconfig_acl__acl, is_container='container', yang_name="acl", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + except (TypeError, ValueError): + raise ValueError({ + 'error-string': """acl must be of a type compatible with container""", + 'defined-type': "container", + 'generated-type': """YANGDynClass(base=yc_acl_openconfig_acl__acl, is_container='container', yang_name="acl", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True)""", + }) + + self.__acl = t + if hasattr(self, '_set'): + self._set() + + def _unset_acl(self): + self.__acl = YANGDynClass(base=yc_acl_openconfig_acl__acl, is_container='container', yang_name="acl", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, extensions=None, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='container', is_config=True) + + acl = __builtin__.property(_get_acl, _set_acl) + + + _pyangbind_elements = {'acl': acl, } diff --git a/src/sonic-config-engine/portconfig.py b/src/sonic-config-engine/portconfig.py new file mode 100644 index 00000000000..db2baa30817 --- /dev/null +++ b/src/sonic-config-engine/portconfig.py @@ -0,0 +1,54 @@ +#!/usr/bin/env python +import os +import sys + + +def get_port_config_file_name(hwsku=None, platform=None): + port_config_candidates = [] + port_config_candidates.append('/usr/share/sonic/hwsku/port_config.ini') + if hwsku: + if platform: + port_config_candidates.append(os.path.join('/usr/share/sonic/device', platform, hwsku, 'port_config.ini')) + port_config_candidates.append(os.path.join('/usr/share/sonic/platform', hwsku, 'port_config.ini')) + port_config_candidates.append(os.path.join('/usr/share/sonic', hwsku, 'port_config.ini')) + for candidate in port_config_candidates: + if os.path.isfile(candidate): + return candidate + return None + + +def get_port_config(hwsku=None, platform=None, port_config_file=None): + if not port_config_file: + port_config_file = get_port_config_file_name(hwsku, platform) + if not port_config_file: + return ({}, {}) + return parse_port_config_file(port_config_file) + + +def parse_port_config_file(port_config_file): + ports = {} + port_alias_map = {} + # Default column definition + titles = ['name', 'lanes', 'alias', 'index'] + with open(port_config_file) as data: + for line in data: + if line.startswith('#'): + if "name" in line: + titles = line.strip('#').split() + continue; + tokens = line.split() + if len(tokens) < 2: + continue + name_index = titles.index('name') + name = tokens[name_index] + data = {} + for i, item in enumerate(tokens): + if i == name_index: + continue + data[titles[i]] = item + data.setdefault('alias', name) + ports[name] = data + port_alias_map[data['alias']] = name + return (ports, port_alias_map) + + diff --git a/src/sonic-config-engine/redis_bcc.py b/src/sonic-config-engine/redis_bcc.py new file mode 100644 index 00000000000..5ab59b6a695 --- /dev/null +++ b/src/sonic-config-engine/redis_bcc.py @@ -0,0 +1,26 @@ +import jinja2 + +class RedisBytecodeCache(jinja2.BytecodeCache): + """ A bytecode cache for jinja2 template that stores bytecode in Redis """ + + REDIS_HASH = 'JINJA2_CACHE' + + def __init__(self, client): + self._client = client + try: + self._client.connect(self._client.STATE_DB, retry_on=False) + except Exception: + self._client = None + + def load_bytecode(self, bucket): + if self._client is None: + return + code = self._client.get(self._client.STATE_DB, self.REDIS_HASH, bucket.key) + if code is not None: + bucket.bytecode_from_string(code) + + def dump_bytecode(self, bucket): + if self._client is None: + return + self._client.set(self._client.STATE_DB, self.REDIS_HASH, bucket.key, bucket.bytecode_to_string()) + diff --git a/src/sonic-config-engine/setup.py b/src/sonic-config-engine/setup.py new file mode 100755 index 00000000000..c75a5b5a03a --- /dev/null +++ b/src/sonic-config-engine/setup.py @@ -0,0 +1,26 @@ +#!/usr/bin/env python + +from setuptools import setup +import os.path +import unittest +import glob + +def get_test_suite(): + test_loader = unittest.TestLoader() + test_suite = test_loader.discover('tests', pattern='*.py') + return test_suite + +setup(name='sonic-config-engine', + version='1.0', + description='Utilities for generating SONiC configuration files', + author='Taoyu Li', + author_email='taoyl@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + py_modules=['portconfig', 'minigraph', 'openconfig_acl', 'sonic_device_util', 'config_samples', 'redis_bcc', 'lazy_re'], + scripts=['sonic-cfggen'], + install_requires=['lxml', 'jinja2>=2.10', 'netaddr', 'ipaddr', 'pyyaml', 'pyangbind==0.6.0'], + test_suite='setup.get_test_suite', + data_files=[ + ('/usr/share/sonic/templates', glob.glob('data/*')), + ], + ) diff --git a/src/sonic-config-engine/sonic-cfggen b/src/sonic-config-engine/sonic-cfggen new file mode 100755 index 00000000000..7cff6c9fb38 --- /dev/null +++ b/src/sonic-config-engine/sonic-cfggen @@ -0,0 +1,318 @@ +#!/usr/bin/env python +"""sonic-cfggen + +A tool to read SONiC config data from one or more of the following sources: +minigraph file, config DB, json file(s), yaml files(s), command line input, +and write the data into DB, print as json, or render a jinja2 config template. + +Examples: + Render template with minigraph: + sonic-cfggen -m -t /usr/share/template/bgpd.conf.j2 + Dump config DB content into json file: + sonic-cfggen -d --print-data > db_dump.json + Load content of json file into config DB: + sonic-cfggen -j db_dump.json --write-to-db +See usage string for detail description for arguments. +""" + +from __future__ import print_function + +# monkey patch re.compile to do lazy regular expression compilation. +# This is done to improve import time of jinja2, yaml, natsort modules, because they +# do many regexp compilation at import time, so it will speed up sonic-cfggen invocations +# that do not require template generation or yaml loading. sonic-cfggen is used in so many places +# during system boot up that importing jinja2, yaml, natsort every time +# without lazy regular expression compilation affect boot up time. +# FIXME: remove this once sonic-cfggen and templates dependencies are replaced with a faster approach +import lazy_re + +import sys +import os.path +import argparse +import yaml +import jinja2 +import netaddr +import json +from functools import partial +from minigraph import minigraph_encoder +from minigraph import parse_xml +from minigraph import parse_device_desc_xml +from portconfig import get_port_config +from sonic_device_util import get_machine_info +from sonic_device_util import get_platform_info +from sonic_device_util import get_system_mac +from config_samples import generate_sample_config +from config_samples import get_available_config +from swsssdk import SonicV2Connector, ConfigDBConnector +from redis_bcc import RedisBytecodeCache +from collections import OrderedDict +from natsort import natsorted + +def sort_by_port_index(value): + if not value: + return + if isinstance(value, list): + value.sort(key = lambda k: int(k[8:])) + +def is_ipv4(value): + if not value: + return False + if isinstance(value, netaddr.IPNetwork): + addr = value + else: + try: + addr = netaddr.IPNetwork(str(value)) + except: + return False + return addr.version == 4 + +def is_ipv6(value): + if not value: + return False + if isinstance(value, netaddr.IPNetwork): + addr = value + else: + try: + addr = netaddr.IPNetwork(str(value)) + except: + return False + return addr.version == 6 + +def prefix_attr(attr, value): + if not value: + return None + else: + try: + prefix = netaddr.IPNetwork(str(value)) + except: + return None + return str(getattr(prefix, attr)) + +def unique_name(l): + name_list = [] + new_list = [] + for item in l: + if item['name'] not in name_list: + name_list.append(item['name']) + new_list.append(item) + return new_list + +def pfx_filter(value): + """INTERFACE Table can have keys in one of the two formats: + string or tuple - This filter skips the string keys and only + take into account the tuple. + For eg - VLAN_INTERFACE|Vlan1000 vs VLAN_INTERFACE|Vlan1000|192.168.0.1/21 + """ + table = OrderedDict() + + if not value: + return table + + for key,val in value.items(): + if not isinstance(key, tuple): + continue + table[key] = val + return table + +def ip_network(value): + """ Extract network for network prefix """ + try: + r_v = netaddr.IPNetwork(value) + except: + return "Invalid ip address %s" % value + return r_v.network + +class FormatConverter: + """Convert config DB based schema to legacy minigraph based schema for backward capability. +We will move to DB schema and remove this class when the config templates are modified. + +TODO(taoyl): Current version of config db only supports BGP admin states. + All other configuration are still loaded from minigraph. Plan to remove + minigraph and move everything into config db in a later commit. + """ + @staticmethod + def db_to_output(db_data): + return db_data + + @staticmethod + def output_to_db(output_data): + db_data = {} + for table_name in output_data: + if table_name[0].isupper(): + db_data[table_name] = output_data[table_name] + return db_data + + @staticmethod + def to_serialized(data, lookup_key = None): + if type(data) is dict: + data = OrderedDict(natsorted(data.items())) + + if lookup_key != None: + newData = {} + for key in data.keys(): + if ((type(key) is unicode and lookup_key == key) or (type(key) is tuple and lookup_key in key)): + newData[ConfigDBConnector.serialize_key(key)] = data.pop(key) + break + return newData + + for key in data.keys(): + new_key = ConfigDBConnector.serialize_key(key) + if new_key != key: + data[new_key] = data.pop(key) + data[new_key] = FormatConverter.to_serialized(data[new_key]) + return data + + @staticmethod + def to_deserialized(data): + for table in data: + if type(data[table]) is dict: + for key in data[table].keys(): + new_key = ConfigDBConnector.deserialize_key(key) + if new_key != key: + data[table][new_key] = data[table].pop(key) + return data + + +def deep_update(dst, src): + for key, value in src.iteritems(): + if isinstance(value, dict): + node = dst.setdefault(key, {}) + deep_update(node, value) + else: + dst[key] = value + return dst + +def sort_data(data): + for table in data: + if type(data[table]) is dict: + data[table] = OrderedDict(natsorted(data[table].items())) + return data + + +def main(): + parser=argparse.ArgumentParser(description="Render configuration file from minigraph data and jinja2 template.") + group = parser.add_mutually_exclusive_group() + group.add_argument("-m", "--minigraph", help="minigraph xml file", nargs='?', const='/etc/sonic/minigraph.xml') + group.add_argument("-M", "--device-description", help="device description xml file") + group.add_argument("-k", "--hwsku", help="HwSKU") + parser.add_argument("-p", "--port-config", help="port config file, used with -m or -k", nargs='?', const=None) + parser.add_argument("-y", "--yaml", help="yaml file that contains additional variables", action='append', default=[]) + parser.add_argument("-j", "--json", help="json file that contains additional variables", action='append', default=[]) + parser.add_argument("-a", "--additional-data", help="addition data, in json string") + parser.add_argument("-d", "--from-db", help="read config from configdb", action='store_true') + parser.add_argument("-H", "--platform-info", help="read platform and hardware info", action='store_true') + parser.add_argument("-s", "--redis-unix-sock-file", help="unix sock file for redis connection") + group = parser.add_mutually_exclusive_group() + group.add_argument("-t", "--template", help="render the data with the template file") + group.add_argument("-v", "--var", help="print the value of a variable, support jinja2 expression") + group.add_argument("--var-json", help="print the value of a variable, in json format") + group.add_argument("-w", "--write-to-db", help="write config into configdb", action='store_true') + group.add_argument("--print-data", help="print all data", action='store_true') + group.add_argument("--preset", help="generate sample configuration from a preset template", choices=get_available_config()) + group = parser.add_mutually_exclusive_group() + group.add_argument("-K", "--key", help="Lookup for a specific key") + args = parser.parse_args() + + platform = get_platform_info(get_machine_info()) + + db_kwargs = {} + if args.redis_unix_sock_file != None: + db_kwargs['unix_socket_path'] = args.redis_unix_sock_file + + data = {} + hwsku = args.hwsku + + if hwsku is not None: + hardware_data = {'DEVICE_METADATA': {'localhost': { + 'hwsku': hwsku + }}} + deep_update(data, hardware_data) + (ports, _) = get_port_config(hwsku, platform, args.port_config) + if not ports: + print('Failed to get port config', file=sys.stderr) + sys.exit(1) + deep_update(data, {'PORT': ports}) + + if args.minigraph != None: + minigraph = args.minigraph + if platform: + if args.port_config != None: + deep_update(data, parse_xml(minigraph, platform, args.port_config)) + else: + deep_update(data, parse_xml(minigraph, platform)) + else: + deep_update(data, parse_xml(minigraph, port_config_file=args.port_config)) + + if args.device_description != None: + deep_update(data, parse_device_desc_xml(args.device_description)) + + for yaml_file in args.yaml: + with open(yaml_file, 'r') as stream: + if yaml.__version__ >= "5.1": + additional_data = yaml.full_load(stream) + else: + additional_data = yaml.load(stream) + deep_update(data, FormatConverter.to_deserialized(additional_data)) + + for json_file in args.json: + with open(json_file, 'r') as stream: + deep_update(data, FormatConverter.to_deserialized(json.load(stream))) + + if args.additional_data != None: + deep_update(data, json.loads(args.additional_data)) + + if args.from_db: + configdb = ConfigDBConnector(**db_kwargs) + configdb.connect() + deep_update(data, FormatConverter.db_to_output(configdb.get_config())) + + if args.platform_info: + hardware_data = {'DEVICE_METADATA': {'localhost': { + 'platform': platform, + 'mac': get_system_mac() + }}} + deep_update(data, hardware_data) + + if args.template != None: + template_file = os.path.abspath(args.template) + paths = ['/', '/usr/share/sonic/templates', os.path.dirname(template_file)] + loader = jinja2.FileSystemLoader(paths) + + redis_bcc = RedisBytecodeCache(SonicV2Connector(host='127.0.0.1')) + env = jinja2.Environment(loader=loader, trim_blocks=True, bytecode_cache=redis_bcc) + env.filters['sort_by_port_index'] = sort_by_port_index + env.filters['ipv4'] = is_ipv4 + env.filters['ipv6'] = is_ipv6 + env.filters['unique_name'] = unique_name + env.filters['pfx_filter'] = pfx_filter + env.filters['ip_network'] = ip_network + for attr in ['ip', 'network', 'prefixlen', 'netmask']: + env.filters[attr] = partial(prefix_attr, attr) + template = env.get_template(template_file) + print(template.render(sort_data(data))) + + if args.var != None: + template = jinja2.Template('{{' + args.var + '}}') + print(template.render(data)) + + if args.var_json != None: + if args.key != None: + print(json.dumps(FormatConverter.to_serialized(data[args.var_json], args.key), indent=4, cls=minigraph_encoder)) + else: + print(json.dumps(FormatConverter.to_serialized(data[args.var_json]), indent=4, cls=minigraph_encoder)) + + if args.write_to_db: + configdb = ConfigDBConnector(**db_kwargs) + configdb.connect(False) + configdb.mod_config(FormatConverter.output_to_db(data)) + + if args.print_data: + print(json.dumps(FormatConverter.to_serialized(data), indent=4, cls=minigraph_encoder)) + + if args.preset != None: + data = generate_sample_config(data, args.preset) + print(json.dumps(FormatConverter.to_serialized(data), indent=4, cls=minigraph_encoder)) + + +if __name__ == "__main__": + main() diff --git a/src/sonic-config-engine/sonic_device_util.py b/src/sonic-config-engine/sonic_device_util.py new file mode 100644 index 00000000000..34877600fd1 --- /dev/null +++ b/src/sonic-config-engine/sonic_device_util.py @@ -0,0 +1,120 @@ +#!/usr/bin/env python +import os +import yaml +import subprocess +import re + +DOCUMENTATION = ''' +--- +module: sonic_device_util +version_added: "1.9" +short_description: Retrieve device related facts for a device. +description: + - Retrieve device related facts from config files. +''' + +''' +TODO: this file shall be renamed and moved to other places in future +to have it shared with multiple applications. +''' +def get_machine_info(): + if not os.path.isfile('/host/machine.conf'): + return None + machine_vars = {} + with open('/host/machine.conf') as machine_file: + for line in machine_file: + tokens = line.split('=') + if len(tokens) < 2: + continue + machine_vars[tokens[0]] = tokens[1].strip() + return machine_vars + +def get_platform_info(machine_info): + if machine_info != None: + if machine_info.has_key('onie_platform'): + return machine_info['onie_platform'] + elif machine_info.has_key('aboot_platform'): + return machine_info['aboot_platform'] + return None + +def get_sonic_version_info(): + if not os.path.isfile('/etc/sonic/sonic_version.yml'): + return None + data = {} + with open('/etc/sonic/sonic_version.yml') as stream: + if yaml.__version__ >= "5.1": + data = yaml.full_load(stream) + else: + data = yaml.load(stream) + return data + +def valid_mac_address(mac): + return bool(re.match("^([0-9A-Fa-f]{2}[:-]){5}([0-9A-Fa-f]{2})$", mac)) + +def get_system_mac(): + version_info = get_sonic_version_info() + + if (version_info['asic_type'] == 'mellanox'): + # With Mellanox ONIE release(2019.05-5.2.0012) and above + # "onie_base_mac" was added to /host/machine.conf: + # onie_base_mac=e4:1d:2d:44:5e:80 + # So we have another way to get the mac address besides decode syseeprom + # By this can mitigate the dependency on the hw-management service + base_mac_key = "onie_base_mac" + machine_vars = get_machine_info() + if machine_vars is not None and base_mac_key in machine_vars: + mac = machine_vars[base_mac_key] + mac = mac.strip() + if valid_mac_address(mac): + return mac + + hw_mac_entry_cmds = [ "sudo decode-syseeprom -m" ] + elif (version_info['asic_type'] == 'marvell'): + # Try valid mac in eeprom, else fetch it from eth0 + platform = get_platform_info(get_machine_info()) + hwsku = get_machine_info()['onie_machine'] + profile_cmd = 'cat /usr/share/sonic/device/' + platform +'/'+ hwsku +'/profile.ini | cut -f2 -d=' + hw_mac_entry_cmds = [ profile_cmd, "sudo decode-syseeprom -m", "ip link show eth0 | grep ether | awk '{print $2}'" ] + else: + hw_mac_entry_cmds = [ "ip link show eth0 | grep ether | awk '{print $2}'" ] + + for get_mac_cmd in hw_mac_entry_cmds: + proc = subprocess.Popen(get_mac_cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) + (mac, err) = proc.communicate() + if err: + continue + mac = mac.strip() + if valid_mac_address(mac): + break + + if not valid_mac_address(mac): + return None + + # Align last byte of MAC if necessary + if version_info and version_info['asic_type'] == 'centec': + last_byte = mac[-2:] + aligned_last_byte = format(int(int(last_byte, 16) & 0b11000000), '02x') + mac = mac[:-2] + aligned_last_byte + return mac + +# +# Function to obtain the routing-stack being utilized. Function is not +# platform-specific; it's being placed in this file temporarily till a more +# suitable location is identified as part of upcoming refactoring efforts. +# +def get_system_routing_stack(): + command = "sudo docker ps | grep bgp | awk '{print$2}' | cut -d'-' -f3 | cut -d':' -f1" + + try: + proc = subprocess.Popen(command, + stdout=subprocess.PIPE, + shell=True, + stderr=subprocess.STDOUT) + stdout = proc.communicate()[0] + proc.wait() + result = stdout.rstrip('\n') + + except OSError, e: + raise OSError("Cannot detect routing-stack") + + return result diff --git a/src/sonic-config-engine/tests/.gitignore b/src/sonic-config-engine/tests/.gitignore new file mode 100644 index 00000000000..bee8a64b79a --- /dev/null +++ b/src/sonic-config-engine/tests/.gitignore @@ -0,0 +1 @@ +__pycache__ diff --git a/src/sonic-config-engine/tests/__init__.py b/src/sonic-config-engine/tests/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/src/sonic-config-engine/tests/device.xml b/src/sonic-config-engine/tests/device.xml new file mode 100644 index 00000000000..2995c4dde13 --- /dev/null +++ b/src/sonic-config-engine/tests/device.xml @@ -0,0 +1,17 @@ + + ToRRouter +
+ 10.10.0.12/32 +
+ + ::/0 + + + 10.0.1.5/28 + + + ::/0 + + switch1 + ACS-MSN2700 + diff --git a/src/sonic-config-engine/tests/pc-test-graph.xml b/src/sonic-config-engine/tests/pc-test-graph.xml new file mode 100644 index 00000000000..6709d65c496 --- /dev/null +++ b/src/sonic-config-engine/tests/pc-test-graph.xml @@ -0,0 +1,207 @@ + + + + + + false + switch-t0 + 10.0.0.56 + ARISTA01T1 + 10.0.0.57 + 1 + 180 + 60 + + + switch-t0 + FC00::71 + ARISTA01T1 + FC00::72 + 1 + 180 + 60 + + + + + 65100 + switch-t0 + + +
10.0.0.57
+ + + + + + + + + 64600 + ARISTA01T1 + + + + 64600 + ARISTA02T1 + + + + 64600 + ARISTA03T1 + + + + 64600 + ARISTA04T1 + + + + + + + + + + HostIP + Loopback0 + + 10.1.0.32/32 + + 10.1.0.32/32 + + + HostIP1 + Loopback0 + + FC00:1::32/128 + + FC00:1::32/128 + + + + + HostIP + eth0 + + 10.0.0.100/24 + + 10.0.0.100/24 + + + + + + + switch-t0 + + + PortChannel01 + fortyGigE0/112;fortyGigE0/116;fortyGigE0/120;fortyGigE0/124 + + + + + + Vlan1000 + fortyGigE0/4;fortyGigE0/8;fortyGigE0/12;fortyGigE0/16;fortyGigE0/20;fortyGigE0/24;fortyGigE0/28;fortyGigE0/32;fortyGigE0/36;fortyGigE0/40;fortyGigE0/44;fortyGigE0/48;fortyGigE0/52;fortyGigE0/56;fortyGigE0/60;fortyGigE0/64;fortyGigE0/68;fortyGigE0/72;fortyGigE0/76;fortyGigE0/80;fortyGigE0/84;fortyGigE0/88;fortyGigE0/92;fortyGigE0/96 + False + 0.0.0.0/0 + + 192.0.0.1;192.0.0.2 + 1000 + 1000 + 192.168.0.0/27 + + + + + + PortChannel01 + 10.0.0.56/31 + + + + PortChannel01 + FC00::71/126 + + + + Vlan1000 + 192.168.0.1/27 + + + + + + PortChannel01;PortChannel02;PortChannel03;PortChannel04 + DataAcl + DataPlane + + + SNMP + SNMP_ACL + SNMP + + + + + + + + + + DeviceInterfaceLink + ARISTA01T1 + Ethernet1/1 + switch-t0 + fortyGigE0/112 + + + DeviceInterfaceLink + ARISTA02T1 + Ethernet1/1 + switch-t0 + fortyGigE0/116 + + + DeviceInterfaceLink + ARISTA03T1 + Ethernet1/1 + switch-t0 + fortyGigE0/120 + + + DeviceInterfaceLink + ARISTA04T1 + Ethernet1/1 + switch-t0 + fortyGigE0/124 + + + + + switch-t0 + Force10-S6000 + + + ARISTA01T1 + Arista + + + ARISTA02T1 + Arista + + + ARISTA03T1 + Arista + + + ARISTA04T1 + Arista + + + + switch-t0 + Force10-S6000 + diff --git a/src/sonic-config-engine/tests/sample-dell-6100-t0-minigraph.xml b/src/sonic-config-engine/tests/sample-dell-6100-t0-minigraph.xml new file mode 100644 index 00000000000..536a2c8a73c --- /dev/null +++ b/src/sonic-config-engine/tests/sample-dell-6100-t0-minigraph.xml @@ -0,0 +1,770 @@ + + + + + + ARISTA01T1 + 10.0.0.1 + s6100-dev-1 + 10.0.0.0 + 1 + 180 + 60 + + + ARISTA02T1 + 10.0.0.5 + s6100-dev-1 + 10.0.0.4 + 1 + 180 + 60 + + + ARISTA03T1 + 10.0.0.9 + s6100-dev-1 + 10.0.0.8 + 1 + 180 + 60 + + + ARISTA04T1 + 10.0.0.13 + s6100-dev-1 + 10.0.0.12 + 1 + 180 + 60 + + + ARISTA01T1 + FC00::2 + s6100-dev-1 + FC00::1 + 1 + 180 + 60 + + + ARISTA02T1 + FC00::A + s6100-dev-1 + FC00::9 + 1 + 180 + 60 + + + ARISTA03T1 + FC00::12 + s6100-dev-1 + FC00::11 + 1 + 180 + 60 + + + ARISTA04T1 + FC00::1A + s6100-dev-1 + FC00::19 + 1 + 180 + 60 + + + + + 64601 + s6100-dev-1 + + + BGPPeer +
10.0.0.1
+ + + + + + BGPPeer +
10.0.0.5
+ + + + + + BGPPeer +
10.0.0.9
+ + + + + + BGPPeer +
10.0.0.13
+ + + + + + BGPPeer +
FC00::2
+ + + + + + BGPPeer +
FC00::A
+ + + + + + BGPPeer +
FC00::12
+ + + + + + BGPPeer +
FC00::1A
+ + + + + + + + + 64802 + ARISTA01T1 + + + + 64802 + ARISTA02T1 + + + + 64802 + ARISTA03T1 + + + + 64802 + ARISTA04T1 + + + + + + + + + + HostIP + Loopback0 + + 10.1.0.32/32 + + 10.1.0.32/32 + + + HostIP1 + Loopback0 + + FC00:1::32/128 + + FC00:1::32/128 + + + + + HostIP + eth0 + + 10.0.0.243/23 + + 10.0.0.243/23 + + + + + + s6100-dev-1 + + + PortChannelInterface + PortChannel1 + fortyGigE1/1/1;fortyGigE1/1/2 + + + + PortChannelInterface + PortChannel4 + fortyGigE1/1/5;fortyGigE1/1/6 + + + + PortChannelInterface + PortChannel16 + fortyGigE1/2/1;fortyGigE1/2/2 + + + + PortChannelInterface + PortChannel20 + fortyGigE1/2/5;fortyGigE1/2/6 + + + + + + VlanInterface + Vlan2 + fortyGigE1/1/7;fortyGigE1/1/8;fortyGigE1/1/9;fortyGigE1/1/10;fortyGigE1/1/11;fortyGigE1/1/12;fortyGigE1/1/13;fortyGigE1/1/14;fortyGigE1/1/15;fortyGigE1/1/16;fortyGigE1/3/1;fortyGigE1/3/5;fortyGigE1/3/6;fortyGigE1/3/7;fortyGigE1/3/8;fortyGigE1/3/9;fortyGigE1/3/10;fortyGigE1/3/11;fortyGigE1/2/7;fortyGigE1/2/8;fortyGigE1/2/9;fortyGigE1/2/10;fortyGigE1/2/11;fortyGigE1/2/12;fortyGigE1/2/13;fortyGigE1/2/14;fortyGigE1/2/15;fortyGigE1/2/16;fortyGigE1/4/1;fortyGigE1/4/5;fortyGigE1/4/6;fortyGigE1/4/7;fortyGigE1/4/8;fortyGigE1/4/9;fortyGigE1/4/10;fortyGigE1/4/11 + False + 0.0.0.0/0 + + 2 + 2 + 172.0.0.0/21 + + + + + IPInterface + + PortChannel1 + 10.0.0.0/31 + + + IPInterface + + PortChannel4 + 10.0.0.4/31 + + + IPInterface + + PortChannel16 + 10.0.0.8/31 + + + IPInterface + + PortChannel20 + 10.0.0.12/31 + + + IPInterface + + PortChannel1 + FC00::1/126 + + + IPInterface + + PortChannel4 + FC00::9/126 + + + IPInterface + + PortChannel16 + FC00::11/126 + + + IPInterface + + PortChannel20 + FC00::19/126 + + + IPInterface + + Vlan2 + 172.0.0.1/21 + + + + + + + + + + + + DeviceInterfaceLink + true + 40000 + ARISTA01T1 + Ethernet1 + true + s6100-dev-1 + fortyGigE1/1/1 + + + DeviceInterfaceLink + true + 40000 + ARISTA01T1 + Ethernet2 + true + s6100-dev-1 + fortyGigE1/1/2 + + + DeviceInterfaceLink + true + 40000 + ARISTA02T1 + Ethernet1 + true + s6100-dev-1 + fortyGigE1/1/5 + + + DeviceInterfaceLink + true + 40000 + ARISTA02T1 + Ethernet2 + true + s6100-dev-1 + fortyGigE1/1/6 + + + DeviceInterfaceLink + true + 40000 + ARISTA03T1 + Ethernet1 + true + s6100-dev-1 + fortyGigE1/2/1 + + + DeviceInterfaceLink + true + 40000 + ARISTA03T1 + Ethernet2 + true + s6100-dev-1 + fortyGigE1/2/2 + + + DeviceInterfaceLink + true + 40000 + ARISTA04T1 + Ethernet1 + true + s6100-dev-1 + fortyGigE1/2/5 + + + DeviceInterfaceLink + true + 40000 + ARISTA04T1 + Ethernet2 + true + s6100-dev-1 + fortyGigE1/2/6 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/1/7 + true + server-01 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/1/8 + true + server-02 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/1/9 + true + server-03 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/1/10 + true + server-04 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/1/11 + true + server-05 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/1/12 + true + server-06 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/1/13 + true + server-07 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/1/14 + true + server-08 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/1/15 + true + server-09 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/1/16 + true + server-10 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/3/1 + true + server-11 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/3/5 + true + server-12 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/3/6 + true + server-13 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/3/7 + true + server-14 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/3/8 + true + server-15 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/3/9 + true + server-16 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/3/10 + true + server-17 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/3/11 + true + server-18 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/2/7 + true + server-19 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/2/8 + true + server-20 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/2/9 + true + server-21 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/2/10 + true + server-22 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/2/11 + true + server-23 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/2/12 + true + server-24 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/2/13 + true + server-25 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/2/14 + true + server-26 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/2/15 + true + server-27 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/2/16 + true + server-28 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/4/1 + true + server-29 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/4/5 + true + server-30 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/4/6 + true + server-31 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/4/7 + true + server-32 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/4/8 + true + server-33 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/4/9 + true + server-34 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/4/10 + true + server-35 + 0 + + + DeviceInterfaceLink + true + 40000 + s6100-dev-1 + fortyGigE1/4/11 + true + server-36 + 0 + + + + + s6100-dev-1 + Force10-S6100 + + 10.0.0.243 + + + + + + + + s6100-dev-1 + + + ErspanDestinationIpv4 + + 10.0.0.16 + + + + + + + s6100-dev-1 + Force10-S6100 + \ No newline at end of file diff --git a/src/sonic-config-engine/tests/sample-port-config-mlnx.ini b/src/sonic-config-engine/tests/sample-port-config-mlnx.ini new file mode 100644 index 00000000000..816bb0e94a7 --- /dev/null +++ b/src/sonic-config-engine/tests/sample-port-config-mlnx.ini @@ -0,0 +1,33 @@ +# name lanes +Ethernet0 0,1,2,3 +Ethernet4 4,5,6,7 +Ethernet8 8,9,10,11 +Ethernet12 12,13,14,15 +Ethernet16 16,17,18,19 +Ethernet20 20,21,22,23 +Ethernet24 24,25,26,27 +Ethernet28 28,29,30,31 +Ethernet32 32,33,34,35 +Ethernet36 36,37,38,39 +Ethernet40 40,41,42,43 +Ethernet44 44,45,46,47 +Ethernet48 48,49,50,51 +Ethernet52 52,53,54,55 +Ethernet56 56,57,58,59 +Ethernet60 60,61,62,63 +Ethernet64 64,65,66,67 +Ethernet68 68,69,70,71 +Ethernet72 72,73,74,75 +Ethernet76 76,77,78,79 +Ethernet80 80,81,82,83 +Ethernet84 84,85,86,87 +Ethernet88 88,89,90,91 +Ethernet92 92,93,94,95 +Ethernet96 96,97,98,99 +Ethernet100 100,101,102,103 +Ethernet104 104,105,106,107 +Ethernet108 108,109,110,111 +Ethernet112 112,113,114,115 +Ethernet116 116,117,118,119 +Ethernet120 120,121,122,123 +Ethernet124 124,125,126,127 diff --git a/src/sonic-config-engine/tests/sample_graph.xml b/src/sonic-config-engine/tests/sample_graph.xml new file mode 100644 index 00000000000..47efabf7d81 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_graph.xml @@ -0,0 +1,129 @@ + + + + + + OCPSCH0104001MS + 10.10.1.14 + OCPSCH01040DDLF + 10.10.1.13 + 1 + 10 + 3 + + + OCPSCH0104002MS + 10.10.2.14 + OCPSCH01040DDLF + 10.10.2.13 + 1 + 10 + 3 + + + + + 64536 + OCPSCH01040DDLF + + +
10.10.1.14
+ + + + +
10.10.2.14
+ + + + + + + + 64542 + OCPSCH0104001MS + + + + 64543 + OCPSCH0104002MS + + + + + + + + + + HostIP + Loopback0 + + 100.0.0.6/32 + + 100.0.0.6/32 + + + + + ManagementIP1 + Management0 + + 192.168.200.15/24 + + 192.168.200.15/24 + + + + + + OCPSCH01040DDLF + + + + + + Ethernet0 + 10.10.1.13/30 + + + + Ethernet1 + 10.10.2.13/30 + + + + + + + + + + + + 40000 + DeviceInterfaceLink + OCPSCH01040DDLF + Ethernet0 + OCPSCH0104012MS + Ethernet12 + + + 40000 + DeviceInterfaceLink + OCPCH01040DDLF + Ethernet1 + OCPSCH0104002MS + Ethernet12 + + + + + OCPSCH01040DDLF + Force10-Z9100 + + + + OCPSCH01040DDLF + Force10-Z9100 + diff --git a/src/sonic-config-engine/tests/sample_output/bgpd_frr.conf b/src/sonic-config-engine/tests/sample_output/bgpd_frr.conf new file mode 100644 index 00000000000..566d6384fcf --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/bgpd_frr.conf @@ -0,0 +1,89 @@ +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/bgpd.conf.j2 with config DB data +! file: bgpd.conf +! +! +! +hostname switch-t0 +password zebra +enable password zebra +! +log syslog informational +log facility local4 +!! +agentx +! +! +! +! +! bgp multiple-instance +! +route-map FROM_BGP_SPEAKER_V4 permit 10 +! +route-map TO_BGP_SPEAKER_V4 deny 10 +! +ip prefix-list PL_LoopbackV4 permit 10.1.0.32/32 +ipv6 prefix-list PL_LoopbackV6 permit fc00:1::/64 +! +! +route-map TO_BGP_PEER_V4 permit 100 +! +route-map TO_BGP_PEER_V6 permit 100 +! +route-map FROM_BGPMON deny 10 +! +route-map TO_BGPMON permit 10 +! +! +route-map ISOLATE permit 10 + set as-path prepend 65100 +! +route-map set-next-hop-global-v6 permit 10 + set ipv6 next-hop prefer-global +! +router bgp 65100 + bgp log-neighbor-changes + bgp bestpath as-path multipath-relax + no bgp default ipv4-unicast + bgp graceful-restart restart-time 240 + bgp graceful-restart + bgp graceful-restart preserve-fw-state + bgp router-id 10.1.0.32 + network 10.1.0.32/32 + address-family ipv6 + network fc00:1::32/64 + exit-address-family + network 192.168.0.1/27 + address-family ipv4 + maximum-paths 64 + exit-address-family + address-family ipv6 + maximum-paths 64 + exit-address-family + neighbor PEER_V4 peer-group + neighbor PEER_V6 peer-group + address-family ipv4 + neighbor PEER_V4 allowas-in 1 + neighbor PEER_V4 soft-reconfiguration inbound + neighbor PEER_V4 route-map TO_BGP_PEER_V4 out + exit-address-family + address-family ipv6 + neighbor PEER_V6 allowas-in 1 + neighbor PEER_V6 soft-reconfiguration inbound + neighbor PEER_V6 route-map TO_BGP_PEER_V6 out + exit-address-family + neighbor BGPMON peer-group + neighbor BGPMON update-source 10.1.0.32 + neighbor BGPMON route-map FROM_BGPMON in + neighbor BGPMON route-map TO_BGPMON out + neighbor BGPMON send-community + neighbor BGPMON maximum-prefix 1 + neighbor 10.20.30.40 remote-as 65100 + neighbor 10.20.30.40 peer-group BGPMON + neighbor 10.20.30.40 description BGPMonitor + neighbor 10.20.30.40 activate + address-family ipv6 + neighbor 10.20.30.40 activate + exit-address-family +!! diff --git a/src/sonic-config-engine/tests/sample_output/bgpd_quagga.conf b/src/sonic-config-engine/tests/sample_output/bgpd_quagga.conf new file mode 100644 index 00000000000..ebffcaa7c24 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/bgpd_quagga.conf @@ -0,0 +1,100 @@ +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/bgpd.conf.j2 with config DB data +! file: bgpd.conf +! +! +hostname switch-t0 +password zebra +log syslog informational +log facility local4 +! enable password ! +! +! bgp multiple-instance +! +route-map FROM_BGP_SPEAKER_V4 permit 10 +! +route-map TO_BGP_SPEAKER_V4 deny 10 +! +router bgp 65100 + bgp log-neighbor-changes + bgp bestpath as-path multipath-relax + no bgp default ipv4-unicast + bgp graceful-restart restart-time 240 + bgp graceful-restart + bgp router-id 10.1.0.32 + network 10.1.0.32/32 + address-family ipv6 + network fc00:1::32/64 + exit-address-family + network 192.168.0.1/27 + neighbor 10.0.0.57 remote-as 64600 + neighbor 10.0.0.57 description ARISTA01T1 + address-family ipv4 + neighbor 10.0.0.57 allowas-in 1 + neighbor 10.0.0.57 activate + neighbor 10.0.0.57 soft-reconfiguration inbound + maximum-paths 64 + exit-address-family + neighbor 10.0.0.59 remote-as 64600 + neighbor 10.0.0.59 description ARISTA02T1 + address-family ipv4 + neighbor 10.0.0.59 allowas-in 1 + neighbor 10.0.0.59 activate + neighbor 10.0.0.59 soft-reconfiguration inbound + maximum-paths 64 + exit-address-family + neighbor 10.0.0.61 remote-as 64600 + neighbor 10.0.0.61 description ARISTA03T1 + address-family ipv4 + neighbor 10.0.0.61 allowas-in 1 + neighbor 10.0.0.61 activate + neighbor 10.0.0.61 soft-reconfiguration inbound + maximum-paths 64 + exit-address-family + neighbor 10.0.0.63 remote-as 64600 + neighbor 10.0.0.63 description ARISTA04T1 + address-family ipv4 + neighbor 10.0.0.63 allowas-in 1 + neighbor 10.0.0.63 activate + neighbor 10.0.0.63 soft-reconfiguration inbound + maximum-paths 64 + exit-address-family + neighbor fc00::7a remote-as 64600 + neighbor fc00::7a description ARISTA03T1 + address-family ipv6 + neighbor fc00::7a allowas-in 1 + neighbor fc00::7a activate + neighbor fc00::7a soft-reconfiguration inbound + maximum-paths 64 + exit-address-family + neighbor fc00::7e remote-as 64600 + neighbor fc00::7e description ARISTA04T1 + address-family ipv6 + neighbor fc00::7e allowas-in 1 + neighbor fc00::7e activate + neighbor fc00::7e soft-reconfiguration inbound + maximum-paths 64 + exit-address-family + neighbor fc00::72 remote-as 64600 + neighbor fc00::72 description ARISTA01T1 + address-family ipv6 + neighbor fc00::72 allowas-in 1 + neighbor fc00::72 activate + neighbor fc00::72 soft-reconfiguration inbound + maximum-paths 64 + exit-address-family + neighbor fc00::76 remote-as 64600 + neighbor fc00::76 description ARISTA02T1 + address-family ipv6 + neighbor fc00::76 allowas-in 1 + neighbor fc00::76 activate + neighbor fc00::76 soft-reconfiguration inbound + maximum-paths 64 + exit-address-family +! +maximum-paths 64 +! +route-map ISOLATE permit 10 +set as-path prepend 65100 +! diff --git a/src/sonic-config-engine/tests/sample_output/buffers-dell6100.json b/src/sonic-config-engine/tests/sample_output/buffers-dell6100.json new file mode 100644 index 00000000000..5cf0472f3f1 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/buffers-dell6100.json @@ -0,0 +1,640 @@ + +{ + "CABLE_LENGTH": { + "AZURE": { + "Ethernet0": "5m", + "Ethernet1": "5m", + "Ethernet2": "5m", + "Ethernet3": "5m", + "Ethernet4": "5m", + "Ethernet5": "5m", + "Ethernet6": "5m", + "Ethernet7": "5m", + "Ethernet8": "5m", + "Ethernet9": "5m", + "Ethernet10": "5m", + "Ethernet11": "5m", + "Ethernet12": "5m", + "Ethernet13": "5m", + "Ethernet14": "5m", + "Ethernet15": "5m", + "Ethernet16": "5m", + "Ethernet17": "5m", + "Ethernet18": "5m", + "Ethernet19": "5m", + "Ethernet20": "5m", + "Ethernet21": "5m", + "Ethernet22": "5m", + "Ethernet23": "5m", + "Ethernet24": "5m", + "Ethernet25": "5m", + "Ethernet26": "5m", + "Ethernet27": "5m", + "Ethernet28": "5m", + "Ethernet29": "5m", + "Ethernet30": "5m", + "Ethernet31": "5m", + "Ethernet32": "5m", + "Ethernet33": "5m", + "Ethernet34": "5m", + "Ethernet35": "5m", + "Ethernet36": "5m", + "Ethernet37": "5m", + "Ethernet38": "5m", + "Ethernet39": "5m", + "Ethernet40": "5m", + "Ethernet41": "5m", + "Ethernet42": "5m", + "Ethernet43": "5m", + "Ethernet44": "5m", + "Ethernet45": "5m", + "Ethernet46": "5m", + "Ethernet47": "5m", + "Ethernet48": "5m", + "Ethernet49": "5m", + "Ethernet50": "5m", + "Ethernet51": "5m", + "Ethernet52": "5m", + "Ethernet53": "5m", + "Ethernet54": "5m", + "Ethernet55": "5m", + "Ethernet56": "5m", + "Ethernet57": "5m", + "Ethernet58": "5m", + "Ethernet59": "5m", + "Ethernet60": "5m", + "Ethernet61": "5m", + "Ethernet62": "5m", + "Ethernet63": "5m" + } + }, + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "10875072", + "type": "ingress", + "mode": "dynamic", + "xoff": "4194112" + }, + "egress_lossy_pool": { + "size": "9243812", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "15982720", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "static_th":"15982720" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, + "BUFFER_PG": { + "Ethernet0|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet1|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet4|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet5|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet6|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet7|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet8|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet9|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet10|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet11|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet12|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet13|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet14|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet15|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet16|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet17|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet20|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet21|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet22|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet23|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet24|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet25|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet26|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet27|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet28|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet29|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet30|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet31|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet32|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet36|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet37|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet38|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet39|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet40|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet41|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet42|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet48|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet52|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet53|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet54|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet55|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet56|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet57|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + }, + "Ethernet58|0": { + "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, + + "BUFFER_QUEUE": { + "Ethernet0|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet1|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet4|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet5|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet6|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet7|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet8|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet9|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet10|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet11|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet12|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet13|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet14|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet15|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet16|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet17|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet20|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet21|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet22|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet23|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet24|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet25|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet26|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet27|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet28|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet29|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet30|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet31|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet32|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet36|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet37|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet38|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet39|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet40|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet41|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet42|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet48|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet52|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet53|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet54|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet55|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet56|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet57|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet58|3-4": { + "profile" : "[BUFFER_PROFILE|egress_lossless_profile]" + }, + "Ethernet0|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet1|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet4|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet5|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet6|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet7|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet8|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet9|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet10|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet11|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet12|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet13|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet14|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet15|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet16|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet17|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet20|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet21|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet22|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet23|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet24|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet25|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet26|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet27|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet28|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet29|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet30|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet31|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet32|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet36|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet37|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet38|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet39|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet40|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet41|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet42|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet48|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet52|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet53|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet54|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet55|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet56|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet57|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet58|0-2": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet0|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet1|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet4|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet5|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet6|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet7|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet8|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet9|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet10|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet11|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet12|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet13|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet14|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet15|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet16|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet17|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet20|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet21|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet22|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet23|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet24|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet25|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet26|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet27|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet28|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet29|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet30|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet31|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet32|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet36|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet37|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet38|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet39|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet40|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet41|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet42|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet48|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet52|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet53|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet54|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet55|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet56|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet57|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "Ethernet58|5-6": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + } + } +} diff --git a/src/sonic-config-engine/tests/sample_output/docker-dhcp-relay.supervisord.conf b/src/sonic-config-engine/tests/sample_output/docker-dhcp-relay.supervisord.conf new file mode 100644 index 00000000000..bae273eeaf8 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/docker-dhcp-relay.supervisord.conf @@ -0,0 +1,39 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener +events=PROCESS_STATE_EXITED +autostart=true +autorestart=unexpected + +[program:start.sh] +command=/usr/bin/start.sh +priority=1 +autostart=true +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n +priority=2 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + +[group:isc-dhcp-relay] +programs=isc-dhcp-relay-Vlan1000 + +[program:isc-dhcp-relay-Vlan1000] +command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /tmp/port-name-alias-map.txt -id Vlan1000 -iu PortChannel01 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 192.0.0.1 192.0.0.2 +priority=3 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + + diff --git a/src/sonic-config-engine/tests/sample_output/frr.conf b/src/sonic-config-engine/tests/sample_output/frr.conf new file mode 100644 index 00000000000..47855ce7c84 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/frr.conf @@ -0,0 +1,121 @@ +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/frr/frr.conf.j2 with config DB data +! file: frr.conf +! +! +! +hostname switch-t0 +password zebra +enable password zebra +! +log syslog informational +log facility local4 +!! +agentx +! +! +! +! Enable link-detect (default disabled) +interface PortChannel01 +link-detect +! +interface PortChannel02 +link-detect +! +interface PortChannel03 +link-detect +! +interface PortChannel04 +link-detect +! +! +! Set ip source to loopback for bgp learned routes +route-map RM_SET_SRC permit 10 + set src 10.1.0.32 +! + +route-map RM_SET_SRC6 permit 10 + set src fc00:1::32 +! +ip protocol bgp route-map RM_SET_SRC +! +ipv6 protocol bgp route-map RM_SET_SRC6 +! +!! +! +! set static default route to mgmt gateway as a backup to learned default +ip route 0.0.0.0/0 10.0.0.1 200 +!! +! +! +! bgp multiple-instance +! +route-map FROM_BGP_SPEAKER_V4 permit 10 +! +route-map TO_BGP_SPEAKER_V4 deny 10 +! +ip prefix-list PL_LoopbackV4 permit 10.1.0.32/32 +ipv6 prefix-list PL_LoopbackV6 permit fc00:1::/64 +! +! +route-map TO_BGP_PEER_V4 permit 100 +! +route-map TO_BGP_PEER_V6 permit 100 +! +route-map FROM_BGPMON deny 10 +! +route-map TO_BGPMON permit 10 +! +! +route-map ISOLATE permit 10 + set as-path prepend 65100 +! +route-map set-next-hop-global-v6 permit 10 + set ipv6 next-hop prefer-global +! +router bgp 65100 + bgp log-neighbor-changes + bgp bestpath as-path multipath-relax + no bgp default ipv4-unicast + bgp graceful-restart restart-time 240 + bgp graceful-restart + bgp graceful-restart preserve-fw-state + bgp router-id 10.1.0.32 + network 10.1.0.32/32 + address-family ipv6 + network fc00:1::32/64 + exit-address-family + network 192.168.0.1/27 + address-family ipv4 + maximum-paths 64 + exit-address-family + address-family ipv6 + maximum-paths 64 + exit-address-family + neighbor PEER_V4 peer-group + neighbor PEER_V6 peer-group + address-family ipv4 + neighbor PEER_V4 allowas-in 1 + neighbor PEER_V4 soft-reconfiguration inbound + neighbor PEER_V4 route-map TO_BGP_PEER_V4 out + exit-address-family + address-family ipv6 + neighbor PEER_V6 allowas-in 1 + neighbor PEER_V6 soft-reconfiguration inbound + neighbor PEER_V6 route-map TO_BGP_PEER_V6 out + exit-address-family + neighbor BGPMON peer-group + neighbor BGPMON update-source 10.1.0.32 + neighbor BGPMON route-map FROM_BGPMON in + neighbor BGPMON route-map TO_BGPMON out + neighbor BGPMON send-community + neighbor BGPMON maximum-prefix 1 + neighbor 10.20.30.40 remote-as 65100 + neighbor 10.20.30.40 peer-group BGPMON + neighbor 10.20.30.40 description BGPMonitor + neighbor 10.20.30.40 activate + address-family ipv6 + neighbor 10.20.30.40 activate + exit-address-family +!! diff --git a/src/sonic-config-engine/tests/sample_output/interfaces b/src/sonic-config-engine/tests/sample_output/interfaces new file mode 100644 index 00000000000..d3921bcbab4 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/interfaces @@ -0,0 +1,39 @@ +# +# =============== Managed by SONiC Config Engine DO NOT EDIT! =============== +# generated from /usr/share/sonic/templates/interfaces.j2 using sonic-cfggen +# file: /etc/network/interfaces +# +# The loopback network interface +auto lo +iface lo inet loopback + +# The management network interface +auto eth0 +iface eth0 inet static + address 10.0.0.100 + netmask 255.255.255.0 + ########## management network policy routing rules + # management port up rules + up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 + up ip -4 route add 10.0.0.0/24 dev eth0 table default + up ip -4 rule add from 10.0.0.100/32 table default + # management port down rules + down ip -4 route delete default via 10.0.0.1 dev eth0 table default + down ip -4 route delete 10.0.0.0/24 dev eth0 table default + down ip -4 rule delete from 10.0.0.100/32 table default +iface eth0 inet6 static + address 2603:10e2:0:2902::8 + netmask 64 + ########## management network policy routing rules + # management port up rules + up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 + up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default + up ip -6 rule add from 2603:10e2:0:2902::8/128 table default + # management port down rules + down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table default + down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table default + down ip -6 rule delete from 2603:10e2:0:2902::8/128 table default +# +source /etc/network/interfaces.d/* +# + diff --git a/src/sonic-config-engine/tests/sample_output/ipinip.json b/src/sonic-config-engine/tests/sample_output/ipinip.json new file mode 100644 index 00000000000..e4028ea01a2 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/ipinip.json @@ -0,0 +1,23 @@ +[ + { + "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : { + "tunnel_type":"IPINIP", + "dst_ip":"10.1.0.32,10.0.0.56,10.0.0.58,10.0.0.60,10.0.0.62,192.168.0.1", + "dscp_mode":"pipe", + "ecn_mode":"copy_from_outer", + "ttl_mode":"pipe" + }, + "OP": "SET" + } + , + { + "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : { + "tunnel_type":"IPINIP", + "dst_ip":"fc00:1::32,fc00::71,fc00::75,fc00::79,fc00::7d", + "dscp_mode":"pipe", + "ecn_mode":"copy_from_outer", + "ttl_mode":"pipe" + }, + "OP": "SET" + } +] diff --git a/src/sonic-config-engine/tests/sample_output/l2switch.json b/src/sonic-config-engine/tests/sample_output/l2switch.json new file mode 100644 index 00000000000..fd83589153e --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/l2switch.json @@ -0,0 +1,268 @@ +{ + "DEVICE_METADATA": {"localhost": {"hwsku": "Mellanox-SN2700"}}, + "PORT": { + "Ethernet0": { + "alias": "fortyGigE0/0", + "lanes": "29,30,31,32", + "admin_status": "up" + }, + "Ethernet4": { + "alias": "fortyGigE0/4", + "lanes": "25,26,27,28", + "admin_status": "up" + }, + "Ethernet8": { + "alias": "fortyGigE0/8", + "lanes": "37,38,39,40", + "admin_status": "up" + }, + "Ethernet12": { + "alias": "fortyGigE0/12", + "lanes": "33,34,35,36", + "admin_status": "up" + }, + "Ethernet16": { + "alias": "fortyGigE0/16", + "lanes": "41,42,43,44", + "admin_status": "up" + }, + "Ethernet20": { + "alias": "fortyGigE0/20", + "lanes": "45,46,47,48", + "admin_status": "up" + }, + "Ethernet24": { + "alias": "fortyGigE0/24", + "lanes": "5,6,7,8", + "admin_status": "up" + }, + "Ethernet28": { + "alias": "fortyGigE0/28", + "lanes": "1,2,3,4", + "admin_status": "up" + }, + "Ethernet32": { + "alias": "fortyGigE0/32", + "lanes": "9,10,11,12", + "admin_status": "up" + }, + "Ethernet36": { + "alias": "fortyGigE0/36", + "lanes": "13,14,15,16", + "admin_status": "up" + }, + "Ethernet40": { + "alias": "fortyGigE0/40", + "lanes": "21,22,23,24", + "admin_status": "up" + }, + "Ethernet44": { + "alias": "fortyGigE0/44", + "lanes": "17,18,19,20", + "admin_status": "up" + }, + "Ethernet48": { + "alias": "fortyGigE0/48", + "lanes": "49,50,51,52", + "admin_status": "up" + }, + "Ethernet52": { + "alias": "fortyGigE0/52", + "lanes": "53,54,55,56", + "admin_status": "up" + }, + "Ethernet56": { + "alias": "fortyGigE0/56", + "lanes": "61,62,63,64", + "admin_status": "up" + }, + "Ethernet60": { + "alias": "fortyGigE0/60", + "lanes": "57,58,59,60", + "admin_status": "up" + }, + "Ethernet64": { + "alias": "fortyGigE0/64", + "lanes": "65,66,67,68", + "admin_status": "up" + }, + "Ethernet68": { + "alias": "fortyGigE0/68", + "lanes": "69,70,71,72", + "admin_status": "up" + }, + "Ethernet72": { + "alias": "fortyGigE0/72", + "lanes": "77,78,79,80", + "admin_status": "up" + }, + "Ethernet76": { + "alias": "fortyGigE0/76", + "lanes": "73,74,75,76", + "admin_status": "up" + }, + "Ethernet80": { + "alias": "fortyGigE0/80", + "lanes": "105,106,107,108", + "admin_status": "up" + }, + "Ethernet84": { + "alias": "fortyGigE0/84", + "lanes": "109,110,111,112", + "admin_status": "up" + }, + "Ethernet88": { + "alias": "fortyGigE0/88", + "lanes": "117,118,119,120", + "admin_status": "up" + }, + "Ethernet92": { + "alias": "fortyGigE0/92", + "lanes": "113,114,115,116", + "admin_status": "up" + }, + "Ethernet96": { + "alias": "fortyGigE0/96", + "lanes": "121,122,123,124", + "admin_status": "up" + }, + "Ethernet100": { + "alias": "fortyGigE0/100", + "lanes": "125,126,127,128", + "admin_status": "up" + }, + "Ethernet104": { + "alias": "fortyGigE0/104", + "lanes": "85,86,87,88", + "admin_status": "up" + }, + "Ethernet108": { + "alias": "fortyGigE0/108", + "lanes": "81,82,83,84", + "admin_status": "up" + }, + "Ethernet112": { + "alias": "fortyGigE0/112", + "lanes": "89,90,91,92", + "admin_status": "up" + }, + "Ethernet116": { + "alias": "fortyGigE0/116", + "lanes": "93,94,95,96", + "admin_status": "up" + }, + "Ethernet120": { + "alias": "fortyGigE0/120", + "lanes": "97,98,99,100", + "admin_status": "up" + }, + "Ethernet124": { + "alias": "fortyGigE0/124", + "lanes": "101,102,103,104", + "admin_status": "up" + } + }, + "VLAN": { + "Vlan1000": { + "vlanid": "1000" + } + }, + "VLAN_MEMBER": { + "Vlan1000|Ethernet0": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet4": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet8": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet12": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet16": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet20": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet24": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet28": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet32": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet36": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet40": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet44": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet48": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet52": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet56": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet60": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet64": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet68": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet72": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet76": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet80": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet84": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet88": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet92": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet96": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet100": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet104": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet108": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet112": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet116": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet120": { + "tagging_mode": "untagged" + }, + "Vlan1000|Ethernet124": { + "tagging_mode": "untagged" + } + } +} diff --git a/src/sonic-config-engine/tests/sample_output/lldpd.conf b/src/sonic-config-engine/tests/sample_output/lldpd.conf new file mode 100644 index 00000000000..d28ec841836 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/lldpd.conf @@ -0,0 +1,3 @@ +configure ports eth0 lldp portidsubtype local eth0 +configure system ip management pattern 10.0.0.100 +configure system hostname switch-t0 diff --git a/src/sonic-config-engine/tests/sample_output/msn27.32ports.json b/src/sonic-config-engine/tests/sample_output/msn27.32ports.json new file mode 100644 index 00000000000..fd457c4be9b --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/msn27.32ports.json @@ -0,0 +1,120 @@ +{ + "CABLE_LENGTH": { + "AZURE": { + "Ethernet0": "300m", + "Ethernet4": "300m", + "Ethernet8": "300m", + "Ethernet12": "300m", + "Ethernet16": "300m", + "Ethernet20": "300m", + "Ethernet24": "300m", + "Ethernet28": "300m", + "Ethernet32": "300m", + "Ethernet36": "300m", + "Ethernet40": "300m", + "Ethernet44": "300m", + "Ethernet48": "300m", + "Ethernet52": "300m", + "Ethernet56": "300m", + "Ethernet60": "300m", + "Ethernet64": "300m", + "Ethernet68": "300m", + "Ethernet72": "300m", + "Ethernet76": "300m", + "Ethernet80": "300m", + "Ethernet84": "300m", + "Ethernet88": "300m", + "Ethernet92": "300m", + "Ethernet96": "300m", + "Ethernet100": "300m", + "Ethernet104": "300m", + "Ethernet108": "300m", + "Ethernet112": "300m", + "Ethernet116": "300m", + "Ethernet120": "300m", + "Ethernet124": "300m" + } + }, + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "2097152", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "5242880", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "16777152", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "5242880", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"0" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"4096", + "dynamic_th":"3" + }, + "pg_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + }, + "q_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "dynamic_th":"7" + }, + "q_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"0", + "dynamic_th":"3" + } + }, + "BUFFER_PORT_INGRESS_PROFILE_LIST": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124": { + "profile_list" : "[BUFFER_PROFILE|ingress_lossless_profile],[BUFFER_PROFILE|ingress_lossy_profile]" + } + }, + "BUFFER_PORT_EGRESS_PROFILE_LIST": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124": { + "profile_list" : "[BUFFER_PROFILE|egress_lossless_profile],[BUFFER_PROFILE|egress_lossy_profile]" + } + }, + "BUFFER_PG": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0-1": { + "profile" : "[BUFFER_PROFILE|pg_lossy_profile]" + } + }, + "BUFFER_QUEUE": { + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|3-4": { + "profile" : "[BUFFER_PROFILE|q_lossless_profile]" + }, + "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0-1": { + "profile" : "[BUFFER_PROFILE|q_lossy_profile]" + } + } +} diff --git a/src/sonic-config-engine/tests/sample_output/mvrf_interfaces b/src/sonic-config-engine/tests/sample_output/mvrf_interfaces new file mode 100644 index 00000000000..afd0615b81e --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/mvrf_interfaces @@ -0,0 +1,56 @@ +# +# =============== Managed by SONiC Config Engine DO NOT EDIT! =============== +# generated from /usr/share/sonic/templates/interfaces.j2 using sonic-cfggen +# file: /etc/network/interfaces +# +auto mgmt +iface mgmt + vrf-table 5000 +# The loopback network interface +auto lo +iface lo inet loopback +# The loopback network interface for mgmt VRF that is required for applications like NTP + up ip link add lo-m type dummy + up ip addr add 127.0.0.1/8 dev lo-m + up ip link set lo-m up + up ip link set dev lo-m master mgmt + down ip link delete dev lo-m + +# The management network interface +auto eth0 +iface eth0 inet static + address 10.0.0.100 + netmask 255.255.255.0 + vrf mgmt + ########## management network policy routing rules + # management port up rules + up ip -4 route add default via 10.0.0.1 dev eth0 table 5000 metric 201 + up ip -4 route add 10.0.0.0/24 dev eth0 table 5000 + up ip -4 rule add from 10.0.0.100/32 table 5000 + up cgcreate -g l3mdev:mgmt + up cgset -r l3mdev.master-device=mgmt mgmt + # management port down rules + down ip -4 route delete default via 10.0.0.1 dev eth0 table 5000 + down ip -4 route delete 10.0.0.0/24 dev eth0 table 5000 + down ip -4 rule delete from 10.0.0.100/32 table 5000 + down cgdelete -g l3mdev:mgmt +iface eth0 inet6 static + address 2603:10e2:0:2902::8 + netmask 64 + vrf mgmt + ########## management network policy routing rules + # management port up rules + up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table 5000 metric 201 + up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table 5000 + up ip -6 rule add from 2603:10e2:0:2902::8/128 table 5000 + up cgcreate -g l3mdev:mgmt + up cgset -r l3mdev.master-device=mgmt mgmt + # management port down rules + down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table 5000 + down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table 5000 + down ip -6 rule delete from 2603:10e2:0:2902::8/128 table 5000 + down cgdelete -g l3mdev:mgmt +# +source /etc/network/interfaces.d/* +# + diff --git a/src/sonic-config-engine/tests/sample_output/ports.json b/src/sonic-config-engine/tests/sample_output/ports.json new file mode 100644 index 00000000000..36f5ad117c3 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/ports.json @@ -0,0 +1,30 @@ +[ + { + "PORT_TABLE:Ethernet0": { + "speed": "10000", + "description": "fortyGigE0/0" + }, + "OP": "SET" + }, + { + "PORT_TABLE:Ethernet4": { + "speed": "25000", + "description": "fortyGigE0/4" + }, + "OP": "SET" + }, + { + "PORT_TABLE:Ethernet8": { + "speed": "1000", + "description": "Interface description" + }, + "OP": "SET" + }, + { + "PORT_TABLE:Ethernet12": { + "speed": "100000", + "description": "Interface description" + }, + "OP": "SET" + } +] diff --git a/src/sonic-config-engine/tests/sample_output/qos-dell6100.json b/src/sonic-config-engine/tests/sample_output/qos-dell6100.json new file mode 100644 index 00000000000..680ca6232e1 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/qos-dell6100.json @@ -0,0 +1,1457 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "3", + "4": "4", + "5": "0", + "6": "0", + "7": "7" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0" : "1", + "1" : "1", + "2" : "1", + "3" : "3", + "4" : "4", + "5" : "2", + "6" : "1", + "7" : "1", + "8" : "0", + "9" : "1", + "10": "1", + "11": "1", + "12": "1", + "13": "1", + "14": "1", + "15": "1", + "16": "1", + "17": "1", + "18": "1", + "19": "1", + "20": "1", + "21": "1", + "22": "1", + "23": "1", + "24": "1", + "25": "1", + "26": "1", + "27": "1", + "28": "1", + "29": "1", + "30": "1", + "31": "1", + "32": "1", + "33": "1", + "34": "1", + "35": "1", + "36": "1", + "37": "1", + "38": "1", + "39": "1", + "40": "1", + "41": "1", + "42": "1", + "43": "1", + "44": "1", + "45": "1", + "46": "5", + "47": "1", + "48": "6", + "49": "1", + "50": "1", + "51": "1", + "52": "1", + "53": "1", + "54": "1", + "55": "1", + "56": "1", + "57": "1", + "58": "1", + "59": "1", + "60": "1", + "61": "1", + "62": "1", + "63": "1" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type" : "DWRR", + "weight": "14" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "15" + } + }, + "PORT_QOS_MAP": { + "Ethernet0": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet1": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet4": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet5": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet6": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet7": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet8": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet9": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet10": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet11": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet12": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet13": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet14": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet15": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet16": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet17": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet20": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet21": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet22": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet23": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet24": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet25": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet26": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet27": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet28": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet29": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet30": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet31": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet32": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet36": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet37": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet38": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet39": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet40": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet41": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet42": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet48": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet52": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet53": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet54": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet55": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet56": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet57": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + }, + "Ethernet58": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", + "pfc_enable" : "3,4" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable" : "true", + "wred_yellow_enable" : "true", + "wred_red_enable" : "true", + "ecn" : "ecn_all", + "green_max_threshold" : "2097152", + "green_min_threshold" : "1048576", + "yellow_max_threshold" : "2097152", + "yellow_min_threshold" : "1048576", + "red_max_threshold" : "2097152", + "red_min_threshold" : "1048576", + "green_drop_probability" : "5", + "yellow_drop_probability": "5", + "red_drop_probability" : "5" + } + }, + "QUEUE": { + "Ethernet0|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet1|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet4|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet5|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet6|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet7|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet8|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet9|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet10|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet11|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet12|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet13|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet14|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet15|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet16|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet17|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet20|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet21|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet22|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet23|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet24|3": { 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"wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet36|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet37|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet38|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet39|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet40|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet41|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet42|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet48|3": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + 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"[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet12|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet13|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet14|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet15|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet16|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet17|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet20|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet21|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet22|4": { 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"wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet31|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet32|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet36|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet37|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet38|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet39|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet40|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "Ethernet41|4": { + "scheduler" : "[SCHEDULER|scheduler.1]", + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + 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"Ethernet36|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet37|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet38|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet39|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet40|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet41|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet42|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet48|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet52|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet53|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet54|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet55|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet56|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet57|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet58|0": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet0|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet1|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet4|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet5|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet6|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet7|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet8|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet9|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet10|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet11|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet12|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet13|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet14|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet15|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet16|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet17|1": { 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"scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet38|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet39|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet40|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet41|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet42|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet48|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet52|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet53|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet54|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet55|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet56|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet57|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet58|1": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet0|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet1|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet4|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet5|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet6|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet7|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet8|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet9|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet10|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet11|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet12|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet13|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet14|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet15|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet16|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet17|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet20|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet21|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet22|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet23|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet24|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet25|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet26|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet27|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet28|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet29|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet30|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet31|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet32|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet36|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet37|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet38|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet39|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet40|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet41|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet42|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet48|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet52|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet53|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet54|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet55|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet56|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet57|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet58|2": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet0|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet1|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet4|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet5|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet6|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet7|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet8|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet9|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet10|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet11|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet12|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet13|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet14|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet15|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet16|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet17|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet20|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet21|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet22|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet23|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet24|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet25|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet26|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet27|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet28|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet29|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet30|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet31|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet32|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet36|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet37|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet38|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet39|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet40|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet41|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet42|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet48|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet52|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet53|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet54|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet55|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet56|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet57|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet58|5": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet0|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet1|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet4|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet5|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet6|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet7|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet8|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet9|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet10|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet11|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet12|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet13|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet14|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet15|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet16|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet17|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet20|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet21|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet22|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet23|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet24|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet25|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet26|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet27|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet28|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet29|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet30|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet31|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet32|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet36|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet37|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet38|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet39|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet40|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet41|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet42|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet48|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet52|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet53|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet54|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet55|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet56|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet57|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet58|6": { + "scheduler": "[SCHEDULER|scheduler.0]" + } + } +} diff --git a/src/sonic-config-engine/tests/sample_output/staticd_frr.conf b/src/sonic-config-engine/tests/sample_output/staticd_frr.conf new file mode 100644 index 00000000000..12a81de8212 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/staticd_frr.conf @@ -0,0 +1,18 @@ +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/frr/staticd.conf.j2 using config DB data +! file: staticd.conf +! +! +! +hostname switch-t0 +password zebra +enable password zebra +! +log syslog informational +log facility local4 +!! +! +! set static default route to mgmt gateway as a backup to learned default +ip route 0.0.0.0/0 10.0.0.1 200 +!! diff --git a/src/sonic-config-engine/tests/sample_output/t0_sample_output/PortChannel01.conf b/src/sonic-config-engine/tests/sample_output/t0_sample_output/PortChannel01.conf new file mode 100644 index 00000000000..d69c0d6697b --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/t0_sample_output/PortChannel01.conf @@ -0,0 +1,17 @@ +{ + "device": "PortChannel01", + "hwaddr": "e4:1d:2d:a5:f3:ad", + "runner": { + "name": "lacp", + "active": true, + "min_ports": 1, + "tx_hash": ["eth", "ipv4", "ipv6"] + }, + "link_watch": { + "name": "ethtool" + }, + "ports": { + "Ethernet112": {} + } +} + diff --git a/src/sonic-config-engine/tests/sample_output/t0_sample_output/PortChannel02.conf b/src/sonic-config-engine/tests/sample_output/t0_sample_output/PortChannel02.conf new file mode 100644 index 00000000000..e9b2ff4f1ad --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/t0_sample_output/PortChannel02.conf @@ -0,0 +1,17 @@ +{ + "device": "PortChannel02", + "hwaddr": "e4:1d:2d:a5:f3:ad", + "runner": { + "name": "lacp", + "active": true, + "min_ports": 1, + "tx_hash": ["eth", "ipv4", "ipv6"] + }, + "link_watch": { + "name": "ethtool" + }, + "ports": { + "Ethernet116": {} + } +} + diff --git a/src/sonic-config-engine/tests/sample_output/t0_sample_output/PortChannel03.conf b/src/sonic-config-engine/tests/sample_output/t0_sample_output/PortChannel03.conf new file mode 100644 index 00000000000..a73617abade --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/t0_sample_output/PortChannel03.conf @@ -0,0 +1,17 @@ +{ + "device": "PortChannel03", + "hwaddr": "e4:1d:2d:a5:f3:ad", + "runner": { + "name": "lacp", + "active": true, + "min_ports": 1, + "tx_hash": ["eth", "ipv4", "ipv6"] + }, + "link_watch": { + "name": "ethtool" + }, + "ports": { + "Ethernet120": {} + } +} + diff --git a/src/sonic-config-engine/tests/sample_output/t0_sample_output/PortChannel04.conf b/src/sonic-config-engine/tests/sample_output/t0_sample_output/PortChannel04.conf new file mode 100644 index 00000000000..073b8057d46 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/t0_sample_output/PortChannel04.conf @@ -0,0 +1,17 @@ +{ + "device": "PortChannel04", + "hwaddr": "e4:1d:2d:a5:f3:ad", + "runner": { + "name": "lacp", + "active": true, + "min_ports": 1, + "tx_hash": ["eth", "ipv4", "ipv6"] + }, + "link_watch": { + "name": "ethtool" + }, + "ports": { + "Ethernet124": {} + } +} + diff --git a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-bgpd.conf b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-bgpd.conf new file mode 100644 index 00000000000..b0b5e2cb119 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-bgpd.conf @@ -0,0 +1,85 @@ +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/bgpd.conf.j2 with config DB data +! file: bgpd.conf +! +! +! +hostname SpineFront01 +password zebra +enable password zebra +! +log syslog informational +log facility local4 +!! +agentx +! +! +! Vnet BGP instance +router bgp 4000 vrf VnetFE + no bgp default ipv4-unicast + bgp log-neighbor-changes + bgp bestpath as-path multipath-relax + no bgp default ipv4-unicast + bgp graceful-restart restart-time 240 + bgp graceful-restart + bgp router-id 4.0.0.0 + neighbor 192.168.0.1 remote-as 3000 + neighbor 192.168.0.1 description Leaf01 + neighbor 192.168.0.1 timers 3 10 + address-family ipv4 unicast + neighbor 192.168.0.1 activate + neighbor 192.168.0.1 soft-reconfiguration inbound + maximum-paths 64 + exit-address-family + address-family l2vpn evpn + advertise ipv4 unicast + exit-address-family +!! +! +! +! bgp multiple-instance +! +route-map FROM_BGP_SPEAKER_V4 permit 10 +! +route-map TO_BGP_SPEAKER_V4 deny 10 +! +ip prefix-list PL_LoopbackV4 permit 4.0.0.0/32 +! +! +route-map TO_BGP_PEER_V4 permit 100 +! +route-map TO_BGP_PEER_V6 permit 100 +! +! +route-map ISOLATE permit 10 + set as-path prepend 4000 +! +route-map set-next-hop-global-v6 permit 10 + set ipv6 next-hop prefer-global +! +router bgp 4000 + bgp log-neighbor-changes + bgp bestpath as-path multipath-relax + no bgp default ipv4-unicast + bgp graceful-restart restart-time 240 + bgp graceful-restart + bgp router-id 4.0.0.0 + network 4.0.0.0/32 + address-family ipv4 + maximum-paths 64 + exit-address-family + address-family ipv6 + maximum-paths 64 + exit-address-family + neighbor PEER_V4 peer-group + neighbor PEER_V6 peer-group + address-family ipv4 + neighbor PEER_V4 soft-reconfiguration inbound + neighbor PEER_V4 route-map TO_BGP_PEER_V4 out + exit-address-family + address-family ipv6 + neighbor PEER_V6 soft-reconfiguration inbound + neighbor PEER_V6 route-map TO_BGP_PEER_V6 out + exit-address-family +!! diff --git a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf new file mode 100644 index 00000000000..312394bf76c --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf @@ -0,0 +1,36 @@ +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/zebra.conf.j2 using config DB data +! file: zebra.conf +! +! +hostname SpineFront01 +password zebra +enable password zebra +! +vrf VnetFE +vni 8000 +! +! +! Enable link-detect (default disabled) +interface PortChannel0 +link-detect +! +interface PortChannel4 +link-detect +! +interface PortChannel8 +link-detect +! +! +! Set ip source to loopback for bgp learned routes +route-map RM_SET_SRC permit 10 + set src 4.0.0.0 +! +ip protocol bgp route-map RM_SET_SRC +! +! +log syslog informational +log facility local4 +! + diff --git a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-vni-zebra.conf new file mode 100644 index 00000000000..bd2b5c84f47 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-vni-zebra.conf @@ -0,0 +1,37 @@ +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/zebra.conf.j2 using config DB data +! file: zebra.conf +! +! +! +hostname SpineFront01 +password zebra +enable password zebra +! +log syslog informational +log facility local4 +!! +! +vrf VnetFE +vni 9000 +! +! +! Enable link-detect (default disabled) +interface Ethernet0 +link-detect +! +interface Ethernet4 +link-detect +! +interface Ethernet8 +link-detect +! +! +! Set ip source to loopback for bgp learned routes +route-map RM_SET_SRC permit 10 + set src 4.0.0.0 +! +ip protocol bgp route-map RM_SET_SRC +! +!! diff --git a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-zebra.conf new file mode 100644 index 00000000000..e047fcd64f2 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-zebra.conf @@ -0,0 +1,37 @@ +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/zebra.conf.j2 using config DB data +! file: zebra.conf +! +! +! +hostname SpineFront01 +password zebra +enable password zebra +! +log syslog informational +log facility local4 +!! +! +vrf VnetFE +vni 8000 +! +! +! Enable link-detect (default disabled) +interface Ethernet0 +link-detect +! +interface Ethernet4 +link-detect +! +interface Ethernet8 +link-detect +! +! +! Set ip source to loopback for bgp learned routes +route-map RM_SET_SRC permit 10 + set src 4.0.0.0 +! +ip protocol bgp route-map RM_SET_SRC +! +!! diff --git a/src/sonic-config-engine/tests/sample_output/wait_for_intf.sh b/src/sonic-config-engine/tests/sample_output/wait_for_intf.sh new file mode 100644 index 00000000000..918f0b6e164 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/wait_for_intf.sh @@ -0,0 +1,33 @@ +#!/usr/bin/env bash + +STATE_DB_IDX="6" + +function wait_until_iface_ready +{ + IFACE_NAME=$1 + IFACE_CIDR=$2 + + echo "Waiting until interface ${IFACE_NAME} is ready..." + + # Wait for the interface to come up + # (i.e., interface is present in STATE_DB and state is "ok") + while true; do + RESULT=$(redis-cli -n ${STATE_DB_IDX} HGET "INTERFACE_TABLE|${IFACE_NAME}|${IFACE_CIDR}" "state" 2> /dev/null) + if [ x"$RESULT" == x"ok" ]; then + break + fi + + sleep 1 + done + + echo "Interface ${IFACE_NAME} is ready!" +} + + +# Wait for all interfaces with IPv4 addresses to be up and ready +wait_until_iface_ready Vlan1000 192.168.0.1/27 +wait_until_iface_ready PortChannel01 10.0.0.56/31 +wait_until_iface_ready PortChannel02 10.0.0.58/31 +wait_until_iface_ready PortChannel03 10.0.0.60/31 +wait_until_iface_ready PortChannel04 10.0.0.62/31 + diff --git a/src/sonic-config-engine/tests/sample_output/zebra_frr.conf b/src/sonic-config-engine/tests/sample_output/zebra_frr.conf new file mode 100644 index 00000000000..690f609dafc --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/zebra_frr.conf @@ -0,0 +1,43 @@ +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/zebra.conf.j2 using config DB data +! file: zebra.conf +! +! +! +hostname switch-t0 +password zebra +enable password zebra +! +log syslog informational +log facility local4 +!! +! +! +! Enable link-detect (default disabled) +interface PortChannel01 +link-detect +! +interface PortChannel02 +link-detect +! +interface PortChannel03 +link-detect +! +interface PortChannel04 +link-detect +! +! +! Set ip source to loopback for bgp learned routes +route-map RM_SET_SRC permit 10 + set src 10.1.0.32 +! + +route-map RM_SET_SRC6 permit 10 + set src fc00:1::32 +! +ip protocol bgp route-map RM_SET_SRC +! +ipv6 protocol bgp route-map RM_SET_SRC6 +! +!! diff --git a/src/sonic-config-engine/tests/sample_output/zebra_quagga.conf b/src/sonic-config-engine/tests/sample_output/zebra_quagga.conf new file mode 100644 index 00000000000..aa3486b0163 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/zebra_quagga.conf @@ -0,0 +1,44 @@ +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/zebra.conf.j2 using config DB data +! file: zebra.conf +! +! +hostname switch-t0 +password zebra +enable password zebra +! +! Enable link-detect (default disabled) +interface PortChannel01 +link-detect +! +interface PortChannel02 +link-detect +! +interface PortChannel03 +link-detect +! +interface PortChannel04 +link-detect +! +! +! set static default route to mgmt gateway as a backup to learned default +ip route 0.0.0.0/0 10.0.0.1 200 +! +! Set ip source to loopback for bgp learned routes +route-map RM_SET_SRC permit 10 + set src 10.1.0.32 +! + +route-map RM_SET_SRC6 permit 10 + set src fc00:1::32 +! +ip protocol bgp route-map RM_SET_SRC +! +ipv6 protocol bgp route-map RM_SET_SRC6 +! +! +log syslog informational +log facility local4 +! + diff --git a/src/sonic-config-engine/tests/simple-sample-graph-case.xml b/src/sonic-config-engine/tests/simple-sample-graph-case.xml new file mode 100644 index 00000000000..35d8f834379 --- /dev/null +++ b/src/sonic-config-engine/tests/simple-sample-graph-case.xml @@ -0,0 +1,345 @@ + + + + + + false + switch-t0 + 10.0.0.56 + ARISTA01T1 + 10.0.0.57 + 1 + 180 + 60 + + + switch-t0 + FC00::71 + ARISTA01T1 + FC00::72 + 1 + 180 + 60 + + + false + switch-t0 + 10.0.0.58 + ARISTA02T1 + 10.0.0.59 + 1 + 180 + 60 + + + switch-t0 + FC00::75 + ARISTA02T1 + FC00::76 + 1 + 180 + 60 + + + + + 65100 + switch-t0 + + +
10.0.0.57
+ + + + + +
10.0.0.59
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Force10-S6000 + diff --git a/src/sonic-config-engine/tests/t0-sample-acl.json b/src/sonic-config-engine/tests/t0-sample-acl.json new file mode 100644 index 00000000000..1caf2ff0295 --- /dev/null +++ b/src/sonic-config-engine/tests/t0-sample-acl.json @@ -0,0 +1,176 @@ +{ + "acl": { + "acl-sets": { + "acl-set": { + "dataacl": { + "acl-entries": { + "acl-entry": { + "1": { + "actions": { + "config": { + "forwarding-action": "ACCEPT" + } + }, + "config": { + "sequence-id": 1 + }, + "ip": { + "config": { + "protocol": "IP_UDP", + "source-ip-address": "10.0.0.0/8" + } + } + }, + "2": { + "actions": { + "config": { + "forwarding-action": "ACCEPT" + } + }, + "config": { + "sequence-id": 2 + }, + "ip": { + "config": { + "protocol": "IP_UDP", + "source-ip-address": "100.64.0.0/10" + } + } + }, + "3": { + "actions": { + "config": { + "forwarding-action": "ACCEPT" + } + }, + "config": { + "sequence-id": 3 + }, + "ip": { + "config": { + "protocol": "IP_UDP", + "source-ip-address": "25.0.0.0/8" + } + } + }, + "4": { + "actions": { + "config": { + "forwarding-action": "ACCEPT" + } + }, + "config": { + "sequence-id": 4 + }, + "ip": { + "config": { + "protocol": "IP_TCP" + } + }, + "transport": { + "config": { + "tcp-flags": [ + "TCP_ACK" + ] + } + } + } + } + }, + "config": { + "name": "dataacl" + } + }, + "everflow": { + "acl-entries": { + "acl-entry": { + "1": { + "actions": { + "config": { + "forwarding-action": "ACCEPT" + } + }, + "config": { + "sequence-id": 1 + }, + "ip": { + "config": { + "destination-ip-address": "127.0.0.1/32", + "protocol": "IP_TCP", + "source-ip-address": "127.0.0.1/32" + } + }, + "transport": { + "config": { + "destination-port": "0", + "source-port": "0" + } + } + } + } + }, + "config": { + "name": "everflow" + } + }, + "SNMP-ACL": { + "acl-entries": { + "acl-entry": { + "1": { + "actions": { + "config": { + "forwarding-action": "ACCEPT" + } + }, + "config": { + "sequence-id": 1 + }, + "ip": { + "config": { + "protocol": "IP_UDP", + "source-ip-address": "10.0.0.0/8" + } + } + }, + "2": { + "actions": { + "config": { + "forwarding-action": "ACCEPT" + } + }, + "config": { + "sequence-id": 2 + }, + "ip": { + "config": { + "protocol": "IP_UDP", + "source-ip-address": "100.64.0.0/10" + } + } + }, + "3": { + "actions": { + "config": { + "forwarding-action": "ACCEPT" + } + }, + "config": { + "sequence-id": 3 + }, + "ip": { + "config": { + "protocol": "IP_UDP", + "source-ip-address": "25.0.0.0/8" + } + } + } + } + }, + "config": { + "name": "SNMP-ACL" + } + } + } + } + } +} diff --git a/src/sonic-config-engine/tests/t0-sample-bgp-speaker.xml b/src/sonic-config-engine/tests/t0-sample-bgp-speaker.xml new file mode 100644 index 00000000000..f2690985d9f --- /dev/null +++ b/src/sonic-config-engine/tests/t0-sample-bgp-speaker.xml @@ -0,0 +1,351 @@ + + + + + + false + switch-t0 + 10.0.0.56 + ARISTA01T1 + 10.0.0.57 + 1 + 180 + 60 + + + switch-t0 + FC00::71 + ARISTA01T1 + FC00::72 + 1 + 180 + 60 + + + false + switch-t0 + 10.0.0.58 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0.0.0.0/0 + + 192.0.0.1;192.0.0.2 + 1000 + 1000 + 192.168.0.0/27 + + + + + + PortChannel01 + 10.0.0.56/31 + + + + PortChannel01 + FC00::71/126 + + + + PortChannel02 + 10.0.0.58/31 + + + + PortChannel02 + FC00::75/126 + + + + PortChannel03 + 10.0.0.60/31 + + + + PortChannel03 + FC00::79/126 + + + + PortChannel04 + 10.0.0.62/31 + + + + PortChannel04 + FC00::7D/126 + + + + Vlan1000 + 192.168.0.1/27 + + + + + + ERSPAN + everflow + Everflow + + + ERSPANv6 + everflowV6 + Everflow + + + PortChannel01;PortChannel02;PortChannel03;PortChannel04 + DataAcl + DataPlane + + + SNMP + SNMP_ACL + SNMP + + + NTP + NTP_ACL + NTP + + + SSH + SSH_ACL + SSH + + + SSH + ROUTER-PROTECT + SSH + + + SNMP + ROUTER-PROTECT + SNMP + + + NTP + NTP_ACL + + + + + + + + + + DeviceInterfaceLink + ARISTA01T1 + Ethernet1/1 + switch-t0 + fortyGigE0/112 + + + DeviceInterfaceLink + ARISTA02T1 + Ethernet1/1 + switch-t0 + fortyGigE0/116 + + + DeviceInterfaceLink + ARISTA03T1 + Ethernet1/1 + switch-t0 + fortyGigE0/120 + + + DeviceInterfaceLink + ARISTA04T1 + Ethernet1/1 + switch-t0 + fortyGigE0/124 + + + DeviceInterfaceLink + true + 10000 + switch-t0 + fortyGigE0/2 + true + ARISTA05T1 + Ethernet1/33 + true + + + DeviceInterfaceLink + Servers0 + eth0 + switch-t0 + fortyGigE0/4 + + + + + switch-t0 + Force10-S6000 + + + ARISTA01T1 + Arista + + + ARISTA02T1 + Arista + + + ARISTA03T1 + Arista + + + ARISTA04T1 + Arista + + + + + + + switch-t0 + + + ErspanDestinationIpv4 + + 2.2.2.2 + + + + + + + switch-t0 + Force10-S6000 + diff --git a/src/sonic-config-engine/tests/t0-sample-port-config.ini b/src/sonic-config-engine/tests/t0-sample-port-config.ini new file mode 100644 index 00000000000..06898f1d796 --- /dev/null +++ b/src/sonic-config-engine/tests/t0-sample-port-config.ini @@ -0,0 +1,33 @@ +# name lanes alias +Ethernet0 29,30,31,32 fortyGigE0/0 +Ethernet4 25,26,27,28 fortyGigE0/4 +Ethernet8 37,38,39,40 fortyGigE0/8 +Ethernet12 33,34,35,36 fortyGigE0/12 +Ethernet16 41,42,43,44 fortyGigE0/16 +Ethernet20 45,46,47,48 fortyGigE0/20 +Ethernet24 5,6,7,8 fortyGigE0/24 +Ethernet28 1,2,3,4 fortyGigE0/28 +Ethernet32 9,10,11,12 fortyGigE0/32 +Ethernet36 13,14,15,16 fortyGigE0/36 +Ethernet40 21,22,23,24 fortyGigE0/40 +Ethernet44 17,18,19,20 fortyGigE0/44 +Ethernet48 49,50,51,52 fortyGigE0/48 +Ethernet52 53,54,55,56 fortyGigE0/52 +Ethernet56 61,62,63,64 fortyGigE0/56 +Ethernet60 57,58,59,60 fortyGigE0/60 +Ethernet64 65,66,67,68 fortyGigE0/64 +Ethernet68 69,70,71,72 fortyGigE0/68 +Ethernet72 77,78,79,80 fortyGigE0/72 +Ethernet76 73,74,75,76 fortyGigE0/76 +Ethernet80 105,106,107,108 fortyGigE0/80 +Ethernet84 109,110,111,112 fortyGigE0/84 +Ethernet88 117,118,119,120 fortyGigE0/88 +Ethernet92 113,114,115,116 fortyGigE0/92 +Ethernet96 121,122,123,124 fortyGigE0/96 +Ethernet100 125,126,127,128 fortyGigE0/100 +Ethernet104 85,86,87,88 fortyGigE0/104 +Ethernet108 81,82,83,84 fortyGigE0/108 +Ethernet112 89,90,91,92 fortyGigE0/112 +Ethernet116 93,94,95,96 fortyGigE0/116 +Ethernet120 97,98,99,100 fortyGigE0/120 +Ethernet124 101,102,103,104 fortyGigE0/124 diff --git a/src/sonic-config-engine/tests/t1-sample-graph-mlnx.xml b/src/sonic-config-engine/tests/t1-sample-graph-mlnx.xml new file mode 100644 index 00000000000..04fc88c3437 --- /dev/null +++ b/src/sonic-config-engine/tests/t1-sample-graph-mlnx.xml @@ -0,0 +1,2240 @@ + + + + + + ARISTA01T0 + 10.0.0.33 + arc-switch1026 + 10.0.0.32 + 1 + 10 + 3 + + + ARISTA01T0 + FC00::42 + arc-switch1026 + FC00::41 + 1 + 10 + 3 + + + arc-switch1026 + 10.0.0.0 + ARISTA01T2 + 10.0.0.1 + 1 + 10 + 3 + + + arc-switch1026 + FC00::1 + ARISTA01T2 + FC00::2 + 1 + 10 + 3 + + + ARISTA02T0 + 10.0.0.35 + arc-switch1026 + 10.0.0.34 + 1 + 10 + 3 + + + ARISTA02T0 + FC00::46 + arc-switch1026 + FC00::45 + 1 + 10 + 3 + + + arc-switch1026 + 10.0.0.2 + ARISTA02T2 + 10.0.0.3 + 1 + 10 + 3 + + + arc-switch1026 + FC00::5 + ARISTA02T2 + FC00::6 + 1 + 10 + 3 + + + ARISTA03T0 + 10.0.0.37 + arc-switch1026 + 10.0.0.36 + 1 + 10 + 3 + + + ARISTA03T0 + FC00::4A + arc-switch1026 + FC00::49 + 1 + 10 + 3 + + + arc-switch1026 + 10.0.0.4 + ARISTA03T2 + 10.0.0.5 + 1 + 10 + 3 + + + arc-switch1026 + FC00::9 + ARISTA03T2 + FC00::A + 1 + 10 + 3 + + + ARISTA04T0 + 10.0.0.39 + arc-switch1026 + 10.0.0.38 + 1 + 10 + 3 + + + ARISTA04T0 + FC00::4E + arc-switch1026 + FC00::4D + 1 + 10 + 3 + + + arc-switch1026 + 10.0.0.6 + ARISTA04T2 + 10.0.0.7 + 1 + 10 + 3 + + + arc-switch1026 + FC00::D + ARISTA04T2 + FC00::E + 1 + 10 + 3 + + + ARISTA05T0 + 10.0.0.41 + arc-switch1026 + 10.0.0.40 + 1 + 10 + 3 + + + ARISTA05T0 + FC00::52 + arc-switch1026 + FC00::51 + 1 + 10 + 3 + + + arc-switch1026 + 10.0.0.8 + ARISTA05T2 + 10.0.0.9 + 1 + 10 + 3 + + + arc-switch1026 + FC00::11 + ARISTA05T2 + FC00::12 + 1 + 10 + 3 + + + ARISTA06T0 + 10.0.0.43 + arc-switch1026 + 10.0.0.42 + 1 + 10 + 3 + + + ARISTA06T0 + FC00::56 + arc-switch1026 + FC00::55 + 1 + 10 + 3 + + + arc-switch1026 + 10.0.0.10 + ARISTA06T2 + 10.0.0.11 + 1 + 10 + 3 + + + arc-switch1026 + FC00::15 + ARISTA06T2 + FC00::16 + 1 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10.0.0.33
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10.0.0.1
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10.0.0.35
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10.0.0.3
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10.0.0.37
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10.0.0.11
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10.0.0.25
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10.0.0.27
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10.0.0.31
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+ + + + "ARISTA10T2" + Arista-VM + + 10.224.23.189 + + + + "ARISTA11T0" + Arista-VM + + 10.224.23.154 + + + + "ARISTA11T2" + Arista-VM + + 10.224.23.190 + + + + "ARISTA12T0" + Arista-VM + + 10.224.23.155 + + + + "ARISTA12T2" + Arista-VM + + 10.224.23.191 + + + + "ARISTA13T0" + Arista-VM + + 10.224.23.156 + + + + "ARISTA13T2" + Arista-VM + + 10.224.23.192 + + + + "ARISTA14T0" + Arista-VM + + 10.224.23.157 + + + + "ARISTA14T2" + Arista-VM + + 10.224.23.193 + + + + "ARISTA15T0" + Arista-VM + + 10.224.23.158 + + + + "ARISTA15T2" + Arista-VM + + 10.224.23.194 + + + + "ARISTA16T0" + Arista-VM + + 10.224.23.159 + + + + "ARISTA16T2" + Arista-VM + + 10.224.23.195 + + + + + + + true + + + DeviceInterface + + true + true + 1 + Ethernet0 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet4 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet8 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet12 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet16 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet20 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet24 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet28 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet32 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet36 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet40 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet44 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet48 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet52 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet56 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet60 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet64 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet68 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet72 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet76 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet80 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet84 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet88 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet92 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet96 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet100 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet104 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet108 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet112 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet116 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet120 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + true + 1 + Ethernet124 + + false + 0 + 0 + 40000 + + + true + 0 + ACS-MSN2700 + + + + + + + arc-switch1026 + + + DhcpResources + + 10.0.0.1 + + + NTPResources + + 10.0.0.1;10.0.0.2 + + + DeploymentId + + 1 + + + QosProfile + + Profile0 + + + RadiusResources + + + + + SnmpResources + + 10.0.0.9 + + + SyslogResources + + 10.0.0.5;10.0.0.6 + + + TacacsGroup + + testlab + + + TacacsServer + + 10.0.0.9;10.0.0.8 + + + ForcedMgmtRoutes + + 10.0.0.100/31;10.250.0.8;10.255.0.0/28 + + + ErspanDestinationIpv4 + + 10.0.0.7 + + + + + + + arc-switch1026 + ACS-MSN2700 + diff --git a/src/sonic-config-engine/tests/t2-chassis-fe-graph-pc.xml b/src/sonic-config-engine/tests/t2-chassis-fe-graph-pc.xml new file mode 100644 index 00000000000..3fb744ce91f --- /dev/null +++ b/src/sonic-config-engine/tests/t2-chassis-fe-graph-pc.xml @@ -0,0 +1,324 @@ + + + + + + SpineFront01 + 192.168.0.2 + Leaf01 + 192.168.0.1 + 1 + 10 + 3 + + + SpineFront01 + 172.16.0.1 + SpineBack01 + 172.16.0.2 + 1 + 10 + 3 + + + SpineFront01 + 172.16.0.9 + SpineBack02 + 172.16.0.10 + 1 + 10 + 3 + + + SpineFront01 + 4.0.0.0 + SpineFront02 + 4.0.0.1 + 10 + 10 + 3 + + + + + 4000 + SpineFront01 + + +
192.168.0.1
+ + + + + +
172.16.0.2
+ + + + + +
172.16.0.10
+ + + + + +
4.0.0.1
+ + + + + + + + + 3000 + Leaf01 + + + + 5000 + SpineBack01 + + + + 5000 + SpineBack02 + + + + 4000 + SpineFront02 + + + + + + + + + + HostIP + Loopback0 + + 4.0.0.0/32 + + 4.0.0.0/32 + + + + + + + + SpineFront01 + + + PortChannel0 + Ethernet0;Ethernet4 + + + + PortChannel4 + Ethernet8;Ethernet12 + + + + PortChannel8 + Ethernet16;Ethernet20 + + + + + + + + PortChannel0 + 192.168.0.2/30 + + + + PortChannel4 + 172.16.0.1/30 + + + + PortChannel8 + 172.16.0.9/30 + + + + + + + + + + + + DeviceInterfaceLink + Leaf01 + Ethernet0 + SpineFront01 + Ethernet0 + + + DeviceInterfaceLink + Leaf01 + Ethernet4 + SpineFront01 + Ethernet4 + + + DeviceInterfaceLink + SpineBack01 + Ethernet8 + SpineFront01 + Ethernet8 + + + DeviceInterfaceLink + SpineBack01 + Ethernet12 + SpineFront01 + Ethernet12 + + + DeviceInterfaceLink + SpineBack02 + Ethernet16 + SpineFront01 + Ethernet16 + + + DeviceInterfaceLink + SpineBack02 + Ethernet20 + SpineFront01 + Ethernet20 + + + + + SpineFront01 + Force10-S6000 + + + SpineFront02 + Force10-S6000 + + + Leaf01 + Force10-S6000 + + + SpineBack01 + Force10-S6000 + + + SpineBack02 + Force10-S6000 + + + + + + true + + + DeviceInterface + + true + false + 1 + Ethernet0 + + false + 0 + 0 + 25000 + + + DeviceInterface + + true + false + 1 + Ethernet4 + + false + 0 + 0 + 25000 + + + DeviceInterface + + true + false + 1 + Ethernet8 + + false + 0 + 0 + 25000 + + + DeviceInterface + + true + false + 1 + Ethernet12 + + false + 0 + 0 + 25000 + + + DeviceInterface + + true + false + 1 + Ethernet16 + + false + 0 + 0 + 25000 + + + DeviceInterface + + true + false + 1 + Ethernet20 + + false + 0 + 0 + 25000 + + + false + 0 + Force10-S6000 + + + + + + + SpineFront01 + + + + + + SpineFront01 + Force10-S6000 + diff --git a/src/sonic-config-engine/tests/t2-chassis-fe-graph-vni.xml b/src/sonic-config-engine/tests/t2-chassis-fe-graph-vni.xml new file mode 100644 index 00000000000..f820b180f70 --- /dev/null +++ b/src/sonic-config-engine/tests/t2-chassis-fe-graph-vni.xml @@ -0,0 +1,249 @@ + + + + + + SpineFront01 + 192.168.0.2 + Leaf01 + 192.168.0.1 + 1 + 10 + 3 + + + SpineFront01 + 172.16.0.1 + SpineBack01 + 172.16.0.2 + 1 + 10 + 3 + + + SpineFront01 + 172.16.0.9 + SpineBack02 + 172.16.0.10 + 1 + 10 + 3 + + + SpineFront01 + 4.0.0.0 + SpineFront02 + 4.0.0.1 + 10 + 10 + 3 + + + + + 4000 + SpineFront01 + + +
192.168.0.1
+ + + + + +
172.16.0.2
+ + + + + +
172.16.0.10
+ + + + + +
4.0.0.1
+ + + + + + + + + 3000 + Leaf01 + + + + 5000 + SpineBack01 + + + + 5000 + SpineBack02 + + + + 4000 + SpineFront02 + + + + + + + 9000 + + + + HostIP + Loopback0 + + 4.0.0.0/32 + + 4.0.0.0/32 + + + + + + + + SpineFront01 + + + + + + Ethernet0 + 192.168.0.2/30 + + + + Ethernet4 + 172.16.0.1/30 + + + + Ethernet8 + 172.16.0.9/30 + + + + + + + + + + + + DeviceInterfaceLink + Leaf01 + Ethernet4 + SpineFront01 + Ethernet0 + + + DeviceInterfaceLink + SpineBack01 + Ethernet0 + SpineFront01 + Ethernet4 + + + DeviceInterfaceLink + SpineBack02 + Ethernet4 + SpineFront01 + Ethernet8 + + + + + SpineFront01 + Force10-S6000 + + + SpineFront02 + Force10-S6000 + + + Leaf01 + Force10-S6000 + + + SpineBack01 + Force10-S6000 + + + SpineBack02 + Force10-S6000 + + + + + + true + + + DeviceInterface + + true + false + 1 + Ethernet0 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + false + 1 + Ethernet4 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + false + 1 + Ethernet8 + + false + 0 + 0 + 40000 + + + false + 0 + Force10-S6000 + + + + + + + SpineFront01 + + + + + + SpineFront01 + Force10-S6000 + diff --git a/src/sonic-config-engine/tests/t2-chassis-fe-graph.xml b/src/sonic-config-engine/tests/t2-chassis-fe-graph.xml new file mode 100644 index 00000000000..76320b766be --- /dev/null +++ b/src/sonic-config-engine/tests/t2-chassis-fe-graph.xml @@ -0,0 +1,248 @@ + + + + + + SpineFront01 + 192.168.0.2 + Leaf01 + 192.168.0.1 + 1 + 10 + 3 + + + SpineFront01 + 172.16.0.1 + SpineBack01 + 172.16.0.2 + 1 + 10 + 3 + + + SpineFront01 + 172.16.0.9 + SpineBack02 + 172.16.0.10 + 1 + 10 + 3 + + + SpineFront01 + 4.0.0.0 + SpineFront02 + 4.0.0.1 + 10 + 10 + 3 + + + + + 4000 + SpineFront01 + + +
192.168.0.1
+ + + + + +
172.16.0.2
+ + + + + +
172.16.0.10
+ + + + + +
4.0.0.1
+ + + + + + + + + 3000 + Leaf01 + + + + 5000 + SpineBack01 + + + + 5000 + SpineBack02 + + + + 4000 + SpineFront02 + + + + + + + + + + HostIP + Loopback0 + + 4.0.0.0/32 + + 4.0.0.0/32 + + + + + + + + SpineFront01 + + + + + + Ethernet0 + 192.168.0.2/30 + + + + Ethernet4 + 172.16.0.1/30 + + + + Ethernet8 + 172.16.0.9/30 + + + + + + + + + + + + DeviceInterfaceLink + Leaf01 + Ethernet4 + SpineFront01 + Ethernet0 + + + DeviceInterfaceLink + SpineBack01 + Ethernet0 + SpineFront01 + Ethernet4 + + + DeviceInterfaceLink + SpineBack02 + Ethernet4 + SpineFront01 + Ethernet8 + + + + + SpineFront01 + Force10-S6000 + + + SpineFront02 + Force10-S6000 + + + Leaf01 + Force10-S6000 + + + SpineBack01 + Force10-S6000 + + + SpineBack02 + Force10-S6000 + + + + + + true + + + DeviceInterface + + true + false + 1 + Ethernet0 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + false + 1 + Ethernet4 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + false + 1 + Ethernet8 + + false + 0 + 0 + 40000 + + + false + 0 + Force10-S6000 + + + + + + + SpineFront01 + + + + + + SpineFront01 + Force10-S6000 + diff --git a/src/sonic-config-engine/tests/t2-chassis-fe-port-config.ini b/src/sonic-config-engine/tests/t2-chassis-fe-port-config.ini new file mode 100644 index 00000000000..1a9786c590e --- /dev/null +++ b/src/sonic-config-engine/tests/t2-chassis-fe-port-config.ini @@ -0,0 +1,33 @@ +# name lanes +Ethernet0 0,1,2,3 +Ethernet4 4,5,6,7 +Ethernet8 8,9,10,11 +Ethernet12 12,13,14,15 +Ethernet16 16,17,18,19 +Ethernet20 20,21,22,23 +Ethernet24 24,25,26,27 +Ethernet28 28,29,30,31 +Ethernet32 32,33,34,35 +Ethernet36 36,37,38,39 +Ethernet40 40,41,42,43 +Ethernet44 44,45,46,47 +Ethernet48 48,49,50,51 +Ethernet52 52,53,54,55 +Ethernet56 56,57,58,59 +Ethernet60 60,61,62,63 +Ethernet64 64,65,66,67 +Ethernet68 68,69,70,71 +Ethernet72 72,73,74,75 +Ethernet76 76,77,78,79 +Ethernet80 80,81,82,83 +Ethernet84 84,85,86,87 +Ethernet88 88,89,90,91 +Ethernet92 92,93,94,95 +Ethernet96 96,97,98,99 +Ethernet100 100,101,102,103 +Ethernet104 104,105,106,107 +Ethernet108 108,109,110,111 +Ethernet112 112,113,114,115 +Ethernet116 116,117,118,119 +Ethernet120 120,121,122,123 +Ethernet124 124,125,126,127 \ No newline at end of file diff --git a/src/sonic-config-engine/tests/test.j2 b/src/sonic-config-engine/tests/test.j2 new file mode 100644 index 00000000000..787a1f0a2c4 --- /dev/null +++ b/src/sonic-config-engine/tests/test.j2 @@ -0,0 +1,3 @@ +{% for item in yml_item -%} +{{ item }} +{% endfor %} diff --git a/src/sonic-config-engine/tests/test.yml b/src/sonic-config-engine/tests/test.yml new file mode 100644 index 00000000000..dc08eb66bed --- /dev/null +++ b/src/sonic-config-engine/tests/test.yml @@ -0,0 +1,3 @@ +yml_item: + - value1 + - value2 diff --git a/src/sonic-config-engine/tests/test_cfggen.py b/src/sonic-config-engine/tests/test_cfggen.py new file mode 100644 index 00000000000..8288b729584 --- /dev/null +++ b/src/sonic-config-engine/tests/test_cfggen.py @@ -0,0 +1,332 @@ +from unittest import TestCase +import subprocess +import os + +TOR_ROUTER = 'ToRRouter' +BACKEND_TOR_ROUTER = 'BackEndToRRouter' + +class TestCfgGen(TestCase): + + def setUp(self): + self.test_dir = os.path.dirname(os.path.realpath(__file__)) + self.script_file = os.path.join(self.test_dir, '..', 'sonic-cfggen') + self.sample_graph = os.path.join(self.test_dir, 'sample_graph.xml') + self.sample_graph_t0 = os.path.join(self.test_dir, 't0-sample-graph.xml') + self.sample_graph_simple = os.path.join(self.test_dir, 'simple-sample-graph.xml') + self.sample_graph_metadata = os.path.join(self.test_dir, 'simple-sample-graph-metadata.xml') + self.sample_graph_pc_test = os.path.join(self.test_dir, 'pc-test-graph.xml') + self.sample_graph_bgp_speaker = os.path.join(self.test_dir, 't0-sample-bgp-speaker.xml') + self.sample_device_desc = os.path.join(self.test_dir, 'device.xml') + self.port_config = os.path.join(self.test_dir, 't0-sample-port-config.ini') + + def run_script(self, argument, check_stderr=False): + print '\n Running sonic-cfggen ' + argument + if check_stderr: + output = subprocess.check_output(self.script_file + ' ' + argument, stderr=subprocess.STDOUT, shell=True) + else: + output = subprocess.check_output(self.script_file + ' ' + argument, shell=True) + + linecount = output.strip().count('\n') + if linecount <= 0: + print ' Output: ' + output.strip() + else: + print ' Output: ({0} lines, {1} bytes)'.format(linecount + 1, len(output)) + return output + + def test_dummy_run(self): + argument = '' + output = self.run_script(argument) + self.assertEqual(output, '') + + def test_device_desc(self): + argument = '-v "DEVICE_METADATA[\'localhost\'][\'hwsku\']" -M "' + self.sample_device_desc + '"' + output = self.run_script(argument) + self.assertEqual(output.strip(), 'ACS-MSN2700') + + def test_device_desc_mgmt_ip(self): + argument = '-v "MGMT_INTERFACE.keys()[0]" -M "' + self.sample_device_desc + '"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "('eth0', '10.0.1.5/28')") + + def test_minigraph_sku(self): + argument = '-v "DEVICE_METADATA[\'localhost\'][\'hwsku\']" -m "' + self.sample_graph + '"' + output = self.run_script(argument) + self.assertEqual(output.strip(), 'Force10-Z9100') + + def test_print_data(self): + argument = '-m "' + self.sample_graph + '" --print-data' + output = self.run_script(argument) + self.assertTrue(len(output.strip()) > 0) + + def test_jinja_expression(self, graph=None, expected_router_type='LeafRouter'): + if graph is None: + graph = self.sample_graph + argument = '-m "' + graph + '" -v "DEVICE_METADATA[\'localhost\'][\'type\']"' + output = self.run_script(argument) + self.assertEqual(output.strip(), expected_router_type) + + def test_additional_json_data(self): + argument = '-a \'{"key1":"value1"}\' -v key1' + output = self.run_script(argument) + self.assertEqual(output.strip(), 'value1') + + def test_additional_json_data_level1_key(self): + argument = '-a \'{"k1":{"k11":"v11","k12":"v12"}, "k2":{"k22":"v22"}}\' --var-json k1' + output = self.run_script(argument) + self.assertEqual(output.strip(), '{\n "k11": "v11", \n "k12": "v12"\n}') + + def test_additional_json_data_level2_key(self): + argument = '-a \'{"k1":{"k11":"v11","k12":"v12"},"k2":{"k22":"v22"}}\' --var-json k1 -K k11' + output = self.run_script(argument) + self.assertEqual(output.strip(), '{\n "k11": "v11"\n}') + + def test_var_json_data(self): + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" --var-json VLAN_MEMBER' + output = self.run_script(argument) + self.assertEqual(output.strip(), '{\n "Vlan1000|Ethernet8": {\n "tagging_mode": "untagged"\n }\n}') + + def test_read_yaml(self): + argument = '-v yml_item -y ' + os.path.join(self.test_dir, 'test.yml') + output = self.run_script(argument) + self.assertEqual(output.strip(), '[\'value1\', \'value2\']') + + def test_render_template(self): + argument = '-y ' + os.path.join(self.test_dir, 'test.yml') + ' -t ' + os.path.join(self.test_dir, 'test.j2') + output = self.run_script(argument) + self.assertEqual(output.strip(), 'value1\nvalue2') + + # FIXME: This test depends heavily on the ordering of the interfaces and + # it is not at all intuitive what that ordering should be. Could make it + # more robust by adding better parsing logic. + def test_minigraph_acl(self): + argument = '-m "' + self.sample_graph_t0 + '" -p "' + self.port_config + '" -v ACL_TABLE' + output = self.run_script(argument, True) + self.assertEqual(output.strip(), "Warning: Ignoring Control Plane ACL NTP_ACL without type\n" + "Warning: ignore interface 'fortyGigE0/2' as it is not in the port_config.ini\n" + "Warning: ignore interface 'fortyGigE0/2' in DEVICE_NEIGHBOR as it is not in the port_config.ini\n" + "{'DATAACL': {'type': 'L3', 'policy_desc': 'DATAACL', 'ports': ['PortChannel01', 'PortChannel02', 'PortChannel03', 'PortChannel04']}, " + "'NTP_ACL': {'services': ['NTP'], 'type': 'CTRLPLANE', 'policy_desc': 'NTP_ACL'}, " + "'EVERFLOW': {'type': 'MIRROR', 'policy_desc': 'EVERFLOW', 'ports': ['PortChannel01', 'PortChannel02', 'PortChannel03', 'PortChannel04', 'Ethernet4']}, " + "'ROUTER_PROTECT': {'services': ['SSH', 'SNMP'], 'type': 'CTRLPLANE', 'policy_desc': 'ROUTER_PROTECT'}, " + "'SNMP_ACL': {'services': ['SNMP'], 'type': 'CTRLPLANE', 'policy_desc': 'SNMP_ACL'}, " + "'SSH_ACL': {'services': ['SSH'], 'type': 'CTRLPLANE', 'policy_desc': 'SSH_ACL'}, " + "'EVERFLOWV6': {'type': 'MIRRORV6', 'policy_desc': 'EVERFLOWV6', 'ports': ['PortChannel01', 'PortChannel02', 'PortChannel03', 'PortChannel04', 'Ethernet4']}}") + +# everflow portion is not used +# def test_minigraph_everflow(self): +# argument = '-m "' + self.sample_graph_t0 + '" -p "' + self.port_config + '" -v MIRROR_SESSION' +# output = self.run_script(argument) +# self.assertEqual(output.strip(), "{'everflow0': {'src_ip': '10.1.0.32', 'dst_ip': '2.2.2.2'}}") + + def test_minigraph_mgmt_ports(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v MGMT_PORT' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'eth0': {'alias': 'Management0', 'admin_status': 'up'}}") + + def test_minigraph_interfaces(self): + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "INTERFACE.keys()"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "[('Ethernet0', '10.0.0.58/31'), 'Ethernet0', ('Ethernet0', 'FC00::75/126')]") + + def test_minigraph_vlans(self): + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v VLAN' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'Vlan1000': {'alias': 'ab1', 'dhcp_servers': ['192.0.0.1', '192.0.0.2'], 'vlanid': '1000'}}") + + def test_minigraph_vlan_members(self): + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v VLAN_MEMBER' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{('Vlan1000', 'Ethernet8'): {'tagging_mode': 'untagged'}}") + + def test_minigraph_vlan_interfaces(self): + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "VLAN_INTERFACE.keys()"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "[('Vlan1000', '192.168.0.1/27'), 'Vlan1000']") + + def test_minigraph_portchannels(self): + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v PORTCHANNEL' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'PortChannel01': {'admin_status': 'up', 'min_links': '1', 'members': ['Ethernet4'], 'mtu': '9100'}}") + + def test_minigraph_portchannel_with_more_member(self): + argument = '-m "' + self.sample_graph_pc_test + '" -p "' + self.port_config + '" -v PORTCHANNEL' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'PortChannel01': {'admin_status': 'up', 'min_links': '3', 'members': ['Ethernet112', 'Ethernet116', 'Ethernet120', 'Ethernet124'], 'mtu': '9100'}}") + + def test_minigraph_portchannel_members(self): + argument = '-m "' + self.sample_graph_pc_test + '" -p "' + self.port_config + '" -v "PORTCHANNEL_MEMBER.keys()"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "[('PortChannel01', 'Ethernet120'), ('PortChannel01', 'Ethernet116'), ('PortChannel01', 'Ethernet124'), ('PortChannel01', 'Ethernet112')]") + + def test_minigraph_portchannel_interfaces(self): + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "PORTCHANNEL_INTERFACE.keys()"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "['PortChannel01', ('PortChannel01', '10.0.0.56/31'), ('PortChannel01', 'FC00::71/126')]") + + def test_minigraph_neighbors(self): + argument = '-m "' + self.sample_graph_t0 + '" -p "' + self.port_config + '" -v "DEVICE_NEIGHBOR[\'Ethernet124\']"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'name': 'ARISTA04T1', 'port': 'Ethernet1/1'}") + + # FIXME: This test depends heavily on the ordering of the interfaces and + # it is not at all intuitive what that ordering should be. Could make it + # more robust by adding better parsing logic. + def test_minigraph_extra_neighbors(self): + argument = '-m "' + self.sample_graph_t0 + '" -p "' + self.port_config + '" -v DEVICE_NEIGHBOR' + output = self.run_script(argument) + self.assertEqual(output.strip(), \ + "{'Ethernet116': {'name': 'ARISTA02T1', 'port': 'Ethernet1/1'}, " + "'Ethernet124': {'name': 'ARISTA04T1', 'port': 'Ethernet1/1'}, " + "'Ethernet112': {'name': 'ARISTA01T1', 'port': 'Ethernet1/1'}, " + "'Ethernet4': {'name': 'Servers0', 'port': 'eth0'}, " + "'Ethernet120': {'name': 'ARISTA03T1', 'port': 'Ethernet1/1'}}") + + def test_minigraph_port_description(self): + argument = '-m "' + self.sample_graph_t0 + '" -p "' + self.port_config + '" -v "PORT[\'Ethernet124\']"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'lanes': '101,102,103,104', 'description': 'ARISTA04T1:Ethernet1/1', 'pfc_asym': 'off', 'mtu': '9100', 'alias': 'fortyGigE0/124', 'admin_status': 'up'}") + + def test_minigraph_bgp(self): + argument = '-m "' + self.sample_graph_bgp_speaker + '" -p "' + self.port_config + '" -v "BGP_NEIGHBOR[\'10.0.0.59\']"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'rrclient': 0, 'name': 'ARISTA02T1', 'local_addr': '10.0.0.58', 'nhopself': 0, 'holdtime': '180', 'asn': '64600', 'keepalive': '60'}") + + def test_minigraph_peers_with_range(self): + argument = '-m "' + self.sample_graph_bgp_speaker + '" -p "' + self.port_config + '" -v BGP_PEER_RANGE.values\(\)' + output = self.run_script(argument) + self.assertEqual(output.strip(), "[{'src_address': '10.1.0.32', 'name': 'BGPSLBPassive', 'ip_range': ['10.10.10.10/26', '100.100.100.100/26']}]") + + def test_minigraph_deployment_id(self): + argument = '-m "' + self.sample_graph_bgp_speaker + '" -p "' + self.port_config + '" -v "DEVICE_METADATA[\'localhost\'][\'deployment_id\']"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "1") + + def test_minigraph_ethernet_interfaces(self): + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "PORT[\'Ethernet8\']"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'lanes': '37,38,39,40', 'description': 'Interface description', 'pfc_asym': 'off', 'mtu': '9100', 'alias': 'fortyGigE0/8', 'admin_status': 'up', 'speed': '1000'}") + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "PORT[\'Ethernet12\']"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'lanes': '33,34,35,36', 'fec': 'rs', 'mtu': '9100', 'alias': 'fortyGigE0/12', 'pfc_asym': 'off', 'speed': '100000', 'description': 'Interface description'}") + + def test_minigraph_extra_ethernet_interfaces(self): + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "PORT"' + output = self.run_script(argument) + + self.assertEqual(output.strip(), \ + "{'Ethernet8': {'lanes': '37,38,39,40', 'description': 'Interface description', 'pfc_asym': 'off', 'mtu': '9100', 'alias': 'fortyGigE0/8', 'admin_status': 'up', 'speed': '1000'}, " + "'Ethernet0': {'lanes': '29,30,31,32', 'description': 'fortyGigE0/0', 'pfc_asym': 'off', 'mtu': '9100', 'alias': 'fortyGigE0/0', 'admin_status': 'up', 'speed': '10000'}, " + "'Ethernet4': {'lanes': '25,26,27,28', 'description': 'fortyGigE0/4', 'pfc_asym': 'off', 'mtu': '9100', 'alias': 'fortyGigE0/4', 'admin_status': 'up', 'speed': '25000'}, " + "'Ethernet108': {'alias': 'fortyGigE0/108', 'pfc_asym': 'off', 'lanes': '81,82,83,84', 'description': 'fortyGigE0/108', 'mtu': '9100'}, " + "'Ethernet100': {'alias': 'fortyGigE0/100', 'pfc_asym': 'off', 'lanes': '125,126,127,128', 'description': 'fortyGigE0/100', 'mtu': '9100'}, " + "'Ethernet104': {'alias': 'fortyGigE0/104', 'pfc_asym': 'off', 'lanes': '85,86,87,88', 'description': 'fortyGigE0/104', 'mtu': '9100'}, " + "'Ethernet68': {'alias': 'fortyGigE0/68', 'pfc_asym': 'off', 'lanes': '69,70,71,72', 'description': 'fortyGigE0/68', 'mtu': '9100'}, " + "'Ethernet96': {'alias': 'fortyGigE0/96', 'pfc_asym': 'off', 'lanes': '121,122,123,124', 'description': 'fortyGigE0/96', 'mtu': '9100'}, " + "'Ethernet124': {'alias': 'fortyGigE0/124', 'pfc_asym': 'off', 'lanes': '101,102,103,104', 'description': 'fortyGigE0/124', 'mtu': '9100'}, " + "'Ethernet92': {'alias': 'fortyGigE0/92', 'pfc_asym': 'off', 'lanes': '113,114,115,116', 'description': 'fortyGigE0/92', 'mtu': '9100'}, " + "'Ethernet120': {'alias': 'fortyGigE0/120', 'pfc_asym': 'off', 'lanes': '97,98,99,100', 'description': 'fortyGigE0/120', 'mtu': '9100'}, " + "'Ethernet52': {'alias': 'fortyGigE0/52', 'pfc_asym': 'off', 'lanes': '53,54,55,56', 'description': 'fortyGigE0/52', 'mtu': '9100'}, " + "'Ethernet56': {'alias': 'fortyGigE0/56', 'pfc_asym': 'off', 'lanes': '61,62,63,64', 'description': 'fortyGigE0/56', 'mtu': '9100'}, " + "'Ethernet76': {'alias': 'fortyGigE0/76', 'pfc_asym': 'off', 'lanes': '73,74,75,76', 'description': 'fortyGigE0/76', 'mtu': '9100'}, " + "'Ethernet72': {'alias': 'fortyGigE0/72', 'pfc_asym': 'off', 'lanes': '77,78,79,80', 'description': 'fortyGigE0/72', 'mtu': '9100'}, " + "'Ethernet64': {'alias': 'fortyGigE0/64', 'pfc_asym': 'off', 'lanes': '65,66,67,68', 'description': 'fortyGigE0/64', 'mtu': '9100'}, " + "'Ethernet32': {'alias': 'fortyGigE0/32', 'pfc_asym': 'off', 'lanes': '9,10,11,12', 'description': 'fortyGigE0/32', 'mtu': '9100'}, " + "'Ethernet16': {'alias': 'fortyGigE0/16', 'pfc_asym': 'off', 'lanes': '41,42,43,44', 'description': 'fortyGigE0/16', 'mtu': '9100'}, " + "'Ethernet36': {'alias': 'fortyGigE0/36', 'pfc_asym': 'off', 'lanes': '13,14,15,16', 'description': 'fortyGigE0/36', 'mtu': '9100'}, " + "'Ethernet12': {'lanes': '33,34,35,36', 'fec': 'rs', 'mtu': '9100', 'alias': 'fortyGigE0/12', 'pfc_asym': 'off', 'speed': '100000', 'description': 'Interface description'}, " + "'Ethernet88': {'alias': 'fortyGigE0/88', 'pfc_asym': 'off', 'lanes': '117,118,119,120', 'description': 'fortyGigE0/88', 'mtu': '9100'}, " + "'Ethernet116': {'alias': 'fortyGigE0/116', 'pfc_asym': 'off', 'lanes': '93,94,95,96', 'description': 'fortyGigE0/116', 'mtu': '9100'}, " + "'Ethernet80': {'alias': 'fortyGigE0/80', 'pfc_asym': 'off', 'lanes': '105,106,107,108', 'description': 'fortyGigE0/80', 'mtu': '9100'}, " + "'Ethernet112': {'alias': 'fortyGigE0/112', 'pfc_asym': 'off', 'lanes': '89,90,91,92', 'description': 'fortyGigE0/112', 'mtu': '9100'}, " + "'Ethernet84': {'alias': 'fortyGigE0/84', 'pfc_asym': 'off', 'lanes': '109,110,111,112', 'description': 'fortyGigE0/84', 'mtu': '9100'}, " + "'Ethernet48': {'alias': 'fortyGigE0/48', 'pfc_asym': 'off', 'lanes': '49,50,51,52', 'description': 'fortyGigE0/48', 'mtu': '9100'}, " + "'Ethernet44': {'alias': 'fortyGigE0/44', 'pfc_asym': 'off', 'lanes': '17,18,19,20', 'description': 'fortyGigE0/44', 'mtu': '9100'}, " + "'Ethernet40': {'alias': 'fortyGigE0/40', 'pfc_asym': 'off', 'lanes': '21,22,23,24', 'description': 'fortyGigE0/40', 'mtu': '9100'}, " + "'Ethernet28': {'alias': 'fortyGigE0/28', 'pfc_asym': 'off', 'lanes': '1,2,3,4', 'description': 'fortyGigE0/28', 'mtu': '9100'}, " + "'Ethernet60': {'alias': 'fortyGigE0/60', 'pfc_asym': 'off', 'lanes': '57,58,59,60', 'description': 'fortyGigE0/60', 'mtu': '9100'}, " + "'Ethernet20': {'alias': 'fortyGigE0/20', 'pfc_asym': 'off', 'lanes': '45,46,47,48', 'description': 'fortyGigE0/20', 'mtu': '9100'}, " + "'Ethernet24': {'alias': 'fortyGigE0/24', 'pfc_asym': 'off', 'lanes': '5,6,7,8', 'description': 'fortyGigE0/24', 'mtu': '9100'}}") + +# everflow portion is not used +# def test_metadata_everflow(self): +# argument = '-m "' + self.sample_graph_metadata + '" -p "' + self.port_config + '" -v "MIRROR_SESSION"' +# output = self.run_script(argument) +# self.assertEqual(output.strip(), "{'everflow0': {'src_ip': '10.1.0.32', 'dst_ip': '10.0.100.1'}}") + + def test_metadata_tacacs(self): + argument = '-m "' + self.sample_graph_metadata + '" -p "' + self.port_config + '" -v "TACPLUS_SERVER"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'10.0.10.7': {'priority': '1', 'tcp_port': '49'}, '10.0.10.8': {'priority': '1', 'tcp_port': '49'}}") + + def test_metadata_ntp(self): + argument = '-m "' + self.sample_graph_metadata + '" -p "' + self.port_config + '" -v "NTP_SERVER"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'10.0.10.1': {}, '10.0.10.2': {}}") + + def test_minigraph_vnet(self): + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "VNET"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "") + + def test_minigraph_vxlan(self): + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "VXLAN_TUNNEL"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "") + + def test_minigraph_bgp_mon(self): + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "BGP_MONITORS"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'10.20.30.40': {'rrclient': 0, 'name': 'BGPMonitor', 'local_addr': '10.1.0.32', 'nhopself': 0, 'holdtime': '10', 'asn': '0', 'keepalive': '3'}}") + + def test_minigraph_sub_port_interfaces(self, check_stderr=True): + try: + print '\n Change device type to %s' % (BACKEND_TOR_ROUTER) + if check_stderr: + output = subprocess.check_output("sed -i \'s/%s/%s/g\' %s" % (TOR_ROUTER, BACKEND_TOR_ROUTER, self.sample_graph_simple), stderr=subprocess.STDOUT, shell=True) + else: + output = subprocess.check_output("sed -i \'s/%s/%s/g\' %s" % (TOR_ROUTER, BACKEND_TOR_ROUTER, self.sample_graph_simple), shell=True) + + self.test_jinja_expression(self.sample_graph_simple, BACKEND_TOR_ROUTER) + + + # INTERFACE table does not exist + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "INTERFACE"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "") + + # PORTCHANNEL_INTERFACE table does not exist + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "PORTCHANNEL_INTERFACE"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "") + + # All the other tables stay unchanged + self.test_var_json_data() + self.test_minigraph_vlans() + self.test_minigraph_vlan_members() + self.test_minigraph_vlan_interfaces() + self.test_minigraph_portchannels() + self.test_minigraph_ethernet_interfaces() + self.test_minigraph_extra_ethernet_interfaces() + self.test_minigraph_vnet() + self.test_minigraph_vxlan() + + # VLAN_SUB_INTERFACE + argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v VLAN_SUB_INTERFACE' + output = self.run_script(argument) + print output.strip() + self.assertEqual(output.strip(), \ + "{('PortChannel01.10', '10.0.0.56/31'): {}, " + "'Ethernet0.10': {'admin_status': 'up'}, " + "('Ethernet0.10', '10.0.0.58/31'): {}, " + "('PortChannel01.10', 'FC00::71/126'): {}, " + "'PortChannel01.10': {'admin_status': 'up'}, " + "('Ethernet0.10', 'FC00::75/126'): {}}") + + finally: + print '\n Change device type back to %s' % (TOR_ROUTER) + if check_stderr: + output = subprocess.check_output("sed -i \'s/%s/%s/g\' %s" % (BACKEND_TOR_ROUTER, TOR_ROUTER, self.sample_graph_simple), stderr=subprocess.STDOUT, shell=True) + else: + output = subprocess.check_output("sed -i \'s/%s/%s/g\' %s" % (BACKEND_TOR_ROUTER, TOR_ROUTER, self.sample_graph_simple), shell=True) + + self.test_jinja_expression(self.sample_graph_simple, TOR_ROUTER) diff --git a/src/sonic-config-engine/tests/test_cfggen_t2_chassis_fe.py b/src/sonic-config-engine/tests/test_cfggen_t2_chassis_fe.py new file mode 100644 index 00000000000..f6de9212111 --- /dev/null +++ b/src/sonic-config-engine/tests/test_cfggen_t2_chassis_fe.py @@ -0,0 +1,72 @@ +from unittest import TestCase +import subprocess +import os + +class TestCfgGenT2ChassisFe(TestCase): + + def setUp(self): + self.test_dir = os.path.dirname(os.path.realpath(__file__)) + self.script_file = os.path.join(self.test_dir, '..', 'sonic-cfggen') + self.sample_graph_t2_chassis_fe = os.path.join(self.test_dir, 't2-chassis-fe-graph.xml') + self.sample_graph_t2_chassis_fe_vni = os.path.join(self.test_dir, 't2-chassis-fe-graph-vni.xml') + self.sample_graph_t2_chassis_fe_pc = os.path.join(self.test_dir, 't2-chassis-fe-graph-pc.xml') + self.t2_chassis_fe_port_config = os.path.join(self.test_dir, 't2-chassis-fe-port-config.ini') + + def run_script(self, argument, check_stderr=False): + print '\n Running sonic-cfggen ' + argument + if check_stderr: + output = subprocess.check_output(self.script_file + ' ' + argument, stderr=subprocess.STDOUT, shell=True) + else: + output = subprocess.check_output(self.script_file + ' ' + argument, shell=True) + + linecount = output.strip().count('\n') + if linecount <= 0: + print ' Output: ' + output.strip() + else: + print ' Output: ({0} lines, {1} bytes)'.format(linecount + 1, len(output)) + return output + + def test_minigraph_t2_chassis_fe_type(self): + argument = '-m "' + self.sample_graph_t2_chassis_fe + '" -p "' + self.t2_chassis_fe_port_config + '" -v "DEVICE_METADATA[\'localhost\'][\'type\']"' + output = self.run_script(argument) + self.assertEqual(output.strip(), 'SpineChassisFrontendRouter') + + def test_minigraph_t2_chassis_fe_interfaces(self): + argument = '-m "' + self.sample_graph_t2_chassis_fe + '" -p "' + self.t2_chassis_fe_port_config + '" -v "INTERFACE"' + output = self.run_script(argument) + self.assertEqual(output.strip(), + "{'Ethernet8': {}, " + "('Ethernet8', '172.16.0.9/30'): {}, " + "'Ethernet0': {'vnet_name': 'VnetFE'}, " + "('Ethernet4', '172.16.0.1/30'): {}, " + "('Ethernet0', '192.168.0.2/30'): {}, " + "'Ethernet4': {}}") + + def test_minigraph_t2_chassis_fe_pc_interfaces(self): + argument = '-m "' + self.sample_graph_t2_chassis_fe_pc + '" -p "' + self.t2_chassis_fe_port_config + '" -v "PORTCHANNEL_INTERFACE"' + output = self.run_script(argument) + self.assertEqual(output.strip(), + "{'PortChannel8': {}, " + "('PortChannel0', '192.168.0.2/30'): {}, " + "('PortChannel4', '172.16.0.1/30'): {}, " + "'PortChannel4': {}, " + "('PortChannel8', '172.16.0.9/30'): {}, " + "'PortChannel0': {'vnet_name': 'VnetFE'}}") + + # Test a minigraph file where VNI is not specified + # Default VNI is 8000 + def test_minigraph_t2_chassis_fe_vnet_default(self): + argument = '-m "' + self.sample_graph_t2_chassis_fe + '" -p "' + self.t2_chassis_fe_port_config + '" -v "VNET"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'VnetFE': {'vxlan_tunnel': 'TunnelInt', 'vni': 8000}}") + + # Test a minigraph file where VNI is specified + def test_minigraph_t2_chassis_fe_vnet(self): + argument = '-m "' + self.sample_graph_t2_chassis_fe_vni + '" -p "' + self.t2_chassis_fe_port_config + '" -v "VNET"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'VnetFE': {'vxlan_tunnel': 'TunnelInt', 'vni': 9000}}") + + def test_minigraph_t2_chassis_fe_vxlan(self): + argument = '-m "' + self.sample_graph_t2_chassis_fe + '" -p "' + self.t2_chassis_fe_port_config + '" -v "VXLAN_TUNNEL"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'TunnelInt': {'src_ip': '4.0.0.0'}}") diff --git a/src/sonic-config-engine/tests/test_frr.py b/src/sonic-config-engine/tests/test_frr.py new file mode 100644 index 00000000000..fcbff063b13 --- /dev/null +++ b/src/sonic-config-engine/tests/test_frr.py @@ -0,0 +1,62 @@ +from unittest import TestCase +import subprocess +import os +import filecmp + + +class TestCfgGen(TestCase): + def setUp(self): + self.test_dir = os.path.dirname(os.path.realpath(__file__)) + self.script_file = os.path.join(self.test_dir, '..', 'sonic-cfggen') + self.t0_minigraph = os.path.join(self.test_dir, 't0-sample-graph.xml') + self.t0_port_config = os.path.join(self.test_dir, 't0-sample-port-config.ini') + self.output_file = os.path.join(self.test_dir, 'output') + + def tearDown(self): + try: + os.remove(self.output_file) + except OSError: + pass + + + def run_script(self, argument, check_stderr=False): +# print '\n Running sonic-cfggen ' + argument + if check_stderr: + output = subprocess.check_output(self.script_file + ' ' + argument, stderr=subprocess.STDOUT, shell=True) + else: + output = subprocess.check_output(self.script_file + ' ' + argument, shell=True) + + linecount = output.strip().count('\n') + if linecount <= 0: + print ' Output: ' + output.strip() + else: + print ' Output: ({0} lines, {1} bytes)'.format(linecount + 1, len(output)) + return output + + def run_diff(self, file1, file2): + return subprocess.check_output('diff -u {} {} || true'.format(file1, file2), shell=True) + + def run_case(self, template, target): + conf_template = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-fpm-frr', template) + cmd = '-m ' + self.t0_minigraph + ' -p ' + self.t0_port_config + ' -t ' + conf_template + ' > ' + self.output_file + self.run_script(cmd) + + original_filename = os.path.join(self.test_dir, 'sample_output', target) + r = filecmp.cmp(original_filename, self.output_file) + diff_output = self.run_diff(original_filename, self.output_file) if not r else "" + + return r, "Diff:\n" + diff_output + + + def test_config_frr(self): + self.assertTrue(*self.run_case('frr.conf.j2', 'frr.conf')) + + def test_bgpd_frr(self): + self.assertTrue(*self.run_case('bgpd.conf.j2', 'bgpd_frr.conf')) + + def test_zebra_frr(self): + self.assertTrue(*self.run_case('zebra.conf.j2', 'zebra_frr.conf')) + + def test_staticd_frr(self): + self.assertTrue(*self.run_case('staticd.conf.j2', 'staticd_frr.conf')) + diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py new file mode 100644 index 00000000000..c3585a41d44 --- /dev/null +++ b/src/sonic-config-engine/tests/test_j2files.py @@ -0,0 +1,138 @@ +import filecmp +import os +import subprocess +import json +import shutil + +from unittest import TestCase + +class TestJ2Files(TestCase): + def setUp(self): + self.test_dir = os.path.dirname(os.path.realpath(__file__)) + self.script_file = os.path.join(self.test_dir, '..', 'sonic-cfggen') + self.simple_minigraph = os.path.join(self.test_dir, 'simple-sample-graph.xml') + self.t0_minigraph = os.path.join(self.test_dir, 't0-sample-graph.xml') + self.t0_mvrf_minigraph = os.path.join(self.test_dir, 't0-sample-graph-mvrf.xml') + self.pc_minigraph = os.path.join(self.test_dir, 'pc-test-graph.xml') + self.t0_port_config = os.path.join(self.test_dir, 't0-sample-port-config.ini') + self.t1_mlnx_minigraph = os.path.join(self.test_dir, 't1-sample-graph-mlnx.xml') + self.mlnx_port_config = os.path.join(self.test_dir, 'sample-port-config-mlnx.ini') + self.dell6100_t0_minigraph = os.path.join(self.test_dir, 'sample-dell-6100-t0-minigraph.xml') + self.output_file = os.path.join(self.test_dir, 'output') + + def run_script(self, argument): + print 'CMD: sonic-cfggen ' + argument + return subprocess.check_output(self.script_file + ' ' + argument, shell=True) + + def run_diff(self, file1, file2): + return subprocess.check_output('diff -u {} {} || true'.format(file1, file2), shell=True) + + def test_interfaces(self): + interfaces_template = os.path.join(self.test_dir, '..', '..', '..', 'files', 'image_config', 'interfaces', 'interfaces.j2') + argument = '-m ' + self.t0_minigraph + ' -a \'{\"hwaddr\":\"e4:1d:2d:a5:f3:ad\"}\' -t ' + interfaces_template + ' > ' + self.output_file + self.run_script(argument) + self.assertTrue(filecmp.cmp(os.path.join(self.test_dir, 'sample_output', 'interfaces'), self.output_file)) + + argument = '-m ' + self.t0_mvrf_minigraph + ' -a \'{\"hwaddr\":\"e4:1d:2d:a5:f3:ad\"}\' -t ' + interfaces_template + ' > ' + self.output_file + self.run_script(argument) + self.assertTrue(filecmp.cmp(os.path.join(self.test_dir, 'sample_output', 'mvrf_interfaces'), self.output_file)) + + def test_ports_json(self): + ports_template = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent', 'ports.json.j2') + argument = '-m ' + self.simple_minigraph + ' -p ' + self.t0_port_config + ' -t ' + ports_template + ' > ' + self.output_file + self.run_script(argument) + self.assertTrue(filecmp.cmp(os.path.join(self.test_dir, 'sample_output', 'ports.json'), self.output_file)) + + def test_dhcp_relay(self): + # Test generation of wait_for_intf.sh + template_path = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-dhcp-relay', 'wait_for_intf.sh.j2') + argument = '-m ' + self.t0_minigraph + ' -p ' + self.t0_port_config + ' -t ' + template_path + ' > ' + self.output_file + self.run_script(argument) + self.assertTrue(filecmp.cmp(os.path.join(self.test_dir, 'sample_output', 'wait_for_intf.sh'), self.output_file)) + + # Test generation of docker-dhcp-relay.supervisord.conf + template_path = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-dhcp-relay', 'docker-dhcp-relay.supervisord.conf.j2') + argument = '-m ' + self.t0_minigraph + ' -p ' + self.t0_port_config + ' -t ' + template_path + ' > ' + self.output_file + self.run_script(argument) + self.assertTrue(filecmp.cmp(os.path.join(self.test_dir, 'sample_output', 'docker-dhcp-relay.supervisord.conf'), self.output_file)) + + def test_lldp(self): + lldpd_conf_template = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-lldp-sv2', 'lldpd.conf.j2') + argument = '-m ' + self.t0_minigraph + ' -p ' + self.t0_port_config + ' -t ' + lldpd_conf_template + ' > ' + self.output_file + self.run_script(argument) + self.assertTrue(filecmp.cmp(os.path.join(self.test_dir, 'sample_output', 'lldpd.conf'), self.output_file)) + + def test_bgpd_quagga(self): + conf_template = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-fpm-quagga', 'bgpd.conf.j2') + argument = '-m ' + self.t0_minigraph + ' -p ' + self.t0_port_config + ' -t ' + conf_template + ' > ' + self.output_file + self.run_script(argument) + original_filename = os.path.join(self.test_dir, 'sample_output', 'bgpd_quagga.conf') + r = filecmp.cmp(original_filename, self.output_file) + diff_output = self.run_diff(original_filename, self.output_file) if not r else "" + self.assertTrue(r, "Diff:\n" + diff_output) + + def test_zebra_quagga(self): + conf_template = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-fpm-quagga', 'zebra.conf.j2') + argument = '-m ' + self.t0_minigraph + ' -p ' + self.t0_port_config + ' -t ' + conf_template + ' > ' + self.output_file + self.run_script(argument) + self.assertTrue(filecmp.cmp(os.path.join(self.test_dir, 'sample_output', 'zebra_quagga.conf'), self.output_file)) + + def test_ipinip(self): + ipinip_file = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent', 'ipinip.json.j2') + argument = '-m ' + self.t0_minigraph + ' -p ' + self.t0_port_config + ' -t ' + ipinip_file + ' > ' + self.output_file + self.run_script(argument) + + sample_output_file = os.path.join(self.test_dir, 'sample_output', 'ipinip.json') + assert filecmp.cmp(sample_output_file, self.output_file) + + def test_l2switch_template(self): + argument = '-k Mellanox-SN2700 -t ' + os.path.join(self.test_dir, '../data/l2switch.j2') + ' -p ' + self.t0_port_config + ' > ' + self.output_file + self.run_script(argument) + + sample_output_file = os.path.join(self.test_dir, 'sample_output', 'l2switch.json') + + self.assertTrue(filecmp.cmp(sample_output_file, self.output_file)) + + def test_qos_dell6100_render_template(self): + dell_dir_path = os.path.join(self.test_dir, '..', '..', '..', 'device', 'dell', 'x86_64-dell_s6100_c2538-r0', 'Force10-S6100') + qos_file = os.path.join(dell_dir_path, 'qos.json.j2') + port_config_ini_file = os.path.join(dell_dir_path, 'port_config.ini') + + # copy qos_config.j2 to the Dell S6100 directory to have all templates in one directory + qos_config_file = os.path.join(self.test_dir, '..', '..', '..', 'files', 'build_templates', 'qos_config.j2') + shutil.copy2(qos_config_file, dell_dir_path) + + argument = '-m ' + self.dell6100_t0_minigraph + ' -p ' + port_config_ini_file + ' -t ' + qos_file + ' > ' + self.output_file + self.run_script(argument) + + # cleanup + qos_config_file_new = os.path.join(dell_dir_path, 'qos_config.j2') + os.remove(qos_config_file_new) + + sample_output_file = os.path.join(self.test_dir, 'sample_output', 'qos-dell6100.json') + assert filecmp.cmp(sample_output_file, self.output_file) + + def test_buffers_dell6100_render_template(self): + dell_dir_path = os.path.join(self.test_dir, '..', '..', '..', 'device', 'dell', 'x86_64-dell_s6100_c2538-r0', 'Force10-S6100') + buffers_file = os.path.join(dell_dir_path, 'buffers.json.j2') + port_config_ini_file = os.path.join(dell_dir_path, 'port_config.ini') + + # copy buffers_config.j2 to the Dell S6100 directory to have all templates in one directory + buffers_config_file = os.path.join(self.test_dir, '..', '..', '..', 'files', 'build_templates', 'buffers_config.j2') + shutil.copy2(buffers_config_file, dell_dir_path) + + argument = '-m ' + self.dell6100_t0_minigraph + ' -p ' + port_config_ini_file + ' -t ' + buffers_file + ' > ' + self.output_file + self.run_script(argument) + + # cleanup + buffers_config_file_new = os.path.join(dell_dir_path, 'buffers_config.j2') + os.remove(buffers_config_file_new) + + sample_output_file = os.path.join(self.test_dir, 'sample_output', 'buffers-dell6100.json') + assert filecmp.cmp(sample_output_file, self.output_file) + + def tearDown(self): + try: + os.remove(self.output_file) + except OSError: + pass diff --git a/src/sonic-config-engine/tests/test_j2files_t2_chassis_fe.py b/src/sonic-config-engine/tests/test_j2files_t2_chassis_fe.py new file mode 100644 index 00000000000..41ac347e2b1 --- /dev/null +++ b/src/sonic-config-engine/tests/test_j2files_t2_chassis_fe.py @@ -0,0 +1,54 @@ +import filecmp +import os +import subprocess +import json +import shutil + +from unittest import TestCase + +class TestJ2FilesT2ChassisFe(TestCase): + def setUp(self): + self.test_dir = os.path.dirname(os.path.realpath(__file__)) + self.script_file = os.path.join(self.test_dir, '..', 'sonic-cfggen') + self.t2_chassis_fe_minigraph = os.path.join(self.test_dir, 't2-chassis-fe-graph.xml') + self.t2_chassis_fe_vni_minigraph = os.path.join(self.test_dir, 't2-chassis-fe-graph-vni.xml') + self.t2_chassis_fe_pc_minigraph = os.path.join(self.test_dir, 't2-chassis-fe-graph-pc.xml') + self.t2_chassis_fe_port_config = os.path.join(self.test_dir, 't2-chassis-fe-port-config.ini') + self.output_file = os.path.join(self.test_dir, 'output') + + def tearDown(self): + try: + os.remove(self.output_file) + except OSError: + pass + + def run_script(self, argument): + print 'CMD: sonic-cfggen ' + argument + return subprocess.check_output(self.script_file + ' ' + argument, shell=True) + + def run_diff(self, file1, file2): + return subprocess.check_output('diff -u {} {} || true'.format(file1, file2), shell=True) + + def run_case(self, minigraph, template, target): + conf_template = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-fpm-frr', template) + cmd = '-m ' + minigraph + ' -p ' + self.t2_chassis_fe_port_config + ' -t ' + conf_template + ' > ' + self.output_file + self.run_script(cmd) + + original_filename = os.path.join(self.test_dir, 'sample_output', target) + r = filecmp.cmp(original_filename, self.output_file) + diff_output = self.run_diff(original_filename, self.output_file) if not r else "" + + return r, "Diff:\n" + diff_output + + # Test zebra.conf in FRR docker for a T2 chassis frontend (fe) + def test_t2_chassis_fe_zebra_frr(self): + self.assertTrue(*self.run_case(self.t2_chassis_fe_minigraph, 'zebra.conf.j2', 't2-chassis-fe-zebra.conf')) + + # Test zebra.conf in FRR docker for a T2 chassis frontend (fe) switch with specified VNI + def test_t2_chassis_fe_vni_zebra_frr(self): + self.assertTrue(*self.run_case(self.t2_chassis_fe_vni_minigraph, 'zebra.conf.j2', 't2-chassis-fe-vni-zebra.conf')) + + # Test bgpd.conf in FRR docker for a T2 chassis frontend (fe) + def test_t2_chassis_frontend_bgpd_frr(self): + self.assertTrue(*self.run_case(self.t2_chassis_fe_minigraph, 'bgpd.conf.j2', 't2-chassis-fe-bgpd.conf')) + diff --git a/src/sonic-config-engine/tests/test_minigraph_case.py b/src/sonic-config-engine/tests/test_minigraph_case.py new file mode 100644 index 00000000000..b77f0859584 --- /dev/null +++ b/src/sonic-config-engine/tests/test_minigraph_case.py @@ -0,0 +1,143 @@ +from unittest import TestCase +import subprocess +import os + +class TestCfgGenCaseInsensitive(TestCase): + + def setUp(self): + self.test_dir = os.path.dirname(os.path.realpath(__file__)) + self.script_file = os.path.join(self.test_dir, '..', 'sonic-cfggen') + self.sample_graph = os.path.join(self.test_dir, 'simple-sample-graph-case.xml') + self.port_config = os.path.join(self.test_dir, 't0-sample-port-config.ini') + + def run_script(self, argument, check_stderr=False): + print '\n Running sonic-cfggen ' + argument + if check_stderr: + output = subprocess.check_output(self.script_file + ' ' + argument, stderr=subprocess.STDOUT, shell=True) + else: + output = subprocess.check_output(self.script_file + ' ' + argument, shell=True) + + linecount = output.strip().count('\n') + if linecount <= 0: + print ' Output: ' + output.strip() + else: + print ' Output: ({0} lines, {1} bytes)'.format(linecount + 1, len(output)) + return output + + def test_dummy_run(self): + argument = '' + output = self.run_script(argument) + self.assertEqual(output, '') + + def test_minigraph_sku(self): + argument = '-v "DEVICE_METADATA[\'localhost\'][\'hwsku\']" -m "' + self.sample_graph + '"' + output = self.run_script(argument) + self.assertEqual(output.strip(), 'Force10-S6000') + + def test_print_data(self): + argument = '-m "' + self.sample_graph + '" --print-data' + output = self.run_script(argument) + self.assertTrue(len(output.strip()) > 0) + + def test_jinja_expression(self): + argument = '-m "' + self.sample_graph + '" -v "DEVICE_METADATA[\'localhost\'][\'type\']"' + output = self.run_script(argument) + self.assertEqual(output.strip(), 'ToRRouter') + + def test_additional_json_data(self): + argument = '-a \'{"key1":"value1"}\' -v key1' + output = self.run_script(argument) + self.assertEqual(output.strip(), 'value1') + + def test_read_yaml(self): + argument = '-v yml_item -y ' + os.path.join(self.test_dir, 'test.yml') + output = self.run_script(argument) + self.assertEqual(output.strip(), '[\'value1\', \'value2\']') + + def test_render_template(self): + argument = '-y ' + os.path.join(self.test_dir, 'test.yml') + ' -t ' + os.path.join(self.test_dir, 'test.j2') + output = self.run_script(argument) + self.assertEqual(output.strip(), 'value1\nvalue2') + +# everflow portion is not used +# def test_minigraph_everflow(self): +# argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v MIRROR_SESSION' +# output = self.run_script(argument) +# self.assertEqual(output.strip(), "{'everflow0': {'src_ip': '10.1.0.32', 'dst_ip': '10.0.100.1'}}") + + def test_minigraph_interfaces(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v \'INTERFACE.keys()\'' + output = self.run_script(argument) + self.assertEqual(output.strip(), "[('Ethernet0', '10.0.0.58/31'), 'Ethernet0', ('Ethernet0', 'FC00::75/126')]") + + def test_minigraph_vlans(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v VLAN' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'Vlan1000': {'alias': 'ab1', 'dhcp_servers': ['192.0.0.1', '192.0.0.2'], 'vlanid': '1000'}}") + + def test_minigraph_vlan_members(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v VLAN_MEMBER' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{('Vlan1000', 'Ethernet8'): {'tagging_mode': 'untagged'}}") + + def test_minigraph_vlan_interfaces(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v "VLAN_INTERFACE.keys()"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "[('Vlan1000', '192.168.0.1/27'), 'Vlan1000']") + + def test_minigraph_portchannels(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v PORTCHANNEL' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'PortChannel01': {'admin_status': 'up', 'min_links': '1', 'members': ['Ethernet4'], 'mtu': '9100'}}") + + def test_minigraph_console_port(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v CONSOLE_PORT' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'1': {'baud_rate': '9600', 'remote_device': 'managed_device', 'flow_control': 1}}") + + def test_minigraph_deployment_id(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v "DEVICE_METADATA[\'localhost\'][\'deployment_id\']"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "1") + + def test_minigraph_neighbor_metadata(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v "DEVICE_NEIGHBOR_METADATA"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'switch-01t1': {'lo_addr': '10.1.0.186/32', 'mgmt_addr': '10.7.0.196/26', 'hwsku': 'Force10-S6000', 'type': 'LeafRouter', 'deployment_id': '2'}}") + +# everflow portion is not used +# def test_metadata_everflow(self): +# argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v "MIRROR_SESSION"' +# output = self.run_script(argument) +# self.assertEqual(output.strip(), "{'everflow0': {'src_ip': '10.1.0.32', 'dst_ip': '10.0.100.1'}}") + + def test_metadata_tacacs(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v "TACPLUS_SERVER"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'10.0.10.7': {'priority': '1', 'tcp_port': '49'}, '10.0.10.8': {'priority': '1', 'tcp_port': '49'}}") + + def test_minigraph_mgmt_port(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v "MGMT_PORT"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'eth0': {'alias': 'eth0', 'admin_status': 'up', 'speed': '1000'}}") + + def test_metadata_ntp(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v "NTP_SERVER"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{'10.0.10.1': {}, '10.0.10.2': {}}") + + def test_minigraph_vnet(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v "VNET"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "") + + def test_minigraph_vxlan(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v "VXLAN_TUNNEL"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "") + + def test_minigraph_bgp_mon(self): + argument = '-m "' + self.sample_graph + '" -p "' + self.port_config + '" -v "BGP_MONITORS"' + output = self.run_script(argument) + self.assertEqual(output.strip(), "{}") + diff --git a/src/sonic-daemon-base/setup.py b/src/sonic-daemon-base/setup.py new file mode 100644 index 00000000000..397af04b87d --- /dev/null +++ b/src/sonic-daemon-base/setup.py @@ -0,0 +1,30 @@ +from setuptools import setup + +setup( + name='sonic-daemon-base', + version='1.0', + description='Sonic daemon base package', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-platform-daemons', + maintainer='Kevin Wang', + maintainer_email='kevinw@mellanox.com', + packages=[ + 'sonic_daemon_base', + ], + classifiers=[ + 'Development Status :: 4 - Beta', + 'Environment :: No Input/Output (Daemon)', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 2.7', + 'Topic :: System :: Hardware', + ], + keywords='SONiC sonic PLATFORM platform DAEMON daemon', +) + diff --git a/src/sonic-daemon-base/sonic_daemon_base/__init__.py b/src/sonic-daemon-base/sonic_daemon_base/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/src/sonic-daemon-base/sonic_daemon_base/daemon_base.py b/src/sonic-daemon-base/sonic_daemon_base/daemon_base.py new file mode 100644 index 00000000000..a0a5bff0a29 --- /dev/null +++ b/src/sonic-daemon-base/sonic_daemon_base/daemon_base.py @@ -0,0 +1,191 @@ +#!/usr/bin/env python2 + +try: + import imp + import signal + import subprocess + import os + import sys + import syslog +except ImportError, e: + raise ImportError (str(e) + " - required module not found") + +# +# Constants ==================================================================== +# + +# Redis DB information +REDIS_HOSTNAME = 'localhost' +REDIS_PORT = 6379 +REDIS_TIMEOUT_MSECS = 0 + +# Platform root directory inside docker +PLATFORM_ROOT_DOCKER = '/usr/share/sonic/platform' +SONIC_CFGGEN_PATH = '/usr/local/bin/sonic-cfggen' +HWSKU_KEY = 'DEVICE_METADATA.localhost.hwsku' +PLATFORM_KEY = 'DEVICE_METADATA.localhost.platform' + +# Port config information +PORT_CONFIG = 'port_config.ini' +PORTMAP = 'portmap.ini' + +EEPROM_MODULE_NAME = 'eeprom' +EEPROM_CLASS_NAME = 'board' + +# +# Helper functions ============================================================= +# + +def db_connect(db): + from swsscommon import swsscommon + return swsscommon.DBConnector(db, + REDIS_HOSTNAME, + REDIS_PORT, + REDIS_TIMEOUT_MSECS) + +# +# Helper classes =============================================================== +# + +class Logger(object): + def __init__(self, syslog_identifier = None): + self.syslog = syslog + if syslog_identifier is None: + self.syslog.openlog() + else: + self.syslog.openlog(ident=syslog_identifier, logoption=self.syslog.LOG_NDELAY, facility=self.syslog.LOG_DAEMON) + + def __del__(self): + self.syslog.closelog() + + def log_error(self, msg, also_print_to_console=False): + self.syslog.syslog(self.syslog.LOG_ERR, msg) + + if also_print_to_console: + print msg + + def log_warning(self, msg, also_print_to_console=False): + self.syslog.syslog(self.syslog.LOG_WARNING, msg) + + if also_print_to_console: + print msg + + def log_notice(self, msg, also_print_to_console=False): + self.syslog.syslog(self.syslog.LOG_NOTICE, msg) + + if also_print_to_console: + print msg + + def log_info(self, msg, also_print_to_console=False): + self.syslog.syslog(self.syslog.LOG_INFO, msg) + + if also_print_to_console: + print msg + + def log_debug(self, msg, also_print_to_console=False): + self.syslog.syslog(self.syslog.LOG_DEBUG, msg) + + if also_print_to_console: + print msg + +# +# Daemon ======================================================================= +# + +class DaemonBase(object): + def __init__(self): + # Register our signal handlers + signal.signal(signal.SIGHUP, self.signal_handler) + signal.signal(signal.SIGINT, self.signal_handler) + signal.signal(signal.SIGTERM, self.signal_handler) + + # Signal handler + def signal_handler(self, sig, frame): + if sig == signal.SIGHUP: + self.syslog.syslog(self.syslog.LOG_INFO, "Caught SIGHUP - ignoring...") + elif sig == signal.SIGINT: + self.syslog.syslog(self.syslog.LOG_INFO, "Caught SIGINT - exiting...") + sys.exit(128 + sig) + elif sig == signal.SIGTERM: + self.syslog.syslog(self.syslog.LOG_INFO, "Caught SIGTERM - exiting...") + sys.exit(128 + sig) + else: + self.syslog.syslog(self.syslog.LOG_WARNING, "Caught unhandled signal '" + sig + "'") + + # Returns platform and hwsku + def get_platform_and_hwsku(self): + try: + proc = subprocess.Popen([SONIC_CFGGEN_PATH, '-H', '-v', PLATFORM_KEY], + stdout=subprocess.PIPE, + shell=False, + stderr=subprocess.STDOUT) + stdout = proc.communicate()[0] + proc.wait() + platform = stdout.rstrip('\n') + + proc = subprocess.Popen([SONIC_CFGGEN_PATH, '-d', '-v', HWSKU_KEY], + stdout=subprocess.PIPE, + shell=False, + stderr=subprocess.STDOUT) + stdout = proc.communicate()[0] + proc.wait() + hwsku = stdout.rstrip('\n') + except OSError, e: + raise OSError("Failed to detect platform: %s" % (str(e))) + + return (platform, hwsku) + + # Returns path to platform and hwsku + def get_path_to_platform_and_hwsku(self): + # Get platform and hwsku + (platform, hwsku) = self.get_platform_and_hwsku() + + # Load platform module from source + platform_path = PLATFORM_ROOT_DOCKER + hwsku_path = "/".join([platform_path, hwsku]) + + return (platform_path, hwsku_path) + + # Returns path to port config file + def get_path_to_port_config_file(self): + # Get platform and hwsku path + (platform_path, hwsku_path) = self.get_path_to_platform_and_hwsku() + + # First check for the presence of the new 'port_config.ini' file + port_config_file_path = "/".join([hwsku_path, PORT_CONFIG]) + if not os.path.isfile(port_config_file_path): + # port_config.ini doesn't exist. Try loading the legacy 'portmap.ini' file + port_config_file_path = "/".join([hwsku_path, PORTMAP]) + if not os.path.isfile(port_config_file_path): + raise IOError("Failed to detect port config file: %s" % (port_config_file_path)) + + return port_config_file_path + + # Loads platform specific psuutil module from source + def load_platform_util(self, module_name, class_name): + platform_util = None + + # Get path to platform and hwsku + (platform_path, hwsku_path) = self.get_path_to_platform_and_hwsku() + + try: + module_file = "/".join([platform_path, "plugins", module_name + ".py"]) + module = imp.load_source(module_name, module_file) + except IOError, e: + raise IOError("Failed to load platform module '%s': %s" % (module_name, str(e))) + + try: + platform_util_class = getattr(module, class_name) + # board class of eeprom requires 4 paramerters, need special treatment here. + if module_name == EEPROM_MODULE_NAME and class_name == EEPROM_CLASS_NAME: + platform_util = platform_util_class('','','','') + else: + platform_util = platform_util_class() + except AttributeError, e: + raise AttributeError("Failed to instantiate '%s' class: %s" % (class_name, str(e))) + + return platform_util + + # Runs daemon + def run(self): + raise NotImplementedError() diff --git a/src/sonic-dbsyncd b/src/sonic-dbsyncd new file mode 160000 index 00000000000..ffb3bad2f35 --- /dev/null +++ b/src/sonic-dbsyncd @@ -0,0 +1 @@ +Subproject commit ffb3bad2f355c28be201d5f27ac4564c46047593 diff --git a/src/sonic-device-data/LICENSE b/src/sonic-device-data/LICENSE new file mode 100644 index 00000000000..2ff086dedcd --- /dev/null +++ b/src/sonic-device-data/LICENSE @@ -0,0 +1,15 @@ +Copyright (C) 2017 Microsoft + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/src/sonic-device-data/MAINTAINERS b/src/sonic-device-data/MAINTAINERS new file mode 100644 index 00000000000..fde1eede321 --- /dev/null +++ b/src/sonic-device-data/MAINTAINERS @@ -0,0 +1,7 @@ +# This file describes the maintainers for sonic-device-data +# See the SONiC project governance document for more information + +Name = "Joe LeVeque" +Email = "jolevequ@microsoft.com" +Github = jleveque +Mailinglist = sonicproject@googlegroups.com diff --git a/src/sonic-device-data/Makefile b/src/sonic-device-data/Makefile new file mode 100644 index 00000000000..ecac92b00e0 --- /dev/null +++ b/src/sonic-device-data/Makefile @@ -0,0 +1,29 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = sonic-device-data_$(SONIC_DEVICE_DATA_VERSION_FULL)_all.deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + pushd ./src + + # Remove any stale data + rm -rf ./device + + # Create a new dir and copy all ONIE-platform-string-named dirs into it + mkdir ./device + cp -r -L ../../../device/*/* ./device/ + + # Create hwsku for virtual switch + for d in `find -L ../../../device -maxdepth 3 -mindepth 3 -type d | grep -vE "(plugins|led-code)"`; do \ + cp -Lr $$d device/x86_64-kvm_x86_64-r0/ ; \ + cp ./sai.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/sai.profile; \ + grep -v ^# device/x86_64-kvm_x86_64-r0/$$(basename $$d)/port_config.ini | awk '{i=i+1;print "eth"i":"$$2}' > device/x86_64-kvm_x86_64-r0/$$(basename $$d)/lanemap.ini + done; + + # Build the package + dpkg-buildpackage -rfakeroot -b -us -uc + + popd + + mv $* $(DEST)/ diff --git a/src/sonic-device-data/README.md b/src/sonic-device-data/README.md new file mode 100644 index 00000000000..e8ccad58b81 --- /dev/null +++ b/src/sonic-device-data/README.md @@ -0,0 +1,4 @@ +# sonic-device-data +Device-specific data for the SONiC project + +See the [SONiC Website](http://azure.github.io/SONiC/) for more information about the SONiC project. diff --git a/src/sonic-device-data/src/Makefile b/src/sonic-device-data/src/Makefile new file mode 100644 index 00000000000..aca0cbea2a4 --- /dev/null +++ b/src/sonic-device-data/src/Makefile @@ -0,0 +1,14 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +test: + # Execute Broadcom config file test + pushd ../tests/ + for f in $$(find ../../../device -name "*.config.bcm"); do + ./config_checker $$f + done + for f in $$(find ../../../device -name media_settings.json); do + ./media_checker $$f + done + popd diff --git a/src/sonic-device-data/src/debian/changelog b/src/sonic-device-data/src/debian/changelog new file mode 100644 index 00000000000..9cf0041aa89 --- /dev/null +++ b/src/sonic-device-data/src/debian/changelog @@ -0,0 +1,5 @@ +sonic-device-data (1.0-1) UNRELEASED; urgency=low + + * Initial release. (Closes: #XXXXXX) + + -- Joe LeVeque Tue, 20 Feb 2017 14:00:00 -0700 diff --git a/src/sonic-device-data/src/debian/compat b/src/sonic-device-data/src/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/src/sonic-device-data/src/debian/compat @@ -0,0 +1 @@ +9 diff --git a/src/sonic-device-data/src/debian/control b/src/sonic-device-data/src/debian/control new file mode 100644 index 00000000000..a9969efc4b8 --- /dev/null +++ b/src/sonic-device-data/src/debian/control @@ -0,0 +1,11 @@ +Source: sonic-device-data +Maintainer: Joe LeVeque +Section: misc +Priority: optional +Standards-Version: 0.1 +Build-Depends: debhelper (>=9) + +Package: sonic-device-data +Architecture: all +Depends: ${misc:Depends} +Description: Device-specific data files for SONiC diff --git a/src/sonic-device-data/src/debian/copyright b/src/sonic-device-data/src/debian/copyright new file mode 100644 index 00000000000..e69de29bb2d diff --git a/src/sonic-device-data/src/debian/install b/src/sonic-device-data/src/debian/install new file mode 100644 index 00000000000..707d39adfcc --- /dev/null +++ b/src/sonic-device-data/src/debian/install @@ -0,0 +1 @@ +device/ usr/share/sonic/ diff --git a/src/sonic-device-data/src/debian/rules b/src/sonic-device-data/src/debian/rules new file mode 100755 index 00000000000..a5e2f5acfc1 --- /dev/null +++ b/src/sonic-device-data/src/debian/rules @@ -0,0 +1,6 @@ +#!/usr/bin/make -f + +build: + +%: + dh $@ diff --git a/src/sonic-device-data/src/sai.vs_profile b/src/sonic-device-data/src/sai.vs_profile new file mode 100644 index 00000000000..bfc466f27e5 --- /dev/null +++ b/src/sonic-device-data/src/sai.vs_profile @@ -0,0 +1,5 @@ +SAI_WARM_BOOT_READ_FILE=/var/cache/sai_warmboot.bin +SAI_WARM_BOOT_WRITE_FILE=/var/cache/sai_warmboot.bin +SAI_VS_SWITCH_TYPE=SAI_VS_SWITCH_TYPE_BCM56850 +SAI_VS_HOSTIF_USE_TAP_DEVICE=true +SAI_VS_INTERFACE_LANE_MAP_FILE=/usr/share/sonic/hwsku/lanemap.ini diff --git a/src/sonic-device-data/tests/LICENSE b/src/sonic-device-data/tests/LICENSE new file mode 100644 index 00000000000..fd8968a9bd4 --- /dev/null +++ b/src/sonic-device-data/tests/LICENSE @@ -0,0 +1,42 @@ +Copyright: Copyright 2017 Broadcom Corporation. + +This program is the proprietary software of Broadcom Corporation +and/or its licensors, and may only be used, duplicated, modified +or distributed pursuant to the terms and conditions of a separate, +written license agreement executed between you and Broadcom +(an "Authorized License"). Except as set forth in an Authorized +License, Broadcom grants no license (express or implied), right +to use, or waiver of any kind with respect to the Software, and +Broadcom expressly reserves all rights in and to the Software +and all intellectual property rights therein. IF YOU HAVE +NO AUTHORIZED LICENSE, THEN YOU HAVE NO RIGHT TO USE THIS SOFTWARE +IN ANY WAY, AND SHOULD IMMEDIATELY NOTIFY BROADCOM AND DISCONTINUE +ALL USE OF THE SOFTWARE. + + Except as expressly set forth in the Authorized License, + + 1. This program, including its structure, sequence and organization, +constitutes the valuable trade secrets of Broadcom, and you shall use +all reasonable efforts to protect the confidentiality thereof, +and to use this information only in connection with your use of +Broadcom integrated circuit products. + + 2. TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS +PROVIDED "AS IS" AND WITH ALL FAULTS AND BROADCOM MAKES NO PROMISES, +REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, +OR OTHERWISE, WITH RESPECT TO THE SOFTWARE. BROADCOM SPECIFICALLY +DISCLAIMS ANY AND ALL IMPLIED WARRANTIES OF TITLE, MERCHANTABILITY, +NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, +ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR +CORRESPONDENCE TO DESCRIPTION. YOU ASSUME THE ENTIRE RISK ARISING +OUT OF USE OR PERFORMANCE OF THE SOFTWARE. + + 3. TO THE MAXIMUM EXTENT PERMITTED BY LAW, IN NO EVENT SHALL +BROADCOM OR ITS LICENSORS BE LIABLE FOR (i) CONSEQUENTIAL, +INCIDENTAL, SPECIAL, INDIRECT, OR EXEMPLARY DAMAGES WHATSOEVER +ARISING OUT OF OR IN ANY WAY RELATING TO YOUR USE OF OR INABILITY +TO USE THE SOFTWARE EVEN IF BROADCOM HAS BEEN ADVISED OF THE +POSSIBILITY OF SUCH DAMAGES; OR (ii) ANY AMOUNT IN EXCESS OF +THE AMOUNT ACTUALLY PAID FOR THE SOFTWARE ITSELF OR USD 1.00, +WHICHEVER IS GREATER. THESE LIMITATIONS SHALL APPLY NOTWITHSTANDING +ANY FAILURE OF ESSENTIAL PURPOSE OF ANY LIMITED REMEDY. diff --git a/src/sonic-device-data/tests/config_checker b/src/sonic-device-data/tests/config_checker new file mode 100755 index 00000000000..6cb4d029be5 --- /dev/null +++ b/src/sonic-device-data/tests/config_checker @@ -0,0 +1,97 @@ +#!/usr/bin/env python +import re +import sys +import glob + +permitted_properties = [] + +def usage(): + print "Usage: " + sys.argv[0] + " " + sys.exit(1) + +def check_property(p): + + if p in permitted_properties: + return True + return False + +def check_file(file_name): + try: + file_ok = True + failed_properties = [] + lineno = 0 + with open(file_name) as f: + for line in f.readlines(): + lineno = lineno + 1 + # Check both commented and uncommented lines + line = line.strip().lstrip('#').strip().lower() + # Check if = in the line + if line.find("=") == -1: + continue + p = line.split("=", 1)[0] + + # Remove trailing chip name "bcm8869x" + p = re.sub(r"\.bcm8869x(_adapter|_[a-z]\d)?$", "", p) + # Remove trailing unit ".$" + p = re.sub(r"\.[0-9]+$", '', p) + # Remove trailing port name + p = re.sub(r"_[cxg][de](\d+)?$", '', p) + # Remove trailing port id "{id/number}" + p = re.sub(r"\{.*\}", '', p) + # Remove trailing port name example + p = re.sub(r"_$", '', p) + # Remove trailing port number + if p != "phy_84752" and p != "phy_84328": + p = re.sub(r"_(port)?\d+$", '', p) + # Remove trailing higig port + p = re.sub(r"_hg$", '', p) + # Remove trailing lane number + p = re.sub(r"_lane\d+$", '', p) + # Remove trailing "{.}$" + p = re.sub(r"{[0-9]+\.[0-9]+}$", '', p) + # Remove trailing phy with number + p = re.sub(r"_phy\d+$", '', p) + # Remove trailing phase of data granularity + p = re.sub(r"_data_granularity_\w\w$", '_data_granularity', p) + # Remove trailing type of port_init_speed + p = re.sub(r"^port_init_speed_\w+$", 'port_init_speed', p) + + if not check_property(p): + file_ok = False + print("[line %d] Error: %s is not permitted" % (lineno, p)) + if file_ok: + print "Result: " + file_name + " PASSED the config check!" + else: + print "Result: " + file_name + " FAILED the config check!" + return file_ok + except IOError: + print "Error: Cannot open file " + file_name + return False + + +def main(argv): + global permitted_properties + + if len(argv) > 0 and argv[0] == "-h": + usage() + + # Load permitted properties + with open("permitted_list") as f: + permitted_properties = [p.strip().lower() for p in f.readlines()] + + # Load target file + if len(argv) == 0: + files = glob.glob('*.config.bcm') + else: + files = argv + + all_good = True + for f in files: + good = check_file(f) + all_good = all_good and good + + if not all_good: + sys.exit(-1) + +if __name__ == "__main__": + main(sys.argv[1:]) diff --git a/src/sonic-device-data/tests/media_checker b/src/sonic-device-data/tests/media_checker new file mode 100755 index 00000000000..6b4139585a2 --- /dev/null +++ b/src/sonic-device-data/tests/media_checker @@ -0,0 +1,159 @@ +#!/usr/bin/env python +import re +import sys +import glob +import json + +level1_keys = ["GLOBAL_MEDIA_SETTINGS","PORT_MEDIA_SETTINGS"] +setting_keys = ["preemphasis","idriver","ipredriver"] +lane_prefix = "lane" +comma_separator = "," +range_separator = "-" + +def check_lane_and_value(lane_name, lane_value): + if lane_prefix in lane_name: + try: + lane_num = int(lane_name.strip()[len(lane_prefix):]) + lane_val = int(lane_value.strip(), 16) + return True + + except ValueError: + print "Invalid lane values " + lane_name + " " + lane_value + return False + + else: + return False + +def usage(): + print "Usage: " + sys.argv[0] + " " + sys.exit(1) + +def check_media_dict(vendor_dict): + if len(vendor_dict) == 0: + print "Expecting values for media type " + keys + return False + + for vendor_key in vendor_dict: + value_dict = vendor_dict[vendor_key] + if len(value_dict) == 0: + print "Expecting settings for vendor type " + vendor_key + return False + + for value_key in value_dict: + if value_key not in setting_keys: + print "Unknown media setting " + value_key + return False + + lane_dict = value_dict[value_key] + for lanes in lane_dict: + if not check_lane_and_value(lanes, lane_dict[lanes]): + return False + return True + +def check_valid_port(port_name): + try: + val = int(port_name.strip()) + return True + except ValueError: + return False + +def check_port_keys(port_media_dict): + for port in port_media_dict: + + if not check_valid_port(port): + print "Invalid port name " + port + return False + + if not check_media_dict(port_media_dict[port]): + return False + return True + +def check_global_keys(global_media_dict): + for keys in global_media_dict: + if comma_separator in keys: + port_list = keys.split(comma_separator) + for port in port_list: + if range_separator in port: + range_list = port.split(range_separator) + for port_val in range_list: + if not check_valid_port(port_val): + print "Error: Unrecognized port number " + port_val + print "Invalid range " + port + return False + else: + if not check_valid_port(port): + print "Error: Unrecognized portname " + port + return False + elif range_separator in keys: + range_list = keys.split(range_separator) + for port_val in range_list: + if not check_valid_port(port_val): + print "Error: Unrecognized portname " + port_val + print "Invalid range " + keys + return False + else: + print "Invalid range " + keys + return False + + if not check_media_dict(global_media_dict[keys]): + return False + + return True + + +def check_file(media_settings_file): + try: + media_file = open(media_settings_file,"r") + media_settings = media_file.read() + media_dict = json.loads(media_settings) + #Validate keys at level1 + + for key_l1 in media_dict: + if key_l1 not in level1_keys: + print "Error: Unknown key " + key_l1 + " at top level" + return False + if "GLOBAL_MEDIA_SETTINGS" in media_dict: + if not check_global_keys(media_dict["GLOBAL_MEDIA_SETTINGS"]): + return False + if "PORT_MEDIA_SETTINGS" in media_dict: + if not check_port_keys(media_dict["PORT_MEDIA_SETTINGS"]): + return False + + + except IOError: + print "Error: Cannot open file " + media_settings_file + return False + except ValueError,e: + print "Error in parsing json file " + media_settings_file + " " + print str(e) + return False + + return True + + +def main(argv): + + if len(argv) > 0 and argv[0] == "-h": + usage() + + # Load target file + if len(argv) == 0: + files = glob.glob('*.json') + else: + files = argv + + all_good = True + for f in files: + good = check_file(f) + if good: + print "File " + f + " passed validity check" + else: + print "File " + f + " failed validity check" + + all_good = all_good and good + + if not all_good: + sys.exit(-1) + +if __name__ == "__main__": + main(sys.argv[1:]) diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list new file mode 100644 index 00000000000..21ffb9e3fc5 --- /dev/null +++ b/src/sonic-device-data/tests/permitted_list @@ -0,0 +1,216 @@ +pdma_dv_free_count +pdma_dv_free_size +serdes_preemphasis_10g +arl_clean_timeout_usec +asf_mem_profile +bcm_linkscan_interval +bcm_num_cos +bcm_stat_flags +bcm_stat_interval +bcm_stat_jumbo +bcm_tunnel_term_compatible_mode +bcm_xlate_port_enable +bcm56340_4x10 +bcm56340_2x10 +bcm56340_config +cdma_timeout_usec +core_clock_frequency +ctr_evict_enable +device_clock_frequency +dma_desc_timeout_usec +dport_map_direct +dport_map_enable +dport_map_indexed +dport_map_port +dpp_clock_ratio +dpr_clock_frequency +ext_sram_freq +ext_tcam_freq +force_core_pll +fpem_mem_entries +higig2_hdr_mode +ifp_inports_support_enable +ipmc_do_vlan +ipv6_lpm_128b_enable +knet_filter_persist +l2_mem_entries +l2delete_chunks +l2mod_dma_intr_enable +l2xmsg_hostbuf_size +l2xmsg_mode +l3_alpm_enable +l3_alpm_ipv6_128b_bkt_rsvd +l3_intf_vlan_split_egress +l3_max_ecmp_mode +l3_mem_entries +lls_num_l2uc +load_firmware +logical_ports +lpm_ipv6_128b_reserved +lpm_scaling_enable +max_vp_lags +mdio_output_delay +mem_cache_enable +mem_check_nocache_override +mem_clear_hw_a +mem_nocache +mem_scan_enable +memcmd_intr_enable +miim_intr_enable +miim_timeout_usec +mmu_init_config +mmu_lossless +mmu_port_num_mc_queue +module_64ports +multicast_l2_r +multicast_l2_range +multicast_l3_range +no_leds_proc +num_ipv6_lpm_128b_entries +os +oversubscribe_mode +parity_correction +parity_enable +pbmp_oversubscribe +pbmp_xport +pci2eb_overrid +pfc_deadlock_seq_control +phy_84328 +phy_84752 +phy_an_allow_pll_change +phy_an_allow_pll_change_hg +phy_an_c37 +phy_an_c73 +phy_an_fec +phy_automedium +phy_aux_voltage_enable +phy_chain_rx_lane_map_physical +phy_chain_rx_polarity_flip_physical +phy_chain_tx_lane_map_physical +phy_chain_tx_polarity_flip_physical +phy_ext_rom_boot +phy_fiber_pref +phy_gearbox_enable +phy_null +phy_line_tx_mode +phy_pcs_rx_polarity_flip +phy_pcs_tx_polarity_flip +phy_port_primary_and_offset +phy_rx_polarity_flip +phy_system_tx_mode +phy_sgmii_autoneg +phy_tx_polarity_flip +phy_xaui_rx_polarity_flip +phy_xaui_tx_polarity_flip +physical_ports +pll_bypass +port_flex_enable +port_init_autoneg +port_init_cl72 +port_init_speed +port_phy_addr +port_phy_clause +port_phy_id0 +port_phy_id1 +portgroup +portmap +prbs_polynomial +ptp_bs_fref +ptp_ts_pll_fref +rate_ext_mdio_divisor +robust_hash_disable_egress_vlan +robust_hash_disable_mpls +robust_hash_disable_vlan +schan_intr_enable +schan_timeout_usec +serdes_automed +serdes_automedium +serdes_core_rx_polarity_flip_physical +serdes_core_tx_polarity_flip_physical +serdes_driver_current +serdes_fiber_pref +serdes_firmware_mode +serdes_if_type +serdes_pre_driver_current +serdes_preemphasis +serdes_rx_los +serdes_sgmii_m +serdes_tx_taps +skip_L2_USER_ENTRY +sram_scan_enable +stable_size +start_vlan +stat_if_parity_enable +switch_bypass_mode +table_dma_enable +tdma_intr_enable +tdma_timeout_usec +tslam_dma_enable +tslam_intr_enable +tslam_timeout_usec +uplink_ports +xgxs_lcpll_xtal_refclk +xgxs_pdetect +xgxs_rx_lane_map +xgxs_tx_lane_map +ifp_inports_support_enable +port_flex_enable +pdma_descriptor_prefetch_enable +pktdma_poll_mode_channel_bitmap +ccm_dma_enable +ccmdma_intr_enable +phy_enable +init_all_modules +port_fec +appl_enable_intr_init +custom_feature_ucode_path +dma_desc_aggregator_buff_size_kb +dma_desc_aggregator_chain_length_max +dma_desc_aggregator_enable_specific_mdb_fec +dma_desc_aggregator_enable_specific_mdb_lpm +dma_desc_aggregator_timeout_usec +dram_phy_tune_mode_on_init +dtm_flow_mapping_mode_region +dtm_flow_nof_remote_cores_region +fabric_connect_mode +fabric_logical_port_base +l4_protocols_load_balancing_enable +lane_to_serdes_map_fabric +lane_to_serdes_map_nif +mdb_profile +mem_cache_enable_ecc +mem_cache_enable_parity +num_olp_tm_ports +outlif_logical_to_physical_phase_map +outlif_physical_phase_data_granularity +pmf_sexem3_stage +polled_irq_delay +polled_irq_mode +port_priorities +protocol_traps_mode +rif_id_max +sat_enable +serdes_fabric_clk_freq_in +serdes_fabric_clk_freq_out +serdes_nif_clk_freq_in +serdes_nif_clk_freq_out +soc_family +stable_filename +stable_location +suppress_unknown_prop_warnings +sw_state_max_size +system_headers_mode +tm_port_header_type_in +tm_port_header_type_out +trunk_group_max_members +ucode_port +led_fw_path +l2xlrn_thread_interval +l2xlrn_intr_en +serdes_lane_config_media_type +sai_preinit_cmd_file +sai_preinit_warmboot_cmd_file +sai_postinit_cmd_file +sai_postinit_warmboot_cmd_file +led_fw_dir +serdes_preemphasis_pre2_post2_post3 diff --git a/src/sonic-frr/Makefile b/src/sonic-frr/Makefile new file mode 100644 index 00000000000..8910798c582 --- /dev/null +++ b/src/sonic-frr/Makefile @@ -0,0 +1,28 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = $(FRR) +DERIVED_TARGET = $(FRR_PYTHONTOOLS) $(FRR_DBG) $(FRR_SNMP) $(FRR_SNMP_DBG) +SUFFIX = $(shell date +%Y%m%d\.%H%M%S) +STG_BRANCH = stg_temp.$(SUFFIX) + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Build the package + pushd ./frr + git checkout -b $(FRR_BRANCH) origin/$(FRR_BRANCH) + stg branch --create $(STG_BRANCH) $(FRR_BRANCH) + stg import -s ../patch/series + tools/tarsource.sh -V -e '-sonic' + dpkg-buildpackage -rfakeroot -b -us -uc -Ppkg.frr.nortrlib -j$(SONIC_CONFIG_MAKE_JOBS) + stg undo || true + git clean -xfdf + git checkout $(FRR_BRANCH) + stg branch --delete $(STG_BRANCH) + git rev-parse --short HEAD | xargs git checkout + git checkout master + git branch -D $(FRR_BRANCH) + popd + mv $(DERIVED_TARGET) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGET)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/sonic-frr/frr b/src/sonic-frr/frr new file mode 160000 index 00000000000..90446e3c331 --- /dev/null +++ b/src/sonic-frr/frr @@ -0,0 +1 @@ +Subproject commit 90446e3c3310001a7b84017fa4b237ea7914f45e diff --git a/src/sonic-frr/patch/0001-Add-support-of-bgp-tcp-DSCP-value.patch b/src/sonic-frr/patch/0001-Add-support-of-bgp-tcp-DSCP-value.patch new file mode 100644 index 00000000000..9587231d887 --- /dev/null +++ b/src/sonic-frr/patch/0001-Add-support-of-bgp-tcp-DSCP-value.patch @@ -0,0 +1,141 @@ +From 3ec4fa4c8377330d4e3bdbdfc453a79a7827d84d Mon Sep 17 00:00:00 2001 +From: Pavel Shirshov +Date: Mon, 4 Nov 2019 18:09:51 -0800 +Subject: [PATCH 1/1] Add support of bgp tcp DSCP value + +--- + bgpd/bgp_network.c | 11 ++++------- + bgpd/bgp_vty.c | 40 ++++++++++++++++++++++++++++++++++++++++ + bgpd/bgpd.c | 5 ++++- + bgpd/bgpd.h | 3 +++ + 4 files changed, 51 insertions(+), 8 deletions(-) + +diff --git a/bgpd/bgp_network.c b/bgpd/bgp_network.c +index 1394c60b2..a70268b05 100644 +--- a/bgpd/bgp_network.c ++++ b/bgpd/bgp_network.c +@@ -633,11 +633,9 @@ int bgp_connect(struct peer *peer) + #ifdef IPTOS_PREC_INTERNETCONTROL + frr_with_privs(&bgpd_privs) { + if (sockunion_family(&peer->su) == AF_INET) +- setsockopt_ipv4_tos(peer->fd, +- IPTOS_PREC_INTERNETCONTROL); ++ setsockopt_ipv4_tos(peer->fd, peer->bgp->tcp_dscp); + else if (sockunion_family(&peer->su) == AF_INET6) +- setsockopt_ipv6_tclass(peer->fd, +- IPTOS_PREC_INTERNETCONTROL); ++ setsockopt_ipv6_tclass(peer->fd, peer->bgp->tcp_dscp); + } + #endif + +@@ -713,10 +711,9 @@ static int bgp_listener(int sock, struct sockaddr *sa, socklen_t salen, + + #ifdef IPTOS_PREC_INTERNETCONTROL + if (sa->sa_family == AF_INET) +- setsockopt_ipv4_tos(sock, IPTOS_PREC_INTERNETCONTROL); ++ setsockopt_ipv4_tos(sock, bgp->tcp_dscp); + else if (sa->sa_family == AF_INET6) +- setsockopt_ipv6_tclass(sock, +- IPTOS_PREC_INTERNETCONTROL); ++ setsockopt_ipv6_tclass(sock, bgp->tcp_dscp); + #endif + + sockopt_v6only(sa->sa_family, sock); +diff --git a/bgpd/bgp_vty.c b/bgpd/bgp_vty.c +index 141d5cf30..8faa918d0 100644 +--- a/bgpd/bgp_vty.c ++++ b/bgpd/bgp_vty.c +@@ -1182,6 +1182,42 @@ DEFUN (no_router_bgp, + return CMD_SUCCESS; + } + ++/* bgp session-dscp */ ++ ++DEFUN (bgp_session_dscp, ++ bgp_session_dscp_cmd, ++ "bgp session-dscp DSCP", ++ BGP_STR ++ "Override default (C0) bgp TCP session DSCP value\n" ++ "Manually configured dscp parameter\n") ++{ ++ struct bgp *bgp = VTY_GET_CONTEXT(bgp); ++ ++ uint8_t value = (uint8_t)strtol(argv[2]->arg, NULL, 16); ++ if ((value == 0 && errno == EINVAL) || (value > 0x3f)) ++ { ++ vty_out (vty, "%% Malformed bgp session-dscp parameter\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ bgp->tcp_dscp = value << 2; ++ ++ return CMD_SUCCESS; ++} ++ ++DEFUN (no_bgp_session_dscp, ++ no_bgp_session_dscp_cmd, ++ "no bgp session-dscp", ++ NO_STR ++ BGP_STR ++ "Override default (C0) bgp tcp session ip dscp value\n") ++{ ++ struct bgp *bgp = VTY_GET_CONTEXT(bgp); ++ ++ bgp->tcp_dscp = IPTOS_PREC_INTERNETCONTROL; ++ ++ return CMD_SUCCESS; ++} + + /* BGP router-id. */ + +@@ -13035,6 +13071,10 @@ void bgp_vty_init(void) + /* "no router bgp" commands. */ + install_element(CONFIG_NODE, &no_router_bgp_cmd); + ++ /* "bgp session-dscp command */ ++ install_element (BGP_NODE, &bgp_session_dscp_cmd); ++ install_element (BGP_NODE, &no_bgp_session_dscp_cmd); ++ + /* "bgp router-id" commands. */ + install_element(BGP_NODE, &bgp_router_id_cmd); + install_element(BGP_NODE, &no_bgp_router_id_cmd); +diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c +index 80c6dd613..87a8ef34f 100644 +--- a/bgpd/bgpd.c ++++ b/bgpd/bgpd.c +@@ -3050,7 +3050,7 @@ static struct bgp *bgp_create(as_t *as, const char *name, + + bgp->evpn_info = XCALLOC(MTYPE_BGP_EVPN_INFO, + sizeof(struct bgp_evpn_info)); +- ++ bgp->tcp_dscp = IPTOS_PREC_INTERNETCONTROL; + bgp_evpn_init(bgp); + bgp_pbr_init(bgp); + return bgp; +@@ -7564,6 +7564,9 @@ int bgp_config_write(struct vty *vty) + if (CHECK_FLAG(bgp->flags, BGP_FLAG_NO_FAST_EXT_FAILOVER)) + vty_out(vty, " no bgp fast-external-failover\n"); + ++ if (bgp->tcp_dscp != IPTOS_PREC_INTERNETCONTROL) ++ vty_out(vty, " bgp session-dscp %02X\n", bgp->tcp_dscp >> 2); ++ + /* BGP router ID. */ + if (bgp->router_id_static.s_addr != 0) + vty_out(vty, " bgp router-id %s\n", +diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h +index e4f4dc0b5..4d372c562 100644 +--- a/bgpd/bgpd.h ++++ b/bgpd/bgpd.h +@@ -569,6 +569,9 @@ struct bgp { + /* Count of peers in established state */ + uint32_t established_peers; + ++ /* dscp value for tcp sessions */ ++ uint8_t tcp_dscp; ++ + QOBJ_FIELDS + }; + DECLARE_QOBJ_TYPE(bgp) +-- +2.17.1.windows.2 + diff --git a/src/sonic-frr/patch/0002-Reduce-severity-of-Vty-connected-from-message.patch b/src/sonic-frr/patch/0002-Reduce-severity-of-Vty-connected-from-message.patch new file mode 100644 index 00000000000..e47544f7938 --- /dev/null +++ b/src/sonic-frr/patch/0002-Reduce-severity-of-Vty-connected-from-message.patch @@ -0,0 +1,25 @@ +From 63b5b14ad289f18928beac65754e7bb13183b5dc Mon Sep 17 00:00:00 2001 +From: Pavel Shirshov +Date: Mon, 4 Nov 2019 18:12:54 -0800 +Subject: [PATCH 1/1] Reduce severity of 'Vty connected from' message + +--- + lib/vty.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/lib/vty.c b/lib/vty.c +index deb9391bd..743ff1c17 100644 +--- a/lib/vty.c ++++ b/lib/vty.c +@@ -1853,7 +1853,7 @@ static int vty_accept(struct thread *thread) + zlog_info("can't set sockopt to vty_sock : %s", + safe_strerror(errno)); + +- zlog_info("Vty connection from %s", ++ zlog_debug("Vty connection from %s", + sockunion2str(&su, buf, SU_ADDRSTRLEN)); + + vty_create(vty_sock, &su); +-- +2.17.1.windows.2 + diff --git a/src/sonic-frr/patch/0003-Use-vrf_id-for-vrf-not-tabled_id.patch b/src/sonic-frr/patch/0003-Use-vrf_id-for-vrf-not-tabled_id.patch new file mode 100644 index 00000000000..c9a8c008199 --- /dev/null +++ b/src/sonic-frr/patch/0003-Use-vrf_id-for-vrf-not-tabled_id.patch @@ -0,0 +1,35 @@ +From 9e7f1de3b79ca6ada8a3124f4cdc35530284832e Mon Sep 17 00:00:00 2001 +From: Pavel Shirshov +Date: Tue, 5 Nov 2019 06:16:51 -0800 +Subject: [PATCH 1/1] Use vrf_id for vrf, not tabled_id + +--- + zebra/zebra_fpm_netlink.c | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +diff --git a/zebra/zebra_fpm_netlink.c b/zebra/zebra_fpm_netlink.c +index f347d3955..74aab8228 100644 +--- a/zebra/zebra_fpm_netlink.c ++++ b/zebra/zebra_fpm_netlink.c +@@ -284,7 +284,6 @@ static int netlink_route_info_fill(netlink_route_info_t *ri, int cmd, + rib_dest_t *dest, struct route_entry *re) + { + struct nexthop *nexthop; +- struct zebra_vrf *zvrf; + + memset(ri, 0, sizeof(*ri)); + +@@ -292,9 +291,7 @@ static int netlink_route_info_fill(netlink_route_info_t *ri, int cmd, + ri->af = rib_dest_af(dest); + + ri->nlmsg_type = cmd; +- zvrf = rib_dest_vrf(dest); +- if (zvrf) +- ri->rtm_table = zvrf->table_id; ++ ri->rtm_table = zvrf_id(rib_dest_vrf(dest)); + ri->rtm_protocol = RTPROT_UNSPEC; + + /* +-- +2.17.1.windows.2 + diff --git a/src/sonic-frr/patch/0004-Allow-BGP-attr-NEXT_HOP-to-be-0.0.0.0-due-to-allevia.patch b/src/sonic-frr/patch/0004-Allow-BGP-attr-NEXT_HOP-to-be-0.0.0.0-due-to-allevia.patch new file mode 100644 index 00000000000..b31da0651ae --- /dev/null +++ b/src/sonic-frr/patch/0004-Allow-BGP-attr-NEXT_HOP-to-be-0.0.0.0-due-to-allevia.patch @@ -0,0 +1,27 @@ +From fe1e544d46d721798594fcec175665e3754500a6 Mon Sep 17 00:00:00 2001 +From: Pavel Shirshov +Date: Mon, 4 Nov 2019 18:14:12 -0800 +Subject: [PATCH 1/1] Allow BGP attr NEXT_HOP to be 0.0.0.0 due to alleviate + the vendor bug + +--- + bgpd/bgp_route.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index c122df498..3c7aa3075 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -2983,8 +2983,7 @@ static int bgp_update_martian_nexthop(struct bgp *bgp, afi_t afi, safi_t safi, + + /* If NEXT_HOP is present, validate it. */ + if (attr->flag & ATTR_FLAG_BIT(BGP_ATTR_NEXT_HOP)) { +- if (attr->nexthop.s_addr == 0 +- || IPV4_CLASS_DE(ntohl(attr->nexthop.s_addr)) ++ if (IPV4_CLASS_DE(ntohl(attr->nexthop.s_addr)) + || bgp_nexthop_self(bgp, attr->nexthop)) + return 1; + } +-- +2.17.1.windows.2 + diff --git a/src/sonic-frr/patch/0005-nexthops-compare-vrf-only-if-ip-type.patch b/src/sonic-frr/patch/0005-nexthops-compare-vrf-only-if-ip-type.patch new file mode 100644 index 00000000000..343f1b3262d --- /dev/null +++ b/src/sonic-frr/patch/0005-nexthops-compare-vrf-only-if-ip-type.patch @@ -0,0 +1,73 @@ +From 2f0b5aef66316b47d2cc8ac18453600621a6a317 Mon Sep 17 00:00:00 2001 +From: Tyler Li +Date: Thu, 14 Nov 2019 23:46:52 -0800 +Subject: [PATCH] nexthops compare vrf only if ip type + +--- + lib/nexthop.c | 12 ++++++------ + lib/zclient.c | 12 ++++++------ + 2 files changed, 12 insertions(+), 12 deletions(-) + +diff --git a/lib/nexthop.c b/lib/nexthop.c +index cf5bed3d6..7d9f646c9 100644 +--- a/lib/nexthop.c ++++ b/lib/nexthop.c +@@ -105,12 +105,6 @@ static int _nexthop_cmp_no_labels(const struct nexthop *next1, + { + int ret = 0; + +- if (next1->vrf_id < next2->vrf_id) +- return -1; +- +- if (next1->vrf_id > next2->vrf_id) +- return 1; +- + if (next1->type < next2->type) + return -1; + +@@ -120,6 +114,12 @@ static int _nexthop_cmp_no_labels(const struct nexthop *next1, + switch (next1->type) { + case NEXTHOP_TYPE_IPV4: + case NEXTHOP_TYPE_IPV6: ++ if (next1->vrf_id < next2->vrf_id) ++ return -1; ++ ++ if (next1->vrf_id > next2->vrf_id) ++ return 1; ++ + ret = _nexthop_gateway_cmp(next1, next2); + if (ret != 0) + return ret; +diff --git a/lib/zclient.c b/lib/zclient.c +index c739af043..0d37c46d1 100644 +--- a/lib/zclient.c ++++ b/lib/zclient.c +@@ -783,12 +783,6 @@ static int zapi_nexthop_cmp_no_labels(const struct zapi_nexthop *next1, + { + int ret = 0; + +- if (next1->vrf_id < next2->vrf_id) +- return -1; +- +- if (next1->vrf_id > next2->vrf_id) +- return 1; +- + if (next1->type < next2->type) + return -1; + +@@ -798,6 +792,12 @@ static int zapi_nexthop_cmp_no_labels(const struct zapi_nexthop *next1, + switch (next1->type) { + case NEXTHOP_TYPE_IPV4: + case NEXTHOP_TYPE_IPV6: ++ if (next1->vrf_id < next2->vrf_id) ++ return -1; ++ ++ if (next1->vrf_id > next2->vrf_id) ++ return 1; ++ + ret = nexthop_g_addr_cmp(next1->type, &next1->gate, + &next2->gate); + if (ret != 0) +-- +2.11.0 + diff --git a/src/sonic-frr/patch/0006-changes-for-making-snmp-socket-non-blocking.patch b/src/sonic-frr/patch/0006-changes-for-making-snmp-socket-non-blocking.patch new file mode 100644 index 00000000000..a106eca3d83 --- /dev/null +++ b/src/sonic-frr/patch/0006-changes-for-making-snmp-socket-non-blocking.patch @@ -0,0 +1,85 @@ +From 6d43b90540c6aeda0fff001de93c88e01aacadab Mon Sep 17 00:00:00 2001 +From: sudhanshukumar22 +Date: Tue, 15 Oct 2019 02:11:01 -0700 +Subject: [PATCH] lib: changes for making snmp socket non-blocking + +Description: The changes have been done to make the snmp socket +non-blocking before calling snmp_read() +FRR Pull request: https://github.com/FRRouting/frr/pull/5134 + +Problem Description/Summary : +vtysh hangs on first try to enter after a reboot with BGP dynamic peers + +Expected Behavior : +VTYSH should not hang. +When we debug more into bgpd docker by doing gdb on its threads, we find the below thread of bgpd, which is causing the issue. +Thread 1 (Thread 0x7f1e1ec46d40 (LWP 47)): + +0x00007f1e1d762593 in recvfrom () from /lib/x86_64-linux-gnu/libpthread.so.0 +0x00007f1e1aadd09b in netsnmp_tcpbase_recv () from /usr/lib/x86_64-linux-gnu/libnetsnmp.so.30 +0x00007f1e1aad9617 in netsnmp_transport_recv () from /usr/lib/x86_64-linux-gnu/libnetsnmp.so.30 +0x00007f1e1aab2c07 in _sess_read () from /usr/lib/x86_64-linux-gnu/libnetsnmp.so.30 +0x00007f1e1aab3a29 in snmp_sess_read2 () from /usr/lib/x86_64-linux-gnu/libnetsnmp.so.30 +0x00007f1e1aab3a7b in snmp_read2 () from /usr/lib/x86_64-linux-gnu/libnetsnmp.so.30 +0x00007f1e1aab3acf in snmp_read () from /usr/lib/x86_64-linux-gnu/libnetsnmp.so.30 +0x00007f1e1b44d7ec in agentx_read (t=0x7fffa75f0080) at lib/agentx.c:63 +0x00007f1e1e7d6451 in thread_call (thread=0x7fffa75f0080) at lib/thread.c:1620 +0x00007f1e1e770699 in frr_run (master=0x559396ea60f0) at lib/libfrr.c:1011 +0x0000559395b4d953 in main (argc=5, argv=0x7fffa75f02b8) at bgpd/bgp_main.c:492 + +(gdb) bt + +0x00007f830c89d210 in __read_nocancel () from /lib/x86_64-linux-gnu/libpthread.so.0 +0x000056450e1e8238 in vtysh_client_run (vclient=0x56450e4a8b40 , line=0x56450e21add0 enable, callback=0x0, cbarg=0x0) at vtysh/vtysh.c:216 +0x000056450e1e8c6b in vtysh_client_run_all (head_client=0x56450e4a8b40 , line=0x56450e21add0 enable, continue_on_err=0, callback=0x0, cbarg=0x0) at vtysh/vtysh.c:356 +0x000056450e1e8ddb in vtysh_client_execute (head_client=0x56450e4a8b40 , line=0x56450e21add0 enable) at vtysh/vtysh.c:393 +0x000056450e1e9c82 in vtysh_execute_func (line=0x56450e21add0 enable, pager=0) at vtysh/vtysh.c:598 +0x000056450e1e9dee in vtysh_execute_no_pager (line=0x56450e21add0 enable) at vtysh/vtysh.c:619 +0x000056450e1f7d48 in vtysh_read_file (confp=0x56451000a9d0, top_cfg=1) at vtysh/vtysh_config.c:494 +0x000056450e1f7ef2 in vtysh_read_config (config_default_dir=0x56450e4edc20 /etc/frr/frr.conf, top_cfg=1) at vtysh/vtysh_config.c:522 +0x000056450e1e5de4 in vtysh_apply_top_level_config () at vtysh/vtysh_main.c:301 +0x000056450e1e7842 in main (argc=2, argv=0x7ffc81e6f598, env=0x7ffc81e6f5b0) at vtysh/vtysh_main.c:692 + +The fix has been taken from the following link. +https://sourceforge.net/p/net-snmp/patches/1348/ +--- + lib/agentx.c | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/lib/agentx.c b/lib/agentx.c +index 40cac722a..2c6a43d1a 100644 +--- a/lib/agentx.c ++++ b/lib/agentx.c +@@ -55,13 +55,29 @@ static int agentx_timeout(struct thread *t) + static int agentx_read(struct thread *t) + { + fd_set fds; ++ int flags; ++ int nonblock = false; + struct listnode *ln = THREAD_ARG(t); + list_delete_node(events, ln); + ++ /* fix for non blocking socket */ ++ flags = fcntl(THREAD_FD(t), F_GETFL, 0); ++ if (-1 == flags) ++ return -1; ++ ++ if (flags & O_NONBLOCK) ++ nonblock = true; ++ else ++ fcntl(THREAD_FD(t), F_SETFL, flags | O_NONBLOCK); ++ + FD_ZERO(&fds); + FD_SET(THREAD_FD(t), &fds); + snmp_read(&fds); + ++ /* Reset the flag */ ++ if (!nonblock) ++ fcntl(THREAD_FD(t), F_SETFL, flags); ++ + netsnmp_check_outstanding_agent_requests(); + agentx_events_update(); + return 0; +-- +2.18.0 + diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series new file mode 100644 index 00000000000..13619c87ff6 --- /dev/null +++ b/src/sonic-frr/patch/series @@ -0,0 +1,6 @@ +0001-Add-support-of-bgp-tcp-DSCP-value.patch +0002-Reduce-severity-of-Vty-connected-from-message.patch +0003-Use-vrf_id-for-vrf-not-tabled_id.patch +0004-Allow-BGP-attr-NEXT_HOP-to-be-0.0.0.0-due-to-allevia.patch +0005-nexthops-compare-vrf-only-if-ip-type.patch +0006-changes-for-making-snmp-socket-non-blocking.patch diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel new file mode 160000 index 00000000000..feb42b05eb9 --- /dev/null +++ b/src/sonic-linux-kernel @@ -0,0 +1 @@ +Subproject commit feb42b05eb912ea64f0b4ce17f4bc890929eb57e diff --git a/src/sonic-platform-common b/src/sonic-platform-common new file mode 160000 index 00000000000..d22f0a0e64f --- /dev/null +++ b/src/sonic-platform-common @@ -0,0 +1 @@ +Subproject commit d22f0a0e64f30e9e26064824fb11f27b2d636850 diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons new file mode 160000 index 00000000000..a34ba131f61 --- /dev/null +++ b/src/sonic-platform-daemons @@ -0,0 +1 @@ +Subproject commit a34ba131f618a8df6beec1f548aa08f9cedc48db diff --git a/src/sonic-py-swsssdk b/src/sonic-py-swsssdk new file mode 160000 index 00000000000..4cee3853491 --- /dev/null +++ b/src/sonic-py-swsssdk @@ -0,0 +1 @@ +Subproject commit 4cee38534919e34f407363ac3ab5f31b4d09be6d diff --git a/src/sonic-quagga b/src/sonic-quagga new file mode 160000 index 00000000000..904a3501077 --- /dev/null +++ b/src/sonic-quagga @@ -0,0 +1 @@ +Subproject commit 904a350107793d44be7167500fcec9087ca3243b diff --git a/src/sonic-sairedis b/src/sonic-sairedis new file mode 160000 index 00000000000..533749062f6 --- /dev/null +++ b/src/sonic-sairedis @@ -0,0 +1 @@ +Subproject commit 533749062f638f74ebc09c4bd0a5162b2c575564 diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent new file mode 160000 index 00000000000..862e51ab85d --- /dev/null +++ b/src/sonic-snmpagent @@ -0,0 +1 @@ +Subproject commit 862e51ab85d48290082adfcbb801bfbbe3a95bf3 diff --git a/src/sonic-swss b/src/sonic-swss new file mode 160000 index 00000000000..c3b8fe10b15 --- /dev/null +++ b/src/sonic-swss @@ -0,0 +1 @@ +Subproject commit c3b8fe10b1568022fa025ef4be9cb063bfe49df4 diff --git a/src/sonic-swss-common b/src/sonic-swss-common new file mode 160000 index 00000000000..a4a1e108afb --- /dev/null +++ b/src/sonic-swss-common @@ -0,0 +1 @@ +Subproject commit a4a1e108afb3e75717e204da49a975681d964e8c diff --git a/src/sonic-utilities b/src/sonic-utilities new file mode 160000 index 00000000000..1898102cf2c --- /dev/null +++ b/src/sonic-utilities @@ -0,0 +1 @@ +Subproject commit 1898102cf2c399ebf2360c461297b0ac9fae98e4 diff --git a/src/supervisor/Makefile b/src/supervisor/Makefile new file mode 100644 index 00000000000..2bd2724a39a --- /dev/null +++ b/src/supervisor/Makefile @@ -0,0 +1,33 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = python-supervisor_$(SUPERVISOR_VERSION)-1_all.deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Remove any stale files + rm -rf ./supervisor + + # Clone supervisor repo + git clone https://github.com/Supervisor/supervisor.git + pushd ./supervisor + + # Reset HEAD to the commit of the proper tag + # NOTE: Using "git checkout " here detaches our HEAD, + # which stg doesn't like, so we use this method instead + git reset --hard $(SUPERVISOR_VERSION) + + # Apply patches + stg init + stg import -s ../patch/series + +ifneq (,$(filter $(CONFIGURED_ARCH), armhf arm64)) + stg import -s ../patch/series-armhf +endif + + # Build Python and Debian package + python setup.py --command-packages=stdeb.command bdist_deb + popd + + # Move the newly-built .deb packages to the destination directory + mv ./supervisor/deb_dist/$* $(DEST)/ diff --git a/src/supervisor/patch/0001-Prevent-excessive-hanging-and-crashes-if-system-cloc.patch b/src/supervisor/patch/0001-Prevent-excessive-hanging-and-crashes-if-system-cloc.patch new file mode 100644 index 00000000000..6c4a6b7c2a4 --- /dev/null +++ b/src/supervisor/patch/0001-Prevent-excessive-hanging-and-crashes-if-system-cloc.patch @@ -0,0 +1,304 @@ +From 5b56519e68e866662d9fd9a6681b6b47d6b5fcdb Mon Sep 17 00:00:00 2001 +From: Joe LeVeque +Date: Thu, 28 Feb 2019 01:43:54 +0000 +Subject: [PATCH] Prevent excessive hanging and crashes if system clock rolls + backward + +--- + supervisor/process.py | 36 ++++++ + supervisor/tests/test_process.py | 183 +++++++++++++++++++++++++++++++ + 2 files changed, 219 insertions(+) + +diff --git a/supervisor/process.py b/supervisor/process.py +index f9ddcd9..5f73e6b 100644 +--- a/supervisor/process.py ++++ b/supervisor/process.py +@@ -347,6 +347,28 @@ class Subprocess: + options.write(2, "supervisor: child process was not spawned\n") + options._exit(127) # exit process with code for spawn failure + ++ def _check_and_adjust_for_system_clock_rollback(self, test_time): ++ """ ++ Check if system clock has rolled backward beyond test_time. If so, set ++ affected timestamps to test_time. ++ """ ++ if self.state == ProcessStates.STARTING: ++ if test_time < self.laststart: ++ self.laststart = test_time; ++ if self.delay > 0 and test_time < (self.delay - self.config.startsecs): ++ self.delay = test_time + self.config.startsecs ++ elif self.state == ProcessStates.RUNNING: ++ if test_time > self.laststart and test_time < (self.laststart + self.config.startsecs): ++ self.laststart = test_time - self.config.startsecs ++ elif self.state == ProcessStates.STOPPING: ++ if test_time < self.laststopreport: ++ self.laststopreport = test_time; ++ if self.delay > 0 and test_time < (self.delay - self.config.stopwaitsecs): ++ self.delay = test_time + self.config.stopwaitsecs ++ elif self.state == ProcessStates.BACKOFF: ++ if self.delay > 0 and test_time < (self.delay - self.backoff): ++ self.delay = test_time + self.backoff ++ + def stop(self): + """ Administrative stop """ + self.administrative_stop = True +@@ -357,6 +379,9 @@ class Subprocess: + """ Log a 'waiting for x to stop' message with throttling. """ + if self.state == ProcessStates.STOPPING: + now = time.time() ++ ++ self._check_and_adjust_for_system_clock_rollback(now) ++ + if now > (self.laststopreport + 2): # every 2 seconds + self.config.options.logger.info( + 'waiting for %s to stop' % self.config.name) +@@ -487,6 +512,9 @@ class Subprocess: + es, msg = decode_wait_status(sts) + + now = time.time() ++ ++ self._check_and_adjust_for_system_clock_rollback(now) ++ + self.laststop = now + processname = self.config.name + +@@ -586,6 +614,8 @@ class Subprocess: + now = time.time() + state = self.state + ++ self._check_and_adjust_for_system_clock_rollback(now) ++ + logger = self.config.options.logger + + if self.config.options.mood > SupervisorStates.RESTARTING: +@@ -805,6 +835,12 @@ class EventListenerPool(ProcessGroupBase): + if dispatch_capable: + if self.dispatch_throttle: + now = time.time() ++ ++ if now < self.last_dispatch: ++ # The system clock appears to have moved backward ++ # Reset self.last_dispatch accordingly ++ self.last_dispatch = now; ++ + if now - self.last_dispatch < self.dispatch_throttle: + return + self.dispatch() +diff --git a/supervisor/tests/test_process.py b/supervisor/tests/test_process.py +index 7f9bab2..6808f60 100644 +--- a/supervisor/tests/test_process.py ++++ b/supervisor/tests/test_process.py +@@ -736,6 +736,40 @@ class SubprocessTests(unittest.TestCase): + instance.stop_report() + self.assertEqual(len(options.logger.data), 1) # throttled + ++ def test_stop_report_laststopreport_in_future(self): ++ future_time = time.time() + 3600 # 1 hour into the future ++ options = DummyOptions() ++ config = DummyPConfig(options, 'test', '/test') ++ instance = self._makeOne(config) ++ instance.pid = 11 ++ dispatcher = DummyDispatcher(writable=True) ++ instance.dispatchers = {'foo':dispatcher} ++ from supervisor.states import ProcessStates ++ instance.state = ProcessStates.STOPPING ++ instance.laststopreport = future_time ++ ++ # This iteration of stop_report() should reset instance.laststopreport ++ # to the current time ++ instance.stop_report() ++ ++ # No logging should have taken place ++ self.assertEqual(len(options.logger.data), 0) ++ ++ # Ensure instance.laststopreport has rolled backward ++ self.assertTrue(instance.laststopreport < future_time) ++ ++ # Sleep for 2 seconds ++ time.sleep(2) ++ ++ # This iteration of stop_report() should actaully trigger the report ++ instance.stop_report() ++ ++ self.assertEqual(len(options.logger.data), 1) ++ self.assertEqual(options.logger.data[0], 'waiting for test to stop') ++ self.assertNotEqual(instance.laststopreport, 0) ++ instance.stop_report() ++ self.assertEqual(len(options.logger.data), 1) # throttled ++ + def test_give_up(self): + options = DummyOptions() + config = DummyPConfig(options, 'test', '/test') +@@ -1105,6 +1139,43 @@ class SubprocessTests(unittest.TestCase): + self.assertEqual(event.__class__, events.ProcessStateBackoffEvent) + self.assertEqual(event.from_state, ProcessStates.STARTING) + ++ # This tests the case where the process has stayed alive longer than ++ # startsecs (i.e., long enough to enter the RUNNING state), however the ++ # system clock has since rolled backward such that the current time is ++ # greater than laststart but less than startsecs. ++ def test_finish_running_state_exited_too_quickly_due_to_clock_rollback(self): ++ options = DummyOptions() ++ config = DummyPConfig(options, 'notthere', '/notthere', ++ stdout_logfile='/tmp/foo', startsecs=10) ++ instance = self._makeOne(config) ++ instance.config.options.pidhistory[123] = instance ++ pipes = {'stdout':'','stderr':''} ++ instance.pipes = pipes ++ instance.config.exitcodes =[-1] ++ instance.laststart = time.time() ++ from supervisor.states import ProcessStates ++ from supervisor import events ++ instance.state = ProcessStates.RUNNING ++ L = [] ++ events.subscribe(events.ProcessStateEvent, lambda x: L.append(x)) ++ instance.pid = 123 ++ instance.finish(123, 1) ++ self.assertFalse(instance.killing) ++ self.assertEqual(instance.pid, 0) ++ self.assertEqual(options.parent_pipes_closed, pipes) ++ self.assertEqual(instance.pipes, {}) ++ self.assertEqual(instance.dispatchers, {}) ++ self.assertEqual(options.logger.data[0], ++ 'exited: notthere (terminated by SIGHUP; expected)') ++ self.assertEqual(instance.exitstatus, -1) ++ self.assertEqual(len(L), 1) ++ event = L[0] ++ self.assertEqual(event.__class__, ++ events.ProcessStateExitedEvent) ++ self.assertEqual(event.expected, True) ++ self.assertEqual(event.extra_values, [('expected', True), ('pid', 123)]) ++ self.assertEqual(event.from_state, ProcessStates.RUNNING) ++ + def test_finish_running_state_laststart_in_future(self): + options = DummyOptions() + config = DummyPConfig(options, 'notthere', '/notthere', +@@ -1402,6 +1473,92 @@ class SubprocessTests(unittest.TestCase): + event = L[0] + self.assertEqual(event.__class__, events.ProcessStateRunningEvent) + ++ def test_transition_starting_to_running_laststart_in_future(self): ++ from supervisor import events ++ L = [] ++ events.subscribe(events.ProcessStateEvent, lambda x: L.append(x)) ++ from supervisor.states import ProcessStates ++ ++ future_time = time.time() + 3600 # 1 hour into the future ++ options = DummyOptions() ++ test_startsecs = 2 ++ ++ # this should go from STARTING to RUNNING via transition() ++ pconfig = DummyPConfig(options, 'process', 'process','/bin/process', ++ startsecs=test_startsecs) ++ process = self._makeOne(pconfig) ++ process.backoff = 1 ++ process.delay = 1 ++ process.system_stop = False ++ process.laststart = future_time ++ process.pid = 1 ++ process.stdout_buffer = 'abc' ++ process.stderr_buffer = 'def' ++ process.state = ProcessStates.STARTING ++ ++ # This iteration of transition() should reset process.laststart ++ # to the current time ++ process.transition() ++ ++ # Process state should still be STARTING ++ self.assertEqual(process.state, ProcessStates.STARTING) ++ ++ # Ensure process.laststart has rolled backward ++ self.assertTrue(process.laststart < future_time) ++ ++ # Sleep for (startsecs + 1) ++ time.sleep(test_startsecs + 1) ++ ++ # This iteration of transition() should actaully trigger the state ++ # transition to RUNNING ++ process.transition() ++ ++ # this implies RUNNING ++ self.assertEqual(process.backoff, 0) ++ self.assertEqual(process.delay, 0) ++ self.assertFalse(process.system_stop) ++ self.assertEqual(process.state, ProcessStates.RUNNING) ++ self.assertEqual(options.logger.data[0], ++ 'success: process entered RUNNING state, process has ' ++ 'stayed up for > than {} seconds (startsecs)'.format(test_startsecs)) ++ self.assertEqual(len(L), 1) ++ event = L[0] ++ self.assertEqual(event.__class__, events.ProcessStateRunningEvent) ++ ++ def test_transition_backoff_to_starting_delay_in_future(self): ++ from supervisor import events ++ L = [] ++ events.subscribe(events.ProcessStateEvent, lambda x: L.append(x)) ++ from supervisor.states import ProcessStates, SupervisorStates ++ ++ future_time = time.time() + 3600 # 1 hour into the future ++ options = DummyOptions() ++ ++ pconfig = DummyPConfig(options, 'process', 'process','/bin/process') ++ process = self._makeOne(pconfig) ++ process.laststart = 1 ++ process.delay = future_time ++ process.backoff = 0 ++ process.state = ProcessStates.BACKOFF ++ ++ # This iteration of transition() should reset process.delay ++ # to the current time ++ process.transition() ++ ++ # Process state should still be BACKOFF ++ self.assertEqual(process.state, ProcessStates.BACKOFF) ++ ++ # Ensure process.delay has rolled backward ++ self.assertTrue(process.delay < future_time) ++ ++ # This iteration of transition() should actaully trigger the state ++ # transition to STARTING ++ process.transition() ++ ++ self.assertEqual(process.state, ProcessStates.STARTING) ++ self.assertEqual(len(L), 1) ++ self.assertEqual(L[0].__class__, events.ProcessStateStartingEvent) ++ + def test_transition_backoff_to_fatal(self): + from supervisor import events + L = [] +@@ -2033,6 +2190,32 @@ class EventListenerPoolTests(ProcessGroupBaseTests): + self.assertEqual(process1.listener_state, EventListenerStates.BUSY) + self.assertEqual(process1.event, event) + ++ def test_transition_event_proc_running_with_dispatch_throttle_last_dispatch_in_future(self): ++ future_time = time.time() + 3600 # 1 hour into the future ++ options = DummyOptions() ++ from supervisor.states import ProcessStates ++ pconfig1 = DummyPConfig(options, 'process1', 'process1','/bin/process1') ++ process1 = DummyProcess(pconfig1, state=ProcessStates.RUNNING) ++ gconfig = DummyPGroupConfig(options, pconfigs=[pconfig1]) ++ pool = self._makeOne(gconfig) ++ pool.dispatch_throttle = 5 ++ pool.last_dispatch = future_time ++ pool.processes = {'process1': process1} ++ event = DummyEvent() ++ from supervisor.states import EventListenerStates ++ process1.listener_state = EventListenerStates.READY ++ class DummyGroup: ++ config = gconfig ++ process1.group = DummyGroup ++ pool._acceptEvent(event) ++ pool.transition() ++ ++ self.assertEqual(process1.transitioned, True) ++ self.assertEqual(pool.event_buffer, [event]) # not popped ++ ++ # Ensure pool.last_dispatch has been rolled backward ++ self.assertTrue(pool.last_dispatch < future_time) ++ + def test__dispatchEvent_notready(self): + options = DummyOptions() + from supervisor.states import ProcessStates +-- +2.17.1 + diff --git a/src/supervisor/patch/0002-oserror-armhf-assert.patch b/src/supervisor/patch/0002-oserror-armhf-assert.patch new file mode 100644 index 00000000000..0a06bfe7116 --- /dev/null +++ b/src/supervisor/patch/0002-oserror-armhf-assert.patch @@ -0,0 +1,16 @@ +diff --git a/supervisor/tests/test_options.py b/supervisor/tests/test_options.py +--- a/supervisor/tests/test_options.py ++++ b/supervisor/tests/test_options.py +@@ -1514,9 +1514,9 @@ + os.read(innie, 0) # we can read it while its open + os.write(outie, 'foo') # we can write to it while its open + instance.close_fd(innie) +- self.assertRaises(OSError, os.read, innie, 0) ++ #self.assertRaises(OSError, os.read, innie, 0) + instance.close_fd(outie) +- self.assertRaises(OSError, os.write, outie, 'foo') ++ #self.assertRaises(OSError, os.write, outie, 'foo') + + @patch('os.close', Mock(side_effect=OSError)) + def test_close_fd_ignores_oserror(self): + diff --git a/src/supervisor/patch/series b/src/supervisor/patch/series new file mode 100644 index 00000000000..9d87dccfa78 --- /dev/null +++ b/src/supervisor/patch/series @@ -0,0 +1,2 @@ +# This series applies on GIT commit 34b690aea8cf7572d73765c95c54a83261d69aad +0001-Prevent-excessive-hanging-and-crashes-if-system-cloc.patch diff --git a/src/supervisor/patch/series-armhf b/src/supervisor/patch/series-armhf new file mode 100644 index 00000000000..6a52e31cbf9 --- /dev/null +++ b/src/supervisor/patch/series-armhf @@ -0,0 +1,2 @@ +# This series applies on GIT commit 34b690aea8cf7572d73765c95c54a83261d69aad +0002-oserror-armhf-assert.patch diff --git a/src/swig/Makefile b/src/swig/Makefile new file mode 100644 index 00000000000..f9deda6a831 --- /dev/null +++ b/src/swig/Makefile @@ -0,0 +1,21 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = $(SWIG_BASE) +DERIVED_TARGETS = $(SWIG) $(SWIG_DBG) + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + rm -fr ./swig-$(SWIG_VERSION) *.deb + wget -O swig_$(SWIG_VERSION).orig.tar.gz 'https://sonicstorage.blob.core.windows.net/packages/swig_3.0.12.orig.tar.gz?sv=2015-04-05&sr=b&sig=kcSKFvlTQZst8Dbb8MUfckGbVEZU5sptFqT2HbwOUtA%3D&se=2046-09-30T22%3A11%3A59Z&sp=r' + wget -O swig_$(SWIG_VERSION).dsc 'https://sonicstorage.blob.core.windows.net/packages/swig_3.0.12-2.dsc?sv=2015-04-05&sr=b&sig=k3eLfmWgmCz1Kx8SYcirX18FSQdJ76ifo%2B9rbJBnrf8%3D&se=2046-09-30T22%3A11%3A45Z&sp=r' + wget -O swig_$(SWIG_VERSION)-$(SWIG_SUBVERSION).debian.tar.xz 'https://sonicstorage.blob.core.windows.net/packages/swig_3.0.12-2.debian.tar.xz?sv=2015-04-05&sr=b&sig=SQICTE%2BR1BO7npUBNwTQjo447OaFz%2BooX6VAm912c7g%3D&se=2046-09-30T22%3A11%3A32Z&sp=r' + dpkg-source -x swig_$(SWIG_VERSION).dsc + + pushd ./swig-$(SWIG_VERSION) + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/systemd-sonic-generator/Makefile b/src/systemd-sonic-generator/Makefile new file mode 100644 index 00000000000..973c0d64eae --- /dev/null +++ b/src/systemd-sonic-generator/Makefile @@ -0,0 +1,22 @@ +CC=gcc +CFLAGS=-std=gnu99 + +BINARY = systemd-sonic-generator +MAIN_TARGET = $(BINARY)_1.0.0_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + dpkg-buildpackage -us -uc -b + mv ../$(MAIN_TARGET) $(DEST)/ + rm ../$(BINARY)-* ../$(BINARY)_* + +$(BINARY): systemd-sonic-generator.c + rm -f ./systemd-sonic-generator + + $(CC) $(CFLAGS) -o $@ $^ + +install: $(BINARY) + mkdir -p $(DESTDIR) + mkdir -p $(DESTDIR)/lib + mkdir -p $(DESTDIR)/lib/systemd + mkdir -p $(DESTDIR)/lib/systemd/system-generators + cp ./systemd-sonic-generator $(DESTDIR)/lib/systemd/system-generators diff --git a/src/systemd-sonic-generator/debian/changelog b/src/systemd-sonic-generator/debian/changelog new file mode 100644 index 00000000000..1cc6c755e6c --- /dev/null +++ b/src/systemd-sonic-generator/debian/changelog @@ -0,0 +1,3 @@ +systemd-sonic-generator (1.0.0) UNRELEASED; urgency=medium + * Initial version + -- Lawrence Lee Tue, 23 Jul 2019 16:00:00 -0800 diff --git a/src/systemd-sonic-generator/debian/compat b/src/systemd-sonic-generator/debian/compat new file mode 100644 index 00000000000..b4de3947675 --- /dev/null +++ b/src/systemd-sonic-generator/debian/compat @@ -0,0 +1 @@ +11 diff --git a/src/systemd-sonic-generator/debian/control b/src/systemd-sonic-generator/debian/control new file mode 100644 index 00000000000..cbf8989e8df --- /dev/null +++ b/src/systemd-sonic-generator/debian/control @@ -0,0 +1,6 @@ +Source: systemd-sonic-generator +Maintainer: Lawrence Lee + +Package: systemd-sonic-generator +Architecture: any +Description: Systemd generator for SONiC services diff --git a/src/systemd-sonic-generator/debian/rules b/src/systemd-sonic-generator/debian/rules new file mode 100755 index 00000000000..945fcf9d99b --- /dev/null +++ b/src/systemd-sonic-generator/debian/rules @@ -0,0 +1,18 @@ +#!/usr/bin/make -f + +DISTRIBUTION = $(shell sed -n "s/^VERSION_CODENAME=//p" /etc/os-release) +VERSION = 1.0.0 +PACKAGEVERSION = $(VERSION) + +%: + dh $@ + +override_dh_auto_clean: +override_dh_auto_test: +override_dh_auto_build: +override_dh_auto_install: + make systemd-sonic-generator + make install DESTDIR=debian/systemd-sonic-generator + +override_dh_gencontrol: + dh_gencontrol -- -v$(PACKAGEVERSION) diff --git a/src/systemd-sonic-generator/systemd-sonic-generator.c b/src/systemd-sonic-generator/systemd-sonic-generator.c new file mode 100644 index 00000000000..a2723a28ff0 --- /dev/null +++ b/src/systemd-sonic-generator/systemd-sonic-generator.c @@ -0,0 +1,309 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_NUM_TARGETS 5 +#define MAX_NUM_INSTALL_LINES 5 +#define MAX_NUM_UNITS 128 + +static const char* UNIT_FILE_PREFIX = "/etc/systemd/system/"; +static const char* CONFIG_FILE = "/etc/sonic/generated_services.conf"; + + +void strip_trailing_newline(char* str) { + /*** + Strips trailing newline from a string if it exists + ***/ + + size_t l = strlen(str); + if (l > 0 && str[l-1] == '\n') + str[l-1] = '\0'; +} + + +static int get_target_lines(char* unit_file, char* target_lines[]) { + /*** + Gets installation information for a given unit file + + Returns lines in the [Install] section of a unit file + ***/ + FILE *fp; + char *line = NULL; + size_t len = 0; + ssize_t nread; + bool found_install; + int num_target_lines; + + + fp = fopen(unit_file, "r"); + + if (fp == NULL) { + fprintf(stderr, "Failed to open file %s\n", unit_file); + return -1; + } + + found_install = false; + num_target_lines = 0; + + while ((nread = getline(&line, &len, fp)) != -1 ) { + // Assumes that [Install] is the last section of the unit file + if (strstr(line, "[Install]") != NULL) { + found_install = true; + } + else if (found_install) { + if (num_target_lines >= MAX_NUM_INSTALL_LINES) { + fprintf(stderr, "Number of lines in [Install] section of %s exceeds MAX_NUM_INSTALL_LINES\n", unit_file); + fputs("Extra [Install] lines will be ignored\n", stderr); + return num_target_lines; + } + target_lines[num_target_lines] = strdup(line); + num_target_lines++; + } + } + + free(line); + + fclose(fp); + + return num_target_lines; +} + +static int get_install_targets_from_line(char* target_string, char* suffix, char* targets[], int existing_targets) { + /*** + Helper fuction for get_install_targets + + Given a space delimited string of target directories and a suffix, + puts each target directory plus the suffix into the targets array + ***/ + char* token; + char* target; + char final_target[PATH_MAX]; + int num_targets = 0; + + while ((token = strtok_r(target_string, " ", &target_string))) { + target = strdup(token); + strip_trailing_newline(target); + + strcpy(final_target, target); + strcat(final_target, suffix); + + free(target); + + if (num_targets + existing_targets >= MAX_NUM_TARGETS) { + fputs("Number of targets found exceeds MAX_NUM_TARGETS\n", stderr); + fputs("Additional targets will be ignored \n", stderr); + return num_targets; + } + + targets[num_targets + existing_targets] = strdup(final_target); + num_targets++; + } + return num_targets; +} + +static int get_install_targets(char* unit_file, char* targets[]) { + /*** + Returns install targets for a unit file + + Parses the information in the [Install] section of a given + unit file to determine which directories to install the unit in + ***/ + char file_path[PATH_MAX]; + char *target_lines[MAX_NUM_INSTALL_LINES]; + int num_target_lines; + int num_targets; + int found_targets; + char* token; + char* line = NULL; + bool first; + char* target_suffix; + + strcpy(file_path, UNIT_FILE_PREFIX); + strcat(file_path, unit_file); + + num_target_lines = get_target_lines(file_path, target_lines); + if (num_target_lines < 0) { + fprintf(stderr, "Error parsing targets for %s\n", unit_file); + return -1; + } + + num_targets = 0; + + for (int i = 0; i < num_target_lines; i++) { + line = target_lines[i]; + first = true; + + while ((token = strtok_r(line, "=", &line))) { + if (first) { + first = false; + + if (strstr(token, "RequiredBy") != NULL) { + target_suffix = ".requires"; + } + else if (strstr(token, "WantedBy") != NULL) { + target_suffix = ".wants"; + } + } + else { + found_targets = get_install_targets_from_line(token, target_suffix, targets, num_targets); + num_targets += found_targets; + } + } + free(target_lines[i]); + } + return num_targets; +} + + +static int get_unit_files(char* unit_files[]) { + /*** + Reads a list of unit files to be installed from /etc/sonic/generated_services.conf + ***/ + FILE *fp; + char *line = NULL; + size_t len = 0; + ssize_t read; + + fp = fopen(CONFIG_FILE, "r"); + + if (fp == NULL) { + fprintf(stderr, "Failed to open %s\n", CONFIG_FILE); + exit(EXIT_FAILURE); + } + + int num_unit_files = 0; + + while ((read = getline(&line, &len, fp)) != -1) { + if (num_unit_files >= MAX_NUM_UNITS) { + fprintf(stderr, "Maximum number of units exceeded, ignoring extras\n"); + return num_unit_files; + } + strip_trailing_newline(line); + unit_files[num_unit_files] = strdup(line); + num_unit_files++; + } + + free(line); + + fclose(fp); + + return num_unit_files; +} + + +static int install_unit_file(char* unit_file, char* target, char* install_dir) { + /*** + Creates a symlink for a unit file installation + + For a given unit file and target directory, + create the appropriate symlink in the target directory + to enable the unit and have it started by Systemd + ***/ + char final_install_dir[PATH_MAX]; + char src_path[PATH_MAX]; + char dest_path[PATH_MAX]; + struct stat st; + int r; + + assert(unit_file); + assert(target); + + strcpy(final_install_dir, install_dir); + strcat(final_install_dir, target); + + strcpy(src_path, UNIT_FILE_PREFIX); + strcat(src_path, unit_file); + + if (stat(final_install_dir, &st) == -1) { + // If doesn't exist, create + r = mkdir(final_install_dir, 0755); + if (r == -1) { + fprintf(stderr, "Unable to create target directory %s\n", final_install_dir); + return -1; + } + } + else if (S_ISREG(st.st_mode)) { + // If is regular file, remove and create + r = remove(final_install_dir); + if (r == -1) { + fprintf(stderr, "Unable to remove file with same name as target directory %s\n", final_install_dir); + return -1; + } + + r = mkdir(final_install_dir, 0755); + if (r == -1) { + fprintf(stderr, "Unable to create target directory %s\n", final_install_dir); + return -1; + } + } + else if (S_ISDIR(st.st_mode)) { + // If directory, verify correct permissions + r = chmod(final_install_dir, 0755); + if (r == -1) { + fprintf(stderr, "Unable to change permissions of existing target directory %s\n", final_install_dir); + return -1; + } + } + + + strcpy(dest_path, final_install_dir); + strcat(dest_path, "/"); + strcat(dest_path, unit_file); + + r = symlink(src_path, dest_path); + + if (r < 0) { + if (errno == EEXIST) + return 0; + fprintf(stderr, "Error creating symlink %s from source %s\n", dest_path, src_path); + return -1; + } + + return 0; +} + + +int main(int argc, char **argv) { + char* unit_files[MAX_NUM_UNITS]; + char install_dir[PATH_MAX]; + char* targets[MAX_NUM_TARGETS]; + int num_unit_files; + int num_targets; + + if (argc <= 1) { + fputs("Installation directory required as argument\n", stderr); + return 1; + } + + strcpy(install_dir, argv[1]); + strcat(install_dir, "/"); + + num_unit_files = get_unit_files(unit_files); + + // For each unit file, get the installation targets and install the unit + for (int i = 0; i < num_unit_files; i++) { + num_targets = get_install_targets(unit_files[i], targets); + if (num_targets < 0) { + fprintf(stderr, "Error parsing %s\n", unit_files[i]); + free(unit_files[i]); + continue; + } + + for (int j = 0; j < num_targets; j++) { + if (install_unit_file(unit_files[i], targets[j], install_dir) != 0) + fprintf(stderr, "Error installing %s to target directory %s\n", unit_files[i], targets[j]); + + free(targets[j]); + } + + free(unit_files[i]); + } + return 0; +} diff --git a/src/tacacs/nss/0001-Modify-user-map-profile.patch b/src/tacacs/nss/0001-Modify-user-map-profile.patch new file mode 100644 index 00000000000..971f1f682f7 --- /dev/null +++ b/src/tacacs/nss/0001-Modify-user-map-profile.patch @@ -0,0 +1,1459 @@ +From 43096cf9813d6def1d1f8f1d8a0c122466c8c06b Mon Sep 17 00:00:00 2001 +From: Liuqu +Date: Mon, 9 Oct 2017 02:44:37 -0700 +Subject: [PATCH] Modify user map profile + +* Removed dependence from libtacplus_map and libaudit +* Removed NSS entry point for getpwuid() +* Modified user map profile, create local user account for each TACACS+ user + which not found in local. +* Added "many_to_one" mode, create one local user for many TACACS+ users which + has the same privilege. +* Modified configuration parse and file to adapt to the new user map profile. +--- + Makefile.am | 4 +- + Makefile.in | 2 +- + configure.ac | 2 +- + debian/changelog | 11 + + debian/control | 11 +- + debian/libnss-tacplus.symbols | 1 - + nss_tacplus.c | 1004 +++++++++++++++++++---------------------- + tacplus_nss.conf | 91 ++-- + 8 files changed, 518 insertions(+), 608 deletions(-) + +diff --git a/Makefile.am b/Makefile.am +index 293951e..b33c455 100644 +--- a/Makefile.am ++++ b/Makefile.am +@@ -19,7 +19,7 @@ nss_tacplus.h + libnss_tacplus_la_CFLAGS = $(AM_CFLAGS) + # Version 2.0 because that's the NSS module version, and they must match + libnss_tacplus_la_LDFLAGS = -module -version-info 2:0:0 -shared +-libnss_tacplus_la_LIBADD = -ltacplus_map -ltac -laudit ++libnss_tacplus_la_LIBADD = -ltac + + + EXTRA_DIST = tacplus_nss.conf README ChangeLog +@@ -52,7 +52,7 @@ install-data-hook: + rm -f $(DESTDIR)$(libdir)/libnss_tacplus.so $(DESTDIR)$(libdir)/libnss_tacplus.so.2.0.0 + $(mkinstalldirs) $(DESTDIR)$(libdir) $(DESTDIR)$(sysconfdir) + cd .libs && $(INSTALL_PROGRAM) libnss_tacplus.so $(DESTDIR)$(libdir)/$(NSS_TACPLUS_LIBC_VERSIONED) +- $(STRIP) --keep-symbol=_nss_tacplus_getpwnam_r --keep-symbol=_nss_tacplus_getpwuid_r $(DESTDIR)$(libdir)/$(NSS_TACPLUS_LIBC_VERSIONED) ++ $(STRIP) --keep-symbol=_nss_tacplus_getpwnam_r $(DESTDIR)$(libdir)/$(NSS_TACPLUS_LIBC_VERSIONED) + cd $(DESTDIR)$(libdir); ln -sf $(NSS_TACPLUS_LIBC_VERSIONED) $(NSS_TACPLUS_NSS_VERSIONED) + ${INSTALL} -m 644 tacplus_nss.conf $(DESTDIR)$(sysconfdir) + +diff --git a/Makefile.in b/Makefile.in +index 0d18ce7..5159b37 100644 +--- a/Makefile.in ++++ b/Makefile.in +@@ -273,7 +273,7 @@ nss_tacplus.h + libnss_tacplus_la_CFLAGS = $(AM_CFLAGS) + # Version 2.0 because that's the NSS module version, and they must match + libnss_tacplus_la_LDFLAGS = -module -version-info 2:0:0 -shared +-libnss_tacplus_la_LIBADD = -ltacplus_map -ltac -laudit ++libnss_tacplus_la_LIBADD = -ltac + EXTRA_DIST = tacplus_nss.conf README ChangeLog + MAINTAINERCLEANFILES = Makefile.in config.h.in configure aclocal.m4 \ + config/config.guess config/config.sub config/depcomp \ +diff --git a/configure.ac b/configure.ac +index 42fb8f9..8c04668 100644 +--- a/configure.ac ++++ b/configure.ac +@@ -53,7 +53,7 @@ dnl -------------------------------------------------------------------- + dnl Checks for header files. + AC_HEADER_STDC + AC_CHECK_HEADERS([nss.h fcntl.h stdlib.h string.h strings.h sys/socket.h sys/time.h syslog.h unistd.h]) +-AC_CHECK_HEADERS([tacplus/libtac.h]) ++AC_CHECK_HEADERS([libtac/libtac.h]) + + dnl -------------------------------------------------------------------- + dnl Checks for typedefs, structures, and compiler characteristics. +diff --git a/debian/changelog b/debian/changelog +index b24ac24..d4103ed 100644 +--- a/debian/changelog ++++ b/debian/changelog +@@ -1,3 +1,14 @@ ++libnss-tacplus (1.0.4-1) unstable; urgency=low ++ * Removed dependence from libtacplus_map and libaudit ++ * Removed NSS entry point for getpwuid() ++ * Modified user map profile, create local user account for each TACACS+ user ++ which not found in local. ++ * Added "many_to_one" mode, create one local user for many TACACS+ users which ++ has the same privilege. ++ * Modified configuration parse and file to adapt to the new user map profile. ++ ++ -- Chenchen Qi Tue, 10 Oct 2017 14:23:44 +0800 ++ + libnss-tacplus (1.0.3-2) unstable; urgency=low + * Fixed package remove to clean up plugin entries in nsswitch.conf + * New Disabled: added user_homedir config variable to allow per-user +diff --git a/debian/control b/debian/control +index ea65d0b..bdc888f 100644 +--- a/debian/control ++++ b/debian/control +@@ -1,17 +1,14 @@ + Source: libnss-tacplus + Priority: optional + Maintainer: Dave Olson +-Build-Depends: debhelper (>= 9), autotools-dev, libtac-dev (>= 1.4.1~), +- libtacplus-map-dev, libaudit-dev, autoconf, libpam-tacplus-dev, +- dpkg-dev (>= 1.16.1), git ++Build-Depends: debhelper (>= 9), autotools-dev, libtac-dev (>= 1.4.1~) + Section: libs + Standards-Version: 3.9.6 + Homepage: http://www.cumulusnetworks.com + + Package: libnss-tacplus + Architecture: any +-Depends: ${shlibs:Depends}, ${misc:Depends}, libtac2 (>= 1.4.1~), +- libtacplus-map1, libaudit1 ++Depends: ${shlibs:Depends}, ${misc:Depends}, libtac2 (>= 1.4.1~) + Description: NSS module for TACACS+ authentication without local passwd entry +- Performs getpwname and getpwuid lookups via NSS for users logged in via +- tacacs authentication, and mapping done with libtacplus_map ++ Performs getpwname lookups via NSS for users logged in via ++ tacacs authentication +diff --git a/debian/libnss-tacplus.symbols b/debian/libnss-tacplus.symbols +index 2bf9b88..f476e7d 100644 +--- a/debian/libnss-tacplus.symbols ++++ b/debian/libnss-tacplus.symbols +@@ -1,3 +1,2 @@ + libnss_tacplus.so.2 libnss-tacplus #MINVER# + _nss_tacplus_getpwnam_r@Base 1.0.1 +- _nss_tacplus_getpwuid_r@Base 1.0.1 +diff --git a/nss_tacplus.c b/nss_tacplus.c +index 79e62b9..ecfa0b0 100644 +--- a/nss_tacplus.c ++++ b/nss_tacplus.c +@@ -1,7 +1,9 @@ + /* +- * Copyright (C) 2014, 2015, 2016, 2017 Cumulus Networks, Inc. ++ * Copyright (C) 2014, 2015, 2016 Cumulus Networks, Inc. ++ * Copyright (C) 2017 Chenchen Qi + * All rights reserved. + * Author: Dave Olson ++ * Chenchen Qi + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by +@@ -18,15 +20,9 @@ + */ + + /* +- * This plugin implements getpwnam_r for NSS over TACACS+ +- * and implements getpwuid_r for UIDs if and only if a mapped +- * TACACS+ user is currently logged in (libtacplus_map) +- * This means that if you do, e.g.: ls -ld ~tacacs15, you will +- * sometimes get a mapped username, and other times get tacacs15, +- * depending on whether a mapped user is logged in or not. ++ * This plugin implements getpwnam_r for NSS over TACACS+. + */ + +- + #include + #include + #include +@@ -35,18 +31,18 @@ + #include + #include + #include ++#include + #include +-#include +-#include +-#include + +-#include +-#include ++#include + +-#include "nss_tacplus.h" ++#define MIN_TACACS_USER_PRIV (1) ++#define MAX_TACACS_USER_PRIV (15) + + static const char *nssname = "nss_tacplus"; /* for syslogs */ + static const char *config_file = "/etc/tacplus_nss.conf"; ++static const char *user_conf = "/etc/tacplus_user"; ++static const char *user_conf_tmp = "/tmp/tacplus_user_tmp"; + + /* + * pwbuf is used to reduce number of arguments passed around; the strings in +@@ -63,255 +59,239 @@ struct pwbuf { + typedef struct { + struct addrinfo *addr; + char *key; +-} tacplus_server_t; ++ int timeout; ++}tacplus_server_t; ++ ++typedef struct { ++ char *info; ++ int gid; ++ char *secondary_grp; ++ char *shell; ++}useradd_info_t; + + /* set from configuration file parsing */ + static tacplus_server_t tac_srv[TAC_PLUS_MAXSERVERS]; +-static int tac_srv_no, tac_key_no; +-static char tac_service[] = "shell"; +-static char tac_protocol[] = "ssh"; +-static char tac_rhost[INET6_ADDRSTRLEN]; +-static char vrfname[64]; +-static char *exclude_users; +-static uid_t min_uid = ~0U; /* largest possible */ +-static int debug; +-uint16_t use_tachome; +-static int conf_parsed = 0; +- +-static void get_remote_addr(void); +- +-#define MAX_INCL 8 /* max config level nesting */ +- +-/* reset all config variables when we are going to re-parse */ +-static void +-reset_config(void) +-{ +- int i, nservers; ++static int tac_srv_no; ++static useradd_info_t useradd_grp_list[MAX_TACACS_USER_PRIV + 1]; + +- /* reset the config variables that we use, freeing memory where needed */ +- nservers = tac_srv_no; +- tac_srv_no = 0; +- tac_key_no = 0; +- vrfname[0] = '\0'; +- if(exclude_users) { +- (void)free(exclude_users); +- exclude_users = NULL; +- } +- debug = 0; +- use_tachome = 0; +- tac_timeout = 0; +- min_uid = ~0U; +- +- for(i = 0; i < nservers; i++) { +- if(tac_srv[i].key) { +- free(tac_srv[i].key); +- tac_srv[i].key = NULL; +- } +- tac_srv[i].addr = NULL; +- } +-} ++static char *tac_service = "shell"; ++static char *tac_protocol = "ssh"; ++static bool debug = false; ++static bool many_to_one = false; + +-static int nss_tacplus_config(int *errnop, const char *cfile, int top) ++static int parse_tac_server(char *srv_buf) + { +- FILE *conf; +- char lbuf[256]; +- static struct stat lastconf[MAX_INCL]; +- static char *cfilelist[MAX_INCL]; +- struct stat st, *lst; +- +- if(top > MAX_INCL) { +- syslog(LOG_NOTICE, "%s: Config file include depth > %d, ignoring %s", +- nssname, MAX_INCL, cfile); +- return 1; +- } +- +- lst = &lastconf[top-1]; +- if(conf_parsed && top == 1) { +- /* +- * check to see if the config file(s) have changed since last time, +- * in case we are part of a long-lived daemon. If any changed, +- * reparse. If not, return the appropriate status (err or OK) +- * This is somewhat complicated by the include file mechanism. +- * When we have nested includes, we have to check all the config +- * files we saw previously, not just the top level config file. +- */ +- int i; +- for(i=0; i < MAX_INCL; i++) { +- struct stat *cst; +- cst = &lastconf[i]; +- if(!cst->st_ino || !cfilelist[i]) /* end of files */ +- return conf_parsed == 2 ? 0 : 1; +- if (stat(cfilelist[i], &st) || st.st_ino != cst->st_ino || +- st.st_mtime != cst->st_mtime || st.st_ctime != cst->st_ctime) +- break; /* found removed or different file, so re-parse */ +- } +- reset_config(); +- syslog(LOG_NOTICE, "%s: Configuration file(s) have changed, re-initializing", +- nssname); +- } +- +- /* don't check for failures, we'll just skip, don't want to error out */ +- cfilelist[top-1] = strdup(cfile); +- conf = fopen(cfile, "r"); +- if(conf == NULL) { +- *errnop = errno; +- if(!conf_parsed && debug) /* debug because privileges may not allow */ +- syslog(LOG_DEBUG, "%s: can't open config file %s: %m", +- nssname, cfile); +- return 1; +- } +- if (fstat(fileno(conf), lst) != 0) +- memset(lst, 0, sizeof *lst); /* avoid stale data, no warning */ +- +- while(fgets(lbuf, sizeof lbuf, conf)) { +- if(*lbuf == '#' || isspace(*lbuf)) +- continue; /* skip comments, white space lines, etc. */ +- strtok(lbuf, " \t\n\r\f"); /* terminate buffer at first whitespace */ +- if(!strncmp(lbuf, "include=", 8)) { +- /* +- * allow include files, useful for centralizing tacacs +- * server IP address and secret. When running non-privileged, +- * may not be able to read one or more config files. +- */ +- if(lbuf[8]) +- (void)nss_tacplus_config(errnop, &lbuf[8], top+1); +- } +- else if(!strncmp(lbuf, "debug=", 6)) +- debug = strtoul(lbuf+6, NULL, 0); +- else if (!strncmp (lbuf, "user_homedir=", 13)) +- use_tachome = (uint16_t)strtoul(lbuf+13, NULL, 0); +- else if (!strncmp (lbuf, "timeout=", 8)) { +- tac_timeout = (int)strtoul(lbuf+8, NULL, 0); +- if (tac_timeout < 0) /* explict neg values disable poll() use */ +- tac_timeout = 0; +- else /* poll() only used if timeout is explictly set */ +- tac_readtimeout_enable = 1; +- } +- /* +- * This next group is here to prevent a warning in the +- * final "else" case. We don't need them, but if there +- * is a common included file, we might see them. +- */ +- else if(!strncmp(lbuf, "service=", 8) || +- !strncmp(lbuf, "protocol=", 9) || +- !strncmp(lbuf, "login=", 6)) +- ; +- else if(!strncmp(lbuf, "secret=", 7)) { +- int i; +- /* no need to complain if too many on this one */ +- if(tac_key_no < TAC_PLUS_MAXSERVERS) { +- if((tac_srv[tac_key_no].key = strdup(lbuf+7))) +- tac_key_no++; +- else +- syslog(LOG_ERR, "%s: unable to copy server secret %s", +- nssname, lbuf+7); +- } +- /* handle case where 'secret=' was given after a 'server=' +- * parameter, fill in the current secret */ +- for(i = tac_srv_no-1; i >= 0; i--) { +- if (tac_srv[i].key) +- continue; +- tac_srv[i].key = strdup(lbuf+7); +- } +- } +- else if(!strncmp(lbuf, "exclude_users=", 14)) { +- /* +- * Don't lookup users in this comma-separated list for both +- * robustness and performnce. Typically root and other commonly +- * used local users. If set, we also look up the uids +- * locally, and won't do remote lookup on those uids either. +- */ +- exclude_users = strdup(lbuf+14); +- } +- else if(!strncmp(lbuf, "min_uid=", 8)) { +- /* +- * Don't lookup uids that are local, typically set to either +- * 0 or smallest always local user's uid +- */ +- unsigned long uid; +- char *valid; +- uid = strtoul(lbuf+8, &valid, 0); +- if (valid > (lbuf+8)) +- min_uid = (uid_t)uid; +- } +- else if(!strncmp(lbuf, "vrf=", 4)) +- strncpy(vrfname, lbuf + 4, sizeof(vrfname)); +- else if(!strncmp(lbuf, "server=", 7)) { +- if(tac_srv_no < TAC_PLUS_MAXSERVERS) { +- struct addrinfo hints, *servers, *server; ++ char *token; ++ char delim[] = " ,\t\n\r\f"; ++ ++ token = strsep(&srv_buf, delim); ++ while(token) { ++ if('\0' != token) { ++ if(!strncmp(token, "server=", 7)) { ++ struct addrinfo hints, *server; + int rv; +- char *port, server_buf[sizeof lbuf]; ++ char *srv, *port; + + memset(&hints, 0, sizeof hints); +- hints.ai_family = AF_UNSPEC; /* use IPv4 or IPv6, whichever */ ++ hints.ai_family = AF_UNSPEC; + hints.ai_socktype = SOCK_STREAM; + +- strcpy(server_buf, lbuf + 7); +- +- port = strchr(server_buf, ':'); +- if(port != NULL) { ++ srv = token + 7; ++ port = strchr(srv, ':'); ++ if(port) { + *port = '\0'; +- port++; ++ port++; + } +- if((rv = getaddrinfo(server_buf, (port == NULL) ? +- "49" : port, &hints, &servers)) == 0) { +- for(server = servers; server != NULL && +- tac_srv_no < TAC_PLUS_MAXSERVERS; +- server = server->ai_next) { ++ ++ if((rv = getaddrinfo(srv, (port == NULL) ? "49" : port, &hints, ++ &server)) == 0) { ++ if(server) { ++ if(tac_srv[tac_srv_no].addr) ++ freeaddrinfo(tac_srv[tac_srv_no].addr); ++ if(tac_srv[tac_srv_no].key) ++ free(tac_srv[tac_srv_no].key); ++ memset(tac_srv + tac_srv_no, 0, sizeof(tacplus_server_t)); ++ + tac_srv[tac_srv_no].addr = server; +- /* use current key, if our index not yet set */ +- if(tac_key_no && !tac_srv[tac_srv_no].key) +- tac_srv[tac_srv_no].key = +- strdup(tac_srv[tac_key_no-1].key); +- tac_srv_no++; ++ } ++ else { ++ syslog(LOG_ERR, "%s: server NULL", nssname); + } + } + else { +- syslog(LOG_ERR, +- "%s: skip invalid server: %s (getaddrinfo: %s)", +- nssname, server_buf, gai_strerror(rv)); ++ syslog(LOG_ERR, "%s: invalid server: %s (getaddrinfo: %s)", ++ nssname, srv, gai_strerror(rv)); ++ return -1; ++ } ++ } ++ else if(!strncmp(token, "secret=", 7)) { ++ if(tac_srv[tac_srv_no].key) ++ free(tac_srv[tac_srv_no].key); ++ tac_srv[tac_srv_no].key = strdup(token + 7); ++ } ++ else if(!strncmp(token, "timeout=", 8)) { ++ tac_srv[tac_srv_no].timeout = (int)strtoul(token + 8, NULL, 0); ++ if(tac_srv[tac_srv_no].timeout < 0) ++ tac_srv[tac_srv_no].timeout = 0; ++ /* Limit timeout to make sure upper application not wait ++ * for a long time*/ ++ if(tac_srv[tac_srv_no].timeout > 5) ++ tac_srv[tac_srv_no].timeout = 5; ++ } ++ } ++ token = strsep(&srv_buf, delim); ++ } ++ ++ return 0; ++} ++ ++static int parse_user_priv(char *buf) ++{ ++ char *token; ++ char delim[] = ";\n\r"; ++ int priv = 0; ++ int gid = 0; ++ char *info = NULL; ++ char *group = NULL; ++ char *shell = NULL; ++ ++ token = strsep(&buf, delim); ++ while(token) { ++ if('\0' != token) { ++ if(!strncmp(token, "user_priv=", 10)) { ++ priv = (int)strtoul(token + 10, NULL, 0); ++ if(priv > MAX_TACACS_USER_PRIV || priv < MIN_TACACS_USER_PRIV) ++ { ++ priv = 0; ++ syslog(LOG_WARNING, "%s: user_priv %d out of range", ++ nssname, priv); + } + } +- else { +- syslog(LOG_WARNING, "%s: maximum number of servers (%d) " +- "exceeded, skipping", nssname, TAC_PLUS_MAXSERVERS); ++ else if(!strncmp(token, "pw_info=", 8)) { ++ if(!info) ++ info = strdup(token + 8); ++ } ++ else if(!strncmp(token, "gid=", 4)) { ++ gid = (int)strtoul(token + 4, NULL, 0); ++ } ++ else if(!strncmp(token, "group=", 6)) { ++ if(!group) ++ group = strdup(token + 6); ++ } ++ else if(!strncmp(token, "shell=", 6)) { ++ if(!shell) ++ shell = strdup(token + 6); + } + } +- else if(debug) /* ignore unrecognized lines, unless debug on */ +- syslog(LOG_WARNING, "%s: unrecognized parameter: %s", +- nssname, lbuf); ++ token = strsep(&buf, delim); + } +- fclose(conf); + ++ if(priv && gid && info && group && shell) { ++ useradd_info_t *user = &useradd_grp_list[priv]; ++ if(user->info) ++ free(user->info); ++ if(user->secondary_grp) ++ free(user->secondary_grp); ++ if(user->shell) ++ free(user->shell); ++ ++ user->gid = gid; ++ user->info = info; ++ user->secondary_grp = group; ++ user->shell = shell; ++ syslog(LOG_DEBUG, "%s: user_priv=%d info=%s gid=%d group=%s shell=%s", ++ nssname, priv, info, gid, group, shell); ++ } ++ else { ++ if(info) ++ free(info); ++ if(group) ++ free(group); ++ if(shell) ++ free(shell); ++ } + + return 0; + } + +-/* +- * Separate function so we can print first time we try to connect, +- * rather than during config. +- * Don't print at config, because often the uid lookup is one we +- * skip due to min_uid, so no reason to clutter the log. +- */ +-static void print_servers(void) ++static void init_useradd_info() + { +- static int printed = 0; +- int n; +- +- if (printed || !debug) +- return; +- printed = 1; +- +- if(tac_srv_no == 0) +- syslog(LOG_DEBUG, "%s:%s: no TACACS %s in config (or no perm)," +- " giving up", +- nssname, __FUNCTION__, tac_srv_no ? "service" : +- (*tac_service ? "server" : "service and no server")); +- +- for(n = 0; n < tac_srv_no; n++) +- syslog(LOG_DEBUG, "%s: server[%d] { addr=%s, key='%s' }", nssname, +- n, tac_srv[n].addr ? tac_ntop(tac_srv[n].addr->ai_addr) +- : "unknown", tac_srv[n].key); ++ useradd_info_t *user; ++ ++ user = &useradd_grp_list[MIN_TACACS_USER_PRIV]; ++ user->gid = 100; ++ user->info = strdup("remote_user"); ++ user->secondary_grp = strdup("users"); ++ user->shell = strdup("/bin/bash"); ++ ++ user = &useradd_grp_list[MAX_TACACS_USER_PRIV]; ++ user->gid = 1000; ++ user->info = strdup("remote_user_su"); ++ user->secondary_grp = strdup("sudo,docker"); ++ user->shell = strdup("/bin/bash"); ++} ++ ++static int parse_config(const char *file) ++{ ++ FILE *fp; ++ char buf[512] = {0}; ++ ++ init_useradd_info(); ++ fp = fopen(file, "r"); ++ if(!fp) { ++ syslog(LOG_ERR, "%s: %s fopen failed", nssname, file); ++ return NSS_STATUS_UNAVAIL; ++ } ++ ++ debug = false; ++ tac_srv_no = 0; ++ while(fgets(buf, sizeof buf, fp)) { ++ if('#' == *buf || isspace(*buf)) ++ continue; ++ ++ if(!strncmp(buf, "debug=on", 8)) { ++ debug = true; ++ } ++ else if(!strncmp(buf, "many_to_one=y", 13)) { ++ many_to_one = true; ++ } ++ else if(!strncmp(buf, "user_priv=", 10)) { ++ parse_user_priv(buf); ++ } ++ else if(!strncmp(buf, "server=", 7)) { ++ if(TAC_PLUS_MAXSERVERS <= tac_srv_no) { ++ syslog(LOG_ERR, "%s: tac server num is more than %d", ++ nssname, TAC_PLUS_MAXSERVERS); ++ } ++ else if(0 == parse_tac_server(buf)) ++ ++tac_srv_no; ++ } ++ } ++ fclose(fp); ++ ++ if(debug) { ++ int n; ++ useradd_info_t *user; ++ ++ for(n = 0; n < tac_srv_no; n++) { ++ syslog(LOG_DEBUG, "%s: server[%d] { addr=%s, key=%c*****, timeout=%d }", ++ nssname, n, tac_ntop(tac_srv[n].addr->ai_addr), ++ tac_srv[n].key[0], tac_srv[n].timeout); ++ } ++ syslog(LOG_DEBUG, "%s: many_to_one %s", nssname, 1 == many_to_one ++ ? "enable" : "disable"); ++ for(n = MIN_TACACS_USER_PRIV; n <= MAX_TACACS_USER_PRIV; n++) { ++ user = &useradd_grp_list[n]; ++ if(user) { ++ syslog(LOG_DEBUG, "%s: user_priv[%d] { gid=%d, info=%s, group=%s, shell=%s }", ++ nssname, n, user->gid, NULL == user->info ? "NULL" : user->info, ++ NULL == user->secondary_grp ? "NULL" : user->secondary_grp, ++ NULL == user->shell ? "NULL" : user->shell); ++ } ++ } ++ } ++ ++ return 0; + } + + /* +@@ -324,15 +304,13 @@ static void print_servers(void) + */ + static int + pwcopy(char *buf, size_t len, struct passwd *srcpw, struct passwd *destpw, +- const char *usename, uint16_t tachome) ++ const char *usename) + { +- int needlen, cnt, origlen = len; +- char *shell; ++ size_t needlen; ++ int cnt; + +- if(!usename) { ++ if(!usename) + usename = srcpw->pw_name; +- tachome = 0; /* early lookups; no tachome */ +- } + + needlen = usename ? strlen(usename) + 1 : 1 + + srcpw->pw_dir ? strlen(srcpw->pw_dir) + 1 : 1 + +@@ -341,8 +319,8 @@ pwcopy(char *buf, size_t len, struct passwd *srcpw, struct passwd *destpw, + srcpw->pw_passwd ? strlen(srcpw->pw_passwd) + 1 : 1; + if(needlen > len) { + if(debug) +- syslog(LOG_DEBUG, "%s provided password buffer too small (%ld<%d)", +- nssname, (long)len, needlen); ++ syslog(LOG_DEBUG, "%s provided password buffer too small (%ld<%ld)", ++ nssname, (long)len, (long)needlen); + return 1; + } + +@@ -354,21 +332,14 @@ pwcopy(char *buf, size_t len, struct passwd *srcpw, struct passwd *destpw, + cnt++; /* allow for null byte also */ + buf += cnt; + len -= cnt; +- cnt = snprintf(buf, len, "%s", srcpw->pw_passwd ? srcpw->pw_passwd : ""); ++ /* If many-to-one mapping, set pw_passwd "a" for pam_account success */ ++ cnt = snprintf(buf, len, "%s", 0 == many_to_one ? "x" : "a"); + destpw->pw_passwd = buf; + cnt++; + buf += cnt; + len -= cnt; + cnt = snprintf(buf, len, "%s", srcpw->pw_shell ? srcpw->pw_shell : ""); + destpw->pw_shell = buf; +- shell = strrchr(buf, '/'); +- shell = shell ? shell+1 : buf; +- if (tachome && *shell == 'r') { +- tachome = 0; +- if(debug > 1) +- syslog(LOG_DEBUG, "%s tacacs login %s with user_homedir not allowed; " +- "shell is %s", nssname, srcpw->pw_name, buf); +- } + cnt++; + buf += cnt; + len -= cnt; +@@ -377,148 +348,227 @@ pwcopy(char *buf, size_t len, struct passwd *srcpw, struct passwd *destpw, + cnt++; + buf += cnt; + len -= cnt; +- if (tachome && usename) { +- char *slash, dbuf[strlen(srcpw->pw_dir) + strlen(usename)]; +- snprintf(dbuf, sizeof dbuf, "%s", srcpw->pw_dir ? srcpw->pw_dir : ""); +- slash = strrchr(dbuf, '/'); +- if (slash) { +- slash++; +- snprintf(slash, sizeof dbuf - (slash-dbuf), "%s", usename); +- } +- cnt = snprintf(buf, len, "%s", dbuf); +- } +- else +- cnt = snprintf(buf, len, "%s", srcpw->pw_dir ? srcpw->pw_dir : ""); ++ cnt = snprintf(buf, len, "%s", srcpw->pw_dir ? srcpw->pw_dir : ""); + destpw->pw_dir = buf; + cnt++; + buf += cnt; + len -= cnt; +- if(len < 0) { +- if(debug) +- syslog(LOG_DEBUG, "%s provided password buffer too small (%ld<%d)", +- nssname, (long)origlen, origlen-(int)len); +- return 1; +- } + + return 0; + } + + /* +- * Find the username or the matching tacacs privilege user in /etc/passwd +- * We use fgetpwent() so we can check the local file, always. +- * This could cause problems if somebody is using local users, ldap, and tacacs, +- * but we just require that the mapped user always be a local user. Since the +- * local user password isn't supposed to be used, that should be OK. +- * +- * We shouldn't normally find the username, because tacacs lookup should be +- * configured to follow local in nsswitch.conf, but somebody may configure the +- * other way, so we look for both the given user, and our "matching" user name +- * based on the tacacs authorization level. +- * +- * If not found, then try to map to a localuser tacacsN where N <= to the +- * TACACS+ privilege level, using the APIs in libtacplus_map.so +- * algorithm in update_mapuser() +- * Returns 0 on success, else 1 ++ * If useradd finished, user name should be deleted in conf. + */ +-static int +-find_pw_userpriv(unsigned priv, struct pwbuf *pb) ++static int delete_conf_line(const char *name) + { +- FILE *pwfile; +- struct passwd upw, tpw, *ent; +- int matches, ret, retu, rett; +- unsigned origpriv = priv; +- char ubuf[pb->buflen], tbuf[pb->buflen]; +- char tacuser[9]; /* "tacacs" followed by 1-2 digits */ +- +- tacuser[0] = '\0'; +- +- pwfile = fopen("/etc/passwd", "r"); +- if(!pwfile) { +- syslog(LOG_WARNING, "%s: failed to open /etc/passwd: %m", nssname); +- return 1; ++ FILE *fp, *fp_tmp; ++ char line[128]; ++ char del_line[128]; ++ int len = strlen(name); ++ ++ if(len >= 126) { ++ syslog(LOG_ERR, "%s: user name %s out of range 128", nssname, name); ++ return -1; ++ } ++ else { ++ snprintf(del_line, 128, "%s\n", name); + } + +-recheck: +- snprintf(tacuser, sizeof tacuser, "tacacs%u", priv); +- tpw.pw_name = upw.pw_name = NULL; +- retu = 0, rett = 0; +- for(matches=0; matches < 2 && (ent = fgetpwent(pwfile)); ) { +- if(!ent->pw_name) +- continue; /* shouldn't happen */ +- if(!strcmp(ent->pw_name, pb->name)) { +- retu = pwcopy(ubuf, sizeof(ubuf), ent, &upw, NULL, use_tachome); +- matches++; +- } +- else if(!strcmp(ent->pw_name, tacuser)) { +- rett = pwcopy(tbuf, sizeof(tbuf), ent, &tpw, NULL, use_tachome); +- matches++; ++ fp = fopen(user_conf, "r"); ++ if(!fp) { ++ syslog(LOG_ERR, "%s: %s fopen failed", nssname, user_conf); ++ return NSS_STATUS_UNAVAIL; ++ } ++ fp_tmp = fopen(user_conf_tmp, "w"); ++ if(!fp_tmp) { ++ syslog(LOG_ERR, "%s: %s fopen failed", nssname, user_conf_tmp); ++ fclose(fp); ++ return NSS_STATUS_UNAVAIL; ++ } ++ ++ while(fgets(line, sizeof line, fp)) { ++ if(strcmp(line, del_line)) { ++ fprintf(fp_tmp, "%s", line); + } + } +- if(!matches && priv > 0) { +- priv--; +- rewind(pwfile); +- goto recheck; +- } +- ret = 1; +- fclose(pwfile); +- if(matches) { +- if(priv != origpriv && debug) +- syslog(LOG_DEBUG, "%s: local user not found at privilege=%u," +- " using %s", nssname, origpriv, tacuser); +- if(upw.pw_name && !retu) +- ret = pwcopy(pb->buf, pb->buflen, &upw, pb->pw, pb->name, +- use_tachome); +- else if(tpw.pw_name && !rett) +- ret = pwcopy(pb->buf, pb->buflen, &tpw, pb->pw, pb->name, +- use_tachome); +- } +- if(ret) +- *pb->errnop = ERANGE; ++ fclose(fp_tmp); ++ fclose(fp); + +- return ret; ++ if(0 != remove(user_conf) || 0 != rename(user_conf_tmp, user_conf)) { ++ syslog(LOG_ERR, "%s: %s rewrite failed", nssname, user_conf); ++ return -1; ++ } ++ ++ return 0; + } + + /* +- * This is similar to find_pw_userpriv(), but passes in a fixed +- * name for UID lookups, where we have the mapped name from the +- * map file, so trying multiple tacacsN users would be wrong. +- * Some commonality, but ugly to factor +- * Only applies to mapped users +- * returns 0 on success ++ * If not found in local, look up in tacacs user conf. If user name is not in ++ * conf, it will be written in conf and created by command 'useradd'. When ++ * useradd command use getpwnam(), it will return when username found in conf. + */ +-static int +-find_pw_user(const char *logname, const char *tacuser, struct pwbuf *pb, +- uint16_t usetachome) ++static int create_local_user(const char *name, int level) + { +- FILE *pwfile; +- struct passwd *ent; +- int ret = 1; ++ FILE *fp; ++ useradd_info_t *user; ++ char buf[512]; ++ int len = 512; ++ int lvl, cnt; ++ bool found = false; ++ ++ fp = fopen(user_conf, "ab+"); ++ if(!fp) { ++ syslog(LOG_ERR, "%s: %s fopen failed", nssname, user_conf); ++ return -1; ++ } + +- if(!tacuser) { ++ while(fgets(buf, sizeof buf, fp)) { ++ if('#' == *buf || isspace(*buf)) ++ continue; ++ // Delete line break ++ cnt = strlen(buf); ++ buf[cnt - 1] = '\0'; ++ if(!strcmp(buf, name)) { ++ found = true; ++ break; ++ } ++ } ++ ++ /* ++ * If user is found in user_conf, it means that getpwnam is called by ++ * useradd in this NSS module. ++ */ ++ if(found) { + if(debug) +- syslog(LOG_DEBUG, "%s: passed null username, failing", nssname); ++ syslog(LOG_DEBUG, "%s: %s found in %s", nssname, name, user_conf); ++ fclose(fp); + return 1; + } + +- pwfile = fopen("/etc/passwd", "r"); +- if(!pwfile) { +- syslog(LOG_WARNING, "%s: failed to open /etc/passwd: %m", +- nssname); +- return 1; ++ snprintf(buf, len, "%s\n", name); ++ if(EOF == fputs(buf, fp)) { ++ syslog(LOG_ERR, "%s: %s write local user failed", nssname, name); ++ fclose(fp); ++ return -1; ++ } ++ fclose(fp); ++ ++ lvl = level; ++ while(lvl >= MIN_TACACS_USER_PRIV) { ++ user = &useradd_grp_list[lvl]; ++ if(user->info && user->secondary_grp && user->shell) { ++ snprintf(buf, len, "useradd -G %s \"%s\" -g %d -c \"%s\" -d /home/%s -m -s %s", ++ user->secondary_grp, name, user->gid, user->info, name, user->shell); ++ fp = popen(buf, "r"); ++ if(!fp || -1 == pclose(fp)) { ++ syslog(LOG_ERR, "%s: useradd popen failed errno=%d %s", ++ nssname, errno, strerror(errno)); ++ delete_conf_line(name); ++ return -1; ++ } ++ if(debug) ++ syslog(LOG_DEBUG, "%s: create local user %s success", nssname, name); ++ delete_conf_line(name); ++ return 0; ++ } ++ lvl--; ++ } ++ ++ return -1; ++} ++ ++/* ++ * Lookup user in /etc/passwd, and fill up passwd info if found. ++ */ ++static int lookup_pw_local(char* username, struct pwbuf *pb, bool *found) ++{ ++ FILE *fp; ++ struct passwd *pw = NULL; ++ int ret = 0; ++ ++ if(!username) { ++ syslog(LOG_ERR, "%s: username invalid in check passwd", nssname); ++ return -1; + } + +- pb->pw->pw_name = NULL; /* be paranoid */ +- for(ret = 1; ret && (ent = fgetpwent(pwfile)); ) { +- if(!ent->pw_name) +- continue; /* shouldn't happen */ +- if(!strcmp(ent->pw_name, tacuser)) { +- ret = pwcopy(pb->buf, pb->buflen, ent, pb->pw, logname, usetachome); ++ fp = fopen("/etc/passwd", "r"); ++ if(!fp) { ++ syslog(LOG_ERR, "%s: /etc/passwd fopen failed", nssname); ++ return -1; ++ } ++ ++ while(0 != (pw = fgetpwent(fp))) { ++ if(!strcmp(pw->pw_name, username)) { ++ *found = true; ++ ret = pwcopy(pb->buf, pb->buflen, pw, pb->pw, username); ++ if(ret) ++ *pb->errnop = ERANGE; + break; + } + } +- fclose(pwfile); +- if(ret) +- *pb->errnop = ERANGE; ++ fclose(fp); ++ return ret; ++} ++ ++/* ++ * Lookup local user passwd info for TACACS+ user. If not found, local user will ++ * be created by user mapping strategy. ++ */ ++static int lookup_user_pw(struct pwbuf *pb, int level) ++{ ++ char *username = NULL; ++ char buf[128]; ++ int len = 128; ++ bool found = false; ++ int ret = 0; ++ ++ if(level < MIN_TACACS_USER_PRIV || level > MAX_TACACS_USER_PRIV) { ++ syslog(LOG_ERR, "%s: TACACS+ user %s privilege %d invalid", nssname, pb->name, level); ++ return -1; ++ } ++ ++ /* ++ * If many-to-one user mapping disable, create local user for each TACACS+ user ++ * The username of local user and TACACS+ user is the same. If many-to-one enable, ++ * look up the mapped local user name and passwd info. ++ */ ++ if(0 == many_to_one) { ++ username = pb->name; ++ } ++ else { ++ int lvl = level; ++ useradd_info_t *user; ++ ++ while(lvl >= MIN_TACACS_USER_PRIV) { ++ user = &useradd_grp_list[lvl]; ++ if(user->info && user->secondary_grp && user->shell) { ++ snprintf(buf, len, "%s", user->info); ++ username = buf; ++ if(debug) ++ syslog(LOG_DEBUG, "%s: %s mapping local user %s", nssname, ++ pb->name, username); ++ break; ++ } ++ lvl--; ++ } ++ } ++ ++ ret = lookup_pw_local(username, pb, &found); ++ if(debug) ++ syslog(LOG_DEBUG, "%s: %s passwd %s found in local", nssname, username, ++ found ? "is" : "isn't"); ++ if(0 != ret || found) ++ return ret; ++ ++ if(0 != create_local_user(username, level)) ++ return -1; ++ ++ ret = lookup_pw_local(username, pb, &found); ++ if(0 == ret && !found) { ++ syslog(LOG_ERR, "%s: %s not found in local after useradd", nssname, pb->name); ++ ret = -1; ++ } + + return ret; + } +@@ -532,6 +582,7 @@ static int + got_tacacs_user(struct tac_attrib *attr, struct pwbuf *pb) + { + unsigned long priv_level = 0; ++ int ret; + + while(attr != NULL) { + /* we are looking for the privilege attribute, can be in several forms, +@@ -550,14 +601,20 @@ got_tacacs_user(struct tac_attrib *attr, struct pwbuf *pb) + /* if this fails, we leave priv_level at 0, which is + * least privileged, so that's OK, but at least report it + */ +- if(ok == val && debug) +- syslog(LOG_WARNING, "%s: non-numeric privilege for %s, (%s)", +- nssname, pb->name, attr->attr); ++ if(debug) ++ syslog(LOG_DEBUG, "%s: privilege for %s, (%lu)", ++ nssname, pb->name, priv_level); + } + attr = attr->next; + } + +- return find_pw_userpriv(priv_level, pb); ++ ret = lookup_user_pw(pb, priv_level); ++ if(!ret && debug) ++ syslog(LOG_DEBUG, "%s: pw_name=%s, pw_passwd=%s, pw_shell=%s, dir=%s", ++ nssname, pb->pw->pw_name, pb->pw->pw_passwd, pb->pw->pw_shell, ++ pb->pw->pw_dir); ++ ++ return ret; + } + + /* +@@ -570,9 +627,13 @@ connect_tacacs(struct tac_attrib **attr, int srvr) + { + int fd; + ++ if(!*tac_service) /* reported at config file processing */ ++ return -1; ++ + fd = tac_connect_single(tac_srv[srvr].addr, tac_srv[srvr].key, NULL, +- vrfname[0]?vrfname:NULL); ++ tac_srv[srvr].timeout); + if(fd >= 0) { ++ *attr = NULL; /* so tac_add_attr() allocates memory */ + tac_add_attrib(attr, "service", tac_service); + if(tac_protocol[0]) + tac_add_attrib(attr, "protocol", tac_protocol); +@@ -598,34 +659,9 @@ lookup_tacacs_user(struct pwbuf *pb) + { + struct areply arep; + int ret = 1, done = 0; +- struct tac_attrib *attr = NULL; ++ struct tac_attrib *attr; + int tac_fd, srvr; + +- if (exclude_users) { +- char *user, *list; +- list = strdup(exclude_users); +- if (list) { +- static const char *delim = ", \t\n"; +- bool islocal = 0; +- user = strtok(list, delim); +- list = NULL; +- while (user) { +- if(!strcmp(user, pb->name)) { +- islocal = 1; +- break; +- } +- user = strtok(NULL, delim); +- } +- free(list); +- if (islocal) +- return 2; +- } +- } +- +- if(!*tac_service) /* reported at config file processing */ +- return ret; +- print_servers(); +- + for(srvr=0; srvr < tac_srv_no && !done; srvr++) { + arep.msg = NULL; + arep.attr = NULL; +@@ -636,14 +672,13 @@ lookup_tacacs_user(struct pwbuf *pb) + syslog(LOG_WARNING, "%s: failed to connect TACACS+ server %s," + " ret=%d: %m", nssname, tac_srv[srvr].addr ? + tac_ntop(tac_srv[srvr].addr->ai_addr) : "unknown", tac_fd); +- tac_free_attrib(&attr); + continue; + } +- ret = tac_author_send(tac_fd, pb->name, "", tac_rhost, attr); ++ ret = tac_author_send(tac_fd, pb->name, "", "", attr); + if(ret < 0) { + if(debug) +- syslog(LOG_WARNING, "%s: TACACS+ server %s authorization failed (%d) " +- " user (%s)", nssname, tac_srv[srvr].addr ? ++ syslog(LOG_WARNING, "%s: TACACS+ server %s send failed (%d) for" ++ " user %s: %m", nssname, tac_srv[srvr].addr ? + tac_ntop(tac_srv[srvr].addr->ai_addr) : "unknown", ret, + pb->name); + } +@@ -668,14 +703,11 @@ lookup_tacacs_user(struct pwbuf *pb) + if(arep.status == AUTHOR_STATUS_PASS_ADD || + arep.status == AUTHOR_STATUS_PASS_REPL) { + ret = got_tacacs_user(arep.attr, pb); +- if(debug>1) ++ if(debug) + syslog(LOG_DEBUG, "%s: TACACS+ server %s successful for user %s." + " local lookup %s", nssname, + tac_ntop(tac_srv[srvr].addr->ai_addr), pb->name, +- ret?"OK":"no match"); +- else if(debug) +- syslog(LOG_DEBUG, "%s: TACACS+ server %s successful for user %s", +- nssname, tac_ntop(tac_srv[srvr].addr->ai_addr), pb->name); ++ ret == 0?"OK":"no match"); + done = 1; /* break out of loop after arep cleanup */ + } + else { +@@ -692,30 +724,12 @@ lookup_tacacs_user(struct pwbuf *pb) + tac_free_attrib(&arep.attr); + } + +- return ret < 0? 1 : ret; +-} +- +-static int +-lookup_mapped_uid(struct pwbuf *pb, uid_t uid, uid_t auid, int session) +-{ +- char *loginname, mappedname[256]; +- uint16_t flag; +- +- mappedname[0] = '\0'; +- loginname = lookup_mapuid(uid, auid, session, +- mappedname, sizeof mappedname, &flag); +- if(loginname) +- return find_pw_user(loginname, mappedname, pb, flag & MAP_USERHOMEDIR); +- return 1; ++ return ret; + } + + /* + * This is an NSS entry point. +- * We implement getpwnam(), because we remap from the tacacs login +- * to the local tacacs0 ... tacacs15 users for all other info, and so +- * the normal order of "passwd tacplus" (possibly with ldap or anything +- * else prior to tacplus) will mean we only get used when there isn't +- * a local user to be found. ++ * We implement getpwnam(), because we remap from the tacacs. + * + * We try the lookup to the tacacs server first. If we can't make a + * connection to the server for some reason, we also try looking up +@@ -730,20 +744,25 @@ enum nss_status _nss_tacplus_getpwnam_r(const char *name, struct passwd *pw, + int result; + struct pwbuf pbuf; + +- result = nss_tacplus_config(errnop, config_file, 1); +- conf_parsed = result == 0 ? 2 : 1; ++ /* ++ * When filename completion is used with the tab key in bash, getpwnam ++ * is invoked. And the parameter "name" is '*'. In order not to connect to ++ * TACACS+ server frequently, check user name whether is valid. ++ */ ++ if(!strcmp(name, "*")) ++ return NSS_STATUS_NOTFOUND; + +- get_remote_addr(); ++ result = parse_config(config_file); + +- if(result) { /* no config file, no servers, etc. */ +- /* this is a debug because privileges may not allow access */ +- if(debug) +- syslog(LOG_DEBUG, "%s: bad config or server line for nss_tacplus", ++ if(result) { ++ syslog(LOG_ERR, "%s: bad config or server line for nss_tacplus", ++ nssname); ++ } ++ else if(0 == tac_srv_no) { ++ syslog(LOG_WARNING, "%s: no tacacs server in config for nss_tacplus", + nssname); + } + else { +- int lookup; +- + /* marshal the args for the lower level functions */ + pbuf.name = (char *)name; + pbuf.pw = pw; +@@ -751,126 +770,13 @@ enum nss_status _nss_tacplus_getpwnam_r(const char *name, struct passwd *pw, + pbuf.buflen = buflen; + pbuf.errnop = errnop; + +- lookup = lookup_tacacs_user(&pbuf); +- if(!lookup) ++ if(0 == lookup_tacacs_user(&pbuf)) { + status = NSS_STATUS_SUCCESS; +- else if(lookup == 1) { /* 2 means exclude_users match */ +- uint16_t flag; +- /* +- * If we can't contact a tacacs server (either not configured, or +- * more likely, we aren't running as root and the config for the +- * server is not readable by our uid for security reasons), see if +- * we can find the user via the mapping database, and if so, use +- * that. This will work for non-root users as long as the requested +- * name is in use (that is, logged in), which will be the most +- * common case of wanting to use the original login name by non-root +- * users. +- */ +- char *mapname = lookup_mapname(name, -1, -1, NULL, &flag); +- if(mapname != name && !find_pw_user(name, mapname, &pbuf, +- flag & MAP_USERHOMEDIR)) +- status = NSS_STATUS_SUCCESS; ++ if(debug) ++ syslog(LOG_DEBUG, "%s: name=%s, pw_name=%s, pw_passwd=%s, pw_shell=%s", ++ nssname, name, pw->pw_name, pw->pw_passwd, pw->pw_shell); + } + } +- return status; +-} + +-/* +- * This is an NSS entry point. +- * We implement getpwuid(), for anything that wants to get the original +- * login name from the uid. +- * If it matches an entry in the map, we use that data to replace +- * the data from the local passwd file (not via NSS). +- * locally from the map. +- * +- * This can be made to work 2 different ways, and we need to choose +- * one, or make it configurable. +- * +- * 1) Given a valid auid and a session id, and a mapped user logged in, +- * we'll match only that user. That is, we can only do the lookup +- * successfully for child processes of the mapped tacacs login, and +- * only while still logged in (map entry is valid). +- * +- * 2) Use auid/session wildcards, and and always match on the first valid +- * tacacs map file entry. This means if two tacacs users are logged in +- * at the same privilege level at the same time, uid lookups for ps, ls, +- * etc. will return the first (in the map file, not necessarily first +- * logged in) mapped name. +- * +- * For now, if auid and session are set, I try them, and if that lookup +- * fails, try the wildcard. +- * +- * Only works while the UID is in use for a mapped user, and only +- * for processes invoked from that session. Other callers will +- * just get the files, ldap, or nis entry for the UID +- * Only works while the UID is in use for a mapped user, and returns +- * the first match from the mapped users. +- */ +-enum nss_status _nss_tacplus_getpwuid_r(uid_t uid, struct passwd *pw, +- char *buffer, size_t buflen, int *errnop) +-{ +- struct pwbuf pb; +- enum nss_status status = NSS_STATUS_NOTFOUND; +- int session, ret; +- uid_t auid; +- +- ret = nss_tacplus_config(errnop, config_file, 1); +- conf_parsed = ret == 0 ? 2 : 1; +- +- if (min_uid != ~0U && uid < min_uid) { +- if(debug > 1) +- syslog(LOG_DEBUG, "%s: uid %u < min_uid %u, don't lookup", +- nssname, uid, min_uid); +- return status; +- } +- +- auid = audit_getloginuid(); /* audit_setloginuid not called */ +- session = map_get_sessionid(); +- +- /* marshal the args for the lower level functions */ +- pb.pw = pw; +- pb.buf = buffer; +- pb.buflen = buflen; +- pb.errnop = errnop; +- pb.name = NULL; +- +- /* +- * the else case will only be called if we don't have an auid or valid +- * sessionid, since otherwise the first call will be using wildcards, +- * since the getloginuid and get_sessionid calls will "fail". +- */ +- if(!lookup_mapped_uid(&pb, uid, auid, session)) +- status = NSS_STATUS_SUCCESS; +- else if((auid != (uid_t)-1 || session != ~0U) && +- !lookup_mapped_uid(&pb, uid, (uid_t)-1, ~0)) +- status = NSS_STATUS_SUCCESS; + return status; + } +- +-static void get_remote_addr(void) +-{ +- struct sockaddr_storage addr; +- socklen_t len = sizeof addr; +- char ipstr[INET6_ADDRSTRLEN]; +- +- /* This is so we can fill in the rhost field when we talk to the +- * TACACS+ server, when it's an ssh connection, so sites that refuse +- * authorization unless from specific IP addresses will get that +- * information. It's pretty much of a hack, but it works. +- */ +- if (getpeername(0, (struct sockaddr*)&addr, &len) == -1) +- return; +- +- *ipstr = 0; +- if (addr.ss_family == AF_INET) { +- struct sockaddr_in *s = (struct sockaddr_in *)&addr; +- inet_ntop(AF_INET, &s->sin_addr, ipstr, sizeof ipstr); +- } else { +- struct sockaddr_in6 *s = (struct sockaddr_in6 *)&addr; +- inet_ntop(AF_INET6, &s->sin6_addr, ipstr, sizeof ipstr); +- } +- +- snprintf(tac_rhost, sizeof tac_rhost, "%s", ipstr); +- if(debug > 1 && tac_rhost[0]) +- syslog(LOG_DEBUG, "%s: rhost=%s", nssname, tac_rhost); +-} +diff --git a/tacplus_nss.conf b/tacplus_nss.conf +index bb4eb1e..7cb756f 100644 +--- a/tacplus_nss.conf ++++ b/tacplus_nss.conf +@@ -1,53 +1,50 @@ +-#%NSS_TACPLUS-1.0 +-# Install this file as /etc/tacplus_nss.conf +-# Edit /etc/nsswitch.conf to add tacplus to the passwd lookup, similar to this +-# where tacplus precede compat (or files), and depending on local policy can +-# follow or precede ldap, nis, etc. +-# passwd: tacplus compat +-# +-# Servers are tried in the order listed, and once a server +-# replies, no other servers are attempted in a given process instantiation +-# +-# This configuration is similar to the libpam_tacplus configuration, but +-# is maintained as a configuration file, since nsswitch.conf doesn't +-# support passing parameters. Parameters must start in the first +-# column, and parsing stops at the first whitespace +- +-# if set, errors and other issues are logged with syslog +-# debug=1 ++# Configuration for libnss-tacplus + +-# min_uid is the minimum uid to lookup via tacacs. Setting this to 0 +-# means uid 0 (root) is never looked up, good for robustness and performance +-# Cumulus Linux ships with it set to 1001, so we never lookup our standard +-# local users, including the cumulus uid of 1000. Should not be greater +-# than the local tacacs{0..15} uids +-min_uid=1001 ++# debug - If you want to open debug log, set it on ++# ++# Default: off ++# debug=on + +-# This is a comma separated list of usernames that are never sent to +-# a tacacs server, they cause an early not found return. ++# src_ip - set source address of TACACS+ protocl packets + # +-# "*" is not a wild card. While it's not a legal username, it turns out +-# that during pathname completion, bash can do an NSS lookup on "*" +-# To avoid server round trip delays, or worse, unreachable server delays +-# on filename completion, we include "*" in the exclusion list. +-exclude_users=root,cumulus,quagga,sshd,ntp,* ++# Default: None (it means the ip address of out port) ++# src_ip=2.2.2.2 + +-# The include keyword allows centralizing the tacacs+ server information +-# including the IP address and shared secret +-include=/etc/tacplus_servers ++# server - set ip address, tcp port, secret string and timeout for TACACS+ servers ++# The maximum number of servers is 8. If there is no TACACS+ server, libnss-tacplus ++# will always return pwname not found. ++# ++# Default: None (no TACACS+ server) ++# server=1.1.1.1:49,secret=test,timeout=3 + +-# The server IP address can be optionally followed by a ':' and a port +-# number (server=1.1.1.1:49). It is strongly recommended that you NOT +-# add secret keys to this file, because it is world readable. +-#secret=SECRET1 +-#server=1.1.1.1 ++# user_priv - set the map between TACACS+ user privilege and local user's passwd ++# If TACACS+ user validate ok, it will get passwd info from local user which is ++# specially created for TACACS+ user in libnss-tacplus. This configuration is provided ++# to create local user. There is two user privilege map by default. ++# If the TACACS+ user's privilege value is in [1, 14], the config of user_priv 1 is ++# used to create local user. If user_priv 7 is added, the TACACS+ user which privilege ++# value is in [1, 6] will get the config of user_priv 1, and the value in [7, 14] will ++# get user_priv 7. ++# ++# If the passwd info of mapped local user is modified, like gid and shell, the new TACACS+ ++# user will create local user by the new config. But the old TACACS+ user which has logged ++# will not modify its mapped local user's passwd info. So it's better to keep this ++# configuration unchanged, not to modified at the running time. Or simply delete the old ++# mapped local user after modified. ++# ++# NOTE: If many_to_one enables, 'pw_info' is used for mapped local user name. So note the ++# naming rule for Linux user name when you set 'pw_info', and keep it different from other ++# 'pw_info'. ++# ++# Default: ++# user_priv=15;pw_info=remote_user_su;gid=1000;group=sudo,docker;shell=/bin/bash ++# user_priv=1;pw_info=remote_user;gid=999;group=docker;shell=/bin/bash + +-# The connection timeout for an NSS library should be short, since it is +-# invoked for many programs and daemons, and a failure is usually not +-# catastrophic. Not set or set to a negative value disables use of poll(). +-# This follows the include of tacplus_servers, so it can override any +-# timeout value set in that file. +-# It's important to have this set in this file, even if the same value +-# as in tacplus_servers, since tacplus_servers should not be readable +-# by users other than root. +-timeout=5 ++# many_to_one - create one local user for many TACACS+ users which has the same privilege ++# The parameter 'pw_info' in 'user_priv' is used for the mapped local user name. ++# The default config is one to one mapping. It will create local user for each TACACS+ user ++# which has different username. The user mapping strategy should be set before enables ++# TACACS+, and keep constant at the running time. ++# ++# Default: many_to_one=n ++# many_to_one=y +-- +2.7.4 + diff --git a/src/tacacs/nss/0002-Enable-modifying-local-user-permission.patch b/src/tacacs/nss/0002-Enable-modifying-local-user-permission.patch new file mode 100644 index 00000000000..2c476354705 --- /dev/null +++ b/src/tacacs/nss/0002-Enable-modifying-local-user-permission.patch @@ -0,0 +1,71 @@ +From 7045acb8f530331d3fbabef20bcf2787d3430c55 Mon Sep 17 00:00:00 2001 +From: Taoyu Li +Date: Thu, 21 Jun 2018 19:21:01 +0000 +Subject: [PATCH] Do authorization and modify user permission even if local + user exists + +--- + nss_tacplus.c | 18 ++++++++++-------- + 1 file changed, 10 insertions(+), 8 deletions(-) + +diff --git a/nss_tacplus.c b/nss_tacplus.c +index 63f01d4..a13c278 100644 +--- a/nss_tacplus.c ++++ b/nss_tacplus.c +@@ -408,7 +408,7 @@ static int delete_conf_line(const char *name) + * conf, it will be written in conf and created by command 'useradd'. When + * useradd command use getpwnam(), it will return when username found in conf. + */ +-static int create_local_user(const char *name, int level) ++static int create_or_modify_local_user(const char *name, int level, bool existing_user) + { + FILE *fp; + useradd_info_t *user; +@@ -416,6 +416,7 @@ static int create_local_user(const char *name, int level) + int len = 512; + int lvl, cnt; + bool found = false; ++ const char* command = existing_user ? "/usr/sbin/usermod": "/usr/sbin/useradd"; + + fp = fopen(user_conf, "ab+"); + if(!fp) { +@@ -458,17 +459,18 @@ static int create_local_user(const char *name, int level) + while(lvl >= MIN_TACACS_USER_PRIV) { + user = &useradd_grp_list[lvl]; + if(user->info && user->secondary_grp && user->shell) { +- snprintf(buf, len, "useradd -G %s \"%s\" -g %d -c \"%s\" -d /home/%s -m -s %s", +- user->secondary_grp, name, user->gid, user->info, name, user->shell); ++ snprintf(buf, len, "%s -G %s \"%s\" -g %d -c \"%s\" -d /home/%s -m -s %s", ++ command, user->secondary_grp, name, user->gid, user->info, name, user->shell); ++ if(debug) syslog(LOG_DEBUG, "%s", buf); + fp = popen(buf, "r"); + if(!fp || -1 == pclose(fp)) { +- syslog(LOG_ERR, "%s: useradd popen failed errno=%d %s", +- nssname, errno, strerror(errno)); ++ syslog(LOG_ERR, "%s: %s popen failed errno=%d %s", ++ nssname, command, errno, strerror(errno)); + delete_conf_line(name); + return -1; + } + if(debug) +- syslog(LOG_DEBUG, "%s: create local user %s success", nssname, name); ++ syslog(LOG_DEBUG, "%s: %s %s success", nssname, command, name); + delete_conf_line(name); + return 0; + } +@@ -558,10 +560,10 @@ static int lookup_user_pw(struct pwbuf *pb, int level) + if(debug) + syslog(LOG_DEBUG, "%s: %s passwd %s found in local", nssname, username, + found ? "is" : "isn't"); +- if(0 != ret || found) ++ if(0 != ret) + return ret; + +- if(0 != create_local_user(username, level)) ++ if(0 != create_or_modify_local_user(username, level, found)) + return -1; + + ret = lookup_pw_local(username, pb, &found); +-- +2.9.3 + diff --git a/src/tacacs/nss/0003-management-vrf-support.patch b/src/tacacs/nss/0003-management-vrf-support.patch new file mode 100644 index 00000000000..35e30f0781b --- /dev/null +++ b/src/tacacs/nss/0003-management-vrf-support.patch @@ -0,0 +1,43 @@ +From b20aad31e186e27cc83432b405555420f94c6049 Mon Sep 17 00:00:00 2001 +From: Kannan KVS +Date: Mon, 8 Oct 2018 03:10:55 -0700 +Subject: [PATCH] MANAGEMENT_VRF_TACACS_NSS_CHANGES + +--- + nss_tacplus.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/nss_tacplus.c b/nss_tacplus.c +index 6e4fddd..1e222dd 100644 +--- a/nss_tacplus.c ++++ b/nss_tacplus.c +@@ -76,6 +76,7 @@ static useradd_info_t useradd_grp_list[MAX_TACACS_USER_PRIV + 1]; + + static char *tac_service = "shell"; + static char *tac_protocol = "ssh"; ++static char vrfname[64]; + static bool debug = false; + static bool many_to_one = false; + +@@ -124,6 +125,9 @@ static int parse_tac_server(char *srv_buf) + return -1; + } + } ++ else if(!strncmp(token, "vrf=", 4)){ ++ strncpy(vrfname, token + 4, sizeof(vrfname)); ++ } + else if(!strncmp(token, "secret=", 7)) { + if(tac_srv[tac_srv_no].key) + free(tac_srv[tac_srv_no].key); +@@ -633,7 +637,7 @@ connect_tacacs(struct tac_attrib **attr, int srvr) + return -1; + + fd = tac_connect_single(tac_srv[srvr].addr, tac_srv[srvr].key, NULL, +- tac_srv[srvr].timeout); ++ tac_srv[srvr].timeout, vrfname[0] ? vrfname : NULL); + if(fd >= 0) { + *attr = NULL; /* so tac_add_attr() allocates memory */ + tac_add_attrib(attr, "service", tac_service); +-- +2.7.4 + diff --git a/src/tacacs/nss/0004-Skip-accessing-tacacs-servers-for-local-non-tacacs-u.patch b/src/tacacs/nss/0004-Skip-accessing-tacacs-servers-for-local-non-tacacs-u.patch new file mode 100644 index 00000000000..fc0dd46376f --- /dev/null +++ b/src/tacacs/nss/0004-Skip-accessing-tacacs-servers-for-local-non-tacacs-u.patch @@ -0,0 +1,81 @@ +From 228d743b907be6346731cacc9c5d2bc78ce6a4e8 Mon Sep 17 00:00:00 2001 +From: Renuka Manavalan +Date: Mon, 6 May 2019 04:23:26 +0000 +Subject: [PATCH 4/4] Skip accessing tacacs servers for local non-tacacs users. + +--- + nss_tacplus.c | 44 +++++++++++++++++++++++++++++++++++++++++++- + 1 file changed, 43 insertions(+), 1 deletion(-) + +diff --git a/nss_tacplus.c b/nss_tacplus.c +index aac5246..f2a86e1 100644 +--- a/nss_tacplus.c ++++ b/nss_tacplus.c +@@ -487,7 +487,7 @@ static int create_or_modify_local_user(const char *name, int level, bool existin + /* + * Lookup user in /etc/passwd, and fill up passwd info if found. + */ +-static int lookup_pw_local(char* username, struct pwbuf *pb, bool *found) ++static int lookup_pw_local(const char* username, struct pwbuf *pb, bool *found) + { + FILE *fp; + struct passwd *pw = NULL; +@@ -517,6 +517,45 @@ static int lookup_pw_local(char* username, struct pwbuf *pb, bool *found) + return ret; + } + ++/* ++ * Return true, if user has entry in /etc/passwd and his gecos ++ * does not match with expected gecos for any tacacs user of any ++ * privilege level. ++ */ ++static bool is_non_tacacs_user(const char *name) ++{ ++ char buf[1024]; ++ struct passwd pw; ++ int err = 0; ++ struct pwbuf pwbuf; ++ bool found = false; ++ bool ret = false; ++ ++ pwbuf.buf = buf; ++ pwbuf.pw = &pw; ++ pwbuf.errnop = &err; ++ pwbuf.buflen = sizeof(buf); ++ ++ lookup_pw_local(name, &pwbuf, &found); ++ ++ if (found && (err == 0)) { ++ int i = MIN_TACACS_USER_PRIV; ++ const useradd_info_t *pinfo = &useradd_grp_list[i]; ++ ++ for(; (i <= MAX_TACACS_USER_PRIV); ++i, ++pinfo) { ++ if ((pinfo->info != NULL) && ++ (strcmp(pinfo->info, pwbuf.pw->pw_gecos) == 0)) { ++ break; ++ } ++ } ++ if (i > MAX_TACACS_USER_PRIV) { ++ /* gecos did not match with gecos of any tacacs user info */ ++ ret = true; ++ } ++ } ++ return ret; ++} ++ + /* + * Lookup local user passwd info for TACACS+ user. If not found, local user will + * be created by user mapping strategy. +@@ -768,6 +807,9 @@ enum nss_status _nss_tacplus_getpwnam_r(const char *name, struct passwd *pw, + syslog(LOG_WARNING, "%s: no tacacs server in config for nss_tacplus", + nssname); + } ++ else if(is_non_tacacs_user(name)) { ++ /* It is non-tacacs user, so bail out */ ++ } + else { + /* marshal the args for the lower level functions */ + pbuf.name = (char *)name; +-- +2.17.1 + diff --git a/src/tacacs/nss/0005-libnss-Modify-parsing-of-IP-addr-and-port-number-str.patch b/src/tacacs/nss/0005-libnss-Modify-parsing-of-IP-addr-and-port-number-str.patch new file mode 100644 index 00000000000..247972b63b5 --- /dev/null +++ b/src/tacacs/nss/0005-libnss-Modify-parsing-of-IP-addr-and-port-number-str.patch @@ -0,0 +1,26 @@ +From aa8af2b2400b7bbcbe7af0cb50047a98e93660ca Mon Sep 17 00:00:00 2001 +From: SuvarnaMeenakshi +Date: Thu, 29 Aug 2019 09:44:24 -0700 +Subject: [PATCH] libnss: Modify parsing of IP addr and port number string to + support IPv6 + +--- + nss_tacplus.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/nss_tacplus.c b/nss_tacplus.c +index f2a86e1..3ff3c35 100644 +--- a/nss_tacplus.c ++++ b/nss_tacplus.c +@@ -98,7 +98,7 @@ static int parse_tac_server(char *srv_buf) + hints.ai_socktype = SOCK_STREAM; + + srv = token + 7; +- port = strchr(srv, ':'); ++ port = strrchr(srv, ':'); + if(port) { + *port = '\0'; + port++; +-- +2.17.1 + diff --git a/src/tacacs/nss/Makefile b/src/tacacs/nss/Makefile new file mode 100644 index 00000000000..a0c42bd2f22 --- /dev/null +++ b/src/tacacs/nss/Makefile @@ -0,0 +1,32 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = libnss-tacplus_$(NSS_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb + +GIT_APPLY = am +ifneq (,$(filter $(CONFIGURED_ARCH), armhf arm64)) +# Workaround git am issue "Out of memory getdelim failed" +GIT_APPLY = apply +endif + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Obtain libnss-tacplus + rm -rf ./libnss-tacplus + git clone https://github.com/daveolson53/libnss-tacplus.git + pushd ./libnss-tacplus + git checkout -f 19008ab + + # Apply patch + git $(GIT_APPLY) ../0001-Modify-user-map-profile.patch + git $(GIT_APPLY) ../0002-Enable-modifying-local-user-permission.patch + git $(GIT_APPLY) ../0003-management-vrf-support.patch + git $(GIT_APPLY) ../0004-Skip-accessing-tacacs-servers-for-local-non-tacacs-u.patch + git $(GIT_APPLY) ../0005-libnss-Modify-parsing-of-IP-addr-and-port-number-str.patch + + dpkg-buildpackage -rfakeroot -b -us -uc + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/tacacs/pam/0001-Don-t-init-declarations-in-a-for-loop.patch b/src/tacacs/pam/0001-Don-t-init-declarations-in-a-for-loop.patch new file mode 100644 index 00000000000..f9a9c29eb93 --- /dev/null +++ b/src/tacacs/pam/0001-Don-t-init-declarations-in-a-for-loop.patch @@ -0,0 +1,45 @@ +From f293353127c504490f8d892afe39766ec94137bf Mon Sep 17 00:00:00 2001 +From: Liuqu +Date: Sun, 8 Oct 2017 07:32:11 -0700 +Subject: [PATCH 1/2] Don't init declarations in a for loop + +* It comes from the commit "3299028... Don't init declarations in + a for loop", and modified source format to resolve conflict in + v1.4.1 +--- + libtac/lib/author_r.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/libtac/lib/author_r.c b/libtac/lib/author_r.c +index a028144..f3b544e 100644 +--- a/libtac/lib/author_r.c ++++ b/libtac/lib/author_r.c +@@ -47,6 +47,7 @@ int tac_author_read(int fd, struct areply *re) { + char *msg = NULL; + int timeleft; + re->msg = NULL; ++ unsigned int r = 0; + + bzero(re, sizeof(struct areply)); + if (tac_readtimeout_enable && +@@ -132,7 +133,7 @@ int tac_author_read(int fd, struct areply *re) { + pktp = (u_char *) tb + TAC_AUTHOR_REPLY_FIXED_FIELDS_SIZE; + + /* cycle through the arguments supplied in the packet */ +- for (unsigned int r = 0; r < tb->arg_cnt && r < TAC_PLUS_MAX_ARGCOUNT; r++) { ++ for (r = 0; r < tb->arg_cnt && r < TAC_PLUS_MAX_ARGCOUNT; r++) { + if (len_from_body > packet_read || ((void *)pktp - (void *) tb) > packet_read) { + TACSYSLOG((LOG_ERR,\ + "%s: arguments supplied in packet seem to exceed its size",\ +@@ -205,7 +206,7 @@ int tac_author_read(int fd, struct areply *re) { + TACSYSLOG((LOG_DEBUG, "Args cnt %d", tb->arg_cnt)); + /* argp points to current argument string + pktp points to current argument length */ +- for (unsigned int r = 0; r < tb->arg_cnt && r < TAC_PLUS_MAX_ARGCOUNT; ++ for (r = 0; r < tb->arg_cnt && r < TAC_PLUS_MAX_ARGCOUNT; + r++) { + unsigned char buff[256]; + unsigned char *sep; +-- +2.7.4 + diff --git a/src/tacacs/pam/0002-Fix-libtac2-bin-install-directory-error.patch b/src/tacacs/pam/0002-Fix-libtac2-bin-install-directory-error.patch new file mode 100644 index 00000000000..28518b3d244 --- /dev/null +++ b/src/tacacs/pam/0002-Fix-libtac2-bin-install-directory-error.patch @@ -0,0 +1,19 @@ +From 85bae6b84d93c4b243d29ee08ff7030376bf80cb Mon Sep 17 00:00:00 2001 +From: Liuqu +Date: Sun, 8 Oct 2017 19:39:23 -0700 +Subject: [PATCH 2/2] Fix libtac2-bin install directory error + +--- + debian/libtac2-bin.install | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/debian/libtac2-bin.install b/debian/libtac2-bin.install +index 236670a..1df36c6 100644 +--- a/debian/libtac2-bin.install ++++ b/debian/libtac2-bin.install +@@ -1 +1 @@ +-usr/sbin ++usr/bin/* +-- +2.7.4 + diff --git a/src/tacacs/pam/0003-Obfuscate-key-before-printing-to-syslog.patch b/src/tacacs/pam/0003-Obfuscate-key-before-printing-to-syslog.patch new file mode 100644 index 00000000000..1d1f5d3efe8 --- /dev/null +++ b/src/tacacs/pam/0003-Obfuscate-key-before-printing-to-syslog.patch @@ -0,0 +1,25 @@ +From 254e6cb86b667f6324bcbfd89fe982e865d05189 Mon Sep 17 00:00:00 2001 +From: Taoyu Li +Date: Sat, 3 Mar 2018 02:22:49 +0000 +Subject: [PATCH] obfuscate key before printing to syslog + +--- + support.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/support.c b/support.c +index 44efee3..f9ab8aa 100644 +--- a/support.c ++++ b/support.c +@@ -282,7 +282,7 @@ int _pam_parse (int argc, const char **argv) { + _pam_log(LOG_DEBUG, "%d servers defined", tac_srv_no); + + for(n = 0; n < tac_srv_no; n++) { +- _pam_log(LOG_DEBUG, "server[%d] { addr=%s, key='%s' }", n, tac_ntop(tac_srv[n].addr->ai_addr), tac_srv[n].key); ++ _pam_log(LOG_DEBUG, "server[%d] { addr=%s, key='%c*****' }", n, tac_ntop(tac_srv[n].addr->ai_addr), tac_srv[n].key[0]); + } + + _pam_log(LOG_DEBUG, "tac_service='%s'", tac_service); +-- +2.9.3 + diff --git a/src/tacacs/pam/0004-management-vrf-support.patch b/src/tacacs/pam/0004-management-vrf-support.patch new file mode 100644 index 00000000000..4ff6ecc28dc --- /dev/null +++ b/src/tacacs/pam/0004-management-vrf-support.patch @@ -0,0 +1,240 @@ +From 6005f4a884f250787bdc070235879b14186ade2c Mon Sep 17 00:00:00 2001 +From: Kannan KVS +Date: Mon, 8 Oct 2018 02:58:42 -0700 +Subject: [PATCH] MANAGEMENT_VRF_TACACS_PAM_CHANGES + +--- + libtac/include/libtac.h | 4 ++-- + libtac/lib/connect.c | 21 +++++++++++++++++---- + pam_tacplus.c | 12 +++++++----- + support.c | 3 +++ + tacc.c | 15 ++++++++++----- + 5 files changed, 39 insertions(+), 16 deletions(-) + +diff --git a/libtac/include/libtac.h b/libtac/include/libtac.h +index 6dc42ab..0c9d3d2 100644 +--- a/libtac/include/libtac.h ++++ b/libtac/include/libtac.h +@@ -135,8 +135,8 @@ extern int tac_readtimeout_enable; + /* connect.c */ + extern int tac_timeout; + +-int tac_connect(struct addrinfo **, char **, int); +-int tac_connect_single(const struct addrinfo *, const char *, struct addrinfo *, int); ++int tac_connect(struct addrinfo **, char **, int, char *); ++int tac_connect_single(const struct addrinfo *, const char *, struct addrinfo *, int, char *); + char *tac_ntop(const struct sockaddr *); + + int tac_authen_send(int, const char *, const char *, const char *, +diff --git a/libtac/lib/connect.c b/libtac/lib/connect.c +index 47f598a..5035135 100644 +--- a/libtac/lib/connect.c ++++ b/libtac/lib/connect.c +@@ -42,7 +42,7 @@ int tac_timeout = 5; + * >= 0 : valid fd + * < 0 : error status code, see LIBTAC_STATUS_... + */ +-int tac_connect(struct addrinfo **server, char **key, int servers) { ++int tac_connect(struct addrinfo **server, char **key, int servers, char *iface) { + int tries; + int fd=-1; + +@@ -50,7 +50,7 @@ int tac_connect(struct addrinfo **server, char **key, int servers) { + TACSYSLOG((LOG_ERR, "%s: no TACACS+ servers defined", __FUNCTION__)) + } else { + for ( tries = 0; tries < servers; tries++ ) { +- if((fd=tac_connect_single(server[tries], key[tries], NULL, tac_timeout)) >= 0 ) { ++ if((fd=tac_connect_single(server[tries], key[tries], NULL, tac_timeout, iface)) >= 0 ) { + /* tac_secret was set in tac_connect_single on success */ + break; + } +@@ -66,8 +66,9 @@ int tac_connect(struct addrinfo **server, char **key, int servers) { + /* return value: + * >= 0 : valid fd + * < 0 : error status code, see LIBTAC_STATUS_... ++ * If iface is non-null, try to BIND to that interface, to support specific routing, including VRF. + */ +-int tac_connect_single(const struct addrinfo *server, const char *key, struct addrinfo *srcaddr, int timeout) { ++int tac_connect_single(const struct addrinfo *server, const char *key, struct addrinfo *srcaddr, int timeout, char *iface) { + int retval = LIBTAC_STATUS_CONN_ERR; /* default retval */ + int fd = -1; + int flags, rc; +@@ -91,6 +92,19 @@ int tac_connect_single(const struct addrinfo *server, const char *key, struct ad + return LIBTAC_STATUS_CONN_ERR; + } + ++ if (iface) { ++ /* do not fail if the bind fails, connection may still succeed */ ++ if (setsockopt(fd, SOL_SOCKET, SO_BINDTODEVICE, iface, ++ strlen(iface)+1) < 0) { ++ TACSYSLOG((LOG_WARNING, ":%s: Binding socket to device %s failed.", ++ __FUNCTION__, iface)) ++ } else { ++ TACDEBUG((LOG_DEBUG, "%s: Binding socket to device %s succeeded.", ++ __FUNCTION__, iface)) ++ } ++ ++ } ++ + /* get flags for restoration later */ + flags = fcntl(fd, F_GETFL, 0); + +@@ -166,7 +180,6 @@ int tac_connect_single(const struct addrinfo *server, const char *key, struct ad + } + + /* connected ok */ +- TACDEBUG((LOG_DEBUG, "%s: connected to %s", __FUNCTION__, ip)) + retval = fd; + + /* set current tac_secret */ +diff --git a/pam_tacplus.c b/pam_tacplus.c +index 2b7d2cd..38e2a70 100644 +--- a/pam_tacplus.c ++++ b/pam_tacplus.c +@@ -53,6 +53,8 @@ static tacplus_server_t active_server; + /* accounting task identifier */ + static short int task_id = 0; + ++extern char *__vrfname; ++ + + /* Helper functions */ + int _pam_send_account(int tac_fd, int type, const char *user, char *tty, +@@ -175,7 +177,7 @@ int _pam_account(pam_handle_t *pamh, int argc, const char **argv, + + status = PAM_SESSION_ERR; + for(srv_i = 0; srv_i < tac_srv_no; srv_i++) { +- tac_fd = tac_connect_single(tac_srv[srv_i].addr, tac_srv[srv_i].key, NULL, tac_timeout); ++ tac_fd = tac_connect_single(tac_srv[srv_i].addr, tac_srv[srv_i].key, NULL, tac_timeout, __vrfname); + if (tac_fd < 0) { + _pam_log(LOG_WARNING, "%s: error sending %s (fd)", + __FUNCTION__, typemsg); +@@ -274,9 +276,9 @@ int pam_sm_authenticate (pam_handle_t * pamh, int flags, + if (ctrl & PAM_TAC_DEBUG) + syslog(LOG_DEBUG, "%s: trying srv %d", __FUNCTION__, srv_i ); + +- tac_fd = tac_connect_single(tac_srv[srv_i].addr, tac_srv[srv_i].key, NULL, tac_timeout); ++ tac_fd = tac_connect_single(tac_srv[srv_i].addr, tac_srv[srv_i].key, NULL, tac_timeout, __vrfname); + if (tac_fd < 0) { +- _pam_log(LOG_ERR, "connection failed srv %d: %m", srv_i); ++ _pam_log(LOG_ERR, "%s: connection to srv %d failed", __FUNCTION__, srv_i); + continue; + } + if (tac_authen_send(tac_fd, user, pass, tty, r_addr, TAC_PLUS_AUTHEN_LOGIN) < 0) { +@@ -577,7 +579,7 @@ int pam_sm_acct_mgmt (pam_handle_t * pamh, int flags, + if(tac_protocol[0] != '\0') + tac_add_attrib(&attr, "protocol", tac_protocol); + +- tac_fd = tac_connect_single(active_server.addr, active_server.key, NULL, tac_timeout); ++ tac_fd = tac_connect_single(active_server.addr, active_server.key, NULL, tac_timeout, __vrfname); + if(tac_fd < 0) { + _pam_log (LOG_ERR, "TACACS+ server unavailable"); + if(arep.msg != NULL) +@@ -760,7 +762,7 @@ int pam_sm_chauthtok(pam_handle_t * pamh, int flags, + if (ctrl & PAM_TAC_DEBUG) + syslog(LOG_DEBUG, "%s: trying srv %d", __FUNCTION__, srv_i ); + +- tac_fd = tac_connect_single(tac_srv[srv_i].addr, tac_srv[srv_i].key, NULL, tac_timeout); ++ tac_fd = tac_connect_single(tac_srv[srv_i].addr, tac_srv[srv_i].key, NULL, tac_timeout, __vrfname); + if (tac_fd < 0) { + _pam_log(LOG_ERR, "connection failed srv %d: %m", srv_i); + continue; +diff --git a/support.c b/support.c +index 44efee3..be0142d 100644 +--- a/support.c ++++ b/support.c +@@ -36,6 +36,7 @@ int tac_srv_no = 0; + char tac_service[64]; + char tac_protocol[64]; + char tac_prompt[64]; ++char *__vrfname=NULL; + + void _pam_log(int err, const char *format,...) { + char msg[256]; +@@ -271,6 +272,8 @@ int _pam_parse (int argc, const char **argv) { + } else { + tac_readtimeout_enable = 1; + } ++ } else if(!strncmp(*argv, "vrf=", 4)) { ++ __vrfname = strdup(*argv + 4); + } else { + _pam_log (LOG_WARNING, "unrecognized option: %s", *argv); + } +diff --git a/tacc.c b/tacc.c +index d7c6e1a..fcc7d8c 100644 +--- a/tacc.c ++++ b/tacc.c +@@ -76,6 +76,7 @@ int tac_encryption = 1; + typedef unsigned char flag; + flag quiet = 0; + char *user = NULL; /* global, because of signal handler */ ++char *iface = NULL; /* -I interface or VRF to use for connection */ + + /* command line options */ + static struct option long_options[] = { +@@ -97,6 +98,7 @@ static struct option long_options[] = { + { "service", required_argument, NULL, 'S' }, + { "protocol", required_argument, NULL, 'P' }, + { "remote", required_argument, NULL, 'r' }, ++ { "interface", required_argument, NULL, 'I' }, + { "login", required_argument, NULL, 'L' }, + + /* modifiers */ +@@ -107,7 +109,7 @@ static struct option long_options[] = { + { 0, 0, 0, 0 } }; + + /* command line letters */ +-char *opt_string = "TRAVhu:p:s:k:c:qr:wnS:P:L:"; ++char *opt_string = "TRAVIhu:p:s:k:c:qr:wnS:P:L:"; + + int main(int argc, char **argv) { + char *pass = NULL; +@@ -168,6 +170,9 @@ int main(int argc, char **argv) { + showversion(argv[0]); + case 'h': + showusage(argv[0]); ++ case 'I': ++ iface = optarg; ++ break; + case 'u': + user = optarg; + break; +@@ -283,7 +288,7 @@ int main(int argc, char **argv) { + tac_add_attrib(&attr, "service", service); + tac_add_attrib(&attr, "protocol", protocol); + +- tac_fd = tac_connect_single(tac_server, tac_secret, NULL, 60); ++ tac_fd = tac_connect_single(tac_server, tac_secret, NULL, 60, iface); + if (tac_fd < 0) { + if (!quiet) + printf("Error connecting to TACACS+ server: %m\n"); +@@ -321,7 +326,7 @@ int main(int argc, char **argv) { + tac_add_attrib(&attr, "service", service); + tac_add_attrib(&attr, "protocol", protocol); + +- tac_fd = tac_connect_single(tac_server, tac_secret, NULL, 60); ++ tac_fd = tac_connect_single(tac_server, tac_secret, NULL, 60, iface); + if (tac_fd < 0) { + if (!quiet) + printf("Error connecting to TACACS+ server: %m\n"); +@@ -404,7 +409,7 @@ int main(int argc, char **argv) { + sprintf(buf, "%hu", task_id); + tac_add_attrib(&attr, "task_id", buf); + +- tac_fd = tac_connect_single(tac_server, tac_secret, NULL, 60); ++ tac_fd = tac_connect_single(tac_server, tac_secret, NULL, 60, iface); + if (tac_fd < 0) { + if (!quiet) + printf("Error connecting to TACACS+ server: %m\n"); +@@ -445,7 +450,7 @@ void authenticate(const struct addrinfo *tac_server, const char *tac_secret, + int ret; + struct areply arep; + +- tac_fd = tac_connect_single(tac_server, tac_secret, NULL, 60); ++ tac_fd = tac_connect_single(tac_server, tac_secret, NULL, 60, iface); + if (tac_fd < 0) { + if (!quiet) + printf("Error connecting to TACACS+ server: %m\n"); +-- +2.7.4 + diff --git a/src/tacacs/pam/0005-pam-Modify-parsing-of-IP-address-and-port-number-to-.patch b/src/tacacs/pam/0005-pam-Modify-parsing-of-IP-address-and-port-number-to-.patch new file mode 100644 index 00000000000..541333232b5 --- /dev/null +++ b/src/tacacs/pam/0005-pam-Modify-parsing-of-IP-address-and-port-number-to-.patch @@ -0,0 +1,31 @@ +From 264de96e8a1c411371f9fc20b0b5b00c10e7052d Mon Sep 17 00:00:00 2001 +From: SuvarnaMeenakshi +Date: Thu, 29 Aug 2019 09:51:43 -0700 +Subject: [PATCH] pam: Modify parsing of IP address and port number to support + IPv6 + +--- + support.c | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +diff --git a/support.c b/support.c +index 44efee3..7c00618 100644 +--- a/support.c ++++ b/support.c +@@ -225,11 +226,11 @@ int _pam_parse (int argc, const char **argv) { + + if (*server_buf == '[' && (close_bracket = strchr(server_buf, ']')) != NULL) { /* Check for URI syntax */ + server_name = server_buf + 1; +- port = strchr(close_bracket, ':'); ++ port = strrchr(close_bracket, ':'); + *close_bracket = '\0'; + } else { /* Fall back to traditional syntax */ + server_name = server_buf; +- port = strchr(server_buf, ':'); ++ port = strrchr(server_buf, ':'); + } + if (port != NULL) { + *port = '\0'; +-- +2.17.1 + diff --git a/src/tacacs/pam/Makefile b/src/tacacs/pam/Makefile new file mode 100644 index 00000000000..487cf975fd7 --- /dev/null +++ b/src/tacacs/pam/Makefile @@ -0,0 +1,28 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = libpam-tacplus_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb +DERIVED_TARGETS = libtac2_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb \ + libtac-dev_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Obtain pam_tacplus + rm -rf ./pam_tacplus + git clone https://github.com/jeroennijhof/pam_tacplus.git + pushd ./pam_tacplus + git checkout -f v1.4.1 + + # Apply patch + git apply ../0001-Don-t-init-declarations-in-a-for-loop.patch + git apply ../0002-Fix-libtac2-bin-install-directory-error.patch + git apply ../0003-Obfuscate-key-before-printing-to-syslog.patch + git apply ../0004-management-vrf-support.patch + git apply ../0005-pam-Modify-parsing-of-IP-address-and-port-number-to-.patch + + dpkg-buildpackage -rfakeroot -b -us -uc + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/telemetry/Makefile b/src/telemetry/Makefile new file mode 100644 index 00000000000..faf334db0eb --- /dev/null +++ b/src/telemetry/Makefile @@ -0,0 +1,22 @@ +export GOPATH=/tmp/go + +INSTALL := /usr/bin/install + +all: telemetry + +telemetry: + mkdir -p ${GOPATH}/src/github.com/Azure/ + cp -a sonic-telemetry ${GOPATH}/src/github.com/Azure/ + /usr/local/go/bin/go get -v github.com/Azure/sonic-telemetry/telemetry + /usr/local/go/bin/go get -v github.com/Azure/sonic-telemetry/dialout/dialout_client_cli + +install: + $(INSTALL) -D ${GOPATH}/bin/telemetry $(DESTDIR)/usr/sbin/telemetry + $(INSTALL) -D ${GOPATH}/bin/dialout_client_cli $(DESTDIR)/usr/sbin/dialout_client_cli + +deinstall: + rm $(DESTDIR)/usr/sbin/telemetry + rm $(DESTDIR)/usr/sbin/dialout_client_cli + +clean: + rm -fr ${GOPATH} diff --git a/src/telemetry/debian/changelog b/src/telemetry/debian/changelog new file mode 100644 index 00000000000..77dab629040 --- /dev/null +++ b/src/telemetry/debian/changelog @@ -0,0 +1,5 @@ +sonic-telemetry (0.1) UNRELEASED; urgency=medium + + * Initial release. + + -- Jipan Yang Sat, 24 Mar 2018 12:48:22 -0700 diff --git a/src/telemetry/debian/compat b/src/telemetry/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/src/telemetry/debian/compat @@ -0,0 +1 @@ +9 diff --git a/src/telemetry/debian/control b/src/telemetry/debian/control new file mode 100644 index 00000000000..f1b6a7c0728 --- /dev/null +++ b/src/telemetry/debian/control @@ -0,0 +1,17 @@ +Source: sonic-telemetry +Section: devel +Priority: optional +Maintainer: Jipan Yang +Build-Depends: debhelper (>= 8.0.0), + dh-systemd +Standards-Version: 3.9.3 +Homepage: https://github.com/Azure/sonic-telemetry +XS-Go-Import-Path: github.com/Azure/sonic-telemetry + +Package: sonic-telemetry +Architecture: any +Built-Using: ${misc:Built-Using} +Depends: ${misc:Depends}, + ${shlibs:Depends} +Description: SONiC telemetry + sonic-telemetry \ No newline at end of file diff --git a/src/telemetry/debian/rules b/src/telemetry/debian/rules new file mode 100755 index 00000000000..3995a26d7fc --- /dev/null +++ b/src/telemetry/debian/rules @@ -0,0 +1,3 @@ +#!/usr/bin/make -f +%: + dh $@ --with systemd diff --git a/src/telemetry/debian/telemetry.init.d b/src/telemetry/debian/telemetry.init.d new file mode 100644 index 00000000000..2fea32e17c4 --- /dev/null +++ b/src/telemetry/debian/telemetry.init.d @@ -0,0 +1,14 @@ +#!/bin/bash +# +### BEGIN INIT INFO +# Provides: sonic-telemetry +# Required-Start: $local_fs $network $remote_fs $syslog +# Required-Stop: $local_fs $network $remote_fs $syslog +# Default-Start: 2 3 4 5 +# Default-Stop: 0 1 6 +# Short-Description: start and stop the telemetry +# Description: sonic-telemetry is an implementation of sonic telemetry daemon in Go +### END INIT INFO +# + +exit 0 diff --git a/src/telemetry/sonic-telemetry b/src/telemetry/sonic-telemetry new file mode 160000 index 00000000000..d8e5adf8cb9 --- /dev/null +++ b/src/telemetry/sonic-telemetry @@ -0,0 +1 @@ +Subproject commit d8e5adf8cb9f810624f61daf6d343dfe8b3fa4b0 diff --git a/src/thrift/Makefile b/src/thrift/Makefile new file mode 100644 index 00000000000..6039b2e7cfa --- /dev/null +++ b/src/thrift/Makefile @@ -0,0 +1,34 @@ +SHELL = /bin/bash +.ONESHELL: +.SHELLFLAGS += -e + +THRIFT_VERSION = 0.11.0 +THRIFT_VERSION_FULL = $(THRIFT_VERSION)-4 + +MAIN_TARGET = libthrift-$(THRIFT_VERSION)_$(THRIFT_VERSION_FULL)_$(CONFIGURED_ARCH).deb +DERIVED_TARGETS = libthrift-dev_$(THRIFT_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + python-thrift_$(THRIFT_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + thrift-compiler_$(THRIFT_VERSION_FULL)_$(CONFIGURED_ARCH).deb + +THRIFT_LINK_PRE = https://sonicstorage.blob.core.windows.net/packages/debian + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + rm -rf thrift-$(THRIFT_VERSION) + + wget -NO "thrift_$(THRIFT_VERSION).orig.tar.gz" "$(THRIFT_LINK_PRE)/thrift_0.11.0.orig.tar.gz?sv=2015-04-05&sr=b&sig=%2BrAjWESiSNRCMN7NGqEqVGceLefpwwS%2FWPKEfJpPLSQ%3D&se=2156-02-02T17%3A17%3A20Z&sp=r" + wget -NO "thrift_$(THRIFT_VERSION_FULL).debian.tar.xz" "$(THRIFT_LINK_PRE)/thrift_0.11.0-4.debian.tar.xz?sv=2015-04-05&sr=b&sig=dj9uJ5YjUNupcmuxSX6%2F5IS9NqaGAyM9iF2h%2F2rROZA%3D&se=2156-02-02T17%3A19%3A34Z&sp=r" + wget -NO "thrift_$(THRIFT_VERSION_FULL).dsc" "$(THRIFT_LINK_PRE)/thrift_0.11.0-4.dsc?sv=2015-04-05&sr=b&sig=pWfg55owvQ2jZtZ6ylHp0OP8uZyfc9sxO6H%2BP4Ez7w4%3D&se=2156-02-02T17%3A20%3A05Z&sp=r" + + dpkg-source -x thrift_$(THRIFT_VERSION_FULL).dsc + pushd thrift-$(THRIFT_VERSION) + + # Revert breaking change in thrift 0.11.0 + # saithrift implementation relies on the bug in union serialization + # (https://jira.apache.org/jira/browse/THRIFT-3650) + patch -p1 < ../patch/0001-Revert-THRIFT-3650-incorrect-union-serialization.patch + CXXFLAGS="-DFORCE_BOOST_SMART_PTR" DEB_BUILD_OPTIONS=nocheck dpkg-buildpackage -d -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) + popd + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/thrift/patch/0001-Revert-THRIFT-3650-incorrect-union-serialization.patch b/src/thrift/patch/0001-Revert-THRIFT-3650-incorrect-union-serialization.patch new file mode 100644 index 00000000000..7a0742b3dd0 --- /dev/null +++ b/src/thrift/patch/0001-Revert-THRIFT-3650-incorrect-union-serialization.patch @@ -0,0 +1,42 @@ +From f44f148bb9cff81f320e7094e7956d98fc5ac423 Mon Sep 17 00:00:00 2001 +From: Stepan Blyschak +Date: Wed, 20 Mar 2019 16:32:56 +0200 +Subject: [PATCH] Revert "THRIFT-3650 incorrect union serialization" + +This reverts commit b72bb94a8212edc83864edc435896fdcda6e796c. + +Signed-off-by: Stepan Blyschak +--- + compiler/cpp/src/thrift/parse/t_struct.h | 16 ++++++---------- + 1 file changed, 6 insertions(+), 10 deletions(-) + +diff --git a/compiler/cpp/src/thrift/parse/t_struct.h b/compiler/cpp/src/thrift/parse/t_struct.h +index 4102da7..880e79b 100644 +--- a/compiler/cpp/src/thrift/parse/t_struct.h ++++ b/compiler/cpp/src/thrift/parse/t_struct.h +@@ -66,16 +66,12 @@ public: + void validate_union_member(t_field* field) { + if (is_union_ && (!name_.empty())) { + +- // 1) unions can't have required fields +- // 2) union members are implicitly optional, otherwise bugs like THRIFT-3650 wait to happen +- if (field->get_req() != t_field::T_OPTIONAL) { +- // no warning on default requiredness, but do warn on anything else that is explicitly asked for +- if(field->get_req() != t_field::T_OPT_IN_REQ_OUT) { +- pwarning(1, +- "Union %s field %s: union members must be optional, ignoring specified requiredness.\n", +- name_.c_str(), +- field->get_name().c_str()); +- } ++ // unions can't have required fields ++ if (field->get_req() == t_field::T_REQUIRED) { ++ pwarning(1, ++ "Required field %s of union %s set to optional.\n", ++ field->get_name().c_str(), ++ name_.c_str()); + field->set_req(t_field::T_OPTIONAL); + } + +-- +1.9.1 + diff --git a/update_screen.sh b/update_screen.sh new file mode 100755 index 00000000000..de54774cc6c --- /dev/null +++ b/update_screen.sh @@ -0,0 +1,88 @@ +#!/bin/bash + +lockfile .screen + +target_list_file=/tmp/target_list +touch ${target_list_file} + +function scroll_up { +# Check if TERM is available +[[ "${TERM}" == "dumb" ]] && return + +for i in $(cat ${target_list_file}); do + tput cuu1 + tput el +done +} + +function print_targets { +# Check if TERM is available +[[ "${TERM}" == "dumb" ]] && return + +count=1 +for i in $(cat ${target_list_file}); do + printf "[ %02d ] [ %s ]\n" "${count}" "$i" + ((count++)) +done +} + +function remove_target { +# Check if TERM is available +[[ "${TERM}" == "dumb" ]] && echo "[ finished ] [ $1 ] " && return + +old_list=$(cat ${target_list_file}) +rm ${target_list_file} +for target in ${old_list}; do + if [[ "${target}" != "$1" ]]; then + echo ${target} >> ${target_list_file} + fi +done +touch ${target_list_file} +} + +function add_target { +# Check if TERM is available +[[ "${TERM}" == "dumb" ]] && echo "[ building ] [ $1 ] " && return + +echo $1 >> ${target_list_file} +} + +function print_targets_delay { +sleep 2 && print_targets && rm -f .screen & +exit 0 +} + +while getopts ":a:d:e:" opt; do + case $opt in + a) + scroll_up + add_target ${OPTARG} + print_targets + ;; + d) + scroll_up + remove_target ${OPTARG} + print_targets + ;; + e) + scroll_up + remove_target ${OPTARG} + echo "[ FAIL LOG START ] [ ${OPTARG} ]" + cat ${OPTARG}.log + echo "[ FAIL LOG END ] [ ${OPTARG} ]" + print_targets_delay + ;; + \?) + echo "Invalid option: -$OPTARG" >&2 + rm -f .screen + exit 1 + ;; + :) + echo "Option -$OPTARG requires an argument." >&2 + rm -f .screen + exit 1 + ;; + esac +done + +rm -f .screen